'kernel_org-linux-2_6_11_7'.
+++ /dev/null
-<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook V3.1//EN"[]>
-
-<book id="MouseGuide">
- <bookinfo>
- <title>Mouse Drivers</title>
-
- <authorgroup>
- <author>
- <firstname>Alan</firstname>
- <surname>Cox</surname>
- <affiliation>
- <address>
- <email>alan@redhat.com</email>
- </address>
- </affiliation>
- </author>
- </authorgroup>
-
- <copyright>
- <year>2000</year>
- <holder>Alan Cox</holder>
- </copyright>
-
- <legalnotice>
- <para>
- This documentation is free software; you can redistribute
- it and/or modify it under the terms of the GNU General Public
- License as published by the Free Software Foundation; either
- version 2 of the License, or (at your option) any later
- version.
- </para>
-
- <para>
- This program is distributed in the hope that it will be
- useful, but WITHOUT ANY WARRANTY; without even the implied
- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- See the GNU General Public License for more details.
- </para>
-
- <para>
- You should have received a copy of the GNU General Public
- License along with this program; if not, write to the Free
- Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- </para>
-
- <para>
- For more details see the file COPYING in the source
- distribution of Linux.
- </para>
- </legalnotice>
- </bookinfo>
-
- <toc></toc>
-
- <chapter id="intro">
- <title>Introduction</title>
- <note>
- <title>Earlier publication</title>
- <para>
- Parts of this document first appeared in Linux Magazine under a
- ninety day exclusivity.
- </para>
- </note>
-
- <para>
- Mice are conceptually one of the simplest device interfaces in the
- Linux operating system. Not all mice are handled by the kernel.
- Instead there is a two layer abstraction.
- </para>
-
- <para>
- The kernel mouse drivers and userspace drivers for the serial mice are
- all managed by a system daemon called <application>gpm</application>
- - the general purpose mouse driver. <application>gpm</application>
- handles cutting and pasting on the text consoles. It provides a
- general library for mouse-aware applications and it handles the
- sharing of mouse services with the
- <application>X Window System</application> user interface.
- </para>
- <para>
- Sometimes a mouse speaks a sufficiently convoluted protocol that the
- protocol is handled by <application>Gpm</application> itself. Most
- of the mouse drivers follow a common interface called the bus mouse
- protocol.
- </para>
- <para>
- Each read from a bus mouse interface device returns a block of data.
- The first three bytes of each read are defined as follows:
-
- <table frame="all">
- <title>Mouse Data Encoding</title>
- <tgroup cols="2" align="left">
- <tbody>
- <row>
- <entry>Byte 0</entry>
- <entry>0x80 + the buttons currently down.</entry>
- </row>
- <row>
- <entry>Byte 1</entry>
- <entry>A signed value for the shift in X position</entry>
- </row>
- <row>
- <entry>Byte 2</entry>
- <entry>A signed value for the shift in Y position</entry>
- </row>
- </tbody>
- </tgroup>
- </table>
-
- An application can choose to read more than 3 bytes. The rest of the
- bytes will be zero, or may optionally return some additional
- device-specific information.
- </para>
- <para>
- The position values are truncated if they exceed the 8bit range (that
- is -127 <= delta <= 127). While the value -128 does fit into a
- byte is not allowed.
- </para>
- <para>
- The <mousebutton>buttons</mousebutton> are numbered left to right as
- 0, 1, 2, 3.. and each button sets the relevant bit. So a user pressing
- the left and right button of a three button mouse will set bits 0 and 2.
- </para>
- <para>
- All mice are required to support the <function>poll</function>
- operation. Indeed pretty much every user of a mouse device uses
- <function>poll</function> to wait for mouse events to occur.
- </para>
- <para>
- Finally the mice support asynchronous I/O. This is a topic we have not
- yet covered but which I will explain after looking at a simple mouse
- driver.
- </para>
- </chapter>
-
- <chapter id="driver">
- <title>A simple mouse driver</title>
- <para>
- First we will need the set up functions for our mouse device. To keep
- this simple our imaginary mouse device has three I/O ports fixed at I/O
- address 0x300 and always lives on interrupt 5. The ports will be the X
- position, the Y position and the buttons in that order.
- </para>
-
- <programlisting>
-#define OURMOUSE_BASE 0x300
-
-static struct miscdevice our_mouse = {
- OURMOUSE_MINOR, "ourmouse", &our_mouse_fops
-};
-
-__init ourmouse_init(void)
-{
-
- if (request_region(OURMOUSE_BASE, 3, "ourmouse") < 0) {
- printk(KERN_ERR "ourmouse: request_region failed.\n");
- return -ENODEV;
- }
-
- if (misc_register(&our_mouse) < 0) {
- printk(KERN_ERR "ourmouse: cannot register misc device.\n");
- release_region(OURMOUSE_BASE, 3);
- return -EBUSY;
- }
-
- return 0;
-}
- </programlisting>
-
- <para>
- The <structname>miscdevice</structname> is new here. Linux normally
- parcels devices out by major number, and each device has 256 units.
- For things like mice this is extremely wasteful so a device exists
- which is used to accumulate all the odd individual devices that
- computers tend to have.
- </para>
- <para>
- Minor numbers in this space are allocated by a central source, although
- you can look in the kernel <filename>Documentation/devices.txt</filename>
- file and pick a free one for development use. This kernel file also
- carries instructions for registering a device. This may change over time
- so it is a good idea to obtain a current copy of this file first.
- </para>
- <para>
- Our code then is fairly simple. We reserve our I/O address space with
- request_region, checking to make sure that it succeeded (i.e. the
- space wasn't reserved by anyone else).
- </para>
- <para>
- Then we ask the misc driver to allocate our minor device number. We also
- hand it our name (which is used in
- <filename class="directory">/proc/misc</filename>) and a set of file
- operations that are to be used. The file operations work exactly like the
- file operations you would register for a normal character device. The misc
- device itself is simply acting as a redirector for requests.
- Since misc_register can fail, it is important to check for failure
- and act accordingly (which in the case of a mouse driver is to abort,
- since you can't use the mouse without a working device node).
- </para>
- <para>
- Next, in order to be able to use and test our code we need to add some
- module code to support it. This too is fairly simple:
- </para>
- <programlisting>
-#ifdef MODULE
-
-int init_module(void)
-{
- if(ourmouse_init()<0)
- return -ENODEV:
- return 0;
-}
-
-void cleanup_module(void)
-{
- misc_deregister(&our_mouse);
- free_region(OURMOUSE_BASE, 3);
-}
-
-
-#endif
- </programlisting>
-
- <para>
- The module code provides the normal two functions. The
- <function>init_module</function> function is called when the module is
- loaded. In our case it simply calls the initialising function we wrote
- and returns an error if this fails. This ensures the module will only
- be loaded if it was successfully set up.
- </para>
- <para>
- The <function>cleanup_module</function> function is called when the
- module is unloaded. We give the miscellaneous device entry back, and
- then free our I/O resources. If we didn't free the I/O resources then
- the next time the module loaded it would think someone else had its I/O
- space.
- </para>
- <para>
- Once the <function>misc_deregister</function> has been called any
- attempts to open the mouse device will fail with the error
- <errorcode>ENODEV</errorcode> (<errorname>No such device</errorname>).
- </para>
- <para>
- Next we need to fill in our file operations. A mouse doesn't need many
- of these. We need to provide open, release, read and poll. That makes
- for a nice simple structure:
- </para>
-
- <programlisting>
-struct file_operations our_mouse_fops = {
- owner: THIS_MODULE, /* Automatic usage management */
- read: read_mouse, /* You can read a mouse */
- write: write_mouse, /* This won't do a lot */
- poll: poll_mouse, /* Poll */
- open: open_mouse, /* Called on open */
- release: close_mouse, /* Called on close */
-};
- </programlisting>
-
- <para>
- There is nothing particularly special needed here. We provide functions
- for all the relevant or required operations and little else. There is
- nothing stopping us providing an ioctl function for this mouse. Indeed
- if you have a configurable mouse it may be very appropriate to provide
- configuration interfaces via ioctl calls.
- </para>
- <para>
- The syntax we use is not standard C as such. GCC provides the ability
- to initialise fields by name, and this generally makes the method table
- much easier to read than counting through NULL pointers and remembering
- the order by hand.
- </para>
- <para>
- The owner field is used to manage the locking of module load an
- unloading. It is obviously important that a module is not unloaded while
- in use. When your device is opened the module specified by "owner" is
- locked. When it is finally released the module is unlocked.
- </para>
- <para>
- The open and close routines need to manage enabling and disabling the
- interrupts for the mouse as well as stopping the mouse being unloaded
- when it is no longer required.
- </para>
-
- <programlisting>
-static int mouse_users = 0; /* User count */
-static int mouse_dx = 0; /* Position changes */
-static int mouse_dy = 0;
-static int mouse_event = 0; /* Mouse has moved */
-
-static int open_mouse(struct inode *inode, struct file *file)
-{
- if(mouse_users++)
- return 0;
-
- if(request_irq(mouse_intr, OURMOUSE_IRQ, 0, "ourmouse", NULL))
- {
- mouse_users--;
- return -EBUSY;
- }
- mouse_dx = 0;
- mouse_dy = 0;
- mouse_event = 0;
- mouse_buttons = 0;
- return 0;
-}
- </programlisting>
- <para>
- The open function has to do a small amount of housework. We keep a count
- of the number of times the mouse is open. This is because we do not want
- to request the interrupt multiple times. If the mouse has at least one
- user then it is set up and we simply add to the user count and return
- <returnvalue>0</returnvalue> for success.
- </para>
- <para>
- We grab the interrupt and thus start mouse interrupts. If the interrupt
- has been borrowed by some other driver then <function>request_irq</function>
- will fail and we will return an error. If we were capable of sharing an
- interrupt line we would specify <constant>SA_SHIRQ</constant> instead of
- <constant>zero</constant>. Provided that everyone claiming an interrupt
- sets this flag, they get to share the line. <hardware>PCI</hardware> can
- share interrupts, <hardware>ISA</hardware> normally however cannot.
- </para>
- <para>
- We do the housekeeping. We make the current mouse position the starting
- point for accumulated changes and declare that nothing has happened
- since the mouse driver was opened.
- </para>
- <para>
- The release function needs to unwind all these:
- </para>
- <programlisting>
-static int close_mouse(struct inode *inode, struct file *file)
-{
- if(--mouse_users)
- return 0;
- free_irq(OURMOUSE_IRQ, NULL);
- return 0;
-}
- </programlisting>
- <para>
- We count off a user and provided that there are still other users need
- take no further action. The last person closing the mouse causes us to
- free up the interrupt. This stops interrupts from the mouse from using
- our CPU time, and ensures that the mouse can now be unloaded.
- </para>
- <para>
- We can fill in the write handler at this point as the write function for
- our mouse simply declines to allow writes:
- </para>
-
- <programlisting>
-static ssize_t write_mouse(struct file *file, const char *buffer, size_t
- count, loff_t *ppos)
-{
- return -EINVAL;
-}
- </programlisting>
-
- <para>
- This is pretty much self-explanatory. Whenever you write you get told
- it was an invalid function.
- </para>
- <para>
- To make the poll and read functions work we have to consider how we
- handle the mouse interrupt.
- </para>
-
- <programlisting>
-static struct wait_queue *mouse_wait;
-static spinlock_t mouse_lock = SPIN_LOCK_UNLOCKED;
-
-static void ourmouse_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- char delta_x;
- char delta_y;
- unsigned char new_buttons;
-
- delta_x = inb(OURMOUSE_BASE);
- delta_y = inb(OURMOUSE_BASE+1);
- new_buttons = inb(OURMOUSE_BASE+2);
-
- if(delta_x || delta_y || new_buttons != mouse_buttons)
- {
- /* Something happened */
-
- spin_lock(&mouse_lock);
- mouse_event = 1;
- mouse_dx += delta_x;
- mouse_dy += delta_y;
- mouse_buttons = new_buttons;
- spin_unlock(&mouse_lock);
-
- wake_up_interruptible(&mouse_wait);
- }
-}
- </programlisting>
-
- <para>
- The interrupt handler reads the mouse status. The next thing we do is
- to check whether something has changed. If the mouse was smart it would
- only interrupt us if something had changed, but let's assume our mouse
- is stupid as most mice actually tend to be.
- </para>
- <para>
- If the mouse has changed we need to update the status variables. What we
- don't want is the mouse functions reading these variables to read them
- during a change. We add a spinlock that protects these variables while we
- play with them.
- </para>
- <para>
- If a change has occurred we also need to wake sleeping processes, so we
- add a wakeup call and a <structname>wait_queue</structname> to use when
- we wish to await a mouse event.
- </para>
- <para>
- Now we have the wait queue we can implement the poll function for the
- mouse relatively easily:
- </para>
-
- <programlisting>
-static unsigned int mouse_poll(struct file *file, poll_table *wait)
-{
- poll_wait(file, &mouse_wait, wait);
- if(mouse_event)
- return POLLIN | POLLRDNORM;
- return 0;
-}
- </programlisting>
-
- <para>
- This is fairly standard poll code. First we add the wait queue to the
- list of queues we want to monitor for an event. Secondly we check if an
- event has occurred. We only have one kind of event - the
- <varname>mouse_event</varname> flag tells us that something happened.
- We know that this something can only be mouse data. We return the flags
- indicating input and normal reading will succeed.
- </para>
- <para>
- You may be wondering what happens if the function returns saying 'no
- event yet'. In this case the wake up from the wait queue we added to
- the poll table will cause the function to be called again. Eventually
- we will be woken up and have an event ready. At this point the
- <function>poll</function> call will exit back to the user.
- </para>
- <para>
- After the poll completes the user will want to read the data. We now
- need to think about how our <function>mouse_read</function> function
- will work:
- </para>
- <programlisting>
-static ssize_t mouse_read(struct file *file, char *buffer,
- size_t count, loff_t *pos)
-{
- int dx, dy;
- unsigned char button;
- unsigned long flags;
- int n;
-
- if(count<3)
- return -EINVAL;
-
- /*
- * Wait for an event
- */
-
- while(!mouse_event)
- {
- if(file->f_flags&O_NDELAY)
- return -EAGAIN;
- interruptible_sleep_on(&mouse_wait);
- if(signal_pending(current))
- return -ERESTARTSYS;
- }
- </programlisting>
-
- <para>
- We start by validating that the user is reading enough data. We could
- handle partial reads if we wanted but it isn't terribly useful and the
- mouse drivers don't bother to try.
- </para>
- <para>
- Next we wait for an event to occur. The loop is fairly standard event
- waiting in Linux. Having checked that the event has not yet occurred, we
- then check if an event is pending and if not we need to sleep.
- </para>
- <para>
- A user process can set the <constant>O_NDELAY</constant> flag on a file
- to indicate that it wishes to be told immediately if no event is
- pending. We check this and give the appropriate error if so.
- </para>
- <para>
- Next we sleep until the mouse or a signal awakens us. A signal will
- awaken us as we have used <function>wakeup_interruptible</function>.
- This is important as it means a user can kill processes waiting for
- the mouse - clearly a desirable property. If we are interrupted we
- exit the call and the kernel will then process signals and maybe
- restart the call again - from the beginning.
- </para>
- <para>
- This code contains a classic Linux bug. All will be revealed later in this
- article as well as explanations for how to avoid it.
- </para>
- <programlisting>
- /* Grab the event */
-
- spinlock_irqsave(&mouse_lock, flags);
-
- dx = mouse_dx;
- dy = mouse_dy;
- button = mouse_buttons;
-
- if(dx<=-127)
- dx=-127;
- if(dx>=127)
- dx=127;
- if(dy<=-127)
- dy=-127;
- if(dy>=127)
- dy=127;
-
- mouse_dx -= dx;
- mouse_dy -= dy;
-
- if(mouse_dx == 0 && mouse_dy == 0)
- mouse_event = 0;
-
- spin_unlock_irqrestore(&mouse_lock, flags);
- </programlisting>
- <para>
- This is the next stage. Having established that there is an event
- going, we capture it. To be sure that the event is not being updated
- as we capture it we also take the spinlock and thus prevent parallel
- updates. Note here we use <function>spinlock_irqsave</function>. We
- need to disable interrupts on the local processor otherwise bad things
- will happen.
- </para>
- <para>
- What will occur is that we take the spinlock. While we hold the lock
- an interrupt will occur. At this point our interrupt handler will try
- and take the spinlock. It will sit in a loop waiting for the read
- routine to release the lock. However because we are sitting in a loop
- in the interrupt handler we will never release the lock. The machine
- hangs and the user gets upset.
- </para>
- <para>
- By blocking the interrupt on this processor we ensure that the lock
- holder will always give the lock back without deadlocking.
- </para>
- <para>
- There is a little cleverness in the reporting mechanism too. We can
- only report a move of 127 per read. We don't however want to lose
- information by throwing away further movement. Instead we keep
- returning as much information as possible. Each time we return a
- report we remove the amount from the pending movement in
- <varname>mouse_dx</varname> and <varname>mouse_dy</varname>. Eventually
- when these counts hit zero we clear the <varname>mouse_event</varname>
- flag as there is nothing else left to report.
- </para>
-
- <programlisting>
- if(put_user(button|0x80, buffer))
- return -EFAULT;
- if(put_user((char)dx, buffer+1))
- return -EFAULT;
- if(put_user((char)dy, buffer+2))
- return -EFAULT;
-
- for(n=3; n < count; n++)
- if(put_user(0x00, buffer+n))
- return -EFAULT;
-
- return count;
-}
- </programlisting>
-
- <para>
- Finally we must put the results in the user supplied buffer. We cannot
- do this while holding the lock as a write to user memory may sleep.
- For example the user memory may be residing on disk at this instant.
- Thus we did our computation beforehand and now copy the data. Each
- <function>put_user call</function> is filling in one byte of the buffer.
- If it returns an error we inform the program that it passed us an
- invalid buffer and abort.
- </para>
- <para>
- Having written the data we blank the rest of the buffer that was read
- and report the read as being successful.
- </para>
- </chapter>
-
- <chapter id="debugging">
- <title>Debugging the mouse driver</title>
-
- <para>
- We now have an almost perfectly usable mouse driver. If you were to
- actually try and use it however you would eventually find a couple of
- problems with it. A few programs will also not work with as it does not
- yet support asynchronous I/O.
- </para>
- <para>
- First let us look at the bugs. The most obvious one isn't really a driver
- bug but a failure to consider the consequences. Imagine you bumped the
- mouse hard by accident and sent it skittering across the desk. The mouse
- interrupt routine will add up all that movement and report it in steps of
- 127 until it has reported all of it. Clearly there is a point beyond
- which mouse movement isn't worth reporting. We need to add this as a
- limit to the interrupt handler:
- </para>
-
- <programlisting>
-static void ourmouse_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- char delta_x;
- char delta_y;
- unsigned char new_buttons;
-
- delta_x = inb(OURMOUSE_BASE);
- delta_y = inb(OURMOUSE_BASE+1);
- new_buttons = inb(OURMOUSE_BASE+2);
-
- if(delta_x || delta_y || new_buttons != mouse_buttons)
- {
- /* Something happened */
-
- spin_lock(&mouse_lock);
- mouse_event = 1;
- mouse_dx += delta_x;
- mouse_dy += delta_y;
-
- if(mouse_dx < -4096)
- mouse_dx = -4096;
- if(mouse_dx > 4096)
- mouse_dx = 4096;
-
- if(mouse_dy < -4096)
- mouse_dy = -4096;
- if(mouse_dy > 4096)
- mouse_dy = 4096;
-
- mouse_buttons = new_buttons;
- spin_unlock(&mouse_lock);
-
- wake_up_interruptible(&mouse_wait);
- }
-}
- </programlisting>
-
- <para>
- By adding these checks we limit the range of accumulated movement to
- something sensible.
- </para>
- <para>
- The second bug is a bit more subtle, and that is perhaps why this is
- such a common mistake. Remember, I said the waiting loop for the read
- handler had a bug in it. Think about what happens when we execute:
- </para>
-
- <programlisting>
- while(!mouse_event)
- {
- </programlisting>
-
- <para>
- and an interrupt occurs at this point here. This causes a mouse movement
- and wakes up the queue.
- </para>
-
- <programlisting>
- interruptible_sleep_on(&mouse_wait);
- </programlisting>
-
- <para>
- Now we sleep on the queue. We missed the wake up and the application
- will not see an event until the next mouse event occurs. This will
- lead to just the odd instance when a mouse button gets delayed. The
- consequences to the user will probably be almost undetectable with a
- mouse driver. With other drivers this bug could be a lot more severe.
- </para>
- <para>
- There are two ways to solve this. The first is to disable interrupts
- during the testing and the sleep. This works because when a task sleeps
- it ceases to disable interrupts, and when it resumes it disables them
- again. Our code thus becomes:
- </para>
-
- <programlisting>
- save_flags(flags);
- cli();
-
- while(!mouse_event)
- {
- if(file->f_flags&O_NDELAY)
- {
- restore_flags(flags);
- return -EAGAIN;
- }
- interruptible_sleep_on(&mouse_wait);
- if(signal_pending(current))
- {
- restore_flags(flags);
- return -ERESTARTSYS;
- }
- }
- restore_flags(flags);
- </programlisting>
-
- <para>
- This is the sledgehammer approach. It works but it means we spend a
- lot more time turning interrupts on and off. It also affects
- interrupts globally and has bad properties on multiprocessor machines
- where turning interrupts off globally is not a simple operation, but
- instead involves kicking each processor, waiting for them to disable
- interrupts and reply.
- </para>
- <para>
- The real problem is the race between the event testing and the sleeping.
- We can avoid that by using the scheduling functions more directly.
- Indeed this is the way they generally should be used for an interrupt.
- </para>
-
- <programlisting>
- struct wait_queue wait = { current, NULL };
-
- add_wait_queue(&mouse_wait, &wait);
- set_current_state(TASK_INTERRUPTIBLE);
-
- while(!mouse_event)
- {
- if(file->f_flags&O_NDELAY)
- {
- remove_wait_queue(&mouse_wait, &wait);
- set_current_state(TASK_RUNNING);
- return -EWOULDBLOCK;
- }
- if(signal_pending(current))
- {
- remove_wait_queue(&mouse_wait, &wait);
- current->state = TASK_RUNNING;
- return -ERESTARTSYS;
- }
- schedule();
- set_current_state(TASK_INTERRUPTIBLE);
- }
-
- remove_wait_wait(&mouse_wait, &wait);
- set_current_state(TASK_RUNNING);
- </programlisting>
-
- <para>
- At first sight this probably looks like deep magic. To understand how
- this works you need to understand how scheduling and events work on
- Linux. Having a good grasp of this is one of the keys to writing clean
- efficient device drivers.
- </para>
- <para>
- <function>add_wait_queue</function> does what its name suggests. It adds
- an entry to the <varname>mouse_wait</varname> list. The entry in this
- case is the entry for our current process (<varname>current</varname>
- is the current task pointer).
- </para>
- <para>
- So we start by adding an entry for ourself onto the
- <varname>mouse_wait</varname> list. This does not put us to sleep
- however. We are merely tagged onto the list.
- </para>
- <para>
- Next we set our status to <constant>TASK_INTERRUPTIBLE</constant>. Again
- this does not mean we are now asleep. This flag says what should happen
- next time the process sleeps. <constant>TASK_INTERRUPTIBLE</constant> says
- that the process should not be rescheduled. It will run from now until it
- sleeps and then will need to be woken up.
- </para>
- <para>
- The <function>wakeup_interruptible</function> call in the interrupt
- handler can now be explained in more detail. This function is also very
- simple. It goes along the list of processes on the queue it is given and
- any that are marked as <constant>TASK_INTERRUPTIBLE</constant> it changes
- to <constant>TASK_RUNNING</constant> and tells the kernel that new
- processes are runnable.
- </para>
- <para>
- Behind all the wrappers in the original code what is happening is this
- </para>
-
- <procedure>
- <step>
- <para>
- We add ourself to the mouse wait queue
- </para>
- </step>
- <step>
- <para>
- We mark ourself as sleeping
- </para>
- </step>
- <step>
- <para>
- We ask the kernel to schedule tasks again
- </para>
- </step>
- <step>
- <para>
- The kernel sees we are asleep and schedules someone else.
- </para>
- </step>
- <step>
- <para>
- The mouse interrupt sets our state to <constant>TASK_RUNNING</constant>
- and makes a note that the kernel should reschedule tasks
- </para>
- </step>
- <step>
- <para>
- The kernel sees we are running again and continues our execution
- </para>
- </step>
- </procedure>
- <para>
- This is why the apparent magic works. Because we mark ourself as
- <constant>TASK_INTERRUPTIBLE</constant> and as we add ourselves
- to the queue before we check if there are events pending, the race
- condition is removed.
- </para>
- <para>
- Now if an interrupt occurs after we check the queue status and before
- we call the <function>schedule</function> function in order to sleep,
- things work out. Instead of missing an event, we are set back to
- <constant>TASK_RUNNING</constant> by the mouse interrupt. We still call
- <function>schedule</function> but it will continue running our task.
- We go back around the loop and this time there may be an event.
- </para>
- <para>
- There will not always be an event. Thus we set ourselves back to
- <constant>TASK_INTERRUPTIBLE</constant> before resuming the loop.
- Another process doing a read may already have cleared the event flag,
- and if so we will need to go back to sleep again. Eventually we will
- get our event and escape.
- </para>
- <para>
- Finally when we exit the loop we remove ourselves from the
- <varname>mouse_wait</varname> queue as we are no longer interested
- in mouse events, and we set ourself back to
- <constant>TASK_RUNNABLE</constant> as we do not wish to go to sleep
- again just yet.
- </para>
- <note>
- <title>Note</title>
- <para>
- This isn't an easy topic. Don't be afraid to reread the description a
- few times and also look at other device drivers to see how it works.
- Finally if you can't grasp it just yet, you can use the code as
- boilerplate to write other drivers and trust me instead.
- </para>
- </note>
- </chapter>
-
- <chapter id="asyncio">
- <title>Asynchronous I/O</title>
- <para>
- This leaves the missing feature - Asynchronous I/O. Normally UNIX
- programs use the <function>poll</function> call (or its variant form
- <function>select</function>) to wait for an event to occur on one of
- multiple input or output devices. This model works well for most tasks
- but because <function>poll</function> and <function>select</function>
- wait for an event isn't suitable for tasks that are also continually
- doing computation work. Such programs really want the kernel to kick
- them when something happens rather than watch for events.
- </para>
- <para>
- Poll is akin to having a row of lights in front of you. You can see at a
- glance which ones if any are lit. You cannot however get anything useful
- done while watching them. Asynchronous I/O uses signals which work more
- like a door bell. Instead of you watching, it tells you that something
- is up.
- </para>
- <para>
- Asynchronous I/O sends the signal SIGIO to a user process when the I/O
- events occur. In this case that means when people move the mouse. The
- SIGIO signal causes the user process to jump to its signal handler and
- execute code in that handler before returning to whatever was going on
- previously. It is the application equivalent of an interrupt handler.
- </para>
- <para>
- Most of the code needed for this operation is common to all its users.
- The kernel provides a simple set of functions for managing asynchronous
- I/O.
- </para>
- <para>
- Our first job is to allow users to set asynchronous I/O on file handles.
- To do that we need to add a new function to the file operations table for
- our mouse:
- </para>
-
- <programlisting>
-struct file_operations our_mouse_fops = {
- owner: THIS_MODULE
- read: read_mouse, /* You can read a mouse */
- write: write_mouse, /* This won't do a lot */
- poll: poll_mouse, /* Poll */
- open: open_mouse, /* Called on open */
- release: close_mouse, /* Called on close */
- fasync: fasync_mouse, /* Asynchronous I/O */
-};
- </programlisting>
-
- <para>
- Once we have installed this entry the kernel knows we support
- asynchronous I/O and will allow all the relevant operations on the
- device. Whenever a user adds or removes asynchronous I/O notification
- on a file handle it calls our <function>fasync_mouse</function> routine
- we just added. This routine uses the helper functions to keep the queue
- of handles up to date:
- </para>
-
- <programlisting>
-static struct fasync_struct *mouse_fasync = NULL;
-
-static int fasync_mouse(int fd, struct file *filp, int on)
-{
- int retval = fasync_helper(fd, filp, on, &mouse_fasync);
-
- if (retval < 0)
- return retval;
- return 0;
-}
- </programlisting>
-
- <para>
- The fasync helper adds and deletes entries by managing the supplied
- list. We also need to remove entries from this list when the file is
- closed. This requires we add one line to our close function:
- </para>
-
- <programlisting>
-static int close_mouse(struct inode *inode, struct file *file)
-{
- fasync_mouse(-1, file, 0)
- if(--mouse_users)
- return 0;
- free_irq(OURMOUSE_IRQ, NULL);
- return 0;
-}
- </programlisting>
-
- <para>
- When we close the file we now call our own fasync handler as if the
- user had requested that this file cease to be used for asynchronous
- I/O. This rather neatly cleans up any loose ends. We certainly don't
- wait to deliver a signal for a file that no longer exists.
- </para>
- <para>
- At this point the mouse driver supports all the asynchronous I/O
- operations, and applications using them will not error. They won't
- however work yet. We need to actually send the signals. Again the
- kernel provides a function for handling this.
- </para>
- <para>
- We update our interrupt handler a little:
- </para>
-
- <programlisting>
-static void ourmouse_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- char delta_x;
- char delta_y;
- unsigned char new_buttons;
-
- delta_x = inb(OURMOUSE_BASE);
- delta_y = inb(OURMOUSE_BASE+1);
- new_buttons = inb(OURMOUSE_BASE+2);
-
- if(delta_x || delta_y || new_buttons != mouse_buttons)
- {
- /* Something happened */
-
- spin_lock(&mouse_lock);
- mouse_event = 1;
- mouse_dx += delta_x;
- mouse_dy += delta_y;
-
- if(mouse_dx < -4096)
- mouse_dx = -4096;
- if(mouse_dx > 4096)
- mouse_dx = 4096;
-
- if(mouse_dy < -4096)
- mouse_dy = -4096;
- if(mouse_dy > 4096)
- mouse_dy = 4096;
-
- mouse_buttons = new_buttons;
- spin_unlock(&mouse_lock);
-
- /* Now we do asynchronous I/O */
- kill_fasync(&mouse_fasync, SIGIO);
-
- wake_up_interruptible(&mouse_wait);
- }
-}
- </programlisting>
-
- <para>
- The new code simply calls the <function>kill_fasync</function> routine
- provided by the kernel if the queue is non-empty. This sends the
- required signal (SIGIO in this case) to the process each file handle
- says should be informed about the exciting new mouse movement that
- just happened.
- </para>
- <para>
- With this in place and the bugs in the original version fixed, you now
- have a fully functional mouse driver using the bus mouse protocol. It
- will work with the <application>X window system</application>, will work
- with <application>GPM</application> and should work with every other
- application you need. <application>Doom</application> is of course the
- ideal way to test your new mouse driver is functioning properly. Be sure
- to test it thoroughly.
- </para>
- </chapter>
-</book>
-
+++ /dev/null
- ===================================================================
- Release Note of Linux Driver for Moxa's C104/C168/CI-104J
- ===================================================================
-
- -------------------------------------------------------------------
- Ver. 1.1 Sep. 1, 1999
- -------------------------------------------------------------------
- 1. Improved:
- a. Static driver (kernel) and dynamic driver (loadable module)
- modes are supported.
- b. Multiple Smartio PCI series boards sharing the same IRQ
- supported.
-
- -------------------------------------------------------------------
- Ver. 1.0 Feb 17, 1997
- -------------------------------------------------------------------
- 1. Newly release.
-
+++ /dev/null
-Linux kernel developers take security very seriously. As such, we'd
-like to know when a security bug is found so that it can be fixed and
-disclosed as quickly as possible. Please report security bugs to the
-Linux kernel security team.
-
-1) Contact
-
-The Linux kernel security team can be contacted by email at
-<security@kernel.org>. This is a private list of security officers
-who will help verify the bug report and develop and release a fix.
-It is possible that the security team will bring in extra help from
-area maintainers to understand and fix the security vulnerability.
-
-As it is with any bug, the more information provided the easier it
-will be to diagnose and fix. Please review the procedure outlined in
-REPORTING-BUGS if you are unclear about what information is helpful.
-Any exploit code is very helpful and will not be released without
-consent from the reporter unless it has already been made public.
-
-2) Disclosure
-
-The goal of the Linux kernel security team is to work with the
-bug submitter to bug resolution as well as disclosure. We prefer
-to fully disclose the bug as soon as possible. It is reasonable to
-delay disclosure when the bug or the fix is not yet fully understood,
-the solution is not well-tested or for vendor coordination. However, we
-expect these delays to be short, measurable in days, not weeks or months.
-A disclosure date is negotiated by the security team working with the
-bug submitter as well as vendors. However, the kernel security team
-holds the final say when setting a disclosure date. The timeframe for
-disclosure is from immediate (esp. if it's already publically known)
-to a few weeks. As a basic default policy, we expect report date to
-disclosure date to be on the order of 7 days.
-
-3) Non-disclosure agreements
-
-The Linux kernel security team is not a formal body and therefore unable
-to enter any non-disclosure agreements.
+++ /dev/null
-Kernel Low-Level PCMCIA Interface Documentation
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-John G Dorsey <john+@cs.cmu.edu>
-Updated: 30 June, 2000
-
-
-Note: this interface has not been finalized!
-See also: http://www.cs.cmu.edu/~wearable/software/pcmcia-arm.html
-
-
-Introduction
-
-Early versions of PCMCIA Card Services for StrongARM were designed to
-permit a single socket driver to run on a variety of SA-1100 boards by
-using a userland configuration process. During the conversion to the 2.3
-kernel series, all of the configuration has moved into sub-drivers in the
-kernel proper (see linux/drivers/pcmcia/sa1100*). This document describes
-the low-level interface between those sub-drivers and the sa1100 socket
-driver module.
-
-Presently, there are six operations which must be provided by the
-board-specific code. Only functions whose implementation is likely to
-differ across board designs are required at this level. Some examples
-include:
-
- - configuring card detect lines to generate interrupts
- - sensing the legal voltage levels for inserted cards
- - asserting the reset signal for a card
-
-Functions which are assumed to be the same across all designs are
-performed within the generic socket driver itself. Some examples of these
-kinds of operations include:
-
- - configuring memory access times based on the core clock frequency
- - reads/writes on memory, byte swizzling, ...
-
-The current implementation allows the specific per-board set of low-level
-operations to be determined at run time. For each specific board, the
-following structure should be filled in:
-
- struct pcmcia_low_level {
- int (*init)(struct pcmcia_init *);
- int (*shutdown)(void);
- int (*socket_state)(struct pcmcia_state_array *);
- int (*get_irq_info)(struct pcmcia_irq_info *);
- int (*configure_socket)(const struct pcmcia_configure *);
- };
-
-The component functions are described in detail below. Using the
-machine_is_*() tests, the pointer `pcmcia_low_level' should be assigned to
-the location of the table for your board.
-
-
-0. init(struct pcmcia_init *init)
-
-This operation has three responsibilities:
-
- - perform any board-specific initialization tasks
- - associate the given handler with any interrupt-generating signals
- such as card detection, or battery voltage detection
- - set up any necessary edge detection for card ready signals
-
-Argument passing for this operation is implemented by the following
-structure:
-
- struct pcmcia_init {
- void (*handler)(int irq, void *dev, struct pt_regs *regs);
- struct pcmcia_maps *maps;
- };
-
-Here, `handler' is provided by the socket driver, and `maps' must be
-modified if the default mapping isn't appropriate. This operation should
-return one of two values:
-
- - the highest-numbered socket available, plus one
- - a negative number, indicating an error in configuration
-
-Note that the former case is _not_ the same as "the number of sockets
-available." In particular, if your design uses SA-1100 slot "one" but
-not slot "zero," you MUST report "2" to the socket driver.
-
-
-1. shutdown(void)
-
-This operation takes no arguments, and will be called during cleanup for
-the socket driver module. Any state associated with the socket controller,
-including allocated data structures, reserved IRQs, etc. should be
-released in this routine.
-
-The return value for this operation is not examined.
-
-
-2. socket_state(struct pcmcia_state_array *state_array)
-
-This operation will be invoked from the interrupt handler which was set up
-in the earlier call to init(). Note, however, that it should not include
-any side effects which would be inappropriate if the operation were to
-occur when no interrupt is pending. (An extra invocation of this operation
-currently takes place to initialize state in the socket driver.)
-
-Argument passing for this operation is handled by a structure which
-contains an array of the following type:
-
- struct pcmcia_state {
- unsigned detect: 1,
- ready: 1,
- bvd1: 1,
- bvd2: 1,
- wrprot: 1,
- vs_3v: 1,
- vs_Xv: 1;
- };
-
-Upon return from the operation, a struct pcmcia_state should be filled in
-for each socket available in the hardware. For every array element (up to
-`size' in the struct pcmcia_state_saarray) which does not correspond to an
-available socket, zero the element bits. (This includes element [0] if
-socket zero is not used.)
-
-Regardless of how the various signals are routed to the SA-1100, the bits
-in struct pcmcia_state always have the following semantics:
-
- detect - 1 if a card is fully inserted, 0 otherwise
- ready - 1 if the card ready signal is asserted, 0 otherwise
- bvd1 - the value of the Battery Voltage Detect 1 signal
- bvd2 - the value of the Battery Voltage Detect 2 signal
- wrprot - 1 if the card is write-protected, 0 otherwise
- vs_3v - 1 if the card must be operated at 3.3V, 0 otherwise
- vs_Xv - 1 if the card must be operated at X.XV, 0 otherwise
-
-A note about the BVD signals: if your board does not make both lines
-directly observable to the processor, just return reasonable values. The
-standard interpretation of the BVD signals is:
-
- BVD1 BVD2
-
- 0 x battery is dead
- 1 0 battery warning
- 1 1 battery ok
-
-Regarding the voltage sense flags (vs_3v, vs_Xv), these bits should be set
-based on a sampling of the Voltage Sense pins, if available. The standard
-interpretation of the VS signals (for a "low-voltage" socket) is:
-
- VS1 VS2
-
- 0 0 X.XV, else 3.3V, else none
- 0 1 3.3V, else none
- 1 0 X.XV, else none
- 1 1 5V, else none
-
-More information about the BVD and VS conventions is available in chapter
-5 of "PCMCIA System Architecture," 2nd ed., by Don Anderson.
-
-This operation should return 1 if an IRQ is actually pending for the
-socket controller, 0 if no IRQ is pending (but no error condition exists,
-such as an undersized state array), or -1 on any error.
-
-
-3. get_irq_info(struct pcmcia_irq_info *info)
-
-This operation obtains the IRQ assignment which is legal for the given
-socket. An argument of the following type is passed:
-
- struct pcmcia_irq_info {
- unsigned int sock;
- unsigned int irq ;
- };
-
-The `sock' field contains the socket index being queried. The `irq' field
-should contain the IRQ number corresponding to the card ready signal from
-the device.
-
-This operation should return 0 on success, or -1 on any error.
-
-
-4. configure_socket(const struct pcmcia_configure *configure)
-
-This operation allows the caller to apply power to the socket, issue a
-reset, or enable various outputs. The argument is of the following type:
-
- struct pcmcia_configure {
- unsigned sock: 8,
- vcc: 8,
- vpp: 8,
- output: 1,
- speaker: 1,
- reset: 1;
- };
-
-The `sock' field contains the index of the socket to be configured. The
-`vcc' and `vpp' fields contain the voltages to be applied for Vcc and Vpp,
-respectively, in units of 0.1V. (Note that vpp==120 indicates that
-programming voltage should be applied.)
-
-The two output enables, `output' and `speaker', refer to the card data
-signal enable and the card speaker enable, respectively. The `reset' bit,
-when set, indicates that the card reset should be asserted.
-
-This operation should return 0 on success, or -1 on any error.
-
-
-Board-Specific Notes
-
-The following information is known about various SA-11x0 board designs
-which may be used as reference while adding support to the kernel.
-
-
-Carnegie Mellon Itsy/Cue (http://www.cs.cmu.edu/~wearable/itsy/)
-
- Itsy Chip Select 3 (CS3) Interface
- ("ITSY MEMORY/PCMCIA ADD-ON BOARD with BATTERY and CHARGER CIRCUITRY,"
- memo dated 5-20-99, from Tim Manns to Richard Martin, et. al)
-
- Read:
- ABVD2 (SS)D0 A slot, Battery Voltage Detect
- ABVD1 (SS)D1
- AVSS2 (SS)D2 A slot, Voltage Sense
- AVSS1 (SS)D3
- GND (SS)D4
- GND (SS)D5
- GND (SS)D6
- GND (SS)D7
-
- BBVD2 (SS)D8 B slot, Battery Voltage Detect
- BBVD1 (SS)D9
- BVSS2 (SS)D10 B slot, Voltage Sense
- BVSS1 (SS)D11
- GND (SS)D12
- GND (SS)D13
- GND (SS)D14
- GND (SS)D15
-
- Write:
- (SS)D0 A_VPP_VCC LTC1472 VPPEN1
- (SS)D1 A_VPP_PGM LTC1472 VPPEN0
- (SS)D2 A_VCC_3 LTC1472 VCCEN0
- (SS)D3 A_VCC_5 LTC1472 VCCEN1
- (SS)D4 RESET (A SLOT)
- (SS)D5 GND
- (SS)D6 GND
- (SS)D7 GND
-
- (SS)D8 B_VPP_VCC LTC1472 VPPEN1
- (SS)D9 B_VPP_PGM LTC1472 VPPEN0
- (SS)D10 B_VCC_3 LTC1472 VCCEN0
- (SS)D11 B_VCC_5 LTC1472 VCCEN1
- (SS)D12 RESET (B SLOT)
- (SS)D13 GND
- (SS)D14 GND
- (SS)D15 GND
-
- GPIO pin assignments are as follows: (from schematics)
-
- GPIO 10 Slot 0 Card Detect
- GPIO 11 Slot 1 Card Detect
- GPIO 12 Slot 0 Ready/Interrupt
- GPIO 13 Slot 1 Ready/Interrupt
-
-
-
-Intel SA-1100 Multimedia Board (http://developer.intel.com/design/strong/)
-
- CPLD Registers
- SA-1100 Multimedia Development Board with Companion SA-1101 Development
- Board User's Guide, p.4-42
-
- This SA-1100/1101 development package uses only one GPIO pin (24) to
- signal changes in card status, and requires software to inspect a
- PCMCIA status register to determine the source.
-
- Read: (PCMCIA Power Sense Register - 0x19400000)
- S0VS1 0 Slot 0 voltage sense
- S0VS2 1
- S0BVD1 2 Slot 0 battery voltage sense
- S0BVD2 3
- S1VS1 4 Slot 1 voltage sense
- S1VS2 5
- S1BVD1 6 Slot 1 battery voltage sense
- S1BVD2 7
-
- Read/Write: (PCMCIA Power Control Register - 0x19400002)
- S0VPP0 0 Slot 0 Vpp
- S0VPP1 1
- S0VCC0 2 Slot 0 Vcc
- S0VCC1 3
- S1VPP0 4 Slot 1 Vpp
- S1VPP1 5
- S1VCC0 6 Slot 1 Vcc
- S1VCC1 7
-
- Read: (PCMCIA Status Register - 0x19400004)
- S0CD1 0 Slot 0 Card Detect 1
- S0RDY 1 Slot 0 Ready/Interrupt
- S0STSCHG 2 Slot 0 Status Change
- S0Reset 3 Slot 0 Reset (RW)
- S1CD1 4 Slot 1 Card Detect 1
- S1RDY 5 Slot 1 Ready/Interrupt
- S1STSCHG 6 Slot 1 Status Change
- S1Reset 7 Slot 1 Reset (RW)
-
-
-
-Intel SA-1100 Evaluation Platform (http://developer.intel.com/design/strong/)
-
- Brutus I/O Pins and Chipselect Register
- pcmcia-brutus.c, by Ivo Clarysse
- (What's the official reference for this info?)
-
- This SA-1100 development board uses more GPIO pins than say, the Itsy
- or the SA-1100/1101 multimedia package. The pin assignments are as
- follows:
-
- GPIO 2 Slot 0 Battery Voltage Detect 1
- GPIO 3 Slot 0 Ready/Interrupt
- GPIO 4 Slot 0 Card Detect
- GPIO 5 Slot 1 Battery Voltage Detect 1
- GPIO 6 Slot 1 Ready/Interrupt
- GPIO 7 Slot 1 Card Detect
-
- Like the Itsy, Brutus uses a chipselect register in static memory
- bank 3 for the other signals, such as voltage sense or reset:
-
- Read:
- P0_VS1 8 Slot 0 Voltage Sense
- P0_VS2 9
- P0_STSCHG 10 Slot 0 Status Change
- P1_VS1 12 Slot 1 Voltage Sense
- P1_VS2 13
- P1_STSCHG 14 Slot 1 Status Change
-
- Read/Write:
- P0_ 16 Slot 0 MAX1600EAI control line
- P0_ 17 Slot 0 MAX1600EAI control line
- P0_ 18 Slot 0 MAX1600EAI control line
- P0_ 19 Slot 0 MAX1600EAI control line
- P0_ 20 Slot 0 12V
- P0_ 21 Slot 0 Vpp to Vcc (CONFIRM?)
- P0_ 22 Slot 0 enable fan-out drivers & xcvrs
- P0_SW_RST 23 Slot 0 Reset
- P1_ 24 Slot 1 MAX1600EAI control line
- P1_ 25 Slot 1 MAX1600EAI control line
- P1_ 26 Slot 1 MAX1600EAI control line
- P1_ 27 Slot 1 MAX1600EAI control line
- P1_ 28 Slot 1 12V
- P1_ 29 Slot 1 Vpp to Vcc (CONFIRM?)
- P1_ 30 Slot 1 enable fan-out drivers & xcvrs
- P1_SW_RST 31 Slot 1 Reset
-
- For each slot, the bits labelled "MAX1600EAI" should (apparently)
- be written with the value 0101 for Vcc 3.3V, and 1001 for Vcc 5V.
-
-
-
-Intel SA-1110 Development Platform (http://developer.intel.com/design/strong/)
-
- GPIO Pin Descriptions and Board Control Register
- SA-1110 Microprocessor Development Board User's Guide, p.4-7, 4-10
-
- The Assabet board contains only a single Compact Flash slot,
- attached to slot 1 on the SA-1110. Card detect, ready, and BVD
- signals are routed through GPIO, with power and reset placed in a
- control register. Note that the CF bus must be enabled before use.
-
- GPIO 21 Slot 1 Compact Flash interrupt
- GPIO 22 Slot 1 card detect (CD1 NOR CD2)
- GPIO 24 Slot 1 Battery Voltage Detect 2
- GPIO 25 Slot 1 Battery Voltage Detect 1
-
- Write-only: (Board Control Register - 0x12000000)
- CF_PWR 0 CF bus power (3.3V)
- CF_RST 1 CF reset
- CF_Bus_On 7 CF bus enable
-
+++ /dev/null
-
-Board Overview
------------------------------
-
-This is an beta release of the Xscale Linux port to the ADI 80200EVB
-evaluation board.
-
-The 80200EVB is an evaluation platform for ADI Engineering's high-performance
-80200FCC chipset for the Intel 80200 XScale CPU. The 80200FCC is an open
-source FPGA based system that contains a PCI unit and a high performance
-memory controller.
-
-In addition to the 80200FCC, the board also contains a 16C550 UART, and 4MB
-of flash.
-
-The board is still under development and currently only the UART is functional
-as the PCI bits have not been programmed into the FPGA.
-
-For more information on the board, see http://www.adiengineering.com
-
-Port Status
------------------------------
-
-Supported:
-
-- Onboard UART (Polled operation only)
-- Cache/TLB locking on 80200 CPU
-
-TODO:
-
-- PCI when hardware supports it
-
-Building the Kernel
------------------------------
-change Linux makefile
-make adi_evb_config
-make oldconfig
-make zImage
-
-Loading Linux
------------------------------
-
-Before you can use Linux on the ADI board, you need to grab the following:
-
-ADI 80200EVB Monitor:
- ftp://source.mvista.com/pub/xscale/ADI_EVB/monitor.srec
-
-ADI JFFS2 Image:
- ftp://source.mvista.com/pub/xscale/ADI_EVB/adi.jffs2
-
-Once you've got the Cygnus prompt, type in the following command:
-
- load
-
-On another terminal window:
-
- cat monitor.srec > /dev/ttyS0
-
-(replace ttyS0 with the serial port you are using)
-
-Once completed, just type 'go' at the cygmon prompt and you should see:
-
- MontaVista IQ80310 Monitor Version 0.1
- monitor>
-
-Type 'b 115200' at the prompt and change your terminal speed to 115200
-
-The first thing to do is to upload and burn the jffs2 filesystem image
-onto the boards 4MB of flash:
-
- monitor> u c1000000
- Uploading file at 0xc1000000
- Now send file with ymodem
-
-Do as the monitor says and transfer the file adi.jffs2. Once complete,
-the following will copy the jffs2 image to location 0x80000 in the flash.
-
- monitor> f 8000 c1000000 200000
- Erasing sector 0x00080000
- Writing sector 0x00080000 with data at 0xC1000000
- Erasing sector 0x000A0000
- Writing sector 0x000A0000 with data at 0xC1020000
- Erasing sector 0x000C0000
- ...
-
-Now use the same command as above to upload your zImage to location c1000000.
-When you've done that, type 'j c1000000' to run Linux. Login as
-root and you're all set to go.
-
-Misc Notes
------------------------------
-
-The current version of the HW does not have an onboard timer, so the 80200
-PMU is not available for general use as it is being used for a timer source.
-
-By default, the MTD driver reserves the first 512K for bootloaders and
-the remaining 3.5MB for the filesystem. You can edit drivers/mtd/map/adi_evb.c
-to change this as needed for your application.
-
-Contributors
------------------------------
-
-Thanks to ADI Engineering for providing the hardware for development
-
-Deepak Saxena <dsaxena@mvista.com> - Initial port
-
------------------------------
-Enjoy. If you have any problem please contact Deepak Saxena
-dsaxena@mvista.com
-
+++ /dev/null
-
-Board Overview
------------------------------
-
-The Cyclone IQ80310 board is an evaluation platform for Intel's 80200 Xscale
-CPU and 80312 Intelligent I/O chipset (collectively called IOP310 chipset).
-
-The 80312 contains dual PCI hoses (called the ATUs), a PCI-to-PCI bridge,
-three DMA channels (1 on secondary PCI, one on primary PCI ), I2C, I2O
-messaging unit, XOR unit for RAID operations, a bus performance monitoring
-unit, and a memory controller with ECC features.
-
-For more information on the board, see http://developer.intel.com/iio
-
-Port Status
------------------------------
-
-Supported:
-
-- MTD/JFFS/JFFS2
-- NFS root
-- RAMDISK root
-- 2ndary PCI slots
-- Onboard ethernet
-- Serial ports (ttyS0/S1)
-- Cache/TLB locking on 80200 CPU
-- Performance monitoring unit on 80200 CPU
-- 80200 Performance Monitoring Unit
-- Acting as a system controller on Cyclone 80303BP PCI backplane
-- DMA engines (EXPERIMENTAL)
-- 80312 Bus Performance Monitor (EXPERIMENTAL)
-- Application Accelerator Unit (XOR engine for RAID) (EXPERIMENTAL)
-- Messaging Unit (EXPERIMENTAL)
-
-TODO:
-- I2C
-
-Building the Kernel
------------------------------
-make iq80310_config
-make oldconfig
-make zImage
-
-This will build an image setup for BOOTP/NFS root support. To change this,
-just run make menuconfig and disable nfs root or add a "root=" option.
-
-Preparing the Hardware
------------------------------
-
-This document assumes you're using a Rev D or newer board running
-Redboot as the bootloader. Note that the version of RedBoot provided
-with the boards has a major issue and you need to replace it with the
-latest RedBoot. You can grab the source from the ECOS CVS or you can
-get a prebuilt image and burn it in using FRU at:
-
- ftp://source.mvista.com/pub/xscale/iq80310/redboot.bin
-
-Make sure you do an 'fis init' command once you boot with the new
-RedBoot image.
-
-
-
-Downloading Linux
------------------------------
-
-Assuming you have your development system setup to act as a bootp/dhcp
-server and running tftp:
-
- RedBoot> load -r -b 0xa1008000 /tftpboot/zImage.xs
- Raw file loaded 0xa1008000-0xa1094bd8
-
-If you're not using dhcp/tftp, you can use y-modem instead:
-
- RedBoot> load -r -b 0xa1008000 -m y
-
-Note that on Rev D. of the board, tftp does not work due to intermittent
-interrupt issues, so you need to download using ymodem.
-
-Once the download is completed:
-
- RedBoot> go 0xa1008000
-
-Root Devices
------------------------------
-
-A kernel is not useful without a root filesystem, and you have several
-choices with this board: NFS root, RAMDISK, or JFFS/JFFS2. For development
-purposes, it is suggested that you use NFS root for easy access to various
-tools. Once you're ready to deploy, probably want to utilize JFFS/JFFS2 on
-the flash device.
-
-MTD on the IQ80310
------------------------------
-
-Linux on the IQ80310 supports RedBoot FIS paritioning if it is enabled.
-Out of the box, once you've done 'fis init' on RedBoot, you will get
-the following partitioning scheme:
-
- root@192.168.0.14:~# cat /proc/mtd
- dev: size erasesize name
- mtd0: 00040000 00020000 "RedBoot"
- mtd1: 00040000 00020000 "RedBoot[backup]"
- mtd2: 0075f000 00020000 "unallocated space"
- mtd3: 00001000 00020000 "RedBoot config"
- mtd4: 00020000 00020000 "FIS directory"
-
-To create an FIS directory, you need to use the fis command in RedBoot.
-As an example, you can burn the kernel into the flash once it's downloaded:
-
- RedBoot> fis create -b 0xa1008000 -l 0x8CBAC -r 0xa1008000 -f 0x80000 kernel
- ... Erase from 0x00080000-0x00120000: .....
- ... Program from 0xa1008000-0xa1094bac at 0x00080000: .....
- ... Unlock from 0x007e0000-0x00800000: .
- ... Erase from 0x007e0000-0x00800000: .
- ... Program from 0xa1fdf000-0xa1fff000 at 0x007e0000: .
- ... Lock from 0x007e0000-0x00800000: .
-
- RedBoot> fis list
- Name FLASH addr Mem addr Length Entry point
- RedBoot 0x00000000 0x00000000 0x00040000 0x00000000
- RedBoot[backup] 0x00040000 0x00040000 0x00040000 0x00000000
- RedBoot config 0x007DF000 0x007DF000 0x00001000 0x00000000
- FIS directory 0x007E0000 0x007E0000 0x00020000 0x00000000
- kernel 0x00080000 0xA1008000 0x000A0000 0x00000000
-
-This leads to the following Linux MTD setup:
-
- mtroot@192.168.0.14:~# cat /proc/mtd
- dev: size erasesize name
- mtd0: 00040000 00020000 "RedBoot"
- mtd1: 00040000 00020000 "RedBoot[backup]"
- mtd2: 000a0000 00020000 "kernel"
- mtd3: 006bf000 00020000 "unallocated space"
- mtd4: 00001000 00020000 "RedBoot config"
- mtd5: 00020000 00020000 "FIS directory"
-
-Note that there is not a 1:1 mapping to the number of RedBoot paritions to
-MTD partitions as unused space also gets allocated into MTD partitions.
-
-As an aside, the -r option when creating the Kernel entry allows you to
-simply do an 'fis load kernel' to copy the image from flash into memory.
-You can then do an 'fis go 0xa1008000' to start Linux.
-
-If you choose to use static partitioning instead of the RedBoot partioning:
-
- /dev/mtd0 0x00000000 - 0x0007ffff: Boot Monitor (512k)
- /dev/mtd1 0x00080000 - 0x0011ffff: Kernel Image (640K)
- /dev/mtd2 0x00120000 - 0x0071ffff: File System (6M)
- /dev/mtd3 0x00720000 - 0x00800000: RedBoot Reserved (896K)
-
-To use a JFFS1/2 root FS, you need to donwload the JFFS image using either
-tftp or ymodem, and then copy it to flash:
-
- RedBoot> load -r -b 0xa1000000 /tftpboot/jffs.img
- Raw file loaded 0xa1000000-0xa1600000
- RedBoot> fis create -b 0xa1000000 -l 0x600000 -f 0x120000 jffs
- ... Erase from 0x00120000-0x00720000: ..................................
- ... Program from 0xa1000000-0xa1600000 at 0x00120000: ..................
- ......................
- ... Unlock from 0x007e0000-0x00800000: .
- ... Erase from 0x007e0000-0x00800000: .
- ... Program from 0xa1fdf000-0xa1fff000 at 0x007e0000: .
- ... Lock from 0x007e0000-0x00800000: .
- RedBoot> fis list
- Name FLASH addr Mem addr Length Entry point
- RedBoot 0x00000000 0x00000000 0x00040000 0x00000000
- RedBoot[backup] 0x00040000 0x00040000 0x00040000 0x00000000
- RedBoot config 0x007DF000 0x007DF000 0x00001000 0x00000000
- FIS directory 0x007E0000 0x007E0000 0x00020000 0x00000000
- kernel 0x00080000 0xA1008000 0x000A0000 0xA1008000
- jffs 0x00120000 0x00120000 0x00600000 0x00000000
-
-This looks like this in Linux:
-
- root@192.168.0.14:~# cat /proc/mtd
- dev: size erasesize name
- mtd0: 00040000 00020000 "RedBoot"
- mtd1: 00040000 00020000 "RedBoot[backup]"
- mtd2: 000a0000 00020000 "kernel"
- mtd3: 00600000 00020000 "jffs"
- mtd4: 000bf000 00020000 "unallocated space"
- mtd5: 00001000 00020000 "RedBoot config"
- mtd6: 00020000 00020000 "FIS directory"
-
-You need to boot the kernel once and watch the boot messages to see how the
-JFFS RedBoot partition mapped into the MTD partition scheme.
-
-You can grab a pre-built JFFS image to use as a root file system at:
-
- ftp://source.mvista.com/pub/xscale/iq80310/jffs.img
-
-For detailed info on using MTD and creating a JFFS image go to:
-
- http://www.linux-mtd.infradead.org.
-
-For details on using RedBoot's FIS commands, type 'fis help' or consult
-your RedBoot manual.
-
-Contributors
------------------------------
-
-Thanks to Intel Corporation for providing the hardware.
-
-John Clark <jclark@teamasa.com> - Initial discovery of RedBoot issues
-Dave Jiang <dave.jiang@intel.com> - IRQ demux fixes, AAU, DMA, MU
-Nicolas Pitre <nico@cam.org> - Initial port, cleanup, debugging
-Matt Porter <mporter@mvista.com> - PCI subsystem development, debugging
-Tim Sanders <tsanders@sanders.org> - Initial PCI code
-Mark Salter <msalter@redhat.com> - RedBoot fixes
-Deepak Saxena <dsaxena@mvista.com> - Cleanup, debug, cache lock, PMU
-
------------------------------
-Enjoy.
-
-If you have any problems please contact Deepak Saxena <dsaxena@mvista.com>
-
-A few notes from rmk
------------------------------
-
-These are notes of my initial experience getting the IQ80310 Rev D up and
-running. In total, it has taken many hours to work out what's going on...
-The version of redboot used is:
-
- RedBoot(tm) bootstrap and debug environment, version UNKNOWN - built 14:58:21, Aug 15 2001
-
-
-1. I've had a corrupted download of the redboot.bin file from Montavista's
- FTP site. It would be a good idea if there were md5sums, sum or gpg
- signatures available to ensure the integrity of the downloaded files.
- The result of this was an apparantly 100% dead card.
-
-2. RedBoot Intel EtherExpress Pro 100 driver seems to be very unstable -
- I've had it take out the whole of a 100mbit network for several minutes.
- The Hub indiates ZERO activity, despite machines attempting to communicate.
- Further to this, while tftping the kernel, the transfer will stall regularly,
- and might even drop the link LED.
-
-3. There appears to be a bug in the Intel Documentation Pack that comes with
- the IQ80310 board. Serial port 1, which is the socket next to the LEDs
- is address 0xfe810000, not 0xfe800000.
-
- Note that RedBoot uses either serial port 1 OR serial port 2, so if you
- have your console connected to the wrong port, you'll see redboot messages
- but not kernel boot messages.
-
-4. Trying to use fconfig to setup a boot script fails - it hangs when trying
- to erase the flash.
+++ /dev/null
-
-Board Overview
------------------------------
-
-The Worcester IQ80321 board is an evaluation platform for Intel's 80321 Xscale
-CPU (sometimes called IOP321 chipset).
-
-The 80321 contains a single PCI hose (called the ATUs), a PCI-to-PCI bridge,
-two DMA channels, I2C, I2O messaging unit, XOR unit for RAID operations,
-a bus performance monitoring unit, and a memory controller with ECC features.
-
-For more information on the board, see http://developer.intel.com/iio
-
-Port Status
------------------------------
-
-Supported:
-
-- MTD/JFFS/JFFS2 root
-- NFS root
-- RAMDISK root
-- Serial port (ttyS0)
-- Cache/TLB locking on 80321 CPU
-- Performance monitoring unit on 80321 CPU
-
-TODO:
-
-- DMA engines
-- I2C
-- 80321 Bus Performance Monitor
-- Application Accelerator Unit (XOR engine for RAID)
-- I2O Messaging Unit
-- I2C unit
-- SSP
-
-Building the Kernel
------------------------------
-make iq80321_config
-make oldconfig
-make zImage
-
-This will build an image setup for BOOTP/NFS root support. To change this,
-just run make menuconfig and disable nfs root or add a "root=" option.
-
-Preparing the Hardware
------------------------------
-
-Make sure you do an 'fis init' command once you boot with the new
-RedBoot image.
-
-Downloading Linux
------------------------------
-
-Assuming you have your development system setup to act as a bootp/dhcp
-server and running tftp:
-
-NOTE: The 80321 board uses a different default memory map than the 80310.
-
- RedBoot> load -r -b 0x01008000 -m y
-
-Once the download is completed:
-
- RedBoot> go 0x01008000
-
-There is a version of RedBoot floating around that has DHCP support, but
-I've never been able to cleanly transfer a kernel image and have it run.
-
-Root Devices
------------------------------
-
-A kernel is not useful without a root filesystem, and you have several
-choices with this board: NFS root, RAMDISK, or JFFS/JFFS2. For development
-purposes, it is suggested that you use NFS root for easy access to various
-tools. Once you're ready to deploy, probably want to utilize JFFS/JFFS2 on
-the flash device.
-
-MTD on the IQ80321
------------------------------
-
-Linux on the IQ80321 supports RedBoot FIS paritioning if it is enabled.
-Out of the box, once you've done 'fis init' on RedBoot, you will get
-the following partitioning scheme:
-
- root@192.168.0.14:~# cat /proc/mtd
- dev: size erasesize name
- mtd0: 00040000 00020000 "RedBoot"
- mtd1: 00040000 00020000 "RedBoot[backup]"
- mtd2: 0075f000 00020000 "unallocated space"
- mtd3: 00001000 00020000 "RedBoot config"
- mtd4: 00020000 00020000 "FIS directory"
-
-To create an FIS directory, you need to use the fis command in RedBoot.
-As an example, you can burn the kernel into the flash once it's downloaded:
-
- RedBoot> fis create -b 0x01008000 -l 0x8CBAC -r 0x01008000 -f 0x80000 kernel
- ... Erase from 0x00080000-0x00120000: .....
- ... Program from 0x01008000-0x01094bac at 0x00080000: .....
- ... Unlock from 0x007e0000-0x00800000: .
- ... Erase from 0x007e0000-0x00800000: .
- ... Program from 0x01fdf000-0x01fff000 at 0x007e0000: .
- ... Lock from 0x007e0000-0x00800000: .
-
- RedBoot> fis list
- Name FLASH addr Mem addr Length Entry point
- RedBoot 0x00000000 0x00000000 0x00040000 0x00000000
- RedBoot[backup] 0x00040000 0x00040000 0x00040000 0x00000000
- RedBoot config 0x007DF000 0x007DF000 0x00001000 0x00000000
- FIS directory 0x007E0000 0x007E0000 0x00020000 0x00000000
- kernel 0x00080000 0x01008000 0x000A0000 0x00000000
-
-This leads to the following Linux MTD setup:
-
- mtroot@192.168.0.14:~# cat /proc/mtd
- dev: size erasesize name
- mtd0: 00040000 00020000 "RedBoot"
- mtd1: 00040000 00020000 "RedBoot[backup]"
- mtd2: 000a0000 00020000 "kernel"
- mtd3: 006bf000 00020000 "unallocated space"
- mtd4: 00001000 00020000 "RedBoot config"
- mtd5: 00020000 00020000 "FIS directory"
-
-Note that there is not a 1:1 mapping to the number of RedBoot paritions to
-MTD partitions as unused space also gets allocated into MTD partitions.
-
-As an aside, the -r option when creating the Kernel entry allows you to
-simply do an 'fis load kernel' to copy the image from flash into memory.
-You can then do an 'fis go 0x01008000' to start Linux.
-
-If you choose to use static partitioning instead of the RedBoot partioning:
-
- /dev/mtd0 0x00000000 - 0x0007ffff: Boot Monitor (512k)
- /dev/mtd1 0x00080000 - 0x0011ffff: Kernel Image (640K)
- /dev/mtd2 0x00120000 - 0x0071ffff: File System (6M)
- /dev/mtd3 0x00720000 - 0x00800000: RedBoot Reserved (896K)
-
-To use a JFFS1/2 root FS, you need to donwload the JFFS image using either
-tftp or ymodem, and then copy it to flash:
-
- RedBoot> load -r -b 0x01000000 /tftpboot/jffs.img
- Raw file loaded 0x01000000-0x01600000
- RedBoot> fis create -b 0x01000000 -l 0x600000 -f 0x120000 jffs
- ... Erase from 0x00120000-0x00720000: ..................................
- ... Program from 0x01000000-0x01600000 at 0x00120000: ..................
- ......................
- ... Unlock from 0x007e0000-0x00800000: .
- ... Erase from 0x007e0000-0x00800000: .
- ... Program from 0x01fdf000-0x01fff000 at 0x007e0000: .
- ... Lock from 0x007e0000-0x00800000: .
- RedBoot> fis list
- Name FLASH addr Mem addr Length Entry point
- RedBoot 0x00000000 0x00000000 0x00040000 0x00000000
- RedBoot[backup] 0x00040000 0x00040000 0x00040000 0x00000000
- RedBoot config 0x007DF000 0x007DF000 0x00001000 0x00000000
- FIS directory 0x007E0000 0x007E0000 0x00020000 0x00000000
- kernel 0x00080000 0x01008000 0x000A0000 0x01008000
- jffs 0x00120000 0x00120000 0x00600000 0x00000000
-
-This looks like this in Linux:
-
- root@192.168.0.14:~# cat /proc/mtd
- dev: size erasesize name
- mtd0: 00040000 00020000 "RedBoot"
- mtd1: 00040000 00020000 "RedBoot[backup]"
- mtd2: 000a0000 00020000 "kernel"
- mtd3: 00600000 00020000 "jffs"
- mtd4: 000bf000 00020000 "unallocated space"
- mtd5: 00001000 00020000 "RedBoot config"
- mtd6: 00020000 00020000 "FIS directory"
-
-You need to boot the kernel once and watch the boot messages to see how the
-JFFS RedBoot partition mapped into the MTD partition scheme.
-
-You can grab a pre-built JFFS image to use as a root file system at:
-
- ftp://source.mvista.com/pub/xscale/iq80310/jffs.img
-
-For detailed info on using MTD and creating a JFFS image go to:
-
- http://www.linux-mtd.infradead.org.
-
-For details on using RedBoot's FIS commands, type 'fis help' or consult
-your RedBoot manual.
-
-BUGS and ISSUES
------------------------------
-
-* As shipped from Intel, pre-production boards have two issues:
-
-- The on board ethernet is disabled S8E1-2 is off. You will need to turn it on.
-
-- The PCIXCAPs are configured for a 100Mhz clock, but the clock selected is
- actually only 66Mhz. This causes the wrong PPL multiplier to be used and the
- board only runs at 400Mhz instead of 600Mhz. The way to observe this is to
- use a independent clock to time a "sleep 10" command from the prompt. If it
- takes 15 seconds instead of 10, you are running at 400Mhz.
-
-- The experimental IOP310 drivers for the AAU, DMA, etc. are not supported yet.
-
-Contributors
------------------------------
-The port to the IQ80321 was performed by:
-
-Rory Bolt <rorybolt@pacbell.net> - Initial port, debugging.
-
-This port was based on the IQ80310 port with the following contributors:
-
-Nicolas Pitre <nico@cam.org> - Initial port, cleanup, debugging
-Matt Porter <mporter@mvista.com> - PCI subsystem development, debugging
-Tim Sanders <tsanders@sanders.org> - Initial PCI code
-Deepak Saxena <dsaxena@mvista.com> - Cleanup, debug, cache lock, PMU
-
-The port is currently maintained by Deepak Saxena <dsaxena@mvista.com>
-
------------------------------
-Enjoy.
+++ /dev/null
-Support functions for the Intel 80310 AAU
-===========================================
-
-Dave Jiang <dave.jiang@intel.com>
-Last updated: 09/18/2001
-
-The Intel 80312 companion chip in the 80310 chipset contains an AAU. The
-AAU is capable of processing up to 8 data block sources and perform XOR
-operations on them. This unit is typically used to accelerated XOR
-operations utilized by RAID storage device drivers such as RAID 5. This
-API is designed to provide a set of functions to take adventage of the
-AAU. The AAU can also be used to transfer data blocks and used as a memory
-copier. The AAU transfer the memory faster than the operation performed by
-using CPU copy therefore it is recommended to use the AAU for memory copy.
-
-------------------
-int aau_request(u32 *aau_context, const char *device_id);
-This function allows the user the acquire the control of the the AAU. The
-function will return a context of AAU to the user and allocate
-an interrupt for the AAU. The user must pass the context as a parameter to
-various AAU API calls.
-
-int aau_queue_buffer(u32 aau_context, aau_head_t *listhead);
-This function starts the AAU operation. The user must create a SGL
-header with a SGL attached. The format is presented below. The SGL is
-built from kernel memory.
-
-/* hardware descriptor */
-typedef struct _aau_desc
-{
- u32 NDA; /* next descriptor address [READONLY] */
- u32 SAR[AAU_SAR_GROUP]; /* src addrs */
- u32 DAR; /* destination addr */
- u32 BC; /* byte count */
- u32 DC; /* descriptor control */
- u32 SARE[AAU_SAR_GROUP]; /* extended src addrs */
-} aau_desc_t;
-
-/* user SGL format */
-typedef struct _aau_sgl
-{
- aau_desc_t aau_desc; /* AAU HW Desc */
- u32 status; /* status of SGL [READONLY] */
- struct _aau_sgl *next; /* pointer to next SG [READONLY] */
- void *dest; /* destination addr */
- void *src[AAU_SAR_GROUP]; /* source addr[4] */
- void *ext_src[AAU_SAR_GROUP]; /* ext src addr[4] */
- u32 total_src; /* total number of source */
-} aau_sgl_t;
-
-/* header for user SGL */
-typedef struct _aau_head
-{
- u32 total; /* total descriptors allocated */
- u32 status; /* SGL status */
- aau_sgl_t *list; /* ptr to head of list */
- aau_callback_t callback; /* callback func ptr */
-} aau_head_t;
-
-
-The function will call aau_start() and start the AAU after it queues
-the SGL to the processing queue. When the function will either
-a. Sleep on the wait queue aau->wait_q if no callback has been provided, or
-b. Continue and then call the provided callback function when DMA interrupt
- has been triggered.
-
-int aau_suspend(u32 aau_context);
-Stops/Suspends the AAU operation
-
-int aau_free(u32 aau_context);
-Frees the ownership of AAU. Called when no longer need AAU service.
-
-aau_sgl_t * aau_get_buffer(u32 aau_context, int num_buf);
-This function obtains an AAU SGL for the user. User must specify the number
-of descriptors to be allocated in the chain that is returned.
-
-void aau_return_buffer(u32 aau_context, aau_sgl_t *list);
-This function returns all SGL back to the API after user is done.
-
-int aau_memcpy(void *dest, void *src, u32 size);
-This function is a short cut for user to do memory copy utilizing the AAU for
-better large block memory copy vs using the CPU. This is similar to using
-typical memcpy() call.
-
-* User is responsible for the source address(es) and the destination address.
- The source and destination should all be cached memory.
-
-
-
-void aau_test()
-{
- u32 aau;
- char dev_id[] = "AAU";
- int size = 2;
- int err = 0;
- aau_head_t *head;
- aau_sgl_t *list;
- u32 i;
- u32 result = 0;
- void *src, *dest;
-
- printk("Starting AAU test\n");
- if((err = aau_request(&aau, dev_id))<0)
- {
- printk("test - AAU request failed: %d\n", err);
- return;
- }
- else
- {
- printk("test - AAU request successful\n");
- }
-
- head = kmalloc(sizeof(aau_head_t), GFP_KERNEL);
- head->total = size;
- head->status = 0;
- head->callback = NULL;
-
- list = aau_get_buffer(aau, size);
- if(!list)
- {
- printk("Can't get buffers\n");
- return;
- }
- head->list = list;
-
- src = kmalloc(1024, GFP_KERNEL);
- dest = kmalloc(1024, GFP_KERNEL);
-
- while(list)
- {
- list->status = 0;
- list->aau_desc->SAR[0] = (u32)src;
- list->aau_desc->DAR = (u32)dest;
- list->aau_desc->BC = 1024;
-
- /* see iop310-aau.h for more DCR commands */
- list->aau_desc->DC = AAU_DCR_WRITE | AAU_DCR_BLKCTRL_1_DF;
- if(!list->next)
- {
- list->aau_desc->DC = AAU_DCR_IE;
- break;
- }
- list = list->next;
- }
-
- printk("test- Queueing buffer for AAU operation\n");
- err = aau_queue_buffer(aau, head);
- if(err >= 0)
- {
- printk("AAU Queue Buffer is done...\n");
- }
- else
- {
- printk("AAU Queue Buffer failed...: %d\n", err);
- }
-
-
-
-#if 1
- printk("freeing the AAU\n");
- aau_return_buffer(aau, head->list);
- aau_free(aau);
- kfree(src);
- kfree(dest);
- kfree((void *)head);
-#endif
-}
-
-All Disclaimers apply. Use this at your own discretion. Neither Intel nor I
-will be responsible if anything goes wrong. =)
-
-
-TODO
-____
-* Testing
-* Do zero-size AAU transfer/channel at init
- so all we have to do is chainining
-
+++ /dev/null
-Support functions forthe Intel 80310 DMA channels
-==================================================
-
-Dave Jiang <dave.jiang@intel.com>
-Last updated: 09/18/2001
-
-The Intel 80310 XScale chipset provides 3 DMA channels via the 80312 I/O
-companion chip. Two of them resides on the primary PCI bus and one on the
-secondary PCI bus.
-
-The DMA API provided is not compatible with the generic interface in the
-ARM tree unfortunately due to how the 80312 DMACs work. Hopefully some time
-in the near future a software interface can be done to bridge the differences.
-The DMA API has been modeled after Nicholas Pitre's SA11x0 DMA API therefore
-they will look somewhat similar.
-
-
-80310 DMA API
--------------
-
-int dma_request(dmach_t channel, const char *device_id);
-
-This function will attempt to allocate the channel depending on what the
-user requests:
-
-IOP310_DMA_P0: PCI Primary 1
-IOP310_DMA_P1: PCI Primary 2
-IOP310_DMA_S0: PCI Secondary 1
-/*EOF*/
-
-Once the user allocates the DMA channel it is owned until released. Although
-other users can also use the same DMA channel, but no new resources will be
-allocated. The function will return the allocated channel number if successful.
-
-int dma_queue_buffer(dmach_t channel, dma_sghead_t *listhead);
-
-The user will construct a SGL in the form of below:
-/*
- * Scattered Gather DMA List for user
- */
-typedef struct _dma_desc
-{
- u32 NDAR; /* next descriptor adress [READONLY] */
- u32 PDAR; /* PCI address */
- u32 PUADR; /* upper PCI address */
- u32 LADR; /* local address */
- u32 BC; /* byte count */
- u32 DC; /* descriptor control */
-} dma_desc_t;
-
-typedef struct _dma_sgl
-{
- dma_desc_t dma_desc; /* DMA descriptor */
- u32 status; /* descriptor status [READONLY] */
- u32 data; /* user defined data */
- struct _dma_sgl *next; /* next descriptor [READONLY] */
-} dma_sgl_t;
-
-/* dma sgl head */
-typedef struct _dma_head
-{
- u32 total; /* total elements in SGL */
- u32 status; /* status of sgl */
- u32 mode; /* read or write mode */
- dma_sgl_t *list; /* pointer to list */
- dma_callback_t callback; /* callback function */
-} dma_head_t;
-
-
-The user shall allocate user SGL elements by calling the function:
-dma_get_buffer(). This function will give the user an SGL element. The user
-is responsible for creating the SGL head however. The user is also
-responsible for allocating the memory for DMA data. The following code segment
-shows how a DMA operation can be performed:
-
-#include <asm/arch/iop310-dma.h>
-
-void dma_test(void)
-{
- char dev_id[] = "Primary 0";
- dma_head_t *sgl_head = NULL;
- dma_sgl_t *sgl = NULL;
- int err = 0;
- int channel = -1;
- u32 *test_ptr = 0;
- DECLARE_WAIT_QUEUE_HEAD(wait_q);
-
-
- *(IOP310_ATUCR) = (IOP310_ATUCR_PRIM_OUT_ENAB |
- IOP310_ATUCR_DIR_ADDR_ENAB);
-
- channel = dma_request(IOP310_DMA_P0, dev_id);
-
- sgl_head = (dma_head_t *)kmalloc(sizeof(dma_head_t), GFP_KERNEL);
- sgl_head->callback = NULL; /* no callback created */
- sgl_head->total = 2; /* allocating 2 DMA descriptors */
- sgl_head->mode = (DMA_MOD_WRITE);
- sgl_head->status = 0;
-
- /* now we get the two descriptors */
- sgl = dma_get_buffer(channel, 2);
-
- /* we set the header to point to the list we allocated */
- sgl_head->list = sgl;
-
- /* allocate 1k of DMA data */
- sgl->data = (u32)kmalloc(1024, GFP_KERNEL);
-
- /* Local address is physical */
- sgl->dma_desc.LADR = (u32)virt_to_phys(sgl->data);
-
- /* write to arbitrary location over the PCI bus */
- sgl->dma_desc.PDAR = 0x00600000;
- sgl->dma_desc.PUADR = 0;
- sgl->dma_desc.BC = 1024;
-
- /* set write & invalidate PCI command */
- sgl->dma_desc.DC = DMA_DCR_PCI_MWI;
- sgl->status = 0;
-
- /* set a pattern */
- memset(sgl->data, 0xFF, 1024);
-
- /* User's responsibility to keep buffers cached coherent */
- cpu_dcache_clean(sgl->data, sgl->data + 1024);
-
- sgl = sgl->next;
-
- sgl->data = (u32)kmalloc(1024, GFP_KERNEL);
- sgl->dma_desc.LADR = (u32)virt_to_phys(sgl->data);
- sgl->dma_desc.PDAR = 0x00610000;
- sgl->dma_desc.PUADR = 0;
- sgl->dma_desc.BC = 1024;
-
- /* second descriptor has interrupt flag enabled */
- sgl->dma_desc.DC = (DMA_DCR_PCI_MWI | DMA_DCR_IE);
-
- /* must set end of chain flag */
- sgl->status = DMA_END_CHAIN; /* DO NOT FORGET THIS!!!! */
-
- memset(sgl->data, 0x0f, 1024);
- /* User's responsibility to keep buffers cached coherent */
- cpu_dcache_clean(sgl->data, sgl->data + 1024);
-
- /* queuing the buffer, this function will sleep since no callback */
- err = dma_queue_buffer(channel, sgl_head);
-
- /* now we are woken from DMA complete */
-
- /* do data operations here */
-
- /* free DMA data if necessary */
-
- /* return the descriptors */
- dma_return_buffer(channel, sgl_head->list);
-
- /* free the DMA */
- dma_free(channel);
-
- kfree((void *)sgl_head);
-}
-
-
-dma_sgl_t * dma_get_buffer(dmach_t channel, int buf_num);
-
-This call allocates DMA descriptors for the user.
-
-
-void dma_return_buffer(dmach_t channel, dma_sgl_t *list);
-
-This call returns the allocated descriptors back to the API.
-
-
-int dma_suspend(dmach_t channel);
-
-This call suspends any DMA transfer on the given channel.
-
-
-
-int dma_resume(dmach_t channel);
-
-This call resumes a DMA transfer which would have been stopped through
-dma_suspend().
-
-
-int dma_flush_all(dmach_t channel);
-
-This completely flushes all queued buffers and on-going DMA transfers on a
-given channel. This is called when DMA channel errors have occurred.
-
-
-void dma_free(dmach_t channel);
-
-This clears all activities on a given DMA channel and releases it for future
-requests.
-
-
-
-Buffer Allocation
------------------
-It is the user's responsibility to allocate, free, and keep track of the
-allocated DMA data memory. Upon calling dma_queue_buffer() the user must
-relinquish the control of the buffers to the kernel and not change the
-state of the buffers that it has passed to the kernel. The user will regain
-the control of the buffers when it has been woken up by the bottom half of
-the DMA interrupt handler. The user can allocate cached buffers or non-cached
-via pci_alloc_consistent(). It is the user's responsibility to ensure that
-the data is cache coherent.
-
-*Reminder*
-The user is responsble to ensure the ATU is setup properly for DMA transfers.
-
-All Disclaimers apply. Use this at your own discretion. Neither Intel nor I
-will be responsible ifanything goes wrong.
+++ /dev/null
-Support functions for the Intel 80310 MU
-===========================================
-
-Dave Jiang <dave.jiang@intel.com>
-Last updated: 10/11/2001
-
-The messaging unit of the IOP310 contains 4 components and is utilized for
-passing messages between the PCI agents on the primary bus and the Intel(R)
-80200 CPU. The four components are:
-Messaging Component
-Doorbell Component
-Circular Queues Component
-Index Registers Component
-
-Messaging Component:
-Contains 4 32bit registers, 2 in and 2 out. Writing to the registers assert
-interrupt on the PCI bus or to the 80200 depend on incoming or outgoing.
-
-int mu_msg_request(u32 *mu_context);
-Request the usage of Messaging Component. mu_context is written back by the
-API. The MU context is passed to other Messaging calls as a parameter.
-
-int mu_msg_set_callback(u32 mu_context, u8 reg, mu_msg_cb_t func);
-Setup the callback function for incoming messages. Callback can be setup for
-outbound 0, 1, or both outbound registers.
-
-int mu_msg_post(u32 mu_context, u32 val, u8 reg);
-Posting a message in the val parameter. The reg parameter denotes whether
-to use register 0, 1.
-
-int mu_msg_free(u32 mu_context, u8 mode);
-Free the usage of messaging component. mode can be specified soft or hard. In
-hardmode all resources are unallocated.
-
-Doorbell Component:
-The doorbell registers contains 1 inbound and 1 outbound. Depending on the bits
-being set different interrupts are asserted.
-
-int mu_db_request(u32 *mu_context);
-Request the usage of the doorbell register.
-
-int mu_db_set_callback(u32 mu_context, mu_db_cb_t func);
-Setting up the inbound callback.
-
-void mu_db_ring(u32 mu_context, u32 mask);
-Write to the outbound db register with mask.
-
-int mu_db_free(u32 mu_context);
-Free the usage of doorbell component.
-
-Circular Queues Component:
-The circular queue component has 4 circular queues. Inbound post, inbound free,
-outbound post, outbound free. These queues are used to pass messages.
-
-int mu_cq_request(u32 *mu_context, u32 q_size);
-Request the usage of the queue. See code comment header for q_size. It tells
-the API how big of queues to setup.
-
-int mu_cq_inbound_init(u32 mu_context, mfa_list_t *list, u32 size,
- mu_cq_cb_t func);
-Init inbound queues. The user must provide a list of free message frames to
-be put in inbound free queue and the callback function to handle the inbound
-messages.
-
-int mu_cq_enable(u32 mu_context);
-Enables the circular queues mechanism. Called once all the setup functions
-are called.
-
-u32 mu_cq_get_frame(u32 mu_context);
-Obtain the address of an outbound free frame for the user.
-
-int mu_cq_post_frame(u32 mu_context, u32 mfa);
-The user can post the frame once getting the frame and put information in the
-frame.
-
-int mu_cq_free(u32 mu_context);
-Free the usage of circular queues mechanism.
-
-Index Registers Component:
-The index register provides the mechanism to receive inbound messages.
-
-int mu_ir_request(u32 *mu_context);
-Request of Index Register component usage.
-
-int mu_ir_set_callback(u32 mu_context, mu_ir_cb_t callback);
-Setting up callback for inbound messages. The callback will receive the
-value of the register that IAR offsets to.
-
-int mu_ir_free(u32 mu_context);
-Free the usage of Index Registers component.
-
-void mu_set_irq_threshold(u32 mu_context, int thresh);
-Setup the IRQ threshold before relinquish processing in IRQ space. Default
-is set at 10 loops.
-
-
-*NOTE: Example of host driver that utilize the MU can be found in the Linux I2O
-driver. Specifically i2o_pci and some functions of i2o_core. The I2O driver
-only utilize the circular queues mechanism. The other 3 components are simple
-enough that they can be easily setup. The MU API provides no flow control for
-the messaging mechanism. Flow control of the messaging needs to be established
-by a higher layer of software on the IOP or the host driver.
-
-All Disclaimers apply. Use this at your own discretion. Neither Intel nor I
-will be responsible if anything goes wrong. =)
-
-
-TODO
-____
-
+++ /dev/null
-
-Intel's XScale Microarchitecture 80312 companion processor provides a
-Performance Monitoring Unit (PMON) that can be utilized to provide
-information that can be useful for fine tuning of code. This text
-file describes the API that's been developed for use by Linux kernel
-programmers. Note that to get the most usage out of the PMON,
-I highly reccomend getting the XScale reference manual from Intel[1]
-and looking at chapter 12.
-
-To use the PMON, you must #include <asm-arm/arch-iop310/pmon.h> in your
-source file.
-
-Since there's only one PMON, only one user can currently use the PMON
-at a given time. To claim the PMON for usage, call iop310_pmon_claim() which
-returns an identifier. When you are done using the PMON, call
-iop310_pmon_release() with the id you were given earlier.
-
-The PMON consists of 14 registers that can be used for performance measurements.
-By combining different statistics, you can derive complex performance metrics.
-
-To start the PMON, just call iop310_pmon_start(mode). Mode tells the PMON what
-statistics to capture and can each be one of:
-
- IOP310_PMU_MODE0
- Performance Monitoring Disabled
-
- IOP310_PMU_MODE1
- Primary PCI bus and internal agents (bridge, dma Ch0, dam Ch1, patu)
-
- IOP310_PMU_MODE2
- Secondary PCI bus and internal agents (bridge, dma Ch0, dam Ch1, patu)
-
- IOP310_PMU_MODE3
- Secondary PCI bus and internal agents (external masters 0..2 and Intel
- 80312 I/O companion chip)
-
- IOP310_PMU_MODE4
- Secondary PCI bus and internal agents (external masters 3..5 and Intel
- 80312 I/O companion chip)
-
- IOP310_PMU_MODE5
- Intel 80312 I/O companion chip internal bus, DMA Channels and Application
- Accelerator
-
- IOP310_PMU_MODE6
- Intel 80312 I/O companion chip internal bus, PATU, SATU and Intel 80200
- processor
-
- IOP310_PMU_MODE7
- Intel 80312 I/O companion chip internal bus, Primary PCI bus, Secondary
- PCI bus and Secondary PCI agents (external masters 0..5 & Intel 80312 I/O
- companion chip)
-
-To get the results back, call iop310_pmon_stop(&results) where results is
-defined as follows:
-
-typedef struct _iop310_pmon_result
-{
- u32 timestamp; /* Global Time Stamp Register */
- u32 timestamp_overflow; /* Time Stamp overflow count */
- u32 event_count[14]; /* Programmable Event Counter
- Registers 1-14 */
- u32 event_overflow[14]; /* Overflow counter for PECR1-14 */
-} iop310_pmon_res_t;
-
-
---
-This code is still under development, so please feel free to send patches,
-questions, comments, etc to me.
-
-Deepak Saxena <dsaxena@mvista.com>
+++ /dev/null
-
-Intel's XScale Microarchitecture provides support for locking of data
-and instructions into the appropriate caches. This file provides
-an overview of the API that has been developed to take advantage of this
-feature from kernel space. Note that there is NO support for user space
-cache locking.
-
-For example usage of this code, grab:
-
- ftp://source.mvista.com/pub/xscale/cache-test.c
-
-If you have any questions, comments, patches, etc, please contact me.
-
-Deepak Saxena <dsaxena@mvista.com>
-
-API DESCRIPTION
-
-
-I. Header File
-
- #include <asm/xscale-lock.h>
-
-II. Cache Capability Discovery
-
- SYNOPSIS
-
- int cache_query(u8 cache_type,
- struct cache_capabilities *pcache);
-
- struct cache_capabilities
- {
- u32 flags; /* Flags defining capabilities */
- u32 cache_size; /* Cache size in K (1024 bytes) */
- u32 max_lock; /* Maximum lockable region in K */
- }
-
- /*
- * Flags
- */
-
- /*
- * Bit 0: Cache lockability
- * Bits 1-31: Reserved for future use
- */
- #define CACHE_LOCKABLE 0x00000001 /* Cache can be locked */
-
- /*
- * Cache Types
- */
- #define ICACHE 0x00
- #define DCACHE 0x01
-
- DESCRIPTION
-
- This function fills out the pcache capability identifier for the
- requested cache. cache_type is either DCACHE or ICACHE. This
- function is not very useful at the moment as all XScale CPU's
- have the same size Cache, but is is provided for future XScale
- based processors that may have larger cache sizes.
-
- RETURN VALUE
-
- This function returns 0 if no error occurs, otherwise it returns
- a negative, errno compatible value.
-
- -EIO Unknown hardware error
-
-III. Cache Locking
-
- SYNOPSIS
-
- int cache_lock(void *addr, u32 len, u8 cache_type, const char *desc);
-
- DESCRIPTION
-
- This function locks a physically contigous portion of memory starting
- at the virtual address pointed to by addr into the cache referenced
- by cache_type.
-
- The address of the data/instruction that is to be locked must be
- aligned on a cache line boundary (L1_CACHE_ALIGNEMENT).
-
- The desc parameter is an optional (pass NULL if not used) human readable
- descriptor of the locked memory region that is used by the cache
- management code to build the /proc/cache_locks table.
-
- Note that this function does not check whether the address is valid
- or not before locking it into the cache. That duty is up to the
- caller. Also, it does not check for duplicate or overlaping
- entries.
-
- RETURN VALUE
-
- If the function is successful in locking the entry into cache, a
- zero is returned.
-
- If an error occurs, an appropriate error value is returned.
-
- -EINVAL The memory address provided was not cache line aligned
- -ENOMEM Could not allocate memory to complete operation
- -ENOSPC Not enough space left on cache to lock in requested region
- -EIO Unknown error
-
-III. Cache Unlocking
-
- SYNOPSIS
-
- int cache_unlock(void *addr)
-
- DESCRIPTION
-
- This function unlocks a portion of memory that was previously locked
- into either the I or D cache.
-
- RETURN VALUE
-
- If the entry is cleanly unlocked from the cache, a 0 is returned.
- In the case of an error, an appropriate error is returned.
-
- -ENOENT No entry with given address associated with this cache
- -EIO Unknown error
-
-
+++ /dev/null
-
-Intel's XScale Microarchitecture processors provide a Performance
-Monitoring Unit (PMU) that can be utilized to provide information
-that can be useful for fine tuning of code. This text file describes
-the API that's been developed for use by Linux kernel programmers.
-When I have some extra time on my hand, I will extend the code to
-provide support for user mode performance monitoring (which is
-probably much more useful). Note that to get the most usage out
-of the PMU, I highly reccomend getting the XScale reference manual
-from Intel and looking at chapter 12.
-
-To use the PMU, you must #include <asm/xscale-pmu.h> in your source file.
-
-Since there's only one PMU, only one user can currently use the PMU
-at a given time. To claim the PMU for usage, call pmu_claim() which
-returns an identifier. When you are done using the PMU, call
-pmu_release() with the identifier that you were given by pmu_claim.
-
-In addition, the PMU can only be used on XScale based systems that
-provide an external timer. Systems that the PMU is currently supported
-on are:
-
- - Cyclone IQ80310
-
-Before delving into how to use the PMU code, let's do a quick overview
-of the PMU itself. The PMU consists of three registers that can be
-used for performance measurements. The first is the CCNT register with
-provides the number of clock cycles elapsed since the PMU was started.
-The next two register, PMN0 and PMN1, are eace user programmable to
-provide 1 of 20 different performance statistics. By combining different
-statistics, you can derive complex performance metrics.
-
-To start the PMU, just call pmu_start(pm0, pmn1). pmn0 and pmn1 tell
-the PMU what statistics to capture and can each be one of:
-
-EVT_ICACHE_MISS
- Instruction fetches requiring access to external memory
-
-EVT_ICACHE_NO_DELIVER
- Instruction cache could not deliver an instruction. Either an
- ICACHE miss or an instruction TLB miss.
-
-EVT_ICACHE_DATA_STALL
- Stall in execution due to a data dependency. This counter is
- incremented each cycle in which the condition is present.
-
-EVT_ITLB_MISS
- Instruction TLB miss
-
-EVT_DTLB_MISS
- Data TLB miss
-
-EVT_BRANCH
- A branch instruction was executed and it may or may not have
- changed program flow
-
-EVT_BRANCH_MISS
- A branch (B or BL instructions only) was mispredicted
-
-EVT_INSTRUCTION
- An instruction was executed
-
-EVT_DCACHE_FULL_STALL
- Stall because data cache buffers are full. Incremented on every
- cycle in which condition is present.
-
-EVT_DCACHE_FULL_STALL_CONTIG
- Stall because data cache buffers are full. Incremented on every
- cycle in which condition is contigous.
-
-EVT_DCACHE_ACCESS
- Data cache access (data fetch)
-
-EVT_DCACHE_MISS
- Data cache miss
-
-EVT_DCACHE_WRITE_BACK
- Data cache write back. This counter is incremented for every
- 1/2 line (four words) that are written back.
-
-EVT_PC_CHANGED
- Software changed the PC. This is incremented only when the
- software changes the PC and there is no mode change. For example,
- a MOV instruction that targets the PC would increment the counter.
- An SWI would not as it triggers a mode change.
-
-EVT_BCU_REQUEST
- The Bus Control Unit(BCU) received a request from the core
-
-EVT_BCU_FULL
- The BCU request queue if full. A high value for this event means
- that the BCU is often waiting for to complete on the external bus.
-
-EVT_BCU_DRAIN
- The BCU queues were drained due to either a Drain Write Buffer
- command or an I/O transaction for a page that was marked as
- uncacheable and unbufferable.
-
-EVT_BCU_ECC_NO_ELOG
- The BCU detected an ECC error on the memory bus but noe ELOG
- register was available to to log the errors.
-
-EVT_BCU_1_BIT_ERR
- The BCU detected a 1-bit error while reading from the bus.
-
-EVT_RMW
- An RMW cycle occurred due to narrow write on ECC protected memory.
-
-To get the results back, call pmu_stop(&results) where results is defined
-as a struct pmu_results:
-
- struct pmu_results
- {
- u32 ccnt; /* Clock Counter Register */
- u32 ccnt_of; /
- u32 pmn0; /* Performance Counter Register 0 */
- u32 pmn0_of;
- u32 pmn1; /* Performance Counter Register 1 */
- u32 pmn1_of;
- };
-
-Pretty simple huh? Following are some examples of how to get some commonly
-wanted numbers out of the PMU data. Note that since you will be dividing
-things, this isn't super useful from the kernel and you need to printk the
-data out to syslog. See [1] for more examples.
-
-Instruction Cache Efficiency
-
- pmu_start(EVT_INSTRUCTION, EVT_ICACHE_MISS);
- ...
- pmu_stop(&results);
-
- icache_miss_rage = results.pmn1 / results.pmn0;
- cycles_per_instruction = results.ccnt / results.pmn0;
-
-Data Cache Efficiency
-
- pmu_start(EVT_DCACHE_ACCESS, EVT_DCACHE_MISS);
- ...
- pmu_stop(&results);
-
- dcache_miss_rage = results.pmn1 / results.pmn0;
-
-Instruction Fetch Latency
-
- pmu_start(EVT_ICACHE_NO_DELIVER, EVT_ICACHE_MISS);
- ...
- pmu_stop(&results);
-
- average_stall_waiting_for_instruction_fetch =
- results.pmn0 / results.pmn1;
-
- percent_stall_cycles_due_to_instruction_fetch =
- results.pmn0 / results.ccnt;
-
-
-ToDo:
-
-- Add support for usermode PMU usage. This might require hooking into
- the scheduler so that we pause the PMU when the task that requested
- statistics is scheduled out.
-
---
-This code is still under development, so please feel free to send patches,
-questions, comments, etc to me.
-
-Deepak Saxena <dsaxena@mvista.com>
-
+++ /dev/null
-
-Intel's XScale Microarchitecture provides support for locking of TLB
-entries in both the instruction and data TLBs. This file provides
-an overview of the API that has been developed to take advantage of this
-feature from kernel space. Note that there is NO support for user space.
-
-In general, this feature should be used in conjunction with locking
-data or instructions into the appropriate caches. See the file
-cache-lock.txt in this directory.
-
-If you have any questions, comments, patches, etc, please contact me.
-
-Deepak Saxena <dsaxena@mvista.com>
-
-
-API DESCRIPTION
-
-I. Header file
-
- #include <asm/xscale-lock.h>
-
-II. Locking an entry into the TLB
-
- SYNOPSIS
-
- xscale_tlb_lock(u8 tlb_type, u32 addr);
-
- /*
- * TLB types
- */
- #define ITLB 0x0
- #define DTLB 0x1
-
- DESCRIPTION
-
- This function locks the virtual to physical mapping for virtual
- address addr into the requested TLB.
-
- RETURN VALUE
-
- If the entry is properly locked into the TLB, a 0 is returned.
- In case of an error, an appropriate error is returned.
-
- -ENOSPC No more entries left in the TLB
- -EIO Unknown error
-
-III. Unlocking an entry from a TLB
-
- SYNOPSIS
-
- xscale_tlb_unlock(u8 tlb_type, u32 addr);
-
- DESCRIPTION
-
- This function unlocks the entry for virtual address addr from the
- specified cache.
-
- RETURN VALUE
-
- If the TLB entry is properly unlocked, a 0 is returned.
- In case of an error, an appropriate error is returned.
-
- -ENOENT No entry for given address in specified TLB
-
+++ /dev/null
-Anticipatory IO scheduler
--------------------------
-Nick Piggin <piggin@cyberone.com.au> 13 Sep 2003
-
-Attention! Database servers, especially those using "TCQ" disks should
-investigate performance with the 'deadline' IO scheduler. Any system with high
-disk performance requirements should do so, in fact.
-
-If you see unusual performance characteristics of your disk systems, or you
-see big performance regressions versus the deadline scheduler, please email
-me. Database users don't bother unless you're willing to test a lot of patches
-from me ;) its a known issue.
-
-Also, users with hardware RAID controllers, doing striping, may find
-highly variable performance results with using the as-iosched. The
-as-iosched anticipatory implementation is based on the notion that a disk
-device has only one physical seeking head. A striped RAID controller
-actually has a head for each physical device in the logical RAID device.
-
-However, setting the antic_expire (see tunable parameters below) produces
-very similar behavior to the deadline IO scheduler.
-
-
-Selecting IO schedulers
------------------------
-To choose IO schedulers at boot time, use the argument 'elevator=deadline'.
-'noop' and 'as' (the default) are also available. IO schedulers are assigned
-globally at boot time only presently.
-
-
-Anticipatory IO scheduler Policies
-----------------------------------
-The as-iosched implementation implements several layers of policies
-to determine when an IO request is dispatched to the disk controller.
-Here are the policies outlined, in order of application.
-
-1. one-way Elevator algorithm.
-
-The elevator algorithm is similar to that used in deadline scheduler, with
-the addition that it allows limited backward movement of the elevator
-(i.e. seeks backwards). A seek backwards can occur when choosing between
-two IO requests where one is behind the elevator's current position, and
-the other is in front of the elevator's position. If the seek distance to
-the request in back of the elevator is less than half the seek distance to
-the request in front of the elevator, then the request in back can be chosen.
-Backward seeks are also limited to a maximum of MAXBACK (1024*1024) sectors.
-This favors forward movement of the elevator, while allowing opportunistic
-"short" backward seeks.
-
-2. FIFO expiration times for reads and for writes.
-
-This is again very similar to the deadline IO scheduler. The expiration
-times for requests on these lists is tunable using the parameters read_expire
-and write_expire discussed below. When a read or a write expires in this way,
-the IO scheduler will interrupt its current elevator sweep or read anticipation
-to service the expired request.
-
-3. Read and write request batching
-
-A batch is a collection of read requests or a collection of write
-requests. The as scheduler alternates dispatching read and write batches
-to the driver. In the case a read batch, the scheduler submits read
-requests to the driver as long as there are read requests to submit, and
-the read batch time limit has not been exceeded (read_batch_expire).
-The read batch time limit begins counting down only when there are
-competing write requests pending.
-
-In the case of a write batch, the scheduler submits write requests to
-the driver as long as there are write requests available, and the
-write batch time limit has not been exceeded (write_batch_expire).
-However, the length of write batches will be gradually shortened
-when read batches frequently exceed their time limit.
-
-When changing between batch types, the scheduler waits for all requests
-from the previous batch to complete before scheduling requests for the
-next batch.
-
-The read and write fifo expiration times described in policy 2 above
-are checked only when in scheduling IO of a batch for the corresponding
-(read/write) type. So for example, the read FIFO timeout values are
-tested only during read batches. Likewise, the write FIFO timeout
-values are tested only during write batches. For this reason,
-it is generally not recommended for the read batch time
-to be longer than the write expiration time, nor for the write batch
-time to exceed the read expiration time (see tunable parameters below).
-
-When the IO scheduler changes from a read to a write batch,
-it begins the elevator from the request that is on the head of the
-write expiration FIFO. Likewise, when changing from a write batch to
-a read batch, scheduler begins the elevator from the first entry
-on the read expiration FIFO.
-
-4. Read anticipation.
-
-Read anticipation occurs only when scheduling a read batch.
-This implementation of read anticipation allows only one read request
-to be dispatched to the disk controller at a time. In
-contrast, many write requests may be dispatched to the disk controller
-at a time during a write batch. It is this characteristic that can make
-the anticipatory scheduler perform anomalously with controllers supporting
-TCQ, or with hardware striped RAID devices. Setting the antic_expire
-queue paramter (see below) to zero disables this behavior, and the anticipatory
-scheduler behaves essentially like the deadline scheduler.
-
-When read anticipation is enabled (antic_expire is not zero), reads
-are dispatched to the disk controller one at a time.
-At the end of each read request, the IO scheduler examines its next
-candidate read request from its sorted read list. If that next request
-is from the same process as the request that just completed,
-or if the next request in the queue is "very close" to the
-just completed request, it is dispatched immediately. Otherwise,
-statistics (average think time, average seek distance) on the process
-that submitted the just completed request are examined. If it seems
-likely that that process will submit another request soon, and that
-request is likely to be near the just completed request, then the IO
-scheduler will stop dispatching more read requests for up time (antic_expire)
-milliseconds, hoping that process will submit a new request near the one
-that just completed. If such a request is made, then it is dispatched
-immediately. If the antic_expire wait time expires, then the IO scheduler
-will dispatch the next read request from the sorted read queue.
-
-To decide whether an anticipatory wait is worthwhile, the scheduler
-maintains statistics for each process that can be used to compute
-mean "think time" (the time between read requests), and mean seek
-distance for that process. One observation is that these statistics
-are associated with each process, but those statistics are not associated
-with a specific IO device. So for example, if a process is doing IO
-on several file systems on separate devices, the statistics will be
-a combination of IO behavior from all those devices.
-
-
-Tuning the anticipatory IO scheduler
-------------------------------------
-When using 'as', the anticipatory IO scheduler there are 5 parameters under
-/sys/block/*/iosched/. All are units of milliseconds.
-
-The parameters are:
-* read_expire
- Controls how long until a read request becomes "expired". It also controls the
- interval between which expired requests are served, so set to 50, a request
- might take anywhere < 100ms to be serviced _if_ it is the next on the
- expired list. Obviously request expiration strategies won't make the disk
- go faster. The result basically equates to the timeslice a single reader
- gets in the presence of other IO. 100*((seek time / read_expire) + 1) is
- very roughly the % streaming read efficiency your disk should get with
- multiple readers.
-
-* read_batch_expire
- Controls how much time a batch of reads is given before pending writes are
- served. A higher value is more efficient. This might be set below read_expire
- if writes are to be given higher priority than reads, but reads are to be
- as efficient as possible when there are no writes. Generally though, it
- should be some multiple of read_expire.
-
-* write_expire, and
-* write_batch_expire are equivalent to the above, for writes.
-
-* antic_expire
- Controls the maximum amount of time we can anticipate a good read (one
- with a short seek distance from the most recently completed request) before
- giving up. Many other factors may cause anticipation to be stopped early,
- or some processes will not be "anticipated" at all. Should be a bit higher
- for big seek time devices though not a linear correspondence - most
- processes have only a few ms thinktime.
-
+++ /dev/null
-The Linux Digiboard Driver
---------------------------
-
-The Digiboard Driver for Linux supports the following boards:
-
- DigiBoard PC/Xi, PC/Xe, PC/Xeve(which is the newer, smaller Xe with
- a 8K window which is also known as PC/Xe(8K) and has no memory/irq
- switches) You can use up to 4 cards with this driver and it should work
- on other architectures than intel also.
-
-A version of this driver has been taken by Digiboard to make a driver
-software package which supports also PC/Xem cards and newer PCI cards
-but it doesn't support the old PC/Xi cards and it isn't yet ported to
-linux-2.1.x and may not be usable on other architectures than intel now.
-It is available from ftp.digi.com/ftp.digiboard.com. You can write me if
-you need an patch for this driver.
-
-Bernhard Kaindl (bkaindl@netway.at) 6. April 1997.
-
-Configuring the Driver
-----------------------
-
-The driver can be built direct into the kernel or as a module.
-The pcxx driver can be configured using the command line feature while
-loading the kernel with LILO or LOADLIN or, if built as a module,
-with arguments to insmod and modprobe or with parameters in
-/etc/modprobe.conf for modprobe and kerneld.
-
-After configuring the driver you need to create the device special files
-as described in "Device file creation:" below and set the appropriate
-permissions for your application.
-
-As Module
----------
-
-modprobe pcxx io=<io> \
- membase=<membase> \
- memsize=<memsize> \
- numports=<numports> \
- altpin=<altpin> \
- verbose=<verbose>
-
-or, if several cards are installed
-
-modprobe pcxx io=<io-1>,<io-2>,... \
- membase=<membase-1>,<membase-2>,... \
- memsize=<memsize-1>,<memsize-2>,... \
- numports=<numports-1>,<numports-2>,... \
- altpin=<altpin-1>,<altpin-2>,... \
- verbose=<verbose>
-
-where <io-N> is the io address of the Nth card and <membase-N> is the
-memory base address of the Nth card, etc.
-
-The parameters can be specified in any order. For example, the numports
-parameter can precede the membase parameter, or vice versa. If several
-cards are installed the ordering within the comma separated parameter
-lists must be consistent, of course.
-
-io - I/O port address of that card.
-membase - Memory start address of that card.
-memsize - Memory size of that card, in kilobytes. If given, this value
- is compared against the card to verify configuration and
- hinder the driver from using a misconfigured card. If the parameter
- does not match the board it is disabled with a memory size error.
-numports - Number of ports on this card. This is the number of devices to
- assign to this card or reserve if disabled.
-altpin - 1: swap DCD and DSR for 8-pin RJ-45 with modems.
- 0: don't swap DCD and DSR.
- other values count as 1.
-verbose - 1: give nice verbose output during initialisation of the driver,
- possibly helpful during board configuration.
- 0: normal terse output.
-
-Only the parameters which differ from the defaults need to be specified.
-If the io= parameter is not given, the default config is used. This is
-
- io=0x200 membase=0xD0000 numports=16 altpin=0
-
-Only applicable parameters need be specified. For example to configure
-2 boards, first one at 0x200 with 8 ports, rest defaults, second one at
-0x120, memory at 0xD80000, altpin enabled, rest defaults, you can do this
-by using these parameters:
-
- modprobe pcxx io=0x200,0x120 numports=8,8 membase=,0xD80000 altpin=,1
-
-To disable a temporary unusable board without changing the mapping of the
-devices following that board, you can empty the io-value for that board:
-
- modprobe pcxx io=,0x120 numports=8,8 membase=,0xD80000 altpin=,1
-
-The remaining board still uses ttyD8-ttyD15 and cud8-cud15.
-
-Example line for /etc/modprobe.conf for use with kerneld and as default
-parameters for modprobe:
-
-options pcxx io=0x200 numports=8
-
-For kmod to work you will likely need to add these two lines to your
-/etc/modprobe.conf:
-
-alias char-major-22 pcxx
-alias char-major-23 pcxx
-
-
-Boot-time configuration when linked into the kernel
----------------------------------------------------
-
-Per board to be configured, pass a digi= command-line parameter to the
-kernel using lilo or loadlin. It consists of a string of comma separated
-identifiers or integers. The 6 values in order are:
-
-Card status: Enable - use that board
- Disable - don't actually use that board.
-
-Card type: PC/Xi - the old ones with 64/128/256/512K RAM.
- PC/Xe - PC/Xe(old ones with 64k mem range).
- PC/Xeve - PC/Xe(new ones with 8k mem range).
-
-Note: This is for documentation only, the type is detected from the board.
-
-Altpin setting: Enable - swap DCD and DSR for 8-pin RJ-45 with modems.
- Disable - don't swap DCD and DSR.
-
-Number of ports: 1 ... 16 - Number of ports on this card. This is the
- number of devices to assign to this card.
-
-I/O port address: eg. 200 - I/O Port address where the card is configured.
-
-Memory base addr: eg. 80000 - Memory address where the board's memory starts.
-
-This is an example for a line which you can insert into you lilo.conf:
-
- append="digi=Enable,PC/Xi,Disable,4,120,D0000"
-
-there is an alternate form, in which you must use decimal values only:
-
- append="digi=1,0,0,16,512,851968"
-
-If you don't give a digi= command line, the compiled-in defaults of
-board 1: io=0x200, membase=0xd0000, altpin=off and numports=16 are used.
-
-If you have the resources (io&mem) free for use, configure your board to
-these settings and you should be set up fine even if yours has not got 16
-ports.
-
-
-Sources of Information
-----------------------
-
-Please contact digi directly digilnux@dgii.com. Forward any information of
-general interest to me so that I can include it on the webpage.
-
-Web page: http://lameter.com/digi
-
-Christoph Lameter (christoph@lameter.com) Aug 14, 2000.
-
-Device file creation
---------------------
-
-Currently the Linux MAKEDEV command does not support generating the Digiboard
-Devices.
-
-The /dev/cud devices behave like the /dev/cua devices
-and the ttyD devices are like the /dev/ttyS devices.
-
-Use the following script to generate the devices:
-
------------------- mkdigidev begin
-#!/bin/sh
-#
-# Script to create Digiboard Devices
-# Christoph Lameter, April 16, 1996
-#
-# Usage:
-# mkdigidev [<number of devices>]
-#
-
-DIGI_MAJOR=23
-DIGICU_MAJOR=22
-
-BOARDS=$1
-
-if [ "$BOARDS" = "" ]; then
-BOARDS=1
-fi
-
-boardnum=0
-while [ $boardnum -lt $BOARDS ];
-do
- for c in 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15;
- do
- name=`expr $boardnum \* 16 + $c`
- mknod /dev/cud$name c $DIGICU_MAJOR $name
- mknod /dev/ttyD$name c $DIGI_MAJOR $name
- done
- boardnum=`expr $boardnum + 1`
-done
------------------- mkdigidev end
-
-or apply the following patch to /dev/MAKEDEV and do a
-sh /dev/MAKEDEV digi
-
------ MAKEDEV Patch
---- /dev/MAKEDEV Sun Aug 13 15:48:23 1995
-+++ MAKEDEV Tue Apr 16 17:53:27 1996
-@@ -120,7 +120,7 @@
- while [ $# -ne 0 ]
- do
- case "$1" in
-- mem|tty|ttyp|cua|cub) ;;
-+ mem|tty|ttyp|cua|cub|cud) ;;
- hd) echo hda hdb hdc hdd ;;
- xd) echo xda xdb ;;
- fd) echo fd0 fd1 ;;
-@@ -140,6 +140,7 @@
- dcf) echo dcf ;;
- pcmcia) ;; # taken care of by its own driver
- ttyC) echo cyclades ;;
-+ ttyD) echo digi ;;
- *) echo "$0: don't know what \"$1\" is" >&2 ;;
- esac
- shift
-@@ -208,6 +209,15 @@
- do
- makedev ttyC$i c $major1 `expr 32 + $i` $tty
- makedev cub$i c $major2 `expr 32 + $i` $dialout
-+ done
-+ ;;
-+ digi)
-+ major1=`Major ttyD` || continue
-+ major2=`Major cud` || continue
-+ for i in 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
-+ do
-+ makedev ttyD$i c $major1 `expr 32 + $i` $tty
-+ makedev cud$i c $major2 `expr 32 + $i` $dialout
- done
- ;;
- par[0-2])
------ End Makedev patch
-
------------------------------------------------------------------------------
-
-Changes v1.5.5:
-
-The ability to use the kernel's command line to pass in the configuration for
-boards. Using LILO's APPEND command, a string of comma separated identifiers
-or integers can be used. The 6 values in order are:
-
- Enable/Disable this card,
- Type of card: PC/Xi(0), PC/Xe(1), PC/Xeve(2), PC/Xem(3)
- Enable/Disable alternate pin arrangement,
- Number of ports on this card,
- I/O Port where card is configured (in HEX if using string identifiers),
- Base of memory window (in HEX if using string identifiers),
-
-Samples:
- append="digi=E,PC/Xi,D,16,200,D0000"
- append="digi=1,0,0,16,512,(whatever D0000 is in base 10 :)
-
-Drivers' minor device numbers are conserved. This means that instead of
-each board getting a block of 16 minors pre-assigned, it gets however
-many it should, with the next card following directly behind it. A
-system with 4 2-port PC/Xi boards will use minor numbers 0-7.
-This conserves some memory, and removes a few hard coded constants.
-
-NOTE!! NOTE!! NOTE!!
-The definition of PC/Xem as a valid board type is the BEGINNING of support
-for this device. The driver does not currently recognise the board, nor
-does it want to initialize it. At least not the EISA version.
-
-Mike McLagan <mike.mclagan@linux.org> 5, April 1996.
+++ /dev/null
-Some DVB cards and many newer frontends require proprietary,
-binary-only firmware.
-
-The DVB drivers will be converted to use the request_firmware()
-hotplug interface (see Documentation/firmware_class/).
-(CONFIG_FW_LOADER)
-
-The firmware can be loaded automatically via the hotplug manager
-or manually with the steps described below.
-
-Currently the drivers still use various different methods
-to load their firmwares, so here's just a short list of the
-current state:
-
-- dvb-ttpci: driver uses firmware hotplug interface
-- ttusb-budget: firmware is compiled in (dvb-ttusb-dspbootcode.h)
-- sp887x: firmware is compiled in (sp887x_firm.h)
-- alps_tdlb7: firmware is loaded from path specified by
- "mcfile" module parameter; the binary must be
- extracted from the Windows driver (Sc_main.mc).
-- tda1004x: firmware is loaded from path specified in
- DVB_TDA1004X_FIRMWARE_FILE kernel config
- variable (default /usr/lib/hotplug/firmware/tda1004x.bin); the
- firmware binary must be extracted from the windows
- driver
-- ttusb-dec: see "ttusb-dec.txt" for details
-
-1) Automatic firmware loading
-
-You need to install recent hotplug scripts if your distribution did not do it
-for you already, especially the /etc/hotplug/firmware.agent.
-http://linux-hotplug.sourceforge.net/ (Call /sbin/hotplug without arguments
-to find out if the firmware agent is installed.)
-
-The firmware.agent script expects firmware binaries in
-/usr/lib/hotplug/firmware/. To avoid naming and versioning
-conflicts we propose the following naming scheme:
-
- /usr/lib/hotplug/firmware/dvb-{driver}-{ver}.fw for MPEG decoders etc.
- /usr/lib/hotplug/firmware/dvb-fe-{driver}-{ver}.fw for frontends
-
- {driver} name is the basename of the driver kernel module (e.g. dvb-ttpci)
- {ver} is a version number/name that should change only when the
- driver/firmware internal API changes (so users are free to install the
- latest firmware compatible with the driver).
-
-2) Manually loading the firmware into a driver
- (currently only the dvb-ttpci / av7110 driver supports this)
-
-Step a) Mount sysfs-filesystem.
-
-Sysfs provides a means to export kernel data structures, their attributes,
-and the linkages between them to userspace.
-
-For detailed informations have a look at Documentation/filesystems/sysfs.txt
-All you need to know at the moment is that firmware loading only works through
-sysfs.
-
-> mkdir /sys
-> mount -t sysfs sysfs /sys
-
-Step b) Exploring the firmware loading facilities
-
-Firmware_class support is located in
-/sys/class/firmware
-
-> dir /sys/class/firmware
-
-The "timeout" values specifies the amount of time that is waited before the
-firmware upload process is cancelled. The default values is 10 seconds. If
-you use a hotplug script for the firmware upload, this is sufficient. If
-you want to upload the firmware by hand, however, this might be too fast.
-
-> echo "180" > /sys/class/firmware/timeout
-
-Step c) Getting a usable firmware file for the dvb-ttpci driver/av7110 card.
-
-You can download the firmware files from
-http://linuxtv.org/download/dvb/
-
-Please note that in case of the dvb-ttpci driver this is *not* the "Root"
-file you probably know from the 2.4 DVB releases driver.
-
-The ttpci-firmware utility from linuxtv.org CVS can be used to
-convert Dpram and Root files into a usable firmware image.
-See dvb-kerrnel/scripts/ in http://linuxtv.org/cvs/.
-
-> wget http://www.linuxtv.org/download/dvb/dvb-ttpci-01.fw
-gets you the version 01 of the firmware fot the ttpci driver.
-
-Step d) Loading the dvb-ttpci driver and loading the firmware
-
-"modprobe" will take care that every needed module will be loaded
-automatically (except the frontend driver)
-
-> modprobe dvb-ttpci
-
-The "modprobe" process will hang until
-a) you upload the firmware or
-b) the timeout occurs.
-
-Change to another terminal and have a look at
-
-> dir /sys/class/firmware/
-
-total 0
-drwxr-xr-x 2 root root 0 Jul 29 11:00 0000:03:05.0
--rw-r--r-- 1 root root 0 Jul 29 10:41 timeout
-
-"0000:03:05.0" is the id for my dvb-c card. It depends on the pci slot,
-so it changes if you plug the card to different slots.
-
-You can upload the firmware like that:
-
-> export DEVDIR=/sys/class/firmware/0000\:03\:05.0
-> echo 1 > $DEVDIR/loading
-> cat dvb-ttpci-01.fw > $DEVDIR/data
-> echo 0 > $DEVDIR/loading
-
-That's it. The driver should be up and running now.
+++ /dev/null
-Firstly, let me say that UMSDOS is going through some major code changes,
-and has some KNOWN BUGS (and quite a few unknown :-). Please read
-fs/umsdos/README-WIP.txt for more information on current status. Thanks.
-
-----------------------------------------------------------------------------
-Very short explanation for the impatient!
-
-Umsdos is a file system driver that run on top the MSDOS fs driver.
-It is written by Jacques Gelinas (jacques@solucorp.qc.ca)
-and is currently maintained by Matija Nalis (mnalis@jagor.srce.hr)
-
-Umsdos is not a file system per se, but a twist to make a boring
-one into a useful one.
-
-It gives you:
-
- long file names
- Permissions and owners
- Links
- Special files (devices, pipes...)
- All that is needed to be a linux root fs.
-
-There is plenty of documentation on it in the source. A formatted document
-made from those comments is available from
-sunsite.unc.edu:/pub/Linux/system/Filesystems/umsdos.
-
-You mount a DOS partition like this:
-
-mount -t umsdos /dev/hda3 /mnt
- ^
----------|
-
-All options are passed to the msdos drivers. Option like uid,gid etc are
-given to msdos.
-
-The default behavior of Umsdos is to do the same thing as the msdos driver
-mostly passing commands to it without much processing. Again, this is
-the default. After doing the mount on a DOS partition, nothing special
-happens. This is why all mount options are passed to the msdos fs driver.
-
-Umsdos uses a special DOS file --linux-.--- to store the information
-which can't be handled by the normal MS-DOS filesystem. This is the trick.
-
---linux-.--- is optional. There is one per directory.
-
-**** If --linux-.--- is missing, then Umsdos process the directory the
- same way the msdos driver does. Short file names, no goodies, default
- owner and permissions. So each directory may have or not this
- --linux-.---
-
-Now, how to get those --linux-.---.
-
-\begin joke_section
-
- Well send me a directory content
- and I will send you one customised for you.
- $5 per directory. Add any applicable taxes.
-\end joke_section
-
-A utility umssync creates those. The kernel maintains them. It is available
-from the same directory above (sunsite) in the file umsdos_progs-0.7.tar.gz.
-A compiled version is available in umsdos_progs-0.7.bin.tar.gz.
-
-So in our example, after mounting mnt, we do
-
- umssync .
-
-This will promote this directory (a recursive option is available) to full
-umsdos capabilities (long name, etc.). However, an "ls -l" before and after
-won't show much difference. The files which were there are still there, but
-now you can do all this:
-
- chmod 644 *
- chown you.your_group *
- ls >THIS_IS.A.VERY.LONG.NAME
- ln -s toto tata
- ls -l
-
-Once a directory is promoted, all subdirectories created will inherit that
-promotion.
-
-What happens if you boot DOS and create files in those promoted directories ?
-Umsdos won't notice new files, but will signal removed files (it won't crash).
-Using umssync in /etc/rc will make sure the DOS directory is in sync with
-the --linux-.---.
-
-It is a good idea to put the following command in your RC file just
-after the "mount -a":
-
- mount -a
- /sbin/umssync -i+ -c+ -r99 /umsdos_mount_point
-
- (You put one for each umsdos mount point in the fstab)
-
-This will ensure nice operation. A umsdos.fsck is in the making,
-so you will be allowed to manage umsdos partitions in the same way
-other filesystems are, using the generic fsck front end.
-
-Hope this helps!
-
+++ /dev/null
-I2C Conversion Guide for I2C-old to the current I2C API
-July 2002
-For Linux Kernel v2.5.x
-Frank Davis <fdavis@si.rr.com>
--------------------------------------------------------
-
-There exists several kernel drivers that are using an old version of the I2C
-API. These drivers need to be converted to the current (kernel 2.5.x) version.
-The following document provides a guideline to make the appropriate changes to
-the affected drivers. There maybe slight modifications to this guide that are
-specific to the driver you are working on. If you see {driver_name}, replace
-that with the respective name of the driver, such as saa7110.c , {driver_name}
-= saa7110.
-
--------------------------------------------------------
-
-Step 1: Include the right header file
-
-Perform the following change within the driver
-
-#include <linux/i2c-old.h> --> #include <linux/i2c.h>
-
-Step 2: Add and set the i2c modes
-
-Add the following code near the top of the driver
-
-static unsigned short normal_i2c[] = {34>>1, I2C_CLIENT_END };
-static unsigned short normal_i2c_range[] = { I2C_CLIENT_END };
-static unsigned short probe[2] = { I2C_CLIENT_END , I2C_CLIENT_END };
-static unsigned short probe_range[2] = { I2C_CLIENT_END , I2C_CLIENT_END };
-static unsigned short ignore[2] = { I2C_CLIENT_END , I2C_CLIENT_END };
-static unsigned short ignore_range[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-static unsigned short force[2] = { I2C_CLIENT_END , I2C_CLIENT_END };
-
-static struct i2c_client_address_data addr_data = {
- normal_i2c , normal_i2c_range,
- probe , probe_range,
- ignore , ignore_range,
- force
-};
-
-static struct i2c_client client_template;
-
-Step 3: Modify the driver info struct
-
-Within the struct for the driver , such as struct {driver_name} , make the
-following change ,
-struct i2c_bus *bus --> struct i2c_client *client
-
-Make changes where this change affects references within the file.
-
-Add a semaphore to the driver struct (as above)
-
-struct semaphore lock
-
-Step 5: Remove specific read and write functions
-
-Remove the driver specific write and read functions, usually in the form:
-{driver_name}_write , {driver_name}_read , {driver_name}_write_block , etc.
-
-Step 6: Update the write and read functions for the current I2C API
-
-Replace all references of {driver_name}_write with i2c_smbus_write_byte_data
-Replace all references of {driver_name}_read with i2c_smbus_read_byte_data or
-i2c_smbus_read_byte , depending on args passed in.
-
-** Ensure that these functions pass in the i2c_client *client , NOT the
-decoder/encoder that was passed in the driver specific write and read
-functions.
-
-Step 7: Modify the driver's attach function
-
-Change the driver attach function prototype :
-{driver_name}_attach(struct i2c_device *device) --> {driver_name}_attach(struct
-i2c_adapter *adap, int addr , unsigned short flags, int kind)
-
-Create a i2c_client client...
-Add the following (where "decoder" is a reference to a struct for the driver
-info:
-
-struct i2c_client *client;
-client = kmalloc(sizeof(*client), GFP_KERNEL);
-if(client == NULL)
- return -ENOMEM;
-client_template.adapter = adap;
-client_template.addr = addr;
-memcpy(client, &client_template, sizeof(*client));
-strcpy(client->name , "{driver_name}");
-decoder->client = client;
-client->data = decoder;
-decoder->addr = addr;
-
-Towards the end of the function, add:
-
-init_MUTEX(&decoder->lock);
-i2c_attach_client(client);
-
-
-Step 8: Modify the driver's detach function
-
-Change the driver detach function prototype :
-{driver_name}_detach(struct i2c_device *device) --> {driver_name}_detach(struct
-i2c_client *client)
-
-In the beginning of the detach function, add:
-i2c_detach_client(client);
-
-Towards the end of the detach function, add:
-kfree(client->data);
-kfree(client);
-
-Step 9: Modify the driver's command function
-
-Change the driver command function prototype :
-
-Step 10: Add the probe function after the driver's attach function.
-
-Add the following code:
-
-static int {driver_name}_probe(struct i2c_adapter *adap)
-{
- return i2c_probe(adap, &addr_data, {driver_name}_attach);
-
-}
-
-Step 11: Modify the driver's i2c_driver
-
-Find the i2c_driver , such as
-static struct i2c_driver i2c_driver_saa7110
-It is usually located towards the end of the driver
-Replace the values from I2C_DRIVERID_{something} to {driver_name}_attach, and
-add the following
-I2C_DRIVERID_{driver_name} , // verify by looking in include/linux/i2c-id.h
-I2C_DF_NOTIFY,
-{driver_name}_probe,
-....
-
-Step 12: Adding the i2c_client
-
-Add the i2c_client to the driver. Add the following code:
-
-static struct i2c_client client_template = {
- "{driver_name}_client",
- -1,
- 0,
- 0,
- NULL,
- {i2c_driver reference}
-};
-
-Step 13: Registering and Unregistering
-
-Replace i2c_register_driver with i2c_add_driver
-Replace i2c_unregister_driver with i2c_del_driver
-
--------------------------------------------------------
-
-Example:
-
-The following patch provides the i2c coversion patch for the saa7110 driver
-based on the above guide (for clarity).
-
-
---- drivers/media/video/saa7110.c.old Fri Jun 28 10:22:52 2002
-+++ drivers/media/video/saa7110.c Thu Jul 4 16:51:08 2002
-@@ -26,7 +26,7 @@
- #include <asm/io.h>
- #include <asm/uaccess.h>
-
--#include <linux/i2c-old.h>
-+#include <linux/i2c.h>
- #include <linux/videodev.h>
- #include "linux/video_decoder.h"
-
-@@ -37,13 +37,31 @@
-
- #define I2C_SAA7110 0x9C /* or 0x9E */
-
-+#define IF_NAME "saa7110"
- #define I2C_DELAY 10 /* 10 us or 100khz */
-
-+static unsigned short normal_i2c[] = {34>>1, I2C_CLIENT_END };
-+static unsigned short normal_i2c_range[] = { I2C_CLIENT_END };
-+static unsigned short probe[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-+static unsigned short probe_range[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-+static unsigned short ignore[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-+static unsigned short ignore_range[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-+static unsigned short force[2] = { I2C_CLIENT_END, I2C_CLIENT_END };
-+
-+static struct i2c_client_address_data addr_data = {
-+ normal_i2c, normal_i2c_range,
-+ probe, probe_range,
-+ ignore, ignore_range,
-+ force
-+};
-+
-+static struct i2c_client client_template;
-+
- struct saa7110 {
-- struct i2c_bus *bus;
-+ struct i2c_client *client;
- int addr;
- unsigned char reg[36];
--
-+ struct semaphore lock;
- int norm;
- int input;
- int enable;
-@@ -54,67 +72,10 @@
- };
-
- /* ----------------------------------------------------------------------- */
--/* I2C support functions */
--/* ----------------------------------------------------------------------- */
--static
--int saa7110_write(struct saa7110 *decoder, unsigned char subaddr, unsigned char data)
--{
-- int ack;
--
-- LOCK_I2C_BUS(decoder->bus);
-- i2c_start(decoder->bus);
-- i2c_sendbyte(decoder->bus, decoder->addr, I2C_DELAY);
-- i2c_sendbyte(decoder->bus, subaddr, I2C_DELAY);
-- ack = i2c_sendbyte(decoder->bus, data, I2C_DELAY);
-- i2c_stop(decoder->bus);
-- decoder->reg[subaddr] = data;
-- UNLOCK_I2C_BUS(decoder->bus);
-- return ack;
--}
--
--static
--int saa7110_write_block(struct saa7110* decoder, unsigned const char *data, unsigned int len)
--{
-- unsigned subaddr = *data;
--
-- LOCK_I2C_BUS(decoder->bus);
-- i2c_start(decoder->bus);
-- i2c_sendbyte(decoder->bus,decoder->addr,I2C_DELAY);
-- while (len-- > 0) {
-- if (i2c_sendbyte(decoder->bus,*data,0)) {
-- i2c_stop(decoder->bus);
-- UNLOCK_I2C_BUS(decoder->bus);
-- return -EAGAIN;
-- }
-- decoder->reg[subaddr++] = *data++;
-- }
-- i2c_stop(decoder->bus);
-- UNLOCK_I2C_BUS(decoder->bus);
--
-- return 0;
--}
--
--static
--int saa7110_read(struct saa7110* decoder)
--{
-- int data;
--
-- LOCK_I2C_BUS(decoder->bus);
-- i2c_start(decoder->bus);
-- i2c_sendbyte(decoder->bus, decoder->addr, I2C_DELAY);
-- i2c_start(decoder->bus);
-- i2c_sendbyte(decoder->bus, decoder->addr | 1, I2C_DELAY);
-- data = i2c_readbyte(decoder->bus, 1);
-- i2c_stop(decoder->bus);
-- UNLOCK_I2C_BUS(decoder->bus);
-- return data;
--}
--
--/* ----------------------------------------------------------------------- */
- /* SAA7110 functions */
- /* ----------------------------------------------------------------------- */
- static
--int saa7110_selmux(struct i2c_device *device, int chan)
-+int saa7110_selmux(struct i2c_client *client, int chan)
- {
- static const unsigned char modes[9][8] = {
- /* mode 0 */ { 0x00, 0xD9, 0x17, 0x40, 0x03, 0x44, 0x75, 0x16 },
-@@ -126,61 +87,59 @@
- /* mode 6 */ { 0x80, 0x59, 0x17, 0x42, 0xA3, 0x44, 0x75, 0x12 },
- /* mode 7 */ { 0x80, 0x9A, 0x17, 0xB1, 0x13, 0x60, 0xB5, 0x14 },
- /* mode 8 */ { 0x80, 0x3C, 0x27, 0xC1, 0x23, 0x44, 0x75, 0x21 } };
-- struct saa7110* decoder = device->data;
- const unsigned char* ptr = modes[chan];
-
-- saa7110_write(decoder,0x06,ptr[0]); /* Luminance control */
-- saa7110_write(decoder,0x20,ptr[1]); /* Analog Control #1 */
-- saa7110_write(decoder,0x21,ptr[2]); /* Analog Control #2 */
-- saa7110_write(decoder,0x22,ptr[3]); /* Mixer Control #1 */
-- saa7110_write(decoder,0x2C,ptr[4]); /* Mixer Control #2 */
-- saa7110_write(decoder,0x30,ptr[5]); /* ADCs gain control */
-- saa7110_write(decoder,0x31,ptr[6]); /* Mixer Control #3 */
-- saa7110_write(decoder,0x21,ptr[7]); /* Analog Control #2 */
-+ i2c_smbus_write_byte_data(client,0x06,ptr[0]); /* Luminance control */
-+ i2c_smbus_write_byte_data(client,0x20,ptr[1]); /* Analog Control #1 */
-+ i2c_smbus_write_byte_data(client,0x21,ptr[2]); /* Analog Control #2 */
-+ i2c_smbus_write_byte_data(client,0x22,ptr[3]); /* Mixer Control #1 */
-+ i2c_smbus_write_byte_data(client,0x2C,ptr[4]); /* Mixer Control #2 */
-+ i2c_smbus_write_byte_data(client,0x30,ptr[5]); /* ADCs gain control */
-+ i2c_smbus_write_byte_data(client,0x31,ptr[6]); /* Mixer Control #3 */
-+ i2c_smbus_write_byte_data(client,0x21,ptr[7]); /* Analog Control #2 */
-
- return 0;
- }
-
- static
--int determine_norm(struct i2c_device* dev)
-+int determine_norm(struct i2c_client* client)
- {
-- struct saa7110* decoder = dev->data;
- int status;
-
- /* mode changed, start automatic detection */
-- status = saa7110_read(decoder);
-+ status = i2c_smbus_read_byte(client);
- if ((status & 3) == 0) {
-- saa7110_write(decoder,0x06,0x80);
-+ i2c_smbus_write_byte_data(client,0x06,0x80);
- if (status & 0x20) {
-- DEBUG(printk(KERN_INFO "%s: norm=bw60\n",dev->name));
-- saa7110_write(decoder,0x2E,0x81);
-+ DEBUG(printk(KERN_INFO "%s: norm=bw60\n",adp->name));
-+ i2c_smbus_write_byte_data(client,0x2E,0x81);
- return VIDEO_MODE_NTSC;
- }
-- DEBUG(printk(KERN_INFO "%s: norm=bw50\n",dev->name));
-- saa7110_write(decoder,0x2E,0x9A);
-+ DEBUG(printk(KERN_INFO "%s: norm=bw50\n",adp->name));
-+ i2c_smbus_write_byte_data(client,0x2E,0x9A);
- return VIDEO_MODE_PAL;
- }
-
-- saa7110_write(decoder,0x06,0x00);
-+ i2c_smbus_write_byte_data(client,0x06,0x00);
- if (status & 0x20) { /* 60Hz */
-- DEBUG(printk(KERN_INFO "%s: norm=ntsc\n",dev->name));
-- saa7110_write(decoder,0x0D,0x06);
-- saa7110_write(decoder,0x11,0x2C);
-- saa7110_write(decoder,0x2E,0x81);
-+ DEBUG(printk(KERN_INFO "%s: norm=ntsc\n",adp->name));
-+ i2c_smbus_write_byte_data(client,0x0D,0x06);
-+ i2c_smbus_write_byte_data(client,0x11,0x2C);
-+ i2c_smbus_write_byte_data(client,0x2E,0x81);
- return VIDEO_MODE_NTSC;
- }
-
- /* 50Hz -> PAL/SECAM */
-- saa7110_write(decoder,0x0D,0x06);
-- saa7110_write(decoder,0x11,0x59);
-- saa7110_write(decoder,0x2E,0x9A);
-+ i2c_smbus_write_byte_data(client,0x0D,0x06);
-+ i2c_smbus_write_byte_data(client,0x11,0x59);
-+ i2c_smbus_write_byte_data(client,0x2E,0x9A);
-
- mdelay(150); /* pause 150 ms */
-
-- status = saa7110_read(decoder);
-+ status = i2c_smbus_read_byte(client);
- if ((status & 0x03) == 0x01) {
- DEBUG(printk(KERN_INFO "%s: norm=secam\n",dev->name));
-- saa7110_write(decoder,0x0D,0x07);
-+ i2c_smbus_write_byte_data(client,0x0D,0x07);
- return VIDEO_MODE_SECAM;
- }
- DEBUG(printk(KERN_INFO "%s: norm=pal\n",dev->name));
-@@ -188,7 +147,7 @@
- }
-
- static
--int saa7110_attach(struct i2c_device *device)
-+int saa7110_attach(struct i2c_adapter *adap, int addr, unsigned short flags, int kind)
- {
- static const unsigned char initseq[] = {
- 0, 0x4C, 0x3C, 0x0D, 0xEF, 0xBD, 0xF0, 0x00, 0x00,
-@@ -198,20 +157,28 @@
- 0xD9, 0x17, 0x40, 0x41, 0x80, 0x41, 0x80, 0x4F,
- 0xFE, 0x01, 0xCF, 0x0F, 0x03, 0x01, 0x81, 0x03,
- 0x40, 0x75, 0x01, 0x8C, 0x03};
-- struct saa7110* decoder;
-+ struct saa7110 *decoder;
-+ struct i2c_client *client;
- int rv;
--
-- device->data = decoder = kmalloc(sizeof(struct saa7110), GFP_KERNEL);
-- if (device->data == 0)
-+ client=kmalloc(sizeof(*client), GFP_KERNEL);
-+ if(client == NULL)
- return -ENOMEM;
--
-+ client_template.adapter = adap;
-+ client_template.addr = addr;
-+ memcpy(client, &client_template, sizeof(*client));
-+
-+ decoder = kmalloc(sizeof(*decoder), GFP_KERNEL);
-+ if (decoder == NULL) {
-+ kfree(client);
-+ return -ENOMEM;
-+ }
-
- /* clear our private data */
-- memset(decoder, 0, sizeof(struct saa7110));
-- strcpy(device->name, "saa7110");
-- decoder->bus = device->bus;
-- decoder->addr = device->addr;
-+ memset(decoder, 0, sizeof(*decoder));
-+ strcpy(client->name, IF_NAME);
-+ decoder->client = client;
-+ client->data = decoder;
-+ decoder->addr = addr;
- decoder->norm = VIDEO_MODE_PAL;
- decoder->input = 0;
- decoder->enable = 1;
-@@ -220,40 +187,52 @@
- decoder->hue = 32768;
- decoder->sat = 32768;
-
-- rv = saa7110_write_block(decoder, initseq, sizeof(initseq));
-+ rv = i2c_master_send(client, initseq, sizeof(initseq));
- if (rv < 0)
-- printk(KERN_ERR "%s_attach: init status %d\n", device->name, rv);
-+ printk(KERN_ERR "%s_attach: init status %d\n", client->name, rv);
- else {
-- saa7110_write(decoder,0x21,0x16);
-- saa7110_write(decoder,0x0D,0x04);
-- DEBUG(printk(KERN_INFO "%s_attach: chip version %x\n", device->name, saa7110_read(decoder)));
-- saa7110_write(decoder,0x0D,0x06);
-+ i2c_smbus_write_byte_data(client,0x21,0x16);
-+ i2c_smbus_write_byte_data(client,0x0D,0x04);
-+ DEBUG(printk(KERN_INFO "%s_attach: chip version %x\n", client->name, i2c_smbus_read_byte(client)));
-+ i2c_smbus_write_byte_data(client,0x0D,0x06);
- }
-
-+ init_MUTEX(&decoder->lock);
-+ i2c_attach_client(client);
- /* setup and implicit mode 0 select has been performed */
- return 0;
- }
-
-+static
-+int saa7110_probe(struct i2c_adapter *adap)
-+{
-+ return i2c_probe(adap, &addr_data, saa7110_attach);
-+}
-+
- static
--int saa7110_detach(struct i2c_device *device)
-+int saa7110_detach(struct i2c_client *client)
- {
-- struct saa7110* decoder = device->data;
-+ struct saa7110* decoder = client->data;
-
-- DEBUG(printk(KERN_INFO "%s_detach\n",device->name));
-+ i2c_detach_client(client);
-+
-+ DEBUG(printk(KERN_INFO "%s_detach\n",client->name));
-
- /* stop further output */
-- saa7110_write(decoder,0x0E,0x00);
-+ i2c_smbus_write_byte_data(client,0x0E,0x00);
-
-- kfree(device->data);
-+ kfree(decoder);
-+ kfree(client);
-
- return 0;
- }
-
- static
--int saa7110_command(struct i2c_device *device, unsigned int cmd, void *arg)
-+int saa7110_command(struct i2c_client *client, unsigned int cmd, void *arg)
- {
-- struct saa7110* decoder = device->data;
-+ struct saa7110* decoder = client->data;
- int v;
-
- switch (cmd) {
-@@ -272,11 +251,11 @@
-
- case DECODER_GET_STATUS:
- {
-- struct saa7110* decoder = device->data;
-+ struct saa7110* decoder = client->data;
- int status;
- int res = 0;
-
-- status = i2c_read(device->bus,device->addr|1);
-+ status = i2c_smbus_read_byte(client);
- if (status & 0x40)
- res |= DECODER_STATUS_GOOD;
- if (status & 0x03)
-@@ -301,26 +280,26 @@
- v = *(int*)arg;
- if (decoder->norm != v) {
- decoder->norm = v;
-- saa7110_write(decoder, 0x06, 0x00);
-+ i2c_smbus_write_byte_data(client, 0x06, 0x00);
- switch (v) {
- case VIDEO_MODE_NTSC:
-- saa7110_write(decoder, 0x0D, 0x06);
-- saa7110_write(decoder, 0x11, 0x2C);
-- saa7110_write(decoder, 0x30, 0x81);
-- saa7110_write(decoder, 0x2A, 0xDF);
-+ i2c_smbus_write_byte_data(client, 0x0D, 0x06);
-+ i2c_smbus_write_byte_data(client, 0x11, 0x2C);
-+ i2c_smbus_write_byte_data(client, 0x30, 0x81);
-+ i2c_smbus_write_byte_data(client, 0x2A, 0xDF);
- break;
- case VIDEO_MODE_PAL:
-- saa7110_write(decoder, 0x0D, 0x06);
-- saa7110_write(decoder, 0x11, 0x59);
-- saa7110_write(decoder, 0x2E, 0x9A);
-+ i2c_smbus_write_byte_data(client, 0x0D, 0x06);
-+ i2c_smbus_write_byte_data(client, 0x11, 0x59);
-+ i2c_smbus_write_byte_data(client, 0x2E, 0x9A);
- break;
- case VIDEO_MODE_SECAM:
-- saa7110_write(decoder, 0x0D, 0x07);
-- saa7110_write(decoder, 0x11, 0x59);
-- saa7110_write(decoder, 0x2E, 0x9A);
-+ i2c_smbus_write_byte_data(client, 0x0D, 0x07);
-+ i2c_smbus_write_byte_data(client, 0x11, 0x59);
-+ i2c_smbus_write_byte_data(client, 0x2E, 0x9A);
- break;
- case VIDEO_MODE_AUTO:
-- *(int*)arg = determine_norm(device);
-+ *(int*)arg = determine_norm(client);
- break;
- default:
- return -EPERM;
-@@ -334,7 +313,7 @@
- return -EINVAL;
- if (decoder->input != v) {
- decoder->input = v;
-- saa7110_selmux(device, v);
-+ saa7110_selmux(client, v);
- }
- break;
-
-@@ -349,7 +328,7 @@
- v = *(int*)arg;
- if (decoder->enable != v) {
- decoder->enable = v;
-- saa7110_write(decoder,0x0E, v ? 0x18 : 0x00);
-+ i2c_smbus_write_byte_data(client,0x0E, v ? 0x18 : 0x00);
- }
- break;
-
-@@ -360,22 +339,22 @@
- if (decoder->bright != pic->brightness) {
- /* We want 0 to 255 we get 0-65535 */
- decoder->bright = pic->brightness;
-- saa7110_write(decoder, 0x19, decoder->bright >> 8);
-+ i2c_smbus_write_byte_data(client, 0x19, decoder->bright >> 8);
- }
- if (decoder->contrast != pic->contrast) {
- /* We want 0 to 127 we get 0-65535 */
- decoder->contrast = pic->contrast;
-- saa7110_write(decoder, 0x13, decoder->contrast >> 9);
-+ i2c_smbus_write_byte_data(client, 0x13, decoder->contrast >> 9);
- }
- if (decoder->sat != pic->colour) {
- /* We want 0 to 127 we get 0-65535 */
- decoder->sat = pic->colour;
-- saa7110_write(decoder, 0x12, decoder->sat >> 9);
-+ i2c_smbus_write_byte_data(client, 0x12, decoder->sat >> 9);
- }
- if (decoder->hue != pic->hue) {
- /* We want -128 to 127 we get 0-65535 */
- decoder->hue = pic->hue;
-- saa7110_write(decoder, 0x07, (decoder->hue>>8)-128);
-+ i2c_smbus_write_byte_data(client, 0x07, (decoder->hue>>8)-128);
- }
- }
- break;
-@@ -383,7 +362,7 @@
- case DECODER_DUMP:
- for (v=0; v<34; v+=16) {
- int j;
-- DEBUG(printk(KERN_INFO "%s: %03x\n",device->name,v));
-+ DEBUG(printk(KERN_INFO "%s: %03x\n",client->name,v));
- for (j=0; j<16; j++) {
- DEBUG(printk(KERN_INFO " %02x",decoder->reg[v+j]));
- }
-@@ -402,24 +381,30 @@
-
- static struct i2c_driver i2c_driver_saa7110 =
- {
-- "saa7110", /* name */
--
-- I2C_DRIVERID_VIDEODECODER, /* in i2c.h */
-- I2C_SAA7110, I2C_SAA7110+1, /* Addr range */
--
-- saa7110_attach,
-- saa7110_detach,
-- saa7110_command
-+ .owner = THIS_MODULE,
-+ .name = IF_NAME,
-+ .id = I2C_DRIVERID_SAA7110,
-+ .flags = I2C_DF_NOTIFY,
-+ .attach_adapter = saa7110_probe,
-+ .detach_adapter = saa7110_detach,
-+ .command = saa7110_command,
- };
-+static struct i2c_client client_template = {
-+ "saa7110_client",
-+ -1,
-+ 0,
-+ 0,
-+ NULL,
-+ &i2c_driver_saa7110
-+};
-
- static int saa7110_init(void)
- {
-- return i2c_register_driver(&i2c_driver_saa7110);
-+ return i2c_add_driver(&i2c_driver_saa7110);
- }
-
- static void saa7110_exit(void)
- {
-- i2c_unregister_driver(&i2c_driver_saa7110);
-+ i2c_del_driver(&i2c_driver_saa7110);
- }
-
-
-
-
+++ /dev/null
-Primitive parallel port is driver for i2c bus, which exploits
-features of modern bidirectional parallel ports.
-
-Bidirectional ports have particular bits connected in following way:
-
- |
- /-----| R
- --o| |-----|
- read \-----| /------- Out pin
- |/
- - -|\
- write V
- |
- ---
-
-
-It means when output is set to 1 we can read the port. Therefore
-we can use 2 pins of parallel port as SDA and SCL for i2c bus. It
-is not necessary to add any external - additional parts, we can
-read and write the same port simultaneously.
- I only use register base+2 so it is possible to use all
-8 data bits of parallel port for other applications (I have
-connected EEPROM and LCD display). I do not use bit Enable Bi-directional
- Port. The only disadvantage is we can only support 5V chips.
-
-Layout:
-
-Cannon 25 pin
-
-SDA - connect to pin 14 (Auto Linefeed)
-SCL - connect to pin 16 (Initialize Printer)
-GND - connect to pin 18-25
-+5V - use external supply (I use 5V from 3.5" floppy connector)
-
-no pullups requied
-
-Module parameters:
-
-base = 0xXXX
-XXX - 278 or 378
-
-That's all.
-
-Daniel Smolik
-marvin@sitour.cz
+++ /dev/null
-i2c-velleman driver
--------------------
-This is a driver for i2c-hw access for Velleman K8000 and other adapters.
-
-Useful links
-------------
-Velleman:
- http://www.velleman.be/
-
-Velleman K8000 Howto:
- http://howto.htlw16.ac.at/k8000-howto.html
-
-K8000 and K8005 libraries
--------------------------
-The project has lead to new libs for the Velleman K8000 and K8005:
-LIBK8000 v1.99.1 and LIBK8005 v0.21
-
-With these libs, you can control the K8000 interface card and the K8005
-stepper motor card with the simple commands which are in the original
-Velleman software, like SetIOchannel, ReadADchannel, SendStepCCWFull and
-many more, using /dev/velleman.
-
-The libs can be found on http://groups.yahoo.com/group/k8000/files/linux/
+++ /dev/null
-$Id: README.eicon,v 1.10.6.1 2001/02/19 10:04:59 armin Exp $
-
-(c) 1999,2000 Armin Schindler (mac@melware.de)
-(c) 1999,2000 Cytronics & Melware (info@melware.de)
-
-This document describes the eicon driver for the
-Eicon active ISDN cards.
-
-It is meant to be used with isdn4linux, an ISDN link-level module for Linux.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
-
-
-Supported Cards
-===============
-
-Old ISA type
-------------
-- S-Card ISA
-- SX-Card ISA
-- SXn-Card ISA
-- SCOM-Card ISA
-- Quadro-Card ISA
-- S2M-Card ISA
-
-DIVA Server family
-------------------
-- DIVA Server BRI/PCI 2M
-- DIVA Server PRI/PCI 2M (9M 23M 30M)
-- DIVA Server 4BRI/PCI
- supported functions of onboard DSPs:
- - analog modem
- - fax group 2/3 (Fax Class 2 commands)
- - DTMF detection
-
-
-ISDN D-Channel Protocols
-------------------------
-
-- ETSI (Euro-DSS1)
-- 1TR6 (German ISDN) *not testet*
-- other protocols exist for the range of DIVA Server cards,
- but they are not fully testet yet.
-
-
-You can load the module simply by using the insmod or modprobe function :
-
- insmod eicon [id=driverid] [membase=<membase>] [irq=<irq>]
-
-
-The module will automatically probe the PCI-cards. If the id-option
-is omitted, the driver will assume 'eicon0' for the first pci card and
-increases the digit with each further card. With a given driver-id
-the module appends a number starting with '0'.
-
-For ISA-cards you have to specify membase, irq and id. If id or
-membase is missing/invalid, the driver will not be loaded except
-PCI-cards were found. Additional ISA-cards and irq/membase changes
-can be done with the eiconctrl utility.
-
-After loading the module, you have to download the protocol and
-dsp-code by using the eiconctrl utility of isdn4k-utils.
-
-
-Example for loading and starting a BRI card with E-DSS1 Protocol.
-
- eiconctrl [-d DriverId] load etsi
-
-Example for a BRI card with E-DSS1 Protocol with PtP configuration.
-
- eiconctrl [-d DriverId] load etsi -n -t1 -s1
-
-
-Example for loading and starting a PRI card with E-DSS1 Protocol.
-
- eiconctrl [-d DriverId] load etsi -s2 -n
-
-
-Details about using the eiconctrl utility are in 'man eiconctrl'
-or will be printed by starting eiconctrl without any parameters.
-
-ISDNLOG:
-With eicon driver version 1.77 or newer and the eiconctrl utility
-of version 1.1 or better, you can use the isdnlog user program
-with your DIVA Server BRI card.
-Just use "eiconctrl isdnlog on" and the driver will generate
-the necessary D-Channel traces for isdnlog.
-
-
-
-Thanks to
- Deutsche Mailbox Saar-Lor-Lux GmbH
- for sponsoring and testing fax
- capabilities with Diva Server cards.
-
-
-Any reports about bugs, errors and even wishes are welcome.
-
-
-Have fun !
-
-Armin Schindler
-mac@melware.de
-http://www.melware.de
-
+++ /dev/null
-#!/bin/sh
-# Script to create device nodes for SMART array controllers
-# Usage:
-# mkdev.cciss [num controllers] [num log volumes] [num partitions]
-#
-# With no arguments, the script assumes 1 controller, 16 logical volumes,
-# and 16 partitions/volume, which is adequate for most configurations.
-#
-# If you had 5 controllers and were planning on no more than 4 logical volumes
-# each, using a maximum of 8 partitions per volume, you could say:
-#
-# mkdev.cciss 5 4 8
-#
-# Of course, this has no real benefit over "mkdev.cciss 5" except that it
-# doesn't create so many device nodes in /dev/cciss.
-
-NR_CTLR=${1-1}
-NR_VOL=${2-16}
-NR_PART=${3-16}
-
-if [ ! -d /dev/cciss ]; then
- mkdir -p /dev/cciss
-fi
-
-C=0; while [ $C -lt $NR_CTLR ]; do
- MAJ=`expr $C + 104`
- D=0; while [ $D -lt $NR_VOL ]; do
- P=0; while [ $P -lt $NR_PART ]; do
- MIN=`expr $D \* 16 + $P`
- if [ $P -eq 0 ]; then
- mknod /dev/cciss/c${C}d${D} b $MAJ $MIN
- else
- mknod /dev/cciss/c${C}d${D}p${P} b $MAJ $MIN
- fi
- P=`expr $P + 1`
- done
- D=`expr $D + 1`
- done
- C=`expr $C + 1`
-done
+++ /dev/null
-#!/bin/sh
-# Script to create device nodes for SMART array controllers
-# Usage:
-# mkdev.ida [num controllers] [num log volumes] [num partitions]
-#
-# With no arguments, the script assumes 1 controller, 16 logical volumes,
-# and 16 partitions/volume, which is adequate for most configurations.
-#
-# If you had 5 controllers and were planning on no more than 4 logical volumes
-# each, using a maximum of 8 partitions per volume, you could say:
-#
-# mkdev.ida 5 4 8
-#
-# Of course, this has no real benefit over "mkdev.ida 5" except that it
-# doesn't create so many device nodes in /dev/ida.
-
-NR_CTLR=${1-1}
-NR_VOL=${2-16}
-NR_PART=${3-16}
-
-if [ ! -d /dev/ida ]; then
- mkdir -p /dev/ida
-fi
-
-C=0; while [ $C -lt $NR_CTLR ]; do
- MAJ=`expr $C + 72`
- D=0; while [ $D -lt $NR_VOL ]; do
- P=0; while [ $P -lt $NR_PART ]; do
- MIN=`expr $D \* 16 + $P`
- if [ $P -eq 0 ]; then
- mknod /dev/ida/c${C}d${D} b $MAJ $MIN
- else
- mknod /dev/ida/c${C}d${D}p${P} b $MAJ $MIN
- fi
- P=`expr $P + 1`
- done
- D=`expr $D + 1`
- done
- C=`expr $C + 1`
-done
+++ /dev/null
-Sat Jan 18 15:51:45 1997 Richard Henderson <rth@tamu.edu>
-
- * Don't play with usage_count directly, instead hand around
- the module header and use the module macros.
-
-Fri May 17 00:00:00 1996 Leonard N. Zubkoff <lnz@dandelion.com>
-
- * BusLogic Driver Version 2.0.3 Released.
-
-Tue Apr 16 21:00:00 1996 Leonard N. Zubkoff <lnz@dandelion.com>
-
- * BusLogic Driver Version 1.3.2 Released.
-
-Sun Dec 31 23:26:00 1995 Leonard N. Zubkoff <lnz@dandelion.com>
-
- * BusLogic Driver Version 1.3.1 Released.
-
-Fri Nov 10 15:29:49 1995 Leonard N. Zubkoff <lnz@dandelion.com>
-
- * Released new BusLogic driver.
-
-Wed Aug 9 22:37:04 1995 Andries Brouwer <aeb@cwi.nl>
-
- As a preparation for new device code, separated the various
- functions the request->dev field had into the device proper,
- request->rq_dev and a status field request->rq_status.
-
- The 2nd argument of bios_param is now a kdev_t.
-
-Wed Jul 19 10:43:15 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * scsi.c (scsi_proc_info): /proc/scsi/scsi now also lists all
- attached devices.
-
- * scsi_proc.c (proc_print_scsidevice): Added. Used by scsi.c and
- eata_dma_proc.c to produce some device info for /proc/scsi.
-
- * eata_dma.c (eata_queue)(eata_int_handler)(eata_scsi_done):
- Changed handling of internal SCSI commands send to the HBA.
-
-
-Wed Jul 19 10:09:17 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.11 released.
-
- * eata_dma.c (eata_queue)(eata_int_handler): Added code to do
- command latency measurements if requested by root through
- /proc/scsi interface.
- Throughout Use HZ constant for time references.
-
- * eata_pio.c: Use HZ constant for time references.
-
- * aic7xxx.c, aic7xxx.h, aic7xxx_asm.c: Changed copyright from BSD
- to GNU style.
-
- * scsi.h: Added READ_12 command opcode constant
-
-Wed Jul 19 09:25:30 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.10 released.
-
- * scsi_proc.c (dispatch_scsi_info): Removed unused variable.
-
-Wed Jul 19 09:25:30 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.9 released.
-
- * scsi.c Blacklist concept expanded to 'support' more device
- deficiencies. blacklist[] renamed to device_list[]
- (scan_scsis): Code cleanup.
-
- * scsi_debug.c (scsi_debug_proc_info): Added support to control
- device lockup simulation via /proc/scsi interface.
-
-
-Wed Jul 19 09:22:34 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.7 released.
-
- * scsi_proc.c: Fixed a number of bugs in directory handling
-
-Wed Jul 19 09:18:28 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.5 released.
-
- * Native wide, multichannel and /proc/scsi support now in official
- kernel distribution.
-
- * scsi.c/h, hosts.c/h et al reindented to increase readability
- (especially on 80 column wide terminals).
-
- * scsi.c, scsi_proc.c, ../../fs/proc/inode.c: Added
- /proc/scsi/scsi which allows root to scan for hotplugged devices.
-
- * scsi.c (scsi_proc_info): Added, to support /proc/scsi/scsi.
- (scan_scsis): Added some 'spaghetti' code to allow scanning for
- single devices.
-
-
-Thu Jun 20 15:20:27 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * proc.c: Renamed to scsi_proc.c
-
-Mon Jun 12 20:32:45 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * Linux 1.3.0 released.
-
-Mon May 15 19:33:14 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * scsi.c: Added native multichannel and wide scsi support.
-
- * proc.c (dispatch_scsi_info) (build_proc_dir_hba_entries):
- Updated /proc/scsi interface.
-
-Thu May 4 17:58:48 1995 Michael Neuffer <neuffer@goofy.zdv.uni-mainz.de>
-
- * sd.c (requeue_sd_request): Zero out the scatterlist only if
- scsi_malloc returned memory for it.
-
- * eata_dma.c (register_HBA) (eata_queue): Add support for
- large scatter/gather tables and set use_clustering accordingly
-
- * hosts.c: Make use_clustering changeable in the Scsi_Host structure.
-
-Wed Apr 12 15:25:52 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.2.5 released.
-
- * buslogic.c: Update to version 1.15 (From Leonard N. Zubkoff).
- Fixed interrupt routine to avoid races when handling multiple
- complete commands per interrupt. Seems to come up with faster
- cards.
-
- * eata_dma.c: Update to 2.3.5r. Modularize. Improved error handling
- throughout and fixed bug interrupt routine which resulted in shifted
- status bytes. Added blink LED state checks for ISA and EISA HBAs.
- Memory management bug seems to have disappeared ==> increasing
- C_P_L_CURRENT_MAX to 16 for now. Decreasing C_P_L_DIV to 3 for
- performance reasons.
-
- * scsi.c: If we get a FMK, EOM, or ILI when attempting to scan
- the bus, assume that it was just noise on the bus, and ignore
- the device.
-
- * scsi.h: Update and add a bunch of missing commands which we
- were never using.
-
- * sd.c: Use restore_flags in do_sd_request - this may result in
- latency conditions, but it gets rid of races and crashes.
- Do not save flags again when searching for a second command to
- queue.
-
- * st.c: Use bytes, not STP->buffer->buffer_size when reading
- from tape.
-
-
-Tue Apr 4 09:42:08 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.2.4 released.
-
- * st.c: Fix typo - restoring wrong flags.
-
-Wed Mar 29 06:55:12 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.2.3 released.
-
- * st.c: Perform some waiting operations with interrupts off.
- Is this correct???
-
-Wed Mar 22 10:34:26 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.2.2 released.
-
- * aha152x.c: Modularize. Add support for PCMCIA.
-
- * eata.c: Update to version 2.0. Fixed bug preventing media
- detection. If scsi_register_host returns NULL, fail gracefully.
-
- * scsi.c: Detect as NEC (for photo-cd purposes) for the 84
- and 25 models as "NEC_OLDCDR".
-
- * scsi.h: Add define for NEC_OLDCDR
-
- * sr.c: Add handling for NEC_OLDCDR. Treat as unknown.
-
- * u14-34f.c: Update to version 2.0. Fixed same bug as in
- eata.c.
-
-
-Mon Mar 6 11:11:20 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.2.0 released. Yeah!!!
-
- * Minor spelling/punctuation changes throughout. Nothing
- substantive.
-
-Mon Feb 20 21:33:03 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.95 released.
-
- * qlogic.c: Update to version 0.41.
-
- * seagate.c: Change some message to be more descriptive about what
- we detected.
-
- * sr.c: spelling/whitespace changes.
-
-Mon Feb 20 21:33:03 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.94 released.
-
-Mon Feb 20 08:57:17 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.93 released.
-
- * hosts.h: Change io_port to long int from short.
-
- * 53c7,8xx.c: crash on AEN fixed, SCSI reset is no longer a NOP,
- NULL pointer panic on odd UDCs fixed, two bugs in diagnostic output
- fixed, should initialize correctly if left running, now loadable,
- new memory allocation, extraneous diagnostic output suppressed,
- splx() replaced with save/restore flags. [ Drew ]
-
- * hosts.c, hosts.h, scsi_ioctl.c, sd.c, sd_ioctl.c, sg.c, sr.c,
- sr_ioctl.c: Add special junk at end that Emacs will use for
- formatting the file.
-
- * qlogic.c: Update to v0.40a. Improve parity handling.
-
- * scsi.c: Add Hitachi DK312C to blacklist. Change "};" to "}" in
- many places. Use scsi_init_malloc to get command block - may
- need this to be dma compatible for some host adapters.
- Restore interrupts after unregistering a host.
-
- * sd.c: Use sti instead of restore flags - causes latency problems.
-
- * seagate.c: Use controller_type to determine string used when
- registering irq.
-
- * sr.c: More photo-cd hacks to make sure we get the xa stuff right.
- * sr.h, sr.c: Change is_xa to xa_flags field.
-
- * st.c: Disable retries for write operations.
-
-Wed Feb 15 10:52:56 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.92 released.
-
- * eata.c: Update to 1.17.
-
- * eata_dma.c: Update to 2.31a. Add more support for /proc/scsi.
- Continuing modularization. Less crashes because of the bug in the
- memory management ==> increase C_P_L_CURRENT_MAX to 10
- and decrease C_P_L_DIV to 4.
-
- * hosts.c: If we remove last host registered, reuse host number.
- When freeing memory from host being deregistered, free extra_bytes
- too.
-
- * scsi.c (scan_scsis): memset(SDpnt, 0) and set SCmd.device to SDpnt.
- Change memory allocation to work around bugs in __get_dma_pages.
- Do not free host if usage count is not zero (for modules).
-
- * sr_ioctl.c: Increase IOCTL_TIMEOUT to 3000.
-
- * st.c: Allow for ST_EXTRA_DEVS in st data structures.
-
- * u14-34f.c: Update to 1.17.
-
-Thu Feb 9 10:11:16 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.91 released.
-
- * eata.c: Update to 1.16. Use wish_block instead of host->block.
-
- * hosts.c: Initialize wish_block to 0.
-
- * hosts.h: Add wish_block.
-
- * scsi.c: Use wish_block as indicator that the host should be added
- to block list.
-
- * sg.c: Add SG_EXTRA_DEVS to number of slots.
-
- * u14-34f.c: Use wish_block.
-
-Tue Feb 7 11:46:04 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.90 released.
-
- * eata.c: Change naming from eata_* to eata2x_*. Now at vers 1.15.
- Update interrupt handler to take pt_regs as arg. Allow blocking
- even if loaded as module. Initialize target_time_out array.
- Do not put sti(); in timing loop.
-
- * hosts.c: Do not reuse host numbers.
- Use scsi_make_blocked_list to generate blocking list.
-
- * script_asm.pl: Beats me. Don't know perl. Something to do with
- phase index.
-
- * scsi.c (scsi_make_blocked_list): New function - code copied from
- hosts.c.
-
- * scsi.c: Update code to disable photo CD for Toshiba cdroms.
- Use just manufacturer name, not model number.
-
- * sr.c: Fix setting density for Toshiba drives.
-
- * u14-34f.c: Clear target_time_out array during reset.
-
-Wed Feb 1 09:20:45 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.89 released.
-
- * Makefile, u14-34f.c: Modularize.
-
- * Makefile, eata.c: Modularize. Now version 1.14
-
- * NCR5380.c: Update interrupt handler with new arglist. Minor
- cleanups.
-
- * eata_dma.c: Begin to modularize. Add hooks for /proc/scsi.
- New version 2.3.0a. Add code in interrupt handler to allow
- certain CDROM drivers to be detected which return a
- CHECK_CONDITION during SCSI bus scan. Add opcode check to get
- all DATA IN and DATA OUT phases right. Utilize HBA_interpret flag.
- Improvements in HBA identification. Various other minor stuff.
-
- * hosts.c: Initialize ->dma_channel and ->io_port when registering
- a new host.
-
- * qlogic.c: Modularize and add PCMCIA support.
-
- * scsi.c: Add Hitachi to blacklist.
-
- * scsi.c: Change default to no lun scan (too many problem devices).
-
- * scsi.h: Define QUEUE_FULL condition.
-
- * sd.c: Do not check for non-existent partition until after
- new media check.
-
- * sg.c: Undo previous change which was wrong.
-
- * sr_ioctl.c: Increase IOCTL_TIMEOUT to 2000.
-
- * st.c: Patches from Kai - improve filemark handling.
-
-Tue Jan 31 17:32:12 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.88 released.
-
- * Throughout - spelling/grammar fixups.
-
- * scsi.c: Make sure that all buffers are 16 byte aligned - some
- drivers (buslogic) need this.
-
- * scsi.c (scan_scsis): Remove message printed.
-
- * scsi.c (scsi_init): Move message here.
-
-Mon Jan 30 06:40:25 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.87 released.
-
- * sr.c: Photo-cd related changes. (Gerd Knorr??).
-
- * st.c: Changes from Kai related to EOM detection.
-
-Mon Jan 23 23:53:10 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.86 released.
-
- * 53c7,8xx.h: Change SG size to 127.
-
- * eata_dma: Update to version 2.10i. Remove bug in the registration
- of multiple HBAs and channels. Minor other improvements and stylistic
- changes.
-
- * scsi.c: Test for Toshiba XM-3401TA and exclude from detection
- as toshiba drive - photo cd does not work with this drive.
-
- * sr.c: Update photocd code.
-
-Mon Jan 23 23:53:10 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.85 released.
-
- * st.c, st_ioctl.c, sg.c, sd_ioctl.c, scsi_ioctl.c, hosts.c:
- include linux/mm.h
-
- * qlogic.c, buslogic.c, aha1542.c: Include linux/module.h.
-
-Sun Jan 22 22:08:46 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.84 released.
-
- * Makefile: Support for loadable QLOGIC boards.
-
- * aha152x.c: Update to version 1.8 from Juergen.
-
- * eata_dma.c: Update from Michael Neuffer.
- Remove hard limit of 2 commands per lun and make it better
- configurable. Improvements in HBA identification.
-
- * in2000.c: Fix biosparam to support large disks.
-
- * qlogic.c: Minor changes (change sti -> restore_flags).
-
-Wed Jan 18 23:33:09 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.83 released.
-
- * aha1542.c(aha1542_intr_handle): Use arguments handed down to find
- which irq.
-
- * buslogic.c: Likewise.
-
- * eata_dma.c: Use min of 2 cmd_per_lun for OCS_enabled boards.
-
- * scsi.c: Make RECOVERED_ERROR a SUGGEST_IS_OK.
-
- * sd.c: Fail if we are opening a non-existent partition.
-
- * sr.c: Bump SR_TIMEOUT to 15000.
- Do not probe for media size at boot time(hard on changers).
- Flag device as needing sector size instead.
-
- * sr_ioctl.c: Remove CDROMMULTISESSION_SYS ioctl.
-
- * ultrastor.c: Fix bug in call to ultrastor_interrupt (wrong #args).
-
-Mon Jan 16 07:18:23 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.82 released.
-
- Throughout.
- - Change all interrupt handlers to accept new calling convention.
- In particular, we now receive the irq number as one of the arguments.
-
- * More minor spelling corrections in some of the new files.
-
- * aha1542.c, buslogic.c: Clean up interrupt handler a little now
- that we receive the irq as an arg.
-
- * aha274x.c: s/snarf_region/request_region/
-
- * eata.c: Update to version 1.12. Fix some comments and display a
- message if we cannot reserve the port addresses.
-
- * u14-34f.c: Update to version 1.13. Fix some comments and display a
- message if we cannot reserve the port addresses.
-
- * eata_dma.c: Define get_board_data function (send INQUIRY command).
- Use to improve detection of variants of different DPT boards. Change
- version subnumber to "0g".
-
- * fdomain.c: Update to version 5.26. Improve detection of some boards
- repackaged by IBM.
-
- * scsi.c (scsi_register_host): Change "name" to const char *.
-
- * sr.c: Fix problem in set mode command for Toshiba drives.
-
- * sr.c: Fix typo from patch 81.
-
-Fri Jan 13 12:54:46 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.81 released. Codefreeze for 1.2 release announced.
-
- Big changes here.
-
- * eata_dma.*: New files from Michael Neuffer.
- (neuffer@goofy.zdv.uni-mainz.de). Should support
- all eata/dpt cards.
-
- * hosts.c, Makefile: Add eata_dma.
-
- * README.st: Document MTEOM.
-
- Patches from me (ERY) to finish support for low-level loadable scsi.
- It now works, and is actually useful.
-
- * Throughout - add new argument to scsi_init_malloc that takes an
- additional parameter. This is used as a priority to kmalloc,
- and you can specify the GFP_DMA flag if you need DMA-able memory.
-
- * Makefile: For source files that are loadable, always add name
- to SCSI_SRCS. Fill in modules: target.
-
- * hosts.c: Change next_host to next_scsi_host, and make global.
- Print hosts after we have identified all of them. Use info()
- function if present, otherwise use name field.
-
- * hosts.h: Change attach function to return int, not void.
- Define number of device slots to allow for loadable devices.
- Define tags to tell scsi module code what type of module we
- are loading.
-
- * scsi.c: Fix scan_scsis so that it can be run by a user process.
- Do not use waiting loops - use up and down mechanism as long
- as current != task[0].
-
- * scsi.c(scan_scsis): Do not use stack variables for I/O - this
- could be > 16Mb if we are loading a module at runtime (i.e. use
- scsi_init_malloc to get some memory we know will be safe).
-
- * scsi.c: Change dma freelist to be a set of pages. This allows
- us to dynamically adjust the size of the list by adding more pages
- to the pagelist. Fix scsi_malloc and scsi_free accordingly.
-
- * scsi_module.c: Fix include.
-
- * sd.c: Declare detach function. Increment/decrement module usage
- count as required. Fix init functions to allow loaded devices.
- Revalidate all new disks so we get the partition tables. Define
- detach function.
-
- * sr.c: Likewise.
-
- * sg.c: Declare detach function. Allow attachment of devices on
- loaded drivers.
-
- * st.c: Declare detach function. Increment/decrement module usage
- count as required.
-
-Tue Jan 10 10:09:58 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.79 released.
-
- Patch from some undetermined individual who needs to get a life :-).
-
- * sr.c: Attacked by spelling bee...
-
- Patches from Gerd Knorr:
-
- * sr.c: make printk messages for photoCD a little more informative.
-
- * sr_ioctl.c: Fix CDROMMULTISESSION_SYS ioctl.
-
-Mon Jan 9 10:01:37 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.78 released.
-
- * Makefile: Add empty modules: target.
-
- * Wheee. Now change register_iomem to request_region.
-
- * in2000.c: Bugfix - apparently this is the fix that we have
- all been waiting for. It fixes a problem whereby the driver
- is not stable under heavy load. Race condition and all that.
- Patch from Peter Lu.
-
-Wed Jan 4 21:17:40 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.77 released.
-
- * 53c7,8xx.c: Fix from Linus - emulate splx.
-
- Throughout:
-
- Change "snarf_region" with "register_iomem".
-
- * scsi_module.c: New file. Contains support for low-level loadable
- scsi drivers. [ERY].
-
- * sd.c: More s/int/long/ changes.
-
- * seagate.c: Explicitly include linux/config.h
-
- * sg.c: Increment/decrement module usage count on open/close.
-
- * sg.c: Be a bit more careful about the user not supplying enough
- information for a valid command. Pass correct size down to
- scsi_do_cmd.
-
- * sr.c: More changes for Photo-CD. This apparently breaks NEC drives.
-
- * sr_ioctl.c: Support CDROMMULTISESSION ioctl.
-
-
-Sun Jan 1 19:55:21 1995 Eric Youngdale (eric@andante)
-
- * Linux 1.1.76 released.
-
- * constants.c: Add type cast in switch statement.
-
- * scsi.c (scsi_free): Change datatype of "offset" to long.
- (scsi_malloc): Change a few more variables to long. Who
- did this and why was it important? 64 bit machines?
-
-
- Lots of changes to use save_state/restore_state instead of cli/sti.
- Files changed include:
-
- * aha1542.c:
- * aha1740.c:
- * buslogic.c:
- * in2000.c:
- * scsi.c:
- * scsi_debug.c:
- * sd.c:
- * sr.c:
- * st.c:
-
-Wed Dec 28 16:38:29 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.75 released.
-
- * buslogic.c: Spelling fix.
-
- * scsi.c: Add HP C1790A and C2500A scanjet to blacklist.
-
- * scsi.c: Spelling fixup.
-
- * sd.c: Add support for sd_hardsizes (hard sector sizes).
-
- * ultrastor.c: Use save_flags/restore_flags instead of cli/sti.
-
-Fri Dec 23 13:36:25 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.74 released.
-
- * README.st: Update from Kai Makisara.
-
- * eata.c: New version from Dario - version 1.11.
- use scsicam bios_param routine. Add support for 2011
- and 2021 boards.
-
- * hosts.c: Add support for blocking. Linked list automatically
- generated when shpnt->block is set.
-
- * scsi.c: Add sankyo & HP scanjet to blacklist. Add support for
- kicking things loose when we deadlock.
-
- * scsi.c: Recognize scanners and processors in scan_scsis.
-
- * scsi_ioctl.h: Increase timeout to 9 seconds.
-
- * st.c: New version from Kai - add better support for backspace.
-
- * u14-34f.c: New version from Dario. Supports blocking.
-
-Wed Dec 14 14:46:30 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.73 released.
-
- * buslogic.c: Update from Dave Gentzel. Version 1.14.
- Add module related stuff. More fault tolerant if out of
- DMA memory.
-
- * fdomain.c: New version from Rik Faith - version 5.22. Add support
- for ISA-200S SCSI adapter.
-
- * hosts.c: Spelling.
-
- * qlogic.c: Update to version 0.38a. Add more support for PCMCIA.
-
- * scsi.c: Mask device type with 0x1f during scan_scsis.
- Add support for deadlocking, err, make that getting out of
- deadlock situations that are created when we allow the user
- to limit requests to one host adapter at a time.
-
- * scsi.c: Bugfix - pass pid, not SCpnt as second arg to
- scsi_times_out.
-
- * scsi.c: Restore interrupt state to previous value instead of using
- cli/sti pairs.
-
- * scsi.c: Add a bunch of module stuff (all commented out for now).
-
- * scsi.c: Clean up scsi_dump_status.
-
-Tue Dec 6 12:34:20 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.72 released.
-
- * sg.c: Bugfix - always use sg_free, since we might have big buff.
-
-Fri Dec 2 11:24:53 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.71 released.
-
- * sg.c: Clear buff field when not in use. Only call scsi_free if
- non-null.
-
- * scsi.h: Call wake_up(&wait_for_request) when done with a
- command.
-
- * scsi.c (scsi_times_out): Pass pid down so that we can protect
- against race conditions.
-
- * scsi.c (scsi_abort): Zero timeout field if we get the
- NOT_RUNNING message back from low-level driver.
-
-
- * scsi.c (scsi_done): Restore cmd_len, use_sg here.
-
- * scsi.c (request_sense): Not here.
-
- * hosts.h: Add new forbidden_addr, forbidden_size fields. Who
- added these and why????
-
- * hosts.c (scsi_mem_init): Mark pages as reserved if they fall in
- the forbidden regions. I am not sure - I think this is so that
- we can deal with boards that do incomplete decoding of their
- address lines for the bios chips, but I am not entirely sure.
-
- * buslogic.c: Set forbidden_addr stuff if using a buggy board.
-
- * aha1740.c: Test for NULL pointer in SCtmp. This should not
- occur, but a nice message is better than a kernel segfault.
-
- * 53c7,8xx.c: Add new PCI chip ID for 815.
-
-Fri Dec 2 11:24:53 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.70 released.
-
- * ChangeLog, st.c: Spelling.
-
-Tue Nov 29 18:48:42 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.69 released.
-
- * u14-34f.h: Non-functional change. [Dario].
-
- * u14-34f.c: Use block field in Scsi_Host to prevent commands from
- being queued to more than one host at the same time (used when
- motherboard does not deal with multiple bus-masters very well).
- Only when SINGLE_HOST_OPERATIONS is defined.
- Use new cmd_per_lun field. [Dario]
-
- * eata.c: Likewise.
-
- * st.c: More changes from Kai. Add ready flag to indicate drive
- status.
-
- * README.st: Document this.
-
- * sr.c: Bugfix (do not subtract CD_BLOCK_OFFSET) for photo-cd
- code.
-
- * sg.c: Bugfix - fix problem where opcode is not correctly set up.
-
- * seagate.[c,h]: Use #defines to set driver name.
-
- * scsi_ioctl.c: Zero buffer before executing command.
-
- * scsi.c: Use new cmd_per_lun field in Scsi_Hosts as appropriate.
- Add Sony CDU55S to blacklist.
-
- * hosts.h: Add new cmd_per_lun field to Scsi_Hosts.
-
- * hosts.c: Initialize cmd_per_lun in Scsi_Hosts from template.
-
- * buslogic.c: Use cmd_per_lun field - initialize to different
- values depending upon bus type (i.e. use 1 if ISA, so we do not
- hog memory). Use other patches which got lost from 1.1.68.
-
- * aha1542.c: Spelling.
-
-Tue Nov 29 15:43:50 1994 Eric Youngdale (eric@andante.aib.com)
-
- * Linux 1.1.68 released.
-
- Add support for 12 byte vendor specific commands in scsi-generics,
- more (i.e. the last mandatory) low-level changes to support
- loadable modules, plus a few other changes people have requested
- lately. Changes by me (ERY) unless otherwise noted. Spelling
- changes appear from some unknown corner of the universe.
-
- * Throughout: Change COMMAND_SIZE() to use SCpnt->cmd_len.
-
- * Throughout: Change info() low level function to take a Scsi_Host
- pointer. This way the info function can return specific
- information about the host in question, if desired.
-
- * All low-level drivers: Add NULL in initializer for the
- usage_count field added to Scsi_Host_Template.
-
- * aha152x.[c,h]: Remove redundant info() function.
-
- * aha1542.[c,h]: Likewise.
-
- * aha1740.[c,h]: Likewise.
-
- * aha274x.[c,h]: Likewise.
-
- * eata.[c,h]: Likewise.
-
- * pas16.[c,h]: Likewise.
-
- * scsi_debug.[c,h]: Likewise.
-
- * t128.[c,h]: Likewise.
-
- * u14-34f.[c,h]: Likewise.
-
- * ultrastor.[c,h]: Likewise.
-
- * wd7000.[c,h]: Likewise.
-
- * aha1542.c: Add support for command line options with lilo to set
- DMA parameters, I/O port. From Matt Aarnio.
-
- * buslogic.[c,h]: New version (1.13) from Dave Gentzel.
-
- * hosts.h: Add new field to Scsi_Hosts "block" to allow blocking
- all I/O to certain other cards. Helps prevent problems with some
- ISA motherboards.
-
- * hosts.h: Add usage_count to Scsi_Host_Template.
-
- * hosts.h: Add n_io_port to Scsi_Host (used when releasing module).
-
- * hosts.c: Initialize block field.
-
- * in2000.c: Remove "static" declarations from exported functions.
-
- * in2000.h: Likewise.
-
- * scsi.c: Correctly set cmd_len field as required. Save and
- change setting when doing a request_sense, restore when done.
- Move abort timeout message. Fix panic in request_queueable to
- print correct function name.
-
- * scsi.c: When incrementing usage count, walk block linked list
- for host, and or in SCSI_HOST_BLOCK bit. When decrementing usage
- count to 0, clear this bit to allow usage to continue, wake up
- processes waiting.
-
-
- * scsi_ioctl.c: If we have an info() function, call it, otherwise
- if we have a "name" field, use it, else do nothing.
-
- * sd.c, sr.c: Clear cmd_len field prior to each command we
- generate.
-
- * sd.h: Add "has_part_table" bit to rscsi_disks.
-
- * sg.[c,h]: Add support for vendor specific 12 byte commands (i.e.
- override command length in COMMAND_SIZE).
-
- * sr.c: Bugfix from Gerd in photocd code.
-
- * sr.c: Bugfix in get_sectorsize - always use scsi_malloc buffer -
- we cannot guarantee that the stack is < 16Mb.
-
-Tue Nov 22 15:40:46 1994 Eric Youngdale (eric@andante.aib.com)
-
- * Linux 1.1.67 released.
-
- * sr.c: Change spelling of manufactor to manufacturer.
-
- * scsi.h: Likewise.
-
- * scsi.c: Likewise.
-
- * qlogic.c: Spelling corrections.
-
- * in2000.h: Spelling corrections.
-
- * in2000.c: Update from Bill Earnest, change from
- jshiffle@netcom.com. Support new bios versions.
-
- * README.qlogic: Spelling correction.
-
-Tue Nov 22 15:40:46 1994 Eric Youngdale (eric@andante.aib.com)
-
- * Linux 1.1.66 released.
-
- * u14-34f.c: Spelling corrections.
-
- * sr.[h,c]: Add support for multi-session CDs from Gerd Knorr.
-
- * scsi.h: Add manufactor field for keeping track of device
- manufacturer.
-
- * scsi.c: More spelling corrections.
-
- * qlogic.h, qlogic.c, README.qlogic: New driver from Tom Zerucha.
-
- * in2000.c, in2000.h: New driver from Brad McLean/Bill Earnest.
-
- * fdomain.c: Spelling correction.
-
- * eata.c: Spelling correction.
-
-Fri Nov 18 15:22:44 1994 Eric Youngdale (eric@andante.aib.com)
-
- * Linux 1.1.65 released.
-
- * eata.h: Update version string to 1.08.00.
-
- * eata.c: Set sg_tablesize correctly for DPT PM2012 boards.
-
- * aha274x.seq: Spell checking.
-
- * README.st: Likewise.
-
- * README.aha274x: Likewise.
-
- * ChangeLog: Likewise.
-
-Tue Nov 15 15:35:08 1994 Eric Youngdale (eric@andante.aib.com)
-
- * Linux 1.1.64 released.
-
- * u14-34f.h: Update version number to 1.10.01.
-
- * u14-34f.c: Use Scsi_Host can_queue variable instead of one from template.
-
- * eata.[c,h]: New driver for DPT boards from Dario Ballabio.
-
- * buslogic.c: Use can_queue field.
-
-Wed Nov 30 12:09:09 1994 Eric Youngdale (eric@andante.aib.com)
-
- * Linux 1.1.63 released.
-
- * sd.c: Give I/O error if we attempt 512 byte I/O to a disk with
- 1024 byte sectors.
-
- * scsicam.c: Make sure we do read from whole disk (mask off
- partition).
-
- * scsi.c: Use can_queue in Scsi_Host structure.
- Fix panic message about invalid host.
-
- * hosts.c: Initialize can_queue from template.
-
- * hosts.h: Add can_queue to Scsi_Host structure.
-
- * aha1740.c: Print out warning about NULL ecbptr.
-
-Fri Nov 4 12:40:30 1994 Eric Youngdale (eric@andante.aib.com)
-
- * Linux 1.1.62 released.
-
- * fdomain.c: Update to version 5.20. (From Rik Faith). Support
- BIOS version 3.5.
-
- * st.h: Add ST_EOD symbol.
-
- * st.c: Patches from Kai Makisara - support additional densities,
- add support for MTFSS, MTBSS, MTWSM commands.
-
- * README.st: Update to document new commands.
-
- * scsi.c: Add Mediavision CDR-H93MV to blacklist.
-
-Sat Oct 29 20:57:36 1994 Eric Youngdale (eric@andante.aib.com)
-
- * Linux 1.1.60 released.
-
- * u14-34f.[c,h]: New driver from Dario Ballabio.
-
- * aic7770.c, aha274x_seq.h, aha274x.seq, aha274x.h, aha274x.c,
- README.aha274x: New files, new driver from John Aycock.
-
-
-Tue Oct 11 08:47:39 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.54 released.
-
- * Add third PCI chip id. [Drew]
-
- * buslogic.c: Set BUSLOGIC_CMDLUN back to 1 [Eric].
-
- * ultrastor.c: Fix asm directives for new GCC.
-
- * sr.c, sd.c: Use new end_scsi_request function.
-
- * scsi.h(end_scsi_request): Return pointer to block if still
- active, else return NULL if inactive. Fixes race condition.
-
-Sun Oct 9 20:23:14 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.53 released.
-
- * scsi.c: Do not allocate dma bounce buffers if we have exactly
- 16Mb.
-
-Fri Sep 9 05:35:30 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.51 released.
-
- * aha152x.c: Add support for disabling the parity check. Update
- to version 1.4. [Juergen].
-
- * seagate.c: Tweak debugging message.
-
-Wed Aug 31 10:15:55 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.50 released.
-
- * aha152x.c: Add eb800 for Vtech Platinum SMP boards. [Juergen].
-
- * scsi.c: Add Quantum PD1225S to blacklist.
-
-Fri Aug 26 09:38:45 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.49 released.
-
- * sd.c: Fix bug when we were deleting the wrong entry if we
- get an unsupported sector size device.
-
- * sr.c: Another spelling patch.
-
-Thu Aug 25 09:15:27 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.48 released.
-
- * Throughout: Use new semantics for request_dma, as appropriate.
-
- * sr.c: Print correct device number.
-
-Sun Aug 21 17:49:23 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.47 released.
-
- * NCR5380.c: Add support for LIMIT_TRANSFERSIZE.
-
- * constants.h: Add prototype for print_Scsi_Cmnd.
-
- * pas16.c: Some more minor tweaks. Test for Mediavision board.
- Allow for disks > 1Gb. [Drew??]
-
- * sr.c: Set SCpnt->transfersize.
-
-Tue Aug 16 17:29:35 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.46 released.
-
- * Throughout: More spelling fixups.
-
- * buslogic.c: Add a few more fixups from Dave. Disk translation
- mainly.
-
- * pas16.c: Add a few patches (Drew?).
-
-
-Thu Aug 11 20:45:15 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.44 released.
-
- * hosts.c: Add type casts for scsi_init_malloc.
-
- * scsicam.c: Add type cast.
-
-Wed Aug 10 19:23:01 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.43 released.
-
- * Throughout: Spelling cleanups. [??]
-
- * aha152x.c, NCR53*.c, fdomain.c, g_NCR5380.c, pas16.c, seagate.c,
- t128.c: Use request_irq, not irqaction. [??]
-
- * aha1542.c: Move test for shost before we start to use shost.
-
- * aha1542.c, aha1740.c, ultrastor.c, wd7000.c: Use new
- calling sequence for request_irq.
-
- * buslogic.c: Update from Dave Gentzel.
-
-Tue Aug 9 09:32:59 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.42 released.
-
- * NCR5380.c: Change NCR5380_print_status to static.
-
- * seagate.c: A few more bugfixes. Only Drew knows what they are
- for.
-
- * ultrastor.c: Tweak some __asm__ directives so that it works
- with newer compilers. [??]
-
-Sat Aug 6 21:29:36 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.40 released.
-
- * NCR5380.c: Return SCSI_RESET_WAKEUP from reset function.
-
- * aha1542.c: Reset mailbox status after a bus device reset.
-
- * constants.c: Fix typo (;;).
-
- * g_NCR5380.c:
- * pas16.c: Correct usage of NCR5380_init.
-
- * scsi.c: Remove redundant (and unused variables).
-
- * sd.c: Use memset to clear all of rscsi_disks before we use it.
-
- * sg.c: Ditto, except for scsi_generics.
-
- * sr.c: Ditto, except for scsi_CDs.
-
- * st.c: Initialize STp->device.
-
- * seagate.c: Fix bug. [Drew]
-
-Thu Aug 4 08:47:27 1994 Eric Youngdale (eric@andante)
-
- * Linux 1.1.39 released.
-
- * Makefile: Fix typo in NCR53C7xx.
-
- * st.c: Print correct number for device.
-
-Tue Aug 2 11:29:14 1994 Eric Youngdale (eric@esp22)
-
- * Linux 1.1.38 released.
-
- Lots of changes in 1.1.38. All from Drew unless otherwise noted.
-
- * 53c7,8xx.c: New file from Drew. PCI driver.
-
- * 53c7,8xx.h: Likewise.
-
- * 53c7,8xx.scr: Likewise.
-
- * 53c8xx_d.h, 53c8xx_u.h, script_asm.pl: Likewise.
-
- * scsicam.c: New file from Drew. Read block 0 on the disk and
- read the partition table. Attempt to deduce the geometry from
- the partition table if possible. Only used by 53c[7,8]xx right
- now, but could be used by any device for which we have no way
- of identifying the geometry.
-
- * sd.c: Use device letters instead of sd%d in a lot of messages.
-
- * seagate.c: Fix bug that resulted in lockups with some devices.
-
- * sr.c (sr_open): Return -EROFS, not -EACCES if we attempt to open
- device for write.
-
- * hosts.c, Makefile: Update for new driver.
-
- * NCR5380.c, NCR5380.h, g_NCR5380.h: Update from Drew to support
- 53C400 chip.
-
- * constants.c: Define CONST_CMND and CONST_MSG. Other minor
- cleanups along the way. Improve handling of CONST_MSG.
-
- * fdomain.c, fdomain.h: New version from Rik Faith. Update to
- 5.18. Should now support TMC-3260 PCI card with 18C30 chip.
-
- * pas16.c: Update with new irq initialization.
-
- * t128.c: Update with minor cleanups.
-
- * scsi.c (scsi_pid): New variable - gives each command a unique
- id. Add Quantum LPS5235S to blacklist. Change in_scan to
- in_scan_scsis and make global.
-
- * scsi.h: Add some defines for extended message handling,
- INITIATE/RELEASE_RECOVERY. Add a few new fields to support sync
- transfers.
-
- * scsi_ioctl.h: Add ioctl to request synchronous transfers.
-
-
-Tue Jul 26 21:36:58 1994 Eric Youngdale (eric@esp22)
-
- * Linux 1.1.37 released.
-
- * aha1542.c: Always call aha1542_mbenable, use new udelay
- mechanism so we do not wait a long time if the board does not
- implement this command.
-
- * g_NCR5380.c: Remove #include <linux/config.h> and #if
- defined(CONFIG_SCSI_*).
-
- * seagate.c: Likewise.
-
- Next round of changes to support loadable modules. Getting closer
- now, still not possible to do anything remotely usable.
-
- hosts.c: Create a linked list of detected high level devices.
- (scsi_register_device): New function to insert into this list.
- (scsi_init): Call scsi_register_device for each of the known high
- level drivers.
-
- hosts.h: Add prototype for linked list header. Add structure
- definition for device template structure which defines the linked
- list.
-
- scsi.c: (scan_scsis): Use linked list instead of knowledge about
- existing high level device drivers.
- (scsi_dev_init): Use init functions for drivers on linked list
- instead of explicit list to initialize and attach devices to high
- level drivers.
-
- scsi.h: Add new field "attached" to scsi_device - count of number
- of high level devices attached.
-
- sd.c, sr.c, sg.c, st.c: Adjust init/attach functions to use new
- scheme.
-
-Sat Jul 23 13:03:17 1994 Eric Youngdale (eric@esp22)
-
- * Linux 1.1.35 released.
-
- * ultrastor.c: Change constraint on asm() operand so that it works
- with gcc 2.6.0.
-
-Thu Jul 21 10:37:39 1994 Eric Youngdale (eric@esp22)
-
- * Linux 1.1.33 released.
-
- * sr.c(sr_open): Do not allow opens with write access.
-
-Mon Jul 18 09:51:22 1994 1994 Eric Youngdale (eric@esp22)
-
- * Linux 1.1.31 released.
-
- * sd.c: Increase SD_TIMEOUT from 300 to 600.
-
- * sr.c: Remove stray task_struct* variable that was no longer
- used.
-
- * sr_ioctl.c: Fix typo in up() call.
-
-Sun Jul 17 16:25:29 1994 Eric Youngdale (eric@esp22)
-
- * Linux 1.1.30 released.
-
- * scsi.c (scan_scsis): Fix detection of some Toshiba CDROM drives
- that report themselves as disk drives.
-
- * (Throughout): Use request.sem instead of request.waiting.
- Should fix swap problem with fdomain.
-
-Thu Jul 14 10:51:42 1994 Eric Youngdale (eric@esp22)
-
- * Linux 1.1.29 released.
-
- * scsi.c (scan_scsis): Add new devices to end of linked list, not
- to the beginning.
-
- * scsi.h (SCSI_SLEEP): Remove brain dead hack to try to save
- the task state before sleeping.
-
-Sat Jul 9 15:01:03 1994 Eric Youngdale (eric@esp22)
-
- More changes to eventually support loadable modules. Mainly
- we want to use linked lists instead of arrays because it is easier
- to dynamically add and remove things this way.
-
- Quite a bit more work is needed before loadable modules are
- possible (and usable) with scsi, but this is most of the grunge
- work.
-
- * Linux 1.1.28 released.
-
- * scsi.c, scsi.h (allocate_device, request_queueable): Change
- argument from index into scsi_devices to a pointer to the
- Scsi_Device struct.
-
- * Throughout: Change all calls to allocate_device,
- request_queueable to use new calling sequence.
-
- * Throughout: Use SCpnt->device instead of
- scsi_devices[SCpnt->index]. Ugh - the pointer was there all along
- - much cleaner this way.
-
- * scsi.c (scsi_init_malloc, scsi_free_malloc): New functions -
- allow us to pretend that we have a working malloc when we
- initialize. Use this instead of passing memory_start, memory_end
- around all over the place.
-
- * scsi.h, st.c, sr.c, sd.c, sg.c: Change *_init1 functions to use
- scsi_init_malloc, remove all arguments, no return value.
-
- * scsi.h: Remove index field from Scsi_Device and Scsi_Cmnd
- structs.
-
- * scsi.c (scsi_dev_init): Set up for scsi_init_malloc.
- (scan_scsis): Get SDpnt from scsi_init_malloc, and refresh
- when we discover a device. Free pointer before returning.
- Change scsi_devices into a linked list.
-
- * scsi.c (scan_scsis): Change to only scan one host.
- (scsi_dev_init): Loop over all detected hosts, and scan them.
-
- * hosts.c (scsi_init_free): Change so that number of extra bytes
- is stored in struct, and we do not have to pass it each time.
-
- * hosts.h: Change Scsi_Host_Template struct to include "next" and
- "release" functions. Initialize to NULL in all low level
- adapters.
-
- * hosts.c: Rename scsi_hosts to builtin_scsi_hosts, create linked
- list scsi_hosts, linked together with the new "next" field.
-
-Wed Jul 6 05:45:02 1994 Eric Youngdale (eric@esp22)
-
- * Linux 1.1.25 released.
-
- * aha152x.c: Changes from Juergen - cleanups and updates.
-
- * sd.c, sr.c: Use new check_media_change and revalidate
- file_operations fields.
-
- * st.c, st.h: Add changes from Kai Makisara, dated Jun 22.
-
- * hosts.h: Change SG_ALL back to 0xff. Apparently soft error
- in /dev/brain resulted in having this bumped up.
- Change first parameter in bios_param function to be Disk * instead
- of index into rscsi_disks.
-
- * sd_ioctl.c: Pass pointer to rscsi_disks element instead of index
- to array.
-
- * sd.h: Add struct name "scsi_disk" to typedef for Scsi_Disk.
-
- * scsi.c: Remove redundant Maxtor XT8760S from blacklist.
- In scsi_reset, add printk when DEBUG defined.
-
- * All low level drivers: Modify definitions of bios_param in
- appropriate way.
-
-Thu Jun 16 10:31:59 1994 Eric Youngdale (eric@esp22)
-
- * Linux 1.1.20 released.
-
- * scsi_ioctl.c: Only pass down the actual number of characters
- required to scsi_do_cmd, not the one rounded up to a even number
- of sectors.
-
- * ultrastor.c: Changes from Caleb Epstein for 24f cards. Support
- larger SG lists.
-
- * ultrastor.c: Changes from me - use scsi_register to register
- host. Add some consistency checking,
-
-Wed Jun 1 21:12:13 1994 Eric Youngdale (eric@esp22)
-
- * Linux 1.1.19 released.
-
- * scsi.h: Add new return code for reset() function:
- SCSI_RESET_PUNT.
-
- * scsi.c: Make SCSI_RESET_PUNT the same as SCSI_RESET_WAKEUP for
- now.
-
- * aha1542.c: If the command responsible for the reset is not
- pending, return SCSI_RESET_PUNT.
-
- * aha1740.c, buslogic.c, wd7000.c, ultrastor.c: Return
- SCSI_RESET_PUNT instead of SCSI_RESET_SNOOZE.
-
-Tue May 31 19:36:01 1994 Eric Youngdale (eric@esp22)
-
- * buslogic.c: Do not print out message about "must be Adaptec"
- if we have detected a buslogic card. Print out a warning message
- if we are configuring for >16Mb, since the 445S at board level
- D or earlier does not work right. The "D" level board can be made
- to work by flipping an undocumented switch, but this is too subtle.
-
- Changes based upon patches in Yggdrasil distribution.
-
- * sg.c, sg.h: Return sense data to user.
-
- * aha1542.c, aha1740.c, buslogic.c: Do not panic if
- sense buffer is wrong size.
-
- * hosts.c: Test for ultrastor card before any of the others.
-
- * scsi.c: Allow boot-time option for max_scsi_luns=? so that
- buggy firmware has an easy work-around.
-
-Sun May 15 20:24:34 1994 Eric Youngdale (eric@esp22)
-
- * Linux 1.1.15 released.
-
- Post-codefreeze thaw...
-
- * buslogic.[c,h]: New driver from David Gentzel.
-
- * hosts.h: Add use_clustering field to explicitly say whether
- clustering should be used for devices attached to this host
- adapter. The buslogic board apparently supports large SG lists,
- but it is apparently faster if sd.c condenses this into a smaller
- list.
-
- * sd.c: Use this field instead of heuristic.
-
- * All host adapter include files: Add appropriate initializer for
- use_clustering field.
-
- * scsi.h: Add #defines for return codes for the abort and reset
- functions. There are now a specific set of return codes to fully
- specify all of the possible things that the low-level adapter
- could do.
-
- * scsi.c: Act based upon return codes from abort/reset functions.
-
- * All host adapter abort/reset functions: Return new return code.
-
- * Add code in scsi.c to help debug timeouts. Use #define
- DEBUG_TIMEOUT to enable this.
-
- * scsi.c: If the host->irq field is set, use
- disable_irq/enable_irq before calling queuecommand if we
- are not already in an interrupt. Reduce races, and we
- can be sloppier about cli/sti in the interrupt routines now
- (reduce interrupt latency).
-
- * constants.c: Fix some things to eliminate warnings. Add some
- sense descriptions that were omitted before.
-
- * aha1542.c: Watch for SCRD from host adapter - if we see it, set
- a flag. Currently we only print out the number of pending
- commands that might need to be restarted.
-
- * aha1542.c (aha1542_abort): Look for lost interrupts, OGMB still
- full, and attempt to recover. Otherwise give up.
-
- * aha1542.c (aha1542_reset): Try BUS DEVICE RESET, and then pass
- DID_RESET back up to the upper level code for all commands running
- on this target (even on different LUNs).
-
-Sat May 7 14:54:01 1994
-
- * Linux 1.1.12 released.
-
- * st.c, st.h: New version from Kai. Supports boot time
- specification of number of buffers.
-
- * wd7000.[c,h]: Updated driver from John Boyd. Now supports
- more than one wd7000 board in machine at one time, among other things.
-
-Wed Apr 20 22:20:35 1994
-
- * Linux 1.1.8 released.
-
- * sd.c: Add a few type casts where scsi_malloc is called.
-
-Wed Apr 13 12:53:29 1994
-
- * Linux 1.1.4 released.
-
- * scsi.c: Clean up a few printks (use %p to print pointers).
-
-Wed Apr 13 11:33:02 1994
-
- * Linux 1.1.3 released.
-
- * fdomain.c: Update to version 5.16 (Handle different FIFO sizes
- better).
-
-Fri Apr 8 08:57:19 1994
-
- * Linux 1.1.2 released.
-
- * Throughout: SCSI portion of cluster diffs added.
-
-Tue Apr 5 07:41:50 1994
-
- * Linux 1.1 development tree initiated.
-
- * The linux 1.0 development tree is now effectively frozen except
- for obvious bugfixes.
-
-******************************************************************
-******************************************************************
-******************************************************************
-******************************************************************
-
-Sun Apr 17 00:17:39 1994
-
- * Linux 1.0, patchlevel 9 released.
-
- * fdomain.c: Update to version 5.16 (Handle different FIFO sizes
- better).
-
-Thu Apr 7 08:36:20 1994
-
- * Linux 1.0, patchlevel8 released.
-
- * fdomain.c: Update to version 5.15 from 5.9. Handles 3.4 bios.
-
-Sun Apr 3 14:43:03 1994
-
- * Linux 1.0, patchlevel6 released.
-
- * wd7000.c: Make stab at fixing race condition.
-
-Sat Mar 26 14:14:50 1994
-
- * Linux 1.0, patchlevel5 released.
-
- * aha152x.c, Makefile: Fix a few bugs (too much data message).
- Add a few more bios signatures. (Patches from Juergen).
-
- * aha1542.c: Fix race condition in aha1542_out.
-
-Mon Mar 21 16:36:20 1994
-
- * Linux 1.0, patchlevel3 released.
-
- * sd.c, st.c, sr.c, sg.c: Return -ENXIO, not -ENODEV if we attempt
- to open a non-existent device.
-
- * scsi.c: Add Chinon cdrom to blacklist.
-
- * sr_ioctl.c: Check return status of verify_area.
-
-Sat Mar 6 16:06:19 1994
-
- * Linux 1.0 released (technically a pre-release).
-
- * scsi.c: Add IMS CDD521, Maxtor XT-8760S to blacklist.
-
-Tue Feb 15 10:58:20 1994
-
- * pl15e released.
-
- * aha1542.c: For 1542C, allow dynamic device scan with >1Gb turned
- off.
-
- * constants.c: Fix typo in definition of CONSTANTS.
-
- * pl15d released.
-
-Fri Feb 11 10:10:16 1994
-
- * pl15c released.
-
- * scsi.c: Add Maxtor XT-3280 and Rodime RO3000S to blacklist.
-
- * scsi.c: Allow tagged queueing for scsi 3 devices as well.
- Some really old devices report a version number of 0. Disallow
- LUN != 0 for these.
-
-Thu Feb 10 09:48:57 1994
-
- * pl15b released.
-
-Sun Feb 6 12:19:46 1994
-
- * pl15a released.
-
-Fri Feb 4 09:02:17 1994
-
- * scsi.c: Add Teac cdrom to blacklist.
-
-Thu Feb 3 14:16:43 1994
-
- * pl15 released.
-
-Tue Feb 1 15:47:43 1994
-
- * pl14w released.
-
- * wd7000.c (wd_bases): Fix typo in last change.
-
-Mon Jan 24 17:37:23 1994
-
- * pl14u released.
-
- * aha1542.c: Support 1542CF/extended bios. Different from 1542C
-
- * wd7000.c: Allow bios at 0xd8000 as well.
-
- * ultrastor.c: Do not truncate cylinders to 1024.
-
- * fdomain.c: Update to version 5.9 (add new bios signature).
-
- * NCR5380.c: Update from Drew - should work a lot better now.
-
-Sat Jan 8 15:13:10 1994
-
- * pl14o released.
-
- * sr_ioctl.c: Zero reserved field before trying to set audio volume.
-
-Wed Jan 5 13:21:10 1994
-
- * pl14m released.
-
- * fdomain.c: Update to version 5.8. No functional difference???
-
-Tue Jan 4 14:26:13 1994
-
- * pl14l released.
-
- * ultrastor.c: Remove outl, inl functions (now provided elsewhere).
-
-Mon Jan 3 12:27:25 1994
-
- * pl14k released.
-
- * aha152x.c: Remove insw and outsw functions.
-
- * fdomain.c: Ditto.
-
-Wed Dec 29 09:47:20 1993
-
- * pl14i released.
-
- * scsi.c: Support RECOVERED_ERROR for tape drives.
-
- * st.c: Update of tape driver from Kai.
-
-Tue Dec 21 09:18:30 1993
-
- * pl14g released.
-
- * aha1542.[c,h]: Support extended BIOS stuff.
-
- * scsi.c: Clean up messages about disks, so they are displayed as
- sda, sdb, etc instead of sd0, sd1, etc.
-
- * sr.c: Force reread of capacity if disk was changed.
- Clear buffer before asking for capacity/sectorsize (some drives
- do not report this properly). Set needs_sector_size flag if
- drive did not return sensible sector size.
-
-Mon Dec 13 12:13:47 1993
-
- * aha152x.c: Update to version .101 from Juergen.
-
-Mon Nov 29 03:03:00 1993
-
- * linux 0.99.14 released.
-
- * All scsi stuff moved from kernel/blk_drv/scsi to drivers/scsi.
-
- * Throughout: Grammatical corrections to various comments.
-
- * Makefile: fix so that we do not need to compile things we are
- not going to use.
-
- * NCR5380.c, NCR5380.h, g_NCR5380.c, g_NCR5380.h, pas16.c,
- pas16.h, t128.c, t128.h: New files from Drew.
-
- * aha152x.c, aha152x.h: New files from Juergen Fischer.
-
- * aha1542.c: Support for more than one 1542 in the machine
- at the same time. Make functions static that do not need
- visibility.
-
- * aha1740.c: Set NEEDS_JUMPSTART flag in reset function, so we
- know to restart the command. Change prototype of aha1740_reset
- to take a command pointer.
-
- * constants.c: Clean up a few things.
-
- * fdomain.c: Update to version 5.6. Move snarf_region. Allow
- board to be set at different SCSI ids. Remove support for
- reselection (did not work well). Set JUMPSTART flag in reset
- code.
-
- * hosts.c: Support new low-level adapters. Allow for more than
- one adapter of a given type.
-
- * hosts.h: Allow for more than one adapter of a given type.
-
- * scsi.c: Add scsi_device_types array, if NEEDS_JUMPSTART is set
- after a low-level reset, start the command again. Sort blacklist,
- and add Maxtor MXT-1240S, XT-4170S, NEC CDROM 84, Seagate ST157N.
-
- * scsi.h: Add constants for tagged queueing.
-
- * Throughout: Use constants from major.h instead of hardcoded
- numbers for major numbers.
-
- * scsi_ioctl.c: Fix bug in buffer length in ioctl_command. Use
- verify_area in GET_IDLUN ioctl. Add new ioctls for
- TAGGED_QUEUE_ENABLE, DISABLE. Only allow IOCTL_SEND_COMMAND by
- superuser.
-
- * sd.c: Only pay attention to UNIT_ATTENTION for removable disks.
- Fix bug where sometimes portions of blocks would get lost
- resulting in processes hanging. Add messages when we spin up a
- disk, and fix a bug in the timing. Increase read-ahead for disks
- that are on a scatter-gather capable host adapter.
-
- * seagate.c: Fix so that some parameters can be set from the lilo
- prompt. Supply jumpstart flag if we are resetting and need the
- command restarted. Fix so that we return 1 if we detect a card
- so that multiple card detection works correctly. Add yet another
- signature for FD cards (950). Add another signature for ST0x.
-
- * sg.c, sg.h: New files from Lawrence Foard for generic scsi
- access.
-
- * sr.c: Add type casts for (void*) so that we can do pointer
- arithmetic. Works with GCC without this, but it is not strictly
- correct. Same bugfix as was in sd.c. Increase read-ahead a la
- disk driver.
-
- * sr_ioctl.c: Use scsi_malloc buffer instead of buffer from stack
- since we cannot guarantee that the stack is < 16Mb.
-
- ultrastor.c: Update to support 24f properly (JFC's driver).
-
- wd7000.c: Supply jumpstart flag for reset. Do not round up
- number of cylinders in biosparam function.
-
-Sat Sep 4 20:49:56 1993
-
- * 0.99pl13 released.
-
- * Throughout: Use check_region/snarf_region for all low-level
- drivers.
-
- * aha1542.c: Do hard reset instead of soft (some ethercard probes
- screw us up).
-
- * scsi.c: Add new flag ASKED_FOR_SENSE so that we can tell if we are
- in a loop whereby the device returns null sense data.
-
- * sd.c: Add code to spin up a drive if it is not already spinning.
- Do this one at a time to make it easier on power supplies.
-
- * sd_ioctl.c: Use sync_dev instead of fsync_dev in BLKFLSBUF ioctl.
-
- * seagate.c: Switch around DATA/CONTROL lines.
-
- * st.c: Change sense to unsigned.
-
-Thu Aug 5 11:59:18 1993
-
- * 0.99pl12 released.
-
- * constants.c, constants.h: New files with ascii descriptions of
- various conditions.
-
- * Makefile: Do not try to count the number of low-level drivers,
- just generate the list of .o files.
-
- * aha1542.c: Replace 16 with sizeof(SCpnt->sense_buffer). Add tests
- for addresses > 16Mb, panic if we find one.
-
- * aha1740.c: Ditto with sizeof().
-
- * fdomain.c: Update to version 3.18. Add new signature, register IRQ
- with irqaction. Use ID 7 for new board. Be more intelligent about
- obtaining the h/s/c numbers for biosparam.
-
- * hosts.c: Do not depend upon Makefile generated count of the number
- of low-level host adapters.
-
- * scsi.c: Use array for scsi_command_size instead of a function. Add
- Texel cdrom and Maxtor XT-4380S to blacklist. Allow compile time
- option for no-multi lun scan. Add semaphore for possible problems
- with handshaking, assume device is faulty until we know it not to be
- the case. Add DEBUG_INIT symbol to dump info as we scan for devices.
- Zero sense buffer so we can tell if we need to request it. When
- examining sense information, request sense if buffer is all zero.
- If RESET, request sense information to see what to do next.
-
- * scsi_debug.c: Change some constants to use symbols like INT_MAX.
-
- * scsi_ioctl.c (kernel_scsi_ioctl): New function -for making ioctl
- calls from kernel space.
-
- * sd.c: Increase timeout to 300. Use functions in constants.h to
- display info. Use scsi_malloc buffer for READ_CAPACITY, since
- we cannot guarantee that a stack based buffer is < 16Mb.
-
- * sd_ioctl.c: Add BLKFLSBUF ioctl.
-
- * seagate.c: Add new compile time options for ARBITRATE,
- SLOW_HANDSHAKE, and SLOW_RATE. Update assembly loops for transferring
- data. Use kernel_scsi_ioctl to request mode page with geometry.
-
- * sr.c: Use functions in constants.c to display messages.
-
- * st.c: Support for variable block size.
-
- * ultrastor.c: Do not use cache for tape drives. Set
- unchecked_isa_dma flag, even though this may not be needed (gets set
- later).
-
-Sat Jul 17 18:32:44 1993
-
- * 0.99pl11 released. C++ compilable.
-
- * Throughout: Add type casts all over the place, and use "ip" instead
- of "info" in the various biosparam functions.
-
- * Makefile: Compile seagate.c with C++ compiler.
-
- * aha1542.c: Always set ccb pointer as this gets trashed somehow on
- some systems. Add a few type casts. Update biosparam function a little.
-
- * aha1740.c: Add a few type casts.
-
- * fdomain.c: Update to version 3.17 from 3.6. Now works with
- TMC-18C50.
-
- * scsi.c: Minor changes here and there with datatypes. Save use_sg
- when requesting sense information so that this can properly be
- restored if we retry the command. Set aside dma buffers assuming each
- block is 1 page, not 1Kb minix block.
-
- * scsi_ioctl.c: Add a few type casts. Other minor changes.
-
- * sd.c: Correctly free all scsi_malloc'd memory if we run out of
- dma_pool. Store blocksize information for each partition.
-
- * seagate.c: Minor cleanups here and there.
-
- * sr.c: Set up blocksize array for all discs. Fix bug in freeing
- buffers if we run out of dma pool.
-
-Thu Jun 2 17:58:11 1993
-
- * 0.99pl10 released.
-
- * aha1542.c: Support for BT 445S (VL-bus board with no dma channel).
-
- * fdomain.c: Upgrade to version 3.6. Preliminary support for TNC-18C50.
-
- * scsi.c: First attempt to fix problem with old_use_sg. Change
- NOT_READY to a SUGGEST_ABORT. Fix timeout race where time might
- get decremented past zero.
-
- * sd.c: Add block_fsync function to dispatch table.
-
- * sr.c: Increase timeout to 500 from 250. Add entry for sync in
- dispatch table (supply NULL). If we do not have a sectorsize,
- try to get it in the sd_open function. Add new function just to
- obtain sectorsize.
-
- * sr.h: Add needs_sector_size semaphore.
-
- * st.c: Add NULL for fsync in dispatch table.
-
- * wd7000.c: Allow another condition for power on that are normal
- and do not require a panic.
-
-Thu Apr 22 23:10:11 1993
-
- * 0.99pl9 released.
-
- * aha1542.c: Use (void) instead of () in setup_mailboxes.
-
- * scsi.c: Initialize transfersize and underflow fields in SCmd to 0.
- Do not panic for unsupported message bytes.
-
- * scsi.h: Allocate 12 bytes instead of 10 for commands. Add
- transfersize and underflow fields.
-
- * scsi_ioctl.c: Further bugfix to ioctl_probe.
-
- * sd.c: Use long instead of int for last parameter in sd_ioctl.
- Initialize transfersize and underflow fields.
-
- * sd_ioctl.c: Ditto for sd_ioctl(,,,,);
-
- * seagate.c: New version from Drew. Includes new signatures for FD
- cards. Support for 0ws jumper. Correctly initialize
- scsi_hosts[hostnum].this_id. Improved handing of
- disconnect/reconnect, and support command linking. Use
- transfersize and underflow fields. Support scatter-gather.
-
- * sr.c, sr_ioctl.c: Use long instead of int for last parameter in sr_ioctl.
- Use buffer and buflength in do_ioctl. Patches from Chris Newbold for
- scsi-2 audio commands.
-
- * ultrastor.c: Comment out in_byte (compiler warning).
-
- * wd7000.c: Change () to (void) in wd7000_enable_dma.
-
-Wed Mar 31 16:36:25 1993
-
- * 0.99pl8 released.
-
- * aha1542.c: Handle mailboxes better for 1542C.
- Do not truncate number of cylinders at 1024 for biosparam call.
-
- * aha1740.c: Fix a few minor bugs for multiple devices.
- Same as above for biosparam.
-
- * scsi.c: Add lockable semaphore for removable devices that can have
- media removal prevented. Add another signature for flopticals.
- (allocate_device): Fix race condition. Allow more space in dma pool
- for blocksizes of up to 4Kb.
-
- * scsi.h: Define COMMAND_SIZE. Define a SCSI specific version of
- INIT_REQUEST that can run with interrupts off.
-
- * scsi_ioctl.c: Make ioctl_probe function more idiot-proof. If
- a removable device says ILLEGAL REQUEST to a door-locking command,
- clear lockable flag. Add SCSI_IOCTL_GET_IDLUN ioctl. Do not attempt
- to lock door for devices that do not have lockable semaphore set.
-
- * sd.c: Fix race condition for multiple disks. Use INIT_SCSI_REQUEST
- instead of INIT_REQUEST. Allow sector sizes of 1024 and 256. For
- removable disks that are not ready, mark them as having a media change
- (some drives do not report this later).
-
- * seagate.c: Use volatile keyword for memory-mapped register pointers.
-
- * sr.c: Fix race condition, a la sd.c. Increase the number of retries
- to 1. Use INIT_SCSI_REQUEST. Allow 512 byte sector sizes. Do a
- read_capacity when we init the device so we know the size and
- sectorsize.
-
- * st.c: If ioctl not found in st.c, try scsi_ioctl for others.
-
- * ultrastor.c: Do not truncate number of cylinders at 1024 for
- biosparam call.
-
- * wd7000.c: Ditto.
- Throughout: Use COMMAND_SIZE macro to determine length of scsi
- command.
-
-
-
-Sat Mar 13 17:31:29 1993
-
- * 0.99pl7 released.
-
- Throughout: Improve punctuation in some messages, and use new
- verify_area syntax.
-
- * aha1542.c: Handle unexpected interrupts better.
-
- * scsi.c: Ditto. Handle reset conditions a bit better, asking for
- sense information and retrying if required.
-
- * scsi_ioctl.c: Allow for 12 byte scsi commands.
-
- * ultrastor.c: Update to use scatter-gather.
-
-Sat Feb 20 17:57:15 1993
-
- * 0.99pl6 released.
-
- * fdomain.c: Update to version 3.5. Handle spurious interrupts
- better.
-
- * sd.c: Use register_blkdev function.
-
- * sr.c: Ditto.
-
- * st.c: Use register_chrdev function.
-
- * wd7000.c: Undo previous change.
-
-Sat Feb 6 11:20:43 1993
-
- * 0.99pl5 released.
-
- * scsi.c: Fix bug in testing for UNIT_ATTENTION.
-
- * wd7000.c: Check at more addresses for bios. Fix bug in biosparam
- (heads & sectors turned around).
-
-Wed Jan 20 18:13:59 1993
-
- * 0.99pl4 released.
-
- * scsi.c: Ignore leading spaces when looking for blacklisted devices.
-
- * seagate.c: Add a few new signatures for FD cards. Another patch
- with SCint to fix race condition. Use recursion_depth to keep track
- of how many times we have been recursively called, and do not start
- another command unless we are on the outer level. Fixes bug
- with Syquest cartridge drives (used to crash kernel), because
- they do not disconnect with large data transfers.
-
-Tue Jan 12 14:33:36 1993
-
- * 0.99pl3 released.
-
- * fdomain.c: Update to version 3.3 (a few new signatures).
-
- * scsi.c: Add CDU-541, Denon DRD-25X to blacklist.
- (allocate_request, request_queueable): Init request.waiting to NULL if
- non-buffer type of request.
-
- * seagate.c: Allow controller to be overridden with CONTROLLER symbol.
- Set SCint=NULL when we are done, to remove race condition.
-
- * st.c: Changes from Kai.
-
-Wed Dec 30 20:03:47 1992
-
- * 0.99pl2 released.
-
- * scsi.c: Blacklist back in. Remove Newbury drive as other bugfix
- eliminates need for it here.
-
- * sd.c: Return ENODEV instead of EACCES if no such device available.
- (sd_init) Init blkdev_fops earlier so that sd_open is available sooner.
-
- * sr.c: Same as above for sd.c.
-
- * st.c: Return ENODEV instead of ENXIO if no device. Init chrdev_fops
- sooner, so that it is always there even if no tapes.
-
- * seagate.c (controller_type): New variable to keep track of ST0x or
- FD. Modify signatures list to indicate controller type, and init
- controller_type once we find a match.
-
- * wd7000.c (wd7000_set_sync): Remove redundant function.
-
-Sun Dec 20 16:26:24 1992
-
- * 0.99pl1 released.
-
- * scsi_ioctl.c: Bugfix - check dev->index, not dev->id against
- NR_SCSI_DEVICES.
-
- * sr_ioctl.c: Verify that device exists before allowing an ioctl.
-
- * st.c: Patches from Kai - change timeout values, improve end of tape
- handling.
-
-Sun Dec 13 18:15:23 1992
-
- * 0.99 kernel released. Baseline for this ChangeLog.
+++ /dev/null
-ver.0.4.3p4
- - Bug fix for invalid memory detection when initialized twice
- - Add sample sharing function - works together with awesfx-0.4.3p3
- - Add AWE_PROBE_DATA for probing sample id
-
-ver.0.4.3p3
- - Replace memset to MEMSET (for FreeBSD)
- - Add PAN_EXCHANGE switch
-
-ver.0.4.3p2
- - MIDI emulation device is added
- - Controls volume and filter targets
- - Include chorus/reverb/equalizer values in MISC_MODE
-
-ver.0.4.3p1
- - Change the volume calculation method
- - Support for Tom Lees' PnP driver (v0.3)
-
-ver.0.4.2d
- - Support for OSS/Free 3.8 on 2.0 kernels.
- - Support for Linux PnP driver
- - Support for module (for recent 2.1 kernels and RH5.0)
- - Support for FreeBSD-3.0 system
-
-ver.0.4.2c
- - Add a mode to enable drum channel toggle via bank number
- change.
-
-ver.0.4.2b
- - Clear voice position after note on
- - Change nrvoices according to the current playing mode
-
-ver.0.4.2a
- - Fix a bug in pitch calculation with scale parameter
- - Change default chorus & reverb modes
-
-ver.0.4.2
- - Use indirect voice allocation mode; used as default mode
- - Add preset mapping
- - Free buffers when resetting samples
- - Set default preset/bank/drumset as variable
- - Fix a bug in exclusive note-off
- - Add channel reset control macro
- - Change modwheel sensitivity as variable
- - Add lock option in open_patch
- - Add channel priority mode macro, and disable it as default
- - Add unset effect macro
- - Add user defined chorus/reverb modes
- - Do not initialize effect parameters when allocating voices
- - Accept realtime filter-Q parameter change
- - Check value range of set/add effects
- - Change drum flags automatically when receiving bank #128
-
-ver.0.4.1 development versions
-
-ver.0.4.0c
- - Fix kernel oops when setting AWE_FX_ATTEN
-
-ver.0.4.0b
- - Do not kill_note in start_note when velocity is zero
-
-ver.0.4.0a
- - Fix a bug in channel pressure effects
-
-ver.0.4.0
- - Support dynamic buffer allocation
- - Add functions to open/close/unload a patch
- - Change from pointer to integer index in voice/sample lists
- - Support for Linux/Alpha-AXP
- - Fix for FreeBSD
- - Add sostenuto control
- - Add midi channel priority
- - Fix a bug in all notes off control
- - Use AWE_DEFAULT_MEMSIZE always if defined
- - Fix a bug in awe_reset causes seg fault when no DRAM onboard
- - Use awe_mem_start variable instead of constant
-
-ver.0.3.3c
- - Fix IOCTL_TO_USER for OSS-3.8 (on Linux-2.1.25)
- - Fix i/o macros for mixer controls
-
-ver.0.3.3b
- - Fix version number in awe_version.h
- - Fix a small bug in noteoff/release all
-
-ver.0.3.3a
- - Fix all notes/sounds off
- - Add layer effect control
- - Add misc mode controls; realtime pan, version number, etc.
- - Move gus bank control in misc mode control
- - Modify awe_operations for OSS3.8b5
- - Fix installation script
-
-ver.0.3.3
- - Add bass/treble control in Emu8000 chip
- - Add mixer device
- - Fix sustain on to value 127
-
-ver.0.3.2
- - Refuse linux-2.0.0 at installation
- - Move awe_voice.h to /usr/include/linux
-
-ver.0.3.1b (not released)
- - Rewrite chorus/reverb mode change functions
- - Rewrite awe_detect & awe_check_dram routines
-
-ver.0.3.1a
- - Fix a bug to reset voice counter in awe_reset
- - Fix voice balance on GUS mode
- - Make symlink on /usr/include/asm in install script
-
-ver.0.3.1
- - Remove zero size arrays from awe_voice.h
- - Fix init_fm routine
- - Remove all samples except primary samples in REMOVE_LAST_SAMPLES
-
-ver.0.3.0a
- - Add AWE_NOTEOFF_ALL control
- - Remove AWE_INIT_ATTEN control
-
-ver.0.3.0
- - Fix decay time table
- - Add exclusive sounds mode
- - Add capability to get current status
-
-ver.0.2.99e
- - Add #ifdef for all sounds/notes off controls.
- - Fix bugs on searching the default drumset/preset.
- - Fix usslite patch to modify the default Config.in.
-
-ver.0.2.99d
- - Fix bugs of attack/hold parameters
- - Fix attack & decay time table
-
-ver.0.2.99c
- - Change volume control messages (main & expression volume)
- to accesspt normal MIDI parameters in channel mode.
- - Use channel mode in SEQ2 controls.
-
-ver.0.2.99b
- - #ifdef patch manager functions (for OSS-3.7)
-
-ver.0.2.99a
- - Fix sustain bug
-
-ver.0.2.99 (0.3 beta)
- - Support multiple instruments
-
-ver.0.2.0c
- - Add copyright notice
- - FreeBSD 2.2-ALPHA integration
-
-ver.0.2.0b
- - Remove buffered reading appended in v0.2.0a
- - Remove SMAxW register check on writing
- - Support Linux 2.1.x kernel
- - Rewrite installation script
-
-ver.0.2.0a
- - Define SEQUENCER_C for tuning.h for FreeBSD system
- - Improvement of sample loading speed
- - Fix installation script
- - Add PnP driver functions for ISA PnP driver support
-
-ver.0.2.0
- - Includes FreeBSD port
- - Can load GUS compatible patches
- - Change values of hardware control parameters for compatibility
- with GUS driver
- - Accept 8bit or unsigned wave data
- - Accept no blank loop data
- - Add sample mode flags in sample_info
-
-ver.0.1.6
- - Add voice effects control
- - Fix awe_voice.h for word alignment
-
-ver.0.1.5c
- - Fix FM(OPL) playback problem
-
-ver.0.1.5b
- - Fix pitch calculation for fixed midi key
-
-ver.0.1.5a
- - Fix bugs in removing samples from linked list.
-
-ver.0.1.5
- - Add checksum verification for sample uploading
- (not compatible from older sample_info structure)
- - Fix sample offset pointers to (actual value - 1)
- - Add sequencer command to initialize awe32
-
-ver.0.1.4c
- - Fix card detection and memory check function to avoid system crash
- at booting
-
-ver.0.1.4b
- - Add release sustain mode
- - Initialize FM each time after loading samples
-
-ver.0.1.4a
- - Fix AWE card detection code
- - Correct FM initialize position
- - Add non-releasing mode on voice info
-
-ver.0.1.4
- - Add AWE card and DRAM detection codes
- - Add FM initialization code
- - Modify volume control
- - Remove linear volume mode
- - Change memory management; not using malloc dynamically
- - Add remove-samples command
- - Use internal id implicitly at loading samples
-
-ver.0.1.3
- - Fix a bug on patch uploading to RAM
-
-ver.0.1.2
- - Divide to separated packages
- - Fix disagreed macro conditions
- - Fix unresolved function bugs
- - Integrate VoxWare and USS-Lite driver source (awe_voice.c)
- and remove awe_card.c
-
-ver.0.1.1
- - Fix wrong sample numbers in sbktext
- - Fix txt2sfx bug
- - Fix pan parameter calculation
- - Append USS-Lite/Linux2.0 driver
-
+++ /dev/null
-1998-12-04 Andrew T. Veliath <andrewtv@usa.net>
-
- * Update version to 0.8.2.2
-
- * Add msndreset program to shell archive.
-
-1998-11-11 Andrew T. Veliath <andrewv@usa.net>
-
- * msnd_pinnacle.c (mixer_ioctl): Add a mixer ioctl for
- SOUND_MIXER_PRIVATE1 which does a full reset on the card.
- (mixer_set): Move line in recording source to input monitor, aux
- input level added, some mixer fixes.
-
-1998-09-10 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.8.2
-
- * Add SNDCTL_DSP_GETOSPACE and SNDCTL_DSP_GETISPACE ioctls.
-
-1998-09-09 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.8.1
-
- * msnd_pinnacle.c: Fix resetting of default audio parameters. Turn
- flush code from dsp_halt into dsp_write_flush, and use that for
- SNDCTL_DSP_SYNC.
-
-1998-09-07 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.8.0
-
- * Provide separate signal parameters for play and record.
-
- * Cleanups to locking and interrupt handling, change default
- fifosize to 128kB.
-
- * Update version to 0.7.15
-
- * Interprocess full-duplex support (ie `cat /dev/dsp > /dev/dsp').
-
- * More mutex sections for read and write fifos (read + write locks
- added).
-
-1998-09-05 Andrew Veliath <andrewtv@usa.net>
-
- * msnd_pinnacle.c: (chk_send_dsp_cmd) Do full DSP reset upon DSP
- timeout (when not in interrupt; maintains mixer settings). Fixes
- to flushing and IRQ ref counting. Rewrote queuing for smoother
- playback and fixed initial playback cutoff problem.
-
-1998-09-03 Andrew Veliath <andrewtv@usa.net>
-
- * Replaced packed structure accesses with standard C equivalents.
-
-1998-09-01 Andrew Veliath <andrewtv@usa.net>
-
- * msnd_pinnacle.c: Add non-PnP configuration to driver code, which
- will facilitate compiled-in operation.
-
-1998-08-29 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.7.6
-
- * msnd_pinnacle.c (dsp_ioctl): Add DSP_GETFMTS, change SAMPLESIZE
- to DSP_SETFMT.
-
- * Update version to 0.7.5
-
- * Create pinnaclecfg.c and turn MultiSound doc into a shell
- archive with pinnaclecfg.c included. pinnaclecfg.c can
- now fully configure the card in non-PnP mode, including the
- joystick and IDE controller. Also add an isapnp conf
- example.
-
- * Reduce DSP reset timeout from 20000 to 100
-
-1998-08-06 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.7.2
-
- * After A/D calibration, do an explicit set to the line input,
- rather than using set_recsrc
-
-1998-07-20 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.7.1
-
- * Add more OSS ioctls
-
-1998-07-19 Andrew Veliath <andrewtv@usa.net>
-
- * Update doc file
-
- * Bring back DIGITAL1 with digital parameter to msnd_pinnacle.c
- and CONFIG_MSNDPIN_DIGITAL. I'm not sure this actually works,
- since I find audio playback goes into a very speeded mode of
- operation, however it might be due to a lack of a digital
- source, which I don't have to test.
-
-1998-07-18 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.7.0
-
- * Can now compile with Alan Cox' 2.0.34-modular-sound patch (so
- now it requires >= 2.1.106 or 2.0.34-ms) (note for 2.0.34-ms it
- is in the Experimental section)
-
- * More modularization, consolidation, also some MIDI hooks
- installed for future MIDI modules
-
- * Write flush
-
- * Change default speed, channels, bit size to OSS/Free defaults
-
-1998-06-02 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.5b
-
- * Fix version detection
-
- * Remove underflow and overflow resets (delay was too long)
-
- * Replace spinlocked bitops with atomic bit ops
-
-1998-05-27 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.5a
-
- * Better recovery from underflow or overflow conditions
-
- * Fix a deadlock condition with one thread reading and the other
- writing
-
-1998-05-26 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.5
-
- * Separate reset queue functions for play and record
-
- * Add delays in dsp_halt
-
-1998-05-24 Andrew Veliath <andrewtv@usa.net>
-
- * Add a check for Linux >= 2.1.95
-
- * Remove DIGITAL1 input until I figure out how to make it work
-
- * Add HAVE_DSPCODEH which when not defined will load firmware from
- files using mod_firmware_load, then release memory after they
- are uploaded (requires reorganized OSS).
-
-1998-05-22 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.4c
-
- * Hopefully fix the mixer volume problem
-
-1998-05-19 Andrew Veliath <andrewtv@usa.net>
-
- * Add __initfuncs and __initdatas to reduce resident code size
-
- * Move bunch of code around, remove some protos
-
- * Integrate preliminary changes for Alan Cox's OSS reorganization
- for non-OSS drivers to coexist with OSS devices on the same
- major. To compile standalone, must now define STANDALONE.
-
-1998-05-16 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.4b
-
- * Integrated older card support into a unified driver, tested on a
- MultiSound Classic c/o Kendrick Vargas.
-
-1998-05-15 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.4
-
- * Fix read/write return values
-
-1998-05-13 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.3
-
- * Stop play gracefully
-
- * Add busy flag
-
- * Add major and calibrate_signal module parameters
-
- * Add ADC calibration
-
- * Add some OSS compatibility ioctls
-
- * Add mixer record selection
-
- * Add O_NONBLOCK support, separate read/write wait queues
-
- * Add sample bit size ioctl, expanded sample rate ioctl
-
- * Playback suspension now resumes
-
- * Use signal_pending after interruptible_sleep_on
-
- * Add recording, change ints to bit flags
-
-1998-05-11 Andrew Veliath <andrewtv@usa.net>
-
- * Update version to 0.2
-
- * Add preliminary playback support
-
- * Use new Turtle Beach DSP code
\ No newline at end of file
+++ /dev/null
-This file contains some additional information for the Philips and OEM webcams.
-E-mail: webcam@smcc.demon.nl Last updated: 2004-01-19
-Site: http://www.smcc.demon.nl/webcam/
-
-As of this moment, the following cameras are supported:
- * Philips PCA645
- * Philips PCA646
- * Philips PCVC675
- * Philips PCVC680
- * Philips PCVC690
- * Philips PCVC720/40
- * Philips PCVC730
- * Philips PCVC740
- * Philips PCVC750
- * Askey VC010
- * Creative Labs Webcam 5
- * Creative Labs Webcam Pro Ex
- * Logitech QuickCam 3000 Pro
- * Logitech QuickCam 4000 Pro
- * Logitech QuickCam Notebook Pro
- * Logitech QuickCam Zoom
- * Logitech QuickCam Orbit
- * Logitech QuickCam Sphere
- * Samsung MPC-C10
- * Samsung MPC-C30
- * Sotec Afina Eye
- * AME CU-001
- * Visionite VCS-UM100
- * Visionite VCS-UC300
-
-The main webpage for the Philips driver is at the address above. It contains
-a lot of extra information, a FAQ, and the binary plugin 'PWCX'. This plugin
-contains decompression routines that allow you to use higher image sizes and
-framerates; in addition the webcam uses less bandwidth on the USB bus (handy
-if you want to run more than 1 camera simultaneously). These routines fall
-under a NDA, and may therefor not be distributed as source; however, its use
-is completely optional.
-
-You can build this code either into your kernel, or as a module. I recommend
-the latter, since it makes troubleshooting a lot easier. The built-in
-microphone is supported through the USB Audio class.
-
-When you load the module you can set some default settings for the
-camera; some programs depend on a particular image-size or -format and
-don't know how to set it properly in the driver. The options are:
-
-size
- Can be one of 'sqcif', 'qsif', 'qcif', 'sif', 'cif' or
- 'vga', for an image size of resp. 128x96, 160x120, 176x144,
- 320x240, 352x288 and 640x480 (of course, only for those cameras that
- support these resolutions).
-
-fps
- Specifies the desired framerate. Is an integer in the range of 4-30.
-
-fbufs
- This paramter specifies the number of internal buffers to use for storing
- frames from the cam. This will help if the process that reads images from
- the cam is a bit slow or momentarely busy. However, on slow machines it
- only introduces lag, so choose carefully. The default is 3, which is
- reasonable. You can set it between 2 and 5.
-
-mbufs
- This is an integer between 1 and 10. It will tell the module the number of
- buffers to reserve for mmap(), VIDIOCCGMBUF, VIDIOCMCAPTURE and friends.
- The default is 2, which is adequate for most applications (double
- buffering).
-
- Should you experience a lot of 'Dumping frame...' messages during
- grabbing with a tool that uses mmap(), you might want to increase if.
- However, it doesn't really buffer images, it just gives you a bit more
- slack when your program is behind. But you need a multi-threaded or
- forked program to really take advantage of these buffers.
-
- The absolute maximum is 10, but don't set it too high! Every buffer takes
- up 460 KB of RAM, so unless you have a lot of memory setting this to
- something more than 4 is an absolute waste. This memory is only
- allocated during open(), so nothing is wasted when the camera is not in
- use.
-
-power_save
- When power_save is enabled (set to 1), the module will try to shut down
- the cam on close() and re-activate on open(). This will save power and
- turn off the LED. Not all cameras support this though (the 645 and 646
- don't have power saving at all), and some models don't work either (they
- will shut down, but never wake up). Consider this experimental. By
- default this option is disabled.
-
-compression (only useful with the plugin)
- With this option you can control the compression factor that the camera
- uses to squeeze the image through the USB bus. You can set the
- parameter between 0 and 3:
- 0 = prefer uncompressed images; if the requested mode is not available
- in an uncompressed format, the driver will silently switch to low
- compression.
- 1 = low compression.
- 2 = medium compression.
- 3 = high compression.
-
- High compression takes less bandwidth of course, but it could also
- introduce some unwanted artefacts. The default is 2, medium compression.
- See the FAQ on the website for an overview of which modes require
- compression.
-
- The compression parameter does not apply to the 645 and 646 cameras
- and OEM models derived from those (only a few). Most cams honour this
- parameter.
-
-leds
- This settings takes 2 integers, that define the on/off time for the LED
- (in milliseconds). One of the interesting things that you can do with
- this is let the LED blink while the camera is in use. This:
-
- leds=500,500
-
- will blink the LED once every second. But with:
-
- leds=0,0
-
- the LED never goes on, making it suitable for silent surveillance.
-
- By default the camera's LED is on solid while in use, and turned off
- when the camera is not used anymore.
-
- This parameter works only with the ToUCam range of cameras (720, 730, 740,
- 750) and OEMs. For other cameras this command is silently ignored, and
- the LED cannot be controlled.
-
- Finally: this parameters does not take effect UNTIL the first time you
- open the camera device. Until then, the LED remains on.
-
-dev_hint
- A long standing problem with USB devices is their dynamic nature: you
- never know what device a camera gets assigned; it depends on module load
- order, the hub configuration, the order in which devices are plugged in,
- and the phase of the moon (i.e. it can be random). With this option you
- can give the driver a hint as to what video device node (/dev/videoX) it
- should use with a specific camera. This is also handy if you have two
- cameras of the same model.
-
- A camera is specified by its type (the number from the camera model,
- like PCA645, PCVC750VC, etc) and optionally the serial number (visible
- in /proc/bus/usb/devices). A hint consists of a string with the following
- format:
-
- [type[.serialnumber]:]node
-
- The square brackets mean that both the type and the serialnumber are
- optional, but a serialnumber cannot be specified without a type (which
- would be rather pointless). The serialnumber is separated from the type
- by a '.'; the node number by a ':'.
-
- This somewhat cryptic syntax is best explained by a few examples:
-
- dev_hint=3,5 The first detected cam gets assigned
- /dev/video3, the second /dev/video5. Any
- other cameras will get the first free
- available slot (see below).
-
- dev_hint=645:1,680:2 The PCA645 camera will get /dev/video1,
- and a PCVC680 /dev/video2.
-
- dev_hint=645.0123:3,645.4567:0 The PCA645 camera with serialnumber
- 0123 goes to /dev/video3, the same
- camera model with the 4567 serial
- gets /dev/video0.
-
- dev_hint=750:1,4,5,6 The PCVC750 camera will get /dev/video1, the
- next 3 Philips cams will use /dev/video4
- through /dev/video6.
-
- Some points worth knowing:
- - Serialnumbers are case sensitive and must be written full, including
- leading zeroes (it's treated as a string).
- - If a device node is already occupied, registration will fail and
- the webcam is not available.
- - You can have up to 64 video devices; be sure to make enough device
- nodes in /dev if you want to spread the numbers (this does not apply
- to devfs). After /dev/video9 comes /dev/video10 (not /dev/videoA).
- - If a camera does not match any dev_hint, it will simply get assigned
- the first available device node, just as it used to be.
-
-trace
- In order to better detect problems, it is now possible to turn on a
- 'trace' of some of the calls the module makes; it logs all items in your
- kernel log at debug level.
-
- The trace variable is a bitmask; each bit represents a certain feature.
- If you want to trace something, look up the bit value(s) in the table
- below, add the values together and supply that to the trace variable.
-
- Value Value Description Default
- (dec) (hex)
- 1 0x1 Module initialization; this will log messages On
- while loading and unloading the module
-
- 2 0x2 probe() and disconnect() traces On
-
- 4 0x4 Trace open() and close() calls Off
-
- 8 0x8 read(), mmap() and associated ioctl() calls Off
-
- 16 0x10 Memory allocation of buffers, etc. Off
-
- 32 0x20 Showing underflow, overflow and Dumping frame On
- messages
-
- 64 0x40 Show viewport and image sizes Off
-
- 128 0x80 PWCX debugging Off
-
- For example, to trace the open() & read() fuctions, sum 8 + 4 = 12,
- so you would supply trace=12 during insmod or modprobe. If
- you want to turn the initialization and probing tracing off, set trace=0.
- The default value for trace is 35 (0x23).
-
-
-
-Example:
-
- # modprobe pwc size=cif fps=15 power_save=1
-
-The fbufs, mbufs and trace parameters are global and apply to all connected
-cameras. Each camera has its own set of buffers.
-
-size and fps only specify defaults when you open() the device; this is to
-accommodate some tools that don't set the size. You can change these
-settings after open() with the Video4Linux ioctl() calls. The default of
-defaults is QCIF size at 10 fps.
-
-The compression parameter is semiglobal; it sets the initial compression
-preference for all camera's, but this parameter can be set per camera with
-the VIDIOCPWCSCQUAL ioctl() call.
-
-All parameters are optional.
-
+++ /dev/null
--------------------------------------------------------------------------
-Readme for Linux device driver for the Texas Instruments SilverLink cable
-and direct USB cable provided by some TI's handhelds.
--------------------------------------------------------------------------
-
-Author: Romain Liévin & Julien Blache
-Homepage: http://lpg.ticalc.org/prj_usb
-
-INTRODUCTION:
-
-This is a driver for the TI-GRAPH LINK USB (aka SilverLink) cable, a cable
-designed by TI for connecting their TI8x/9x calculators to a computer
-(PC or Mac usually). It has been extended to support the USB port offered by
-some latest TI handhelds (TI84+ and TI89 Titanium).
-
-If you need more information, please visit the 'SilverLink drivers' homepage
-at the above URL.
-
-WHAT YOU NEED:
-
-A TI calculator of course and a program capable to communicate with your
-calculator.
-TiLP will work for sure (since I am his developer !). yal92 may be able to use
-it by changing tidev for tiglusb (may require some hacking...).
-
-HOW TO USE IT:
-
-You must have first compiled USB support, support for your specific USB host
-controller (UHCI or OHCI).
-
-Next, (as root) from your appropriate modules directory (lib/modules/2.5.XX):
-
- insmod usb/usbcore.o
- insmod usb/usb-uhci.o <OR> insmod usb/ohci-hcd.o
- insmod tiglusb.o
-
-If it is not already there (it usually is), create the device:
-
- mknod /dev/tiglusb0 c 115 16
-
-You will have to set permissions on this device to allow you to read/write
-from it:
-
- chmod 666 /dev/tiglusb0
-
-Now you are ready to run a linking program such as TiLP. Be sure to configure
-it properly (RTFM).
-
-MODULE PARAMETERS:
-
- You can set these with: insmod tiglusb NAME=VALUE
- There is currently no way to set these on a per-cable basis.
-
- NAME: timeout
- TYPE: integer
- DEFAULT: 15
- DESC: Timeout value in tenth of seconds. If no data is available once this
- time has expired then the driver will return with a timeout error.
-
-QUIRKS:
-
-The following problem seems to be specific to the link cable since it appears
-on all platforms (Linux, Windows, Mac OS-X).
-
-In some very particular cases, the driver returns with success but
-without any data. The application should retry a read operation at least once.
-
-HOW TO CONTACT US:
-
-You can email me at roms@lpg.ticalc.org. Please prefix the subject line
-with "TIGLUSB: " so that I am certain to notice your message.
-You can also mail JB at jb@jblache.org: he has written the first release of
-this driver but he better knows the Mac OS-X driver.
-
-CREDITS:
-
-The code is based on dabusb.c, printer.c and scanner.c !
-The driver has been developed independently of Texas Instruments Inc.
+++ /dev/null
-/*
- * Alpha IO and memory functions.. Just expand the inlines in the header
- * files..
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/string.h>
-
-#include <asm/io.h>
-
-u8 _inb(unsigned long addr)
-{
- return __inb(addr);
-}
-
-u16 _inw(unsigned long addr)
-{
- return __inw(addr);
-}
-
-u32 _inl(unsigned long addr)
-{
- return __inl(addr);
-}
-
-
-void _outb(u8 b, unsigned long addr)
-{
- __outb(b, addr);
-}
-
-void _outw(u16 b, unsigned long addr)
-{
- __outw(b, addr);
-}
-
-void _outl(u32 b, unsigned long addr)
-{
- __outl(b, addr);
-}
-
-u8 ___raw_readb(unsigned long addr)
-{
- return __readb(addr);
-}
-
-u16 ___raw_readw(unsigned long addr)
-{
- return __readw(addr);
-}
-
-u32 ___raw_readl(unsigned long addr)
-{
- return __readl(addr);
-}
-
-u64 ___raw_readq(unsigned long addr)
-{
- return __readq(addr);
-}
-
-u8 _readb(unsigned long addr)
-{
- unsigned long r = __readb(addr);
- mb();
- return r;
-}
-
-u16 _readw(unsigned long addr)
-{
- unsigned long r = __readw(addr);
- mb();
- return r;
-}
-
-u32 _readl(unsigned long addr)
-{
- unsigned long r = __readl(addr);
- mb();
- return r;
-}
-
-u64 _readq(unsigned long addr)
-{
- unsigned long r = __readq(addr);
- mb();
- return r;
-}
-
-void ___raw_writeb(u8 b, unsigned long addr)
-{
- __writeb(b, addr);
-}
-
-void ___raw_writew(u16 b, unsigned long addr)
-{
- __writew(b, addr);
-}
-
-void ___raw_writel(u32 b, unsigned long addr)
-{
- __writel(b, addr);
-}
-
-void ___raw_writeq(u64 b, unsigned long addr)
-{
- __writeq(b, addr);
-}
-
-void _writeb(u8 b, unsigned long addr)
-{
- __writeb(b, addr);
- mb();
-}
-
-void _writew(u16 b, unsigned long addr)
-{
- __writew(b, addr);
- mb();
-}
-
-void _writel(u32 b, unsigned long addr)
-{
- __writel(b, addr);
- mb();
-}
-
-void _writeq(u64 b, unsigned long addr)
-{
- __writeq(b, addr);
- mb();
-}
-
-/*
- * Read COUNT 8-bit bytes from port PORT into memory starting at
- * SRC.
- */
-void insb (unsigned long port, void *dst, unsigned long count)
-{
- while (((unsigned long)dst) & 0x3) {
- if (!count)
- return;
- count--;
- *(unsigned char *) dst = inb(port);
- dst += 1;
- }
-
- while (count >= 4) {
- unsigned int w;
- count -= 4;
- w = inb(port);
- w |= inb(port) << 8;
- w |= inb(port) << 16;
- w |= inb(port) << 24;
- *(unsigned int *) dst = w;
- dst += 4;
- }
-
- while (count) {
- --count;
- *(unsigned char *) dst = inb(port);
- dst += 1;
- }
-}
-
-
-/*
- * Read COUNT 16-bit words from port PORT into memory starting at
- * SRC. SRC must be at least short aligned. This is used by the
- * IDE driver to read disk sectors. Performance is important, but
- * the interfaces seems to be slow: just using the inlined version
- * of the inw() breaks things.
- */
-void insw (unsigned long port, void *dst, unsigned long count)
-{
- if (((unsigned long)dst) & 0x3) {
- if (((unsigned long)dst) & 0x1) {
- panic("insw: memory not short aligned");
- }
- if (!count)
- return;
- count--;
- *(unsigned short *) dst = inw(port);
- dst += 2;
- }
-
- while (count >= 2) {
- unsigned int w;
- count -= 2;
- w = inw(port);
- w |= inw(port) << 16;
- *(unsigned int *) dst = w;
- dst += 4;
- }
-
- if (count) {
- *(unsigned short*) dst = inw(port);
- }
-}
-
-
-/*
- * Read COUNT 32-bit words from port PORT into memory starting at
- * SRC. Now works with any alignment in SRC. Performance is important,
- * but the interfaces seems to be slow: just using the inlined version
- * of the inl() breaks things.
- */
-void insl (unsigned long port, void *dst, unsigned long count)
-{
- unsigned int l = 0, l2;
-
- if (!count)
- return;
-
- switch (((unsigned long) dst) & 0x3)
- {
- case 0x00: /* Buffer 32-bit aligned */
- while (count--)
- {
- *(unsigned int *) dst = inl(port);
- dst += 4;
- }
- break;
-
- /* Assuming little endian Alphas in cases 0x01 -- 0x03 ... */
-
- case 0x02: /* Buffer 16-bit aligned */
- --count;
-
- l = inl(port);
- *(unsigned short *) dst = l;
- dst += 2;
-
- while (count--)
- {
- l2 = inl(port);
- *(unsigned int *) dst = l >> 16 | l2 << 16;
- dst += 4;
- l = l2;
- }
- *(unsigned short *) dst = l >> 16;
- break;
-
- case 0x01: /* Buffer 8-bit aligned */
- --count;
-
- l = inl(port);
- *(unsigned char *) dst = l;
- dst += 1;
- *(unsigned short *) dst = l >> 8;
- dst += 2;
- while (count--)
- {
- l2 = inl(port);
- *(unsigned int *) dst = l >> 24 | l2 << 8;
- dst += 4;
- l = l2;
- }
- *(unsigned char *) dst = l >> 24;
- break;
-
- case 0x03: /* Buffer 8-bit aligned */
- --count;
-
- l = inl(port);
- *(unsigned char *) dst = l;
- dst += 1;
- while (count--)
- {
- l2 = inl(port);
- *(unsigned int *) dst = l << 24 | l2 >> 8;
- dst += 4;
- l = l2;
- }
- *(unsigned short *) dst = l >> 8;
- dst += 2;
- *(unsigned char *) dst = l >> 24;
- break;
- }
-}
-
-
-/*
- * Like insb but in the opposite direction.
- * Don't worry as much about doing aligned memory transfers:
- * doing byte reads the "slow" way isn't nearly as slow as
- * doing byte writes the slow way (no r-m-w cycle).
- */
-void outsb(unsigned long port, const void * src, unsigned long count)
-{
- while (count) {
- count--;
- outb(*(char *)src, port);
- src += 1;
- }
-}
-
-/*
- * Like insw but in the opposite direction. This is used by the IDE
- * driver to write disk sectors. Performance is important, but the
- * interfaces seems to be slow: just using the inlined version of the
- * outw() breaks things.
- */
-void outsw (unsigned long port, const void *src, unsigned long count)
-{
- if (((unsigned long)src) & 0x3) {
- if (((unsigned long)src) & 0x1) {
- panic("outsw: memory not short aligned");
- }
- outw(*(unsigned short*)src, port);
- src += 2;
- --count;
- }
-
- while (count >= 2) {
- unsigned int w;
- count -= 2;
- w = *(unsigned int *) src;
- src += 4;
- outw(w >> 0, port);
- outw(w >> 16, port);
- }
-
- if (count) {
- outw(*(unsigned short *) src, port);
- }
-}
-
-
-/*
- * Like insl but in the opposite direction. This is used by the IDE
- * driver to write disk sectors. Works with any alignment in SRC.
- * Performance is important, but the interfaces seems to be slow:
- * just using the inlined version of the outl() breaks things.
- */
-void outsl (unsigned long port, const void *src, unsigned long count)
-{
- unsigned int l = 0, l2;
-
- if (!count)
- return;
-
- switch (((unsigned long) src) & 0x3)
- {
- case 0x00: /* Buffer 32-bit aligned */
- while (count--)
- {
- outl(*(unsigned int *) src, port);
- src += 4;
- }
- break;
-
- case 0x02: /* Buffer 16-bit aligned */
- --count;
-
- l = *(unsigned short *) src << 16;
- src += 2;
-
- while (count--)
- {
- l2 = *(unsigned int *) src;
- src += 4;
- outl (l >> 16 | l2 << 16, port);
- l = l2;
- }
- l2 = *(unsigned short *) src;
- outl (l >> 16 | l2 << 16, port);
- break;
-
- case 0x01: /* Buffer 8-bit aligned */
- --count;
-
- l = *(unsigned char *) src << 8;
- src += 1;
- l |= *(unsigned short *) src << 16;
- src += 2;
- while (count--)
- {
- l2 = *(unsigned int *) src;
- src += 4;
- outl (l >> 8 | l2 << 24, port);
- l = l2;
- }
- l2 = *(unsigned char *) src;
- outl (l >> 8 | l2 << 24, port);
- break;
-
- case 0x03: /* Buffer 8-bit aligned */
- --count;
-
- l = *(unsigned char *) src << 24;
- src += 1;
- while (count--)
- {
- l2 = *(unsigned int *) src;
- src += 4;
- outl (l >> 24 | l2 << 8, port);
- l = l2;
- }
- l2 = *(unsigned short *) src;
- src += 2;
- l2 |= *(unsigned char *) src << 16;
- outl (l >> 24 | l2 << 8, port);
- break;
- }
-}
-
-
-/*
- * Copy data from IO memory space to "real" memory space.
- * This needs to be optimized.
- */
-void _memcpy_fromio(void * to, unsigned long from, long count)
-{
- /* Optimize co-aligned transfers. Everything else gets handled
- a byte at a time. */
-
- if (count >= 8 && ((unsigned long)to & 7) == (from & 7)) {
- count -= 8;
- do {
- *(u64 *)to = __raw_readq(from);
- count -= 8;
- to += 8;
- from += 8;
- } while (count >= 0);
- count += 8;
- }
-
- if (count >= 4 && ((unsigned long)to & 3) == (from & 3)) {
- count -= 4;
- do {
- *(u32 *)to = __raw_readl(from);
- count -= 4;
- to += 4;
- from += 4;
- } while (count >= 0);
- count += 4;
- }
-
- if (count >= 2 && ((unsigned long)to & 1) == (from & 1)) {
- count -= 2;
- do {
- *(u16 *)to = __raw_readw(from);
- count -= 2;
- to += 2;
- from += 2;
- } while (count >= 0);
- count += 2;
- }
-
- while (count > 0) {
- *(u8 *) to = __raw_readb(from);
- count--;
- to++;
- from++;
- }
-}
-
-/*
- * Copy data from "real" memory space to IO memory space.
- * This needs to be optimized.
- */
-void _memcpy_toio(unsigned long to, const void * from, long count)
-{
- /* Optimize co-aligned transfers. Everything else gets handled
- a byte at a time. */
- /* FIXME -- align FROM. */
-
- if (count >= 8 && (to & 7) == ((unsigned long)from & 7)) {
- count -= 8;
- do {
- __raw_writeq(*(const u64 *)from, to);
- count -= 8;
- to += 8;
- from += 8;
- } while (count >= 0);
- count += 8;
- }
-
- if (count >= 4 && (to & 3) == ((unsigned long)from & 3)) {
- count -= 4;
- do {
- __raw_writel(*(const u32 *)from, to);
- count -= 4;
- to += 4;
- from += 4;
- } while (count >= 0);
- count += 4;
- }
-
- if (count >= 2 && (to & 1) == ((unsigned long)from & 1)) {
- count -= 2;
- do {
- __raw_writew(*(const u16 *)from, to);
- count -= 2;
- to += 2;
- from += 2;
- } while (count >= 0);
- count += 2;
- }
-
- while (count > 0) {
- __raw_writeb(*(const u8 *) from, to);
- count--;
- to++;
- from++;
- }
- mb();
-}
-
-/*
- * "memset" on IO memory space.
- */
-void _memset_c_io(unsigned long to, unsigned long c, long count)
-{
- /* Handle any initial odd byte */
- if (count > 0 && (to & 1)) {
- __raw_writeb(c, to);
- to++;
- count--;
- }
-
- /* Handle any initial odd halfword */
- if (count >= 2 && (to & 2)) {
- __raw_writew(c, to);
- to += 2;
- count -= 2;
- }
-
- /* Handle any initial odd word */
- if (count >= 4 && (to & 4)) {
- __raw_writel(c, to);
- to += 4;
- count -= 4;
- }
-
- /* Handle all full-sized quadwords: we're aligned
- (or have a small count) */
- count -= 8;
- if (count >= 0) {
- do {
- __raw_writeq(c, to);
- to += 8;
- count -= 8;
- } while (count >= 0);
- }
- count += 8;
-
- /* The tail is word-aligned if we still have count >= 4 */
- if (count >= 4) {
- __raw_writel(c, to);
- to += 4;
- count -= 4;
- }
-
- /* The tail is half-word aligned if we have count >= 2 */
- if (count >= 2) {
- __raw_writew(c, to);
- to += 2;
- count -= 2;
- }
-
- /* And finally, one last byte.. */
- if (count) {
- __raw_writeb(c, to);
- }
- mb();
-}
-
-void
-scr_memcpyw(u16 *d, const u16 *s, unsigned int count)
-{
- if (! __is_ioaddr((unsigned long) s)) {
- /* Source is memory. */
- if (! __is_ioaddr((unsigned long) d))
- memcpy(d, s, count);
- else
- memcpy_toio(d, s, count);
- } else {
- /* Source is screen. */
- if (! __is_ioaddr((unsigned long) d))
- memcpy_fromio(d, s, count);
- else {
- /* FIXME: Should handle unaligned ops and
- operation widening. */
- count /= 2;
- while (count--) {
- u16 tmp = __raw_readw((unsigned long)(s++));
- __raw_writew(tmp, (unsigned long)(d++));
- }
- }
- }
-}
+++ /dev/null
-/*
- * linux/arch/arm/boot/compressed/head-ftvpci.S
- *
- * Copyright (C) 2000 FutureTV Labs Ltd.
- *
- * Special startup code for FTV PCI board.
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
- .section ".start", "ax"
-ftv_start:
- mcr p15, 0, r0, c7, c5, 0 @ flush I cache
- mrc p15, 0, r0, c1, c0
- orr r0, r0, #1 << 12
- mcr p15, 0, r0, c1, c0 @ enable I cache
- mov r0, #0
- mcreq p15, 0, r0, c15, c1, 2 @ enable clock switching
-
- /* check to see if the kernel must be relocated */
- ldr ip, =ftv_start
- adr sl, ftv_start
- teq ip, sl
- beq 2f @ no need to copy
-
- /* in the wrong place -> presumably, executing out of ROM */
- sub ip, ip, sl @ displacement
- ldr lr, =_start @ destination
- sub sp, lr, ip @ source
- ldr fp, =_edata @ end of copied area
-1: ldmia sp!, {r0, r1, r2, r3, r4, r5, r6, r10}
- stmia lr!, {r0, r1, r2, r3, r4, r5, r6, r10}
- cmp lr, fp
- ble 1b
-
-2:
- mov r8, #0
- mov r7, #3
- b 1f
-.ltorg
-1:
- /* fall back into head.S */
+++ /dev/null
-/*
- * Bright Star Engineering Inc.
- *
- * code for readng parameters from the
- * parameter blocks of the boot block
- * flash memory
- *
- */
-
-static int strcmp(const char *s1, const char *s2)
-{
- while (*s1 != '\0' && *s1 == *s2)
- {
- s1++;
- s2++;
- }
-
- return (*(unsigned char *) s1) - (*(unsigned char *) s2);
-}
-
-struct pblk_t {
- char type;
- unsigned short size;
-};
-
-static char *bse_getflashparam(char *name) {
- unsigned int esize;
- char *q,*r;
- unsigned char *p,*e;
- struct pblk_t *thepb = (struct pblk_t *) 0x00004000;
- struct pblk_t *altpb = (struct pblk_t *) 0x00006000;
- if (thepb->type&1) {
- if (altpb->type&1) {
- /* no valid param block */
- return (char*)0;
- } else {
- /* altpb is valid */
- struct pblk_t *tmp;
- tmp = thepb;
- thepb = altpb;
- altpb = tmp;
- }
- }
- p = (char*)thepb + sizeof(struct pblk_t);
- e = p + thepb->size;
- while (p < e) {
- q = p;
- esize = *p;
- if (esize == 0xFF) break;
- if (esize == 0) break;
- if (esize > 127) {
- esize = (esize&0x7F)<<8 | p[1];
- q++;
- }
- q++;
- r=q;
- if (*r && ((name == 0) || (!strcmp(name,r)))) {
- while (*q++) ;
- return q;
- }
- p+=esize;
- }
- return (char*)0;
-}
-
-void bse_setup(void) {
- /* extract the linux cmdline from flash */
- char *name=bse_getflashparam("linuxboot");
- char *x = (char *)0xc0000100;
- if (name) {
- while (*name) *x++=*name++;
- }
- *x=0;
-}
+++ /dev/null
-#include <linux/ioport.h>
-#include <linux/device.h>
-#include <linux/init.h>
-
-int __init platform_add_device(struct platform_device *dev)
-{
- int i;
-
- for (i = 0; i < dev->num_resources; i++) {
- struct resource *r = &dev->resource[i];
-
- r->name = dev->dev.bus_id;
-
- if (r->flags & IORESOURCE_MEM &&
- request_resource(&iomem_resource, r)) {
- printk(KERN_ERR
- "%s%d: failed to claim resource %d\n",
- dev->name, dev->id, i);
- break;
- }
- }
- if (i == dev->num_resources)
- platform_device_register(dev);
- return 0;
-}
-
-int __init platform_add_devices(struct platform_device **devs, int num)
-{
- int i;
-
- for (i = 0; i < num; i++)
- platform_add_device(devs[i]);
-
- return 0;
-}
+++ /dev/null
-/*
- * Driver for PLX Technology PCI9000-series host bridge.
- *
- * Copyright (C) 1997, 1998, 1999, 2000 FutureTV Labs Ltd
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/io.h>
-#include <asm/ptrace.h>
-#include <asm/irq.h>
-#include <asm/mach/pci.h>
-
-/*
- * Since the following functions are all very similar, the common parts
- * are pulled out into these macros.
- */
-
-#define PLX_CLEAR_CONFIG \
- __raw_writel(0, PLX_BASE + 0xac); \
- local_irq_restore(flags); }
-
-#define PLX_SET_CONFIG \
- { unsigned long flags; \
- local_irq_save(flags); \
- __raw_writel((1<<31 | (bus->number << 16) \
- | (devfn << 8) | (where & ~3) \
- | ((bus->number == 0)?0:1)), PLX_BASE + 0xac); \
-
-#define PLX_CONFIG_WRITE(size) \
- PLX_SET_CONFIG \
- __raw_write##size(value, PCIO_BASE + (where & 3)); \
- if (__raw_readw(PLX_BASE + 0x6) & 0x2000) \
- __raw_writew(0x2000, PLX_BASE + 0x6); \
- PLX_CLEAR_CONFIG \
- return PCIBIOS_SUCCESSFUL;
-
-#define PLX_CONFIG_READ(size) \
- PLX_SET_CONFIG \
- *value = __raw_read##size(PCIO_BASE + (where & 3)); \
- if (__raw_readw(PLX_BASE + 0x6) & 0x2000) { \
- __raw_writew(0x2000, PLX_BASE + 0x6); \
- *value = 0xffffffffUL; \
- } \
- PLX_CLEAR_CONFIG \
- return PCIBIOS_SUCCESSFUL;
-
-/* Configuration space access routines */
-
-static int
-plx90x0_read_config (struct pci_bus *bus, unsigned int devfn, int where,
- int where, int size, u32 *value)
-{
- switch (size) {
- case 1:
- PLX_CONFIG_READ(b)
- break;
- case 2:
- PLX_CONFIG_READ(w)
- break;
- case 4:
- PLX_CONFIG_READ(l)
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int
-plx90x0_write_config (struct pci_bus *bus, unsigned int devfn, int where,
- int where, int size, u32 value)
-{
- switch (size) {
- case 1:
- PLX_CONFIG_WRITE(b)
- break;
- case 2:
- PLX_CONFIG_WRITE(w)
- break;
- case 4:
- PLX_CONFIG_WRITE(l)
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops plx90x0_ops =
-{
- .read = plx90x0_read_config,
- .write = plx90x0_write_config,
-};
-
-static void
-plx_syserr_handler(int irq, void *handle, struct pt_regs *regs)
-{
- printk("PLX90x0: machine check %04x (pc=%08lx)\n",
- readw(PLX_BASE + 6), regs->ARM_pc);
- __raw_writew(0xf000, PLX_BASE + 6);
-}
-
-/*
- * Initialise the PCI system.
- */
-
-void __init
-plx90x0_init(struct arm_sysdata *sysdata)
-{
- static const unsigned long int base = PLX_BASE;
- char *what;
- unsigned long bar = (unsigned long)virt_to_bus((void *)PAGE_OFFSET);
-
- /* Have a sniff around and see which PLX device is present. */
- unsigned long id = __raw_readl(base + 0xf0);
-
-#if 0
- /* This check was a good idea, but can fail. The PLX9060 puts no
- default value in these registers unless NB# is asserted (which it
- isn't on these cards). */
- if ((id & 0xffff) != PCI_VENDOR_ID_PLX)
- return; /* Nothing found */
-#endif
-
- /* Found one - now work out what it is. */
- switch (id >> 16) {
- case 0: /* PCI_DEVICE_ID_PLX_9060 */
- what = "PCI9060";
- break;
- case PCI_DEVICE_ID_PLX_9060ES:
- what = "PCI9060ES";
- break;
- case PCI_DEVICE_ID_PLX_9060SD:
- what = "PCI9060SD"; /* uhuhh.. */
- break;
- case PCI_DEVICE_ID_PLX_9080:
- what = "PCI9080";
- break;
- default:
- printk("PCI: Unknown PLX device %04lx found -- ignored.\n",
- id >> 16);
- return;
- }
-
- printk("PCI: PLX Technology %s host bridge found.\n", what);
-
- /* Now set it up for both master and slave accesses. */
- __raw_writel(0xffff0147, base + 0x4);
- __raw_writeb(32, base + 0xd);
- __raw_writel(0x8 | bar, base + 0x18);
- __raw_writel(0xf8000008, base + 0x80);
- __raw_writel(0x40000001, base + 0x84);
- __raw_writel(0, base + 0x88);
- __raw_writel(0, base + 0x8c);
- __raw_writel(0x11, base + 0x94);
- __raw_writel(0xC3 + (4 << 28)
- + (8 << 11) + (1 << 10)
- + (1 << 24), base + 0x98);
- __raw_writel(0xC0000000, base + 0x9c);
- __raw_writel(PLX_MEM_START, base + 0xa0);
- __raw_writel(PLX_IO_START, base + 0xa4);
- __raw_writel(0x3, base + 0xa8);
- __raw_writel(0, base + 0xac);
- __raw_writel(0x10001, base + 0xe8);
- __raw_writel(0x8000767e, base + 0xec);
-
- request_irq(IRQ_SYSERR, plx_syserr_handler, 0,
- "system error", NULL);
-
- pci_scan_bus(0, &plx90x0_ops, sysdata);
-}
+++ /dev/null
-#
-# Automatically generated by make menuconfig: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-# CONFIG_GENERIC_BUST_SPINLOCK is not set
-# CONFIG_GENERIC_ISA_DMA is not set
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-CONFIG_ARCH_ADIFCC=y
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_CAMELOT is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP310 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_SA1100 is not set
-# CONFIG_ARCH_SHARK is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_ADSBITSY is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_H3600 is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FLEXANET is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_GRAPHICSMASTER is not set
-# CONFIG_SA1100_JORNADA720 is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_ITSY is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_OMNIMETER is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_SIMPAD is not set
-# CONFIG_SA1100_PFS168 is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-# CONFIG_SA1100_USB is not set
-# CONFIG_SA1100_USB_NETLINK is not set
-# CONFIG_SA1100_USB_CHAR is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_CDB89712 is not set
-# CONFIG_ARCH_CLEP7312 is not set
-# CONFIG_ARCH_EDB7211 is not set
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_EP7211 is not set
-# CONFIG_ARCH_EP7212 is not set
-CONFIG_ARCH_ADI_EVB=y
-CONFIG_XSCALE_PMU_TIMER=y
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-# CONFIG_CPU_32v3 is not set
-# CONFIG_CPU_32v4 is not set
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM926T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-# CONFIG_CPU_SA1100 is not set
-CONFIG_CPU_32v4=y
-CONFIG_CPU_XSCALE=y
-CONFIG_ARM_THUMB=y
-# CONFIG_XSCALE_TOOLS is not set
-CONFIG_XSCALE_WRITE_ALLOC=y
-CONFIG_XSCALE_PMU=y
-CONFIG_ARM_THUMB=y
-# CONFIG_DISCONTIGMEM is not set
-
-#
-# General setup
-#
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-# CONFIG_HOTPLUG is not set
-# CONFIG_PCMCIA is not set
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-CONFIG_BINFMT_AOUT=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/mtdblock1 mem=32M initrd=0xc0800000,3M"
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_BOOTLDR_PARTS is not set
-# CONFIG_MTD_AFS_PARTS is not set
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_JEDEC is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-# CONFIG_MTD_CDB89712 is not set
-# CONFIG_MTD_SA1100 is not set
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_IQ80310 is not set
-CONFIG_MTD_ADI_EVB=y
-# CONFIG_MTD_PCI is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-# CONFIG_PNPBIOS is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_CISS_SCSI_TAPE is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_MD_MULTIPATH is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-CONFIG_NETLINK=y
-CONFIG_RTNETLINK=y
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_ARM_AM79C961A is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNBMAC is not set
-# CONFIG_SUNQE is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_MYRI_SBUS is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-# CONFIG_INPUT is not set
-# CONFIG_INPUT_KEYBDEV is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-CONFIG_SERIAL=y
-CONFIG_SERIAL_CONSOLE=y
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_AMBA is not set
-# CONFIG_SERIAL_AMBA_CONSOLE is not set
-# CONFIG_SERIAL_CLPS711X is not set
-# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
-# CONFIG_SERIAL_21285 is not set
-# CONFIG_SERIAL_21285_OLD is not set
-# CONFIG_SERIAL_21285_CONSOLE is not set
-# CONFIG_SERIAL_UART00 is not set
-# CONFIG_SERIAL_UART00_CONSOLE is not set
-# CONFIG_SERIAL_SA1100 is not set
-# CONFIG_SERIAL_SA1100_CONSOLE is not set
-# CONFIG_SERIAL_8250 is not set
-# CONFIG_SERIAL_8250_CONSOLE is not set
-# CONFIG_SERIAL_8250_EXTENDED is not set
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-# CONFIG_SERIAL_8250_SHARE_IRQ is not set
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_HUB6 is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# L3 serial bus support
-#
-# CONFIG_L3 is not set
-# CONFIG_L3_ALGOBIT is not set
-# CONFIG_L3_BIT_SA1100_GPIO is not set
-# CONFIG_L3_SA1111 is not set
-# CONFIG_BIT_SA1100_GPIO is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-CONFIG_MOUSE=y
-CONFIG_PSMOUSE=y
-# CONFIG_82C710_MOUSE is not set
-# CONFIG_PC110_PAD is not set
-
-#
-# Joysticks
-#
-# CONFIG_INPUT_GAMEPORT is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_CMS_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_JBD_DEBUG is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_CRAMFS is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_FREEVXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_NFS_FS is not set
-# CONFIG_NFS_V3 is not set
-# CONFIG_ROOT_NFS is not set
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-# CONFIG_SUNRPC is not set
-# CONFIG_LOCKD is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-# CONFIG_ZISOFS_FS is not set
-# CONFIG_ZLIB_FS_INFLATE is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
-
-#
-# Multimedia Capabilities Port drivers
-#
-# CONFIG_MCP is not set
-# CONFIG_MCP_SA1100 is not set
-# CONFIG_MCP_UCB1200 is not set
-# CONFIG_MCP_UCB1200_AUDIO is not set
-# CONFIG_MCP_UCB1200_TS is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-# CONFIG_USB_OHCI is not set
-# CONFIG_USB_OHCI_SA1111 is not set
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_STORAGE_DEBUG is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
-# CONFIG_USB_STORAGE_HP8200e is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_HPUSBSCSI is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_CDCETHER is not set
-# CONFIG_USB_USBNET is not set
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_SERIAL_GENERIC is not set
-# CONFIG_USB_SERIAL_BELKIN is not set
-# CONFIG_USB_SERIAL_WHITEHEAT is not set
-# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_EMPEG is not set
-# CONFIG_USB_SERIAL_FTDI_SIO is not set
-# CONFIG_USB_SERIAL_VISOR is not set
-# CONFIG_USB_SERIAL_IR is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-# CONFIG_USB_SERIAL_KEYSPAN is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_PL2303 is not set
-# CONFIG_USB_SERIAL_CYBERJACK is not set
-# CONFIG_USB_SERIAL_XIRCOM is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_ID75 is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_INFO is not set
-CONFIG_DEBUG_SLAB=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_NO_PGT_CACHE is not set
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
+++ /dev/null
-#
-# Automatically generated by make menuconfig: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_SHARK is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FLEXANET is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_JORNADA720 is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_ITSY is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_OMNIMETER is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_SIMPAD is not set
-# CONFIG_SA1100_PFS168 is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-# CONFIG_SA1100_GRAPHICSMASTER is not set
-CONFIG_SA1100_ADSBITSY=y
-CONFIG_SA1111=y
-# CONFIG_SA1100_USB is not set
-# CONFIG_SA1100_USB_NETLINK is not set
-# CONFIG_SA1100_USB_CHAR is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-
-#
-# General setup
-#
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=y
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=y
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_APM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="ip=off mem=32M root=/dev/ram ramdisk=8192 initrd=0xc0800000,4M"
-# CONFIG_PFS168_CMDLINE is not set
-# CONFIG_LEDS is not set
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNBMAC is not set
-# CONFIG_SUNQE is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_ACENIC_OMIT_TIGON_I is not set
-# CONFIG_MYRI_SBUS is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=y
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=y
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-CONFIG_INPUT=y
-# CONFIG_INPUT_KEYBDEV is not set
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_SERIAL_21285 is not set
-# CONFIG_SERIAL_21285_OLD is not set
-# CONFIG_SERIAL_21285_CONSOLE is not set
-# CONFIG_SERIAL_AMBA is not set
-# CONFIG_SERIAL_AMBA_CONSOLE is not set
-# CONFIG_SERIAL_CLPS711X is not set
-# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=38400
-# CONFIG_SERIAL_8250 is not set
-# CONFIG_SERIAL_8250_CONSOLE is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-CONFIG_UCB1200=y
-CONFIG_TOUCHSCREEN_UCB1200=y
-CONFIG_AUDIO_UCB1200=y
-CONFIG_ADC_UCB1200=y
-# CONFIG_TOUCHSCREEN_BITSY is not set
-# CONFIG_PROFILER is not set
-# CONFIG_PFS168_SPI is not set
-# CONFIG_PFS168_DTMF is not set
-# CONFIG_PFS168_MISC is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_SA1100_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-CONFIG_FAT_FS=y
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-CONFIG_VFAT_FS=y
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_JFFS2_FS is not set
-CONFIG_CRAMFS=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-# CONFIG_FB_CYBER2000 is not set
-CONFIG_FB_SA1100=y
-# CONFIG_FB_E1355 is not set
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_FBCON_ADVANCED is not set
-CONFIG_FBCON_CFB2=y
-CONFIG_FBCON_CFB4=y
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-# CONFIG_FONT_8x8 is not set
-CONFIG_FONT_8x16=y
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB=y
-# CONFIG_USB_DEBUG is not set
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-CONFIG_USB_OHCI=y
-CONFIG_USB_OHCI_NOPCI=y
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-# CONFIG_USB_HID is not set
-# CONFIG_USB_KBD is not set
-CONFIG_USB_MOUSE=y
-# CONFIG_USB_WACOM is not set
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_IBMCAM is not set
-# CONFIG_USB_OV511 is not set
-# CONFIG_USB_PWC is not set
-# CONFIG_USB_SE401 is not set
-# CONFIG_USB_DSBR is not set
-# CONFIG_USB_DABUSB is not set
-# CONFIG_USB_PLUSB is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_NET1080 is not set
-# CONFIG_USB_USBNET is not set
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_RIO500 is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_INFO is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_NO_PGT_CACHE is not set
-# CONFIG_DEBUG_LL is not set
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_SBUS is not set
-CONFIG_UID16=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-CONFIG_SA1100_BRUTUS=y
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_THINCLIENT is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-CONFIG_ANGELBOOT=y
-# CONFIG_SA1100_FREQUENCY_SCALE is not set
-# CONFIG_SA1100_VOLTAGE_SCALE is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-CONFIG_CPU_32v4=y
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-CONFIG_PC_KEYMAP=y
-
-#
-# General setup
-#
-# CONFIG_HOTPLUG is not set
-# CONFIG_PCMCIA is not set
-# CONFIG_NET is not set
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_NWFPE=y
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-CONFIG_BINFMT_AOUT=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="mem=4M@0xc0000000 mem=4M@0xc8000000 mem=4M@0xd0000000 mem=4M@0xd8000000 keepinitrd root=/dev/ram ramdisk=8192 initrd=0xd8000000,3M"
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_LEDS_CPU=y
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_LVM is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_BLK_DEV_FLASH is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_TOUCHSCREEN_UCB1200 is not set
-# CONFIG_TOUCHSCREEN_BITSY is not set
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-
-#
-# Video For Linux
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_RAMFS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-# CONFIG_NCPFS_NLS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_NLS is not set
-
-#
-# Console drivers
-#
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FB=y
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_CYBER2000 is not set
-CONFIG_FB_SA1100=y
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_FBCON_ADVANCED is not set
-CONFIG_FBCON_CFB2=y
-CONFIG_FBCON_CFB4=y
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-CONFIG_FONT_8x8=y
-# CONFIG_FONT_8x16 is not set
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_DEBUG_LL is not set
+++ /dev/null
-#
-#
-# Example empeg-car kernel configuration file.
-#
-CONFIG_ARM=y
-
-#
-# System and processor type
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_FOOTBRIDGE is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_CPU_SA1100=y
-# CONFIG_SA1100_BRUTUS is not set
-CONFIG_SA1100_EMPEG=y
-# CONFIG_SA1100_ITSY is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_EMPEG_HENRY is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_ISA_DMA is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-# CONFIG_CPU_ARM2 is not set
-# CONFIG_CPU_ARM3 is not set
-# CONFIG_CPU_ARM6 is not set
-# CONFIG_CPU_ARM7 is not set
-CONFIG_CPU_SA110=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_ALIGNMENT_TRAP is not set
-# CONFIG_TEXT_SECTIONS is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODVERSIONS=y
-# CONFIG_KMOD is not set
-
-#
-# General setup
-#
-CONFIG_NET=y
-# CONFIG_SYSVIPC is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_SYSCTL is not set
-CONFIG_NWFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_ARTHUR is not set
-# CONFIG_PARPORT is not set
-CONFIG_CMDLINE="mem=4M@0xc0000000 mem=4M@0xc8000000 root=/dev/hda1 initrd=0xd00b0000,320K"
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_IDE=y
-# CONFIG_BLK_DEV_HD_IDE is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_MD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_BLK_DEV_XD is not set
-CONFIG_PARIDE_PARPORT=y
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_UNIX98_PTYS is not set
-# CONFIG_MOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-CONFIG_EMPEG_IR=y
-CONFIG_EMPEG_USB=y
-
-#
-# Video For Linux
-#
-CONFIG_VIDEO_DEV=y
-# CONFIG_RADIO_RTRACK is not set
-# CONFIG_RADIO_RTRACK2 is not set
-# CONFIG_RADIO_AZTECH is not set
-# CONFIG_RADIO_CADET is not set
-# CONFIG_RADIO_MIROPCM20 is not set
-# CONFIG_RADIO_GEMTEK is not set
-CONFIG_RADIO_EMPEG=y
-# CONFIG_VIDEO_BT848 is not set
-# CONFIG_VIDEO_PMS is not set
-# CONFIG_VIDEO_SAA5249 is not set
-# CONFIG_RADIO_SF16FMI is not set
-# CONFIG_RADIO_TYPHOON is not set
-# CONFIG_RADIO_ZOLTRIX is not set
-
-#
-# Joystick support
-#
-# CONFIG_JOYSTICK is not set
-# CONFIG_DTLK is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK is not set
-# CONFIG_FIREWALL is not set
-# CONFIG_FILTER is not set
-# CONFIG_UNIX is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_IP_ROUTER is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_ALIAS is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_RARP is not set
-# CONFIG_SKB_LARGE is not set
-# CONFIG_IPV6 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_LLC is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-# CONFIG_CPU_IS_SLOW is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA subsystem support
-#
-# CONFIG_IRDA is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_NET_ETHERNET is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_DLCI is not set
-CONFIG_PPP=y
-# CONFIG_SLIP is not set
-# CONFIG_NET_RADIO is not set
-# CONFIG_TR is not set
-# CONFIG_SHAPER is not set
-# CONFIG_HOSTESS_SV11 is not set
-# CONFIG_COSA is not set
-# CONFIG_RCPCI is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Filesystems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-# CONFIG_NFS_FS is not set
-# CONFIG_NFSD is not set
-# CONFIG_SUNRPC is not set
-# CONFIG_LOCKD is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_NLS is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_USER_BACKTRACE=y
-# CONFIG_DEBUG_INFO is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_DEBUG_LL is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-# CONFIG_GENERIC_BUST_SPINLOCK is not set
-# CONFIG_GENERIC_ISA_DMA is not set
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_CAMELOT is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_SHARK is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-
-#
-# Archimedes/A5000 Implementations (select only ONE)
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_ADSBITSY is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_H3600 is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-CONFIG_SA1100_FLEXANET=y
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_GRAPHICSMASTER is not set
-# CONFIG_SA1100_JORNADA720 is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_ITSY is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_OMNIMETER is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_SHANNON is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_SIMPAD is not set
-# CONFIG_SA1100_PFS168 is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-CONFIG_SA1100_USB=y
-CONFIG_SA1100_USB_NETLINK=y
-# CONFIG_SA1100_USB_CHAR is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_AUTCPU12 is not set
-# CONFIG_ARCH_CDB89712 is not set
-# CONFIG_ARCH_CLEP7312 is not set
-# CONFIG_ARCH_EDB7211 is not set
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_EP7211 is not set
-# CONFIG_ARCH_EP7212 is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-
-#
-# Processor Type
-#
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM922T is not set
-# CONFIG_CPU_ARM926T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_DISCONTIGMEM=y
-
-#
-# General setup
-#
-# CONFIG_PCI is not set
-CONFIG_ISA=y
-# CONFIG_ISA_DMA is not set
-CONFIG_CPU_FREQ=y
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=y
-# CONFIG_I82092 is not set
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=y
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-
-#
-# At least one math emulation must be selected
-#
-CONFIG_FPE_NWFPE=y
-CONFIG_FPE_FASTFPE=y
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_PM=y
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="mem=64M root=/dev/ram initrd=0xc0800000,3M"
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_LEDS_CPU=y
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-# CONFIG_MTD_BOOTLDR_PARTS is not set
-# CONFIG_MTD_AFS_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-# CONFIG_MTD_CHAR is not set
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_JEDEC is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-# CONFIG_MTD_CDB89712 is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_PCI is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_MD_MULTIPATH is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-
-#
-#
-#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_ARM_AM79C961A is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNBMAC is not set
-# CONFIG_SUNQE is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-CONFIG_NET_VENDOR_SMC=y
-# CONFIG_WD80x3 is not set
-# CONFIG_ULTRAMCA is not set
-# CONFIG_ULTRA is not set
-# CONFIG_ULTRA32 is not set
-CONFIG_SMC9194=y
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_MYRI_SBUS is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-CONFIG_NET_RADIO=y
-# CONFIG_STRIP is not set
-# CONFIG_WAVELAN is not set
-# CONFIG_ARLAN is not set
-# CONFIG_AIRONET4500 is not set
-# CONFIG_AIRONET4500_NONCS is not set
-# CONFIG_AIRONET4500_PROC is not set
-# CONFIG_AIRO is not set
-CONFIG_HERMES=m
-
-#
-# Wireless Pcmcia cards support
-#
-CONFIG_PCMCIA_HERMES=m
-# CONFIG_AIRO_CS is not set
-CONFIG_NET_WIRELESS=y
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=y
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=y
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_ATARAID is not set
-# CONFIG_BLK_DEV_ATARAID_PDC is not set
-# CONFIG_BLK_DEV_ATARAID_HPT is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-# CONFIG_INPUT is not set
-# CONFIG_INPUT_KEYBDEV is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_AMBA is not set
-# CONFIG_SERIAL_AMBA_CONSOLE is not set
-# CONFIG_SERIAL_CLPS711X is not set
-# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
-# CONFIG_SERIAL_21285 is not set
-# CONFIG_SERIAL_21285_OLD is not set
-# CONFIG_SERIAL_21285_CONSOLE is not set
-# CONFIG_SERIAL_UART00 is not set
-# CONFIG_SERIAL_UART00_CONSOLE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=57600
-# CONFIG_SERIAL_8250 is not set
-# CONFIG_SERIAL_8250_CONSOLE is not set
-# CONFIG_SERIAL_8250_EXTENDED is not set
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-# CONFIG_SERIAL_8250_SHARE_IRQ is not set
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_HUB6 is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# L3 serial bus support
-#
-# CONFIG_L3 is not set
-# CONFIG_L3_ALGOBIT is not set
-# CONFIG_L3_BIT_SA1100_GPIO is not set
-
-#
-# Other L3 adapters
-#
-# CONFIG_L3_SA1111 is not set
-# CONFIG_BIT_SA1100_GPIO is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_INPUT_GAMEPORT is not set
-
-#
-# Input core support is needed for gameports
-#
-
-#
-# Input core support is needed for joysticks
-#
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-CONFIG_SA1100_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_JBD_DEBUG is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_CRAMFS is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-# CONFIG_ZISOFS_FS is not set
-# CONFIG_ZLIB_FS_INFLATE is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-CONFIG_FB_SA1100=y
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_FBCON_ADVANCED is not set
-CONFIG_FBCON_CFB2=y
-CONFIG_FBCON_CFB4=y
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
-# CONFIG_FBCON_FONTS is not set
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-
-#
-# Sound
-#
-CONFIG_SOUND=y
-# CONFIG_SOUND_BT878 is not set
-# CONFIG_SOUND_CMPCI is not set
-# CONFIG_SOUND_EMU10K1 is not set
-# CONFIG_MIDI_EMU10K1 is not set
-# CONFIG_SOUND_FUSION is not set
-# CONFIG_SOUND_CS4281 is not set
-# CONFIG_SOUND_ES1370 is not set
-# CONFIG_SOUND_ES1371 is not set
-# CONFIG_SOUND_ESSSOLO1 is not set
-# CONFIG_SOUND_MAESTRO is not set
-# CONFIG_SOUND_MAESTRO3 is not set
-# CONFIG_SOUND_ICH is not set
-# CONFIG_SOUND_RME96XX is not set
-# CONFIG_SOUND_SONICVIBES is not set
-# CONFIG_SOUND_TRIDENT is not set
-# CONFIG_SOUND_MSNDCLAS is not set
-# CONFIG_SOUND_MSNDPIN is not set
-# CONFIG_SOUND_VIA82CXXX is not set
-# CONFIG_MIDI_VIA82CXXX is not set
-# CONFIG_SOUND_SA1100 is not set
-# CONFIG_SOUND_UDA1341 is not set
-# CONFIG_SOUND_ASSABET_UDA1341 is not set
-# CONFIG_SOUND_H3600_UDA1341 is not set
-# CONFIG_SOUND_PANGOLIN_UDA1341 is not set
-# CONFIG_SOUND_SA1111_UDA1341 is not set
-# CONFIG_SOUND_SA1100SSP is not set
-# CONFIG_SOUND_OSS is not set
-# CONFIG_SOUND_WAVEARTIST is not set
-# CONFIG_SOUND_TVMIXER is not set
-
-#
-# Multimedia Capabilities Port drivers
-#
-# CONFIG_MCP is not set
-# CONFIG_MCP_SA1100 is not set
-# CONFIG_MCP_UCB1200 is not set
-# CONFIG_MCP_UCB1200_AUDIO is not set
-# CONFIG_MCP_UCB1200_TS is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Controllers
-#
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-# CONFIG_USB_OHCI is not set
-# CONFIG_USB_OHCI_SA1111 is not set
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_STORAGE_DEBUG is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
-# CONFIG_USB_STORAGE_HP8200e is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-
-#
-# Input core support is needed for USB HID
-#
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_HPUSBSCSI is not set
-
-#
-# USB Multimedia devices
-#
-
-#
-# Video4Linux support is needed for USB Multimedia device support
-#
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_CDCETHER is not set
-# CONFIG_USB_USBNET is not set
-
-#
-# USB port drivers
-#
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_SERIAL_GENERIC is not set
-# CONFIG_USB_SERIAL_BELKIN is not set
-# CONFIG_USB_SERIAL_WHITEHEAT is not set
-# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_EMPEG is not set
-# CONFIG_USB_SERIAL_FTDI_SIO is not set
-# CONFIG_USB_SERIAL_VISOR is not set
-# CONFIG_USB_SERIAL_IR is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-# CONFIG_USB_SERIAL_KEYSPAN is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_PL2303 is not set
-# CONFIG_USB_SERIAL_CYBERJACK is not set
-# CONFIG_USB_SERIAL_XIRCOM is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_RIO500 is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_INFO is not set
-# CONFIG_NO_PGT_CACHE is not set
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_DEBUG_ERRORS is not set
-# CONFIG_DEBUG_LL is not set
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
+++ /dev/null
-#
-# Automatically generated by make menuconfig: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_CLPS711X is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-CONFIG_SA1100_FREEBIRD=y
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-# CONFIG_SA1100_PFS168 is not set
-CONFIG_SA1100_FREEBIRD_OLD=y
-# CONFIG_SA1100_FREEBIRD_NEW is not set
-CONFIG_SA1100_FL=y
-CONFIG_SA1100_USB=m
-CONFIG_SA1100_USB_NETLINK=m
-CONFIG_SA1100_USB_CHAR=m
-# CONFIG_SA1100_FREQUENCY_SCALE is not set
-# CONFIG_SA1100_VOLTAGE_SCALE is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-
-#
-# General setup
-#
-# CONFIG_ANGELBOOT is not set
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=y
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=y
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_FPE_NWFPE is not set
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-CONFIG_BINFMT_AOUT=m
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=m
-CONFIG_PM=y
-CONFIG_APM=y
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="mem=32M root=/dev/ram initrd=0xc0800000,3M"
-# CONFIG_PFS168_CMDLINE is not set
-# CONFIG_LEDS is not set
-CONFIG_ALIGNMENT_TRAP=y
-# CONFIG_UCB1200 is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_MTDRAM is not set
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_SBC_MEDIAGX is not set
-# CONFIG_MTD_ELAN_104NC is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_CSTM_CFI_JEDEC is not set
-# CONFIG_MTD_JEDEC is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_NAND_SPIA is not set
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-# CONFIG_NET_ETHERNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=m
-# CONFIG_PPP_MULTILINK is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=m
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-CONFIG_IRDA=m
-# CONFIG_IRLAN is not set
-# CONFIG_IRNET is not set
-# CONFIG_IRCOMM is not set
-# CONFIG_IRDA_ULTRA is not set
-# CONFIG_IRDA_OPTIONS is not set
-
-#
-# Infrared-port device drivers
-#
-CONFIG_IRTTY_SIR=m
-# CONFIG_IRPORT_SIR is not set
-# CONFIG_NSC_FIR is not set
-# CONFIG_WINBOND_FIR is not set
-# CONFIG_TOSHIBA_FIR is not set
-# CONFIG_SMC_IRCC_FIR is not set
-CONFIG_SA1100_FIR=m
-# CONFIG_DONGLE is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=m
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-# CONFIG_INPUT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=9600
-# CONFIG_TOUCHSCREEN_UCB1200 is not set
-# CONFIG_TOUCHSCREEN_BITSY is not set
-CONFIG_FB_TS_BT=y
-# CONFIG_PROFILER is not set
-# CONFIG_PFS168_SPI is not set
-# CONFIG_PFS168_DTMF is not set
-# CONFIG_PFS168_MISC is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-CONFIG_SA1100_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_PCMCIA_SERIAL is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_JFFS2_FS is not set
-# CONFIG_CRAMFS is not set
-CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-# CONFIG_NFS_FS is not set
-# CONFIG_NFS_V3 is not set
-# CONFIG_ROOT_NFS is not set
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-# CONFIG_SUNRPC is not set
-# CONFIG_LOCKD is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FB=y
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-# CONFIG_FB_CYBER2000 is not set
-CONFIG_FB_SA1100=y
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_FBCON_ADVANCED is not set
-CONFIG_FBCON_CFB2=y
-CONFIG_FBCON_CFB4=y
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
-CONFIG_FBCON_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_SUN12x22 is not set
-# CONFIG_FONT_6x11 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-CONFIG_SOUND=y
-CONFIG_SOUND_UDA1341=y
-# CONFIG_SOUND_UDA1341_GSM is not set
-# CONFIG_SOUND_SA1100_SSP is not set
-# CONFIG_SOUND_CMPCI is not set
-# CONFIG_SOUND_EMU10K1 is not set
-# CONFIG_SOUND_FUSION is not set
-# CONFIG_SOUND_CS4281 is not set
-# CONFIG_SOUND_ES1370 is not set
-# CONFIG_SOUND_ES1371 is not set
-# CONFIG_SOUND_ESSSOLO1 is not set
-# CONFIG_SOUND_MAESTRO is not set
-# CONFIG_SOUND_MAESTRO3 is not set
-# CONFIG_SOUND_ICH is not set
-# CONFIG_SOUND_SONICVIBES is not set
-# CONFIG_SOUND_TRIDENT is not set
-# CONFIG_SOUND_MSNDCLAS is not set
-# CONFIG_SOUND_MSNDPIN is not set
-# CONFIG_SOUND_VIA82CXXX is not set
-# CONFIG_SOUND_OSS is not set
-# CONFIG_SOUND_TVMIXER is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_INFO is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_NO_PGT_CACHE is not set
-# CONFIG_DEBUG_LL is not set
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
+++ /dev/null
-#
-# Automatically generated by make menuconfig: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_CLPS711X is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-CONFIG_SA1100_FREEBIRD=y
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-# CONFIG_SA1100_PFS168 is not set
-# CONFIG_SA1100_FREEBIRD_OLD is not set
-CONFIG_SA1100_FREEBIRD_NEW=y
-CONFIG_SA1100_FL=m
-CONFIG_SA1100_USB=m
-CONFIG_SA1100_USB_NETLINK=m
-CONFIG_SA1100_USB_CHAR=m
-CONFIG_SA1100_FREQUENCY_SCALE=y
-# CONFIG_SA1100_VOLTAGE_SCALE is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-
-#
-# General setup
-#
-# CONFIG_ANGELBOOT is not set
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=m
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_FPE_NWFPE is not set
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_PM=y
-CONFIG_APM=y
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="noinitrd console=ttySA0 init=/linuxrc root=/dev/mtdblock4 mem=32m"
-# CONFIG_PFS168_CMDLINE is not set
-# CONFIG_LEDS is not set
-CONFIG_ALIGNMENT_TRAP=y
-# CONFIG_UCB1200 is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_MTDRAM is not set
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_SBC_MEDIAGX is not set
-# CONFIG_MTD_ELAN_104NC is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_CSTM_CFI_JEDEC is not set
-# CONFIG_MTD_JEDEC is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_NAND_SPIA is not set
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_NBD=m
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK=y
-CONFIG_RTNETLINK=y
-# CONFIG_NETLINK_DEV is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-# CONFIG_NET_SB1000 is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-# CONFIG_NET_ETHERNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=m
-# CONFIG_PPP_MULTILINK is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=m
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-CONFIG_IRDA=m
-# CONFIG_IRLAN is not set
-# CONFIG_IRNET is not set
-# CONFIG_IRCOMM is not set
-# CONFIG_IRDA_ULTRA is not set
-# CONFIG_IRDA_OPTIONS is not set
-
-#
-# Infrared-port device drivers
-#
-# CONFIG_IRTTY_SIR is not set
-# CONFIG_IRPORT_SIR is not set
-# CONFIG_NSC_FIR is not set
-# CONFIG_WINBOND_FIR is not set
-# CONFIG_TOSHIBA_FIR is not set
-# CONFIG_SMC_IRCC_FIR is not set
-CONFIG_SA1100_FIR=m
-# CONFIG_DONGLE is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=m
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=m
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=m
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-# CONFIG_INPUT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_SERIAL=m
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=9600
-# CONFIG_TOUCHSCREEN_UCB1200 is not set
-# CONFIG_TOUCHSCREEN_BITSY is not set
-CONFIG_FB_TS_BT=y
-# CONFIG_PROFILER is not set
-# CONFIG_PFS168_SPI is not set
-# CONFIG_PFS168_DTMF is not set
-# CONFIG_PFS168_MISC is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-CONFIG_SA1100_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-CONFIG_PCMCIA_SERIAL=m
-
-#
-# PCMCIA character device support
-#
-CONFIG_PCMCIA_SERIAL_CS=m
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS_FS=m
-CONFIG_JFFS_FS_VERBOSE=0
-# CONFIG_JFFS2_FS is not set
-CONFIG_CRAMFS=y
-CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=m
-# CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-CONFIG_NFS_FS=m
-# CONFIG_NFS_V3 is not set
-# CONFIG_ROOT_NFS is not set
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=m
-CONFIG_LOCKD=m
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FB=y
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-# CONFIG_FB_CYBER2000 is not set
-CONFIG_FB_SA1100=y
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_FBCON_ADVANCED is not set
-CONFIG_FBCON_CFB2=y
-CONFIG_FBCON_CFB4=y
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
-CONFIG_FBCON_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_SUN12x22 is not set
-# CONFIG_FONT_6x11 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-CONFIG_SOUND=y
-CONFIG_SOUND_UDA1341=y
-# CONFIG_SOUND_UDA1341_GSM is not set
-# CONFIG_SOUND_SA1100_SSP is not set
-# CONFIG_SOUND_CMPCI is not set
-# CONFIG_SOUND_EMU10K1 is not set
-# CONFIG_SOUND_FUSION is not set
-# CONFIG_SOUND_CS4281 is not set
-# CONFIG_SOUND_ES1370 is not set
-# CONFIG_SOUND_ES1371 is not set
-# CONFIG_SOUND_ESSSOLO1 is not set
-# CONFIG_SOUND_MAESTRO is not set
-# CONFIG_SOUND_MAESTRO3 is not set
-# CONFIG_SOUND_ICH is not set
-# CONFIG_SOUND_SONICVIBES is not set
-# CONFIG_SOUND_TRIDENT is not set
-# CONFIG_SOUND_MSNDCLAS is not set
-# CONFIG_SOUND_MSNDPIN is not set
-# CONFIG_SOUND_VIA82CXXX is not set
-# CONFIG_SOUND_OSS is not set
-# CONFIG_SOUND_TVMIXER is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_INFO is not set
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_NO_PGT_CACHE is not set
-# CONFIG_DEBUG_LL is not set
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_SHARK is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-
-#
-# Archimedes/A5000 Implementations (select only ONE)
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FLEXANET is not set
-# CONFIG_SA1100_FREEBIRD is not set
-CONFIG_SA1100_GRAPHICSCLIENT=y
-# CONFIG_SA1100_JORNADA720 is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_ITSY is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_OMNIMETER is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_SIMPAD is not set
-# CONFIG_SA1100_PFS168 is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-# CONFIG_SA1100_GRAPHICSMASTER is not set
-# CONFIG_SA1100_ADSBITSY is not set
-# CONFIG_SA1100_USB is not set
-# CONFIG_SA1100_USB_NETLINK is not set
-# CONFIG_SA1100_USB_CHAR is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-
-#
-# Processor Type
-#
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-
-#
-# General setup
-#
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=y
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=y
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_APM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="ip=off mem=16M@0xc0000000 mem=16M@0xc8000000 root=/dev/ram initrd=0xc0800000,4M"
-# CONFIG_PFS168_CMDLINE is not set
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_LEDS_CPU=y
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_BOOTLDR_PARTS is not set
-# CONFIG_MTD_AFS_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_JEDEC is not set
-
-#
-# Mapping drivers for chip access
-#
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=800000
-CONFIG_MTD_PHYSMAP_LEN=1000000
-CONFIG_MTD_PHYSMAP_BUSWIDTH=4
-# CONFIG_MTD_SUN_UFLASH is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_TQM8XXL is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_NETSC520 is not set
-# CONFIG_MTD_SBC_GXX is not set
-# CONFIG_MTD_ELAN_104NC is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_SA1100_REDBOOT_PARTITIONS is not set
-# CONFIG_MTD_SA1100_BOOTLDR_PARTITIONS is not set
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_DBOX2 is not set
-# CONFIG_MTD_CSTM_MIPS_IXX is not set
-# CONFIG_MTD_CFI_FLAGADM is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-# CONFIG_MTD_SOLUTIONENGINE is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
-# CONFIG_MTD_OCELOT is not set
-# CONFIG_MTD_L440GX is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_LART is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_LOOP=m
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-
-#
-#
-#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNBMAC is not set
-# CONFIG_SUNQE is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-CONFIG_NET_VENDOR_SMC=y
-# CONFIG_WD80x3 is not set
-# CONFIG_ULTRAMCA is not set
-# CONFIG_ULTRA is not set
-# CONFIG_ULTRA32 is not set
-CONFIG_SMC9194=y
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_ACENIC_OMIT_TIGON_I is not set
-# CONFIG_MYRI_SBUS is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=y
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=y
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-# CONFIG_INPUT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_SERIAL_21285 is not set
-# CONFIG_SERIAL_21285_OLD is not set
-# CONFIG_SERIAL_21285_CONSOLE is not set
-# CONFIG_SERIAL_AMBA is not set
-# CONFIG_SERIAL_AMBA_CONSOLE is not set
-# CONFIG_SERIAL_CLPS711X is not set
-# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=38400
-# CONFIG_SERIAL_8250 is not set
-# CONFIG_SERIAL_8250_CONSOLE is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-CONFIG_UCB1200=y
-CONFIG_TOUCHSCREEN_UCB1200=y
-CONFIG_AUDIO_UCB1200=y
-CONFIG_ADC_UCB1200=y
-# CONFIG_TOUCHSCREEN_BITSY is not set
-# CONFIG_PROFILER is not set
-# CONFIG_PFS168_SPI is not set
-# CONFIG_PFS168_DTMF is not set
-# CONFIG_PFS168_MISC is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-
-#
-# Input core support is needed for joysticks
-#
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_SA1100_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-CONFIG_FAT_FS=y
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-CONFIG_VFAT_FS=y
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS_FS=y
-CONFIG_JFFS_FS_VERBOSE=0
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_CRAMFS=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-# CONFIG_FB_CYBER2000 is not set
-CONFIG_FB_SA1100=y
-# CONFIG_FB_E1355 is not set
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_FBCON_ADVANCED is not set
-CONFIG_FBCON_CFB2=y
-CONFIG_FBCON_CFB4=y
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-# CONFIG_FONT_8x8 is not set
-CONFIG_FONT_8x16=y
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_INFO is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_NO_PGT_CACHE is not set
-# CONFIG_DEBUG_LL is not set
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
+++ /dev/null
-#
-# Automatically generated by make menuconfig: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_SHARK is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FLEXANET is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_JORNADA720 is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_ITSY is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_OMNIMETER is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_SIMPAD is not set
-# CONFIG_SA1100_PFS168 is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-CONFIG_SA1100_GRAPHICSMASTER=y
-# CONFIG_SA1100_ADSBITSY is not set
-CONFIG_SA1111=y
-# CONFIG_SA1100_USB is not set
-# CONFIG_SA1100_USB_NETLINK is not set
-# CONFIG_SA1100_USB_CHAR is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-
-#
-# General setup
-#
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=y
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=y
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_APM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="ip=off mem=16M@0xc0000000 mem=16M@0xc8000000 root=/dev/ram initrd=0xc0800000,4M"
-# CONFIG_PFS168_CMDLINE is not set
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_LEDS_CPU=y
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_BOOTLDR_PARTS is not set
-# CONFIG_MTD_AFS_PARTS is not set
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_JEDEC is not set
-
-#
-# Mapping drivers for chip access
-#
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=800000
-CONFIG_MTD_PHYSMAP_LEN=1000000
-CONFIG_MTD_PHYSMAP_BUSWIDTH=4
-# CONFIG_MTD_SUN_UFLASH is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_TQM8XXL is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_NETSC520 is not set
-# CONFIG_MTD_SBC_GXX is not set
-# CONFIG_MTD_ELAN_104NC is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_SA1100_REDBOOT_PARTITIONS is not set
-# CONFIG_MTD_SA1100_BOOTLDR_PARTITIONS is not set
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_DBOX2 is not set
-# CONFIG_MTD_CSTM_MIPS_IXX is not set
-# CONFIG_MTD_CFI_FLAGADM is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-# CONFIG_MTD_SOLUTIONENGINE is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
-# CONFIG_MTD_OCELOT is not set
-# CONFIG_MTD_L440GX is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_LART is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_LOOP=m
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNBMAC is not set
-# CONFIG_SUNQE is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-CONFIG_NET_VENDOR_SMC=y
-# CONFIG_WD80x3 is not set
-# CONFIG_ULTRAMCA is not set
-# CONFIG_ULTRA is not set
-# CONFIG_ULTRA32 is not set
-CONFIG_SMC9194=y
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_ACENIC_OMIT_TIGON_I is not set
-# CONFIG_MYRI_SBUS is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=y
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=y
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-CONFIG_INPUT=y
-# CONFIG_INPUT_KEYBDEV is not set
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_SERIAL_21285 is not set
-# CONFIG_SERIAL_21285_OLD is not set
-# CONFIG_SERIAL_21285_CONSOLE is not set
-# CONFIG_SERIAL_AMBA is not set
-# CONFIG_SERIAL_AMBA_CONSOLE is not set
-# CONFIG_SERIAL_CLPS711X is not set
-# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=38400
-# CONFIG_SERIAL_8250 is not set
-# CONFIG_SERIAL_8250_CONSOLE is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-CONFIG_UCB1200=y
-CONFIG_TOUCHSCREEN_UCB1200=y
-CONFIG_AUDIO_UCB1200=y
-CONFIG_ADC_UCB1200=y
-# CONFIG_TOUCHSCREEN_BITSY is not set
-# CONFIG_PROFILER is not set
-# CONFIG_PFS168_SPI is not set
-# CONFIG_PFS168_DTMF is not set
-# CONFIG_PFS168_MISC is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_SA1100_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-CONFIG_FAT_FS=y
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-CONFIG_VFAT_FS=y
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS_FS=y
-CONFIG_JFFS_FS_VERBOSE=0
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_CRAMFS=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-# CONFIG_FB_CYBER2000 is not set
-CONFIG_FB_SA1100=y
-# CONFIG_FB_E1355 is not set
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_FBCON_ADVANCED is not set
-CONFIG_FBCON_CFB2=y
-CONFIG_FBCON_CFB4=y
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-# CONFIG_FONT_8x8 is not set
-CONFIG_FONT_8x16=y
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB=y
-# CONFIG_USB_DEBUG is not set
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-CONFIG_USB_OHCI=y
-CONFIG_USB_OHCI_NOPCI=y
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-# CONFIG_USB_HID is not set
-# CONFIG_USB_KBD is not set
-CONFIG_USB_MOUSE=y
-# CONFIG_USB_WACOM is not set
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_IBMCAM is not set
-# CONFIG_USB_OV511 is not set
-# CONFIG_USB_PWC is not set
-# CONFIG_USB_SE401 is not set
-# CONFIG_USB_DSBR is not set
-# CONFIG_USB_DABUSB is not set
-# CONFIG_USB_PLUSB is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_NET1080 is not set
-# CONFIG_USB_USBNET is not set
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_RIO500 is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_INFO is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_NO_PGT_CACHE is not set
-# CONFIG_DEBUG_LL is not set
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
+++ /dev/null
-#
-# Automatically generated by make menuconfig: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_CLPS711X is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-
-#
-# Footbridge Implementations
-#
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-CONFIG_SA1100_HUW_WEBPANEL=y
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_YOPY is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_USB is not set
-# CONFIG_SA1100_FREQUENCY_SCALE is not set
-# CONFIG_SA1100_VOLTAGE_SCALE is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-CONFIG_CPU_32v4=y
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-
-#
-# General setup
-#
-# CONFIG_ANGELBOOT is not set
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-# CONFIG_HOTPLUG is not set
-# CONFIG_PCMCIA is not set
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_NWFPE=y
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="keepinitrd mem=32480K root=/dev/ram initrd=0xc0800000,8M"
-# CONFIG_LEDS is not set
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_MTDRAM is not set
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_B1 is not set
-# CONFIG_MTD_CFI_B2 is not set
-CONFIG_MTD_CFI_B4=y
-# CONFIG_MTD_CFI_I1 is not set
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_SBC_MEDIAGX is not set
-# CONFIG_MTD_ELAN_104NC is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_JEDEC is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_NAND_SPIA is not set
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_BLK_DEV_FLASH is not set
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-# CONFIG_NETDEVICES is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-# CONFIG_INPUT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=115200
-CONFIG_TOUCHSCREEN_UCB1200=y
-# CONFIG_TOUCHSCREEN_BITSY is not set
-# CONFIG_PROFILER is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_SA1100_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_CRAMFS=y
-# CONFIG_RAMFS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-CONFIG_ROMFS_FS=y
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-# CONFIG_NFS_FS is not set
-# CONFIG_NFS_V3 is not set
-# CONFIG_ROOT_NFS is not set
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-# CONFIG_SUNRPC is not set
-# CONFIG_LOCKD is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_MOUNT_SUBDIR is not set
-# CONFIG_NCPFS_NDS_DOMAINS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_NLS is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FB=y
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-# CONFIG_FB_CYBER2000 is not set
-CONFIG_FB_SA1100=y
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_FBCON_ADVANCED is not set
-CONFIG_FBCON_CFB2=y
-CONFIG_FBCON_CFB4=y
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-CONFIG_FONT_8x8=y
-# CONFIG_FONT_8x16 is not set
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_INFO is not set
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_DEBUG_LL is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-CONFIG_MMU=y
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODULE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# System Type
-#
-# CONFIG_ARCH_ADIFCC is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_PXA is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_CAMELOT is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-CONFIG_ARCH_IOP3XX=y
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_SA1100 is not set
-# CONFIG_ARCH_SHARK is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-
-#
-# Epxa10db
-#
-
-#
-# Footbridge Implementations
-#
-
-#
-# IOP3xx Implementation Options
-#
-CONFIG_ARCH_IQ80310=y
-# CONFIG_ARCH_IQ80321 is not set
-CONFIG_ARCH_IOP310=y
-# CONFIG_ARCH_IOP321 is not set
-
-#
-# IOP3xx Chipset Features
-#
-# CONFIG_IOP3XX_AAU is not set
-# CONFIG_IOP3XX_DMA is not set
-# CONFIG_IOP3XX_MU is not set
-# CONFIG_IOP3XX_PMON is not set
-
-#
-# ADIFCC Implementation Options
-#
-
-#
-# ADI Board Types
-#
-
-#
-# Intel PXA250/210 Implementations
-#
-
-#
-# SA11x0 Implementations
-#
-
-#
-# Processor Type
-#
-CONFIG_CPU_32=y
-CONFIG_CPU_XSCALE=y
-CONFIG_XS80200=y
-CONFIG_CPU_32v5=y
-
-#
-# Processor Features
-#
-CONFIG_ARM_THUMB=y
-CONFIG_XSCALE_PMU=y
-
-#
-# General setup
-#
-CONFIG_PCI=y
-# CONFIG_ZBOOT_ROM is not set
-CONFIG_ZBOOT_ROM_TEXT=0x00060000
-CONFIG_ZBOOT_ROM_BSS=0xa1008000
-# CONFIG_PCI_LEGACY_PROC is not set
-CONFIG_PCI_NAMES=y
-# CONFIG_HOTPLUG is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# At least one math emulation must be selected
-#
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-CONFIG_BINFMT_AOUT=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="console=ttyS0,115200 ip=bootp mem=32M root=/dev/nfs initrd=0xc0800000,4M"
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_CONCAT is not set
-CONFIG_MTD_REDBOOT_PARTS=y
-# CONFIG_MTD_CMDLINE_PARTS is not set
-# CONFIG_MTD_AFS_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-CONFIG_MTD_IQ80310=y
-# CONFIG_MTD_EDB7312 is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_SMC91X is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_DGRS is not set
-CONFIG_EEPRO100=y
-# CONFIG_EEPRO100_PIO is not set
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_IDEPCI is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-# CONFIG_SERIAL_DZ is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# L3 serial bus support
-#
-# CONFIG_L3 is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-CONFIG_VIDEO_DEV=y
-
-#
-# Video For Linux
-#
-# CONFIG_VIDEO_PROC_FS is not set
-
-#
-# Video Adapters
-#
-# CONFIG_VIDEO_PMS is not set
-# CONFIG_VIDEO_CPIA is not set
-# CONFIG_VIDEO_STRADIS is not set
-# CONFIG_VIDEO_HEXIUM_ORION is not set
-# CONFIG_VIDEO_HEXIUM_GEMINI is not set
-
-#
-# Radio Adapters
-#
-# CONFIG_RADIO_GEMTEK_PCI is not set
-# CONFIG_RADIO_MAXIRADIO is not set
-# CONFIG_RADIO_MAESTRO is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-CONFIG_DVB=y
-CONFIG_DVB_CORE=y
-
-#
-# Supported Frontend Modules
-#
-# CONFIG_DVB_STV0299 is not set
-# CONFIG_DVB_ALPS_BSRV2 is not set
-# CONFIG_DVB_ALPS_TDLB7 is not set
-# CONFIG_DVB_ALPS_TDMB7 is not set
-# CONFIG_DVB_ATMEL_AT76C651 is not set
-# CONFIG_DVB_CX24110 is not set
-# CONFIG_DVB_GRUNDIG_29504_491 is not set
-# CONFIG_DVB_GRUNDIG_29504_401 is not set
-# CONFIG_DVB_MT312 is not set
-# CONFIG_DVB_VES1820 is not set
-# CONFIG_DVB_TDA1004X is not set
-
-#
-# Supported SAA7146 based PCI Adapters
-#
-# CONFIG_DVB_AV7110 is not set
-# CONFIG_DVB_BUDGET is not set
-
-#
-# Supported FlexCopII (B2C2) Adapters
-#
-# CONFIG_DVB_B2C2_SKYSTAR is not set
-# CONFIG_VIDEO_BTCX is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia Capabilities Port drivers
-#
-# CONFIG_MCP is not set
-
-#
-# Console Switches
-#
-# CONFIG_SWITCHES is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_INFO is not set
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_WAITQ is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
+++ /dev/null
-#
-# Automatically generated by make menuconfig: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_SHARK is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FLEXANET is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_JORNADA720 is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_ITSY is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_OMNIMETER is not set
-CONFIG_SA1100_PANGOLIN=y
-CONFIG_SA1100_PANGOLIN_PCMCIA_IDE=y
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_SIMPAD is not set
-# CONFIG_SA1100_PFS168 is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-# CONFIG_SA1100_USB is not set
-# CONFIG_SA1100_USB_NETLINK is not set
-# CONFIG_SA1100_USB_CHAR is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-
-#
-# General setup
-#
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=y
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=y
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_FPE_NWFPE is not set
-CONFIG_FPE_FASTFPE=y
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_APM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="keepinitrd mem=128M root=/dev/ram initrd=0xc0800000,3M"
-# CONFIG_PFS168_CMDLINE is not set
-# CONFIG_LEDS is not set
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_BOOTLDR_PARTS is not set
-# CONFIG_MTD_AFS_PARTS is not set
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_B1 is not set
-# CONFIG_MTD_CFI_B2 is not set
-CONFIG_MTD_CFI_B4=y
-# CONFIG_MTD_CFI_I1 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_I4=y
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_JEDEC is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_SUN_UFLASH is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_TQM8XXL is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_NETSC520 is not set
-# CONFIG_MTD_SBC_GXX is not set
-# CONFIG_MTD_ELAN_104NC is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_SA1100_REDBOOT_PARTITIONS is not set
-# CONFIG_MTD_SA1100_BOOTLDR_PARTITIONS is not set
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_DBOX2 is not set
-# CONFIG_MTD_CSTM_MIPS_IXX is not set
-# CONFIG_MTD_CFI_FLAGADM is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-# CONFIG_MTD_SOLUTIONENGINE is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
-# CONFIG_MTD_OCELOT is not set
-# CONFIG_MTD_L440GX is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_LART is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNBMAC is not set
-# CONFIG_SUNQE is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-CONFIG_NET_VENDOR_SMC=y
-# CONFIG_WD80x3 is not set
-# CONFIG_ULTRAMCA is not set
-# CONFIG_ULTRA is not set
-# CONFIG_ULTRA32 is not set
-CONFIG_SMC9194=y
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_ACENIC_OMIT_TIGON_I is not set
-# CONFIG_MYRI_SBUS is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=y
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-CONFIG_NET_PCMCIA_RADIO=y
-# CONFIG_PCMCIA_RAYCS is not set
-# CONFIG_PCMCIA_NETWAVE is not set
-# CONFIG_PCMCIA_WAVELAN is not set
-# CONFIG_AIRONET4500_CS is not set
-CONFIG_PCMCIA_WVLAN=y
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=m
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=m
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=m
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_PANGOLIN is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-# CONFIG_INPUT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_SERIAL_21285 is not set
-# CONFIG_SERIAL_21285_OLD is not set
-# CONFIG_SERIAL_21285_CONSOLE is not set
-# CONFIG_SERIAL_AMBA is not set
-# CONFIG_SERIAL_AMBA_CONSOLE is not set
-# CONFIG_SERIAL_CLPS711X is not set
-# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=115200
-# CONFIG_SERIAL_8250 is not set
-# CONFIG_SERIAL_8250_CONSOLE is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-# CONFIG_UCB1200 is not set
-# CONFIG_TOUCHSCREEN_UCB1200 is not set
-# CONFIG_AUDIO_UCB1200 is not set
-# CONFIG_ADC_UCB1200 is not set
-# CONFIG_TOUCHSCREEN_BITSY is not set
-CONFIG_PROFILER=y
-# CONFIG_PFS168_SPI is not set
-# CONFIG_PFS168_DTMF is not set
-# CONFIG_PFS168_MISC is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-CONFIG_SA1100_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-# CONFIG_UMSDOS_FS is not set
-CONFIG_VFAT_FS=y
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS_FS=y
-CONFIG_JFFS_FS_VERBOSE=0
-# CONFIG_JFFS2_FS is not set
-CONFIG_CRAMFS=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-# CONFIG_NFS_FS is not set
-# CONFIG_NFS_V3 is not set
-# CONFIG_ROOT_NFS is not set
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-# CONFIG_SUNRPC is not set
-# CONFIG_LOCKD is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-CONFIG_NLS_CODEPAGE_950=y
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_SA1100 is not set
-CONFIG_FB_MQ200=y
-# CONFIG_FB_E1355 is not set
-# CONFIG_FB_VIRTUAL is not set
-CONFIG_FBCON_ADVANCED=y
-# CONFIG_FBCON_MFB is not set
-CONFIG_FBCON_CFB2=y
-CONFIG_FBCON_CFB4=y
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-# CONFIG_FBCON_CFB24 is not set
-# CONFIG_FBCON_CFB32 is not set
-# CONFIG_FBCON_AFB is not set
-# CONFIG_FBCON_ILBM is not set
-# CONFIG_FBCON_IPLAN2P2 is not set
-# CONFIG_FBCON_IPLAN2P4 is not set
-# CONFIG_FBCON_IPLAN2P8 is not set
-# CONFIG_FBCON_MAC is not set
-# CONFIG_FBCON_VGA_PLANES is not set
-# CONFIG_FBCON_VGA is not set
-# CONFIG_FBCON_HGA is not set
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-CONFIG_FONT_8x8=y
-# CONFIG_FONT_8x16 is not set
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-CONFIG_SOUND=y
-# CONFIG_SOUND_ASSABET_UDA1341 is not set
-CONFIG_SOUND_PANGOLIN_UDA1341=y
-# CONFIG_SOUND_BITSY_UDA1341 is not set
-# CONFIG_SOUND_SA1111_UDA1341 is not set
-# CONFIG_SOUND_SA1100SSP is not set
-# CONFIG_SOUND_CMPCI is not set
-# CONFIG_SOUND_EMU10K1 is not set
-# CONFIG_SOUND_FUSION is not set
-# CONFIG_SOUND_CS4281 is not set
-# CONFIG_SOUND_ES1370 is not set
-# CONFIG_SOUND_ES1371 is not set
-# CONFIG_SOUND_ESSSOLO1 is not set
-# CONFIG_SOUND_MAESTRO is not set
-# CONFIG_SOUND_MAESTRO3 is not set
-# CONFIG_SOUND_ICH is not set
-# CONFIG_SOUND_SONICVIBES is not set
-# CONFIG_SOUND_TRIDENT is not set
-# CONFIG_SOUND_MSNDCLAS is not set
-# CONFIG_SOUND_MSNDPIN is not set
-# CONFIG_SOUND_VIA82CXXX is not set
-# CONFIG_MIDI_VIA82CXXX is not set
-# CONFIG_SOUND_OSS is not set
-# CONFIG_SOUND_TVMIXER is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_NO_PGT_CACHE is not set
-# CONFIG_DEBUG_LL is not set
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_CLPS711X is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-
-#
-# Archimedes/A5000 Implementations (select only ONE)
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-CONFIG_SA1100_PFS168=y
-CONFIG_SA1111=y
-CONFIG_SA1100_USB=m
-CONFIG_SA1100_USB_NETLINK=m
-CONFIG_SA1100_USB_CHAR=m
-CONFIG_SA1100_FREQUENCY_SCALE=m
-# CONFIG_SA1100_VOLTAGE_SCALE is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-
-#
-# Processor Type
-#
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-
-#
-# General setup
-#
-
-#
-# Please ensure that you have read the help on the next option
-#
-# CONFIG_ANGELBOOT is not set
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=m
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="root=/dev/nfs mem=16M"
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_LEDS_CPU=y
-CONFIG_ALIGNMENT_TRAP=y
-CONFIG_UCB1200=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# RAM/ROM Device Drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_MTDRAM is not set
-
-#
-# Linearly Mapped Flash Device Drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_SBC_MEDIAGX is not set
-# CONFIG_MTD_ELAN_104NC is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_CSTM_CFI_JEDEC is not set
-# CONFIG_MTD_JEDEC is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_NAND_SPIA is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-
-#
-#
-#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-CONFIG_NET_VENDOR_SMC=y
-# CONFIG_WD80x3 is not set
-# CONFIG_ULTRA is not set
-# CONFIG_ULTRA32 is not set
-CONFIG_SMC9194=y
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=m
-# CONFIG_PPP_MULTILINK is not set
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=m
-# CONFIG_PCMCIA_NMCLAN is not set
-CONFIG_PCMCIA_SMC91C92=m
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-CONFIG_IRDA=m
-
-#
-# IrDA protocols
-#
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-# CONFIG_IRDA_OPTIONS is not set
-
-#
-# Infrared-port device drivers
-#
-
-#
-# SIR device drivers
-#
-CONFIG_IRTTY_SIR=m
-CONFIG_IRPORT_SIR=m
-
-#
-# FIR device drivers
-#
-# CONFIG_NSC_FIR is not set
-# CONFIG_WINBOND_FIR is not set
-# CONFIG_TOSHIBA_FIR is not set
-# CONFIG_SMC_IRCC_FIR is not set
-CONFIG_SA1100_FIR=m
-
-#
-# Dongle support
-#
-# CONFIG_DONGLE is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=m
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=m
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=m
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-CONFIG_INPUT=y
-CONFIG_INPUT_KEYBDEV=y
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_SERIAL_CONSOLE is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=115200
-CONFIG_TOUCHSCREEN_UCB1200=y
-# CONFIG_TOUCHSCREEN_BITSY is not set
-# CONFIG_PROFILER is not set
-# CONFIG_PFS168_SPI is not set
-CONFIG_PFS168_DTMF=y
-CONFIG_PFS168_MISC=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-CONFIG_I2C=y
-CONFIG_I2C_ALGOBIT=y
-# CONFIG_I2C_ASSABET is not set
-CONFIG_I2C_PFS168=y
-# CONFIG_I2C_ALGOPCF is not set
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_SENSORS=y
-CONFIG_I2C_EEPROM=y
-CONFIG_I2C_EEPROM=y
-CONFIG_I2C_M41T11=y
-CONFIG_I2C_X9221=y
-CONFIG_I2C_PCF8574=y
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-CONFIG_MOUSE=y
-CONFIG_PSMOUSE=y
-# CONFIG_82C710_MOUSE is not set
-# CONFIG_PC110_PAD is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-
-#
-# Input core support is needed for joysticks
-#
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_SA1100_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-CONFIG_PCMCIA_SERIAL=m
-
-#
-# PCMCIA character device support
-#
-# CONFIG_PCMCIA_SERIAL_CS is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS_FS=y
-CONFIG_JFFS_FS_VERBOSE=0
-# CONFIG_JFFS2_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_RAMFS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FB=y
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_SA1100 is not set
-CONFIG_FB_MQ200=y
-# CONFIG_PFS168_MQVGA is not set
-CONFIG_PFS168_MQTFT=y
-# CONFIG_FB_VIRTUAL is not set
-CONFIG_FBCON_ADVANCED=y
-# CONFIG_FBCON_MFB is not set
-# CONFIG_FBCON_CFB2 is not set
-# CONFIG_FBCON_CFB4 is not set
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-CONFIG_FBCON_CFB24=y
-CONFIG_FBCON_CFB32=y
-# CONFIG_FBCON_AFB is not set
-# CONFIG_FBCON_ILBM is not set
-# CONFIG_FBCON_IPLAN2P2 is not set
-# CONFIG_FBCON_IPLAN2P4 is not set
-# CONFIG_FBCON_IPLAN2P8 is not set
-# CONFIG_FBCON_MAC is not set
-# CONFIG_FBCON_VGA_PLANES is not set
-# CONFIG_FBCON_VGA is not set
-# CONFIG_FBCON_HGA is not set
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-CONFIG_FONT_8x8=y
-# CONFIG_FONT_8x16 is not set
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB=m
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-
-#
-# USB Controllers
-#
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-CONFIG_USB_OHCI=m
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-CONFIG_USB_HID=m
-CONFIG_USB_KBD=m
-CONFIG_USB_MOUSE=m
-# CONFIG_USB_WACOM is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-
-#
-# USB Multimedia devices
-#
-# CONFIG_USB_IBMCAM is not set
-# CONFIG_USB_OV511 is not set
-# CONFIG_USB_DSBR is not set
-# CONFIG_USB_DABUSB is not set
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_PLUSB is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_NET1080 is not set
-
-#
-# USB port drivers
-#
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-
-#
-# USB misc drivers
-#
-# CONFIG_USB_RIO500 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_INFO=y
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_NO_PGT_CACHE is not set
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_DC21285_PORT is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_CLPS711X is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-
-#
-# Archimedes/A5000 Implementations (select only ONE)
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-CONFIG_SA1100_PFS168=y
-CONFIG_SA1111=y
-CONFIG_SA1100_USB=m
-CONFIG_SA1100_USB_NETLINK=m
-CONFIG_SA1100_USB_CHAR=m
-CONFIG_SA1100_FREQUENCY_SCALE=m
-# CONFIG_SA1100_VOLTAGE_SCALE is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-
-#
-# Processor Type
-#
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-
-#
-# General setup
-#
-
-#
-# Please ensure that you have read the help on the next option
-#
-# CONFIG_ANGELBOOT is not set
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=m
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="root=/dev/nfs mem=16M"
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_LEDS_CPU=y
-CONFIG_ALIGNMENT_TRAP=y
-CONFIG_UCB1200=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# RAM/ROM Device Drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_MTDRAM is not set
-
-#
-# Linearly Mapped Flash Device Drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_SBC_MEDIAGX is not set
-# CONFIG_MTD_ELAN_104NC is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_CSTM_CFI_JEDEC is not set
-# CONFIG_MTD_JEDEC is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_NAND_SPIA is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-
-#
-#
-#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-CONFIG_NET_VENDOR_SMC=y
-# CONFIG_WD80x3 is not set
-# CONFIG_ULTRA is not set
-# CONFIG_ULTRA32 is not set
-CONFIG_SMC9194=y
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=m
-# CONFIG_PPP_MULTILINK is not set
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=m
-# CONFIG_PCMCIA_NMCLAN is not set
-CONFIG_PCMCIA_SMC91C92=m
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-CONFIG_IRDA=m
-
-#
-# IrDA protocols
-#
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-# CONFIG_IRDA_OPTIONS is not set
-
-#
-# Infrared-port device drivers
-#
-
-#
-# SIR device drivers
-#
-CONFIG_IRTTY_SIR=m
-CONFIG_IRPORT_SIR=m
-
-#
-# FIR device drivers
-#
-# CONFIG_NSC_FIR is not set
-# CONFIG_WINBOND_FIR is not set
-# CONFIG_TOSHIBA_FIR is not set
-# CONFIG_SMC_IRCC_FIR is not set
-CONFIG_SA1100_FIR=m
-
-#
-# Dongle support
-#
-# CONFIG_DONGLE is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=m
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=m
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=m
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-CONFIG_INPUT=y
-CONFIG_INPUT_KEYBDEV=y
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_SERIAL_CONSOLE is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=115200
-CONFIG_TOUCHSCREEN_UCB1200=y
-# CONFIG_TOUCHSCREEN_BITSY is not set
-# CONFIG_PROFILER is not set
-# CONFIG_PFS168_SPI is not set
-CONFIG_PFS168_DTMF=y
-CONFIG_PFS168_MISC=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-CONFIG_I2C=y
-CONFIG_I2C_ALGOBIT=y
-# CONFIG_I2C_ASSABET is not set
-CONFIG_I2C_PFS168=y
-# CONFIG_I2C_ALGOPCF is not set
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_SENSORS=y
-CONFIG_I2C_EEPROM=y
-CONFIG_I2C_EEPROM=y
-CONFIG_I2C_M41T11=y
-CONFIG_I2C_X9221=y
-CONFIG_I2C_PCF8574=y
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-CONFIG_MOUSE=y
-CONFIG_PSMOUSE=y
-# CONFIG_82C710_MOUSE is not set
-# CONFIG_PC110_PAD is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-
-#
-# Input core support is needed for joysticks
-#
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_SA1100_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-CONFIG_PCMCIA_SERIAL=m
-
-#
-# PCMCIA character device support
-#
-# CONFIG_PCMCIA_SERIAL_CS is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS_FS=y
-CONFIG_JFFS_FS_VERBOSE=0
-# CONFIG_JFFS2_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_RAMFS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FB=y
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_SA1100 is not set
-CONFIG_FB_MQ200=y
-CONFIG_PFS168_MQVGA=y
-# CONFIG_PFS168_MQTFT is not set
-# CONFIG_FB_VIRTUAL is not set
-CONFIG_FBCON_ADVANCED=y
-# CONFIG_FBCON_MFB is not set
-# CONFIG_FBCON_CFB2 is not set
-# CONFIG_FBCON_CFB4 is not set
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-CONFIG_FBCON_CFB24=y
-CONFIG_FBCON_CFB32=y
-# CONFIG_FBCON_AFB is not set
-# CONFIG_FBCON_ILBM is not set
-# CONFIG_FBCON_IPLAN2P2 is not set
-# CONFIG_FBCON_IPLAN2P4 is not set
-# CONFIG_FBCON_IPLAN2P8 is not set
-# CONFIG_FBCON_MAC is not set
-# CONFIG_FBCON_VGA_PLANES is not set
-# CONFIG_FBCON_VGA is not set
-# CONFIG_FBCON_HGA is not set
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-CONFIG_FONT_8x8=y
-# CONFIG_FONT_8x16 is not set
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB=m
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-
-#
-# USB Controllers
-#
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-CONFIG_USB_OHCI=m
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-CONFIG_USB_HID=m
-CONFIG_USB_KBD=m
-CONFIG_USB_MOUSE=m
-# CONFIG_USB_WACOM is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-
-#
-# USB Multimedia devices
-#
-# CONFIG_USB_IBMCAM is not set
-# CONFIG_USB_OV511 is not set
-# CONFIG_USB_DSBR is not set
-# CONFIG_USB_DABUSB is not set
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_PLUSB is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_NET1080 is not set
-
-#
-# USB port drivers
-#
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-
-#
-# USB misc drivers
-#
-# CONFIG_USB_RIO500 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_INFO=y
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_NO_PGT_CACHE is not set
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_DC21285_PORT is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_CLPS711X is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-
-#
-# Archimedes/A5000 Implementations (select only ONE)
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-CONFIG_SA1100_PFS168=y
-CONFIG_SA1111=y
-CONFIG_SA1100_USB=m
-CONFIG_SA1100_USB_NETLINK=m
-CONFIG_SA1100_USB_CHAR=m
-CONFIG_SA1100_FREQUENCY_SCALE=m
-# CONFIG_SA1100_VOLTAGE_SCALE is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-
-#
-# Processor Type
-#
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-
-#
-# General setup
-#
-
-#
-# Please ensure that you have read the help on the next option
-#
-# CONFIG_ANGELBOOT is not set
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=m
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="root=/dev/nfs mem=16M"
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_LEDS_CPU=y
-CONFIG_ALIGNMENT_TRAP=y
-CONFIG_UCB1200=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# RAM/ROM Device Drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_MTDRAM is not set
-
-#
-# Linearly Mapped Flash Device Drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_SBC_MEDIAGX is not set
-# CONFIG_MTD_ELAN_104NC is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_CSTM_CFI_JEDEC is not set
-# CONFIG_MTD_JEDEC is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_NAND_SPIA is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-
-#
-#
-#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-CONFIG_NET_VENDOR_SMC=y
-# CONFIG_WD80x3 is not set
-# CONFIG_ULTRA is not set
-# CONFIG_ULTRA32 is not set
-CONFIG_SMC9194=y
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=m
-# CONFIG_PPP_MULTILINK is not set
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=m
-# CONFIG_PCMCIA_NMCLAN is not set
-CONFIG_PCMCIA_SMC91C92=m
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-CONFIG_IRDA=m
-
-#
-# IrDA protocols
-#
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-# CONFIG_IRDA_OPTIONS is not set
-
-#
-# Infrared-port device drivers
-#
-
-#
-# SIR device drivers
-#
-CONFIG_IRTTY_SIR=m
-CONFIG_IRPORT_SIR=m
-
-#
-# FIR device drivers
-#
-# CONFIG_NSC_FIR is not set
-# CONFIG_WINBOND_FIR is not set
-# CONFIG_TOSHIBA_FIR is not set
-# CONFIG_SMC_IRCC_FIR is not set
-CONFIG_SA1100_FIR=m
-
-#
-# Dongle support
-#
-# CONFIG_DONGLE is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=m
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=m
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=m
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-CONFIG_INPUT=y
-CONFIG_INPUT_KEYBDEV=y
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_SERIAL_CONSOLE is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=115200
-CONFIG_TOUCHSCREEN_UCB1200=y
-# CONFIG_TOUCHSCREEN_BITSY is not set
-# CONFIG_PROFILER is not set
-# CONFIG_PFS168_SPI is not set
-CONFIG_PFS168_DTMF=y
-CONFIG_PFS168_MISC=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-CONFIG_I2C=y
-CONFIG_I2C_ALGOBIT=y
-# CONFIG_I2C_ASSABET is not set
-# CONFIG_I2C_ALGOPCF is not set
-CONFIG_I2C_CHARDEV=y
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-CONFIG_MOUSE=y
-CONFIG_PSMOUSE=y
-# CONFIG_82C710_MOUSE is not set
-# CONFIG_PC110_PAD is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-
-#
-# Input core support is needed for joysticks
-#
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_SA1100_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_PCMCIA_SERIAL_CS is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS_FS=y
-CONFIG_JFFS_FS_VERBOSE=0
-# CONFIG_JFFS2_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_RAMFS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FB=y
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-# CONFIG_FB_CYBER2000 is not set
-CONFIG_FB_SA1100=y
-# CONFIG_FB_VIRTUAL is not set
-CONFIG_FBCON_ADVANCED=y
-# CONFIG_FBCON_MFB is not set
-# CONFIG_FBCON_CFB2 is not set
-# CONFIG_FBCON_CFB4 is not set
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-CONFIG_FBCON_CFB24=y
-CONFIG_FBCON_CFB32=y
-# CONFIG_FBCON_AFB is not set
-# CONFIG_FBCON_ILBM is not set
-# CONFIG_FBCON_IPLAN2P2 is not set
-# CONFIG_FBCON_IPLAN2P4 is not set
-# CONFIG_FBCON_IPLAN2P8 is not set
-# CONFIG_FBCON_MAC is not set
-# CONFIG_FBCON_VGA_PLANES is not set
-# CONFIG_FBCON_VGA is not set
-# CONFIG_FBCON_HGA is not set
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-CONFIG_FONT_8x8=y
-# CONFIG_FONT_8x16 is not set
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB=m
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-
-#
-# USB Controllers
-#
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-CONFIG_USB_OHCI=m
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-CONFIG_USB_HID=m
-CONFIG_USB_KBD=m
-CONFIG_USB_MOUSE=m
-# CONFIG_USB_WACOM is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-
-#
-# USB Multimedia devices
-#
-# CONFIG_USB_IBMCAM is not set
-# CONFIG_USB_OV511 is not set
-# CONFIG_USB_DSBR is not set
-# CONFIG_USB_DABUSB is not set
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_PLUSB is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_NET1080 is not set
-# CONFIG_USB_USBNET is not set
-
-#
-# USB port drivers
-#
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-
-#
-# USB misc drivers
-#
-# CONFIG_USB_RIO500 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_INFO=y
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_NO_PGT_CACHE is not set
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_CLPS711X is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-
-#
-# Archimedes/A5000 Implementations (select only ONE)
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-CONFIG_SA1100_PFS168=y
-CONFIG_SA1111=y
-CONFIG_SA1100_USB=m
-CONFIG_SA1100_USB_NETLINK=m
-CONFIG_SA1100_USB_CHAR=m
-CONFIG_SA1100_FREQUENCY_SCALE=m
-# CONFIG_SA1100_VOLTAGE_SCALE is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-
-#
-# Processor Type
-#
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-CONFIG_DISCONTIGMEM=y
-
-#
-# General setup
-#
-
-#
-# Please ensure that you have read the help on the next option
-#
-# CONFIG_ANGELBOOT is not set
-# CONFIG_PCI is not set
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=m
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="root=/dev/nfs mem=16M"
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_LEDS_CPU=y
-CONFIG_ALIGNMENT_TRAP=y
-CONFIG_UCB1200=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# RAM/ROM Device Drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_MTDRAM is not set
-
-#
-# Linearly Mapped Flash Device Drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_SBC_MEDIAGX is not set
-# CONFIG_MTD_ELAN_104NC is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_CSTM_CFI_JEDEC is not set
-# CONFIG_MTD_JEDEC is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_NAND_SPIA is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-
-#
-#
-#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-CONFIG_NET_VENDOR_SMC=y
-# CONFIG_WD80x3 is not set
-# CONFIG_ULTRA is not set
-# CONFIG_ULTRA32 is not set
-CONFIG_SMC9194=y
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=m
-# CONFIG_PPP_MULTILINK is not set
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=m
-# CONFIG_PCMCIA_NMCLAN is not set
-CONFIG_PCMCIA_SMC91C92=m
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-CONFIG_IRDA=m
-
-#
-# IrDA protocols
-#
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-# CONFIG_IRDA_OPTIONS is not set
-
-#
-# Infrared-port device drivers
-#
-
-#
-# SIR device drivers
-#
-CONFIG_IRTTY_SIR=m
-CONFIG_IRPORT_SIR=m
-
-#
-# FIR device drivers
-#
-# CONFIG_NSC_FIR is not set
-# CONFIG_WINBOND_FIR is not set
-# CONFIG_TOSHIBA_FIR is not set
-# CONFIG_SMC_IRCC_FIR is not set
-CONFIG_SA1100_FIR=m
-
-#
-# Dongle support
-#
-# CONFIG_DONGLE is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=m
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=m
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=m
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-CONFIG_INPUT=y
-CONFIG_INPUT_KEYBDEV=y
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_SERIAL=y
-# CONFIG_SERIAL_CONSOLE is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=115200
-CONFIG_TOUCHSCREEN_UCB1200=y
-# CONFIG_TOUCHSCREEN_BITSY is not set
-# CONFIG_PROFILER is not set
-# CONFIG_PFS168_SPI is not set
-CONFIG_PFS168_DTMF=y
-CONFIG_PFS168_MISC=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-CONFIG_I2C=y
-CONFIG_I2C_ALGOBIT=y
-# CONFIG_I2C_ASSABET is not set
-CONFIG_I2C_PFS168=y
-# CONFIG_I2C_ALGOPCF is not set
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_SENSORS=y
-CONFIG_I2C_EEPROM=y
-CONFIG_I2C_EEPROM=y
-CONFIG_I2C_M41T11=y
-CONFIG_I2C_X9221=y
-CONFIG_I2C_PCF8574=y
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-CONFIG_MOUSE=y
-CONFIG_PSMOUSE=y
-# CONFIG_82C710_MOUSE is not set
-# CONFIG_PC110_PAD is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-
-#
-# Input core support is needed for joysticks
-#
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_SA1100_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-CONFIG_PCMCIA_SERIAL=m
-
-#
-# PCMCIA character device support
-#
-# CONFIG_PCMCIA_SERIAL_CS is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS_FS=y
-CONFIG_JFFS_FS_VERBOSE=0
-# CONFIG_JFFS2_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_RAMFS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FB=y
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-# CONFIG_FB_CYBER2000 is not set
-CONFIG_FB_SA1100=y
-# CONFIG_PFS168_SASTN is not set
-CONFIG_PFS168_SATFT=y
-# CONFIG_FB_MQ200 is not set
-# CONFIG_FB_VIRTUAL is not set
-CONFIG_FBCON_ADVANCED=y
-# CONFIG_FBCON_MFB is not set
-# CONFIG_FBCON_CFB2 is not set
-# CONFIG_FBCON_CFB4 is not set
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-CONFIG_FBCON_CFB24=y
-CONFIG_FBCON_CFB32=y
-# CONFIG_FBCON_AFB is not set
-# CONFIG_FBCON_ILBM is not set
-# CONFIG_FBCON_IPLAN2P2 is not set
-# CONFIG_FBCON_IPLAN2P4 is not set
-# CONFIG_FBCON_IPLAN2P8 is not set
-# CONFIG_FBCON_MAC is not set
-# CONFIG_FBCON_VGA_PLANES is not set
-# CONFIG_FBCON_VGA is not set
-# CONFIG_FBCON_HGA is not set
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-CONFIG_FONT_8x8=y
-# CONFIG_FONT_8x16 is not set
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB=m
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-
-#
-# USB Controllers
-#
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-CONFIG_USB_OHCI=m
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-CONFIG_USB_HID=m
-CONFIG_USB_KBD=m
-CONFIG_USB_MOUSE=m
-# CONFIG_USB_WACOM is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-
-#
-# USB Multimedia devices
-#
-# CONFIG_USB_IBMCAM is not set
-# CONFIG_USB_OV511 is not set
-# CONFIG_USB_DSBR is not set
-# CONFIG_USB_DABUSB is not set
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_PLUSB is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_NET1080 is not set
-
-#
-# USB port drivers
-#
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-
-#
-# USB misc drivers
-#
-# CONFIG_USB_RIO500 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_INFO=y
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_NO_PGT_CACHE is not set
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_DC21285_PORT is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-
-#
-# System and processor type
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_FOOTBRIDGE is not set
-CONFIG_ARCH_SA1100=y
-CONFIG_CPU_SA1100=y
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_EMPEG is not set
-# CONFIG_SA1100_ITSY is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_VICTOR is not set
-CONFIG_SA1100_SHERMAN=y
-# CONFIG_VICTOR_BOARD1 is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_ISA_DMA is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-# CONFIG_CPU_ARM2 is not set
-# CONFIG_CPU_ARM3 is not set
-# CONFIG_CPU_ARM6 is not set
-# CONFIG_CPU_ARM7 is not set
-CONFIG_CPU_SA110=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_ALIGNMENT_TRAP=y
-# CONFIG_TEXT_SECTIONS is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# General setup
-#
-CONFIG_ZBOOT_ROM=y
-CONFIG_ZBOOT_ROM_TEXT=0x00050000
-CONFIG_ZBOOT_ROM_BSS=0xc0200000
-# CONFIG_NET is not set
-# CONFIG_SYSVIPC is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_SYSCTL is not set
-CONFIG_NWFPE=y
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_ARTHUR is not set
-# CONFIG_PARPORT is not set
-CONFIG_CMDLINE="mem=64M@0xc0000000 mem=64M@0xc8000000 root=/dev/mtdblock2"
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_IDE is not set
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_IDEDISK is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_IDE_CHIPSETS is not set
-
-#
-# Additional Block Devices
-#
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_MD is not set
-CONFIG_BLK_DEV_RAM=y
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE_PARPORT is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_FLASH=y
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_UNIX98_PTYS is not set
-# CONFIG_MOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-
-#
-# Video For Linux
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Joystick support
-#
-# CONFIG_JOYSTICK is not set
-# CONFIG_DTLK is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Filesystems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ACORN_PARTITION is not set
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_MAGIC_SYSRQ is not set
-CONFIG_DEBUG_LL=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-# CONFIG_GENERIC_BUST_SPINLOCK is not set
-# CONFIG_GENERIC_ISA_DMA is not set
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# System Type
-#
-# CONFIG_ARCH_ADIFCC is not set
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_CAMELOT is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP310 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_SHARK is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-
-#
-# Archimedes/A5000 Implementations (select only ONE)
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_ADSBITSY is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_H3100 is not set
-CONFIG_SA1100_H3600=y
-# CONFIG_SA1100_H3800 is not set
-CONFIG_SA1100_H3XXX=y
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FLEXANET is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_GRAPHICSMASTER is not set
-# CONFIG_SA1100_BADGE4 is not set
-# CONFIG_SA1100_JORNADA720 is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_ITSY is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_OMNIMETER is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_PT_SYSTEM3 is not set
-# CONFIG_SA1100_SHANNON is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_SIMPAD is not set
-# CONFIG_SA1100_PFS168 is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-CONFIG_SA1100_USB=m
-CONFIG_SA1100_USB_NETLINK=m
-# CONFIG_SA1100_USB_CHAR is not set
-CONFIG_H3600_SLEEVE=m
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_AUTCPU12 is not set
-# CONFIG_ARCH_CDB89712 is not set
-# CONFIG_ARCH_CLEP7312 is not set
-# CONFIG_ARCH_EDB7211 is not set
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_FORTUNET is not set
-# CONFIG_ARCH_EP7211 is not set
-# CONFIG_ARCH_EP7212 is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-
-#
-# Processor Type
-#
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM922T is not set
-# CONFIG_CPU_ARM926T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-# CONFIG_XSCALE_PMU is not set
-# CONFIG_ARM_THUMB is not set
-CONFIG_DISCONTIGMEM=y
-
-#
-# General setup
-#
-# CONFIG_PCI is not set
-CONFIG_ISA=y
-# CONFIG_ISA_DMA is not set
-# CONFIG_FIQ is not set
-CONFIG_CPU_FREQ=y
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-CONFIG_PCMCIA_PROBE=y
-# CONFIG_I82092 is not set
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=m
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-
-#
-# At least one math emulation must be selected
-#
-CONFIG_FPE_NWFPE=m
-CONFIG_FPE_FASTFPE=y
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_PM=y
-# CONFIG_APM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="N"
-# CONFIG_LEDS is not set
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_BOOTLDR_PARTS=y
-# CONFIG_MTD_AFS_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_JEDEC is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-# CONFIG_MTD_CDB89712 is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_EPXA10DB is not set
-# CONFIG_MTD_PCI is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_CISS_SCSI_TAPE is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_LOOP=m
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_MD_MULTIPATH is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK=y
-CONFIG_RTNETLINK=y
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-
-#
-#
-#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-# CONFIG_NET_ETHERNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_MYRI_SBUS is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
-CONFIG_PPP=m
-# CONFIG_PPP_MULTILINK is not set
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-CONFIG_NET_RADIO=y
-# CONFIG_STRIP is not set
-CONFIG_WAVELAN=m
-# CONFIG_ARLAN is not set
-# CONFIG_AIRONET4500 is not set
-# CONFIG_AIRONET4500_NONCS is not set
-# CONFIG_AIRONET4500_PROC is not set
-# CONFIG_AIRO is not set
-CONFIG_HERMES=m
-
-#
-# Wireless Pcmcia cards support
-#
-CONFIG_PCMCIA_HERMES=m
-# CONFIG_AIRO_CS is not set
-CONFIG_NET_WIRELESS=y
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=m
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-CONFIG_PCMCIA_XIRC2PS=m
-# CONFIG_PCMCIA_AXNET is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=m
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=m
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=m
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=m
-CONFIG_BLK_DEV_IDECD=m
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_ATARAID is not set
-# CONFIG_BLK_DEV_ATARAID_PDC is not set
-# CONFIG_BLK_DEV_ATARAID_HPT is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-# CONFIG_INPUT is not set
-# CONFIG_INPUT_KEYBDEV is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_SERIAL=y
-CONFIG_SERIAL_CONSOLE=y
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_AMBA is not set
-# CONFIG_SERIAL_AMBA_CONSOLE is not set
-# CONFIG_SERIAL_CLPS711X is not set
-# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
-# CONFIG_SERIAL_21285 is not set
-# CONFIG_SERIAL_21285_OLD is not set
-# CONFIG_SERIAL_21285_CONSOLE is not set
-# CONFIG_SERIAL_UART00 is not set
-# CONFIG_SERIAL_UART00_CONSOLE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=115200
-CONFIG_SERIAL_8250=m
-# CONFIG_SERIAL_8250_CONSOLE is not set
-# CONFIG_ATOMWIDE_SERIAL is not set
-# CONFIG_DUALSP_SERIAL is not set
-# CONFIG_SERIAL_8250_EXTENDED is not set
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-# CONFIG_SERIAL_8250_SHARE_IRQ is not set
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_RSA is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# L3 serial bus support
-#
-CONFIG_L3=y
-CONFIG_L3_ALGOBIT=y
-CONFIG_L3_BIT_SA1100_GPIO=y
-
-#
-# Other L3 adapters
-#
-# CONFIG_L3_SA1111 is not set
-CONFIG_BIT_SA1100_GPIO=y
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-CONFIG_MOUSE=m
-# CONFIG_PSMOUSE is not set
-# CONFIG_82C710_MOUSE is not set
-# CONFIG_PC110_PAD is not set
-
-#
-# Joysticks
-#
-# CONFIG_INPUT_GAMEPORT is not set
-
-#
-# Input core support is needed for gameports
-#
-
-#
-# Input core support is needed for joysticks
-#
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-CONFIG_SA1100_RTC=m
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_PCMCIA_SERIAL_CS is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FAT_FS=m
-CONFIG_MSDOS_FS=m
-# CONFIG_UMSDOS_FS is not set
-CONFIG_VFAT_FS=m
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_CRAMFS=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-CONFIG_DEVFS_FS=y
-CONFIG_DEVFS_MOUNT=y
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_ROOT_NFS is not set
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-# CONFIG_ZISOFS_FS is not set
-CONFIG_ZLIB_FS_INFLATE=y
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-CONFIG_SMB_NLS=y
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-CONFIG_FB_SA1100=y
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_VIRTUAL is not set
-CONFIG_FBCON_ADVANCED=y
-# CONFIG_FBCON_MFB is not set
-# CONFIG_FBCON_CFB2 is not set
-# CONFIG_FBCON_CFB4 is not set
-# CONFIG_FBCON_CFB8 is not set
-CONFIG_FBCON_CFB16=y
-# CONFIG_FBCON_CFB24 is not set
-# CONFIG_FBCON_CFB32 is not set
-# CONFIG_FBCON_AFB is not set
-# CONFIG_FBCON_ILBM is not set
-# CONFIG_FBCON_IPLAN2P2 is not set
-# CONFIG_FBCON_IPLAN2P4 is not set
-# CONFIG_FBCON_IPLAN2P8 is not set
-# CONFIG_FBCON_MAC is not set
-# CONFIG_FBCON_VGA_PLANES is not set
-# CONFIG_FBCON_VGA is not set
-# CONFIG_FBCON_HGA is not set
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-CONFIG_SOUND=y
-# CONFIG_SOUND_BT878 is not set
-# CONFIG_SOUND_CMPCI is not set
-# CONFIG_SOUND_EMU10K1 is not set
-# CONFIG_MIDI_EMU10K1 is not set
-# CONFIG_SOUND_FUSION is not set
-# CONFIG_SOUND_CS4281 is not set
-# CONFIG_SOUND_ES1370 is not set
-# CONFIG_SOUND_ES1371 is not set
-# CONFIG_SOUND_ESSSOLO1 is not set
-# CONFIG_SOUND_MAESTRO is not set
-# CONFIG_SOUND_MAESTRO3 is not set
-# CONFIG_SOUND_ICH is not set
-# CONFIG_SOUND_RME96XX is not set
-# CONFIG_SOUND_SONICVIBES is not set
-# CONFIG_SOUND_TRIDENT is not set
-# CONFIG_SOUND_MSNDCLAS is not set
-# CONFIG_SOUND_MSNDPIN is not set
-# CONFIG_SOUND_VIA82CXXX is not set
-# CONFIG_MIDI_VIA82CXXX is not set
-CONFIG_SOUND_SA1100=y
-CONFIG_SOUND_UDA1341=m
-# CONFIG_SOUND_ASSABET_UDA1341 is not set
-CONFIG_SOUND_H3600_UDA1341=m
-# CONFIG_SOUND_PANGOLIN_UDA1341 is not set
-# CONFIG_SOUND_SA1111_UDA1341 is not set
-# CONFIG_SOUND_SA1100SSP is not set
-# CONFIG_SOUND_OSS is not set
-# CONFIG_SOUND_WAVEARTIST is not set
-# CONFIG_SOUND_TVMIXER is not set
-
-#
-# Multimedia Capabilities Port drivers
-#
-# CONFIG_MCP is not set
-# CONFIG_MCP_SA1100 is not set
-# CONFIG_MCP_UCB1200 is not set
-# CONFIG_MCP_UCB1200_AUDIO is not set
-# CONFIG_MCP_UCB1200_TS is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Host Controller Drivers
-#
-# CONFIG_USB_EHCI_HCD is not set
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-# CONFIG_USB_OHCI is not set
-# CONFIG_USB_OHCI_SA1111 is not set
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-
-#
-# SCSI support is needed for USB Storage
-#
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_STORAGE_DEBUG is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
-# CONFIG_USB_STORAGE_HP8200e is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-
-#
-# Input core support is needed for USB HID
-#
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_HPUSBSCSI is not set
-
-#
-# USB Multimedia devices
-#
-
-#
-# Video4Linux support is needed for USB Multimedia device support
-#
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_CDCETHER is not set
-# CONFIG_USB_USBNET is not set
-
-#
-# USB port drivers
-#
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_SERIAL_GENERIC is not set
-# CONFIG_USB_SERIAL_BELKIN is not set
-# CONFIG_USB_SERIAL_WHITEHEAT is not set
-# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_EMPEG is not set
-# CONFIG_USB_SERIAL_FTDI_SIO is not set
-# CONFIG_USB_SERIAL_VISOR is not set
-# CONFIG_USB_SERIAL_IPAQ is not set
-# CONFIG_USB_SERIAL_IR is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-# CONFIG_USB_SERIAL_KEYSPAN is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_KLSI is not set
-# CONFIG_USB_SERIAL_PL2303 is not set
-# CONFIG_USB_SERIAL_CYBERJACK is not set
-# CONFIG_USB_SERIAL_XIRCOM is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_AUERSWALD is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-# CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_INFO is not set
-# CONFIG_NO_PGT_CACHE is not set
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_WAITQ is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_DEBUG_ERRORS is not set
-# CONFIG_DEBUG_LL is not set
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-# CONFIG_GENERIC_BUST_SPINLOCK is not set
-# CONFIG_GENERIC_ISA_DMA is not set
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_KMOD is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_CAMELOT is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_SHARK is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-
-#
-# Archimedes/A5000 Implementations (select only ONE)
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_ADSBITSY is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_H3600 is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FLEXANET is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_GRAPHICSMASTER is not set
-# CONFIG_SA1100_JORNADA720 is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_ITSY is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_OMNIMETER is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_SHANNON is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_SIMPAD is not set
-# CONFIG_SA1100_PFS168 is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-CONFIG_SA1100_PT_SYSTEM3=y
-CONFIG_SA1111=y
-CONFIG_FORCE_MAX_ZONEORDER=9
-CONFIG_SA1100_USB=m
-CONFIG_SA1100_USB_NETLINK=m
-CONFIG_SA1100_USB_CHAR=m
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_AUTCPU12 is not set
-# CONFIG_ARCH_CDB89712 is not set
-# CONFIG_ARCH_CLEP7312 is not set
-# CONFIG_ARCH_EDB7211 is not set
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_EP7211 is not set
-# CONFIG_ARCH_EP7212 is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-
-#
-# Processor Type
-#
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM922T is not set
-# CONFIG_CPU_ARM926T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_DISCONTIGMEM=y
-
-#
-# General setup
-#
-# CONFIG_PCI is not set
-CONFIG_ISA=y
-# CONFIG_ISA_DMA is not set
-CONFIG_CPU_FREQ=y
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_I82092 is not set
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=m
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-
-#
-# At least one math emulation must be selected
-#
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_PM=y
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="noinitrd root=/dev/mtdblock3"
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_LEDS_CPU=y
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=m
-CONFIG_MTD_BOOTLDR_PARTS=m
-# CONFIG_MTD_AFS_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-# CONFIG_MTD_CHAR is not set
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_JEDEC is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-# CONFIG_MTD_CDB89712 is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_PCI is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_LOOP=m
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_MD_MULTIPATH is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-
-#
-#
-#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-CONFIG_DUMMY=m
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_ARM_AM79C961A is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNBMAC is not set
-# CONFIG_SUNQE is not set
-# CONFIG_SUNLANCE is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-CONFIG_NET_VENDOR_SMC=y
-# CONFIG_WD80x3 is not set
-# CONFIG_ULTRAMCA is not set
-# CONFIG_ULTRA is not set
-# CONFIG_ULTRA32 is not set
-CONFIG_SMC9194=m
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_MYRI_SBUS is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=m
-# CONFIG_PCMCIA_NMCLAN is not set
-CONFIG_PCMCIA_SMC91C92=m
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-# CONFIG_NET_PCMCIA_RADIO is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-CONFIG_IRDA=m
-
-#
-# IrDA protocols
-#
-CONFIG_IRLAN=m
-# CONFIG_IRNET is not set
-CONFIG_IRCOMM=m
-# CONFIG_IRDA_ULTRA is not set
-# CONFIG_IRDA_OPTIONS is not set
-
-#
-# Infrared-port device drivers
-#
-
-#
-# SIR device drivers
-#
-CONFIG_IRTTY_SIR=m
-CONFIG_IRPORT_SIR=m
-
-#
-# Dongle support
-#
-# CONFIG_DONGLE is not set
-
-#
-# FIR device drivers
-#
-# CONFIG_USB_IRDA is not set
-# CONFIG_NSC_FIR is not set
-# CONFIG_WINBOND_FIR is not set
-# CONFIG_TOSHIBA_FIR is not set
-# CONFIG_SMC_IRCC_FIR is not set
-# CONFIG_ALI_FIR is not set
-# CONFIG_VLSI_FIR is not set
-CONFIG_SA1100_FIR=m
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_ATARAID is not set
-# CONFIG_BLK_DEV_ATARAID_PDC is not set
-# CONFIG_BLK_DEV_ATARAID_HPT is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-CONFIG_INPUT=y
-CONFIG_INPUT_KEYBDEV=y
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_AMBA is not set
-# CONFIG_SERIAL_AMBA_CONSOLE is not set
-# CONFIG_SERIAL_CLPS711X is not set
-# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
-# CONFIG_SERIAL_21285 is not set
-# CONFIG_SERIAL_21285_OLD is not set
-# CONFIG_SERIAL_21285_CONSOLE is not set
-# CONFIG_SERIAL_UART00 is not set
-# CONFIG_SERIAL_UART00_CONSOLE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SA1100_DEFAULT_BAUDRATE=38400
-CONFIG_SERIAL_8250=m
-# CONFIG_SERIAL_8250_CONSOLE is not set
-# CONFIG_SERIAL_8250_EXTENDED is not set
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-# CONFIG_SERIAL_8250_SHARE_IRQ is not set
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_HUB6 is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# L3 serial bus support
-#
-# CONFIG_L3 is not set
-# CONFIG_L3_ALGOBIT is not set
-# CONFIG_L3_BIT_SA1100_GPIO is not set
-
-#
-# Other L3 adapters
-#
-# CONFIG_L3_SA1111 is not set
-# CONFIG_BIT_SA1100_GPIO is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
-
-#
-# Joysticks
-#
-# CONFIG_INPUT_GAMEPORT is not set
-# CONFIG_INPUT_NS558 is not set
-# CONFIG_INPUT_LIGHTNING is not set
-# CONFIG_INPUT_PCIGAME is not set
-# CONFIG_INPUT_CS461X is not set
-# CONFIG_INPUT_EMU10K1 is not set
-# CONFIG_INPUT_SERIO is not set
-# CONFIG_INPUT_SERPORT is not set
-
-#
-# Joysticks
-#
-# CONFIG_INPUT_ANALOG is not set
-# CONFIG_INPUT_A3D is not set
-# CONFIG_INPUT_ADI is not set
-# CONFIG_INPUT_COBRA is not set
-# CONFIG_INPUT_GF2K is not set
-# CONFIG_INPUT_GRIP is not set
-# CONFIG_INPUT_INTERACT is not set
-# CONFIG_INPUT_TMDC is not set
-# CONFIG_INPUT_SIDEWINDER is not set
-# CONFIG_INPUT_IFORCE_USB is not set
-# CONFIG_INPUT_IFORCE_232 is not set
-# CONFIG_INPUT_WARRIOR is not set
-# CONFIG_INPUT_MAGELLAN is not set
-# CONFIG_INPUT_SPACEORB is not set
-# CONFIG_INPUT_SPACEBALL is not set
-# CONFIG_INPUT_STINGER is not set
-# CONFIG_INPUT_DB9 is not set
-# CONFIG_INPUT_GAMECON is not set
-# CONFIG_INPUT_TURBOGRAFX is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_SA1100_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-CONFIG_PCMCIA_SERIAL_CS=m
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_CRAMFS is not set
-CONFIG_TMPFS=y
-# CONFIG_RAMFS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_ROOT_NFS is not set
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-# CONFIG_ZISOFS_FS is not set
-# CONFIG_ZLIB_FS_INFLATE is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_SMB_NLS is not set
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=y
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Console drivers
-#
-CONFIG_PC_KEYMAP=y
-# CONFIG_VGA_CONSOLE is not set
-
-#
-# Frame-buffer support
-#
-CONFIG_FB=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FB_ACORN is not set
-# CONFIG_FB_CLPS711X is not set
-CONFIG_FB_SA1100=y
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_FBCON_ADVANCED is not set
-CONFIG_FBCON_CFB2=y
-CONFIG_FBCON_CFB4=y
-CONFIG_FBCON_CFB8=y
-CONFIG_FBCON_CFB16=y
-CONFIG_FBCON_FONTWIDTH8_ONLY=y
-CONFIG_FBCON_FONTS=y
-CONFIG_FONT_8x8=y
-# CONFIG_FONT_8x16 is not set
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# Multimedia Capabilities Port drivers
-#
-# CONFIG_MCP is not set
-# CONFIG_MCP_SA1100 is not set
-# CONFIG_MCP_UCB1200 is not set
-# CONFIG_MCP_UCB1200_AUDIO is not set
-# CONFIG_MCP_UCB1200_TS is not set
-
-#
-# USB support
-#
-CONFIG_USB=m
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-# CONFIG_USB_LONG_TIMEOUT is not set
-
-#
-# USB Controllers
-#
-# CONFIG_USB_UHCI is not set
-# CONFIG_USB_UHCI_ALT is not set
-# CONFIG_USB_OHCI is not set
-CONFIG_USB_OHCI_SA1111=m
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH is not set
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_STORAGE_DEBUG is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
-# CONFIG_USB_STORAGE_HP8200e is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-# CONFIG_USB_ACM is not set
-CONFIG_USB_PRINTER=m
-
-#
-# USB Human Interface Devices (HID)
-#
-CONFIG_USB_HID=m
-CONFIG_USB_HIDDEV=y
-CONFIG_USB_KBD=m
-CONFIG_USB_MOUSE=m
-# CONFIG_USB_WACOM is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_DC2XX is not set
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_SCANNER is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_HPUSBSCSI is not set
-
-#
-# USB Multimedia devices
-#
-
-#
-# Video4Linux support is needed for USB Multimedia device support
-#
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_CDCETHER is not set
-CONFIG_USB_USBNET=m
-
-#
-# USB port drivers
-#
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-# CONFIG_USB_SERIAL_GENERIC is not set
-# CONFIG_USB_SERIAL_BELKIN is not set
-# CONFIG_USB_SERIAL_WHITEHEAT is not set
-# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_EMPEG is not set
-# CONFIG_USB_SERIAL_FTDI_SIO is not set
-# CONFIG_USB_SERIAL_VISOR is not set
-# CONFIG_USB_SERIAL_IR is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-# CONFIG_USB_SERIAL_KEYSPAN is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_PL2303 is not set
-# CONFIG_USB_SERIAL_CYBERJACK is not set
-# CONFIG_USB_SERIAL_XIRCOM is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_RIO500 is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_NO_PGT_CACHE is not set
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SLAB=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_WAITQ=y
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
+++ /dev/null
-#
-# Automatically generated by make menuconfig: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
-# CONFIG_GENERIC_BUST_SPINLOCK is not set
-# CONFIG_GENERIC_ISA_DMA is not set
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# System Type
-#
-# CONFIG_ARCH_ADIFCC is not set
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_PXA is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_CAMELOT is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP310 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_SHARK is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-# CONFIG_ARCH_ARC is not set
-# CONFIG_ARCH_A5K is not set
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_AUTCPU12 is not set
-# CONFIG_ARCH_CDB89712 is not set
-# CONFIG_ARCH_CEIVA is not set
-# CONFIG_ARCH_CLEP7312 is not set
-# CONFIG_ARCH_EDB7211 is not set
-# CONFIG_ARCH_P720T is not set
-# CONFIG_ARCH_FORTUNET is not set
-# CONFIG_ARCH_EP7211 is not set
-# CONFIG_ARCH_EP7212 is not set
-
-#
-# Epxa10db
-#
-
-#
-# Footbridge Implementations
-#
-# CONFIG_ARCH_CATS is not set
-# CONFIG_ARCH_PERSONAL_SERVER is not set
-# CONFIG_ARCH_EBSA285_ADDIN is not set
-# CONFIG_ARCH_EBSA285_HOST is not set
-# CONFIG_ARCH_NETWINDER is not set
-
-#
-# IOP310 Implementation Options
-#
-# CONFIG_ARCH_IQ80310 is not set
-# CONFIG_IOP310_AAU is not set
-# CONFIG_IOP310_DMA is not set
-# CONFIG_IOP310_MU is not set
-# CONFIG_IOP310_PMON is not set
-
-#
-# Intel PXA250/210 Implementations
-#
-# CONFIG_ARCH_LUBBOCK is not set
-# CONFIG_ARCH_PXA_IDP is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_ASSABET_NEPONSET is not set
-# CONFIG_SA1100_ADSBITSY is not set
-# CONFIG_SA1100_BRUTUS is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_H3100 is not set
-# CONFIG_SA1100_H3600 is not set
-# CONFIG_SA1100_H3800 is not set
-# CONFIG_SA1100_H3XXX is not set
-# CONFIG_SA1100_EXTENEX1 is not set
-# CONFIG_SA1100_FLEXANET is not set
-# CONFIG_SA1100_FREEBIRD is not set
-# CONFIG_SA1100_GRAPHICSCLIENT is not set
-# CONFIG_SA1100_GRAPHICSMASTER is not set
-# CONFIG_SA1100_BADGE4 is not set
-# CONFIG_SA1100_JORNADA720 is not set
-# CONFIG_SA1100_HUW_WEBPANEL is not set
-# CONFIG_SA1100_ITSY is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_NANOENGINE is not set
-# CONFIG_SA1100_OMNIMETER is not set
-# CONFIG_SA1100_PANGOLIN is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_PT_SYSTEM3 is not set
-# CONFIG_SA1100_SHANNON is not set
-# CONFIG_SA1100_SHERMAN is not set
-# CONFIG_SA1100_SIMPAD is not set
-CONFIG_SA1100_TRIZEPS=y
-CONFIG_TRIZEPS_MFTB2=y
-# CONFIG_SA1100_PFS168 is not set
-# CONFIG_SA1100_VICTOR is not set
-# CONFIG_SA1100_XP860 is not set
-# CONFIG_SA1100_YOPY is not set
-# CONFIG_SA1100_STORK is not set
-# CONFIG_SA1100_USB is not set
-# CONFIG_SA1100_USB_NETLINK is not set
-# CONFIG_SA1100_USB_CHAR is not set
-# CONFIG_H3600_SLEEVE is not set
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-# CONFIG_SA1111 is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-# CONFIG_CPU_ARM610 is not set
-# CONFIG_CPU_ARM710 is not set
-# CONFIG_CPU_ARM720T is not set
-# CONFIG_CPU_ARM920T is not set
-# CONFIG_CPU_ARM922T is not set
-# CONFIG_CPU_ARM926T is not set
-# CONFIG_CPU_ARM1020 is not set
-# CONFIG_CPU_SA110 is not set
-CONFIG_CPU_SA1100=y
-# CONFIG_CPU_XSCALE is not set
-# CONFIG_CPU_32v3 is not set
-CONFIG_CPU_32v4=y
-# CONFIG_CPU_32v5 is not set
-# CONFIG_ARM_THUMB is not set
-
-#
-# General setup
-#
-CONFIG_DISCONTIGMEM=y
-# CONFIG_PCI is not set
-CONFIG_ISA=y
-# CONFIG_ISA_DMA is not set
-# CONFIG_FIQ is not set
-# CONFIG_ZBOOT_ROM is not set
-CONFIG_ZBOOT_ROM_TEXT=0
-CONFIG_ZBOOT_ROM_BSS=0
-# CONFIG_CPU_FREQ is not set
-# CONFIG_CPU_FREQ_24_API is not set
-# CONFIG_CPU_FREQ_26_API is not set
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_I82092 is not set
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_CLPS6700 is not set
-CONFIG_PCMCIA_SA1100=m
-# CONFIG_PCMCIA_SA1111 is not set
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_FASTFPE is not set
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-CONFIG_BINFMT_AOUT=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_APM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="keepinitrd mem=16M root=/dev/hda2 1"
-# CONFIG_LEDS is not set
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=m
-CONFIG_MTD_CONCAT=m
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-CONFIG_MTD_AFS_PARTS=m
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
-# CONFIG_MTD_JEDEC is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-# CONFIG_MTD_CDB89712 is not set
-CONFIG_MTD_SA1100=m
-# CONFIG_MTD_2PARTS_IPAQ is not set
-# CONFIG_MTD_DC21285 is not set
-# CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_EPXA10DB is not set
-# CONFIG_MTD_FORTUNET is not set
-# CONFIG_MTD_AUTCPU12 is not set
-# CONFIG_MTD_EDB7312 is not set
-# CONFIG_MTD_IMPA7 is not set
-# CONFIG_MTD_CEIVA is not set
-# CONFIG_MTD_PCI is not set
-# CONFIG_MTD_PCMCIA is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_PNP_NAMES is not set
-# CONFIG_PNP_DEBUG is not set
-# CONFIG_ISAPNP is not set
-# CONFIG_PNPBIOS is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_CISS_SCSI_TAPE is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-# CONFIG_BLK_DEV_MD is not set
-# CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID5 is not set
-# CONFIG_MD_MULTIPATH is not set
-# CONFIG_BLK_DEV_LVM is not set
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DEV_APPLETALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-# CONFIG_NET_ETHERNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_E1000_NAPI is not set
-# CONFIG_MYRI_SBUS is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
-CONFIG_PPP=m
-# CONFIG_PPP_MULTILINK is not set
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-CONFIG_NET_RADIO=y
-# CONFIG_STRIP is not set
-# CONFIG_ARLAN is not set
-# CONFIG_AIRONET4500 is not set
-# CONFIG_AIRONET4500_NONCS is not set
-# CONFIG_AIRONET4500_PROC is not set
-# CONFIG_WAVELAN is not set
-# CONFIG_AIRO is not set
-# CONFIG_HERMES is not set
-# CONFIG_PCMCIA_NETWAVE is not set
-# CONFIG_PCMCIA_WAVELAN is not set
-# CONFIG_PCMCIA_HERMES is not set
-CONFIG_AIRO_CS=m
-CONFIG_NET_WIRELESS=y
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-# CONFIG_ARCNET_COM20020_CS is not set
-# CONFIG_PCMCIA_IBMTR is not set
-CONFIG_NET_PCMCIA_RADIO=y
-# CONFIG_PCMCIA_RAYCS is not set
-# CONFIG_AIRONET4500_CS is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-# CONFIG_BLK_DEV_HD_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_BLK_DEV_CMD640 is not set
-# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
-# CONFIG_BLK_DEV_ISAPNP is not set
-# CONFIG_BLK_DEV_IDE_ICSIDE is not set
-# CONFIG_BLK_DEV_IDEDMA_ICS is not set
-# CONFIG_IDEDMA_ICS_AUTO is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_BLK_DEV_IDE_RAPIDE is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_IDEDMA_AUTO is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_TSLIBDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_GAMEPORT_NS558 is not set
-# CONFIG_GAMEPORT_L4 is not set
-# CONFIG_GAMEPORT_EMU10K1 is not set
-# CONFIG_GAMEPORT_VORTEX is not set
-# CONFIG_GAMEPORT_FM801 is not set
-# CONFIG_GAMEPORT_CS461x is not set
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PARKBD is not set
-# CONFIG_SERIO_RPCKBD is not set
-# CONFIG_SERIO_AMBAKMI is not set
-# CONFIG_SERIO_SA1111 is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_MOUSE_PS2 is not set
-# CONFIG_MOUSE_SERIAL is not set
-# CONFIG_MOUSE_INPORT is not set
-# CONFIG_MOUSE_LOGIBM is not set
-# CONFIG_MOUSE_PC110PAD is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_JOYSTICK_ANALOG is not set
-# CONFIG_JOYSTICK_A3D is not set
-# CONFIG_JOYSTICK_ADI is not set
-# CONFIG_JOYSTICK_COBRA is not set
-# CONFIG_JOYSTICK_GF2K is not set
-# CONFIG_JOYSTICK_GRIP is not set
-# CONFIG_JOYSTICK_GRIP_MP is not set
-# CONFIG_JOYSTICK_GUILLEMOT is not set
-# CONFIG_JOYSTICK_INTERACT is not set
-# CONFIG_JOYSTICK_SIDEWINDER is not set
-# CONFIG_JOYSTICK_TMDC is not set
-# CONFIG_JOYSTICK_IFORCE is not set
-# CONFIG_JOYSTICK_WARRIOR is not set
-# CONFIG_JOYSTICK_MAGELLAN is not set
-# CONFIG_JOYSTICK_SPACEORB is not set
-# CONFIG_JOYSTICK_SPACEBALL is not set
-# CONFIG_JOYSTICK_STINGER is not set
-# CONFIG_JOYSTICK_TWIDDLER is not set
-# CONFIG_JOYSTICK_DB9 is not set
-# CONFIG_JOYSTICK_GAMECON is not set
-# CONFIG_JOYSTICK_TURBOGRAFX is not set
-# CONFIG_INPUT_JOYDUMP is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_TOUCHSCREEN_GUNZE is not set
-# CONFIG_INPUT_MISC is not set
-# CONFIG_INPUT_PCSPKR is not set
-# CONFIG_INPUT_UINPUT is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-# CONFIG_SERIAL_8250_CONSOLE is not set
-# CONFIG_SERIAL_8250_CS is not set
-# CONFIG_SERIAL_8250_EXTENDED is not set
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-# CONFIG_SERIAL_8250_SHARE_IRQ is not set
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_RSA is not set
-# CONFIG_SERIAL_ACORN is not set
-# CONFIG_SERIAL_AMBA is not set
-# CONFIG_SERIAL_AMBA_CONSOLE is not set
-# CONFIG_SERIAL_CLPS711X is not set
-# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
-# CONFIG_SERIAL_CLPS711X_OLD_NAME is not set
-# CONFIG_SERIAL_21285 is not set
-# CONFIG_SERIAL_21285_OLD is not set
-# CONFIG_SERIAL_21285_CONSOLE is not set
-# CONFIG_SERIAL_UART00 is not set
-# CONFIG_SERIAL_UART00_CONSOLE is not set
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_UNIX98_PTYS is not set
-
-#
-# I2C support
-#
-CONFIG_I2C=m
-CONFIG_I2C_ALGOBIT=m
-# CONFIG_SCx200_I2C is not set
-# CONFIG_SCx200_ACB is not set
-# CONFIG_I2C_BIT_SA1100_GPIO is not set
-# CONFIG_I2C_ALGOPCF is not set
-CONFIG_I2C_CHARDEV=m
-CONFIG_I2C_PROC=m
-
-#
-# L3 serial bus support
-#
-# CONFIG_L3 is not set
-# CONFIG_L3_ALGOBIT is not set
-# CONFIG_L3_BIT_SA1100_GPIO is not set
-# CONFIG_BIT_SA1100_GPIO is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_SA1100_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_SCx200_GPIO is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_QFMT_V1 is not set
-# CONFIG_QFMT_V2 is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_JBD_DEBUG is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_JFFS2_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_JFS_DEBUG is not set
-# CONFIG_JFS_STATISTICS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_XFS_RT is not set
-# CONFIG_XFS_QUOTA is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_ROOT_NFS is not set
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_V4 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-# CONFIG_CIFS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_ZISOFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-# CONFIG_SMB_NLS is not set
-# CONFIG_NLS is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# Multimedia Capabilities Port drivers
-#
-# CONFIG_MCP is not set
-# CONFIG_MCP_SA1100 is not set
-# CONFIG_MCP_UCB1200 is not set
-# CONFIG_MCP_UCB1200_AUDIO is not set
-# CONFIG_MCP_UCB1200_TS is not set
-
-#
-# Console Switches
-#
-# CONFIG_SWITCHES is not set
-# CONFIG_SWITCHES_SA1100 is not set
-# CONFIG_SWITCHES_UCB1X00 is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_NO_FRAME_POINTER is not set
-CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_INFO is not set
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_WAITQ is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_DEBUG_LL is not set
-# CONFIG_DEBUG_DC21285_PORT is not set
-# CONFIG_DEBUG_CLPS711X_UART2 is not set
-
-#
-# Security options
-#
-CONFIG_SECURITY_CAPABILITIES=y
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=m
-CONFIG_ZLIB_DEFLATE=m
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_ARM=y
-# CONFIG_EISA is not set
-# CONFIG_SBUS is not set
-# CONFIG_MCA is not set
-CONFIG_UID16=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_OBSOLETE is not set
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# System Type
-#
-# CONFIG_ARCH_ARCA5K is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-CONFIG_ARCH_INTEGRATOR=y
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_SA1100 is not set
-# CONFIG_ARCH_CLPS711X is not set
-
-#
-# Archimedes/A5000 Implementations
-#
-
-#
-# Footbridge Implementations
-#
-
-#
-# SA11x0 Implementations
-#
-
-#
-# CLPS711X/EP721X Implementations
-#
-# CONFIG_ARCH_ACORN is not set
-# CONFIG_FOOTBRIDGE is not set
-# CONFIG_FOOTBRIDGE_HOST is not set
-# CONFIG_FOOTBRIDGE_ADDIN is not set
-CONFIG_CPU_32=y
-# CONFIG_CPU_26 is not set
-
-#
-# Processor Type
-#
-CONFIG_CPU_32v4=y
-CONFIG_CPU_ARM720=y
-CONFIG_CPU_ARM920=y
-CONFIG_CPU_ARM920_CPU_IDLE=y
-CONFIG_CPU_ARM920_I_CACHE_ON=y
-CONFIG_CPU_ARM920_D_CACHE_ON=y
-# CONFIG_CPU_ARM920_WRITETHROUGH is not set
-# CONFIG_DISCONTIGMEM is not set
-
-#
-# General setup
-#
-# CONFIG_ANGELBOOT is not set
-CONFIG_PCI_INTEGRATOR=y
-CONFIG_PCI=y
-# CONFIG_ISA is not set
-# CONFIG_ISA_DMA is not set
-CONFIG_PCI_NAMES=y
-# CONFIG_HOTPLUG is not set
-# CONFIG_PCMCIA is not set
-CONFIG_NET=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_NWFPE=y
-CONFIG_KCORE_ELF=y
-# CONFIG_KCORE_AOUT is not set
-CONFIG_BINFMT_AOUT=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
-# CONFIG_ARTHUR is not set
-CONFIG_CMDLINE="root=1f04 mem=32M"
-CONFIG_LEDS=y
-CONFIG_LEDS_TIMER=y
-CONFIG_LEDS_CPU=y
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_MTDRAM is not set
-
-#
-# MTD drivers for mapped chips
-#
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_JEDEC is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_PHYSMAP is not set
-
-#
-# Drivers for chip mappings
-#
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_NORA is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_VMAX is not set
-
-#
-# User modules and translation layers for MTD devices
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-CONFIG_MTD_ARM=y
-
-#
-# Plug and Play configuration
-#
-# CONFIG_PNP is not set
-# CONFIG_ISAPNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_IPV6 is not set
-# CONFIG_KHTTPD is not set
-# CONFIG_ATM is not set
-
-#
-#
-#
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_LLC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_APRICOT is not set
-# CONFIG_CS89x0 is not set
-CONFIG_TULIP=y
-# CONFIG_DE4X5 is not set
-# CONFIG_DGRS is not set
-# CONFIG_DM9102 is not set
-CONFIG_EEPRO100=y
-CONFIG_EEPRO100_PM=y
-# CONFIG_LNE390 is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_NE3210 is not set
-# CONFIG_ES3210 is not set
-# CONFIG_8139TOO is not set
-# CONFIG_RTL8129 is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-# CONFIG_I2O_PCI is not set
-# CONFIG_I2O_BLOCK is not set
-# CONFIG_I2O_LAN is not set
-# CONFIG_I2O_SCSI is not set
-# CONFIG_I2O_PROC is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input core support
-#
-# CONFIG_INPUT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-# CONFIG_SERIAL is not set
-# CONFIG_SERIAL_EXTENDED is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-CONFIG_SERIAL_AMBA=y
-CONFIG_SERIAL_INTEGRATOR=y
-CONFIG_SERIAL_AMBA_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-CONFIG_MOUSE=y
-CONFIG_PSMOUSE=y
-# CONFIG_82C710_MOUSE is not set
-# CONFIG_PC110_PAD is not set
-
-#
-# Joysticks
-#
-# CONFIG_JOYSTICK is not set
-
-#
-# Input core support is needed for joysticks
-#
-# CONFIG_QIC02_TAPE is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_INTEL_RNG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_ADFS_FS is not set
-# CONFIG_ADFS_FS_RW is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_FAT_FS is not set
-# CONFIG_MSDOS_FS is not set
-# CONFIG_UMSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_RAMFS is not set
-# CONFIG_ISO9660_FS is not set
-# CONFIG_JOLIET is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_NTFS_FS is not set
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-# CONFIG_HPFS_FS is not set
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_QNX4FS_RW is not set
-CONFIG_ROMFS_FS=y
-CONFIG_EXT2_FS=y
-# CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
-# CONFIG_UDF_FS is not set
-# CONFIG_UDF_RW is not set
-# CONFIG_UFS_FS is not set
-# CONFIG_UFS_FS_WRITE is not set
-
-#
-# Network File Systems
-#
-# CONFIG_CODA_FS is not set
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
-CONFIG_SUNRPC=y
-CONFIG_LOCKD=y
-# CONFIG_SMB_FS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_NCPFS_PACKET_SIGNING is not set
-# CONFIG_NCPFS_IOCTL_LOCKING is not set
-# CONFIG_NCPFS_STRONG is not set
-# CONFIG_NCPFS_NFS_NS is not set
-# CONFIG_NCPFS_OS2_NS is not set
-# CONFIG_NCPFS_SMALLDOS is not set
-# CONFIG_NCPFS_MOUNT_SUBDIR is not set
-# CONFIG_NCPFS_NDS_DOMAINS is not set
-# CONFIG_NCPFS_NLS is not set
-# CONFIG_NCPFS_EXTRAS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_NLS is not set
-
-#
-# Console drivers
-#
-CONFIG_KMI_KEYB=y
-CONFIG_PC_KEYMAP=y
-CONFIG_VGA_CONSOLE=y
-# CONFIG_FB is not set
-
-#
-# Frame-buffer support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# Kernel hacking
-#
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_INFO is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_LL=y
+++ /dev/null
-/*
- * linux/arch/arm/kernel/time-acorn.c
- *
- * Copyright (c) 1996-2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 24-Sep-1996 RMK Created
- * 10-Oct-1996 RMK Brought up to date with arch-sa110eval
- * 04-Dec-1997 RMK Updated for new arch/arm/time.c
- */
-#include <linux/timex.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/io.h>
-#include <asm/hardware/ioc.h>
-
-extern unsigned long (*gettimeoffset)(void);
-
-static unsigned long ioctime_gettimeoffset(void)
-{
- unsigned int count1, count2, status;
- long offset;
-
- ioc_writeb (0, IOC_T0LATCH);
- barrier ();
- count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
- barrier ();
- status = ioc_readb(IOC_IRQREQA);
- barrier ();
- ioc_writeb (0, IOC_T0LATCH);
- barrier ();
- count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
-
- offset = count2;
- if (count2 < count1) {
- /*
- * We have not had an interrupt between reading count1
- * and count2.
- */
- if (status & (1 << 5))
- offset -= LATCH;
- } else if (count2 > count1) {
- /*
- * We have just had another interrupt between reading
- * count1 and count2.
- */
- offset -= LATCH;
- }
-
- offset = (LATCH - offset) * (tick_nsec / 1000);
- return (offset + LATCH/2) / LATCH;
-}
-
-void __init ioctime_init(void)
-{
- ioc_writeb(LATCH & 255, IOC_T0LTCHL);
- ioc_writeb(LATCH >> 8, IOC_T0LTCHH);
- ioc_writeb(0, IOC_T0GO);
-
- gettimeoffset = ioctime_gettimeoffset;
-}
+++ /dev/null
-/*
- * linux/arch/arm/lib/io-readsl-armv3.S
- *
- * Copyright (C) 1995-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/hardware.h>
-
-/*
- * Note that some reads can be aligned on half-word boundaries.
- */
-ENTRY(__raw_readsl)
- teq r2, #0 @ do we have to check for the zero len?
- moveq pc, lr
- ands ip, r1, #3
- bne 2f
-
-1: ldr r3, [r0]
- str r3, [r1], #4
- subs r2, r2, #1
- bne 1b
- mov pc, lr
-
-2: cmp ip, #2
- ldr ip, [r0]
- blt 4f
- bgt 6f
-
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
-3: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #16
- strne ip, [r1], #4
- movne ip, r3, lsr #16
- bne 3b
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov pc, lr
-
-4: strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
-5: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #8
- strne ip, [r1], #4
- movne ip, r3, lsr #24
- bne 5b
- strb ip, [r1], #1
- mov pc, lr
-
-6: strb ip, [r1], #1
- mov ip, ip, lsr #8
-7: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #24
- strne ip, [r1], #4
- movne ip, r3, lsr #8
- bne 7b
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov pc, lr
-
+++ /dev/null
-/*
- * linux/arch/arm/lib/io-readsl-armv4.S
- *
- * Copyright (C) 1995-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-
-/*
- * Note that some reads can be aligned on half-word boundaries.
- */
-ENTRY(__raw_readsl)
- teq r2, #0 @ do we have to check for the zero len?
- moveq pc, lr
- ands ip, r1, #3
- bne 2f
-
- subs r2, r2, #4
- bmi 1001f
- stmfd sp!, {r4, lr}
-1000: ldr r3, [r0, #0]
- ldr r4, [r0, #0]
- ldr ip, [r0, #0]
- ldr lr, [r0, #0]
- subs r2, r2, #4
- stmia r1!, {r3, r4, ip, lr}
- bpl 1000b
- ldmfd sp!, {r4, lr}
-1001: tst r2, #2
- ldrne r3, [r0, #0]
- ldrne ip, [r0, #0]
- stmneia r1!, {r3, ip}
- tst r2, #1
- ldrne r3, [r0, #0]
- strne r3, [r1, #0]
- mov pc, lr
-
-2: cmp ip, #2
- ldr ip, [r0]
- blt 4f
- bgt 6f
-
-#ifndef __ARMEB__
-
- /* little endian code */
-
- strh ip, [r1], #2
- mov ip, ip, lsr #16
-3: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #16
- strne ip, [r1], #4
- movne ip, r3, lsr #16
- bne 3b
- strh ip, [r1], #2
- mov pc, lr
-
-4: strb ip, [r1], #1
- mov ip, ip, lsr #8
- strh ip, [r1], #2
- mov ip, ip, lsr #16
-5: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #8
- strne ip, [r1], #4
- movne ip, r3, lsr #24
- bne 5b
- strb ip, [r1], #1
- mov pc, lr
-
-6: strb ip, [r1], #1
- mov ip, ip, lsr #8
-7: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #24
- strne ip, [r1], #4
- movne ip, r3, lsr #8
- bne 7b
- strh ip, [r1], #2
- mov ip, ip, lsr #16
- strb ip, [r1]
- mov pc, lr
-
-#else
-
- /* big endian code */
-
-
- mov r3, ip, lsr #16
- strh r3, [r1], #2
-3: mov r3, ip, lsl #16
- subs r2, r2, #1
- ldrne ip, [r0]
- orrne r3, r3, ip, lsr #16
- strne r3, [r1], #4
- bne 3b
- strh ip, [r1], #2
- mov pc, lr
-
-4: mov r3, ip, lsr #24
- strb r3, [r1], #1
- mov r3, ip, lsr #8
- strh r3, [r1], #2
-5: mov r3, ip, lsl #24
- subs r2, r2, #1
- ldrne ip, [r0]
- orrne r3, r3, ip, lsr #8
- strne r3, [r1], #4
- bne 5b
- strb ip, [r1], #1
- mov pc, lr
-
-6: mov r3, ip, lsr #24
- strb r3, [r1], #1
-7: mov r3, ip, lsl #8
- subs r2, r2, #1
- ldrne ip, [r0]
- orrne r3, r3, ip, lsr #24
- strne r3, [r1], #4
- bne 7b
- mov r3, ip, lsr #8
- strh r3, [r1], #2
- strb ip, [r1], #1
- mov pc, lr
-
-#endif
-
-
+++ /dev/null
-#
-# Makefile for the linux kernel.
-#
-
-# Object file lists.
-
-obj-y := arch.o irq.o mm.o
-obj-m :=
-obj-n :=
-obj- :=
-
+++ /dev/null
-/*
- * linux/arch/arm/mach-adifcc/arch.c
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/major.h>
-#include <linux/fs.h>
-
-#include <asm/setup.h>
-#include <asm/memory.h>
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-extern void adifcc_map_io(void);
-extern void adifcc_init_irq(void);
-
-#ifdef CONFIG_ARCH_ADI_EVB
-MACHINE_START(ADI_EVB, "ADI 80200FCC Evaluation Board")
- MAINTAINER("MontaVista Software Inc.")
- BOOT_MEM(0xc0000000, 0x00400000, 0xff400000)
- MAPIO(adifcc_map_io)
- INITIRQ(adifcc_init_irq)
-MACHINE_END
-#endif
-
+++ /dev/null
-/*
- * linux/arch/arm/mach-xscale/irq.c
- *
- * Author: Deepak Saxena
- * Copyright: (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Based on IOP80310 code. Currently there's nothing more than the
- * 80200 on chip interrupts. That'll change once the hardware adds
- * support for PCI though.
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-
-#include <asm/mach/irq.h>
-#include <asm/irq.h>
-#include <asm/hardware.h>
-
-static void xs80200_irq_mask (unsigned int irq)
-{
- long INTCTL;
- asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (INTCTL));
- switch (irq) {
- case IRQ_XS80200_BCU: INTCTL &= ~(1<<3); break;
- case IRQ_XS80200_PMU: INTCTL &= ~(1<<2); break;
- case IRQ_XS80200_EXTIRQ: INTCTL &= ~(1<<1); break;
- case IRQ_XS80200_EXTFIQ: INTCTL &= ~(1<<0); break;
- }
- asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (INTCTL));
-}
-
-static void xs80200_irq_unmask (unsigned int irq)
-{
- long INTCTL;
- asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (INTCTL));
- switch (irq) {
- case IRQ_XS80200_BCU: INTCTL |= (1<<3); break;
- case IRQ_XS80200_PMU: INTCTL |= (1<<2); break;
- case IRQ_XS80200_EXTIRQ: INTCTL |= (1<<1); break;
- case IRQ_XS80200_EXTFIQ: INTCTL |= (1<<0); break;
- }
- asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (INTCTL));
-}
-
-void __init adifcc_init_irq(void)
-{
- int i;
-
- for (i = 0; i < NR_XS80200_IRQS; i++) {
- irq_desc[i].valid = 1;
- irq_desc[i].probe_ok = 0;
- irq_desc[i].mask_ack = xs80200_irq_mask;
- irq_desc[i].mask = xs80200_irq_mask;
- irq_desc[i].unmask = xs80200_irq_unmask;
- }
-}
-
-
+++ /dev/null
-/*
- * linux/arch/arm/mach-xscale/mm.c
- */
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-
-#include <asm/mach/map.h>
-
-
-static struct map_desc adifcc_io_desc[] __initdata = {
- /* on-board devices */
- { 0xff400000, 0x00400000, 0x00300000, MT_DEVICE }
-};
-
-void __init adifcc_map_io(void)
-{
- iotable_init(adifcc_io_desc, ARRAY_SIZE(adifcc_io_desc));
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-footbridge/arch.c
- *
- * Architecture specific fixups. This is where any
- * parameters in the params struct are fixed up, or
- * any additional architecture specific information
- * is pulled from the params struct.
- */
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/tty.h>
-#include <linux/delay.h>
-#include <linux/pm.h>
-#include <linux/init.h>
-
-#include <asm/hardware/dec21285.h>
-#include <asm/elf.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-
-extern void footbridge_map_io(void);
-extern void footbridge_init_irq(void);
-extern void footbridge_init_time(void);
-
-unsigned int mem_fclk_21285 = 50000000;
-
-EXPORT_SYMBOL(mem_fclk_21285);
-
-static int __init parse_tag_memclk(const struct tag *tag)
-{
- mem_fclk_21285 = tag->u.memclk.fmemclk;
- return 0;
-}
-
-__tagtable(ATAG_MEMCLK, parse_tag_memclk);
-
-#ifdef CONFIG_ARCH_EBSA285
-MACHINE_START(EBSA285, "EBSA285")
- MAINTAINER("Russell King")
- BOOT_MEM(0x00000000, DC21285_ARMCSR_BASE, 0xfe000000)
- BOOT_PARAMS(0x00000100)
- VIDEO(0x000a0000, 0x000bffff)
- MAPIO(footbridge_map_io)
- INITIRQ(footbridge_init_irq)
- INITTIME(footbridge_init_time)
-MACHINE_END
-#endif
-
-#ifdef CONFIG_ARCH_NETWINDER
-/*
- * Older NeTTroms either do not provide a parameters
- * page, or they don't supply correct information in
- * the parameter page.
- */
-static void __init
-fixup_netwinder(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
-{
-#ifdef CONFIG_ISAPNP
- extern int isapnp_disable;
-
- /*
- * We must not use the kernels ISAPnP code
- * on the NetWinder - it will reset the settings
- * for the WaveArtist chip and render it inoperable.
- */
- isapnp_disable = 1;
-#endif
-}
-
-MACHINE_START(NETWINDER, "Rebel-NetWinder")
- MAINTAINER("Russell King/Rebel.com")
- BOOT_MEM(0x00000000, DC21285_ARMCSR_BASE, 0xfe000000)
- BOOT_PARAMS(0x00000100)
- VIDEO(0x000a0000, 0x000bffff)
- DISABLE_PARPORT(0)
- DISABLE_PARPORT(2)
- FIXUP(fixup_netwinder)
- MAPIO(footbridge_map_io)
- INITIRQ(footbridge_init_irq)
- INITTIME(footbridge_init_time)
-MACHINE_END
-#endif
-
-#ifdef CONFIG_ARCH_CATS
-/*
- * CATS uses soft-reboot by default, since
- * hard reboots fail on early boards.
- */
-static void __init
-fixup_cats(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
-{
- ORIG_VIDEO_LINES = 25;
- ORIG_VIDEO_POINTS = 16;
- ORIG_Y = 24;
-}
-
-MACHINE_START(CATS, "Chalice-CATS")
- MAINTAINER("Philip Blundell")
- BOOT_MEM(0x00000000, DC21285_ARMCSR_BASE, 0xfe000000)
- BOOT_PARAMS(0x00000100)
- SOFT_REBOOT
- FIXUP(fixup_cats)
- MAPIO(footbridge_map_io)
- INITIRQ(footbridge_init_irq)
- INITTIME(footbridge_init_time)
-MACHINE_END
-#endif
-
-#ifdef CONFIG_ARCH_CO285
-
-static void __init
-fixup_coebsa285(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
-{
- extern unsigned long boot_memory_end;
- extern char boot_command_line[];
-
- mi->nr_banks = 1;
- mi->bank[0].start = PHYS_OFFSET;
- mi->bank[0].size = boot_memory_end;
- mi->bank[0].node = 0;
-
- *cmdline = boot_command_line;
-}
-
-MACHINE_START(CO285, "co-EBSA285")
- MAINTAINER("Mark van Doesburg")
- BOOT_MEM(0x00000000, DC21285_ARMCSR_BASE, 0x7cf00000)
- FIXUP(fixup_coebsa285)
- MAPIO(footbridge_map_io)
- INITIRQ(footbridge_init_irq)
- INITTIME(footbridge_init_time)
-MACHINE_END
-#endif
-
-#ifdef CONFIG_ARCH_PERSONAL_SERVER
-MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer")
- MAINTAINER("Jamey Hicks / George France")
- BOOT_MEM(0x00000000, DC21285_ARMCSR_BASE, 0xfe000000)
- BOOT_PARAMS(0x00000100)
- MAPIO(footbridge_map_io)
- INITIRQ(footbridge_init_irq)
- INITTIME(footbridge_init_time)
-MACHINE_END
-#endif
+++ /dev/null
-/*
- * linux/arch/arm/mach-footbridge/irq.c
- *
- * Copyright (C) 1996-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 22-Aug-1998 RMK Restructured IRQ routines
- * 03-Sep-1998 PJB Merged CATS support
- * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder
- * 26-Jan-1999 PJB Don't use IACK on CATS
- * 16-Mar-1999 RMK Added autodetect of ISA PICs
- */
-#include <linux/ioport.h>
-#include <linux/list.h>
-#include <linux/init.h>
-
-#include <asm/mach/irq.h>
-
-#include <asm/hardware.h>
-#include <asm/hardware/dec21285.h>
-#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/mach-types.h>
-
-extern void __init isa_init_irq(unsigned int irq);
-
-/*
- * Footbridge IRQ translation table
- * Converts from our IRQ numbers into FootBridge masks
- */
-static const int fb_irq_mask[] = {
- IRQ_MASK_UART_RX, /* 0 */
- IRQ_MASK_UART_TX, /* 1 */
- IRQ_MASK_TIMER1, /* 2 */
- IRQ_MASK_TIMER2, /* 3 */
- IRQ_MASK_TIMER3, /* 4 */
- IRQ_MASK_IN0, /* 5 */
- IRQ_MASK_IN1, /* 6 */
- IRQ_MASK_IN2, /* 7 */
- IRQ_MASK_IN3, /* 8 */
- IRQ_MASK_DOORBELLHOST, /* 9 */
- IRQ_MASK_DMA1, /* 10 */
- IRQ_MASK_DMA2, /* 11 */
- IRQ_MASK_PCI, /* 12 */
- IRQ_MASK_SDRAMPARITY, /* 13 */
- IRQ_MASK_I2OINPOST, /* 14 */
- IRQ_MASK_PCI_ABORT, /* 15 */
- IRQ_MASK_PCI_SERR, /* 16 */
- IRQ_MASK_DISCARD_TIMER, /* 17 */
- IRQ_MASK_PCI_DPERR, /* 18 */
- IRQ_MASK_PCI_PERR, /* 19 */
-};
-
-static void fb_mask_irq(unsigned int irq)
-{
- *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)];
-}
-
-static void fb_unmask_irq(unsigned int irq)
-{
- *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
-}
-
-static struct irqchip fb_chip = {
- .ack = fb_mask_irq,
- .mask = fb_mask_irq,
- .unmask = fb_unmask_irq,
-};
-
-static void __init __fb_init_irq(void)
-{
- unsigned int irq;
-
- /*
- * setup DC21285 IRQs
- */
- *CSR_IRQ_DISABLE = -1;
- *CSR_FIQ_DISABLE = -1;
-
- for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
- set_irq_chip(irq, &fb_chip);
- set_irq_handler(irq, do_level_IRQ);
- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
- }
-}
-
-void __init footbridge_init_irq(void)
-{
- __fb_init_irq();
-
- if (!footbridge_cfn_mode())
- return;
-
- if (machine_is_ebsa285())
- /* The following is dependent on which slot
- * you plug the Southbridge card into. We
- * currently assume that you plug it into
- * the right-hand most slot.
- */
- isa_init_irq(IRQ_PCI);
-
- if (machine_is_cats())
- isa_init_irq(IRQ_IN2);
-
- if (machine_is_netwinder())
- isa_init_irq(IRQ_IN3);
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-footbridge/mm.c
- *
- * Copyright (C) 1998-2000 Russell King, Dave Gilbert.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Extra MM routines for the EBSA285 architecture
- */
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/io.h>
-#include <asm/hardware/dec21285.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/map.h>
-
-/*
- * Common mapping for all systems. Note that the outbound write flush is
- * commented out since there is a "No Fix" problem with it. Not mapping
- * it means that we have extra bullet protection on our feet.
- */
-static struct map_desc fb_common_io_desc[] __initdata = {
- { ARMCSR_BASE, DC21285_ARMCSR_BASE, ARMCSR_SIZE, MT_DEVICE },
- { XBUS_BASE, 0x40000000, XBUS_SIZE, MT_DEVICE }
-};
-
-/*
- * The mapping when the footbridge is in host mode. We don't map any of
- * this when we are in add-in mode.
- */
-static struct map_desc ebsa285_host_io_desc[] __initdata = {
-#if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
- { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE },
- { PCICFG0_BASE, DC21285_PCI_TYPE_0_CONFIG, PCICFG0_SIZE, MT_DEVICE },
- { PCICFG1_BASE, DC21285_PCI_TYPE_1_CONFIG, PCICFG1_SIZE, MT_DEVICE },
- { PCIIACK_BASE, DC21285_PCI_IACK, PCIIACK_SIZE, MT_DEVICE },
- { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE }
-#endif
-};
-
-/*
- * The CO-ebsa285 mapping.
- */
-static struct map_desc co285_io_desc[] __initdata = {
-#ifdef CONFIG_ARCH_CO285
- { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE },
- { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE }
-#endif
-};
-
-void __init footbridge_map_io(void)
-{
- /*
- * Set up the common mapping first; we need this to
- * determine whether we're in host mode or not.
- */
- iotable_init(fb_common_io_desc, ARRAY_SIZE(fb_common_io_desc));
-
- /*
- * Now, work out what we've got to map in addition on this
- * platform.
- */
- if (machine_is_co285())
- iotable_init(co285_io_desc, ARRAY_SIZE(co285_io_desc));
- if (footbridge_cfn_mode())
- iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
-}
-
-#ifdef CONFIG_FOOTBRIDGE_ADDIN
-
-/*
- * These two functions convert virtual addresses to PCI addresses and PCI
- * addresses to virtual addresses. Note that it is only legal to use these
- * on memory obtained via get_zeroed_page or kmalloc.
- */
-unsigned long __virt_to_bus(unsigned long res)
-{
- WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
-
- return (res - PAGE_OFFSET) + (*CSR_PCISDRAMBASE & 0xfffffff0);
-}
-EXPORT_SYMBOL(__virt_to_bus);
-
-unsigned long __bus_to_virt(unsigned long res)
-{
- res -= (*CSR_PCISDRAMBASE & 0xfffffff0);
- res += PAGE_OFFSET;
-
- WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
-
- return res;
-}
-EXPORT_SYMBOL(__bus_to_virt);
-
-#endif
+++ /dev/null
-#
-# Makefile for the linux kernel.
-#
-
-# Object file lists.
-
-obj-y := core.o
-obj-m :=
-obj-n :=
-obj- :=
-
-obj-$(CONFIG_PCI) += pci.o
-obj-$(CONFIG_LEDS) += leds.o
+++ /dev/null
-/*
- * linux/arch/arm/mach-ftvpci/core.c
- *
- * Architecture specific fixups.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-
-extern unsigned long soft_irq_mask;
-
-static const unsigned char irq_cmd[] =
-{
- INTCONT_IRQ_DUART,
- INTCONT_IRQ_PLX,
- INTCONT_IRQ_D,
- INTCONT_IRQ_C,
- INTCONT_IRQ_B,
- INTCONT_IRQ_A,
- INTCONT_IRQ_SYSERR
-};
-
-static void ftvpci_mask_irq(unsigned int irq)
-{
- __raw_writel(irq_cmd[irq], INTCONT_BASE);
- soft_irq_mask &= ~(1<<irq);
-}
-
-static void ftvpci_unmask_irq(unsigned int irq)
-{
- soft_irq_mask |= (1<<irq);
- __raw_writel(irq_cmd[irq] | 1, INTCONT_BASE);
-}
-
-static void __init ftvpci_init_irq(void)
-{
- unsigned int i;
-
- /* Mask all FIQs */
- __raw_writel(INTCONT_FIQ_PLX, INTCONT_BASE);
- __raw_writel(INTCONT_FIQ_D, INTCONT_BASE);
- __raw_writel(INTCONT_FIQ_C, INTCONT_BASE);
- __raw_writel(INTCONT_FIQ_B, INTCONT_BASE);
- __raw_writel(INTCONT_FIQ_A, INTCONT_BASE);
- __raw_writel(INTCONT_FIQ_SYSERR, INTCONT_BASE);
-
- /* Disable all interrupts initially. */
- for (i = 0; i < NR_IRQS; i++) {
- if (i >= FIRST_IRQ && i <= LAST_IRQ) {
- irq_desc[i].valid = 1;
- irq_desc[i].probe_ok = 1;
- irq_desc[i].mask_ack = ftvpci_mask_irq;
- irq_desc[i].mask = ftvpci_mask_irq;
- irq_desc[i].unmask = ftvpci_unmask_irq;
- ftvpci_mask_irq(i);
- } else {
- irq_desc[i].valid = 0;
- irq_desc[i].probe_ok = 0;
- }
- }
-}
-
-static struct map_desc ftvpci_io_desc[] __initdata = {
- { INTCONT_BASE, INTCONT_START, 0x00001000, MT_DEVICE },
- { PLX_BASE, PLX_START, 0x00001000, MT_DEVICE },
- { PCIO_BASE, PLX_IO_START, 0x00100000, MT_DEVICE },
- { DUART_BASE, DUART_START, 0x00001000, MT_DEVICE },
- { STATUS_BASE, STATUS_START, 0x00001000, MT_DEVICE }
-};
-
-static void __init ftvpci_map_io(void)
-{
- iotable_init(ftvpci_io_desc, ARRAY_SIZE(ftvpci_io_desc));
-}
-
-MACHINE_START(NEXUSPCI, "FTV/PCI")
- MAINTAINER("Philip Blundell")
- BOOT_MEM(0x40000000, 0x10000000, 0xe0000000)
- MAPIO(ftvpci_map_io)
- INITIRQ(ftvpci_init_irq)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/kernel/leds-ftvpci.c
- *
- * Copyright (C) 1999 FutureTV Labs Ltd
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/leds.h>
-#include <asm/system.h>
-#include <asm/io.h>
-
-static void ftvpci_leds_event(led_event_t ledevt)
-{
- static int led_state = 0;
-
- switch(ledevt) {
- case led_timer:
- led_state ^= 1;
- raw_writeb(0x1a | led_state, INTCONT_BASE);
- break;
-
- default:
- break;
- }
-}
-
-static int __init ftvpci_leds_init(void)
-{
- leds_event = ftvpci_leds_event;
- return 0;
-}
-
-arch_initcall(ftvpci_leds_init);
+++ /dev/null
-/*
- * linux/arch/arm/kernel/ftv-pci.c
- *
- * PCI bios-type initialisation for PCI machines
- *
- * Bits taken from various places.
- */
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-
-#include <asm/irq.h>
-#include <asm/mach/pci.h>
-#include <asm/mach-types.h>
-
-/*
- * Owing to a PCB cockup, issue A backplanes are wired thus:
- *
- * Slot 1 2 3 4 5 Bridge S1 S2 S3 S4
- * IRQ D C B A A C B A D
- * A D C B B D C B A
- * B A D C C A D C B
- * C B A D D B A D C
- *
- * ID A31 A30 A29 A28 A27 A26 DEV4 DEV5 DEV6 DEV7
- *
- * Actually, this isn't too bad, because with the processor card
- * in slot 5 on the primary bus, the IRQs rotate on both sides
- * as you'd expect.
- */
-
-static int irqmap_ftv[] __initdata = { IRQ_PCI_D, IRQ_PCI_C, IRQ_PCI_B, IRQ_PCI_A };
-
-static int __init ftv_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- if (slot > 0x10)
- slot--;
- return irqmap_ftv[(slot - pin) & 3];
-}
-
-static u8 __init ftv_swizzle(struct pci_dev *dev, u8 *pin)
-{
- return PCI_SLOT(dev->devfn);
-}
-
-/* ftv host-specific stuff */
-static struct hw_pci ftv_pci __initdata = {
- .init = plx90x0_init,
- .swizzle = ftv_swizzle,
- .map_irq = ftv_map_irq,
-};
-
-static int __init ftv_pci_init(void)
-{
- if (machine_is_ftvpci())
- pci_common_init(&ftv_pci);
- return 0;
-}
-
-subsys_initcall(ftv_pci_init);
+++ /dev/null
-/*
- * linux/arch/arm/mach-iop3xx/arch.c
- *
- * Author: Nicolas Pitre <nico@cam.org>
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/major.h>
-#include <linux/fs.h>
-
-#include <asm/setup.h>
-#include <asm/system.h>
-#include <asm/memory.h>
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#ifdef CONFIG_ARCH_IQ80331
-extern void iq80331_map_io(void);
-extern void iop331_init_irq(void);
-extern void iop331_init_time(void);
-#endif
-
-#ifdef CONFIG_ARCH_IQ80331
-static void __init
-fixup_iop331(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
-{
-}
-#endif
-
-#if defined(CONFIG_ARCH_IQ80331)
-MACHINE_START(IQ80331, "Intel IQ80331")
- MAINTAINER("Intel Corp.")
- BOOT_MEM(PHYS_OFFSET, 0xfff01000, 0xfffff000) // virtual, physical
-// BOOT_MEM(PHYS_OFFSET, IQ80331_UART0_VIRT, IQ80331_UART0_PHYS)
- MAPIO(iq80331_map_io)
- INITIRQ(iop331_init_irq)
- INITTIME(iop331_init_time)
- BOOT_PARAMS(0x0100)
-MACHINE_END
-#else
-#error No machine descriptor defined for this IOP3xx implementation
-#endif
+++ /dev/null
-/*
- * linux/arch/arm/mach-iop3xx/iop310-irq.c
- *
- * Generic IOP310 IRQ handling functionality
- *
- * Author: Nicolas Pitre
- * Copyright: (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Added IOP310 chipset and IQ80310 board demuxing, masking code. - DS
- *
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-
-#include <asm/mach/irq.h>
-#include <asm/irq.h>
-#include <asm/hardware.h>
-
-extern void xs80200_irq_mask(unsigned int);
-extern void xs80200_irq_unmask(unsigned int);
-extern void xs80200_init_irq(void);
-
-extern void do_IRQ(int, struct pt_regs *);
-
-static u32 iop310_mask /* = 0 */;
-
-static void iop310_irq_mask (unsigned int irq)
-{
- iop310_mask ++;
-
- /*
- * No mask bits on the 80312, so we have to
- * mask everything from the outside!
- */
- if (iop310_mask == 1) {
- disable_irq(IRQ_XS80200_EXTIRQ);
- irq_desc[IRQ_XS80200_EXTIRQ].chip->mask(IRQ_XS80200_EXTIRQ);
- }
-}
-
-static void iop310_irq_unmask (unsigned int irq)
-{
- if (iop310_mask)
- iop310_mask --;
-
- /*
- * Check if all 80312 sources are unmasked now
- */
- if (iop310_mask == 0)
- enable_irq(IRQ_XS80200_EXTIRQ);
-}
-
-struct irqchip ext_chip = {
- .ack = iop310_irq_mask,
- .mask = iop310_irq_mask,
- .unmask = iop310_irq_unmask,
-};
-
-void
-iop310_irq_demux(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
-{
- u32 fiq1isr = *((volatile u32*)IOP310_FIQ1ISR);
- u32 fiq2isr = *((volatile u32*)IOP310_FIQ2ISR);
- struct irqdesc *d;
- unsigned int irqno = 0;
-
- if(fiq1isr)
- {
- if(fiq1isr & 0x1)
- irqno = IRQ_IOP310_DMA0;
- if(fiq1isr & 0x2)
- irqno = IRQ_IOP310_DMA1;
- if(fiq1isr & 0x4)
- irqno = IRQ_IOP310_DMA2;
- if(fiq1isr & 0x10)
- irqno = IRQ_IOP310_PMON;
- if(fiq1isr & 0x20)
- irqno = IRQ_IOP310_AAU;
- }
- else
- {
- if(fiq2isr & 0x2)
- irqno = IRQ_IOP310_I2C;
- if(fiq2isr & 0x4)
- irqno = IRQ_IOP310_MU;
- }
-
- if (irqno) {
- d = irq_desc + irqno;
- d->handle(irqno, d, regs);
- }
-}
-
-void __init iop310_init_irq(void)
-{
- unsigned int i;
-
- for(i = IOP310_IRQ_OFS; i < NR_IOP310_IRQS; i++)
- {
- set_irq_chip(i, &ext_chip);
- set_irq_handler(i, do_level_IRQ);
- set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
- }
-
- xs80200_init_irq();
-}
+++ /dev/null
-/*
- * arch/arm/mach-iop3xx/iop310-pci.c
- *
- * PCI support for the Intel IOP310 chipset
- *
- * Matt Porter <mporter@mvista.com>
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/system.h>
-#include <asm/hardware.h>
-#include <asm/mach/pci.h>
-
-#include <asm/arch/iop310.h>
-
-/*
- * *** Special note - why the IOP310 should NOT be used ***
- *
- * The PCI ATU is a brain dead implementation, only allowing 32-bit
- * accesses to PCI configuration space. This is especially brain
- * dead for writes to this space. A simple for-instance:
- *
- * You want to modify the command register *without* corrupting the
- * status register.
- *
- * To perform this, you need to read *32* bits of data from offset 4,
- * mask off the low 16, replace them with the new data, and write *32*
- * bits back.
- *
- * Writing the status register at offset 6 with status bits set *clears*
- * the status.
- *
- * Hello? Could we have a *SANE* implementation of a PCI ATU some day
- * *PLEASE*?
- */
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...) do { } while (0)
-#endif
-
-/*
- * Calculate the address, etc from the bus, devfn and register
- * offset. Note that we have two root buses, so we need some
- * method to determine whether we need config type 0 or 1 cycles.
- * We use a root bus number in our bus->sysdata structure for this.
- */
-static u32 iop310_cfg_address(struct pci_bus *bus, int devfn, int where)
-{
- struct pci_sys_data *sys = bus->sysdata;
- u32 addr;
-
- if (sys->busnr == bus->number)
- addr = 1 << (PCI_SLOT(devfn) + 16);
- else
- addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1;
-
- addr |= PCI_FUNC(devfn) << 8 | (where & ~3);
-
- return addr;
-}
-
-/*
- * Primary PCI interface support.
- */
-static int iop310_pri_pci_status(void)
-{
- unsigned int status;
- int ret = 0;
-
- status = *IOP310_PATUSR;
- if (status & 0xf900) {
- *IOP310_PATUSR = status & 0xf900;
- ret = 1;
- }
- status = *IOP310_PATUISR;
- if (status & 0x0000018f) {
- *IOP310_PATUISR = status & 0x0000018f;
- ret = 1;
- }
- status = *IOP310_PSR;
- if (status & 0xf900) {
- *IOP310_PSR = status & 0xf900;
- ret = 1;
- }
- status = *IOP310_PBISR;
- if (status & 0x003f) {
- *IOP310_PBISR = status & 0x003f;
- ret = 1;
- }
- return ret;
-}
-
-/*
- * Simply write the address register and read the configuration
- * data. Note that the 4 nop's ensure that we are able to handle
- * a delayed abort (in theory.)
- */
-static inline u32 iop310_pri_read(unsigned long addr)
-{
- u32 val;
-
- __asm__ __volatile__(
- "str %1, [%2]\n\t"
- "ldr %0, [%3]\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- : "=r" (val)
- : "r" (addr), "r" (IOP310_POCCAR), "r" (IOP310_POCCDR));
-
- return val;
-}
-
-static int
-iop310_pri_read_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 *value)
-{
- unsigned long addr = iop310_cfg_address(bus, devfn, where);
- u32 val = iop310_pri_read(addr) >> ((where & 3) * 8);
-
- if (iop310_pri_pci_status())
- val = 0xffffffff;
-
- *value = val;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int
-iop310_pri_write_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 value)
-{
- unsigned long addr = iop310_cfg_address(bus, devfn, where);
- u32 val;
-
- if (size != 4) {
- val = iop310_pri_read(addr);
- if (!iop310_pri_pci_status() == 0)
- return PCIBIOS_SUCCESSFUL;
-
- where = (where & 3) * 8;
-
- if (size == 1)
- val &= ~(0xff << where);
- else
- val &= ~(0xffff << where);
-
- *IOP310_POCCDR = val | value << where;
- } else {
- asm volatile(
- "str %1, [%2]\n\t"
- "str %0, [%3]\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- :
- : "r" (value), "r" (addr),
- "r" (IOP310_POCCAR), "r" (IOP310_POCCDR));
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops iop310_primary_ops = {
- .read = iop310_pri_read_config,
- .write = iop310_pri_write_config,
-};
-
-/*
- * Secondary PCI interface support.
- */
-static int iop310_sec_pci_status(void)
-{
- unsigned int usr, uisr;
- int ret = 0;
-
- usr = *IOP310_SATUSR;
- uisr = *IOP310_SATUISR;
- if (usr & 0xf900) {
- *IOP310_SATUSR = usr & 0xf900;
- ret = 1;
- }
- if (uisr & 0x0000069f) {
- *IOP310_SATUISR = uisr & 0x0000069f;
- ret = 1;
- }
- if (ret)
- DBG("ERROR (%08x %08x)", usr, uisr);
- return ret;
-}
-
-/*
- * Simply write the address register and read the configuration
- * data. Note that the 4 nop's ensure that we are able to handle
- * a delayed abort (in theory.)
- */
-static inline u32 iop310_sec_read(unsigned long addr)
-{
- u32 val;
-
- __asm__ __volatile__(
- "str %1, [%2]\n\t"
- "ldr %0, [%3]\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- : "=r" (val)
- : "r" (addr), "r" (IOP310_SOCCAR), "r" (IOP310_SOCCDR));
-
- return val;
-}
-
-static int
-iop310_sec_read_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 *value)
-{
- unsigned long addr = iop310_cfg_address(bus, devfn, where);
- u32 val = iop310_sec_read(addr) >> ((where & 3) * 8);
-
- if (iop310_sec_pci_status())
- val = 0xffffffff;
-
- *value = val;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int
-iop310_sec_write_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 value)
-{
- unsigned long addr = iop310_cfg_address(bus, devfn, where);
- u32 val;
-
- if (size != 4) {
- val = iop310_sec_read(addr);
-
- if (!iop310_sec_pci_status() == 0)
- return PCIBIOS_SUCCESSFUL;
-
- where = (where & 3) * 8;
-
- if (size == 1)
- val &= ~(0xff << where);
- else
- val &= ~(0xffff << where);
-
- *IOP310_SOCCDR = val | value << where;
- } else {
- asm volatile(
- "str %1, [%2]\n\t"
- "str %0, [%3]\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- :
- : "r" (value), "r" (addr),
- "r" (IOP310_SOCCAR), "r" (IOP310_SOCCDR));
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops iop310_secondary_ops = {
- .read = iop310_sec_read_config,
- .write = iop310_sec_write_config,
-};
-
-/*
- * When a PCI device does not exist during config cycles, the 80200 gets
- * an external abort instead of returning 0xffffffff. If it was an
- * imprecise abort, we need to correct the return address to point after
- * the instruction. Also note that the Xscale manual says:
- *
- * "if a stall-until-complete LD or ST instruction triggers an
- * imprecise fault, then that fault will be seen by the program
- * within 3 instructions."
- *
- * This does not appear to be the case. With 8 NOPs after the load, we
- * see the imprecise abort occurring on the STM of iop310_sec_pci_status()
- * which is about 10 instructions away.
- *
- * Always trust reality!
- */
-static int
-iop310_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
-{
- DBG("PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx\n",
- addr, fsr, regs->ARM_pc, regs->ARM_lr);
-
- /*
- * If it was an imprecise abort, then we need to correct the
- * return address to be _after_ the instruction.
- */
- if (fsr & (1 << 10))
- regs->ARM_pc += 4;
-
- return 0;
-}
-
-/*
- * Scan an IOP310 PCI bus. sys->bus defines which bus we scan.
- */
-struct pci_bus *iop310_scan_bus(int nr, struct pci_sys_data *sys)
-{
- struct pci_ops *ops;
-
- if (nr)
- ops = &iop310_secondary_ops;
- else
- ops = &iop310_primary_ops;
-
- return pci_scan_bus(sys->busnr, ops, sys);
-}
-
-/*
- * Setup the system data for controller 'nr'. Return 0 if none found,
- * 1 if found, or negative error.
- *
- * We can alter:
- * io_offset - offset between IO resources and PCI bus BARs
- * mem_offset - offset between mem resources and PCI bus BARs
- * resource[0] - parent IO resource
- * resource[1] - parent non-prefetchable memory resource
- * resource[2] - parent prefetchable memory resource
- * swizzle - bridge swizzling function
- * map_irq - irq mapping function
- *
- * Note that 'io_offset' and 'mem_offset' are left as zero since
- * the IOP310 doesn't attempt to perform any address translation
- * on accesses from the host to the bus.
- */
-int iop310_setup(int nr, struct pci_sys_data *sys)
-{
- struct resource *res;
-
- if (nr >= 2)
- return 0;
-
- res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL);
- if (!res)
- panic("PCI: unable to alloc resources");
-
- memset(res, 0, sizeof(struct resource) * 2);
-
- switch (nr) {
- case 0:
- res[0].start = IOP310_PCIPRI_LOWER_IO + 0x6e000000;
- res[0].end = IOP310_PCIPRI_LOWER_IO + 0x6e00ffff;
- res[0].name = "PCI IO Primary";
- res[0].flags = IORESOURCE_IO;
-
- res[1].start = IOP310_PCIPRI_LOWER_MEM;
- res[1].end = IOP310_PCIPRI_LOWER_MEM + IOP310_PCI_WINDOW_SIZE;
- res[1].name = "PCI Memory Primary";
- res[1].flags = IORESOURCE_MEM;
- break;
-
- case 1:
- res[0].start = IOP310_PCISEC_LOWER_IO + 0x6e000000;
- res[0].end = IOP310_PCISEC_LOWER_IO + 0x6e00ffff;
- res[0].name = "PCI IO Secondary";
- res[0].flags = IORESOURCE_IO;
-
- res[1].start = IOP310_PCISEC_LOWER_MEM;
- res[1].end = IOP310_PCISEC_LOWER_MEM + IOP310_PCI_WINDOW_SIZE;
- res[1].name = "PCI Memory Secondary";
- res[1].flags = IORESOURCE_MEM;
- break;
- }
-
- request_resource(&ioport_resource, &res[0]);
- request_resource(&iomem_resource, &res[1]);
-
- sys->resource[0] = &res[0];
- sys->resource[1] = &res[1];
- sys->resource[2] = NULL;
- sys->io_offset = 0x6e000000;
-
- return 1;
-}
-
-void iop310_init(void)
-{
- DBG("PCI: Intel 80312 PCI-to-PCI init code.\n");
- DBG(" ATU secondary: ATUCR =0x%08x\n", *IOP310_ATUCR);
- DBG(" ATU secondary: SOMWVR=0x%08x SOIOWVR=0x%08x\n",
- *IOP310_SOMWVR, *IOP310_SOIOWVR);
- DBG(" ATU secondary: SIABAR=0x%08x SIALR =0x%08x SIATVR=%08x\n",
- *IOP310_SIABAR, *IOP310_SIALR, *IOP310_SIATVR);
- DBG(" ATU primary: POMWVR=0x%08x POIOWVR=0x%08x\n",
- *IOP310_POMWVR, *IOP310_POIOWVR);
- DBG(" ATU primary: PIABAR=0x%08x PIALR =0x%08x PIATVR=%08x\n",
- *IOP310_PIABAR, *IOP310_PIALR, *IOP310_PIATVR);
- DBG(" P2P: PCR=0x%04x BCR=0x%04x EBCR=0x%04x\n",
- *IOP310_PCR, *IOP310_BCR, *IOP310_EBCR);
-
- /*
- * Windows have to be carefully opened via a nice set of calls
- * here or just some direct register fiddling in the board
- * specific init when we want transactions to occur between the
- * two PCI hoses.
- *
- * To do this, we will have manage RETRY assertion between the
- * firmware and the kernel. This will ensure that the host
- * system's enumeration code is held off until we have tweaked
- * the interrupt routing and public/private IDSELs.
- *
- * For now we will simply default to disabling the integrated type
- * 81 P2P bridge.
- */
- *IOP310_PCR &= 0xfff8;
-
- hook_fault_code(16+6, iop310_pci_abort, SIGBUS, "imprecise external abort");
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-iop3xx/mm.c
- *
- * Low level memory initialization for IOP321 based systems
- *
- * Author: Rory Bolt <rorybolt@pacbell.net>
- * Copyright (C) 2002 Rory Bolt
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-
-#include <asm/mach/map.h>
-#include <asm/mach-types.h>
-
-
-/*
- * Standard IO mapping for all IOP321 based systems
- */
-static struct map_desc iop321_std_desc[] __initdata = {
- /* virtual physical length type */
-
- /* mem mapped registers */
- { IOP321_VIRT_MEM_BASE, IOP321_PHY_MEM_BASE, 0x00002000, MT_DEVICE },
-
- /* PCI IO space */
- { 0xfe000000, 0x90000000, 0x00020000, MT_DEVICE }
-};
-
-void __init iop321_map_io(void)
-{
- iotable_init(iop321_std_desc, ARRAY_SIZE(iop321_std_desc));
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-iop3xx/mm.c
- *
- * Low level memory initialization for IOP331 based systems
- *
- * Author: Dave Jiang <dave.jiang@intel.com>
- * Copyright (C) 2003 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-
-#include <asm/mach/map.h>
-#include <asm/mach-types.h>
-
-
-/*
- * Standard IO mapping for all IOP331 based systems
- */
-static struct map_desc iop331_std_desc[] __initdata = {
- /* virtual physical length type */
-
- /* mem mapped registers */
- { IOP331_VIRT_MEM_BASE, IOP331_PHYS_MEM_BASE, 0x00002000, MT_DEVICE },
-
- /* PCI IO space */
- { 0xfe000000, 0x90000000, 0x00020000, MT_DEVICE }
-};
-
-void __init iop331_map_io(void)
-{
- iotable_init(iop331_std_desc, ARRAY_SIZE(iop331_std_desc));
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-iop3xx/iq80310-irq.c
- *
- * IRQ hadling/demuxing for IQ80310 board
- *
- * Author: Nicolas Pitre
- * Copyright: (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * 2.4.7-rmk1-iop310.1
- * Moved demux from asm to C - DS
- * Fixes for various revision boards - DS
- */
-#include <linux/init.h>
-#include <linux/list.h>
-
-#include <asm/irq.h>
-#include <asm/mach/irq.h>
-#include <asm/hardware.h>
-#include <asm/system.h>
-
-extern void iop310_init_irq(void);
-extern void iop310_irq_demux(unsigned int, struct irqdesc *, struct pt_regs *);
-
-static void iq80310_irq_mask(unsigned int irq)
-{
- *(volatile char *)IQ80310_INT_MASK |= (1 << (irq - IQ80310_IRQ_OFS));
-}
-
-static void iq80310_irq_unmask(unsigned int irq)
-{
- *(volatile char *)IQ80310_INT_MASK &= ~(1 << (irq - IQ80310_IRQ_OFS));
-}
-
-static struct irqchip iq80310_irq_chip = {
- .ack = iq80310_irq_mask,
- .mask = iq80310_irq_mask,
- .unmask = iq80310_irq_unmask,
-};
-
-extern struct irqchip ext_chip;
-
-static void
-iq80310_cpld_irq_handler(unsigned int irq, struct irqdesc *desc,
- struct pt_regs *regs)
-{
- unsigned int irq_stat = *(volatile u8*)IQ80310_INT_STAT;
- unsigned int irq_mask = *(volatile u8*)IQ80310_INT_MASK;
- unsigned int i, handled = 0;
- struct irqdesc *d;
-
- desc->chip->ack(irq);
-
- /*
- * Mask out the interrupts which aren't enabled.
- */
- irq_stat &= 0x1f & ~irq_mask;
-
- /*
- * Test each IQ80310 CPLD interrupt
- */
- for (i = IRQ_IQ80310_TIMER, d = irq_desc + IRQ_IQ80310_TIMER;
- irq_stat; i++, d++, irq_stat >>= 1)
- if (irq_stat & 1) {
- d->handle(i, d, regs);
- handled++;
- }
-
- /*
- * If running on a board later than REV D.1, we can
- * decode the PCI interrupt status.
- */
- if (system_rev) {
- irq_stat = *((volatile u8*)IQ80310_PCI_INT_STAT) & 7;
-
- for (i = IRQ_IQ80310_INTA, d = irq_desc + IRQ_IQ80310_INTA;
- irq_stat; i++, d++, irq_stat >>= 1)
- if (irq_stat & 0x1) {
- d->handle(i, d, regs);
- handled++;
- }
- }
-
- /*
- * If on a REV D.1 or lower board, we just assumed INTA
- * since PCI is not routed, and it may actually be an
- * on-chip interrupt.
- *
- * Note that we're giving on-chip interrupts slightly
- * higher priority than PCI by handling them first.
- *
- * On boards later than REV D.1, if we didn't read a
- * CPLD interrupt, we assume it's from a device on the
- * chipset itself.
- */
- if (system_rev == 0 || handled == 0)
- iop310_irq_demux(irq, desc, regs);
-
- desc->chip->unmask(irq);
-}
-
-void __init iq80310_init_irq(void)
-{
- volatile char *mask = (volatile char *)IQ80310_INT_MASK;
- unsigned int i;
-
- iop310_init_irq();
-
- /*
- * Setup PIRSR to route PCI interrupts into xs80200
- */
- *IOP310_PIRSR = 0xff;
-
- /*
- * Setup the IRQs in the FE820000/FE860000 registers
- */
- for (i = IQ80310_IRQ_OFS; i <= IRQ_IQ80310_INTD; i++) {
- set_irq_chip(i, &iq80310_irq_chip);
- set_irq_handler(i, do_level_IRQ);
- set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
- }
-
- /*
- * Setup the PCI IRQs
- */
- for (i = IRQ_IQ80310_INTA; i < IRQ_IQ80310_INTC; i++) {
- set_irq_chip(i, &ext_chip);
- set_irq_handler(i, do_level_IRQ);
- set_irq_flags(i, IRQF_VALID);
- }
-
- *mask = 0xff; /* mask all sources */
-
- set_irq_chained_handler(IRQ_XS80200_EXTIRQ,
- &iq80310_cpld_irq_handler);
-}
+++ /dev/null
-/*
- * arch/arm/mach-iop3xx/iq80310-pci.c
- *
- * PCI support for the Intel IQ80310 reference board
- *
- * Matt Porter <mporter@mvista.com>
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/irq.h>
-#include <asm/mach/pci.h>
-#include <asm/mach-types.h>
-
-/*
- * The following macro is used to lookup irqs in a standard table
- * format for those systems that do not already have PCI
- * interrupts properly routed. We assume 1 <= pin <= 4
- */
-#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
-({ int _ctl_ = -1; \
- unsigned int _idsel = idsel - minid; \
- if (_idsel <= maxid) \
- _ctl_ = pci_irq_table[_idsel][pin-1]; \
- _ctl_; })
-
-#define INTA IRQ_IQ80310_INTA
-#define INTB IRQ_IQ80310_INTB
-#define INTC IRQ_IQ80310_INTC
-#define INTD IRQ_IQ80310_INTD
-
-#define INTE IRQ_IQ80310_I82559
-
-typedef u8 irq_table[4];
-
-/*
- * IRQ tables for primary bus.
- *
- * On a Rev D.1 and older board, INT A-C are not routed, so we
- * just fake it as INTA and than we take care of handling it
- * correctly in the IRQ demux routine.
- */
-static irq_table pci_pri_d_irq_table[] = {
-/* Pin: A B C D */
- { INTA, INTD, INTA, INTA }, /* PCI Slot J3 */
- { INTD, INTA, INTA, INTA }, /* PCI Slot J4 */
-};
-
-static irq_table pci_pri_f_irq_table[] = {
-/* Pin: A B C D */
- { INTC, INTD, INTA, INTB }, /* PCI Slot J3 */
- { INTD, INTA, INTB, INTC }, /* PCI Slot J4 */
-};
-
-static int __init
-iq80310_pri_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
-{
- irq_table *pci_irq_table;
-
- BUG_ON(pin < 1 || pin > 4);
-
- if (!system_rev) {
- pci_irq_table = pci_pri_d_irq_table;
- } else {
- pci_irq_table = pci_pri_f_irq_table;
- }
-
- return PCI_IRQ_TABLE_LOOKUP(2, 3);
-}
-
-/*
- * IRQ tables for secondary bus.
- *
- * On a Rev D.1 and older board, INT A-C are not routed, so we
- * just fake it as INTA and than we take care of handling it
- * correctly in the IRQ demux routine.
- */
-static irq_table pci_sec_d_irq_table[] = {
-/* Pin: A B C D */
- { INTA, INTA, INTA, INTD }, /* PCI Slot J1 */
- { INTA, INTA, INTD, INTA }, /* PCI Slot J5 */
- { INTE, INTE, INTE, INTE }, /* P2P Bridge */
-};
-
-static irq_table pci_sec_f_irq_table[] = {
-/* Pin: A B C D */
- { INTA, INTB, INTC, INTD }, /* PCI Slot J1 */
- { INTB, INTC, INTD, INTA }, /* PCI Slot J5 */
- { INTE, INTE, INTE, INTE }, /* P2P Bridge */
-};
-
-static int __init
-iq80310_sec_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
-{
- irq_table *pci_irq_table;
-
- BUG_ON(pin < 1 || pin > 4);
-
- if (!system_rev) {
- pci_irq_table = pci_sec_d_irq_table;
- } else {
- pci_irq_table = pci_sec_f_irq_table;
- }
-
- return PCI_IRQ_TABLE_LOOKUP(0, 2);
-}
-
-static int iq80310_pri_host;
-
-static int iq80310_setup(int nr, struct pci_sys_data *sys)
-{
- switch (nr) {
- case 0:
- if (!iq80310_pri_host)
- return 0;
-
- sys->map_irq = iq80310_pri_map_irq;
- break;
-
- case 1:
- sys->map_irq = iq80310_sec_map_irq;
- break;
-
- default:
- return 0;
- }
-
- return iop310_setup(nr, sys);
-}
-
-static void iq80310_preinit(void)
-{
- iq80310_pri_host = *(volatile u32 *)IQ80310_BACKPLANE & 1;
-
- printk(KERN_INFO "PCI: IQ80310 is a%s\n",
- iq80310_pri_host ? " system controller" : "n agent");
-
- iop310_init();
-}
-
-static struct hw_pci iq80310_pci __initdata = {
- .swizzle = pci_std_swizzle,
- .nr_controllers = 2,
- .setup = iq80310_setup,
- .scan = iop310_scan_bus,
- .preinit = iq80310_preinit,
-};
-
-static int __init iq80310_pci_init(void)
-{
- if (machine_is_iq80310())
- pci_common_init(&iq80310_pci);
- return 0;
-}
-
-subsys_initcall(iq80310_pci_init);
+++ /dev/null
-/*
- * linux/arch/arm/mach-iop3xx/time-iq80310.c
- *
- * Timer functions for IQ80310 onboard timer
- *
- * Author: Nicolas Pitre
- * Copyright: (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/init.h>
-#include <linux/timex.h>
-
-#include <asm/hardware.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/mach/irq.h>
-
-static void iq80310_write_timer (u_long val)
-{
- volatile u_char *la0 = (volatile u_char *)IQ80310_TIMER_LA0;
- volatile u_char *la1 = (volatile u_char *)IQ80310_TIMER_LA1;
- volatile u_char *la2 = (volatile u_char *)IQ80310_TIMER_LA2;
-
- *la0 = val;
- *la1 = val >> 8;
- *la2 = (val >> 16) & 0x3f;
-}
-
-static u_long iq80310_read_timer (void)
-{
- volatile u_char *la0 = (volatile u_char *)IQ80310_TIMER_LA0;
- volatile u_char *la1 = (volatile u_char *)IQ80310_TIMER_LA1;
- volatile u_char *la2 = (volatile u_char *)IQ80310_TIMER_LA2;
- volatile u_char *la3 = (volatile u_char *)IQ80310_TIMER_LA3;
- u_long b0, b1, b2, b3, val;
-
- b0 = *la0; b1 = *la1; b2 = *la2; b3 = *la3;
- b0 = (((b0 & 0x40) >> 1) | (b0 & 0x1f));
- b1 = (((b1 & 0x40) >> 1) | (b1 & 0x1f));
- b2 = (((b2 & 0x40) >> 1) | (b2 & 0x1f));
- b3 = (b3 & 0x0f);
- val = ((b0 << 0) | (b1 << 6) | (b2 << 12) | (b3 << 18));
- return val;
-}
-
-/*
- * IRQs are disabled before entering here from do_gettimeofday().
- * Note that the counter may wrap. When it does, 'elapsed' will
- * be small, but we will have a pending interrupt.
- */
-static unsigned long iq80310_gettimeoffset (void)
-{
- unsigned long elapsed, usec;
- unsigned int stat1, stat2;
-
- stat1 = *(volatile u8 *)IQ80310_INT_STAT;
- elapsed = iq80310_read_timer();
- stat2 = *(volatile u8 *)IQ80310_INT_STAT;
-
- /*
- * If an interrupt was pending before we read the timer,
- * we've already wrapped. Factor this into the time.
- * If an interrupt was pending after we read the timer,
- * it may have wrapped between checking the interrupt
- * status and reading the timer. Re-read the timer to
- * be sure its value is after the wrap.
- */
- if (stat1 & 1)
- elapsed += LATCH;
- else if (stat2 & 1)
- elapsed = LATCH + iq80310_read_timer();
-
- /*
- * Now convert them to usec.
- */
- usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
-
- return usec;
-}
-
-
-static irqreturn_t
-iq80310_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- volatile u_char *timer_en = (volatile u_char *)IQ80310_TIMER_EN;
-
- /* clear timer interrupt */
- *timer_en &= ~2;
- *timer_en |= 2;
-
- do_timer(regs);
-
- return IRQ_HANDLED;
-}
-
-extern unsigned long (*gettimeoffset)(void);
-
-static struct irqaction timer_irq = {
- .name = "timer",
- .handler = iq80310_timer_interrupt,
-};
-
-
-void __init time_init(void)
-{
- volatile u_char *timer_en = (volatile u_char *)IQ80310_TIMER_EN;
-
- gettimeoffset = iq80310_gettimeoffset;
-
- setup_irq(IRQ_IQ80310_TIMER, &timer_irq);
-
- *timer_en = 0;
- iq80310_write_timer(LATCH);
- *timer_en |= 2;
- *timer_en |= 1;
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-iop3xx/mm.c
- *
- * Low level memory initialization for IOP321 based systems
- *
- * Author: Rory Bolt <rorybolt@pacbell.net>
- * Copyright (C) 2002 Rory Bolt
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#include <linux/config.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-
-#include <asm/mach/map.h>
-
-
-/*
- * Standard IO mapping for all IOP321 based systems
- */
-static struct map_desc iop80321_std_desc[] __initdata = {
- /* virtual physical length type */
-
- /* mem mapped registers */
- { IOP321_VIRT_MEM_BASE, IOP321_PHY_MEM_BASE, 0x00002000, MT_DEVICE },
-
- /* PCI IO space */
- { 0xfe000000, 0x90000000, 0x00020000, MT_DEVICE }
-};
-
-void __init iop321_map_io(void)
-{
- iotable_init(iop80321_std_desc, ARRAY_SIZE(iop80321_std_desc));
-}
-
-/*
- * IQ80321 specific IO mappings
- *
- * We use RedBoot's setup for the onboard devices.
- */
-#ifdef CONFIG_ARCH_IQ80321
-static struct map_desc iq80321_io_desc[] __initdata = {
- /* virtual physical length type */
-
- /* on-board devices */
- { 0xfe800000, IQ80321_UART1, 0x00100000, MT_DEVICE }
-};
-
-void __init iq80321_map_io(void)
-{
- iop321_map_io();
-
- iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
-}
-#endif // CONFIG_ARCH_IQ80321
+++ /dev/null
-/*
- * linux/arch/arm/mach-iop3xx/mm.c
- *
- * Low level memory initialization for IOP310 based systems
- *
- * Author: Nicolas Pitre <npitre@mvista.com>
- *
- * Copyright 2000-2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-
-#include <asm/mach/map.h>
-
-#ifdef CONFIG_IOP310_MU
-#include "message.h"
-#endif
-
-/*
- * Standard IO mapping for all IOP310 based systems
- */
-static struct map_desc iop80310_std_desc[] __initdata = {
- /* virtual physical length type */
- // IOP310 Memory Mapped Registers
- { 0xe8001000, 0x00001000, 0x00001000, MT_DEVICE },
- // PCI I/O Space
- { 0xfe000000, 0x90000000, 0x00020000, MT_DEVICE }
-};
-
-void __init iop310_map_io(void)
-{
- iotable_init(iop80310_std_desc, ARRAY_SIZE(iop80310_std_desc));
-}
-
-/*
- * IQ80310 specific IO mappings
- */
-#ifdef CONFIG_ARCH_IQ80310
-static struct map_desc iq80310_io_desc[] __initdata = {
- /* virtual physical length type */
- // IQ80310 On-Board Devices
- { 0xfe800000, 0xfe800000, 0x00100000, MT_DEVICE }
-};
-
-void __init iq80310_map_io(void)
-{
-#ifdef CONFIG_IOP310_MU
- /* acquiring 1MB of memory aligned on 1MB boundary for MU */
- mu_mem = __alloc_bootmem(0x100000, 0x100000, 0);
-#endif
-
- iop310_map_io();
-
- iotable_init(iq80310_io_desc, ARRAY_SIZE(iq80310_io_desc));
-}
-#endif // CONFIG_ARCH_IQ80310
-
+++ /dev/null
-/*
- * linux/arch/arm/mach-iop3xx/xs80200-irq.c
- *
- * Generic IRQ handling for the XS80200 XScale core.
- *
- * Author: Nicolas Pitre
- * Copyright: (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/list.h>
-
-#include <asm/mach/irq.h>
-#include <asm/irq.h>
-#include <asm/hardware.h>
-
-static void xs80200_irq_mask (unsigned int irq)
-{
- unsigned long intctl;
- asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (intctl));
- switch (irq) {
- case IRQ_XS80200_BCU: intctl &= ~(1<<3); break;
- case IRQ_XS80200_PMU: intctl &= ~(1<<2); break;
- case IRQ_XS80200_EXTIRQ: intctl &= ~(1<<1); break;
- case IRQ_XS80200_EXTFIQ: intctl &= ~(1<<0); break;
- }
- asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (intctl));
-}
-
-static void xs80200_irq_unmask (unsigned int irq)
-{
- unsigned long intctl;
- asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (intctl));
- switch (irq) {
- case IRQ_XS80200_BCU: intctl |= (1<<3); break;
- case IRQ_XS80200_PMU: intctl |= (1<<2); break;
- case IRQ_XS80200_EXTIRQ: intctl |= (1<<1); break;
- case IRQ_XS80200_EXTFIQ: intctl |= (1<<0); break;
- }
- asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (intctl));
-}
-
-static struct irqchip xs80200_chip = {
- .ack = xs80200_irq_mask,
- .mask = xs80200_irq_mask,
- .unmask = xs80200_irq_unmask,
-};
-
-void __init xs80200_init_irq(void)
-{
- unsigned int i;
-
- asm("mcr p13, 0, %0, c0, c0, 0" : : "r" (0));
-
- for (i = 0; i < NR_XS80200_IRQS; i++) {
- set_irq_chip(i, &xs80200_chip);
- set_irq_handler(i, do_level_IRQ);
- set_irq_flags(i, IRQF_VALID);
- }
-}
+++ /dev/null
-/*
- * linux/arch/arm/lib/lh7a400-fiqhandler.S
- * Copyright (C) 2002, Lineo, Inc.
- * based on linux/arch/arm/lib/floppydma.S, which is
- * Copyright (C) 1995, 1996 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <asm/assembler.h>
- .text
-
- .global fiqhandler_end
-
- @ register usage:
- @ r8 &interrupt controller registers
- @ r9 &gpio registers
- @ r11 work
- @ r12 work
-
-ENTRY(fiqhandler)
-
- @ read the status register to find out which FIQ this is
-
- ldr r12, [r8] @ intc->status
- and r12, r12, #0xf @ only interested in low-order 4 bits
-
- @ translate FIQ 0:3 to IRQ 23:26
- @ disable this FIQ and enable the corresponding IRQ
-
- str r12, [r8, #0xc] @ disable this FIQ
- mov r12, r12, lsl #23 @ get the corresopnding IRQ bit
- str r12, [r8, #0x8] @ enable that IRQ
-
- subs pc, lr, #4
-fiqhandler_end:
-
+++ /dev/null
-/* arch/arm/mach-lh7a40x/ide-lpd7a40x.c
- *
- * Copyright (C) 2004 Logic Product Development
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- */
-
-
-#include <linux/config.h>
-#include <linux/ide.h>
-
-#include <asm/io.h>
-
-#define IOBARRIER_READ readl (IOBARRIER_VIRT)
-
-static u8 lpd7a40x_ide_inb (unsigned long port)
-{
- u16 v = (u16) readw (port & ~0x1);
- IOBARRIER_READ;
- if (port & 0x1)
- v >>= 8;
- return v & 0xff;
-}
-
-static u16 lpd7a40x_ide_inw (unsigned long port)
-{
- u16 v = (u16) readw (port);
- IOBARRIER_READ;
- return v;
-}
-
-static void lpd7a40x_ide_insw (unsigned long port, void *addr, u32 count)
-{
- while (count--) {
- *((u16*) addr)++ = (u16) readw (port);
- IOBARRIER_READ;
- }
-}
-
-static u32 lpd7a40x_ide_inl (unsigned long port)
-{
- u32 v = (u16) readw (port);
- IOBARRIER_READ;
- v |= (u16) readw (port + 2);
- IOBARRIER_READ;
-
- return v;
-}
-
-static void lpd7a40x_ide_insl (unsigned long port, void *addr, u32 count)
-{
- while (count--) {
- *((u16*) addr)++ = (u16) readw (port);
- IOBARRIER_READ;
- *((u16*) addr)++ = (u16) readw (port + 2);
- IOBARRIER_READ;
- }
-}
-
-/* lpd7a40x_ide_outb -- this function is complicated by the fact that
- * the user wants to be able to do byte IO and the hardware cannot.
- * In order to write the high byte, we need to write a short. So, we
- * read before writing in order to maintain the register values that
- * shouldn't change. This isn't a good idea for the data IO registers
- * since reading from them will not return the current value. We
- * expect that this function handles the control register adequately.
-*/
-
-static void lpd7a40x_ide_outb (u8 valueUser, unsigned long port)
-{
- /* Block writes to SELECT register. Draconian, but the only
- * way to cope with this hardware configuration without
- * modifying the SELECT_DRIVE call in the ide driver. */
- if ((port & 0xf) == 0x6)
- return;
-
- if (port & 0x1) { /* Perform read before write. Only
- * the COMMAND register needs
- * this. */
- u16 value = (u16) readw (port & ~0x1);
- IOBARRIER_READ;
- value = (value & 0x00ff) | (valueUser << 8);
- writew (value, port & ~0x1);
- IOBARRIER_READ;
- }
- else { /* Allow low-byte writes which seem to
- * be OK. */
- writeb (valueUser, port);
- IOBARRIER_READ;
- }
-}
-
-static void lpd7a40x_ide_outbsync (ide_drive_t *drive, u8 value,
- unsigned long port)
-{
- lpd7a40x_ide_outb (value, port);
-}
-
-static void lpd7a40x_ide_outw (u16 value, unsigned long port)
-{
- writew (value, port);
- IOBARRIER_READ;
-}
-
-static void lpd7a40x_ide_outsw (unsigned long port, void *addr, u32 count)
-{
- while (count-- > 0) {
- writew (*((u16*) addr)++, port);
- IOBARRIER_READ;
- }
-}
-
-static void lpd7a40x_ide_outl (u32 value, unsigned long port)
-{
- writel (value, port);
- IOBARRIER_READ;
-}
-
-static void lpd7a40x_ide_outsl (unsigned long port, void *addr, u32 count)
-{
- while (count-- > 0) {
- writel (*((u32*) addr)++, port);
- IOBARRIER_READ;
- }
-}
-
-void lpd7a40x_SELECT_DRIVE (ide_drive_t *drive)
-{
- unsigned jifStart = jiffies;
-#define WAIT_TIME (30*HZ/1000)
-
- /* Check for readiness. */
- while ((HWIF(drive)->INB(IDE_STATUS_REG) & 0x40) == 0)
- if (jifStart <= jiffies + WAIT_TIME)
- return;
-
- /* Only allow one drive.
- For more information, see Documentation/arm/Sharp-LH/ */
- if (drive->select.all & (1<<4))
- return;
-
- /* OUTW so that the IDLE_IMMEDIATE (and not NOP) command is sent. */
- HWIF(drive)->OUTW(drive->select.all | 0xe100, IDE_SELECT_REG);
-}
-
-void lpd7a40x_hwif_ioops (ide_hwif_t *hwif)
-{
- hwif->mmio = 2; /* Just for show */
- hwif->irq = IDE_NO_IRQ; /* Stop this probing */
-
- hwif->OUTB = lpd7a40x_ide_outb;
- hwif->OUTBSYNC = lpd7a40x_ide_outbsync;
- hwif->OUTW = lpd7a40x_ide_outw;
- hwif->OUTL = lpd7a40x_ide_outl;
- hwif->OUTSW = lpd7a40x_ide_outsw;
- hwif->OUTSL = lpd7a40x_ide_outsl;
- hwif->INB = lpd7a40x_ide_inb;
- hwif->INW = lpd7a40x_ide_inw;
- hwif->INL = lpd7a40x_ide_inl;
- hwif->INSW = lpd7a40x_ide_insw;
- hwif->INSL = lpd7a40x_ide_insl;
- hwif->selectproc = lpd7a40x_SELECT_DRIVE;
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-omap/bus.c
- *
- * Virtual bus for OMAP. Allows better power management, such as managing
- * shared clocks, and mapping of bus addresses to Local Bus addresses.
- *
- * See drivers/usb/host/ohci-omap.c or drivers/video/omap/omapfb.c for
- * examples on how to register drivers to this bus.
- *
- * Copyright (C) 2003 - 2004 Nokia Corporation
- * Written by Tony Lindgren <tony@atomide.com>
- * Portions of code based on sa1111.c.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/device.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/mach/irq.h>
-
-#include <asm/arch/bus.h>
-
-static int omap_bus_match(struct device *_dev, struct device_driver *_drv);
-static int omap_bus_suspend(struct device *dev, u32 state);
-static int omap_bus_resume(struct device *dev);
-
-/*
- * OMAP bus definitions
- *
- * NOTE: Most devices should use TIPB. LBUS does automatic address mapping
- * to Local Bus addresses, and should only be used for Local Bus devices.
- * We may add new buses later on for power management reasons. Basically
- * we want to be able to turn off any bus if it's not used by device
- * drivers.
- */
-static struct device omap_bus_devices[OMAP_NR_BUSES] = {
- {
- .bus_id = OMAP_BUS_NAME_TIPB
- }, {
- .bus_id = OMAP_BUS_NAME_LBUS
- },
-};
-
-static struct bus_type omap_bus_types[OMAP_NR_BUSES] = {
- {
- .name = OMAP_BUS_NAME_TIPB,
- .match = omap_bus_match,
- .suspend = omap_bus_suspend,
- .resume = omap_bus_resume,
- }, {
- .name = OMAP_BUS_NAME_LBUS, /* Local bus on 1510 */
- .match = omap_bus_match,
- .suspend = omap_bus_suspend,
- .resume = omap_bus_resume,
- },
-};
-
-static int omap_bus_match(struct device *dev, struct device_driver *drv)
-{
- struct omap_dev *omapdev = OMAP_DEV(dev);
- struct omap_driver *omapdrv = OMAP_DRV(drv);
-
- return omapdev->devid == omapdrv->devid;
-}
-
-static int omap_bus_suspend(struct device *dev, u32 state)
-{
- struct omap_dev *omapdev = OMAP_DEV(dev);
- struct omap_driver *omapdrv = OMAP_DRV(dev->driver);
- int ret = 0;
-
- if (omapdrv && omapdrv->suspend)
- ret = omapdrv->suspend(omapdev, state);
- return ret;
-}
-
-static int omap_bus_resume(struct device *dev)
-{
- struct omap_dev *omapdev = OMAP_DEV(dev);
- struct omap_driver *omapdrv = OMAP_DRV(dev->driver);
- int ret = 0;
-
- if (omapdrv && omapdrv->resume)
- ret = omapdrv->resume(omapdev);
- return ret;
-}
-
-static int omap_device_probe(struct device *dev)
-{
- struct omap_dev *omapdev = OMAP_DEV(dev);
- struct omap_driver *omapdrv = OMAP_DRV(dev->driver);
- int ret = -ENODEV;
-
- if (omapdrv && omapdrv->probe)
- ret = omapdrv->probe(omapdev);
-
- return ret;
-}
-
-static int omap_device_remove(struct device *dev)
-{
- struct omap_dev *omapdev = OMAP_DEV(dev);
- struct omap_driver *omapdrv = OMAP_DRV(dev->driver);
- int ret = 0;
-
- if (omapdrv && omapdrv->remove)
- ret = omapdrv->remove(omapdev);
- return ret;
-}
-
-int omap_device_register(struct omap_dev *odev)
-{
- if (!odev)
- return -EINVAL;
-
- if (odev->busid < 0 || odev->busid >= OMAP_NR_BUSES) {
- printk(KERN_ERR "%s: busid invalid: %s: bus: %i\n",
- __FUNCTION__, odev->name, odev->busid);
- return -EINVAL;
- }
-
- odev->dev.parent = &omap_bus_devices[odev->busid];
- odev->dev.bus = &omap_bus_types[odev->busid];
-
- /* This is needed for USB OHCI to work */
- if (odev->dma_mask)
- odev->dev.dma_mask = odev->dma_mask;
-
- if (odev->coherent_dma_mask)
- odev->dev.coherent_dma_mask = odev->coherent_dma_mask;
-
- snprintf(odev->dev.bus_id, BUS_ID_SIZE, "%s%u",
- odev->name, odev->devid);
-
- printk("Registering OMAP device '%s'. Parent at %s\n",
- odev->dev.bus_id, odev->dev.parent->bus_id);
-
- return device_register(&odev->dev);
-}
-
-void omap_device_unregister(struct omap_dev *odev)
-{
- if (odev)
- device_unregister(&odev->dev);
-}
-
-int omap_driver_register(struct omap_driver *driver)
-{
- int ret;
-
- if (driver->busid < 0 || driver->busid >= OMAP_NR_BUSES) {
- printk(KERN_ERR "%s: busid invalid: bus: %i device: %i\n",
- __FUNCTION__, driver->busid, driver->devid);
- return -EINVAL;
- }
-
- driver->drv.probe = omap_device_probe;
- driver->drv.remove = omap_device_remove;
- driver->drv.bus = &omap_bus_types[driver->busid];
-
- /*
- * driver_register calls bus_add_driver
- */
- ret = driver_register(&driver->drv);
-
- return ret;
-}
-
-void omap_driver_unregister(struct omap_driver *driver)
-{
- driver_unregister(&driver->drv);
-}
-
-static int __init omap_bus_init(void)
-{
- int i, ret;
-
- /* Initialize all OMAP virtual buses */
- for (i = 0; i < OMAP_NR_BUSES; i++) {
- ret = device_register(&omap_bus_devices[i]);
- if (ret != 0) {
- printk(KERN_ERR "Unable to register bus device %s\n",
- omap_bus_devices[i].bus_id);
- continue;
- }
- ret = bus_register(&omap_bus_types[i]);
- if (ret != 0) {
- printk(KERN_ERR "Unable to register bus %s\n",
- omap_bus_types[i].name);
- device_unregister(&omap_bus_devices[i]);
- }
- }
- printk("OMAP virtual buses initialized\n");
-
- return ret;
-}
-
-static void __exit omap_bus_exit(void)
-{
- int i;
-
- /* Unregister all OMAP virtual buses */
- for (i = 0; i < OMAP_NR_BUSES; i++) {
- bus_unregister(&omap_bus_types[i]);
- device_unregister(&omap_bus_devices[i]);
- }
-}
-
-postcore_initcall(omap_bus_init);
-module_exit(omap_bus_exit);
-
-MODULE_DESCRIPTION("Virtual bus for OMAP");
-MODULE_LICENSE("GPL");
-
-EXPORT_SYMBOL(omap_bus_types);
-EXPORT_SYMBOL(omap_driver_register);
-EXPORT_SYMBOL(omap_driver_unregister);
-EXPORT_SYMBOL(omap_device_register);
-EXPORT_SYMBOL(omap_device_unregister);
-
+++ /dev/null
-/*
- * Clock interface for OMAP
- *
- * Copyright (C) 2001 RidgeRun, Inc
- * Written by Gordon McNutt <gmcnutt@ridgerun.com>
- * Updated 2004 for Linux 2.6 by Tony Lindgren <tony@atomide.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/spinlock.h>
-#include <asm/errno.h>
-#include <asm/io.h>
-#include <asm/arch/clocks.h>
-#include <asm/arch/board.h>
-
-extern void start_mputimer1(unsigned long load_val);
-
-/* Input clock in MHz */
-static unsigned int source_clock = 12;
-
-/*
- * We use one spinlock for all clock registers for now. We may want to
- * change this to be clock register specific later on. Before we can do
- * that, we need to map out the shared clock registers.
- */
-static spinlock_t clock_lock = SPIN_LOCK_UNLOCKED;
-
-typedef struct {
- char *name;
- __u8 flags;
- ck_t parent;
- unsigned long rate_reg; /* Clock rate register */
- unsigned long enbl_reg; /* Enable register */
- unsigned long idle_reg; /* Idle register */
- unsigned long slct_reg; /* Select register */
- __s8 rate_shift; /* Clock rate bit shift */
- __s8 enbl_shift; /* Clock enable bit shift */
- __s8 idle_shift; /* Clock idle bit shift */
- __s8 slct_shift; /* Clock select bit shift */
-} ck_info_t;
-
-#define CK_NAME(ck) ck_info_table[ck].name
-#define CK_FLAGS(ck) ck_info_table[ck].flags
-#define CK_PARENT(ck) ck_info_table[ck].parent
-#define CK_RATE_REG(ck) ck_info_table[ck].rate_reg
-#define CK_ENABLE_REG(ck) ck_info_table[ck].enbl_reg
-#define CK_IDLE_REG(ck) ck_info_table[ck].idle_reg
-#define CK_SELECT_REG(ck) ck_info_table[ck].slct_reg
-#define CK_RATE_SHIFT(ck) ck_info_table[ck].rate_shift
-#define CK_ENABLE_SHIFT(ck) ck_info_table[ck].enbl_shift
-#define CK_IDLE_SHIFT(ck) ck_info_table[ck].idle_shift
-#define CK_SELECT_SHIFT(ck) ck_info_table[ck].slct_shift
-#define CK_CAN_CHANGE_RATE(cl) (CK_FLAGS(ck) & CK_RATEF)
-#define CK_CAN_DISABLE(cl) (CK_FLAGS(ck) & CK_ENABLEF)
-#define CK_CAN_IDLE(cl) (CK_FLAGS(ck) & CK_IDLEF)
-#define CK_CAN_SWITCH(cl) (CK_FLAGS(ck) & CK_SELECTF)
-
-static ck_info_t ck_info_table[] = {
- {
- .name = "clkin",
- .flags = 0,
- .parent = OMAP_CLKIN,
- }, {
- .name = "ck_gen1",
- .flags = CK_RATEF | CK_IDLEF,
- .rate_reg = DPLL_CTL,
- .idle_reg = ARM_IDLECT1,
- .idle_shift = IDLDPLL_ARM,
- .parent = OMAP_CLKIN,
- }, {
- .name = "ck_gen2",
- .flags = 0,
- .parent = OMAP_CK_GEN1,
- }, {
- .name = "ck_gen3",
- .flags = 0,
- .parent = OMAP_CK_GEN1,
- }, {
- .name = "tc_ck",
- .flags = CK_RATEF | CK_IDLEF,
- .parent = OMAP_CK_GEN3,
- .rate_reg = ARM_CKCTL, /* ARM_CKCTL[TCDIV(9:8)] */
- .idle_reg = ARM_IDLECT1,
- .rate_shift = TCDIV,
- .idle_shift = IDLIF_ARM
- }, {
- .name = "arm_ck",
- .flags = CK_IDLEF | CK_RATEF,
- .parent = OMAP_CK_GEN1,
- .rate_reg = ARM_CKCTL, /* ARM_CKCTL[ARMDIV(5:4)] */
- .idle_reg = ARM_IDLECT1,
- .rate_shift = ARMDIV,
- .idle_shift = SETARM_IDLE,
- }, {
- .name = "mpuper_ck",
- .flags = CK_RATEF | CK_IDLEF | CK_ENABLEF,
- .parent = OMAP_CK_GEN1,
- .rate_reg = ARM_CKCTL, /* ARM_CKCTL[PERDIV(1:0)] */
- .enbl_reg = ARM_IDLECT2,
- .idle_reg = ARM_IDLECT1,
- .rate_shift = PERDIV,
- .enbl_shift = EN_PERCK,
- .idle_shift = IDLPER_ARM
- }, {
- .name = "arm_gpio_ck",
- .flags = CK_ENABLEF,
- .parent = OMAP_CK_GEN1,
- .enbl_reg = ARM_IDLECT2,
- .enbl_shift = EN_GPIOCK
- }, {
- .name = "mpuxor_ck",
- .flags = CK_ENABLEF | CK_IDLEF,
- .parent = OMAP_CLKIN,
- .idle_reg = ARM_IDLECT1,
- .enbl_reg = ARM_IDLECT2,
- .idle_shift = IDLXORP_ARM,
- .enbl_shift = EN_XORPCK
- }, {
- .name = "mputim_ck",
- .flags = CK_IDLEF | CK_ENABLEF | CK_SELECTF,
- .parent = OMAP_CLKIN,
- .idle_reg = ARM_IDLECT1,
- .enbl_reg = ARM_IDLECT2,
- .slct_reg = ARM_CKCTL,
- .idle_shift = IDLTIM_ARM,
- .enbl_shift = EN_TIMCK,
- .slct_shift = ARM_TIMXO
- }, {
- .name = "mpuwd_ck",
- .flags = CK_IDLEF | CK_ENABLEF,
- .parent = OMAP_CLKIN,
- .idle_reg = ARM_IDLECT1,
- .enbl_reg = ARM_IDLECT2,
- .idle_shift = IDLWDT_ARM,
- .enbl_shift = EN_WDTCK,
- }, {
- .name = "dsp_ck",
- .flags = CK_RATEF | CK_ENABLEF,
- .parent = OMAP_CK_GEN2,
- .rate_reg = ARM_CKCTL, /* ARM_CKCTL[DSPDIV(7:6)] */
- .enbl_reg = ARM_CKCTL,
- .rate_shift = DSPDIV,
- .enbl_shift = EN_DSPCK,
- }, {
- .name = "dspmmu_ck",
- .flags = CK_RATEF | CK_ENABLEF,
- .parent = OMAP_CK_GEN2,
- .rate_reg = ARM_CKCTL, /* ARM_CKCTL[DSPMMUDIV(11:10)] */
- .enbl_reg = ARM_CKCTL,
- .rate_shift = DSPMMUDIV,
- .enbl_shift = EN_DSPCK,
- }, {
- .name = "dma_ck",
- .flags = CK_RATEF | CK_IDLEF | CK_ENABLEF,
- .parent = OMAP_CK_GEN3,
- .rate_reg = ARM_CKCTL, /* ARM_CKCTL[TCDIV(9:8)] */
- .idle_reg = ARM_IDLECT1,
- .enbl_reg = ARM_IDLECT2,
- .rate_shift = TCDIV,
- .idle_shift = IDLIF_ARM,
- .enbl_shift = DMACK_REQ
- }, {
- .name = "api_ck",
- .flags = CK_RATEF | CK_IDLEF | CK_ENABLEF,
- .parent = OMAP_CK_GEN3,
- .rate_reg = ARM_CKCTL, /* ARM_CKCTL[TCDIV(9:8)] */
- .idle_reg = ARM_IDLECT1,
- .enbl_reg = ARM_IDLECT2,
- .rate_shift = TCDIV,
- .idle_shift = IDLAPI_ARM,
- .enbl_shift = EN_APICK,
- }, {
- .name = "hsab_ck",
- .flags = CK_RATEF | CK_IDLEF | CK_ENABLEF,
- .parent = OMAP_CK_GEN3,
- .rate_reg = ARM_CKCTL, /* ARM_CKCTL[TCDIV(9:8)] */
- .idle_reg = ARM_IDLECT1,
- .enbl_reg = ARM_IDLECT2,
- .rate_shift = TCDIV,
- .idle_shift = IDLHSAB_ARM,
- .enbl_shift = EN_HSABCK,
- }, {
- .name = "lbfree_ck",
- .flags = CK_RATEF | CK_ENABLEF,
- .parent = OMAP_CK_GEN3,
- .rate_reg = ARM_CKCTL, /* ARM_CKCTL[TCDIV(9:8)] */
- .enbl_reg = ARM_IDLECT2,
- .rate_shift = TCDIV,
- .enbl_shift = EN_LBFREECK,
- }, {
- .name = "lb_ck",
- .flags = CK_RATEF | CK_IDLEF | CK_ENABLEF,
- .parent = OMAP_CK_GEN3,
- .rate_reg = ARM_CKCTL, /* ARM_CKCTL[TCDIV(9:8)] */
- .idle_reg = ARM_IDLECT1,
- .enbl_reg = ARM_IDLECT2,
- .rate_shift = TCDIV,
- .idle_shift = IDLLB_ARM,
- .enbl_shift = EN_LBCK,
- }, {
- .name = "lcd_ck",
- .flags = CK_RATEF | CK_IDLEF | CK_ENABLEF,
- .parent = OMAP_CK_GEN3,
- .rate_reg = ARM_CKCTL, /* ARM_CKCTL[LCDDIV(3:2)] */
- .idle_reg = ARM_IDLECT1,
- .enbl_reg = ARM_IDLECT2,
- .rate_shift = LCDDIV,
- .idle_shift = IDLLCD_ARM,
- .enbl_shift = EN_LCDCK,
- },
-};
-
-/*****************************************************************************/
-
-#define CK_IN_RANGE(ck) (!((ck < OMAP_CK_MIN) || (ck > OMAP_CK_MAX)))
-
-int ck_auto_unclock = 1;
-int ck_debug = 0;
-
-#define CK_MAX_PLL_FREQ OMAP_CK_MAX_RATE
-static __u32 ck_valid_table[CK_MAX_PLL_FREQ / 32 + 1];
-static __u8 ck_lookup_table[CK_MAX_PLL_FREQ];
-
-int
-ck_set_input(ck_t ck, ck_t input)
-{
- int ret = 0, shift;
- unsigned short reg;
- unsigned long flags;
-
- if (!CK_IN_RANGE(ck) || !CK_CAN_SWITCH(ck)) {
- ret = -EINVAL;
- goto exit;
- }
-
- reg = omap_readw(CK_SELECT_REG(ck));
- shift = CK_SELECT_SHIFT(ck);
-
- spin_lock_irqsave(&clock_lock, flags);
- if (input == OMAP_CLKIN) {
- reg &= ~(1 << shift);
- omap_writew(reg, CK_SELECT_REG(ck));
- goto exit;
- } else if (input == CK_PARENT(ck)) {
- reg |= (1 << shift);
- omap_writew(reg, CK_SELECT_REG(ck));
- goto exit;
- }
-
- ret = -EINVAL;
- exit:
- spin_unlock_irqrestore(&clock_lock, flags);
- return ret;
-}
-
-int
-ck_get_input(ck_t ck, ck_t * input)
-{
- int ret = -EINVAL;
- unsigned long flags;
-
- if (!CK_IN_RANGE(ck))
- goto exit;
-
- ret = 0;
-
- spin_lock_irqsave(&clock_lock, flags);
- if (CK_CAN_SWITCH(ck)) {
- int shift;
- unsigned short reg;
-
- reg = omap_readw(CK_SELECT_REG(ck));
- shift = CK_SELECT_SHIFT(ck);
- if (reg & (1 << shift)) {
- *input = CK_PARENT(ck);
- goto exit;
- }
- }
-
- *input = OMAP_CLKIN;
-
- exit:
- spin_unlock_irqrestore(&clock_lock, flags);
- return ret;
-}
-
-static int
-__ck_set_pll_rate(ck_t ck, int rate)
-{
- unsigned short pll;
- unsigned long flags;
-
- if ((rate < 0) || (rate > CK_MAX_PLL_FREQ))
- return -EINVAL;
-
- /* Scan downward for the closest matching frequency */
- while (rate && !test_bit(rate, (unsigned long *)&ck_valid_table))
- rate--;
-
- if (!rate) {
- printk(KERN_ERR "%s: couldn't find a matching rate\n",
- __FUNCTION__);
- return -EINVAL;
- }
-
- spin_lock_irqsave(&clock_lock, flags);
- pll = omap_readw(CK_RATE_REG(ck));
-
- /* Clear the rate bits */
- pll &= ~(0x1f << 5);
-
- /* Set the rate bits */
- pll |= (ck_lookup_table[rate - 1] << 5);
-
- omap_writew(pll, CK_RATE_REG(ck));
-
- spin_unlock_irqrestore(&clock_lock, flags);
-
- return 0;
-}
-
-static int
-__ck_set_clkm_rate(ck_t ck, int rate)
-{
- int shift, prate, div, ret;
- unsigned short reg;
- unsigned long flags;
-
- spin_lock_irqsave(&clock_lock, flags);
-
- /*
- * We can only set this clock's value to a fraction of its
- * parent's value. The interface says I'll round down when necessary.
- * So first let's get the parent's current rate.
- */
- prate = ck_get_rate(CK_PARENT(ck));
-
- /*
- * Let's just start with the highest fraction and keep searching
- * down through available rates until we find one less than or equal
- * to the desired rate.
- */
- for (div = 0; div < 4; div++) {
- if (prate <= rate)
- break;
- prate = prate / 2;
- }
-
- /*
- * Oops. Looks like the caller wants a rate lower than we can support.
- */
- if (div == 5) {
- printk(KERN_ERR "%s: %d is too low\n",
- __FUNCTION__, rate);
- ret = -EINVAL;
- goto exit;
- }
-
- /*
- * One more detail: if this clock supports more than one parent, then
- * we're going to automatically switch over to the parent which runs
- * through the divisor. For omap this is not ambiguous because for all
- * such clocks one choice is always OMAP_CLKIN (which doesn't run
- * through the divisor) and the other is whatever I encoded as
- * CK_PARENT. Note that I wait until we get this far because I don't
- * want to switch the input until we're sure this is going to work.
- */
- if (CK_CAN_SWITCH(ck))
- if ((ret = ck_set_input(ck, CK_PARENT(ck))) < 0) {
- BUG();
- goto exit;
- }
-
- /*
- * At last, we can set the divisor. Clear the old rate bits and
- * set the new ones.
- */
- reg = omap_readw(CK_RATE_REG(ck));
- shift = CK_RATE_SHIFT(ck);
- reg &= ~(3 << shift);
- reg |= (div << shift);
- omap_writew(reg, CK_RATE_REG(ck));
-
- /* And return the new (actual, after rounding down) rate. */
- ret = prate;
-
- exit:
- spin_unlock_irqrestore(&clock_lock, flags);
- return ret;
-}
-
-int
-ck_set_rate(ck_t ck, int rate)
-{
- int ret = -EINVAL;
-
- if (!CK_IN_RANGE(ck) || !CK_CAN_CHANGE_RATE(ck))
- goto exit;
-
- switch (ck) {
-
- default:
- ret = __ck_set_clkm_rate(ck, rate);
- break;
-
- case OMAP_CK_GEN1:
- ret = __ck_set_pll_rate(ck, rate);
- break;
-
- };
-
- exit:
- return ret;
-}
-
-static int
-__ck_get_pll_rate(ck_t ck)
-{
- int m, d;
-
- unsigned short pll = omap_readw(CK_RATE_REG(ck));
-
- m = (pll & (0x1f << 7)) >> 7;
- m = m ? m : 1;
- d = (pll & (3 << 5)) >> 5;
- d++;
-
- return ((source_clock * m) / d);
-}
-
-static int
-__ck_get_clkm_rate(ck_t ck)
-{
- static int bits2div[] = { 1, 2, 4, 8 };
- int in, bits, reg, shift;
-
- reg = omap_readw(CK_RATE_REG(ck));
- shift = CK_RATE_SHIFT(ck);
-
- in = ck_get_rate(CK_PARENT(ck));
- bits = (reg & (3 << shift)) >> shift;
-
- return (in / bits2div[bits]);
-}
-
-int
-ck_get_rate(ck_t ck)
-{
- int ret = 0;
- ck_t parent;
-
- if (!CK_IN_RANGE(ck)) {
- ret = -EINVAL;
- goto exit;
- }
-
- switch (ck) {
-
- case OMAP_CK_GEN1:
- ret = __ck_get_pll_rate(ck);
- break;
-
- case OMAP_CLKIN:
- ret = source_clock;
- break;
-
- case OMAP_MPUXOR_CK:
- case OMAP_CK_GEN2:
- case OMAP_CK_GEN3:
- case OMAP_ARM_GPIO_CK:
- ret = ck_get_rate(CK_PARENT(ck));
- break;
-
- case OMAP_ARM_CK:
- case OMAP_MPUPER_CK:
- case OMAP_DSP_CK:
- case OMAP_DSPMMU_CK:
- case OMAP_LCD_CK:
- case OMAP_TC_CK:
- case OMAP_DMA_CK:
- case OMAP_API_CK:
- case OMAP_HSAB_CK:
- case OMAP_LBFREE_CK:
- case OMAP_LB_CK:
- ret = __ck_get_clkm_rate(ck);
- break;
-
- case OMAP_MPUTIM_CK:
- ck_get_input(ck, &parent);
- ret = ck_get_rate(parent);
- break;
-
- case OMAP_MPUWD_CK:
- /* Note that this evaluates to zero if source_clock is 12MHz. */
- ret = source_clock / 14;
- break;
- default:
- ret = -EINVAL;
- break;
- }
-
- exit:
- return ret;
-}
-
-int
-ck_enable(ck_t ck)
-{
- unsigned short reg;
- int ret = -EINVAL, shift;
- unsigned long flags;
-
- if (!CK_IN_RANGE(ck))
- goto exit;
-
- if (ck_debug)
- printk(KERN_DEBUG "%s: %s\n", __FUNCTION__, CK_NAME(ck));
-
- ret = 0;
-
- if (!CK_CAN_DISABLE(ck))
- /* Then it must be on... */
- goto exit;
-
- spin_lock_irqsave(&clock_lock, flags);
- reg = omap_readw(CK_ENABLE_REG(ck));
- shift = CK_ENABLE_SHIFT(ck);
- reg |= (1 << shift);
- omap_writew(reg, CK_ENABLE_REG(ck));
- spin_unlock_irqrestore(&clock_lock, flags);
-
- exit:
- return ret;
-}
-
-int
-ck_disable(ck_t ck)
-{
- unsigned short reg;
- int ret = -EINVAL, shift;
- unsigned long flags;
-
- if (!CK_IN_RANGE(ck))
- goto exit;
-
- if (ck_debug)
- printk(KERN_DEBUG "%s: %s\n", __FUNCTION__, CK_NAME(ck));
-
- if (!CK_CAN_DISABLE(ck))
- goto exit;
-
- ret = 0;
-
- if (ck == OMAP_CLKIN)
- return -EINVAL;
-
- spin_lock_irqsave(&clock_lock, flags);
- reg = omap_readw(CK_ENABLE_REG(ck));
- shift = CK_ENABLE_SHIFT(ck);
- reg &= ~(1 << shift);
- omap_writew(reg, CK_ENABLE_REG(ck));
- spin_unlock_irqrestore(&clock_lock, flags);
-
- exit:
- return ret;
-}
-
-int ck_valid_rate(int rate)
-{
- return test_bit(rate, (unsigned long *)&ck_valid_table);
-}
-
-static void
-__ck_make_lookup_table(void)
-{
- __u8 m, d;
-
- memset(ck_valid_table, 0, sizeof (ck_valid_table));
-
- for (m = 1; m < 32; m++)
- for (d = 1; d < 5; d++) {
-
- int rate = ((source_clock * m) / (d));
-
- if (rate > CK_MAX_PLL_FREQ)
- continue;
- if (test_bit(rate, (unsigned long *)&ck_valid_table))
- continue;
- set_bit(rate, (unsigned long *)&ck_valid_table);
- ck_lookup_table[rate - 1] = (m << 2) | (d - 1);
- }
-}
-
-int __init
-init_ck(void)
-{
- const struct omap_clock_config *info;
- int crystal_type = 0; /* Default 12 MHz */
-
- __ck_make_lookup_table();
- info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
- if (info != NULL) {
- if (!cpu_is_omap1510())
- crystal_type = info->system_clock_type;
- }
-
- /* We want to be in syncronous scalable mode */
- omap_writew(0x1000, ARM_SYSST);
-#if defined(CONFIG_OMAP_ARM_30MHZ)
- omap_writew(0x1555, ARM_CKCTL);
- omap_writew(0x2290, DPLL_CTL);
-#elif defined(CONFIG_OMAP_ARM_60MHZ)
- omap_writew(0x1005, ARM_CKCTL);
- omap_writew(0x2290, DPLL_CTL);
-#elif defined(CONFIG_OMAP_ARM_96MHZ)
- omap_writew(0x1005, ARM_CKCTL);
- omap_writew(0x2410, DPLL_CTL);
-#elif defined(CONFIG_OMAP_ARM_120MHZ)
- omap_writew(0x110a, ARM_CKCTL);
- omap_writew(0x2510, DPLL_CTL);
-#elif defined(CONFIG_OMAP_ARM_168MHZ)
- omap_writew(0x110f, ARM_CKCTL);
- omap_writew(0x2710, DPLL_CTL);
-#elif defined(CONFIG_OMAP_ARM_182MHZ) && defined(CONFIG_ARCH_OMAP730)
- omap_writew(0x250E, ARM_CKCTL);
- omap_writew(0x2710, DPLL_CTL);
-#elif defined(CONFIG_OMAP_ARM_192MHZ) && (defined(CONFIG_ARCH_OMAP1610) || defined(CONFIG_ARCH_OMAP5912) \
- || defined(CONFIG_ARCH_OMAP1710))
- omap_writew(0x150f, ARM_CKCTL);
- if (crystal_type == 2) {
- source_clock = 13; /* MHz */
- omap_writew(0x2510, DPLL_CTL);
- } else
- omap_writew(0x2810, DPLL_CTL);
-#elif defined(CONFIG_OMAP_ARM_195MHZ) && defined(CONFIG_ARCH_OMAP730)
- omap_writew(0x250E, ARM_CKCTL);
- omap_writew(0x2790, DPLL_CTL);
-#else
-#error "OMAP MHZ not set, please run make xconfig"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_PERSEUS2
- /* Select slicer output as OMAP input clock */
- omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
-#endif
-
- /* Turn off some other junk the bootloader might have turned on */
-
- /* Turn off DSP, ARM_INTHCK, ARM_TIMXO */
- omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL);
-
- /* Put DSP/MPUI into reset until needed */
- omap_writew(0, ARM_RSTCT1);
- omap_writew(1, ARM_RSTCT2);
- omap_writew(0x400, ARM_IDLECT1);
-
- /*
- * According to OMAP5910 Erratum SYS_DMA_1, bit DMACK_REQ (bit 8)
- * of the ARM_IDLECT2 register must be set to zero. The power-on
- * default value of this bit is one.
- */
- omap_writew(0x0000, ARM_IDLECT2); /* Turn LCD clock off also */
-
- /*
- * Only enable those clocks we will need, let the drivers
- * enable other clocks as necessary
- */
- ck_enable(OMAP_MPUPER_CK);
- ck_enable(OMAP_ARM_GPIO_CK);
- ck_enable(OMAP_MPUXOR_CK);
- //ck_set_rate(OMAP_MPUTIM_CK, OMAP_CLKIN);
- ck_enable(OMAP_MPUTIM_CK);
- start_mputimer1(0xffffffff);
-
- return 0;
-}
-
-
-EXPORT_SYMBOL(ck_get_rate);
-EXPORT_SYMBOL(ck_set_rate);
-EXPORT_SYMBOL(ck_enable);
-EXPORT_SYMBOL(ck_disable);
+++ /dev/null
-/*
- * linux/arch/arm/mach-omap/innovator1510.c
- *
- * Board specific inits for OMAP-1510 Innovator
- *
- * Copyright (C) 2001 RidgeRun, Inc.
- * Author: Greg Lonnon <glonnon@ridgerun.com>
- *
- * Copyright (C) 2002 MontaVista Software, Inc.
- *
- * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
- * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/device.h>
-
-#include <asm/hardware.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <asm/arch/clocks.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/fpga.h>
-
-#include "common.h"
-
-extern int omap_gpio_init(void);
-
-void innovator_init_irq(void)
-{
- omap_init_irq();
- omap_gpio_init();
- fpga_init_irq();
-}
-
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = OMAP1510P1_FPGA_ETHR_START, /* Physical */
- .end = OMAP1510P1_FPGA_ETHR_START + 16,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = INT_ETHER,
- .end = INT_ETHER,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-static struct platform_device *devices[] __initdata = {
- &smc91x_device,
-};
-
-static void __init innovator_init(void)
-{
- if (!machine_is_innovator())
- return;
-
- (void) platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-/* Only FPGA needs to be mapped here. All others are done with ioremap */
-static struct map_desc innovator_io_desc[] __initdata = {
-{ OMAP1510P1_FPGA_BASE, OMAP1510P1_FPGA_START, OMAP1510P1_FPGA_SIZE,
- MT_DEVICE },
-};
-
-static void __init innovator_map_io(void)
-{
- omap_map_io();
- iotable_init(innovator_io_desc, ARRAY_SIZE(innovator_io_desc));
-
- /* Dump the Innovator FPGA rev early - useful info for support. */
- printk("Innovator FPGA Rev %d.%d Board Rev %d\n",
- fpga_read(OMAP1510P1_FPGA_REV_HIGH),
- fpga_read(OMAP1510P1_FPGA_REV_LOW),
- fpga_read(OMAP1510P1_FPGA_BOARD_REV));
-}
-
-MACHINE_START(INNOVATOR, "TI-Innovator/OMAP1510")
- MAINTAINER("MontaVista Software, Inc.")
- BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000)
- BOOT_PARAMS(0x10000100)
- MAPIO(innovator_map_io)
- INITIRQ(innovator_init_irq)
- INIT_MACHINE(innovator_init)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-omap/innovator1610.c
- *
- * This file contains Innovator-specific code.
- *
- * Copyright (C) 2002 MontaVista Software, Inc.
- *
- * Copyright (C) 2001 RidgeRun, Inc.
- * Author: Greg Lonnon <glonnon@ridgerun.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/major.h>
-#include <linux/kernel.h>
-#include <linux/device.h>
-#include <linux/errno.h>
-
-#include <asm/setup.h>
-#include <asm/page.h>
-#include <asm/hardware.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/arch/irqs.h>
-
-#include "common.h"
-
-void
-innovator_init_irq(void)
-{
- omap_init_irq();
-}
-
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = OMAP1610_ETHR_START, /* Physical */
- .end = OMAP1610_ETHR_START + SZ_4K,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0, /* Really GPIO 0 */
- .end = 0,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-static struct platform_device *devices[] __initdata = {
- &smc91x_device,
-};
-
-static void __init innovator_init(void)
-{
- if (!machine_is_innovator())
- return;
-
- (void) platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-static struct map_desc innovator_io_desc[] __initdata = {
-{ OMAP1610_ETHR_BASE, OMAP1610_ETHR_START, OMAP1610_ETHR_SIZE,MT_DEVICE },
-{ OMAP1610_NOR_FLASH_BASE, OMAP1610_NOR_FLASH_START, OMAP1610_NOR_FLASH_SIZE,
- MT_DEVICE },
-};
-
-static void __init innovator_map_io(void)
-{
- omap_map_io();
- iotable_init(innovator_io_desc, ARRAY_SIZE(innovator_io_desc));
-}
-
-MACHINE_START(INNOVATOR, "TI-Innovator/OMAP1610")
- MAINTAINER("MontaVista Software, Inc.")
- BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000)
- BOOT_PARAMS(0x10000100)
- MAPIO(innovator_map_io)
- INITIRQ(innovator_init_irq)
- INIT_MACHINE(innovator_init)
-MACHINE_END
-
+++ /dev/null
-/*
- * linux/arch/arm/mach-omap/irq.h
- *
- * OMAP specific interrupt bank definitions
- *
- * Copyright (C) 2004 Nokia Corporation
- * Written by Tony Lindgren <tony@atomide.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#define OMAP_IRQ_TYPE710 1
-#define OMAP_IRQ_TYPE730 2
-#define OMAP_IRQ_TYPE1510 3
-#define OMAP_IRQ_TYPE1610 4
-#define OMAP_IRQ_TYPE1710 5
-
-#define MAX_NR_IRQ_BANKS 4
-
-#define BANK_NR_IRQS 32
-
-struct omap_irq_desc {
- unsigned int cpu_type;
- unsigned int start_irq;
- unsigned long level_map;
- unsigned long base_reg;
- unsigned long mask_reg;
- unsigned long ack_reg;
- struct irqchip *handler;
-};
-
-struct omap_irq_bank {
- unsigned int start_irq;
- unsigned long level_map;
- unsigned long base_reg;
- unsigned long mask_reg;
- unsigned long ack_reg;
- struct irqchip *handler;
-};
-
-static void omap_offset_ack_irq(unsigned int irq);
-static void omap_offset_mask_irq(unsigned int irq);
-static void omap_offset_unmask_irq(unsigned int irq);
-static void omap_offset_mask_ack_irq(unsigned int irq);
-
-/* NOTE: These will not work if irq bank offset != 0x100 */
-#define IRQ_TO_BANK(irq) (irq >> 5)
-#define IRQ_BIT(irq) (irq & 0x1f)
-#define BANK_OFFSET(bank) ((bank - 1) * 0x100)
-
-static struct irqchip omap_offset_irq = {
- .ack = omap_offset_mask_ack_irq,
- .mask = omap_offset_mask_irq,
- .unmask = omap_offset_unmask_irq,
-};
-
-/*
- * OMAP-730 interrupt banks
- */
-static struct omap_irq_desc omap730_bank0_irqs __initdata = {
- .cpu_type = OMAP_IRQ_TYPE730,
- .start_irq = 0,
- .level_map = 0xb3f8e22f,
- .base_reg = OMAP_IH1_BASE,
- .mask_reg = OMAP_IH1_BASE + IRQ_MIR,
- .ack_reg = OMAP_IH1_BASE + IRQ_CONTROL_REG,
- .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */
-};
-
-static struct omap_irq_desc omap730_bank1_irqs __initdata = {
- .cpu_type = OMAP_IRQ_TYPE730,
- .start_irq = 32,
- .level_map = 0xfdb9c1f2,
- .base_reg = OMAP_IH2_BASE,
- .mask_reg = OMAP_IH2_BASE + IRQ_MIR,
- .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG,
- .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */
-};
-
-static struct omap_irq_desc omap730_bank2_irqs __initdata = {
- .cpu_type = OMAP_IRQ_TYPE730,
- .start_irq = 64,
- .level_map = 0x800040f3,
- .base_reg = OMAP_IH2_BASE + 0x100,
- .mask_reg = OMAP_IH2_BASE + 0x100 + IRQ_MIR,
- .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG, /* Not replicated */
- .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */
-};
-
-/*
- * OMAP-1510 interrupt banks
- */
-static struct omap_irq_desc omap1510_bank0_irqs __initdata = {
- .cpu_type = OMAP_IRQ_TYPE1510,
- .start_irq = 0,
- .level_map = 0xb3febfff,
- .base_reg = OMAP_IH1_BASE,
- .mask_reg = OMAP_IH1_BASE + IRQ_MIR,
- .ack_reg = OMAP_IH1_BASE + IRQ_CONTROL_REG,
- .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */
-};
-
-static struct omap_irq_desc omap1510_bank1_irqs __initdata = {
- .cpu_type = OMAP_IRQ_TYPE1510,
- .start_irq = 32,
- .level_map = 0xffbfffed,
- .base_reg = OMAP_IH2_BASE,
- .mask_reg = OMAP_IH2_BASE + IRQ_MIR,
- .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG,
- .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */
-};
-
-/*
- * OMAP-1610 interrupt banks
- */
-static struct omap_irq_desc omap1610_bank0_irqs __initdata = {
- .cpu_type = OMAP_IRQ_TYPE1610,
- .start_irq = 0,
- .level_map = 0xb3fefe8f,
- .base_reg = OMAP_IH1_BASE,
- .mask_reg = OMAP_IH1_BASE + IRQ_MIR,
- .ack_reg = OMAP_IH1_BASE + IRQ_CONTROL_REG,
- .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */
-};
-
-static struct omap_irq_desc omap1610_bank1_irqs __initdata = {
- .cpu_type = OMAP_IRQ_TYPE1610,
- .start_irq = 32,
- .level_map = 0xfffff7ff,
- .base_reg = OMAP_IH2_BASE,
- .mask_reg = OMAP_IH2_BASE + IRQ_MIR,
- .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG,
- .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */
-};
-
-static struct omap_irq_desc omap1610_bank2_irqs __initdata = {
- .cpu_type = OMAP_IRQ_TYPE1610,
- .start_irq = 64,
- .level_map = 0xffffffff,
- .base_reg = OMAP_IH2_BASE + 0x100,
- .mask_reg = OMAP_IH2_BASE + 0x100 + IRQ_MIR,
- .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG, /* Not replicated */
- .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */
-};
-
-static struct omap_irq_desc omap1610_bank3_irqs __initdata = {
- .cpu_type = OMAP_IRQ_TYPE1610,
- .start_irq = 96,
- .level_map = 0xffffffff,
- .base_reg = OMAP_IH2_BASE + 0x200,
- .mask_reg = OMAP_IH2_BASE + 0x200 + IRQ_MIR,
- .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG, /* Not replicated */
- .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */
-};
+++ /dev/null
-/*
- * linux/arch/arm/mach-omap/leds-perseus2.c
- *
- * Copyright 2003 by Texas Instruments Incorporated
- *
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/kernel_stat.h>
-#include <linux/sched.h>
-#include <linux/version.h>
-
-#include <asm/io.h>
-#include <asm/hardware.h>
-#include <asm/leds.h>
-#include <asm/system.h>
-
-#include "leds.h"
-
-void perseus2_leds_event(led_event_t evt)
-{
- unsigned long flags;
- static unsigned long hw_led_state = 0;
-
- local_irq_save(flags);
-
- switch (evt) {
- case led_start:
- hw_led_state |= OMAP730_FPGA_LED_STARTSTOP;
- break;
-
- case led_stop:
- hw_led_state &= ~OMAP730_FPGA_LED_STARTSTOP;
- break;
-
- case led_claim:
- hw_led_state |= OMAP730_FPGA_LED_CLAIMRELEASE;
- break;
-
- case led_release:
- hw_led_state &= ~OMAP730_FPGA_LED_CLAIMRELEASE;
- break;
-
-#ifdef CONFIG_LEDS_TIMER
- case led_timer:
- /*
- * Toggle Timer LED
- */
- if (hw_led_state & OMAP730_FPGA_LED_TIMER)
- hw_led_state &= ~OMAP730_FPGA_LED_TIMER;
- else
- hw_led_state |= OMAP730_FPGA_LED_TIMER;
- break;
-#endif
-
-#ifdef CONFIG_LEDS_CPU
- case led_idle_start:
- hw_led_state |= OMAP730_FPGA_LED_IDLE;
- break;
-
- case led_idle_end:
- hw_led_state &= ~OMAP730_FPGA_LED_IDLE;
- break;
-#endif
-
- case led_halted:
- if (hw_led_state & OMAP730_FPGA_LED_HALTED)
- hw_led_state &= ~OMAP730_FPGA_LED_HALTED;
- else
- hw_led_state |= OMAP730_FPGA_LED_HALTED;
- break;
-
- case led_green_on:
- break;
-
- case led_green_off:
- break;
-
- case led_amber_on:
- break;
-
- case led_amber_off:
- break;
-
- case led_red_on:
- break;
-
- case led_red_off:
- break;
-
- default:
- break;
- }
-
-
- /*
- * Actually burn the LEDs
- */
- __raw_writew(~hw_led_state & 0xffff, OMAP730_FPGA_LEDS);
-
- local_irq_restore(flags);
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-omap/generic.c
- *
- * Modified from innovator.c
- *
- * Code for generic OMAP board. Should work on many OMAP systems where
- * the device drivers take care of all the necessary hardware initialization.
- * Do not put any board specific code to this file; create a new machine
- * type if you need custom low-level initializations.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/device.h>
-
-#include <asm/hardware.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <asm/arch/clocks.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/mux.h>
-
-#include "common.h"
-
-static void __init omap_generic_init_irq(void)
-{
- omap_init_irq();
-}
-
-/*
- * Muxes the serial ports on
- */
-static void __init omap_early_serial_init(void)
-{
- omap_cfg_reg(UART1_TX);
- omap_cfg_reg(UART1_RTS);
-
- omap_cfg_reg(UART2_TX);
- omap_cfg_reg(UART2_RTS);
-
- omap_cfg_reg(UART3_TX);
- omap_cfg_reg(UART3_RX);
-}
-
-static void __init omap_generic_init(void)
-{
- if (!machine_is_omap_generic())
- return;
-
- /*
- * Make sure the serial ports are muxed on at this point.
- * You have to mux them off in device drivers later on
- * if not needed.
- */
- if (cpu_is_omap1510()) {
- omap_early_serial_init();
- }
-}
-
-static void __init omap_generic_map_io(void)
-{
- omap_map_io();
-}
-
-MACHINE_START(OMAP_GENERIC, "Generic OMAP-1510/1610")
- MAINTAINER("Tony Lindgren <tony@atomide.com>")
- BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000)
- BOOT_PARAMS(0x10000100)
- MAPIO(omap_generic_map_io)
- INITIRQ(omap_generic_init_irq)
- INIT_MACHINE(omap_generic_init)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-omap/omap-perseus2.c
- *
- * Modified from omap-generic.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/device.h>
-
-#include <asm/hardware.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <asm/arch/clocks.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/mux.h>
-
-#include <asm/arch/omap-perseus2.h>
-
-#include "common.h"
-
-void omap_perseus2_init_irq(void)
-{
- omap_init_irq();
-}
-
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = OMAP730_FPGA_ETHR_START, /* Physical */
- .end = OMAP730_FPGA_ETHR_START + SZ_4K,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0,
- .end = 0,
- .flags = INT_ETHER,
- },
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-static struct platform_device *devices[] __initdata = {
- &smc91x_device,
-};
-
-static void __init omap_perseus2_init(void)
-{
- if (!machine_is_omap_perseus2())
- return;
-
- (void) platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-/* Only FPGA needs to be mapped here. All others are done with ioremap */
-static struct map_desc omap_perseus2_io_desc[] __initdata = {
- {OMAP730_FPGA_BASE, OMAP730_FPGA_START, OMAP730_FPGA_SIZE,
- MT_DEVICE},
-};
-
-static void __init omap_perseus2_map_io(void)
-{
- omap_map_io();
- iotable_init(omap_perseus2_io_desc,
- ARRAY_SIZE(omap_perseus2_io_desc));
-
- /* Early, board-dependent init */
-
- /*
- * Hold GSM Reset until needed
- */
- *DSP_M_CTL &= ~1;
-
- /*
- * UARTs -> done automagically by 8250 driver
- */
-
- /*
- * CSx timings, GPIO Mux ... setup
- */
-
- /* Flash: CS0 timings setup */
- *((volatile __u32 *) OMAP_FLASH_CFG_0) = 0x0000fff3;
- *((volatile __u32 *) OMAP_FLASH_ACFG_0) = 0x00000088;
-
- /*
- * Ethernet support trough the debug board
- * CS1 timings setup
- */
- *((volatile __u32 *) OMAP_FLASH_CFG_1) = 0x0000fff3;
- *((volatile __u32 *) OMAP_FLASH_ACFG_1) = 0x00000000;
-
- /*
- * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
- * It is used as the Ethernet controller interrupt
- */
- *((volatile __u32 *) PERSEUS2_IO_CONF_9) &= 0x1FFFFFFF;
-}
-
-MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
- MAINTAINER("Kevin Hilman <k-hilman@ti.com>")
- BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000)
- BOOT_PARAMS(0x10000100)
- MAPIO(omap_perseus2_map_io)
- INITIRQ(omap_perseus2_init_irq)
- INIT_MACHINE(omap_perseus2_init)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/adsbitsy.c
- *
- * Author: Woojung Huh
- *
- * Pieces specific to the ADS Bitsy
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/ptrace.h>
-#include <linux/ioport.h>
-#include <linux/serial_core.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
-
-#include <asm/mach/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-static struct resource sa1111_resources[] = {
- [0] = {
- .start = 0x18000000,
- .end = 0x18001fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_GPIO0,
- .end = IRQ_GPIO0,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 sa1111_dmamask = 0xffffffffUL;
-
-static struct platform_device sa1111_device = {
- .name = "sa1111",
- .id = 0,
- .dev = {
- .dma_mask = &sa1111_dmamask,
- .coherent_dma_mask = 0xffffffff,
- },
- .num_resources = ARRAY_SIZE(sa1111_resources),
- .resource = sa1111_resources,
-};
-
-static struct platform_device *devices[] __initdata = {
- &sa1111_device,
-};
-
-static int __init adsbitsy_init(void)
-{
- int ret;
-
- if (!machine_is_adsbitsy())
- return -ENODEV;
-
- /*
- * Ensure that the memory bus request/grant signals are setup,
- * and the grant is held in its inactive state
- */
- sa1110_mb_disable();
-
- /*
- * Reset SA1111
- */
- GPCR |= GPIO_GPIO26;
- udelay(1000);
- GPSR |= GPIO_GPIO26;
-
- /*
- * Probe for SA1111.
- */
- ret = platform_add_devices(devices, ARRAY_SIZE(devices));
- if (ret < 0)
- return ret;
-
- /*
- * Enable PWM control for LCD
- */
- sa1111_enable_device(SKPCR_PWMCLKEN);
- SKPWM0 = 0x7F; // VEE
- SKPEN0 = 1;
- SKPWM1 = 0x01; // Backlight
- SKPEN1 = 1;
-
- return 0;
-}
-
-arch_initcall(adsbitsy_init);
-
-static void __init adsbitsy_init_irq(void)
-{
- /* First the standard SA1100 IRQs */
- sa1100_init_irq();
-}
-
-static struct map_desc adsbitsy_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf4000000, 0x18000000, 0x00800000, MT_DEVICE } /* SA1111 */
-};
-
-static int adsbitsy_uart_open(struct uart_port *port, struct uart_info *info)
-{
- if (port->mapbase == _Ser1UTCR0) {
- Ser1SDCR0 |= SDCR0_UART;
-#error Fixme // Set RTS High (should be done in the set_mctrl fn)
- GPCR = GPIO_GPIO15;
- } else if (port->mapbase == _Ser2UTCR0) {
- Ser2UTCR4 = Ser2HSCR0 = 0;
-#error Fixme // Set RTS High (should be done in the set_mctrl fn)
- GPCR = GPIO_GPIO17;
- } else if (port->mapbase == _Ser2UTCR0) {
-#error Fixme // Set RTS High (should be done in the set_mctrl fn)
- GPCR = GPIO_GPIO19;
- }
- return 0;
-}
-
-static struct sa1100_port_fns adsbitsy_port_fns __initdata = {
- .open = adsbitsy_uart_open,
-};
-
-static void __init adsbitsy_map_io(void)
-{
- sa1100_map_io();
- iotable_init(adsbitsy_io_desc, ARRAY_SIZE(adsbitsy_io_desc));
-
- sa1100_register_uart_fns(&adsbitsy_port_fns);
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
- sa1100_register_uart(2, 2);
- GPDR |= GPIO_GPIO15 | GPIO_GPIO17 | GPIO_GPIO19;
- GPDR &= ~(GPIO_GPIO14 | GPIO_GPIO16 | GPIO_GPIO18);
-}
-
-MACHINE_START(ADSBITSY, "ADS Bitsy")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- MAPIO(adsbitsy_map_io)
- INITIRQ(adsbitsy_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/brutus.c
- *
- * Author: Nicolas Pitre
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-
-#include <asm/hardware.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-static void __init brutus_map_io(void)
-{
- sa1100_map_io();
-
- sa1100_register_uart(0, 1);
- sa1100_register_uart(1, 3);
- GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
- GPDR |= GPIO_UART_TXD;
- GPDR &= ~GPIO_UART_RXD;
- PPAR |= PPAR_UPR;
-}
-
-MACHINE_START(BRUTUS, "Intel Brutus (SA1100 eval board)")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- MAPIO(brutus_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/empeg.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-
-#include <asm/hardware.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-static struct map_desc empeg_io_desc[] __initdata = {
- /* virtual physical length type */
- { EMPEG_FLASHBASE, 0x00000000, 0x00200000, MT_DEVICE } /* Flash */
-};
-
-static void __init empeg_map_io(void)
-{
- sa1100_map_io();
- iotable_init(empeg_io_desc, ARRAY_SIZE(empeg_io_desc));
-
- sa1100_register_uart(0, 1);
- sa1100_register_uart(1, 3);
- sa1100_register_uart(2, 2);
- Ser1SDCR0 |= SDCR0_UART;
-}
-
-MACHINE_START(EMPEG, "empeg MP3 Car Audio Player")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- MAPIO(empeg_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/flexanet.c
- *
- * Author: Jordi Colomer <jco@ict.es>
- *
- * This file contains all FlexaNet-specific tweaks.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/delay.h>
-
-#include <asm/hardware.h>
-#include <asm/setup.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-#include <linux/serial_core.h>
-
-#include "generic.h"
-
-
-unsigned long flexanet_BCR = FHH_BCR_POWERUP;
-
-EXPORT_SYMBOL(flexanet_BCR);
-
-/* physical addresses */
-#define _RCNR 0x90010004
-#define _GPLR 0x90040000
-#define _Ser4SSCR0 0x80070060
-
-/*
- * Get the modem-control register of the UARTs
- *
- */
-static int flexanet_get_mctrl(struct uart_port *port)
-{
- int stat = 0;
- unsigned long bsr;
-
- /* only DSR and CTS are implemented in UART1 & 3 */
- if (port->membase == (void *)&Ser1UTCR0)
- {
- bsr = FHH_BSR;
-
- if ((bsr & FHH_BSR_DSR1) != 0)
- stat |= TIOCM_DSR;
- if ((bsr & FHH_BSR_CTS1) != 0)
- stat |= TIOCM_CTS;
- }
- else if (port->membase == (void *)&Ser3UTCR0)
- {
- bsr = FHH_BSR;
-
- if ((bsr & FHH_BSR_DSR3) != 0)
- stat |= TIOCM_DSR;
- if ((bsr & FHH_BSR_CTS3) != 0)
- stat |= TIOCM_CTS;
- }
-
- return stat;
-}
-
-/*
- * Set the modem-control register of the UARTs
- *
- */
-static void flexanet_set_mctrl(struct uart_port *port, u_int mctrl)
-{
- unsigned long flags;
-
- /* only the RTS signal is implemented in UART1 & 3 */
- if (port->membase == (void *)&Ser1UTCR0)
- {
- local_irq_save(flags);
-
- if (mctrl & TIOCM_RTS)
- flexanet_BCR |= FHH_BCR_RTS1;
- else
- flexanet_BCR &= ~FHH_BCR_RTS1;
-
- FHH_BCR = flexanet_BCR;
- local_irq_restore(flags);
- }
- else if (port->membase == (void *)&Ser3UTCR0)
- {
- local_irq_save(flags);
-
- if (mctrl & TIOCM_RTS)
- flexanet_BCR |= FHH_BCR_RTS3;
- else
- flexanet_BCR &= ~FHH_BCR_RTS3;
-
- FHH_BCR = flexanet_BCR;
- local_irq_restore(flags);
- }
-}
-
-/*
- * machine-specific serial port functions
- *
- * get_mctrl : set state of modem control lines
- * set_mctrl : set the modem control lines
- * pm : power-management. Turn device on/off.
- *
- */
-static struct sa1100_port_fns flexanet_port_fns __initdata =
-{
- set_mctrl : flexanet_set_mctrl,
- get_mctrl : flexanet_get_mctrl,
- pm : NULL,
-};
-
-
-/*
- * Initialization and serial port mapping
- *
- */
-
-static int flexanet_serial_init(void)
-{
- /* register low-level functions */
- sa1100_register_uart_fns(&flexanet_port_fns);
-
- /* UART port number mapping */
- sa1100_register_uart(0, 1); /* RS232 */
- sa1100_register_uart(1, 3); /* Radio */
-
- /* Select UART function in Serial port 1 */
- Ser1SDCR0 |= SDCR0_UART;
-
- return 0;
-}
-
-
-static struct map_desc flexanet_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf0000000, 0x10000000, 0x00001000, MT_DEVICE }, /* Board Control Register */
- { 0xf1000000, 0x18000000, 0x01000000, MT_DEVICE }, /* Ethernet controller */
- { 0xD0000000, 0x40000000, 0x01000000, MT_DEVICE }, /* Instrument boards */
- { 0xD8000000, 0x48000000, 0x01000000, MT_DEVICE } /* External peripherals */
-};
-
-static void __init flexanet_map_io(void)
-{
- sa1100_map_io();
- iotable_init(flexanet_io_desc, ARRAY_SIZE(flexanet_io_desc));
- flexanet_serial_init();
-
- /* wakeup source is GPIO-0 only */
- PWER = PWER_GPIO0;
-
- /* GPIOs set to zero during sleep */
- PGSR = 0;
-
- /*
- * stop the 3.68 MHz oscillator and float control busses
- * during sleep, since peripherals are powered off.
- */
- PCFR = PCFR_OPDE | PCFR_FP | PCFR_FS;
-
- /* deassert the GUI reset */
- FLEXANET_BCR_set(FHH_BCR_GUI_NRST);
-
- /*
- * Set IRQ edges
- */
- set_GPIO_IRQ_edge(GPIO_GUI_IRQ, GPIO_RISING_EDGE);
-}
-
-
-MACHINE_START(FLEXANET, "FlexaNet")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- BOOT_PARAMS(0xc0000100)
- MAPIO(flexanet_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
-
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/freebird.c
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-
-unsigned long BCR_value = BCR_DB1110;
-EXPORT_SYMBOL(BCR_value);
-
-static void freebird_backlight_power(int on)
-{
-#error FIXME
- if (on) {
- BCR_set(BCR_FREEBIRD_LCD_PWR | BCR_FREEBIRD_LCD_DISP);
- /* Turn on backlight, Chester */
- BCR_set(BCR_FREEBIRD_LCD_BACKLIGHT);
- } else {
- BCR_clear(BCR_FREEBIRD_LCD_PWR | BCR_FREEBIRD_LCD_DISP
- /* | BCR_FREEBIRD_LCD_BACKLIGHT */);
- }
-}
-
-static void freebird_lcd_power(int on)
-{
-}
-
-static int __init freebird_init(void)
-{
- if (machine_is_freebird()) {
- sa1100fb_backlight_power = freebird_backlight_power;
- sa1100fb_lcd_power = freebird_lcd_power;
- }
- return 0;
-}
-
-arch_initcall(freebird_init);
-
-static struct map_desc freebird_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf0000000, 0x12000000, 0x00100000, MT_DEVICE }, /* Board Control Register */
- { 0xf2000000, 0x19000000, 0x00100000, MT_DEVICE }
-};
-
-static void __init freebird_map_io(void)
-{
- sa1100_map_io();
- iotable_init(freebird_io_desc, ARRAY_SIZE(freebird_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-
- /* Set up sleep mode registers */
- PWER = 0x1;
- PGSR = 0x0;
- PCFR = PCFR_OPDE | PCFR_FP | PCFR_FS;
-}
-
-MACHINE_START(FREEBIRD, "Freebird-HPC-1.1")
- BOOT_MEM(0xc0000000,0x80000000, 0xf8000000)
-#ifdef CONFIG_SA1100_FREEBIRD_NEW
- BOOT_PARAMS(0xc0000100)
-#endif
- MAPIO(freebird_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/graphicsclient.c
- *
- * Author: Nicolas Pitre
- *
- * Pieces specific to the GraphicsClient board
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/ptrace.h>
-
-#include <asm/hardware.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
-
-#include <asm/mach/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-#include <linux/serial_core.h>
-
-#include "generic.h"
-
-
-/*
- * Handlers for GraphicsClient's external IRQ logic
- */
-
-static void
-gc_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
-{
- unsigned int mask;
-
- while ((mask = ADS_INT_ST1 | (ADS_INT_ST2 << 8))) {
- /* clear the parent IRQ */
- GEDR = GPIO_GPIO0;
-
- irq = ADS_EXT_IRQ(0);
- desc = irq_desc + irq;
-
- do {
- if (mask & 1)
- desc->handle(irq, desc, regs);
- mask >>= 1;
- irq++;
- desc++;
- } while (mask);
- }
-}
-
-static void gc_mask_irq1(unsigned int irq)
-{
- int mask = (1 << (irq - ADS_EXT_IRQ(0)));
- ADS_INT_EN1 &= ~mask;
- ADS_INT_ST1 = mask;
-}
-
-static void gc_unmask_irq1(unsigned int irq)
-{
- ADS_INT_EN1 |= (1 << (irq - ADS_EXT_IRQ(0)));
-}
-
-static struct irqchip gc_irq1_chip = {
- .ack = gc_mask_irq1,
- .mask = gc_mask_irq1,
- .unmask = gc_unmask_irq1,
-};
-
-static void gc_mask_irq2(unsigned int irq)
-{
- int mask = (1 << (irq - ADS_EXT_IRQ(8)));
- ADS_INT_EN2 &= ~mask;
- ADS_INT_ST2 = mask;
-}
-
-static void gc_unmask_irq2(unsigned int irq)
-{
- ADS_INT_EN2 |= (1 << (irq - ADS_EXT_IRQ(8)));
-}
-
-static struct irqchip gc_irq2_chip = {
- .ack = gc_mask_irq2,
- .mask = gc_mask_irq2,
- .unmask = gc_unmask_irq2,
-};
-
-static void __init graphicsclient_init_irq(void)
-{
- unsigned int irq;
-
- /* First the standard SA1100 IRQs */
- sa1100_init_irq();
-
- /* disable all IRQs */
- ADS_INT_EN1 = 0;
- ADS_INT_EN2 = 0;
-
- /* clear all IRQs */
- ADS_INT_ST1 = 0xff;
- ADS_INT_ST2 = 0xff;
-
- for (irq = ADS_EXT_IRQ(0); irq <= ADS_EXT_IRQ(7); irq++) {
- set_irq_chip(irq, &gc_irq1_chip);
- set_irq_handler(irq, do_level_IRQ);
- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
- }
- for (irq = ADS_EXT_IRQ(8); irq <= ADS_EXT_IRQ(15); irq++) {
- set_irq_chip(irq, &gc_irq2_chip);
- set_irq_handler(irq, do_level_IRQ);
- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
- }
- set_irq_type(IRQ_GPIO0, IRQT_FALLING);
- set_irq_chained_handler(IRQ_GPIO0, gc_irq_handler);
-}
-
-
-static struct map_desc graphicsclient_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf0000000, 0x10000000, 0x00400000, MT_DEVICE }, /* CPLD */
- { 0xf1000000, 0x18000000, 0x00400000, MT_DEVICE } /* CAN */
-};
-
-static u_int graphicsclient_get_mctrl(struct uart_port *port)
-{
- u_int result = TIOCM_CD | TIOCM_DSR;
-
- if (port->mapbase == _Ser1UTCR0) {
- if (!(GPLR & GPIO_GC_UART0_CTS))
- result |= TIOCM_CTS;
- } else if (port->mapbase == _Ser2UTCR0) {
- if (!(GPLR & GPIO_GC_UART1_CTS))
- result |= TIOCM_CTS;
- } else if (port->mapbase == _Ser3UTCR0) {
- if (!(GPLR & GPIO_GC_UART2_CTS))
- result |= TIOCM_CTS;
- } else {
- result = TIOCM_CTS;
- }
-
- return result;
-}
-
-static void graphicsclient_set_mctrl(struct uart_port *port, u_int mctrl)
-{
- if (port->mapbase == _Ser1UTCR0) {
- if (mctrl & TIOCM_RTS)
- GPCR = GPIO_GC_UART0_RTS;
- else
- GPSR = GPIO_GC_UART0_RTS;
- } else if (port->mapbase == _Ser2UTCR0) {
- if (mctrl & TIOCM_RTS)
- GPCR = GPIO_GC_UART1_RTS;
- else
- GPSR = GPIO_GC_UART1_RTS;
- } else if (port->mapbase == _Ser3UTCR0) {
- if (mctrl & TIOCM_RTS)
- GPCR = GPIO_GC_UART2_RTS;
- else
- GPSR = GPIO_GC_UART2_RTS;
- }
-}
-
-static void
-graphicsclient_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- if (!state) {
- /* make serial ports work ... */
- Ser2UTCR4 = 0;
- Ser2HSCR0 = 0;
- Ser1SDCR0 |= SDCR0_UART;
- }
-}
-
-static struct sa1100_port_fns graphicsclient_port_fns __initdata = {
- .get_mctrl = graphicsclient_get_mctrl,
- .set_mctrl = graphicsclient_set_mctrl,
- .pm = graphicsclient_uart_pm,
-};
-
-static void __init graphicsclient_map_io(void)
-{
- sa1100_map_io();
- iotable_init(graphicsclient_io_desc, ARRAY_SIZE(graphicsclient_io_desc));
-
- sa1100_register_uart_fns(&graphicsclient_port_fns);
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
- sa1100_register_uart(2, 2);
- GPDR |= GPIO_GC_UART0_RTS | GPIO_GC_UART1_RTS | GPIO_GC_UART2_RTS;
- GPDR &= ~(GPIO_GC_UART0_CTS | GPIO_GC_UART1_RTS | GPIO_GC_UART2_RTS);
-}
-
-MACHINE_START(GRAPHICSCLIENT, "ADS GraphicsClient")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- MAPIO(graphicsclient_map_io)
- INITIRQ(graphicsclient_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/graphicsmaster.c
- *
- * Pieces specific to the GraphicsMaster board
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/ptrace.h>
-#include <linux/ioport.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
-
-#include <asm/mach/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-static struct resource sa1111_resources[] = {
- [0] = {
- .start = 0x18000000,
- .end = 0x18001fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = ADS_EXT_IRQ(0),
- .end = ADS_EXT_IRQ(0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 sa1111_dmamask = 0xffffffffUL;
-
-static struct platform_device sa1111_device = {
- .name = "sa1111",
- .id = 0,
- .dev = {
- .dma_mask = &sa1111_dmamask,
- .coherent_dma_mask = 0xffffffff,
- },
- .num_resources = ARRAY_SIZE(sa1111_resources),
- .resource = sa1111_resources,
-};
-
-static struct platform_device *devices[] __initdata = {
- &sa1111_device,
-};
-
-static int __init graphicsmaster_init(void)
-{
- int ret;
-
- if (!machine_is_graphicsmaster())
- return -ENODEV;
-
- /*
- * Ensure that the memory bus request/grant signals are setup,
- * and the grant is held in its inactive state
- */
- sa1110_mb_disable();
-
- /*
- * Probe for SA1111.
- */
- ret = platform_add_devices(devices, ARRAY_SIZE(devices));
- if (ret < 0)
- return ret;
-
- /*
- * Enable PWM control for LCD
- */
- sa1111_enable_device(SKPCR_PWMCLKEN);
- SKPWM0 = 0x7F; // VEE
- SKPEN0 = 1;
- SKPWM1 = 0x01; // Backlight
- SKPEN1 = 1;
-
- return 0;
-}
-
-arch_initcall(graphicsmaster_init);
-
-/*
- * Handlers for GraphicsMaster's external IRQ logic
- */
-
-static void
-gm_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
-{
- unsigned int mask;
-
- while ((mask = ADS_INT_ST1 | (ADS_INT_ST2 << 8))) {
- /* clear the parent IRQ */
- GEDR = GPIO_GPIO0;
-
- irq = ADS_EXT_IRQ(0);
- desc = irq_desc + irq;
-
- do {
- if (mask & 1)
- desc->handle(irq, desc, regs);
- mask >>= 1;
- irq++;
- desc++;
- } while (mask);
- }
-}
-
-static void gm_mask_irq1(unsigned int irq)
-{
- int mask = (1 << (irq - ADS_EXT_IRQ(0)));
- ADS_INT_EN1 &= ~mask;
- ADS_INT_ST1 = mask;
-}
-
-static void gm_unmask_irq1(unsigned int irq)
-{
- ADS_INT_EN1 |= (1 << (irq - ADS_EXT_IRQ(0)));
-}
-
-static struct irqchip gm_irq1_chip = {
- .ack = gm_mask_irq1,
- .mask = gm_mask_irq1,
- .unmask = gm_unmask_irq1,
-};
-
-static void gm_mask_irq2(unsigned int irq)
-{
- int mask = (1 << (irq - ADS_EXT_IRQ(8)));
- ADS_INT_EN2 &= ~mask;
- ADS_INT_ST2 = mask;
-}
-
-static void gm_unmask_irq2(unsigned int irq)
-{
- ADS_INT_EN2 |= (1 << (irq - ADS_EXT_IRQ(8)));
-}
-
-static struct irqchip gm_irq2_chip = {
- .ack = gm_mask_irq2,
- .mask = gm_mask_irq2,
- .unmask = gm_unmask_irq2,
-};
-
-static void __init graphicsmaster_init_irq(void)
-{
- unsigned int irq;
-
- /* First the standard SA1100 IRQs */
- sa1100_init_irq();
-
- /* disable all IRQs */
- ADS_INT_EN1 = 0;
- ADS_INT_EN2 = 0;
-
- /* clear all IRQs */
- ADS_INT_ST1 = 0xff;
- ADS_INT_ST2 = 0xff;
-
- for (irq = ADS_EXT_IRQ(0); irq <= ADS_EXT_IRQ(7); irq++) {
- set_irq_chip(irq, &gm_irq1_chip);
- set_irq_handler(irq, do_level_IRQ);
- set_irq_flags(irq, IRQF_PROBE | IRQF_VALID);
- }
- for (irq = ADS_EXT_IRQ(8); irq <= ADS_EXT_IRQ(15); irq++) {
- set_irq_chip(irq, &gm_irq2_chip);
- set_irq_handler(irq, do_level_IRQ);
- set_irq_flags(irq, IRQF_PROBE | IRQF_VALID);
- }
- set_irq_type(IRQ_GPIO0, IRQT_FALLING);
- set_irq_chained_handler(IRQ_GPIO0, gm_irq_handler);
-}
-
-
-static struct map_desc graphicsmaster_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf0000000, 0x10000000, 0x00400000, MT_DEVICE }, /* CPLD */
- { 0xf1000000, 0x40000000, 0x00400000, MT_DEVICE }, /* CAN */
- { 0xf4000000, 0x18000000, 0x00800000, MT_DEVICE } /* SA-1111 */
-};
-
-#error Old code. Someone needs to decide what to do about this.
-#if 0
-static int graphicsmaster_uart_open(struct uart_port *port, struct uart_info *info)
-{
- int ret = 0;
-
- if (port->mapbase == _Ser1UTCR0) {
- Ser1SDCR0 |= SDCR0_UART;
- /* Set RTS Output */
- GPSR = GPIO_GPIO15;
- }
- else if (port->mapbase == _Ser2UTCR0) {
- Ser2UTCR4 = Ser2HSCR0 = 0;
- /* Set RTS Output */
- GPSR = GPIO_GPIO17;
- }
- else if (port->mapbase == _Ser3UTCR0) {
- /* Set RTS Output */
- GPSR = GPIO_GPIO19;
- }
- return ret;
-}
-#endif
-
-static u_int graphicsmaster_get_mctrl(struct uart_port *port)
-{
- u_int result = TIOCM_CD | TIOCM_DSR;
-
- if (port->mapbase == _Ser1UTCR0) {
- if (!(GPLR & GPIO_GPIO14))
- result |= TIOCM_CTS;
- } else if (port->mapbase == _Ser2UTCR0) {
- if (!(GPLR & GPIO_GPIO16))
- result |= TIOCM_CTS;
- } else if (port->mapbase == _Ser3UTCR0) {
- if (!(GPLR & GPIO_GPIO17))
- result |= TIOCM_CTS;
- } else {
- result = TIOCM_CTS;
- }
-
- return result;
-}
-
-static void graphicsmaster_set_mctrl(struct uart_port *port, u_int mctrl)
-{
- if (port->mapbase == _Ser1UTCR0) {
- if (mctrl & TIOCM_RTS)
- GPCR = GPIO_GPIO15;
- else
- GPSR = GPIO_GPIO15;
- } else if (port->mapbase == _Ser2UTCR0) {
- if (mctrl & TIOCM_RTS)
- GPCR = GPIO_GPIO17;
- else
- GPSR = GPIO_GPIO17;
- } else if (port->mapbase == _Ser3UTCR0) {
- if (mctrl & TIOCM_RTS)
- GPCR = GPIO_GPIO19;
- else
- GPSR = GPIO_GPIO19;
- }
-}
-
-static void
-graphicsmaster_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- if (!state) {
- /* make serial ports work ... */
- Ser2UTCR4 = 0;
- Ser2HSCR0 = 0;
- Ser1SDCR0 |= SDCR0_UART;
- }
-}
-
-static struct sa1100_port_fns graphicsmaster_port_fns __initdata = {
- .get_mctrl = graphicsmaster_get_mctrl,
- .set_mctrl = graphicsmaster_set_mctrl,
- .pm = graphicsmaster_uart_pm,
-};
-
-static void __init graphicsmaster_map_io(void)
-{
- sa1100_map_io();
- iotable_init(graphicsmaster_io_desc, ARRAY_SIZE(graphicsmaster_io_desc));
-
- sa1100_register_uart_fns(&graphicsmaster_port_fns);
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
- sa1100_register_uart(2, 2);
-
- /* set GPDR now */
- GPDR |= GPIO_GPIO15 | GPIO_GPIO17 | GPIO_GPIO19;
- GPDR &= ~(GPIO_GPIO14 | GPIO_GPIO16 | GPIO_GPIO18);
-}
-
-MACHINE_START(GRAPHICSMASTER, "ADS GraphicsMaster")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- MAPIO(graphicsmaster_map_io)
- INITIRQ(graphicsmaster_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/huw_webpanel.c
- *
- */
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-
-unsigned long BCR_value;
-EXPORT_SYMBOL(BCR_value);
-
-static void huw_lcd_power(int on)
-{
- if (on)
- BCR_clear(BCR_TFT_NPWR);
- else
- BCR_set(BCR_TFT_NPWR);
-}
-
-static void huw_backlight_power(int on)
-{
-#error FIXME
- if (on) {
- BCR_set(BCR_CCFL_POW | BCR_PWM_BACKLIGHT);
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_task(200 * HZ / 1000);
- BCR_set(BCR_TFT_ENA);
- }
-}
-
-static int __init init_huw_cs3(void)
-{
- // here we can place some initcode
- // BCR_value = 0x1045bf70; //*((volatile unsigned long*)0xf1fffff0);
- if (machine_is_huw_webpanel()) {
- sa1100fb_lcd_power = huw_lcd_power;
- sa1100fb_backlight_power = huw_backlight_power;
- }
-
- return 0;
-}
-
-arch_initcall(init_huw_cs3);
-
-
-/**
- memory information (JOR):
- 32 MByte - 256KByte bootloader (init at boot time) - 32 kByte save area
- area size = 288 kByte (0x48000 Bytes)
-**/
-static struct map_desc huw_webpanel_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf0000000, 0xc1fb8000, 0x00048000, MT_DEVICE }, /* Parameter */
- { 0xf1000000, 0x18000000, 0x00100000, MT_DEVICE } /* Paules CS3, write only */
-};
-
-static void __init huw_webpanel_map_io(void)
-{
- sa1100_map_io();
- iotable_init(huw_webpanel_io_desc, ARRAY_SIZE(huw_webpanel_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-}
-
-
-MACHINE_START(HUW_WEBPANEL, "HuW-Webpanel")
- MAINTAINER("Roman Jordan")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- MAPIO(huw_webpanel_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/itsy.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-
-#include <asm/hardware.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-/* BRADFIXME The egpio addresses aren't verifiably correct. (i.e. they're most
- likely wrong. */
-static struct map_desc itsy_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf0000000, 0x49000000, 0x01000000, MT_DEVICE } /* EGPIO 0 */
-};
-
-static void __init itsy_map_io(void)
-{
- sa1100_map_io();
- iotable_init(itsy_io_desc, ARRAY_SIZE(itsy_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
- sa1100_register_uart(2, 2);
-}
-
-MACHINE_START(ITSY, "Compaq Itsy")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- BOOT_PARAMS(0xc0000100)
- MAPIO(itsy_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/leds-adsbitsy.c
- *
- * ADS Bitsy LED
- * 7/25/01 Woojung Huh
- */
-#include <linux/config.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/leds.h>
-#include <asm/system.h>
-
-#include "leds.h"
-
-
-#define LED_STATE_ENABLED 1
-#define LED_STATE_CLAIMED 2
-
-static unsigned int led_state;
-static unsigned int hw_led_state;
-
-#define LED_TIMER GPIO_GPIO20 /* green heartbeat */
-
-#define LED_MASK (LED_TIMER)
-
-void adsbitsy_leds_event(led_event_t evt)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- switch (evt) {
- case led_start:
- hw_led_state = 0; /* gc leds are positive logic */
- led_state = LED_STATE_ENABLED;
- break;
-
- case led_stop:
- led_state &= ~LED_STATE_ENABLED;
- break;
-
- case led_claim:
- led_state |= LED_STATE_CLAIMED;
- hw_led_state = LED_MASK;
- break;
-
- case led_release:
- led_state &= ~LED_STATE_CLAIMED;
- hw_led_state = LED_MASK;
- break;
-
-#ifdef CONFIG_LEDS_TIMER
- case led_timer:
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_state ^= LED_TIMER;
- break;
-#endif
-
-#ifdef CONFIG_LEDS_CPU
- case led_idle_start:
- break;
-
- case led_idle_end:
- break;
-#endif
-
- case led_green_on:
- break;
-
- case led_green_off:
- break;
-
- case led_amber_on:
- break;
-
- case led_amber_off:
- break;
-
- case led_red_on:
- break;
-
- case led_red_off:
- break;
-
- default:
- break;
- }
-
- if (led_state & LED_STATE_ENABLED) {
- GPSR = hw_led_state;
- GPCR = hw_led_state ^ LED_MASK;
- }
-
- local_irq_restore(flags);
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/leds-brutus.c
- *
- * Copyright (C) 2000 Nicolas Pitre
- *
- * Brutus uses the LEDs as follows:
- * - D3 (Green, GPIO9) - toggles state every 50 timer interrupts
- * - D17 (Red, GPIO20) - on if system is not idle
- * - D4 (Green, GPIO8) - misc function
- */
-#include <linux/config.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/leds.h>
-#include <asm/system.h>
-
-#include "leds.h"
-
-
-#define LED_STATE_ENABLED 1
-#define LED_STATE_CLAIMED 2
-
-static unsigned int led_state;
-static unsigned int hw_led_state;
-
-#define LED_D3 GPIO_GPIO(9)
-#define LED_D4 GPIO_GPIO(8)
-#define LED_D17 GPIO_GPIO(20)
-#define LED_MASK (LED_D3|LED_D4|LED_D17)
-
-void brutus_leds_event(led_event_t evt)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- switch (evt) {
- case led_start:
- hw_led_state = LED_MASK;
- led_state = LED_STATE_ENABLED;
- break;
-
- case led_stop:
- led_state &= ~LED_STATE_ENABLED;
- break;
-
- case led_claim:
- led_state |= LED_STATE_CLAIMED;
- hw_led_state = LED_MASK;
- break;
-
- case led_release:
- led_state &= ~LED_STATE_CLAIMED;
- hw_led_state = LED_MASK;
- break;
-
-#ifdef CONFIG_LEDS_TIMER
- case led_timer:
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_state ^= LED_D3;
- break;
-#endif
-
-#ifdef CONFIG_LEDS_CPU
- case led_idle_start:
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_state |= LED_D17;
- break;
-
- case led_idle_end:
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_state &= ~LED_D17;
- break;
-#endif
-
- case led_green_on:
- hw_led_state &= ~LED_D4;
- break;
-
- case led_green_off:
- hw_led_state |= LED_D4;
- break;
-
- case led_amber_on:
- break;
-
- case led_amber_off:
- break;
-
- case led_red_on:
- if (led_state & LED_STATE_CLAIMED)
- hw_led_state &= ~LED_D17;
- break;
-
- case led_red_off:
- if (led_state & LED_STATE_CLAIMED)
- hw_led_state |= LED_D17;
- break;
-
- default:
- break;
- }
-
- if (led_state & LED_STATE_ENABLED) {
- GPSR = hw_led_state;
- GPCR = hw_led_state ^ LED_MASK;
- }
-
- local_irq_restore(flags);
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/leds-flexanet.c
- *
- * by Jordi Colomer <jco@ict.es>
- *
- * Flexanet LEDs
- *
- * - Red - toggles state every 50 timer interrupts (Heartbeat)
- * - Green - on if system is not idle (CPU load)
- */
-#include <linux/config.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/leds.h>
-#include <asm/system.h>
-
-#include "leds.h"
-
-
-#define LED_STATE_ENABLED 1
-#define LED_STATE_CLAIMED 2
-
-static unsigned int led_state;
-static unsigned int hw_led_bcr;
-static unsigned int hw_led_gpio;
-
-
-void flexanet_leds_event(led_event_t evt)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- switch (evt) {
- case led_start:
- /* start using LEDs and enable its hardware */
- hw_led_bcr = FHH_BCR_LED_GREEN;
- hw_led_gpio = GPIO_LED_RED;
- led_state = LED_STATE_ENABLED;
- break;
-
- case led_stop:
- /* disable LED h/w */
- led_state &= ~LED_STATE_ENABLED;
- break;
-
- case led_claim:
- /* select LEDs for direct access */
- led_state |= LED_STATE_CLAIMED;
- hw_led_bcr = 0;
- hw_led_gpio = 0;
- break;
-
- case led_release:
- /* release LEDs from direct access */
- led_state &= ~LED_STATE_CLAIMED;
- hw_led_bcr = 0;
- hw_led_gpio = 0;
- break;
-
-#ifdef CONFIG_LEDS_TIMER
- case led_timer:
- /* toggle heartbeat LED */
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_gpio ^= GPIO_LED_RED;
- break;
-#endif
-
-#ifdef CONFIG_LEDS_CPU
- case led_idle_start:
- /* turn off CPU load LED */
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_bcr &= ~FHH_BCR_LED_GREEN;
- break;
-
- case led_idle_end:
- /* turn on CPU load LED */
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_bcr |= FHH_BCR_LED_GREEN;
- break;
-#endif
-
- case led_halted:
- break;
-
-
- /* direct LED access (must be previously claimed) */
- case led_green_on:
- if (led_state & LED_STATE_CLAIMED)
- hw_led_bcr |= FHH_BCR_LED_GREEN;
- break;
-
- case led_green_off:
- if (led_state & LED_STATE_CLAIMED)
- hw_led_bcr &= ~FHH_BCR_LED_GREEN;
- break;
-
- case led_amber_on:
- break;
-
- case led_amber_off:
- break;
-
- case led_red_on:
- if (led_state & LED_STATE_CLAIMED)
- hw_led_gpio |= GPIO_LED_RED;
- break;
-
- case led_red_off:
- if (led_state & LED_STATE_CLAIMED)
- hw_led_gpio &= ~GPIO_LED_RED;
- break;
-
- default:
- break;
- }
-
- if (led_state & LED_STATE_ENABLED)
- {
- /* update LEDs */
- FHH_BCR = flexanet_BCR = (flexanet_BCR & ~FHH_BCR_LED_GREEN) | hw_led_bcr;
- GPSR = hw_led_gpio;
- GPCR = hw_led_gpio ^ GPIO_LED_RED;
- }
-
- local_irq_restore(flags);
-}
-
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/leds-graphicsclient.c
- *
- * GraphicsClient Plus LEDs support
- * Woojung Huh, Feb 13, 2001
- */
-#include <linux/config.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/leds.h>
-#include <asm/system.h>
-
-#include "leds.h"
-
-
-#define LED_STATE_ENABLED 1
-#define LED_STATE_CLAIMED 2
-
-static unsigned int led_state;
-static unsigned int hw_led_state;
-
-#define LED_TIMER ADS_LED0 /* green heartbeat */
-#define LED_USER ADS_LED1 /* amber, boots to on */
-#define LED_IDLE ADS_LED2 /* red has the idle led, if any */
-
-#define LED_MASK (ADS_LED0|ADS_LED1|ADS_LED2)
-
-void graphicsclient_leds_event(led_event_t evt)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- switch (evt) {
- case led_start:
- hw_led_state = 0; /* gc leds are positive logic */
- led_state = LED_STATE_ENABLED;
- break;
-
- case led_stop:
- led_state &= ~LED_STATE_ENABLED;
- break;
-
- case led_claim:
- led_state |= LED_STATE_CLAIMED;
- hw_led_state = LED_MASK;
- break;
-
- case led_release:
- led_state &= ~LED_STATE_CLAIMED;
- hw_led_state = LED_MASK;
- break;
-
-#ifdef CONFIG_LEDS_TIMER
- case led_timer:
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_state ^= LED_TIMER;
- break;
-#endif
-
-#ifdef CONFIG_LEDS_CPU
- case led_idle_start:
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_state &= ~LED_IDLE;
- break;
-
- case led_idle_end:
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_state |= LED_IDLE;
- break;
-#endif
-
- case led_green_on:
- break;
-
- case led_green_off:
- break;
-
- case led_amber_on:
- hw_led_state |= LED_USER;
- break;
-
- case led_amber_off:
- hw_led_state &= ~LED_USER;
- break;
-
- case led_red_on:
- break;
-
- case led_red_off:
- break;
-
- default:
- break;
- }
-
- if (led_state & LED_STATE_ENABLED) {
- GPSR = hw_led_state;
- GPCR = hw_led_state ^ LED_MASK;
- }
-
- local_irq_restore(flags);
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/leds-graphicsmaster.c
- *
- * GraphicsClient Plus LEDs support
- * Woojung Huh, Feb 13, 2001
- */
-#include <linux/config.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/leds.h>
-#include <asm/system.h>
-
-#include "leds.h"
-
-
-#define LED_STATE_ENABLED 1
-#define LED_STATE_CLAIMED 2
-
-static unsigned int led_state;
-static unsigned int hw_led_state;
-
-#define LED_TIMER ADS_LED0 /* green heartbeat */
-#define LED_USER ADS_LED1 /* amber, boots to on */
-#define LED_IDLE ADS_LED2 /* red has the idle led, if any */
-
-#define LED_MASK (ADS_LED0|ADS_LED1|ADS_LED2)
-
-void graphicsmaster_leds_event(led_event_t evt)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- switch (evt) {
- case led_start:
- hw_led_state = 0; /* gc leds are positive logic */
- led_state = LED_STATE_ENABLED;
- break;
-
- case led_stop:
- led_state &= ~LED_STATE_ENABLED;
- break;
-
- case led_claim:
- led_state |= LED_STATE_CLAIMED;
- hw_led_state = LED_MASK;
- break;
-
- case led_release:
- led_state &= ~LED_STATE_CLAIMED;
- hw_led_state = LED_MASK;
- break;
-
-#ifdef CONFIG_LEDS_TIMER
- case led_timer:
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_state ^= LED_TIMER;
- break;
-#endif
-
-#ifdef CONFIG_LEDS_CPU
- case led_idle_start:
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_state &= ~LED_IDLE;
- break;
-
- case led_idle_end:
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_state |= LED_IDLE;
- break;
-#endif
-
- case led_green_on:
- break;
-
- case led_green_off:
- break;
-
- case led_amber_on:
- hw_led_state |= LED_USER;
- break;
-
- case led_amber_off:
- hw_led_state &= ~LED_USER;
- break;
-
- case led_red_on:
- break;
-
- case led_red_off:
- break;
-
- default:
- break;
- }
-
- if (led_state & LED_STATE_ENABLED) {
- GPSR = hw_led_state;
- GPCR = hw_led_state ^ LED_MASK;
- }
-
- local_irq_restore(flags);
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/leds-pfs168.c
- *
- * Author: George Davis <davis_g@mvista.com>
- */
-#include <linux/config.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/leds.h>
-#include <asm/system.h>
-
-#include "leds.h"
-
-
-#define LED_STATE_ENABLED 1
-#define LED_STATE_CLAIMED 2
-
-static unsigned int led_state;
-static unsigned int hw_led_state;
-
-#define LED_GREEN (1)
-#define LED_MASK (1)
-
-void pfs168_leds_event(led_event_t evt)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- switch (evt) {
- case led_start:
- hw_led_state = LED_GREEN;
- led_state = LED_STATE_ENABLED;
- break;
-
- case led_stop:
- led_state &= ~LED_STATE_ENABLED;
- break;
-
- case led_claim:
- led_state |= LED_STATE_CLAIMED;
- hw_led_state = LED_GREEN;
- break;
-
- case led_release:
- led_state &= ~LED_STATE_CLAIMED;
- hw_led_state = LED_GREEN;
- break;
-
-#ifdef CONFIG_LEDS_TIMER
- case led_timer:
- if (!(led_state & LED_STATE_CLAIMED))
- hw_led_state ^= LED_GREEN;
- break;
-#endif
-
-#ifdef CONFIG_LEDS_CPU
- case led_idle_start:
- break;
-
- case led_idle_end:
- break;
-#endif
-
- case led_halted:
- break;
-
- case led_green_on:
- if (led_state & LED_STATE_CLAIMED)
- hw_led_state |= LED_GREEN;
- break;
-
- case led_green_off:
- if (led_state & LED_STATE_CLAIMED)
- hw_led_state &= ~LED_GREEN;
- break;
-
- case led_amber_on:
- break;
-
- case led_amber_off:
- break;
-
- case led_red_on:
- break;
-
- case led_red_off:
- break;
-
- default:
- break;
- }
-
- if (led_state & LED_STATE_ENABLED)
- PFS168_SYSLED = (PFS168_SYSLED & ~LED_MASK) | hw_led_state;
-
- local_irq_restore(flags);
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/leds-system3.c
- *
- * Copyright (C) 2001 Stefan Eletzhofer <stefan.eletzhofer@gmx.de>
- *
- * Original (leds-footbridge.c) by Russell King
- *
- * $Id: leds-system3.c,v 1.1.6.1 2001/12/04 15:19:26 seletz Exp $
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * $Log: leds-system3.c,v $
- * Revision 1.1.6.1 2001/12/04 15:19:26 seletz
- * - merged from linux_2_4_13_ac5_rmk2
- *
- * Revision 1.1.4.2 2001/11/19 17:58:53 seletz
- * - cleanup
- *
- * Revision 1.1.4.1 2001/11/16 13:49:54 seletz
- * - dummy LED support for PT Digital Board
- *
- * Revision 1.1.2.1 2001/10/15 16:03:39 seletz
- * - dummy function
- *
- *
- */
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/leds.h>
-#include <asm/system.h>
-
-#include "leds.h"
-
-
-#define LED_STATE_ENABLED 1
-#define LED_STATE_CLAIMED 2
-
-static unsigned int led_state;
-static unsigned int hw_led_state;
-
-void system3_leds_event(led_event_t evt)
-{
-
- /* TODO: support LEDs */
-}
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/nanoengine.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-
-#include <asm/hardware.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-static void __init
-fixup_nanoengine(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
-{
- /* Get command line parameters passed from the loader (if any) */
- if (*((char*)0xc0000100))
- *cmdline = ((char *)0xc0000100);
-}
-
-static struct map_desc nanoengine_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf0000000, 0x10000000, 0x00100000, MT_DEVICE }, /* System Registers */
- { 0xf1000000, 0x18A00000, 0x00100000, MT_DEVICE } /* Internal PCI Config Space */
-};
-
-static void __init nanoengine_map_io(void)
-{
- sa1100_map_io();
- iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc));
-
- sa1100_register_uart(0, 1);
- sa1100_register_uart(1, 2);
- sa1100_register_uart(2, 3);
- Ser1SDCR0 |= SDCR0_UART;
- /* disable IRDA -- UART2 is used as a normal serial port */
- Ser2UTCR4=0;
- Ser2HSCR0 = 0;
-}
-
-MACHINE_START(NANOENGINE, "BSE nanoEngine")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- FIXUP(fixup_nanoengine)
- MAPIO(nanoengine_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/omnimeter.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-static void omnimeter_backlight_power(int on)
-{
- if (on)
- LEDBacklightOn();
- else
- LEDBacklightOff();
-}
-
-static void omnimeter_lcd_power(int on)
-{
- if (on)
- LCDPowerOn();
-}
-
-static int __init omnimeter_init(void)
-{
- if (machine_is_omnimeter()) {
- sa1100fb_backlight_power = omnimeter_backlight_power;
- sa1100fb_lcd_power = omnimeter_lcd_power;
- }
- return 0;
-}
-
-arch_initcall(omnimeter_init);
-
-static struct map_desc omnimeter_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xd2000000, 0x10000000, 0x02000000, MT_DEVICE } /* TS */
-};
-
-static void __init omnimeter_map_io(void)
-{
- sa1100_map_io();
- iotable_init(omnimeter_io_desc, ARRAY_SIZE(omnimeter_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-}
-
-MACHINE_START(OMNIMETER, "OmniMeter")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- MAPIO(omnimeter_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/pangolin.c
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-
-#include <asm/hardware.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-static struct map_desc pangolin_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE } /* MQ200 */
-};
-
-static void __init pangolin_map_io(void)
-{
- sa1100_map_io();
- iotable_init(pangolin_io_desc, ARRAY_SIZE(pangolin_io_desc));
-
- sa1100_register_uart(0, 1);
- sa1100_register_uart(1, 3);
- Ser1SDCR0 |= SDCR0_UART;
-
- /* set some GPDR bits while it's safe */
- GPDR |= GPIO_PCMCIA_RESET;
-#ifndef CONFIG_SA1100_PANGOLIN_PCMCIA_IDE
- GPDR |= GPIO_PCMCIA_BUS_ON;
-#endif
-}
-
-MACHINE_START(PANGOLIN, "Dialogue-Pangolin")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- MAPIO(pangolin_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/pfs168.c
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/device.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-static struct resource sa1111_resources[] = {
- [0] = {
- .start = 0x40000000,
- .end = 0x40001fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_GPIO25,
- .end = IRQ_GPIO25,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 sa1111_dmamask = 0xffffffffUL;
-
-static struct platform_device sa1111_device = {
- .name = "sa1111",
- .id = 0,
- .dev = {
- .dma_mask = &sa1111_dmamask,
- .coherent_dma_mask = 0xffffffff,
- },
- .num_resources = ARRAY_SIZE(sa1111_resources),
- .resource = sa1111_resources,
-};
-
-static struct platform_device *devices[] __initdata = {
- &sa1111_device,
-};
-
-static int __init pfs168_init(void)
-{
- int ret;
-
- if (!machine_is_pfs168())
- return -ENODEV;
-
- /*
- * Ensure that the memory bus request/grant signals are setup,
- * and the grant is held in its inactive state
- */
- sa1110_mb_disable();
-
- return platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-arch_initcall(pfs168_init);
-
-
-static void __init pfs168_init_irq(void)
-{
- sa1100_init_irq();
-
- /*
- * Need to register these as rising edge interrupts
- * for standard 16550 serial driver support.
- */
- set_GPIO_IRQ_edge(GPIO_GPIO(19), GPIO_RISING_EDGE);
- set_GPIO_IRQ_edge(GPIO_GPIO(20), GPIO_RISING_EDGE);
- set_GPIO_IRQ_edge(GPIO_GPIO(25), GPIO_RISING_EDGE);
- set_GPIO_IRQ_edge(GPIO_UCB1300_IRQ, GPIO_RISING_EDGE);
-}
-
-static struct map_desc pfs168_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf0000000, 0x10000000, 0x00001000, MT_DEVICE }, /* 16C752 DUART port A (COM5) */
- { 0xf0001000, 0x10800000, 0x00001000, MT_DEVICE }, /* 16C752 DUART port B (COM6) */
- { 0xf0002000, 0x11000000, 0x00001000, MT_DEVICE }, /* COM1 RTS control (SYSC1RTS) */
- { 0xf0003000, 0x11400000, 0x00001000, MT_DEVICE }, /* Status LED control (SYSLED) */
- { 0xf0004000, 0x11800000, 0x00001000, MT_DEVICE }, /* DTMF code read (SYSDTMF) */
- { 0xf0005000, 0x11c00000, 0x00001000, MT_DEVICE }, /* LCD configure, enable (SYSLCDDE) */
- { 0xf0006000, 0x12000000, 0x00001000, MT_DEVICE }, /* COM1 DSR and motion sense (SYSC1DSR) */
- { 0xf0007000, 0x12800000, 0x00001000, MT_DEVICE }, /* COM3 xmit enable (SYSC3TEN) */
- { 0xf0008000, 0x13000000, 0x00001000, MT_DEVICE }, /* Control register A (SYSCTLA) */
- { 0xf0009000, 0x13800000, 0x00001000, MT_DEVICE }, /* Control register B (SYSCTLB) */
- { 0xf000a000, 0x18000000, 0x00001000, MT_DEVICE }, /* SMC91C96 */
- { 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE }, /* MQ200 */
- { 0xf4000000, 0x40000000, 0x00100000, MT_DEVICE } /* SA-1111 */
-};
-
-static void __init pfs168_map_io(void)
-{
- sa1100_map_io();
- iotable_init(pfs168_io_desc, ARRAY_SIZE(pfs168_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-}
-
-MACHINE_START(PFS168, "Tulsa")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- BOOT_PARAMS(0xc0000100)
- MAPIO(pfs168_map_io)
- INITIRQ(pfs168_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/sherman.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-
-#include <asm/hardware.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-static void __init sherman_map_io(void)
-{
- sa1100_map_io();
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-}
-
-MACHINE_START(SHERMAN, "Blazie Engineering Sherman")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- MAPIO(sherman_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/stork.c
- *
- * Copyright (C) 2001 Ken Gordon
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/delay.h>
-
-#include <asm/hardware.h>
-#include <asm/setup.h>
-#include <asm/keyboard.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-#include <linux/serial_core.h>
-
-#include "generic.h"
-
-
-#define STORK_VM_BASE_CS1 0xf0000000 /* where we get mapped (virtual) */
-#define STORK_VM_OFF_CS1 0x08000000 /* where we started mapping (physical) */
-#define STORK_VM_ADJUST_CS1 (STORK_VM_BASE_CS1-STORK_VM_OFF_CS1) /* add to the phys to get virt */
-
-#define STORK_VM_BASE_CS2 0xf1000000 /* where we get mapped (virtual) */
-#define STORK_VM_OFF_CS2 0x10000000 /* where we started mapping (physical) */
-#define STORK_VM_ADJUST_CS2 (STORK_VM_BASE_CS2-STORK_VM_OFF_CS2) /* add to the phys to get virt */
-
-static int debug = 0;
-
-static int storkLatchA = 0;
-static int storkLatchB = 0;
-static int storkLCDCPLD[4] = { 0, 0, 0, 0};
-
-int
-storkSetLatchA(int bits)
-{
- int ret = storkLatchA;
- volatile unsigned int *latch = (unsigned int *)(STORK_LATCH_A_ADDR+STORK_VM_ADJUST_CS1);
-
- storkLatchA |= bits;
- *latch = storkLatchA;
- return ret;
-}
-
-int
-storkClearLatchA(int bits)
-{
- int ret = storkLatchA;
- volatile unsigned int *latch = (unsigned int *)(STORK_LATCH_A_ADDR+STORK_VM_ADJUST_CS1);
-
- storkLatchA &= ~bits;
- *latch = storkLatchA;
- return ret;
-}
-
-int
-storkSetLCDCPLD(int which, int bits)
-{
- int ret = storkLCDCPLD[which];
- volatile unsigned int *latch = (unsigned int *)(STORK_LCDCPLD_BASE_ADDR+STORK_VM_ADJUST_CS2 + 0x20*which);
-
- storkLCDCPLD[which] |= bits;
- *latch = storkLCDCPLD[which];
- return ret;
-}
-
-
-/* NB we don't shadow these 'cos there is no relation between the data written and the data read */
-/* ie the read registers are read only and the write registers write only */
-
-int
-storkGetLCDCPLD(int which)
-{
- volatile unsigned int *latch = (unsigned int *)(STORK_LCDCPLD_BASE_ADDR+STORK_VM_ADJUST_CS2 + 0x20*which);
- return *latch;
-}
-
-int
-storkClearLCDCPLD(int which, int bits)
-{
- int ret = storkLCDCPLD[which];
- volatile unsigned int *latch = (unsigned int *)(STORK_LCDCPLD_BASE_ADDR+STORK_VM_ADJUST_CS2 + 0x20*which);
-
- storkLCDCPLD[which] &= ~bits;
- *latch = storkLCDCPLD[which];
- return ret;
-}
-
-int
-storkSetLatchB(int bits)
-{
- int ret = storkLatchB;
- char buf[100];
-
- volatile unsigned int *latch = (unsigned int *)(STORK_LATCH_B_ADDR+STORK_VM_ADJUST_CS1);
- sprintf(buf, "%s: bits %04x\n", __FUNCTION__, bits);
- if (debug) printk(buf);
-
- storkLatchB |= bits;
- *latch = storkLatchB;
- return ret;
-}
-
-int
-storkClearLatchB(int bits)
-{
- int ret = storkLatchB;
- char buf[100];
-
- volatile unsigned int *latch = (unsigned int *)(STORK_LATCH_B_ADDR+STORK_VM_ADJUST_CS1);
- sprintf(buf, "%s: bits %04x\n", __FUNCTION__, bits);
- if (debug) printk(buf);
-
- storkLatchB &= ~bits;
- *latch = storkLatchB;
- return ret;
-}
-
-void
-storkSetGPIO(int bits)
-{
- char buf[100];
-
- sprintf(buf, "%s: bits %04x\n", __FUNCTION__, bits);
- if (debug) printk(buf);
- GPSR = bits;
-}
-
-void
-storkClearGPIO(int bits)
-{
- char buf[100];
-
- sprintf(buf, "%s: bits %04x\n", __FUNCTION__, bits);
- if (debug) printk(buf);
- GPCR = bits;
-}
-
-int
-storkGetGPIO()
-{
- char buf[100];
-
- int bits = GPLR;
-
- sprintf(buf, "%s: bits %04x\n", __FUNCTION__, bits);
- if (debug) printk(buf);
-
- return bits;
-}
-
-/* this will return the current state of the hardware ANDED with the given bits
- so NE => at least one bit was set, but maybe not all of them! */
-
-int
-storkTestGPIO(int bits)
-{
- int val = storkGetGPIO();
- char buf[100];
-
- sprintf(buf, "%s: bits %04x val %04x\n", __FUNCTION__, bits, val);
- if (debug) printk(buf);
-
- return (val & bits);
-}
-
-/* NB the touch screen and the d to a use the same data and clock out pins */
-
-static void storkClockTS(void)
-{
- storkSetLatchB(STORK_TOUCH_SCREEN_DCLK);
- udelay(10); /* hmm wait 200ns (min) - ok this ought to be udelay(1) but that doesn't get */
- /* consistent values so I'm using 10 (urgh) */
- storkClearLatchB(STORK_TOUCH_SCREEN_DCLK);
- udelay(10);
-}
-
-
-int /* there is always a 12 bit read after the write! */
-storkClockByteToTS(int byte)
-{
- int timeout = 10000; /* stuff is meant to happen in 60ns */
- int bit;
- int result = 0;
-
- if (debug) printk("storkClockByteToTS: %02x\n", byte);
-
- storkClearLatchB(STORK_TOUCH_SCREEN_CS); /* slect touch screen */
-
- while (timeout-- > 0)
- if (storkTestGPIO(GPIO_STORK_TOUCH_SCREEN_BUSY) == 0)
- break;
-
- if (timeout < 0) {
- printk("storkClockBitToTS: GPIO_STORK_TOUCH_SCREEN_BUSY didn't go low!\n\r");
-/* ignore error for now return; */
- }
-
-/* clock out the given byte */
-
- for (bit = 0x80; bit > 0; bit = bit >> 1) {
-
- if ((bit & byte) == 0)
- storkClearLatchB(STORK_TOUCH_SCREEN_DIN);
- else
- storkSetLatchB(STORK_TOUCH_SCREEN_DIN);
-
- storkClockTS();
- }
-
- storkClockTS(); /* will be busy for at a clock (at least) */
-
- for (timeout = 10000; timeout >= 0; timeout--)
- if (storkTestGPIO(GPIO_STORK_TOUCH_SCREEN_BUSY) == 0)
- break;
-
- if (timeout < 0) {
- printk("storkClockBitToTS: 2nd GPIO_STORK_TOUCH_SCREEN_BUSY didn't go low!\n\r");
-/* ignore error for now return; */
- }
-
-/* clock in the result */
-
- for (bit = 0x0800; bit > 0; bit = bit >> 1) {
-
- if (storkTestGPIO(GPIO_STORK_TOUCH_SCREEN_DATA))
- result |= bit;
-
- storkClockTS();
- }
-
- storkSetLatchB(STORK_TOUCH_SCREEN_CS); /* unselect touch screen */
-
- return result;
-}
-
-void
-storkClockShortToDtoA(int word)
-{
- int bit;
-
- storkClearLatchB(STORK_DA_CS); /* select D to A */
-
-/* clock out the given byte */
-
- for (bit = 0x8000; bit > 0; bit = bit >> 1) {
-
- if ((bit & word) == 0)
- storkClearLatchB(STORK_TOUCH_SCREEN_DIN);
- else
- storkSetLatchB(STORK_TOUCH_SCREEN_DIN);
-
- storkClockTS();
- }
-
- storkSetLatchB(STORK_DA_CS); /* unselect D to A */
-
-/* set DTOA#_LOAD low then high (min 20ns) to transfer value to D to A */
- storkClearLatchB(STORK_DA_LD);
- storkSetLatchB(STORK_DA_LD);
-}
-
-
-
-void
-storkInitTSandDtoA(void)
-{
- storkClearLatchB(STORK_TOUCH_SCREEN_DCLK | STORK_TOUCH_SCREEN_DIN);
- storkSetLatchB(STORK_TOUCH_SCREEN_CS | STORK_DA_CS | STORK_DA_LD);
- storkClockByteToTS(0xE2); /* turn on the reference */
- storkClockShortToDtoA(0x8D00); /* turn on the contrast */
- storkClockShortToDtoA(0x0A00); /* turn on the brightness */
-}
-
-static void stork_lcd_power(int on)
-{
- if (on) {
- storkSetLCDCPLD(0, 1);
- storkSetLatchA(STORK_LCD_BACKLIGHT_INVERTER_ON);
- } else {
- storkSetLCDCPLD(0, 0);
- storkClearLatchA(STORK_LCD_BACKLIGHT_INVERTER_ON);
- }
-}
-
-struct map_desc stork_io_desc[] __initdata = {
- /* virtual physical length type */
- { STORK_VM_BASE_CS1, STORK_VM_OFF_CS1, 0x01000000, MT_DEVICE }, /* EGPIO 0 */
- { 0xf1000000, 0x10000000, 0x02800000, MT_DEVICE }, /* static memory bank 2 */
- { 0xf3800000, 0x40000000, 0x00800000, MT_DEVICE } /* static memory bank 4 */
-};
-
-int __init
-stork_map_io(void)
-{
- sa1100_map_io();
- iotable_init(stork_io_desc, ARRAY_SIZE(stork_io_desc));
-
- sa1100_register_uart(0, 1); /* com port */
- sa1100_register_uart(1, 2);
- sa1100_register_uart(2, 3);
-
- printk("Stork driver initing latches\r\n");
-
- storkClearLatchB(STORK_RED_LED); /* let's have the red LED on please */
- storkSetLatchB(STORK_YELLOW_LED);
- storkSetLatchB(STORK_GREEN_LED);
- storkSetLatchA(STORK_BATTERY_CHARGER_ON);
- storkSetLatchA(STORK_LCD_5V_POWER_ON);
- storkSetLatchA(STORK_LCD_3V3_POWER_ON);
-
- storkInitTSandDtoA();
-
- sa1100fb_lcd_power = stork_lcd_power;
-
- return 0;
-}
-
-
-MACHINE_START(STORK, "Stork Technologies prototype")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- BOOT_PARAMS(0xc0000100)
- MAPIO(stork_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
-
-
-EXPORT_SYMBOL(storkTestGPIO);
-EXPORT_SYMBOL(storkSetGPIO);
-EXPORT_SYMBOL(storkClearGPIO);
-EXPORT_SYMBOL(storkSetLatchA);
-EXPORT_SYMBOL(storkClearLatchA);
-EXPORT_SYMBOL(storkSetLatchB);
-EXPORT_SYMBOL(storkClearLatchB);
-EXPORT_SYMBOL(storkClockByteToTS);
-EXPORT_SYMBOL(storkClockShortToDtoA);
-EXPORT_SYMBOL(storkGetLCDCPLD);
-EXPORT_SYMBOL(storkSetLCDCPLD);
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/system3.c
- *
- * Copyright (C) 2001 Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
- *
- * $Id: system3.c,v 1.1.6.1 2001/12/04 17:28:06 seletz Exp $
- *
- * This file contains all PT Sytsem 3 tweaks. Based on original work from
- * Nicolas Pitre's assabet fixes
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * $Log: system3.c,v $
- * Revision 1.1.6.1 2001/12/04 17:28:06 seletz
- * - merged from previous branch
- *
- * Revision 1.1.4.3 2001/12/04 15:16:31 seletz
- * - merged from linux_2_4_13_ac5_rmk2
- *
- * Revision 1.1.4.2 2001/11/19 17:18:57 seletz
- * - more code cleanups
- *
- * Revision 1.1.4.1 2001/11/16 13:52:05 seletz
- * - PT Digital Board Support Code
- *
- * Revision 1.1.2.2 2001/11/05 16:46:18 seletz
- * - cleanups
- *
- * Revision 1.1.2.1 2001/10/15 16:00:43 seletz
- * - first revision working with new board
- *
- *
- */
-
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/cpufreq.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include <linux/serial_core.h>
-
-#include "generic.h"
-#include <asm/hardware/sa1111.h>
-
-#define DEBUG 1
-
-#ifdef DEBUG
-# define DPRINTK( x, args... ) printk( "%s: line %d: "x, __FUNCTION__, __LINE__, ## args );
-#else
-# define DPRINTK( x, args... ) /* nix */
-#endif
-
-/**********************************************************************
- * prototypes
- */
-
-/* init funcs */
-static int __init system3_init(void);
-static void __init system3_init_irq(void);
-static void __init system3_map_io(void);
-
-static u_int system3_get_mctrl(struct uart_port *port);
-static void system3_set_mctrl(struct uart_port *port, u_int mctrl);
-static void system3_uart_pm(struct uart_port *port, u_int state, u_int oldstate);
-static int sdram_notifier(struct notifier_block *nb, unsigned long event, void *data);
-
-static void system3_lcd_power(int on);
-static void system3_backlight_power(int on);
-
-
-/**********************************************************************
- * global data
- */
-
-/**********************************************************************
- * static data
- */
-
-static struct map_desc system3_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf3000000, PT_CPLD_BASE, 0x00100000, MT_DEVICE }, /* System Registers */
- { 0xf4000000, PT_SA1111_BASE, 0x00100000, MT_DEVICE } /* SA-1111 */
-};
-
-static struct sa1100_port_fns system3_port_fns __initdata = {
- .set_mctrl = system3_set_mctrl,
- .get_mctrl = system3_get_mctrl,
- .pm = system3_uart_pm,
-};
-
-static struct notifier_block system3_clkchg_block = {
- .notifier_call = sdram_notifier,
-};
-
-/**********************************************************************
- * Static functions
- */
-
-static void __init system3_map_io(void)
-{
- DPRINTK( "%s\n", "START" );
- sa1100_map_io();
- iotable_init(system3_io_desc, ARRAY_SIZE(system3_io_desc));
-
- sa1100_register_uart_fns(&system3_port_fns);
- sa1100_register_uart(0, 1); /* com port */
- sa1100_register_uart(1, 2);
- sa1100_register_uart(2, 3); /* radio module */
-
- Ser1SDCR0 |= SDCR0_SUS;
-}
-
-
-/*********************************************************************
- * Install IRQ handler
- */
-static void
-system3_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
-{
- u_char irr;
-
- //DPRINTK( "irq=%d, desc=%p, regs=%p\n", irq, desc, regs );
-
- while (1) {
- struct irqdesc *d;
-
- /*
- * Acknowledge the parent IRQ.
- */
- desc->chip->ack(irq);
-
- /*
- * Read the interrupt reason register. Let's have all
- * active IRQ bits high. Note: there is a typo in the
- * Neponset user's guide for the SA1111 IRR level.
- */
- //irr = PT_IRQSR & (PT_IRR_LAN | PT_IRR_SA1111);
- irr = PT_IRQSR & (PT_IRR_SA1111);
-
- /* SMC IRQ is low-active, so "switch" bit over */
- //irr ^= (PT_IRR_LAN);
-
- //DPRINTK( "irr=0x%02x\n", irr );
-
- if ((irr & (PT_IRR_LAN | PT_IRR_SA1111)) == 0)
- break;
-
- /*
- * Since there is no individual mask, we have to
- * mask the parent IRQ. This is safe, since we'll
- * recheck the register for any pending IRQs.
- */
- if (irr & (PT_IRR_LAN)) {
- desc->chip->mask(irq);
-
- if (irr & PT_IRR_LAN) {
- //DPRINTK( "SMC9196, irq=%d\n", IRQ_SYSTEM3_SMC9196 );
- d = irq_desc + IRQ_SYSTEM3_SMC9196;
- d->handle(IRQ_SYSTEM3_SMC9196, d, regs);
- }
-
-#if 0 /* no SSP yet on system 4 */
- if (irr & IRR_USAR) {
- d = irq_desc + IRQ_NEPONSET_USAR;
- d->handle(IRQ_NEPONSET_USAR, d, regs);
- }
-#endif
-
- desc->chip->unmask(irq);
- }
-
- if (irr & PT_IRR_SA1111) {
- //DPRINTK( "SA1111, irq=%d\n", IRQ_SYSTEM3_SA1111 );
- d = irq_desc + IRQ_SYSTEM3_SA1111;
- d->handle(IRQ_SYSTEM3_SA1111, d, regs);
- }
- }
-}
-
-static void __init system3_init_irq(void)
-{
- /*
- * Install handler for GPIO25.
- */
- set_irq_type(IRQ_GPIO25, IRQT_RISING);
- set_irq_chained_handler(IRQ_GPIO25, system3_irq_handler);
-
- /*
- * install eth irq
- */
- set_irq_handler(IRQ_SYSTEM3_SMC9196, do_simple_IRQ);
- set_irq_flags(IRQ_SYSTEM3_SMC9196, IRQF_VALID | IRQF_PROBE);
-}
-
-/**********************************************************************
- * On system 3 limit cpu frequency to 206 Mhz
- */
-static int sdram_notifier(struct notifier_block *nb, unsigned long event,
- void *data)
-{
- struct cpufreq_policy *policy = data;
- switch (event) {
- case CPUFREQ_ADJUST:
- case CPUFREQ_INCOMPATIBLE:
- cpufreq_verify_within_limits(policy, 147500, 206000);
- break;
- case CPUFREQ_NOTIFY:
- if ((policy->min < 147500) ||
- (policy->max > 206000))
- panic("cpufreq failed to limit the speed\n");
- break;
- }
- return 0;
-}
-
-/**
- * system3_uart_pm - powermgmt callback function for system 3 UART
- * @port: uart port structure
- * @state: pm state
- * @oldstate: old pm state
- *
- */
-static void system3_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
-{
- /* TODO: switch on/off uart in powersave mode */
-}
-
-/*
- * Note! this can be called from IRQ context.
- * FIXME: Handle PT Digital Board CTRL regs irq-safe.
- *
- * NB: system3 uses COM_RTS and COM_DTR for both UART1 (com port)
- * and UART3 (radio module). We only handle them for UART1 here.
- */
-static void system3_set_mctrl(struct uart_port *port, u_int mctrl)
-{
- if (port->mapbase == _Ser1UTCR0) {
- u_int set = 0, clear = 0;
-
- if (mctrl & TIOCM_RTS)
- set |= PT_CTRL2_RS1_RTS;
- else
- clear |= PT_CTRL2_RS1_RTS;
-
- if (mctrl & TIOCM_DTR)
- set |= PT_CTRL2_RS1_DTR;
- else
- clear |= PT_CTRL2_RS1_DTR;
-
- PTCTRL2_clear(clear);
- PTCTRL2_set(set);
- }
-}
-
-static u_int system3_get_mctrl(struct uart_port *port)
-{
- u_int ret = 0;
- u_int irqsr = PT_IRQSR;
-
- /* need 2 reads to read current value */
- irqsr = PT_IRQSR;
-
- /* TODO: check IRQ source register for modem/com
- status lines and set them correctly. */
-
- ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
-
- return ret;
-}
-
-/**
- * system3_lcd_backlight_on - switch system 3 lcd backlight on
- *
- */
-int system3_lcd_backlight_on( void )
-{
- PTCTRL0_set( PT_CTRL0_LCD_BL );
- return 0;
-}
-
-/**
- * system3_lcd_backlight_off - switch system 3 lcd backlight off
- *
- */
-static void system3_lcd_backlight_off(void)
-{
- PTCTRL0_clear( PT_CTRL0_LCD_BL );
-}
-
-/**
- * system3_lcd_on - switch system 3 lcd on
- *
- */
-static void system3_lcd_on(void)
-{
- DPRINTK( "%s\n", "START" );
- PTCTRL0_set( PT_CTRL0_LCD_EN );
-
- /* brightness / contrast */
- sa1111_enable_device(SKPCR_PWMCLKEN);
- PB_DDR = 0xFFFFFFFF;
- SKPEN0 = 1;
- SKPEN1 = 1;
-}
-
-/**
- * system3_lcd_off - switch system 3 lcd off
- *
- */
-static void system3_lcd_off(void)
-{
- DPRINTK( "%s\n", "START" );
- PTCTRL0_clear( PT_CTRL0_LCD_EN );
- SKPEN0 = 0;
- SKPEN1 = 0;
- sa1111_disable_device(SKPCR_PWMCLKEN);
-}
-
-/**
- * system3_lcd_contrast - set system 3 contrast
- * @value: the new contrast
- *
- */
-static void system3_lcd_contrast(unsigned char value)
-{
- DPRINTK( "value=0x%02x\n", value );
- SYS3LCDCONTR = value;
-}
-
-/**
- * system3_lcd_brightness - set system 3 brightness
- * @value: the new brightness
- *
- */
-static void system3_lcd_brightness(unsigned char value)
-{
- DPRINTK( "value=0x%02x\n", value );
- SYS3LCDBRIGHT = value;
-}
-
-static void system3_lcd_power(int on)
-{
- if (on) {
- system3_lcd_on();
- } else {
- system3_lcd_off();
- }
-}
-
-static void system3_backlight_power(int on)
-{
- if (on) {
- system3_lcd_backlight_on();
- system3_lcd_contrast(0x95);
- system3_lcd_brightness(240);
- } else {
- system3_lcd_backlight_off();
- }
-}
-
-static struct resource sa1111_resources[] = {
- [0] = {
- .start = PT_SA1111_BASE,
- .end = PT_SA1111_BASE + 0x00001fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_SYSTEM3_SA1111,
- .end = IRQ_SYSTEM3_SA1111,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 sa1111_dmamask = 0xffffffffUL;
-
-static struct platform_device sa1111_device = {
- .name = "sa1111",
- .id = 0,
- .dev = {
- .dma_mask = &sa1111_dmamask,
- .coherent_dma_mask = 0xffffffff,
- },
- .num_resources = ARRAY_SIZE(sa1111_resources),
- .resource = sa1111_resources,
-};
-
-static struct platform_device *devices[] __initdata = {
- &sa1111_device,
-};
-
-static int __init system3_init(void)
-{
- int ret = 0;
- DPRINTK( "%s\n", "START" );
-
- if ( !machine_is_pt_system3() ) {
- ret = -EINVAL;
- goto DONE;
- }
-
- sa1100fb_lcd_power = system3_lcd_power;
- sa1100fb_backlight_power = system3_backlight_power;
-
- /* init control register */
- PT_CTRL0 = PT_CTRL0_INIT;
- PT_CTRL1 = 0x02;
- PT_CTRL2 = 0x00;
- DPRINTK( "CTRL[0]=0x%02x\n", PT_CTRL0 );
- DPRINTK( "CTRL[1]=0x%02x\n", PT_CTRL1 );
- DPRINTK( "CTRL[2]=0x%02x\n", PT_CTRL2 );
-
- /*
- * Ensure that the memory bus request/grant signals are setup,
- * and the grant is held in its inactive state.
- */
- sa1110_mb_disable();
-
- system3_init_irq();
-
- /*
- * Probe for a SA1111.
- */
- ret = platform_add_devices(devices, ARRAY_SIZE(devices));
- if (ret < 0) {
- printk( KERN_WARNING"PT Digital Board: no SA1111 found!\n" );
- goto DONE;
- }
-
-#ifdef CONFIG_CPU_FREQ
- ret = cpufreq_register_notifier(&system3_clkchg_block);
- if ( ret != 0 ) {
- printk( KERN_WARNING"PT Digital Board: could not register clock scale callback\n" );
- goto DONE;
- }
-#endif
-
-
- ret = 0;
-DONE:
- DPRINTK( "ret=%d\n", ret );
- return ret;
-}
-
-/**********************************************************************
- * Exported Functions
- */
-
-/**********************************************************************
- * kernel magic macros
- */
-arch_initcall(system3_init);
-
-MACHINE_START(PT_SYSTEM3, "PT System 3")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- BOOT_PARAMS(0xc0000100)
- MAPIO(system3_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/trizeps.c
- *
- * Authors:
- * Andreas Hofer <ho@dsa-ac.de>,
- * Peter Lueg <pl@dsa-ac.de>,
- * Guennadi Liakhovetski <gl@dsa-ac.de>
- *
- * This file contains all Trizeps-specific tweaks.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/tty.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/delay.h>
-#include <linux/pm.h>
-
-#include <asm/mach-types.h>
-#include <asm/hardware.h>
-#include <asm/arch/trizeps.h>
-#include <asm/setup.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/serial_sa1100.h>
-#include <linux/serial_core.h>
-#include <linux/serial_reg.h>
-#include <asm/arch/serial.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/arch/irqs.h>
-
-#include "generic.h"
-
-#undef DEBUG_TRIZEPS
-#ifdef DEBUG_TRIZEPS
-#define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args)
-#else
-#define DPRINTK( x... )
-#endif
-
-static struct tri_uart_cts_data_t tri_uart_cts_data[] = {
- { TRIZEPS_GPIO_UART1_CTS, 0, NULL, NULL,"int. UART1 cts" },
- { TRIZEPS_GPIO_UART2_CTS, 0, NULL, NULL,"int. UART2 cts" },
- { TRIZEPS_GPIO_UART3_CTS, 0, NULL, NULL,"int. UART3 cts" }
-};
-
-static void trizeps_cts_intr(int irq, void *dev_id, struct pt_regs *regs)
-{
- struct tri_uart_cts_data_t * uart_data = (struct tri_uart_cts_data_t *)dev_id;
- int cts = (!(GPLR & uart_data->cts_gpio));
-
- /* NOTE: I suppose that we will not get any interrupts
- if the GPIO is not changed, so maybe
- the cts_prev_state can be removed ... */
- if (cts != uart_data->cts_prev_state) {
-
- uart_data->cts_prev_state = cts;
- uart_handle_cts_change(uart_data->port, cts);
- DPRINTK("(IRQ %d) changed (cts=%d) stop=%d\n",
- irq, cts, uart_data->info->tty->hw_stopped);
- }
-}
-
-static int
-trizeps_register_cts_intr(int gpio,
- int irq,
- struct tri_uart_cts_data_t *uart_data)
-{
- int ret = 0;
-
- if(irq != NO_IRQ)
- {
- set_irq_type(irq, IRQT_BOTHEDGE);
-
- ret = request_irq(irq, trizeps_cts_intr,
- SA_INTERRUPT, uart_data->name, uart_data);
- if (ret)
- printk(KERN_ERR "uart_open: failed to register CTS irq (%d)\n", ret);
- }
- return ret;
-}
-
-static void trizeps_set_mctrl(struct uart_port *port, u_int mctrl)
-{
- if (port->mapbase == _Ser1UTCR0)
- {
- /**** ttySA1 ****/
- if (mctrl & TIOCM_RTS)
- GPCR |= TRIZEPS_GPIO_UART1_RTS;
- else
- GPSR |= TRIZEPS_GPIO_UART1_RTS;
-
- DPRINTK("2 ttySA%d Set RTS %s\n",port->line,
- mctrl & TIOCM_RTS ? "low" : "high");
-
- }
- else if (port->mapbase == _Ser3UTCR0)
- {
- /**** ttySA0 ****/
- }
- else
- {
- /**** ttySA2 ****/
- }
-}
-
-static u_int trizeps_get_mctrl(struct uart_port *port)
-{
- int result = TIOCM_CD | TIOCM_DSR;
-
- if (port->mapbase == _Ser1UTCR0)
- {
- if (!(GPLR & TRIZEPS_GPIO_UART1_CTS))
- result |= TIOCM_CTS;
- }
- else if (port->mapbase == _Ser2UTCR0)
- {
- result |= TIOCM_CTS;
- }
- else if (port->mapbase == _Ser3UTCR0)
- {
- result |= TIOCM_CTS;
- }
- else
- {
- result = TIOCM_CTS;
- }
-
- DPRINTK(" ttySA%d %s%s%s\n",port->line,
- result & TIOCM_CD ? "CD " : "",
- result & TIOCM_CTS ? "CTS " : "",
- result & TIOCM_DSR ? "DSR " : "");
-
- return result;
-}
-
-static struct sa1100_port_fns trizeps_port_fns __initdata = {
- .set_mctrl = trizeps_set_mctrl,
- .get_mctrl = trizeps_get_mctrl,
-};
-
-static void trizeps_power_off(void)
-{
- printk("trizeps power off\n");
- mdelay(100);
- cli();
- /* disable internal oscillator, float CS lines */
- PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
- /* enable wake-up on GPIO0 (Assabet...) */
- PWER = GFER = GRER = 1;
- /*
- * set scratchpad to zero, just in case it is used as a
- * restart address by the bootloader.
- */
- PSPR = 0;
-
- /*
- * Power off
- * -> disconnect AKku
- */
- TRIZEPS_BCR_set(TRIZEPS_BCR0, TRIZEPS_MFT_OFF);
-
- /*
- * if power supply no Akku
- * -> enter sleep mode
- */
- PMCR = PMCR_SF;
-}
-
-static int __init trizeps_init(void)
-{
- if (!machine_is_trizeps())
- return -EINVAL;
-
- DPRINTK(" \n");
- pm_power_off = trizeps_power_off;
-
- // Init UART2 for IrDA
-// PPDR |= PPC_TXD2; // Set TXD2 as output
- Ser2UTCR4 = UTCR4_HSE; // enable HSE
- Ser2HSCR0 = 0;
- Ser2HSSR0 = HSSR0_EIF | HSSR0_TUR | HSSR0_RAB | HSSR0_FRE;
-
- /* Init MECR */
- MECR = 0x00060006;
-
- /* Set up external serial IRQs */
- GAFR &= ~(GPIO_GPIO16 | GPIO_GPIO17); // no alternate function
- GPDR &= ~(GPIO_GPIO16 | GPIO_GPIO17); // Set to Input
- set_irq_type(IRQ_GPIO16, IRQT_RISING);
- set_irq_type(IRQ_GPIO17, IRQT_RISING);
-
- return 0;
-}
-
-__initcall(trizeps_init);
-
-static struct map_desc trizeps_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xF0000000l, 0x30000000l, 0x00800000l, MT_DEVICE },
- { 0xF2000000l, 0x38000000l, 0x00800000l, MT_DEVICE },
-};
-
-static void __init trizeps_map_io(void)
-{
- sa1100_map_io();
- iotable_init(trizeps_io_desc, ARRAY_SIZE(trizeps_io_desc));
-
- sa1100_register_uart_fns(&trizeps_port_fns);
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
- sa1100_register_uart(2, 2);
-}
-
-MACHINE_START(TRIZEPS, "TRIZEPS")
- MAINTAINER("DSA")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- MAPIO(trizeps_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/xp860.c
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/pm.h>
-#include <linux/tty.h>
-#include <linux/ioport.h>
-
-#include <asm/hardware.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-#include <asm/hardware/sa1111.h>
-
-#include "generic.h"
-
-
-static void xp860_power_off(void)
-{
- local_irq_disable();
- GPDR |= GPIO_GPIO20;
- GPSR = GPIO_GPIO20;
- mdelay(1000);
- GPCR = GPIO_GPIO20;
- while(1);
-}
-
-static struct resource sa1111_resources[] = {
- [0] = {
- .start = 0x40000000,
- .end = 0x40001fff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static u64 sa1111_dmamask = 0xffffffffUL;
-
-static struct platform_device sa1111_device = {
- .name = "sa1111",
- .id = 0,
- .dev = {
- .dma_mask = &sa1111_dmamask,
- .coherent_dma_mask = 0xffffffff,
- },
- .num_resources = ARRAY_SIZE(sa1111_resources),
- .resource = sa1111_resources,
-};
-
-static struct platform_device *devices[] __initdata = {
- &sa1111_device,
-};
-
-/*
- * Note: I replaced the sa1111_init() without the full SA1111 initialisation
- * because this machine doesn't appear to use the DMA features. If this is
- * wrong, please look at neponset.c to fix it properly.
- */
-static int __init xp860_init(void)
-{
- pm_power_off = xp860_power_off;
-
- return platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-arch_initcall(xp860_init);
-
-static struct map_desc xp860_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf0000000, 0x10000000, 0x00100000, MT_DEVICE }, /* SCSI */
- { 0xf1000000, 0x18000000, 0x00100000, MT_DEVICE }, /* LAN */
- { 0xf4000000, 0x40000000, 0x00800000, MT_DEVICE } /* SA-1111 */
-};
-
-static void __init xp860_map_io(void)
-{
- sa1100_map_io();
- iotable_init(xp860_io_desc, ARRAY_SIZE(xp860_io_desc));
-
- sa1100_register_uart(0, 3);
- sa1100_register_uart(1, 1);
-}
-
-MACHINE_START(XP860, "XP860")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- MAPIO(xp860_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-sa1100/yopy.c
- */
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/tty.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/setup.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/serial_sa1100.h>
-
-#include "generic.h"
-
-
-static spinlock_t egpio_lock = SPIN_LOCK_UNLOCKED;
-
-static unsigned long yopy_egpio =
- GPIO_MASK(GPIO_CF_RESET) |
- GPIO_MASK(GPIO_CLKDIV_CLR1) | GPIO_MASK(GPIO_CLKDIV_CLR2) |
- GPIO_MASK(GPIO_SPEAKER_MUTE) | GPIO_MASK(GPIO_AUDIO_OPAMP_POWER);
-
-int yopy_gpio_test(unsigned int gpio)
-{
- return ((yopy_egpio & (1 << gpio)) != 0);
-}
-
-void yopy_gpio_set(unsigned int gpio, int level)
-{
- unsigned long flags, mask;
-
- mask = 1 << gpio;
-
- spin_lock_irqsave(&egpio_lock, flags);
-
- if (level)
- yopy_egpio |= mask;
- else
- yopy_egpio &= ~mask;
- YOPY_EGPIO = yopy_egpio;
-
- spin_unlock_irqrestore(&egpio_lock, flags);
-}
-
-EXPORT_SYMBOL(yopy_gpio_test);
-EXPORT_SYMBOL(yopy_gpio_set);
-
-static int __init yopy_hw_init(void)
-{
- if (machine_is_yopy()) {
- YOPY_EGPIO = yopy_egpio;
-
- /* Enable Output */
- PPDR |= PPC_L_BIAS;
- PSDR &= ~PPC_L_BIAS;
- PPSR |= PPC_L_BIAS;
-
- YOPY_EGPIO = yopy_egpio;
- }
-
- return 0;
-}
-
-arch_initcall(yopy_hw_init);
-
-
-static struct map_desc yopy_io_desc[] __initdata = {
- /* virtual physical length type */
- { 0xf0000000, 0x48000000, 0x00300000, MT_DEVICE }, /* LCD */
- { 0xf1000000, 0x10000000, 0x00100000, MT_DEVICE } /* EGPIO */
-};
-
-static void __init yopy_map_io(void)
-{
- sa1100_map_io();
- iotable_init(yopy_io_desc, ARRAY_SIZE(yopy_io_desc));
-
- sa1100_register_uart(0, 3);
-
- set_GPIO_IRQ_edge(GPIO_UCB1200_IRQ, GPIO_RISING_EDGE);
-}
-
-
-MACHINE_START(YOPY, "Yopy")
- MAINTAINER("G.Mate, Inc.")
- BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
- BOOT_PARAMS(0xc0000100)
- MAPIO(yopy_map_io)
- INITIRQ(sa1100_init_irq)
- INITTIME(sa1100_init_time)
-MACHINE_END
+++ /dev/null
-#
-# Makefile for the linux kernel.
-#
-
-# Object file lists.
-
-obj-y := core.o
-obj-m :=
-obj-n :=
-obj- :=
-
+++ /dev/null
-/*
- * linux/arch/arm/mm/mm-tbox.c
- *
- * Copyright (C) 1998, 1999, 2000 Phil Blundell
- * Copyright (C) 1998-1999 Russell King
- *
- * Extra MM routines for the Tbox architecture
- */
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/elf.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-extern unsigned long soft_irq_mask;
-
-static void tbox_mask_irq(unsigned int irq)
-{
- __raw_writel(0, INTCONT + (irq << 2));
- soft_irq_mask &= ~(1<<irq);
-}
-
-static void tbox_unmask_irq(unsigned int irq)
-{
- soft_irq_mask |= (1<<irq);
- __raw_writel(1, INTCONT + (irq << 2));
-}
-
-static void tbox_init_irq(void)
-{
- unsigned int i;
-
- /* Disable all interrupts initially. */
- for (i = 0; i < NR_IRQS; i++) {
- if (i <= 10 || (i >= 12 && i <= 13)) {
- irq_desc[i].valid = 1;
- irq_desc[i].probe_ok = 0;
- irq_desc[i].mask_ack = tbox_mask_irq;
- irq_desc[i].mask = tbox_mask_irq;
- irq_desc[i].unmask = tbox_unmask_irq;
- tbox_mask_irq(i);
- } else {
- irq_desc[i].valid = 0;
- irq_desc[i].probe_ok = 0;
- }
- }
-}
-
-static struct map_desc tbox_io_desc[] __initdata = {
- /* See hardware.h for details */
- { IO_BASE, IO_START, 0x00100000, MT_DEVICE }
-};
-
-static void __init tbox_map_io(void)
-{
- iotable_init(tbox_io_desc, ARRAY_SIZE(tbox_io_desc));
-}
-
-MACHINE_START(TBOX, "unknown-TBOX")
- MAINTAINER("Philip Blundell")
- BOOT_MEM(0x80000000, 0x00400000, 0xe0000000)
- MAPIO(tbox_map_io)
- INITIRQ(tbox_init_irq)
-MACHINE_END
-
+++ /dev/null
-/*
- * linux/arch/arm/boot/compressed/ofw-shark.c
- *
- * by Alexander Schulz
- *
- * This file is used to get some basic information
- * about the memory layout of the shark we are running
- * on. Memory is usually divided in blocks a 8 MB.
- * And bootargs are copied from OpenFirmware.
- */
-
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <asm/setup.h>
-#include <asm/page.h>
-
-
-asmlinkage void
-create_params (unsigned long *buffer)
-{
- /* Is there a better address? Also change in mach-shark/core.c */
- struct tag *tag = (struct tag *) 0x08003000;
- int j,i,m,k,nr_banks,size;
- unsigned char *c;
-
- /* Head of the taglist */
- tag->hdr.tag = ATAG_CORE;
- tag->hdr.size = tag_size(tag_core);
- tag->u.core.flags = FLAG_READONLY;
- tag->u.core.pagesize = PAGE_SIZE;
- tag->u.core.rootdev = 0;
-
- /* Build up one tagged block for each memory region */
- size=0;
- nr_banks=(unsigned int) buffer[0];
- for (j=0;j<nr_banks;j++){
- /* search the lowest address and put it into the next entry */
- /* not a fast sort algorithm, but there are at most 8 entries */
- /* and this is used only once anyway */
- m=0xffffffff;
- for (i=0;i<(unsigned int) buffer[0];i++){
- if (buffer[2*i+1]<m) {
- m=buffer[2*i+1];
- k=i;
- }
- }
-
- tag = tag_next(tag);
- tag->hdr.tag = ATAG_MEM;
- tag->hdr.size = tag_size(tag_mem32);
- tag->u.mem.size = buffer[2*k+2];
- tag->u.mem.start = buffer[2*k+1];
-
- size += buffer[2*k+2];
-
- buffer[2*k+1]=0xffffffff; /* mark as copied */
- }
-
- /* The command line */
- tag = tag_next(tag);
- tag->hdr.tag = ATAG_CMDLINE;
-
- c=(unsigned char *)(&buffer[34]);
- j=0;
- while (*c) tag->u.cmdline.cmdline[j++]=*c++;
-
- tag->u.cmdline.cmdline[j]=0;
- tag->hdr.size = (j + 7 + sizeof(struct tag_header)) >> 2;
-
- /* Hardware revision */
- tag = tag_next(tag);
- tag->hdr.tag = ATAG_REVISION;
- tag->hdr.size = tag_size(tag_revision);
- tag->u.revision.rev = ((unsigned char) buffer[33])-'0';
-
- /* End of the taglist */
- tag = tag_next(tag);
- tag->hdr.tag = 0;
- tag->hdr.size = 0;
-}
-
-
-typedef int (*ofw_handle_t)(void *);
-
-/* Everything below is called with a wrong MMU setting.
- * This means: no string constants, no initialization of
- * arrays, no global variables! This is ugly but I didn't
- * want to write this in assembler :-)
- */
-
-int
-of_decode_int(const unsigned char *p)
-{
- unsigned int i = *p++ << 8;
- i = (i + *p++) << 8;
- i = (i + *p++) << 8;
- return (i + *p);
-}
-
-int
-OF_finddevice(ofw_handle_t openfirmware, char *name)
-{
- unsigned int args[8];
- char service[12];
-
- service[0]='f';
- service[1]='i';
- service[2]='n';
- service[3]='d';
- service[4]='d';
- service[5]='e';
- service[6]='v';
- service[7]='i';
- service[8]='c';
- service[9]='e';
- service[10]='\0';
-
- args[0]=(unsigned int)service;
- args[1]=1;
- args[2]=1;
- args[3]=(unsigned int)name;
-
- if (openfirmware(args) == -1)
- return -1;
- return args[4];
-}
-
-int
-OF_getproplen(ofw_handle_t openfirmware, int handle, char *prop)
-{
- unsigned int args[8];
- char service[12];
-
- service[0]='g';
- service[1]='e';
- service[2]='t';
- service[3]='p';
- service[4]='r';
- service[5]='o';
- service[6]='p';
- service[7]='l';
- service[8]='e';
- service[9]='n';
- service[10]='\0';
-
- args[0] = (unsigned int)service;
- args[1] = 2;
- args[2] = 1;
- args[3] = (unsigned int)handle;
- args[4] = (unsigned int)prop;
-
- if (openfirmware(args) == -1)
- return -1;
- return args[5];
-}
-
-int
-OF_getprop(ofw_handle_t openfirmware, int handle, char *prop, void *buf, unsigned int buflen)
-{
- unsigned int args[8];
- char service[8];
-
- service[0]='g';
- service[1]='e';
- service[2]='t';
- service[3]='p';
- service[4]='r';
- service[5]='o';
- service[6]='p';
- service[7]='\0';
-
- args[0] = (unsigned int)service;
- args[1] = 4;
- args[2] = 1;
- args[3] = (unsigned int)handle;
- args[4] = (unsigned int)prop;
- args[5] = (unsigned int)buf;
- args[6] = buflen;
-
- if (openfirmware(args) == -1)
- return -1;
- return args[7];
-}
-
-asmlinkage void ofw_init(ofw_handle_t o, int *nomr, int *pointer)
-{
- int phandle,i,mem_len,buffer[32];
- char temp[15];
-
- temp[0]='/';
- temp[1]='m';
- temp[2]='e';
- temp[3]='m';
- temp[4]='o';
- temp[5]='r';
- temp[6]='y';
- temp[7]='\0';
-
- phandle=OF_finddevice(o,temp);
-
- temp[0]='r';
- temp[1]='e';
- temp[2]='g';
- temp[3]='\0';
-
- mem_len = OF_getproplen(o,phandle, temp);
- OF_getprop(o,phandle, temp, buffer, mem_len);
- *nomr=mem_len >> 3;
-
- for (i=0; i<=mem_len/4; i++) pointer[i]=of_decode_int((const unsigned char *)&buffer[i]);
-
- temp[0]='/';
- temp[1]='c';
- temp[2]='h';
- temp[3]='o';
- temp[4]='s';
- temp[5]='e';
- temp[6]='n';
- temp[7]='\0';
-
- phandle=OF_finddevice(o,temp);
-
- temp[0]='b';
- temp[1]='o';
- temp[2]='o';
- temp[3]='t';
- temp[4]='a';
- temp[5]='r';
- temp[6]='g';
- temp[7]='s';
- temp[8]='\0';
-
- mem_len = OF_getproplen(o,phandle, temp);
- OF_getprop(o,phandle, temp, buffer, mem_len);
- if (mem_len > 128) mem_len=128;
- for (i=0; i<=mem_len/4; i++) pointer[i+33]=buffer[i];
- pointer[i+33]=0;
-
- temp[0]='/';
- temp[1]='\0';
- phandle=OF_finddevice(o,temp);
- temp[0]='b';
- temp[1]='a';
- temp[2]='n';
- temp[3]='n';
- temp[4]='e';
- temp[5]='r';
- temp[6]='-';
- temp[7]='n';
- temp[8]='a';
- temp[9]='m';
- temp[10]='e';
- temp[11]='\0';
- mem_len = OF_getproplen(o,phandle, temp);
- OF_getprop(o,phandle, temp, buffer, mem_len);
- (unsigned char) pointer[32] = ((unsigned char *) buffer)[mem_len-2];
-}
+++ /dev/null
-/*
- * linux/arch/arm/kernel/time-acorn.c
- *
- * Copyright (c) 1996-2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 24-Sep-1996 RMK Created
- * 10-Oct-1996 RMK Brought up to date with arch-sa110eval
- * 04-Dec-1997 RMK Updated for new arch/arm/time.c
- * 13-May-2003 IM Brought over to ARM26
- */
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/ioc.h>
-
-extern unsigned long (*gettimeoffset)(void);
-
-static unsigned long ioctime_gettimeoffset(void)
-{
- unsigned int count1, count2, status;
- long offset;
-
- ioc_writeb (0, IOC_T0LATCH);
- barrier ();
- count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
- barrier ();
- status = ioc_readb(IOC_IRQREQA);
- barrier ();
- ioc_writeb (0, IOC_T0LATCH);
- barrier ();
- count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
-
- offset = count2;
- if (count2 < count1) {
- /*
- * We have not had an interrupt between reading count1
- * and count2.
- */
- if (status & (1 << 5))
- offset -= LATCH;
- } else if (count2 > count1) {
- /*
- * We have just had another interrupt between reading
- * count1 and count2.
- */
- offset -= LATCH;
- }
-
- offset = (LATCH - offset) * (tick_nsec / 1000);
- return (offset + LATCH/2) / LATCH;
-}
-
-void __init ioctime_init(void)
-{
- ioc_writeb(LATCH & 255, IOC_T0LTCHL);
- ioc_writeb(LATCH >> 8, IOC_T0LTCHH);
- ioc_writeb(0, IOC_T0GO);
-
- gettimeoffset = ioctime_gettimeoffset;
-}
+++ /dev/null
-/*
- * linux/arch/arm/lib/io-readsl-armv3.S
- *
- * Copyright (C) 1995-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/hardware.h>
-
-/*
- * Note that some reads can be aligned on half-word boundaries.
- */
-ENTRY(__raw_readsl)
- teq r2, #0 @ do we have to check for the zero len?
- moveq pc, lr
- ands ip, r1, #3
- bne 2f
-
-1: ldr r3, [r0]
- str r3, [r1], #4
- subs r2, r2, #1
- bne 1b
- mov pc, lr
-
-2: cmp ip, #2
- ldr ip, [r0]
- blt 4f
- bgt 6f
-
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
-3: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #16
- strne ip, [r1], #4
- movne ip, r3, lsr #16
- bne 3b
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov pc, lr
-
-4: strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
-5: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #8
- strne ip, [r1], #4
- movne ip, r3, lsr #24
- bne 5b
- strb ip, [r1], #1
- mov pc, lr
-
-6: strb ip, [r1], #1
- mov ip, ip, lsr #8
-7: subs r2, r2, #1
- ldrne r3, [r0]
- orrne ip, ip, r3, lsl #24
- strne ip, [r1], #4
- movne ip, r3, lsr #8
- bne 7b
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov ip, ip, lsr #8
- strb ip, [r1], #1
- mov pc, lr
-
+++ /dev/null
-/*
- * linux/arch/arm/lib/io-readsw-armv3.S
- *
- * Copyright (C) 1995-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/hardware.h>
-
-.insw_bad_alignment:
- adr r0, .insw_bad_align_msg
- mov r2, lr
- b panic
-.insw_bad_align_msg:
- .asciz "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
- .align
-
-.insw_align: tst r1, #1
- bne .insw_bad_alignment
-
- ldr r3, [r0]
- strb r3, [r1], #1
- mov r3, r3, lsr #8
- strb r3, [r1], #1
-
- subs r2, r2, #1
- RETINSTR(moveq, pc, lr)
-
-ENTRY(__raw_readsw)
- teq r2, #0 @ do we have to check for the zero len?
- moveq pc, lr
- tst r1, #3
- bne .insw_align
-
-.insw_aligned: mov ip, #0xff
- orr ip, ip, ip, lsl #8
- stmfd sp!, {r4, r5, r6, lr}
-
- subs r2, r2, #8
- bmi .no_insw_8
-
-.insw_8_lp: ldr r3, [r0]
- and r3, r3, ip
- ldr r4, [r0]
- orr r3, r3, r4, lsl #16
-
- ldr r4, [r0]
- and r4, r4, ip
- ldr r5, [r0]
- orr r4, r4, r5, lsl #16
-
- ldr r5, [r0]
- and r5, r5, ip
- ldr r6, [r0]
- orr r5, r5, r6, lsl #16
-
- ldr r6, [r0]
- and r6, r6, ip
- ldr lr, [r0]
- orr r6, r6, lr, lsl #16
-
- stmia r1!, {r3 - r6}
-
- subs r2, r2, #8
- bpl .insw_8_lp
-
- tst r2, #7
- LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
-
-.no_insw_8: tst r2, #4
- beq .no_insw_4
-
- ldr r3, [r0]
- and r3, r3, ip
- ldr r4, [r0]
- orr r3, r3, r4, lsl #16
-
- ldr r4, [r0]
- and r4, r4, ip
- ldr r5, [r0]
- orr r4, r4, r5, lsl #16
-
- stmia r1!, {r3, r4}
-
-.no_insw_4: tst r2, #2
- beq .no_insw_2
-
- ldr r3, [r0]
- and r3, r3, ip
- ldr r4, [r0]
- orr r3, r3, r4, lsl #16
-
- str r3, [r1], #4
-
-.no_insw_2: tst r2, #1
- ldrne r3, [r0]
- strneb r3, [r1], #1
- movne r3, r3, lsr #8
- strneb r3, [r1]
-
- LOADREGS(fd, sp!, {r4, r5, r6, pc})
-
-
+++ /dev/null
-/*
- * linux/arch/arm/lib/io-writesw-armv3.S
- *
- * Copyright (C) 1995-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/hardware.h>
-
-.outsw_bad_alignment:
- adr r0, .outsw_bad_align_msg
- mov r2, lr
- b panic
-.outsw_bad_align_msg:
- .asciz "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
- .align
-
-.outsw_align: tst r1, #1
- bne .outsw_bad_alignment
-
- add r1, r1, #2
-
- ldr r3, [r1, #-4]
- mov r3, r3, lsr #16
- orr r3, r3, r3, lsl #16
- str r3, [r0]
- subs r2, r2, #1
- RETINSTR(moveq, pc, lr)
-
-ENTRY(__raw_writesw)
- teq r2, #0 @ do we have to check for the zero len?
- moveq pc, lr
- tst r1, #3
- bne .outsw_align
-
-.outsw_aligned: stmfd sp!, {r4, r5, r6, lr}
-
- subs r2, r2, #8
- bmi .no_outsw_8
-
-.outsw_8_lp: ldmia r1!, {r3, r4, r5, r6}
-
- mov ip, r3, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r3, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
- mov ip, r4, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r4, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
- mov ip, r5, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r5, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
- mov ip, r6, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r6, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
- subs r2, r2, #8
- bpl .outsw_8_lp
-
- tst r2, #7
- LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
-
-.no_outsw_8: tst r2, #4
- beq .no_outsw_4
-
- ldmia r1!, {r3, r4}
-
- mov ip, r3, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r3, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
- mov ip, r4, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r4, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
-.no_outsw_4: tst r2, #2
- beq .no_outsw_2
-
- ldr r3, [r1], #4
-
- mov ip, r3, lsl #16
- orr ip, ip, ip, lsr #16
- str ip, [r0]
-
- mov ip, r3, lsr #16
- orr ip, ip, ip, lsl #16
- str ip, [r0]
-
-.no_outsw_2: tst r2, #1
-
- ldrne r3, [r1]
-
- movne ip, r3, lsl #16
- orrne ip, ip, ip, lsr #16
- strne ip, [r0]
-
- LOADREGS(fd, sp!, {r4, r5, r6, pc})
+++ /dev/null
-/*
- * linux/arch/arm/kernel/head-armo.S
- *
- * Copyright (C) 1994-2000 Russell King
- * Copyright (C) 2003 Ian Molton
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * 26-bit kernel startup code
- */
-#include <linux/config.h>
-#include <linux/linkage.h>
-#include <asm/mach-types.h>
-
- .globl swapper_pg_dir
- .equ swapper_pg_dir, 0x0207d000
-
-/*
- * Entry point.
- */
- .section ".init.text",#alloc,#execinstr
-ENTRY(stext)
-__entry: cmp pc, #0x02000000
- ldrlt pc, LC0 @ if 0x01800000, call at 0x02080000
- teq r0, #0 @ Check for old calling method
- blne oldparams @ Move page if old
- adr r0, LC0
- ldmib r0, {r2-r5, sp} @ Setup stack (and fetch other values)
-
- mov r0, #0 @ Clear BSS
-1: cmp r2, r3
- strcc r0, [r2], #4
- bcc 1b
-
- bl detect_proc_type
- str r0, [r4]
- bl detect_arch_type
- str r0, [r5]
-
-#ifdef CONFIG_XIP_KERNEL
- ldr r3, ETEXT @ data section copy
- ldr r4, SDATA
- ldr r5, EDATA
-1:
- ldr r6, [r3], #4
- str r6, [r4], #4
- cmp r4, r5
- blt 1b
-#endif
-
- mov fp, #0
- b start_kernel
-
-LC0: .word _stext
- .word __bss_start @ r2
- .word _end @ r3
- .word processor_id @ r4
- .word __machine_arch_type @ r5
- .word init_thread_union+8192 @ sp
-#ifdef CONFIG_XIP_KERNEL
-ETEXT: .word _endtext
-SDATA: .word _sdata
-EDATA: .word __bss_start
-#endif
-
-arm2_id: .long 0x41560200 @ ARM2 and 250 dont have a CPUID
-arm250_id: .long 0x41560250 @ So we create some after probing for them
- .align
-
-oldparams: mov r4, #0x02000000
- add r3, r4, #0x00080000
- add r4, r4, #0x0007c000
-1: ldmia r0!, {r5 - r12}
- stmia r4!, {r5 - r12}
- cmp r4, r3
- blt 1b
- mov pc, lr
-
-/*
- * We need some way to automatically detect the difference between
- * these two machines. Unfortunately, it is not possible to detect
- * the presence of the SuperIO chip, because that will hang the old
- * Archimedes machines solid.
- */
-/* DAG: Outdated, these have been combined !!!!!!! */
-detect_arch_type:
-#if defined(CONFIG_ARCH_ARC)
- mov r0, #MACH_TYPE_ARCHIMEDES
-#elif defined(CONFIG_ARCH_A5K)
- mov r0, #MACH_TYPE_A5K
-#endif
- mov pc, lr
-
-detect_proc_type:
- mov ip, lr
- mov r2, #0xea000000 @ Point undef instr to continuation
- adr r0, continue - 12
- orr r0, r2, r0, lsr #2
- mov r1, #0
- str r0, [r1, #4]
- ldr r0, arm2_id
- swp r2, r2, [r1] @ check for swp (ARM2 cant)
- ldr r0, arm250_id
- mrc 15, 0, r3, c0, c0 @ check for CP#15 (ARM250 cant)
- mov r0, r3
-continue: mov r2, #0xeb000000 @ Make undef vector loop
- sub r2, r2, #2
- str r2, [r1, #4]
- mov pc, ip
+++ /dev/null
-/*
- * linux/arch/arm/kernel/oldlatches.c
- *
- * Copyright (C) David Alan Gilbert 1995/1996,2000
- * Copyright (C) Ian Molton 2003
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Support for the latches on the old Archimedes which control the floppy,
- * hard disc and printer
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-
-#include <asm/io.h>
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/oldlatches.h>
-
-static unsigned char latch_a_copy;
-static unsigned char latch_b_copy;
-
-/* newval=(oldval & ~mask)|newdata */
-void oldlatch_aupdate(unsigned char mask,unsigned char newdata)
-{
- unsigned long flags;
-
- BUG_ON(!machine_is_archimedes());
-
- local_irq_save(flags); //FIXME: was local_save_flags
- latch_a_copy = (latch_a_copy & ~mask) | newdata;
- __raw_writeb(latch_a_copy, LATCHA_BASE);
- local_irq_restore(flags);
-
- printk("Latch: A = 0x%02x\n", latch_a_copy);
-}
-
-
-/* newval=(oldval & ~mask)|newdata */
-void oldlatch_bupdate(unsigned char mask,unsigned char newdata)
-{
- unsigned long flags;
-
- BUG_ON(!machine_is_archimedes());
-
-
- local_irq_save(flags);//FIXME: was local_save_flags
- latch_b_copy = (latch_b_copy & ~mask) | newdata;
- __raw_writeb(latch_b_copy, LATCHB_BASE);
- local_irq_restore(flags);
-
- printk("Latch: B = 0x%02x\n", latch_b_copy);
-}
-
-static int __init oldlatch_init(void)
-{
- if (machine_is_archimedes()) {
- oldlatch_aupdate(0xff, 0xff);
- /* Thats no FDC reset...*/
- oldlatch_bupdate(0xff, LATCHB_FDCRESET);
- }
- return 0;
-}
-
-arch_initcall(oldlatch_init);
-
-EXPORT_SYMBOL(oldlatch_aupdate);
-EXPORT_SYMBOL(oldlatch_bupdate);
+++ /dev/null
-/*
- * linux/arch/arm/mm/small_page.c
- *
- * Copyright (C) 1996 Russell King
- * Copyright (C) 2003 Ian Molton
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 26/01/1996 RMK Cleaned up various areas to make little more generic
- * 07/02/1999 RMK Support added for 16K and 32K page sizes
- * containing 8K blocks
- */
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/smp.h>
-#include <linux/bitops.h>
-
-#include <asm/pgtable.h>
-
-#define PEDANTIC
-
-/*
- * Requirement:
- * We need to be able to allocate naturally aligned memory of finer
- * granularity than the page size. This is typically used for the
- * second level page tables on 32-bit ARMs.
- *
- * Theory:
- * We "misuse" the Linux memory management system. We use alloc_page
- * to allocate a page and then mark it as reserved. The Linux memory
- * management system will then ignore the "offset", "next_hash" and
- * "pprev_hash" entries in the mem_map for this page.
- *
- * We then use a bitstring in the "offset" field to mark which segments
- * of the page are in use, and manipulate this as required during the
- * allocation and freeing of these small pages.
- *
- * We also maintain a queue of pages being used for this purpose using
- * the "next_hash" and "pprev_hash" entries of mem_map;
- */
-
-struct order {
- struct list_head queue;
- unsigned int mask; /* (1 << shift) - 1 */
- unsigned int shift; /* (1 << shift) size of page */
- unsigned int block_mask; /* nr_blocks - 1 */
- unsigned int all_used; /* (1 << nr_blocks) - 1 */
-};
-
-
-static struct order orders[] = {
-#if PAGE_SIZE == 32768
- { LIST_HEAD_INIT(orders[0].queue), 2047, 11, 15, 0x0000ffff },
- { LIST_HEAD_INIT(orders[1].queue), 8191, 13, 3, 0x0000000f }
-#else
-#error unsupported page size (ARGH!)
-#endif
-};
-
-#define USED_MAP(pg) ((pg)->index)
-#define TEST_AND_CLEAR_USED(pg,off) (test_and_clear_bit(off, &USED_MAP(pg)))
-#define SET_USED(pg,off) (set_bit(off, &USED_MAP(pg)))
-
-static spinlock_t small_page_lock = SPIN_LOCK_UNLOCKED;
-
-static unsigned long __get_small_page(int priority, struct order *order)
-{
- unsigned long flags;
- struct page *page;
- int offset;
-
- do {
- spin_lock_irqsave(&small_page_lock, flags);
-
- if (list_empty(&order->queue))
- goto need_new_page;
-
- page = list_entry(order->queue.next, struct page, list);
-again:
-#ifdef PEDANTIC
- if (USED_MAP(page) & ~order->all_used)
- PAGE_BUG(page);
-#endif
- offset = ffz(USED_MAP(page));
- SET_USED(page, offset);
- if (USED_MAP(page) == order->all_used)
- list_del_init(&page->lru);
- spin_unlock_irqrestore(&small_page_lock, flags);
-
- return (unsigned long) page_address(page) + (offset << order->shift);
-
-need_new_page:
- spin_unlock_irqrestore(&small_page_lock, flags);
- page = alloc_page(priority);
- spin_lock_irqsave(&small_page_lock, flags);
-
- if (list_empty(&order->queue)) {
- if (!page)
- goto no_page;
- SetPageReserved(page);
- USED_MAP(page) = 0;
- list_add(&page->lru, &order->queue);
- goto again;
- }
-
- spin_unlock_irqrestore(&small_page_lock, flags);
- __free_page(page);
- } while (1);
-
-no_page:
- spin_unlock_irqrestore(&small_page_lock, flags);
- return 0;
-}
-
-static void __free_small_page(unsigned long spage, struct order *order)
-{
- unsigned long flags;
- struct page *page;
-
- if (virt_addr_valid(spage)) {
- page = virt_to_page(spage);
-
- /*
- * The container-page must be marked Reserved
- */
- if (!PageReserved(page) || spage & order->mask)
- goto non_small;
-
-#ifdef PEDANTIC
- if (USED_MAP(page) & ~order->all_used)
- PAGE_BUG(page);
-#endif
-
- spage = spage >> order->shift;
- spage &= order->block_mask;
-
- /*
- * the following must be atomic wrt get_page
- */
- spin_lock_irqsave(&small_page_lock, flags);
-
- if (USED_MAP(page) == order->all_used)
- list_add(&page->lru, &order->queue);
-
- if (!TEST_AND_CLEAR_USED(page, spage))
- goto already_free;
-
- if (USED_MAP(page) == 0)
- goto free_page;
-
- spin_unlock_irqrestore(&small_page_lock, flags);
- }
- return;
-
-free_page:
- /*
- * unlink the page from the small page queue and free it
- */
- list_del_init(&page->lru);
- spin_unlock_irqrestore(&small_page_lock, flags);
- ClearPageReserved(page);
- __free_page(page);
- return;
-
-non_small:
- printk("Trying to free non-small page from %p\n", __builtin_return_address(0));
- return;
-already_free:
- printk("Trying to free free small page from %p\n", __builtin_return_address(0));
-}
-
-unsigned long get_page_8k(int priority)
-{
- return __get_small_page(priority, orders+1);
-}
-
-void free_page_8k(unsigned long spage)
-{
- __free_small_page(spage, orders+1);
-}
+++ /dev/null
-/*
- * linux/arch/arm/mm/mm-armo.c
- *
- * Copyright (C) 1998-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Page table sludge for older ARM processor architectures.
- */
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/bootmem.h>
-
-#include <asm/pgtable.h>
-#include <asm/pgalloc.h>
-#include <asm/page.h>
-#include <asm/memory.h>
-#include <asm/hardware.h>
-
-#include <asm/map.h>
-
-#define MEMC_TABLE_SIZE (256*sizeof(unsigned long))
-
-kmem_cache_t *pte_cache, *pgd_cache;
-int page_nr;
-
-/*
- * Allocate space for a page table and a MEMC table.
- * Note that we place the MEMC
- * table before the page directory. This means we can
- * easily get to both tightly-associated data structures
- * with a single pointer.
- */
-static inline pgd_t *alloc_pgd_table(void)
-{
- void *pg2k = kmem_cache_alloc(pgd_cache, GFP_KERNEL);
-
- if (pg2k)
- pg2k += MEMC_TABLE_SIZE;
-
- return (pgd_t *)pg2k;
-}
-
-/*
- * Free a page table. this function is the counterpart to get_pgd_slow
- * below, not alloc_pgd_table above.
- */
-void free_pgd_slow(pgd_t *pgd)
-{
- unsigned long tbl = (unsigned long)pgd;
-
- tbl -= MEMC_TABLE_SIZE;
-
- kmem_cache_free(pgd_cache, (void *)tbl);
-}
-
-/*
- * Allocate a new pgd and fill it in ready for use
- *
- * A new tasks pgd is completely empty (all pages !present) except for:
- *
- * o The machine vectors at virtual address 0x0
- * o The vmalloc region at the top of address space
- *
- */
-#define FIRST_KERNEL_PGD_NR (FIRST_USER_PGD_NR + USER_PTRS_PER_PGD)
-
-pgd_t *get_pgd_slow(struct mm_struct *mm)
-{
- pgd_t *new_pgd, *init_pgd;
- pmd_t *new_pmd, *init_pmd;
- pte_t *new_pte, *init_pte;
-
- new_pgd = alloc_pgd_table();
- if (!new_pgd)
- goto no_pgd;
-
- /*
- * This lock is here just to satisfy pmd_alloc and pte_lock
- * FIXME: I bet we could avoid taking it pretty much altogether
- */
- spin_lock(&mm->page_table_lock);
-
- /*
- * On ARM, first page must always be allocated since it contains
- * the machine vectors.
- */
- new_pmd = pmd_alloc(mm, new_pgd, 0);
- if (!new_pmd)
- goto no_pmd;
-
- new_pte = pte_alloc_kernel(mm, new_pmd, 0);
- if (!new_pte)
- goto no_pte;
-
- init_pgd = pgd_offset(&init_mm, 0);
- init_pmd = pmd_offset(init_pgd, 0);
- init_pte = pte_offset(init_pmd, 0);
-
- set_pte(new_pte, *init_pte);
-
- /*
- * the page table entries are zeroed
- * when the table is created. (see the cache_ctor functions below)
- * Now we need to plonk the kernel (vmalloc) area at the end of
- * the address space. We copy this from the init thread, just like
- * the init_pte we copied above...
- */
- memcpy(new_pgd + FIRST_KERNEL_PGD_NR, init_pgd + FIRST_KERNEL_PGD_NR,
- (PTRS_PER_PGD - FIRST_KERNEL_PGD_NR) * sizeof(pgd_t));
-
- spin_unlock(&mm->page_table_lock);
-
- /* update MEMC tables */
- cpu_memc_update_all(new_pgd);
- return new_pgd;
-
-no_pte:
- spin_unlock(&mm->page_table_lock);
- pmd_free(new_pmd);
- free_pgd_slow(new_pgd);
- return NULL;
-
-no_pmd:
- spin_unlock(&mm->page_table_lock);
- free_pgd_slow(new_pgd);
- return NULL;
-
-no_pgd:
- return NULL;
-}
-
-/*
- * No special code is required here.
- */
-void setup_mm_for_reboot(char mode)
-{
-}
-
-/*
- * This contains the code to setup the memory map on an ARM2/ARM250/ARM3
- * o swapper_pg_dir = 0x0207d000
- * o kernel proper starts at 0x0208000
- * o create (allocate) a pte to contain the machine vectors
- * o populate the pte (points to 0x02078000) (FIXME - is it zeroed?)
- * o populate the init tasks page directory (pgd) with the new pte
- * o zero the rest of the init tasks pgdir (FIXME - what about vmalloc?!)
- */
-void __init memtable_init(struct meminfo *mi)
-{
- pte_t *pte;
- int i;
-
- page_nr = max_low_pfn;
-
- pte = alloc_bootmem_low_pages(PTRS_PER_PTE * sizeof(pte_t));
- pte[0] = mk_pte_phys(PAGE_OFFSET + SCREEN_SIZE, PAGE_READONLY);
- pmd_populate(&init_mm, pmd_offset(swapper_pg_dir, 0), pte);
-
- for (i = 1; i < PTRS_PER_PGD; i++)
- pgd_val(swapper_pg_dir[i]) = 0;
-}
-
-void __init iotable_init(struct map_desc *io_desc)
-{
- /* nothing to do */
-}
-
-/*
- * We never have holes in the memmap
- */
-void __init create_memmap_holes(struct meminfo *mi)
-{
-}
-
-static void pte_cache_ctor(void *pte, kmem_cache_t *cache, unsigned long flags)
-{
- memzero(pte, sizeof(pte_t) * PTRS_PER_PTE);
-}
-
-static void pgd_cache_ctor(void *pgd, kmem_cache_t *cache, unsigned long flags)
-{
- memzero(pgd + MEMC_TABLE_SIZE, USER_PTRS_PER_PGD * sizeof(pgd_t));
-}
-
-void __init pgtable_cache_init(void)
-{
- pte_cache = kmem_cache_create("pte-cache",
- sizeof(pte_t) * PTRS_PER_PTE,
- 0, 0, pte_cache_ctor, NULL);
- if (!pte_cache)
- BUG();
-
- pgd_cache = kmem_cache_create("pgd-cache", MEMC_TABLE_SIZE +
- sizeof(pgd_t) * PTRS_PER_PGD,
- 0, 0, pgd_cache_ctor, NULL);
- if (!pgd_cache)
- BUG();
-}
+++ /dev/null
-/* $Id: ethernet.c,v 1.22 2004/05/14 07:58:03 starvik Exp $
- *
- * e100net.c: A network driver for the ETRAX 100LX network controller.
- *
- * Copyright (c) 1998-2002 Axis Communications AB.
- *
- * The outline of this driver comes from skeleton.c.
- *
- * $Log: ethernet.c,v $
- * Revision 1.22 2004/05/14 07:58:03 starvik
- * Merge of changes from 2.4
- *
- * Revision 1.20 2004/03/11 11:38:40 starvik
- * Merge of Linux 2.6.4
- *
- * Revision 1.18 2003/12/03 13:45:46 starvik
- * Use hardware pad for short packets to prevent information leakage.
- *
- * Revision 1.17 2003/07/04 08:27:37 starvik
- * Merge of Linux 2.5.74
- *
- * Revision 1.16 2003/04/24 08:28:22 starvik
- * New LED behaviour: LED off when no link
- *
- * Revision 1.15 2003/04/09 05:20:47 starvik
- * Merge of Linux 2.5.67
- *
- * Revision 1.13 2003/03/06 16:11:01 henriken
- * Off by one error in group address register setting.
- *
- * Revision 1.12 2003/02/27 17:24:19 starvik
- * Corrected Rev to Revision
- *
- * Revision 1.11 2003/01/24 09:53:21 starvik
- * Oops. Initialize GA to 0, not to 1
- *
- * Revision 1.10 2003/01/24 09:50:55 starvik
- * Initialize GA_0 and GA_1 to 0 to avoid matching of unwanted packets
- *
- * Revision 1.9 2002/12/13 07:40:58 starvik
- * Added basic ethtool interface
- * Handled out of memory when allocating new buffers
- *
- * Revision 1.8 2002/12/11 13:13:57 starvik
- * Added arch/ to v10 specific includes
- * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
- *
- * Revision 1.7 2002/11/26 09:41:42 starvik
- * Added e100_set_config (standard interface to set media type)
- * Added protection against preemptive scheduling
- * Added standard MII ioctls
- *
- * Revision 1.6 2002/11/21 07:18:18 starvik
- * Timers must be initialized in 2.5.48
- *
- * Revision 1.5 2002/11/20 11:56:11 starvik
- * Merge of Linux 2.5.48
- *
- * Revision 1.4 2002/11/18 07:26:46 starvik
- * Linux 2.5 port of latest Linux 2.4 ethernet driver
- *
- * Revision 1.33 2002/10/02 20:16:17 hp
- * SETF, SETS: Use underscored IO_x_ macros rather than incorrect token concatenation
- *
- * Revision 1.32 2002/09/16 06:05:58 starvik
- * Align memory returned by dev_alloc_skb
- * Moved handling of sent packets to interrupt to avoid reference counting problem
- *
- * Revision 1.31 2002/09/10 13:28:23 larsv
- * Return -EINVAL for unknown ioctls to avoid confusing tools that tests
- * for supported functionality by issuing special ioctls, i.e. wireless
- * extensions.
- *
- * Revision 1.30 2002/05/07 18:50:08 johana
- * Correct spelling in comments.
- *
- * Revision 1.29 2002/05/06 05:38:49 starvik
- * Performance improvements:
- * Large packets are not copied (breakpoint set to 256 bytes)
- * The cache bug workaround is delayed until half of the receive list
- * has been used
- * Added transmit list
- * Transmit interrupts are only enabled when transmit queue is full
- *
- * Revision 1.28.2.1 2002/04/30 08:15:51 starvik
- * Performance improvements:
- * Large packets are not copied (breakpoint set to 256 bytes)
- * The cache bug workaround is delayed until half of the receive list
- * has been used.
- * Added transmit list
- * Transmit interrupts are only enabled when transmit queue is full
- *
- * Revision 1.28 2002/04/22 11:47:21 johana
- * Fix according to 2.4.19-pre7. time_after/time_before and
- * missing end of comment.
- * The patch has a typo for ethernet.c in e100_clear_network_leds(),
- * that is fixed here.
- *
- * Revision 1.27 2002/04/12 11:55:11 bjornw
- * Added TODO
- *
- * Revision 1.26 2002/03/15 17:11:02 bjornw
- * Use prepare_rx_descriptor after the CPU has touched the receiving descs
- *
- * Revision 1.25 2002/03/08 13:07:53 bjornw
- * Unnecessary spinlock removed
- *
- * Revision 1.24 2002/02/20 12:57:43 fredriks
- * Replaced MIN() with min().
- *
- * Revision 1.23 2002/02/20 10:58:14 fredriks
- * Strip the Ethernet checksum (4 bytes) before forwarding a frame to upper layers.
- *
- * Revision 1.22 2002/01/30 07:48:22 matsfg
- * Initiate R_NETWORK_TR_CTRL
- *
- * Revision 1.21 2001/11/23 11:54:49 starvik
- * Added IFF_PROMISC and IFF_ALLMULTI handling in set_multicast_list
- * Removed compiler warnings
- *
- * Revision 1.20 2001/11/12 19:26:00 pkj
- * * Corrected e100_negotiate() to not assign half to current_duplex when
- * it was supposed to compare them...
- * * Cleaned up failure handling in e100_open().
- * * Fixed compiler warnings.
- *
- * Revision 1.19 2001/11/09 07:43:09 starvik
- * Added full duplex support
- * Added ioctl to set speed and duplex
- * Clear LED timer only runs when LED is lit
- *
- * Revision 1.18 2001/10/03 14:40:43 jonashg
- * Update rx_bytes counter.
- *
- * Revision 1.17 2001/06/11 12:43:46 olof
- * Modified defines for network LED behavior
- *
- * Revision 1.16 2001/05/30 06:12:46 markusl
- * TxDesc.next should not be set to NULL
- *
- * Revision 1.15 2001/05/29 10:27:04 markusl
- * Updated after review remarks:
- * +Use IO_EXTRACT
- * +Handle underrun
- *
- * Revision 1.14 2001/05/29 09:20:14 jonashg
- * Use driver name on printk output so one can tell which driver that complains.
- *
- * Revision 1.13 2001/05/09 12:35:59 johana
- * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
- *
- * Revision 1.12 2001/04/05 11:43:11 tobiasa
- * Check dev before panic.
- *
- * Revision 1.11 2001/04/04 11:21:05 markusl
- * Updated according to review remarks
- *
- * Revision 1.10 2001/03/26 16:03:06 bjornw
- * Needs linux/config.h
- *
- * Revision 1.9 2001/03/19 14:47:48 pkj
- * * Make sure there is always a pause after the network LEDs are
- * changed so they will not look constantly lit during heavy traffic.
- * * Always use HZ when setting times relative to jiffies.
- * * Use LED_NETWORK_SET() when setting the network LEDs.
- *
- * Revision 1.8 2001/02/27 13:52:48 bjornw
- * malloc.h -> slab.h
- *
- * Revision 1.7 2001/02/23 13:46:38 bjornw
- * Spellling check
- *
- * Revision 1.6 2001/01/26 15:21:04 starvik
- * Don't disable interrupts while reading MDIO registers (MDIO is slow)
- * Corrected promiscuous mode
- * Improved deallocation of IRQs ("ifconfig eth0 down" now works)
- *
- * Revision 1.5 2000/11/29 17:22:22 bjornw
- * Get rid of the udword types legacy stuff
- *
- * Revision 1.4 2000/11/22 16:36:09 bjornw
- * Please marketing by using the correct case when spelling Etrax.
- *
- * Revision 1.3 2000/11/21 16:43:04 bjornw
- * Minor short->int change
- *
- * Revision 1.2 2000/11/08 14:27:57 bjornw
- * 2.4 port
- *
- * Revision 1.1 2000/11/06 13:56:00 bjornw
- * Verbatim copy of the 1.24 version of e100net.c from elinux
- *
- * Revision 1.24 2000/10/04 15:55:23 bjornw
- * * Use virt_to_phys etc. for DMA addresses
- * * Removed bogus CHECKSUM_UNNECESSARY
- *
- *
- */
-
-#include <linux/config.h>
-
-#include <linux/module.h>
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/delay.h>
-#include <linux/types.h>
-#include <linux/fcntl.h>
-#include <linux/interrupt.h>
-#include <linux/ptrace.h>
-#include <linux/ioport.h>
-#include <linux/in.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/spinlock.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-
-#include <linux/if.h>
-#include <linux/mii.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/ethtool.h>
-
-#include <asm/arch/svinto.h>/* DMA and register descriptions */
-#include <asm/io.h> /* LED_* I/O functions */
-#include <asm/irq.h>
-#include <asm/dma.h>
-#include <asm/system.h>
-#include <asm/bitops.h>
-#include <asm/ethernet.h>
-#include <asm/cache.h>
-
-//#define ETHDEBUG
-#define D(x)
-
-/*
- * The name of the card. Is used for messages and in the requests for
- * io regions, irqs and dma channels
- */
-
-static const char* cardname = "ETRAX 100LX built-in ethernet controller";
-
-/* A default ethernet address. Highlevel SW will set the real one later */
-
-static struct sockaddr default_mac = {
- 0,
- { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
-};
-
-/* Information that need to be kept for each board. */
-struct net_local {
- struct net_device_stats stats;
-
- /* Tx control lock. This protects the transmit buffer ring
- * state along with the "tx full" state of the driver. This
- * means all netif_queue flow control actions are protected
- * by this lock as well.
- */
- spinlock_t lock;
-};
-
-typedef struct etrax_eth_descr
-{
- etrax_dma_descr descr;
- struct sk_buff* skb;
-} etrax_eth_descr;
-
-/* Some transceivers requires special handling */
-struct transceiver_ops
-{
- unsigned int oui;
- void (*check_speed)(void);
- void (*check_duplex)(void);
-};
-
-struct transceiver_ops* transceiver;
-
-/* Duplex settings */
-enum duplex
-{
- half,
- full,
- autoneg
-};
-
-/* Dma descriptors etc. */
-
-#define MAX_MEDIA_DATA_SIZE 1518
-
-#define MIN_PACKET_LEN 46
-#define ETHER_HEAD_LEN 14
-
-/*
-** MDIO constants.
-*/
-#define MDIO_BASE_STATUS_REG 0x1
-#define MDIO_BASE_CONTROL_REG 0x0
-#define MDIO_PHY_ID_HIGH_REG 0x2
-#define MDIO_PHY_ID_LOW_REG 0x3
-#define MDIO_BC_NEGOTIATE 0x0200
-#define MDIO_BC_FULL_DUPLEX_MASK 0x0100
-#define MDIO_BC_AUTO_NEG_MASK 0x1000
-#define MDIO_BC_SPEED_SELECT_MASK 0x2000
-#define MDIO_STATUS_100_FD 0x4000
-#define MDIO_STATUS_100_HD 0x2000
-#define MDIO_STATUS_10_FD 0x1000
-#define MDIO_STATUS_10_HD 0x0800
-#define MDIO_STATUS_SPEED_DUPLEX_MASK 0x7800
-#define MDIO_ADVERTISMENT_REG 0x4
-#define MDIO_ADVERT_100_FD 0x100
-#define MDIO_ADVERT_100_HD 0x080
-#define MDIO_ADVERT_10_FD 0x040
-#define MDIO_ADVERT_10_HD 0x020
-#define MDIO_LINK_UP_MASK 0x4
-#define MDIO_START 0x1
-#define MDIO_READ 0x2
-#define MDIO_WRITE 0x1
-#define MDIO_PREAMBLE 0xfffffffful
-
-/* Broadcom specific */
-#define MDIO_AUX_CTRL_STATUS_REG 0x18
-#define MDIO_BC_FULL_DUPLEX_IND 0x1
-#define MDIO_BC_SPEED 0x2
-
-/* TDK specific */
-#define MDIO_TDK_DIAGNOSTIC_REG 18
-#define MDIO_TDK_DIAGNOSTIC_RATE 0x400
-#define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
-
-/* Network flash constants */
-#define NET_FLASH_TIME (HZ/50) /* 20 ms */
-#define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
-#define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
-#define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */
-
-#define NO_NETWORK_ACTIVITY 0
-#define NETWORK_ACTIVITY 1
-
-#define NBR_OF_RX_DESC 64
-#define NBR_OF_TX_DESC 256
-
-/* Large packets are sent directly to upper layers while small packets are */
-/* copied (to reduce memory waste). The following constant decides the breakpoint */
-#define RX_COPYBREAK 256
-
-/* Due to a chip bug we need to flush the cache when descriptors are returned */
-/* to the DMA. To decrease performance impact we return descriptors in chunks. */
-/* The following constant determines the number of descriptors to return. */
-#define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2
-
-#define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
-
-/* Define some macros to access ETRAX 100 registers */
-#define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
- IO_FIELD_(reg##_, field##_, val)
-#define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
- IO_STATE_(reg##_, field##_, _##val)
-
-static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
- to be processed */
-static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
-static etrax_eth_descr *myPrevRxDesc; /* The descriptor right before myNextRxDesc */
-
-static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
-
-static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */
-static etrax_eth_descr* myLastTxDesc; /* End of send queue */
-static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */
-static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
-
-static unsigned int network_rec_config_shadow = 0;
-static unsigned int mdio_phy_addr; /* Transciever address */
-
-static unsigned int network_tr_ctrl_shadow = 0;
-
-/* Network speed indication. */
-static struct timer_list speed_timer = TIMER_INITIALIZER(NULL, 0, 0);
-static struct timer_list clear_led_timer = TIMER_INITIALIZER(NULL, 0, 0);
-static int current_speed; /* Speed read from transceiver */
-static int current_speed_selection; /* Speed selected by user */
-static unsigned long led_next_time;
-static int led_active;
-static int rx_queue_len;
-
-/* Duplex */
-static struct timer_list duplex_timer = TIMER_INITIALIZER(NULL, 0, 0);
-static int full_duplex;
-static enum duplex current_duplex;
-
-/* Index to functions, as function prototypes. */
-
-static int etrax_ethernet_init(void);
-
-static int e100_open(struct net_device *dev);
-static int e100_set_mac_address(struct net_device *dev, void *addr);
-static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
-static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-static irqreturn_t e100nw_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-static void e100_rx(struct net_device *dev);
-static int e100_close(struct net_device *dev);
-static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
-static int e100_ethtool_ioctl(struct net_device* dev, struct ifreq *ifr);
-static int e100_set_config(struct net_device* dev, struct ifmap* map);
-static void e100_tx_timeout(struct net_device *dev);
-static struct net_device_stats *e100_get_stats(struct net_device *dev);
-static void set_multicast_list(struct net_device *dev);
-static void e100_hardware_send_packet(char *buf, int length);
-static void update_rx_stats(struct net_device_stats *);
-static void update_tx_stats(struct net_device_stats *);
-static int e100_probe_transceiver(void);
-
-static void e100_check_speed(unsigned long dummy);
-static void e100_set_speed(unsigned long speed);
-static void e100_check_duplex(unsigned long dummy);
-static void e100_set_duplex(enum duplex);
-static void e100_negotiate(void);
-
-static unsigned short e100_get_mdio_reg(unsigned char reg_num);
-static void e100_set_mdio_reg(unsigned char reg, unsigned short data);
-static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
-static void e100_send_mdio_bit(unsigned char bit);
-static unsigned char e100_receive_mdio_bit(void);
-static void e100_reset_transceiver(void);
-
-static void e100_clear_network_leds(unsigned long dummy);
-static void e100_set_network_leds(int active);
-
-static void broadcom_check_speed(void);
-static void broadcom_check_duplex(void);
-static void tdk_check_speed(void);
-static void tdk_check_duplex(void);
-static void generic_check_speed(void);
-static void generic_check_duplex(void);
-
-struct transceiver_ops transceivers[] =
-{
- {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
- {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
- {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
- {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
-};
-
-#define tx_done(dev) (*R_DMA_CH0_CMD == 0)
-
-/*
- * Check for a network adaptor of this type, and return '0' if one exists.
- * If dev->base_addr == 0, probe all likely locations.
- * If dev->base_addr == 1, always return failure.
- * If dev->base_addr == 2, allocate space for the device and return success
- * (detachable devices only).
- */
-
-static int __init
-etrax_ethernet_init(void)
-{
- struct net_device *dev;
- int i, err;
-
- printk(KERN_INFO
- "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 2000-2003 Axis Communications AB\n");
-
- dev = alloc_etherdev(sizeof(struct net_local));
- if (!dev)
- return -ENOMEM;
-
- dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
-
- /* now setup our etrax specific stuff */
-
- dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
- dev->dma = NETWORK_RX_DMA_NBR;
-
- /* fill in our handlers so the network layer can talk to us in the future */
-
- dev->open = e100_open;
- dev->hard_start_xmit = e100_send_packet;
- dev->stop = e100_close;
- dev->get_stats = e100_get_stats;
- dev->set_multicast_list = set_multicast_list;
- dev->set_mac_address = e100_set_mac_address;
- dev->do_ioctl = e100_ioctl;
- dev->set_config = e100_set_config;
- dev->tx_timeout = e100_tx_timeout;
-
- /* Initialise the list of Etrax DMA-descriptors */
-
- /* Initialise receive descriptors */
-
- for (i = 0; i < NBR_OF_RX_DESC; i++) {
- /* Allocate two extra cachelines to make sure that buffer used by DMA
- * does not share cacheline with any other data (to avoid cache bug)
- */
- RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
- RxDescList[i].descr.ctrl = 0;
- RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;
- RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]);
- RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
- RxDescList[i].descr.status = 0;
- RxDescList[i].descr.hw_len = 0;
- prepare_rx_descriptor(&RxDescList[i].descr);
- }
-
- RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol;
- RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]);
- rx_queue_len = 0;
-
- /* Initialize transmit descriptors */
- for (i = 0; i < NBR_OF_TX_DESC; i++) {
- TxDescList[i].descr.ctrl = 0;
- TxDescList[i].descr.sw_len = 0;
- TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr);
- TxDescList[i].descr.buf = 0;
- TxDescList[i].descr.status = 0;
- TxDescList[i].descr.hw_len = 0;
- TxDescList[i].skb = 0;
- }
-
- TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol;
- TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr);
-
- /* Initialise initial pointers */
-
- myNextRxDesc = &RxDescList[0];
- myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
- myPrevRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
- myFirstTxDesc = &TxDescList[0];
- myNextTxDesc = &TxDescList[0];
- myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
-
- /* Register device */
- err = register_netdev(dev);
- if (err) {
- free_netdev(dev);
- return err;
- }
-
- /* set the default MAC address */
-
- e100_set_mac_address(dev, &default_mac);
-
- /* Initialize speed indicator stuff. */
-
- current_speed = 10;
- current_speed_selection = 0; /* Auto */
- speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
- speed_timer.function = e100_check_speed;
-
- clear_led_timer.function = e100_clear_network_leds;
-
- full_duplex = 0;
- current_duplex = autoneg;
- duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
- duplex_timer.function = e100_check_duplex;
-
- /* Initialize group address registers to make sure that no */
- /* unwanted addresses are matched */
- *R_NETWORK_GA_0 = 0x00000000;
- *R_NETWORK_GA_1 = 0x00000000;
- return 0;
-}
-
-/* set MAC address of the interface. called from the core after a
- * SIOCSIFADDR ioctl, and from the bootup above.
- */
-
-static int
-e100_set_mac_address(struct net_device *dev, void *p)
-{
- struct net_local *np = (struct net_local *)dev->priv;
- struct sockaddr *addr = p;
- int i;
-
- spin_lock(&np->lock); /* preemption protection */
-
- /* remember it */
-
- memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
-
- /* Write it to the hardware.
- * Note the way the address is wrapped:
- * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
- * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
- */
-
- *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
- (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
- *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
- *R_NETWORK_SA_2 = 0;
-
- /* show it in the log as well */
-
- printk(KERN_INFO "%s: changed MAC to ", dev->name);
-
- for (i = 0; i < 5; i++)
- printk("%02X:", dev->dev_addr[i]);
-
- printk("%02X\n", dev->dev_addr[i]);
-
- spin_unlock(&np->lock);
-
- return 0;
-}
-
-/*
- * Open/initialize the board. This is called (in the current kernel)
- * sometime after booting when the 'ifconfig' program is run.
- *
- * This routine should set everything up anew at each open, even
- * registers that "should" only need to be set once at boot, so that
- * there is non-reboot way to recover if something goes wrong.
- */
-
-static int
-e100_open(struct net_device *dev)
-{
- unsigned long flags;
-
- /* enable the MDIO output pin */
-
- *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
-
- *R_IRQ_MASK0_CLR =
- IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
- IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
- IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
-
- /* clear dma0 and 1 eop and descr irq masks */
- *R_IRQ_MASK2_CLR =
- IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
- IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
- IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
- IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
-
- /* Reset and wait for the DMA channels */
-
- RESET_DMA(NETWORK_TX_DMA_NBR);
- RESET_DMA(NETWORK_RX_DMA_NBR);
- WAIT_DMA(NETWORK_TX_DMA_NBR);
- WAIT_DMA(NETWORK_RX_DMA_NBR);
-
- /* Initialise the etrax network controller */
-
- /* allocate the irq corresponding to the receiving DMA */
-
- if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt, 0,
- cardname, (void *)dev)) {
- goto grace_exit0;
- }
-
- /* allocate the irq corresponding to the transmitting DMA */
-
- if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
- cardname, (void *)dev)) {
- goto grace_exit1;
- }
-
- /* allocate the irq corresponding to the network errors etc */
-
- if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
- cardname, (void *)dev)) {
- goto grace_exit2;
- }
-
- /* give the HW an idea of what MAC address we want */
-
- *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
- (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
- *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
- *R_NETWORK_SA_2 = 0;
-
-#if 0
- /* use promiscuous mode for testing */
- *R_NETWORK_GA_0 = 0xffffffff;
- *R_NETWORK_GA_1 = 0xffffffff;
-
- *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
-#else
- SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
- SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
- SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
- *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
-#endif
-
- *R_NETWORK_GEN_CONFIG =
- IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
- IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
-
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
- *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
-
- save_flags(flags);
- cli();
-
- /* enable the irq's for ethernet DMA */
-
- *R_IRQ_MASK2_SET =
- IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
- IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
-
- *R_IRQ_MASK0_SET =
- IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
- IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
- IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
-
- /* make sure the irqs are cleared */
-
- *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
- *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
-
- /* make sure the rec and transmit error counters are cleared */
-
- (void)*R_REC_COUNTERS; /* dummy read */
- (void)*R_TR_COUNTERS; /* dummy read */
-
- /* start the receiving DMA channel so we can receive packets from now on */
-
- *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
- *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
-
- /* Set up transmit DMA channel so it can be restarted later */
-
- *R_DMA_CH0_FIRST = 0;
- *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
-
- restore_flags(flags);
-
- /* Probe for transceiver */
- if (e100_probe_transceiver())
- goto grace_exit3;
-
- /* Start duplex/speed timers */
- add_timer(&speed_timer);
- add_timer(&duplex_timer);
-
- /* We are now ready to accept transmit requeusts from
- * the queueing layer of the networking.
- */
- netif_start_queue(dev);
-
- return 0;
-
-grace_exit3:
- free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
-grace_exit2:
- free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
-grace_exit1:
- free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
-grace_exit0:
- return -EAGAIN;
-}
-
-
-static void
-generic_check_speed(void)
-{
- unsigned long data;
- data = e100_get_mdio_reg(MDIO_ADVERTISMENT_REG);
- if ((data & MDIO_ADVERT_100_FD) ||
- (data & MDIO_ADVERT_100_HD))
- current_speed = 100;
- else
- current_speed = 10;
-}
-
-static void
-tdk_check_speed(void)
-{
- unsigned long data;
- data = e100_get_mdio_reg(MDIO_TDK_DIAGNOSTIC_REG);
- current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
-}
-
-static void
-broadcom_check_speed(void)
-{
- unsigned long data;
- data = e100_get_mdio_reg(MDIO_AUX_CTRL_STATUS_REG);
- current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
-}
-
-static void
-e100_check_speed(unsigned long dummy)
-{
- static int led_initiated = 0;
- unsigned long data;
- int old_speed = current_speed;
-
- data = e100_get_mdio_reg(MDIO_BASE_STATUS_REG);
- if (!(data & MDIO_LINK_UP_MASK)) {
- current_speed = 0;
- } else {
- transceiver->check_speed();
- }
-
- if ((old_speed != current_speed) || !led_initiated) {
- led_initiated = 1;
- e100_set_network_leds(NO_NETWORK_ACTIVITY);
- }
-
- /* Reinitialize the timer. */
- speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
- add_timer(&speed_timer);
-}
-
-static void
-e100_negotiate(void)
-{
- unsigned short data = e100_get_mdio_reg(MDIO_ADVERTISMENT_REG);
-
- /* Discard old speed and duplex settings */
- data &= ~(MDIO_ADVERT_100_HD | MDIO_ADVERT_100_FD |
- MDIO_ADVERT_10_FD | MDIO_ADVERT_10_HD);
-
- switch (current_speed_selection) {
- case 10 :
- if (current_duplex == full)
- data |= MDIO_ADVERT_10_FD;
- else if (current_duplex == half)
- data |= MDIO_ADVERT_10_HD;
- else
- data |= MDIO_ADVERT_10_HD | MDIO_ADVERT_10_FD;
- break;
-
- case 100 :
- if (current_duplex == full)
- data |= MDIO_ADVERT_100_FD;
- else if (current_duplex == half)
- data |= MDIO_ADVERT_100_HD;
- else
- data |= MDIO_ADVERT_100_HD | MDIO_ADVERT_100_FD;
- break;
-
- case 0 : /* Auto */
- if (current_duplex == full)
- data |= MDIO_ADVERT_100_FD | MDIO_ADVERT_10_FD;
- else if (current_duplex == half)
- data |= MDIO_ADVERT_100_HD | MDIO_ADVERT_10_HD;
- else
- data |= MDIO_ADVERT_100_HD | MDIO_ADVERT_100_FD | MDIO_ADVERT_10_FD | MDIO_ADVERT_10_HD;
- break;
-
- default : /* assume autoneg speed and duplex */
- data |= MDIO_ADVERT_100_HD | MDIO_ADVERT_100_FD |
- MDIO_ADVERT_10_FD | MDIO_ADVERT_10_HD;
- }
-
- e100_set_mdio_reg(MDIO_ADVERTISMENT_REG, data);
-
- /* Renegotiate with link partner */
- data = e100_get_mdio_reg(MDIO_BASE_CONTROL_REG);
- data |= MDIO_BC_NEGOTIATE;
-
- e100_set_mdio_reg(MDIO_BASE_CONTROL_REG, data);
-}
-
-static void
-e100_set_speed(unsigned long speed)
-{
- if (speed != current_speed_selection) {
- current_speed_selection = speed;
- e100_negotiate();
- }
-}
-
-static void
-e100_check_duplex(unsigned long dummy)
-{
- int old_duplex = full_duplex;
- transceiver->check_duplex();
- if (old_duplex != full_duplex) {
- /* Duplex changed */
- SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
- *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
- }
-
- /* Reinitialize the timer. */
- duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
- add_timer(&duplex_timer);
-}
-
-static void
-generic_check_duplex(void)
-{
- unsigned long data;
- data = e100_get_mdio_reg(MDIO_ADVERTISMENT_REG);
- if ((data & MDIO_ADVERT_100_FD) ||
- (data & MDIO_ADVERT_10_FD))
- full_duplex = 1;
- else
- full_duplex = 0;
-}
-
-static void
-tdk_check_duplex(void)
-{
- unsigned long data;
- data = e100_get_mdio_reg(MDIO_TDK_DIAGNOSTIC_REG);
- full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
-}
-
-static void
-broadcom_check_duplex(void)
-{
- unsigned long data;
- data = e100_get_mdio_reg(MDIO_AUX_CTRL_STATUS_REG);
- full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
-}
-
-static void
-e100_set_duplex(enum duplex new_duplex)
-{
- if (new_duplex != current_duplex) {
- current_duplex = new_duplex;
- e100_negotiate();
- }
-}
-
-static int
-e100_probe_transceiver(void)
-{
- unsigned int phyid_high;
- unsigned int phyid_low;
- unsigned int oui;
- struct transceiver_ops* ops = NULL;
-
- /* Probe MDIO physical address */
- for (mdio_phy_addr = 0; mdio_phy_addr <= 31; mdio_phy_addr++) {
- if (e100_get_mdio_reg(MDIO_BASE_STATUS_REG) != 0xffff)
- break;
- }
- if (mdio_phy_addr == 32)
- return -ENODEV;
-
- /* Get manufacturer */
- phyid_high = e100_get_mdio_reg(MDIO_PHY_ID_HIGH_REG);
- phyid_low = e100_get_mdio_reg(MDIO_PHY_ID_LOW_REG);
- oui = (phyid_high << 6) | (phyid_low >> 10);
-
- for (ops = &transceivers[0]; ops->oui; ops++) {
- if (ops->oui == oui)
- break;
- }
- transceiver = ops;
-
- return 0;
-}
-
-static unsigned short
-e100_get_mdio_reg(unsigned char reg_num)
-{
- unsigned short cmd; /* Data to be sent on MDIO port */
- unsigned short data; /* Data read from MDIO */
- int bitCounter;
-
- /* Start of frame, OP Code, Physical Address, Register Address */
- cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (mdio_phy_addr << 7) |
- (reg_num << 2);
-
- e100_send_mdio_cmd(cmd, 0);
-
- data = 0;
-
- /* Data... */
- for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
- data |= (e100_receive_mdio_bit() << bitCounter);
- }
-
- return data;
-}
-
-static void
-e100_set_mdio_reg(unsigned char reg, unsigned short data)
-{
- int bitCounter;
- unsigned short cmd;
-
- cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (mdio_phy_addr << 7) |
- (reg << 2);
-
- e100_send_mdio_cmd(cmd, 1);
-
- /* Data... */
- for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
- e100_send_mdio_bit(GET_BIT(bitCounter, data));
- }
-
-}
-
-static void
-e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
-{
- int bitCounter;
- unsigned char data = 0x2;
-
- /* Preamble */
- for (bitCounter = 31; bitCounter>= 0; bitCounter--)
- e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
-
- for (bitCounter = 15; bitCounter >= 2; bitCounter--)
- e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
-
- /* Turnaround */
- for (bitCounter = 1; bitCounter >= 0 ; bitCounter--)
- if (write_cmd)
- e100_send_mdio_bit(GET_BIT(bitCounter, data));
- else
- e100_receive_mdio_bit();
-}
-
-static void
-e100_send_mdio_bit(unsigned char bit)
-{
- *R_NETWORK_MGM_CTRL =
- IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
- IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
- udelay(1);
- *R_NETWORK_MGM_CTRL =
- IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
- IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
- IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
- udelay(1);
-}
-
-static unsigned char
-e100_receive_mdio_bit()
-{
- unsigned char bit;
- *R_NETWORK_MGM_CTRL = 0;
- bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
- udelay(1);
- *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
- udelay(1);
- return bit;
-}
-
-static void
-e100_reset_transceiver(void)
-{
- unsigned short cmd;
- unsigned short data;
- int bitCounter;
-
- data = e100_get_mdio_reg(MDIO_BASE_CONTROL_REG);
-
- cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (mdio_phy_addr << 7) | (MDIO_BASE_CONTROL_REG << 2);
-
- e100_send_mdio_cmd(cmd, 1);
-
- data |= 0x8000;
-
- for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
- e100_send_mdio_bit(GET_BIT(bitCounter, data));
- }
-}
-
-/* Called by upper layers if they decide it took too long to complete
- * sending a packet - we need to reset and stuff.
- */
-
-static void
-e100_tx_timeout(struct net_device *dev)
-{
- struct net_local *np = (struct net_local *)dev->priv;
- unsigned long flags;
-
- spin_lock_irqsave(&np->lock, flags);
-
- printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
- tx_done(dev) ? "IRQ problem" : "network cable problem");
-
- /* remember we got an error */
-
- np->stats.tx_errors++;
-
- /* reset the TX DMA in case it has hung on something */
-
- RESET_DMA(NETWORK_TX_DMA_NBR);
- WAIT_DMA(NETWORK_TX_DMA_NBR);
-
- /* Reset the transceiver. */
-
- e100_reset_transceiver();
-
- /* and get rid of the packets that never got an interrupt */
- while (myFirstTxDesc != myNextTxDesc)
- {
- dev_kfree_skb(myFirstTxDesc->skb);
- myFirstTxDesc->skb = 0;
- myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
- }
-
- /* Set up transmit DMA channel so it can be restarted later */
- *R_DMA_CH0_FIRST = 0;
- *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
-
- /* tell the upper layers we're ok again */
-
- netif_wake_queue(dev);
- spin_unlock_irqrestore(&np->lock, flags);
-}
-
-
-/* This will only be invoked if the driver is _not_ in XOFF state.
- * What this means is that we need not check it, and that this
- * invariant will hold if we make sure that the netif_*_queue()
- * calls are done at the proper times.
- */
-
-static int
-e100_send_packet(struct sk_buff *skb, struct net_device *dev)
-{
- struct net_local *np = (struct net_local *)dev->priv;
- unsigned char *buf = skb->data;
- unsigned long flags;
-
-#ifdef ETHDEBUG
- printk("send packet len %d\n", length);
-#endif
- spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */
-
- myNextTxDesc->skb = skb;
-
- dev->trans_start = jiffies;
-
- e100_hardware_send_packet(buf, skb->len);
-
- myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
-
- /* Stop queue if full */
- if (myNextTxDesc == myFirstTxDesc) {
- netif_stop_queue(dev);
- }
-
- spin_unlock_irqrestore(&np->lock, flags);
-
- return 0;
-}
-
-/*
- * The typical workload of the driver:
- * Handle the network interface interrupts.
- */
-
-static irqreturn_t
-e100rxtx_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-{
- struct net_device *dev = (struct net_device *)dev_id;
- struct net_local *np = (struct net_local *)dev->priv;
- unsigned long irqbits = *R_IRQ_MASK2_RD;
-
- /* Disable RX/TX IRQs to avoid reentrancy */
- *R_IRQ_MASK2_CLR =
- IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
- IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
-
- /* Handle received packets */
- if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
- /* acknowledge the eop interrupt */
-
- *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
-
- /* check if one or more complete packets were indeed received */
-
- while (*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) {
- /* Take out the buffer and give it to the OS, then
- * allocate a new buffer to put a packet in.
- */
- e100_rx(dev);
- ((struct net_local *)dev->priv)->stats.rx_packets++;
- /* restart/continue on the channel, for safety */
- *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
- /* clear dma channel 1 eop/descr irq bits */
- *R_DMA_CH1_CLR_INTR =
- IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
- IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
-
- /* now, we might have gotten another packet
- so we have to loop back and check if so */
- }
- }
-
- /* Report any packets that have been sent */
- while (myFirstTxDesc != phys_to_virt(*R_DMA_CH0_FIRST) &&
- myFirstTxDesc != myNextTxDesc)
- {
- np->stats.tx_bytes += myFirstTxDesc->skb->len;
- np->stats.tx_packets++;
-
- /* dma is ready with the transmission of the data in tx_skb, so now
- we can release the skb memory */
- dev_kfree_skb_irq(myFirstTxDesc->skb);
- myFirstTxDesc->skb = 0;
- myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
- }
-
- if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
- /* acknowledge the eop interrupt and wake up queue */
- *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
- netif_wake_queue(dev);
- }
-
- /* Enable RX/TX IRQs again */
- *R_IRQ_MASK2_SET =
- IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
- IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
-
- return IRQ_HANDLED;
-}
-
-static irqreturn_t
-e100nw_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-{
- struct net_device *dev = (struct net_device *)dev_id;
- struct net_local *np = (struct net_local *)dev->priv;
- unsigned long irqbits = *R_IRQ_MASK0_RD;
-
- /* check for underrun irq */
- if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
- *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
- np->stats.tx_errors++;
- D(printk("ethernet receiver underrun!\n"));
- }
-
- /* check for overrun irq */
- if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
- update_rx_stats(&np->stats); /* this will ack the irq */
- D(printk("ethernet receiver overrun!\n"));
- }
- /* check for excessive collision irq */
- if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
- *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
- SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
- *R_NETWORK_TR_CTRL = IO_STATE(R_NETWORK_TR_CTRL, clr_error, clr);
- np->stats.tx_errors++;
- D(printk("ethernet excessive collisions!\n"));
- }
- return IRQ_HANDLED;
-}
-
-/* We have a good packet(s), get it/them out of the buffers. */
-static void
-e100_rx(struct net_device *dev)
-{
- struct sk_buff *skb;
- int length = 0;
- struct net_local *np = (struct net_local *)dev->priv;
- unsigned char *skb_data_ptr;
-#ifdef ETHDEBUG
- int i;
-#endif
-
- if (!led_active && time_after(jiffies, led_next_time)) {
- /* light the network leds depending on the current speed. */
- e100_set_network_leds(NETWORK_ACTIVITY);
-
- /* Set the earliest time we may clear the LED */
- led_next_time = jiffies + NET_FLASH_TIME;
- led_active = 1;
- mod_timer(&clear_led_timer, jiffies + HZ/10);
- }
-
- length = myNextRxDesc->descr.hw_len - 4;
- ((struct net_local *)dev->priv)->stats.rx_bytes += length;
-
-#ifdef ETHDEBUG
- printk("Got a packet of length %d:\n", length);
- /* dump the first bytes in the packet */
- skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf);
- for (i = 0; i < 8; i++) {
- printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
- skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
- skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
- skb_data_ptr += 8;
- }
-#endif
-
- if (length < RX_COPYBREAK) {
- /* Small packet, copy data */
- skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
- if (!skb) {
- np->stats.rx_errors++;
- printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
- return;
- }
-
- skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
- skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
-
-#ifdef ETHDEBUG
- printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
- skb->head, skb->data, skb->tail, skb->end);
- printk("copying packet to 0x%x.\n", skb_data_ptr);
-#endif
-
- memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length);
- }
- else {
- /* Large packet, send directly to upper layers and allocate new
- * memory (aligned to cache line boundary to avoid bug).
- * Before sending the skb to upper layers we must make sure that
- * skb->data points to the aligned start of the packet.
- */
- int align;
- struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
- if (!new_skb) {
- np->stats.rx_errors++;
- printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
- return;
- }
- skb = myNextRxDesc->skb;
- align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
- skb_put(skb, length + align);
- skb_pull(skb, align); /* Remove alignment bytes */
- myNextRxDesc->skb = new_skb;
- myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data));
- }
-
- skb->dev = dev;
- skb->protocol = eth_type_trans(skb, dev);
-
- /* Send the packet to the upper layers */
- netif_rx(skb);
-
- /* Prepare for next packet */
- myNextRxDesc->descr.status = 0;
- myPrevRxDesc = myNextRxDesc;
- myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
-
- rx_queue_len++;
-
- /* Check if descriptors should be returned */
- if (rx_queue_len == RX_QUEUE_THRESHOLD) {
- flush_etrax_cache();
- myPrevRxDesc->descr.ctrl |= d_eol;
- myLastRxDesc->descr.ctrl &= ~d_eol;
- myLastRxDesc = myPrevRxDesc;
- rx_queue_len = 0;
- }
-}
-
-/* The inverse routine to net_open(). */
-static int
-e100_close(struct net_device *dev)
-{
- struct net_local *np = (struct net_local *)dev->priv;
-
- printk(KERN_INFO "Closing %s.\n", dev->name);
-
- netif_stop_queue(dev);
-
- *R_IRQ_MASK0_CLR =
- IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
- IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
- IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
-
- *R_IRQ_MASK2_CLR =
- IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
- IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
- IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
- IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
-
- /* Stop the receiver and the transmitter */
-
- RESET_DMA(NETWORK_TX_DMA_NBR);
- RESET_DMA(NETWORK_RX_DMA_NBR);
-
- /* Flush the Tx and disable Rx here. */
-
- free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
- free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
- free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
-
- /* Update the statistics here. */
-
- update_rx_stats(&np->stats);
- update_tx_stats(&np->stats);
-
- /* Stop speed/duplex timers */
- del_timer(&speed_timer);
- del_timer(&duplex_timer);
-
- return 0;
-}
-
-static int
-e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
-{
- struct mii_ioctl_data *data = if_mii(ifr);
- struct net_local *np = netdev_priv(dev);
-
- spin_lock(&np->lock); /* Preempt protection */
- switch (cmd) {
- case SIOCETHTOOL:
- return e100_ethtool_ioctl(dev,ifr);
- case SIOCGMIIPHY: /* Get PHY address */
- data->phy_id = mdio_phy_addr;
- break;
- case SIOCGMIIREG: /* Read MII register */
- data->val_out = e100_get_mdio_reg(data->reg_num);
- break;
- case SIOCSMIIREG: /* Write MII register */
- e100_set_mdio_reg(data->reg_num, data->val_in);
- break;
- /* The ioctls below should be considered obsolete but are */
- /* still present for compatability with old scripts/apps */
- case SET_ETH_SPEED_10: /* 10 Mbps */
- e100_set_speed(10);
- break;
- case SET_ETH_SPEED_100: /* 100 Mbps */
- e100_set_speed(100);
- break;
- case SET_ETH_SPEED_AUTO: /* Auto negotiate speed */
- e100_set_speed(0);
- break;
- case SET_ETH_DUPLEX_HALF: /* Half duplex. */
- e100_set_duplex(half);
- break;
- case SET_ETH_DUPLEX_FULL: /* Full duplex. */
- e100_set_duplex(full);
- break;
- case SET_ETH_DUPLEX_AUTO: /* Autonegotiate duplex*/
- e100_set_duplex(autoneg);
- break;
- default:
- return -EINVAL;
- }
- spin_unlock(&np->lock);
- return 0;
-}
-
-static int
-e100_ethtool_ioctl(struct net_device *dev, struct ifreq *ifr)
-{
- struct ethtool_cmd ecmd;
-
- if (copy_from_user(&ecmd, ifr->ifr_data, sizeof (ecmd)))
- return -EFAULT;
-
- switch (ecmd.cmd) {
- case ETHTOOL_GSET:
- {
- memset((void *) &ecmd, 0, sizeof (ecmd));
- ecmd.supported =
- SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII |
- SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
- SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
- ecmd.port = PORT_TP;
- ecmd.transceiver = XCVR_EXTERNAL;
- ecmd.phy_address = mdio_phy_addr;
- ecmd.speed = current_speed;
- ecmd.duplex = full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
- ecmd.advertising = ADVERTISED_TP;
- if (current_duplex == autoneg && current_speed_selection == 0)
- ecmd.advertising |= ADVERTISED_Autoneg;
- else {
- ecmd.advertising |=
- ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
- ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
- if (current_speed_selection == 10)
- ecmd.advertising &= ~(ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full);
- else if (current_speed_selection == 100)
- ecmd.advertising &= ~(ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full);
- if (current_duplex == half)
- ecmd.advertising &= ~(ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Full);
- else if (current_duplex == full)
- ecmd.advertising &= ~(ADVERTISED_10baseT_Half | ADVERTISED_100baseT_Half);
- }
- ecmd.autoneg = AUTONEG_ENABLE;
- if (copy_to_user(ifr->ifr_data, &ecmd, sizeof (ecmd)))
- return -EFAULT;
- }
- break;
- case ETHTOOL_SSET:
- {
- if (!capable(CAP_NET_ADMIN)) {
- return -EPERM;
- }
- if (ecmd.autoneg == AUTONEG_ENABLE) {
- e100_set_duplex(autoneg);
- e100_set_speed(0);
- } else {
- e100_set_duplex(ecmd.duplex == DUPLEX_HALF ? half : full);
- e100_set_speed(ecmd.speed == SPEED_10 ? 10: 100);
- }
- }
- break;
- case ETHTOOL_GDRVINFO:
- {
- struct ethtool_drvinfo info;
- memset((void *) &info, 0, sizeof (info));
- strncpy(info.driver, "ETRAX 100LX", sizeof(info.driver) - 1);
- strncpy(info.version, "$Revision: 1.22 $", sizeof(info.version) - 1);
- strncpy(info.fw_version, "N/A", sizeof(info.fw_version) - 1);
- strncpy(info.bus_info, "N/A", sizeof(info.bus_info) - 1);
- info.regdump_len = 0;
- info.eedump_len = 0;
- info.testinfo_len = 0;
- if (copy_to_user(ifr->ifr_data, &info, sizeof (info)))
- return -EFAULT;
- }
- break;
- case ETHTOOL_NWAY_RST:
- if (current_duplex == autoneg && current_speed_selection == 0)
- e100_negotiate();
- break;
- default:
- return -EOPNOTSUPP;
- break;
- }
- return 0;
-}
-
-static int
-e100_set_config(struct net_device *dev, struct ifmap *map)
-{
- struct net_local *np = (struct net_local *)dev->priv;
- spin_lock(&np->lock); /* Preempt protection */
-
- switch(map->port) {
- case IF_PORT_UNKNOWN:
- /* Use autoneg */
- e100_set_speed(0);
- e100_set_duplex(autoneg);
- break;
- case IF_PORT_10BASET:
- e100_set_speed(10);
- e100_set_duplex(autoneg);
- break;
- case IF_PORT_100BASET:
- case IF_PORT_100BASETX:
- e100_set_speed(100);
- e100_set_duplex(autoneg);
- break;
- case IF_PORT_100BASEFX:
- case IF_PORT_10BASE2:
- case IF_PORT_AUI:
- spin_unlock(&np->lock);
- return -EOPNOTSUPP;
- break;
- default:
- printk(KERN_ERR "%s: Invalid media selected", dev->name);
- spin_unlock(&np->lock);
- return -EINVAL;
- }
- spin_unlock(&np->lock);
- return 0;
-}
-
-static void
-update_rx_stats(struct net_device_stats *es)
-{
- unsigned long r = *R_REC_COUNTERS;
- /* update stats relevant to reception errors */
- es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
- es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
- es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
- es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
-}
-
-static void
-update_tx_stats(struct net_device_stats *es)
-{
- unsigned long r = *R_TR_COUNTERS;
- /* update stats relevant to transmission errors */
- es->collisions +=
- IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
- IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
- es->tx_errors += IO_EXTRACT(R_TR_COUNTERS, deferred, r);
-}
-
-/*
- * Get the current statistics.
- * This may be called with the card open or closed.
- */
-static struct net_device_stats *
-e100_get_stats(struct net_device *dev)
-{
- struct net_local *lp = (struct net_local *)dev->priv;
- unsigned long flags;
- spin_lock_irqsave(&lp->lock, flags);
-
- update_rx_stats(&lp->stats);
- update_tx_stats(&lp->stats);
-
- spin_unlock_irqrestore(&lp->lock, flags);
- return &lp->stats;
-}
-
-/*
- * Set or clear the multicast filter for this adaptor.
- * num_addrs == -1 Promiscuous mode, receive all packets
- * num_addrs == 0 Normal mode, clear multicast list
- * num_addrs > 0 Multicast mode, receive normal and MC packets,
- * and do best-effort filtering.
- */
-static void
-set_multicast_list(struct net_device *dev)
-{
- struct net_local *lp = (struct net_local *)dev->priv;
- int num_addr = dev->mc_count;
- unsigned long int lo_bits;
- unsigned long int hi_bits;
- spin_lock(&lp->lock);
- if (dev->flags & IFF_PROMISC)
- {
- /* promiscuous mode */
- lo_bits = 0xfffffffful;
- hi_bits = 0xfffffffful;
-
- /* Enable individual receive */
- SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);
- *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
- } else if (dev->flags & IFF_ALLMULTI) {
- /* enable all multicasts */
- lo_bits = 0xfffffffful;
- hi_bits = 0xfffffffful;
-
- /* Disable individual receive */
- SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
- *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
- } else if (num_addr == 0) {
- /* Normal, clear the mc list */
- lo_bits = 0x00000000ul;
- hi_bits = 0x00000000ul;
-
- /* Disable individual receive */
- SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
- *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
- } else {
- /* MC mode, receive normal and MC packets */
- char hash_ix;
- struct dev_mc_list *dmi = dev->mc_list;
- int i;
- char *baddr;
- lo_bits = 0x00000000ul;
- hi_bits = 0x00000000ul;
- for (i=0; i<num_addr; i++) {
- /* Calculate the hash index for the GA registers */
-
- hash_ix = 0;
- baddr = dmi->dmi_addr;
- hash_ix ^= (*baddr) & 0x3f;
- hash_ix ^= ((*baddr) >> 6) & 0x03;
- ++baddr;
- hash_ix ^= ((*baddr) << 2) & 0x03c;
- hash_ix ^= ((*baddr) >> 4) & 0xf;
- ++baddr;
- hash_ix ^= ((*baddr) << 4) & 0x30;
- hash_ix ^= ((*baddr) >> 2) & 0x3f;
- ++baddr;
- hash_ix ^= (*baddr) & 0x3f;
- hash_ix ^= ((*baddr) >> 6) & 0x03;
- ++baddr;
- hash_ix ^= ((*baddr) << 2) & 0x03c;
- hash_ix ^= ((*baddr) >> 4) & 0xf;
- ++baddr;
- hash_ix ^= ((*baddr) << 4) & 0x30;
- hash_ix ^= ((*baddr) >> 2) & 0x3f;
-
- hash_ix &= 0x3f;
-
- if (hash_ix >= 32) {
- hi_bits |= (1 << (hash_ix-32));
- }
- else {
- lo_bits |= (1 << hash_ix);
- }
- dmi = dmi->next;
- }
- /* Disable individual receive */
- SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
- *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
- }
- *R_NETWORK_GA_0 = lo_bits;
- *R_NETWORK_GA_1 = hi_bits;
- spin_unlock(&lp->lock);
-}
-
-void
-e100_hardware_send_packet(char *buf, int length)
-{
- D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
-
- if (!led_active && time_after(jiffies, led_next_time)) {
- /* light the network leds depending on the current speed. */
- e100_set_network_leds(NETWORK_ACTIVITY);
-
- /* Set the earliest time we may clear the LED */
- led_next_time = jiffies + NET_FLASH_TIME;
- led_active = 1;
- mod_timer(&clear_led_timer, jiffies + HZ/10);
- }
-
- /* configure the tx dma descriptor */
- myNextTxDesc->descr.sw_len = length;
- myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
- myNextTxDesc->descr.buf = virt_to_phys(buf);
-
- /* Move end of list */
- myLastTxDesc->descr.ctrl &= ~d_eol;
- myLastTxDesc = myNextTxDesc;
-
- /* Restart DMA channel */
- *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
-}
-
-static void
-e100_clear_network_leds(unsigned long dummy)
-{
- if (led_active && time_after(jiffies, led_next_time)) {
- e100_set_network_leds(NO_NETWORK_ACTIVITY);
-
- /* Set the earliest time we may set the LED */
- led_next_time = jiffies + NET_FLASH_PAUSE;
- led_active = 0;
- }
-}
-
-static void
-e100_set_network_leds(int active)
-{
-#if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
- int light_leds = (active == NO_NETWORK_ACTIVITY);
-#elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
- int light_leds = (active == NETWORK_ACTIVITY);
-#else
-#error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
-#endif
-
- if (!current_speed) {
- /* Make LED red, link is down */
-#if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION)
- LED_NETWORK_SET(LED_RED);
-#else
- LED_NETWORK_SET(LED_OFF);
-#endif
- }
- else if (light_leds) {
- if (current_speed == 10) {
- LED_NETWORK_SET(LED_ORANGE);
- } else {
- LED_NETWORK_SET(LED_GREEN);
- }
- }
- else {
- LED_NETWORK_SET(LED_OFF);
- }
-}
-
-static int
-etrax_init_module(void)
-{
- return etrax_ethernet_init();
-}
-
-static int __init
-e100_boot_setup(char* str)
-{
- struct sockaddr sa = {0};
- int i;
-
- /* Parse the colon separated Ethernet station address */
- for (i = 0; i < ETH_ALEN; i++) {
- unsigned int tmp;
- if (sscanf(str + 3*i, "%2x", &tmp) != 1) {
- printk(KERN_WARNING "Malformed station address");
- return 0;
- }
- sa.sa_data[i] = (char)tmp;
- }
-
- default_mac = sa;
- return 1;
-}
-
-__setup("etrax100_eth=", e100_boot_setup);
-
-module_init(etrax_init_module);
+++ /dev/null
-/* $Id: ide.c,v 1.1 2004/01/22 08:22:58 starvik Exp $
- *
- * Etrax specific IDE functions, like init and PIO-mode setting etc.
- * Almost the entire ide.c is used for the rest of the Etrax ATA driver.
- * Copyright (c) 2000-2004 Axis Communications AB
- *
- * Authors: Bjorn Wesen (initial version)
- * Mikael Starvik (pio setup stuff, Linux 2.6 port)
- */
-
-/* Regarding DMA:
- *
- * There are two forms of DMA - "DMA handshaking" between the interface and the drive,
- * and DMA between the memory and the interface. We can ALWAYS use the latter, since it's
- * something built-in in the Etrax. However only some drives support the DMA-mode handshaking
- * on the ATA-bus. The normal PC driver and Triton interface disables memory-if DMA when the
- * device can't do DMA handshaking for some stupid reason. We don't need to do that.
- */
-
-#undef REALLY_SLOW_IO /* most systems can safely undef this */
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/timer.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/delay.h>
-#include <linux/blkdev.h>
-#include <linux/hdreg.h>
-#include <linux/ide.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/arch/svinto.h>
-#include <asm/dma.h>
-
-/* number of Etrax DMA descriptors */
-#define MAX_DMA_DESCRS 64
-
-/* number of times to retry busy-flags when reading/writing IDE-registers
- * this can't be too high because a hung harddisk might cause the watchdog
- * to trigger (sometimes INB and OUTB are called with irq's disabled)
- */
-
-#define IDE_REGISTER_TIMEOUT 300
-
-#ifdef CONFIG_ETRAX_IDE_CSE1_16_RESET
-/* address where the memory-mapped IDE reset bit lives, if used */
-static volatile unsigned long *reset_addr;
-#endif
-
-static int e100_read_command = 0;
-
-#define LOWDB(x)
-#define D(x)
-
-void
-etrax100_ide_outw(unsigned short data, ide_ioreg_t reg) {
- int timeleft;
- LOWDB(printk("ow: data 0x%x, reg 0x%x\n", data, reg));
-
- /* note the lack of handling any timeouts. we stop waiting, but we don't
- * really notify anybody.
- */
-
- timeleft = IDE_REGISTER_TIMEOUT;
- /* wait for busy flag */
- while(timeleft && (*R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy)))
- timeleft--;
-
- /*
- * Fall through at a timeout, so the ongoing command will be
- * aborted by the write below, which is expected to be a dummy
- * command to the command register. This happens when a faulty
- * drive times out on a command. See comment on timeout in
- * INB.
- */
- if(!timeleft)
- printk("ATA timeout reg 0x%lx := 0x%x\n", reg, data);
-
- *R_ATA_CTRL_DATA = reg | data; /* write data to the drive's register */
-
- timeleft = IDE_REGISTER_TIMEOUT;
- /* wait for transmitter ready */
- while(timeleft && !(*R_ATA_STATUS_DATA &
- IO_MASK(R_ATA_STATUS_DATA, tr_rdy)))
- timeleft--;
-}
-
-void
-etrax100_ide_outb(unsigned char data, ide_ioreg_t reg)
-{
- etrax100_ide_outw(data, reg);
-}
-
-void
-etrax100_ide_outbsync(ide_drive_t *drive, u8 addr, unsigned long port)
-{
- etrax100_ide_outw(addr, port);
-}
-
-unsigned short
-etrax100_ide_inw(ide_ioreg_t reg) {
- int status;
- int timeleft;
-
- timeleft = IDE_REGISTER_TIMEOUT;
- /* wait for busy flag */
- while(timeleft && (*R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy)))
- timeleft--;
-
- if(!timeleft) {
- /*
- * If we're asked to read the status register, like for
- * example when a command does not complete for an
- * extended time, but the ATA interface is stuck in a
- * busy state at the *ETRAX* ATA interface level (as has
- * happened repeatedly with at least one bad disk), then
- * the best thing to do is to pretend that we read
- * "busy" in the status register, so the IDE driver will
- * time-out, abort the ongoing command and perform a
- * reset sequence. Note that the subsequent OUT_BYTE
- * call will also timeout on busy, but as long as the
- * write is still performed, everything will be fine.
- */
- if ((reg & IO_MASK (R_ATA_CTRL_DATA, addr))
- == IO_FIELD (R_ATA_CTRL_DATA, addr, IDE_STATUS_OFFSET))
- return BUSY_STAT;
- else
- /* For other rare cases we assume 0 is good enough. */
- return 0;
- }
-
- *R_ATA_CTRL_DATA = reg | IO_STATE(R_ATA_CTRL_DATA, rw, read); /* read data */
-
- timeleft = IDE_REGISTER_TIMEOUT;
- /* wait for available */
- while(timeleft && !((status = *R_ATA_STATUS_DATA) &
- IO_MASK(R_ATA_STATUS_DATA, dav)))
- timeleft--;
-
- if(!timeleft)
- return 0;
-
- LOWDB(printk("inb: 0x%x from reg 0x%x\n", status & 0xff, reg));
-
- return (unsigned short)status;
-}
-
-unsigned char
-etrax100_ide_inb(ide_ioreg_t reg)
-{
- return (unsigned char)etrax100_ide_inw(reg);
-}
-
-/* PIO timing (in R_ATA_CONFIG)
- *
- * _____________________________
- * ADDRESS : ________/
- *
- * _______________
- * DIOR : ____________/ \__________
- *
- * _______________
- * DATA : XXXXXXXXXXXXXXXX_______________XXXXXXXX
- *
- *
- * DIOR is unbuffered while address and data is buffered.
- * This creates two problems:
- * 1. The DIOR pulse is to early (because it is unbuffered)
- * 2. The rise time of DIOR is long
- *
- * There are at least three different plausible solutions
- * 1. Use a pad capable of larger currents in Etrax
- * 2. Use an external buffer
- * 3. Make the strobe pulse longer
- *
- * Some of the strobe timings below are modified to compensate
- * for this. This implies a slight performance decrease.
- *
- * THIS SHOULD NEVER BE CHANGED!
- *
- * TODO: Is this true for the latest LX boards still ?
- */
-
-#define ATA_DMA2_STROBE 4
-#define ATA_DMA2_HOLD 0
-#define ATA_DMA1_STROBE 4
-#define ATA_DMA1_HOLD 1
-#define ATA_DMA0_STROBE 12
-#define ATA_DMA0_HOLD 9
-#define ATA_PIO4_SETUP 1
-#define ATA_PIO4_STROBE 5
-#define ATA_PIO4_HOLD 0
-#define ATA_PIO3_SETUP 1
-#define ATA_PIO3_STROBE 5
-#define ATA_PIO3_HOLD 1
-#define ATA_PIO2_SETUP 1
-#define ATA_PIO2_STROBE 6
-#define ATA_PIO2_HOLD 2
-#define ATA_PIO1_SETUP 2
-#define ATA_PIO1_STROBE 11
-#define ATA_PIO1_HOLD 4
-#define ATA_PIO0_SETUP 4
-#define ATA_PIO0_STROBE 19
-#define ATA_PIO0_HOLD 4
-
-static int e100_dma_check (ide_drive_t *drive);
-static int e100_dma_begin (ide_drive_t *drive);
-static int e100_dma_end (ide_drive_t *drive);
-static int e100_dma_read (ide_drive_t *drive);
-static int e100_dma_write (ide_drive_t *drive);
-static void e100_ide_input_data (ide_drive_t *drive, void *, unsigned int);
-static void e100_ide_output_data (ide_drive_t *drive, void *, unsigned int);
-static void e100_atapi_input_bytes(ide_drive_t *drive, void *, unsigned int);
-static void e100_atapi_output_bytes(ide_drive_t *drive, void *, unsigned int);
-static int e100_dma_off (ide_drive_t *drive);
-static int e100_dma_verbose (ide_drive_t *drive);
-
-
-/*
- * good_dma_drives() lists the model names (from "hdparm -i")
- * of drives which do not support mword2 DMA but which are
- * known to work fine with this interface under Linux.
- */
-
-const char *good_dma_drives[] = {"Micropolis 2112A",
- "CONNER CTMA 4000",
- "CONNER CTT8000-A",
- NULL};
-
-static void tune_e100_ide(ide_drive_t *drive, byte pio)
-{
- pio = 4;
- /* pio = ide_get_best_pio_mode(drive, pio, 4, NULL); */
-
- /* set pio mode! */
-
- switch(pio) {
- case 0:
- *R_ATA_CONFIG = ( IO_FIELD( R_ATA_CONFIG, enable, 1 ) |
- IO_FIELD( R_ATA_CONFIG, dma_strobe, ATA_DMA2_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, dma_hold, ATA_DMA2_HOLD ) |
- IO_FIELD( R_ATA_CONFIG, pio_setup, ATA_PIO0_SETUP ) |
- IO_FIELD( R_ATA_CONFIG, pio_strobe, ATA_PIO0_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, pio_hold, ATA_PIO0_HOLD ) );
- break;
- case 1:
- *R_ATA_CONFIG = ( IO_FIELD( R_ATA_CONFIG, enable, 1 ) |
- IO_FIELD( R_ATA_CONFIG, dma_strobe, ATA_DMA2_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, dma_hold, ATA_DMA2_HOLD ) |
- IO_FIELD( R_ATA_CONFIG, pio_setup, ATA_PIO1_SETUP ) |
- IO_FIELD( R_ATA_CONFIG, pio_strobe, ATA_PIO1_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, pio_hold, ATA_PIO1_HOLD ) );
- break;
- case 2:
- *R_ATA_CONFIG = ( IO_FIELD( R_ATA_CONFIG, enable, 1 ) |
- IO_FIELD( R_ATA_CONFIG, dma_strobe, ATA_DMA2_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, dma_hold, ATA_DMA2_HOLD ) |
- IO_FIELD( R_ATA_CONFIG, pio_setup, ATA_PIO2_SETUP ) |
- IO_FIELD( R_ATA_CONFIG, pio_strobe, ATA_PIO2_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, pio_hold, ATA_PIO2_HOLD ) );
- break;
- case 3:
- *R_ATA_CONFIG = ( IO_FIELD( R_ATA_CONFIG, enable, 1 ) |
- IO_FIELD( R_ATA_CONFIG, dma_strobe, ATA_DMA2_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, dma_hold, ATA_DMA2_HOLD ) |
- IO_FIELD( R_ATA_CONFIG, pio_setup, ATA_PIO3_SETUP ) |
- IO_FIELD( R_ATA_CONFIG, pio_strobe, ATA_PIO3_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, pio_hold, ATA_PIO3_HOLD ) );
- break;
- case 4:
- *R_ATA_CONFIG = ( IO_FIELD( R_ATA_CONFIG, enable, 1 ) |
- IO_FIELD( R_ATA_CONFIG, dma_strobe, ATA_DMA2_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, dma_hold, ATA_DMA2_HOLD ) |
- IO_FIELD( R_ATA_CONFIG, pio_setup, ATA_PIO4_SETUP ) |
- IO_FIELD( R_ATA_CONFIG, pio_strobe, ATA_PIO4_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, pio_hold, ATA_PIO4_HOLD ) );
- break;
- }
-}
-
-void __init
-init_e100_ide (void)
-{
- volatile unsigned int dummy;
- int h;
-
- printk("ide: ETRAX 100LX built-in ATA DMA controller\n");
-
- /* first fill in some stuff in the ide_hwifs fields */
-
- for(h = 0; h < MAX_HWIFS; h++) {
- ide_hwif_t *hwif = &ide_hwifs[h];
- hwif->mmio = 2;
- hwif->chipset = ide_etrax100;
- hwif->tuneproc = &tune_e100_ide;
- hwif->ata_input_data = &e100_ide_input_data;
- hwif->ata_output_data = &e100_ide_output_data;
- hwif->atapi_input_bytes = &e100_atapi_input_bytes;
- hwif->atapi_output_bytes = &e100_atapi_output_bytes;
- hwif->ide_dma_check = &e100_dma_check;
- hwif->ide_dma_end = &e100_dma_end;
- hwif->ide_dma_write = &e100_dma_write;
- hwif->ide_dma_read = &e100_dma_read;
- hwif->ide_dma_begin = &e100_dma_begin;
- hwif->OUTB = &etrax100_ide_outb;
- hwif->OUTW = &etrax100_ide_outw;
- hwif->OUTBSYNC = &etrax100_ide_outbsync;
- hwif->INB = &etrax100_ide_inb;
- hwif->INW = &etrax100_ide_inw;
- hwif->ide_dma_off_quietly = &e100_dma_off;
- hwif->ide_dma_verbose = &e100_dma_verbose;
- hwif->sg_table =
- kmalloc(sizeof(struct scatterlist) * PRD_ENTRIES, GFP_KERNEL);
- }
-
- /* actually reset and configure the etrax100 ide/ata interface */
-
- *R_ATA_CTRL_DATA = 0;
- *R_ATA_TRANSFER_CNT = 0;
- *R_ATA_CONFIG = 0;
-
- genconfig_shadow = (genconfig_shadow &
- ~IO_MASK(R_GEN_CONFIG, dma2) &
- ~IO_MASK(R_GEN_CONFIG, dma3) &
- ~IO_MASK(R_GEN_CONFIG, ata)) |
- ( IO_STATE( R_GEN_CONFIG, dma3, ata ) |
- IO_STATE( R_GEN_CONFIG, dma2, ata ) |
- IO_STATE( R_GEN_CONFIG, ata, select ) );
-
- *R_GEN_CONFIG = genconfig_shadow;
-
- /* pull the chosen /reset-line low */
-
-#ifdef CONFIG_ETRAX_IDE_G27_RESET
- REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, 27, 0);
-#endif
-#ifdef CONFIG_ETRAX_IDE_CSE1_16_RESET
- REG_SHADOW_SET(port_cse1_addr, port_cse1_shadow, 16, 0);
-#endif
-#ifdef CONFIG_ETRAX_IDE_CSP0_8_RESET
- REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, 8, 0);
-#endif
-#ifdef CONFIG_ETRAX_IDE_PB7_RESET
- port_pb_dir_shadow = port_pb_dir_shadow |
- IO_STATE(R_PORT_PB_DIR, dir7, output);
- *R_PORT_PB_DIR = port_pb_dir_shadow;
- REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, 7, 1);
-#endif
-
- /* wait some */
-
- udelay(25);
-
- /* de-assert bus-reset */
-
-#ifdef CONFIG_ETRAX_IDE_CSE1_16_RESET
- REG_SHADOW_SET(port_cse1_addr, port_cse1_shadow, 16, 1);
-#endif
-#ifdef CONFIG_ETRAX_IDE_CSP0_8_RESET
- REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, 8, 1);
-#endif
-#ifdef CONFIG_ETRAX_IDE_G27_RESET
- REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, 27, 1);
-#endif
-
- /* make a dummy read to set the ata controller in a proper state */
- dummy = *R_ATA_STATUS_DATA;
-
- *R_ATA_CONFIG = ( IO_FIELD( R_ATA_CONFIG, enable, 1 ) |
- IO_FIELD( R_ATA_CONFIG, dma_strobe, ATA_DMA2_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, dma_hold, ATA_DMA2_HOLD ) |
- IO_FIELD( R_ATA_CONFIG, pio_setup, ATA_PIO4_SETUP ) |
- IO_FIELD( R_ATA_CONFIG, pio_strobe, ATA_PIO4_STROBE ) |
- IO_FIELD( R_ATA_CONFIG, pio_hold, ATA_PIO4_HOLD ) );
-
- *R_ATA_CTRL_DATA = ( IO_STATE( R_ATA_CTRL_DATA, rw, read) |
- IO_FIELD( R_ATA_CTRL_DATA, addr, 1 ) );
-
- while(*R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy)); /* wait for busy flag*/
-
- *R_IRQ_MASK0_SET = ( IO_STATE( R_IRQ_MASK0_SET, ata_irq0, set ) |
- IO_STATE( R_IRQ_MASK0_SET, ata_irq1, set ) |
- IO_STATE( R_IRQ_MASK0_SET, ata_irq2, set ) |
- IO_STATE( R_IRQ_MASK0_SET, ata_irq3, set ) );
-
- printk("ide: waiting %d seconds for drives to regain consciousness\n",
- CONFIG_ETRAX_IDE_DELAY);
-
- h = jiffies + (CONFIG_ETRAX_IDE_DELAY * HZ);
- while(time_before(jiffies, h)) /* nothing */ ;
-
- /* reset the dma channels we will use */
-
- RESET_DMA(ATA_TX_DMA_NBR);
- RESET_DMA(ATA_RX_DMA_NBR);
- WAIT_DMA(ATA_TX_DMA_NBR);
- WAIT_DMA(ATA_RX_DMA_NBR);
-
-}
-
-static int e100_dma_off (ide_drive_t *drive)
-{
- return 0;
-}
-
-static int e100_dma_verbose (ide_drive_t *drive)
-{
- printk(", DMA(mode 2)");
- return 0;
-}
-
-static etrax_dma_descr mydescr;
-
-/*
- * The following routines are mainly used by the ATAPI drivers.
- *
- * These routines will round up any request for an odd number of bytes,
- * so if an odd bytecount is specified, be sure that there's at least one
- * extra byte allocated for the buffer.
- */
-static void
-e100_atapi_input_bytes (ide_drive_t *drive, void *buffer, unsigned int bytecount)
-{
- ide_ioreg_t data_reg = IDE_DATA_REG;
-
- D(printk("atapi_input_bytes, dreg 0x%x, buffer 0x%x, count %d\n",
- data_reg, buffer, bytecount));
-
- if(bytecount & 1) {
- printk("warning, odd bytecount in cdrom_in_bytes = %d.\n", bytecount);
- bytecount++; /* to round off */
- }
-
- /* make sure the DMA channel is available */
- RESET_DMA(ATA_RX_DMA_NBR);
- WAIT_DMA(ATA_RX_DMA_NBR);
-
- /* setup DMA descriptor */
-
- mydescr.sw_len = bytecount;
- mydescr.ctrl = d_eol;
- mydescr.buf = virt_to_phys(buffer);
-
- /* start the dma channel */
-
- *R_DMA_CH3_FIRST = virt_to_phys(&mydescr);
- *R_DMA_CH3_CMD = IO_STATE(R_DMA_CH3_CMD, cmd, start);
-
- /* initiate a multi word dma read using PIO handshaking */
-
- *R_ATA_TRANSFER_CNT = IO_FIELD(R_ATA_TRANSFER_CNT, count, bytecount >> 1);
-
- *R_ATA_CTRL_DATA = data_reg |
- IO_STATE(R_ATA_CTRL_DATA, rw, read) |
- IO_STATE(R_ATA_CTRL_DATA, src_dst, dma) |
- IO_STATE(R_ATA_CTRL_DATA, handsh, pio) |
- IO_STATE(R_ATA_CTRL_DATA, multi, on) |
- IO_STATE(R_ATA_CTRL_DATA, dma_size, word);
-
- /* wait for completion */
-
- LED_DISK_READ(1);
- WAIT_DMA(ATA_RX_DMA_NBR);
- LED_DISK_READ(0);
-
-#if 0
- /* old polled transfer code
- * this should be moved into a new function that can do polled
- * transfers if DMA is not available
- */
-
- /* initiate a multi word read */
-
- *R_ATA_TRANSFER_CNT = wcount << 1;
-
- *R_ATA_CTRL_DATA = data_reg |
- IO_STATE(R_ATA_CTRL_DATA, rw, read) |
- IO_STATE(R_ATA_CTRL_DATA, src_dst, register) |
- IO_STATE(R_ATA_CTRL_DATA, handsh, pio) |
- IO_STATE(R_ATA_CTRL_DATA, multi, on) |
- IO_STATE(R_ATA_CTRL_DATA, dma_size, word);
-
- /* svinto has a latency until the busy bit actually is set */
-
- nop(); nop();
- nop(); nop();
- nop(); nop();
- nop(); nop();
- nop(); nop();
-
- /* unit should be busy during multi transfer */
- while((status = *R_ATA_STATUS_DATA) & IO_MASK(R_ATA_STATUS_DATA, busy)) {
- while(!(status & IO_MASK(R_ATA_STATUS_DATA, dav)))
- status = *R_ATA_STATUS_DATA;
- *ptr++ = (unsigned short)(status & 0xffff);
- }
-#endif
-}
-
-static void
-e100_atapi_output_bytes (ide_drive_t *drive, void *buffer, unsigned int bytecount)
-{
- ide_ioreg_t data_reg = IDE_DATA_REG;
-
- D(printk("atapi_output_bytes, dreg 0x%x, buffer 0x%x, count %d\n",
- data_reg, buffer, bytecount));
-
- if(bytecount & 1) {
- printk("odd bytecount %d in atapi_out_bytes!\n", bytecount);
- bytecount++;
- }
-
- /* make sure the DMA channel is available */
- RESET_DMA(ATA_TX_DMA_NBR);
- WAIT_DMA(ATA_TX_DMA_NBR);
-
- /* setup DMA descriptor */
-
- mydescr.sw_len = bytecount;
- mydescr.ctrl = d_eol;
- mydescr.buf = virt_to_phys(buffer);
-
- /* start the dma channel */
-
- *R_DMA_CH2_FIRST = virt_to_phys(&mydescr);
- *R_DMA_CH2_CMD = IO_STATE(R_DMA_CH2_CMD, cmd, start);
-
- /* initiate a multi word dma write using PIO handshaking */
-
- *R_ATA_TRANSFER_CNT = IO_FIELD(R_ATA_TRANSFER_CNT, count, bytecount >> 1);
-
- *R_ATA_CTRL_DATA = data_reg |
- IO_STATE(R_ATA_CTRL_DATA, rw, write) |
- IO_STATE(R_ATA_CTRL_DATA, src_dst, dma) |
- IO_STATE(R_ATA_CTRL_DATA, handsh, pio) |
- IO_STATE(R_ATA_CTRL_DATA, multi, on) |
- IO_STATE(R_ATA_CTRL_DATA, dma_size, word);
-
- /* wait for completion */
-
- LED_DISK_WRITE(1);
- WAIT_DMA(ATA_TX_DMA_NBR);
- LED_DISK_WRITE(0);
-
-#if 0
- /* old polled write code - see comment in input_bytes */
-
- /* wait for busy flag */
- while(*R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy));
-
- /* initiate a multi word write */
-
- *R_ATA_TRANSFER_CNT = bytecount >> 1;
-
- ctrl = data_reg |
- IO_STATE(R_ATA_CTRL_DATA, rw, write) |
- IO_STATE(R_ATA_CTRL_DATA, src_dst, register) |
- IO_STATE(R_ATA_CTRL_DATA, handsh, pio) |
- IO_STATE(R_ATA_CTRL_DATA, multi, on) |
- IO_STATE(R_ATA_CTRL_DATA, dma_size, word);
-
- LED_DISK_WRITE(1);
-
- /* Etrax will set busy = 1 until the multi pio transfer has finished
- * and tr_rdy = 1 after each successful word transfer.
- * When the last byte has been transferred Etrax will first set tr_tdy = 1
- * and then busy = 0 (not in the same cycle). If we read busy before it
- * has been set to 0 we will think that we should transfer more bytes
- * and then tr_rdy would be 0 forever. This is solved by checking busy
- * in the inner loop.
- */
-
- do {
- *R_ATA_CTRL_DATA = ctrl | *ptr++;
- while(!(*R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, tr_rdy)) &&
- (*R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy)));
- } while(*R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy));
-
- LED_DISK_WRITE(0);
-#endif
-
-}
-
-/*
- * This is used for most PIO data transfers *from* the IDE interface
- */
-static void
-e100_ide_input_data (ide_drive_t *drive, void *buffer, unsigned int wcount)
-{
- e100_atapi_input_bytes(drive, buffer, wcount << 2);
-}
-
-/*
- * This is used for most PIO data transfers *to* the IDE interface
- */
-static void
-e100_ide_output_data (ide_drive_t *drive, void *buffer, unsigned int wcount)
-{
- e100_atapi_output_bytes(drive, buffer, wcount << 2);
-}
-
-/* we only have one DMA channel on the chip for ATA, so we can keep these statically */
-static etrax_dma_descr ata_descrs[MAX_DMA_DESCRS];
-static unsigned int ata_tot_size;
-
-/*
- * e100_ide_build_dmatable() prepares a dma request.
- * Returns 0 if all went okay, returns 1 otherwise.
- */
-static int e100_ide_build_dmatable (ide_drive_t *drive)
-{
- ide_hwif_t *hwif = HWIF(drive);
- struct scatterlist* sg;
- struct request *rq = HWGROUP(drive)->rq;
- unsigned long size, addr;
- unsigned int count = 0;
- int i = 0;
-
- sg = hwif->sg_table;
-
- ata_tot_size = 0;
-
- if (HWGROUP(drive)->rq->flags & REQ_DRIVE_TASKFILE) {
- u8 *virt_addr = rq->buffer;
- int sector_count = rq->nr_sectors;
- memset(&sg[0], 0, sizeof(*sg));
- sg[0].page = virt_to_page(virt_addr);
- sg[0].offset = offset_in_page(virt_addr);
- sg[0].length = sector_count * SECTOR_SIZE;
- hwif->sg_nents = i = 1;
- }
- else
- {
- hwif->sg_nents = i = blk_rq_map_sg(drive->queue, rq, hwif->sg_table);
- }
-
-
- while(i) {
- /*
- * Determine addr and size of next buffer area. We assume that
- * individual virtual buffers are always composed linearly in
- * physical memory. For example, we assume that any 8kB buffer
- * is always composed of two adjacent physical 4kB pages rather
- * than two possibly non-adjacent physical 4kB pages.
- */
- /* group sequential buffers into one large buffer */
- addr = page_to_phys(sg->page) + sg->offset;
- size = sg_dma_len(sg);
- while (sg++, --i) {
- if ((addr + size) != page_to_phys(sg->page) + sg->offset)
- break;
- size += sg_dma_len(sg);
- }
-
- /* did we run out of descriptors? */
-
- if(count >= MAX_DMA_DESCRS) {
- printk("%s: too few DMA descriptors\n", drive->name);
- return 1;
- }
-
- /* however, this case is more difficult - R_ATA_TRANSFER_CNT cannot be more
- than 65536 words per transfer, so in that case we need to either
- 1) use a DMA interrupt to re-trigger R_ATA_TRANSFER_CNT and continue with
- the descriptors, or
- 2) simply do the request here, and get dma_intr to only ide_end_request on
- those blocks that were actually set-up for transfer.
- */
-
- if(ata_tot_size + size > 131072) {
- printk("too large total ATA DMA request, %d + %d!\n", ata_tot_size, (int)size);
- return 1;
- }
-
- /* If size > 65536 it has to be splitted into new descriptors. Since we don't handle
- size > 131072 only one split is necessary */
-
- if(size > 65536) {
- /* ok we want to do IO at addr, size bytes. set up a new descriptor entry */
- ata_descrs[count].sw_len = 0; /* 0 means 65536, this is a 16-bit field */
- ata_descrs[count].ctrl = 0;
- ata_descrs[count].buf = addr;
- ata_descrs[count].next = virt_to_phys(&ata_descrs[count + 1]);
- count++;
- ata_tot_size += 65536;
- /* size and addr should refere to not handled data */
- size -= 65536;
- addr += 65536;
- }
- /* ok we want to do IO at addr, size bytes. set up a new descriptor entry */
- if(size == 65536) {
- ata_descrs[count].sw_len = 0; /* 0 means 65536, this is a 16-bit field */
- } else {
- ata_descrs[count].sw_len = size;
- }
- ata_descrs[count].ctrl = 0;
- ata_descrs[count].buf = addr;
- ata_descrs[count].next = virt_to_phys(&ata_descrs[count + 1]);
- count++;
- ata_tot_size += size;
- }
-
- if (count) {
- /* set the end-of-list flag on the last descriptor */
- ata_descrs[count - 1].ctrl |= d_eol;
- /* return and say all is ok */
- return 0;
- }
-
- printk("%s: empty DMA table?\n", drive->name);
- return 1; /* let the PIO routines handle this weirdness */
-}
-
-static int config_drive_for_dma (ide_drive_t *drive)
-{
- const char **list;
- struct hd_driveid *id = drive->id;
-
- if (id && (id->capability & 1)) {
- /* Enable DMA on any drive that supports mword2 DMA */
- if ((id->field_valid & 2) && (id->dma_mword & 0x404) == 0x404) {
- drive->using_dma = 1;
- return 0; /* DMA enabled */
- }
-
- /* Consult the list of known "good" drives */
- list = good_dma_drives;
- while (*list) {
- if (!strcmp(*list++,id->model)) {
- drive->using_dma = 1;
- return 0; /* DMA enabled */
- }
- }
- }
- return 1; /* DMA not enabled */
-}
-
-/*
- * etrax_dma_intr() is the handler for disk read/write DMA interrupts
- */
-static ide_startstop_t etrax_dma_intr (ide_drive_t *drive)
-{
- int i, dma_stat;
- byte stat;
-
- LED_DISK_READ(0);
- LED_DISK_WRITE(0);
-
- dma_stat = HWIF(drive)->ide_dma_end(drive);
- stat = HWIF(drive)->INB(IDE_STATUS_REG); /* get drive status */
- if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
- if (!dma_stat) {
- struct request *rq;
- rq = HWGROUP(drive)->rq;
- for (i = rq->nr_sectors; i > 0;) {
- i -= rq->current_nr_sectors;
- DRIVER(drive)->end_request(drive, 1, rq->nr_sectors);
- }
- return ide_stopped;
- }
- printk("%s: bad DMA status\n", drive->name);
- }
- return DRIVER(drive)->error(drive, "dma_intr", stat);
-}
-
-/*
- * Functions below initiates/aborts DMA read/write operations on a drive.
- *
- * The caller is assumed to have selected the drive and programmed the drive's
- * sector address using CHS or LBA. All that remains is to prepare for DMA
- * and then issue the actual read/write DMA/PIO command to the drive.
- *
- * For ATAPI devices, we just prepare for DMA and return. The caller should
- * then issue the packet command to the drive and call us again with
- * ide_dma_begin afterwards.
- *
- * Returns 0 if all went well.
- * Returns 1 if DMA read/write could not be started, in which case
- * the caller should revert to PIO for the current request.
- */
-
-static int e100_dma_check(ide_drive_t *drive)
-{
- return config_drive_for_dma (drive);
-}
-
-static int e100_dma_end(ide_drive_t *drive)
-{
- /* TODO: check if something went wrong with the DMA */
- return 0;
-}
-
-static int e100_start_dma(ide_drive_t *drive, int atapi, int reading)
-{
- if(reading) {
-
- RESET_DMA(ATA_RX_DMA_NBR); /* sometimes the DMA channel get stuck so we need to do this */
- WAIT_DMA(ATA_RX_DMA_NBR);
-
- /* set up the Etrax DMA descriptors */
-
- if(e100_ide_build_dmatable (drive))
- return 1;
-
- if(!atapi) {
- /* set the irq handler which will finish the request when DMA is done */
-
- ide_set_handler(drive, &etrax_dma_intr, WAIT_CMD, NULL);
-
- /* issue cmd to drive */
- if ((HWGROUP(drive)->rq->cmd == IDE_DRIVE_TASKFILE) &&
- (drive->addressing == 1)) {
- ide_task_t *args = HWGROUP(drive)->rq->special;
- etrax100_ide_outb(args->tfRegister[IDE_COMMAND_OFFSET], IDE_COMMAND_REG);
- } else if (drive->addressing) {
- etrax100_ide_outb(WIN_READDMA_EXT, IDE_COMMAND_REG);
- } else {
- etrax100_ide_outb(WIN_READDMA, IDE_COMMAND_REG);
- }
- }
-
- /* begin DMA */
-
- /* need to do this before RX DMA due to a chip bug
- * it is enough to just flush the part of the cache that
- * corresponds to the buffers we start, but since HD transfers
- * usually are more than 8 kB, it is easier to optimize for the
- * normal case and just flush the entire cache. its the only
- * way to be sure! (OB movie quote)
- */
- flush_etrax_cache();
- *R_DMA_CH3_FIRST = virt_to_phys(ata_descrs);
- *R_DMA_CH3_CMD = IO_STATE(R_DMA_CH3_CMD, cmd, start);
-
- /* initiate a multi word dma read using DMA handshaking */
-
- *R_ATA_TRANSFER_CNT =
- IO_FIELD(R_ATA_TRANSFER_CNT, count, ata_tot_size >> 1);
-
- *R_ATA_CTRL_DATA =
- IO_FIELD(R_ATA_CTRL_DATA, data, IDE_DATA_REG) |
- IO_STATE(R_ATA_CTRL_DATA, rw, read) |
- IO_STATE(R_ATA_CTRL_DATA, src_dst, dma) |
- IO_STATE(R_ATA_CTRL_DATA, handsh, dma) |
- IO_STATE(R_ATA_CTRL_DATA, multi, on) |
- IO_STATE(R_ATA_CTRL_DATA, dma_size, word);
-
- LED_DISK_READ(1);
-
- D(printk("dma read of %d bytes.\n", ata_tot_size));
-
- } else {
- /* writing */
-
- RESET_DMA(ATA_TX_DMA_NBR); /* sometimes the DMA channel get stuck so we need to do this */
- WAIT_DMA(ATA_TX_DMA_NBR);
-
- /* set up the Etrax DMA descriptors */
-
- if(e100_ide_build_dmatable (drive))
- return 1;
-
- if(!atapi) {
- /* set the irq handler which will finish the request when DMA is done */
-
- ide_set_handler(drive, &etrax_dma_intr, WAIT_CMD, NULL);
-
- /* issue cmd to drive */
- if ((HWGROUP(drive)->rq->cmd == IDE_DRIVE_TASKFILE) &&
- (drive->addressing == 1)) {
- ide_task_t *args = HWGROUP(drive)->rq->special;
- etrax100_ide_outb(args->tfRegister[IDE_COMMAND_OFFSET], IDE_COMMAND_REG);
- } else if (drive->addressing) {
- etrax100_ide_outb(WIN_WRITEDMA_EXT, IDE_COMMAND_REG);
- } else {
- etrax100_ide_outb(WIN_WRITEDMA, IDE_COMMAND_REG);
- }
- }
-
- /* begin DMA */
-
- *R_DMA_CH2_FIRST = virt_to_phys(ata_descrs);
- *R_DMA_CH2_CMD = IO_STATE(R_DMA_CH2_CMD, cmd, start);
-
- /* initiate a multi word dma write using DMA handshaking */
-
- *R_ATA_TRANSFER_CNT =
- IO_FIELD(R_ATA_TRANSFER_CNT, count, ata_tot_size >> 1);
-
- *R_ATA_CTRL_DATA =
- IO_FIELD(R_ATA_CTRL_DATA, data, IDE_DATA_REG) |
- IO_STATE(R_ATA_CTRL_DATA, rw, write) |
- IO_STATE(R_ATA_CTRL_DATA, src_dst, dma) |
- IO_STATE(R_ATA_CTRL_DATA, handsh, dma) |
- IO_STATE(R_ATA_CTRL_DATA, multi, on) |
- IO_STATE(R_ATA_CTRL_DATA, dma_size, word);
-
- LED_DISK_WRITE(1);
-
- D(printk("dma write of %d bytes.\n", ata_tot_size));
- }
- return 0;
-}
-
-static int e100_dma_write(ide_drive_t *drive)
-{
- e100_read_command = 0;
- /* ATAPI-devices (not disks) first call ide_dma_read/write to set the direction
- * then they call ide_dma_begin after they have issued the appropriate drive command
- * themselves to actually start the chipset DMA. so we just return here if we're
- * not a diskdrive.
- */
- if (drive->media != ide_disk)
- return 0;
- return e100_start_dma(drive, 0, 0);
-}
-
-static int e100_dma_read(ide_drive_t *drive)
-{
- e100_read_command = 1;
- /* ATAPI-devices (not disks) first call ide_dma_read/write to set the direction
- * then they call ide_dma_begin after they have issued the appropriate drive command
- * themselves to actually start the chipset DMA. so we just return here if we're
- * not a diskdrive.
- */
- if (drive->media != ide_disk)
- return 0;
- return e100_start_dma(drive, 0, 1);
-}
-
-static int e100_dma_begin(ide_drive_t *drive)
-{
- /* begin DMA, used by ATAPI devices which want to issue the
- * appropriate IDE command themselves.
- *
- * they have already called ide_dma_read/write to set the
- * static reading flag, now they call ide_dma_begin to do
- * the real stuff. we tell our code below not to issue
- * any IDE commands itself and jump into it.
- */
- return e100_start_dma(drive, 1, e100_read_command);
-}
+++ /dev/null
-/* $Id: serial.c,v 1.20 2004/05/24 12:00:20 starvik Exp $
- *
- * Serial port driver for the ETRAX 100LX chip
- *
- * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
- *
- * Many, many authors. Based once upon a time on serial.c for 16x50.
- *
- * $Log: serial.c,v $
- * Revision 1.20 2004/05/24 12:00:20 starvik
- * Big merge of stuff from Linux 2.4 (e.g. manual mode for the serial port).
- *
- * Revision 1.19 2004/05/17 13:12:15 starvik
- * Kernel console hook
- * Big merge from Linux 2.4 still pending.
- *
- * Revision 1.18 2003/10/28 07:18:30 starvik
- * Compiles with debug info
- *
- * Revision 1.17 2003/07/04 08:27:37 starvik
- * Merge of Linux 2.5.74
- *
- * Revision 1.16 2003/06/13 10:05:19 johana
- * Help the user to avoid trouble by:
- * Forcing mixed mode for status/control lines if not all pins are used.
- *
- * Revision 1.15 2003/06/13 09:43:01 johana
- * Merged in the following changes from os/linux/arch/cris/drivers/serial.c
- * + some minor changes to reduce diff.
- *
- * Revision 1.49 2003/05/30 11:31:54 johana
- * Merged in change-branch--serial9bit that adds CMSPAR support for sticky
- * parity (mark/space)
- *
- * Revision 1.48 2003/05/30 11:03:57 johana
- * Implemented rs_send_xchar() by disabling the DMA and writing manually.
- * Added e100_disable_txdma_channel() and e100_enable_txdma_channel().
- * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar
- * instead of setting info->x_char and check the CRTSCTS flag before
- * controlling the rts pin.
- *
- * Revision 1.14 2003/04/09 08:12:44 pkj
- * Corrected typo changes made upstream.
- *
- * Revision 1.13 2003/04/09 05:20:47 starvik
- * Merge of Linux 2.5.67
- *
- * Revision 1.11 2003/01/22 06:48:37 starvik
- * Fixed warnings issued by GCC 3.2.1
- *
- * Revision 1.9 2002/12/13 09:07:47 starvik
- * Alert user that RX_TIMEOUT_TICKS==0 doesn't work
- *
- * Revision 1.8 2002/12/11 13:13:57 starvik
- * Added arch/ to v10 specific includes
- * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
- *
- * Revision 1.7 2002/12/06 07:13:57 starvik
- * Corrected work queue stuff
- * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
- *
- * Revision 1.6 2002/11/21 07:17:46 starvik
- * Change static inline to extern inline where otherwise outlined with gcc-3.2
- *
- * Revision 1.5 2002/11/14 15:59:49 starvik
- * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff
- * probably doesn't work yet.
- *
- * Revision 1.42 2002/11/05 09:08:47 johana
- * Better implementation of rs_stop() and rs_start() that uses the XOFF
- * register to start/stop transmission.
- * change_speed() also initilises XOFF register correctly so that
- * auto_xoff is enabled when IXON flag is set by user.
- * This gives fast XOFF response times.
- *
- * Revision 1.41 2002/11/04 18:40:57 johana
- * Implemented rs_stop() and rs_start().
- * Simple tests using hwtestserial indicates that this should be enough
- * to make it work.
- *
- * Revision 1.40 2002/10/14 05:33:18 starvik
- * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled
- *
- * Revision 1.39 2002/09/30 21:00:57 johana
- * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and
- * control pins can be mixed between PA and PB.
- * If no serial port uses MIXED old solution is used
- * (saves a few bytes and cycles).
- * control_pins struct uses masks instead of bit numbers.
- * Corrected dummy values and polarity in line_info() so
- * /proc/tty/driver/serial is now correct.
- * (the E100_xxx_GET() macros is really active low - perhaps not obvious)
- *
- * Revision 1.38 2002/08/23 11:01:36 starvik
- * Check that serial port is enabled in all interrupt handlers to avoid
- * restarts of DMA channels not assigned to serial ports
- *
- * Revision 1.37 2002/08/13 13:02:37 bjornw
- * Removed some warnings because of unused code
- *
- * Revision 1.36 2002/08/08 12:50:01 starvik
- * Serial interrupt is shared with synchronous serial port driver
- *
- * Revision 1.35 2002/06/03 10:40:49 starvik
- * Increased RS-485 RTS toggle timer to 2 characters
- *
- * Revision 1.34 2002/05/28 18:59:36 johana
- * Whitespace and comment fixing to be more like etrax100ser.c 1.71.
- *
- * Revision 1.33 2002/05/28 17:55:43 johana
- * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time)
- * timer from tranismit_chars (interrupt context).
- * The timer toggles RTS in interrupt context when expired giving minimum
- * latencies.
- *
- * Revision 1.32 2002/05/22 13:58:00 johana
- * Renamed rs_write() to raw_write() and made it inline.
- * New rs_write() handles RS-485 if configured and enabled
- * (moved code from e100_write_rs485()).
- * RS-485 ioctl's uses copy_from_user() instead of verify_area().
- *
- * Revision 1.31 2002/04/22 11:20:03 johana
- * Updated copyright years.
- *
- * Revision 1.30 2002/04/22 09:39:12 johana
- * RS-485 support compiles.
- *
- * Revision 1.29 2002/01/14 16:10:01 pkj
- * Allocate the receive buffers dynamically. The static 4kB buffer was
- * too small for the peaks. This means that we can get rid of the extra
- * buffer and the copying to it. It also means we require less memory
- * under normal operations, but can use more when needed (there is a
- * cap at 64kB for safety reasons). If there is no memory available
- * we panic(), and die a horrible death...
- *
- * Revision 1.28 2001/12/18 15:04:53 johana
- * Cleaned up write_rs485() - now it works correctly without padding extra
- * char.
- * Added sane default initialisation of rs485.
- * Added #ifdef around dummy variables.
- *
- * Revision 1.27 2001/11/29 17:00:41 pkj
- * 2kB seems to be too small a buffer when using 921600 bps,
- * so increase it to 4kB (this was already done for the elinux
- * version of the serial driver).
- *
- * Revision 1.26 2001/11/19 14:20:41 pkj
- * Minor changes to comments and unused code.
- *
- * Revision 1.25 2001/11/12 20:03:43 pkj
- * Fixed compiler warnings.
- *
- * Revision 1.24 2001/11/12 15:10:05 pkj
- * Total redesign of the receiving part of the serial driver.
- * Uses eight chained descriptors to write to a 4kB buffer.
- * This data is then serialised into a 2kB buffer. From there it
- * is copied into the TTY's flip buffers when they become available.
- * A lot of copying, and the sizes of the buffers might need to be
- * tweaked, but all in all it should work better than the previous
- * version, without the need to modify the TTY code in any way.
- * Also note that erroneous bytes are now correctly marked in the
- * flag buffers (instead of always marking the first byte).
- *
- * Revision 1.23 2001/10/30 17:53:26 pkj
- * * Set info->uses_dma to 0 when a port is closed.
- * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT).
- * * Call start_flush_timer() in start_receive() if
- * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined.
- *
- * Revision 1.22 2001/10/30 17:44:03 pkj
- * Use %lu for received and transmitted counters in line_info().
- *
- * Revision 1.21 2001/10/30 17:40:34 pkj
- * Clean-up. The only change to functionality is that
- * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of
- * MAX_FLUSH_TIME(=8).
- *
- * Revision 1.20 2001/10/30 15:24:49 johana
- * Added char_time stuff from 2.0 driver.
- *
- * Revision 1.19 2001/10/30 15:23:03 johana
- * Merged with 1.13.2 branch + fixed indentation
- * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ
- *
- * Revision 1.18 2001/09/24 09:27:22 pkj
- * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud().
- *
- * Revision 1.17 2001/08/24 11:32:49 ronny
- * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define.
- *
- * Revision 1.16 2001/08/24 07:56:22 ronny
- * Added config ifdefs around ser0 irq requests.
- *
- * Revision 1.15 2001/08/16 09:10:31 bjarne
- * serial.c - corrected the initialization of rs_table, the wrong defines
- * where used.
- * Corrected a test in timed_flush_handler.
- * Changed configured to enabled.
- * serial.h - Changed configured to enabled.
- *
- * Revision 1.14 2001/08/15 07:31:23 bjarne
- * Introduced two new members to the e100_serial struct.
- * configured - Will be set to 1 if the port has been configured in .config
- * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set
- * to 1
- * when a port is opened. This is used to limit the DMA interrupt
- * routines to only manipulate DMA channels actually used by the
- * serial driver.
- *
- * Revision 1.13.2.2 2001/10/17 13:57:13 starvik
- * Receiver was broken by the break fixes
- *
- * Revision 1.13.2.1 2001/07/20 13:57:39 ronny
- * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff
- * like break handling.
- *
- * Revision 1.13 2001/05/09 12:40:31 johana
- * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
- *
- * Revision 1.12 2001/04/19 12:23:07 bjornw
- * CONFIG_RS485 -> CONFIG_ETRAX_RS485
- *
- * Revision 1.11 2001/04/05 14:29:48 markusl
- * Updated according to review remarks i.e.
- * -Use correct types in port structure to avoid compiler warnings
- * -Try to use IO_* macros whenever possible
- * -Open should never return -EBUSY
- *
- * Revision 1.10 2001/03/05 13:14:07 bjornw
- * Another spelling fix
- *
- * Revision 1.9 2001/02/23 13:46:38 bjornw
- * Spellling check
- *
- * Revision 1.8 2001/01/23 14:56:35 markusl
- * Made use of ser1 optional
- * Needed by USB
- *
- * Revision 1.7 2001/01/19 16:14:48 perf
- * Added kernel options for serial ports 234.
- * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ.
- *
- * Revision 1.6 2000/11/22 16:36:09 bjornw
- * Please marketing by using the correct case when spelling Etrax.
- *
- * Revision 1.5 2000/11/21 16:43:37 bjornw
- * Fixed so it compiles under CONFIG_SVINTO_SIM
- *
- * Revision 1.4 2000/11/15 17:34:12 bjornw
- * Added a timeout timer for flushing input channels. The interrupt-based
- * fast flush system should be easy to merge with this later (works the same
- * way, only with an irq instead of a system timer_list)
- *
- * Revision 1.3 2000/11/13 17:19:57 bjornw
- * * Incredibly, this almost complete rewrite of serial.c worked (at least
- * for output) the first time.
- *
- * Items worth noticing:
- *
- * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now)
- * RS485 is not ported (why can't it be done in userspace as on x86 ?)
- * Statistics done through async_icount - if any more stats are needed,
- * that's the place to put them or in an arch-dep version of it.
- * timeout_interrupt and the other fast timeout stuff not ported yet
- * There be dragons in this 3k+ line driver
- *
- * Revision 1.2 2000/11/10 16:50:28 bjornw
- * First shot at a 2.4 port, does not compile totally yet
- *
- * Revision 1.1 2000/11/10 16:47:32 bjornw
- * Added verbatim copy of rev 1.49 etrax100ser.c from elinux
- *
- * Revision 1.49 2000/10/30 15:47:14 tobiasa
- * Changed version number.
- *
- * Revision 1.48 2000/10/25 11:02:43 johana
- * Changed %ul to %lu in printf's
- *
- * Revision 1.47 2000/10/18 15:06:53 pkj
- * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and
- * CONFIG_ETRAX_SERIAL_PROC_ENTRY together.
- * Some clean-up of the /proc/serial file.
- *
- * Revision 1.46 2000/10/16 12:59:40 johana
- * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info.
- *
- * Revision 1.45 2000/10/13 17:10:59 pkj
- * Do not flush DMAs while flipping TTY buffers.
- *
- * Revision 1.44 2000/10/13 16:34:29 pkj
- * Added a delay in ser_interrupt() for 2.3ms when an error is detected.
- * We do not know why this delay is required yet, but without it the
- * irmaflash program does not work (this was the program that needed
- * the ser_interrupt() to be needed in the first place). This should not
- * affect normal use of the serial ports.
- *
- * Revision 1.43 2000/10/13 16:30:44 pkj
- * New version of the fast flush of serial buffers code. This time
- * it is localized to the serial driver and uses a fast timer to
- * do the work.
- *
- * Revision 1.42 2000/10/13 14:54:26 bennyo
- * Fix for switching RTS when using rs485
- *
- * Revision 1.41 2000/10/12 11:43:44 pkj
- * Cleaned up a number of comments.
- *
- * Revision 1.40 2000/10/10 11:58:39 johana
- * Made RS485 support generic for all ports.
- * Toggle rts in interrupt if no delay wanted.
- * WARNING: No true transmitter empty check??
- * Set d_wait bit when sending data so interrupt is delayed until
- * fifo flushed. (Fix tcdrain() problem)
- *
- * Revision 1.39 2000/10/04 16:08:02 bjornw
- * * Use virt_to_phys etc. for DMA addresses
- * * Removed CONFIG_FLUSH_DMA_FAST hacks
- * * Indentation fix
- *
- * Revision 1.38 2000/10/02 12:27:10 mattias
- * * added variable used when using fast flush on serial dma.
- * (CONFIG_FLUSH_DMA_FAST)
- *
- * Revision 1.37 2000/09/27 09:44:24 pkj
- * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS.
- *
- * Revision 1.36 2000/09/20 13:12:52 johana
- * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS:
- * Number of timer ticks between flush of receive fifo (1 tick = 10ms).
- * Try 0-3 for low latency applications. Approx 5 for high load
- * applications (e.g. PPP). Maybe this should be more adaptive some day...
- *
- * Revision 1.35 2000/09/20 10:36:08 johana
- * Typo in get_lsr_info()
- *
- * Revision 1.34 2000/09/20 10:29:59 johana
- * Let rs_chars_in_buffer() check fifo content as well.
- * get_lsr_info() might work now (not tested).
- * Easier to change the port to debug.
- *
- * Revision 1.33 2000/09/13 07:52:11 torbjore
- * Support RS485
- *
- * Revision 1.32 2000/08/31 14:45:37 bjornw
- * After sending a break we need to reset the transmit DMA channel
- *
- * Revision 1.31 2000/06/21 12:13:29 johana
- * Fixed wait for all chars sent when closing port.
- * (Used to always take 1 second!)
- * Added shadows for directions of status/ctrl signals.
- *
- * Revision 1.30 2000/05/29 16:27:55 bjornw
- * Simulator ifdef moved a bit
- *
- * Revision 1.29 2000/05/09 09:40:30 mattias
- * * Added description of dma registers used in timeout_interrupt
- * * Removed old code
- *
- * Revision 1.28 2000/05/08 16:38:58 mattias
- * * Bugfix for flushing fifo in timeout_interrupt
- * Problem occurs when bluetooth stack waits for a small number of bytes
- * containing an event acknowledging free buffers in bluetooth HW
- * As before, data was stuck in fifo until more data came on uart and
- * flushed it up to the stack.
- *
- * Revision 1.27 2000/05/02 09:52:28 jonasd
- * Added fix for peculiar etrax behaviour when eop is forced on an empty
- * fifo. This is used when flashing the IRMA chip. Disabled by default.
- *
- * Revision 1.26 2000/03/29 15:32:02 bjornw
- * 2.0.34 updates
- *
- * Revision 1.25 2000/02/16 16:59:36 bjornw
- * * Receive DMA directly into the flip-buffer, eliminating an intermediary
- * receive buffer and a memcpy. Will avoid some overruns.
- * * Error message on debug port if an overrun or flip buffer overrun occurs.
- * * Just use the first byte in the flag flip buffer for errors.
- * * Check for timeout on the serial ports only each 5/100 s, not 1/100.
- *
- * Revision 1.24 2000/02/09 18:02:28 bjornw
- * * Clear serial errors (overrun, framing, parity) correctly. Before, the
- * receiver would get stuck if an error occurred and we did not restart
- * the input DMA.
- * * Cosmetics (indentation, some code made into inlines)
- * * Some more debug options
- * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop)
- * when the last open is closed. Corresponding fixes in startup().
- * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed
- * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that)
- * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS
- *
- * Revision 1.23 2000/01/24 17:46:19 johana
- * Wait for flush of DMA/FIFO when closing port.
- *
- * Revision 1.22 2000/01/20 18:10:23 johana
- * Added TIOCMGET ioctl to return modem status.
- * Implemented modem status/control that works with the extra signals
- * (DTR, DSR, RI,CD) as well.
- * 3 different modes supported:
- * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy)
- * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when
- * closing the last filehandle, NASTY!.
- * Added break generation, not tested though!
- * Use SA_SHIRQ when request_irq() for ser2 and ser3 (shared with) par0 and par1.
- * You can't use them at the same time (yet..), but you can hopefully switch
- * between ser2/par0, ser3/par1 with the same kernel config.
- * Replaced some magic constants with defines
- *
- *
- */
-
-static char *serial_version = "$Revision: 1.20 $";
-
-#include <linux/config.h>
-#include <linux/version.h>
-
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/timer.h>
-#include <linux/interrupt.h>
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-#include <linux/major.h>
-#include <linux/string.h>
-#include <linux/fcntl.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <asm/uaccess.h>
-#include <linux/kernel.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/system.h>
-#include <asm/segment.h>
-#include <asm/bitops.h>
-#include <linux/delay.h>
-
-#include <asm/arch/svinto.h>
-
-/* non-arch dependent serial structures are in linux/serial.h */
-#include <linux/serial.h>
-/* while we keep our own stuff (struct e100_serial) in a local .h file */
-#include "serial.h"
-#include <asm/fasttimer.h>
-
-#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
-#ifndef CONFIG_ETRAX_FAST_TIMER
-#error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
-#endif
-#endif
-
-#if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
- (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
-#error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
-#endif
-
-#if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
-#error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
-#endif
-
-/*
- * All of the compatibilty code so we can compile serial.c against
- * older kernels is hidden in serial_compat.h
- */
-#if defined(LOCAL_HEADERS)
-#include "serial_compat.h"
-#endif
-
-#define _INLINE_ inline
-
-struct tty_driver *serial_driver;
-
-/* serial subtype definitions */
-#ifndef SERIAL_TYPE_NORMAL
-#define SERIAL_TYPE_NORMAL 1
-#endif
-
-/* number of characters left in xmit buffer before we ask for more */
-#define WAKEUP_CHARS 256
-
-//#define SERIAL_DEBUG_INTR
-//#define SERIAL_DEBUG_OPEN
-//#define SERIAL_DEBUG_FLOW
-//#define SERIAL_DEBUG_DATA
-//#define SERIAL_DEBUG_THROTTLE
-//#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
-//#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
-
-/* Enable this to use serial interrupts to handle when you
- expect the first received event on the serial port to
- be an error, break or similar. Used to be able to flash IRMA
- from eLinux */
-#define SERIAL_HANDLE_EARLY_ERRORS
-
-/* Defined and used in n_tty.c, but we need it here as well */
-#define TTY_THRESHOLD_THROTTLE 128
-
-/* Due to buffersizes and threshold values, our SERIAL_DESCR_BUF_SIZE
- * must not be to high or flow control won't work if we leave it to the tty
- * layer so we have our own throttling in flush_to_flip
- * TTY_FLIPBUF_SIZE=512,
- * TTY_THRESHOLD_THROTTLE/UNTHROTTLE=128
- * BUF_SIZE can't be > 128
- */
-/* Currently 16 descriptors x 128 bytes = 2048 bytes */
-#define SERIAL_DESCR_BUF_SIZE 256
-
-#define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
-#define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
-
-/* We don't want to load the system with massive fast timer interrupt
- * on high baudrates so limit it to 250 us (4kHz) */
-#define MIN_FLUSH_TIME_USEC 250
-
-/* Add an x here to log a lot of timer stuff */
-#define TIMERD(x)
-/* Debug details of interrupt handling */
-#define DINTR1(x) /* irq on/off, errors */
-#define DINTR2(x) /* tx and rx */
-/* Debug flip buffer stuff */
-#define DFLIP(x)
-/* Debug flow control and overview of data flow */
-#define DFLOW(x)
-#define DBAUD(x)
-#define DLOG_INT_TRIG(x)
-
-//#define DEBUG_LOG_INCLUDED
-#ifndef DEBUG_LOG_INCLUDED
-#define DEBUG_LOG(line, string, value)
-#else
-struct debug_log_info
-{
- unsigned long time;
- unsigned long timer_data;
-// int line;
- const char *string;
- int value;
-};
-#define DEBUG_LOG_SIZE 4096
-
-struct debug_log_info debug_log[DEBUG_LOG_SIZE];
-int debug_log_pos = 0;
-
-#define DEBUG_LOG(_line, _string, _value) do { \
- if ((_line) == SERIAL_DEBUG_LINE) {\
- debug_log_func(_line, _string, _value); \
- }\
-}while(0)
-
-void debug_log_func(int line, const char *string, int value)
-{
- if (debug_log_pos < DEBUG_LOG_SIZE) {
- debug_log[debug_log_pos].time = jiffies;
- debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
-// debug_log[debug_log_pos].line = line;
- debug_log[debug_log_pos].string = string;
- debug_log[debug_log_pos].value = value;
- debug_log_pos++;
- }
- /*printk(string, value);*/
-}
-#endif
-
-#ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
-/* Default number of timer ticks before flushing rx fifo
- * When using "little data, low latency applications: use 0
- * When using "much data applications (PPP)" use ~5
- */
-#define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
-#endif
-
-unsigned long timer_data_to_ns(unsigned long timer_data);
-
-static void change_speed(struct e100_serial *info);
-static void rs_throttle(struct tty_struct * tty);
-static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
-static int rs_write(struct tty_struct * tty, int from_user,
- const unsigned char *buf, int count);
-extern _INLINE_ int rs_raw_write(struct tty_struct * tty, int from_user,
- const unsigned char *buf, int count);
-#ifdef CONFIG_ETRAX_RS485
-static int e100_write_rs485(struct tty_struct * tty, int from_user,
- const unsigned char *buf, int count);
-#endif
-static int get_lsr_info(struct e100_serial * info, unsigned int *value);
-
-
-#define DEF_BAUD 115200 /* 115.2 kbit/s */
-#define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-#define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
-/* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
-#define DEF_TX 0x80 /* or SERIAL_CTRL_B */
-
-/* offsets from R_SERIALx_CTRL */
-
-#define REG_DATA 0
-#define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
-#define REG_TR_DATA 0
-#define REG_STATUS 1
-#define REG_TR_CTRL 1
-#define REG_REC_CTRL 2
-#define REG_BAUD 3
-#define REG_XOFF 4 /* this is a 32 bit register */
-
-/* The bitfields are the same for all serial ports */
-#define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
-#define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
-#define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
-#define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
-#define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
-
-#define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
-
-/* Values for info->errorcode */
-#define ERRCODE_SET_BREAK (TTY_BREAK)
-#define ERRCODE_INSERT 0x100
-#define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
-
-#define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
-
-/*
- * General note regarding the use of IO_* macros in this file:
- *
- * We will use the bits defined for DMA channel 6 when using various
- * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
- * the same for all channels (which of course they are).
- *
- * We will also use the bits defined for serial port 0 when writing commands
- * to the different ports, as these bits too are the same for all ports.
- */
-
-
-/* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
-static const unsigned long e100_ser_int_mask = 0
-#ifdef CONFIG_ETRAX_SERIAL_PORT0
-| IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT1
-| IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT2
-| IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT3
-| IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
-#endif
-;
-unsigned long r_alt_ser_baudrate_shadow = 0;
-
-/* this is the data for the four serial ports in the etrax100 */
-/* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
-/* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
-
-static struct e100_serial rs_table[] = {
- { .baud = DEF_BAUD,
- .port = (unsigned char *)R_SERIAL0_CTRL,
- .irq = 1U << 12, /* uses DMA 6 and 7 */
- .oclrintradr = R_DMA_CH6_CLR_INTR,
- .ofirstadr = R_DMA_CH6_FIRST,
- .ocmdadr = R_DMA_CH6_CMD,
- .ostatusadr = R_DMA_CH6_STATUS,
- .iclrintradr = R_DMA_CH7_CLR_INTR,
- .ifirstadr = R_DMA_CH7_FIRST,
- .icmdadr = R_DMA_CH7_CMD,
- .idescradr = R_DMA_CH7_DESCR,
- .flags = STD_FLAGS,
- .rx_ctrl = DEF_RX,
- .tx_ctrl = DEF_TX,
- .iseteop = 2,
-#ifdef CONFIG_ETRAX_SERIAL_PORT0
- .enabled = 1,
-#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
- .dma_out_enabled = 1,
-#else
- .dma_out_enabled = 0,
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
- .dma_in_enabled = 1,
-#else
- .dma_in_enabled = 0
-#endif
-#else
- .enabled = 0,
- .dma_out_enabled = 0,
- .dma_in_enabled = 0
-#endif
-
-}, /* ttyS0 */
-#ifndef CONFIG_SVINTO_SIM
- { .baud = DEF_BAUD,
- .port = (unsigned char *)R_SERIAL1_CTRL,
- .irq = 1U << 16, /* uses DMA 8 and 9 */
- .oclrintradr = R_DMA_CH8_CLR_INTR,
- .ofirstadr = R_DMA_CH8_FIRST,
- .ocmdadr = R_DMA_CH8_CMD,
- .ostatusadr = R_DMA_CH8_STATUS,
- .iclrintradr = R_DMA_CH9_CLR_INTR,
- .ifirstadr = R_DMA_CH9_FIRST,
- .icmdadr = R_DMA_CH9_CMD,
- .idescradr = R_DMA_CH9_DESCR,
- .flags = STD_FLAGS,
- .rx_ctrl = DEF_RX,
- .tx_ctrl = DEF_TX,
- .iseteop = 3,
-#ifdef CONFIG_ETRAX_SERIAL_PORT1
- .enabled = 1,
-#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
- .dma_out_enabled = 1,
-#else
- .dma_out_enabled = 0,
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
- .dma_in_enabled = 1,
-#else
- .dma_in_enabled = 0
-#endif
-#else
- .enabled = 0,
- .dma_out_enabled = 0,
- .dma_in_enabled = 0
-#endif
-}, /* ttyS1 */
-
- { .baud = DEF_BAUD,
- .port = (unsigned char *)R_SERIAL2_CTRL,
- .irq = 1U << 4, /* uses DMA 2 and 3 */
- .oclrintradr = R_DMA_CH2_CLR_INTR,
- .ofirstadr = R_DMA_CH2_FIRST,
- .ocmdadr = R_DMA_CH2_CMD,
- .ostatusadr = R_DMA_CH2_STATUS,
- .iclrintradr = R_DMA_CH3_CLR_INTR,
- .ifirstadr = R_DMA_CH3_FIRST,
- .icmdadr = R_DMA_CH3_CMD,
- .idescradr = R_DMA_CH3_DESCR,
- .flags = STD_FLAGS,
- .rx_ctrl = DEF_RX,
- .tx_ctrl = DEF_TX,
- .iseteop = 0,
-#ifdef CONFIG_ETRAX_SERIAL_PORT2
- .enabled = 1,
-#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
- .dma_out_enabled = 1,
-#else
- .dma_out_enabled = 0,
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
- .dma_in_enabled = 1,
-#else
- .dma_in_enabled = 0
-#endif
-#else
- .enabled = 0,
- .dma_out_enabled = 0,
- .dma_in_enabled = 0
-#endif
- }, /* ttyS2 */
-
- { .baud = DEF_BAUD,
- .port = (unsigned char *)R_SERIAL3_CTRL,
- .irq = 1U << 8, /* uses DMA 4 and 5 */
- .oclrintradr = R_DMA_CH4_CLR_INTR,
- .ofirstadr = R_DMA_CH4_FIRST,
- .ocmdadr = R_DMA_CH4_CMD,
- .ostatusadr = R_DMA_CH4_STATUS,
- .iclrintradr = R_DMA_CH5_CLR_INTR,
- .ifirstadr = R_DMA_CH5_FIRST,
- .icmdadr = R_DMA_CH5_CMD,
- .idescradr = R_DMA_CH5_DESCR,
- .flags = STD_FLAGS,
- .rx_ctrl = DEF_RX,
- .tx_ctrl = DEF_TX,
- .iseteop = 1,
-#ifdef CONFIG_ETRAX_SERIAL_PORT3
- .enabled = 1,
-#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
- .dma_out_enabled = 1,
-#else
- .dma_out_enabled = 0,
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
- .dma_in_enabled = 1,
-#else
- .dma_in_enabled = 0
-#endif
-#else
- .enabled = 0,
- .dma_out_enabled = 0,
- .dma_in_enabled = 0
-#endif
- } /* ttyS3 */
-#endif
-};
-
-
-#define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
-
-static struct termios *serial_termios[NR_PORTS];
-static struct termios *serial_termios_locked[NR_PORTS];
-#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
-static struct fast_timer fast_timers[NR_PORTS];
-#endif
-
-#ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
-#define PROCSTAT(x) x
-struct ser_statistics_type {
- int overrun_cnt;
- int early_errors_cnt;
- int ser_ints_ok_cnt;
- int errors_cnt;
- unsigned long int processing_flip;
- unsigned long processing_flip_still_room;
- unsigned long int timeout_flush_cnt;
- int rx_dma_ints;
- int tx_dma_ints;
- int rx_tot;
- int tx_tot;
-};
-
-static struct ser_statistics_type ser_stat[NR_PORTS];
-
-#else
-
-#define PROCSTAT(x)
-
-#endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
-
-/* RS-485 */
-#if defined(CONFIG_ETRAX_RS485)
-#ifdef CONFIG_ETRAX_FAST_TIMER
-static struct fast_timer fast_timers_rs485[NR_PORTS];
-#endif
-#if defined(CONFIG_ETRAX_RS485_ON_PA)
-static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
-#endif
-#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
-static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
-#endif
-#endif
-
-/* Info and macros needed for each ports extra control/status signals. */
-#define E100_STRUCT_PORT(line, pinname) \
- ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
- (R_PORT_PA_DATA): ( \
- (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
- (R_PORT_PB_DATA):&dummy_ser[line]))
-
-#define E100_STRUCT_SHADOW(line, pinname) \
- ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
- (&port_pa_data_shadow): ( \
- (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
- (&port_pb_data_shadow):&dummy_ser[line]))
-#define E100_STRUCT_MASK(line, pinname) \
- ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
- (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
- (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
- (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
-
-#define DUMMY_DTR_MASK 1
-#define DUMMY_RI_MASK 2
-#define DUMMY_DSR_MASK 4
-#define DUMMY_CD_MASK 8
-static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
-
-/* If not all status pins are used or disabled, use mixed mode */
-#ifdef CONFIG_ETRAX_SERIAL_PORT0
-
-#define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
-
-#if SER0_PA_BITSUM != -4
-# if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-#endif
-
-#define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
-
-#if SER0_PB_BITSUM != -4
-# if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-#endif
-
-#endif /* PORT0 */
-
-
-#ifdef CONFIG_ETRAX_SERIAL_PORT1
-
-#define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
-
-#if SER1_PA_BITSUM != -4
-# if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-#endif
-
-#define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
-
-#if SER1_PB_BITSUM != -4
-# if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-#endif
-
-#endif /* PORT1 */
-
-#ifdef CONFIG_ETRAX_SERIAL_PORT2
-
-#define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
-
-#if SER2_PA_BITSUM != -4
-# if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-#endif
-
-#define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
-
-#if SER2_PB_BITSUM != -4
-# if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-#endif
-
-#endif /* PORT2 */
-
-#ifdef CONFIG_ETRAX_SERIAL_PORT3
-
-#define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
-
-#if SER3_PA_BITSUM != -4
-# if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
-# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-#endif
-
-#define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
-
-#if SER3_PB_BITSUM != -4
-# if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-# if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
-# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
-# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
-# endif
-# endif
-#endif
-
-#endif /* PORT3 */
-
-
-#if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
- defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
- defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
- defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
-#define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
-#endif
-
-#ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
-/* The pins can be mixed on PA and PB */
-#define CONTROL_PINS_PORT_NOT_USED(line) \
- &dummy_ser[line], &dummy_ser[line], \
- &dummy_ser[line], &dummy_ser[line], \
- &dummy_ser[line], &dummy_ser[line], \
- &dummy_ser[line], &dummy_ser[line], \
- DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
-
-
-struct control_pins
-{
- volatile unsigned char *dtr_port;
- unsigned char *dtr_shadow;
- volatile unsigned char *ri_port;
- unsigned char *ri_shadow;
- volatile unsigned char *dsr_port;
- unsigned char *dsr_shadow;
- volatile unsigned char *cd_port;
- unsigned char *cd_shadow;
-
- unsigned char dtr_mask;
- unsigned char ri_mask;
- unsigned char dsr_mask;
- unsigned char cd_mask;
-};
-
-static const struct control_pins e100_modem_pins[NR_PORTS] =
-{
- /* Ser 0 */
- {
-#ifdef CONFIG_ETRAX_SERIAL_PORT0
- E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
- E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
- E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
- E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
- E100_STRUCT_MASK(0,DTR),
- E100_STRUCT_MASK(0,RI),
- E100_STRUCT_MASK(0,DSR),
- E100_STRUCT_MASK(0,CD)
-#else
- CONTROL_PINS_PORT_NOT_USED(0)
-#endif
- },
-
- /* Ser 1 */
- {
-#ifdef CONFIG_ETRAX_SERIAL_PORT1
- E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
- E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
- E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
- E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
- E100_STRUCT_MASK(1,DTR),
- E100_STRUCT_MASK(1,RI),
- E100_STRUCT_MASK(1,DSR),
- E100_STRUCT_MASK(1,CD)
-#else
- CONTROL_PINS_PORT_NOT_USED(1)
-#endif
- },
-
- /* Ser 2 */
- {
-#ifdef CONFIG_ETRAX_SERIAL_PORT2
- E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
- E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
- E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
- E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
- E100_STRUCT_MASK(2,DTR),
- E100_STRUCT_MASK(2,RI),
- E100_STRUCT_MASK(2,DSR),
- E100_STRUCT_MASK(2,CD)
-#else
- CONTROL_PINS_PORT_NOT_USED(2)
-#endif
- },
-
- /* Ser 3 */
- {
-#ifdef CONFIG_ETRAX_SERIAL_PORT3
- E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
- E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
- E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
- E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
- E100_STRUCT_MASK(3,DTR),
- E100_STRUCT_MASK(3,RI),
- E100_STRUCT_MASK(3,DSR),
- E100_STRUCT_MASK(3,CD)
-#else
- CONTROL_PINS_PORT_NOT_USED(3)
-#endif
- }
-};
-#else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
-
-/* All pins are on either PA or PB for each serial port */
-#define CONTROL_PINS_PORT_NOT_USED(line) \
- &dummy_ser[line], &dummy_ser[line], \
- DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
-
-
-struct control_pins
-{
- volatile unsigned char *port;
- unsigned char *shadow;
-
- unsigned char dtr_mask;
- unsigned char ri_mask;
- unsigned char dsr_mask;
- unsigned char cd_mask;
-};
-
-#define dtr_port port
-#define dtr_shadow shadow
-#define ri_port port
-#define ri_shadow shadow
-#define dsr_port port
-#define dsr_shadow shadow
-#define cd_port port
-#define cd_shadow shadow
-
-static const struct control_pins e100_modem_pins[NR_PORTS] =
-{
- /* Ser 0 */
- {
-#ifdef CONFIG_ETRAX_SERIAL_PORT0
- E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
- E100_STRUCT_MASK(0,DTR),
- E100_STRUCT_MASK(0,RI),
- E100_STRUCT_MASK(0,DSR),
- E100_STRUCT_MASK(0,CD)
-#else
- CONTROL_PINS_PORT_NOT_USED(0)
-#endif
- },
-
- /* Ser 1 */
- {
-#ifdef CONFIG_ETRAX_SERIAL_PORT1
- E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
- E100_STRUCT_MASK(1,DTR),
- E100_STRUCT_MASK(1,RI),
- E100_STRUCT_MASK(1,DSR),
- E100_STRUCT_MASK(1,CD)
-#else
- CONTROL_PINS_PORT_NOT_USED(1)
-#endif
- },
-
- /* Ser 2 */
- {
-#ifdef CONFIG_ETRAX_SERIAL_PORT2
- E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
- E100_STRUCT_MASK(2,DTR),
- E100_STRUCT_MASK(2,RI),
- E100_STRUCT_MASK(2,DSR),
- E100_STRUCT_MASK(2,CD)
-#else
- CONTROL_PINS_PORT_NOT_USED(2)
-#endif
- },
-
- /* Ser 3 */
- {
-#ifdef CONFIG_ETRAX_SERIAL_PORT3
- E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
- E100_STRUCT_MASK(3,DTR),
- E100_STRUCT_MASK(3,RI),
- E100_STRUCT_MASK(3,DSR),
- E100_STRUCT_MASK(3,CD)
-#else
- CONTROL_PINS_PORT_NOT_USED(3)
-#endif
- }
-};
-#endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
-
-#define E100_RTS_MASK 0x20
-#define E100_CTS_MASK 0x40
-
-/* All serial port signals are active low:
- * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
- * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
- *
- * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
- */
-
-/* Output */
-#define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
-/* Input */
-#define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
-
-/* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
-/* Is an output */
-#define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
-
-/* Normally inputs */
-#define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
-#define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
-
-/* Input */
-#define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
-
-
-/*
- * tmp_buf is used as a temporary buffer by serial_write. We need to
- * lock it in case the memcpy_fromfs blocks while swapping in a page,
- * and some other program tries to do a serial write at the same time.
- * Since the lock will only come under contention when the system is
- * swapping and available memory is low, it makes sense to share one
- * buffer across all the serial ports, since it significantly saves
- * memory if large numbers of serial ports are open.
- */
-static unsigned char *tmp_buf;
-#ifdef DECLARE_MUTEX
-static DECLARE_MUTEX(tmp_buf_sem);
-#else
-static struct semaphore tmp_buf_sem = MUTEX;
-#endif
-
-/* Calculate the chartime depending on baudrate, numbor of bits etc. */
-static void update_char_time(struct e100_serial * info)
-{
- tcflag_t cflags = info->tty->termios->c_cflag;
- int bits;
-
- /* calc. number of bits / data byte */
- /* databits + startbit and 1 stopbit */
- if ((cflags & CSIZE) == CS7)
- bits = 9;
- else
- bits = 10;
-
- if (cflags & CSTOPB) /* 2 stopbits ? */
- bits++;
-
- if (cflags & PARENB) /* parity bit ? */
- bits++;
-
- /* calc timeout */
- info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
- info->flush_time_usec = 4*info->char_time_usec;
- if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
- info->flush_time_usec = MIN_FLUSH_TIME_USEC;
-
-}
-
-/*
- * This function maps from the Bxxxx defines in asm/termbits.h into real
- * baud rates.
- */
-
-static int
-cflag_to_baud(unsigned int cflag)
-{
- static int baud_table[] = {
- 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
- 4800, 9600, 19200, 38400 };
-
- static int ext_baud_table[] = {
- 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
- 0, 0, 0, 0, 0, 0, 0, 0 };
-
- if (cflag & CBAUDEX)
- return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
- else
- return baud_table[cflag & CBAUD];
-}
-
-/* and this maps to an etrax100 hardware baud constant */
-
-static unsigned char
-cflag_to_etrax_baud(unsigned int cflag)
-{
- char retval;
-
- static char baud_table[] = {
- -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
-
- static char ext_baud_table[] = {
- -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
-
- if (cflag & CBAUDEX)
- retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
- else
- retval = baud_table[cflag & CBAUD];
-
- if (retval < 0) {
- printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
- retval = 5; /* choose default 9600 instead */
- }
-
- return retval | (retval << 4); /* choose same for both TX and RX */
-}
-
-
-/* Various static support functions */
-
-/* Functions to set or clear DTR/RTS on the requested line */
-/* It is complicated by the fact that RTS is a serial port register, while
- * DTR might not be implemented in the HW at all, and if it is, it can be on
- * any general port.
- */
-
-
-static inline void
-e100_dtr(struct e100_serial *info, int set)
-{
-#ifndef CONFIG_SVINTO_SIM
- unsigned char mask = e100_modem_pins[info->line].dtr_mask;
-
-#ifdef SERIAL_DEBUG_IO
- printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
- printk("ser%i shadow before 0x%02X get: %i\n",
- info->line, *e100_modem_pins[info->line].dtr_shadow,
- E100_DTR_GET(info));
-#endif
- /* DTR is active low */
- {
- unsigned long flags;
-
- save_flags(flags);
- cli();
- *e100_modem_pins[info->line].dtr_shadow &= ~mask;
- *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
- *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
- restore_flags(flags);
- }
-
-#ifdef SERIAL_DEBUG_IO
- printk("ser%i shadow after 0x%02X get: %i\n",
- info->line, *e100_modem_pins[info->line].dtr_shadow,
- E100_DTR_GET(info));
-#endif
-#endif
-}
-
-/* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
- * 0=0V , 1=3.3V
- */
-static inline void
-e100_rts(struct e100_serial *info, int set)
-{
-#ifndef CONFIG_SVINTO_SIM
- unsigned long flags;
- save_flags(flags);
- cli();
- info->rx_ctrl &= ~E100_RTS_MASK;
- info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
- info->port[REG_REC_CTRL] = info->rx_ctrl;
- restore_flags(flags);
-#ifdef SERIAL_DEBUG_IO
- printk("ser%i rts %i\n", info->line, set);
-#endif
-#endif
-}
-
-
-/* If this behaves as a modem, RI and CD is an output */
-static inline void
-e100_ri_out(struct e100_serial *info, int set)
-{
-#ifndef CONFIG_SVINTO_SIM
- /* RI is active low */
- {
- unsigned char mask = e100_modem_pins[info->line].ri_mask;
- unsigned long flags;
-
- save_flags(flags);
- cli();
- *e100_modem_pins[info->line].ri_shadow &= ~mask;
- *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
- *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
- restore_flags(flags);
- }
-#endif
-}
-static inline void
-e100_cd_out(struct e100_serial *info, int set)
-{
-#ifndef CONFIG_SVINTO_SIM
- /* CD is active low */
- {
- unsigned char mask = e100_modem_pins[info->line].cd_mask;
- unsigned long flags;
-
- save_flags(flags);
- cli();
- *e100_modem_pins[info->line].cd_shadow &= ~mask;
- *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
- *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
- restore_flags(flags);
- }
-#endif
-}
-
-static inline void
-e100_disable_rx(struct e100_serial *info)
-{
-#ifndef CONFIG_SVINTO_SIM
- /* disable the receiver */
- info->port[REG_REC_CTRL] =
- (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
-#endif
-}
-
-static inline void
-e100_enable_rx(struct e100_serial *info)
-{
-#ifndef CONFIG_SVINTO_SIM
- /* enable the receiver */
- info->port[REG_REC_CTRL] =
- (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
-#endif
-}
-
-/* the rx DMA uses both the dma_descr and the dma_eop interrupts */
-
-static inline void
-e100_disable_rxdma_irq(struct e100_serial *info)
-{
-#ifdef SERIAL_DEBUG_INTR
- printk("rxdma_irq(%d): 0\n",info->line);
-#endif
- DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
- *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
-}
-
-static inline void
-e100_enable_rxdma_irq(struct e100_serial *info)
-{
-#ifdef SERIAL_DEBUG_INTR
- printk("rxdma_irq(%d): 1\n",info->line);
-#endif
- DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
- *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
-}
-
-/* the tx DMA uses only dma_descr interrupt */
-
-static _INLINE_ void
-e100_disable_txdma_irq(struct e100_serial *info)
-{
-#ifdef SERIAL_DEBUG_INTR
- printk("txdma_irq(%d): 0\n",info->line);
-#endif
- DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
- *R_IRQ_MASK2_CLR = info->irq;
-}
-
-static _INLINE_ void
-e100_enable_txdma_irq(struct e100_serial *info)
-{
-#ifdef SERIAL_DEBUG_INTR
- printk("txdma_irq(%d): 1\n",info->line);
-#endif
- DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
- *R_IRQ_MASK2_SET = info->irq;
-}
-
-static _INLINE_ void
-e100_disable_txdma_channel(struct e100_serial *info)
-{
- unsigned long flags;
-
- /* Disable output DMA channel for the serial port in question
- * ( set to something other then serialX)
- */
- save_flags(flags);
- cli();
- DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
- if (info->line == 0) {
- if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
- IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
- }
- } else if (info->line == 1) {
- if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
- IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
- }
- } else if (info->line == 2) {
- if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
- IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
- }
- } else if (info->line == 3) {
- if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
- IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
- }
- }
- *R_GEN_CONFIG = genconfig_shadow;
- restore_flags(flags);
-}
-
-
-static _INLINE_ void
-e100_enable_txdma_channel(struct e100_serial *info)
-{
- unsigned long flags;
-
- save_flags(flags);
- cli();
- DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
- /* Enable output DMA channel for the serial port in question */
- if (info->line == 0) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
- } else if (info->line == 1) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
- } else if (info->line == 2) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
- } else if (info->line == 3) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
- }
- *R_GEN_CONFIG = genconfig_shadow;
- restore_flags(flags);
-}
-
-static _INLINE_ void
-e100_disable_rxdma_channel(struct e100_serial *info)
-{
- unsigned long flags;
-
- /* Disable input DMA channel for the serial port in question
- * ( set to something other then serialX)
- */
- save_flags(flags);
- cli();
- if (info->line == 0) {
- if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
- IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
- }
- } else if (info->line == 1) {
- if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
- IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
- }
- } else if (info->line == 2) {
- if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
- IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
- }
- } else if (info->line == 3) {
- if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
- IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
- }
- }
- *R_GEN_CONFIG = genconfig_shadow;
- restore_flags(flags);
-}
-
-
-static _INLINE_ void
-e100_enable_rxdma_channel(struct e100_serial *info)
-{
- unsigned long flags;
-
- save_flags(flags);
- cli();
- /* Enable input DMA channel for the serial port in question */
- if (info->line == 0) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
- } else if (info->line == 1) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
- } else if (info->line == 2) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
- } else if (info->line == 3) {
- genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
- genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
- }
- *R_GEN_CONFIG = genconfig_shadow;
- restore_flags(flags);
-}
-
-#ifdef SERIAL_HANDLE_EARLY_ERRORS
-/* in order to detect and fix errors on the first byte
- we have to use the serial interrupts as well. */
-
-static inline void
-e100_disable_serial_data_irq(struct e100_serial *info)
-{
-#ifdef SERIAL_DEBUG_INTR
- printk("ser_irq(%d): 0\n",info->line);
-#endif
- DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
- *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
-}
-
-static inline void
-e100_enable_serial_data_irq(struct e100_serial *info)
-{
-#ifdef SERIAL_DEBUG_INTR
- printk("ser_irq(%d): 1\n",info->line);
- printk("**** %d = %d\n",
- (8+2*info->line),
- (1U << (8+2*info->line)));
-#endif
- DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
- *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
-}
-#endif
-
-static inline void
-e100_disable_serial_tx_ready_irq(struct e100_serial *info)
-{
-#ifdef SERIAL_DEBUG_INTR
- printk("ser_tx_irq(%d): 0\n",info->line);
-#endif
- DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
- *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
-}
-
-static inline void
-e100_enable_serial_tx_ready_irq(struct e100_serial *info)
-{
-#ifdef SERIAL_DEBUG_INTR
- printk("ser_tx_irq(%d): 1\n",info->line);
- printk("**** %d = %d\n",
- (8+1+2*info->line),
- (1U << (8+1+2*info->line)));
-#endif
- DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
- *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
-}
-
-static inline void e100_enable_rx_irq(struct e100_serial *info)
-{
- if (info->uses_dma_in)
- e100_enable_rxdma_irq(info);
- else
- e100_enable_serial_data_irq(info);
-}
-static inline void e100_disable_rx_irq(struct e100_serial *info)
-{
- if (info->uses_dma_in)
- e100_disable_rxdma_irq(info);
- else
- e100_disable_serial_data_irq(info);
-}
-
-#if defined(CONFIG_ETRAX_RS485)
-/* Enable RS-485 mode on selected port. This is UGLY. */
-static int
-e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r)
-{
- struct e100_serial * info = (struct e100_serial *)tty->driver_data;
-
-#if defined(CONFIG_ETRAX_RS485_ON_PA)
- *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
-#endif
-#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
- REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
- rs485_port_g_bit, 1);
-#endif
-#if defined(CONFIG_ETRAX_RS485_LTC1387)
- REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
- CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
- REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
- CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
-#endif
-
- info->rs485.rts_on_send = 0x01 & r->rts_on_send;
- info->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
- if (r->delay_rts_before_send >= 1000)
- info->rs485.delay_rts_before_send = 1000;
- else
- info->rs485.delay_rts_before_send = r->delay_rts_before_send;
- info->rs485.enabled = r->enabled;
-/* printk("rts: on send = %i, after = %i, enabled = %i",
- info->rs485.rts_on_send,
- info->rs485.rts_after_sent,
- info->rs485.enabled
- );
-*/
- return 0;
-}
-
-static int
-e100_write_rs485(struct tty_struct *tty, int from_user,
- const unsigned char *buf, int count)
-{
- struct e100_serial * info = (struct e100_serial *)tty->driver_data;
- int old_enabled = info->rs485.enabled;
-
- /* rs485 is always implicitly enabled if we're using the ioctl()
- * but it doesn't have to be set in the rs485_control
- * (to be backward compatible with old apps)
- * So we store, set and restore it.
- */
- info->rs485.enabled = 1;
- /* rs_write now deals with RS485 if enabled */
- count = rs_write(tty, from_user, buf, count);
- info->rs485.enabled = old_enabled;
- return count;
-}
-
-#ifdef CONFIG_ETRAX_FAST_TIMER
-/* Timer function to toggle RTS when using FAST_TIMER */
-static void rs485_toggle_rts_timer_function(unsigned long data)
-{
- struct e100_serial *info = (struct e100_serial *)data;
-
- fast_timers_rs485[info->line].function = NULL;
- e100_rts(info, info->rs485.rts_after_sent);
-#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
- e100_enable_rx(info);
- e100_enable_rx_irq(info);
-#endif
-}
-#endif
-#endif /* CONFIG_ETRAX_RS485 */
-
-/*
- * ------------------------------------------------------------
- * rs_stop() and rs_start()
- *
- * This routines are called before setting or resetting tty->stopped.
- * They enable or disable transmitter using the XOFF registers, as necessary.
- * ------------------------------------------------------------
- */
-
-static void
-rs_stop(struct tty_struct *tty)
-{
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
- if (info) {
- unsigned long flags;
- unsigned long xoff;
-
- save_flags(flags); cli();
- DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
- CIRC_CNT(info->xmit.head,
- info->xmit.tail,SERIAL_XMIT_SIZE)));
-
- xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
- xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
- if (tty->termios->c_iflag & IXON ) {
- xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
- }
-
- *((unsigned long *)&info->port[REG_XOFF]) = xoff;
- restore_flags(flags);
- }
-}
-
-static void
-rs_start(struct tty_struct *tty)
-{
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
- if (info) {
- unsigned long flags;
- unsigned long xoff;
-
- save_flags(flags); cli();
- DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
- CIRC_CNT(info->xmit.head,
- info->xmit.tail,SERIAL_XMIT_SIZE)));
- xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
- xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
- if (tty->termios->c_iflag & IXON ) {
- xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
- }
-
- *((unsigned long *)&info->port[REG_XOFF]) = xoff;
- if (!info->uses_dma_out &&
- info->xmit.head != info->xmit.tail && info->xmit.buf)
- e100_enable_serial_tx_ready_irq(info);
-
- restore_flags(flags);
- }
-}
-
-/*
- * ----------------------------------------------------------------------
- *
- * Here starts the interrupt handling routines. All of the following
- * subroutines are declared as inline and are folded into
- * rs_interrupt(). They were separated out for readability's sake.
- *
- * Note: rs_interrupt() is a "fast" interrupt, which means that it
- * runs with interrupts turned off. People who may want to modify
- * rs_interrupt() should try to keep the interrupt handler as fast as
- * possible. After you are done making modifications, it is not a bad
- * idea to do:
- *
- * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
- *
- * and look at the resulting assemble code in serial.s.
- *
- * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
- * -----------------------------------------------------------------------
- */
-
-/*
- * This routine is used by the interrupt handler to schedule
- * processing in the software interrupt portion of the driver.
- */
-static _INLINE_ void
-rs_sched_event(struct e100_serial *info,
- int event)
-{
- if (info->event & (1 << event))
- return;
- info->event |= 1 << event;
- schedule_work(&info->work);
-}
-
-/* The output DMA channel is free - use it to send as many chars as possible
- * NOTES:
- * We don't pay attention to info->x_char, which means if the TTY wants to
- * use XON/XOFF it will set info->x_char but we won't send any X char!
- *
- * To implement this, we'd just start a DMA send of 1 byte pointing at a
- * buffer containing the X char, and skip updating xmit. We'd also have to
- * check if the last sent char was the X char when we enter this function
- * the next time, to avoid updating xmit with the sent X value.
- */
-
-static void
-transmit_chars_dma(struct e100_serial *info)
-{
- unsigned int c, sentl;
- struct etrax_dma_descr *descr;
-
-#ifdef CONFIG_SVINTO_SIM
- /* This will output too little if tail is not 0 always since
- * we don't reloop to send the other part. Anyway this SHOULD be a
- * no-op - transmit_chars_dma would never really be called during sim
- * since rs_write does not write into the xmit buffer then.
- */
- if (info->xmit.tail)
- printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
- if (info->xmit.head != info->xmit.tail) {
- SIMCOUT(info->xmit.buf + info->xmit.tail,
- CIRC_CNT(info->xmit.head,
- info->xmit.tail,
- SERIAL_XMIT_SIZE));
- info->xmit.head = info->xmit.tail; /* move back head */
- info->tr_running = 0;
- }
- return;
-#endif
- /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
- *info->oclrintradr =
- IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
- IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
-
-#ifdef SERIAL_DEBUG_INTR
- if (info->line == SERIAL_DEBUG_LINE)
- printk("tc\n");
-#endif
- if (!info->tr_running) {
- /* weirdo... we shouldn't get here! */
- printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
- return;
- }
-
- descr = &info->tr_descr;
-
- /* first get the amount of bytes sent during the last DMA transfer,
- and update xmit accordingly */
-
- /* if the stop bit was not set, all data has been sent */
- if (!(descr->status & d_stop)) {
- sentl = descr->sw_len;
- } else
- /* otherwise we find the amount of data sent here */
- sentl = descr->hw_len;
-
- DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
-
- /* update stats */
- info->icount.tx += sentl;
-
- /* update xmit buffer */
- info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
-
- /* if there is only a few chars left in the buf, wake up the blocked
- write if any */
- if (CIRC_CNT(info->xmit.head,
- info->xmit.tail,
- SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
- rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
-
- /* find out the largest amount of consecutive bytes we want to send now */
-
- c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
-
- /* Don't send all in one DMA transfer - divide it so we wake up
- * application before all is sent
- */
-
- if (c >= 4*WAKEUP_CHARS)
- c = c/2;
-
- if (c <= 0) {
- /* our job here is done, don't schedule any new DMA transfer */
- info->tr_running = 0;
-
-#if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
- if (info->rs485.enabled) {
- /* Set a short timer to toggle RTS */
- start_one_shot_timer(&fast_timers_rs485[info->line],
- rs485_toggle_rts_timer_function,
- (unsigned long)info,
- info->char_time_usec*2,
- "RS-485");
- }
-#endif /* RS485 */
- return;
- }
-
- /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
- /* set up the descriptor correctly for output */
- DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
- descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
- descr->sw_len = c;
- descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
- descr->status = 0;
-
- *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
- *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
-
- /* DMA is now running (hopefully) */
-} /* transmit_chars_dma */
-
-static void
-start_transmit(struct e100_serial *info)
-{
-#if 0
- if (info->line == SERIAL_DEBUG_LINE)
- printk("x\n");
-#endif
-
- info->tr_descr.sw_len = 0;
- info->tr_descr.hw_len = 0;
- info->tr_descr.status = 0;
- info->tr_running = 1;
- if (info->uses_dma_out)
- transmit_chars_dma(info);
- else
- e100_enable_serial_tx_ready_irq(info);
-} /* start_transmit */
-
-#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
-static int serial_fast_timer_started = 0;
-static int serial_fast_timer_expired = 0;
-static void flush_timeout_function(unsigned long data);
-#define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
- unsigned long timer_flags; \
- save_flags(timer_flags); \
- cli(); \
- if (fast_timers[info->line].function == NULL) { \
- serial_fast_timer_started++; \
- TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
- TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
- start_one_shot_timer(&fast_timers[info->line], \
- flush_timeout_function, \
- (unsigned long)info, \
- (usec), \
- string); \
- } \
- else { \
- TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
- } \
- restore_flags(timer_flags); \
-}
-#define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
-
-#else
-#define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
-#define START_FLUSH_FAST_TIMER(info, string)
-#endif
-
-static struct etrax_recv_buffer *
-alloc_recv_buffer(unsigned int size)
-{
- struct etrax_recv_buffer *buffer;
-
- if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
- return NULL;
-
- buffer->next = NULL;
- buffer->length = 0;
- buffer->error = TTY_NORMAL;
-
- return buffer;
-}
-
-static void
-append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
-{
- unsigned long flags;
-
- save_flags(flags);
- cli();
-
- if (!info->first_recv_buffer)
- info->first_recv_buffer = buffer;
- else
- info->last_recv_buffer->next = buffer;
-
- info->last_recv_buffer = buffer;
-
- info->recv_cnt += buffer->length;
- if (info->recv_cnt > info->max_recv_cnt)
- info->max_recv_cnt = info->recv_cnt;
-
- restore_flags(flags);
-}
-
-static int
-add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
-{
- struct etrax_recv_buffer *buffer;
- if (info->uses_dma_in) {
- if (!(buffer = alloc_recv_buffer(4)))
- return 0;
-
- buffer->length = 1;
- buffer->error = flag;
- buffer->buffer[0] = data;
-
- append_recv_buffer(info, buffer);
-
- info->icount.rx++;
- } else {
- struct tty_struct *tty = info->tty;
- *tty->flip.char_buf_ptr = data;
- *tty->flip.flag_buf_ptr = flag;
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- tty->flip.count++;
- info->icount.rx++;
- }
-
- return 1;
-}
-
-extern _INLINE_ unsigned int
-handle_descr_data(struct e100_serial *info, struct etrax_dma_descr *descr, unsigned int recvl)
-{
- struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
-
- if (info->recv_cnt + recvl > 65536) {
- printk(KERN_CRIT
- "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__, recvl);
- return 0;
- }
-
- buffer->length = recvl;
-
- if (info->errorcode == ERRCODE_SET_BREAK)
- buffer->error = TTY_BREAK;
- info->errorcode = 0;
-
- append_recv_buffer(info, buffer);
-
- if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
- panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
-
- descr->buf = virt_to_phys(buffer->buffer);
-
- return recvl;
-}
-
-static _INLINE_ unsigned int
-handle_all_descr_data(struct e100_serial *info)
-{
- struct etrax_dma_descr *descr;
- unsigned int recvl;
- unsigned int ret = 0;
-
- while (1)
- {
- descr = &info->rec_descr[info->cur_rec_descr];
-
- if (descr == phys_to_virt(*info->idescradr))
- break;
-
- if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
- info->cur_rec_descr = 0;
-
- /* find out how many bytes were read */
-
- /* if the eop bit was not set, all data has been received */
- if (!(descr->status & d_eop)) {
- recvl = descr->sw_len;
- } else {
- /* otherwise we find the amount of data received here */
- recvl = descr->hw_len;
- }
-
- /* Reset the status information */
- descr->status = 0;
-
- DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
- if (info->tty->stopped) {
- unsigned char *buf = phys_to_virt(descr->buf);
- DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
- DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
- DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
- }
- );
-
- /* update stats */
- info->icount.rx += recvl;
-
- ret += handle_descr_data(info, descr, recvl);
- }
-
- return ret;
-}
-
-static _INLINE_ void
-receive_chars_dma(struct e100_serial *info)
-{
- struct tty_struct *tty;
- unsigned char rstat;
-
-#ifdef CONFIG_SVINTO_SIM
- /* No receive in the simulator. Will probably be when the rest of
- * the serial interface works, and this piece will just be removed.
- */
- return;
-#endif
-
- /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
- *info->iclrintradr =
- IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
- IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
-
- tty = info->tty;
- if (!tty) /* Something wrong... */
- return;
-
-#ifdef SERIAL_HANDLE_EARLY_ERRORS
- if (info->uses_dma_in)
- e100_enable_serial_data_irq(info);
-#endif
-
- if (info->errorcode == ERRCODE_INSERT_BREAK)
- add_char_and_flag(info, '\0', TTY_BREAK);
-
- handle_all_descr_data(info);
-
- /* Read the status register to detect errors */
- rstat = info->port[REG_STATUS];
- if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
- DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
- }
-
- if (rstat & SER_ERROR_MASK) {
- /* If we got an error, we must reset it by reading the
- * data_in field
- */
- unsigned char data = info->port[REG_DATA];
-
- PROCSTAT(ser_stat[info->line].errors_cnt++);
- DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
- ((rstat & SER_ERROR_MASK) << 8) | data);
-
- if (rstat & SER_PAR_ERR_MASK)
- add_char_and_flag(info, data, TTY_PARITY);
- else if (rstat & SER_OVERRUN_MASK)
- add_char_and_flag(info, data, TTY_OVERRUN);
- else if (rstat & SER_FRAMING_ERR_MASK)
- add_char_and_flag(info, data, TTY_FRAME);
- }
-
- START_FLUSH_FAST_TIMER(info, "receive_chars");
-
- /* Restart the receiving DMA */
- *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
-}
-
-static _INLINE_ int
-start_recv_dma(struct e100_serial *info)
-{
- struct etrax_dma_descr *descr = info->rec_descr;
- struct etrax_recv_buffer *buffer;
- int i;
-
- /* Set up the receiving descriptors */
- for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
- if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
- panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
-
- descr[i].ctrl = d_int;
- descr[i].buf = virt_to_phys(buffer->buffer);
- descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
- descr[i].hw_len = 0;
- descr[i].status = 0;
- descr[i].next = virt_to_phys(&descr[i+1]);
- }
-
- /* Link the last descriptor to the first */
- descr[i-1].next = virt_to_phys(&descr[0]);
-
- /* Start with the first descriptor in the list */
- info->cur_rec_descr = 0;
-
- /* Start the DMA */
- *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
- *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
-
- /* Input DMA should be running now */
- return 1;
-}
-
-static void
-start_receive(struct e100_serial *info)
-{
-#ifdef CONFIG_SVINTO_SIM
- /* No receive in the simulator. Will probably be when the rest of
- * the serial interface works, and this piece will just be removed.
- */
- return;
-#endif
- info->tty->flip.count = 0;
- if (info->uses_dma_in) {
- /* reset the input dma channel to be sure it works */
-
- *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
- while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
- IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
-
- start_recv_dma(info);
- }
-}
-
-
-static _INLINE_ void
-status_handle(struct e100_serial *info, unsigned short status)
-{
-}
-
-/* the bits in the MASK2 register are laid out like this:
- DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
- where I is the input channel and O is the output channel for the port.
- info->irq is the bit number for the DMAO_DESCR so to check the others we
- shift info->irq to the left.
-*/
-
-/* dma output channel interrupt handler
- this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
- DMA8(ser1) when they have finished a descriptor with the intr flag set.
-*/
-
-static irqreturn_t
-tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-{
- struct e100_serial *info;
- unsigned long ireg;
- int i;
- int handled = 0;
-
-#ifdef CONFIG_SVINTO_SIM
- /* No receive in the simulator. Will probably be when the rest of
- * the serial interface works, and this piece will just be removed.
- */
- {
- const char *s = "What? tr_interrupt in simulator??\n";
- SIMCOUT(s,strlen(s));
- }
- return IRQ_HANDLED;
-#endif
-
- /* find out the line that caused this irq and get it from rs_table */
-
- ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
-
- for (i = 0; i < NR_PORTS; i++) {
- info = rs_table + i;
- if (!info->enabled || !info->uses_dma_out)
- continue;
- /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
- if (ireg & info->irq) {
- handled = 1;
- /* we can send a new dma bunch. make it so. */
- DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
- /* Read jiffies_usec first,
- * we want this time to be as late as possible
- */
- PROCSTAT(ser_stat[info->line].tx_dma_ints++);
- info->last_tx_active_usec = GET_JIFFIES_USEC();
- info->last_tx_active = jiffies;
- transmit_chars_dma(info);
- }
-
- /* FIXME: here we should really check for a change in the
- status lines and if so call status_handle(info) */
- }
- return IRQ_RETVAL(handled);
-} /* tr_interrupt */
-
-/* dma input channel interrupt handler */
-
-static irqreturn_t
-rec_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-{
- struct e100_serial *info;
- unsigned long ireg;
- int i;
- int handled = 0;
-
-#ifdef CONFIG_SVINTO_SIM
- /* No receive in the simulator. Will probably be when the rest of
- * the serial interface works, and this piece will just be removed.
- */
- {
- const char *s = "What? rec_interrupt in simulator??\n";
- SIMCOUT(s,strlen(s));
- }
- return IRQ_HANDLED;
-#endif
-
- /* find out the line that caused this irq and get it from rs_table */
-
- ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
-
- for (i = 0; i < NR_PORTS; i++) {
- info = rs_table + i;
- if (!info->enabled || !info->uses_dma_in)
- continue;
- /* check for both dma_eop and dma_descr for the input dma channel */
- if (ireg & ((info->irq << 2) | (info->irq << 3))) {
- handled = 1;
- /* we have received something */
- receive_chars_dma(info);
- }
-
- /* FIXME: here we should really check for a change in the
- status lines and if so call status_handle(info) */
- }
- return IRQ_RETVAL(handled);
-} /* rec_interrupt */
-
-static _INLINE_ int
-force_eop_if_needed(struct e100_serial *info)
-{
- /* We check data_avail bit to determine if data has
- * arrived since last time
- */
- unsigned char rstat = info->port[REG_STATUS];
-
- /* error or datavail? */
- if (rstat & SER_ERROR_MASK) {
- /* Some error has occurred. If there has been valid data, an
- * EOP interrupt will be made automatically. If no data, the
- * normal ser_interrupt should be enabled and handle it.
- * So do nothing!
- */
- DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
- rstat | (info->line << 8));
- return 0;
- }
-
- if (rstat & SER_DATA_AVAIL_MASK) {
- /* Ok data, no error, count it */
- TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
- rstat | (info->line << 8)));
- /* Read data to clear status flags */
- (void)info->port[REG_DATA];
-
- info->forced_eop = 0;
- START_FLUSH_FAST_TIMER(info, "magic");
- return 0;
- }
-
- /* hit the timeout, force an EOP for the input
- * dma channel if we haven't already
- */
- if (!info->forced_eop) {
- info->forced_eop = 1;
- PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
- TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
- FORCE_EOP(info);
- }
-
- return 1;
-}
-
-extern _INLINE_ void
-flush_to_flip_buffer(struct e100_serial *info)
-{
- struct tty_struct *tty;
- struct etrax_recv_buffer *buffer;
- unsigned int length;
- unsigned long flags;
- int max_flip_size;
-
- if (!info->first_recv_buffer)
- return;
-
- save_flags(flags);
- cli();
-
- if (!(tty = info->tty)) {
- restore_flags(flags);
- return;
- }
-
- length = tty->flip.count;
- /* Don't flip more than the ldisc has room for.
- * The return value from ldisc.receive_room(tty) - might not be up to
- * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the
- * processed and not accounted for yet.
- * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way.
- * Lets buffer data here and let flow control take care of it.
- * Since we normally flip large chunks, the ldisc don't react
- * with throttle until too late if we flip to much.
- */
- max_flip_size = tty->ldisc.receive_room(tty);
- if (max_flip_size < 0)
- max_flip_size = 0;
- if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
- length + info->recv_cnt + /* We have this queued */
- 2*SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
- TTY_THRESHOLD_THROTTLE)) { /* Some slack */
- /* check TTY_THROTTLED first so it indicates our state */
- if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
- DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles room %lu\n", max_flip_size));
- rs_throttle(tty);
- }
-#if 0
- else if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
- length + info->recv_cnt + /* We have this queued */
- SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
- TTY_THRESHOLD_THROTTLE)) { /* Some slack */
- DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles again! %lu\n", max_flip_size));
- rs_throttle(tty);
- }
-#endif
- }
-
- if (max_flip_size > TTY_FLIPBUF_SIZE)
- max_flip_size = TTY_FLIPBUF_SIZE;
-
- while ((buffer = info->first_recv_buffer) && length < max_flip_size) {
- unsigned int count = buffer->length;
-
- if (length + count > max_flip_size)
- count = max_flip_size - length;
-
- memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count);
- memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count);
- tty->flip.flag_buf_ptr[length] = buffer->error;
-
- length += count;
- info->recv_cnt -= count;
- DFLIP(DEBUG_LOG(info->line,"flip: %i\n", length));
-
- if (count == buffer->length) {
- info->first_recv_buffer = buffer->next;
- kfree(buffer);
- } else {
- buffer->length -= count;
- memmove(buffer->buffer, buffer->buffer + count, buffer->length);
- buffer->error = TTY_NORMAL;
- }
- }
-
- if (!info->first_recv_buffer)
- info->last_recv_buffer = NULL;
-
- tty->flip.count = length;
- DFLIP(if (tty->ldisc.chars_in_buffer(tty) > 3500) {
- DEBUG_LOG(info->line, "ldisc %lu\n",
- tty->ldisc.chars_in_buffer(tty));
- DEBUG_LOG(info->line, "flip.count %lu\n",
- tty->flip.count);
- }
- );
- restore_flags(flags);
-
- DFLIP(
- if (1) {
-
- if (test_bit(TTY_DONT_FLIP, &tty->flags)) {
- DEBUG_LOG(info->line, "*** TTY_DONT_FLIP set flip.count %i ***\n", tty->flip.count);
- DEBUG_LOG(info->line, "*** recv_cnt %i\n", info->recv_cnt);
- } else {
- }
- DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx);
- DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty));
- DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty));
- }
-
- );
-
- /* this includes a check for low-latency */
- tty_flip_buffer_push(tty);
-}
-
-static _INLINE_ void
-check_flush_timeout(struct e100_serial *info)
-{
- /* Flip what we've got (if we can) */
- flush_to_flip_buffer(info);
-
- /* We might need to flip later, but not to fast
- * since the system is busy processing input... */
- if (info->first_recv_buffer)
- START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
-
- /* Force eop last, since data might have come while we're processing
- * and if we started the slow timer above, we won't start a fast
- * below.
- */
- force_eop_if_needed(info);
-}
-
-#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
-static void flush_timeout_function(unsigned long data)
-{
- struct e100_serial *info = (struct e100_serial *)data;
-
- fast_timers[info->line].function = NULL;
- serial_fast_timer_expired++;
- TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
- TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
- check_flush_timeout(info);
-}
-
-#else
-
-/* dma fifo/buffer timeout handler
- forces an end-of-packet for the dma input channel if no chars
- have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
-*/
-
-static struct timer_list flush_timer;
-
-static void
-timed_flush_handler(unsigned long ptr)
-{
- struct e100_serial *info;
- int i;
-
-#ifdef CONFIG_SVINTO_SIM
- return;
-#endif
-
- for (i = 0; i < NR_PORTS; i++) {
- info = rs_table + i;
- if (info->uses_dma_in)
- check_flush_timeout(info);
- }
-
- /* restart flush timer */
- mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
-}
-#endif
-
-#ifdef SERIAL_HANDLE_EARLY_ERRORS
-
-/* If there is an error (ie break) when the DMA is running and
- * there are no bytes in the fifo the DMA is stopped and we get no
- * eop interrupt. Thus we have to monitor the first bytes on a DMA
- * transfer, and if it is without error we can turn the serial
- * interrupts off.
- */
-
-/*
-BREAK handling on ETRAX 100:
-ETRAX will generate interrupt although there is no stop bit between the
-characters.
-
-Depending on how long the break sequence is, the end of the breaksequence
-will look differently:
-| indicates start/end of a character.
-
-B= Break character (0x00) with framing error.
-E= Error byte with parity error received after B characters.
-F= "Faked" valid byte received immediately after B characters.
-V= Valid byte
-
-1.
- B BL ___________________________ V
-.._|__________|__________| |valid data |
-
-Multiple frame errors with data == 0x00 (B),
-the timing matches up "perfectly" so no extra ending char is detected.
-The RXD pin is 1 in the last interrupt, in that case
-we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
-know if another byte will come and this really is case 2. below
-(e.g F=0xFF or 0xFE)
-If RXD pin is 0 we can expect another character (see 2. below).
-
-
-2.
-
- B B E or F__________________..__ V
-.._|__________|__________|______ | |valid data
- "valid" or
- parity error
-
-Multiple frame errors with data == 0x00 (B),
-but the part of the break trigs is interpreted as a start bit (and possibly
-some 0 bits followed by a number of 1 bits and a stop bit).
-Depending on parity settings etc. this last character can be either
-a fake "valid" char (F) or have a parity error (E).
-
-If the character is valid it will be put in the buffer,
-we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
-will set the flags so the tty will handle it,
-if it's an error byte it will not be put in the buffer
-and we set info->errorcode = ERRCODE_INSERT_BREAK.
-
-To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
-of the last faulty char (B) and compares it with the current time:
-If the time elapsed time is less then 2*char_time_usec we will assume
-it's a faked F char and not a Valid char and set
-info->errorcode = ERRCODE_SET_BREAK.
-
-Flaws in the above solution:
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-We use the timer to distinguish a F character from a V character,
-if a V character is to close after the break we might make the wrong decision.
-
-TODO: The break will be delayed until an F or V character is received.
-
-*/
-
-extern _INLINE_
-struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
-{
- unsigned long data_read;
- struct tty_struct *tty = info->tty;
-
- if (!tty) {
- printk("!NO TTY!\n");
- return info;
- }
- if (tty->flip.count >= TTY_FLIPBUF_SIZE - TTY_THRESHOLD_THROTTLE) {
- /* check TTY_THROTTLED first so it indicates our state */
- if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
- DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count));
- rs_throttle(tty);
- }
- }
- if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
- DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count);
- tty->flip.work.func((void *) tty);
- if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
- DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count);
- return info; /* if TTY_DONT_FLIP is set */
- }
- }
- /* Read data and status at the same time */
- data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
-more_data:
- if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
- DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
- }
- DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
-
- if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
- IO_MASK(R_SERIAL0_READ, par_err) |
- IO_MASK(R_SERIAL0_READ, overrun) )) {
- /* An error */
- info->last_rx_active_usec = GET_JIFFIES_USEC();
- info->last_rx_active = jiffies;
- DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
- DLOG_INT_TRIG(
- if (!log_int_trig1_pos) {
- log_int_trig1_pos = log_int_pos;
- log_int(rdpc(), 0, 0);
- }
- );
-
-
- if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
- (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
- /* Most likely a break, but we get interrupts over and
- * over again.
- */
-
- if (!info->break_detected_cnt) {
- DEBUG_LOG(info->line, "#BRK start\n", 0);
- }
- if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
- /* The RX pin is high now, so the break
- * must be over, but....
- * we can't really know if we will get another
- * last byte ending the break or not.
- * And we don't know if the byte (if any) will
- * have an error or look valid.
- */
- DEBUG_LOG(info->line, "# BL BRK\n", 0);
- info->errorcode = ERRCODE_INSERT_BREAK;
- }
- info->break_detected_cnt++;
- } else {
- /* The error does not look like a break, but could be
- * the end of one
- */
- if (info->break_detected_cnt) {
- DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
- info->errorcode = ERRCODE_INSERT_BREAK;
- } else {
- if (info->errorcode == ERRCODE_INSERT_BREAK) {
- info->icount.brk++;
- *tty->flip.char_buf_ptr = 0;
- *tty->flip.flag_buf_ptr = TTY_BREAK;
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- tty->flip.count++;
- info->icount.rx++;
- }
- *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
-
- if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
- info->icount.parity++;
- *tty->flip.flag_buf_ptr = TTY_PARITY;
- } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
- info->icount.overrun++;
- *tty->flip.flag_buf_ptr = TTY_OVERRUN;
- } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
- info->icount.frame++;
- *tty->flip.flag_buf_ptr = TTY_FRAME;
- }
- info->errorcode = 0;
- }
- info->break_detected_cnt = 0;
- }
- } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
- /* No error */
- DLOG_INT_TRIG(
- if (!log_int_trig1_pos) {
- if (log_int_pos >= log_int_size) {
- log_int_pos = 0;
- }
- log_int_trig0_pos = log_int_pos;
- log_int(rdpc(), 0, 0);
- }
- );
- *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
- *tty->flip.flag_buf_ptr = 0;
- } else {
- DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
- }
-
-
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- tty->flip.count++;
- info->icount.rx++;
- data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
- if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
- DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
- goto more_data;
- }
-
- tty_flip_buffer_push(info->tty);
- return info;
-}
-
-extern _INLINE_
-struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
-{
- unsigned char rstat;
-
-#ifdef SERIAL_DEBUG_INTR
- printk("Interrupt from serport %d\n", i);
-#endif
-/* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
- if (!info->uses_dma_in) {
- return handle_ser_rx_interrupt_no_dma(info);
- }
- /* DMA is used */
- rstat = info->port[REG_STATUS];
- if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
- DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
- }
-
- if (rstat & SER_ERROR_MASK) {
- unsigned char data;
-
- info->last_rx_active_usec = GET_JIFFIES_USEC();
- info->last_rx_active = jiffies;
- /* If we got an error, we must reset it by reading the
- * data_in field
- */
- data = info->port[REG_DATA];
- DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
- DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
- if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
- /* Most likely a break, but we get interrupts over and
- * over again.
- */
-
- if (!info->break_detected_cnt) {
- DEBUG_LOG(info->line, "#BRK start\n", 0);
- }
- if (rstat & SER_RXD_MASK) {
- /* The RX pin is high now, so the break
- * must be over, but....
- * we can't really know if we will get another
- * last byte ending the break or not.
- * And we don't know if the byte (if any) will
- * have an error or look valid.
- */
- DEBUG_LOG(info->line, "# BL BRK\n", 0);
- info->errorcode = ERRCODE_INSERT_BREAK;
- }
- info->break_detected_cnt++;
- } else {
- /* The error does not look like a break, but could be
- * the end of one
- */
- if (info->break_detected_cnt) {
- DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
- info->errorcode = ERRCODE_INSERT_BREAK;
- } else {
- if (info->errorcode == ERRCODE_INSERT_BREAK) {
- info->icount.brk++;
- add_char_and_flag(info, '\0', TTY_BREAK);
- }
-
- if (rstat & SER_PAR_ERR_MASK) {
- info->icount.parity++;
- add_char_and_flag(info, data, TTY_PARITY);
- } else if (rstat & SER_OVERRUN_MASK) {
- info->icount.overrun++;
- add_char_and_flag(info, data, TTY_OVERRUN);
- } else if (rstat & SER_FRAMING_ERR_MASK) {
- info->icount.frame++;
- add_char_and_flag(info, data, TTY_FRAME);
- }
-
- info->errorcode = 0;
- }
- info->break_detected_cnt = 0;
- DEBUG_LOG(info->line, "#iERR s d %04X\n",
- ((rstat & SER_ERROR_MASK) << 8) | data);
- }
- PROCSTAT(ser_stat[info->line].early_errors_cnt++);
- } else { /* It was a valid byte, now let the DMA do the rest */
- unsigned long curr_time_u = GET_JIFFIES_USEC();
- unsigned long curr_time = jiffies;
-
- if (info->break_detected_cnt) {
- /* Detect if this character is a new valid char or the
- * last char in a break sequence: If LSBits are 0 and
- * MSBits are high AND the time is close to the
- * previous interrupt we should discard it.
- */
- long elapsed_usec =
- (curr_time - info->last_rx_active) * (1000000/HZ) +
- curr_time_u - info->last_rx_active_usec;
- if (elapsed_usec < 2*info->char_time_usec) {
- DEBUG_LOG(info->line, "FBRK %i\n", info->line);
- /* Report as BREAK (error) and let
- * receive_chars_dma() handle it
- */
- info->errorcode = ERRCODE_SET_BREAK;
- } else {
- DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
- }
- DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
- }
-
-#ifdef SERIAL_DEBUG_INTR
- printk("** OK, disabling ser_interrupts\n");
-#endif
- e100_disable_serial_data_irq(info);
- DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
- info->break_detected_cnt = 0;
-
- PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
- }
- /* Restarting the DMA never hurts */
- *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
- START_FLUSH_FAST_TIMER(info, "ser_int");
- return info;
-} /* handle_ser_rx_interrupt */
-
-extern _INLINE_ void handle_ser_tx_interrupt(struct e100_serial *info)
-{
- unsigned long flags;
-
- if (info->x_char) {
- unsigned char rstat;
- DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
- save_flags(flags); cli();
- rstat = info->port[REG_STATUS];
- DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
-
- info->port[REG_TR_DATA] = info->x_char;
- info->icount.tx++;
- info->x_char = 0;
- /* We must enable since it is disabled in ser_interrupt */
- e100_enable_serial_tx_ready_irq(info);
- restore_flags(flags);
- return;
- }
- if (info->uses_dma_out) {
- unsigned char rstat;
- int i;
- /* We only use normal tx interrupt when sending x_char */
- DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
- save_flags(flags); cli();
- rstat = info->port[REG_STATUS];
- DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
- e100_disable_serial_tx_ready_irq(info);
- if (info->tty->stopped)
- rs_stop(info->tty);
- /* Enable the DMA channel and tell it to continue */
- e100_enable_txdma_channel(info);
- /* Wait 12 cycles before doing the DMA command */
- for(i = 6; i > 0; i--)
- nop();
-
- *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
- restore_flags(flags);
- return;
- }
- /* Normal char-by-char interrupt */
- if (info->xmit.head == info->xmit.tail
- || info->tty->stopped
- || info->tty->hw_stopped) {
- DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n", info->tty->stopped));
- e100_disable_serial_tx_ready_irq(info);
- info->tr_running = 0;
- return;
- }
- DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
- /* Send a byte, rs485 timing is critical so turn of ints */
- save_flags(flags); cli();
- info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
- info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
- info->icount.tx++;
- if (info->xmit.head == info->xmit.tail) {
-#if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
- if (info->rs485.enabled) {
- /* Set a short timer to toggle RTS */
- start_one_shot_timer(&fast_timers_rs485[info->line],
- rs485_toggle_rts_timer_function,
- (unsigned long)info,
- info->char_time_usec*2,
- "RS-485");
- }
-#endif /* RS485 */
- info->last_tx_active_usec = GET_JIFFIES_USEC();
- info->last_tx_active = jiffies;
- e100_disable_serial_tx_ready_irq(info);
- info->tr_running = 0;
- DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
- } else {
- /* We must enable since it is disabled in ser_interrupt */
- e100_enable_serial_tx_ready_irq(info);
- }
- restore_flags(flags);
-
- if (CIRC_CNT(info->xmit.head,
- info->xmit.tail,
- SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
- rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
-
-} /* handle_ser_tx_interrupt */
-
-/* result of time measurements:
- * RX duration 54-60 us when doing something, otherwise 6-9 us
- * ser_int duration: just sending: 8-15 us normally, up to 73 us
- */
-static irqreturn_t
-ser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- static volatile int tx_started = 0;
- struct e100_serial *info;
- int i;
- unsigned long flags;
- unsigned long irq_mask1_rd;
- unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
- int handled = 0;
- static volatile unsigned long reentered_ready_mask = 0;
-
- save_flags(flags); cli();
- irq_mask1_rd = *R_IRQ_MASK1_RD;
- /* First handle all rx interrupts with ints disabled */
- info = rs_table;
- irq_mask1_rd &= e100_ser_int_mask;
- for (i = 0; i < NR_PORTS; i++) {
- /* Which line caused the data irq? */
- if (irq_mask1_rd & data_mask) {
- handled = 1;
- handle_ser_rx_interrupt(info);
- }
- info += 1;
- data_mask <<= 2;
- }
- /* Handle tx interrupts with interrupts enabled so we
- * can take care of new data interrupts while transmitting
- * We protect the tx part with the tx_started flag.
- * We disable the tr_ready interrupts we are about to handle and
- * unblock the serial interrupt so new serial interrupts may come.
- *
- * If we get a new interrupt:
- * - it migth be due to synchronous serial ports.
- * - serial irq will be blocked by general irq handler.
- * - async data will be handled above (sync will be ignored).
- * - tx_started flag will prevent us from trying to send again and
- * we will exit fast - no need to unblock serial irq.
- * - Next (sync) serial interrupt handler will be runned with
- * disabled interrupt due to restore_flags() at end of function,
- * so sync handler will not be preempted or reentered.
- */
- if (!tx_started) {
- unsigned long ready_mask;
- unsigned long
- tx_started = 1;
- /* Only the tr_ready interrupts left */
- irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
- IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
- IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
- IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
- while (irq_mask1_rd) {
- /* Disable those we are about to handle */
- *R_IRQ_MASK1_CLR = irq_mask1_rd;
- /* Unblock the serial interrupt */
- *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
-
- sti();
- ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
- info = rs_table;
- for (i = 0; i < NR_PORTS; i++) {
- /* Which line caused the ready irq? */
- if (irq_mask1_rd & ready_mask) {
- handled = 1;
- handle_ser_tx_interrupt(info);
- }
- info += 1;
- ready_mask <<= 2;
- }
- /* handle_ser_tx_interrupt enables tr_ready interrupts */
- cli();
- /* Handle reentered TX interrupt */
- irq_mask1_rd = reentered_ready_mask;
- }
- cli();
- tx_started = 0;
- } else {
- unsigned long ready_mask;
- ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
- IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
- IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
- IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
- if (ready_mask) {
- reentered_ready_mask |= ready_mask;
- /* Disable those we are about to handle */
- *R_IRQ_MASK1_CLR = ready_mask;
- DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
- }
- }
-
- restore_flags(flags);
- return IRQ_RETVAL(handled);
-} /* ser_interrupt */
-#endif
-
-/*
- * -------------------------------------------------------------------
- * Here ends the serial interrupt routines.
- * -------------------------------------------------------------------
- */
-
-/*
- * This routine is used to handle the "bottom half" processing for the
- * serial driver, known also the "software interrupt" processing.
- * This processing is done at the kernel interrupt level, after the
- * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
- * is where time-consuming activities which can not be done in the
- * interrupt driver proper are done; the interrupt driver schedules
- * them using rs_sched_event(), and they get done here.
- */
-static void
-do_softint(void *private_)
-{
- struct e100_serial *info = (struct e100_serial *) private_;
- struct tty_struct *tty;
-
- tty = info->tty;
- if (!tty)
- return;
-
- if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
- wake_up_interruptible(&tty->write_wait);
- }
-}
-
-static int
-startup(struct e100_serial * info)
-{
- unsigned long flags;
- unsigned long xmit_page;
- int i;
-
- xmit_page = get_zeroed_page(GFP_KERNEL);
- if (!xmit_page)
- return -ENOMEM;
-
- save_flags(flags);
- cli();
-
- /* if it was already initialized, skip this */
-
- if (info->flags & ASYNC_INITIALIZED) {
- restore_flags(flags);
- free_page(xmit_page);
- return 0;
- }
-
- if (info->xmit.buf)
- free_page(xmit_page);
- else
- info->xmit.buf = (unsigned char *) xmit_page;
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
-#endif
-
-#ifdef CONFIG_SVINTO_SIM
- /* Bits and pieces collected from below. Better to have them
- in one ifdef:ed clause than to mix in a lot of ifdefs,
- right? */
- if (info->tty)
- clear_bit(TTY_IO_ERROR, &info->tty->flags);
-
- info->xmit.head = info->xmit.tail = 0;
- info->first_recv_buffer = info->last_recv_buffer = NULL;
- info->recv_cnt = info->max_recv_cnt = 0;
-
- for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
- info->rec_descr[i].buf = NULL;
-
- /* No real action in the simulator, but may set info important
- to ioctl. */
- change_speed(info);
-#else
-
- /*
- * Clear the FIFO buffers and disable them
- * (they will be reenabled in change_speed())
- */
-
- /*
- * Reset the DMA channels and make sure their interrupts are cleared
- */
-
- if (info->dma_in_enabled) {
- info->uses_dma_in = 1;
- e100_enable_rxdma_channel(info);
-
- *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
-
- /* Wait until reset cycle is complete */
- while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
- IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
-
- /* Make sure the irqs are cleared */
- *info->iclrintradr =
- IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
- IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
- } else {
- e100_disable_rxdma_channel(info);
- }
-
- if (info->dma_out_enabled) {
- info->uses_dma_out = 1;
- e100_enable_txdma_channel(info);
- *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
-
- while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
- IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
-
- /* Make sure the irqs are cleared */
- *info->oclrintradr =
- IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
- IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
- } else {
- e100_disable_txdma_channel(info);
- }
-
- if (info->tty)
- clear_bit(TTY_IO_ERROR, &info->tty->flags);
-
- info->xmit.head = info->xmit.tail = 0;
- info->first_recv_buffer = info->last_recv_buffer = NULL;
- info->recv_cnt = info->max_recv_cnt = 0;
-
- for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
- info->rec_descr[i].buf = 0;
-
- /*
- * and set the speed and other flags of the serial port
- * this will start the rx/tx as well
- */
-#ifdef SERIAL_HANDLE_EARLY_ERRORS
- e100_enable_serial_data_irq(info);
-#endif
- change_speed(info);
-
- /* dummy read to reset any serial errors */
-
- (void)info->port[REG_DATA];
-
- /* enable the interrupts */
- if (info->uses_dma_out)
- e100_enable_txdma_irq(info);
-
- e100_enable_rx_irq(info);
-
- info->tr_running = 0; /* to be sure we don't lock up the transmitter */
-
- /* setup the dma input descriptor and start dma */
-
- start_receive(info);
-
- /* for safety, make sure the descriptors last result is 0 bytes written */
-
- info->tr_descr.sw_len = 0;
- info->tr_descr.hw_len = 0;
- info->tr_descr.status = 0;
-
- /* enable RTS/DTR last */
-
- e100_rts(info, 1);
- e100_dtr(info, 1);
-
-#endif /* CONFIG_SVINTO_SIM */
-
- info->flags |= ASYNC_INITIALIZED;
-
- restore_flags(flags);
- return 0;
-}
-
-/*
- * This routine will shutdown a serial port; interrupts are disabled, and
- * DTR is dropped if the hangup on close termio flag is on.
- */
-static void
-shutdown(struct e100_serial * info)
-{
- unsigned long flags;
- struct etrax_dma_descr *descr = info->rec_descr;
- struct etrax_recv_buffer *buffer;
- int i;
-
-#ifndef CONFIG_SVINTO_SIM
- /* shut down the transmitter and receiver */
- DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
- e100_disable_rx(info);
- info->port[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
-
- /* disable interrupts, reset dma channels */
- if (info->uses_dma_in) {
- e100_disable_rxdma_irq(info);
- *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
- info->uses_dma_in = 0;
- } else {
- e100_disable_serial_data_irq(info);
- }
-
- if (info->uses_dma_out) {
- e100_disable_txdma_irq(info);
- info->tr_running = 0;
- *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
- info->uses_dma_out = 0;
- } else {
- e100_disable_serial_tx_ready_irq(info);
- info->tr_running = 0;
- }
-
-#endif /* CONFIG_SVINTO_SIM */
-
- if (!(info->flags & ASYNC_INITIALIZED))
- return;
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("Shutting down serial port %d (irq %d)....\n", info->line,
- info->irq);
-#endif
-
- save_flags(flags);
- cli(); /* Disable interrupts */
-
- if (info->xmit.buf) {
- free_page((unsigned long)info->xmit.buf);
- info->xmit.buf = NULL;
- }
-
- for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
- if (descr[i].buf) {
- buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
- kfree(buffer);
- descr[i].buf = 0;
- }
-
- if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
- /* hang up DTR and RTS if HUPCL is enabled */
- e100_dtr(info, 0);
- e100_rts(info, 0); /* could check CRTSCTS before doing this */
- }
-
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
-
- info->flags &= ~ASYNC_INITIALIZED;
- restore_flags(flags);
-}
-
-
-/* change baud rate and other assorted parameters */
-
-static void
-change_speed(struct e100_serial *info)
-{
- unsigned int cflag;
- unsigned long xoff;
- unsigned long flags;
- /* first some safety checks */
-
- if (!info->tty || !info->tty->termios)
- return;
- if (!info->port)
- return;
-
- cflag = info->tty->termios->c_cflag;
-
- /* possibly, the tx/rx should be disabled first to do this safely */
-
- /* change baud-rate and write it to the hardware */
- if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
- /* Special baudrate */
- u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
- unsigned long alt_source =
- IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
- IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
- /* R_ALT_SER_BAUDRATE selects the source */
- DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
- (unsigned long)info->baud_base, info->custom_divisor));
- if (info->baud_base == SERIAL_PRESCALE_BASE) {
- /* 0, 2-65535 (0=65536) */
- u16 divisor = info->custom_divisor;
- /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
- /* baudrate is 3.125MHz/custom_divisor */
- alt_source =
- IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
- IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
- alt_source = 0x11;
- DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
- *R_SERIAL_PRESCALE = divisor;
- info->baud = SERIAL_PRESCALE_BASE/divisor;
- }
-#ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
- else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
- info->custom_divisor == 1) ||
- (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
- info->custom_divisor == 8)) {
- /* ext_clk selected */
- alt_source =
- IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
- IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
- DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
- info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
- }
- }
-#endif
- else
- {
- /* Bad baudbase, we don't support using timer0
- * for baudrate.
- */
- printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
- (unsigned long)info->baud_base, info->custom_divisor);
- }
- r_alt_ser_baudrate_shadow &= ~mask;
- r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
- *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
- } else {
- /* Normal baudrate */
- /* Make sure we use normal baudrate */
- u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
- unsigned long alt_source =
- IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
- IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
- r_alt_ser_baudrate_shadow &= ~mask;
- r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
-#ifndef CONFIG_SVINTO_SIM
- *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
-#endif /* CONFIG_SVINTO_SIM */
-
- info->baud = cflag_to_baud(cflag);
-#ifndef CONFIG_SVINTO_SIM
- info->port[REG_BAUD] = cflag_to_etrax_baud(cflag);
-#endif /* CONFIG_SVINTO_SIM */
- }
-
-#ifndef CONFIG_SVINTO_SIM
- /* start with default settings and then fill in changes */
- save_flags(flags);
- cli();
- /* 8 bit, no/even parity */
- info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
- IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
- IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
-
- /* 8 bit, no/even parity, 1 stop bit, no cts */
- info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
- IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
- IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
- IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
- IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
-
- if ((cflag & CSIZE) == CS7) {
- /* set 7 bit mode */
- info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
- info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
- }
-
- if (cflag & CSTOPB) {
- /* set 2 stop bit mode */
- info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
- }
-
- if (cflag & PARENB) {
- /* enable parity */
- info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
- info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
- }
-
- if (cflag & CMSPAR) {
- /* enable stick parity, PARODD mean Mark which matches ETRAX */
- info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
- info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
- }
- if (cflag & PARODD) {
- /* set odd parity (or Mark if CMSPAR) */
- info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
- info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
- }
-
- if (cflag & CRTSCTS) {
- /* enable automatic CTS handling */
- DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
- info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
- }
-
- /* make sure the tx and rx are enabled */
-
- info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
- info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
-
- /* actually write the control regs to the hardware */
-
- info->port[REG_TR_CTRL] = info->tx_ctrl;
- info->port[REG_REC_CTRL] = info->rx_ctrl;
- xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
- xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
- if (info->tty->termios->c_iflag & IXON ) {
- DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n", STOP_CHAR(info->tty)));
- xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
- }
-
- *((unsigned long *)&info->port[REG_XOFF]) = xoff;
- restore_flags(flags);
-#endif /* !CONFIG_SVINTO_SIM */
-
- update_char_time(info);
-
-} /* change_speed */
-
-/* start transmitting chars NOW */
-
-static void
-rs_flush_chars(struct tty_struct *tty)
-{
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
- unsigned long flags;
-
- if (info->tr_running ||
- info->xmit.head == info->xmit.tail ||
- tty->stopped ||
- tty->hw_stopped ||
- !info->xmit.buf)
- return;
-
-#ifdef SERIAL_DEBUG_FLOW
- printk("rs_flush_chars\n");
-#endif
-
- /* this protection might not exactly be necessary here */
-
- save_flags(flags);
- cli();
- start_transmit(info);
- restore_flags(flags);
-}
-
-extern _INLINE_ int
-rs_raw_write(struct tty_struct * tty, int from_user,
- const unsigned char *buf, int count)
-{
- int c, ret = 0;
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
- unsigned long flags;
-
- /* first some sanity checks */
-
- if (!tty || !info->xmit.buf || !tmp_buf)
- return 0;
-
-#ifdef SERIAL_DEBUG_DATA
- if (info->line == SERIAL_DEBUG_LINE)
- printk("rs_raw_write (%d), status %d\n",
- count, info->port[REG_STATUS]);
-#endif
-
-#ifdef CONFIG_SVINTO_SIM
- /* Really simple. The output is here and now. */
- SIMCOUT(buf, count);
- return count;
-#endif
- save_flags(flags);
- DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
- DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
-
-
- /* the cli/restore_flags pairs below are needed because the
- * DMA interrupt handler moves the info->xmit values. the memcpy
- * needs to be in the critical region unfortunately, because we
- * need to read xmit values, memcpy, write xmit values in one
- * atomic operation... this could perhaps be avoided by more clever
- * design.
- */
- if (from_user) {
- down(&tmp_buf_sem);
- while (1) {
- int c1;
- c = CIRC_SPACE_TO_END(info->xmit.head,
- info->xmit.tail,
- SERIAL_XMIT_SIZE);
- if (count < c)
- c = count;
- if (c <= 0)
- break;
-
- c -= copy_from_user(tmp_buf, buf, c);
- if (!c) {
- if (!ret)
- ret = -EFAULT;
- break;
- }
- cli();
- c1 = CIRC_SPACE_TO_END(info->xmit.head,
- info->xmit.tail,
- SERIAL_XMIT_SIZE);
- if (c1 < c)
- c = c1;
- memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
- info->xmit.head = ((info->xmit.head + c) &
- (SERIAL_XMIT_SIZE-1));
- restore_flags(flags);
- buf += c;
- count -= c;
- ret += c;
- }
- up(&tmp_buf_sem);
- } else {
- cli();
- while (1) {
- c = CIRC_SPACE_TO_END(info->xmit.head,
- info->xmit.tail,
- SERIAL_XMIT_SIZE);
-
- if (count < c)
- c = count;
- if (c <= 0)
- break;
-
- memcpy(info->xmit.buf + info->xmit.head, buf, c);
- info->xmit.head = (info->xmit.head + c) &
- (SERIAL_XMIT_SIZE-1);
- buf += c;
- count -= c;
- ret += c;
- }
- restore_flags(flags);
- }
-
- /* enable transmitter if not running, unless the tty is stopped
- * this does not need IRQ protection since if tr_running == 0
- * the IRQ's are not running anyway for this port.
- */
- DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
-
- if (info->xmit.head != info->xmit.tail &&
- !tty->stopped &&
- !tty->hw_stopped &&
- !info->tr_running) {
- start_transmit(info);
- }
-
- return ret;
-} /* raw_raw_write() */
-
-static int
-rs_write(struct tty_struct * tty, int from_user,
- const unsigned char *buf, int count)
-{
-#if defined(CONFIG_ETRAX_RS485)
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
-
- if (info->rs485.enabled)
- {
- /* If we are in RS-485 mode, we need to toggle RTS and disable
- * the receiver before initiating a DMA transfer
- */
-#ifdef CONFIG_ETRAX_FAST_TIMER
- /* Abort any started timer */
- fast_timers_rs485[info->line].function = NULL;
- del_fast_timer(&fast_timers_rs485[info->line]);
-#endif
- e100_rts(info, info->rs485.rts_on_send);
-#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
- e100_disable_rx(info);
- e100_enable_rx_irq(info);
-#endif
-
- if (info->rs485.delay_rts_before_send > 0) {
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout((info->rs485.delay_rts_before_send * HZ)/1000);
- }
- }
-#endif /* CONFIG_ETRAX_RS485 */
-
- count = rs_raw_write(tty, from_user, buf, count);
-
-#if defined(CONFIG_ETRAX_RS485)
- if (info->rs485.enabled)
- {
- unsigned int val;
- /* If we are in RS-485 mode the following has to be done:
- * wait until DMA is ready
- * wait on transmit shift register
- * toggle RTS
- * enable the receiver
- */
-
- /* Sleep until all sent */
- tty_wait_until_sent(tty, 0);
-#ifdef CONFIG_ETRAX_FAST_TIMER
- /* Now sleep a little more so that shift register is empty */
- schedule_usleep(info->char_time_usec * 2);
-#endif
- /* wait on transmit shift register */
- do{
- get_lsr_info(info, &val);
- }while (!(val & TIOCSER_TEMT));
-
- e100_rts(info, info->rs485.rts_after_sent);
-
-#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
- e100_enable_rx(info);
- e100_enable_rxdma_irq(info);
-#endif
- }
-#endif /* CONFIG_ETRAX_RS485 */
-
- return count;
-} /* rs_write */
-
-
-/* how much space is available in the xmit buffer? */
-
-static int
-rs_write_room(struct tty_struct *tty)
-{
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
-
- return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
-}
-
-/* How many chars are in the xmit buffer?
- * This does not include any chars in the transmitter FIFO.
- * Use wait_until_sent for waiting for FIFO drain.
- */
-
-static int
-rs_chars_in_buffer(struct tty_struct *tty)
-{
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
-
- return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
-}
-
-/* discard everything in the xmit buffer */
-
-static void
-rs_flush_buffer(struct tty_struct *tty)
-{
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
- unsigned long flags;
-
- save_flags(flags);
- cli();
- info->xmit.head = info->xmit.tail = 0;
- restore_flags(flags);
-
- wake_up_interruptible(&tty->write_wait);
-
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
-}
-
-/*
- * This function is used to send a high-priority XON/XOFF character to
- * the device
- *
- * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
- * but we do it in handle_ser_tx_interrupt().
- * We disable DMA channel and enable tx ready interrupt and write the
- * character when possible.
- */
-static void rs_send_xchar(struct tty_struct *tty, char ch)
-{
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
- unsigned long flags;
- save_flags(flags); cli();
- if (info->uses_dma_out) {
- /* Put the DMA on hold and disable the channel */
- *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
- while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
- IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
- e100_disable_txdma_channel(info);
- }
-
- /* Must make sure transmitter is not stopped before we can transmit */
- if (tty->stopped)
- rs_start(tty);
-
- /* Enable manual transmit interrupt and send from there */
- DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
- info->x_char = ch;
- e100_enable_serial_tx_ready_irq(info);
- restore_flags(flags);
-}
-
-/*
- * ------------------------------------------------------------
- * rs_throttle()
- *
- * This routine is called by the upper-layer tty layer to signal that
- * incoming characters should be throttled.
- * ------------------------------------------------------------
- */
-static void
-rs_throttle(struct tty_struct * tty)
-{
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
-#ifdef SERIAL_DEBUG_THROTTLE
- char buf[64];
-
- printk("throttle %s: %lu....\n", tty_name(tty, buf),
- (unsigned long)tty->ldisc.chars_in_buffer(tty));
-#endif
- DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
-
- /* Do RTS before XOFF since XOFF might take some time */
- if (tty->termios->c_cflag & CRTSCTS) {
- /* Turn off RTS line */
- e100_rts(info, 0);
- }
- if (I_IXOFF(tty))
- rs_send_xchar(tty, STOP_CHAR(tty));
-
-}
-
-static void
-rs_unthrottle(struct tty_struct * tty)
-{
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
-#ifdef SERIAL_DEBUG_THROTTLE
- char buf[64];
-
- printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
- (unsigned long)tty->ldisc.chars_in_buffer(tty));
-#endif
- DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
- DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
- /* Do RTS before XOFF since XOFF might take some time */
- if (tty->termios->c_cflag & CRTSCTS) {
- /* Assert RTS line */
- e100_rts(info, 1);
- }
-
- if (I_IXOFF(tty)) {
- if (info->x_char)
- info->x_char = 0;
- else
- rs_send_xchar(tty, START_CHAR(tty));
- }
-
-}
-
-/*
- * ------------------------------------------------------------
- * rs_ioctl() and friends
- * ------------------------------------------------------------
- */
-
-static int
-get_serial_info(struct e100_serial * info,
- struct serial_struct * retinfo)
-{
- struct serial_struct tmp;
-
- /* this is all probably wrong, there are a lot of fields
- * here that we don't have in e100_serial and maybe we
- * should set them to something else than 0.
- */
-
- if (!retinfo)
- return -EFAULT;
- memset(&tmp, 0, sizeof(tmp));
- tmp.type = info->type;
- tmp.line = info->line;
- tmp.port = (int)info->port;
- tmp.irq = info->irq;
- tmp.flags = info->flags;
- tmp.baud_base = info->baud_base;
- tmp.close_delay = info->close_delay;
- tmp.closing_wait = info->closing_wait;
- tmp.custom_divisor = info->custom_divisor;
- if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
- return -EFAULT;
- return 0;
-}
-
-static int
-set_serial_info(struct e100_serial *info,
- struct serial_struct *new_info)
-{
- struct serial_struct new_serial;
- struct e100_serial old_info;
- int retval = 0;
-
- if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
- return -EFAULT;
-
- old_info = *info;
-
- if (!capable(CAP_SYS_ADMIN)) {
- if ((new_serial.type != info->type) ||
- (new_serial.close_delay != info->close_delay) ||
- ((new_serial.flags & ~ASYNC_USR_MASK) !=
- (info->flags & ~ASYNC_USR_MASK)))
- return -EPERM;
- info->flags = ((info->flags & ~ASYNC_USR_MASK) |
- (new_serial.flags & ASYNC_USR_MASK));
- goto check_and_exit;
- }
-
- if (info->count > 1)
- return -EBUSY;
-
- /*
- * OK, past this point, all the error checking has been done.
- * At this point, we start making changes.....
- */
-
- info->baud_base = new_serial.baud_base;
- info->flags = ((info->flags & ~ASYNC_FLAGS) |
- (new_serial.flags & ASYNC_FLAGS));
- info->custom_divisor = new_serial.custom_divisor;
- info->type = new_serial.type;
- info->close_delay = new_serial.close_delay;
- info->closing_wait = new_serial.closing_wait;
- info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
-
- check_and_exit:
- if (info->flags & ASYNC_INITIALIZED) {
- change_speed(info);
- } else
- retval = startup(info);
- return retval;
-}
-
-/*
- * get_lsr_info - get line status register info
- *
- * Purpose: Let user call ioctl() to get info when the UART physically
- * is emptied. On bus types like RS485, the transmitter must
- * release the bus after transmitting. This must be done when
- * the transmit shift register is empty, not be done when the
- * transmit holding register is empty. This functionality
- * allows an RS485 driver to be written in user space.
- */
-static int
-get_lsr_info(struct e100_serial * info, unsigned int *value)
-{
- unsigned int result = TIOCSER_TEMT;
-#ifndef CONFIG_SVINTO_SIM
- unsigned long curr_time = jiffies;
- unsigned long curr_time_usec = GET_JIFFIES_USEC();
- unsigned long elapsed_usec =
- (curr_time - info->last_tx_active) * 1000000/HZ +
- curr_time_usec - info->last_tx_active_usec;
-
- if (info->xmit.head != info->xmit.tail ||
- elapsed_usec < 2*info->char_time_usec) {
- result = 0;
- }
-#endif
-
- if (copy_to_user(value, &result, sizeof(int)))
- return -EFAULT;
- return 0;
-}
-
-#ifdef SERIAL_DEBUG_IO
-struct state_str
-{
- int state;
- const char *str;
-};
-
-const struct state_str control_state_str[] = {
- {TIOCM_DTR, "DTR" },
- {TIOCM_RTS, "RTS"},
- {TIOCM_ST, "ST?" },
- {TIOCM_SR, "SR?" },
- {TIOCM_CTS, "CTS" },
- {TIOCM_CD, "CD" },
- {TIOCM_RI, "RI" },
- {TIOCM_DSR, "DSR" },
- {0, NULL }
-};
-
-char *get_control_state_str(int MLines, char *s)
-{
- int i = 0;
-
- s[0]='\0';
- while (control_state_str[i].str != NULL) {
- if (MLines & control_state_str[i].state) {
- if (s[0] != '\0') {
- strcat(s, ", ");
- }
- strcat(s, control_state_str[i].str);
- }
- i++;
- }
- return s;
-}
-#endif
-
-static int
-get_modem_info(struct e100_serial * info, unsigned int *value)
-{
- unsigned int result;
- /* Polarity isn't verified */
-#if 0 /*def SERIAL_DEBUG_IO */
-
- printk("get_modem_info: RTS: %i DTR: %i CD: %i RI: %i DSR: %i CTS: %i\n",
- E100_RTS_GET(info),
- E100_DTR_GET(info),
- E100_CD_GET(info),
- E100_RI_GET(info),
- E100_DSR_GET(info),
- E100_CTS_GET(info));
-#endif
-
- result =
- (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
- | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
- | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
- | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
- | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
- | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
-
-#ifdef SERIAL_DEBUG_IO
- printk("e100ser: modem state: %i 0x%08X\n", result, result);
- {
- char s[100];
-
- get_control_state_str(result, s);
- printk("state: %s\n", s);
- }
-#endif
- if (copy_to_user(value, &result, sizeof(int)))
- return -EFAULT;
- return 0;
-}
-
-
-static int
-set_modem_info(struct e100_serial * info, unsigned int cmd,
- unsigned int *value)
-{
- unsigned int arg;
-
- if (copy_from_user(&arg, value, sizeof(int)))
- return -EFAULT;
-
- switch (cmd) {
- case TIOCMBIS:
- if (arg & TIOCM_RTS) {
- e100_rts(info, 1);
- }
- if (arg & TIOCM_DTR) {
- e100_dtr(info, 1);
- }
- /* Handle FEMALE behaviour */
- if (arg & TIOCM_RI) {
- e100_ri_out(info, 1);
- }
- if (arg & TIOCM_CD) {
- e100_cd_out(info, 1);
- }
- break;
- case TIOCMBIC:
- if (arg & TIOCM_RTS) {
- e100_rts(info, 0);
- }
- if (arg & TIOCM_DTR) {
- e100_dtr(info, 0);
- }
- /* Handle FEMALE behaviour */
- if (arg & TIOCM_RI) {
- e100_ri_out(info, 0);
- }
- if (arg & TIOCM_CD) {
- e100_cd_out(info, 0);
- }
- break;
- case TIOCMSET:
- e100_rts(info, arg & TIOCM_RTS);
- e100_dtr(info, arg & TIOCM_DTR);
- /* Handle FEMALE behaviour */
- e100_ri_out(info, arg & TIOCM_RI);
- e100_cd_out(info, arg & TIOCM_CD);
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-
-static void
-rs_break(struct tty_struct *tty, int break_state)
-{
- struct e100_serial * info = (struct e100_serial *)tty->driver_data;
- unsigned long flags;
-
- if (!info->port)
- return;
-
- save_flags(flags);
- cli();
- if (break_state == -1) {
- /* Go to manual mode and set the txd pin to 0 */
- info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
- } else {
- info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
- }
- info->port[REG_TR_CTRL] = info->tx_ctrl;
- restore_flags(flags);
-}
-
-static int
-rs_ioctl(struct tty_struct *tty, struct file * file,
- unsigned int cmd, unsigned long arg)
-{
- struct e100_serial * info = (struct e100_serial *)tty->driver_data;
-
- if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
- (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
- (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
- if (tty->flags & (1 << TTY_IO_ERROR))
- return -EIO;
- }
-
- switch (cmd) {
- case TIOCMGET:
- return get_modem_info(info, (unsigned int *) arg);
- case TIOCMBIS:
- case TIOCMBIC:
- case TIOCMSET:
- return set_modem_info(info, cmd, (unsigned int *) arg);
- case TIOCGSERIAL:
- return get_serial_info(info,
- (struct serial_struct *) arg);
- case TIOCSSERIAL:
- return set_serial_info(info,
- (struct serial_struct *) arg);
- case TIOCSERGETLSR: /* Get line status register */
- return get_lsr_info(info, (unsigned int *) arg);
-
- case TIOCSERGSTRUCT:
- if (copy_to_user((struct e100_serial *) arg,
- info, sizeof(struct e100_serial)))
- return -EFAULT;
- return 0;
-
-#if defined(CONFIG_ETRAX_RS485)
- case TIOCSERSETRS485:
- {
- struct rs485_control rs485ctrl;
- if (copy_from_user(&rs485ctrl, (struct rs485_control*)arg, sizeof(rs485ctrl)))
- return -EFAULT;
-
- return e100_enable_rs485(tty, &rs485ctrl);
- }
-
- case TIOCSERWRRS485:
- {
- struct rs485_write rs485wr;
- if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
- return -EFAULT;
-
- return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
- }
-#endif
-
- default:
- return -ENOIOCTLCMD;
- }
- return 0;
-}
-
-static void
-rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
-{
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
-
- if (tty->termios->c_cflag == old_termios->c_cflag)
- return;
-
- change_speed(info);
-
- /* Handle turning off CRTSCTS */
- if ((old_termios->c_cflag & CRTSCTS) &&
- !(tty->termios->c_cflag & CRTSCTS)) {
- tty->hw_stopped = 0;
- rs_start(tty);
- }
-
-}
-
-/* In debugport.c - register a console write function that uses the normal
- * serial driver
- */
-typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len);
-
-extern debugport_write_function debug_write_function;
-
-static int rs_debug_write_function(int i, const char *buf, unsigned int len)
-{
- int cnt;
- struct tty_struct *tty;
- static int recurse_cnt = 0;
-
- tty = rs_table[i].tty;
- if (tty) {
- unsigned long flags;
- if (recurse_cnt > 5) /* We skip this debug output */
- return 1;
-
- local_irq_save(flags);
- recurse_cnt++;
- do {
- cnt = rs_write(tty, 0, buf, len);
- if (cnt >= 0) {
- buf += cnt;
- len -= cnt;
- } else
- len = cnt;
- } while(len > 0);
- recurse_cnt--;
- local_irq_restore(flags);
- return 1;
- }
- return 0;
-}
-
-/*
- * ------------------------------------------------------------
- * rs_close()
- *
- * This routine is called when the serial port gets closed. First, we
- * wait for the last remaining data to be sent. Then, we unlink its
- * S structure from the interrupt chain if necessary, and we free
- * that IRQ if nothing is left in the chain.
- * ------------------------------------------------------------
- */
-static void
-rs_close(struct tty_struct *tty, struct file * filp)
-{
- struct e100_serial * info = (struct e100_serial *)tty->driver_data;
- unsigned long flags;
-
- if (!info)
- return;
-
- /* interrupts are disabled for this entire function */
-
- save_flags(flags);
- cli();
-
- if (tty_hung_up_p(filp)) {
- restore_flags(flags);
- return;
- }
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
- info->line, info->count);
-#endif
- if ((tty->count == 1) && (info->count != 1)) {
- /*
- * Uh, oh. tty->count is 1, which means that the tty
- * structure will be freed. Info->count should always
- * be one in these conditions. If it's greater than
- * one, we've got real problems, since it means the
- * serial port won't be shutdown.
- */
- printk(KERN_CRIT
- "rs_close: bad serial port count; tty->count is 1, "
- "info->count is %d\n", info->count);
- info->count = 1;
- }
- if (--info->count < 0) {
- printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
- info->line, info->count);
- info->count = 0;
- }
- if (info->count) {
- restore_flags(flags);
- return;
- }
- info->flags |= ASYNC_CLOSING;
- /*
- * Save the termios structure, since this port may have
- * separate termios for callout and dialin.
- */
- if (info->flags & ASYNC_NORMAL_ACTIVE)
- info->normal_termios = *tty->termios;
- /*
- * Now we wait for the transmit buffer to clear; and we notify
- * the line discipline to only process XON/XOFF characters.
- */
- tty->closing = 1;
- if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
- tty_wait_until_sent(tty, info->closing_wait);
- /*
- * At this point we stop accepting input. To do this, we
- * disable the serial receiver and the DMA receive interrupt.
- */
-#ifdef SERIAL_HANDLE_EARLY_ERRORS
- e100_disable_serial_data_irq(info);
-#endif
-
-#ifndef CONFIG_SVINTO_SIM
- e100_disable_rx(info);
- e100_disable_rx_irq(info);
-
- if (info->flags & ASYNC_INITIALIZED) {
- /*
- * Before we drop DTR, make sure the UART transmitter
- * has completely drained; this is especially
- * important as we have a transmit FIFO!
- */
- rs_wait_until_sent(tty, HZ);
- }
-#endif
-
- shutdown(info);
- if (tty->driver->flush_buffer)
- tty->driver->flush_buffer(tty);
- if (tty->ldisc.flush_buffer)
- tty->ldisc.flush_buffer(tty);
- tty->closing = 0;
- info->event = 0;
- info->tty = 0;
- if (info->blocked_open) {
- if (info->close_delay) {
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(info->close_delay);
- }
- wake_up_interruptible(&info->open_wait);
- }
- info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
- wake_up_interruptible(&info->close_wait);
- restore_flags(flags);
-
- /* port closed */
-
-#if defined(CONFIG_ETRAX_RS485)
- if (info->rs485.enabled) {
- info->rs485.enabled = 0;
-#if defined(CONFIG_ETRAX_RS485_ON_PA)
- *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
-#endif
-#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
- REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
- rs485_port_g_bit, 0);
-#endif
-#if defined(CONFIG_ETRAX_RS485_LTC1387)
- REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
- CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
- REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
- CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
-#endif
- }
-#endif
-}
-
-/*
- * rs_wait_until_sent() --- wait until the transmitter is empty
- */
-static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
-{
- unsigned long orig_jiffies;
- struct e100_serial *info = (struct e100_serial *)tty->driver_data;
- unsigned long curr_time = jiffies;
- unsigned long curr_time_usec = GET_JIFFIES_USEC();
- long elapsed_usec =
- (curr_time - info->last_tx_active) * (1000000/HZ) +
- curr_time_usec - info->last_tx_active_usec;
-
- /*
- * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
- * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
- */
- orig_jiffies = jiffies;
- while (info->xmit.head != info->xmit.tail || /* More in send queue */
- (*info->ostatusadr & 0x007f) || /* more in FIFO */
- (elapsed_usec < 2*info->char_time_usec)) {
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
- if (signal_pending(current))
- break;
- if (timeout && time_after(jiffies, orig_jiffies + timeout))
- break;
- curr_time = jiffies;
- curr_time_usec = GET_JIFFIES_USEC();
- elapsed_usec =
- (curr_time - info->last_tx_active) * (1000000/HZ) +
- curr_time_usec - info->last_tx_active_usec;
- }
- set_current_state(TASK_RUNNING);
-}
-
-/*
- * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
- */
-void
-rs_hangup(struct tty_struct *tty)
-{
- struct e100_serial * info = (struct e100_serial *)tty->driver_data;
-
- rs_flush_buffer(tty);
- shutdown(info);
- info->event = 0;
- info->count = 0;
- info->flags &= ~ASYNC_NORMAL_ACTIVE;
- info->tty = 0;
- wake_up_interruptible(&info->open_wait);
-}
-
-/*
- * ------------------------------------------------------------
- * rs_open() and friends
- * ------------------------------------------------------------
- */
-static int
-block_til_ready(struct tty_struct *tty, struct file * filp,
- struct e100_serial *info)
-{
- DECLARE_WAITQUEUE(wait, current);
- unsigned long flags;
- int retval;
- int do_clocal = 0, extra_count = 0;
-
- /*
- * If the device is in the middle of being closed, then block
- * until it's done, and then try again.
- */
- if (tty_hung_up_p(filp) ||
- (info->flags & ASYNC_CLOSING)) {
- if (info->flags & ASYNC_CLOSING)
- interruptible_sleep_on(&info->close_wait);
-#ifdef SERIAL_DO_RESTART
- if (info->flags & ASYNC_HUP_NOTIFY)
- return -EAGAIN;
- else
- return -ERESTARTSYS;
-#else
- return -EAGAIN;
-#endif
- }
-
- /*
- * If non-blocking mode is set, or the port is not enabled,
- * then make the check up front and then exit.
- */
- if ((filp->f_flags & O_NONBLOCK) ||
- (tty->flags & (1 << TTY_IO_ERROR))) {
- info->flags |= ASYNC_NORMAL_ACTIVE;
- return 0;
- }
-
- if (tty->termios->c_cflag & CLOCAL) {
- do_clocal = 1;
- }
-
- /*
- * Block waiting for the carrier detect and the line to become
- * free (i.e., not in use by the callout). While we are in
- * this loop, info->count is dropped by one, so that
- * rs_close() knows when to free things. We restore it upon
- * exit, either normal or abnormal.
- */
- retval = 0;
- add_wait_queue(&info->open_wait, &wait);
-#ifdef SERIAL_DEBUG_OPEN
- printk("block_til_ready before block: ttyS%d, count = %d\n",
- info->line, info->count);
-#endif
- save_flags(flags);
- cli();
- if (!tty_hung_up_p(filp)) {
- extra_count++;
- info->count--;
- }
- restore_flags(flags);
- info->blocked_open++;
- while (1) {
- save_flags(flags);
- cli();
- /* assert RTS and DTR */
- e100_rts(info, 1);
- e100_dtr(info, 1);
- restore_flags(flags);
- set_current_state(TASK_INTERRUPTIBLE);
- if (tty_hung_up_p(filp) ||
- !(info->flags & ASYNC_INITIALIZED)) {
-#ifdef SERIAL_DO_RESTART
- if (info->flags & ASYNC_HUP_NOTIFY)
- retval = -EAGAIN;
- else
- retval = -ERESTARTSYS;
-#else
- retval = -EAGAIN;
-#endif
- break;
- }
- if (!(info->flags & ASYNC_CLOSING) && do_clocal)
- /* && (do_clocal || DCD_IS_ASSERTED) */
- break;
- if (signal_pending(current)) {
- retval = -ERESTARTSYS;
- break;
- }
-#ifdef SERIAL_DEBUG_OPEN
- printk("block_til_ready blocking: ttyS%d, count = %d\n",
- info->line, info->count);
-#endif
- schedule();
- }
- set_current_state(TASK_RUNNING);
- remove_wait_queue(&info->open_wait, &wait);
- if (extra_count)
- info->count++;
- info->blocked_open--;
-#ifdef SERIAL_DEBUG_OPEN
- printk("block_til_ready after blocking: ttyS%d, count = %d\n",
- info->line, info->count);
-#endif
- if (retval)
- return retval;
- info->flags |= ASYNC_NORMAL_ACTIVE;
- return 0;
-}
-
-/*
- * This routine is called whenever a serial port is opened.
- * It performs the serial-specific initialization for the tty structure.
- */
-static int
-rs_open(struct tty_struct *tty, struct file * filp)
-{
- struct e100_serial *info;
- int retval, line;
- unsigned long page;
-
- /* find which port we want to open */
-
- line = tty->index;
-
- if (line < 0 || line >= NR_PORTS)
- return -ENODEV;
-
- /* find the corresponding e100_serial struct in the table */
- info = rs_table + line;
-
- /* don't allow the opening of ports that are not enabled in the HW config */
- if (!info->enabled)
- return -ENODEV;
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
- info->count);
-#endif
-
- info->count++;
- tty->driver_data = info;
- info->tty = tty;
-
- info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
-
- if (!tmp_buf) {
- page = get_zeroed_page(GFP_KERNEL);
- if (!page) {
- return -ENOMEM;
- }
- if (tmp_buf)
- free_page(page);
- else
- tmp_buf = (unsigned char *) page;
- }
-
- /*
- * If the port is in the middle of closing, bail out now
- */
- if (tty_hung_up_p(filp) ||
- (info->flags & ASYNC_CLOSING)) {
- if (info->flags & ASYNC_CLOSING)
- interruptible_sleep_on(&info->close_wait);
-#ifdef SERIAL_DO_RESTART
- return ((info->flags & ASYNC_HUP_NOTIFY) ?
- -EAGAIN : -ERESTARTSYS);
-#else
- return -EAGAIN;
-#endif
- }
-
- /*
- * Start up the serial port
- */
-
- retval = startup(info);
- if (retval)
- return retval;
-
- retval = block_til_ready(tty, filp, info);
- if (retval) {
-#ifdef SERIAL_DEBUG_OPEN
- printk("rs_open returning after block_til_ready with %d\n",
- retval);
-#endif
- return retval;
- }
-
- if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
- *tty->termios = info->normal_termios;
- change_speed(info);
- }
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("rs_open ttyS%d successful...\n", info->line);
-#endif
- DLOG_INT_TRIG( log_int_pos = 0);
-
- DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
- info->icount.rx = 0;
- } );
-
- return 0;
-}
-
-/*
- * /proc fs routines....
- */
-
-extern _INLINE_ int line_info(char *buf, struct e100_serial *info)
-{
- char stat_buf[30];
- int ret;
- unsigned long tmp;
-
- ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
- info->line, (unsigned long)info->port, info->irq);
-
- if (!info->port || (info->type == PORT_UNKNOWN)) {
- ret += sprintf(buf+ret, "\n");
- return ret;
- }
-
- stat_buf[0] = 0;
- stat_buf[1] = 0;
- if (!E100_RTS_GET(info))
- strcat(stat_buf, "|RTS");
- if (!E100_CTS_GET(info))
- strcat(stat_buf, "|CTS");
- if (!E100_DTR_GET(info))
- strcat(stat_buf, "|DTR");
- if (!E100_DSR_GET(info))
- strcat(stat_buf, "|DSR");
- if (!E100_CD_GET(info))
- strcat(stat_buf, "|CD");
- if (!E100_RI_GET(info))
- strcat(stat_buf, "|RI");
-
- ret += sprintf(buf+ret, " baud:%d", info->baud);
-
- ret += sprintf(buf+ret, " tx:%lu rx:%lu",
- (unsigned long)info->icount.tx,
- (unsigned long)info->icount.rx);
- tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
- if (tmp) {
- ret += sprintf(buf+ret, " tx_pend:%lu/%lu",
- (unsigned long)tmp,
- (unsigned long)SERIAL_XMIT_SIZE);
- }
-
- ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
- (unsigned long)info->recv_cnt,
- (unsigned long)info->max_recv_cnt);
-
-#if 1
- if (info->tty) {
-
- if (info->tty->stopped)
- ret += sprintf(buf+ret, " stopped:%i",
- (int)info->tty->stopped);
- if (info->tty->hw_stopped)
- ret += sprintf(buf+ret, " hw_stopped:%i",
- (int)info->tty->hw_stopped);
- }
-
- {
- unsigned char rstat = info->port[REG_STATUS];
- if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) )
- ret += sprintf(buf+ret, " xoff_detect:1");
- }
-
-#endif
-
-
-
-
- if (info->icount.frame)
- ret += sprintf(buf+ret, " fe:%lu",
- (unsigned long)info->icount.frame);
-
- if (info->icount.parity)
- ret += sprintf(buf+ret, " pe:%lu",
- (unsigned long)info->icount.parity);
-
- if (info->icount.brk)
- ret += sprintf(buf+ret, " brk:%lu",
- (unsigned long)info->icount.brk);
-
- if (info->icount.overrun)
- ret += sprintf(buf+ret, " oe:%lu",
- (unsigned long)info->icount.overrun);
-
- /*
- * Last thing is the RS-232 status lines
- */
- ret += sprintf(buf+ret, " %s\n", stat_buf+1);
- return ret;
-}
-
-int rs_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- int i, len = 0, l;
- off_t begin = 0;
-
- len += sprintf(page, "serinfo:1.0 driver:%s\n",
- serial_version);
- for (i = 0; i < NR_PORTS && len < 4000; i++) {
- if (!rs_table[i].enabled)
- continue;
- l = line_info(page + len, &rs_table[i]);
- len += l;
- if (len+begin > off+count)
- goto done;
- if (len+begin < off) {
- begin += len;
- len = 0;
- }
- }
-#ifdef DEBUG_LOG_INCLUDED
- for (i = 0; i < debug_log_pos; i++) {
- len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data));
- len += sprintf(page + len, debug_log[i].string, debug_log[i].value);
- if (len+begin > off+count)
- goto done;
- if (len+begin < off) {
- begin += len;
- len = 0;
- }
- }
- len += sprintf(page + len, "debug_log %i/%i %li bytes\n",
- i, DEBUG_LOG_SIZE, begin+len);
- debug_log_pos = 0;
-#endif
-
- *eof = 1;
-done:
- if (off >= len+begin)
- return 0;
- *start = page + (off-begin);
- return ((count < begin+len-off) ? count : begin+len-off);
-}
-
-/* Finally, routines used to initialize the serial driver. */
-
-static void
-show_serial_version(void)
-{
- printk(KERN_INFO
- "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
- &serial_version[11]); /* "$Revision: x.yy" */
-}
-
-/* rs_init inits the driver at boot (using the module_init chain) */
-
-static struct tty_operations rs_ops = {
- .open = rs_open,
- .close = rs_close,
- .write = rs_write,
- .flush_chars = rs_flush_chars,
- .write_room = rs_write_room,
- .chars_in_buffer = rs_chars_in_buffer,
- .flush_buffer = rs_flush_buffer,
- .ioctl = rs_ioctl,
- .throttle = rs_throttle,
- .unthrottle = rs_unthrottle,
- .set_termios = rs_set_termios,
- .stop = rs_stop,
- .start = rs_start,
- .hangup = rs_hangup,
- .break_ctl = rs_break,
- .send_xchar = rs_send_xchar,
- .wait_until_sent = rs_wait_until_sent,
- .read_proc = rs_read_proc,
-};
-
-static int __init
-rs_init(void)
-{
- int i;
- struct e100_serial *info;
- struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
-
- if (!driver)
- return -ENOMEM;
-
- show_serial_version();
-
- /* Setup the timed flush handler system */
-
-#if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
- init_timer(&flush_timer);
- flush_timer.function = timed_flush_handler;
- mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
-#endif
-
- /* Initialize the tty_driver structure */
-
- driver->driver_name = "serial";
- driver->name = "ttyS";
- driver->major = TTY_MAJOR;
- driver->minor_start = 64;
- driver->type = TTY_DRIVER_TYPE_SERIAL;
- driver->subtype = SERIAL_TYPE_NORMAL;
- driver->init_termios = tty_std_termios;
- driver->init_termios.c_cflag =
- B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
- driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
- driver->termios = serial_termios;
- driver->termios_locked = serial_termios_locked;
-
- tty_set_operations(driver, &rs_ops);
- serial_driver = driver;
- if (tty_register_driver(driver))
- panic("Couldn't register serial driver\n");
- /* do some initializing for the separate ports */
-
- for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
- info->uses_dma_in = 0;
- info->uses_dma_out = 0;
- info->line = i;
- info->tty = 0;
- info->type = PORT_ETRAX;
- info->tr_running = 0;
- info->forced_eop = 0;
- info->baud_base = DEF_BAUD_BASE;
- info->custom_divisor = 0;
- info->flags = 0;
- info->close_delay = 5*HZ/10;
- info->closing_wait = 30*HZ;
- info->x_char = 0;
- info->event = 0;
- info->count = 0;
- info->blocked_open = 0;
- info->normal_termios = driver->init_termios;
- init_waitqueue_head(&info->open_wait);
- init_waitqueue_head(&info->close_wait);
- info->xmit.buf = NULL;
- info->xmit.tail = info->xmit.head = 0;
- info->first_recv_buffer = info->last_recv_buffer = NULL;
- info->recv_cnt = info->max_recv_cnt = 0;
- info->last_tx_active_usec = 0;
- info->last_tx_active = 0;
-
-#if defined(CONFIG_ETRAX_RS485)
- /* Set sane defaults */
- info->rs485.rts_on_send = 0;
- info->rs485.rts_after_sent = 1;
- info->rs485.delay_rts_before_send = 0;
- info->rs485.enabled = 0;
-#endif
- INIT_WORK(&info->work, do_softint, info);
-
- if (info->enabled) {
- printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
- serial_driver->name, info->line, (unsigned int)info->port);
- }
- }
-#ifdef CONFIG_ETRAX_FAST_TIMER
-#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
- memset(fast_timers, 0, sizeof(fast_timers));
-#endif
-#ifdef CONFIG_ETRAX_RS485
- memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
-#endif
- fast_timer_init();
-#endif
-
-#ifndef CONFIG_SVINTO_SIM
- /* Not needed in simulator. May only complicate stuff. */
- /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
-
- if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial ", NULL))
- panic("irq8");
-
-#ifdef CONFIG_ETRAX_SERIAL_PORT0
-#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
- if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 0 dma tr", NULL))
- panic("irq22");
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
- if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 0 dma rec", NULL))
- panic("irq23");
-#endif
-#endif
-
-#ifdef CONFIG_ETRAX_SERIAL_PORT1
-#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
- if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 1 dma tr", NULL))
- panic("irq24");
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
- if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 1 dma rec", NULL))
- panic("irq25");
-#endif
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT2
- /* DMA Shared with par0 (and SCSI0 and ATA) */
-#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
- if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma tr", NULL))
- panic("irq18");
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
- if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma rec", NULL))
- panic("irq19");
-#endif
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT3
- /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
-#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
- if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma tr", NULL))
- panic("irq20");
-#endif
-#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
- if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma rec", NULL))
- panic("irq21");
-#endif
-#endif
-
-#ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
- if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, SA_SHIRQ | SA_INTERRUPT,
- "fast serial dma timeout", NULL)) {
- printk(KERN_CRIT "err: timer1 irq\n");
- }
-#endif
-#endif /* CONFIG_SVINTO_SIM */
- debug_write_function = rs_debug_write_function;
- return 0;
-}
-
-/* this makes sure that rs_init is called during kernel boot */
-
-module_init(rs_init);
-
-/*
- * register_serial and unregister_serial allows for serial ports to be
- * configured at run-time, to support PCMCIA modems.
- */
-int
-register_serial(struct serial_struct *req)
-{
- return -1;
-}
-
-void unregister_serial(int line)
-{
-}
+++ /dev/null
-/*
- * serial.h: Arch-dep definitions for the Etrax100 serial driver.
- *
- * Copyright (C) 1998, 1999, 2000 Axis Communications AB
- */
-
-#ifndef _ETRAX_SERIAL_H
-#define _ETRAX_SERIAL_H
-
-#include <linux/config.h>
-#include <linux/circ_buf.h>
-#include <asm/termios.h>
-
-/* Software state per channel */
-
-#ifdef __KERNEL__
-/*
- * This is our internal structure for each serial port's state.
- *
- * Many fields are paralleled by the structure used by the serial_struct
- * structure.
- *
- * For definitions of the flags field, see tty.h
- */
-
-#define SERIAL_RECV_DESCRIPTORS 8
-
-struct etrax_recv_buffer {
- struct etrax_recv_buffer *next;
- unsigned short length;
- unsigned char error;
- unsigned char pad;
-
- unsigned char buffer[0];
-};
-
-struct e100_serial {
- int baud;
- volatile u8 *port; /* R_SERIALx_CTRL */
- u32 irq; /* bitnr in R_IRQ_MASK2 for dmaX_descr */
-
- /* Output registers */
- volatile u8 *oclrintradr; /* adr to R_DMA_CHx_CLR_INTR */
- volatile u32 *ofirstadr; /* adr to R_DMA_CHx_FIRST */
- volatile u8 *ocmdadr; /* adr to R_DMA_CHx_CMD */
- const volatile u8 *ostatusadr; /* adr to R_DMA_CHx_STATUS */
-
- /* Input registers */
- volatile u8 *iclrintradr; /* adr to R_DMA_CHx_CLR_INTR */
- volatile u32 *ifirstadr; /* adr to R_DMA_CHx_FIRST */
- volatile u8 *icmdadr; /* adr to R_DMA_CHx_CMD */
- volatile u32 *idescradr; /* adr to R_DMA_CHx_DESCR */
-
- int flags; /* defined in tty.h */
-
- u8 rx_ctrl; /* shadow for R_SERIALx_REC_CTRL */
- u8 tx_ctrl; /* shadow for R_SERIALx_TR_CTRL */
- u8 iseteop; /* bit number for R_SET_EOP for the input dma */
- int enabled; /* Set to 1 if the port is enabled in HW config */
-
- u8 dma_out_enabled:1; /* Set to 1 if DMA should be used */
- u8 dma_in_enabled:1; /* Set to 1 if DMA should be used */
-
- /* end of fields defined in rs_table[] in .c-file */
- u8 uses_dma_in; /* Set to 1 if DMA is used */
- u8 uses_dma_out; /* Set to 1 if DMA is used */
- u8 forced_eop; /* a fifo eop has been forced */
- int baud_base; /* For special baudrates */
- int custom_divisor; /* For special baudrates */
- struct etrax_dma_descr tr_descr;
- struct etrax_dma_descr rec_descr[SERIAL_RECV_DESCRIPTORS];
- int cur_rec_descr;
-
- volatile int tr_running; /* 1 if output is running */
-
- struct tty_struct *tty;
- int read_status_mask;
- int ignore_status_mask;
- int x_char; /* xon/xoff character */
- int close_delay;
- unsigned short closing_wait;
- unsigned short closing_wait2;
- unsigned long event;
- unsigned long last_active;
- int line;
- int type; /* PORT_ETRAX */
- int count; /* # of fd on device */
- int blocked_open; /* # of blocked opens */
- struct circ_buf xmit;
- struct etrax_recv_buffer *first_recv_buffer;
- struct etrax_recv_buffer *last_recv_buffer;
- unsigned int recv_cnt;
- unsigned int max_recv_cnt;
-
- struct work_struct work;
- struct async_icount icount; /* error-statistics etc.*/
- struct termios normal_termios;
- struct termios callout_termios;
-#ifdef DECLARE_WAITQUEUE
- wait_queue_head_t open_wait;
- wait_queue_head_t close_wait;
-#else
- struct wait_queue *open_wait;
- struct wait_queue *close_wait;
-#endif
-
- unsigned long char_time_usec; /* The time for 1 char, in usecs */
- unsigned long flush_time_usec; /* How often we should flush */
- unsigned long last_tx_active_usec; /* Last tx usec in the jiffies */
- unsigned long last_tx_active; /* Last tx time in jiffies */
- unsigned long last_rx_active_usec; /* Last rx usec in the jiffies */
- unsigned long last_rx_active; /* Last rx time in jiffies */
-
- int break_detected_cnt;
- int errorcode;
-
-#ifdef CONFIG_ETRAX_RS485
- struct rs485_control rs485; /* RS-485 support */
-#endif
-};
-
-/* this PORT is not in the standard serial.h. it's not actually used for
- * anything since we only have one type of async serial-port anyway in this
- * system.
- */
-
-#define PORT_ETRAX 1
-
-/*
- * Events are used to schedule things to happen at timer-interrupt
- * time, instead of at rs interrupt time.
- */
-#define RS_EVENT_WRITE_WAKEUP 0
-
-#endif /* __KERNEL__ */
-
-#endif /* !_ETRAX_SERIAL_H */
+++ /dev/null
-#include <stdio.h>
-
-
-void main()
-{
- int c;
- int comma=0;
- int count=0;
- while((c=getchar())!=EOF)
- {
- unsigned char x=c;
- if(comma)
- printf(",");
- else
- comma=1;
- if(count==8)
- {
- count=0;
- printf("\n");
- }
- if(count==0)
- printf("\t");
- printf("0x%02X",c);
- count++;
- }
- if(count)
- printf("\n");
- exit(0);
-}
-
-
+++ /dev/null
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/user.h>
-#include <linux/elfcore.h>
-#include <linux/sched.h>
-#include <linux/in6.h>
-#include <linux/interrupt.h>
-#include <linux/smp_lock.h>
-#include <linux/pm.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/tty.h>
-
-#include <asm/semaphore.h>
-#include <asm/processor.h>
-#include <asm/uaccess.h>
-#include <asm/checksum.h>
-#include <asm/io.h>
-#include <asm/hardirq.h>
-#include <asm/delay.h>
-#include <asm/irq.h>
-#include <asm/pgtable.h>
-
-extern void dump_thread(struct pt_regs *, struct user *);
-extern unsigned long get_cmos_time(void);
-extern void __Udiv(void);
-extern void __Umod(void);
-extern void __Div(void);
-extern void __Mod(void);
-extern void __ashrdi3(void);
-extern void iounmap(void *addr);
-
-/* Platform dependent support */
-EXPORT_SYMBOL(dump_thread);
-EXPORT_SYMBOL(enable_irq);
-EXPORT_SYMBOL(disable_irq);
-EXPORT_SYMBOL(kernel_thread);
-EXPORT_SYMBOL(get_cmos_time);
-EXPORT_SYMBOL(loops_per_usec);
-
-/* String functions */
-EXPORT_SYMBOL(memcmp);
-EXPORT_SYMBOL(memmove);
-EXPORT_SYMBOL(strpbrk);
-EXPORT_SYMBOL(strstr);
-EXPORT_SYMBOL(strcpy);
-EXPORT_SYMBOL(strchr);
-EXPORT_SYMBOL(strcmp);
-EXPORT_SYMBOL(strlen);
-EXPORT_SYMBOL(strcat);
-EXPORT_SYMBOL(strncat);
-EXPORT_SYMBOL(strncmp);
-EXPORT_SYMBOL(strncpy);
-
-/* Math functions */
-EXPORT_SYMBOL(__Udiv);
-EXPORT_SYMBOL(__Umod);
-EXPORT_SYMBOL(__Div);
-EXPORT_SYMBOL(__Mod);
-EXPORT_SYMBOL(__ashrdi3);
-
-/* Memory functions */
-EXPORT_SYMBOL(__ioremap);
-EXPORT_SYMBOL(iounmap);
-
-/* Semaphore functions */
-EXPORT_SYMBOL(__up);
-EXPORT_SYMBOL(__down);
-EXPORT_SYMBOL(__down_interruptible);
-EXPORT_SYMBOL(__down_trylock);
-
-/* Export shadow registers for the CPU I/O pins */
-EXPORT_SYMBOL(genconfig_shadow);
-EXPORT_SYMBOL(port_pa_data_shadow);
-EXPORT_SYMBOL(port_pa_dir_shadow);
-EXPORT_SYMBOL(port_pb_data_shadow);
-EXPORT_SYMBOL(port_pb_dir_shadow);
-EXPORT_SYMBOL(port_pb_config_shadow);
-EXPORT_SYMBOL(port_g_data_shadow);
-
-/* Userspace access functions */
-EXPORT_SYMBOL(__copy_user_zeroing);
-EXPORT_SYMBOL(__copy_user);
-
-/* Cache flush functions */
-EXPORT_SYMBOL(flush_etrax_cache);
-EXPORT_SYMBOL(prepare_rx_descriptor);
-
-#undef memcpy
-#undef memset
-extern void * memset(void *, int, __kernel_size_t);
-extern void * memcpy(void *, const void *, __kernel_size_t);
-EXPORT_SYMBOL_NOVERS(memcpy);
-EXPORT_SYMBOL_NOVERS(memset);
-
-
+++ /dev/null
-/* AE-3068 (aka. aki3068net) RAM */
-
-OUTPUT_ARCH(h8300h)
-ENTRY("__start")
-
-MEMORY
- {
- ram : ORIGIN = 0x400000, LENGTH = 0x600000-0x400000
- eram : ORIGIN = 0x600000, LENGTH = 0
- iram : ORIGIN = 0xffbf20, LENGTH = 0x4000
- }
+++ /dev/null
-/* Generic RAM */
-
-OUTPUT_ARCH(h8300h)
-ENTRY("__start")
-
-MEMORY
- {
- ram : ORIGIN = 0x400000, LENGTH = 0x200000
- eram : ORIGIN = 0x600000, LENGTH = 0
- iram : ORIGIN = 0xffbf20, LENGTH = 0x4000
- }
+++ /dev/null
-OUTPUT_ARCH(h8300h)
-ENTRY("__start")
-
-MEMORY
- {
- vector : ORIGIN = 0x000000, LENGTH = 0x000100
- rom : ORIGIN = 0x000100, LENGTH = 0x200000-0x000100
- erom : ORIGIN = 0x200000, LENGTH = 0
- ram : ORIGIN = 0x200000, LENGTH = 0x400000
- eram : ORIGIN = 0x600000, LENGTH = 0
- }
-
+++ /dev/null
-/* H8MAX RAM */
-
-OUTPUT_ARCH(h8300h)
-ENTRY("__start")
-
-MEMORY
- {
- ram : ORIGIN = 0x400000, LENGTH = 0x600000-0x400000
- eram : ORIGIN = 0x600000, LENGTH = 0
- iram : ORIGIN = 0xfffd20, LENGTH = 0x100
- }
+++ /dev/null
-/* EDOSK-2674R RAM */
-
-OUTPUT_ARCH(h8300s)
-ENTRY("__start")
-
-MEMORY
- {
- ram : ORIGIN = 0x400000, LENGTH = 0xc00000-0x400000
- eram : ORIGIN = 0xc00000, LENGTH = 0
- }
+++ /dev/null
-OUTPUT_ARCH(h8300s)
-ENTRY("__start")
-
-MEMORY
- {
- vector : ORIGIN = 0x000000, LENGTH = 0x000200
- rom : ORIGIN = 0x000200, LENGTH = 0x100000-0x000200
- erom : ORIGIN = 0x100000, LENGTH = 0
- ram : ORIGIN = 0x400000, LENGTH = 0xc00000-0x400000
- eram : ORIGIN = 0xc00000, LENGTH = 0
- }
+++ /dev/null
-OUTPUT_ARCH(h8300s)
-ENTRY("__start")
-
-MEMORY
- {
- ram : ORIGIN = 0x400000, LENGTH = 0x200000
- eram : ORIGIN = 0x600000, LENGTH = 0
- }
+++ /dev/null
-OUTPUT_ARCH(h8300s)
-ENTRY("__start")
-
-MEMORY
- {
- vector : ORIGIN = 0x000000, LENGTH = 0x000200
- rom : ORIGIN = 0x000200, LENGTH = 0x200000-0x000200
- erom : ORIGIN = 0x200000, LENGTH = 0
- ram : ORIGIN = 0x200000, LENGTH = 0x400000
- eram : ORIGIN = 0x600000, LENGTH = 0
- }
+++ /dev/null
-#
-# arch/i386/boot/Makefile
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1994 by Linus Torvalds
-#
-
-# ROOT_DEV specifies the default root-device when making the image.
-# This can be either FLOPPY, CURRENT, /dev/xxxx or empty, in which case
-# the default of FLOPPY is used by 'build'.
-
-ROOT_DEV := CURRENT
-
-# If you want to preset the SVGA mode, uncomment the next line and
-# set SVGA_MODE to whatever number you want.
-# Set it to -DSVGA_MODE=NORMAL_VGA if you just want the EGA/VGA mode.
-# The number is the same as you would ordinarily press at bootup.
-
-SVGA_MODE := -DSVGA_MODE=NORMAL_VGA
-
-# If you want the RAM disk device, define this to be the size in blocks.
-
-#RAMDISK := -DRAMDISK=512
-
-targets := vmlinux.bin bootsect bootsect.o setup setup.o \
- zImage bzImage
-subdir- := compressed
-
-host-progs := tools/build
-
-# ---------------------------------------------------------------------------
-
-$(obj)/zImage: IMAGE_OFFSET := 0x1000
-$(obj)/zImage: EXTRA_AFLAGS := -traditional $(SVGA_MODE) $(RAMDISK)
-$(obj)/bzImage: IMAGE_OFFSET := 0x100000
-$(obj)/bzImage: EXTRA_AFLAGS := -traditional $(SVGA_MODE) $(RAMDISK) -D__BIG_KERNEL__
-$(obj)/bzImage: BUILDFLAGS := -b
-
-quiet_cmd_image = BUILD $@
-cmd_image = $(obj)/tools/build $(BUILDFLAGS) $(obj)/bootsect $(obj)/setup \
- $(obj)/vmlinux.bin $(ROOT_DEV) > $@
-
-$(obj)/zImage $(obj)/bzImage: $(obj)/bootsect $(obj)/setup \
- $(obj)/vmlinux.bin $(obj)/tools/build FORCE
- $(call if_changed,image)
- @echo 'Kernel: $@ is ready'
-
-$(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE
- $(call if_changed,objcopy)
-
-LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
-LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext
-
-$(obj)/setup $(obj)/bootsect: %: %.o FORCE
- $(call if_changed,ld)
-
-$(obj)/compressed/vmlinux: FORCE
- $(Q)$(MAKE) $(build)=$(obj)/compressed IMAGE_OFFSET=$(IMAGE_OFFSET) $@
-
-# Set this if you want to pass append arguments to the zdisk/fdimage kernel
-FDARGS =
-
-$(obj)/mtools.conf: $(src)/mtools.conf.in
- sed -e 's|@OBJ@|$(obj)|g' < $< > $@
-
-# This requires write access to /dev/fd0
-zdisk: $(BOOTIMAGE) $(obj)/mtools.conf
- MTOOLSRC=$(obj)/mtools.conf mformat a: ; sync
- syslinux /dev/fd0 ; sync
- echo 'default linux $(FDARGS)' | \
- MTOOLSRC=$(src)/mtools.conf mcopy - a:syslinux.cfg
- MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) a:linux ; sync
-
-# These require being root or having syslinux 2.02 or higher installed
-fdimage fdimage144: $(BOOTIMAGE) $(obj)/mtools.conf
- dd if=/dev/zero of=$(obj)/fdimage bs=1024 count=1440
- MTOOLSRC=$(obj)/mtools.conf mformat v: ; sync
- syslinux $(obj)/fdimage ; sync
- echo 'default linux $(FDARGS)' | \
- MTOOLSRC=$(obj)/mtools.conf mcopy - v:syslinux.cfg
- MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) v:linux ; sync
-
-fdimage288: $(BOOTIMAGE) $(obj)/mtools.conf
- dd if=/dev/zero of=$(obj)/fdimage bs=1024 count=2880
- MTOOLSRC=$(obj)/mtools.conf mformat w: ; sync
- syslinux $(obj)/fdimage ; sync
- echo 'default linux $(FDARGS)' | \
- MTOOLSRC=$(obj)/mtools.conf mcopy - w:syslinux.cfg
- MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) w:linux ; sync
-
-zlilo: $(BOOTIMAGE)
- if [ -f $(INSTALL_PATH)/vmlinuz ]; then mv $(INSTALL_PATH)/vmlinuz $(INSTALL_PATH)/vmlinuz.old; fi
- if [ -f $(INSTALL_PATH)/System.map ]; then mv $(INSTALL_PATH)/System.map $(INSTALL_PATH)/System.old; fi
- cat $(BOOTIMAGE) > $(INSTALL_PATH)/vmlinuz
- cp System.map $(INSTALL_PATH)/
- if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi
-
-install: $(BOOTIMAGE)
- sh $(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)"
+++ /dev/null
-/*
- * bootsect.S - boot sector for NEC PC-9800 series
- *
- * Linux/98 project at Kyoto University Microcomputer Club (KMC)
- * FUJITA Norimasa, TAKAI Kousuke 1997-1998
- * rewritten by TAKAI Kousuke (as86 -> gas), Nov 1999
- *
- * Based on:
- * bootsect.S Copyright (C) 1991, 1992 Linus Torvalds
- * modified by Drew Eckhardt
- * modified by Bruce Evans (bde)
- *
- * bootsect.S is loaded at 0x1FC00 or 0x1FE00 by the bios-startup routines,
- * and moves itself out of the way to address 0x90000, and jumps there.
- *
- * It then loads 'setup' directly after itself (0x90200), and the system
- * at 0x10000, using BIOS interrupts.
- *
- * NOTE! currently system is at most (8*65536-4096) bytes long. This should
- * be no problem, even in the future. I want to keep it simple. This 508 kB
- * kernel size should be enough, especially as this doesn't contain the
- * buffer cache as in minix (and especially now that the kernel is
- * compressed :-)
- *
- * The loader has been made as simple as possible, and continuous
- * read errors will result in a unbreakable loop. Reboot by hand. It
- * loads pretty fast by getting whole tracks at a time whenever possible.
- */
-
-#include <linux/config.h> /* for CONFIG_ROOT_RDONLY */
-#include <asm/boot.h>
-
-SETUPSECTS = 4 /* default nr of setup-sectors */
-BOOTSEG = 0x1FC0 /* original address of boot-sector */
-INITSEG = DEF_INITSEG /* we move boot here - out of the way */
-SETUPSEG = DEF_SETUPSEG /* setup starts here */
-SYSSEG = DEF_SYSSEG /* system loaded at 0x10000 (65536) */
-SYSSIZE = DEF_SYSSIZE /* system size: # of 16-byte clicks */
- /* to be loaded */
-ROOT_DEV = 0 /* ROOT_DEV is now written by "build" */
-SWAP_DEV = 0 /* SWAP_DEV is now written by "build" */
-
-#ifndef SVGA_MODE
-#define SVGA_MODE ASK_VGA
-#endif
-
-#ifndef RAMDISK
-#define RAMDISK 0
-#endif
-
-#ifndef ROOT_RDONLY
-#define ROOT_RDONLY 1
-#endif
-
-/* normal/hireso text VRAM segments */
-#define NORMAL_TEXT 0xa000
-#define HIRESO_TEXT 0xe000
-
-/* bios work area addresses */
-#define EXPMMSZ 0x0401
-#define BIOS_FLAG 0x0501
-#define DISK_BOOT 0x0584
-
-.code16
-.text
-
-.global _start
-_start:
-
-#if 0 /* hook for debugger, harmless unless BIOS is fussy (old HP) */
- int $0x3
-#endif
- jmp real_start
- .ascii "Linux 98"
- .word 0
-real_start:
- xorw %di, %di /* %di = 0 */
- movw %di, %ss /* %ss = 0 */
- movw $0x03F0, %sp
- pushw %cx /* for hint */
-
- movw $0x0A00, %ax /* normal mode defaults (80x25) */
-
- testb $0x08, %ss:BIOS_FLAG /* check hi-reso bit */
- jnz set_crt_mode
-/*
- * Hi-Reso (high-resolution) machine.
- *
- * Some hi-reso machines have no RAMs on bank 8/A (0x080000 - 0x0BFFFF).
- * On such machines we get two RAM banks from top of protect menory and
- * map them on bank 8/A.
- * These work-around must be done before moving myself on INITSEG (0x090000-).
- */
- movw $(HIRESO_TEXT >> 8), %cs:(vram + 1) /* text VRAM segment */
-
- /* set memory window */
- movb $0x08, %al
- outb %al, $0x91 /* map native RAM (if any) */
- movb $0x0A, %al
- outb %al, $0x93
-
- /* check bank ram A */
- pushw $0xA500
- popw %ds
- movw (%di), %cx /* %si == 0 from entry */
- notw %cx
- movw %cx, (%di)
-
- movw $0x43F, %dx /* cache flush for 486 and up. */
- movb $0xA0, %al
- outb %al, %dx
-
- cmpw %cx, (%di)
- je hireso_done
-
- /*
- * Write test failed; we have no native RAM on 080000h - 0BFFFFh.
- * Take 256KB of RAM from top of protected memory.
- */
- movb %ss:EXPMMSZ, %al
- subb $2, %al /* reduce 2 x 128KB */
- movb %al, %ss:EXPMMSZ
- addb %al, %al
- addb $0x10, %al
- outb %al, $0x91
- addb $2, %al
- outb %al, $0x93
-
-hireso_done:
- movb $0x10, %al /* CRT mode 80x31, %ah still 0Ah */
-
-set_crt_mode:
- int $0x18 /* set CRT mode */
-
- movb $0x0C, %ah /* turn on text displaying */
- int $0x18
-
- xorw %dx, %dx /* position cursor to home */
- movb $0x13, %ah
- int $0x18
-
- movb $0x11, %ah /* turn cursor displaying on */
- int $0x18
-
- /* move 1 kilobytes from [BOOTSEG:0000h] to [INITSEG:0000h] */
- cld
- xorw %si, %si
- pushw $INITSEG
- popw %es
- movw $512, %cx /* %di == 0 from entry */
- rep
- cs
- movsw
-
- ljmp $INITSEG, $go
-
-go:
- pushw %cs
- popw %ds /* %ds = %cs */
-
- popw %dx /* %dh = saved %ch passed from BIOS */
- movb %ss:DISK_BOOT, %al
- andb $0xf0, %al /* %al = Device Address */
- movb $18, %ch /* 18 secs/track, 512 b/sec (1440 KB) */
- cmpb $0x30, %al
- je try512
- cmpb $0x90, %al /* 1 MB I/F, 1 MB floppy */
- je try1.2M
- cmpb $0xf0, %al /* 640 KB I/F, 1 MB floppy */
- je try1.2M
- movb $9, %ch /* 9 secs/track, 512 b/sec ( 720 KB) */
- cmpb $0x10, %al /* 1 MB I/F, 640 KB floppy */
- je try512
- cmpb $0x70, %al /* 640 KB I/F, 640 KB floppy */
- jne error /* unknown device? */
-
- /* XXX: Does it make sense to support 8 secs/track, 512 b/sec
- (640 KB) floppy? */
-
-try512: movb $2, %cl /* 512 b/sec */
-lasttry:call tryload
-/*
- * Display error message and halt
- */
-error: movw $error_msg, %si
- call print
-wait_reboot:
- movb $0x0, %ah
- int $0x18 /* wait keyboard input */
-1: movb $0, %al
- outb %al, $0xF0 /* reset CPU */
- jmp 1b /* just in case... */
-
-try1.2M:cmpb $2, %dh
- je try2HC
- movw $0x0803, %cx /* 8 secs/track, 1024 b/sec (1232 KB) */
- call tryload
- movb $15, %ch /* 15 secs/track, 512 b/sec (1200 KB) */
- jmp try512
-try2HC: movw $0x0F02, %cx /* 15 secs/track, 512 b/sec (1200 KB) */
- call tryload
- movw $0x0803, %cx /* 8 secs/track, 1024 b/sec (1232 KB) */
- jmp lasttry
-
-/*
- * Try to load SETUP and SYSTEM provided geometry information in %cx.
- * This routine *will not* return on successful load...
- */
-tryload:
- movw %cx, sectlen
- movb %ss:DISK_BOOT, %al
- movb $0x7, %ah /* recalibrate the drive */
- int $0x1b
- jc error /* recalibration should succeed */
-
- /*
- * Load SETUP into memory. It is assumed that SETUP fits into
- * first cylinder (2 tracks, 9KB on 2DD, 15-18KB on 2HD).
- */
- movb $0, %bl
- movb setup_sects, %bh
- incb %bh
- shlw %bx /* %bx = (setup_sects + 1) * 512 */
- movw $128, %bp
- shlw %cl, %bp /* %bp = <sector size> */
- subw %bp, %bx /* length to load */
- movw $0x0002, %dx /* head 0, sector 2 */
- movb %cl, %ch /* `N' for sector address */
- movb $0, %cl /* cylinder 0 */
- pushw %cs
- popw %es /* %es = %cs (= INITSEG) */
- movb $0xd6, %ah /* read, multi-track, MFM */
- int $0x1b /* load it! */
- jc read_error
-
- movw $loading_msg, %si
- call print
-
- movw $SYSSEG, %ax
- movw %ax, %es /* %es = SYSSEG */
-
-/*
- * This routine loads the system at address 0x10000, making sure
- * no 64kB boundaries are crossed. We try to load it as fast as
- * possible, loading whole tracks whenever we can.
- *
- * in: es - starting address segment (normally 0x1000)
- */
- movb %ch, %cl
- addb $7, %cl /* %cl = log2 <sector_size> */
- shrw %cl, %bx /* %bx = # of phys. sectors in SETUP */
- addb %bl, %dl /* %dl = start sector # of SYSTEM */
- decb %dl /* %dl is 0-based in below loop */
-
-rp_read_newseg:
- xorw %bp, %bp /* = starting address within segment */
-#ifdef __BIG_KERNEL__
- bootsect_kludge = 0x220 /* 0x200 (size of bootsector) + 0x20 (offset */
- lcall *bootsect_kludge /* of bootsect_kludge in setup.S */
-#else
- movw %es, %ax
- subw $SYSSEG, %ax
-#endif
- cmpw syssize, %ax
- ja boot /* done! */
-
-rp_read:
- movb sectors, %al
- addb %al, %al
- movb %al, %ch /* # of sectors on both surface */
- subb %dl, %al /* # of sectors left on this track */
- movb $0, %ah
- shlw %cl, %ax /* # of bytes left on this track */
- movw %ax, %bx /* transfer length */
- addw %bp, %ax /* cross 64K boundary? */
- jnc 1f /* ok. */
- jz 1f /* also ok. */
- /*
- * Oops, we are crossing 64K boundary...
- * Adjust transfer length to make transfer fit in the boundary.
- *
- * Note: sector size is assumed to be a measure of 65536.
- */
- xorw %bx, %bx
- subw %bp, %bx
-1: pushw %dx
- movw $dot_msg, %si /* give progress message */
- call print
- xchgw %ax, %dx
- movb $0, %ah
- divb sectors
- xchgb %al, %ah
- xchgw %ax, %dx /* %dh = head # / %dl = sector # */
- incb %dl /* fix %dl to 1-based */
- pushw %cx
- movw cylinder, %cx
- movb $0xd6, %ah /* read, multi-track, seek, MFM */
- movb %ss:DISK_BOOT, %al
- int $0x1b
- popw %cx
- popw %dx
- jc read_error
- movw %bx, %ax /* # of bytes just read */
- shrw %cl, %ax /* %ax = # of sectors just read */
- addb %al, %dl /* advance sector # */
- cmpb %ch, %dl /* %ch = # of sectors/cylinder */
- jb 2f
- incb cylinder /* next cylinder */
- xorb %dl, %dl /* sector 0 */
-2: addw %bx, %bp /* advance offset pointer */
- jnc rp_read
- /* offset pointer wrapped; advance segment pointer. */
- movw %es, %ax
- addw $0x1000, %ax
- movw %ax, %es
- jmp rp_read_newseg
-
-read_error:
- ret
-
-boot: movw %cs, %ax /* = INITSEG */
- /* movw %ax, %ds */
- movw %ax, %ss
- movw $0x4000, %sp /* 0x4000 is arbitrary value >=
- * length of bootsect + length of
- * setup + room for stack;
- * PC-9800 never have BIOS workareas
- * on high memory.
- */
-/*
- * After that we check which root-device to use. If the device is
- * not defined, /dev/fd0 (2, 0) will be used.
- */
- cmpw $0, root_dev
- jne 3f
- movb $2, root_dev+1
-3:
-
-/*
- * After that (everything loaded), we jump to the setup-routine
- * loaded directly after the bootblock:
- */
- ljmp $SETUPSEG, $0
-
-/*
- * Subroutine for print string on console.
- * %cs:%si - pointer to message
- */
-print:
- pushaw
- pushw %ds
- pushw %es
- pushw %cs
- popw %ds
- lesw curpos, %di /* %es:%di = current text VRAM addr. */
-1: xorw %ax, %ax
- lodsb
- testb %al, %al
- jz 2f /* end of string */
- stosw /* character code */
- movb $0xE1, %es:0x2000-2(%di) /* character attribute */
- jmp 1b
-2: movw %di, %dx
- movb $0x13, %ah
- int $0x18 /* move cursor to current point */
- popw %es
- popw %ds
- popaw
- ret
-
-loading_msg:
- .string "Loading"
-dot_msg:
- .string "."
-error_msg:
- .string "Read Error!"
-
- .org 490
-
-curpos: .word 160 /* current cursor position */
-vram: .word NORMAL_TEXT /* text VRAM segment */
-
-cylinder: .byte 0 /* current cylinder (lower byte) */
-sectlen: .byte 0 /* (log2 of <sector size>) - 7 */
-sectors: .byte 0x0F /* default is 2HD (15 sector/track) */
-
-# XXX: This is a fairly snug fit.
-
-.org 497
-setup_sects: .byte SETUPSECTS
-root_flags: .word ROOT_RDONLY
-syssize: .word SYSSIZE
-swap_dev: .word SWAP_DEV
-ram_size: .word RAMDISK
-vid_mode: .word SVGA_MODE
-root_dev: .word ROOT_DEV
-boot_flag: .word 0xAA55
+++ /dev/null
-#
-# linux/arch/i386/boot/compressed/Makefile
-#
-# create a compressed vmlinux image from the original vmlinux
-#
-
-targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o
-EXTRA_AFLAGS := -traditional
-
-LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup_32
-
-$(obj)/vmlinux: $(obj)/head.o $(obj)/misc.o $(obj)/piggy.o FORCE
- $(call if_changed,ld)
- @:
-
-$(obj)/vmlinux.bin: vmlinux FORCE
- $(call if_changed,objcopy)
-
-$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
- $(call if_changed,gzip)
-
-LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T
-
-$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
- $(call if_changed,ld)
+++ /dev/null
-/*
- * linux/boot/head.S
- *
- * Copyright (C) 1991, 1992, 1993 Linus Torvalds
- */
-
-/*
- * head.S contains the 32-bit startup code.
- *
- * NOTE!!! Startup happens at absolute address 0x00001000, which is also where
- * the page directory will exist. The startup code will be overwritten by
- * the page directory. [According to comments etc elsewhere on a compressed
- * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC]
- *
- * Page 0 is deliberately kept safe, since System Management Mode code in
- * laptops may need to access the BIOS data stored there. This is also
- * useful for future device drivers that either access the BIOS via VM86
- * mode.
- */
-
-/*
- * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
- */
-.text
-
-#include <linux/linkage.h>
-#include <asm/segment.h>
-
- .globl startup_32
-
-startup_32:
- cld
- cli
- movl $(__BOOT_DS),%eax
- movl %eax,%ds
- movl %eax,%es
- movl %eax,%fs
- movl %eax,%gs
-
- lss stack_start,%esp
- xorl %eax,%eax
-1: incl %eax # check that A20 really IS enabled
- movl %eax,0x000000 # loop forever if it isn't
- cmpl %eax,0x100000
- je 1b
-
-/*
- * Initialize eflags. Some BIOS's leave bits like NT set. This would
- * confuse the debugger if this code is traced.
- * XXX - best to initialize before switching to protected mode.
- */
- pushl $0
- popfl
-/*
- * Clear BSS
- */
- xorl %eax,%eax
- movl $_edata,%edi
- movl $_end,%ecx
- subl %edi,%ecx
- cld
- rep
- stosb
-/*
- * Do the decompression, and jump to the new kernel..
- */
- subl $16,%esp # place for structure on the stack
- movl %esp,%eax
- pushl %esi # real mode pointer as second arg
- pushl %eax # address of structure as first arg
- call decompress_kernel
- orl %eax,%eax
- jnz 3f
- popl %esi # discard address
- popl %esi # real mode pointer
- xorl %ebx,%ebx
- ljmp $(__BOOT_CS), $0x100000
-
-/*
- * We come here, if we were loaded high.
- * We need to move the move-in-place routine down to 0x1000
- * and then start it with the buffer addresses in registers,
- * which we got from the stack.
- */
-3:
- movl $move_routine_start,%esi
- movl $0x1000,%edi
- movl $move_routine_end,%ecx
- subl %esi,%ecx
- addl $3,%ecx
- shrl $2,%ecx
- cld
- rep
- movsl
-
- popl %esi # discard the address
- popl %ebx # real mode pointer
- popl %esi # low_buffer_start
- popl %ecx # lcount
- popl %edx # high_buffer_start
- popl %eax # hcount
- movl $0x100000,%edi
- cli # make sure we don't get interrupted
- ljmp $(__BOOT_CS), $0x1000 # and jump to the move routine
-
-/*
- * Routine (template) for moving the decompressed kernel in place,
- * if we were high loaded. This _must_ PIC-code !
- */
-move_routine_start:
- movl %ecx,%ebp
- shrl $2,%ecx
- rep
- movsl
- movl %ebp,%ecx
- andl $3,%ecx
- rep
- movsb
- movl %edx,%esi
- movl %eax,%ecx # NOTE: rep movsb won't move if %ecx == 0
- addl $3,%ecx
- shrl $2,%ecx
- rep
- movsl
- movl %ebx,%esi # Restore setup pointer
- xorl %ebx,%ebx
- ljmp $(__BOOT_CS), $0x100000
-move_routine_end:
+++ /dev/null
-/*
- * misc.c
- *
- * This is a collection of several routines from gzip-1.0.3
- * adapted for Linux.
- *
- * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
- * puts by Nick Holloway 1993, better puts by Martin Mares 1995
- * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
- */
-
-#include <linux/linkage.h>
-#include <linux/vmalloc.h>
-#include <linux/tty.h>
-#include <asm/io.h>
-#ifdef STANDARD_MEMORY_BIOS_CALL
-#undef STANDARD_MEMORY_BIOS_CALL
-#endif
-
-/*
- * gzip declarations
- */
-
-#define OF(args) args
-#define STATIC static
-
-#undef memset
-#undef memcpy
-
-/*
- * Why do we do this? Don't ask me..
- *
- * Incomprehensible are the ways of bootloaders.
- */
-static void* memset(void *, int, size_t);
-static void* memcpy(void *, __const void *, size_t);
-#define memzero(s, n) memset ((s), 0, (n))
-
-typedef unsigned char uch;
-typedef unsigned short ush;
-typedef unsigned long ulg;
-
-#define WSIZE 0x8000 /* Window size must be at least 32k, */
- /* and a power of two */
-
-static uch *inbuf; /* input buffer */
-static uch window[WSIZE]; /* Sliding window buffer */
-
-static unsigned insize = 0; /* valid bytes in inbuf */
-static unsigned inptr = 0; /* index of next byte to be processed in inbuf */
-static unsigned outcnt = 0; /* bytes in output buffer */
-
-/* gzip flag byte */
-#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
-#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
-#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
-#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
-#define COMMENT 0x10 /* bit 4 set: file comment present */
-#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
-#define RESERVED 0xC0 /* bit 6,7: reserved */
-
-#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
-
-/* Diagnostic functions */
-#ifdef DEBUG
-# define Assert(cond,msg) {if(!(cond)) error(msg);}
-# define Trace(x) fprintf x
-# define Tracev(x) {if (verbose) fprintf x ;}
-# define Tracevv(x) {if (verbose>1) fprintf x ;}
-# define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
-# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
-#else
-# define Assert(cond,msg)
-# define Trace(x)
-# define Tracev(x)
-# define Tracevv(x)
-# define Tracec(c,x)
-# define Tracecv(c,x)
-#endif
-
-static int fill_inbuf(void);
-static void flush_window(void);
-static void error(char *m);
-static void gzip_mark(void **);
-static void gzip_release(void **);
-
-/*
- * This is set up by the setup-routine at boot-time
- */
-static unsigned char *real_mode; /* Pointer to real-mode data */
-
-#define EXT_MEM_K (*(unsigned short *)(real_mode + 0x2))
-#ifndef STANDARD_MEMORY_BIOS_CALL
-#define ALT_MEM_K (*(unsigned long *)(real_mode + 0x1e0))
-#endif
-#define SCREEN_INFO (*(struct screen_info *)(real_mode+0))
-
-extern char input_data[];
-extern int input_len;
-
-static long bytes_out = 0;
-static uch *output_data;
-static unsigned long output_ptr = 0;
-
-static void *malloc(int size);
-static void free(void *where);
-
-static void puts(const char *);
-
-extern int end;
-static long free_mem_ptr = (long)&end;
-static long free_mem_end_ptr;
-
-#define INPLACE_MOVE_ROUTINE 0x1000
-#define LOW_BUFFER_START 0x2000
-#define LOW_BUFFER_MAX 0x90000
-#define HEAP_SIZE 0x3000
-static unsigned int low_buffer_end, low_buffer_size;
-static int high_loaded =0;
-static uch *high_buffer_start /* = (uch *)(((ulg)&end) + HEAP_SIZE)*/;
-
-static char *vidmem = (char *)0xa0000;
-static int lines, cols;
-
-#ifdef CONFIG_X86_NUMAQ
-static void * xquad_portio = NULL;
-#endif
-
-#include "../../../../lib/inflate.c"
-
-static void *malloc(int size)
-{
- void *p;
-
- if (size <0) error("Malloc error");
- if (free_mem_ptr <= 0) error("Memory error");
-
- free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */
-
- p = (void *)free_mem_ptr;
- free_mem_ptr += size;
-
- if (free_mem_ptr >= free_mem_end_ptr)
- error("Out of memory");
-
- return p;
-}
-
-static void free(void *where)
-{ /* Don't care */
-}
-
-static void gzip_mark(void **ptr)
-{
- *ptr = (void *) free_mem_ptr;
-}
-
-static void gzip_release(void **ptr)
-{
- free_mem_ptr = (long) *ptr;
-}
-
-static void scroll(void)
-{
- int i;
-
- memcpy ( vidmem, vidmem + cols * 2, ( lines - 1 ) * cols * 2 );
- for ( i = ( lines - 1 ) * cols * 2; i < lines * cols * 2; i += 2 )
- vidmem[i] = ' ';
-}
-
-static void puts(const char *s)
-{
- int x,y,pos;
- char c;
-
- x = SCREEN_INFO.orig_x;
- y = SCREEN_INFO.orig_y;
-
- while ( ( c = *s++ ) != '\0' ) {
- if ( c == '\n' ) {
- x = 0;
- if ( ++y >= lines ) {
- scroll();
- y--;
- }
- } else {
- vidmem [ ( x + cols * y ) * 2 ] = c;
- if ( ++x >= cols ) {
- x = 0;
- if ( ++y >= lines ) {
- scroll();
- y--;
- }
- }
- }
- }
-
- SCREEN_INFO.orig_x = x;
- SCREEN_INFO.orig_y = y;
-
- pos = x + cols * y; /* Update cursor position */
- while (!(inb_p(0x60) & 4));
- outb_p(0x49, 0x62);
- outb_p(pos & 0xff, 0x60);
- outb_p((pos >> 8) & 0xff, 0x60);
-}
-
-static void* memset(void* s, int c, size_t n)
-{
- int i;
- char *ss = (char*)s;
-
- for (i=0;i<n;i++) ss[i] = c;
- return s;
-}
-
-static void* memcpy(void* __dest, __const void* __src,
- size_t __n)
-{
- int i;
- char *d = (char *)__dest, *s = (char *)__src;
-
- for (i=0;i<__n;i++) d[i] = s[i];
- return __dest;
-}
-
-/* ===========================================================================
- * Fill the input buffer. This is called only when the buffer is empty
- * and at least one byte is really needed.
- */
-static int fill_inbuf(void)
-{
- if (insize != 0) {
- error("ran out of input data");
- }
-
- inbuf = input_data;
- insize = input_len;
- inptr = 1;
- return inbuf[0];
-}
-
-/* ===========================================================================
- * Write the output window window[0..outcnt-1] and update crc and bytes_out.
- * (Used for the decompressed data only.)
- */
-static void flush_window_low(void)
-{
- ulg c = crc; /* temporary variable */
- unsigned n;
- uch *in, *out, ch;
-
- in = window;
- out = &output_data[output_ptr];
- for (n = 0; n < outcnt; n++) {
- ch = *out++ = *in++;
- c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
- }
- crc = c;
- bytes_out += (ulg)outcnt;
- output_ptr += (ulg)outcnt;
- outcnt = 0;
-}
-
-static void flush_window_high(void)
-{
- ulg c = crc; /* temporary variable */
- unsigned n;
- uch *in, ch;
- in = window;
- for (n = 0; n < outcnt; n++) {
- ch = *output_data++ = *in++;
- if ((ulg)output_data == low_buffer_end) output_data=high_buffer_start;
- c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
- }
- crc = c;
- bytes_out += (ulg)outcnt;
- outcnt = 0;
-}
-
-static void flush_window(void)
-{
- if (high_loaded) flush_window_high();
- else flush_window_low();
-}
-
-static void error(char *x)
-{
- puts("\n\n");
- puts(x);
- puts("\n\n -- System halted");
-
- while(1); /* Halt */
-}
-
-#define STACK_SIZE (4096)
-
-long user_stack [STACK_SIZE];
-
-struct {
- long * a;
- short b;
- } stack_start = { & user_stack [STACK_SIZE] , __BOOT_DS };
-
-static void setup_normal_output_buffer(void)
-{
-#ifdef STANDARD_MEMORY_BIOS_CALL
- if (EXT_MEM_K < 1024) error("Less than 2MB of memory");
-#else
- if ((ALT_MEM_K > EXT_MEM_K ? ALT_MEM_K : EXT_MEM_K) < 1024) error("Less than 2MB of memory");
-#endif
- output_data = (char *)0x100000; /* Points to 1M */
- free_mem_end_ptr = (long)real_mode;
-}
-
-struct moveparams {
- uch *low_buffer_start; int lcount;
- uch *high_buffer_start; int hcount;
-};
-
-static void setup_output_buffer_if_we_run_high(struct moveparams *mv)
-{
- high_buffer_start = (uch *)(((ulg)&end) + HEAP_SIZE);
-#ifdef STANDARD_MEMORY_BIOS_CALL
- if (EXT_MEM_K < (3*1024)) error("Less than 4MB of memory");
-#else
- if ((ALT_MEM_K > EXT_MEM_K ? ALT_MEM_K : EXT_MEM_K) < (3*1024)) error("Less than 4MB of memory");
-#endif
- mv->low_buffer_start = output_data = (char *)LOW_BUFFER_START;
- low_buffer_end = ((unsigned int)real_mode > LOW_BUFFER_MAX
- ? LOW_BUFFER_MAX : (unsigned int)real_mode) & ~0xfff;
- low_buffer_size = low_buffer_end - LOW_BUFFER_START;
- high_loaded = 1;
- free_mem_end_ptr = (long)high_buffer_start;
- if ( (0x100000 + low_buffer_size) > ((ulg)high_buffer_start)) {
- high_buffer_start = (uch *)(0x100000 + low_buffer_size);
- mv->hcount = 0; /* say: we need not to move high_buffer */
- }
- else mv->hcount = -1;
- mv->high_buffer_start = high_buffer_start;
-}
-
-static void close_output_buffer_if_we_run_high(struct moveparams *mv)
-{
- if (bytes_out > low_buffer_size) {
- mv->lcount = low_buffer_size;
- if (mv->hcount)
- mv->hcount = bytes_out - low_buffer_size;
- } else {
- mv->lcount = bytes_out;
- mv->hcount = 0;
- }
-}
-
-
-asmlinkage int decompress_kernel(struct moveparams *mv, void *rmode)
-{
- real_mode = rmode;
-
- vidmem = (char *)(((unsigned int)SCREEN_INFO.orig_video_page) << 4);
-
- lines = SCREEN_INFO.orig_video_lines;
- cols = SCREEN_INFO.orig_video_cols;
-
- if (free_mem_ptr < 0x100000) setup_normal_output_buffer();
- else setup_output_buffer_if_we_run_high(mv);
-
- makecrc();
- puts("Uncompressing Linux... ");
- gunzip();
- puts("Ok, booting the kernel.\n");
- if (high_loaded) close_output_buffer_if_we_run_high(mv);
- return high_loaded;
-}
-
-/* We don't actually check for stack overflows this early. */
-__asm__(".globl mcount ; mcount: ret\n");
-
+++ /dev/null
-SECTIONS
-{
- .data : {
- input_len = .;
- LONG(input_data_end - input_data) input_data = .;
- *(.data)
- input_data_end = .;
- }
-}
+++ /dev/null
-#!/bin/sh
-#
-# arch/i386/boot/install.sh
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1995 by Linus Torvalds
-#
-# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
-#
-# "make install" script for i386 architecture
-#
-# Arguments:
-# $1 - kernel version
-# $2 - kernel image file
-# $3 - kernel map file
-# $4 - default install path (blank if root directory)
-#
-
-# User may have a custom install script
-
-if [ -x ~/bin/installkernel ]; then exec ~/bin/installkernel "$@"; fi
-if [ -x /sbin/installkernel ]; then exec /sbin/installkernel "$@"; fi
-
-# Default install - same as make zlilo
-
-if [ -f $4/vmlinuz ]; then
- mv $4/vmlinuz $4/vmlinuz.old
-fi
-
-if [ -f $4/System.map ]; then
- mv $4/System.map $4/System.old
-fi
-
-cat $2 > $4/vmlinuz
-cp $3 $4/System.map
-
-if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi
+++ /dev/null
-#
-# mtools configuration file for "make (b)zdisk"
-#
-
-# Actual floppy drive
-drive a:
- file="/dev/fd0"
-
-# 1.44 MB floppy disk image
-drive v:
- file="@OBJ@/fdimage" cylinders=80 heads=2 sectors=18 filter
-
-# 2.88 MB floppy disk image (mostly for virtual uses)
-drive w:
- file="@OBJ@/fdimage" cylinders=80 heads=2 sectors=36 filter
-
-
+++ /dev/null
-/*
- * setup.S Copyright (C) 1991, 1992 Linus Torvalds
- *
- * setup.s is responsible for getting the system data from the BIOS,
- * and putting them into the appropriate places in system memory.
- * both setup.s and system has been loaded by the bootblock.
- *
- * This code asks the bios for memory/disk/other parameters, and
- * puts them in a "safe" place: 0x90000-0x901FF, ie where the
- * boot-block used to be. It is then up to the protected mode
- * system to read them from there before the area is overwritten
- * for buffer-blocks.
- *
- * Move PS/2 aux init code to psaux.c
- * (troyer@saifr00.cfsat.Honeywell.COM) 03Oct92
- *
- * some changes and additional features by Christoph Niemann,
- * March 1993/June 1994 (Christoph.Niemann@linux.org)
- *
- * add APM BIOS checking by Stephen Rothwell, May 1994
- * (sfr@canb.auug.org.au)
- *
- * High load stuff, initrd support and position independency
- * by Hans Lermen & Werner Almesberger, February 1996
- * <lermen@elserv.ffm.fgan.de>, <almesber@lrc.epfl.ch>
- *
- * Video handling moved to video.S by Martin Mares, March 1996
- * <mj@k332.feld.cvut.cz>
- *
- * Extended memory detection scheme retwiddled by orc@pell.chi.il.us (david
- * parsons) to avoid loadlin confusion, July 1997
- *
- * Transcribed from Intel (as86) -> AT&T (gas) by Chris Noe, May 1999.
- * <stiker@northlink.com>
- *
- * Fix to work around buggy BIOSes which dont use carry bit correctly
- * and/or report extended memory in CX/DX for e801h memory size detection
- * call. As a result the kernel got wrong figures. The int15/e801h docs
- * from Ralf Brown interrupt list seem to indicate AX/BX should be used
- * anyway. So to avoid breaking many machines (presumably there was a reason
- * to orginally use CX/DX instead of AX/BX), we do a kludge to see
- * if CX/DX have been changed in the e801 call and if so use AX/BX .
- * Michael Miller, April 2001 <michaelm@mjmm.org>
- *
- * New A20 code ported from SYSLINUX by H. Peter Anvin. AMD Elan bugfixes
- * by Robert Schwebel, December 2001 <robert@schwebel.de>
- *
- * Heavily modified for NEC PC-9800 series by Kyoto University Microcomputer
- * Club (KMC) Linux/98 project <seraphim@kmc.kyoto-u.ac.jp>, 1997-1999
- */
-
-#include <linux/config.h>
-#include <asm/segment.h>
-#include <linux/version.h>
-#include <linux/compile.h>
-#include <asm/boot.h>
-#include <asm/e820.h>
-#include <asm/page.h>
-
-/* Signature words to ensure LILO loaded us right */
-#define SIG1 0xAA55
-#define SIG2 0x5A5A
-
-#define HIRESO_TEXT 0xe000
-#define NORMAL_TEXT 0xa000
-
-#define BIOS_FLAG2 0x0400
-#define BIOS_FLAG5 0x0458
-#define RDISK_EQUIP 0x0488
-#define BIOS_FLAG 0x0501
-#define KB_SHFT_STS 0x053a
-#define DISK_EQUIP 0x055c
-
-INITSEG = DEF_INITSEG # 0x9000, we move boot here, out of the way
-SYSSEG = DEF_SYSSEG # 0x1000, system loaded at 0x10000 (65536).
-SETUPSEG = DEF_SETUPSEG # 0x9020, this is the current segment
- # ... and the former contents of CS
-
-DELTA_INITSEG = SETUPSEG - INITSEG # 0x0020
-
-.code16
-.globl begtext, begdata, begbss, endtext, enddata, endbss
-
-.text
-begtext:
-.data
-begdata:
-.bss
-begbss:
-.text
-
-start:
- jmp trampoline
-
-# This is the setup header, and it must start at %cs:2 (old 0x9020:2)
-
- .ascii "HdrS" # header signature
- .word 0x0203 # header version number (>= 0x0105)
- # or else old loadlin-1.5 will fail)
-realmode_swtch: .word 0, 0 # default_switch, SETUPSEG
-start_sys_seg: .word SYSSEG
- .word kernel_version # pointing to kernel version string
- # above section of header is compatible
- # with loadlin-1.5 (header v1.5). Don't
- # change it.
-
-type_of_loader: .byte 0 # = 0, old one (LILO, Loadlin,
- # Bootlin, SYSLX, bootsect...)
- # See Documentation/i386/boot.txt for
- # assigned ids
-
-# flags, unused bits must be zero (RFU) bit within loadflags
-loadflags:
-LOADED_HIGH = 1 # If set, the kernel is loaded high
-CAN_USE_HEAP = 0x80 # If set, the loader also has set
- # heap_end_ptr to tell how much
- # space behind setup.S can be used for
- # heap purposes.
- # Only the loader knows what is free
-#ifndef __BIG_KERNEL__
- .byte 0
-#else
- .byte LOADED_HIGH
-#endif
-
-setup_move_size: .word 0x8000 # size to move, when setup is not
- # loaded at 0x90000. We will move setup
- # to 0x90000 then just before jumping
- # into the kernel. However, only the
- # loader knows how much data behind
- # us also needs to be loaded.
-
-code32_start: # here loaders can put a different
- # start address for 32-bit code.
-#ifndef __BIG_KERNEL__
- .long 0x1000 # 0x1000 = default for zImage
-#else
- .long 0x100000 # 0x100000 = default for big kernel
-#endif
-
-ramdisk_image: .long 0 # address of loaded ramdisk image
- # Here the loader puts the 32-bit
- # address where it loaded the image.
- # This only will be read by the kernel.
-
-ramdisk_size: .long 0 # its size in bytes
-
-bootsect_kludge:
- .long 0 # obsolete
-
-heap_end_ptr: .word modelist+1024 # (Header version 0x0201 or later)
- # space from here (exclusive) down to
- # end of setup code can be used by setup
- # for local heap purposes.
-
-pad1: .word 0
-cmd_line_ptr: .long 0 # (Header version 0x0202 or later)
- # If nonzero, a 32-bit pointer
- # to the kernel command line.
- # The command line should be
- # located between the start of
- # setup and the end of low
- # memory (0xa0000), or it may
- # get overwritten before it
- # gets read. If this field is
- # used, there is no longer
- # anything magical about the
- # 0x90000 segment; the setup
- # can be located anywhere in
- # low memory 0x10000 or higher.
-
-ramdisk_max: .long MAXMEM-1 # (Header version 0x0203 or later)
- # The highest safe address for
- # the contents of an initrd
-
-trampoline: call start_of_setup
- .space 1024
-# End of setup header #####################################################
-
-start_of_setup:
-# Set %ds = %cs, we know that SETUPSEG = %cs at this point
- movw %cs, %ax # aka SETUPSEG
- movw %ax, %ds
-# Check signature at end of setup
- cmpw $SIG1, setup_sig1
- jne bad_sig
-
- cmpw $SIG2, setup_sig2
- jne bad_sig
-
- jmp good_sig1
-
-# Routine to print asciiz string at ds:si
-prtstr:
- lodsb
- andb %al, %al
- jz fin
-
- call prtchr
- jmp prtstr
-
-fin: ret
-
-no_sig_mess: .string "No setup signature found ..."
-
-good_sig1:
- jmp good_sig
-
-# We now have to find the rest of the setup code/data
-bad_sig:
- movw %cs, %ax # SETUPSEG
- subw $DELTA_INITSEG, %ax # INITSEG
- movw %ax, %ds
- xorb %bh, %bh
- movb (497), %bl # get setup sect from bootsect
- subw $4, %bx # LILO loads 4 sectors of setup
- shlw $8, %bx # convert to words (1sect=2^8 words)
- movw %bx, %cx
- shrw $3, %bx # convert to segment
- addw $SYSSEG, %bx
- movw %bx, %cs:start_sys_seg
-# Move rest of setup code/data to here
- movw $2048, %di # four sectors loaded by LILO
- subw %si, %si
- pushw %cs
- popw %es
- movw $SYSSEG, %ax
- movw %ax, %ds
- rep
- movsw
- movw %cs, %ax # aka SETUPSEG
- movw %ax, %ds
- cmpw $SIG1, setup_sig1
- jne no_sig
-
- cmpw $SIG2, setup_sig2
- jne no_sig
-
- jmp good_sig
-
-no_sig:
- lea no_sig_mess, %si
- call prtstr
-
-no_sig_loop:
- hlt
- jmp no_sig_loop
-
-good_sig:
- movw %cs, %ax # aka SETUPSEG
- subw $DELTA_INITSEG, %ax # aka INITSEG
- movw %ax, %ds
-# Check if an old loader tries to load a big-kernel
- testb $LOADED_HIGH, %cs:loadflags # Do we have a big kernel?
- jz loader_ok # No, no danger for old loaders.
-
- cmpb $0, %cs:type_of_loader # Do we have a loader that
- # can deal with us?
- jnz loader_ok # Yes, continue.
-
- pushw %cs # No, we have an old loader,
- popw %ds # die.
- lea loader_panic_mess, %si
- call prtstr
-
- jmp no_sig_loop
-
-loader_panic_mess: .string "Wrong loader, giving up..."
-
-loader_ok:
-# Get memory size (extended mem, kB)
-
-# On PC-9800, memory size detection is done completely in 32-bit
-# kernel initialize code (kernel/setup.c).
- pushw %es
- xorl %eax, %eax
- movw %ax, %es
- movb %al, (E820NR) # PC-9800 has no E820
- movb %es:(0x401), %al
- shll $7, %eax
- addw $1024, %ax
- movw %ax, (2)
- movl %eax, (0x1e0)
- movw %es:(0x594), %ax
- shll $10, %eax
- addl %eax, (0x1e0)
- popw %es
-
-# Check for video adapter and its parameters and allow the
-# user to browse video modes.
- call video # NOTE: we need %ds pointing
- # to bootsector
-
-# Get text video mode
- movb $0x0B, %ah
- int $0x18 # CRT mode sense
- movw $(20 << 8) + 40, %cx
- testb $0x10, %al
- jnz 3f
- movb $20, %ch
- testb $0x01, %al
- jnz 1f
- movb $25, %ch
- jmp 1f
-3: # If bit 4 was 1, it means either 1) 31 lines for hi-reso mode,
- # or 2) 30 lines for PC-9821.
- movb $31, %ch # hireso mode value
- pushw $0
- popw %es
- testb $0x08, %es:BIOS_FLAG
- jnz 1f
- movb $30, %ch
-1: # Now we got # of rows in %ch
- movb %ch, (14)
-
- testb $0x02, %al
- jnz 2f
- movb $80, %cl
-2: # Now we got # of columns in %cl
- movb %cl, (7)
-
- # Next, get horizontal frequency if supported
- movw $0x3100, %ax
- int $0x18 # Call CRT bios
- movb %al, (6) # If 31h is unsupported, %al remains 0
-
-# Get hd0-3 data...
- pushw %ds # aka INITSEG
- popw %es
- xorw %ax, %ax
- movw %ax, %ds
- cld
- movw $0x0080, %di
- movb DISK_EQUIP+1, %ah
- movb $0x80, %al
-
-get_hd_info:
- shrb %ah
- pushw %ax
- jnc 1f
- movb $0x84, %ah
- int $0x1b
- jnc 2f # Success
-1: xorw %cx, %cx # `0 cylinders' means no drive
-2: # Attention! Work area (drive_info) is arranged for PC-9800.
- movw %cx, %ax # # of cylinders
- stosw
- movw %dx, %ax # # of sectors / # of heads
- stosw
- movw %bx, %ax # sector size in bytes
- stosw
- popw %ax
- incb %al
- cmpb $0x84, %al
- jb get_hd_info
-
-# Get fd data...
- movw DISK_EQUIP, %ax
- andw $0xf00f, %ax
- orb %al, %ah
- movb RDISK_EQUIP, %al
- notb %al
- andb %al, %ah # ignore all `RAM drive'
-
- movb $0x30, %al
-
-get_fd_info:
- shrb %ah
- pushw %ax
- jnc 1f
- movb $0xc4, %ah
- int $0x1b
- movb %ah, %al
- andb $4, %al # 1.44MB support flag
- shrb %al
- addb $2, %al # %al = 2 (1.2MB) or 4 (1.44MB)
- jmp 2f
-1: movb $0, %al # no drive
-2: stosb
- popw %ax
- incb %al
- testb $0x04, %al
- jz get_fd_info
-
- addb $(0xb0 - 0x34), %al
- jnc get_fd_info # check FDs on 640KB I/F
-
- pushw %es
- popw %ds # %ds got bootsector again
-#if 0
- mov $0, (0x1ff) # default is no pointing device
-#endif
-
-#if defined(CONFIG_APM) || defined(CONFIG_APM_MODULE)
-# Then check for an APM BIOS...
- # %ds points to the bootsector
- movw $0, 0x40 # version = 0 means no APM BIOS
- movw $0x09a00, %ax # APM BIOS installation check
- xorw %bx, %bx
- int $0x1f
- jc done_apm_bios # Nope, no APM BIOS
-
- cmpw $0x0504d, %bx # Check for "PM" signature
- jne done_apm_bios # No signature, no APM BIOS
-
- testb $0x02, %cl # Is 32 bit supported?
- je done_apm_bios # No 32-bit, no (good) APM BIOS
-
- movw $0x09a04, %ax # Disconnect first just in case
- xorw %bx, %bx
- int $0x1f # ignore return code
- movw $0x09a03, %ax # 32 bit connect
- xorl %ebx, %ebx
- int $0x1f
- jc no_32_apm_bios # Ack, error.
-
- movw %ax, (66) # BIOS code segment
- movl %ebx, (68) # BIOS entry point offset
- movw %cx, (72) # BIOS 16 bit code segment
- movw %dx, (74) # BIOS data segment
- movl %esi, (78) # BIOS code segment length
- movw %di, (82) # BIOS data segment length
-# Redo the installation check as the 32 bit connect
-# modifies the flags returned on some BIOSs
- movw $0x09a00, %ax # APM BIOS installation check
- xorw %bx, %bx
- int $0x1f
- jc apm_disconnect # error -> shouldn't happen
-
- cmpw $0x0504d, %bx # check for "PM" signature
- jne apm_disconnect # no sig -> shouldn't happen
-
- movw %ax, (64) # record the APM BIOS version
- movw %cx, (76) # and flags
- jmp done_apm_bios
-
-apm_disconnect: # Tidy up
- movw $0x09a04, %ax # Disconnect
- xorw %bx, %bx
- int $0x1f # ignore return code
-
- jmp done_apm_bios
-
-no_32_apm_bios:
- andw $0xfffd, (76) # remove 32 bit support bit
-done_apm_bios:
-#endif
-
-# Pass cursor position to kernel...
- movw %cs:cursor_address, %ax
- shrw %ax # cursor_address is 2 bytes unit
- movb $80, %cl
- divb %cl
- xchgb %al, %ah # (0) = %al = X, (1) = %ah = Y
- movw %ax, (0)
-
-#if 0
- movw $msg_cpos, %si
- call prtstr_cs
- call prthex
- call prtstr_cs
- movw %ds, %ax
- call prthex
- call prtstr_cs
- movb $0x11, %ah
- int $0x18
- movb $0, %ah
- int $0x18
- .section .rodata, "a"
-msg_cpos: .string "Cursor position: 0x"
- .string ", %ds:0x"
- .string "\r\n"
- .previous
-#endif
-
-# Now we want to move to protected mode ...
- cmpw $0, %cs:realmode_swtch
- jz rmodeswtch_normal
-
- lcall *%cs:realmode_swtch
-
- jmp rmodeswtch_end
-
-rmodeswtch_normal:
- pushw %cs
- call default_switch
-
-rmodeswtch_end:
-# we get the code32 start address and modify the below 'jmpi'
-# (loader may have changed it)
- movl %cs:code32_start, %eax
- movl %eax, %cs:code32
-
-# Now we move the system to its rightful place ... but we check if we have a
-# big-kernel. In that case we *must* not move it ...
- testb $LOADED_HIGH, %cs:loadflags
- jz do_move0 # .. then we have a normal low
- # loaded zImage
- # .. or else we have a high
- # loaded bzImage
- jmp end_move # ... and we skip moving
-
-do_move0:
- movw $0x100, %ax # start of destination segment
- movw %cs, %bp # aka SETUPSEG
- subw $DELTA_INITSEG, %bp # aka INITSEG
- movw %cs:start_sys_seg, %bx # start of source segment
- cld
-do_move:
- movw %ax, %es # destination segment
- incb %ah # instead of add ax,#0x100
- movw %bx, %ds # source segment
- addw $0x100, %bx
- subw %di, %di
- subw %si, %si
- movw $0x800, %cx
- rep
- movsw
- cmpw %bp, %bx # assume start_sys_seg > 0x200,
- # so we will perhaps read one
- # page more than needed, but
- # never overwrite INITSEG
- # because destination is a
- # minimum one page below source
- jb do_move
-
-end_move:
-# then we load the segment descriptors
- movw %cs, %ax # aka SETUPSEG
- movw %ax, %ds
-
-# Check whether we need to be downward compatible with version <=201
- cmpl $0, cmd_line_ptr
- jne end_move_self # loader uses version >=202 features
- cmpb $0x20, type_of_loader
- je end_move_self # bootsect loader, we know of it
-
-# Boot loader does not support boot protocol version 2.02.
-# If we have our code not at 0x90000, we need to move it there now.
-# We also then need to move the params behind it (commandline)
-# Because we would overwrite the code on the current IP, we move
-# it in two steps, jumping high after the first one.
- movw %cs, %ax
- cmpw $SETUPSEG, %ax
- je end_move_self
-
- cli # make sure we really have
- # interrupts disabled !
- # because after this the stack
- # should not be used
- subw $DELTA_INITSEG, %ax # aka INITSEG
- movw %ss, %dx
- cmpw %ax, %dx
- jb move_self_1
-
- addw $INITSEG, %dx
- subw %ax, %dx # this will go into %ss after
- # the move
-move_self_1:
- movw %ax, %ds
- movw $INITSEG, %ax # real INITSEG
- movw %ax, %es
- movw %cs:setup_move_size, %cx
- std # we have to move up, so we use
- # direction down because the
- # areas may overlap
- movw %cx, %di
- decw %di
- movw %di, %si
- subw $move_self_here+0x200, %cx
- rep
- movsb
- ljmp $SETUPSEG, $move_self_here
-
-move_self_here:
- movw $move_self_here+0x200, %cx
- rep
- movsb
- movw $SETUPSEG, %ax
- movw %ax, %ds
- movw %dx, %ss
-
-end_move_self: # now we are at the right place
- lidt idt_48 # load idt with 0,0
- xorl %eax, %eax # Compute gdt_base
- movw %ds, %ax # (Convert %ds:gdt to a linear ptr)
- shll $4, %eax
- addl $gdt, %eax
- movl %eax, (gdt_48+2)
- lgdt gdt_48 # load gdt with whatever is
- # appropriate
-
-# that was painless, now we enable A20
-
- outb %al, $0xf2 # A20 on
- movb $0x02, %al
- outb %al, $0xf6 # also A20 on; making ITF's
- # way our model
-
- # PC-9800 seems to enable A20 at the moment of `outb';
- # so we don't wait unlike IBM PCs (see ../setup.S).
-
-# enable DMA to access memory over 0x100000 (1MB).
-
- movw $0x439, %dx
- inb %dx, %al
- andb $(~4), %al
- outb %al, %dx
-
-# Set DMA to increment its bank address automatically at 16MB boundary.
-# Initial setting is 64KB boundary mode so that we can't run DMA crossing
-# physical address 0xXXXXFFFF.
-
- movb $0x0c, %al
- outb %al, $0x29 # ch. 0
- movb $0x0d, %al
- outb %al, $0x29 # ch. 1
- movb $0x0e, %al
- outb %al, $0x29 # ch. 2
- movb $0x0f, %al
- outb %al, $0x29 # ch. 3
- movb $0x50, %al
- outb %al, $0x11 # reinitialize DMAC
-
-# make sure any possible coprocessor is properly reset..
- movb $0, %al
- outb %al, $0xf8
- outb %al, $0x5f # delay
-
-# well, that went ok, I hope. Now we mask all interrupts - the rest
-# is done in init_IRQ().
- movb $0xFF, %al # mask all interrupts for now
- outb %al, $0x0A
- outb %al, $0x5f # delay
-
- movb $0x7F, %al # mask all irq's but irq7 which
- outb %al, $0x02 # is cascaded
-
-# Well, that certainly wasn't fun :-(. Hopefully it works, and we don't
-# need no steenking BIOS anyway (except for the initial loading :-).
-# The BIOS-routine wants lots of unnecessary data, and it's less
-# "interesting" anyway. This is how REAL programmers do it.
-#
-# Well, now's the time to actually move into protected mode. To make
-# things as simple as possible, we do no register set-up or anything,
-# we let the gnu-compiled 32-bit programs do that. We just jump to
-# absolute address 0x1000 (or the loader supplied one),
-# in 32-bit protected mode.
-#
-# Note that the short jump isn't strictly needed, although there are
-# reasons why it might be a good idea. It won't hurt in any case.
- movw $1, %ax # protected mode (PE) bit
- lmsw %ax # This is it!
- jmp flush_instr
-
-flush_instr:
- xorw %bx, %bx # Flag to indicate a boot
- xorl %esi, %esi # Pointer to real-mode code
- movw %cs, %si
- subw $DELTA_INITSEG, %si
- shll $4, %esi # Convert to 32-bit pointer
-# NOTE: For high loaded big kernels we need a
-# jmpi 0x100000,__BOOT_CS
-#
-# but we yet haven't reloaded the CS register, so the default size
-# of the target offset still is 16 bit.
-# However, using an operand prefix (0x66), the CPU will properly
-# take our 48 bit far pointer. (INTeL 80386 Programmer's Reference
-# Manual, Mixing 16-bit and 32-bit code, page 16-6)
-
- .byte 0x66, 0xea # prefix + jmpi-opcode
-code32: .long 0x1000 # will be set to 0x100000
- # for big kernels
- .word __BOOT_CS
-
-# Here's a bunch of information about your current kernel..
-kernel_version: .ascii UTS_RELEASE
- .ascii " ("
- .ascii LINUX_COMPILE_BY
- .ascii "@"
- .ascii LINUX_COMPILE_HOST
- .ascii ") "
- .ascii UTS_VERSION
- .byte 0
-
-# This is the default real mode switch routine.
-# to be called just before protected mode transition
-default_switch:
- cli # no interrupts allowed !
- outb %al, $0x50 # disable NMI for bootup
- # sequence
- lret
-
-
-# This routine prints one character (in %al) on console.
-# PC-9800 doesn't have BIOS-function to do it like IBM PC's INT 10h - 0Eh,
-# so we hardcode `prtchr' subroutine here.
-prtchr:
- pushaw
- pushw %es
- cmpb $0, %cs:prtchr_initialized
- jnz prtchr_ok
- xorw %cx, %cx
- movw %cx, %es
- testb $0x8, %es:BIOS_FLAG
- jz 1f
- movb $(HIRESO_TEXT >> 8), %cs:cursor_address+3
- movw $(80 * 31 * 2), %cs:max_cursor_offset
-1: pushw %ax
- call get_cursor_position
- movw %ax, %cs:cursor_address
- popw %ax
- movb $1, %cs:prtchr_initialized
-prtchr_ok:
- lesw %cs:cursor_address, %di
- movw $160, %bx
- movb $0, %ah
- cmpb $13, %al
- je do_cr
- cmpb $10, %al
- je do_lf
-
- # normal (printable) character
- stosw
- movb $0xe1, %es:0x2000-2(%di)
- jmp 1f
-
-do_cr: movw %di, %ax
- divb %bl # %al = Y, %ah = X * 2
- mulb %bl
- movw %ax, %dx
- jmp 2f
-
-do_lf: addw %bx, %di
-1: movw %cs:max_cursor_offset, %cx
- cmpw %cx, %di
- movw %di, %dx
- jb 2f
- # cursor reaches bottom of screen; scroll it
- subw %bx, %dx
- xorw %di, %di
- movw %bx, %si
- cld
- subw %bx, %cx
- shrw %cx
- pushw %cx
- rep; es; movsw
- movb $32, %al # clear bottom line characters
- movb $80, %cl
- rep; stosw
- movw $0x2000, %di
- popw %cx
- leaw (%bx,%di), %si
- rep; es; movsw
- movb $0xe1, %al # clear bottom line attributes
- movb $80, %cl
- rep; stosw
-2: movw %dx, %cs:cursor_address
- movb $0x13, %ah # move cursor to right position
- int $0x18
- popw %es
- popaw
- ret
-
-cursor_address:
- .word 0
- .word NORMAL_TEXT
-max_cursor_offset:
- .word 80 * 25 * 2 # for normal 80x25 mode
-
-# putstr may called without running through start_of_setup (via bootsect_panic)
-# so we should initialize ourselves on demand.
-prtchr_initialized:
- .byte 0
-
-# This routine queries GDC (graphic display controller) for current cursor
-# position. Cursor position is returned in %ax (CPU offset address).
-get_cursor_position:
-1: inb $0x60, %al
- outb %al, $0x5f # delay
- outb %al, $0x5f # delay
- testb $0x04, %al # Is FIFO empty?
- jz 1b # no -> wait until empty
-
- movb $0xe0, %al # CSRR command
- outb %al, $0x62 # command write
- outb %al, $0x5f # delay
- outb %al, $0x5f # delay
-
-2: inb $0x60, %al
- outb %al, $0x5f # delay
- outb %al, $0x5f # delay
- testb $0x01, %al # Is DATA READY?
- jz 2b # no -> wait until ready
-
- inb $0x62, %al # read xAD (L)
- outb %al, $0x5f # delay
- outb %al, $0x5f # delay
- movb %al, %ah
- inb $0x62, %al # read xAD (H)
- outb %al, $0x5f # delay
- outb %al, $0x5f # delay
- xchgb %al, %ah # correct byte order
- pushw %ax
- inb $0x62, %al # read yAD (L)
- outb %al, $0x5f # delay
- outb %al, $0x5f # delay
- inb $0x62, %al # read yAD (M)
- outb %al, $0x5f # delay
- outb %al, $0x5f # delay
- inb $0x62, %al # read yAD (H)
- # yAD is not our interest,
- # so discard it.
- popw %ax
- addw %ax, %ax # convert to CPU address
- ret
-
-# Descriptor tables
-#
-# NOTE: The intel manual says gdt should be sixteen bytes aligned for
-# efficiency reasons. However, there are machines which are known not
-# to boot with misaligned GDTs, so alter this at your peril! If you alter
-# GDT_ENTRY_BOOT_CS (in asm/segment.h) remember to leave at least two
-# empty GDT entries (one for NULL and one reserved).
-#
-# NOTE: On some CPUs, the GDT must be 8 byte aligned. This is
-# true for the Voyager Quad CPU card which will not boot without
-# This directive. 16 byte aligment is recommended by intel.
-#
- .align 16
-gdt:
- .fill GDT_ENTRY_BOOT_CS,8,0
-
- .word 0xFFFF # 4Gb - (0x100000*0x1000 = 4Gb)
- .word 0 # base address = 0
- .word 0x9A00 # code read/exec
- .word 0x00CF # granularity = 4096, 386
- # (+5th nibble of limit)
-
- .word 0xFFFF # 4Gb - (0x100000*0x1000 = 4Gb)
- .word 0 # base address = 0
- .word 0x9200 # data read/write
- .word 0x00CF # granularity = 4096, 386
- # (+5th nibble of limit)
-gdt_end:
- .align 4
-
- .word 0 # alignment byte
-idt_48:
- .word 0 # idt limit = 0
- .word 0, 0 # idt base = 0L
-
- .word 0 # alignment byte
-gdt_48:
- .word gdt_end - gdt - 1 # gdt limit
- .word 0, 0 # gdt base (filled in later)
-
-# Include video setup & detection code
-
-#include "video.S"
-
-# Setup signature -- must be last
-setup_sig1: .word SIG1
-setup_sig2: .word SIG2
-
-# After this point, there is some free space which is used by the video mode
-# handling code to store the temporary mode table (not used by the kernel).
-
-modelist:
-
-.text
-endtext:
-.data
-enddata:
-.bss
-endbss:
+++ /dev/null
-/*
- * $Id: build.c,v 1.5 1997/05/19 12:29:58 mj Exp $
- *
- * Copyright (C) 1991, 1992 Linus Torvalds
- * Copyright (C) 1997 Martin Mares
- */
-
-/*
- * This file builds a disk-image from three different files:
- *
- * - bootsect: exactly 512 bytes of 8086 machine code, loads the rest
- * - setup: 8086 machine code, sets up system parm
- * - system: 80386 code for actual system
- *
- * It does some checking that all files are of the correct type, and
- * just writes the result to stdout, removing headers and padding to
- * the right amount. It also writes some system data to stderr.
- */
-
-/*
- * Changes by tytso to allow root device specification
- * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
- * Cross compiling fixes by Gertjan van Wingerde, July 1996
- * Rewritten by Martin Mares, April 1997
- */
-
-#include <stdio.h>
-#include <string.h>
-#include <stdlib.h>
-#include <stdarg.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <sys/sysmacros.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <asm/boot.h>
-
-typedef unsigned char byte;
-typedef unsigned short word;
-typedef unsigned long u32;
-
-#define DEFAULT_MAJOR_ROOT 0
-#define DEFAULT_MINOR_ROOT 0
-
-/* Minimal number of setup sectors (see also bootsect.S) */
-#define SETUP_SECTS 4
-
-byte buf[1024];
-int fd;
-int is_big_kernel;
-
-void die(const char * str, ...)
-{
- va_list args;
- va_start(args, str);
- vfprintf(stderr, str, args);
- fputc('\n', stderr);
- exit(1);
-}
-
-void file_open(const char *name)
-{
- if ((fd = open(name, O_RDONLY, 0)) < 0)
- die("Unable to open `%s': %m", name);
-}
-
-void usage(void)
-{
- die("Usage: build [-b] bootsect setup system [rootdev] [> image]");
-}
-
-int main(int argc, char ** argv)
-{
- unsigned int i, c, sz, setup_sectors;
- u32 sys_size;
- byte major_root, minor_root;
- struct stat sb;
-
- if (argc > 2 && !strcmp(argv[1], "-b"))
- {
- is_big_kernel = 1;
- argc--, argv++;
- }
- if ((argc < 4) || (argc > 5))
- usage();
- if (argc > 4) {
- if (!strcmp(argv[4], "CURRENT")) {
- if (stat("/", &sb)) {
- perror("/");
- die("Couldn't stat /");
- }
- major_root = major(sb.st_dev);
- minor_root = minor(sb.st_dev);
- } else if (strcmp(argv[4], "FLOPPY")) {
- if (stat(argv[4], &sb)) {
- perror(argv[4]);
- die("Couldn't stat root device.");
- }
- major_root = major(sb.st_rdev);
- minor_root = minor(sb.st_rdev);
- } else {
- major_root = 0;
- minor_root = 0;
- }
- } else {
- major_root = DEFAULT_MAJOR_ROOT;
- minor_root = DEFAULT_MINOR_ROOT;
- }
- fprintf(stderr, "Root device is (%d, %d)\n", major_root, minor_root);
-
- file_open(argv[1]);
- i = read(fd, buf, sizeof(buf));
- fprintf(stderr,"Boot sector %d bytes.\n",i);
- if (i != 512)
- die("Boot block must be exactly 512 bytes");
- if (buf[510] != 0x55 || buf[511] != 0xaa)
- die("Boot block hasn't got boot flag (0xAA55)");
- buf[508] = minor_root;
- buf[509] = major_root;
- if (write(1, buf, 512) != 512)
- die("Write call failed");
- close (fd);
-
- file_open(argv[2]); /* Copy the setup code */
- for (i=0 ; (c=read(fd, buf, sizeof(buf)))>0 ; i+=c )
- if (write(1, buf, c) != c)
- die("Write call failed");
- if (c != 0)
- die("read-error on `setup'");
- close (fd);
-
- setup_sectors = (i + 511) / 512; /* Pad unused space with zeros */
- if (!(setup_sectors & 1))
- setup_sectors++; /* setup_sectors must be odd on NEC PC-9800 */
- fprintf(stderr, "Setup is %d bytes.\n", i);
- memset(buf, 0, sizeof(buf));
- while (i < setup_sectors * 512) {
- c = setup_sectors * 512 - i;
- if (c > sizeof(buf))
- c = sizeof(buf);
- if (write(1, buf, c) != c)
- die("Write call failed");
- i += c;
- }
-
- file_open(argv[3]);
- if (fstat (fd, &sb))
- die("Unable to stat `%s': %m", argv[3]);
- sz = sb.st_size;
- fprintf (stderr, "System is %d kB\n", sz/1024);
- sys_size = (sz + 15) / 16;
- /* 0x40000*16 = 4.0 MB, reasonable estimate for the current maximum */
- if (sys_size > (is_big_kernel ? 0x40000 : DEF_SYSSIZE))
- die("System is too big. Try using %smodules.",
- is_big_kernel ? "" : "bzImage or ");
- while (sz > 0) {
- int l, n;
-
- l = (sz > sizeof(buf)) ? sizeof(buf) : sz;
- if ((n=read(fd, buf, l)) != l) {
- if (n < 0)
- die("Error reading %s: %m", argv[3]);
- else
- die("%s: Unexpected EOF", argv[3]);
- }
- if (write(1, buf, l) != l)
- die("Write failed");
- sz -= l;
- }
- close(fd);
-
- if (lseek(1, 497, SEEK_SET) != 497) /* Write sizes to the bootsector */
- die("Output: seek failed");
- buf[0] = setup_sectors;
- if (write(1, buf, 1) != 1)
- die("Write of setup sector count failed");
- if (lseek(1, 500, SEEK_SET) != 500)
- die("Output: seek failed");
- buf[0] = (sys_size & 0xff);
- buf[1] = ((sys_size >> 8) & 0xff);
- if (write(1, buf, 2) != 2)
- die("Write of image length failed");
-
- return 0; /* Everything is OK */
-}
+++ /dev/null
-/* video.S
- *
- * Video mode setup, etc. for NEC PC-9800 series.
- *
- * Copyright (C) 1997,98,99 Linux/98 project <seraphim@kmc.kyoto-u.ac.jp>
- *
- * Based on the video.S for IBM PC:
- * copyright (C) Martin Mares <mj@atrey.karlin.mff.cuni.cz>
- */
-
-/* Positions of various video parameters passed to the kernel */
-/* (see also include/linux/tty.h) */
-#define PARAM_CURSOR_POS 0x00
-#define PARAM_VIDEO_PAGE 0x04
-#define PARAM_VIDEO_MODE 0x06
-#define PARAM_VIDEO_COLS 0x07
-#define PARAM_VIDEO_EGA_BX 0x0a
-#define PARAM_VIDEO_LINES 0x0e
-#define PARAM_HAVE_VGA 0x0f
-#define PARAM_FONT_POINTS 0x10
-
-#define PARAM_VIDEO98_COMPAT 0x0a
-#define PARAM_VIDEO98_HIRESO 0x0b
-#define PARAM_VIDEO98_MACHTYPE 0x0c
-#define PARAM_VIDEO98_LINES 0x0e
-#define PARAM_VIDEO98_COLS 0x0f
-
-# PARAM_LFB_* and PARAM_VESAPM_* are unused on PC-9800.
-
-# This is the main entry point called by setup.S
-# %ds *must* be pointing to the bootsector
-video: xorw %ax, %ax
- movw %ax, %es # %es = 0
-
- movb %es:BIOS_FLAG, %al
- movb %al, PARAM_VIDEO_MODE
-
- movb $0, PARAM_VIDEO98_HIRESO # 0 = normal
- movw $NORMAL_TEXT, PARAM_VIDEO_PAGE
- testb $0x8, %al
- movw $(80 * 256 + 25), %ax
- jz 1f
- # hireso machine.
- movb $1, PARAM_VIDEO98_HIRESO # !0 = hi-reso
- movb $(HIRESO_TEXT >> 8), PARAM_VIDEO_PAGE + 1
- movw $(80 * 256 + 31), %ax
-1: movw %ax, PARAM_VIDEO98_LINES # also sets VIDEO98_COLS
-
- movb $0xc0, %ch # 400-line graphic mode
- movb $0x42, %ah
- int $0x18
-
- movw $80, PARAM_VIDEO_COLS
-
- movw $msg_probing, %si
- call prtstr_cs
-
-# Check vendor from font pattern of `A'...
-
-1: inb $0x60, %al # wait V-sync
- testb $0x20, %al
- jnz 1b
-2: inb $0x60, %al
- testb $0x20, %al
- jz 2b
-
- movb $0x00, %al # select font of `A'
- outb %al, $0xa1
- movb $0x41, %al
- outb %al, $0xa3
-
- movw $8, %cx
- movw PARAM_VIDEO_PAGE, %ax
- cmpw $NORMAL_TEXT, %ax
- je 3f
- movb $24, %cl # for hi-reso machine
-3: addw $0x400, %ax # %ax = CG window segment
- pushw %ds
- movw %ax, %ds
- xorw %dx, %dx # get sum of `A' pattern...
- xorw %si, %si
-4: lodsw
- addw %ax, %dx
- loop 4b
- popw %ds
-
- movw %dx, %ax
- movw $msg_nec, %si
- xorw %bx, %bx # vendor info will go into %bx
- testb $8, %es:BIOS_FLAG
- jnz check_hireso_vendor
- cmpw $0xc7f8, %ax
- je 5f
- jmp 6f
-check_hireso_vendor:
- cmpw $0x9639, %ax # XXX: NOT VERIFIED!!!
- je 5f
-6: incw %bx # compatible machine
- movw $msg_compat, %si
-5: movb %bl, PARAM_VIDEO98_COMPAT
- call prtstr_cs
-
- movw $msg_fontdata, %si
- call prtstr_cs # " (CG sum of A = 0x"
- movw %dx, %ax
- call prthex
- call prtstr_cs # ") PC-98"
-
- movb $'0', %al
- pushw %ds
- pushw $0xf8e8
- popw %ds
- cmpw $0x2198, (0)
- popw %ds
- jne 7f
- movb $'2', %al
-7: call prtchr
- call prtstr_cs # "1 "
-
- movb $0, PARAM_VIDEO98_MACHTYPE
-#if 0 /* XXX - This check is bogus? [0000:BIOS_FLAG2]-bit7 does NOT
- indicate whether it is a note machine, but merely indicates
- whether it has ``RAM drive''. */
-# check note machine
- testb $0x80, %es:BIOS_FLAG2
- jnz is_note
- pushw %ds
- pushw $0xfd80
- popw %ds
- movb (4), %al
- popw %ds
- cmpb $0x20, %al # EPSON note A
- je epson_note
- cmpb $0x22, %al # EPSON note W
- je epson_note
- cmpb $0x27, %al # EPSON note AE
- je epson_note
- cmpb $0x2a, %al # EPSON note WR
- jne note_done
-epson_note:
- movb $1, PARAM_VIDEO98_MACHTYPE
- movw $msg_note, %si
- call prtstr_cs
-note_done:
-#endif
-
-# print h98 ? (only NEC)
- cmpb $0, PARAM_VIDEO98_COMPAT
- jnz 8f # not NEC -> not H98
-
- testb $0x80, %es:BIOS_FLAG5
- jz 8f # have NESA bus -> H98
- movw $msg_h98, %si
- call prtstr_cs
- orb $2, PARAM_VIDEO98_MACHTYPE
-8: testb $0x40, %es:BIOS_FLAG5
- jz 9f
- movw $msg_gs, %si
- call prtstr_cs # only prints it :-)
-9:
- movw $msg_normal, %si # "normal"
- testb $0x8, %es:BIOS_FLAG
- jz 1f
- movw $msg_hireso, %si
-1: call prtstr_cs
-
- movw $msg_sysclk, %si
- call prtstr_cs
- movb $'5', %al
- testb $0x80, %es:BIOS_FLAG
- jz 2f
- movb $'8', %al
-2: call prtchr
- call prtstr_cs
-
-#if 0
- testb $0x40, %es:(0x45c)
- jz no_30line # no 30-line support
-
- movb %es:KB_SHFT_STS, %al
- testb $0x01, %al # is SHIFT key pressed?
- jz no_30line
-
- testb $0x10, %al # is CTRL key pressed?
- jnz line40
-
- # switch to 30-line mode
- movb $30, PARAM_VIDEO98_LINES
- movw $msg_30line, %si
- jmp 3f
-
-line40:
- movb $37, PARAM_VIDEO98_LINES
- movw $40, PARAM_VIDEO_LINES
- movw $msg_40line, %si
-3: call prtstr_cs
-
- movb $0x32, %bh
- movw $0x300c, %ax
- int $0x18 # switch video mode
- movb $0x0c, %ah
- int $0x18 # turn on text plane
- movw %cs:cursor_address, %dx
- movb $0x13, %ah
- int $0x18 # move cursor to correct place
- mov $0x11, %ah
- int $0x18 # turn on text plane
-
- call prtstr_cs # "Ok.\r\n"
-no_30line:
-#endif
- ret
-
-prtstr_cs:
- pushw %ds
- pushw %cs
- popw %ds
- call prtstr
- popw %ds
- ret
-
-# prthex is for debugging purposes, and prints %ax in hexadecimal.
-prthex: pushw %cx
- movw $4, %cx
-1: rolw $4, %ax
- pushw %ax
- andb $0xf, %al
- cmpb $10, %al
- sbbb $0x69, %al
- das
- call prtchr
- popw %ax
- loop 1b
- popw %cx
- ret
-
-msg_probing: .string "Probing machine: "
-
-msg_nec: .string "NEC"
-msg_compat: .string "compatible"
-
-msg_fontdata: .string " (CG sum of A = 0x"
- .string ") PC-98"
- .string "1 "
-
-msg_gs: .string "(GS) "
-msg_h98: .string "(H98) "
-
-msg_normal: .string "normal"
-msg_hireso: .string "Hi-reso"
-
-msg_sysclk: .string " mode, system clock "
- .string "MHz\r\n"
-
-#if 0
-msg_40line: # cpp will concat following lines, so the assembler can deal.
- .ascii "\
-Video mode will be adjusted to 37-line (so-called ``40-line'') mode later.\r\n\
-THIS MODE MAY DAMAGE YOUR MONITOR PHYSICALLY. USE AT YOUR OWN RISK.\r\n"
-msg_30line: .string "Switching video mode to 30-line (640x480) mode... "
- .string "Ok.\r\n"
-#endif
+++ /dev/null
-/*
- * acpi-cpufreq-io.c - ACPI Processor P-States Driver ($Revision: 1.3 $)
- *
- * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
- * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
- * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- */
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/proc_fs.h>
-#include <linux/seq_file.h>
-#include <asm/io.h>
-#include <asm/delay.h>
-#include <asm/uaccess.h>
-
-#include <linux/acpi.h>
-#include <acpi/processor.h>
-
-#define ACPI_PROCESSOR_COMPONENT 0x01000000
-#define ACPI_PROCESSOR_CLASS "processor"
-#define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor P-States Driver"
-#define ACPI_PROCESSOR_DEVICE_NAME "Processor"
-
-#define _COMPONENT ACPI_PROCESSOR_COMPONENT
-ACPI_MODULE_NAME ("acpi_processor_perf")
-
-MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
-MODULE_DESCRIPTION(ACPI_PROCESSOR_DRIVER_NAME);
-MODULE_LICENSE("GPL");
-
-
-struct cpufreq_acpi_io {
- struct acpi_processor_performance acpi_data;
- struct cpufreq_frequency_table *freq_table;
-};
-
-static struct cpufreq_acpi_io *acpi_io_data[NR_CPUS];
-
-
-static int
-acpi_processor_write_port(
- u16 port,
- u8 bit_width,
- u32 value)
-{
- if (bit_width <= 8) {
- outb(value, port);
- } else if (bit_width <= 16) {
- outw(value, port);
- } else if (bit_width <= 32) {
- outl(value, port);
- } else {
- return -ENODEV;
- }
- return 0;
-}
-
-static int
-acpi_processor_read_port(
- u16 port,
- u8 bit_width,
- u32 *ret)
-{
- *ret = 0;
- if (bit_width <= 8) {
- *ret = inb(port);
- } else if (bit_width <= 16) {
- *ret = inw(port);
- } else if (bit_width <= 32) {
- *ret = inl(port);
- } else {
- return -ENODEV;
- }
- return 0;
-}
-
-static int
-acpi_processor_set_performance (
- struct cpufreq_acpi_io *data,
- unsigned int cpu,
- int state)
-{
- u16 port = 0;
- u8 bit_width = 0;
- int ret = 0;
- u32 value = 0;
- int i = 0;
- struct cpufreq_freqs cpufreq_freqs;
- cpumask_t saved_mask;
- int retval;
-
- ACPI_FUNCTION_TRACE("acpi_processor_set_performance");
-
- /*
- * TBD: Use something other than set_cpus_allowed.
- * As set_cpus_allowed is a bit racy,
- * with any other set_cpus_allowed for this process.
- */
- saved_mask = current->cpus_allowed;
- set_cpus_allowed(current, cpumask_of_cpu(cpu));
- if (smp_processor_id() != cpu) {
- return_VALUE(-EAGAIN);
- }
-
- if (state == data->acpi_data.state) {
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Already at target state (P%d)\n", state));
- retval = 0;
- goto migrate_end;
- }
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Transitioning from P%d to P%d\n",
- data->acpi_data.state, state));
-
- /* cpufreq frequency struct */
- cpufreq_freqs.cpu = cpu;
- cpufreq_freqs.old = data->freq_table[data->acpi_data.state].frequency;
- cpufreq_freqs.new = data->freq_table[state].frequency;
-
- /* notify cpufreq */
- cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_PRECHANGE);
-
- /*
- * First we write the target state's 'control' value to the
- * control_register.
- */
-
- port = data->acpi_data.control_register.address;
- bit_width = data->acpi_data.control_register.bit_width;
- value = (u32) data->acpi_data.states[state].control;
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Writing 0x%08x to port 0x%04x\n", value, port));
-
- ret = acpi_processor_write_port(port, bit_width, value);
- if (ret) {
- ACPI_DEBUG_PRINT((ACPI_DB_WARN,
- "Invalid port width 0x%04x\n", bit_width));
- retval = ret;
- goto migrate_end;
- }
-
- /*
- * Then we read the 'status_register' and compare the value with the
- * target state's 'status' to make sure the transition was successful.
- * Note that we'll poll for up to 1ms (100 cycles of 10us) before
- * giving up.
- */
-
- port = data->acpi_data.status_register.address;
- bit_width = data->acpi_data.status_register.bit_width;
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Looking for 0x%08x from port 0x%04x\n",
- (u32) data->acpi_data.states[state].status, port));
-
- for (i=0; i<100; i++) {
- ret = acpi_processor_read_port(port, bit_width, &value);
- if (ret) {
- ACPI_DEBUG_PRINT((ACPI_DB_WARN,
- "Invalid port width 0x%04x\n", bit_width));
- retval = ret;
- goto migrate_end;
- }
- if (value == (u32) data->acpi_data.states[state].status)
- break;
- udelay(10);
- }
-
- /* notify cpufreq */
- cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE);
-
- if (value != (u32) data->acpi_data.states[state].status) {
- unsigned int tmp = cpufreq_freqs.new;
- cpufreq_freqs.new = cpufreq_freqs.old;
- cpufreq_freqs.old = tmp;
- cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_PRECHANGE);
- cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE);
- ACPI_DEBUG_PRINT((ACPI_DB_WARN, "Transition failed\n"));
- retval = -ENODEV;
- goto migrate_end;
- }
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Transition successful after %d microseconds\n",
- i * 10));
-
- data->acpi_data.state = state;
-
- retval = 0;
-migrate_end:
- set_cpus_allowed(current, saved_mask);
- return_VALUE(retval);
-}
-
-
-static int
-acpi_cpufreq_target (
- struct cpufreq_policy *policy,
- unsigned int target_freq,
- unsigned int relation)
-{
- struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu];
- unsigned int next_state = 0;
- unsigned int result = 0;
-
- ACPI_FUNCTION_TRACE("acpi_cpufreq_setpolicy");
-
- result = cpufreq_frequency_table_target(policy,
- data->freq_table,
- target_freq,
- relation,
- &next_state);
- if (result)
- return_VALUE(result);
-
- result = acpi_processor_set_performance (data, policy->cpu, next_state);
-
- return_VALUE(result);
-}
-
-
-static int
-acpi_cpufreq_verify (
- struct cpufreq_policy *policy)
-{
- unsigned int result = 0;
- struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu];
-
- ACPI_FUNCTION_TRACE("acpi_cpufreq_verify");
-
- result = cpufreq_frequency_table_verify(policy,
- data->freq_table);
-
- return_VALUE(result);
-}
-
-
-static unsigned long
-acpi_cpufreq_guess_freq (
- struct cpufreq_acpi_io *data,
- unsigned int cpu)
-{
- if (cpu_khz) {
- /* search the closest match to cpu_khz */
- unsigned int i;
- unsigned long freq;
- unsigned long freqn = data->acpi_data.states[0].core_frequency * 1000;
-
- for (i=0; i < (data->acpi_data.state_count - 1); i++) {
- freq = freqn;
- freqn = data->acpi_data.states[i+1].core_frequency * 1000;
- if ((2 * cpu_khz) > (freqn + freq)) {
- data->acpi_data.state = i;
- return (freq);
- }
- }
- data->acpi_data.state = data->acpi_data.state_count - 1;
- return (freqn);
- } else
- /* assume CPU is at P0... */
- data->acpi_data.state = 0;
- return data->acpi_data.states[0].core_frequency * 1000;
-
-}
-
-
-/*
- * acpi_processor_cpu_init_pdc_est - let BIOS know about the SMP capabilities
- * of this driver
- * @perf: processor-specific acpi_io_data struct
- * @cpu: CPU being initialized
- *
- * To avoid issues with legacy OSes, some BIOSes require to be informed of
- * the SMP capabilities of OS P-state driver. Here we set the bits in _PDC
- * accordingly, for Enhanced Speedstep. Actual call to _PDC is done in
- * driver/acpi/processor.c
- */
-static void
-acpi_processor_cpu_init_pdc_est(
- struct acpi_processor_performance *perf,
- unsigned int cpu,
- struct acpi_object_list *obj_list
- )
-{
- union acpi_object *obj;
- u32 *buf;
- struct cpuinfo_x86 *c = cpu_data + cpu;
- ACPI_FUNCTION_TRACE("acpi_processor_cpu_init_pdc_est");
-
- if (!cpu_has(c, X86_FEATURE_EST))
- return_VOID;
-
- /* Initialize pdc. It will be used later. */
- if (!obj_list)
- return_VOID;
-
- if (!(obj_list->count && obj_list->pointer))
- return_VOID;
-
- obj = obj_list->pointer;
- if ((obj->buffer.length == 12) && obj->buffer.pointer) {
- buf = (u32 *)obj->buffer.pointer;
- buf[0] = ACPI_PDC_REVISION_ID;
- buf[1] = 1;
- buf[2] = ACPI_PDC_EST_CAPABILITY_SMP;
- perf->pdc = obj_list;
- }
- return_VOID;
-}
-
-
-/* CPU specific PDC initialization */
-static void
-acpi_processor_cpu_init_pdc(
- struct acpi_processor_performance *perf,
- unsigned int cpu,
- struct acpi_object_list *obj_list
- )
-{
- struct cpuinfo_x86 *c = cpu_data + cpu;
- ACPI_FUNCTION_TRACE("acpi_processor_cpu_init_pdc");
- perf->pdc = NULL;
- if (cpu_has(c, X86_FEATURE_EST))
- acpi_processor_cpu_init_pdc_est(perf, cpu, obj_list);
- return_VOID;
-}
-
-
-static int
-acpi_cpufreq_cpu_init (
- struct cpufreq_policy *policy)
-{
- unsigned int i;
- unsigned int cpu = policy->cpu;
- struct cpufreq_acpi_io *data;
- unsigned int result = 0;
-
- union acpi_object arg0 = {ACPI_TYPE_BUFFER};
- u32 arg0_buf[3];
- struct acpi_object_list arg_list = {1, &arg0};
-
- ACPI_FUNCTION_TRACE("acpi_cpufreq_cpu_init");
- /* setup arg_list for _PDC settings */
- arg0.buffer.length = 12;
- arg0.buffer.pointer = (u8 *) arg0_buf;
-
- data = kmalloc(sizeof(struct cpufreq_acpi_io), GFP_KERNEL);
- if (!data)
- return_VALUE(-ENOMEM);
- memset(data, 0, sizeof(struct cpufreq_acpi_io));
-
- acpi_io_data[cpu] = data;
-
- acpi_processor_cpu_init_pdc(&data->acpi_data, cpu, &arg_list);
- result = acpi_processor_register_performance(&data->acpi_data, cpu);
- data->acpi_data.pdc = NULL;
-
- if (result)
- goto err_free;
-
- /* capability check */
- if (data->acpi_data.state_count <= 1) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "No P-States\n"));
- result = -ENODEV;
- goto err_unreg;
- }
- if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_SYSTEM_IO) ||
- (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Unsupported address space [%d, %d]\n",
- (u32) (data->acpi_data.control_register.space_id),
- (u32) (data->acpi_data.status_register.space_id)));
- result = -ENODEV;
- goto err_unreg;
- }
-
- /* alloc freq_table */
- data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) * (data->acpi_data.state_count + 1), GFP_KERNEL);
- if (!data->freq_table) {
- result = -ENOMEM;
- goto err_unreg;
- }
-
- /* detect transition latency */
- policy->cpuinfo.transition_latency = 0;
- for (i=0; i<data->acpi_data.state_count; i++) {
- if ((data->acpi_data.states[i].transition_latency * 1000) > policy->cpuinfo.transition_latency)
- policy->cpuinfo.transition_latency = data->acpi_data.states[i].transition_latency * 1000;
- }
- policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
-
- /* The current speed is unknown and not detectable by ACPI... */
- policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
-
- /* table init */
- for (i=0; i<=data->acpi_data.state_count; i++)
- {
- data->freq_table[i].index = i;
- if (i<data->acpi_data.state_count)
- data->freq_table[i].frequency = data->acpi_data.states[i].core_frequency * 1000;
- else
- data->freq_table[i].frequency = CPUFREQ_TABLE_END;
- }
-
- result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
- if (result) {
- goto err_freqfree;
- }
-
-
- printk(KERN_INFO "cpufreq: CPU%u - ACPI performance management activated.\n",
- cpu);
- for (i = 0; i < data->acpi_data.state_count; i++)
- printk(KERN_INFO "cpufreq: %cP%d: %d MHz, %d mW, %d uS\n",
- (i == data->acpi_data.state?'*':' '), i,
- (u32) data->acpi_data.states[i].core_frequency,
- (u32) data->acpi_data.states[i].power,
- (u32) data->acpi_data.states[i].transition_latency);
-
- cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
- return_VALUE(result);
-
- err_freqfree:
- kfree(data->freq_table);
- err_unreg:
- acpi_processor_unregister_performance(&data->acpi_data, cpu);
- err_free:
- kfree(data);
- acpi_io_data[cpu] = NULL;
-
- return_VALUE(result);
-}
-
-
-static int
-acpi_cpufreq_cpu_exit (
- struct cpufreq_policy *policy)
-{
- struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu];
-
-
- ACPI_FUNCTION_TRACE("acpi_cpufreq_cpu_exit");
-
- if (data) {
- cpufreq_frequency_table_put_attr(policy->cpu);
- acpi_io_data[policy->cpu] = NULL;
- acpi_processor_unregister_performance(&data->acpi_data, policy->cpu);
- kfree(data);
- }
-
- return_VALUE(0);
-}
-
-
-static struct freq_attr* acpi_cpufreq_attr[] = {
- &cpufreq_freq_attr_scaling_available_freqs,
- NULL,
-};
-
-static struct cpufreq_driver acpi_cpufreq_driver = {
- .verify = acpi_cpufreq_verify,
- .target = acpi_cpufreq_target,
- .init = acpi_cpufreq_cpu_init,
- .exit = acpi_cpufreq_cpu_exit,
- .name = "acpi-cpufreq",
- .owner = THIS_MODULE,
- .attr = acpi_cpufreq_attr,
-};
-
-
-static int __init
-acpi_cpufreq_init (void)
-{
- int result = 0;
-
- ACPI_FUNCTION_TRACE("acpi_cpufreq_init");
-
- result = cpufreq_register_driver(&acpi_cpufreq_driver);
-
- return_VALUE(result);
-}
-
-
-static void __exit
-acpi_cpufreq_exit (void)
-{
- ACPI_FUNCTION_TRACE("acpi_cpufreq_exit");
-
- cpufreq_unregister_driver(&acpi_cpufreq_driver);
-
- return_VOID;
-}
-
-
-late_initcall(acpi_cpufreq_init);
-module_exit(acpi_cpufreq_exit);
+++ /dev/null
-/*
- * Machine specific resource allocation for generic.
- */
-
-#include <linux/ioport.h>
-#include <asm/io.h>
-#include <asm/std_resources.h>
-
-#define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
-
-static struct resource system_rom_resource = {
- .name = "System ROM",
- .start = 0xf0000,
- .end = 0xfffff,
- .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM
-};
-
-static struct resource extension_rom_resource = {
- .name = "Extension ROM",
- .start = 0xe0000,
- .end = 0xeffff,
- .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM
-};
-
-static struct resource adapter_rom_resources[] = { {
- .name = "Adapter ROM",
- .start = 0xc8000,
- .end = 0,
- .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM
-}, {
- .name = "Adapter ROM",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM
-}, {
- .name = "Adapter ROM",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM
-}, {
- .name = "Adapter ROM",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM
-}, {
- .name = "Adapter ROM",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM
-}, {
- .name = "Adapter ROM",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM
-} };
-
-#define ADAPTER_ROM_RESOURCES \
- (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
-
-static struct resource video_rom_resource = {
- .name = "Video ROM",
- .start = 0xc0000,
- .end = 0xc7fff,
- .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM
-};
-
-static struct resource vram_resource = {
- .name = "Video RAM area",
- .start = 0xa0000,
- .end = 0xbffff,
- .flags = IORESOURCE_BUSY | IORESOURCE_MEM
-};
-
-static struct resource standard_io_resources[] = { {
- .name = "dma1",
- .start = 0x0000,
- .end = 0x001f,
- .flags = IORESOURCE_BUSY | IORESOURCE_IO
-}, {
- .name = "pic1",
- .start = 0x0020,
- .end = 0x0021,
- .flags = IORESOURCE_BUSY | IORESOURCE_IO
-}, {
- .name = "timer",
- .start = 0x0040,
- .end = 0x005f,
- .flags = IORESOURCE_BUSY | IORESOURCE_IO
-}, {
- .name = "keyboard",
- .start = 0x0060,
- .end = 0x006f,
- .flags = IORESOURCE_BUSY | IORESOURCE_IO
-}, {
- .name = "dma page reg",
- .start = 0x0080,
- .end = 0x008f,
- .flags = IORESOURCE_BUSY | IORESOURCE_IO
-}, {
- .name = "pic2",
- .start = 0x00a0,
- .end = 0x00a1,
- .flags = IORESOURCE_BUSY | IORESOURCE_IO
-}, {
- .name = "dma2",
- .start = 0x00c0,
- .end = 0x00df,
- .flags = IORESOURCE_BUSY | IORESOURCE_IO
-}, {
- .name = "fpu",
- .start = 0x00f0,
- .end = 0x00ff,
- .flags = IORESOURCE_BUSY | IORESOURCE_IO
-} };
-
-#define STANDARD_IO_RESOURCES \
- (sizeof standard_io_resources / sizeof standard_io_resources[0])
-
-static int __init checksum(unsigned char *rom, unsigned long length)
-{
- unsigned char *p, sum = 0;
-
- for (p = rom; p < rom + length; p++)
- sum += *p;
- return sum == 0;
-}
-
-void __init probe_roms(void)
-{
- unsigned long start, length, upper;
- unsigned char *rom;
- int i;
-
- /* video rom */
- upper = adapter_rom_resources[0].start;
- for (start = video_rom_resource.start; start < upper; start += 2048) {
- rom = isa_bus_to_virt(start);
- if (!romsignature(rom))
- continue;
-
- video_rom_resource.start = start;
-
- /* 0 < length <= 0x7f * 512, historically */
- length = rom[2] * 512;
-
- /* if checksum okay, trust length byte */
- if (length && checksum(rom, length))
- video_rom_resource.end = start + length - 1;
-
- request_resource(&iomem_resource, &video_rom_resource);
- break;
- }
-
- start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
- if (start < upper)
- start = upper;
-
- /* system rom */
- request_resource(&iomem_resource, &system_rom_resource);
- upper = system_rom_resource.start;
-
- /* check for extension rom (ignore length byte!) */
- rom = isa_bus_to_virt(extension_rom_resource.start);
- if (romsignature(rom)) {
- length = extension_rom_resource.end - extension_rom_resource.start + 1;
- if (checksum(rom, length)) {
- request_resource(&iomem_resource, &extension_rom_resource);
- upper = extension_rom_resource.start;
- }
- }
-
- /* check for adapter roms on 2k boundaries */
- for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
- rom = isa_bus_to_virt(start);
- if (!romsignature(rom))
- continue;
-
- /* 0 < length <= 0x7f * 512, historically */
- length = rom[2] * 512;
-
- /* but accept any length that fits if checksum okay */
- if (!length || start + length > upper || !checksum(rom, length))
- continue;
-
- adapter_rom_resources[i].start = start;
- adapter_rom_resources[i].end = start + length - 1;
- request_resource(&iomem_resource, &adapter_rom_resources[i]);
-
- start = adapter_rom_resources[i++].end & ~2047UL;
- }
-}
-
-void __init request_graphics_resource(void)
-{
- request_resource(&iomem_resource, &vram_resource);
-}
-
-void __init request_standard_io_resources(void)
-{
- int i;
-
- for (i = 0; i < STANDARD_IO_RESOURCES; i++)
- request_resource(&ioport_resource, &standard_io_resources[i]);
-}
+++ /dev/null
-/*
- * Linker script for vsyscall DSO. The vsyscall page is an ELF shared
- * object prelinked to its virtual address, and with only one read-only
- * segment (that fits in one page). This script controls its layout.
- */
-
-/* This must match <asm/fixmap.h>. */
-VSYSCALL_BASE = 0xffffe000;
-
-SECTIONS
-{
- . = VSYSCALL_BASE + SIZEOF_HEADERS;
-
- .hash : { *(.hash) } :text
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .gnu.version : { *(.gnu.version) }
- .gnu.version_d : { *(.gnu.version_d) }
- .gnu.version_r : { *(.gnu.version_r) }
-
- /* This linker script is used both with -r and with -shared.
- For the layouts to match, we need to skip more than enough
- space for the dynamic symbol table et al. If this amount
- is insufficient, ld -shared will barf. Just increase it here. */
- . = VSYSCALL_BASE + 0x400;
-
- .text : { *(.text) } :text =0x90909090
-
- .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr
- .eh_frame : { KEEP (*(.eh_frame)) } :text
- .dynamic : { *(.dynamic) } :text :dynamic
- .useless : {
- *(.got.plt) *(.got)
- *(.data .data.* .gnu.linkonce.d.*)
- *(.dynbss)
- *(.bss .bss.* .gnu.linkonce.b.*)
- } :text
-}
-
-/*
- * We must supply the ELF program headers explicitly to get just one
- * PT_LOAD segment, and set the flags explicitly to make segments read-only.
- */
-PHDRS
-{
- text PT_LOAD FILEHDR PHDRS FLAGS(5); /* PF_R|PF_X */
- dynamic PT_DYNAMIC FLAGS(4); /* PF_R */
- eh_frame_hdr 0x6474e550; /* PT_GNU_EH_FRAME, but ld doesn't match the name */
-}
-
-/*
- * This controls what symbols we export from the DSO.
- */
-VERSION
-{
- LINUX_2.5 {
- global:
- __kernel_vsyscall;
- __kernel_sigreturn;
- __kernel_rt_sigreturn;
-
- local: *;
- };
-}
-
-/* The ELF entry point can be used to set the AT_SYSINFO value. */
-ENTRY(__kernel_vsyscall);
+++ /dev/null
-/*
- * Written by: Garry Forsgren, Unisys Corporation
- * Natalie Protasevich, Unisys Corporation
- * This file contains the code to configure and interface
- * with Unisys ES7000 series hardware system manager.
- *
- * Copyright (c) 2003 Unisys Corporation. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Unisys Corporation, Township Line & Union Meeting
- * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
- *
- * http://www.unisys.com
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/smp.h>
-#include <linux/string.h>
-#include <linux/spinlock.h>
-#include <linux/errno.h>
-#include <linux/notifier.h>
-#include <linux/reboot.h>
-#include <linux/init.h>
-#include <linux/acpi.h>
-#include <asm/io.h>
-#include <asm/nmi.h>
-#include <asm/smp.h>
-#include <asm/apicdef.h>
-#include "es7000.h"
-
-/*
- * ES7000 Globals
- */
-
-volatile unsigned long *psai = NULL;
-struct mip_reg *mip_reg;
-struct mip_reg *host_reg;
-int mip_port;
-unsigned long mip_addr, host_addr;
-
-/*
- * Parse the OEM Table
- */
-
-void __init
-parse_unisys_oem (char *oemptr, int oem_entries)
-{
- int i;
- int success = 0;
- unsigned char type, size;
- unsigned long val;
- char *tp = NULL;
- struct psai *psaip = NULL;
- struct mip_reg_info *mi;
- struct mip_reg *host, *mip;
-
- tp = oemptr;
-
- tp += 8;
-
- for (i=0; i <= oem_entries; i++) {
- type = *tp++;
- size = *tp++;
- tp -= 2;
- switch (type) {
- case MIP_REG:
- mi = (struct mip_reg_info *)tp;
- val = MIP_RD_LO(mi->host_reg);
- host_addr = val;
- host = (struct mip_reg *)val;
- host_reg = __va(host);
- val = MIP_RD_LO(mi->mip_reg);
- mip_addr = val;
- mip = (struct mip_reg *)val;
- mip_reg = __va(mip);
- Dprintk("es7000_mipcfg: host_reg = 0x%lx \n",
- (unsigned long)host_reg);
- Dprintk("es7000_mipcfg: mip_reg = 0x%lx \n",
- (unsigned long)mip_reg);
- success++;
- break;
- case MIP_PSAI_REG:
- psaip = (struct psai *)tp;
- if (tp != NULL) {
- if (psaip->addr)
- psai = __va(psaip->addr);
- else
- psai = NULL;
- success++;
- }
- break;
- default:
- break;
- }
- if (i == 6) break;
- tp += size;
- }
-
- if (success < 2) {
- printk("\nNo ES7000 found.\n");
- es7000_plat = 0;
- } else {
- printk("\nEnabling ES7000 specific features...\n");
- es7000_plat = 1;
- }
- return;
-}
-
-int __init
-find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length)
-{
- struct acpi_table_rsdp *rsdp = NULL;
- unsigned long rsdp_phys = 0;
- struct acpi_table_header *header = NULL;
- int i;
- struct acpi_table_sdt sdt;
-
- rsdp_phys = acpi_find_rsdp();
- rsdp = __va(rsdp_phys);
- if (rsdp->rsdt_address) {
- struct acpi_table_rsdt *mapped_rsdt = NULL;
- sdt.pa = rsdp->rsdt_address;
-
- header = (struct acpi_table_header *)
- __acpi_map_table(sdt.pa, sizeof(struct acpi_table_header));
- if (!header)
- return -ENODEV;
-
- sdt.count = (header->length - sizeof(struct acpi_table_header)) >> 3;
- mapped_rsdt = (struct acpi_table_rsdt *)
- __acpi_map_table(sdt.pa, header->length);
- if (!mapped_rsdt)
- return -ENODEV;
-
- header = &mapped_rsdt->header;
-
- for (i = 0; i < sdt.count; i++)
- sdt.entry[i].pa = (unsigned long) mapped_rsdt->entry[i];
- };
- for (i = 0; i < sdt.count; i++) {
-
- header = (struct acpi_table_header *)
- __acpi_map_table(sdt.entry[i].pa,
- sizeof(struct acpi_table_header));
- if (!header)
- continue;
- if (!strncmp((char *) &header->signature, "OEM1", 4)) {
- if (!strncmp((char *) &header->oem_id, "UNISYS", 6)) {
- void *addr;
- struct oem_table *t;
- acpi_table_print(header, sdt.entry[i].pa);
- t = (struct oem_table *) __acpi_map_table(sdt.entry[i].pa, header->length);
- addr = (void *) __acpi_map_table(t->OEMTableAddr, t->OEMTableSize);
- *length = header->length;
- *oem_addr = (unsigned long) addr;
- return 0;
- }
- }
- }
- printk("ES7000: did not find Unisys ACPI OEM table!\n");
- return -1;
-}
-
-static void
-es7000_spin(int n)
-{
- int i = 0;
-
- while (i++ < n)
- rep_nop();
-}
-
-static int __init
-es7000_mip_write(struct mip_reg *mip_reg)
-{
- int status = 0;
- int spin;
-
- spin = MIP_SPIN;
- while (((unsigned long long)host_reg->off_38 &
- (unsigned long long)MIP_VALID) != 0) {
- if (--spin <= 0) {
- printk("es7000_mip_write: Timeout waiting for Host Valid Flag");
- return -1;
- }
- es7000_spin(MIP_SPIN);
- }
-
- memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
- outb(1, mip_port);
-
- spin = MIP_SPIN;
-
- while (((unsigned long long)mip_reg->off_38 &
- (unsigned long long)MIP_VALID) == 0) {
- if (--spin <= 0) {
- printk("es7000_mip_write: Timeout waiting for MIP Valid Flag");
- return -1;
- }
- es7000_spin(MIP_SPIN);
- }
-
- status = ((unsigned long long)mip_reg->off_0 &
- (unsigned long long)0xffff0000000000) >> 48;
- mip_reg->off_38 = ((unsigned long long)mip_reg->off_38 &
- (unsigned long long)~MIP_VALID);
- return status;
-}
-
-int
-es7000_start_cpu(int cpu, unsigned long eip)
-{
- unsigned long vect = 0, psaival = 0;
-
- if (psai == NULL)
- return -1;
-
- vect = ((unsigned long)__pa(eip)/0x1000) << 16;
- psaival = (0x1000000 | vect | cpu);
-
- while (*psai & 0x1000000)
- ;
-
- *psai = psaival;
-
- return 0;
-
-}
-
-int
-es7000_stop_cpu(int cpu)
-{
- int startup;
-
- if (psai == NULL)
- return -1;
-
- startup= (0x1000000 | cpu);
-
- while ((*psai & 0xff00ffff) != startup)
- ;
-
- startup = (*psai & 0xff0000) >> 16;
- *psai &= 0xffffff;
-
- return 0;
-
-}
-
-void __init
-es7000_sw_apic()
-{
- if (es7000_plat) {
- int mip_status;
- struct mip_reg es7000_mip_reg;
-
- printk("ES7000: Enabling APIC mode.\n");
- memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
- es7000_mip_reg.off_0 = MIP_SW_APIC;
- es7000_mip_reg.off_38 = (MIP_VALID);
- while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0)
- printk("es7000_sw_apic: command failed, status = %x\n",
- mip_status);
- return;
- }
-}
+++ /dev/null
-/*
- * Machine specific setup for es7000
- */
-
-#include <linux/config.h>
-#include <linux/smp.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-#include <asm/acpi.h>
-#include <asm/arch_hooks.h>
-
-/**
- * pre_intr_init_hook - initialisation prior to setting up interrupt vectors
- *
- * Description:
- * Perform any necessary interrupt initialisation prior to setting up
- * the "ordinary" interrupt call gates. For legacy reasons, the ISA
- * interrupts should be initialised here if the machine emulates a PC
- * in any way.
- **/void __init pre_intr_init_hook(void)
-{
- init_ISA_irqs();
-}
-
-/*
- * IRQ2 is cascade interrupt to second interrupt controller
- */
-static struct irqaction irq2 = { no_action, 0, 0, "cascade", NULL, NULL};
-
-/**
- * intr_init_hook - post gate setup interrupt initialisation
- *
- * Description:
- * Fill in any interrupts that may have been left out by the general
- * init_IRQ() routine. interrupts having to do with the machine rather
- * than the devices on the I/O bus (like APIC interrupts in intel MP
- * systems) are started here.
- **/
-void __init intr_init_hook(void)
-{
-#ifdef CONFIG_X86_LOCAL_APIC
- apic_intr_init();
-#endif
-
- if (!acpi_ioapic)
- setup_irq(2, &irq2);
-}
-
-/**
- * pre_setup_arch_hook - hook called prior to any setup_arch() execution
- *
- * Description:
- * generally used to activate any machine specific identification
- * routines that may be needed before setup_arch() runs. On VISWS
- * this is used to get the board revision and type.
- **/
-void __init pre_setup_arch_hook(void)
-{
-}
-
-/**
- * trap_init_hook - initialise system specific traps
- *
- * Description:
- * Called as the final act of trap_init(). Used in VISWS to initialise
- * the various board specific APIC traps.
- **/
-void __init trap_init_hook(void)
-{
-}
-
-static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL};
-
-/**
- * time_init_hook - do any specific initialisations for the system timer.
- *
- * Description:
- * Must plug the system timer interrupt source at HZ into the IRQ listed
- * in irq_vectors.h:TIMER_IRQ
- **/
-void __init time_init_hook(void)
-{
- setup_irq(0, &irq0);
-}
-
-#ifdef CONFIG_MCA
-/**
- * mca_nmi_hook - hook into MCA specific NMI chain
- *
- * Description:
- * The MCA (Microchannel Arcitecture) has an NMI chain for NMI sources
- * along the MCA bus. Use this to hook into that chain if you will need
- * it.
- **/
-void __init mca_nmi_hook(void)
-{
- /* If I recall correctly, there's a whole bunch of other things that
- * we can do to check for NMI problems, but that's all I know about
- * at the moment.
- */
-
- printk("NMI generated from unknown source!\n");
-}
-
-#endif
+++ /dev/null
-/*
- * arch/i386/mach-generic/topology.c - Populate driverfs with topology information
- *
- * Written by: Matthew Dobson, IBM Corporation
- * Original Code: Paul Dorwin, IBM Corporation, Patrick Mochel, OSDL
- *
- * Copyright (C) 2002, IBM Corp.
- *
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for more
- * details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Send feedback to <colpatch@us.ibm.com>
- */
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <asm/cpu.h>
-
-struct i386_cpu cpu_devices[NR_CPUS];
-
-#ifdef CONFIG_NUMA
-#include <linux/mmzone.h>
-#include <asm/node.h>
-
-struct i386_node node_devices[MAX_NUMNODES];
-
-static int __init topology_init(void)
-{
- int i;
-
- for (i = 0; i < num_online_nodes(); i++)
- arch_register_node(i);
- for (i = 0; i < NR_CPUS; i++)
- if (cpu_possible(i)) arch_register_cpu(i);
- return 0;
-}
-
-#else /* !CONFIG_NUMA */
-
-static int __init topology_init(void)
-{
- int i;
-
- for (i = 0; i < NR_CPUS; i++)
- if (cpu_possible(i)) arch_register_cpu(i);
- return 0;
-}
-
-#endif /* CONFIG_NUMA */
-
-subsys_initcall(topology_init);
+++ /dev/null
-#
-# Makefile for the linux kernel.
-#
-
-obj-y := setup.o topology.o std_resources.o
+++ /dev/null
-/*
- * Machine specific setup for pc9800
- */
-
-#include <linux/config.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-#include <linux/apm_bios.h>
-#include <asm/setup.h>
-#include <asm/arch_hooks.h>
-
-struct sys_desc_table_struct {
- unsigned short length;
- unsigned char table[0];
-};
-
-/**
- * pre_intr_init_hook - initialisation prior to setting up interrupt vectors
- *
- * Description:
- * Perform any necessary interrupt initialisation prior to setting up
- * the "ordinary" interrupt call gates. For legacy reasons, the ISA
- * interrupts should be initialised here if the machine emulates a PC
- * in any way.
- **/
-void __init pre_intr_init_hook(void)
-{
- init_ISA_irqs();
-}
-
-/*
- * IRQ7 is cascade interrupt to second interrupt controller
- */
-static struct irqaction irq7 = { no_action, 0, 0, "cascade", NULL, NULL};
-
-/**
- * intr_init_hook - post gate setup interrupt initialisation
- *
- * Description:
- * Fill in any interrupts that may have been left out by the general
- * init_IRQ() routine. interrupts having to do with the machine rather
- * than the devices on the I/O bus (like APIC interrupts in intel MP
- * systems) are started here.
- **/
-void __init intr_init_hook(void)
-{
-#ifdef CONFIG_X86_LOCAL_APIC
- apic_intr_init();
-#endif
-
- setup_irq(7, &irq7);
-}
-
-/**
- * pre_setup_arch_hook - hook called prior to any setup_arch() execution
- *
- * Description:
- * generally used to activate any machine specific identification
- * routines that may be needed before setup_arch() runs. On VISWS
- * this is used to get the board revision and type.
- **/
-void __init pre_setup_arch_hook(void)
-{
- SYS_DESC_TABLE.length = 0;
- MCA_bus = 0;
- /* In PC-9800, APM BIOS version is written in BCD...?? */
- APM_BIOS_INFO.version = (APM_BIOS_INFO.version & 0xff00)
- | ((APM_BIOS_INFO.version & 0x00f0) >> 4);
-}
-
-/**
- * trap_init_hook - initialise system specific traps
- *
- * Description:
- * Called as the final act of trap_init(). Used in VISWS to initialise
- * the various board specific APIC traps.
- **/
-void __init trap_init_hook(void)
-{
-}
-
-static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL};
-
-/**
- * time_init_hook - do any specific initialisations for the system timer.
- *
- * Description:
- * Must plug the system timer interrupt source at HZ into the IRQ listed
- * in irq_vectors.h:TIMER_IRQ
- **/
-void __init time_init_hook(void)
-{
- setup_irq(0, &irq0);
-}
-
-#ifdef CONFIG_MCA
-/**
- * mca_nmi_hook - hook into MCA specific NMI chain
- *
- * Description:
- * The MCA (Microchannel Architecture) has an NMI chain for NMI sources
- * along the MCA bus. Use this to hook into that chain if you will need
- * it.
- **/
-void __init mca_nmi_hook(void)
-{
- /* If I recall correctly, there's a whole bunch of other things that
- * we can do to check for NMI problems, but that's all I know about
- * at the moment.
- */
-
- printk("NMI generated from unknown source!\n");
-}
-#endif
+++ /dev/null
-/*
- * Machine specific resource allocation for PC-9800.
- * Written by Osamu Tomita <tomita@cinet.co.jp>
- */
-
-#include <linux/ioport.h>
-#include <asm/io.h>
-#include <asm/std_resources.h>
-
-static char str_pic1[] = "pic1";
-static char str_dma[] = "dma";
-static char str_pic2[] = "pic2";
-static char str_calender_clock[] = "calender clock";
-static char str_system[] = "system";
-static char str_nmi_control[] = "nmi control";
-static char str_kanji_rom[] = "kanji rom";
-static char str_keyboard[] = "keyboard";
-static char str_text_gdc[] = "text gdc";
-static char str_crtc[] = "crtc";
-static char str_timer[] = "timer";
-static char str_graphic_gdc[] = "graphic gdc";
-static char str_dma_ex_bank[] = "dma ex. bank";
-static char str_beep_freq[] = "beep freq.";
-static char str_mouse_pio[] = "mouse pio";
-struct resource standard_io_resources[] = {
- { str_pic1, 0x00, 0x00, IORESOURCE_BUSY },
- { str_dma, 0x01, 0x01, IORESOURCE_BUSY },
- { str_pic1, 0x02, 0x02, IORESOURCE_BUSY },
- { str_dma, 0x03, 0x03, IORESOURCE_BUSY },
- { str_dma, 0x05, 0x05, IORESOURCE_BUSY },
- { str_dma, 0x07, 0x07, IORESOURCE_BUSY },
- { str_pic2, 0x08, 0x08, IORESOURCE_BUSY },
- { str_dma, 0x09, 0x09, IORESOURCE_BUSY },
- { str_pic2, 0x0a, 0x0a, IORESOURCE_BUSY },
- { str_dma, 0x0b, 0x0b, IORESOURCE_BUSY },
- { str_dma, 0x0d, 0x0d, IORESOURCE_BUSY },
- { str_dma, 0x0f, 0x0f, IORESOURCE_BUSY },
- { str_dma, 0x11, 0x11, IORESOURCE_BUSY },
- { str_dma, 0x13, 0x13, IORESOURCE_BUSY },
- { str_dma, 0x15, 0x15, IORESOURCE_BUSY },
- { str_dma, 0x17, 0x17, IORESOURCE_BUSY },
- { str_dma, 0x19, 0x19, IORESOURCE_BUSY },
- { str_dma, 0x1b, 0x1b, IORESOURCE_BUSY },
- { str_dma, 0x1d, 0x1d, IORESOURCE_BUSY },
- { str_dma, 0x1f, 0x1f, IORESOURCE_BUSY },
- { str_calender_clock, 0x20, 0x20, 0 },
- { str_dma, 0x21, 0x21, IORESOURCE_BUSY },
- { str_calender_clock, 0x22, 0x22, 0 },
- { str_dma, 0x23, 0x23, IORESOURCE_BUSY },
- { str_dma, 0x25, 0x25, IORESOURCE_BUSY },
- { str_dma, 0x27, 0x27, IORESOURCE_BUSY },
- { str_dma, 0x29, 0x29, IORESOURCE_BUSY },
- { str_dma, 0x2b, 0x2b, IORESOURCE_BUSY },
- { str_dma, 0x2d, 0x2d, IORESOURCE_BUSY },
- { str_system, 0x31, 0x31, IORESOURCE_BUSY },
- { str_system, 0x33, 0x33, IORESOURCE_BUSY },
- { str_system, 0x35, 0x35, IORESOURCE_BUSY },
- { str_system, 0x37, 0x37, IORESOURCE_BUSY },
- { str_nmi_control, 0x50, 0x50, IORESOURCE_BUSY },
- { str_nmi_control, 0x52, 0x52, IORESOURCE_BUSY },
- { "time stamp", 0x5c, 0x5f, IORESOURCE_BUSY },
- { str_kanji_rom, 0xa1, 0xa1, IORESOURCE_BUSY },
- { str_kanji_rom, 0xa3, 0xa3, IORESOURCE_BUSY },
- { str_kanji_rom, 0xa5, 0xa5, IORESOURCE_BUSY },
- { str_kanji_rom, 0xa7, 0xa7, IORESOURCE_BUSY },
- { str_kanji_rom, 0xa9, 0xa9, IORESOURCE_BUSY },
- { str_keyboard, 0x41, 0x41, IORESOURCE_BUSY },
- { str_keyboard, 0x43, 0x43, IORESOURCE_BUSY },
- { str_text_gdc, 0x60, 0x60, IORESOURCE_BUSY },
- { str_text_gdc, 0x62, 0x62, IORESOURCE_BUSY },
- { str_text_gdc, 0x64, 0x64, IORESOURCE_BUSY },
- { str_text_gdc, 0x66, 0x66, IORESOURCE_BUSY },
- { str_text_gdc, 0x68, 0x68, IORESOURCE_BUSY },
- { str_text_gdc, 0x6a, 0x6a, IORESOURCE_BUSY },
- { str_text_gdc, 0x6c, 0x6c, IORESOURCE_BUSY },
- { str_text_gdc, 0x6e, 0x6e, IORESOURCE_BUSY },
- { str_crtc, 0x70, 0x70, IORESOURCE_BUSY },
- { str_crtc, 0x72, 0x72, IORESOURCE_BUSY },
- { str_crtc, 0x74, 0x74, IORESOURCE_BUSY },
- { str_crtc, 0x74, 0x74, IORESOURCE_BUSY },
- { str_crtc, 0x76, 0x76, IORESOURCE_BUSY },
- { str_crtc, 0x78, 0x78, IORESOURCE_BUSY },
- { str_crtc, 0x7a, 0x7a, IORESOURCE_BUSY },
- { str_timer, 0x71, 0x71, IORESOURCE_BUSY },
- { str_timer, 0x73, 0x73, IORESOURCE_BUSY },
- { str_timer, 0x75, 0x75, IORESOURCE_BUSY },
- { str_timer, 0x77, 0x77, IORESOURCE_BUSY },
- { str_graphic_gdc, 0xa0, 0xa0, IORESOURCE_BUSY },
- { str_graphic_gdc, 0xa2, 0xa2, IORESOURCE_BUSY },
- { str_graphic_gdc, 0xa4, 0xa4, IORESOURCE_BUSY },
- { str_graphic_gdc, 0xa6, 0xa6, IORESOURCE_BUSY },
- { "cpu", 0xf0, 0xf7, IORESOURCE_BUSY },
- { "fpu", 0xf8, 0xff, IORESOURCE_BUSY },
- { str_dma_ex_bank, 0x0e05, 0x0e05, 0 },
- { str_dma_ex_bank, 0x0e07, 0x0e07, 0 },
- { str_dma_ex_bank, 0x0e09, 0x0e09, 0 },
- { str_dma_ex_bank, 0x0e0b, 0x0e0b, 0 },
- { str_beep_freq, 0x3fd9, 0x3fd9, IORESOURCE_BUSY },
- { str_beep_freq, 0x3fdb, 0x3fdb, IORESOURCE_BUSY },
- { str_beep_freq, 0x3fdd, 0x3fdd, IORESOURCE_BUSY },
- { str_beep_freq, 0x3fdf, 0x3fdf, IORESOURCE_BUSY },
- /* All PC-9800 have (exactly) one mouse interface. */
- { str_mouse_pio, 0x7fd9, 0x7fd9, 0 },
- { str_mouse_pio, 0x7fdb, 0x7fdb, 0 },
- { str_mouse_pio, 0x7fdd, 0x7fdd, 0 },
- { str_mouse_pio, 0x7fdf, 0x7fdf, 0 },
- { "mouse timer", 0xbfdb, 0xbfdb, 0 },
- { "mouse irq", 0x98d7, 0x98d7, 0 },
-};
-
-#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource))
-
-static struct resource tvram_resource = { "Text VRAM/CG window", 0xa0000, 0xa4fff, IORESOURCE_BUSY };
-static struct resource gvram_brg_resource = { "Graphic VRAM (B/R/G)", 0xa8000, 0xbffff, IORESOURCE_BUSY };
-static struct resource gvram_e_resource = { "Graphic VRAM (E)", 0xe0000, 0xe7fff, IORESOURCE_BUSY };
-
-/* System ROM resources */
-#define MAXROMS 6
-static struct resource rom_resources[MAXROMS] = {
- { "System ROM", 0xe8000, 0xfffff, IORESOURCE_BUSY }
-};
-
-void __init probe_roms(void)
-{
- int i;
- __u8 *xrom_id;
- int roms = 1;
-
- request_resource(&iomem_resource, rom_resources+0);
-
- xrom_id = (__u8 *) isa_bus_to_virt(PC9800SCA_XROM_ID + 0x10);
-
- for (i = 0; i < 16; i++) {
- if (xrom_id[i] & 0x80) {
- int j;
-
- for (j = i + 1; j < 16 && (xrom_id[j] & 0x80); j++)
- ;
- rom_resources[roms].start = 0x0d0000 + i * 0x001000;
- rom_resources[roms].end = 0x0d0000 + j * 0x001000 - 1;
- rom_resources[roms].name = "Extension ROM";
- rom_resources[roms].flags = IORESOURCE_BUSY;
-
- request_resource(&iomem_resource,
- rom_resources + roms);
- if (++roms >= MAXROMS)
- return;
- }
- }
-}
-
-void __init request_graphics_resource(void)
-{
- int i;
-
- if (PC9800_HIGHRESO_P()) {
- tvram_resource.start = 0xe0000;
- tvram_resource.end = 0xe4fff;
- gvram_brg_resource.name = "Graphic VRAM";
- gvram_brg_resource.start = 0xc0000;
- gvram_brg_resource.end = 0xdffff;
- }
-
- request_resource(&iomem_resource, &tvram_resource);
- request_resource(&iomem_resource, &gvram_brg_resource);
- if (!PC9800_HIGHRESO_P())
- request_resource(&iomem_resource, &gvram_e_resource);
-
- if (PC9800_HIGHRESO_P() || PC9800_9821_P()) {
- static char graphics[] = "graphics";
- static struct resource graphics_resources[] = {
- { graphics, 0x9a0, 0x9a0, 0 },
- { graphics, 0x9a2, 0x9a2, 0 },
- { graphics, 0x9a4, 0x9a4, 0 },
- { graphics, 0x9a6, 0x9a6, 0 },
- { graphics, 0x9a8, 0x9a8, 0 },
- { graphics, 0x9aa, 0x9aa, 0 },
- { graphics, 0x9ac, 0x9ac, 0 },
- { graphics, 0x9ae, 0x9ae, 0 },
- };
-
-#define GRAPHICS_RESOURCES (sizeof(graphics_resources)/sizeof(struct resource))
-
- for (i = 0; i < GRAPHICS_RESOURCES; i++)
- request_resource(&ioport_resource, graphics_resources + i);
- }
-}
-
-void __init request_standard_io_resources(void)
-{
- int i;
-
- for (i = 0; i < STANDARD_IO_RESOURCES; i++)
- request_resource(&ioport_resource, standard_io_resources+i);
-}
+++ /dev/null
-/*
- * arch/i386/mach-pc9800/topology.c - Populate driverfs with topology information
- *
- * Written by: Matthew Dobson, IBM Corporation
- * Original Code: Paul Dorwin, IBM Corporation, Patrick Mochel, OSDL
- *
- * Copyright (C) 2002, IBM Corp.
- *
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for more
- * details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Modify for PC-9800 by Osamu Tomita <tomita@cinet.co.jp>
- *
- */
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <asm/cpu.h>
-
-struct i386_cpu cpu_devices[NR_CPUS];
-
-static int __init topology_init(void)
-{
- int i;
-
- for (i = 0; i < NR_CPUS; i++)
- if (cpu_possible(i)) arch_register_cpu(i);
- return 0;
-}
-
-subsys_initcall(topology_init);
+++ /dev/null
-/*
- * CHANGELOG :
- * Jun 17, 1994 : Modified to accommodate the broken pre-PCI BIOS SPECIFICATION
- * Revision 2.0 present on <thys@dennis.ee.up.ac.za>'s ASUS mainboard.
- *
- * Jan 5, 1995 : Modified to probe PCI hardware at boot time by Frederic
- * Potter, potter@cao-vlsi.ibp.fr
- *
- * Jan 10, 1995 : Modified to store the information about configured pci
- * devices into a list, which can be accessed via /proc/pci by
- * Curtis Varner, cvarner@cs.ucr.edu
- *
- * Jan 12, 1995 : CPU-PCI bridge optimization support by Frederic Potter.
- * Alpha version. Intel & UMC chipset support only.
- *
- * Apr 16, 1995 : Source merge with the DEC Alpha PCI support. Most of the code
- * moved to drivers/pci/pci.c.
- *
- * Dec 7, 1996 : Added support for direct configuration access of boards
- * with Intel compatible access schemes (tsbogend@alpha.franken.de)
- *
- * Feb 3, 1997 : Set internal functions to static, save/restore flags
- * avoid dead locks reading broken PCI BIOS, werner@suse.de
- *
- * Apr 26, 1997 : Fixed case when there is BIOS32, but not PCI BIOS
- * (mj@atrey.karlin.mff.cuni.cz)
- *
- * May 7, 1997 : Added some missing cli()'s. [mj]
- *
- * Jun 20, 1997 : Corrected problems in "conf1" type accesses.
- * (paubert@iram.es)
- *
- * Aug 2, 1997 : Split to PCI BIOS handling and direct PCI access parts
- * and cleaned it up... Martin Mares <mj@atrey.karlin.mff.cuni.cz>
- *
- * Feb 6, 1998 : No longer using BIOS to find devices and device classes. [mj]
- *
- * May 1, 1998 : Support for peer host bridges. [mj]
- *
- * Jun 19, 1998 : Changed to use spinlocks, so that PCI configuration space
- * can be accessed from interrupts even on SMP systems. [mj]
- *
- * August 1998 : Better support for peer host bridges and more paranoid
- * checks for direct hardware access. Ugh, this file starts to look as
- * a large gallery of common hardware bug workarounds (watch the comments)
- * -- the PCI specs themselves are sane, but most implementors should be
- * hit hard with \hammer scaled \magstep5. [mj]
- *
- * Jan 23, 1999 : More improvements to peer host bridge logic. i450NX fixup. [mj]
- *
- * Feb 8, 1999 : Added UM8886BF I/O address fixup. [mj]
- *
- * August 1999 : New resource management and configuration access stuff. [mj]
- *
- * Sep 19, 1999 : Use PCI IRQ routing tables for detection of peer host bridges.
- * Based on ideas by Chris Frantz and David Hinds. [mj]
- *
- * Sep 28, 1999 : Handle unreported/unassigned IRQs. Thanks to Shuu Yamaguchi
- * for a lot of patience during testing. [mj]
- *
- * Oct 8, 1999 : Split to pci-i386.c, pci-pc.c and pci-visws.c. [mj]
- */
\ No newline at end of file
+++ /dev/null
-/* Originally gcc generated, modified by hand */
-
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/page.h>
-
- .text
-
-ENTRY(pmdisk_arch_suspend)
- cmpl $0,4(%esp)
- jne .L1450
-
- movl %esp, saved_context_esp
- movl %ebx, saved_context_ebx
- movl %ebp, saved_context_ebp
- movl %esi, saved_context_esi
- movl %edi, saved_context_edi
- pushfl ; popl saved_context_eflags
-
- call pmdisk_suspend
- jmp .L1449
- .p2align 4,,7
-.L1450:
- movl $swsusp_pg_dir-__PAGE_OFFSET,%ecx
- movl %ecx,%cr3
-
- movl pm_pagedir_nosave,%ebx
- xorl %eax, %eax
- xorl %edx, %edx
- .p2align 4,,7
-.L1455:
- movl 4(%ebx,%edx),%edi
- movl (%ebx,%edx),%esi
-
- movl $1024, %ecx
- rep
- movsl
-
- movl %cr3, %ecx;
- movl %ecx, %cr3; # flush TLB
-
- incl %eax
- addl $16, %edx
- cmpl pmdisk_pages,%eax
- jb .L1455
- .p2align 4,,7
-.L1453:
- movl saved_context_esp, %esp
- movl saved_context_ebp, %ebp
- movl saved_context_ebx, %ebx
- movl saved_context_esi, %esi
- movl saved_context_edi, %edi
- pushl saved_context_eflags ; popfl
- call pmdisk_resume
-.L1449:
- ret
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.9-rc1
-# Tue Aug 24 15:08:24 2004
-#
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=20
-CONFIG_HOTPLUG=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_KALLSYMS_ALL=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-CONFIG_STOP_MACHINE=y
-
-#
-# Processor type and features
-#
-CONFIG_IA64=y
-CONFIG_64BIT=y
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_TIME_INTERPOLATION=y
-CONFIG_EFI=y
-CONFIG_IA64_GENERIC=y
-# CONFIG_IA64_DIG is not set
-# CONFIG_IA64_HP_ZX1 is not set
-# CONFIG_IA64_SGI_SN2 is not set
-# CONFIG_IA64_HP_SIM is not set
-# CONFIG_ITANIUM is not set
-CONFIG_MCKINLEY=y
-# CONFIG_IA64_PAGE_SIZE_4KB is not set
-# CONFIG_IA64_PAGE_SIZE_8KB is not set
-CONFIG_IA64_PAGE_SIZE_16KB=y
-# CONFIG_IA64_PAGE_SIZE_64KB is not set
-CONFIG_IA64_L1_CACHE_SHIFT=7
-CONFIG_NUMA=y
-CONFIG_VIRTUAL_MEM_MAP=y
-CONFIG_DISCONTIGMEM=y
-CONFIG_IA64_CYCLONE=y
-CONFIG_IOSAPIC=y
-CONFIG_FORCE_MAX_ZONEORDER=18
-CONFIG_SMP=y
-CONFIG_NR_CPUS=512
-CONFIG_HOTPLUG_CPU=y
-# CONFIG_PREEMPT is not set
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_IA32_SUPPORT=y
-CONFIG_COMPAT=y
-CONFIG_PERFMON=y
-CONFIG_IA64_PALINFO=y
-
-#
-# Firmware Drivers
-#
-CONFIG_EFI_VARS=y
-CONFIG_EFI_PCDP=y
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=m
-
-#
-# Power management and ACPI
-#
-CONFIG_PM=y
-CONFIG_ACPI=y
-
-#
-# ACPI (Advanced Configuration and Power Interface) Support
-#
-CONFIG_ACPI_BOOT=y
-CONFIG_ACPI_INTERPRETER=y
-CONFIG_ACPI_BUTTON=m
-CONFIG_ACPI_FAN=m
-CONFIG_ACPI_PROCESSOR=m
-CONFIG_ACPI_THERMAL=m
-CONFIG_ACPI_NUMA=y
-# CONFIG_ACPI_DEBUG is not set
-CONFIG_ACPI_BUS=y
-CONFIG_ACPI_POWER=y
-CONFIG_ACPI_PCI=y
-CONFIG_ACPI_SYSTEM=y
-
-#
-# Bus options (PCI, PCMCIA)
-#
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_MSI is not set
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-
-#
-# PCI Hotplug Support
-#
-CONFIG_HOTPLUG_PCI=m
-# CONFIG_HOTPLUG_PCI_FAKE is not set
-CONFIG_HOTPLUG_PCI_ACPI=m
-# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set
-# CONFIG_HOTPLUG_PCI_CPCI is not set
-# CONFIG_HOTPLUG_PCI_PCIE is not set
-# CONFIG_HOTPLUG_PCI_SHPC is not set
-
-#
-# PCMCIA/CardBus support
-#
-# CONFIG_PCMCIA is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-# CONFIG_DEBUG_DRIVER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_CRYPTOLOOP=m
-CONFIG_BLK_DEV_NBD=m
-# CONFIG_BLK_DEV_SX8 is not set
-# CONFIG_BLK_DEV_UB is not set
-CONFIG_BLK_DEV_RAM=m
-CONFIG_BLK_DEV_RAM_SIZE=4096
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_BLK_DEV_IDETAPE is not set
-CONFIG_BLK_DEV_IDEFLOPPY=y
-CONFIG_BLK_DEV_IDESCSI=m
-# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-CONFIG_BLK_DEV_IDEPCI=y
-# CONFIG_IDEPCI_SHARE_IRQ is not set
-# CONFIG_BLK_DEV_OFFBOARD is not set
-CONFIG_BLK_DEV_GENERIC=y
-# CONFIG_BLK_DEV_OPTI621 is not set
-CONFIG_BLK_DEV_IDEDMA_PCI=y
-# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
-CONFIG_IDEDMA_PCI_AUTO=y
-# CONFIG_IDEDMA_ONLYDISK is not set
-CONFIG_BLK_DEV_ADMA=y
-# CONFIG_BLK_DEV_AEC62XX is not set
-# CONFIG_BLK_DEV_ALI15X3 is not set
-# CONFIG_BLK_DEV_AMD74XX is not set
-CONFIG_BLK_DEV_CMD64X=y
-# CONFIG_BLK_DEV_TRIFLEX is not set
-# CONFIG_BLK_DEV_CY82C693 is not set
-# CONFIG_BLK_DEV_CS5520 is not set
-# CONFIG_BLK_DEV_CS5530 is not set
-# CONFIG_BLK_DEV_HPT34X is not set
-# CONFIG_BLK_DEV_HPT366 is not set
-# CONFIG_BLK_DEV_SC1200 is not set
-CONFIG_BLK_DEV_PIIX=y
-# CONFIG_BLK_DEV_NS87415 is not set
-# CONFIG_BLK_DEV_PDC202XX_OLD is not set
-# CONFIG_BLK_DEV_PDC202XX_NEW is not set
-# CONFIG_BLK_DEV_SVWKS is not set
-CONFIG_BLK_DEV_SGIIOC4=y
-# CONFIG_BLK_DEV_SIIMAGE is not set
-# CONFIG_BLK_DEV_SLC90E66 is not set
-# CONFIG_BLK_DEV_TRM290 is not set
-# CONFIG_BLK_DEV_VIA82CXXX is not set
-# CONFIG_IDE_ARM is not set
-CONFIG_BLK_DEV_IDEDMA=y
-# CONFIG_IDEDMA_IVB is not set
-CONFIG_IDEDMA_AUTO=y
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=m
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=m
-# CONFIG_BLK_DEV_SR_VENDOR is not set
-CONFIG_CHR_DEV_SG=m
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_CONSTANTS is not set
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI Transport Attributes
-#
-CONFIG_SCSI_SPI_ATTRS=y
-CONFIG_SCSI_FC_ATTRS=y
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_3W_9XXX is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INIA100 is not set
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
-CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
-CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
-# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
-# CONFIG_SCSI_IPR is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-CONFIG_SCSI_QLOGIC_FC=y
-# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set
-CONFIG_SCSI_QLOGIC_1280=y
-CONFIG_SCSI_QLA2XXX=y
-CONFIG_SCSI_QLA21XX=m
-CONFIG_SCSI_QLA22XX=m
-CONFIG_SCSI_QLA2300=m
-CONFIG_SCSI_QLA2322=m
-# CONFIG_SCSI_QLA6312 is not set
-# CONFIG_SCSI_QLA6322 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=m
-CONFIG_MD_LINEAR=m
-CONFIG_MD_RAID0=m
-CONFIG_MD_RAID1=m
-# CONFIG_MD_RAID10 is not set
-CONFIG_MD_RAID5=m
-CONFIG_MD_RAID6=m
-CONFIG_MD_MULTIPATH=m
-CONFIG_BLK_DEV_DM=m
-CONFIG_DM_CRYPT=m
-CONFIG_DM_SNAPSHOT=m
-CONFIG_DM_MIRROR=m
-CONFIG_DM_ZERO=m
-
-#
-# Fusion MPT device support
-#
-CONFIG_FUSION=y
-CONFIG_FUSION_MAX_SGE=40
-# CONFIG_FUSION_ISENSE is not set
-# CONFIG_FUSION_CTL is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-CONFIG_ARPD=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETPOLL=y
-# CONFIG_NETPOLL_RX is not set
-# CONFIG_NETPOLL_TRAP is not set
-CONFIG_NET_POLL_CONTROLLER=y
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=m
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=m
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-CONFIG_NET_TULIP=y
-# CONFIG_DE2104X is not set
-CONFIG_TULIP=m
-# CONFIG_TULIP_MWI is not set
-# CONFIG_TULIP_MMIO is not set
-# CONFIG_TULIP_NAPI is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_DM9102 is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-CONFIG_EEPRO100=m
-# CONFIG_EEPRO100_PIO is not set
-CONFIG_E100=m
-# CONFIG_E100_NAPI is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_VIA_VELOCITY is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-CONFIG_E1000=m
-# CONFIG_E1000_NAPI is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-CONFIG_TIGON3=y
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
-CONFIG_NETCONSOLE=y
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-CONFIG_GAMEPORT=m
-CONFIG_SOUND_GAMEPORT=m
-# CONFIG_GAMEPORT_NS558 is not set
-# CONFIG_GAMEPORT_L4 is not set
-# CONFIG_GAMEPORT_EMU10K1 is not set
-# CONFIG_GAMEPORT_VORTEX is not set
-# CONFIG_GAMEPORT_FM801 is not set
-# CONFIG_GAMEPORT_CS461x is not set
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-CONFIG_INPUT_MOUSE=y
-CONFIG_MOUSE_PS2=y
-# CONFIG_MOUSE_SERIAL is not set
-# CONFIG_MOUSE_VSXXXAA is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_ROCKETPORT is not set
-# CONFIG_CYCLADES is not set
-# CONFIG_SYNCLINK is not set
-# CONFIG_SYNCLINKMP is not set
-# CONFIG_N_HDLC is not set
-# CONFIG_STALDRV is not set
-CONFIG_SGI_SNSC=y
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_ACPI=y
-CONFIG_SERIAL_8250_NR_UARTS=6
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_RSA is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_SGI_L1_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_EFI_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-CONFIG_AGP=m
-CONFIG_AGP_I460=m
-CONFIG_AGP_HP_ZX1=m
-CONFIG_DRM=y
-CONFIG_DRM_TDFX=m
-CONFIG_DRM_GAMMA=m
-CONFIG_DRM_R128=m
-CONFIG_DRM_RADEON=m
-CONFIG_DRM_MGA=m
-CONFIG_DRM_SIS=m
-CONFIG_RAW_DRIVER=m
-CONFIG_HPET=y
-# CONFIG_HPET_RTC_IRQ is not set
-CONFIG_HPET_MMAP=y
-CONFIG_MAX_RAW_DEVS=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Console display driver support
-#
-CONFIG_VGA_CONSOLE=y
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-CONFIG_SOUND=m
-
-#
-# Advanced Linux Sound Architecture
-#
-CONFIG_SND=m
-CONFIG_SND_TIMER=m
-CONFIG_SND_PCM=m
-CONFIG_SND_HWDEP=m
-CONFIG_SND_RAWMIDI=m
-CONFIG_SND_SEQUENCER=m
-CONFIG_SND_SEQ_DUMMY=m
-CONFIG_SND_OSSEMUL=y
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_SEQUENCER_OSS=y
-CONFIG_SND_VERBOSE_PRINTK=y
-# CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
-CONFIG_SND_MPU401_UART=m
-CONFIG_SND_OPL3_LIB=m
-CONFIG_SND_DUMMY=m
-CONFIG_SND_VIRMIDI=m
-CONFIG_SND_MTPAV=m
-CONFIG_SND_SERIAL_U16550=m
-CONFIG_SND_MPU401=m
-
-#
-# PCI devices
-#
-CONFIG_SND_AC97_CODEC=m
-# CONFIG_SND_ALI5451 is not set
-# CONFIG_SND_ATIIXP is not set
-# CONFIG_SND_AU8810 is not set
-# CONFIG_SND_AU8820 is not set
-# CONFIG_SND_AU8830 is not set
-# CONFIG_SND_AZT3328 is not set
-# CONFIG_SND_BT87X is not set
-CONFIG_SND_CS46XX=m
-CONFIG_SND_CS46XX_NEW_DSP=y
-CONFIG_SND_CS4281=m
-CONFIG_SND_EMU10K1=m
-# CONFIG_SND_KORG1212 is not set
-# CONFIG_SND_MIXART is not set
-# CONFIG_SND_NM256 is not set
-# CONFIG_SND_RME32 is not set
-# CONFIG_SND_RME96 is not set
-# CONFIG_SND_RME9652 is not set
-# CONFIG_SND_HDSP is not set
-# CONFIG_SND_TRIDENT is not set
-# CONFIG_SND_YMFPCI is not set
-# CONFIG_SND_ALS4000 is not set
-# CONFIG_SND_CMIPCI is not set
-# CONFIG_SND_ENS1370 is not set
-# CONFIG_SND_ENS1371 is not set
-# CONFIG_SND_ES1938 is not set
-# CONFIG_SND_ES1968 is not set
-# CONFIG_SND_MAESTRO3 is not set
-CONFIG_SND_FM801=m
-# CONFIG_SND_FM801_TEA575X is not set
-# CONFIG_SND_ICE1712 is not set
-# CONFIG_SND_ICE1724 is not set
-# CONFIG_SND_INTEL8X0 is not set
-# CONFIG_SND_INTEL8X0M is not set
-# CONFIG_SND_SONICVIBES is not set
-# CONFIG_SND_VIA82XX is not set
-# CONFIG_SND_VX222 is not set
-
-#
-# ALSA USB devices
-#
-# CONFIG_SND_USB_AUDIO is not set
-
-#
-# Open Sound System
-#
-# CONFIG_SOUND_PRIME is not set
-
-#
-# USB support
-#
-CONFIG_USB=m
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-# CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_SUSPEND is not set
-
-#
-# USB Host Controller Drivers
-#
-CONFIG_USB_EHCI_HCD=m
-# CONFIG_USB_EHCI_SPLIT_ISO is not set
-# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
-CONFIG_USB_OHCI_HCD=m
-CONFIG_USB_UHCI_HCD=m
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH_TTY is not set
-# CONFIG_USB_MIDI is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-CONFIG_USB_STORAGE=m
-# CONFIG_USB_STORAGE_DEBUG is not set
-# CONFIG_USB_STORAGE_RW_DETECT is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
-# CONFIG_USB_STORAGE_HP8200e is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_STORAGE_SDDR55 is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-CONFIG_USB_HID=m
-CONFIG_USB_HIDINPUT=y
-# CONFIG_HID_FF is not set
-# CONFIG_USB_HIDDEV is not set
-
-#
-# USB HID Boot Protocol drivers
-#
-# CONFIG_USB_KBD is not set
-# CONFIG_USB_MOUSE is not set
-# CONFIG_USB_AIPTEK is not set
-# CONFIG_USB_WACOM is not set
-# CONFIG_USB_KBTAB is not set
-# CONFIG_USB_POWERMATE is not set
-# CONFIG_USB_MTOUCH is not set
-# CONFIG_USB_EGALAX is not set
-# CONFIG_USB_XPAD is not set
-# CONFIG_USB_ATI_REMOTE is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_HPUSBSCSI is not set
-
-#
-# USB Multimedia devices
-#
-# CONFIG_USB_DABUSB is not set
-
-#
-# Video4Linux support is needed for USB Multimedia device support
-#
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET is not set
-
-#
-# USB port drivers
-#
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_EMI62 is not set
-# CONFIG_USB_EMI26 is not set
-# CONFIG_USB_TIGL is not set
-# CONFIG_USB_AUERSWALD is not set
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_LEGOTOWER is not set
-# CONFIG_USB_LCD is not set
-# CONFIG_USB_LED is not set
-# CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGETSERVO is not set
-# CONFIG_USB_TEST is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-# CONFIG_REISERFS_FS_XATTR is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-CONFIG_XFS_FS=y
-# CONFIG_XFS_RT is not set
-# CONFIG_XFS_QUOTA is not set
-# CONFIG_XFS_SECURITY is not set
-# CONFIG_XFS_POSIX_ACL is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-# CONFIG_ZISOFS is not set
-CONFIG_UDF_FS=m
-CONFIG_UDF_NLS=y
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=y
-# CONFIG_MSDOS_FS is not set
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-CONFIG_NTFS_FS=m
-# CONFIG_NTFS_DEBUG is not set
-# CONFIG_NTFS_RW is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-CONFIG_HUGETLBFS=y
-CONFIG_HUGETLB_PAGE=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_DIRECTIO=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-CONFIG_NFSD_V4=y
-CONFIG_NFSD_TCP=y
-CONFIG_LOCKD=m
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=m
-CONFIG_SUNRPC_GSS=m
-CONFIG_RPCSEC_GSS_KRB5=m
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-CONFIG_SMB_FS=m
-CONFIG_SMB_NLS_DEFAULT=y
-CONFIG_SMB_NLS_REMOTE="cp437"
-CONFIG_CIFS=m
-# CONFIG_CIFS_STATS is not set
-# CONFIG_CIFS_XATTR is not set
-# CONFIG_CIFS_POSIX is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-CONFIG_SGI_PARTITION=y
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-CONFIG_EFI_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-# CONFIG_NLS_ASCII is not set
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=m
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# HP Simulator drivers
-#
-# CONFIG_HP_SIMETH is not set
-# CONFIG_HP_SIMSERIAL is not set
-# CONFIG_HP_SIMSCSI is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-CONFIG_DEBUG_KERNEL=y
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_INFO is not set
-CONFIG_IA64_GRANULE_16MB=y
-# CONFIG_IA64_GRANULE_64MB is not set
-# CONFIG_IA64_PRINT_HAZARDS is not set
-# CONFIG_DISABLE_VHPT is not set
-# CONFIG_IA64_DEBUG_CMPXCHG is not set
-# CONFIG_IA64_DEBUG_IRQ is not set
-CONFIG_SYSVIPC_COMPAT=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-# CONFIG_CRYPTO_HMAC is not set
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_MD4 is not set
-CONFIG_CRYPTO_MD5=m
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-CONFIG_CRYPTO_DES=m
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_AES is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_TEST is not set
+++ /dev/null
-/*
- * arch/ia64/dig/topology.c
- * Popuate driverfs with topology information.
- * Derived entirely from i386/mach-default.c
- * Intel Corporation - Ashok Raj
- */
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/cpumask.h>
-#include <linux/percpu.h>
-#include <linux/notifier.h>
-#include <linux/cpu.h>
-#include <asm/cpu.h>
-
-static DEFINE_PER_CPU(struct ia64_cpu, cpu_devices);
-
-/*
- * First Pass: simply borrowed code for now. Later should hook into
- * hotplug notification for node/cpu/memory as applicable
- */
-
-static int arch_register_cpu(int num)
-{
- struct node *parent = NULL;
-
-#ifdef CONFIG_NUMA
- //parent = &node_devices[cpu_to_node(num)].node;
-#endif
-
- return register_cpu(&per_cpu(cpu_devices,num).cpu, num, parent);
-}
-
-static int __init topology_init(void)
-{
- int i;
-
- for_each_cpu(i) {
- arch_register_cpu(i);
- }
- return 0;
-}
-
-subsys_initcall(topology_init);
+++ /dev/null
-/*
- * This file contains the HP SKI Simulator PMU register description tables
- * and pmc checkers used by perfmon.c.
- *
- * Copyright (C) 2002-2003 Hewlett Packard Co
- * Stephane Eranian <eranian@hpl.hp.com>
- *
- * File mostly contributed by Ian Wienand <ianw@gelato.unsw.edu.au>
- *
- * This file is included as a dummy template so the kernel does not
- * try to initalize registers the simulator can't handle.
- *
- * Note the simulator does not (currently) implement these registers, i.e.,
- * they do not count anything. But you can read/write them.
- */
-
-#define RDEP(x) (1UL<<(x))
-
-#ifndef CONFIG_IA64_HP_SIM
-#error "This file should only be included for the HP Simulator"
-#endif
-
-static pfm_reg_desc_t pfm_hpsim_pmc_desc[PMU_MAX_PMCS]={
-/* pmc0 */ { PFM_REG_CONTROL , 0, 0x1UL, -1UL, NULL, NULL, {0UL, 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc1 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL, 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc2 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL, 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc3 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL, 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc4 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(4), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc5 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(5), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc6 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(6), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc7 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(7), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc8 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(8), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc9 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(9), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc10 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(10), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc11 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(11), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc12 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(12), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc13 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(13), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc14 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(14), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmc15 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(15), 0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
- { PFM_REG_END , 0, 0x0UL, -1UL, NULL, NULL, {0,}, {0,}}, /* end marker */
-};
-
-static pfm_reg_desc_t pfm_hpsim_pmd_desc[PMU_MAX_PMDS]={
-/* pmd0 */ { PFM_REG_BUFFER, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmd1 */ { PFM_REG_BUFFER, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmd2 */ { PFM_REG_BUFFER, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmd3 */ { PFM_REG_BUFFER, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
-/* pmd4 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(4),0UL, 0UL, 0UL}},
-/* pmd5 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(5),0UL, 0UL, 0UL}},
-/* pmd6 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(6),0UL, 0UL, 0UL}},
-/* pmd7 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(7),0UL, 0UL, 0UL}},
-/* pmd8 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(8),0UL, 0UL, 0UL}},
-/* pmd9 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(9),0UL, 0UL, 0UL}},
-/* pmd10 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(10),0UL, 0UL, 0UL}},
-/* pmd11 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(11),0UL, 0UL, 0UL}},
-/* pmd12 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(12),0UL, 0UL, 0UL}},
-/* pmd13 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(13),0UL, 0UL, 0UL}},
-/* pmd14 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(14),0UL, 0UL, 0UL}},
-/* pmd15 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(15),0UL, 0UL, 0UL}},
- { PFM_REG_END , 0, 0x0UL, -1UL, NULL, NULL, {0,}, {0,}}, /* end marker */
-};
-
-/*
- * impl_pmcs, impl_pmds are computed at runtime to minimize errors!
- */
-static pmu_config_t pmu_conf={
- .pmu_name = "hpsim",
- .pmu_family = 0x7, /* ski emulator reports as Itanium */
- .enabled = 0,
- .ovfl_val = (1UL << 32) - 1,
- .num_ibrs = 0, /* does not use */
- .num_dbrs = 0, /* does not use */
- .pmd_desc = pfm_hpsim_pmd_desc,
- .pmc_desc = pfm_hpsim_pmc_desc
-};
+++ /dev/null
-# arch/ia64/sn/fakeprom/Makefile
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (c) 2000-2003 Silicon Graphics, Inc. All rights reserved.
-#
-# Medusa fake PROM support
-#
-
-EXTRA_TARGETS := fpromasm.o main.o fw-emu.o fpmem.o klgraph_init.o \
- fprom vmlinux.sym
-
-OBJS := $(obj)/fpromasm.o $(obj)/main.o $(obj)/fw-emu.o $(obj)/fpmem.o \
- $(obj)/klgraph_init.o
-
-LDFLAGS_fprom = -static -T
-
-.PHONY: fprom
-
-fprom: $(obj)/fprom
-
-$(obj)/fprom: $(src)/fprom.lds $(OBJS) arch/ia64/lib/lib.a FORCE
- $(call if_changed,ld)
-
-$(obj)/vmlinux.sym: $(src)/make_textsym System.map
- $(src)/make_textsym vmlinux > vmlinux.sym
- $(call cmd,cptotop)
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2002-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-
-This directory contains the files required to build
-the fake PROM image that is currently being used to
-boot IA64 kernels running under the SGI Medusa kernel.
-
-The FPROM currently provides the following functions:
-
- - PAL emulation for all PAL calls we've made so far.
- - SAL emulation for all SAL calls we've made so far.
- - EFI emulation for all EFI calls we've made so far.
- - builds the "ia64_bootparam" structure that is
- passed to the kernel from SAL. This structure
- shows the cpu & memory configurations.
- - supports medusa boottime options for changing
- the number of cpus present
- - supports medusa boottime options for changing
- the memory configuration.
-
-
-
-At some point, this fake PROM will be replaced by the
-real PROM.
-
-
-
-
-To build a fake PROM, cd to this directory & type:
-
- make
-
-This will (or should) build a fake PROM named "fprom".
-
-
-
-
-Use this fprom image when booting the Medusa simulator. The
-control file used to boot Medusa should include the
-following lines:
-
- load fprom
- load vmlinux
- sr pc 0x100000
- sr g 9 <address of kernel _start function> #(currently 0xe000000000520000)
-
-NOTE: There is a script "runsim" in this directory that can be used to
-simplify setting up an environment for running under Medusa.
-
-
-
-
-The following parameters may be passed to the fake PROM to
-control the PAL/SAL/EFI parameters passed to the kernel:
-
- GR[8] = # of cpus
- GR[9] = address of primary entry point into the kernel
- GR[20] = memory configuration for node 0
- GR[21] = memory configuration for node 1
- GR[22] = memory configuration for node 2
- GR[23] = memory configuration for node 3
-
-
-Registers GR[20] - GR[23] contain information to specify the
-amount of memory present on nodes 0-3.
-
- - if nothing is specified (all registers are 0), the configuration
- defaults to 8 MB on node 0.
-
- - a mem config entry for node N is passed in GR[20+N]
-
- - a mem config entry consists of 8 hex digits. Each digit gives the
- amount of physical memory available on the node starting at
- 1GB*<dn>, where dn is the digit number. The amount of memory
- is 8MB*2**<d>. (If <d> = 0, the memory size is 0).
-
- SN1 doesn't support dimms this small but small memory systems
- boot faster on Medusa.
-
-
-
-An example helps a lot. The following specifies that node 0 has
-physical memory 0 to 8MB and 1GB to 1GB+32MB, and that node 1 has
-64MB starting at address 0 of the node which is 8GB.
-
- gr[20] = 0x21 # 0 to 8MB, 1GB to 1GB+32MB
- gr[21] = 0x4 # 8GB to 8GB+64MB
-
+++ /dev/null
-/*
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-
-
-/*
- * FPROM EFI memory descriptor build routines
- *
- * - Routines to build the EFI memory descriptor map
- * - Should also be usable by the SGI prom to convert
- * klconfig to efi_memmap
- */
-
-#include <linux/config.h>
-#include <linux/efi.h>
-#include "fpmem.h"
-
-/*
- * args points to a layout in memory like this
- *
- * 32 bit 32 bit
- *
- * numnodes numcpus
- *
- * 16 bit 16 bit 32 bit
- * nasid0 cpuconf membankdesc0
- * nasid1 cpuconf membankdesc1
- * .
- * .
- * .
- * .
- * .
- */
-
-sn_memmap_t *sn_memmap ;
-sn_config_t *sn_config ;
-
-/*
- * There is a hole in the node 0 address space. Dont put it
- * in the memory map
- */
-#define NODE0_HOLE_SIZE (20*MB)
-#define NODE0_HOLE_END (4UL*GB)
-
-#define MB (1024*1024)
-#define GB (1024*MB)
-#define KERNEL_SIZE (4*MB)
-#define PROMRESERVED_SIZE (1*MB)
-
-#ifdef SGI_SN2
-#define PHYS_ADDRESS(_n, _x) (((long)_n<<38) | (long)_x | 0x3000000000UL)
-#define MD_BANK_SHFT 34
-#endif
-
-/*
- * For SN, this may not take an arg and gets the numnodes from
- * the prom variable or by traversing klcfg or promcfg
- */
-int
-GetNumNodes(void)
-{
- return sn_config->nodes;
-}
-
-int
-GetNumCpus(void)
-{
- return sn_config->cpus;
-}
-
-/* For SN, get the index th nasid */
-
-int
-GetNasid(int index)
-{
- return sn_memmap[index].nasid ;
-}
-
-node_memmap_t
-GetMemBankInfo(int index)
-{
- return sn_memmap[index].node_memmap ;
-}
-
-int
-IsCpuPresent(int cnode, int cpu)
-{
- return sn_memmap[cnode].cpuconfig & (1UL<<cpu);
-}
-
-
-/*
- * Made this into an explicit case statement so that
- * we can assign specific properties to banks like bank0
- * actually disabled etc.
- */
-
-#ifdef SGI_SN2
-int
-IsBankPresent(int index, node_memmap_t nmemmap)
-{
- switch (index) {
- case 0:return BankPresent(nmemmap.b0size);
- case 1:return BankPresent(nmemmap.b1size);
- case 2:return BankPresent(nmemmap.b2size);
- case 3:return BankPresent(nmemmap.b3size);
- default:return -1 ;
- }
-}
-
-int
-GetBankSize(int index, node_memmap_t nmemmap)
-{
- /*
- * Add 2 because there are 4 dimms per bank.
- */
- switch (index) {
- case 0:return 2 + ((long)nmemmap.b0size + nmemmap.b0dou);
- case 1:return 2 + ((long)nmemmap.b1size + nmemmap.b1dou);
- case 2:return 2 + ((long)nmemmap.b2size + nmemmap.b2dou);
- case 3:return 2 + ((long)nmemmap.b3size + nmemmap.b3dou);
- default:return -1 ;
- }
-}
-
-#endif
-
-void
-build_mem_desc(efi_memory_desc_t *md, int type, long paddr, long numbytes, long attr)
-{
- md->type = type;
- md->phys_addr = paddr;
- md->virt_addr = 0;
- md->num_pages = numbytes >> 12;
- md->attribute = attr;
-}
-
-int
-build_efi_memmap(void *md, int mdsize)
-{
- int numnodes = GetNumNodes() ;
- int cnode,bank ;
- int nasid ;
- node_memmap_t membank_info ;
- int bsize;
- int count = 0 ;
- long paddr, hole, numbytes;
-
-
- for (cnode=0;cnode<numnodes;cnode++) {
- nasid = GetNasid(cnode) ;
- membank_info = GetMemBankInfo(cnode) ;
- for (bank=0;bank<MD_BANKS_PER_NODE;bank++) {
- if (IsBankPresent(bank, membank_info)) {
- bsize = GetBankSize(bank, membank_info) ;
- paddr = PHYS_ADDRESS(nasid, (long)bank<<MD_BANK_SHFT);
- numbytes = BankSizeBytes(bsize);
-#ifdef SGI_SN2
- /*
- * Ignore directory.
- * Shorten memory chunk by 1 page - makes a better
- * testcase & is more like the real PROM.
- */
- numbytes = numbytes * 31 / 32;
-#endif
- /*
- * Only emulate the memory prom grabs
- * if we have lots of memory, to allow
- * us to simulate smaller memory configs than
- * we can actually run on h/w. Otherwise,
- * linux throws away a whole "granule".
- */
- if (cnode == 0 && bank == 0 &&
- numbytes > 128*1024*1024) {
- numbytes -= 1000;
- }
-
- /*
- * Check for the node 0 hole. Since banks cant
- * span the hole, we only need to check if the end of
- * the range is the end of the hole.
- */
- if (paddr+numbytes == NODE0_HOLE_END)
- numbytes -= NODE0_HOLE_SIZE;
- /*
- * UGLY hack - we must skip overr the kernel and
- * PROM runtime services but we dont exactly where it is.
- * So lets just reserve:
- * node 0
- * 0-1MB for PAL
- * 1-4MB for SAL
- * node 1-N
- * 0-1 for SAL
- */
- if (bank == 0) {
- if (cnode == 0) {
- hole = 2*1024*1024;
- build_mem_desc(md, EFI_PAL_CODE, paddr, hole, EFI_MEMORY_WB|EFI_MEMORY_WB);
- numbytes -= hole;
- paddr += hole;
- count++ ;
- md += mdsize;
- hole = 1*1024*1024;
- build_mem_desc(md, EFI_CONVENTIONAL_MEMORY, paddr, hole, EFI_MEMORY_UC);
- numbytes -= hole;
- paddr += hole;
- count++ ;
- md += mdsize;
- hole = 1*1024*1024;
- build_mem_desc(md, EFI_RUNTIME_SERVICES_DATA, paddr, hole, EFI_MEMORY_WB|EFI_MEMORY_WB);
- numbytes -= hole;
- paddr += hole;
- count++ ;
- md += mdsize;
- } else {
- hole = 2*1024*1024;
- build_mem_desc(md, EFI_RUNTIME_SERVICES_DATA, paddr, hole, EFI_MEMORY_WB|EFI_MEMORY_WB);
- numbytes -= hole;
- paddr += hole;
- count++ ;
- md += mdsize;
- hole = 2*1024*1024;
- build_mem_desc(md, EFI_RUNTIME_SERVICES_DATA, paddr, hole, EFI_MEMORY_UC);
- numbytes -= hole;
- paddr += hole;
- count++ ;
- md += mdsize;
- }
- }
- build_mem_desc(md, EFI_CONVENTIONAL_MEMORY, paddr, numbytes, EFI_MEMORY_WB|EFI_MEMORY_WB);
-
- md += mdsize ;
- count++ ;
- }
- }
- }
- return count ;
-}
-
-void
-build_init(unsigned long args)
-{
- sn_config = (sn_config_t *) (args);
- sn_memmap = (sn_memmap_t *)(args + 8) ; /* SN equiv for this is */
- /* init to klconfig start */
-}
+++ /dev/null
-/*
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/config.h>
-
-/*
- * Structure of the mem config of the node as a SN MI reg
- * Medusa supports this reg config.
- *
- * BankSize nibble to bank size mapping
- *
- * 1 - 64 MB
- * 2 - 128 MB
- * 3 - 256 MB
- * 4 - 512 MB
- * 5 - 1024 MB (1GB)
- */
-
-#define MBSHIFT 20
-
-#ifdef SGI_SN2
-typedef struct node_memmap_s
-{
- unsigned int b0size :3, /* 0-2 bank 0 size */
- b0dou :1, /* 3 bank 0 is 2-sided */
- ena0 :1, /* 4 bank 0 enabled */
- r0 :3, /* 5-7 reserved */
- b1size :3, /* 8-10 bank 1 size */
- b1dou :1, /* 11 bank 1 is 2-sided */
- ena1 :1, /* 12 bank 1 enabled */
- r1 :3, /* 13-15 reserved */
- b2size :3, /* 16-18 bank 2 size */
- b2dou :1, /* 19 bank 1 is 2-sided */
- ena2 :1, /* 20 bank 2 enabled */
- r2 :3, /* 21-23 reserved */
- b3size :3, /* 24-26 bank 3 size */
- b3dou :1, /* 27 bank 3 is 2-sided */
- ena3 :1, /* 28 bank 3 enabled */
- r3 :3; /* 29-31 reserved */
-} node_memmap_t ;
-
-#define SN2_BANK_SIZE_SHIFT (MBSHIFT+6) /* 64 MB */
-#define BankPresent(bsize) (bsize<6)
-#define BankSizeBytes(bsize) (BankPresent(bsize) ? 1UL<<((bsize)+SN2_BANK_SIZE_SHIFT) : 0)
-#define MD_BANKS_PER_NODE 4
-#define MD_BANKSIZE (1UL << 34)
-#endif
-
-typedef struct sn_memmap_s
-{
- short nasid ;
- short cpuconfig;
- node_memmap_t node_memmap ;
-} sn_memmap_t ;
-
-typedef struct sn_config_s
-{
- int cpus;
- int nodes;
- sn_memmap_t memmap[1]; /* start of array */
-} sn_config_t;
-
-
-
-extern void build_init(unsigned long);
-extern int build_efi_memmap(void *, int);
-extern int GetNumNodes(void);
-extern int GetNumCpus(void);
-extern int IsCpuPresent(int, int);
-extern int GetNasid(int);
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2002-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-
-OUTPUT_FORMAT("elf64-ia64-little")
-OUTPUT_ARCH(ia64)
-ENTRY(_start)
-SECTIONS
-{
- v = 0x0000000000000000 ; /* this symbol is here to make debugging with kdb easier... */
-
- . = (0x000000000000000 + 0x100000) ;
-
- _text = .;
- .text : AT(ADDR(.text) - 0x0000000000000000 )
- {
- *(__ivt_section)
- /* these are not really text pages, but the zero page needs to be in a fixed location: */
- *(__special_page_section)
- __start_gate_section = .;
- *(__gate_section)
- __stop_gate_section = .;
- *(.text)
- }
-
- /* Global data */
- _data = .;
-
- .rodata : AT(ADDR(.rodata) - 0x0000000000000000 )
- { *(.rodata) *(.rodata.*) }
- .opd : AT(ADDR(.opd) - 0x0000000000000000 )
- { *(.opd) }
- .data : AT(ADDR(.data) - 0x0000000000000000 )
- { *(.data) *(.gnu.linkonce.d*) CONSTRUCTORS }
-
- __gp = ALIGN (8) + 0x200000;
-
- .got : AT(ADDR(.got) - 0x0000000000000000 )
- { *(.got.plt) *(.got) }
- /* We want the small data sections together, so single-instruction offsets
- can access them all, and initialized data all before uninitialized, so
- we can shorten the on-disk segment size. */
- .sdata : AT(ADDR(.sdata) - 0x0000000000000000 )
- { *(.sdata) }
- _edata = .;
- _bss = .;
- .sbss : AT(ADDR(.sbss) - 0x0000000000000000 )
- { *(.sbss) *(.scommon) }
- .bss : AT(ADDR(.bss) - 0x0000000000000000 )
- { *(.bss) *(COMMON) }
- . = ALIGN(64 / 8);
- _end = .;
-
- /* Sections to be discarded */
- /DISCARD/ : {
- *(.text.exit)
- *(.data.exit)
- }
-
- /* Stabs debugging sections. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- /* DWARF debug sections.
- Symbols in the DWARF debugging sections are relative to the beginning
- of the section so we begin them at 0. */
- /* DWARF 1 */
- .debug 0 : { *(.debug) }
- .line 0 : { *(.line) }
- /* GNU DWARF 1 extensions */
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- /* DWARF 1.1 and DWARF 2 */
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- /* DWARF 2 */
- .debug_info 0 : { *(.debug_info) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line) }
- .debug_frame 0 : { *(.debug_frame) }
- .debug_str 0 : { *(.debug_str) }
- .debug_loc 0 : { *(.debug_loc) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- /* SGI/MIPS DWARF 2 extensions */
- .debug_weaknames 0 : { *(.debug_weaknames) }
- .debug_funcnames 0 : { *(.debug_funcnames) }
- .debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
- /* These must appear regardless of . */
- /* Discard them for now since Intel SoftSDV cannot handle them.
- .comment 0 : { *(.comment) }
- .note 0 : { *(.note) }
- */
- /DISCARD/ : { *(.comment) }
- /DISCARD/ : { *(.note) }
-}
+++ /dev/null
-/*
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * (Code copied from or=ther files)
- * Copyright (C) 1998-2000 Hewlett-Packard Co
- * Copyright (C) 1998-2000 David Mosberger-Tang <davidm@hpl.hp.com>
- *
- * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-
-
-#define __ASSEMBLY__ 1
-#include <linux/config.h>
-#include <asm/processor.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/sn2/shub_mmr.h>
-
-/*
- * This file contains additional set up code that is needed to get going on
- * Medusa. This code should disappear once real hw is available.
- *
- * On entry to this routine, the following register values are assumed:
- *
- * gr[8] - BSP cpu
- * pr[9] - kernel entry address
- * pr[10] - cpu number on the node
- *
- * NOTE:
- * This FPROM may be loaded/executed at an address different from the
- * address that it was linked at. The FPROM is linked to run on node 0
- * at address 0x100000. If the code in loaded into another node, it
- * must be loaded at offset 0x100000 of the node. In addition, the
- * FPROM does the following things:
- * - determine the base address of the node it is loaded on
- * - add the node base to _gp.
- * - add the node base to all addresses derived from "movl"
- * instructions. (I couldnt get GPREL addressing to work)
- * (maybe newer versions of the tools will support this)
- * - scan the .got section and add the node base to all
- * pointers in this section.
- * - add the node base to all physical addresses in the
- * SAL/PAL/EFI table built by the C code. (This is done
- * in the C code - not here)
- * - add the node base to the TLB entries for vmlinux
- */
-
-#define KERNEL_BASE 0xe000000000000000
-#define BOOT_PARAM_ADDR 0x40000
-
-
-/*
- * ar.k0 gets set to IOPB_PA value, on 460gx chipset it should
- * be 0x00000ffffc000000, but on snia we use the (inverse swizzled)
- * IOSPEC_BASE value
- */
-#ifdef SGI_SN2
-#define IOPB_PA 0xc000000fcc000000
-#endif
-
-#define RR_RID 8
-
-
-
-// ====================================================================================
- .text
- .align 16
- .global _start
- .proc _start
-_start:
-
-// Setup psr and rse for system init
- mov psr.l = r0;;
- srlz.d;;
- invala
- mov ar.rsc = r0;;
- loadrs
- ;;
-
-// Isolate node number we are running on.
- mov r6 = ip;;
-#ifdef SGI_SN2
- shr r5 = r6,38 // r5 = node number
- dep r6 = 0,r6,0,36 // r6 = base memory address of node
-
-#endif
-
-
-// Set & relocate gp.
- movl r1= __gp;; // Add base memory address
- or r1 = r1,r6 // Relocate to boot node
-
-// Lets figure out who we are & put it in the LID register.
-#ifdef SGI_SN2
-// On SN2, we (currently) pass the cpu number in r10 at boot
- and r25=3,r10;;
- movl r16=0x8000008110000400 // Allow IPIs
- mov r17=-1;;
- st8 [r16]=r17
- movl r16=0x8000008110060580;; // SHUB_ID
- ld8 r27=[r16];;
- extr.u r27=r27,32,11;;
- shl r26=r25,28;; // Align local cpu# to lid.eid
- shl r27=r27,16;; // Align NASID to lid.id
- or r26=r26,r27;; // build the LID
-#else
-// The BR_PI_SELF_CPU_NUM register gives us a value of 0-3.
-// This identifies the cpu on the node.
-// Merge the cpu number with the NASID to generate the LID.
- movl r24=0x80000a0001000020;; // BR_PI_SELF_CPU_NUM
- ld8 r25=[r24] // Fetch PI_SELF
- movl r27=0x80000a0001600000;; // Fetch REVID to get local NASID
- ld8 r27=[r27];;
- extr.u r27=r27,32,8;;
- shl r26=r25,16;; // Align local cpu# to lid.eid
- shl r27=r27,24;; // Align NASID to lid.id
- or r26=r26,r27;; // build the LID
-#endif
- mov cr.lid=r26 // Now put in in the LID register
-
- movl r2=FPSR_DEFAULT;;
- mov ar.fpsr=r2
- movl sp = bootstacke-16;;
- or sp = sp,r6 // Relocate to boot node
-
-// Save the NASID that we are loaded on.
- movl r2=base_nasid;; // Save base_nasid for C code
- or r2 = r2,r6;; // Relocate to boot node
- st8 [r2]=r5 // Uncond st8 - same on all cpus
-
-// Save the kernel entry address. It is passed in r9 on one of
-// the cpus.
- movl r2=bsp_entry_pc
- cmp.ne p6,p0=r9,r0;;
- or r2 = r2,r6;; // Relocate to boot node
-(p6) st8 [r2]=r9 // Uncond st8 - same on all cpus
-
-
-// The following can ONLY be done by 1 cpu. Lets set a lock - the
-// cpu that gets it does the initilization. The rest just spin waiting
-// til initilization is complete.
- movl r22 = initlock;;
- or r22 = r22,r6 // Relocate to boot node
- mov r23 = 1;;
- xchg8 r23 = [r22],r23;;
- cmp.eq p6,p0 = 0,r23
-(p6) br.cond.spnt.few init
-1: ld4 r23 = [r22];;
- cmp.eq p6,p0 = 1,r23
-(p6) br.cond.sptk 1b
- br initx
-
-// Add base address of node memory to each pointer in the .got section.
-init: movl r16 = _GLOBAL_OFFSET_TABLE_;;
- or r16 = r16,r6;; // Relocate to boot node
-1: ld8 r17 = [r16];;
- cmp.eq p6,p7=0,r17
-(p6) br.cond.sptk.few.clr 2f;;
- or r17 = r17,r6;; // Relocate to boot node
- st8 [r16] = r17,8
- br 1b
-2:
- mov r23 = 2;; // All done, release the spinning cpus
- st4 [r22] = r23
-initx:
-
-//
-// I/O-port space base address:
-//
- movl r2 = IOPB_PA;;
- mov ar.k0 = r2
-
-
-// Now call main & pass it the current LID value.
- alloc r2=ar.pfs,0,0,2,0
- mov r32=r26
- mov r33=r8;;
- br.call.sptk.few rp=fmain
-
-// Initialize Region Registers
-//
- mov r10 = r0
- mov r2 = (13<<2)
- mov r3 = r0;;
-1: cmp4.gtu p6,p7 = 7, r3
- dep r10 = r3, r10, 61, 3
- dep r2 = r3, r2, RR_RID, 4;;
-(p7) dep r2 = 0, r2, 0, 1;;
-(p6) dep r2 = -1, r2, 0, 1;;
- mov rr[r10] = r2
- add r3 = 1, r3;;
- srlz.d;;
- cmp4.gtu p6,p0 = 8, r3
-(p6) br.cond.sptk.few.clr 1b
-
-//
-// Return value indicates if we are the BSP or AP.
-// 1 = BSP, 0 = AP
- mov cr.tpr=r0;;
- cmp.eq p6,p0=r8,r0
-(p6) br.cond.spnt slave
-
-//
-// Go to kernel C startup routines
-// Need to do a "rfi" in order set "it" and "ed" bits in the PSR.
-// This is the only way to set them.
-
- movl r28=BOOT_PARAM_ADDR
- movl r2=bsp_entry_pc;;
- or r28 = r28,r6;; // Relocate to boot node
- or r2 = r2,r6;; // Relocate to boot node
- ld8 r2=[r2];;
- or r2=r2,r6;;
- dep r2=0,r2,61,3;; // convert to phys mode
-
-//
-// Turn on address translation, interrupt collection, psr.ed, protection key.
-// Interrupts (PSR.i) are still off here.
-//
-
- movl r3 = ( IA64_PSR_BN | \
- IA64_PSR_AC | \
- IA64_PSR_DB | \
- IA64_PSR_DA | \
- IA64_PSR_IC \
- )
- ;;
- mov cr.ipsr = r3
-
-//
-// Go to kernel C startup routines
-// Need to do a "rfi" in order set "it" and "ed" bits in the PSR.
-// This is the only way to set them.
-
- mov r8=r28;;
- bsw.1 ;;
- mov r28=r8;;
- bsw.0 ;;
- mov cr.iip = r2
- srlz.d;;
- rfi;;
-
- .endp _start
-
-
-
-// Slave processors come here to spin til they get an interrupt. Then they launch themselves to
-// the place ap_entry points. No initialization is necessary - the kernel makes no
-// assumptions about state on this entry.
-// Note: should verify that the interrupt we got was really the ap_wakeup
-// interrupt but this should not be an issue on medusa
-slave:
- nop.i 0x8beef // Medusa - put cpu to sleep til interrupt occurs
- mov r8=cr.irr0;; // Check for interrupt pending.
- cmp.eq p6,p0=r8,r0
-(p6) br.cond.sptk slave;;
-
- mov r8=cr.ivr;; // Got one. Must read ivr to accept it
- srlz.d;;
- mov cr.eoi=r0;; // must write eoi to clear
- movl r8=ap_entry;; // now jump to kernel entry
- or r8 = r8,r6;; // Relocate to boot node
- ld8 r9=[r8],8;;
- ld8 r1=[r8]
- mov b0=r9;;
- br b0
-
-// Here is the kernel stack used for the fake PROM
- .bss
- .align 16384
-bootstack:
- .skip 16384
-bootstacke:
-initlock:
- data4
-
-
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////
-// This code emulates the PAL. Only essential interfaces are emulated.
-
-
- .text
- .global pal_emulator
- .proc pal_emulator
-pal_emulator:
- mov r8=-1
-
- mov r9=256
- ;;
- cmp.gtu p6,p7=r9,r28 /* r28 <= 255? */
-(p6) br.cond.sptk.few static
- ;;
- mov r9=512
- ;;
- cmp.gtu p6,p7=r9,r28
-(p6) br.cond.sptk.few stacked
- ;;
-
-static: cmp.eq p6,p7=6,r28 /* PAL_PTCE_INFO */
-(p7) br.cond.sptk.few 1f
- movl r8=0 /* status = 0 */
- movl r9=0x100000000 /* tc.base */
- movl r10=0x0000000200000003 /* count[0], count[1] */
- movl r11=0x1000000000002000 /* stride[0], stride[1] */
- ;;
-
-1: cmp.eq p6,p7=14,r28 /* PAL_FREQ_RATIOS */
-(p7) br.cond.sptk.few 1f
- movl r8=0 /* status = 0 */
- movl r9 =0x100000064 /* proc_ratio (1/100) */
- movl r10=0x100000100 /* bus_ratio<<32 (1/256) */
- movl r11=0x10000000a /* itc_ratio<<32 (1/100) */
- ;;
-
-1: cmp.eq p6,p7=8,r28 /* PAL_VM_SUMMARY */
-(p7) br.cond.sptk.few 1f
- movl r8=0
-#ifdef SGI_SN2
- movl r9=0x0203083001151065
- movl r10=0x183f
-#endif
- movl r11=0
- ;;
-
-1: cmp.eq p6,p7=19,r28 /* PAL_RSE_INFO */
-(p7) br.cond.sptk.few 1f
- movl r8=0
- movl r9=0x60
- movl r10=0x0
- movl r11=0
- ;;
-
-1: cmp.eq p6,p7=15,r28 /* PAL_PERF_MON_INFO */
-(p7) br.cond.sptk.few 1f
- movl r8=0
- movl r9=0x08122004
- movl r10=0x0
- movl r11=0
- mov r2=ar.lc
- mov r3=16;;
- mov ar.lc=r3
- mov r3=r29;;
-5: st8 [r3]=r0,8
- br.cloop.sptk.few 5b;;
- mov ar.lc=r2
- mov r3=r29
- movl r2=0x1fff;; /* PMC regs */
- st8 [r3]=r2
- add r3=32,r3
- movl r2=0x3ffff;; /* PMD regs */
- st8 [r3]=r2
- add r3=32,r3
- movl r2=0xf0;; /* cycle regs */
- st8 [r3]=r2
- add r3=32,r3
- movl r2=0x10;; /* retired regs */
- st8 [r3]=r2
- ;;
-
-1: cmp.eq p6,p7=19,r28 /* PAL_RSE_INFO */
-(p7) br.cond.sptk.few 1f
- movl r8=0 /* status = 0 */
- movl r9=96 /* num phys stacked */
- movl r10=0 /* hints */
- movl r11=0
- ;;
-
-1: cmp.eq p6,p7=1,r28 /* PAL_CACHE_FLUSH */
-(p7) br.cond.sptk.few 1f
- mov r9=ar.lc
- movl r8=524288 /* flush 512k million cache lines (16MB) */
- ;;
- mov ar.lc=r8
- movl r8=0xe000000000000000
- ;;
-.loop: fc r8
- add r8=32,r8
- br.cloop.sptk.few .loop
- sync.i
- ;;
- srlz.i
- ;;
- mov ar.lc=r9
- mov r8=r0
-1: br.cond.sptk.few rp
-
-stacked:
- br.ret.sptk.few rp
-
- .endp pal_emulator
-
+++ /dev/null
-/*
- * PAL & SAL emulation.
- *
- * Copyright (C) 1998-2000 Hewlett-Packard Co
- * Copyright (C) 1998-2000 David Mosberger-Tang <davidm@hpl.hp.com>
- *
- *
- * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public
- * License along with this program; if not, write the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/NoticeExplan
- */
-#include <linux/config.h>
-#include <linux/efi.h>
-#include <linux/kernel.h>
-#include <asm/pal.h>
-#include <asm/sal.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/processor.h>
-#include <asm/sn/sn_cpuid.h>
-#ifdef SGI_SN2
-#include <asm/sn/sn2/addrs.h>
-#include <asm/sn/sn2/shub_mmr.h>
-#endif
-#include <linux/acpi.h>
-#include "fpmem.h"
-
-#define RSDP_NAME "RSDP"
-#define RSDP_SIG "RSD PTR " /* RSDT Pointer signature */
-#define APIC_SIG "APIC" /* Multiple APIC Description Table */
-#define DSDT_SIG "DSDT" /* Differentiated System Description Table */
-#define FADT_SIG "FACP" /* Fixed ACPI Description Table */
-#define FACS_SIG "FACS" /* Firmware ACPI Control Structure */
-#define PSDT_SIG "PSDT" /* Persistent System Description Table */
-#define RSDT_SIG "RSDT" /* Root System Description Table */
-#define XSDT_SIG "XSDT" /* Extended System Description Table */
-#define SSDT_SIG "SSDT" /* Secondary System Description Table */
-#define SBST_SIG "SBST" /* Smart Battery Specification Table */
-#define SPIC_SIG "SPIC" /* IOSAPIC table */
-#define SRAT_SIG "SRAT" /* SRAT table */
-#define SLIT_SIG "SLIT" /* SLIT table */
-#define BOOT_SIG "BOOT" /* Boot table */
-#define ACPI_SRAT_REVISION 1
-#define ACPI_SLIT_REVISION 1
-
-#define OEMID "SGI"
-#ifdef SGI_SN2
-#define PRODUCT "SN2"
-#define PROXIMITY_DOMAIN(nasid) (((nasid)>>1) & 255)
-#endif
-
-#define MB (1024*1024UL)
-#define GB (MB*1024UL)
-#define BOOT_PARAM_ADDR 0x40000
-#define MAX(i,j) ((i) > (j) ? (i) : (j))
-#define MIN(i,j) ((i) < (j) ? (i) : (j))
-#define ALIGN8(p) (((long)(p) +7) & ~7)
-
-#define FPROM_BUG() do {while (1);} while (0)
-#define MAX_SN_NODES 128
-#define MAX_LSAPICS 512
-#define MAX_CPUS 512
-#define MAX_CPUS_NODE 4
-#define CPUS_PER_NODE 4
-#define CPUS_PER_FSB 2
-#define CPUS_PER_FSB_MASK (CPUS_PER_FSB-1)
-
-#define NUM_EFI_DESCS 2
-
-#define RSDP_CHECKSUM_LENGTH 20
-
-typedef union ia64_nasid_va {
- struct {
-#if defined(SGI_SN2)
- unsigned long off : 36; /* intra-region offset */
- unsigned long attr : 2;
- unsigned long nasid : 11; /* NASID */
- unsigned long off2 : 12; /* fill */
- unsigned long reg : 3; /* region number */
-#endif
- } f;
- unsigned long l;
- void *p;
-} ia64_nasid_va;
-
-typedef struct {
- unsigned long pc;
- unsigned long gp;
-} func_ptr_t;
-
-#define IS_VIRTUAL_MODE() ({struct ia64_psr psr; asm("mov %0=psr" : "=r"(psr)); psr.dt;})
-#define ADDR_OF(p) (IS_VIRTUAL_MODE() ? ((void*)((long)(p)+PAGE_OFFSET)) : ((void*) (p)))
-
-#if defined(SGI_SN2)
-#define __fwtab_pa(n,x) ({ia64_nasid_va _v; _v.l = (long) (x); _v.f.nasid = (x) ? (n) : 0; _v.f.reg = 0; _v.f.attr = 3; _v.l;})
-#endif
-
-/*
- * The following variables are passed thru registersfrom the configuration file and
- * are set via the _start function.
- */
-long base_nasid;
-long num_cpus;
-long bsp_entry_pc=0;
-long num_nodes;
-long app_entry_pc;
-int bsp_lid;
-func_ptr_t ap_entry;
-
-
-extern void pal_emulator(void);
-static efi_runtime_services_t *efi_runtime_p;
-static char fw_mem[( sizeof(efi_system_table_t)
- + sizeof(efi_runtime_services_t)
- + NUM_EFI_DESCS*sizeof(efi_config_table_t)
- + sizeof(struct ia64_sal_systab)
- + sizeof(struct ia64_sal_desc_entry_point)
- + sizeof(struct ia64_sal_desc_ap_wakeup)
- + sizeof(struct acpi20_table_rsdp)
- + sizeof(struct acpi_table_xsdt)
- + sizeof(struct acpi_table_slit)
- + MAX_SN_NODES*MAX_SN_NODES+8
- + sizeof(struct acpi_table_madt)
- + 16*MAX_CPUS
- + (1+8*MAX_SN_NODES)*(sizeof(efi_memory_desc_t))
- + sizeof(struct acpi_table_srat)
- + MAX_CPUS*sizeof(struct acpi_table_processor_affinity)
- + MAX_SN_NODES*sizeof(struct acpi_table_memory_affinity)
- + sizeof(ia64_sal_desc_ptc_t) +
- + MAX_SN_NODES*sizeof(ia64_sal_ptc_domain_info_t) +
- + MAX_CPUS*sizeof(ia64_sal_ptc_domain_proc_entry_t) +
- + 1024)] __attribute__ ((aligned (8)));
-
-
-static efi_status_t
-efi_get_time (efi_time_t *tm, efi_time_cap_t *tc)
-{
- if (tm) {
- memset(tm, 0, sizeof(*tm));
- tm->year = 2000;
- tm->month = 2;
- tm->day = 13;
- tm->hour = 10;
- tm->minute = 11;
- tm->second = 12;
- }
-
- if (tc) {
- tc->resolution = 10;
- tc->accuracy = 12;
- tc->sets_to_zero = 1;
- }
-
- return EFI_SUCCESS;
-}
-
-static void
-efi_reset_system (int reset_type, efi_status_t status, unsigned long data_size, efi_char16_t *data)
-{
- while(1); /* Is there a pseudo-op to stop medusa */
-}
-
-static efi_status_t
-efi_success (void)
-{
- return EFI_SUCCESS;
-}
-
-static efi_status_t
-efi_unimplemented (void)
-{
- return EFI_UNSUPPORTED;
-}
-
-#ifdef SGI_SN2
-
-#undef cpu_physical_id
-#define cpu_physical_id(cpuid) ((ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff)
-
-void
-fprom_send_cpei(void) {
- long *p, val;
- long physid;
- long nasid, slice;
-
- physid = cpu_physical_id(0);
- nasid = cpu_physical_id_to_nasid(physid);
- slice = cpu_physical_id_to_slice(physid);
-
- p = (long*)GLOBAL_MMR_ADDR(nasid, SH_IPI_INT);
- val = (1UL<<SH_IPI_INT_SEND_SHFT) |
- (physid<<SH_IPI_INT_PID_SHFT) |
- ((long)0<<SH_IPI_INT_TYPE_SHFT) |
- ((long)0x1e<<SH_IPI_INT_IDX_SHFT) |
- (0x000feeUL<<SH_IPI_INT_BASE_SHFT);
- *p = val;
-
-}
-#endif
-
-
-static struct sal_ret_values
-sal_emulator (long index, unsigned long in1, unsigned long in2,
- unsigned long in3, unsigned long in4, unsigned long in5,
- unsigned long in6, unsigned long in7)
-{
- long r9 = 0;
- long r10 = 0;
- long r11 = 0;
- long status;
-
- /*
- * Don't do a "switch" here since that gives us code that
- * isn't self-relocatable.
- */
- status = 0;
- if (index == SAL_FREQ_BASE) {
- switch (in1) {
- case SAL_FREQ_BASE_PLATFORM:
- r9 = 500000000;
- break;
-
- case SAL_FREQ_BASE_INTERVAL_TIMER:
- /*
- * Is this supposed to be the cr.itc frequency
- * or something platform specific? The SAL
- * doc ain't exactly clear on this...
- */
- r9 = 700000000;
- break;
-
- case SAL_FREQ_BASE_REALTIME_CLOCK:
- r9 = 50000000;
- break;
-
- default:
- status = -1;
- break;
- }
- } else if (index == SAL_SET_VECTORS) {
- if (in1 == SAL_VECTOR_OS_BOOT_RENDEZ) {
- func_ptr_t *fp;
- fp = ADDR_OF(&ap_entry);
- fp->pc = in2;
- fp->gp = in3;
- } else if (in1 == SAL_VECTOR_OS_MCA || in1 == SAL_VECTOR_OS_INIT) {
- } else {
- status = -1;
- }
- ;
- } else if (index == SAL_GET_STATE_INFO) {
- ;
- } else if (index == SAL_GET_STATE_INFO_SIZE) {
- r9 = 10000;
- ;
- } else if (index == SAL_CLEAR_STATE_INFO) {
- ;
- } else if (index == SAL_MC_RENDEZ) {
- ;
- } else if (index == SAL_MC_SET_PARAMS) {
- ;
- } else if (index == SAL_CACHE_FLUSH) {
- ;
- } else if (index == SAL_CACHE_INIT) {
- ;
- } else if (index == SAL_UPDATE_PAL) {
- ;
-#ifdef SGI_SN2
- } else if (index == SN_SAL_LOG_CE) {
-#ifdef ajmtestcpei
- fprom_send_cpei();
-#else /* ajmtestcpei */
- ;
-#endif /* ajmtestcpei */
-#endif
- } else if (index == SN_SAL_PROBE) {
- r9 = 0UL;
- if (in2 == 4) {
- r9 = *(unsigned *)in1;
- if (r9 == -1) {
- status = 1;
- }
- } else if (in2 == 2) {
- r9 = *(unsigned short *)in1;
- if (r9 == -1) {
- status = 1;
- }
- } else if (in2 == 1) {
- r9 = *(unsigned char *)in1;
- if (r9 == -1) {
- status = 1;
- }
- } else if (in2 == 8) {
- r9 = *(unsigned long *)in1;
- if (r9 == -1) {
- status = 1;
- }
- } else {
- status = 2;
- }
- } else if (index == SN_SAL_GET_KLCONFIG_ADDR) {
- r9 = 0x30000;
- } else if (index == SN_SAL_CONSOLE_PUTC) {
- status = -1;
- } else if (index == SN_SAL_CONSOLE_GETC) {
- status = -1;
- } else if (index == SN_SAL_CONSOLE_POLL) {
- status = -1;
- } else if (index == SN_SAL_SYSCTL_IOBRICK_MODULE_GET) {
- status = -1;
- } else {
- status = -1;
- }
-
- asm volatile ("" :: "r"(r9), "r"(r10), "r"(r11));
- return ((struct sal_ret_values) {status, r9, r10, r11});
-}
-
-
-/*
- * This is here to work around a bug in egcs-1.1.1b that causes the
- * compiler to crash (seems like a bug in the new alias analysis code.
- */
-void *
-id (long addr)
-{
- return (void *) addr;
-}
-
-
-/*
- * Fix the addresses in a function pointer by adding base node address
- * to pc & gp.
- */
-void
-fix_function_pointer(void *fp)
-{
- func_ptr_t *_fp;
-
- _fp = fp;
- _fp->pc = __fwtab_pa(base_nasid, _fp->pc);
- _fp->gp = __fwtab_pa(base_nasid, _fp->gp);
-}
-
-void
-fix_virt_function_pointer(void **fptr)
-{
- func_ptr_t *fp;
- long *p;
-
- p = (long*)fptr;
- fp = *fptr;
- fp->pc = fp->pc | PAGE_OFFSET;
- fp->gp = fp->gp | PAGE_OFFSET;
- *p |= PAGE_OFFSET;
-}
-
-
-int
-efi_set_virtual_address_map(void)
-{
- efi_runtime_services_t *runtime;
-
- runtime = efi_runtime_p;
- fix_virt_function_pointer((void**)&runtime->get_time);
- fix_virt_function_pointer((void**)&runtime->set_time);
- fix_virt_function_pointer((void**)&runtime->get_wakeup_time);
- fix_virt_function_pointer((void**)&runtime->set_wakeup_time);
- fix_virt_function_pointer((void**)&runtime->set_virtual_address_map);
- fix_virt_function_pointer((void**)&runtime->get_variable);
- fix_virt_function_pointer((void**)&runtime->get_next_variable);
- fix_virt_function_pointer((void**)&runtime->set_variable);
- fix_virt_function_pointer((void**)&runtime->get_next_high_mono_count);
- fix_virt_function_pointer((void**)&runtime->reset_system);
- return EFI_SUCCESS;
-}
-
-void
-acpi_table_initx(struct acpi_table_header *p, char *sig, int siglen, int revision, int oem_revision)
-{
- memcpy(p->signature, sig, siglen);
- memcpy(p->oem_id, OEMID, 6);
- memcpy(p->oem_table_id, sig, 4);
- memcpy(p->oem_table_id+4, PRODUCT, 4);
- p->revision = revision;
- p->oem_revision = (revision<<16) + oem_revision;
- memcpy(p->asl_compiler_id, "FPRM", 4);
- p->asl_compiler_revision = 1;
-}
-
-void
-acpi_checksum(struct acpi_table_header *p, int length)
-{
- u8 *cp, *cpe, checksum;
-
- p->checksum = 0;
- p->length = length;
- checksum = 0;
- for (cp=(u8*)p, cpe=cp+p->length; cp<cpe; cp++)
- checksum += *cp;
- p->checksum = -checksum;
-}
-
-void
-acpi_checksum_rsdp20(struct acpi20_table_rsdp *p, int length)
-{
- u8 *cp, *cpe, checksum;
-
- p->checksum = 0;
- p->ext_checksum = 0;
- p->length = length;
- checksum = 0;
- for (cp=(u8*)p, cpe=cp+20; cp<cpe; cp++)
- checksum += *cp;
- p->checksum = -checksum;
-
- checksum = 0;
- for (cp=(u8*)p, cpe=cp+length; cp<cpe; cp++)
- checksum += *cp;
- p->ext_checksum = -checksum;
-}
-
-int
-nasid_present(int nasid)
-{
- int cnode;
- for (cnode=0; cnode<num_nodes; cnode++)
- if (GetNasid(cnode) == nasid)
- return 1;
- return 0;
-}
-
-void
-sys_fw_init (const char *args, int arglen, int bsp)
-{
- /*
- * Use static variables to keep from overflowing the RSE stack
- */
- static efi_system_table_t *efi_systab;
- static efi_runtime_services_t *efi_runtime;
- static efi_config_table_t *efi_tables;
- static ia64_sal_desc_ptc_t *sal_ptc;
- static ia64_sal_ptc_domain_info_t *sal_ptcdi;
- static ia64_sal_ptc_domain_proc_entry_t *sal_ptclid;
- static struct acpi20_table_rsdp *acpi20_rsdp;
- static struct acpi_table_xsdt *acpi_xsdt;
- static struct acpi_table_slit *acpi_slit;
- static struct acpi_table_madt *acpi_madt;
- static struct acpi_table_lsapic *lsapic20;
- static struct ia64_sal_systab *sal_systab;
- static struct acpi_table_srat *acpi_srat;
- static struct acpi_table_processor_affinity *srat_cpu_affinity;
- static struct acpi_table_memory_affinity *srat_memory_affinity;
- static efi_memory_desc_t *efi_memmap, *md;
- static unsigned long *pal_desc, *sal_desc;
- static struct ia64_sal_desc_entry_point *sal_ed;
- static struct ia64_boot_param *bp;
- static struct ia64_sal_desc_ap_wakeup *sal_apwake;
- static unsigned char checksum;
- static char *cp, *cmd_line, *vendor;
- static void *ptr;
- static int mdsize, domain, last_domain ;
- static int i, j, cnode, max_nasid, nasid, cpu, num_memmd, cpus_found;
-
- /*
- * Pass the parameter base address to the build_efi_xxx routines.
- */
-#if defined(SGI_SN2)
- build_init(0x3000000000UL | ((long)base_nasid<<38));
-#endif
-
- num_nodes = GetNumNodes();
- num_cpus = GetNumCpus();
- for (max_nasid=0, cnode=0; cnode<num_nodes; cnode++)
- max_nasid = MAX(max_nasid, GetNasid(cnode));
-
-
- memset(fw_mem, 0, sizeof(fw_mem));
-
- pal_desc = (unsigned long *) &pal_emulator;
- sal_desc = (unsigned long *) &sal_emulator;
- fix_function_pointer(&pal_emulator);
- fix_function_pointer(&sal_emulator);
-
- /* Align this to 16 bytes, probably EFI does this */
- mdsize = (sizeof(efi_memory_desc_t) + 15) & ~15 ;
-
- cp = fw_mem;
- efi_systab = (void *) cp; cp += ALIGN8(sizeof(*efi_systab));
- efi_runtime_p = efi_runtime = (void *) cp; cp += ALIGN8(sizeof(*efi_runtime));
- efi_tables = (void *) cp; cp += ALIGN8(NUM_EFI_DESCS*sizeof(*efi_tables));
- sal_systab = (void *) cp; cp += ALIGN8(sizeof(*sal_systab));
- sal_ed = (void *) cp; cp += ALIGN8(sizeof(*sal_ed));
- sal_ptc = (void *) cp; cp += ALIGN8(sizeof(*sal_ptc));
- sal_apwake = (void *) cp; cp += ALIGN8(sizeof(*sal_apwake));
- acpi20_rsdp = (void *) cp; cp += ALIGN8(sizeof(*acpi20_rsdp));
- acpi_xsdt = (void *) cp; cp += ALIGN8(sizeof(*acpi_xsdt) + 64);
- /* save space for more OS defined table pointers. */
-
- acpi_slit = (void *) cp; cp += ALIGN8(sizeof(*acpi_slit) + 8 + (max_nasid+1)*(max_nasid+1));
- acpi_madt = (void *) cp; cp += ALIGN8(sizeof(*acpi_madt) + sizeof(struct acpi_table_lsapic) * (num_cpus+1));
- acpi_srat = (void *) cp; cp += ALIGN8(sizeof(struct acpi_table_srat));
- cp += sizeof(struct acpi_table_processor_affinity)*num_cpus + sizeof(struct acpi_table_memory_affinity)*num_nodes;
- vendor = (char *) cp; cp += ALIGN8(40);
- efi_memmap = (void *) cp; cp += ALIGN8(8*32*sizeof(*efi_memmap));
- sal_ptcdi = (void *) cp; cp += ALIGN8(CPUS_PER_FSB*(1+num_nodes)*sizeof(*sal_ptcdi));
- sal_ptclid = (void *) cp; cp += ALIGN8(((3+num_cpus)*sizeof(*sal_ptclid)+7)/8*8);
- cmd_line = (void *) cp;
-
- if (args) {
- if (arglen >= 1024)
- arglen = 1023;
- memcpy(cmd_line, args, arglen);
- } else {
- arglen = 0;
- }
- cmd_line[arglen] = '\0';
- /*
- * For now, just bring up bash.
- * If you want to execute all the startup scripts, delete the "init=..".
- * You can also edit this line to pass other arguments to the kernel.
- * Note: disable kernel text replication.
- */
- strcpy(cmd_line, "init=/bin/bash console=ttyS0");
-
- memset(efi_systab, 0, sizeof(efi_systab));
- efi_systab->hdr.signature = EFI_SYSTEM_TABLE_SIGNATURE;
- efi_systab->hdr.revision = EFI_SYSTEM_TABLE_REVISION;
- efi_systab->hdr.headersize = sizeof(efi_systab->hdr);
- efi_systab->fw_vendor = __fwtab_pa(base_nasid, vendor);
- efi_systab->fw_revision = 1;
- efi_systab->runtime = __fwtab_pa(base_nasid, efi_runtime);
- efi_systab->nr_tables = 2;
- efi_systab->tables = __fwtab_pa(base_nasid, efi_tables);
- memcpy(vendor, "S\0i\0l\0i\0c\0o\0n\0-\0G\0r\0a\0p\0h\0i\0c\0s\0\0", 40);
-
- efi_runtime->hdr.signature = EFI_RUNTIME_SERVICES_SIGNATURE;
- efi_runtime->hdr.revision = EFI_RUNTIME_SERVICES_REVISION;
- efi_runtime->hdr.headersize = sizeof(efi_runtime->hdr);
- efi_runtime->get_time = __fwtab_pa(base_nasid, &efi_get_time);
- efi_runtime->set_time = __fwtab_pa(base_nasid, &efi_unimplemented);
- efi_runtime->get_wakeup_time = __fwtab_pa(base_nasid, &efi_unimplemented);
- efi_runtime->set_wakeup_time = __fwtab_pa(base_nasid, &efi_unimplemented);
- efi_runtime->set_virtual_address_map = __fwtab_pa(base_nasid, &efi_set_virtual_address_map);
- efi_runtime->get_variable = __fwtab_pa(base_nasid, &efi_unimplemented);
- efi_runtime->get_next_variable = __fwtab_pa(base_nasid, &efi_unimplemented);
- efi_runtime->set_variable = __fwtab_pa(base_nasid, &efi_unimplemented);
- efi_runtime->get_next_high_mono_count = __fwtab_pa(base_nasid, &efi_unimplemented);
- efi_runtime->reset_system = __fwtab_pa(base_nasid, &efi_reset_system);
-
- efi_tables->guid = SAL_SYSTEM_TABLE_GUID;
- efi_tables->table = __fwtab_pa(base_nasid, sal_systab);
- efi_tables++;
- efi_tables->guid = ACPI_20_TABLE_GUID;
- efi_tables->table = __fwtab_pa(base_nasid, acpi20_rsdp);
- efi_tables++;
-
- fix_function_pointer(&efi_unimplemented);
- fix_function_pointer(&efi_get_time);
- fix_function_pointer(&efi_success);
- fix_function_pointer(&efi_reset_system);
- fix_function_pointer(&efi_set_virtual_address_map);
-
-
- /* fill in the ACPI20 system table - has a pointer to the ACPI table header */
- memcpy(acpi20_rsdp->signature, "RSD PTR ", 8);
- acpi20_rsdp->xsdt_address = (u64)__fwtab_pa(base_nasid, acpi_xsdt);
- acpi20_rsdp->revision = 2;
- acpi_checksum_rsdp20(acpi20_rsdp, sizeof(struct acpi20_table_rsdp));
-
- /* Set up the XSDT table - contains pointers to the other ACPI tables */
- acpi_table_initx(&acpi_xsdt->header, XSDT_SIG, 4, 1, 1);
- acpi_xsdt->entry[0] = __fwtab_pa(base_nasid, acpi_madt);
- acpi_xsdt->entry[1] = __fwtab_pa(base_nasid, acpi_slit);
- acpi_xsdt->entry[2] = __fwtab_pa(base_nasid, acpi_srat);
- acpi_checksum(&acpi_xsdt->header, sizeof(struct acpi_table_xsdt) + 16);
-
- /* Set up the APIC table */
- acpi_table_initx(&acpi_madt->header, APIC_SIG, 4, 1, 1);
- lsapic20 = (struct acpi_table_lsapic*) (acpi_madt + 1);
- for (cnode=0; cnode<num_nodes; cnode++) {
- nasid = GetNasid(cnode);
- for(cpu=0; cpu<CPUS_PER_NODE; cpu++) {
- if (!IsCpuPresent(cnode, cpu))
- continue;
- lsapic20->header.type = ACPI_MADT_LSAPIC;
- lsapic20->header.length = sizeof(struct acpi_table_lsapic);
- lsapic20->acpi_id = cnode*4+cpu;
- lsapic20->flags.enabled = 1;
-#if defined(SGI_SN2)
- lsapic20->eid = nasid&0xffff;
- lsapic20->id = (cpu<<4) | (nasid>>16);
-#endif
- lsapic20 = (struct acpi_table_lsapic*) ((long)lsapic20+sizeof(struct acpi_table_lsapic));
- }
- }
- acpi_checksum(&acpi_madt->header, (char*)lsapic20 - (char*)acpi_madt);
-
- /* Set up the SRAT table */
- acpi_table_initx(&acpi_srat->header, SRAT_SIG, 4, ACPI_SRAT_REVISION, 1);
- ptr = acpi_srat+1;
- for (cnode=0; cnode<num_nodes; cnode++) {
- nasid = GetNasid(cnode);
- srat_memory_affinity = ptr;
- ptr = srat_memory_affinity+1;
- srat_memory_affinity->header.type = ACPI_SRAT_MEMORY_AFFINITY;
- srat_memory_affinity->header.length = sizeof(struct acpi_table_memory_affinity);
- srat_memory_affinity->proximity_domain = PROXIMITY_DOMAIN(nasid);
- srat_memory_affinity->base_addr_lo = 0;
- srat_memory_affinity->length_lo = 0;
-#if defined(SGI_SN2)
- srat_memory_affinity->base_addr_hi = (nasid<<6) | (3<<4);
- srat_memory_affinity->length_hi = (MD_BANKSIZE*MD_BANKS_PER_NODE)>>32;
-#endif
- srat_memory_affinity->memory_type = ACPI_ADDRESS_RANGE_MEMORY;
- srat_memory_affinity->flags.enabled = 1;
- }
-
- for (cnode=0; cnode<num_nodes; cnode++) {
- nasid = GetNasid(cnode);
- for(cpu=0; cpu<CPUS_PER_NODE; cpu++) {
- if (!IsCpuPresent(cnode, cpu))
- continue;
- srat_cpu_affinity = ptr;
- ptr = srat_cpu_affinity + 1;
- srat_cpu_affinity->header.type = ACPI_SRAT_PROCESSOR_AFFINITY;
- srat_cpu_affinity->header.length = sizeof(struct acpi_table_processor_affinity);
- srat_cpu_affinity->proximity_domain = PROXIMITY_DOMAIN(nasid);
- srat_cpu_affinity->flags.enabled = 1;
-#if defined(SGI_SN2)
- srat_cpu_affinity->lsapic_eid = nasid&0xffff;
- srat_cpu_affinity->apic_id = (cpu<<4) | (nasid>>16);
-#endif
- }
- }
- acpi_checksum(&acpi_srat->header, (char*)ptr - (char*)acpi_srat);
-
-
- /* Set up the SLIT table */
- acpi_table_initx(&acpi_slit->header, SLIT_SIG, 4, ACPI_SLIT_REVISION, 1);
- acpi_slit->localities = PROXIMITY_DOMAIN(max_nasid)+1;
- cp=acpi_slit->entry;
- memset(cp, 255, acpi_slit->localities*acpi_slit->localities);
-
- for (i=0; i<=max_nasid; i++)
- for (j=0; j<=max_nasid; j++)
- if (nasid_present(i) && nasid_present(j))
- *(cp+PROXIMITY_DOMAIN(i)*acpi_slit->localities+PROXIMITY_DOMAIN(j)) = 10 + MIN(254, 5*abs(i-j));
-
- cp = acpi_slit->entry + acpi_slit->localities*acpi_slit->localities;
- acpi_checksum(&acpi_slit->header, cp - (char*)acpi_slit);
-
-
- /* fill in the SAL system table: */
- memcpy(sal_systab->signature, "SST_", 4);
- sal_systab->size = sizeof(*sal_systab);
- sal_systab->sal_rev_minor = 1;
- sal_systab->sal_rev_major = 0;
- sal_systab->entry_count = 3;
- sal_systab->sal_b_rev_major = 0x1; /* set the SN SAL rev to */
- sal_systab->sal_b_rev_minor = 0x0; /* 1.00 */
-
- strcpy(sal_systab->oem_id, "SGI");
- strcpy(sal_systab->product_id, "SN2");
-
- /* fill in an entry point: */
- sal_ed->type = SAL_DESC_ENTRY_POINT;
- sal_ed->pal_proc = __fwtab_pa(base_nasid, pal_desc[0]);
- sal_ed->sal_proc = __fwtab_pa(base_nasid, sal_desc[0]);
- sal_ed->gp = __fwtab_pa(base_nasid, sal_desc[1]);
-
- /* kludge the PTC domain info */
- sal_ptc->type = SAL_DESC_PTC;
- sal_ptc->num_domains = 0;
- sal_ptc->domain_info = __fwtab_pa(base_nasid, sal_ptcdi);
- cpus_found = 0;
- last_domain = -1;
- sal_ptcdi--;
- for (cnode=0; cnode<num_nodes; cnode++) {
- nasid = GetNasid(cnode);
- for(cpu=0; cpu<CPUS_PER_NODE; cpu++) {
- if (IsCpuPresent(cnode, cpu)) {
- domain = cnode*CPUS_PER_NODE + cpu/CPUS_PER_FSB;
- if (domain != last_domain) {
- sal_ptc->num_domains++;
- sal_ptcdi++;
- sal_ptcdi->proc_count = 0;
- sal_ptcdi->proc_list = __fwtab_pa(base_nasid, sal_ptclid);
- last_domain = domain;
- }
- sal_ptcdi->proc_count++;
- sal_ptclid->id = nasid;
- sal_ptclid->eid = cpu;
- sal_ptclid++;
- cpus_found++;
- }
- }
- }
-
- if (cpus_found != num_cpus)
- FPROM_BUG();
-
- /* Make the AP WAKEUP entry */
- sal_apwake->type = SAL_DESC_AP_WAKEUP;
- sal_apwake->mechanism = IA64_SAL_AP_EXTERNAL_INT;
- sal_apwake->vector = 18;
-
- for (checksum=0, cp=(char*)sal_systab; cp < (char *)efi_memmap; ++cp)
- checksum += *cp;
- sal_systab->checksum = -checksum;
-
- /* If the checksum is correct, the kernel tries to use the
- * table. We dont build enough table & the kernel aborts.
- * Note that the PROM hasd thhhe same problem!!
- */
-
- md = &efi_memmap[0];
- num_memmd = build_efi_memmap((void *)md, mdsize) ;
-
- bp = (struct ia64_boot_param*) __fwtab_pa(base_nasid, BOOT_PARAM_ADDR);
- bp->efi_systab = __fwtab_pa(base_nasid, &fw_mem);
- bp->efi_memmap = __fwtab_pa(base_nasid, efi_memmap);
- bp->efi_memmap_size = num_memmd*mdsize;
- bp->efi_memdesc_size = mdsize;
- bp->efi_memdesc_version = 0x101;
- bp->command_line = __fwtab_pa(base_nasid, cmd_line);
- bp->console_info.num_cols = 80;
- bp->console_info.num_rows = 25;
- bp->console_info.orig_x = 0;
- bp->console_info.orig_y = 24;
- bp->fpswa = 0;
-
- /*
- * Now pick the BSP & store it LID value in
- * a global variable. Note if BSP is greater than last cpu,
- * pick the last cpu.
- */
- for (cnode=0; cnode<num_nodes; cnode++) {
- for(cpu=0; cpu<CPUS_PER_NODE; cpu++) {
- if (!IsCpuPresent(cnode, cpu))
- continue;
-#ifdef SGI_SN2
- bsp_lid = (GetNasid(cnode)<<16) | (cpu<<28);
-#endif
- if (bsp-- > 0)
- continue;
- return;
- }
- }
-}
+++ /dev/null
-/* $Id: klgraph_init.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-
-
-/*
- * This is a temporary file that statically initializes the expected
- * initial klgraph information that is normally provided by prom.
- */
-
-#include <linux/types.h>
-#include <linux/config.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/io.h>
-#include <asm/sn/driver.h>
-#include <asm/sn/iograph.h>
-#include <asm/param.h>
-#include <asm/sn/pio.h>
-#include <asm/sn/xtalk/xwidget.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/invent.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/hcl_util.h>
-#include <asm/sn/intr.h>
-#include <asm/sn/xtalk/xtalkaddrs.h>
-#include <asm/sn/klconfig.h>
-
-#define SYNERGY_WIDGET ((char *)0xc0000e0000000000)
-#define SYNERGY_SWIZZLE ((char *)0xc0000e0000000400)
-#define HUBREG ((char *)0xc0000a0001e00000)
-#define WIDGET0 ((char *)0xc0000a0000000000)
-#define WIDGET4 ((char *)0xc0000a0000000004)
-
-#define SYNERGY_WIDGET ((char *)0xc0000e0000000000)
-#define SYNERGY_SWIZZLE ((char *)0xc0000e0000000400)
-#define HUBREG ((char *)0xc0000a0001e00000)
-#define WIDGET0 ((char *)0xc0000a0000000000)
-
-#define convert(a,b,c) temp = (u64 *)a; *temp = b; temp++; *temp = c
-void
-klgraph_init(void)
-{
-
- u64 *temp;
- /*
- * Initialize some hub/xbow registers that allows access to
- * Xbridge etc. These are normally done in PROM.
- */
-
- /* Write IOERR clear to clear the CRAZY bit in the status */
- *(volatile uint64_t *)0xc000000801c001f8 = (uint64_t)0xffffffff;
-
- /* set widget control register...setting bedrock widget id to a */
- *(volatile uint64_t *)0xc000000801c00020 = (uint64_t)0x801a;
-
- /* set io outbound widget access...allow all */
- *(volatile uint64_t *)0xc000000801c00110 = (uint64_t)0xff01;
-
- /* set io inbound widget access...allow all */
- *(volatile uint64_t *)0xc000000801c00118 = (uint64_t)0xff01;
-
- /* set io crb timeout to max */
- *(volatile uint64_t *)0xc000000801c003c0 = (uint64_t)0xffffff;
- *(volatile uint64_t *)0xc000000801c003c0 = (uint64_t)0xffffff;
-
- /* set local block io permission...allow all */
-// [LB] *(volatile uint64_t *)0xc000000801e04010 = (uint64_t)0xfffffffffffffff;
-
- /* clear any errors */
- /* clear_ii_error(); medusa should have cleared these */
-
- /* set default read response buffers in bridge */
-// [PI] *(volatile u32 *)0xc00000080f000280L = 0xba98;
-// [PI] *(volatile u32 *)0xc00000080f000288L = 0xba98;
-
- /*
- * klconfig entries initialization - mankato
- */
- convert(0xe000003000030000, 0x00000000beedbabe, 0x0000004800000000);
- convert(0xe000003000030010, 0x0003007000000018, 0x800002000f820178);
- convert(0xe000003000030020, 0x80000a000f024000, 0x800002000f800000);
- convert(0xe000003000030030, 0x0300fafa00012580, 0x00000000040f0000);
- convert(0xe000003000030040, 0x0000000000000000, 0x0003097000030070);
- convert(0xe000003000030050, 0x00030970000303b0, 0x0003181000033f70);
- convert(0xe000003000030060, 0x0003d51000037570, 0x0000000000038330);
- convert(0xe000003000030070, 0x0203110100030140, 0x0001000000000101);
- convert(0xe000003000030080, 0x0900000000000000, 0x000000004e465e67);
- convert(0xe000003000030090, 0x0003097000000000, 0x00030b1000030a40);
- convert(0xe0000030000300a0, 0x00030cb000030be0, 0x000315a0000314d0);
- convert(0xe0000030000300b0, 0x0003174000031670, 0x0000000000000000);
- convert(0xe000003000030100, 0x000000000000001a, 0x3350490000000000);
- convert(0xe000003000030110, 0x0000000000000037, 0x0000000000000000);
- convert(0xe000003000030140, 0x0002420100030210, 0x0001000000000101);
- convert(0xe000003000030150, 0x0100000000000000, 0xffffffffffffffff);
- convert(0xe000003000030160, 0x00030d8000000000, 0x0000000000030e50);
- convert(0xe0000030000301c0, 0x0000000000000000, 0x0000000000030070);
- convert(0xe0000030000301d0, 0x0000000000000025, 0x424f490000000000);
- convert(0xe0000030000301e0, 0x000000004b434952, 0x0000000000000000);
- convert(0xe000003000030210, 0x00027101000302e0, 0x00010000000e4101);
- convert(0xe000003000030220, 0x0200000000000000, 0xffffffffffffffff);
- convert(0xe000003000030230, 0x00030f2000000000, 0x0000000000030ff0);
- convert(0xe000003000030290, 0x0000000000000000, 0x0000000000030140);
- convert(0xe0000030000302a0, 0x0000000000000026, 0x7262490000000000);
- convert(0xe0000030000302b0, 0x00000000006b6369, 0x0000000000000000);
- convert(0xe0000030000302e0, 0x0002710100000000, 0x00010000000f3101);
- convert(0xe0000030000302f0, 0x0500000000000000, 0xffffffffffffffff);
- convert(0xe000003000030300, 0x000310c000000000, 0x0003126000031190);
- convert(0xe000003000030310, 0x0003140000031330, 0x0000000000000000);
- convert(0xe000003000030360, 0x0000000000000000, 0x0000000000030140);
- convert(0xe000003000030370, 0x0000000000000029, 0x7262490000000000);
- convert(0xe000003000030380, 0x00000000006b6369, 0x0000000000000000);
- convert(0xe000003000030970, 0x0000000002010102, 0x0000000000000000);
- convert(0xe000003000030980, 0x000000004e465e67, 0xffffffff00000000);
- /* convert(0x00000000000309a0, 0x0000000000037570, 0x0000000100000000); */
- convert(0xe0000030000309a0, 0x0000000000037570, 0xffffffff00000000);
- convert(0xe0000030000309b0, 0x0000000000030070, 0x0000000000000000);
- convert(0xe0000030000309c0, 0x000000000003f420, 0x0000000000000000);
- convert(0xe000003000030a40, 0x0000000002010125, 0x0000000000000000);
- convert(0xe000003000030a50, 0xffffffffffffffff, 0xffffffff00000000);
- convert(0xe000003000030a70, 0x0000000000037b78, 0x0000000000000000);
- convert(0xe000003000030b10, 0x0000000002010125, 0x0000000000000000);
- convert(0xe000003000030b20, 0xffffffffffffffff, 0xffffffff00000000);
- convert(0xe000003000030b40, 0x0000000000037d30, 0x0000000000000001);
- convert(0xe000003000030be0, 0x00000000ff010203, 0x0000000000000000);
- convert(0xe000003000030bf0, 0xffffffffffffffff, 0xffffffff000000ff);
- convert(0xe000003000030c10, 0x0000000000037ee8, 0x0100010000000200);
- convert(0xe000003000030cb0, 0x00000000ff310111, 0x0000000000000000);
- convert(0xe000003000030cc0, 0xffffffffffffffff, 0x0000000000000000);
- convert(0xe000003000030d80, 0x0000000002010104, 0x0000000000000000);
- convert(0xe000003000030d90, 0xffffffffffffffff, 0x00000000000000ff);
- convert(0xe000003000030db0, 0x0000000000037f18, 0x0000000000000000);
- convert(0xe000003000030dc0, 0x0000000000000000, 0x0003007000060000);
- convert(0xe000003000030de0, 0x0000000000000000, 0x0003021000050000);
- convert(0xe000003000030df0, 0x000302e000050000, 0x0000000000000000);
- convert(0xe000003000030e30, 0x0000000000000000, 0x000000000000000a);
- convert(0xe000003000030e50, 0x00000000ff00011a, 0x0000000000000000);
- convert(0xe000003000030e60, 0xffffffffffffffff, 0x0000000000000000);
- convert(0xe000003000030e80, 0x0000000000037fe0, 0x9e6e9e9e9e9e9e9e);
- convert(0xe000003000030e90, 0x000000000000bc6e, 0x0000000000000000);
- convert(0xe000003000030f20, 0x0000000002010205, 0x00000000d0020000);
- convert(0xe000003000030f30, 0xffffffffffffffff, 0x0000000e0000000e);
- convert(0xe000003000030f40, 0x000000000000000e, 0x0000000000000000);
- convert(0xe000003000030f50, 0x0000000000038010, 0x00000000000007ff);
- convert(0xe000003000030f70, 0x0000000000000000, 0x0000000022001077);
- convert(0xe000003000030fa0, 0x0000000000000000, 0x000000000003f4a8);
- convert(0xe000003000030ff0, 0x0000000000310120, 0x0000000000000000);
- convert(0xe000003000031000, 0xffffffffffffffff, 0xffffffff00000002);
- convert(0xe000003000031010, 0x000000000000000e, 0x0000000000000000);
- convert(0xe000003000031020, 0x0000000000038088, 0x0000000000000000);
- convert(0xe0000030000310c0, 0x0000000002010205, 0x00000000d0020000);
- convert(0xe0000030000310d0, 0xffffffffffffffff, 0x0000000f0000000f);
- convert(0xe0000030000310e0, 0x000000000000000f, 0x0000000000000000);
- convert(0xe0000030000310f0, 0x00000000000380b8, 0x00000000000007ff);
- convert(0xe000003000031120, 0x0000000022001077, 0x00000000000310a9);
- convert(0xe000003000031130, 0x00000000580211c1, 0x000000008009104c);
- convert(0xe000003000031140, 0x0000000000000000, 0x000000000003f4c0);
- convert(0xe000003000031190, 0x0000000000310120, 0x0000000000000000);
- convert(0xe0000030000311a0, 0xffffffffffffffff, 0xffffffff00000003);
- convert(0xe0000030000311b0, 0x000000000000000f, 0x0000000000000000);
- convert(0xe0000030000311c0, 0x0000000000038130, 0x0000000000000000);
- convert(0xe000003000031260, 0x0000000000110106, 0x0000000000000000);
- convert(0xe000003000031270, 0xffffffffffffffff, 0xffffffff00000004);
- convert(0xe000003000031270, 0xffffffffffffffff, 0xffffffff00000004);
- convert(0xe000003000031280, 0x000000000000000f, 0x0000000000000000);
- convert(0xe0000030000312a0, 0x00000000ff110013, 0x0000000000000000);
- convert(0xe0000030000312b0, 0xffffffffffffffff, 0xffffffff00000000);
- convert(0xe0000030000312c0, 0x000000000000000f, 0x0000000000000000);
- convert(0xe0000030000312e0, 0x0000000000110012, 0x0000000000000000);
- convert(0xe0000030000312f0, 0xffffffffffffffff, 0xffffffff00000000);
- convert(0xe000003000031300, 0x000000000000000f, 0x0000000000000000);
- convert(0xe000003000031310, 0x0000000000038160, 0x0000000000000000);
- convert(0xe000003000031330, 0x00000000ff310122, 0x0000000000000000);
- convert(0xe000003000031340, 0xffffffffffffffff, 0xffffffff00000005);
- convert(0xe000003000031350, 0x000000000000000f, 0x0000000000000000);
- convert(0xe000003000031360, 0x0000000000038190, 0x0000000000000000);
- convert(0xe000003000031400, 0x0000000000310121, 0x0000000000000000);
- convert(0xe000003000031400, 0x0000000000310121, 0x0000000000000000);
- convert(0xe000003000031410, 0xffffffffffffffff, 0xffffffff00000006);
- convert(0xe000003000031420, 0x000000000000000f, 0x0000000000000000);
- convert(0xe000003000031430, 0x00000000000381c0, 0x0000000000000000);
- convert(0xe0000030000314d0, 0x00000000ff010201, 0x0000000000000000);
- convert(0xe0000030000314e0, 0xffffffffffffffff, 0xffffffff00000000);
- convert(0xe000003000031500, 0x00000000000381f0, 0x000030430000ffff);
- convert(0xe000003000031510, 0x000000000000ffff, 0x0000000000000000);
- convert(0xe0000030000315a0, 0x00000020ff000201, 0x0000000000000000);
- convert(0xe0000030000315b0, 0xffffffffffffffff, 0xffffffff00000001);
- convert(0xe0000030000315d0, 0x0000000000038240, 0x00003f3f0000ffff);
- convert(0xe0000030000315e0, 0x000000000000ffff, 0x0000000000000000);
- convert(0xe000003000031670, 0x00000000ff010201, 0x0000000000000000);
- convert(0xe000003000031680, 0xffffffffffffffff, 0x0000000100000002);
- convert(0xe0000030000316a0, 0x0000000000038290, 0x000030430000ffff);
- convert(0xe0000030000316b0, 0x000000000000ffff, 0x0000000000000000);
- convert(0xe000003000031740, 0x00000020ff000201, 0x0000000000000000);
- convert(0xe000003000031750, 0xffffffffffffffff, 0x0000000500000003);
- convert(0xe000003000031770, 0x00000000000382e0, 0x00003f3f0000ffff);
- convert(0xe000003000031780, 0x000000000000ffff, 0x0000000000000000);
-}
+++ /dev/null
-/*
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <asm/bitops.h>
-
-extern void klgraph_init(void);
-void bedrock_init(int);
-void synergy_init(int, int);
-void sys_fw_init (const char *args, int arglen, int bsp);
-
-volatile int bootmaster=0; /* Used to pick bootmaster */
-volatile int nasidmaster[128]={0}; /* Used to pick node/synergy masters */
-int init_done=0;
-extern int bsp_lid;
-
-#define get_bit(b,p) (((*p)>>(b))&1)
-
-int
-fmain(int lid, int bsp) {
- int syn, nasid, cpu;
-
- /*
- * First lets figure out who we are. This is done from the
- * LID passed to us.
- */
- nasid = (lid>>16)&0xfff;
- cpu = (lid>>28)&3;
- syn = 0;
-
- /*
- * Now pick a nasid master to initialize Bedrock registers.
- */
- if (test_and_set_bit(8, &nasidmaster[nasid]) == 0) {
- bedrock_init(nasid);
- test_and_set_bit(9, &nasidmaster[nasid]);
- } else
- while (get_bit(9, &nasidmaster[nasid]) == 0);
-
-
- /*
- * Now pick a BSP & finish init.
- */
- if (test_and_set_bit(0, &bootmaster) == 0) {
- sys_fw_init(0, 0, bsp);
- test_and_set_bit(1, &bootmaster);
- } else
- while (get_bit(1, &bootmaster) == 0);
-
- return (lid == bsp_lid);
-}
-
-
-void
-bedrock_init(int nasid)
-{
- nasid = nasid; /* to quiet gcc */
-#if 0
- /*
- * Undef if you need fprom to generate a 1 node klgraph
- * information .. only works for 1 node for nasid 0.
- */
- klgraph_init();
-#endif
-}
-
-
-void
-synergy_init(int nasid, int syn)
-{
- long *base;
- long off;
-
- /*
- * Enable all FSB flashed interrupts.
- * I'd really like defines for this......
- */
- base = (long*)0x80000e0000000000LL; /* base of synergy regs */
- for (off = 0x2a0; off < 0x2e0; off+=8) /* offset for VEC_MASK_{0-3}_A/B */
- *(base+off/8) = -1LL;
-
- /*
- * Set the NASID in the FSB_CONFIG register.
- */
- base = (long*)0x80000e0000000450LL;
- *base = (long)((nasid<<16)|(syn<<9));
-}
-
-
-/* Why isnt there a bcopy/memcpy in lib64.a */
-
-void*
-memcpy(void * dest, const void *src, size_t count)
-{
- char *s, *se, *d;
-
- for(d=dest, s=(char*)src, se=s+count; s<se; s++, d++)
- *d = *s;
- return dest;
-}
+++ /dev/null
-#!/bin/sh
-#
-# Build a textsym file for use in the Arium ITP probe.
-#
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (c) 2001-2003 Silicon Graphics, Inc. All rights reserved.
-#
-
-help() {
-cat <<END
-Build a WinDD "symtxt" file for use with the Arium ECM-30 probe.
-
- Usage: $0 [<vmlinux file> [<output file>]]
- If no input file is specified, it defaults to vmlinux.
- If no output file name is specified, it defaults to "textsym".
-END
-exit 1
-}
-
-err () {
- echo "ERROR - $*" >&2
- exit 1
-}
-
-
-OPTS="H"
-while getopts "$OPTS" c ; do
- case $c in
- H) help;;
- \?) help;;
- esac
-
-done
-shift `expr $OPTIND - 1`
-
-#OBJDUMP=/usr/bin/ia64-linux-objdump
-LINUX=${1:-vmlinux}
-TEXTSYM=${2:-${LINUX}.sym}
-TMPSYM=${2:-${LINUX}.sym.tmp}
-trap "/bin/rm -f $TMPSYM" 0
-
-[ -f $VMLINUX ] || help
-
-$OBJDUMP -t $LINUX | egrep -v '__ks' | sort > $TMPSYM
-SN1=`egrep "dig_setup|Synergy_da_indr" $TMPSYM|wc -l`
-
-# Dataprefix and textprefix correspond to the VGLOBAL_BASE and VPERNODE_BASE.
-# Eventually, these values should be:
-# dataprefix ffffffff
-# textprefix fffffffe
-# but right now they're still changing, so make them dynamic.
-dataprefix=`awk ' / \.data / { print substr($1, 0, 8) ; exit ; }' $TMPSYM`
-textprefix=`awk ' / \.text / { print substr($1, 0, 8) ; exit ; }' $TMPSYM`
-
-# pipe everything thru sort
-echo "TEXTSYM V1.0"
-(cat <<END
-GLOBAL | ${textprefix}00000000 | CODE | VEC_VHPT_Translation_0000
-GLOBAL | ${textprefix}00000400 | CODE | VEC_ITLB_0400
-GLOBAL | ${textprefix}00000800 | CODE | VEC_DTLB_0800
-GLOBAL | ${textprefix}00000c00 | CODE | VEC_Alt_ITLB_0c00
-GLOBAL | ${textprefix}00001000 | CODE | VEC_Alt_DTLB_1000
-GLOBAL | ${textprefix}00001400 | CODE | VEC_Data_nested_TLB_1400
-GLOBAL | ${textprefix}00001800 | CODE | VEC_Instruction_Key_Miss_1800
-GLOBAL | ${textprefix}00001c00 | CODE | VEC_Data_Key_Miss_1c00
-GLOBAL | ${textprefix}00002000 | CODE | VEC_Dirty-bit_2000
-GLOBAL | ${textprefix}00002400 | CODE | VEC_Instruction_Access-bit_2400
-GLOBAL | ${textprefix}00002800 | CODE | VEC_Data_Access-bit_2800
-GLOBAL | ${textprefix}00002c00 | CODE | VEC_Break_instruction_2c00
-GLOBAL | ${textprefix}00003000 | CODE | VEC_External_Interrupt_3000
-GLOBAL | ${textprefix}00003400 | CODE | VEC_Reserved_3400
-GLOBAL | ${textprefix}00003800 | CODE | VEC_Reserved_3800
-GLOBAL | ${textprefix}00003c00 | CODE | VEC_Reserved_3c00
-GLOBAL | ${textprefix}00004000 | CODE | VEC_Reserved_4000
-GLOBAL | ${textprefix}00004400 | CODE | VEC_Reserved_4400
-GLOBAL | ${textprefix}00004800 | CODE | VEC_Reserved_4800
-GLOBAL | ${textprefix}00004c00 | CODE | VEC_Reserved_4c00
-GLOBAL | ${textprefix}00005000 | CODE | VEC_Page_Not_Present_5000
-GLOBAL | ${textprefix}00005100 | CODE | VEC_Key_Permission_5100
-GLOBAL | ${textprefix}00005200 | CODE | VEC_Instruction_Access_Rights_5200
-GLOBAL | ${textprefix}00005300 | CODE | VEC_Data_Access_Rights_5300
-GLOBAL | ${textprefix}00005400 | CODE | VEC_General_Exception_5400
-GLOBAL | ${textprefix}00005500 | CODE | VEC_Disabled_FP-Register_5500
-GLOBAL | ${textprefix}00005600 | CODE | VEC_Nat_Consumption_5600
-GLOBAL | ${textprefix}00005700 | CODE | VEC_Speculation_5700
-GLOBAL | ${textprefix}00005800 | CODE | VEC_Reserved_5800
-GLOBAL | ${textprefix}00005900 | CODE | VEC_Debug_5900
-GLOBAL | ${textprefix}00005a00 | CODE | VEC_Unaligned_Reference_5a00
-GLOBAL | ${textprefix}00005b00 | CODE | VEC_Unsupported_Data_Reference_5b00
-GLOBAL | ${textprefix}00005c00 | CODE | VEC_Floating-Point_Fault_5c00
-GLOBAL | ${textprefix}00005d00 | CODE | VEC_Floating_Point_Trap_5d00
-GLOBAL | ${textprefix}00005e00 | CODE | VEC_Lower_Privilege_Tranfer_Trap_5e00
-GLOBAL | ${textprefix}00005f00 | CODE | VEC_Taken_Branch_Trap_5f00
-GLOBAL | ${textprefix}00006000 | CODE | VEC_Single_Step_Trap_6000
-GLOBAL | ${textprefix}00006100 | CODE | VEC_Reserved_6100
-GLOBAL | ${textprefix}00006200 | CODE | VEC_Reserved_6200
-GLOBAL | ${textprefix}00006300 | CODE | VEC_Reserved_6300
-GLOBAL | ${textprefix}00006400 | CODE | VEC_Reserved_6400
-GLOBAL | ${textprefix}00006500 | CODE | VEC_Reserved_6500
-GLOBAL | ${textprefix}00006600 | CODE | VEC_Reserved_6600
-GLOBAL | ${textprefix}00006700 | CODE | VEC_Reserved_6700
-GLOBAL | ${textprefix}00006800 | CODE | VEC_Reserved_6800
-GLOBAL | ${textprefix}00006900 | CODE | VEC_IA-32_Exeception_6900
-GLOBAL | ${textprefix}00006a00 | CODE | VEC_IA-32_Intercept_6a00
-GLOBAL | ${textprefix}00006b00 | CODE | VEC_IA-32_Interrupt_6b00
-GLOBAL | ${textprefix}00006c00 | CODE | VEC_Reserved_6c00
-GLOBAL | ${textprefix}00006d00 | CODE | VEC_Reserved_6d00
-GLOBAL | ${textprefix}00006e00 | CODE | VEC_Reserved_6e00
-GLOBAL | ${textprefix}00006f00 | CODE | VEC_Reserved_6f00
-GLOBAL | ${textprefix}00007000 | CODE | VEC_Reserved_7000
-GLOBAL | ${textprefix}00007100 | CODE | VEC_Reserved_7100
-GLOBAL | ${textprefix}00007200 | CODE | VEC_Reserved_7200
-GLOBAL | ${textprefix}00007300 | CODE | VEC_Reserved_7300
-GLOBAL | ${textprefix}00007400 | CODE | VEC_Reserved_7400
-GLOBAL | ${textprefix}00007500 | CODE | VEC_Reserved_7500
-GLOBAL | ${textprefix}00007600 | CODE | VEC_Reserved_7600
-GLOBAL | ${textprefix}00007700 | CODE | VEC_Reserved_7700
-GLOBAL | ${textprefix}00007800 | CODE | VEC_Reserved_7800
-GLOBAL | ${textprefix}00007900 | CODE | VEC_Reserved_7900
-GLOBAL | ${textprefix}00007a00 | CODE | VEC_Reserved_7a00
-GLOBAL | ${textprefix}00007b00 | CODE | VEC_Reserved_7b00
-GLOBAL | ${textprefix}00007c00 | CODE | VEC_Reserved_7c00
-GLOBAL | ${textprefix}00007d00 | CODE | VEC_Reserved_7d00
-GLOBAL | ${textprefix}00007e00 | CODE | VEC_Reserved_7e00
-GLOBAL | ${textprefix}00007f00 | CODE | VEC_Reserved_7f00
-END
-
-
-awk '
-/ _start$/ {start=1}
-/ start_ap$/ {start=1}
-/__start_gate_section/ {start=1}
-/^'${dataprefix}\|${textprefix}'/ {
- if ($4 == ".kdb")
- next
- if (start && substr($NF,1,1) != "0") {
- type = substr($0,26,5)
- if (type == ".text")
- printf "GLOBAL | %s | CODE | %s\n", $1, $NF
- else {
- n = 0
- s = $(NF-1)
- while (length(s) > 0) {
- n = n*16 + (index("0123456789abcdef", substr(s,1,1)) - 1)
- s = substr(s,2)
- }
- printf "GLOBAL | %s | DATA | %s | %d\n", $1, $NF, n
- }
- }
- if($NF == "_end")
- exit
-
-}
-' $TMPSYM ) | egrep -v " __device| __vendor" | awk -v sn1="$SN1" '
-/GLOBAL/ {
- print $0
- if (sn1 != 0) {
- /* 32 bits of sn1 physical addrs, */
- print substr($0,1,9) "04" substr($0,20,16) "Phy_" substr($0,36)
- } else {
- /* 38 bits of sn2 physical addrs, need addr space bits */
- print substr($0,1,9) "3004" substr($0,20,16) "Phy_" substr($0,36)
- }
-
-} ' | sort -k3
-
-N=`wc -l $TEXTSYM|awk '{print $1}'`
-echo "Generated TEXTSYM file" >&2
-echo " $LINUX --> $TEXTSYM" >&2
-echo " Found $N symbols" >&2
+++ /dev/null
-#!/bin/sh
-
-# Script for running PROMs and LINUX kernwls on medusa.
-# Type "sim -H" for instructions.
-
-MEDUSA=${MEDUSA:-/home/rickc/official_medusa/medusa}
-
-# ------------------ err -----------------------
-err() {
- echo "ERROR - $1"
- exit 1
-}
-
-# ---------------- help ----------------------
-help() {
-cat <<END
-Script for running a PROM or LINUX kernel under medusa.
-This script creates a control file, creates links to the appropriate
-linux/prom files, and/or calls medusa to make simulation runs.
-
-Usage:
- Initial setup:
- sim [-c <config_file>] <-p> | <-k> [<work_dir>]
- -p Create PROM control file & links
- -k Create LINUX control file & links
- -c<cf> Control file name [Default: cf]
- <work_dir> Path to directory that contains the linux or PROM files.
- The directory can be any of the following:
- (linux simulations)
- worktree
- worktree/linux
- any directory with vmlinux, vmlinux.sym & fprom files
- (prom simulations)
- worktree
- worktree/stand/arcs/IP37prom/dev
- any directory with fw.bin & fw.sim files
-
- Simulations:
- sim [-X <n>] [-o <output>] [-M] [<config_file>]
- -c<cf> Control file name [Default: cf]
- -M Pipe output thru fmtmedusa
- -o Output filename (copy of all commands/output) [Default: simout]
- -X Specifies number of instructions to execute [Default: 0]
- (Used only in auto test mode - not described here)
-
-Examples:
- sim -p <promtree> # create control file (cf) & links for prom simulations
- sim -k <linuxtree> # create control file (cf) & links for linux simulations
- sim -p -c cfprom # create a prom control file (cfprom) only. No links are made.
-
- sim # run medusa using previously created links &
- # control file (cf).
-END
-exit 1
-}
-
-# ----------------------- create control file header --------------------
-create_cf_header() {
-cat <<END >>$CF
-#
-# Template for a control file for running linux kernels under medusa.
-# You probably want to make mods here but this is a good starting point.
-#
-
-# Preferences
-setenv cpu_stepping A
-setenv exceptionPrint off
-setenv interrupt_messages off
-setenv lastPCsize 100000
-setenv low_power_mode on
-setenv partialIntelChipSet on
-setenv printIntelMessages off
-setenv prom_write_action halt
-setenv prom_write_messages on
-setenv step_quantum 100
-setenv swizzling on
-setenv tsconsole on
-setenv uart_echo on
-symbols on
-
-# IDE disk params
-setenv diskCylinders 611
-setenv bootDrive C
-setenv diskHeads 16
-setenv diskPath idedisk
-setenv diskPresent 1
-setenv diskSpt 63
-
-# Hardware config
-setenv coherency_type nasid
-setenv cpu_cache_type default
-setenv synergy_cache_type syn_cac_64m_8w
-setenv l4_uc_snoop off
-
-# Numalink config
-setenv route_enable on
-setenv network_type router # Select [xbar|router]
-setenv network_warning 0xff
-
-END
-}
-
-
-# ------------------ create control file entries for linux simulations -------------
-create_cf_linux() {
-cat <<END >>$CF
-# Kernel specific options
-setenv calias_size 0
-setenv mca_on_memory_failure off
-setenv LOADPC 0x00100000 # FPROM load address/entry point (8 digits!)
-setenv symbol_table vmlinux.sym
-load fprom
-load vmlinux
-
-# Useful breakpoints to always have set. Add more if desired.
-break 0xe000000000505e00 all # dispatch_to_fault_handler
-break panic all # stop on panic
-break die_if_kernel all # may as well stop
-
-END
-}
-
-# ------------------ create control file entries for prom simulations ---------------
-create_cf_prom() {
- SYM2=""
- ADDR="0x80000000ff800000"
- [ "$EMBEDDED_LINUX" != "0" ] || SYM2="setenv symbol_table2 vmlinux.sym"
- [ "$SIZE" = "8MB" ] || ADDR="0x80000000ffc00000"
- cat <<END >>$CF
-# PROM specific options
-setenv mca_on_memory_failure on
-setenv LOADPC 0x80000000ffffffb0
-setenv promFile fw.bin
-setenv promAddr $ADDR
-setenv symbol_table fw.sym
-$SYM2
-
-# Useful breakpoints to always have set. Add more if desired.
-break ivt_gexx all
-break ivt_brk all
-break PROM_Panic_Spin all
-break PROM_Panic all
-break PROM_C_Panic all
-break fled_die all
-break ResetNow all
-break zzzbkpt all
-
-END
-}
-
-
-# ------------------ create control file entries for memory configuration -------------
-create_cf_memory() {
-cat <<END >>$CF
-# CPU/Memory map format:
-# setenv nodeN_memory_config 0xBSBSBSBS
-# B=banksize (0=unused, 1=64M, 2=128M, .., 5-1G, c=8M, d=16M, e=32M)
-# S=bank enable (0=both disable, 3=both enable, 2=bank1 enable, 1=bank0 enable)
-# rightmost digits are for bank 0, the lowest address.
-# setenv nodeN_nasid <nasid>
-# specifies the NASID for the node. This is used ONLY if booting the kernel.
-# On PROM configurations, set to 0 - PROM will change it later.
-# setenv nodeN_cpu_config <cpu_mask>
-# Set bit number N to 1 to enable cpu N. Ex., a value of 5 enables cpu 0 & 2.
-#
-# Repeat the above 3 commands for each node.
-#
-# For kernel, default to 32MB. Although this is not a valid hardware configuration,
-# it runs faster on medusa. For PROM, 64MB is smallest allowed value.
-
-setenv node0_cpu_config 0x1 # Enable only cpu 0 on the node
-END
-
-if [ $LINUX -eq 1 ] ; then
-cat <<END >>$CF
-setenv node0_nasid 0 # cnode 0 has NASID 0
-setenv node0_memory_config 0xe1 # 32MB
-END
-else
-cat <<END >>$CF
-setenv node0_memory_config 0x31 # 256MB
-END
-fi
-}
-
-# -------------------- set links to linux files -------------------------
-set_linux_links() {
- if [ -d $D/linux/arch ] ; then
- D=$D/linux
- elif [ -d $D/arch -o -e vmlinux.sym -o -e $D/vmlinux ] ; then
- D=$D
- else
- err "cant determine directory for linux binaries"
- fi
- rm -rf vmlinux vmlinux.sym fprom
- ln -s $D/vmlinux vmlinux
- if [ -f $D/vmlinux.sym ] ; then
- ln -s $D/vmlinux.sym vmlinux.sym
- elif [ -f $D/System.map ] ; then
- ln -s $D/System.map vmlinux.sym
- fi
- if [ -d $D/arch ] ; then
- ln -s $D/arch/ia64/sn/fprom/fprom fprom
- else
- ln -s $D/fprom fprom
- fi
- echo " .. Created links to linux files"
-}
-
-# -------------------- set links to prom files -------------------------
-set_prom_links() {
- if [ -d $D/stand ] ; then
- D=$D/stand/arcs/IP37prom/dev
- elif [ -d $D/sal ] ; then
- D=$D
- else
- err "cant determine directory for PROM binaries"
- fi
- SETUP="/tmp/tmp.$$"
- rm -r -f $SETUP
- sed 's/export/setenv/' < $D/../../../../.setup | sed 's/=/ /' >$SETUP
- egrep -q '^ *setenv *PROMSIZE *8MB|^ *export' $SETUP
- if [ $? -eq 0 ] ; then
- SIZE="8MB"
- else
- SIZE="4MB"
- fi
- grep -q '^ *setenv *LAUNCH_VMLINUX' $SETUP
- EMBEDDED_LINUX=$?
- PRODUCT=`grep '^ *setenv *PRODUCT' $SETUP | cut -d" " -f3`
- rm -f fw.bin fw.map fw.sym vmlinux vmlinux.sym fprom $SETUP
- SDIR="${PRODUCT}${SIZE}.O"
- BIN="${PRODUCT}ip37prom${SIZE}"
- ln -s $D/$SDIR/$BIN.bin fw.bin
- ln -s $D/$SDIR/$BIN.map fw.map
- ln -s $D/$SDIR/$BIN.sym fw.sym
- echo " .. Created links to $SIZE prom files"
- if [ $EMBEDDED_LINUX -eq 0 ] ; then
- ln -s $D/linux/vmlinux vmlinux
- ln -s $D/linux/vmlinux.sym vmlinux.sym
- if [ -d linux/arch ] ; then
- ln -s $D/linux/arch/ia64/sn/fprom/fprom fprom
- else
- ln -s $D/linux/fprom fprom
- fi
- echo " .. Created links to embedded linux files in prom tree"
- fi
-}
-
-# --------------- start of shell script --------------------------------
-OUT="simout"
-FMTMED=0
-STEPCNT=0
-PROM=0
-LINUX=0
-NCF="cf"
-while getopts "HMX:c:o:pk" c ; do
- case ${c} in
- H) help;;
- M) FMTMED=1;;
- X) STEPCNT=${OPTARG};;
- c) NCF=${OPTARG};;
- k) PROM=0;LINUX=1;;
- p) PROM=1;LINUX=0;;
- o) OUT=${OPTARG};;
- \?) exit 1;;
- esac
-done
-shift `expr ${OPTIND} - 1`
-
-# Check if command is for creating control file and/or links to images.
-if [ $PROM -eq 1 -o $LINUX -eq 1 ] ; then
- CF=$NCF
- [ ! -f $CF ] || err "wont overwrite an existing control file ($CF)"
- if [ $# -gt 0 ] ; then
- D=$1
- [ -d $D ] || err "cannot find directory $D"
- [ $PROM -eq 0 ] || set_prom_links
- [ $LINUX -eq 0 ] || set_linux_links
- fi
- create_cf_header
- [ $PROM -eq 0 ] || create_cf_prom
- [ $LINUX -eq 0 ] || create_cf_linux
- [ ! -f ../idedisk ] || ln -s ../idedisk .
- create_cf_memory
- echo " .. Basic control file created (in $CF). You might want to edit"
- echo " this file (at least, look at it)."
- exit 0
-fi
-
-# Verify that the control file exists
-CF=${1:-$NCF}
-[ -f $CF ] || err "No control file exists. For help, type: $0 -H"
-
-# Build the .cf files from the user control file. The .cf file is
-# identical except that the actual start & load addresses are inserted
-# into the file. In addition, the FPROM commands for configuring memory
-# and LIDs are generated.
-
-rm -f .cf .cf1 .cf2
-awk '
-function strtonum(n) {
- if (substr(n,1,2) != "0x")
- return int(n)
- n = substr(n,3)
- r=0
- while (length(n) > 0) {
- r = r*16+(index("0123456789abcdef", substr(n,1,1))-1)
- n = substr(n,2)
- }
- return r
- }
-/^#/ {next}
-/^$/ {next}
-/^setenv *LOADPC/ {loadpc = $3; next}
-/^setenv *node.._cpu_config/ {n=int(substr($2,5,2)); cpuconf[n] = strtonum($3); print; next}
-/^setenv *node.._memory_config/ {n=int(substr($2,5,2)); memconf[n] = strtonum($3); print; next}
-/^setenv *node.._nasid/ {n=int(substr($2,5,2)); nasid[n] = strtonum($3); print; next}
-/^setenv *node._cpu_config/ {n=int(substr($2,5,1)); cpuconf[n] = strtonum($3); print; next}
-/^setenv *node._memory_config/ {n=int(substr($2,5,1)); memconf[n] = strtonum($3); print; next}
-/^setenv *node._nasid/ {n=int(substr($2,5,1)); nasid[n] = strtonum($3); print; next}
- {print}
-END {
- # Generate the memmap info that starts at the beginning of
- # the node the kernel was loaded on.
- loadnasid = nasid[0]
- cnode = 0
- for (i=0; i<128; i++) {
- if (memconf[i] != "") {
- printf "sm 0x%x%08x 0x%x%04x%04x\n",
- 2*loadnasid, 8*cnodes+8, memconf[i], cpuconf[i], nasid[i]
- cnodes++
- cpus += substr("0112122312232334", cpuconf[i]+1,1)
- }
- }
- printf "sm 0x%x00000000 0x%x%08x\n", 2*loadnasid, cnodes, cpus
- printf "setenv number_of_nodes %d\n", cnodes
-
- # Now set the starting PC for each cpu.
- cnode = 0
- lowcpu=-1
- for (i=0; i<128; i++) {
- if (memconf[i] != "") {
- printf "setnode %d\n", cnode
- conf = cpuconf[i]
- for (j=0; j<4; j++) {
- if (conf != int(conf/2)*2) {
- printf "setcpu %d\n", j
- if (length(loadpc) == 18)
- printf "sr pc %s\n", loadpc
- else
- printf "sr pc 0x%x%s\n", 2*loadnasid, substr(loadpc,3)
- if (lowcpu == -1)
- lowcpu = j
- }
- conf = int(conf/2)
- }
- cnode++
- }
- }
- printf "setnode 0\n"
- printf "setcpu %d\n", lowcpu
- }
-' <$CF >.cf
-
-# Now build the .cf1 & .cf2 control files.
-CF2_LINES="^sm |^break |^run |^si |^quit |^symbols "
-egrep "$CF2_LINES" .cf >.cf2
-egrep -v "$CF2_LINES" .cf >.cf1
-if [ $STEPCNT -ne 0 ] ; then
- echo "s $STEPCNT" >>.cf2
- echo "lastpc 1000" >>.cf2
- echo "q" >>.cf2
-fi
-if [ -f vmlinux.sym ] ; then
- awk '/ _start$/ {print "sr g 9 0x" $3}' < vmlinux.sym >> .cf2
-fi
-echo "script-on $OUT" >>.cf2
-
-# Now start medusa....
-if [ $FMTMED -ne 0 ] ; then
- $MEDUSA -system mpsn1 -c .cf1 -i .cf2 | fmtmedusa
-elif [ $STEPCNT -eq 0 ] ; then
- $MEDUSA -system mpsn1 -c .cf1 -i .cf2
-else
- $MEDUSA -system mpsn1 -c .cf1 -i .cf2 2>&1
-fi
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2001-2004 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_IA64_SN_SHUB_H
-#define _ASM_IA64_SN_SHUB_H
-
-
-#define MD_MEM_BANKS 4
-
-
-/*
- * Junk Bus Address Space
- * The junk bus is used to access the PROM, LED's, and UART. It's
- * accessed through the local block MMR space. The data path is
- * 16 bits wide. This space requires address bits 31-27 to be set, and
- * is further divided by address bits 26:15.
- * The LED addresses are write-only. To read the LEDs, you need to use
- * SH_JUNK_BUS_LED0-3, defined in shub_mmr.h
- *
- */
-#define SH_REAL_JUNK_BUS_LED0 0x7fed00000UL
-#define SH_REAL_JUNK_BUS_LED1 0x7fed10000UL
-#define SH_REAL_JUNK_BUS_LED2 0x7fed20000UL
-#define SH_REAL_JUNK_BUS_LED3 0x7fed30000UL
-#define SH_JUNK_BUS_UART0 0x7fed40000UL
-#define SH_JUNK_BUS_UART1 0x7fed40008UL
-#define SH_JUNK_BUS_UART2 0x7fed40010UL
-#define SH_JUNK_BUS_UART3 0x7fed40018UL
-#define SH_JUNK_BUS_UART4 0x7fed40020UL
-#define SH_JUNK_BUS_UART5 0x7fed40028UL
-#define SH_JUNK_BUS_UART6 0x7fed40030UL
-#define SH_JUNK_BUS_UART7 0x7fed40038UL
-
-#endif /* _ASM_IA64_SN_SHUB_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_IA64_SN_SHUBIO_H
-#define _ASM_IA64_SN_SHUBIO_H
-
-#define HUB_WIDGET_ID_MAX 0xf
-#define IIO_NUM_ITTES 7
-#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1)
-
-#define IIO_WID 0x00400000 /* Crosstalk Widget Identification */
- /* This register is also accessible from
- * Crosstalk at address 0x0. */
-#define IIO_WSTAT 0x00400008 /* Crosstalk Widget Status */
-#define IIO_WCR 0x00400020 /* Crosstalk Widget Control Register */
-#define IIO_ILAPR 0x00400100 /* IO Local Access Protection Register */
-#define IIO_ILAPO 0x00400108 /* IO Local Access Protection Override */
-#define IIO_IOWA 0x00400110 /* IO Outbound Widget Access */
-#define IIO_IIWA 0x00400118 /* IO Inbound Widget Access */
-#define IIO_IIDEM 0x00400120 /* IO Inbound Device Error Mask */
-#define IIO_ILCSR 0x00400128 /* IO LLP Control and Status Register */
-#define IIO_ILLR 0x00400130 /* IO LLP Log Register */
-#define IIO_IIDSR 0x00400138 /* IO Interrupt Destination */
-
-#define IIO_IGFX0 0x00400140 /* IO Graphics Node-Widget Map 0 */
-#define IIO_IGFX1 0x00400148 /* IO Graphics Node-Widget Map 1 */
-
-#define IIO_ISCR0 0x00400150 /* IO Scratch Register 0 */
-#define IIO_ISCR1 0x00400158 /* IO Scratch Register 1 */
-
-#define IIO_ITTE1 0x00400160 /* IO Translation Table Entry 1 */
-#define IIO_ITTE2 0x00400168 /* IO Translation Table Entry 2 */
-#define IIO_ITTE3 0x00400170 /* IO Translation Table Entry 3 */
-#define IIO_ITTE4 0x00400178 /* IO Translation Table Entry 4 */
-#define IIO_ITTE5 0x00400180 /* IO Translation Table Entry 5 */
-#define IIO_ITTE6 0x00400188 /* IO Translation Table Entry 6 */
-#define IIO_ITTE7 0x00400190 /* IO Translation Table Entry 7 */
-
-#define IIO_IPRB0 0x00400198 /* IO PRB Entry 0 */
-#define IIO_IPRB8 0x004001A0 /* IO PRB Entry 8 */
-#define IIO_IPRB9 0x004001A8 /* IO PRB Entry 9 */
-#define IIO_IPRBA 0x004001B0 /* IO PRB Entry A */
-#define IIO_IPRBB 0x004001B8 /* IO PRB Entry B */
-#define IIO_IPRBC 0x004001C0 /* IO PRB Entry C */
-#define IIO_IPRBD 0x004001C8 /* IO PRB Entry D */
-#define IIO_IPRBE 0x004001D0 /* IO PRB Entry E */
-#define IIO_IPRBF 0x004001D8 /* IO PRB Entry F */
-
-#define IIO_IXCC 0x004001E0 /* IO Crosstalk Credit Count Timeout */
-#define IIO_IMEM 0x004001E8 /* IO Miscellaneous Error Mask */
-#define IIO_IXTT 0x004001F0 /* IO Crosstalk Timeout Threshold */
-#define IIO_IECLR 0x004001F8 /* IO Error Clear Register */
-#define IIO_IBCR 0x00400200 /* IO BTE Control Register */
-
-#define IIO_IXSM 0x00400208 /* IO Crosstalk Spurious Message */
-#define IIO_IXSS 0x00400210 /* IO Crosstalk Spurious Sideband */
-
-#define IIO_ILCT 0x00400218 /* IO LLP Channel Test */
-
-#define IIO_IIEPH1 0x00400220 /* IO Incoming Error Packet Header, Part 1 */
-#define IIO_IIEPH2 0x00400228 /* IO Incoming Error Packet Header, Part 2 */
-
-
-#define IIO_ISLAPR 0x00400230 /* IO SXB Local Access Protection Regster */
-#define IIO_ISLAPO 0x00400238 /* IO SXB Local Access Protection Override */
-
-#define IIO_IWI 0x00400240 /* IO Wrapper Interrupt Register */
-#define IIO_IWEL 0x00400248 /* IO Wrapper Error Log Register */
-#define IIO_IWC 0x00400250 /* IO Wrapper Control Register */
-#define IIO_IWS 0x00400258 /* IO Wrapper Status Register */
-#define IIO_IWEIM 0x00400260 /* IO Wrapper Error Interrupt Masking Register */
-
-#define IIO_IPCA 0x00400300 /* IO PRB Counter Adjust */
-
-#define IIO_IPRTE0_A 0x00400308 /* IO PIO Read Address Table Entry 0, Part A */
-#define IIO_IPRTE1_A 0x00400310 /* IO PIO Read Address Table Entry 1, Part A */
-#define IIO_IPRTE2_A 0x00400318 /* IO PIO Read Address Table Entry 2, Part A */
-#define IIO_IPRTE3_A 0x00400320 /* IO PIO Read Address Table Entry 3, Part A */
-#define IIO_IPRTE4_A 0x00400328 /* IO PIO Read Address Table Entry 4, Part A */
-#define IIO_IPRTE5_A 0x00400330 /* IO PIO Read Address Table Entry 5, Part A */
-#define IIO_IPRTE6_A 0x00400338 /* IO PIO Read Address Table Entry 6, Part A */
-#define IIO_IPRTE7_A 0x00400340 /* IO PIO Read Address Table Entry 7, Part A */
-
-#define IIO_IPRTE0_B 0x00400348 /* IO PIO Read Address Table Entry 0, Part B */
-#define IIO_IPRTE1_B 0x00400350 /* IO PIO Read Address Table Entry 1, Part B */
-#define IIO_IPRTE2_B 0x00400358 /* IO PIO Read Address Table Entry 2, Part B */
-#define IIO_IPRTE3_B 0x00400360 /* IO PIO Read Address Table Entry 3, Part B */
-#define IIO_IPRTE4_B 0x00400368 /* IO PIO Read Address Table Entry 4, Part B */
-#define IIO_IPRTE5_B 0x00400370 /* IO PIO Read Address Table Entry 5, Part B */
-#define IIO_IPRTE6_B 0x00400378 /* IO PIO Read Address Table Entry 6, Part B */
-#define IIO_IPRTE7_B 0x00400380 /* IO PIO Read Address Table Entry 7, Part B */
-
-#define IIO_IPDR 0x00400388 /* IO PIO Deallocation Register */
-#define IIO_ICDR 0x00400390 /* IO CRB Entry Deallocation Register */
-#define IIO_IFDR 0x00400398 /* IO IOQ FIFO Depth Register */
-#define IIO_IIAP 0x004003A0 /* IO IIQ Arbitration Parameters */
-#define IIO_ICMR 0x004003A8 /* IO CRB Management Register */
-#define IIO_ICCR 0x004003B0 /* IO CRB Control Register */
-#define IIO_ICTO 0x004003B8 /* IO CRB Timeout */
-#define IIO_ICTP 0x004003C0 /* IO CRB Timeout Prescalar */
-
-#define IIO_ICRB0_A 0x00400400 /* IO CRB Entry 0_A */
-#define IIO_ICRB0_B 0x00400408 /* IO CRB Entry 0_B */
-#define IIO_ICRB0_C 0x00400410 /* IO CRB Entry 0_C */
-#define IIO_ICRB0_D 0x00400418 /* IO CRB Entry 0_D */
-#define IIO_ICRB0_E 0x00400420 /* IO CRB Entry 0_E */
-
-#define IIO_ICRB1_A 0x00400430 /* IO CRB Entry 1_A */
-#define IIO_ICRB1_B 0x00400438 /* IO CRB Entry 1_B */
-#define IIO_ICRB1_C 0x00400440 /* IO CRB Entry 1_C */
-#define IIO_ICRB1_D 0x00400448 /* IO CRB Entry 1_D */
-#define IIO_ICRB1_E 0x00400450 /* IO CRB Entry 1_E */
-
-#define IIO_ICRB2_A 0x00400460 /* IO CRB Entry 2_A */
-#define IIO_ICRB2_B 0x00400468 /* IO CRB Entry 2_B */
-#define IIO_ICRB2_C 0x00400470 /* IO CRB Entry 2_C */
-#define IIO_ICRB2_D 0x00400478 /* IO CRB Entry 2_D */
-#define IIO_ICRB2_E 0x00400480 /* IO CRB Entry 2_E */
-
-#define IIO_ICRB3_A 0x00400490 /* IO CRB Entry 3_A */
-#define IIO_ICRB3_B 0x00400498 /* IO CRB Entry 3_B */
-#define IIO_ICRB3_C 0x004004a0 /* IO CRB Entry 3_C */
-#define IIO_ICRB3_D 0x004004a8 /* IO CRB Entry 3_D */
-#define IIO_ICRB3_E 0x004004b0 /* IO CRB Entry 3_E */
-
-#define IIO_ICRB4_A 0x004004c0 /* IO CRB Entry 4_A */
-#define IIO_ICRB4_B 0x004004c8 /* IO CRB Entry 4_B */
-#define IIO_ICRB4_C 0x004004d0 /* IO CRB Entry 4_C */
-#define IIO_ICRB4_D 0x004004d8 /* IO CRB Entry 4_D */
-#define IIO_ICRB4_E 0x004004e0 /* IO CRB Entry 4_E */
-
-#define IIO_ICRB5_A 0x004004f0 /* IO CRB Entry 5_A */
-#define IIO_ICRB5_B 0x004004f8 /* IO CRB Entry 5_B */
-#define IIO_ICRB5_C 0x00400500 /* IO CRB Entry 5_C */
-#define IIO_ICRB5_D 0x00400508 /* IO CRB Entry 5_D */
-#define IIO_ICRB5_E 0x00400510 /* IO CRB Entry 5_E */
-
-#define IIO_ICRB6_A 0x00400520 /* IO CRB Entry 6_A */
-#define IIO_ICRB6_B 0x00400528 /* IO CRB Entry 6_B */
-#define IIO_ICRB6_C 0x00400530 /* IO CRB Entry 6_C */
-#define IIO_ICRB6_D 0x00400538 /* IO CRB Entry 6_D */
-#define IIO_ICRB6_E 0x00400540 /* IO CRB Entry 6_E */
-
-#define IIO_ICRB7_A 0x00400550 /* IO CRB Entry 7_A */
-#define IIO_ICRB7_B 0x00400558 /* IO CRB Entry 7_B */
-#define IIO_ICRB7_C 0x00400560 /* IO CRB Entry 7_C */
-#define IIO_ICRB7_D 0x00400568 /* IO CRB Entry 7_D */
-#define IIO_ICRB7_E 0x00400570 /* IO CRB Entry 7_E */
-
-#define IIO_ICRB8_A 0x00400580 /* IO CRB Entry 8_A */
-#define IIO_ICRB8_B 0x00400588 /* IO CRB Entry 8_B */
-#define IIO_ICRB8_C 0x00400590 /* IO CRB Entry 8_C */
-#define IIO_ICRB8_D 0x00400598 /* IO CRB Entry 8_D */
-#define IIO_ICRB8_E 0x004005a0 /* IO CRB Entry 8_E */
-
-#define IIO_ICRB9_A 0x004005b0 /* IO CRB Entry 9_A */
-#define IIO_ICRB9_B 0x004005b8 /* IO CRB Entry 9_B */
-#define IIO_ICRB9_C 0x004005c0 /* IO CRB Entry 9_C */
-#define IIO_ICRB9_D 0x004005c8 /* IO CRB Entry 9_D */
-#define IIO_ICRB9_E 0x004005d0 /* IO CRB Entry 9_E */
-
-#define IIO_ICRBA_A 0x004005e0 /* IO CRB Entry A_A */
-#define IIO_ICRBA_B 0x004005e8 /* IO CRB Entry A_B */
-#define IIO_ICRBA_C 0x004005f0 /* IO CRB Entry A_C */
-#define IIO_ICRBA_D 0x004005f8 /* IO CRB Entry A_D */
-#define IIO_ICRBA_E 0x00400600 /* IO CRB Entry A_E */
-
-#define IIO_ICRBB_A 0x00400610 /* IO CRB Entry B_A */
-#define IIO_ICRBB_B 0x00400618 /* IO CRB Entry B_B */
-#define IIO_ICRBB_C 0x00400620 /* IO CRB Entry B_C */
-#define IIO_ICRBB_D 0x00400628 /* IO CRB Entry B_D */
-#define IIO_ICRBB_E 0x00400630 /* IO CRB Entry B_E */
-
-#define IIO_ICRBC_A 0x00400640 /* IO CRB Entry C_A */
-#define IIO_ICRBC_B 0x00400648 /* IO CRB Entry C_B */
-#define IIO_ICRBC_C 0x00400650 /* IO CRB Entry C_C */
-#define IIO_ICRBC_D 0x00400658 /* IO CRB Entry C_D */
-#define IIO_ICRBC_E 0x00400660 /* IO CRB Entry C_E */
-
-#define IIO_ICRBD_A 0x00400670 /* IO CRB Entry D_A */
-#define IIO_ICRBD_B 0x00400678 /* IO CRB Entry D_B */
-#define IIO_ICRBD_C 0x00400680 /* IO CRB Entry D_C */
-#define IIO_ICRBD_D 0x00400688 /* IO CRB Entry D_D */
-#define IIO_ICRBD_E 0x00400690 /* IO CRB Entry D_E */
-
-#define IIO_ICRBE_A 0x004006a0 /* IO CRB Entry E_A */
-#define IIO_ICRBE_B 0x004006a8 /* IO CRB Entry E_B */
-#define IIO_ICRBE_C 0x004006b0 /* IO CRB Entry E_C */
-#define IIO_ICRBE_D 0x004006b8 /* IO CRB Entry E_D */
-#define IIO_ICRBE_E 0x004006c0 /* IO CRB Entry E_E */
-
-#define IIO_ICSML 0x00400700 /* IO CRB Spurious Message Low */
-#define IIO_ICSMM 0x00400708 /* IO CRB Spurious Message Middle */
-#define IIO_ICSMH 0x00400710 /* IO CRB Spurious Message High */
-
-#define IIO_IDBSS 0x00400718 /* IO Debug Submenu Select */
-
-#define IIO_IBLS0 0x00410000 /* IO BTE Length Status 0 */
-#define IIO_IBSA0 0x00410008 /* IO BTE Source Address 0 */
-#define IIO_IBDA0 0x00410010 /* IO BTE Destination Address 0 */
-#define IIO_IBCT0 0x00410018 /* IO BTE Control Terminate 0 */
-#define IIO_IBNA0 0x00410020 /* IO BTE Notification Address 0 */
-#define IIO_IBIA0 0x00410028 /* IO BTE Interrupt Address 0 */
-#define IIO_IBLS1 0x00420000 /* IO BTE Length Status 1 */
-#define IIO_IBSA1 0x00420008 /* IO BTE Source Address 1 */
-#define IIO_IBDA1 0x00420010 /* IO BTE Destination Address 1 */
-#define IIO_IBCT1 0x00420018 /* IO BTE Control Terminate 1 */
-#define IIO_IBNA1 0x00420020 /* IO BTE Notification Address 1 */
-#define IIO_IBIA1 0x00420028 /* IO BTE Interrupt Address 1 */
-
-#define IIO_IPCR 0x00430000 /* IO Performance Control */
-#define IIO_IPPR 0x00430008 /* IO Performance Profiling */
-
-
-/************************************************************************
- * *
- * Description: This register echoes some information from the *
- * LB_REV_ID register. It is available through Crosstalk as described *
- * above. The REV_NUM and MFG_NUM fields receive their values from *
- * the REVISION and MANUFACTURER fields in the LB_REV_ID register. *
- * The PART_NUM field's value is the Crosstalk device ID number that *
- * Steve Miller assigned to the SHub chip. *
- * *
- ************************************************************************/
-
-typedef union ii_wid_u {
- uint64_t ii_wid_regval;
- struct {
- uint64_t w_rsvd_1 : 1;
- uint64_t w_mfg_num : 11;
- uint64_t w_part_num : 16;
- uint64_t w_rev_num : 4;
- uint64_t w_rsvd : 32;
- } ii_wid_fld_s;
-} ii_wid_u_t;
-
-
-/************************************************************************
- * *
- * The fields in this register are set upon detection of an error *
- * and cleared by various mechanisms, as explained in the *
- * description. *
- * *
- ************************************************************************/
-
-typedef union ii_wstat_u {
- uint64_t ii_wstat_regval;
- struct {
- uint64_t w_pending : 4;
- uint64_t w_xt_crd_to : 1;
- uint64_t w_xt_tail_to : 1;
- uint64_t w_rsvd_3 : 3;
- uint64_t w_tx_mx_rty : 1;
- uint64_t w_rsvd_2 : 6;
- uint64_t w_llp_tx_cnt : 8;
- uint64_t w_rsvd_1 : 8;
- uint64_t w_crazy : 1;
- uint64_t w_rsvd : 31;
- } ii_wstat_fld_s;
-} ii_wstat_u_t;
-
-
-/************************************************************************
- * *
- * Description: This is a read-write enabled register. It controls *
- * various aspects of the Crosstalk flow control. *
- * *
- ************************************************************************/
-
-typedef union ii_wcr_u {
- uint64_t ii_wcr_regval;
- struct {
- uint64_t w_wid : 4;
- uint64_t w_tag : 1;
- uint64_t w_rsvd_1 : 8;
- uint64_t w_dst_crd : 3;
- uint64_t w_f_bad_pkt : 1;
- uint64_t w_dir_con : 1;
- uint64_t w_e_thresh : 5;
- uint64_t w_rsvd : 41;
- } ii_wcr_fld_s;
-} ii_wcr_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register's value is a bit vector that guards *
- * access to local registers within the II as well as to external *
- * Crosstalk widgets. Each bit in the register corresponds to a *
- * particular region in the system; a region consists of one, two or *
- * four nodes (depending on the value of the REGION_SIZE field in the *
- * LB_REV_ID register, which is documented in Section 8.3.1.1). The *
- * protection provided by this register applies to PIO read *
- * operations as well as PIO write operations. The II will perform a *
- * PIO read or write request only if the bit for the requestor's *
- * region is set; otherwise, the II will not perform the requested *
- * operation and will return an error response. When a PIO read or *
- * write request targets an external Crosstalk widget, then not only *
- * must the bit for the requestor's region be set in the ILAPR, but *
- * also the target widget's bit in the IOWA register must be set in *
- * order for the II to perform the requested operation; otherwise, *
- * the II will return an error response. Hence, the protection *
- * provided by the IOWA register supplements the protection provided *
- * by the ILAPR for requests that target external Crosstalk widgets. *
- * This register itself can be accessed only by the nodes whose *
- * region ID bits are enabled in this same register. It can also be *
- * accessed through the IAlias space by the local processors. *
- * The reset value of this register allows access by all nodes. *
- * *
- ************************************************************************/
-
-typedef union ii_ilapr_u {
- uint64_t ii_ilapr_regval;
- struct {
- uint64_t i_region : 64;
- } ii_ilapr_fld_s;
-} ii_ilapr_u_t;
-
-
-
-
-/************************************************************************
- * *
- * Description: A write to this register of the 64-bit value *
- * "SGIrules" in ASCII, will cause the bit in the ILAPR register *
- * corresponding to the region of the requestor to be set (allow *
- * access). A write of any other value will be ignored. Access *
- * protection for this register is "SGIrules". *
- * This register can also be accessed through the IAlias space. *
- * However, this access will not change the access permissions in the *
- * ILAPR. *
- * *
- ************************************************************************/
-
-typedef union ii_ilapo_u {
- uint64_t ii_ilapo_regval;
- struct {
- uint64_t i_io_ovrride : 64;
- } ii_ilapo_fld_s;
-} ii_ilapo_u_t;
-
-
-
-/************************************************************************
- * *
- * This register qualifies all the PIO and Graphics writes launched *
- * from the SHUB towards a widget. *
- * *
- ************************************************************************/
-
-typedef union ii_iowa_u {
- uint64_t ii_iowa_regval;
- struct {
- uint64_t i_w0_oac : 1;
- uint64_t i_rsvd_1 : 7;
- uint64_t i_wx_oac : 8;
- uint64_t i_rsvd : 48;
- } ii_iowa_fld_s;
-} ii_iowa_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register qualifies all the requests launched *
- * from a widget towards the Shub. This register is intended to be *
- * used by software in case of misbehaving widgets. *
- * *
- * *
- ************************************************************************/
-
-typedef union ii_iiwa_u {
- uint64_t ii_iiwa_regval;
- struct {
- uint64_t i_w0_iac : 1;
- uint64_t i_rsvd_1 : 7;
- uint64_t i_wx_iac : 8;
- uint64_t i_rsvd : 48;
- } ii_iiwa_fld_s;
-} ii_iiwa_u_t;
-
-
-
-/************************************************************************
- * *
- * Description: This register qualifies all the operations launched *
- * from a widget towards the SHub. It allows individual access *
- * control for up to 8 devices per widget. A device refers to *
- * individual DMA master hosted by a widget. *
- * The bits in each field of this register are cleared by the Shub *
- * upon detection of an error which requires the device to be *
- * disabled. These fields assume that 0=TNUM=7 (i.e., Bridge-centric *
- * Crosstalk). Whether or not a device has access rights to this *
- * Shub is determined by an AND of the device enable bit in the *
- * appropriate field of this register and the corresponding bit in *
- * the Wx_IAC field (for the widget which this device belongs to). *
- * The bits in this field are set by writing a 1 to them. Incoming *
- * replies from Crosstalk are not subject to this access control *
- * mechanism. *
- * *
- ************************************************************************/
-
-typedef union ii_iidem_u {
- uint64_t ii_iidem_regval;
- struct {
- uint64_t i_w8_dxs : 8;
- uint64_t i_w9_dxs : 8;
- uint64_t i_wa_dxs : 8;
- uint64_t i_wb_dxs : 8;
- uint64_t i_wc_dxs : 8;
- uint64_t i_wd_dxs : 8;
- uint64_t i_we_dxs : 8;
- uint64_t i_wf_dxs : 8;
- } ii_iidem_fld_s;
-} ii_iidem_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the various programmable fields necessary *
- * for controlling and observing the LLP signals. *
- * *
- ************************************************************************/
-
-typedef union ii_ilcsr_u {
- uint64_t ii_ilcsr_regval;
- struct {
- uint64_t i_nullto : 6;
- uint64_t i_rsvd_4 : 2;
- uint64_t i_wrmrst : 1;
- uint64_t i_rsvd_3 : 1;
- uint64_t i_llp_en : 1;
- uint64_t i_bm8 : 1;
- uint64_t i_llp_stat : 2;
- uint64_t i_remote_power : 1;
- uint64_t i_rsvd_2 : 1;
- uint64_t i_maxrtry : 10;
- uint64_t i_d_avail_sel : 2;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_maxbrst : 10;
- uint64_t i_rsvd : 22;
-
- } ii_ilcsr_fld_s;
-} ii_ilcsr_u_t;
-
-
-/************************************************************************
- * *
- * This is simply a status registers that monitors the LLP error *
- * rate. *
- * *
- ************************************************************************/
-
-typedef union ii_illr_u {
- uint64_t ii_illr_regval;
- struct {
- uint64_t i_sn_cnt : 16;
- uint64_t i_cb_cnt : 16;
- uint64_t i_rsvd : 32;
- } ii_illr_fld_s;
-} ii_illr_u_t;
-
-
-/************************************************************************
- * *
- * Description: All II-detected non-BTE error interrupts are *
- * specified via this register. *
- * NOTE: The PI interrupt register address is hardcoded in the II. If *
- * PI_ID==0, then the II sends an interrupt request (Duplonet PWRI *
- * packet) to address offset 0x0180_0090 within the local register *
- * address space of PI0 on the node specified by the NODE field. If *
- * PI_ID==1, then the II sends the interrupt request to address *
- * offset 0x01A0_0090 within the local register address space of PI1 *
- * on the node specified by the NODE field. *
- * *
- ************************************************************************/
-
-typedef union ii_iidsr_u {
- uint64_t ii_iidsr_regval;
- struct {
- uint64_t i_level : 8;
- uint64_t i_pi_id : 1;
- uint64_t i_node : 11;
- uint64_t i_rsvd_3 : 4;
- uint64_t i_enable : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_int_sent : 2;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_pi0_forward_int : 1;
- uint64_t i_pi1_forward_int : 1;
- uint64_t i_rsvd : 30;
- } ii_iidsr_fld_s;
-} ii_iidsr_u_t;
-
-
-
-/************************************************************************
- * *
- * There are two instances of this register. This register is used *
- * for matching up the incoming responses from the graphics widget to *
- * the processor that initiated the graphics operation. The *
- * write-responses are converted to graphics credits and returned to *
- * the processor so that the processor interface can manage the flow *
- * control. *
- * *
- ************************************************************************/
-
-typedef union ii_igfx0_u {
- uint64_t ii_igfx0_regval;
- struct {
- uint64_t i_w_num : 4;
- uint64_t i_pi_id : 1;
- uint64_t i_n_num : 12;
- uint64_t i_p_num : 1;
- uint64_t i_rsvd : 46;
- } ii_igfx0_fld_s;
-} ii_igfx0_u_t;
-
-
-/************************************************************************
- * *
- * There are two instances of this register. This register is used *
- * for matching up the incoming responses from the graphics widget to *
- * the processor that initiated the graphics operation. The *
- * write-responses are converted to graphics credits and returned to *
- * the processor so that the processor interface can manage the flow *
- * control. *
- * *
- ************************************************************************/
-
-typedef union ii_igfx1_u {
- uint64_t ii_igfx1_regval;
- struct {
- uint64_t i_w_num : 4;
- uint64_t i_pi_id : 1;
- uint64_t i_n_num : 12;
- uint64_t i_p_num : 1;
- uint64_t i_rsvd : 46;
- } ii_igfx1_fld_s;
-} ii_igfx1_u_t;
-
-
-/************************************************************************
- * *
- * There are two instances of this registers. These registers are *
- * used as scratch registers for software use. *
- * *
- ************************************************************************/
-
-typedef union ii_iscr0_u {
- uint64_t ii_iscr0_regval;
- struct {
- uint64_t i_scratch : 64;
- } ii_iscr0_fld_s;
-} ii_iscr0_u_t;
-
-
-
-/************************************************************************
- * *
- * There are two instances of this registers. These registers are *
- * used as scratch registers for software use. *
- * *
- ************************************************************************/
-
-typedef union ii_iscr1_u {
- uint64_t ii_iscr1_regval;
- struct {
- uint64_t i_scratch : 64;
- } ii_iscr1_fld_s;
-} ii_iscr1_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the SHub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte1_u {
- uint64_t ii_itte1_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte1_fld_s;
-} ii_itte1_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte2_u {
- uint64_t ii_itte2_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte2_fld_s;
-} ii_itte2_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the SHub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte3_u {
- uint64_t ii_itte3_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte3_fld_s;
-} ii_itte3_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a SHub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the SHub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the SHub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte4_u {
- uint64_t ii_itte4_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte4_fld_s;
-} ii_itte4_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a SHub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte5_u {
- uint64_t ii_itte5_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte5_fld_s;
-} ii_itte5_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte6_u {
- uint64_t ii_itte6_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte6_fld_s;
-} ii_itte6_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the SHub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte7_u {
- uint64_t ii_itte7_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
- } ii_itte7_fld_s;
-} ii_itte7_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprb0_u {
- uint64_t ii_iprb0_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprb0_fld_s;
-} ii_iprb0_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprb8_u {
- uint64_t ii_iprb8_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprb8_fld_s;
-} ii_iprb8_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprb9_u {
- uint64_t ii_iprb9_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprb9_fld_s;
-} ii_iprb9_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * *
- * *
- ************************************************************************/
-
-typedef union ii_iprba_u {
- uint64_t ii_iprba_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprba_fld_s;
-} ii_iprba_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbb_u {
- uint64_t ii_iprbb_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprbb_fld_s;
-} ii_iprbb_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbc_u {
- uint64_t ii_iprbc_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprbc_fld_s;
-} ii_iprbc_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbd_u {
- uint64_t ii_iprbd_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprbd_fld_s;
-} ii_iprbd_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbe_u {
- uint64_t ii_iprbe_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprbe_fld_s;
-} ii_iprbe_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of Shub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbf_u {
- uint64_t ii_iprbf_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprbe_fld_s;
-} ii_iprbf_u_t;
-
-
-/************************************************************************
- * *
- * This register specifies the timeout value to use for monitoring *
- * Crosstalk credits which are used outbound to Crosstalk. An *
- * internal counter called the Crosstalk Credit Timeout Counter *
- * increments every 128 II clocks. The counter starts counting *
- * anytime the credit count drops below a threshold, and resets to *
- * zero (stops counting) anytime the credit count is at or above the *
- * threshold. The threshold is 1 credit in direct connect mode and 2 *
- * in Crossbow connect mode. When the internal Crosstalk Credit *
- * Timeout Counter reaches the value programmed in this register, a *
- * Crosstalk Credit Timeout has occurred. The internal counter is not *
- * readable from software, and stops counting at its maximum value, *
- * so it cannot cause more than one interrupt. *
- * *
- ************************************************************************/
-
-typedef union ii_ixcc_u {
- uint64_t ii_ixcc_regval;
- struct {
- uint64_t i_time_out : 26;
- uint64_t i_rsvd : 38;
- } ii_ixcc_fld_s;
-} ii_ixcc_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register qualifies all the PIO and DMA *
- * operations launched from widget 0 towards the SHub. In *
- * addition, it also qualifies accesses by the BTE streams. *
- * The bits in each field of this register are cleared by the SHub *
- * upon detection of an error which requires widget 0 or the BTE *
- * streams to be terminated. Whether or not widget x has access *
- * rights to this SHub is determined by an AND of the device *
- * enable bit in the appropriate field of this register and bit 0 in *
- * the Wx_IAC field. The bits in this field are set by writing a 1 to *
- * them. Incoming replies from Crosstalk are not subject to this *
- * access control mechanism. *
- * *
- ************************************************************************/
-
-typedef union ii_imem_u {
- uint64_t ii_imem_regval;
- struct {
- uint64_t i_w0_esd : 1;
- uint64_t i_rsvd_3 : 3;
- uint64_t i_b0_esd : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_b1_esd : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_clr_precise : 1;
- uint64_t i_rsvd : 51;
- } ii_imem_fld_s;
-} ii_imem_u_t;
-
-
-
-/************************************************************************
- * *
- * Description: This register specifies the timeout value to use for *
- * monitoring Crosstalk tail flits coming into the Shub in the *
- * TAIL_TO field. An internal counter associated with this register *
- * is incremented every 128 II internal clocks (7 bits). The counter *
- * starts counting anytime a header micropacket is received and stops *
- * counting (and resets to zero) any time a micropacket with a Tail *
- * bit is received. Once the counter reaches the threshold value *
- * programmed in this register, it generates an interrupt to the *
- * processor that is programmed into the IIDSR. The counter saturates *
- * (does not roll over) at its maximum value, so it cannot cause *
- * another interrupt until after it is cleared. *
- * The register also contains the Read Response Timeout values. The *
- * Prescalar is 23 bits, and counts II clocks. An internal counter *
- * increments on every II clock and when it reaches the value in the *
- * Prescalar field, all IPRTE registers with their valid bits set *
- * have their Read Response timers bumped. Whenever any of them match *
- * the value in the RRSP_TO field, a Read Response Timeout has *
- * occurred, and error handling occurs as described in the Error *
- * Handling section of this document. *
- * *
- ************************************************************************/
-
-typedef union ii_ixtt_u {
- uint64_t ii_ixtt_regval;
- struct {
- uint64_t i_tail_to : 26;
- uint64_t i_rsvd_1 : 6;
- uint64_t i_rrsp_ps : 23;
- uint64_t i_rrsp_to : 5;
- uint64_t i_rsvd : 4;
- } ii_ixtt_fld_s;
-} ii_ixtt_u_t;
-
-
-/************************************************************************
- * *
- * Writing a 1 to the fields of this register clears the appropriate *
- * error bits in other areas of SHub. Note that when the *
- * E_PRB_x bits are used to clear error bits in PRB registers, *
- * SPUR_RD and SPUR_WR may persist, because they require additional *
- * action to clear them. See the IPRBx and IXSS Register *
- * specifications. *
- * *
- ************************************************************************/
-
-typedef union ii_ieclr_u {
- uint64_t ii_ieclr_regval;
- struct {
- uint64_t i_e_prb_0 : 1;
- uint64_t i_rsvd : 7;
- uint64_t i_e_prb_8 : 1;
- uint64_t i_e_prb_9 : 1;
- uint64_t i_e_prb_a : 1;
- uint64_t i_e_prb_b : 1;
- uint64_t i_e_prb_c : 1;
- uint64_t i_e_prb_d : 1;
- uint64_t i_e_prb_e : 1;
- uint64_t i_e_prb_f : 1;
- uint64_t i_e_crazy : 1;
- uint64_t i_e_bte_0 : 1;
- uint64_t i_e_bte_1 : 1;
- uint64_t i_reserved_1 : 10;
- uint64_t i_spur_rd_hdr : 1;
- uint64_t i_cam_intr_to : 1;
- uint64_t i_cam_overflow : 1;
- uint64_t i_cam_read_miss : 1;
- uint64_t i_ioq_rep_underflow : 1;
- uint64_t i_ioq_req_underflow : 1;
- uint64_t i_ioq_rep_overflow : 1;
- uint64_t i_ioq_req_overflow : 1;
- uint64_t i_iiq_rep_overflow : 1;
- uint64_t i_iiq_req_overflow : 1;
- uint64_t i_ii_xn_rep_cred_overflow : 1;
- uint64_t i_ii_xn_req_cred_overflow : 1;
- uint64_t i_ii_xn_invalid_cmd : 1;
- uint64_t i_xn_ii_invalid_cmd : 1;
- uint64_t i_reserved_2 : 21;
- } ii_ieclr_fld_s;
-} ii_ieclr_u_t;
-
-
-/************************************************************************
- * *
- * This register controls both BTEs. SOFT_RESET is intended for *
- * recovery after an error. COUNT controls the total number of CRBs *
- * that both BTEs (combined) can use, which affects total BTE *
- * bandwidth. *
- * *
- ************************************************************************/
-
-typedef union ii_ibcr_u {
- uint64_t ii_ibcr_regval;
- struct {
- uint64_t i_count : 4;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_soft_reset : 1;
- uint64_t i_rsvd : 55;
- } ii_ibcr_fld_s;
-} ii_ibcr_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the header of a spurious read response *
- * received from Crosstalk. A spurious read response is defined as a *
- * read response received by II from a widget for which (1) the SIDN *
- * has a value between 1 and 7, inclusive (II never sends requests to *
- * these widgets (2) there is no valid IPRTE register which *
- * corresponds to the TNUM, or (3) the widget indicated in SIDN is *
- * not the same as the widget recorded in the IPRTE register *
- * referenced by the TNUM. If this condition is true, and if the *
- * IXSS[VALID] bit is clear, then the header of the spurious read *
- * response is capture in IXSM and IXSS, and IXSS[VALID] is set. The *
- * errant header is thereby captured, and no further spurious read *
- * respones are captured until IXSS[VALID] is cleared by setting the *
- * appropriate bit in IECLR.Everytime a spurious read response is *
- * detected, the SPUR_RD bit of the PRB corresponding to the incoming *
- * message's SIDN field is set. This always happens, regarless of *
- * whether a header is captured. The programmer should check *
- * IXSM[SIDN] to determine which widget sent the spurious response, *
- * because there may be more than one SPUR_RD bit set in the PRB *
- * registers. The widget indicated by IXSM[SIDN] was the first *
- * spurious read response to be received since the last time *
- * IXSS[VALID] was clear. The SPUR_RD bit of the corresponding PRB *
- * will be set. Any SPUR_RD bits in any other PRB registers indicate *
- * spurious messages from other widets which were detected after the *
- * header was captured.. *
- * *
- ************************************************************************/
-
-typedef union ii_ixsm_u {
- uint64_t ii_ixsm_regval;
- struct {
- uint64_t i_byte_en : 32;
- uint64_t i_reserved : 1;
- uint64_t i_tag : 3;
- uint64_t i_alt_pactyp : 4;
- uint64_t i_bo : 1;
- uint64_t i_error : 1;
- uint64_t i_vbpm : 1;
- uint64_t i_gbr : 1;
- uint64_t i_ds : 2;
- uint64_t i_ct : 1;
- uint64_t i_tnum : 5;
- uint64_t i_pactyp : 4;
- uint64_t i_sidn : 4;
- uint64_t i_didn : 4;
- } ii_ixsm_fld_s;
-} ii_ixsm_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the sideband bits of a spurious read *
- * response received from Crosstalk. *
- * *
- ************************************************************************/
-
-typedef union ii_ixss_u {
- uint64_t ii_ixss_regval;
- struct {
- uint64_t i_sideband : 8;
- uint64_t i_rsvd : 55;
- uint64_t i_valid : 1;
- } ii_ixss_fld_s;
-} ii_ixss_u_t;
-
-
-/************************************************************************
- * *
- * This register enables software to access the II LLP's test port. *
- * Refer to the LLP 2.5 documentation for an explanation of the test *
- * port. Software can write to this register to program the values *
- * for the control fields (TestErrCapture, TestClear, TestFlit, *
- * TestMask and TestSeed). Similarly, software can read from this *
- * register to obtain the values of the test port's status outputs *
- * (TestCBerr, TestValid and TestData). *
- * *
- ************************************************************************/
-
-typedef union ii_ilct_u {
- uint64_t ii_ilct_regval;
- struct {
- uint64_t i_test_seed : 20;
- uint64_t i_test_mask : 8;
- uint64_t i_test_data : 20;
- uint64_t i_test_valid : 1;
- uint64_t i_test_cberr : 1;
- uint64_t i_test_flit : 3;
- uint64_t i_test_clear : 1;
- uint64_t i_test_err_capture : 1;
- uint64_t i_rsvd : 9;
- } ii_ilct_fld_s;
-} ii_ilct_u_t;
-
-
-/************************************************************************
- * *
- * If the II detects an illegal incoming Duplonet packet (request or *
- * reply) when VALID==0 in the IIEPH1 register, then it saves the *
- * contents of the packet's header flit in the IIEPH1 and IIEPH2 *
- * registers, sets the VALID bit in IIEPH1, clears the OVERRUN bit, *
- * and assigns a value to the ERR_TYPE field which indicates the *
- * specific nature of the error. The II recognizes four different *
- * types of errors: short request packets (ERR_TYPE==2), short reply *
- * packets (ERR_TYPE==3), long request packets (ERR_TYPE==4) and long *
- * reply packets (ERR_TYPE==5). The encodings for these types of *
- * errors were chosen to be consistent with the same types of errors *
- * indicated by the ERR_TYPE field in the LB_ERROR_HDR1 register (in *
- * the LB unit). If the II detects an illegal incoming Duplonet *
- * packet when VALID==1 in the IIEPH1 register, then it merely sets *
- * the OVERRUN bit to indicate that a subsequent error has happened, *
- * and does nothing further. *
- * *
- ************************************************************************/
-
-typedef union ii_iieph1_u {
- uint64_t ii_iieph1_regval;
- struct {
- uint64_t i_command : 7;
- uint64_t i_rsvd_5 : 1;
- uint64_t i_suppl : 14;
- uint64_t i_rsvd_4 : 1;
- uint64_t i_source : 14;
- uint64_t i_rsvd_3 : 1;
- uint64_t i_err_type : 4;
- uint64_t i_rsvd_2 : 4;
- uint64_t i_overrun : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_valid : 1;
- uint64_t i_rsvd : 13;
- } ii_iieph1_fld_s;
-} ii_iieph1_u_t;
-
-
-/************************************************************************
- * *
- * This register holds the Address field from the header flit of an *
- * incoming erroneous Duplonet packet, along with the tail bit which *
- * accompanied this header flit. This register is essentially an *
- * extension of IIEPH1. Two registers were necessary because the 64 *
- * bits available in only a single register were insufficient to *
- * capture the entire header flit of an erroneous packet. *
- * *
- ************************************************************************/
-
-typedef union ii_iieph2_u {
- uint64_t ii_iieph2_regval;
- struct {
- uint64_t i_rsvd_0 : 3;
- uint64_t i_address : 47;
- uint64_t i_rsvd_1 : 10;
- uint64_t i_tail : 1;
- uint64_t i_rsvd : 3;
- } ii_iieph2_fld_s;
-} ii_iieph2_u_t;
-
-
-/******************************/
-
-
-
-/************************************************************************
- * *
- * This register's value is a bit vector that guards access from SXBs *
- * to local registers within the II as well as to external Crosstalk *
- * widgets *
- * *
- ************************************************************************/
-
-typedef union ii_islapr_u {
- uint64_t ii_islapr_regval;
- struct {
- uint64_t i_region : 64;
- } ii_islapr_fld_s;
-} ii_islapr_u_t;
-
-
-/************************************************************************
- * *
- * A write to this register of the 56-bit value "Pup+Bun" will cause *
- * the bit in the ISLAPR register corresponding to the region of the *
- * requestor to be set (access allowed). (
- * *
- ************************************************************************/
-
-typedef union ii_islapo_u {
- uint64_t ii_islapo_regval;
- struct {
- uint64_t i_io_sbx_ovrride : 56;
- uint64_t i_rsvd : 8;
- } ii_islapo_fld_s;
-} ii_islapo_u_t;
-
-/************************************************************************
- * *
- * Determines how long the wrapper will wait aftr an interrupt is *
- * initially issued from the II before it times out the outstanding *
- * interrupt and drops it from the interrupt queue. *
- * *
- ************************************************************************/
-
-typedef union ii_iwi_u {
- uint64_t ii_iwi_regval;
- struct {
- uint64_t i_prescale : 24;
- uint64_t i_rsvd : 8;
- uint64_t i_timeout : 8;
- uint64_t i_rsvd1 : 8;
- uint64_t i_intrpt_retry_period : 8;
- uint64_t i_rsvd2 : 8;
- } ii_iwi_fld_s;
-} ii_iwi_u_t;
-
-/************************************************************************
- * *
- * Log errors which have occurred in the II wrapper. The errors are *
- * cleared by writing to the IECLR register. *
- * *
- ************************************************************************/
-
-typedef union ii_iwel_u {
- uint64_t ii_iwel_regval;
- struct {
- uint64_t i_intr_timed_out : 1;
- uint64_t i_rsvd : 7;
- uint64_t i_cam_overflow : 1;
- uint64_t i_cam_read_miss : 1;
- uint64_t i_rsvd1 : 2;
- uint64_t i_ioq_rep_underflow : 1;
- uint64_t i_ioq_req_underflow : 1;
- uint64_t i_ioq_rep_overflow : 1;
- uint64_t i_ioq_req_overflow : 1;
- uint64_t i_iiq_rep_overflow : 1;
- uint64_t i_iiq_req_overflow : 1;
- uint64_t i_rsvd2 : 6;
- uint64_t i_ii_xn_rep_cred_over_under: 1;
- uint64_t i_ii_xn_req_cred_over_under: 1;
- uint64_t i_rsvd3 : 6;
- uint64_t i_ii_xn_invalid_cmd : 1;
- uint64_t i_xn_ii_invalid_cmd : 1;
- uint64_t i_rsvd4 : 30;
- } ii_iwel_fld_s;
-} ii_iwel_u_t;
-
-/************************************************************************
- * *
- * Controls the II wrapper. *
- * *
- ************************************************************************/
-
-typedef union ii_iwc_u {
- uint64_t ii_iwc_regval;
- struct {
- uint64_t i_dma_byte_swap : 1;
- uint64_t i_rsvd : 3;
- uint64_t i_cam_read_lines_reset : 1;
- uint64_t i_rsvd1 : 3;
- uint64_t i_ii_xn_cred_over_under_log: 1;
- uint64_t i_rsvd2 : 19;
- uint64_t i_xn_rep_iq_depth : 5;
- uint64_t i_rsvd3 : 3;
- uint64_t i_xn_req_iq_depth : 5;
- uint64_t i_rsvd4 : 3;
- uint64_t i_iiq_depth : 6;
- uint64_t i_rsvd5 : 12;
- uint64_t i_force_rep_cred : 1;
- uint64_t i_force_req_cred : 1;
- } ii_iwc_fld_s;
-} ii_iwc_u_t;
-
-/************************************************************************
- * *
- * Status in the II wrapper. *
- * *
- ************************************************************************/
-
-typedef union ii_iws_u {
- uint64_t ii_iws_regval;
- struct {
- uint64_t i_xn_rep_iq_credits : 5;
- uint64_t i_rsvd : 3;
- uint64_t i_xn_req_iq_credits : 5;
- uint64_t i_rsvd1 : 51;
- } ii_iws_fld_s;
-} ii_iws_u_t;
-
-/************************************************************************
- * *
- * Masks errors in the IWEL register. *
- * *
- ************************************************************************/
-
-typedef union ii_iweim_u {
- uint64_t ii_iweim_regval;
- struct {
- uint64_t i_intr_timed_out : 1;
- uint64_t i_rsvd : 7;
- uint64_t i_cam_overflow : 1;
- uint64_t i_cam_read_miss : 1;
- uint64_t i_rsvd1 : 2;
- uint64_t i_ioq_rep_underflow : 1;
- uint64_t i_ioq_req_underflow : 1;
- uint64_t i_ioq_rep_overflow : 1;
- uint64_t i_ioq_req_overflow : 1;
- uint64_t i_iiq_rep_overflow : 1;
- uint64_t i_iiq_req_overflow : 1;
- uint64_t i_rsvd2 : 6;
- uint64_t i_ii_xn_rep_cred_overflow : 1;
- uint64_t i_ii_xn_req_cred_overflow : 1;
- uint64_t i_rsvd3 : 6;
- uint64_t i_ii_xn_invalid_cmd : 1;
- uint64_t i_xn_ii_invalid_cmd : 1;
- uint64_t i_rsvd4 : 30;
- } ii_iweim_fld_s;
-} ii_iweim_u_t;
-
-
-/************************************************************************
- * *
- * A write to this register causes a particular field in the *
- * corresponding widget's PRB entry to be adjusted up or down by 1. *
- * This counter should be used when recovering from error and reset *
- * conditions. Note that software would be capable of causing *
- * inadvertent overflow or underflow of these counters. *
- * *
- ************************************************************************/
-
-typedef union ii_ipca_u {
- uint64_t ii_ipca_regval;
- struct {
- uint64_t i_wid : 4;
- uint64_t i_adjust : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_field : 2;
- uint64_t i_rsvd : 54;
- } ii_ipca_fld_s;
-} ii_ipca_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-
-typedef union ii_iprte0a_u {
- uint64_t ii_iprte0a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte0a_fld_s;
-} ii_iprte0a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte1a_u {
- uint64_t ii_iprte1a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte1a_fld_s;
-} ii_iprte1a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte2a_u {
- uint64_t ii_iprte2a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte2a_fld_s;
-} ii_iprte2a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte3a_u {
- uint64_t ii_iprte3a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte3a_fld_s;
-} ii_iprte3a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte4a_u {
- uint64_t ii_iprte4a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte4a_fld_s;
-} ii_iprte4a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte5a_u {
- uint64_t ii_iprte5a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte5a_fld_s;
-} ii_iprte5a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte6a_u {
- uint64_t ii_iprte6a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprte6a_fld_s;
-} ii_iprte6a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte7a_u {
- uint64_t ii_iprte7a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprtea7_fld_s;
-} ii_iprte7a_u_t;
-
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-
-typedef union ii_iprte0b_u {
- uint64_t ii_iprte0b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte0b_fld_s;
-} ii_iprte0b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte1b_u {
- uint64_t ii_iprte1b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte1b_fld_s;
-} ii_iprte1b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte2b_u {
- uint64_t ii_iprte2b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte2b_fld_s;
-} ii_iprte2b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte3b_u {
- uint64_t ii_iprte3b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte3b_fld_s;
-} ii_iprte3b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte4b_u {
- uint64_t ii_iprte4b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte4b_fld_s;
-} ii_iprte4b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte5b_u {
- uint64_t ii_iprte5b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte5b_fld_s;
-} ii_iprte5b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte6b_u {
- uint64_t ii_iprte6b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
-
- } ii_iprte6b_fld_s;
-} ii_iprte6b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte7b_u {
- uint64_t ii_iprte7b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte7b_fld_s;
-} ii_iprte7b_u_t;
-
-
-/************************************************************************
- * *
- * Description: SHub II contains a feature which did not exist in *
- * the Hub which automatically cleans up after a Read Response *
- * timeout, including deallocation of the IPRTE and recovery of IBuf *
- * space. The inclusion of this register in SHub is for backward *
- * compatibility *
- * A write to this register causes an entry from the table of *
- * outstanding PIO Read Requests to be freed and returned to the *
- * stack of free entries. This register is used in handling the *
- * timeout errors that result in a PIO Reply never returning from *
- * Crosstalk. *
- * Note that this register does not affect the contents of the IPRTE *
- * registers. The Valid bits in those registers have to be *
- * specifically turned off by software. *
- * *
- ************************************************************************/
-
-typedef union ii_ipdr_u {
- uint64_t ii_ipdr_regval;
- struct {
- uint64_t i_te : 3;
- uint64_t i_rsvd_1 : 1;
- uint64_t i_pnd : 1;
- uint64_t i_init_rpcnt : 1;
- uint64_t i_rsvd : 58;
- } ii_ipdr_fld_s;
-} ii_ipdr_u_t;
-
-
-/************************************************************************
- * *
- * A write to this register causes a CRB entry to be returned to the *
- * queue of free CRBs. The entry should have previously been cleared *
- * (mark bit) via backdoor access to the pertinent CRB entry. This *
- * register is used in the last step of handling the errors that are *
- * captured and marked in CRB entries. Briefly: 1) first error for *
- * DMA write from a particular device, and first error for a *
- * particular BTE stream, lead to a marked CRB entry, and processor *
- * interrupt, 2) software reads the error information captured in the *
- * CRB entry, and presumably takes some corrective action, 3) *
- * software clears the mark bit, and finally 4) software writes to *
- * the ICDR register to return the CRB entry to the list of free CRB *
- * entries. *
- * *
- ************************************************************************/
-
-typedef union ii_icdr_u {
- uint64_t ii_icdr_regval;
- struct {
- uint64_t i_crb_num : 4;
- uint64_t i_pnd : 1;
- uint64_t i_rsvd : 59;
- } ii_icdr_fld_s;
-} ii_icdr_u_t;
-
-
-/************************************************************************
- * *
- * This register provides debug access to two FIFOs inside of II. *
- * Both IOQ_MAX* fields of this register contain the instantaneous *
- * depth (in units of the number of available entries) of the *
- * associated IOQ FIFO. A read of this register will return the *
- * number of free entries on each FIFO at the time of the read. So *
- * when a FIFO is idle, the associated field contains the maximum *
- * depth of the FIFO. This register is writable for debug reasons *
- * and is intended to be written with the maximum desired FIFO depth *
- * while the FIFO is idle. Software must assure that II is idle when *
- * this register is written. If there are any active entries in any *
- * of these FIFOs when this register is written, the results are *
- * undefined. *
- * *
- ************************************************************************/
-
-typedef union ii_ifdr_u {
- uint64_t ii_ifdr_regval;
- struct {
- uint64_t i_ioq_max_rq : 7;
- uint64_t i_set_ioq_rq : 1;
- uint64_t i_ioq_max_rp : 7;
- uint64_t i_set_ioq_rp : 1;
- uint64_t i_rsvd : 48;
- } ii_ifdr_fld_s;
-} ii_ifdr_u_t;
-
-
-/************************************************************************
- * *
- * This register allows the II to become sluggish in removing *
- * messages from its inbound queue (IIQ). This will cause messages to *
- * back up in either virtual channel. Disabling the "molasses" mode *
- * subsequently allows the II to be tested under stress. In the *
- * sluggish ("Molasses") mode, the localized effects of congestion *
- * can be observed. *
- * *
- ************************************************************************/
-
-typedef union ii_iiap_u {
- uint64_t ii_iiap_regval;
- struct {
- uint64_t i_rq_mls : 6;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_rp_mls : 6;
- uint64_t i_rsvd : 50;
- } ii_iiap_fld_s;
-} ii_iiap_u_t;
-
-
-/************************************************************************
- * *
- * This register allows several parameters of CRB operation to be *
- * set. Note that writing to this register can have catastrophic side *
- * effects, if the CRB is not quiescent, i.e. if the CRB is *
- * processing protocol messages when the write occurs. *
- * *
- ************************************************************************/
-
-typedef union ii_icmr_u {
- uint64_t ii_icmr_regval;
- struct {
- uint64_t i_sp_msg : 1;
- uint64_t i_rd_hdr : 1;
- uint64_t i_rsvd_4 : 2;
- uint64_t i_c_cnt : 4;
- uint64_t i_rsvd_3 : 4;
- uint64_t i_clr_rqpd : 1;
- uint64_t i_clr_rppd : 1;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_fc_cnt : 4;
- uint64_t i_crb_vld : 15;
- uint64_t i_crb_mark : 15;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_precise : 1;
- uint64_t i_rsvd : 11;
- } ii_icmr_fld_s;
-} ii_icmr_u_t;
-
-
-/************************************************************************
- * *
- * This register allows control of the table portion of the CRB *
- * logic via software. Control operations from this register have *
- * priority over all incoming Crosstalk or BTE requests. *
- * *
- ************************************************************************/
-
-typedef union ii_iccr_u {
- uint64_t ii_iccr_regval;
- struct {
- uint64_t i_crb_num : 4;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_cmd : 8;
- uint64_t i_pending : 1;
- uint64_t i_rsvd : 47;
- } ii_iccr_fld_s;
-} ii_iccr_u_t;
-
-
-/************************************************************************
- * *
- * This register allows the maximum timeout value to be programmed. *
- * *
- ************************************************************************/
-
-typedef union ii_icto_u {
- uint64_t ii_icto_regval;
- struct {
- uint64_t i_timeout : 8;
- uint64_t i_rsvd : 56;
- } ii_icto_fld_s;
-} ii_icto_u_t;
-
-
-/************************************************************************
- * *
- * This register allows the timeout prescalar to be programmed. An *
- * internal counter is associated with this register. When the *
- * internal counter reaches the value of the PRESCALE field, the *
- * timer registers in all valid CRBs are incremented (CRBx_D[TIMEOUT] *
- * field). The internal counter resets to zero, and then continues *
- * counting. *
- * *
- ************************************************************************/
-
-typedef union ii_ictp_u {
- uint64_t ii_ictp_regval;
- struct {
- uint64_t i_prescale : 24;
- uint64_t i_rsvd : 40;
- } ii_ictp_fld_s;
-} ii_ictp_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * The CRB Entry registers can be conceptualized as rows and columns *
- * (illustrated in the table above). Each row contains the 4 *
- * registers required for a single CRB Entry. The first doubleword *
- * (column) for each entry is labeled A, and the second doubleword *
- * (higher address) is labeled B, the third doubleword is labeled C, *
- * the fourth doubleword is labeled D and the fifth doubleword is *
- * labeled E. All CRB entries have their addresses on a quarter *
- * cacheline aligned boundary. *
- * Upon reset, only the following fields are initialized: valid *
- * (VLD), priority count, timeout, timeout valid, and context valid. *
- * All other bits should be cleared by software before use (after *
- * recovering any potential error state from before the reset). *
- * The following four tables summarize the format for the four *
- * registers that are used for each ICRB# Entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_a_u {
- uint64_t ii_icrb0_a_regval;
- struct {
- uint64_t ia_iow : 1;
- uint64_t ia_vld : 1;
- uint64_t ia_addr : 47;
- uint64_t ia_tnum : 5;
- uint64_t ia_sidn : 4;
- uint64_t ia_rsvd : 6;
- } ii_icrb0_a_fld_s;
-} ii_icrb0_a_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_b_u {
- uint64_t ii_icrb0_b_regval;
- struct {
- uint64_t ib_xt_err : 1;
- uint64_t ib_mark : 1;
- uint64_t ib_ln_uce : 1;
- uint64_t ib_errcode : 3;
- uint64_t ib_error : 1;
- uint64_t ib_stall__bte_1 : 1;
- uint64_t ib_stall__bte_0 : 1;
- uint64_t ib_stall__intr : 1;
- uint64_t ib_stall_ib : 1;
- uint64_t ib_intvn : 1;
- uint64_t ib_wb : 1;
- uint64_t ib_hold : 1;
- uint64_t ib_ack : 1;
- uint64_t ib_resp : 1;
- uint64_t ib_ack_cnt : 11;
- uint64_t ib_rsvd : 7;
- uint64_t ib_exc : 5;
- uint64_t ib_init : 3;
- uint64_t ib_imsg : 8;
- uint64_t ib_imsgtype : 2;
- uint64_t ib_use_old : 1;
- uint64_t ib_rsvd_1 : 11;
- } ii_icrb0_b_fld_s;
-} ii_icrb0_b_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_c_u {
- uint64_t ii_icrb0_c_regval;
- struct {
- uint64_t ic_source : 15;
- uint64_t ic_size : 2;
- uint64_t ic_ct : 1;
- uint64_t ic_bte_num : 1;
- uint64_t ic_gbr : 1;
- uint64_t ic_resprqd : 1;
- uint64_t ic_bo : 1;
- uint64_t ic_suppl : 15;
- uint64_t ic_rsvd : 27;
- } ii_icrb0_c_fld_s;
-} ii_icrb0_c_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_d_u {
- uint64_t ii_icrb0_d_regval;
- struct {
- uint64_t id_pa_be : 43;
- uint64_t id_bte_op : 1;
- uint64_t id_pr_psc : 4;
- uint64_t id_pr_cnt : 4;
- uint64_t id_sleep : 1;
- uint64_t id_rsvd : 11;
- } ii_icrb0_d_fld_s;
-} ii_icrb0_d_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_e_u {
- uint64_t ii_icrb0_e_regval;
- struct {
- uint64_t ie_timeout : 8;
- uint64_t ie_context : 15;
- uint64_t ie_rsvd : 1;
- uint64_t ie_tvld : 1;
- uint64_t ie_cvld : 1;
- uint64_t ie_rsvd_0 : 38;
- } ii_icrb0_e_fld_s;
-} ii_icrb0_e_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the lower 64 bits of the header of the *
- * spurious message captured by II. Valid when the SP_MSG bit in ICMR *
- * register is set. *
- * *
- ************************************************************************/
-
-typedef union ii_icsml_u {
- uint64_t ii_icsml_regval;
- struct {
- uint64_t i_tt_addr : 47;
- uint64_t i_newsuppl_ex : 14;
- uint64_t i_reserved : 2;
- uint64_t i_overflow : 1;
- } ii_icsml_fld_s;
-} ii_icsml_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the middle 64 bits of the header of the *
- * spurious message captured by II. Valid when the SP_MSG bit in ICMR *
- * register is set. *
- * *
- ************************************************************************/
-
-typedef union ii_icsmm_u {
- uint64_t ii_icsmm_regval;
- struct {
- uint64_t i_tt_ack_cnt : 11;
- uint64_t i_reserved : 53;
- } ii_icsmm_fld_s;
-} ii_icsmm_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the microscopic state, all the inputs to *
- * the protocol table, captured with the spurious message. Valid when *
- * the SP_MSG bit in the ICMR register is set. *
- * *
- ************************************************************************/
-
-typedef union ii_icsmh_u {
- uint64_t ii_icsmh_regval;
- struct {
- uint64_t i_tt_vld : 1;
- uint64_t i_xerr : 1;
- uint64_t i_ft_cwact_o : 1;
- uint64_t i_ft_wact_o : 1;
- uint64_t i_ft_active_o : 1;
- uint64_t i_sync : 1;
- uint64_t i_mnusg : 1;
- uint64_t i_mnusz : 1;
- uint64_t i_plusz : 1;
- uint64_t i_plusg : 1;
- uint64_t i_tt_exc : 5;
- uint64_t i_tt_wb : 1;
- uint64_t i_tt_hold : 1;
- uint64_t i_tt_ack : 1;
- uint64_t i_tt_resp : 1;
- uint64_t i_tt_intvn : 1;
- uint64_t i_g_stall_bte1 : 1;
- uint64_t i_g_stall_bte0 : 1;
- uint64_t i_g_stall_il : 1;
- uint64_t i_g_stall_ib : 1;
- uint64_t i_tt_imsg : 8;
- uint64_t i_tt_imsgtype : 2;
- uint64_t i_tt_use_old : 1;
- uint64_t i_tt_respreqd : 1;
- uint64_t i_tt_bte_num : 1;
- uint64_t i_cbn : 1;
- uint64_t i_match : 1;
- uint64_t i_rpcnt_lt_34 : 1;
- uint64_t i_rpcnt_ge_34 : 1;
- uint64_t i_rpcnt_lt_18 : 1;
- uint64_t i_rpcnt_ge_18 : 1;
- uint64_t i_rpcnt_lt_2 : 1;
- uint64_t i_rpcnt_ge_2 : 1;
- uint64_t i_rqcnt_lt_18 : 1;
- uint64_t i_rqcnt_ge_18 : 1;
- uint64_t i_rqcnt_lt_2 : 1;
- uint64_t i_rqcnt_ge_2 : 1;
- uint64_t i_tt_device : 7;
- uint64_t i_tt_init : 3;
- uint64_t i_reserved : 5;
- } ii_icsmh_fld_s;
-} ii_icsmh_u_t;
-
-
-/************************************************************************
- * *
- * The Shub DEBUG unit provides a 3-bit selection signal to the *
- * II core and a 3-bit selection signal to the fsbclk domain in the II *
- * wrapper. *
- * *
- ************************************************************************/
-
-typedef union ii_idbss_u {
- uint64_t ii_idbss_regval;
- struct {
- uint64_t i_iioclk_core_submenu : 3;
- uint64_t i_rsvd : 5;
- uint64_t i_fsbclk_wrapper_submenu : 3;
- uint64_t i_rsvd_1 : 5;
- uint64_t i_iioclk_menu : 5;
- uint64_t i_rsvd_2 : 43;
- } ii_idbss_fld_s;
-} ii_idbss_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register is used to set up the length for a *
- * transfer and then to monitor the progress of that transfer. This *
- * register needs to be initialized before a transfer is started. A *
- * legitimate write to this register will set the Busy bit, clear the *
- * Error bit, and initialize the length to the value desired. *
- * While the transfer is in progress, hardware will decrement the *
- * length field with each successful block that is copied. Once the *
- * transfer completes, hardware will clear the Busy bit. The length *
- * field will also contain the number of cache lines left to be *
- * transferred. *
- * *
- ************************************************************************/
-
-typedef union ii_ibls0_u {
- uint64_t ii_ibls0_regval;
- struct {
- uint64_t i_length : 16;
- uint64_t i_error : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_busy : 1;
- uint64_t i_rsvd : 43;
- } ii_ibls0_fld_s;
-} ii_ibls0_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibsa0_u {
- uint64_t ii_ibsa0_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 42;
- uint64_t i_rsvd : 15;
- } ii_ibsa0_fld_s;
-} ii_ibsa0_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibda0_u {
- uint64_t ii_ibda0_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 42;
- uint64_t i_rsvd : 15;
- } ii_ibda0_fld_s;
-} ii_ibda0_u_t;
-
-
-/************************************************************************
- * *
- * Writing to this register sets up the attributes of the transfer *
- * and initiates the transfer operation. Reading this register has *
- * the side effect of terminating any transfer in progress. Note: *
- * stopping a transfer midstream could have an adverse impact on the *
- * other BTE. If a BTE stream has to be stopped (due to error *
- * handling for example), both BTE streams should be stopped and *
- * their transfers discarded. *
- * *
- ************************************************************************/
-
-typedef union ii_ibct0_u {
- uint64_t ii_ibct0_regval;
- struct {
- uint64_t i_zerofill : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_notify : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_poison : 1;
- uint64_t i_rsvd : 55;
- } ii_ibct0_fld_s;
-} ii_ibct0_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the address to which the WINV is sent. *
- * This address has to be cache line aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibna0_u {
- uint64_t ii_ibna0_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 42;
- uint64_t i_rsvd : 15;
- } ii_ibna0_fld_s;
-} ii_ibna0_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the programmable level as well as the node *
- * ID and PI unit of the processor to which the interrupt will be *
- * sent. *
- * *
- ************************************************************************/
-
-typedef union ii_ibia0_u {
- uint64_t ii_ibia0_regval;
- struct {
- uint64_t i_rsvd_2 : 1;
- uint64_t i_node_id : 11;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_level : 7;
- uint64_t i_rsvd : 41;
- } ii_ibia0_fld_s;
-} ii_ibia0_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register is used to set up the length for a *
- * transfer and then to monitor the progress of that transfer. This *
- * register needs to be initialized before a transfer is started. A *
- * legitimate write to this register will set the Busy bit, clear the *
- * Error bit, and initialize the length to the value desired. *
- * While the transfer is in progress, hardware will decrement the *
- * length field with each successful block that is copied. Once the *
- * transfer completes, hardware will clear the Busy bit. The length *
- * field will also contain the number of cache lines left to be *
- * transferred. *
- * *
- ************************************************************************/
-
-typedef union ii_ibls1_u {
- uint64_t ii_ibls1_regval;
- struct {
- uint64_t i_length : 16;
- uint64_t i_error : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_busy : 1;
- uint64_t i_rsvd : 43;
- } ii_ibls1_fld_s;
-} ii_ibls1_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibsa1_u {
- uint64_t ii_ibsa1_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 33;
- uint64_t i_rsvd : 24;
- } ii_ibsa1_fld_s;
-} ii_ibsa1_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibda1_u {
- uint64_t ii_ibda1_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 33;
- uint64_t i_rsvd : 24;
- } ii_ibda1_fld_s;
-} ii_ibda1_u_t;
-
-
-/************************************************************************
- * *
- * Writing to this register sets up the attributes of the transfer *
- * and initiates the transfer operation. Reading this register has *
- * the side effect of terminating any transfer in progress. Note: *
- * stopping a transfer midstream could have an adverse impact on the *
- * other BTE. If a BTE stream has to be stopped (due to error *
- * handling for example), both BTE streams should be stopped and *
- * their transfers discarded. *
- * *
- ************************************************************************/
-
-typedef union ii_ibct1_u {
- uint64_t ii_ibct1_regval;
- struct {
- uint64_t i_zerofill : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_notify : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_poison : 1;
- uint64_t i_rsvd : 55;
- } ii_ibct1_fld_s;
-} ii_ibct1_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the address to which the WINV is sent. *
- * This address has to be cache line aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibna1_u {
- uint64_t ii_ibna1_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 33;
- uint64_t i_rsvd : 24;
- } ii_ibna1_fld_s;
-} ii_ibna1_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the programmable level as well as the node *
- * ID and PI unit of the processor to which the interrupt will be *
- * sent. *
- * *
- ************************************************************************/
-
-typedef union ii_ibia1_u {
- uint64_t ii_ibia1_regval;
- struct {
- uint64_t i_pi_id : 1;
- uint64_t i_node_id : 8;
- uint64_t i_rsvd_1 : 7;
- uint64_t i_level : 7;
- uint64_t i_rsvd : 41;
- } ii_ibia1_fld_s;
-} ii_ibia1_u_t;
-
-
-/************************************************************************
- * *
- * This register defines the resources that feed information into *
- * the two performance counters located in the IO Performance *
- * Profiling Register. There are 17 different quantities that can be *
- * measured. Given these 17 different options, the two performance *
- * counters have 15 of them in common; menu selections 0 through 0xE *
- * are identical for each performance counter. As for the other two *
- * options, one is available from one performance counter and the *
- * other is available from the other performance counter. Hence, the *
- * II supports all 17*16=272 possible combinations of quantities to *
- * measure. *
- * *
- ************************************************************************/
-
-typedef union ii_ipcr_u {
- uint64_t ii_ipcr_regval;
- struct {
- uint64_t i_ippr0_c : 4;
- uint64_t i_ippr1_c : 4;
- uint64_t i_icct : 8;
- uint64_t i_rsvd : 48;
- } ii_ipcr_fld_s;
-} ii_ipcr_u_t;
-
-
-/************************************************************************
- * *
- * *
- * *
- ************************************************************************/
-
-typedef union ii_ippr_u {
- uint64_t ii_ippr_regval;
- struct {
- uint64_t i_ippr0 : 32;
- uint64_t i_ippr1 : 32;
- } ii_ippr_fld_s;
-} ii_ippr_u_t;
-
-
-
-/**************************************************************************
- * *
- * The following defines which were not formed into structures are *
- * probably indentical to another register, and the name of the *
- * register is provided against each of these registers. This *
- * information needs to be checked carefully *
- * *
- * IIO_ICRB1_A IIO_ICRB0_A *
- * IIO_ICRB1_B IIO_ICRB0_B *
- * IIO_ICRB1_C IIO_ICRB0_C *
- * IIO_ICRB1_D IIO_ICRB0_D *
- * IIO_ICRB1_E IIO_ICRB0_E *
- * IIO_ICRB2_A IIO_ICRB0_A *
- * IIO_ICRB2_B IIO_ICRB0_B *
- * IIO_ICRB2_C IIO_ICRB0_C *
- * IIO_ICRB2_D IIO_ICRB0_D *
- * IIO_ICRB2_E IIO_ICRB0_E *
- * IIO_ICRB3_A IIO_ICRB0_A *
- * IIO_ICRB3_B IIO_ICRB0_B *
- * IIO_ICRB3_C IIO_ICRB0_C *
- * IIO_ICRB3_D IIO_ICRB0_D *
- * IIO_ICRB3_E IIO_ICRB0_E *
- * IIO_ICRB4_A IIO_ICRB0_A *
- * IIO_ICRB4_B IIO_ICRB0_B *
- * IIO_ICRB4_C IIO_ICRB0_C *
- * IIO_ICRB4_D IIO_ICRB0_D *
- * IIO_ICRB4_E IIO_ICRB0_E *
- * IIO_ICRB5_A IIO_ICRB0_A *
- * IIO_ICRB5_B IIO_ICRB0_B *
- * IIO_ICRB5_C IIO_ICRB0_C *
- * IIO_ICRB5_D IIO_ICRB0_D *
- * IIO_ICRB5_E IIO_ICRB0_E *
- * IIO_ICRB6_A IIO_ICRB0_A *
- * IIO_ICRB6_B IIO_ICRB0_B *
- * IIO_ICRB6_C IIO_ICRB0_C *
- * IIO_ICRB6_D IIO_ICRB0_D *
- * IIO_ICRB6_E IIO_ICRB0_E *
- * IIO_ICRB7_A IIO_ICRB0_A *
- * IIO_ICRB7_B IIO_ICRB0_B *
- * IIO_ICRB7_C IIO_ICRB0_C *
- * IIO_ICRB7_D IIO_ICRB0_D *
- * IIO_ICRB7_E IIO_ICRB0_E *
- * IIO_ICRB8_A IIO_ICRB0_A *
- * IIO_ICRB8_B IIO_ICRB0_B *
- * IIO_ICRB8_C IIO_ICRB0_C *
- * IIO_ICRB8_D IIO_ICRB0_D *
- * IIO_ICRB8_E IIO_ICRB0_E *
- * IIO_ICRB9_A IIO_ICRB0_A *
- * IIO_ICRB9_B IIO_ICRB0_B *
- * IIO_ICRB9_C IIO_ICRB0_C *
- * IIO_ICRB9_D IIO_ICRB0_D *
- * IIO_ICRB9_E IIO_ICRB0_E *
- * IIO_ICRBA_A IIO_ICRB0_A *
- * IIO_ICRBA_B IIO_ICRB0_B *
- * IIO_ICRBA_C IIO_ICRB0_C *
- * IIO_ICRBA_D IIO_ICRB0_D *
- * IIO_ICRBA_E IIO_ICRB0_E *
- * IIO_ICRBB_A IIO_ICRB0_A *
- * IIO_ICRBB_B IIO_ICRB0_B *
- * IIO_ICRBB_C IIO_ICRB0_C *
- * IIO_ICRBB_D IIO_ICRB0_D *
- * IIO_ICRBB_E IIO_ICRB0_E *
- * IIO_ICRBC_A IIO_ICRB0_A *
- * IIO_ICRBC_B IIO_ICRB0_B *
- * IIO_ICRBC_C IIO_ICRB0_C *
- * IIO_ICRBC_D IIO_ICRB0_D *
- * IIO_ICRBC_E IIO_ICRB0_E *
- * IIO_ICRBD_A IIO_ICRB0_A *
- * IIO_ICRBD_B IIO_ICRB0_B *
- * IIO_ICRBD_C IIO_ICRB0_C *
- * IIO_ICRBD_D IIO_ICRB0_D *
- * IIO_ICRBD_E IIO_ICRB0_E *
- * IIO_ICRBE_A IIO_ICRB0_A *
- * IIO_ICRBE_B IIO_ICRB0_B *
- * IIO_ICRBE_C IIO_ICRB0_C *
- * IIO_ICRBE_D IIO_ICRB0_D *
- * IIO_ICRBE_E IIO_ICRB0_E *
- * *
- **************************************************************************/
-
-
-/*
- * Slightly friendlier names for some common registers.
- */
-#define IIO_WIDGET IIO_WID /* Widget identification */
-#define IIO_WIDGET_STAT IIO_WSTAT /* Widget status register */
-#define IIO_WIDGET_CTRL IIO_WCR /* Widget control register */
-#define IIO_PROTECT IIO_ILAPR /* IO interface protection */
-#define IIO_PROTECT_OVRRD IIO_ILAPO /* IO protect override */
-#define IIO_OUTWIDGET_ACCESS IIO_IOWA /* Outbound widget access */
-#define IIO_INWIDGET_ACCESS IIO_IIWA /* Inbound widget access */
-#define IIO_INDEV_ERR_MASK IIO_IIDEM /* Inbound device error mask */
-#define IIO_LLP_CSR IIO_ILCSR /* LLP control and status */
-#define IIO_LLP_LOG IIO_ILLR /* LLP log */
-#define IIO_XTALKCC_TOUT IIO_IXCC /* Xtalk credit count timeout*/
-#define IIO_XTALKTT_TOUT IIO_IXTT /* Xtalk tail timeout */
-#define IIO_IO_ERR_CLR IIO_IECLR /* IO error clear */
-#define IIO_IGFX_0 IIO_IGFX0
-#define IIO_IGFX_1 IIO_IGFX1
-#define IIO_IBCT_0 IIO_IBCT0
-#define IIO_IBCT_1 IIO_IBCT1
-#define IIO_IBLS_0 IIO_IBLS0
-#define IIO_IBLS_1 IIO_IBLS1
-#define IIO_IBSA_0 IIO_IBSA0
-#define IIO_IBSA_1 IIO_IBSA1
-#define IIO_IBDA_0 IIO_IBDA0
-#define IIO_IBDA_1 IIO_IBDA1
-#define IIO_IBNA_0 IIO_IBNA0
-#define IIO_IBNA_1 IIO_IBNA1
-#define IIO_IBIA_0 IIO_IBIA0
-#define IIO_IBIA_1 IIO_IBIA1
-#define IIO_IOPRB_0 IIO_IPRB0
-
-#define IIO_PRTE_A(_x) (IIO_IPRTE0_A + (8 * (_x)))
-#define IIO_PRTE_B(_x) (IIO_IPRTE0_B + (8 * (_x)))
-#define IIO_NUM_PRTES 8 /* Total number of PRB table entries */
-#define IIO_WIDPRTE_A(x) IIO_PRTE_A(((x) - 8)) /* widget ID to its PRTE num */
-#define IIO_WIDPRTE_B(x) IIO_PRTE_B(((x) - 8)) /* widget ID to its PRTE num */
-
-#define IIO_NUM_IPRBS (9)
-
-#define IIO_LLP_CSR_IS_UP 0x00002000
-#define IIO_LLP_CSR_LLP_STAT_MASK 0x00003000
-#define IIO_LLP_CSR_LLP_STAT_SHFT 12
-
-#define IIO_LLP_CB_MAX 0xffff /* in ILLR CB_CNT, Max Check Bit errors */
-#define IIO_LLP_SN_MAX 0xffff /* in ILLR SN_CNT, Max Sequence Number errors */
-
-/* key to IIO_PROTECT_OVRRD */
-#define IIO_PROTECT_OVRRD_KEY 0x53474972756c6573ull /* "SGIrules" */
-
-/* BTE register names */
-#define IIO_BTE_STAT_0 IIO_IBLS_0 /* Also BTE length/status 0 */
-#define IIO_BTE_SRC_0 IIO_IBSA_0 /* Also BTE source address 0 */
-#define IIO_BTE_DEST_0 IIO_IBDA_0 /* Also BTE dest. address 0 */
-#define IIO_BTE_CTRL_0 IIO_IBCT_0 /* Also BTE control/terminate 0 */
-#define IIO_BTE_NOTIFY_0 IIO_IBNA_0 /* Also BTE notification 0 */
-#define IIO_BTE_INT_0 IIO_IBIA_0 /* Also BTE interrupt 0 */
-#define IIO_BTE_OFF_0 0 /* Base offset from BTE 0 regs. */
-#define IIO_BTE_OFF_1 (IIO_IBLS_1 - IIO_IBLS_0) /* Offset from base to BTE 1 */
-
-/* BTE register offsets from base */
-#define BTEOFF_STAT 0
-#define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0)
-#define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0)
-#define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0)
-#define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0)
-#define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0)
-
-
-/* names used in shub diags */
-#define IIO_BASE_BTE0 IIO_IBLS_0
-#define IIO_BASE_BTE1 IIO_IBLS_1
-
-/*
- * Macro which takes the widget number, and returns the
- * IO PRB address of that widget.
- * value _x is expected to be a widget number in the range
- * 0, 8 - 0xF
- */
-#define IIO_IOPRB(_x) (IIO_IOPRB_0 + ( ( (_x) < HUB_WIDGET_ID_MIN ? \
- (_x) : \
- (_x) - (HUB_WIDGET_ID_MIN-1)) << 3) )
-
-
-/* GFX Flow Control Node/Widget Register */
-#define IIO_IGFX_W_NUM_BITS 4 /* size of widget num field */
-#define IIO_IGFX_W_NUM_MASK ((1<<IIO_IGFX_W_NUM_BITS)-1)
-#define IIO_IGFX_W_NUM_SHIFT 0
-#define IIO_IGFX_PI_NUM_BITS 1 /* size of PI num field */
-#define IIO_IGFX_PI_NUM_MASK ((1<<IIO_IGFX_PI_NUM_BITS)-1)
-#define IIO_IGFX_PI_NUM_SHIFT 4
-#define IIO_IGFX_N_NUM_BITS 8 /* size of node num field */
-#define IIO_IGFX_N_NUM_MASK ((1<<IIO_IGFX_N_NUM_BITS)-1)
-#define IIO_IGFX_N_NUM_SHIFT 5
-#define IIO_IGFX_P_NUM_BITS 1 /* size of processor num field */
-#define IIO_IGFX_P_NUM_MASK ((1<<IIO_IGFX_P_NUM_BITS)-1)
-#define IIO_IGFX_P_NUM_SHIFT 16
-#define IIO_IGFX_INIT(widget, pi, node, cpu) (\
- (((widget) & IIO_IGFX_W_NUM_MASK) << IIO_IGFX_W_NUM_SHIFT) | \
- (((pi) & IIO_IGFX_PI_NUM_MASK)<< IIO_IGFX_PI_NUM_SHIFT)| \
- (((node) & IIO_IGFX_N_NUM_MASK) << IIO_IGFX_N_NUM_SHIFT) | \
- (((cpu) & IIO_IGFX_P_NUM_MASK) << IIO_IGFX_P_NUM_SHIFT))
-
-
-/* Scratch registers (all bits available) */
-#define IIO_SCRATCH_REG0 IIO_ISCR0
-#define IIO_SCRATCH_REG1 IIO_ISCR1
-#define IIO_SCRATCH_MASK 0xffffffffffffffffUL
-
-#define IIO_SCRATCH_BIT0_0 0x0000000000000001UL
-#define IIO_SCRATCH_BIT0_1 0x0000000000000002UL
-#define IIO_SCRATCH_BIT0_2 0x0000000000000004UL
-#define IIO_SCRATCH_BIT0_3 0x0000000000000008UL
-#define IIO_SCRATCH_BIT0_4 0x0000000000000010UL
-#define IIO_SCRATCH_BIT0_5 0x0000000000000020UL
-#define IIO_SCRATCH_BIT0_6 0x0000000000000040UL
-#define IIO_SCRATCH_BIT0_7 0x0000000000000080UL
-#define IIO_SCRATCH_BIT0_8 0x0000000000000100UL
-#define IIO_SCRATCH_BIT0_9 0x0000000000000200UL
-#define IIO_SCRATCH_BIT0_A 0x0000000000000400UL
-
-#define IIO_SCRATCH_BIT1_0 0x0000000000000001UL
-#define IIO_SCRATCH_BIT1_1 0x0000000000000002UL
-/* IO Translation Table Entries */
-#define IIO_NUM_ITTES 7 /* ITTEs numbered 0..6 */
- /* Hw manuals number them 1..7! */
-/*
- * IIO_IMEM Register fields.
- */
-#define IIO_IMEM_W0ESD 0x1UL /* Widget 0 shut down due to error */
-#define IIO_IMEM_B0ESD (1UL << 4) /* BTE 0 shut down due to error */
-#define IIO_IMEM_B1ESD (1UL << 8) /* BTE 1 Shut down due to error */
-
-/*
- * As a permanent workaround for a bug in the PI side of the shub, we've
- * redefined big window 7 as small window 0.
- XXX does this still apply for SN1??
- */
-#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1)
-
-/*
- * Use the top big window as a surrogate for the first small window
- */
-#define SWIN0_BIGWIN HUB_NUM_BIG_WINDOW
-
-#define ILCSR_WARM_RESET 0x100
-
-/*
- * CRB manipulation macros
- * The CRB macros are slightly complicated, since there are up to
- * four registers associated with each CRB entry.
- */
-#define IIO_NUM_CRBS 15 /* Number of CRBs */
-#define IIO_NUM_PC_CRBS 4 /* Number of partial cache CRBs */
-#define IIO_ICRB_OFFSET 8
-#define IIO_ICRB_0 IIO_ICRB0_A
-#define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */
-/* XXX - This is now tuneable:
- #define IIO_FIRST_PC_ENTRY 12
- */
-
-#define IIO_ICRB_A(_x) ((u64)(IIO_ICRB_0 + (6 * IIO_ICRB_OFFSET * (_x))))
-#define IIO_ICRB_B(_x) ((u64)((char *)IIO_ICRB_A(_x) + 1*IIO_ICRB_OFFSET))
-#define IIO_ICRB_C(_x) ((u64)((char *)IIO_ICRB_A(_x) + 2*IIO_ICRB_OFFSET))
-#define IIO_ICRB_D(_x) ((u64)((char *)IIO_ICRB_A(_x) + 3*IIO_ICRB_OFFSET))
-#define IIO_ICRB_E(_x) ((u64)((char *)IIO_ICRB_A(_x) + 4*IIO_ICRB_OFFSET))
-
-#define TNUM_TO_WIDGET_DEV(_tnum) (_tnum & 0x7)
-
-/*
- * values for "ecode" field
- */
-#define IIO_ICRB_ECODE_DERR 0 /* Directory error due to IIO access */
-#define IIO_ICRB_ECODE_PERR 1 /* Poison error on IO access */
-#define IIO_ICRB_ECODE_WERR 2 /* Write error by IIO access
- * e.g. WINV to a Read only line. */
-#define IIO_ICRB_ECODE_AERR 3 /* Access error caused by IIO access */
-#define IIO_ICRB_ECODE_PWERR 4 /* Error on partial write */
-#define IIO_ICRB_ECODE_PRERR 5 /* Error on partial read */
-#define IIO_ICRB_ECODE_TOUT 6 /* CRB timeout before deallocating */
-#define IIO_ICRB_ECODE_XTERR 7 /* Incoming xtalk pkt had error bit */
-
-/*
- * Values for field imsgtype
- */
-#define IIO_ICRB_IMSGT_XTALK 0 /* Incoming Meessage from Xtalk */
-#define IIO_ICRB_IMSGT_BTE 1 /* Incoming message from BTE */
-#define IIO_ICRB_IMSGT_SN1NET 2 /* Incoming message from SN1 net */
-#define IIO_ICRB_IMSGT_CRB 3 /* Incoming message from CRB ??? */
-
-/*
- * values for field initiator.
- */
-#define IIO_ICRB_INIT_XTALK 0 /* Message originated in xtalk */
-#define IIO_ICRB_INIT_BTE0 0x1 /* Message originated in BTE 0 */
-#define IIO_ICRB_INIT_SN1NET 0x2 /* Message originated in SN1net */
-#define IIO_ICRB_INIT_CRB 0x3 /* Message originated in CRB ? */
-#define IIO_ICRB_INIT_BTE1 0x5 /* MEssage originated in BTE 1 */
-
-/*
- * Number of credits Hub widget has while sending req/response to
- * xbow.
- * Value of 3 is required by Xbow 1.1
- * We may be able to increase this to 4 with Xbow 1.2.
- */
-#define HUBII_XBOW_CREDIT 3
-#define HUBII_XBOW_REV2_CREDIT 4
-
-/*
- * Number of credits that xtalk devices should use when communicating
- * with a SHub (depth of SHub's queue).
- */
-#define HUB_CREDIT 4
-
-/*
- * Some IIO_PRB fields
- */
-#define IIO_PRB_MULTI_ERR (1LL << 63)
-#define IIO_PRB_SPUR_RD (1LL << 51)
-#define IIO_PRB_SPUR_WR (1LL << 50)
-#define IIO_PRB_RD_TO (1LL << 49)
-#define IIO_PRB_ERROR (1LL << 48)
-
-/*************************************************************************
-
- Some of the IIO field masks and shifts are defined here.
- This is in order to maintain compatibility in SN0 and SN1 code
-
-**************************************************************************/
-
-/*
- * ICMR register fields
- * (Note: the IIO_ICMR_P_CNT and IIO_ICMR_PC_VLD from Hub are not
- * present in SHub)
- */
-
-#define IIO_ICMR_CRB_VLD_SHFT 20
-#define IIO_ICMR_CRB_VLD_MASK (0x7fffUL << IIO_ICMR_CRB_VLD_SHFT)
-
-#define IIO_ICMR_FC_CNT_SHFT 16
-#define IIO_ICMR_FC_CNT_MASK (0xf << IIO_ICMR_FC_CNT_SHFT)
-
-#define IIO_ICMR_C_CNT_SHFT 4
-#define IIO_ICMR_C_CNT_MASK (0xf << IIO_ICMR_C_CNT_SHFT)
-
-#define IIO_ICMR_PRECISE (1UL << 52)
-#define IIO_ICMR_CLR_RPPD (1UL << 13)
-#define IIO_ICMR_CLR_RQPD (1UL << 12)
-
-/*
- * IIO PIO Deallocation register field masks : (IIO_IPDR)
- XXX present but not needed in bedrock? See the manual.
- */
-#define IIO_IPDR_PND (1 << 4)
-
-/*
- * IIO CRB deallocation register field masks: (IIO_ICDR)
- */
-#define IIO_ICDR_PND (1 << 4)
-
-/*
- * IO BTE Length/Status (IIO_IBLS) register bit field definitions
- */
-#define IBLS_BUSY (0x1UL << 20)
-#define IBLS_ERROR_SHFT 16
-#define IBLS_ERROR (0x1UL << IBLS_ERROR_SHFT)
-#define IBLS_LENGTH_MASK 0xffff
-
-/*
- * IO BTE Control/Terminate register (IBCT) register bit field definitions
- */
-#define IBCT_POISON (0x1UL << 8)
-#define IBCT_NOTIFY (0x1UL << 4)
-#define IBCT_ZFIL_MODE (0x1UL << 0)
-
-/*
- * IIO Incoming Error Packet Header (IIO_IIEPH1/IIO_IIEPH2)
- */
-#define IIEPH1_VALID (1UL << 44)
-#define IIEPH1_OVERRUN (1UL << 40)
-#define IIEPH1_ERR_TYPE_SHFT 32
-#define IIEPH1_ERR_TYPE_MASK 0xf
-#define IIEPH1_SOURCE_SHFT 20
-#define IIEPH1_SOURCE_MASK 11
-#define IIEPH1_SUPPL_SHFT 8
-#define IIEPH1_SUPPL_MASK 11
-#define IIEPH1_CMD_SHFT 0
-#define IIEPH1_CMD_MASK 7
-
-#define IIEPH2_TAIL (1UL << 40)
-#define IIEPH2_ADDRESS_SHFT 0
-#define IIEPH2_ADDRESS_MASK 38
-
-#define IIEPH1_ERR_SHORT_REQ 2
-#define IIEPH1_ERR_SHORT_REPLY 3
-#define IIEPH1_ERR_LONG_REQ 4
-#define IIEPH1_ERR_LONG_REPLY 5
-
-/*
- * IO Error Clear register bit field definitions
- */
-#define IECLR_PI1_FWD_INT (1UL << 31) /* clear PI1_FORWARD_INT in iidsr */
-#define IECLR_PI0_FWD_INT (1UL << 30) /* clear PI0_FORWARD_INT in iidsr */
-#define IECLR_SPUR_RD_HDR (1UL << 29) /* clear valid bit in ixss reg */
-#define IECLR_BTE1 (1UL << 18) /* clear bte error 1 */
-#define IECLR_BTE0 (1UL << 17) /* clear bte error 0 */
-#define IECLR_CRAZY (1UL << 16) /* clear crazy bit in wstat reg */
-#define IECLR_PRB_F (1UL << 15) /* clear err bit in PRB_F reg */
-#define IECLR_PRB_E (1UL << 14) /* clear err bit in PRB_E reg */
-#define IECLR_PRB_D (1UL << 13) /* clear err bit in PRB_D reg */
-#define IECLR_PRB_C (1UL << 12) /* clear err bit in PRB_C reg */
-#define IECLR_PRB_B (1UL << 11) /* clear err bit in PRB_B reg */
-#define IECLR_PRB_A (1UL << 10) /* clear err bit in PRB_A reg */
-#define IECLR_PRB_9 (1UL << 9) /* clear err bit in PRB_9 reg */
-#define IECLR_PRB_8 (1UL << 8) /* clear err bit in PRB_8 reg */
-#define IECLR_PRB_0 (1UL << 0) /* clear err bit in PRB_0 reg */
-
-/*
- * IIO CRB control register Fields: IIO_ICCR
- */
-#define IIO_ICCR_PENDING (0x10000)
-#define IIO_ICCR_CMD_MASK (0xFF)
-#define IIO_ICCR_CMD_SHFT (7)
-#define IIO_ICCR_CMD_NOP (0x0) /* No Op */
-#define IIO_ICCR_CMD_WAKE (0x100) /* Reactivate CRB entry and process */
-#define IIO_ICCR_CMD_TIMEOUT (0x200) /* Make CRB timeout & mark invalid */
-#define IIO_ICCR_CMD_EJECT (0x400) /* Contents of entry written to memory
- * via a WB
- */
-#define IIO_ICCR_CMD_FLUSH (0x800)
-
-/*
- *
- * CRB Register description.
- *
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- *
- * Many of the fields in CRB are status bits used by hardware
- * for implementation of the protocol. It's very dangerous to
- * mess around with the CRB registers.
- *
- * It's OK to read the CRB registers and try to make sense out of the
- * fields in CRB.
- *
- * Updating CRB requires all activities in Hub IIO to be quiesced.
- * otherwise, a write to CRB could corrupt other CRB entries.
- * CRBs are here only as a back door peek to shub IIO's status.
- * Quiescing implies no dmas no PIOs
- * either directly from the cpu or from sn0net.
- * this is not something that can be done easily. So, AVOID updating
- * CRBs.
- */
-
-/*
- * Easy access macros for CRBs, all 5 registers (A-E)
- */
-typedef ii_icrb0_a_u_t icrba_t;
-#define a_sidn ii_icrb0_a_fld_s.ia_sidn
-#define a_tnum ii_icrb0_a_fld_s.ia_tnum
-#define a_addr ii_icrb0_a_fld_s.ia_addr
-#define a_valid ii_icrb0_a_fld_s.ia_vld
-#define a_iow ii_icrb0_a_fld_s.ia_iow
-#define a_regvalue ii_icrb0_a_regval
-
-typedef ii_icrb0_b_u_t icrbb_t;
-#define b_use_old ii_icrb0_b_fld_s.ib_use_old
-#define b_imsgtype ii_icrb0_b_fld_s.ib_imsgtype
-#define b_imsg ii_icrb0_b_fld_s.ib_imsg
-#define b_initiator ii_icrb0_b_fld_s.ib_init
-#define b_exc ii_icrb0_b_fld_s.ib_exc
-#define b_ackcnt ii_icrb0_b_fld_s.ib_ack_cnt
-#define b_resp ii_icrb0_b_fld_s.ib_resp
-#define b_ack ii_icrb0_b_fld_s.ib_ack
-#define b_hold ii_icrb0_b_fld_s.ib_hold
-#define b_wb ii_icrb0_b_fld_s.ib_wb
-#define b_intvn ii_icrb0_b_fld_s.ib_intvn
-#define b_stall_ib ii_icrb0_b_fld_s.ib_stall_ib
-#define b_stall_int ii_icrb0_b_fld_s.ib_stall__intr
-#define b_stall_bte_0 ii_icrb0_b_fld_s.ib_stall__bte_0
-#define b_stall_bte_1 ii_icrb0_b_fld_s.ib_stall__bte_1
-#define b_error ii_icrb0_b_fld_s.ib_error
-#define b_ecode ii_icrb0_b_fld_s.ib_errcode
-#define b_lnetuce ii_icrb0_b_fld_s.ib_ln_uce
-#define b_mark ii_icrb0_b_fld_s.ib_mark
-#define b_xerr ii_icrb0_b_fld_s.ib_xt_err
-#define b_regvalue ii_icrb0_b_regval
-
-typedef ii_icrb0_c_u_t icrbc_t;
-#define c_suppl ii_icrb0_c_fld_s.ic_suppl
-#define c_barrop ii_icrb0_c_fld_s.ic_bo
-#define c_doresp ii_icrb0_c_fld_s.ic_resprqd
-#define c_gbr ii_icrb0_c_fld_s.ic_gbr
-#define c_btenum ii_icrb0_c_fld_s.ic_bte_num
-#define c_cohtrans ii_icrb0_c_fld_s.ic_ct
-#define c_xtsize ii_icrb0_c_fld_s.ic_size
-#define c_source ii_icrb0_c_fld_s.ic_source
-#define c_regvalue ii_icrb0_c_regval
-
-
-typedef ii_icrb0_d_u_t icrbd_t;
-#define d_sleep ii_icrb0_d_fld_s.id_sleep
-#define d_pricnt ii_icrb0_d_fld_s.id_pr_cnt
-#define d_pripsc ii_icrb0_d_fld_s.id_pr_psc
-#define d_bteop ii_icrb0_d_fld_s.id_bte_op
-#define d_bteaddr ii_icrb0_d_fld_s.id_pa_be /* ic_pa_be fld has 2 names*/
-#define d_benable ii_icrb0_d_fld_s.id_pa_be /* ic_pa_be fld has 2 names*/
-#define d_regvalue ii_icrb0_d_regval
-
-typedef ii_icrb0_e_u_t icrbe_t;
-#define icrbe_ctxtvld ii_icrb0_e_fld_s.ie_cvld
-#define icrbe_toutvld ii_icrb0_e_fld_s.ie_tvld
-#define icrbe_context ii_icrb0_e_fld_s.ie_context
-#define icrbe_timeout ii_icrb0_e_fld_s.ie_timeout
-#define e_regvalue ii_icrb0_e_regval
-
-
-/* Number of widgets supported by shub */
-#define HUB_NUM_WIDGET 9
-#define HUB_WIDGET_ID_MIN 0x8
-#define HUB_WIDGET_ID_MAX 0xf
-
-#define HUB_WIDGET_PART_NUM 0xc120
-#define MAX_HUBS_PER_XBOW 2
-
-/* A few more #defines for backwards compatibility */
-#define iprb_t ii_iprb0_u_t
-#define iprb_regval ii_iprb0_regval
-#define iprb_mult_err ii_iprb0_fld_s.i_mult_err
-#define iprb_spur_rd ii_iprb0_fld_s.i_spur_rd
-#define iprb_spur_wr ii_iprb0_fld_s.i_spur_wr
-#define iprb_rd_to ii_iprb0_fld_s.i_rd_to
-#define iprb_ovflow ii_iprb0_fld_s.i_of_cnt
-#define iprb_error ii_iprb0_fld_s.i_error
-#define iprb_ff ii_iprb0_fld_s.i_f
-#define iprb_mode ii_iprb0_fld_s.i_m
-#define iprb_bnakctr ii_iprb0_fld_s.i_nb
-#define iprb_anakctr ii_iprb0_fld_s.i_na
-#define iprb_xtalkctr ii_iprb0_fld_s.i_c
-
-#define LNK_STAT_WORKING 0x2 /* LLP is working */
-
-#define IIO_WSTAT_ECRAZY (1ULL << 32) /* Hub gone crazy */
-#define IIO_WSTAT_TXRETRY (1ULL << 9) /* Hub Tx Retry timeout */
-#define IIO_WSTAT_TXRETRY_MASK (0x7F) /* should be 0xFF?? */
-#define IIO_WSTAT_TXRETRY_SHFT (16)
-#define IIO_WSTAT_TXRETRY_CNT(w) (((w) >> IIO_WSTAT_TXRETRY_SHFT) & \
- IIO_WSTAT_TXRETRY_MASK)
-
-/* Number of II perf. counters we can multiplex at once */
-
-#define IO_PERF_SETS 32
-
-/* Bit for the widget in inbound access register */
-#define IIO_IIWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
-/* Bit for the widget in outbound access register */
-#define IIO_IOWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
-
-/* NOTE: The following define assumes that we are going to get
- * widget numbers from 8 thru F and the device numbers within
- * widget from 0 thru 7.
- */
-#define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((uint64_t)(1ULL << (8 * ((w) - 8) + (d))))
-
-/* IO Interrupt Destination Register */
-#define IIO_IIDSR_SENT_SHIFT 28
-#define IIO_IIDSR_SENT_MASK 0x30000000
-#define IIO_IIDSR_ENB_SHIFT 24
-#define IIO_IIDSR_ENB_MASK 0x01000000
-#define IIO_IIDSR_NODE_SHIFT 9
-#define IIO_IIDSR_NODE_MASK 0x000ff700
-#define IIO_IIDSR_PI_ID_SHIFT 8
-#define IIO_IIDSR_PI_ID_MASK 0x00000100
-#define IIO_IIDSR_LVL_SHIFT 0
-#define IIO_IIDSR_LVL_MASK 0x000000ff
-
-/* Xtalk timeout threshhold register (IIO_IXTT) */
-#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */
-#define IXTT_RRSP_TO_MASK (0x1FULL << IXTT_RRSP_TO_SHFT)
-#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */
-#define IXTT_RRSP_PS_MASK (0x7FFFFFULL << IXTT_RRSP_PS_SHFT)
-#define IXTT_TAIL_TO_SHFT 0 /* tail timeout counter threshold */
-#define IXTT_TAIL_TO_MASK (0x3FFFFFFULL << IXTT_TAIL_TO_SHFT)
-
-/*
- * The IO LLP control status register and widget control register
- */
-
-typedef union hubii_wcr_u {
- uint64_t wcr_reg_value;
- struct {
- uint64_t wcr_widget_id: 4, /* LLP crossbar credit */
- wcr_tag_mode: 1, /* Tag mode */
- wcr_rsvd1: 8, /* Reserved */
- wcr_xbar_crd: 3, /* LLP crossbar credit */
- wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */
- wcr_dir_con: 1, /* widget direct connect */
- wcr_e_thresh: 5, /* elasticity threshold */
- wcr_rsvd: 41; /* unused */
- } wcr_fields_s;
-} hubii_wcr_t;
-
-#define iwcr_dir_con wcr_fields_s.wcr_dir_con
-
-/* The structures below are defined to extract and modify the ii
-performance registers */
-
-/* io_perf_sel allows the caller to specify what tests will be
- performed */
-
-typedef union io_perf_sel {
- uint64_t perf_sel_reg;
- struct {
- uint64_t perf_ippr0 : 4,
- perf_ippr1 : 4,
- perf_icct : 8,
- perf_rsvd : 48;
- } perf_sel_bits;
-} io_perf_sel_t;
-
-/* io_perf_cnt is to extract the count from the shub registers. Due to
- hardware problems there is only one counter, not two. */
-
-typedef union io_perf_cnt {
- uint64_t perf_cnt;
- struct {
- uint64_t perf_cnt : 20,
- perf_rsvd2 : 12,
- perf_rsvd1 : 32;
- } perf_cnt_bits;
-
-} io_perf_cnt_t;
-
-typedef union iprte_a {
- uint64_t entry;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_addr : 38;
- uint64_t i_init : 3;
- uint64_t i_source : 8;
- uint64_t i_rsvd : 2;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } iprte_fields;
-} iprte_a_t;
-
-#endif /* _ASM_IA64_SN_SHUBIO_H */
-
+++ /dev/null
-# arch/ia64/sn/io/Makefile
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
-#
-# Makefile for the sn io routines.
-#
-
-obj-y += xswitch.o cdl.o snia_if.o \
- io.o machvec/ drivers/ platform_init/ sn2/ hwgfs/
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/io.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/pci/pic.h>
-#include "asm/sn/ioerror_handling.h"
-#include <asm/sn/xtalk/xbow.h>
-
-/* these get called directly in cdl_add_connpt in fops bypass hack */
-extern int xbow_attach(vertex_hdl_t);
-extern int pic_attach(vertex_hdl_t);
-
-/*
- * cdl: Connection and Driver List
- *
- * We are not porting this to Linux. Devices are registered via
- * the normal Linux PCI layer. This is a very simplified version
- * of cdl that will allow us to register and call our very own
- * IO Infrastructure Drivers e.g. pcibr.
- */
-
-#define MAX_SGI_IO_INFRA_DRVR 5
-
-static struct cdl sgi_infrastructure_drivers[MAX_SGI_IO_INFRA_DRVR] =
-{
- { PIC_WIDGET_PART_NUM_BUS0, PIC_WIDGET_MFGR_NUM, pic_attach /* &pcibr_fops */},
- { PIC_WIDGET_PART_NUM_BUS1, PIC_WIDGET_MFGR_NUM, pic_attach /* &pcibr_fops */},
- { XXBOW_WIDGET_PART_NUM, XXBOW_WIDGET_MFGR_NUM, xbow_attach /* &xbow_fops */},
- { XBOW_WIDGET_PART_NUM, XBOW_WIDGET_MFGR_NUM, xbow_attach /* &xbow_fops */},
- { PXBOW_WIDGET_PART_NUM, XXBOW_WIDGET_MFGR_NUM, xbow_attach /* &xbow_fops */},
-};
-
-/*
- * cdl_add_connpt: We found a device and it's connect point. Call the
- * attach routine of that driver.
- *
- * May need support for pciba registration here ...
- *
- * This routine use to create /hw/.id/pci/.../.. that links to
- * /hw/module/006c06/Pbrick/xtalk/15/pci/<slotnum> .. do we still need
- * it? The specified driver attach routine does not reference these
- * vertices.
- */
-int
-cdl_add_connpt(int part_num, int mfg_num,
- vertex_hdl_t connpt, int drv_flags)
-{
- int i;
-
- /*
- * Find the driver entry point and call the attach routine.
- */
- for (i = 0; i < MAX_SGI_IO_INFRA_DRVR; i++) {
- if ( (part_num == sgi_infrastructure_drivers[i].part_num) &&
- ( mfg_num == sgi_infrastructure_drivers[i].mfg_num) ) {
- /*
- * Call the device attach routines.
- */
- if (sgi_infrastructure_drivers[i].attach) {
- return(sgi_infrastructure_drivers[i].attach(connpt));
- }
- } else {
- continue;
- }
- }
-
- /* printk("WARNING: cdl_add_connpt: Driver not found for part_num 0x%x mfg_num 0x%x\n", part_num, mfg_num); */
-
- return (0);
-}
+++ /dev/null
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 2002-2003 Silicon Graphics, Inc. All Rights Reserved.
-#
-# Makefile for the sn2 io routines.
-
-obj-y += ioconfig_bus.o
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * ioconfig_bus - SGI's Persistent PCI Bus Numbering.
- *
- * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/ctype.h>
-#include <linux/module.h>
-#include <linux/init.h>
-
-#include <linux/pci.h>
-
-#include <asm/uaccess.h>
-#include <asm/sn/sgi.h>
-#include <asm/io.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/ioconfig_bus.h>
-
-#define SGI_IOCONFIG_BUS "SGI-PERSISTENT PCI BUS NUMBERING"
-#define SGI_IOCONFIG_BUS_VERSION "1.0"
-
-/*
- * Some Global definitions.
- */
-static vertex_hdl_t ioconfig_bus_handle;
-static unsigned long ioconfig_bus_debug;
-static struct ioconfig_parm parm;
-
-#ifdef IOCONFIG_BUS_DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-static u64 ioconfig_activated;
-static char ioconfig_kernopts[128];
-
-/*
- * For debugging purpose .. hardcode a table ..
- */
-struct ascii_moduleid *ioconfig_bus_table;
-
-static int free_entry;
-static int new_entry;
-
-int next_basebus_number;
-
-void
-ioconfig_get_busnum(char *io_moduleid, int *bus_num)
-{
- struct ascii_moduleid *temp;
- int index;
-
- DBG("ioconfig_get_busnum io_moduleid %s\n", io_moduleid);
-
- *bus_num = -1;
- temp = ioconfig_bus_table;
- if (!ioconfig_bus_table)
- return;
- for (index = 0; index < free_entry; temp++, index++) {
- if ( (io_moduleid[0] == temp->io_moduleid[0]) &&
- (io_moduleid[1] == temp->io_moduleid[1]) &&
- (io_moduleid[2] == temp->io_moduleid[2]) &&
- (io_moduleid[4] == temp->io_moduleid[4]) &&
- (io_moduleid[5] == temp->io_moduleid[5]) ) {
- *bus_num = index * 0x10;
- return;
- }
- }
-
- /*
- * New IO Brick encountered.
- */
- if (((int)io_moduleid[0]) == 0) {
- DBG("ioconfig_get_busnum: Invalid Module Id given %s\n", io_moduleid);
- return;
- }
-
- io_moduleid[3] = '#';
- strcpy((char *)&(ioconfig_bus_table[free_entry].io_moduleid), io_moduleid);
- *bus_num = free_entry * 0x10;
- free_entry++;
-}
-
-static void
-dump_ioconfig_table(void)
-{
-
- int index = 0;
- struct ascii_moduleid *temp;
-
- temp = ioconfig_bus_table;
- if (!temp) {
- DBG("ioconfig_bus_table tabel empty\n");
- return;
- }
- while (index < free_entry) {
- DBG("ASSCI Module ID %s\n", temp->io_moduleid);
- temp++;
- index++;
- }
-}
-
-/*
- * nextline
- * This routine returns the nextline in the buffer.
- */
-int nextline(char *buffer, char **next, char *line)
-{
-
- char *temp;
-
- if (buffer[0] == 0x0) {
- return(0);
- }
-
- temp = buffer;
- while (*temp != 0) {
- *line = *temp;
- if (*temp != '\n'){
- *line = *temp;
- temp++; line++;
- } else
- break;
- }
-
- if (*temp == 0)
- *next = temp;
- else
- *next = ++temp;
-
- return(1);
-}
-
-/*
- * build_pcibus_name
- * This routine parses the ioconfig contents read into
- * memory by ioconfig command in EFI and builds the
- * persistent pci bus naming table.
- */
-int
-build_moduleid_table(char *file_contents, struct ascii_moduleid *table)
-{
- /*
- * Read the whole file into memory.
- */
- int rc;
- char *name;
- char *temp;
- char *next;
- char *curr;
- char *line;
- struct ascii_moduleid *moduleid;
-
- line = kmalloc(256, GFP_KERNEL);
- name = kmalloc(125, GFP_KERNEL);
- if (!line || !name) {
- if (line)
- kfree(line);
- if (name)
- kfree(name);
- printk("build_moduleid_table(): Unabled to allocate memmory");
- return -ENOMEM;
- }
-
- memset(line, 0,256);
- memset(name, 0, 125);
- moduleid = table;
- curr = file_contents;
- while (nextline(curr, &next, line)){
-
- DBG("curr 0x%lx next 0x%lx\n", curr, next);
-
- temp = line;
- /*
- * Skip all leading Blank lines ..
- */
- while (isspace(*temp))
- if (*temp != '\n')
- temp++;
- else
- break;
-
- if (*temp == '\n') {
- curr = next;
- memset(line, 0, 256);
- continue;
- }
-
- /*
- * Skip comment lines
- */
- if (*temp == '#') {
- curr = next;
- memset(line, 0, 256);
- continue;
- }
-
- /*
- * Get the next free entry in the table.
- */
- rc = sscanf(temp, "%s", name);
- strcpy(&moduleid->io_moduleid[0], name);
- DBG("Found %s\n", name);
- moduleid++;
- free_entry++;
- curr = next;
- memset(line, 0, 256);
- }
-
- new_entry = free_entry;
- kfree(line);
- kfree(name);
-
- return 0;
-}
-
-int
-ioconfig_bus_init(void)
-{
-
- DBG("ioconfig_bus_init called.\n");
-
- ioconfig_bus_table = kmalloc( 512, GFP_KERNEL );
- if (!ioconfig_bus_table) {
- printk("ioconfig_bus_init : cannot allocate memory\n");
- return -1;
- }
-
- memset(ioconfig_bus_table, 0, 512);
-
- /*
- * If ioconfig options are given on the bootline .. take it.
- */
- if (*ioconfig_kernopts != '\0') {
- /*
- * ioconfig="..." kernel options given.
- */
- DBG("ioconfig_bus_init: Kernel Options given.\n");
- if ( build_moduleid_table((char *)ioconfig_kernopts, ioconfig_bus_table) < 0 )
- return -1;
- (void) dump_ioconfig_table();
- }
- return 0;
-}
-
-void
-ioconfig_bus_new_entries(void)
-{
- int index;
- struct ascii_moduleid *temp;
-
- if ((ioconfig_activated) && (free_entry > new_entry)) {
- printk("### Please add the following new IO Bricks Module ID \n");
- printk("### to your Persistent Bus Numbering Config File\n");
- } else
- return;
-
- index = new_entry;
- if (!ioconfig_bus_table) {
- printk("ioconfig_bus_table table is empty\n");
- return;
- }
- temp = &ioconfig_bus_table[index];
- while (index < free_entry) {
- printk("%s\n", (char *)temp);
- temp++;
- index++;
- }
- printk("### End\n");
-
-}
-static int ioconfig_bus_ioctl(struct inode * inode, struct file * file,
- unsigned int cmd, unsigned long arg)
-{
- /*
- * Copy in the parameters.
- */
- if (copy_from_user(&parm, (char *)arg, sizeof(struct ioconfig_parm)))
- return -EFAULT;
- parm.number = free_entry - new_entry;
- parm.ioconfig_activated = ioconfig_activated;
- if (copy_to_user((char *)arg, &parm, sizeof(struct ioconfig_parm)))
- return -EFAULT;
-
- if (!ioconfig_bus_table)
- return -EFAULT;
-
- if (copy_to_user((char *)parm.buffer, &ioconfig_bus_table[new_entry], sizeof(struct ascii_moduleid) * (free_entry - new_entry)))
- return -EFAULT;
-
- return 0;
-}
-
-/*
- * ioconfig_bus_open - Opens the special device node "/dev/hw/.ioconfig_bus".
- */
-static int ioconfig_bus_open(struct inode * inode, struct file * filp)
-{
- if (ioconfig_bus_debug) {
- DBG("ioconfig_bus_open called.\n");
- }
-
- return(0);
-
-}
-
-/*
- * ioconfig_bus_close - Closes the special device node "/dev/hw/.ioconfig_bus".
- */
-static int ioconfig_bus_close(struct inode * inode, struct file * filp)
-{
-
- if (ioconfig_bus_debug) {
- DBG("ioconfig_bus_close called.\n");
- }
-
- return(0);
-}
-
-struct file_operations ioconfig_bus_fops = {
- .ioctl = ioconfig_bus_ioctl,
- .open = ioconfig_bus_open, /* open */
- .release=ioconfig_bus_close /* release */
-};
-
-
-/*
- * init_ifconfig_bus() - Boot time initialization. Ensure that it is called
- * after hwgfs has been initialized.
- *
- */
-int init_ioconfig_bus(void)
-{
- ioconfig_bus_handle = hwgraph_register(hwgraph_root, ".ioconfig_bus",
- 0, 0,
- 0, 0,
- S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP, 0, 0,
- &ioconfig_bus_fops, NULL);
-
- if (ioconfig_bus_handle == NULL) {
- panic("Unable to create SGI PERSISTENT BUS NUMBERING Driver.\n");
- }
-
- return 0;
-}
-
-static int __init ioconfig_bus_setup (char *str)
-{
-
- char *temp;
-
- DBG("ioconfig_bus_setup: Kernel Options %s\n", str);
-
- temp = (char *)ioconfig_kernopts;
- memset(temp, 0, 128);
- while ( (*str != '\0') && !isspace (*str) ) {
- if (*str == ',') {
- *temp = '\n';
- temp++;
- str++;
- continue;
- }
- *temp = *str;
- temp++;
- str++;
- }
-
- return(0);
-
-}
-__setup("ioconfig=", ioconfig_bus_setup);
+++ /dev/null
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 2002-2003 Silicon Graphics, Inc. All Rights Reserved.
-#
-# Makefile for the sn2 io routines.
-
-obj-y += hcl.o labelcl.o hcl_util.o ramfs.o interface.o
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * hcl - SGI's Hardware Graph compatibility layer.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/config.h>
-#include <linux/slab.h>
-#include <linux/ctype.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/fs.h>
-#include <linux/string.h>
-#include <linux/sched.h> /* needed for smp_lock.h :( */
-#include <linux/smp_lock.h>
-#include <asm/sn/sgi.h>
-#include <asm/io.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/hwgfs.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/simulator.h>
-
-#define vertex_hdl_t hwgfs_handle_t
-
-vertex_hdl_t hwgraph_root;
-vertex_hdl_t linux_busnum;
-extern int pci_bus_cvlink_init(void);
-unsigned long hwgraph_debug_mask;
-
-/*
- * init_hcl() - Boot time initialization.
- *
- */
-int __init init_hcl(void)
-{
- extern void string_table_init(struct string_table *);
- extern struct string_table label_string_table;
- extern int init_ioconfig_bus(void);
- extern int init_hwgfs_fs(void);
- int rv = 0;
-
- init_hwgfs_fs();
-
- /*
- * Create the hwgraph_root.
- */
- rv = hwgraph_path_add(NULL, EDGE_LBL_HW, &hwgraph_root);
- if (rv) {
- printk("init_hcl: Failed to create hwgraph_root.\n");
- return -1;
- }
-
- /*
- * Initialize the HCL string table.
- */
-
- string_table_init(&label_string_table);
-
- /*
- * Create the directory that links Linux bus numbers to our Xwidget.
- */
- rv = hwgraph_path_add(hwgraph_root, EDGE_LBL_LINUX_BUS, &linux_busnum);
- if (linux_busnum == NULL) {
- printk("HCL: Unable to create %s\n", EDGE_LBL_LINUX_BUS);
- return -1;
- }
-
- if (pci_bus_cvlink_init() < 0 ) {
- printk("init_hcl: Failed to create pcibus cvlink.\n");
- return -1;
- }
-
- /*
- * Persistent Naming.
- */
- init_ioconfig_bus();
-
- return 0;
-}
-
-/*
- * Get device specific "fast information".
- *
- */
-arbitrary_info_t
-hwgraph_fastinfo_get(vertex_hdl_t de)
-{
- arbitrary_info_t fastinfo;
- int rv;
-
- if (!de) {
- printk(KERN_WARNING "HCL: hwgraph_fastinfo_get handle given is NULL.\n");
- dump_stack();
- return(-1);
- }
-
- rv = labelcl_info_get_IDX(de, HWGRAPH_FASTINFO, &fastinfo);
- if (rv == 0)
- return(fastinfo);
-
- return(0);
-}
-
-
-/*
- * hwgraph_connectpt_get: Returns the entry's connect point.
- *
- */
-vertex_hdl_t
-hwgraph_connectpt_get(vertex_hdl_t de)
-{
- int rv;
- arbitrary_info_t info;
- vertex_hdl_t connect;
-
- rv = labelcl_info_get_IDX(de, HWGRAPH_CONNECTPT, &info);
- if (rv != 0) {
- return(NULL);
- }
-
- connect = (vertex_hdl_t)info;
- return(connect);
-
-}
-
-
-/*
- * hwgraph_mk_dir - Creates a directory entry.
- */
-vertex_hdl_t
-hwgraph_mk_dir(vertex_hdl_t de, const char *name,
- unsigned int namelen, void *info)
-{
-
- int rv;
- labelcl_info_t *labelcl_info = NULL;
- vertex_hdl_t new_handle = NULL;
- vertex_hdl_t parent = NULL;
-
- /*
- * Create the device info structure for hwgraph compatiblity support.
- */
- labelcl_info = labelcl_info_create();
- if (!labelcl_info)
- return(NULL);
-
- /*
- * Create an entry.
- */
- new_handle = hwgfs_mk_dir(de, name, (void *)labelcl_info);
- if (!new_handle) {
- labelcl_info_destroy(labelcl_info);
- return(NULL);
- }
-
- /*
- * Get the parent handle.
- */
- parent = hwgfs_get_parent (new_handle);
-
- /*
- * To provide the same semantics as the hwgraph, set the connect point.
- */
- rv = hwgraph_connectpt_set(new_handle, parent);
- if (!rv) {
- /*
- * We need to clean up!
- */
- }
-
- /*
- * If the caller provides a private data pointer, save it in the
- * labelcl info structure(fastinfo). This can be retrieved via
- * hwgraph_fastinfo_get()
- */
- if (info)
- hwgraph_fastinfo_set(new_handle, (arbitrary_info_t)info);
-
- return(new_handle);
-
-}
-
-/*
- * hwgraph_path_add - Create a directory node with the given path starting
- * from the given fromv.
- */
-int
-hwgraph_path_add(vertex_hdl_t fromv,
- char *path,
- vertex_hdl_t *new_de)
-{
-
- unsigned int namelen = strlen(path);
- int rv;
-
- /*
- * We need to handle the case when fromv is NULL ..
- * in this case we need to create the path from the
- * hwgraph root!
- */
- if (fromv == NULL)
- fromv = hwgraph_root;
-
- /*
- * check the entry doesn't already exist, if it does
- * then we simply want new_de to point to it (otherwise
- * we'll overwrite the existing labelcl_info struct)
- */
- rv = hwgraph_edge_get(fromv, path, new_de);
- if (rv) { /* couldn't find entry so we create it */
- *new_de = hwgraph_mk_dir(fromv, path, namelen, NULL);
- if (new_de == NULL)
- return(-1);
- else
- return(0);
- }
- else
- return(0);
-
-}
-
-/*
- * hwgraph_register - Creates a special device file.
- *
- */
-vertex_hdl_t
-hwgraph_register(vertex_hdl_t de, const char *name,
- unsigned int namelen, unsigned int flags,
- unsigned int major, unsigned int minor,
- umode_t mode, uid_t uid, gid_t gid,
- struct file_operations *fops,
- void *info)
-{
-
- vertex_hdl_t new_handle = NULL;
-
- /*
- * Create an entry.
- */
- new_handle = hwgfs_register(de, name, flags, major,
- minor, mode, fops, info);
-
- return(new_handle);
-
-}
-
-
-/*
- * hwgraph_mk_symlink - Create a symbolic link.
- */
-int
-hwgraph_mk_symlink(vertex_hdl_t de, const char *name, unsigned int namelen,
- unsigned int flags, const char *link, unsigned int linklen,
- vertex_hdl_t *handle, void *info)
-{
-
- void *labelcl_info = NULL;
- int status = 0;
- vertex_hdl_t new_handle = NULL;
-
- /*
- * Create the labelcl info structure for hwgraph compatiblity support.
- */
- labelcl_info = labelcl_info_create();
- if (!labelcl_info)
- return(-1);
-
- /*
- * Create a symbolic link.
- */
- status = hwgfs_mk_symlink(de, name, flags, link,
- &new_handle, labelcl_info);
- if ( (!new_handle) || (!status) ){
- labelcl_info_destroy((labelcl_info_t *)labelcl_info);
- return(-1);
- }
-
- /*
- * If the caller provides a private data pointer, save it in the
- * labelcl info structure(fastinfo). This can be retrieved via
- * hwgraph_fastinfo_get()
- */
- if (info)
- hwgraph_fastinfo_set(new_handle, (arbitrary_info_t)info);
-
- *handle = new_handle;
- return(0);
-
-}
-
-/*
- * hwgraph_vertex_destroy - Destroy the entry
- */
-int
-hwgraph_vertex_destroy(vertex_hdl_t de)
-{
-
- void *labelcl_info = NULL;
-
- labelcl_info = hwgfs_get_info(de);
- hwgfs_unregister(de);
-
- if (labelcl_info)
- labelcl_info_destroy((labelcl_info_t *)labelcl_info);
-
- return(0);
-}
-
-int
-hwgraph_edge_add(vertex_hdl_t from, vertex_hdl_t to, char *name)
-{
-
- char *path, *link;
- char *s1;
- char *index;
- vertex_hdl_t handle = NULL;
- int rv;
- int i, count;
-
- path = kmalloc(1024, GFP_KERNEL);
- if (!path)
- return -ENOMEM;
- memset((char *)path, 0x0, 1024);
- link = kmalloc(1024, GFP_KERNEL);
- if (!link) {
- kfree(path);
- return -ENOMEM;
- }
- memset((char *)link, 0x0, 1024);
-
- i = hwgfs_generate_path (from, path, 1024);
- s1 = (char *)path;
- count = 0;
- while (1) {
- index = strstr (s1, "/");
- if (index) {
- count++;
- s1 = ++index;
- } else {
- count++;
- break;
- }
- }
-
- for (i = 0; i < count; i++) {
- strcat((char *)link,"../");
- }
-
- memset(path, 0x0, 1024);
- i = hwgfs_generate_path (to, path, 1024);
- strcat((char *)link, (char *)path);
-
- /*
- * Otherwise, just create a symlink to the vertex.
- * In this case the vertex was previous created with a REAL pathname.
- */
- rv = hwgfs_mk_symlink (from, (const char *)name,
- 0, link,
- &handle, NULL);
- kfree(path);
- kfree(link);
-
- return(rv);
-
-
-}
-
-/* ARGSUSED */
-int
-hwgraph_edge_get(vertex_hdl_t from, char *name, vertex_hdl_t *toptr)
-{
-
- vertex_hdl_t target_handle = NULL;
-
- if (name == NULL)
- return(-1);
-
- if (toptr == NULL)
- return(-1);
-
- /*
- * If the name is "." just return the current entry handle.
- */
- if (!strcmp(name, HWGRAPH_EDGELBL_DOT)) {
- if (toptr) {
- *toptr = from;
- }
- } else if (!strcmp(name, HWGRAPH_EDGELBL_DOTDOT)) {
- /*
- * Hmmm .. should we return the connect point or parent ..
- * see in hwgraph, the concept of parent is the connectpt!
- *
- * Maybe we should see whether the connectpt is set .. if
- * not just return the parent!
- */
- target_handle = hwgraph_connectpt_get(from);
- if (target_handle) {
- /*
- * Just return the connect point.
- */
- *toptr = target_handle;
- return(0);
- }
- target_handle = hwgfs_get_parent(from);
- *toptr = target_handle;
-
- } else {
- target_handle = hwgfs_find_handle (from, name, 0, 0,
- 0, 1); /* Yes traverse symbolic links */
- }
-
- if (target_handle == NULL)
- return(-1);
- else
- *toptr = target_handle;
-
- return(0);
-}
-
-/*
- * hwgraph_info_add_LBL - Adds a new label for the device. Mark the info_desc
- * of the label as INFO_DESC_PRIVATE and store the info in the label.
- */
-/* ARGSUSED */
-int
-hwgraph_info_add_LBL( vertex_hdl_t de,
- char *name,
- arbitrary_info_t info)
-{
- return(labelcl_info_add_LBL(de, name, INFO_DESC_PRIVATE, info));
-}
-
-/*
- * hwgraph_info_remove_LBL - Remove the label entry for the device.
- */
-/* ARGSUSED */
-int
-hwgraph_info_remove_LBL( vertex_hdl_t de,
- char *name,
- arbitrary_info_t *old_info)
-{
- return(labelcl_info_remove_LBL(de, name, NULL, old_info));
-}
-
-/*
- * hwgraph_info_replace_LBL - replaces an existing label with
- * a new label info value.
- */
-/* ARGSUSED */
-int
-hwgraph_info_replace_LBL( vertex_hdl_t de,
- char *name,
- arbitrary_info_t info,
- arbitrary_info_t *old_info)
-{
- return(labelcl_info_replace_LBL(de, name,
- INFO_DESC_PRIVATE, info,
- NULL, old_info));
-}
-/*
- * hwgraph_info_get_LBL - Get and return the info value in the label of the
- * device.
- */
-/* ARGSUSED */
-int
-hwgraph_info_get_LBL(vertex_hdl_t de,
- char *name,
- arbitrary_info_t *infop)
-{
- return(labelcl_info_get_LBL(de, name, NULL, infop));
-}
-
-/*
- * hwgraph_info_get_exported_LBL - Retrieve the info_desc and info pointer
- * of the given label for the device. The weird thing is that the label
- * that matches the name is return irrespective of the info_desc value!
- * Do not understand why the word "exported" is used!
- */
-/* ARGSUSED */
-int
-hwgraph_info_get_exported_LBL(vertex_hdl_t de,
- char *name,
- int *export_info,
- arbitrary_info_t *infop)
-{
- int rc;
- arb_info_desc_t info_desc;
-
- rc = labelcl_info_get_LBL(de, name, &info_desc, infop);
- if (rc == 0)
- *export_info = (int)info_desc;
-
- return(rc);
-}
-
-/*
- * hwgraph_info_get_next_LBL - Returns the next label info given the
- * current label entry in place.
- *
- * Once again this has no locking or reference count for protection.
- *
- */
-/* ARGSUSED */
-int
-hwgraph_info_get_next_LBL(vertex_hdl_t de,
- char *buf,
- arbitrary_info_t *infop,
- labelcl_info_place_t *place)
-{
- return(labelcl_info_get_next_LBL(de, buf, NULL, infop, place));
-}
-
-/*
- * hwgraph_info_export_LBL - Retrieve the specified label entry and modify
- * the info_desc field with the given value in nbytes.
- */
-/* ARGSUSED */
-int
-hwgraph_info_export_LBL(vertex_hdl_t de, char *name, int nbytes)
-{
- arbitrary_info_t info;
- int rc;
-
- if (nbytes == 0)
- nbytes = INFO_DESC_EXPORT;
-
- if (nbytes < 0)
- return(-1);
-
- rc = labelcl_info_get_LBL(de, name, NULL, &info);
- if (rc != 0)
- return(rc);
-
- rc = labelcl_info_replace_LBL(de, name,
- nbytes, info, NULL, NULL);
-
- return(rc);
-}
-
-/*
- * hwgraph_info_unexport_LBL - Retrieve the given label entry and change the
- * label info_descr filed to INFO_DESC_PRIVATE.
- */
-/* ARGSUSED */
-int
-hwgraph_info_unexport_LBL(vertex_hdl_t de, char *name)
-{
- arbitrary_info_t info;
- int rc;
-
- rc = labelcl_info_get_LBL(de, name, NULL, &info);
- if (rc != 0)
- return(rc);
-
- rc = labelcl_info_replace_LBL(de, name,
- INFO_DESC_PRIVATE, info, NULL, NULL);
-
- return(rc);
-}
-
-/*
- * hwgraph_traverse - Find and return the handle starting from de.
- *
- */
-graph_error_t
-hwgraph_traverse(vertex_hdl_t de, char *path, vertex_hdl_t *found)
-{
- /*
- * get the directory entry (path should end in a directory)
- */
-
- *found = hwgfs_find_handle(de, /* start dir */
- path, /* path */
- 0, /* major */
- 0, /* minor */
- 0, /* char | block */
- 1); /* traverse symlinks */
- if (*found == NULL)
- return(GRAPH_NOT_FOUND);
- else
- return(GRAPH_SUCCESS);
-}
-
-/*
- * Find the canonical name for a given vertex by walking back through
- * connectpt's until we hit the hwgraph root vertex (or until we run
- * out of buffer space or until something goes wrong).
- *
- * COMPATIBILITY FUNCTIONALITY
- * Walks back through 'parents', not necessarily the same as connectpts.
- *
- * Need to resolve the fact that does not return the path from
- * "/" but rather it just stops right before /dev ..
- */
-int
-hwgraph_vertex_name_get(vertex_hdl_t vhdl, char *buf, unsigned int buflen)
-{
- char *locbuf;
- int pos;
-
- if (buflen < 1)
- return(-1); /* XXX should be GRAPH_BAD_PARAM ? */
-
- locbuf = kmalloc(buflen, GFP_KERNEL);
-
- pos = hwgfs_generate_path(vhdl, locbuf, buflen);
- if (pos < 0) {
- kfree(locbuf);
- return pos;
- }
-
- strcpy(buf, &locbuf[pos]);
- kfree(locbuf);
- return 0;
-}
-
-/*
-** vertex_to_name converts a vertex into a canonical name by walking
-** back through connect points until we hit the hwgraph root (or until
-** we run out of buffer space).
-**
-** Usually returns a pointer to the original buffer, filled in as
-** appropriate. If the buffer is too small to hold the entire name,
-** or if anything goes wrong while determining the name, vertex_to_name
-** returns "UnknownDevice".
-*/
-
-#define DEVNAME_UNKNOWN "UnknownDevice"
-
-char *
-vertex_to_name(vertex_hdl_t vhdl, char *buf, unsigned int buflen)
-{
- if (hwgraph_vertex_name_get(vhdl, buf, buflen) == GRAPH_SUCCESS)
- return(buf);
- else
- return(DEVNAME_UNKNOWN);
-}
-
-
-void
-hwgraph_debug(char *file, const char * function, int line, vertex_hdl_t vhdl1, vertex_hdl_t vhdl2, char *format, ...)
-{
-
- int pos;
- char *hwpath;
- va_list ap;
-
- if ( !hwgraph_debug_mask )
- return;
-
- hwpath = kmalloc(MAXDEVNAME, GFP_KERNEL);
- if (!hwpath) {
- printk("HWGRAPH_DEBUG kmalloc fails at %d ", __LINE__);
- return;
- }
-
- printk("HWGRAPH_DEBUG %s %s %d : ", file, function, line);
-
- if (vhdl1){
- memset(hwpath, 0, MAXDEVNAME);
- pos = hwgfs_generate_path(vhdl1, hwpath, MAXDEVNAME);
- printk("vhdl1 = %s : ", &hwpath[pos]);
- }
-
- if (vhdl2){
- memset(hwpath, 0, MAXDEVNAME);
- pos = hwgfs_generate_path(vhdl2, hwpath, MAXDEVNAME);
- printk("vhdl2 = %s :", &hwpath[pos]);
- }
-
- memset(hwpath, 0, MAXDEVNAME);
- va_start(ap, format);
- vsnprintf(hwpath, 500, format, ap);
- va_end(ap);
- hwpath[MAXDEVNAME -1] = (char)0; /* Just in case. */
- printk(" %s", hwpath);
- kfree(hwpath);
-}
-
-EXPORT_SYMBOL(hwgraph_mk_dir);
-EXPORT_SYMBOL(hwgraph_path_add);
-EXPORT_SYMBOL(hwgraph_register);
-EXPORT_SYMBOL(hwgraph_vertex_destroy);
-EXPORT_SYMBOL(hwgraph_fastinfo_get);
-EXPORT_SYMBOL(hwgraph_connectpt_get);
-EXPORT_SYMBOL(hwgraph_info_add_LBL);
-EXPORT_SYMBOL(hwgraph_info_remove_LBL);
-EXPORT_SYMBOL(hwgraph_info_replace_LBL);
-EXPORT_SYMBOL(hwgraph_info_get_LBL);
-EXPORT_SYMBOL(hwgraph_info_get_exported_LBL);
-EXPORT_SYMBOL(hwgraph_info_get_next_LBL);
-EXPORT_SYMBOL(hwgraph_info_export_LBL);
-EXPORT_SYMBOL(hwgraph_info_unexport_LBL);
-EXPORT_SYMBOL(hwgraph_traverse);
-EXPORT_SYMBOL(hwgraph_vertex_name_get);
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <asm/sn/sgi.h>
-#include <asm/io.h>
-#include <asm/sn/io.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/hwgfs.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/hcl_util.h>
-#include <asm/sn/nodepda.h>
-
-static vertex_hdl_t hwgraph_all_cnodes = GRAPH_VERTEX_NONE;
-extern vertex_hdl_t hwgraph_root;
-static vertex_hdl_t hwgraph_all_cpuids = GRAPH_VERTEX_NONE;
-extern int maxcpus;
-
-void
-mark_cpuvertex_as_cpu(vertex_hdl_t vhdl, cpuid_t cpuid)
-{
- char cpuid_buffer[10];
-
- if (cpuid == CPU_NONE)
- return;
-
- if (hwgraph_all_cpuids == GRAPH_VERTEX_NONE) {
- (void)hwgraph_path_add( hwgraph_root,
- EDGE_LBL_CPUNUM,
- &hwgraph_all_cpuids);
- }
-
- sprintf(cpuid_buffer, "%ld", cpuid);
- (void)hwgraph_edge_add( hwgraph_all_cpuids, vhdl, cpuid_buffer);
-}
-
-/*
-** Return the "master" for a given vertex. A master vertex is a
-** controller or adapter or other piece of hardware that the given
-** vertex passes through on the way to the rest of the system.
-*/
-vertex_hdl_t
-device_master_get(vertex_hdl_t vhdl)
-{
- graph_error_t rc;
- vertex_hdl_t master;
-
- rc = hwgraph_edge_get(vhdl, EDGE_LBL_MASTER, &master);
- if (rc == GRAPH_SUCCESS)
- return(master);
- else
- return(GRAPH_VERTEX_NONE);
-}
-
-/*
-** Set the master for a given vertex.
-** Returns 0 on success, non-0 indicates failure
-*/
-int
-device_master_set(vertex_hdl_t vhdl, vertex_hdl_t master)
-{
- graph_error_t rc;
-
- rc = hwgraph_edge_add(vhdl, master, EDGE_LBL_MASTER);
- return(rc != GRAPH_SUCCESS);
-}
-
-
-/*
-** Return the compact node id of the node that ultimately "owns" the specified
-** vertex. In order to do this, we walk back through masters and connect points
-** until we reach a vertex that represents a node.
-*/
-cnodeid_t
-master_node_get(vertex_hdl_t vhdl)
-{
- cnodeid_t cnodeid;
- vertex_hdl_t master;
-
- for (;;) {
- cnodeid = nodevertex_to_cnodeid(vhdl);
- if (cnodeid != CNODEID_NONE)
- return(cnodeid);
-
- master = device_master_get(vhdl);
-
- /* Check for exceptional cases */
- if (master == vhdl) {
- /* Since we got a reference to the "master" thru
- * device_master_get() we should decrement
- * its reference count by 1
- */
- return(CNODEID_NONE);
- }
-
- if (master == GRAPH_VERTEX_NONE) {
- master = hwgraph_connectpt_get(vhdl);
- if ((master == GRAPH_VERTEX_NONE) ||
- (master == vhdl)) {
- return(CNODEID_NONE);
- }
- }
-
- vhdl = master;
- }
-}
-
-
-/*
-** If the specified device represents a node, return its
-** compact node ID; otherwise, return CNODEID_NONE.
-*/
-cnodeid_t
-nodevertex_to_cnodeid(vertex_hdl_t vhdl)
-{
- int rv = 0;
- arbitrary_info_t cnodeid = CNODEID_NONE;
-
- rv = labelcl_info_get_LBL(vhdl, INFO_LBL_CNODEID, NULL, &cnodeid);
-
- return((cnodeid_t)cnodeid);
-}
-
-void
-mark_nodevertex_as_node(vertex_hdl_t vhdl, cnodeid_t cnodeid)
-{
- if (cnodeid == CNODEID_NONE)
- return;
-
- cnodeid_to_vertex(cnodeid) = vhdl;
- labelcl_info_add_LBL(vhdl, INFO_LBL_CNODEID, INFO_DESC_EXPORT,
- (arbitrary_info_t)cnodeid);
-
- {
- char cnodeid_buffer[10];
-
- if (hwgraph_all_cnodes == GRAPH_VERTEX_NONE) {
- (void)hwgraph_path_add( hwgraph_root,
- EDGE_LBL_NODENUM,
- &hwgraph_all_cnodes);
- }
-
- sprintf(cnodeid_buffer, "%d", cnodeid);
- (void)hwgraph_edge_add( hwgraph_all_cnodes,
- vhdl,
- cnodeid_buffer);
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, hwgraph_all_cnodes, NULL, "Creating path vhdl1\n");
- }
-}
-
-/*
-** dev_to_name converts a vertex_hdl_t into a canonical name. If the vertex_hdl_t
-** represents a vertex in the hardware graph, it is converted in the
-** normal way for vertices. If the vertex_hdl_t is an old vertex_hdl_t (one which
-** does not represent a hwgraph vertex), we synthesize a name based
-** on major/minor number.
-**
-** Usually returns a pointer to the original buffer, filled in as
-** appropriate. If the buffer is too small to hold the entire name,
-** or if anything goes wrong while determining the name, dev_to_name
-** returns "UnknownDevice".
-*/
-char *
-dev_to_name(vertex_hdl_t dev, char *buf, uint buflen)
-{
- return(vertex_to_name(dev, buf, buflen));
-}
-
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * Portions based on Adam Richter's smalldevfs and thus
- * Copyright 2002-2003 Yggdrasil Computing, Inc.
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/fs.h>
-#include <linux/mount.h>
-#include <linux/namei.h>
-#include <linux/string.h>
-#include <linux/slab.h>
-#include <asm/sn/hwgfs.h>
-
-
-extern struct vfsmount *hwgfs_vfsmount;
-
-static int
-walk_parents_mkdir(
- const char **path,
- struct nameidata *nd,
- int is_dir)
-{
- char *slash;
- char buf[strlen(*path)+1];
- int error;
-
- while ((slash = strchr(*path, '/')) != NULL) {
- int len = slash - *path;
- memcpy(buf, *path, len);
- buf[len] = '\0';
-
- error = path_walk(buf, nd);
- if (unlikely(error))
- return error;
-
- nd->dentry = lookup_create(nd, is_dir);
- nd->flags |= LOOKUP_PARENT;
- if (IS_ERR(nd->dentry))
- return PTR_ERR(nd->dentry);
-
- if (!nd->dentry->d_inode)
- error = vfs_mkdir(nd->dentry->d_parent->d_inode,
- nd->dentry, 0755);
-
- up(&nd->dentry->d_parent->d_inode->i_sem);
- if (unlikely(error))
- return error;
-
- *path += len + 1;
- }
-
- return 0;
-}
-
-/* On success, returns with parent_inode->i_sem taken. */
-static int
-hwgfs_decode(
- hwgfs_handle_t dir,
- const char *name,
- int is_dir,
- struct inode **parent_inode,
- struct dentry **dentry)
-{
- struct nameidata nd;
- int error;
-
- if (!dir)
- dir = hwgfs_vfsmount->mnt_sb->s_root;
-
- memset(&nd, 0, sizeof(nd));
- nd.flags = LOOKUP_PARENT;
- nd.mnt = mntget(hwgfs_vfsmount);
- nd.dentry = dget(dir);
-
- error = walk_parents_mkdir(&name, &nd, is_dir);
- if (unlikely(error))
- return error;
-
- error = path_walk(name, &nd);
- if (unlikely(error))
- return error;
-
- *dentry = lookup_create(&nd, is_dir);
-
- if (IS_ERR(*dentry))
- return PTR_ERR(*dentry);
- *parent_inode = (*dentry)->d_parent->d_inode;
- return 0;
-}
-
-static int
-path_len(
- struct dentry *de,
- struct dentry *root)
-{
- int len = 0;
-
- while (de != root) {
- len += de->d_name.len + 1; /* count the '/' */
- de = de->d_parent;
- }
- return len; /* -1 because we omit the leading '/',
- +1 because we include trailing '\0' */
-}
-
-int
-hwgfs_generate_path(
- hwgfs_handle_t de,
- char *path,
- int buflen)
-{
- struct dentry *hwgfs_root;
- int len;
- char *path_orig = path;
-
- if (unlikely(de == NULL))
- return -EINVAL;
-
- hwgfs_root = hwgfs_vfsmount->mnt_sb->s_root;
- if (unlikely(de == hwgfs_root))
- return -EINVAL;
-
- spin_lock(&dcache_lock);
- len = path_len(de, hwgfs_root);
- if (len > buflen) {
- spin_unlock(&dcache_lock);
- return -ENAMETOOLONG;
- }
-
- path += len - 1;
- *path = '\0';
-
- for (;;) {
- path -= de->d_name.len;
- memcpy(path, de->d_name.name, de->d_name.len);
- de = de->d_parent;
- if (de == hwgfs_root)
- break;
- *(--path) = '/';
- }
-
- spin_unlock(&dcache_lock);
- BUG_ON(path != path_orig);
- return 0;
-}
-
-hwgfs_handle_t
-hwgfs_register(
- hwgfs_handle_t dir,
- const char *name,
- unsigned int flags,
- unsigned int major,
- unsigned int minor,
- umode_t mode,
- void *ops,
- void *info)
-{
- dev_t devnum = MKDEV(major, minor);
- struct inode *parent_inode;
- struct dentry *dentry;
- int error;
-
- error = hwgfs_decode(dir, name, 0, &parent_inode, &dentry);
- if (likely(!error)) {
- error = vfs_mknod(parent_inode, dentry, mode, devnum);
- if (likely(!error)) {
- /*
- * Do this inside parents i_sem to avoid racing
- * with lookups.
- */
- if (S_ISCHR(mode))
- dentry->d_inode->i_fop = ops;
- dentry->d_fsdata = info;
- up(&parent_inode->i_sem);
- } else {
- up(&parent_inode->i_sem);
- dput(dentry);
- dentry = NULL;
- }
- }
-
- return dentry;
-}
-
-int
-hwgfs_mk_symlink(
- hwgfs_handle_t dir,
- const char *name,
- unsigned int flags,
- const char *link,
- hwgfs_handle_t *handle,
- void *info)
-{
- struct inode *parent_inode;
- struct dentry *dentry;
- int error;
-
- error = hwgfs_decode(dir, name, 0, &parent_inode, &dentry);
- if (likely(!error)) {
- error = vfs_symlink(parent_inode, dentry, link, S_IALLUGO);
- dentry->d_fsdata = info;
- if (handle)
- *handle = dentry;
- up(&parent_inode->i_sem);
- /* dput(dentry); */
- }
- return error;
-}
-
-hwgfs_handle_t
-hwgfs_mk_dir(
- hwgfs_handle_t dir,
- const char *name,
- void *info)
-{
- struct inode *parent_inode;
- struct dentry *dentry;
- int error;
-
- error = hwgfs_decode(dir, name, 1, &parent_inode, &dentry);
- if (likely(!error)) {
- error = vfs_mkdir(parent_inode, dentry, 0755);
- up(&parent_inode->i_sem);
-
- if (unlikely(error)) {
- dput(dentry);
- dentry = NULL;
- } else {
- dentry->d_fsdata = info;
- }
- }
- return dentry;
-}
-
-void
-hwgfs_unregister(
- hwgfs_handle_t de)
-{
- struct inode *parent_inode = de->d_parent->d_inode;
-
- if (S_ISDIR(de->d_inode->i_mode))
- vfs_rmdir(parent_inode, de);
- else
- vfs_unlink(parent_inode, de);
-}
-
-/* XXX: this function is utterly bogus. Every use of it is racy and the
- prototype is stupid. You have been warned. --hch. */
-hwgfs_handle_t
-hwgfs_find_handle(
- hwgfs_handle_t base,
- const char *name,
- unsigned int major, /* IGNORED */
- unsigned int minor, /* IGNORED */
- char type, /* IGNORED */
- int traverse_symlinks)
-{
- struct dentry *dentry = NULL;
- struct nameidata nd;
- int error;
-
- BUG_ON(*name=='/');
-
- memset(&nd, 0, sizeof(nd));
-
- nd.mnt = mntget(hwgfs_vfsmount);
- nd.dentry = dget(base ? base : hwgfs_vfsmount->mnt_sb->s_root);
- nd.flags = (traverse_symlinks ? LOOKUP_FOLLOW : 0);
-
- error = path_walk(name, &nd);
- if (likely(!error)) {
- dentry = nd.dentry;
- path_release(&nd); /* stale data from here! */
- }
-
- return dentry;
-}
-
-hwgfs_handle_t
-hwgfs_get_parent(
- hwgfs_handle_t de)
-{
- struct dentry *parent;
-
- spin_lock(&de->d_lock);
- parent = de->d_parent;
- spin_unlock(&de->d_lock);
-
- return parent;
-}
-
-int
-hwgfs_set_info(
- hwgfs_handle_t de,
- void *info)
-{
- if (unlikely(de == NULL))
- return -EINVAL;
- de->d_fsdata = info;
- return 0;
-}
-
-void *
-hwgfs_get_info(
- hwgfs_handle_t de)
-{
- return de->d_fsdata;
-}
-
-EXPORT_SYMBOL(hwgfs_generate_path);
-EXPORT_SYMBOL(hwgfs_register);
-EXPORT_SYMBOL(hwgfs_unregister);
-EXPORT_SYMBOL(hwgfs_mk_symlink);
-EXPORT_SYMBOL(hwgfs_mk_dir);
-EXPORT_SYMBOL(hwgfs_find_handle);
-EXPORT_SYMBOL(hwgfs_get_parent);
-EXPORT_SYMBOL(hwgfs_set_info);
-EXPORT_SYMBOL(hwgfs_get_info);
+++ /dev/null
-/* labelcl - SGI's Hwgraph Compatibility Layer.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2001-2003 Silicon Graphics, Inc. All rights reserved.
-*/
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/kernel.h>
-#include <linux/fs.h>
-#include <linux/string.h>
-#include <linux/sched.h> /* needed for smp_lock.h :( */
-#include <linux/smp_lock.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/hwgfs.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-
-/*
-** Very simple and dumb string table that supports only find/insert.
-** In practice, if this table gets too large, we may need a more
-** efficient data structure. Also note that currently there is no
-** way to delete an item once it's added. Therefore, name collision
-** will return an error.
-*/
-
-struct string_table label_string_table;
-
-
-
-/*
- * string_table_init - Initialize the given string table.
- */
-void
-string_table_init(struct string_table *string_table)
-{
- string_table->string_table_head = NULL;
- string_table->string_table_generation = 0;
-
- /*
- * We nedd to initialize locks here!
- */
-
- return;
-}
-
-
-/*
- * string_table_destroy - Destroy the given string table.
- */
-void
-string_table_destroy(struct string_table *string_table)
-{
- struct string_table_item *item, *next_item;
-
- item = string_table->string_table_head;
- while (item) {
- next_item = item->next;
-
- STRTBL_FREE(item);
- item = next_item;
- }
-
- /*
- * We need to destroy whatever lock we have here
- */
-
- return;
-}
-
-
-
-/*
- * string_table_insert - Insert an entry in the string table .. duplicate
- * names are not allowed.
- */
-char *
-string_table_insert(struct string_table *string_table, char *name)
-{
- struct string_table_item *item, *new_item = NULL, *last_item = NULL;
-
-again:
- /*
- * Need to lock the table ..
- */
- item = string_table->string_table_head;
- last_item = NULL;
-
- while (item) {
- if (!strcmp(item->string, name)) {
- /*
- * If we allocated space for the string and the found that
- * someone else already entered it into the string table,
- * free the space we just allocated.
- */
- if (new_item)
- STRTBL_FREE(new_item);
-
-
- /*
- * Search optimization: move the found item to the head
- * of the list.
- */
- if (last_item != NULL) {
- last_item->next = item->next;
- item->next = string_table->string_table_head;
- string_table->string_table_head = item;
- }
- goto out;
- }
- last_item = item;
- item=item->next;
- }
-
- /*
- * name was not found, so add it to the string table.
- */
- if (new_item == NULL) {
- long old_generation = string_table->string_table_generation;
-
- new_item = STRTBL_ALLOC(strlen(name));
-
- strcpy(new_item->string, name);
-
- /*
- * While we allocated memory for the new string, someone else
- * changed the string table.
- */
- if (old_generation != string_table->string_table_generation) {
- goto again;
- }
- } else {
- /* At this we only have the string table lock in access mode.
- * Promote the access lock to an update lock for the string
- * table insertion below.
- */
- long old_generation =
- string_table->string_table_generation;
-
- /*
- * After we did the unlock and wer waiting for update
- * lock someone could have potentially updated
- * the string table. Check the generation number
- * for this case. If it is the case we have to
- * try all over again.
- */
- if (old_generation !=
- string_table->string_table_generation) {
- goto again;
- }
- }
-
- /*
- * At this point, we're committed to adding new_item to the string table.
- */
- new_item->next = string_table->string_table_head;
- item = string_table->string_table_head = new_item;
- string_table->string_table_generation++;
-
-out:
- /*
- * Need to unlock here.
- */
- return(item->string);
-}
-
-/*
- * labelcl_info_create - Creates the data structure that will hold the
- * device private information asscoiated with a entry.
- * The pointer to this structure is what gets stored in the
- * (void * info).
- */
-labelcl_info_t *
-labelcl_info_create()
-{
-
- labelcl_info_t *new = NULL;
-
- /* Initial allocation does not include any area for labels */
- if ( ( new = (labelcl_info_t *)kmalloc (sizeof(labelcl_info_t), GFP_KERNEL) ) == NULL )
- return NULL;
-
- memset (new, 0, sizeof(labelcl_info_t));
- new->hwcl_magic = LABELCL_MAGIC;
- return( new);
-
-}
-
-/*
- * labelcl_info_destroy - Frees the data structure that holds the
- * device private information asscoiated with a entry. This
- * data structure was created by device_info_create().
- *
- * The caller is responsible for nulling the (void *info) in the
- * corresponding entry.
- */
-int
-labelcl_info_destroy(labelcl_info_t *labelcl_info)
-{
-
- if (labelcl_info == NULL)
- return(0);
-
- /* Free the label list */
- if (labelcl_info->label_list)
- kfree(labelcl_info->label_list);
-
- /* Now free the label info area */
- labelcl_info->hwcl_magic = 0;
- kfree(labelcl_info);
-
- return(0);
-}
-
-/*
- * labelcl_info_add_LBL - Adds a new label entry in the labelcl info
- * structure.
- *
- * Error is returned if we find another label with the same name.
- */
-int
-labelcl_info_add_LBL(vertex_hdl_t de,
- char *info_name,
- arb_info_desc_t info_desc,
- arbitrary_info_t info)
-{
- labelcl_info_t *labelcl_info = NULL;
- int num_labels;
- int new_label_list_size;
- label_info_t *old_label_list, *new_label_list = NULL;
- char *name;
- int i;
-
- if (de == NULL)
- return(-1);
-
- labelcl_info = hwgfs_get_info(de);
- if (labelcl_info == NULL)
- return(-1);
-
- if (labelcl_info->hwcl_magic != LABELCL_MAGIC)
- return(-1);
-
- if (info_name == NULL)
- return(-1);
-
- if (strlen(info_name) >= LABEL_LENGTH_MAX)
- return(-1);
-
- name = string_table_insert(&label_string_table, info_name);
-
- num_labels = labelcl_info->num_labels;
- new_label_list_size = sizeof(label_info_t) * (num_labels+1);
-
- /*
- * Create a new label info area.
- */
- if (new_label_list_size != 0) {
- new_label_list = (label_info_t *) kmalloc(new_label_list_size, GFP_KERNEL);
-
- if (new_label_list == NULL)
- return(-1);
- }
-
- /*
- * At this point, we are committed to adding the labelled info,
- * if there isn't already information there with the same name.
- */
- old_label_list = labelcl_info->label_list;
-
- /*
- * Look for matching info name.
- */
- for (i=0; i<num_labels; i++) {
- if (!strcmp(info_name, old_label_list[i].name)) {
- /* Not allowed to add duplicate labelled info names. */
- kfree(new_label_list);
- return(-1);
- }
- new_label_list[i] = old_label_list[i]; /* structure copy */
- }
-
- new_label_list[num_labels].name = name;
- new_label_list[num_labels].desc = info_desc;
- new_label_list[num_labels].info = info;
-
- labelcl_info->num_labels = num_labels+1;
- labelcl_info->label_list = new_label_list;
-
- if (old_label_list != NULL)
- kfree(old_label_list);
-
- return(0);
-}
-
-/*
- * labelcl_info_remove_LBL - Remove a label entry.
- */
-int
-labelcl_info_remove_LBL(vertex_hdl_t de,
- char *info_name,
- arb_info_desc_t *info_desc,
- arbitrary_info_t *info)
-{
- labelcl_info_t *labelcl_info = NULL;
- int num_labels;
- int new_label_list_size;
- label_info_t *old_label_list, *new_label_list = NULL;
- arb_info_desc_t label_desc_found;
- arbitrary_info_t label_info_found;
- int i;
-
- if (de == NULL)
- return(-1);
-
- labelcl_info = hwgfs_get_info(de);
- if (labelcl_info == NULL)
- return(-1);
-
- if (labelcl_info->hwcl_magic != LABELCL_MAGIC)
- return(-1);
-
- num_labels = labelcl_info->num_labels;
- if (num_labels == 0) {
- return(-1);
- }
-
- /*
- * Create a new info area.
- */
- new_label_list_size = sizeof(label_info_t) * (num_labels-1);
- if (new_label_list_size) {
- new_label_list = (label_info_t *) kmalloc(new_label_list_size, GFP_KERNEL);
- if (new_label_list == NULL)
- return(-1);
- }
-
- /*
- * At this point, we are committed to removing the labelled info,
- * if it still exists.
- */
- old_label_list = labelcl_info->label_list;
-
- /*
- * Find matching info name.
- */
- for (i=0; i<num_labels; i++) {
- if (!strcmp(info_name, old_label_list[i].name)) {
- label_desc_found = old_label_list[i].desc;
- label_info_found = old_label_list[i].info;
- goto found;
- }
- if (i < num_labels-1) /* avoid walking off the end of the new vertex */
- new_label_list[i] = old_label_list[i]; /* structure copy */
- }
-
- /* The named info doesn't exist. */
- if (new_label_list)
- kfree(new_label_list);
-
- return(-1);
-
-found:
- /* Finish up rest of labelled info */
- for (i=i+1; i<num_labels; i++)
- new_label_list[i-1] = old_label_list[i]; /* structure copy */
-
- labelcl_info->num_labels = num_labels+1;
- labelcl_info->label_list = new_label_list;
-
- kfree(old_label_list);
-
- if (info != NULL)
- *info = label_info_found;
-
- if (info_desc != NULL)
- *info_desc = label_desc_found;
-
- return(0);
-}
-
-
-/*
- * labelcl_info_replace_LBL - Replace an existing label entry with the
- * given new information.
- *
- * Label entry must exist.
- */
-int
-labelcl_info_replace_LBL(vertex_hdl_t de,
- char *info_name,
- arb_info_desc_t info_desc,
- arbitrary_info_t info,
- arb_info_desc_t *old_info_desc,
- arbitrary_info_t *old_info)
-{
- labelcl_info_t *labelcl_info = NULL;
- int num_labels;
- label_info_t *label_list;
- int i;
-
- if (de == NULL)
- return(-1);
-
- labelcl_info = hwgfs_get_info(de);
- if (labelcl_info == NULL)
- return(-1);
-
- if (labelcl_info->hwcl_magic != LABELCL_MAGIC)
- return(-1);
-
- num_labels = labelcl_info->num_labels;
- if (num_labels == 0) {
- return(-1);
- }
-
- if (info_name == NULL)
- return(-1);
-
- label_list = labelcl_info->label_list;
-
- /*
- * Verify that information under info_name already exists.
- */
- for (i=0; i<num_labels; i++)
- if (!strcmp(info_name, label_list[i].name)) {
- if (old_info != NULL)
- *old_info = label_list[i].info;
-
- if (old_info_desc != NULL)
- *old_info_desc = label_list[i].desc;
-
- label_list[i].info = info;
- label_list[i].desc = info_desc;
-
- return(0);
- }
-
-
- return(-1);
-}
-
-/*
- * labelcl_info_get_LBL - Retrieve and return the information for the
- * given label entry.
- */
-int
-labelcl_info_get_LBL(vertex_hdl_t de,
- char *info_name,
- arb_info_desc_t *info_desc,
- arbitrary_info_t *info)
-{
- labelcl_info_t *labelcl_info = NULL;
- int num_labels;
- label_info_t *label_list;
- int i;
-
- if (de == NULL)
- return(-1);
-
- labelcl_info = hwgfs_get_info(de);
- if (labelcl_info == NULL)
- return(-1);
-
- if (labelcl_info->hwcl_magic != LABELCL_MAGIC)
- return(-1);
-
- num_labels = labelcl_info->num_labels;
- if (num_labels == 0) {
- return(-1);
- }
-
- label_list = labelcl_info->label_list;
-
- /*
- * Find information under info_name.
- */
- for (i=0; i<num_labels; i++)
- if (!strcmp(info_name, label_list[i].name)) {
- if (info != NULL)
- *info = label_list[i].info;
- if (info_desc != NULL)
- *info_desc = label_list[i].desc;
-
- return(0);
- }
-
- return(-1);
-}
-
-/*
- * labelcl_info_get_next_LBL - returns the next label entry on the list.
- */
-int
-labelcl_info_get_next_LBL(vertex_hdl_t de,
- char *buffer,
- arb_info_desc_t *info_descp,
- arbitrary_info_t *infop,
- labelcl_info_place_t *placeptr)
-{
- labelcl_info_t *labelcl_info = NULL;
- uint which_info;
- label_info_t *label_list;
-
- if ((buffer == NULL) && (infop == NULL))
- return(-1);
-
- if (placeptr == NULL)
- return(-1);
-
- if (de == NULL)
- return(-1);
-
- labelcl_info = hwgfs_get_info(de);
- if (labelcl_info == NULL)
- return(-1);
-
- if (labelcl_info->hwcl_magic != LABELCL_MAGIC)
- return(-1);
-
- which_info = *placeptr;
-
- if (which_info >= labelcl_info->num_labels) {
- return(-1);
- }
-
- label_list = (label_info_t *) labelcl_info->label_list;
-
- if (buffer != NULL)
- strcpy(buffer, label_list[which_info].name);
-
- if (infop)
- *infop = label_list[which_info].info;
-
- if (info_descp)
- *info_descp = label_list[which_info].desc;
-
- *placeptr = which_info + 1;
-
- return(0);
-}
-
-
-int
-labelcl_info_replace_IDX(vertex_hdl_t de,
- int index,
- arbitrary_info_t info,
- arbitrary_info_t *old_info)
-{
- arbitrary_info_t *info_list_IDX;
- labelcl_info_t *labelcl_info = NULL;
-
- if (de == NULL) {
- printk(KERN_ALERT "labelcl: NULL handle given.\n");
- return(-1);
- }
-
- labelcl_info = hwgfs_get_info(de);
- if (labelcl_info == NULL) {
- printk(KERN_ALERT "labelcl: Entry %p does not have info pointer.\n", (void *)de);
- return(-1);
- }
-
- if (labelcl_info->hwcl_magic != LABELCL_MAGIC)
- return(-1);
-
- if ( (index < 0) || (index >= HWGRAPH_NUM_INDEX_INFO) )
- return(-1);
-
- /*
- * Replace information at the appropriate index in this vertex with
- * the new info.
- */
- info_list_IDX = labelcl_info->IDX_list;
- if (old_info != NULL)
- *old_info = info_list_IDX[index];
- info_list_IDX[index] = info;
-
- return(0);
-
-}
-
-/*
- * labelcl_info_connectpt_set - Sets the connectpt.
- */
-int
-labelcl_info_connectpt_set(hwgfs_handle_t de,
- hwgfs_handle_t connect_de)
-{
- arbitrary_info_t old_info;
- int rv;
-
- rv = labelcl_info_replace_IDX(de, HWGRAPH_CONNECTPT,
- (arbitrary_info_t) connect_de, &old_info);
-
- if (rv) {
- return(rv);
- }
-
- return(0);
-}
-
-
-/*
- * labelcl_info_get_IDX - Returns the information pointed at by index.
- *
- */
-int
-labelcl_info_get_IDX(vertex_hdl_t de,
- int index,
- arbitrary_info_t *info)
-{
- arbitrary_info_t *info_list_IDX;
- labelcl_info_t *labelcl_info = NULL;
-
- if (de == NULL)
- return(-1);
-
- labelcl_info = hwgfs_get_info(de);
- if (labelcl_info == NULL)
- return(-1);
-
- if (labelcl_info->hwcl_magic != LABELCL_MAGIC)
- return(-1);
-
- if ( (index < 0) || (index >= HWGRAPH_NUM_INDEX_INFO) )
- return(-1);
-
- /*
- * Return information at the appropriate index in this vertex.
- */
- info_list_IDX = labelcl_info->IDX_list;
- if (info != NULL)
- *info = info_list_IDX[index];
-
- return(0);
-}
-
-/*
- * labelcl_info_connectpt_get - Retrieve the connect point for a device entry.
- */
-hwgfs_handle_t
-labelcl_info_connectpt_get(hwgfs_handle_t de)
-{
- int rv;
- arbitrary_info_t info;
-
- rv = labelcl_info_get_IDX(de, HWGRAPH_CONNECTPT, &info);
- if (rv)
- return(NULL);
-
- return((hwgfs_handle_t) info);
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * Mostly shameless copied from Linus Torvalds' ramfs and thus
- * Copyright (C) 2000 Linus Torvalds.
- * 2000 Transmeta Corp.
- */
-
-#include <linux/module.h>
-#include <linux/backing-dev.h>
-#include <linux/fs.h>
-#include <linux/pagemap.h>
-#include <linux/init.h>
-#include <linux/string.h>
-#include <asm/uaccess.h>
-
-/* some random number */
-#define HWGFS_MAGIC 0x12061983
-
-static struct super_operations hwgfs_ops;
-static struct address_space_operations hwgfs_aops;
-static struct file_operations hwgfs_file_operations;
-static struct inode_operations hwgfs_file_inode_operations;
-static struct inode_operations hwgfs_dir_inode_operations;
-
-static struct backing_dev_info hwgfs_backing_dev_info = {
- .ra_pages = 0, /* No readahead */
- .memory_backed = 1, /* Does not contribute to dirty memory */
-};
-
-static struct inode *hwgfs_get_inode(struct super_block *sb, int mode, dev_t dev)
-{
- struct inode * inode = new_inode(sb);
-
- if (inode) {
- inode->i_mode = mode;
- inode->i_uid = current->fsuid;
- inode->i_gid = current->fsgid;
- inode->i_blksize = PAGE_CACHE_SIZE;
- inode->i_blocks = 0;
- inode->i_mapping->a_ops = &hwgfs_aops;
- inode->i_mapping->backing_dev_info = &hwgfs_backing_dev_info;
- inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME;
- switch (mode & S_IFMT) {
- default:
- init_special_inode(inode, mode, dev);
- break;
- case S_IFREG:
- inode->i_op = &hwgfs_file_inode_operations;
- inode->i_fop = &hwgfs_file_operations;
- break;
- case S_IFDIR:
- inode->i_op = &hwgfs_dir_inode_operations;
- inode->i_fop = &simple_dir_operations;
- inode->i_nlink++;
- break;
- case S_IFLNK:
- inode->i_op = &page_symlink_inode_operations;
- break;
- }
- }
- return inode;
-}
-
-static int hwgfs_mknod(struct inode *dir, struct dentry *dentry, int mode, dev_t dev)
-{
- struct inode * inode = hwgfs_get_inode(dir->i_sb, mode, dev);
- int error = -ENOSPC;
-
- if (inode) {
- d_instantiate(dentry, inode);
- dget(dentry); /* Extra count - pin the dentry in core */
- error = 0;
- }
- return error;
-}
-
-static int hwgfs_mkdir(struct inode * dir, struct dentry * dentry, int mode)
-{
- return hwgfs_mknod(dir, dentry, mode | S_IFDIR, 0);
-}
-
-static int hwgfs_create(struct inode *dir, struct dentry *dentry, int mode, struct nameidata *unused)
-{
- return hwgfs_mknod(dir, dentry, mode | S_IFREG, 0);
-}
-
-static int hwgfs_symlink(struct inode * dir, struct dentry *dentry, const char * symname)
-{
- struct inode *inode;
- int error = -ENOSPC;
-
- inode = hwgfs_get_inode(dir->i_sb, S_IFLNK|S_IRWXUGO, 0);
- if (inode) {
- int l = strlen(symname)+1;
- error = page_symlink(inode, symname, l);
- if (!error) {
- d_instantiate(dentry, inode);
- dget(dentry);
- } else
- iput(inode);
- }
- return error;
-}
-
-static struct address_space_operations hwgfs_aops = {
- .readpage = simple_readpage,
- .prepare_write = simple_prepare_write,
- .commit_write = simple_commit_write
-};
-
-static struct file_operations hwgfs_file_operations = {
- .read = generic_file_read,
- .write = generic_file_write,
- .mmap = generic_file_mmap,
- .fsync = simple_sync_file,
- .sendfile = generic_file_sendfile,
-};
-
-static struct inode_operations hwgfs_file_inode_operations = {
- .getattr = simple_getattr,
-};
-
-static struct inode_operations hwgfs_dir_inode_operations = {
- .create = hwgfs_create,
- .lookup = simple_lookup,
- .link = simple_link,
- .unlink = simple_unlink,
- .symlink = hwgfs_symlink,
- .mkdir = hwgfs_mkdir,
- .rmdir = simple_rmdir,
- .mknod = hwgfs_mknod,
- .rename = simple_rename,
-};
-
-static struct super_operations hwgfs_ops = {
- .statfs = simple_statfs,
- .drop_inode = generic_delete_inode,
-};
-
-static int hwgfs_fill_super(struct super_block * sb, void * data, int silent)
-{
- struct inode * inode;
- struct dentry * root;
-
- sb->s_blocksize = PAGE_CACHE_SIZE;
- sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
- sb->s_magic = HWGFS_MAGIC;
- sb->s_op = &hwgfs_ops;
- inode = hwgfs_get_inode(sb, S_IFDIR | 0755, 0);
- if (!inode)
- return -ENOMEM;
-
- root = d_alloc_root(inode);
- if (!root) {
- iput(inode);
- return -ENOMEM;
- }
- sb->s_root = root;
- return 0;
-}
-
-static struct super_block *hwgfs_get_sb(struct file_system_type *fs_type,
- int flags, const char *dev_name, void *data)
-{
- return get_sb_single(fs_type, flags, data, hwgfs_fill_super);
-}
-
-static struct file_system_type hwgfs_fs_type = {
- .owner = THIS_MODULE,
- .name = "hwgfs",
- .get_sb = hwgfs_get_sb,
- .kill_sb = kill_litter_super,
-};
-
-struct vfsmount *hwgfs_vfsmount;
-
-int __init init_hwgfs_fs(void)
-{
- int error;
-
- error = register_filesystem(&hwgfs_fs_type);
- if (error)
- return error;
-
- hwgfs_vfsmount = kern_mount(&hwgfs_fs_type);
- if (IS_ERR(hwgfs_vfsmount))
- goto fail;
- return 0;
-
-fail:
- unregister_filesystem(&hwgfs_fs_type);
- return PTR_ERR(hwgfs_vfsmount);
-}
-
-static void __exit exit_hwgfs_fs(void)
-{
- unregister_filesystem(&hwgfs_fs_type);
-}
-
-MODULE_LICENSE("GPL");
-
-module_init(init_hwgfs_fs)
-module_exit(exit_hwgfs_fs)
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/sched.h>
-#include <asm/sn/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/driver.h>
-#include <asm/param.h>
-#include <asm/sn/pio.h>
-#include <asm/sn/xtalk/xwidget.h>
-#include <asm/sn/io.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/hcl_util.h>
-#include <asm/sn/intr.h>
-#include <asm/sn/xtalk/xtalkaddrs.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/sn_cpuid.h>
-
-extern xtalk_provider_t hub_provider;
-
-static int force_fire_and_forget = 1;
-static int ignore_conveyor_override;
-
-
-/*
- * Implementation of hub iobus operations.
- *
- * Hub provides a crosstalk "iobus" on IP27 systems. These routines
- * provide a platform-specific implementation of xtalk used by all xtalk
- * cards on IP27 systems.
- *
- * Called from corresponding xtalk_* routines.
- */
-
-
-/* PIO MANAGEMENT */
-/* For mapping system virtual address space to xtalk space on a specified widget */
-
-/*
- * Setup pio structures needed for a particular hub.
- */
-static void
-hub_pio_init(vertex_hdl_t hubv)
-{
- xwidgetnum_t widget;
- hubinfo_t hubinfo;
- nasid_t nasid;
- int bigwin;
- hub_piomap_t hub_piomap;
-
- hubinfo_get(hubv, &hubinfo);
- nasid = hubinfo->h_nasid;
-
- /* Initialize small window piomaps for this hub */
- for (widget=0; widget <= HUB_WIDGET_ID_MAX; widget++) {
- hub_piomap = hubinfo_swin_piomap_get(hubinfo, (int)widget);
- hub_piomap->hpio_xtalk_info.xp_target = widget;
- hub_piomap->hpio_xtalk_info.xp_xtalk_addr = 0;
- hub_piomap->hpio_xtalk_info.xp_mapsz = SWIN_SIZE;
- hub_piomap->hpio_xtalk_info.xp_kvaddr = (caddr_t)NODE_SWIN_BASE(nasid, widget);
- hub_piomap->hpio_hub = hubv;
- hub_piomap->hpio_flags = HUB_PIOMAP_IS_VALID;
- }
-
- /* Initialize big window piomaps for this hub */
- for (bigwin=0; bigwin < HUB_NUM_BIG_WINDOW; bigwin++) {
- hub_piomap = hubinfo_bwin_piomap_get(hubinfo, bigwin);
- hub_piomap->hpio_xtalk_info.xp_mapsz = BWIN_SIZE;
- hub_piomap->hpio_hub = hubv;
- hub_piomap->hpio_holdcnt = 0;
- hub_piomap->hpio_flags = HUB_PIOMAP_IS_BIGWINDOW;
- IIO_ITTE_DISABLE(nasid, bigwin);
- }
- hub_set_piomode(nasid, HUB_PIO_CONVEYOR);
-
- spin_lock_init(&hubinfo->h_bwlock);
- init_waitqueue_head(&hubinfo->h_bwwait);
-}
-
-/*
- * Create a caddr_t-to-xtalk_addr mapping.
- *
- * Use a small window if possible (that's the usual case), but
- * manage big windows if needed. Big window mappings can be
- * either FIXED or UNFIXED -- we keep at least 1 big window available
- * for UNFIXED mappings.
- *
- * Returns an opaque pointer-sized type which can be passed to
- * other hub_pio_* routines on success, or NULL if the request
- * cannot be satisfied.
- */
-/* ARGSUSED */
-hub_piomap_t
-hub_piomap_alloc(vertex_hdl_t dev, /* set up mapping for this device */
- device_desc_t dev_desc, /* device descriptor */
- iopaddr_t xtalk_addr, /* map for this xtalk_addr range */
- size_t byte_count,
- size_t byte_count_max, /* maximum size of a mapping */
- unsigned flags) /* defined in sys/pio.h */
-{
- xwidget_info_t widget_info = xwidget_info_get(dev);
- xwidgetnum_t widget = xwidget_info_id_get(widget_info);
- vertex_hdl_t hubv = xwidget_info_master_get(widget_info);
- hubinfo_t hubinfo;
- hub_piomap_t bw_piomap;
- int bigwin, free_bw_index;
- nasid_t nasid;
- volatile hubreg_t junk;
- caddr_t kvaddr;
-#ifdef PIOMAP_UNC_ACC_SPACE
- uint64_t addr;
-#endif
-
- /* sanity check */
- if (byte_count_max > byte_count)
- return NULL;
-
- hubinfo_get(hubv, &hubinfo);
-
- /* If xtalk_addr range is mapped by a small window, we don't have
- * to do much
- */
- if (xtalk_addr + byte_count <= SWIN_SIZE) {
- hub_piomap_t piomap;
-
- piomap = hubinfo_swin_piomap_get(hubinfo, (int)widget);
-#ifdef PIOMAP_UNC_ACC_SPACE
- if (flags & PIOMAP_UNC_ACC) {
- addr = (uint64_t)piomap->hpio_xtalk_info.xp_kvaddr;
- addr |= PIOMAP_UNC_ACC_SPACE;
- piomap->hpio_xtalk_info.xp_kvaddr = (caddr_t)addr;
- }
-#endif
- return piomap;
- }
-
- /* We need to use a big window mapping. */
-
- /*
- * TBD: Allow requests that would consume multiple big windows --
- * split the request up and use multiple mapping entries.
- * For now, reject requests that span big windows.
- */
- if ((xtalk_addr % BWIN_SIZE) + byte_count > BWIN_SIZE)
- return NULL;
-
-
- /* Round xtalk address down for big window alignement */
- xtalk_addr = xtalk_addr & ~(BWIN_SIZE-1);
-
- /*
- * Check to see if an existing big window mapping will suffice.
- */
-tryagain:
- free_bw_index = -1;
- spin_lock(&hubinfo->h_bwlock);
- for (bigwin=0; bigwin < HUB_NUM_BIG_WINDOW; bigwin++) {
- bw_piomap = hubinfo_bwin_piomap_get(hubinfo, bigwin);
-
- /* If mapping is not valid, skip it */
- if (!(bw_piomap->hpio_flags & HUB_PIOMAP_IS_VALID)) {
- free_bw_index = bigwin;
- continue;
- }
-
- /*
- * If mapping is UNFIXED, skip it. We don't allow sharing
- * of UNFIXED mappings, because this would allow starvation.
- */
- if (!(bw_piomap->hpio_flags & HUB_PIOMAP_IS_FIXED))
- continue;
-
- if ( xtalk_addr == bw_piomap->hpio_xtalk_info.xp_xtalk_addr &&
- widget == bw_piomap->hpio_xtalk_info.xp_target) {
- bw_piomap->hpio_holdcnt++;
- spin_unlock(&hubinfo->h_bwlock);
- return bw_piomap;
- }
- }
-
- /*
- * None of the existing big window mappings will work for us --
- * we need to establish a new mapping.
- */
-
- /* Insure that we don't consume all big windows with FIXED mappings */
- if (flags & PIOMAP_FIXED) {
- if (hubinfo->h_num_big_window_fixed < HUB_NUM_BIG_WINDOW-1) {
- ASSERT(free_bw_index >= 0);
- hubinfo->h_num_big_window_fixed++;
- } else {
- bw_piomap = NULL;
- goto done;
- }
- } else /* PIOMAP_UNFIXED */ {
- if (free_bw_index < 0) {
- if (flags & PIOMAP_NOSLEEP) {
- bw_piomap = NULL;
- goto done;
- } else {
- DECLARE_WAITQUEUE(wait, current);
-
- spin_unlock(&hubinfo->h_bwlock);
- set_current_state(TASK_UNINTERRUPTIBLE);
- add_wait_queue_exclusive(&hubinfo->h_bwwait, &wait);
- schedule();
- remove_wait_queue(&hubinfo->h_bwwait, &wait);
- goto tryagain;
- }
- }
- }
-
-
- /* OK! Allocate big window free_bw_index for this mapping. */
- /*
- * The code below does a PIO write to setup an ITTE entry.
- * We need to prevent other CPUs from seeing our updated memory
- * shadow of the ITTE (in the piomap) until the ITTE entry is
- * actually set up; otherwise, another CPU might attempt a PIO
- * prematurely.
- *
- * Also, the only way we can know that an entry has been received
- * by the hub and can be used by future PIO reads/writes is by
- * reading back the ITTE entry after writing it.
- *
- * For these two reasons, we PIO read back the ITTE entry after
- * we write it.
- */
-
- nasid = hubinfo->h_nasid;
- IIO_ITTE_PUT(nasid, free_bw_index, HUB_PIO_MAP_TO_MEM, widget, xtalk_addr);
- junk = HUB_L(IIO_ITTE_GET(nasid, free_bw_index));
-
- bw_piomap = hubinfo_bwin_piomap_get(hubinfo, free_bw_index);
- bw_piomap->hpio_xtalk_info.xp_dev = dev;
- bw_piomap->hpio_xtalk_info.xp_target = widget;
- bw_piomap->hpio_xtalk_info.xp_xtalk_addr = xtalk_addr;
- kvaddr = (caddr_t)NODE_BWIN_BASE(nasid, free_bw_index);
-#ifdef PIOMAP_UNC_ACC_SPACE
- if (flags & PIOMAP_UNC_ACC) {
- addr = (uint64_t)kvaddr;
- addr |= PIOMAP_UNC_ACC_SPACE;
- kvaddr = (caddr_t)addr;
- }
-#endif
- bw_piomap->hpio_xtalk_info.xp_kvaddr = kvaddr;
- bw_piomap->hpio_holdcnt++;
- bw_piomap->hpio_bigwin_num = free_bw_index;
-
- if (flags & PIOMAP_FIXED)
- bw_piomap->hpio_flags |= HUB_PIOMAP_IS_VALID | HUB_PIOMAP_IS_FIXED;
- else
- bw_piomap->hpio_flags |= HUB_PIOMAP_IS_VALID;
-
-done:
- spin_unlock(&hubinfo->h_bwlock);
- return bw_piomap;
-}
-
-/*
- * hub_piomap_free destroys a caddr_t-to-xtalk pio mapping and frees
- * any associated mapping resources.
- *
- * If this * piomap was handled with a small window, or if it was handled
- * in a big window that's still in use by someone else, then there's
- * nothing to do. On the other hand, if this mapping was handled
- * with a big window, AND if we were the final user of that mapping,
- * then destroy the mapping.
- */
-void
-hub_piomap_free(hub_piomap_t hub_piomap)
-{
- vertex_hdl_t hubv;
- hubinfo_t hubinfo;
- nasid_t nasid;
-
- /*
- * Small windows are permanently mapped to corresponding widgets,
- * so there're no resources to free.
- */
- if (!(hub_piomap->hpio_flags & HUB_PIOMAP_IS_BIGWINDOW))
- return;
-
- ASSERT(hub_piomap->hpio_flags & HUB_PIOMAP_IS_VALID);
- ASSERT(hub_piomap->hpio_holdcnt > 0);
-
- hubv = hub_piomap->hpio_hub;
- hubinfo_get(hubv, &hubinfo);
- nasid = hubinfo->h_nasid;
-
- spin_lock(&hubinfo->h_bwlock);
-
- /*
- * If this is the last hold on this mapping, free it.
- */
- if (--hub_piomap->hpio_holdcnt == 0) {
- IIO_ITTE_DISABLE(nasid, hub_piomap->hpio_bigwin_num );
-
- if (hub_piomap->hpio_flags & HUB_PIOMAP_IS_FIXED) {
- hub_piomap->hpio_flags &= ~(HUB_PIOMAP_IS_VALID | HUB_PIOMAP_IS_FIXED);
- hubinfo->h_num_big_window_fixed--;
- ASSERT(hubinfo->h_num_big_window_fixed >= 0);
- } else
- hub_piomap->hpio_flags &= ~HUB_PIOMAP_IS_VALID;
-
- wake_up(&hubinfo->h_bwwait);
- }
-
- spin_unlock(&hubinfo->h_bwlock);
-}
-
-/*
- * Establish a mapping to a given xtalk address range using the resources
- * allocated earlier.
- */
-caddr_t
-hub_piomap_addr(hub_piomap_t hub_piomap, /* mapping resources */
- iopaddr_t xtalk_addr, /* map for this xtalk address */
- size_t byte_count) /* map this many bytes */
-{
- /* Verify that range can be mapped using the specified piomap */
- if (xtalk_addr < hub_piomap->hpio_xtalk_info.xp_xtalk_addr)
- return 0;
-
- if (xtalk_addr + byte_count >
- ( hub_piomap->hpio_xtalk_info.xp_xtalk_addr +
- hub_piomap->hpio_xtalk_info.xp_mapsz))
- return 0;
-
- if (hub_piomap->hpio_flags & HUB_PIOMAP_IS_VALID)
- return hub_piomap->hpio_xtalk_info.xp_kvaddr +
- (xtalk_addr % hub_piomap->hpio_xtalk_info.xp_mapsz);
- else
- return 0;
-}
-
-
-/*
- * Driver indicates that it's done with PIO's from an earlier piomap_addr.
- */
-/* ARGSUSED */
-void
-hub_piomap_done(hub_piomap_t hub_piomap) /* done with these mapping resources */
-{
- /* Nothing to do */
-}
-
-
-/*
- * For translations that require no mapping resources, supply a kernel virtual
- * address that maps to the specified xtalk address range.
- */
-/* ARGSUSED */
-caddr_t
-hub_piotrans_addr( vertex_hdl_t dev, /* translate to this device */
- device_desc_t dev_desc, /* device descriptor */
- iopaddr_t xtalk_addr, /* Crosstalk address */
- size_t byte_count, /* map this many bytes */
- unsigned flags) /* (currently unused) */
-{
- xwidget_info_t widget_info = xwidget_info_get(dev);
- xwidgetnum_t widget = xwidget_info_id_get(widget_info);
- vertex_hdl_t hubv = xwidget_info_master_get(widget_info);
- hub_piomap_t hub_piomap;
- hubinfo_t hubinfo;
- caddr_t addr;
-
- hubinfo_get(hubv, &hubinfo);
-
- if (xtalk_addr + byte_count <= SWIN_SIZE) {
- hub_piomap = hubinfo_swin_piomap_get(hubinfo, (int)widget);
- addr = hub_piomap_addr(hub_piomap, xtalk_addr, byte_count);
-#ifdef PIOMAP_UNC_ACC_SPACE
- if (flags & PIOMAP_UNC_ACC) {
- uint64_t iaddr;
- iaddr = (uint64_t)addr;
- iaddr |= PIOMAP_UNC_ACC_SPACE;
- addr = (caddr_t)iaddr;
- }
-#endif
- return addr;
- } else
- return 0;
-}
-
-
-/* DMA MANAGEMENT */
-/* Mapping from crosstalk space to system physical space */
-
-
-/*
- * Allocate resources needed to set up DMA mappings up to a specified size
- * on a specified adapter.
- *
- * We don't actually use the adapter ID for anything. It's just the adapter
- * that the lower level driver plans to use for DMA.
- */
-/* ARGSUSED */
-hub_dmamap_t
-hub_dmamap_alloc( vertex_hdl_t dev, /* set up mappings for this device */
- device_desc_t dev_desc, /* device descriptor */
- size_t byte_count_max, /* max size of a mapping */
- unsigned flags) /* defined in dma.h */
-{
- hub_dmamap_t dmamap;
- xwidget_info_t widget_info = xwidget_info_get(dev);
- xwidgetnum_t widget = xwidget_info_id_get(widget_info);
- vertex_hdl_t hubv = xwidget_info_master_get(widget_info);
-
- dmamap = kmalloc(sizeof(struct hub_dmamap_s), GFP_ATOMIC);
- dmamap->hdma_xtalk_info.xd_dev = dev;
- dmamap->hdma_xtalk_info.xd_target = widget;
- dmamap->hdma_hub = hubv;
- dmamap->hdma_flags = HUB_DMAMAP_IS_VALID;
- if (flags & XTALK_FIXED)
- dmamap->hdma_flags |= HUB_DMAMAP_IS_FIXED;
-
- return dmamap;
-}
-
-/*
- * Destroy a DMA mapping from crosstalk space to system address space.
- * There is no actual mapping hardware to destroy, but we at least mark
- * the dmamap INVALID and free the space that it took.
- */
-void
-hub_dmamap_free(hub_dmamap_t hub_dmamap)
-{
- hub_dmamap->hdma_flags &= ~HUB_DMAMAP_IS_VALID;
- kfree(hub_dmamap);
-}
-
-/*
- * Establish a DMA mapping using the resources allocated in a previous dmamap_alloc.
- * Return an appropriate crosstalk address range that maps to the specified physical
- * address range.
- */
-/* ARGSUSED */
-extern iopaddr_t
-hub_dmamap_addr( hub_dmamap_t dmamap, /* use these mapping resources */
- paddr_t paddr, /* map for this address */
- size_t byte_count) /* map this many bytes */
-{
- vertex_hdl_t vhdl;
-
- ASSERT(dmamap->hdma_flags & HUB_DMAMAP_IS_VALID);
-
- if (dmamap->hdma_flags & HUB_DMAMAP_USED) {
- /* If the map is FIXED, re-use is OK. */
- if (!(dmamap->hdma_flags & HUB_DMAMAP_IS_FIXED)) {
- char name[MAXDEVNAME];
- vhdl = dmamap->hdma_xtalk_info.xd_dev;
- printk(KERN_WARNING "%s: hub_dmamap_addr re-uses dmamap.\n", vertex_to_name(vhdl, name, MAXDEVNAME));
- }
- } else {
- dmamap->hdma_flags |= HUB_DMAMAP_USED;
- }
-
- /* There isn't actually any DMA mapping hardware on the hub. */
- return (PHYS_TO_DMA(paddr));
-}
-
-/*
- * Driver indicates that it has completed whatever DMA it may have started
- * after an earlier dmamap_addr call.
- */
-void
-hub_dmamap_done(hub_dmamap_t hub_dmamap) /* done with these mapping resources */
-{
- vertex_hdl_t vhdl;
-
- if (hub_dmamap->hdma_flags & HUB_DMAMAP_USED) {
- hub_dmamap->hdma_flags &= ~HUB_DMAMAP_USED;
- } else {
- /* If the map is FIXED, re-done is OK. */
- if (!(hub_dmamap->hdma_flags & HUB_DMAMAP_IS_FIXED)) {
- char name[MAXDEVNAME];
- vhdl = hub_dmamap->hdma_xtalk_info.xd_dev;
- printk(KERN_WARNING "%s: hub_dmamap_done already done with dmamap\n", vertex_to_name(vhdl, name, MAXDEVNAME));
- }
- }
-}
-
-/*
- * Translate a single system physical address into a crosstalk address.
- */
-/* ARGSUSED */
-iopaddr_t
-hub_dmatrans_addr( vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- paddr_t paddr, /* system physical address */
- size_t byte_count, /* length */
- unsigned flags) /* defined in dma.h */
-{
- return (PHYS_TO_DMA(paddr));
-}
-
-/*ARGSUSED*/
-void
-hub_dmamap_drain( hub_dmamap_t map)
-{
- /* XXX- flush caches, if cache coherency WAR is needed */
-}
-
-/*ARGSUSED*/
-void
-hub_dmaaddr_drain( vertex_hdl_t vhdl,
- paddr_t addr,
- size_t bytes)
-{
- /* XXX- flush caches, if cache coherency WAR is needed */
-}
-
-
-/* CONFIGURATION MANAGEMENT */
-
-/*
- * Perform initializations that allow this hub to start crosstalk support.
- */
-void
-hub_provider_startup(vertex_hdl_t hubv)
-{
- hubinfo_t hubinfo;
-
- hubinfo_get(hubv, &hubinfo);
- hub_pio_init(hubv);
- intr_init_vecblk(nasid_to_cnodeid(hubinfo->h_nasid));
-}
-
-/*
- * Shutdown crosstalk support from a hub.
- */
-void
-hub_provider_shutdown(vertex_hdl_t hub)
-{
- /* TBD */
- xtalk_provider_unregister(hub);
-}
-
-/*
- * Check that an address is in the real small window widget 0 space
- * or else in the big window we're using to emulate small window 0
- * in the kernel.
- */
-int
-hub_check_is_widget0(void *addr)
-{
- nasid_t nasid = NASID_GET(addr);
-
- if (((unsigned long)addr >= RAW_NODE_SWIN_BASE(nasid, 0)) &&
- ((unsigned long)addr < RAW_NODE_SWIN_BASE(nasid, 1)))
- return 1;
- return 0;
-}
-
-
-/*
- * Check that two addresses use the same widget
- */
-int
-hub_check_window_equiv(void *addra, void *addrb)
-{
- if (hub_check_is_widget0(addra) && hub_check_is_widget0(addrb))
- return 1;
-
- /* XXX - Assume this is really a small window address */
- if (WIDGETID_GET((unsigned long)addra) ==
- WIDGETID_GET((unsigned long)addrb))
- return 1;
-
- return 0;
-}
-
-
-/*
- * hub_setup_prb(nasid, prbnum, credits, conveyor)
- *
- * Put a PRB into fire-and-forget mode if conveyor isn't set. Otherwise,
- * put it into conveyor belt mode with the specified number of credits.
- */
-void
-hub_setup_prb(nasid_t nasid, int prbnum, int credits, int conveyor)
-{
- iprb_t prb;
- int prb_offset;
-
- if (force_fire_and_forget && !ignore_conveyor_override)
- if (conveyor == HUB_PIO_CONVEYOR)
- conveyor = HUB_PIO_FIRE_N_FORGET;
-
- /*
- * Get the current register value.
- */
- prb_offset = IIO_IOPRB(prbnum);
- prb.iprb_regval = REMOTE_HUB_L(nasid, prb_offset);
-
- /*
- * Clear out some fields.
- */
- prb.iprb_ovflow = 1;
- prb.iprb_bnakctr = 0;
- prb.iprb_anakctr = 0;
-
- /*
- * Enable or disable fire-and-forget mode.
- */
- prb.iprb_ff = ((conveyor == HUB_PIO_CONVEYOR) ? 0 : 1);
-
- /*
- * Set the appropriate number of PIO cresits for the widget.
- */
- prb.iprb_xtalkctr = credits;
-
- /*
- * Store the new value to the register.
- */
- REMOTE_HUB_S(nasid, prb_offset, prb.iprb_regval);
-}
-
-/*
- * hub_set_piomode()
- *
- * Put the hub into either "PIO conveyor belt" mode or "fire-and-forget"
- * mode. To do this, we have to make absolutely sure that no PIOs
- * are in progress so we turn off access to all widgets for the duration
- * of the function.
- *
- * XXX - This code should really check what kind of widget we're talking
- * to. Bridges can only handle three requests, but XG will do more.
- * How many can crossbow handle to widget 0? We're assuming 1.
- *
- * XXX - There is a bug in the crossbow that link reset PIOs do not
- * return write responses. The easiest solution to this problem is to
- * leave widget 0 (xbow) in fire-and-forget mode at all times. This
- * only affects pio's to xbow registers, which should be rare.
- */
-void
-hub_set_piomode(nasid_t nasid, int conveyor)
-{
- hubreg_t ii_iowa;
- int direct_connect;
- hubii_wcr_t ii_wcr;
- int prbnum;
-
- ASSERT(nasid_to_cnodeid(nasid) != INVALID_CNODEID);
-
- ii_iowa = REMOTE_HUB_L(nasid, IIO_OUTWIDGET_ACCESS);
- REMOTE_HUB_S(nasid, IIO_OUTWIDGET_ACCESS, 0);
-
- ii_wcr.wcr_reg_value = REMOTE_HUB_L(nasid, IIO_WCR);
- direct_connect = ii_wcr.iwcr_dir_con;
-
- if (direct_connect) {
- /*
- * Assume a bridge here.
- */
- hub_setup_prb(nasid, 0, 3, conveyor);
- } else {
- /*
- * Assume a crossbow here.
- */
- hub_setup_prb(nasid, 0, 1, conveyor);
- }
-
- for (prbnum = HUB_WIDGET_ID_MIN; prbnum <= HUB_WIDGET_ID_MAX; prbnum++) {
- /*
- * XXX - Here's where we should take the widget type into
- * when account assigning credits.
- */
- /* Always set the PRBs in fire-and-forget mode */
- hub_setup_prb(nasid, prbnum, 3, conveyor);
- }
-
- REMOTE_HUB_S(nasid, IIO_OUTWIDGET_ACCESS, ii_iowa);
-}
-/* Interface to allow special drivers to set hub specific
- * device flags.
- * Return 0 on failure , 1 on success
- */
-int
-hub_widget_flags_set(nasid_t nasid,
- xwidgetnum_t widget_num,
- hub_widget_flags_t flags)
-{
-
- ASSERT((flags & HUB_WIDGET_FLAGS) == flags);
-
- if (flags & HUB_PIO_CONVEYOR) {
- hub_setup_prb(nasid,widget_num,
- 3,HUB_PIO_CONVEYOR); /* set the PRB in conveyor
- * belt mode with 3 credits
- */
- } else if (flags & HUB_PIO_FIRE_N_FORGET) {
- hub_setup_prb(nasid,widget_num,
- 3,HUB_PIO_FIRE_N_FORGET); /* set the PRB in fire
- * and forget mode
- */
- }
-
- return 1;
-}
-
-/*
- * A pointer to this structure hangs off of every hub hwgraph vertex.
- * The generic xtalk layer may indirect through it to get to this specific
- * crosstalk bus provider.
- */
-xtalk_provider_t hub_provider = {
- .piomap_alloc = (xtalk_piomap_alloc_f *) hub_piomap_alloc,
- .piomap_free = (xtalk_piomap_free_f *) hub_piomap_free,
- .piomap_addr = (xtalk_piomap_addr_f *) hub_piomap_addr,
- .piomap_done = (xtalk_piomap_done_f *) hub_piomap_done,
- .piotrans_addr = (xtalk_piotrans_addr_f *) hub_piotrans_addr,
-
- .dmamap_alloc = (xtalk_dmamap_alloc_f *) hub_dmamap_alloc,
- .dmamap_free = (xtalk_dmamap_free_f *) hub_dmamap_free,
- .dmamap_addr = (xtalk_dmamap_addr_f *) hub_dmamap_addr,
- .dmamap_done = (xtalk_dmamap_done_f *) hub_dmamap_done,
- .dmatrans_addr = (xtalk_dmatrans_addr_f *) hub_dmatrans_addr,
- .dmamap_drain = (xtalk_dmamap_drain_f *) hub_dmamap_drain,
- .dmaaddr_drain = (xtalk_dmaaddr_drain_f *) hub_dmaaddr_drain,
-
- .intr_alloc = (xtalk_intr_alloc_f *) hub_intr_alloc,
- .intr_alloc_nothd = (xtalk_intr_alloc_f *) hub_intr_alloc_nothd,
- .intr_free = (xtalk_intr_free_f *) hub_intr_free,
- .intr_connect = (xtalk_intr_connect_f *) hub_intr_connect,
- .intr_disconnect = (xtalk_intr_disconnect_f *) hub_intr_disconnect,
- .provider_startup = (xtalk_provider_startup_f *) hub_provider_startup,
- .provider_shutdown = (xtalk_provider_shutdown_f *) hub_provider_shutdown,
-};
+++ /dev/null
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 2002-2003 Silicon Graphics, Inc. All Rights Reserved.
-#
-# Makefile for the sn2 io routines.
-
-obj-y += pci.o pci_dma.o pci_bus_cvlink.o iomv.o
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/module.h>
-#include <asm/io.h>
-#include <asm/delay.h>
-#include <asm/sn/simulator.h>
-#include <asm/sn/pda.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/sn2/shub_mmr.h>
-
-/**
- * sn_io_addr - convert an in/out port to an i/o address
- * @port: port to convert
- *
- * Legacy in/out instructions are converted to ld/st instructions
- * on IA64. This routine will convert a port number into a valid
- * SN i/o address. Used by sn_in*() and sn_out*().
- */
-void *
-sn_io_addr(unsigned long port)
-{
- if (!IS_RUNNING_ON_SIMULATOR()) {
- /* On sn2, legacy I/O ports don't point at anything */
- if (port < 64*1024)
- return 0;
- return( (void *) (port | __IA64_UNCACHED_OFFSET));
- } else {
- /* but the simulator uses them... */
- unsigned long io_base;
- unsigned long addr;
-
- /*
- * word align port, but need more than 10 bits
- * for accessing registers in bedrock local block
- * (so we don't do port&0xfff)
- */
- if ((port >= 0x1f0 && port <= 0x1f7) ||
- port == 0x3f6 || port == 0x3f7) {
- io_base = (0xc000000fcc000000 | ((unsigned long)get_nasid() << 38));
- addr = io_base | ((port >> 2) << 12) | (port & 0xfff);
- } else {
- addr = __ia64_get_io_port_base() | ((port >> 2) << 2);
- }
- return(void *) addr;
- }
-}
-
-EXPORT_SYMBOL(sn_io_addr);
-
-/**
- * sn_mmiob - I/O space memory barrier
- *
- * Acts as a memory mapped I/O barrier for platforms that queue writes to
- * I/O space. This ensures that subsequent writes to I/O space arrive after
- * all previous writes. For most ia64 platforms, this is a simple
- * 'mf.a' instruction. For other platforms, mmiob() may have to read
- * a chipset register to ensure ordering.
- *
- * On SN2, we wait for the PIO_WRITE_STATUS SHub register to clear.
- * See PV 871084 for details about the WAR about zero value.
- *
- */
-void
-sn_mmiob (void)
-{
- while ((((volatile unsigned long) (*pda->pio_write_status_addr)) & SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK) !=
- SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK)
- cpu_relax();
-}
-EXPORT_SYMBOL(sn_mmiob);
+++ /dev/null
-/*
- * SNI64 specific PCI support for SNI IO.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1997, 1998, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#include <asm/sn/hcl.h>
-#include <asm/sn/pci/pcibr_private.h>
-
-/*
- * These routines are only used during sn_pci_init for probing each bus, and
- * can probably be removed with a little more cleanup now that the SAL routines
- * work on sn2.
- */
-
-extern vertex_hdl_t devfn_to_vertex(unsigned char bus, unsigned char devfn);
-
-int sn_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
-{
- unsigned long res = 0;
- vertex_hdl_t device_vertex;
-
- device_vertex = devfn_to_vertex(bus->number, devfn);
-
- if (!device_vertex)
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- res = pciio_config_get(device_vertex, (unsigned)where, size);
- *val = (u32)res;
- return PCIBIOS_SUCCESSFUL;
-}
-
-int sn_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
-{
- vertex_hdl_t device_vertex;
-
- device_vertex = devfn_to_vertex(bus->number, devfn);
-
- if (!device_vertex)
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- pciio_config_set(device_vertex, (unsigned)where, size, (uint64_t)val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops sn_pci_ops = {
- .read = sn_read_config,
- .write = sn_write_config,
-};
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/vmalloc.h>
-#include <linux/slab.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/pci/pci_bus_cvlink.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/simulator.h>
-
-extern int bridge_rev_b_data_check_disable;
-
-vertex_hdl_t busnum_to_pcibr_vhdl[MAX_PCI_XWIDGET];
-nasid_t busnum_to_nid[MAX_PCI_XWIDGET];
-void * busnum_to_atedmamaps[MAX_PCI_XWIDGET];
-unsigned char num_bridges;
-static int done_probing;
-extern irqpda_t *irqpdaindr;
-
-static int pci_bus_map_create(struct pcibr_list_s *softlistp, moduleid_t io_moduleid);
-vertex_hdl_t devfn_to_vertex(unsigned char busnum, unsigned int devfn);
-
-extern void register_pcibr_intr(int irq, pcibr_intr_t intr);
-
-static struct sn_flush_device_list *sn_dma_flush_init(unsigned long start,
- unsigned long end,
- int idx, int pin, int slot);
-extern int cbrick_type_get_nasid(nasid_t);
-extern void ioconfig_bus_new_entries(void);
-extern void ioconfig_get_busnum(char *, int *);
-extern int iomoduleid_get(nasid_t);
-extern int pcibr_widget_to_bus(vertex_hdl_t);
-extern int isIO9(int);
-
-#define IS_OPUS(nasid) (cbrick_type_get_nasid(nasid) == MODULE_OPUSBRICK)
-#define IS_ALTIX(nasid) (cbrick_type_get_nasid(nasid) == MODULE_CBRICK)
-
-/*
- * Init the provider asic for a given device
- */
-
-static inline void __init
-set_pci_provider(struct sn_device_sysdata *device_sysdata)
-{
- pciio_info_t pciio_info = pciio_info_get(device_sysdata->vhdl);
-
- device_sysdata->pci_provider = pciio_info_pops_get(pciio_info);
-}
-
-/*
- * pci_bus_cvlink_init() - To be called once during initialization before
- * SGI IO Infrastructure init is called.
- */
-int
-pci_bus_cvlink_init(void)
-{
-
- extern int ioconfig_bus_init(void);
-
- memset(busnum_to_pcibr_vhdl, 0x0, sizeof(vertex_hdl_t) * MAX_PCI_XWIDGET);
- memset(busnum_to_nid, 0x0, sizeof(nasid_t) * MAX_PCI_XWIDGET);
-
- memset(busnum_to_atedmamaps, 0x0, sizeof(void *) * MAX_PCI_XWIDGET);
-
- num_bridges = 0;
-
- return ioconfig_bus_init();
-}
-
-/*
- * pci_bus_to_vertex() - Given a logical Linux Bus Number returns the associated
- * pci bus vertex from the SGI IO Infrastructure.
- */
-static inline vertex_hdl_t
-pci_bus_to_vertex(unsigned char busnum)
-{
-
- vertex_hdl_t pci_bus = NULL;
-
-
- /*
- * First get the xwidget vertex.
- */
- pci_bus = busnum_to_pcibr_vhdl[busnum];
- return(pci_bus);
-}
-
-/*
- * devfn_to_vertex() - returns the vertex of the device given the bus, slot,
- * and function numbers.
- */
-vertex_hdl_t
-devfn_to_vertex(unsigned char busnum, unsigned int devfn)
-{
-
- int slot = 0;
- int func = 0;
- char name[16];
- vertex_hdl_t pci_bus = NULL;
- vertex_hdl_t device_vertex = (vertex_hdl_t)NULL;
-
- /*
- * Go get the pci bus vertex.
- */
- pci_bus = pci_bus_to_vertex(busnum);
- if (!pci_bus) {
- /*
- * During probing, the Linux pci code invents non-existent
- * bus numbers and pci_dev structures and tries to access
- * them to determine existence. Don't crib during probing.
- */
- if (done_probing)
- printk("devfn_to_vertex: Invalid bus number %d given.\n", busnum);
- return(NULL);
- }
-
-
- /*
- * Go get the slot&function vertex.
- * Should call pciio_slot_func_to_name() when ready.
- */
- slot = PCI_SLOT(devfn);
- func = PCI_FUNC(devfn);
-
- /*
- * For a NON Multi-function card the name of the device looks like:
- * ../pci/1, ../pci/2 ..
- */
- if (func == 0) {
- sprintf(name, "%d", slot);
- if (hwgraph_traverse(pci_bus, name, &device_vertex) ==
- GRAPH_SUCCESS) {
- if (device_vertex) {
- return(device_vertex);
- }
- }
- }
-
- /*
- * This maybe a multifunction card. It's names look like:
- * ../pci/1a, ../pci/1b, etc.
- */
- sprintf(name, "%d%c", slot, 'a'+func);
- if (hwgraph_traverse(pci_bus, name, &device_vertex) != GRAPH_SUCCESS) {
- if (!device_vertex) {
- return(NULL);
- }
- }
-
- return(device_vertex);
-}
-
-/*
- * sn_alloc_pci_sysdata() - This routine allocates a pci controller
- * which is expected as the pci_dev and pci_bus sysdata by the Linux
- * PCI infrastructure.
- */
-static struct pci_controller *
-sn_alloc_pci_sysdata(void)
-{
- struct pci_controller *pci_sysdata;
-
- pci_sysdata = kmalloc(sizeof(*pci_sysdata), GFP_KERNEL);
- if (!pci_sysdata)
- return NULL;
-
- memset(pci_sysdata, 0, sizeof(*pci_sysdata));
- return pci_sysdata;
-}
-
-/*
- * sn_pci_fixup_bus() - This routine sets up a bus's resources
- * consistent with the Linux PCI abstraction layer.
- */
-static int __init
-sn_pci_fixup_bus(struct pci_bus *bus)
-{
- struct pci_controller *pci_sysdata;
- struct sn_widget_sysdata *widget_sysdata;
-
- pci_sysdata = sn_alloc_pci_sysdata();
- if (!pci_sysdata) {
- printk(KERN_WARNING "sn_pci_fixup_bus(): Unable to "
- "allocate memory for pci_sysdata\n");
- return -ENOMEM;
- }
- widget_sysdata = kmalloc(sizeof(struct sn_widget_sysdata),
- GFP_KERNEL);
- if (!widget_sysdata) {
- printk(KERN_WARNING "sn_pci_fixup_bus(): Unable to "
- "allocate memory for widget_sysdata\n");
- kfree(pci_sysdata);
- return -ENOMEM;
- }
-
- widget_sysdata->vhdl = pci_bus_to_vertex(bus->number);
- pci_sysdata->platform_data = (void *)widget_sysdata;
- bus->sysdata = pci_sysdata;
- return 0;
-}
-
-
-/*
- * sn_pci_fixup_slot() - This routine sets up a slot's resources
- * consistent with the Linux PCI abstraction layer. Resources acquired
- * from our PCI provider include PIO maps to BAR space and interrupt
- * objects.
- */
-static int
-sn_pci_fixup_slot(struct pci_dev *dev)
-{
- extern int bit_pos_to_irq(int);
- unsigned int irq;
- int idx;
- u16 cmd;
- vertex_hdl_t vhdl;
- unsigned long size;
- struct pci_controller *pci_sysdata;
- struct sn_device_sysdata *device_sysdata;
- pciio_intr_line_t lines = 0;
- vertex_hdl_t device_vertex;
- pciio_provider_t *pci_provider;
- pciio_intr_t intr_handle;
-
- /* Allocate a controller structure */
- pci_sysdata = sn_alloc_pci_sysdata();
- if (!pci_sysdata) {
- printk(KERN_WARNING "sn_pci_fixup_slot: Unable to "
- "allocate memory for pci_sysdata\n");
- return -ENOMEM;
- }
-
- /* Set the device vertex */
- device_sysdata = kmalloc(sizeof(struct sn_device_sysdata), GFP_KERNEL);
- if (!device_sysdata) {
- printk(KERN_WARNING "sn_pci_fixup_slot: Unable to "
- "allocate memory for device_sysdata\n");
- kfree(pci_sysdata);
- return -ENOMEM;
- }
-
- device_sysdata->vhdl = devfn_to_vertex(dev->bus->number, dev->devfn);
- pci_sysdata->platform_data = (void *) device_sysdata;
- dev->sysdata = pci_sysdata;
- set_pci_provider(device_sysdata);
-
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
-
- /*
- * Set the resources address correctly. The assumption here
- * is that the addresses in the resource structure has been
- * read from the card and it was set in the card by our
- * Infrastructure. NOTE: PIC and TIOCP don't have big-window
- * upport for PCI I/O space. So by mapping the I/O space
- * first we will attempt to use Device(x) registers for I/O
- * BARs (which can't use big windows like MEM BARs can).
- */
- vhdl = device_sysdata->vhdl;
-
- /* Allocate the IORESOURCE_IO space first */
- for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) {
- unsigned long start, end, addr;
-
- device_sysdata->pio_map[idx] = NULL;
-
- if (!(dev->resource[idx].flags & IORESOURCE_IO))
- continue;
-
- start = dev->resource[idx].start;
- end = dev->resource[idx].end;
- size = end - start;
- if (!size)
- continue;
-
- addr = (unsigned long)pciio_pio_addr(vhdl, 0,
- PCIIO_SPACE_WIN(idx), 0, size,
- &device_sysdata->pio_map[idx], 0);
-
- if (!addr) {
- dev->resource[idx].start = 0;
- dev->resource[idx].end = 0;
- printk("sn_pci_fixup(): pio map failure for "
- "%s bar%d\n", dev->slot_name, idx);
- } else {
- addr |= __IA64_UNCACHED_OFFSET;
- dev->resource[idx].start = addr;
- dev->resource[idx].end = addr + size;
- dev->resource[idx].parent = &ioport_resource;
- }
-
- if (dev->resource[idx].flags & IORESOURCE_IO)
- cmd |= PCI_COMMAND_IO;
- }
-
- /* Allocate the IORESOURCE_MEM space next */
- for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) {
- unsigned long start, end, addr;
-
- if ((dev->resource[idx].flags & IORESOURCE_IO))
- continue;
-
- start = dev->resource[idx].start;
- end = dev->resource[idx].end;
- size = end - start;
- if (!size)
- continue;
-
- addr = (unsigned long)pciio_pio_addr(vhdl, 0,
- PCIIO_SPACE_WIN(idx), 0, size,
- &device_sysdata->pio_map[idx], 0);
-
- if (!addr) {
- dev->resource[idx].start = 0;
- dev->resource[idx].end = 0;
- printk("sn_pci_fixup(): pio map failure for "
- "%s bar%d\n", dev->slot_name, idx);
- } else {
- addr |= __IA64_UNCACHED_OFFSET;
- dev->resource[idx].start = addr;
- dev->resource[idx].end = addr + size;
- dev->resource[idx].parent = &iomem_resource;
- }
-
- if (dev->resource[idx].flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
-
- /*
- * Assign addresses to the ROMs, but don't enable them yet
- * Also note that we only map display card ROMs due to PIO mapping
- * space scarcity.
- */
- if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
- unsigned long addr;
- size = dev->resource[PCI_ROM_RESOURCE].end -
- dev->resource[PCI_ROM_RESOURCE].start;
-
- if (size) {
- addr = (unsigned long) pciio_pio_addr(vhdl, 0,
- PCIIO_SPACE_ROM,
- 0, size, 0, PIOMAP_FIXED);
- if (!addr) {
- dev->resource[PCI_ROM_RESOURCE].start = 0;
- dev->resource[PCI_ROM_RESOURCE].end = 0;
- printk("sn_pci_fixup(): ROM pio map failure "
- "for %s\n", dev->slot_name);
- }
- addr |= __IA64_UNCACHED_OFFSET;
- dev->resource[PCI_ROM_RESOURCE].start = addr;
- dev->resource[PCI_ROM_RESOURCE].end = addr + size;
- dev->resource[idx].parent = &iomem_resource;
- if (dev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
- } else {
- /*
- * Remove other ROM resources since they don't have valid
- * CPU addresses.
- */
- size = dev->resource[PCI_ROM_RESOURCE].end -
- dev->resource[PCI_ROM_RESOURCE].start;
-
- if (size) {
- dev->resource[PCI_ROM_RESOURCE].start = 0;
- dev->resource[PCI_ROM_RESOURCE].end = 0;
- dev->resource[PCI_ROM_RESOURCE].flags = 0;
- }
- }
-
- /*
- * Update the Command Word on the Card.
- */
- cmd |= PCI_COMMAND_MASTER; /* If the device doesn't support */
- /* bit gets dropped .. no harm */
- pci_write_config_word(dev, PCI_COMMAND, cmd);
-
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, (unsigned char *)&lines);
- device_vertex = device_sysdata->vhdl;
- pci_provider = device_sysdata->pci_provider;
- device_sysdata->intr_handle = NULL;
-
- if (!lines)
- return 0;
-
- irqpdaindr->curr = dev;
-
- intr_handle = (pci_provider->intr_alloc)(device_vertex, NULL, lines, device_vertex);
- if (intr_handle == NULL) {
- printk(KERN_WARNING "sn_pci_fixup: pcibr_intr_alloc() failed\n");
- kfree(pci_sysdata);
- kfree(device_sysdata);
- return -ENOMEM;
- }
-
- device_sysdata->intr_handle = intr_handle;
- irq = intr_handle->pi_irq;
- irqpdaindr->device_dev[irq] = dev;
- (pci_provider->intr_connect)(intr_handle, (intr_func_t)0, (intr_arg_t)0);
- dev->irq = irq;
-
- register_pcibr_intr(irq, (pcibr_intr_t)intr_handle);
-
- for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) {
- int ibits = ((pcibr_intr_t)intr_handle)->bi_ibits;
- int i;
-
- size = dev->resource[idx].end -
- dev->resource[idx].start;
- if (size == 0) continue;
-
- for (i=0; i<8; i++) {
- if (ibits & (1 << i) ) {
- extern pcibr_info_t pcibr_info_get(vertex_hdl_t);
- device_sysdata->dma_flush_list =
- sn_dma_flush_init(dev->resource[idx].start,
- dev->resource[idx].end,
- idx,
- i,
- PCIBR_INFO_SLOT_GET_EXT(pcibr_info_get(device_sysdata->vhdl)));
- }
- }
- }
- return 0;
-}
-
-#ifdef CONFIG_HOTPLUG_PCI_SGI
-
-void
-sn_dma_flush_clear(struct sn_flush_device_list *dma_flush_list,
- unsigned long start, unsigned long end)
-{
-
- int i;
-
- dma_flush_list->pin = -1;
- dma_flush_list->bus = -1;
- dma_flush_list->slot = -1;
-
- for (i = 0; i < PCI_ROM_RESOURCE; i++)
- if ((dma_flush_list->bar_list[i].start == start) &&
- (dma_flush_list->bar_list[i].end == end)) {
- dma_flush_list->bar_list[i].start = 0;
- dma_flush_list->bar_list[i].end = 0;
- break;
- }
-
-}
-
-/*
- * sn_pci_unfixup_slot() - This routine frees a slot's resources
- * consistent with the Linux PCI abstraction layer. Resources released
- * back to our PCI provider include PIO maps to BAR space and interrupt
- * objects.
- */
-void
-sn_pci_unfixup_slot(struct pci_dev *dev)
-{
- struct sn_device_sysdata *device_sysdata;
- vertex_hdl_t vhdl;
- pciio_intr_t intr_handle;
- unsigned int irq;
- unsigned long size;
- int idx;
-
- device_sysdata = SN_DEVICE_SYSDATA(dev);
-
- vhdl = device_sysdata->vhdl;
-
- if (device_sysdata->dma_flush_list)
- for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) {
- size = dev->resource[idx].end -
- dev->resource[idx].start;
- if (size == 0) continue;
-
- sn_dma_flush_clear(device_sysdata->dma_flush_list,
- dev->resource[idx].start,
- dev->resource[idx].end);
- }
-
- intr_handle = device_sysdata->intr_handle;
- if (intr_handle) {
- extern void unregister_pcibr_intr(int, pcibr_intr_t);
- irq = intr_handle->pi_irq;
- irqpdaindr->device_dev[irq] = NULL;
- unregister_pcibr_intr(irq, (pcibr_intr_t) intr_handle);
- pciio_intr_disconnect(intr_handle);
- pciio_intr_free(intr_handle);
- }
-
- for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) {
- if (device_sysdata->pio_map[idx]) {
- pciio_piomap_done (device_sysdata->pio_map[idx]);
- pciio_piomap_free (device_sysdata->pio_map[idx]);
- }
- }
-
-}
-#endif /* CONFIG_HOTPLUG_PCI_SGI */
-
-struct sn_flush_nasid_entry flush_nasid_list[MAX_NASIDS];
-
-/* Initialize the data structures for flushing write buffers after a PIO read.
- * The theory is:
- * Take an unused int. pin and associate it with a pin that is in use.
- * After a PIO read, force an interrupt on the unused pin, forcing a write buffer flush
- * on the in use pin. This will prevent the race condition between PIO read responses and
- * DMA writes.
- */
-static struct sn_flush_device_list *
-sn_dma_flush_init(unsigned long start, unsigned long end, int idx, int pin, int slot)
-{
- nasid_t nasid;
- unsigned long dnasid;
- int wid_num;
- int bus;
- struct sn_flush_device_list *p;
- void *b;
- int bwin;
- int i;
-
- nasid = NASID_GET(start);
- wid_num = SWIN_WIDGETNUM(start);
- bus = (start >> 23) & 0x1;
- bwin = BWIN_WINDOWNUM(start);
-
- if (flush_nasid_list[nasid].widget_p == NULL) {
- flush_nasid_list[nasid].widget_p = (struct sn_flush_device_list **)kmalloc((HUB_WIDGET_ID_MAX+1) *
- sizeof(struct sn_flush_device_list *), GFP_KERNEL);
- if (!flush_nasid_list[nasid].widget_p) {
- printk(KERN_WARNING "sn_dma_flush_init: Cannot allocate memory for nasid list\n");
- return NULL;
- }
- memset(flush_nasid_list[nasid].widget_p, 0, (HUB_WIDGET_ID_MAX+1) * sizeof(struct sn_flush_device_list *));
- }
- if (bwin > 0) {
- int itte_index = bwin - 1;
- unsigned long itte;
-
- itte = HUB_L(IIO_ITTE_GET(nasid, itte_index));
- flush_nasid_list[nasid].iio_itte[bwin] = itte;
- wid_num = (itte >> IIO_ITTE_WIDGET_SHIFT)
- & IIO_ITTE_WIDGET_MASK;
- bus = itte & IIO_ITTE_OFFSET_MASK;
- if (bus == 0x4 || bus == 0x8) {
- bus = 0;
- } else {
- bus = 1;
- }
- }
-
- /* if it's IO9, bus 1, we don't care about slots 1 and 4. This is
- * because these are the IOC4 slots and we don't flush them.
- */
- if (isIO9(nasid) && bus == 0 && (slot == 1 || slot == 4)) {
- return NULL;
- }
- if (flush_nasid_list[nasid].widget_p[wid_num] == NULL) {
- flush_nasid_list[nasid].widget_p[wid_num] = (struct sn_flush_device_list *)kmalloc(
- DEV_PER_WIDGET * sizeof (struct sn_flush_device_list), GFP_KERNEL);
- if (!flush_nasid_list[nasid].widget_p[wid_num]) {
- printk(KERN_WARNING "sn_dma_flush_init: Cannot allocate memory for nasid sub-list\n");
- return NULL;
- }
- memset(flush_nasid_list[nasid].widget_p[wid_num], 0,
- DEV_PER_WIDGET * sizeof (struct sn_flush_device_list));
- p = &flush_nasid_list[nasid].widget_p[wid_num][0];
- for (i=0; i<DEV_PER_WIDGET;i++) {
- p->bus = -1;
- p->pin = -1;
- p->slot = -1;
- p++;
- }
- }
-
- p = &flush_nasid_list[nasid].widget_p[wid_num][0];
- for (i=0;i<DEV_PER_WIDGET; i++) {
- if (p->pin == pin && p->bus == bus && p->slot == slot) break;
- if (p->pin < 0) {
- p->pin = pin;
- p->bus = bus;
- p->slot = slot;
- break;
- }
- p++;
- }
-
- for (i=0; i<PCI_ROM_RESOURCE; i++) {
- if (p->bar_list[i].start == 0) {
- p->bar_list[i].start = start;
- p->bar_list[i].end = end;
- break;
- }
- }
- b = (void *)(NODE_SWIN_BASE(nasid, wid_num) | (bus << 23) );
-
- /* If it's IO9, then slot 2 maps to slot 7 and slot 6 maps to slot 8.
- * To see this is non-trivial. By drawing pictures and reading manuals and talking
- * to HW guys, we can see that on IO9 bus 1, slots 7 and 8 are always unused.
- * Further, since we short-circuit slots 1, 3, and 4 above, we only have to worry
- * about the case when there is a card in slot 2. A multifunction card will appear
- * to be in slot 6 (from an interrupt point of view) also. That's the most we'll
- * have to worry about. A four function card will overload the interrupt lines in
- * slot 2 and 6.
- * We also need to special case the 12160 device in slot 3. Fortunately, we have
- * a spare intr. line for pin 4, so we'll use that for the 12160.
- * All other buses have slot 3 and 4 and slots 7 and 8 unused. Since we can only
- * see slots 1 and 2 and slots 5 and 6 coming through here for those buses (this
- * is true only on Pxbricks with 2 physical slots per bus), we just need to add
- * 2 to the slot number to find an unused slot.
- * We have convinced ourselves that we will never see a case where two different cards
- * in two different slots will ever share an interrupt line, so there is no need to
- * special case this.
- */
-
- if (isIO9(nasid) && ( (IS_ALTIX(nasid) && wid_num == 0xc)
- || (IS_OPUS(nasid) && wid_num == 0xf) )
- && bus == 0) {
- if (pin == 1) {
- p->force_int_addr = (unsigned long)pcireg_bridge_force_always_addr_get(b, 6);
- pcireg_bridge_intr_device_bit_set(b, (1<<18));
- dnasid = NASID_GET(virt_to_phys(&p->flush_addr));
- pcireg_bridge_intr_addr_set(b, 6, ((virt_to_phys(&p->flush_addr) & 0xfffffffff) |
- (dnasid << 36) | (0xfUL << 48)));
- } else if (pin == 2) { /* 12160 SCSI device in IO9 */
- p->force_int_addr = (unsigned long)pcireg_bridge_force_always_addr_get(b, 4);
- pcireg_bridge_intr_device_bit_set(b, (2<<12));
- dnasid = NASID_GET(virt_to_phys(&p->flush_addr));
- pcireg_bridge_intr_addr_set(b, 4,
- ((virt_to_phys(&p->flush_addr) & 0xfffffffff) |
- (dnasid << 36) | (0xfUL << 48)));
- } else { /* slot == 6 */
- p->force_int_addr = (unsigned long)pcireg_bridge_force_always_addr_get(b, 7);
- pcireg_bridge_intr_device_bit_set(b, (5<<21));
- dnasid = NASID_GET(virt_to_phys(&p->flush_addr));
- pcireg_bridge_intr_addr_set(b, 7,
- ((virt_to_phys(&p->flush_addr) & 0xfffffffff) |
- (dnasid << 36) | (0xfUL << 48)));
- }
- } else {
- p->force_int_addr = (unsigned long)pcireg_bridge_force_always_addr_get(b, (pin +2));
- pcireg_bridge_intr_device_bit_set(b, (pin << (pin * 3)));
- dnasid = NASID_GET(virt_to_phys(&p->flush_addr));
- pcireg_bridge_intr_addr_set(b, (pin + 2),
- ((virt_to_phys(&p->flush_addr) & 0xfffffffff) |
- (dnasid << 36) | (0xfUL << 48)));
- }
- return p;
-}
-
-
-/*
- * linux_bus_cvlink() Creates a link between the Linux PCI Bus number
- * to the actual hardware component that it represents:
- * /dev/hw/linux/busnum/0 -> ../../../hw/module/001c01/slab/0/Ibrick/xtalk/15/pci
- *
- * The bus vertex, when called to devfs_generate_path() returns:
- * hw/module/001c01/slab/0/Ibrick/xtalk/15/pci
- * hw/module/001c01/slab/1/Pbrick/xtalk/12/pci-x/0
- * hw/module/001c01/slab/1/Pbrick/xtalk/12/pci-x/1
- */
-void
-linux_bus_cvlink(void)
-{
- char name[8];
- int index;
-
- for (index=0; index < MAX_PCI_XWIDGET; index++) {
- if (!busnum_to_pcibr_vhdl[index])
- continue;
-
- sprintf(name, "%x", index);
- (void) hwgraph_edge_add(linux_busnum, busnum_to_pcibr_vhdl[index],
- name);
- }
-}
-
-/*
- * pci_bus_map_create() - Called by pci_bus_to_hcl_cvlink() to finish the job.
- *
- * Linux PCI Bus numbers are assigned from lowest module_id numbers
- * (rack/slot etc.)
- */
-static int
-pci_bus_map_create(struct pcibr_list_s *softlistp, moduleid_t moduleid)
-{
-
- int basebus_num, bus_number;
- vertex_hdl_t pci_bus = softlistp->bl_vhdl;
- char moduleid_str[16];
-
- memset(moduleid_str, 0, 16);
- format_module_id(moduleid_str, moduleid, MODULE_FORMAT_BRIEF);
- (void) ioconfig_get_busnum((char *)moduleid_str, &basebus_num);
-
- /*
- * Assign the correct bus number and also the nasid of this
- * pci Xwidget.
- */
- bus_number = basebus_num + pcibr_widget_to_bus(pci_bus);
-#ifdef DEBUG
- {
- char hwpath[MAXDEVNAME] = "\0";
- extern int hwgraph_vertex_name_get(vertex_hdl_t, char *, uint);
-
- pcibr_soft_t pcibr_soft = softlistp->bl_soft;
- hwgraph_vertex_name_get(pci_bus, hwpath, MAXDEVNAME);
- printk("%s:\n\tbus_num %d, basebus_num %d, brick_bus %d, "
- "bus_vhdl 0x%lx, brick_type %d\n", hwpath, bus_number,
- basebus_num, pcibr_widget_to_bus(pci_bus),
- (uint64_t)pci_bus, pcibr_soft->bs_bricktype);
- }
-#endif
- busnum_to_pcibr_vhdl[bus_number] = pci_bus;
-
- /*
- * Pre assign DMA maps needed for 32 Bits Page Map DMA.
- */
- busnum_to_atedmamaps[bus_number] = (void *) vmalloc(
- sizeof(struct pcibr_dmamap_s)*MAX_ATE_MAPS);
- if (busnum_to_atedmamaps[bus_number] <= 0) {
- printk("pci_bus_map_create: Cannot allocate memory for ate maps\n");
- return -1;
- }
- memset(busnum_to_atedmamaps[bus_number], 0x0,
- sizeof(struct pcibr_dmamap_s) * MAX_ATE_MAPS);
- return(0);
-}
-
-/*
- * pci_bus_to_hcl_cvlink() - This routine is called after SGI IO Infrastructure
- * initialization has completed to set up the mappings between PCI BRIDGE
- * ASIC and logical pci bus numbers.
- *
- * Must be called before pci_init() is invoked.
- */
-int
-pci_bus_to_hcl_cvlink(void)
-{
- int i;
- extern pcibr_list_p pcibr_list;
-
- for (i = 0; i < nummodules; i++) {
- struct pcibr_list_s *softlistp = pcibr_list;
- struct pcibr_list_s *first_in_list = NULL;
- struct pcibr_list_s *last_in_list = NULL;
-
- /* Walk the list of pcibr_soft structs looking for matches */
- while (softlistp) {
- struct pcibr_soft_s *pcibr_soft = softlistp->bl_soft;
- moduleid_t moduleid;
-
- /* Is this PCI bus associated with this moduleid? */
- moduleid = NODE_MODULEID(
- nasid_to_cnodeid(pcibr_soft->bs_nasid));
- if (sn_modules[i]->id == moduleid) {
- struct pcibr_list_s *new_element;
-
- new_element = kmalloc(sizeof (struct pcibr_soft_s), GFP_KERNEL);
- if (new_element == NULL) {
- printk("%s: Couldn't allocate memory\n",__FUNCTION__);
- return -ENOMEM;
- }
- new_element->bl_soft = softlistp->bl_soft;
- new_element->bl_vhdl = softlistp->bl_vhdl;
- new_element->bl_next = NULL;
-
- /* list empty so just put it on the list */
- if (first_in_list == NULL) {
- first_in_list = new_element;
- last_in_list = new_element;
- softlistp = softlistp->bl_next;
- continue;
- }
-
- /*
- * BASEIO IObricks attached to a module have
- * a higher priority than non BASEIO IOBricks
- * when it comes to persistant pci bus
- * numbering, so put them on the front of the
- * list.
- */
- if (isIO9(pcibr_soft->bs_nasid)) {
- new_element->bl_next = first_in_list;
- first_in_list = new_element;
- } else {
- last_in_list->bl_next = new_element;
- last_in_list = new_element;
- }
- }
- softlistp = softlistp->bl_next;
- }
-
- /*
- * We now have a list of all the pci bridges associated with
- * the module_id, sn_modules[i]. Call pci_bus_map_create() for
- * each pci bridge
- */
- softlistp = first_in_list;
- while (softlistp) {
- moduleid_t iobrick;
- struct pcibr_list_s *next = softlistp->bl_next;
- iobrick = iomoduleid_get(softlistp->bl_soft->bs_nasid);
- pci_bus_map_create(softlistp, iobrick);
- kfree(softlistp);
- softlistp = next;
- }
- }
-
- /*
- * Create the Linux PCI bus number vertex link.
- */
- (void)linux_bus_cvlink();
- (void)ioconfig_bus_new_entries();
-
- return(0);
-}
-
-/*
- * Ugly hack to get PCI setup until we have a proper ACPI namespace.
- */
-
-#define PCI_BUSES_TO_SCAN 256
-
-extern struct pci_ops sn_pci_ops;
-int __init
-sn_pci_init (void)
-{
- int i = 0;
- struct pci_controller *controller;
- struct list_head *ln;
- struct pci_bus *pci_bus = NULL;
- struct pci_dev *pci_dev = NULL;
- int ret;
-#ifdef CONFIG_PROC_FS
- extern void register_sn_procfs(void);
-#endif
- extern void sgi_master_io_infr_init(void);
- extern void sn_init_cpei_timer(void);
-
-
- if (!ia64_platform_is("sn2") || IS_RUNNING_ON_SIMULATOR())
- return 0;
-
- /*
- * This is needed to avoid bounce limit checks in the blk layer
- */
- ia64_max_iommu_merge_mask = ~PAGE_MASK;
-
- /*
- * set pci_raw_ops, etc.
- */
- sgi_master_io_infr_init();
-
- sn_init_cpei_timer();
-
-#ifdef CONFIG_PROC_FS
- register_sn_procfs();
-#endif
-
- controller = kmalloc(sizeof(struct pci_controller), GFP_KERNEL);
- if (!controller) {
- printk(KERN_WARNING "cannot allocate PCI controller\n");
- return 0;
- }
-
- memset(controller, 0, sizeof(struct pci_controller));
-
- for (i = 0; i < PCI_BUSES_TO_SCAN; i++)
- if (pci_bus_to_vertex(i))
- pci_scan_bus(i, &sn_pci_ops, controller);
-
- done_probing = 1;
-
- /*
- * Initialize the pci bus vertex in the pci_bus struct.
- */
- for( ln = pci_root_buses.next; ln != &pci_root_buses; ln = ln->next) {
- pci_bus = pci_bus_b(ln);
- ret = sn_pci_fixup_bus(pci_bus);
- if ( ret ) {
- printk(KERN_WARNING
- "sn_pci_fixup: sn_pci_fixup_bus fails : error %d\n",
- ret);
- return 0;
- }
- }
-
- /*
- * set the root start and end so that drivers calling check_region()
- * won't see a conflict
- */
- ioport_resource.start = 0xc000000000000000;
- ioport_resource.end = 0xcfffffffffffffff;
-
- /*
- * Set the root start and end for Mem Resource.
- */
- iomem_resource.start = 0;
- iomem_resource.end = 0xffffffffffffffff;
-
- /*
- * Initialize the device vertex in the pci_dev struct.
- */
- while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
- ret = sn_pci_fixup_slot(pci_dev);
- if ( ret ) {
- printk(KERN_WARNING
- "sn_pci_fixup: sn_pci_fixup_slot fails : error %d\n",
- ret);
- return 0;
- }
- }
-
- return 0;
-}
-
-subsys_initcall(sn_pci_init);
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000,2002-2003 Silicon Graphics, Inc. All rights reserved.
- *
- * Routines for PCI DMA mapping. See Documentation/DMA-mapping.txt for
- * a description of how these routines should be used.
- */
-
-#include <linux/module.h>
-#include <asm/sn/pci/pci_bus_cvlink.h>
-
-/*
- * For ATE allocations
- */
-pciio_dmamap_t get_free_pciio_dmamap(vertex_hdl_t);
-void free_pciio_dmamap(pcibr_dmamap_t);
-static struct pcibr_dmamap_s *find_sn_dma_map(dma_addr_t, unsigned char);
-void sn_pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction);
-
-/*
- * Toplogy stuff
- */
-extern vertex_hdl_t busnum_to_pcibr_vhdl[];
-extern nasid_t busnum_to_nid[];
-extern void * busnum_to_atedmamaps[];
-
-/**
- * get_free_pciio_dmamap - find and allocate an ATE
- * @pci_bus: PCI bus to get an entry for
- *
- * Finds and allocates an ATE on the PCI bus specified
- * by @pci_bus.
- */
-pciio_dmamap_t
-get_free_pciio_dmamap(vertex_hdl_t pci_bus)
-{
- int i;
- struct pcibr_dmamap_s *sn_dma_map = NULL;
-
- /*
- * Darn, we need to get the maps allocated for this bus.
- */
- for (i = 0; i < MAX_PCI_XWIDGET; i++) {
- if (busnum_to_pcibr_vhdl[i] == pci_bus) {
- sn_dma_map = busnum_to_atedmamaps[i];
- }
- }
-
- /*
- * Now get a free dmamap entry from this list.
- */
- for (i = 0; i < MAX_ATE_MAPS; i++, sn_dma_map++) {
- if (!sn_dma_map->bd_dma_addr) {
- sn_dma_map->bd_dma_addr = -1;
- return( (pciio_dmamap_t) sn_dma_map );
- }
- }
-
- return NULL;
-}
-
-/**
- * free_pciio_dmamap - free an ATE
- * @dma_map: ATE to free
- *
- * Frees the ATE specified by @dma_map.
- */
-void
-free_pciio_dmamap(pcibr_dmamap_t dma_map)
-{
- dma_map->bd_dma_addr = 0;
-}
-
-/**
- * find_sn_dma_map - find an ATE associated with @dma_addr and @busnum
- * @dma_addr: DMA address to look for
- * @busnum: PCI bus to look on
- *
- * Finds the ATE associated with @dma_addr and @busnum.
- */
-static struct pcibr_dmamap_s *
-find_sn_dma_map(dma_addr_t dma_addr, unsigned char busnum)
-{
-
- struct pcibr_dmamap_s *sn_dma_map = NULL;
- int i;
-
- sn_dma_map = busnum_to_atedmamaps[busnum];
-
- for (i = 0; i < MAX_ATE_MAPS; i++, sn_dma_map++) {
- if (sn_dma_map->bd_dma_addr == dma_addr) {
- return sn_dma_map;
- }
- }
-
- return NULL;
-}
-
-/**
- * sn_pci_alloc_consistent - allocate memory for coherent DMA
- * @hwdev: device to allocate for
- * @size: size of the region
- * @dma_handle: DMA (bus) address
- *
- * pci_alloc_consistent() returns a pointer to a memory region suitable for
- * coherent DMA traffic to/from a PCI device. On SN platforms, this means
- * that @dma_handle will have the %PCIIO_DMA_CMD flag set.
- *
- * This interface is usually used for "command" streams (e.g. the command
- * queue for a SCSI controller). See Documentation/DMA-mapping.txt for
- * more information.
- *
- * Also known as platform_pci_alloc_consistent() by the IA64 machvec code.
- */
-void *
-sn_pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle)
-{
- void *cpuaddr;
- vertex_hdl_t vhdl;
- struct sn_device_sysdata *device_sysdata;
- unsigned long phys_addr;
- pcibr_dmamap_t dma_map = 0;
-
- /*
- * Get hwgraph vertex for the device
- */
- device_sysdata = SN_DEVICE_SYSDATA(hwdev);
- vhdl = device_sysdata->vhdl;
-
- /*
- * Allocate the memory.
- * FIXME: We should be doing alloc_pages_node for the node closest
- * to the PCI device.
- */
- if (!(cpuaddr = (void *)__get_free_pages(GFP_ATOMIC, get_order(size))))
- return NULL;
-
- memset(cpuaddr, 0x0, size);
-
- /* physical addr. of the memory we just got */
- phys_addr = __pa(cpuaddr);
-
- /*
- * 64 bit address translations should never fail.
- * 32 bit translations can fail if there are insufficient mapping
- * resources and the direct map is already wired to a different
- * 2GB range.
- * 32 bit translations can also return a > 32 bit address, because
- * pcibr_dmatrans_addr ignores a missing PCIIO_DMA_A64 flag on
- * PCI-X buses.
- */
- if (hwdev->dev.coherent_dma_mask == ~0UL)
- *dma_handle = pcibr_dmatrans_addr(vhdl, NULL, phys_addr, size,
- PCIIO_DMA_CMD | PCIIO_DMA_A64);
- else {
- dma_map = pcibr_dmamap_alloc(vhdl, NULL, size, PCIIO_DMA_CMD |
- MINIMAL_ATE_FLAG(phys_addr, size));
- if (dma_map) {
- *dma_handle = (dma_addr_t)
- pcibr_dmamap_addr(dma_map, phys_addr, size);
- dma_map->bd_dma_addr = *dma_handle;
- }
- else {
- *dma_handle = pcibr_dmatrans_addr(vhdl, NULL, phys_addr, size,
- PCIIO_DMA_CMD);
- }
- }
-
- if (!*dma_handle || *dma_handle > hwdev->dev.coherent_dma_mask) {
- if (dma_map) {
- pcibr_dmamap_done(dma_map);
- pcibr_dmamap_free(dma_map);
- }
- free_pages((unsigned long) cpuaddr, get_order(size));
- return NULL;
- }
-
- return cpuaddr;
-}
-
-/**
- * sn_pci_free_consistent - free memory associated with coherent DMAable region
- * @hwdev: device to free for
- * @size: size to free
- * @vaddr: kernel virtual address to free
- * @dma_handle: DMA address associated with this region
- *
- * Frees the memory allocated by pci_alloc_consistent(). Also known
- * as platform_pci_free_consistent() by the IA64 machvec code.
- */
-void
-sn_pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle)
-{
- struct pcibr_dmamap_s *dma_map = NULL;
-
- /*
- * Get the sn_dma_map entry.
- */
- if (IS_PCI32_MAPPED(dma_handle))
- dma_map = find_sn_dma_map(dma_handle, hwdev->bus->number);
-
- /*
- * and free it if necessary...
- */
- if (dma_map) {
- pcibr_dmamap_done(dma_map);
- pcibr_dmamap_free(dma_map);
- }
- free_pages((unsigned long) vaddr, get_order(size));
-}
-
-/**
- * sn_pci_map_sg - map a scatter-gather list for DMA
- * @hwdev: device to map for
- * @sg: scatterlist to map
- * @nents: number of entries
- * @direction: direction of the DMA transaction
- *
- * Maps each entry of @sg for DMA. Also known as platform_pci_map_sg by the
- * IA64 machvec code.
- */
-int
-sn_pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction)
-{
- int i;
- vertex_hdl_t vhdl;
- unsigned long phys_addr;
- struct sn_device_sysdata *device_sysdata;
- pcibr_dmamap_t dma_map;
- struct scatterlist *saved_sg = sg;
- unsigned dma_flag;
-
- /* can't go anywhere w/o a direction in life */
- if (direction == PCI_DMA_NONE)
- BUG();
-
- /*
- * Get the hwgraph vertex for the device
- */
- device_sysdata = SN_DEVICE_SYSDATA(hwdev);
- vhdl = device_sysdata->vhdl;
-
- /*
- * 64 bit DMA mask can use direct translations
- * PCI only
- * 32 bit DMA mask might be able to use direct, otherwise use dma map
- * PCI-X
- * only 64 bit DMA mask supported; both direct and dma map will fail
- */
- if (hwdev->dma_mask == ~0UL)
- dma_flag = PCIIO_DMA_DATA | PCIIO_DMA_A64;
- else
- dma_flag = PCIIO_DMA_DATA;
-
- /*
- * Setup a DMA address for each entry in the
- * scatterlist.
- */
- for (i = 0; i < nents; i++, sg++) {
- phys_addr = __pa((unsigned long)page_address(sg->page) + sg->offset);
- sg->dma_address = pcibr_dmatrans_addr(vhdl, NULL, phys_addr,
- sg->length, dma_flag);
- if (sg->dma_address) {
- sg->dma_length = sg->length;
- continue;
- }
-
- dma_map = pcibr_dmamap_alloc(vhdl, NULL, sg->length,
- PCIIO_DMA_DATA|MINIMAL_ATE_FLAG(phys_addr, sg->length));
- if (!dma_map) {
- printk(KERN_ERR "sn_pci_map_sg: Unable to allocate "
- "anymore 32 bit page map entries.\n");
- /*
- * We will need to free all previously allocated entries.
- */
- if (i > 0) {
- sn_pci_unmap_sg(hwdev, saved_sg, i, direction);
- }
- return (0);
- }
-
- sg->dma_address = pcibr_dmamap_addr(dma_map, phys_addr, sg->length);
- sg->dma_length = sg->length;
- dma_map->bd_dma_addr = sg->dma_address;
- }
-
- return nents;
-
-}
-
-/**
- * sn_pci_unmap_sg - unmap a scatter-gather list
- * @hwdev: device to unmap
- * @sg: scatterlist to unmap
- * @nents: number of scatterlist entries
- * @direction: DMA direction
- *
- * Unmap a set of streaming mode DMA translations. Again, cpu read rules
- * concerning calls here are the same as for pci_unmap_single() below. Also
- * known as sn_pci_unmap_sg() by the IA64 machvec code.
- */
-void
-sn_pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction)
-{
- int i;
- struct pcibr_dmamap_s *dma_map;
-
- /* can't go anywhere w/o a direction in life */
- if (direction == PCI_DMA_NONE)
- BUG();
-
- for (i = 0; i < nents; i++, sg++){
-
- if (IS_PCI32_MAPPED(sg->dma_address)) {
- dma_map = find_sn_dma_map(sg->dma_address, hwdev->bus->number);
- if (dma_map) {
- pcibr_dmamap_done(dma_map);
- pcibr_dmamap_free(dma_map);
- }
- }
-
- sg->dma_address = (dma_addr_t)NULL;
- sg->dma_length = 0;
- }
-}
-
-/**
- * sn_pci_map_single - map a single region for DMA
- * @hwdev: device to map for
- * @ptr: kernel virtual address of the region to map
- * @size: size of the region
- * @direction: DMA direction
- *
- * Map the region pointed to by @ptr for DMA and return the
- * DMA address. Also known as platform_pci_map_single() by
- * the IA64 machvec code.
- *
- * We map this to the one step pcibr_dmamap_trans interface rather than
- * the two step pcibr_dmamap_alloc/pcibr_dmamap_addr because we have
- * no way of saving the dmamap handle from the alloc to later free
- * (which is pretty much unacceptable).
- *
- * TODO: simplify our interface;
- * get rid of dev_desc and vhdl (seems redundant given a pci_dev);
- * figure out how to save dmamap handle so can use two step.
- */
-dma_addr_t
-sn_pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction)
-{
- vertex_hdl_t vhdl;
- dma_addr_t dma_addr;
- unsigned long phys_addr;
- struct sn_device_sysdata *device_sysdata;
- pcibr_dmamap_t dma_map = NULL;
- unsigned dma_flag;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- /*
- * find vertex for the device
- */
- device_sysdata = SN_DEVICE_SYSDATA(hwdev);
- vhdl = device_sysdata->vhdl;
-
- phys_addr = __pa(ptr);
- /*
- * 64 bit DMA mask can use direct translations
- * PCI only
- * 32 bit DMA mask might be able to use direct, otherwise use dma map
- * PCI-X
- * only 64 bit DMA mask supported; both direct and dma map will fail
- */
- if (hwdev->dma_mask == ~0UL)
- dma_flag = PCIIO_DMA_DATA | PCIIO_DMA_A64;
- else
- dma_flag = PCIIO_DMA_DATA;
-
- dma_addr = pcibr_dmatrans_addr(vhdl, NULL, phys_addr, size, dma_flag);
- if (dma_addr)
- return dma_addr;
-
- /*
- * It's a 32 bit card and we cannot do direct mapping so
- * let's use the PMU instead.
- */
- dma_map = NULL;
- dma_map = pcibr_dmamap_alloc(vhdl, NULL, size, PCIIO_DMA_DATA |
- MINIMAL_ATE_FLAG(phys_addr, size));
-
- /* PMU out of entries */
- if (!dma_map)
- return 0;
-
- dma_addr = (dma_addr_t) pcibr_dmamap_addr(dma_map, phys_addr, size);
- dma_map->bd_dma_addr = dma_addr;
-
- return ((dma_addr_t)dma_addr);
-}
-
-/**
- * sn_pci_unmap_single - unmap a region used for DMA
- * @hwdev: device to unmap
- * @dma_addr: DMA address to unmap
- * @size: size of region
- * @direction: DMA direction
- *
- * Unmaps the region pointed to by @dma_addr. Also known as
- * platform_pci_unmap_single() by the IA64 machvec code.
- */
-void
-sn_pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction)
-{
- struct pcibr_dmamap_s *dma_map = NULL;
-
- if (direction == PCI_DMA_NONE)
- BUG();
-
- /*
- * Get the sn_dma_map entry.
- */
- if (IS_PCI32_MAPPED(dma_addr))
- dma_map = find_sn_dma_map(dma_addr, hwdev->bus->number);
-
- /*
- * and free it if necessary...
- */
- if (dma_map) {
- pcibr_dmamap_done(dma_map);
- pcibr_dmamap_free(dma_map);
- }
-}
-
-/**
- * sn_pci_dma_sync_single_* - make sure all DMAs or CPU accesses
- * have completed
- * @hwdev: device to sync
- * @dma_handle: DMA address to sync
- * @size: size of region
- * @direction: DMA direction
- *
- * This routine is supposed to sync the DMA region specified
- * by @dma_handle into the 'coherence domain'. We do not need to do
- * anything on our platform.
- */
-void
-sn_pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction)
-{
- return;
-}
-
-void
-sn_pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction)
-{
- return;
-}
-
-/**
- * sn_pci_dma_sync_sg_* - make sure all DMAs or CPU accesses have completed
- * @hwdev: device to sync
- * @sg: scatterlist to sync
- * @nents: number of entries in the scatterlist
- * @direction: DMA direction
- *
- * This routine is supposed to sync the DMA regions specified
- * by @sg into the 'coherence domain'. We do not need to do anything
- * on our platform.
- */
-void
-sn_pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction)
-{
- return;
-}
-
-void
-sn_pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction)
-{
- return;
-}
-
-/**
- * sn_dma_supported - test a DMA mask
- * @hwdev: device to test
- * @mask: DMA mask to test
- *
- * Return whether the given PCI device DMA address mask can be supported
- * properly. For example, if your device can only drive the low 24-bits
- * during PCI bus mastering, then you would pass 0x00ffffff as the mask to
- * this function. Of course, SN only supports devices that have 32 or more
- * address bits when using the PMU. We could theoretically support <32 bit
- * cards using direct mapping, but we'll worry about that later--on the off
- * chance that someone actually wants to use such a card.
- */
-int
-sn_pci_dma_supported(struct pci_dev *hwdev, u64 mask)
-{
- if (mask < 0xffffffff)
- return 0;
- return 1;
-}
-
-/*
- * New generic DMA routines just wrap sn2 PCI routines until we
- * support other bus types (if ever).
- */
-
-int
-sn_dma_supported(struct device *dev, u64 mask)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- return sn_pci_dma_supported(to_pci_dev(dev), mask);
-}
-EXPORT_SYMBOL(sn_dma_supported);
-
-int
-sn_dma_set_mask(struct device *dev, u64 dma_mask)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- if (!sn_dma_supported(dev, dma_mask))
- return 0;
-
- *dev->dma_mask = dma_mask;
- return 1;
-}
-EXPORT_SYMBOL(sn_dma_set_mask);
-
-void *
-sn_dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
- int flag)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- return sn_pci_alloc_consistent(to_pci_dev(dev), size, dma_handle);
-}
-EXPORT_SYMBOL(sn_dma_alloc_coherent);
-
-void
-sn_dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
- dma_addr_t dma_handle)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- sn_pci_free_consistent(to_pci_dev(dev), size, cpu_addr, dma_handle);
-}
-EXPORT_SYMBOL(sn_dma_free_coherent);
-
-dma_addr_t
-sn_dma_map_single(struct device *dev, void *cpu_addr, size_t size,
- int direction)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- return sn_pci_map_single(to_pci_dev(dev), cpu_addr, size, (int)direction);
-}
-EXPORT_SYMBOL(sn_dma_map_single);
-
-void
-sn_dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
- int direction)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- sn_pci_unmap_single(to_pci_dev(dev), dma_addr, size, (int)direction);
-}
-EXPORT_SYMBOL(sn_dma_unmap_single);
-
-dma_addr_t
-sn_dma_map_page(struct device *dev, struct page *page,
- unsigned long offset, size_t size,
- int direction)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- return pci_map_page(to_pci_dev(dev), page, offset, size, (int)direction);
-}
-EXPORT_SYMBOL(sn_dma_map_page);
-
-void
-sn_dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
- int direction)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- pci_unmap_page(to_pci_dev(dev), dma_address, size, (int)direction);
-}
-EXPORT_SYMBOL(sn_dma_unmap_page);
-
-int
-sn_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
- int direction)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- return sn_pci_map_sg(to_pci_dev(dev), sg, nents, (int)direction);
-}
-EXPORT_SYMBOL(sn_dma_map_sg);
-
-void
-sn_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
- int direction)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- sn_pci_unmap_sg(to_pci_dev(dev), sg, nhwentries, (int)direction);
-}
-EXPORT_SYMBOL(sn_dma_unmap_sg);
-
-void
-sn_dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
- int direction)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- sn_pci_dma_sync_single_for_cpu(to_pci_dev(dev), dma_handle, size, (int)direction);
-}
-EXPORT_SYMBOL(sn_dma_sync_single_for_cpu);
-
-void
-sn_dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
- int direction)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- sn_pci_dma_sync_single_for_device(to_pci_dev(dev), dma_handle, size, (int)direction);
-}
-EXPORT_SYMBOL(sn_dma_sync_single_for_device);
-
-void
-sn_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
- int direction)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- sn_pci_dma_sync_sg_for_cpu(to_pci_dev(dev), sg, nelems, (int)direction);
-}
-EXPORT_SYMBOL(sn_dma_sync_sg_for_cpu);
-
-void
-sn_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
- int direction)
-{
- BUG_ON(dev->bus != &pci_bus_type);
-
- sn_pci_dma_sync_sg_for_device(to_pci_dev(dev), sg, nelems, (int)direction);
-}
-EXPORT_SYMBOL(sn_dma_sync_sg_for_device);
-
-int
-sn_dma_mapping_error(dma_addr_t dma_addr)
-{
- /*
- * We can only run out of page mapping entries, so if there's
- * an error, tell the caller to try again later.
- */
- if (!dma_addr)
- return -EAGAIN;
- return 0;
-}
-
-EXPORT_SYMBOL(sn_dma_mapping_error);
-EXPORT_SYMBOL(sn_pci_unmap_single);
-EXPORT_SYMBOL(sn_pci_map_single);
-EXPORT_SYMBOL(sn_pci_dma_sync_single_for_cpu);
-EXPORT_SYMBOL(sn_pci_dma_sync_single_for_device);
-EXPORT_SYMBOL(sn_pci_dma_sync_sg_for_cpu);
-EXPORT_SYMBOL(sn_pci_dma_sync_sg_for_device);
-EXPORT_SYMBOL(sn_pci_map_sg);
-EXPORT_SYMBOL(sn_pci_unmap_sg);
-EXPORT_SYMBOL(sn_pci_alloc_consistent);
-EXPORT_SYMBOL(sn_pci_free_consistent);
-EXPORT_SYMBOL(sn_pci_dma_supported);
-
+++ /dev/null
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 2002-2003 Silicon Graphics, Inc. All Rights Reserved.
-#
-# Makefile for the sn2 io routines.
-
-obj-y += sgi_io_init.o
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/config.h>
-#include <linux/slab.h>
-#include <linux/smp.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/io.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/pda.h>
-
-extern void init_all_devices(void);
-extern void klhwg_add_all_modules(vertex_hdl_t);
-extern void klhwg_add_all_nodes(vertex_hdl_t);
-
-extern int init_hcl(void);
-extern vertex_hdl_t hwgraph_root;
-extern void io_module_init(void);
-extern int pci_bus_to_hcl_cvlink(void);
-
-nasid_t console_nasid = (nasid_t) - 1;
-char master_baseio_wid;
-
-nasid_t master_baseio_nasid;
-nasid_t master_nasid = INVALID_NASID; /* This is the partition master nasid */
-
-/*
- * per_hub_init
- *
- * This code is executed once for each Hub chip.
- */
-static void __init
-per_hub_init(cnodeid_t cnode)
-{
- nasid_t nasid;
- nodepda_t *npdap;
- ii_icmr_u_t ii_icmr;
- ii_ibcr_u_t ii_ibcr;
- ii_ilcsr_u_t ii_ilcsr;
-
- nasid = cnodeid_to_nasid(cnode);
-
- ASSERT(nasid != INVALID_NASID);
- ASSERT(nasid_to_cnodeid(nasid) == cnode);
-
- npdap = NODEPDA(cnode);
-
- /* Disable the request and reply errors. */
- REMOTE_HUB_S(nasid, IIO_IWEIM, 0xC000);
-
- /*
- * Set the total number of CRBs that can be used.
- */
- ii_icmr.ii_icmr_regval = 0x0;
- ii_icmr.ii_icmr_fld_s.i_c_cnt = 0xf;
- if (enable_shub_wars_1_1()) {
- // Set bit one of ICMR to prevent II from sending interrupt for II bug.
- ii_icmr.ii_icmr_regval |= 0x1;
- }
- REMOTE_HUB_S(nasid, IIO_ICMR, ii_icmr.ii_icmr_regval);
-
- /*
- * Set the number of CRBs that both of the BTEs combined
- * can use minus 1.
- */
- ii_ibcr.ii_ibcr_regval = 0x0;
- ii_ilcsr.ii_ilcsr_regval = REMOTE_HUB_L(nasid, IIO_LLP_CSR);
- if (ii_ilcsr.ii_ilcsr_fld_s.i_llp_stat & LNK_STAT_WORKING) {
- ii_ibcr.ii_ibcr_fld_s.i_count = 0x8;
- } else {
- /*
- * if the LLP is down, there is no attached I/O, so
- * give BTE all the CRBs.
- */
- ii_ibcr.ii_ibcr_fld_s.i_count = 0x14;
- }
- REMOTE_HUB_S(nasid, IIO_IBCR, ii_ibcr.ii_ibcr_regval);
-
- /*
- * Set CRB timeout to be 10ms.
- */
- REMOTE_HUB_S(nasid, IIO_ICTP, 0xffffff);
- REMOTE_HUB_S(nasid, IIO_ICTO, 0xff);
-
- /* Initialize error interrupts for this hub. */
- hub_error_init(cnode);
-}
-
-/*
- * This routine is responsible for the setup of all the IRIX hwgraph style
- * stuff that's been pulled into linux. It's called by sn_pci_find_bios which
- * is called just before the generic Linux PCI layer does its probing (by
- * platform_pci_fixup aka sn_pci_fixup).
- *
- * It is very IMPORTANT that this call is only made by the Master CPU!
- *
- */
-
-void __init
-sgi_master_io_infr_init(void)
-{
- cnodeid_t cnode;
-
- if (init_hcl() < 0) { /* Sets up the hwgraph compatibility layer */
- printk("sgi_master_io_infr_init: Cannot init hcl\n");
- return;
- }
-
- /*
- * Initialize platform-dependent vertices in the hwgraph:
- * module
- * node
- * cpu
- * memory
- * slot
- * hub
- * router
- * xbow
- */
-
- io_module_init(); /* Use to be called module_init() .. */
- klhwg_add_all_modules(hwgraph_root);
- klhwg_add_all_nodes(hwgraph_root);
-
- for (cnode = 0; cnode < numionodes; cnode++)
- per_hub_init(cnode);
-
- /*
- *
- * Our IO Infrastructure drivers are in place ..
- * Initialize the whole IO Infrastructure .. xwidget/device probes.
- *
- */
- init_all_devices();
- pci_bus_to_hcl_cvlink();
-}
-
-inline int
-check_nasid_equiv(nasid_t nasida, nasid_t nasidb)
-{
- if ((nasida == nasidb)
- || (nasida == NODEPDA(nasid_to_cnodeid(nasidb))->xbow_peer))
- return 1;
- else
- return 0;
-}
-
-int
-is_master_baseio_nasid_widget(nasid_t test_nasid, xwidgetnum_t test_wid)
-{
- /*
- * If the widget numbers are different, we're not the master.
- */
- if (test_wid != (xwidgetnum_t) master_baseio_wid) {
- return 0;
- }
-
- /*
- * If the NASIDs are the same or equivalent, we're the master.
- */
- if (check_nasid_equiv(test_nasid, master_baseio_nasid)) {
- return 1;
- } else {
- return 0;
- }
-}
+++ /dev/null
-# arch/ia64/sn/io/sn2/Makefile
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 2002-2003 Silicon Graphics, Inc. All Rights Reserved.
-#
-# Makefile for the sn2 specific io routines.
-#
-
-obj-y += pcibr/ ml_SN_intr.o shub_intr.o shuberror.o shub.o bte_error.o \
- pic.o geo_op.o l1_command.o klconflib.o klgraph.o ml_SN_init.o \
- ml_iograph.o module.o pciio.o xbow.o xtalk.o shubio.o
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
- */
-
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <asm/smp.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/io.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/xtalk/xtalk.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/intr.h>
-#include <asm/sn/ioerror.h>
-#include <asm/sn/sn2/shubio.h>
-#include <asm/sn/bte.h>
-
-
-/*
- * Bte error handling is done in two parts. The first captures
- * any crb related errors. Since there can be multiple crbs per
- * interface and multiple interfaces active, we need to wait until
- * all active crbs are completed. This is the first job of the
- * second part error handler. When all bte related CRBs are cleanly
- * completed, it resets the interfaces and gets them ready for new
- * transfers to be queued.
- */
-
-
-void bte_error_handler(unsigned long);
-
-
-/*
- * First part error handler. This is called whenever any error CRB interrupt
- * is generated by the II.
- */
-void
-bte_crb_error_handler(vertex_hdl_t hub_v, int btenum,
- int crbnum, ioerror_t * ioe, int bteop)
-{
- hubinfo_t hinfo;
- struct bteinfo_s *bte;
-
-
- hubinfo_get(hub_v, &hinfo);
- bte = &hinfo->h_nodepda->bte_if[btenum];
-
- /*
- * The caller has already figured out the error type, we save that
- * in the bte handle structure for the thread excercising the
- * interface to consume.
- */
- bte->bh_error = ioe->ie_errortype + BTEFAIL_OFFSET;
- bte->bte_error_count++;
-
- BTE_PRINTK(("Got an error on cnode %d bte %d: HW error type 0x%x\n",
- bte->bte_cnode, bte->bte_num, ioe->ie_errortype));
- bte_error_handler((unsigned long) hinfo->h_nodepda);
-}
-
-
-/*
- * Second part error handler. Wait until all BTE related CRBs are completed
- * and then reset the interfaces.
- */
-void
-bte_error_handler(unsigned long _nodepda)
-{
- struct nodepda_s *err_nodepda = (struct nodepda_s *) _nodepda;
- spinlock_t *recovery_lock = &err_nodepda->bte_recovery_lock;
- struct timer_list *recovery_timer = &err_nodepda->bte_recovery_timer;
- nasid_t nasid;
- int i;
- int valid_crbs;
- unsigned long irq_flags;
- volatile u64 *notify;
- bte_result_t bh_error;
- ii_imem_u_t imem; /* II IMEM Register */
- ii_icrb0_d_u_t icrbd; /* II CRB Register D */
- ii_ibcr_u_t ibcr;
- ii_icmr_u_t icmr;
- ii_ieclr_u_t ieclr;
-
-
- BTE_PRINTK(("bte_error_handler(%p) - %d\n", err_nodepda,
- smp_processor_id()));
-
- spin_lock_irqsave(recovery_lock, irq_flags);
-
- if ((err_nodepda->bte_if[0].bh_error == BTE_SUCCESS) &&
- (err_nodepda->bte_if[1].bh_error == BTE_SUCCESS)) {
- BTE_PRINTK(("eh:%p:%d Nothing to do.\n", err_nodepda,
- smp_processor_id()));
- spin_unlock_irqrestore(recovery_lock, irq_flags);
- return;
- }
- /*
- * Lock all interfaces on this node to prevent new transfers
- * from being queued.
- */
- for (i = 0; i < BTES_PER_NODE; i++) {
- if (err_nodepda->bte_if[i].cleanup_active) {
- continue;
- }
- spin_lock(&err_nodepda->bte_if[i].spinlock);
- BTE_PRINTK(("eh:%p:%d locked %d\n", err_nodepda,
- smp_processor_id(), i));
- err_nodepda->bte_if[i].cleanup_active = 1;
- }
-
- /* Determine information about our hub */
- nasid = cnodeid_to_nasid(err_nodepda->bte_if[0].bte_cnode);
-
-
- /*
- * A BTE transfer can use multiple CRBs. We need to make sure
- * that all the BTE CRBs are complete (or timed out) before
- * attempting to clean up the error. Resetting the BTE while
- * there are still BTE CRBs active will hang the BTE.
- * We should look at all the CRBs to see if they are allocated
- * to the BTE and see if they are still active. When none
- * are active, we can continue with the cleanup.
- *
- * We also want to make sure that the local NI port is up.
- * When a router resets the NI port can go down, while it
- * goes through the LLP handshake, but then comes back up.
- */
- icmr.ii_icmr_regval = REMOTE_HUB_L(nasid, IIO_ICMR);
- if (icmr.ii_icmr_fld_s.i_crb_mark != 0) {
- /*
- * There are errors which still need to be cleaned up by
- * hubiio_crb_error_handler
- */
- mod_timer(recovery_timer, HZ * 5);
- BTE_PRINTK(("eh:%p:%d Marked Giving up\n", err_nodepda,
- smp_processor_id()));
- spin_unlock_irqrestore(recovery_lock, irq_flags);
- return;
- }
- if (icmr.ii_icmr_fld_s.i_crb_vld != 0) {
-
- valid_crbs = icmr.ii_icmr_fld_s.i_crb_vld;
-
- for (i = 0; i < IIO_NUM_CRBS; i++) {
- if (!((1 << i) & valid_crbs)) {
- /* This crb was not marked as valid, ignore */
- continue;
- }
- icrbd.ii_icrb0_d_regval =
- REMOTE_HUB_L(nasid, IIO_ICRB_D(i));
- if (icrbd.d_bteop) {
- mod_timer(recovery_timer, HZ * 5);
- BTE_PRINTK(("eh:%p:%d Valid %d, Giving up\n",
- err_nodepda, smp_processor_id(), i));
- spin_unlock_irqrestore(recovery_lock,
- irq_flags);
- return;
- }
- }
- }
-
-
- BTE_PRINTK(("eh:%p:%d Cleaning up\n", err_nodepda,
- smp_processor_id()));
- /* Reenable both bte interfaces */
- imem.ii_imem_regval = REMOTE_HUB_L(nasid, IIO_IMEM);
- imem.ii_imem_fld_s.i_b0_esd = imem.ii_imem_fld_s.i_b1_esd = 1;
- REMOTE_HUB_S(nasid, IIO_IMEM, imem.ii_imem_regval);
-
- /* Clear IBLS0/1 error bits */
- ieclr.ii_ieclr_regval = 0;
- if (err_nodepda->bte_if[0].bh_error != BTE_SUCCESS)
- ieclr.ii_ieclr_fld_s.i_e_bte_0 = 1;
- if (err_nodepda->bte_if[1].bh_error != BTE_SUCCESS)
- ieclr.ii_ieclr_fld_s.i_e_bte_1 = 1;
- REMOTE_HUB_S(nasid, IIO_IECLR, ieclr.ii_ieclr_regval);
-
- /* Reinitialize both BTE state machines. */
- ibcr.ii_ibcr_regval = REMOTE_HUB_L(nasid, IIO_IBCR);
- ibcr.ii_ibcr_fld_s.i_soft_reset = 1;
- REMOTE_HUB_S(nasid, IIO_IBCR, ibcr.ii_ibcr_regval);
-
-
- for (i = 0; i < BTES_PER_NODE; i++) {
- bh_error = err_nodepda->bte_if[i].bh_error;
- if (bh_error != BTE_SUCCESS) {
- /* There is an error which needs to be notified */
- notify = err_nodepda->bte_if[i].most_rcnt_na;
- BTE_PRINTK(("cnode %d bte %d error=0x%lx\n",
- err_nodepda->bte_if[i].bte_cnode,
- err_nodepda->bte_if[i].bte_num,
- IBLS_ERROR | (u64) bh_error));
- *notify = IBLS_ERROR | bh_error;
- err_nodepda->bte_if[i].bh_error = BTE_SUCCESS;
- }
-
- err_nodepda->bte_if[i].cleanup_active = 0;
- BTE_PRINTK(("eh:%p:%d Unlocked %d\n", err_nodepda,
- smp_processor_id(), i));
- spin_unlock(&err_nodepda->bte_if[i].spinlock);
- }
-
- del_timer(recovery_timer);
-
- spin_unlock_irqrestore(recovery_lock, irq_flags);
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-/*
- * @doc file m:hwcfg
- * DESCRIPTION:
- *
- * This file contains routines for manipulating and generating
- * Geographic IDs. They are in a file by themself since they have
- * no dependencies on other modules.
- *
- * ORIGIN:
- *
- * New for SN2
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <asm/smp.h>
-#include <asm/irq.h>
-#include <asm/hw_irq.h>
-#include <asm/sn/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/io.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/xtalk/xtalk.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/intr.h>
-#include <asm/sn/sn2/shub_mmr_t.h>
-#include <asm/sn/sn2/shubio.h>
-#include <asm/sal.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/sn/module.h>
-#include <asm/sn/geo.h>
-
-/********** Global functions and data (visible outside the module) ***********/
-
-/*
- * @doc gf:geo_module
- *
- * moduleid_t geo_module(geoid_t g)
- *
- * DESCRIPTION:
- *
- * Return the moduleid component of a geoid.
- *
- * INTERNALS:
- *
- * Return INVALID_MODULE for an invalid geoid. Otherwise extract the
- * moduleid from the structure, and return it.
- *
- * ORIGIN:
- *
- * New for SN2
- */
-
-moduleid_t
-geo_module(geoid_t g)
-{
- if (g.any.type == GEO_TYPE_INVALID)
- return INVALID_MODULE;
- else
- return g.any.module;
-}
-
-
-/*
- * @doc gf:geo_slab
- *
- * slabid_t geo_slab(geoid_t g)
- *
- * DESCRIPTION:
- *
- * Return the slabid component of a geoid.
- *
- * INTERNALS:
- *
- * Return INVALID_SLAB for an invalid geoid. Otherwise extract the
- * slabid from the structure, and return it.
- *
- * ORIGIN:
- *
- * New for SN2
- */
-
-slabid_t
-geo_slab(geoid_t g)
-{
- if (g.any.type == GEO_TYPE_INVALID)
- return INVALID_SLAB;
- else
- return g.any.slab;
-}
-
-
-/*
- * @doc gf:geo_type
- *
- * geo_type_t geo_type(geoid_t g)
- *
- * DESCRIPTION:
- *
- * Return the type component of a geoid.
- *
- * INTERNALS:
- *
- * Extract the type from the structure, and return it.
- *
- * ORIGIN:
- *
- * New for SN2
- */
-
-geo_type_t
-geo_type(geoid_t g)
-{
- return g.any.type;
-}
-
-
-/*
- * @doc gf:geo_valid
- *
- * int geo_valid(geoid_t g)
- *
- * DESCRIPTION:
- *
- * Return nonzero if g has a valid geoid type.
- *
- * INTERNALS:
- *
- * Test the type against GEO_TYPE_INVALID, and return the result.
- *
- * ORIGIN:
- *
- * New for SN2
- */
-
-int
-geo_valid(geoid_t g)
-{
- return g.any.type != GEO_TYPE_INVALID;
-}
-
-
-/*
- * @doc gf:geo_cmp
- *
- * int geo_cmp(geoid_t g0, geoid_t g1)
- *
- * DESCRIPTION:
- *
- * Compare two geoid_t values, from the coarsest field to the finest.
- * The comparison should be consistent with the physical locations of
- * of the hardware named by the geoids.
- *
- * INTERNALS:
- *
- * First compare the module, then the slab, type, and type-specific fields.
- *
- * ORIGIN:
- *
- * New for SN2
- */
-
-int
-geo_cmp(geoid_t g0, geoid_t g1)
-{
- int rv;
-
- /* Compare the common fields */
- rv = MODULE_CMP(geo_module(g0), geo_module(g1));
- if (rv != 0)
- return rv;
-
- rv = geo_slab(g0) - geo_slab(g1);
- if (rv != 0)
- return rv;
-
- /* Within a slab, sort by type */
- rv = geo_type(g0) - geo_type(g1);
- if (rv != 0)
- return rv;
-
- switch(geo_type(g0)) {
- case GEO_TYPE_CPU:
- rv = g0.cpu.slice - g1.cpu.slice;
- break;
-
- case GEO_TYPE_IOCARD:
- rv = g0.pcicard.bus - g1.pcicard.bus;
- if (rv) break;
- rv = SLOTNUM_GETSLOT(g0.pcicard.slot) -
- SLOTNUM_GETSLOT(g1.pcicard.slot);
- break;
-
- case GEO_TYPE_MEM:
- rv = g0.mem.membus - g1.mem.membus;
- if (rv) break;
- rv = g0.mem.memslot - g1.mem.memslot;
- break;
-
- default:
- rv = 0;
- }
-
- return rv;
-}
-
-
-/*
- * @doc gf:geo_new
- *
- * geoid_t geo_new(geo_type_t type, ...)
- *
- * DESCRIPTION:
- *
- * Generate a new geoid_t value of the given type from its components.
- * Expected calling sequences:
- * \@itemize \@bullet
- * \@item
- * \@code\{geo_new(GEO_TYPE_INVALID)\}
- * \@item
- * \@code\{geo_new(GEO_TYPE_MODULE, moduleid_t m)\}
- * \@item
- * \@code\{geo_new(GEO_TYPE_NODE, moduleid_t m, slabid_t s)\}
- * \@item
- * \@code\{geo_new(GEO_TYPE_RTR, moduleid_t m, slabid_t s)\}
- * \@item
- * \@code\{geo_new(GEO_TYPE_IOCNTL, moduleid_t m, slabid_t s)\}
- * \@item
- * \@code\{geo_new(GEO_TYPE_IOCARD, moduleid_t m, slabid_t s, char bus, slotid_t slot)\}
- * \@item
- * \@code\{geo_new(GEO_TYPE_CPU, moduleid_t m, slabid_t s, char slice)\}
- * \@item
- * \@code\{geo_new(GEO_TYPE_MEM, moduleid_t m, slabid_t s, char membus, char slot)\}
- * \@end itemize
- *
- * Invalid types return a GEO_TYPE_INVALID geoid_t.
- *
- * INTERNALS:
- *
- * Use the type to determine which fields to expect. Write the fields into
- * a new geoid_t and return it. Note: scalars smaller than an "int" are
- * promoted to "int" by the "..." operator, so we need extra casts on "char",
- * "slotid_t", and "slabid_t".
- *
- * ORIGIN:
- *
- * New for SN2
- */
-
-geoid_t
-geo_new(geo_type_t type, ...)
-{
- va_list al;
- geoid_t g;
- memset(&g, 0, sizeof(g));
-
- va_start(al, type);
-
- /* Make sure the type is sane */
- if (type >= GEO_TYPE_MAX)
- type = GEO_TYPE_INVALID;
-
- g.any.type = type;
- if (type == GEO_TYPE_INVALID)
- goto done; /* invalid geoids have no components at all */
-
- g.any.module = va_arg(al, moduleid_t);
- if (type == GEO_TYPE_MODULE)
- goto done;
-
- g.any.slab = (slabid_t)va_arg(al, int);
-
- /* Some types have additional components */
- switch(type) {
- case GEO_TYPE_CPU:
- g.cpu.slice = (char)va_arg(al, int);
- break;
-
- case GEO_TYPE_IOCARD:
- g.pcicard.bus = (char)va_arg(al, int);
- g.pcicard.slot = (slotid_t)va_arg(al, int);
- break;
-
- case GEO_TYPE_MEM:
- g.mem.membus = (char)va_arg(al, int);
- g.mem.memslot = (char)va_arg(al, int);
- break;
-
- default:
- break;
- }
-
- done:
- va_end(al);
- return g;
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-
-#include <linux/types.h>
-#include <linux/ctype.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/sn/io.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/nodepda.h>
-#include <asm/sn/module.h>
-#include <asm/sn/router.h>
-#include <asm/sn/xtalk/xbow.h>
-#include <asm/sn/ksys/l1.h>
-
-
-#undef DEBUG_KLGRAPH
-#ifdef DEBUG_KLGRAPH
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif /* DEBUG_KLGRAPH */
-
-extern int numionodes;
-
-lboard_t *root_lboard[MAX_COMPACT_NODES];
-static int hasmetarouter;
-
-
-char brick_types[MAX_BRICK_TYPES + 1] = "crikxdpn%#=vo^34567890123456789...";
-
-lboard_t *
-find_lboard_any(lboard_t *start, unsigned char brd_type)
-{
- /* Search all boards stored on this node. */
- while (start) {
- if (start->brd_type == brd_type)
- return start;
- start = KLCF_NEXT_ANY(start);
- }
-
- /* Didn't find it. */
- return (lboard_t *)NULL;
-}
-
-lboard_t *
-find_lboard_nasid(lboard_t *start, nasid_t nasid, unsigned char brd_type)
-{
-
- while (start) {
- if ((start->brd_type == brd_type) &&
- (start->brd_nasid == nasid))
- return start;
-
- if (numionodes == numnodes)
- start = KLCF_NEXT_ANY(start);
- else
- start = KLCF_NEXT(start);
- }
-
- /* Didn't find it. */
- return (lboard_t *)NULL;
-}
-
-lboard_t *
-find_lboard_class_any(lboard_t *start, unsigned char brd_type)
-{
- /* Search all boards stored on this node. */
- while (start) {
- if (KLCLASS(start->brd_type) == KLCLASS(brd_type))
- return start;
- start = KLCF_NEXT_ANY(start);
- }
-
- /* Didn't find it. */
- return (lboard_t *)NULL;
-}
-
-lboard_t *
-find_lboard_class_nasid(lboard_t *start, nasid_t nasid, unsigned char brd_type)
-{
- /* Search all boards stored on this node. */
- while (start) {
- if (KLCLASS(start->brd_type) == KLCLASS(brd_type) &&
- (start->brd_nasid == nasid))
- return start;
-
- if (numionodes == numnodes)
- start = KLCF_NEXT_ANY(start);
- else
- start = KLCF_NEXT(start);
- }
-
- /* Didn't find it. */
- return (lboard_t *)NULL;
-}
-
-
-
-klinfo_t *
-find_component(lboard_t *brd, klinfo_t *kli, unsigned char struct_type)
-{
- int index, j;
-
- if (kli == (klinfo_t *)NULL) {
- index = 0;
- } else {
- for (j = 0; j < KLCF_NUM_COMPS(brd); j++) {
- if (kli == KLCF_COMP(brd, j))
- break;
- }
- index = j;
- if (index == KLCF_NUM_COMPS(brd)) {
- DBG("find_component: Bad pointer: 0x%p\n", kli);
- return (klinfo_t *)NULL;
- }
- index++; /* next component */
- }
-
- for (; index < KLCF_NUM_COMPS(brd); index++) {
- kli = KLCF_COMP(brd, index);
- DBG("find_component: brd %p kli %p request type = 0x%x kli type 0x%x\n", brd, kli, kli->struct_type, KLCF_COMP_TYPE(kli));
- if (KLCF_COMP_TYPE(kli) == struct_type)
- return kli;
- }
-
- /* Didn't find it. */
- return (klinfo_t *)NULL;
-}
-
-klinfo_t *
-find_first_component(lboard_t *brd, unsigned char struct_type)
-{
- return find_component(brd, (klinfo_t *)NULL, struct_type);
-}
-
-lboard_t *
-find_lboard_modslot(lboard_t *start, geoid_t geoid)
-{
- /* Search all boards stored on this node. */
- while (start) {
- if (geo_cmp(start->brd_geoid, geoid))
- return start;
- start = KLCF_NEXT(start);
- }
-
- /* Didn't find it. */
- return (lboard_t *)NULL;
-}
-
-/*
- * Convert a NIC name to a name for use in the hardware graph.
- */
-void
-nic_name_convert(char *old_name, char *new_name)
-{
- int i;
- char c;
- char *compare_ptr;
-
- if ((old_name[0] == '\0') || (old_name[1] == '\0')) {
- strcpy(new_name, EDGE_LBL_XWIDGET);
- } else {
- for (i = 0; i < strlen(old_name); i++) {
- c = old_name[i];
-
- if (isalpha(c))
- new_name[i] = tolower(c);
- else if (isdigit(c))
- new_name[i] = c;
- else
- new_name[i] = '_';
- }
- new_name[i] = '\0';
- }
-
- /* XXX -
- * Since a bunch of boards made it out with weird names like
- * IO6-fibbbed and IO6P2, we need to look for IO6 in a name and
- * replace it with "baseio" to avoid confusion in the field.
- * We also have to make sure we don't report media_io instead of
- * baseio.
- */
-
- /* Skip underscores at the beginning of the name */
- for (compare_ptr = new_name; (*compare_ptr) == '_'; compare_ptr++)
- ;
-
- /*
- * Check for some names we need to replace. Early boards
- * had junk following the name so check only the first
- * characters.
- */
- if (!strncmp(new_name, "io6", 3) ||
- !strncmp(new_name, "mio", 3) ||
- !strncmp(new_name, "media_io", 8))
- strcpy(new_name, "baseio");
- else if (!strncmp(new_name, "divo", 4))
- strcpy(new_name, "divo") ;
-
-}
-
-/*
- * get_actual_nasid
- *
- * Completely disabled brds have their klconfig on
- * some other nasid as they have no memory. But their
- * actual nasid is hidden in the klconfig. Use this
- * routine to get it. Works for normal boards too.
- */
-nasid_t
-get_actual_nasid(lboard_t *brd)
-{
- klhub_t *hub ;
-
- if (!brd)
- return INVALID_NASID ;
-
- /* find out if we are a completely disabled brd. */
-
- hub = (klhub_t *)find_first_component(brd, KLSTRUCT_HUB);
- if (!hub)
- return INVALID_NASID ;
- if (!(hub->hub_info.flags & KLINFO_ENABLE)) /* disabled node brd */
- return hub->hub_info.physid ;
- else
- return brd->brd_nasid ;
-}
-
-int
-xbow_port_io_enabled(nasid_t nasid, int link)
-{
- lboard_t *brd;
- klxbow_t *xbow_p;
-
- /*
- * look for boards that might contain an xbow or xbridge
- */
- brd = find_lboard_nasid((lboard_t *)KL_CONFIG_INFO(nasid), nasid, KLTYPE_IOBRICK_XBOW);
- if (brd == NULL) return 0;
-
- if ((xbow_p = (klxbow_t *)find_component(brd, NULL, KLSTRUCT_XBOW))
- == NULL)
- return 0;
-
- if (!XBOW_PORT_TYPE_IO(xbow_p, link) || !XBOW_PORT_IS_ENABLED(xbow_p, link))
- return 0;
-
- return 1;
-}
-
-void
-board_to_path(lboard_t *brd, char *path)
-{
- moduleid_t modnum;
- char *board_name;
- char buffer[16];
-
- ASSERT(brd);
-
- switch (KLCLASS(brd->brd_type)) {
-
- case KLCLASS_NODE:
- board_name = EDGE_LBL_NODE;
- break;
- case KLCLASS_ROUTER:
- if (brd->brd_type == KLTYPE_META_ROUTER) {
- board_name = EDGE_LBL_META_ROUTER;
- hasmetarouter++;
- } else if (brd->brd_type == KLTYPE_REPEATER_ROUTER) {
- board_name = EDGE_LBL_REPEATER_ROUTER;
- hasmetarouter++;
- } else
- board_name = EDGE_LBL_ROUTER;
- break;
- case KLCLASS_MIDPLANE:
- board_name = EDGE_LBL_MIDPLANE;
- break;
- case KLCLASS_IO:
- board_name = EDGE_LBL_IO;
- break;
- case KLCLASS_IOBRICK:
- if (brd->brd_type == KLTYPE_PXBRICK)
- board_name = EDGE_LBL_PXBRICK;
- else if (brd->brd_type == KLTYPE_IXBRICK)
- board_name = EDGE_LBL_IXBRICK;
- else if (brd->brd_type == KLTYPE_OPUSBRICK)
- board_name = EDGE_LBL_OPUSBRICK;
- else if (brd->brd_type == KLTYPE_CGBRICK)
- board_name = EDGE_LBL_CGBRICK;
- else
- board_name = EDGE_LBL_IOBRICK;
- break;
- default:
- board_name = EDGE_LBL_UNKNOWN;
- }
-
- modnum = geo_module(brd->brd_geoid);
- memset(buffer, 0, 16);
- format_module_id(buffer, modnum, MODULE_FORMAT_BRIEF);
- sprintf(path, EDGE_LBL_MODULE "/%s/" EDGE_LBL_SLAB "/%d/%s", buffer, geo_slab(brd->brd_geoid), board_name);
-}
-
-#define MHZ 1000000
-
-/*
- * Get the serial number of the main component of a board
- * Returns 0 if a valid serial number is found
- * 1 otherwise.
- * Assumptions: Nic manufacturing string has the following format
- * *Serial:<serial_number>;*
- */
-static int
-component_serial_number_get(lboard_t *board,
- klconf_off_t mfg_nic_offset,
- char *serial_number,
- char *key_pattern)
-{
-
- char *mfg_nic_string;
- char *serial_string,*str;
- int i;
- char *serial_pattern = "Serial:";
-
- /* We have an error on a null mfg nic offset */
- if (!mfg_nic_offset)
- return(1);
- /* Get the hub's manufacturing nic information
- * which is in the form of a pre-formatted string
- */
- mfg_nic_string =
- (char *)NODE_OFFSET_TO_K0(NASID_GET(board),
- mfg_nic_offset);
- /* There is no manufacturing nic info */
- if (!mfg_nic_string)
- return(1);
-
- str = mfg_nic_string;
- /* Look for the key pattern first (if it is specified)
- * and then print the serial number corresponding to that.
- */
- if (strcmp(key_pattern,"") &&
- !(str = strstr(mfg_nic_string,key_pattern)))
- return(1);
-
- /* There is no serial number info in the manufacturing
- * nic info
- */
- if (!(serial_string = strstr(str,serial_pattern)))
- return(1);
-
- serial_string = serial_string + strlen(serial_pattern);
- /* Copy the serial number information from the klconfig */
- i = 0;
- while (serial_string[i] != ';') {
- serial_number[i] = serial_string[i];
- i++;
- }
- serial_number[i] = 0;
-
- return(0);
-}
-/*
- * Get the serial number of a board
- * Returns 0 if a valid serial number is found
- * 1 otherwise.
- */
-
-int
-board_serial_number_get(lboard_t *board,char *serial_number)
-{
- ASSERT(board && serial_number);
- if (!board || !serial_number)
- return(1);
-
- strcpy(serial_number,"");
- switch(KLCLASS(board->brd_type)) {
- case KLCLASS_CPU: { /* Node board */
- klhub_t *hub;
-
- /* Get the hub component information */
- hub = (klhub_t *)find_first_component(board,
- KLSTRUCT_HUB);
- /* If we don't have a hub component on an IP27
- * then we have a weird klconfig.
- */
- if (!hub)
- return(1);
- /* Get the serial number information from
- * the hub's manufacturing nic info
- */
- if (component_serial_number_get(board,
- hub->hub_mfg_nic,
- serial_number,
- "IP37"))
- return(1);
- break;
- }
- case KLCLASS_IO: { /* IO board */
- klbri_t *bridge;
-
- /* Get the bridge component information */
- bridge = (klbri_t *)find_first_component(board,
- KLSTRUCT_BRI);
- /* If we don't have a bridge component on an IO board
- * then we have a weird klconfig.
- */
- if (!bridge)
- return(1);
- /* Get the serial number information from
- * the bridge's manufacturing nic info
- */
- if (component_serial_number_get(board,
- bridge->bri_mfg_nic,
- serial_number, ""))
- return(1);
- break;
- }
- case KLCLASS_ROUTER: { /* Router board */
- klrou_t *router;
-
- /* Get the router component information */
- router = (klrou_t *)find_first_component(board,
- KLSTRUCT_ROU);
- /* If we don't have a router component on a router board
- * then we have a weird klconfig.
- */
- if (!router)
- return(1);
- /* Get the serial number information from
- * the router's manufacturing nic info
- */
- if (component_serial_number_get(board,
- router->rou_mfg_nic,
- serial_number,
- ""))
- return(1);
- break;
- }
- case KLCLASS_GFX: { /* Gfx board */
- klgfx_t *graphics;
-
- /* Get the graphics component information */
- graphics = (klgfx_t *)find_first_component(board, KLSTRUCT_GFX);
- /* If we don't have a gfx component on a gfx board
- * then we have a weird klconfig.
- */
- if (!graphics)
- return(1);
- /* Get the serial number information from
- * the graphics's manufacturing nic info
- */
- if (component_serial_number_get(board,
- graphics->gfx_mfg_nic,
- serial_number,
- ""))
- return(1);
- break;
- }
- default:
- strcpy(serial_number,"");
- break;
- }
- return(0);
-}
-
-/*
- * Format a module id for printing.
- *
- * There are three possible formats:
- *
- * MODULE_FORMAT_BRIEF is the brief 6-character format, including
- * the actual brick-type as recorded in the
- * moduleid_t, eg. 002c15 for a C-brick, or
- * 101#17 for a PX-brick.
- *
- * MODULE_FORMAT_LONG is the hwgraph format, eg. rack/002/bay/15
- * of rack/101/bay/17 (note that the brick
- * type does not appear in this format).
- *
- * MODULE_FORMAT_LCD is like MODULE_FORMAT_BRIEF, except that it
- * ensures that the module id provided appears
- * exactly as it would on the LCD display of
- * the corresponding brick, eg. still 002c15
- * for a C-brick, but 101p17 for a PX-brick.
- */
-void
-format_module_id(char *buffer, moduleid_t m, int fmt)
-{
- int rack, position;
- unsigned char brickchar;
-
- rack = MODULE_GET_RACK(m);
- ASSERT(MODULE_GET_BTYPE(m) < MAX_BRICK_TYPES);
- brickchar = MODULE_GET_BTCHAR(m);
-
- if (fmt == MODULE_FORMAT_LCD) {
- /* Be sure we use the same brick type character as displayed
- * on the brick's LCD
- */
- switch (brickchar)
- {
- case L1_BRICKTYPE_PX:
- brickchar = L1_BRICKTYPE_P;
- break;
-
- case L1_BRICKTYPE_IX:
- brickchar = L1_BRICKTYPE_I;
- break;
- }
- }
-
- position = MODULE_GET_BPOS(m);
-
- if ((fmt == MODULE_FORMAT_BRIEF) || (fmt == MODULE_FORMAT_LCD)) {
- /* Brief module number format, eg. 002c15 */
-
- /* Decompress the rack number */
- *buffer++ = '0' + RACK_GET_CLASS(rack);
- *buffer++ = '0' + RACK_GET_GROUP(rack);
- *buffer++ = '0' + RACK_GET_NUM(rack);
-
- /* Add the brick type */
- *buffer++ = brickchar;
- }
- else if (fmt == MODULE_FORMAT_LONG) {
- /* Fuller hwgraph format, eg. rack/002/bay/15 */
-
- strcpy(buffer, EDGE_LBL_RACK "/"); buffer += strlen(buffer);
-
- *buffer++ = '0' + RACK_GET_CLASS(rack);
- *buffer++ = '0' + RACK_GET_GROUP(rack);
- *buffer++ = '0' + RACK_GET_NUM(rack);
-
- strcpy(buffer, "/" EDGE_LBL_RPOS "/"); buffer += strlen(buffer);
- }
-
- /* Add the bay position, using at least two digits */
- if (position < 10)
- *buffer++ = '0';
- sprintf(buffer, "%d", position);
-
-}
-
-int
-cbrick_type_get_nasid(nasid_t nasid)
-{
- moduleid_t module;
- int t;
-
- module = iomoduleid_get(nasid);
- if (module < 0 ) {
- return MODULE_CBRICK;
- }
- t = MODULE_GET_BTYPE(module);
- if ((char)t == 'o') {
- return MODULE_OPUSBRICK;
- } else {
- return MODULE_CBRICK;
- }
- return -1;
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-/*
- * klgraph.c-
- * This file specifies the interface between the kernel and the PROM's
- * configuration data structures.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/hcl_util.h>
-#include <asm/sn/sn_private.h>
-
-/* #define KLGRAPH_DEBUG 1 */
-#ifdef KLGRAPH_DEBUG
-#define GRPRINTF(x) printk x
-#else
-#define GRPRINTF(x)
-#endif
-
-void mark_cpuvertex_as_cpu(vertex_hdl_t vhdl, cpuid_t cpuid);
-
-
-/* ARGSUSED */
-static void __init
-klhwg_add_hub(vertex_hdl_t node_vertex, klhub_t *hub, cnodeid_t cnode)
-{
- vertex_hdl_t myhubv;
- vertex_hdl_t hub_mon;
- int rc;
- extern struct file_operations shub_mon_fops;
-
- hwgraph_path_add(node_vertex, EDGE_LBL_HUB, &myhubv);
-
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__,__LINE__, myhubv, NULL, "Created path for hub vertex for Shub node.\n");
-
- rc = device_master_set(myhubv, node_vertex);
- if (rc) {
- printk("klhwg_add_hub: Unable to create hub vertex.\n");
- return;
- }
- hub_mon = hwgraph_register(myhubv, EDGE_LBL_PERFMON,
- 0, 0, 0, 0,
- S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP, 0, 0,
- &shub_mon_fops, (void *)(long)cnode);
-}
-
-/* ARGSUSED */
-static void __init
-klhwg_add_disabled_cpu(vertex_hdl_t node_vertex, cnodeid_t cnode, klcpu_t *cpu, slotid_t slot)
-{
- vertex_hdl_t my_cpu;
- char name[120];
- cpuid_t cpu_id;
- nasid_t nasid;
-
- nasid = cnodeid_to_nasid(cnode);
- cpu_id = nasid_slice_to_cpuid(nasid, cpu->cpu_info.physid);
- if(cpu_id != -1){
- snprintf(name, 120, "%s/%s/%c", EDGE_LBL_DISABLED, EDGE_LBL_CPU, 'a' + cpu->cpu_info.physid);
- (void) hwgraph_path_add(node_vertex, name, &my_cpu);
-
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__,__LINE__, my_cpu, NULL, "Created path for disabled cpu slice.\n");
-
- mark_cpuvertex_as_cpu(my_cpu, cpu_id);
- device_master_set(my_cpu, node_vertex);
- return;
- }
-}
-
-/* ARGSUSED */
-static void __init
-klhwg_add_cpu(vertex_hdl_t node_vertex, cnodeid_t cnode, klcpu_t *cpu)
-{
- vertex_hdl_t my_cpu, cpu_dir;
- char name[120];
- cpuid_t cpu_id;
- nasid_t nasid;
-
- nasid = cnodeid_to_nasid(cnode);
- cpu_id = nasid_slice_to_cpuid(nasid, cpu->cpu_info.physid);
-
- snprintf(name, 120, "%s/%d/%c",
- EDGE_LBL_CPUBUS,
- 0,
- 'a' + cpu->cpu_info.physid);
-
- (void) hwgraph_path_add(node_vertex, name, &my_cpu);
-
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__,__LINE__, my_cpu, NULL, "Created path for active cpu slice.\n");
-
- mark_cpuvertex_as_cpu(my_cpu, cpu_id);
- device_master_set(my_cpu, node_vertex);
-
- /* Add an alias under the node's CPU directory */
- if (hwgraph_edge_get(node_vertex, EDGE_LBL_CPU, &cpu_dir) == GRAPH_SUCCESS) {
- snprintf(name, 120, "%c", 'a' + cpu->cpu_info.physid);
- (void) hwgraph_edge_add(cpu_dir, my_cpu, name);
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__,__LINE__, cpu_dir, my_cpu, "Created % from vhdl1 to vhdl2.\n", name);
- }
-}
-
-
-static void __init
-klhwg_add_xbow(cnodeid_t cnode, nasid_t nasid)
-{
- lboard_t *brd;
- klxbow_t *xbow_p;
- nasid_t hub_nasid;
- cnodeid_t hub_cnode;
- int widgetnum;
- vertex_hdl_t xbow_v, hubv;
- /*REFERENCED*/
- graph_error_t err;
-
- if (!(brd = find_lboard_nasid((lboard_t *)KL_CONFIG_INFO(nasid),
- nasid, KLTYPE_IOBRICK_XBOW)))
- return;
-
- if (KL_CONFIG_DUPLICATE_BOARD(brd))
- return;
-
- if ((xbow_p = (klxbow_t *)find_component(brd, NULL, KLSTRUCT_XBOW))
- == NULL)
- return;
-
- for (widgetnum = HUB_WIDGET_ID_MIN; widgetnum <= HUB_WIDGET_ID_MAX; widgetnum++) {
- if (!XBOW_PORT_TYPE_HUB(xbow_p, widgetnum))
- continue;
-
- hub_nasid = XBOW_PORT_NASID(xbow_p, widgetnum);
- if (hub_nasid == INVALID_NASID) {
- printk(KERN_WARNING "hub widget %d, skipping xbow graph\n", widgetnum);
- continue;
- }
-
- hub_cnode = nasid_to_cnodeid(hub_nasid);
-
- if (hub_cnode == INVALID_CNODEID) {
- continue;
- }
-
- hubv = cnodeid_to_vertex(hub_cnode);
-
- err = hwgraph_path_add(hubv, EDGE_LBL_XTALK, &xbow_v);
- if (err != GRAPH_SUCCESS) {
- if (err == GRAPH_DUP)
- printk(KERN_WARNING "klhwg_add_xbow: Check for "
- "working routers and router links!");
-
- printk("klhwg_add_xbow: Failed to add "
- "edge: vertex 0x%p to vertex 0x%p,"
- "error %d\n",
- (void *)hubv, (void *)xbow_v, err);
- return;
- }
-
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, xbow_v, NULL, "Created path for xtalk.\n");
-
- xswitch_vertex_init(xbow_v);
-
- NODEPDA(hub_cnode)->xbow_vhdl = xbow_v;
-
- /*
- * XXX - This won't work is we ever hook up two hubs
- * by crosstown through a crossbow.
- */
- if (hub_nasid != nasid) {
- NODEPDA(hub_cnode)->xbow_peer = nasid;
- NODEPDA(nasid_to_cnodeid(nasid))->xbow_peer =
- hub_nasid;
- }
- }
-}
-
-
-/* ARGSUSED */
-static void __init
-klhwg_add_node(vertex_hdl_t hwgraph_root, cnodeid_t cnode)
-{
- nasid_t nasid;
- lboard_t *brd;
- klhub_t *hub;
- vertex_hdl_t node_vertex = NULL;
- char path_buffer[100];
- int rv;
- char *s;
- int board_disabled = 0;
- klcpu_t *cpu;
- vertex_hdl_t cpu_dir;
-
- nasid = cnodeid_to_nasid(cnode);
- brd = find_lboard_any((lboard_t *)KL_CONFIG_INFO(nasid), KLTYPE_SNIA);
- ASSERT(brd);
-
- /* Generate a hardware graph path for this board. */
- board_to_path(brd, path_buffer);
- rv = hwgraph_path_add(hwgraph_root, path_buffer, &node_vertex);
- if (rv != GRAPH_SUCCESS) {
- printk("Node vertex creation failed. Path == %s", path_buffer);
- return;
- }
-
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, node_vertex, NULL, "Created path for SHUB node.\n");
- hub = (klhub_t *)find_first_component(brd, KLSTRUCT_HUB);
- ASSERT(hub);
- if(hub->hub_info.flags & KLINFO_ENABLE)
- board_disabled = 0;
- else
- board_disabled = 1;
-
- if(!board_disabled) {
- mark_nodevertex_as_node(node_vertex, cnode);
- s = dev_to_name(node_vertex, path_buffer, sizeof(path_buffer));
- NODEPDA(cnode)->hwg_node_name =
- kmalloc(strlen(s) + 1, GFP_KERNEL);
- if (NODEPDA(cnode)->hwg_node_name <= 0) {
- printk("%s: no memory\n", __FUNCTION__);
- return;
- }
- strcpy(NODEPDA(cnode)->hwg_node_name, s);
- hubinfo_set(node_vertex, NODEPDA(cnode)->pdinfo);
- NODEPDA(cnode)->slotdesc = brd->brd_slot;
- NODEPDA(cnode)->geoid = brd->brd_geoid;
- NODEPDA(cnode)->module = module_lookup(geo_module(brd->brd_geoid));
- klhwg_add_hub(node_vertex, hub, cnode);
- }
-
- /*
- * If there's at least 1 CPU, add a "cpu" directory to represent
- * the collection of all CPUs attached to this node.
- */
- cpu = (klcpu_t *)find_first_component(brd, KLSTRUCT_CPU);
- if (cpu) {
- graph_error_t rv;
-
- rv = hwgraph_path_add(node_vertex, EDGE_LBL_CPU, &cpu_dir);
- if (rv != GRAPH_SUCCESS) {
- printk("klhwg_add_node: Cannot create CPU directory\n");
- return;
- }
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, cpu_dir, NULL, "Created cpu directiry on SHUB node.\n");
-
- }
-
- while (cpu) {
- cpuid_t cpu_id;
- cpu_id = nasid_slice_to_cpuid(nasid,cpu->cpu_info.physid);
- if (cpu_online(cpu_id))
- klhwg_add_cpu(node_vertex, cnode, cpu);
- else
- klhwg_add_disabled_cpu(node_vertex, cnode, cpu, brd->brd_slot);
-
- cpu = (klcpu_t *)
- find_component(brd, (klinfo_t *)cpu, KLSTRUCT_CPU);
- }
-}
-
-
-/* ARGSUSED */
-static void __init
-klhwg_add_all_routers(vertex_hdl_t hwgraph_root)
-{
- nasid_t nasid;
- cnodeid_t cnode;
- lboard_t *brd;
- vertex_hdl_t node_vertex;
- char path_buffer[100];
- int rv;
-
- for (cnode = 0; cnode < numnodes; cnode++) {
- nasid = cnodeid_to_nasid(cnode);
- brd = find_lboard_class_any((lboard_t *)KL_CONFIG_INFO(nasid),
- KLTYPE_ROUTER);
-
- if (!brd)
- /* No routers stored in this node's memory */
- continue;
-
- do {
- ASSERT(brd);
-
- /* Don't add duplicate boards. */
- if (brd->brd_flags & DUPLICATE_BOARD)
- continue;
-
- /* Generate a hardware graph path for this board. */
- board_to_path(brd, path_buffer);
-
- /* Add the router */
- rv = hwgraph_path_add(hwgraph_root, path_buffer, &node_vertex);
- if (rv != GRAPH_SUCCESS) {
- printk("Router vertex creation "
- "failed. Path == %s", path_buffer);
- return;
- }
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, node_vertex, NULL, "Created router path.\n");
-
- /* Find the rest of the routers stored on this node. */
- } while ( (brd = find_lboard_class_any(KLCF_NEXT_ANY(brd),
- KLTYPE_ROUTER)) );
- }
-
-}
-
-/* ARGSUSED */
-static void __init
-klhwg_connect_one_router(vertex_hdl_t hwgraph_root, lboard_t *brd,
- cnodeid_t cnode, nasid_t nasid)
-{
- klrou_t *router;
- char path_buffer[50];
- char dest_path[50];
- vertex_hdl_t router_hndl;
- vertex_hdl_t dest_hndl;
- int rc;
- int port;
- lboard_t *dest_brd;
-
- /* Don't add duplicate boards. */
- if (brd->brd_flags & DUPLICATE_BOARD) {
- return;
- }
-
- /* Generate a hardware graph path for this board. */
- board_to_path(brd, path_buffer);
-
- rc = hwgraph_traverse(hwgraph_root, path_buffer, &router_hndl);
-
- if (rc != GRAPH_SUCCESS)
- return;
-
- if (rc != GRAPH_SUCCESS)
- printk(KERN_WARNING "Can't find router: %s", path_buffer);
-
- /* We don't know what to do with multiple router components */
- if (brd->brd_numcompts != 1) {
- printk("klhwg_connect_one_router: %d cmpts on router\n",
- brd->brd_numcompts);
- return;
- }
-
-
- /* Convert component 0 to klrou_t ptr */
- router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd),
- brd->brd_compts[0]);
-
- for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
- /* See if the port's active */
- if (router->rou_port[port].port_nasid == INVALID_NASID) {
- GRPRINTF(("klhwg_connect_one_router: port %d inactive.\n",
- port));
- continue;
- }
- if (nasid_to_cnodeid(router->rou_port[port].port_nasid)
- == INVALID_CNODEID) {
- continue;
- }
-
- dest_brd = (lboard_t *)NODE_OFFSET_TO_K0(
- router->rou_port[port].port_nasid,
- router->rou_port[port].port_offset);
-
- /* Generate a hardware graph path for this board. */
- board_to_path(dest_brd, dest_path);
-
- rc = hwgraph_traverse(hwgraph_root, dest_path, &dest_hndl);
-
- if (rc != GRAPH_SUCCESS) {
- if (KL_CONFIG_DUPLICATE_BOARD(dest_brd))
- continue;
- printk("Can't find router: %s", dest_path);
- return;
- }
-
- sprintf(dest_path, "%d", port);
-
- rc = hwgraph_edge_add(router_hndl, dest_hndl, dest_path);
-
- if (rc == GRAPH_DUP) {
- GRPRINTF(("Skipping port %d. nasid %d %s/%s\n",
- port, router->rou_port[port].port_nasid,
- path_buffer, dest_path));
- continue;
- }
-
- if (rc != GRAPH_SUCCESS) {
- printk("Can't create edge: %s/%s to vertex 0x%p error 0x%x\n",
- path_buffer, dest_path, (void *)dest_hndl, rc);
- return;
- }
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, router_hndl, dest_hndl, "Created edge %s from vhdl1 to vhdl2.\n", dest_path);
-
- }
-}
-
-
-static void __init
-klhwg_connect_routers(vertex_hdl_t hwgraph_root)
-{
- nasid_t nasid;
- cnodeid_t cnode;
- lboard_t *brd;
-
- for (cnode = 0; cnode < numnodes; cnode++) {
- nasid = cnodeid_to_nasid(cnode);
- brd = find_lboard_class_any((lboard_t *)KL_CONFIG_INFO(nasid),
- KLTYPE_ROUTER);
-
- if (!brd)
- continue;
-
- do {
-
- nasid = cnodeid_to_nasid(cnode);
-
- klhwg_connect_one_router(hwgraph_root, brd,
- cnode, nasid);
-
- /* Find the rest of the routers stored on this node. */
- } while ( (brd = find_lboard_class_any(KLCF_NEXT_ANY(brd), KLTYPE_ROUTER)) );
- }
-}
-
-
-
-static void __init
-klhwg_connect_hubs(vertex_hdl_t hwgraph_root)
-{
- nasid_t nasid;
- cnodeid_t cnode;
- lboard_t *brd;
- klhub_t *hub;
- lboard_t *dest_brd;
- vertex_hdl_t hub_hndl;
- vertex_hdl_t dest_hndl;
- char path_buffer[50];
- char dest_path[50];
- graph_error_t rc;
- int port;
-
- for (cnode = 0; cnode < numionodes; cnode++) {
- nasid = cnodeid_to_nasid(cnode);
-
- brd = find_lboard_any((lboard_t *)KL_CONFIG_INFO(nasid), KLTYPE_SNIA);
-
- hub = (klhub_t *)find_first_component(brd, KLSTRUCT_HUB);
- ASSERT(hub);
-
- for (port = 1; port <= MAX_NI_PORTS; port++) {
- if (hub->hub_port[port].port_nasid == INVALID_NASID) {
- continue; /* Port not active */
- }
-
- if (nasid_to_cnodeid(hub->hub_port[port].port_nasid) == INVALID_CNODEID)
- continue;
-
- /* Generate a hardware graph path for this board. */
- board_to_path(brd, path_buffer);
- rc = hwgraph_traverse(hwgraph_root, path_buffer, &hub_hndl);
-
- if (rc != GRAPH_SUCCESS)
- printk(KERN_WARNING "Can't find hub: %s", path_buffer);
-
- dest_brd = (lboard_t *)NODE_OFFSET_TO_K0(
- hub->hub_port[port].port_nasid,
- hub->hub_port[port].port_offset);
-
- /* Generate a hardware graph path for this board. */
- board_to_path(dest_brd, dest_path);
-
- rc = hwgraph_traverse(hwgraph_root, dest_path, &dest_hndl);
-
- if (rc != GRAPH_SUCCESS) {
- if (KL_CONFIG_DUPLICATE_BOARD(dest_brd))
- continue;
- printk("Can't find board: %s", dest_path);
- return;
- } else {
- char buf[1024];
-
- rc = hwgraph_path_add(hub_hndl, EDGE_LBL_INTERCONNECT, &hub_hndl);
-
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, hub_hndl, NULL, "Created link path.\n");
-
- sprintf(buf,"%s/%s",path_buffer,EDGE_LBL_INTERCONNECT);
- rc = hwgraph_traverse(hwgraph_root, buf, &hub_hndl);
- sprintf(buf,"%d",port);
- rc = hwgraph_edge_add(hub_hndl, dest_hndl, buf);
-
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, hub_hndl, dest_hndl, "Created edge %s from vhdl1 to vhdl2.\n", buf);
-
- if (rc != GRAPH_SUCCESS) {
- printk("Can't create edge: %s/%s to vertex 0x%p, error 0x%x\n",
- path_buffer, dest_path, (void *)dest_hndl, rc);
- return;
- }
- }
- }
- }
-}
-
-void __init
-klhwg_add_all_modules(vertex_hdl_t hwgraph_root)
-{
- cmoduleid_t cm;
- char name[128];
- vertex_hdl_t vhdl;
- vertex_hdl_t module_vhdl;
- int rc;
- char buffer[16];
-
- /* Add devices under each module */
-
- for (cm = 0; cm < nummodules; cm++) {
- /* Use module as module vertex fastinfo */
-
- memset(buffer, 0, 16);
- format_module_id(buffer, sn_modules[cm]->id, MODULE_FORMAT_BRIEF);
- sprintf(name, EDGE_LBL_MODULE "/%s", buffer);
-
- rc = hwgraph_path_add(hwgraph_root, name, &module_vhdl);
- ASSERT(rc == GRAPH_SUCCESS);
- rc = rc;
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, module_vhdl, NULL, "Created module path.\n");
-
- hwgraph_fastinfo_set(module_vhdl, (arbitrary_info_t) sn_modules[cm]);
-
- /* Add system controller */
- sprintf(name,
- EDGE_LBL_MODULE "/%s/" EDGE_LBL_L1,
- buffer);
-
- rc = hwgraph_path_add(hwgraph_root, name, &vhdl);
- ASSERT_ALWAYS(rc == GRAPH_SUCCESS);
- rc = rc;
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, vhdl, NULL, "Created L1 path.\n");
-
- hwgraph_info_add_LBL(vhdl, INFO_LBL_ELSC,
- (arbitrary_info_t)1);
-
- }
-}
-
-void __init
-klhwg_add_all_nodes(vertex_hdl_t hwgraph_root)
-{
- cnodeid_t cnode;
-
- for (cnode = 0; cnode < numionodes; cnode++) {
- klhwg_add_node(hwgraph_root, cnode);
- }
-
- for (cnode = 0; cnode < numionodes; cnode++) {
- klhwg_add_xbow(cnode, cnodeid_to_nasid(cnode));
- }
-
- /*
- * As for router hardware inventory information, we set this
- * up in router.c.
- */
-
- klhwg_add_all_routers(hwgraph_root);
- klhwg_connect_routers(hwgraph_root);
- klhwg_connect_hubs(hwgraph_root);
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/io.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/hcl_util.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/router.h>
-#include <asm/sn/module.h>
-#include <asm/sn/ksys/l1.h>
-#include <asm/sn/nodepda.h>
-#include <asm/sn/clksupport.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/sn_sal.h>
-#include <linux/ctype.h>
-
-/* elsc_display_line writes up to 12 characters to either the top or bottom
- * line of the L1 display. line points to a buffer containing the message
- * to be displayed. The zero-based line number is specified by lnum (so
- * lnum == 0 specifies the top line and lnum == 1 specifies the bottom).
- * Lines longer than 12 characters, or line numbers not less than
- * L1_DISPLAY_LINES, cause elsc_display_line to return an error.
- */
-int elsc_display_line(nasid_t nasid, char *line, int lnum)
-{
- return 0;
-}
-
-
-/*
- * iobrick routines
- */
-
-/* iobrick_rack_bay_type_get fills in the three int * arguments with the
- * rack number, bay number and brick type of the L1 being addressed. Note
- * that if the L1 operation fails and this function returns an error value,
- * garbage may be written to brick_type.
- */
-
-
-int iobrick_rack_bay_type_get( nasid_t nasid, uint *rack,
- uint *bay, uint *brick_type )
-{
- int result = 0;
-
- if ( ia64_sn_sysctl_iobrick_module_get(nasid, &result) )
- return( ELSC_ERROR_CMD_SEND );
-
- *rack = (result & MODULE_RACK_MASK) >> MODULE_RACK_SHFT;
- *bay = (result & MODULE_BPOS_MASK) >> MODULE_BPOS_SHFT;
- *brick_type = (result & MODULE_BTYPE_MASK) >> MODULE_BTYPE_SHFT;
- return 0;
-}
-
-
-int iomoduleid_get(nasid_t nasid)
-{
- int result = 0;
-
- if ( ia64_sn_sysctl_iobrick_module_get(nasid, &result) )
- return( ELSC_ERROR_CMD_SEND );
-
- return result;
-}
-
-int
-iobrick_type_get_nasid(nasid_t nasid)
-{
- uint rack, bay, type;
- int t, ret;
- extern char brick_types[];
-
- if ((ret = iobrick_rack_bay_type_get(nasid, &rack, &bay, &type)) < 0) {
- return ret;
- }
-
- /* convert brick_type to lower case */
- if ((type >= 'A') && (type <= 'Z'))
- type = type - 'A' + 'a';
-
- /* convert to a module.h brick type */
- for( t = 0; t < MAX_BRICK_TYPES; t++ ) {
- if( brick_types[t] == type ) {
- return t;
- }
- }
-
- return -1; /* unknown brick */
-}
-
-/*
- * given a L1 bricktype, return a bricktype string. This string is the
- * string that will be used in the hwpath for I/O bricks
- */
-char *
-iobrick_L1bricktype_to_name(int type)
-{
- switch (type)
- {
- default:
- return("Unknown");
-
- case L1_BRICKTYPE_PX:
- return(EDGE_LBL_PXBRICK);
-
- case L1_BRICKTYPE_OPUS:
- return(EDGE_LBL_OPUSBRICK);
-
- case L1_BRICKTYPE_IX:
- return(EDGE_LBL_IXBRICK);
-
- case L1_BRICKTYPE_C:
- return("Cbrick");
-
- case L1_BRICKTYPE_R:
- return("Rbrick");
-
- case L1_BRICKTYPE_CHI_CG:
- return(EDGE_LBL_CGBRICK);
- }
-}
-
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/bootmem.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/io.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/simulator.h>
-
-int maxcpus;
-
-extern xwidgetnum_t hub_widget_id(nasid_t);
-
-/* XXX - Move the meat of this to intr.c ? */
-/*
- * Set up the platform-dependent fields in the nodepda.
- */
-void init_platform_nodepda(nodepda_t *npda, cnodeid_t node)
-{
- hubinfo_t hubinfo;
- nasid_t nasid;
-
- /* Allocate per-node platform-dependent data */
-
- nasid = cnodeid_to_nasid(node);
- if (node >= numnodes) /* Headless/memless IO nodes */
- hubinfo = (hubinfo_t)alloc_bootmem_node(NODE_DATA(0), sizeof(struct hubinfo_s));
- else
- hubinfo = (hubinfo_t)alloc_bootmem_node(NODE_DATA(node), sizeof(struct hubinfo_s));
-
- npda->pdinfo = (void *)hubinfo;
- hubinfo->h_nodepda = npda;
- hubinfo->h_cnodeid = node;
-
- spin_lock_init(&hubinfo->h_crblock);
-
- npda->xbow_peer = INVALID_NASID;
-
- /*
- * Initialize the linked list of
- * router info pointers to the dependent routers
- */
- npda->npda_rip_first = NULL;
-
- /*
- * npda_rip_last always points to the place
- * where the next element is to be inserted
- * into the list
- */
- npda->npda_rip_last = &npda->npda_rip_first;
- npda->geoid.any.type = GEO_TYPE_INVALID;
-
- init_MUTEX_LOCKED(&npda->xbow_sema); /* init it locked? */
-}
-
-void
-init_platform_hubinfo(nodepda_t **nodepdaindr)
-{
- cnodeid_t cnode;
- hubinfo_t hubinfo;
- nodepda_t *npda;
- extern int numionodes;
-
- if (IS_RUNNING_ON_SIMULATOR())
- return;
- for (cnode = 0; cnode < numionodes; cnode++) {
- npda = nodepdaindr[cnode];
- hubinfo = (hubinfo_t)npda->pdinfo;
- hubinfo->h_nasid = cnodeid_to_nasid(cnode);
- hubinfo->h_widgetid = hub_widget_id(hubinfo->h_nasid);
- }
-}
-
-void
-update_node_information(cnodeid_t cnodeid)
-{
- nodepda_t *npda = NODEPDA(cnodeid);
- nodepda_router_info_t *npda_rip;
-
- /* Go through the list of router info
- * structures and copy some frequently
- * accessed info from the info hanging
- * off the corresponding router vertices
- */
- npda_rip = npda->npda_rip_first;
- while(npda_rip) {
- if (npda_rip->router_infop) {
- npda_rip->router_portmask =
- npda_rip->router_infop->ri_portmask;
- npda_rip->router_slot =
- npda_rip->router_infop->ri_slotnum;
- } else {
- /* No router, no ports. */
- npda_rip->router_portmask = 0;
- }
- npda_rip = npda_rip->router_next;
- }
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <asm/smp.h>
-#include <asm/irq.h>
-#include <asm/hw_irq.h>
-#include <asm/topology.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/io.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/xtalk/xtalk.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/intr.h>
-#include <asm/sn/sn2/shub_mmr_t.h>
-#include <asm/sn/sn2/shubio.h>
-#include <asm/sal.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/sn/sn2/shub_mmr.h>
-#include <asm/sn/pda.h>
-
-extern irqpda_t *irqpdaindr;
-extern cnodeid_t master_node_get(vertex_hdl_t vhdl);
-extern nasid_t master_nasid;
-
-/* Initialize some shub registers for interrupts, both IO and error. */
-void intr_init_vecblk(cnodeid_t node)
-{
- int nasid = cnodeid_to_nasid(node);
- sh_ii_int0_config_u_t ii_int_config;
- cpuid_t cpu;
- cpuid_t cpu0, cpu1;
- sh_ii_int0_enable_u_t ii_int_enable;
- sh_int_node_id_config_u_t node_id_config;
- sh_local_int5_config_u_t local5_config;
- sh_local_int5_enable_u_t local5_enable;
-
- if (is_headless_node(node) ) {
- struct ia64_sal_retval ret_stuff;
- int cnode;
-
- /* retarget all interrupts on this node to the master node. */
- node_id_config.sh_int_node_id_config_regval = 0;
- node_id_config.sh_int_node_id_config_s.node_id = master_nasid;
- node_id_config.sh_int_node_id_config_s.id_sel = 1;
- HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_INT_NODE_ID_CONFIG),
- node_id_config.sh_int_node_id_config_regval);
- cnode = nasid_to_cnodeid(master_nasid);
- cpu = first_cpu(node_to_cpumask(cnode));
- cpu = cpu_physical_id(cpu);
- SAL_CALL(ret_stuff, SN_SAL_REGISTER_CE, nasid, cpu, master_nasid,0,0,0,0);
- if (ret_stuff.status < 0)
- printk("%s: SN_SAL_REGISTER_CE SAL_CALL failed\n",__FUNCTION__);
- } else {
- cpu = first_cpu(node_to_cpumask(node));
- cpu = cpu_physical_id(cpu);
- }
-
- /* Get the physical id's of the cpu's on this node. */
- cpu0 = nasid_slice_to_cpu_physical_id(nasid, 0);
- cpu1 = nasid_slice_to_cpu_physical_id(nasid, 2);
-
- HUB_S( (unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_PI_ERROR_MASK), 0);
- HUB_S( (unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_PI_CRBP_ERROR_MASK), 0);
-
- /* Config and enable UART interrupt, all nodes. */
- local5_config.sh_local_int5_config_regval = 0;
- local5_config.sh_local_int5_config_s.idx = SGI_UART_VECTOR;
- local5_config.sh_local_int5_config_s.pid = cpu;
- HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT5_CONFIG),
- local5_config.sh_local_int5_config_regval);
-
- local5_enable.sh_local_int5_enable_regval = 0;
- local5_enable.sh_local_int5_enable_s.uart_int = 1;
- HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_LOCAL_INT5_ENABLE),
- local5_enable.sh_local_int5_enable_regval);
-
-
- /* The II_INT_CONFIG register for cpu 0. */
- ii_int_config.sh_ii_int0_config_regval = 0;
- ii_int_config.sh_ii_int0_config_s.type = 0;
- ii_int_config.sh_ii_int0_config_s.agt = 0;
- ii_int_config.sh_ii_int0_config_s.pid = cpu0;
- ii_int_config.sh_ii_int0_config_s.base = 0;
-
- HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_II_INT0_CONFIG),
- ii_int_config.sh_ii_int0_config_regval);
-
-
- /* The II_INT_CONFIG register for cpu 1. */
- ii_int_config.sh_ii_int0_config_regval = 0;
- ii_int_config.sh_ii_int0_config_s.type = 0;
- ii_int_config.sh_ii_int0_config_s.agt = 0;
- ii_int_config.sh_ii_int0_config_s.pid = cpu1;
- ii_int_config.sh_ii_int0_config_s.base = 0;
-
- HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_II_INT1_CONFIG),
- ii_int_config.sh_ii_int0_config_regval);
-
-
- /* Enable interrupts for II_INT0 and 1. */
- ii_int_enable.sh_ii_int0_enable_regval = 0;
- ii_int_enable.sh_ii_int0_enable_s.ii_enable = 1;
-
- HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_II_INT0_ENABLE),
- ii_int_enable.sh_ii_int0_enable_regval);
- HUB_S((unsigned long *)GLOBAL_MMR_ADDR(nasid, SH_II_INT1_ENABLE),
- ii_int_enable.sh_ii_int0_enable_regval);
-}
-
-static int intr_reserve_level(cpuid_t cpu, int bit)
-{
- irqpda_t *irqs = irqpdaindr;
- int min_shared;
- int i;
-
- if (bit < 0) {
- for (i = IA64_SN2_FIRST_DEVICE_VECTOR; i <= IA64_SN2_LAST_DEVICE_VECTOR; i++) {
- if (irqs->irq_flags[i] == 0) {
- bit = i;
- break;
- }
- }
- }
-
- if (bit < 0) { /* ran out of irqs. Have to share. This will be rare. */
- min_shared = 256;
- for (i=IA64_SN2_FIRST_DEVICE_VECTOR; i < IA64_SN2_LAST_DEVICE_VECTOR; i++) {
- /* Share with the same device class */
- /* XXX: gross layering violation.. */
- if (irqpdaindr->curr->vendor == irqpdaindr->device_dev[i]->vendor &&
- irqpdaindr->curr->device == irqpdaindr->device_dev[i]->device &&
- irqpdaindr->share_count[i] < min_shared) {
- min_shared = irqpdaindr->share_count[i];
- bit = i;
- }
- }
-
- min_shared = 256;
- if (bit < 0) { /* didn't find a matching device, just pick one. This will be */
- /* exceptionally rare. */
- for (i=IA64_SN2_FIRST_DEVICE_VECTOR; i < IA64_SN2_LAST_DEVICE_VECTOR; i++) {
- if (irqpdaindr->share_count[i] < min_shared) {
- min_shared = irqpdaindr->share_count[i];
- bit = i;
- }
- }
- }
- irqpdaindr->share_count[bit]++;
- }
-
- if (!(irqs->irq_flags[bit] & SN2_IRQ_SHARED)) {
- if (irqs->irq_flags[bit] & SN2_IRQ_RESERVED)
- return -1;
- irqs->num_irq_used++;
- }
-
- irqs->irq_flags[bit] |= SN2_IRQ_RESERVED;
- return bit;
-}
-
-void intr_unreserve_level(cpuid_t cpu,
- int bit)
-{
- irqpda_t *irqs = irqpdaindr;
-
- if (irqs->irq_flags[bit] & SN2_IRQ_RESERVED) {
- irqs->num_irq_used--;
- irqs->irq_flags[bit] &= ~SN2_IRQ_RESERVED;
- }
-}
-
-int intr_connect_level(cpuid_t cpu, int bit)
-{
- irqpda_t *irqs = irqpdaindr;
-
- if (!(irqs->irq_flags[bit] & SN2_IRQ_SHARED) &&
- (irqs->irq_flags[bit] & SN2_IRQ_CONNECTED))
- return -1;
-
- irqs->irq_flags[bit] |= SN2_IRQ_CONNECTED;
- return bit;
-}
-
-int intr_disconnect_level(cpuid_t cpu, int bit)
-{
- irqpda_t *irqs = irqpdaindr;
-
- if (!(irqs->irq_flags[bit] & SN2_IRQ_CONNECTED))
- return -1;
- irqs->irq_flags[bit] &= ~SN2_IRQ_CONNECTED;
- return bit;
-}
-
-/*
- * Choose a cpu on this node.
- *
- * We choose the one with the least number of int's assigned to it.
- */
-static cpuid_t intr_cpu_choose_from_node(cnodeid_t cnode)
-{
- cpuid_t cpu, best_cpu = CPU_NONE;
- int slice, min_count = 1000;
-
- for (slice = CPUS_PER_NODE - 1; slice >= 0; slice--) {
- int intrs;
-
- cpu = cnode_slice_to_cpuid(cnode, slice);
- if (cpu == NR_CPUS)
- continue;
- if (!cpu_online(cpu))
- continue;
-
- intrs = pdacpu(cpu)->sn_num_irqs;
-
- if (min_count > intrs) {
- min_count = intrs;
- best_cpu = cpu;
- if (enable_shub_wars_1_1()) {
- /*
- * Rather than finding the best cpu, always
- * return the first cpu. This forces all
- * interrupts to the same cpu
- */
- break;
- }
- }
- }
- pdacpu(best_cpu)->sn_num_irqs++;
- return best_cpu;
-}
-
-/*
- * We couldn't put it on the closest node. Try to find another one.
- * Do a stupid round-robin assignment of the node.
- */
-static cpuid_t intr_cpu_choose_node(void)
-{
- static cnodeid_t last_node = -1; /* XXX: racy */
- cnodeid_t candidate_node;
- cpuid_t cpuid;
-
- if (last_node >= numnodes)
- last_node = 0;
-
- for (candidate_node = last_node + 1; candidate_node != last_node;
- candidate_node++) {
- if (candidate_node == numnodes)
- candidate_node = 0;
- cpuid = intr_cpu_choose_from_node(candidate_node);
- if (cpuid != CPU_NONE)
- return cpuid;
- }
-
- return CPU_NONE;
-}
-
-/*
- * Find the node to assign for this interrupt.
- *
- * SN2 + pcibr addressing limitation:
- * Due to this limitation, all interrupts from a given bridge must
- * go to the name node. The interrupt must also be targetted for
- * the same processor. This limitation does not exist on PIC.
- * But, the processor limitation will stay. The limitation will be
- * similar to the bedrock/xbridge limit regarding PI's
- */
-cpuid_t intr_heuristic(vertex_hdl_t dev, int req_bit, int *resp_bit)
-{
- cpuid_t cpuid;
- vertex_hdl_t pconn_vhdl;
- pcibr_soft_t pcibr_soft;
- int bit;
-
- /* XXX: gross layering violation.. */
- if (hwgraph_edge_get(dev, EDGE_LBL_PCI, &pconn_vhdl) == GRAPH_SUCCESS) {
- pcibr_soft = pcibr_soft_get(pconn_vhdl);
- if (pcibr_soft && pcibr_soft->bsi_err_intr) {
- /*
- * The cpu was chosen already when we assigned
- * the error interrupt.
- */
- cpuid = ((hub_intr_t)pcibr_soft->bsi_err_intr)->i_cpuid;
- goto done;
- }
- }
-
- /*
- * Need to choose one. Try the controlling c-brick first.
- */
- cpuid = intr_cpu_choose_from_node(master_node_get(dev));
- if (cpuid == CPU_NONE)
- cpuid = intr_cpu_choose_node();
-
- done:
- if (cpuid != CPU_NONE) {
- bit = intr_reserve_level(cpuid, req_bit);
- if (bit >= 0) {
- *resp_bit = bit;
- return cpuid;
- }
- }
-
- printk("Cannot target interrupt to target cpu (%ld).\n", cpuid);
- return CPU_NONE;
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/ctype.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/hcl_util.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/xtalk/xtalkaddrs.h>
-#include <asm/sn/ksys/l1.h>
-
-/* #define IOGRAPH_DEBUG */
-#ifdef IOGRAPH_DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif /* IOGRAPH_DEBUG */
-
-/* At most 2 hubs can be connected to an xswitch */
-#define NUM_XSWITCH_VOLUNTEER 2
-
-/*
- * Track which hubs have volunteered to manage devices hanging off of
- * a Crosstalk Switch (e.g. xbow). This structure is allocated,
- * initialized, and hung off the xswitch vertex early on when the
- * xswitch vertex is created.
- */
-typedef struct xswitch_vol_s {
- struct semaphore xswitch_volunteer_mutex;
- int xswitch_volunteer_count;
- vertex_hdl_t xswitch_volunteer[NUM_XSWITCH_VOLUNTEER];
-} *xswitch_vol_t;
-
-void
-xswitch_vertex_init(vertex_hdl_t xswitch)
-{
- xswitch_vol_t xvolinfo;
- int rc;
-
- xvolinfo = kmalloc(sizeof(struct xswitch_vol_s), GFP_KERNEL);
- if (!xvolinfo) {
- printk(KERN_WARNING "xswitch_vertex_init(): Unable to "
- "allocate memory\n");
- return;
- }
- memset(xvolinfo, 0, sizeof(struct xswitch_vol_s));
- init_MUTEX(&xvolinfo->xswitch_volunteer_mutex);
- rc = hwgraph_info_add_LBL(xswitch, INFO_LBL_XSWITCH_VOL,
- (arbitrary_info_t)xvolinfo);
- ASSERT(rc == GRAPH_SUCCESS); rc = rc;
-}
-
-
-/*
- * When assignment of hubs to widgets is complete, we no longer need the
- * xswitch volunteer structure hanging around. Destroy it.
- */
-static void
-xswitch_volunteer_delete(vertex_hdl_t xswitch)
-{
- xswitch_vol_t xvolinfo;
- int rc;
-
- rc = hwgraph_info_remove_LBL(xswitch,
- INFO_LBL_XSWITCH_VOL,
- (arbitrary_info_t *)&xvolinfo);
- if (xvolinfo > 0)
- kfree(xvolinfo);
-}
-/*
- * A Crosstalk master volunteers to manage xwidgets on the specified xswitch.
- */
-/* ARGSUSED */
-static void
-volunteer_for_widgets(vertex_hdl_t xswitch, vertex_hdl_t master)
-{
- xswitch_vol_t xvolinfo = NULL;
- vertex_hdl_t hubv;
- hubinfo_t hubinfo;
-
- (void)hwgraph_info_get_LBL(xswitch,
- INFO_LBL_XSWITCH_VOL,
- (arbitrary_info_t *)&xvolinfo);
- if (xvolinfo == NULL) {
- if (!is_headless_node_vertex(master)) {
- char name[MAXDEVNAME];
- printk(KERN_WARNING
- "volunteer for widgets: vertex %s has no info label",
- vertex_to_name(xswitch, name, MAXDEVNAME));
- }
- return;
- }
-
- down(&xvolinfo->xswitch_volunteer_mutex);
- ASSERT(xvolinfo->xswitch_volunteer_count < NUM_XSWITCH_VOLUNTEER);
- xvolinfo->xswitch_volunteer[xvolinfo->xswitch_volunteer_count] = master;
- xvolinfo->xswitch_volunteer_count++;
-
- /*
- * if dual ported, make the lowest widgetid always be
- * xswitch_volunteer[0].
- */
- if (xvolinfo->xswitch_volunteer_count == NUM_XSWITCH_VOLUNTEER) {
- hubv = xvolinfo->xswitch_volunteer[0];
- hubinfo_get(hubv, &hubinfo);
- if (hubinfo->h_widgetid != XBOW_HUBLINK_LOW) {
- xvolinfo->xswitch_volunteer[0] =
- xvolinfo->xswitch_volunteer[1];
- xvolinfo->xswitch_volunteer[1] = hubv;
- }
- }
- up(&xvolinfo->xswitch_volunteer_mutex);
-}
-
-extern int xbow_port_io_enabled(nasid_t nasid, int widgetnum);
-
-/*
- * Assign all the xwidgets hanging off the specified xswitch to the
- * Crosstalk masters that have volunteered for xswitch duty.
- */
-/* ARGSUSED */
-static void
-assign_widgets_to_volunteers(vertex_hdl_t xswitch, vertex_hdl_t hubv)
-{
- xswitch_info_t xswitch_info;
- xswitch_vol_t xvolinfo = NULL;
- xwidgetnum_t widgetnum;
- int num_volunteer;
- nasid_t nasid;
- hubinfo_t hubinfo;
- extern int iobrick_type_get_nasid(nasid_t);
-
-
- hubinfo_get(hubv, &hubinfo);
- nasid = hubinfo->h_nasid;
-
- xswitch_info = xswitch_info_get(xswitch);
- ASSERT(xswitch_info != NULL);
-
- (void)hwgraph_info_get_LBL(xswitch,
- INFO_LBL_XSWITCH_VOL,
- (arbitrary_info_t *)&xvolinfo);
- if (xvolinfo == NULL) {
- if (!is_headless_node_vertex(hubv)) {
- char name[MAXDEVNAME];
- printk(KERN_WARNING
- "assign_widgets_to_volunteers:vertex %s has "
- " no info label",
- vertex_to_name(xswitch, name, MAXDEVNAME));
- }
- return;
- }
-
- num_volunteer = xvolinfo->xswitch_volunteer_count;
- ASSERT(num_volunteer > 0);
-
- /* Assign master hub for xswitch itself. */
- if (HUB_WIDGET_ID_MIN > 0) {
- hubv = xvolinfo->xswitch_volunteer[0];
- xswitch_info_master_assignment_set(xswitch_info, (xwidgetnum_t)0, hubv);
- }
-
- /*
- * TBD: Use administrative information to alter assignment of
- * widgets to hubs.
- */
- for (widgetnum=HUB_WIDGET_ID_MIN; widgetnum <= HUB_WIDGET_ID_MAX; widgetnum++) {
- int i;
-
- if (!xbow_port_io_enabled(nasid, widgetnum))
- continue;
-
- /*
- * If this is the master IO board, assign it to the same
- * hub that owned it in the prom.
- */
- if (is_master_baseio_nasid_widget(nasid, widgetnum)) {
- extern nasid_t snia_get_master_baseio_nasid(void);
- for (i=0; i<num_volunteer; i++) {
- hubv = xvolinfo->xswitch_volunteer[i];
- hubinfo_get(hubv, &hubinfo);
- nasid = hubinfo->h_nasid;
- if (nasid == snia_get_master_baseio_nasid())
- goto do_assignment;
- }
- printk("Nasid == %d, console nasid == %d",
- nasid, snia_get_master_baseio_nasid());
- nasid = 0;
- }
-
- /*
- * Assuming that we're dual-hosted and that PCI cards
- * are naturally placed left-to-right, alternate PCI
- * buses across both Cbricks. For Pbricks, and Ibricks,
- * io_brick_map_widget() returns the PCI bus number
- * associated with the given brick type and widget number.
- * For Xbricks, it returns the XIO slot number.
- */
-
- i = 0;
- if (num_volunteer > 1) {
- int bt;
-
- bt = iobrick_type_get_nasid(nasid);
- if (bt >= 0) {
- i = io_brick_map_widget(bt, widgetnum) & 1;
- }
- }
-
- hubv = xvolinfo->xswitch_volunteer[i];
-
-do_assignment:
- /*
- * At this point, we want to make hubv the master of widgetnum.
- */
- xswitch_info_master_assignment_set(xswitch_info, widgetnum, hubv);
- }
-
- xswitch_volunteer_delete(xswitch);
-}
-
-/*
- * Probe to see if this hub's xtalk link is active. If so,
- * return the Crosstalk Identification of the widget that we talk to.
- * This is called before any of the Crosstalk infrastructure for
- * this hub is set up. It's usually called on the node that we're
- * probing, but not always.
- *
- * TBD: Prom code should actually do this work, and pass through
- * hwid for our use.
- */
-static void
-early_probe_for_widget(vertex_hdl_t hubv, xwidget_hwid_t hwid)
-{
- nasid_t nasid;
- hubinfo_t hubinfo;
- hubreg_t llp_csr_reg;
- widgetreg_t widget_id;
- int result = 0;
-
- hwid->part_num = XWIDGET_PART_NUM_NONE;
- hwid->rev_num = XWIDGET_REV_NUM_NONE;
- hwid->mfg_num = XWIDGET_MFG_NUM_NONE;
-
- hubinfo_get(hubv, &hubinfo);
- nasid = hubinfo->h_nasid;
-
- llp_csr_reg = REMOTE_HUB_L(nasid, IIO_LLP_CSR);
- if (!(llp_csr_reg & IIO_LLP_CSR_IS_UP))
- return;
-
- /* Read the Cross-Talk Widget Id on the other end */
- result = snia_badaddr_val((volatile void *)
- (RAW_NODE_SWIN_BASE(nasid, 0x0) + WIDGET_ID),
- 4, (void *) &widget_id);
-
- if (result == 0) { /* Found something connected */
- hwid->part_num = XWIDGET_PART_NUM(widget_id);
- hwid->rev_num = XWIDGET_REV_NUM(widget_id);
- hwid->mfg_num = XWIDGET_MFG_NUM(widget_id);
-
- /* TBD: link reset */
- } else {
-
- hwid->part_num = XWIDGET_PART_NUM_NONE;
- hwid->rev_num = XWIDGET_REV_NUM_NONE;
- hwid->mfg_num = XWIDGET_MFG_NUM_NONE;
- }
-}
-
-/*
- * io_xswitch_widget_init
- *
- */
-
-static void
-io_xswitch_widget_init(vertex_hdl_t xswitchv,
- vertex_hdl_t hubv,
- xwidgetnum_t widgetnum)
-{
- xswitch_info_t xswitch_info;
- xwidgetnum_t hub_widgetid;
- vertex_hdl_t widgetv;
- cnodeid_t cnode;
- widgetreg_t widget_id;
- nasid_t nasid, peer_nasid;
- struct xwidget_hwid_s hwid;
- hubinfo_t hubinfo;
- /*REFERENCED*/
- int rc;
- char pathname[128];
- lboard_t *board = NULL;
- char buffer[16];
- char bt;
- moduleid_t io_module;
- slotid_t get_widget_slotnum(int xbow, int widget);
-
- DBG("\nio_xswitch_widget_init: hubv 0x%p, xswitchv 0x%p, widgetnum 0x%x\n", hubv, xswitchv, widgetnum);
-
- /*
- * Verify that xswitchv is indeed an attached xswitch.
- */
- xswitch_info = xswitch_info_get(xswitchv);
- ASSERT(xswitch_info != NULL);
-
- hubinfo_get(hubv, &hubinfo);
- nasid = hubinfo->h_nasid;
- cnode = nasid_to_cnodeid(nasid);
- hub_widgetid = hubinfo->h_widgetid;
-
- /*
- * Check that the widget is an io widget and is enabled
- * on this nasid or the `peer' nasid. The peer nasid
- * is the other hub/bedrock connected to the xbow.
- */
- peer_nasid = NODEPDA(cnode)->xbow_peer;
- if (peer_nasid == INVALID_NASID)
- /* If I don't have a peer, use myself. */
- peer_nasid = nasid;
- if (!xbow_port_io_enabled(nasid, widgetnum) &&
- !xbow_port_io_enabled(peer_nasid, widgetnum)) {
- return;
- }
-
- if (xswitch_info_link_ok(xswitch_info, widgetnum)) {
- char name[4];
- lboard_t dummy;
-
-
- /*
- * If the current hub is not supposed to be the master
- * for this widgetnum, then skip this widget.
- */
- if (xswitch_info_master_assignment_get(xswitch_info,
- widgetnum) != hubv) {
- return;
- }
-
- board = find_lboard_class_nasid( (lboard_t *)KL_CONFIG_INFO(nasid),
- nasid, KLCLASS_IOBRICK);
- if (!board && NODEPDA(cnode)->xbow_peer != INVALID_NASID) {
- board = find_lboard_class_nasid(
- (lboard_t *)KL_CONFIG_INFO( NODEPDA(cnode)->xbow_peer),
- NODEPDA(cnode)->xbow_peer, KLCLASS_IOBRICK);
- }
-
- if (board) {
- DBG("io_xswitch_widget_init: Found KLTYPE_IOBRICK Board 0x%p brd_type 0x%x\n", board, board->brd_type);
- } else {
- DBG("io_xswitch_widget_init: FIXME did not find IOBOARD\n");
- board = &dummy;
- }
-
-
- /* Copy over the nodes' geoid info */
- {
- lboard_t *brd;
-
- brd = find_lboard_any((lboard_t *)KL_CONFIG_INFO(nasid), KLTYPE_SNIA);
- if ( brd != (lboard_t *)0 ) {
- board->brd_geoid = brd->brd_geoid;
- }
- }
-
- /*
- * Make sure we really want to say xbrick, pbrick,
- * etc. rather than XIO, graphics, etc.
- */
-
- memset(buffer, 0, 16);
- format_module_id(buffer, geo_module(board->brd_geoid), MODULE_FORMAT_BRIEF);
-
- sprintf(pathname, EDGE_LBL_MODULE "/%s/" EDGE_LBL_SLAB "/%d" "/%s" "/%s/%d",
- buffer,
- geo_slab(board->brd_geoid),
- (board->brd_type == KLTYPE_PXBRICK) ? EDGE_LBL_PXBRICK :
- (board->brd_type == KLTYPE_IXBRICK) ? EDGE_LBL_IXBRICK :
- (board->brd_type == KLTYPE_CGBRICK) ? EDGE_LBL_CGBRICK :
- (board->brd_type == KLTYPE_OPUSBRICK) ? EDGE_LBL_OPUSBRICK : "?brick",
- EDGE_LBL_XTALK, widgetnum);
-
- DBG("io_xswitch_widget_init: path= %s\n", pathname);
- rc = hwgraph_path_add(hwgraph_root, pathname, &widgetv);
-
- ASSERT(rc == GRAPH_SUCCESS);
-
- /* This is needed to let the user programs to map the
- * module,slot numbers to the corresponding widget numbers
- * on the crossbow.
- */
- device_master_set(hwgraph_connectpt_get(widgetv), hubv);
- sprintf(name, "%d", widgetnum);
- DBG("io_xswitch_widget_init: FIXME hwgraph_edge_add %s xswitchv 0x%p, widgetv 0x%p\n", name, xswitchv, widgetv);
- rc = hwgraph_edge_add(xswitchv, widgetv, name);
-
- /*
- * crosstalk switch code tracks which
- * widget is attached to each link.
- */
- xswitch_info_vhdl_set(xswitch_info, widgetnum, widgetv);
-
- /*
- * Peek at the widget to get its crosstalk part and
- * mfgr numbers, then present it to the generic xtalk
- * bus provider to have its driver attach routine
- * called (or not).
- */
- widget_id = XWIDGET_ID_READ(nasid, widgetnum);
- hwid.part_num = XWIDGET_PART_NUM(widget_id);
- hwid.rev_num = XWIDGET_REV_NUM(widget_id);
- hwid.mfg_num = XWIDGET_MFG_NUM(widget_id);
-
- (void)xwidget_register(&hwid, widgetv, widgetnum,
- hubv, hub_widgetid);
-
- io_module = iomoduleid_get(nasid);
- if (io_module >= 0) {
- char buffer[16];
- vertex_hdl_t to, from;
- char *brick_name;
- extern char *iobrick_L1bricktype_to_name(int type);
-
-
- memset(buffer, 0, 16);
- format_module_id(buffer, geo_module(board->brd_geoid), MODULE_FORMAT_BRIEF);
-
- if ( isupper(MODULE_GET_BTCHAR(io_module)) ) {
- bt = tolower(MODULE_GET_BTCHAR(io_module));
- }
- else {
- bt = MODULE_GET_BTCHAR(io_module);
- }
-
- brick_name = iobrick_L1bricktype_to_name(bt);
-
- /* Add a helper vertex so xbow monitoring
- * can identify the brick type. It's simply
- * an edge from the widget 0 vertex to the
- * brick vertex.
- */
-
- sprintf(pathname, EDGE_LBL_HW "/" EDGE_LBL_MODULE "/%s/"
- EDGE_LBL_SLAB "/%d/"
- EDGE_LBL_NODE "/" EDGE_LBL_XTALK "/"
- "0",
- buffer, geo_slab(board->brd_geoid));
- from = hwgraph_path_to_vertex(pathname);
- ASSERT_ALWAYS(from);
- sprintf(pathname, EDGE_LBL_HW "/" EDGE_LBL_MODULE "/%s/"
- EDGE_LBL_SLAB "/%d/"
- "%s",
- buffer, geo_slab(board->brd_geoid), brick_name);
-
- to = hwgraph_path_to_vertex(pathname);
- ASSERT_ALWAYS(to);
- rc = hwgraph_edge_add(from, to,
- EDGE_LBL_INTERCONNECT);
- if (rc != -EEXIST && rc != GRAPH_SUCCESS) {
- printk("%s: Unable to establish link"
- " for xbmon.", pathname);
- }
- }
-
- }
-}
-
-
-static void
-io_init_xswitch_widgets(vertex_hdl_t xswitchv, cnodeid_t cnode)
-{
- xwidgetnum_t widgetnum;
-
- DBG("io_init_xswitch_widgets: xswitchv 0x%p for cnode %d\n", xswitchv, cnode);
-
- for (widgetnum = HUB_WIDGET_ID_MIN; widgetnum <= HUB_WIDGET_ID_MAX;
- widgetnum++) {
- io_xswitch_widget_init(xswitchv,
- cnodeid_to_vertex(cnode),
- widgetnum);
- }
-}
-
-/*
- * Initialize all I/O on the specified node.
- */
-static void
-io_init_node(cnodeid_t cnodeid)
-{
- /*REFERENCED*/
- vertex_hdl_t hubv, switchv, widgetv;
- struct xwidget_hwid_s hwid;
- hubinfo_t hubinfo;
- int is_xswitch;
- nodepda_t *npdap;
- struct semaphore *peer_sema = 0;
- uint32_t widget_partnum;
-
- npdap = NODEPDA(cnodeid);
-
- /*
- * Get the "top" vertex for this node's hardware
- * graph; it will carry the per-hub hub-specific
- * data, and act as the crosstalk provider master.
- * It's canonical path is probably something of the
- * form /hw/module/%M/slot/%d/node
- */
- hubv = cnodeid_to_vertex(cnodeid);
- DBG("io_init_node: Initialize IO for cnode %d hubv(node) 0x%p npdap 0x%p\n", cnodeid, hubv, npdap);
-
- ASSERT(hubv != GRAPH_VERTEX_NONE);
-
- /*
- * attach our hub_provider information to hubv,
- * so we can use it as a crosstalk provider "master"
- * vertex.
- */
- xtalk_provider_register(hubv, &hub_provider);
- xtalk_provider_startup(hubv);
-
- /*
- * If nothing connected to this hub's xtalk port, we're done.
- */
- early_probe_for_widget(hubv, &hwid);
- if (hwid.part_num == XWIDGET_PART_NUM_NONE) {
- DBG("**** io_init_node: Node's 0x%p hub widget has XWIDGET_PART_NUM_NONE ****\n", hubv);
- return;
- /* NOTREACHED */
- }
-
- /*
- * Create a vertex to represent the crosstalk bus
- * attached to this hub, and a vertex to be used
- * as the connect point for whatever is out there
- * on the other side of our crosstalk connection.
- *
- * Crosstalk Switch drivers "climb up" from their
- * connection point to try and take over the switch
- * point.
- *
- * Of course, the edges and verticies may already
- * exist, in which case our net effect is just to
- * associate the "xtalk_" driver with the connection
- * point for the device.
- */
-
- (void)hwgraph_path_add(hubv, EDGE_LBL_XTALK, &switchv);
-
- DBG("io_init_node: Created 'xtalk' entry to '../node/' xtalk vertex 0x%p\n", switchv);
-
- ASSERT(switchv != GRAPH_VERTEX_NONE);
-
- (void)hwgraph_edge_add(hubv, switchv, EDGE_LBL_IO);
-
- DBG("io_init_node: Created symlink 'io' from ../node/io to ../node/xtalk \n");
-
- /*
- * We need to find the widget id and update the basew_id field
- * accordingly. In particular, SN00 has direct connected bridge,
- * and hence widget id is Not 0.
- */
- widget_partnum = (((*(volatile int32_t *)(NODE_SWIN_BASE
- (cnodeid_to_nasid(cnodeid), 0) +
- WIDGET_ID))) & WIDGET_PART_NUM)
- >> WIDGET_PART_NUM_SHFT;
-
- if ((widget_partnum == XBOW_WIDGET_PART_NUM) ||
- (widget_partnum == XXBOW_WIDGET_PART_NUM) ||
- (widget_partnum == PXBOW_WIDGET_PART_NUM) ) {
- /*
- * Xbow control register does not have the widget ID field.
- * So, hard code the widget ID to be zero.
- */
- DBG("io_init_node: Found XBOW widget_partnum= 0x%x\n", widget_partnum);
- npdap->basew_id = 0;
-
- } else {
- void *bridge;
-
- bridge = (void *)NODE_SWIN_BASE(cnodeid_to_nasid(cnodeid), 0);
- npdap->basew_id = pcireg_bridge_control_get(bridge) & WIDGET_WIDGET_ID;
-
- printk(" ****io_init_node: Unknown Widget Part Number 0x%x Widget ID 0x%x attached to Hubv 0x%p ****\n", widget_partnum, npdap->basew_id, (void *)hubv);
- return;
- }
- {
- char widname[10];
- sprintf(widname, "%x", npdap->basew_id);
- (void)hwgraph_path_add(switchv, widname, &widgetv);
- DBG("io_init_node: Created '%s' to '..node/xtalk/' vertex 0x%p\n", widname, widgetv);
- ASSERT(widgetv != GRAPH_VERTEX_NONE);
- }
-
- nodepda->basew_xc = widgetv;
-
- is_xswitch = xwidget_hwid_is_xswitch(&hwid);
-
- /*
- * Try to become the master of the widget. If this is an xswitch
- * with multiple hubs connected, only one will succeed. Mastership
- * of an xswitch is used only when touching registers on that xswitch.
- * The slave xwidgets connected to the xswitch can be owned by various
- * masters.
- */
- if (device_master_set(widgetv, hubv) == 0) {
-
- /* Only one hub (thread) per Crosstalk device or switch makes
- * it to here.
- */
-
- /*
- * Initialize whatever xwidget is hanging off our hub.
- * Whatever it is, it's accessible through widgetnum 0.
- */
- hubinfo_get(hubv, &hubinfo);
-
- (void)xwidget_register(&hwid, widgetv, npdap->basew_id, hubv, hubinfo->h_widgetid);
-
- /*
- * Special handling for Crosstalk Switches (e.g. xbow).
- * We need to do things in roughly the following order:
- * 1) Initialize xswitch hardware (done above)
- * 2) Determine which hubs are available to be widget masters
- * 3) Discover which links are active from the xswitch
- * 4) Assign xwidgets hanging off the xswitch to hubs
- * 5) Initialize all xwidgets on the xswitch
- */
-
- volunteer_for_widgets(switchv, hubv);
-
- /* If there's someone else on this crossbow, recognize him */
- if (npdap->xbow_peer != INVALID_NASID) {
- nodepda_t *peer_npdap = NODEPDA(nasid_to_cnodeid(npdap->xbow_peer));
- peer_sema = &peer_npdap->xbow_sema;
- volunteer_for_widgets(switchv, peer_npdap->node_vertex);
- }
-
- assign_widgets_to_volunteers(switchv, hubv);
-
- /* Signal that we're done */
- if (peer_sema) {
- up(peer_sema);
- }
-
- }
- else {
- /* Wait 'til master is done assigning widgets. */
- down(&npdap->xbow_sema);
- }
-
- /* Now both nodes can safely inititialize widgets */
- io_init_xswitch_widgets(switchv, cnodeid);
-
- DBG("\nio_init_node: DONE INITIALIZED ALL I/O FOR CNODEID %d\n\n", cnodeid);
-}
-
-#include <asm/sn/ioerror_handling.h>
-
-/*
- * Initialize all I/O devices. Starting closest to nodes, probe and
- * initialize outward.
- */
-void
-init_all_devices(void)
-{
- cnodeid_t cnodeid, active;
-
- active = 0;
- for (cnodeid = 0; cnodeid < numionodes; cnodeid++) {
- DBG("init_all_devices: Calling io_init_node() for cnode %d\n", cnodeid);
- io_init_node(cnodeid);
-
- DBG("init_all_devices: Done io_init_node() for cnode %d\n", cnodeid);
- }
-
- for (cnodeid = 0; cnodeid < numnodes; cnodeid++) {
- /*
- * Update information generated by IO init.
- */
- update_node_information(cnodeid);
- }
-}
-
-static
-struct io_brick_map_s io_brick_tab[] = {
-
-/* PXbrick widget number to PCI bus number map */
- { MODULE_PXBRICK, /* PXbrick type */
- /* PCI Bus # Widget # */
- { 0, 0, 0, 0, 0, 0, 0, 0, /* 0x0 - 0x7 */
- 0, /* 0x8 */
- 0, /* 0x9 */
- 0, 0, /* 0xa - 0xb */
- 1, /* 0xc */
- 5, /* 0xd */
- 0, /* 0xe */
- 3 /* 0xf */
- }
- },
-
-/* OPUSbrick widget number to PCI bus number map */
- { MODULE_OPUSBRICK, /* OPUSbrick type */
- /* PCI Bus # Widget # */
- { 0, 0, 0, 0, 0, 0, 0, 0, /* 0x0 - 0x7 */
- 0, /* 0x8 */
- 0, /* 0x9 */
- 0, 0, /* 0xa - 0xb */
- 0, /* 0xc */
- 0, /* 0xd */
- 0, /* 0xe */
- 1 /* 0xf */
- }
- },
-
-/* IXbrick widget number to PCI bus number map */
- { MODULE_IXBRICK, /* IXbrick type */
- /* PCI Bus # Widget # */
- { 0, 0, 0, 0, 0, 0, 0, 0, /* 0x0 - 0x7 */
- 0, /* 0x8 */
- 0, /* 0x9 */
- 0, 0, /* 0xa - 0xb */
- 1, /* 0xc */
- 5, /* 0xd */
- 0, /* 0xe */
- 3 /* 0xf */
- }
- },
-
-/* CG brick widget number to PCI bus number map */
- { MODULE_CGBRICK, /* CG brick */
- /* PCI Bus # Widget # */
- { 0, 0, 0, 0, 0, 0, 0, 0, /* 0x0 - 0x7 */
- 0, /* 0x8 */
- 0, /* 0x9 */
- 0, 1, /* 0xa - 0xb */
- 0, /* 0xc */
- 0, /* 0xd */
- 0, /* 0xe */
- 0 /* 0xf */
- }
- },
-};
-
-/*
- * Use the brick's type to map a widget number to a meaningful int
- */
-int
-io_brick_map_widget(int brick_type, int widget_num)
-{
- int num_bricks, i;
-
- /* Calculate number of bricks in table */
- num_bricks = sizeof(io_brick_tab)/sizeof(io_brick_tab[0]);
-
- /* Look for brick prefix in table */
- for (i = 0; i < num_bricks; i++) {
- if (brick_type == io_brick_tab[i].ibm_type)
- return io_brick_tab[i].ibm_map_wid[widget_num];
- }
-
- return 0;
-
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/string.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/sn/io.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/xtalk/xbow.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/module.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/xtalk/xswitch.h>
-#include <asm/sn/nodepda.h>
-#include <asm/sn/sn_cpuid.h>
-
-
-/* #define LDEBUG 1 */
-
-#ifdef LDEBUG
-#define DPRINTF printk
-#define printf printk
-#else
-#define DPRINTF(x...)
-#endif
-
-module_t *sn_modules[MODULE_MAX];
-int nummodules;
-
-#define SN00_SERIAL_FUDGE 0x3b1af409d513c2
-#define SN0_SERIAL_FUDGE 0x6e
-
-
-static void __init
-encode_str_serial(const char *src, char *dest)
-{
- int i;
-
- for (i = 0; i < MAX_SERIAL_NUM_SIZE; i++) {
-
- dest[i] = src[MAX_SERIAL_NUM_SIZE/2 +
- ((i%2) ? ((i/2 * -1) - 1) : (i/2))] +
- SN0_SERIAL_FUDGE;
- }
-}
-
-module_t * __init
-module_lookup(moduleid_t id)
-{
- int i;
-
- for (i = 0; i < nummodules; i++)
- if (sn_modules[i]->id == id) {
- DPRINTF("module_lookup: found m=0x%p\n", sn_modules[i]);
- return sn_modules[i];
- }
-
- return NULL;
-}
-
-/*
- * module_add_node
- *
- * The first time a new module number is seen, a module structure is
- * inserted into the module list in order sorted by module number
- * and the structure is initialized.
- *
- * The node number is added to the list of nodes in the module.
- */
-static module_t * __init
-module_add_node(geoid_t geoid, cnodeid_t cnodeid)
-{
- module_t *m;
- int i;
- char buffer[16];
- moduleid_t moduleid;
- slabid_t slab_number;
-
- memset(buffer, 0, 16);
- moduleid = geo_module(geoid);
- format_module_id(buffer, moduleid, MODULE_FORMAT_BRIEF);
- DPRINTF("module_add_node: moduleid=%s node=%d\n", buffer, cnodeid);
-
- if ((m = module_lookup(moduleid)) == 0) {
- m = kmalloc(sizeof (module_t), GFP_KERNEL);
- ASSERT_ALWAYS(m);
- memset(m, 0 , sizeof(module_t));
-
- for (slab_number = 0; slab_number <= MAX_SLABS; slab_number++) {
- m->nodes[slab_number] = -1;
- }
-
- m->id = moduleid;
- spin_lock_init(&m->lock);
-
- /* Insert in sorted order by module number */
-
- for (i = nummodules; i > 0 && sn_modules[i - 1]->id > moduleid; i--)
- sn_modules[i] = sn_modules[i - 1];
-
- sn_modules[i] = m;
- nummodules++;
- }
-
- /*
- * Save this information in the correct slab number of the node in the
- * module.
- */
- slab_number = geo_slab(geoid);
- DPRINTF("slab number added 0x%x\n", slab_number);
-
- if (m->nodes[slab_number] != -1) {
- printk("module_add_node .. slab previously found\n");
- return NULL;
- }
-
- m->nodes[slab_number] = cnodeid;
- m->geoid[slab_number] = geoid;
-
- return m;
-}
-
-static int __init
-module_probe_snum(module_t *m, nasid_t host_nasid, nasid_t nasid)
-{
- lboard_t *board;
- klmod_serial_num_t *comp;
- char serial_number[16];
-
- /*
- * record brick serial number
- */
- board = find_lboard_nasid((lboard_t *) KL_CONFIG_INFO(host_nasid), host_nasid, KLTYPE_SNIA);
-
- if (! board || KL_CONFIG_DUPLICATE_BOARD(board))
- {
- return 0;
- }
-
- board_serial_number_get( board, serial_number );
- if( serial_number[0] != '\0' ) {
- encode_str_serial( serial_number, m->snum.snum_str );
- m->snum_valid = 1;
- }
-
- board = find_lboard_nasid((lboard_t *) KL_CONFIG_INFO(nasid),
- nasid, KLTYPE_IOBRICK_XBOW);
-
- if (! board || KL_CONFIG_DUPLICATE_BOARD(board))
- return 0;
-
- comp = GET_SNUM_COMP(board);
-
- if (comp) {
- if (comp->snum.snum_str[0] != '\0') {
- memcpy(m->sys_snum, comp->snum.snum_str,
- MAX_SERIAL_NUM_SIZE);
- m->sys_snum_valid = 1;
- }
- }
-
- if (m->sys_snum_valid)
- return 1;
- else {
- DPRINTF("Invalid serial number for module %d, "
- "possible missing or invalid NIC.", m->id);
- return 0;
- }
-}
-
-void __init
-io_module_init(void)
-{
- cnodeid_t node;
- lboard_t *board;
- nasid_t nasid;
- int nserial;
- module_t *m;
- extern int numionodes;
-
- DPRINTF("*******module_init\n");
-
- nserial = 0;
-
- /*
- * First pass just scan for compute node boards KLTYPE_SNIA.
- * We do not support memoryless compute nodes.
- */
- for (node = 0; node < numnodes; node++) {
- nasid = cnodeid_to_nasid(node);
- board = find_lboard_nasid((lboard_t *) KL_CONFIG_INFO(nasid), nasid, KLTYPE_SNIA);
- ASSERT(board);
-
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, NULL, NULL, "Found Shub lboard 0x%lx nasid 0x%x cnode 0x%x \n", (unsigned long)board, (int)nasid, (int)node);
-
- m = module_add_node(board->brd_geoid, node);
- if (! m->snum_valid && module_probe_snum(m, nasid, nasid))
- nserial++;
- }
-
- /*
- * Second scan, look for headless/memless board hosted by compute nodes.
- */
- for (node = numnodes; node < numionodes; node++) {
- nasid_t nasid;
- char serial_number[16];
-
- nasid = cnodeid_to_nasid(node);
- board = find_lboard_nasid((lboard_t *) KL_CONFIG_INFO(nasid),
- nasid, KLTYPE_SNIA);
- ASSERT(board);
-
- HWGRAPH_DEBUG(__FILE__, __FUNCTION__, __LINE__, NULL, NULL, "Found headless/memless lboard 0x%lx node %d nasid %d cnode %d\n", (unsigned long)board, node, (int)nasid, (int)node);
-
- m = module_add_node(board->brd_geoid, node);
-
- /*
- * Get and initialize the serial number.
- */
- board_serial_number_get( board, serial_number );
- if( serial_number[0] != '\0' ) {
- encode_str_serial( serial_number, m->snum.snum_str );
- m->snum_valid = 1;
- nserial++;
- }
- }
-}
+++ /dev/null
-# arch/ia64/sn/io/sn2/pcibr/Makefile
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 2002-2003 Silicon Graphics, Inc. All Rights Reserved.
-#
-# Makefile for the sn2 specific pci bridge routines.
-#
-
-obj-y += pcibr_ate.o pcibr_config.o \
- pcibr_dvr.o pcibr_hints.o \
- pcibr_intr.o pcibr_rrb.o \
- pcibr_slot.o pcibr_error.o \
- pcibr_reg.o
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/pci/pci_defs.h>
-
-/*
- * functions
- */
-int pcibr_ate_alloc(pcibr_soft_t, int, struct resource *);
-void pcibr_ate_free(pcibr_soft_t, int, int, struct resource *);
-bridge_ate_t pcibr_flags_to_ate(pcibr_soft_t, unsigned);
-bridge_ate_p pcibr_ate_addr(pcibr_soft_t, int);
-void ate_write(pcibr_soft_t, int, int, bridge_ate_t);
-
-int pcibr_invalidate_ate; /* by default don't invalidate ATE on free */
-
-/*
- * Allocate "count" contiguous Bridge Address Translation Entries
- * on the specified bridge to be used for PCI to XTALK mappings.
- * Indices in rm map range from 1..num_entries. Indicies returned
- * to caller range from 0..num_entries-1.
- *
- * Return the start index on success, -1 on failure.
- */
-int
-pcibr_ate_alloc(pcibr_soft_t pcibr_soft, int count, struct resource *res)
-{
- int status = 0;
- unsigned long flag;
-
- memset(res, 0, sizeof(struct resource));
- flag = pcibr_lock(pcibr_soft);
- status = allocate_resource( &pcibr_soft->bs_int_ate_resource, res,
- count, pcibr_soft->bs_int_ate_resource.start,
- pcibr_soft->bs_int_ate_resource.end, 1,
- NULL, NULL);
- if (status) {
- /* Failed to allocate */
- pcibr_unlock(pcibr_soft, flag);
- return -1;
- }
-
- /* Save the resource for freeing */
- pcibr_unlock(pcibr_soft, flag);
-
- return res->start;
-}
-
-void
-pcibr_ate_free(pcibr_soft_t pcibr_soft, int index, int count, struct resource *res)
-{
-
- bridge_ate_t ate;
- int status = 0;
- unsigned long flags;
-
- if (pcibr_invalidate_ate) {
- /* For debugging purposes, clear the valid bit in the ATE */
- ate = *pcibr_ate_addr(pcibr_soft, index);
- ate_write(pcibr_soft, index, count, (ate & ~ATE_V));
- }
-
- flags = pcibr_lock(pcibr_soft);
- status = release_resource(res);
- pcibr_unlock(pcibr_soft, flags);
- if (status)
- BUG(); /* Ouch .. */
-
-}
-
-/*
- * Convert PCI-generic software flags and Bridge-specific software flags
- * into Bridge-specific Address Translation Entry attribute bits.
- */
-bridge_ate_t
-pcibr_flags_to_ate(pcibr_soft_t pcibr_soft, unsigned flags)
-{
- bridge_ate_t attributes;
-
- /* default if nothing specified:
- * NOBARRIER
- * NOPREFETCH
- * NOPRECISE
- * COHERENT
- * Plus the valid bit
- */
- attributes = ATE_CO | ATE_V;
-
- /* Generic macro flags
- */
- if (flags & PCIIO_DMA_DATA) { /* standard data channel */
- attributes &= ~ATE_BAR; /* no barrier */
- attributes |= ATE_PREF; /* prefetch on */
- }
- if (flags & PCIIO_DMA_CMD) { /* standard command channel */
- attributes |= ATE_BAR; /* barrier bit on */
- attributes &= ~ATE_PREF; /* disable prefetch */
- }
- /* Generic detail flags
- */
- if (flags & PCIIO_PREFETCH)
- attributes |= ATE_PREF;
- if (flags & PCIIO_NOPREFETCH)
- attributes &= ~ATE_PREF;
-
- /* Provider-specific flags
- */
- if (flags & PCIBR_BARRIER)
- attributes |= ATE_BAR;
- if (flags & PCIBR_NOBARRIER)
- attributes &= ~ATE_BAR;
-
- if (flags & PCIBR_PREFETCH)
- attributes |= ATE_PREF;
- if (flags & PCIBR_NOPREFETCH)
- attributes &= ~ATE_PREF;
-
- if (flags & PCIBR_PRECISE)
- attributes |= ATE_PREC;
- if (flags & PCIBR_NOPRECISE)
- attributes &= ~ATE_PREC;
-
- /* In PCI-X mode, Prefetch & Precise not supported */
- if (IS_PCIX(pcibr_soft)) {
- attributes &= ~(ATE_PREC | ATE_PREF);
- }
-
- return (attributes);
-}
-
-/*
- * Setup an Address Translation Entry as specified. Use either the Bridge
- * internal maps or the external map RAM, as appropriate.
- */
-bridge_ate_p
-pcibr_ate_addr(pcibr_soft_t pcibr_soft,
- int ate_index)
-{
- if (ate_index < pcibr_soft->bs_int_ate_size) {
- return (pcireg_int_ate_addr(pcibr_soft, ate_index));
- } else {
- printk("pcibr_ate_addr(): INVALID ate_index 0x%x", ate_index);
- return (bridge_ate_p)0;
- }
-}
-
-/*
- * Write the ATE.
- */
-void
-ate_write(pcibr_soft_t pcibr_soft, int ate_index, int count, bridge_ate_t ate)
-{
- while (count-- > 0) {
- if (ate_index < pcibr_soft->bs_int_ate_size) {
- pcireg_int_ate_set(pcibr_soft, ate_index, ate);
- PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP, pcibr_soft->bs_vhdl,
- "ate_write(): ate_index=0x%x, ate=0x%lx\n",
- ate_index, (uint64_t)ate));
- } else {
- printk("ate_write(): INVALID ate_index 0x%x", ate_index);
- return;
- }
- ate_index++;
- ate += IOPGSIZE;
- }
-
- pcireg_tflush_get(pcibr_soft); /* wait until Bridge PIO complete */
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/pci/pci_defs.h>
-
-extern pcibr_info_t pcibr_info_get(vertex_hdl_t);
-
-uint64_t pcibr_config_get(vertex_hdl_t, unsigned, unsigned);
-uint64_t do_pcibr_config_get(cfg_p, unsigned, unsigned);
-void pcibr_config_set(vertex_hdl_t, unsigned, unsigned, uint64_t);
-void do_pcibr_config_set(cfg_p, unsigned, unsigned, uint64_t);
-
-/*
- * fancy snia bit twiddling....
- */
-#define CBP(b,r) (((volatile uint8_t *) b)[(r)])
-#define CSP(b,r) (((volatile uint16_t *) b)[((r)/2)])
-#define CWP(b,r) (((volatile uint32_t *) b)[(r)/4])
-
-/*
- * Return a config space address for given slot / func / offset. Note the
- * returned pointer is a 32bit word (ie. cfg_p) aligned pointer pointing to
- * the 32bit word that contains the "offset" byte.
- */
-cfg_p
-pcibr_func_config_addr(pcibr_soft_t soft, pciio_bus_t bus, pciio_slot_t slot,
- pciio_function_t func, int offset)
-{
- /*
- * Type 1 config space
- */
- if (bus > 0) {
- pcireg_type1_cntr_set(soft, ((bus << 16) | (slot << 11)));
- return (pcireg_type1_cfg_addr(soft, func, offset));
- }
-
- /*
- * Type 0 config space
- */
- return (pcireg_type0_cfg_addr(soft, slot, func, offset));
-}
-
-/*
- * Return config space address for given slot / offset. Note the returned
- * pointer is a 32bit word (ie. cfg_p) aligned pointer pointing to the
- * 32bit word that contains the "offset" byte.
- */
-cfg_p
-pcibr_slot_config_addr(pcibr_soft_t soft, pciio_slot_t slot, int offset)
-{
- return pcibr_func_config_addr(soft, 0, slot, 0, offset);
-}
-
-/*
- * Set config space data for given slot / func / offset
- */
-void
-pcibr_func_config_set(pcibr_soft_t soft, pciio_slot_t slot,
- pciio_function_t func, int offset, unsigned val)
-{
- cfg_p cfg_base;
-
- cfg_base = pcibr_func_config_addr(soft, 0, slot, func, 0);
- do_pcibr_config_set(cfg_base, offset, sizeof(unsigned), val);
-}
-
-int pcibr_config_debug = 0;
-
-cfg_p
-pcibr_config_addr(vertex_hdl_t conn,
- unsigned reg)
-{
- pcibr_info_t pcibr_info;
- pciio_bus_t pciio_bus;
- pciio_slot_t pciio_slot;
- pciio_function_t pciio_func;
- cfg_p cfgbase = (cfg_p)0;
- pciio_info_t pciio_info;
-
- pciio_info = pciio_info_get(conn);
- pcibr_info = pcibr_info_get(conn);
-
- /*
- * Determine the PCI bus/slot/func to generate a config address for.
- */
-
- if (pciio_info_type1_get(pciio_info)) {
- /*
- * Conn is a vhdl which uses TYPE 1 addressing explicitly passed
- * in reg.
- */
- pciio_bus = PCI_TYPE1_BUS(reg);
- pciio_slot = PCI_TYPE1_SLOT(reg);
- pciio_func = PCI_TYPE1_FUNC(reg);
-
- ASSERT(pciio_bus != 0);
- } else {
- /*
- * Conn is directly connected to the host bus. PCI bus number is
- * hardcoded to 0 (even though it may have a logical bus number != 0)
- * and slot/function are derived from the pcibr_info_t associated
- * with the device.
- */
- pciio_bus = 0;
-
- pciio_slot = PCIBR_INFO_SLOT_GET_INT(pcibr_info);
- if (pciio_slot == PCIIO_SLOT_NONE)
- pciio_slot = PCI_TYPE1_SLOT(reg);
-
- pciio_func = pcibr_info->f_func;
- if (pciio_func == PCIIO_FUNC_NONE)
- pciio_func = PCI_TYPE1_FUNC(reg);
- }
-
- cfgbase = pcibr_func_config_addr((pcibr_soft_t) pcibr_info->f_mfast,
- pciio_bus, pciio_slot, pciio_func, 0);
-
- return cfgbase;
-}
-
-uint64_t
-pcibr_config_get(vertex_hdl_t conn,
- unsigned reg,
- unsigned size)
-{
- return do_pcibr_config_get(pcibr_config_addr(conn, reg),
- PCI_TYPE1_REG(reg), size);
-}
-
-uint64_t
-do_pcibr_config_get(cfg_p cfgbase,
- unsigned reg,
- unsigned size)
-{
- unsigned value;
-
- value = CWP(cfgbase, reg);
- if (reg & 3)
- value >>= 8 * (reg & 3);
- if (size < 4)
- value &= (1 << (8 * size)) - 1;
- return value;
-}
-
-void
-pcibr_config_set(vertex_hdl_t conn,
- unsigned reg,
- unsigned size,
- uint64_t value)
-{
- do_pcibr_config_set(pcibr_config_addr(conn, reg),
- PCI_TYPE1_REG(reg), size, value);
-}
-
-void
-do_pcibr_config_set(cfg_p cfgbase,
- unsigned reg,
- unsigned size,
- uint64_t value)
-{
- switch (size) {
- case 1:
- CBP(cfgbase, reg) = value;
- break;
- case 2:
- if (reg & 1) {
- CBP(cfgbase, reg) = value;
- CBP(cfgbase, reg + 1) = value >> 8;
- } else
- CSP(cfgbase, reg) = value;
- break;
- case 3:
- if (reg & 1) {
- CBP(cfgbase, reg) = value;
- CSP(cfgbase, (reg + 1)) = value >> 8;
- } else {
- CSP(cfgbase, reg) = value;
- CBP(cfgbase, reg + 2) = value >> 16;
- }
- break;
- case 4:
- CWP(cfgbase, reg) = value;
- break;
- }
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/interrupt.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/pci/pci_defs.h>
-
-#include <asm/sn/prio.h>
-#include <asm/sn/sn_private.h>
-
-/*
- * global variables to toggle the different levels of pcibr debugging.
- * -pcibr_debug_mask is the mask of the different types of debugging
- * you want to enable. See sys/PCI/pcibr_private.h
- * -pcibr_debug_module is the module you want to trace. By default
- * all modules are trace. The format is something like "001c10".
- * -pcibr_debug_widget is the widget you want to trace. For TIO
- * based bricks use the corelet id.
- * -pcibr_debug_slot is the pci slot you want to trace.
- */
-uint32_t pcibr_debug_mask; /* 0x00000000 to disable */
-static char *pcibr_debug_module = "all"; /* 'all' for all modules */
-static int pcibr_debug_widget = -1; /* '-1' for all widgets */
-static int pcibr_debug_slot = -1; /* '-1' for all slots */
-
-
-#if PCIBR_SOFT_LIST
-pcibr_list_p pcibr_list;
-#endif
-
-extern char *pci_space[];
-
-/* =====================================================================
- * Function Table of Contents
- *
- * The order of functions in this file has stopped
- * making much sense. We might want to take a look
- * at it some time and bring back some sanity, or
- * perhaps bust this file into smaller chunks.
- */
-
-extern void do_pcibr_rrb_free_all(pcibr_soft_t, pciio_slot_t);
-extern void do_pcibr_rrb_autoalloc(pcibr_soft_t, int, int, int);
-extern void pcibr_rrb_alloc_more(pcibr_soft_t pcibr_soft, int slot,
- int vchan, int more_rrbs);
-
-extern int pcibr_wrb_flush(vertex_hdl_t);
-extern int pcibr_rrb_alloc(vertex_hdl_t, int *, int *);
-void pcibr_rrb_alloc_more(pcibr_soft_t, int, int, int);
-
-extern void pcibr_rrb_flush(vertex_hdl_t);
-
-static int pcibr_try_set_device(pcibr_soft_t, pciio_slot_t, unsigned, uint64_t);
-void pcibr_release_device(pcibr_soft_t, pciio_slot_t, uint64_t);
-
-extern iopaddr_t pcibr_bus_addr_alloc(pcibr_soft_t, pciio_win_info_t,
- pciio_space_t, int, int, int);
-extern int hwgraph_vertex_name_get(vertex_hdl_t vhdl, char *buf,
- uint buflen);
-
-int pcibr_detach(vertex_hdl_t);
-void pcibr_directmap_init(pcibr_soft_t);
-int pcibr_pcix_rbars_calc(pcibr_soft_t);
-extern int pcibr_ate_alloc(pcibr_soft_t, int, struct resource *);
-extern void pcibr_ate_free(pcibr_soft_t, int, int, struct resource *);
-extern pciio_dmamap_t get_free_pciio_dmamap(vertex_hdl_t);
-extern void free_pciio_dmamap(pcibr_dmamap_t);
-extern int pcibr_widget_to_bus(vertex_hdl_t pcibr_vhdl);
-
-extern void ate_write(pcibr_soft_t, int, int, bridge_ate_t);
-
-pcibr_info_t pcibr_info_get(vertex_hdl_t);
-
-static iopaddr_t pcibr_addr_pci_to_xio(vertex_hdl_t, pciio_slot_t, pciio_space_t, iopaddr_t, size_t, unsigned);
-
-pcibr_piomap_t pcibr_piomap_alloc(vertex_hdl_t, device_desc_t, pciio_space_t, iopaddr_t, size_t, size_t, unsigned);
-void pcibr_piomap_free(pcibr_piomap_t);
-caddr_t pcibr_piomap_addr(pcibr_piomap_t, iopaddr_t, size_t);
-void pcibr_piomap_done(pcibr_piomap_t);
-caddr_t pcibr_piotrans_addr(vertex_hdl_t, device_desc_t, pciio_space_t, iopaddr_t, size_t, unsigned);
-iopaddr_t pcibr_piospace_alloc(vertex_hdl_t, device_desc_t, pciio_space_t, size_t, size_t);
-void pcibr_piospace_free(vertex_hdl_t, pciio_space_t, iopaddr_t, size_t);
-
-static iopaddr_t pcibr_flags_to_d64(unsigned, pcibr_soft_t);
-extern bridge_ate_t pcibr_flags_to_ate(pcibr_soft_t, unsigned);
-
-pcibr_dmamap_t pcibr_dmamap_alloc(vertex_hdl_t, device_desc_t, size_t, unsigned);
-void pcibr_dmamap_free(pcibr_dmamap_t);
-extern bridge_ate_p pcibr_ate_addr(pcibr_soft_t, int);
-static iopaddr_t pcibr_addr_xio_to_pci(pcibr_soft_t, iopaddr_t, size_t);
-iopaddr_t pcibr_dmamap_addr(pcibr_dmamap_t, paddr_t, size_t);
-void pcibr_dmamap_done(pcibr_dmamap_t);
-cnodeid_t pcibr_get_dmatrans_node(vertex_hdl_t);
-iopaddr_t pcibr_dmatrans_addr(vertex_hdl_t, device_desc_t, paddr_t, size_t, unsigned);
-void pcibr_dmamap_drain(pcibr_dmamap_t);
-void pcibr_dmaaddr_drain(vertex_hdl_t, paddr_t, size_t);
-iopaddr_t pcibr_dmamap_pciaddr_get(pcibr_dmamap_t);
-
-void pcibr_provider_startup(vertex_hdl_t);
-void pcibr_provider_shutdown(vertex_hdl_t);
-
-int pcibr_reset(vertex_hdl_t);
-pciio_endian_t pcibr_endian_set(vertex_hdl_t, pciio_endian_t, pciio_endian_t);
-int pcibr_device_flags_set(vertex_hdl_t, pcibr_device_flags_t);
-
-extern int pcibr_slot_info_free(vertex_hdl_t,pciio_slot_t);
-extern int pcibr_slot_detach(vertex_hdl_t, pciio_slot_t, int,
- char *, int *);
-
-pciio_businfo_t pcibr_businfo_get(vertex_hdl_t);
-
-/* =====================================================================
- * Device(x) register management
- */
-
-/* pcibr_try_set_device: attempt to modify Device(x)
- * for the specified slot on the specified bridge
- * as requested in flags, limited to the specified
- * bits. Returns which BRIDGE bits were in conflict,
- * or ZERO if everything went OK.
- *
- * Caller MUST hold pcibr_lock when calling this function.
- */
-static int
-pcibr_try_set_device(pcibr_soft_t pcibr_soft,
- pciio_slot_t slot,
- unsigned flags,
- uint64_t mask)
-{
- pcibr_soft_slot_t slotp;
- uint64_t old;
- uint64_t new;
- uint64_t chg;
- uint64_t bad;
- uint64_t badpmu;
- uint64_t badd32;
- uint64_t badd64;
- uint64_t fix;
- unsigned long s;
-
- slotp = &pcibr_soft->bs_slot[slot];
-
- s = pcibr_lock(pcibr_soft);
-
- old = slotp->bss_device;
-
- /* figure out what the desired
- * Device(x) bits are based on
- * the flags specified.
- */
-
- new = old;
-
- /* Currently, we inherit anything that
- * the new caller has not specified in
- * one way or another, unless we take
- * action here to not inherit.
- *
- * This is needed for the "swap" stuff,
- * since it could have been set via
- * pcibr_endian_set -- altho note that
- * any explicit PCIBR_BYTE_STREAM or
- * PCIBR_WORD_VALUES will freely override
- * the effect of that call (and vice
- * versa, no protection either way).
- *
- * I want to get rid of pcibr_endian_set
- * in favor of tracking DMA endianness
- * using the flags specified when DMA
- * channels are created.
- */
-
-#define BRIDGE_DEV_WRGA_BITS (BRIDGE_DEV_PMU_WRGA_EN | BRIDGE_DEV_DIR_WRGA_EN)
-#define BRIDGE_DEV_SWAP_BITS (BRIDGE_DEV_SWAP_PMU | BRIDGE_DEV_SWAP_DIR)
-
- /* Do not use Barrier, Write Gather,
- * or Prefetch unless asked.
- * Leave everything else as it
- * was from the last time.
- */
- new = new
- & ~BRIDGE_DEV_BARRIER
- & ~BRIDGE_DEV_WRGA_BITS
- & ~BRIDGE_DEV_PREF
- ;
-
- /* Generic macro flags
- */
- if (flags & PCIIO_DMA_DATA) {
- new = (new
- & ~BRIDGE_DEV_BARRIER) /* barrier off */
- | BRIDGE_DEV_PREF; /* prefetch on */
-
- }
- if (flags & PCIIO_DMA_CMD) {
- new = ((new
- & ~BRIDGE_DEV_PREF) /* prefetch off */
- & ~BRIDGE_DEV_WRGA_BITS) /* write gather off */
- | BRIDGE_DEV_BARRIER; /* barrier on */
- }
- /* Generic detail flags
- */
- if (flags & PCIIO_WRITE_GATHER)
- new |= BRIDGE_DEV_WRGA_BITS;
- if (flags & PCIIO_NOWRITE_GATHER)
- new &= ~BRIDGE_DEV_WRGA_BITS;
-
- if (flags & PCIIO_PREFETCH)
- new |= BRIDGE_DEV_PREF;
- if (flags & PCIIO_NOPREFETCH)
- new &= ~BRIDGE_DEV_PREF;
-
- if (flags & PCIBR_WRITE_GATHER)
- new |= BRIDGE_DEV_WRGA_BITS;
- if (flags & PCIBR_NOWRITE_GATHER)
- new &= ~BRIDGE_DEV_WRGA_BITS;
-
- if (flags & PCIIO_BYTE_STREAM)
- new |= BRIDGE_DEV_SWAP_DIR;
- if (flags & PCIIO_WORD_VALUES)
- new &= ~BRIDGE_DEV_SWAP_DIR;
-
- /* Provider-specific flags
- */
- if (flags & PCIBR_PREFETCH)
- new |= BRIDGE_DEV_PREF;
- if (flags & PCIBR_NOPREFETCH)
- new &= ~BRIDGE_DEV_PREF;
-
- if (flags & PCIBR_PRECISE)
- new |= BRIDGE_DEV_PRECISE;
- if (flags & PCIBR_NOPRECISE)
- new &= ~BRIDGE_DEV_PRECISE;
-
- if (flags & PCIBR_BARRIER)
- new |= BRIDGE_DEV_BARRIER;
- if (flags & PCIBR_NOBARRIER)
- new &= ~BRIDGE_DEV_BARRIER;
-
- if (flags & PCIBR_64BIT)
- new |= BRIDGE_DEV_DEV_SIZE;
- if (flags & PCIBR_NO64BIT)
- new &= ~BRIDGE_DEV_DEV_SIZE;
-
- /*
- * PIC BRINGUP WAR (PV# 855271):
- * Allow setting BRIDGE_DEV_VIRTUAL_EN on PIC iff we're a 64-bit
- * device. The bit is only intended for 64-bit devices and, on
- * PIC, can cause problems for 32-bit devices.
- */
- if (mask == BRIDGE_DEV_D64_BITS &&
- PCIBR_WAR_ENABLED(PV855271, pcibr_soft)) {
- if (flags & PCIBR_VCHAN1) {
- new |= BRIDGE_DEV_VIRTUAL_EN;
- mask |= BRIDGE_DEV_VIRTUAL_EN;
- }
- }
-
- /* PIC BRINGUP WAR (PV# 878674): Don't allow 64bit PIO accesses */
- if ((flags & PCIBR_64BIT) &&
- PCIBR_WAR_ENABLED(PV878674, pcibr_soft)) {
- new &= ~(1ull << 22);
- }
-
- chg = old ^ new; /* what are we changing, */
- chg &= mask; /* of the interesting bits */
-
- if (chg) {
-
- badd32 = slotp->bss_d32_uctr ? (BRIDGE_DEV_D32_BITS & chg) : 0;
- badpmu = slotp->bss_pmu_uctr ? (XBRIDGE_DEV_PMU_BITS & chg) : 0;
- badd64 = slotp->bss_d64_uctr ? (XBRIDGE_DEV_D64_BITS & chg) : 0;
- bad = badpmu | badd32 | badd64;
-
- if (bad) {
-
- /* some conflicts can be resolved by
- * forcing the bit on. this may cause
- * some performance degredation in
- * the stream(s) that want the bit off,
- * but the alternative is not allowing
- * the new stream at all.
- */
- if ( (fix = bad & (BRIDGE_DEV_PRECISE |
- BRIDGE_DEV_BARRIER)) ) {
- bad &= ~fix;
- /* don't change these bits if
- * they are already set in "old"
- */
- chg &= ~(fix & old);
- }
- /* some conflicts can be resolved by
- * forcing the bit off. this may cause
- * some performance degredation in
- * the stream(s) that want the bit on,
- * but the alternative is not allowing
- * the new stream at all.
- */
- if ( (fix = bad & (BRIDGE_DEV_WRGA_BITS |
- BRIDGE_DEV_PREF)) ) {
- bad &= ~fix;
- /* don't change these bits if
- * we wanted to turn them on.
- */
- chg &= ~(fix & new);
- }
- /* conflicts in other bits mean
- * we can not establish this DMA
- * channel while the other(s) are
- * still present.
- */
- if (bad) {
- pcibr_unlock(pcibr_soft, s);
- PCIBR_DEBUG((PCIBR_DEBUG_DEVREG, pcibr_soft->bs_vhdl,
- "pcibr_try_set_device: mod blocked by 0x%x\n", bad));
- return bad;
- }
- }
- }
- if (mask == BRIDGE_DEV_PMU_BITS)
- slotp->bss_pmu_uctr++;
- if (mask == BRIDGE_DEV_D32_BITS)
- slotp->bss_d32_uctr++;
- if (mask == BRIDGE_DEV_D64_BITS)
- slotp->bss_d64_uctr++;
-
- /* the value we want to write is the
- * original value, with the bits for
- * our selected changes flipped, and
- * with any disabled features turned off.
- */
- new = old ^ chg; /* only change what we want to change */
-
- if (slotp->bss_device == new) {
- pcibr_unlock(pcibr_soft, s);
- return 0;
- }
-
- pcireg_device_set(pcibr_soft, slot, new);
- slotp->bss_device = new;
- pcireg_tflush_get(pcibr_soft); /* wait until Bridge PIO complete */
- pcibr_unlock(pcibr_soft, s);
-
- PCIBR_DEBUG((PCIBR_DEBUG_DEVREG, pcibr_soft->bs_vhdl,
- "pcibr_try_set_device: Device(%d): 0x%x\n", slot, new));
- return 0;
-}
-
-void
-pcibr_release_device(pcibr_soft_t pcibr_soft,
- pciio_slot_t slot,
- uint64_t mask)
-{
- pcibr_soft_slot_t slotp;
- unsigned long s;
-
- slotp = &pcibr_soft->bs_slot[slot];
-
- s = pcibr_lock(pcibr_soft);
-
- if (mask == BRIDGE_DEV_PMU_BITS)
- slotp->bss_pmu_uctr--;
- if (mask == BRIDGE_DEV_D32_BITS)
- slotp->bss_d32_uctr--;
- if (mask == BRIDGE_DEV_D64_BITS)
- slotp->bss_d64_uctr--;
-
- pcibr_unlock(pcibr_soft, s);
-}
-
-
-/* =====================================================================
- * Bridge (pcibr) "Device Driver" entry points
- */
-
-
-static int
-pcibr_mmap(struct file * file, struct vm_area_struct * vma)
-{
- vertex_hdl_t pcibr_vhdl = file->f_dentry->d_fsdata;
- pcibr_soft_t pcibr_soft;
- void *bridge;
- unsigned long phys_addr;
- int error = 0;
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- bridge = pcibr_soft->bs_base;
- phys_addr = (unsigned long)bridge & ~0xc000000000000000; /* Mask out the Uncache bits */
- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
- vma->vm_flags |= VM_RESERVED | VM_IO;
- error = io_remap_page_range(vma, phys_addr, vma->vm_start,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot);
- return error;
-}
-
-/*
- * This is the file operation table for the pcibr driver.
- * As each of the functions are implemented, put the
- * appropriate function name below.
- */
-static int pcibr_mmap(struct file * file, struct vm_area_struct * vma);
-struct file_operations pcibr_fops = {
- .owner = THIS_MODULE,
- .mmap = pcibr_mmap,
-};
-
-
-/* This is special case code used by grio. There are plans to make
- * this a bit more general in the future, but till then this should
- * be sufficient.
- */
-pciio_slot_t
-pcibr_device_slot_get(vertex_hdl_t dev_vhdl)
-{
- char devname[MAXDEVNAME];
- vertex_hdl_t tdev;
- pciio_info_t pciio_info;
- pciio_slot_t slot = PCIIO_SLOT_NONE;
-
- vertex_to_name(dev_vhdl, devname, MAXDEVNAME);
-
- /* run back along the canonical path
- * until we find a PCI connection point.
- */
- tdev = hwgraph_connectpt_get(dev_vhdl);
- while (tdev != GRAPH_VERTEX_NONE) {
- pciio_info = pciio_info_chk(tdev);
- if (pciio_info) {
- slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
- break;
- }
- hwgraph_vertex_unref(tdev);
- tdev = hwgraph_connectpt_get(tdev);
- }
- hwgraph_vertex_unref(tdev);
-
- return slot;
-}
-
-pcibr_info_t
-pcibr_info_get(vertex_hdl_t vhdl)
-{
- return (pcibr_info_t) pciio_info_get(vhdl);
-}
-
-pcibr_info_t
-pcibr_device_info_new(
- pcibr_soft_t pcibr_soft,
- pciio_slot_t slot,
- pciio_function_t rfunc,
- pciio_vendor_id_t vendor,
- pciio_device_id_t device)
-{
- pcibr_info_t pcibr_info;
- pciio_function_t func;
- int ibit;
-
- func = (rfunc == PCIIO_FUNC_NONE) ? 0 : rfunc;
-
- /*
- * Create a pciio_info_s for this device. pciio_device_info_new()
- * will set the c_slot (which is suppose to represent the external
- * slot (i.e the slot number silk screened on the back of the I/O
- * brick)). So for PIC we need to adjust this "internal slot" num
- * passed into us, into its external representation. See comment
- * for the PCIBR_DEVICE_TO_SLOT macro for more information.
- */
- pcibr_info = kmalloc(sizeof (*(pcibr_info)), GFP_KERNEL);
- if ( !pcibr_info ) {
- return NULL;
- }
- memset(pcibr_info, 0, sizeof (*(pcibr_info)));
-
- pciio_device_info_new(&pcibr_info->f_c, pcibr_soft->bs_vhdl,
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot),
- rfunc, vendor, device);
- pcibr_info->f_dev = slot;
-
- /* Set PCI bus number */
- pcibr_info->f_bus = pcibr_widget_to_bus(pcibr_soft->bs_vhdl);
-
- if (slot != PCIIO_SLOT_NONE) {
-
- /*
- * Currently favored mapping from PCI
- * slot number and INTA/B/C/D to Bridge
- * PCI Interrupt Bit Number:
- *
- * SLOT A B C D
- * 0 0 4 0 4
- * 1 1 5 1 5
- * 2 2 6 2 6
- * 3 3 7 3 7
- * 4 4 0 4 0
- * 5 5 1 5 1
- * 6 6 2 6 2
- * 7 7 3 7 3
- *
- * XXX- allow pcibr_hints to override default
- * XXX- allow ADMIN to override pcibr_hints
- */
- for (ibit = 0; ibit < 4; ++ibit)
- pcibr_info->f_ibit[ibit] =
- (slot + 4 * ibit) & 7;
-
- /*
- * Record the info in the sparse func info space.
- */
- if (func < pcibr_soft->bs_slot[slot].bss_ninfo)
- pcibr_soft->bs_slot[slot].bss_infos[func] = pcibr_info;
- }
- return pcibr_info;
-}
-
-
-/*
- * pcibr_device_unregister
- * This frees up any hardware resources reserved for this PCI device
- * and removes any PCI infrastructural information setup for it.
- * This is usually used at the time of shutting down of the PCI card.
- */
-int
-pcibr_device_unregister(vertex_hdl_t pconn_vhdl)
-{
- pciio_info_t pciio_info;
- vertex_hdl_t pcibr_vhdl;
- pciio_slot_t slot;
- pcibr_soft_t pcibr_soft;
- int count_vchan0, count_vchan1;
- unsigned long s;
- int error_call;
- int error = 0;
-
- pciio_info = pciio_info_get(pconn_vhdl);
-
- pcibr_vhdl = pciio_info_master_get(pciio_info);
- slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
-
- /* Clear all the hardware xtalk resources for this device */
- xtalk_widgetdev_shutdown(pcibr_soft->bs_conn, slot);
-
- /* Flush all the rrbs */
- pcibr_rrb_flush(pconn_vhdl);
-
- /*
- * If the RRB configuration for this slot has changed, set it
- * back to the boot-time default
- */
- if (pcibr_soft->bs_rrb_valid_dflt[slot][VCHAN0] >= 0) {
-
- s = pcibr_lock(pcibr_soft);
-
- pcibr_soft->bs_rrb_res[slot] = pcibr_soft->bs_rrb_res[slot] +
- pcibr_soft->bs_rrb_valid[slot][VCHAN0] +
- pcibr_soft->bs_rrb_valid[slot][VCHAN1] +
- pcibr_soft->bs_rrb_valid[slot][VCHAN2] +
- pcibr_soft->bs_rrb_valid[slot][VCHAN3];
-
- /* Free the rrbs allocated to this slot, both the normal & virtual */
- do_pcibr_rrb_free_all(pcibr_soft, slot);
-
- count_vchan0 = pcibr_soft->bs_rrb_valid_dflt[slot][VCHAN0];
- count_vchan1 = pcibr_soft->bs_rrb_valid_dflt[slot][VCHAN1];
-
- pcibr_unlock(pcibr_soft, s);
-
- pcibr_rrb_alloc(pconn_vhdl, &count_vchan0, &count_vchan1);
-
- }
-
- /* Flush the write buffers !! */
- error_call = pcibr_wrb_flush(pconn_vhdl);
-
- if (error_call)
- error = error_call;
-
- /* Clear the information specific to the slot */
- error_call = pcibr_slot_info_free(pcibr_vhdl, slot);
-
- if (error_call)
- error = error_call;
-
- return error;
-
-}
-
-/*
- * pcibr_driver_reg_callback
- * CDL will call this function for each device found in the PCI
- * registry that matches the vendor/device IDs supported by
- * the driver being registered. The device's connection vertex
- * and the driver's attach function return status enable the
- * slot's device status to be set.
- */
-void
-pcibr_driver_reg_callback(vertex_hdl_t pconn_vhdl,
- int key1, int key2, int error)
-{
- pciio_info_t pciio_info;
- pcibr_info_t pcibr_info;
- vertex_hdl_t pcibr_vhdl;
- pciio_slot_t slot;
- pcibr_soft_t pcibr_soft;
-
- /* Do not set slot status for vendor/device ID wildcard drivers */
- if ((key1 == -1) || (key2 == -1))
- return;
-
- pciio_info = pciio_info_get(pconn_vhdl);
- pcibr_info = pcibr_info_get(pconn_vhdl);
-
- pcibr_vhdl = pciio_info_master_get(pciio_info);
- slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- pcibr_info->f_att_det_error = error;
-
-#ifdef CONFIG_HOTPLUG_PCI_SGI
- pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_STATUS_MASK;
-
- if (error) {
- pcibr_soft->bs_slot[slot].slot_status |= SLOT_STARTUP_INCMPLT;
- } else {
- pcibr_soft->bs_slot[slot].slot_status |= SLOT_STARTUP_CMPLT;
- }
-#endif /* CONFIG_HOTPLUG_PCI_SGI */
-}
-
-/*
- * pcibr_driver_unreg_callback
- * CDL will call this function for each device found in the PCI
- * registry that matches the vendor/device IDs supported by
- * the driver being unregistered. The device's connection vertex
- * and the driver's detach function return status enable the
- * slot's device status to be set.
- */
-void
-pcibr_driver_unreg_callback(vertex_hdl_t pconn_vhdl,
- int key1, int key2, int error)
-{
- pciio_info_t pciio_info;
- pcibr_info_t pcibr_info;
- vertex_hdl_t pcibr_vhdl;
- pciio_slot_t slot;
- pcibr_soft_t pcibr_soft;
-
- /* Do not set slot status for vendor/device ID wildcard drivers */
- if ((key1 == -1) || (key2 == -1))
- return;
-
- pciio_info = pciio_info_get(pconn_vhdl);
- pcibr_info = pcibr_info_get(pconn_vhdl);
-
- pcibr_vhdl = pciio_info_master_get(pciio_info);
- slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- pcibr_info->f_att_det_error = error;
-#ifdef CONFIG_HOTPLUG_PCI_SGI
- pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_STATUS_MASK;
-
- if (error) {
- pcibr_soft->bs_slot[slot].slot_status |= SLOT_SHUTDOWN_INCMPLT;
- } else {
- pcibr_soft->bs_slot[slot].slot_status |= SLOT_SHUTDOWN_CMPLT;
- }
-#endif /* CONFIG_HOTPLUG_PCI_SGI */
-}
-
-/*
- * pcibr_detach:
- * Detach the bridge device from the hwgraph after cleaning out all the
- * underlying vertices.
- */
-
-int
-pcibr_detach(vertex_hdl_t xconn)
-{
- pciio_slot_t slot;
- vertex_hdl_t pcibr_vhdl;
- pcibr_soft_t pcibr_soft;
- unsigned long s;
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DETACH, xconn, "pcibr_detach\n"));
-
- /* Get the bridge vertex from its xtalk connection point */
- if (hwgraph_traverse(xconn, EDGE_LBL_PCI, &pcibr_vhdl) != GRAPH_SUCCESS)
- return 1;
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
-
- /* Disable the interrupts from the bridge */
- s = pcibr_lock(pcibr_soft);
- pcireg_intr_enable_set(pcibr_soft, 0);
- pcibr_unlock(pcibr_soft, s);
-
- /* Detach all the PCI devices talking to this bridge */
- for (slot = pcibr_soft->bs_min_slot;
- slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) {
- pcibr_slot_detach(pcibr_vhdl, slot, 0, (char *)NULL, (int *)NULL);
- }
-
- /* Unregister the no-slot connection point */
- pciio_device_info_unregister(pcibr_vhdl,
- &(pcibr_soft->bs_noslot_info->f_c));
-
- kfree(pcibr_soft->bs_name);
-
- /* Disconnect the error interrupt and free the xtalk resources
- * associated with it.
- */
- xtalk_intr_disconnect(pcibr_soft->bsi_err_intr);
- xtalk_intr_free(pcibr_soft->bsi_err_intr);
-
- /* Clear the software state maintained by the bridge driver for this
- * bridge.
- */
- kfree(pcibr_soft);
-
- /* Remove the Bridge revision labelled info */
- (void)hwgraph_info_remove_LBL(pcibr_vhdl, INFO_LBL_PCIBR_ASIC_REV, NULL);
-
- return 0;
-}
-
-
-/*
- * Set the Bridge's 32-bit PCI to XTalk Direct Map register to the most useful
- * value we can determine. Note that we must use a single xid for all of:
- * -direct-mapped 32-bit DMA accesses
- * -direct-mapped 64-bit DMA accesses
- * -DMA accesses through the PMU
- * -interrupts
- * This is the only way to guarantee that completion interrupts will reach a
- * CPU after all DMA data has reached memory.
- */
-void
-pcibr_directmap_init(pcibr_soft_t pcibr_soft)
-{
- paddr_t paddr;
- iopaddr_t xbase;
- uint64_t diroff;
- cnodeid_t cnodeid = 0; /* We need api for diroff api */
- nasid_t nasid;
-
- nasid = cnodeid_to_nasid(cnodeid);
- paddr = NODE_OFFSET(nasid) + 0;
-
- /* Assume that if we ask for a DMA mapping to zero the XIO host will
- * transmute this into a request for the lowest hunk of memory.
- */
- xbase = xtalk_dmatrans_addr(pcibr_soft->bs_conn, 0, paddr, PAGE_SIZE, 0);
-
- diroff = xbase >> BRIDGE_DIRMAP_OFF_ADDRSHFT;
- pcireg_dirmap_diroff_set(pcibr_soft, diroff);
- pcireg_dirmap_wid_set(pcibr_soft, pcibr_soft->bs_mxid);
- pcibr_soft->bs_dir_xport = pcibr_soft->bs_mxid;
- if (xbase == (512 << 20)) { /* 512Meg */
- pcireg_dirmap_add512_set(pcibr_soft);
- pcibr_soft->bs_dir_xbase = (512 << 20);
- } else {
- pcireg_dirmap_add512_clr(pcibr_soft);
- pcibr_soft->bs_dir_xbase = diroff << BRIDGE_DIRMAP_OFF_ADDRSHFT;
- }
-}
-
-
-int
-pcibr_asic_rev(vertex_hdl_t pconn_vhdl)
-{
- vertex_hdl_t pcibr_vhdl;
- int rc;
- arbitrary_info_t ainfo;
-
- if (GRAPH_SUCCESS !=
- hwgraph_traverse(pconn_vhdl, EDGE_LBL_MASTER, &pcibr_vhdl))
- return -1;
-
- rc = hwgraph_info_get_LBL(pcibr_vhdl, INFO_LBL_PCIBR_ASIC_REV, &ainfo);
-
- /*
- * Any hwgraph function that returns a vertex handle will implicity
- * increment that vertex's reference count. The caller must explicity
- * decrement the vertex's referece count after the last reference to
- * that vertex.
- *
- * Decrement reference count incremented by call to hwgraph_traverse().
- *
- */
- hwgraph_vertex_unref(pcibr_vhdl);
-
- if (rc != GRAPH_SUCCESS)
- return -1;
-
- return (int) ainfo;
-}
-
-/* =====================================================================
- * PIO MANAGEMENT
- */
-
-static iopaddr_t
-pcibr_addr_pci_to_xio(vertex_hdl_t pconn_vhdl,
- pciio_slot_t slot,
- pciio_space_t space,
- iopaddr_t pci_addr,
- size_t req_size,
- unsigned flags)
-{
- pcibr_info_t pcibr_info = pcibr_info_get(pconn_vhdl);
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
- unsigned bar; /* which BASE reg on device is decoding */
- iopaddr_t xio_addr = XIO_NOWHERE;
- iopaddr_t base = 0;
- iopaddr_t limit = 0;
-
- pciio_space_t wspace; /* which space device is decoding */
- iopaddr_t wbase; /* base of device decode on PCI */
- size_t wsize; /* size of device decode on PCI */
-
- int try; /* DevIO(x) window scanning order control */
- int maxtry, halftry;
- int win; /* which DevIO(x) window is being used */
- pciio_space_t mspace; /* target space for devio(x) register */
- iopaddr_t mbase; /* base of devio(x) mapped area on PCI */
- size_t msize; /* size of devio(x) mapped area on PCI */
- size_t mmask; /* addr bits stored in Device(x) */
-
- unsigned long s;
-
- s = pcibr_lock(pcibr_soft);
-
- if (pcibr_soft->bs_slot[slot].has_host) {
- slot = pcibr_soft->bs_slot[slot].host_slot;
- pcibr_info = pcibr_soft->bs_slot[slot].bss_infos[0];
-
- /*
- * Special case for dual-slot pci devices such as ioc3 on IP27
- * baseio. In these cases, pconn_vhdl should never be for a pci
- * function on a subordiate PCI bus, so we can safely reset pciio_info
- * to be the info struct embedded in pcibr_info. Failure to do this
- * results in using a bogus pciio_info_t for calculations done later
- * in this routine.
- */
-
- pciio_info = &pcibr_info->f_c;
- }
- if (space == PCIIO_SPACE_NONE)
- goto done;
-
- if (space == PCIIO_SPACE_CFG) {
- /*
- * Usually, the first mapping
- * established to a PCI device
- * is to its config space.
- *
- * In any case, we definitely
- * do NOT need to worry about
- * PCI BASE registers, and
- * MUST NOT attempt to point
- * the DevIO(x) window at
- * this access ...
- */
- if (((flags & PCIIO_BYTE_STREAM) == 0) &&
- ((pci_addr + req_size) <= BRIDGE_TYPE0_CFG_FUNC_OFF))
- xio_addr = pci_addr + PCIBR_TYPE0_CFG_DEV(pcibr_soft, slot);
-
- goto done;
- }
- if (space == PCIIO_SPACE_ROM) {
- /* PIO to the Expansion Rom.
- * Driver is responsible for
- * enabling and disabling
- * decodes properly.
- */
- wbase = pciio_info->c_rbase;
- wsize = pciio_info->c_rsize;
-
- /*
- * While the driver should know better
- * than to attempt to map more space
- * than the device is decoding, he might
- * do it; better to bail out here.
- */
- if ((pci_addr + req_size) > wsize)
- goto done;
-
- pci_addr += wbase;
- space = PCIIO_SPACE_MEM;
- }
- /*
- * reduce window mappings to raw
- * space mappings (maybe allocating
- * windows), and try for DevIO(x)
- * usage (setting it if it is available).
- */
- bar = space - PCIIO_SPACE_WIN0;
- if (bar < 6) {
- wspace = pciio_info->c_window[bar].w_space;
- if (wspace == PCIIO_SPACE_NONE)
- goto done;
-
- /* get PCI base and size */
- wbase = pciio_info->c_window[bar].w_base;
- wsize = pciio_info->c_window[bar].w_size;
-
- /*
- * While the driver should know better
- * than to attempt to map more space
- * than the device is decoding, he might
- * do it; better to bail out here.
- */
- if ((pci_addr + req_size) > wsize)
- goto done;
-
- /* shift from window relative to
- * decoded space relative.
- */
- pci_addr += wbase;
- space = wspace;
- } else
- bar = -1;
-
- /* Scan all the DevIO(x) windows twice looking for one
- * that can satisfy our request. The first time through,
- * only look at assigned windows; the second time, also
- * look at PCIIO_SPACE_NONE windows. Arrange the order
- * so we always look at our own window first.
- *
- * We will not attempt to satisfy a single request
- * by concatinating multiple windows.
- */
- maxtry = PCIBR_NUM_SLOTS(pcibr_soft) * 2;
- halftry = PCIBR_NUM_SLOTS(pcibr_soft) - 1;
- for (try = 0; try < maxtry; ++try) {
- uint64_t devreg;
- unsigned offset;
-
- /* calculate win based on slot, attempt, and max possible
- devices on bus */
- win = (try + slot) % PCIBR_NUM_SLOTS(pcibr_soft);
-
- /* If this DevIO(x) mapping area can provide
- * a mapping to this address, use it.
- */
- msize = (win < 2) ? 0x200000 : 0x100000;
- mmask = -msize;
- if (space != PCIIO_SPACE_IO)
- mmask &= 0x3FFFFFFF;
-
- offset = pci_addr & (msize - 1);
-
- /* If this window can't possibly handle that request,
- * go on to the next window.
- */
- if (((pci_addr & (msize - 1)) + req_size) > msize)
- continue;
-
- devreg = pcibr_soft->bs_slot[win].bss_device;
-
- /* Is this window "nailed down"?
- * If not, maybe we can use it.
- * (only check this the second time through)
- */
- mspace = pcibr_soft->bs_slot[win].bss_devio.bssd_space;
- if ((try > halftry) && (mspace == PCIIO_SPACE_NONE)) {
-
- /* If this is the primary DevIO(x) window
- * for some other device, skip it.
- */
- if ((win != slot) &&
- (PCIIO_VENDOR_ID_NONE !=
- pcibr_soft->bs_slot[win].bss_vendor_id))
- continue;
-
- /* It's a free window, and we fit in it.
- * Set up Device(win) to our taste.
- */
- mbase = pci_addr & mmask;
-
- /* check that we would really get from
- * here to there.
- */
- if ((mbase | offset) != pci_addr)
- continue;
-
- devreg &= ~BRIDGE_DEV_OFF_MASK;
- if (space != PCIIO_SPACE_IO)
- devreg |= BRIDGE_DEV_DEV_IO_MEM;
- else
- devreg &= ~BRIDGE_DEV_DEV_IO_MEM;
- devreg |= (mbase >> 20) & BRIDGE_DEV_OFF_MASK;
-
- /* default is WORD_VALUES.
- * if you specify both,
- * operation is undefined.
- */
- if (flags & PCIIO_BYTE_STREAM)
- devreg |= BRIDGE_DEV_DEV_SWAP;
- else
- devreg &= ~BRIDGE_DEV_DEV_SWAP;
-
- if (pcibr_soft->bs_slot[win].bss_device != devreg) {
- pcireg_device_set(pcibr_soft, win, devreg);
- pcibr_soft->bs_slot[win].bss_device = devreg;
- pcireg_tflush_get(pcibr_soft);
-
- PCIBR_DEBUG((PCIBR_DEBUG_DEVREG, pconn_vhdl,
- "pcibr_addr_pci_to_xio: Device(%d): 0x%x\n",
- win, devreg));
- }
- pcibr_soft->bs_slot[win].bss_devio.bssd_space = space;
- pcibr_soft->bs_slot[win].bss_devio.bssd_base = mbase;
- xio_addr = PCIBR_BRIDGE_DEVIO(pcibr_soft, win) + (pci_addr - mbase);
-
- /* Increment this DevIO's use count */
- pcibr_soft->bs_slot[win].bss_devio.bssd_ref_cnt++;
-
- /* Save the DevIO register index used to access this BAR */
- if (bar != -1)
- pcibr_info->f_window[bar].w_devio_index = win;
-
- PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_addr_pci_to_xio: map to space %s [0x%lx..0x%lx] "
- "for slot %d allocates DevIO(%d) Device(%d) set to %lx\n",
- pci_space[space], pci_addr, pci_addr + req_size - 1,
- slot, win, win, devreg));
-
- goto done;
- } /* endif DevIO(x) not pointed */
- mbase = pcibr_soft->bs_slot[win].bss_devio.bssd_base;
-
- /* Now check for request incompat with DevIO(x)
- */
- if ((mspace != space) ||
- (pci_addr < mbase) ||
- ((pci_addr + req_size) > (mbase + msize)) ||
- ((flags & PCIIO_BYTE_STREAM) && !(devreg & BRIDGE_DEV_DEV_SWAP)) ||
- (!(flags & PCIIO_BYTE_STREAM) && (devreg & BRIDGE_DEV_DEV_SWAP)))
- continue;
-
- /* DevIO(x) window is pointed at PCI space
- * that includes our target. Calculate the
- * final XIO address, release the lock and
- * return.
- */
- xio_addr = PCIBR_BRIDGE_DEVIO(pcibr_soft, win) + (pci_addr - mbase);
-
- /* Increment this DevIO's use count */
- pcibr_soft->bs_slot[win].bss_devio.bssd_ref_cnt++;
-
- /* Save the DevIO register index used to access this BAR */
- if (bar != -1)
- pcibr_info->f_window[bar].w_devio_index = win;
-
- PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_addr_pci_to_xio: map to space %s [0x%lx..0x%lx] "
- "for slot %d uses DevIO(%d)\n", pci_space[space],
- pci_addr, pci_addr + req_size - 1, slot, win));
- goto done;
- }
-
- switch (space) {
- /*
- * Accesses to device decode
- * areas that do a not fit
- * within the DevIO(x) space are
- * modified to be accesses via
- * the direct mapping areas.
- *
- * If necessary, drivers can
- * explicitly ask for mappings
- * into these address spaces,
- * but this should never be needed.
- */
- case PCIIO_SPACE_MEM: /* "mem space" */
- case PCIIO_SPACE_MEM32: /* "mem, use 32-bit-wide bus" */
- if (IS_PIC_BUSNUM_SOFT(pcibr_soft, 0)) { /* PIC bus 0 */
- base = PICBRIDGE0_PCI_MEM32_BASE;
- limit = PICBRIDGE0_PCI_MEM32_LIMIT;
- } else if (IS_PIC_BUSNUM_SOFT(pcibr_soft, 1)) { /* PIC bus 1 */
- base = PICBRIDGE1_PCI_MEM32_BASE;
- limit = PICBRIDGE1_PCI_MEM32_LIMIT;
- } else {
- printk("pcibr_addr_pci_to_xio(): unknown bridge type");
- return (iopaddr_t)0;
- }
-
- if ((pci_addr + base + req_size - 1) <= limit)
- xio_addr = pci_addr + base;
- break;
-
- case PCIIO_SPACE_MEM64: /* "mem, use 64-bit-wide bus" */
- if (IS_PIC_BUSNUM_SOFT(pcibr_soft, 0)) { /* PIC bus 0 */
- base = PICBRIDGE0_PCI_MEM64_BASE;
- limit = PICBRIDGE0_PCI_MEM64_LIMIT;
- } else if (IS_PIC_BUSNUM_SOFT(pcibr_soft, 1)) { /* PIC bus 1 */
- base = PICBRIDGE1_PCI_MEM64_BASE;
- limit = PICBRIDGE1_PCI_MEM64_LIMIT;
- } else {
- printk("pcibr_addr_pci_to_xio(): unknown bridge type");
- return (iopaddr_t)0;
- }
-
- if ((pci_addr + base + req_size - 1) <= limit)
- xio_addr = pci_addr + base;
- break;
-
- case PCIIO_SPACE_IO: /* "i/o space" */
- /*
- * PIC bridges do not support big-window aliases into PCI I/O space
- */
- xio_addr = XIO_NOWHERE;
- break;
- }
-
- /* Check that "Direct PIO" byteswapping matches,
- * try to change it if it does not.
- */
- if (xio_addr != XIO_NOWHERE) {
- unsigned bst; /* nonzero to set bytestream */
- unsigned *bfp; /* addr of record of how swapper is set */
- uint64_t swb; /* which control bit to mung */
- unsigned bfo; /* current swapper setting */
- unsigned bfn; /* desired swapper setting */
-
- bfp = ((space == PCIIO_SPACE_IO)
- ? (&pcibr_soft->bs_pio_end_io)
- : (&pcibr_soft->bs_pio_end_mem));
-
- bfo = *bfp;
-
- bst = flags & PCIIO_BYTE_STREAM;
-
- bfn = bst ? PCIIO_BYTE_STREAM : PCIIO_WORD_VALUES;
-
- if (bfn == bfo) { /* we already match. */
- ;
- } else if (bfo != 0) { /* we have a conflict. */
- PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_addr_pci_to_xio: swap conflict in %s, "
- "was%s%s, want%s%s\n", pci_space[space],
- bfo & PCIIO_BYTE_STREAM ? " BYTE_STREAM" : "",
- bfo & PCIIO_WORD_VALUES ? " WORD_VALUES" : "",
- bfn & PCIIO_BYTE_STREAM ? " BYTE_STREAM" : "",
- bfn & PCIIO_WORD_VALUES ? " WORD_VALUES" : ""));
- xio_addr = XIO_NOWHERE;
- } else { /* OK to make the change. */
- swb = (space == PCIIO_SPACE_IO) ? 0: BRIDGE_CTRL_MEM_SWAP;
- if (bst) {
- pcireg_control_bit_set(pcibr_soft, swb);
- } else {
- pcireg_control_bit_clr(pcibr_soft, swb);
- }
-
- *bfp = bfn; /* record the assignment */
-
- PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_addr_pci_to_xio: swap for %s set to%s%s\n",
- pci_space[space],
- bfn & PCIIO_BYTE_STREAM ? " BYTE_STREAM" : "",
- bfn & PCIIO_WORD_VALUES ? " WORD_VALUES" : ""));
- }
- }
- done:
- pcibr_unlock(pcibr_soft, s);
- return xio_addr;
-}
-
-/*ARGSUSED6 */
-pcibr_piomap_t
-pcibr_piomap_alloc(vertex_hdl_t pconn_vhdl,
- device_desc_t dev_desc,
- pciio_space_t space,
- iopaddr_t pci_addr,
- size_t req_size,
- size_t req_size_max,
- unsigned flags)
-{
- pcibr_info_t pcibr_info = pcibr_info_get(pconn_vhdl);
- pciio_info_t pciio_info = &pcibr_info->f_c;
- pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
- vertex_hdl_t xconn_vhdl = pcibr_soft->bs_conn;
-
- pcibr_piomap_t *mapptr;
- pcibr_piomap_t maplist;
- pcibr_piomap_t pcibr_piomap;
- iopaddr_t xio_addr;
- xtalk_piomap_t xtalk_piomap;
- unsigned long s;
-
- /* Make sure that the req sizes are non-zero */
- if ((req_size < 1) || (req_size_max < 1)) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_piomap_alloc: req_size | req_size_max < 1\n"));
- return NULL;
- }
-
- /*
- * Code to translate slot/space/addr
- * into xio_addr is common between
- * this routine and pcibr_piotrans_addr.
- */
- xio_addr = pcibr_addr_pci_to_xio(pconn_vhdl, pciio_slot, space, pci_addr, req_size, flags);
-
- if (xio_addr == XIO_NOWHERE) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_piomap_alloc: xio_addr == XIO_NOWHERE\n"));
- return NULL;
- }
-
- /* Check the piomap list to see if there is already an allocated
- * piomap entry but not in use. If so use that one. Otherwise
- * allocate a new piomap entry and add it to the piomap list
- */
- mapptr = &(pcibr_info->f_piomap);
-
- s = pcibr_lock(pcibr_soft);
- for (pcibr_piomap = *mapptr;
- pcibr_piomap != NULL;
- pcibr_piomap = pcibr_piomap->bp_next) {
- if (pcibr_piomap->bp_mapsz == 0)
- break;
- }
-
- if (pcibr_piomap)
- mapptr = NULL;
- else {
- pcibr_unlock(pcibr_soft, s);
- pcibr_piomap = kmalloc(sizeof (*(pcibr_piomap)), GFP_KERNEL);
- if ( !pcibr_piomap ) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_piomap_alloc: malloc fails\n"));
- return NULL;
- }
- memset(pcibr_piomap, 0, sizeof (*(pcibr_piomap)));
- }
-
- pcibr_piomap->bp_dev = pconn_vhdl;
- pcibr_piomap->bp_slot = PCIBR_DEVICE_TO_SLOT(pcibr_soft, pciio_slot);
- pcibr_piomap->bp_flags = flags;
- pcibr_piomap->bp_space = space;
- pcibr_piomap->bp_pciaddr = pci_addr;
- pcibr_piomap->bp_mapsz = req_size;
- pcibr_piomap->bp_soft = pcibr_soft;
- pcibr_piomap->bp_toc = ATOMIC_INIT(0);
-
- if (mapptr) {
- s = pcibr_lock(pcibr_soft);
- maplist = *mapptr;
- pcibr_piomap->bp_next = maplist;
- *mapptr = pcibr_piomap;
- }
- pcibr_unlock(pcibr_soft, s);
-
-
- if (pcibr_piomap) {
- xtalk_piomap =
- xtalk_piomap_alloc(xconn_vhdl, 0,
- xio_addr,
- req_size, req_size_max,
- flags & PIOMAP_FLAGS);
- if (xtalk_piomap) {
- pcibr_piomap->bp_xtalk_addr = xio_addr;
- pcibr_piomap->bp_xtalk_pio = xtalk_piomap;
- } else {
- pcibr_piomap->bp_mapsz = 0;
- pcibr_piomap = 0;
- }
- }
-
- PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_piomap_alloc: map=0x%lx\n", pcibr_piomap));
-
- return pcibr_piomap;
-}
-
-/*ARGSUSED */
-void
-pcibr_piomap_free(pcibr_piomap_t pcibr_piomap)
-{
- PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pcibr_piomap->bp_dev,
- "pcibr_piomap_free: map=0x%lx\n", pcibr_piomap));
-
- xtalk_piomap_free(pcibr_piomap->bp_xtalk_pio);
- pcibr_piomap->bp_xtalk_pio = 0;
- pcibr_piomap->bp_mapsz = 0;
-}
-
-/*ARGSUSED */
-caddr_t
-pcibr_piomap_addr(pcibr_piomap_t pcibr_piomap,
- iopaddr_t pci_addr,
- size_t req_size)
-{
- caddr_t addr;
- addr = xtalk_piomap_addr(pcibr_piomap->bp_xtalk_pio,
- pcibr_piomap->bp_xtalk_addr +
- pci_addr - pcibr_piomap->bp_pciaddr,
- req_size);
- PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pcibr_piomap->bp_dev,
- "pcibr_piomap_addr: map=0x%lx, addr=0x%lx\n",
- pcibr_piomap, addr));
-
- return addr;
-}
-
-/*ARGSUSED */
-void
-pcibr_piomap_done(pcibr_piomap_t pcibr_piomap)
-{
- PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pcibr_piomap->bp_dev,
- "pcibr_piomap_done: map=0x%lx\n", pcibr_piomap));
- xtalk_piomap_done(pcibr_piomap->bp_xtalk_pio);
-}
-
-/*ARGSUSED */
-caddr_t
-pcibr_piotrans_addr(vertex_hdl_t pconn_vhdl,
- device_desc_t dev_desc,
- pciio_space_t space,
- iopaddr_t pci_addr,
- size_t req_size,
- unsigned flags)
-{
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
- pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
- vertex_hdl_t xconn_vhdl = pcibr_soft->bs_conn;
-
- iopaddr_t xio_addr;
- caddr_t addr;
-
- xio_addr = pcibr_addr_pci_to_xio(pconn_vhdl, pciio_slot, space, pci_addr, req_size, flags);
-
- if (xio_addr == XIO_NOWHERE) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIODIR, pconn_vhdl,
- "pcibr_piotrans_addr: xio_addr == XIO_NOWHERE\n"));
- return NULL;
- }
-
- addr = xtalk_piotrans_addr(xconn_vhdl, 0, xio_addr, req_size, flags & PIOMAP_FLAGS);
- PCIBR_DEBUG((PCIBR_DEBUG_PIODIR, pconn_vhdl,
- "pcibr_piotrans_addr: xio_addr=0x%lx, addr=0x%lx\n",
- xio_addr, addr));
- return addr;
-}
-
-/*
- * PIO Space allocation and management.
- * Allocate and Manage the PCI PIO space (mem and io space)
- * This routine is pretty simplistic at this time, and
- * does pretty trivial management of allocation and freeing.
- * The current scheme is prone for fragmentation.
- * Change the scheme to use bitmaps.
- */
-
-/*ARGSUSED */
-iopaddr_t
-pcibr_piospace_alloc(vertex_hdl_t pconn_vhdl,
- device_desc_t dev_desc,
- pciio_space_t space,
- size_t req_size,
- size_t alignment)
-{
- pcibr_info_t pcibr_info = pcibr_info_get(pconn_vhdl);
- pciio_info_t pciio_info = &pcibr_info->f_c;
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
-
- pciio_piospace_t piosp;
- unsigned long s;
-
- iopaddr_t start_addr;
- size_t align_mask;
-
- /*
- * Check for proper alignment
- */
- ASSERT(alignment >= PAGE_SIZE);
- ASSERT((alignment & (alignment - 1)) == 0);
-
- align_mask = alignment - 1;
- s = pcibr_lock(pcibr_soft);
-
- /*
- * First look if a previously allocated chunk exists.
- */
- piosp = pcibr_info->f_piospace;
- if (piosp) {
- /*
- * Look through the list for a right sized free chunk.
- */
- do {
- if (piosp->free &&
- (piosp->space == space) &&
- (piosp->count >= req_size) &&
- !(piosp->start & align_mask)) {
- piosp->free = 0;
- pcibr_unlock(pcibr_soft, s);
- return piosp->start;
- }
- piosp = piosp->next;
- } while (piosp);
- }
- ASSERT(!piosp);
-
- /*
- * Allocate PCI bus address, usually for the Universe chip driver;
- * do not pass window info since the actual PCI bus address
- * space will never be freed. The space may be reused after it
- * is logically released by pcibr_piospace_free().
- */
- switch (space) {
- case PCIIO_SPACE_IO:
- start_addr = pcibr_bus_addr_alloc(pcibr_soft, NULL,
- PCIIO_SPACE_IO,
- 0, req_size, alignment);
- break;
-
- case PCIIO_SPACE_MEM:
- case PCIIO_SPACE_MEM32:
- start_addr = pcibr_bus_addr_alloc(pcibr_soft, NULL,
- PCIIO_SPACE_MEM32,
- 0, req_size, alignment);
- break;
-
- default:
- ASSERT(0);
- pcibr_unlock(pcibr_soft, s);
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_piospace_alloc: unknown space %d\n", space));
- return 0;
- }
-
- /*
- * If too big a request, reject it.
- */
- if (!start_addr) {
- pcibr_unlock(pcibr_soft, s);
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_piospace_alloc: request 0x%lx to big\n", req_size));
- return 0;
- }
-
- piosp = kmalloc(sizeof (*(piosp)), GFP_KERNEL);
- if ( !piosp ) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_piospace_alloc: malloc fails\n"));
- return 0;
- }
- memset(piosp, 0, sizeof (*(piosp)));
-
- piosp->free = 0;
- piosp->space = space;
- piosp->start = start_addr;
- piosp->count = req_size;
- piosp->next = pcibr_info->f_piospace;
- pcibr_info->f_piospace = piosp;
-
- pcibr_unlock(pcibr_soft, s);
-
- PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_piospace_alloc: piosp=0x%lx\n", piosp));
-
- return start_addr;
-}
-
-#define ERR_MSG "!Device %s freeing size (0x%lx) different than allocated (0x%lx)"
-/*ARGSUSED */
-void
-pcibr_piospace_free(vertex_hdl_t pconn_vhdl,
- pciio_space_t space,
- iopaddr_t pciaddr,
- size_t req_size)
-{
- pcibr_info_t pcibr_info = pcibr_info_get(pconn_vhdl);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pcibr_info->f_mfast;
- pciio_piospace_t piosp;
- unsigned long s;
- char name[1024];
-
- /*
- * Look through the bridge data structures for the pciio_piospace_t
- * structure corresponding to 'pciaddr'
- */
- s = pcibr_lock(pcibr_soft);
- piosp = pcibr_info->f_piospace;
- while (piosp) {
- /*
- * Piospace free can only be for the complete
- * chunk and not parts of it..
- */
- if (piosp->start == pciaddr) {
- if (piosp->count == req_size)
- break;
- /*
- * Improper size passed for freeing..
- * Print a message and break;
- */
- hwgraph_vertex_name_get(pconn_vhdl, name, 1024);
- printk(KERN_WARNING "pcibr_piospace_free: error");
- printk(KERN_WARNING "Device %s freeing size (0x%lx) different than allocated (0x%lx)",
- name, req_size, piosp->count);
- printk(KERN_WARNING "Freeing 0x%lx instead", piosp->count);
- break;
- }
- piosp = piosp->next;
- }
-
- if (!piosp) {
- printk(KERN_WARNING
- "pcibr_piospace_free: Address 0x%lx size 0x%lx - No match\n",
- pciaddr, req_size);
- pcibr_unlock(pcibr_soft, s);
- return;
- }
- piosp->free = 1;
- pcibr_unlock(pcibr_soft, s);
-
- PCIBR_DEBUG((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_piospace_free: piosp=0x%lx\n", piosp));
- return;
-}
-
-/* =====================================================================
- * DMA MANAGEMENT
- *
- * The Bridge ASIC provides three methods of doing
- * DMA: via a "direct map" register available in
- * 32-bit PCI space (which selects a contiguous 2G
- * address space on some other widget), via
- * "direct" addressing via 64-bit PCI space (all
- * destination information comes from the PCI
- * address, including transfer attributes), and via
- * a "mapped" region that allows a bunch of
- * different small mappings to be established with
- * the PMU.
- *
- * For efficiency, we most prefer to use the 32-bit
- * direct mapping facility, since it requires no
- * resource allocations. The advantage of using the
- * PMU over the 64-bit direct is that single-cycle
- * PCI addressing can be used; the advantage of
- * using 64-bit direct over PMU addressing is that
- * we do not have to allocate entries in the PMU.
- */
-
-/*
- * Convert PCI-generic software flags and Bridge-specific software flags
- * into Bridge-specific Direct Map attribute bits.
- */
-static iopaddr_t
-pcibr_flags_to_d64(unsigned flags, pcibr_soft_t pcibr_soft)
-{
- iopaddr_t attributes = 0;
-
- /* Sanity check: Bridge only allows use of VCHAN1 via 64-bit addrs */
-#ifdef LATER
- ASSERT_ALWAYS(!(flags & PCIBR_VCHAN1) || (flags & PCIIO_DMA_A64));
-#endif
-
- /* Generic macro flags
- */
- if (flags & PCIIO_DMA_DATA) { /* standard data channel */
- attributes &= ~PCI64_ATTR_BAR; /* no barrier bit */
- attributes |= PCI64_ATTR_PREF; /* prefetch on */
- }
- if (flags & PCIIO_DMA_CMD) { /* standard command channel */
- attributes |= PCI64_ATTR_BAR; /* barrier bit on */
- attributes &= ~PCI64_ATTR_PREF; /* disable prefetch */
- }
- /* Generic detail flags
- */
- if (flags & PCIIO_PREFETCH)
- attributes |= PCI64_ATTR_PREF;
- if (flags & PCIIO_NOPREFETCH)
- attributes &= ~PCI64_ATTR_PREF;
-
- /* the swap bit is in the address attributes for xbridge */
- if (flags & PCIIO_BYTE_STREAM)
- attributes |= PCI64_ATTR_SWAP;
- if (flags & PCIIO_WORD_VALUES)
- attributes &= ~PCI64_ATTR_SWAP;
-
- /* Provider-specific flags
- */
- if (flags & PCIBR_BARRIER)
- attributes |= PCI64_ATTR_BAR;
- if (flags & PCIBR_NOBARRIER)
- attributes &= ~PCI64_ATTR_BAR;
-
- if (flags & PCIBR_PREFETCH)
- attributes |= PCI64_ATTR_PREF;
- if (flags & PCIBR_NOPREFETCH)
- attributes &= ~PCI64_ATTR_PREF;
-
- if (flags & PCIBR_PRECISE)
- attributes |= PCI64_ATTR_PREC;
- if (flags & PCIBR_NOPRECISE)
- attributes &= ~PCI64_ATTR_PREC;
-
- if (flags & PCIBR_VCHAN1)
- attributes |= PCI64_ATTR_VIRTUAL;
- if (flags & PCIBR_VCHAN0)
- attributes &= ~PCI64_ATTR_VIRTUAL;
-
- /* PIC in PCI-X mode only supports barrier & swap */
- if (IS_PCIX(pcibr_soft)) {
- attributes &= (PCI64_ATTR_BAR | PCI64_ATTR_SWAP);
- }
-
- return attributes;
-}
-
-/*ARGSUSED */
-pcibr_dmamap_t
-pcibr_dmamap_alloc(vertex_hdl_t pconn_vhdl,
- device_desc_t dev_desc,
- size_t req_size_max,
- unsigned flags)
-{
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
- vertex_hdl_t xconn_vhdl = pcibr_soft->bs_conn;
- pciio_slot_t slot;
- xwidgetnum_t xio_port;
-
- xtalk_dmamap_t xtalk_dmamap;
- pcibr_dmamap_t pcibr_dmamap;
- int ate_count;
- int ate_index;
- int vchan = VCHAN0;
- unsigned long s;
-
- /* merge in forced flags */
- flags |= pcibr_soft->bs_dma_flags;
-
- /*
- * On SNIA64, these maps are pre-allocated because pcibr_dmamap_alloc()
- * can be called within an interrupt thread.
- */
- s = pcibr_lock(pcibr_soft);
- pcibr_dmamap = (pcibr_dmamap_t)get_free_pciio_dmamap(pcibr_soft->bs_vhdl);
- pcibr_unlock(pcibr_soft, s);
-
- if (!pcibr_dmamap)
- return 0;
-
- xtalk_dmamap = xtalk_dmamap_alloc(xconn_vhdl, dev_desc, req_size_max,
- flags & DMAMAP_FLAGS);
- if (!xtalk_dmamap) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pconn_vhdl,
- "pcibr_dmamap_alloc: xtalk_dmamap_alloc failed\n"));
- free_pciio_dmamap(pcibr_dmamap);
- return 0;
- }
- xio_port = pcibr_soft->bs_mxid;
- slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
-
- pcibr_dmamap->bd_dev = pconn_vhdl;
- pcibr_dmamap->bd_slot = PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot);
- pcibr_dmamap->bd_soft = pcibr_soft;
- pcibr_dmamap->bd_xtalk = xtalk_dmamap;
- pcibr_dmamap->bd_max_size = req_size_max;
- pcibr_dmamap->bd_xio_port = xio_port;
-
- if (flags & PCIIO_DMA_A64) {
- if (!pcibr_try_set_device(pcibr_soft, slot, flags, BRIDGE_DEV_D64_BITS)) {
- iopaddr_t pci_addr;
- int have_rrbs;
- int min_rrbs;
-
- /* Device is capable of A64 operations,
- * and the attributes of the DMA are
- * consistent with any previous DMA
- * mappings using shared resources.
- */
-
- pci_addr = pcibr_flags_to_d64(flags, pcibr_soft);
-
- pcibr_dmamap->bd_flags = flags;
- pcibr_dmamap->bd_xio_addr = 0;
- pcibr_dmamap->bd_pci_addr = pci_addr;
-
- /* If in PCI mode, make sure we have an RRB (or two).
- */
- if (IS_PCI(pcibr_soft) &&
- !(pcibr_soft->bs_rrb_fixed & (1 << slot))) {
- if (flags & PCIBR_VCHAN1)
- vchan = VCHAN1;
- have_rrbs = pcibr_soft->bs_rrb_valid[slot][vchan];
- if (have_rrbs < 2) {
- if (pci_addr & PCI64_ATTR_PREF)
- min_rrbs = 2;
- else
- min_rrbs = 1;
- if (have_rrbs < min_rrbs)
- pcibr_rrb_alloc_more(pcibr_soft, slot, vchan,
- min_rrbs - have_rrbs);
- }
- }
- PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmamap_alloc: using direct64, map=0x%lx\n",
- pcibr_dmamap));
- return pcibr_dmamap;
- }
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmamap_alloc: unable to use direct64\n"));
-
- /* PIC in PCI-X mode only supports 64-bit direct mapping so
- * don't fall thru and try 32-bit direct mapping or 32-bit
- * page mapping
- */
- if (IS_PCIX(pcibr_soft)) {
- kfree(pcibr_dmamap);
- return 0;
- }
-
- flags &= ~PCIIO_DMA_A64;
- }
- if (flags & PCIIO_FIXED) {
- /* warning: mappings may fail later,
- * if direct32 can't get to the address.
- */
- if (!pcibr_try_set_device(pcibr_soft, slot, flags, BRIDGE_DEV_D32_BITS)) {
- /* User desires DIRECT A32 operations,
- * and the attributes of the DMA are
- * consistent with any previous DMA
- * mappings using shared resources.
- * Mapping calls may fail if target
- * is outside the direct32 range.
- */
- PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmamap_alloc: using direct32, map=0x%lx\n",
- pcibr_dmamap));
- pcibr_dmamap->bd_flags = flags;
- pcibr_dmamap->bd_xio_addr = pcibr_soft->bs_dir_xbase;
- pcibr_dmamap->bd_pci_addr = PCI32_DIRECT_BASE;
- return pcibr_dmamap;
- }
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmamap_alloc: unable to use direct32\n"));
-
- /* If the user demands FIXED and we can't
- * give it to him, fail.
- */
- xtalk_dmamap_free(xtalk_dmamap);
- free_pciio_dmamap(pcibr_dmamap);
- return 0;
- }
- /*
- * Allocate Address Translation Entries from the mapping RAM.
- * Unless the PCIBR_NO_ATE_ROUNDUP flag is specified,
- * the maximum number of ATEs is based on the worst-case
- * scenario, where the requested target is in the
- * last byte of an ATE; thus, mapping IOPGSIZE+2
- * does end up requiring three ATEs.
- */
- if (!(flags & PCIBR_NO_ATE_ROUNDUP)) {
- ate_count = IOPG((IOPGSIZE - 1) /* worst case start offset */
- +req_size_max /* max mapping bytes */
- - 1) + 1; /* round UP */
- } else { /* assume requested target is page aligned */
- ate_count = IOPG(req_size_max /* max mapping bytes */
- - 1) + 1; /* round UP */
- }
-
- ate_index = pcibr_ate_alloc(pcibr_soft, ate_count, &pcibr_dmamap->resource);
-
- if (ate_index != -1) {
- if (!pcibr_try_set_device(pcibr_soft, slot, flags, BRIDGE_DEV_PMU_BITS)) {
- bridge_ate_t ate_proto;
- int have_rrbs;
- int min_rrbs;
-
- PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP, pconn_vhdl,
- "pcibr_dmamap_alloc: using PMU, ate_index=%d, "
- "pcibr_dmamap=0x%lx\n", ate_index, pcibr_dmamap));
-
- ate_proto = pcibr_flags_to_ate(pcibr_soft, flags);
-
- pcibr_dmamap->bd_flags = flags;
- pcibr_dmamap->bd_pci_addr =
- PCI32_MAPPED_BASE + IOPGSIZE * ate_index;
-
- if (flags & PCIIO_BYTE_STREAM)
- ATE_SWAP_ON(pcibr_dmamap->bd_pci_addr);
- /*
- * If swap was set in bss_device in pcibr_endian_set()
- * we need to change the address bit.
- */
- if (pcibr_soft->bs_slot[slot].bss_device &
- BRIDGE_DEV_SWAP_PMU)
- ATE_SWAP_ON(pcibr_dmamap->bd_pci_addr);
- if (flags & PCIIO_WORD_VALUES)
- ATE_SWAP_OFF(pcibr_dmamap->bd_pci_addr);
- pcibr_dmamap->bd_xio_addr = 0;
- pcibr_dmamap->bd_ate_ptr = pcibr_ate_addr(pcibr_soft, ate_index);
- pcibr_dmamap->bd_ate_index = ate_index;
- pcibr_dmamap->bd_ate_count = ate_count;
- pcibr_dmamap->bd_ate_proto = ate_proto;
-
- /* Make sure we have an RRB (or two).
- */
- if (!(pcibr_soft->bs_rrb_fixed & (1 << slot))) {
- have_rrbs = pcibr_soft->bs_rrb_valid[slot][vchan];
- if (have_rrbs < 2) {
- if (ate_proto & ATE_PREF)
- min_rrbs = 2;
- else
- min_rrbs = 1;
- if (have_rrbs < min_rrbs)
- pcibr_rrb_alloc_more(pcibr_soft, slot, vchan,
- min_rrbs - have_rrbs);
- }
- }
- return pcibr_dmamap;
- }
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pconn_vhdl,
- "pcibr_dmamap_alloc: PMU use failed, ate_index=%d\n",
- ate_index));
-
- pcibr_ate_free(pcibr_soft, ate_index, ate_count, &pcibr_dmamap->resource);
- }
- /* total failure: sorry, you just can't
- * get from here to there that way.
- */
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pconn_vhdl,
- "pcibr_dmamap_alloc: complete failure.\n"));
- xtalk_dmamap_free(xtalk_dmamap);
- free_pciio_dmamap(pcibr_dmamap);
- return 0;
-}
-
-/*ARGSUSED */
-void
-pcibr_dmamap_free(pcibr_dmamap_t pcibr_dmamap)
-{
- pcibr_soft_t pcibr_soft = pcibr_dmamap->bd_soft;
- pciio_slot_t slot = PCIBR_SLOT_TO_DEVICE(pcibr_soft,
- pcibr_dmamap->bd_slot);
-
- xtalk_dmamap_free(pcibr_dmamap->bd_xtalk);
-
- if (pcibr_dmamap->bd_flags & PCIIO_DMA_A64) {
- pcibr_release_device(pcibr_soft, slot, BRIDGE_DEV_D64_BITS);
- }
- if (pcibr_dmamap->bd_ate_count) {
- pcibr_ate_free(pcibr_dmamap->bd_soft,
- pcibr_dmamap->bd_ate_index,
- pcibr_dmamap->bd_ate_count,
- &pcibr_dmamap->resource);
- pcibr_release_device(pcibr_soft, slot, XBRIDGE_DEV_PMU_BITS);
- }
-
- PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev,
- "pcibr_dmamap_free: pcibr_dmamap=0x%lx\n", pcibr_dmamap));
-
- free_pciio_dmamap(pcibr_dmamap);
-}
-
-/*
- * pcibr_addr_xio_to_pci: given a PIO range, hand
- * back the corresponding base PCI MEM address;
- * this is used to short-circuit DMA requests that
- * loop back onto this PCI bus.
- */
-static iopaddr_t
-pcibr_addr_xio_to_pci(pcibr_soft_t soft,
- iopaddr_t xio_addr,
- size_t req_size)
-{
- iopaddr_t xio_lim = xio_addr + req_size - 1;
- iopaddr_t pci_addr;
- pciio_slot_t slot;
-
- if (IS_PIC_BUSNUM_SOFT(soft, 0)) {
- if ((xio_addr >= PICBRIDGE0_PCI_MEM32_BASE) &&
- (xio_lim <= PICBRIDGE0_PCI_MEM32_LIMIT)) {
- pci_addr = xio_addr - PICBRIDGE0_PCI_MEM32_BASE;
- return pci_addr;
- }
- if ((xio_addr >= PICBRIDGE0_PCI_MEM64_BASE) &&
- (xio_lim <= PICBRIDGE0_PCI_MEM64_LIMIT)) {
- pci_addr = xio_addr - PICBRIDGE0_PCI_MEM64_BASE;
- return pci_addr;
- }
- } else if (IS_PIC_BUSNUM_SOFT(soft, 1)) {
- if ((xio_addr >= PICBRIDGE1_PCI_MEM32_BASE) &&
- (xio_lim <= PICBRIDGE1_PCI_MEM32_LIMIT)) {
- pci_addr = xio_addr - PICBRIDGE1_PCI_MEM32_BASE;
- return pci_addr;
- }
- if ((xio_addr >= PICBRIDGE1_PCI_MEM64_BASE) &&
- (xio_lim <= PICBRIDGE1_PCI_MEM64_LIMIT)) {
- pci_addr = xio_addr - PICBRIDGE1_PCI_MEM64_BASE;
- return pci_addr;
- }
- } else {
- printk("pcibr_addr_xio_to_pci(): unknown bridge type");
- return (iopaddr_t)0;
- }
- for (slot = soft->bs_min_slot; slot < PCIBR_NUM_SLOTS(soft); ++slot)
- if ((xio_addr >= PCIBR_BRIDGE_DEVIO(soft, slot)) &&
- (xio_lim < PCIBR_BRIDGE_DEVIO(soft, slot + 1))) {
- uint64_t dev;
-
- dev = soft->bs_slot[slot].bss_device;
- pci_addr = dev & BRIDGE_DEV_OFF_MASK;
- pci_addr <<= BRIDGE_DEV_OFF_ADDR_SHFT;
- pci_addr += xio_addr - PCIBR_BRIDGE_DEVIO(soft, slot);
- return (dev & BRIDGE_DEV_DEV_IO_MEM) ? pci_addr : PCI_NOWHERE;
- }
- return 0;
-}
-
-/*ARGSUSED */
-iopaddr_t
-pcibr_dmamap_addr(pcibr_dmamap_t pcibr_dmamap,
- paddr_t paddr,
- size_t req_size)
-{
- pcibr_soft_t pcibr_soft;
- iopaddr_t xio_addr;
- xwidgetnum_t xio_port;
- iopaddr_t pci_addr;
- unsigned flags;
-
- ASSERT(pcibr_dmamap != NULL);
- ASSERT(req_size > 0);
- ASSERT(req_size <= pcibr_dmamap->bd_max_size);
-
- pcibr_soft = pcibr_dmamap->bd_soft;
-
- flags = pcibr_dmamap->bd_flags;
-
- xio_addr = xtalk_dmamap_addr(pcibr_dmamap->bd_xtalk, paddr, req_size);
- if (XIO_PACKED(xio_addr)) {
- xio_port = XIO_PORT(xio_addr);
- xio_addr = XIO_ADDR(xio_addr);
- } else
- xio_port = pcibr_dmamap->bd_xio_port;
-
- /* If this DMA is to an address that
- * refers back to this Bridge chip,
- * reduce it back to the correct
- * PCI MEM address.
- */
- if (xio_port == pcibr_soft->bs_xid) {
- pci_addr = pcibr_addr_xio_to_pci(pcibr_soft, xio_addr, req_size);
- } else if (flags & PCIIO_DMA_A64) {
- /* A64 DMA:
- * always use 64-bit direct mapping,
- * which always works.
- * Device(x) was set up during
- * dmamap allocation.
- */
-
- /* attributes are already bundled up into bd_pci_addr.
- */
- pci_addr = pcibr_dmamap->bd_pci_addr
- | ((uint64_t) xio_port << PCI64_ATTR_TARG_SHFT)
- | xio_addr;
-
- /* Bridge Hardware WAR #482836:
- * If the transfer is not cache aligned
- * and the Bridge Rev is <= B, force
- * prefetch to be off.
- */
- if (flags & PCIBR_NOPREFETCH)
- pci_addr &= ~PCI64_ATTR_PREF;
-
- PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR,
- pcibr_dmamap->bd_dev,
- "pcibr_dmamap_addr: (direct64): wanted paddr [0x%lx..0x%lx] "
- "XIO port 0x%x offset 0x%lx, returning PCI 0x%lx\n",
- paddr, paddr + req_size - 1, xio_port, xio_addr, pci_addr));
-
- } else if (flags & PCIIO_FIXED) {
- /* A32 direct DMA:
- * always use 32-bit direct mapping,
- * which may fail.
- * Device(x) was set up during
- * dmamap allocation.
- */
-
- if (xio_port != pcibr_soft->bs_dir_xport)
- pci_addr = 0; /* wrong DIDN */
- else if (xio_addr < pcibr_dmamap->bd_xio_addr)
- pci_addr = 0; /* out of range */
- else if ((xio_addr + req_size) >
- (pcibr_dmamap->bd_xio_addr + BRIDGE_DMA_DIRECT_SIZE))
- pci_addr = 0; /* out of range */
- else
- pci_addr = pcibr_dmamap->bd_pci_addr +
- xio_addr - pcibr_dmamap->bd_xio_addr;
-
- PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR,
- pcibr_dmamap->bd_dev,
- "pcibr_dmamap_addr (direct32): wanted paddr [0x%lx..0x%lx] "
- "XIO port 0x%x offset 0x%lx, returning PCI 0x%lx\n",
- paddr, paddr + req_size - 1, xio_port, xio_addr, pci_addr));
-
- } else {
- iopaddr_t offset = IOPGOFF(xio_addr);
- bridge_ate_t ate_proto = pcibr_dmamap->bd_ate_proto;
- int ate_count = IOPG(offset + req_size - 1) + 1;
- int ate_index = pcibr_dmamap->bd_ate_index;
- bridge_ate_t ate;
-
- ate = ate_proto | (xio_addr - offset);
- ate |= (xio_port << ATE_TIDSHIFT);
-
- pci_addr = pcibr_dmamap->bd_pci_addr + offset;
-
- /* Fill in our mapping registers
- * with the appropriate xtalk data,
- * and hand back the PCI address.
- */
-
- ASSERT(ate_count > 0);
- if (ate_count <= pcibr_dmamap->bd_ate_count) {
- ate_write(pcibr_soft, ate_index, ate_count, ate);
-
- PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev,
- "pcibr_dmamap_addr (PMU) : wanted paddr "
- "[0x%lx..0x%lx] returning PCI 0x%lx\n",
- paddr, paddr + req_size - 1, pci_addr));
-
- } else {
- /* The number of ATE's required is greater than the number
- * allocated for this map. One way this can happen is if
- * pcibr_dmamap_alloc() was called with the PCIBR_NO_ATE_ROUNDUP
- * flag, and then when that map is used (right now), the
- * target address tells us we really did need to roundup.
- * The other possibility is that the map is just plain too
- * small to handle the requested target area.
- */
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev,
- "pcibr_dmamap_addr (PMU) : wanted paddr "
- "[0x%lx..0x%lx] ate_count 0x%x bd_ate_count 0x%x "
- "ATE's required > number allocated\n",
- paddr, paddr + req_size - 1,
- ate_count, pcibr_dmamap->bd_ate_count));
- pci_addr = 0;
- }
-
- }
- return pci_addr;
-}
-
-/*ARGSUSED */
-void
-pcibr_dmamap_done(pcibr_dmamap_t pcibr_dmamap)
-{
- xtalk_dmamap_done(pcibr_dmamap->bd_xtalk);
-
- PCIBR_DEBUG((PCIBR_DEBUG_DMAMAP, pcibr_dmamap->bd_dev,
- "pcibr_dmamap_done: pcibr_dmamap=0x%lx\n", pcibr_dmamap));
-}
-
-
-/*
- * For each bridge, the DIR_OFF value in the Direct Mapping Register
- * determines the PCI to Crosstalk memory mapping to be used for all
- * 32-bit Direct Mapping memory accesses. This mapping can be to any
- * node in the system. This function will return that compact node id.
- */
-
-/*ARGSUSED */
-cnodeid_t
-pcibr_get_dmatrans_node(vertex_hdl_t pconn_vhdl)
-{
-
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
-
- return nasid_to_cnodeid(NASID_GET(pcibr_soft->bs_dir_xbase));
-}
-
-/*ARGSUSED */
-iopaddr_t
-pcibr_dmatrans_addr(vertex_hdl_t pconn_vhdl,
- device_desc_t dev_desc,
- paddr_t paddr,
- size_t req_size,
- unsigned flags)
-{
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
- vertex_hdl_t xconn_vhdl = pcibr_soft->bs_conn;
- pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
- pcibr_soft_slot_t slotp = &pcibr_soft->bs_slot[pciio_slot];
-
- xwidgetnum_t xio_port;
- iopaddr_t xio_addr;
- iopaddr_t pci_addr;
-
- int have_rrbs;
- int min_rrbs;
- int vchan = VCHAN0;
-
- /* merge in forced flags */
- flags |= pcibr_soft->bs_dma_flags;
-
- xio_addr = xtalk_dmatrans_addr(xconn_vhdl, 0, paddr, req_size,
- flags & DMAMAP_FLAGS);
- if (!xio_addr) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx], "
- "xtalk_dmatrans_addr failed with 0x%lx\n",
- paddr, paddr + req_size - 1, xio_addr));
- return 0;
- }
- /*
- * find which XIO port this goes to.
- */
- if (XIO_PACKED(xio_addr)) {
- if (xio_addr == XIO_NOWHERE) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx], "
- "xtalk_dmatrans_addr failed with XIO_NOWHERE\n",
- paddr, paddr + req_size - 1));
- return 0;
- }
- xio_port = XIO_PORT(xio_addr);
- xio_addr = XIO_ADDR(xio_addr);
-
- } else
- xio_port = pcibr_soft->bs_mxid;
-
- /*
- * If this DMA comes back to us,
- * return the PCI MEM address on
- * which it would land, or NULL
- * if the target is something
- * on bridge other than PCI MEM.
- */
- if (xio_port == pcibr_soft->bs_xid) {
- pci_addr = pcibr_addr_xio_to_pci(pcibr_soft, xio_addr, req_size);
- PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx], "
- "xio_port=0x%x, pci_addr=0x%lx\n",
- paddr, paddr + req_size - 1, xio_port, pci_addr));
- return pci_addr;
- }
- /* If the caller can use A64, try to
- * satisfy the request with the 64-bit
- * direct map. This can fail if the
- * configuration bits in Device(x)
- * conflict with our flags.
- */
-
- if (flags & PCIIO_DMA_A64) {
- pci_addr = slotp->bss_d64_base;
- if (!(flags & PCIBR_VCHAN1))
- flags |= PCIBR_VCHAN0;
- if ((pci_addr != PCIBR_D64_BASE_UNSET) &&
- (flags == slotp->bss_d64_flags)) {
-
- pci_addr |= xio_addr |
- ((uint64_t) xio_port << PCI64_ATTR_TARG_SHFT);
- PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx], "
- "xio_port=0x%x, direct64: pci_addr=0x%lx\n",
- paddr, paddr + req_size - 1, xio_addr, pci_addr));
- return pci_addr;
- }
- if (!pcibr_try_set_device(pcibr_soft, pciio_slot, flags, BRIDGE_DEV_D64_BITS)) {
- pci_addr = pcibr_flags_to_d64(flags, pcibr_soft);
- slotp->bss_d64_flags = flags;
- slotp->bss_d64_base = pci_addr;
- pci_addr |= xio_addr
- | ((uint64_t) xio_port << PCI64_ATTR_TARG_SHFT);
-
- /* If in PCI mode, make sure we have an RRB (or two).
- */
- if (IS_PCI(pcibr_soft) &&
- !(pcibr_soft->bs_rrb_fixed & (1 << pciio_slot))) {
- if (flags & PCIBR_VCHAN1)
- vchan = VCHAN1;
- have_rrbs = pcibr_soft->bs_rrb_valid[pciio_slot][vchan];
- if (have_rrbs < 2) {
- if (pci_addr & PCI64_ATTR_PREF)
- min_rrbs = 2;
- else
- min_rrbs = 1;
- if (have_rrbs < min_rrbs)
- pcibr_rrb_alloc_more(pcibr_soft, pciio_slot, vchan,
- min_rrbs - have_rrbs);
- }
- }
- PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx], "
- "xio_port=0x%x, direct64: pci_addr=0x%lx, "
- "new flags: 0x%x\n", paddr, paddr + req_size - 1,
- xio_addr, pci_addr, (uint64_t) flags));
- return pci_addr;
- }
-
- PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx], "
- "xio_port=0x%x, Unable to set direct64 Device(x) bits\n",
- paddr, paddr + req_size - 1, xio_addr));
-
- /* PIC only supports 64-bit direct mapping in PCI-X mode */
- if (IS_PCIX(pcibr_soft)) {
- return 0;
- }
-
- /* our flags conflict with Device(x). try direct32*/
- flags = flags & ~(PCIIO_DMA_A64 | PCIBR_VCHAN0);
- } else {
- /* BUS in PCI-X mode only supports 64-bit direct mapping */
- if (IS_PCIX(pcibr_soft)) {
- return 0;
- }
- }
- /* Try to satisfy the request with the 32-bit direct
- * map. This can fail if the configuration bits in
- * Device(x) conflict with our flags, or if the
- * target address is outside where DIR_OFF points.
- */
- {
- size_t map_size = 1ULL << 31;
- iopaddr_t xio_base = pcibr_soft->bs_dir_xbase;
- iopaddr_t offset = xio_addr - xio_base;
- iopaddr_t endoff = req_size + offset;
-
- if ((req_size > map_size) ||
- (xio_addr < xio_base) ||
- (xio_port != pcibr_soft->bs_dir_xport) ||
- (endoff > map_size)) {
-
- PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx], "
- "xio_port=0x%x, xio region outside direct32 target\n",
- paddr, paddr + req_size - 1, xio_addr));
- } else {
- pci_addr = slotp->bss_d32_base;
- if ((pci_addr != PCIBR_D32_BASE_UNSET) &&
- (flags == slotp->bss_d32_flags)) {
-
- pci_addr |= offset;
-
- PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx],"
- " xio_port=0x%x, direct32: pci_addr=0x%lx\n",
- paddr, paddr + req_size - 1, xio_addr, pci_addr));
-
- return pci_addr;
- }
- if (!pcibr_try_set_device(pcibr_soft, pciio_slot, flags, BRIDGE_DEV_D32_BITS)) {
-
- pci_addr = PCI32_DIRECT_BASE;
- slotp->bss_d32_flags = flags;
- slotp->bss_d32_base = pci_addr;
- pci_addr |= offset;
-
- /* Make sure we have an RRB (or two).
- */
- if (!(pcibr_soft->bs_rrb_fixed & (1 << pciio_slot))) {
- have_rrbs = pcibr_soft->bs_rrb_valid[pciio_slot][vchan];
- if (have_rrbs < 2) {
- if (slotp->bss_device & BRIDGE_DEV_PREF)
- min_rrbs = 2;
- else
- min_rrbs = 1;
- if (have_rrbs < min_rrbs)
- pcibr_rrb_alloc_more(pcibr_soft, pciio_slot,
- vchan, min_rrbs - have_rrbs);
- }
- }
- PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx],"
- " xio_port=0x%x, direct32: pci_addr=0x%lx, "
- "new flags: 0x%x\n", paddr, paddr + req_size - 1,
- xio_addr, pci_addr, (uint64_t) flags));
-
- return pci_addr;
- }
- /* our flags conflict with Device(x).
- */
- PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx], "
- "xio_port=0x%x, Unable to set direct32 Device(x) bits\n",
- paddr, paddr + req_size - 1, xio_port));
- }
- }
-
- PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl,
- "pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx], "
- "xio_port=0x%x, No acceptable PCI address found\n",
- paddr, paddr + req_size - 1, xio_port));
-
- return 0;
-}
-
-void
-pcibr_dmamap_drain(pcibr_dmamap_t map)
-{
- xtalk_dmamap_drain(map->bd_xtalk);
-}
-
-void
-pcibr_dmaaddr_drain(vertex_hdl_t pconn_vhdl,
- paddr_t paddr,
- size_t bytes)
-{
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
- vertex_hdl_t xconn_vhdl = pcibr_soft->bs_conn;
-
- xtalk_dmaaddr_drain(xconn_vhdl, paddr, bytes);
-}
-
-/*
- * Get the starting PCIbus address out of the given DMA map.
- * This function is supposed to be used by a close friend of PCI bridge
- * since it relies on the fact that the starting address of the map is fixed at
- * the allocation time in the current implementation of PCI bridge.
- */
-iopaddr_t
-pcibr_dmamap_pciaddr_get(pcibr_dmamap_t pcibr_dmamap)
-{
- return pcibr_dmamap->bd_pci_addr;
-}
-
-/* =====================================================================
- * CONFIGURATION MANAGEMENT
- */
-/*ARGSUSED */
-void
-pcibr_provider_startup(vertex_hdl_t pcibr)
-{
-}
-
-/*ARGSUSED */
-void
-pcibr_provider_shutdown(vertex_hdl_t pcibr)
-{
-}
-
-int
-pcibr_reset(vertex_hdl_t conn)
-{
- BUG();
- return -1;
-}
-
-pciio_endian_t
-pcibr_endian_set(vertex_hdl_t pconn_vhdl,
- pciio_endian_t device_end,
- pciio_endian_t desired_end)
-{
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
- pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
- uint64_t devreg;
- unsigned long s;
-
- /*
- * Bridge supports hardware swapping; so we can always
- * arrange for the caller's desired endianness.
- */
-
- s = pcibr_lock(pcibr_soft);
- devreg = pcibr_soft->bs_slot[pciio_slot].bss_device;
- if (device_end != desired_end)
- devreg |= BRIDGE_DEV_SWAP_BITS;
- else
- devreg &= ~BRIDGE_DEV_SWAP_BITS;
-
- /* NOTE- if we ever put SWAP bits
- * onto the disabled list, we will
- * have to change the logic here.
- */
- if (pcibr_soft->bs_slot[pciio_slot].bss_device != devreg) {
- pcireg_device_set(pcibr_soft, pciio_slot, devreg);
- pcibr_soft->bs_slot[pciio_slot].bss_device = devreg;
- pcireg_tflush_get(pcibr_soft);
- }
- pcibr_unlock(pcibr_soft, s);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEVREG, pconn_vhdl,
- "pcibr_endian_set: Device(%d): 0x%x\n",
- pciio_slot, devreg));
-
- return desired_end;
-}
-
-/*
- * Interfaces to allow special (e.g. SGI) drivers to set/clear
- * Bridge-specific device flags. Many flags are modified through
- * PCI-generic interfaces; we don't allow them to be directly
- * manipulated here. Only flags that at this point seem pretty
- * Bridge-specific can be set through these special interfaces.
- * We may add more flags as the need arises, or remove flags and
- * create PCI-generic interfaces as the need arises.
- *
- * Returns 0 on failure, 1 on success
- */
-int
-pcibr_device_flags_set(vertex_hdl_t pconn_vhdl,
- pcibr_device_flags_t flags)
-{
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
- pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
- uint64_t set = 0;
- uint64_t clr = 0;
-
- ASSERT((flags & PCIBR_DEVICE_FLAGS) == flags);
-
- if (flags & PCIBR_WRITE_GATHER)
- set |= BRIDGE_DEV_PMU_WRGA_EN;
- if (flags & PCIBR_NOWRITE_GATHER)
- clr |= BRIDGE_DEV_PMU_WRGA_EN;
-
- if (flags & PCIBR_PREFETCH)
- set |= BRIDGE_DEV_PREF;
- if (flags & PCIBR_NOPREFETCH)
- clr |= BRIDGE_DEV_PREF;
-
- if (flags & PCIBR_PRECISE)
- set |= BRIDGE_DEV_PRECISE;
- if (flags & PCIBR_NOPRECISE)
- clr |= BRIDGE_DEV_PRECISE;
-
- if (flags & PCIBR_BARRIER)
- set |= BRIDGE_DEV_BARRIER;
- if (flags & PCIBR_NOBARRIER)
- clr |= BRIDGE_DEV_BARRIER;
-
- if (flags & PCIBR_64BIT)
- set |= BRIDGE_DEV_DEV_SIZE;
- if (flags & PCIBR_NO64BIT)
- clr |= BRIDGE_DEV_DEV_SIZE;
-
- /* PIC BRINGUP WAR (PV# 878674): Don't allow 64bit PIO accesses */
- if ((flags & PCIBR_64BIT) && PCIBR_WAR_ENABLED(PV878674, pcibr_soft)) {
- set &= ~BRIDGE_DEV_DEV_SIZE;
- }
-
- if (set || clr) {
- uint64_t devreg;
- unsigned long s;
-
- s = pcibr_lock(pcibr_soft);
- devreg = pcibr_soft->bs_slot[pciio_slot].bss_device;
- devreg = (devreg & ~clr) | set;
- if (pcibr_soft->bs_slot[pciio_slot].bss_device != devreg) {
- pcireg_device_set(pcibr_soft, pciio_slot, devreg);
- pcibr_soft->bs_slot[pciio_slot].bss_device = devreg;
- pcireg_tflush_get(pcibr_soft);
- }
- pcibr_unlock(pcibr_soft, s);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEVREG, pconn_vhdl,
- "pcibr_device_flags_set: Device(%d): 0x%x\n",
- pciio_slot, devreg));
- }
- return 1;
-}
-
-/*
- * PIC has 16 RBARs per bus; meaning it can have a total of 16 outstanding
- * split transactions. If the functions on the bus have requested a total
- * of 16 or less, then we can give them what they requested (ie. 100%).
- * Otherwise we have make sure each function can get at least one buffer
- * and then divide the rest of the buffers up among the functions as ``A
- * PERCENTAGE OF WHAT THEY REQUESTED'' (i.e. 0% - 100% of a function's
- * pcix_type0_status.max_out_split). This percentage does not include the
- * one RBAR that all functions get by default.
- */
-int
-pcibr_pcix_rbars_calc(pcibr_soft_t pcibr_soft)
-{
- /* 'percent_allowed' is the percentage of requested RBARs that functions
- * are allowed, ***less the 1 RBAR that all functions get by default***
- */
- int percent_allowed;
-
- if (pcibr_soft->bs_pcix_num_funcs) {
- if (pcibr_soft->bs_pcix_num_funcs > NUM_RBAR) {
- printk(KERN_WARNING
- "%s: Must oversubscribe Read Buffer Attribute Registers"
- "(RBAR). Bus has %d RBARs but %d funcs need them.\n",
- pcibr_soft->bs_name, NUM_RBAR, pcibr_soft->bs_pcix_num_funcs);
- percent_allowed = 0;
- } else {
- percent_allowed = (((NUM_RBAR-pcibr_soft->bs_pcix_num_funcs)*100) /
- pcibr_soft->bs_pcix_split_tot);
-
- /* +1 to percentage to solve rounding errors that occur because
- * we're not doing fractional math. (ie. ((3 * 66%) / 100) = 1)
- * but should be "2" if doing true fractional math. NOTE: Since
- * the greatest number of outstanding transactions a function
- * can request is 32, this "+1" will always work (i.e. we won't
- * accidentally oversubscribe the RBARs because of this rounding
- * of the percentage).
- */
- percent_allowed=(percent_allowed > 100) ? 100 : percent_allowed+1;
- }
- } else {
- return -ENODEV;
- }
-
- return percent_allowed;
-}
-
-/*
- * pcibr_debug() is used to print pcibr debug messages to the console. A
- * user enables tracing by setting the following global variables:
- *
- * pcibr_debug_mask -Bitmask of what to trace. see pcibr_private.h
- * pcibr_debug_module -Module to trace. 'all' means trace all modules
- * pcibr_debug_widget -Widget to trace. '-1' means trace all widgets
- * pcibr_debug_slot -Slot to trace. '-1' means trace all slots
- *
- * 'type' is the type of debugging that the current PCIBR_DEBUG macro is
- * tracing. 'vhdl' (which can be NULL) is the vhdl associated with the
- * debug statement. If there is a 'vhdl' associated with this debug
- * statement, it is parsed to obtain the module, widget, and slot. If the
- * globals above match the PCIBR_DEBUG params, then the debug info in the
- * parameter 'format' is sent to the console.
- */
-void
-pcibr_debug(uint32_t type, vertex_hdl_t vhdl, char *format, ...)
-{
- char hwpath[MAXDEVNAME] = "\0";
- char copy_of_hwpath[MAXDEVNAME];
- char *buffer;
- char *module = "all";
- short widget = -1;
- short slot = -1;
- va_list ap;
-
- if (pcibr_debug_mask & type) {
- if (vhdl) {
- if (!hwgraph_vertex_name_get(vhdl, hwpath, MAXDEVNAME)) {
- char *cp;
-
- if (strcmp(module, pcibr_debug_module)) {
- /* use a copy */
- (void)strcpy(copy_of_hwpath, hwpath);
- cp = strstr(copy_of_hwpath, "/" EDGE_LBL_MODULE "/");
- if (cp) {
- cp += strlen("/" EDGE_LBL_MODULE "/");
- module = strsep(&cp, "/");
- }
- }
- if (pcibr_debug_widget != -1) {
- cp = strstr(hwpath, "/" EDGE_LBL_XTALK "/");
- if (cp) {
- cp += strlen("/" EDGE_LBL_XTALK "/");
- widget = simple_strtoul(cp, NULL, 0);
- }
- }
- if (pcibr_debug_slot != -1) {
- cp = strstr(hwpath, "/" EDGE_LBL_PCIX_0 "/");
- if (!cp) {
- cp = strstr(hwpath, "/" EDGE_LBL_PCIX_1 "/");
- }
- if (cp) {
- cp += strlen("/" EDGE_LBL_PCIX_0 "/");
- slot = simple_strtoul(cp, NULL, 0);
- }
- }
- }
- }
- if ((vhdl == NULL) ||
- (!strcmp(module, pcibr_debug_module) &&
- (widget == pcibr_debug_widget) &&
- (slot == pcibr_debug_slot))) {
-
- buffer = kmalloc(1024, GFP_KERNEL);
- if (buffer) {
- printk("PCIBR_DEBUG<%d>\t: %s :", smp_processor_id(), hwpath);
- /*
- * KERN_MSG translates to this 3 line sequence. Since
- * we have a variable length argument list, we need to
- * call KERN_MSG this way rather than directly
- */
- va_start(ap, format);
- memset(buffer, 0, 1024);
- vsnprintf(buffer, 1024, format, ap);
- va_end(ap);
- printk("%s", buffer);
- kfree(buffer);
- }
- }
- }
-}
-
-/*
- * given a xconn_vhdl and a bus number under that widget, return a
- * bridge_t pointer.
- */
-void *
-pcibr_bridge_ptr_get(vertex_hdl_t widget_vhdl, int bus_num)
-{
- void *bridge;
-
- bridge = (void *)xtalk_piotrans_addr(widget_vhdl, 0, 0,
- sizeof(bridge), 0);
-
- /* PIC ASIC has two bridges (ie. two buses) under a single widget */
- if (bus_num == 1) {
- bridge = (void *)((char *)bridge + PIC_BUS1_OFFSET);
- }
- return bridge;
-}
-
-
-int
-isIO9(nasid_t nasid)
-{
- lboard_t *brd = (lboard_t *)KL_CONFIG_INFO(nasid);
-
- while (brd) {
- if (brd->brd_flags & LOCAL_MASTER_IO6) {
- return 1;
- }
- if (numionodes == numnodes)
- brd = KLCF_NEXT_ANY(brd);
- else
- brd = KLCF_NEXT(brd);
- }
- /* if it's dual ported, check the peer also */
- nasid = NODEPDA(nasid_to_cnodeid(nasid))->xbow_peer;
- if (nasid < 0) return 0;
- brd = (lboard_t *)KL_CONFIG_INFO(nasid);
- while (brd) {
- if (brd->brd_flags & LOCAL_MASTER_IO6) {
- return 1;
- }
- if (numionodes == numnodes)
- brd = KLCF_NEXT_ANY(brd);
- else
- brd = KLCF_NEXT(brd);
-
- }
- return 0;
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/pci/pci_defs.h>
-
-
-extern int hubii_check_widget_disabled(nasid_t, int);
-
-
-/* =====================================================================
- * ERROR HANDLING
- */
-
-#ifdef DEBUG
-#ifdef ERROR_DEBUG
-#define BRIDGE_PIOERR_TIMEOUT 100 /* Timeout with ERROR_DEBUG defined */
-#else
-#define BRIDGE_PIOERR_TIMEOUT 40 /* Timeout in debug mode */
-#endif
-#else
-#define BRIDGE_PIOERR_TIMEOUT 1 /* Timeout in non-debug mode */
-#endif
-
-#ifdef DEBUG
-#ifdef ERROR_DEBUG
-uint64_t bridge_errors_to_dump = ~BRIDGE_ISR_INT_MSK;
-#else
-uint64_t bridge_errors_to_dump = BRIDGE_ISR_ERROR_DUMP;
-#endif
-#else
-uint64_t bridge_errors_to_dump = BRIDGE_ISR_ERROR_FATAL |
- BRIDGE_ISR_PCIBUS_PIOERR;
-#endif
-
-int pcibr_pioerr_dump = 1; /* always dump pio errors */
-
-/*
- * register values
- * map between numeric values and symbolic values
- */
-struct reg_values {
- unsigned long long rv_value;
- char *rv_name;
-};
-
-/*
- * register descriptors are used for formatted prints of register values
- * rd_mask and rd_shift must be defined, other entries may be null
- */
-struct reg_desc {
- unsigned long long rd_mask; /* mask to extract field */
- int rd_shift; /* shift for extracted value, - >>, + << */
- char *rd_name; /* field name */
- char *rd_format; /* format to print field */
- struct reg_values *rd_values; /* symbolic names of values */
-};
-
-/* Crosstalk Packet Types */
-static struct reg_values xtalk_cmd_pactyp[] =
-{
- {0x0, "RdReq"},
- {0x1, "RdResp"},
- {0x2, "WrReqWithResp"},
- {0x3, "WrResp"},
- {0x4, "WrReqNoResp"},
- {0x5, "Reserved(5)"},
- {0x6, "FetchAndOp"},
- {0x7, "Reserved(7)"},
- {0x8, "StoreAndOp"},
- {0x9, "Reserved(9)"},
- {0xa, "Reserved(a)"},
- {0xb, "Reserved(b)"},
- {0xc, "Reserved(c)"},
- {0xd, "Reserved(d)"},
- {0xe, "SpecialReq"},
- {0xf, "SpecialResp"},
- {0}
-};
-
-static struct reg_desc xtalk_cmd_bits[] =
-{
- {WIDGET_DIDN, -28, "DIDN", "%x"},
- {WIDGET_SIDN, -24, "SIDN", "%x"},
- {WIDGET_PACTYP, -20, "PACTYP", 0, xtalk_cmd_pactyp},
- {WIDGET_TNUM, -15, "TNUM", "%x"},
- {WIDGET_COHERENT, 0, "COHERENT"},
- {WIDGET_DS, 0, "DS"},
- {WIDGET_GBR, 0, "GBR"},
- {WIDGET_VBPM, 0, "VBPM"},
- {WIDGET_ERROR, 0, "ERROR"},
- {WIDGET_BARRIER, 0, "BARRIER"},
- {0}
-};
-
-#define F(s,n) { 1l<<(s),-(s), n }
-
-char *pci_space[] = {"NONE",
- "ROM",
- "IO",
- "",
- "MEM",
- "MEM32",
- "MEM64",
- "CFG",
- "WIN0",
- "WIN1",
- "WIN2",
- "WIN3",
- "WIN4",
- "WIN5",
- "",
- "BAD"};
-
-static char *pcibr_isr_errs[] =
-{
- "", "", "", "", "", "", "", "",
- "08: Reserved Bit 08",
- "09: PCI to Crosstalk read request timeout",
- "10: PCI retry operation count exhausted.",
- "11: PCI bus device select timeout",
- "12: PCI device reported parity error",
- "13: PCI Address/Cmd parity error ",
- "14: PCI Bridge detected parity error",
- "15: PCI abort condition",
- "16: Reserved Bit 16",
- "17: LLP Transmitter Retry count wrapped", /* PIC ONLY */
- "18: LLP Transmitter side required Retry", /* PIC ONLY */
- "19: LLP Receiver retry count wrapped", /* PIC ONLY */
- "20: LLP Receiver check bit error", /* PIC ONLY */
- "21: LLP Receiver sequence number error", /* PIC ONLY */
- "22: Request packet overflow",
- "23: Request operation not supported by bridge",
- "24: Request packet has invalid address for bridge widget",
- "25: Incoming request xtalk command word error bit set or invalid sideband",
- "26: Incoming response xtalk command word error bit set or invalid sideband",
- "27: Framing error, request cmd data size does not match actual",
- "28: Framing error, response cmd data size does not match actual",
- "29: Unexpected response arrived",
- "30: PMU Access Fault",
- "31: Reserved Bit 31",
- "32: PCI-X address or attribute cycle parity error",
- "33: PCI-X data cycle parity error",
- "34: PCI-X master timeout (ie. master abort)",
- "35: PCI-X pio retry counter exhausted",
- "36: PCI-X SERR",
- "37: PCI-X PERR",
- "38: PCI-X target abort",
- "39: PCI-X read request timeout",
- "40: PCI / PCI-X device requestin arbitration error",
- "41: internal RAM parity error",
- "42: PCI-X unexpected completion cycle to master",
- "43: PCI-X split completion timeout",
- "44: PCI-X split completion error message",
- "45: PCI-X split completion message parity error",
-};
-
-/*
- * print_register() allows formatted printing of bit fields. individual
- * bit fields are described by a struct reg_desc, multiple bit fields within
- * a single word can be described by multiple reg_desc structures.
- * %r outputs a string of the format "<bit field descriptions>"
- * %R outputs a string of the format "0x%x<bit field descriptions>"
- *
- * The fields in a reg_desc are:
- * unsigned long long rd_mask; An appropriate mask to isolate the bit field
- * within a word, and'ed with val
- *
- * int rd_shift; A shift amount to be done to the isolated
- * bit field. done before printing the isolate
- * bit field with rd_format and before searching
- * for symbolic value names in rd_values
- *
- * char *rd_name; If non-null, a bit field name to label any
- * out from rd_format or searching rd_values.
- * if neither rd_format or rd_values is non-null
- * rd_name is printed only if the isolated
- * bit field is non-null.
- *
- * char *rd_format; If non-null, the shifted bit field value
- * is printed using this format.
- *
- * struct reg_values *rd_values; If non-null, a pointer to a table
- * matching numeric values with symbolic names.
- * rd_values are searched and the symbolic
- * value is printed if a match is found, if no
- * match is found "???" is printed.
- *
- */
-
-static void
-print_register(unsigned long long reg, struct reg_desc *addr)
-{
- register struct reg_desc *rd;
- register struct reg_values *rv;
- unsigned long long field;
- int any;
-
- printk("<");
- any = 0;
- for (rd = addr; rd->rd_mask; rd++) {
- field = reg & rd->rd_mask;
- field = (rd->rd_shift > 0) ? field << rd->rd_shift : field >> -rd->rd_shift;
- if (any && (rd->rd_format || rd->rd_values || (rd->rd_name && field)))
- printk(",");
- if (rd->rd_name) {
- if (rd->rd_format || rd->rd_values || field) {
- printk("%s", rd->rd_name);
- any = 1;
- }
- if (rd->rd_format || rd->rd_values) {
- printk("=");
- any = 1;
- }
- }
- /* You can have any format so long as it is %x */
- if (rd->rd_format) {
- printk("%llx", field);
- any = 1;
- if (rd->rd_values)
- printk(":");
- }
- if (rd->rd_values) {
- any = 1;
- for (rv = rd->rd_values; rv->rv_name; rv++) {
- if (field == rv->rv_value) {
- printk("%s", rv->rv_name);
- break;
- }
- }
- if (rv->rv_name == NULL)
- printk("???");
- }
- }
- printk(">\n");
-}
-
-
-/*
- * display memory directory state
- */
-static void
-pcibr_show_dir_state(paddr_t paddr, char *prefix)
-{
-#ifdef PCIBR_LATER
- int state;
- uint64_t vec_ptr;
- hubreg_t elo;
- extern char *dir_state_str[];
- extern void get_dir_ent(paddr_t, int *, uint64_t *, hubreg_t *);
-
- get_dir_ent(paddr, &state, &vec_ptr, &elo);
-
- printf("%saddr 0x%lx: state 0x%x owner 0x%lx (%s)\n",
- prefix, (uint64_t)paddr, state, (uint64_t)vec_ptr,
- dir_state_str[state]);
-#endif /* PCIBR_LATER */
-}
-
-
-void
-print_bridge_errcmd(pcibr_soft_t pcibr_soft, uint32_t cmdword, char *errtype)
-{
- printk(
- "\t Bridge %sError Command Word Register ", errtype);
- print_register(cmdword, xtalk_cmd_bits);
-}
-
-
-/*
- * Dump relevant error information for Bridge error interrupts.
- */
-/*ARGSUSED */
-void
-pcibr_error_dump(pcibr_soft_t pcibr_soft)
-{
- uint64_t int_status;
- uint64_t mult_int;
- uint64_t bit;
- int i;
-
- int_status = (pcireg_intr_status_get(pcibr_soft) & ~BRIDGE_ISR_INT_MSK);
-
- if (!int_status) {
- /* No error bits set */
- return;
- }
-
- /* Check if dumping the same error information multiple times */
- if ( pcibr_soft->bs_errinfo.bserr_intstat == int_status )
- return;
- pcibr_soft->bs_errinfo.bserr_intstat = int_status;
-
- printk(KERN_ALERT "PCI BRIDGE ERROR: int_status is 0x%lx for %s\n"
- " Dumping relevant %s registers for each bit set...\n",
- int_status, pcibr_soft->bs_name,
- "PIC");
-
- for (i = PCIBR_ISR_ERR_START; i < 64; i++) {
- bit = 1ull << i;
-
- /* A number of int_status bits are only valid for PIC's bus0 */
- if ((pcibr_soft->bs_busnum != 0) &&
- ((bit == BRIDGE_ISR_UNSUPPORTED_XOP) ||
- (bit == BRIDGE_ISR_LLP_REC_SNERR) ||
- (bit == BRIDGE_ISR_LLP_REC_CBERR) ||
- (bit == BRIDGE_ISR_LLP_RCTY) ||
- (bit == BRIDGE_ISR_LLP_TX_RETRY) ||
- (bit == BRIDGE_ISR_LLP_TCTY))) {
- continue;
- }
-
- if (int_status & bit) {
- printk("\t%s\n", pcibr_isr_errs[i]);
-
- switch (bit) {
-
- case PIC_ISR_INT_RAM_PERR: /* bit41 INT_RAM_PERR */
- /* XXX: should breakdown meaning of bits in reg */
- printk("\t Internal RAM Parity Error: 0x%lx\n",
- pcireg_parity_err_get(pcibr_soft));
- break;
-
- case PIC_ISR_PCIX_ARB_ERR: /* bit40 PCI_X_ARB_ERR */
- /* XXX: should breakdown meaning of bits in reg */
- printk("\t Arbitration Reg: 0x%lx\n",
- pcireg_arbitration_get(pcibr_soft));
- break;
-
- case PIC_ISR_PCIX_REQ_TOUT: /* bit39 PCI_X_REQ_TOUT */
- /* XXX: should breakdown meaning of attribute bit */
- printk(
- "\t PCI-X DMA Request Error Address Reg: 0x%lx\n"
- "\t PCI-X DMA Request Error Attribute Reg: 0x%lx\n",
- pcireg_pcix_req_err_addr_get(pcibr_soft),
- pcireg_pcix_req_err_attr_get(pcibr_soft));
- break;
-
- case PIC_ISR_PCIX_SPLIT_MSG_PE: /* bit45 PCI_X_SPLIT_MES_PE */
- case PIC_ISR_PCIX_SPLIT_EMSG: /* bit44 PCI_X_SPLIT_EMESS */
- case PIC_ISR_PCIX_SPLIT_TO: /* bit43 PCI_X_SPLIT_TO */
- /* XXX: should breakdown meaning of attribute bit */
- printk(
- "\t PCI-X Split Request Address Reg: 0x%lx\n"
- "\t PCI-X Split Request Attribute Reg: 0x%lx\n",
- pcireg_pcix_pio_split_addr_get(pcibr_soft),
- pcireg_pcix_pio_split_attr_get(pcibr_soft));
- /* FALL THRU */
-
- case PIC_ISR_PCIX_UNEX_COMP: /* bit42 PCI_X_UNEX_COMP */
- case PIC_ISR_PCIX_TABORT: /* bit38 PCI_X_TABORT */
- case PIC_ISR_PCIX_PERR: /* bit37 PCI_X_PERR */
- case PIC_ISR_PCIX_SERR: /* bit36 PCI_X_SERR */
- case PIC_ISR_PCIX_MRETRY: /* bit35 PCI_X_MRETRY */
- case PIC_ISR_PCIX_MTOUT: /* bit34 PCI_X_MTOUT */
- case PIC_ISR_PCIX_DA_PARITY: /* bit33 PCI_X_DA_PARITY */
- case PIC_ISR_PCIX_AD_PARITY: /* bit32 PCI_X_AD_PARITY */
- /* XXX: should breakdown meaning of attribute bit */
- printk(
- "\t PCI-X Bus Error Address Reg: 0x%lx\n"
- "\t PCI-X Bus Error Attribute Reg: 0x%lx\n"
- "\t PCI-X Bus Error Data Reg: 0x%lx\n",
- pcireg_pcix_bus_err_addr_get(pcibr_soft),
- pcireg_pcix_bus_err_attr_get(pcibr_soft),
- pcireg_pcix_bus_err_data_get(pcibr_soft));
- break;
-
- case BRIDGE_ISR_PAGE_FAULT: /* bit30 PMU_PAGE_FAULT */
- printk("\t Map Fault Address Reg: 0x%lx\n",
- pcireg_map_fault_get(pcibr_soft));
- break;
-
- case BRIDGE_ISR_UNEXP_RESP: /* bit29 UNEXPECTED_RESP */
- print_bridge_errcmd(pcibr_soft,
- pcireg_linkside_err_get(pcibr_soft), "Aux ");
-
- /* PIC in PCI-X mode, dump the PCIX DMA Request registers */
- if (IS_PCIX(pcibr_soft)) {
- /* XXX: should breakdown meaning of attr bit */
- printk(
- "\t PCI-X DMA Request Error Addr Reg: 0x%lx\n"
- "\t PCI-X DMA Request Error Attr Reg: 0x%lx\n",
- pcireg_pcix_req_err_addr_get(pcibr_soft),
- pcireg_pcix_req_err_attr_get(pcibr_soft));
- }
- break;
-
- case BRIDGE_ISR_BAD_XRESP_PKT: /* bit28 BAD_RESP_PACKET */
- case BRIDGE_ISR_RESP_XTLK_ERR: /* bit26 RESP_XTALK_ERROR */
- print_bridge_errcmd(pcibr_soft,
- pcireg_linkside_err_get(pcibr_soft), "Aux ");
-
- /* PCI-X mode, DMA Request Error registers are valid. But
- * in PCI mode, Response Buffer Address register are valid.
- */
- if (IS_PCIX(pcibr_soft)) {
- /* XXX: should breakdown meaning of attribute bit */
- printk(
- "\t PCI-X DMA Request Error Addr Reg: 0x%lx\n"
- "\t PCI-X DMA Request Error Attribute Reg: 0x%lx\n",
- pcireg_pcix_req_err_addr_get(pcibr_soft),
- pcireg_pcix_req_err_attr_get(pcibr_soft));
- } else {
- printk(
- "\t Bridge Response Buf Error Addr Reg: 0x%lx\n"
- "\t dev-num %d buff-num %d addr 0x%lx\n",
- pcireg_resp_err_get(pcibr_soft),
- (int)pcireg_resp_err_dev_get(pcibr_soft),
- (int)pcireg_resp_err_buf_get(pcibr_soft),
- pcireg_resp_err_addr_get(pcibr_soft));
- if (bit == BRIDGE_ISR_RESP_XTLK_ERR) {
- /* display memory directory associated with cacheline */
- pcibr_show_dir_state(
- pcireg_resp_err_get(pcibr_soft), "\t ");
- }
- }
- break;
-
- case BRIDGE_ISR_BAD_XREQ_PKT: /* bit27 BAD_XREQ_PACKET */
- case BRIDGE_ISR_REQ_XTLK_ERR: /* bit25 REQ_XTALK_ERROR */
- case BRIDGE_ISR_INVLD_ADDR: /* bit24 INVALID_ADDRESS */
- print_bridge_errcmd(pcibr_soft,
- pcireg_cmdword_err_get(pcibr_soft), "");
- printk(
- "\t Bridge Error Address Register: 0x%lx\n"
- "\t Bridge Error Address: 0x%lx\n",
- pcireg_bus_err_get(pcibr_soft),
- pcireg_bus_err_get(pcibr_soft));
- break;
-
- case BRIDGE_ISR_UNSUPPORTED_XOP: /* bit23 UNSUPPORTED_XOP */
- print_bridge_errcmd(pcibr_soft,
- pcireg_linkside_err_get(pcibr_soft), "Aux ");
- printk("\t Address Holding Link Side Error Reg: 0x%lx\n",
- pcireg_linkside_err_addr_get(pcibr_soft));
- break;
-
- case BRIDGE_ISR_XREQ_FIFO_OFLOW: /* bit22 XREQ_FIFO_OFLOW */
- print_bridge_errcmd(pcibr_soft,
- pcireg_linkside_err_get(pcibr_soft), "Aux ");
- printk("\t Address Holding Link Side Error Reg: 0x%lx\n",
- pcireg_linkside_err_addr_get(pcibr_soft));
- break;
-
- case BRIDGE_ISR_PCI_ABORT: /* bit15 PCI_ABORT */
- case BRIDGE_ISR_PCI_PARITY: /* bit14 PCI_PARITY */
- case BRIDGE_ISR_PCI_SERR: /* bit13 PCI_SERR */
- case BRIDGE_ISR_PCI_PERR: /* bit12 PCI_PERR */
- case BRIDGE_ISR_PCI_MST_TIMEOUT: /* bit11 PCI_MASTER_TOUT */
- case BRIDGE_ISR_PCI_RETRY_CNT: /* bit10 PCI_RETRY_CNT */
- printk("\t PCI Error Address Register: 0x%lx\n"
- "\t PCI Error Address: 0x%lx\n",
- pcireg_pci_bus_addr_get(pcibr_soft),
- pcireg_pci_bus_addr_addr_get(pcibr_soft));
- break;
-
- case BRIDGE_ISR_XREAD_REQ_TIMEOUT: /* bit09 XREAD_REQ_TOUT */
- printk("\t Bridge Response Buf Error Addr Reg: 0x%lx\n"
- "\t dev-num %d buff-num %d addr 0x%lx\n",
- pcireg_resp_err_get(pcibr_soft),
- (int)pcireg_resp_err_dev_get(pcibr_soft),
- (int)pcireg_resp_err_buf_get(pcibr_soft),
- pcireg_resp_err_get(pcibr_soft));
- break;
- }
- }
- }
-
- mult_int = pcireg_intr_multiple_get(pcibr_soft);
-
- if (mult_int & ~BRIDGE_ISR_INT_MSK) {
- printk(" %s Multiple Interrupt Register is 0x%lx\n",
- pcibr_soft->bs_asic_name, mult_int);
- for (i = PCIBR_ISR_ERR_START; i < 64; i++) {
- if (mult_int & (1ull << i))
- printk( "\t%s\n", pcibr_isr_errs[i]);
- }
- }
-}
-
-/* pcibr_pioerr_check():
- * Check to see if this pcibr has a PCI PIO
- * TIMEOUT error; if so, bump the timeout-count
- * on any piomaps that could cover the address.
- */
-static void
-pcibr_pioerr_check(pcibr_soft_t soft)
-{
- uint64_t int_status;
- iopaddr_t pci_addr;
- pciio_slot_t slot;
- pcibr_piomap_t map;
- iopaddr_t base;
- size_t size;
- unsigned win;
- int func;
-
- int_status = pcireg_intr_status_get(soft);
-
- if (int_status & BRIDGE_ISR_PCIBUS_PIOERR) {
- pci_addr = pcireg_pci_bus_addr_get(soft);
-
- slot = PCIBR_NUM_SLOTS(soft);
- while (slot-- > 0) {
- int nfunc = soft->bs_slot[slot].bss_ninfo;
- pcibr_info_h pcibr_infoh = soft->bs_slot[slot].bss_infos;
-
- for (func = 0; func < nfunc; func++) {
- pcibr_info_t pcibr_info = pcibr_infoh[func];
-
- if (!pcibr_info)
- continue;
-
- for (map = pcibr_info->f_piomap;
- map != NULL; map = map->bp_next) {
- base = map->bp_pciaddr;
- size = map->bp_mapsz;
- win = map->bp_space - PCIIO_SPACE_WIN(0);
- if (win < 6)
- base += soft->bs_slot[slot].bss_window[win].bssw_base;
- else if (map->bp_space == PCIIO_SPACE_ROM)
- base += pcibr_info->f_rbase;
- if ((pci_addr >= base) && (pci_addr < (base + size)))
- atomic_inc(&map->bp_toc);
- }
- }
- }
- }
-}
-
-/*
- * PCI Bridge Error interrupt handler.
- * This gets invoked, whenever a PCI bridge sends an error interrupt.
- * Primarily this servers two purposes.
- * - If an error can be handled (typically a PIO read/write
- * error, we try to do it silently.
- * - If an error cannot be handled, we die violently.
- * Interrupt due to PIO errors:
- * - Bridge sends an interrupt, whenever a PCI operation
- * done by the bridge as the master fails. Operations could
- * be either a PIO read or a PIO write.
- * PIO Read operation also triggers a bus error, and it's
- * We primarily ignore this interrupt in that context..
- * For PIO write errors, this is the only indication.
- * and we have to handle with the info from here.
- *
- * So, there is no way to distinguish if an interrupt is
- * due to read or write error!.
- */
-
-irqreturn_t
-pcibr_error_intr_handler(int irq, void *arg, struct pt_regs *ep)
-{
- pcibr_soft_t pcibr_soft;
- void *bridge;
- uint64_t int_status;
- uint64_t err_status;
- int i;
- uint64_t disable_errintr_mask = 0;
- nasid_t nasid;
-
-
-#if PCIBR_SOFT_LIST
- /*
- * Defensive code for linked pcibr_soft structs
- */
- {
- extern pcibr_list_p pcibr_list;
- pcibr_list_p entry;
-
- entry = pcibr_list;
- while (1) {
- if (entry == NULL) {
- printk("pcibr_error_intr_handler: (0x%lx) is not a pcibr_soft!",
- (uint64_t)arg);
- return IRQ_NONE;
- }
- if ((intr_arg_t) entry->bl_soft == arg)
- break;
- entry = entry->bl_next;
- }
- }
-#endif /* PCIBR_SOFT_LIST */
- pcibr_soft = (pcibr_soft_t) arg;
- bridge = pcibr_soft->bs_base;
-
- /*
- * pcibr_error_intr_handler gets invoked whenever bridge encounters
- * an error situation, and the interrupt for that error is enabled.
- * This routine decides if the error is fatal or not, and takes
- * action accordingly.
- *
- * In the case of PIO read/write timeouts, there is no way
- * to know if it was a read or write request that timed out.
- * If the error was due to a "read", a bus error will also occur
- * and the bus error handling code takes care of it.
- * If the error is due to a "write", the error is currently logged
- * by this routine. For SN1 and SN0, if fire-and-forget mode is
- * disabled, a write error response xtalk packet will be sent to
- * the II, which will cause an II error interrupt. No write error
- * recovery actions of any kind currently take place at the pcibr
- * layer! (e.g., no panic on unrecovered write error)
- *
- * Prior to reading the Bridge int_status register we need to ensure
- * that there are no error bits set in the lower layers (hubii)
- * that have disabled PIO access to the widget. If so, there is nothing
- * we can do until the bits clear, so we setup a timeout and try again
- * later.
- */
-
- nasid = NASID_GET(bridge);
- if (hubii_check_widget_disabled(nasid, pcibr_soft->bs_xid)) {
- DECLARE_WAIT_QUEUE_HEAD(wq);
- sleep_on_timeout(&wq, BRIDGE_PIOERR_TIMEOUT*HZ ); /* sleep */
- pcibr_soft->bs_errinfo.bserr_toutcnt++;
- /* Let's go recursive */
- return(pcibr_error_intr_handler(irq, arg, ep));
- }
-
- int_status = pcireg_intr_status_get(pcibr_soft);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ERROR, pcibr_soft->bs_conn,
- "pcibr_error_intr_handler: int_status=0x%lx\n", int_status));
-
- /* int_status is which bits we have to clear;
- * err_status is the bits we haven't handled yet.
- */
- err_status = int_status;
-
- if (!(int_status & ~BRIDGE_ISR_INT_MSK)) {
- /*
- * No error bit set!!.
- */
- return IRQ_HANDLED;
- }
- /*
- * If we have a PCIBUS_PIOERR, hand it to the logger.
- */
- if (int_status & BRIDGE_ISR_PCIBUS_PIOERR) {
- pcibr_pioerr_check(pcibr_soft);
- }
-
- if (err_status) {
- struct bs_errintr_stat_s *bs_estat ;
- bs_estat = &pcibr_soft->bs_errintr_stat[PCIBR_ISR_ERR_START];
-
- for (i = PCIBR_ISR_ERR_START; i < 64; i++, bs_estat++) {
- if (err_status & (1ull << i)) {
- uint32_t errrate = 0;
- uint32_t errcount = 0;
- uint32_t errinterval = 0, current_tick = 0;
- int llp_tx_retry_errors = 0;
- int is_llp_tx_retry_intr = 0;
-
- bs_estat->bs_errcount_total++;
-
- current_tick = jiffies;
- errinterval = (current_tick - bs_estat->bs_lasterr_timestamp);
- errcount = (bs_estat->bs_errcount_total -
- bs_estat->bs_lasterr_snapshot);
-
- /* LLP interrrupt errors are only valid on BUS0 of the PIC */
- if (pcibr_soft->bs_busnum == 0)
- is_llp_tx_retry_intr = (BRIDGE_ISR_LLP_TX_RETRY==(1ull << i));
-
- /* Check for the divide by zero condition while
- * calculating the error rates.
- */
-
- if (errinterval) {
- errrate = errcount / errinterval;
- /* If able to calculate error rate
- * on a LLP transmitter retry interrupt, check
- * if the error rate is nonzero and we have seen
- * a certain minimum number of errors.
- *
- * NOTE : errcount is being compared to
- * PCIBR_ERRTIME_THRESHOLD to make sure that we are not
- * seeing cases like x error interrupts per y ticks for
- * very low x ,y (x > y ) which could result in a
- * rate > 100/tick.
- */
- if (is_llp_tx_retry_intr &&
- errrate &&
- (errcount >= PCIBR_ERRTIME_THRESHOLD)) {
- llp_tx_retry_errors = 1;
- }
- } else {
- errrate = 0;
- /* Since we are not able to calculate the
- * error rate check if we exceeded a certain
- * minimum number of errors for LLP transmitter
- * retries. Note that this can only happen
- * within the first tick after the last snapshot.
- */
- if (is_llp_tx_retry_intr &&
- (errcount >= PCIBR_ERRINTR_DISABLE_LEVEL)) {
- llp_tx_retry_errors = 1;
- }
- }
-
- /*
- * If a non-zero error rate (which is equivalent to
- * to 100 errors/tick at least) for the LLP transmitter
- * retry interrupt was seen, check if we should print
- * a warning message.
- */
-
- if (llp_tx_retry_errors) {
- static uint32_t last_printed_rate;
-
- if (errrate > last_printed_rate) {
- last_printed_rate = errrate;
- /* Print the warning only if the error rate
- * for the transmitter retry interrupt
- * exceeded the previously printed rate.
- */
- printk(KERN_WARNING
- "%s: %s, Excessive error interrupts : %d/tick\n",
- pcibr_soft->bs_name,
- pcibr_isr_errs[i],
- errrate);
-
- }
- /*
- * Update snapshot, and time
- */
- bs_estat->bs_lasterr_timestamp = current_tick;
- bs_estat->bs_lasterr_snapshot =
- bs_estat->bs_errcount_total;
-
- }
- /*
- * If the error rate is high enough, print the error rate.
- */
- if (errinterval > PCIBR_ERRTIME_THRESHOLD) {
-
- if (errrate > PCIBR_ERRRATE_THRESHOLD) {
- printk(KERN_NOTICE "%s: %s, Error rate %d/tick",
- pcibr_soft->bs_name,
- pcibr_isr_errs[i],
- errrate);
- /*
- * Update snapshot, and time
- */
- bs_estat->bs_lasterr_timestamp = current_tick;
- bs_estat->bs_lasterr_snapshot =
- bs_estat->bs_errcount_total;
- }
- }
- /* PIC BRINGUP WAR (PV# 856155):
- * Dont disable PCI_X_ARB_ERR interrupts, we need the
- * interrupt inorder to clear the DEV_BROKE bits in
- * b_arb register to re-enable the device.
- */
- if (!(err_status & PIC_ISR_PCIX_ARB_ERR) &&
- PCIBR_WAR_ENABLED(PV856155, pcibr_soft)) {
-
- if (bs_estat->bs_errcount_total > PCIBR_ERRINTR_DISABLE_LEVEL) {
- /*
- * We have seen a fairly large number of errors of
- * this type. Let's disable the interrupt. But flash
- * a message about the interrupt being disabled.
- */
- printk(KERN_NOTICE
- "%s Disabling error interrupt type %s. Error count %d",
- pcibr_soft->bs_name,
- pcibr_isr_errs[i],
- bs_estat->bs_errcount_total);
- disable_errintr_mask |= (1ull << i);
- }
- } /* PIC: WAR for PV 856155 end-of-if */
- }
- }
- }
-
- if (disable_errintr_mask) {
- unsigned long s;
- /*
- * Disable some high frequency errors as they
- * could eat up too much cpu time.
- */
- s = pcibr_lock(pcibr_soft);
- pcireg_intr_enable_bit_clr(pcibr_soft, disable_errintr_mask);
- pcibr_unlock(pcibr_soft, s);
- }
- /*
- * If we leave the PROM cacheable, T5 might
- * try to do a cache line sized writeback to it,
- * which will cause a BRIDGE_ISR_INVLD_ADDR.
- */
- if ((err_status & BRIDGE_ISR_INVLD_ADDR) &&
- (0x00C00000 == (pcireg_bus_err_get(pcibr_soft) & 0xFFFFFFFFFFC00000)) &&
- (0x00402000 == (0x00F07F00 & pcireg_cmdword_err_get(pcibr_soft)))) {
- err_status &= ~BRIDGE_ISR_INVLD_ADDR;
- }
- /*
- * pcibr_pioerr_dump is a systune that make be used to not
- * print bridge registers for interrupts generated by pio-errors.
- * Some customers do early probes and expect a lot of failed
- * pios.
- */
- if (!pcibr_pioerr_dump) {
- bridge_errors_to_dump &= ~BRIDGE_ISR_PCIBUS_PIOERR;
- } else {
- bridge_errors_to_dump |= BRIDGE_ISR_PCIBUS_PIOERR;
- }
-
- /* Dump/Log Bridge error interrupt info */
- if (err_status & bridge_errors_to_dump) {
- printk("BRIDGE ERR_STATUS 0x%lx\n", err_status);
- pcibr_error_dump(pcibr_soft);
- }
-
- /* PIC BRINGUP WAR (PV# 867308):
- * Make BRIDGE_ISR_LLP_REC_SNERR & BRIDGE_ISR_LLP_REC_CBERR fatal errors
- * so we know we've hit the problem defined in PV 867308 that we believe
- * has only been seen in simulation
- */
- if (PCIBR_WAR_ENABLED(PV867308, pcibr_soft) &&
- (err_status & (BRIDGE_ISR_LLP_REC_SNERR | BRIDGE_ISR_LLP_REC_CBERR))) {
- printk("BRIDGE ERR_STATUS 0x%lx\n", err_status);
- pcibr_error_dump(pcibr_soft);
- /* machine_error_dump(""); */
- panic("PCI Bridge Error interrupt killed the system");
- }
-
- if (err_status & BRIDGE_ISR_ERROR_FATAL) {
- panic("PCI Bridge Error interrupt killed the system");
- /*NOTREACHED */
- }
-
-
- /*
- * We can't return without re-enabling the interrupt, since
- * it would cause problems for devices like IOC3 (Lost
- * interrupts ?.). So, just cleanup the interrupt, and
- * use saved values later..
- *
- * PIC doesn't require groups of interrupts to be cleared...
- */
- pcireg_intr_reset_set(pcibr_soft, (int_status | BRIDGE_IRR_MULTI_CLR));
-
- /* PIC BRINGUP WAR (PV# 856155):
- * On a PCI_X_ARB_ERR error interrupt clear the DEV_BROKE bits from
- * the b_arb register to re-enable the device.
- */
- if ((err_status & PIC_ISR_PCIX_ARB_ERR) &&
- PCIBR_WAR_ENABLED(PV856155, pcibr_soft)) {
- pcireg_arbitration_bit_set(pcibr_soft, (0xf << 20));
- }
-
- /* Zero out bserr_intstat field */
- pcibr_soft->bs_errinfo.bserr_intstat = 0;
- return IRQ_HANDLED;
-}
-
-/*
- * pcibr_addr_toslot
- * Given the 'pciaddr' find out which slot this address is
- * allocated to, and return the slot number.
- * While we have the info handy, construct the
- * function number, space code and offset as well.
- *
- * NOTE: if this routine is called, we don't know whether
- * the address is in CFG, MEM, or I/O space. We have to guess.
- * This will be the case on PIO stores, where the only way
- * we have of getting the address is to check the Bridge, which
- * stores the PCI address but not the space and not the xtalk
- * address (from which we could get it).
- */
-static int
-pcibr_addr_toslot(pcibr_soft_t pcibr_soft,
- iopaddr_t pciaddr,
- pciio_space_t *spacep,
- iopaddr_t *offsetp,
- pciio_function_t *funcp)
-{
- int s, f = 0, w;
- iopaddr_t base;
- size_t size;
- pciio_piospace_t piosp;
-
- /*
- * Check if the address is in config space
- */
-
- if ((pciaddr >= BRIDGE_CONFIG_BASE) && (pciaddr < BRIDGE_CONFIG_END)) {
-
- if (pciaddr >= BRIDGE_CONFIG1_BASE)
- pciaddr -= BRIDGE_CONFIG1_BASE;
- else
- pciaddr -= BRIDGE_CONFIG_BASE;
-
- s = pciaddr / BRIDGE_CONFIG_SLOT_SIZE;
- pciaddr %= BRIDGE_CONFIG_SLOT_SIZE;
-
- if (funcp) {
- f = pciaddr / 0x100;
- pciaddr %= 0x100;
- }
- if (spacep)
- *spacep = PCIIO_SPACE_CFG;
- if (offsetp)
- *offsetp = pciaddr;
- if (funcp)
- *funcp = f;
-
- return s;
- }
- for (s = pcibr_soft->bs_min_slot; s < PCIBR_NUM_SLOTS(pcibr_soft); ++s) {
- int nf = pcibr_soft->bs_slot[s].bss_ninfo;
- pcibr_info_h pcibr_infoh = pcibr_soft->bs_slot[s].bss_infos;
-
- for (f = 0; f < nf; f++) {
- pcibr_info_t pcibr_info = pcibr_infoh[f];
-
- if (!pcibr_info)
- continue;
- for (w = 0; w < 6; w++) {
- if (pcibr_info->f_window[w].w_space
- == PCIIO_SPACE_NONE) {
- continue;
- }
- base = pcibr_info->f_window[w].w_base;
- size = pcibr_info->f_window[w].w_size;
-
- if ((pciaddr >= base) && (pciaddr < (base + size))) {
- if (spacep)
- *spacep = PCIIO_SPACE_WIN(w);
- if (offsetp)
- *offsetp = pciaddr - base;
- if (funcp)
- *funcp = f;
- return s;
- } /* endif match */
- } /* next window */
- } /* next func */
- } /* next slot */
-
- /*
- * Check if the address was allocated as part of the
- * pcibr_piospace_alloc calls.
- */
- for (s = pcibr_soft->bs_min_slot; s < PCIBR_NUM_SLOTS(pcibr_soft); ++s) {
- int nf = pcibr_soft->bs_slot[s].bss_ninfo;
- pcibr_info_h pcibr_infoh = pcibr_soft->bs_slot[s].bss_infos;
-
- for (f = 0; f < nf; f++) {
- pcibr_info_t pcibr_info = pcibr_infoh[f];
-
- if (!pcibr_info)
- continue;
- piosp = pcibr_info->f_piospace;
- while (piosp) {
- if ((piosp->start <= pciaddr) &&
- ((piosp->count + piosp->start) > pciaddr)) {
- if (spacep)
- *spacep = piosp->space;
- if (offsetp)
- *offsetp = pciaddr - piosp->start;
- return s;
- } /* endif match */
- piosp = piosp->next;
- } /* next piosp */
- } /* next func */
- } /* next slot */
-
- /*
- * Some other random address on the PCI bus ...
- * we have no way of knowing whether this was
- * a MEM or I/O access; so, for now, we just
- * assume that the low 1G is MEM, the next
- * 3G is I/O, and anything above the 4G limit
- * is obviously MEM.
- */
-
- if (spacep)
- *spacep = ((pciaddr < (1ul << 30)) ? PCIIO_SPACE_MEM :
- (pciaddr < (4ul << 30)) ? PCIIO_SPACE_IO :
- PCIIO_SPACE_MEM);
- if (offsetp)
- *offsetp = pciaddr;
-
- return PCIIO_SLOT_NONE;
-
-}
-
-void
-pcibr_error_cleanup(pcibr_soft_t pcibr_soft, int error_code)
-{
- uint64_t clr_bits = BRIDGE_IRR_ALL_CLR;
-
- ASSERT(error_code & IOECODE_PIO);
- error_code = error_code;
-
- pcireg_intr_reset_set(pcibr_soft, clr_bits);
-
- pcireg_tflush_get(pcibr_soft); /* flushbus */
-}
-
-
-/*
- * pcibr_error_extract
- * Given the 'pcibr vertex handle' find out which slot
- * the bridge status error address (from pcibr_soft info
- * hanging off the vertex)
- * allocated to, and return the slot number.
- * While we have the info handy, construct the
- * space code and offset as well.
- *
- * NOTE: if this routine is called, we don't know whether
- * the address is in CFG, MEM, or I/O space. We have to guess.
- * This will be the case on PIO stores, where the only way
- * we have of getting the address is to check the Bridge, which
- * stores the PCI address but not the space and not the xtalk
- * address (from which we could get it).
- *
- * XXX- this interface has no way to return the function
- * number on a multifunction card, even though that data
- * is available.
- */
-
-pciio_slot_t
-pcibr_error_extract(vertex_hdl_t pcibr_vhdl,
- pciio_space_t *spacep,
- iopaddr_t *offsetp)
-{
- pcibr_soft_t pcibr_soft = 0;
- iopaddr_t bserr_addr;
- pciio_slot_t slot = PCIIO_SLOT_NONE;
- arbitrary_info_t rev;
-
- /* Do a sanity check as to whether we really got a
- * bridge vertex handle.
- */
- if (hwgraph_info_get_LBL(pcibr_vhdl, INFO_LBL_PCIBR_ASIC_REV, &rev) !=
- GRAPH_SUCCESS)
- return(slot);
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- if (pcibr_soft) {
- bserr_addr = pcireg_pci_bus_addr_get(pcibr_soft);
- slot = pcibr_addr_toslot(pcibr_soft, bserr_addr,
- spacep, offsetp, NULL);
- }
- return slot;
-}
-
-/*ARGSUSED */
-void
-pcibr_device_disable(pcibr_soft_t pcibr_soft, int devnum)
-{
- /*
- * XXX
- * Device failed to handle error. Take steps to
- * disable this device ? HOW TO DO IT ?
- *
- * If there are any Read response buffers associated
- * with this device, it's time to get them back!!
- *
- * We can disassociate any interrupt level associated
- * with this device, and disable that interrupt level
- *
- * For now it's just a place holder
- */
-}
-
-/*
- * pcibr_pioerror
- * Handle PIO error that happened at the bridge pointed by pcibr_soft.
- *
- * Queries the Bus interface attached to see if the device driver
- * mapping the device-number that caused error can handle the
- * situation. If so, it will clean up any error, and return
- * indicating the error was handled. If the device driver is unable
- * to handle the error, it expects the bus-interface to disable that
- * device, and takes any steps needed here to take away any resources
- * associated with this device.
- *
- * A note about slots:
- *
- * PIC-based bridges use zero-based device numbering when devices to
- * internal registers. However, the physical slots are numbered using a
- * one-based scheme because in PCI-X, device 0 is reserved (see comments
- * in pcibr_private.h for a better description).
- *
- * When building up the hwgraph, we use the external (one-based) number
- * scheme when numbering slot components so that hwgraph more accuratly
- * reflects what is silkscreened on the bricks.
- *
- * Since pciio_error_handler() needs to ultimatly be able to do a hwgraph
- * lookup, the ioerror that gets built up in pcibr_pioerror() encodes the
- * external (one-based) slot number. However, loops in pcibr_pioerror()
- * which attempt to translate the virtual address into the correct
- * PCI physical address use the device (zero-based) numbering when
- * walking through bridge structures.
- *
- * To that end, pcibr_pioerror() uses device to denote the
- * zero-based device number, and external_slot to denote the corresponding
- * one-based slot number. Loop counters (eg. cs) are always device based.
- */
-
-/* BEM_ADD_IOE doesn't dump the whole ioerror, it just
- * decodes the PCI specific portions -- we count on our
- * callers to dump the raw IOE data.
- */
-#define BEM_ADD_IOE(ioe) \
- do { \
- if (IOERROR_FIELDVALID(ioe, busspace)) { \
- iopaddr_t spc; \
- iopaddr_t win; \
- short widdev; \
- iopaddr_t busaddr; \
- \
- IOERROR_GETVALUE(spc, ioe, busspace); \
- win = spc - PCIIO_SPACE_WIN(0); \
- IOERROR_GETVALUE(busaddr, ioe, busaddr); \
- IOERROR_GETVALUE(widdev, ioe, widgetdev); \
- \
- switch (spc) { \
- case PCIIO_SPACE_CFG: \
- printk("\tPCI Slot %d Func %d CFG space Offset 0x%lx\n",\
- pciio_widgetdev_slot_get(widdev), \
- pciio_widgetdev_func_get(widdev), \
- busaddr); \
- break; \
- case PCIIO_SPACE_IO: \
- printk("\tPCI I/O space Offset 0x%lx\n", busaddr); \
- break; \
- case PCIIO_SPACE_MEM: \
- case PCIIO_SPACE_MEM32: \
- case PCIIO_SPACE_MEM64: \
- printk("\tPCI MEM space Offset 0x%lx\n", busaddr); \
- break; \
- default: \
- if (win < 6) { \
- printk("\tPCI Slot %d Func %d Window %ld Offset 0x%lx\n",\
- pciio_widgetdev_slot_get(widdev), \
- pciio_widgetdev_func_get(widdev), \
- win, \
- busaddr); \
- } \
- break; \
- } \
- } \
- } while (0)
-
-/*ARGSUSED */
-int
-pcibr_pioerror(
- pcibr_soft_t pcibr_soft,
- int error_code,
- ioerror_mode_t mode,
- ioerror_t *ioe)
-{
- int retval = IOERROR_HANDLED;
-
- vertex_hdl_t pcibr_vhdl = pcibr_soft->bs_vhdl;
- iopaddr_t bad_xaddr;
-
- pciio_space_t raw_space; /* raw PCI space */
- iopaddr_t raw_paddr; /* raw PCI address */
-
- pciio_space_t space; /* final PCI space */
- pciio_slot_t device; /* final PCI device if appropriate */
- pciio_slot_t external_slot;/* external slot for device */
- pciio_function_t func; /* final PCI func, if appropriate */
- iopaddr_t offset; /* final PCI offset */
-
- int cs, cw, cf;
- pciio_space_t wx;
- iopaddr_t wb;
- size_t ws;
- iopaddr_t wl;
-
-
- /*
- * We expect to have an "xtalkaddr" coming in,
- * and need to construct the slot/space/offset.
- */
-
- IOERROR_GETVALUE(bad_xaddr, ioe, xtalkaddr);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ERROR_HDLR, pcibr_soft->bs_conn,
- "pcibr_pioerror: pcibr_soft=0x%lx, bad_xaddr=0x%lx\n",
- pcibr_soft, bad_xaddr));
-
- device = PCIIO_SLOT_NONE;
- func = PCIIO_FUNC_NONE;
- raw_space = PCIIO_SPACE_NONE;
- raw_paddr = 0;
-
- if ((bad_xaddr >= PCIBR_BUS_TYPE0_CFG_DEV(pcibr_soft, 0)) &&
- (bad_xaddr < PCIBR_TYPE1_CFG(pcibr_soft))) {
- raw_paddr = bad_xaddr - PCIBR_BUS_TYPE0_CFG_DEV(pcibr_soft, 0);
- device = raw_paddr / BRIDGE_CONFIG_SLOT_SIZE;
- raw_paddr = raw_paddr % BRIDGE_CONFIG_SLOT_SIZE;
- raw_space = PCIIO_SPACE_CFG;
- }
- if ((bad_xaddr >= PCIBR_TYPE1_CFG(pcibr_soft)) &&
- (bad_xaddr < (PCIBR_TYPE1_CFG(pcibr_soft) + 0x1000))) {
- /* Type 1 config space:
- * slot and function numbers not known.
- * Perhaps we can read them back?
- */
- raw_paddr = bad_xaddr - PCIBR_TYPE1_CFG(pcibr_soft);
- raw_space = PCIIO_SPACE_CFG;
- }
- if ((bad_xaddr >= PCIBR_BRIDGE_DEVIO(pcibr_soft, 0)) &&
- (bad_xaddr < PCIBR_BRIDGE_DEVIO(pcibr_soft, BRIDGE_DEV_CNT))) {
- int x;
-
- raw_paddr = bad_xaddr - PCIBR_BRIDGE_DEVIO(pcibr_soft, 0);
- x = raw_paddr / BRIDGE_DEVIO_OFF;
- raw_paddr %= BRIDGE_DEVIO_OFF;
- /* first two devio windows are double-sized */
- if ((x == 1) || (x == 3))
- raw_paddr += BRIDGE_DEVIO_OFF;
- if (x > 0)
- x--;
- if (x > 1)
- x--;
- /* x is which devio reg; no guarantee
- * PCI slot x will be responding.
- * still need to figure out who decodes
- * space/offset on the bus.
- */
- raw_space = pcibr_soft->bs_slot[x].bss_devio.bssd_space;
- if (raw_space == PCIIO_SPACE_NONE) {
- /* Someone got an error because they
- * accessed the PCI bus via a DevIO(x)
- * window that pcibr has not yet assigned
- * to any specific PCI address. It is
- * quite possible that the Device(x)
- * register has been changed since they
- * made their access, but we will give it
- * our best decode shot.
- */
- raw_space = pcibr_soft->bs_slot[x].bss_device
- & BRIDGE_DEV_DEV_IO_MEM
- ? PCIIO_SPACE_MEM
- : PCIIO_SPACE_IO;
- raw_paddr +=
- (pcibr_soft->bs_slot[x].bss_device &
- BRIDGE_DEV_OFF_MASK) <<
- BRIDGE_DEV_OFF_ADDR_SHFT;
- } else
- raw_paddr += pcibr_soft->bs_slot[x].bss_devio.bssd_base;
- }
-
- if (IS_PIC_BUSNUM_SOFT(pcibr_soft, 0)) {
- if ((bad_xaddr >= PICBRIDGE0_PCI_MEM32_BASE) &&
- (bad_xaddr <= PICBRIDGE0_PCI_MEM32_LIMIT)) {
- raw_space = PCIIO_SPACE_MEM32;
- raw_paddr = bad_xaddr - PICBRIDGE0_PCI_MEM32_BASE;
- }
- if ((bad_xaddr >= PICBRIDGE0_PCI_MEM64_BASE) &&
- (bad_xaddr <= PICBRIDGE0_PCI_MEM64_LIMIT)) {
- raw_space = PCIIO_SPACE_MEM64;
- raw_paddr = bad_xaddr - PICBRIDGE0_PCI_MEM64_BASE;
- }
- } else if (IS_PIC_BUSNUM_SOFT(pcibr_soft, 1)) {
- if ((bad_xaddr >= PICBRIDGE1_PCI_MEM32_BASE) &&
- (bad_xaddr <= PICBRIDGE1_PCI_MEM32_LIMIT)) {
- raw_space = PCIIO_SPACE_MEM32;
- raw_paddr = bad_xaddr - PICBRIDGE1_PCI_MEM32_BASE;
- }
- if ((bad_xaddr >= PICBRIDGE1_PCI_MEM64_BASE) &&
- (bad_xaddr <= PICBRIDGE1_PCI_MEM64_LIMIT)) {
- raw_space = PCIIO_SPACE_MEM64;
- raw_paddr = bad_xaddr - PICBRIDGE1_PCI_MEM64_BASE;
- }
- } else {
- printk("pcibr_pioerror(): unknown bridge type");
- return IOERROR_UNHANDLED;
- }
- space = raw_space;
- offset = raw_paddr;
-
- if ((device == PCIIO_SLOT_NONE) && (space != PCIIO_SPACE_NONE)) {
- /* we've got a space/offset but not which
- * PCI slot decodes it. Check through our
- * notions of which devices decode where.
- *
- * Yes, this "duplicates" some logic in
- * pcibr_addr_toslot; the difference is,
- * this code knows which space we are in,
- * and can really really tell what is
- * going on (no guessing).
- */
-
- for (cs = pcibr_soft->bs_min_slot;
- (cs < PCIBR_NUM_SLOTS(pcibr_soft)) &&
- (device == PCIIO_SLOT_NONE); cs++) {
- int nf = pcibr_soft->bs_slot[cs].bss_ninfo;
- pcibr_info_h pcibr_infoh = pcibr_soft->bs_slot[cs].bss_infos;
-
- for (cf = 0; (cf < nf) && (device == PCIIO_SLOT_NONE); cf++) {
- pcibr_info_t pcibr_info = pcibr_infoh[cf];
-
- if (!pcibr_info)
- continue;
- for (cw = 0; (cw < 6) && (device == PCIIO_SLOT_NONE); ++cw) {
- if (((wx = pcibr_info->f_window[cw].w_space) != PCIIO_SPACE_NONE) &&
- ((wb = pcibr_info->f_window[cw].w_base) != 0) &&
- ((ws = pcibr_info->f_window[cw].w_size) != 0) &&
- ((wl = wb + ws) > wb) &&
- ((wb <= offset) && (wl > offset))) {
- /* MEM, MEM32 and MEM64 need to
- * compare as equal ...
- */
- if ((wx == space) ||
- (((wx == PCIIO_SPACE_MEM) ||
- (wx == PCIIO_SPACE_MEM32) ||
- (wx == PCIIO_SPACE_MEM64)) &&
- ((space == PCIIO_SPACE_MEM) ||
- (space == PCIIO_SPACE_MEM32) ||
- (space == PCIIO_SPACE_MEM64)))) {
- device = cs;
- func = cf;
- space = PCIIO_SPACE_WIN(cw);
- offset -= wb;
- } /* endif window space match */
- } /* endif window valid and addr match */
- } /* next window unless slot set */
- } /* next func unless slot set */
- } /* next slot unless slot set */
- /* XXX- if slot is still -1, no PCI devices are
- * decoding here using their standard PCI BASE
- * registers. This would be a really good place
- * to cross-coordinate with the pciio PCI
- * address space allocation routines, to find
- * out if this address is "allocated" by any of
- * our subsidiary devices.
- */
- }
- /* Scan all piomap records on this PCI bus to update
- * the TimeOut Counters on all matching maps. If we
- * don't already know the slot number, take it from
- * the first matching piomap. Note that we have to
- * compare maps against raw_space and raw_paddr
- * since space and offset could already be
- * window-relative.
- *
- * There is a chance that one CPU could update
- * through this path, and another CPU could also
- * update due to an interrupt. Closing this hole
- * would only result in the possibility of some
- * errors never getting logged at all, and since the
- * use for bp_toc is as a logical test rather than a
- * strict count, the excess counts are not a
- * problem.
- */
- for (cs = pcibr_soft->bs_min_slot;
- cs < PCIBR_NUM_SLOTS(pcibr_soft); ++cs) {
- int nf = pcibr_soft->bs_slot[cs].bss_ninfo;
- pcibr_info_h pcibr_infoh = pcibr_soft->bs_slot[cs].bss_infos;
-
- for (cf = 0; cf < nf; cf++) {
- pcibr_info_t pcibr_info = pcibr_infoh[cf];
- pcibr_piomap_t map;
-
- if (!pcibr_info)
- continue;
-
- for (map = pcibr_info->f_piomap;
- map != NULL; map = map->bp_next) {
- wx = map->bp_space;
- wb = map->bp_pciaddr;
- ws = map->bp_mapsz;
- cw = wx - PCIIO_SPACE_WIN(0);
- if (cw >= 0 && cw < 6) {
- wb += pcibr_soft->bs_slot[cs].bss_window[cw].bssw_base;
- wx = pcibr_soft->bs_slot[cs].bss_window[cw].bssw_space;
- }
- if (wx == PCIIO_SPACE_ROM) {
- wb += pcibr_info->f_rbase;
- wx = PCIIO_SPACE_MEM;
- }
- if ((wx == PCIIO_SPACE_MEM32) ||
- (wx == PCIIO_SPACE_MEM64))
- wx = PCIIO_SPACE_MEM;
- wl = wb + ws;
- if ((wx == raw_space) && (raw_paddr >= wb) && (raw_paddr < wl)) {
- atomic_inc(&map->bp_toc);
- if (device == PCIIO_SLOT_NONE) {
- device = cs;
- func = cf;
- space = map->bp_space;
- if (cw >= 0 && cw < 6)
- offset -= pcibr_soft->bs_slot[device].bss_window[cw].bssw_base;
- }
-
- break;
- }
- }
- }
- }
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ERROR_HDLR, pcibr_soft->bs_conn,
- "pcibr_pioerror: space=%d, offset=0x%lx, dev=0x%x, func=0x%x\n",
- space, offset, device, func));
-
- if (space != PCIIO_SPACE_NONE) {
- if (device != PCIIO_SLOT_NONE) {
- external_slot = PCIBR_DEVICE_TO_SLOT(pcibr_soft, device);
-
- if (func != PCIIO_FUNC_NONE)
- IOERROR_SETVALUE(ioe, widgetdev,
- pciio_widgetdev_create(external_slot,func));
- else
- IOERROR_SETVALUE(ioe, widgetdev,
- pciio_widgetdev_create(external_slot,0));
- }
- IOERROR_SETVALUE(ioe, busspace, space);
- IOERROR_SETVALUE(ioe, busaddr, offset);
- }
- if (mode == MODE_DEVPROBE) {
- /*
- * During probing, we don't really care what the
- * error is. Clean up the error in Bridge, notify
- * subsidiary devices, and return success.
- */
- pcibr_error_cleanup(pcibr_soft, error_code);
-
- /* if appropriate, give the error handler for this slot
- * a shot at this probe access as well.
- */
- return (device == PCIIO_SLOT_NONE) ? IOERROR_HANDLED :
- pciio_error_handler(pcibr_vhdl, error_code, mode, ioe);
- }
- /*
- * If we don't know what "PCI SPACE" the access
- * was targeting, we may have problems at the
- * Bridge itself. Don't touch any bridge registers,
- * and do complain loudly.
- */
-
- if (space == PCIIO_SPACE_NONE) {
- printk("XIO Bus Error at %s\n"
- "\taccess to XIO bus offset 0x%lx\n"
- "\tdoes not correspond to any PCI address\n",
- pcibr_soft->bs_name, bad_xaddr);
-
- /* caller will dump contents of ioe struct */
- return IOERROR_XTALKLEVEL;
- }
-
- /*
- * Actual PCI Error handling situation.
- * Typically happens when a user level process accesses
- * PCI space, and it causes some error.
- *
- * Due to PCI Bridge implementation, we get two indication
- * for a read error: an interrupt and a Bus error.
- * We like to handle read error in the bus error context.
- * But the interrupt comes and goes before bus error
- * could make much progress. (NOTE: interrupd does
- * come in _after_ bus error processing starts. But it's
- * completed by the time bus error code reaches PCI PIO
- * error handling.
- * Similarly write error results in just an interrupt,
- * and error handling has to be done at interrupt level.
- * There is no way to distinguish at interrupt time, if an
- * error interrupt is due to read/write error..
- */
-
- /* We know the xtalk addr, the raw PCI bus space,
- * the raw PCI bus address, the decoded PCI bus
- * space, the offset within that space, and the
- * decoded PCI slot (which may be "PCIIO_SLOT_NONE" if no slot
- * is known to be involved).
- */
-
- /*
- * Hand the error off to the handler registered
- * for the slot that should have decoded the error,
- * or to generic PCI handling (if pciio decides that
- * such is appropriate).
- */
- retval = pciio_error_handler(pcibr_vhdl, error_code, mode, ioe);
-
- if (retval != IOERROR_HANDLED) {
-
- /* Generate a generic message for IOERROR_UNHANDLED
- * since the subsidiary handlers were silent, and
- * did no recovery.
- */
- if (retval == IOERROR_UNHANDLED) {
- retval = IOERROR_PANIC;
-
- /* we may or may not want to print some of this,
- * depending on debug level and which error code.
- */
-
- printk(KERN_ALERT
- "PIO Error on PCI Bus %s",
- pcibr_soft->bs_name);
- BEM_ADD_IOE(ioe);
- }
-
- /*
- * Since error could not be handled at lower level,
- * error data logged has not been cleared.
- * Clean up errors, and
- * re-enable bridge to interrupt on error conditions.
- * NOTE: Wheather we get the interrupt on PCI_ABORT or not is
- * dependent on INT_ENABLE register. This write just makes sure
- * that if the interrupt was enabled, we do get the interrupt.
- *
- * CAUTION: Resetting bit BRIDGE_IRR_PCI_GRP_CLR, acknowledges
- * a group of interrupts. If while handling this error,
- * some other error has occurred, that would be
- * implicitly cleared by this write.
- * Need a way to ensure we don't inadvertently clear some
- * other errors.
- */
- if (IOERROR_FIELDVALID(ioe, widgetdev)) {
- short widdev;
- IOERROR_GETVALUE(widdev, ioe, widgetdev);
- external_slot = pciio_widgetdev_slot_get(widdev);
- device = PCIBR_SLOT_TO_DEVICE(pcibr_soft, external_slot);
- pcibr_device_disable(pcibr_soft, device);
- }
- if (mode == MODE_DEVUSERERROR)
- pcibr_error_cleanup(pcibr_soft, error_code);
- }
- return retval;
-}
-
-/*
- * bridge_dmaerror
- * Some error was identified in a DMA transaction.
- * This routine will identify the <device, address> that caused the error,
- * and try to invoke the appropriate bus service to handle this.
- */
-
-int
-pcibr_dmard_error(
- pcibr_soft_t pcibr_soft,
- int error_code,
- ioerror_mode_t mode,
- ioerror_t *ioe)
-{
- vertex_hdl_t pcibr_vhdl = pcibr_soft->bs_vhdl;
- int retval = 0;
- int bufnum, device;
-
- /*
- * In case of DMA errors, bridge should have logged the
- * address that caused the error.
- * Look up the address, in the bridge error registers, and
- * take appropriate action
- */
- {
- short tmp;
- IOERROR_GETVALUE(tmp, ioe, widgetnum);
- ASSERT(tmp == pcibr_soft->bs_xid);
- }
-
- /*
- * read error log registers
- */
- bufnum = pcireg_resp_err_buf_get(pcibr_soft);
- device = pcireg_resp_err_dev_get(pcibr_soft);
- IOERROR_SETVALUE(ioe, widgetdev, pciio_widgetdev_create(device, 0));
- IOERROR_SETVALUE(ioe, busaddr, pcireg_resp_err_get(pcibr_soft));
-
- /*
- * need to ensure that the xtalk address in ioe
- * maps to PCI error address read from bridge.
- * How to convert PCI address back to Xtalk address ?
- * (better idea: convert XTalk address to PCI address
- * and then do the compare!)
- */
-
- retval = pciio_error_handler(pcibr_vhdl, error_code, mode, ioe);
- if (retval != IOERROR_HANDLED) {
- short tmp;
- IOERROR_GETVALUE(tmp, ioe, widgetdev);
- pcibr_device_disable(pcibr_soft, pciio_widgetdev_slot_get(tmp));
- }
-
- /*
- * Re-enable bridge to interrupt on BRIDGE_IRR_RESP_BUF_GRP_CLR
- * NOTE: Wheather we get the interrupt on BRIDGE_IRR_RESP_BUF_GRP_CLR or
- * not is dependent on INT_ENABLE register. This write just makes sure
- * that if the interrupt was enabled, we do get the interrupt.
- */
- pcireg_intr_reset_set(pcibr_soft, BRIDGE_IRR_RESP_BUF_GRP_CLR);
-
- /*
- * Also, release the "bufnum" back to buffer pool that could be re-used.
- * This is done by "disabling" the buffer for a moment, then restoring
- * the original assignment.
- */
-
- {
- uint64_t rrb_reg;
- uint64_t mask;
-
- rrb_reg = pcireg_rrb_get(pcibr_soft, (bufnum & 1));
- mask = 0xF << ((bufnum >> 1) * 4);
- pcireg_rrb_set(pcibr_soft, (bufnum & 1), (rrb_reg & ~mask));
- pcireg_rrb_set(pcibr_soft, (bufnum & 1), rrb_reg);
- }
-
- return retval;
-}
-
-/*
- * pcibr_dmawr_error:
- * Handle a dma write error caused by a device attached to this bridge.
- *
- * ioe has the widgetnum, widgetdev, and memaddr fields updated
- * But we don't know the PCI address that corresponds to "memaddr"
- * nor do we know which device driver is generating this address.
- *
- * There is no easy way to find out the PCI address(es) that map
- * to a specific system memory address. Bus handling code is also
- * of not much help, since they don't keep track of the DMA mapping
- * that have been handed out.
- * So it's a dead-end at this time.
- *
- * If translation is available, we could invoke the error handling
- * interface of the device driver.
- */
-/*ARGSUSED */
-int
-pcibr_dmawr_error(
- pcibr_soft_t pcibr_soft,
- int error_code,
- ioerror_mode_t mode,
- ioerror_t *ioe)
-{
- vertex_hdl_t pcibr_vhdl = pcibr_soft->bs_vhdl;
- int retval;
-
- retval = pciio_error_handler(pcibr_vhdl, error_code, mode, ioe);
-
- if (retval != IOERROR_HANDLED) {
- short tmp;
-
- IOERROR_GETVALUE(tmp, ioe, widgetdev);
- pcibr_device_disable(pcibr_soft, pciio_widgetdev_slot_get(tmp));
- }
- return retval;
-}
-
-/*
- * Bridge error handler.
- * Interface to handle all errors that involve bridge in some way.
- *
- * This normally gets called from xtalk error handler.
- * ioe has different set of fields set depending on the error that
- * was encountered. So, we have a bit field indicating which of the
- * fields are valid.
- *
- * NOTE: This routine could be operating in interrupt context. So,
- * don't try to sleep here (till interrupt threads work!!)
- */
-int
-pcibr_error_handler(
- error_handler_arg_t einfo,
- int error_code,
- ioerror_mode_t mode,
- ioerror_t *ioe)
-{
- pcibr_soft_t pcibr_soft;
- int retval = IOERROR_BADERRORCODE;
-
- pcibr_soft = (pcibr_soft_t) einfo;
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ERROR_HDLR, pcibr_soft->bs_conn,
- "pcibr_error_handler: pcibr_soft=0x%lx, error_code=0x%x\n",
- pcibr_soft, error_code));
-
-#if DEBUG && ERROR_DEBUG
- printk( "%s: pcibr_error_handler\n", pcibr_soft->bs_name);
-#endif
-
- ASSERT(pcibr_soft != NULL);
-
- if (error_code & IOECODE_PIO)
- retval = pcibr_pioerror(pcibr_soft, error_code, mode, ioe);
-
- if (error_code & IOECODE_DMA) {
- if (error_code & IOECODE_READ) {
- /*
- * DMA read error occurs when a device attached to the bridge
- * tries to read some data from system memory, and this
- * either results in a timeout or access error.
- * First case is indicated by the bit "XREAD_REQ_TOUT"
- * and second case by "RESP_XTALK_ERROR" bit in bridge error
- * interrupt status register.
- *
- * pcibr_error_intr_handler would get invoked first, and it has
- * the responsibility of calling pcibr_error_handler with
- * suitable parameters.
- */
-
- retval = pcibr_dmard_error(pcibr_soft, error_code, MODE_DEVERROR, ioe);
- }
- if (error_code & IOECODE_WRITE) {
- /*
- * A device attached to this bridge has been generating
- * bad DMA writes. Find out the device attached, and
- * slap on it's wrist.
- */
-
- retval = pcibr_dmawr_error(pcibr_soft, error_code, MODE_DEVERROR, ioe);
- }
- }
- return retval;
-
-}
-
-/*
- * PIC has 2 busses under a single widget so pcibr_attach2 registers this
- * wrapper function rather than pcibr_error_handler() for PIC. It's upto
- * this wrapper to call pcibr_error_handler() with the correct pcibr_soft
- * struct (ie. the pcibr_soft struct for the bus that saw the error).
- *
- * NOTE: this wrapper function is only registered for PIC ASICs and will
- * only be called for a PIC
- */
-int
-pcibr_error_handler_wrapper(
- error_handler_arg_t einfo,
- int error_code,
- ioerror_mode_t mode,
- ioerror_t *ioe)
-{
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) einfo;
- int pio_retval = -1;
- int dma_retval = -1;
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ERROR_HDLR, pcibr_soft->bs_conn,
- "pcibr_error_handler_wrapper: pcibr_soft=0x%lx, "
- "error_code=0x%x\n", pcibr_soft, error_code));
-
- /*
- * It is possible that both a IOECODE_PIO and a IOECODE_DMA, and both
- * IOECODE_READ and IOECODE_WRITE could be set in error_code so we must
- * process all. Since we are a wrapper for pcibr_error_handler(), and
- * will be calling it several times within this routine, we turn off the
- * error_code bits we don't want it to be processing during that call.
- */
- /*
- * If the error was a result of a PIO, we tell what bus on the PIC saw
- * the error from the PIO address.
- */
-
- if (error_code & IOECODE_PIO) {
- iopaddr_t bad_xaddr;
- /*
- * PIC bus0 PIO space 0x000000 - 0x7fffff or 0x40000000 - 0xbfffffff
- * bus1 PIO space 0x800000 - 0xffffff or 0xc0000000 - 0x13fffffff
- */
- IOERROR_GETVALUE(bad_xaddr, ioe, xtalkaddr);
- if ((bad_xaddr <= 0x7fffff) ||
- ((bad_xaddr >= 0x40000000) && (bad_xaddr <= 0xbfffffff))) {
- /* bus 0 saw the error */
- pio_retval = pcibr_error_handler((error_handler_arg_t)pcibr_soft,
- (error_code & ~IOECODE_DMA), mode, ioe);
- } else if (((bad_xaddr >= 0x800000) && (bad_xaddr <= 0xffffff)) ||
- ((bad_xaddr >= 0xc0000000) && (bad_xaddr <= 0x13fffffff))) {
- /* bus 1 saw the error */
- pcibr_soft = pcibr_soft->bs_peers_soft;
- if (!pcibr_soft) {
-#if DEBUG
- printk(KERN_WARNING "pcibr_error_handler: "
- "bs_peers_soft==NULL. bad_xaddr= 0x%lx mode= 0x%lx\n",
- bad_xaddr, mode);
-#endif
- pio_retval = IOERROR_HANDLED;
- } else
- pio_retval= pcibr_error_handler((error_handler_arg_t)pcibr_soft,
- (error_code & ~IOECODE_DMA), mode, ioe);
- } else {
- printk(KERN_WARNING "pcibr_error_handler_wrapper(): IOECODE_PIO: "
- "saw an invalid pio address: 0x%lx\n", bad_xaddr);
- pio_retval = IOERROR_UNHANDLED;
- }
- }
-
- /*
- * If the error was a result of a DMA Write, we tell what bus on the PIC
- * saw the error by looking at tnum.
- */
- if ((error_code & IOECODE_DMA) && (error_code & IOECODE_WRITE)) {
- short tmp;
- /*
- * For DMA writes [X]Bridge encodes the TNUM field of a Xtalk
- * packet like this:
- * bits value
- * 4:3 10b
- * 2:0 device number
- *
- * BUT PIC needs the bus number so it does this:
- * bits value
- * 4:3 10b
- * 2 busnumber
- * 1:0 device number
- *
- * Pull out the bus number from `tnum' and reset the `widgetdev'
- * since when hubiio_crb_error_handler() set `widgetdev' it had
- * no idea if it was a PIC or a BRIDGE ASIC so it set it based
- * off bits 2:0
- */
- IOERROR_GETVALUE(tmp, ioe, tnum);
- IOERROR_SETVALUE(ioe, widgetdev, (tmp & 0x3));
- if ((tmp & 0x4) == 0) {
- /* bus 0 saw the error. */
- dma_retval = pcibr_error_handler((error_handler_arg_t)pcibr_soft,
- (error_code & ~(IOECODE_PIO|IOECODE_READ)), mode, ioe);
- } else {
- /* bus 1 saw the error */
- pcibr_soft = pcibr_soft->bs_peers_soft;
- dma_retval = pcibr_error_handler((error_handler_arg_t)pcibr_soft,
- (error_code & ~(IOECODE_PIO|IOECODE_READ)), mode, ioe);
- }
- }
-
- /*
- * If the error was a result of a DMA READ, XXX ???
- */
- if ((error_code & IOECODE_DMA) && (error_code & IOECODE_READ)) {
- /*
- * A DMA Read error will result in a BRIDGE_ISR_RESP_XTLK_ERR
- * or BRIDGE_ISR_BAD_XRESP_PKT bridge error interrupt which
- * are fatal interrupts (ie. BRIDGE_ISR_ERROR_FATAL) causing
- * pcibr_error_intr_handler() to panic the system. So is the
- * error handler even going to get called??? It appears that
- * the pcibr_dmard_error() attempts to clear the interrupts
- * so pcibr_error_intr_handler() won't see them, but there
- * appears to be nothing to prevent pcibr_error_intr_handler()
- * from running before pcibr_dmard_error() has a chance to
- * clear the interrupt.
- *
- * Since we'll be panicing anyways, don't bother handling the
- * error for now until we can fix this race condition mentioned
- * above.
- */
- dma_retval = IOERROR_UNHANDLED;
- }
-
- /* XXX: pcibr_error_handler() should probably do the same thing, it over-
- * write it's return value as it processes the different "error_code"s.
- */
- if ((pio_retval == -1) && (dma_retval == -1)) {
- return IOERROR_BADERRORCODE;
- } else if ((dma_retval != IOERROR_HANDLED) && (dma_retval != -1)) {
- return dma_retval;
- } else if ((pio_retval != IOERROR_HANDLED) && (pio_retval != -1)) {
- return pio_retval;
- } else {
- return IOERROR_HANDLED;
- }
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/pci/pci_defs.h>
-
-pcibr_hints_t pcibr_hints_get(vertex_hdl_t, int);
-void pcibr_hints_fix_rrbs(vertex_hdl_t);
-void pcibr_hints_dualslot(vertex_hdl_t, pciio_slot_t, pciio_slot_t);
-void pcibr_hints_intr_bits(vertex_hdl_t, pcibr_intr_bits_f *);
-void pcibr_set_rrb_callback(vertex_hdl_t, rrb_alloc_funct_t);
-void pcibr_hints_handsoff(vertex_hdl_t);
-void pcibr_hints_subdevs(vertex_hdl_t, pciio_slot_t, uint64_t);
-
-pcibr_hints_t
-pcibr_hints_get(vertex_hdl_t xconn_vhdl, int alloc)
-{
- arbitrary_info_t ainfo = 0;
- graph_error_t rv;
- pcibr_hints_t hint;
-
- rv = hwgraph_info_get_LBL(xconn_vhdl, INFO_LBL_PCIBR_HINTS, &ainfo);
-
- if (alloc && (rv != GRAPH_SUCCESS)) {
-
- hint = kmalloc(sizeof (*(hint)), GFP_KERNEL);
- if ( !hint ) {
- printk(KERN_WARNING "pcibr_hints_get(): unable to allocate "
- "memory\n");
- goto abnormal_exit;
- }
- memset(hint, 0, sizeof (*(hint)));
-
- hint->rrb_alloc_funct = NULL;
- hint->ph_intr_bits = NULL;
- rv = hwgraph_info_add_LBL(xconn_vhdl,
- INFO_LBL_PCIBR_HINTS,
- (arbitrary_info_t) hint);
- if (rv != GRAPH_SUCCESS)
- goto abnormal_exit;
-
- rv = hwgraph_info_get_LBL(xconn_vhdl, INFO_LBL_PCIBR_HINTS, &ainfo);
-
- if (rv != GRAPH_SUCCESS)
- goto abnormal_exit;
-
- if (ainfo != (arbitrary_info_t) hint)
- goto abnormal_exit;
- }
- return (pcibr_hints_t) ainfo;
-
-abnormal_exit:
- kfree(hint);
- return NULL;
-
-}
-
-void
-pcibr_hints_fix_some_rrbs(vertex_hdl_t xconn_vhdl, unsigned mask)
-{
- pcibr_hints_t hint = pcibr_hints_get(xconn_vhdl, 1);
-
- if (hint)
- hint->ph_rrb_fixed = mask;
- else
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl,
- "pcibr_hints_fix_rrbs: pcibr_hints_get failed\n"));
-}
-
-void
-pcibr_hints_fix_rrbs(vertex_hdl_t xconn_vhdl)
-{
- pcibr_hints_fix_some_rrbs(xconn_vhdl, 0xFF);
-}
-
-void
-pcibr_hints_dualslot(vertex_hdl_t xconn_vhdl,
- pciio_slot_t host,
- pciio_slot_t guest)
-{
- pcibr_hints_t hint = pcibr_hints_get(xconn_vhdl, 1);
-
- if (hint)
- hint->ph_host_slot[guest] = host + 1;
- else
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl,
- "pcibr_hints_dualslot: pcibr_hints_get failed\n"));
-}
-
-void
-pcibr_hints_intr_bits(vertex_hdl_t xconn_vhdl,
- pcibr_intr_bits_f *xxx_intr_bits)
-{
- pcibr_hints_t hint = pcibr_hints_get(xconn_vhdl, 1);
-
- if (hint)
- hint->ph_intr_bits = xxx_intr_bits;
- else
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl,
- "pcibr_hints_intr_bits: pcibr_hints_get failed\n"));
-}
-
-void
-pcibr_set_rrb_callback(vertex_hdl_t xconn_vhdl, rrb_alloc_funct_t rrb_alloc_funct)
-{
- pcibr_hints_t hint = pcibr_hints_get(xconn_vhdl, 1);
-
- if (hint)
- hint->rrb_alloc_funct = rrb_alloc_funct;
-}
-
-void
-pcibr_hints_handsoff(vertex_hdl_t xconn_vhdl)
-{
- pcibr_hints_t hint = pcibr_hints_get(xconn_vhdl, 1);
-
- if (hint)
- hint->ph_hands_off = 1;
- else
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl,
- "pcibr_hints_handsoff: pcibr_hints_get failed\n"));
-}
-
-void
-pcibr_hints_subdevs(vertex_hdl_t xconn_vhdl,
- pciio_slot_t slot,
- uint64_t subdevs)
-{
- arbitrary_info_t ainfo = 0;
- char sdname[16];
- vertex_hdl_t pconn_vhdl = GRAPH_VERTEX_NONE;
-
- sprintf(sdname, "%s/%d", EDGE_LBL_PCI, slot);
- (void) hwgraph_path_add(xconn_vhdl, sdname, &pconn_vhdl);
- if (pconn_vhdl == GRAPH_VERTEX_NONE) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl,
- "pcibr_hints_subdevs: hwgraph_path_create failed\n"));
- return;
- }
- hwgraph_info_get_LBL(pconn_vhdl, INFO_LBL_SUBDEVS, &ainfo);
- if (ainfo == 0) {
- uint64_t *subdevp;
-
- subdevp = kmalloc(sizeof (*(subdevp)), GFP_KERNEL);
- if (!subdevp) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl,
- "pcibr_hints_subdevs: subdev ptr alloc failed\n"));
- return;
- }
- memset(subdevp, 0, sizeof (*(subdevp)));
- *subdevp = subdevs;
- hwgraph_info_add_LBL(pconn_vhdl, INFO_LBL_SUBDEVS, (arbitrary_info_t) subdevp);
- hwgraph_info_get_LBL(pconn_vhdl, INFO_LBL_SUBDEVS, &ainfo);
- if (ainfo == (arbitrary_info_t) subdevp)
- return;
- kfree(subdevp);
- if (ainfo == (arbitrary_info_t) NULL) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl,
- "pcibr_hints_subdevs: null subdevs ptr\n"));
- return;
- }
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl,
- "pcibr_subdevs_get: dup subdev add_LBL\n"));
- }
- *(uint64_t *) ainfo = subdevs;
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/module.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/arch.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/pci/pci_defs.h>
-#include <asm/sn/io.h>
-#include <asm/sn/sn_private.h>
-
-#ifdef __ia64
-inline int
-compare_and_swap_ptr(void **location, void *old_ptr, void *new_ptr)
-{
- /* FIXME - compare_and_swap_ptr NOT ATOMIC */
- if (*location == old_ptr) {
- *location = new_ptr;
- return 1;
- }
- else
- return 0;
-}
-#endif
-
-unsigned int pcibr_intr_bits(pciio_info_t info, pciio_intr_line_t lines, int nslots);
-pcibr_intr_t pcibr_intr_alloc(vertex_hdl_t, device_desc_t, pciio_intr_line_t, vertex_hdl_t);
-void pcibr_intr_free(pcibr_intr_t);
-void pcibr_setpciint(xtalk_intr_t);
-int pcibr_intr_connect(pcibr_intr_t, intr_func_t, intr_arg_t);
-void pcibr_intr_disconnect(pcibr_intr_t);
-
-vertex_hdl_t pcibr_intr_cpu_get(pcibr_intr_t);
-
-extern pcibr_info_t pcibr_info_get(vertex_hdl_t);
-
-/* =====================================================================
- * INTERRUPT MANAGEMENT
- */
-
-unsigned int
-pcibr_intr_bits(pciio_info_t info,
- pciio_intr_line_t lines, int nslots)
-{
- pciio_slot_t slot = PCIBR_INFO_SLOT_GET_INT(info);
- unsigned bbits = 0;
-
- /*
- * Currently favored mapping from PCI
- * slot number and INTA/B/C/D to Bridge
- * PCI Interrupt Bit Number:
- *
- * SLOT A B C D
- * 0 0 4 0 4
- * 1 1 5 1 5
- * 2 2 6 2 6
- * 3 3 7 3 7
- * 4 4 0 4 0
- * 5 5 1 5 1
- * 6 6 2 6 2
- * 7 7 3 7 3
- */
-
- if (slot < nslots) {
- if (lines & (PCIIO_INTR_LINE_A| PCIIO_INTR_LINE_C))
- bbits |= 1 << slot;
- if (lines & (PCIIO_INTR_LINE_B| PCIIO_INTR_LINE_D))
- bbits |= 1 << (slot ^ 4);
- }
- return bbits;
-}
-
-
-/*
- * On SN systems there is a race condition between a PIO read response
- * and DMA's. In rare cases, the read response may beat the DMA, causing
- * the driver to think that data in memory is complete and meaningful.
- * This code eliminates that race.
- * This routine is called by the PIO read routines after doing the read.
- * This routine then forces a fake interrupt on another line, which
- * is logically associated with the slot that the PIO is addressed to.
- * (see sn_dma_flush_init() )
- * It then spins while watching the memory location that the interrupt
- * is targetted to. When the interrupt response arrives, we are sure
- * that the DMA has landed in memory and it is safe for the driver
- * to proceed.
- */
-
-extern struct sn_flush_nasid_entry flush_nasid_list[MAX_NASIDS];
-
-void
-sn_dma_flush(unsigned long addr)
-{
- nasid_t nasid;
- int wid_num;
- struct sn_flush_device_list *p;
- int i,j;
- int bwin;
- unsigned long flags;
-
- nasid = NASID_GET(addr);
- wid_num = SWIN_WIDGETNUM(addr);
- bwin = BWIN_WINDOWNUM(addr);
-
- if (flush_nasid_list[nasid].widget_p == NULL) return;
- if (bwin > 0) {
- unsigned long itte = flush_nasid_list[nasid].iio_itte[bwin];
-
- wid_num = (itte >> IIO_ITTE_WIDGET_SHIFT) &
- IIO_ITTE_WIDGET_MASK;
- }
- if (flush_nasid_list[nasid].widget_p == NULL) return;
- if (flush_nasid_list[nasid].widget_p[wid_num] == NULL) return;
- p = &flush_nasid_list[nasid].widget_p[wid_num][0];
-
- /* find a matching BAR */
-
- for (i=0; i<DEV_PER_WIDGET;i++) {
- for (j=0; j<PCI_ROM_RESOURCE;j++) {
- if (p->bar_list[j].start == 0) break;
- if (addr >= p->bar_list[j].start && addr <= p->bar_list[j].end) break;
- }
- if (j < PCI_ROM_RESOURCE && p->bar_list[j].start != 0) break;
- p++;
- }
-
- /* if no matching BAR, return without doing anything. */
-
- if (i == DEV_PER_WIDGET) return;
-
- spin_lock_irqsave(&p->flush_lock, flags);
-
- p->flush_addr = 0;
-
- /* force an interrupt. */
-
- *(volatile uint32_t *)(p->force_int_addr) = 1;
-
- /* wait for the interrupt to come back. */
-
- while (p->flush_addr != 0x10f);
-
- /* okay, everything is synched up. */
- spin_unlock_irqrestore(&p->flush_lock, flags);
-}
-
-EXPORT_SYMBOL(sn_dma_flush);
-
-/*
- * There are end cases where a deadlock can occur if interrupt
- * processing completes and the Bridge b_int_status bit is still set.
- *
- * One scenerio is if a second PCI interrupt occurs within 60ns of
- * the previous interrupt being cleared. In this case the Bridge
- * does not detect the transition, the Bridge b_int_status bit
- * remains set, and because no transition was detected no interrupt
- * packet is sent to the Hub/Heart.
- *
- * A second scenerio is possible when a b_int_status bit is being
- * shared by multiple devices:
- * Device #1 generates interrupt
- * Bridge b_int_status bit set
- * Device #2 generates interrupt
- * interrupt processing begins
- * ISR for device #1 runs and
- * clears interrupt
- * Device #1 generates interrupt
- * ISR for device #2 runs and
- * clears interrupt
- * (b_int_status bit still set)
- * interrupt processing completes
- *
- * Interrupt processing is now complete, but an interrupt is still
- * outstanding for Device #1. But because there was no transition of
- * the b_int_status bit, no interrupt packet will be generated and
- * a deadlock will occur.
- *
- * To avoid these deadlock situations, this function is used
- * to check if a specific Bridge b_int_status bit is set, and if so,
- * cause the setting of the corresponding interrupt bit.
- *
- * On a XBridge (SN1) and PIC (SN2), we do this by writing the appropriate Bridge Force
- * Interrupt register.
- */
-void
-pcibr_force_interrupt(pcibr_intr_t intr)
-{
- unsigned bit;
- unsigned bits;
- pcibr_soft_t pcibr_soft = intr->bi_soft;
-
- bits = intr->bi_ibits;
- for (bit = 0; bit < 8; bit++) {
- if (bits & (1 << bit)) {
-
- PCIBR_DEBUG((PCIBR_DEBUG_INTR, pcibr_soft->bs_vhdl,
- "pcibr_force_interrupt: bit=0x%x\n", bit));
-
- pcireg_force_intr_set(pcibr_soft, bit);
- }
- }
-}
-
-/*ARGSUSED */
-pcibr_intr_t
-pcibr_intr_alloc(vertex_hdl_t pconn_vhdl,
- device_desc_t dev_desc,
- pciio_intr_line_t lines,
- vertex_hdl_t owner_dev)
-{
- pcibr_info_t pcibr_info = pcibr_info_get(pconn_vhdl);
- pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pcibr_info);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pcibr_info->f_mfast;
- vertex_hdl_t xconn_vhdl = pcibr_soft->bs_conn;
- int is_threaded = 0;
-
- xtalk_intr_t *xtalk_intr_p;
- pcibr_intr_t *pcibr_intr_p;
- pcibr_intr_list_t *intr_list_p;
-
- unsigned pcibr_int_bits;
- unsigned pcibr_int_bit;
- xtalk_intr_t xtalk_intr = (xtalk_intr_t)0;
- hub_intr_t hub_intr;
- pcibr_intr_t pcibr_intr;
- pcibr_intr_list_t intr_entry;
- pcibr_intr_list_t intr_list;
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
- "pcibr_intr_alloc: %s%s%s%s%s\n",
- !(lines & 15) ? " No INTs?" : "",
- lines & 1 ? " INTA" : "",
- lines & 2 ? " INTB" : "",
- lines & 4 ? " INTC" : "",
- lines & 8 ? " INTD" : ""));
-
- pcibr_intr = kmalloc(sizeof (*(pcibr_intr)), GFP_KERNEL);
- if (!pcibr_intr)
- return NULL;
- memset(pcibr_intr, 0, sizeof (*(pcibr_intr)));
-
- pcibr_intr->bi_dev = pconn_vhdl;
- pcibr_intr->bi_lines = lines;
- pcibr_intr->bi_soft = pcibr_soft;
- pcibr_intr->bi_ibits = 0; /* bits will be added below */
- pcibr_intr->bi_func = 0; /* unset until connect */
- pcibr_intr->bi_arg = 0; /* unset until connect */
- pcibr_intr->bi_flags = is_threaded ? 0 : PCIIO_INTR_NOTHREAD;
- pcibr_intr->bi_mustruncpu = CPU_NONE;
- pcibr_intr->bi_ibuf.ib_in = 0;
- pcibr_intr->bi_ibuf.ib_out = 0;
- spin_lock_init(&pcibr_intr->bi_ibuf.ib_lock);
-
- pcibr_int_bits = pcibr_soft->bs_intr_bits((pciio_info_t)pcibr_info,
- lines, PCIBR_NUM_SLOTS(pcibr_soft));
-
- /*
- * For each PCI interrupt line requested, figure
- * out which Bridge PCI Interrupt Line it maps
- * to, and make sure there are xtalk resources
- * allocated for it.
- */
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
- "pcibr_intr_alloc: pcibr_int_bits: 0x%x\n", pcibr_int_bits));
- for (pcibr_int_bit = 0; pcibr_int_bit < 8; pcibr_int_bit ++) {
- if (pcibr_int_bits & (1 << pcibr_int_bit)) {
- xtalk_intr_p = &pcibr_soft->bs_intr[pcibr_int_bit].bsi_xtalk_intr;
-
- xtalk_intr = *xtalk_intr_p;
-
- if (xtalk_intr == NULL) {
- /*
- * This xtalk_intr_alloc is constrained for two reasons:
- * 1) Normal interrupts and error interrupts need to be delivered
- * through a single xtalk target widget so that there aren't any
- * ordering problems with DMA, completion interrupts, and error
- * interrupts. (Use of xconn_vhdl forces this.)
- *
- * 2) On SN1, addressing constraints on SN1 and Bridge force
- * us to use a single PI number for all interrupts from a
- * single Bridge. (SN1-specific code forces this).
- */
-
- /*
- * All code dealing with threaded PCI interrupt handlers
- * is located at the pcibr level. Because of this,
- * we always want the lower layers (hub/heart_intr_alloc,
- * intr_level_connect) to treat us as non-threaded so we
- * don't set up a duplicate threaded environment. We make
- * this happen by calling a special xtalk interface.
- */
- xtalk_intr = xtalk_intr_alloc_nothd(xconn_vhdl, dev_desc,
- owner_dev);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
- "pcibr_intr_alloc: xtalk_intr=0x%lx\n", xtalk_intr));
-
- /* both an assert and a runtime check on this:
- * we need to check in non-DEBUG kernels, and
- * the ASSERT gets us more information when
- * we use DEBUG kernels.
- */
- ASSERT(xtalk_intr != NULL);
- if (xtalk_intr == NULL) {
- /* it is quite possible that our
- * xtalk_intr_alloc failed because
- * someone else got there first,
- * and we can find their results
- * in xtalk_intr_p.
- */
- if (!*xtalk_intr_p) {
- printk(KERN_ALERT "pcibr_intr_alloc %s: "
- "unable to get xtalk interrupt resources",
- pcibr_soft->bs_name);
- /* yes, we leak resources here. */
- return 0;
- }
- } else if (compare_and_swap_ptr((void **) xtalk_intr_p, NULL, xtalk_intr)) {
- /*
- * now tell the bridge which slot is
- * using this interrupt line.
- */
- pcireg_intr_device_bit_clr(pcibr_soft,
- BRIDGE_INT_DEV_MASK(pcibr_int_bit));
- pcireg_intr_device_bit_set(pcibr_soft,
- (pciio_slot << BRIDGE_INT_DEV_SHFT(pcibr_int_bit)));
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
- "bridge intr bit %d clears my wrb\n",
- pcibr_int_bit));
- } else {
- /* someone else got one allocated first;
- * free the one we just created, and
- * retrieve the one they allocated.
- */
- xtalk_intr_free(xtalk_intr);
- xtalk_intr = *xtalk_intr_p;
- }
- }
-
- pcibr_intr->bi_ibits |= 1 << pcibr_int_bit;
-
- intr_entry = kmalloc(sizeof (*(intr_entry)), GFP_KERNEL);
- if ( !intr_entry ) {
- printk(KERN_ALERT "pcibr_intr_alloc %s: "
- "unable to get memory",
- pcibr_soft->bs_name);
- return 0;
- }
- memset(intr_entry, 0, sizeof (*(intr_entry)));
-
- intr_entry->il_next = NULL;
- intr_entry->il_intr = pcibr_intr;
- intr_entry->il_soft = pcibr_soft;
- intr_entry->il_slot = pciio_slot;
- intr_list_p =
- &pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_list;
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
- "Bridge bit 0x%x wrap=0x%lx\n", pcibr_int_bit,
- &(pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap)));
-
- if (compare_and_swap_ptr((void **) intr_list_p, NULL, intr_entry)) {
- /* we are the first interrupt on this bridge bit.
- */
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
- "INT 0x%x (bridge bit %d) allocated [FIRST]\n",
- pcibr_int_bits, pcibr_int_bit));
- continue;
- }
- intr_list = *intr_list_p;
- pcibr_intr_p = &intr_list->il_intr;
- if (compare_and_swap_ptr((void **) pcibr_intr_p, NULL, pcibr_intr)) {
- /* first entry on list was erased,
- * and we replaced it, so we
- * don't need our intr_entry.
- */
- kfree(intr_entry);
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
- "INT 0x%x (bridge bit %d) replaces erased first\n",
- pcibr_int_bits, pcibr_int_bit));
- continue;
- }
- intr_list_p = &intr_list->il_next;
- if (compare_and_swap_ptr((void **) intr_list_p, NULL, intr_entry)) {
- /* we are the new second interrupt on this bit.
- */
- pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_shared = 1;
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
- "INT 0x%x (bridge bit %d) is new SECOND\n",
- pcibr_int_bits, pcibr_int_bit));
- continue;
- }
- while (1) {
- pcibr_intr_p = &intr_list->il_intr;
- if (compare_and_swap_ptr((void **) pcibr_intr_p, NULL, pcibr_intr)) {
- /* an entry on list was erased,
- * and we replaced it, so we
- * don't need our intr_entry.
- */
- kfree(intr_entry);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
- "INT 0x%x (bridge bit %d) replaces erase Nth\n",
- pcibr_int_bits, pcibr_int_bit));
- break;
- }
- intr_list_p = &intr_list->il_next;
- if (compare_and_swap_ptr((void **) intr_list_p, NULL, intr_entry)) {
- /* entry appended to share list
- */
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
- "INT 0x%x (bridge bit %d) is new Nth\n",
- pcibr_int_bits, pcibr_int_bit));
- break;
- }
- /* step to next record in chain
- */
- intr_list = *intr_list_p;
- }
- }
- }
-
- hub_intr = (hub_intr_t)xtalk_intr;
- pcibr_intr->bi_irq = hub_intr->i_bit;
- pcibr_intr->bi_cpu = hub_intr->i_cpuid;
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
- "pcibr_intr_alloc complete: pcibr_intr=0x%lx\n", pcibr_intr));
- return pcibr_intr;
-}
-
-/*ARGSUSED */
-void
-pcibr_intr_free(pcibr_intr_t pcibr_intr)
-{
- unsigned pcibr_int_bits = pcibr_intr->bi_ibits;
- pcibr_soft_t pcibr_soft = pcibr_intr->bi_soft;
- unsigned pcibr_int_bit;
- pcibr_intr_list_t intr_list;
- int intr_shared;
- xtalk_intr_t *xtalk_intrp;
-
- for (pcibr_int_bit = 0; pcibr_int_bit < 8; pcibr_int_bit++) {
- if (pcibr_int_bits & (1 << pcibr_int_bit)) {
- for (intr_list =
- pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_list;
- intr_list != NULL;
- intr_list = intr_list->il_next)
- if (compare_and_swap_ptr((void **) &intr_list->il_intr,
- pcibr_intr,
- NULL)) {
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC,
- pcibr_intr->bi_dev,
- "pcibr_intr_free: cleared hdlr from bit 0x%x\n",
- pcibr_int_bit));
- }
- /* If this interrupt line is not being shared between multiple
- * devices release the xtalk interrupt resources.
- */
- intr_shared =
- pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_shared;
- xtalk_intrp = &pcibr_soft->bs_intr[pcibr_int_bit].bsi_xtalk_intr;
-
- if ((!intr_shared) && (*xtalk_intrp)) {
-
- xtalk_intr_free(*xtalk_intrp);
- *xtalk_intrp = 0;
-
- /* Clear the PCI device interrupt to bridge interrupt pin
- * mapping.
- */
- pcireg_intr_device_bit_clr(pcibr_soft,
- BRIDGE_INT_DEV_MASK(pcibr_int_bit));
- }
- }
- }
- kfree(pcibr_intr);
-}
-
-void
-pcibr_setpciint(xtalk_intr_t xtalk_intr)
-{
- iopaddr_t addr;
- xtalk_intr_vector_t vect;
- vertex_hdl_t vhdl;
- int bus_num;
- int pcibr_int_bit;
- void *bridge;
-
- addr = xtalk_intr_addr_get(xtalk_intr);
- vect = xtalk_intr_vector_get(xtalk_intr);
- vhdl = xtalk_intr_dev_get(xtalk_intr);
-
- /* bus and int_bits are stored in sfarg, bus bit3, int_bits bit2:0 */
- pcibr_int_bit = *((int *)xtalk_intr_sfarg_get(xtalk_intr)) & 0x7;
- bus_num = ((*((int *)xtalk_intr_sfarg_get(xtalk_intr)) & 0x8) >> 3);
-
- bridge = pcibr_bridge_ptr_get(vhdl, bus_num);
- pcireg_bridge_intr_addr_vect_set(bridge, pcibr_int_bit, vect);
- pcireg_bridge_intr_addr_addr_set(bridge, pcibr_int_bit, addr);
-}
-
-/*ARGSUSED */
-int
-pcibr_intr_connect(pcibr_intr_t pcibr_intr, intr_func_t intr_func, intr_arg_t intr_arg)
-{
- pcibr_soft_t pcibr_soft = pcibr_intr->bi_soft;
- unsigned pcibr_int_bits = pcibr_intr->bi_ibits;
- unsigned pcibr_int_bit;
- unsigned long s;
-
- if (pcibr_intr == NULL)
- return -1;
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_intr->bi_dev,
- "pcibr_intr_connect: intr_func=0x%lx, intr_arg=0x%lx\n",
- intr_func, intr_arg));
-
- pcibr_intr->bi_func = intr_func;
- pcibr_intr->bi_arg = intr_arg;
- *((volatile unsigned *)&pcibr_intr->bi_flags) |= PCIIO_INTR_CONNECTED;
-
- /*
- * For each PCI interrupt line requested, figure
- * out which Bridge PCI Interrupt Line it maps
- * to, and make sure there are xtalk resources
- * allocated for it.
- */
- for (pcibr_int_bit = 0; pcibr_int_bit < 8; pcibr_int_bit++)
- if (pcibr_int_bits & (1 << pcibr_int_bit)) {
- pcibr_intr_wrap_t intr_wrap;
- xtalk_intr_t xtalk_intr;
- void *int_addr;
-
- xtalk_intr = pcibr_soft->bs_intr[pcibr_int_bit].bsi_xtalk_intr;
- intr_wrap = &pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap;
-
- /*
- * If this interrupt line is being shared and the connect has
- * already been done, no need to do it again.
- */
- if (pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_connected)
- continue;
-
-
- /*
- * Use the pcibr wrapper function to handle all Bridge interrupts
- * regardless of whether the interrupt line is shared or not.
- */
- int_addr = pcireg_intr_addr_addr(pcibr_soft, pcibr_int_bit);
- pcibr_soft->bs_intr[pcibr_int_bit].bsi_int_bit =
- ((pcibr_soft->bs_busnum << 3) | pcibr_int_bit);
- xtalk_intr_connect(xtalk_intr,
- NULL,
- (intr_arg_t) intr_wrap,
- (xtalk_intr_setfunc_t) pcibr_setpciint,
- &pcibr_soft->bs_intr[pcibr_int_bit].bsi_int_bit);
-
- pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_connected = 1;
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_intr->bi_dev,
- "pcibr_setpciint: int_addr=0x%lx, *int_addr=0x%lx, "
- "pcibr_int_bit=0x%x\n", int_addr,
- pcireg_intr_addr_get(pcibr_soft, pcibr_int_bit),
- pcibr_int_bit));
- }
-
- s = pcibr_lock(pcibr_soft);
- pcireg_intr_enable_bit_set(pcibr_soft, pcibr_int_bits);
- pcireg_tflush_get(pcibr_soft);
- pcibr_unlock(pcibr_soft, s);
-
- return 0;
-}
-
-/*ARGSUSED */
-void
-pcibr_intr_disconnect(pcibr_intr_t pcibr_intr)
-{
- pcibr_soft_t pcibr_soft = pcibr_intr->bi_soft;
- unsigned pcibr_int_bits = pcibr_intr->bi_ibits;
- unsigned pcibr_int_bit;
- pcibr_intr_wrap_t intr_wrap;
- unsigned long s;
-
- /* Stop calling the function. Now.
- */
- *((volatile unsigned *)&pcibr_intr->bi_flags) &= ~PCIIO_INTR_CONNECTED;
- pcibr_intr->bi_func = 0;
- pcibr_intr->bi_arg = 0;
- /*
- * For each PCI interrupt line requested, figure
- * out which Bridge PCI Interrupt Line it maps
- * to, and disconnect the interrupt.
- */
-
- /* don't disable interrupts for lines that
- * are shared between devices.
- */
- for (pcibr_int_bit = 0; pcibr_int_bit < 8; pcibr_int_bit++)
- if ((pcibr_int_bits & (1 << pcibr_int_bit)) &&
- (pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_shared))
- pcibr_int_bits &= ~(1 << pcibr_int_bit);
- if (!pcibr_int_bits)
- return;
-
- s = pcibr_lock(pcibr_soft);
- pcireg_intr_enable_bit_clr(pcibr_soft, pcibr_int_bits);
- pcireg_tflush_get(pcibr_soft); /* wait until Bridge PIO complete */
- pcibr_unlock(pcibr_soft, s);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_intr->bi_dev,
- "pcibr_intr_disconnect: disabled int_bits=0x%x\n",
- pcibr_int_bits));
-
- for (pcibr_int_bit = 0; pcibr_int_bit < 8; pcibr_int_bit++)
- if (pcibr_int_bits & (1 << pcibr_int_bit)) {
-
- /* if the interrupt line is now shared,
- * do not disconnect it.
- */
- if (pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_shared)
- continue;
-
- xtalk_intr_disconnect(pcibr_soft->bs_intr[pcibr_int_bit].bsi_xtalk_intr);
- pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_connected = 0;
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_intr->bi_dev,
- "pcibr_intr_disconnect: disconnect int_bits=0x%x\n",
- pcibr_int_bits));
-
- /* if we are sharing the interrupt line,
- * connect us up; this closes the hole
- * where the another pcibr_intr_alloc()
- * was in progress as we disconnected.
- */
- intr_wrap = &pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap;
- if (!pcibr_soft->bs_intr[pcibr_int_bit].bsi_pcibr_intr_wrap.iw_shared)
- continue;
-
- pcibr_soft->bs_intr[pcibr_int_bit].bsi_int_bit =
- ((pcibr_soft->bs_busnum << 3) | pcibr_int_bit);
- xtalk_intr_connect(pcibr_soft->bs_intr[pcibr_int_bit].bsi_xtalk_intr,
- NULL,
- (intr_arg_t) intr_wrap,
- (xtalk_intr_setfunc_t) pcibr_setpciint,
- &pcibr_soft->bs_intr[pcibr_int_bit].bsi_int_bit);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_intr->bi_dev,
- "pcibr_intr_disconnect: now-sharing int_bits=0x%x\n",
- pcibr_int_bit));
- }
-}
-
-/*ARGSUSED */
-vertex_hdl_t
-pcibr_intr_cpu_get(pcibr_intr_t pcibr_intr)
-{
- pcibr_soft_t pcibr_soft = pcibr_intr->bi_soft;
- unsigned pcibr_int_bits = pcibr_intr->bi_ibits;
- unsigned pcibr_int_bit;
-
- for (pcibr_int_bit = 0; pcibr_int_bit < 8; pcibr_int_bit++)
- if (pcibr_int_bits & (1 << pcibr_int_bit))
- return xtalk_intr_cpu_get(pcibr_soft->bs_intr[pcibr_int_bit].bsi_xtalk_intr);
- return 0;
-}
-
-/* =====================================================================
- * INTERRUPT HANDLING
- */
-void
-pcibr_clearwidint(pcibr_soft_t pcibr_soft)
-{
- pcireg_intr_dst_set(pcibr_soft, 0);
-}
-
-
-void
-pcibr_setwidint(xtalk_intr_t intr)
-{
- xwidgetnum_t targ = xtalk_intr_target_get(intr);
- iopaddr_t addr = xtalk_intr_addr_get(intr);
- xtalk_intr_vector_t vect = xtalk_intr_vector_get(intr);
-
- pcibr_soft_t bridge = (pcibr_soft_t)xtalk_intr_sfarg_get(intr);
-
- pcireg_intr_dst_target_id_set(bridge, targ);
- pcireg_intr_dst_addr_set(bridge, addr);
- pcireg_intr_host_err_set(bridge, vect);
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/pci/pci_defs.h>
-
-
-/*
- * Identification Register Access -- Read Only 0000_0000
- */
-static uint64_t
-__pcireg_id_get(pic_t *bridge)
-{
- return bridge->p_wid_id;
-}
-
-uint64_t
-pcireg_bridge_id_get(void *ptr)
-{
- return __pcireg_id_get((pic_t *)ptr);
-}
-
-uint64_t
-pcireg_id_get(pcibr_soft_t ptr)
-{
- return __pcireg_id_get((pic_t *)ptr->bs_base);
-}
-
-
-
-/*
- * Address Bus Side Holding Register Access -- Read Only 0000_0010
- */
-uint64_t
-pcireg_bus_err_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_wid_err;
-}
-
-
-/*
- * Control Register Access -- Read/Write 0000_0020
- */
-static uint64_t
-__pcireg_control_get(pic_t *bridge)
-{
- return bridge->p_wid_control;
-}
-
-uint64_t
-pcireg_bridge_control_get(void *ptr)
-{
- return __pcireg_control_get((pic_t *)ptr);
-}
-
-uint64_t
-pcireg_control_get(pcibr_soft_t ptr)
-{
- return __pcireg_control_get((pic_t *)ptr->bs_base);
-}
-
-
-void
-pcireg_control_set(pcibr_soft_t ptr, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- /* WAR for PV 439897 & 454474. Add a readback of the control
- * register. Lock to protect against MP accesses to this
- * register along with other write-only registers (See PVs).
- * This register isnt accessed in the "hot path" so the splhi
- * shouldn't be a bottleneck
- */
-
- bridge->p_wid_control = val;
- bridge->p_wid_control; /* WAR */
-}
-
-
-void
-pcireg_control_bit_clr(pcibr_soft_t ptr, uint64_t bits)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- /* WAR for PV 439897 & 454474. Add a readback of the control
- * register. Lock to protect against MP accesses to this
- * register along with other write-only registers (See PVs).
- * This register isnt accessed in the "hot path" so the splhi
- * shouldn't be a bottleneck
- */
-
- bridge->p_wid_control &= ~bits;
- bridge->p_wid_control; /* WAR */
-}
-
-
-void
-pcireg_control_bit_set(pcibr_soft_t ptr, uint64_t bits)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- /* WAR for PV 439897 & 454474. Add a readback of the control
- * register. Lock to protect against MP accesses to this
- * register along with other write-only registers (See PVs).
- * This register isnt accessed in the "hot path" so the splhi
- * shouldn't be a bottleneck
- */
-
- bridge->p_wid_control |= bits;
- bridge->p_wid_control; /* WAR */
-}
-
-/*
- * Bus Speed (from control register); -- Read Only access 0000_0020
- * 0x00 == 33MHz, 0x01 == 66MHz, 0x10 == 100MHz, 0x11 == 133MHz
- */
-uint64_t
-pcireg_speed_get(pcibr_soft_t ptr)
-{
- uint64_t speedbits;
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- speedbits = bridge->p_wid_control & PIC_CTRL_PCI_SPEED;
- return (speedbits >> 4);
-}
-
-/*
- * Bus Mode (ie. PCIX or PCI) (from Status register); 0000_0008
- * 0x0 == PCI, 0x1 == PCI-X
- */
-uint64_t
-pcireg_mode_get(pcibr_soft_t ptr)
-{
- uint64_t pcix_active_bit;
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- pcix_active_bit = bridge->p_wid_stat & PIC_STAT_PCIX_ACTIVE;
- return (pcix_active_bit >> PIC_STAT_PCIX_ACTIVE_SHFT);
-}
-
-void
-pcireg_req_timeout_set(pcibr_soft_t ptr, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_wid_req_timeout = val;
-}
-
-/*
- * Interrupt Destination Addr Register Access -- Read/Write 0000_0038
- */
-
-void
-pcireg_intr_dst_set(pcibr_soft_t ptr, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_wid_int = val;
-}
-
-/*
- * Intr Destination Addr Reg Access (target_id) -- Read/Write 0000_0038
- */
-uint64_t
-pcireg_intr_dst_target_id_get(pcibr_soft_t ptr)
-{
- uint64_t tid_bits;
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- tid_bits = (bridge->p_wid_int & PIC_INTR_DEST_TID);
- return (tid_bits >> PIC_INTR_DEST_TID_SHFT);
-}
-
-void
-pcireg_intr_dst_target_id_set(pcibr_soft_t ptr, uint64_t target_id)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_wid_int &= ~PIC_INTR_DEST_TID;
- bridge->p_wid_int |=
- ((target_id << PIC_INTR_DEST_TID_SHFT) & PIC_INTR_DEST_TID);
-}
-
-/*
- * Intr Destination Addr Register Access (addr) -- Read/Write 0000_0038
- */
-uint64_t
-pcireg_intr_dst_addr_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_wid_int & PIC_XTALK_ADDR_MASK;
-}
-
-void
-pcireg_intr_dst_addr_set(pcibr_soft_t ptr, uint64_t addr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_wid_int &= ~PIC_XTALK_ADDR_MASK;
- bridge->p_wid_int |= (addr & PIC_XTALK_ADDR_MASK);
-}
-
-/*
- * Cmd Word Holding Bus Side Error Register Access -- Read Only 0000_0040
- */
-uint64_t
-pcireg_cmdword_err_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_wid_err_cmdword;
-}
-
-/*
- * PCI/PCIX Target Flush Register Access -- Read Only 0000_0050
- */
-uint64_t
-pcireg_tflush_get(pcibr_soft_t ptr)
-{
- uint64_t ret = 0;
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- ret = bridge->p_wid_tflush;
-
- /* Read of the Targer Flush should always return zero */
- ASSERT_ALWAYS(ret == 0);
- return ret;
-}
-
-/*
- * Cmd Word Holding Link Side Error Register Access -- Read Only 0000_0058
- */
-uint64_t
-pcireg_linkside_err_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_wid_aux_err;
-}
-
-/*
- * PCI Response Buffer Address Holding Register -- Read Only 0000_0068
- */
-uint64_t
-pcireg_resp_err_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_wid_resp;
-}
-
-/*
- * PCI Resp Buffer Address Holding Reg (Address) -- Read Only 0000_0068
- */
-uint64_t
-pcireg_resp_err_addr_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_wid_resp & PIC_RSP_BUF_ADDR;
-}
-
-/*
- * PCI Resp Buffer Address Holding Register (Buffer)-- Read Only 0000_0068
- */
-uint64_t
-pcireg_resp_err_buf_get(pcibr_soft_t ptr)
-{
- uint64_t bufnum_bits;
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bufnum_bits = (bridge->p_wid_resp_upper & PIC_RSP_BUF_NUM);
- return (bufnum_bits >> PIC_RSP_BUF_NUM_SHFT);
-}
-
-/*
- * PCI Resp Buffer Address Holding Register (Device)-- Read Only 0000_0068
- */
-uint64_t
-pcireg_resp_err_dev_get(pcibr_soft_t ptr)
-{
- uint64_t devnum_bits;
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- devnum_bits = (bridge->p_wid_resp_upper & PIC_RSP_BUF_DEV_NUM);
- return (devnum_bits >> PIC_RSP_BUF_DEV_NUM_SHFT);
-}
-
-/*
- * Address Holding Register Link Side Errors -- Read Only 0000_0078
- */
-uint64_t
-pcireg_linkside_err_addr_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_wid_addr_lkerr;
-}
-
-void
-pcireg_dirmap_wid_set(pcibr_soft_t ptr, uint64_t target)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_dir_map &= ~PIC_DIRMAP_WID;
- bridge->p_dir_map |=
- ((target << PIC_DIRMAP_WID_SHFT) & PIC_DIRMAP_WID);
-}
-
-void
-pcireg_dirmap_diroff_set(pcibr_soft_t ptr, uint64_t dir_off)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_dir_map &= ~PIC_DIRMAP_DIROFF;
- bridge->p_dir_map |= (dir_off & PIC_DIRMAP_DIROFF);
-}
-
-void
-pcireg_dirmap_add512_set(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_dir_map |= PIC_DIRMAP_ADD512;
-}
-
-void
-pcireg_dirmap_add512_clr(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_dir_map &= ~PIC_DIRMAP_ADD512;
-}
-
-/*
- * PCI Page Map Fault Address Register Access -- Read Only 0000_0090
- */
-uint64_t
-pcireg_map_fault_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_map_fault;
-}
-
-/*
- * Arbitration Register Access -- Read/Write 0000_00A0
- */
-uint64_t
-pcireg_arbitration_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_arb;
-}
-
-void
-pcireg_arbitration_bit_set(pcibr_soft_t ptr, uint64_t bits)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_arb |= bits;
-}
-
-/*
- * Internal Ram Parity Error Register Access -- Read Only 0000_00B0
- */
-uint64_t
-pcireg_parity_err_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_ate_parity_err;
-}
-
-/*
- * Type 1 Configuration Register Access -- Read/Write 0000_00C8
- */
-void
-pcireg_type1_cntr_set(pcibr_soft_t ptr, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_pci_cfg = val;
-}
-
-/*
- * PCI Bus Error Lower Addr Holding Reg Access -- Read Only 0000_00D8
- */
-uint64_t
-pcireg_pci_bus_addr_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_pci_err;
-}
-
-/*
- * PCI Bus Error Addr Holding Reg Access (Address) -- Read Only 0000_00D8
- */
-uint64_t
-pcireg_pci_bus_addr_addr_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_pci_err & PIC_XTALK_ADDR_MASK;
-}
-
-/*
- * Interrupt Status Register Access -- Read Only 0000_0100
- */
-uint64_t
-pcireg_intr_status_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_int_status;
-}
-
-/*
- * Interrupt Enable Register Access -- Read/Write 0000_0108
- */
-uint64_t
-pcireg_intr_enable_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_int_enable;
-}
-
-void
-pcireg_intr_enable_set(pcibr_soft_t ptr, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_int_enable = val;
-}
-
-void
-pcireg_intr_enable_bit_clr(pcibr_soft_t ptr, uint64_t bits)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_int_enable &= ~bits;
-}
-
-void
-pcireg_intr_enable_bit_set(pcibr_soft_t ptr, uint64_t bits)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_int_enable |= bits;
-}
-
-/*
- * Interrupt Reset Register Access -- Write Only 0000_0110
- */
-void
-pcireg_intr_reset_set(pcibr_soft_t ptr, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_int_rst_stat = val;
-}
-
-void
-pcireg_intr_mode_set(pcibr_soft_t ptr, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_int_mode = val;
-}
-
-void
-pcireg_intr_device_set(pcibr_soft_t ptr, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_int_device = val;
-}
-
-static void
-__pcireg_intr_device_bit_set(pic_t *bridge, uint64_t bits)
-{
- bridge->p_int_device |= bits;
-}
-
-void
-pcireg_bridge_intr_device_bit_set(void *ptr, uint64_t bits)
-{
- __pcireg_intr_device_bit_set((pic_t *)ptr, bits);
-}
-
-void
-pcireg_intr_device_bit_set(pcibr_soft_t ptr, uint64_t bits)
-{
- __pcireg_intr_device_bit_set((pic_t *)ptr->bs_base, bits);
-}
-
-void
-pcireg_intr_device_bit_clr(pcibr_soft_t ptr, uint64_t bits)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_int_device &= ~bits;
-}
-
-/*
- * Host Error Interrupt Field Register Access -- Read/Write 0000_0128
- */
-void
-pcireg_intr_host_err_set(pcibr_soft_t ptr, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_int_host_err = val;
-}
-
-/*
- * Interrupt Host Address Register -- Read/Write 0000_0130 - 0000_0168
- */
-uint64_t
-pcireg_intr_addr_get(pcibr_soft_t ptr, int int_n)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_int_addr[int_n];
-}
-
-static void
-__pcireg_intr_addr_set(pic_t *bridge, int int_n, uint64_t val)
-{
- bridge->p_int_addr[int_n] = val;
-}
-
-void
-pcireg_bridge_intr_addr_set(void *ptr, int int_n, uint64_t val)
-{
- __pcireg_intr_addr_set((pic_t *)ptr, int_n, val);
-}
-
-void
-pcireg_intr_addr_set(pcibr_soft_t ptr, int int_n, uint64_t val)
-{
- __pcireg_intr_addr_set((pic_t *)ptr->bs_base, int_n, val);
-}
-
-void *
-pcireg_intr_addr_addr(pcibr_soft_t ptr, int int_n)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return (void *)&(bridge->p_int_addr[int_n]);
-}
-
-static void
-__pcireg_intr_addr_vect_set(pic_t *bridge, int int_n, uint64_t vect)
-{
- bridge->p_int_addr[int_n] &= ~PIC_HOST_INTR_FLD;
- bridge->p_int_addr[int_n] |=
- ((vect << PIC_HOST_INTR_FLD_SHFT) & PIC_HOST_INTR_FLD);
-}
-
-void
-pcireg_bridge_intr_addr_vect_set(void *ptr, int int_n, uint64_t vect)
-{
- __pcireg_intr_addr_vect_set((pic_t *)ptr, int_n, vect);
-}
-
-void
-pcireg_intr_addr_vect_set(pcibr_soft_t ptr, int int_n, uint64_t vect)
-{
- __pcireg_intr_addr_vect_set((pic_t *)ptr->bs_base, int_n, vect);
-}
-
-
-
-/*
- * Intr Host Address Register (int_addr) -- Read/Write 0000_0130 - 0000_0168
- */
-static void
-__pcireg_intr_addr_addr_set(pic_t *bridge, int int_n, uint64_t addr)
-{
- bridge->p_int_addr[int_n] &= ~PIC_HOST_INTR_ADDR;
- bridge->p_int_addr[int_n] |= (addr & PIC_HOST_INTR_ADDR);
-}
-
-void
-pcireg_bridge_intr_addr_addr_set(void *ptr, int int_n, uint64_t addr)
-{
- __pcireg_intr_addr_addr_set((pic_t *)ptr, int_n, addr);
-}
-
-void
-pcireg_intr_addr_addr_set(pcibr_soft_t ptr, int int_n, uint64_t addr)
-{
- __pcireg_intr_addr_addr_set((pic_t *)ptr->bs_base, int_n, addr);
-}
-
-/*
- * Multiple Interrupt Register Access -- Read Only 0000_0178
- */
-uint64_t
-pcireg_intr_multiple_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_mult_int;
-}
-
-/*
- * Force Always Intr Register Access -- Write Only 0000_0180 - 0000_01B8
- */
-static void *
-__pcireg_force_always_addr_get(pic_t *bridge, int int_n)
-{
- return (void *)&(bridge->p_force_always[int_n]);
-}
-
-void *
-pcireg_bridge_force_always_addr_get(void *ptr, int int_n)
-{
- return __pcireg_force_always_addr_get((pic_t *)ptr, int_n);
-}
-
-void *
-pcireg_force_always_addr_get(pcibr_soft_t ptr, int int_n)
-{
- return __pcireg_force_always_addr_get((pic_t *)ptr->bs_base, int_n);
-}
-
-/*
- * Force Interrupt Register Access -- Write Only 0000_01C0 - 0000_01F8
- */
-void
-pcireg_force_intr_set(pcibr_soft_t ptr, int int_n)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_force_pin[int_n] = 1;
-}
-
-/*
- * Device(x) Register Access -- Read/Write 0000_0200 - 0000_0218
- */
-uint64_t
-pcireg_device_get(pcibr_soft_t ptr, int device)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- ASSERT_ALWAYS((device >= 0) && (device <= 3));
- return bridge->p_device[device];
-}
-
-void
-pcireg_device_set(pcibr_soft_t ptr, int device, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- ASSERT_ALWAYS((device >= 0) && (device <= 3));
- bridge->p_device[device] = val;
-}
-
-/*
- * Device(x) Write Buffer Flush Reg Access -- Read Only 0000_0240 - 0000_0258
- */
-uint64_t
-pcireg_wrb_flush_get(pcibr_soft_t ptr, int device)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
- uint64_t ret = 0;
-
- ASSERT_ALWAYS((device >= 0) && (device <= 3));
- ret = bridge->p_wr_req_buf[device];
-
- /* Read of the Write Buffer Flush should always return zero */
- ASSERT_ALWAYS(ret == 0);
- return ret;
-}
-
-/*
- * Even/Odd RRB Register Access -- Read/Write 0000_0280 - 0000_0288
- */
-uint64_t
-pcireg_rrb_get(pcibr_soft_t ptr, int even_odd)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_rrb_map[even_odd];
-}
-
-void
-pcireg_rrb_set(pcibr_soft_t ptr, int even_odd, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_rrb_map[even_odd] = val;
-}
-
-void
-pcireg_rrb_bit_set(pcibr_soft_t ptr, int even_odd, uint64_t bits)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_rrb_map[even_odd] |= bits;
-}
-
-/*
- * RRB Status Register Access -- Read Only 0000_0290
- */
-uint64_t
-pcireg_rrb_status_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_resp_status;
-}
-
-/*
- * RRB Clear Register Access -- Write Only 0000_0298
- */
-void
-pcireg_rrb_clear_set(pcibr_soft_t ptr, uint64_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- bridge->p_resp_clear = val;
-}
-
-/*
- * PCIX Bus Error Address Register Access -- Read Only 0000_0600
- */
-uint64_t
-pcireg_pcix_bus_err_addr_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_pcix_bus_err_addr;
-}
-
-/*
- * PCIX Bus Error Attribute Register Access -- Read Only 0000_0608
- */
-uint64_t
-pcireg_pcix_bus_err_attr_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_pcix_bus_err_attr;
-}
-
-/*
- * PCIX Bus Error Data Register Access -- Read Only 0000_0610
- */
-uint64_t
-pcireg_pcix_bus_err_data_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_pcix_bus_err_data;
-}
-
-/*
- * PCIX PIO Split Request Address Register Access -- Read Only 0000_0618
- */
-uint64_t
-pcireg_pcix_pio_split_addr_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_pcix_pio_split_addr;
-}
-
-/*
- * PCIX PIO Split Request Attribute Register Access -- Read Only 0000_0620
- */
-uint64_t
-pcireg_pcix_pio_split_attr_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_pcix_pio_split_attr;
-}
-
-/*
- * PCIX DMA Request Error Attribute Register Access -- Read Only 0000_0628
- */
-uint64_t
-pcireg_pcix_req_err_attr_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_pcix_dma_req_err_attr;
-}
-
-/*
- * PCIX DMA Request Error Address Register Access -- Read Only 0000_0630
- */
-uint64_t
-pcireg_pcix_req_err_addr_get(pcibr_soft_t ptr)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- return bridge->p_pcix_dma_req_err_addr;
-}
-
-/*
- * Type 0 Configuration Space Access -- Read/Write
- */
-cfg_p
-pcireg_type0_cfg_addr(pcibr_soft_t ptr, uint8_t slot, uint8_t func, int off)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- /* Type 0 Config space accesses on PIC are 1-4, not 0-3 since
- * it is a PCIX Bridge. See sys/PCI/pic.h for explanation.
- */
- slot++;
- ASSERT_ALWAYS(((int) slot >= 1) && ((int) slot <= 4));
- return &(bridge->p_type0_cfg_dev[slot].f[func].l[(off / 4)]);
-}
-
-/*
- * Type 1 Configuration Space Access -- Read/Write
- */
-cfg_p
-pcireg_type1_cfg_addr(pcibr_soft_t ptr, uint8_t func, int offset)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- /*
- * Return a config space address for the given slot/func/offset.
- * Note the returned ptr is a 32bit word (ie. cfg_p) aligned ptr
- * pointing to the 32bit word that contains the "offset" byte.
- */
- return &(bridge->p_type1_cfg.f[func].l[(offset / 4)]);
-}
-
-/*
- * Internal ATE SSRAM Access -- Read/Write
- */
-bridge_ate_t
-pcireg_int_ate_get(pcibr_soft_t ptr, int ate_index)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- ASSERT_ALWAYS((ate_index >= 0) && (ate_index <= 1024));
- return bridge->p_int_ate_ram[ate_index];
-}
-
-void
-pcireg_int_ate_set(pcibr_soft_t ptr, int ate_index, bridge_ate_t val)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- ASSERT_ALWAYS((ate_index >= 0) && (ate_index <= 1024));
- bridge->p_int_ate_ram[ate_index] = (picate_t) val;
-}
-
-bridge_ate_p
-pcireg_int_ate_addr(pcibr_soft_t ptr, int ate_index)
-{
- pic_t *bridge = (pic_t *)ptr->bs_base;
-
- ASSERT_ALWAYS((ate_index >= 0) && (ate_index <= 1024));
- return &(bridge->p_int_ate_ram[ate_index]);
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/pci/pci_defs.h>
-
-void pcibr_rrb_alloc_init(pcibr_soft_t, int, int, int);
-void pcibr_rrb_alloc_more(pcibr_soft_t, int, int, int);
-
-int pcibr_wrb_flush(vertex_hdl_t);
-int pcibr_rrb_alloc(vertex_hdl_t, int *, int *);
-int pcibr_rrb_check(vertex_hdl_t, int *, int *, int *, int *);
-int pcibr_alloc_all_rrbs(vertex_hdl_t, int, int, int, int,
- int, int, int, int, int);
-void pcibr_rrb_flush(vertex_hdl_t);
-int pcibr_slot_initial_rrb_alloc(vertex_hdl_t,pciio_slot_t);
-
-void pcibr_rrb_debug(char *, pcibr_soft_t);
-
-
-/*
- * RRB Management
- *
- * All the do_pcibr_rrb_ routines manipulate the Read Response Buffer (rrb)
- * registers within the Bridge. Two 32 registers (b_rrb_map[2] also known
- * as the b_even_resp & b_odd_resp registers) are used to allocate the 16
- * rrbs to devices. The b_even_resp register represents even num devices,
- * and b_odd_resp represent odd number devices. Each rrb is represented by
- * 4-bits within a register.
- * BRIDGE & XBRIDGE: 1 enable bit, 1 virtual channel bit, 2 device bits
- * PIC: 1 enable bit, 2 virtual channel bits, 1 device bit
- * PIC has 4 devices per bus, and 4 virtual channels (1 normal & 3 virtual)
- * per device. BRIDGE & XBRIDGE have 8 devices per bus and 2 virtual
- * channels (1 normal & 1 virtual) per device. See the BRIDGE and PIC ASIC
- * Programmers Reference guides for more information.
- */
-
-#define RRB_MASK (0xf) /* mask a single rrb within reg */
-#define RRB_SIZE (4) /* sizeof rrb within reg (bits) */
-
-#define RRB_ENABLE_BIT (0x8) /* [BRIDGE | PIC]_RRB_EN */
-#define NUM_PDEV_BITS (1)
-#define NUMBER_VCHANNELS (4)
-#define SLOT_2_PDEV(slot) ((slot) >> 1)
-#define SLOT_2_RRB_REG(slot) ((slot) & 0x1)
-
-#define RRB_VALID(rrb) (0x00010000 << (rrb))
-#define RRB_INUSE(rrb) (0x00000001 << (rrb))
-#define RRB_CLEAR(rrb) (0x00000001 << (rrb))
-
-/* validate that the slot and virtual channel are valid */
-#define VALIDATE_SLOT_n_VCHAN(s, v) \
- (((((s) != PCIIO_SLOT_NONE) && ((s) <= (pciio_slot_t)3)) && \
- (((v) >= 0) && ((v) <= 3))) ? 1 : 0)
-
-/*
- * Count how many RRBs are marked valid for the specified PCI slot
- * and virtual channel. Return the count.
- */
-static int
-do_pcibr_rrb_count_valid(pcibr_soft_t pcibr_soft,
- pciio_slot_t slot,
- int vchan)
-{
- uint64_t tmp;
- uint16_t enable_bit, vchan_bits, pdev_bits, rrb_bits;
- int rrb_index, cnt=0;
-
- if (!VALIDATE_SLOT_n_VCHAN(slot, vchan)) {
- printk(KERN_WARNING "do_pcibr_rrb_count_valid() invalid slot/vchan [%d/%d]\n", slot, vchan);
- return 0;
- }
-
- enable_bit = RRB_ENABLE_BIT;
- vchan_bits = vchan << NUM_PDEV_BITS;
- pdev_bits = SLOT_2_PDEV(slot);
- rrb_bits = enable_bit | vchan_bits | pdev_bits;
-
- tmp = pcireg_rrb_get(pcibr_soft, SLOT_2_RRB_REG(slot));
-
- for (rrb_index = 0; rrb_index < 8; rrb_index++) {
- if ((tmp & RRB_MASK) == rrb_bits)
- cnt++;
- tmp = (tmp >> RRB_SIZE);
- }
- return cnt;
-}
-
-
-/*
- * Count how many RRBs are available to be allocated to the specified
- * slot. Return the count.
- */
-static int
-do_pcibr_rrb_count_avail(pcibr_soft_t pcibr_soft,
- pciio_slot_t slot)
-{
- uint64_t tmp;
- uint16_t enable_bit;
- int rrb_index, cnt=0;
-
- if (!VALIDATE_SLOT_n_VCHAN(slot, 0)) {
- printk(KERN_WARNING "do_pcibr_rrb_count_avail() invalid slot/vchan");
- return 0;
- }
-
- enable_bit = RRB_ENABLE_BIT;
-
- tmp = pcireg_rrb_get(pcibr_soft, SLOT_2_RRB_REG(slot));
-
- for (rrb_index = 0; rrb_index < 8; rrb_index++) {
- if ((tmp & enable_bit) != enable_bit)
- cnt++;
- tmp = (tmp >> RRB_SIZE);
- }
- return cnt;
-}
-
-
-/*
- * Allocate some additional RRBs for the specified slot and the specified
- * virtual channel. Returns -1 if there were insufficient free RRBs to
- * satisfy the request, or 0 if the request was fulfilled.
- *
- * Note that if a request can be partially filled, it will be, even if
- * we return failure.
- */
-static int
-do_pcibr_rrb_alloc(pcibr_soft_t pcibr_soft,
- pciio_slot_t slot,
- int vchan,
- int more)
-{
- uint64_t reg, tmp = 0;
- uint16_t enable_bit, vchan_bits, pdev_bits, rrb_bits;
- int rrb_index;
-
- if (!VALIDATE_SLOT_n_VCHAN(slot, vchan)) {
- printk(KERN_WARNING "do_pcibr_rrb_alloc() invalid slot/vchan");
- return -1;
- }
-
- enable_bit = RRB_ENABLE_BIT;
- vchan_bits = vchan << NUM_PDEV_BITS;
- pdev_bits = SLOT_2_PDEV(slot);
- rrb_bits = enable_bit | vchan_bits | pdev_bits;
-
- reg = tmp = pcireg_rrb_get(pcibr_soft, SLOT_2_RRB_REG(slot));
-
- for (rrb_index = 0; ((rrb_index < 8) && (more > 0)); rrb_index++) {
- if ((tmp & enable_bit) != enable_bit) {
- /* clear the rrb and OR in the new rrb into 'reg' */
- reg = reg & ~(RRB_MASK << (RRB_SIZE * rrb_index));
- reg = reg | (rrb_bits << (RRB_SIZE * rrb_index));
- more--;
- }
- tmp = (tmp >> RRB_SIZE);
- }
-
- pcireg_rrb_set(pcibr_soft, SLOT_2_RRB_REG(slot), reg);
- return (more ? -1 : 0);
-}
-
-/*
- * Wait for the the specified rrb to have no outstanding XIO pkts
- * and for all data to be drained. Mark the rrb as no longer being
- * valid.
- */
-static void
-do_pcibr_rrb_clear(pcibr_soft_t pcibr_soft, int rrb)
-{
- uint64_t status;
-
- /* bridge_lock must be held; this RRB must be disabled. */
-
- /* wait until RRB has no outstanduing XIO packets. */
- status = pcireg_rrb_status_get(pcibr_soft);
- while (status & RRB_INUSE(rrb)) {
- status = pcireg_rrb_status_get(pcibr_soft);
- }
-
- /* if the RRB has data, drain it. */
- if (status & RRB_VALID(rrb)) {
- pcireg_rrb_clear_set(pcibr_soft, RRB_CLEAR(rrb));
-
- /* wait until RRB is no longer valid. */
- status = pcireg_rrb_status_get(pcibr_soft);
- while (status & RRB_VALID(rrb)) {
- status = pcireg_rrb_status_get(pcibr_soft);
- }
- }
-}
-
-
-/*
- * Release some of the RRBs that have been allocated for the specified
- * slot. Returns zero for success, or negative if it was unable to free
- * that many RRBs.
- *
- * Note that if a request can be partially fulfilled, it will be, even
- * if we return failure.
- */
-static int
-do_pcibr_rrb_free(pcibr_soft_t pcibr_soft,
- pciio_slot_t slot,
- int vchan,
- int less)
-{
- uint64_t reg, tmp = 0, clr = 0;
- uint16_t enable_bit, vchan_bits, pdev_bits, rrb_bits;
- int rrb_index;
-
- if (!VALIDATE_SLOT_n_VCHAN(slot, vchan)) {
- printk(KERN_WARNING "do_pcibr_rrb_free() invalid slot/vchan");
- return -1;
- }
-
- enable_bit = RRB_ENABLE_BIT;
- vchan_bits = vchan << NUM_PDEV_BITS;
- pdev_bits = SLOT_2_PDEV(slot);
- rrb_bits = enable_bit | vchan_bits | pdev_bits;
-
- reg = tmp = pcireg_rrb_get(pcibr_soft, SLOT_2_RRB_REG(slot));
-
- for (rrb_index = 0; ((rrb_index < 8) && (less > 0)); rrb_index++) {
- if ((tmp & RRB_MASK) == rrb_bits) {
- /*
- * the old do_pcibr_rrb_free() code only clears the enable bit
- * but I say we should clear the whole rrb (ie):
- * reg = reg & ~(RRB_MASK << (RRB_SIZE * rrb_index));
- * But to be compatible with old code we'll only clear enable.
- */
- reg = reg & ~(RRB_ENABLE_BIT << (RRB_SIZE * rrb_index));
- clr = clr | (enable_bit << (RRB_SIZE * rrb_index));
- less--;
- }
- tmp = (tmp >> RRB_SIZE);
- }
-
- pcireg_rrb_set(pcibr_soft, SLOT_2_RRB_REG(slot), reg);
-
- /* call do_pcibr_rrb_clear() for all the rrbs we've freed */
- for (rrb_index = 0; rrb_index < 8; rrb_index++) {
- int evn_odd = SLOT_2_RRB_REG(slot);
- if (clr & (enable_bit << (RRB_SIZE * rrb_index)))
- do_pcibr_rrb_clear(pcibr_soft, (2 * rrb_index) + evn_odd);
- }
-
- return (less ? -1 : 0);
-}
-
-/*
- * Flush the specified rrb by calling do_pcibr_rrb_clear(). This
- * routine is just a wrapper to make sure the rrb is disabled
- * before calling do_pcibr_rrb_clear().
- */
-static void
-do_pcibr_rrb_flush(pcibr_soft_t pcibr_soft, int rrbn)
-{
- uint64_t rrbv;
- int shft = (RRB_SIZE * (rrbn >> 1));
- uint64_t ebit = RRB_ENABLE_BIT << shft;
-
- rrbv = pcireg_rrb_get(pcibr_soft, (rrbn & 1));
- if (rrbv & ebit) {
- pcireg_rrb_set(pcibr_soft, (rrbn & 1), (rrbv & ~ebit));
- }
-
- do_pcibr_rrb_clear(pcibr_soft, rrbn);
-
- if (rrbv & ebit) {
- pcireg_rrb_set(pcibr_soft, (rrbn & 1), rrbv);
- }
-}
-
-/*
- * free all the rrbs (both the normal and virtual channels) for the
- * specified slot.
- */
-void
-do_pcibr_rrb_free_all(pcibr_soft_t pcibr_soft,
- pciio_slot_t slot)
-{
- int vchan;
- int vchan_total = NUMBER_VCHANNELS;
-
- /* pretend we own all 8 rrbs and just ignore the return value */
- for (vchan = 0; vchan < vchan_total; vchan++) {
- do_pcibr_rrb_free(pcibr_soft, slot, vchan, 8);
- pcibr_soft->bs_rrb_valid[slot][vchan] = 0;
- }
-}
-
-
-/*
- * Initialize a slot with a given number of RRBs. (this routine
- * will also give back RRBs if the slot has more than we want).
- */
-void
-pcibr_rrb_alloc_init(pcibr_soft_t pcibr_soft,
- int slot,
- int vchan,
- int init_rrbs)
-{
- int had = pcibr_soft->bs_rrb_valid[slot][vchan];
- int have = had;
- int added = 0;
-
- for (added = 0; have < init_rrbs; ++added, ++have) {
- if (pcibr_soft->bs_rrb_res[slot] > 0)
- pcibr_soft->bs_rrb_res[slot]--;
- else if (pcibr_soft->bs_rrb_avail[slot & 1] > 0)
- pcibr_soft->bs_rrb_avail[slot & 1]--;
- else
- break;
- if (do_pcibr_rrb_alloc(pcibr_soft, slot, vchan, 1) < 0)
- break;
-
- pcibr_soft->bs_rrb_valid[slot][vchan]++;
- }
-
- /* Free any extra RRBs that the slot may have allocated to it */
- while (have > init_rrbs) {
- pcibr_soft->bs_rrb_avail[slot & 1]++;
- pcibr_soft->bs_rrb_valid[slot][vchan]--;
- do_pcibr_rrb_free(pcibr_soft, slot, vchan, 1);
- added--;
- have--;
- }
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_soft->bs_vhdl,
- "pcibr_rrb_alloc_init: had %d, added/removed %d, "
- "(of requested %d) RRBs "
- "to slot %d, vchan %d\n", had, added, init_rrbs,
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), vchan));
-
- pcibr_rrb_debug("pcibr_rrb_alloc_init", pcibr_soft);
-}
-
-
-/*
- * Allocate more RRBs to a given slot (if the RRBs are available).
- */
-void
-pcibr_rrb_alloc_more(pcibr_soft_t pcibr_soft,
- int slot,
- int vchan,
- int more_rrbs)
-{
- int added;
-
- for (added = 0; added < more_rrbs; ++added) {
- if (pcibr_soft->bs_rrb_res[slot] > 0)
- pcibr_soft->bs_rrb_res[slot]--;
- else if (pcibr_soft->bs_rrb_avail[slot & 1] > 0)
- pcibr_soft->bs_rrb_avail[slot & 1]--;
- else
- break;
- if (do_pcibr_rrb_alloc(pcibr_soft, slot, vchan, 1) < 0)
- break;
-
- pcibr_soft->bs_rrb_valid[slot][vchan]++;
- }
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_soft->bs_vhdl,
- "pcibr_rrb_alloc_more: added %d (of %d requested) RRBs "
- "to slot %d, vchan %d\n", added, more_rrbs,
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), vchan));
-
- pcibr_rrb_debug("pcibr_rrb_alloc_more", pcibr_soft);
-}
-
-
-/*
- * Flush all the rrb's assigned to the specified connection point.
- */
-void
-pcibr_rrb_flush(vertex_hdl_t pconn_vhdl)
-{
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t)pciio_info_mfast_get(pciio_info);
- pciio_slot_t slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
-
- uint64_t tmp;
- uint16_t enable_bit, pdev_bits, rrb_bits, rrb_mask;
- int rrb_index;
- unsigned long s;
-
- enable_bit = RRB_ENABLE_BIT;
- pdev_bits = SLOT_2_PDEV(slot);
- rrb_bits = enable_bit | pdev_bits;
- rrb_mask = enable_bit | ((NUM_PDEV_BITS << 1) - 1);
-
- tmp = pcireg_rrb_get(pcibr_soft, SLOT_2_RRB_REG(slot));
-
- s = pcibr_lock(pcibr_soft);
- for (rrb_index = 0; rrb_index < 8; rrb_index++) {
- int evn_odd = SLOT_2_RRB_REG(slot);
- if ((tmp & rrb_mask) == rrb_bits)
- do_pcibr_rrb_flush(pcibr_soft, (2 * rrb_index) + evn_odd);
- tmp = (tmp >> RRB_SIZE);
- }
- pcibr_unlock(pcibr_soft, s);
-}
-
-
-/*
- * Device driver interface to flush the write buffers for a specified
- * device hanging off the bridge.
- */
-int
-pcibr_wrb_flush(vertex_hdl_t pconn_vhdl)
-{
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
- pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
-
- pcireg_wrb_flush_get(pcibr_soft, pciio_slot);
-
- return 0;
-}
-
-/*
- * Device driver interface to request RRBs for a specified device
- * hanging off a Bridge. The driver requests the total number of
- * RRBs it would like for the normal channel (vchan0) and for the
- * "virtual channel" (vchan1). The actual number allocated to each
- * channel is returned.
- *
- * If we cannot allocate at least one RRB to a channel that needs
- * at least one, return -1 (failure). Otherwise, satisfy the request
- * as best we can and return 0.
- */
-int
-pcibr_rrb_alloc(vertex_hdl_t pconn_vhdl,
- int *count_vchan0,
- int *count_vchan1)
-{
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
- pciio_slot_t pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info);
- pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
- int desired_vchan0;
- int desired_vchan1;
- int orig_vchan0;
- int orig_vchan1;
- int delta_vchan0;
- int delta_vchan1;
- int final_vchan0;
- int final_vchan1;
- int avail_rrbs;
- int res_rrbs;
- int vchan_total;
- int vchan;
- unsigned long s;
- int error;
-
- /*
- * TBD: temper request with admin info about RRB allocation,
- * and according to demand from other devices on this Bridge.
- *
- * One way of doing this would be to allocate two RRBs
- * for each device on the bus, before any drivers start
- * asking for extras. This has the weakness that one
- * driver might not give back an "extra" RRB until after
- * another driver has already failed to get one that
- * it wanted.
- */
-
- s = pcibr_lock(pcibr_soft);
-
- vchan_total = NUMBER_VCHANNELS;
-
- /* Save the boot-time RRB configuration for this slot */
- if (pcibr_soft->bs_rrb_valid_dflt[pciio_slot][VCHAN0] < 0) {
- for (vchan = 0; vchan < vchan_total; vchan++)
- pcibr_soft->bs_rrb_valid_dflt[pciio_slot][vchan] =
- pcibr_soft->bs_rrb_valid[pciio_slot][vchan];
- pcibr_soft->bs_rrb_res_dflt[pciio_slot] =
- pcibr_soft->bs_rrb_res[pciio_slot];
-
- }
-
- /* How many RRBs do we own? */
- orig_vchan0 = pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN0];
- orig_vchan1 = pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN1];
-
- /* How many RRBs do we want? */
- desired_vchan0 = count_vchan0 ? *count_vchan0 : orig_vchan0;
- desired_vchan1 = count_vchan1 ? *count_vchan1 : orig_vchan1;
-
- /* How many RRBs are free? */
- avail_rrbs = pcibr_soft->bs_rrb_avail[pciio_slot & 1]
- + pcibr_soft->bs_rrb_res[pciio_slot];
-
- /* Figure desired deltas */
- delta_vchan0 = desired_vchan0 - orig_vchan0;
- delta_vchan1 = desired_vchan1 - orig_vchan1;
-
- /* Trim back deltas to something
- * that we can actually meet, by
- * decreasing the ending allocation
- * for whichever channel wants
- * more RRBs. If both want the same
- * number, cut the second channel.
- * NOTE: do not change the allocation for
- * a channel that was passed as NULL.
- */
- while ((delta_vchan0 + delta_vchan1) > avail_rrbs) {
- if (count_vchan0 &&
- (!count_vchan1 ||
- ((orig_vchan0 + delta_vchan0) >
- (orig_vchan1 + delta_vchan1))))
- delta_vchan0--;
- else
- delta_vchan1--;
- }
-
- /* Figure final RRB allocations
- */
- final_vchan0 = orig_vchan0 + delta_vchan0;
- final_vchan1 = orig_vchan1 + delta_vchan1;
-
- /* If either channel wants RRBs but our actions
- * would leave it with none, declare an error,
- * but DO NOT change any RRB allocations.
- */
- if ((desired_vchan0 && !final_vchan0) ||
- (desired_vchan1 && !final_vchan1)) {
-
- error = -1;
-
- } else {
-
- /* Commit the allocations: free, then alloc.
- */
- if (delta_vchan0 < 0)
- do_pcibr_rrb_free(pcibr_soft, pciio_slot, VCHAN0, -delta_vchan0);
- if (delta_vchan1 < 0)
- do_pcibr_rrb_free(pcibr_soft, pciio_slot, VCHAN1, -delta_vchan1);
-
- if (delta_vchan0 > 0)
- do_pcibr_rrb_alloc(pcibr_soft, pciio_slot, VCHAN0, delta_vchan0);
- if (delta_vchan1 > 0)
- do_pcibr_rrb_alloc(pcibr_soft, pciio_slot, VCHAN1, delta_vchan1);
-
- /* Return final values to caller.
- */
- if (count_vchan0)
- *count_vchan0 = final_vchan0;
- if (count_vchan1)
- *count_vchan1 = final_vchan1;
-
- /* prevent automatic changes to this slot's RRBs
- */
- pcibr_soft->bs_rrb_fixed |= 1 << pciio_slot;
-
- /* Track the actual allocations, release
- * any further reservations, and update the
- * number of available RRBs.
- */
-
- pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN0] = final_vchan0;
- pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN1] = final_vchan1;
- pcibr_soft->bs_rrb_avail[pciio_slot & 1] =
- pcibr_soft->bs_rrb_avail[pciio_slot & 1]
- + pcibr_soft->bs_rrb_res[pciio_slot]
- - delta_vchan0
- - delta_vchan1;
- pcibr_soft->bs_rrb_res[pciio_slot] = 0;
-
- /*
- * Reserve enough RRBs so this slot's RRB configuration can be
- * reset to its boot-time default following a hot-plug shut-down
- */
- res_rrbs = (pcibr_soft->bs_rrb_res_dflt[pciio_slot] -
- pcibr_soft->bs_rrb_res[pciio_slot]);
- for (vchan = 0; vchan < vchan_total; vchan++) {
- res_rrbs += (pcibr_soft->bs_rrb_valid_dflt[pciio_slot][vchan] -
- pcibr_soft->bs_rrb_valid[pciio_slot][vchan]);
- }
-
- if (res_rrbs > 0) {
- pcibr_soft->bs_rrb_res[pciio_slot] = res_rrbs;
- pcibr_soft->bs_rrb_avail[pciio_slot & 1] =
- pcibr_soft->bs_rrb_avail[pciio_slot & 1]
- - res_rrbs;
- }
-
- pcibr_rrb_debug("pcibr_rrb_alloc", pcibr_soft);
-
- error = 0;
- }
-
- pcibr_unlock(pcibr_soft, s);
-
- return error;
-}
-
-/*
- * Device driver interface to check the current state
- * of the RRB allocations.
- *
- * pconn_vhdl is your PCI connection point (specifies which
- * PCI bus and which slot).
- *
- * count_vchan0 points to where to return the number of RRBs
- * assigned to the primary DMA channel, used by all DMA
- * that does not explicitly ask for the alternate virtual
- * channel.
- *
- * count_vchan1 points to where to return the number of RRBs
- * assigned to the secondary DMA channel, used when
- * PCIBR_VCHAN1 and PCIIO_DMA_A64 are specified.
- *
- * count_reserved points to where to return the number of RRBs
- * that have been automatically reserved for your device at
- * startup, but which have not been assigned to a
- * channel. RRBs must be assigned to a channel to be used;
- * this can be done either with an explicit pcibr_rrb_alloc
- * call, or automatically by the infrastructure when a DMA
- * translation is constructed. Any call to pcibr_rrb_alloc
- * will release any unassigned reserved RRBs back to the
- * free pool.
- *
- * count_pool points to where to return the number of RRBs
- * that are currently unassigned and unreserved. This
- * number can (and will) change as other drivers make calls
- * to pcibr_rrb_alloc, or automatically allocate RRBs for
- * DMA beyond their initial reservation.
- *
- * NULL may be passed for any of the return value pointers
- * the caller is not interested in.
- *
- * The return value is "0" if all went well, or "-1" if
- * there is a problem. Additionally, if the wrong vertex
- * is passed in, one of the subsidiary support functions
- * could panic with a "bad pciio fingerprint."
- */
-
-int
-pcibr_rrb_check(vertex_hdl_t pconn_vhdl,
- int *count_vchan0,
- int *count_vchan1,
- int *count_reserved,
- int *count_pool)
-{
- pciio_info_t pciio_info;
- pciio_slot_t pciio_slot;
- pcibr_soft_t pcibr_soft;
- unsigned long s;
- int error = -1;
-
- if ((pciio_info = pciio_info_get(pconn_vhdl)) &&
- (pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info)) &&
- ((pciio_slot = PCIBR_INFO_SLOT_GET_INT(pciio_info)) < PCIBR_NUM_SLOTS(pcibr_soft))) {
-
- s = pcibr_lock(pcibr_soft);
-
- if (count_vchan0)
- *count_vchan0 =
- pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN0];
-
- if (count_vchan1)
- *count_vchan1 =
- pcibr_soft->bs_rrb_valid[pciio_slot][VCHAN1];
-
- if (count_reserved)
- *count_reserved =
- pcibr_soft->bs_rrb_res[pciio_slot];
-
- if (count_pool)
- *count_pool =
- pcibr_soft->bs_rrb_avail[pciio_slot & 1];
-
- error = 0;
-
- pcibr_unlock(pcibr_soft, s);
- }
- return error;
-}
-
-/*
- * pcibr_slot_initial_rrb_alloc
- * Allocate a default number of rrbs for this slot on
- * the two channels. This is dictated by the rrb allocation
- * strategy routine defined per platform.
- */
-
-int
-pcibr_slot_initial_rrb_alloc(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot)
-{
- pcibr_soft_t pcibr_soft;
- pcibr_info_h pcibr_infoh;
- pcibr_info_t pcibr_info;
- int vchan_total;
- int vchan;
- int chan[4];
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
-
- if (!pcibr_soft)
- return -EINVAL;
-
- if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return -EINVAL;
-
- /* How many RRBs are on this slot? */
- vchan_total = NUMBER_VCHANNELS;
- for (vchan = 0; vchan < vchan_total; vchan++)
- chan[vchan] = do_pcibr_rrb_count_valid(pcibr_soft, slot, vchan);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_vhdl,
- "pcibr_slot_initial_rrb_alloc: slot %d started with %d+%d+%d+%d\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot),
- chan[VCHAN0], chan[VCHAN1], chan[VCHAN2], chan[VCHAN3]));
-
- /* Do we really need any?
- */
- pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos;
- pcibr_info = pcibr_infoh[0];
- /*
- * PIC BRINGUP WAR (PV# 856866, 859504, 861476, 861478):
- * Don't free RRBs we allocated to device[2|3]--vchan3 as
- * a WAR to those PVs mentioned above. In pcibr_attach2
- * we allocate RRB0,8,1,9 to device[2|3]--vchan3.
- */
- if (PCIBR_WAR_ENABLED(PV856866, pcibr_soft) &&
- (slot == 2 || slot == 3) &&
- (pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE) &&
- !pcibr_soft->bs_slot[slot].has_host) {
-
- for (vchan = 0; vchan < 2; vchan++) {
- do_pcibr_rrb_free(pcibr_soft, slot, vchan, 8);
- pcibr_soft->bs_rrb_valid[slot][vchan] = 0;
- }
-
- pcibr_soft->bs_rrb_valid[slot][3] = chan[3];
-
- return -ENODEV;
- }
-
- if ((pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE) &&
- !pcibr_soft->bs_slot[slot].has_host) {
- do_pcibr_rrb_free_all(pcibr_soft, slot);
-
- /* Reserve RRBs for this empty slot for hot-plug */
- for (vchan = 0; vchan < vchan_total; vchan++)
- pcibr_soft->bs_rrb_valid[slot][vchan] = 0;
-
- return -ENODEV;
- }
-
- for (vchan = 0; vchan < vchan_total; vchan++)
- pcibr_soft->bs_rrb_valid[slot][vchan] = chan[vchan];
-
- return 0;
-}
-
-
-/*
- * pcibr_initial_rrb
- * Assign an equal total number of RRBs to all candidate slots,
- * where the total is the sum of the number of RRBs assigned to
- * the normal channel, the number of RRBs assigned to the virtual
- * channels, and the number of RRBs assigned as reserved.
- *
- * A candidate slot is any existing (populated or empty) slot.
- * Empty SN1 slots need RRBs to support hot-plug operations.
- */
-
-int
-pcibr_initial_rrb(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t first, pciio_slot_t last)
-{
- pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- pciio_slot_t slot;
- int rrb_total;
- int vchan_total;
- int vchan;
- int have[2][3];
- int res[2];
- int eo;
-
- have[0][0] = have[0][1] = have[0][2] = 0;
- have[1][0] = have[1][1] = have[1][2] = 0;
- res[0] = res[1] = 0;
-
- vchan_total = NUMBER_VCHANNELS;
-
- for (slot = pcibr_soft->bs_min_slot;
- slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) {
- /* Initial RRB management; give back RRBs in all non-existent slots */
- pcibr_slot_initial_rrb_alloc(pcibr_vhdl, slot);
-
- /* Base calculations only on existing slots */
- if ((slot >= first) && (slot <= last)) {
- rrb_total = 0;
- for (vchan = 0; vchan < vchan_total; vchan++)
- rrb_total += pcibr_soft->bs_rrb_valid[slot][vchan];
-
- if (rrb_total < 3)
- have[slot & 1][rrb_total]++;
- }
- }
-
- /* Initialize even/odd slot available RRB counts */
- pcibr_soft->bs_rrb_avail[0] = do_pcibr_rrb_count_avail(pcibr_soft, 0);
- pcibr_soft->bs_rrb_avail[1] = do_pcibr_rrb_count_avail(pcibr_soft, 1);
-
- /*
- * Calculate reserved RRBs for slots based on current RRB usage
- */
- for (eo = 0; eo < 2; eo++) {
- if ((3 * have[eo][0] + 2 * have[eo][1] + have[eo][2]) <= pcibr_soft->bs_rrb_avail[eo])
- res[eo] = 3;
- else if ((2 * have[eo][0] + have[eo][1]) <= pcibr_soft->bs_rrb_avail[eo])
- res[eo] = 2;
- else if (have[eo][0] <= pcibr_soft->bs_rrb_avail[eo])
- res[eo] = 1;
- else
- res[eo] = 0;
-
- }
-
- /* Assign reserved RRBs to existing slots */
- for (slot = first; slot <= last; ++slot) {
- int r;
-
- if (pcibr_soft->bs_unused_slot & (1 << slot))
- continue;
-
- rrb_total = 0;
- for (vchan = 0; vchan < vchan_total; vchan++)
- rrb_total += pcibr_soft->bs_rrb_valid[slot][vchan];
-
- r = res[slot & 1] - (rrb_total);
-
- if (r > 0) {
- pcibr_soft->bs_rrb_res[slot] = r;
- pcibr_soft->bs_rrb_avail[slot & 1] -= r;
- }
- }
-
- pcibr_rrb_debug("pcibr_initial_rrb", pcibr_soft);
-
- return 0;
-
-}
-
-/*
- * Dump the pcibr_soft_t RRB state variable
- */
-void
-pcibr_rrb_debug(char *calling_func, pcibr_soft_t pcibr_soft)
-{
- pciio_slot_t slot;
-
- if (pcibr_debug_mask & PCIBR_DEBUG_RRB) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_soft->bs_vhdl,
- "%s: rrbs available, even=%d, odd=%d\n", calling_func,
- pcibr_soft->bs_rrb_avail[0], pcibr_soft->bs_rrb_avail[1]));
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_soft->bs_vhdl,
- "\tslot\tvchan0\tvchan1\tvchan2\tvchan3\treserved\n"));
-
- for (slot=0; slot < PCIBR_NUM_SLOTS(pcibr_soft); slot++) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RRB, pcibr_soft->bs_vhdl,
- "\t %d\t %d\t %d\t %d\t %d\t %d\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot),
- 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN0],
- 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN1],
- 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN2],
- 0xFFF & pcibr_soft->bs_rrb_valid[slot][VCHAN3],
- pcibr_soft->bs_rrb_res[slot]));
- }
- }
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/uaccess.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/pci/pci_defs.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/sn_sal.h>
-
-extern pcibr_info_t pcibr_info_get(vertex_hdl_t);
-extern int pcibr_widget_to_bus(vertex_hdl_t pcibr_vhdl);
-extern pcibr_info_t pcibr_device_info_new(pcibr_soft_t, pciio_slot_t, pciio_function_t, pciio_vendor_id_t, pciio_device_id_t);
-extern int pcibr_slot_initial_rrb_alloc(vertex_hdl_t,pciio_slot_t);
-extern int pcibr_pcix_rbars_calc(pcibr_soft_t);
-
-extern char *pci_space[];
-
-int pcibr_slot_info_init(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot);
-int pcibr_slot_info_free(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot);
-int pcibr_slot_addr_space_init(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot);
-int pcibr_slot_pcix_rbar_init(pcibr_soft_t pcibr_soft, pciio_slot_t slot);
-int pcibr_slot_device_init(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot);
-int pcibr_slot_guest_info_init(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot);
-int pcibr_slot_call_device_attach(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot, int drv_flags);
-int pcibr_slot_call_device_detach(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot, int drv_flags);
-int pcibr_slot_detach(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot,
- int drv_flags, char *l1_msg, int *sub_errorp);
-static int pcibr_probe_slot(pcibr_soft_t, cfg_p, unsigned int *);
-static int pcibr_probe_work(pcibr_soft_t pcibr_soft, void *addr, int len, void *valp);
-void pcibr_device_info_free(vertex_hdl_t, pciio_slot_t);
-iopaddr_t pcibr_bus_addr_alloc(pcibr_soft_t, pciio_win_info_t,
- pciio_space_t, int, int, int);
-void pcibr_bus_addr_free(pciio_win_info_t);
-cfg_p pcibr_find_capability(cfg_p, unsigned);
-extern uint64_t do_pcibr_config_get(cfg_p, unsigned, unsigned);
-void do_pcibr_config_set(cfg_p, unsigned, unsigned, uint64_t);
-int pcibr_slot_pwr(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot, int up, char *err_msg);
-
-
-/*
- * PCI-X Max Outstanding Split Transactions translation array and Max Memory
- * Read Byte Count translation array, as defined in the PCI-X Specification.
- * Section 7.2.3 & 7.2.4 of PCI-X Specification - rev 1.0
- */
-#define MAX_SPLIT_TABLE 8
-#define MAX_READCNT_TABLE 4
-int max_splittrans_to_numbuf[MAX_SPLIT_TABLE] = {1, 2, 3, 4, 8, 12, 16, 32};
-int max_readcount_to_bufsize[MAX_READCNT_TABLE] = {512, 1024, 2048, 4096 };
-
-#ifdef CONFIG_HOTPLUG_PCI_SGI
-
-/*
- * PCI slot manipulation errors from the system controller, and their
- * associated descriptions
- */
-#define SYSCTL_REQERR_BASE (-106000)
-#define SYSCTL_PCI_ERROR_BASE (SYSCTL_REQERR_BASE - 100)
-#define SYSCTL_PCIX_ERROR_BASE (SYSCTL_REQERR_BASE - 3000)
-
-struct sysctl_pci_error_s {
-
- int error;
- char *msg;
-
-} sysctl_pci_errors[] = {
-
-#define SYSCTL_PCI_UNINITIALIZED (SYSCTL_PCI_ERROR_BASE - 0)
- { SYSCTL_PCI_UNINITIALIZED, "module not initialized" },
-
-#define SYSCTL_PCI_UNSUPPORTED_BUS (SYSCTL_PCI_ERROR_BASE - 1)
- { SYSCTL_PCI_UNSUPPORTED_BUS, "unsupported bus" },
-
-#define SYSCTL_PCI_UNSUPPORTED_SLOT (SYSCTL_PCI_ERROR_BASE - 2)
- { SYSCTL_PCI_UNSUPPORTED_SLOT, "unsupported slot" },
-
-#define SYSCTL_PCI_POWER_NOT_OKAY (SYSCTL_PCI_ERROR_BASE - 3)
- { SYSCTL_PCI_POWER_NOT_OKAY, "slot power not okay" },
-
-#define SYSCTL_PCI_CARD_NOT_PRESENT (SYSCTL_PCI_ERROR_BASE - 4)
- { SYSCTL_PCI_CARD_NOT_PRESENT, "card not present" },
-
-#define SYSCTL_PCI_POWER_LIMIT (SYSCTL_PCI_ERROR_BASE - 5)
- { SYSCTL_PCI_POWER_LIMIT, "power limit reached - some cards not powered up" },
-
-#define SYSCTL_PCI_33MHZ_ON_66MHZ (SYSCTL_PCI_ERROR_BASE - 6)
- { SYSCTL_PCI_33MHZ_ON_66MHZ, "cannot add a 33 MHz card to an active 66 MHz bus" },
-
-#define SYSCTL_PCI_INVALID_ORDER (SYSCTL_PCI_ERROR_BASE - 7)
- { SYSCTL_PCI_INVALID_ORDER, "invalid reset order" },
-
-#define SYSCTL_PCI_DOWN_33MHZ (SYSCTL_PCI_ERROR_BASE - 8)
- { SYSCTL_PCI_DOWN_33MHZ, "cannot power down a 33 MHz card on an active bus" },
-
-#define SYSCTL_PCI_RESET_33MHZ (SYSCTL_PCI_ERROR_BASE - 9)
- { SYSCTL_PCI_RESET_33MHZ, "cannot reset a 33 MHz card on an active bus" },
-
-#define SYSCTL_PCI_SLOT_NOT_UP (SYSCTL_PCI_ERROR_BASE - 10)
- { SYSCTL_PCI_SLOT_NOT_UP, "cannot reset a slot that is not powered up" },
-
-#define SYSCTL_PCIX_UNINITIALIZED (SYSCTL_PCIX_ERROR_BASE - 0)
- { SYSCTL_PCIX_UNINITIALIZED, "module not initialized" },
-
-#define SYSCTL_PCIX_UNSUPPORTED_BUS (SYSCTL_PCIX_ERROR_BASE - 1)
- { SYSCTL_PCIX_UNSUPPORTED_BUS, "unsupported bus" },
-
-#define SYSCTL_PCIX_UNSUPPORTED_SLOT (SYSCTL_PCIX_ERROR_BASE - 2)
- { SYSCTL_PCIX_UNSUPPORTED_SLOT, "unsupported slot" },
-
-#define SYSCTL_PCIX_POWER_NOT_OKAY (SYSCTL_PCIX_ERROR_BASE - 3)
- { SYSCTL_PCIX_POWER_NOT_OKAY, "slot power not okay" },
-
-#define SYSCTL_PCIX_CARD_NOT_PRESENT (SYSCTL_PCIX_ERROR_BASE - 4)
- { SYSCTL_PCIX_CARD_NOT_PRESENT, "card not present" },
-
-#define SYSCTL_PCIX_POWER_LIMIT (SYSCTL_PCIX_ERROR_BASE - 5)
- { SYSCTL_PCIX_POWER_LIMIT, "power limit reached - some cards not powered up" },
-
-#define SYSCTL_PCIX_33MHZ_ON_66MHZ (SYSCTL_PCIX_ERROR_BASE - 6)
- { SYSCTL_PCIX_33MHZ_ON_66MHZ, "cannot add a 33 MHz card to an active 66 MHz bus" },
-
-#define SYSCTL_PCIX_PCI_ON_PCIX (SYSCTL_PCIX_ERROR_BASE - 7)
- { SYSCTL_PCIX_PCI_ON_PCIX, "cannot add a PCI card to an active PCIX bus" },
-
-#define SYSCTL_PCIX_ANYTHING_ON_133MHZ (SYSCTL_PCIX_ERROR_BASE - 8)
- { SYSCTL_PCIX_ANYTHING_ON_133MHZ, "cannot add any card to an active 133MHz PCIX bus" },
-
-#define SYSCTL_PCIX_X66MHZ_ON_X100MHZ (SYSCTL_PCIX_ERROR_BASE - 9)
- { SYSCTL_PCIX_X66MHZ_ON_X100MHZ, "cannot add a PCIX 66MHz card to an active 100MHz PCIX bus" },
-
-#define SYSCTL_PCIX_INVALID_ORDER (SYSCTL_PCIX_ERROR_BASE - 10)
- { SYSCTL_PCIX_INVALID_ORDER, "invalid reset order" },
-
-#define SYSCTL_PCIX_DOWN_33MHZ (SYSCTL_PCIX_ERROR_BASE - 11)
- { SYSCTL_PCIX_DOWN_33MHZ, "cannot power down a 33 MHz card on an active bus" },
-
-#define SYSCTL_PCIX_RESET_33MHZ (SYSCTL_PCIX_ERROR_BASE - 12)
- { SYSCTL_PCIX_RESET_33MHZ, "cannot reset a 33 MHz card on an active bus" },
-
-#define SYSCTL_PCIX_SLOT_NOT_UP (SYSCTL_PCIX_ERROR_BASE - 13)
- { SYSCTL_PCIX_SLOT_NOT_UP, "cannot reset a slot that is not powered up" },
-
-#define SYSCTL_PCIX_INVALID_BUS_SETTING (SYSCTL_PCIX_ERROR_BASE - 14)
- { SYSCTL_PCIX_INVALID_BUS_SETTING, "invalid bus type/speed selection (PCIX<66MHz, PCI>66MHz)" },
-
-#define SYSCTL_PCIX_INVALID_DEPENDENT_SLOT (SYSCTL_PCIX_ERROR_BASE - 15)
- { SYSCTL_PCIX_INVALID_DEPENDENT_SLOT, "invalid dependent slot in PCI slot configuration" },
-
-#define SYSCTL_PCIX_SHARED_IDSELECT (SYSCTL_PCIX_ERROR_BASE - 16)
- { SYSCTL_PCIX_SHARED_IDSELECT, "cannot enable two slots sharing the same IDSELECT" },
-
-#define SYSCTL_PCIX_SLOT_DISABLED (SYSCTL_PCIX_ERROR_BASE - 17)
- { SYSCTL_PCIX_SLOT_DISABLED, "slot is disabled" },
-
-}; /* end sysctl_pci_errors[] */
-
-/*
- * look up an error message for PCI operations that fail
- */
-static void
-sysctl_pci_error_lookup(int error, char *err_msg)
-{
- int i;
- struct sysctl_pci_error_s *e = sysctl_pci_errors;
-
- for (i = 0;
- i < (sizeof(sysctl_pci_errors) / sizeof(*e));
- i++, e++ )
- {
- if (e->error == error)
- {
- strcpy(err_msg, e->msg);
- return;
- }
- }
-
- sprintf(err_msg, "unrecognized PCI error type");
-}
-
-/*
- * pcibr_slot_attach
- * This is a place holder routine to keep track of all the
- * slot-specific initialization that needs to be done.
- * This is usually called when we want to initialize a new
- * PCI card on the bus.
- */
-int
-pcibr_slot_attach(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot,
- int drv_flags,
- char *l1_msg,
- int *sub_errorp)
-{
- pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- int error;
-
- if (!(pcibr_soft->bs_slot[slot].slot_status & PCI_SLOT_POWER_ON)) {
- uint64_t speed;
- uint64_t mode;
-
- /* Power-up the slot */
- error = pcibr_slot_pwr(pcibr_vhdl, slot, PCI_REQ_SLOT_POWER_ON, l1_msg);
-
- if (error) {
- if (sub_errorp)
- *sub_errorp = error;
- return(PCI_L1_ERR);
- } else {
- pcibr_soft->bs_slot[slot].slot_status &= ~PCI_SLOT_POWER_MASK;
- pcibr_soft->bs_slot[slot].slot_status |= PCI_SLOT_POWER_ON;
- }
-
- /* The speed/mode of the bus may have changed due to the hotplug */
- speed = pcireg_speed_get(pcibr_soft);
- mode = pcireg_mode_get(pcibr_soft);
- pcibr_soft->bs_bridge_mode = ((speed << 1) | mode);
-
- /*
- * Allow cards like the Alteon Gigabit Ethernet Adapter to complete
- * on-card initialization following the slot reset
- */
- set_current_state (TASK_INTERRUPTIBLE);
- schedule_timeout (HZ);
-
- /* Find out what is out there */
- error = pcibr_slot_info_init(pcibr_vhdl, slot);
-
- if (error) {
- if (sub_errorp)
- *sub_errorp = error;
- return(PCI_SLOT_INFO_INIT_ERR);
- }
-
- /* Set up the address space for this slot in the PCI land */
-
- error = pcibr_slot_addr_space_init(pcibr_vhdl, slot);
-
- if (error) {
- if (sub_errorp)
- *sub_errorp = error;
- return(PCI_SLOT_ADDR_INIT_ERR);
- }
-
- /* Allocate the PCI-X Read Buffer Attribute Registers (RBARs)*/
- if (IS_PCIX(pcibr_soft)) {
- int tmp_slot;
-
- /* Recalculate the RBARs for all the devices on the bus. Only
- * return an error if we error for the given 'slot'
- */
- pcibr_soft->bs_pcix_rbar_inuse = 0;
- pcibr_soft->bs_pcix_rbar_avail = NUM_RBAR;
- pcibr_soft->bs_pcix_rbar_percent_allowed =
- pcibr_pcix_rbars_calc(pcibr_soft);
- for (tmp_slot = pcibr_soft->bs_min_slot;
- tmp_slot < PCIBR_NUM_SLOTS(pcibr_soft); ++tmp_slot) {
- if (tmp_slot == slot)
- continue; /* skip this 'slot', we do it below */
- (void)pcibr_slot_pcix_rbar_init(pcibr_soft, tmp_slot);
- }
-
- error = pcibr_slot_pcix_rbar_init(pcibr_soft, slot);
- if (error) {
- if (sub_errorp)
- *sub_errorp = error;
- return(PCI_SLOT_RBAR_ALLOC_ERR);
- }
- }
-
- /* Setup the device register */
- error = pcibr_slot_device_init(pcibr_vhdl, slot);
-
- if (error) {
- if (sub_errorp)
- *sub_errorp = error;
- return(PCI_SLOT_DEV_INIT_ERR);
- }
-
- /* Setup host/guest relations */
- error = pcibr_slot_guest_info_init(pcibr_vhdl, slot);
-
- if (error) {
- if (sub_errorp)
- *sub_errorp = error;
- return(PCI_SLOT_GUEST_INIT_ERR);
- }
-
- /* Initial RRB management */
- error = pcibr_slot_initial_rrb_alloc(pcibr_vhdl, slot);
-
- if (error) {
- if (sub_errorp)
- *sub_errorp = error;
- return(PCI_SLOT_RRB_ALLOC_ERR);
- }
-
- }
-
- /* Call the device attach */
- error = pcibr_slot_call_device_attach(pcibr_vhdl, slot, drv_flags);
-
- if (error) {
- if (sub_errorp)
- *sub_errorp = error;
- if (error == EUNATCH)
- return(PCI_NO_DRIVER);
- else
- return(PCI_SLOT_DRV_ATTACH_ERR);
- }
-
- return(0);
-}
-
-/*
- * pcibr_slot_enable
- * Enable the PCI slot for a hot-plug insert.
- */
-int
-pcibr_slot_enable(vertex_hdl_t pcibr_vhdl, struct pcibr_slot_enable_req_s *req_p)
-{
- pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- pciio_slot_t slot = req_p->req_device;
- int error = 0;
-
- /* Make sure that we are dealing with a bridge device vertex */
- if (!pcibr_soft) {
- return(PCI_NOT_A_BRIDGE);
- }
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HOTPLUG, pcibr_vhdl,
- "pcibr_slot_enable: pcibr_soft=0x%lx, slot=%d, req_p=0x%lx\n",
- pcibr_soft, slot, req_p));
-
- /* Check for the valid slot */
- if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return(PCI_NOT_A_SLOT);
-
- if (pcibr_soft->bs_slot[slot].slot_status & PCI_SLOT_ENABLE_CMPLT) {
- error = PCI_SLOT_ALREADY_UP;
- goto enable_unlock;
- }
-
- error = pcibr_slot_attach(pcibr_vhdl, slot, 0,
- req_p->req_resp.resp_l1_msg,
- &req_p->req_resp.resp_sub_errno);
-
- req_p->req_resp.resp_l1_msg[PCI_L1_QSIZE] = '\0';
-
- enable_unlock:
-
- return(error);
-}
-
-/*
- * pcibr_slot_disable
- * Disable the PCI slot for a hot-plug removal.
- */
-int
-pcibr_slot_disable(vertex_hdl_t pcibr_vhdl, struct pcibr_slot_disable_req_s *req_p)
-{
- pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- pciio_slot_t slot = req_p->req_device;
- int error = 0;
- pciio_slot_t tmp_slot;
-
- /* Make sure that we are dealing with a bridge device vertex */
- if (!pcibr_soft) {
- return(PCI_NOT_A_BRIDGE);
- }
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HOTPLUG, pcibr_vhdl,
- "pcibr_slot_disable: pcibr_soft=0x%lx, slot=%d, req_p=0x%lx\n",
- pcibr_soft, slot, req_p));
-
- /* Check for valid slot */
- if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return(PCI_NOT_A_SLOT);
-
- if ((pcibr_soft->bs_slot[slot].slot_status & PCI_SLOT_DISABLE_CMPLT) ||
- ((pcibr_soft->bs_slot[slot].slot_status & PCI_SLOT_STATUS_MASK) == 0)) {
- error = PCI_SLOT_ALREADY_DOWN;
- /*
- * RJR - Should we invoke an L1 slot power-down command just in case
- * a previous shut-down failed to power-down the slot?
- */
- goto disable_unlock;
- }
-
- /* Do not allow the last 33 MHz card to be removed */
- if (IS_33MHZ(pcibr_soft)) {
- for (tmp_slot = pcibr_soft->bs_first_slot;
- tmp_slot <= pcibr_soft->bs_last_slot; tmp_slot++)
- if (tmp_slot != slot)
- if (pcibr_soft->bs_slot[tmp_slot].slot_status & PCI_SLOT_POWER_ON) {
- error++;
- break;
- }
- if (!error) {
- error = PCI_EMPTY_33MHZ;
- goto disable_unlock;
- }
- }
-
- if (req_p->req_action == PCI_REQ_SLOT_ELIGIBLE)
- return(0);
-
- error = pcibr_slot_detach(pcibr_vhdl, slot, 1,
- req_p->req_resp.resp_l1_msg,
- &req_p->req_resp.resp_sub_errno);
-
- req_p->req_resp.resp_l1_msg[PCI_L1_QSIZE] = '\0';
-
- disable_unlock:
-
- return(error);
-}
-
-/*
- * pcibr_slot_pwr
- * Power-up or power-down a PCI slot. This routines makes calls to
- * the L1 system controller driver which requires "external" slot#.
- */
-int
-pcibr_slot_pwr(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot,
- int up,
- char *err_msg)
-{
- pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- nasid_t nasid;
- u64 connection_type;
- int rv;
-
- nasid = NASID_GET(pcibr_soft->bs_base);
- connection_type = SAL_SYSCTL_IO_XTALK;
-
- rv = (int) ia64_sn_sysctl_iobrick_pci_op
- (nasid,
- connection_type,
- (u64) pcibr_widget_to_bus(pcibr_vhdl),
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot),
- (up ? SAL_SYSCTL_PCI_POWER_UP : SAL_SYSCTL_PCI_POWER_DOWN));
-
- if (!rv) {
- /* everything's okay; no error message */
- *err_msg = '\0';
- }
- else {
- /* there was a problem; look up an appropriate error message */
- sysctl_pci_error_lookup(rv, err_msg);
- }
- return rv;
-}
-
-#endif /* CONFIG_HOTPLUG_PCI_SGI */
-
-/*
- * pcibr_slot_info_init
- * Probe for this slot and see if it is populated.
- * If it is populated initialize the generic PCI infrastructural
- * information associated with this particular PCI device.
- */
-int
-pcibr_slot_info_init(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot)
-{
- pcibr_soft_t pcibr_soft;
- pcibr_info_h pcibr_infoh;
- pcibr_info_t pcibr_info;
- cfg_p cfgw;
- unsigned idword;
- unsigned pfail;
- unsigned idwords[8];
- pciio_vendor_id_t vendor;
- pciio_device_id_t device;
- unsigned htype;
- unsigned lt_time;
- int nbars;
- cfg_p wptr;
- cfg_p pcix_cap;
- int win;
- pciio_space_t space;
- int nfunc;
- pciio_function_t rfunc;
- int func;
- vertex_hdl_t conn_vhdl;
- pcibr_soft_slot_t slotp;
- uint64_t device_reg;
-
- /* Get the basic software information required to proceed */
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- if (!pcibr_soft)
- return -EINVAL;
-
- if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return -EINVAL;
-
- /* If we have a host slot (eg:- IOC3 has 2 PCI slots and the initialization
- * is done by the host slot then we are done.
- */
- if (pcibr_soft->bs_slot[slot].has_host) {
- return 0;
- }
-
- /* Try to read the device-id/vendor-id from the config space */
- cfgw = pcibr_slot_config_addr(pcibr_soft, slot, 0);
-
- if (pcibr_probe_slot(pcibr_soft, cfgw, &idword))
- return -ENODEV;
-
- slotp = &pcibr_soft->bs_slot[slot];
-#ifdef CONFIG_HOTPLUG_PCI_SGI
- slotp->slot_status |= SLOT_POWER_UP;
-#endif
-
- vendor = 0xFFFF & idword;
- device = 0xFFFF & (idword >> 16);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PROBE, pcibr_vhdl,
- "pcibr_slot_info_init: slot=%d, vendor=0x%x, device=0x%x\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), vendor, device));
-
- /* If the vendor id is not valid then the slot is not populated
- * and we are done.
- */
- if (vendor == 0xFFFF)
- return -ENODEV;
-
- htype = do_pcibr_config_get(cfgw, PCI_CFG_HEADER_TYPE, 1);
- nfunc = 1;
- rfunc = PCIIO_FUNC_NONE;
- pfail = 0;
-
- /* NOTE: if a card claims to be multifunction
- * but only responds to config space 0, treat
- * it as a unifunction card.
- */
-
- if (htype & 0x80) { /* MULTIFUNCTION */
- for (func = 1; func < 8; ++func) {
- cfgw = pcibr_func_config_addr(pcibr_soft, 0, slot, func, 0);
- if (pcibr_probe_slot(pcibr_soft, cfgw, &idwords[func])) {
- pfail |= 1 << func;
- continue;
- }
- vendor = 0xFFFF & idwords[func];
- if (vendor == 0xFFFF) {
- pfail |= 1 << func;
- continue;
- }
- nfunc = func + 1;
- rfunc = 0;
- }
- cfgw = pcibr_slot_config_addr(pcibr_soft, slot, 0);
- }
- pcibr_infoh = kmalloc(nfunc*sizeof (*(pcibr_infoh)), GFP_KERNEL);
- if ( !pcibr_infoh ) {
- return -ENOMEM;
- }
- memset(pcibr_infoh, 0, nfunc*sizeof (*(pcibr_infoh)));
-
- pcibr_soft->bs_slot[slot].bss_ninfo = nfunc;
- pcibr_soft->bs_slot[slot].bss_infos = pcibr_infoh;
-
- for (func = 0; func < nfunc; ++func) {
- unsigned cmd_reg;
-
- if (func) {
- if (pfail & (1 << func))
- continue;
-
- idword = idwords[func];
- cfgw = pcibr_func_config_addr(pcibr_soft, 0, slot, func, 0);
-
- device = 0xFFFF & (idword >> 16);
- htype = do_pcibr_config_get(cfgw, PCI_CFG_HEADER_TYPE, 1);
- rfunc = func;
- }
- htype &= 0x7f;
- if (htype != 0x00) {
- printk(KERN_WARNING
- "%s pcibr: pci slot %d func %d has strange header type 0x%x\n",
- pcibr_soft->bs_name, slot, func, htype);
- nbars = 2;
- } else {
- nbars = PCI_CFG_BASE_ADDRS;
- }
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_CONFIG, pcibr_vhdl,
- "pcibr_slot_info_init: slot=%d, func=%d, cfgw=0x%lx\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft,slot), func, cfgw));
-
- /*
- * If the latency timer has already been set, by prom or by the
- * card itself, use that value. Otherwise look at the device's
- * 'min_gnt' and attempt to calculate a latency time.
- *
- * NOTE: For now if the device is on the 'real time' arbitration
- * ring we don't set the latency timer.
- *
- * WAR: SGI's IOC3 and RAD devices target abort if you write a
- * single byte into their config space. So don't set the Latency
- * Timer for these devices
- */
-
- lt_time = do_pcibr_config_get(cfgw, PCI_CFG_LATENCY_TIMER, 1);
- device_reg = pcireg_device_get(pcibr_soft, slot);
- if ((lt_time == 0) && !(device_reg & BRIDGE_DEV_RT)) {
- unsigned min_gnt;
- unsigned min_gnt_mult;
-
- /* 'min_gnt' indicates how long of a burst period a device
- * needs in increments of 250ns. But latency timer is in
- * PCI clock cycles, so a conversion is needed.
- */
- min_gnt = do_pcibr_config_get(cfgw, PCI_MIN_GNT, 1);
-
- if (IS_133MHZ(pcibr_soft))
- min_gnt_mult = 32; /* 250ns @ 133MHz in clocks */
- else if (IS_100MHZ(pcibr_soft))
- min_gnt_mult = 24; /* 250ns @ 100MHz in clocks */
- else if (IS_66MHZ(pcibr_soft))
- min_gnt_mult = 16; /* 250ns @ 66MHz, in clocks */
- else
- min_gnt_mult = 8; /* 250ns @ 33MHz, in clocks */
-
- if ((min_gnt != 0) && ((min_gnt * min_gnt_mult) < 256))
- lt_time = (min_gnt * min_gnt_mult);
- else
- lt_time = 4 * min_gnt_mult; /* 1 micro second */
-
- do_pcibr_config_set(cfgw, PCI_CFG_LATENCY_TIMER, 1, lt_time);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_CONFIG, pcibr_vhdl,
- "pcibr_slot_info_init: set Latency Timer for slot=%d, "
- "func=%d, to 0x%x\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, lt_time));
- }
-
-
- /* In our architecture the setting of the cacheline size isn't
- * beneficial for cards in PCI mode, but in PCI-X mode devices
- * can optionally use the cacheline size value for internal
- * device optimizations (See 7.1.5 of the PCI-X v1.0 spec).
- * NOTE: cachline size is in doubleword increments
- */
- if (IS_PCIX(pcibr_soft)) {
- if (!do_pcibr_config_get(cfgw, PCI_CFG_CACHE_LINE, 1)) {
- do_pcibr_config_set(cfgw, PCI_CFG_CACHE_LINE, 1, 0x20);
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_CONFIG, pcibr_vhdl,
- "pcibr_slot_info_init: set CacheLine for slot=%d, "
- "func=%d, to 0x20\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func));
- }
- }
-
- /* Get the PCI-X capability if running in PCI-X mode. If the func
- * doesnt have a pcix capability, allocate a PCIIO_VENDOR_ID_NONE
- * pcibr_info struct so the device driver for that function is not
- * called.
- */
- if (IS_PCIX(pcibr_soft)) {
- if (!(pcix_cap = pcibr_find_capability(cfgw, PCI_CAP_PCIX))) {
- printk(KERN_WARNING
- "%s: Bus running in PCI-X mode, But card in slot %d, "
- "func %d not PCI-X capable\n",
- pcibr_soft->bs_name, slot, func);
- pcibr_device_info_new(pcibr_soft, slot, PCIIO_FUNC_NONE,
- PCIIO_VENDOR_ID_NONE, PCIIO_DEVICE_ID_NONE);
- continue;
- }
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_CONFIG, pcibr_vhdl,
- "pcibr_slot_info_init: PCI-X capability at 0x%lx for "
- "slot=%d, func=%d\n",
- pcix_cap, PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func));
- } else {
- pcix_cap = NULL;
- }
-
- pcibr_info = pcibr_device_info_new
- (pcibr_soft, slot, rfunc, vendor, device);
-
- /* Keep a running total of the number of PIC-X functions on the bus
- * and the number of max outstanding split trasnactions that they
- * have requested. NOTE: "pcix_cap != NULL" implies IS_PCIX()
- */
- pcibr_info->f_pcix_cap = (cap_pcix_type0_t *)pcix_cap;
- if (pcibr_info->f_pcix_cap) {
- int max_out; /* max outstanding splittrans from status reg */
-
- pcibr_soft->bs_pcix_num_funcs++;
- max_out = pcibr_info->f_pcix_cap->pcix_type0_status.max_out_split;
- pcibr_soft->bs_pcix_split_tot += max_splittrans_to_numbuf[max_out];
- }
-
- conn_vhdl = pciio_device_info_register(pcibr_vhdl, &pcibr_info->f_c);
- if (func == 0)
- slotp->slot_conn = conn_vhdl;
-
- cmd_reg = do_pcibr_config_get(cfgw, PCI_CFG_COMMAND, 4);
-
- wptr = cfgw + PCI_CFG_BASE_ADDR_0 / 4;
-
- for (win = 0; win < nbars; ++win) {
- iopaddr_t base, mask, code;
- size_t size;
-
- /*
- * GET THE BASE & SIZE OF THIS WINDOW:
- *
- * The low two or four bits of the BASE register
- * determines which address space we are in; the
- * rest is a base address. BASE registers
- * determine windows that are power-of-two sized
- * and naturally aligned, so we can get the size
- * of a window by writing all-ones to the
- * register, reading it back, and seeing which
- * bits are used for decode; the least
- * significant nonzero bit is also the size of
- * the window.
- *
- * WARNING: someone may already have allocated
- * some PCI space to this window, and in fact
- * PIO may be in process at this very moment
- * from another processor (or even from this
- * one, if we get interrupted)! So, if the BASE
- * already has a nonzero address, be generous
- * and use the LSBit of that address as the
- * size; this could overstate the window size.
- * Usually, when one card is set up, all are set
- * up; so, since we don't bitch about
- * overlapping windows, we are ok.
- *
- * UNFORTUNATELY, some cards do not clear their
- * BASE registers on reset. I have two heuristics
- * that can detect such cards: first, if the
- * decode enable is turned off for the space
- * that the window uses, we can disregard the
- * initial value. second, if the address is
- * outside the range that we use, we can disregard
- * it as well.
- *
- * This is looking very PCI generic. Except for
- * knowing how many slots and where their config
- * spaces are, this window loop and the next one
- * could probably be shared with other PCI host
- * adapters. It would be interesting to see if
- * this could be pushed up into pciio, when we
- * start supporting more PCI providers.
- */
- base = do_pcibr_config_get(wptr, (win * 4), 4);
-
- if (base & PCI_BA_IO_SPACE) {
- /* BASE is in I/O space. */
- space = PCIIO_SPACE_IO;
- mask = -4;
- code = base & 3;
- base = base & mask;
- if (base == 0) {
- ; /* not assigned */
- } else if (!(cmd_reg & PCI_CMD_IO_SPACE)) {
- base = 0; /* decode not enabled */
- }
- } else {
- /* BASE is in MEM space. */
- space = PCIIO_SPACE_MEM;
- mask = -16;
- code = base & PCI_BA_MEM_LOCATION; /* extract BAR type */
- base = base & mask;
- if (base == 0) {
- ; /* not assigned */
- } else if (!(cmd_reg & PCI_CMD_MEM_SPACE)) {
- base = 0; /* decode not enabled */
- } else if (base & 0xC0000000) {
- base = 0; /* outside permissable range */
- } else if ((code == PCI_BA_MEM_64BIT) &&
- (do_pcibr_config_get(wptr, ((win + 1)*4), 4) != 0)) {
- base = 0; /* outside permissable range */
- }
- }
-
- if (base != 0) { /* estimate size */
- pciio_space_t tmp_space = space;
- iopaddr_t tmp_base;
-
- size = base & -base;
-
- /*
- * Reserve this space in the relavent address map. Don't
- * care about the return code from pcibr_bus_addr_alloc().
- */
-
- if (space == PCIIO_SPACE_MEM && code != PCI_BA_MEM_1MEG) {
- tmp_space = PCIIO_SPACE_MEM32;
- }
-
- tmp_base = pcibr_bus_addr_alloc(pcibr_soft,
- &pcibr_info->f_window[win],
- tmp_space,
- base, size, 0);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl,
- "pcibr_slot_info_init: slot=%d, func=%d win %d "
- "reserving space %s [0x%lx..0x%lx], tmp_base 0x%lx\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, win,
- pci_space[tmp_space], (uint64_t)base,
- (uint64_t)(base + size - 1), (uint64_t)tmp_base));
- } else { /* calculate size */
- do_pcibr_config_set(wptr, (win * 4), 4, ~0); /* write 1's */
- size = do_pcibr_config_get(wptr, (win * 4), 4); /* read back */
- size &= mask; /* keep addr */
- size &= -size; /* keep lsbit */
- if (size == 0)
- continue;
- }
-
- pcibr_info->f_window[win].w_space = space;
- pcibr_info->f_window[win].w_base = base;
- pcibr_info->f_window[win].w_size = size;
-
- if (code == PCI_BA_MEM_64BIT) {
- win++; /* skip upper half */
- do_pcibr_config_set(wptr, (win * 4), 4, 0); /* must be zero */
- }
- } /* next win */
- } /* next func */
-
- return 0;
-}
-
-/*
- * pcibr_find_capability
- * Walk the list of capabilities (if it exists) looking for
- * the requested capability. Return a cfg_p pointer to the
- * capability if found, else return NULL
- */
-cfg_p
-pcibr_find_capability(cfg_p cfgw,
- unsigned capability)
-{
- unsigned cap_nxt;
- unsigned cap_id;
- int defend_against_circular_linkedlist = 0;
-
- /* Check to see if there is a capabilities pointer in the cfg header */
- if (!(do_pcibr_config_get(cfgw, PCI_CFG_STATUS, 2) & PCI_STAT_CAP_LIST)) {
- return NULL;
- }
-
- /*
- * Read up the capabilities head pointer from the configuration header.
- * Capabilities are stored as a linked list in the lower 48 dwords of
- * config space and are dword aligned. (Note: spec states the least two
- * significant bits of the next pointer must be ignored, so we mask
- * with 0xfc).
- */
- cap_nxt = (do_pcibr_config_get(cfgw, PCI_CAPABILITIES_PTR, 1) & 0xfc);
-
- while (cap_nxt && (defend_against_circular_linkedlist <= 48)) {
- cap_id = do_pcibr_config_get(cfgw, cap_nxt, 1);
- if (cap_id == capability) {
- return (cfg_p)((char *)cfgw + cap_nxt);
- }
- cap_nxt = (do_pcibr_config_get(cfgw, cap_nxt+1, 1) & 0xfc);
- defend_against_circular_linkedlist++;
- }
-
- return NULL;
-}
-
-/*
- * pcibr_slot_info_free
- * Remove all the PCI infrastructural information associated
- * with a particular PCI device.
- */
-int
-pcibr_slot_info_free(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot)
-{
- pcibr_soft_t pcibr_soft;
- pcibr_info_h pcibr_infoh;
- int nfunc;
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
-
- if (!pcibr_soft)
- return -EINVAL;
-
- if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return -EINVAL;
-
- nfunc = pcibr_soft->bs_slot[slot].bss_ninfo;
-
- pcibr_device_info_free(pcibr_vhdl, slot);
-
- pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos;
- kfree(pcibr_infoh);
- pcibr_soft->bs_slot[slot].bss_ninfo = 0;
-
- return 0;
-}
-
-/*
- * pcibr_slot_pcix_rbar_init
- * Allocate RBARs to the PCI-X functions on a given device
- */
-int
-pcibr_slot_pcix_rbar_init(pcibr_soft_t pcibr_soft,
- pciio_slot_t slot)
-{
- pcibr_info_h pcibr_infoh;
- pcibr_info_t pcibr_info;
- int nfunc;
- int func;
-
- if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return -EINVAL;
-
- if ((nfunc = pcibr_soft->bs_slot[slot].bss_ninfo) < 1)
- return -EINVAL;
-
- if (!(pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos))
- return -EINVAL;
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RBAR, pcibr_soft->bs_vhdl,
- "pcibr_slot_pcix_rbar_init for slot %d\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot)));
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RBAR, pcibr_soft->bs_vhdl,
- "\tslot/func\trequested\tgiven\tinuse\tavail\n"));
-
- for (func = 0; func < nfunc; ++func) {
- cap_pcix_type0_t *pcix_cap_p;
- cap_pcix_stat_reg_t *pcix_statreg_p;
- cap_pcix_cmd_reg_t *pcix_cmdreg_p;
- int num_rbar;
-
- if (!(pcibr_info = pcibr_infoh[func]))
- continue;
-
- if (pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE)
- continue;
-
- if (!(pcix_cap_p = pcibr_info->f_pcix_cap))
- continue;
-
- pcix_statreg_p = &pcix_cap_p->pcix_type0_status;
- pcix_cmdreg_p = &pcix_cap_p->pcix_type0_command;
-
- /* If there are enough RBARs to satify the number of "max outstanding
- * transactions" each function requested (bs_pcix_rbar_percent_allowed
- * is 100%), then give each function what it requested, otherwise give
- * the functions a "percentage of what they requested".
- */
- if (pcibr_soft->bs_pcix_rbar_percent_allowed >= 100) {
- pcix_cmdreg_p->max_split = pcix_statreg_p->max_out_split;
- num_rbar = max_splittrans_to_numbuf[pcix_cmdreg_p->max_split];
- pcibr_soft->bs_pcix_rbar_inuse += num_rbar;
- pcibr_soft->bs_pcix_rbar_avail -= num_rbar;
- pcix_cmdreg_p->max_mem_read_cnt = pcix_statreg_p->max_mem_read_cnt;
- } else {
- int index; /* index into max_splittrans_to_numbuf table */
- int max_out; /* max outstanding transactions given to func */
-
- /* Calculate the percentage of RBARs this function can have.
- * NOTE: Every function gets at least 1 RBAR (thus the "+1").
- * bs_pcix_rbar_percent_allowed is the percentage of what was
- * requested less this 1 RBAR that all functions automatically
- * gets
- */
- max_out = ((max_splittrans_to_numbuf[pcix_statreg_p->max_out_split]
- * pcibr_soft->bs_pcix_rbar_percent_allowed) / 100) + 1;
-
- /* round down the newly caclulated max_out to a valid number in
- * max_splittrans_to_numbuf[]
- */
- for (index = 0; index < MAX_SPLIT_TABLE-1; index++)
- if (max_splittrans_to_numbuf[index + 1] > max_out)
- break;
-
- pcix_cmdreg_p->max_split = index;
- num_rbar = max_splittrans_to_numbuf[pcix_cmdreg_p->max_split];
- pcibr_soft->bs_pcix_rbar_inuse += num_rbar;
- pcibr_soft->bs_pcix_rbar_avail -= num_rbar;
- pcix_cmdreg_p->max_mem_read_cnt = pcix_statreg_p->max_mem_read_cnt;
- }
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RBAR, pcibr_soft->bs_vhdl,
- "\t %d/%d \t %d \t %d \t %d \t %d\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func,
- max_splittrans_to_numbuf[pcix_statreg_p->max_out_split],
- max_splittrans_to_numbuf[pcix_cmdreg_p->max_split],
- pcibr_soft->bs_pcix_rbar_inuse,
- pcibr_soft->bs_pcix_rbar_avail));
- }
- return 0;
-}
-
-int as_debug = 0;
-/*
- * pcibr_slot_addr_space_init
- * Reserve chunks of PCI address space as required by
- * the base registers in the card.
- */
-int
-pcibr_slot_addr_space_init(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot)
-{
- pcibr_soft_t pcibr_soft;
- pcibr_info_h pcibr_infoh;
- pcibr_info_t pcibr_info;
- iopaddr_t mask;
- int nbars;
- int nfunc;
- int func;
- int win;
- int rc = 0;
- int align = 0;
- int align_slot;
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
-
- if (!pcibr_soft)
- return -EINVAL;
-
- if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return -EINVAL;
-
- /* allocate address space,
- * for windows that have not been
- * previously assigned.
- */
- if (pcibr_soft->bs_slot[slot].has_host) {
- return 0;
- }
-
- nfunc = pcibr_soft->bs_slot[slot].bss_ninfo;
- if (nfunc < 1)
- return -EINVAL;
-
- pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos;
- if (!pcibr_infoh)
- return -EINVAL;
-
- /*
- * Try to make the DevIO windows not
- * overlap by pushing the "io" and "hi"
- * allocation areas up to the next one
- * or two megabyte bound. This also
- * keeps them from being zero.
- *
- * DO NOT do this with "pci_lo" since
- * the entire "lo" area is only a
- * megabyte, total ...
- */
- align_slot = (slot < 2) ? 0x200000 : 0x100000;
-
- for (func = 0; func < nfunc; ++func) {
- cfg_p cfgw;
- cfg_p wptr;
- pciio_space_t space;
- iopaddr_t base;
- size_t size;
- unsigned pci_cfg_cmd_reg;
- unsigned pci_cfg_cmd_reg_add = 0;
-
- pcibr_info = pcibr_infoh[func];
-
- if (!pcibr_info)
- continue;
-
- if (pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE)
- continue;
-
- cfgw = pcibr_func_config_addr(pcibr_soft, 0, slot, func, 0);
- wptr = cfgw + PCI_CFG_BASE_ADDR_0 / 4;
-
- if ((do_pcibr_config_get(cfgw, PCI_CFG_HEADER_TYPE, 1) & 0x7f) != 0)
- nbars = 2;
- else
- nbars = PCI_CFG_BASE_ADDRS;
-
- for (win = 0; win < nbars; ++win) {
- space = pcibr_info->f_window[win].w_space;
- base = pcibr_info->f_window[win].w_base;
- size = pcibr_info->f_window[win].w_size;
-
- if (size < 1)
- continue;
-
- if (base >= size) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl,
- "pcibr_slot_addr_space_init: slot=%d, "
- "func=%d win %d is in space %s [0x%lx..0x%lx], "
- "allocated by prom\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, win,
- pci_space[space], (uint64_t)base,
- (uint64_t)(base + size - 1)));
-
- continue; /* already allocated */
- }
-
- align = (win) ? size : align_slot;
-
- if (align < PAGE_SIZE)
- align = PAGE_SIZE; /* ie. 0x00004000 */
-
- switch (space) {
- case PCIIO_SPACE_IO:
- base = pcibr_bus_addr_alloc(pcibr_soft,
- &pcibr_info->f_window[win],
- PCIIO_SPACE_IO,
- 0, size, align);
- if (!base)
- rc = ENOSPC;
- break;
-
- case PCIIO_SPACE_MEM:
- if ((do_pcibr_config_get(wptr, (win * 4), 4) &
- PCI_BA_MEM_LOCATION) == PCI_BA_MEM_1MEG) {
-
- /* allocate from 20-bit PCI space */
- base = pcibr_bus_addr_alloc(pcibr_soft,
- &pcibr_info->f_window[win],
- PCIIO_SPACE_MEM,
- 0, size, align);
- if (!base)
- rc = ENOSPC;
- } else {
- /* allocate from 32-bit or 64-bit PCI space */
- base = pcibr_bus_addr_alloc(pcibr_soft,
- &pcibr_info->f_window[win],
- PCIIO_SPACE_MEM32,
- 0, size, align);
- if (!base)
- rc = ENOSPC;
- }
- break;
-
- default:
- base = 0;
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl,
- "pcibr_slot_addr_space_init: slot=%d, window %d "
- "had bad space code %d\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft,slot), win, space));
- }
- pcibr_info->f_window[win].w_base = base;
- do_pcibr_config_set(wptr, (win * 4), 4, base);
-
- if (base >= size) {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl,
- "pcibr_slot_addr_space_init: slot=%d, func=%d. win %d "
- "is in space %s [0x%lx..0x%lx], allocated by pcibr\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, win,
- pci_space[space], (uint64_t)base,
- (uint64_t)(base + size - 1)));
- } else {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl,
- "pcibr_slot_addr_space_init: slot=%d, func=%d, win %d, "
- "unable to alloc 0x%lx in space %s\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func, win,
- (uint64_t)size, pci_space[space]));
- }
- } /* next base */
-
- /*
- * Allocate space for the EXPANSION ROM
- */
- base = size = 0;
- {
- wptr = cfgw + PCI_EXPANSION_ROM / 4;
- do_pcibr_config_set(wptr, 0, 4, 0xFFFFF000);
- mask = do_pcibr_config_get(wptr, 0, 4);
- if (mask & 0xFFFFF000) {
- size = mask & -mask;
- base = pcibr_bus_addr_alloc(pcibr_soft,
- &pcibr_info->f_rwindow,
- PCIIO_SPACE_MEM32,
- 0, size, align);
- if (!base)
- rc = ENOSPC;
- else {
- do_pcibr_config_set(wptr, 0, 4, base);
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_BAR, pcibr_vhdl,
- "pcibr_slot_addr_space_init: slot=%d, func=%d, "
- "ROM in [0x%X..0x%X], allocated by pcibr\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot),
- func, base, base + size - 1));
- }
- }
- }
- pcibr_info->f_rbase = base;
- pcibr_info->f_rsize = size;
-
- /*
- * if necessary, update the board's
- * command register to enable decoding
- * in the windows we added.
- *
- * There are some bits we always want to
- * be sure are set.
- */
- pci_cfg_cmd_reg_add |= PCI_CMD_IO_SPACE;
-
- /*
- * The Adaptec 1160 FC Controller WAR #767995:
- * The part incorrectly ignores the upper 32 bits of a 64 bit
- * address when decoding references to its registers so to
- * keep it from responding to a bus cycle that it shouldn't
- * we only use I/O space to get at it's registers. Don't
- * enable memory space accesses on that PCI device.
- */
- #define FCADP_VENDID 0x9004 /* Adaptec Vendor ID from fcadp.h */
- #define FCADP_DEVID 0x1160 /* Adaptec 1160 Device ID from fcadp.h */
-
- if ((pcibr_info->f_vendor != FCADP_VENDID) ||
- (pcibr_info->f_device != FCADP_DEVID))
- pci_cfg_cmd_reg_add |= PCI_CMD_MEM_SPACE;
-
- pci_cfg_cmd_reg_add |= PCI_CMD_BUS_MASTER;
-
- pci_cfg_cmd_reg = do_pcibr_config_get(cfgw, PCI_CFG_COMMAND, 4);
- pci_cfg_cmd_reg &= 0xFFFF;
- if (pci_cfg_cmd_reg_add & ~pci_cfg_cmd_reg)
- do_pcibr_config_set(cfgw, PCI_CFG_COMMAND, 4,
- pci_cfg_cmd_reg | pci_cfg_cmd_reg_add);
- } /* next func */
- return rc;
-}
-
-/*
- * pcibr_slot_device_init
- * Setup the device register in the bridge for this PCI slot.
- */
-
-int
-pcibr_slot_device_init(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot)
-{
- pcibr_soft_t pcibr_soft;
- uint64_t devreg;
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
-
- if (!pcibr_soft)
- return -EINVAL;
-
- if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return -EINVAL;
-
- /*
- * Adjustments to Device(x) and init of bss_device shadow
- */
- devreg = pcireg_device_get(pcibr_soft, slot);
- devreg &= ~BRIDGE_DEV_PAGE_CHK_DIS;
-
- /*
- * Enable virtual channels by default (exception: see PIC WAR below)
- */
- devreg |= BRIDGE_DEV_VIRTUAL_EN;
-
- /*
- * PIC WAR. PV# 855271: Disable virtual channels in the PIC since
- * it can cause problems with 32-bit devices. We'll set the bit in
- * pcibr_try_set_device() iff we're 64-bit and requesting virtual
- * channels.
- */
- if (PCIBR_WAR_ENABLED(PV855271, pcibr_soft)) {
- devreg &= ~BRIDGE_DEV_VIRTUAL_EN;
- }
- devreg |= BRIDGE_DEV_COH;
-
- pcibr_soft->bs_slot[slot].bss_device = devreg;
- pcireg_device_set(pcibr_soft, slot, devreg);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEVREG, pcibr_vhdl,
- "pcibr_slot_device_init: Device(%d): 0x%x\n",
- slot, devreg));
- return 0;
-}
-
-/*
- * pcibr_slot_guest_info_init
- * Setup the host/guest relations for a PCI slot.
- */
-int
-pcibr_slot_guest_info_init(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot)
-{
- pcibr_soft_t pcibr_soft;
- pcibr_info_h pcibr_infoh;
- pcibr_info_t pcibr_info;
- pcibr_soft_slot_t slotp;
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
-
- if (!pcibr_soft)
- return -EINVAL;
-
- if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return -EINVAL;
-
- slotp = &pcibr_soft->bs_slot[slot];
-
- /* create info and verticies for guest slots;
- * for compatibilitiy macros, create info
- * for even unpopulated slots (but do not
- * build verticies for them).
- */
- if (pcibr_soft->bs_slot[slot].bss_ninfo < 1) {
- pcibr_infoh = kmalloc(sizeof (*(pcibr_infoh)), GFP_KERNEL);
- if ( !pcibr_infoh ) {
- return -ENOMEM;
- }
- memset(pcibr_infoh, 0, sizeof (*(pcibr_infoh)));
-
- pcibr_soft->bs_slot[slot].bss_ninfo = 1;
- pcibr_soft->bs_slot[slot].bss_infos = pcibr_infoh;
-
- pcibr_info = pcibr_device_info_new
- (pcibr_soft, slot, PCIIO_FUNC_NONE,
- PCIIO_VENDOR_ID_NONE, PCIIO_DEVICE_ID_NONE);
-
- if (pcibr_soft->bs_slot[slot].has_host) {
- slotp->slot_conn = pciio_device_info_register
- (pcibr_vhdl, &pcibr_info->f_c);
- }
- }
-
- /* generate host/guest relations
- */
- if (pcibr_soft->bs_slot[slot].has_host) {
- int host = pcibr_soft->bs_slot[slot].host_slot;
- pcibr_soft_slot_t host_slotp = &pcibr_soft->bs_slot[host];
-
- hwgraph_edge_add(slotp->slot_conn,
- host_slotp->slot_conn,
- EDGE_LBL_HOST);
-
- /* XXX- only gives us one guest edge per
- * host. If/when we have a host with more than
- * one guest, we will need to figure out how
- * the host finds all its guests, and sorts
- * out which one is which.
- */
- hwgraph_edge_add(host_slotp->slot_conn,
- slotp->slot_conn,
- EDGE_LBL_GUEST);
- }
-
- return 0;
-}
-
-
-/*
- * pcibr_slot_call_device_attach
- * This calls the associated driver attach routine for the PCI
- * card in this slot.
- */
-int
-pcibr_slot_call_device_attach(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot,
- int drv_flags)
-{
- pcibr_soft_t pcibr_soft;
- pcibr_info_h pcibr_infoh;
- pcibr_info_t pcibr_info;
- int func;
- vertex_hdl_t xconn_vhdl, conn_vhdl;
- int nfunc;
- int error_func;
- int error_slot = 0;
- int error = ENODEV;
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
-
- if (!pcibr_soft)
- return -EINVAL;
-
- if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return -EINVAL;
-
- if (pcibr_soft->bs_slot[slot].has_host) {
- return -EPERM;
- }
-
- xconn_vhdl = pcibr_soft->bs_conn;
-
- nfunc = pcibr_soft->bs_slot[slot].bss_ninfo;
- pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos;
-
- for (func = 0; func < nfunc; ++func) {
-
- pcibr_info = pcibr_infoh[func];
-
- if (!pcibr_info)
- continue;
-
- if (pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE)
- continue;
-
- conn_vhdl = pcibr_info->f_vertex;
-
- error_func = pciio_device_attach(conn_vhdl, drv_flags);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEV_ATTACH, pcibr_vhdl,
- "pcibr_slot_call_device_attach: slot=%d, func=%d "
- "drv_flags=0x%x, pciio_device_attach returned %d\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func,
- drv_flags, error_func));
- pcibr_info->f_att_det_error = error_func;
-
- if (error_func)
- error_slot = error_func;
-
- error = error_slot;
-
- } /* next func */
-
-#ifdef CONFIG_HOTPLUG_PCI_SGI
- if (error) {
- if ((error != ENODEV) && (error != EUNATCH) && (error != EPERM)) {
- pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_STATUS_MASK;
- pcibr_soft->bs_slot[slot].slot_status |= SLOT_STARTUP_INCMPLT;
- }
- } else {
- pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_STATUS_MASK;
- pcibr_soft->bs_slot[slot].slot_status |= SLOT_STARTUP_CMPLT;
- }
-#endif /* CONFIG_HOTPLUG_PCI_SGI */
- return error;
-}
-
-/*
- * pcibr_slot_call_device_detach
- * This calls the associated driver detach routine for the PCI
- * card in this slot.
- */
-int
-pcibr_slot_call_device_detach(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot,
- int drv_flags)
-{
- pcibr_soft_t pcibr_soft;
- pcibr_info_h pcibr_infoh;
- pcibr_info_t pcibr_info;
- int func;
- vertex_hdl_t conn_vhdl = GRAPH_VERTEX_NONE;
- int nfunc;
- int error_func;
- int error_slot = 0;
- int error = ENODEV;
-
- pcibr_soft = pcibr_soft_get(pcibr_vhdl);
-
- if (!pcibr_soft)
- return -EINVAL;
-
- if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return -EINVAL;
-
- if (pcibr_soft->bs_slot[slot].has_host)
- return -EPERM;
-
- nfunc = pcibr_soft->bs_slot[slot].bss_ninfo;
- pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos;
-
- for (func = 0; func < nfunc; ++func) {
-
- pcibr_info = pcibr_infoh[func];
-
- if (!pcibr_info)
- continue;
-
- if (pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE)
- continue;
-
- if (IS_PCIX(pcibr_soft) && pcibr_info->f_pcix_cap) {
- int max_out;
-
- pcibr_soft->bs_pcix_num_funcs--;
- max_out = pcibr_info->f_pcix_cap->pcix_type0_status.max_out_split;
- pcibr_soft->bs_pcix_split_tot -= max_splittrans_to_numbuf[max_out];
- }
-
- conn_vhdl = pcibr_info->f_vertex;
-
- error_func = pciio_device_detach(conn_vhdl, drv_flags);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEV_DETACH, pcibr_vhdl,
- "pcibr_slot_call_device_detach: slot=%d, func=%d "
- "drv_flags=0x%x, pciio_device_detach returned %d\n",
- PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot), func,
- drv_flags, error_func));
-
- pcibr_info->f_att_det_error = error_func;
-
- if (error_func)
- error_slot = error_func;
-
- error = error_slot;
-
- } /* next func */
-
-#ifdef CONFIG_HOTPLUG_PCI_SGI
- if (error) {
- if ((error != ENODEV) && (error != EUNATCH) && (error != EPERM)) {
- pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_STATUS_MASK;
- pcibr_soft->bs_slot[slot].slot_status |= SLOT_SHUTDOWN_INCMPLT;
- }
- } else {
- if (conn_vhdl != GRAPH_VERTEX_NONE)
- pcibr_device_unregister(conn_vhdl);
- pcibr_soft->bs_slot[slot].slot_status &= ~SLOT_STATUS_MASK;
- pcibr_soft->bs_slot[slot].slot_status |= SLOT_SHUTDOWN_CMPLT;
- }
-#endif /* CONFIG_HOTPLUG_PCI_SGI */
- return error;
-}
-
-
-
-/*
- * pcibr_slot_detach
- * This is a place holder routine to keep track of all the
- * slot-specific freeing that needs to be done.
- */
-int
-pcibr_slot_detach(vertex_hdl_t pcibr_vhdl,
- pciio_slot_t slot,
- int drv_flags,
- char *l1_msg,
- int *sub_errorp)
-{
- pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- int error;
-
- /* Call the device detach function */
- error = (pcibr_slot_call_device_detach(pcibr_vhdl, slot, drv_flags));
- if (error) {
- if (sub_errorp)
- *sub_errorp = error;
- if (l1_msg)
- ;
- return PCI_SLOT_DRV_DETACH_ERR;
- }
-
- /* Recalculate the RBARs for all the devices on the bus since we've
- * just freed some up and some of the devices could use them.
- */
- if (IS_PCIX(pcibr_soft)) {
- int tmp_slot;
-
- pcibr_soft->bs_pcix_rbar_inuse = 0;
- pcibr_soft->bs_pcix_rbar_avail = NUM_RBAR;
- pcibr_soft->bs_pcix_rbar_percent_allowed =
- pcibr_pcix_rbars_calc(pcibr_soft);
-
- for (tmp_slot = pcibr_soft->bs_min_slot;
- tmp_slot < PCIBR_NUM_SLOTS(pcibr_soft); ++tmp_slot)
- (void)pcibr_slot_pcix_rbar_init(pcibr_soft, tmp_slot);
- }
-
- return 0;
-
-}
-
-/*
- * pcibr_probe_slot_pic: read a config space word
- * while trapping any errors; return zero if
- * all went OK, or nonzero if there was an error.
- * The value read, if any, is passed back
- * through the valp parameter.
- */
-static int
-pcibr_probe_slot(pcibr_soft_t pcibr_soft,
- cfg_p cfg,
- unsigned *valp)
-{
- return pcibr_probe_work(pcibr_soft, (void *)cfg, 4, (void *)valp);
-}
-
-/*
- * Probe an offset within a piomap with errors disabled.
- * len must be 1, 2, 4, or 8. The probed address must be a multiple of
- * len.
- *
- * Returns: 0 if the offset was probed and put valid data in valp
- * -1 if there was a usage error such as improper alignment
- * or out of bounds offset/len combination. In this
- * case, the map was not probed
- * 1 if the offset was probed but resulted in an error
- * such as device not responding, bus error, etc.
- */
-
-int
-pcibr_piomap_probe(pcibr_piomap_t piomap, off_t offset, int len, void *valp)
-{
- if (offset + len > piomap->bp_mapsz) {
- return -1;
- }
-
- return pcibr_probe_work(piomap->bp_soft,
- piomap->bp_kvaddr + offset, len, valp);
-}
-
-static uint64_t
-pcibr_disable_mst_timeout(pcibr_soft_t pcibr_soft)
-{
- uint64_t old_enable;
- uint64_t new_enable;
- uint64_t intr_bits;
-
- intr_bits = PIC_ISR_PCI_MST_TIMEOUT
- | PIC_ISR_PCIX_MTOUT | PIC_ISR_PCIX_SPLIT_EMSG;
- old_enable = pcireg_intr_enable_get(pcibr_soft);
- pcireg_intr_enable_bit_clr(pcibr_soft, intr_bits);
- new_enable = pcireg_intr_enable_get(pcibr_soft);
-
- if (old_enable == new_enable) {
- return 0; /* was already disabled */
- } else {
- return 1;
- }
-}
-
-static int
-pcibr_enable_mst_timeout(pcibr_soft_t pcibr_soft)
-{
- uint64_t old_enable;
- uint64_t new_enable;
- uint64_t intr_bits;
-
- intr_bits = PIC_ISR_PCI_MST_TIMEOUT
- | PIC_ISR_PCIX_MTOUT | PIC_ISR_PCIX_SPLIT_EMSG;
- old_enable = pcireg_intr_enable_get(pcibr_soft);
- pcireg_intr_enable_bit_set(pcibr_soft, intr_bits);
- new_enable = pcireg_intr_enable_get(pcibr_soft);
-
- if (old_enable == new_enable) {
- return 0; /* was alread enabled */
- } else {
- return 1;
- }
-}
-
-/*
- * pcibr_probe_slot: read a config space word
- * while trapping any errors; return zero if
- * all went OK, or nonzero if there was an error.
- * The value read, if any, is passed back
- * through the valp parameter.
- */
-static int
-pcibr_probe_work(pcibr_soft_t pcibr_soft,
- void *addr,
- int len,
- void *valp)
-{
- int rv, changed;
-
- /*
- * Sanity checks ...
- */
-
- if (len != 1 && len != 2 && len != 4 && len != 8) {
- return -1; /* invalid len */
- }
-
- if ((uint64_t)addr & (len-1)) {
- return -1; /* invalid alignment */
- }
-
- changed = pcibr_disable_mst_timeout(pcibr_soft);
-
- rv = snia_badaddr_val((void *)addr, len, valp);
-
- /* Clear the int_view register incase it was set */
- pcireg_intr_reset_set(pcibr_soft, BRIDGE_IRR_MULTI_CLR);
-
- if (changed) {
- pcibr_enable_mst_timeout(pcibr_soft);
- }
- return (rv ? 1 : 0); /* return 1 for snia_badaddr_val error, 0 if ok */
-}
-
-void
-pcibr_device_info_free(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot)
-{
- pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- pcibr_info_t pcibr_info;
- pciio_function_t func;
- pcibr_soft_slot_t slotp = &pcibr_soft->bs_slot[slot];
- cfg_p cfgw;
- int nfunc = slotp->bss_ninfo;
- int bar;
- int devio_index;
- unsigned long s;
- unsigned cmd_reg;
-
-
- for (func = 0; func < nfunc; func++) {
- pcibr_info = slotp->bss_infos[func];
-
- if (!pcibr_info)
- continue;
-
- s = pcibr_lock(pcibr_soft);
-
- /* Disable memory and I/O BARs */
- cfgw = pcibr_func_config_addr(pcibr_soft, 0, slot, func, 0);
- cmd_reg = do_pcibr_config_get(cfgw, PCI_CFG_COMMAND, 4);
- cmd_reg &= (PCI_CMD_MEM_SPACE | PCI_CMD_IO_SPACE);
- do_pcibr_config_set(cfgw, PCI_CFG_COMMAND, 4, cmd_reg);
-
- for (bar = 0; bar < PCI_CFG_BASE_ADDRS; bar++) {
- if (pcibr_info->f_window[bar].w_space == PCIIO_SPACE_NONE)
- continue;
-
- /* Free the PCI bus space */
- pcibr_bus_addr_free(&pcibr_info->f_window[bar]);
-
- /* Get index of the DevIO(x) register used to access this BAR */
- devio_index = pcibr_info->f_window[bar].w_devio_index;
-
-
- /* On last use, clear the DevIO(x) used to access this BAR */
- if (! --pcibr_soft->bs_slot[devio_index].bss_devio.bssd_ref_cnt) {
- pcibr_soft->bs_slot[devio_index].bss_devio.bssd_space =
- PCIIO_SPACE_NONE;
- pcibr_soft->bs_slot[devio_index].bss_devio.bssd_base =
- PCIBR_D32_BASE_UNSET;
- pcibr_soft->bs_slot[devio_index].bss_device = 0;
- }
- }
-
- /* Free the Expansion ROM PCI bus space */
- if(pcibr_info->f_rbase && pcibr_info->f_rsize) {
- pcibr_bus_addr_free(&pcibr_info->f_rwindow);
- }
-
- pcibr_unlock(pcibr_soft, s);
-
- slotp->bss_infos[func] = 0;
- pciio_device_info_unregister(pcibr_vhdl, &pcibr_info->f_c);
- pciio_device_info_free(&pcibr_info->f_c);
-
- kfree(pcibr_info);
- }
-
- /* Reset the mapping usage counters */
- slotp->bss_pmu_uctr = 0;
- slotp->bss_d32_uctr = 0;
- slotp->bss_d64_uctr = 0;
-
- /* Clear the Direct translation info */
- slotp->bss_d64_base = PCIBR_D64_BASE_UNSET;
- slotp->bss_d64_flags = 0;
- slotp->bss_d32_base = PCIBR_D32_BASE_UNSET;
- slotp->bss_d32_flags = 0;
-}
-
-
-iopaddr_t
-pcibr_bus_addr_alloc(pcibr_soft_t pcibr_soft, pciio_win_info_t win_info_p,
- pciio_space_t space, int start, int size, int align)
-{
- pciio_win_map_t win_map_p;
- struct resource *root_resource = NULL;
- iopaddr_t iopaddr = 0;
-
- switch (space) {
-
- case PCIIO_SPACE_IO:
- win_map_p = &pcibr_soft->bs_io_win_map;
- root_resource = &pcibr_soft->bs_io_win_root_resource;
- break;
-
- case PCIIO_SPACE_MEM:
- win_map_p = &pcibr_soft->bs_swin_map;
- root_resource = &pcibr_soft->bs_swin_root_resource;
- break;
-
- case PCIIO_SPACE_MEM32:
- win_map_p = &pcibr_soft->bs_mem_win_map;
- root_resource = &pcibr_soft->bs_mem_win_root_resource;
- break;
-
- default:
- return 0;
-
- }
- iopaddr = pciio_device_win_alloc(root_resource,
- win_info_p
- ? &win_info_p->w_win_alloc
- : NULL,
- start, size, align);
- return iopaddr;
-}
-
-
-void
-pcibr_bus_addr_free(pciio_win_info_t win_info_p)
-{
- pciio_device_win_free(&win_info_p->w_win_alloc);
-}
-
-/*
- * given a vertex_hdl to the pcibr_vhdl, return the brick's bus number
- * associated with that vertex_hdl. The true mapping happens from the
- * io_brick_tab[] array defined in ml/SN/iograph.c
- */
-int
-pcibr_widget_to_bus(vertex_hdl_t pcibr_vhdl)
-{
- pcibr_soft_t pcibr_soft = pcibr_soft_get(pcibr_vhdl);
- xwidgetnum_t widget = pcibr_soft->bs_xid;
- int bricktype = pcibr_soft->bs_bricktype;
- int bus;
-
- if ((bus = io_brick_map_widget(bricktype, widget)) <= 0) {
- printk(KERN_WARNING "pcibr_widget_to_bus() bad bricktype %d\n", bricktype);
- return 0;
- }
-
- /* For PIC there are 2 busses per widget and pcibr_soft->bs_busnum
- * will be 0 or 1. Add in the correct PIC bus offset.
- */
- bus += pcibr_soft->bs_busnum;
- return bus;
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <asm/sn/pci/pci_bus_cvlink.h>
-#include <asm/sn/simulator.h>
-
-char pciio_info_fingerprint[] = "pciio_info";
-
-/* =====================================================================
- * PCI Generic Bus Provider
- * Implement PCI provider operations. The pciio* layer provides a
- * platform-independent interface for PCI devices. This layer
- * switches among the possible implementations of a PCI adapter.
- */
-
-/* =====================================================================
- * Provider Function Location
- *
- * If there is more than one possible provider for
- * this platform, we need to examine the master
- * vertex of the current vertex for a provider
- * function structure, and indirect through the
- * appropriately named member.
- */
-
-pciio_provider_t *
-pciio_to_provider_fns(vertex_hdl_t dev)
-{
- pciio_info_t card_info;
- pciio_provider_t *provider_fns;
-
- /*
- * We're called with two types of vertices, one is
- * the bridge vertex (ends with "pci") and the other is the
- * pci slot vertex (ends with "pci/[0-8]"). For the first type
- * we need to get the provider from the PFUNCS label. For
- * the second we get it from fastinfo/c_pops.
- */
- provider_fns = pciio_provider_fns_get(dev);
- if (provider_fns == NULL) {
- card_info = pciio_info_get(dev);
- if (card_info != NULL) {
- provider_fns = pciio_info_pops_get(card_info);
- }
- }
-
- if (provider_fns == NULL) {
- char devname[MAXDEVNAME];
- panic("%s: provider_fns == NULL", vertex_to_name(dev, devname, MAXDEVNAME));
- }
- return provider_fns;
-
-}
-
-#define DEV_FUNC(dev,func) pciio_to_provider_fns(dev)->func
-#define CAST_PIOMAP(x) ((pciio_piomap_t)(x))
-#define CAST_DMAMAP(x) ((pciio_dmamap_t)(x))
-#define CAST_INTR(x) ((pciio_intr_t)(x))
-
-/*
- * Many functions are not passed their vertex
- * information directly; rather, they must
- * dive through a resource map. These macros
- * are available to coordinate this detail.
- */
-#define PIOMAP_FUNC(map,func) DEV_FUNC((map)->pp_dev,func)
-#define DMAMAP_FUNC(map,func) DEV_FUNC((map)->pd_dev,func)
-#define INTR_FUNC(intr_hdl,func) DEV_FUNC((intr_hdl)->pi_dev,func)
-
-/* =====================================================================
- * PIO MANAGEMENT
- *
- * For mapping system virtual address space to
- * pciio space on a specified card
- */
-
-pciio_piomap_t
-pciio_piomap_alloc(vertex_hdl_t dev, /* set up mapping for this device */
- device_desc_t dev_desc, /* device descriptor */
- pciio_space_t space, /* CFG, MEM, IO, or a device-decoded window */
- iopaddr_t addr, /* lowest address (or offset in window) */
- size_t byte_count, /* size of region containing our mappings */
- size_t byte_count_max, /* maximum size of a mapping */
- unsigned flags)
-{ /* defined in sys/pio.h */
- return (pciio_piomap_t) DEV_FUNC(dev, piomap_alloc)
- (dev, dev_desc, space, addr, byte_count, byte_count_max, flags);
-}
-
-void
-pciio_piomap_free(pciio_piomap_t pciio_piomap)
-{
- PIOMAP_FUNC(pciio_piomap, piomap_free)
- (CAST_PIOMAP(pciio_piomap));
-}
-
-caddr_t
-pciio_piomap_addr(pciio_piomap_t pciio_piomap, /* mapping resources */
- iopaddr_t pciio_addr, /* map for this pciio address */
- size_t byte_count)
-{ /* map this many bytes */
- pciio_piomap->pp_kvaddr = PIOMAP_FUNC(pciio_piomap, piomap_addr)
- (CAST_PIOMAP(pciio_piomap), pciio_addr, byte_count);
-
- return pciio_piomap->pp_kvaddr;
-}
-
-void
-pciio_piomap_done(pciio_piomap_t pciio_piomap)
-{
- PIOMAP_FUNC(pciio_piomap, piomap_done)
- (CAST_PIOMAP(pciio_piomap));
-}
-
-caddr_t
-pciio_piotrans_addr(vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- pciio_space_t space, /* CFG, MEM, IO, or a device-decoded window */
- iopaddr_t addr, /* starting address (or offset in window) */
- size_t byte_count, /* map this many bytes */
- unsigned flags)
-{ /* (currently unused) */
- return DEV_FUNC(dev, piotrans_addr)
- (dev, dev_desc, space, addr, byte_count, flags);
-}
-
-caddr_t
-pciio_pio_addr(vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- pciio_space_t space, /* CFG, MEM, IO, or a device-decoded window */
- iopaddr_t addr, /* starting address (or offset in window) */
- size_t byte_count, /* map this many bytes */
- pciio_piomap_t *mapp, /* where to return the map pointer */
- unsigned flags)
-{ /* PIO flags */
- pciio_piomap_t map = 0;
- int errfree = 0;
- caddr_t res;
-
- if (mapp) {
- map = *mapp; /* possible pre-allocated map */
- *mapp = 0; /* record "no map used" */
- }
-
- res = pciio_piotrans_addr
- (dev, dev_desc, space, addr, byte_count, flags);
- if (res)
- return res; /* pciio_piotrans worked */
-
- if (!map) {
- map = pciio_piomap_alloc
- (dev, dev_desc, space, addr, byte_count, byte_count, flags);
- if (!map)
- return res; /* pciio_piomap_alloc failed */
- errfree = 1;
- }
-
- res = pciio_piomap_addr
- (map, addr, byte_count);
- if (!res) {
- if (errfree)
- pciio_piomap_free(map);
- return res; /* pciio_piomap_addr failed */
- }
- if (mapp)
- *mapp = map; /* pass back map used */
-
- return res; /* pciio_piomap_addr succeeded */
-}
-
-iopaddr_t
-pciio_piospace_alloc(vertex_hdl_t dev, /* Device requiring space */
- device_desc_t dev_desc, /* Device descriptor */
- pciio_space_t space, /* MEM32/MEM64/IO */
- size_t byte_count, /* Size of mapping */
- size_t align)
-{ /* Alignment needed */
- if (align < PAGE_SIZE)
- align = PAGE_SIZE;
- return DEV_FUNC(dev, piospace_alloc)
- (dev, dev_desc, space, byte_count, align);
-}
-
-void
-pciio_piospace_free(vertex_hdl_t dev, /* Device freeing space */
- pciio_space_t space, /* Type of space */
- iopaddr_t pciaddr, /* starting address */
- size_t byte_count)
-{ /* Range of address */
- DEV_FUNC(dev, piospace_free)
- (dev, space, pciaddr, byte_count);
-}
-
-/* =====================================================================
- * DMA MANAGEMENT
- *
- * For mapping from pci space to system
- * physical space.
- */
-
-pciio_dmamap_t
-pciio_dmamap_alloc(vertex_hdl_t dev, /* set up mappings for this device */
- device_desc_t dev_desc, /* device descriptor */
- size_t byte_count_max, /* max size of a mapping */
- unsigned flags)
-{ /* defined in dma.h */
- return (pciio_dmamap_t) DEV_FUNC(dev, dmamap_alloc)
- (dev, dev_desc, byte_count_max, flags);
-}
-
-void
-pciio_dmamap_free(pciio_dmamap_t pciio_dmamap)
-{
- DMAMAP_FUNC(pciio_dmamap, dmamap_free)
- (CAST_DMAMAP(pciio_dmamap));
-}
-
-iopaddr_t
-pciio_dmamap_addr(pciio_dmamap_t pciio_dmamap, /* use these mapping resources */
- paddr_t paddr, /* map for this address */
- size_t byte_count)
-{ /* map this many bytes */
- return DMAMAP_FUNC(pciio_dmamap, dmamap_addr)
- (CAST_DMAMAP(pciio_dmamap), paddr, byte_count);
-}
-
-void
-pciio_dmamap_done(pciio_dmamap_t pciio_dmamap)
-{
- DMAMAP_FUNC(pciio_dmamap, dmamap_done)
- (CAST_DMAMAP(pciio_dmamap));
-}
-
-iopaddr_t
-pciio_dmatrans_addr(vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- paddr_t paddr, /* system physical address */
- size_t byte_count, /* length */
- unsigned flags)
-{ /* defined in dma.h */
- return DEV_FUNC(dev, dmatrans_addr)
- (dev, dev_desc, paddr, byte_count, flags);
-}
-
-iopaddr_t
-pciio_dma_addr(vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- paddr_t paddr, /* system physical address */
- size_t byte_count, /* length */
- pciio_dmamap_t *mapp, /* map to use, then map we used */
- unsigned flags)
-{ /* PIO flags */
- pciio_dmamap_t map = 0;
- int errfree = 0;
- iopaddr_t res;
-
- if (mapp) {
- map = *mapp; /* possible pre-allocated map */
- *mapp = 0; /* record "no map used" */
- }
-
- res = pciio_dmatrans_addr
- (dev, dev_desc, paddr, byte_count, flags);
- if (res)
- return res; /* pciio_dmatrans worked */
-
- if (!map) {
- map = pciio_dmamap_alloc
- (dev, dev_desc, byte_count, flags);
- if (!map)
- return res; /* pciio_dmamap_alloc failed */
- errfree = 1;
- }
-
- res = pciio_dmamap_addr
- (map, paddr, byte_count);
- if (!res) {
- if (errfree)
- pciio_dmamap_free(map);
- return res; /* pciio_dmamap_addr failed */
- }
- if (mapp)
- *mapp = map; /* pass back map used */
-
- return res; /* pciio_dmamap_addr succeeded */
-}
-
-void
-pciio_dmamap_drain(pciio_dmamap_t map)
-{
- DMAMAP_FUNC(map, dmamap_drain)
- (CAST_DMAMAP(map));
-}
-
-void
-pciio_dmaaddr_drain(vertex_hdl_t dev, paddr_t addr, size_t size)
-{
- DEV_FUNC(dev, dmaaddr_drain)
- (dev, addr, size);
-}
-
-/* =====================================================================
- * INTERRUPT MANAGEMENT
- *
- * Allow crosstalk devices to establish interrupts
- */
-
-/*
- * Allocate resources required for an interrupt as specified in intr_desc.
- * Return resource handle in intr_hdl.
- */
-pciio_intr_t
-pciio_intr_alloc(vertex_hdl_t dev, /* which Crosstalk device */
- device_desc_t dev_desc, /* device descriptor */
- pciio_intr_line_t lines, /* INTR line(s) to attach */
- vertex_hdl_t owner_dev)
-{ /* owner of this interrupt */
- return (pciio_intr_t) DEV_FUNC(dev, intr_alloc)
- (dev, dev_desc, lines, owner_dev);
-}
-
-/*
- * Free resources consumed by intr_alloc.
- */
-void
-pciio_intr_free(pciio_intr_t intr_hdl)
-{
- INTR_FUNC(intr_hdl, intr_free)
- (CAST_INTR(intr_hdl));
-}
-
-/*
- * Associate resources allocated with a previous pciio_intr_alloc call with the
- * described handler, arg, name, etc.
- *
- * Returns 0 on success, returns <0 on failure.
- */
-int
-pciio_intr_connect(pciio_intr_t intr_hdl,
- intr_func_t intr_func, intr_arg_t intr_arg) /* pciio intr resource handle */
-{
- return INTR_FUNC(intr_hdl, intr_connect)
- (CAST_INTR(intr_hdl), intr_func, intr_arg);
-}
-
-/*
- * Disassociate handler with the specified interrupt.
- */
-void
-pciio_intr_disconnect(pciio_intr_t intr_hdl)
-{
- INTR_FUNC(intr_hdl, intr_disconnect)
- (CAST_INTR(intr_hdl));
-}
-
-/*
- * Return a hwgraph vertex that represents the CPU currently
- * targeted by an interrupt.
- */
-vertex_hdl_t
-pciio_intr_cpu_get(pciio_intr_t intr_hdl)
-{
- return INTR_FUNC(intr_hdl, intr_cpu_get)
- (CAST_INTR(intr_hdl));
-}
-
-void
-pciio_slot_func_to_name(char *name,
- pciio_slot_t slot,
- pciio_function_t func)
-{
- /*
- * standard connection points:
- *
- * PCIIO_SLOT_NONE: .../pci/direct
- * PCIIO_FUNC_NONE: .../pci/<SLOT> ie. .../pci/3
- * multifunction: .../pci/<SLOT><FUNC> ie. .../pci/3c
- */
-
- if (slot == PCIIO_SLOT_NONE)
- sprintf(name, EDGE_LBL_DIRECT);
- else if (func == PCIIO_FUNC_NONE)
- sprintf(name, "%d", slot);
- else
- sprintf(name, "%d%c", slot, 'a'+func);
-}
-
-/*
- * pciio_cardinfo_get
- *
- * Get the pciio info structure corresponding to the
- * specified PCI "slot" (we like it when the same index
- * number is used for the PCI IDSEL, the REQ/GNT pair,
- * and the interrupt line being used for INTA. We like
- * it so much we call it the slot number).
- */
-static pciio_info_t
-pciio_cardinfo_get(
- vertex_hdl_t pciio_vhdl,
- pciio_slot_t pci_slot)
-{
- char namebuf[16];
- pciio_info_t info = 0;
- vertex_hdl_t conn;
-
- pciio_slot_func_to_name(namebuf, pci_slot, PCIIO_FUNC_NONE);
- if (GRAPH_SUCCESS ==
- hwgraph_traverse(pciio_vhdl, namebuf, &conn)) {
- info = pciio_info_chk(conn);
- hwgraph_vertex_unref(conn);
- }
-
- return info;
-}
-
-
-/*
- * pciio_error_handler:
- * dispatch an error to the appropriate
- * pciio connection point, or process
- * it as a generic pci error.
- * Yes, the first parameter is the
- * provider vertex at the middle of
- * the bus; we get to the pciio connect
- * point using the ioerror widgetdev field.
- *
- * This function is called by the
- * specific PCI provider, after it has figured
- * out where on the PCI bus (including which slot,
- * if it can tell) the error came from.
- */
-/*ARGSUSED */
-int
-pciio_error_handler(
- vertex_hdl_t pciio_vhdl,
- int error_code,
- ioerror_mode_t mode,
- ioerror_t *ioerror)
-{
- pciio_info_t pciio_info;
- vertex_hdl_t pconn_vhdl;
- pciio_slot_t slot;
-
- int retval;
-
-#if DEBUG && ERROR_DEBUG
- printk("%v: pciio_error_handler\n", pciio_vhdl);
-#endif
-
- IOERR_PRINTF(printk(KERN_NOTICE "%v: PCI Bus Error: Error code: %d Error mode: %d\n",
- pciio_vhdl, error_code, mode));
-
- /* If there is an error handler sitting on
- * the "no-slot" connection point, give it
- * first crack at the error. NOTE: it is
- * quite possible that this function may
- * do further refining of the ioerror.
- */
- pciio_info = pciio_cardinfo_get(pciio_vhdl, PCIIO_SLOT_NONE);
- if (pciio_info && pciio_info->c_efunc) {
- pconn_vhdl = pciio_info_dev_get(pciio_info);
-
- retval = pciio_info->c_efunc
- (pciio_info->c_einfo, error_code, mode, ioerror);
- if (retval != IOERROR_UNHANDLED)
- return retval;
- }
-
- /* Is the error associated with a particular slot?
- */
- if (IOERROR_FIELDVALID(ioerror, widgetdev)) {
- short widgetdev;
- /*
- * NOTE :
- * widgetdev is a 4byte value encoded as slot in the higher order
- * 2 bytes and function in the lower order 2 bytes.
- */
- IOERROR_GETVALUE(widgetdev, ioerror, widgetdev);
- slot = pciio_widgetdev_slot_get(widgetdev);
-
- /* If this slot has an error handler,
- * deliver the error to it.
- */
- pciio_info = pciio_cardinfo_get(pciio_vhdl, slot);
- if (pciio_info != NULL) {
- if (pciio_info->c_efunc != NULL) {
-
- pconn_vhdl = pciio_info_dev_get(pciio_info);
-
- retval = pciio_info->c_efunc
- (pciio_info->c_einfo, error_code, mode, ioerror);
- if (retval != IOERROR_UNHANDLED)
- return retval;
- }
- }
- }
-
- return (mode == MODE_DEVPROBE)
- ? IOERROR_HANDLED /* probes are OK */
- : IOERROR_UNHANDLED; /* otherwise, foo! */
-}
-
-/* =====================================================================
- * CONFIGURATION MANAGEMENT
- */
-
-/*
- * Startup a crosstalk provider
- */
-void
-pciio_provider_startup(vertex_hdl_t pciio_provider)
-{
- DEV_FUNC(pciio_provider, provider_startup)
- (pciio_provider);
-}
-
-/*
- * Shutdown a crosstalk provider
- */
-void
-pciio_provider_shutdown(vertex_hdl_t pciio_provider)
-{
- DEV_FUNC(pciio_provider, provider_shutdown)
- (pciio_provider);
-}
-
-/*
- * Read value of configuration register
- */
-uint64_t
-pciio_config_get(vertex_hdl_t dev,
- unsigned reg,
- unsigned size)
-{
- uint64_t value = 0;
- unsigned shift = 0;
-
- /* handle accesses that cross words here,
- * since that's common code between all
- * possible providers.
- */
- while (size > 0) {
- unsigned biw = 4 - (reg&3);
- if (biw > size)
- biw = size;
-
- value |= DEV_FUNC(dev, config_get)
- (dev, reg, biw) << shift;
-
- shift += 8*biw;
- reg += biw;
- size -= biw;
- }
- return value;
-}
-
-/*
- * Change value of configuration register
- */
-void
-pciio_config_set(vertex_hdl_t dev,
- unsigned reg,
- unsigned size,
- uint64_t value)
-{
- /* handle accesses that cross words here,
- * since that's common code between all
- * possible providers.
- */
- while (size > 0) {
- unsigned biw = 4 - (reg&3);
- if (biw > size)
- biw = size;
-
- DEV_FUNC(dev, config_set)
- (dev, reg, biw, value);
- reg += biw;
- size -= biw;
- value >>= biw * 8;
- }
-}
-
-/* =====================================================================
- * GENERIC PCI SUPPORT FUNCTIONS
- */
-
-/*
- * Issue a hardware reset to a card.
- */
-int
-pciio_reset(vertex_hdl_t dev)
-{
- return DEV_FUNC(dev, reset) (dev);
-}
-
-/****** Generic pci slot information interfaces ******/
-
-pciio_info_t
-pciio_info_chk(vertex_hdl_t pciio)
-{
- arbitrary_info_t ainfo = 0;
-
- hwgraph_info_get_LBL(pciio, INFO_LBL_PCIIO, &ainfo);
- return (pciio_info_t) ainfo;
-}
-
-pciio_info_t
-pciio_info_get(vertex_hdl_t pciio)
-{
- pciio_info_t pciio_info;
-
- pciio_info = (pciio_info_t) hwgraph_fastinfo_get(pciio);
-
- if ((pciio_info != NULL) &&
- (pciio_info->c_fingerprint != pciio_info_fingerprint)
- && (pciio_info->c_fingerprint != NULL)) {
-
- return((pciio_info_t)-1); /* Should panic .. */
- }
-
- return pciio_info;
-}
-
-void
-pciio_info_set(vertex_hdl_t pciio, pciio_info_t pciio_info)
-{
- if (pciio_info != NULL)
- pciio_info->c_fingerprint = pciio_info_fingerprint;
- hwgraph_fastinfo_set(pciio, (arbitrary_info_t) pciio_info);
-
- /* Also, mark this vertex as a PCI slot
- * and use the pciio_info, so pciio_info_chk
- * can work (and be fairly efficient).
- */
- hwgraph_info_add_LBL(pciio, INFO_LBL_PCIIO,
- (arbitrary_info_t) pciio_info);
-}
-
-vertex_hdl_t
-pciio_info_dev_get(pciio_info_t pciio_info)
-{
- return (pciio_info->c_vertex);
-}
-
-/*ARGSUSED*/
-pciio_bus_t
-pciio_info_bus_get(pciio_info_t pciio_info)
-{
- return (pciio_info->c_bus);
-}
-
-pciio_slot_t
-pciio_info_slot_get(pciio_info_t pciio_info)
-{
- return (pciio_info->c_slot);
-}
-
-pciio_function_t
-pciio_info_function_get(pciio_info_t pciio_info)
-{
- return (pciio_info->c_func);
-}
-
-pciio_vendor_id_t
-pciio_info_vendor_id_get(pciio_info_t pciio_info)
-{
- return (pciio_info->c_vendor);
-}
-
-pciio_device_id_t
-pciio_info_device_id_get(pciio_info_t pciio_info)
-{
- return (pciio_info->c_device);
-}
-
-vertex_hdl_t
-pciio_info_master_get(pciio_info_t pciio_info)
-{
- return (pciio_info->c_master);
-}
-
-arbitrary_info_t
-pciio_info_mfast_get(pciio_info_t pciio_info)
-{
- return (pciio_info->c_mfast);
-}
-
-pciio_provider_t *
-pciio_info_pops_get(pciio_info_t pciio_info)
-{
- return (pciio_info->c_pops);
-}
-
-/* =====================================================================
- * GENERIC PCI INITIALIZATION FUNCTIONS
- */
-
-/*
- * pciioattach: called for each vertex in the graph
- * that is a PCI provider.
- */
-/*ARGSUSED */
-int
-pciio_attach(vertex_hdl_t pciio)
-{
-#if DEBUG && ATTACH_DEBUG
- char devname[MAXDEVNAME];
- printk("%s: pciio_attach\n", vertex_to_name(pciio, devname, MAXDEVNAME));
-#endif
- return 0;
-}
-
-/*
- * Associate a set of pciio_provider functions with a vertex.
- */
-void
-pciio_provider_register(vertex_hdl_t provider, pciio_provider_t *pciio_fns)
-{
- hwgraph_info_add_LBL(provider, INFO_LBL_PFUNCS, (arbitrary_info_t) pciio_fns);
-}
-
-/*
- * Disassociate a set of pciio_provider functions with a vertex.
- */
-void
-pciio_provider_unregister(vertex_hdl_t provider)
-{
- arbitrary_info_t ainfo;
-
- hwgraph_info_remove_LBL(provider, INFO_LBL_PFUNCS, (long *) &ainfo);
-}
-
-/*
- * Obtain a pointer to the pciio_provider functions for a specified Crosstalk
- * provider.
- */
-pciio_provider_t *
-pciio_provider_fns_get(vertex_hdl_t provider)
-{
- arbitrary_info_t ainfo = 0;
-
- (void) hwgraph_info_get_LBL(provider, INFO_LBL_PFUNCS, &ainfo);
- return (pciio_provider_t *) ainfo;
-}
-
-pciio_info_t
-pciio_device_info_new(
- pciio_info_t pciio_info,
- vertex_hdl_t master,
- pciio_slot_t slot,
- pciio_function_t func,
- pciio_vendor_id_t vendor_id,
- pciio_device_id_t device_id)
-{
- if (!pciio_info) {
- pciio_info = kmalloc(sizeof (*(pciio_info)), GFP_KERNEL);
- if ( pciio_info )
- memset(pciio_info, 0, sizeof (*(pciio_info)));
- else {
- printk(KERN_WARNING "pciio_device_info_new(): Unable to "
- "allocate memory\n");
- return NULL;
- }
- }
- pciio_info->c_slot = slot;
- pciio_info->c_func = func;
- pciio_info->c_vendor = vendor_id;
- pciio_info->c_device = device_id;
- pciio_info->c_master = master;
- pciio_info->c_mfast = hwgraph_fastinfo_get(master);
- pciio_info->c_pops = pciio_provider_fns_get(master);
- pciio_info->c_efunc = 0;
- pciio_info->c_einfo = 0;
-
- return pciio_info;
-}
-
-void
-pciio_device_info_free(pciio_info_t pciio_info)
-{
- /* NOTE : pciio_info is a structure within the pcibr_info
- * and not a pointer to memory allocated on the heap !!
- */
- memset((char *)pciio_info, 0, sizeof(pciio_info));
-}
-
-vertex_hdl_t
-pciio_device_info_register(
- vertex_hdl_t connectpt, /* vertex at center of bus */
- pciio_info_t pciio_info) /* details about the connectpt */
-{
- char name[32];
- vertex_hdl_t pconn;
- int device_master_set(vertex_hdl_t, vertex_hdl_t);
-
- pciio_slot_func_to_name(name,
- pciio_info->c_slot,
- pciio_info->c_func);
-
- if (GRAPH_SUCCESS !=
- hwgraph_path_add(connectpt, name, &pconn))
- return pconn;
-
- pciio_info->c_vertex = pconn;
- pciio_info_set(pconn, pciio_info);
-
- /*
- * create link to our pci provider
- */
-
- device_master_set(pconn, pciio_info->c_master);
- return pconn;
-}
-
-void
-pciio_device_info_unregister(vertex_hdl_t connectpt,
- pciio_info_t pciio_info)
-{
- char name[32];
- vertex_hdl_t pconn = NULL;
-
- if (!pciio_info)
- return;
-
- pciio_slot_func_to_name(name,
- pciio_info->c_slot,
- pciio_info->c_func);
-
- pciio_info_set(pconn,0);
-
- hwgraph_vertex_unref(pconn);
- hwgraph_vertex_destroy(pconn);
-}
-
-/*ARGSUSED */
-int
-pciio_device_attach(vertex_hdl_t pconn,
- int drv_flags)
-{
- pciio_info_t pciio_info;
- pciio_vendor_id_t vendor_id;
- pciio_device_id_t device_id;
-
-
- pciio_info = pciio_info_get(pconn);
-
- vendor_id = pciio_info->c_vendor;
- device_id = pciio_info->c_device;
-
- /* we don't start attaching things until
- * all the driver init routines (including
- * pciio_init) have been called; so we
- * can assume here that we have a registry.
- */
-
- return(cdl_add_connpt(vendor_id, device_id, pconn, drv_flags));
-}
-
-int
-pciio_device_detach(vertex_hdl_t pconn,
- int drv_flags)
-{
- return(0);
-}
-
-/*
- * Allocate space from the specified PCI window mapping resource. On
- * success record information about the allocation in the supplied window
- * allocation cookie (if non-NULL) and return the address of the allocated
- * window. On failure return NULL.
- *
- * The "size" parameter is usually from a PCI device's Base Address Register
- * (BAR) decoder. As such, the allocation must be aligned to be a multiple of
- * that. The "align" parameter acts as a ``minimum alignment'' allocation
- * constraint. The alignment contraint reflects system or device addressing
- * restrictions such as the inability to share higher level ``windows''
- * between devices, etc. The returned PCI address allocation will be a
- * multiple of the alignment constraint both in alignment and size. Thus, the
- * returned PCI address block is aligned to the maximum of the requested size
- * and alignment.
- */
-iopaddr_t
-pciio_device_win_alloc(struct resource *root_resource,
- pciio_win_alloc_t win_alloc,
- size_t start, size_t size, size_t align)
-{
-
- struct resource *new_res;
- int status;
-
- new_res = (struct resource *) kmalloc( sizeof(struct resource), GFP_KERNEL);
- if (!new_res)
- return 0;
-
- if (start > 0) {
- status = allocate_resource( root_resource, new_res,
- size, start /* Min start addr. */,
- (start + size) - 1, 1,
- NULL, NULL);
- } else {
- if (size > align)
- align = size;
- status = allocate_resource( root_resource, new_res,
- size, align /* Min start addr. */,
- root_resource->end, align,
- NULL, NULL);
- }
-
- if (status) {
- kfree(new_res);
- return((iopaddr_t) NULL);
- }
-
- /*
- * If a window allocation cookie has been supplied, use it to keep
- * track of all the allocated space assigned to this window.
- */
- if (win_alloc) {
- win_alloc->wa_resource = new_res;
- win_alloc->wa_base = new_res->start;
- win_alloc->wa_pages = size;
- }
-
- return new_res->start;
-}
-
-/*
- * Free the specified window allocation back into the PCI window mapping
- * resource. As noted above, we keep page addresses offset by 1 ...
- */
-void
-pciio_device_win_free(pciio_win_alloc_t win_alloc)
-{
- int status;
-
- if (win_alloc->wa_resource) {
- status = release_resource(win_alloc->wa_resource);
- if (!status)
- kfree(win_alloc->wa_resource);
- else
- BUG();
- }
-}
-
-/*
- * pciio_error_register:
- * arrange for a function to be called with
- * a specified first parameter plus other
- * information when an error is encountered
- * and traced to the pci slot corresponding
- * to the connection point pconn.
- *
- * may also be called with a null function
- * pointer to "unregister" the error handler.
- *
- * NOTE: subsequent calls silently overwrite
- * previous data for this vertex. We assume that
- * cooperating drivers, well, cooperate ...
- */
-void
-pciio_error_register(vertex_hdl_t pconn,
- error_handler_f *efunc,
- error_handler_arg_t einfo)
-{
- pciio_info_t pciio_info;
-
- pciio_info = pciio_info_get(pconn);
- ASSERT(pciio_info != NULL);
- pciio_info->c_efunc = efunc;
- pciio_info->c_einfo = einfo;
-}
-
-/*
- * Check if any device has been found in this slot, and return
- * true or false
- * vhdl is the vertex for the slot
- */
-int
-pciio_slot_inuse(vertex_hdl_t pconn_vhdl)
-{
- pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
-
- ASSERT(pciio_info);
- ASSERT(pciio_info->c_vertex == pconn_vhdl);
- if (pciio_info->c_vendor) {
- /*
- * Non-zero value for vendor indicate
- * a board being found in this slot.
- */
- return 1;
- }
- return 0;
-}
-
-int
-pciio_info_type1_get(pciio_info_t pci_info)
-{
- return (pci_info->c_type1);
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/interrupt.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/hcl_util.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/pci/pci_defs.h>
-#include <asm/sn/pci/pic.h>
-#include <asm/sn/sn_private.h>
-
-extern struct file_operations pcibr_fops;
-extern pcibr_list_p pcibr_list;
-
-static int pic_attach2(vertex_hdl_t, void *, vertex_hdl_t,
- int, pcibr_soft_t *);
-
-extern int isIO9(nasid_t);
-extern char *dev_to_name(vertex_hdl_t dev, char *buf, uint buflen);
-extern int pcibr_widget_to_bus(vertex_hdl_t pcibr_vhdl);
-extern pcibr_hints_t pcibr_hints_get(vertex_hdl_t, int);
-extern unsigned pcibr_intr_bits(pciio_info_t info,
- pciio_intr_line_t lines, int nslots);
-extern void pcibr_setwidint(xtalk_intr_t);
-extern int pcibr_error_handler_wrapper(error_handler_arg_t, int,
- ioerror_mode_t, ioerror_t *);
-extern void pcibr_error_intr_handler(intr_arg_t);
-extern void pcibr_directmap_init(pcibr_soft_t);
-extern int pcibr_slot_info_init(vertex_hdl_t,pciio_slot_t);
-extern int pcibr_slot_addr_space_init(vertex_hdl_t,pciio_slot_t);
-extern int pcibr_slot_device_init(vertex_hdl_t, pciio_slot_t);
-extern int pcibr_slot_pcix_rbar_init(pcibr_soft_t, pciio_slot_t);
-extern int pcibr_slot_guest_info_init(vertex_hdl_t,pciio_slot_t);
-extern int pcibr_slot_call_device_attach(vertex_hdl_t,
- pciio_slot_t, int);
-extern void pcibr_rrb_alloc_init(pcibr_soft_t, int, int, int);
-extern int pcibr_pcix_rbars_calc(pcibr_soft_t);
-extern pcibr_info_t pcibr_device_info_new(pcibr_soft_t, pciio_slot_t,
- pciio_function_t, pciio_vendor_id_t,
- pciio_device_id_t);
-extern int pcibr_initial_rrb(vertex_hdl_t, pciio_slot_t,
- pciio_slot_t);
-extern void xwidget_error_register(vertex_hdl_t, error_handler_f *,
- error_handler_arg_t);
-extern void pcibr_clearwidint(pcibr_soft_t);
-
-
-
-/*
- * copy xwidget_info_t from conn_v to peer_conn_v
- */
-static int
-pic_bus1_widget_info_dup(vertex_hdl_t conn_v, vertex_hdl_t peer_conn_v,
- cnodeid_t xbow_peer, char *peer_path)
-{
- xwidget_info_t widget_info, peer_widget_info;
- vertex_hdl_t peer_hubv;
- hubinfo_t peer_hub_info;
-
- /* get the peer hub's widgetid */
- peer_hubv = NODEPDA(xbow_peer)->node_vertex;
- peer_hub_info = NULL;
- hubinfo_get(peer_hubv, &peer_hub_info);
- if (peer_hub_info == NULL)
- return 0;
-
- if (hwgraph_info_get_LBL(conn_v, INFO_LBL_XWIDGET,
- (arbitrary_info_t *)&widget_info) == GRAPH_SUCCESS) {
- peer_widget_info = kmalloc(sizeof (*(peer_widget_info)), GFP_KERNEL);
- if ( !peer_widget_info ) {
- return -ENOMEM;
- }
- memset(peer_widget_info, 0, sizeof (*(peer_widget_info)));
-
- peer_widget_info->w_fingerprint = widget_info_fingerprint;
- peer_widget_info->w_vertex = peer_conn_v;
- peer_widget_info->w_id = widget_info->w_id;
- peer_widget_info->w_master = peer_hubv;
- peer_widget_info->w_masterid = peer_hub_info->h_widgetid;
- /* structure copy */
- peer_widget_info->w_hwid = widget_info->w_hwid;
- peer_widget_info->w_efunc = 0;
- peer_widget_info->w_einfo = 0;
- peer_widget_info->w_name = kmalloc(strlen(peer_path) + 1, GFP_KERNEL);
- if (!peer_widget_info->w_name) {
- kfree(peer_widget_info);
- return -ENOMEM;
- }
- strcpy(peer_widget_info->w_name, peer_path);
-
- if (hwgraph_info_add_LBL(peer_conn_v, INFO_LBL_XWIDGET,
- (arbitrary_info_t)peer_widget_info) != GRAPH_SUCCESS) {
- kfree(peer_widget_info->w_name);
- kfree(peer_widget_info);
- return 0;
- }
-
- xwidget_info_set(peer_conn_v, peer_widget_info);
-
- return 1;
- }
-
- printk("pic_bus1_widget_info_dup: "
- "cannot get INFO_LBL_XWIDGET from 0x%lx\n", (uint64_t)conn_v);
- return 0;
-}
-
-/*
- * If this PIC is attached to two Cbricks ("dual-ported") then
- * attach each bus to opposite Cbricks.
- *
- * If successful, return a new vertex suitable for attaching the PIC bus.
- * If not successful, return zero and both buses will attach to the
- * vertex passed into pic_attach().
- */
-static vertex_hdl_t
-pic_bus1_redist(nasid_t nasid, vertex_hdl_t conn_v)
-{
- cnodeid_t cnode = nasid_to_cnodeid(nasid);
- cnodeid_t xbow_peer = -1;
- char pathname[256], peer_path[256], tmpbuf[256];
- char *p;
- int rc;
- vertex_hdl_t peer_conn_v, hubv;
- int pos;
- slabid_t slab;
-
- if (NODEPDA(cnode)->xbow_peer >= 0) { /* if dual-ported */
- /* create a path for this widget on the peer Cbrick */
- /* pcibr widget hw/module/001c11/slab/0/Pbrick/xtalk/12 */
- /* sprintf(pathname, "%v", conn_v); */
- xbow_peer = nasid_to_cnodeid(NODEPDA(cnode)->xbow_peer);
- pos = hwgfs_generate_path(conn_v, tmpbuf, 256);
- strcpy(pathname, &tmpbuf[pos]);
- p = pathname + strlen("hw/module/001c01/slab/0/");
-
- memset(tmpbuf, 0, 16);
- format_module_id(tmpbuf, geo_module((NODEPDA(xbow_peer))->geoid), MODULE_FORMAT_BRIEF);
- slab = geo_slab((NODEPDA(xbow_peer))->geoid);
- sprintf(peer_path, "module/%s/slab/%d/%s", tmpbuf, (int)slab, p);
-
- /* Look for vertex for this widget on the peer Cbrick.
- * Expect GRAPH_NOT_FOUND.
- */
- rc = hwgraph_traverse(hwgraph_root, peer_path, &peer_conn_v);
- if (GRAPH_SUCCESS == rc)
- printk("pic_attach: found unexpected vertex: 0x%lx\n",
- (uint64_t)peer_conn_v);
- else if (GRAPH_NOT_FOUND != rc) {
- printk("pic_attach: hwgraph_traverse unexpectedly"
- " returned 0x%x\n", rc);
- } else {
- /* try to add the widget vertex to the peer Cbrick */
- rc = hwgraph_path_add(hwgraph_root, peer_path, &peer_conn_v);
-
- if (GRAPH_SUCCESS != rc)
- printk("pic_attach: hwgraph_path_add"
- " failed with 0x%x\n", rc);
- else {
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, conn_v,
- "pic_bus1_redist: added vertex %v\n", peer_conn_v));
-
- /* Now hang appropiate stuff off of the new
- * vertex. We bail out if we cannot add something.
- * In that case, we don't remove the newly added
- * vertex but that should be safe and we don't
- * really expect the additions to fail anyway.
- */
- if (!pic_bus1_widget_info_dup(conn_v, peer_conn_v,
- xbow_peer, peer_path))
- return 0;
-
- hubv = cnodeid_to_vertex(xbow_peer);
- ASSERT(hubv != GRAPH_VERTEX_NONE);
- device_master_set(peer_conn_v, hubv);
- xtalk_provider_register(hubv, &hub_provider);
- xtalk_provider_startup(hubv);
- return peer_conn_v;
- }
- }
- }
- return 0;
-}
-
-/*
- * PIC has two buses under a single widget. pic_attach() calls pic_attach2()
- * to attach each of those buses.
- */
-int
-pic_attach(vertex_hdl_t conn_v)
-{
- int rc;
- void *bridge0, *bridge1 = (void *)0;
- vertex_hdl_t pcibr_vhdl0, pcibr_vhdl1 = (vertex_hdl_t)0;
- pcibr_soft_t bus0_soft, bus1_soft = (pcibr_soft_t)0;
- vertex_hdl_t conn_v0, conn_v1, peer_conn_v;
- int bricktype;
- int iobrick_type_get_nasid(nasid_t nasid);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, conn_v, "pic_attach()\n"));
-
- bridge0 = pcibr_bridge_ptr_get(conn_v, 0);
- bridge1 = pcibr_bridge_ptr_get(conn_v, 1);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, conn_v,
- "pic_attach: bridge0=0x%lx, bridge1=0x%lx\n",
- bridge0, bridge1));
-
- conn_v0 = conn_v1 = conn_v;
-
- /* If dual-ported then split the two PIC buses across both Cbricks */
- peer_conn_v = pic_bus1_redist(NASID_GET(bridge0), conn_v);
- if (peer_conn_v)
- conn_v1 = peer_conn_v;
-
- /*
- * Create the vertex for the PCI buses, which we
- * will also use to hold the pcibr_soft and
- * which will be the "master" vertex for all the
- * pciio connection points we will hang off it.
- * This needs to happen before we call nic_bridge_vertex_info
- * as we are some of the *_vmc functions need access to the edges.
- *
- * Opening this vertex will provide access to
- * the Bridge registers themselves.
- */
- bricktype = iobrick_type_get_nasid(NASID_GET(bridge0));
- if ( bricktype == MODULE_CGBRICK ) {
- rc = hwgraph_path_add(conn_v0, EDGE_LBL_AGP_0, &pcibr_vhdl0);
- ASSERT(rc == GRAPH_SUCCESS);
- rc = hwgraph_path_add(conn_v1, EDGE_LBL_AGP_1, &pcibr_vhdl1);
- ASSERT(rc == GRAPH_SUCCESS);
- } else {
- rc = hwgraph_path_add(conn_v0, EDGE_LBL_PCIX_0, &pcibr_vhdl0);
- ASSERT(rc == GRAPH_SUCCESS);
- rc = hwgraph_path_add(conn_v1, EDGE_LBL_PCIX_1, &pcibr_vhdl1);
- ASSERT(rc == GRAPH_SUCCESS);
- }
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, conn_v,
- "pic_attach: pcibr_vhdl0=0x%lx, pcibr_vhdl1=0x%lx\n",
- pcibr_vhdl0, pcibr_vhdl1));
-
- /* register pci provider array */
- pciio_provider_register(pcibr_vhdl0, &pci_pic_provider);
- pciio_provider_register(pcibr_vhdl1, &pci_pic_provider);
-
- pciio_provider_startup(pcibr_vhdl0);
- pciio_provider_startup(pcibr_vhdl1);
-
- pic_attach2(conn_v0, bridge0, pcibr_vhdl0, 0, &bus0_soft);
- pic_attach2(conn_v1, bridge1, pcibr_vhdl1, 1, &bus1_soft);
-
- {
- /* If we're dual-ported finish duplicating the peer info structure.
- * The error handler and arg are done in pic_attach2().
- */
- xwidget_info_t info0, info1;
- if (conn_v0 != conn_v1) { /* dual ported */
- info0 = xwidget_info_get(conn_v0);
- info1 = xwidget_info_get(conn_v1);
- if (info1->w_efunc == (error_handler_f *)NULL)
- info1->w_efunc = info0->w_efunc;
- if (info1->w_einfo == (error_handler_arg_t)0)
- info1->w_einfo = bus1_soft;
- }
- }
-
- /* save a pointer to the PIC's other bus's soft struct */
- bus0_soft->bs_peers_soft = bus1_soft;
- bus1_soft->bs_peers_soft = bus0_soft;
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, conn_v,
- "pic_attach: bus0_soft=0x%lx, bus1_soft=0x%lx\n",
- bus0_soft, bus1_soft));
-
- return 0;
-}
-
-
-/*
- * PIC has two buses under a single widget. pic_attach() calls pic_attach2()
- * to attach each of those buses.
- */
-static int
-pic_attach2(vertex_hdl_t xconn_vhdl, void *bridge,
- vertex_hdl_t pcibr_vhdl, int busnum, pcibr_soft_t *ret_softp)
-{
- vertex_hdl_t ctlr_vhdl;
- pcibr_soft_t pcibr_soft;
- pcibr_info_t pcibr_info;
- xwidget_info_t info;
- xtalk_intr_t xtalk_intr;
- pcibr_list_p self;
- int entry, slot, ibit, i;
- vertex_hdl_t noslot_conn;
- char devnm[MAXDEVNAME], *s;
- pcibr_hints_t pcibr_hints;
- picreg_t id;
- picreg_t int_enable;
- picreg_t pic_ctrl_reg;
-
- int iobrick_type_get_nasid(nasid_t nasid);
- int iomoduleid_get(nasid_t nasid);
- int irq;
- int cpu;
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, pcibr_vhdl,
- "pic_attach2: bridge=0x%lx, busnum=%d\n", bridge, busnum));
-
- ctlr_vhdl = NULL;
- ctlr_vhdl = hwgraph_register(pcibr_vhdl, EDGE_LBL_CONTROLLER, 0,
- 0, 0, 0,
- S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP, 0, 0,
- (struct file_operations *)&pcibr_fops, (void *)pcibr_vhdl);
- ASSERT(ctlr_vhdl != NULL);
-
- id = pcireg_bridge_id_get(bridge);
- hwgraph_info_add_LBL(pcibr_vhdl, INFO_LBL_PCIBR_ASIC_REV,
- (arbitrary_info_t)XWIDGET_PART_REV_NUM(id));
-
- /*
- * Get the hint structure; if some NIC callback marked this vertex as
- * "hands-off" then we just return here, before doing anything else.
- */
- pcibr_hints = pcibr_hints_get(xconn_vhdl, 0);
-
- if (pcibr_hints && pcibr_hints->ph_hands_off)
- return -1;
-
- /* allocate soft structure to hang off the vertex. Link the new soft
- * structure to the pcibr_list linked list
- */
- pcibr_soft = kmalloc(sizeof (*(pcibr_soft)), GFP_KERNEL);
- if ( !pcibr_soft )
- return -ENOMEM;
-
- self = kmalloc(sizeof (*(self)), GFP_KERNEL);
- if ( !self ) {
- kfree(pcibr_soft);
- return -ENOMEM;
- }
- memset(pcibr_soft, 0, sizeof (*(pcibr_soft)));
- memset(self, 0, sizeof (*(self)));
-
- self->bl_soft = pcibr_soft;
- self->bl_vhdl = pcibr_vhdl;
- self->bl_next = pcibr_list;
- pcibr_list = self;
-
- if (ret_softp)
- *ret_softp = pcibr_soft;
-
- memset(pcibr_soft, 0, sizeof *pcibr_soft);
- pcibr_soft_set(pcibr_vhdl, pcibr_soft);
-
- s = dev_to_name(pcibr_vhdl, devnm, MAXDEVNAME);
- pcibr_soft->bs_name = kmalloc(strlen(s) + 1, GFP_KERNEL);
- if (!pcibr_soft->bs_name)
- return -ENOMEM;
-
- strcpy(pcibr_soft->bs_name, s);
-
- pcibr_soft->bs_conn = xconn_vhdl;
- pcibr_soft->bs_vhdl = pcibr_vhdl;
- pcibr_soft->bs_base = (void *)bridge;
- pcibr_soft->bs_rev_num = XWIDGET_PART_REV_NUM(id);
- pcibr_soft->bs_intr_bits = (pcibr_intr_bits_f *)pcibr_intr_bits;
- pcibr_soft->bsi_err_intr = 0;
- pcibr_soft->bs_min_slot = 0;
- pcibr_soft->bs_max_slot = 3;
- pcibr_soft->bs_busnum = busnum;
- pcibr_soft->bs_bridge_type = PCIBR_BRIDGETYPE_PIC;
- pcibr_soft->bs_int_ate_size = PIC_INTERNAL_ATES;
- /* Make sure this is called after setting the bs_base and bs_bridge_type */
- pcibr_soft->bs_bridge_mode = (pcireg_speed_get(pcibr_soft) << 1) |
- pcireg_mode_get(pcibr_soft);
-
- info = xwidget_info_get(xconn_vhdl);
- pcibr_soft->bs_xid = xwidget_info_id_get(info);
- pcibr_soft->bs_master = xwidget_info_master_get(info);
- pcibr_soft->bs_mxid = xwidget_info_masterid_get(info);
-
- strcpy(pcibr_soft->bs_asic_name, "PIC");
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, pcibr_vhdl,
- "pic_attach2: pcibr_soft=0x%lx, mode=0x%x\n",
- pcibr_soft, pcibr_soft->bs_bridge_mode));
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, pcibr_vhdl,
- "pic_attach2: %s ASIC: rev %s (code=0x%x)\n",
- pcibr_soft->bs_asic_name,
- (IS_PIC_PART_REV_A(pcibr_soft->bs_rev_num)) ? "A" :
- (IS_PIC_PART_REV_B(pcibr_soft->bs_rev_num)) ? "B" :
- (IS_PIC_PART_REV_C(pcibr_soft->bs_rev_num)) ? "C" :
- "unknown", pcibr_soft->bs_rev_num));
-
- /* PV854845: Must clear write request buffer to avoid parity errors */
- for (i=0; i < PIC_WR_REQ_BUFSIZE; i++) {
- ((pic_t *)bridge)->p_wr_req_lower[i] = 0;
- ((pic_t *)bridge)->p_wr_req_upper[i] = 0;
- ((pic_t *)bridge)->p_wr_req_parity[i] = 0;
- }
-
- pcibr_soft->bs_nasid = NASID_GET(bridge);
-
- pcibr_soft->bs_bricktype = iobrick_type_get_nasid(pcibr_soft->bs_nasid);
- if (pcibr_soft->bs_bricktype < 0)
- printk(KERN_WARNING "%s: bricktype was unknown by L1 (ret val = 0x%x)\n",
- pcibr_soft->bs_name, pcibr_soft->bs_bricktype);
-
- pcibr_soft->bs_moduleid = iomoduleid_get(pcibr_soft->bs_nasid);
-
- if (pcibr_soft->bs_bricktype > 0) {
- switch (pcibr_soft->bs_bricktype) {
- case MODULE_PXBRICK:
- case MODULE_IXBRICK:
- case MODULE_OPUSBRICK:
- pcibr_soft->bs_first_slot = 0;
- pcibr_soft->bs_last_slot = 1;
- pcibr_soft->bs_last_reset = 1;
-
- /* Bus 1 of IXBrick has a IO9, so there are 4 devices, not 2 */
- if ((pcibr_widget_to_bus(pcibr_vhdl) == 1)
- && isIO9(pcibr_soft->bs_nasid)) {
- pcibr_soft->bs_last_slot = 3;
- pcibr_soft->bs_last_reset = 3;
- }
- break;
-
- case MODULE_CGBRICK:
- pcibr_soft->bs_first_slot = 0;
- pcibr_soft->bs_last_slot = 0;
- pcibr_soft->bs_last_reset = 0;
- break;
-
- default:
- printk(KERN_WARNING "%s: Unknown bricktype: 0x%x\n",
- pcibr_soft->bs_name, pcibr_soft->bs_bricktype);
- break;
- }
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, pcibr_vhdl,
- "pic_attach2: bricktype=%d, brickbus=%d, "
- "slots %d-%d\n", pcibr_soft->bs_bricktype,
- pcibr_widget_to_bus(pcibr_vhdl),
- pcibr_soft->bs_first_slot, pcibr_soft->bs_last_slot));
- }
-
- /*
- * Initialize bridge and bus locks
- */
- spin_lock_init(&pcibr_soft->bs_lock);
-
- /*
- * If we have one, process the hints structure.
- */
- if (pcibr_hints) {
- unsigned rrb_fixed;
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, pcibr_vhdl,
- "pic_attach2: pcibr_hints=0x%lx\n", pcibr_hints));
-
- rrb_fixed = pcibr_hints->ph_rrb_fixed;
-
- pcibr_soft->bs_rrb_fixed = rrb_fixed;
-
- if (pcibr_hints->ph_intr_bits)
- pcibr_soft->bs_intr_bits = pcibr_hints->ph_intr_bits;
-
-
- for (slot = pcibr_soft->bs_min_slot;
- slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) {
- int hslot = pcibr_hints->ph_host_slot[slot] - 1;
-
- if (hslot < 0) {
- pcibr_soft->bs_slot[slot].host_slot = slot;
- } else {
- pcibr_soft->bs_slot[slot].has_host = 1;
- pcibr_soft->bs_slot[slot].host_slot = hslot;
- }
- }
- }
-
- /*
- * Set-up initial values for state fields
- */
- for (slot = pcibr_soft->bs_min_slot;
- slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) {
- pcibr_soft->bs_slot[slot].bss_devio.bssd_space = PCIIO_SPACE_NONE;
- pcibr_soft->bs_slot[slot].bss_devio.bssd_ref_cnt = 0;
- pcibr_soft->bs_slot[slot].bss_d64_base = PCIBR_D64_BASE_UNSET;
- pcibr_soft->bs_slot[slot].bss_d32_base = PCIBR_D32_BASE_UNSET;
- pcibr_soft->bs_rrb_valid_dflt[slot][VCHAN0] = -1;
- }
-
- for (ibit = 0; ibit < 8; ++ibit) {
- pcibr_soft->bs_intr[ibit].bsi_xtalk_intr = 0;
- pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_soft = pcibr_soft;
- pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_list = NULL;
- pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_ibit = ibit;
- pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_hdlrcnt = 0;
- pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_shared = 0;
- pcibr_soft->bs_intr[ibit].bsi_pcibr_intr_wrap.iw_connected = 0;
- }
-
-
- /*
- * connect up our error handler. PIC has 2 busses (thus resulting in 2
- * pcibr_soft structs under 1 widget), so only register a xwidget error
- * handler for PIC's bus0. NOTE: for PIC pcibr_error_handler_wrapper()
- * is a wrapper routine we register that will call the real error handler
- * pcibr_error_handler() with the correct pcibr_soft struct.
- */
- if (busnum == 0) {
- xwidget_error_register(xconn_vhdl,
- pcibr_error_handler_wrapper, pcibr_soft);
- }
-
- /*
- * Clear all pending interrupts. Assume all interrupts are from slot 3
- * until otherise setup.
- */
- pcireg_intr_reset_set(pcibr_soft, PIC_IRR_ALL_CLR);
- pcireg_intr_device_set(pcibr_soft, 0x006db6db);
-
- /* Setup the mapping register used for direct mapping */
- pcibr_directmap_init(pcibr_soft);
-
- /*
- * Initialize the PICs control register.
- */
- pic_ctrl_reg = pcireg_control_get(pcibr_soft);
-
- /* Bridges Requester ID: bus = busnum, dev = 0, func = 0 */
- pic_ctrl_reg &= ~PIC_CTRL_BUS_NUM_MASK;
- pic_ctrl_reg |= PIC_CTRL_BUS_NUM(busnum);
- pic_ctrl_reg &= ~PIC_CTRL_DEV_NUM_MASK;
- pic_ctrl_reg &= ~PIC_CTRL_FUN_NUM_MASK;
-
- pic_ctrl_reg &= ~PIC_CTRL_NO_SNOOP;
- pic_ctrl_reg &= ~PIC_CTRL_RELAX_ORDER;
-
- /* enable parity checking on PICs internal RAM */
- pic_ctrl_reg |= PIC_CTRL_PAR_EN_RESP;
- pic_ctrl_reg |= PIC_CTRL_PAR_EN_ATE;
-
- /* PIC BRINGUP WAR (PV# 862253): dont enable write request parity */
- if (!PCIBR_WAR_ENABLED(PV862253, pcibr_soft)) {
- pic_ctrl_reg |= PIC_CTRL_PAR_EN_REQ;
- }
-
- pic_ctrl_reg |= PIC_CTRL_PAGE_SIZE;
-
- pcireg_control_set(pcibr_soft, pic_ctrl_reg);
-
- /* Initialize internal mapping entries (ie. the ATEs) */
- for (entry = 0; entry < pcibr_soft->bs_int_ate_size; entry++)
- pcireg_int_ate_set(pcibr_soft, entry, 0);
-
- pcibr_soft->bs_int_ate_resource.start = 0;
- pcibr_soft->bs_int_ate_resource.end = pcibr_soft->bs_int_ate_size - 1;
-
- /* Setup the PICs error interrupt handler. */
- xtalk_intr = xtalk_intr_alloc(xconn_vhdl, (device_desc_t)0, pcibr_vhdl);
-
- ASSERT(xtalk_intr != NULL);
-
- irq = ((hub_intr_t)xtalk_intr)->i_bit;
- cpu = ((hub_intr_t)xtalk_intr)->i_cpuid;
-
- intr_unreserve_level(cpu, irq);
- ((hub_intr_t)xtalk_intr)->i_bit = SGI_PCIBR_ERROR;
- xtalk_intr->xi_vector = SGI_PCIBR_ERROR;
-
- pcibr_soft->bsi_err_intr = xtalk_intr;
-
- /*
- * On IP35 with XBridge, we do some extra checks in pcibr_setwidint
- * in order to work around some addressing limitations. In order
- * for that fire wall to work properly, we need to make sure we
- * start from a known clean state.
- */
- pcibr_clearwidint(pcibr_soft);
-
- xtalk_intr_connect(xtalk_intr,
- (intr_func_t) pcibr_error_intr_handler,
- (intr_arg_t) pcibr_soft,
- (xtalk_intr_setfunc_t) pcibr_setwidint,
- (void *) pcibr_soft);
-
- request_irq(SGI_PCIBR_ERROR, (void *)pcibr_error_intr_handler, SA_SHIRQ,
- "PCIBR error", (intr_arg_t) pcibr_soft);
-
- PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pcibr_vhdl,
- "pcibr_setwidint: target_id=0x%lx, int_addr=0x%lx\n",
- pcireg_intr_dst_target_id_get(pcibr_soft),
- pcireg_intr_dst_addr_get(pcibr_soft)));
-
- /* now we can start handling error interrupts */
- int_enable = pcireg_intr_enable_get(pcibr_soft);
- int_enable |= PIC_ISR_ERRORS;
-
- /* PIC BRINGUP WAR (PV# 856864 & 856865): allow the tnums that are
- * locked out to be freed up sooner (by timing out) so that the
- * read tnums are never completely used up.
- */
- if (PCIBR_WAR_ENABLED(PV856864, pcibr_soft)) {
- int_enable &= ~PIC_ISR_PCIX_REQ_TOUT;
- int_enable &= ~PIC_ISR_XREAD_REQ_TIMEOUT;
-
- pcireg_req_timeout_set(pcibr_soft, 0x750);
- }
-
- pcireg_intr_enable_set(pcibr_soft, int_enable);
- pcireg_intr_mode_set(pcibr_soft, 0); /* dont send 'clear interrupt' pkts */
- pcireg_tflush_get(pcibr_soft); /* wait until Bridge PIO complete */
-
- /*
- * PIC BRINGUP WAR (PV# 856866, 859504, 861476, 861478): Don't use
- * RRB0, RRB8, RRB1, and RRB9. Assign them to DEVICE[2|3]--VCHAN3
- * so they are not used. This works since there is currently no
- * API to penable VCHAN3.
- */
- if (PCIBR_WAR_ENABLED(PV856866, pcibr_soft)) {
- pcireg_rrb_bit_set(pcibr_soft, 0, 0x000f000f); /* even rrb reg */
- pcireg_rrb_bit_set(pcibr_soft, 1, 0x000f000f); /* odd rrb reg */
- }
-
- /* PIC only supports 64-bit direct mapping in PCI-X mode. Since
- * all PCI-X devices that initiate memory transactions must be
- * capable of generating 64-bit addressed, we force 64-bit DMAs.
- */
- pcibr_soft->bs_dma_flags = 0;
- if (IS_PCIX(pcibr_soft)) {
- pcibr_soft->bs_dma_flags |= PCIIO_DMA_A64;
- }
-
- {
-
- iopaddr_t prom_base_addr = pcibr_soft->bs_xid << 24;
- int prom_base_size = 0x1000000;
- int status;
- struct resource *res;
-
- /* Allocate resource maps based on bus page size; for I/O and memory
- * space, free all pages except those in the base area and in the
- * range set by the PROM.
- *
- * PROM creates BAR addresses in this format: 0x0ws00000 where w is
- * the widget number and s is the device register offset for the slot.
- */
-
- /* Setup the Bus's PCI IO Root Resource. */
- pcibr_soft->bs_io_win_root_resource.start = PCIBR_BUS_IO_BASE;
- pcibr_soft->bs_io_win_root_resource.end = 0xffffffff;
- res = (struct resource *) kmalloc( sizeof(struct resource), GFP_KERNEL);
- if (!res)
- panic("PCIBR:Unable to allocate resource structure\n");
-
- /* Block off the range used by PROM. */
- res->start = prom_base_addr;
- res->end = prom_base_addr + (prom_base_size - 1);
- status = request_resource(&pcibr_soft->bs_io_win_root_resource, res);
- if (status)
- panic("PCIBR:Unable to request_resource()\n");
-
- /* Setup the Small Window Root Resource */
- pcibr_soft->bs_swin_root_resource.start = PAGE_SIZE;
- pcibr_soft->bs_swin_root_resource.end = 0x000FFFFF;
-
- /* Setup the Bus's PCI Memory Root Resource */
- pcibr_soft->bs_mem_win_root_resource.start = 0x200000;
- pcibr_soft->bs_mem_win_root_resource.end = 0xffffffff;
- res = (struct resource *) kmalloc( sizeof(struct resource), GFP_KERNEL);
- if (!res)
- panic("PCIBR:Unable to allocate resource structure\n");
-
- /* Block off the range used by PROM. */
- res->start = prom_base_addr;
- res->end = prom_base_addr + (prom_base_size - 1);
- status = request_resource(&pcibr_soft->bs_mem_win_root_resource, res);
- if (status)
- panic("PCIBR:Unable to request_resource()\n");
-
- }
-
-
- /* build "no-slot" connection point */
- pcibr_info = pcibr_device_info_new(pcibr_soft, PCIIO_SLOT_NONE,
- PCIIO_FUNC_NONE, PCIIO_VENDOR_ID_NONE, PCIIO_DEVICE_ID_NONE);
- noslot_conn = pciio_device_info_register(pcibr_vhdl, &pcibr_info->f_c);
-
- /* Store no slot connection point info for tearing it down during detach. */
- pcibr_soft->bs_noslot_conn = noslot_conn;
- pcibr_soft->bs_noslot_info = pcibr_info;
-
- for (slot = pcibr_soft->bs_min_slot;
- slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) {
- /* Find out what is out there */
- (void)pcibr_slot_info_init(pcibr_vhdl, slot);
- }
-
- for (slot = pcibr_soft->bs_min_slot;
- slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) {
- /* Set up the address space for this slot in the PCI land */
- (void)pcibr_slot_addr_space_init(pcibr_vhdl, slot);
- }
-
- for (slot = pcibr_soft->bs_min_slot;
- slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) {
- /* Setup the device register */
- (void)pcibr_slot_device_init(pcibr_vhdl, slot);
- }
-
- if (IS_PCIX(pcibr_soft)) {
- pcibr_soft->bs_pcix_rbar_inuse = 0;
- pcibr_soft->bs_pcix_rbar_avail = NUM_RBAR;
- pcibr_soft->bs_pcix_rbar_percent_allowed =
- pcibr_pcix_rbars_calc(pcibr_soft);
-
- for (slot = pcibr_soft->bs_min_slot;
- slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) {
- /* Setup the PCI-X Read Buffer Attribute Registers (RBARs) */
- (void)pcibr_slot_pcix_rbar_init(pcibr_soft, slot);
- }
- }
-
- for (slot = pcibr_soft->bs_min_slot;
- slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) {
- /* Setup host/guest relations */
- (void)pcibr_slot_guest_info_init(pcibr_vhdl, slot);
- }
-
- /* Handle initial RRB management */
- pcibr_initial_rrb(pcibr_vhdl,
- pcibr_soft->bs_first_slot, pcibr_soft->bs_last_slot);
-
- /* Before any drivers get called that may want to re-allocate RRB's,
- * let's get some special cases pre-allocated. Drivers may override
- * these pre-allocations, but by doing pre-allocations now we're
- * assured not to step all over what the driver intended.
- */
- if (pcibr_soft->bs_bricktype > 0) {
- switch (pcibr_soft->bs_bricktype) {
- case MODULE_PXBRICK:
- case MODULE_IXBRICK:
- case MODULE_OPUSBRICK:
- /*
- * If IO9 in bus 1, allocate RRBs to all the IO9 devices
- */
- if ((pcibr_widget_to_bus(pcibr_vhdl) == 1) &&
- (pcibr_soft->bs_slot[0].bss_vendor_id == 0x10A9) &&
- (pcibr_soft->bs_slot[0].bss_device_id == 0x100A)) {
- pcibr_rrb_alloc_init(pcibr_soft, 0, VCHAN0, 4);
- pcibr_rrb_alloc_init(pcibr_soft, 1, VCHAN0, 4);
- pcibr_rrb_alloc_init(pcibr_soft, 2, VCHAN0, 4);
- pcibr_rrb_alloc_init(pcibr_soft, 3, VCHAN0, 4);
- } else {
- pcibr_rrb_alloc_init(pcibr_soft, 0, VCHAN0, 4);
- pcibr_rrb_alloc_init(pcibr_soft, 1, VCHAN0, 4);
- }
- break;
-
- case MODULE_CGBRICK:
- pcibr_rrb_alloc_init(pcibr_soft, 0, VCHAN0, 8);
- break;
- } /* switch */
- }
-
-
- for (slot = pcibr_soft->bs_min_slot;
- slot < PCIBR_NUM_SLOTS(pcibr_soft); ++slot) {
- /* Call the device attach */
- (void)pcibr_slot_call_device_attach(pcibr_vhdl, slot, 0);
- }
-
- pciio_device_attach(noslot_conn, 0);
-
- return 0;
-}
-
-
-/*
- * pci provider functions
- *
- * mostly in pcibr.c but if any are needed here then
- * this might be a way to get them here.
- */
-pciio_provider_t pci_pic_provider =
-{
- PCIIO_ASIC_TYPE_PIC,
-
- (pciio_piomap_alloc_f *) pcibr_piomap_alloc,
- (pciio_piomap_free_f *) pcibr_piomap_free,
- (pciio_piomap_addr_f *) pcibr_piomap_addr,
- (pciio_piomap_done_f *) pcibr_piomap_done,
- (pciio_piotrans_addr_f *) pcibr_piotrans_addr,
- (pciio_piospace_alloc_f *) pcibr_piospace_alloc,
- (pciio_piospace_free_f *) pcibr_piospace_free,
-
- (pciio_dmamap_alloc_f *) pcibr_dmamap_alloc,
- (pciio_dmamap_free_f *) pcibr_dmamap_free,
- (pciio_dmamap_addr_f *) pcibr_dmamap_addr,
- (pciio_dmamap_done_f *) pcibr_dmamap_done,
- (pciio_dmatrans_addr_f *) pcibr_dmatrans_addr,
- (pciio_dmamap_drain_f *) pcibr_dmamap_drain,
- (pciio_dmaaddr_drain_f *) pcibr_dmaaddr_drain,
-
- (pciio_intr_alloc_f *) pcibr_intr_alloc,
- (pciio_intr_free_f *) pcibr_intr_free,
- (pciio_intr_connect_f *) pcibr_intr_connect,
- (pciio_intr_disconnect_f *) pcibr_intr_disconnect,
- (pciio_intr_cpu_get_f *) pcibr_intr_cpu_get,
-
- (pciio_provider_startup_f *) pcibr_provider_startup,
- (pciio_provider_shutdown_f *) pcibr_provider_shutdown,
- (pciio_reset_f *) pcibr_reset,
- (pciio_endian_set_f *) pcibr_endian_set,
- (pciio_config_get_f *) pcibr_config_get,
- (pciio_config_set_f *) pcibr_config_set,
-
- (pciio_error_extract_f *) pcibr_error_extract,
-
- (pciio_driver_reg_callback_f *) pcibr_driver_reg_callback,
- (pciio_driver_unreg_callback_f *) pcibr_driver_unreg_callback,
- (pciio_device_unregister_f *) pcibr_device_unregister,
-};
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/seq_file.h>
-#include <linux/sched.h>
-#include <asm/smp.h>
-#include <asm/irq.h>
-#include <asm/hw_irq.h>
-#include <asm/system.h>
-#include <asm/sn/sgi.h>
-#include <asm/uaccess.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/io.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/xtalk/xtalk.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/intr.h>
-#include <asm/sn/sn2/shub_mmr.h>
-#include <asm/sn/sn2/shub_mmr_t.h>
-#include <asm/sal.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/sn/sndrv.h>
-#include <asm/sn/sn2/shubio.h>
-
-#define SHUB_NUM_ECF_REGISTERS 8
-
-static uint32_t shub_perf_counts[SHUB_NUM_ECF_REGISTERS];
-
-static shubreg_t shub_perf_counts_regs[SHUB_NUM_ECF_REGISTERS] = {
- SH_PERFORMANCE_COUNTER0,
- SH_PERFORMANCE_COUNTER1,
- SH_PERFORMANCE_COUNTER2,
- SH_PERFORMANCE_COUNTER3,
- SH_PERFORMANCE_COUNTER4,
- SH_PERFORMANCE_COUNTER5,
- SH_PERFORMANCE_COUNTER6,
- SH_PERFORMANCE_COUNTER7
-};
-
-static inline void
-shub_mmr_write(cnodeid_t cnode, shubreg_t reg, uint64_t val)
-{
- int nasid = cnodeid_to_nasid(cnode);
- volatile uint64_t *addr = (uint64_t *)(GLOBAL_MMR_ADDR(nasid, reg));
-
- *addr = val;
- __ia64_mf_a();
-}
-
-static inline void
-shub_mmr_write_iospace(cnodeid_t cnode, shubreg_t reg, uint64_t val)
-{
- int nasid = cnodeid_to_nasid(cnode);
-
- REMOTE_HUB_S(nasid, reg, val);
-}
-
-static inline void
-shub_mmr_write32(cnodeid_t cnode, shubreg_t reg, uint32_t val)
-{
- int nasid = cnodeid_to_nasid(cnode);
- volatile uint32_t *addr = (uint32_t *)(GLOBAL_MMR_ADDR(nasid, reg));
-
- *addr = val;
- __ia64_mf_a();
-}
-
-static inline uint64_t
-shub_mmr_read(cnodeid_t cnode, shubreg_t reg)
-{
- int nasid = cnodeid_to_nasid(cnode);
- volatile uint64_t val;
-
- val = *(uint64_t *)(GLOBAL_MMR_ADDR(nasid, reg));
- __ia64_mf_a();
-
- return val;
-}
-
-static inline uint64_t
-shub_mmr_read_iospace(cnodeid_t cnode, shubreg_t reg)
-{
- int nasid = cnodeid_to_nasid(cnode);
-
- return REMOTE_HUB_L(nasid, reg);
-}
-
-static inline uint32_t
-shub_mmr_read32(cnodeid_t cnode, shubreg_t reg)
-{
- int nasid = cnodeid_to_nasid(cnode);
- volatile uint32_t val;
-
- val = *(uint32_t *)(GLOBAL_MMR_ADDR(nasid, reg));
- __ia64_mf_a();
-
- return val;
-}
-
-static int
-reset_shub_stats(cnodeid_t cnode)
-{
- int i;
-
- for (i=0; i < SHUB_NUM_ECF_REGISTERS; i++) {
- shub_perf_counts[i] = 0;
- shub_mmr_write32(cnode, shub_perf_counts_regs[i], 0);
- }
- return 0;
-}
-
-static int
-configure_shub_stats(cnodeid_t cnode, unsigned long arg)
-{
- uint64_t *p = (uint64_t *)arg;
- uint64_t i;
- uint64_t regcnt;
- uint64_t regval[2];
-
- if (copy_from_user((void *)®cnt, p, sizeof(regcnt)))
- return -EFAULT;
-
- for (p++, i=0; i < regcnt; i++, p += 2) {
- if (copy_from_user((void *)regval, (void *)p, sizeof(regval)))
- return -EFAULT;
- if (regval[0] & 0x7) {
- printk("Error: configure_shub_stats: unaligned address 0x%016lx\n", regval[0]);
- return -EINVAL;
- }
- shub_mmr_write(cnode, (shubreg_t)regval[0], regval[1]);
- }
- return 0;
-}
-
-static int
-capture_shub_stats(cnodeid_t cnode, uint32_t *counts)
-{
- int i;
-
- for (i=0; i < SHUB_NUM_ECF_REGISTERS; i++) {
- counts[i] = shub_mmr_read32(cnode, shub_perf_counts_regs[i]);
- }
- return 0;
-}
-
-static int
-shubstats_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- cnodeid_t cnode;
- uint64_t longarg;
- uint64_t intarg;
- uint64_t regval[2];
- int nasid;
-
- cnode = (cnodeid_t)(u64)file->f_dentry->d_fsdata;
- if (cnode < 0 || cnode >= numnodes)
- return -ENODEV;
-
- switch (cmd) {
- case SNDRV_SHUB_CONFIGURE:
- return configure_shub_stats(cnode, arg);
- break;
-
- case SNDRV_SHUB_RESETSTATS:
- reset_shub_stats(cnode);
- break;
-
- case SNDRV_SHUB_INFOSIZE:
- longarg = sizeof(shub_perf_counts);
- if (copy_to_user((void *)arg, &longarg, sizeof(longarg))) {
- return -EFAULT;
- }
- break;
-
- case SNDRV_SHUB_GETSTATS:
- capture_shub_stats(cnode, shub_perf_counts);
- if (copy_to_user((void *)arg, shub_perf_counts,
- sizeof(shub_perf_counts))) {
- return -EFAULT;
- }
- break;
-
- case SNDRV_SHUB_GETNASID:
- nasid = cnodeid_to_nasid(cnode);
- if (copy_to_user((void *)arg, &nasid,
- sizeof(nasid))) {
- return -EFAULT;
- }
- break;
-
- case SNDRV_SHUB_GETMMR32:
- intarg = shub_mmr_read32(cnode, arg);
- if (copy_to_user((void *)arg, &intarg,
- sizeof(intarg))) {
- return -EFAULT;
- }
- break;
-
- case SNDRV_SHUB_GETMMR64:
- case SNDRV_SHUB_GETMMR64_IO:
- if (cmd == SNDRV_SHUB_GETMMR64)
- longarg = shub_mmr_read(cnode, arg);
- else
- longarg = shub_mmr_read_iospace(cnode, arg);
- if (copy_to_user((void *)arg, &longarg, sizeof(longarg)))
- return -EFAULT;
- break;
-
- case SNDRV_SHUB_PUTMMR64:
- case SNDRV_SHUB_PUTMMR64_IO:
- if (copy_from_user((void *)regval, (void *)arg, sizeof(regval)))
- return -EFAULT;
- if (regval[0] & 0x7) {
- printk("Error: configure_shub_stats: unaligned address 0x%016lx\n", regval[0]);
- return -EINVAL;
- }
- if (cmd == SNDRV_SHUB_PUTMMR64)
- shub_mmr_write(cnode, (shubreg_t)regval[0], regval[1]);
- else
- shub_mmr_write_iospace(cnode, (shubreg_t)regval[0], regval[1]);
- break;
-
- default:
- return -EINVAL;
- }
-
- return 0;
-}
-
-struct file_operations shub_mon_fops = {
- .ioctl = shubstats_ioctl,
-};
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <asm/sn/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/driver.h>
-#include <asm/param.h>
-#include <asm/sn/pio.h>
-#include <asm/sn/xtalk/xwidget.h>
-#include <asm/sn/io.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/hcl_util.h>
-#include <asm/sn/intr.h>
-#include <asm/sn/xtalk/xtalkaddrs.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/sn2/shub_mmr.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-
-/* ARGSUSED */
-void
-hub_intr_init(vertex_hdl_t hubv)
-{
-}
-
-xwidgetnum_t
-hub_widget_id(nasid_t nasid)
-{
-
- if (!(nasid & 1)) {
- hubii_wcr_t ii_wcr; /* the control status register */
- ii_wcr.wcr_reg_value = REMOTE_HUB_L(nasid,IIO_WCR);
- return ii_wcr.wcr_fields_s.wcr_widget_id;
- } else {
- /* ICE does not have widget id. */
- return(-1);
- }
-}
-
-static hub_intr_t
-do_hub_intr_alloc(vertex_hdl_t dev,
- device_desc_t dev_desc,
- vertex_hdl_t owner_dev,
- int uncond_nothread)
-{
- cpuid_t cpu;
- int vector;
- hub_intr_t intr_hdl;
- cnodeid_t cnode;
- int cpuphys, slice;
- int nasid;
- iopaddr_t xtalk_addr;
- struct xtalk_intr_s *xtalk_info;
- xwidget_info_t xwidget_info;
-
- cpu = intr_heuristic(dev, -1, &vector);
- if (cpu == CPU_NONE) {
- printk("Unable to allocate interrupt for 0x%p\n", (void *)owner_dev);
- return(0);
- }
-
- cpuphys = cpu_physical_id(cpu);
- slice = cpu_physical_id_to_slice(cpuphys);
- nasid = cpu_physical_id_to_nasid(cpuphys);
- cnode = cpuid_to_cnodeid(cpu);
-
- if (slice) {
- xtalk_addr = SH_II_INT1 | ((unsigned long)nasid << 36) | (1UL << 47);
- } else {
- xtalk_addr = SH_II_INT0 | ((unsigned long)nasid << 36) | (1UL << 47);
- }
-
- intr_hdl = kmalloc(sizeof(struct hub_intr_s), GFP_KERNEL);
- ASSERT_ALWAYS(intr_hdl);
- memset(intr_hdl, 0, sizeof(struct hub_intr_s));
-
- xtalk_info = &intr_hdl->i_xtalk_info;
- xtalk_info->xi_dev = dev;
- xtalk_info->xi_vector = vector;
- xtalk_info->xi_addr = xtalk_addr;
-
- xwidget_info = xwidget_info_get(dev);
- if (xwidget_info) {
- xtalk_info->xi_target = xwidget_info_masterid_get(xwidget_info);
- }
-
- intr_hdl->i_cpuid = cpu;
- intr_hdl->i_bit = vector;
- intr_hdl->i_flags |= HUB_INTR_IS_ALLOCED;
-
- return intr_hdl;
-}
-
-hub_intr_t
-hub_intr_alloc(vertex_hdl_t dev,
- device_desc_t dev_desc,
- vertex_hdl_t owner_dev)
-{
- return(do_hub_intr_alloc(dev, dev_desc, owner_dev, 0));
-}
-
-hub_intr_t
-hub_intr_alloc_nothd(vertex_hdl_t dev,
- device_desc_t dev_desc,
- vertex_hdl_t owner_dev)
-{
- return(do_hub_intr_alloc(dev, dev_desc, owner_dev, 1));
-}
-
-void
-hub_intr_free(hub_intr_t intr_hdl)
-{
- cpuid_t cpu = intr_hdl->i_cpuid;
- int vector = intr_hdl->i_bit;
- xtalk_intr_t xtalk_info;
-
- if (intr_hdl->i_flags & HUB_INTR_IS_CONNECTED) {
- xtalk_info = &intr_hdl->i_xtalk_info;
- xtalk_info->xi_dev = 0;
- xtalk_info->xi_vector = 0;
- xtalk_info->xi_addr = 0;
- hub_intr_disconnect(intr_hdl);
- }
-
- if (intr_hdl->i_flags & HUB_INTR_IS_ALLOCED) {
- kfree(intr_hdl);
- }
- intr_unreserve_level(cpu, vector);
-}
-
-int
-hub_intr_connect(hub_intr_t intr_hdl,
- intr_func_t intr_func, /* xtalk intr handler */
- void *intr_arg, /* arg to intr handler */
- xtalk_intr_setfunc_t setfunc,
- void *setfunc_arg)
-{
- int rv;
- cpuid_t cpu = intr_hdl->i_cpuid;
- int vector = intr_hdl->i_bit;
-
- ASSERT(intr_hdl->i_flags & HUB_INTR_IS_ALLOCED);
-
- rv = intr_connect_level(cpu, vector);
- if (rv < 0)
- return rv;
-
- intr_hdl->i_xtalk_info.xi_setfunc = setfunc;
- intr_hdl->i_xtalk_info.xi_sfarg = setfunc_arg;
-
- if (setfunc) {
- (*setfunc)((xtalk_intr_t)intr_hdl);
- }
-
- intr_hdl->i_flags |= HUB_INTR_IS_CONNECTED;
-
- return 0;
-}
-
-/*
- * Disassociate handler with the specified interrupt.
- */
-void
-hub_intr_disconnect(hub_intr_t intr_hdl)
-{
- /*REFERENCED*/
- int rv;
- cpuid_t cpu = intr_hdl->i_cpuid;
- int bit = intr_hdl->i_bit;
- xtalk_intr_setfunc_t setfunc;
-
- setfunc = intr_hdl->i_xtalk_info.xi_setfunc;
-
- /* TBD: send disconnected interrupts somewhere harmless */
- if (setfunc) (*setfunc)((xtalk_intr_t)intr_hdl);
-
- rv = intr_disconnect_level(cpu, bit);
- ASSERT(rv == 0);
- intr_hdl->i_flags &= ~HUB_INTR_IS_CONNECTED;
-}
-
-/*
- * Redirect an interrupt to another cpu.
- */
-
-void
-sn_shub_redirect_intr(pcibr_intr_t intr, unsigned long cpu)
-{
- unsigned long bit;
- int cpuphys, slice;
- nasid_t nasid;
- unsigned long xtalk_addr;
- int irq;
- int i;
- int old_cpu;
- int new_cpu;
-
- cpuphys = cpu_physical_id(cpu);
- slice = cpu_physical_id_to_slice(cpuphys);
- nasid = cpu_physical_id_to_nasid(cpuphys);
-
- for (i = CPUS_PER_NODE - 1; i >= 0; i--) {
- new_cpu = nasid_slice_to_cpuid(nasid, i);
- if (new_cpu == NR_CPUS) {
- continue;
- }
-
- if (!cpu_online(new_cpu)) {
- continue;
- }
- break;
- }
-
- if (enable_shub_wars_1_1() && slice != i) {
- printk("smp_affinity WARNING: SHUB 1.1 present: cannot target cpu %d, targeting cpu %d instead.\n",(int)cpu, new_cpu);
- cpu = new_cpu;
- slice = i;
- }
-
- if (slice) {
- xtalk_addr = SH_II_INT1 | ((unsigned long)nasid << 36) | (1UL << 47);
- } else {
- xtalk_addr = SH_II_INT0 | ((unsigned long)nasid << 36) | (1UL << 47);
- }
-
- for (bit = 0; bit < 8; bit++) {
- if (intr->bi_ibits & (1 << bit) ) {
- /* Disable interrupts. */
- pcireg_intr_enable_bit_clr(intr->bi_soft, bit);
- /* Reset Host address (Interrupt destination) */
- pcireg_intr_addr_addr_set(intr->bi_soft, bit, xtalk_addr);
- /* Enable interrupt */
- pcireg_intr_enable_bit_set(intr->bi_soft, bit);
- /* Force an interrupt, just in case. */
- pcireg_force_intr_set(intr->bi_soft, bit);
- }
- }
- irq = intr->bi_irq;
- old_cpu = intr->bi_cpu;
- if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq) {
- pdacpu(cpu)->sn_first_irq = irq;
- }
- if (pdacpu(cpu)->sn_last_irq < irq) {
- pdacpu(cpu)->sn_last_irq = irq;
- }
- pdacpu(old_cpu)->sn_num_irqs--;
- pdacpu(cpu)->sn_num_irqs++;
- intr->bi_cpu = (int)cpu;
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000,2002-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/irq.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/smp.h>
-#include <asm/delay.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/io.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/xtalk/xtalk.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/intr.h>
-#include <asm/sn/ioerror_handling.h>
-#include <asm/sn/ioerror.h>
-#include <asm/sn/sn2/shubio.h>
-#include <asm/sn/sn2/shub_mmr.h>
-#include <asm/sn/bte.h>
-
-extern void hubni_eint_init(cnodeid_t cnode);
-extern void hubii_eint_init(cnodeid_t cnode);
-extern irqreturn_t hubii_eint_handler (int irq, void *arg, struct pt_regs *ep);
-int hubiio_crb_error_handler(vertex_hdl_t hub_v, hubinfo_t hinfo);
-int hubiio_prb_error_handler(vertex_hdl_t hub_v, hubinfo_t hinfo);
-extern void bte_crb_error_handler(vertex_hdl_t hub_v, int btenum, int crbnum, ioerror_t *ioe, int bteop);
-void print_crb_fields(int crb_num, ii_icrb0_a_u_t icrba,
- ii_icrb0_b_u_t icrbb, ii_icrb0_c_u_t icrbc,
- ii_icrb0_d_u_t icrbd, ii_icrb0_e_u_t icrbe);
-
-extern int maxcpus;
-extern error_return_code_t error_state_set(vertex_hdl_t v,error_state_t new_state);
-
-#define HUB_ERROR_PERIOD (120 * HZ) /* 2 minutes */
-
-void
-hub_error_clear(nasid_t nasid)
-{
- int i;
-
- /*
- * Make sure spurious write response errors are cleared
- * (values are from hub_set_prb())
- */
- for (i = 0; i <= HUB_WIDGET_ID_MAX - HUB_WIDGET_ID_MIN + 1; i++) {
- iprb_t prb;
-
- prb.iprb_regval = REMOTE_HUB_L(nasid, IIO_IOPRB_0 + (i * sizeof(hubreg_t)));
-
- /* Clear out some fields */
- prb.iprb_ovflow = 1;
- prb.iprb_bnakctr = 0;
- prb.iprb_anakctr = 0;
-
- prb.iprb_xtalkctr = 3; /* approx. PIO credits for the widget */
-
- REMOTE_HUB_S(nasid, IIO_IOPRB_0 + (i * sizeof(hubreg_t)), prb.iprb_regval);
- }
-
- REMOTE_HUB_S(nasid, IIO_IECLR, -1);
-
-}
-
-
-/*
- * Function : hub_error_init
- * Purpose : initialize the error handling requirements for a given hub.
- * Parameters : cnode, the compact nodeid.
- * Assumptions : Called only once per hub, either by a local cpu. Or by a
- * remote cpu, when this hub is headless.(cpuless)
- * Returns : None
- */
-
-void
-hub_error_init(cnodeid_t cnode)
-{
- nasid_t nasid;
-
- nasid = cnodeid_to_nasid(cnode);
- hub_error_clear(nasid);
-
-
- /*
- * Now setup the hub ii error interrupt handler.
- */
-
- hubii_eint_init(cnode);
-
- return;
-}
-
-/*
- * Function : hubii_eint_init
- * Parameters : cnode
- * Purpose : to initialize the hub iio error interrupt.
- * Assumptions : Called once per hub, by the cpu which will ultimately
- * handle this interrupt.
- * Returns : None.
- */
-
-void
-hubii_eint_init(cnodeid_t cnode)
-{
- int bit, rv;
- ii_iidsr_u_t hubio_eint;
- hubinfo_t hinfo;
- cpuid_t intr_cpu;
- vertex_hdl_t hub_v;
- int bit_pos_to_irq(int bit);
- ii_ilcsr_u_t ilcsr;
-
-
- hub_v = (vertex_hdl_t)cnodeid_to_vertex(cnode);
- ASSERT_ALWAYS(hub_v);
- hubinfo_get(hub_v, &hinfo);
-
- ASSERT(hinfo);
- ASSERT(hinfo->h_cnodeid == cnode);
-
- ilcsr.ii_ilcsr_regval = REMOTE_HUB_L(hinfo->h_nasid, IIO_ILCSR);
- if ((ilcsr.ii_ilcsr_fld_s.i_llp_stat & 0x2) == 0) {
- /*
- * HUB II link is not up. Disable LLP. Clear old errors.
- * Enable interrupts to handle BTE errors.
- */
- ilcsr.ii_ilcsr_fld_s.i_llp_en = 0;
- REMOTE_HUB_S(hinfo->h_nasid, IIO_ILCSR, ilcsr.ii_ilcsr_regval);
- }
-
- /* Select a possible interrupt target where there is a free interrupt
- * bit and also reserve the interrupt bit for this IO error interrupt
- */
- intr_cpu = intr_heuristic(hub_v, SGI_II_ERROR, &bit);
- if (intr_cpu == CPU_NONE) {
- printk("hubii_eint_init: intr_heuristic failed, cnode %d", cnode);
- return;
- }
-
- rv = intr_connect_level(intr_cpu, SGI_II_ERROR);
- request_irq(SGI_II_ERROR, hubii_eint_handler, SA_SHIRQ, "SN_hub_error", (void *)hub_v);
- irq_descp(bit)->status |= SN2_IRQ_PER_HUB;
- ASSERT_ALWAYS(rv >= 0);
- hubio_eint.ii_iidsr_regval = 0;
- hubio_eint.ii_iidsr_fld_s.i_enable = 1;
- hubio_eint.ii_iidsr_fld_s.i_level = bit;/* Take the least significant bits*/
- hubio_eint.ii_iidsr_fld_s.i_node = cnodeid_to_nasid(cnode);
- hubio_eint.ii_iidsr_fld_s.i_pi_id = cpuid_to_subnode(intr_cpu);
- REMOTE_HUB_S(hinfo->h_nasid, IIO_IIDSR, hubio_eint.ii_iidsr_regval);
-
-}
-
-
-/*ARGSUSED*/
-irqreturn_t
-hubii_eint_handler (int irq, void *arg, struct pt_regs *ep)
-{
- vertex_hdl_t hub_v;
- hubinfo_t hinfo;
- ii_wstat_u_t wstat;
- hubreg_t idsr;
-
-
- /* two levels of casting avoids compiler warning.!! */
- hub_v = (vertex_hdl_t)(long)(arg);
- ASSERT(hub_v);
-
- hubinfo_get(hub_v, &hinfo);
-
- idsr = REMOTE_HUB_L(hinfo->h_nasid, IIO_ICMR);
-#if 0
- if (idsr & 0x1) {
- /* ICMR bit is set .. we are getting into "Spurious Interrupts condition. */
- printk("Cnode %d II has seen the ICMR condition\n", hinfo->h_cnodeid);
- printk("***** Please file PV with the above messages *****\n");
- /* panic("We have to panic to prevent further unknown states ..\n"); */
- }
-#endif
-
- /*
- * Identify the reason for error.
- */
- wstat.ii_wstat_regval = REMOTE_HUB_L(hinfo->h_nasid, IIO_WSTAT);
-
- if (wstat.ii_wstat_fld_s.w_crazy) {
- char *reason;
- /*
- * We can do a couple of things here.
- * Look at the fields TX_MX_RTY/XT_TAIL_TO/XT_CRD_TO to check
- * which of these caused the CRAZY bit to be set.
- * You may be able to check if the Link is up really.
- */
- if (wstat.ii_wstat_fld_s.w_tx_mx_rty)
- reason = "Micro Packet Retry Timeout";
- else if (wstat.ii_wstat_fld_s.w_xt_tail_to)
- reason = "Crosstalk Tail Timeout";
- else if (wstat.ii_wstat_fld_s.w_xt_crd_to)
- reason = "Crosstalk Credit Timeout";
- else {
- hubreg_t hubii_imem;
- /*
- * Check if widget 0 has been marked as shutdown, or
- * if BTE 0/1 has been marked.
- */
- hubii_imem = REMOTE_HUB_L(hinfo->h_nasid, IIO_IMEM);
- if (hubii_imem & IIO_IMEM_W0ESD)
- reason = "Hub Widget 0 has been Shutdown";
- else if (hubii_imem & IIO_IMEM_B0ESD)
- reason = "BTE 0 has been shutdown";
- else if (hubii_imem & IIO_IMEM_B1ESD)
- reason = "BTE 1 has been shutdown";
- else reason = "Unknown";
-
- }
- /*
- * Only print the II_ECRAZY message if there is an attached xbow.
- */
- if (NODEPDA(hinfo->h_cnodeid)->xbow_vhdl != 0) {
- printk("Hub %d, cnode %d to Xtalk Link failed (II_ECRAZY) Reason: %s",
- hinfo->h_nasid, hinfo->h_cnodeid, reason);
- }
- }
-
-
- /*
- * Before processing any interrupt related information, clear all
- * error indication and reenable interrupts. This will prevent
- * lost interrupts due to the interrupt handler scanning past a PRB/CRB
- * which has not errorred yet and then the PRB/CRB goes into error.
- * Note, PRB errors are cleared individually.
- */
- REMOTE_HUB_S(hinfo->h_nasid, IIO_IECLR, 0xff0000);
- idsr = REMOTE_HUB_L(hinfo->h_nasid, IIO_IIDSR) & ~IIO_IIDSR_SENT_MASK;
- REMOTE_HUB_S(hinfo->h_nasid, IIO_IIDSR, idsr);
-
-
- /*
- * It's a toss as to which one among PRB/CRB to check first.
- * Current decision is based on the severity of the errors.
- * IO CRB errors tend to be more severe than PRB errors.
- *
- * It is possible for BTE errors to have been handled already, so we
- * may not see any errors handled here.
- */
- (void)hubiio_crb_error_handler(hub_v, hinfo);
- (void)hubiio_prb_error_handler(hub_v, hinfo);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Free the hub CRB "crbnum" which encountered an error.
- * Assumption is, error handling was successfully done,
- * and we now want to return the CRB back to Hub for normal usage.
- *
- * In order to free the CRB, all that's needed is to de-allocate it
- *
- * Assumption:
- * No other processor is mucking around with the hub control register.
- * So, upper layer has to single thread this.
- */
-void
-hubiio_crb_free(hubinfo_t hinfo, int crbnum)
-{
- ii_icrb0_b_u_t icrbb;
-
- /*
- * The hardware does NOT clear the mark bit, so it must get cleared
- * here to be sure the error is not processed twice.
- */
- icrbb.ii_icrb0_b_regval = REMOTE_HUB_L(hinfo->h_nasid, IIO_ICRB_B(crbnum));
- icrbb.b_mark = 0;
- REMOTE_HUB_S(hinfo->h_nasid, IIO_ICRB_B(crbnum), icrbb.ii_icrb0_b_regval);
-
- /*
- * Deallocate the register.
- */
-
- REMOTE_HUB_S(hinfo->h_nasid, IIO_ICDR, (IIO_ICDR_PND | crbnum));
-
- /*
- * Wait till hub indicates it's done.
- */
- while (REMOTE_HUB_L(hinfo->h_nasid, IIO_ICDR) & IIO_ICDR_PND)
- udelay(1);
-
-}
-
-
-/*
- * Array of error names that get logged in CRBs
- */
-char *hubiio_crb_errors[] = {
- "Directory Error",
- "CRB Poison Error",
- "I/O Write Error",
- "I/O Access Error",
- "I/O Partial Write Error",
- "I/O Partial Read Error",
- "I/O Timeout Error",
- "Xtalk Error Packet"
-};
-
-void
-print_crb_fields(int crb_num, ii_icrb0_a_u_t icrba,
- ii_icrb0_b_u_t icrbb, ii_icrb0_c_u_t icrbc,
- ii_icrb0_d_u_t icrbd, ii_icrb0_e_u_t icrbe)
-{
- printk("CRB %d regA\n\t"
- "a_iow 0x%x\n\t"
- "valid0x%x\n\t"
- "Address0x%lx\n\t"
- "a_tnum 0x%x\n\t"
- "a_sidn 0x%x\n",
- crb_num,
- icrba.a_iow,
- icrba.a_valid,
- icrba.a_addr,
- icrba.a_tnum,
- icrba.a_sidn);
- printk("CRB %d regB\n\t"
- "b_imsgtype 0x%x\n\t"
- "b_imsg 0x%x\n"
- "\tb_use_old 0x%x\n\t"
- "b_initiator 0x%x\n\t"
- "b_exc 0x%x\n"
- "\tb_ackcnt 0x%x\n\t"
- "b_resp 0x%x\n\t"
- "b_ack 0x%x\n"
- "\tb_hold 0x%x\n\t"
- "b_wb 0x%x\n\t"
- "b_intvn 0x%x\n"
- "\tb_stall_ib 0x%x\n\t"
- "b_stall_int 0x%x\n"
- "\tb_stall_bte_0 0x%x\n\t"
- "b_stall_bte_1 0x%x\n"
- "\tb_error 0x%x\n\t"
- "b_lnetuce 0x%x\n\t"
- "b_mark 0x%x\n\t"
- "b_xerr 0x%x\n",
- crb_num,
- icrbb.b_imsgtype,
- icrbb.b_imsg,
- icrbb.b_use_old,
- icrbb.b_initiator,
- icrbb.b_exc,
- icrbb.b_ackcnt,
- icrbb.b_resp,
- icrbb.b_ack,
- icrbb.b_hold,
- icrbb.b_wb,
- icrbb.b_intvn,
- icrbb.b_stall_ib,
- icrbb.b_stall_int,
- icrbb.b_stall_bte_0,
- icrbb.b_stall_bte_1,
- icrbb.b_error,
- icrbb.b_lnetuce,
- icrbb.b_mark,
- icrbb.b_xerr);
- printk("CRB %d regC\n\t"
- "c_source 0x%x\n\t"
- "c_xtsize 0x%x\n\t"
- "c_cohtrans 0x%x\n\t"
- "c_btenum 0x%x\n\t"
- "c_gbr 0x%x\n\t"
- "c_doresp 0x%x\n\t"
- "c_barrop 0x%x\n\t"
- "c_suppl 0x%x\n",
- crb_num,
- icrbc.c_source,
- icrbc.c_xtsize,
- icrbc.c_cohtrans,
- icrbc.c_btenum,
- icrbc.c_gbr,
- icrbc.c_doresp,
- icrbc.c_barrop,
- icrbc.c_suppl);
- printk("CRB %d regD\n\t"
- "d_bteaddr 0x%lx\n\t"
- "d_bteop 0x%x\n\t"
- "d_pripsc 0x%x\n\t"
- "d_pricnt 0x%x\n\t"
- "d_sleep 0x%x\n\t",
- crb_num,
- icrbd.d_bteaddr,
- icrbd.d_bteop,
- icrbd.d_pripsc,
- icrbd.d_pricnt,
- icrbd.d_sleep);
- printk("CRB %d regE\n\t"
- "icrbe_timeout 0x%x\n\t"
- "icrbe_context 0x%x\n\t"
- "icrbe_toutvld 0x%x\n\t"
- "icrbe_ctxtvld 0x%x\n\t",
- crb_num,
- icrbe.icrbe_timeout,
- icrbe.icrbe_context,
- icrbe.icrbe_toutvld,
- icrbe.icrbe_ctxtvld);
-}
-
-/*
- * hubiio_crb_error_handler
- *
- * This routine gets invoked when a hub gets an error
- * interrupt. So, the routine is running in interrupt context
- * at error interrupt level.
- * Action:
- * It's responsible for identifying ALL the CRBs that are marked
- * with error, and process them.
- *
- * If you find the CRB that's marked with error, map this to the
- * reason it caused error, and invoke appropriate error handler.
- *
- * XXX Be aware of the information in the context register.
- *
- * NOTE:
- * Use REMOTE_HUB_* macro instead of LOCAL_HUB_* so that the interrupt
- * handler can be run on any node. (not necessarily the node
- * corresponding to the hub that encountered error).
- */
-
-int
-hubiio_crb_error_handler(vertex_hdl_t hub_v, hubinfo_t hinfo)
-{
- cnodeid_t cnode;
- nasid_t nasid;
- ii_icrb0_a_u_t icrba; /* II CRB Register A */
- ii_icrb0_b_u_t icrbb; /* II CRB Register B */
- ii_icrb0_c_u_t icrbc; /* II CRB Register C */
- ii_icrb0_d_u_t icrbd; /* II CRB Register D */
- ii_icrb0_e_u_t icrbe; /* II CRB Register D */
- int i;
- int num_errors = 0; /* Num of errors handled */
- ioerror_t ioerror;
- int rc;
-
- nasid = hinfo->h_nasid;
- cnode = nasid_to_cnodeid(nasid);
-
- /*
- * XXX - Add locking for any recovery actions
- */
- /*
- * Scan through all CRBs in the Hub, and handle the errors
- * in any of the CRBs marked.
- */
- for (i = 0; i < IIO_NUM_CRBS; i++) {
- /* Check this crb entry to see if it is in error. */
- icrbb.ii_icrb0_b_regval = REMOTE_HUB_L(nasid, IIO_ICRB_B(i));
-
- if (icrbb.b_mark == 0) {
- continue;
- }
-
- icrba.ii_icrb0_a_regval = REMOTE_HUB_L(nasid, IIO_ICRB_A(i));
-
- IOERROR_INIT(&ioerror);
-
- /* read other CRB error registers. */
- icrbc.ii_icrb0_c_regval = REMOTE_HUB_L(nasid, IIO_ICRB_C(i));
- icrbd.ii_icrb0_d_regval = REMOTE_HUB_L(nasid, IIO_ICRB_D(i));
- icrbe.ii_icrb0_e_regval = REMOTE_HUB_L(nasid, IIO_ICRB_E(i));
-
- IOERROR_SETVALUE(&ioerror,errortype,icrbb.b_ecode);
-
- /* Check if this error is due to BTE operation,
- * and handle it separately.
- */
- if (icrbd.d_bteop ||
- ((icrbb.b_initiator == IIO_ICRB_INIT_BTE0 ||
- icrbb.b_initiator == IIO_ICRB_INIT_BTE1) &&
- (icrbb.b_imsgtype == IIO_ICRB_IMSGT_BTE ||
- icrbb.b_imsgtype == IIO_ICRB_IMSGT_SN1NET))){
-
- int bte_num;
-
- if (icrbd.d_bteop)
- bte_num = icrbc.c_btenum;
- else /* b_initiator bit 2 gives BTE number */
- bte_num = (icrbb.b_initiator & 0x4) >> 2;
-
- hubiio_crb_free(hinfo, i);
-
- bte_crb_error_handler(hub_v, bte_num,
- i, &ioerror,
- icrbd.d_bteop);
- num_errors++;
- continue;
- }
-
- /*
- * XXX
- * Assuming the only other error that would reach here is
- * crosstalk errors.
- * If CRB times out on a message from Xtalk, it changes
- * the message type to CRB.
- *
- * If we get here due to other errors (SN0net/CRB)
- * what's the action ?
- */
-
- /*
- * Pick out the useful fields in CRB, and
- * tuck them away into ioerror structure.
- */
- IOERROR_SETVALUE(&ioerror,xtalkaddr,icrba.a_addr << IIO_ICRB_ADDR_SHFT);
- IOERROR_SETVALUE(&ioerror,widgetnum,icrba.a_sidn);
-
-
- if (icrba.a_iow){
- /*
- * XXX We shouldn't really have BRIDGE-specific code
- * here, but alas....
- *
- * The BRIDGE (or XBRIDGE) sets the upper bit of TNUM
- * to indicate a WRITE operation. It sets the next
- * bit to indicate an INTERRUPT operation. The bottom
- * 3 bits of TNUM indicate which device was responsible.
- */
- IOERROR_SETVALUE(&ioerror,widgetdev,
- TNUM_TO_WIDGET_DEV(icrba.a_tnum));
- /*
- * The encoding of TNUM (see comments above) is
- * different for PIC. So we'll save TNUM here and
- * deal with the differences later when we can
- * determine if we're using a Bridge or the PIC.
- *
- * XXX: We may be able to remove saving the widgetdev
- * above and just sort it out of TNUM later.
- */
- IOERROR_SETVALUE(&ioerror, tnum, icrba.a_tnum);
-
- }
- if (icrbb.b_error) {
- /*
- * CRB 'i' has some error. Identify the type of error,
- * and try to handle it.
- *
- */
- switch(icrbb.b_ecode) {
- case IIO_ICRB_ECODE_PERR:
- case IIO_ICRB_ECODE_WERR:
- case IIO_ICRB_ECODE_AERR:
- case IIO_ICRB_ECODE_PWERR:
- case IIO_ICRB_ECODE_TOUT:
- case IIO_ICRB_ECODE_XTERR:
- printk("Shub II CRB %d: error %s on hub cnodeid: %d",
- i, hubiio_crb_errors[icrbb.b_ecode], cnode);
- /*
- * Any sort of write error is mostly due
- * bad programming (Note it's not a timeout.)
- * So, invoke hub_iio_error_handler with
- * appropriate information.
- */
- IOERROR_SETVALUE(&ioerror,errortype,icrbb.b_ecode);
-
- /* Go through the error bit lookup phase */
- if (error_state_set(hub_v, ERROR_STATE_LOOKUP) ==
- ERROR_RETURN_CODE_CANNOT_SET_STATE)
- return(IOERROR_UNHANDLED);
- rc = hub_ioerror_handler(
- hub_v,
- DMA_WRITE_ERROR,
- MODE_DEVERROR,
- &ioerror);
- if (rc == IOERROR_HANDLED) {
- rc = hub_ioerror_handler(
- hub_v,
- DMA_WRITE_ERROR,
- MODE_DEVREENABLE,
- &ioerror);
- }else {
- printk("Unable to handle %s on hub %d",
- hubiio_crb_errors[icrbb.b_ecode],
- cnode);
- /* panic; */
- }
- /* Go to Next error */
- print_crb_fields(i, icrba, icrbb, icrbc,
- icrbd, icrbe);
- hubiio_crb_free(hinfo, i);
- continue;
- case IIO_ICRB_ECODE_PRERR:
- case IIO_ICRB_ECODE_DERR:
- printk("Shub II CRB %d: error %s on hub : %d",
- i, hubiio_crb_errors[icrbb.b_ecode], cnode);
- /* panic */
- default:
- printk("Shub II CRB error (code : %d) on hub : %d",
- icrbb.b_ecode, cnode);
- /* panic */
- }
- }
- /*
- * Error is not indicated via the errcode field
- * Check other error indications in this register.
- */
- if (icrbb.b_xerr) {
- printk("Shub II CRB %d: Xtalk Packet with error bit set to hub %d",
- i, cnode);
- /* panic */
- }
- if (icrbb.b_lnetuce) {
- printk("Shub II CRB %d: Uncorrectable data error detected on data "
- " from NUMAlink to node %d",
- i, cnode);
- /* panic */
- }
- print_crb_fields(i, icrba, icrbb, icrbc, icrbd, icrbe);
-
-
-
-
-
- if (icrbb.b_error) {
- /*
- * CRB 'i' has some error. Identify the type of error,
- * and try to handle it.
- */
- switch(icrbb.b_ecode) {
- case IIO_ICRB_ECODE_PERR:
- case IIO_ICRB_ECODE_WERR:
- case IIO_ICRB_ECODE_AERR:
- case IIO_ICRB_ECODE_PWERR:
-
- printk("%s on hub cnodeid: %d",
- hubiio_crb_errors[icrbb.b_ecode], cnode);
- /*
- * Any sort of write error is mostly due
- * bad programming (Note it's not a timeout.)
- * So, invoke hub_iio_error_handler with
- * appropriate information.
- */
- IOERROR_SETVALUE(&ioerror,errortype,icrbb.b_ecode);
-
- rc = hub_ioerror_handler(
- hub_v,
- DMA_WRITE_ERROR,
- MODE_DEVERROR,
- &ioerror);
-
- if (rc == IOERROR_HANDLED) {
- rc = hub_ioerror_handler(
- hub_v,
- DMA_WRITE_ERROR,
- MODE_DEVREENABLE,
- &ioerror);
- ASSERT(rc == IOERROR_HANDLED);
- }else {
-
- panic("Unable to handle %s on hub %d",
- hubiio_crb_errors[icrbb.b_ecode],
- cnode);
- /*NOTREACHED*/
- }
- /* Go to Next error */
- hubiio_crb_free(hinfo, i);
- continue;
-
- case IIO_ICRB_ECODE_PRERR:
-
- case IIO_ICRB_ECODE_TOUT:
- case IIO_ICRB_ECODE_XTERR:
-
- case IIO_ICRB_ECODE_DERR:
- panic("Fatal %s on hub : %d",
- hubiio_crb_errors[icrbb.b_ecode], cnode);
- /*NOTREACHED*/
-
- default:
- panic("Fatal error (code : %d) on hub : %d",
- icrbb.b_ecode, cnode);
- /*NOTREACHED*/
-
- }
- } /* if (icrbb.b_error) */
-
- /*
- * Error is not indicated via the errcode field
- * Check other error indications in this register.
- */
-
- if (icrbb.b_xerr) {
- panic("Xtalk Packet with error bit set to hub %d",
- cnode);
- /*NOTREACHED*/
- }
-
- if (icrbb.b_lnetuce) {
- panic("Uncorrectable data error detected on data "
- " from Craylink to node %d",
- cnode);
- /*NOTREACHED*/
- }
-
- }
- return num_errors;
-}
-
-/*
- * hubii_check_widget_disabled
- *
- * Check if PIO access to the specified widget is disabled due
- * to any II errors that are currently set.
- *
- * The specific error bits checked are:
- * IPRBx register: SPUR_RD (51)
- * SPUR_WR (50)
- * RD_TO (49)
- * ERROR (48)
- *
- * WSTAT register: CRAZY (32)
- */
-
-int
-hubii_check_widget_disabled(nasid_t nasid, int wnum)
-{
- iprb_t iprb;
- ii_wstat_u_t wstat;
-
- iprb.iprb_regval = REMOTE_HUB_L(nasid, IIO_IOPRB(wnum));
- if (iprb.iprb_regval & (IIO_PRB_SPUR_RD | IIO_PRB_SPUR_WR |
- IIO_PRB_RD_TO | IIO_PRB_ERROR)) {
-#ifdef DEBUG
- printk(KERN_WARNING "II error, IPRB%x=0x%lx\n", wnum, iprb.iprb_regval);
-#endif
- return(1);
- }
-
- wstat.ii_wstat_regval = REMOTE_HUB_L(nasid, IIO_WSTAT);
- if (wstat.ii_wstat_regval & IIO_WSTAT_ECRAZY) {
-#ifdef DEBUG
- printk(KERN_WARNING "II error, WSTAT=0x%lx\n", wstat.ii_wstat_regval);
-#endif
- return(1);
- }
- return(0);
-}
-
-/*ARGSUSED*/
-/*
- * hubii_prb_handler
- * Handle the error reported in the PRB for wiget number wnum.
- * This typically happens on a PIO write error.
- * There is nothing much we can do in this interrupt context for
- * PIO write errors. For e.g. QL scsi controller has the
- * habit of flaking out on PIO writes.
- * Print a message and try to continue for now
- * Cleanup involes freeing the PRB register
- */
-static void
-hubii_prb_handler(vertex_hdl_t hub_v, hubinfo_t hinfo, int wnum)
-{
- nasid_t nasid;
-
- nasid = hinfo->h_nasid;
- /*
- * Clear error bit by writing to IECLR register.
- */
- REMOTE_HUB_S(nasid, IIO_IECLR, (1 << wnum));
- /*
- * PIO Write to Widget 'i' got into an error.
- * Invoke hubiio_error_handler with this information.
- */
- printk( "Hub nasid %d got a PIO Write error from widget %d, "
- "cleaning up and continuing", nasid, wnum);
- /*
- * XXX
- * It may be necessary to adjust IO PRB counter
- * to account for any lost credits.
- */
-}
-
-int
-hubiio_prb_error_handler(vertex_hdl_t hub_v, hubinfo_t hinfo)
-{
- int wnum;
- nasid_t nasid;
- int num_errors = 0;
- iprb_t iprb;
-
- nasid = hinfo->h_nasid;
- /*
- * Check if IPRB0 has any error first.
- */
- iprb.iprb_regval = REMOTE_HUB_L(nasid, IIO_IOPRB(0));
- if (iprb.iprb_error) {
- num_errors++;
- hubii_prb_handler(hub_v, hinfo, 0);
- }
- /*
- * Look through PRBs 8 - F to see if any of them has error bit set.
- * If true, invoke hub iio error handler for this widget.
- */
- for (wnum = HUB_WIDGET_ID_MIN; wnum <= HUB_WIDGET_ID_MAX; wnum++) {
- iprb.iprb_regval = REMOTE_HUB_L(nasid, IIO_IOPRB(wnum));
-
- if (!iprb.iprb_error)
- continue;
-
- num_errors++;
- hubii_prb_handler(hub_v, hinfo, wnum);
- }
-
- return num_errors;
-}
-
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000,2002-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <asm/smp.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/io.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/xtalk/xtalk.h>
-#include <asm/sn/pci/pcibr_private.h>
-#include <asm/sn/intr.h>
-#include <asm/sn/ioerror_handling.h>
-#include <asm/sn/ioerror.h>
-#include <asm/sn/sn2/shubio.h>
-
-
-error_state_t error_state_get(vertex_hdl_t v);
-error_return_code_t error_state_set(vertex_hdl_t v,error_state_t new_state);
-
-
-/*
- * Get the xtalk provider function pointer for the
- * specified hub.
- */
-
-/*ARGSUSED*/
-int
-hub_xp_error_handler(
- vertex_hdl_t hub_v,
- nasid_t nasid,
- int error_code,
- ioerror_mode_t mode,
- ioerror_t *ioerror)
-{
- /*REFERENCED*/
- hubreg_t iio_imem;
- vertex_hdl_t xswitch;
- error_state_t e_state;
- cnodeid_t cnode;
-
- /*
- * Before walking down to the next level, check if
- * the I/O link is up. If it's been disabled by the
- * hub ii for some reason, we can't even touch the
- * widget registers.
- */
- iio_imem = REMOTE_HUB_L(nasid, IIO_IMEM);
-
- if (!(iio_imem & (IIO_IMEM_B0ESD|IIO_IMEM_W0ESD))){
- /*
- * IIO_IMEM_B0ESD getting set, indicates II shutdown
- * on HUB0 parts.. Hopefully that's not true for
- * Hub1 parts..
- *
- *
- * If either one of them is shut down, can't
- * go any further.
- */
- return IOERROR_XTALKLEVEL;
- }
-
- /* Get the error state of the hub */
- e_state = error_state_get(hub_v);
-
- cnode = nasid_to_cnodeid(nasid);
-
- xswitch = NODEPDA(cnode)->basew_xc;
-
- /* Set the error state of the crosstalk device to that of
- * hub.
- */
- if (error_state_set(xswitch , e_state) ==
- ERROR_RETURN_CODE_CANNOT_SET_STATE)
- return(IOERROR_UNHANDLED);
-
- /* Clean the error state of the hub if we are in the action handling
- * phase.
- */
- if (e_state == ERROR_STATE_ACTION)
- (void)error_state_set(hub_v, ERROR_STATE_NONE);
- /* hand the error off to the switch or the directly
- * connected crosstalk device.
- */
- return xtalk_error_handler(xswitch,
- error_code, mode, ioerror);
-
-}
-
-/*
- * Check if the widget in error has been enabled for PIO accesses
- */
-int
-is_widget_pio_enabled(ioerror_t *ioerror)
-{
- cnodeid_t src_node;
- nasid_t src_nasid;
- hubreg_t ii_iowa;
- xwidgetnum_t widget;
- iopaddr_t p;
-
- /* Get the node where the PIO error occurred */
- IOERROR_GETVALUE(p,ioerror, srcnode);
- src_node = p;
- if (src_node == CNODEID_NONE)
- return(0);
-
- /* Get the nasid for the cnode */
- src_nasid = cnodeid_to_nasid(src_node);
- if (src_nasid == INVALID_NASID)
- return(0);
-
- /* Read the Outbound widget access register for this hub */
- ii_iowa = REMOTE_HUB_L(src_nasid, IIO_IOWA);
- IOERROR_GETVALUE(p,ioerror, widgetnum);
- widget = p;
-
- /* Check if the PIOs to the widget with PIO error have been
- * enabled.
- */
- if (ii_iowa & IIO_IOWA_WIDGET(widget))
- return(1);
-
- return(0);
-}
-
-/*
- * Hub IO error handling.
- *
- * Gets invoked for different types of errors found at the hub.
- * Typically this includes situations from bus error or due to
- * an error interrupt (mostly generated at the hub).
- */
-int
-hub_ioerror_handler(
- vertex_hdl_t hub_v,
- int error_code,
- int mode,
- struct io_error_s *ioerror)
-{
- hubinfo_t hinfo; /* Hub info pointer */
- nasid_t nasid;
- int retval = 0;
- /*REFERENCED*/
- iopaddr_t p;
- caddr_t cp;
-
- hubinfo_get(hub_v, &hinfo);
-
- if (!hinfo){
- /* Print an error message and return */
- goto end;
- }
- nasid = hinfo->h_nasid;
-
- switch(error_code) {
-
- case PIO_READ_ERROR:
- /*
- * Cpu got a bus error while accessing IO space.
- * hubaddr field in ioerror structure should have
- * the IO address that caused access error.
- */
-
- /*
- * Identify if the physical address in hub_error_data
- * corresponds to small/large window, and accordingly,
- * get the xtalk address.
- */
-
- /*
- * Evaluate the widget number and the widget address that
- * caused the error. Use 'vaddr' if it's there.
- * This is typically true either during probing
- * or a kernel driver getting into trouble.
- * Otherwise, use paddr to figure out widget details
- * This is typically true for user mode bus errors while
- * accessing I/O space.
- */
- IOERROR_GETVALUE(cp,ioerror,vaddr);
- if (cp){
- /*
- * If neither in small window nor in large window range,
- * outright reject it.
- */
- IOERROR_GETVALUE(cp,ioerror,vaddr);
- if (NODE_SWIN_ADDR(nasid, (paddr_t)cp)){
- iopaddr_t hubaddr;
- xwidgetnum_t widgetnum;
- iopaddr_t xtalkaddr;
-
- IOERROR_GETVALUE(p,ioerror,hubaddr);
- hubaddr = p;
- widgetnum = SWIN_WIDGETNUM(hubaddr);
- xtalkaddr = SWIN_WIDGETADDR(hubaddr);
- /*
- * differentiate local register vs IO space access
- */
- IOERROR_SETVALUE(ioerror,widgetnum,widgetnum);
- IOERROR_SETVALUE(ioerror,xtalkaddr,xtalkaddr);
-
-
- } else if (NODE_BWIN_ADDR(nasid, (paddr_t)cp)){
- /*
- * Address corresponds to large window space.
- * Convert it to xtalk address.
- */
- int bigwin;
- hub_piomap_t bw_piomap;
- xtalk_piomap_t xt_pmap = NULL;
- iopaddr_t hubaddr;
- xwidgetnum_t widgetnum;
- iopaddr_t xtalkaddr;
-
- IOERROR_GETVALUE(p,ioerror,hubaddr);
- hubaddr = p;
-
- /*
- * Have to loop to find the correct xtalk_piomap
- * because the're not allocated on a one-to-one
- * basis to the window number.
- */
- for (bigwin=0; bigwin < HUB_NUM_BIG_WINDOW; bigwin++) {
- bw_piomap = hubinfo_bwin_piomap_get(hinfo,
- bigwin);
-
- if (bw_piomap->hpio_bigwin_num ==
- (BWIN_WINDOWNUM(hubaddr) - 1)) {
- xt_pmap = hub_piomap_xt_piomap(bw_piomap);
- break;
- }
- }
-
- ASSERT(xt_pmap);
-
- widgetnum = xtalk_pio_target_get(xt_pmap);
- xtalkaddr = xtalk_pio_xtalk_addr_get(xt_pmap) + BWIN_WIDGETADDR(hubaddr);
-
- IOERROR_SETVALUE(ioerror,widgetnum,widgetnum);
- IOERROR_SETVALUE(ioerror,xtalkaddr,xtalkaddr);
-
- /*
- * Make sure that widgetnum doesnot map to hub
- * register widget number, as we never use
- * big window to access hub registers.
- */
- ASSERT(widgetnum != HUB_REGISTER_WIDGET);
- }
- } else if (IOERROR_FIELDVALID(ioerror,hubaddr)) {
- iopaddr_t hubaddr;
- xwidgetnum_t widgetnum;
- iopaddr_t xtalkaddr;
-
- IOERROR_GETVALUE(p,ioerror,hubaddr);
- hubaddr = p;
- if (BWIN_WINDOWNUM(hubaddr)){
- int window = BWIN_WINDOWNUM(hubaddr) - 1;
- hubreg_t itte;
- itte = (hubreg_t)HUB_L(IIO_ITTE_GET(nasid, window));
- widgetnum = (itte >> IIO_ITTE_WIDGET_SHIFT) &
- IIO_ITTE_WIDGET_MASK;
- xtalkaddr = (((itte >> IIO_ITTE_OFFSET_SHIFT) &
- IIO_ITTE_OFFSET_MASK) <<
- BWIN_SIZE_BITS) +
- BWIN_WIDGETADDR(hubaddr);
- } else {
- widgetnum = SWIN_WIDGETNUM(hubaddr);
- xtalkaddr = SWIN_WIDGETADDR(hubaddr);
- }
- IOERROR_SETVALUE(ioerror,widgetnum,widgetnum);
- IOERROR_SETVALUE(ioerror,xtalkaddr,xtalkaddr);
- } else {
- IOERR_PRINTF(printk(
- "hub_ioerror_handler: Invalid address passed"));
-
- return IOERROR_INVALIDADDR;
- }
-
-
- IOERROR_GETVALUE(p,ioerror,widgetnum);
- if ((p) == HUB_REGISTER_WIDGET) {
- /*
- * Error in accessing Hub local register
- * This should happen mostly in SABLE mode..
- */
- retval = 0;
- } else {
- /* Make sure that the outbound widget access for this
- * widget is enabled.
- */
- if (!is_widget_pio_enabled(ioerror)) {
- return(IOERROR_HANDLED);
- }
-
-
- retval = hub_xp_error_handler(
- hub_v, nasid, error_code, mode, ioerror);
-
- }
-
- IOERR_PRINTF(printk(
- "hub_ioerror_handler:PIO_READ_ERROR return: %d",
- retval));
-
- break;
-
- case PIO_WRITE_ERROR:
- /*
- * This hub received an interrupt indicating a widget
- * attached to this hub got a timeout.
- * widgetnum field should be filled to indicate the
- * widget that caused error.
- *
- * NOTE: This hub may have nothing to do with this error.
- * We are here since the widget attached to the xbow
- * gets its PIOs through this hub.
- *
- * There is nothing that can be done at this level.
- * Just invoke the xtalk error handling mechanism.
- */
- IOERROR_GETVALUE(p,ioerror,widgetnum);
- if ((p) == HUB_REGISTER_WIDGET) {
- } else {
- /* Make sure that the outbound widget access for this
- * widget is enabled.
- */
-
- if (!is_widget_pio_enabled(ioerror)) {
- return(IOERROR_HANDLED);
- }
-
- retval = hub_xp_error_handler(
- hub_v, nasid, error_code, mode, ioerror);
- }
- break;
-
- case DMA_READ_ERROR:
- /*
- * DMA Read error always ends up generating an interrupt
- * at the widget level, and never at the hub level. So,
- * we don't expect to come here any time
- */
- ASSERT(0);
- retval = IOERROR_UNHANDLED;
- break;
-
- case DMA_WRITE_ERROR:
- /*
- * DMA Write error is generated when a write by an I/O
- * device could not be completed. Problem is, device is
- * totally unaware of this problem, and would continue
- * writing to system memory. So, hub has a way to send
- * an error interrupt on the first error, and bitbucket
- * all further write transactions.
- * Coming here indicates that hub detected one such error,
- * and we need to handle it.
- *
- * Hub interrupt handler would have extracted physaddr,
- * widgetnum, and widgetdevice from the CRB
- *
- * There is nothing special to do here, since gathering
- * data from crb's is done elsewhere. Just pass the
- * error to xtalk layer.
- */
- retval = hub_xp_error_handler(hub_v, nasid, error_code, mode,
- ioerror);
- break;
-
- default:
- ASSERT(0);
- return IOERROR_BADERRORCODE;
-
- }
-
- /*
- * If error was not handled, we may need to take certain action
- * based on the error code.
- * For e.g. in case of PIO_READ_ERROR, we may need to release the
- * PIO Read entry table (they are sticky after errors).
- * Similarly other cases.
- *
- * Further Action TBD
- */
-end:
- if (retval == IOERROR_HWGRAPH_LOOKUP) {
- /*
- * If we get errors very early, we can't traverse
- * the path using hardware graph.
- * To handle this situation, we need a functions
- * which don't depend on the hardware graph vertex to
- * handle errors. This break the modularity of the
- * existing code. Instead we print out the reason for
- * not handling error, and return. On return, all the
- * info collected would be dumped. This should provide
- * sufficient info to analyse the error.
- */
- printk("Unable to handle IO error: hardware graph not setup\n");
- }
-
- return retval;
-}
-
-#define INFO_LBL_ERROR_STATE "error_state"
-
-#define v_error_state_get(v,s) \
-(hwgraph_info_get_LBL(v,INFO_LBL_ERROR_STATE, (arbitrary_info_t *)&s))
-
-#define v_error_state_set(v,s,replace) \
-(replace ? \
-hwgraph_info_replace_LBL(v,INFO_LBL_ERROR_STATE,(arbitrary_info_t)s,0) :\
-hwgraph_info_add_LBL(v,INFO_LBL_ERROR_STATE, (arbitrary_info_t)s))
-
-
-#define v_error_state_clear(v) \
-(hwgraph_info_remove_LBL(v,INFO_LBL_ERROR_STATE,0))
-
-/*
- * error_state_get
- * Get the state of the vertex.
- * Returns ERROR_STATE_INVALID on failure
- * current state otherwise
- */
-error_state_t
-error_state_get(vertex_hdl_t v)
-{
- error_state_t s;
-
- /* Check if we have a valid hwgraph vertex */
- if ( v == (vertex_hdl_t)0 )
- return(ERROR_STATE_NONE);
-
- /* Get the labelled info hanging off the vertex which corresponds
- * to the state.
- */
- if (v_error_state_get(v, s) != GRAPH_SUCCESS) {
- return(ERROR_STATE_NONE);
- }
- return(s);
-}
-
-
-/*
- * error_state_set
- * Set the state of the vertex
- * Returns ERROR_RETURN_CODE_CANNOT_SET_STATE on failure
- * ERROR_RETURN_CODE_SUCCESS otherwise
- */
-error_return_code_t
-error_state_set(vertex_hdl_t v,error_state_t new_state)
-{
- error_state_t old_state;
- int replace = 1;
-
- /* Check if we have a valid hwgraph vertex */
- if ( v == (vertex_hdl_t)0 )
- return(ERROR_RETURN_CODE_GENERAL_FAILURE);
-
-
- /* This means that the error state needs to be cleaned */
- if (new_state == ERROR_STATE_NONE) {
- /* Make sure that we have an error state */
- if (v_error_state_get(v,old_state) == GRAPH_SUCCESS)
- v_error_state_clear(v);
- return(ERROR_RETURN_CODE_SUCCESS);
- }
-
- /* Check if the state information has been set at least once
- * for this vertex.
- */
- if (v_error_state_get(v,old_state) != GRAPH_SUCCESS)
- replace = 0;
-
- if (v_error_state_set(v,new_state,replace) != GRAPH_SUCCESS) {
- return(ERROR_RETURN_CODE_CANNOT_SET_STATE);
- }
- return(ERROR_RETURN_CODE_SUCCESS);
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/mm.h>
-#include <linux/delay.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/sn2/sn_private.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/simulator.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/hcl_util.h>
-#include <asm/sn/pci/pcibr_private.h>
-
-/* #define DEBUG 1 */
-/* #define XBOW_DEBUG 1 */
-
-#define kdebug 0
-
-
-/*
- * This file supports the Xbow chip. Main functions: initializtion,
- * error handling.
- */
-
-/*
- * each vertex corresponding to an xbow chip
- * has a "fastinfo" pointer pointing at one
- * of these things.
- */
-
-struct xbow_soft_s {
- vertex_hdl_t conn; /* our connection point */
- vertex_hdl_t vhdl; /* xbow's private vertex */
- vertex_hdl_t busv; /* the xswitch vertex */
- xbow_t *base; /* PIO pointer to crossbow chip */
- char *name; /* hwgraph name */
-
- xbow_link_status_t xbow_link_status[MAX_XBOW_PORTS];
- widget_cfg_t *wpio[MAX_XBOW_PORTS]; /* cached PIO pointer */
-
- /* Bandwidth allocation state. Bandwidth values are for the
- * destination port since contention happens there.
- * Implicit mapping from xbow ports (8..f) -> (0..7) array indices.
- */
- unsigned long long bw_hiwm[MAX_XBOW_PORTS]; /* hiwater mark values */
- unsigned long long bw_cur_used[MAX_XBOW_PORTS]; /* bw used currently */
-};
-
-#define xbow_soft_set(v,i) hwgraph_fastinfo_set((v), (arbitrary_info_t)(i))
-#define xbow_soft_get(v) ((struct xbow_soft_s *)hwgraph_fastinfo_get((v)))
-
-/*
- * Function Table of Contents
- */
-
-int xbow_attach(vertex_hdl_t);
-
-int xbow_widget_present(xbow_t *, int);
-static int xbow_link_alive(xbow_t *, int);
-vertex_hdl_t xbow_widget_lookup(vertex_hdl_t, int);
-
-void xbow_intr_preset(void *, int, xwidgetnum_t, iopaddr_t, xtalk_intr_vector_t);
-static void xbow_setwidint(xtalk_intr_t);
-
-xswitch_reset_link_f xbow_reset_link;
-
-xswitch_provider_t xbow_provider =
-{
- xbow_reset_link,
-};
-
-
-static int
-xbow_mmap(struct file * file, struct vm_area_struct * vma)
-{
- unsigned long phys_addr;
- int error;
-
- phys_addr = (unsigned long)file->private_data & ~0xc000000000000000; /* Mask out the Uncache bits */
- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
- vma->vm_flags |= VM_RESERVED | VM_IO;
- error = io_remap_page_range(vma, vma->vm_start, phys_addr,
- vma->vm_end-vma->vm_start,
- vma->vm_page_prot);
- return(error);
-}
-
-/*
- * This is the file operation table for the pcibr driver.
- * As each of the functions are implemented, put the
- * appropriate function name below.
- */
-struct file_operations xbow_fops = {
- .owner = THIS_MODULE,
- .mmap = xbow_mmap,
-};
-
-#ifdef XBRIDGE_REGS_SIM
-/* xbow_set_simulated_regs: sets xbow regs as needed
- * for powering through the boot
- */
-void
-xbow_set_simulated_regs(xbow_t *xbow, int port)
-{
- /*
- * turn on link
- */
- xbow->xb_link(port).link_status = (1<<31);
- /*
- * and give it a live widget too
- */
- xbow->xb_link(port).link_aux_status = XB_AUX_STAT_PRESENT;
- /*
- * zero the link control reg
- */
- xbow->xb_link(port).link_control = 0x0;
-}
-#endif /* XBRIDGE_REGS_SIM */
-
-/*
- * xbow_attach: the crosstalk provider has
- * determined that there is a crossbow widget
- * present, and has handed us the connection
- * point for that vertex.
- *
- * We not only add our own vertex, but add
- * some "xtalk switch" data to the switch
- * vertex (at the connect point's parent) if
- * it does not have any.
- */
-
-/*ARGSUSED */
-int
-xbow_attach(vertex_hdl_t conn)
-{
- /*REFERENCED */
- vertex_hdl_t vhdl;
- vertex_hdl_t busv;
- xbow_t *xbow;
- struct xbow_soft_s *soft;
- int port;
- xswitch_info_t info;
- xtalk_intr_t intr_hdl;
- char devnm[MAXDEVNAME], *s;
- xbowreg_t id;
- int rev;
- int i;
- int xbow_num;
-#if DEBUG && ATTACH_DEBUG
- char name[MAXDEVNAME];
-#endif
- static irqreturn_t xbow_errintr_handler(int, void *, struct pt_regs *);
-
-
-#if DEBUG && ATTACH_DEBUG
- printk("%s: xbow_attach\n", vertex_to_name(conn, name, MAXDEVNAME));
-#endif
-
- /*
- * Get a PIO pointer to the base of the crossbow
- * chip.
- */
-#ifdef XBRIDGE_REGS_SIM
- printk("xbow_attach: XBRIDGE_REGS_SIM FIXME: allocating %ld bytes for xbow_s\n", sizeof(xbow_t));
- xbow = (xbow_t *) kmalloc(sizeof(xbow_t), GFP_KERNEL);
- if (!xbow)
- return -ENOMEM;
- /*
- * turn on ports e and f like in a real live ibrick
- */
- xbow_set_simulated_regs(xbow, 0xe);
- xbow_set_simulated_regs(xbow, 0xf);
-#else
- xbow = (xbow_t *) xtalk_piotrans_addr(conn, 0, 0, sizeof(xbow_t), 0);
-#endif /* XBRIDGE_REGS_SIM */
-
- /*
- * Locate the "switch" vertex: it is the parent
- * of our connection point.
- */
- busv = hwgraph_connectpt_get(conn);
-#if DEBUG && ATTACH_DEBUG
- printk("xbow_attach: Bus Vertex 0x%p, conn 0x%p, xbow register 0x%p wid= 0x%x\n", busv, conn, xbow, *(volatile u32 *)xbow);
-#endif
-
- ASSERT(busv != GRAPH_VERTEX_NONE);
-
- /*
- * Create our private vertex, and connect our
- * driver information to it. This makes it possible
- * for diagnostic drivers to open the crossbow
- * vertex for access to registers.
- */
-
- /*
- * Register a xbow driver with hwgraph.
- * file ops.
- */
- vhdl = hwgraph_register(conn, EDGE_LBL_XBOW, 0,
- 0, 0, 0,
- S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP, 0, 0,
- (struct file_operations *)&xbow_fops, (void *)xbow);
- if (!vhdl) {
- printk(KERN_WARNING "xbow_attach: Unable to create char device for xbow conn %p\n",
- (void *)conn);
- }
-
- /*
- * Allocate the soft state structure and attach
- * it to the xbow's vertex
- */
- soft = kmalloc(sizeof(*soft), GFP_KERNEL);
- if (!soft)
- return -ENOMEM;
- soft->conn = conn;
- soft->vhdl = vhdl;
- soft->busv = busv;
- soft->base = xbow;
- /* does the universe really need another macro? */
- /* xbow_soft_set(vhdl, (arbitrary_info_t) soft); */
- /* hwgraph_fastinfo_set(vhdl, (arbitrary_info_t) soft); */
-
-#define XBOW_NUM_SUFFIX_FORMAT "[xbow# %d]"
-
- /* Add xbow number as a suffix to the hwgraph name of the xbow.
- * This is helpful while looking at the error/warning messages.
- */
- xbow_num = 0;
-
- /*
- * get the name of this xbow vertex and keep the info.
- * This is needed during errors and interupts, but as
- * long as we have it, we can use it elsewhere.
- */
- s = dev_to_name(vhdl, devnm, MAXDEVNAME);
- soft->name = kmalloc(strlen(s) + strlen(XBOW_NUM_SUFFIX_FORMAT) + 1,
- GFP_KERNEL);
- if (!soft->name) {
- kfree(soft);
- return -ENOMEM;
- }
- sprintf(soft->name,"%s"XBOW_NUM_SUFFIX_FORMAT, s,xbow_num);
-
-#ifdef XBRIDGE_REGS_SIM
- /* my o200/ibrick has id=0x2d002049, but XXBOW_WIDGET_PART_NUM is defined
- * as 0xd000, so I'm using that for the partnum bitfield.
- */
- printk("xbow_attach: XBRIDGE_REGS_SIM FIXME: need xb_wid_id value!!\n");
- id = 0x2d000049;
-#else
- id = xbow->xb_wid_id;
-#endif /* XBRIDGE_REGS_SIM */
- rev = XWIDGET_PART_REV_NUM(id);
-
-#define XBOW_16_BIT_PORT_BW_MAX (800 * 1000 * 1000) /* 800 MB/s */
-
- /* Set bandwidth hiwatermark and current values */
- for (i = 0; i < MAX_XBOW_PORTS; i++) {
- soft->bw_hiwm[i] = XBOW_16_BIT_PORT_BW_MAX; /* for now */
- soft->bw_cur_used[i] = 0;
- }
-
- /*
- * attach the crossbow error interrupt.
- */
- intr_hdl = xtalk_intr_alloc(conn, (device_desc_t)0, vhdl);
- ASSERT(intr_hdl != NULL);
-
- {
- int irq = ((hub_intr_t)intr_hdl)->i_bit;
- int cpu = ((hub_intr_t)intr_hdl)->i_cpuid;
-
- intr_unreserve_level(cpu, irq);
- ((hub_intr_t)intr_hdl)->i_bit = SGI_XBOW_ERROR;
- }
-
- xtalk_intr_connect(intr_hdl,
- (intr_func_t) xbow_errintr_handler,
- (intr_arg_t) soft,
- (xtalk_intr_setfunc_t) xbow_setwidint,
- (void *) xbow);
-
- request_irq(SGI_XBOW_ERROR, (void *)xbow_errintr_handler, SA_SHIRQ, "XBOW error",
- (intr_arg_t) soft);
-
-
- /*
- * Enable xbow error interrupts
- */
- xbow->xb_wid_control = (XB_WID_CTRL_REG_ACC_IE | XB_WID_CTRL_XTALK_IE);
-
- /*
- * take a census of the widgets present,
- * leaving notes at the switch vertex.
- */
- info = xswitch_info_new(busv);
-
- for (port = MAX_PORT_NUM - MAX_XBOW_PORTS;
- port < MAX_PORT_NUM; ++port) {
- if (!xbow_link_alive(xbow, port)) {
-#if DEBUG && XBOW_DEBUG
- printk(KERN_INFO "0x%p link %d is not alive\n",
- (void *)busv, port);
-#endif
- continue;
- }
- if (!xbow_widget_present(xbow, port)) {
-#if DEBUG && XBOW_DEBUG
- printk(KERN_INFO "0x%p link %d is alive but no widget is present\n", (void *)busv, port);
-#endif
- continue;
- }
-#if DEBUG && XBOW_DEBUG
- printk(KERN_INFO "0x%p link %d has a widget\n",
- (void *)busv, port);
-#endif
-
- xswitch_info_link_is_ok(info, port);
- /*
- * Turn some error interrupts on
- * and turn others off. The PROM has
- * some things turned on we don't
- * want to see (bandwidth allocation
- * errors for instance); so if it
- * is not listed here, it is not on.
- */
- xbow->xb_link(port).link_control =
- ( (xbow->xb_link(port).link_control
- /*
- * Turn off these bits; they are non-fatal,
- * but we might want to save some statistics
- * on the frequency of these errors.
- * XXX FIXME XXX
- */
- & ~XB_CTRL_RCV_CNT_OFLOW_IE
- & ~XB_CTRL_XMT_CNT_OFLOW_IE
- & ~XB_CTRL_BNDWDTH_ALLOC_IE
- & ~XB_CTRL_RCV_IE)
- /*
- * These are the ones we want to turn on.
- */
- | (XB_CTRL_ILLEGAL_DST_IE
- | XB_CTRL_OALLOC_IBUF_IE
- | XB_CTRL_XMT_MAX_RTRY_IE
- | XB_CTRL_MAXREQ_TOUT_IE
- | XB_CTRL_XMT_RTRY_IE
- | XB_CTRL_SRC_TOUT_IE) );
- }
-
- xswitch_provider_register(busv, &xbow_provider);
-
- return 0; /* attach successful */
-}
-
-/*
- * xbow_widget_present: See if a device is present
- * on the specified port of this crossbow.
- */
-int
-xbow_widget_present(xbow_t *xbow, int port)
-{
- if ( IS_RUNNING_ON_SIMULATOR() ) {
- if ( (port == 14) || (port == 15) ) {
- return 1;
- }
- else {
- return 0;
- }
- }
- else {
- /* WAR: port 0xf on PIC is missing present bit */
- if (XBOW_WAR_ENABLED(PV854827, xbow->xb_wid_id) &&
- IS_PIC_XBOW(xbow->xb_wid_id) && port==0xf) {
- return 1;
- }
- else if ( IS_PIC_XBOW(xbow->xb_wid_id) && port==0xb ) {
- /* for opus the present bit doesn't work on port 0xb */
- return 1;
- }
- return xbow->xb_link(port).link_aux_status & XB_AUX_STAT_PRESENT;
- }
-}
-
-static int
-xbow_link_alive(xbow_t * xbow, int port)
-{
- xbwX_stat_t xbow_linkstat;
-
- xbow_linkstat.linkstatus = xbow->xb_link(port).link_status;
- return (xbow_linkstat.link_alive);
-}
-
-/*
- * xbow_widget_lookup
- * Lookup the edges connected to the xbow specified, and
- * retrieve the handle corresponding to the widgetnum
- * specified.
- * If not found, return 0.
- */
-vertex_hdl_t
-xbow_widget_lookup(vertex_hdl_t vhdl,
- int widgetnum)
-{
- xswitch_info_t xswitch_info;
- vertex_hdl_t conn;
-
- xswitch_info = xswitch_info_get(vhdl);
- conn = xswitch_info_vhdl_get(xswitch_info, widgetnum);
- return conn;
-}
-
-/*
- * xbow_setwidint: called when xtalk
- * is establishing or migrating our
- * interrupt service.
- */
-static void
-xbow_setwidint(xtalk_intr_t intr)
-{
- xwidgetnum_t targ = xtalk_intr_target_get(intr);
- iopaddr_t addr = xtalk_intr_addr_get(intr);
- xtalk_intr_vector_t vect = xtalk_intr_vector_get(intr);
- xbow_t *xbow = (xbow_t *) xtalk_intr_sfarg_get(intr);
-
- xbow_intr_preset((void *) xbow, 0, targ, addr, vect);
-}
-
-/*
- * xbow_intr_preset: called during mlreset time
- * if the platform specific code needs to route
- * an xbow interrupt before the xtalk infrastructure
- * is available for use.
- *
- * Also called from xbow_setwidint, so we don't
- * replicate the guts of the routine.
- *
- * XXX- probably should be renamed xbow_wid_intr_set or
- * something to reduce confusion.
- */
-/*ARGSUSED3 */
-void
-xbow_intr_preset(void *which_widget,
- int which_widget_intr,
- xwidgetnum_t targ,
- iopaddr_t addr,
- xtalk_intr_vector_t vect)
-{
- xbow_t *xbow = (xbow_t *) which_widget;
-
- xbow->xb_wid_int_upper = ((0xFF000000 & (vect << 24)) |
- (0x000F0000 & (targ << 16)) |
- XTALK_ADDR_TO_UPPER(addr));
- xbow->xb_wid_int_lower = XTALK_ADDR_TO_LOWER(addr);
-
-}
-
-#define XEM_ADD_STR(s) printk("%s", (s))
-#define XEM_ADD_NVAR(n,v) printk("\t%20s: 0x%llx\n", (n), ((unsigned long long)v))
-#define XEM_ADD_VAR(v) XEM_ADD_NVAR(#v,(v))
-#define XEM_ADD_IOEF(p,n) if (IOERROR_FIELDVALID(ioe,n)) { \
- IOERROR_GETVALUE(p,ioe,n); \
- XEM_ADD_NVAR("ioe." #n, p); \
- }
-
-int
-xbow_xmit_retry_error(struct xbow_soft_s *soft,
- int port)
-{
- xswitch_info_t info;
- vertex_hdl_t vhdl;
- widget_cfg_t *wid;
- widgetreg_t id;
- int part;
- int mfgr;
-
- wid = soft->wpio[port - BASE_XBOW_PORT];
- if (wid == NULL) {
- /* If we can't track down a PIO
- * pointer to our widget yet,
- * leave our caller knowing that
- * we are interested in this
- * interrupt if it occurs in
- * the future.
- */
- info = xswitch_info_get(soft->busv);
- if (!info)
- return 1;
- vhdl = xswitch_info_vhdl_get(info, port);
- if (vhdl == GRAPH_VERTEX_NONE)
- return 1;
- wid = (widget_cfg_t *) xtalk_piotrans_addr
- (vhdl, 0, 0, sizeof *wid, 0);
- if (!wid)
- return 1;
- soft->wpio[port - BASE_XBOW_PORT] = wid;
- }
- id = wid->w_id;
- part = XWIDGET_PART_NUM(id);
- mfgr = XWIDGET_MFG_NUM(id);
-
- return 0;
-}
-
-/*
- * xbow_errintr_handler will be called if the xbow
- * sends an interrupt request to report an error.
- */
-static irqreturn_t
-xbow_errintr_handler(int irq, void *arg, struct pt_regs *ep)
-{
- ioerror_t ioe[1];
- struct xbow_soft_s *soft = (struct xbow_soft_s *)arg;
- xbow_t *xbow = soft->base;
- xbowreg_t wid_control;
- xbowreg_t wid_stat;
- xbowreg_t wid_err_cmdword;
- xbowreg_t wid_err_upper;
- xbowreg_t wid_err_lower;
- w_err_cmd_word_u wid_err;
- unsigned long long wid_err_addr;
-
- int fatal = 0;
- int dump_ioe = 0;
- static int xbow_error_handler(void *, int, ioerror_mode_t, ioerror_t *);
-
- wid_control = xbow->xb_wid_control;
- wid_stat = xbow->xb_wid_stat_clr;
- wid_err_cmdword = xbow->xb_wid_err_cmdword;
- wid_err_upper = xbow->xb_wid_err_upper;
- wid_err_lower = xbow->xb_wid_err_lower;
- xbow->xb_wid_err_cmdword = 0;
-
- wid_err_addr = wid_err_lower | (((iopaddr_t) wid_err_upper & WIDGET_ERR_UPPER_ADDR_ONLY) << 32);
-
- if (wid_stat & XB_WID_STAT_LINK_INTR_MASK) {
- int port;
-
- wid_err.r = wid_err_cmdword;
-
- for (port = MAX_PORT_NUM - MAX_XBOW_PORTS;
- port < MAX_PORT_NUM; port++) {
- if (wid_stat & XB_WID_STAT_LINK_INTR(port)) {
- xb_linkregs_t *link = &(xbow->xb_link(port));
- xbowreg_t link_control = link->link_control;
- xbowreg_t link_status = link->link_status_clr;
- xbowreg_t link_aux_status = link->link_aux_status;
- xbowreg_t link_pend;
-
- link_pend = link_status & link_control &
- (XB_STAT_ILLEGAL_DST_ERR
- | XB_STAT_OALLOC_IBUF_ERR
- | XB_STAT_RCV_CNT_OFLOW_ERR
- | XB_STAT_XMT_CNT_OFLOW_ERR
- | XB_STAT_XMT_MAX_RTRY_ERR
- | XB_STAT_RCV_ERR
- | XB_STAT_XMT_RTRY_ERR
- | XB_STAT_MAXREQ_TOUT_ERR
- | XB_STAT_SRC_TOUT_ERR
- );
-
- if (link_pend & XB_STAT_ILLEGAL_DST_ERR) {
- if (wid_err.f.sidn == port) {
- IOERROR_INIT(ioe);
- IOERROR_SETVALUE(ioe, widgetnum, port);
- IOERROR_SETVALUE(ioe, xtalkaddr, wid_err_addr);
- if (IOERROR_HANDLED ==
- xbow_error_handler(soft,
- IOECODE_DMA,
- MODE_DEVERROR,
- ioe)) {
- link_pend &= ~XB_STAT_ILLEGAL_DST_ERR;
- } else {
- dump_ioe++;
- }
- }
- }
- /* Xbow/Bridge WAR:
- * if the bridge signals an LLP Transmitter Retry,
- * rewrite its control register.
- * If someone else triggers this interrupt,
- * ignore (and disable) the interrupt.
- */
- if (link_pend & XB_STAT_XMT_RTRY_ERR) {
- if (!xbow_xmit_retry_error(soft, port)) {
- link_control &= ~XB_CTRL_XMT_RTRY_IE;
- link->link_control = link_control;
- link->link_control; /* stall until written */
- }
- link_pend &= ~XB_STAT_XMT_RTRY_ERR;
- }
- if (link_pend) {
- vertex_hdl_t xwidget_vhdl;
- char *xwidget_name;
-
- /* Get the widget name corresponding to the current
- * xbow link.
- */
- xwidget_vhdl = xbow_widget_lookup(soft->busv,port);
- xwidget_name = xwidget_name_get(xwidget_vhdl);
-
- printk("%s port %X[%s] XIO Bus Error",
- soft->name, port, xwidget_name);
- if (link_status & XB_STAT_MULTI_ERR)
- XEM_ADD_STR("\tMultiple Errors\n");
- if (link_status & XB_STAT_ILLEGAL_DST_ERR)
- XEM_ADD_STR("\tInvalid Packet Destination\n");
- if (link_status & XB_STAT_OALLOC_IBUF_ERR)
- XEM_ADD_STR("\tInput Overallocation Error\n");
- if (link_status & XB_STAT_RCV_CNT_OFLOW_ERR)
- XEM_ADD_STR("\tLLP receive error counter overflow\n");
- if (link_status & XB_STAT_XMT_CNT_OFLOW_ERR)
- XEM_ADD_STR("\tLLP transmit retry counter overflow\n");
- if (link_status & XB_STAT_XMT_MAX_RTRY_ERR)
- XEM_ADD_STR("\tLLP Max Transmitter Retry\n");
- if (link_status & XB_STAT_RCV_ERR)
- XEM_ADD_STR("\tLLP Receiver error\n");
- if (link_status & XB_STAT_XMT_RTRY_ERR)
- XEM_ADD_STR("\tLLP Transmitter Retry\n");
- if (link_status & XB_STAT_MAXREQ_TOUT_ERR)
- XEM_ADD_STR("\tMaximum Request Timeout\n");
- if (link_status & XB_STAT_SRC_TOUT_ERR)
- XEM_ADD_STR("\tSource Timeout Error\n");
-
- {
- int other_port;
-
- for (other_port = 8; other_port < 16; ++other_port) {
- if (link_aux_status & (1 << other_port)) {
- /* XXX- need to go to "other_port"
- * and clean up after the timeout?
- */
- XEM_ADD_VAR(other_port);
- }
- }
- }
-
-#if !DEBUG
- if (kdebug) {
-#endif
- XEM_ADD_VAR(link_control);
- XEM_ADD_VAR(link_status);
- XEM_ADD_VAR(link_aux_status);
-
-#if !DEBUG
- }
-#endif
- fatal++;
- }
- }
- }
- }
- if (wid_stat & wid_control & XB_WID_STAT_WIDGET0_INTR) {
- /* we have a "widget zero" problem */
-
- if (wid_stat & (XB_WID_STAT_MULTI_ERR
- | XB_WID_STAT_XTALK_ERR
- | XB_WID_STAT_REG_ACC_ERR)) {
-
- printk("%s Port 0 XIO Bus Error",
- soft->name);
- if (wid_stat & XB_WID_STAT_MULTI_ERR)
- XEM_ADD_STR("\tMultiple Error\n");
- if (wid_stat & XB_WID_STAT_XTALK_ERR)
- XEM_ADD_STR("\tXIO Error\n");
- if (wid_stat & XB_WID_STAT_REG_ACC_ERR)
- XEM_ADD_STR("\tRegister Access Error\n");
-
- fatal++;
- }
- }
- if (fatal) {
- XEM_ADD_VAR(wid_stat);
- XEM_ADD_VAR(wid_control);
- XEM_ADD_VAR(wid_err_cmdword);
- XEM_ADD_VAR(wid_err_upper);
- XEM_ADD_VAR(wid_err_lower);
- XEM_ADD_VAR(wid_err_addr);
- panic("XIO Bus Error");
- }
- return IRQ_HANDLED;
-}
-
-/*
- * XBOW ERROR Handling routines.
- * These get invoked as part of walking down the error handling path
- * from hub/heart towards the I/O device that caused the error.
- */
-
-/*
- * xbow_error_handler
- * XBow error handling dispatch routine.
- * This is the primary interface used by external world to invoke
- * in case of an error related to a xbow.
- * Only functionality in this layer is to identify the widget handle
- * given the widgetnum. Otherwise, xbow does not gathers any error
- * data.
- */
-static int
-xbow_error_handler(
- void *einfo,
- int error_code,
- ioerror_mode_t mode,
- ioerror_t *ioerror)
-{
- int retval = IOERROR_WIDGETLEVEL;
-
- struct xbow_soft_s *soft = (struct xbow_soft_s *) einfo;
- int port;
- vertex_hdl_t conn;
- vertex_hdl_t busv;
-
- xbow_t *xbow = soft->base;
- xbowreg_t wid_stat;
- xbowreg_t wid_err_cmdword;
- xbowreg_t wid_err_upper;
- xbowreg_t wid_err_lower;
- unsigned long long wid_err_addr;
-
- xb_linkregs_t *link;
- xbowreg_t link_control;
- xbowreg_t link_status;
- xbowreg_t link_aux_status;
-
- ASSERT(soft != 0);
- busv = soft->busv;
-
-#if DEBUG && ERROR_DEBUG
- printk("%s: xbow_error_handler\n", soft->name, busv);
-#endif
-
- IOERROR_GETVALUE(port, ioerror, widgetnum);
-
- if (port == 0) {
- /* error during access to xbow:
- * do NOT attempt to access xbow regs.
- */
- if (mode == MODE_DEVPROBE)
- return IOERROR_HANDLED;
-
- if (error_code & IOECODE_DMA) {
- printk(KERN_ALERT
- "DMA error blamed on Crossbow at %s\n"
- "\tbut Crosbow never initiates DMA!",
- soft->name);
- }
- if (error_code & IOECODE_PIO) {
- iopaddr_t tmp;
- IOERROR_GETVALUE(tmp, ioerror, xtalkaddr);
- printk(KERN_ALERT "PIO Error on XIO Bus %s\n"
- "\tattempting to access XIO controller\n"
- "\twith offset 0x%lx",
- soft->name, tmp);
- }
- /* caller will dump contents of ioerror
- * in DEBUG and kdebug kernels.
- */
-
- return retval;
- }
- /*
- * error not on port zero:
- * safe to read xbow registers.
- */
- wid_stat = xbow->xb_wid_stat;
- wid_err_cmdword = xbow->xb_wid_err_cmdword;
- wid_err_upper = xbow->xb_wid_err_upper;
- wid_err_lower = xbow->xb_wid_err_lower;
-
- wid_err_addr =
- wid_err_lower
- | (((iopaddr_t) wid_err_upper
- & WIDGET_ERR_UPPER_ADDR_ONLY)
- << 32);
-
- if ((port < BASE_XBOW_PORT) ||
- (port >= MAX_PORT_NUM)) {
-
- if (mode == MODE_DEVPROBE)
- return IOERROR_HANDLED;
-
- if (error_code & IOECODE_DMA) {
- printk(KERN_ALERT
- "DMA error blamed on XIO port at %s/%d\n"
- "\tbut Crossbow does not support that port",
- soft->name, port);
- }
- if (error_code & IOECODE_PIO) {
- iopaddr_t tmp;
- IOERROR_GETVALUE(tmp, ioerror, xtalkaddr);
- printk(KERN_ALERT
- "PIO Error on XIO Bus %s\n"
- "\tattempting to access XIO port %d\n"
- "\t(which Crossbow does not support)"
- "\twith offset 0x%lx",
- soft->name, port, tmp);
- }
-#if !DEBUG
- if (kdebug) {
-#endif
- XEM_ADD_STR("Raw status values for Crossbow:\n");
- XEM_ADD_VAR(wid_stat);
- XEM_ADD_VAR(wid_err_cmdword);
- XEM_ADD_VAR(wid_err_upper);
- XEM_ADD_VAR(wid_err_lower);
- XEM_ADD_VAR(wid_err_addr);
-#if !DEBUG
- }
-#endif
-
- /* caller will dump contents of ioerror
- * in DEBUG and kdebug kernels.
- */
-
- return retval;
- }
- /* access to valid port:
- * ok to check port status.
- */
-
- link = &(xbow->xb_link(port));
- link_control = link->link_control;
- link_status = link->link_status;
- link_aux_status = link->link_aux_status;
-
- /* Check that there is something present
- * in that XIO port.
- */
- /* WAR: PIC widget 0xf is missing prescense bit */
- if (XBOW_WAR_ENABLED(PV854827, xbow->xb_wid_id) &&
- IS_PIC_XBOW(xbow->xb_wid_id) && (port==0xf))
- ;
- else if (IS_PIC_XBOW(xbow->xb_wid_id) && (port==0xb))
- ; /* WAR for opus this is missing on 0xb */
- else if (!(link_aux_status & XB_AUX_STAT_PRESENT)) {
- /* nobody connected. */
- if (mode == MODE_DEVPROBE)
- return IOERROR_HANDLED;
-
- if (error_code & IOECODE_DMA) {
- printk(KERN_ALERT
- "DMA error blamed on XIO port at %s/%d\n"
- "\tbut there is no device connected there.",
- soft->name, port);
- }
- if (error_code & IOECODE_PIO) {
- iopaddr_t tmp;
- IOERROR_GETVALUE(tmp, ioerror, xtalkaddr);
- printk(KERN_ALERT
- "PIO Error on XIO Bus %s\n"
- "\tattempting to access XIO port %d\n"
- "\t(which has no device connected)"
- "\twith offset 0x%lx",
- soft->name, port, tmp);
- }
-#if !DEBUG
- if (kdebug) {
-#endif
- XEM_ADD_STR("Raw status values for Crossbow:\n");
- XEM_ADD_VAR(wid_stat);
- XEM_ADD_VAR(wid_err_cmdword);
- XEM_ADD_VAR(wid_err_upper);
- XEM_ADD_VAR(wid_err_lower);
- XEM_ADD_VAR(wid_err_addr);
- XEM_ADD_VAR(port);
- XEM_ADD_VAR(link_control);
- XEM_ADD_VAR(link_status);
- XEM_ADD_VAR(link_aux_status);
-#if !DEBUG
- }
-#endif
- return retval;
-
- }
- /* Check that the link is alive.
- */
- if (!(link_status & XB_STAT_LINKALIVE)) {
- iopaddr_t tmp;
- /* nobody connected. */
- if (mode == MODE_DEVPROBE)
- return IOERROR_HANDLED;
-
- printk(KERN_ALERT
- "%s%sError on XIO Bus %s port %d",
- (error_code & IOECODE_DMA) ? "DMA " : "",
- (error_code & IOECODE_PIO) ? "PIO " : "",
- soft->name, port);
-
- IOERROR_GETVALUE(tmp, ioerror, xtalkaddr);
- if ((error_code & IOECODE_PIO) &&
- (IOERROR_FIELDVALID(ioerror, xtalkaddr))) {
- printk("\tAccess attempted to offset 0x%lx\n", tmp);
- }
- if (link_aux_status & XB_AUX_LINKFAIL_RST_BAD)
- XEM_ADD_STR("\tLink never came out of reset\n");
- else
- XEM_ADD_STR("\tLink failed while transferring data\n");
-
- }
- /* get the connection point for the widget
- * involved in this error; if it exists and
- * is not our connectpoint, cycle back through
- * xtalk_error_handler to deliver control to
- * the proper handler (or to report a generic
- * crosstalk error).
- *
- * If the downstream handler won't handle
- * the problem, we let our upstream caller
- * deal with it, after (in DEBUG and kdebug
- * kernels) dumping the xbow state for this
- * port.
- */
- conn = xbow_widget_lookup(busv, port);
- if ((conn != GRAPH_VERTEX_NONE) &&
- (conn != soft->conn)) {
- retval = xtalk_error_handler(conn, error_code, mode, ioerror);
- if (retval == IOERROR_HANDLED)
- return IOERROR_HANDLED;
- }
- if (mode == MODE_DEVPROBE)
- return IOERROR_HANDLED;
-
- if (retval == IOERROR_UNHANDLED) {
- iopaddr_t tmp;
- retval = IOERROR_PANIC;
-
- printk(KERN_ALERT
- "%s%sError on XIO Bus %s port %d",
- (error_code & IOECODE_DMA) ? "DMA " : "",
- (error_code & IOECODE_PIO) ? "PIO " : "",
- soft->name, port);
-
- IOERROR_GETVALUE(tmp, ioerror, xtalkaddr);
- if ((error_code & IOECODE_PIO) &&
- (IOERROR_FIELDVALID(ioerror, xtalkaddr))) {
- printk("\tAccess attempted to offset 0x%lx\n", tmp);
- }
- }
-
-#if !DEBUG
- if (kdebug) {
-#endif
- XEM_ADD_STR("Raw status values for Crossbow:\n");
- XEM_ADD_VAR(wid_stat);
- XEM_ADD_VAR(wid_err_cmdword);
- XEM_ADD_VAR(wid_err_upper);
- XEM_ADD_VAR(wid_err_lower);
- XEM_ADD_VAR(wid_err_addr);
- XEM_ADD_VAR(port);
- XEM_ADD_VAR(link_control);
- XEM_ADD_VAR(link_status);
- XEM_ADD_VAR(link_aux_status);
-#if !DEBUG
- }
-#endif
- /* caller will dump raw ioerror data
- * in DEBUG and kdebug kernels.
- */
-
- return retval;
-}
-
-int
-xbow_reset_link(vertex_hdl_t xconn_vhdl)
-{
- xwidget_info_t widget_info;
- xwidgetnum_t port;
- xbow_t *xbow;
- xbowreg_t ctrl;
- xbwX_stat_t stat;
- unsigned long itick;
- unsigned int dtick;
- static long ticks_to_wait = HZ / 1000;
-
- widget_info = xwidget_info_get(xconn_vhdl);
- port = xwidget_info_id_get(widget_info);
-
-#ifdef XBOW_K1PTR /* defined if we only have one xbow ... */
- xbow = XBOW_K1PTR;
-#else
- {
- vertex_hdl_t xbow_vhdl;
- struct xbow_soft_s *xbow_soft;
-
- hwgraph_traverse(xconn_vhdl, ".master/xtalk/0/xbow", &xbow_vhdl);
- xbow_soft = xbow_soft_get(xbow_vhdl);
- xbow = xbow_soft->base;
- }
-#endif
-
- /*
- * This requires three PIOs (reset the link, check for the
- * reset, restore the control register for the link) plus
- * 10us to wait for the reset. We allow up to 1ms for the
- * widget to come out of reset before giving up and
- * returning a failure.
- */
- ctrl = xbow->xb_link(port).link_control;
- xbow->xb_link(port).link_reset = 0;
- itick = jiffies;
- while (1) {
- stat.linkstatus = xbow->xb_link(port).link_status;
- if (stat.link_alive)
- break;
- dtick = jiffies - itick;
- if (dtick > ticks_to_wait) {
- return -1; /* never came out of reset */
- }
- udelay(2); /* don't beat on link_status */
- }
- xbow->xb_link(port).link_control = ctrl;
- return 0;
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/driver.h>
-#include <asm/sn/io.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/hcl_util.h>
-#include <asm/sn/xtalk/xtalk.h>
-#include <asm/sn/xtalk/xswitch.h>
-#include <asm/sn/xtalk/xwidget.h>
-#include <asm/sn/xtalk/xtalk_private.h>
-
-/*
- * Implement io channel provider operations. The xtalk* layer provides a
- * platform-independent interface for io channel devices. This layer
- * switches among the possible implementations of a io channel adapter.
- *
- * On platforms with only one possible xtalk provider, macros can be
- * set up at the top that cause the table lookups and indirections to
- * completely disappear.
- */
-
-char widget_info_fingerprint[] = "widget_info";
-
-/* =====================================================================
- * Function Table of Contents
- */
-xtalk_piomap_t xtalk_piomap_alloc(vertex_hdl_t, device_desc_t, iopaddr_t, size_t, size_t, unsigned);
-void xtalk_piomap_free(xtalk_piomap_t);
-caddr_t xtalk_piomap_addr(xtalk_piomap_t, iopaddr_t, size_t);
-void xtalk_piomap_done(xtalk_piomap_t);
-caddr_t xtalk_piotrans_addr(vertex_hdl_t, device_desc_t, iopaddr_t, size_t, unsigned);
-caddr_t xtalk_pio_addr(vertex_hdl_t, device_desc_t, iopaddr_t, size_t, xtalk_piomap_t *, unsigned);
-void xtalk_set_early_piotrans_addr(xtalk_early_piotrans_addr_f *);
-caddr_t xtalk_early_piotrans_addr(xwidget_part_num_t, xwidget_mfg_num_t, int, iopaddr_t, size_t, unsigned);
-static caddr_t null_xtalk_early_piotrans_addr(xwidget_part_num_t, xwidget_mfg_num_t, int, iopaddr_t, size_t, unsigned);
-xtalk_dmamap_t xtalk_dmamap_alloc(vertex_hdl_t, device_desc_t, size_t, unsigned);
-void xtalk_dmamap_free(xtalk_dmamap_t);
-iopaddr_t xtalk_dmamap_addr(xtalk_dmamap_t, paddr_t, size_t);
-void xtalk_dmamap_done(xtalk_dmamap_t);
-iopaddr_t xtalk_dmatrans_addr(vertex_hdl_t, device_desc_t, paddr_t, size_t, unsigned);
-void xtalk_dmamap_drain(xtalk_dmamap_t);
-void xtalk_dmaaddr_drain(vertex_hdl_t, iopaddr_t, size_t);
-xtalk_intr_t xtalk_intr_alloc(vertex_hdl_t, device_desc_t, vertex_hdl_t);
-xtalk_intr_t xtalk_intr_alloc_nothd(vertex_hdl_t, device_desc_t, vertex_hdl_t);
-void xtalk_intr_free(xtalk_intr_t);
-int xtalk_intr_connect(xtalk_intr_t, intr_func_t, intr_arg_t, xtalk_intr_setfunc_t, void *);
-void xtalk_intr_disconnect(xtalk_intr_t);
-vertex_hdl_t xtalk_intr_cpu_get(xtalk_intr_t);
-int xtalk_error_handler(vertex_hdl_t, int, ioerror_mode_t, ioerror_t *);
-void xtalk_provider_startup(vertex_hdl_t);
-void xtalk_provider_shutdown(vertex_hdl_t);
-vertex_hdl_t xtalk_intr_dev_get(xtalk_intr_t);
-xwidgetnum_t xtalk_intr_target_get(xtalk_intr_t);
-xtalk_intr_vector_t xtalk_intr_vector_get(xtalk_intr_t);
-iopaddr_t xtalk_intr_addr_get(struct xtalk_intr_s *);
-void *xtalk_intr_sfarg_get(xtalk_intr_t);
-vertex_hdl_t xtalk_pio_dev_get(xtalk_piomap_t);
-xwidgetnum_t xtalk_pio_target_get(xtalk_piomap_t);
-iopaddr_t xtalk_pio_xtalk_addr_get(xtalk_piomap_t);
-ulong xtalk_pio_mapsz_get(xtalk_piomap_t);
-caddr_t xtalk_pio_kvaddr_get(xtalk_piomap_t);
-vertex_hdl_t xtalk_dma_dev_get(xtalk_dmamap_t);
-xwidgetnum_t xtalk_dma_target_get(xtalk_dmamap_t);
-xwidget_info_t xwidget_info_chk(vertex_hdl_t);
-xwidget_info_t xwidget_info_get(vertex_hdl_t);
-void xwidget_info_set(vertex_hdl_t, xwidget_info_t);
-vertex_hdl_t xwidget_info_dev_get(xwidget_info_t);
-xwidgetnum_t xwidget_info_id_get(xwidget_info_t);
-vertex_hdl_t xwidget_info_master_get(xwidget_info_t);
-xwidgetnum_t xwidget_info_masterid_get(xwidget_info_t);
-xwidget_part_num_t xwidget_info_part_num_get(xwidget_info_t);
-xwidget_mfg_num_t xwidget_info_mfg_num_get(xwidget_info_t);
-char *xwidget_info_name_get(xwidget_info_t);
-void xtalk_provider_register(vertex_hdl_t, xtalk_provider_t *);
-void xtalk_provider_unregister(vertex_hdl_t);
-xtalk_provider_t *xtalk_provider_fns_get(vertex_hdl_t);
-int xwidget_driver_register(xwidget_part_num_t,
- xwidget_mfg_num_t,
- char *, unsigned);
-void xwidget_driver_unregister(char *);
-int xwidget_register(xwidget_hwid_t, vertex_hdl_t,
- xwidgetnum_t, vertex_hdl_t,
- xwidgetnum_t);
-int xwidget_unregister(vertex_hdl_t);
-void xwidget_reset(vertex_hdl_t);
-char *xwidget_name_get(vertex_hdl_t);
-#if !defined(DEV_FUNC)
-/*
- * There is more than one possible provider
- * for this platform. We need to examine the
- * master vertex of the current vertex for
- * a provider function structure, and indirect
- * through the appropriately named member.
- */
-#define DEV_FUNC(dev,func) xwidget_to_provider_fns(dev)->func
-#define CAST_PIOMAP(x) ((xtalk_piomap_t)(x))
-#define CAST_DMAMAP(x) ((xtalk_dmamap_t)(x))
-#define CAST_INTR(x) ((xtalk_intr_t)(x))
-xtalk_provider_t * xwidget_info_pops_get(xwidget_info_t info);
-
-static xtalk_provider_t *
-xwidget_to_provider_fns(vertex_hdl_t xconn)
-{
- xwidget_info_t widget_info;
- xtalk_provider_t *provider_fns;
-
- widget_info = xwidget_info_get(xconn);
- ASSERT(widget_info != NULL);
-
- provider_fns = xwidget_info_pops_get(widget_info);
- ASSERT(provider_fns != NULL);
-
- return (provider_fns);
-}
-
-xtalk_provider_t *
-xwidget_info_pops_get(xwidget_info_t info) {
- vertex_hdl_t master = info->w_master;
- xtalk_provider_t *provider_fns;
-
- provider_fns = xtalk_provider_fns_get(master);
-
- ASSERT(provider_fns != NULL);
- return provider_fns;
-}
-#endif
-
-/*
- * Many functions are not passed their vertex
- * information directly; rather, they must
- * dive through a resource map. These macros
- * are available to coordinate this detail.
- */
-#define PIOMAP_FUNC(map,func) DEV_FUNC(map->xp_dev,func)
-#define DMAMAP_FUNC(map,func) DEV_FUNC(map->xd_dev,func)
-#define INTR_FUNC(intr,func) DEV_FUNC(intr_hdl->xi_dev,func)
-
-/* =====================================================================
- * PIO MANAGEMENT
- *
- * For mapping system virtual address space to
- * xtalk space on a specified widget
- */
-
-xtalk_piomap_t
-xtalk_piomap_alloc(vertex_hdl_t dev, /* set up mapping for this device */
- device_desc_t dev_desc, /* device descriptor */
- iopaddr_t xtalk_addr, /* map for this xtalk_addr range */
- size_t byte_count,
- size_t byte_count_max, /* maximum size of a mapping */
- unsigned flags)
-{ /* defined in sys/pio.h */
- return (xtalk_piomap_t) DEV_FUNC(dev, piomap_alloc)
- (dev, dev_desc, xtalk_addr, byte_count, byte_count_max, flags);
-}
-
-
-void
-xtalk_piomap_free(xtalk_piomap_t xtalk_piomap)
-{
- PIOMAP_FUNC(xtalk_piomap, piomap_free)
- (CAST_PIOMAP(xtalk_piomap));
-}
-
-
-caddr_t
-xtalk_piomap_addr(xtalk_piomap_t xtalk_piomap, /* mapping resources */
- iopaddr_t xtalk_addr, /* map for this xtalk address */
- size_t byte_count)
-{ /* map this many bytes */
- return PIOMAP_FUNC(xtalk_piomap, piomap_addr)
- (CAST_PIOMAP(xtalk_piomap), xtalk_addr, byte_count);
-}
-
-
-void
-xtalk_piomap_done(xtalk_piomap_t xtalk_piomap)
-{
- PIOMAP_FUNC(xtalk_piomap, piomap_done)
- (CAST_PIOMAP(xtalk_piomap));
-}
-
-
-caddr_t
-xtalk_piotrans_addr(vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- iopaddr_t xtalk_addr, /* Crosstalk address */
- size_t byte_count, /* map this many bytes */
- unsigned flags)
-{ /* (currently unused) */
- return DEV_FUNC(dev, piotrans_addr)
- (dev, dev_desc, xtalk_addr, byte_count, flags);
-}
-
-caddr_t
-xtalk_pio_addr(vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- iopaddr_t addr, /* starting address (or offset in window) */
- size_t byte_count, /* map this many bytes */
- xtalk_piomap_t *mapp, /* where to return the map pointer */
- unsigned flags)
-{ /* PIO flags */
- xtalk_piomap_t map = 0;
- caddr_t res;
-
- if (mapp)
- *mapp = 0; /* record "no map used" */
-
- res = xtalk_piotrans_addr
- (dev, dev_desc, addr, byte_count, flags);
- if (res)
- return res; /* xtalk_piotrans worked */
-
- map = xtalk_piomap_alloc
- (dev, dev_desc, addr, byte_count, byte_count, flags);
- if (!map)
- return res; /* xtalk_piomap_alloc failed */
-
- res = xtalk_piomap_addr
- (map, addr, byte_count);
- if (!res) {
- xtalk_piomap_free(map);
- return res; /* xtalk_piomap_addr failed */
- }
- if (mapp)
- *mapp = map; /* pass back map used */
-
- return res; /* xtalk_piomap_addr succeeded */
-}
-
-/* =====================================================================
- * EARLY PIOTRANS SUPPORT
- *
- * There are places where drivers (mgras, for instance)
- * need to get PIO translations before the infrastructure
- * is extended to them (setting up textports, for
- * instance). These drivers should call
- * xtalk_early_piotrans_addr with their xtalk ID
- * information, a sequence number (so we can use the second
- * mgras for instance), and the usual piotrans parameters.
- *
- * Machine specific code should provide an implementation
- * of early_piotrans_addr, and present a pointer to this
- * function to xtalk_set_early_piotrans_addr so it can be
- * used by clients without the clients having to know what
- * platform or what xtalk provider is in use.
- */
-
-static xtalk_early_piotrans_addr_f null_xtalk_early_piotrans_addr;
-
-xtalk_early_piotrans_addr_f *impl_early_piotrans_addr = null_xtalk_early_piotrans_addr;
-
-/* xtalk_set_early_piotrans_addr:
- * specify the early_piotrans_addr implementation function.
- */
-void
-xtalk_set_early_piotrans_addr(xtalk_early_piotrans_addr_f *impl)
-{
- impl_early_piotrans_addr = impl;
-}
-
-/* xtalk_early_piotrans_addr:
- * figure out a PIO address for the "nth" io channel widget that
- * matches the specified part and mfgr number. Returns NULL if
- * there is no such widget, or if the requested mapping can not
- * be constructed.
- * Limitations on which io channel slots (and busses) are
- * checked, and definitions of the ordering of the search across
- * the io channel slots, are defined by the platform.
- */
-caddr_t
-xtalk_early_piotrans_addr(xwidget_part_num_t part_num,
- xwidget_mfg_num_t mfg_num,
- int which,
- iopaddr_t xtalk_addr,
- size_t byte_count,
- unsigned flags)
-{
- return impl_early_piotrans_addr
- (part_num, mfg_num, which, xtalk_addr, byte_count, flags);
-}
-
-/* null_xtalk_early_piotrans_addr:
- * used as the early_piotrans_addr implementation until and
- * unless a real implementation is provided. In DEBUG kernels,
- * we want to know who is calling before the implementation is
- * registered; in non-DEBUG kernels, return NULL representing
- * lack of mapping support.
- */
-/*ARGSUSED */
-static caddr_t
-null_xtalk_early_piotrans_addr(xwidget_part_num_t part_num,
- xwidget_mfg_num_t mfg_num,
- int which,
- iopaddr_t xtalk_addr,
- size_t byte_count,
- unsigned flags)
-{
-#if DEBUG
- panic("null_xtalk_early_piotrans_addr");
-#endif
- return NULL;
-}
-
-/* =====================================================================
- * DMA MANAGEMENT
- *
- * For mapping from io channel space to system
- * physical space.
- */
-
-xtalk_dmamap_t
-xtalk_dmamap_alloc(vertex_hdl_t dev, /* set up mappings for this device */
- device_desc_t dev_desc, /* device descriptor */
- size_t byte_count_max, /* max size of a mapping */
- unsigned flags)
-{ /* defined in dma.h */
- return (xtalk_dmamap_t) DEV_FUNC(dev, dmamap_alloc)
- (dev, dev_desc, byte_count_max, flags);
-}
-
-
-void
-xtalk_dmamap_free(xtalk_dmamap_t xtalk_dmamap)
-{
- DMAMAP_FUNC(xtalk_dmamap, dmamap_free)
- (CAST_DMAMAP(xtalk_dmamap));
-}
-
-
-iopaddr_t
-xtalk_dmamap_addr(xtalk_dmamap_t xtalk_dmamap, /* use these mapping resources */
- paddr_t paddr, /* map for this address */
- size_t byte_count)
-{ /* map this many bytes */
- return DMAMAP_FUNC(xtalk_dmamap, dmamap_addr)
- (CAST_DMAMAP(xtalk_dmamap), paddr, byte_count);
-}
-
-
-void
-xtalk_dmamap_done(xtalk_dmamap_t xtalk_dmamap)
-{
- DMAMAP_FUNC(xtalk_dmamap, dmamap_done)
- (CAST_DMAMAP(xtalk_dmamap));
-}
-
-
-iopaddr_t
-xtalk_dmatrans_addr(vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- paddr_t paddr, /* system physical address */
- size_t byte_count, /* length */
- unsigned flags)
-{ /* defined in dma.h */
- return DEV_FUNC(dev, dmatrans_addr)
- (dev, dev_desc, paddr, byte_count, flags);
-}
-
-
-void
-xtalk_dmamap_drain(xtalk_dmamap_t map)
-{
- DMAMAP_FUNC(map, dmamap_drain)
- (CAST_DMAMAP(map));
-}
-
-void
-xtalk_dmaaddr_drain(vertex_hdl_t dev, paddr_t addr, size_t size)
-{
- DEV_FUNC(dev, dmaaddr_drain)
- (dev, addr, size);
-}
-
-/* =====================================================================
- * INTERRUPT MANAGEMENT
- *
- * Allow io channel devices to establish interrupts
- */
-
-/*
- * Allocate resources required for an interrupt as specified in intr_desc.
- * Return resource handle in intr_hdl.
- */
-xtalk_intr_t
-xtalk_intr_alloc(vertex_hdl_t dev, /* which Crosstalk device */
- device_desc_t dev_desc, /* device descriptor */
- vertex_hdl_t owner_dev)
-{ /* owner of this interrupt */
- return (xtalk_intr_t) DEV_FUNC(dev, intr_alloc)
- (dev, dev_desc, owner_dev);
-}
-
-/*
- * Allocate resources required for an interrupt as specified in dev_desc.
- * Unconditionally setup resources to be non-threaded.
- * Return resource handle in intr_hdl.
- */
-xtalk_intr_t
-xtalk_intr_alloc_nothd(vertex_hdl_t dev, /* which Crosstalk device */
- device_desc_t dev_desc, /* device descriptor */
- vertex_hdl_t owner_dev) /* owner of this interrupt */
-{
- return (xtalk_intr_t) DEV_FUNC(dev, intr_alloc_nothd)
- (dev, dev_desc, owner_dev);
-}
-
-/*
- * Free resources consumed by intr_alloc.
- */
-void
-xtalk_intr_free(xtalk_intr_t intr_hdl)
-{
- INTR_FUNC(intr_hdl, intr_free)
- (CAST_INTR(intr_hdl));
-}
-
-
-/*
- * Associate resources allocated with a previous xtalk_intr_alloc call with the
- * described handler, arg, name, etc.
- *
- * Returns 0 on success, returns <0 on failure.
- */
-int
-xtalk_intr_connect(xtalk_intr_t intr_hdl, /* xtalk intr resource handle */
- intr_func_t intr_func, /* xtalk intr handler */
- intr_arg_t intr_arg, /* arg to intr handler */
- xtalk_intr_setfunc_t setfunc, /* func to set intr hw */
- void *setfunc_arg) /* arg to setfunc */
-{
- return INTR_FUNC(intr_hdl, intr_connect)
- (CAST_INTR(intr_hdl), intr_func, intr_arg, setfunc, setfunc_arg);
-}
-
-
-/*
- * Disassociate handler with the specified interrupt.
- */
-void
-xtalk_intr_disconnect(xtalk_intr_t intr_hdl)
-{
- INTR_FUNC(intr_hdl, intr_disconnect)
- (CAST_INTR(intr_hdl));
-}
-
-
-/*
- * Return a hwgraph vertex that represents the CPU currently
- * targeted by an interrupt.
- */
-vertex_hdl_t
-xtalk_intr_cpu_get(xtalk_intr_t intr_hdl)
-{
- return (vertex_hdl_t)0;
-}
-
-
-/*
- * =====================================================================
- * ERROR MANAGEMENT
- */
-
-/*
- * xtalk_error_handler:
- * pass this error on to the handler registered
- * at the specified xtalk connecdtion point,
- * or complain about it here if there is no handler.
- *
- * This routine plays two roles during error delivery
- * to most widgets: first, the external agent (heart,
- * hub, or whatever) calls in with the error and the
- * connect point representing the io channel switch,
- * or whatever io channel device is directly connected
- * to the agent.
- *
- * If there is a switch, it will generally look at the
- * widget number stashed in the ioerror structure; and,
- * if the error came from some widget other than the
- * switch, it will call back into xtalk_error_handler
- * with the connection point of the offending port.
- */
-int
-xtalk_error_handler(
- vertex_hdl_t xconn,
- int error_code,
- ioerror_mode_t mode,
- ioerror_t *ioerror)
-{
- xwidget_info_t xwidget_info;
- char name[MAXDEVNAME];
-
-
- xwidget_info = xwidget_info_get(xconn);
- /* Make sure that xwidget_info is a valid pointer before derefencing it.
- * We could come in here during very early initialization.
- */
- if (xwidget_info && xwidget_info->w_efunc)
- return xwidget_info->w_efunc
- (xwidget_info->w_einfo,
- error_code, mode, ioerror);
- /*
- * no error handler registered for
- * the offending port. it's not clear
- * what needs to be done, but reporting
- * it would be a good thing, unless it
- * is a mode that requires nothing.
- */
- if ((mode == MODE_DEVPROBE) || (mode == MODE_DEVUSERERROR) ||
- (mode == MODE_DEVREENABLE))
- return IOERROR_HANDLED;
-
- printk(KERN_WARNING "Xbow at %s encountered Fatal error", vertex_to_name(xconn, name, MAXDEVNAME));
-
- return IOERROR_UNHANDLED;
-}
-
-
-/* =====================================================================
- * CONFIGURATION MANAGEMENT
- */
-
-/*
- * Startup an io channel provider
- */
-void
-xtalk_provider_startup(vertex_hdl_t xtalk_provider)
-{
- ((xtalk_provider_t *) hwgraph_fastinfo_get(xtalk_provider))->provider_startup(xtalk_provider);
-}
-
-
-/*
- * Shutdown an io channel provider
- */
-void
-xtalk_provider_shutdown(vertex_hdl_t xtalk_provider)
-{
- ((xtalk_provider_t *) hwgraph_fastinfo_get(xtalk_provider))->provider_shutdown(xtalk_provider);
-}
-
-/*
- * Enable a device on a xtalk widget
- */
-void
-xtalk_widgetdev_enable(vertex_hdl_t xconn_vhdl, int devnum)
-{
- return;
-}
-
-/*
- * Shutdown a device on a xtalk widget
- */
-void
-xtalk_widgetdev_shutdown(vertex_hdl_t xconn_vhdl, int devnum)
-{
- return;
-}
-
-/*
- * Generic io channel functions, for use with all io channel providers
- * and all io channel devices.
- */
-
-/* Generic io channel interrupt interfaces */
-vertex_hdl_t
-xtalk_intr_dev_get(xtalk_intr_t xtalk_intr)
-{
- return (xtalk_intr->xi_dev);
-}
-
-xwidgetnum_t
-xtalk_intr_target_get(xtalk_intr_t xtalk_intr)
-{
- return (xtalk_intr->xi_target);
-}
-
-xtalk_intr_vector_t
-xtalk_intr_vector_get(xtalk_intr_t xtalk_intr)
-{
- return (xtalk_intr->xi_vector);
-}
-
-iopaddr_t
-xtalk_intr_addr_get(struct xtalk_intr_s *xtalk_intr)
-{
- return (xtalk_intr->xi_addr);
-}
-
-void *
-xtalk_intr_sfarg_get(xtalk_intr_t xtalk_intr)
-{
- return (xtalk_intr->xi_sfarg);
-}
-
-/* Generic io channel pio interfaces */
-vertex_hdl_t
-xtalk_pio_dev_get(xtalk_piomap_t xtalk_piomap)
-{
- return (xtalk_piomap->xp_dev);
-}
-
-xwidgetnum_t
-xtalk_pio_target_get(xtalk_piomap_t xtalk_piomap)
-{
- return (xtalk_piomap->xp_target);
-}
-
-iopaddr_t
-xtalk_pio_xtalk_addr_get(xtalk_piomap_t xtalk_piomap)
-{
- return (xtalk_piomap->xp_xtalk_addr);
-}
-
-ulong
-xtalk_pio_mapsz_get(xtalk_piomap_t xtalk_piomap)
-{
- return (xtalk_piomap->xp_mapsz);
-}
-
-caddr_t
-xtalk_pio_kvaddr_get(xtalk_piomap_t xtalk_piomap)
-{
- return (xtalk_piomap->xp_kvaddr);
-}
-
-
-/* Generic io channel dma interfaces */
-vertex_hdl_t
-xtalk_dma_dev_get(xtalk_dmamap_t xtalk_dmamap)
-{
- return (xtalk_dmamap->xd_dev);
-}
-
-xwidgetnum_t
-xtalk_dma_target_get(xtalk_dmamap_t xtalk_dmamap)
-{
- return (xtalk_dmamap->xd_target);
-}
-
-
-/* Generic io channel widget information interfaces */
-
-/* xwidget_info_chk:
- * check to see if this vertex is a widget;
- * if so, return its widget_info (if any).
- * if not, return NULL.
- */
-xwidget_info_t
-xwidget_info_chk(vertex_hdl_t xwidget)
-{
- arbitrary_info_t ainfo = 0;
-
- hwgraph_info_get_LBL(xwidget, INFO_LBL_XWIDGET, &ainfo);
- return (xwidget_info_t) ainfo;
-}
-
-
-xwidget_info_t
-xwidget_info_get(vertex_hdl_t xwidget)
-{
- xwidget_info_t widget_info;
-
- widget_info = (xwidget_info_t)
- hwgraph_fastinfo_get(xwidget);
-
- return (widget_info);
-}
-
-void
-xwidget_info_set(vertex_hdl_t xwidget, xwidget_info_t widget_info)
-{
- if (widget_info != NULL)
- widget_info->w_fingerprint = widget_info_fingerprint;
-
- hwgraph_fastinfo_set(xwidget, (arbitrary_info_t) widget_info);
-
- /* Also, mark this vertex as an xwidget,
- * and use the widget_info, so xwidget_info_chk
- * can work (and be fairly efficient).
- */
- hwgraph_info_add_LBL(xwidget, INFO_LBL_XWIDGET,
- (arbitrary_info_t) widget_info);
-}
-
-vertex_hdl_t
-xwidget_info_dev_get(xwidget_info_t xwidget_info)
-{
- if (xwidget_info == NULL)
- panic("xwidget_info_dev_get: null xwidget_info");
- return (xwidget_info->w_vertex);
-}
-
-xwidgetnum_t
-xwidget_info_id_get(xwidget_info_t xwidget_info)
-{
- if (xwidget_info == NULL)
- panic("xwidget_info_id_get: null xwidget_info");
- return (xwidget_info->w_id);
-}
-
-
-vertex_hdl_t
-xwidget_info_master_get(xwidget_info_t xwidget_info)
-{
- if (xwidget_info == NULL)
- panic("xwidget_info_master_get: null xwidget_info");
- return (xwidget_info->w_master);
-}
-
-xwidgetnum_t
-xwidget_info_masterid_get(xwidget_info_t xwidget_info)
-{
- if (xwidget_info == NULL)
- panic("xwidget_info_masterid_get: null xwidget_info");
- return (xwidget_info->w_masterid);
-}
-
-xwidget_part_num_t
-xwidget_info_part_num_get(xwidget_info_t xwidget_info)
-{
- if (xwidget_info == NULL)
- panic("xwidget_info_part_num_get: null xwidget_info");
- return (xwidget_info->w_hwid.part_num);
-}
-
-xwidget_mfg_num_t
-xwidget_info_mfg_num_get(xwidget_info_t xwidget_info)
-{
- if (xwidget_info == NULL)
- panic("xwidget_info_mfg_num_get: null xwidget_info");
- return (xwidget_info->w_hwid.mfg_num);
-}
-/* Extract the widget name from the widget information
- * for the xtalk widget.
- */
-char *
-xwidget_info_name_get(xwidget_info_t xwidget_info)
-{
- if (xwidget_info == NULL)
- panic("xwidget_info_name_get: null xwidget_info");
- return(xwidget_info->w_name);
-}
-/* Generic io channel initialization interfaces */
-
-/*
- * Associate a set of xtalk_provider functions with a vertex.
- */
-void
-xtalk_provider_register(vertex_hdl_t provider, xtalk_provider_t *xtalk_fns)
-{
- hwgraph_fastinfo_set(provider, (arbitrary_info_t) xtalk_fns);
-}
-
-/*
- * Disassociate a set of xtalk_provider functions with a vertex.
- */
-void
-xtalk_provider_unregister(vertex_hdl_t provider)
-{
- hwgraph_fastinfo_set(provider, (arbitrary_info_t)NULL);
-}
-
-/*
- * Obtain a pointer to the xtalk_provider functions for a specified Crosstalk
- * provider.
- */
-xtalk_provider_t *
-xtalk_provider_fns_get(vertex_hdl_t provider)
-{
- return ((xtalk_provider_t *) hwgraph_fastinfo_get(provider));
-}
-
-/*
- * Inform xtalk infrastructure that a driver is no longer available for
- * handling any widgets.
- */
-void
-xwidget_driver_unregister(char *driver_prefix)
-{
- return;
-}
-
-/*
- * Call some function with each vertex that
- * might be one of this driver's attach points.
- */
-void
-xtalk_iterate(char *driver_prefix,
- xtalk_iter_f *func)
-{
-}
-
-/*
- * xwidget_register:
- * Register a xtalk device (xwidget) by doing the following.
- * -allocate and initialize xwidget_info data
- * -allocate a hwgraph vertex with name based on widget number (id)
- * -look up the widget's initialization function and call it,
- * or remember the vertex for later initialization.
- *
- */
-int
-xwidget_register(xwidget_hwid_t hwid, /* widget's hardware ID */
- vertex_hdl_t widget, /* widget to initialize */
- xwidgetnum_t id, /* widget's target id (0..f) */
- vertex_hdl_t master, /* widget's master vertex */
- xwidgetnum_t targetid) /* master's target id (9/a) */
-{
- xwidget_info_t widget_info;
- char *s,devnm[MAXDEVNAME];
-
- /* Allocate widget_info and associate it with widget vertex */
- widget_info = kmalloc(sizeof(*widget_info), GFP_KERNEL);
- if (!widget_info)
- return - ENOMEM;
-
- /* Initialize widget_info */
- widget_info->w_vertex = widget;
- widget_info->w_id = id;
- widget_info->w_master = master;
- widget_info->w_masterid = targetid;
- widget_info->w_hwid = *hwid; /* structure copy */
- widget_info->w_efunc = 0;
- widget_info->w_einfo = 0;
- /*
- * get the name of this xwidget vertex and keep the info.
- * This is needed during errors and interupts, but as
- * long as we have it, we can use it elsewhere.
- */
- s = dev_to_name(widget,devnm,MAXDEVNAME);
- widget_info->w_name = kmalloc(strlen(s) + 1, GFP_KERNEL);
- strcpy(widget_info->w_name,s);
-
- xwidget_info_set(widget, widget_info);
-
- device_master_set(widget, master);
-
- /*
- * Add pointer to async attach info -- tear down will be done when
- * the particular descendant is done with the info.
- */
- return cdl_add_connpt(hwid->part_num, hwid->mfg_num,
- widget, 0);
-}
-
-/*
- * xwidget_unregister :
- * Unregister the xtalk device and detach all its hwgraph namespace.
- */
-int
-xwidget_unregister(vertex_hdl_t widget)
-{
- xwidget_info_t widget_info;
- xwidget_hwid_t hwid;
-
- /* Make sure that we have valid widget information initialized */
- if (!(widget_info = xwidget_info_get(widget)))
- return 1;
-
- hwid = &(widget_info->w_hwid);
-
- kfree(widget_info->w_name);
- kfree(widget_info);
- return 0;
-}
-
-void
-xwidget_error_register(vertex_hdl_t xwidget,
- error_handler_f *efunc,
- error_handler_arg_t einfo)
-{
- xwidget_info_t xwidget_info;
-
- xwidget_info = xwidget_info_get(xwidget);
- ASSERT(xwidget_info != NULL);
- xwidget_info->w_efunc = efunc;
- xwidget_info->w_einfo = einfo;
-}
-
-/*
- * Issue a link reset to a widget.
- */
-void
-xwidget_reset(vertex_hdl_t xwidget)
-{
- xswitch_reset_link(xwidget);
-}
-
-
-void
-xwidget_gfx_reset(vertex_hdl_t xwidget)
-{
- return;
-}
-
-#define ANON_XWIDGET_NAME "No Name" /* Default Widget Name */
-
-/* Get the canonical hwgraph name of xtalk widget */
-char *
-xwidget_name_get(vertex_hdl_t xwidget_vhdl)
-{
- xwidget_info_t info;
-
- /* If we have a bogus widget handle then return
- * a default anonymous widget name.
- */
- if (xwidget_vhdl == GRAPH_VERTEX_NONE)
- return(ANON_XWIDGET_NAME);
- /* Read the widget name stored in the widget info
- * for the widget setup during widget initialization.
- */
- info = xwidget_info_get(xwidget_vhdl);
- ASSERT(info != NULL);
- return(xwidget_info_name_get(info));
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <asm/sn/sgi.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/sn/pci/pci_bus_cvlink.h>
-#include <asm/sn/simulator.h>
-
-extern pciio_provider_t *pciio_to_provider_fns(vertex_hdl_t dev);
-
-int
-snia_badaddr_val(volatile void *addr, int len, volatile void *ptr)
-{
- int ret = 0;
- volatile void *new_addr;
-
- switch (len) {
- case 4:
- new_addr = (void *) addr;
- ret = ia64_sn_probe_io_slot((long) new_addr, len, (void *) ptr);
- break;
- default:
- printk(KERN_WARNING
- "snia_badaddr_val given len %x but supports len of 4 only\n",
- len);
- }
-
- if (ret < 0)
- panic("snia_badaddr_val: unexpected status (%d) in probing",
- ret);
- return (ret);
-
-}
-
-nasid_t
-snia_get_console_nasid(void)
-{
- extern nasid_t console_nasid;
- extern nasid_t master_baseio_nasid;
-
- if (console_nasid < 0) {
- console_nasid = ia64_sn_get_console_nasid();
- if (console_nasid < 0) {
-// ZZZ What do we do if we don't get a console nasid on the hardware????
- if (IS_RUNNING_ON_SIMULATOR())
- console_nasid = master_baseio_nasid;
- }
- }
- return console_nasid;
-}
-
-nasid_t
-snia_get_master_baseio_nasid(void)
-{
- extern nasid_t master_baseio_nasid;
- extern char master_baseio_wid;
-
- if (master_baseio_nasid < 0) {
- master_baseio_nasid = ia64_sn_get_master_baseio_nasid();
-
- if (master_baseio_nasid >= 0) {
- master_baseio_wid =
- WIDGETID_GET(KL_CONFIG_CH_CONS_INFO
- (master_baseio_nasid)->memory_base);
- }
- }
- return master_baseio_nasid;
-}
-
-/*
- * XXX: should probably be called __sn2_pci_rrb_alloc
- * used by qla1280
- */
-
-int
-snia_pcibr_rrb_alloc(struct pci_dev *pci_dev,
- int *count_vchan0, int *count_vchan1)
-{
- vertex_hdl_t dev = PCIDEV_VERTEX(pci_dev);
-
- return pcibr_rrb_alloc(dev, count_vchan0, count_vchan1);
-}
-
-/*
- * XXX: interface should be more like
- *
- * int __sn2_pci_enable_bwswap(struct pci_dev *dev);
- * void __sn2_pci_disable_bswap(struct pci_dev *dev);
- */
-/* used by ioc4 ide */
-
-pciio_endian_t
-snia_pciio_endian_set(struct pci_dev * pci_dev,
- pciio_endian_t device_end, pciio_endian_t desired_end)
-{
- vertex_hdl_t dev = PCIDEV_VERTEX(pci_dev);
-
- return ((pciio_to_provider_fns(dev))->endian_set)
- (dev, device_end, desired_end);
-}
-
-EXPORT_SYMBOL(snia_pciio_endian_set);
-EXPORT_SYMBOL(snia_pcibr_rrb_alloc);
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <asm/errno.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/driver.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/xtalk/xtalk.h>
-#include <asm/sn/xtalk/xswitch.h>
-#include <asm/sn/xtalk/xwidget.h>
-#include <asm/sn/xtalk/xtalk_private.h>
-
-
-/*
- * This file provides generic support for Crosstalk
- * Switches, in a way that insulates crosstalk providers
- * from specifics about the switch chips being used.
- */
-
-#include <asm/sn/xtalk/xbow.h>
-
-#define XSWITCH_CENSUS_BIT(port) (1<<(port))
-#define XSWITCH_CENSUS_PORT_MAX (0xF)
-#define XSWITCH_CENSUS_PORTS (0x10)
-#define XSWITCH_WIDGET_PRESENT(infop,port) ((infop)->census & XSWITCH_CENSUS_BIT(port))
-
-static char xswitch_info_fingerprint[] = "xswitch_info";
-
-struct xswitch_info_s {
- char *fingerprint;
- unsigned census;
- vertex_hdl_t vhdl[XSWITCH_CENSUS_PORTS];
- vertex_hdl_t master_vhdl[XSWITCH_CENSUS_PORTS];
- xswitch_provider_t *xswitch_fns;
-};
-
-xswitch_info_t
-xswitch_info_get(vertex_hdl_t xwidget)
-{
- xswitch_info_t xswitch_info;
-
- xswitch_info = (xswitch_info_t)
- hwgraph_fastinfo_get(xwidget);
-
- return (xswitch_info);
-}
-
-void
-xswitch_info_vhdl_set(xswitch_info_t xswitch_info,
- xwidgetnum_t port,
- vertex_hdl_t xwidget)
-{
- if (port > XSWITCH_CENSUS_PORT_MAX)
- return;
-
- xswitch_info->vhdl[(int)port] = xwidget;
-}
-
-vertex_hdl_t
-xswitch_info_vhdl_get(xswitch_info_t xswitch_info,
- xwidgetnum_t port)
-{
- if (port > XSWITCH_CENSUS_PORT_MAX)
- return GRAPH_VERTEX_NONE;
-
- return xswitch_info->vhdl[(int)port];
-}
-
-/*
- * Some systems may allow for multiple switch masters. On such systems,
- * we assign a master for each port on the switch. These interfaces
- * establish and retrieve that assignment.
- */
-void
-xswitch_info_master_assignment_set(xswitch_info_t xswitch_info,
- xwidgetnum_t port,
- vertex_hdl_t master_vhdl)
-{
- if (port > XSWITCH_CENSUS_PORT_MAX)
- return;
-
- xswitch_info->master_vhdl[(int)port] = master_vhdl;
-}
-
-vertex_hdl_t
-xswitch_info_master_assignment_get(xswitch_info_t xswitch_info,
- xwidgetnum_t port)
-{
- if (port > XSWITCH_CENSUS_PORT_MAX)
- return GRAPH_VERTEX_NONE;
-
- return xswitch_info->master_vhdl[(int)port];
-}
-
-void
-xswitch_info_set(vertex_hdl_t xwidget, xswitch_info_t xswitch_info)
-{
- xswitch_info->fingerprint = xswitch_info_fingerprint;
- hwgraph_fastinfo_set(xwidget, (arbitrary_info_t) xswitch_info);
-}
-
-xswitch_info_t
-xswitch_info_new(vertex_hdl_t xwidget)
-{
- xswitch_info_t xswitch_info;
-
- xswitch_info = xswitch_info_get(xwidget);
- if (xswitch_info == NULL) {
- int port;
-
- xswitch_info = kmalloc(sizeof(*xswitch_info), GFP_KERNEL);
- if (!xswitch_info) {
- printk(KERN_WARNING "xswitch_info_new(): Unable to "
- "allocate memory\n");
- return NULL;
- }
- xswitch_info->census = 0;
- for (port = 0; port <= XSWITCH_CENSUS_PORT_MAX; port++) {
- xswitch_info_vhdl_set(xswitch_info, port,
- GRAPH_VERTEX_NONE);
-
- xswitch_info_master_assignment_set(xswitch_info,
- port,
- GRAPH_VERTEX_NONE);
- }
- xswitch_info_set(xwidget, xswitch_info);
- }
- return xswitch_info;
-}
-
-void
-xswitch_provider_register(vertex_hdl_t busv,
- xswitch_provider_t * xswitch_fns)
-{
- xswitch_info_t xswitch_info = xswitch_info_get(busv);
-
- ASSERT(xswitch_info);
- xswitch_info->xswitch_fns = xswitch_fns;
-}
-
-void
-xswitch_info_link_is_ok(xswitch_info_t xswitch_info, xwidgetnum_t port)
-{
- xswitch_info->census |= XSWITCH_CENSUS_BIT(port);
-}
-
-int
-xswitch_info_link_ok(xswitch_info_t xswitch_info, xwidgetnum_t port)
-{
- if (port > XSWITCH_CENSUS_PORT_MAX)
- return 0;
-
- return (xswitch_info->census & XSWITCH_CENSUS_BIT(port));
-}
-
-int
-xswitch_reset_link(vertex_hdl_t xconn_vhdl)
-{
- return xbow_reset_link(xconn_vhdl);
-}
+++ /dev/null
-/*
- * Platform dependent support for IO probing.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <asm/sn/sgi.h>
-#include <asm/sn/sn_sal.h>
-
-/**
- * ia64_sn_probe_io_slot - test a memory location for readability
- * @paddr: physical address to probe
- * @size: number bytes to read (1,2,4,8)
- * @data_ptr: address to store value read by probe (-1 returned if probe fails)
- *
- * This function will probe a physical address to determine if
- * the address can be read. If reading the address causes a BUS
- * error, an error is returned. If the probe succeeds, the contents
- * of the memory location is returned.
- *
- * Return values:
- * 0 - probe successful
- * 1 - probe failed (generated MCA)
- * 2 - Bad arg
- * <0 - PAL error
- */
-u64
-ia64_sn_probe_io_slot(long paddr, long size, void *data_ptr)
-{
- struct ia64_sal_retval isrv;
-
- SAL_CALL(isrv, SN_SAL_PROBE, paddr, size, 0, 0, 0, 0, 0);
-
- if (data_ptr) {
- switch (size) {
- case 1:
- *((u8*)data_ptr) = (u8)isrv.v0;
- break;
- case 2:
- *((u16*)data_ptr) = (u16)isrv.v0;
- break;
- case 4:
- *((u32*)data_ptr) = (u32)isrv.v0;
- break;
- case 8:
- *((u64*)data_ptr) = (u64)isrv.v0;
- break;
- default:
- isrv.status = 2;
- }
- }
-
- return isrv.status;
-}
+++ /dev/null
-
-#define DN_DEBUG_BUFFER_BASE 0x82800000
-#define DN_DEBUG_BUFFER_SIZE 8*1024*1024
-
-static char *current_dbg_ptr=DN_DEBUG_BUFFER_BASE;
-
-int dn_deb_printf(const char *fmt, ...) {
-
- va_list args;
- int i;
-
- if(current_dbg_ptr<(DN_DEBUG_BUFFER_BASE + DN_DEBUG_BUFFER_SIZE)) {
- va_start(args,fmt);
- i=vsprintf(current_dbg_ptr,fmt,args);
- va_end(args);
- current_dbg_ptr+=i;
-
- return i;
- }
- else
- return 0;
-}
+++ /dev/null
-#include <linux/module.h>
-#include <linux/types.h>
-#include <asm/dvma.h>
-#include <asm/idprom.h>
-
-/*
- * Add things here when you find the need for it.
- */
-EXPORT_SYMBOL(dvma_map_align);
-EXPORT_SYMBOL(dvma_unmap);
-EXPORT_SYMBOL(dvma_malloc_align);
-EXPORT_SYMBOL(dvma_free);
-EXPORT_SYMBOL(idprom);
+++ /dev/null
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5282 ColdFire based MOTOROLA boards.
- *
- * (C) Copyright 2003, Greg Ungerer (gerg@snapgear.com).
- */
-
-/*****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*****************************************************************************/
-
-/*
- * Motorola M5282C3 ColdFire eval board, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#if defined(CONFIG_RAM16MB)
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#elif defined(CONFIG_RAM8MB)
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#else
-#define MEM_SIZE 0x00400000 /* Memory size 4Mb */
-#endif
-
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Set memory size.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- *
- * Cache is totally broken in first 5282 silicon.
- * No point enabling it for now.
- */
-#if 0
- move.l #0x01000000, %d0
- movec %d0, %CACR /* Invalidate cache */
- nop
-
- move.l #0x0000c000, %d0 /* Set SDRAM cached only */
- movec %d0, %ACR0
- move.l #0x00000000, %d0 /* No other regions cached */
- movec %d0, %ACR1
-
- move.l #0x00000000, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-#endif
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current thread pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
+++ /dev/null
-#
-# Makefile for the linux kernel.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT
-# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT
-#
-
-ifdef CONFIG_FULLDEBUG
-AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1
-endif
-
-obj-y := config.o pit.o
-
-extra-y := $(BOARD)/crt0_$(MODEL).o
+++ /dev/null
-/***************************************************************************/
-
-/*
- * linux/arch/m68knommu/platform/5282/config.c
- *
- * Sub-architcture dependant initialization code for the Motorola
- * 5282 CPU.
- *
- * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
- * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
- */
-
-/***************************************************************************/
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/param.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/dma.h>
-#include <asm/traps.h>
-#include <asm/machdep.h>
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfdma.h>
-
-/***************************************************************************/
-
-void coldfire_pit_tick(void);
-void coldfire_pit_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
-unsigned long coldfire_pit_offset(void);
-void coldfire_trap_init(void);
-void coldfire_reset(void);
-
-/***************************************************************************/
-
-/*
- * DMA channel base address table.
- */
-unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
- MCF_MBAR + MCFDMA_BASE0,
-};
-
-unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
-
-/***************************************************************************/
-
-void mcf_disableall(void)
-{
- *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
- *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
-}
-
-/***************************************************************************/
-
-void mcf_autovector(unsigned int vec)
-{
- /* Everything is auto-vectored on the 5272 */
-}
-
-/***************************************************************************/
-
-void config_BSP(char *commandp, int size)
-{
- mcf_disableall();
-
-#ifdef CONFIG_BOOTPARAM
- strncpy(commandp, CONFIG_BOOTPARAM_STRING, size);
- commandp[size-1] = 0;
-#else
- memset(commandp, 0, size);
-#endif
-
- mach_sched_init = coldfire_pit_init;
- mach_tick = coldfire_pit_tick;
- mach_gettimeoffset = coldfire_pit_offset;
- mach_trap_init = coldfire_trap_init;
- mach_reset = coldfire_reset;
-}
-
-/***************************************************************************/
+++ /dev/null
-/***************************************************************************/
-
-/*
- * pit.c -- Motorola ColdFire PIT timer. Currently this type of
- * hardware timer only exists in the Motorola ColdFire
- * 5282 CPU.
- *
- * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
- * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
- *
- */
-
-/***************************************************************************/
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/param.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/irq.h>
-#include <asm/coldfire.h>
-#include <asm/mcfpit.h>
-#include <asm/mcfsim.h>
-
-/***************************************************************************/
-
-void coldfire_pit_tick(void)
-{
- volatile struct mcfpit *tp;
-
- /* Reset the ColdFire timer */
- tp = (volatile struct mcfpit *) (MCF_IPSBAR + MCFPIT_BASE1);
- tp->pcsr |= MCFPIT_PCSR_PIF;
-}
-
-/***************************************************************************/
-
-void coldfire_pit_init(irqreturn_t (*handler)(int, void *, struct pt_regs *))
-{
- volatile unsigned char *icrp;
- volatile unsigned long *imrp;
- volatile struct mcfpit *tp;
-
- request_irq(64+55, handler, SA_INTERRUPT, "ColdFire Timer", NULL);
-
- icrp = (volatile unsigned char *) (MCF_IPSBAR + MCFICM_INTC0 +
- MCFINTC_ICR0 + MCFINT_PIT1);
- *icrp = 0x2b; /* PIT1 with level 5, priority 3 */
-
- imrp = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
- *imrp &= ~(1 << (55 - 32));
-
- /* Set up PIT timer 1 as poll clock */
- tp = (volatile struct mcfpit *) (MCF_IPSBAR + MCFPIT_BASE1);
- tp->pcsr = MCFPIT_PCSR_DISABLE;
-
- tp->pmr = ((MCF_CLK / 2) / 64) / HZ;
- tp->pcsr = MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | MCFPIT_PCSR_OVW |
- MCFPIT_PCSR_RLD | MCFPIT_PCSR_CLK64;
-}
-
-/***************************************************************************/
-
-unsigned long coldfire_pit_offset(void)
-{
- volatile struct mcfpit *tp;
- volatile unsigned long *ipr;
- unsigned long pmr, pcntr, offset;
-
- tp = (volatile struct mcfpit *) (MCF_IPSBAR + MCFPIT_BASE1);
- ipr = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IPRH);
-
- pmr = tp->pmr;
- pcntr = tp->pcntr;
-
- /*
- * If we are still in the first half of the upcount and a
- * timer interupt is pending, then add on a ticks worth of time.
- */
- offset = ((pcntr * (1000000 / HZ)) / pmr);
- if ((offset < (1000000 / HZ / 2)) && (*ipr & (1 << (55 - 32))))
- offset += 1000000 / HZ;
- return offset;
-}
-
-/***************************************************************************/
+++ /dev/null
-/*****************************************************************************/
-
-/*
- * crt0_ram.S -- startup code for MCF5282 ColdFire based boards.
- *
- * (C) Copyright 2003, Greg Ungerer (gerg@snapgear.com).
- */
-
-/*****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*****************************************************************************/
-
-/*
- * senTec COBRA5282 board, chip select and memory setup.
- */
-
-#define MEM_BASE 0x00000000 /* Memory base at address 0 */
-#define VBR_BASE MEM_BASE /* Vector address */
-
-#if defined(CONFIG_RAM16MB)
-#define MEM_SIZE 0x01000000 /* Memory size 16Mb */
-#elif defined(CONFIG_RAM8MB)
-#define MEM_SIZE 0x00800000 /* Memory size 8Mb */
-#else
-#define MEM_SIZE 0x00400000 /* Memory size 4Mb */
-#endif
-
-#define IPSBAR 0x40000000
-#define GPACR0 0x30
-/*****************************************************************************/
-
-.global _start
-.global _rambase
-.global _ramvec
-.global _ramstart
-.global _ramend
-
-/*****************************************************************************/
-
-.data
-
-/*
- * Set up the usable of RAM stuff. Size of RAM is determined then
- * an initial stack set up at the end.
- */
-_rambase:
-.long 0
-_ramvec:
-.long 0
-_ramstart:
-.long 0
-_ramend:
-.long 0
-
-/*****************************************************************************/
-
-.text
-
-/*
- * This is the codes first entry point. This is where it all
- * begins...
- */
-
-_start:
- nop /* Filler */
- move.w #0x2700, %sr /* No interrupts */
-
- /*
- * Setup VBR here, otherwise buserror remap will not work.
- * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
- *
- * bkr@cut.de 19990306
- *
- * Note: this is because dBUG points VBR to ROM, making vectors read
- * only, so the bus trap can't be changed. (RS)
- */
- move.l #VBR_BASE, %a7 /* Note VBR can't be read */
- movec %a7, %VBR
- move.l %a7, _ramvec /* Set up vector addr */
- move.l %a7, _rambase /* Set up base RAM addr */
-
-
- /*
- * Set memory size.
- */
- move.l #MEM_SIZE, %a0
-
- move.l %a0, %d0 /* Mem end addr is in a0 */
- move.l %d0, %sp /* Set up initial stack ptr */
- move.l %d0, _ramend /* Set end ram addr */
-
- /*
- * Enable CPU internal cache.
- *
- * Cache is totally broken in first 5282 silicon.
- * No point enabling it for now.
- */
-#if 0
- move.l #0x01000000, %d0
- movec %d0, %CACR /* Invalidate cache */
- nop
-
- move.l #0x0000c000, %d0 /* Set SDRAM cached only */
- movec %d0, %ACR0
- move.l #0x00000000, %d0 /* No other regions cached */
- movec %d0, %ACR1
-
- move.l #0x00000000, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-#endif
-
-
-#ifdef CONFIG_ROMFS_FS
- /*
- * Move ROM filesystem above bss :-)
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Set up destination */
- move.l %a0, %a2 /* Copy of bss start */
-
- move.l 8(%a0), %d0 /* Get size of ROMFS */
- addq.l #8, %d0 /* Allow for rounding */
- and.l #0xfffffffc, %d0 /* Whole words */
-
- add.l %d0, %a0 /* Copy from end */
- add.l %d0, %a1 /* Copy from end */
- move.l %a1, _ramstart /* Set start of ram */
-
-_copy_romfs:
- move.l -(%a0), %d0 /* Copy dword */
- move.l %d0, -(%a1)
- cmp.l %a0, %a2 /* Check if at end */
- bne _copy_romfs
-#else /* CONFIG_ROMFS_FS */
- lea.l _ebss, %a1
- move.l %a1, _ramstart
-#endif /* CONFIG_ROMFS_FS */
-
-
- /*
- * Zero out the bss region.
- */
- lea.l _sbss, %a0 /* Get start of bss */
- lea.l _ebss, %a1 /* Get end of bss */
- clr.l %d0 /* Set value */
-_clear_bss:
- move.l %d0, (%a0)+ /* Clear each word */
- cmp.l %a0, %a1 /* Check if at end */
- bne _clear_bss
-
- /*
- * Load the current thread pointer and stack.
- */
- lea init_thread_union, %a0
- lea 0x2000(%a0), %sp
-
- /*
- * User mode port access
- */
- move.l #0x0000000c, %d0
- move.b %d0, (IPSBAR+GPACR0)
-
-
- /*
- * Assember start up done, start code proper.
- */
- jsr start_kernel /* Start Linux kernel */
-
-_exit:
- jmp _exit /* Should never get here */
-
-/*****************************************************************************/
+++ /dev/null
-#
-# Makefile for the Baget specific kernel interface routines
-# under Linux.
-#
-
-obj-y := baget.o print.o setup.o time.o irq.o bagetIRQ.o \
- reset.o
-obj-$(CONFIG_VAC_RTC) += vacrtc.o
-
-EXTRA_AFLAGS := $(CFLAGS)
-
-bagetIRQ.o : bagetIRQ.S
- $(CC) $(CFLAGS) -c -o $@ $<
-
-##################### Baget Loader stuff ########################
-
-image: ../../../vmlinux
- cp -f $< $@
-
-image.bin: image
- $(OBJCOPY) -O binary $< $@
-
-ramdisk.bin:
- echo "Dummy ramdisk used. Provide your own if needed !" > $@
-
-dummy.c:
- touch $@
-
-dummy.o: dummy.c image.bin ramdisk.bin
- $(CC) $(CFLAGS) -c -o $@ $<
- $(OBJCOPY) --add-section=.vmlinux=image.bin \
- --add-section=.ramdisk=ramdisk.bin $@
-
-balo.h: image
- $(NM) $< | awk ' \
- BEGIN { printf "/* DO NOT EDIT THIS FILE */\n" } \
- /_ftext/ { printf "#define LOADADDR 0x%s\n", $$1 } \
- /kernel_entry/ { printf "#define START 0x%s\n", $$1 } \
- /balo_ramdisk_base/ { printf "#define RAMDISK_BASE 0x%s\n", $$1 } \
- /balo_ramdisk_size/ { printf "#define RAMDISK_SIZE 0x%s\n", $$1 } \
- ' > $@
-balo.o: balo.c balo.h
- $(CC) $(CFLAGS) -c $<
-
-balo_supp.o: balo_supp.S
- $(CC) $(CFLAGS) -c $<
-
-balo: balo.o dummy.o balo_supp.o print.o
- $(LD) $(LDFLAGS) -T ld.script.balo -o $@ $^
-
-clean:
- rm -f balo balo.h dummy.c image image.bin
-
+++ /dev/null
-/*
- * baget.c: Baget low level stuff
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- *
- */
-#include <stdarg.h>
-
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <asm/system.h>
-#include <asm/bootinfo.h>
-#include <asm/mipsregs.h>
-#include <asm/pgtable.h>
-
-#include <asm/baget/baget.h>
-
-/*
- * Following code is based on routines from 'mm/vmalloc.c'
- * Additional parameters ioaddr is needed to iterate across real I/O address.
- */
-static inline int alloc_area_pte(pte_t * pte, unsigned long address,
- unsigned long size, unsigned long ioaddr)
-{
- unsigned long end;
-
- address &= ~PMD_MASK;
- end = address + size;
- if (end > PMD_SIZE)
- end = PMD_SIZE;
- while (address < end) {
- unsigned long page;
- if (!pte_none(*pte))
- printk("kseg2_alloc_io: page already exists\n");
- /*
- * For MIPS looks pretty to have transparent mapping
- * for KSEG2 areas -- user can't access one, and no
- * problems with virtual <--> physical translation.
- */
- page = ioaddr & PAGE_MASK;
-
- set_pte(pte, __pte(page | pgprot_val(PAGE_USERIO) |
- _PAGE_GLOBAL | __READABLE | __WRITEABLE));
- address += PAGE_SIZE;
- ioaddr += PAGE_SIZE;
- pte++;
- }
- return 0;
-}
-
-static inline int alloc_area_pmd(pmd_t * pmd, unsigned long address,
- unsigned long size, unsigned long ioaddr)
-{
- unsigned long end;
-
- address &= ~PGDIR_MASK;
- end = address + size;
- if (end > PGDIR_SIZE)
- end = PGDIR_SIZE;
- while (address < end) {
- pte_t * pte = pte_alloc_kernel(pmd, address);
- if (!pte)
- return -ENOMEM;
- if (alloc_area_pte(pte, address, end - address, ioaddr))
- return -ENOMEM;
- address = (address + PMD_SIZE) & PMD_MASK;
- ioaddr += PMD_SIZE;
- pmd++;
- }
- return 0;
-}
-
-int kseg2_alloc_io (unsigned long address, unsigned long size)
-{
- pgd_t * dir;
- unsigned long end = address + size;
-
- dir = pgd_offset_k(address);
- flush_cache_all();
- while (address < end) {
- pmd_t *pmd;
- pgd_t olddir = *dir;
-
- pmd = pmd_alloc_kernel(dir, address);
- if (!pmd)
- return -ENOMEM;
- if (alloc_area_pmd(pmd, address, end - address, address))
- return -ENOMEM;
- if (pgd_val(olddir) != pgd_val(*dir))
- set_pgdir(address, *dir);
- address = (address + PGDIR_SIZE) & PGDIR_MASK;
- dir++;
- }
- flush_tlb_all();
- return 0;
-}
+++ /dev/null
-/*
- * bagetIRQ.S: Interrupt exception dispatch code for Baget/MIPS
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/addrspace.h>
-
- .text
- .set mips1
- .set reorder
- .set macro
- .set noat
- .align 5
-
-NESTED(bagetIRQ, PT_SIZE, sp)
- SAVE_ALL
- CLI # Important: mark KERNEL mode !
-
- la a1, baget_interrupt
- .set push
- .set noreorder
- jal a1
- .set pop
- move a0, sp
-
- la a1, ret_from_irq
- jr a1
-END(bagetIRQ)
-
-#define DBE_HANDLER 0x1C
-
-NESTED(try_read, PT_SIZE, sp)
- mfc0 t3, CP0_STATUS # save flags and
- CLI # disable interrupts
-
- li t0, KSEG2
- sltu t1, t0, a0 # Is it KSEG2 address ?
- beqz t1, mapped # No - already mapped !
-
- move t0, a0
- ori t0, 0xfff
- xori t0, 0xfff # round address to page
-
- ori t1, t0, 0xf00 # prepare EntryLo (N,V,D,G)
-
- mfc0 t2, CP0_ENTRYHI # save ASID value
- mtc0 zero, CP0_INDEX
- mtc0 t0, CP0_ENTRYHI # Load MMU values ...
- mtc0 t1, CP0_ENTRYLO0
- nop # let it understand
- nop
- tlbwi # ... and write ones
- nop
- nop
- mtc0 t2, CP0_ENTRYHI
-
-mapped:
- la t0, exception_handlers
- lw t1, DBE_HANDLER(t0) # save real handler
- la t2, dbe_handler
- sw t2, DBE_HANDLER(t0) # set temporary local handler
- li v0, -1 # default (failure) value
-
- li t2, 1
- beq t2, a1, 1f
- li t2, 2
- beq t2, a1, 2f
- li t2, 4
- beq t2, a1, 4f
- b out
-
-1: lbu v0, (a0) # byte
- b out
-
-2: lhu v0, (a0) # short
- b out
-
-4: lw v0, (a0) # word
-
-out:
- sw t1, DBE_HANDLER(t0) # restore real handler
- mtc0 t3, CP0_STATUS # restore CPU flags
- jr ra
-
-dbe_handler:
- li v0, -1 # mark our failure
- .set push
- .set noreorder
- b out # "no problems !"
- rfe # return from trap
- .set pop
-END(try_read)
+++ /dev/null
-/*
- * balo.c: BAget LOader
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <linux/kernel.h>
-#include <asm/system.h>
-#include <asm/ptrace.h>
-#include <asm/addrspace.h>
-
-#include <asm/baget/baget.h>
-
-#include "balo.h" /* Includes some kernel symbol values */
-
-static char *banner = "\nBaget Linux Loader v0.2\n";
-
-static void mem_move (long *to, long *from, long size)
-{
- while (size > 0) {
- *to++ = *from++;
- size -= sizeof(long);
- }
-}
-
-static volatile int *mem_limit = (volatile int*)KSEG1;
-static volatile int *mem_limit_dbe = (volatile int*)KSEG1;
-
-static int can_write (volatile int* p) {
- return p < (int*)(KSEG1+BALO_OFFSET) ||
- p >= (int*)(KSEG1+BALO_OFFSET+BALO_SIZE);
-}
-
-static volatile enum balo_state_enum {
- BALO_INIT,
- MEM_INIT,
- MEM_PROBE,
- START_KERNEL
-} balo_state = BALO_INIT;
-
-
-static __inline__ void reset_and_jump(int start, int mem_upper)
-{
- unsigned long tmp;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "mfc0\t$1, $12\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "ori\t$1, $1, 0xff00\n\t"
- "xori\t$1, $1, 0xff00\n\t"
- "mtc0\t$1, $12\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "move\t%0, %2\n\t"
- "jr\t%1\n\t"
- "nop\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=&r" (tmp)
- : "Ir" (start), "Ir" (mem_upper)
- : "memory");
-}
-
-static void start_kernel(void)
-{
- extern char _vmlinux_start, _vmlinux_end;
- extern char _ramdisk_start, _ramdisk_end;
-
- outs( "Relocating Linux... " );
- mem_move((long*)KSEG0, (long*)&_vmlinux_start,
- &_vmlinux_end-&_vmlinux_start);
- outs("done.\n");
-
- if (&_ramdisk_start != &_ramdisk_end) {
- outs("Setting up RAMDISK... ");
- if (*(unsigned long*)RAMDISK_BASE != 0xBA) {
- outs("Bad RAMDISK_BASE signature in system image.\n");
- balo_hungup();
- }
- *(unsigned long*)RAMDISK_BASE = (unsigned long)&_ramdisk_start;
- *(unsigned long*)RAMDISK_SIZE = &_ramdisk_end -&_ramdisk_start;
- outs("done.\n");
- }
-
- {
- extern void flush_cache_low(int isize, int dsize);
- flush_cache_low(256*1024,256*1024);
- }
-
- balo_printf( "Kernel entry: %x\n\n", START);
- balo_state = START_KERNEL;
- reset_and_jump(START, (int)mem_limit-KSEG1+KSEG0);
-}
-
-
-static void mem_probe(void)
-{
- balo_state = MEM_PROBE;
- outs("RAM: <");
- while(mem_limit < mem_limit_dbe) {
- if (can_write(mem_limit) && *mem_limit != 0)
- break; /* cycle found */
- outc('.');
- if (can_write(mem_limit))
- *mem_limit = -1; /* mark */
- mem_limit += 0x40000;
- }
- outs(">\n");
- start_kernel();
-}
-
-volatile unsigned int int_cause;
-volatile unsigned int epc;
-volatile unsigned int badvaddr;
-
-static void print_regs(void)
-{
- balo_printf("CAUSE=%x EPC=%x BADVADDR=%x\n",
- int_cause, epc, badvaddr);
-}
-
-void int_handler(struct pt_regs *regs)
-{
- switch (balo_state) {
- case BALO_INIT:
- balo_printf("\nBALO: trap in balo itself.\n");
- print_regs();
- balo_hungup();
- break;
- case MEM_INIT:
- if ((int_cause & CAUSE_MASK) != CAUSE_DBE) {
- balo_printf("\nBALO: unexpected trap during memory init.\n");
- print_regs();
- balo_hungup();
- } else {
- mem_probe();
- }
- break;
- case MEM_PROBE:
- balo_printf("\nBALO: unexpected trap during memory probe.\n");
- print_regs();
- balo_hungup();
- break;
- case START_KERNEL:
- balo_printf("\nBALO: unexpected kernel trap.\n");
- print_regs();
- balo_hungup();
- break;
- }
- balo_printf("\nBALO: unexpected return from handler.\n");
- print_regs();
- balo_hungup();
-}
-
-static void mem_init(void)
-{
- balo_state = MEM_INIT;
-
- while(1) {
- *mem_limit_dbe;
- if (can_write(mem_limit_dbe))
- *mem_limit_dbe = 0;
-
- mem_limit_dbe += 0x40000; /* +1M */
- }
- /* no return: must go to int_handler */
-}
-
-void balo_entry(void)
-{
- extern void except_vec3_generic(void);
-
- cli();
- outs(banner);
- memcpy((void *)(KSEG0 + 0x80), &except_vec3_generic, 0x80);
- mem_init();
-}
-
-/* Needed for linking */
-
-int vsprintf(char *buf, const char *fmt, va_list arg)
-{
- outs("BALO: vsprintf called.\n");
- balo_hungup();
- return 0;
-}
+++ /dev/null
-/*
- * balo_supp.S: BAget Loader supplement
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-
- .text
- .set mips1
-
- /* General exception vector. */
-NESTED(except_vec3_generic, 0, sp)
- .set noat
- la k0, except_vec3_generic_code
- jr k0
-END(except_vec3_generic)
-
-NESTED(except_vec3_generic_code, 0, sp)
- SAVE_ALL
- mfc0 k1, CP0_CAUSE
- la k0, int_cause
- sw k1, (k0)
-
- mfc0 k1, CP0_EPC
- la k0, epc
- sw k1, (k0)
-
- mfc0 k1, CP0_BADVADDR
- la k0, badvaddr
- sw k1, (k0)
-
- la k0, int_handler
- .set noreorder
- jal k0
- .set reorder
- move a0, sp
-
- RESTORE_ALL_AND_RET
-END(except_vec3_generic_code)
-
- .align 5
-NESTED(flush_cache_low, PT_SIZE, sp)
- .set at
- .set macro
- .set noreorder
-
- move t1, a0 # ISIZE
- move t2, a1 # DSIZE
-
- mfc0 t3, CP0_STATUS # Save the status register.
- mtc0 zero, CP0_STATUS # Disable interrupts.
- la v0, 1f
- or v0, KSEG1 # Run uncached.
- j v0
- nop
-/*
- * Flush the instruction cache.
- */
-1:
- li v0, ST0_DE | ST0_CE
- mtc0 v0, CP0_STATUS # Isolate and swap caches.
- li t0, KSEG1
- subu t0, t0, t1
- li t1, KSEG1
- la v0, 1f # Run cached
- j v0
- nop
-1:
- addu t0, t0, 64
- sb zero, -64(t0)
- sb zero, -60(t0)
- sb zero, -56(t0)
- sb zero, -52(t0)
- sb zero, -48(t0)
- sb zero, -44(t0)
- sb zero, -40(t0)
- sb zero, -36(t0)
- sb zero, -32(t0)
- sb zero, -28(t0)
- sb zero, -24(t0)
- sb zero, -20(t0)
- sb zero, -16(t0)
- sb zero, -12(t0)
- sb zero, -8(t0)
- bne t0, t1, 1b
- sb zero, -4(t0)
-
- la v0, 1f
- or v0, KSEG1
- j v0 # Run uncached
- nop
-/*
- * Flush the data cache.
- */
-1:
- li v0, ST0_DE
- mtc0 v0, CP0_STATUS # Isolate and swap back caches
- li t0, KSEG1
- subu t0, t0, t2
- la v0, 1f
- j v0 # Back to cached mode
- nop
-1:
- addu t0, t0, 64
- sb zero, -64(t0)
- sb zero, -60(t0)
- sb zero, -56(t0)
- sb zero, -52(t0)
- sb zero, -48(t0)
- sb zero, -44(t0)
- sb zero, -40(t0)
- sb zero, -36(t0)
- sb zero, -32(t0)
- sb zero, -28(t0)
- sb zero, -24(t0)
- sb zero, -20(t0)
- sb zero, -16(t0)
- sb zero, -12(t0)
- sb zero, -8(t0)
- bne t0, t1, 1b
- sb zero, -4(t0)
-
- nop # Insure isolated stores
- nop # out of pipe.
- nop
- nop
- mtc0 t3, CP0_STATUS # Restore status reg.
- nop # Insure cache unisolated.
- nop
- nop
- nop
- j ra
- nop
-END(flush_cache_low)
-
-/* To satisfy macros only */
-EXPORT(kernelsp)
- PTR 0x80001000
+++ /dev/null
-/*
- * Code to handle Baget/MIPS IRQs plus some generic interrupt stuff.
- *
- * Copyright (C) 1998 Vladimir Roganov & Gleb Raiko
- * Code (mostly sleleton and comments) derived from DECstation IRQ
- * handling.
- */
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/kernel_stat.h>
-#include <linux/module.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/timex.h>
-#include <linux/slab.h>
-#include <linux/random.h>
-#include <linux/delay.h>
-
-#include <asm/bitops.h>
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-
-#include <asm/baget/baget.h>
-
-volatile unsigned long irq_err_count;
-
-/*
- * This table is a correspondence between IRQ numbers and CPU PILs
- */
-
-static int irq_to_pil_map[BAGET_IRQ_NR] = {
- 7/*fixme: dma_err -1*/,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, /* 0x00 - 0x0f */
- -1,-1,-1,-1, 3,-1,-1,-1, 2, 2, 2,-1, 3,-1,-1,3/*fixme: lance*/, /* 0x10 - 0x1f */
- -1,-1,-1,-1,-1,-1, 5,-1,-1,-1,-1,-1, 7,-1,-1,-1, /* 0x20 - 0x2f */
- -1, 3, 2/*fixme systimer:3*/, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 /* 0x30 - 0x3f */
-};
-
-static inline int irq_to_pil(int irq_nr)
-{
- int pil = -1;
-
- if (irq_nr >= BAGET_IRQ_NR)
- baget_printk("irq_to_pil: too large irq_nr = 0x%x\n", irq_nr);
- else {
- pil = irq_to_pil_map[irq_nr];
- if (pil == -1)
- baget_printk("irq_to_pil: unknown irq = 0x%x\n", irq_nr);
- }
-
- return pil;
-}
-
-/* Function for careful CP0 interrupt mask access */
-
-static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
-{
- unsigned long status = read_c0_status();
- status &= ~((clr_mask & 0xFF) << 8);
- status |= (set_mask & 0xFF) << 8;
- write_c0_status(status);
-}
-
-/*
- * These two functions may be used for unconditional IRQ
- * masking via their PIL protection.
- */
-
-static inline void mask_irq(unsigned int irq_nr)
-{
- modify_cp0_intmask(irq_to_pil(irq_nr), 0);
-}
-
-static inline void unmask_irq(unsigned int irq_nr)
-{
- modify_cp0_intmask(0, irq_to_pil(irq_nr));
-}
-
-/*
- * The following section is introduced for masking/unasking IRQ
- * only while no more IRQs uses same CPU PIL.
- *
- * These functions are used in request_irq, free_irq, but it looks
- * they cannot change something: CP0_STATUS is private for any
- * process, and their action is invisible for system.
- */
-
-static volatile unsigned int pil_in_use[BAGET_PIL_NR] = { 0, };
-
-void mask_irq_count(int irq_nr)
-{
- unsigned long flags;
- int pil = irq_to_pil(irq_nr);
-
- local_irq_save(flags);
- if (!--pil_in_use[pil])
- mask_irq(irq_nr);
- local_irq_restore(flags);
-}
-
-void unmask_irq_count(int irq_nr)
-{
- unsigned long flags;
- int pil = irq_to_pil(irq_nr);
-
- local_irq_save(flags);
- if (!pil_in_use[pil]++)
- unmask_irq(irq_nr);
- local_irq_restore(flags);
-}
-
-/*
- * Two functions below are exported versions of mask/unmask IRQ
- */
-
-void disable_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- mask_irq(irq_nr);
- local_irq_restore(flags);
-}
-
-void enable_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- unmask_irq(irq_nr);
- local_irq_restore(flags);
-}
-
-/*
- * Pointers to the low-level handlers: first the general ones, then the
- * fast ones, then the bad ones.
- */
-static struct irqaction *irq_action[BAGET_IRQ_NR] = { NULL, };
-
-int get_irq_list(char *buf)
-{
- int i, len = 0;
- struct irqaction * action;
- unsigned long flags;
-
- for (i = 0 ; i < BAGET_IRQ_NR ; i++) {
- local_irq_save(flags);
- action = irq_action[i];
- if (!action)
- gotos skip;
- len += sprintf(buf+len, "%2d: %8d %c %s",
- i, kstat_this_cpu.irqs[i],
- (action->flags & SA_INTERRUPT) ? '+' : ' ',
- action->name);
- for (action=action->next; action; action = action->next) {
- len += sprintf(buf+len, ",%s %s",
- (action->flags & SA_INTERRUPT) ? " +" : "",
- action->name);
- }
- len += sprintf(buf+len, "\n");
-skip:
- local_irq_restore(flags);
- }
- return len;
-}
-
-
-/*
- * do_IRQ handles IRQ's that have been installed without the
- * SA_INTERRUPT flag: it uses the full signal-handling return
- * and runs with other interrupts enabled. All relatively slow
- * IRQ's should use this format: notably the keyboard/timer
- * routines.
- */
-static void do_IRQ(int irq, struct pt_regs * regs)
-{
- struct irqaction *action;
- int ret, do_random, cpu;
-
- cpu = smp_processor_id();
- irq_enter();
- kstat_cpus(cpu).irqs[irq]++;
-
- mask_irq(irq);
- action = *(irq + irq_action);
- if (action) {
- if (!(action->flags & SA_INTERRUPT))
- local_irq_enable();
- action = *(irq + irq_action);
- do_random = 0;
- do {
- ret = action->handler(irq, action->dev_id, regs);
- if (ret == IRQ_HANDLED)
- do_random |= action->flags;
- action = action->next;
- } while (action);
- if (do_random & SA_SAMPLE_RANDOM)
- add_interrupt_randomness(irq);
- local_irq_disable();
- } else {
- printk("do_IRQ: Unregistered IRQ (0x%X) occurred\n", irq);
- }
- unmask_irq(irq);
- irq_exit();
-
- /* unmasking and bottom half handling is done magically for us. */
-}
-
-/*
- * What to do in case of 'no VIC register available' for current interrupt
- */
-static void vic_reg_error(unsigned long address, unsigned char active_pils)
-{
- printk("\nNo VIC register found: reg=%08lx active_pils=%02x\n"
- "Current interrupt mask from CP0_CAUSE: %02x\n",
- address, 0xff & active_pils,
- 0xff & (read_c0_cause()>>8));
- { int i; for (i=0; i<10000; i++) udelay(1000); }
-}
-
-static char baget_fpu_irq = BAGET_FPU_IRQ;
-#define BAGET_INT_FPU {(unsigned long)&baget_fpu_irq, 1}
-
-/*
- * Main interrupt handler: interrupt demultiplexer
- */
-asmlinkage void baget_interrupt(struct pt_regs *regs)
-{
- static struct baget_int_reg int_reg[BAGET_PIL_NR] = {
- BAGET_INT_NONE, BAGET_INT_NONE, BAGET_INT0_ACK, BAGET_INT1_ACK,
- BAGET_INT_NONE, BAGET_INT_FPU, BAGET_INT_NONE, BAGET_INT5_ACK
- };
- unsigned char active_pils;
- while ((active_pils = read_c0_cause()>>8)) {
- int pil;
- struct baget_int_reg* reg;
-
- for (pil = 0; pil < BAGET_PIL_NR; pil++) {
- if (!(active_pils & (1<<pil))) continue;
-
- reg = &int_reg[pil];
-
- if (reg->address) {
- extern int try_read(unsigned long,int);
- int irq = try_read(reg->address, reg->size);
-
- if (irq != -1)
- do_IRQ(BAGET_IRQ_MASK(irq), regs);
- else
- vic_reg_error(reg->address, active_pils);
- } else {
- printk("baget_interrupt: unknown interrupt "
- "(pil = %d)\n", pil);
- }
- }
- }
-}
-
-/*
- * Idea is to put all interrupts
- * in a single table and differenciate them just by number.
- */
-int setup_baget_irq(int irq, struct irqaction * new)
-{
- int shared = 0;
- struct irqaction *old, **p;
- unsigned long flags;
-
- p = irq_action + irq;
- if ((old = *p) != NULL) {
- /* Can't share interrupts unless both agree to */
- if (!(old->flags & new->flags & SA_SHIRQ))
- return -EBUSY;
-
- /* Can't share interrupts unless both are same type */
- if ((old->flags ^ new->flags) & SA_INTERRUPT)
- return -EBUSY;
-
- /* add new interrupt at end of irq queue */
- do {
- p = &old->next;
- old = *p;
- } while (old);
- shared = 1;
- }
-
- if (new->flags & SA_SAMPLE_RANDOM)
- rand_initialize_irq(irq);
-
- local_irq_save(flags);
- *p = new;
- local_irq_restore(flags);
-
- if (!shared) {
- unmask_irq_count(irq);
- }
-
- return 0;
-}
-
-int request_irq(unsigned int irq,
- void (*handler)(int, void *, struct pt_regs *),
- unsigned long irqflags,
- const char * devname,
- void *dev_id)
-{
- int retval;
- struct irqaction * action;
-
- if (irq >= BAGET_IRQ_NR)
- return -EINVAL;
- if (!handler)
- return -EINVAL;
- if (irq_to_pil_map[irq] < 0)
- return -EINVAL;
-
- action = (struct irqaction *)
- kmalloc(sizeof(struct irqaction), GFP_KERNEL);
- if (!action)
- return -ENOMEM;
-
- action->handler = handler;
- action->flags = irqflags;
- cpus_clear(action->mask);
- action->name = devname;
- action->next = NULL;
- action->dev_id = dev_id;
-
- retval = setup_baget_irq(irq, action);
-
- if (retval)
- kfree(action);
-
- return retval;
-}
-
-EXPORT_SYMBOL(request_irq);
-
-void free_irq(unsigned int irq, void *dev_id)
-{
- struct irqaction * action, **p;
- unsigned long flags;
-
- if (irq >= BAGET_IRQ_NR)
- printk("Trying to free IRQ%d\n",irq);
-
- for (p = irq + irq_action; (action = *p) != NULL; p = &action->next) {
- if (action->dev_id != dev_id)
- continue;
-
- /* Found it - now free it */
- local_irq_save(flags);
- *p = action->next;
- if (!irq[irq_action])
- unmask_irq_count(irq);
- local_irq_restore(flags);
- kfree(action);
- return;
- }
- printk("Trying to free free IRQ%d\n",irq);
-}
-
-EXPORT_SYMBOL(free_irq);
-
-unsigned long probe_irq_on (void)
-{
- /* TODO */
- return 0;
-}
-
-EXPORT_SYMBOL(probe_irq_on);
-
-int probe_irq_off (unsigned long irqs)
-{
- /* TODO */
- return 0;
-}
-
-EXPORT_SYMBOL(probe_irq_off);
-
-
-static void write_err_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-{
- *(volatile char*) BAGET_WRERR_ACK = 0;
-}
-
-static struct irqaction irq0 =
-{ write_err_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "bus write error", NULL, NULL};
-
-void __init init_IRQ(void)
-{
- irq_setup();
-
- /* Enable access to VIC interrupt registers */
- vac_outw(0xacef | 0x8200, VAC_PIO_FUNC);
-
- /* Enable interrupts for pils 2 and 3 (lines 0 and 1) */
- modify_cp0_intmask(0, (1<<2)|(1<<3));
-
- if (setup_baget_irq(0, &irq0) < 0)
- printk("init_IRQ: unable to register write_err irq\n");
-}
+++ /dev/null
-OUTPUT_FORMAT("elf32-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(balo_entry)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = 0x80400000;
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.init : { *(.rel.init) }
- .rela.init : { *(.rela.init) }
- .rel.fini : { *(.rel.fini) }
- .rela.fini : { *(.rela.fini) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) } =0
- .text :
- {
- _ftext = . ;
- *(.text)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- /* .gnu.warning sections are handled specially by elf32.em. */
- *(.gnu.warning)
-
- _etext = .;
- PROVIDE (etext = .);
-
- /* Startup code */
- . = ALIGN(4096);
- __init_begin = .;
- *(.text.init)
- *(.data.init)
- . = ALIGN(4096); /* Align double page for init_task_union */
- __init_end = .;
-
- *(.fini)
- *(.reginfo)
- /* Adjust the address for the data segment. We want to adjust up to
- the same address within the page on the next page up. It would
- be more correct to do this:
- . = .;
- The current expression does not correctly handle the case of a
- text segment ending precisely at the end of a page; it causes the
- data segment to skip a page. The above expression does not have
- this problem, but it will currently (2/95) cause BFD to allocate
- a single segment, combining both text and data, for this case.
- This will prevent the text segment from being shared among
- multiple executions of the program; I think that is more
- important than losing a page of the virtual address space (note
- that no actual memory is lost; the page which is skipped can not
- be referenced). */
- . = .;
- _fdata = . ;
- *(.data)
- CONSTRUCTORS
-
- *(.data1)
- _gp = . + 0x8000;
- *(.lit8)
- *(.lit4)
- *(.ctors)
- *(.dtors)
- *(.got.plt) *(.got)
- *(.dynamic)
- /* We want the small data sections together, so single-instruction offsets
- can access them all, and initialized data all before uninitialized, so
- we can shorten the on-disk segment size. */
- *(.sdata)
- _edata = .;
- PROVIDE (edata = .);
-
- __bss_start = .;
- _fbss = .;
-
- *(.dynbss)
- *(.bss)
- *(COMMON)
- _end = . ;
- PROVIDE (end = .);
- *(.sbss)
- *(.scommon)
-
- /* These are needed for ELF backends which have not yet been
- converted to the new style linker. */
- *(.stab)
- *(.stabstr)
- /* DWARF debug sections.
- Symbols in the .debug DWARF section are relative to the beginning of the
- section so we begin .debug at 0. It's not clear yet what needs to happen
- for the others. */
- *(.debug)
- *(.debug_srcinfo)
- *(.debug_aranges)
- *(.debug_pubnames)
- *(.debug_sfnames)
- *(.line)
- /* These must appear regardless of . */
- *(.gptab.data) *(.gptab.sdata)
- *(.gptab.bss) *(.gptab.sbss)
-
- _vmlinux_start = .;
- *(.vmlinux)
- _vmlinux_end = .;
-
- _ramdisk_start = .;
- *(.ramdisk)
- _ramdisk_end = .;
-
-} =0
-
-}
+++ /dev/null
-/*
- * print.c: Simple print fascility
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <stdarg.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/baget/baget.h>
-
-/*
- * Define this to see 'baget_printk' (debug) messages
- */
-// #define BAGET_PRINTK
-
-/*
- * This function is same for BALO and Linux baget_printk,
- * and normally prints characted to second (UART A) console.
- */
-
-static void delay(void) {}
-
-static void outc_low(char c)
-{
- int i;
- vac_outb(c, VAC_UART_B_TX);
- for (i=0; i<10000; i++)
- delay();
-}
-
-void outc(char c)
-{
- if (c == '\n')
- outc_low('\r');
- outc_low(c);
-}
-
-void outs(char *s)
-{
- while(*s) outc(*s++);
-}
-
-void baget_write(char *s, int l)
-{
- while(l--)
- outc(*s++);
-}
-
-int baget_printk(const char *fmt, ...)
-{
-#ifdef BAGET_PRINTK
- va_list args;
- int i;
- static char buf[1024];
-
- va_start(args, fmt);
- i = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf)-4 */
- va_end(args);
- baget_write(buf, i);
- return i;
-#else
- return 0;
-#endif
-}
-
-static __inline__ void puthex( int a )
-{
- static char s[9];
- static char e[] = "0123456789ABCDEF";
- int i;
- for( i = 7; i >= 0; i--, a >>= 4 ) s[i] = e[a & 0x0F];
- s[8] = '\0';
- outs( s );
-}
-
-void __init balo_printf( char *f, ... )
-{
- int *arg = (int*)&f + 1;
- char c;
- int format = 0;
-
- while((c = *f++) != 0) {
- switch(c) {
- default:
- if(format) {
- outc('%');
- format = 0;
- }
- outc( c );
- break;
- case '%':
- if( format ){
- format = 0;
- outc(c);
- } else format = 1;
- break;
- case 'x':
- if(format) puthex( *arg++ );
- else outc(c);
- format = 0;
- break;
- case 's':
- if( format ) outs((char *)*arg++);
- else outc(c);
- format = 0;
- break;
- }
- }
-}
-
-void __init balo_hungup(void)
-{
- outs("Hunging up.\n");
- while(1);
-}
+++ /dev/null
-#
-# Makefile for the Baget/MIPS prom emulator library routines.
-#
-
-lib-y := init.o
+++ /dev/null
-/*
- * init.c: PROM library initialisation code.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <linux/init.h>
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-
-const char *get_system_type(void)
-{
- /* Should probably return one of "BT23-201", "BT23-202" */
- return "Baget";
-}
-
-void __init prom_init(void)
-{
- mem_upper = PHYSADDR(fw_arg0);
-
- mips_machgroup = MACH_GROUP_UNKNOWN;
- mips_machtype = MACH_UNKNOWN;
- arcs_cmdline[0] = 0;
-
- vac_memory_upper = mem_upper;
-
- add_memory_region(0, mem_upper, BOOT_MEM_RAM);
-}
-
-unsigned long __init prom_free_prom_memory(void)
-{
- return 0;
-}
+++ /dev/null
-#include <linux/kernel.h>
-#include <asm/system.h>
-#include <asm/baget/baget.h>
-
-
-#define R3000_RESET_VEC 0xbfc00000
-typedef void vector(void);
-
-
-static void baget_reboot(char *from_fun)
-{
- cli();
- baget_printk("\n%s: jumping to RESET code...\n", from_fun);
- (*(vector*)R3000_RESET_VEC)();
-}
-
-/* fixme: proper functionality */
-
-void baget_machine_restart(char *command)
-{
- baget_reboot("restart");
-}
-
-void baget_machine_halt(void)
-{
- baget_reboot("halt");
-}
-
-void baget_machine_power_off(void)
-{
- baget_reboot("power off");
-}
+++ /dev/null
-/*
- * setup.c: Baget/MIPS specific setup, including init of the feature struct.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <asm/irq.h>
-#include <asm/addrspace.h>
-#include <asm/reboot.h>
-
-#include <asm/baget/baget.h>
-
-long int vac_memory_upper;
-
-#define CACHEABLE_STR(val) ((val) ? "not cached" : "cached")
-
-static void __init vac_show(void)
-{
- int i;
- unsigned short val, decode = vac_inw(VAC_DECODE_CTRL);
- unsigned short a24_base = vac_inw(VAC_A24_BASE);
- unsigned long a24_addr = ((unsigned long)
- (a24_base & VAC_A24_MASK)) << 16;
- char *decode_mode[] = { "eprom", "vsb", "shared", "dram" };
- char *address_mode[] = { "", ", A16", ", A32/A24", ", A32/A24/A16" };
- char *state[] = { "", " on write", " on read", " on read/write", };
- char *region_mode[] = { "inactive", "shared", "vsb", "vme" };
- char *asiz[] = { "user", "A32", "A16", "A24" };
- unsigned short regs[] = { VAC_REG1, VAC_REG2, VAC_REG3 };
- unsigned short bndr[] = { VAC_DRAM_MASK,VAC_BNDR2,VAC_BNDR3 };
- unsigned short io_sels[] = { VAC_IOSEL0_CTRL,
- VAC_IOSEL1_CTRL,
- VAC_IOSEL2_CTRL,
- VAC_IOSEL3_CTRL,
- VAC_IOSEL4_CTRL,
- VAC_IOSEL5_CTRL };
-
- printk("[DSACKi %s, DRAMCS%s qualified, boundary%s qualified%s]\n",
- (decode & VAC_DECODE_DSACKI) ? "on" : "off",
- (decode & VAC_DECODE_QFY_DRAMCS) ? "" : " not",
- (decode & VAC_DECODE_QFY_BNDR) ? "" : " not",
- (decode & VAC_DECODE_FPUCS) ? ", fpu" : "");
-
- printk("slave0 ");
- if (decode & VAC_DECODE_RDR_SLSEL0)
- printk("at %08lx (%d MB)\t[dram %s]\n",
- ((unsigned long)vac_inw(VAC_SLSEL0_BASE))<<16,
- ((0xffff ^ vac_inw(VAC_SLSEL0_MASK)) + 1) >> 4,
- (decode & VAC_DECODE_QFY_SLSEL0) ? "qualified" : "");
- else
- printk("off\n");
-
- printk("slave1 ");
- if (decode & VAC_DECODE_RDR_SLSEL1)
- printk("at %08lx (%d MB)\t[%s%s, %s]\n",
- ((unsigned long)vac_inw(VAC_SLSEL1_BASE))<<16,
- ((0xffff ^ vac_inw(VAC_SLSEL1_MASK)) + 1) >> 4,
- decode_mode[VAC_DECODE_MODE_VAL(decode)],
- address_mode[VAC_DECODE_CMP_SLSEL1_VAL(decode)],
- (decode & VAC_DECODE_QFY_SLSEL1) ? "qualified" : "");
- else
- printk("off\n");
-
- printk("icf global at %04x, module at %04x [%s]\n",
- ((unsigned int)
- VAC_ICFSEL_GLOBAL_VAL(vac_inw(VAC_ICFSEL_BASE)))<<4,
- ((unsigned int)
- VAC_ICFSEL_MODULE_VAL(vac_inw(VAC_ICFSEL_BASE)))<<4,
- (decode & VAC_DECODE_QFY_ICFSEL) ? "qualified" : "");
-
-
- printk("region0 at 00000000 (%dMB)\t[dram, %s, delay %d cpuclk"
- ", cached]\n",
- (vac_inw(VAC_DRAM_MASK)+1)>>4,
- (decode & VAC_DECODE_DSACK) ? "D32" : "3state",
- VAC_DECODE_CPUCLK_VAL(decode));
-
- for (i = 0; i < sizeof(regs)/sizeof(regs[0]); i++) {
- unsigned long from =
- ((unsigned long)vac_inw(bndr[i]))<<16;
- unsigned long to =
- ((unsigned long)
- ((i+1 == sizeof(bndr)/sizeof(bndr[0])) ?
- 0xff00 : vac_inw(bndr[i+1])))<<16;
-
-
- val = vac_inw(regs[i]);
- printk("region%d at %08lx (%dMB)\t[%s %s/%s, %s]\n",
- i+1,
- from,
- (unsigned int)((to - from) >> 20),
- region_mode[VAC_REG_MODE(val)],
- asiz[VAC_REG_ASIZ_VAL(val)],
- ((val & VAC_REG_WORD) ? "D16" : "D32"),
- CACHEABLE_STR(val&VAC_A24_A24_CACHINH));
-
- if (a24_addr >= from && a24_addr < to)
- printk("\ta24 at %08lx (%dMB)\t[vme, A24/%s, %s]\n",
- a24_addr,
- min((unsigned int)(a24_addr - from)>>20, 32U),
- (a24_base & VAC_A24_DATAPATH) ? "user" :
- ((a24_base & VAC_A24_D32_ENABLE) ?
- "D32" : "D16"),
- CACHEABLE_STR(a24_base & VAC_A24_A24_CACHINH));
- }
-
- printk("region4 at ff000000 (15MB)\t[eprom]\n");
- val = vac_inw(VAC_EPROMCS_CTRL);
- printk("\t[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
- "read %d%s, write %d%s, assert %d%s]\n",
- VAC_CTRL_DELAY_DSACKI_VAL(val),
- state[val & (VAC_CTRL_IORD|VAC_CTRL_IOWR)],
- (val & VAC_CTRL_DSACK0) ? "dsack0*, " : "",
- (val & VAC_CTRL_DSACK1) ? "dsack1*, " : "",
- VAC_CTRL_RECOVERY_IOSELI_VAL(val),
- VAC_CTRL_DELAY_IORD_VAL(val)/2,
- (VAC_CTRL_DELAY_IORD_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOWR_VAL(val)/2,
- (VAC_CTRL_DELAY_IOWR_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOSELI_VAL(val)/2,
- (VAC_CTRL_DELAY_IOSELI_VAL(val)&1) ? ".5" : "");
-
- printk("region5 at fff00000 (896KB)\t[local io, %s]\n",
- CACHEABLE_STR(vac_inw(VAC_A24_BASE) & VAC_A24_IO_CACHINH));
-
- for (i = 0; i < sizeof(io_sels)/sizeof(io_sels[0]); i++) {
- val = vac_inw(io_sels[i]);
- printk("\tio%d[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
- "\n\t read %d%s cpuclk, write %d%s cpuclk, "
- "assert %d%s%s cpuclk]\n",
- i,
- VAC_CTRL_DELAY_DSACKI_VAL(val),
- state[val & (VAC_CTRL_IORD|VAC_CTRL_IOWR)],
- (val & VAC_CTRL_DSACK0) ? "dsack0*, " : "",
- (val & VAC_CTRL_DSACK1) ? "dsack1*, " : "",
- VAC_CTRL_RECOVERY_IOSELI_VAL(val),
- VAC_CTRL_DELAY_IORD_VAL(val)/2,
- (VAC_CTRL_DELAY_IORD_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOWR_VAL(val)/2,
- (VAC_CTRL_DELAY_IOWR_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOSELI_VAL(val)/2,
- (VAC_CTRL_DELAY_IOSELI_VAL(val)&1) ? ".5" : "",
- (vac_inw(VAC_DEV_LOC) & VAC_DEV_LOC_IOSEL(i)) ?
- ", id" : "");
- }
-
- printk("region6 at fffe0000 (128KB)\t[vme, A16/%s, "
- "not cached]\n",
- (a24_base & VAC_A24_A16D32_ENABLE) ?
- ((a24_base & VAC_A24_A16D32) ? "D32" : "D16") : "user");
-
- val = vac_inw(VAC_SHRCS_CTRL);
- printk("shared[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
- "read %d%s, write %d%s, assert %d%s]\n",
- VAC_CTRL_DELAY_DSACKI_VAL(val),
- state[val & (VAC_CTRL_IORD|VAC_CTRL_IOWR)],
- (val & VAC_CTRL_DSACK0) ? "dsack0*, " : "",
- (val & VAC_CTRL_DSACK1) ? "dsack1*, " : "",
- VAC_CTRL_RECOVERY_IOSELI_VAL(val),
- VAC_CTRL_DELAY_IORD_VAL(val)/2,
- (VAC_CTRL_DELAY_IORD_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOWR_VAL(val)/2,
- (VAC_CTRL_DELAY_IOWR_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOSELI_VAL(val)/2,
- (VAC_CTRL_DELAY_IOSELI_VAL(val)&1) ? ".5" : "");
-}
-
-static void __init vac_init(void)
-{
- unsigned short mem_limit = (vac_memory_upper >> 16);
-
- switch(vac_inw(VAC_ID)) {
- case 0x1AC0:
- printk("VAC068-F5: ");
- break;
- case 0x1AC1:
- printk("VAC068A: ");
- break;
- default:
- panic("Unknown VAC revision number");
- }
-
- vac_outw(mem_limit-1, VAC_DRAM_MASK);
- vac_outw(mem_limit, VAC_BNDR2);
- vac_outw(mem_limit, VAC_BNDR3);
- vac_outw(((BAGET_A24M_BASE>>16)&~VAC_A24_D32_ENABLE)|VAC_A24_DATAPATH,
- VAC_A24_BASE);
- vac_outw(VAC_REG_INACTIVE|VAC_REG_ASIZ0,VAC_REG1);
- vac_outw(VAC_REG_INACTIVE|VAC_REG_ASIZ0,VAC_REG2);
- vac_outw(VAC_REG_MWB|VAC_REG_ASIZ1,VAC_REG3);
- vac_outw(BAGET_A24S_BASE>>16,VAC_SLSEL0_BASE);
- vac_outw(BAGET_A24S_MASK>>16,VAC_SLSEL0_MASK);
- vac_outw(BAGET_A24S_BASE>>16,VAC_SLSEL1_BASE);
- vac_outw(BAGET_A24S_MASK>>16,VAC_SLSEL1_MASK);
- vac_outw(BAGET_GSW_BASE|BAGET_MSW_BASE(0),VAC_ICFSEL_BASE);
- vac_outw(VAC_DECODE_FPUCS|
- VAC_DECODE_CPUCLK(3)|
- VAC_DECODE_RDR_SLSEL0|VAC_DECODE_RDR_SLSEL1|
- VAC_DECODE_DSACK|
- VAC_DECODE_QFY_BNDR|
- VAC_DECODE_QFY_ICFSEL|
- VAC_DECODE_QFY_SLSEL1|VAC_DECODE_QFY_SLSEL0|
- VAC_DECODE_CMP_SLSEL1_HI|
- VAC_DECODE_DRAMCS|
- VAC_DECODE_QFY_DRAMCS|
- VAC_DECODE_DSACKI,VAC_DECODE_CTRL);
- vac_outw(VAC_PIO_FUNC_UART_A_TX|VAC_PIO_FUNC_UART_A_RX|
- VAC_PIO_FUNC_UART_B_TX|VAC_PIO_FUNC_UART_B_RX|
- VAC_PIO_FUNC_IOWR|
- VAC_PIO_FUNC_IOSEL3|
- VAC_PIO_FUNC_IRQ7|VAC_PIO_FUNC_IRQ10|VAC_PIO_FUNC_IRQ11|
- VAC_PIO_FUNC_IOSEL2|
- VAC_PIO_FUNC_FCIACK,VAC_PIO_FUNC);
- vac_outw(VAC_PIO_DIR_FCIACK |
- VAC_PIO_DIR_OUT(0) |
- VAC_PIO_DIR_OUT(1) |
- VAC_PIO_DIR_OUT(2) |
- VAC_PIO_DIR_OUT(3) |
- VAC_PIO_DIR_IN(4) |
- VAC_PIO_DIR_OUT(5) |
- VAC_PIO_DIR_OUT(6) |
- VAC_PIO_DIR_OUT(7) |
- VAC_PIO_DIR_OUT(8) |
- VAC_PIO_DIR_IN(9) |
- VAC_PIO_DIR_OUT(10)|
- VAC_PIO_DIR_OUT(11)|
- VAC_PIO_DIR_OUT(12)|
- VAC_PIO_DIR_OUT(13),VAC_PIO_DIRECTION);
- vac_outw(VAC_DEV_LOC_IOSEL(2),VAC_DEV_LOC);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(1)|
- VAC_CTRL_DELAY_DSACKI(8),VAC_SHRCS_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(1)|
- VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
- VAC_CTRL_DELAY_DSACKI(8),VAC_EPROMCS_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL0_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL1_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL2_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL3_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL4_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL5_CTRL);
-
- vac_show();
-}
-
-static void __init vac_start(void)
-{
- vac_outw(0, VAC_ID);
- vac_outw(VAC_INT_CTRL_TIMER_DISABLE|
- VAC_INT_CTRL_UART_B_DISABLE|
- VAC_INT_CTRL_UART_A_DISABLE|
- VAC_INT_CTRL_MBOX_DISABLE|
- VAC_INT_CTRL_PIO4_DISABLE|
- VAC_INT_CTRL_PIO7_DISABLE|
- VAC_INT_CTRL_PIO8_DISABLE|
- VAC_INT_CTRL_PIO9_DISABLE,VAC_INT_CTRL);
- vac_outw(VAC_INT_CTRL_TIMER_PIO10|
- VAC_INT_CTRL_UART_B_PIO7|
- VAC_INT_CTRL_UART_A_PIO7,VAC_INT_CTRL);
- /*
- * Set quadro speed for both UARTs.
- * To do it we need use formulae from VIC/VAC manual,
- * keeping in mind Baget's 50MHz frequency...
- */
- vac_outw((500000/(384*16))<<8,VAC_CPU_CLK_DIV);
-}
-
-static void __init vic_show(void)
-{
- unsigned char val;
- char *timeout[] = { "4", "16", "32", "64", "128", "256", "disabled" };
- char *deadlock[] = { "[dedlk only]", "[dedlk only]",
- "[dedlk], [halt w/ rmc], [lberr]",
- "[dedlk], [halt w/o rmc], [lberr]" };
-
- val = vic_inb(VIC_IFACE_CFG);
- if (val & VIC_IFACE_CFG_VME)
- printk("VMEbus controller ");
- if (val & VIC_IFACE_CFG_TURBO)
- printk("turbo ");
- if (val & VIC_IFACE_CFG_MSTAB)
- printk("metastability delay ");
- printk("%s ",
- deadlock[VIC_IFACE_CFG_DEADLOCK_VAL(val)]);
-
-
- printk("interrupts: ");
- val = vic_inb(VIC_ERR_INT);
- if (!(val & VIC_ERR_INT_SYSFAIL))
- printk("[sysfail]");
- if (!(val & VIC_ERR_INT_TIMO))
- printk("[timeout]");
- if (!(val & VIC_ERR_INT_WRPOST))
- printk("[write post]");
- if (!(val & VIC_ERR_INT_ACFAIL))
- printk("[acfail] ");
- printk("\n");
-
- printk("timeouts: ");
- val = vic_inb(VIC_XFER_TIMO);
- printk("local %s, vme %s ",
- timeout[VIC_XFER_TIMO_LOCAL_PERIOD_VAL(val)],
- timeout[VIC_XFER_TIMO_VME_PERIOD_VAL(val)]);
- if (val & VIC_XFER_TIMO_VME)
- printk("acquisition ");
- if (val & VIC_XFER_TIMO_ARB)
- printk("arbitration ");
- printk("\n");
-
- val = vic_inb(VIC_LOCAL_TIM);
- printk("pas time: (%d,%d), ds time: %d\n",
- VIC_LOCAL_TIM_PAS_ASSERT_VAL(val),
- VIC_LOCAL_TIM_PAS_DEASSERT_VAL(val),
- VIC_LOCAT_TIM_DS_DEASSERT_VAL(val));
-
- val = vic_inb(VIC_BXFER_DEF);
- printk("dma: ");
- if (val & VIC_BXFER_DEF_DUAL)
- printk("[dual path]");
- if (val & VIC_BXFER_DEF_LOCAL_CROSS)
- printk("[local boundary cross]");
- if (val & VIC_BXFER_DEF_VME_CROSS)
- printk("[vme boundary cross]");
-
-}
-
-static void __init vic_init(void)
-{
- unsigned char id = vic_inb(VIC_ID);
- if ((id & 0xf0) != 0xf0)
- panic("VIC not found");
- printk(" VIC068A Rev. %X: ", id & 0x0f);
-
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_II);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT1);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT2);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT3);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT4);
-/*
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT5);
-*/
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT6);
-
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT7);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_DMA_INT);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT1);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_HIGH|VIC_INT_DISABLE, VIC_LINT2);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_HIGH|VIC_INT_DISABLE, VIC_LINT3);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT4);
-/*
- vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_LEVEL|
- VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT5);
-*/
- vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT6);
- vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT7);
-
- vic_outb(VIC_INT_IPL(3)|
- VIC_INT_SWITCH(0)|
- VIC_INT_SWITCH(1)|
- VIC_INT_SWITCH(2)|
- VIC_INT_SWITCH(3), VIC_ICGS_INT);
- vic_outb(VIC_INT_IPL(3)|
- VIC_INT_SWITCH(0)|
- VIC_INT_SWITCH(1)|
- VIC_INT_SWITCH(2)|
- VIC_INT_SWITCH(3), VIC_ICMS_INT);
- vic_outb(VIC_INT_IPL(6)|
- VIC_ERR_INT_SYSFAIL|
- VIC_ERR_INT_TIMO|
- VIC_ERR_INT_WRPOST|
- VIC_ERR_INT_ACFAIL, VIC_ERR_INT);
- vic_outb(VIC_ICxS_BASE_ID(0xf), VIC_ICGS_BASE);
- vic_outb(VIC_ICxS_BASE_ID(0xe), VIC_ICMS_BASE);
- vic_outb(VIC_LOCAL_BASE_ID(0x6), VIC_LOCAL_BASE);
- vic_outb(VIC_ERR_BASE_ID(0x3), VIC_ERR_BASE);
- vic_outb(VIC_XFER_TIMO_VME_PERIOD_32|
- VIC_XFER_TIMO_LOCAL_PERIOD_32, VIC_XFER_TIMO);
- vic_outb(VIC_LOCAL_TIM_PAS_ASSERT(2)|
- VIC_LOCAT_TIM_DS_DEASSERT(1)|
- VIC_LOCAL_TIM_PAS_DEASSERT(1), VIC_LOCAL_TIM);
- vic_outb(VIC_BXFER_DEF_VME_CROSS|
- VIC_BXFER_DEF_LOCAL_CROSS|
- VIC_BXFER_DEF_AMSR|
- VIC_BXFER_DEF_DUAL, VIC_BXFER_DEF);
- vic_outb(VIC_SSxCR0_LOCAL_XFER_SINGLE|
- VIC_SSxCR0_A32|VIC_SSxCR0_D32|
- VIC_SS0CR0_TIMER_FREQ_NONE, VIC_SS0CR0);
- vic_outb(VIC_SSxCR1_TF1(0xf)|
- VIC_SSxCR1_TF2(0xf), VIC_SS0CR1);
- vic_outb(VIC_SSxCR0_LOCAL_XFER_SINGLE|
- VIC_SSxCR0_A24|VIC_SSxCR0_D32, VIC_SS1CR0);
- vic_outb(VIC_SSxCR1_TF1(0xf)|
- VIC_SSxCR1_TF2(0xf), VIC_SS1CR1);
- vic_outb(VIC_IFACE_CFG_NOHALT|
- VIC_IFACE_CFG_NOTURBO, VIC_IFACE_CFG);
- vic_outb(VIC_AMS_CODE(0), VIC_AMS);
- vic_outb(VIC_BXFER_CTRL_INTERLEAVE(0), VIC_BXFER_CTRL);
- vic_outb(0, VIC_BXFER_LEN_LO);
- vic_outb(0, VIC_BXFER_LEN_HI);
- vic_outb(VIC_REQ_CFG_FAIRNESS_DISABLED|
- VIC_REQ_CFG_LEVEL(3)|
- VIC_REQ_CFG_RR_ARBITRATION, VIC_REQ_CFG);
- vic_outb(VIC_RELEASE_BLKXFER_BLEN(0)|
- VIC_RELEASE_RWD, VIC_RELEASE);
- vic_outb(VIC_IC6_RUN, VIC_IC6);
- vic_outb(0, VIC_IC7);
-
- vic_show();
-}
-
-static void vic_start(void)
-{
- vic_outb(VIC_INT_IPL(3)|
- VIC_INT_NOAUTO|
- VIC_INT_EDGE|
- VIC_INT_HIGH|
- VIC_INT_ENABLE, VIC_LINT7);
-}
-
-void __init baget_irq_setup(void)
-{
- extern void bagetIRQ(void);
-
- /* Now, it's safe to set the exception vector. */
- set_except_vector(0, bagetIRQ);
-}
-
-extern void baget_machine_restart(char *command);
-extern void baget_machine_halt(void);
-extern void baget_machine_power_off(void);
-
-static void __init baget_setup(void)
-{
- printk("BT23/63-201n found.\n");
- *BAGET_WRERR_ACK = 0;
- irq_setup = baget_irq_setup;
-
- _machine_restart = baget_machine_restart;
- _machine_halt = baget_machine_halt;
- _machine_power_off = baget_machine_power_off;
-
- vac_init();
- vic_init();
- vac_start();
- vic_start();
-}
-
-early_initcall(baget_setup);
+++ /dev/null
-/*
- * time.c: Baget/MIPS specific time handling details
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/time.h>
-#include <linux/interrupt.h>
-#include <linux/timex.h>
-#include <linux/spinlock.h>
-
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/ptrace.h>
-#include <asm/system.h>
-
-#include <asm/baget/baget.h>
-
-/*
- * To have precision clock, we need to fix available clock frequency
- */
-#define FREQ_NOM 79125 /* Baget frequency ratio */
-#define FREQ_DEN 10000
-
-static inline int timer_intr_valid(void)
-{
- static unsigned long long ticks, valid_ticks;
-
- if (ticks++ * FREQ_DEN >= valid_ticks * FREQ_NOM) {
- /*
- * We need no overflow checks,
- * due baget unable to work 3000 years...
- * At least without reboot...
- */
- valid_ticks++;
- return 1;
- }
- return 0;
-}
-
-void static timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-{
- if (timer_intr_valid()) {
- sti();
- do_timer(regs);
- }
-}
-
-static void __init timer_enable(void)
-{
- unsigned char ss0cr0 = vic_inb(VIC_SS0CR0);
- ss0cr0 &= ~VIC_SS0CR0_TIMER_FREQ_MASK;
- ss0cr0 |= VIC_SS0CR0_TIMER_FREQ_1000HZ;
- vic_outb(ss0cr0, VIC_SS0CR0);
-
- vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_LOW|VIC_INT_ENABLE, VIC_LINT2);
-}
-
-static struct irqaction timer_irq =
-{ timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL};
-
-void __init time_init(void)
-{
- if (setup_baget_irq(BAGET_VIC_TIMER_IRQ, &timer_irq) < 0)
- printk("time_init: unable request irq for system timer\n");
- timer_enable();
- /* We don't call sti() here, because it is too early for baget */
-}
-
-void do_gettimeofday(struct timeval *tv)
-{
- unsigned long seq;
-
- do {
- seq = read_seqbegin(&xtime_lock);
- tv->tv_sec = xtime.tv_sec;
- tv->tv_usec = xtime.tv_nsec / 1000;
- } while (read_seqretry(&xtime_lock, seq));
-}
-
-EXPORT_SYMBOL(do_gettimeofday);
-
-void do_settimeofday(struct timeval *tv)
-{
- write_seqlock_irq(&xtime_lock);
- xtime.tv_usec = tv->tv_sec;
- xtime.tv_nsec = tv->tv_usec;
- time_adjust = 0; /* stop active adjtime() */
- time_status |= STA_UNSYNC;
- time_maxerror = NTP_PHASE_LIMIT;
- time_esterror = NTP_PHASE_LIMIT;
- write_sequnlock_irq(&xtime_lock);
-}
-
-EXPORT_SYMBOL(do_settimeofday);
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_ARC4 is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-CONFIG_LIBCRC32C=m
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
-CONFIG_MACH_VR41XX=y
-# CONFIG_CASIO_E55 is not set
-# CONFIG_IBM_WORKPAD is not set
-CONFIG_NEC_EAGLE=y
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_VRC4173=y
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_DUMMY_KEYB=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-CONFIG_CPU_VR41XX=y
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=y
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_YENTA is not set
-# CONFIG_I82092 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_VRC4173 is not set
-
-#
-# PCI Hotplug Support
-#
-# CONFIG_HOTPLUG_PCI is not set
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_PARTITIONS is not set
-# CONFIG_MTD_CONCAT is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x1c000000
-CONFIG_MTD_PHYSMAP_LEN=0x2000000
-CONFIG_MTD_PHYSMAP_BUSWIDTH=4
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-CONFIG_BLK_DEV_IDEDISK=y
-CONFIG_IDEDISK_MULTI_MODE=y
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECS=y
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-# CONFIG_BLK_DEV_IDEPCI is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-CONFIG_PCMCIA_FMVJ18X=y
-CONFIG_PCMCIA_PCNET=m
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_CS is not set
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-
-#
-# Watchdog Device Drivers
-#
-# CONFIG_SOFT_WATCHDOG is not set
-
-#
-# PCI-based Watchdog Cards
-#
-# CONFIG_PCIPCWATCHDOG is not set
-# CONFIG_WDTPCI is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS_FS=y
-CONFIG_JFFS_FS_VERBOSE=0
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=y
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_ARC4 is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_ARC4 is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-CONFIG_LIBCRC32C=m
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_ARC4 is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-CONFIG_LIBCRC32C=m
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_ARC4 is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-CONFIG_LIBCRC32C=m
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_ARC4 is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
+++ /dev/null
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: jsun@mvista.com or jsun@junsun.net
- *
- * arch/mips/ddb5xxx/common/irq.c
- * Common irq code for DDB boards. This really should belong
- * arch/mips/kernel/irq.c. Need to talk to Ralf.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <asm/irq.h>
-
-void (*irq_setup)(void);
-
-#ifdef CONFIG_KGDB
-static int kgdb_flag = 1;
-static int __init nokgdb(char *str)
-{
- kgdb_flag = 0;
- return 1;
-}
-__setup("nokgdb", nokgdb);
-#endif
-
-void __init init_IRQ(void)
-{
-#ifdef CONFIG_KGDB
- extern void breakpoint(void);
- extern void set_debug_traps(void);
-
- if (kgdb_flag) {
- printk("Wait for gdb client connection ...\n");
- set_debug_traps();
- breakpoint();
- }
-#endif
- /* set up default irq controller */
- init_generic_irq();
-
- /* invoke board-specific irq setup */
- irq_setup();
-}
+++ /dev/null
-#
-# Makefile for the HP specific kernel interface routines
-# under Linux.
-#
-
-obj-y := init.o setup.o irq.o int-handler.o utils.o asic.o
-
-obj-$(CONFIG_KGDB) += gdb_hook.o
-obj-$(CONFIG_DIRECT_PRINTK) += gdb_hook.o
-
-obj-$(CONFIG_BLK_DEV_INITRD) += initrd.o
-
-forceit:
-
-# package filesystem from rootfs directory into binary package
-romfs.bin: forceit ./rootfs
- @genromfs -d ./rootfs -f $@
-
-# transform rootfs.bin into object file format for linking
-initrd.o: romfs.bin
- @echo "" | $(CROSS_COMPILE)as -o $@
- @$(CROSS_COMPILE)objcopy --add-section .initrd=$< $@
-
-EXTRA_AFLAGS := $(CFLAGS)
-
-.PHONY: forceit
+++ /dev/null
-
-
-#include "asm/hp-lj/asic.h"
-
-AsicId GetAsicId(void)
-{
- static int asic = IllegalAsic;
-
- if (asic == IllegalAsic) {
- if (*(unsigned int *)0xbff70000 == 0x1114103c)
- asic = HarmonyAsic;
- else if (*(unsigned int *)0xbff80000 == 0x110d103c)
- asic = AndrosAsic;
- else
- asic = UnknownAsic;
- }
- return asic;
-}
-
-
-const char* const GetAsicName(void)
-{
- static const char* const Names[] =
- { "Illegal", "Unknown", "Andros", "Harmony" };
-
- return Names[(int)GetAsicId()];
-}
-
+++ /dev/null
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * This is the interface to the remote debugger stub.
- */
-#include <linux/serialP.h>
-#include <linux/serial_reg.h>
-
-#include <asm/serial.h>
-#include <asm/io.h>
-#include <asm/hp-lj/asic.h>
-
-
-int putDebugChar(char c);
-char getDebugChar(void);
-
-
-/////////////////////// andros values ///////////////////////////////////////////////////////
-#define SERIAL_REG(offset) (*((volatile unsigned int*)(HPSR_BASE_ADDR|offset)))
-
-// Register set base address
-#define HPSR_BASE_ADDR 0xbfe00000UL
-
-// Transmit / Receive Data
-#define HPSR_DATA_OFFSET 0x00020010UL
-// Transmit control / status
-#define HPSR_TX_STAT_OFFSET 0x0002000CUL
-// Receive status
-#define HPSR_RX_STAT_OFFSET 0x00020008UL
-
-#define HPSR_TX_STAT_READY 0x8UL
-#define HPSR_RX_DATA_AVAIL 0x4UL
-
-
-/////////////////////// harmony values ///////////////////////////////////////////////////////
-// Transmit / Receive Data
-#define H_HPSR_DATA_TX *((volatile unsigned int*)0xbff65014)
-// Transmit / Receive Data
-#define H_HPSR_DATA_RX *((volatile unsigned int*)0xbff65018)
-// Status
-#define H_HPSR_STAT *((volatile unsigned int*)0xbff65004)
-
-// harmony serial status bits
-#define H_SER_STAT_TX_EMPTY 0x04
-#define H_SER_STAT_RX_EMPTY 0x10
-
-
-
-
-int putDebugChar(char c)
-{
- if (GetAsicId() == HarmonyAsic) {
- while (!( ( (H_HPSR_STAT) & H_SER_STAT_TX_EMPTY) != 0));
-
- H_HPSR_DATA_TX = (unsigned int) c;
-
- } else if (GetAsicId() == AndrosAsic) {
- while (((SERIAL_REG(HPSR_TX_STAT_OFFSET) & HPSR_TX_STAT_READY) == 0))
- ;
- SERIAL_REG(HPSR_DATA_OFFSET) = (unsigned int) c;
- }
- return 1;
-}
-
-char getDebugChar(void)
-{
- if (GetAsicId() == HarmonyAsic) {
- while (!(((H_HPSR_STAT) & H_SER_STAT_RX_EMPTY) == 0));
-
- return H_HPSR_DATA_RX;
-
- } else if (GetAsicId() == AndrosAsic) {
- while ((SERIAL_REG(HPSR_RX_STAT_OFFSET) & HPSR_RX_DATA_AVAIL) == 0)
- ;
-
- return (SERIAL_REG(HPSR_DATA_OFFSET));
-
- }
-}
-
-
+++ /dev/null
-/*
- * init.c: PROM library initialisation code.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-
-#include <linux/mm.h>
-#include <asm/bootinfo.h>
-#include <asm/addrspace.h>
-#include <asm/hp-lj/asic.h>
-#include <linux/bootmem.h>
-
-#include "utils.h"
-
-
-#define Delimiter "CMDLINE="
-const char CommandLine[] = Delimiter
- "root=/dev/hda3 ";
-
-void __init prom_init(void)
-{
- ulong mem_size = get_mem_avail();
- int reserve_size = 0;
-
- printk("Total Memory: %ld bytes\n", mem_size);
-
- reserve_buffer(CommandLine, mem_size);
-
- reserve_size = get_reserved_buffer_size();
- mem_size -= reserve_size;
-
- add_memory_region(0x0,mem_size, BOOT_MEM_RAM);
- add_memory_region(mem_size,reserve_size, BOOT_MEM_RESERVED);
-
- printk("Main Memory: %ld bytes\n", mem_size);
- printk("Reserved Memory: %ld bytes at 0x%08x\n",
- get_reserved_buffer_size(), (ulong)get_reserved_buffer());
-
- printk("Detected %s ASIC\n", GetAsicName());
- mips_machgroup = MACH_GROUP_HP_LJ;
- mips_machtype = MACH_UNKNOWN;
-
- strcpy(arcs_cmdline, CommandLine+strlen(Delimiter));
-}
-
-
-unsigned long __init prom_free_prom_memory(void)
-{
- return 0;
-}
+++ /dev/null
-#include <asm/asm.h>
-
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
- .text
- .set mips1
- .set reorder
- .set macro
- .set noat
- .align 5
-
-# MIPS has 16 exception vectors numbered 0 to 15
-# vector number 0 is for interrupts and the others are for various exceptions
-# The following code is installed as the handler for exception 0
-# There are 8 possible interrupts that can cause this exception.
-# The cause register indicates which are pending
-# The status register indicates which are enabled
-# This code segment basically will decipher which interrup occurred (7 downto 0)
-# and pass an integer indicating which was the highest priority pending interrupt
-# to the do_IRQ routine.
-
-NESTED(hpIRQ, PT_SIZE, sp)
- SAVE_ALL
- CLI # Important: mark KERNEL mode !
- /*
- * Get pending interrupts
- */
-
- mfc0 t0,CP0_CAUSE # get pending interrupts
- mfc0 t1,CP0_STATUS # get enabled interrupts
- and t0,t1 # isolate allowed ones
- andi t0,0xff00 # isolate pending bits
- sll t0,16 # shift the pending bits down
- beqz t0,3f # no pending intrs, then spurious
- nop # delay slot
-
- /*
- * Find irq with highest priority
- * FIXME: This is slow - use binary search
- */
-
- la a0,7
-1: bltz t0,2f # found pending irq
- subu a0,1
- sll t0,1
- b 1b
- nop # delay slot
-
-
-call_do_IRQ:
-2: move a1,sp
- jal do_IRQ
- nop # delay slot
- j ret_from_irq
- nop
-
-/*
- mfc0 t0,CP0_STATUS # disable interrupts
- ori t0,1
- xori t0,1
- mtc0 t0,CP0_STATUS
-
- la a1, ret_from_irq
- jr a1
-*/
-3: j spurious_interrupt
-END(hpIRQ)
-
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Code to handle x86 style IRQs plus some generic interrupt stuff.
- *
- * Copyright (C) 1992 Linus Torvalds
- * Copyright (C) 1994 - 2000 Ralf Baechle
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-#include <asm/gdb-stub.h>
-
-void __init init_IRQ(void)
-{
- extern void hpIRQ(void);
- extern void mips_cpu_irq_init(u32 base);
- mips_cpu_irq_init(0);
- set_except_vector(0, hpIRQ);
-
-#ifdef CONFIG_KGDB
- {
- extern void breakpoint(void);
- extern int remote_debug;
-
- if (remote_debug) {
- set_debug_traps();
- breakpoint();
- }
- }
-#endif
-
-}
+++ /dev/null
-/*
- * Setup pointers to hardware-dependent routines.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1998 by Ralf Baechle
- */
-#include <linux/config.h>
-#include <linux/hdreg.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/ide.h>
-#include <linux/bootmem.h>
-#include <asm/reboot.h>
-#include <asm/time.h>
-#include <asm/hp-lj/asic.h>
-#include "utils.h"
-
-extern char CommandLine[];
-extern void pci_setup(void);
-
-#ifdef CONFIG_KGDB
-int remote_debug = 0;
-#endif
-
-const char *get_system_type(void)
-{
- return "HP LaserJet"; /* But which exactly? */
-}
-
-static void (*timer_interrupt_service) (int irq, void *dev_id,
- struct pt_regs * regs) = NULL;
-
-
-static void andros_timer_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
-{
- if (!(*((volatile unsigned int *) 0xbfea0010) & 0x20)) // mask = pend & en
- return;
-
- /* clear timer interrupt */
- {
- unsigned int tmr = *((volatile unsigned int *) 0xbfe90040); // ctl bits
- *((volatile unsigned int *) 0xbfe90040) = tmr; // write to ack
- *((volatile unsigned int *) 0xbfea000c) = 0x20; // sys int ack
- }
-
- /* service interrupt */
- timer_interrupt_service(irq, dev_id, regs);
-}
-
-static void harmony_timer_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
-{
- if (!(*((volatile unsigned int *) 0xbff63000) & 0x01))
- return; // big sys int reg, 01-timer did it
- if (!(*((volatile unsigned int *) 0xbff610a4) & 0x01))
- return; // local small int reg, 01-timer0 did it
-
- *((volatile unsigned int *) 0xbff610a4) = 1; // ack local timer0 bit
- *((volatile unsigned int *) 0xbff63000) = 1; // ack global timer bit
-
- /* service interrupt */
- timer_interrupt_service(irq, dev_id, regs);
-}
-
-
-#define ASIC_IRQ_NUMBER 2
-
-
-static void __init hp_time_init(struct irqaction *irq)
-{
- timer_interrupt_service = irq->handler;
-
- if (GetAsicId() == AndrosAsic) {
- //*((volatile unsigned int*)0xbfe90000) = 0x2f; // set by bootloader to 0x20 // prescaler
- *((volatile unsigned int *) 0xbfe90040) = 0x21; // 20-res of 1kHz,1-int ack // control
- *((volatile unsigned int *) 0xbfe90048) = 0x09; // 09-reload val // reload
- *((volatile unsigned int *) 0xbfe90044) = 0x09; // 09-count val // count
- *((volatile unsigned int *) 0xbfe90040) = 0x2f; // 8-int enable,4-reload en,2-count down en,1-int-ack
-
- irq->handler = andros_timer_interrupt;
- irq->flags |= SA_INTERRUPT | SA_SHIRQ;
- printk("setting up timer in hp_time_init\n");
- setup_irq(ASIC_IRQ_NUMBER, irq);
-
- // enable timer interrupt
- *((volatile unsigned int *) 0xbfea0000) = 0x20;
-
- } else if (GetAsicId() == HarmonyAsic) {
-
- *((volatile unsigned int *) 0xbff61000) = 99; // prescaler, 100Mz sys clk
- *((volatile unsigned int *) 0xbff61028) = 0x09; // reload reg
- *((volatile unsigned int *) 0xbff61024) = 0x09; // count reg
- *((volatile unsigned int *) 0xbff61020) = 0x0b; // 80-1khz res on timer, 2 reload en, 1 - count down en
-
- irq->handler = harmony_timer_interrupt;
- irq->flags |= SA_INTERRUPT | SA_SHIRQ;
- setup_irq(ASIC_IRQ_NUMBER, irq);
-
- *((volatile unsigned int *) 0xbff610a0) |= 1; // turn on timer0
-
- } else if (GetAsicId() == UnknownAsic)
- printk("Unknown asic in hp_time_init()\n");
- else
- printk("Unsupported asic in hp_time_init()\n");
-}
-
-
-static void hplj_restart(void)
-{
- if (GetAsicId() == AndrosAsic)
- *((volatile unsigned int *) 0xbfe900c0) = 0;
-
-
- if (GetAsicId() == HarmonyAsic)
- *((volatile unsigned int *) 0xbff62030) = 0;
-
- printk("Restart Failed ... halting instead\n");
- while (1);
-}
-
-static void hplj_halt(void)
-{
- while (1);
-}
-
-static void __init hp_setup(void)
-{
-#ifdef CONFIG_PCI
- pci_setup();
-#endif
-
- _machine_restart = (void (*)(char *)) hplj_restart;
- _machine_halt = hplj_halt;
- _machine_power_off = hplj_halt;
-
- board_timer_setup = hp_time_init;
-
-#ifdef CONFIG_KGDB
- remote_debug = (strstr(CommandLine, "kgdb") != NULL);
-#endif
-
- printk("HP SETUP\n");
-}
-
-early_initcall(hp_setup);
+++ /dev/null
-/*
- *
- *
- *
- *
- */
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/module.h>
-#include <asm/io.h>
-#include "utils.h"
-
-
-#define miu_chan_cfg(x) ((volatile unsigned long *)(0xbff40000+x*4)) /* for andros */
-
-int mbsize[8] = {1,2,4,8,16,32,64,128};
-
-unsigned long get_mem_avail(void) {
-
- unsigned long cfg[10],i,total_mem=0;
-
- for(i=0;i<10;i++)
- cfg[i] = *miu_chan_cfg(i);
-
- for(i=0;i<10;i++){
- if(cfg[i]==0x1fc160c2) continue; // skip empties
- if( ( (cfg[i]>>12) & 0xf ) <= 0xb ) continue; // skip roms
- total_mem += mbsize[(cfg[i]>>16)&0x7] *1024*1024;
- }
- return total_mem;
-}
-
-
-
-
-static ulong* buffer_ptr = NULL;
-static ulong buffer_size = 0;
-
-ulong* get_reserved_buffer(void) {return KSEG0ADDR(buffer_ptr);}
-ulong* get_reserved_buffer_virtual(void) {return (ulong*)ReservedMemVirtualAddr;}
-ulong get_reserved_buffer_size(void) {return buffer_size;}
-
-#define MIN_GEN_MEM (4 << 20)
-
-
-void reserve_buffer(const char* cl, ulong base_mem)
-{
- char* pos = strstr(cl, "reserved_buffer=");
- if (pos) {
- buffer_size = simple_strtol(pos+strlen("reserved_buffer="),
- 0, 10);
- buffer_size <<= 20;
- if (buffer_size + MIN_GEN_MEM > base_mem)
- buffer_size = base_mem - MIN_GEN_MEM;
- if (buffer_size > 0)
- buffer_ptr = (ulong*)(base_mem - buffer_size);
- else
- buffer_size = 0;
- }
-}
-
-
-
-EXPORT_SYMBOL(get_reserved_buffer);
-EXPORT_SYMBOL(get_reserved_buffer_virtual);
-EXPORT_SYMBOL(get_reserved_buffer_size);
-
-
+++ /dev/null
-/*
- *
- *
- *
- */
-
-#include <linux/types.h>
-
-#define ReservedMemVirtualAddr 0x50000000
-
-unsigned long get_mem_avail(void);
-
-ulong* get_reserved_buffer(void);
-ulong* get_reserved_buffer_virtual(void);
-ulong get_reserved_buffer_size(void);
-
-void reserve_buffer(const char* cl, ulong base_mem);
-
-
+++ /dev/null
-/*
- * irix5sys.h: 32-bit IRIX5 ABI system call table.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- */
-
-/* This file is being included twice - once to build a list of all
- * syscalls and once to build a table of how many arguments each syscall
- * accepts. Syscalls that receive a pointer to the saved registers are
- * marked as having zero arguments.
- */
-#include <linux/config.h>
-
-/* Keys:
- * V == Valid and should work as expected for most cases.
- * HV == Half Valid, some things will work, some likely will not
- * IV == InValid, certainly will not work at all yet
- * ?V == ?'ably Valid, I have not done enough looking into it
- * DC == Don't Care, a rats ass we couldn't give
- */
-
-#ifdef CONFIG_BINFMT_IRIX
- sys sys_syscall 0 /* 1000 sysindir() V*/
- sys sys_exit 1 /* 1001 exit() V*/
- sys sys_fork 0 /* 1002 fork() V*/
- sys sys_read 3 /* 1003 read() V*/
- sys sys_write 3 /* 1004 write() V*/
- sys sys_open 3 /* 1005 open() V*/
- sys sys_close 1 /* 1006 close() V*/
- sys irix_unimp 0 /* 1007 (XXX IRIX 4 wait) V*/
- sys sys_creat 2 /* 1008 creat() V*/
- sys sys_link 2 /* 1009 link() V*/
- sys sys_unlink 1 /* 1010 unlink() V*/
- sys irix_exec 0 /* 1011 exec() V*/
- sys sys_chdir 1 /* 1012 chdir() V*/
- sys irix_gtime 0 /* 1013 time() V*/
- sys irix_unimp 0 /* 1014 (XXX IRIX 4 mknod) V*/
- sys sys_chmod 2 /* 1015 chmod() V*/
- sys sys_chown 3 /* 1016 chown() V*/
- sys irix_brk 1 /* 1017 break() V*/
- sys irix_unimp 0 /* 1018 (XXX IRIX 4 stat) V*/
- sys sys_lseek 3 /* 1019 lseek() XXX64bit HV*/
- sys irix_getpid 0 /* 1020 getpid() V*/
- sys irix_mount 6 /* 1021 mount() IV*/
- sys sys_umount 1 /* 1022 umount() V*/
- sys sys_setuid 1 /* 1023 setuid() V*/
- sys irix_getuid 0 /* 1024 getuid() V*/
- sys irix_stime 1 /* 1025 stime() V*/
- sys irix_unimp 4 /* 1026 XXX ptrace() IV*/
- sys irix_alarm 1 /* 1027 alarm() V*/
- sys irix_unimp 0 /* 1028 (XXX IRIX 4 fstat) V*/
- sys irix_pause 0 /* 1029 pause() V*/
- sys sys_utime 2 /* 1030 utime() V*/
- sys irix_unimp 0 /* 1031 nuthin' V*/
- sys irix_unimp 0 /* 1032 nobody home man... V*/
- sys sys_access 2 /* 1033 access() V*/
- sys sys_nice 1 /* 1034 nice() V*/
- sys irix_statfs 2 /* 1035 statfs() V*/
- sys sys_sync 0 /* 1036 sync() V*/
- sys sys_kill 2 /* 1037 kill() V*/
- sys irix_fstatfs 2 /* 1038 fstatfs() V*/
- sys irix_setpgrp 1 /* 1039 setpgrp() V*/
- sys irix_syssgi 0 /* 1040 syssgi() HV*/
- sys sys_dup 1 /* 1041 dup() V*/
- sys sys_pipe 0 /* 1042 pipe() V*/
- sys irix_times 1 /* 1043 times() V*/
- sys irix_unimp 0 /* 1044 XXX profil() IV*/
- sys irix_unimp 0 /* 1045 XXX lock() IV*/
- sys sys_setgid 1 /* 1046 setgid() V*/
- sys irix_getgid 0 /* 1047 getgid() V*/
- sys irix_unimp 0 /* 1048 (XXX IRIX 4 ssig) V*/
- sys irix_msgsys 6 /* 1049 sys_msgsys V*/
- sys sys_sysmips 4 /* 1050 sysmips() HV*/
- sys irix_unimp 0 /* 1051 XXX sysacct() IV*/
- sys irix_shmsys 5 /* 1052 sys_shmsys V*/
- sys irix_semsys 0 /* 1053 sys_semsys V*/
- sys irix_ioctl 3 /* 1054 ioctl() HV*/
- sys irix_uadmin 0 /* 1055 XXX sys_uadmin() HC*/
- sys irix_sysmp 0 /* 1056 sysmp() HV*/
- sys irix_utssys 4 /* 1057 sys_utssys() HV*/
- sys irix_unimp 0 /* 1058 nada enchilada V*/
- sys irix_exece 0 /* 1059 exece() V*/
- sys sys_umask 1 /* 1060 umask() V*/
- sys sys_chroot 1 /* 1061 chroot() V*/
- sys irix_fcntl 3 /* 1062 fcntl() ?V*/
- sys irix_ulimit 2 /* 1063 ulimit() HV*/
- sys irix_unimp 0 /* 1064 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1065 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1066 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1067 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1068 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1069 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1070 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1071 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1072 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1073 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1074 nuttin' V*/
- sys irix_unimp 0 /* 1075 XXX sys_getrlimit64()IV*/
- sys irix_unimp 0 /* 1076 XXX sys_setrlimit64()IV*/
- sys sys_nanosleep 2 /* 1077 nanosleep() V*/
- sys irix_lseek64 5 /* 1078 lseek64() ?V*/
- sys sys_rmdir 1 /* 1079 rmdir() V*/
- sys sys_mkdir 2 /* 1080 mkdir() V*/
- sys sys_getdents 3 /* 1081 getdents() V*/
- sys irix_sginap 1 /* 1082 sys_sginap() V*/
- sys irix_sgikopt 3 /* 1083 sys_sgikopt() DC*/
- sys sys_sysfs 3 /* 1084 sysfs() ?V*/
- sys irix_unimp 0 /* 1085 XXX sys_getmsg() DC*/
- sys irix_unimp 0 /* 1086 XXX sys_putmsg() DC*/
- sys sys_poll 3 /* 1087 poll() V*/
- sys irix_sigreturn 0 /* 1088 sigreturn() ?V*/
- sys sys_accept 3 /* 1089 accept() V*/
- sys sys_bind 3 /* 1090 bind() V*/
- sys sys_connect 3 /* 1091 connect() V*/
- sys irix_gethostid 0 /* 1092 sys_gethostid() ?V*/
- sys sys_getpeername 3 /* 1093 getpeername() V*/
- sys sys_getsockname 3 /* 1094 getsockname() V*/
- sys sys_getsockopt 5 /* 1095 getsockopt() V*/
- sys sys_listen 2 /* 1096 listen() V*/
- sys sys_recv 4 /* 1097 recv() V*/
- sys sys_recvfrom 6 /* 1098 recvfrom() V*/
- sys sys_recvmsg 3 /* 1099 recvmsg() V*/
- sys sys_select 5 /* 1100 select() V*/
- sys sys_send 4 /* 1101 send() V*/
- sys sys_sendmsg 3 /* 1102 sendmsg() V*/
- sys sys_sendto 6 /* 1103 sendto() V*/
- sys irix_sethostid 1 /* 1104 sys_sethostid() ?V*/
- sys sys_setsockopt 5 /* 1105 setsockopt() V*/
- sys sys_shutdown 2 /* 1106 shutdown() ?V*/
- sys irix_socket 3 /* 1107 socket() V*/
- sys sys_gethostname 2 /* 1108 sys_gethostname() ?V*/
- sys sys_sethostname 2 /* 1109 sethostname() ?V*/
- sys irix_getdomainname 2 /* 1110 sys_getdomainname() ?V*/
- sys sys_setdomainname 2 /* 1111 setdomainname() ?V*/
- sys sys_truncate 2 /* 1112 truncate() V*/
- sys sys_ftruncate 2 /* 1113 ftruncate() V*/
- sys sys_rename 2 /* 1114 rename() V*/
- sys sys_symlink 2 /* 1115 symlink() V*/
- sys sys_readlink 3 /* 1116 readlink() V*/
- sys irix_unimp 0 /* 1117 XXX IRIX 4 lstat() DC*/
- sys irix_unimp 0 /* 1118 nothin' V*/
- sys irix_unimp 0 /* 1119 XXX nfs_svc() DC*/
- sys irix_unimp 0 /* 1120 XXX nfs_getfh() DC*/
- sys irix_unimp 0 /* 1121 XXX async_daemon() DC*/
- sys irix_unimp 0 /* 1122 XXX exportfs() DC*/
- sys sys_setregid 2 /* 1123 setregid() V*/
- sys sys_setreuid 2 /* 1124 setreuid() V*/
- sys sys_getitimer 2 /* 1125 getitimer() V*/
- sys sys_setitimer 3 /* 1126 setitimer() V*/
- sys irix_unimp 1 /* 1127 XXX adjtime() IV*/
- sys irix_gettimeofday 1 /* 1128 gettimeofday() V*/
- sys irix_unimp 0 /* 1129 XXX sproc() IV*/
- sys irix_prctl 0 /* 1130 prctl() HV*/
- sys irix_unimp 0 /* 1131 XXX procblk() IV*/
- sys irix_unimp 0 /* 1132 XXX sprocsp() IV*/
- sys irix_unimp 0 /* 1133 XXX sgigsc() IV*/
- sys irix_mmap32 6 /* 1134 mmap() XXXflags? ?V*/
- sys sys_munmap 2 /* 1135 munmap() V*/
- sys sys_mprotect 3 /* 1136 mprotect() V*/
- sys sys_msync 4 /* 1137 msync() V*/
- sys irix_madvise 3 /* 1138 madvise() DC*/
- sys irix_pagelock 3 /* 1139 pagelock() IV*/
- sys irix_getpagesize 0 /* 1140 getpagesize() V*/
- sys irix_quotactl 0 /* 1141 quotactl() V*/
- sys irix_unimp 0 /* 1142 nobody home man V*/
- sys sys_getpgid 1 /* 1143 BSD getpgrp() V*/
- sys irix_BSDsetpgrp 2 /* 1143 BSD setpgrp() V*/
- sys sys_vhangup 0 /* 1144 vhangup() V*/
- sys sys_fsync 1 /* 1145 fsync() V*/
- sys sys_fchdir 1 /* 1146 fchdir() V*/
- sys sys_getrlimit 2 /* 1147 getrlimit() ?V*/
- sys sys_setrlimit 2 /* 1148 setrlimit() ?V*/
- sys sys_cacheflush 3 /* 1150 cacheflush() HV*/
- sys sys_cachectl 3 /* 1151 cachectl() HV*/
- sys sys_fchown 3 /* 1152 fchown() ?V*/
- sys sys_fchmod 2 /* 1153 fchmod() ?V*/
- sys irix_unimp 0 /* 1154 XXX IRIX 4 wait3() V*/
- sys sys_socketpair 4 /* 1155 socketpair() V*/
- sys irix_systeminfo 3 /* 1156 systeminfo() IV*/
- sys irix_uname 1 /* 1157 uname() IV*/
- sys irix_xstat 3 /* 1158 xstat() V*/
- sys irix_lxstat 3 /* 1159 lxstat() V*/
- sys irix_fxstat 3 /* 1160 fxstat() V*/
- sys irix_xmknod 0 /* 1161 xmknod() ?V*/
- sys irix_sigaction 4 /* 1162 sigaction() ?V*/
- sys irix_sigpending 1 /* 1163 sigpending() ?V*/
- sys irix_sigprocmask 3 /* 1164 sigprocmask() ?V*/
- sys irix_sigsuspend 0 /* 1165 sigsuspend() ?V*/
- sys irix_sigpoll_sys 3 /* 1166 sigpoll_sys() IV*/
- sys irix_swapctl 2 /* 1167 swapctl() IV*/
- sys irix_getcontext 0 /* 1168 getcontext() HV*/
- sys irix_setcontext 0 /* 1169 setcontext() HV*/
- sys irix_waitsys 5 /* 1170 waitsys() IV*/
- sys irix_sigstack 2 /* 1171 sigstack() HV*/
- sys irix_sigaltstack 2 /* 1172 sigaltstack() HV*/
- sys irix_sigsendset 2 /* 1173 sigsendset() IV*/
- sys irix_statvfs 2 /* 1174 statvfs() V*/
- sys irix_fstatvfs 2 /* 1175 fstatvfs() V*/
- sys irix_unimp 0 /* 1176 XXX getpmsg() DC*/
- sys irix_unimp 0 /* 1177 XXX putpmsg() DC*/
- sys sys_lchown 3 /* 1178 lchown() V*/
- sys irix_priocntl 0 /* 1179 priocntl() DC*/
- sys irix_sigqueue 4 /* 1180 sigqueue() IV*/
- sys sys_readv 3 /* 1181 readv() V*/
- sys sys_writev 3 /* 1182 writev() V*/
- sys irix_truncate64 4 /* 1183 truncate64() XX32bit HV*/
- sys irix_ftruncate64 4 /* 1184 ftruncate64()XX32bit HV*/
- sys irix_mmap64 0 /* 1185 mmap64() XX32bit HV*/
- sys irix_dmi 0 /* 1186 dmi() DC*/
- sys irix_pread 6 /* 1187 pread() IV*/
- sys irix_pwrite 6 /* 1188 pwrite() IV*/
- sys sys_fsync 1 /* 1189 fdatasync() XXPOSIX HV*/
- sys irix_sgifastpath 7 /* 1190 sgifastpath() WHEEE IV*/
- sys irix_unimp 0 /* 1191 XXX attr_get() DC*/
- sys irix_unimp 0 /* 1192 XXX attr_getf() DC*/
- sys irix_unimp 0 /* 1193 XXX attr_set() DC*/
- sys irix_unimp 0 /* 1194 XXX attr_setf() DC*/
- sys irix_unimp 0 /* 1195 XXX attr_remove() DC*/
- sys irix_unimp 0 /* 1196 XXX attr_removef() DC*/
- sys irix_unimp 0 /* 1197 XXX attr_list() DC*/
- sys irix_unimp 0 /* 1198 XXX attr_listf() DC*/
- sys irix_unimp 0 /* 1199 XXX attr_multi() DC*/
- sys irix_unimp 0 /* 1200 XXX attr_multif() DC*/
- sys irix_statvfs64 2 /* 1201 statvfs64() V*/
- sys irix_fstatvfs64 2 /* 1202 fstatvfs64() V*/
- sys irix_getmountid 2 /* 1203 getmountid()XXXfsids HV*/
- sys irix_nsproc 5 /* 1204 nsproc() IV*/
- sys irix_getdents64 3 /* 1205 getdents64() HV*/
- sys irix_unimp 0 /* 1206 XXX DFS garbage DC*/
- sys irix_ngetdents 4 /* 1207 ngetdents() XXXeop HV*/
- sys irix_ngetdents64 4 /* 1208 ngetdents64() XXXeop HV*/
- sys irix_unimp 0 /* 1209 nothin' V*/
- sys irix_unimp 0 /* 1210 XXX pidsprocsp() */
- sys irix_unimp 0 /* 1211 XXX rexec() */
- sys irix_unimp 0 /* 1212 XXX timer_create() */
- sys irix_unimp 0 /* 1213 XXX timer_delete() */
- sys irix_unimp 0 /* 1214 XXX timer_settime() */
- sys irix_unimp 0 /* 1215 XXX timer_gettime() */
- sys irix_unimp 0 /* 1216 XXX timer_setoverrun() */
- sys sys_sched_rr_get_interval 2 /* 1217 sched_rr_get_interval()V*/
- sys sys_sched_yield 0 /* 1218 sched_yield() V*/
- sys sys_sched_getscheduler 1 /* 1219 sched_getscheduler() V*/
- sys sys_sched_setscheduler 3 /* 1220 sched_setscheduler() V*/
- sys sys_sched_getparam 2 /* 1221 sched_getparam() V*/
- sys sys_sched_setparam 2 /* 1222 sched_setparam() V*/
- sys irix_unimp 0 /* 1223 XXX usync_cntl() */
- sys irix_unimp 0 /* 1224 XXX psema_cntl() */
- sys irix_unimp 0 /* 1225 XXX restartreturn() */
-
-/* Just to pad things out nicely. */
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
-#else
- mille sys_ni_syscall 0
-#endif
-
-/* YEEEEEEEEEEEEEEEEEE!!!! */
+++ /dev/null
-/*
- * offset.c: Calculate pt_regs and task_struct indices.
- *
- * Copyright (C) 1996 David S. Miller
- * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003 Ralf Baechle
- */
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-
-#include <asm/ptrace.h>
-#include <asm/processor.h>
-
-#define text(t) __asm__("\n@@@" t)
-#define _offset(type, member) ((unsigned long) &(((type *)NULL)->member))
-#define index(string, ptr, member) \
- __asm__("\n@@@" string "%0" : : "i" (_offset(ptr, member)/sizeof(long)))
-#define size(string, size) \
- __asm__("\n@@@" string "%0" : : "i" (sizeof(size)))
-#define linefeed text("")
-
-void output_ptreg_defines(void)
-{
- text("/* MIPS pt_regs indices. */");
- index("#define EF_R0 ", struct pt_regs, regs[0]);
- index("#define EF_R1 ", struct pt_regs, regs[1]);
- index("#define EF_R2 ", struct pt_regs, regs[2]);
- index("#define EF_R3 ", struct pt_regs, regs[3]);
- index("#define EF_R4 ", struct pt_regs, regs[4]);
- index("#define EF_R5 ", struct pt_regs, regs[5]);
- index("#define EF_R6 ", struct pt_regs, regs[6]);
- index("#define EF_R7 ", struct pt_regs, regs[7]);
- index("#define EF_R8 ", struct pt_regs, regs[8]);
- index("#define EF_R9 ", struct pt_regs, regs[9]);
- index("#define EF_R10 ", struct pt_regs, regs[10]);
- index("#define EF_R11 ", struct pt_regs, regs[11]);
- index("#define EF_R12 ", struct pt_regs, regs[12]);
- index("#define EF_R13 ", struct pt_regs, regs[13]);
- index("#define EF_R14 ", struct pt_regs, regs[14]);
- index("#define EF_R15 ", struct pt_regs, regs[15]);
- index("#define EF_R16 ", struct pt_regs, regs[16]);
- index("#define EF_R17 ", struct pt_regs, regs[17]);
- index("#define EF_R18 ", struct pt_regs, regs[18]);
- index("#define EF_R19 ", struct pt_regs, regs[19]);
- index("#define EF_R20 ", struct pt_regs, regs[20]);
- index("#define EF_R21 ", struct pt_regs, regs[21]);
- index("#define EF_R22 ", struct pt_regs, regs[22]);
- index("#define EF_R23 ", struct pt_regs, regs[23]);
- index("#define EF_R24 ", struct pt_regs, regs[24]);
- index("#define EF_R25 ", struct pt_regs, regs[25]);
- index("#define EF_R26 ", struct pt_regs, regs[26]);
- index("#define EF_R27 ", struct pt_regs, regs[27]);
- index("#define EF_R28 ", struct pt_regs, regs[28]);
- index("#define EF_R29 ", struct pt_regs, regs[29]);
- index("#define EF_R30 ", struct pt_regs, regs[30]);
- index("#define EF_R31 ", struct pt_regs, regs[31]);
- linefeed;
- index("#define EF_LO ", struct pt_regs, lo);
- index("#define EF_HI ", struct pt_regs, hi);
- linefeed;
- index("#define EF_EPC ", struct pt_regs, cp0_epc);
- index("#define EF_BVADDR ", struct pt_regs, cp0_badvaddr);
- index("#define EF_STATUS ", struct pt_regs, cp0_status);
- index("#define EF_CAUSE ", struct pt_regs, cp0_cause);
- linefeed;
- size("#define EF_SIZE ", struct pt_regs);
- linefeed;
-}
+++ /dev/null
-#
-# Makefile for the Linux/MIPS-specific parts of the memory manager.
-#
-
-obj-$(CONFIG_CPU_TX49XX) += tlbex-r4k.o
-obj-$(CONFIG_CPU_R4300) += tlbex-r4k.o
-obj-$(CONFIG_CPU_R4X00) += tlbex-r4k.o
-obj-$(CONFIG_CPU_VR41XX) += tlbex-r4k.o
-obj-$(CONFIG_CPU_R5000) += tlbex-r4k.o
-obj-$(CONFIG_CPU_NEVADA) += tlbex-r4k.o
-obj-$(CONFIG_CPU_R5432) += tlbex-r4k.o
-obj-$(CONFIG_CPU_RM7000) += tlbex-r4k.o
-obj-$(CONFIG_CPU_RM9000) += tlbex-r4k.o
-obj-$(CONFIG_CPU_R10000) += tlbex-r4k.o
-obj-$(CONFIG_CPU_MIPS32) += tlbex-r4k.o
-obj-$(CONFIG_CPU_MIPS64) += tlbex-r4k.o
-obj-$(CONFIG_CPU_SB1) += tlbex-r4k.o
-
-EXTRA_AFLAGS := $(CFLAGS)
+++ /dev/null
-/*
- * TLB exception handling code for r4k.
- *
- * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
- *
- * Multi-cpu abstraction and reworking:
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- */
-#include <linux/init.h>
-#include <linux/config.h>
-
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/cachectl.h>
-#include <asm/fpregdef.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/pgtable-bits.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/war.h>
-
-#define TLB_OPTIMIZE /* If you are paranoid, disable this. */
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PTE_L ld
-#define PTE_S sd
-#define PTE_SRL dsrl
-#define P_MTC0 dmtc0
-#define PTE_SIZE 8
-#define PTEP_INDX_MSK 0xff0
-#define PTE_INDX_MSK 0xff8
-#define PTE_INDX_SHIFT 9
-#else
-#define PTE_L lw
-#define PTE_S sw
-#define PTE_SRL srl
-#define P_MTC0 mtc0
-#define PTE_SIZE 4
-#define PTEP_INDX_MSK 0xff8
-#define PTE_INDX_MSK 0xffc
-#define PTE_INDX_SHIFT 10
-#endif
-
-/*
- * ABUSE of CPP macros 101.
- *
- * After this macro runs, the pte faulted on is
- * in register PTE, a ptr into the table in which
- * the pte belongs is in PTR.
- */
-
-#ifdef CONFIG_SMP
-#define GET_PGD(scratch, ptr) \
- mfc0 ptr, CP0_CONTEXT; \
- la scratch, pgd_current;\
- srl ptr, 23; \
- sll ptr, 2; \
- addu ptr, scratch, ptr; \
- lw ptr, (ptr);
-#else
-#define GET_PGD(scratch, ptr) \
- lw ptr, pgd_current;
-#endif
-
-#define LOAD_PTE(pte, ptr) \
- GET_PGD(pte, ptr) \
- mfc0 pte, CP0_BADVADDR; \
- srl pte, pte, _PGDIR_SHIFT; \
- sll pte, pte, 2; \
- addu ptr, ptr, pte; \
- mfc0 pte, CP0_BADVADDR; \
- lw ptr, (ptr); \
- srl pte, pte, PTE_INDX_SHIFT; \
- and pte, pte, PTE_INDX_MSK; \
- addu ptr, ptr, pte; \
- PTE_L pte, (ptr);
-
- /* This places the even/odd pte pair in the page
- * table at PTR into ENTRYLO0 and ENTRYLO1 using
- * TMP as a scratch register.
- */
-#define PTE_RELOAD(ptr, tmp) \
- ori ptr, ptr, PTE_SIZE; \
- xori ptr, ptr, PTE_SIZE; \
- PTE_L tmp, PTE_SIZE(ptr); \
- PTE_L ptr, 0(ptr); \
- PTE_SRL tmp, tmp, 6; \
- P_MTC0 tmp, CP0_ENTRYLO1; \
- PTE_SRL ptr, ptr, 6; \
- P_MTC0 ptr, CP0_ENTRYLO0;
-
-#define DO_FAULT(write) \
- .set noat; \
- SAVE_ALL; \
- mfc0 a2, CP0_BADVADDR; \
- KMODE; \
- .set at; \
- move a0, sp; \
- jal do_page_fault; \
- li a1, write; \
- j ret_from_exception; \
- nop; \
- .set noat;
-
- /* Check is PTE is present, if not then jump to LABEL.
- * PTR points to the page table where this PTE is located,
- * when the macro is done executing PTE will be restored
- * with it's original value.
- */
-#define PTE_PRESENT(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- bnez pte, label; \
- PTE_L pte, (ptr);
-
- /* Make PTE valid, store result in PTR. */
-#define PTE_MAKEVALID(pte, ptr) \
- ori pte, pte, (_PAGE_VALID | _PAGE_ACCESSED); \
- PTE_S pte, (ptr);
-
- /* Check if PTE can be written to, if not branch to LABEL.
- * Regardless restore PTE with value from PTR when done.
- */
-#define PTE_WRITABLE(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- bnez pte, label; \
- PTE_L pte, (ptr);
-
- /* Make PTE writable, update software status bits as well,
- * then store at PTR.
- */
-#define PTE_MAKEWRITE(pte, ptr) \
- ori pte, pte, (_PAGE_ACCESSED | _PAGE_MODIFIED | \
- _PAGE_VALID | _PAGE_DIRTY); \
- PTE_S pte, (ptr);
-
- __INIT
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define GET_PTE_OFF(reg)
-#elif CONFIG_CPU_VR41XX
-#define GET_PTE_OFF(reg) srl reg, reg, 3
-#else
-#define GET_PTE_OFF(reg) srl reg, reg, 1
-#endif
-
-/*
- * These handlers much be written in a relocatable manner
- * because based upon the cpu type an arbitrary one of the
- * following pieces of code will be copied to the KSEG0
- * vector location.
- */
- /* TLB refill, EXL == 0, R4xx0, non-R4600 version */
- .set noreorder
- .set noat
- LEAF(except_vec0_r4000)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR # Get faulting address
- srl k0, k0, _PGDIR_SHIFT # get pgd only bits
-
- sll k0, k0, 2
- addu k1, k1, k0 # add in pgd offset
- mfc0 k0, CP0_CONTEXT # get context reg
- lw k1, (k1)
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0 # add in offset
- PTE_L k0, 0(k1) # get even pte
- PTE_L k1, PTE_SIZE(k1) # get odd pte
- PTE_SRL k0, k0, 6 # convert to entrylo0
- P_MTC0 k0, CP0_ENTRYLO0 # load it
- PTE_SRL k1, k1, 6 # convert to entrylo1
- P_MTC0 k1, CP0_ENTRYLO1 # load it
- mtc0_tlbw_hazard
- tlbwr # write random tlb entry
- tlbw_eret_hazard
- eret # return from trap
- END(except_vec0_r4000)
-
- /* TLB refill, EXL == 0, R4600 version */
- LEAF(except_vec0_r4600)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- PTE_SRL k0, k0, 6
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- P_MTC0 k1, CP0_ENTRYLO1
- nop
- tlbwr
- nop
- eret
- END(except_vec0_r4600)
-
- /* TLB refill, EXL == 0, R52x0 "Nevada" version */
- /*
- * This version has a bug workaround for the Nevada. It seems
- * as if under certain circumstances the move from cp0_context
- * might produce a bogus result when the mfc0 instruction and
- * it's consumer are in a different cacheline or a load instruction,
- * probably any memory reference, is between them. This is
- * potencially slower than the R4000 version, so we use this
- * special version.
- */
- .set noreorder
- .set noat
- LEAF(except_vec0_nevada)
- .set mips3
- mfc0 k0, CP0_BADVADDR # Get faulting address
- srl k0, k0, _PGDIR_SHIFT # get pgd only bits
- lw k1, pgd_current # get pgd pointer
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0 # add in pgd offset
- lw k1, (k1)
- mfc0 k0, CP0_CONTEXT # get context reg
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0 # add in offset
- PTE_L k0, 0(k1) # get even pte
- PTE_L k1, PTE_SIZE(k1) # get odd pte
- PTE_SRL k0, k0, 6 # convert to entrylo0
- P_MTC0 k0, CP0_ENTRYLO0 # load it
- PTE_SRL k1, k1, 6 # convert to entrylo1
- P_MTC0 k1, CP0_ENTRYLO1 # load it
- nop # QED specified nops
- nop
- tlbwr # write random tlb entry
- nop # traditional nop
- eret # return from trap
- END(except_vec0_nevada)
-
- /* TLB refill, EXL == 0, SB1 with M3 errata handling version */
- LEAF(except_vec0_sb1)
-#if BCM1250_M3_WAR
- mfc0 k0, CP0_BADVADDR
- mfc0 k1, CP0_ENTRYHI
- xor k0, k1
- srl k0, k0, PAGE_SHIFT+1
- bnez k0, 1f
-#endif
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR # Get faulting address
- srl k0, k0, _PGDIR_SHIFT # get pgd only bits
- sll k0, k0, 2
- addu k1, k1, k0 # add in pgd offset
- mfc0 k0, CP0_CONTEXT # get context reg
- lw k1, (k1)
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0 # add in offset
- PTE_L k0, 0(k1) # get even pte
- PTE_L k1, PTE_SIZE(k1) # get odd pte
- PTE_SRL k0, k0, 6 # convert to entrylo0
- P_MTC0 k0, CP0_ENTRYLO0 # load it
- PTE_SRL k1, k1, 6 # convert to entrylo1
- P_MTC0 k1, CP0_ENTRYLO1 # load it
- tlbwr # write random tlb entry
-1: eret # return from trap
- END(except_vec0_sb1)
-
- /* TLB refill, EXL == 0, R4[40]00/R5000 badvaddr hwbug version */
- LEAF(except_vec0_r45k_bvahwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- nop /* XXX */
- tlbp
- PTE_SRL k0, k0, 6
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- mfc0 k0, CP0_INDEX
- P_MTC0 k1, CP0_ENTRYLO1
- bltzl k0, 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r45k_bvahwbug)
-
-#ifdef CONFIG_SMP
- /* TLB refill, EXL == 0, R4000 MP badvaddr hwbug version */
- LEAF(except_vec0_r4k_mphwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- nop /* XXX */
- tlbp
- PTE_SRL k0, k0, 6
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- mfc0 k0, CP0_INDEX
- P_MTC0 k1, CP0_ENTRYLO1
- bltzl k0, 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r4k_mphwbug)
-#endif
-
- /* TLB refill, EXL == 0, R4000 UP 250MHZ entrylo[01] hwbug version */
- LEAF(except_vec0_r4k_250MHZhwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- PTE_SRL k0, k0, 6
- P_MTC0 zero, CP0_ENTRYLO0
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- P_MTC0 zero, CP0_ENTRYLO1
- P_MTC0 k1, CP0_ENTRYLO1
- b 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r4k_250MHZhwbug)
-
-#ifdef CONFIG_SMP
- /* TLB refill, EXL == 0, R4000 MP 250MHZ entrylo[01]+badvaddr bug version */
- LEAF(except_vec0_r4k_MP250MHZhwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- nop /* XXX */
- tlbp
- PTE_SRL k0, k0, 6
- P_MTC0 zero, CP0_ENTRYLO0
- P_MTC0 k0, CP0_ENTRYLO0
- mfc0 k0, CP0_INDEX
- PTE_SRL k1, k1, 6
- P_MTC0 zero, CP0_ENTRYLO1
- P_MTC0 k1, CP0_ENTRYLO1
- bltzl k0, 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r4k_MP250MHZhwbug)
-#endif
-
- __FINIT
-
- .set noreorder
-
-/*
- * From the IDT errata for the QED RM5230 (Nevada), processor revision 1.0:
- * 2. A timing hazard exists for the TLBP instruction.
- *
- * stalling_instruction
- * TLBP
- *
- * The JTLB is being read for the TLBP throughout the stall generated by the
- * previous instruction. This is not really correct as the stalling instruction
- * can modify the address used to access the JTLB. The failure symptom is that
- * the TLBP instruction will use an address created for the stalling instruction
- * and not the address held in C0_ENHI and thus report the wrong results.
- *
- * The software work-around is to not allow the instruction preceding the TLBP
- * to stall - make it an NOP or some other instruction guaranteed not to stall.
- *
- * Errata 2 will not be fixed. This errata is also on the R5000.
- *
- * As if we MIPS hackers wouldn't know how to nop pipelines happy ...
- */
-#define R5K_HAZARD nop
-
- /*
- * Note for many R4k variants tlb probes cannot be executed out
- * of the instruction cache else you get bogus results.
- */
- .align 5
- NESTED(handle_tlbl, PT_SIZE, sp)
- .set noat
-#if BCM1250_M3_WAR
- mfc0 k0, CP0_BADVADDR
- mfc0 k1, CP0_ENTRYHI
- xor k0, k1
- srl k0, k0, PAGE_SHIFT+1
- beqz k0, 1f
- nop
- .set mips3
- eret
- .set mips0
-1:
-#endif
-invalid_tlbl:
-#ifdef TLB_OPTIMIZE
- .set mips3
- /* Test present bit in entry. */
- LOAD_PTE(k0, k1)
- R5K_HAZARD
- tlbp
- PTE_PRESENT(k0, k1, nopage_tlbl)
- PTE_MAKEVALID(k0, k1)
- PTE_RELOAD(k1, k0)
- mtc0_tlbw_hazard
- tlbwi
- tlbw_eret_hazard
- .set mips3
- eret
- .set mips0
-#endif
-
-nopage_tlbl:
- DO_FAULT(0)
- END(handle_tlbl)
-
- .align 5
- NESTED(handle_tlbs, PT_SIZE, sp)
- .set noat
-#ifdef TLB_OPTIMIZE
- .set mips3
- li k0,0
- LOAD_PTE(k0, k1)
- R5K_HAZARD
- tlbp # find faulting entry
- PTE_WRITABLE(k0, k1, nopage_tlbs)
- PTE_MAKEWRITE(k0, k1)
- PTE_RELOAD(k1, k0)
- mtc0_tlbw_hazard
- tlbwi
- tlbw_eret_hazard
- .set mips3
- eret
- .set mips0
-#endif
-
-nopage_tlbs:
- DO_FAULT(1)
- END(handle_tlbs)
-
- .align 5
- NESTED(handle_mod, PT_SIZE, sp)
- .set noat
-#ifdef TLB_OPTIMIZE
- .set mips3
- LOAD_PTE(k0, k1)
- R5K_HAZARD
- tlbp # find faulting entry
- andi k0, k0, _PAGE_WRITE
- beqz k0, nowrite_mod
- PTE_L k0, (k1)
-
- /* Present and writable bits set, set accessed and dirty bits. */
- PTE_MAKEWRITE(k0, k1)
-
- /* Now reload the entry into the tlb. */
- PTE_RELOAD(k1, k0)
- mtc0_tlbw_hazard
- tlbwi
- tlbw_eret_hazard
- .set mips3
- eret
- .set mips0
-#endif
-
-nowrite_mod:
- DO_FAULT(1)
- END(handle_mod)
+++ /dev/null
-#
-# Makefile for the Linux/MIPS-specific parts of the memory manager.
-#
-
-obj-y := tlbex-r4k.o
-
-obj-$(CONFIG_CPU_R4300) += tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R4X00) += tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R5000) += tlb-glue-r4k.o
-obj-$(CONFIG_CPU_NEVADA) += tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R5432) += tlb-glue-r4k.o
-obj-$(CONFIG_CPU_RM7000) += tlb-glue-r4k.o
-obj-$(CONFIG_CPU_RM9000) += tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R10000) += tlb-glue-r4k.o
-obj-$(CONFIG_CPU_SB1) += tlb-glue-sb1.o
-obj-$(CONFIG_CPU_MIPS64) += tlb-glue-r4k.o
-
-#
-# Debug TLB exception handler, currently unused
-#
-#obj-y += tlb-dbg-r4k.o
-
-AFLAGS_tlb-glue-r4k.o := -P
-
-EXTRA_AFLAGS := $(CFLAGS)
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- *
- * TLB debugging routines. These perform horribly slow but can easily be
- * modified for debugging purposes.
- */
-#include <linux/linkage.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/ptrace.h>
-#include <asm/system.h>
-
-asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write,
- unsigned long address);
-
-asmlinkage void tlb_refill_debug(struct pt_regs regs)
-{
- show_regs(®s);
- panic("%s called. This Does Not Happen (TM).", __FUNCTION__);
-}
-
-asmlinkage void xtlb_refill_debug(struct pt_regs *regs)
-{
- unsigned long addr;
- pgd_t *pgd;
- pmd_t *pmd;
- pte_t *pte;
-
- addr = regs->cp0_badvaddr & ~((PAGE_SIZE << 1) - 1);
- pgd = pgd_offset(current->active_mm, addr);
- pmd = pmd_offset(pgd, addr);
- pte = pte_offset(pmd, addr);
-
- write_c0_entrylo0(pte_val(pte[0]) >> 6);
- write_c0_entrylo1(pte_val(pte[1]) >> 6);
- __asm__ __volatile__("nop;nop;nop");
-
- tlb_write_random();
-}
-
-asmlinkage void xtlb_mod_debug(struct pt_regs *regs)
-{
- unsigned long addr;
-
- addr = regs->cp0_badvaddr;
- do_page_fault(regs, 1, addr);
-}
-
-asmlinkage void xtlb_tlbl_debug(struct pt_regs *regs)
-{
- unsigned long addr;
-
- addr = regs->cp0_badvaddr;
- do_page_fault(regs, 0, addr);
-}
-
-asmlinkage void xtlb_tlbs_debug(struct pt_regs *regs)
-{
- unsigned long addr;
-
- addr = regs->cp0_badvaddr;
- do_page_fault(regs, 1, addr);
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#include <linux/init.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
- .macro __BUILD_cli
- CLI
- .endm
-
- .macro __BUILD_sti
- STI
- .endm
-
- .macro __BUILD_kmode
- KMODE
- .endm
-
- .macro tlb_handler name interruptible writebit
- NESTED(__\name, PT_SIZE, sp)
- SAVE_ALL
- dmfc0 a2, CP0_BADVADDR
- __BUILD_\interruptible
- li a1, \writebit
- sd a2, PT_BVADDR(sp)
- move a0, sp
- jal do_page_fault
- j ret_from_exception
- END(__\name)
- .endm
-
- tlb_handler xtlb_mod kmode 1
- tlb_handler xtlb_tlbl kmode 0
- tlb_handler xtlb_tlbs kmode 1
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#include <linux/init.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/war.h>
-
- .macro __BUILD_cli
- CLI
- .endm
-
- .macro __BUILD_sti
- STI
- .endm
-
- .macro __BUILD_kmode
- KMODE
- .endm
-
- .macro tlb_handler name interruptible writebit
- NESTED(__\name, PT_SIZE, sp)
- SAVE_ALL
- dmfc0 a2, CP0_BADVADDR
- __BUILD_\interruptible
- li a1, \writebit
- sd a2, PT_BVADDR(sp)
- move a0, sp
- jal do_page_fault
- j ret_from_exception
- END(__\name)
- .endm
-
- .macro tlb_handler_m3 name interruptible writebit
- NESTED(__\name, PT_SIZE, sp)
- dmfc0 k0, CP0_BADVADDR
- dmfc0 k1, CP0_ENTRYHI
- xor k0, k1
- dsrl k0, k0, PAGE_SHIFT + 1
- bnez k0, 1f
- SAVE_ALL
- dmfc0 a2, CP0_BADVADDR
- __BUILD_\interruptible
- li a1, \writebit
- sd a2, PT_BVADDR(sp)
- move a0, sp
- jal do_page_fault
-1:
- j ret_from_exception
- END(__\name)
- .endm
-
- tlb_handler xtlb_mod kmode 1
-#if BCM1250_M3_WAR
- tlb_handler_m3 xtlb_tlbl kmode 0
-#else
- tlb_handler xtlb_tlbl kmode 0
-#endif
- tlb_handler xtlb_tlbs kmode 1
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Silicon Graphics, Inc.
- * Written by Ulf Carlsson (ulfc@engr.sgi.com)
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/threads.h>
-
-#include <asm/asm.h>
-#include <asm/hazards.h>
-#include <asm/regdef.h>
-#include <asm/mipsregs.h>
-#include <asm/stackframe.h>
-#include <asm/war.h>
-
-#define _VMALLOC_START 0xc000000000000000
-
- /*
- * After this macro runs we have a pointer to the pte of the address
- * that caused the fault in PTR.
- */
- .macro LOAD_PTE2, ptr, tmp, kaddr
-#ifdef CONFIG_SMP
- dmfc0 \ptr, CP0_CONTEXT
- dmfc0 \tmp, CP0_BADVADDR
- dsra \ptr, 23 # get pgd_current[cpu]
-#else
- dmfc0 \tmp, CP0_BADVADDR
- dla \ptr, pgd_current
-#endif
- bltz \tmp, \kaddr
- ld \ptr, (\ptr)
- dsrl \tmp, (_PGDIR_SHIFT-3) # get pgd offset in bytes
- andi \tmp, ((_PTRS_PER_PGD - 1)<<3)
- daddu \ptr, \tmp # add in pgd offset
- dmfc0 \tmp, CP0_BADVADDR
- ld \ptr, (\ptr) # get pmd pointer
- dsrl \tmp, (_PMD_SHIFT-3) # get pmd offset in bytes
- andi \tmp, ((_PTRS_PER_PMD - 1)<<3)
- daddu \ptr, \tmp # add in pmd offset
- dmfc0 \tmp, CP0_XCONTEXT
- ld \ptr, (\ptr) # get pte pointer
- andi \tmp, 0xff0 # get pte offset
- daddu \ptr, \tmp
- .endm
-
-
- /*
- * Ditto for the kernel table.
- */
- .macro LOAD_KPTE2, ptr, tmp, not_vmalloc
- /*
- * First, determine that the address is in/above vmalloc range.
- */
- dmfc0 \tmp, CP0_BADVADDR
- dli \ptr, _VMALLOC_START
-
- /*
- * Now find offset into kptbl.
- */
- dsubu \tmp, \tmp, \ptr
- dla \ptr, kptbl
- dsrl \tmp, (_PAGE_SHIFT+1) # get vpn2
- dsll \tmp, 4 # byte offset of pte
- daddu \ptr, \ptr, \tmp
-
- /*
- * Determine that fault address is within vmalloc range.
- */
- dla \tmp, ekptbl
- slt \tmp, \ptr, \tmp
- beqz \tmp, \not_vmalloc # not vmalloc
- nop
- .endm
-
-
- /*
- * This places the even/odd pte pair in the page table at the pte
- * entry pointed to by PTE into ENTRYLO0 and ENTRYLO1.
- */
- .macro PTE_RELOAD, pte0, pte1
- dsrl \pte0, 6 # convert to entrylo0
- dmtc0 \pte0, CP0_ENTRYLO0 # load it
- dsrl \pte1, 6 # convert to entrylo1
- dmtc0 \pte1, CP0_ENTRYLO1 # load it
- .endm
-
-
- .text
- .set noreorder
- .set mips3
-
- __INIT
-
- /*
- * TLB refill handlers for the R4000 and SB1.
- * Attention: We may only use 32 instructions / 128 bytes.
- */
- .align 5
-LEAF(except_vec1_r4k)
- .set noat
- dla k0, handle_vec1_r4k
- jr k0
- nop
-END(except_vec1_r4k)
-
-LEAF(except_vec1_sb1)
-#if BCM1250_M3_WAR
- dmfc0 k0, CP0_BADVADDR
- dmfc0 k1, CP0_ENTRYHI
- xor k0, k1
- dsrl k0, k0, _PAGE_SHIFT+1
- bnez k0, 1f
-#endif
- .set noat
- dla k0, handle_vec1_r4k
- jr k0
- nop
-
-1: eret
- nop
-END(except_vec1_sb1)
-
- __FINIT
-
- .align 5
-LEAF(handle_vec1_r4k)
- .set noat
- LOAD_PTE2 k1 k0 9f
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- mtc0_tlbw_hazard
- tlbwr
- tlbw_eret_hazard
- eret
-
-9: # handle the vmalloc range
- LOAD_KPTE2 k1 k0 invalid_vmalloc_address
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- mtc0_tlbw_hazard
- tlbwr
- tlbw_eret_hazard
- eret
-END(handle_vec1_r4k)
-
-
- __INIT
-
- /*
- * TLB refill handler for the R10000.
- * Attention: We may only use 32 instructions / 128 bytes.
- */
- .align 5
-LEAF(except_vec1_r10k)
- .set noat
- dla k0, handle_vec1_r10k
- jr k0
- nop
-END(except_vec1_r10k)
-
- __FINIT
-
- .align 5
-LEAF(handle_vec1_r10k)
- .set noat
- LOAD_PTE2 k1 k0 9f
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- nop
- tlbwr
- eret
-
-9: # handle the vmalloc range
- LOAD_KPTE2 k1 k0 invalid_vmalloc_address
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- nop
- tlbwr
- eret
-END(handle_vec1_r10k)
-
-
- .align 5
-LEAF(invalid_vmalloc_address)
- .set noat
- SAVE_ALL
- CLI
- dmfc0 t0, CP0_BADVADDR
- sd t0, PT_BVADDR(sp)
- move a0, sp
- jal show_regs
- PANIC("Invalid kernel address")
-END(invalid_vmalloc_address)
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#include <linux/init.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
- .macro __BUILD_cli
- CLI
- .endm
-
- .macro __BUILD_sti
- STI
- .endm
-
- .macro __BUILD_kmode
- KMODE
- .endm
-
- .macro tlb_handler name interruptible writebit
- NESTED(__\name, PT_SIZE, sp)
- SAVE_ALL
- dmfc0 a2, CP0_BADVADDR
- __BUILD_\interruptible
- li a1, \writebit
- sd a2, PT_BVADDR(sp)
- move a0, sp
- jal do_page_fault
- j ret_from_exception
- END(__\name)
- .endm
-
- tlb_handler xtlb_mod kmode 1
- tlb_handler xtlb_tlbl kmode 0
- tlb_handler xtlb_tlbs kmode 1
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
- */
-#include <linux/init.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/war.h>
-
- .macro __BUILD_cli
- CLI
- .endm
-
- .macro __BUILD_sti
- STI
- .endm
-
- .macro __BUILD_kmode
- KMODE
- .endm
-
- .macro tlb_handler name interruptible writebit
- NESTED(__\name, PT_SIZE, sp)
- SAVE_ALL
- dmfc0 a2, CP0_BADVADDR
- __BUILD_\interruptible
- li a1, \writebit
- sd a2, PT_BVADDR(sp)
- move a0, sp
- jal do_page_fault
- j ret_from_exception
- END(__\name)
- .endm
-
- .macro tlb_handler_m3 name interruptible writebit
- NESTED(__\name, PT_SIZE, sp)
- dmfc0 k0, CP0_BADVADDR
- dmfc0 k1, CP0_ENTRYHI
- xor k0, k1
- dsrl k0, k0, PAGE_SHIFT + 1
- bnez k0, 1f
- SAVE_ALL
- dmfc0 a2, CP0_BADVADDR
- __BUILD_\interruptible
- li a1, \writebit
- sd a2, PT_BVADDR(sp)
- move a0, sp
- jal do_page_fault
-1:
- j ret_from_exception
- END(__\name)
- .endm
-
- tlb_handler xtlb_mod kmode 1
-#if BCM1250_M3_WAR
- tlb_handler_m3 xtlb_tlbl kmode 0
-#else
- tlb_handler xtlb_tlbl kmode 0
-#endif
- tlb_handler xtlb_tlbs kmode 1
+++ /dev/null
-/*
- * TLB exception handling code for R2000/R3000.
- *
- * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
- *
- * Multi-CPU abstraction reworking:
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- *
- * Further modifications to make this work:
- * Copyright (c) 1998 Harald Koerfgen
- * Copyright (c) 1998, 1999 Gleb Raiko & Vladimir Roganov
- * Copyright (c) 2001 Ralf Baechle
- * Copyright (c) 2001 MIPS Technologies, Inc.
- */
-#include <linux/init.h>
-#include <asm/asm.h>
-#include <asm/cachectl.h>
-#include <asm/fpregdef.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/pgtable-bits.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
-#define TLB_OPTIMIZE /* If you are paranoid, disable this. */
-
- .text
- .set mips1
- .set noreorder
-
- __INIT
-
- /* TLB refill, R[23]00 version */
- LEAF(except_vec0_r2300)
- .set noat
- .set mips1
- mfc0 k0, CP0_BADVADDR
- lw k1, pgd_current # get pgd pointer
- srl k0, k0, 22
- sll k0, k0, 2
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
- and k0, k0, 0xffc
- addu k1, k1, k0
- lw k0, (k1)
- nop
- mtc0 k0, CP0_ENTRYLO0
- mfc0 k1, CP0_EPC
- tlbwr
- jr k1
- rfe
- END(except_vec0_r2300)
-
- __FINIT
-
- /* ABUSE of CPP macros 101. */
-
- /* After this macro runs, the pte faulted on is
- * in register PTE, a ptr into the table in which
- * the pte belongs is in PTR.
- */
-#define LOAD_PTE(pte, ptr) \
- mfc0 pte, CP0_BADVADDR; \
- lw ptr, pgd_current; \
- srl pte, pte, 22; \
- sll pte, pte, 2; \
- addu ptr, ptr, pte; \
- mfc0 pte, CP0_CONTEXT; \
- lw ptr, (ptr); \
- andi pte, pte, 0xffc; \
- addu ptr, ptr, pte; \
- lw pte, (ptr); \
- nop;
-
- /* This places the even/odd pte pair in the page
- * table at PTR into ENTRYLO0 and ENTRYLO1 using
- * TMP as a scratch register.
- */
-#define PTE_RELOAD(ptr) \
- lw ptr, (ptr) ; \
- nop ; \
- mtc0 ptr, CP0_ENTRYLO0; \
- nop;
-
-#define DO_FAULT(write) \
- .set noat; \
- .set macro; \
- SAVE_ALL; \
- mfc0 a2, CP0_BADVADDR; \
- KMODE; \
- .set at; \
- move a0, sp; \
- jal do_page_fault; \
- li a1, write; \
- j ret_from_exception; \
- nop; \
- .set noat; \
- .set nomacro;
-
- /* Check is PTE is present, if not then jump to LABEL.
- * PTR points to the page table where this PTE is located,
- * when the macro is done executing PTE will be restored
- * with it's original value.
- */
-#define PTE_PRESENT(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- bnez pte, label; \
- .set push; \
- .set reorder; \
- lw pte, (ptr); \
- .set pop;
-
- /* Make PTE valid, store result in PTR. */
-#define PTE_MAKEVALID(pte, ptr) \
- ori pte, pte, (_PAGE_VALID | _PAGE_ACCESSED); \
- sw pte, (ptr);
-
- /* Check if PTE can be written to, if not branch to LABEL.
- * Regardless restore PTE with value from PTR when done.
- */
-#define PTE_WRITABLE(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- bnez pte, label; \
- .set push; \
- .set reorder; \
- lw pte, (ptr); \
- .set pop;
-
-
- /* Make PTE writable, update software status bits as well,
- * then store at PTR.
- */
-#define PTE_MAKEWRITE(pte, ptr) \
- ori pte, pte, (_PAGE_ACCESSED | _PAGE_MODIFIED | \
- _PAGE_VALID | _PAGE_DIRTY); \
- sw pte, (ptr);
-
-/*
- * The index register may have the probe fail bit set,
- * because we would trap on access kseg2, i.e. without refill.
- */
-#define TLB_WRITE(reg) \
- mfc0 reg, CP0_INDEX; \
- nop; \
- bltz reg, 1f; \
- nop; \
- tlbwi; \
- j 2f; \
- nop; \
-1: tlbwr; \
-2:
-
-#define RET(reg) \
- mfc0 reg, CP0_EPC; \
- nop; \
- jr reg; \
- rfe
-
- .set noreorder
-
- .align 5
-NESTED(handle_tlbl, PT_SIZE, sp)
- .set noat
-
-#ifdef TLB_OPTIMIZE
- /* Test present bit in entry. */
- LOAD_PTE(k0, k1)
- tlbp
- PTE_PRESENT(k0, k1, nopage_tlbl)
- PTE_MAKEVALID(k0, k1)
- PTE_RELOAD(k1)
- TLB_WRITE(k0)
- RET(k0)
-nopage_tlbl:
-#endif
-
- DO_FAULT(0)
-END(handle_tlbl)
-
-NESTED(handle_tlbs, PT_SIZE, sp)
- .set noat
-
-#ifdef TLB_OPTIMIZE
- LOAD_PTE(k0, k1)
- tlbp # find faulting entry
- PTE_WRITABLE(k0, k1, nopage_tlbs)
- PTE_MAKEWRITE(k0, k1)
- PTE_RELOAD(k1)
- TLB_WRITE(k0)
- RET(k0)
-nopage_tlbs:
-#endif
-
- DO_FAULT(1)
-END(handle_tlbs)
-
- .align 5
-NESTED(handle_mod, PT_SIZE, sp)
- .set noat
-#ifdef TLB_OPTIMIZE
- LOAD_PTE(k0, k1)
- tlbp # find faulting entry
- andi k0, k0, _PAGE_WRITE
- beqz k0, nowrite_mod
- .set push
- .set reorder
- lw k0, (k1)
- .set pop
-
- /* Present and writable bits set, set accessed and dirty bits. */
- PTE_MAKEWRITE(k0, k1)
-
- /* Now reload the entry into the tlb. */
- PTE_RELOAD(k1)
- tlbwi
- RET(k0)
-#endif
-
-nowrite_mod:
- DO_FAULT(1)
-END(handle_mod)
+++ /dev/null
-/*
- * TLB exception handling code for MIPS32 CPUs.
- *
- * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
- *
- * Multi-cpu abstraction and reworking:
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * Pete Popov, ppopov@pacbell.net
- * Added 36 bit phys address support.
- * Copyright (C) 2002 MontaVista Software, Inc.
- */
-#include <linux/init.h>
-#include <asm/asm.h>
-#include <asm/cachectl.h>
-#include <asm/fpregdef.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/pgtable-bits.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
-#define TLB_OPTIMIZE /* If you are paranoid, disable this. */
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-
-/* We really only support 36 bit physical addresses on MIPS32 */
-#define PTE_L lw
-#define PTE_S sw
-#define PTE_SRL srl
-#define P_MTC0 mtc0
-#define PTE_HALF 4 /* pte_high contains pre-shifted, ready to go entry */
-#define PTE_SIZE 8
-#define PTEP_INDX_MSK 0xff0
-#define PTE_INDX_MSK 0xff8
-#define PTE_INDX_SHIFT 9
-#define CONVERT_PTE(pte)
-#define PTE_MAKEWRITE_HIGH(pte, ptr) \
- lw pte, PTE_HALF(ptr); \
- ori pte, (_PAGE_VALID | _PAGE_DIRTY); \
- sw pte, PTE_HALF(ptr); \
- lw pte, 0(ptr);
-
-#define PTE_MAKEVALID_HIGH(pte, ptr) \
- lw pte, PTE_HALF(ptr); \
- ori pte, pte, _PAGE_VALID; \
- sw pte, PTE_HALF(ptr); \
- lw pte, 0(ptr);
-
-#else
-
-#define PTE_L lw
-#define PTE_S sw
-#define PTE_SRL srl
-#define P_MTC0 mtc0
-#define PTE_HALF 0
-#define PTE_SIZE 4
-#define PTEP_INDX_MSK 0xff8
-#define PTE_INDX_MSK 0xffc
-#define PTE_INDX_SHIFT 10
-#define CONVERT_PTE(pte) srl pte, pte, 6
-#define PTE_MAKEWRITE_HIGH(pte, ptr)
-#define PTE_MAKEVALID_HIGH(pte, ptr)
-
-#endif /* CONFIG_64BIT_PHYS_ADDR */
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define GET_PTE_OFF(reg)
-#else
-#define GET_PTE_OFF(reg) srl reg, reg, 1
-#endif
-
-/*
- * ABUSE of CPP macros 101.
- *
- * After this macro runs, the pte faulted on is
- * in register PTE, a ptr into the table in which
- * the pte belongs is in PTR.
- */
-
-#ifdef CONFIG_SMP
-#define GET_PGD(scratch, ptr) \
- mfc0 ptr, CP0_CONTEXT; \
- la scratch, pgd_current;\
- srl ptr, 23; \
- sll ptr, 2; \
- addu ptr, scratch, ptr; \
- lw ptr, (ptr);
-#else
-#define GET_PGD(scratch, ptr) \
- lw ptr, pgd_current;
-#endif
-
-#define LOAD_PTE(pte, ptr) \
- GET_PGD(pte, ptr) \
- mfc0 pte, CP0_BADVADDR; \
- srl pte, pte, _PGDIR_SHIFT; \
- sll pte, pte, 2; \
- addu ptr, ptr, pte; \
- mfc0 pte, CP0_BADVADDR; \
- lw ptr, (ptr); \
- srl pte, pte, PTE_INDX_SHIFT; \
- and pte, pte, PTE_INDX_MSK; \
- addu ptr, ptr, pte; \
- PTE_L pte, (ptr);
-
- /* This places the even/odd pte pair in the page
- * table at PTR into ENTRYLO0 and ENTRYLO1 using
- * TMP as a scratch register.
- */
-#define PTE_RELOAD(ptr, tmp) \
- ori ptr, ptr, PTE_SIZE; \
- xori ptr, ptr, PTE_SIZE; \
- PTE_L tmp, (PTE_HALF+PTE_SIZE)(ptr); \
- CONVERT_PTE(tmp); \
- P_MTC0 tmp, CP0_ENTRYLO1; \
- PTE_L ptr, PTE_HALF(ptr); \
- CONVERT_PTE(ptr); \
- P_MTC0 ptr, CP0_ENTRYLO0;
-
-#define DO_FAULT(write) \
- .set noat; \
- SAVE_ALL; \
- mfc0 a2, CP0_BADVADDR; \
- KMODE; \
- .set at; \
- move a0, sp; \
- jal do_page_fault; \
- li a1, write; \
- j ret_from_exception; \
- nop; \
- .set noat;
-
- /* Check is PTE is present, if not then jump to LABEL.
- * PTR points to the page table where this PTE is located,
- * when the macro is done executing PTE will be restored
- * with it's original value.
- */
-#define PTE_PRESENT(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- bnez pte, label; \
- PTE_L pte, (ptr);
-
- /* Make PTE valid, store result in PTR. */
-#define PTE_MAKEVALID(pte, ptr) \
- ori pte, pte, (_PAGE_VALID | _PAGE_ACCESSED); \
- PTE_S pte, (ptr);
-
- /* Check if PTE can be written to, if not branch to LABEL.
- * Regardless restore PTE with value from PTR when done.
- */
-#define PTE_WRITABLE(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- bnez pte, label; \
- PTE_L pte, (ptr);
-
- /* Make PTE writable, update software status bits as well,
- * then store at PTR.
- */
-#define PTE_MAKEWRITE(pte, ptr) \
- ori pte, pte, (_PAGE_ACCESSED | _PAGE_MODIFIED | \
- _PAGE_VALID | _PAGE_DIRTY); \
- PTE_S pte, (ptr);
-
- .set noreorder
-
- .align 5
- NESTED(handle_tlbl, PT_SIZE, sp)
- .set noat
-invalid_tlbl:
-#ifdef TLB_OPTIMIZE
- /* Test present bit in entry. */
- LOAD_PTE(k0, k1)
- tlbp
- PTE_PRESENT(k0, k1, nopage_tlbl)
- PTE_MAKEVALID_HIGH(k0, k1)
- PTE_MAKEVALID(k0, k1)
- PTE_RELOAD(k1, k0)
- nop
- b 1f
- tlbwi
-1:
- nop
- .set mips3
- eret
- .set mips0
-#endif
-
-nopage_tlbl:
- DO_FAULT(0)
- END(handle_tlbl)
-
- .align 5
- NESTED(handle_tlbs, PT_SIZE, sp)
- .set noat
-#ifdef TLB_OPTIMIZE
- .set mips3
- li k0,0
- LOAD_PTE(k0, k1)
- tlbp # find faulting entry
- PTE_WRITABLE(k0, k1, nopage_tlbs)
- PTE_MAKEWRITE(k0, k1)
- PTE_MAKEWRITE_HIGH(k0, k1)
- PTE_RELOAD(k1, k0)
- nop
- b 1f
- tlbwi
-1:
- nop
- .set mips3
- eret
- .set mips0
-#endif
-
-nopage_tlbs:
- DO_FAULT(1)
- END(handle_tlbs)
-
- .align 5
- NESTED(handle_mod, PT_SIZE, sp)
- .set noat
-#ifdef TLB_OPTIMIZE
- .set mips3
- LOAD_PTE(k0, k1)
- tlbp # find faulting entry
- andi k0, k0, _PAGE_WRITE
- beqz k0, nowrite_mod
- PTE_L k0, (k1)
-
- /* Present and writable bits set, set accessed and dirty bits. */
- PTE_MAKEWRITE(k0, k1)
- PTE_MAKEWRITE_HIGH(k0, k1)
- /* Now reload the entry into the tlb. */
- PTE_RELOAD(k1, k0)
- nop
- b 1f
- tlbwi
-1:
- nop
- .set mips3
- eret
- .set mips0
-#endif
-
-nowrite_mod:
- DO_FAULT(1)
- END(handle_mod)
-
+++ /dev/null
-/*
- * TLB exception handling code for R2000/R3000.
- *
- * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
- *
- * Multi-CPU abstraction reworking:
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- *
- * Further modifications to make this work:
- * Copyright (c) 1998 Harald Koerfgen
- * Copyright (c) 1998, 1999 Gleb Raiko & Vladimir Roganov
- * Copyright (c) 2001 Ralf Baechle
- * Copyright (c) 2001 MIPS Technologies, Inc.
- */
-#include <linux/init.h>
-#include <asm/asm.h>
-#include <asm/cachectl.h>
-#include <asm/fpregdef.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/pgtable-bits.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
-#define TLB_OPTIMIZE /* If you are paranoid, disable this. */
-
- /* ABUSE of CPP macros 101. */
-
- /* After this macro runs, the pte faulted on is
- * in register PTE, a ptr into the table in which
- * the pte belongs is in PTR.
- */
-#define LOAD_PTE(pte, ptr) \
- mfc0 pte, CP0_BADVADDR; \
- lw ptr, pgd_current; \
- srl pte, pte, 22; \
- sll pte, pte, 2; \
- addu ptr, ptr, pte; \
- mfc0 pte, CP0_CONTEXT; \
- lw ptr, (ptr); \
- andi pte, pte, 0xffc; \
- addu ptr, ptr, pte; \
- lw pte, (ptr); \
- nop;
-
- /* This places the even/odd pte pair in the page
- * table at PTR into ENTRYLO0 and ENTRYLO1 using
- * TMP as a scratch register.
- */
-#define PTE_RELOAD(ptr) \
- lw ptr, (ptr) ; \
- nop ; \
- mtc0 ptr, CP0_ENTRYLO0; \
- nop;
-
-#define DO_FAULT(write) \
- .set noat; \
- .set macro; \
- SAVE_ALL; \
- mfc0 a2, CP0_BADVADDR; \
- KMODE; \
- .set at; \
- move a0, sp; \
- jal do_page_fault; \
- li a1, write; \
- j ret_from_exception; \
- nop; \
- .set noat; \
- .set nomacro;
-
- /* Check is PTE is present, if not then jump to LABEL.
- * PTR points to the page table where this PTE is located,
- * when the macro is done executing PTE will be restored
- * with it's original value.
- */
-#define PTE_PRESENT(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- bnez pte, label; \
- .set push; \
- .set reorder; \
- lw pte, (ptr); \
- .set pop;
-
- /* Make PTE valid, store result in PTR. */
-#define PTE_MAKEVALID(pte, ptr) \
- ori pte, pte, (_PAGE_VALID | _PAGE_ACCESSED); \
- sw pte, (ptr);
-
- /* Check if PTE can be written to, if not branch to LABEL.
- * Regardless restore PTE with value from PTR when done.
- */
-#define PTE_WRITABLE(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- bnez pte, label; \
- .set push; \
- .set reorder; \
- lw pte, (ptr); \
- .set pop;
-
-
- /* Make PTE writable, update software status bits as well,
- * then store at PTR.
- */
-#define PTE_MAKEWRITE(pte, ptr) \
- ori pte, pte, (_PAGE_ACCESSED | _PAGE_MODIFIED | \
- _PAGE_VALID | _PAGE_DIRTY); \
- sw pte, (ptr);
-
-/*
- * The index register may have the probe fail bit set,
- * because we would trap on access kseg2, i.e. without refill.
- */
-#define TLB_WRITE(reg) \
- mfc0 reg, CP0_INDEX; \
- nop; \
- bltz reg, 1f; \
- nop; \
- tlbwi; \
- j 2f; \
- nop; \
-1: tlbwr; \
-2:
-
-#define RET(reg) \
- mfc0 reg, CP0_EPC; \
- nop; \
- jr reg; \
- rfe
-
- .set noreorder
-
- .align 5
-NESTED(handle_tlbl, PT_SIZE, sp)
- .set noat
-
-#ifdef TLB_OPTIMIZE
- /* Test present bit in entry. */
- LOAD_PTE(k0, k1)
- tlbp
- PTE_PRESENT(k0, k1, nopage_tlbl)
- PTE_MAKEVALID(k0, k1)
- PTE_RELOAD(k1)
- TLB_WRITE(k0)
- RET(k0)
-nopage_tlbl:
-#endif
-
- DO_FAULT(0)
-END(handle_tlbl)
-
-NESTED(handle_tlbs, PT_SIZE, sp)
- .set noat
-
-#ifdef TLB_OPTIMIZE
- LOAD_PTE(k0, k1)
- tlbp # find faulting entry
- PTE_WRITABLE(k0, k1, nopage_tlbs)
- PTE_MAKEWRITE(k0, k1)
- PTE_RELOAD(k1)
- TLB_WRITE(k0)
- RET(k0)
-nopage_tlbs:
-#endif
-
- DO_FAULT(1)
-END(handle_tlbs)
-
- .align 5
-NESTED(handle_mod, PT_SIZE, sp)
- .set noat
-#ifdef TLB_OPTIMIZE
- LOAD_PTE(k0, k1)
- tlbp # find faulting entry
- andi k0, k0, _PAGE_WRITE
- beqz k0, nowrite_mod
- .set push
- .set reorder
- lw k0, (k1)
- .set pop
-
- /* Present and writable bits set, set accessed and dirty bits. */
- PTE_MAKEWRITE(k0, k1)
-
- /* Now reload the entry into the tlb. */
- PTE_RELOAD(k1)
- tlbwi
- RET(k0)
-#endif
-
-nowrite_mod:
- DO_FAULT(1)
-END(handle_mod)
+++ /dev/null
-/*
- * TLB exception handling code for r4k.
- *
- * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
- *
- * Multi-cpu abstraction and reworking:
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- */
-#include <linux/init.h>
-#include <linux/config.h>
-
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/cachectl.h>
-#include <asm/fpregdef.h>
-#include <asm/mipsregs.h>
-#include <asm/page.h>
-#include <asm/pgtable-bits.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/war.h>
-
-#define TLB_OPTIMIZE /* If you are paranoid, disable this. */
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PTE_L ld
-#define PTE_S sd
-#define PTE_SRL dsrl
-#define P_MTC0 dmtc0
-#define PTE_SIZE 8
-#define PTEP_INDX_MSK 0xff0
-#define PTE_INDX_MSK 0xff8
-#define PTE_INDX_SHIFT 9
-#else
-#define PTE_L lw
-#define PTE_S sw
-#define PTE_SRL srl
-#define P_MTC0 mtc0
-#define PTE_SIZE 4
-#define PTEP_INDX_MSK 0xff8
-#define PTE_INDX_MSK 0xffc
-#define PTE_INDX_SHIFT 10
-#endif
-
-/*
- * ABUSE of CPP macros 101.
- *
- * After this macro runs, the pte faulted on is
- * in register PTE, a ptr into the table in which
- * the pte belongs is in PTR.
- */
-
-#ifdef CONFIG_SMP
-#define GET_PGD(scratch, ptr) \
- mfc0 ptr, CP0_CONTEXT; \
- la scratch, pgd_current;\
- srl ptr, 23; \
- sll ptr, 2; \
- addu ptr, scratch, ptr; \
- lw ptr, (ptr);
-#else
-#define GET_PGD(scratch, ptr) \
- lw ptr, pgd_current;
-#endif
-
-#define LOAD_PTE(pte, ptr) \
- GET_PGD(pte, ptr) \
- mfc0 pte, CP0_BADVADDR; \
- srl pte, pte, _PGDIR_SHIFT; \
- sll pte, pte, 2; \
- addu ptr, ptr, pte; \
- mfc0 pte, CP0_BADVADDR; \
- lw ptr, (ptr); \
- srl pte, pte, PTE_INDX_SHIFT; \
- and pte, pte, PTE_INDX_MSK; \
- addu ptr, ptr, pte; \
- PTE_L pte, (ptr);
-
- /* This places the even/odd pte pair in the page
- * table at PTR into ENTRYLO0 and ENTRYLO1 using
- * TMP as a scratch register.
- */
-#define PTE_RELOAD(ptr, tmp) \
- ori ptr, ptr, PTE_SIZE; \
- xori ptr, ptr, PTE_SIZE; \
- PTE_L tmp, PTE_SIZE(ptr); \
- PTE_L ptr, 0(ptr); \
- PTE_SRL tmp, tmp, 6; \
- P_MTC0 tmp, CP0_ENTRYLO1; \
- PTE_SRL ptr, ptr, 6; \
- P_MTC0 ptr, CP0_ENTRYLO0;
-
-#define DO_FAULT(write) \
- .set noat; \
- SAVE_ALL; \
- mfc0 a2, CP0_BADVADDR; \
- KMODE; \
- .set at; \
- move a0, sp; \
- jal do_page_fault; \
- li a1, write; \
- j ret_from_exception; \
- nop; \
- .set noat;
-
- /* Check is PTE is present, if not then jump to LABEL.
- * PTR points to the page table where this PTE is located,
- * when the macro is done executing PTE will be restored
- * with it's original value.
- */
-#define PTE_PRESENT(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
- bnez pte, label; \
- PTE_L pte, (ptr);
-
- /* Make PTE valid, store result in PTR. */
-#define PTE_MAKEVALID(pte, ptr) \
- ori pte, pte, (_PAGE_VALID | _PAGE_ACCESSED); \
- PTE_S pte, (ptr);
-
- /* Check if PTE can be written to, if not branch to LABEL.
- * Regardless restore PTE with value from PTR when done.
- */
-#define PTE_WRITABLE(pte, ptr, label) \
- andi pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- xori pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
- bnez pte, label; \
- PTE_L pte, (ptr);
-
- /* Make PTE writable, update software status bits as well,
- * then store at PTR.
- */
-#define PTE_MAKEWRITE(pte, ptr) \
- ori pte, pte, (_PAGE_ACCESSED | _PAGE_MODIFIED | \
- _PAGE_VALID | _PAGE_DIRTY); \
- PTE_S pte, (ptr);
-
-
- .set noreorder
-
-/*
- * From the IDT errata for the QED RM5230 (Nevada), processor revision 1.0:
- * 2. A timing hazard exists for the TLBP instruction.
- *
- * stalling_instruction
- * TLBP
- *
- * The JTLB is being read for the TLBP throughout the stall generated by the
- * previous instruction. This is not really correct as the stalling instruction
- * can modify the address used to access the JTLB. The failure symptom is that
- * the TLBP instruction will use an address created for the stalling instruction
- * and not the address held in C0_ENHI and thus report the wrong results.
- *
- * The software work-around is to not allow the instruction preceding the TLBP
- * to stall - make it an NOP or some other instruction guaranteed not to stall.
- *
- * Errata 2 will not be fixed. This errata is also on the R5000.
- *
- * As if we MIPS hackers wouldn't know how to nop pipelines happy ...
- */
-#define R5K_HAZARD nop
-
- /*
- * Note for many R4k variants tlb probes cannot be executed out
- * of the instruction cache else you get bogus results.
- */
- .align 5
- NESTED(handle_tlbl, PT_SIZE, sp)
- .set noat
-#if BCM1250_M3_WAR
- mfc0 k0, CP0_BADVADDR
- mfc0 k1, CP0_ENTRYHI
- xor k0, k1
- srl k0, k0, PAGE_SHIFT+1
- beqz k0, 1f
- nop
- .set mips3
- eret
- .set mips0
-1:
-#endif
-invalid_tlbl:
-#ifdef TLB_OPTIMIZE
- .set mips3
- /* Test present bit in entry. */
- LOAD_PTE(k0, k1)
- R5K_HAZARD
- tlbp
- PTE_PRESENT(k0, k1, nopage_tlbl)
- PTE_MAKEVALID(k0, k1)
- PTE_RELOAD(k1, k0)
- mtc0_tlbw_hazard
- tlbwi
- nop
- tlbw_eret_hazard
- .set mips3
- eret
- .set mips0
-#endif
-
-nopage_tlbl:
- DO_FAULT(0)
- END(handle_tlbl)
-
- .align 5
- NESTED(handle_tlbs, PT_SIZE, sp)
- .set noat
-#ifdef TLB_OPTIMIZE
- .set mips3
- li k0,0
- LOAD_PTE(k0, k1)
- R5K_HAZARD
- tlbp # find faulting entry
- PTE_WRITABLE(k0, k1, nopage_tlbs)
- PTE_MAKEWRITE(k0, k1)
- PTE_RELOAD(k1, k0)
- mtc0_tlbw_hazard
- tlbwi
- nop
- tlbw_eret_hazard
- .set mips3
- eret
- .set mips0
-#endif
-
-nopage_tlbs:
- DO_FAULT(1)
- END(handle_tlbs)
-
- .align 5
- NESTED(handle_mod, PT_SIZE, sp)
- .set noat
-#ifdef TLB_OPTIMIZE
- .set mips3
- LOAD_PTE(k0, k1)
- R5K_HAZARD
- tlbp # find faulting entry
- andi k0, k0, _PAGE_WRITE
- beqz k0, nowrite_mod
- PTE_L k0, (k1)
-
- /* Present and writable bits set, set accessed and dirty bits. */
- PTE_MAKEWRITE(k0, k1)
-
- /* Now reload the entry into the tlb. */
- PTE_RELOAD(k1, k0)
- mtc0_tlbw_hazard
- tlbwi
- nop
- tlbw_eret_hazard
- .set mips3
- eret
- .set mips0
-#endif
-
-nowrite_mod:
- DO_FAULT(1)
- END(handle_mod)
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Silicon Graphics, Inc.
- * Written by Ulf Carlsson (ulfc@engr.sgi.com)
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/threads.h>
-
-#include <asm/asm.h>
-#include <asm/hazards.h>
-#include <asm/regdef.h>
-#include <asm/mipsregs.h>
-#include <asm/stackframe.h>
-#include <asm/war.h>
-
-#define _VMALLOC_START 0xc000000000000000
-
- /*
- * After this macro runs we have a pointer to the pte of the address
- * that caused the fault in PTR.
- */
- .macro LOAD_PTE2, ptr, tmp, kaddr
-#ifdef CONFIG_SMP
- dmfc0 \ptr, CP0_CONTEXT
- dmfc0 \tmp, CP0_BADVADDR
- dsra \ptr, 23 # get pgd_current[cpu]
-#else
- dmfc0 \tmp, CP0_BADVADDR
- dla \ptr, pgd_current
-#endif
- bltz \tmp, \kaddr
- ld \ptr, (\ptr)
- dsrl \tmp, (_PGDIR_SHIFT-3) # get pgd offset in bytes
- andi \tmp, ((_PTRS_PER_PGD - 1)<<3)
- daddu \ptr, \tmp # add in pgd offset
- dmfc0 \tmp, CP0_BADVADDR
- ld \ptr, (\ptr) # get pmd pointer
- dsrl \tmp, (_PMD_SHIFT-3) # get pmd offset in bytes
- andi \tmp, ((_PTRS_PER_PMD - 1)<<3)
- daddu \ptr, \tmp # add in pmd offset
- dmfc0 \tmp, CP0_XCONTEXT
- ld \ptr, (\ptr) # get pte pointer
- andi \tmp, 0xff0 # get pte offset
- daddu \ptr, \tmp
- .endm
-
-
- /*
- * Ditto for the kernel table.
- */
- .macro LOAD_KPTE2, ptr, tmp, not_vmalloc
- /*
- * First, determine that the address is in/above vmalloc range.
- */
- dmfc0 \tmp, CP0_BADVADDR
- dli \ptr, _VMALLOC_START
-
- /*
- * Now find offset into kptbl.
- */
- dsubu \tmp, \tmp, \ptr
- dla \ptr, kptbl
- dsrl \tmp, (_PAGE_SHIFT+1) # get vpn2
- dsll \tmp, 4 # byte offset of pte
- daddu \ptr, \ptr, \tmp
-
- /*
- * Determine that fault address is within vmalloc range.
- */
- dla \tmp, ekptbl
- slt \tmp, \ptr, \tmp
- beqz \tmp, \not_vmalloc # not vmalloc
- nop
- .endm
-
-
- /*
- * This places the even/odd pte pair in the page table at the pte
- * entry pointed to by PTE into ENTRYLO0 and ENTRYLO1.
- */
- .macro PTE_RELOAD, pte0, pte1
- dsrl \pte0, 6 # convert to entrylo0
- dmtc0 \pte0, CP0_ENTRYLO0 # load it
- dsrl \pte1, 6 # convert to entrylo1
- dmtc0 \pte1, CP0_ENTRYLO1 # load it
- .endm
-
-
- .text
- .set noreorder
- .set mips3
-
- __INIT
-
- /*
- * TLB refill handlers for the R4000 and SB1.
- * Attention: We may only use 32 instructions / 128 bytes.
- */
- .align 5
-LEAF(except_vec1_r4k)
- .set noat
- dla k0, handle_vec1_r4k
- jr k0
- nop
-END(except_vec1_r4k)
-
-LEAF(except_vec1_sb1)
-#if BCM1250_M3_WAR
- dmfc0 k0, CP0_BADVADDR
- dmfc0 k1, CP0_ENTRYHI
- xor k0, k1
- dsrl k0, k0, _PAGE_SHIFT+1
- bnez k0, 1f
-#endif
- .set noat
- dla k0, handle_vec1_r4k
- jr k0
- nop
-
-1: eret
- nop
-END(except_vec1_sb1)
-
- __FINIT
-
- .align 5
-LEAF(handle_vec1_r4k)
- .set noat
- LOAD_PTE2 k1 k0 9f
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- mtc0_tlbw_hazard
- tlbwr
- tlbw_eret_hazard
- eret
-
-9: # handle the vmalloc range
- LOAD_KPTE2 k1 k0 invalid_vmalloc_address
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- mtc0_tlbw_hazard
- tlbwr
- tlbw_eret_hazard
- eret
-END(handle_vec1_r4k)
-
-
- __INIT
-
- /*
- * TLB refill handler for the R10000.
- * Attention: We may only use 32 instructions / 128 bytes.
- */
- .align 5
-LEAF(except_vec1_r10k)
- .set noat
- dla k0, handle_vec1_r10k
- jr k0
- nop
-END(except_vec1_r10k)
-
- __FINIT
-
- .align 5
-LEAF(handle_vec1_r10k)
- .set noat
- LOAD_PTE2 k1 k0 9f
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- nop
- tlbwr
- eret
-
-9: # handle the vmalloc range
- LOAD_KPTE2 k1 k0 invalid_vmalloc_address
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- nop
- tlbwr
- eret
-END(handle_vec1_r10k)
-
-
- .align 5
-LEAF(invalid_vmalloc_address)
- .set noat
- SAVE_ALL
- CLI
- dmfc0 t0, CP0_BADVADDR
- sd t0, PT_BVADDR(sp)
- move a0, sp
- jal show_regs
- PANIC("Invalid kernel address")
-END(invalid_vmalloc_address)
+++ /dev/null
-/*
- * Copyright 2002 Momentum Computer Inc.
- * Author: Matthew Dharm <mdharm@momenco.com>
- *
- * Based on work for the Linux port to the Ocelot board, which is
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * arch/mips/momentum/ocelot_g/pci.c
- * Board-specific PCI routines for mv64340 controller.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <asm/pci.h>
-
-
-void __init mv64340_board_pcibios_fixup_bus(struct pci_bus *bus)
-{
- struct pci_bus *current_bus = bus;
- struct pci_dev *devices;
- struct list_head *devices_link;
- u16 cmd;
-
- /* loop over all known devices on this bus */
- list_for_each(devices_link, &(current_bus->devices)) {
-
- devices = pci_dev_b(devices_link);
- if (devices == NULL)
- continue;
-
- if ((current_bus->number == 0) &&
- (PCI_SLOT(devices->devfn) == 1) &&
- (PCI_FUNC(devices->devfn) == 0)) {
- /* LSI 53C10101R SCSI (A) */
- devices->irq = 2;
- } else if ((current_bus->number == 0) &&
- (PCI_SLOT(devices->devfn) == 1) &&
- (PCI_FUNC(devices->devfn) == 1)) {
- /* LSI 53C10101R SCSI (B) */
- devices->irq = 2;
- } else if ((current_bus->number == 1) &&
- (PCI_SLOT(devices->devfn) == 1)) {
- /* Intel 21555 bridge */
- devices->irq = 12;
- } else if ((current_bus->number == 1) &&
- (PCI_SLOT(devices->devfn) == 2)) {
- /* PMC Slot */
- devices->irq = 4;
- } else {
- /* We don't have assign interrupts for other devices. */
- devices->irq = 0xff;
- }
-
- /* Assign an interrupt number for the device */
- bus->ops->write_byte(devices, PCI_INTERRUPT_LINE, devices->irq);
-
- /* enable master for everything but the MV-64340 */
- if (((current_bus->number != 0) && (current_bus->number != 1))
- || (PCI_SLOT(devices->devfn) != 0)) {
- bus->ops->read_word(devices, PCI_COMMAND, &cmd);
- cmd |= PCI_COMMAND_MASTER;
- bus->ops->write_word(devices, PCI_COMMAND, cmd);
- }
- }
-}
+++ /dev/null
-/* gt64240r.h - GT-64240 Internal registers definition file */
-
-/* Copyright - Galileo technology. */
-
-#ifndef __INCgt64240rh
-#define __INCgt64240rh
-
-#define GTREG(v) (((v) & 0xff) << 24) | (((v) & 0xff00) << 8) | \
- (((v) >> 24) & 0xff) | (((v) >> 8) & 0xff00)
-
-#if 0
-#define GTREG_SHORT(X) (((X) << 8) | ((X) >> 8))
-
-#define LONG_GTREG(X) ((l64) \
- (((X)&0x00000000000000ffULL) << 56) | \
- (((X)&0x000000000000ff00ULL) << 40) | \
- (((X)&0x0000000000ff0000ULL) << 24) | \
- (((X)&0x00000000ff000000ULL) << 8) | \
- (((X)&0x000000ff00000000ULL) >> 8) | \
- (((X)&0x0000ff0000000000ULL) >> 24) | \
- (((X)&0x00ff000000000000ULL) >> 40) | \
- (((X)&0xff00000000000000ULL) >> 56))
-#endif
-
-#include "gt64240_dep.h"
-
-/****************************************/
-/* CPU Control Registers */
-/****************************************/
-
-#define CPU_CONFIGURATION 0x000
-#define CPU_MODE 0x120
-#define CPU_READ_RESPONSE_CROSSBAR_LOW 0x170
-#define CPU_READ_RESPONSE_CROSSBAR_HIGH 0x178
-
-/****************************************/
-/* Processor Address Space */
-/****************************************/
-
-/* Sdram's BAR'S */
-#define SCS_0_LOW_DECODE_ADDRESS 0x008
-#define SCS_0_HIGH_DECODE_ADDRESS 0x010
-#define SCS_1_LOW_DECODE_ADDRESS 0x208
-#define SCS_1_HIGH_DECODE_ADDRESS 0x210
-#define SCS_2_LOW_DECODE_ADDRESS 0x018
-#define SCS_2_HIGH_DECODE_ADDRESS 0x020
-#define SCS_3_LOW_DECODE_ADDRESS 0x218
-#define SCS_3_HIGH_DECODE_ADDRESS 0x220
-/* Devices BAR'S */
-#define CS_0_LOW_DECODE_ADDRESS 0x028
-#define CS_0_HIGH_DECODE_ADDRESS 0x030
-#define CS_1_LOW_DECODE_ADDRESS 0x228
-#define CS_1_HIGH_DECODE_ADDRESS 0x230
-#define CS_2_LOW_DECODE_ADDRESS 0x248
-#define CS_2_HIGH_DECODE_ADDRESS 0x250
-#define CS_3_LOW_DECODE_ADDRESS 0x038
-#define CS_3_HIGH_DECODE_ADDRESS 0x040
-#define BOOTCS_LOW_DECODE_ADDRESS 0x238
-#define BOOTCS_HIGH_DECODE_ADDRESS 0x240
-
-#define PCI_0I_O_LOW_DECODE_ADDRESS 0x048
-#define PCI_0I_O_HIGH_DECODE_ADDRESS 0x050
-#define PCI_0MEMORY0_LOW_DECODE_ADDRESS 0x058
-#define PCI_0MEMORY0_HIGH_DECODE_ADDRESS 0x060
-#define PCI_0MEMORY1_LOW_DECODE_ADDRESS 0x080
-#define PCI_0MEMORY1_HIGH_DECODE_ADDRESS 0x088
-#define PCI_0MEMORY2_LOW_DECODE_ADDRESS 0x258
-#define PCI_0MEMORY2_HIGH_DECODE_ADDRESS 0x260
-#define PCI_0MEMORY3_LOW_DECODE_ADDRESS 0x280
-#define PCI_0MEMORY3_HIGH_DECODE_ADDRESS 0x288
-
-#define PCI_1I_O_LOW_DECODE_ADDRESS 0x090
-#define PCI_1I_O_HIGH_DECODE_ADDRESS 0x098
-#define PCI_1MEMORY0_LOW_DECODE_ADDRESS 0x0a0
-#define PCI_1MEMORY0_HIGH_DECODE_ADDRESS 0x0a8
-#define PCI_1MEMORY1_LOW_DECODE_ADDRESS 0x0b0
-#define PCI_1MEMORY1_HIGH_DECODE_ADDRESS 0x0b8
-#define PCI_1MEMORY2_LOW_DECODE_ADDRESS 0x2a0
-#define PCI_1MEMORY2_HIGH_DECODE_ADDRESS 0x2a8
-#define PCI_1MEMORY3_LOW_DECODE_ADDRESS 0x2b0
-#define PCI_1MEMORY3_HIGH_DECODE_ADDRESS 0x2b8
-
-#define INTERNAL_SPACE_DECODE 0x068
-
-#define CPU_0_LOW_DECODE_ADDRESS 0x290
-#define CPU_0_HIGH_DECODE_ADDRESS 0x298
-#define CPU_1_LOW_DECODE_ADDRESS 0x2c0
-#define CPU_1_HIGH_DECODE_ADDRESS 0x2c8
-
-#define PCI_0I_O_ADDRESS_REMAP 0x0f0
-#define PCI_0MEMORY0_ADDRESS_REMAP 0x0f8
-#define PCI_0MEMORY0_HIGH_ADDRESS_REMAP 0x320
-#define PCI_0MEMORY1_ADDRESS_REMAP 0x100
-#define PCI_0MEMORY1_HIGH_ADDRESS_REMAP 0x328
-#define PCI_0MEMORY2_ADDRESS_REMAP 0x2f8
-#define PCI_0MEMORY2_HIGH_ADDRESS_REMAP 0x330
-#define PCI_0MEMORY3_ADDRESS_REMAP 0x300
-#define PCI_0MEMORY3_HIGH_ADDRESS_REMAP 0x338
-
-#define PCI_1I_O_ADDRESS_REMAP 0x108
-#define PCI_1MEMORY0_ADDRESS_REMAP 0x110
-#define PCI_1MEMORY0_HIGH_ADDRESS_REMAP 0x340
-#define PCI_1MEMORY1_ADDRESS_REMAP 0x118
-#define PCI_1MEMORY1_HIGH_ADDRESS_REMAP 0x348
-#define PCI_1MEMORY2_ADDRESS_REMAP 0x310
-#define PCI_1MEMORY2_HIGH_ADDRESS_REMAP 0x350
-#define PCI_1MEMORY3_ADDRESS_REMAP 0x318
-#define PCI_1MEMORY3_HIGH_ADDRESS_REMAP 0x358
-
-/****************************************/
-/* CPU Sync Barrier */
-/****************************************/
-
-#define PCI_0SYNC_BARIER_VIRTUAL_REGISTER 0x0c0
-#define PCI_1SYNC_BARIER_VIRTUAL_REGISTER 0x0c8
-
-
-/****************************************/
-/* CPU Access Protect */
-/****************************************/
-
-#define CPU_LOW_PROTECT_ADDRESS_0 0X180
-#define CPU_HIGH_PROTECT_ADDRESS_0 0X188
-#define CPU_LOW_PROTECT_ADDRESS_1 0X190
-#define CPU_HIGH_PROTECT_ADDRESS_1 0X198
-#define CPU_LOW_PROTECT_ADDRESS_2 0X1a0
-#define CPU_HIGH_PROTECT_ADDRESS_2 0X1a8
-#define CPU_LOW_PROTECT_ADDRESS_3 0X1b0
-#define CPU_HIGH_PROTECT_ADDRESS_3 0X1b8
-#define CPU_LOW_PROTECT_ADDRESS_4 0X1c0
-#define CPU_HIGH_PROTECT_ADDRESS_4 0X1c8
-#define CPU_LOW_PROTECT_ADDRESS_5 0X1d0
-#define CPU_HIGH_PROTECT_ADDRESS_5 0X1d8
-#define CPU_LOW_PROTECT_ADDRESS_6 0X1e0
-#define CPU_HIGH_PROTECT_ADDRESS_6 0X1e8
-#define CPU_LOW_PROTECT_ADDRESS_7 0X1f0
-#define CPU_HIGH_PROTECT_ADDRESS_7 0X1f8
-
-
-/****************************************/
-/* Snoop Control */
-/****************************************/
-
-#define SNOOP_BASE_ADDRESS_0 0x380
-#define SNOOP_TOP_ADDRESS_0 0x388
-#define SNOOP_BASE_ADDRESS_1 0x390
-#define SNOOP_TOP_ADDRESS_1 0x398
-#define SNOOP_BASE_ADDRESS_2 0x3a0
-#define SNOOP_TOP_ADDRESS_2 0x3a8
-#define SNOOP_BASE_ADDRESS_3 0x3b0
-#define SNOOP_TOP_ADDRESS_3 0x3b8
-
-/****************************************/
-/* CPU Error Report */
-/****************************************/
-
-#define CPU_ERROR_ADDRESS_LOW 0x070
-#define CPU_ERROR_ADDRESS_HIGH 0x078
-#define CPU_ERROR_DATA_LOW 0x128
-#define CPU_ERROR_DATA_HIGH 0x130
-#define CPU_ERROR_PARITY 0x138
-#define CPU_ERROR_CAUSE 0x140
-#define CPU_ERROR_MASK 0x148
-
-/****************************************/
-/* Pslave Debug */
-/****************************************/
-
-#define X_0_ADDRESS 0x360
-#define X_0_COMMAND_ID 0x368
-#define X_1_ADDRESS 0x370
-#define X_1_COMMAND_ID 0x378
-#define WRITE_DATA_LOW 0x3c0
-#define WRITE_DATA_HIGH 0x3c8
-#define WRITE_BYTE_ENABLE 0X3e0
-#define READ_DATA_LOW 0x3d0
-#define READ_DATA_HIGH 0x3d8
-#define READ_ID 0x3e8
-
-
-/****************************************/
-/* SDRAM and Device Address Space */
-/****************************************/
-
-
-/****************************************/
-/* SDRAM Configuration */
-/****************************************/
-
-#define SDRAM_CONFIGURATION 0x448
-#define SDRAM_OPERATION_MODE 0x474
-#define SDRAM_ADDRESS_DECODE 0x47C
-#define SDRAM_TIMING_PARAMETERS 0x4b4
-#define SDRAM_UMA_CONTROL 0x4a4
-#define SDRAM_CROSS_BAR_CONTROL_LOW 0x4a8
-#define SDRAM_CROSS_BAR_CONTROL_HIGH 0x4ac
-#define SDRAM_CROSS_BAR_TIMEOUT 0x4b0
-
-
-/****************************************/
-/* SDRAM Parameters */
-/****************************************/
-
-#define SDRAM_BANK0PARAMETERS 0x44C
-#define SDRAM_BANK1PARAMETERS 0x450
-#define SDRAM_BANK2PARAMETERS 0x454
-#define SDRAM_BANK3PARAMETERS 0x458
-
-
-/****************************************/
-/* SDRAM Error Report */
-/****************************************/
-
-#define SDRAM_ERROR_DATA_LOW 0x484
-#define SDRAM_ERROR_DATA_HIGH 0x480
-#define SDRAM_AND_DEVICE_ERROR_ADDRESS 0x490
-#define SDRAM_RECEIVED_ECC 0x488
-#define SDRAM_CALCULATED_ECC 0x48c
-#define SDRAM_ECC_CONTROL 0x494
-#define SDRAM_ECC_ERROR_COUNTER 0x498
-
-
-/****************************************/
-/* SDunit Debug (for internal use) */
-/****************************************/
-
-#define X0_ADDRESS 0x500
-#define X0_COMMAND_AND_ID 0x504
-#define X0_WRITE_DATA_LOW 0x508
-#define X0_WRITE_DATA_HIGH 0x50c
-#define X0_WRITE_BYTE_ENABLE 0x518
-#define X0_READ_DATA_LOW 0x510
-#define X0_READ_DATA_HIGH 0x514
-#define X0_READ_ID 0x51c
-#define X1_ADDRESS 0x520
-#define X1_COMMAND_AND_ID 0x524
-#define X1_WRITE_DATA_LOW 0x528
-#define X1_WRITE_DATA_HIGH 0x52c
-#define X1_WRITE_BYTE_ENABLE 0x538
-#define X1_READ_DATA_LOW 0x530
-#define X1_READ_DATA_HIGH 0x534
-#define X1_READ_ID 0x53c
-#define X0_SNOOP_ADDRESS 0x540
-#define X0_SNOOP_COMMAND 0x544
-#define X1_SNOOP_ADDRESS 0x548
-#define X1_SNOOP_COMMAND 0x54c
-
-
-/****************************************/
-/* Device Parameters */
-/****************************************/
-
-#define DEVICE_BANK0PARAMETERS 0x45c
-#define DEVICE_BANK1PARAMETERS 0x460
-#define DEVICE_BANK2PARAMETERS 0x464
-#define DEVICE_BANK3PARAMETERS 0x468
-#define DEVICE_BOOT_BANK_PARAMETERS 0x46c
-#define DEVICE_CONTROL 0x4c0
-#define DEVICE_CROSS_BAR_CONTROL_LOW 0x4c8
-#define DEVICE_CROSS_BAR_CONTROL_HIGH 0x4cc
-#define DEVICE_CROSS_BAR_TIMEOUT 0x4c4
-
-
-/****************************************/
-/* Device Interrupt */
-/****************************************/
-
-#define DEVICE_INTERRUPT_CAUSE 0x4d0
-#define DEVICE_INTERRUPT_MASK 0x4d4
-#define DEVICE_ERROR_ADDRESS 0x4d8
-
-/****************************************/
-/* DMA Record */
-/****************************************/
-
-#define CHANNEL0_DMA_BYTE_COUNT 0x800
-#define CHANNEL1_DMA_BYTE_COUNT 0x804
-#define CHANNEL2_DMA_BYTE_COUNT 0x808
-#define CHANNEL3_DMA_BYTE_COUNT 0x80C
-#define CHANNEL4_DMA_BYTE_COUNT 0x900
-#define CHANNEL5_DMA_BYTE_COUNT 0x904
-#define CHANNEL6_DMA_BYTE_COUNT 0x908
-#define CHANNEL7_DMA_BYTE_COUNT 0x90C
-#define CHANNEL0_DMA_SOURCE_ADDRESS 0x810
-#define CHANNEL1_DMA_SOURCE_ADDRESS 0x814
-#define CHANNEL2_DMA_SOURCE_ADDRESS 0x818
-#define CHANNEL3_DMA_SOURCE_ADDRESS 0x81C
-#define CHANNEL4_DMA_SOURCE_ADDRESS 0x910
-#define CHANNEL5_DMA_SOURCE_ADDRESS 0x914
-#define CHANNEL6_DMA_SOURCE_ADDRESS 0x918
-#define CHANNEL7_DMA_SOURCE_ADDRESS 0x91C
-#define CHANNEL0_DMA_DESTINATION_ADDRESS 0x820
-#define CHANNEL1_DMA_DESTINATION_ADDRESS 0x824
-#define CHANNEL2_DMA_DESTINATION_ADDRESS 0x828
-#define CHANNEL3_DMA_DESTINATION_ADDRESS 0x82C
-#define CHANNEL4_DMA_DESTINATION_ADDRESS 0x920
-#define CHANNEL5_DMA_DESTINATION_ADDRESS 0x924
-#define CHANNEL6_DMA_DESTINATION_ADDRESS 0x928
-#define CHANNEL7_DMA_DESTINATION_ADDRESS 0x92C
-#define CHANNEL0NEXT_RECORD_POINTER 0x830
-#define CHANNEL1NEXT_RECORD_POINTER 0x834
-#define CHANNEL2NEXT_RECORD_POINTER 0x838
-#define CHANNEL3NEXT_RECORD_POINTER 0x83C
-#define CHANNEL4NEXT_RECORD_POINTER 0x930
-#define CHANNEL5NEXT_RECORD_POINTER 0x934
-#define CHANNEL6NEXT_RECORD_POINTER 0x938
-#define CHANNEL7NEXT_RECORD_POINTER 0x93C
-#define CHANNEL0CURRENT_DESCRIPTOR_POINTER 0x870
-#define CHANNEL1CURRENT_DESCRIPTOR_POINTER 0x874
-#define CHANNEL2CURRENT_DESCRIPTOR_POINTER 0x878
-#define CHANNEL3CURRENT_DESCRIPTOR_POINTER 0x87C
-#define CHANNEL4CURRENT_DESCRIPTOR_POINTER 0x970
-#define CHANNEL5CURRENT_DESCRIPTOR_POINTER 0x974
-#define CHANNEL6CURRENT_DESCRIPTOR_POINTER 0x978
-#define CHANNEL7CURRENT_DESCRIPTOR_POINTER 0x97C
-#define CHANNEL0_DMA_SOURCE_HIGH_PCI_ADDRESS 0x890
-#define CHANNEL1_DMA_SOURCE_HIGH_PCI_ADDRESS 0x894
-#define CHANNEL2_DMA_SOURCE_HIGH_PCI_ADDRESS 0x898
-#define CHANNEL3_DMA_SOURCE_HIGH_PCI_ADDRESS 0x89c
-#define CHANNEL4_DMA_SOURCE_HIGH_PCI_ADDRESS 0x990
-#define CHANNEL5_DMA_SOURCE_HIGH_PCI_ADDRESS 0x994
-#define CHANNEL6_DMA_SOURCE_HIGH_PCI_ADDRESS 0x998
-#define CHANNEL7_DMA_SOURCE_HIGH_PCI_ADDRESS 0x99c
-#define CHANNEL0_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a0
-#define CHANNEL1_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a4
-#define CHANNEL2_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a8
-#define CHANNEL3_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8ac
-#define CHANNEL4_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a0
-#define CHANNEL5_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a4
-#define CHANNEL6_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a8
-#define CHANNEL7_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9ac
-#define CHANNEL0_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b0
-#define CHANNEL1_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b4
-#define CHANNEL2_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b8
-#define CHANNEL3_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8bc
-#define CHANNEL4_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b0
-#define CHANNEL5_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b4
-#define CHANNEL6_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b8
-#define CHANNEL7_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9bc
-
-/****************************************/
-/* DMA Channel Control */
-/****************************************/
-
-#define CHANNEL0CONTROL 0x840
-#define CHANNEL0CONTROL_HIGH 0x880
-
-#define CHANNEL1CONTROL 0x844
-#define CHANNEL1CONTROL_HIGH 0x884
-
-#define CHANNEL2CONTROL 0x848
-#define CHANNEL2CONTROL_HIGH 0x888
-
-#define CHANNEL3CONTROL 0x84C
-#define CHANNEL3CONTROL_HIGH 0x88C
-
-#define CHANNEL4CONTROL 0x940
-#define CHANNEL4CONTROL_HIGH 0x980
-
-#define CHANNEL5CONTROL 0x944
-#define CHANNEL5CONTROL_HIGH 0x984
-
-#define CHANNEL6CONTROL 0x948
-#define CHANNEL6CONTROL_HIGH 0x988
-
-#define CHANNEL7CONTROL 0x94C
-#define CHANNEL7CONTROL_HIGH 0x98C
-
-
-/****************************************/
-/* DMA Arbiter */
-/****************************************/
-
-#define ARBITER_CONTROL_0_3 0x860
-#define ARBITER_CONTROL_4_7 0x960
-
-
-/****************************************/
-/* DMA Interrupt */
-/****************************************/
-
-#define CHANELS0_3_INTERRUPT_CAUSE 0x8c0
-#define CHANELS0_3_INTERRUPT_MASK 0x8c4
-#define CHANELS0_3_ERROR_ADDRESS 0x8c8
-#define CHANELS0_3_ERROR_SELECT 0x8cc
-#define CHANELS4_7_INTERRUPT_CAUSE 0x9c0
-#define CHANELS4_7_INTERRUPT_MASK 0x9c4
-#define CHANELS4_7_ERROR_ADDRESS 0x9c8
-#define CHANELS4_7_ERROR_SELECT 0x9cc
-
-
-/****************************************/
-/* DMA Debug (for internal use) */
-/****************************************/
-
-#define DMA_X0_ADDRESS 0x8e0
-#define DMA_X0_COMMAND_AND_ID 0x8e4
-#define DMA_X0_WRITE_DATA_LOW 0x8e8
-#define DMA_X0_WRITE_DATA_HIGH 0x8ec
-#define DMA_X0_WRITE_BYTE_ENABLE 0x8f8
-#define DMA_X0_READ_DATA_LOW 0x8f0
-#define DMA_X0_READ_DATA_HIGH 0x8f4
-#define DMA_X0_READ_ID 0x8fc
-#define DMA_X1_ADDRESS 0x9e0
-#define DMA_X1_COMMAND_AND_ID 0x9e4
-#define DMA_X1_WRITE_DATA_LOW 0x9e8
-#define DMA_X1_WRITE_DATA_HIGH 0x9ec
-#define DMA_X1_WRITE_BYTE_ENABLE 0x9f8
-#define DMA_X1_READ_DATA_LOW 0x9f0
-#define DMA_X1_READ_DATA_HIGH 0x9f4
-#define DMA_X1_READ_ID 0x9fc
-
-/****************************************/
-/* Timer_Counter */
-/****************************************/
-
-#define TIMER_COUNTER0 0x850
-#define TIMER_COUNTER1 0x854
-#define TIMER_COUNTER2 0x858
-#define TIMER_COUNTER3 0x85C
-#define TIMER_COUNTER_0_3_CONTROL 0x864
-#define TIMER_COUNTER_0_3_INTERRUPT_CAUSE 0x868
-#define TIMER_COUNTER_0_3_INTERRUPT_MASK 0x86c
-#define TIMER_COUNTER4 0x950
-#define TIMER_COUNTER5 0x954
-#define TIMER_COUNTER6 0x958
-#define TIMER_COUNTER7 0x95C
-#define TIMER_COUNTER_4_7_CONTROL 0x964
-#define TIMER_COUNTER_4_7_INTERRUPT_CAUSE 0x968
-#define TIMER_COUNTER_4_7_INTERRUPT_MASK 0x96c
-
-/****************************************/
-/* PCI Slave Address Decoding */
-/****************************************/
-
-#define PCI_0SCS_0_BANK_SIZE 0xc08
-#define PCI_1SCS_0_BANK_SIZE 0xc88
-#define PCI_0SCS_1_BANK_SIZE 0xd08
-#define PCI_1SCS_1_BANK_SIZE 0xd88
-#define PCI_0SCS_2_BANK_SIZE 0xc0c
-#define PCI_1SCS_2_BANK_SIZE 0xc8c
-#define PCI_0SCS_3_BANK_SIZE 0xd0c
-#define PCI_1SCS_3_BANK_SIZE 0xd8c
-#define PCI_0CS_0_BANK_SIZE 0xc10
-#define PCI_1CS_0_BANK_SIZE 0xc90
-#define PCI_0CS_1_BANK_SIZE 0xd10
-#define PCI_1CS_1_BANK_SIZE 0xd90
-#define PCI_0CS_2_BANK_SIZE 0xd18
-#define PCI_1CS_2_BANK_SIZE 0xd98
-#define PCI_0CS_3_BANK_SIZE 0xc14
-#define PCI_1CS_3_BANK_SIZE 0xc94
-#define PCI_0CS_BOOT_BANK_SIZE 0xd14
-#define PCI_1CS_BOOT_BANK_SIZE 0xd94
-#define PCI_0P2P_MEM0_BAR_SIZE 0xd1c
-#define PCI_1P2P_MEM0_BAR_SIZE 0xd9c
-#define PCI_0P2P_MEM1_BAR_SIZE 0xd20
-#define PCI_1P2P_MEM1_BAR_SIZE 0xda0
-#define PCI_0P2P_I_O_BAR_SIZE 0xd24
-#define PCI_1P2P_I_O_BAR_SIZE 0xda4
-#define PCI_0CPU_BAR_SIZE 0xd28
-#define PCI_1CPU_BAR_SIZE 0xda8
-#define PCI_0DAC_SCS_0_BANK_SIZE 0xe00
-#define PCI_1DAC_SCS_0_BANK_SIZE 0xe80
-#define PCI_0DAC_SCS_1_BANK_SIZE 0xe04
-#define PCI_1DAC_SCS_1_BANK_SIZE 0xe84
-#define PCI_0DAC_SCS_2_BANK_SIZE 0xe08
-#define PCI_1DAC_SCS_2_BANK_SIZE 0xe88
-#define PCI_0DAC_SCS_3_BANK_SIZE 0xe0c
-#define PCI_1DAC_SCS_3_BANK_SIZE 0xe8c
-#define PCI_0DAC_CS_0_BANK_SIZE 0xe10
-#define PCI_1DAC_CS_0_BANK_SIZE 0xe90
-#define PCI_0DAC_CS_1_BANK_SIZE 0xe14
-#define PCI_1DAC_CS_1_BANK_SIZE 0xe94
-#define PCI_0DAC_CS_2_BANK_SIZE 0xe18
-#define PCI_1DAC_CS_2_BANK_SIZE 0xe98
-#define PCI_0DAC_CS_3_BANK_SIZE 0xe1c
-#define PCI_1DAC_CS_3_BANK_SIZE 0xe9c
-#define PCI_0DAC_BOOTCS_BANK_SIZE 0xe20
-#define PCI_1DAC_BOOTCS_BANK_SIZE 0xea0
-#define PCI_0DAC_P2P_MEM0_BAR_SIZE 0xe24
-#define PCI_1DAC_P2P_MEM0_BAR_SIZE 0xea4
-#define PCI_0DAC_P2P_MEM1_BAR_SIZE 0xe28
-#define PCI_1DAC_P2P_MEM1_BAR_SIZE 0xea8
-#define PCI_0DAC_CPU_BAR_SIZE 0xe2c
-#define PCI_1DAC_CPU_BAR_SIZE 0xeac
-#define PCI_0EXPANSION_ROM_BAR_SIZE 0xd2c
-#define PCI_1EXPANSION_ROM_BAR_SIZE 0xdac
-#define PCI_0BASE_ADDRESS_REGISTERS_ENABLE 0xc3c
-#define PCI_1BASE_ADDRESS_REGISTERS_ENABLE 0xcbc
-#define PCI_0SCS_0_BASE_ADDRESS_REMAP 0xc48
-#define PCI_1SCS_0_BASE_ADDRESS_REMAP 0xcc8
-#define PCI_0SCS_1_BASE_ADDRESS_REMAP 0xd48
-#define PCI_1SCS_1_BASE_ADDRESS_REMAP 0xdc8
-#define PCI_0SCS_2_BASE_ADDRESS_REMAP 0xc4c
-#define PCI_1SCS_2_BASE_ADDRESS_REMAP 0xccc
-#define PCI_0SCS_3_BASE_ADDRESS_REMAP 0xd4c
-#define PCI_1SCS_3_BASE_ADDRESS_REMAP 0xdcc
-#define PCI_0CS_0_BASE_ADDRESS_REMAP 0xc50
-#define PCI_1CS_0_BASE_ADDRESS_REMAP 0xcd0
-#define PCI_0CS_1_BASE_ADDRESS_REMAP 0xd50
-#define PCI_1CS_1_BASE_ADDRESS_REMAP 0xdd0
-#define PCI_0CS_2_BASE_ADDRESS_REMAP 0xd58
-#define PCI_1CS_2_BASE_ADDRESS_REMAP 0xdd8
-#define PCI_0CS_3_BASE_ADDRESS_REMAP 0xc54
-#define PCI_1CS_3_BASE_ADDRESS_REMAP 0xcd4
-#define PCI_0CS_BOOTCS_BASE_ADDRESS_REMAP 0xd54
-#define PCI_1CS_BOOTCS_BASE_ADDRESS_REMAP 0xdd4
-#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xd5c
-#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xddc
-#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xd60
-#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xde0
-#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xd64
-#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xde4
-#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xd68
-#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xde8
-#define PCI_0P2P_I_O_BASE_ADDRESS_REMAP 0xd6c
-#define PCI_1P2P_I_O_BASE_ADDRESS_REMAP 0xdec
-#define PCI_0CPU_BASE_ADDRESS_REMAP 0xd70
-#define PCI_1CPU_BASE_ADDRESS_REMAP 0xdf0
-#define PCI_0DAC_SCS_0_BASE_ADDRESS_REMAP 0xf00
-#define PCI_1DAC_SCS_0_BASE_ADDRESS_REMAP 0xff0
-#define PCI_0DAC_SCS_1_BASE_ADDRESS_REMAP 0xf04
-#define PCI_1DAC_SCS_1_BASE_ADDRESS_REMAP 0xf84
-#define PCI_0DAC_SCS_2_BASE_ADDRESS_REMAP 0xf08
-#define PCI_1DAC_SCS_2_BASE_ADDRESS_REMAP 0xf88
-#define PCI_0DAC_SCS_3_BASE_ADDRESS_REMAP 0xf0c
-#define PCI_1DAC_SCS_3_BASE_ADDRESS_REMAP 0xf8c
-#define PCI_0DAC_CS_0_BASE_ADDRESS_REMAP 0xf10
-#define PCI_1DAC_CS_0_BASE_ADDRESS_REMAP 0xf90
-#define PCI_0DAC_CS_1_BASE_ADDRESS_REMAP 0xf14
-#define PCI_1DAC_CS_1_BASE_ADDRESS_REMAP 0xf94
-#define PCI_0DAC_CS_2_BASE_ADDRESS_REMAP 0xf18
-#define PCI_1DAC_CS_2_BASE_ADDRESS_REMAP 0xf98
-#define PCI_0DAC_CS_3_BASE_ADDRESS_REMAP 0xf1c
-#define PCI_1DAC_CS_3_BASE_ADDRESS_REMAP 0xf9c
-#define PCI_0DAC_BOOTCS_BASE_ADDRESS_REMAP 0xf20
-#define PCI_1DAC_BOOTCS_BASE_ADDRESS_REMAP 0xfa0
-#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xf24
-#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xfa4
-#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xf28
-#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xfa8
-#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xf2c
-#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xfac
-#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xf30
-#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xfb0
-#define PCI_0DAC_CPU_BASE_ADDRESS_REMAP 0xf34
-#define PCI_1DAC_CPU_BASE_ADDRESS_REMAP 0xfb4
-#define PCI_0EXPANSION_ROM_BASE_ADDRESS_REMAP 0xf38
-#define PCI_1EXPANSION_ROM_BASE_ADDRESS_REMAP 0xfb8
-#define PCI_0ADDRESS_DECODE_CONTROL 0xd3c
-#define PCI_1ADDRESS_DECODE_CONTROL 0xdbc
-
-/****************************************/
-/* PCI Control */
-/****************************************/
-
-#define PCI_0COMMAND 0xc00
-#define PCI_1COMMAND 0xc80
-#define PCI_0MODE 0xd00
-#define PCI_1MODE 0xd80
-#define PCI_0TIMEOUT_RETRY 0xc04
-#define PCI_1TIMEOUT_RETRY 0xc84
-#define PCI_0READ_BUFFER_DISCARD_TIMER 0xd04
-#define PCI_1READ_BUFFER_DISCARD_TIMER 0xd84
-#define MSI_0TRIGGER_TIMER 0xc38
-#define MSI_1TRIGGER_TIMER 0xcb8
-#define PCI_0ARBITER_CONTROL 0x1d00
-#define PCI_1ARBITER_CONTROL 0x1d80
-/* changing untill here */
-#define PCI_0CROSS_BAR_CONTROL_LOW 0x1d08
-#define PCI_0CROSS_BAR_CONTROL_HIGH 0x1d0c
-#define PCI_0CROSS_BAR_TIMEOUT 0x1d04
-#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_LOW 0x1d18
-#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_HIGH 0x1d1c
-#define PCI_0SYNC_BARRIER_VIRTUAL_REGISTER 0x1d10
-#define PCI_0P2P_CONFIGURATION 0x1d14
-#define PCI_0ACCESS_CONTROL_BASE_0_LOW 0x1e00
-#define PCI_0ACCESS_CONTROL_BASE_0_HIGH 0x1e04
-#define PCI_0ACCESS_CONTROL_TOP_0 0x1e08
-#define PCI_0ACCESS_CONTROL_BASE_1_LOW 0c1e10
-#define PCI_0ACCESS_CONTROL_BASE_1_HIGH 0x1e14
-#define PCI_0ACCESS_CONTROL_TOP_1 0x1e18
-#define PCI_0ACCESS_CONTROL_BASE_2_LOW 0c1e20
-#define PCI_0ACCESS_CONTROL_BASE_2_HIGH 0x1e24
-#define PCI_0ACCESS_CONTROL_TOP_2 0x1e28
-#define PCI_0ACCESS_CONTROL_BASE_3_LOW 0c1e30
-#define PCI_0ACCESS_CONTROL_BASE_3_HIGH 0x1e34
-#define PCI_0ACCESS_CONTROL_TOP_3 0x1e38
-#define PCI_0ACCESS_CONTROL_BASE_4_LOW 0c1e40
-#define PCI_0ACCESS_CONTROL_BASE_4_HIGH 0x1e44
-#define PCI_0ACCESS_CONTROL_TOP_4 0x1e48
-#define PCI_0ACCESS_CONTROL_BASE_5_LOW 0c1e50
-#define PCI_0ACCESS_CONTROL_BASE_5_HIGH 0x1e54
-#define PCI_0ACCESS_CONTROL_TOP_5 0x1e58
-#define PCI_0ACCESS_CONTROL_BASE_6_LOW 0c1e60
-#define PCI_0ACCESS_CONTROL_BASE_6_HIGH 0x1e64
-#define PCI_0ACCESS_CONTROL_TOP_6 0x1e68
-#define PCI_0ACCESS_CONTROL_BASE_7_LOW 0c1e70
-#define PCI_0ACCESS_CONTROL_BASE_7_HIGH 0x1e74
-#define PCI_0ACCESS_CONTROL_TOP_7 0x1e78
-#define PCI_1CROSS_BAR_CONTROL_LOW 0x1d88
-#define PCI_1CROSS_BAR_CONTROL_HIGH 0x1d8c
-#define PCI_1CROSS_BAR_TIMEOUT 0x1d84
-#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_LOW 0x1d98
-#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_HIGH 0x1d9c
-#define PCI_1SYNC_BARRIER_VIRTUAL_REGISTER 0x1d90
-#define PCI_1P2P_CONFIGURATION 0x1d94
-#define PCI_1ACCESS_CONTROL_BASE_0_LOW 0x1e80
-#define PCI_1ACCESS_CONTROL_BASE_0_HIGH 0x1e84
-#define PCI_1ACCESS_CONTROL_TOP_0 0x1e88
-#define PCI_1ACCESS_CONTROL_BASE_1_LOW 0c1e90
-#define PCI_1ACCESS_CONTROL_BASE_1_HIGH 0x1e94
-#define PCI_1ACCESS_CONTROL_TOP_1 0x1e98
-#define PCI_1ACCESS_CONTROL_BASE_2_LOW 0c1ea0
-#define PCI_1ACCESS_CONTROL_BASE_2_HIGH 0x1ea4
-#define PCI_1ACCESS_CONTROL_TOP_2 0x1ea8
-#define PCI_1ACCESS_CONTROL_BASE_3_LOW 0c1eb0
-#define PCI_1ACCESS_CONTROL_BASE_3_HIGH 0x1eb4
-#define PCI_1ACCESS_CONTROL_TOP_3 0x1eb8
-#define PCI_1ACCESS_CONTROL_BASE_4_LOW 0c1ec0
-#define PCI_1ACCESS_CONTROL_BASE_4_HIGH 0x1ec4
-#define PCI_1ACCESS_CONTROL_TOP_4 0x1ec8
-#define PCI_1ACCESS_CONTROL_BASE_5_LOW 0c1ed0
-#define PCI_1ACCESS_CONTROL_BASE_5_HIGH 0x1ed4
-#define PCI_1ACCESS_CONTROL_TOP_5 0x1ed8
-#define PCI_1ACCESS_CONTROL_BASE_6_LOW 0c1ee0
-#define PCI_1ACCESS_CONTROL_BASE_6_HIGH 0x1ee4
-#define PCI_1ACCESS_CONTROL_TOP_6 0x1ee8
-#define PCI_1ACCESS_CONTROL_BASE_7_LOW 0c1ef0
-#define PCI_1ACCESS_CONTROL_BASE_7_HIGH 0x1ef4
-#define PCI_1ACCESS_CONTROL_TOP_7 0x1ef8
-
-/****************************************/
-/* PCI Snoop Control */
-/****************************************/
-
-#define PCI_0SNOOP_CONTROL_BASE_0_LOW 0x1f00
-#define PCI_0SNOOP_CONTROL_BASE_0_HIGH 0x1f04
-#define PCI_0SNOOP_CONTROL_TOP_0 0x1f08
-#define PCI_0SNOOP_CONTROL_BASE_1_0_LOW 0x1f10
-#define PCI_0SNOOP_CONTROL_BASE_1_0_HIGH 0x1f14
-#define PCI_0SNOOP_CONTROL_TOP_1 0x1f18
-#define PCI_0SNOOP_CONTROL_BASE_2_0_LOW 0x1f20
-#define PCI_0SNOOP_CONTROL_BASE_2_0_HIGH 0x1f24
-#define PCI_0SNOOP_CONTROL_TOP_2 0x1f28
-#define PCI_0SNOOP_CONTROL_BASE_3_0_LOW 0x1f30
-#define PCI_0SNOOP_CONTROL_BASE_3_0_HIGH 0x1f34
-#define PCI_0SNOOP_CONTROL_TOP_3 0x1f38
-#define PCI_1SNOOP_CONTROL_BASE_0_LOW 0x1f80
-#define PCI_1SNOOP_CONTROL_BASE_0_HIGH 0x1f84
-#define PCI_1SNOOP_CONTROL_TOP_0 0x1f88
-#define PCI_1SNOOP_CONTROL_BASE_1_0_LOW 0x1f90
-#define PCI_1SNOOP_CONTROL_BASE_1_0_HIGH 0x1f94
-#define PCI_1SNOOP_CONTROL_TOP_1 0x1f98
-#define PCI_1SNOOP_CONTROL_BASE_2_0_LOW 0x1fa0
-#define PCI_1SNOOP_CONTROL_BASE_2_0_HIGH 0x1fa4
-#define PCI_1SNOOP_CONTROL_TOP_2 0x1fa8
-#define PCI_1SNOOP_CONTROL_BASE_3_0_LOW 0x1fb0
-#define PCI_1SNOOP_CONTROL_BASE_3_0_HIGH 0x1fb4
-#define PCI_1SNOOP_CONTROL_TOP_3 0x1fb8
-
-/****************************************/
-/* PCI Configuration Address */
-/****************************************/
-
-#define PCI_0CONFIGURATION_ADDRESS 0xcf8
-#define PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER 0xcfc
-#define PCI_1CONFIGURATION_ADDRESS 0xc78
-#define PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER 0xc7c
-#define PCI_0INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER 0xc34
-#define PCI_1INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER 0xcb4
-
-/****************************************/
-/* PCI Error Report */
-/****************************************/
-
-#define PCI_0SERR_MASK 0xc28
-#define PCI_0ERROR_ADDRESS_LOW 0x1d40
-#define PCI_0ERROR_ADDRESS_HIGH 0x1d44
-#define PCI_0ERROR_DATA_LOW 0x1d48
-#define PCI_0ERROR_DATA_HIGH 0x1d4c
-#define PCI_0ERROR_COMMAND 0x1d50
-#define PCI_0ERROR_CAUSE 0x1d58
-#define PCI_0ERROR_MASK 0x1d5c
-
-#define PCI_1SERR_MASK 0xca8
-#define PCI_1ERROR_ADDRESS_LOW 0x1dc0
-#define PCI_1ERROR_ADDRESS_HIGH 0x1dc4
-#define PCI_1ERROR_DATA_LOW 0x1dc8
-#define PCI_1ERROR_DATA_HIGH 0x1dcc
-#define PCI_1ERROR_COMMAND 0x1dd0
-#define PCI_1ERROR_CAUSE 0x1dd8
-#define PCI_1ERROR_MASK 0x1ddc
-
-
-/****************************************/
-/* Lslave Debug (for internal use) */
-/****************************************/
-
-#define L_SLAVE_X0_ADDRESS 0x1d20
-#define L_SLAVE_X0_COMMAND_AND_ID 0x1d24
-#define L_SLAVE_X1_ADDRESS 0x1d28
-#define L_SLAVE_X1_COMMAND_AND_ID 0x1d2c
-#define L_SLAVE_WRITE_DATA_LOW 0x1d30
-#define L_SLAVE_WRITE_DATA_HIGH 0x1d34
-#define L_SLAVE_WRITE_BYTE_ENABLE 0x1d60
-#define L_SLAVE_READ_DATA_LOW 0x1d38
-#define L_SLAVE_READ_DATA_HIGH 0x1d3c
-#define L_SLAVE_READ_ID 0x1d64
-
-/****************************************/
-/* PCI Configuration Function 0 */
-/****************************************/
-
-#define PCI_DEVICE_AND_VENDOR_ID 0x000
-#define PCI_STATUS_AND_COMMAND 0x004
-#define PCI_CLASS_CODE_AND_REVISION_ID 0x008
-#define PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C
-#define PCI_SCS_0_BASE_ADDRESS 0x010
-#define PCI_SCS_1_BASE_ADDRESS 0x014
-#define PCI_SCS_2_BASE_ADDRESS 0x018
-#define PCI_SCS_3_BASE_ADDRESS 0x01C
-#define PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS 0x020
-#define PCI_INTERNAL_REGISTERS_I_OMAPPED_BASE_ADDRESS 0x024
-#define PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02C
-#define PCI_EXPANSION_ROM_BASE_ADDRESS_REGISTER 0x030
-#define PCI_CAPABILTY_LIST_POINTER 0x034
-#define PCI_INTERRUPT_PIN_AND_LINE 0x03C
-#define PCI_POWER_MANAGEMENT_CAPABILITY 0x040
-#define PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044
-#define PCI_VPD_ADDRESS 0x048
-#define PCI_VPD_DATA 0X04c
-#define PCI_MSI_MESSAGE_CONTROL 0x050
-#define PCI_MSI_MESSAGE_ADDRESS 0x054
-#define PCI_MSI_MESSAGE_UPPER_ADDRESS 0x058
-#define PCI_MSI_MESSAGE_DATA 0x05c
-#define PCI_COMPACT_PCI_HOT_SWAP_CAPABILITY 0x058
-
-/****************************************/
-/* PCI Configuration Function 1 */
-/****************************************/
-
-#define PCI_CS_0_BASE_ADDRESS 0x110
-#define PCI_CS_1_BASE_ADDRESS 0x114
-#define PCI_CS_2_BASE_ADDRESS 0x118
-#define PCI_CS_3_BASE_ADDRESS 0x11c
-#define PCI_BOOTCS_BASE_ADDRESS 0x120
-
-/****************************************/
-/* PCI Configuration Function 2 */
-/****************************************/
-
-#define PCI_P2P_MEM0_BASE_ADDRESS 0x210
-#define PCI_P2P_MEM1_BASE_ADDRESS 0x214
-#define PCI_P2P_I_O_BASE_ADDRESS 0x218
-#define PCI_CPU_BASE_ADDRESS 0x21c
-
-/****************************************/
-/* PCI Configuration Function 4 */
-/****************************************/
-
-#define PCI_DAC_SCS_0_BASE_ADDRESS_LOW 0x410
-#define PCI_DAC_SCS_0_BASE_ADDRESS_HIGH 0x414
-#define PCI_DAC_SCS_1_BASE_ADDRESS_LOW 0x418
-#define PCI_DAC_SCS_1_BASE_ADDRESS_HIGH 0x41c
-#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_LOW 0x420
-#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_HIGH 0x424
-
-
-/****************************************/
-/* PCI Configuration Function 5 */
-/****************************************/
-
-#define PCI_DAC_SCS_2_BASE_ADDRESS_LOW 0x510
-#define PCI_DAC_SCS_2_BASE_ADDRESS_HIGH 0x514
-#define PCI_DAC_SCS_3_BASE_ADDRESS_LOW 0x518
-#define PCI_DAC_SCS_3_BASE_ADDRESS_HIGH 0x51c
-#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_LOW 0x520
-#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_HIGH 0x524
-
-
-/****************************************/
-/* PCI Configuration Function 6 */
-/****************************************/
-
-#define PCI_DAC_CS_0_BASE_ADDRESS_LOW 0x610
-#define PCI_DAC_CS_0_BASE_ADDRESS_HIGH 0x614
-#define PCI_DAC_CS_1_BASE_ADDRESS_LOW 0x618
-#define PCI_DAC_CS_1_BASE_ADDRESS_HIGH 0x61c
-#define PCI_DAC_CS_2_BASE_ADDRESS_LOW 0x620
-#define PCI_DAC_CS_2_BASE_ADDRESS_HIGH 0x624
-
-/****************************************/
-/* PCI Configuration Function 7 */
-/****************************************/
-
-#define PCI_DAC_CS_3_BASE_ADDRESS_LOW 0x710
-#define PCI_DAC_CS_3_BASE_ADDRESS_HIGH 0x714
-#define PCI_DAC_BOOTCS_BASE_ADDRESS_LOW 0x718
-#define PCI_DAC_BOOTCS_BASE_ADDRESS_HIGH 0x71c
-#define PCI_DAC_CPU_BASE_ADDRESS_LOW 0x720
-#define PCI_DAC_CPU_BASE_ADDRESS_HIGH 0x724
-
-/****************************************/
-/* Interrupts */
-/****************************************/
-
-#define LOW_INTERRUPT_CAUSE_REGISTER 0xc18
-#define HIGH_INTERRUPT_CAUSE_REGISTER 0xc68
-#define CPU_INTERRUPT_MASK_REGISTER_LOW 0xc1c
-#define CPU_INTERRUPT_MASK_REGISTER_HIGH 0xc6c
-#define CPU_SELECT_CAUSE_REGISTER 0xc70
-#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW 0xc24
-#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH 0xc64
-#define PCI_0SELECT_CAUSE 0xc74
-#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW 0xca4
-#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH 0xce4
-#define PCI_1SELECT_CAUSE 0xcf4
-#define CPU_INT_0_MASK 0xe60
-#define CPU_INT_1_MASK 0xe64
-#define CPU_INT_2_MASK 0xe68
-#define CPU_INT_3_MASK 0xe6c
-
-/****************************************/
-/* I20 Support registers */
-/****************************************/
-
-#define INBOUND_MESSAGE_REGISTER0_PCI0_SIDE 0x010
-#define INBOUND_MESSAGE_REGISTER1_PCI0_SIDE 0x014
-#define OUTBOUND_MESSAGE_REGISTER0_PCI0_SIDE 0x018
-#define OUTBOUND_MESSAGE_REGISTER1_PCI0_SIDE 0x01C
-#define INBOUND_DOORBELL_REGISTER_PCI0_SIDE 0x020
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI0_SIDE 0x024
-#define INBOUND_INTERRUPT_MASK_REGISTER_PCI0_SIDE 0x028
-#define OUTBOUND_DOORBELL_REGISTER_PCI0_SIDE 0x02C
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI0_SIDE 0x030
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI0_SIDE 0x034
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI0_SIDE 0x040
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI0_SIDE 0x044
-#define QUEUE_CONTROL_REGISTER_PCI0_SIDE 0x050
-#define QUEUE_BASE_ADDRESS_REGISTER_PCI0_SIDE 0x054
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI0_SIDE 0x060
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI0_SIDE 0x064
-#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI0_SIDE 0x068
-#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI0_SIDE 0x06C
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI0_SIDE 0x070
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI0_SIDE 0x074
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI0_SIDE 0x0F8
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI0_SIDE 0x0FC
-
-#define INBOUND_MESSAGE_REGISTER0_PCI1_SIDE 0x090
-#define INBOUND_MESSAGE_REGISTER1_PCI1_SIDE 0x094
-#define OUTBOUND_MESSAGE_REGISTER0_PCI1_SIDE 0x098
-#define OUTBOUND_MESSAGE_REGISTER1_PCI1_SIDE 0x09C
-#define INBOUND_DOORBELL_REGISTER_PCI1_SIDE 0x0A0
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI1_SIDE 0x0A4
-#define INBOUND_INTERRUPT_MASK_REGISTER_PCI1_SIDE 0x0A8
-#define OUTBOUND_DOORBELL_REGISTER_PCI1_SIDE 0x0AC
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI1_SIDE 0x0B0
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI1_SIDE 0x0B4
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI1_SIDE 0x0C0
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI1_SIDE 0x0C4
-#define QUEUE_CONTROL_REGISTER_PCI1_SIDE 0x0D0
-#define QUEUE_BASE_ADDRESS_REGISTER_PCI1_SIDE 0x0D4
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0E0
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0E4
-#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0E8
-#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0EC
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0F0
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0F4
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI1_SIDE 0x078
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI1_SIDE 0x07C
-
-#define INBOUND_MESSAGE_REGISTER0_CPU0_SIDE 0X1C10
-#define INBOUND_MESSAGE_REGISTER1_CPU0_SIDE 0X1C14
-#define OUTBOUND_MESSAGE_REGISTER0_CPU0_SIDE 0X1C18
-#define OUTBOUND_MESSAGE_REGISTER1_CPU0_SIDE 0X1C1C
-#define INBOUND_DOORBELL_REGISTER_CPU0_SIDE 0X1C20
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU0_SIDE 0X1C24
-#define INBOUND_INTERRUPT_MASK_REGISTER_CPU0_SIDE 0X1C28
-#define OUTBOUND_DOORBELL_REGISTER_CPU0_SIDE 0X1C2C
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU0_SIDE 0X1C30
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU0_SIDE 0X1C34
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU0_SIDE 0X1C40
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU0_SIDE 0X1C44
-#define QUEUE_CONTROL_REGISTER_CPU0_SIDE 0X1C50
-#define QUEUE_BASE_ADDRESS_REGISTER_CPU0_SIDE 0X1C54
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C60
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C64
-#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C68
-#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C6C
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C70
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C74
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1CF8
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1CFC
-
-#define INBOUND_MESSAGE_REGISTER0_CPU1_SIDE 0X1C90
-#define INBOUND_MESSAGE_REGISTER1_CPU1_SIDE 0X1C94
-#define OUTBOUND_MESSAGE_REGISTER0_CPU1_SIDE 0X1C98
-#define OUTBOUND_MESSAGE_REGISTER1_CPU1_SIDE 0X1C9C
-#define INBOUND_DOORBELL_REGISTER_CPU1_SIDE 0X1CA0
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU1_SIDE 0X1CA4
-#define INBOUND_INTERRUPT_MASK_REGISTER_CPU1_SIDE 0X1CA8
-#define OUTBOUND_DOORBELL_REGISTER_CPU1_SIDE 0X1CAC
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU1_SIDE 0X1CB0
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU1_SIDE 0X1CB4
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU1_SIDE 0X1CC0
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU1_SIDE 0X1CC4
-#define QUEUE_CONTROL_REGISTER_CPU1_SIDE 0X1CD0
-#define QUEUE_BASE_ADDRESS_REGISTER_CPU1_SIDE 0X1CD4
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CE0
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CE4
-#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CE8
-#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CEC
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CF0
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CF4
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1C78
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1C7C
-
-/****************************************/
-/* Communication Unit Registers */
-/****************************************/
-
-#define ETHERNET_0_ADDRESS_CONTROL_LOW
-#define ETHERNET_0_ADDRESS_CONTROL_HIGH 0xf204
-#define ETHERNET_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf208
-#define ETHERNET_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf20c
-#define ETHERNET_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf210
-#define ETHERNET_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf214
-#define ETHERNET_0_HASH_TABLE_PCI_HIGH_ADDRESS 0xf218
-#define ETHERNET_1_ADDRESS_CONTROL_LOW 0xf220
-#define ETHERNET_1_ADDRESS_CONTROL_HIGH 0xf224
-#define ETHERNET_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf228
-#define ETHERNET_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf22c
-#define ETHERNET_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf230
-#define ETHERNET_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf234
-#define ETHERNET_1_HASH_TABLE_PCI_HIGH_ADDRESS 0xf238
-#define ETHERNET_2_ADDRESS_CONTROL_LOW 0xf240
-#define ETHERNET_2_ADDRESS_CONTROL_HIGH 0xf244
-#define ETHERNET_2_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf248
-#define ETHERNET_2_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf24c
-#define ETHERNET_2_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf250
-#define ETHERNET_2_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf254
-#define ETHERNET_2_HASH_TABLE_PCI_HIGH_ADDRESS 0xf258
-#define MPSC_0_ADDRESS_CONTROL_LOW 0xf280
-#define MPSC_0_ADDRESS_CONTROL_HIGH 0xf284
-#define MPSC_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf288
-#define MPSC_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf28c
-#define MPSC_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf290
-#define MPSC_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf294
-#define MPSC_1_ADDRESS_CONTROL_LOW 0xf2a0
-#define MPSC_1_ADDRESS_CONTROL_HIGH 0xf2a4
-#define MPSC_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf2a8
-#define MPSC_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf2ac
-#define MPSC_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2b0
-#define MPSC_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2b4
-#define MPSC_2_ADDRESS_CONTROL_LOW 0xf2c0
-#define MPSC_2_ADDRESS_CONTROL_HIGH 0xf2c4
-#define MPSC_2_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf2c8
-#define MPSC_2_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf2cc
-#define MPSC_2_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2d0
-#define MPSC_2_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2d4
-#define SERIAL_INIT_PCI_HIGH_ADDRESS 0xf320
-#define SERIAL_INIT_LAST_DATA 0xf324
-#define SERIAL_INIT_STATUS_AND_CONTROL 0xf328
-#define COMM_UNIT_ARBITER_CONTROL 0xf300
-#define COMM_UNIT_CROSS_BAR_TIMEOUT 0xf304
-#define COMM_UNIT_INTERRUPT_CAUSE 0xf310
-#define COMM_UNIT_INTERRUPT_MASK 0xf314
-#define COMM_UNIT_ERROR_ADDRESS 0xf314
-
-/****************************************/
-/* Cunit Debug (for internal use) */
-/****************************************/
-
-#define CUNIT_ADDRESS 0xf340
-#define CUNIT_COMMAND_AND_ID 0xf344
-#define CUNIT_WRITE_DATA_LOW 0xf348
-#define CUNIT_WRITE_DATA_HIGH 0xf34c
-#define CUNIT_WRITE_BYTE_ENABLE 0xf358
-#define CUNIT_READ_DATA_LOW 0xf350
-#define CUNIT_READ_DATA_HIGH 0xf354
-#define CUNIT_READ_ID 0xf35c
-
-/****************************************/
-/* Fast Ethernet Unit Registers */
-/****************************************/
-
-/* Ethernet */
-
-#define ETHERNET_PHY_ADDRESS_REGISTER 0x2000
-#define ETHERNET_SMI_REGISTER 0x2010
-
-/* Ethernet 0 */
-
-#define ETHERNET0_PORT_CONFIGURATION_REGISTER 0x2400
-#define ETHERNET0_PORT_CONFIGURATION_EXTEND_REGISTER 0x2408
-#define ETHERNET0_PORT_COMMAND_REGISTER 0x2410
-#define ETHERNET0_PORT_STATUS_REGISTER 0x2418
-#define ETHERNET0_SERIAL_PARAMETRS_REGISTER 0x2420
-#define ETHERNET0_HASH_TABLE_POINTER_REGISTER 0x2428
-#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2430
-#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2438
-#define ETHERNET0_SDMA_CONFIGURATION_REGISTER 0x2440
-#define ETHERNET0_SDMA_COMMAND_REGISTER 0x2448
-#define ETHERNET0_INTERRUPT_CAUSE_REGISTER 0x2450
-#define ETHERNET0_INTERRUPT_MASK_REGISTER 0x2458
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER0 0x2480
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER1 0x2484
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER2 0x2488
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER3 0x248c
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER0 0x24a0
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER1 0x24a4
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER2 0x24a8
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER3 0x24ac
-#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER0 0x24e0
-#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER1 0x24e4
-#define ETHERNET0_MIB_COUNTER_BASE 0x2500
-
-/* Ethernet 1 */
-
-#define ETHERNET1_PORT_CONFIGURATION_REGISTER 0x2800
-#define ETHERNET1_PORT_CONFIGURATION_EXTEND_REGISTER 0x2808
-#define ETHERNET1_PORT_COMMAND_REGISTER 0x2810
-#define ETHERNET1_PORT_STATUS_REGISTER 0x2818
-#define ETHERNET1_SERIAL_PARAMETRS_REGISTER 0x2820
-#define ETHERNET1_HASH_TABLE_POINTER_REGISTER 0x2828
-#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2830
-#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2838
-#define ETHERNET1_SDMA_CONFIGURATION_REGISTER 0x2840
-#define ETHERNET1_SDMA_COMMAND_REGISTER 0x2848
-#define ETHERNET1_INTERRUPT_CAUSE_REGISTER 0x2850
-#define ETHERNET1_INTERRUPT_MASK_REGISTER 0x2858
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER0 0x2880
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER1 0x2884
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER2 0x2888
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER3 0x288c
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER0 0x28a0
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER1 0x28a4
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER2 0x28a8
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER3 0x28ac
-#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER0 0x28e0
-#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER1 0x28e4
-#define ETHERNET1_MIB_COUNTER_BASE 0x2900
-
-/* Ethernet 2 */
-
-#define ETHERNET2_PORT_CONFIGURATION_REGISTER 0x2c00
-#define ETHERNET2_PORT_CONFIGURATION_EXTEND_REGISTER 0x2c08
-#define ETHERNET2_PORT_COMMAND_REGISTER 0x2c10
-#define ETHERNET2_PORT_STATUS_REGISTER 0x2c18
-#define ETHERNET2_SERIAL_PARAMETRS_REGISTER 0x2c20
-#define ETHERNET2_HASH_TABLE_POINTER_REGISTER 0x2c28
-#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2c30
-#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2c38
-#define ETHERNET2_SDMA_CONFIGURATION_REGISTER 0x2c40
-#define ETHERNET2_SDMA_COMMAND_REGISTER 0x2c48
-#define ETHERNET2_INTERRUPT_CAUSE_REGISTER 0x2c50
-#define ETHERNET2_INTERRUPT_MASK_REGISTER 0x2c58
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER0 0x2c80
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER1 0x2c84
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER2 0x2c88
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER3 0x2c8c
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER0 0x2ca0
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER1 0x2ca4
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER2 0x2ca8
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER3 0x2cac
-#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER0 0x2ce0
-#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER1 0x2ce4
-#define ETHERNET2_MIB_COUNTER_BASE 0x2d00
-
-/****************************************/
-/* SDMA Registers */
-/****************************************/
-
-#define SDMA_GROUP_CONFIGURATION_REGISTER 0xb1f0
-#define CHANNEL0_CONFIGURATION_REGISTER 0x4000
-#define CHANNEL0_COMMAND_REGISTER 0x4008
-#define CHANNEL0_RX_CMD_STATUS 0x4800
-#define CHANNEL0_RX_PACKET_AND_BUFFER_SIZES 0x4804
-#define CHANNEL0_RX_BUFFER_POINTER 0x4808
-#define CHANNEL0_RX_NEXT_POINTER 0x480c
-#define CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER 0x4810
-#define CHANNEL0_TX_CMD_STATUS 0x4C00
-#define CHANNEL0_TX_PACKET_SIZE 0x4C04
-#define CHANNEL0_TX_BUFFER_POINTER 0x4C08
-#define CHANNEL0_TX_NEXT_POINTER 0x4C0c
-#define CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER 0x4c10
-#define CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER 0x4c14
-#define CHANNEL1_CONFIGURATION_REGISTER 0x6000
-#define CHANNEL1_COMMAND_REGISTER 0x6008
-#define CHANNEL1_RX_CMD_STATUS 0x6800
-#define CHANNEL1_RX_PACKET_AND_BUFFER_SIZES 0x6804
-#define CHANNEL1_RX_BUFFER_POINTER 0x6808
-#define CHANNEL1_RX_NEXT_POINTER 0x680c
-#define CHANNEL1_CURRENT_RX_DESCRIPTOR_POINTER 0x6810
-#define CHANNEL1_TX_CMD_STATUS 0x6C00
-#define CHANNEL1_TX_PACKET_SIZE 0x6C04
-#define CHANNEL1_TX_BUFFER_POINTER 0x6C08
-#define CHANNEL1_TX_NEXT_POINTER 0x6C0c
-#define CHANNEL1_CURRENT_RX_DESCRIPTOR_POINTER 0x6810
-#define CHANNEL1_CURRENT_TX_DESCRIPTOR_POINTER 0x6c10
-#define CHANNEL1_FIRST_TX_DESCRIPTOR_POINTER 0x6c14
-
-/* SDMA Interrupt */
-
-#define SDMA_CAUSE 0xb820
-#define SDMA_MASK 0xb8a0
-
-
-/****************************************/
-/* Baude Rate Generators Registers */
-/****************************************/
-
-/* BRG 0 */
-
-#define BRG0_CONFIGURATION_REGISTER 0xb200
-#define BRG0_BAUDE_TUNING_REGISTER 0xb204
-
-/* BRG 1 */
-
-#define BRG1_CONFIGURATION_REGISTER 0xb208
-#define BRG1_BAUDE_TUNING_REGISTER 0xb20c
-
-/* BRG 2 */
-
-#define BRG2_CONFIGURATION_REGISTER 0xb210
-#define BRG2_BAUDE_TUNING_REGISTER 0xb214
-
-/* BRG Interrupts */
-
-#define BRG_CAUSE_REGISTER 0xb834
-#define BRG_MASK_REGISTER 0xb8b4
-
-/* MISC */
-
-#define MAIN_ROUTING_REGISTER 0xb400
-#define RECEIVE_CLOCK_ROUTING_REGISTER 0xb404
-#define TRANSMIT_CLOCK_ROUTING_REGISTER 0xb408
-#define COMM_UNIT_ARBITER_CONFIGURATION_REGISTER 0xb40c
-#define WATCHDOG_CONFIGURATION_REGISTER 0xb410
-#define WATCHDOG_VALUE_REGISTER 0xb414
-
-
-/****************************************/
-/* Flex TDM Registers */
-/****************************************/
-
-/* FTDM Port */
-
-#define FLEXTDM_TRANSMIT_READ_POINTER 0xa800
-#define FLEXTDM_RECEIVE_READ_POINTER 0xa804
-#define FLEXTDM_CONFIGURATION_REGISTER 0xa808
-#define FLEXTDM_AUX_CHANNELA_TX_REGISTER 0xa80c
-#define FLEXTDM_AUX_CHANNELA_RX_REGISTER 0xa810
-#define FLEXTDM_AUX_CHANNELB_TX_REGISTER 0xa814
-#define FLEXTDM_AUX_CHANNELB_RX_REGISTER 0xa818
-
-/* FTDM Interrupts */
-
-#define FTDM_CAUSE_REGISTER 0xb830
-#define FTDM_MASK_REGISTER 0xb8b0
-
-
-/****************************************/
-/* GPP Interface Registers */
-/****************************************/
-
-#define GPP_IO_CONTROL 0xf100
-#define GPP_LEVEL_CONTROL 0xf110
-#define GPP_VALUE 0xf104
-#define GPP_INTERRUPT_CAUSE 0xf108
-#define GPP_INTERRUPT_MASK 0xf10c
-
-#define MPP_CONTROL0 0xf000
-#define MPP_CONTROL1 0xf004
-#define MPP_CONTROL2 0xf008
-#define MPP_CONTROL3 0xf00c
-#define DEBUG_PORT_MULTIPLEX 0xf014
-#define SERIAL_PORT_MULTIPLEX 0xf010
-
-/****************************************/
-/* I2C Registers */
-/****************************************/
-
-#define I2C_SLAVE_ADDRESS 0xc000
-#define I2C_EXTENDED_SLAVE_ADDRESS 0xc040
-#define I2C_DATA 0xc004
-#define I2C_CONTROL 0xc008
-#define I2C_STATUS_BAUDE_RATE 0xc00C
-#define I2C_SOFT_RESET 0xc01c
-
-/****************************************/
-/* MPSC Registers */
-/****************************************/
-
-/* MPSC0 */
-
-#define MPSC0_MAIN_CONFIGURATION_LOW 0x8000
-#define MPSC0_MAIN_CONFIGURATION_HIGH 0x8004
-#define MPSC0_PROTOCOL_CONFIGURATION 0x8008
-#define CHANNEL0_REGISTER1 0x800c
-#define CHANNEL0_REGISTER2 0x8010
-#define CHANNEL0_REGISTER3 0x8014
-#define CHANNEL0_REGISTER4 0x8018
-#define CHANNEL0_REGISTER5 0x801c
-#define CHANNEL0_REGISTER6 0x8020
-#define CHANNEL0_REGISTER7 0x8024
-#define CHANNEL0_REGISTER8 0x8028
-#define CHANNEL0_REGISTER9 0x802c
-#define CHANNEL0_REGISTER10 0x8030
-#define CHANNEL0_REGISTER11 0x8034
-
-/* MPSC1 */
-
-#define MPSC1_MAIN_CONFIGURATION_LOW 0x9000
-#define MPSC1_MAIN_CONFIGURATION_HIGH 0x9004
-#define MPSC1_PROTOCOL_CONFIGURATION 0x9008
-#define CHANNEL1_REGISTER1 0x900c
-#define CHANNEL1_REGISTER2 0x9010
-#define CHANNEL1_REGISTER3 0x9014
-#define CHANNEL1_REGISTER4 0x9018
-#define CHANNEL1_REGISTER5 0x901c
-#define CHANNEL1_REGISTER6 0x9020
-#define CHANNEL1_REGISTER7 0x9024
-#define CHANNEL1_REGISTER8 0x9028
-#define CHANNEL1_REGISTER9 0x902c
-#define CHANNEL1_REGISTER10 0x9030
-#define CHANNEL1_REGISTER11 0x9034
-
-/* MPSCs Interupts */
-
-#define MPSC0_CAUSE 0xb804
-#define MPSC0_MASK 0xb884
-#define MPSC1_CAUSE 0xb80c
-#define MPSC1_MASK 0xb88c
-
-#endif /* __INCgt64240rh */
+++ /dev/null
-/***********************************************************************
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * arch/mips/gt64240/gt64240-dep.h
- * Board-dependent definitions for GT-64120 chip.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- ***********************************************************************
- */
-
-#ifndef _ASM_GT64240_DEP_H
-#define _ASM_GT64240_DEP_H
-
-#include <asm/addrspace.h> /* for KSEG1ADDR() */
-#include <asm/byteorder.h> /* for cpu_to_le32() */
-
-/*
- * PCI address allocation
- */
-#if 0
-#define GT_PCI_MEM_BASE (0x22000000)
-#define GT_PCI_MEM_SIZE GT_DEF_PCI0_MEM0_SIZE
-#define GT_PCI_IO_BASE (0x20000000)
-#define GT_PCI_IO_SIZE GT_DEF_PCI0_IO_SIZE
-#endif
-
-extern unsigned long gt64240_base;
-
-#define GT64240_BASE (gt64240_base)
-
-/*
- * Because of an error/peculiarity in the Galileo chip, we need to swap the
- * bytes when running bigendian.
- */
-
-#define GT_WRITE(ofs, data) \
- *(volatile u32 *)(GT64240_BASE+(ofs)) = cpu_to_le32(data)
-#define GT_READ(ofs, data) \
- *(data) = le32_to_cpu(*(volatile u32 *)(GT64240_BASE+(ofs)))
-#define GT_READ_DATA(ofs) \
- le32_to_cpu(*(volatile u32 *)(GT64240_BASE+(ofs)))
-
-#define GT_WRITE_16(ofs, data) \
- *(volatile u16 *)(GT64240_BASE+(ofs)) = cpu_to_le16(data)
-#define GT_READ_16(ofs, data) \
- *(data) = le16_to_cpu(*(volatile u16 *)(GT64240_BASE+(ofs)))
-
-#define GT_WRITE_8(ofs, data) \
- *(volatile u8 *)(GT64240_BASE+(ofs)) = data
-#define GT_READ_8(ofs, data) \
- *(data) = *(volatile u8 *)(GT64240_BASE+(ofs))
-
-#endif /* _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H */
+++ /dev/null
-/*
- * Copyright 2002 Momentum Computer Inc.
- * Author: Matthew Dharm <mdharm@momenco.com>
- *
- * Based on work for the Linux port to the Ocelot board, which is
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * arch/mips/momentum/ocelot_g/pci.c
- * Board-specific PCI routines for gt64240 controller.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <asm/pci.h>
-
-
-void __devinit gt64240_board_pcibios_fixup_bus(struct pci_bus *bus)
-{
- struct pci_bus *current_bus = bus;
- struct pci_dev *devices;
- struct list_head *devices_link;
- u16 cmd;
-
- /* loop over all known devices on this bus */
- list_for_each(devices_link, &(current_bus->devices)) {
-
- devices = pci_dev_b(devices_link);
- if (devices == NULL)
- continue;
-
- if ((current_bus->number == 0) &&
- PCI_SLOT(devices->devfn) == 1) {
- /* Intel 82543 Gigabit MAC */
- devices->irq = 2; /* irq_nr is 2 for INT0 */
- } else if ((current_bus->number == 0) &&
- PCI_SLOT(devices->devfn) == 2) {
- /* Intel 82543 Gigabit MAC */
- devices->irq = 3; /* irq_nr is 3 for INT1 */
- } else if ((current_bus->number == 1) &&
- PCI_SLOT(devices->devfn) == 3) {
- /* Intel 21555 bridge */
- devices->irq = 5; /* irq_nr is 8 for INT6 */
- } else if ((current_bus->number == 1) &&
- PCI_SLOT(devices->devfn) == 4) {
- /* PMC Slot */
- devices->irq = 9; /* irq_nr is 9 for INT7 */
- } else {
- /* We don't have assign interrupts for other devices. */
- devices->irq = 0xff;
- }
-
- /* Assign an interrupt number for the device */
- bus->ops->write(current_bus, devices,
- PCI_INTERRUPT_LINE, 1, devices->irq);
-
- /* enable master for everything but the GT-64240 */
- if (((current_bus->number != 0) && (current_bus->number != 1))
- || (PCI_SLOT(devices->devfn) != 0)) {
- bus->ops->read(current_bus, devices,
- PCI_COMMAND, 2, &cmd);
- cmd |= PCI_COMMAND_MASTER;
- bus->ops->write(current_bus, devices,
- PCI_COMMAND, 2, cmd);
- }
- }
-}
+++ /dev/null
-/*
- * arch/mips/vr41xx/nec-eagle/pci_fixup.c
- *
- * The NEC Eagle/Hawk Board specific PCI fixups.
- *
- * Author: Yoichi Yuasa <you@mvista.com, or source@mvista.com>
- *
- * 2001-2002,2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/vr41xx/eagle.h>
-#include <asm/vr41xx/vrc4173.h>
-
-/*
- * Shortcuts
- */
-#define INTA CP_INTA_IRQ
-#define INTB CP_INTB_IRQ
-#define INTC CP_INTC_IRQ
-#define INTD CP_INTD_IRQ
-#define PCMCIA1 VRC4173_PCMCIA1_IRQ
-#define PCMCIA2 VRC4173_PCMCIA2_IRQ
-#define LAN LANINTA_IRQ
-#define SLOT PCISLOT_IRQ
-
-static char irq_tab_eagle[][5] __initdata = {
- [ 8] = { 0, INTA, INTB, INTC, INTD },
- [ 9] = { 0, INTD, INTA, INTB, INTC },
- [10] = { 0, INTC, INTD, INTA, INTB },
- [12] = { 0, PCMCIA1, 0, 0, 0 },
- [13] = { 0, PCMCIA2, 0, 0, 0 },
- [28] = { 0, LAN, 0, 0, 0 },
- [29] = { 0, SLOT, INTB, INTC, INTD },
-};
-
-/*
- * This is a multifunction device.
- */
-static char irq_func_tab[] __initdata = {
- VRC4173_CASCADE_IRQ,
- VRC4173_AC97_IRQ,
- VRC4173_USB_IRQ
-};
-
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- if (slot == 30)
- return irq_func_tab[PCI_FUNC(dev->devfn)];
-
- return irq_tab_eagle[slot][pin];
-}
-
-struct pci_fixup pcibios_fixups[] __initdata = {
- { .pass = 0, },
-};
+++ /dev/null
-#include <linux/init.h>
-#include <linux/pci.h>
-
-void __init pcibios_fixup_irqs(void)
-{
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Marvell MV64340 interrupt fixup code.
- *
- * Marvell wants an NDA for their docs so this was written without
- * documentation. You've been warned.
- *
- * Copyright (C) 2004 Ralf Baechle
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/mipsregs.h>
-#include <asm/pci_channel.h>
-
-/*
- * WARNING: Example of how _NOT_ to do it.
- */
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- int bus = dev->bus->number;
-
- if (bus == 0 && slot == 1)
- return 3; /* PCI-X A */
- if (bus == 0 && slot == 2)
- return 4; /* PCI-X B */
- if (bus == 1 && slot == 1)
- return 5; /* PCI A */
- if (bus == 1 && slot == 2)
- return 6; /* PCI B */
-
-return 0;
- panic("Whooops in pcibios_map_irq");
-}
-
-struct pci_fixup pcibios_fixups[] = {
- {0}
-};
+++ /dev/null
-/*
- * FILE NAME
- * arch/mips/vr41xx/tanbac-tb0229/pci_fixup.c
- *
- * BRIEF MODULE DESCRIPTION
- * The TANBAC TB0229(VR4131DIMM) specific PCI fixups.
- *
- * Copyright 2003 Megasolution Inc.
- * matsu@megasolution.jp
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/vr41xx/tb0229.h>
-
-void __init pcibios_fixup_irqs(void)
-{
-#ifdef CONFIG_TANBAC_TB0219
- struct pci_dev *dev = NULL;
- u8 slot;
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- slot = PCI_SLOT(dev->devfn);
- dev->irq = 0;
-
- switch (slot) {
- case 12:
- vr41xx_set_irq_trigger(TB0219_PCI_SLOT1_PIN,
- TRIGGER_LEVEL,
- SIGNAL_THROUGH);
- vr41xx_set_irq_level(TB0219_PCI_SLOT1_PIN,
- LEVEL_LOW);
- dev->irq = TB0219_PCI_SLOT1_IRQ;
- break;
- case 13:
- vr41xx_set_irq_trigger(TB0219_PCI_SLOT2_PIN,
- TRIGGER_LEVEL,
- SIGNAL_THROUGH);
- vr41xx_set_irq_level(TB0219_PCI_SLOT2_PIN,
- LEVEL_LOW);
- dev->irq = TB0219_PCI_SLOT2_IRQ;
- break;
- case 14:
- vr41xx_set_irq_trigger(TB0219_PCI_SLOT3_PIN,
- TRIGGER_LEVEL,
- SIGNAL_THROUGH);
- vr41xx_set_irq_level(TB0219_PCI_SLOT3_PIN,
- LEVEL_LOW);
- dev->irq = TB0219_PCI_SLOT3_IRQ;
- break;
- default:
- break;
- }
-
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
-#endif
-}
+++ /dev/null
-/*
- * FILE NAME
- * arch/mips/vr41xx/victor-mpc30x/pci_fixup.c
- *
- * BRIEF MODULE DESCRIPTION
- * The Victor MP-C303/304 specific PCI fixups.
- *
- * Copyright 2002 Yoichi Yuasa
- * yuasa@hh.iij4u.or.jp
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/vr41xx/vrc4173.h>
-#include <asm/vr41xx/mpc30x.h>
-
-/*
- * Shortcuts
- */
-#define PCMCIA1 VRC4173_PCMCIA1_IRQ
-#define PCMCIA2 VRC4173_PCMCIA2_IRQ
-#define MQ MQ200_IRQ
-
-static const int internal_func_irqs[8] __initdata = {
- VRC4173_CASCADE_IRQ,
- VRC4173_AC97_IRQ,
- VRC4173_USB_IRQ,
-
-};
-
-static char irq_tab_mpc30x[][5] __initdata = {
- [12] = { PCMCIA1, PCMCIA1, 0, 0 },
- [13] = { PCMCIA2, PCMCIA2, 0, 0 },
- [29] = { MQ, MQ, 0, 0 }, /* mediaQ MQ-200 */
-};
-
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- if (slot == 30)
- return internal_func_irqs[PCI_FUNC(dev->devfn)];
-
- return irq_tab_mpc30x[slot][pin];
-}
+++ /dev/null
-/*
- * Copyright 2002 Momentum Computer
- * Author: Matthew Dharm <mdharm@momenco.com>
- *
- * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <asm/mv64340.h>
-
-/*
- * galileo_pcibios_(read/write)_config_(dword/word/byte) -
- *
- * reads/write a dword/word/byte register from the configuration space
- * of a device.
- *
- * Note that bus 0 and bus 1 are local, and we assume all other busses are
- * bridged from bus 1. This is a safe assumption, since any other
- * configuration will require major modifications to the CP7000G
- *
- * Inputs :
- * bus - bus number
- * dev - device number
- * offset - register offset in the configuration space
- * val - value to be written / read
- *
- * Outputs :
- * PCIBIOS_SUCCESSFUL when operation was succesfull
- * PCIBIOS_DEVICE_NOT_FOUND when the bus or dev is errorneous
- * PCIBIOS_BAD_REGISTER_NUMBER when accessing non aligned
- */
-
-static int mv64340_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
- int size, u32 * val, u32 address_reg, u32 data_reg)
-{
- u32 address;
-
- /* Accessing device 31 crashes the MV-64340. */
- if (PCI_SLOT(devfn) > 5)
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- address = (bus->number << 16) | (devfn << 8) |
- (reg & 0xfc) | 0x80000000;
-
- /* start the configuration cycle */
- MV_WRITE(address_reg, address);
-
- switch (size) {
- case 1:
- *val = MV_READ_8(data_reg + (reg & 0x3));
- break;
-
- case 2:
- *val = MV_READ_16(data_reg + (reg & 0x3));
- break;
-
- case 4:
- *val = MV_READ(data_reg);
- break;
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int mv64340_write_config(struct pci_bus *bus, unsigned int devfn,
- int reg, int size, u32 val, u32 address_reg, u32 data_reg)
-{
- u32 address;
-
- /* Accessing device 31 crashes the MV-64340. */
- if (PCI_SLOT(devfn) > 5)
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- address = (bus->number << 16) | (devfn << 8) |
- (reg & 0xfc) | 0x80000000;
-
- /* start the configuration cycle */
- MV_WRITE(address_reg, address);
-
- switch (size) {
- case 1:
- /* write the data */
- MV_WRITE_8(data_reg + (reg & 0x3), val);
- break;
-
- case 2:
- /* write the data */
- MV_WRITE_16(data_reg + (reg & 0x3), val);
- break;
-
- case 4:
- /* write the data */
- MV_WRITE(data_reg, val);
- break;
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-#define BUILD_PCI_OPS(host) \
- \
-static int mv64340_bus ## host ## _read_config(struct pci_bus *bus, \
- unsigned int devfn, int reg, int size, u32 * val) \
-{ \
- return mv64340_read_config(bus, devfn, reg, size, val, \
- MV64340_PCI_ ## host ## _CONFIG_ADDR, \
- MV64340_PCI_ ## host ## _CONFIG_DATA_VIRTUAL_REG); \
-} \
- \
-static int mv64340_bus ## host ## _write_config(struct pci_bus *bus, \
- unsigned int devfn, int reg, int size, u32 val) \
-{ \
- return mv64340_write_config(bus, devfn, reg, size, val, \
- MV64340_PCI_ ## host ## _CONFIG_ADDR, \
- MV64340_PCI_ ## host ## _CONFIG_DATA_VIRTUAL_REG); \
-} \
- \
-struct pci_ops mv64340_bus ## host ## _pci_ops = { \
- .read = mv64340_bus ## host ## _read_config, \
- .write = mv64340_bus ## host ## _write_config \
-};
-
-BUILD_PCI_OPS(0)
-BUILD_PCI_OPS(1)
+++ /dev/null
-/*
- * FILE NAME
- * arch/mips/vr41xx/nec-eagle/vrc4173.c
- *
- * BRIEF MODULE DESCRIPTION
- * Pre-setup for NEC VRC4173.
- *
- * Author: Yoichi Yuasa
- * yyuasa@mvista.com or source@mvista.com
- *
- * Copyright 2001,2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/module.h>
-
-#include <asm/io.h>
-#include <asm/vr41xx/eagle.h>
-#include <asm/vr41xx/vrc4173.h>
-
-#define PCI_CONFIG_ADDR KSEG1ADDR(0x0f000c18)
-#define PCI_CONFIG_DATA KSEG1ADDR(0x0f000c14)
-
-static inline void config_writeb(u8 reg, u8 val)
-{
- u32 data;
- int shift;
-
- writel((1UL << 0x1e) | (reg & 0xfc), PCI_CONFIG_ADDR);
- data = readl(PCI_CONFIG_DATA);
-
- shift = (reg & 3) << 3;
- data &= ~(0xff << shift);
- data |= (((u32) val) << shift);
-
- writel(data, PCI_CONFIG_DATA);
-}
-
-static inline u16 config_readw(u8 reg)
-{
- u32 data;
-
- writel(((1UL << 30) | (reg & 0xfc)), PCI_CONFIG_ADDR);
- data = readl(PCI_CONFIG_DATA);
-
- return (u16) (data >> ((reg & 2) << 3));
-}
-
-static inline u32 config_readl(u8 reg)
-{
- writel(((1UL << 30) | (reg & 0xfc)), PCI_CONFIG_ADDR);
-
- return readl(PCI_CONFIG_DATA);
-}
-
-static inline void config_writel(u8 reg, u32 val)
-{
- writel((1UL << 0x1e) | (reg & 0xfc), PCI_CONFIG_ADDR);
- writel(val, PCI_CONFIG_DATA);
-}
-
-void __init vrc4173_preinit(void)
-{
- u32 cmdsts, base;
- u16 cmu_mask;
-
-
- if ((config_readw(PCI_VENDOR_ID) == PCI_VENDOR_ID_NEC) &&
- (config_readw(PCI_DEVICE_ID) == PCI_DEVICE_ID_NEC_VRC4173)) {
- /*
- * Initialized NEC VRC4173 Bus Control Unit
- */
- cmdsts = config_readl(PCI_COMMAND);
- config_writel(PCI_COMMAND,
- cmdsts |
- PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
-
- config_writeb(PCI_LATENCY_TIMER, 0x80);
-
- config_writel(PCI_BASE_ADDRESS_0, VR41XX_PCI_IO_START);
- base = config_readl(PCI_BASE_ADDRESS_0);
- base &= PCI_BASE_ADDRESS_IO_MASK;
- config_writeb(0x40, 0x01);
-
- /* CARDU1 IDSEL = AD12, CARDU2 IDSEL = AD13 */
- config_writeb(0x41, 0);
-
- cmu_mask = 0x1000;
- outw(cmu_mask, base + 0x040);
- cmu_mask |= 0x0800;
- outw(cmu_mask, base + 0x040);
-
- outw(0x000f, base + 0x042); /* Soft reset of CMU */
- cmu_mask |= 0x05e0;
- outw(cmu_mask, base + 0x040);
- cmu_mask = inw(base + 0x040); /* dummy read */
- outw(0x0000, base + 0x042);
- }
-}
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SNI specific PCI support for RM200/RM300.
- *
- * Copyright (C) 1997 - 2000 Ralf Baechle
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/types.h>
-#include <asm/byteorder.h>
-#include <asm/pci_channel.h>
-#include <asm/hp-lj/asic.h>
-
-static volatile u32 *pci_config_address_reg = (volatile u32 *) 0xfdead000;
-static volatile u32 *pci_config_data_reg = (volatile u32 *) 0xfdead000;
-
-
-
-#define cfgaddr(dev, where) (((dev->bus->number & 0xff) << 0x10) | \
- ((dev->devfn & 0xff) << 0x08) | \
- (where & 0xfc))
-
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static int pcimt_read_config_byte(struct pci_dev *dev,
- int where, unsigned char *val)
-{
- *pci_config_address_reg = cfgaddr(dev, where);
- *val =
- (le32_to_cpu(*pci_config_data_reg) >> ((where & 3) << 3)) &
- 0xff;
- //printk("pci_read_byte 0x%x == 0x%x\n", where, *val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pcimt_read_config_word(struct pci_dev *dev,
- int where, unsigned short *val)
-{
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- *pci_config_address_reg = cfgaddr(dev, where);
- *val =
- (le32_to_cpu(*pci_config_data_reg) >> ((where & 3) << 3)) &
- 0xffff;
- //printk("pci_read_word 0x%x == 0x%x\n", where, *val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-int pcimt_read_config_dword(struct pci_dev *dev,
- int where, unsigned int *val)
-{
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- *pci_config_address_reg = cfgaddr(dev, where);
- *val = le32_to_cpu(*pci_config_data_reg);
- //printk("pci_read_dword 0x%x == 0x%x\n", where, *val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pcimt_write_config_byte(struct pci_dev *dev,
- int where, unsigned char val)
-{
- *pci_config_address_reg = cfgaddr(dev, where);
- *(volatile u8 *) (((int) pci_config_data_reg) + (where & 3)) = val;
- //printk("pci_write_byte 0x%x = 0x%x\n", where, val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pcimt_write_config_word(struct pci_dev *dev,
- int where, unsigned short val)
-{
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- *pci_config_address_reg = cfgaddr(dev, where);
- *(volatile u16 *) (((int) pci_config_data_reg) + (where & 2)) =
- le16_to_cpu(val);
- //printk("pci_write_word 0x%x = 0x%x\n", where, val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-int pcimt_write_config_dword(struct pci_dev *dev,
- int where, unsigned int val)
-{
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- *pci_config_address_reg = cfgaddr(dev, where);
- *pci_config_data_reg = le32_to_cpu(val);
- //printk("pci_write_dword 0x%x = 0x%x\n", where, val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-
-
-struct pci_ops hp_pci_ops = {
- pcimt_read_config_byte,
- pcimt_read_config_word,
- pcimt_read_config_dword,
- pcimt_write_config_byte,
- pcimt_write_config_word,
- pcimt_write_config_dword
-};
-
-
-struct pci_controller hp_controller = {
- .pci_ops = &hp_pci_ops,
- .io_resource = &ioport_resource,
- .mem_resource = &iomem_resource,
-};
-
-void __init pcibios_fixup_irqs(void)
-{
- struct pci_dev *dev = NULL;
- int slot_num;
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- slot_num = PCI_SLOT(dev->devfn);
- switch (slot_num) {
- case 2:
- dev->irq = 3;
- break;
- case 3:
- dev->irq = 4;
- break;
- case 4:
- dev->irq = 5;
- break;
- default:
- break;
- }
- }
-}
-
-#define IO_MEM_LOGICAL_START 0x3e000000
-#define IO_MEM_LOGICAL_END 0x3fefffff
-
-#define IO_PORT_LOGICAL_START 0x3ff00000
-#define IO_PORT_LOGICAL_END 0x3fffffff
-
-
-#define IO_MEM_VIRTUAL_OFFSET 0xb0000000
-#define IO_PORT_VIRTUAL_OFFSET 0xb0000000
-
-#define ONE_MEG (1024 * 1024)
-
-void __init pci_setup(void)
-{
- u32 pci_regs_base_offset = 0xfdead000;
-
- switch (GetAsicId()) {
- case AndrosAsic:
- pci_regs_base_offset = 0xbff80000;
- break;
- case HarmonyAsic:
- pci_regs_base_offset = 0xbff70000;
- break;
- default:
- printk("ERROR: PCI does not support %s Asic\n",
- GetAsicName());
- while (1);
- break;
- }
-
- // set bus stat/command reg
- // REVIST this setting may need vary depending on the hardware
- *((volatile unsigned int *) (pci_regs_base_offset | 0x0004)) =
- 0x38000007;
-
-
- iomem_resource.start =
- IO_MEM_LOGICAL_START + IO_MEM_VIRTUAL_OFFSET;
- iomem_resource.end = IO_MEM_LOGICAL_END + IO_MEM_VIRTUAL_OFFSET;
-
- ioport_resource.start =
- IO_PORT_LOGICAL_START + IO_PORT_VIRTUAL_OFFSET;
- ioport_resource.end = IO_PORT_LOGICAL_END + IO_PORT_VIRTUAL_OFFSET;
-
- // KLUDGE (mips_io_port_base is screwed up, we've got to work around it here)
- // by letting both low (illegal) and high (legal) addresses appear in pci io space
- ioport_resource.start = 0x0;
-
- set_io_port_base(IO_PORT_LOGICAL_START + IO_PORT_VIRTUAL_OFFSET);
-
- // map the PCI address space
- // global map - all levels & processes can access
- // except that the range is outside user space
- // parameters: lo0, lo1, hi, pagemask
- // lo indicates physical page, hi indicates virtual address
- add_wired_entry((IO_MEM_LOGICAL_START >> 6) | 0x17,
- ((IO_MEM_LOGICAL_START +
- (16 * ONE_MEG)) >> 6) | 0x17, 0xee000000,
- PM_16M);
-
-
- // These are used in pci r/w routines so need to preceed bus scan
- pci_config_data_reg = (u32 *) (((u32) mips_io_port_base) | 0xcfc);
- pci_config_address_reg =
- (u32 *) (((u32) pci_regs_base_offset) | 0xcf8);
-}
+++ /dev/null
-#
-# Makefile for a ramdisk image
-#
-
-obj-y += ramdisk.o
-
-
-O_FORMAT = $(shell $(OBJDUMP) -i | head -n 2 | grep elf32)
-img := $(subst ",,$(CONFIG_EMBEDDED_RAMDISK_IMAGE))
-# add $(src) when $(img) is relative
-img := $(subst $(src)//,/,$(src)/$(img))
-
-quiet_cmd_ramdisk = LD $@
-define cmd_ramdisk
- $(LD) $(LDFLAGS) -T $(src)/ld.script -b binary --oformat $(O_FORMAT) -o $@ $(img)
-endef
-
-$(obj)/ramdisk.o: $(img) $(src)/ld.script
- $(call cmd,ramdisk)
-
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS
-{
- .initrd :
- {
- *(.data)
- }
-}
-
+++ /dev/null
-#
-# Makefile for the NEC Eagle/Hawk specific parts of the kernel
-#
-# Author: Yoichi Yuasa
-# yyuasa@mvista.com or source@mvista.com
-#
-# Copyright 2001,2002 MontaVista Software Inc.
-#
-
-obj-y += irq.o setup.o
+++ /dev/null
-/*
- * irq.c, Interrupt routines for the NEC Eagle/Hawk board.
- *
- * Copyright (C) 2002 MontaVista Software, Inc.
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
- * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-/*
- * Changes:
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * - New creation, NEC Eagle is supported.
- * - Added support for NEC Hawk.
- *
- * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
- * - Changed from board_irq_init to driver module.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/types.h>
-
-#include <asm/io.h>
-#include <asm/vr41xx/eagle.h>
-
-MODULE_DESCRIPTION("IRQ module driver for NEC Eagle/Hawk");
-MODULE_AUTHOR("Yoichi Yuasa <yyuasa@mvista.com>");
-MODULE_LICENSE("GPL");
-
-static void enable_pciint_irq(unsigned int irq)
-{
- uint8_t val;
-
- val = readb(NEC_EAGLE_PCIINTMSKREG);
- val |= (uint8_t)1 << (irq - PCIINT_IRQ_BASE);
- writeb(val, NEC_EAGLE_PCIINTMSKREG);
-}
-
-static void disable_pciint_irq(unsigned int irq)
-{
- uint8_t val;
-
- val = readb(NEC_EAGLE_PCIINTMSKREG);
- val &= ~((uint8_t)1 << (irq - PCIINT_IRQ_BASE));
- writeb(val, NEC_EAGLE_PCIINTMSKREG);
-}
-
-static unsigned int startup_pciint_irq(unsigned int irq)
-{
- enable_pciint_irq(irq);
- return 0; /* never anything pending */
-}
-
-#define shutdown_pciint_irq disable_pciint_irq
-#define ack_pciint_irq disable_pciint_irq
-
-static void end_pciint_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- enable_pciint_irq(irq);
-}
-
-static struct hw_interrupt_type pciint_irq_type = {
- .typename = "PCIINT",
- .startup = startup_pciint_irq,
- .shutdown = shutdown_pciint_irq,
- .enable = enable_pciint_irq,
- .disable = disable_pciint_irq,
- .ack = ack_pciint_irq,
- .end = end_pciint_irq,
-};
-
-static void enable_sdbint_irq(unsigned int irq)
-{
- uint8_t val;
-
- val = readb(NEC_EAGLE_SDBINTMSK);
- val |= (uint8_t)1 << (irq - SDBINT_IRQ_BASE);
- writeb(val, NEC_EAGLE_SDBINTMSK);
-}
-
-static void disable_sdbint_irq(unsigned int irq)
-{
- uint8_t val;
-
- val = readb(NEC_EAGLE_SDBINTMSK);
- val &= ~((uint8_t)1 << (irq - SDBINT_IRQ_BASE));
- writeb(val, NEC_EAGLE_SDBINTMSK);
-}
-
-static unsigned int startup_sdbint_irq(unsigned int irq)
-{
- enable_sdbint_irq(irq);
- return 0; /* never anything pending */
-}
-
-#define shutdown_sdbint_irq disable_sdbint_irq
-#define ack_sdbint_irq disable_sdbint_irq
-
-static void end_sdbint_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- enable_sdbint_irq(irq);
-}
-
-static struct hw_interrupt_type sdbint_irq_type = {
- .typename = "SDBINT",
- .startup = startup_sdbint_irq,
- .shutdown = shutdown_sdbint_irq,
- .enable = enable_sdbint_irq,
- .disable = disable_sdbint_irq,
- .ack = ack_sdbint_irq,
- .end = end_sdbint_irq,
-};
-
-static int eagle_get_irq_number(int irq)
-{
- uint8_t sdbint, pciint;
- int i;
-
- sdbint = readb(NEC_EAGLE_SDBINT);
- sdbint &= (NEC_EAGLE_SDBINT_DEG | NEC_EAGLE_SDBINT_ENUM |
- NEC_EAGLE_SDBINT_SIO1INT | NEC_EAGLE_SDBINT_SIO2INT |
- NEC_EAGLE_SDBINT_PARINT);
- pciint = readb(NEC_EAGLE_PCIINTREG);
- pciint &= (NEC_EAGLE_PCIINT_CP_INTA | NEC_EAGLE_PCIINT_CP_INTB |
- NEC_EAGLE_PCIINT_CP_INTC | NEC_EAGLE_PCIINT_CP_INTD |
- NEC_EAGLE_PCIINT_LANINT);
-
- for (i = 1; i < 6; i++)
- if (sdbint & (0x01 << i))
- return SDBINT_IRQ_BASE + i;
-
- for (i = 0; i < 5; i++)
- if (pciint & (0x01 << i))
- return PCIINT_IRQ_BASE + i;
-
- return -EINVAL;
-}
-
-static int __devinit eagle_irq_init(void)
-{
- int i, retval;
-
- writeb(0, NEC_EAGLE_SDBINTMSK);
- writeb(0, NEC_EAGLE_PCIINTMSKREG);
-
- vr41xx_set_irq_trigger(PCISLOT_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH);
- vr41xx_set_irq_level(PCISLOT_PIN, LEVEL_HIGH);
-
- vr41xx_set_irq_trigger(FPGA_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH);
- vr41xx_set_irq_level(FPGA_PIN, LEVEL_HIGH);
-
- vr41xx_set_irq_trigger(DCD_PIN, TRIGGER_EDGE, SIGNAL_HOLD);
- vr41xx_set_irq_level(DCD_PIN, LEVEL_LOW);
-
- for (i = SDBINT_IRQ_BASE; i <= SDBINT_IRQ_LAST; i++)
- irq_desc[i].handler = &sdbint_irq_type;
-
- for (i = PCIINT_IRQ_BASE; i <= PCIINT_IRQ_LAST; i++)
- irq_desc[i].handler = &pciint_irq_type;
-
- retval = vr41xx_cascade_irq(FPGA_CASCADE_IRQ, eagle_get_irq_number);
- if (retval != 0)
- printk(KERN_ERR "eagle: Cannot cascade IRQ %d\n", FPGA_CASCADE_IRQ);
-
- return retval;
-}
-
-static void __devexit eagle_irq_exit(void)
-{
- free_irq(FPGA_CASCADE_IRQ, NULL);
-}
-
-module_init(eagle_irq_init);
-module_exit(eagle_irq_exit);
+++ /dev/null
-/*
- * arch/mips/vr41xx/nec-eagle/setup.c
- *
- * Setup for the NEC Eagle/Hawk board.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/config.h>
-#include <linux/ioport.h>
-
-#include <asm/io.h>
-#include <asm/pci_channel.h>
-#include <asm/vr41xx/eagle.h>
-
-#ifdef CONFIG_PCI
-
-extern void vrc4173_preinit(void);
-
-static struct resource vr41xx_pci_io_resource = {
- "PCI I/O space",
- VR41XX_PCI_IO_START,
- VR41XX_PCI_IO_END,
- IORESOURCE_IO
-};
-
-static struct resource vr41xx_pci_mem_resource = {
- "PCI memory space",
- VR41XX_PCI_MEM_START,
- VR41XX_PCI_MEM_END,
- IORESOURCE_MEM
-};
-
-extern struct pci_ops vr41xx_pci_ops;
-
-struct pci_controller vr41xx_controller = {
- .pci_ops = &vr41xx_pci_ops,
- .io_resource = &vr41xx_pci_io_resource,
- .mem_resource = &vr41xx_pci_mem_resource,
-};
-
-struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
- VR41XX_PCI_MEM1_BASE,
- VR41XX_PCI_MEM1_MASK,
- IO_MEM1_RESOURCE_START
-};
-
-struct vr41xx_pci_address_space vr41xx_pci_mem2 = {
- VR41XX_PCI_MEM2_BASE,
- VR41XX_PCI_MEM2_MASK,
- IO_MEM2_RESOURCE_START
-};
-
-struct vr41xx_pci_address_space vr41xx_pci_io = {
- VR41XX_PCI_IO_BASE,
- VR41XX_PCI_IO_MASK,
- IO_PORT_RESOURCE_START
-};
-
-static struct vr41xx_pci_address_map pci_address_map = {
- &vr41xx_pci_mem1,
- &vr41xx_pci_mem2,
- &vr41xx_pci_io
-};
-#endif
-
-const char *get_system_type(void)
-{
- return "NEC SDB-VR4122/VR4131(Eagle/Hawk)";
-}
-
-static int nec_eagle_setup(void)
-{
- set_io_port_base(IO_PORT_BASE);
- ioport_resource.start = IO_PORT_RESOURCE_START;
- ioport_resource.end = IO_PORT_RESOURCE_END;
-
-#ifdef CONFIG_SERIAL_8250
- vr41xx_select_siu_interface(SIU_RS232C, IRDA_NONE);
- vr41xx_siu_init();
- vr41xx_dsiu_init();
-#endif
-
-#ifdef CONFIG_PCI
- vr41xx_pciu_init(&pci_address_map);
-
- vrc4173_preinit();
-#endif
-
- return 0;
-}
-
-early_initcall(nec_eagle_setup);
+++ /dev/null
-/*
- * FILE NAME
- * arch/mips/vr41xx/tanbac-tb0229/reboot.c
- *
- * BRIEF MODULE DESCRIPTION
- * Depending on TANBAC TB0229(VR4131DIMM) of reboot system call.
- *
- * Copyright 2003 Megasolution Inc.
- * matsu@megasolution.jp
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/config.h>
-#include <asm/io.h>
-#include <asm/vr41xx/tb0229.h>
-
-#define tb0229_hard_reset() writew(0, TB0219_RESET_REGS)
-
-void tanbac_tb0229_restart(char *command)
-{
- local_irq_disable();
- tb0229_hard_reset();
- while (1);
-}
+++ /dev/null
-/*
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1999 by Helge Deller
- * Copyright 1999 SuSE GmbH (Philipp Rumpf)
- * Copyright 1999 Philipp Rumpf (prumpf@tux.org)
- * Copyright 2000 Hewlett Packard (Paul Bame, bame@puffin.external.hp.com)
- * Copyright (C) 2001 Grant Grundler (Hewlett Packard)
- *
- * Initial Version 04-23-1999 by Helge Deller <deller@gmx.de>
- */
-
-
-#include <linux/autoconf.h> /* for CONFIG_SMP */
-
-#include <asm/offsets.h>
-#include <asm/psw.h>
-
-#include <asm/assembly.h>
-#include <asm/pgtable.h>
-#include <asm/pdc.h> /* for PDC_PSW defines */
-
-
- .level 2.0w
-
- .data
-
- .export boot_args
-boot_args:
- .word 0 /* arg0 */
- .word 0 /* arg1 */
- .word 0 /* arg2 */
- .word 0 /* arg3 */
-
- .text
- .align 4
-
- .export stext
- .export _stext,data /* Kernel want it this way! */
-_stext:
-stext:
- .proc
- .callinfo
-
- /* Make sure sr4-sr7 are set to zero for the kernel address space */
- mtsp %r0,%sr4
- mtsp %r0,%sr5
- mtsp %r0,%sr6
- mtsp %r0,%sr7
-
- /* Clear BSS (shouldn't the boot loader do this?) */
-
- .import __bss_start,data
- .import __bss_stop,data
-
- ldil L%PA(__bss_start),%r3
- ldo R%PA(__bss_start)(%r3),%r3
- ldil L%PA(__bss_stop),%r4
- ldo R%PA(__bss_stop)(%r4),%r4
-$bss_loop:
- cmpb,<<,n %r3,%r4,$bss_loop
- stb,ma %r0,1(%r3)
-
- /* Save away the arguments the boot loader passed in (32 bit args) */
-
- ldil L%PA(boot_args),%r1
- ldo R%PA(boot_args)(%r1),%r1
- stw,ma %arg0,4(%r1)
- stw,ma %arg1,4(%r1)
- stw,ma %arg2,4(%r1)
- stw,ma %arg3,4(%r1)
-
- /* Initialize startup VM. Just map first 8 MB of memory */
-
- ldil L%PA(pg0),%r1
- ldo R%PA(pg0)(%r1),%r1
-
- ldil L%PA(pmd0),%r5
- ldo R%PA(pmd0)(%r5),%r5
- shrd %r5,PxD_VALUE_SHIFT,%r3
- ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
-
- ldil L%PA(swapper_pg_dir),%r4
- ldo R%PA(swapper_pg_dir)(%r4),%r4
-
- mtctl %r4,%cr24 /* Initialize kernel root pointer */
- mtctl %r4,%cr25 /* Initialize user root pointer */
-
- stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
-
- shrd %r1,PxD_VALUE_SHIFT,%r3
- ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
- ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r5
- ldi ASM_PT_INITIAL,%r1
-1:
- stw %r3,0(%r5)
- ldo (ASM_PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
- addib,> -1,%r1,1b
- ldo ASM_PMD_ENTRY_SIZE(%r5),%r5
-
- ldo _PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */
- ldil L%PA(pg0),%r1
- ldo R%PA(pg0)(%r1),%r1
-
-$pgt_fill_loop:
- std,ma %r3,ASM_PTE_ENTRY_SIZE(%r1)
- ldo ASM_PAGE_SIZE(%r3),%r3
- bb,>= %r3,31-KERNEL_INITIAL_ORDER,$pgt_fill_loop
- nop
-
- /* And the RFI Target address too */
- load32 start_kernel, %r11
-
- /* And the stack pointer too */
- load32 PA(init_thread_union+THREAD_SZ_ALGN),%sp
-
- /* And the initial task pointer */
-
- load32 init_thread_union,%r6
- mtctl %r6,%cr30
-
- /* And the interrupt stack */
-
- load32 interrupt_stack,%r6
- mtctl %r6,%cr31
-
- /* Act like PDC just called us - that's how slave CPUs enter */
-#define MEM_PDC_LO 0x388
-#define MEM_PDC_HI 0x35C
- ldw MEM_PDC_LO(%r0),%r3
- ldw MEM_PDC_HI(%r0),%r6
- depd %r6, 31, 32, %r3 /* move to upper word */
-
-#ifdef CONFIG_SMP
- /* Set the smp rendevous address into page zero.
- ** It would be safer to do this in init_smp_config() but
- ** it's just way easier to deal with here because
- ** of 64-bit function ptrs and the address is local to this file.
- */
- ldil L%PA(smp_slave_stext),%r10
- ldo R%PA(smp_slave_stext)(%r10),%r10
- stw %r10,0x10(%r0) /* MEM_RENDEZ */
- stw %r0,0x28(%r0) /* MEM_RENDEZ_HI - assume addr < 4GB */
-
- /* FALLTHROUGH */
- .procend
-
- /*
- ** Code Common to both Monarch and Slave processors.
- ** Entry:
- ** %r3 PDCE_PROC address
- ** %r11 RFI target address.
- **
- ** Caller must init: SR4-7, %sp, %r10, %cr24/25,
- */
-common_stext:
- .proc
- .callinfo
-#else /* CONFIG_SMP */
- /* Clear PDC's CPU handoff address - we won't use it */
- stw %r0,0x10(%r0) /* MEM_RENDEZ */
- stw %r0,0x28(%r0) /* MEM_RENDEZ_HI */
-#endif /* CONFIG_SMP */
-
- /* Save the rfi target address */
- ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10
- tophys_r1 %r10
- std %r11, TASK_PT_GR11(%r10)
-
- /* Switch to wide mode; Superdome doesn't support narrow PDC
- ** calls.
- */
-1: mfia %rp /* clear upper part of pcoq */
- ldo 2f-1b(%rp),%rp
- depdi 0,31,32,%rp
- bv (%rp)
- ssm PSW_SM_W,%r0
-2:
-
- /* Set Wide mode as the "Default" (eg for traps)
- ** First trap occurs *right* after (or part of) rfi for slave CPUs.
- ** Someday, palo might not do this for the Monarch either.
- */
-
- ldo PDC_PSW(%r0),%arg0 /* 21 */
- ldo PDC_PSW_SET_DEFAULTS(%r0),%arg1 /* 2 */
- ldo PDC_PSW_WIDE_BIT(%r0),%arg2 /* 2 */
-
- load32 PA(stext_pdc_ret), %rp
-
- bv (%r3)
- copy %r0,%arg3
-
-stext_pdc_ret:
- /* restore rfi target address*/
- ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10
- tophys_r1 %r10
- ldd TASK_PT_GR11(%r10), %r11
-
- /* PARANOID: clear user scratch/user space SR's */
- mtsp %r0,%sr0
- mtsp %r0,%sr1
- mtsp %r0,%sr2
- mtsp %r0,%sr3
-
- /* Initialize Protection Registers */
- mtctl %r0,%cr8
- mtctl %r0,%cr9
- mtctl %r0,%cr12
- mtctl %r0,%cr13
-
- /* Prepare to RFI! Man all the cannons! */
- tovirt_r1 %sp
-
- /* Initialize the global data pointer */
- load32 __gp,%dp
-
- /* Set up our interrupt table. HPMCs might not work after this! */
- ldil L%PA(fault_vector_20),%r10
- ldo R%PA(fault_vector_20)(%r10),%r10
- mtctl %r10,%cr14
-
- b aligned_rfi
- nop
-
- /* the magic spell */
- .align 256
-aligned_rfi:
- ssm 0,0
- nop /* 1 */
- nop /* 2 */
- nop /* 3 */
- nop /* 4 */
- nop /* 5 */
- nop /* 6 */
- nop /* 7 */
- nop /* 8 */
-
- /* turn off troublesome PSW bits */
- rsm PSW_Q+PSW_I+PSW_D+PSW_P+PSW_R, %r0
-
- /* kernel PSW:
- * - no interruptions except HPMC and TOC (which are handled by PDC)
- * - Q bit set (IODC / PDC interruptions)
- * - big-endian
- * - virtually mapped
- */
- load32 KERNEL_PSW,%r10
- mtctl %r10,%ipsw
-
- /* Set the space pointers for the post-RFI world
- ** Clear the two-level IIA Space Queue, effectively setting
- ** Kernel space.
- */
- mtctl %r0,%cr17 /* Clear IIASQ tail */
- mtctl %r0,%cr17 /* Clear IIASQ head */
-
- /* Load RFI target into PC queue */
- mtctl %r11,%cr18 /* IIAOQ head */
- ldo 4(%r11),%r11
- mtctl %r11,%cr18 /* IIAOQ tail */
-
- /* Jump to hyperspace */
- rfi
- nop
-
- .procend
-
-
-#ifdef CONFIG_SMP
-
- .import smp_init_current_idle_task,data
- .import smp_callin,code
-
-/***************************************************************************
-*
-* smp_slave_stext is executed by all non-monarch Processors when the Monarch
-* pokes the slave CPUs in smp.c:smp_boot_cpus().
-*
-* Once here, registers values are initialized in order to branch to virtual
-* mode. Once all available/eligible CPUs are in virtual mode, all are
-* released and start out by executing their own idle task.
-*****************************************************************************/
-
-
-smp_slave_stext:
- .proc
- .callinfo
-
- /*
- ** Initialize Space registers
- */
- mtsp %r0,%sr4
- mtsp %r0,%sr5
- mtsp %r0,%sr6
- mtsp %r0,%sr7
-
- /* Initialize the SP - monarch sets up smp_init_current_idle_task */
- load32 PA(smp_init_current_idle_task),%sp
- ldd 0(%sp),%sp /* load task address */
- tophys_r1 %sp
- ldd TASK_THREAD_INFO(%sp), %sp
- mtctl %sp,%cr30 /* store in cr30 */
- ldo THREAD_SZ_ALGN(%sp),%sp
- tophys_r1 %sp
-
- /* point CPU to kernel page tables */
- load32 PA(swapper_pg_dir),%r4
- mtctl %r4,%cr24 /* Initialize kernel root pointer */
- mtctl %r4,%cr25 /* Initialize user root pointer */
-
- /* Setup PDCE_PROC entry */
- copy %arg0,%r3
-
- /* Load RFI target address. */
- load32 smp_callin, %r11
-
- /* ok...common code can handle the rest */
- b common_stext
- nop
-
- .procend
-#endif /* CONFIG_SMP */
-
+++ /dev/null
-/*
- * General Purpose functions for the global management of the
- * 8260 Communication Processor Module.
- * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
- * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
- * 2.3.99 Updates
- *
- * In addition to the individual control of the communication
- * channels, there are a few functions that globally affect the
- * communication processor.
- *
- * Buffer descriptors must be allocated from the dual ported memory
- * space. The allocator for that is here. When the communication
- * process is reset, we reclaim the memory available. There is
- * currently no deallocator for this memory.
- */
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/bootmem.h>
-#include <asm/irq.h>
-#include <asm/mpc8260.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/immap_8260.h>
-#include <asm/cpm_8260.h>
-
-static uint dp_alloc_base; /* Starting offset in DP ram */
-static uint dp_alloc_top; /* Max offset + 1 */
-static uint host_buffer; /* One page of host buffer */
-static uint host_end; /* end + 1 */
-cpm8260_t *cpmp; /* Pointer to comm processor space */
-
-/* We allocate this here because it is used almost exclusively for
- * the communication processor devices.
- */
-immap_t *immr;
-
-void
-m8260_cpm_reset(void)
-{
- volatile immap_t *imp;
- volatile cpm8260_t *commproc;
- uint vpgaddr;
-
- immr = imp = (volatile immap_t *)IMAP_ADDR;
- commproc = &imp->im_cpm;
-
- /* Reclaim the DP memory for our use.
- */
- dp_alloc_base = CPM_DATAONLY_BASE;
- dp_alloc_top = dp_alloc_base + CPM_DATAONLY_SIZE;
-
- /* Set the host page for allocation.
- */
- host_buffer =
- (uint) alloc_bootmem_pages(PAGE_SIZE * NUM_CPM_HOST_PAGES);
- host_end = host_buffer + (PAGE_SIZE * NUM_CPM_HOST_PAGES);
-
- vpgaddr = host_buffer;
-
- /* Tell everyone where the comm processor resides.
- */
- cpmp = (cpm8260_t *)commproc;
-}
-
-/* Allocate some memory from the dual ported ram.
- * To help protocols with object alignment restrictions, we do that
- * if they ask.
- */
-uint
-m8260_cpm_dpalloc(uint size, uint align)
-{
- uint retloc;
- uint align_mask, off;
- uint savebase;
-
- align_mask = align - 1;
- savebase = dp_alloc_base;
-
- if ((off = (dp_alloc_base & align_mask)) != 0)
- dp_alloc_base += (align - off);
-
- if ((dp_alloc_base + size) >= dp_alloc_top) {
- dp_alloc_base = savebase;
- return(CPM_DP_NOSPACE);
- }
-
- retloc = dp_alloc_base;
- dp_alloc_base += size;
-
- return(retloc);
-}
-
-/* We also own one page of host buffer space for the allocation of
- * UART "fifos" and the like.
- */
-uint
-m8260_cpm_hostalloc(uint size, uint align)
-{
- uint retloc;
- uint align_mask, off;
- uint savebase;
-
- align_mask = align - 1;
- savebase = host_buffer;
-
- if ((off = (host_buffer & align_mask)) != 0)
- host_buffer += (align - off);
-
- if ((host_buffer + size) >= host_end) {
- host_buffer = savebase;
- return(0);
- }
-
- retloc = host_buffer;
- host_buffer += size;
-
- return(retloc);
-}
-
-/* Set a baud rate generator. This needs lots of work. There are
- * eight BRGs, which can be connected to the CPM channels or output
- * as clocks. The BRGs are in two different block of internal
- * memory mapped space.
- * The baud rate clock is the system clock divided by something.
- * It was set up long ago during the initial boot phase and is
- * is given to us.
- * Baud rate clocks are zero-based in the driver code (as that maps
- * to port numbers). Documentation uses 1-based numbering.
- */
-#define BRG_INT_CLK (((bd_t *)__res)->bi_brgfreq)
-#define BRG_UART_CLK (BRG_INT_CLK/16)
-
-/* This function is used by UARTS, or anything else that uses a 16x
- * oversampled clock.
- */
-void
-m8260_cpm_setbrg(uint brg, uint rate)
-{
- volatile uint *bp;
-
- /* This is good enough to get SMCs running.....
- */
- if (brg < 4) {
- bp = (uint *)&immr->im_brgc1;
- }
- else {
- bp = (uint *)&immr->im_brgc5;
- brg -= 4;
- }
- bp += brg;
- *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
-}
-
-/* This function is used to set high speed synchronous baud rate
- * clocks.
- */
-void
-m8260_cpm_fastbrg(uint brg, uint rate, int div16)
-{
- volatile uint *bp;
-
- if (brg < 4) {
- bp = (uint *)&immr->im_brgc1;
- }
- else {
- bp = (uint *)&immr->im_brgc5;
- brg -= 4;
- }
- bp += brg;
- *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
- if (div16)
- *bp |= CPM_BRG_DIV16;
-}
+++ /dev/null
-/*
- * UART driver for MPC8260 CPM SCC or SMC
- * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
- * Copyright (c) 2000 MontaVista Software, Inc. (source@mvista.com)
- * 2.3.99 updates
- * Copyright (c) 2002 Allen Curtis, Ones and Zeros, Inc. (acurtis@onz.com)
- * 2.5.50 updates
- * Fix the console driver to be registered with initcalls and some minor fixup
- * for 2.6.2, by Petter Larsen, moreCom as (petter.larsen@morecom.no) and
- * Miguel Valero, AxxessIT ASA (miguel.valero@axxessit.no)
- *
- * I used the 8xx uart.c driver as the framework for this driver.
- * The original code was written for the EST8260 board. I tried to make
- * it generic, but there may be some assumptions in the structures that
- * have to be fixed later.
- *
- * The 8xx and 8260 are similar, but not identical. Over time we
- * could probably merge these two drivers.
- * To save porting time, I did not bother to change any object names
- * that are not accessed outside of this file.
- * It still needs lots of work........When it was easy, I included code
- * to support the SCCs.
- * Only the SCCs support modem control, so that is not complete either.
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/timer.h>
-#include <linux/workqueue.h>
-#include <linux/interrupt.h>
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-#include <linux/serial.h>
-#include <linux/serialP.h>
-#include <linux/major.h>
-#include <linux/string.h>
-#include <linux/fcntl.h>
-#include <linux/ptrace.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <asm/uaccess.h>
-#include <asm/immap_8260.h>
-#include <asm/mpc8260.h>
-#include <asm/cpm_8260.h>
-#include <asm/irq.h>
-
-#ifdef CONFIG_MAGIC_SYSRQ
-#include <linux/sysrq.h>
-#endif
-
-#ifdef CONFIG_SERIAL_CONSOLE
-#include <linux/console.h>
-
-/* SCC Console configuration. Not quite finished. The SCC_CONSOLE
- * should be the number of the SCC to use, but only SCC1 will
- * work at this time.
- */
-#ifdef CONFIG_SCC_CONSOLE
-#define SCC_CONSOLE 1
-#endif
-
-/* this defines the index into rs_table for the port to use
-*/
-#ifndef CONFIG_SERIAL_CONSOLE_PORT
-#define CONFIG_SERIAL_CONSOLE_PORT 0
-#endif
-#endif
-#define CONFIG_SERIAL_CONSOLE_PORT 0
-
-#define TX_WAKEUP ASYNC_SHARE_IRQ
-
-static char *serial_name = "CPM UART driver";
-static char *serial_version = "0.02";
-
-static struct tty_driver *serial_driver;
-static int __init serial_console_setup( struct console *co, char *options);
-static void serial_console_write(struct console *c, const char *s,
- unsigned count);
-
-static struct tty_driver *serial_console_device(struct console *c, int *index);
-
-#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
-static unsigned long break_pressed; /* break, really ... */
-#endif
-
-/*
- * Serial driver configuration section. Here are the various options:
- */
-#define SERIAL_PARANOIA_CHECK
-#define CONFIG_SERIAL_NOPAUSE_IO
-#define SERIAL_DO_RESTART
-
-/* Set of debugging defines */
-
-#undef SERIAL_DEBUG_INTR
-#undef SERIAL_DEBUG_OPEN
-#undef SERIAL_DEBUG_FLOW
-#undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
-
-#define _INLINE_ inline
-
-#define DBG_CNT(s)
-
-/* We overload some of the items in the data structure to meet our
- * needs. For example, the port address is the CPM parameter ram
- * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and
- * 2 SMCs. The "hub6" field is used to indicate the channel number, with
- * 0 and 1 indicating the SMCs and 2, 3, 4, and 5 are the SCCs.
- * Since these ports are so versatile, I don't yet have a strategy for
- * their management. For example, SCC1 is used for Ethernet. Right
- * now, just don't put them in the table. Of course, right now I just
- * want the SMC to work as a uart :-)..
- * The "type" field is currently set to 0, for PORT_UNKNOWN. It is
- * not currently used. I should probably use it to indicate the port
- * type of CMS or SCC.
- * The SMCs do not support any modem control signals.
- */
-#define smc_scc_num hub6
-
-/* The choice of serial port to use for KGDB. If the system has
- * two ports, you can use one for console and one for KGDB (which
- * doesn't make sense to me, but people asked for it).
- */
-#ifdef CONFIG_KGDB_TTYS1
-#define KGDB_SER_IDX 1 /* SCC2/SMC2 */
-#else
-#define KGDB_SER_IDX 0 /* SCC1/SMC1 */
-#endif
-
-#ifndef SCC_CONSOLE
-
-/* SMC2 is sometimes used for low performance TDM interfaces. Define
- * this as 1 if you want SMC2 as a serial port UART managed by this driver.
- * Define this as 0 if you wish to use SMC2 for something else.
- */
-#define USE_SMC2 1
-
-/* Define SCC to ttySx mapping.
-*/
-#define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */
-
-/* Define which SCC is the first one to use for a serial port. These
- * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
- * for Ethernet, and the first available SCC for serial UART is SCC2.
- * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and
- * interrupt vectors in the table below to match.
- */
-#define SCC_IDX_BASE 1 /* table index */
-
-static struct serial_state rs_table[] = {
- /* UART CLK PORT IRQ FLAGS NUM */
- { 0, 0, PROFF_SMC1, SIU_INT_SMC1, 0, 0 }, /* SMC1 ttyS0 */
-#ifdef USE_SMC2
- { 0, 0, PROFF_SMC2, SIU_INT_SMC2, 0, 1 }, /* SMC2 ttyS1 */
-#endif
-#ifndef CONFIG_SCC1_ENET
- { 0, 0, PROFF_SCC1, SIU_INT_SCC1, 0, SCC_NUM_BASE}, /* SCC1 ttyS2 */
-#endif
-#if !defined(CONFIG_SBC82xx) && !defined(CONFIG_SCC2_ENET)
- { 0, 0, PROFF_SCC2, SIU_INT_SCC2, 0, SCC_NUM_BASE + 1}, /* SCC2 ttyS3 */
-#endif
-};
-
-#else /* SCC_CONSOLE */
-#define SCC_NUM_BASE 0 /* SCC base tty "number" */
-#define SCC_IDX_BASE 0 /* table index */
-static struct serial_state rs_table[] = {
- /* UART CLK PORT IRQ FLAGS NUM */
- { 0, 0, PROFF_SCC1, SIU_INT_SCC1, 0, SCC_NUM_BASE}, /* SCC1 ttyS2 */
- { 0, 0, PROFF_SCC2, SIU_INT_SCC2, 0, SCC_NUM_BASE + 1}, /* SCC2 ttyS3 */
-};
-#endif /* SCC_CONSOLE */
-
-#define PORT_NUM(P) (((P) < (SCC_NUM_BASE)) ? (P) : (P)-(SCC_NUM_BASE))
-
-#define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
-
-/* The number of buffer descriptors and their sizes.
-*/
-#define RX_NUM_FIFO 4
-#define RX_BUF_SIZE 32
-#define TX_NUM_FIFO 4
-#define TX_BUF_SIZE 32
-
-/* The async_struct in serial.h does not really give us what we
- * need, so define our own here.
- */
-typedef struct serial_info {
- int magic;
- int flags;
- struct serial_state *state;
- struct tty_struct *tty;
- int read_status_mask;
- int ignore_status_mask;
- int timeout;
- int line;
- int x_char; /* xon/xoff character */
- int close_delay;
- unsigned short closing_wait;
- unsigned short closing_wait2;
- unsigned long event;
- unsigned long last_active;
- int blocked_open; /* # of blocked opens */
- struct work_struct tqueue;
- struct work_struct tqueue_hangup;
- wait_queue_head_t open_wait;
- wait_queue_head_t close_wait;
-
- /* CPM Buffer Descriptor pointers.
- */
- cbd_t *rx_bd_base;
- cbd_t *rx_cur;
- cbd_t *tx_bd_base;
- cbd_t *tx_cur;
-} ser_info_t;
-
-static struct console sercons = {
- .name = "ttyS",
- .write = serial_console_write,
- .device = serial_console_device,
- .setup = serial_console_setup,
- .flags = CON_PRINTBUFFER,
- .index = CONFIG_SERIAL_CONSOLE_PORT,
-};
-
-static void change_speed(ser_info_t *info);
-static void rs_8xx_wait_until_sent(struct tty_struct *tty, int timeout);
-
-static inline int serial_paranoia_check(ser_info_t *info,
- char *name, const char *routine)
-{
-#ifdef SERIAL_PARANOIA_CHECK
- static const char *badmagic =
- "Warning: bad magic number for serial struct (%s) in %s\n";
- static const char *badinfo =
- "Warning: null async_struct for (%s) in %s\n";
-
- if (!info) {
- printk(badinfo, name, routine);
- return 1;
- }
- if (info->magic != SERIAL_MAGIC) {
- printk(badmagic, name, routine);
- return 1;
- }
-#endif
- return 0;
-}
-
-/*
- * This is used to figure out the divisor speeds and the timeouts,
- * indexed by the termio value. The generic CPM functions are responsible
- * for setting and assigning baud rate generators for us.
- */
-static int baud_table[] = {
- 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
- 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
-
-
-/*
- * ------------------------------------------------------------
- * rs_stop() and rs_start()
- *
- * This routines are called before setting or resetting tty->stopped.
- * They enable or disable transmitter interrupts, as necessary.
- * ------------------------------------------------------------
- */
-static void rs_8xx_stop(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- int idx;
- unsigned long flags;
- volatile scc_t *sccp;
- volatile smc_t *smcp;
-
- if (serial_paranoia_check(info, tty->name, "rs_stop"))
- return;
-
- save_flags(flags); cli();
- if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
- smcp = &immr->im_smc[idx];
- smcp->smc_smcm &= ~SMCM_TX;
- }
- else {
- sccp = &immr->im_scc[idx - SCC_IDX_BASE];
- sccp->scc_sccm &= ~UART_SCCM_TX;
- }
- restore_flags(flags);
-}
-
-static void rs_8xx_start(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- int idx;
- unsigned long flags;
- volatile scc_t *sccp;
- volatile smc_t *smcp;
-
- if (serial_paranoia_check(info, tty->name, "rs_stop"))
- return;
-
- save_flags(flags); cli();
- if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
- smcp = &immr->im_smc[idx];
- smcp->smc_smcm |= SMCM_TX;
- }
- else {
- sccp = &immr->im_scc[idx - SCC_IDX_BASE];
- sccp->scc_sccm |= UART_SCCM_TX;
- }
- restore_flags(flags);
-}
-
-/*
- * ----------------------------------------------------------------------
- *
- * Here starts the interrupt handling routines. All of the following
- * subroutines are declared as inline and are folded into
- * rs_interrupt(). They were separated out for readability's sake.
- *
- * Note: rs_interrupt() is a "fast" interrupt, which means that it
- * runs with interrupts turned off. People who may want to modify
- * rs_interrupt() should try to keep the interrupt handler as fast as
- * possible. After you are done making modifications, it is not a bad
- * idea to do:
- *
- * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
- *
- * and look at the resulting assemble code in serial.s.
- *
- * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
- * -----------------------------------------------------------------------
- */
-
-/*
- * This routine is used by the interrupt handler to schedule
- * processing in the software interrupt portion of the driver.
- */
-static _INLINE_ void rs_sched_event(ser_info_t *info,
- int event)
-{
- info->event |= 1 << event;
- schedule_work(&info->tqueue);
-}
-
-static _INLINE_ void receive_chars(ser_info_t *info, struct pt_regs *regs)
-{
- struct tty_struct *tty = info->tty;
- unsigned char ch, *cp;
- /*int ignored = 0;*/
- int i;
- ushort status;
- struct async_icount *icount;
- volatile cbd_t *bdp;
-
- icount = &info->state->icount;
-
- /* Just loop through the closed BDs and copy the characters into
- * the buffer.
- */
- bdp = info->rx_cur;
- for (;;) {
- if (bdp->cbd_sc & BD_SC_EMPTY) /* If this one is empty */
- break; /* we are all done */
-
- /* The read status mask tell us what we should do with
- * incoming characters, especially if errors occur.
- * One special case is the use of BD_SC_EMPTY. If
- * this is not set, we are supposed to be ignoring
- * inputs. In this case, just mark the buffer empty and
- * continue.
- if (!(info->read_status_mask & BD_SC_EMPTY)) {
- bdp->cbd_sc |= BD_SC_EMPTY;
- bdp->cbd_sc &=
- ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
-
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = info->rx_bd_base;
- else
- bdp++;
- continue;
- }
- */
-
- /* Get the number of characters and the buffer pointer.
- */
- i = bdp->cbd_datlen;
- cp = (unsigned char *)__va(bdp->cbd_bufaddr);
- status = bdp->cbd_sc;
-#ifdef CONFIG_KGDB
- if (info->state->smc_scc_num == KGDB_SER_IDX) {
- if (*cp == 0x03 || *cp == '$')
- breakpoint();
- return;
- }
-#endif
-
- /* Check to see if there is room in the tty buffer for
- * the characters in our BD buffer. If not, we exit
- * now, leaving the BD with the characters. We'll pick
- * them up again on the next receive interrupt (which could
- * be a timeout).
- */
- if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE)
- break;
-
- while (i-- > 0) {
- ch = *cp++;
- *tty->flip.char_buf_ptr = ch;
- icount->rx++;
-
-#ifdef SERIAL_DEBUG_INTR
- printk("DR%02x:%02x...", ch, *status);
-#endif
- *tty->flip.flag_buf_ptr = 0;
- if (status & (BD_SC_BR | BD_SC_FR |
- BD_SC_PR | BD_SC_OV)) {
- /*
- * For statistics only
- */
- if (status & BD_SC_BR)
- icount->brk++;
- else if (status & BD_SC_PR)
- icount->parity++;
- else if (status & BD_SC_FR)
- icount->frame++;
- if (status & BD_SC_OV)
- icount->overrun++;
-
- /*
- * Now check to see if character should be
- * ignored, and mask off conditions which
- * should be ignored.
- if (status & info->ignore_status_mask) {
- if (++ignored > 100)
- break;
- continue;
- }
- */
- status &= info->read_status_mask;
-
- if (status & (BD_SC_BR)) {
-#ifdef SERIAL_DEBUG_INTR
- printk("handling break....");
-#endif
- *tty->flip.flag_buf_ptr = TTY_BREAK;
- if (info->flags & ASYNC_SAK)
- do_SAK(tty);
- } else if (status & BD_SC_PR)
- *tty->flip.flag_buf_ptr = TTY_PARITY;
- else if (status & BD_SC_FR)
- *tty->flip.flag_buf_ptr = TTY_FRAME;
- if (status & BD_SC_OV) {
- /*
- * Overrun is special, since it's
- * reported immediately, and doesn't
- * affect the current character
- */
- if (tty->flip.count < TTY_FLIPBUF_SIZE) {
- tty->flip.count++;
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- *tty->flip.flag_buf_ptr =
- TTY_OVERRUN;
- }
- }
- }
-
-#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
- if (break_pressed && info->line == sercons.index) {
- if (ch != 0 && time_before(jiffies,
- break_pressed + HZ*5)) {
- handle_sysrq(ch, regs, NULL);
- break_pressed = 0;
- goto ignore_char;
- } else
- break_pressed = 0;
- }
-#endif
-
- if (tty->flip.count >= TTY_FLIPBUF_SIZE)
- break;
-
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- tty->flip.count++;
- }
-
-#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
- ignore_char:
-#endif
-
- /* This BD is ready to be used again. Clear status.
- * Get next BD.
- */
- bdp->cbd_sc |= BD_SC_EMPTY;
- bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
-
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = info->rx_bd_base;
- else
- bdp++;
- }
-
- info->rx_cur = (cbd_t *)bdp;
-
- schedule_delayed_work(&tty->flip.work, 1);
-}
-
-static _INLINE_ void receive_break(ser_info_t *info, struct pt_regs *regs)
-{
- struct tty_struct *tty = info->tty;
-
- info->state->icount.brk++;
-
-#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
- if (info->line == sercons.index) {
- if (!break_pressed) {
- break_pressed = jiffies;
- return;
- } else
- break_pressed = 0;
- }
-#endif
-
- /* Check to see if there is room in the tty buffer for
- * the break. If not, we exit now, losing the break. FIXME
- */
- if ((tty->flip.count + 1) >= TTY_FLIPBUF_SIZE)
- return;
- *(tty->flip.flag_buf_ptr++) = TTY_BREAK;
- *(tty->flip.char_buf_ptr++) = 0;
- tty->flip.count++;
-}
-
-
-static _INLINE_ void transmit_chars(ser_info_t *info, struct pt_regs *regs)
-{
-
- if (info->flags & TX_WAKEUP) {
- rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
- }
-
-#ifdef SERIAL_DEBUG_INTR
- printk("THRE...");
-#endif
-}
-
-#ifdef notdef
- /* I need to do this for the SCCs, so it is left as a reminder.
- */
-static _INLINE_ void check_modem_status(struct async_struct *info)
-{
- int status;
- struct async_icount *icount;
-
- status = serial_in(info, UART_MSR);
-
- if (status & UART_MSR_ANY_DELTA) {
- icount = &info->state->icount;
- /* update input line counters */
- if (status & UART_MSR_TERI)
- icount->rng++;
- if (status & UART_MSR_DDSR)
- icount->dsr++;
- if (status & UART_MSR_DDCD) {
- icount->dcd++;
-#ifdef CONFIG_HARD_PPS
- if ((info->flags & ASYNC_HARDPPS_CD) &&
- (status & UART_MSR_DCD))
- hardpps();
-#endif
- }
- if (status & UART_MSR_DCTS)
- icount->cts++;
- wake_up_interruptible(&info->delta_msr_wait);
- }
-
- if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
-#if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
- printk("ttys%d CD now %s...", info->line,
- (status & UART_MSR_DCD) ? "on" : "off");
-#endif
- if (status & UART_MSR_DCD)
- wake_up_interruptible(&info->open_wait);
- else {
-#ifdef SERIAL_DEBUG_OPEN
- printk("scheduling hangup...");
-#endif
- schedule_work(&info->tqueue_hangup);
- }
- }
- if (info->flags & ASYNC_CTS_FLOW) {
- if (info->tty->hw_stopped) {
- if (status & UART_MSR_CTS) {
-#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
- printk("CTS tx start...");
-#endif
- info->tty->hw_stopped = 0;
- info->IER |= UART_IER_THRI;
- serial_out(info, UART_IER, info->IER);
- rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
- return;
- }
- } else {
- if (!(status & UART_MSR_CTS)) {
-#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
- printk("CTS tx stop...");
-#endif
- info->tty->hw_stopped = 1;
- info->IER &= ~UART_IER_THRI;
- serial_out(info, UART_IER, info->IER);
- }
- }
- }
-}
-#endif
-
-/*
- * This is the serial driver's interrupt routine for a single port
- */
-static irqreturn_t rs_8xx_interrupt(int irq, void * dev_id, struct pt_regs * regs)
-{
- u_char events;
- int idx;
- ser_info_t *info;
- volatile smc_t *smcp;
- volatile scc_t *sccp;
-
- info = (ser_info_t *)dev_id;
-
- if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
- smcp = &immr->im_smc[idx];
- events = smcp->smc_smce;
- if (events & SMCM_BRKE)
- receive_break(info, regs);
- if (events & SMCM_RX)
- receive_chars(info, regs);
- if (events & SMCM_TX)
- transmit_chars(info, regs);
- smcp->smc_smce = events;
- }
- else {
- sccp = &immr->im_scc[idx - SCC_IDX_BASE];
- events = sccp->scc_scce;
- if (events & SMCM_BRKE)
- receive_break(info, regs);
- if (events & SCCM_RX)
- receive_chars(info, regs);
- if (events & SCCM_TX)
- transmit_chars(info, regs);
- sccp->scc_scce = events;
- }
-
-#ifdef SERIAL_DEBUG_INTR
- printk("rs_interrupt_single(%d, %x)...",
- info->state->smc_scc_num, events);
-#endif
-#ifdef modem_control
- check_modem_status(info);
-#endif
- info->last_active = jiffies;
-#ifdef SERIAL_DEBUG_INTR
- printk("end.\n");
-#endif
- return IRQ_HANDLED;
-}
-
-
-/*
- * -------------------------------------------------------------------
- * Here ends the serial interrupt routines.
- * -------------------------------------------------------------------
- */
-
-/*
- * This routine is used to handle the "bottom half" processing for the
- * serial driver, known also the "software interrupt" processing.
- * This processing is done at the kernel interrupt level, after the
- * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
- * is where time-consuming activities which can not be done in the
- * interrupt driver proper are done; the interrupt driver schedules
- * them using rs_sched_event(), and they get done here.
- */
-static void do_softint(void *private_)
-{
- ser_info_t *info = (ser_info_t *) private_;
- struct tty_struct *tty;
-
- tty = info->tty;
- if (!tty)
- return;
-
- if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
- wake_up_interruptible(&tty->write_wait);
- }
-}
-
-/*
- * This routine is called from the scheduler work queue when the interrupt
- * routine has signalled that a hangup has occurred. The path of
- * hangup processing is:
- *
- * serial interrupt routine -> (scheduler tqueue) ->
- * do_serial_hangup() -> tty->hangup() -> rs_hangup()
- *
- */
-static void do_serial_hangup(void *private_)
-{
- struct async_struct *info = (struct async_struct *) private_;
- struct tty_struct *tty;
-
- tty = info->tty;
- if (tty)
- tty_hangup(tty);
-}
-
-/*static void rs_8xx_timer(void)
-{
- printk("rs_8xx_timer\n");
-}*/
-
-
-static int startup(ser_info_t *info)
-{
- unsigned long flags;
- int retval=0;
- int idx;
- struct serial_state *state= info->state;
- volatile smc_t *smcp;
- volatile scc_t *sccp;
- volatile smc_uart_t *up;
- volatile scc_uart_t *scup;
-
-
- save_flags(flags); cli();
-
- if (info->flags & ASYNC_INITIALIZED) {
- goto errout;
- }
-
-#ifdef maybe
- if (!state->port || !state->type) {
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
- goto errout;
- }
-#endif
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("starting up ttys%d (irq %d)...", info->line, state->irq);
-#endif
-
-
-#ifdef modem_control
- info->MCR = 0;
- if (info->tty->termios->c_cflag & CBAUD)
- info->MCR = UART_MCR_DTR | UART_MCR_RTS;
-#endif
-
- if (info->tty)
- clear_bit(TTY_IO_ERROR, &info->tty->flags);
-
- /*
- * and set the speed of the serial port
- */
- change_speed(info);
-
- if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
- smcp = &immr->im_smc[idx];
-
- /* Enable interrupts and I/O.
- */
- smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
- smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
-
- /* We can tune the buffer length and idle characters
- * to take advantage of the entire incoming buffer size.
- * If mrblr is something other than 1, maxidl has to be
- * non-zero or we never get an interrupt. The maxidl
- * is the number of character times we wait after reception
- * of the last character before we decide no more characters
- * are coming.
- */
- up = (smc_uart_t *)&immr->im_dprambase[state->port];
-#if 0
- up->smc_mrblr = 1; /* receive buffer length */
- up->smc_maxidl = 0; /* wait forever for next char */
-#else
- up->smc_mrblr = RX_BUF_SIZE;
- up->smc_maxidl = RX_BUF_SIZE;
-#endif
- up->smc_brkcr = 1; /* number of break chars */
- }
- else {
- sccp = &immr->im_scc[idx - SCC_IDX_BASE];
- scup = (scc_uart_t *)&immr->im_dprambase[state->port];
-#if 0
- scup->scc_genscc.scc_mrblr = 1; /* receive buffer length */
- scup->scc_maxidl = 0; /* wait forever for next char */
-#else
- scup->scc_genscc.scc_mrblr = RX_BUF_SIZE;
- scup->scc_maxidl = RX_BUF_SIZE;
-#endif
-
- sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
- sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- }
-
- info->flags |= ASYNC_INITIALIZED;
- restore_flags(flags);
- return 0;
-
-errout:
- restore_flags(flags);
- return retval;
-}
-
-/*
- * This routine will shutdown a serial port; interrupts are disabled, and
- * DTR is dropped if the hangup on close termio flag is on.
- */
-static void shutdown(ser_info_t * info)
-{
- unsigned long flags;
- struct serial_state *state;
- int idx;
- volatile smc_t *smcp;
- volatile scc_t *sccp;
-
- if (!(info->flags & ASYNC_INITIALIZED))
- return;
-
- state = info->state;
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("Shutting down serial port %d (irq %d)....", info->line,
- state->irq);
-#endif
-
- save_flags(flags); cli(); /* Disable interrupts */
-
- if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
- smcp = &immr->im_smc[idx];
-
- /* Disable interrupts and I/O.
- */
- smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
-#ifdef CONFIG_SERIAL_CONSOLE
- /* We can't disable the transmitter if this is the
- * system console.
- */
- if (idx != CONFIG_SERIAL_CONSOLE_PORT)
-#endif
- smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
- }
- else {
- sccp = &immr->im_scc[idx - SCC_IDX_BASE];
- sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
-#ifdef CONFIG_SERIAL_CONSOLE
- if (idx != CONFIG_SERIAL_CONSOLE_PORT)
- sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
- }
-
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
-
- info->flags &= ~ASYNC_INITIALIZED;
- restore_flags(flags);
-}
-
-/*
- * This routine is called to set the UART divisor registers to match
- * the specified baud rate for a serial port.
- */
-static void change_speed(ser_info_t *info)
-{
- int baud_rate;
- unsigned cflag, cval, scval, prev_mode;
- int i, bits, sbits, idx;
- unsigned long flags;
- volatile smc_t *smcp;
- volatile scc_t *sccp;
-
- if (!info->tty || !info->tty->termios)
- return;
- cflag = info->tty->termios->c_cflag;
-
- /* Character length programmed into the mode register is the
- * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
- * 1 or 2 stop bits, minus 1.
- * The value 'bits' counts this for us.
- */
- cval = 0;
- scval = 0;
-
- /* byte size and parity */
- switch (cflag & CSIZE) {
- case CS5: bits = 5; break;
- case CS6: bits = 6; break;
- case CS7: bits = 7; break;
- case CS8: bits = 8; break;
- /* Never happens, but GCC is too dumb to figure it out */
- default: bits = 8; break;
- }
- sbits = bits - 5;
-
- if (cflag & CSTOPB) {
- cval |= SMCMR_SL; /* Two stops */
- scval |= SCU_PMSR_SL;
- bits++;
- }
- if (cflag & PARENB) {
- cval |= SMCMR_PEN;
- scval |= SCU_PMSR_PEN;
- bits++;
- }
- if (!(cflag & PARODD)) {
- cval |= SMCMR_PM_EVEN;
- scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
- }
-
- /* Determine divisor based on baud rate */
- i = cflag & CBAUD;
- if (i >= (sizeof(baud_table)/sizeof(int)))
- baud_rate = 9600;
- else
- baud_rate = baud_table[i];
-
- info->timeout = (TX_BUF_SIZE*HZ*bits);
- info->timeout += HZ/50; /* Add .02 seconds of slop */
-
-#ifdef modem_control
- /* CTS flow control flag and modem status interrupts */
- info->IER &= ~UART_IER_MSI;
- if (info->flags & ASYNC_HARDPPS_CD)
- info->IER |= UART_IER_MSI;
- if (cflag & CRTSCTS) {
- info->flags |= ASYNC_CTS_FLOW;
- info->IER |= UART_IER_MSI;
- } else
- info->flags &= ~ASYNC_CTS_FLOW;
- if (cflag & CLOCAL)
- info->flags &= ~ASYNC_CHECK_CD;
- else {
- info->flags |= ASYNC_CHECK_CD;
- info->IER |= UART_IER_MSI;
- }
- serial_out(info, UART_IER, info->IER);
-#endif
-
- /*
- * Set up parity check flag
- */
-#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
-
- info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
- if (I_INPCK(info->tty))
- info->read_status_mask |= BD_SC_FR | BD_SC_PR;
- if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
- info->read_status_mask |= BD_SC_BR;
-
- /*
- * Characters to ignore
- */
- info->ignore_status_mask = 0;
- if (I_IGNPAR(info->tty))
- info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
- if (I_IGNBRK(info->tty)) {
- info->ignore_status_mask |= BD_SC_BR;
- /*
- * If we're ignore parity and break indicators, ignore
- * overruns too. (For real raw support).
- */
- if (I_IGNPAR(info->tty))
- info->ignore_status_mask |= BD_SC_OV;
- }
- /*
- * !!! ignore all characters if CREAD is not set
- */
- if ((cflag & CREAD) == 0)
- info->read_status_mask &= ~BD_SC_EMPTY;
- save_flags(flags); cli();
-
- /* Start bit has not been added (so don't, because we would just
- * subtract it later), and we need to add one for the number of
- * stops bits (there is always at least one).
- */
- bits++;
- if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
- smcp = &immr->im_smc[idx];
-
- /* Set the mode register. We want to keep a copy of the
- * enables, because we want to put them back if they were
- * present.
- */
- prev_mode = smcp->smc_smcmr;
- smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
- smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
- }
- else {
- sccp = &immr->im_scc[idx - SCC_IDX_BASE];
- sccp->scc_pmsr = (sbits << 12) | scval;
- }
-
- m8260_cpm_setbrg(info->state->smc_scc_num, baud_rate);
-
- restore_flags(flags);
-}
-
-static void rs_8xx_put_char(struct tty_struct *tty, unsigned char ch)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- volatile cbd_t *bdp;
-
- if (serial_paranoia_check(info, tty->name, "rs_put_char"))
- return;
-
- if (!tty)
- return;
-
- bdp = info->tx_cur;
- while (bdp->cbd_sc & BD_SC_READY);
-
- *((char *)__va(bdp->cbd_bufaddr)) = ch;
- bdp->cbd_datlen = 1;
- bdp->cbd_sc |= BD_SC_READY;
-
- /* Get next BD.
- */
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = info->tx_bd_base;
- else
- bdp++;
-
- info->tx_cur = (cbd_t *)bdp;
-
-}
-
-static int rs_8xx_write(struct tty_struct * tty, int from_user,
- const unsigned char *buf, int count)
-{
- int c, ret = 0;
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- volatile cbd_t *bdp;
-
- if (serial_paranoia_check(info, tty->name, "rs_write"))
- return 0;
-
- if (!tty)
- return 0;
-
- bdp = info->tx_cur;
-
- while (1) {
- c = min(count, TX_BUF_SIZE);
-
- if (c <= 0)
- break;
-
- if (bdp->cbd_sc & BD_SC_READY) {
- info->flags |= TX_WAKEUP;
- break;
- }
-
- if (from_user) {
- if (copy_from_user(__va(bdp->cbd_bufaddr), buf, c)) {
- if (!ret)
- ret = -EFAULT;
- break;
- }
- } else {
- memcpy(__va(bdp->cbd_bufaddr), buf, c);
- }
-
- bdp->cbd_datlen = c;
- bdp->cbd_sc |= BD_SC_READY;
-
- buf += c;
- count -= c;
- ret += c;
-
- /* Get next BD.
- */
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = info->tx_bd_base;
- else
- bdp++;
- info->tx_cur = (cbd_t *)bdp;
- }
- return ret;
-}
-
-static int rs_8xx_write_room(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- int ret;
-
- if (serial_paranoia_check(info, tty->name, "rs_write_room"))
- return 0;
-
- if ((info->tx_cur->cbd_sc & BD_SC_READY) == 0) {
- info->flags &= ~TX_WAKEUP;
- ret = TX_BUF_SIZE;
- }
- else {
- info->flags |= TX_WAKEUP;
- ret = 0;
- }
- return ret;
-}
-
-/* I could track this with transmit counters....maybe later.
-*/
-static int rs_8xx_chars_in_buffer(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-
- if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
- return 0;
- return 0;
-}
-
-static void rs_8xx_flush_buffer(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-
- if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
- return;
-
- /* There is nothing to "flush", whatever we gave the CPM
- * is on its way out.
- */
- wake_up_interruptible(&tty->write_wait);
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
- info->flags &= ~TX_WAKEUP;
-}
-
-/*
- * This function is used to send a high-priority XON/XOFF character to
- * the device
- */
-static void rs_8xx_send_xchar(struct tty_struct *tty, char ch)
-{
- volatile cbd_t *bdp;
-
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-
- if (serial_paranoia_check(info, tty->name, "rs_send_char"))
- return;
-
- bdp = info->tx_cur;
- while (bdp->cbd_sc & BD_SC_READY);
-
- *((char *)__va(bdp->cbd_bufaddr)) = ch;
- bdp->cbd_datlen = 1;
- bdp->cbd_sc |= BD_SC_READY;
-
- /* Get next BD.
- */
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = info->tx_bd_base;
- else
- bdp++;
-
- info->tx_cur = (cbd_t *)bdp;
-}
-
-/*
- * ------------------------------------------------------------
- * rs_throttle()
- *
- * This routine is called by the upper-layer tty layer to signal that
- * incoming characters should be throttled.
- * ------------------------------------------------------------
- */
-static void rs_8xx_throttle(struct tty_struct * tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-#ifdef SERIAL_DEBUG_THROTTLE
- char buf[64];
-
- printk("throttle %s: %d....\n", _tty_name(tty, buf),
- tty->ldisc.chars_in_buffer(tty));
-#endif
-
- if (serial_paranoia_check(info, tty->name, "rs_throttle"))
- return;
-
- if (I_IXOFF(tty))
- rs_8xx_send_xchar(tty, STOP_CHAR(tty));
-
-#ifdef modem_control
- if (tty->termios->c_cflag & CRTSCTS)
- info->MCR &= ~UART_MCR_RTS;
-
- cli();
- serial_out(info, UART_MCR, info->MCR);
- sti();
-#endif
-}
-
-static void rs_8xx_unthrottle(struct tty_struct * tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-#ifdef SERIAL_DEBUG_THROTTLE
- char buf[64];
-
- printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
- tty->ldisc.chars_in_buffer(tty));
-#endif
-
- if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
- return;
-
- if (I_IXOFF(tty)) {
- if (info->x_char)
- info->x_char = 0;
- else
- rs_8xx_send_xchar(tty, START_CHAR(tty));
- }
-#ifdef modem_control
- if (tty->termios->c_cflag & CRTSCTS)
- info->MCR |= UART_MCR_RTS;
- cli();
- serial_out(info, UART_MCR, info->MCR);
- sti();
-#endif
-}
-
-/*
- * ------------------------------------------------------------
- * rs_ioctl() and friends
- * ------------------------------------------------------------
- */
-
-#ifdef maybe
-/*
- * get_lsr_info - get line status register info
- *
- * Purpose: Let user call ioctl() to get info when the UART physically
- * is emptied. On bus types like RS485, the transmitter must
- * release the bus after transmitting. This must be done when
- * the transmit shift register is empty, not be done when the
- * transmit holding register is empty. This functionality
- * allows an RS485 driver to be written in user space.
- */
-static int get_lsr_info(struct async_struct * info, unsigned int *value)
-{
- unsigned char status;
- unsigned int result;
-
- cli();
- status = serial_in(info, UART_LSR);
- sti();
- result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
- return put_user(result,value);
-}
-#endif
-
-static int get_modem_info(ser_info_t *info, unsigned int *value)
-{
- unsigned int result = 0;
-#ifdef modem_control
- unsigned char control, status;
-
- control = info->MCR;
- cli();
- status = serial_in(info, UART_MSR);
- sti();
- result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
- | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
-#ifdef TIOCM_OUT1
- | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
- | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
-#endif
- | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
- | ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
- | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
- | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
-#endif
- return put_user(result,value);
-}
-
-static int set_modem_info(ser_info_t *info, unsigned int cmd,
- unsigned int *value)
-{
- int error;
- unsigned int arg;
-
- error = get_user(arg, value);
- if (error)
- return error;
-#ifdef modem_control
- switch (cmd) {
- case TIOCMBIS:
- if (arg & TIOCM_RTS)
- info->MCR |= UART_MCR_RTS;
- if (arg & TIOCM_DTR)
- info->MCR |= UART_MCR_DTR;
-#ifdef TIOCM_OUT1
- if (arg & TIOCM_OUT1)
- info->MCR |= UART_MCR_OUT1;
- if (arg & TIOCM_OUT2)
- info->MCR |= UART_MCR_OUT2;
-#endif
- break;
- case TIOCMBIC:
- if (arg & TIOCM_RTS)
- info->MCR &= ~UART_MCR_RTS;
- if (arg & TIOCM_DTR)
- info->MCR &= ~UART_MCR_DTR;
-#ifdef TIOCM_OUT1
- if (arg & TIOCM_OUT1)
- info->MCR &= ~UART_MCR_OUT1;
- if (arg & TIOCM_OUT2)
- info->MCR &= ~UART_MCR_OUT2;
-#endif
- break;
- case TIOCMSET:
- info->MCR = ((info->MCR & ~(UART_MCR_RTS |
-#ifdef TIOCM_OUT1
- UART_MCR_OUT1 |
- UART_MCR_OUT2 |
-#endif
- UART_MCR_DTR))
- | ((arg & TIOCM_RTS) ? UART_MCR_RTS : 0)
-#ifdef TIOCM_OUT1
- | ((arg & TIOCM_OUT1) ? UART_MCR_OUT1 : 0)
- | ((arg & TIOCM_OUT2) ? UART_MCR_OUT2 : 0)
-#endif
- | ((arg & TIOCM_DTR) ? UART_MCR_DTR : 0));
- break;
- default:
- return -EINVAL;
- }
- cli();
- serial_out(info, UART_MCR, info->MCR);
- sti();
-#endif
- return 0;
-}
-
-/* Sending a break is a two step process on the SMC/SCC. It is accomplished
- * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
- * command. We take advantage of the begin/end functions to make this
- * happen.
- */
-static void begin_break(ser_info_t *info)
-{
- volatile cpm8260_t *cp;
- uint page, sblock;
- int num;
-
- cp = cpmp;
-
- if ((num = info->state->smc_scc_num) < SCC_NUM_BASE) {
- if (num == 0) {
- page = CPM_CR_SMC1_PAGE;
- sblock = CPM_CR_SMC1_SBLOCK;
- }
- else {
- page = CPM_CR_SMC2_PAGE;
- sblock = CPM_CR_SMC2_SBLOCK;
- }
- }
- else {
- num -= SCC_NUM_BASE;
- switch (num) {
- case 0:
- page = CPM_CR_SCC1_PAGE;
- sblock = CPM_CR_SCC1_SBLOCK;
- break;
- case 1:
- page = CPM_CR_SCC2_PAGE;
- sblock = CPM_CR_SCC2_SBLOCK;
- break;
- case 2:
- page = CPM_CR_SCC3_PAGE;
- sblock = CPM_CR_SCC3_SBLOCK;
- break;
- case 3:
- page = CPM_CR_SCC4_PAGE;
- sblock = CPM_CR_SCC4_SBLOCK;
- break;
- default: return;
- }
- }
- cp->cp_cpcr = mk_cr_cmd(page, sblock, 0, CPM_CR_STOP_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-}
-
-static void end_break(ser_info_t *info)
-{
- volatile cpm8260_t *cp;
- uint page, sblock;
- int num;
-
- cp = cpmp;
-
- if ((num = info->state->smc_scc_num) < SCC_NUM_BASE) {
- if (num == 0) {
- page = CPM_CR_SMC1_PAGE;
- sblock = CPM_CR_SMC1_SBLOCK;
- }
- else {
- page = CPM_CR_SMC2_PAGE;
- sblock = CPM_CR_SMC2_SBLOCK;
- }
- }
- else {
- num -= SCC_NUM_BASE;
- switch (num) {
- case 0:
- page = CPM_CR_SCC1_PAGE;
- sblock = CPM_CR_SCC1_SBLOCK;
- break;
- case 1:
- page = CPM_CR_SCC2_PAGE;
- sblock = CPM_CR_SCC2_SBLOCK;
- break;
- case 2:
- page = CPM_CR_SCC3_PAGE;
- sblock = CPM_CR_SCC3_SBLOCK;
- break;
- case 3:
- page = CPM_CR_SCC4_PAGE;
- sblock = CPM_CR_SCC4_SBLOCK;
- break;
- default: return;
- }
- }
- cp->cp_cpcr = mk_cr_cmd(page, sblock, 0, CPM_CR_RESTART_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-}
-
-/*
- * This routine sends a break character out the serial port.
- */
-static void send_break(ser_info_t *info, int duration)
-{
- current->state = TASK_INTERRUPTIBLE;
-#ifdef SERIAL_DEBUG_SEND_BREAK
- printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
-#endif
- begin_break(info);
- schedule_timeout(duration);
- end_break(info);
-#ifdef SERIAL_DEBUG_SEND_BREAK
- printk("done jiffies=%lu\n", jiffies);
-#endif
-}
-
-
-static int rs_8xx_ioctl(struct tty_struct *tty, struct file * file,
- unsigned int cmd, unsigned long arg)
-{
- int error;
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- int retval;
- struct async_icount cnow; /* kernel counter temps */
- struct serial_icounter_struct *p_cuser; /* user space */
-
- if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
- return -ENODEV;
-
- if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
- if (tty->flags & (1 << TTY_IO_ERROR))
- return -EIO;
- }
-
- switch (cmd) {
- case TCSBRK: /* SVID version: non-zero arg --> no break */
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- tty_wait_until_sent(tty, 0);
- if (signal_pending(current))
- return -EINTR;
- if (!arg) {
- send_break(info, HZ/4); /* 1/4 second */
- if (signal_pending(current))
- return -EINTR;
- }
- return 0;
- case TCSBRKP: /* support for POSIX tcsendbreak() */
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- tty_wait_until_sent(tty, 0);
- if (signal_pending(current))
- return -EINTR;
- send_break(info, arg ? arg*(HZ/10) : HZ/4);
- if (signal_pending(current))
- return -EINTR;
- return 0;
- case TIOCSBRK:
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- tty_wait_until_sent(tty, 0);
- begin_break(info);
- return 0;
- case TIOCCBRK:
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- end_break(info);
- return 0;
- case TIOCGSOFTCAR:
- return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
- case TIOCSSOFTCAR:
- error = get_user(arg, (unsigned int *) arg);
- if (error)
- return error;
- tty->termios->c_cflag =
- ((tty->termios->c_cflag & ~CLOCAL) |
- (arg ? CLOCAL : 0));
- return 0;
- case TIOCMGET:
- return get_modem_info(info, (unsigned int *) arg);
- case TIOCMBIS:
- case TIOCMBIC:
- case TIOCMSET:
- return set_modem_info(info, cmd, (unsigned int *) arg);
-#ifdef maybe
- case TIOCSERGETLSR: /* Get line status register */
- return get_lsr_info(info, (unsigned int *) arg);
-#endif
- /*
- * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
- * - mask passed in arg for lines of interest
- * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
- * Caller should use TIOCGICOUNT to see which one it was
- */
- case TIOCMIWAIT:
-#ifdef modem_control
- cli();
- /* note the counters on entry */
- cprev = info->state->icount;
- sti();
- while (1) {
- interruptible_sleep_on(&info->delta_msr_wait);
- /* see if a signal did it */
- if (signal_pending(current))
- return -ERESTARTSYS;
- cli();
- cnow = info->state->icount; /* atomic copy */
- sti();
- if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
- cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
- return -EIO; /* no change => error */
- if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
- ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
- ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
- ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
- return 0;
- }
- cprev = cnow;
- }
- /* NOTREACHED */
-#else
- return 0;
-#endif
-
- /*
- * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
- * Return: write counters to the user passed counter struct
- * NB: both 1->0 and 0->1 transitions are counted except for
- * RI where only 0->1 is counted.
- */
- case TIOCGICOUNT:
- cli();
- cnow = info->state->icount;
- sti();
- p_cuser = (struct serial_icounter_struct *) arg;
- error = put_user(cnow.cts, &p_cuser->cts);
- if (error) return error;
- error = put_user(cnow.dsr, &p_cuser->dsr);
- if (error) return error;
- error = put_user(cnow.rng, &p_cuser->rng);
- if (error) return error;
- error = put_user(cnow.dcd, &p_cuser->dcd);
- if (error) return error;
- return 0;
-
- default:
- return -ENOIOCTLCMD;
- }
- return 0;
-}
-
-/* FIX UP modem control here someday......
-*/
-static void rs_8xx_set_termios(struct tty_struct *tty, struct termios *old_termios)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-
- if ( (tty->termios->c_cflag == old_termios->c_cflag)
- && ( RELEVANT_IFLAG(tty->termios->c_iflag)
- == RELEVANT_IFLAG(old_termios->c_iflag)))
- return;
-
- change_speed(info);
-
-#ifdef modem_control
- /* Handle transition to B0 status */
- if ((old_termios->c_cflag & CBAUD) &&
- !(tty->termios->c_cflag & CBAUD)) {
- info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
- cli();
- serial_out(info, UART_MCR, info->MCR);
- sti();
- }
-
- /* Handle transition away from B0 status */
- if (!(old_termios->c_cflag & CBAUD) &&
- (tty->termios->c_cflag & CBAUD)) {
- info->MCR |= UART_MCR_DTR;
- if (!tty->hw_stopped ||
- !(tty->termios->c_cflag & CRTSCTS)) {
- info->MCR |= UART_MCR_RTS;
- }
- cli();
- serial_out(info, UART_MCR, info->MCR);
- sti();
- }
-
- /* Handle turning off CRTSCTS */
- if ((old_termios->c_cflag & CRTSCTS) &&
- !(tty->termios->c_cflag & CRTSCTS)) {
- tty->hw_stopped = 0;
- rs_8xx_start(tty);
- }
-#endif
-
-#if 0
- /*
- * No need to wake up processes in open wait, since they
- * sample the CLOCAL flag once, and don't recheck it.
- * XXX It's not clear whether the current behavior is correct
- * or not. Hence, this may change.....
- */
- if (!(old_termios->c_cflag & CLOCAL) &&
- (tty->termios->c_cflag & CLOCAL))
- wake_up_interruptible(&info->open_wait);
-#endif
-}
-
-/*
- * ------------------------------------------------------------
- * rs_close()
- *
- * This routine is called when the serial port gets closed. First, we
- * wait for the last remaining data to be sent. Then, we unlink its
- * async structure from the interrupt chain if necessary, and we free
- * that IRQ if nothing is left in the chain.
- * ------------------------------------------------------------
- */
-static void rs_8xx_close(struct tty_struct *tty, struct file * filp)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- struct serial_state *state;
- unsigned long flags;
- int idx;
- volatile smc_t *smcp;
- volatile scc_t *sccp;
-
- if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
- return;
-
- state = info->state;
-
- save_flags(flags); cli();
-
- if (tty_hung_up_p(filp)) {
- DBG_CNT("before DEC-hung");
- restore_flags(flags);
- return;
- }
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("rs_close ttys%d, count = %d\n", info->line, state->count);
-#endif
- if ((tty->count == 1) && (state->count != 1)) {
- /*
- * Uh, oh. tty->count is 1, which means that the tty
- * structure will be freed. state->count should always
- * be one in these conditions. If it's greater than
- * one, we've got real problems, since it means the
- * serial port won't be shutdown.
- */
- printk("rs_close: bad serial port count; tty->count is 1, "
- "state->count is %d\n", state->count);
- state->count = 1;
- }
- if (--state->count < 0) {
- printk("rs_close: bad serial port count for ttys%d: %d\n",
- info->line, state->count);
- state->count = 0;
- }
- if (state->count) {
- DBG_CNT("before DEC-2");
- restore_flags(flags);
- return;
- }
- info->flags |= ASYNC_CLOSING;
- /*
- * Now we wait for the transmit buffer to clear; and we notify
- * the line discipline to only process XON/XOFF characters.
- */
- tty->closing = 1;
- if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
- tty_wait_until_sent(tty, info->closing_wait);
- /*
- * At this point we stop accepting input. To do this, we
- * disable the receive line status interrupts, and tell the
- * interrupt driver to stop checking the data ready bit in the
- * line status register.
- */
- info->read_status_mask &= ~BD_SC_EMPTY;
- if (info->flags & ASYNC_INITIALIZED) {
- if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
- smcp = &immr->im_smc[idx];
- smcp->smc_smcm &= ~SMCM_RX;
- smcp->smc_smcmr &= ~SMCMR_REN;
- }
- else {
- sccp = &immr->im_scc[idx - SCC_IDX_BASE];
- sccp->scc_sccm &= ~UART_SCCM_RX;
- sccp->scc_gsmrl &= ~SCC_GSMRL_ENR;
- }
- /*
- * Before we drop DTR, make sure the UART transmitter
- * has completely drained; this is especially
- * important if there is a transmit FIFO!
- */
- rs_8xx_wait_until_sent(tty, info->timeout);
- }
- shutdown(info);
- if (tty->driver->flush_buffer)
- tty->driver->flush_buffer(tty);
- if (tty->ldisc.flush_buffer)
- tty->ldisc.flush_buffer(tty);
- tty->closing = 0;
- info->event = 0;
- info->tty = 0;
- if (info->blocked_open) {
- if (info->close_delay) {
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(info->close_delay);
- }
- wake_up_interruptible(&info->open_wait);
- }
- info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
- wake_up_interruptible(&info->close_wait);
- restore_flags(flags);
-}
-
-/*
- * rs_wait_until_sent() --- wait until the transmitter is empty
- */
-static void rs_8xx_wait_until_sent(struct tty_struct *tty, int timeout)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- unsigned long orig_jiffies, char_time;
- /*int lsr;*/
- volatile cbd_t *bdp;
-
- if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
- return;
-
-#ifdef maybe
- if (info->state->type == PORT_UNKNOWN)
- return;
-#endif
-
- orig_jiffies = jiffies;
- /*
- * Set the check interval to be 1/5 of the estimated time to
- * send a single character, and make it at least 1. The check
- * interval should also be less than the timeout.
- *
- * Note: we have to use pretty tight timings here to satisfy
- * the NIST-PCTS.
- */
- char_time = 1;
- if (timeout)
- char_time = min(char_time, (unsigned long)timeout);
-#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
- printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
- printk("jiff=%lu...", jiffies);
-#endif
-
- /* We go through the loop at least once because we can't tell
- * exactly when the last character exits the shifter. There can
- * be at least two characters waiting to be sent after the buffers
- * are empty.
- */
- do {
-#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
- printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
-#endif
- current->state = TASK_INTERRUPTIBLE;
-/* current->dyn_prio = 0; make us low-priority */
- schedule_timeout(char_time);
- if (signal_pending(current))
- break;
- if (timeout && time_after(jiffies, orig_jiffies + timeout))
- break;
- bdp = info->tx_cur;
- } while (bdp->cbd_sc & BD_SC_READY);
- current->state = TASK_RUNNING;
-#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
- printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
-#endif
-}
-
-/*
- * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
- */
-static void rs_8xx_hangup(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- struct serial_state *state = info->state;
-
- if (serial_paranoia_check(info, tty->name, "rs_hangup"))
- return;
-
- state = info->state;
-
- rs_8xx_flush_buffer(tty);
- shutdown(info);
- info->event = 0;
- state->count = 0;
- info->flags &= ~ASYNC_NORMAL_ACTIVE;
- info->tty = 0;
- wake_up_interruptible(&info->open_wait);
-}
-
-/*
- * ------------------------------------------------------------
- * rs_open() and friends
- * ------------------------------------------------------------
- */
-static int block_til_ready(struct tty_struct *tty, struct file * filp,
- ser_info_t *info)
-{
-#ifdef DO_THIS_LATER
- DECLARE_WAITQUEUE(wait, current);
- struct serial_state *state = info->state;
-#endif
- int retval;
- int do_clocal = 0;
-
- /*
- * If the device is in the middle of being closed, then block
- * until it's done, and then try again.
- */
- if (tty_hung_up_p(filp) ||
- (info->flags & ASYNC_CLOSING)) {
- if (info->flags & ASYNC_CLOSING)
- interruptible_sleep_on(&info->close_wait);
-#ifdef SERIAL_DO_RESTART
- if (info->flags & ASYNC_HUP_NOTIFY)
- return -EAGAIN;
- else
- return -ERESTARTSYS;
-#else
- return -EAGAIN;
-#endif
- }
-
- /*
- * If non-blocking mode is set, or the port is not enabled,
- * then make the check up front and then exit.
- * If this is an SMC port, we don't have modem control to wait
- * for, so just get out here.
- */
- if ((filp->f_flags & O_NONBLOCK) ||
- (tty->flags & (1 << TTY_IO_ERROR)) ||
- (info->state->smc_scc_num < SCC_NUM_BASE)) {
- info->flags |= ASYNC_NORMAL_ACTIVE;
- return 0;
- }
-
- if (tty->termios->c_cflag & CLOCAL)
- do_clocal = 1;
-
- /*
- * Block waiting for the carrier detect and the line to become
- * free (i.e., not in use by the callout). While we are in
- * this loop, state->count is dropped by one, so that
- * rs_close() knows when to free things. We restore it upon
- * exit, either normal or abnormal.
- */
- retval = 0;
-#ifdef DO_THIS_LATER
- add_wait_queue(&info->open_wait, &wait);
-#ifdef SERIAL_DEBUG_OPEN
- printk("block_til_ready before block: ttys%d, count = %d\n",
- state->line, state->count);
-#endif
- cli();
- if (!tty_hung_up_p(filp))
- state->count--;
- sti();
- info->blocked_open++;
- while (1) {
- cli();
- if (tty->termios->c_cflag & CBAUD)
- serial_out(info, UART_MCR,
- serial_inp(info, UART_MCR) |
- (UART_MCR_DTR | UART_MCR_RTS));
- sti();
- set_current_state(TASK_INTERRUPTIBLE);
- if (tty_hung_up_p(filp) ||
- !(info->flags & ASYNC_INITIALIZED)) {
-#ifdef SERIAL_DO_RESTART
- if (info->flags & ASYNC_HUP_NOTIFY)
- retval = -EAGAIN;
- else
- retval = -ERESTARTSYS;
-#else
- retval = -EAGAIN;
-#endif
- break;
- }
- if (!(info->flags & ASYNC_CLOSING) &&
- (do_clocal || (serial_in(info, UART_MSR) &
- UART_MSR_DCD)))
- break;
- if (signal_pending(current)) {
- retval = -ERESTARTSYS;
- break;
- }
-#ifdef SERIAL_DEBUG_OPEN
- printk("block_til_ready blocking: ttys%d, count = %d\n",
- info->line, state->count);
-#endif
- schedule();
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&info->open_wait, &wait);
- if (!tty_hung_up_p(filp))
- state->count++;
- info->blocked_open--;
-#ifdef SERIAL_DEBUG_OPEN
- printk("block_til_ready after blocking: ttys%d, count = %d\n",
- info->line, state->count);
-#endif
-#endif /* DO_THIS_LATER */
- if (retval)
- return retval;
- info->flags |= ASYNC_NORMAL_ACTIVE;
- return 0;
-}
-
-static int get_async_struct(int line, ser_info_t **ret_info)
-{
- struct serial_state *sstate;
-
- sstate = rs_table + line;
- if (sstate->info) {
- sstate->count++;
- *ret_info = (ser_info_t *)sstate->info;
- return 0;
- }
- else {
- return -ENOMEM;
- }
-}
-
-/*
- * This routine is called whenever a serial port is opened. It
- * enables interrupts for a serial port, linking in its async structure into
- * the IRQ chain. It also performs the serial-specific
- * initialization for the tty structure.
- */
-static int rs_8xx_open(struct tty_struct *tty, struct file * filp)
-{
- ser_info_t *info;
- int retval, line;
-
- line = tty->index;
- if ((line < 0) || (line >= NR_PORTS))
- return -ENODEV;
- retval = get_async_struct(line, &info);
- if (retval)
- return retval;
- if (serial_paranoia_check(info, tty->name, "rs_open"))
- return -ENODEV;
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("rs_open %s, count = %d\n", tty->name, info->state->count);
-#endif
- tty->driver_data = info;
- info->tty = tty;
-
- /*
- * Start up serial port
- */
- retval = startup(info);
- if (retval)
- return retval;
-
- retval = block_til_ready(tty, filp, info);
- if (retval) {
-#ifdef SERIAL_DEBUG_OPEN
- printk("rs_open returning after block_til_ready with %d\n",
- retval);
-#endif
- return retval;
- }
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("rs_open %s successful...", line);
-#endif
- return 0;
-}
-
-/*
- * /proc fs routines....
- */
-
-static inline int line_info(char *buf, struct serial_state *state)
-{
-#ifdef notdef
- struct async_struct *info = state->info, scr_info;
- char stat_buf[30], control, status;
-#endif
- int ret;
-
- ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
- state->line,
- (state->smc_scc_num < SCC_NUM_BASE) ? "SMC" : "SCC",
- (unsigned int)(state->port), state->irq);
-
- if (!state->port || (state->type == PORT_UNKNOWN)) {
- ret += sprintf(buf+ret, "\n");
- return ret;
- }
-
-#ifdef notdef
- /*
- * Figure out the current RS-232 lines
- */
- if (!info) {
- info = &scr_info; /* This is just for serial_{in,out} */
-
- info->magic = SERIAL_MAGIC;
- info->port = state->port;
- info->flags = state->flags;
- info->quot = 0;
- info->tty = 0;
- }
- cli();
- status = serial_in(info, UART_MSR);
- control = info ? info->MCR : serial_in(info, UART_MCR);
- sti();
-
- stat_buf[0] = 0;
- stat_buf[1] = 0;
- if (control & UART_MCR_RTS)
- strcat(stat_buf, "|RTS");
- if (status & UART_MSR_CTS)
- strcat(stat_buf, "|CTS");
- if (control & UART_MCR_DTR)
- strcat(stat_buf, "|DTR");
- if (status & UART_MSR_DSR)
- strcat(stat_buf, "|DSR");
- if (status & UART_MSR_DCD)
- strcat(stat_buf, "|CD");
- if (status & UART_MSR_RI)
- strcat(stat_buf, "|RI");
-
- if (info->quot) {
- ret += sprintf(buf+ret, " baud:%d",
- state->baud_base / info->quot);
- }
-
- ret += sprintf(buf+ret, " tx:%d rx:%d",
- state->icount.tx, state->icount.rx);
-
- if (state->icount.frame)
- ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
-
- if (state->icount.parity)
- ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
-
- if (state->icount.brk)
- ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
-
- if (state->icount.overrun)
- ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
-
- /*
- * Last thing is the RS-232 status lines
- */
- ret += sprintf(buf+ret, " %s\n", stat_buf+1);
-#endif
- return ret;
-}
-
-int rs_8xx_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- int i, len = 0;
- off_t begin = 0;
-
- len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
- for (i = 0; i < NR_PORTS && len < 4000; i++) {
- len += line_info(page + len, &rs_table[i]);
- if (len+begin > off+count)
- goto done;
- if (len+begin < off) {
- begin += len;
- len = 0;
- }
- }
- *eof = 1;
-done:
- if (off >= len+begin)
- return 0;
- *start = page + (begin-off);
- return ((count < begin+len-off) ? count : begin+len-off);
-}
-
-/*
- * ---------------------------------------------------------------------
- * rs_init() and friends
- *
- * rs_init() is called at boot-time to initialize the serial driver.
- * ---------------------------------------------------------------------
- */
-
-/*
- * This routine prints out the appropriate serial driver version
- * number, and identifies which options were configured into this
- * driver.
- */
-static _INLINE_ void show_serial_version(void)
-{
- printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
-}
-
-
-/*
- * The serial console driver used during boot. Note that these names
- * clash with those found in "serial.c", so we currently can't support
- * the 16xxx uarts and these at the same time. I will fix this to become
- * an indirect function call from tty_io.c (or something).
- */
-
-#ifdef CONFIG_SERIAL_CONSOLE
-
-/*
- * Print a string to the serial port trying not to disturb any possible
- * real use of the port...
- * These funcitons work equally well for SCC, even though they are
- * designed for SMC. Our only interests are the transmit/receive
- * buffers, which are identically mapped for either the SCC or SMC.
- */
-static void my_console_write(int idx, const char *s,
- unsigned count)
-{
- struct serial_state *ser;
- ser_info_t *info;
- unsigned i;
- volatile cbd_t *bdp, *bdbase;
- volatile smc_uart_t *up;
- volatile u_char *cp;
-
- ser = rs_table + idx;
-
- /* If the port has been initialized for general use, we have
- * to use the buffer descriptors allocated there. Otherwise,
- * we simply use the single buffer allocated.
- */
- if ((info = (ser_info_t *)ser->info) != NULL) {
- bdp = info->tx_cur;
- bdbase = info->tx_bd_base;
- }
- else {
- /* Pointer to UART in parameter ram.
- */
- up = (smc_uart_t *)&immr->im_dprambase[ser->port];
-
- /* Get the address of the host memory buffer.
- */
- bdp = bdbase = (cbd_t *)&immr->im_dprambase[up->smc_tbase];
- }
-
- /*
- * We need to gracefully shut down the transmitter, disable
- * interrupts, then send our bytes out.
- */
-
- /*
- * Now, do each character. This is not as bad as it looks
- * since this is a holding FIFO and not a transmitting FIFO.
- * We could add the complexity of filling the entire transmit
- * buffer, but we would just wait longer between accesses......
- */
- for (i = 0; i < count; i++, s++) {
- /* Wait for transmitter fifo to empty.
- * Ready indicates output is ready, and xmt is doing
- * that, not that it is ready for us to send.
- */
- while (bdp->cbd_sc & BD_SC_READY);
-
- /* Send the character out.
- * If the buffer address is in the CPM DPRAM, don't
- * convert it.
- */
- if ((uint)(bdp->cbd_bufaddr) > (uint)IMAP_ADDR)
- cp = (u_char *)(bdp->cbd_bufaddr);
- else
- cp = __va(bdp->cbd_bufaddr);
- *cp = *s;
-
- bdp->cbd_datlen = 1;
- bdp->cbd_sc |= BD_SC_READY;
-
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = bdbase;
- else
- bdp++;
-
- /* if a LF, also do CR... */
- if (*s == 10) {
- while (bdp->cbd_sc & BD_SC_READY);
- cp = __va(bdp->cbd_bufaddr);
- *cp = 13;
- bdp->cbd_datlen = 1;
- bdp->cbd_sc |= BD_SC_READY;
-
- if (bdp->cbd_sc & BD_SC_WRAP) {
- bdp = bdbase;
- }
- else {
- bdp++;
- }
- }
- }
-
- /*
- * Finally, Wait for transmitter & holding register to empty
- * and restore the IER
- */
- while (bdp->cbd_sc & BD_SC_READY);
-
- if (info)
- info->tx_cur = (cbd_t *)bdp;
-}
-
-static void serial_console_write(struct console *c, const char *s,
- unsigned count)
-{
-#if defined(CONFIG_KGDB_CONSOLE) && !defined(CONFIG_USE_SERIAL2_KGDB)
- /* Try to let stub handle output. Returns true if it did. */
- if (kgdb_output_string(s, count))
- return;
-#endif
- my_console_write(c->index, s, count);
-}
-
-#ifdef CONFIG_XMON
-int
-xmon_8xx_write(const char *s, unsigned count)
-{
- my_console_write(KGDB_SER_IDX, s, count);
- return(count);
-}
-#endif
-
-#ifdef CONFIG_KGDB
-void
-putDebugChar(char ch)
-{
- my_console_write(KGDB_SER_IDX, &ch, 1);
-}
-#endif
-
-#if defined(CONFIG_XMON) || defined(CONFIG_KGDB)
-/*
- * Receive character from the serial port. This only works well
- * before the port is initialize for real use.
- */
-static int my_console_wait_key(int idx, int xmon, char *obuf)
-{
- struct serial_state *ser;
- u_char c, *cp;
- ser_info_t *info;
- volatile cbd_t *bdp;
- volatile smc_uart_t *up;
- int i;
-
- ser = rs_table + idx;
-
- /* Pointer to UART in parameter ram.
- */
- up = (smc_uart_t *)&immr->im_dprambase[ser->port];
-
- /* Get the address of the host memory buffer.
- * If the port has been initialized for general use, we must
- * use information from the port structure.
- */
- if ((info = (ser_info_t *)ser->info))
- bdp = info->rx_cur;
- else
- bdp = (cbd_t *)&immr->im_dprambase[up->smc_rbase];
-
- /*
- * We need to gracefully shut down the receiver, disable
- * interrupts, then read the input.
- * XMON just wants a poll. If no character, return -1, else
- * return the character.
- */
- if (!xmon) {
- while (bdp->cbd_sc & BD_SC_EMPTY);
- }
- else {
- if (bdp->cbd_sc & BD_SC_EMPTY)
- return -1;
- }
-
- /* If the buffer address is in the CPM DPRAM, don't
- * convert it.
- */
- if ((uint)(bdp->cbd_bufaddr) > (uint)IMAP_ADDR)
- cp = (u_char *)(bdp->cbd_bufaddr);
- else
- cp = __va(bdp->cbd_bufaddr);
-
- if (obuf) {
- i = c = bdp->cbd_datlen;
- while (i-- > 0)
- *obuf++ = *cp++;
- }
- else {
- c = *cp;
- }
- bdp->cbd_sc |= BD_SC_EMPTY;
-
- if (info) {
- if (bdp->cbd_sc & BD_SC_WRAP) {
- bdp = info->rx_bd_base;
- }
- else {
- bdp++;
- }
- info->rx_cur = (cbd_t *)bdp;
- }
-
- return((int)c);
-}
-#endif /* CONFIG_XMON || CONFIG_KGDB */
-
-#ifdef CONFIG_XMON
-int
-xmon_8xx_read_poll(void)
-{
- return(my_console_wait_key(KGDB_SER_IDX, 1, NULL));
-}
-
-int
-xmon_8xx_read_char(void)
-{
- return(my_console_wait_key(KGDB_SER_IDX, 0, NULL));
-}
-#endif
-
-#ifdef CONFIG_KGDB
-static char kgdb_buf[RX_BUF_SIZE], *kgdp;
-static int kgdb_chars;
-
-char
-getDebugChar(void)
-{
- if (kgdb_chars <= 0) {
- kgdb_chars = my_console_wait_key(KGDB_SER_IDX, 0, kgdb_buf);
- kgdp = kgdb_buf;
- }
- kgdb_chars--;
-
- return(*kgdp++);
-}
-
-void kgdb_interruptible(int yes)
-{
- volatile smc_t *smcp;
-
- smcp = &immr->im_smc[KGDB_SER_IDX];
-
- if (yes == 1)
- smcp->smc_smcm |= SMCM_RX;
- else
- smcp->smc_smcm &= ~SMCM_RX;
-}
-
-void kgdb_map_scc(void)
-{
- ushort serbase;
- uint mem_addr;
- volatile cbd_t *bdp;
- volatile smc_uart_t *up;
-
- /* The serial port has already been initialized before
- * we get here. We have to assign some pointers needed by
- * the kernel, and grab a memory location in the CPM that will
- * work until the driver is really initialized.
- */
- immr = (immap_t *)IMAP_ADDR;
-
- /* Right now, assume we are using SMCs.
- */
-#ifdef USE_KGDB_SMC2
- *(ushort *)(&immr->im_dprambase[PROFF_SMC2_BASE]) = serbase = PROFF_SMC2;
-#else
- *(ushort *)(&immr->im_dprambase[PROFF_SMC1_BASE]) = serbase = PROFF_SMC1;
-#endif
- up = (smc_uart_t *)&immr->im_dprambase[serbase];
-
- /* Allocate space for an input FIFO, plus a few bytes for output.
- * Allocate bytes to maintain word alignment.
- */
- mem_addr = (uint)(&immr->im_dprambase[0x1000]);
-
- /* Set the physical address of the host memory buffers in
- * the buffer descriptors.
- */
- bdp = (cbd_t *)&immr->im_dprambase[up->smc_rbase];
- bdp->cbd_bufaddr = mem_addr;
-
- bdp = (cbd_t *)&immr->im_dprambase[up->smc_tbase];
- bdp->cbd_bufaddr = mem_addr+RX_BUF_SIZE;
-
- up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */
- up->smc_maxidl = RX_BUF_SIZE;
-}
-#endif
-
-static struct tty_driver *serial_console_device(struct console *c, int *index)
-{
- *index = c->index;
- return serial_driver;
-}
-
-/*
- * Register console.
- */
-static int __init console_8xx_init(void)
-{
- register_console(&sercons);
- return 0;
-}
-
-console_initcall(console_8xx_init);
-
-#endif
-
-/* Default console baud rate as determined by the board information
- * structure.
- */
-static int baud_idx;
-
-static struct tty_operations rs_8xx_ops = {
- .open = rs_8xx_open,
- .close = rs_8xx_close,
- .write = rs_8xx_write,
- .put_char = rs_8xx_put_char,
- .write_room = rs_8xx_write_room,
- .chars_in_buffer = rs_8xx_chars_in_buffer,
- .flush_buffer = rs_8xx_flush_buffer,
- .ioctl = rs_8xx_ioctl,
- .throttle = rs_8xx_throttle,
- .unthrottle = rs_8xx_unthrottle,
- .send_xchar = rs_8xx_send_xchar,
- .set_termios = rs_8xx_set_termios,
- .stop = rs_8xx_stop,
- .start = rs_8xx_start,
- .hangup = rs_8xx_hangup,
- .wait_until_sent = rs_8xx_wait_until_sent,
- .read_proc = rs_8xx_read_proc,
-};
-
-/*
- * The serial driver boot-time initialization code!
- */
-static int __init rs_8xx_init(void)
-{
- struct serial_state * state;
- ser_info_t *info;
- uint mem_addr, dp_addr;
- int i, j, idx;
- uint page, sblock;
- volatile cbd_t *bdp;
- volatile cpm8260_t *cp;
- volatile smc_t *sp;
- volatile smc_uart_t *up;
- volatile scc_t *scp;
- volatile scc_uart_t *sup;
- volatile immap_t *immap;
- volatile iop8260_t *io;
-
- serial_driver = alloc_tty_driver(NR_PORTS);
- if (!serial_driver)
- return -ENOMEM;
-
- show_serial_version();
-
- /* Initialize the tty_driver structure */
-
- serial_driver->owner = THIS_MODULE;
- serial_driver->driver_name = "serial";
- serial_driver->devfs_name = "tts/";
- serial_driver->name = "ttyS";
- serial_driver->major = TTY_MAJOR;
- serial_driver->minor_start = 64;
- serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
- serial_driver->subtype = SERIAL_TYPE_NORMAL;
- serial_driver->init_termios = tty_std_termios;
- serial_driver->init_termios.c_cflag =
- baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
- serial_driver->flags = TTY_DRIVER_REAL_RAW;
- tty_set_operations(serial_driver, &rs_8xx_ops);
- if (tty_register_driver(serial_driver))
- panic("Couldn't register serial driver\n");
-
- immap = immr;
- cp = &immap->im_cpm;
- io = &immap->im_ioport;
-
- /* This should have been done long ago by the early boot code,
- * but do it again to make sure.
- */
- *(ushort *)(&immap->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1;
- *(ushort *)(&immap->im_dprambase[PROFF_SMC2_BASE]) = PROFF_SMC2;
-
- /* Geeze, here we go....Picking I/O port bits....Lots of
- * choices. If you don't like mine, pick your own.
- * Configure SMCs Tx/Rx. SMC1 is only on Port D, SMC2 is
- * only on Port A. You either pick 'em, or not.
- */
-#ifndef SCC_CONSOLE
- io->iop_ppard |= 0x00c00000;
- io->iop_pdird |= 0x00400000;
- io->iop_pdird &= ~0x00800000;
- io->iop_psord &= ~0x00c00000;
-#ifdef USE_SMC2
- io->iop_ppara |= 0x00c00000;
- io->iop_pdira |= 0x00400000;
- io->iop_pdira &= ~0x00800000;
- io->iop_psora &= ~0x00c00000;
-#endif
-
- /* Configure SCC2 and SCC3. Be careful about the fine print.
- * Secondary options are only available when you take away
- * the primary option. Unless the pins are used for something
- * else, SCC2 and SCC3 are on Port B.
- * Port B, 8 - SCC3 TxD
- * Port B, 12 - SCC2 TxD
- * Port B, 14 - SCC3 RxD
- * Port B, 15 - SCC2 RxD
- */
- io->iop_pparb |= 0x008b0000;
- io->iop_pdirb |= 0x00880000;
- io->iop_psorb |= 0x00880000;
- io->iop_pdirb &= ~0x00030000;
- io->iop_psorb &= ~0x00030000;
-
- /* Wire BRG1 to SMC1 and BRG2 to SMC2.
- */
- immap->im_cpmux.cmx_smr = 0;
-
- /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and
- * BRG4 to SCC3.
- */
- immap->im_cpmux.cmx_scr &= ~0x00ffff00;
- immap->im_cpmux.cmx_scr |= 0x00121b00;
-#else
- io->iop_pparb |= 0x008b0000;
- io->iop_pdirb |= 0x00880000;
- io->iop_psorb |= 0x00880000;
- io->iop_pdirb &= ~0x00030000;
- io->iop_psorb &= ~0x00030000;
-
- /* Use Port D for SCC1 instead of other functions.
- */
- io->iop_ppard |= 0x00000003;
- io->iop_psord &= ~0x00000001; /* Rx */
- io->iop_psord |= 0x00000002; /* Tx */
- io->iop_pdird &= ~0x00000001; /* Rx */
- io->iop_pdird |= 0x00000002; /* Tx */
-
- /* Connect SCC1, SCC2, SCC3 to NMSI. Connect BRG1 to SCC1,
- * BRG2 to SCC2, BRG3 to SCC3.
- */
- immap->im_cpmux.cmx_scr &= ~0xffffff00;
- immap->im_cpmux.cmx_scr |= 0x00091200;
-#endif
-
- for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
- state->magic = SSTATE_MAGIC;
- state->line = i;
- state->type = PORT_UNKNOWN;
- state->custom_divisor = 0;
- state->close_delay = 5*HZ/10;
- state->closing_wait = 30*HZ;
- state->icount.cts = state->icount.dsr =
- state->icount.rng = state->icount.dcd = 0;
- state->icount.rx = state->icount.tx = 0;
- state->icount.frame = state->icount.parity = 0;
- state->icount.overrun = state->icount.brk = 0;
- printk (KERN_INFO "ttyS%d on %s%d at 0x%04x, BRG%d\n",
- i,
- (state->smc_scc_num < SCC_NUM_BASE) ? "SMC" : "SCC",
- PORT_NUM(state->smc_scc_num) + 1,
- (unsigned int)(state->port),
- state->smc_scc_num + 1);
-#ifdef CONFIG_SERIAL_CONSOLE
- /* If we just printed the message on the console port, and
- * we are about to initialize it for general use, we have
- * to wait a couple of character times for the CR/NL to
- * make it out of the transmit buffer.
- */
- if (i == CONFIG_SERIAL_CONSOLE_PORT)
- mdelay(300);
-#endif
- info = kmalloc(sizeof(ser_info_t), GFP_KERNEL);
- if (info) {
- /*memset(info, 0, sizeof(ser_info_t));*/
- __clear_user(info,sizeof(ser_info_t));
- init_waitqueue_head(&info->open_wait);
- init_waitqueue_head(&info->close_wait);
- info->magic = SERIAL_MAGIC;
- info->flags = state->flags;
- INIT_WORK(&info->tqueue, do_softint, info);
- INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
- info->line = i;
- info->state = state;
- state->info = (struct async_struct *)info;
-
- /* We need to allocate a transmit and receive buffer
- * descriptors from dual port ram, and a character
- * buffer area from host mem.
- */
- dp_addr = m8260_cpm_dpalloc(sizeof(cbd_t) * RX_NUM_FIFO, 8);
-
- /* Allocate space for FIFOs in the host memory.
- */
- mem_addr = m8260_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE, 1);
-
- /* Set the physical address of the host memory
- * buffers in the buffer descriptors, and the
- * virtual address for us to work with.
- */
- bdp = (cbd_t *)&immap->im_dprambase[dp_addr];
- info->rx_cur = info->rx_bd_base = (cbd_t *)bdp;
-
- for (j=0; j<(RX_NUM_FIFO-1); j++) {
- bdp->cbd_bufaddr = __pa(mem_addr);
- bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT;
- mem_addr += RX_BUF_SIZE;
- bdp++;
- }
- bdp->cbd_bufaddr = __pa(mem_addr);
- bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
-
- if ((idx = state->smc_scc_num) < SCC_NUM_BASE) {
- sp = &immap->im_smc[idx];
- up = (smc_uart_t *)&immap->im_dprambase[state->port];
- up->smc_rbase = dp_addr;
- }
- else {
- scp = &immap->im_scc[idx - SCC_IDX_BASE];
- sup = (scc_uart_t *)&immap->im_dprambase[state->port];
- scp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- sup->scc_genscc.scc_rbase = dp_addr;
- }
-
- dp_addr = m8260_cpm_dpalloc(sizeof(cbd_t) * TX_NUM_FIFO, 8);
-
- /* Allocate space for FIFOs in the host memory.
- */
- mem_addr = m8260_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE, 1);
-
- /* Set the physical address of the host memory
- * buffers in the buffer descriptors, and the
- * virtual address for us to work with.
- */
- bdp = (cbd_t *)&immap->im_dprambase[dp_addr];
- info->tx_cur = info->tx_bd_base = (cbd_t *)bdp;
-
- for (j=0; j<(TX_NUM_FIFO-1); j++) {
- bdp->cbd_bufaddr = __pa(mem_addr);
- bdp->cbd_sc = BD_SC_INTRPT;
- mem_addr += TX_BUF_SIZE;
- bdp++;
- }
- bdp->cbd_bufaddr = __pa(mem_addr);
- bdp->cbd_sc = (BD_SC_WRAP | BD_SC_INTRPT);
-
- if (idx < SCC_NUM_BASE) {
- up->smc_tbase = dp_addr;
-
- /* Set up the uart parameters in the
- * parameter ram.
- */
- up->smc_rfcr = CPMFCR_GBL | CPMFCR_EB;
- up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB;
-
- /* Set this to 1 for now, so we get single
- * character interrupts. Using idle charater
- * time requires some additional tuning.
- */
- up->smc_mrblr = 1;
- up->smc_maxidl = 0;
- up->smc_brkcr = 1;
-
- /* Send the CPM an initialize command.
- */
- if (state->smc_scc_num == 0) {
- page = CPM_CR_SMC1_PAGE;
- sblock = CPM_CR_SMC1_SBLOCK;
- }
- else {
- page = CPM_CR_SMC2_PAGE;
- sblock = CPM_CR_SMC2_SBLOCK;
- }
-
- cp->cp_cpcr = mk_cr_cmd(page, sblock, 0,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
-
- /* Disable all interrupts and clear all pending
- * events.
- */
- sp->smc_smcm = 0;
- sp->smc_smce = 0xff;
- }
- else {
- sup->scc_genscc.scc_tbase = dp_addr;
-
- /* Set up the uart parameters in the
- * parameter ram.
- */
- sup->scc_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB;
- sup->scc_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB;
-
- /* Set this to 1 for now, so we get single
- * character interrupts. Using idle charater
- * time requires some additional tuning.
- */
- sup->scc_genscc.scc_mrblr = 1;
- sup->scc_maxidl = 0;
- sup->scc_brkcr = 1;
- sup->scc_parec = 0;
- sup->scc_frmec = 0;
- sup->scc_nosec = 0;
- sup->scc_brkec = 0;
- sup->scc_uaddr1 = 0;
- sup->scc_uaddr2 = 0;
- sup->scc_toseq = 0;
- sup->scc_char1 = 0x8000;
- sup->scc_char2 = 0x8000;
- sup->scc_char3 = 0x8000;
- sup->scc_char4 = 0x8000;
- sup->scc_char5 = 0x8000;
- sup->scc_char6 = 0x8000;
- sup->scc_char7 = 0x8000;
- sup->scc_char8 = 0x8000;
- sup->scc_rccm = 0xc0ff;
-
- /* Send the CPM an initialize command.
- */
-#ifdef SCC_CONSOLE
- switch (state->smc_scc_num) {
- case 0:
- page = CPM_CR_SCC1_PAGE;
- sblock = CPM_CR_SCC1_SBLOCK;
- break;
- case 1:
- page = CPM_CR_SCC2_PAGE;
- sblock = CPM_CR_SCC2_SBLOCK;
- break;
- case 2:
- page = CPM_CR_SCC3_PAGE;
- sblock = CPM_CR_SCC3_SBLOCK;
- break;
- }
-#else
- if (state->smc_scc_num == 2) {
- page = CPM_CR_SCC2_PAGE;
- sblock = CPM_CR_SCC2_SBLOCK;
- }
- else {
- page = CPM_CR_SCC3_PAGE;
- sblock = CPM_CR_SCC3_SBLOCK;
- }
-#endif
-
- cp->cp_cpcr = mk_cr_cmd(page, sblock, 0,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- scp->scc_gsmrh = 0;
- scp->scc_gsmrl =
- (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
-
- /* Disable all interrupts and clear all pending
- * events.
- */
- scp->scc_sccm = 0;
- scp->scc_scce = 0xffff;
- scp->scc_dsr = 0x7e7e;
- scp->scc_pmsr = 0x3000;
- }
-
- /* Install interrupt handler.
- */
- request_irq(state->irq, rs_8xx_interrupt, 0, "uart", info);
-
- /* Set up the baud rate generator.
- */
- m8260_cpm_setbrg(state->smc_scc_num,
- baud_table[baud_idx]);
-
- /* If the port is the console, enable Rx and Tx.
- */
-#ifdef CONFIG_SERIAL_CONSOLE
- if (i == CONFIG_SERIAL_CONSOLE_PORT) {
- if (idx < SCC_NUM_BASE)
- sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
- else
- scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- }
-#endif
- }
- }
- return 0;
-}
-module_init(rs_8xx_init);
-
-/* This must always be called before the rs_8xx_init() function, otherwise
- * it blows away the port control information.
-*/
-static int __init serial_console_setup(struct console *co, char *options)
-{
- struct serial_state *ser;
- uint mem_addr, dp_addr, bidx;
- volatile cbd_t *bdp;
- volatile cpm8260_t *cp;
- volatile immap_t *immap;
-#ifndef SCC_CONSOLE
- volatile smc_t *sp;
- volatile smc_uart_t *up;
-#endif
-#ifdef SCC_CONSOLE
- volatile scc_t *scp;
- volatile scc_uart_t *sup;
-#endif
- volatile iop8260_t *io;
- bd_t *bd;
-
- bd = (bd_t *)__res;
-
- for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
- if (bd->bi_baudrate == baud_table[bidx])
- break;
-
- co->cflag = CREAD|CLOCAL|bidx|CS8;
- baud_idx = bidx;
-
- ser = rs_table + co->index;
-
- immap = immr;
- cp = &immap->im_cpm;
- io = &immap->im_ioport;
-
-#ifdef SCC_CONSOLE
- scp = (scc_t *)&(immap->im_scc[SCC_CONSOLE-1]);
- sup = (scc_uart_t *)&immap->im_dprambase[PROFF_SCC1 + ((SCC_CONSOLE-1) << 8)];
- scp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
- scp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
- /* Use Port D for SCC1 instead of other functions.
- */
- io->iop_ppard |= 0x00000003;
- io->iop_psord &= ~0x00000001; /* Rx */
- io->iop_psord |= 0x00000002; /* Tx */
- io->iop_pdird &= ~0x00000001; /* Rx */
- io->iop_pdird |= 0x00000002; /* Tx */
-
-#else
- /* This should have been done long ago by the early boot code,
- * but do it again to make sure.
- */
- *(ushort *)(&immap->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1;
- *(ushort *)(&immap->im_dprambase[PROFF_SMC2_BASE]) = PROFF_SMC2;
-
- /* Right now, assume we are using SMCs.
- */
- sp = &immap->im_smc[ser->smc_scc_num];
-
- /* When we get here, the CPM has been reset, so we need
- * to configure the port.
- * We need to allocate a transmit and receive buffer descriptor
- * from dual port ram, and a character buffer area from host mem.
- */
- up = (smc_uart_t *)&immap->im_dprambase[ser->port];
-
- /* Disable transmitter/receiver.
- */
- sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-
- /* Use Port D for SMC1 instead of other functions.
- */
- io->iop_ppard |= 0x00c00000;
- io->iop_pdird |= 0x00400000;
- io->iop_pdird &= ~0x00800000;
- io->iop_psord &= ~0x00c00000;
-#endif
-
- /* Allocate space for two buffer descriptors in the DP ram.
- */
- dp_addr = m8260_cpm_dpalloc(sizeof(cbd_t) * 2, 8);
-
- /* Allocate space for two 2 byte FIFOs in the host memory.
- */
- mem_addr = m8260_cpm_hostalloc(4, 1);
-
- /* Set the physical address of the host memory buffers in
- * the buffer descriptors.
- */
- bdp = (cbd_t *)&immap->im_dprambase[dp_addr];
- bdp->cbd_bufaddr = __pa(mem_addr);
- (bdp+1)->cbd_bufaddr = __pa(mem_addr+2);
-
- /* For the receive, set empty and wrap.
- * For transmit, set wrap.
- */
- bdp->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP;
- (bdp+1)->cbd_sc = BD_SC_WRAP;
-
- /* Set up the uart parameters in the parameter ram.
- */
-#ifdef SCC_CONSOLE
- sup->scc_genscc.scc_rbase = dp_addr;
- sup->scc_genscc.scc_tbase = dp_addr + sizeof(cbd_t);
-
- /* Set up the uart parameters in the
- * parameter ram.
- */
- sup->scc_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB;
- sup->scc_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB;
-
- sup->scc_genscc.scc_mrblr = 1;
- sup->scc_maxidl = 0;
- sup->scc_brkcr = 1;
- sup->scc_parec = 0;
- sup->scc_frmec = 0;
- sup->scc_nosec = 0;
- sup->scc_brkec = 0;
- sup->scc_uaddr1 = 0;
- sup->scc_uaddr2 = 0;
- sup->scc_toseq = 0;
- sup->scc_char1 = 0x8000;
- sup->scc_char2 = 0x8000;
- sup->scc_char3 = 0x8000;
- sup->scc_char4 = 0x8000;
- sup->scc_char5 = 0x8000;
- sup->scc_char6 = 0x8000;
- sup->scc_char7 = 0x8000;
- sup->scc_char8 = 0x8000;
- sup->scc_rccm = 0xc0ff;
-
- /* Send the CPM an initialize command.
- */
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_SCC1_PAGE, CPM_CR_SCC1_SBLOCK, 0,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- scp->scc_gsmrh = 0;
- scp->scc_gsmrl =
- (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
-
- /* Disable all interrupts and clear all pending
- * events.
- */
- scp->scc_sccm = 0;
- scp->scc_scce = 0xffff;
- scp->scc_dsr = 0x7e7e;
- scp->scc_pmsr = 0x3000;
-
- /* Wire BRG1 to SCC1. The serial init will take care of
- * others.
- */
- immap->im_cpmux.cmx_scr = 0;
-
- /* Set up the baud rate generator.
- */
- m8260_cpm_setbrg(ser->smc_scc_num, bd->bi_baudrate);
-
- scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#else
- up->smc_rbase = dp_addr; /* Base of receive buffer desc. */
- up->smc_tbase = dp_addr+sizeof(cbd_t); /* Base of xmt buffer desc. */
- up->smc_rfcr = CPMFCR_GBL | CPMFCR_EB;
- up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB;
-
- /* Set this to 1 for now, so we get single character interrupts.
- */
- up->smc_mrblr = 1; /* receive buffer length */
- up->smc_maxidl = 0; /* wait forever for next char */
-
- /* Send the CPM an initialize command.
- */
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_SMC1_PAGE, CPM_CR_SMC1_SBLOCK, 0,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
-
- /* Set up the baud rate generator.
- */
- m8260_cpm_setbrg(ser->smc_scc_num, bd->bi_baudrate);
-
- /* And finally, enable Rx and Tx.
- */
- sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
-#endif
-
- return 0;
-}
+++ /dev/null
-/*
- * UART driver for MPC860 CPM SCC or SMC
- * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
- *
- * I used the serial.c driver as the framework for this driver.
- * Give credit to those guys.
- * The original code was written for the MBX860 board. I tried to make
- * it generic, but there may be some assumptions in the structures that
- * have to be fixed later.
- * To save porting time, I did not bother to change any object names
- * that are not accessed outside of this file.
- * It still needs lots of work........When it was easy, I included code
- * to support the SCCs, but this has never been tested, nor is it complete.
- * Only the SCCs support modem control, so that is not complete either.
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/timer.h>
-#include <linux/interrupt.h>
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-#include <linux/serial.h>
-#include <linux/serialP.h>
-#include <linux/major.h>
-#include <linux/string.h>
-#include <linux/fcntl.h>
-#include <linux/ptrace.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <asm/uaccess.h>
-#include <asm/8xx_immap.h>
-#include <asm/mpc8xx.h>
-#include <asm/commproc.h>
-#ifdef CONFIG_MAGIC_SYSRQ
-#include <linux/sysrq.h>
-#endif
-
-#ifdef CONFIG_KGDB
-#include <asm/kgdb.h>
-#endif
-
-#ifdef CONFIG_SERIAL_CONSOLE
-#include <linux/console.h>
-
-/* this defines the index into rs_table for the port to use
-*/
-# ifndef CONFIG_SERIAL_CONSOLE_PORT
-# ifdef CONFIG_SCC3_ENET
-# ifdef CONFIG_CONS_SMC2
-# define CONFIG_SERIAL_CONSOLE_PORT 0 /* Console on SMC2 is 1st port */
-# else
-# error "Can't use SMC1 for console with Ethernet on SCC3"
-# endif
-# else /* ! CONFIG_SCC3_ENET */
-# ifdef CONFIG_CONS_SMC2 /* Console on SMC2 */
-# define CONFIG_SERIAL_CONSOLE_PORT 1
-# else /* Console on SMC1 */
-# define CONFIG_SERIAL_CONSOLE_PORT 0
-# endif /* CONFIG_CONS_SMC2 */
-# endif /* CONFIG_SCC3_ENET */
-# endif /* CONFIG_SERIAL_CONSOLE_PORT */
-#endif /* CONFIG_SERIAL_CONSOLE */
-
-#if 0
-/* SCC2 for console
-*/
-#undef CONFIG_SERIAL_CONSOLE_PORT
-#define CONFIG_SERIAL_CONSOLE_PORT 2
-#endif
-
-#define TX_WAKEUP ASYNC_SHARE_IRQ
-
-static char *serial_name = "CPM UART driver";
-static char *serial_version = "0.03";
-
-static DECLARE_TASK_QUEUE(tq_serial);
-
-static struct tty_driver *serial_driver;
-static int serial_console_setup(struct console *co, char *options);
-
-static void serial_console_write(struct console *c, const char *s,
- unsigned count);
-static struct tty_driver *serial_console_device(struct console *c, int *index)
-
-#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
-static unsigned long break_pressed; /* break, really ... */
-#endif
-
-/*
- * Serial driver configuration section. Here are the various options:
- */
-#define SERIAL_PARANOIA_CHECK
-#define CONFIG_SERIAL_NOPAUSE_IO
-#define SERIAL_DO_RESTART
-
-/* Set of debugging defines */
-
-#undef SERIAL_DEBUG_INTR
-#undef SERIAL_DEBUG_OPEN
-#undef SERIAL_DEBUG_FLOW
-#undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
-
-#define _INLINE_ inline
-
-#define DBG_CNT(s)
-
-/* We overload some of the items in the data structure to meet our
- * needs. For example, the port address is the CPM parameter ram
- * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and
- * 2 SMCs. The "hub6" field is used to indicate the channel number, with
- * a flag indicating SCC or SMC, and the number is used as an index into
- * the CPM parameter area for this device.
- * The "type" field is currently set to 0, for PORT_UNKNOWN. It is
- * not currently used. I should probably use it to indicate the port
- * type of SMC or SCC.
- * The SMCs do not support any modem control signals.
- */
-#define smc_scc_num hub6
-#define NUM_IS_SCC ((int)0x00010000)
-#define PORT_NUM(P) ((P) & 0x0000ffff)
-
-/* The choice of serial port to use for KGDB. If the system has
- * two ports, you can use one for console and one for KGDB (which
- * doesn't make sense to me, but people asked for it).
- */
-#ifdef CONFIG_KGDB_TTYS1
-#define KGDB_SER_IDX 1 /* SCC2/SMC2 */
-#else
-#define KGDB_SER_IDX 0 /* SCC1/SMC1 */
-#endif
-
-/* Processors other than the 860 only get SMCs configured by default.
- * Either they don't have SCCs or they are allocated somewhere else.
- * Of course, there are now 860s without some SCCs, so we will need to
- * address that someday.
- * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
- * stereo codec parts, and we use SMC2 to help support that.
- */
-static struct serial_state rs_table[] = {
- /* UART CLK PORT IRQ FLAGS NUM */
-#ifndef CONFIG_SCC3_ENET /* SMC1 not usable with Ethernet on SCC3 */
- { 0, 0, PROFF_SMC1, CPMVEC_SMC1, 0, 0 }, /* SMC1 ttyS0 */
-#endif
-#if !defined(CONFIG_USB_MPC8xx) && !defined(CONFIG_USB_CLIENT_MPC8xx)
-# ifdef CONFIG_SMC2_UART
- { 0, 0, PROFF_SMC2, CPMVEC_SMC2, 0, 1 }, /* SMC2 ttyS1 */
-# endif
-# ifdef CONFIG_USE_SCC_IO
- { 0, 0, PROFF_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) }, /* SCC2 ttyS2 */
- { 0, 0, PROFF_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) }, /* SCC3 ttyS3 */
-# endif
- #else /* CONFIG_USB_xxx */
-# ifdef CONFIG_USE_SCC_IO
- { 0, 0, PROFF_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) }, /* SCC3 ttyS3 */
-# endif
-#endif /* CONFIG_USB_xxx */
-};
-
-#define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
-
-/* The number of buffer descriptors and their sizes.
-*/
-#define RX_NUM_FIFO 4
-#define RX_BUF_SIZE 32
-#define TX_NUM_FIFO 4
-#define TX_BUF_SIZE 32
-
-/* The async_struct in serial.h does not really give us what we
- * need, so define our own here.
- */
-typedef struct serial_info {
- int magic;
- int flags;
- struct serial_state *state;
- struct tty_struct *tty;
- int read_status_mask;
- int ignore_status_mask;
- int timeout;
- int line;
- int x_char; /* xon/xoff character */
- int close_delay;
- unsigned short closing_wait;
- unsigned short closing_wait2;
- unsigned long event;
- unsigned long last_active;
- int blocked_open; /* # of blocked opens */
- struct tq_struct tqueue;
- struct tq_struct tqueue_hangup;
- wait_queue_head_t open_wait;
- wait_queue_head_t close_wait;
-
- /* CPM Buffer Descriptor pointers.
- */
- cbd_t *rx_bd_base;
- cbd_t *rx_cur;
- cbd_t *tx_bd_base;
- cbd_t *tx_cur;
-
- /* Virtual addresses for the FIFOs because we can't __va() a
- * physical address anymore.
- */
- unsigned char *rx_va_base;
- unsigned char *tx_va_base;
-} ser_info_t;
-
-static struct console sercons = {
- .name = "ttyS",
- .write = serial_console_write,
- .device = serial_console_device,
- .setup = serial_console_setup,
- .flags = CON_PRINTBUFFER,
- .index = CONFIG_SERIAL_CONSOLE_PORT,
-};
-
-static void change_speed(ser_info_t *info);
-static void rs_8xx_wait_until_sent(struct tty_struct *tty, int timeout);
-
-static inline int serial_paranoia_check(ser_info_t *info,
- char *name, const char *routine)
-{
-#ifdef SERIAL_PARANOIA_CHECK
- static const char *badmagic =
- "Warning: bad magic number for serial struct (%s) in %s\n";
- static const char *badinfo =
- "Warning: null async_struct for (%s) in %s\n";
-
- if (!info) {
- printk(badinfo, name, routine);
- return 1;
- }
- if (info->magic != SERIAL_MAGIC) {
- printk(badmagic, name, routine);
- return 1;
- }
-#endif
- return 0;
-}
-
-/*
- * This is used to figure out the divisor speeds and the timeouts,
- * indexed by the termio value. The generic CPM functions are responsible
- * for setting and assigning baud rate generators for us.
- */
-static int baud_table[] = {
- 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
- 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
-
-
-/*
- * ------------------------------------------------------------
- * rs_stop() and rs_start()
- *
- * This routines are called before setting or resetting tty->stopped.
- * They enable or disable transmitter interrupts, as necessary.
- * ------------------------------------------------------------
- */
-static void rs_8xx_stop(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- int idx;
- unsigned long flags;
- volatile scc_t *sccp;
- volatile smc_t *smcp;
-
- if (serial_paranoia_check(info, tty->name, "rs_stop"))
- return;
-
- save_flags(flags); cli();
- idx = PORT_NUM(info->state->smc_scc_num);
- if (info->state->smc_scc_num & NUM_IS_SCC) {
- sccp = &cpmp->cp_scc[idx];
- sccp->scc_sccm &= ~UART_SCCM_TX;
- }
- else {
- smcp = &cpmp->cp_smc[idx];
- smcp->smc_smcm &= ~SMCM_TX;
- }
- restore_flags(flags);
-}
-
-static void rs_8xx_start(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- int idx;
- unsigned long flags;
- volatile scc_t *sccp;
- volatile smc_t *smcp;
-
- if (serial_paranoia_check(info, tty->name, "rs_stop"))
- return;
-
- idx = PORT_NUM(info->state->smc_scc_num);
- save_flags(flags); cli();
- if (info->state->smc_scc_num & NUM_IS_SCC) {
- sccp = &cpmp->cp_scc[idx];
- sccp->scc_sccm |= UART_SCCM_TX;
- }
- else {
- smcp = &cpmp->cp_smc[idx];
- smcp->smc_smcm |= SMCM_TX;
- }
- restore_flags(flags);
-}
-
-/*
- * ----------------------------------------------------------------------
- *
- * Here starts the interrupt handling routines. All of the following
- * subroutines are declared as inline and are folded into
- * rs_interrupt(). They were separated out for readability's sake.
- *
- * Note: rs_interrupt() is a "fast" interrupt, which means that it
- * runs with interrupts turned off. People who may want to modify
- * rs_interrupt() should try to keep the interrupt handler as fast as
- * possible. After you are done making modifications, it is not a bad
- * idea to do:
- *
- * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
- *
- * and look at the resulting assemble code in serial.s.
- *
- * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
- * -----------------------------------------------------------------------
- */
-
-/*
- * This routine is used by the interrupt handler to schedule
- * processing in the software interrupt portion of the driver.
- */
-static _INLINE_ void rs_sched_event(ser_info_t *info,
- int event)
-{
- info->event |= 1 << event;
- queue_task(&info->tqueue, &tq_serial);
- mark_bh(SERIAL_BH);
-}
-
-static _INLINE_ void receive_chars(ser_info_t *info, struct pt_regs *regs)
-{
- struct tty_struct *tty = info->tty;
- unsigned char ch, *cp;
- /*int ignored = 0;*/
- int i;
- ushort status;
- struct async_icount *icount;
- volatile cbd_t *bdp;
-
- icount = &info->state->icount;
-
- /* Just loop through the closed BDs and copy the characters into
- * the buffer.
- */
- bdp = info->rx_cur;
- for (;;) {
- if (bdp->cbd_sc & BD_SC_EMPTY) /* If this one is empty */
- break; /* we are all done */
-
- /* The read status mask tell us what we should do with
- * incoming characters, especially if errors occur.
- * One special case is the use of BD_SC_EMPTY. If
- * this is not set, we are supposed to be ignoring
- * inputs. In this case, just mark the buffer empty and
- * continue.
- if (!(info->read_status_mask & BD_SC_EMPTY)) {
- bdp->cbd_sc |= BD_SC_EMPTY;
- bdp->cbd_sc &=
- ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
-
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = info->rx_bd_base;
- else
- bdp++;
- continue;
- }
- */
-
- /* Get the number of characters and the buffer pointer.
- */
- i = bdp->cbd_datlen;
- cp = info->rx_va_base + ((bdp - info->rx_bd_base) * RX_BUF_SIZE);
- status = bdp->cbd_sc;
-#ifdef CONFIG_KGDB
- if (info->state->smc_scc_num == KGDB_SER_IDX) {
- if (*cp == 0x03 || *cp == '$')
- breakpoint();
- return;
- }
-#endif
-
- /* Check to see if there is room in the tty buffer for
- * the characters in our BD buffer. If not, we exit
- * now, leaving the BD with the characters. We'll pick
- * them up again on the next receive interrupt (which could
- * be a timeout).
- */
- if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE)
- break;
-
- while (i-- > 0) {
- ch = *cp++;
- *tty->flip.char_buf_ptr = ch;
- icount->rx++;
-
-#ifdef SERIAL_DEBUG_INTR
- printk("DR%02x:%02x...", ch, status);
-#endif
- *tty->flip.flag_buf_ptr = 0;
- if (status & (BD_SC_BR | BD_SC_FR |
- BD_SC_PR | BD_SC_OV)) {
- /*
- * For statistics only
- */
- if (status & BD_SC_BR)
- icount->brk++;
- else if (status & BD_SC_PR)
- icount->parity++;
- else if (status & BD_SC_FR)
- icount->frame++;
- if (status & BD_SC_OV)
- icount->overrun++;
-
- /*
- * Now check to see if character should be
- * ignored, and mask off conditions which
- * should be ignored.
- if (status & info->ignore_status_mask) {
- if (++ignored > 100)
- break;
- continue;
- }
- */
- status &= info->read_status_mask;
-
- if (status & (BD_SC_BR)) {
-#ifdef SERIAL_DEBUG_INTR
- printk("handling break....");
-#endif
- *tty->flip.flag_buf_ptr = TTY_BREAK;
- if (info->flags & ASYNC_SAK)
- do_SAK(tty);
- } else if (status & BD_SC_PR)
- *tty->flip.flag_buf_ptr = TTY_PARITY;
- else if (status & BD_SC_FR)
- *tty->flip.flag_buf_ptr = TTY_FRAME;
- if (status & BD_SC_OV) {
- /*
- * Overrun is special, since it's
- * reported immediately, and doesn't
- * affect the current character
- */
- if (tty->flip.count < TTY_FLIPBUF_SIZE) {
- tty->flip.count++;
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- *tty->flip.flag_buf_ptr =
- TTY_OVERRUN;
- }
- }
- }
-#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
- if (break_pressed && info->line == sercons.index) {
- if (ch != 0 && time_before(jiffies,
- break_pressed + HZ*5)) {
- handle_sysrq(ch, regs, NULL);
- break_pressed = 0;
- goto ignore_char;
- } else
- break_pressed = 0;
- }
-#endif
- if (tty->flip.count >= TTY_FLIPBUF_SIZE)
- break;
-
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- tty->flip.count++;
- }
-
-#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
- ignore_char:
-#endif
- /* This BD is ready to be used again. Clear status.
- * Get next BD.
- */
- bdp->cbd_sc |= BD_SC_EMPTY;
- bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
-
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = info->rx_bd_base;
- else
- bdp++;
- }
- info->rx_cur = (cbd_t *)bdp;
-
- queue_task(&tty->flip.tqueue, &tq_timer);
-}
-
-static _INLINE_ void receive_break(ser_info_t *info, struct pt_regs *regs)
-{
- struct tty_struct *tty = info->tty;
-
- info->state->icount.brk++;
-
-#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
- if (info->line == sercons.index) {
- if (!break_pressed) {
- break_pressed = jiffies;
- return;
- } else
- break_pressed = 0;
- }
-#endif
-
- /* Check to see if there is room in the tty buffer for
- * the break. If not, we exit now, losing the break. FIXME
- */
- if ((tty->flip.count + 1) >= TTY_FLIPBUF_SIZE)
- return;
- *(tty->flip.flag_buf_ptr++) = TTY_BREAK;
- *(tty->flip.char_buf_ptr++) = 0;
- tty->flip.count++;
-
- queue_task(&tty->flip.tqueue, &tq_timer);
-}
-
-static _INLINE_ void transmit_chars(ser_info_t *info, struct pt_regs *regs)
-{
-
- if ((info->flags & TX_WAKEUP) ||
- (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
- rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
- }
-
-#ifdef SERIAL_DEBUG_INTR
- printk("THRE...");
-#endif
-}
-
-#ifdef notdef
- /* I need to do this for the SCCs, so it is left as a reminder.
- */
-static _INLINE_ void check_modem_status(struct async_struct *info)
-{
- int status;
- struct async_icount *icount;
-
- status = serial_in(info, UART_MSR);
-
- if (status & UART_MSR_ANY_DELTA) {
- icount = &info->state->icount;
- /* update input line counters */
- if (status & UART_MSR_TERI)
- icount->rng++;
- if (status & UART_MSR_DDSR)
- icount->dsr++;
- if (status & UART_MSR_DDCD) {
- icount->dcd++;
-#ifdef CONFIG_HARD_PPS
- if ((info->flags & ASYNC_HARDPPS_CD) &&
- (status & UART_MSR_DCD))
- hardpps();
-#endif
- }
- if (status & UART_MSR_DCTS)
- icount->cts++;
- wake_up_interruptible(&info->delta_msr_wait);
- }
-
- if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
-#if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
- printk("ttys%d CD now %s...", info->line,
- (status & UART_MSR_DCD) ? "on" : "off");
-#endif
- if (status & UART_MSR_DCD)
- wake_up_interruptible(&info->open_wait);
- else {
-#ifdef SERIAL_DEBUG_OPEN
- printk("scheduling hangup...");
-#endif
- schedule_task(&info->tqueue_hangup);
- }
- }
- if (info->flags & ASYNC_CTS_FLOW) {
- if (info->tty->hw_stopped) {
- if (status & UART_MSR_CTS) {
-#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
- printk("CTS tx start...");
-#endif
- info->tty->hw_stopped = 0;
- info->IER |= UART_IER_THRI;
- serial_out(info, UART_IER, info->IER);
- rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
- return;
- }
- } else {
- if (!(status & UART_MSR_CTS)) {
-#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
- printk("CTS tx stop...");
-#endif
- info->tty->hw_stopped = 1;
- info->IER &= ~UART_IER_THRI;
- serial_out(info, UART_IER, info->IER);
- }
- }
- }
-}
-#endif
-
-/*
- * This is the serial driver's interrupt routine for a single port
- */
-static void rs_8xx_interrupt(void *dev_id, struct pt_regs *regs)
-{
- u_char events;
- int idx;
- ser_info_t *info;
- volatile smc_t *smcp;
- volatile scc_t *sccp;
-
- info = (ser_info_t *)dev_id;
-
- idx = PORT_NUM(info->state->smc_scc_num);
- if (info->state->smc_scc_num & NUM_IS_SCC) {
- sccp = &cpmp->cp_scc[idx];
- events = sccp->scc_scce;
- if (events & SMCM_BRKE)
- receive_break(info, regs);
- if (events & SCCM_RX)
- receive_chars(info, regs);
- if (events & SCCM_TX)
- transmit_chars(info, regs);
- sccp->scc_scce = events;
- }
- else {
- smcp = &cpmp->cp_smc[idx];
- events = smcp->smc_smce;
- if (events & SMCM_BRKE)
- receive_break(info, regs);
- if (events & SMCM_RX)
- receive_chars(info, regs);
- if (events & SMCM_TX)
- transmit_chars(info, regs);
- smcp->smc_smce = events;
- }
-
-#ifdef SERIAL_DEBUG_INTR
- printk("rs_interrupt_single(%d, %x)...",
- info->state->smc_scc_num, events);
-#endif
-#ifdef modem_control
- check_modem_status(info);
-#endif
- info->last_active = jiffies;
-#ifdef SERIAL_DEBUG_INTR
- printk("end.\n");
-#endif
-}
-
-
-/*
- * -------------------------------------------------------------------
- * Here ends the serial interrupt routines.
- * -------------------------------------------------------------------
- */
-
-/*
- * This routine is used to handle the "bottom half" processing for the
- * serial driver, known also the "software interrupt" processing.
- * This processing is done at the kernel interrupt level, after the
- * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
- * is where time-consuming activities which can not be done in the
- * interrupt driver proper are done; the interrupt driver schedules
- * them using rs_sched_event(), and they get done here.
- */
-static void do_serial_bh(void)
-{
- run_task_queue(&tq_serial);
-}
-
-static void do_softint(void *private_)
-{
- ser_info_t *info = (ser_info_t *) private_;
- struct tty_struct *tty;
-
- tty = info->tty;
- if (!tty)
- return;
-
- if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
- wake_up_interruptible(&tty->write_wait);
- }
-}
-
-/*
- * This routine is called from the scheduler tqueue when the interrupt
- * routine has signalled that a hangup has occurred. The path of
- * hangup processing is:
- *
- * serial interrupt routine -> (scheduler tqueue) ->
- * do_serial_hangup() -> tty->hangup() -> rs_hangup()
- *
- */
-static void do_serial_hangup(void *private_)
-{
- struct async_struct *info = (struct async_struct *) private_;
- struct tty_struct *tty;
-
- tty = info->tty;
- if (tty)
- tty_hangup(tty);
-}
-
-/*static void rs_8xx_timer(void)
-{
- printk("rs_8xx_timer\n");
-}*/
-
-
-static int startup(ser_info_t *info)
-{
- unsigned long flags;
- int retval=0;
- int idx;
- struct serial_state *state= info->state;
- volatile smc_t *smcp;
- volatile scc_t *sccp;
- volatile smc_uart_t *up;
- volatile scc_uart_t *scup;
-
-
- save_flags(flags); cli();
-
- if (info->flags & ASYNC_INITIALIZED) {
- goto errout;
- }
-
-#ifdef maybe
- if (!state->port || !state->type) {
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
- goto errout;
- }
-#endif
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("starting up ttys%d (irq %d)...", info->line, state->irq);
-#endif
-
-
-#ifdef modem_control
- info->MCR = 0;
- if (info->tty->termios->c_cflag & CBAUD)
- info->MCR = UART_MCR_DTR | UART_MCR_RTS;
-#endif
-
- if (info->tty)
- clear_bit(TTY_IO_ERROR, &info->tty->flags);
-
- /*
- * and set the speed of the serial port
- */
- change_speed(info);
-
- idx = PORT_NUM(info->state->smc_scc_num);
- if (info->state->smc_scc_num & NUM_IS_SCC) {
- sccp = &cpmp->cp_scc[idx];
- scup = (scc_uart_t *)&cpmp->cp_dparam[state->port];
- scup->scc_genscc.scc_mrblr = RX_BUF_SIZE;
- scup->scc_maxidl = RX_BUF_SIZE;
- sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
- sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- }
- else {
- smcp = &cpmp->cp_smc[idx];
-
- /* Enable interrupts and I/O.
- */
- smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
- smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
-
- /* We can tune the buffer length and idle characters
- * to take advantage of the entire incoming buffer size.
- * If mrblr is something other than 1, maxidl has to be
- * non-zero or we never get an interrupt. The maxidl
- * is the number of character times we wait after reception
- * of the last character before we decide no more characters
- * are coming.
- */
- up = (smc_uart_t *)&cpmp->cp_dparam[state->port];
- up->smc_mrblr = RX_BUF_SIZE;
- up->smc_maxidl = RX_BUF_SIZE;
- up->smc_brkcr = 1; /* number of break chars */
- }
-
- info->flags |= ASYNC_INITIALIZED;
- restore_flags(flags);
- return 0;
-
-errout:
- restore_flags(flags);
- return retval;
-}
-
-/*
- * This routine will shutdown a serial port; interrupts are disabled, and
- * DTR is dropped if the hangup on close termio flag is on.
- */
-static void shutdown(ser_info_t * info)
-{
- unsigned long flags;
- struct serial_state *state;
- int idx;
- volatile smc_t *smcp;
- volatile scc_t *sccp;
-
- if (!(info->flags & ASYNC_INITIALIZED))
- return;
-
- state = info->state;
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("Shutting down serial port %d (irq %d)....", info->line,
- state->irq);
-#endif
-
- save_flags(flags); cli(); /* Disable interrupts */
-
- idx = PORT_NUM(state->smc_scc_num);
- if (state->smc_scc_num & NUM_IS_SCC) {
- sccp = &cpmp->cp_scc[idx];
- sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#ifdef CONFIG_SERIAL_CONSOLE
- /* We can't disable the transmitter if this is the
- * system console.
- */
- if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
-#endif
- sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
- }
- else {
- smcp = &cpmp->cp_smc[idx];
-
- /* Disable interrupts and I/O.
- */
- smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
-#ifdef CONFIG_SERIAL_CONSOLE
- /* We can't disable the transmitter if this is the
- * system console.
- */
- if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
-#endif
- smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
- }
-
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
-
- info->flags &= ~ASYNC_INITIALIZED;
- restore_flags(flags);
-}
-
-/*
- * This routine is called to set the UART divisor registers to match
- * the specified baud rate for a serial port.
- */
-static void change_speed(ser_info_t *info)
-{
- int baud_rate;
- unsigned cflag, cval, scval, prev_mode, new_mode;
- int i, bits, sbits, idx;
- unsigned long flags;
- struct serial_state *state;
- volatile smc_t *smcp;
- volatile scc_t *sccp;
-
- if (!info->tty || !info->tty->termios)
- return;
- cflag = info->tty->termios->c_cflag;
-
- state = info->state;
-
- /* Character length programmed into the mode register is the
- * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
- * 1 or 2 stop bits, minus 1.
- * The value 'bits' counts this for us.
- */
- cval = 0;
- scval = 0;
-
- /* byte size and parity */
- switch (cflag & CSIZE) {
- case CS5: bits = 5; break;
- case CS6: bits = 6; break;
- case CS7: bits = 7; break;
- case CS8: bits = 8; break;
- /* Never happens, but GCC is too dumb to figure it out */
- default: bits = 8; break;
- }
- sbits = bits - 5;
-
- if (cflag & CSTOPB) {
- cval |= SMCMR_SL; /* Two stops */
- scval |= SCU_PMSR_SL;
- bits++;
- }
- if (cflag & PARENB) {
- cval |= SMCMR_PEN;
- scval |= SCU_PMSR_PEN;
- bits++;
- if (!(cflag & PARODD)) {
- cval |= SMCMR_PM_EVEN;
- scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
- }
- }
-
- /* Determine divisor based on baud rate */
- i = cflag & CBAUD;
- if (i >= (sizeof(baud_table)/sizeof(int)))
- baud_rate = 9600;
- else
- baud_rate = baud_table[i];
-
- info->timeout = (TX_BUF_SIZE*HZ*bits);
- info->timeout += HZ/50; /* Add .02 seconds of slop */
-
-#ifdef modem_control
- /* CTS flow control flag and modem status interrupts */
- info->IER &= ~UART_IER_MSI;
- if (info->flags & ASYNC_HARDPPS_CD)
- info->IER |= UART_IER_MSI;
- if (cflag & CRTSCTS) {
- info->flags |= ASYNC_CTS_FLOW;
- info->IER |= UART_IER_MSI;
- } else
- info->flags &= ~ASYNC_CTS_FLOW;
- if (cflag & CLOCAL)
- info->flags &= ~ASYNC_CHECK_CD;
- else {
- info->flags |= ASYNC_CHECK_CD;
- info->IER |= UART_IER_MSI;
- }
- serial_out(info, UART_IER, info->IER);
-#endif
-
- /*
- * Set up parity check flag
- */
-#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
-
- info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
- if (I_INPCK(info->tty))
- info->read_status_mask |= BD_SC_FR | BD_SC_PR;
- if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
- info->read_status_mask |= BD_SC_BR;
-
- /*
- * Characters to ignore
- */
- info->ignore_status_mask = 0;
- if (I_IGNPAR(info->tty))
- info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
- if (I_IGNBRK(info->tty)) {
- info->ignore_status_mask |= BD_SC_BR;
- /*
- * If we're ignore parity and break indicators, ignore
- * overruns too. (For real raw support).
- */
- if (I_IGNPAR(info->tty))
- info->ignore_status_mask |= BD_SC_OV;
- }
- /*
- * !!! ignore all characters if CREAD is not set
- */
- if ((cflag & CREAD) == 0)
- info->read_status_mask &= ~BD_SC_EMPTY;
- save_flags(flags); cli();
-
- /* Start bit has not been added (so don't, because we would just
- * subtract it later), and we need to add one for the number of
- * stops bits (there is always at least one).
- */
- bits++;
- idx = PORT_NUM(state->smc_scc_num);
- if (state->smc_scc_num & NUM_IS_SCC) {
- sccp = &cpmp->cp_scc[idx];
- new_mode = (sbits << 12) | scval;
- prev_mode = sccp->scc_pmsr;
- if (!(prev_mode & SCU_PMSR_PEN))
- /* If parity is disabled, mask out even/odd */
- prev_mode &= ~(SCU_PMSR_TPM|SCU_PMSR_RPM);
- if (prev_mode != new_mode)
- sccp->scc_pmsr = new_mode;
- }
- else {
- smcp = &cpmp->cp_smc[idx];
-
- /* Set the mode register. We want to keep a copy of the
- * enables, because we want to put them back if they were
- * present.
- */
- prev_mode = smcp->smc_smcmr;
- new_mode = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
- new_mode |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
- if (!(prev_mode & SMCMR_PEN))
- /* If parity is disabled, mask out even/odd */
- prev_mode &= ~SMCMR_PM_EVEN;
- if (prev_mode != new_mode)
- smcp->smc_smcmr = new_mode;
- }
-
- m8xx_cpm_setbrg((state - rs_table), baud_rate);
-
- restore_flags(flags);
-}
-
-static void rs_8xx_put_char(struct tty_struct *tty, unsigned char ch)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- volatile cbd_t *bdp;
- unsigned char *cp;
-
- if (serial_paranoia_check(info, tty->name, "rs_put_char"))
- return;
-
- if (!tty)
- return;
-
- bdp = info->tx_cur;
- while (bdp->cbd_sc & BD_SC_READY);
-
- cp = info->tx_va_base + ((bdp - info->tx_bd_base) * TX_BUF_SIZE);
- *cp = ch;
- bdp->cbd_datlen = 1;
- bdp->cbd_sc |= BD_SC_READY;
-
- /* Get next BD.
- */
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = info->tx_bd_base;
- else
- bdp++;
-
- info->tx_cur = (cbd_t *)bdp;
-
-}
-
-static int rs_8xx_write(struct tty_struct * tty, int from_user,
- const unsigned char *buf, int count)
-{
- int c, ret = 0;
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- volatile cbd_t *bdp;
- unsigned char *cp;
-
-#ifdef CONFIG_KGDB_CONSOLE
- /* Try to let stub handle output. Returns true if it did. */
- if (kgdb_output_string(buf, count))
- return ret;
-#endif
-
- if (serial_paranoia_check(info, tty->name, "rs_write"))
- return 0;
-
- if (!tty)
- return 0;
-
- bdp = info->tx_cur;
-
- while (1) {
- c = min(count, TX_BUF_SIZE);
-
- if (c <= 0)
- break;
-
- if (bdp->cbd_sc & BD_SC_READY) {
- info->flags |= TX_WAKEUP;
- break;
- }
-
- cp = info->tx_va_base + ((bdp - info->tx_bd_base) * TX_BUF_SIZE);
- if (from_user) {
- if (copy_from_user((void *)cp, buf, c)) {
- if (!ret)
- ret = -EFAULT;
- break;
- }
- } else {
- memcpy((void *)cp, buf, c);
- }
-
- bdp->cbd_datlen = c;
- bdp->cbd_sc |= BD_SC_READY;
-
- buf += c;
- count -= c;
- ret += c;
-
- /* Get next BD.
- */
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = info->tx_bd_base;
- else
- bdp++;
- info->tx_cur = (cbd_t *)bdp;
- }
- return ret;
-}
-
-static int rs_8xx_write_room(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- int ret;
-
- if (serial_paranoia_check(info, tty->name, "rs_write_room"))
- return 0;
-
- if ((info->tx_cur->cbd_sc & BD_SC_READY) == 0) {
- info->flags &= ~TX_WAKEUP;
- ret = TX_BUF_SIZE;
- }
- else {
- info->flags |= TX_WAKEUP;
- ret = 0;
- }
- return ret;
-}
-
-/* I could track this with transmit counters....maybe later.
-*/
-static int rs_8xx_chars_in_buffer(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-
- if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
- return 0;
- return 0;
-}
-
-static void rs_8xx_flush_buffer(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-
- if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
- return;
-
- /* There is nothing to "flush", whatever we gave the CPM
- * is on its way out.
- */
- wake_up_interruptible(&tty->write_wait);
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
- info->flags &= ~TX_WAKEUP;
-}
-
-/*
- * This function is used to send a high-priority XON/XOFF character to
- * the device
- */
-static void rs_8xx_send_xchar(struct tty_struct *tty, char ch)
-{
- volatile cbd_t *bdp;
- unsigned char *cp;
-
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-
- if (serial_paranoia_check(info, tty->name, "rs_send_char"))
- return;
-
- bdp = info->tx_cur;
- while (bdp->cbd_sc & BD_SC_READY);
-
- cp = info->tx_va_base + ((bdp - info->tx_bd_base) * TX_BUF_SIZE);
- *cp = ch;
- bdp->cbd_datlen = 1;
- bdp->cbd_sc |= BD_SC_READY;
-
- /* Get next BD.
- */
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = info->tx_bd_base;
- else
- bdp++;
-
- info->tx_cur = (cbd_t *)bdp;
-}
-
-/*
- * ------------------------------------------------------------
- * rs_throttle()
- *
- * This routine is called by the upper-layer tty layer to signal that
- * incoming characters should be throttled.
- * ------------------------------------------------------------
- */
-static void rs_8xx_throttle(struct tty_struct * tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-#ifdef SERIAL_DEBUG_THROTTLE
- char buf[64];
-
- printk("throttle %s: %d....\n", _tty_name(tty, buf),
- tty->ldisc.chars_in_buffer(tty));
-#endif
-
- if (serial_paranoia_check(info, tty->name, "rs_throttle"))
- return;
-
- if (I_IXOFF(tty))
- rs_8xx_send_xchar(tty, STOP_CHAR(tty));
-
-#ifdef modem_control
- if (tty->termios->c_cflag & CRTSCTS)
- info->MCR &= ~UART_MCR_RTS;
-
- cli();
- serial_out(info, UART_MCR, info->MCR);
- sti();
-#endif
-}
-
-static void rs_8xx_unthrottle(struct tty_struct * tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-#ifdef SERIAL_DEBUG_THROTTLE
- char buf[64];
-
- printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
- tty->ldisc.chars_in_buffer(tty));
-#endif
-
- if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
- return;
-
- if (I_IXOFF(tty)) {
- if (info->x_char)
- info->x_char = 0;
- else
- rs_8xx_send_xchar(tty, START_CHAR(tty));
- }
-#ifdef modem_control
- if (tty->termios->c_cflag & CRTSCTS)
- info->MCR |= UART_MCR_RTS;
- cli();
- serial_out(info, UART_MCR, info->MCR);
- sti();
-#endif
-}
-
-/*
- * ------------------------------------------------------------
- * rs_ioctl() and friends
- * ------------------------------------------------------------
- */
-
-#ifdef maybe
-/*
- * get_lsr_info - get line status register info
- *
- * Purpose: Let user call ioctl() to get info when the UART physically
- * is emptied. On bus types like RS485, the transmitter must
- * release the bus after transmitting. This must be done when
- * the transmit shift register is empty, not be done when the
- * transmit holding register is empty. This functionality
- * allows an RS485 driver to be written in user space.
- */
-static int get_lsr_info(struct async_struct * info, unsigned int *value)
-{
- unsigned char status;
- unsigned int result;
-
- cli();
- status = serial_in(info, UART_LSR);
- sti();
- result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
- return put_user(result,value);
-}
-#endif
-
-static int get_modem_info(ser_info_t *info, unsigned int *value)
-{
- unsigned int result = 0;
-#ifdef modem_control
- unsigned char control, status;
-
- control = info->MCR;
- cli();
- status = serial_in(info, UART_MSR);
- sti();
- result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
- | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
-#ifdef TIOCM_OUT1
- | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
- | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
-#endif
- | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
- | ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
- | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
- | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
-#endif
- return put_user(result,value);
-}
-
-static int set_modem_info(ser_info_t *info, unsigned int cmd,
- unsigned int *value)
-{
- int error;
- unsigned int arg;
-
- error = get_user(arg, value);
- if (error)
- return error;
-#ifdef modem_control
- switch (cmd) {
- case TIOCMBIS:
- if (arg & TIOCM_RTS)
- info->MCR |= UART_MCR_RTS;
- if (arg & TIOCM_DTR)
- info->MCR |= UART_MCR_DTR;
-#ifdef TIOCM_OUT1
- if (arg & TIOCM_OUT1)
- info->MCR |= UART_MCR_OUT1;
- if (arg & TIOCM_OUT2)
- info->MCR |= UART_MCR_OUT2;
-#endif
- break;
- case TIOCMBIC:
- if (arg & TIOCM_RTS)
- info->MCR &= ~UART_MCR_RTS;
- if (arg & TIOCM_DTR)
- info->MCR &= ~UART_MCR_DTR;
-#ifdef TIOCM_OUT1
- if (arg & TIOCM_OUT1)
- info->MCR &= ~UART_MCR_OUT1;
- if (arg & TIOCM_OUT2)
- info->MCR &= ~UART_MCR_OUT2;
-#endif
- break;
- case TIOCMSET:
- info->MCR = ((info->MCR & ~(UART_MCR_RTS |
-#ifdef TIOCM_OUT1
- UART_MCR_OUT1 |
- UART_MCR_OUT2 |
-#endif
- UART_MCR_DTR))
- | ((arg & TIOCM_RTS) ? UART_MCR_RTS : 0)
-#ifdef TIOCM_OUT1
- | ((arg & TIOCM_OUT1) ? UART_MCR_OUT1 : 0)
- | ((arg & TIOCM_OUT2) ? UART_MCR_OUT2 : 0)
-#endif
- | ((arg & TIOCM_DTR) ? UART_MCR_DTR : 0));
- break;
- default:
- return -EINVAL;
- }
- cli();
- serial_out(info, UART_MCR, info->MCR);
- sti();
-#endif
- return 0;
-}
-
-/* Sending a break is a two step process on the SMC/SCC. It is accomplished
- * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
- * command. We take advantage of the begin/end functions to make this
- * happen.
- */
-static ushort smc_chan_map[] = {
- CPM_CR_CH_SMC1,
- CPM_CR_CH_SMC2
-};
-
-static ushort scc_chan_map[] = {
- CPM_CR_CH_SCC1,
- CPM_CR_CH_SCC2,
- CPM_CR_CH_SCC3,
- CPM_CR_CH_SCC4
-};
-
-static void begin_break(ser_info_t *info)
-{
- volatile cpm8xx_t *cp;
- ushort chan;
- int idx;
-
- cp = cpmp;
-
- idx = PORT_NUM(info->state->smc_scc_num);
- if (info->state->smc_scc_num & NUM_IS_SCC)
- chan = scc_chan_map[idx];
- else
- chan = smc_chan_map[idx];
- cp->cp_cpcr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-}
-
-static void end_break(ser_info_t *info)
-{
- volatile cpm8xx_t *cp;
- ushort chan;
- int idx;
-
- cp = cpmp;
-
- idx = PORT_NUM(info->state->smc_scc_num);
- if (info->state->smc_scc_num & NUM_IS_SCC)
- chan = scc_chan_map[idx];
- else
- chan = smc_chan_map[idx];
- cp->cp_cpcr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-}
-
-/*
- * This routine sends a break character out the serial port.
- */
-static void send_break(ser_info_t *info, int duration)
-{
- current->state = TASK_INTERRUPTIBLE;
-#ifdef SERIAL_DEBUG_SEND_BREAK
- printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
-#endif
- begin_break(info);
- schedule_timeout(duration);
- end_break(info);
-#ifdef SERIAL_DEBUG_SEND_BREAK
- printk("done jiffies=%lu\n", jiffies);
-#endif
-}
-
-
-static int rs_8xx_ioctl(struct tty_struct *tty, struct file * file,
- unsigned int cmd, unsigned long arg)
-{
- int error;
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- int retval;
- struct async_icount cnow; /* kernel counter temps */
- struct serial_icounter_struct *p_cuser; /* user space */
-
- if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
- return -ENODEV;
-
- if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
- if (tty->flags & (1 << TTY_IO_ERROR))
- return -EIO;
- }
-
- switch (cmd) {
- case TCSBRK: /* SVID version: non-zero arg --> no break */
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- tty_wait_until_sent(tty, 0);
- if (signal_pending(current))
- return -EINTR;
- if (!arg) {
- send_break(info, HZ/4); /* 1/4 second */
- if (signal_pending(current))
- return -EINTR;
- }
- return 0;
- case TCSBRKP: /* support for POSIX tcsendbreak() */
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- tty_wait_until_sent(tty, 0);
- if (signal_pending(current))
- return -EINTR;
- send_break(info, arg ? arg*(HZ/10) : HZ/4);
- if (signal_pending(current))
- return -EINTR;
- return 0;
- case TIOCSBRK:
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- tty_wait_until_sent(tty, 0);
- begin_break(info);
- return 0;
- case TIOCCBRK:
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- end_break(info);
- return 0;
- case TIOCGSOFTCAR:
- return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
- case TIOCSSOFTCAR:
- error = get_user(arg, (unsigned int *) arg);
- if (error)
- return error;
- tty->termios->c_cflag =
- ((tty->termios->c_cflag & ~CLOCAL) |
- (arg ? CLOCAL : 0));
- return 0;
- case TIOCMGET:
- return get_modem_info(info, (unsigned int *) arg);
- case TIOCMBIS:
- case TIOCMBIC:
- case TIOCMSET:
- return set_modem_info(info, cmd, (unsigned int *) arg);
-#ifdef maybe
- case TIOCSERGETLSR: /* Get line status register */
- return get_lsr_info(info, (unsigned int *) arg);
-#endif
- /*
- * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
- * - mask passed in arg for lines of interest
- * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
- * Caller should use TIOCGICOUNT to see which one it was
- */
- case TIOCMIWAIT:
-#ifdef modem_control
- cli();
- /* note the counters on entry */
- cprev = info->state->icount;
- sti();
- while (1) {
- interruptible_sleep_on(&info->delta_msr_wait);
- /* see if a signal did it */
- if (signal_pending(current))
- return -ERESTARTSYS;
- cli();
- cnow = info->state->icount; /* atomic copy */
- sti();
- if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
- cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
- return -EIO; /* no change => error */
- if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
- ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
- ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
- ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
- return 0;
- }
- cprev = cnow;
- }
- /* NOTREACHED */
-#else
- return 0;
-#endif
-
- /*
- * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
- * Return: write counters to the user passed counter struct
- * NB: both 1->0 and 0->1 transitions are counted except for
- * RI where only 0->1 is counted.
- */
- case TIOCGICOUNT:
- cli();
- cnow = info->state->icount;
- sti();
- p_cuser = (struct serial_icounter_struct *) arg;
- error = put_user(cnow.cts, &p_cuser->cts);
- if (error) return error;
- error = put_user(cnow.dsr, &p_cuser->dsr);
- if (error) return error;
- error = put_user(cnow.rng, &p_cuser->rng);
- if (error) return error;
- error = put_user(cnow.dcd, &p_cuser->dcd);
- if (error) return error;
- return 0;
-
- default:
- return -ENOIOCTLCMD;
- }
- return 0;
-}
-
-/* FIX UP modem control here someday......
-*/
-static void rs_8xx_set_termios(struct tty_struct *tty, struct termios *old_termios)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
-
- if ( (tty->termios->c_cflag == old_termios->c_cflag)
- && ( RELEVANT_IFLAG(tty->termios->c_iflag)
- == RELEVANT_IFLAG(old_termios->c_iflag)))
- return;
-
- change_speed(info);
-
-#ifdef modem_control
- /* Handle transition to B0 status */
- if ((old_termios->c_cflag & CBAUD) &&
- !(tty->termios->c_cflag & CBAUD)) {
- info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
- cli();
- serial_out(info, UART_MCR, info->MCR);
- sti();
- }
-
- /* Handle transition away from B0 status */
- if (!(old_termios->c_cflag & CBAUD) &&
- (tty->termios->c_cflag & CBAUD)) {
- info->MCR |= UART_MCR_DTR;
- if (!tty->hw_stopped ||
- !(tty->termios->c_cflag & CRTSCTS)) {
- info->MCR |= UART_MCR_RTS;
- }
- cli();
- serial_out(info, UART_MCR, info->MCR);
- sti();
- }
-
- /* Handle turning off CRTSCTS */
- if ((old_termios->c_cflag & CRTSCTS) &&
- !(tty->termios->c_cflag & CRTSCTS)) {
- tty->hw_stopped = 0;
- rs_8xx_start(tty);
- }
-#endif
-
-#if 0
- /*
- * No need to wake up processes in open wait, since they
- * sample the CLOCAL flag once, and don't recheck it.
- * XXX It's not clear whether the current behavior is correct
- * or not. Hence, this may change.....
- */
- if (!(old_termios->c_cflag & CLOCAL) &&
- (tty->termios->c_cflag & CLOCAL))
- wake_up_interruptible(&info->open_wait);
-#endif
-}
-
-/*
- * ------------------------------------------------------------
- * rs_close()
- *
- * This routine is called when the serial port gets closed. First, we
- * wait for the last remaining data to be sent. Then, we unlink its
- * async structure from the interrupt chain if necessary, and we free
- * that IRQ if nothing is left in the chain.
- * ------------------------------------------------------------
- */
-static void rs_8xx_close(struct tty_struct *tty, struct file * filp)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- struct serial_state *state;
- unsigned long flags;
- int idx;
- volatile smc_t *smcp;
- volatile scc_t *sccp;
-
- if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
- return;
-
- state = info->state;
-
- save_flags(flags); cli();
-
- if (tty_hung_up_p(filp)) {
- DBG_CNT("before DEC-hung");
- restore_flags(flags);
- return;
- }
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("rs_close ttys%d, count = %d\n", info->line, state->count);
-#endif
- if ((tty->count == 1) && (state->count != 1)) {
- /*
- * Uh, oh. tty->count is 1, which means that the tty
- * structure will be freed. state->count should always
- * be one in these conditions. If it's greater than
- * one, we've got real problems, since it means the
- * serial port won't be shutdown.
- */
- printk("rs_close: bad serial port count; tty->count is 1, "
- "state->count is %d\n", state->count);
- state->count = 1;
- }
- if (--state->count < 0) {
- printk("rs_close: bad serial port count for ttys%d: %d\n",
- info->line, state->count);
- state->count = 0;
- }
- if (state->count) {
- DBG_CNT("before DEC-2");
- restore_flags(flags);
- return;
- }
- info->flags |= ASYNC_CLOSING;
- /*
- * Now we wait for the transmit buffer to clear; and we notify
- * the line discipline to only process XON/XOFF characters.
- */
- tty->closing = 1;
- if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
- tty_wait_until_sent(tty, info->closing_wait);
- /*
- * At this point we stop accepting input. To do this, we
- * disable the receive line status interrupts, and tell the
- * interrupt driver to stop checking the data ready bit in the
- * line status register.
- */
- info->read_status_mask &= ~BD_SC_EMPTY;
- if (info->flags & ASYNC_INITIALIZED) {
- idx = PORT_NUM(info->state->smc_scc_num);
- if (info->state->smc_scc_num & NUM_IS_SCC) {
- sccp = &cpmp->cp_scc[idx];
- sccp->scc_sccm &= ~UART_SCCM_RX;
- sccp->scc_gsmrl &= ~SCC_GSMRL_ENR;
- }
- else {
- smcp = &cpmp->cp_smc[idx];
- smcp->smc_smcm &= ~SMCM_RX;
- smcp->smc_smcmr &= ~SMCMR_REN;
- }
- /*
- * Before we drop DTR, make sure the UART transmitter
- * has completely drained; this is especially
- * important if there is a transmit FIFO!
- */
- rs_8xx_wait_until_sent(tty, info->timeout);
- }
- shutdown(info);
- if (tty->driver->flush_buffer)
- tty->driver->flush_buffer(tty);
- if (tty->ldisc.flush_buffer)
- tty->ldisc.flush_buffer(tty);
- tty->closing = 0;
- info->event = 0;
- info->tty = 0;
- if (info->blocked_open) {
- if (info->close_delay) {
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(info->close_delay);
- }
- wake_up_interruptible(&info->open_wait);
- }
- info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
- wake_up_interruptible(&info->close_wait);
- restore_flags(flags);
-}
-
-/*
- * rs_wait_until_sent() --- wait until the transmitter is empty
- */
-static void rs_8xx_wait_until_sent(struct tty_struct *tty, int timeout)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- unsigned long orig_jiffies, char_time;
- /*int lsr;*/
- volatile cbd_t *bdp;
-
- if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
- return;
-
-#ifdef maybe
- if (info->state->type == PORT_UNKNOWN)
- return;
-#endif
-
- orig_jiffies = jiffies;
- /*
- * Set the check interval to be 1/5 of the estimated time to
- * send a single character, and make it at least 1. The check
- * interval should also be less than the timeout.
- *
- * Note: we have to use pretty tight timings here to satisfy
- * the NIST-PCTS.
- */
- char_time = 1;
- if (timeout)
- char_time = min(char_time, timeout);
-#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
- printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
- printk("jiff=%lu...", jiffies);
-#endif
-
- /* We go through the loop at least once because we can't tell
- * exactly when the last character exits the shifter. There can
- * be at least two characters waiting to be sent after the buffers
- * are empty.
- */
- do {
-#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
- printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
-#endif
- current->state = TASK_INTERRUPTIBLE;
-/* current->dyn_prio = 0; make us low-priority */
- schedule_timeout(char_time);
- if (signal_pending(current))
- break;
- if (timeout && time_after(jiffies, orig_jiffies + timeout))
- break;
-
- /* The 'tx_cur' is really the next buffer to send. We
- * have to back up to the previous BD and wait for it
- * to go. This isn't perfect, because all this indicates
- * is the buffer is available. There are still characters
- * in the CPM FIFO.
- */
- bdp = info->tx_cur;
- if (bdp == info->tx_bd_base)
- bdp += (TX_NUM_FIFO-1);
- else
- bdp--;
- } while (bdp->cbd_sc & BD_SC_READY);
- current->state = TASK_RUNNING;
-#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
- printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
-#endif
-}
-
-/*
- * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
- */
-static void rs_8xx_hangup(struct tty_struct *tty)
-{
- ser_info_t *info = (ser_info_t *)tty->driver_data;
- struct serial_state *state = info->state;
-
- if (serial_paranoia_check(info, tty->name, "rs_hangup"))
- return;
-
- state = info->state;
-
- rs_8xx_flush_buffer(tty);
- shutdown(info);
- info->event = 0;
- state->count = 0;
- info->flags &= ~ASYNC_NORMAL_ACTIVE;
- info->tty = 0;
- wake_up_interruptible(&info->open_wait);
-}
-
-/*
- * ------------------------------------------------------------
- * rs_open() and friends
- * ------------------------------------------------------------
- */
-static int block_til_ready(struct tty_struct *tty, struct file * filp,
- ser_info_t *info)
-{
-#ifdef DO_THIS_LATER
- DECLARE_WAITQUEUE(wait, current);
-#endif
- struct serial_state *state = info->state;
- int retval;
- int do_clocal = 0;
-
- /*
- * If the device is in the middle of being closed, then block
- * until it's done, and then try again.
- */
- if (tty_hung_up_p(filp) ||
- (info->flags & ASYNC_CLOSING)) {
- if (info->flags & ASYNC_CLOSING)
- interruptible_sleep_on(&info->close_wait);
-#ifdef SERIAL_DO_RESTART
- if (info->flags & ASYNC_HUP_NOTIFY)
- return -EAGAIN;
- else
- return -ERESTARTSYS;
-#else
- return -EAGAIN;
-#endif
- }
-
- /*
- * If non-blocking mode is set, or the port is not enabled,
- * then make the check up front and then exit.
- * If this is an SMC port, we don't have modem control to wait
- * for, so just get out here.
- */
- if ((filp->f_flags & O_NONBLOCK) ||
- (tty->flags & (1 << TTY_IO_ERROR)) ||
- !(info->state->smc_scc_num & NUM_IS_SCC)) {
- info->flags |= ASYNC_NORMAL_ACTIVE;
- return 0;
- }
-
- if (tty->termios->c_cflag & CLOCAL)
- do_clocal = 1;
-
- /*
- * Block waiting for the carrier detect and the line to become
- * free (i.e., not in use by the callout). While we are in
- * this loop, state->count is dropped by one, so that
- * rs_close() knows when to free things. We restore it upon
- * exit, either normal or abnormal.
- */
- retval = 0;
-#ifdef DO_THIS_LATER
- add_wait_queue(&info->open_wait, &wait);
-#ifdef SERIAL_DEBUG_OPEN
- printk("block_til_ready before block: ttys%d, count = %d\n",
- state->line, state->count);
-#endif
- cli();
- if (!tty_hung_up_p(filp))
- state->count--;
- sti();
- info->blocked_open++;
- while (1) {
- cli();
- if ((tty->termios->c_cflag & CBAUD))
- serial_out(info, UART_MCR,
- serial_inp(info, UART_MCR) |
- (UART_MCR_DTR | UART_MCR_RTS));
- sti();
- set_current_state(TASK_INTERRUPTIBLE);
- if (tty_hung_up_p(filp) ||
- !(info->flags & ASYNC_INITIALIZED)) {
-#ifdef SERIAL_DO_RESTART
- if (info->flags & ASYNC_HUP_NOTIFY)
- retval = -EAGAIN;
- else
- retval = -ERESTARTSYS;
-#else
- retval = -EAGAIN;
-#endif
- break;
- }
- if (!(info->flags & ASYNC_CLOSING) &&
- (do_clocal || (serial_in(info, UART_MSR) &
- UART_MSR_DCD)))
- break;
- if (signal_pending(current)) {
- retval = -ERESTARTSYS;
- break;
- }
-#ifdef SERIAL_DEBUG_OPEN
- printk("block_til_ready blocking: ttys%d, count = %d\n",
- info->line, state->count);
-#endif
- schedule();
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&info->open_wait, &wait);
- if (!tty_hung_up_p(filp))
- state->count++;
- info->blocked_open--;
-#ifdef SERIAL_DEBUG_OPEN
- printk("block_til_ready after blocking: ttys%d, count = %d\n",
- info->line, state->count);
-#endif
-#endif /* DO_THIS_LATER */
- if (retval)
- return retval;
- info->flags |= ASYNC_NORMAL_ACTIVE;
- return 0;
-}
-
-static int get_async_struct(int line, ser_info_t **ret_info)
-{
- struct serial_state *sstate;
-
- sstate = rs_table + line;
- if (sstate->info) {
- sstate->count++;
- *ret_info = (ser_info_t *)sstate->info;
- return 0;
- }
- else {
- return -ENOMEM;
- }
-}
-
-/*
- * This routine is called whenever a serial port is opened. It
- * enables interrupts for a serial port, linking in its async structure into
- * the IRQ chain. It also performs the serial-specific
- * initialization for the tty structure.
- */
-static int rs_8xx_open(struct tty_struct *tty, struct file * filp)
-{
- ser_info_t *info;
- int retval, line;
-
- line = tty->index;
- if ((line < 0) || (line >= NR_PORTS))
- return -ENODEV;
- retval = get_async_struct(line, &info);
- if (retval)
- return retval;
- if (serial_paranoia_check(info, tty->name, "rs_open"))
- return -ENODEV;
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("rs_open %s, count = %d\n", tty->name, info->state->count);
-#endif
- tty->driver_data = info;
- info->tty = tty;
-
- /*
- * Start up serial port
- */
- retval = startup(info);
- if (retval)
- return retval;
-
- retval = block_til_ready(tty, filp, info);
- if (retval) {
-#ifdef SERIAL_DEBUG_OPEN
- printk("rs_open returning after block_til_ready with %d\n",
- retval);
-#endif
- return retval;
- }
-
-#ifdef SERIAL_DEBUG_OPEN
- printk("rs_open %s successful...", tty->name);
-#endif
- return 0;
-}
-
-/*
- * /proc fs routines....
- */
-
-static inline int line_info(char *buf, struct serial_state *state)
-{
-#ifdef notdef
- struct async_struct *info = state->info, scr_info;
- char stat_buf[30], control, status;
-#endif
- int ret;
-
- ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
- state->line,
- (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
- (unsigned int)(state->port), state->irq);
-
- if (!state->port || (state->type == PORT_UNKNOWN)) {
- ret += sprintf(buf+ret, "\n");
- return ret;
- }
-
-#ifdef notdef
- /*
- * Figure out the current RS-232 lines
- */
- if (!info) {
- info = &scr_info; /* This is just for serial_{in,out} */
-
- info->magic = SERIAL_MAGIC;
- info->port = state->port;
- info->flags = state->flags;
- info->quot = 0;
- info->tty = 0;
- }
- cli();
- status = serial_in(info, UART_MSR);
- control = info ? info->MCR : serial_in(info, UART_MCR);
- sti();
-
- stat_buf[0] = 0;
- stat_buf[1] = 0;
- if (control & UART_MCR_RTS)
- strcat(stat_buf, "|RTS");
- if (status & UART_MSR_CTS)
- strcat(stat_buf, "|CTS");
- if (control & UART_MCR_DTR)
- strcat(stat_buf, "|DTR");
- if (status & UART_MSR_DSR)
- strcat(stat_buf, "|DSR");
- if (status & UART_MSR_DCD)
- strcat(stat_buf, "|CD");
- if (status & UART_MSR_RI)
- strcat(stat_buf, "|RI");
-
- if (info->quot) {
- ret += sprintf(buf+ret, " baud:%d",
- state->baud_base / info->quot);
- }
-
- ret += sprintf(buf+ret, " tx:%d rx:%d",
- state->icount.tx, state->icount.rx);
-
- if (state->icount.frame)
- ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
-
- if (state->icount.parity)
- ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
-
- if (state->icount.brk)
- ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
-
- if (state->icount.overrun)
- ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
-
- /*
- * Last thing is the RS-232 status lines
- */
- ret += sprintf(buf+ret, " %s\n", stat_buf+1);
-#endif
- return ret;
-}
-
-int rs_8xx_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- int i, len = 0;
- off_t begin = 0;
-
- len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
- for (i = 0; i < NR_PORTS && len < 4000; i++) {
- len += line_info(page + len, &rs_table[i]);
- if (len+begin > off+count)
- goto done;
- if (len+begin < off) {
- begin += len;
- len = 0;
- }
- }
- *eof = 1;
-done:
- if (off >= len+begin)
- return 0;
- *start = page + (begin-off);
- return ((count < begin+len-off) ? count : begin+len-off);
-}
-
-/*
- * ---------------------------------------------------------------------
- * rs_init() and friends
- *
- * rs_init() is called at boot-time to initialize the serial driver.
- * ---------------------------------------------------------------------
- */
-
-/*
- * This routine prints out the appropriate serial driver version
- * number, and identifies which options were configured into this
- * driver.
- */
-static _INLINE_ void show_serial_version(void)
-{
- printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
-}
-
-
-/*
- * The serial console driver used during boot. Note that these names
- * clash with those found in "serial.c", so we currently can't support
- * the 16xxx uarts and these at the same time. I will fix this to become
- * an indirect function call from tty_io.c (or something).
- */
-
-#ifdef CONFIG_SERIAL_CONSOLE
-
-/* I need this just so I can store the virtual addresses and have
- * common functions for the early console printing.
- */
-static ser_info_t consinfo;
-
-/*
- * Print a string to the serial port trying not to disturb any possible
- * real use of the port...
- */
-static void my_console_write(int idx, const char *s,
- unsigned count)
-{
- struct serial_state *ser;
- ser_info_t *info;
- unsigned i;
- volatile cbd_t *bdp, *bdbase;
- volatile smc_uart_t *up;
- volatile u_char *cp;
-
- ser = rs_table + idx;
-
- /* If the port has been initialized for general use, we have
- * to use the buffer descriptors allocated there. Otherwise,
- * we simply use the single buffer allocated.
- */
- if ((info = (ser_info_t *)ser->info) != NULL) {
- bdp = info->tx_cur;
- bdbase = info->tx_bd_base;
- }
- else {
- /* Pointer to UART in parameter ram.
- */
- up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
-
- /* Get the address of the host memory buffer.
- */
- bdp = bdbase = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
-
- info = &consinfo;
- }
-
- /*
- * We need to gracefully shut down the transmitter, disable
- * interrupts, then send our bytes out.
- */
-
- /*
- * Now, do each character. This is not as bad as it looks
- * since this is a holding FIFO and not a transmitting FIFO.
- * We could add the complexity of filling the entire transmit
- * buffer, but we would just wait longer between accesses......
- */
- for (i = 0; i < count; i++, s++) {
- /* Wait for transmitter fifo to empty.
- * Ready indicates output is ready, and xmt is doing
- * that, not that it is ready for us to send.
- */
- while (bdp->cbd_sc & BD_SC_READY);
-
- /* Send the character out.
- * If the buffer address is in the CPM DPRAM, don't
- * convert it.
- */
- if ((uint)(bdp->cbd_bufaddr) > (uint)IMAP_ADDR)
- cp = (u_char *)(bdp->cbd_bufaddr);
- else
- cp = info->tx_va_base + ((bdp - info->tx_bd_base) * TX_BUF_SIZE);
- *cp = *s;
-
- bdp->cbd_datlen = 1;
- bdp->cbd_sc |= BD_SC_READY;
-
- if (bdp->cbd_sc & BD_SC_WRAP)
- bdp = bdbase;
- else
- bdp++;
-
- /* if a LF, also do CR... */
- if (*s == 10) {
- while (bdp->cbd_sc & BD_SC_READY);
- cp = info->tx_va_base + ((bdp - info->tx_bd_base) * TX_BUF_SIZE);
- *cp = 13;
- bdp->cbd_datlen = 1;
- bdp->cbd_sc |= BD_SC_READY;
-
- if (bdp->cbd_sc & BD_SC_WRAP) {
- bdp = bdbase;
- }
- else {
- bdp++;
- }
- }
- }
-
- /*
- * Finally, Wait for transmitter & holding register to empty
- * and restore the IER
- */
- while (bdp->cbd_sc & BD_SC_READY);
-
- if (info)
- info->tx_cur = (cbd_t *)bdp;
-}
-
-static void serial_console_write(struct console *c, const char *s,
- unsigned count)
-{
-#ifdef CONFIG_KGDB_CONSOLE
- /* Try to let stub handle output. Returns true if it did. */
- if (kgdb_output_string(s, count))
- return;
-#endif
- my_console_write(c->index, s, count);
-}
-
-#ifdef CONFIG_XMON
-int
-xmon_8xx_write(const char *s, unsigned count)
-{
- my_console_write(0, s, count);
- return(count);
-}
-#endif
-
-#ifdef CONFIG_KGDB
-void
-putDebugChar(char ch)
-{
- my_console_write(0, &ch, 1);
-}
-#endif
-
-/*
- * Receive character from the serial port. This only works well
- * before the port is initialized for real use.
- */
-static int my_console_wait_key(int idx, int xmon, char *obuf)
-{
- struct serial_state *ser;
- u_char c, *cp;
- ser_info_t *info;
- volatile cbd_t *bdp;
- volatile smc_uart_t *up;
- int i;
-
- ser = rs_table + idx;
-
- /* Pointer to UART in parameter ram.
- */
- up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
-
- /* Get the address of the host memory buffer.
- * If the port has been initialized for general use, we must
- * use information from the port structure.
- */
- if ((info = (ser_info_t *)ser->info)) {
- bdp = info->rx_cur;
- }
- else {
- bdp = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
- info = &consinfo;
- }
-
- /*
- * We need to gracefully shut down the receiver, disable
- * interrupts, then read the input.
- * XMON just wants a poll. If no character, return -1, else
- * return the character.
- */
- if (!xmon) {
- while (bdp->cbd_sc & BD_SC_EMPTY);
- }
- else {
- if (bdp->cbd_sc & BD_SC_EMPTY)
- return -1;
- }
-
- /* If the buffer address is in the CPM DPRAM, don't
- * convert it.
- */
- if ((uint)(bdp->cbd_bufaddr) > (uint)IMAP_ADDR)
- cp = (u_char *)(bdp->cbd_bufaddr);
- else
- cp = info->rx_va_base + ((bdp - info->rx_bd_base) * RX_BUF_SIZE);
-
- if (obuf) {
- i = c = bdp->cbd_datlen;
- while (i-- > 0)
- *obuf++ = *cp++;
- }
- else {
- c = *cp;
- }
- bdp->cbd_sc |= BD_SC_EMPTY;
-
- if (info) {
- if (bdp->cbd_sc & BD_SC_WRAP) {
- bdp = info->rx_bd_base;
- }
- else {
- bdp++;
- }
- info->rx_cur = (cbd_t *)bdp;
- }
-
- return((int)c);
-}
-
-#ifdef CONFIG_XMON
-int
-xmon_8xx_read_poll(void)
-{
- return(my_console_wait_key(0, 1, NULL));
-}
-
-int
-xmon_8xx_read_char(void)
-{
- return(my_console_wait_key(0, 0, NULL));
-}
-#endif
-
-#ifdef CONFIG_KGDB
-static char kgdb_buf[RX_BUF_SIZE], *kgdp;
-static int kgdb_chars;
-
-char
-getDebugChar(void)
-{
- if (kgdb_chars <= 0) {
- kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
- kgdp = kgdb_buf;
- }
- kgdb_chars--;
-
- return(*kgdp++);
-}
-
-void kgdb_interruptible(int yes)
-{
- volatile smc_t *smcp;
-
- smcp = &cpmp->cp_smc[KGDB_SER_IDX];
-
- if (yes == 1)
- smcp->smc_smcm |= SMCM_RX;
- else
- smcp->smc_smcm &= ~SMCM_RX;
-}
-
-void kgdb_map_scc(void)
-{
- struct serial_state *ser;
- uint mem_addr;
- volatile cbd_t *bdp;
- volatile smc_uart_t *up;
-
- cpmp = (cpm8xx_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
-
- /* To avoid data cache CPM DMA coherency problems, allocate a
- * buffer in the CPM DPRAM. This will work until the CPM and
- * serial ports are initialized. At that time a memory buffer
- * will be allocated.
- * The port is already initialized from the boot procedure, all
- * we do here is give it a different buffer and make it a FIFO.
- */
-
- ser = rs_table;
-
- /* Right now, assume we are using SMCs.
- */
- up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
-
- /* Allocate space for an input FIFO, plus a few bytes for output.
- * Allocate bytes to maintain word alignment.
- */
- mem_addr = (uint)(&cpmp->cp_dpmem[0xa00]);
-
- /* Set the physical address of the host memory buffers in
- * the buffer descriptors.
- */
- bdp = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
- bdp->cbd_bufaddr = mem_addr;
-
- bdp = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
- bdp->cbd_bufaddr = mem_addr+RX_BUF_SIZE;
-
- up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */
- up->smc_maxidl = RX_BUF_SIZE;
-}
-#endif
-
-static struct tty_driver *serial_console_device(struct console *c, int *index)
-{
- *index = c->index;
- return serial_driver;
-}
-
-/*
- * Register console.
- */
-static void __init console_8xx_init(long kmem_start, long kmem_end)
-{
- register_console(&sercons);
-}
-console_initcall(console_8xx_init);
-#endif
-
-/* Index in baud rate table of the default console baud rate.
-*/
-static int baud_idx;
-
-static struct tty_operations rs_8xx_ops = {
- .open = rs_8xx_open,
- .close = rs_8xx_close,
- .write = rs_8xx_write,
- .put_char = rs_8xx_put_char,
- .write_room = rs_8xx_write_room,
- .chars_in_buffer = rs_8xx_chars_in_buffer,
- .flush_buffer = rs_8xx_flush_buffer,
- .ioctl = rs_8xx_ioctl,
- .throttle = rs_8xx_throttle,
- .unthrottle = rs_8xx_unthrottle,
- .send_xchar = rs_8xx_send_xchar,
- .set_termios = rs_8xx_set_termios,
- .stop = rs_8xx_stop,
- .start = rs_8xx_start,
- .hangup = rs_8xx_hangup,
- .wait_until_sent = rs_8xx_wait_until_sent,
- .read_proc = rs_8xx_read_proc,
-};
-
-/*
- * The serial driver boot-time initialization code!
- */
-static int __init rs_8xx_init(void)
-{
- struct serial_state * state;
- ser_info_t *info;
- uint mem_addr, iobits, dp_offset;
- int i, j, idx;
- ushort chan;
- volatile cbd_t *bdp;
- volatile cpm8xx_t *cp;
- volatile smc_t *sp;
- volatile smc_uart_t *up;
- volatile scc_t *scp;
- volatile scc_uart_t *sup;
- volatile immap_t *immap;
-
- serial_driver = alloc_tty_driver(NR_PORTS);
- if (!serial_driver)
- return -ENOMEM;
-
- init_bh(SERIAL_BH, do_serial_bh);
-
- show_serial_version();
-
- /* Initialize the tty_driver structure */
-
- serial_driver->owner = THIS_MODULE;
- serial_driver->driver_name = "serial";
- serial_driver->devfs_name = "tts/";
- serial_driver->name = "ttyS";
- serial_driver->major = TTY_MAJOR;
- serial_driver->minor_start = 64;
- serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
- serial_driver->subtype = SERIAL_TYPE_NORMAL;
- serial_driver->init_termios = tty_std_termios;
- serial_driver->init_termios.c_cflag =
- baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
- serial_driver->flags = TTY_DRIVER_REAL_RAW;
- tty_set_operations(serial_driver, &rs_8xx_ops);
-
- if (tty_register_driver(serial_driver))
- panic("Couldn't register serial driver\n");
-
- cp = cpmp; /* Get pointer to Communication Processor */
- immap = (immap_t *)IMAP_ADDR; /* and to internal registers */
-
-
- /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
- */
-#ifdef CONFIG_USE_SCC_IO
-#ifndef CONFIG_MBX
- /* The "standard" configuration through the 860.
- */
- immap->im_ioport.iop_papar |= 0x00fc;
- immap->im_ioport.iop_padir &= ~0x00fc;
- immap->im_ioport.iop_paodr &= ~0x00fc;
-#else
- /* On the MBX, SCC3 is through Port D.
- */
- immap->im_ioport.iop_papar |= 0x000c; /* SCC2 on port A */
- immap->im_ioport.iop_padir &= ~0x000c;
- immap->im_ioport.iop_paodr &= ~0x000c;
-
- immap->im_ioport.iop_pdpar |= 0x0030; /* SCC3 on port D */
-#endif
-
- /* Since we don't yet do modem control, connect the port C pins
- * as general purpose I/O. This will assert CTS and CD for the
- * SCC ports.
- */
- immap->im_ioport.iop_pcdir |= 0x03c6;
- immap->im_ioport.iop_pcpar &= ~0x03c6;
-
- /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and
- * BRG4 to SCC3.
- */
- cp->cp_sicr &= ~0x00ffff00;
- cp->cp_sicr |= 0x001b1200;
-
-#ifdef CONFIG_PP04
- /* Frequentis PP04 forced to RS-232 until we know better.
- * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
- */
- immap->im_ioport.iop_pcdir |= 0x000c;
- immap->im_ioport.iop_pcpar &= ~0x000c;
- immap->im_ioport.iop_pcdat &= ~0x000c;
-
- /* This enables the TX driver.
- */
- cp->cp_pbpar &= ~0x6000;
- cp->cp_pbdat &= ~0x6000;
-#endif
-#endif
-
- for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
- state->magic = SSTATE_MAGIC;
- state->line = i;
- state->type = PORT_UNKNOWN;
- state->custom_divisor = 0;
- state->close_delay = 5*HZ/10;
- state->closing_wait = 30*HZ;
- state->icount.cts = state->icount.dsr =
- state->icount.rng = state->icount.dcd = 0;
- state->icount.rx = state->icount.tx = 0;
- state->icount.frame = state->icount.parity = 0;
- state->icount.overrun = state->icount.brk = 0;
- printk(KERN_INFO "ttyS%d at 0x%04x is a %s\n",
- i, (unsigned int)(state->port),
- (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
-#ifdef CONFIG_SERIAL_CONSOLE
- /* If we just printed the message on the console port, and
- * we are about to initialize it for general use, we have
- * to wait a couple of character times for the CR/NL to
- * make it out of the transmit buffer.
- */
- if (i == CONFIG_SERIAL_CONSOLE_PORT)
- mdelay(2);
-#endif
- info = kmalloc(sizeof(ser_info_t), GFP_KERNEL);
- if (info) {
- __clear_user(info,sizeof(ser_info_t));
- init_waitqueue_head(&info->open_wait);
- init_waitqueue_head(&info->close_wait);
- info->magic = SERIAL_MAGIC;
- info->flags = state->flags;
- info->tqueue.routine = do_softint;
- info->tqueue.data = info;
- info->tqueue_hangup.routine = do_serial_hangup;
- info->tqueue_hangup.data = info;
- info->line = i;
- info->state = state;
- state->info = (struct async_struct *)info;
-
- /* We need to allocate a transmit and receive buffer
- * descriptors from dual port ram, and a character
- * buffer area from host mem.
- */
- dp_offset = cpm_dpalloc(sizeof(cbd_t) * RX_NUM_FIFO, 8);
-
- /* Allocate space for FIFOs in the host memory.
- */
- mem_addr = m8xx_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE);
- info->rx_va_base = (unsigned char *)mem_addr;
-
- /* Set the physical address of the host memory
- * buffers in the buffer descriptors, and the
- * virtual address for us to work with.
- */
- bdp = (cbd_t *)&cp->cp_dpmem[dp_offset];
- info->rx_cur = info->rx_bd_base = (cbd_t *)bdp;
-
- for (j=0; j<(RX_NUM_FIFO-1); j++) {
- bdp->cbd_bufaddr = iopa(mem_addr);
- bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT;
- mem_addr += RX_BUF_SIZE;
- bdp++;
- }
- bdp->cbd_bufaddr = iopa(mem_addr);
- bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
-
- idx = PORT_NUM(info->state->smc_scc_num);
- if (info->state->smc_scc_num & NUM_IS_SCC) {
- scp = &cp->cp_scc[idx];
- sup = (scc_uart_t *)&cp->cp_dparam[state->port];
- sup->scc_genscc.scc_rbase = dp_offset;
- }
- else {
- sp = &cp->cp_smc[idx];
- up = (smc_uart_t *)&cp->cp_dparam[state->port];
- up->smc_rbase = dp_offset;
- }
-
- dp_offset = cpm_dpalloc(sizeof(cbd_t) * TX_NUM_FIFO, 8);
-
- /* Allocate space for FIFOs in the host memory.
- */
- mem_addr = m8xx_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE);
- info->tx_va_base = (unsigned char *)mem_addr;
-
- /* Set the physical address of the host memory
- * buffers in the buffer descriptors, and the
- * virtual address for us to work with.
- */
- bdp = (cbd_t *)&cp->cp_dpmem[dp_offset];
- info->tx_cur = info->tx_bd_base = (cbd_t *)bdp;
-
- for (j=0; j<(TX_NUM_FIFO-1); j++) {
- bdp->cbd_bufaddr = iopa(mem_addr);
- bdp->cbd_sc = BD_SC_INTRPT;
- mem_addr += TX_BUF_SIZE;
- bdp++;
- }
- bdp->cbd_bufaddr = iopa(mem_addr);
- bdp->cbd_sc = (BD_SC_WRAP | BD_SC_INTRPT);
-
- if (info->state->smc_scc_num & NUM_IS_SCC) {
- sup->scc_genscc.scc_tbase = dp_offset;
-
- /* Set up the uart parameters in the
- * parameter ram.
- */
- sup->scc_genscc.scc_rfcr = SMC_EB;
- sup->scc_genscc.scc_tfcr = SMC_EB;
-
- /* Set this to 1 for now, so we get single
- * character interrupts. Using idle charater
- * time requires some additional tuning.
- */
- sup->scc_genscc.scc_mrblr = 1;
- sup->scc_maxidl = 0;
- sup->scc_brkcr = 1;
- sup->scc_parec = 0;
- sup->scc_frmec = 0;
- sup->scc_nosec = 0;
- sup->scc_brkec = 0;
- sup->scc_uaddr1 = 0;
- sup->scc_uaddr2 = 0;
- sup->scc_toseq = 0;
- sup->scc_char1 = 0x8000;
- sup->scc_char2 = 0x8000;
- sup->scc_char3 = 0x8000;
- sup->scc_char4 = 0x8000;
- sup->scc_char5 = 0x8000;
- sup->scc_char6 = 0x8000;
- sup->scc_char7 = 0x8000;
- sup->scc_char8 = 0x8000;
- sup->scc_rccm = 0xc0ff;
-
- /* Send the CPM an initialize command.
- */
- chan = scc_chan_map[idx];
-
- cp->cp_cpcr = mk_cr_cmd(chan,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- scp->scc_gsmrh = 0;
- scp->scc_gsmrl =
- (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
-
- /* Disable all interrupts and clear all pending
- * events.
- */
- scp->scc_sccm = 0;
- scp->scc_scce = 0xffff;
- scp->scc_dsr = 0x7e7e;
- scp->scc_pmsr = 0x3000;
-
- /* If the port is the console, enable Rx and Tx.
- */
-#ifdef CONFIG_SERIAL_CONSOLE
- if (i == CONFIG_SERIAL_CONSOLE_PORT)
- scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
- }
- else {
- /* Configure SMCs Tx/Rx instead of port B
- * parallel I/O. On 823/850 these are on
- * port A for SMC2.
- */
-#ifndef CONFIG_ALTSMC2
- iobits = 0xc0 << (idx * 4);
- cp->cp_pbpar |= iobits;
- cp->cp_pbdir &= ~iobits;
- cp->cp_pbodr &= ~iobits;
-#else
- iobits = 0xc0;
- if (idx == 0) {
- /* SMC1 on Port B, like all 8xx.
- */
- cp->cp_pbpar |= iobits;
- cp->cp_pbdir &= ~iobits;
- cp->cp_pbodr &= ~iobits;
- }
- else {
- /* SMC2 is on Port A.
- */
- immap->im_ioport.iop_papar |= iobits;
- immap->im_ioport.iop_padir &= ~iobits;
- immap->im_ioport.iop_paodr &= ~iobits;
- }
-#endif /* CONFIG_ALTSMC2 */
-
- /* Connect the baud rate generator to the
- * SMC based upon index in rs_table. Also
- * make sure it is connected to NMSI.
- */
- cp->cp_simode &= ~(0xffff << (idx * 16));
- cp->cp_simode |= (i << ((idx * 16) + 12));
-
- up->smc_tbase = dp_offset;
-
- /* Set up the uart parameters in the
- * parameter ram.
- */
- up->smc_rfcr = SMC_EB;
- up->smc_tfcr = SMC_EB;
-
- /* Set this to 1 for now, so we get single
- * character interrupts. Using idle charater
- * time requires some additional tuning.
- */
- up->smc_mrblr = 1;
- up->smc_maxidl = 0;
- up->smc_brkcr = 1;
-
- /* Send the CPM an initialize command.
- */
- chan = smc_chan_map[idx];
-
- cp->cp_cpcr = mk_cr_cmd(chan,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
-
- /* Disable all interrupts and clear all pending
- * events.
- */
- sp->smc_smcm = 0;
- sp->smc_smce = 0xff;
-
- /* If the port is the console, enable Rx and Tx.
- */
-#ifdef CONFIG_SERIAL_CONSOLE
- if (i == CONFIG_SERIAL_CONSOLE_PORT)
- sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
-#endif
- }
-
- /* Install interrupt handler.
- */
- cpm_install_handler(state->irq, rs_8xx_interrupt, info);
-
- /* Set up the baud rate generator.
- */
- m8xx_cpm_setbrg(i, baud_table[baud_idx]);
-
- }
- }
-
- return 0;
-}
-module_init(rs_8xx_init);
-
-/* This must always be called before the rs_8xx_init() function, otherwise
- * it blows away the port control information.
-*/
-static int __init serial_console_setup(struct console *co, char *options)
-{
- struct serial_state *ser;
- uint mem_addr, bidx, idx, dp_offset;
- ushort chan;
- volatile cbd_t *bdp;
- volatile cpm8xx_t *cp;
- volatile smc_t *sp;
- volatile scc_t *scp;
- volatile smc_uart_t *up;
- volatile scc_uart_t *sup;
- bd_t *bd;
-
- bd = (bd_t *)__res;
-
- for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
- if (bd->bi_baudrate == baud_table[bidx])
- break;
- /* make sure we have a useful value */
- if (bidx == (sizeof(baud_table) / sizeof(int)))
- bidx = 13; /* B9600 */
-
- co->cflag = CREAD|CLOCAL|bidx|CS8;
- baud_idx = bidx;
-
- ser = rs_table + co->index;
-
- cp = cpmp; /* Get pointer to Communication Processor */
-
- idx = PORT_NUM(ser->smc_scc_num);
- if (ser->smc_scc_num & NUM_IS_SCC) {
- scp = &cp->cp_scc[idx];
- sup = (scc_uart_t *)&cp->cp_dparam[ser->port];
- }
- else {
- sp = &cp->cp_smc[idx];
- up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
- }
-
- /* When we get here, the CPM has been reset, so we need
- * to configure the port.
- * We need to allocate a transmit and receive buffer descriptor
- * from dual port ram, and a character buffer area from host mem.
- */
-
- /* Allocate space for two FIFOs. We can't allocate from host
- * memory yet because vm allocator isn't initialized
- * during this early console init.
- */
- dp_offset = cpm_dpalloc(8, 8);
- mem_addr = (uint)(&cpmp->cp_dpmem[dp_offset]);
-
- /* Allocate space for two buffer descriptors in the DP ram.
- */
- dp_offset = cpm_dpalloc(sizeof(cbd_t) * 2, 8);
-
- /* Set the physical address of the host memory buffers in
- * the buffer descriptors.
- */
- bdp = (cbd_t *)&cp->cp_dpmem[dp_offset];
- bdp->cbd_bufaddr = iopa(mem_addr);
- (bdp+1)->cbd_bufaddr = iopa(mem_addr+4);
-
- consinfo.rx_va_base = mem_addr;
- consinfo.rx_bd_base = bdp;
- consinfo.tx_va_base = mem_addr + 4;
- consinfo.tx_bd_base = bdp+1;
-
- /* For the receive, set empty and wrap.
- * For transmit, set wrap.
- */
- bdp->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP;
- (bdp+1)->cbd_sc = BD_SC_WRAP;
-
- /* Set up the uart parameters in the parameter ram.
- */
- if (ser->smc_scc_num & NUM_IS_SCC) {
-
- sup->scc_genscc.scc_rbase = dp_offset;
- sup->scc_genscc.scc_tbase = dp_offset + sizeof(cbd_t);
-
- /* Set up the uart parameters in the
- * parameter ram.
- */
- sup->scc_genscc.scc_rfcr = SMC_EB;
- sup->scc_genscc.scc_tfcr = SMC_EB;
-
- /* Set this to 1 for now, so we get single
- * character interrupts. Using idle charater
- * time requires some additional tuning.
- */
- sup->scc_genscc.scc_mrblr = 1;
- sup->scc_maxidl = 0;
- sup->scc_brkcr = 1;
- sup->scc_parec = 0;
- sup->scc_frmec = 0;
- sup->scc_nosec = 0;
- sup->scc_brkec = 0;
- sup->scc_uaddr1 = 0;
- sup->scc_uaddr2 = 0;
- sup->scc_toseq = 0;
- sup->scc_char1 = 0x8000;
- sup->scc_char2 = 0x8000;
- sup->scc_char3 = 0x8000;
- sup->scc_char4 = 0x8000;
- sup->scc_char5 = 0x8000;
- sup->scc_char6 = 0x8000;
- sup->scc_char7 = 0x8000;
- sup->scc_char8 = 0x8000;
- sup->scc_rccm = 0xc0ff;
-
- /* Send the CPM an initialize command.
- */
- chan = scc_chan_map[idx];
-
- cp->cp_cpcr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- scp->scc_gsmrh = 0;
- scp->scc_gsmrl =
- (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
-
- /* Disable all interrupts and clear all pending
- * events.
- */
- scp->scc_sccm = 0;
- scp->scc_scce = 0xffff;
- scp->scc_dsr = 0x7e7e;
- scp->scc_pmsr = 0x3000;
-
- scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
- }
- else {
- up->smc_rbase = dp_offset; /* Base of receive buffer desc. */
- up->smc_tbase = dp_offset+sizeof(cbd_t); /* Base of xmt buffer desc. */
- up->smc_rfcr = SMC_EB;
- up->smc_tfcr = SMC_EB;
-
- /* Set this to 1 for now, so we get single character interrupts.
- */
- up->smc_mrblr = 1; /* receive buffer length */
- up->smc_maxidl = 0; /* wait forever for next char */
-
- /* Send the CPM an initialize command.
- */
- chan = smc_chan_map[idx];
- cp->cp_cpcr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
- printk("%s", "");
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
-
- /* And finally, enable Rx and Tx.
- */
- sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
- }
-
- /* Set up the baud rate generator.
- */
- m8xx_cpm_setbrg((ser - rs_table), bd->bi_baudrate);
-
- return 0;
-}
+++ /dev/null
-/*
- * This file is derived from zlib.h and zconf.h from the zlib-0.95
- * distribution by Jean-loup Gailly and Mark Adler, with some additions
- * by Paul Mackerras to aid in implementing Deflate compression and
- * decompression for PPP packets.
- */
-
-/*
- * ==FILEVERSION 960122==
- *
- * This marker is used by the Linux installation script to determine
- * whether an up-to-date version of this file is already installed.
- */
-
-/* zlib.h -- interface of the 'zlib' general purpose compression library
- version 0.95, Aug 16th, 1995.
-
- Copyright (C) 1995 Jean-loup Gailly and Mark Adler
-
- This software is provided 'as-is', without any express or implied
- warranty. In no event will the authors be held liable for any damages
- arising from the use of this software.
-
- Permission is granted to anyone to use this software for any purpose,
- including commercial applications, and to alter it and redistribute it
- freely, subject to the following restrictions:
-
- 1. The origin of this software must not be misrepresented; you must not
- claim that you wrote the original software. If you use this software
- in a product, an acknowledgment in the product documentation would be
- appreciated but is not required.
- 2. Altered source versions must be plainly marked as such, and must not be
- misrepresented as being the original software.
- 3. This notice may not be removed or altered from any source distribution.
-
- Jean-loup Gailly Mark Adler
- gzip@prep.ai.mit.edu madler@alumni.caltech.edu
- */
-
-#ifndef _ZLIB_H
-#define _ZLIB_H
-
-/* #include "zconf.h" */ /* included directly here */
-
-/* zconf.h -- configuration of the zlib compression library
- * Copyright (C) 1995 Jean-loup Gailly.
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* From: zconf.h,v 1.12 1995/05/03 17:27:12 jloup Exp */
-
-/*
- The library does not install any signal handler. It is recommended to
- add at least a handler for SIGSEGV when decompressing; the library checks
- the consistency of the input data whenever possible but may go nuts
- for some forms of corrupted input.
- */
-
-/*
- * Compile with -DMAXSEG_64K if the alloc function cannot allocate more
- * than 64k bytes at a time (needed on systems with 16-bit int).
- * Compile with -DUNALIGNED_OK if it is OK to access shorts or ints
- * at addresses which are not a multiple of their size.
- * Under DOS, -DFAR=far or -DFAR=__far may be needed.
- */
-
-#ifndef STDC
-# if defined(MSDOS) || defined(__STDC__) || defined(__cplusplus)
-# define STDC
-# endif
-#endif
-
-#ifdef __MWERKS__ /* Metrowerks CodeWarrior declares fileno() in unix.h */
-# include <unix.h>
-#endif
-
-/* Maximum value for memLevel in deflateInit2 */
-#ifndef MAX_MEM_LEVEL
-# ifdef MAXSEG_64K
-# define MAX_MEM_LEVEL 8
-# else
-# define MAX_MEM_LEVEL 9
-# endif
-#endif
-
-#ifndef FAR
-# define FAR
-#endif
-
-/* Maximum value for windowBits in deflateInit2 and inflateInit2 */
-#ifndef MAX_WBITS
-# define MAX_WBITS 15 /* 32K LZ77 window */
-#endif
-
-/* The memory requirements for deflate are (in bytes):
- 1 << (windowBits+2) + 1 << (memLevel+9)
- that is: 128K for windowBits=15 + 128K for memLevel = 8 (default values)
- plus a few kilobytes for small objects. For example, if you want to reduce
- the default memory requirements from 256K to 128K, compile with
- make CFLAGS="-O -DMAX_WBITS=14 -DMAX_MEM_LEVEL=7"
- Of course this will generally degrade compression (there's no free lunch).
-
- The memory requirements for inflate are (in bytes) 1 << windowBits
- that is, 32K for windowBits=15 (default value) plus a few kilobytes
- for small objects.
-*/
-
- /* Type declarations */
-
-#ifndef OF /* function prototypes */
-# ifdef STDC
-# define OF(args) args
-# else
-# define OF(args) ()
-# endif
-#endif
-
-typedef unsigned char Byte; /* 8 bits */
-typedef unsigned int uInt; /* 16 bits or more */
-typedef unsigned long uLong; /* 32 bits or more */
-
-typedef Byte FAR Bytef;
-typedef char FAR charf;
-typedef int FAR intf;
-typedef uInt FAR uIntf;
-typedef uLong FAR uLongf;
-
-#ifdef STDC
- typedef void FAR *voidpf;
- typedef void *voidp;
-#else
- typedef Byte FAR *voidpf;
- typedef Byte *voidp;
-#endif
-
-/* end of original zconf.h */
-
-#define ZLIB_VERSION "0.95P"
-
-/*
- The 'zlib' compression library provides in-memory compression and
- decompression functions, including integrity checks of the uncompressed
- data. This version of the library supports only one compression method
- (deflation) but other algorithms may be added later and will have the same
- stream interface.
-
- For compression the application must provide the output buffer and
- may optionally provide the input buffer for optimization. For decompression,
- the application must provide the input buffer and may optionally provide
- the output buffer for optimization.
-
- Compression can be done in a single step if the buffers are large
- enough (for example if an input file is mmap'ed), or can be done by
- repeated calls of the compression function. In the latter case, the
- application must provide more input and/or consume the output
- (providing more output space) before each call.
-*/
-
-typedef voidpf (*alloc_func) OF((voidpf opaque, uInt items, uInt size));
-typedef void (*free_func) OF((voidpf opaque, voidpf address, uInt nbytes));
-
-struct internal_state;
-
-typedef struct z_stream_s {
- Bytef *next_in; /* next input byte */
- uInt avail_in; /* number of bytes available at next_in */
- uLong total_in; /* total nb of input bytes read so far */
-
- Bytef *next_out; /* next output byte should be put there */
- uInt avail_out; /* remaining free space at next_out */
- uLong total_out; /* total nb of bytes output so far */
-
- char *msg; /* last error message, NULL if no error */
- struct internal_state FAR *state; /* not visible by applications */
-
- alloc_func zalloc; /* used to allocate the internal state */
- free_func zfree; /* used to free the internal state */
- voidp opaque; /* private data object passed to zalloc and zfree */
-
- Byte data_type; /* best guess about the data type: ascii or binary */
-
-} z_stream;
-
-/*
- The application must update next_in and avail_in when avail_in has
- dropped to zero. It must update next_out and avail_out when avail_out
- has dropped to zero. The application must initialize zalloc, zfree and
- opaque before calling the init function. All other fields are set by the
- compression library and must not be updated by the application.
-
- The opaque value provided by the application will be passed as the first
- parameter for calls of zalloc and zfree. This can be useful for custom
- memory management. The compression library attaches no meaning to the
- opaque value.
-
- zalloc must return Z_NULL if there is not enough memory for the object.
- On 16-bit systems, the functions zalloc and zfree must be able to allocate
- exactly 65536 bytes, but will not be required to allocate more than this
- if the symbol MAXSEG_64K is defined (see zconf.h). WARNING: On MSDOS,
- pointers returned by zalloc for objects of exactly 65536 bytes *must*
- have their offset normalized to zero. The default allocation function
- provided by this library ensures this (see zutil.c). To reduce memory
- requirements and avoid any allocation of 64K objects, at the expense of
- compression ratio, compile the library with -DMAX_WBITS=14 (see zconf.h).
-
- The fields total_in and total_out can be used for statistics or
- progress reports. After compression, total_in holds the total size of
- the uncompressed data and may be saved for use in the decompressor
- (particularly if the decompressor wants to decompress everything in
- a single step).
-*/
-
- /* constants */
-
-#define Z_NO_FLUSH 0
-#define Z_PARTIAL_FLUSH 1
-#define Z_FULL_FLUSH 2
-#define Z_SYNC_FLUSH 3 /* experimental: partial_flush + byte align */
-#define Z_FINISH 4
-#define Z_PACKET_FLUSH 5
-/* See deflate() below for the usage of these constants */
-
-#define Z_OK 0
-#define Z_STREAM_END 1
-#define Z_ERRNO (-1)
-#define Z_STREAM_ERROR (-2)
-#define Z_DATA_ERROR (-3)
-#define Z_MEM_ERROR (-4)
-#define Z_BUF_ERROR (-5)
-/* error codes for the compression/decompression functions */
-
-#define Z_BEST_SPEED 1
-#define Z_BEST_COMPRESSION 9
-#define Z_DEFAULT_COMPRESSION (-1)
-/* compression levels */
-
-#define Z_FILTERED 1
-#define Z_HUFFMAN_ONLY 2
-#define Z_DEFAULT_STRATEGY 0
-
-#define Z_BINARY 0
-#define Z_ASCII 1
-#define Z_UNKNOWN 2
-/* Used to set the data_type field */
-
-#define Z_NULL 0 /* for initializing zalloc, zfree, opaque */
-
-extern char *zlib_version;
-/* The application can compare zlib_version and ZLIB_VERSION for consistency.
- If the first character differs, the library code actually used is
- not compatible with the zlib.h header file used by the application.
- */
-
- /* basic functions */
-
-extern int inflateInit OF((z_stream *strm));
-/*
- Initializes the internal stream state for decompression. The fields
- zalloc and zfree must be initialized before by the caller. If zalloc and
- zfree are set to Z_NULL, inflateInit updates them to use default allocation
- functions.
-
- inflateInit returns Z_OK if success, Z_MEM_ERROR if there was not
- enough memory. msg is set to null if there is no error message.
- inflateInit does not perform any decompression: this will be done by
- inflate().
-*/
-
-
-extern int inflate OF((z_stream *strm, int flush));
-/*
- Performs one or both of the following actions:
-
- - Decompress more input starting at next_in and update next_in and avail_in
- accordingly. If not all input can be processed (because there is not
- enough room in the output buffer), next_in is updated and processing
- will resume at this point for the next call of inflate().
-
- - Provide more output starting at next_out and update next_out and avail_out
- accordingly. inflate() always provides as much output as possible
- (until there is no more input data or no more space in the output buffer).
-
- Before the call of inflate(), the application should ensure that at least
- one of the actions is possible, by providing more input and/or consuming
- more output, and updating the next_* and avail_* values accordingly.
- The application can consume the uncompressed output when it wants, for
- example when the output buffer is full (avail_out == 0), or after each
- call of inflate().
-
- If the parameter flush is set to Z_PARTIAL_FLUSH or Z_PACKET_FLUSH,
- inflate flushes as much output as possible to the output buffer. The
- flushing behavior of inflate is not specified for values of the flush
- parameter other than Z_PARTIAL_FLUSH, Z_PACKET_FLUSH or Z_FINISH, but the
- current implementation actually flushes as much output as possible
- anyway. For Z_PACKET_FLUSH, inflate checks that once all the input data
- has been consumed, it is expecting to see the length field of a stored
- block; if not, it returns Z_DATA_ERROR.
-
- inflate() should normally be called until it returns Z_STREAM_END or an
- error. However if all decompression is to be performed in a single step
- (a single call of inflate), the parameter flush should be set to
- Z_FINISH. In this case all pending input is processed and all pending
- output is flushed; avail_out must be large enough to hold all the
- uncompressed data. (The size of the uncompressed data may have been saved
- by the compressor for this purpose.) The next operation on this stream must
- be inflateEnd to deallocate the decompression state. The use of Z_FINISH
- is never required, but can be used to inform inflate that a faster routine
- may be used for the single inflate() call.
-
- inflate() returns Z_OK if some progress has been made (more input
- processed or more output produced), Z_STREAM_END if the end of the
- compressed data has been reached and all uncompressed output has been
- produced, Z_DATA_ERROR if the input data was corrupted, Z_STREAM_ERROR if
- the stream structure was inconsistent (for example if next_in or next_out
- was NULL), Z_MEM_ERROR if there was not enough memory, Z_BUF_ERROR if no
- progress is possible or if there was not enough room in the output buffer
- when Z_FINISH is used. In the Z_DATA_ERROR case, the application may then
- call inflateSync to look for a good compression block. */
-
-
-extern int inflateEnd OF((z_stream *strm));
-/*
- All dynamically allocated data structures for this stream are freed.
- This function discards any unprocessed input and does not flush any
- pending output.
-
- inflateEnd returns Z_OK if success, Z_STREAM_ERROR if the stream state
- was inconsistent. In the error case, msg may be set but then points to a
- static string (which must not be deallocated).
-*/
-
- /* advanced functions */
-
-extern int inflateInit2 OF((z_stream *strm,
- int windowBits));
-/*
- This is another version of inflateInit with more compression options. The
- fields next_out, zalloc and zfree must be initialized before by the caller.
-
- The windowBits parameter is the base two logarithm of the maximum window
- size (the size of the history buffer). It should be in the range 8..15 for
- this version of the library (the value 16 will be allowed soon). The
- default value is 15 if inflateInit is used instead. If a compressed stream
- with a larger window size is given as input, inflate() will return with
- the error code Z_DATA_ERROR instead of trying to allocate a larger window.
-
- If next_out is not null, the library will use this buffer for the history
- buffer; the buffer must either be large enough to hold the entire output
- data, or have at least 1<<windowBits bytes. If next_out is null, the
- library will allocate its own buffer (and leave next_out null). next_in
- need not be provided here but must be provided by the application for the
- next call of inflate().
-
- If the history buffer is provided by the application, next_out must
- never be changed by the application since the decompressor maintains
- history information inside this buffer from call to call; the application
- can only reset next_out to the beginning of the history buffer when
- avail_out is zero and all output has been consumed.
-
- inflateInit2 returns Z_OK if success, Z_MEM_ERROR if there was
- not enough memory, Z_STREAM_ERROR if a parameter is invalid (such as
- windowBits < 8). msg is set to null if there is no error message.
- inflateInit2 does not perform any decompression: this will be done by
- inflate().
-*/
-
-extern int inflateSync OF((z_stream *strm));
-/*
- Skips invalid compressed data until the special marker (see deflate()
- above) can be found, or until all available input is skipped. No output
- is provided.
-
- inflateSync returns Z_OK if the special marker has been found, Z_BUF_ERROR
- if no more input was provided, Z_DATA_ERROR if no marker has been found,
- or Z_STREAM_ERROR if the stream structure was inconsistent. In the success
- case, the application may save the current current value of total_in which
- indicates where valid compressed data was found. In the error case, the
- application may repeatedly call inflateSync, providing more input each time,
- until success or end of the input data.
-*/
-
-extern int inflateReset OF((z_stream *strm));
-/*
- This function is equivalent to inflateEnd followed by inflateInit,
- but does not free and reallocate all the internal decompression state.
- The stream will keep attributes that may have been set by inflateInit2.
-
- inflateReset returns Z_OK if success, or Z_STREAM_ERROR if the source
- stream state was inconsistent (such as zalloc or state being NULL).
-*/
-
-extern int inflateIncomp OF((z_stream *strm));
-/*
- This function adds the data at next_in (avail_in bytes) to the output
- history without performing any output. There must be no pending output,
- and the decompressor must be expecting to see the start of a block.
- Calling this function is equivalent to decompressing a stored block
- containing the data at next_in (except that the data is not output).
-*/
-
- /* checksum functions */
-
-/*
- This function is not related to compression but is exported
- anyway because it might be useful in applications using the
- compression library.
-*/
-
-extern uLong adler32 OF((uLong adler, Bytef *buf, uInt len));
-
-/*
- Update a running Adler-32 checksum with the bytes buf[0..len-1] and
- return the updated checksum. If buf is NULL, this function returns
- the required initial value for the checksum.
- An Adler-32 checksum is almost as reliable as a CRC32 but can be computed
- much faster. Usage example:
-
- uLong adler = adler32(0L, Z_NULL, 0);
-
- while (read_buffer(buffer, length) != EOF) {
- adler = adler32(adler, buffer, length);
- }
- if (adler != original_adler) error();
-*/
-
-#ifndef _Z_UTIL_H
- struct internal_state {int dummy;}; /* hack for buggy compilers */
-#endif
-
-#endif /* _ZLIB_H */
+++ /dev/null
-/*
- * This file is derived from various .h and .c files from the zlib-0.95
- * distribution by Jean-loup Gailly and Mark Adler, with some additions
- * by Paul Mackerras to aid in implementing Deflate compression and
- * decompression for PPP packets. See zlib.h for conditions of
- * distribution and use.
- *
- * Changes that have been made include:
- * - changed functions not used outside this file to "local"
- * - added minCompression parameter to deflateInit2
- * - added Z_PACKET_FLUSH (see zlib.h for details)
- * - added inflateIncomp
- *
- */
-
-/*+++++*/
-/* zutil.h -- internal interface and configuration of the compression library
- * Copyright (C) 1995 Jean-loup Gailly.
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* WARNING: this file should *not* be used by applications. It is
- part of the implementation of the compression library and is
- subject to change. Applications should only use zlib.h.
- */
-
-/* From: zutil.h,v 1.9 1995/05/03 17:27:12 jloup Exp */
-
-#define _Z_UTIL_H
-
-#include "zlib.h"
-
-#ifndef local
-# define local static
-#endif
-/* compile with -Dlocal if your debugger can't find static symbols */
-
-#define FAR
-
-typedef unsigned char uch;
-typedef uch FAR uchf;
-typedef unsigned short ush;
-typedef ush FAR ushf;
-typedef unsigned long ulg;
-
-extern char *z_errmsg[]; /* indexed by 1-zlib_error */
-
-#define ERR_RETURN(strm,err) return (strm->msg=z_errmsg[1-err], err)
-/* To be used only when the state is known to be valid */
-
-#ifndef NULL
-#define NULL ((void *) 0)
-#endif
-
- /* common constants */
-
-#define DEFLATED 8
-
-#ifndef DEF_WBITS
-# define DEF_WBITS MAX_WBITS
-#endif
-/* default windowBits for decompression. MAX_WBITS is for compression only */
-
-#if MAX_MEM_LEVEL >= 8
-# define DEF_MEM_LEVEL 8
-#else
-# define DEF_MEM_LEVEL MAX_MEM_LEVEL
-#endif
-/* default memLevel */
-
-#define STORED_BLOCK 0
-#define STATIC_TREES 1
-#define DYN_TREES 2
-/* The three kinds of block type */
-
-#define MIN_MATCH 3
-#define MAX_MATCH 258
-/* The minimum and maximum match lengths */
-
- /* functions */
-
-#include <linux/string.h>
-#define zmemcpy memcpy
-#define zmemzero(dest, len) memset(dest, 0, len)
-
-/* Diagnostic functions */
-#ifdef DEBUG_ZLIB
-# include <stdio.h>
-# ifndef verbose
-# define verbose 0
-# endif
-# define Assert(cond,msg) {if(!(cond)) z_error(msg);}
-# define Trace(x) fprintf x
-# define Tracev(x) {if (verbose) fprintf x ;}
-# define Tracevv(x) {if (verbose>1) fprintf x ;}
-# define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
-# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
-#else
-# define Assert(cond,msg)
-# define Trace(x)
-# define Tracev(x)
-# define Tracevv(x)
-# define Tracec(c,x)
-# define Tracecv(c,x)
-#endif
-
-
-typedef uLong (*check_func) OF((uLong check, Bytef *buf, uInt len));
-
-/* voidpf zcalloc OF((voidpf opaque, unsigned items, unsigned size)); */
-/* void zcfree OF((voidpf opaque, voidpf ptr)); */
-
-#define ZALLOC(strm, items, size) \
- (*((strm)->zalloc))((strm)->opaque, (items), (size))
-#define ZFREE(strm, addr, size) \
- (*((strm)->zfree))((strm)->opaque, (voidpf)(addr), (size))
-#define TRY_FREE(s, p, n) {if (p) ZFREE(s, p, n);}
-
-/* deflate.h -- internal compression state
- * Copyright (C) 1995 Jean-loup Gailly
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* WARNING: this file should *not* be used by applications. It is
- part of the implementation of the compression library and is
- subject to change. Applications should only use zlib.h.
- */
-
-/*+++++*/
-/* infblock.h -- header to use infblock.c
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* WARNING: this file should *not* be used by applications. It is
- part of the implementation of the compression library and is
- subject to change. Applications should only use zlib.h.
- */
-
-struct inflate_blocks_state;
-typedef struct inflate_blocks_state FAR inflate_blocks_statef;
-
-local inflate_blocks_statef * inflate_blocks_new OF((
- z_stream *z,
- check_func c, /* check function */
- uInt w)); /* window size */
-
-local int inflate_blocks OF((
- inflate_blocks_statef *,
- z_stream *,
- int)); /* initial return code */
-
-local void inflate_blocks_reset OF((
- inflate_blocks_statef *,
- z_stream *,
- uLongf *)); /* check value on output */
-
-local int inflate_blocks_free OF((
- inflate_blocks_statef *,
- z_stream *,
- uLongf *)); /* check value on output */
-
-local int inflate_addhistory OF((
- inflate_blocks_statef *,
- z_stream *));
-
-local int inflate_packet_flush OF((
- inflate_blocks_statef *));
-
-/*+++++*/
-/* inftrees.h -- header to use inftrees.c
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* WARNING: this file should *not* be used by applications. It is
- part of the implementation of the compression library and is
- subject to change. Applications should only use zlib.h.
- */
-
-/* Huffman code lookup table entry--this entry is four bytes for machines
- that have 16-bit pointers (e.g. PC's in the small or medium model). */
-
-typedef struct inflate_huft_s FAR inflate_huft;
-
-struct inflate_huft_s {
- union {
- struct {
- Byte Exop; /* number of extra bits or operation */
- Byte Bits; /* number of bits in this code or subcode */
- } what;
- uInt Nalloc; /* number of these allocated here */
- Bytef *pad; /* pad structure to a power of 2 (4 bytes for */
- } word; /* 16-bit, 8 bytes for 32-bit machines) */
- union {
- uInt Base; /* literal, length base, or distance base */
- inflate_huft *Next; /* pointer to next level of table */
- } more;
-};
-
-#ifdef DEBUG_ZLIB
- local uInt inflate_hufts;
-#endif
-
-local int inflate_trees_bits OF((
- uIntf *, /* 19 code lengths */
- uIntf *, /* bits tree desired/actual depth */
- inflate_huft * FAR *, /* bits tree result */
- z_stream *)); /* for zalloc, zfree functions */
-
-local int inflate_trees_dynamic OF((
- uInt, /* number of literal/length codes */
- uInt, /* number of distance codes */
- uIntf *, /* that many (total) code lengths */
- uIntf *, /* literal desired/actual bit depth */
- uIntf *, /* distance desired/actual bit depth */
- inflate_huft * FAR *, /* literal/length tree result */
- inflate_huft * FAR *, /* distance tree result */
- z_stream *)); /* for zalloc, zfree functions */
-
-local int inflate_trees_fixed OF((
- uIntf *, /* literal desired/actual bit depth */
- uIntf *, /* distance desired/actual bit depth */
- inflate_huft * FAR *, /* literal/length tree result */
- inflate_huft * FAR *)); /* distance tree result */
-
-local int inflate_trees_free OF((
- inflate_huft *, /* tables to free */
- z_stream *)); /* for zfree function */
-
-
-/*+++++*/
-/* infcodes.h -- header to use infcodes.c
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* WARNING: this file should *not* be used by applications. It is
- part of the implementation of the compression library and is
- subject to change. Applications should only use zlib.h.
- */
-
-struct inflate_codes_state;
-typedef struct inflate_codes_state FAR inflate_codes_statef;
-
-local inflate_codes_statef *inflate_codes_new OF((
- uInt, uInt,
- inflate_huft *, inflate_huft *,
- z_stream *));
-
-local int inflate_codes OF((
- inflate_blocks_statef *,
- z_stream *,
- int));
-
-local void inflate_codes_free OF((
- inflate_codes_statef *,
- z_stream *));
-
-
-/*+++++*/
-/* inflate.c -- zlib interface to inflate modules
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* inflate private state */
-struct internal_state {
-
- /* mode */
- enum {
- METHOD, /* waiting for method byte */
- FLAG, /* waiting for flag byte */
- BLOCKS, /* decompressing blocks */
- CHECK4, /* four check bytes to go */
- CHECK3, /* three check bytes to go */
- CHECK2, /* two check bytes to go */
- CHECK1, /* one check byte to go */
- DONE, /* finished check, done */
- BAD} /* got an error--stay here */
- mode; /* current inflate mode */
-
- /* mode dependent information */
- union {
- uInt method; /* if FLAGS, method byte */
- struct {
- uLong was; /* computed check value */
- uLong need; /* stream check value */
- } check; /* if CHECK, check values to compare */
- uInt marker; /* if BAD, inflateSync's marker bytes count */
- } sub; /* submode */
-
- /* mode independent information */
- int nowrap; /* flag for no wrapper */
- uInt wbits; /* log2(window size) (8..15, defaults to 15) */
- inflate_blocks_statef
- *blocks; /* current inflate_blocks state */
-
-};
-
-
-int inflateReset(
- z_stream *z
-)
-{
- uLong c;
-
- if (z == Z_NULL || z->state == Z_NULL)
- return Z_STREAM_ERROR;
- z->total_in = z->total_out = 0;
- z->msg = Z_NULL;
- z->state->mode = z->state->nowrap ? BLOCKS : METHOD;
- inflate_blocks_reset(z->state->blocks, z, &c);
- Trace((stderr, "inflate: reset\n"));
- return Z_OK;
-}
-
-
-int inflateEnd(
- z_stream *z
-)
-{
- uLong c;
-
- if (z == Z_NULL || z->state == Z_NULL || z->zfree == Z_NULL)
- return Z_STREAM_ERROR;
- if (z->state->blocks != Z_NULL)
- inflate_blocks_free(z->state->blocks, z, &c);
- ZFREE(z, z->state, sizeof(struct internal_state));
- z->state = Z_NULL;
- Trace((stderr, "inflate: end\n"));
- return Z_OK;
-}
-
-
-int inflateInit2(
- z_stream *z,
- int w
-)
-{
- /* initialize state */
- if (z == Z_NULL)
- return Z_STREAM_ERROR;
-/* if (z->zalloc == Z_NULL) z->zalloc = zcalloc; */
-/* if (z->zfree == Z_NULL) z->zfree = zcfree; */
- if ((z->state = (struct internal_state FAR *)
- ZALLOC(z,1,sizeof(struct internal_state))) == Z_NULL)
- return Z_MEM_ERROR;
- z->state->blocks = Z_NULL;
-
- /* handle undocumented nowrap option (no zlib header or check) */
- z->state->nowrap = 0;
- if (w < 0)
- {
- w = - w;
- z->state->nowrap = 1;
- }
-
- /* set window size */
- if (w < 8 || w > 15)
- {
- inflateEnd(z);
- return Z_STREAM_ERROR;
- }
- z->state->wbits = (uInt)w;
-
- /* create inflate_blocks state */
- if ((z->state->blocks =
- inflate_blocks_new(z, z->state->nowrap ? Z_NULL : adler32, 1 << w))
- == Z_NULL)
- {
- inflateEnd(z);
- return Z_MEM_ERROR;
- }
- Trace((stderr, "inflate: allocated\n"));
-
- /* reset state */
- inflateReset(z);
- return Z_OK;
-}
-
-
-int inflateInit(
- z_stream *z
-)
-{
- return inflateInit2(z, DEF_WBITS);
-}
-
-
-#define NEEDBYTE {if(z->avail_in==0)goto empty;r=Z_OK;}
-#define NEXTBYTE (z->avail_in--,z->total_in++,*z->next_in++)
-
-int inflate(
- z_stream *z,
- int f
-)
-{
- int r;
- uInt b;
-
- if (z == Z_NULL || z->next_in == Z_NULL)
- return Z_STREAM_ERROR;
- r = Z_BUF_ERROR;
- while (1) switch (z->state->mode)
- {
- case METHOD:
- NEEDBYTE
- if (((z->state->sub.method = NEXTBYTE) & 0xf) != DEFLATED)
- {
- z->state->mode = BAD;
- z->msg = "unknown compression method";
- z->state->sub.marker = 5; /* can't try inflateSync */
- break;
- }
- if ((z->state->sub.method >> 4) + 8 > z->state->wbits)
- {
- z->state->mode = BAD;
- z->msg = "invalid window size";
- z->state->sub.marker = 5; /* can't try inflateSync */
- break;
- }
- z->state->mode = FLAG;
- case FLAG:
- NEEDBYTE
- if ((b = NEXTBYTE) & 0x20)
- {
- z->state->mode = BAD;
- z->msg = "invalid reserved bit";
- z->state->sub.marker = 5; /* can't try inflateSync */
- break;
- }
- if (((z->state->sub.method << 8) + b) % 31)
- {
- z->state->mode = BAD;
- z->msg = "incorrect header check";
- z->state->sub.marker = 5; /* can't try inflateSync */
- break;
- }
- Trace((stderr, "inflate: zlib header ok\n"));
- z->state->mode = BLOCKS;
- case BLOCKS:
- r = inflate_blocks(z->state->blocks, z, r);
- if (f == Z_PACKET_FLUSH && z->avail_in == 0 && z->avail_out != 0)
- r = inflate_packet_flush(z->state->blocks);
- if (r == Z_DATA_ERROR)
- {
- z->state->mode = BAD;
- z->state->sub.marker = 0; /* can try inflateSync */
- break;
- }
- if (r != Z_STREAM_END)
- return r;
- r = Z_OK;
- inflate_blocks_reset(z->state->blocks, z, &z->state->sub.check.was);
- if (z->state->nowrap)
- {
- z->state->mode = DONE;
- break;
- }
- z->state->mode = CHECK4;
- case CHECK4:
- NEEDBYTE
- z->state->sub.check.need = (uLong)NEXTBYTE << 24;
- z->state->mode = CHECK3;
- case CHECK3:
- NEEDBYTE
- z->state->sub.check.need += (uLong)NEXTBYTE << 16;
- z->state->mode = CHECK2;
- case CHECK2:
- NEEDBYTE
- z->state->sub.check.need += (uLong)NEXTBYTE << 8;
- z->state->mode = CHECK1;
- case CHECK1:
- NEEDBYTE
- z->state->sub.check.need += (uLong)NEXTBYTE;
-
- if (z->state->sub.check.was != z->state->sub.check.need)
- {
- z->state->mode = BAD;
- z->msg = "incorrect data check";
- z->state->sub.marker = 5; /* can't try inflateSync */
- break;
- }
- Trace((stderr, "inflate: zlib check ok\n"));
- z->state->mode = DONE;
- case DONE:
- return Z_STREAM_END;
- case BAD:
- return Z_DATA_ERROR;
- default:
- return Z_STREAM_ERROR;
- }
-
- empty:
- if (f != Z_PACKET_FLUSH)
- return r;
- z->state->mode = BAD;
- z->state->sub.marker = 0; /* can try inflateSync */
- return Z_DATA_ERROR;
-}
-
-/*
- * This subroutine adds the data at next_in/avail_in to the output history
- * without performing any output. The output buffer must be "caught up";
- * i.e. no pending output (hence s->read equals s->write), and the state must
- * be BLOCKS (i.e. we should be willing to see the start of a series of
- * BLOCKS). On exit, the output will also be caught up, and the checksum
- * will have been updated if need be.
- */
-
-int inflateIncomp(
- z_stream *z
-)
-{
- if (z->state->mode != BLOCKS)
- return Z_DATA_ERROR;
- return inflate_addhistory(z->state->blocks, z);
-}
-
-
-int inflateSync(
- z_stream *z
-)
-{
- uInt n; /* number of bytes to look at */
- Bytef *p; /* pointer to bytes */
- uInt m; /* number of marker bytes found in a row */
- uLong r, w; /* temporaries to save total_in and total_out */
-
- /* set up */
- if (z == Z_NULL || z->state == Z_NULL)
- return Z_STREAM_ERROR;
- if (z->state->mode != BAD)
- {
- z->state->mode = BAD;
- z->state->sub.marker = 0;
- }
- if ((n = z->avail_in) == 0)
- return Z_BUF_ERROR;
- p = z->next_in;
- m = z->state->sub.marker;
-
- /* search */
- while (n && m < 4)
- {
- if (*p == (Byte)(m < 2 ? 0 : 0xff))
- m++;
- else if (*p)
- m = 0;
- else
- m = 4 - m;
- p++, n--;
- }
-
- /* restore */
- z->total_in += p - z->next_in;
- z->next_in = p;
- z->avail_in = n;
- z->state->sub.marker = m;
-
- /* return no joy or set up to restart on a new block */
- if (m != 4)
- return Z_DATA_ERROR;
- r = z->total_in; w = z->total_out;
- inflateReset(z);
- z->total_in = r; z->total_out = w;
- z->state->mode = BLOCKS;
- return Z_OK;
-}
-
-#undef NEEDBYTE
-#undef NEXTBYTE
-
-/*+++++*/
-/* infutil.h -- types and macros common to blocks and codes
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* WARNING: this file should *not* be used by applications. It is
- part of the implementation of the compression library and is
- subject to change. Applications should only use zlib.h.
- */
-
-/* inflate blocks semi-private state */
-struct inflate_blocks_state {
-
- /* mode */
- enum {
- TYPE, /* get type bits (3, including end bit) */
- LENS, /* get lengths for stored */
- STORED, /* processing stored block */
- TABLE, /* get table lengths */
- BTREE, /* get bit lengths tree for a dynamic block */
- DTREE, /* get length, distance trees for a dynamic block */
- CODES, /* processing fixed or dynamic block */
- DRY, /* output remaining window bytes */
- DONEB, /* finished last block, done */
- BADB} /* got a data error--stuck here */
- mode; /* current inflate_block mode */
-
- /* mode dependent information */
- union {
- uInt left; /* if STORED, bytes left to copy */
- struct {
- uInt table; /* table lengths (14 bits) */
- uInt index; /* index into blens (or border) */
- uIntf *blens; /* bit lengths of codes */
- uInt bb; /* bit length tree depth */
- inflate_huft *tb; /* bit length decoding tree */
- int nblens; /* # elements allocated at blens */
- } trees; /* if DTREE, decoding info for trees */
- struct {
- inflate_huft *tl, *td; /* trees to free */
- inflate_codes_statef
- *codes;
- } decode; /* if CODES, current state */
- } sub; /* submode */
- uInt last; /* true if this block is the last block */
-
- /* mode independent information */
- uInt bitk; /* bits in bit buffer */
- uLong bitb; /* bit buffer */
- Bytef *window; /* sliding window */
- Bytef *end; /* one byte after sliding window */
- Bytef *read; /* window read pointer */
- Bytef *write; /* window write pointer */
- check_func checkfn; /* check function */
- uLong check; /* check on output */
-
-};
-
-
-/* defines for inflate input/output */
-/* update pointers and return */
-#define UPDBITS {s->bitb=b;s->bitk=k;}
-#define UPDIN {z->avail_in=n;z->total_in+=p-z->next_in;z->next_in=p;}
-#define UPDOUT {s->write=q;}
-#define UPDATE {UPDBITS UPDIN UPDOUT}
-#define LEAVE {UPDATE return inflate_flush(s,z,r);}
-/* get bytes and bits */
-#define LOADIN {p=z->next_in;n=z->avail_in;b=s->bitb;k=s->bitk;}
-#define NEEDBYTE {if(n)r=Z_OK;else LEAVE}
-#define NEXTBYTE (n--,*p++)
-#define NEEDBITS(j) {while(k<(j)){NEEDBYTE;b|=((uLong)NEXTBYTE)<<k;k+=8;}}
-#define DUMPBITS(j) {b>>=(j);k-=(j);}
-/* output bytes */
-#define WAVAIL (q<s->read?s->read-q-1:s->end-q)
-#define LOADOUT {q=s->write;m=WAVAIL;}
-#define WRAP {if(q==s->end&&s->read!=s->window){q=s->window;m=WAVAIL;}}
-#define FLUSH {UPDOUT r=inflate_flush(s,z,r); LOADOUT}
-#define NEEDOUT {if(m==0){WRAP if(m==0){FLUSH WRAP if(m==0) LEAVE}}r=Z_OK;}
-#define OUTBYTE(a) {*q++=(Byte)(a);m--;}
-/* load local pointers */
-#define LOAD {LOADIN LOADOUT}
-
-/* And'ing with mask[n] masks the lower n bits */
-local uInt inflate_mask[] = {
- 0x0000,
- 0x0001, 0x0003, 0x0007, 0x000f, 0x001f, 0x003f, 0x007f, 0x00ff,
- 0x01ff, 0x03ff, 0x07ff, 0x0fff, 0x1fff, 0x3fff, 0x7fff, 0xffff
-};
-
-/* copy as much as possible from the sliding window to the output area */
-local int inflate_flush OF((
- inflate_blocks_statef *,
- z_stream *,
- int));
-
-/*+++++*/
-/* inffast.h -- header to use inffast.c
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* WARNING: this file should *not* be used by applications. It is
- part of the implementation of the compression library and is
- subject to change. Applications should only use zlib.h.
- */
-
-local int inflate_fast OF((
- uInt,
- uInt,
- inflate_huft *,
- inflate_huft *,
- inflate_blocks_statef *,
- z_stream *));
-
-
-/*+++++*/
-/* infblock.c -- interpret and process block types to last block
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* Table for deflate from PKZIP's appnote.txt. */
-local uInt border[] = { /* Order of the bit length code lengths */
- 16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15};
-
-/*
- Notes beyond the 1.93a appnote.txt:
-
- 1. Distance pointers never point before the beginning of the output
- stream.
- 2. Distance pointers can point back across blocks, up to 32k away.
- 3. There is an implied maximum of 7 bits for the bit length table and
- 15 bits for the actual data.
- 4. If only one code exists, then it is encoded using one bit. (Zero
- would be more efficient, but perhaps a little confusing.) If two
- codes exist, they are coded using one bit each (0 and 1).
- 5. There is no way of sending zero distance codes--a dummy must be
- sent if there are none. (History: a pre 2.0 version of PKZIP would
- store blocks with no distance codes, but this was discovered to be
- too harsh a criterion.) Valid only for 1.93a. 2.04c does allow
- zero distance codes, which is sent as one code of zero bits in
- length.
- 6. There are up to 286 literal/length codes. Code 256 represents the
- end-of-block. Note however that the static length tree defines
- 288 codes just to fill out the Huffman codes. Codes 286 and 287
- cannot be used though, since there is no length base or extra bits
- defined for them. Similarily, there are up to 30 distance codes.
- However, static trees define 32 codes (all 5 bits) to fill out the
- Huffman codes, but the last two had better not show up in the data.
- 7. Unzip can check dynamic Huffman blocks for complete code sets.
- The exception is that a single code would not be complete (see #4).
- 8. The five bits following the block type is really the number of
- literal codes sent minus 257.
- 9. Length codes 8,16,16 are interpreted as 13 length codes of 8 bits
- (1+6+6). Therefore, to output three times the length, you output
- three codes (1+1+1), whereas to output four times the same length,
- you only need two codes (1+3). Hmm.
- 10. In the tree reconstruction algorithm, Code = Code + Increment
- only if BitLength(i) is not zero. (Pretty obvious.)
- 11. Correction: 4 Bits: # of Bit Length codes - 4 (4 - 19)
- 12. Note: length code 284 can represent 227-258, but length code 285
- really is 258. The last length deserves its own, short code
- since it gets used a lot in very redundant files. The length
- 258 is special since 258 - 3 (the min match length) is 255.
- 13. The literal/length and distance code bit lengths are read as a
- single stream of lengths. It is possible (and advantageous) for
- a repeat code (16, 17, or 18) to go across the boundary between
- the two sets of lengths.
- */
-
-
-local void inflate_blocks_reset(
- inflate_blocks_statef *s,
- z_stream *z,
- uLongf *c
-)
-{
- if (s->checkfn != Z_NULL)
- *c = s->check;
- if (s->mode == BTREE || s->mode == DTREE)
- ZFREE(z, s->sub.trees.blens, s->sub.trees.nblens * sizeof(uInt));
- if (s->mode == CODES)
- {
- inflate_codes_free(s->sub.decode.codes, z);
- inflate_trees_free(s->sub.decode.td, z);
- inflate_trees_free(s->sub.decode.tl, z);
- }
- s->mode = TYPE;
- s->bitk = 0;
- s->bitb = 0;
- s->read = s->write = s->window;
- if (s->checkfn != Z_NULL)
- s->check = (*s->checkfn)(0L, Z_NULL, 0);
- Trace((stderr, "inflate: blocks reset\n"));
-}
-
-
-local inflate_blocks_statef *inflate_blocks_new(
- z_stream *z,
- check_func c,
- uInt w
-)
-{
- inflate_blocks_statef *s;
-
- if ((s = (inflate_blocks_statef *)ZALLOC
- (z,1,sizeof(struct inflate_blocks_state))) == Z_NULL)
- return s;
- if ((s->window = (Bytef *)ZALLOC(z, 1, w)) == Z_NULL)
- {
- ZFREE(z, s, sizeof(struct inflate_blocks_state));
- return Z_NULL;
- }
- s->end = s->window + w;
- s->checkfn = c;
- s->mode = TYPE;
- Trace((stderr, "inflate: blocks allocated\n"));
- inflate_blocks_reset(s, z, &s->check);
- return s;
-}
-
-
-local int inflate_blocks(
- inflate_blocks_statef *s,
- z_stream *z,
- int r
-)
-{
- uInt t; /* temporary storage */
- uLong b; /* bit buffer */
- uInt k; /* bits in bit buffer */
- Bytef *p; /* input data pointer */
- uInt n; /* bytes available there */
- Bytef *q; /* output window write pointer */
- uInt m; /* bytes to end of window or read pointer */
-
- /* copy input/output information to locals (UPDATE macro restores) */
- LOAD
-
- /* process input based on current state */
- while (1) switch (s->mode)
- {
- case TYPE:
- NEEDBITS(3)
- t = (uInt)b & 7;
- s->last = t & 1;
- switch (t >> 1)
- {
- case 0: /* stored */
- Trace((stderr, "inflate: stored block%s\n",
- s->last ? " (last)" : ""));
- DUMPBITS(3)
- t = k & 7; /* go to byte boundary */
- DUMPBITS(t)
- s->mode = LENS; /* get length of stored block */
- break;
- case 1: /* fixed */
- Trace((stderr, "inflate: fixed codes block%s\n",
- s->last ? " (last)" : ""));
- {
- uInt bl, bd;
- inflate_huft *tl, *td;
-
- inflate_trees_fixed(&bl, &bd, &tl, &td);
- s->sub.decode.codes = inflate_codes_new(bl, bd, tl, td, z);
- if (s->sub.decode.codes == Z_NULL)
- {
- r = Z_MEM_ERROR;
- LEAVE
- }
- s->sub.decode.tl = Z_NULL; /* don't try to free these */
- s->sub.decode.td = Z_NULL;
- }
- DUMPBITS(3)
- s->mode = CODES;
- break;
- case 2: /* dynamic */
- Trace((stderr, "inflate: dynamic codes block%s\n",
- s->last ? " (last)" : ""));
- DUMPBITS(3)
- s->mode = TABLE;
- break;
- case 3: /* illegal */
- DUMPBITS(3)
- s->mode = BADB;
- z->msg = "invalid block type";
- r = Z_DATA_ERROR;
- LEAVE
- }
- break;
- case LENS:
- NEEDBITS(32)
- if (((~b) >> 16) != (b & 0xffff))
- {
- s->mode = BADB;
- z->msg = "invalid stored block lengths";
- r = Z_DATA_ERROR;
- LEAVE
- }
- s->sub.left = (uInt)b & 0xffff;
- b = k = 0; /* dump bits */
- Tracev((stderr, "inflate: stored length %u\n", s->sub.left));
- s->mode = s->sub.left ? STORED : TYPE;
- break;
- case STORED:
- if (n == 0)
- LEAVE
- NEEDOUT
- t = s->sub.left;
- if (t > n) t = n;
- if (t > m) t = m;
- zmemcpy(q, p, t);
- p += t; n -= t;
- q += t; m -= t;
- if ((s->sub.left -= t) != 0)
- break;
- Tracev((stderr, "inflate: stored end, %lu total out\n",
- z->total_out + (q >= s->read ? q - s->read :
- (s->end - s->read) + (q - s->window))));
- s->mode = s->last ? DRY : TYPE;
- break;
- case TABLE:
- NEEDBITS(14)
- s->sub.trees.table = t = (uInt)b & 0x3fff;
-#ifndef PKZIP_BUG_WORKAROUND
- if ((t & 0x1f) > 29 || ((t >> 5) & 0x1f) > 29)
- {
- s->mode = BADB;
- z->msg = "too many length or distance symbols";
- r = Z_DATA_ERROR;
- LEAVE
- }
-#endif
- t = 258 + (t & 0x1f) + ((t >> 5) & 0x1f);
- if (t < 19)
- t = 19;
- if ((s->sub.trees.blens = (uIntf*)ZALLOC(z, t, sizeof(uInt))) == Z_NULL)
- {
- r = Z_MEM_ERROR;
- LEAVE
- }
- s->sub.trees.nblens = t;
- DUMPBITS(14)
- s->sub.trees.index = 0;
- Tracev((stderr, "inflate: table sizes ok\n"));
- s->mode = BTREE;
- case BTREE:
- while (s->sub.trees.index < 4 + (s->sub.trees.table >> 10))
- {
- NEEDBITS(3)
- s->sub.trees.blens[border[s->sub.trees.index++]] = (uInt)b & 7;
- DUMPBITS(3)
- }
- while (s->sub.trees.index < 19)
- s->sub.trees.blens[border[s->sub.trees.index++]] = 0;
- s->sub.trees.bb = 7;
- t = inflate_trees_bits(s->sub.trees.blens, &s->sub.trees.bb,
- &s->sub.trees.tb, z);
- if (t != Z_OK)
- {
- r = t;
- if (r == Z_DATA_ERROR)
- s->mode = BADB;
- LEAVE
- }
- s->sub.trees.index = 0;
- Tracev((stderr, "inflate: bits tree ok\n"));
- s->mode = DTREE;
- case DTREE:
- while (t = s->sub.trees.table,
- s->sub.trees.index < 258 + (t & 0x1f) + ((t >> 5) & 0x1f))
- {
- inflate_huft *h;
- uInt i, j, c;
-
- t = s->sub.trees.bb;
- NEEDBITS(t)
- h = s->sub.trees.tb + ((uInt)b & inflate_mask[t]);
- t = h->word.what.Bits;
- c = h->more.Base;
- if (c < 16)
- {
- DUMPBITS(t)
- s->sub.trees.blens[s->sub.trees.index++] = c;
- }
- else /* c == 16..18 */
- {
- i = c == 18 ? 7 : c - 14;
- j = c == 18 ? 11 : 3;
- NEEDBITS(t + i)
- DUMPBITS(t)
- j += (uInt)b & inflate_mask[i];
- DUMPBITS(i)
- i = s->sub.trees.index;
- t = s->sub.trees.table;
- if (i + j > 258 + (t & 0x1f) + ((t >> 5) & 0x1f) ||
- (c == 16 && i < 1))
- {
- s->mode = BADB;
- z->msg = "invalid bit length repeat";
- r = Z_DATA_ERROR;
- LEAVE
- }
- c = c == 16 ? s->sub.trees.blens[i - 1] : 0;
- do {
- s->sub.trees.blens[i++] = c;
- } while (--j);
- s->sub.trees.index = i;
- }
- }
- inflate_trees_free(s->sub.trees.tb, z);
- s->sub.trees.tb = Z_NULL;
- {
- uInt bl, bd;
- inflate_huft *tl, *td;
- inflate_codes_statef *c;
-
- bl = 9; /* must be <= 9 for lookahead assumptions */
- bd = 6; /* must be <= 9 for lookahead assumptions */
- t = s->sub.trees.table;
- t = inflate_trees_dynamic(257 + (t & 0x1f), 1 + ((t >> 5) & 0x1f),
- s->sub.trees.blens, &bl, &bd, &tl, &td, z);
- if (t != Z_OK)
- {
- if (t == (uInt)Z_DATA_ERROR)
- s->mode = BADB;
- r = t;
- LEAVE
- }
- Tracev((stderr, "inflate: trees ok\n"));
- if ((c = inflate_codes_new(bl, bd, tl, td, z)) == Z_NULL)
- {
- inflate_trees_free(td, z);
- inflate_trees_free(tl, z);
- r = Z_MEM_ERROR;
- LEAVE
- }
- ZFREE(z, s->sub.trees.blens, s->sub.trees.nblens * sizeof(uInt));
- s->sub.decode.codes = c;
- s->sub.decode.tl = tl;
- s->sub.decode.td = td;
- }
- s->mode = CODES;
- case CODES:
- UPDATE
- if ((r = inflate_codes(s, z, r)) != Z_STREAM_END)
- return inflate_flush(s, z, r);
- r = Z_OK;
- inflate_codes_free(s->sub.decode.codes, z);
- inflate_trees_free(s->sub.decode.td, z);
- inflate_trees_free(s->sub.decode.tl, z);
- LOAD
- Tracev((stderr, "inflate: codes end, %lu total out\n",
- z->total_out + (q >= s->read ? q - s->read :
- (s->end - s->read) + (q - s->window))));
- if (!s->last)
- {
- s->mode = TYPE;
- break;
- }
- if (k > 7) /* return unused byte, if any */
- {
- Assert(k < 16, "inflate_codes grabbed too many bytes")
- k -= 8;
- n++;
- p--; /* can always return one */
- }
- s->mode = DRY;
- case DRY:
- FLUSH
- if (s->read != s->write)
- LEAVE
- s->mode = DONEB;
- case DONEB:
- r = Z_STREAM_END;
- LEAVE
- case BADB:
- r = Z_DATA_ERROR;
- LEAVE
- default:
- r = Z_STREAM_ERROR;
- LEAVE
- }
-}
-
-
-local int inflate_blocks_free(
- inflate_blocks_statef *s,
- z_stream *z,
- uLongf *c
-)
-{
- inflate_blocks_reset(s, z, c);
- ZFREE(z, s->window, s->end - s->window);
- ZFREE(z, s, sizeof(struct inflate_blocks_state));
- Trace((stderr, "inflate: blocks freed\n"));
- return Z_OK;
-}
-
-/*
- * This subroutine adds the data at next_in/avail_in to the output history
- * without performing any output. The output buffer must be "caught up";
- * i.e. no pending output (hence s->read equals s->write), and the state must
- * be BLOCKS (i.e. we should be willing to see the start of a series of
- * BLOCKS). On exit, the output will also be caught up, and the checksum
- * will have been updated if need be.
- */
-local int inflate_addhistory(
- inflate_blocks_statef *s,
- z_stream *z
-)
-{
- uLong b; /* bit buffer */ /* NOT USED HERE */
- uInt k; /* bits in bit buffer */ /* NOT USED HERE */
- uInt t; /* temporary storage */
- Bytef *p; /* input data pointer */
- uInt n; /* bytes available there */
- Bytef *q; /* output window write pointer */
- uInt m; /* bytes to end of window or read pointer */
-
- if (s->read != s->write)
- return Z_STREAM_ERROR;
- if (s->mode != TYPE)
- return Z_DATA_ERROR;
-
- /* we're ready to rock */
- LOAD
- /* while there is input ready, copy to output buffer, moving
- * pointers as needed.
- */
- while (n) {
- t = n; /* how many to do */
- /* is there room until end of buffer? */
- if (t > m) t = m;
- /* update check information */
- if (s->checkfn != Z_NULL)
- s->check = (*s->checkfn)(s->check, q, t);
- zmemcpy(q, p, t);
- q += t;
- p += t;
- n -= t;
- z->total_out += t;
- s->read = q; /* drag read pointer forward */
-/* WRAP */ /* expand WRAP macro by hand to handle s->read */
- if (q == s->end) {
- s->read = q = s->window;
- m = WAVAIL;
- }
- }
- UPDATE
- return Z_OK;
-}
-
-
-/*
- * At the end of a Deflate-compressed PPP packet, we expect to have seen
- * a `stored' block type value but not the (zero) length bytes.
- */
-local int inflate_packet_flush(
- inflate_blocks_statef *s
-)
-{
- if (s->mode != LENS)
- return Z_DATA_ERROR;
- s->mode = TYPE;
- return Z_OK;
-}
-
-
-/*+++++*/
-/* inftrees.c -- generate Huffman trees for efficient decoding
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* simplify the use of the inflate_huft type with some defines */
-#define base more.Base
-#define next more.Next
-#define exop word.what.Exop
-#define bits word.what.Bits
-
-
-local int huft_build OF((
- uIntf *, /* code lengths in bits */
- uInt, /* number of codes */
- uInt, /* number of "simple" codes */
- uIntf *, /* list of base values for non-simple codes */
- uIntf *, /* list of extra bits for non-simple codes */
- inflate_huft * FAR*,/* result: starting table */
- uIntf *, /* maximum lookup bits (returns actual) */
- z_stream *)); /* for zalloc function */
-
-local voidpf falloc OF((
- voidpf, /* opaque pointer (not used) */
- uInt, /* number of items */
- uInt)); /* size of item */
-
-local void ffree OF((
- voidpf q, /* opaque pointer (not used) */
- voidpf p, /* what to free (not used) */
- uInt n)); /* number of bytes (not used) */
-
-/* Tables for deflate from PKZIP's appnote.txt. */
-local uInt cplens[] = { /* Copy lengths for literal codes 257..285 */
- 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31,
- 35, 43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258, 0, 0};
- /* actually lengths - 2; also see note #13 above about 258 */
-local uInt cplext[] = { /* Extra bits for literal codes 257..285 */
- 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2,
- 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5, 0, 192, 192}; /* 192==invalid */
-local uInt cpdist[] = { /* Copy offsets for distance codes 0..29 */
- 1, 2, 3, 4, 5, 7, 9, 13, 17, 25, 33, 49, 65, 97, 129, 193,
- 257, 385, 513, 769, 1025, 1537, 2049, 3073, 4097, 6145,
- 8193, 12289, 16385, 24577};
-local uInt cpdext[] = { /* Extra bits for distance codes */
- 0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6,
- 7, 7, 8, 8, 9, 9, 10, 10, 11, 11,
- 12, 12, 13, 13};
-
-/*
- Huffman code decoding is performed using a multi-level table lookup.
- The fastest way to decode is to simply build a lookup table whose
- size is determined by the longest code. However, the time it takes
- to build this table can also be a factor if the data being decoded
- is not very long. The most common codes are necessarily the
- shortest codes, so those codes dominate the decoding time, and hence
- the speed. The idea is you can have a shorter table that decodes the
- shorter, more probable codes, and then point to subsidiary tables for
- the longer codes. The time it costs to decode the longer codes is
- then traded against the time it takes to make longer tables.
-
- This results of this trade are in the variables lbits and dbits
- below. lbits is the number of bits the first level table for literal/
- length codes can decode in one step, and dbits is the same thing for
- the distance codes. Subsequent tables are also less than or equal to
- those sizes. These values may be adjusted either when all of the
- codes are shorter than that, in which case the longest code length in
- bits is used, or when the shortest code is *longer* than the requested
- table size, in which case the length of the shortest code in bits is
- used.
-
- There are two different values for the two tables, since they code a
- different number of possibilities each. The literal/length table
- codes 286 possible values, or in a flat code, a little over eight
- bits. The distance table codes 30 possible values, or a little less
- than five bits, flat. The optimum values for speed end up being
- about one bit more than those, so lbits is 8+1 and dbits is 5+1.
- The optimum values may differ though from machine to machine, and
- possibly even between compilers. Your mileage may vary.
- */
-
-
-/* If BMAX needs to be larger than 16, then h and x[] should be uLong. */
-#define BMAX 15 /* maximum bit length of any code */
-#define N_MAX 288 /* maximum number of codes in any set */
-
-#ifdef DEBUG_ZLIB
- uInt inflate_hufts;
-#endif
-
-local int huft_build(
- uIntf *b, /* code lengths in bits (all assumed <= BMAX) */
- uInt n, /* number of codes (assumed <= N_MAX) */
- uInt s, /* number of simple-valued codes (0..s-1) */
- uIntf *d, /* list of base values for non-simple codes */
- uIntf *e, /* list of extra bits for non-simple codes */
- inflate_huft * FAR *t, /* result: starting table */
- uIntf *m, /* maximum lookup bits, returns actual */
- z_stream *zs /* for zalloc function */
-)
-/* Given a list of code lengths and a maximum table size, make a set of
- tables to decode that set of codes. Return Z_OK on success, Z_BUF_ERROR
- if the given code set is incomplete (the tables are still built in this
- case), Z_DATA_ERROR if the input is invalid (all zero length codes or an
- over-subscribed set of lengths), or Z_MEM_ERROR if not enough memory. */
-{
-
- uInt a; /* counter for codes of length k */
- uInt c[BMAX+1]; /* bit length count table */
- uInt f; /* i repeats in table every f entries */
- int g; /* maximum code length */
- int h; /* table level */
- register uInt i; /* counter, current code */
- register uInt j; /* counter */
- register int k; /* number of bits in current code */
- int l; /* bits per table (returned in m) */
- register uIntf *p; /* pointer into c[], b[], or v[] */
- inflate_huft *q; /* points to current table */
- struct inflate_huft_s r; /* table entry for structure assignment */
- inflate_huft *u[BMAX]; /* table stack */
- uInt v[N_MAX]; /* values in order of bit length */
- register int w; /* bits before this table == (l * h) */
- uInt x[BMAX+1]; /* bit offsets, then code stack */
- uIntf *xp; /* pointer into x */
- int y; /* number of dummy codes added */
- uInt z; /* number of entries in current table */
-
-
- /* Generate counts for each bit length */
- p = c;
-#define C0 *p++ = 0;
-#define C2 C0 C0 C0 C0
-#define C4 C2 C2 C2 C2
- C4 /* clear c[]--assume BMAX+1 is 16 */
- p = b; i = n;
- do {
- c[*p++]++; /* assume all entries <= BMAX */
- } while (--i);
- if (c[0] == n) /* null input--all zero length codes */
- {
- *t = (inflate_huft *)Z_NULL;
- *m = 0;
- return Z_OK;
- }
-
-
- /* Find minimum and maximum length, bound *m by those */
- l = *m;
- for (j = 1; j <= BMAX; j++)
- if (c[j])
- break;
- k = j; /* minimum code length */
- if ((uInt)l < j)
- l = j;
- for (i = BMAX; i; i--)
- if (c[i])
- break;
- g = i; /* maximum code length */
- if ((uInt)l > i)
- l = i;
- *m = l;
-
-
- /* Adjust last length count to fill out codes, if needed */
- for (y = 1 << j; j < i; j++, y <<= 1)
- if ((y -= c[j]) < 0)
- return Z_DATA_ERROR;
- if ((y -= c[i]) < 0)
- return Z_DATA_ERROR;
- c[i] += y;
-
-
- /* Generate starting offsets into the value table for each length */
- x[1] = j = 0;
- p = c + 1; xp = x + 2;
- while (--i) { /* note that i == g from above */
- *xp++ = (j += *p++);
- }
-
-
- /* Make a table of values in order of bit lengths */
- p = b; i = 0;
- do {
- if ((j = *p++) != 0)
- v[x[j]++] = i;
- } while (++i < n);
-
-
- /* Generate the Huffman codes and for each, make the table entries */
- x[0] = i = 0; /* first Huffman code is zero */
- p = v; /* grab values in bit order */
- h = -1; /* no tables yet--level -1 */
- w = -l; /* bits decoded == (l * h) */
- u[0] = (inflate_huft *)Z_NULL; /* just to keep compilers happy */
- q = (inflate_huft *)Z_NULL; /* ditto */
- z = 0; /* ditto */
-
- /* go through the bit lengths (k already is bits in shortest code) */
- for (; k <= g; k++)
- {
- a = c[k];
- while (a--)
- {
- /* here i is the Huffman code of length k bits for value *p */
- /* make tables up to required level */
- while (k > w + l)
- {
- h++;
- w += l; /* previous table always l bits */
-
- /* compute minimum size table less than or equal to l bits */
- z = (z = g - w) > (uInt)l ? l : z; /* table size upper limit */
- if ((f = 1 << (j = k - w)) > a + 1) /* try a k-w bit table */
- { /* too few codes for k-w bit table */
- f -= a + 1; /* deduct codes from patterns left */
- xp = c + k;
- if (j < z)
- while (++j < z) /* try smaller tables up to z bits */
- {
- if ((f <<= 1) <= *++xp)
- break; /* enough codes to use up j bits */
- f -= *xp; /* else deduct codes from patterns */
- }
- }
- z = 1 << j; /* table entries for j-bit table */
-
- /* allocate and link in new table */
- if ((q = (inflate_huft *)ZALLOC
- (zs,z + 1,sizeof(inflate_huft))) == Z_NULL)
- {
- if (h)
- inflate_trees_free(u[0], zs);
- return Z_MEM_ERROR; /* not enough memory */
- }
- q->word.Nalloc = z + 1;
-#ifdef DEBUG_ZLIB
- inflate_hufts += z + 1;
-#endif
- *t = q + 1; /* link to list for huft_free() */
- *(t = &(q->next)) = Z_NULL;
- u[h] = ++q; /* table starts after link */
-
- /* connect to last table, if there is one */
- if (h)
- {
- x[h] = i; /* save pattern for backing up */
- r.bits = (Byte)l; /* bits to dump before this table */
- r.exop = (Byte)j; /* bits in this table */
- r.next = q; /* pointer to this table */
- j = i >> (w - l); /* (get around Turbo C bug) */
- u[h-1][j] = r; /* connect to last table */
- }
- }
-
- /* set up table entry in r */
- r.bits = (Byte)(k - w);
- if (p >= v + n)
- r.exop = 128 + 64; /* out of values--invalid code */
- else if (*p < s)
- {
- r.exop = (Byte)(*p < 256 ? 0 : 32 + 64); /* 256 is end-of-block */
- r.base = *p++; /* simple code is just the value */
- }
- else
- {
- r.exop = (Byte)e[*p - s] + 16 + 64; /* non-simple--look up in lists */
- r.base = d[*p++ - s];
- }
-
- /* fill code-like entries with r */
- f = 1 << (k - w);
- for (j = i >> w; j < z; j += f)
- q[j] = r;
-
- /* backwards increment the k-bit code i */
- for (j = 1 << (k - 1); i & j; j >>= 1)
- i ^= j;
- i ^= j;
-
- /* backup over finished tables */
- while ((i & ((1 << w) - 1)) != x[h])
- {
- h--; /* don't need to update q */
- w -= l;
- }
- }
- }
-
-
- /* Return Z_BUF_ERROR if we were given an incomplete table */
- return y != 0 && g != 1 ? Z_BUF_ERROR : Z_OK;
-}
-
-
-local int inflate_trees_bits(
- uIntf *c, /* 19 code lengths */
- uIntf *bb, /* bits tree desired/actual depth */
- inflate_huft * FAR *tb, /* bits tree result */
- z_stream *z /* for zfree function */
-)
-{
- int r;
-
- r = huft_build(c, 19, 19, (uIntf*)Z_NULL, (uIntf*)Z_NULL, tb, bb, z);
- if (r == Z_DATA_ERROR)
- z->msg = "oversubscribed dynamic bit lengths tree";
- else if (r == Z_BUF_ERROR)
- {
- inflate_trees_free(*tb, z);
- z->msg = "incomplete dynamic bit lengths tree";
- r = Z_DATA_ERROR;
- }
- return r;
-}
-
-
-local int inflate_trees_dynamic(
- uInt nl, /* number of literal/length codes */
- uInt nd, /* number of distance codes */
- uIntf *c, /* that many (total) code lengths */
- uIntf *bl, /* literal desired/actual bit depth */
- uIntf *bd, /* distance desired/actual bit depth */
- inflate_huft * FAR *tl, /* literal/length tree result */
- inflate_huft * FAR *td, /* distance tree result */
- z_stream *z /* for zfree function */
-)
-{
- int r;
-
- /* build literal/length tree */
- if ((r = huft_build(c, nl, 257, cplens, cplext, tl, bl, z)) != Z_OK)
- {
- if (r == Z_DATA_ERROR)
- z->msg = "oversubscribed literal/length tree";
- else if (r == Z_BUF_ERROR)
- {
- inflate_trees_free(*tl, z);
- z->msg = "incomplete literal/length tree";
- r = Z_DATA_ERROR;
- }
- return r;
- }
-
- /* build distance tree */
- if ((r = huft_build(c + nl, nd, 0, cpdist, cpdext, td, bd, z)) != Z_OK)
- {
- if (r == Z_DATA_ERROR)
- z->msg = "oversubscribed literal/length tree";
- else if (r == Z_BUF_ERROR) {
-#ifdef PKZIP_BUG_WORKAROUND
- r = Z_OK;
- }
-#else
- inflate_trees_free(*td, z);
- z->msg = "incomplete literal/length tree";
- r = Z_DATA_ERROR;
- }
- inflate_trees_free(*tl, z);
- return r;
-#endif
- }
-
- /* done */
- return Z_OK;
-}
-
-
-/* build fixed tables only once--keep them here */
-local int fixed_lock = 0;
-local int fixed_built = 0;
-#define FIXEDH 530 /* number of hufts used by fixed tables */
-local uInt fixed_left = FIXEDH;
-local inflate_huft fixed_mem[FIXEDH];
-local uInt fixed_bl;
-local uInt fixed_bd;
-local inflate_huft *fixed_tl;
-local inflate_huft *fixed_td;
-
-
-local voidpf falloc(q, n, s)
-voidpf q; /* opaque pointer (not used) */
-uInt n; /* number of items */
-uInt s; /* size of item */
-{
- Assert(s == sizeof(inflate_huft) && n <= fixed_left,
- "inflate_trees falloc overflow");
- if (q) s++; /* to make some compilers happy */
- fixed_left -= n;
- return (voidpf)(fixed_mem + fixed_left);
-}
-
-
-local void ffree(q, p, n)
-voidpf q;
-voidpf p;
-uInt n;
-{
- Assert(0, "inflate_trees ffree called!");
- if (q) q = p; /* to make some compilers happy */
-}
-
-
-local int inflate_trees_fixed(
- uIntf *bl, /* literal desired/actual bit depth */
- uIntf *bd, /* distance desired/actual bit depth */
- inflate_huft * FAR *tl, /* literal/length tree result */
- inflate_huft * FAR *td /* distance tree result */
-)
-{
- /* build fixed tables if not built already--lock out other instances */
- while (++fixed_lock > 1)
- fixed_lock--;
- if (!fixed_built)
- {
- int k; /* temporary variable */
- unsigned c[288]; /* length list for huft_build */
- z_stream z; /* for falloc function */
-
- /* set up fake z_stream for memory routines */
- z.zalloc = falloc;
- z.zfree = ffree;
- z.opaque = Z_NULL;
-
- /* literal table */
- for (k = 0; k < 144; k++)
- c[k] = 8;
- for (; k < 256; k++)
- c[k] = 9;
- for (; k < 280; k++)
- c[k] = 7;
- for (; k < 288; k++)
- c[k] = 8;
- fixed_bl = 7;
- huft_build(c, 288, 257, cplens, cplext, &fixed_tl, &fixed_bl, &z);
-
- /* distance table */
- for (k = 0; k < 30; k++)
- c[k] = 5;
- fixed_bd = 5;
- huft_build(c, 30, 0, cpdist, cpdext, &fixed_td, &fixed_bd, &z);
-
- /* done */
- fixed_built = 1;
- }
- fixed_lock--;
- *bl = fixed_bl;
- *bd = fixed_bd;
- *tl = fixed_tl;
- *td = fixed_td;
- return Z_OK;
-}
-
-
-local int inflate_trees_free(
- inflate_huft *t, /* table to free */
- z_stream *z /* for zfree function */
-)
-/* Free the malloc'ed tables built by huft_build(), which makes a linked
- list of the tables it made, with the links in a dummy first entry of
- each table. */
-{
- register inflate_huft *p, *q;
-
- /* Go through linked list, freeing from the malloced (t[-1]) address. */
- p = t;
- while (p != Z_NULL)
- {
- q = (--p)->next;
- ZFREE(z, p, p->word.Nalloc * sizeof(inflate_huft));
- p = q;
- }
- return Z_OK;
-}
-
-/*+++++*/
-/* infcodes.c -- process literals and length/distance pairs
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* simplify the use of the inflate_huft type with some defines */
-#define base more.Base
-#define next more.Next
-#define exop word.what.Exop
-#define bits word.what.Bits
-
-/* inflate codes private state */
-struct inflate_codes_state {
-
- /* mode */
- enum { /* waiting for "i:"=input, "o:"=output, "x:"=nothing */
- START, /* x: set up for LEN */
- LEN, /* i: get length/literal/eob next */
- LENEXT, /* i: getting length extra (have base) */
- DIST, /* i: get distance next */
- DISTEXT, /* i: getting distance extra */
- COPY, /* o: copying bytes in window, waiting for space */
- LIT, /* o: got literal, waiting for output space */
- WASH, /* o: got eob, possibly still output waiting */
- END, /* x: got eob and all data flushed */
- BADCODE} /* x: got error */
- mode; /* current inflate_codes mode */
-
- /* mode dependent information */
- uInt len;
- union {
- struct {
- inflate_huft *tree; /* pointer into tree */
- uInt need; /* bits needed */
- } code; /* if LEN or DIST, where in tree */
- uInt lit; /* if LIT, literal */
- struct {
- uInt get; /* bits to get for extra */
- uInt dist; /* distance back to copy from */
- } copy; /* if EXT or COPY, where and how much */
- } sub; /* submode */
-
- /* mode independent information */
- Byte lbits; /* ltree bits decoded per branch */
- Byte dbits; /* dtree bits decoder per branch */
- inflate_huft *ltree; /* literal/length/eob tree */
- inflate_huft *dtree; /* distance tree */
-
-};
-
-
-local inflate_codes_statef *inflate_codes_new(
- uInt bl,
- uInt bd,
- inflate_huft *tl,
- inflate_huft *td,
- z_stream *z
-)
-{
- inflate_codes_statef *c;
-
- if ((c = (inflate_codes_statef *)
- ZALLOC(z,1,sizeof(struct inflate_codes_state))) != Z_NULL)
- {
- c->mode = START;
- c->lbits = (Byte)bl;
- c->dbits = (Byte)bd;
- c->ltree = tl;
- c->dtree = td;
- Tracev((stderr, "inflate: codes new\n"));
- }
- return c;
-}
-
-
-local int inflate_codes(
- inflate_blocks_statef *s,
- z_stream *z,
- int r
-)
-{
- uInt j; /* temporary storage */
- inflate_huft *t; /* temporary pointer */
- uInt e; /* extra bits or operation */
- uLong b; /* bit buffer */
- uInt k; /* bits in bit buffer */
- Bytef *p; /* input data pointer */
- uInt n; /* bytes available there */
- Bytef *q; /* output window write pointer */
- uInt m; /* bytes to end of window or read pointer */
- Bytef *f; /* pointer to copy strings from */
- inflate_codes_statef *c = s->sub.decode.codes; /* codes state */
-
- /* copy input/output information to locals (UPDATE macro restores) */
- LOAD
-
- /* process input and output based on current state */
- while (1) switch (c->mode)
- { /* waiting for "i:"=input, "o:"=output, "x:"=nothing */
- case START: /* x: set up for LEN */
-#ifndef SLOW
- if (m >= 258 && n >= 10)
- {
- UPDATE
- r = inflate_fast(c->lbits, c->dbits, c->ltree, c->dtree, s, z);
- LOAD
- if (r != Z_OK)
- {
- c->mode = r == Z_STREAM_END ? WASH : BADCODE;
- break;
- }
- }
-#endif /* !SLOW */
- c->sub.code.need = c->lbits;
- c->sub.code.tree = c->ltree;
- c->mode = LEN;
- case LEN: /* i: get length/literal/eob next */
- j = c->sub.code.need;
- NEEDBITS(j)
- t = c->sub.code.tree + ((uInt)b & inflate_mask[j]);
- DUMPBITS(t->bits)
- e = (uInt)(t->exop);
- if (e == 0) /* literal */
- {
- c->sub.lit = t->base;
- Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
- "inflate: literal '%c'\n" :
- "inflate: literal 0x%02x\n", t->base));
- c->mode = LIT;
- break;
- }
- if (e & 16) /* length */
- {
- c->sub.copy.get = e & 15;
- c->len = t->base;
- c->mode = LENEXT;
- break;
- }
- if ((e & 64) == 0) /* next table */
- {
- c->sub.code.need = e;
- c->sub.code.tree = t->next;
- break;
- }
- if (e & 32) /* end of block */
- {
- Tracevv((stderr, "inflate: end of block\n"));
- c->mode = WASH;
- break;
- }
- c->mode = BADCODE; /* invalid code */
- z->msg = "invalid literal/length code";
- r = Z_DATA_ERROR;
- LEAVE
- case LENEXT: /* i: getting length extra (have base) */
- j = c->sub.copy.get;
- NEEDBITS(j)
- c->len += (uInt)b & inflate_mask[j];
- DUMPBITS(j)
- c->sub.code.need = c->dbits;
- c->sub.code.tree = c->dtree;
- Tracevv((stderr, "inflate: length %u\n", c->len));
- c->mode = DIST;
- case DIST: /* i: get distance next */
- j = c->sub.code.need;
- NEEDBITS(j)
- t = c->sub.code.tree + ((uInt)b & inflate_mask[j]);
- DUMPBITS(t->bits)
- e = (uInt)(t->exop);
- if (e & 16) /* distance */
- {
- c->sub.copy.get = e & 15;
- c->sub.copy.dist = t->base;
- c->mode = DISTEXT;
- break;
- }
- if ((e & 64) == 0) /* next table */
- {
- c->sub.code.need = e;
- c->sub.code.tree = t->next;
- break;
- }
- c->mode = BADCODE; /* invalid code */
- z->msg = "invalid distance code";
- r = Z_DATA_ERROR;
- LEAVE
- case DISTEXT: /* i: getting distance extra */
- j = c->sub.copy.get;
- NEEDBITS(j)
- c->sub.copy.dist += (uInt)b & inflate_mask[j];
- DUMPBITS(j)
- Tracevv((stderr, "inflate: distance %u\n", c->sub.copy.dist));
- c->mode = COPY;
- case COPY: /* o: copying bytes in window, waiting for space */
-#ifndef __TURBOC__ /* Turbo C bug for following expression */
- f = (uInt)(q - s->window) < c->sub.copy.dist ?
- s->end - (c->sub.copy.dist - (q - s->window)) :
- q - c->sub.copy.dist;
-#else
- f = q - c->sub.copy.dist;
- if ((uInt)(q - s->window) < c->sub.copy.dist)
- f = s->end - (c->sub.copy.dist - (q - s->window));
-#endif
- while (c->len)
- {
- NEEDOUT
- OUTBYTE(*f++)
- if (f == s->end)
- f = s->window;
- c->len--;
- }
- c->mode = START;
- break;
- case LIT: /* o: got literal, waiting for output space */
- NEEDOUT
- OUTBYTE(c->sub.lit)
- c->mode = START;
- break;
- case WASH: /* o: got eob, possibly more output */
- FLUSH
- if (s->read != s->write)
- LEAVE
- c->mode = END;
- case END:
- r = Z_STREAM_END;
- LEAVE
- case BADCODE: /* x: got error */
- r = Z_DATA_ERROR;
- LEAVE
- default:
- r = Z_STREAM_ERROR;
- LEAVE
- }
-}
-
-
-local void inflate_codes_free(
- inflate_codes_statef *c,
- z_stream *z
-)
-{
- ZFREE(z, c, sizeof(struct inflate_codes_state));
- Tracev((stderr, "inflate: codes free\n"));
-}
-
-/*+++++*/
-/* inflate_util.c -- data and routines common to blocks and codes
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* copy as much as possible from the sliding window to the output area */
-local int inflate_flush(
- inflate_blocks_statef *s,
- z_stream *z,
- int r
-)
-{
- uInt n;
- Bytef *p, *q;
-
- /* local copies of source and destination pointers */
- p = z->next_out;
- q = s->read;
-
- /* compute number of bytes to copy as far as end of window */
- n = (uInt)((q <= s->write ? s->write : s->end) - q);
- if (n > z->avail_out) n = z->avail_out;
- if (n && r == Z_BUF_ERROR) r = Z_OK;
-
- /* update counters */
- z->avail_out -= n;
- z->total_out += n;
-
- /* update check information */
- if (s->checkfn != Z_NULL)
- s->check = (*s->checkfn)(s->check, q, n);
-
- /* copy as far as end of window */
- zmemcpy(p, q, n);
- p += n;
- q += n;
-
- /* see if more to copy at beginning of window */
- if (q == s->end)
- {
- /* wrap pointers */
- q = s->window;
- if (s->write == s->end)
- s->write = s->window;
-
- /* compute bytes to copy */
- n = (uInt)(s->write - q);
- if (n > z->avail_out) n = z->avail_out;
- if (n && r == Z_BUF_ERROR) r = Z_OK;
-
- /* update counters */
- z->avail_out -= n;
- z->total_out += n;
-
- /* update check information */
- if (s->checkfn != Z_NULL)
- s->check = (*s->checkfn)(s->check, q, n);
-
- /* copy */
- zmemcpy(p, q, n);
- p += n;
- q += n;
- }
-
- /* update pointers */
- z->next_out = p;
- s->read = q;
-
- /* done */
- return r;
-}
-
-
-/*+++++*/
-/* inffast.c -- process literals and length/distance pairs fast
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* simplify the use of the inflate_huft type with some defines */
-#define base more.Base
-#define next more.Next
-#define exop word.what.Exop
-#define bits word.what.Bits
-
-/* macros for bit input with no checking and for returning unused bytes */
-#define GRABBITS(j) {while(k<(j)){b|=((uLong)NEXTBYTE)<<k;k+=8;}}
-#define UNGRAB {n+=(c=k>>3);p-=c;k&=7;}
-
-/* Called with number of bytes left to write in window at least 258
- (the maximum string length) and number of input bytes available
- at least ten. The ten bytes are six bytes for the longest length/
- distance pair plus four bytes for overloading the bit buffer. */
-
-local int inflate_fast(
- uInt bl,
- uInt bd,
- inflate_huft *tl,
- inflate_huft *td,
- inflate_blocks_statef *s,
- z_stream *z
-)
-{
- inflate_huft *t; /* temporary pointer */
- uInt e; /* extra bits or operation */
- uLong b; /* bit buffer */
- uInt k; /* bits in bit buffer */
- Bytef *p; /* input data pointer */
- uInt n; /* bytes available there */
- Bytef *q; /* output window write pointer */
- uInt m; /* bytes to end of window or read pointer */
- uInt ml; /* mask for literal/length tree */
- uInt md; /* mask for distance tree */
- uInt c; /* bytes to copy */
- uInt d; /* distance back to copy from */
- Bytef *r; /* copy source pointer */
-
- /* load input, output, bit values */
- LOAD
-
- /* initialize masks */
- ml = inflate_mask[bl];
- md = inflate_mask[bd];
-
- /* do until not enough input or output space for fast loop */
- do { /* assume called with m >= 258 && n >= 10 */
- /* get literal/length code */
- GRABBITS(20) /* max bits for literal/length code */
- if ((e = (t = tl + ((uInt)b & ml))->exop) == 0)
- {
- DUMPBITS(t->bits)
- Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
- "inflate: * literal '%c'\n" :
- "inflate: * literal 0x%02x\n", t->base));
- *q++ = (Byte)t->base;
- m--;
- continue;
- }
- do {
- DUMPBITS(t->bits)
- if (e & 16)
- {
- /* get extra bits for length */
- e &= 15;
- c = t->base + ((uInt)b & inflate_mask[e]);
- DUMPBITS(e)
- Tracevv((stderr, "inflate: * length %u\n", c));
-
- /* decode distance base of block to copy */
- GRABBITS(15); /* max bits for distance code */
- e = (t = td + ((uInt)b & md))->exop;
- do {
- DUMPBITS(t->bits)
- if (e & 16)
- {
- /* get extra bits to add to distance base */
- e &= 15;
- GRABBITS(e) /* get extra bits (up to 13) */
- d = t->base + ((uInt)b & inflate_mask[e]);
- DUMPBITS(e)
- Tracevv((stderr, "inflate: * distance %u\n", d));
-
- /* do the copy */
- m -= c;
- if ((uInt)(q - s->window) >= d) /* offset before dest */
- { /* just copy */
- r = q - d;
- *q++ = *r++; c--; /* minimum count is three, */
- *q++ = *r++; c--; /* so unroll loop a little */
- }
- else /* else offset after destination */
- {
- e = d - (q - s->window); /* bytes from offset to end */
- r = s->end - e; /* pointer to offset */
- if (c > e) /* if source crosses, */
- {
- c -= e; /* copy to end of window */
- do {
- *q++ = *r++;
- } while (--e);
- r = s->window; /* copy rest from start of window */
- }
- }
- do { /* copy all or what's left */
- *q++ = *r++;
- } while (--c);
- break;
- }
- else if ((e & 64) == 0)
- e = (t = t->next + ((uInt)b & inflate_mask[e]))->exop;
- else
- {
- z->msg = "invalid distance code";
- UNGRAB
- UPDATE
- return Z_DATA_ERROR;
- }
- } while (1);
- break;
- }
- if ((e & 64) == 0)
- {
- if ((e = (t = t->next + ((uInt)b & inflate_mask[e]))->exop) == 0)
- {
- DUMPBITS(t->bits)
- Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
- "inflate: * literal '%c'\n" :
- "inflate: * literal 0x%02x\n", t->base));
- *q++ = (Byte)t->base;
- m--;
- break;
- }
- }
- else if (e & 32)
- {
- Tracevv((stderr, "inflate: * end of block\n"));
- UNGRAB
- UPDATE
- return Z_STREAM_END;
- }
- else
- {
- z->msg = "invalid literal/length code";
- UNGRAB
- UPDATE
- return Z_DATA_ERROR;
- }
- } while (1);
- } while (m >= 258 && n >= 10);
-
- /* not enough input or output--restore pointers and return */
- UNGRAB
- UPDATE
- return Z_OK;
-}
-
-
-/*+++++*/
-/* zutil.c -- target dependent utility functions for the compression library
- * Copyright (C) 1995 Jean-loup Gailly.
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* From: zutil.c,v 1.8 1995/05/03 17:27:12 jloup Exp */
-
-char *zlib_version = ZLIB_VERSION;
-
-char *z_errmsg[] = {
-"stream end", /* Z_STREAM_END 1 */
-"", /* Z_OK 0 */
-"file error", /* Z_ERRNO (-1) */
-"stream error", /* Z_STREAM_ERROR (-2) */
-"data error", /* Z_DATA_ERROR (-3) */
-"insufficient memory", /* Z_MEM_ERROR (-4) */
-"buffer error", /* Z_BUF_ERROR (-5) */
-""};
-
-
-/*+++++*/
-/* adler32.c -- compute the Adler-32 checksum of a data stream
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* From: adler32.c,v 1.6 1995/05/03 17:27:08 jloup Exp */
-
-#define BASE 65521L /* largest prime smaller than 65536 */
-#define NMAX 5552
-/* NMAX is the largest n such that 255n(n+1)/2 + (n+1)(BASE-1) <= 2^32-1 */
-
-#define DO1(buf) {s1 += *buf++; s2 += s1;}
-#define DO2(buf) DO1(buf); DO1(buf);
-#define DO4(buf) DO2(buf); DO2(buf);
-#define DO8(buf) DO4(buf); DO4(buf);
-#define DO16(buf) DO8(buf); DO8(buf);
-
-/* ========================================================================= */
-uLong adler32(adler, buf, len)
- uLong adler;
- Bytef *buf;
- uInt len;
-{
- unsigned long s1 = adler & 0xffff;
- unsigned long s2 = (adler >> 16) & 0xffff;
- int k;
-
- if (buf == Z_NULL) return 1L;
-
- while (len > 0) {
- k = len < NMAX ? len : NMAX;
- len -= k;
- while (k >= 16) {
- DO16(buf);
- k -= 16;
- }
- if (k != 0) do {
- DO1(buf);
- } while (--k);
- s1 %= BASE;
- s2 %= BASE;
- }
- return (s2 << 16) | s1;
-}
+++ /dev/null
-/*
- * arch/ppc/boot/simple/chrpmap.S
- *
- * Author: Tom Rini <trini@mvista.com>
- *
- * This will go and setup ISA_io to 0xFE00000 and return.
- */
-
-#include <asm/ppc_asm.h>
-
- .text
-
- .globl serial_fixups
-serial_fixups:
- lis r3,ISA_io@h /* Load ISA_io */
- ori r3,r3,ISA_io@l
- lis r4,0xFE00 /* Load the value, 0xFE00000 */
- stw r4,0(r3) /* store */
- blr
+++ /dev/null
-/*
- * arch/ppc/boot/simple/gt64260_tty.c
- *
- * Bootloader version of the embedded MPSC/UART driver for the GT64260[A].
- * Note: Due to 64260A errata, DMA will be used for UART input (via SDMA).
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/* This code assumes that the data cache has been disabled (L1, L2, L3). */
-
-#include <linux/config.h>
-#include <linux/serialP.h>
-#include <linux/serial_reg.h>
-#include <asm/serial.h>
-#include <asm/gt64260_defs.h>
-
-extern void udelay(long);
-static void stop_dma(int chan);
-
-static u32 gt64260_base = EV64260_BRIDGE_REG_BASE; /* base addr of 64260 */
-
-inline unsigned
-gt64260_in_le32(volatile unsigned *addr)
-{
- unsigned ret;
-
- __asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) :
- "r" (addr), "m" (*addr));
- return ret;
-}
-
-inline void
-gt64260_out_le32(volatile unsigned *addr, int val)
-{
- __asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
- "r" (val), "r" (addr));
-}
-
-#define GT64260_REG_READ(offs) \
- (gt64260_in_le32((volatile uint *)(gt64260_base + (offs))))
-#define GT64260_REG_WRITE(offs, d) \
- (gt64260_out_le32((volatile uint *)(gt64260_base + (offs)), (int)(d)))
-
-
-static struct {
- u32 sdc;
- u32 sdcm;
- u32 rx_desc;
- u32 rx_buf_ptr;
- u32 scrdp;
- u32 tx_desc;
- u32 sctdp;
- u32 sftdp;
-} sdma_regs;
-
-#define SDMA_REGS_INIT(chan) { \
- sdma_regs.sdc = GT64260_SDMA_##chan##_SDC; \
- sdma_regs.sdcm = GT64260_SDMA_##chan##_SDCM; \
- sdma_regs.rx_desc = GT64260_SDMA_##chan##_RX_DESC; \
- sdma_regs.rx_buf_ptr = GT64260_SDMA_##chan##_RX_BUF_PTR; \
- sdma_regs.scrdp = GT64260_SDMA_##chan##_SCRDP; \
- sdma_regs.tx_desc = GT64260_SDMA_##chan##_TX_DESC; \
- sdma_regs.sctdp = GT64260_SDMA_##chan##_SCTDP; \
- sdma_regs.sftdp = GT64260_SDMA_##chan##_SFTDP; \
-}
-
-typedef struct {
- volatile u16 bufsize;
- volatile u16 bytecnt;
- volatile u32 cmd_stat;
- volatile u32 next_desc_ptr;
- volatile u32 buffer;
-} gt64260_rx_desc_t;
-
-typedef struct {
- volatile u16 bytecnt;
- volatile u16 shadow;
- volatile u32 cmd_stat;
- volatile u32 next_desc_ptr;
- volatile u32 buffer;
-} gt64260_tx_desc_t;
-
-#define MAX_RESET_WAIT 10000
-#define MAX_TX_WAIT 10000
-
-#define RX_NUM_DESC 2
-#define TX_NUM_DESC 2
-
-#define RX_BUF_SIZE 16
-#define TX_BUF_SIZE 16
-
-static gt64260_rx_desc_t rd[RX_NUM_DESC] __attribute__ ((aligned(32)));
-static gt64260_tx_desc_t td[TX_NUM_DESC] __attribute__ ((aligned(32)));
-
-static char rx_buf[RX_NUM_DESC * RX_BUF_SIZE] __attribute__ ((aligned(32)));
-static char tx_buf[TX_NUM_DESC * TX_BUF_SIZE] __attribute__ ((aligned(32)));
-
-static int cur_rd = 0;
-static int cur_td = 0;
-
-
-#define RX_INIT_RDP(rdp) { \
- (rdp)->bufsize = 2; \
- (rdp)->bytecnt = 0; \
- (rdp)->cmd_stat = GT64260_SDMA_DESC_CMDSTAT_L | \
- GT64260_SDMA_DESC_CMDSTAT_F | \
- GT64260_SDMA_DESC_CMDSTAT_O; \
-}
-
-unsigned long
-serial_init(int chan, void *ignored)
-{
- u32 mpsc_adjust, sdma_adjust, brg_bcr;
- int i;
-
- stop_dma(0);
- stop_dma(1);
-
- if (chan != 1) {
- chan = 0; /* default to chan 0 if anything but 1 */
- mpsc_adjust = 0;
- sdma_adjust = 0;
- brg_bcr = GT64260_BRG_0_BCR;
- SDMA_REGS_INIT(0);
- }
- else {
- mpsc_adjust = 0x1000;
- sdma_adjust = 0x2000;
- brg_bcr = GT64260_BRG_1_BCR;
- SDMA_REGS_INIT(1);
- }
-
- /* Set up ring buffers */
- for (i=0; i<RX_NUM_DESC; i++) {
- RX_INIT_RDP(&rd[i]);
- rd[i].buffer = (u32)&rx_buf[i * RX_BUF_SIZE];
- rd[i].next_desc_ptr = (u32)&rd[i+1];
- }
- rd[RX_NUM_DESC - 1].next_desc_ptr = (u32)&rd[0];
-
- for (i=0; i<TX_NUM_DESC; i++) {
- td[i].bytecnt = 0;
- td[i].shadow = 0;
- td[i].buffer = (u32)&tx_buf[i * TX_BUF_SIZE];
- td[i].cmd_stat = GT64260_SDMA_DESC_CMDSTAT_F |
- GT64260_SDMA_DESC_CMDSTAT_L;
- td[i].next_desc_ptr = (u32)&td[i+1];
- }
- td[TX_NUM_DESC - 1].next_desc_ptr = (u32)&td[0];
-
- /* Set MPSC Routing */
- GT64260_REG_WRITE(GT64260_MPSC_MRR, 0x3ffffe38);
- GT64260_REG_WRITE(GT64260_MPP_SERIAL_PORTS_MULTIPLEX, 0x00001102);
-
- /* MPSC 0/1 Rx & Tx get clocks BRG0/1 */
- GT64260_REG_WRITE(GT64260_MPSC_RCRR, 0x00000100);
- GT64260_REG_WRITE(GT64260_MPSC_TCRR, 0x00000100);
-
- /* clear pending interrupts */
- GT64260_REG_WRITE(GT64260_SDMA_INTR_MASK, 0);
-
- GT64260_REG_WRITE(GT64260_SDMA_0_SCRDP + sdma_adjust, &rd[0]);
- GT64260_REG_WRITE(GT64260_SDMA_0_SCTDP + sdma_adjust,
- &td[TX_NUM_DESC - 1]);
- GT64260_REG_WRITE(GT64260_SDMA_0_SFTDP + sdma_adjust,
- &td[TX_NUM_DESC - 1]);
-
- GT64260_REG_WRITE(GT64260_SDMA_0_SDC + sdma_adjust,
- GT64260_SDMA_SDC_RFT | GT64260_SDMA_SDC_SFM |
- GT64260_SDMA_SDC_BLMR | GT64260_SDMA_SDC_BLMT |
- (3 << 12));
-
- /* Set BRG to generate proper baud rate */
- GT64260_REG_WRITE(brg_bcr, ((8 << 18) | (1 << 16) | 36));
-
- /* Put MPSC into UART mode, no null modem, 16x clock mode */
- GT64260_REG_WRITE(GT64260_MPSC_0_MMCRL + mpsc_adjust, 0x000004c4);
- GT64260_REG_WRITE(GT64260_MPSC_0_MMCRH + mpsc_adjust, 0x04400400);
-
- GT64260_REG_WRITE(GT64260_MPSC_0_CHR_1 + mpsc_adjust, 0);
- GT64260_REG_WRITE(GT64260_MPSC_0_CHR_9 + mpsc_adjust, 0);
- GT64260_REG_WRITE(GT64260_MPSC_0_CHR_10 + mpsc_adjust, 0);
- GT64260_REG_WRITE(GT64260_MPSC_0_CHR_3 + mpsc_adjust, 4);
- GT64260_REG_WRITE(GT64260_MPSC_0_CHR_4 + mpsc_adjust, 0);
- GT64260_REG_WRITE(GT64260_MPSC_0_CHR_5 + mpsc_adjust, 0);
- GT64260_REG_WRITE(GT64260_MPSC_0_CHR_6 + mpsc_adjust, 0);
- GT64260_REG_WRITE(GT64260_MPSC_0_CHR_7 + mpsc_adjust, 0);
- GT64260_REG_WRITE(GT64260_MPSC_0_CHR_8 + mpsc_adjust, 0);
-
- /* 8 data bits, 1 stop bit */
- GT64260_REG_WRITE(GT64260_MPSC_0_MPCR + mpsc_adjust, (3 << 12));
-
- GT64260_REG_WRITE(GT64260_SDMA_0_SDCM + sdma_adjust,
- GT64260_SDMA_SDCM_ERD);
-
- GT64260_REG_WRITE(GT64260_MPSC_0_CHR_2 + sdma_adjust,
- GT64260_MPSC_UART_CR_EH);
-
- udelay(100);
-
- return (ulong)chan;
-}
-
-static void
-stop_dma(int chan)
-{
- u32 sdma_sdcm = GT64260_SDMA_0_SDCM;
- int i;
-
- if (chan == 1) {
- sdma_sdcm = GT64260_SDMA_1_SDCM;
- }
-
- /* Abort SDMA Rx, Tx */
- GT64260_REG_WRITE(sdma_sdcm,
- GT64260_SDMA_SDCM_AR | GT64260_SDMA_SDCM_STD);
-
- for (i=0; i<MAX_RESET_WAIT; i++) {
- if ((GT64260_REG_READ(sdma_sdcm) & (GT64260_SDMA_SDCM_AR |
- GT64260_SDMA_SDCM_AT)) == 0) break;
- udelay(100);
- }
-
- return;
-}
-
-static int
-wait_for_ownership(void)
-{
- int i;
-
- for (i=0; i<MAX_TX_WAIT; i++) {
- if ((GT64260_REG_READ(sdma_regs.sdcm) &
- GT64260_SDMA_SDCM_TXD) == 0) break;
- udelay(1000);
- }
-
- return (i < MAX_TX_WAIT);
-}
-
-void
-serial_putc(unsigned long com_port, unsigned char c)
-{
- gt64260_tx_desc_t *tdp;
-
- if (wait_for_ownership() == 0) return;
-
- tdp = &td[cur_td];
- if (++cur_td >= TX_NUM_DESC) cur_td = 0;
-
- *(unchar *)(tdp->buffer ^ 7) = c;
- tdp->bytecnt = 1;
- tdp->shadow = 1;
- tdp->cmd_stat = GT64260_SDMA_DESC_CMDSTAT_L |
- GT64260_SDMA_DESC_CMDSTAT_F | GT64260_SDMA_DESC_CMDSTAT_O;
-
- GT64260_REG_WRITE(sdma_regs.sctdp, tdp);
- GT64260_REG_WRITE(sdma_regs.sftdp, tdp);
- GT64260_REG_WRITE(sdma_regs.sdcm,
- GT64260_REG_READ(sdma_regs.sdcm) | GT64260_SDMA_SDCM_TXD);
-
- return;
-}
-
-unsigned char
-serial_getc(unsigned long com_port)
-{
- gt64260_rx_desc_t *rdp;
- unchar c = '\0';
-
- rdp = &rd[cur_rd];
-
- if ((rdp->cmd_stat & (GT64260_SDMA_DESC_CMDSTAT_O |
- GT64260_SDMA_DESC_CMDSTAT_ES)) == 0) {
- c = *(unchar *)(rdp->buffer ^ 7);
- RX_INIT_RDP(rdp);
- if (++cur_rd >= RX_NUM_DESC) cur_rd = 0;
- }
-
- return c;
-}
-
-int
-serial_tstc(unsigned long com_port)
-{
- gt64260_rx_desc_t *rdp;
- int loop_count = 0;
- int rc = 0;
-
- rdp = &rd[cur_rd];
-
- /* Go thru rcv desc's until empty looking for one with data (no error)*/
- while (((rdp->cmd_stat & GT64260_SDMA_DESC_CMDSTAT_O) == 0) &&
- (loop_count++ < RX_NUM_DESC)) {
-
- /* If there was an error, reinit the desc & continue */
- if ((rdp->cmd_stat & GT64260_SDMA_DESC_CMDSTAT_ES) != 0) {
- RX_INIT_RDP(rdp);
- if (++cur_rd >= RX_NUM_DESC) cur_rd = 0;
- rdp = (gt64260_rx_desc_t *)rdp->next_desc_ptr;
- }
- else {
- rc = 1;
- break;
- }
- }
-
- return rc;
-}
-
-void
-serial_close(unsigned long com_port)
-{
- stop_dma(com_port);
- return;
-}
+++ /dev/null
-/*
- * arch/ppc/boot/simple/legacy.S
- *
- * Author: Tom Rini <trini@mvista.com>
- *
- * This will go and setup ISA_io to 0x8000000 and return.
- */
-
-#include <asm/ppc_asm.h>
-
- .text
-
- .globl serial_fixups
-serial_fixups:
- lis r3,ISA_io@h /* Load ISA_io */
- ori r3,r3,ISA_io@l
- lis r4,0x8000 /* Load the value, 0x8000000 */
- stw r4,0(r3) /* store */
- blr
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-# CONFIG_STANDALONE is not set
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-CONFIG_ALTIVEC=y
-CONFIG_TAU=y
-# CONFIG_TAU_INT is not set
-# CONFIG_TAU_AVERAGE is not set
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_PROC_INTF=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-# CONFIG_CPU_FREQ_24_API is not set
-CONFIG_CPU_FREQ_PMAC=y
-CONFIG_CPU_FREQ_TABLE=y
-CONFIG_PPC601_SYNC_FIX=y
-CONFIG_PM=y
-CONFIG_PPC_STD_MMU=y
-
-#
-# Platform options
-#
-CONFIG_PPC_MULTIPLATFORM=y
-# CONFIG_APUS is not set
-# CONFIG_WILLOW is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_EV64260 is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX6 is not set
-# CONFIG_TQM8260 is not set
-CONFIG_PPC_CHRP=y
-CONFIG_PPC_PMAC=y
-CONFIG_PPC_PREP=y
-CONFIG_PPC_OF=y
-CONFIG_PPCBUG_NVRAM=y
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=m
-CONFIG_PROC_DEVICETREE=y
-CONFIG_PPC_RTAS=y
-CONFIG_PREP_RESIDUAL=y
-CONFIG_PROC_PREPRESIDUAL=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyS0,9600 console=tty0 root=/dev/sda2"
-
-#
-# Bus options
-#
-CONFIG_ISA=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-
-#
-# PCMCIA/CardBus support
-#
-# CONFIG_PCMCIA is not set
-CONFIG_PCMCIA_PROBE=y
-
-#
-# Advanced setup
-#
-CONFIG_ADVANCED_OPTIONS=y
-CONFIG_HIGHMEM_START=0xfe000000
-# CONFIG_LOWMEM_SIZE_BOOL is not set
-CONFIG_LOWMEM_SIZE=0x30000000
-# CONFIG_KERNEL_START_BOOL is not set
-CONFIG_KERNEL_START=0xc0000000
-# CONFIG_TASK_SIZE_BOOL is not set
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-CONFIG_BLK_DEV_FD=m
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_LBD=y
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_BLK_DEV_IDETAPE is not set
-CONFIG_BLK_DEV_IDEFLOPPY=y
-CONFIG_BLK_DEV_IDESCSI=y
-# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-CONFIG_BLK_DEV_IDEPCI=y
-CONFIG_IDEPCI_SHARE_IRQ=y
-# CONFIG_BLK_DEV_OFFBOARD is not set
-CONFIG_BLK_DEV_GENERIC=y
-# CONFIG_BLK_DEV_OPTI621 is not set
-CONFIG_BLK_DEV_SL82C105=y
-CONFIG_BLK_DEV_IDEDMA_PCI=y
-# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
-CONFIG_IDEDMA_PCI_AUTO=y
-# CONFIG_IDEDMA_ONLYDISK is not set
-CONFIG_BLK_DEV_ADMA=y
-# CONFIG_BLK_DEV_AEC62XX is not set
-# CONFIG_BLK_DEV_ALI15X3 is not set
-# CONFIG_BLK_DEV_AMD74XX is not set
-CONFIG_BLK_DEV_CMD64X=y
-# CONFIG_BLK_DEV_TRIFLEX is not set
-# CONFIG_BLK_DEV_CY82C693 is not set
-# CONFIG_BLK_DEV_CS5520 is not set
-# CONFIG_BLK_DEV_CS5530 is not set
-# CONFIG_BLK_DEV_HPT34X is not set
-# CONFIG_BLK_DEV_HPT366 is not set
-# CONFIG_BLK_DEV_SC1200 is not set
-# CONFIG_BLK_DEV_PIIX is not set
-# CONFIG_BLK_DEV_NS87415 is not set
-# CONFIG_BLK_DEV_PDC202XX_OLD is not set
-# CONFIG_BLK_DEV_PDC202XX_NEW is not set
-# CONFIG_BLK_DEV_SVWKS is not set
-# CONFIG_BLK_DEV_SIIMAGE is not set
-# CONFIG_BLK_DEV_SLC90E66 is not set
-# CONFIG_BLK_DEV_TRM290 is not set
-# CONFIG_BLK_DEV_VIA82CXXX is not set
-CONFIG_BLK_DEV_IDE_PMAC=y
-CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
-CONFIG_BLK_DEV_IDEDMA_PMAC=y
-CONFIG_BLK_DEV_IDE_PMAC_BLINK=y
-CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO=y
-# CONFIG_IDE_CHIPSETS is not set
-CONFIG_BLK_DEV_IDEDMA=y
-# CONFIG_IDEDMA_IVB is not set
-CONFIG_IDEDMA_AUTO=y
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=y
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-CONFIG_SCSI_REPORT_LUNS=y
-CONFIG_SCSI_CONSTANTS=y
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI Transport Attributes
-#
-CONFIG_SCSI_SPI_ATTRS=y
-# CONFIG_SCSI_FC_ATTRS is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_7000FASST is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AHA152X is not set
-# CONFIG_SCSI_AHA1542 is not set
-# CONFIG_SCSI_AACRAID is not set
-CONFIG_SCSI_AIC7XXX=m
-CONFIG_AIC7XXX_CMDS_PER_DEVICE=253
-CONFIG_AIC7XXX_RESET_DELAY_MS=15000
-# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
-CONFIG_AIC7XXX_DEBUG_ENABLE=y
-CONFIG_AIC7XXX_DEBUG_MASK=0
-CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
-CONFIG_SCSI_AIC7XXX_OLD=m
-# CONFIG_SCSI_AIC79XX is not set
-CONFIG_SCSI_ADVANSYS=m
-# CONFIG_SCSI_IN2000 is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_DTC3280 is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_GENERIC_NCR5380 is not set
-# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_NCR53C406A is not set
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
-CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
-CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
-# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
-# CONFIG_SCSI_IPR is not set
-# CONFIG_SCSI_PAS16 is not set
-# CONFIG_SCSI_PSI240I is not set
-# CONFIG_SCSI_QLOGIC_FAS is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-CONFIG_SCSI_QLA2XXX=y
-# CONFIG_SCSI_QLA21XX is not set
-# CONFIG_SCSI_QLA22XX is not set
-# CONFIG_SCSI_QLA2300 is not set
-# CONFIG_SCSI_QLA2322 is not set
-# CONFIG_SCSI_QLA6312 is not set
-# CONFIG_SCSI_QLA6322 is not set
-# CONFIG_SCSI_SYM53C416 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_T128 is not set
-# CONFIG_SCSI_U14_34F is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-CONFIG_SCSI_MESH=y
-CONFIG_SCSI_MESH_SYNC_RATE=5
-CONFIG_SCSI_MESH_RESET_DELAY_MS=4000
-CONFIG_SCSI_MAC53C94=y
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-CONFIG_ADB=y
-CONFIG_ADB_CUDA=y
-CONFIG_ADB_PMU=y
-CONFIG_PMAC_PBOOK=y
-CONFIG_PMAC_APM_EMU=y
-CONFIG_PMAC_BACKLIGHT=y
-# CONFIG_MAC_FLOPPY is not set
-CONFIG_MAC_SERIAL=m
-CONFIG_ADB_MACIO=y
-CONFIG_INPUT_ADBHID=y
-CONFIG_MAC_EMUMOUSEBTN=y
-CONFIG_THERM_WINDTUNNEL=m
-CONFIG_THERM_ADT746X=m
-# CONFIG_ANSLCD is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-CONFIG_IP_NF_CONNTRACK=m
-CONFIG_IP_NF_FTP=m
-CONFIG_IP_NF_IRC=m
-CONFIG_IP_NF_TFTP=m
-CONFIG_IP_NF_AMANDA=m
-# CONFIG_IP_NF_QUEUE is not set
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_LIMIT=m
-CONFIG_IP_NF_MATCH_IPRANGE=m
-CONFIG_IP_NF_MATCH_MAC=m
-CONFIG_IP_NF_MATCH_PKTTYPE=m
-CONFIG_IP_NF_MATCH_MARK=m
-CONFIG_IP_NF_MATCH_MULTIPORT=m
-CONFIG_IP_NF_MATCH_TOS=m
-CONFIG_IP_NF_MATCH_RECENT=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_DSCP=m
-CONFIG_IP_NF_MATCH_AH_ESP=m
-CONFIG_IP_NF_MATCH_LENGTH=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_MATCH_TCPMSS=m
-CONFIG_IP_NF_MATCH_HELPER=m
-CONFIG_IP_NF_MATCH_STATE=m
-CONFIG_IP_NF_MATCH_CONNTRACK=m
-CONFIG_IP_NF_MATCH_OWNER=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_NAT=m
-CONFIG_IP_NF_NAT_NEEDED=y
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_SAME=m
-# CONFIG_IP_NF_NAT_LOCAL is not set
-CONFIG_IP_NF_NAT_SNMP_BASIC=m
-CONFIG_IP_NF_NAT_IRC=m
-CONFIG_IP_NF_NAT_FTP=m
-CONFIG_IP_NF_NAT_TFTP=m
-CONFIG_IP_NF_NAT_AMANDA=m
-# CONFIG_IP_NF_MANGLE is not set
-# CONFIG_IP_NF_TARGET_LOG is not set
-# CONFIG_IP_NF_TARGET_ULOG is not set
-CONFIG_IP_NF_TARGET_TCPMSS=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_IP_NF_COMPAT_IPCHAINS=m
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_IP_NF_TARGET_NOTRACK=m
-CONFIG_IP_NF_RAW=m
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_MACE=y
-# CONFIG_MACE_AAUI_PORT is not set
-CONFIG_BMAC=y
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-CONFIG_NET_PCI=y
-CONFIG_PCNET32=y
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_AC3200 is not set
-# CONFIG_APRICOT is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_CS89x0 is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-CONFIG_NET_RADIO=y
-
-#
-# Obsolete Wireless cards support (pre-802.11)
-#
-# CONFIG_STRIP is not set
-# CONFIG_ARLAN is not set
-# CONFIG_WAVELAN is not set
-
-#
-# Wireless 802.11b ISA/PCI cards support
-#
-# CONFIG_AIRO is not set
-CONFIG_HERMES=m
-CONFIG_APPLE_AIRPORT=m
-# CONFIG_PLX_HERMES is not set
-# CONFIG_TMD_HERMES is not set
-# CONFIG_PCI_HERMES is not set
-# CONFIG_ATMEL is not set
-
-#
-# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
-#
-# CONFIG_PRISM54 is not set
-CONFIG_NET_WIRELESS=y
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=y
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=y
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=y
-# CONFIG_PPP_BSDCOMP is not set
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-CONFIG_INPUT_MOUSE=y
-CONFIG_MOUSE_PS2=y
-# CONFIG_MOUSE_SERIAL is not set
-# CONFIG_MOUSE_INPORT is not set
-# CONFIG_MOUSE_LOGIBM is not set
-# CONFIG_MOUSE_PC110PAD is not set
-# CONFIG_MOUSE_VSXXXAA is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-# CONFIG_SERIAL_8250_CONSOLE is not set
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_PMACZILOG=y
-# CONFIG_SERIAL_PMACZILOG_CONSOLE is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_NVRAM=y
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=m
-
-#
-# I2C Algorithms
-#
-CONFIG_I2C_ALGOBIT=y
-# CONFIG_I2C_ALGOPCF is not set
-
-#
-# I2C Hardware Bus support
-#
-# CONFIG_I2C_ALI1535 is not set
-# CONFIG_I2C_ALI1563 is not set
-# CONFIG_I2C_ALI15X3 is not set
-# CONFIG_I2C_AMD756 is not set
-# CONFIG_I2C_AMD8111 is not set
-# CONFIG_I2C_ELEKTOR is not set
-CONFIG_I2C_HYDRA=y
-# CONFIG_I2C_I801 is not set
-# CONFIG_I2C_I810 is not set
-# CONFIG_I2C_ISA is not set
-CONFIG_I2C_KEYWEST=m
-# CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_PROSAVAGE is not set
-# CONFIG_I2C_SAVAGE4 is not set
-# CONFIG_SCx200_ACB is not set
-# CONFIG_I2C_SIS5595 is not set
-# CONFIG_I2C_SIS630 is not set
-# CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_VIA is not set
-# CONFIG_I2C_VIAPRO is not set
-# CONFIG_I2C_VOODOO3 is not set
-
-#
-# Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ASB100 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_FSCHER is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM90 is not set
-# CONFIG_SENSORS_VIA686A is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SENSORS_W83627HF is not set
-
-#
-# Other I2C Chip support
-#
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-CONFIG_FB=y
-# CONFIG_FB_PM2 is not set
-# CONFIG_FB_CYBER2000 is not set
-CONFIG_FB_OF=y
-CONFIG_FB_CONTROL=y
-CONFIG_FB_PLATINUM=y
-CONFIG_FB_VALKYRIE=y
-CONFIG_FB_CT65550=y
-CONFIG_FB_IMSTT=y
-# CONFIG_FB_S3TRIO is not set
-# CONFIG_FB_VGA16 is not set
-# CONFIG_FB_RIVA is not set
-CONFIG_FB_MATROX=y
-CONFIG_FB_MATROX_MILLENIUM=y
-CONFIG_FB_MATROX_MYSTIQUE=y
-# CONFIG_FB_MATROX_G450 is not set
-CONFIG_FB_MATROX_G100A=y
-CONFIG_FB_MATROX_G100=y
-CONFIG_FB_MATROX_I2C=y
-# CONFIG_FB_MATROX_MAVEN is not set
-# CONFIG_FB_MATROX_MULTIHEAD is not set
-# CONFIG_FB_RADEON_OLD is not set
-CONFIG_FB_RADEON=y
-CONFIG_FB_RADEON_I2C=y
-# CONFIG_FB_RADEON_DEBUG is not set
-CONFIG_FB_ATY128=y
-CONFIG_FB_ATY=y
-CONFIG_FB_ATY_CT=y
-CONFIG_FB_ATY_GX=y
-# CONFIG_FB_ATY_XL_INIT is not set
-# CONFIG_FB_SIS is not set
-# CONFIG_FB_NEOMAGIC is not set
-# CONFIG_FB_KYRO is not set
-CONFIG_FB_3DFX=y
-# CONFIG_FB_VOODOO1 is not set
-# CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_VIRTUAL is not set
-
-#
-# Console display driver support
-#
-CONFIG_VGA_CONSOLE=y
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_PCI_CONSOLE=y
-# CONFIG_FONTS is not set
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-
-#
-# Logo configuration
-#
-CONFIG_LOGO=y
-CONFIG_LOGO_LINUX_MONO=y
-CONFIG_LOGO_LINUX_VGA16=y
-CONFIG_LOGO_LINUX_CLUT224=y
-
-#
-# Sound
-#
-CONFIG_SOUND=m
-CONFIG_DMASOUND_PMAC=m
-CONFIG_DMASOUND=m
-
-#
-# Advanced Linux Sound Architecture
-#
-CONFIG_SND=m
-CONFIG_SND_TIMER=m
-CONFIG_SND_PCM=m
-CONFIG_SND_HWDEP=m
-CONFIG_SND_RAWMIDI=m
-CONFIG_SND_SEQUENCER=m
-CONFIG_SND_SEQ_DUMMY=m
-CONFIG_SND_OSSEMUL=y
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_SEQUENCER_OSS=y
-# CONFIG_SND_VERBOSE_PRINTK is not set
-# CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
-CONFIG_SND_MPU401_UART=m
-CONFIG_SND_OPL3_LIB=m
-# CONFIG_SND_DUMMY is not set
-# CONFIG_SND_VIRMIDI is not set
-# CONFIG_SND_MTPAV is not set
-# CONFIG_SND_SERIAL_U16550 is not set
-# CONFIG_SND_MPU401 is not set
-
-#
-# ISA devices
-#
-# CONFIG_SND_AD1848 is not set
-# CONFIG_SND_CS4231 is not set
-CONFIG_SND_CS4232=m
-# CONFIG_SND_CS4236 is not set
-# CONFIG_SND_ES1688 is not set
-# CONFIG_SND_ES18XX is not set
-# CONFIG_SND_GUSCLASSIC is not set
-# CONFIG_SND_GUSEXTREME is not set
-# CONFIG_SND_GUSMAX is not set
-# CONFIG_SND_INTERWAVE is not set
-# CONFIG_SND_INTERWAVE_STB is not set
-# CONFIG_SND_OPTI92X_AD1848 is not set
-# CONFIG_SND_OPTI92X_CS4231 is not set
-# CONFIG_SND_OPTI93X is not set
-# CONFIG_SND_SB8 is not set
-# CONFIG_SND_SB16 is not set
-# CONFIG_SND_SBAWE is not set
-# CONFIG_SND_WAVEFRONT is not set
-# CONFIG_SND_CMI8330 is not set
-# CONFIG_SND_OPL3SA2 is not set
-# CONFIG_SND_SGALAXY is not set
-# CONFIG_SND_SSCAPE is not set
-
-#
-# PCI devices
-#
-# CONFIG_SND_ALI5451 is not set
-# CONFIG_SND_ATIIXP is not set
-# CONFIG_SND_AU8810 is not set
-# CONFIG_SND_AU8820 is not set
-# CONFIG_SND_AU8830 is not set
-# CONFIG_SND_AZT3328 is not set
-# CONFIG_SND_BT87X is not set
-# CONFIG_SND_CS46XX is not set
-# CONFIG_SND_CS4281 is not set
-# CONFIG_SND_EMU10K1 is not set
-# CONFIG_SND_KORG1212 is not set
-# CONFIG_SND_MIXART is not set
-# CONFIG_SND_NM256 is not set
-# CONFIG_SND_RME32 is not set
-# CONFIG_SND_RME96 is not set
-# CONFIG_SND_RME9652 is not set
-# CONFIG_SND_HDSP is not set
-# CONFIG_SND_TRIDENT is not set
-# CONFIG_SND_YMFPCI is not set
-# CONFIG_SND_ALS4000 is not set
-# CONFIG_SND_CMIPCI is not set
-# CONFIG_SND_ENS1370 is not set
-# CONFIG_SND_ENS1371 is not set
-# CONFIG_SND_ES1938 is not set
-# CONFIG_SND_ES1968 is not set
-# CONFIG_SND_MAESTRO3 is not set
-# CONFIG_SND_FM801 is not set
-# CONFIG_SND_ICE1712 is not set
-# CONFIG_SND_ICE1724 is not set
-# CONFIG_SND_INTEL8X0 is not set
-# CONFIG_SND_INTEL8X0M is not set
-# CONFIG_SND_SONICVIBES is not set
-# CONFIG_SND_VIA82XX is not set
-# CONFIG_SND_VX222 is not set
-
-#
-# ALSA PowerMac devices
-#
-CONFIG_SND_POWERMAC=m
-
-#
-# ALSA USB devices
-#
-CONFIG_SND_USB_AUDIO=m
-
-#
-# Open Sound System
-#
-# CONFIG_SOUND_PRIME is not set
-
-#
-# USB support
-#
-CONFIG_USB=y
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-# CONFIG_USB_DYNAMIC_MINORS is not set
-
-#
-# USB Host Controller Drivers
-#
-# CONFIG_USB_EHCI_HCD is not set
-CONFIG_USB_OHCI_HCD=y
-# CONFIG_USB_UHCI_HCD is not set
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_BLUETOOTH_TTY is not set
-# CONFIG_USB_MIDI is not set
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-CONFIG_USB_STORAGE=m
-# CONFIG_USB_STORAGE_DEBUG is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-CONFIG_USB_STORAGE_FREECOM=y
-# CONFIG_USB_STORAGE_ISD200 is not set
-CONFIG_USB_STORAGE_DPCM=y
-# CONFIG_USB_STORAGE_HP8200e is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_STORAGE_SDDR55 is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-CONFIG_USB_HID=y
-CONFIG_USB_HIDINPUT=y
-# CONFIG_HID_FF is not set
-# CONFIG_USB_HIDDEV is not set
-# CONFIG_USB_AIPTEK is not set
-# CONFIG_USB_WACOM is not set
-# CONFIG_USB_KBTAB is not set
-# CONFIG_USB_POWERMATE is not set
-# CONFIG_USB_MTOUCH is not set
-# CONFIG_USB_XPAD is not set
-# CONFIG_USB_ATI_REMOTE is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_HPUSBSCSI is not set
-
-#
-# USB Multimedia devices
-#
-# CONFIG_USB_DABUSB is not set
-
-#
-# Video4Linux support is needed for USB Multimedia device support
-#
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET is not set
-
-#
-# USB port drivers
-#
-
-#
-# USB Serial Converter support
-#
-CONFIG_USB_SERIAL=m
-# CONFIG_USB_SERIAL_GENERIC is not set
-# CONFIG_USB_SERIAL_BELKIN is not set
-# CONFIG_USB_SERIAL_WHITEHEAT is not set
-# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_EMPEG is not set
-# CONFIG_USB_SERIAL_FTDI_SIO is not set
-CONFIG_USB_SERIAL_VISOR=m
-# CONFIG_USB_SERIAL_IPAQ is not set
-# CONFIG_USB_SERIAL_IR is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-CONFIG_USB_SERIAL_KEYSPAN=m
-# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set
-CONFIG_USB_SERIAL_KEYSPAN_USA28=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
-# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
-CONFIG_USB_SERIAL_KEYSPAN_USA19=y
-CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
-# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set
-# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set
-CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
-# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set
-# CONFIG_USB_SERIAL_KLSI is not set
-# CONFIG_USB_SERIAL_KOBIL_SCT is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_PL2303 is not set
-# CONFIG_USB_SERIAL_SAFE is not set
-# CONFIG_USB_SERIAL_CYBERJACK is not set
-# CONFIG_USB_SERIAL_XIRCOM is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
-CONFIG_USB_EZUSB=y
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_EMI62 is not set
-# CONFIG_USB_EMI26 is not set
-# CONFIG_USB_TIGL is not set
-# CONFIG_USB_AUERSWALD is not set
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_LEGOTOWER is not set
-# CONFIG_USB_LCD is not set
-# CONFIG_USB_LED is not set
-# CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_TEST is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-CONFIG_DEVFS_FS=y
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-CONFIG_HFS_FS=m
-CONFIG_HFSPLUS_FS=m
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-# CONFIG_NFSD_V4 is not set
-CONFIG_NFSD_TCP=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-CONFIG_MAC_PARTITION=y
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Native Language Support
-#
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-CONFIG_NLS_ISO8859_1=m
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_BOOTX_TEXT=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
+++ /dev/null
-/*
- * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
- *
- *
- * Dynamic DMA mapping support.
- *
- * swiped from i386
- *
- */
-
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/string.h>
-#include <linux/pci.h>
-#include <asm/io.h>
-
-void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
- dma_addr_t *dma_handle)
-{
- void *ret;
- int gfp = GFP_ATOMIC;
-
- if (hwdev == NULL || hwdev->dma_mask != 0xffffffff)
- gfp |= GFP_DMA;
-
-#ifdef CONFIG_NOT_COHERENT_CACHE
- ret = consistent_alloc(gfp, size, dma_handle);
-#else
- ret = (void *)__get_free_pages(gfp, get_order(size));
-#endif
-
- if (ret != NULL) {
- memset(ret, 0, size);
-#ifndef CONFIG_NOT_COHERENT_CACHE
- *dma_handle = virt_to_bus(ret);
-#endif
- }
- return ret;
-}
-
-void pci_free_consistent(struct pci_dev *hwdev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
-{
-#ifdef CONFIG_NOT_COHERENT_CACHE
- consistent_free(vaddr);
-#else
- free_pages((unsigned long)vaddr, get_order(size));
-#endif
-}
+++ /dev/null
-/*
- * PowerPC version derived from arch/arm/mm/consistent.c
- * Copyright (C) 2001 Dan Malek (dmalek@jlc.net)
- *
- * arch/ppc/mm/cachemap.c
- *
- * Copyright (C) 2000 Russell King
- *
- * Consistent memory allocators. Used for DMA devices that want to
- * share uncached memory with the processor core. The function return
- * is the virtual address and 'dma_handle' is the physical address.
- * Mostly stolen from the ARM port, with some changes for PowerPC.
- * -- Dan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/stddef.h>
-#include <linux/vmalloc.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/bootmem.h>
-#include <linux/highmem.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/pgalloc.h>
-#include <asm/prom.h>
-#include <asm/io.h>
-#include <asm/hardirq.h>
-#include <asm/mmu_context.h>
-#include <asm/pgtable.h>
-#include <asm/mmu.h>
-#include <asm/uaccess.h>
-#include <asm/smp.h>
-#include <asm/machdep.h>
-
-int map_page(unsigned long va, phys_addr_t pa, int flags);
-
-/* This function will allocate the requested contiguous pages and
- * map them into the kernel's vmalloc() space. This is done so we
- * get unique mapping for these pages, outside of the kernel's 1:1
- * virtual:physical mapping. This is necessary so we can cover large
- * portions of the kernel with single large page TLB entries, and
- * still get unique uncached pages for consistent DMA.
- */
-void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle)
-{
- int order, err;
- struct page *page, *free, *end;
- phys_addr_t pa;
- unsigned long flags, offset;
- struct vm_struct *area = NULL;
- unsigned long va = 0;
-
- BUG_ON(in_interrupt());
-
- /* Only allocate page size areas */
- size = PAGE_ALIGN(size);
- order = get_order(size);
-
- free = page = alloc_pages(gfp, order);
- if (! page)
- return NULL;
-
- pa = page_to_phys(page);
- *dma_handle = page_to_bus(page);
- end = page + (1 << order);
-
- /*
- * we need to ensure that there are no cachelines in use,
- * or worse dirty in this area.
- */
- invalidate_dcache_range((unsigned long)page_address(page),
- (unsigned long)page_address(page) + size);
-
- /*
- * alloc_pages() expects the block to be handled as a unit, so
- * it only sets the page count on the first page. We set the
- * counts on each page so they can be freed individually
- */
- for (; page < end; page++)
- set_page_count(page, 1);
-
-
- /* Allocate some common virtual space to map the new pages*/
- area = get_vm_area(size, VM_ALLOC);
- if (! area)
- goto out;
-
- va = (unsigned long) area->addr;
-
- flags = _PAGE_KERNEL | _PAGE_NO_CACHE;
-
- for (offset = 0; offset < size; offset += PAGE_SIZE) {
- err = map_page(va+offset, pa+offset, flags);
- if (err) {
- vfree((void *)va);
- va = 0;
- goto out;
- }
-
- free++;
- }
-
- out:
- /* Free pages which weren't mapped */
- for (; free < end; free++) {
- __free_page(free);
- }
-
- return (void *)va;
-}
-
-/*
- * free page(s) as defined by the above mapping.
- */
-void consistent_free(void *vaddr)
-{
- BUG_ON(in_interrupt());
- vfree(vaddr);
-}
-
-/*
- * make an area consistent.
- */
-void consistent_sync(void *vaddr, size_t size, int direction)
-{
- unsigned long start = (unsigned long)vaddr;
- unsigned long end = start + size;
-
- switch (direction) {
- case DMA_NONE:
- BUG();
- case DMA_FROM_DEVICE: /* invalidate only */
- invalidate_dcache_range(start, end);
- break;
- case DMA_TO_DEVICE: /* writeback only */
- clean_dcache_range(start, end);
- break;
- case DMA_BIDIRECTIONAL: /* writeback and invalidate */
- flush_dcache_range(start, end);
- break;
- }
-}
-
-/*
- * consistent_sync_page make a page are consistent. identical
- * to consistent_sync, but takes a struct page instead of a virtual address
- */
-
-void consistent_sync_page(struct page *page, unsigned long offset,
- size_t size, int direction)
-{
- unsigned long start;
-
- start = (unsigned long)page_address(page) + offset;
- consistent_sync((void *)start, size, direction);
-}
-
-EXPORT_SYMBOL(consistent_sync_page);
+++ /dev/null
-#
-# Makefile for the linux kernel.
-#
-
-obj-y := ocp.o ocp-driver.o ocp-probe.o
-
+++ /dev/null
-/*
- * FILE NAME: ocp-driver.c
- *
- * BRIEF MODULE DESCRIPTION:
- * driver callback, id matching and registration
- * Based on drivers/pci/pci-driver, Copyright (c) 1997--1999 Martin Mares
- *
- * Maintained by: Armin <akuster@mvista.com>
- *
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <asm/ocp.h>
-#include <linux/module.h>
-#include <linux/init.h>
-
-/*
- * Registration of OCP drivers and handling of hot-pluggable devices.
- */
-
-static int
-ocp_device_probe(struct device *dev)
-{
- int error = 0;
- struct ocp_driver *drv;
- struct ocp_device *ocp_dev;
-
- drv = to_ocp_driver(dev->driver);
- ocp_dev = to_ocp_dev(dev);
-
- if (drv->probe) {
- error = drv->probe(ocp_dev);
- DBG("probe return code %d\n", error);
- if (error >= 0) {
- ocp_dev->driver = drv;
- error = 0;
- }
- }
- return error;
-}
-
-static int
-ocp_device_remove(struct device *dev)
-{
- struct ocp_device *ocp_dev = to_ocp_dev(dev);
-
- if (ocp_dev->driver) {
- if (ocp_dev->driver->remove)
- ocp_dev->driver->remove(ocp_dev);
- ocp_dev->driver = NULL;
- }
- return 0;
-}
-
-static int
-ocp_device_suspend(struct device *dev, u32 state, u32 level)
-{
- struct ocp_device *ocp_dev = to_ocp_dev(dev);
-
- int error = 0;
-
- if (ocp_dev->driver) {
- if (level == SUSPEND_SAVE_STATE && ocp_dev->driver->save_state)
- error = ocp_dev->driver->save_state(ocp_dev, state);
- else if (level == SUSPEND_POWER_DOWN
- && ocp_dev->driver->suspend)
- error = ocp_dev->driver->suspend(ocp_dev, state);
- }
- return error;
-}
-
-static int
-ocp_device_resume(struct device *dev, u32 level)
-{
- struct ocp_device *ocp_dev = to_ocp_dev(dev);
-
- if (ocp_dev->driver) {
- if (level == RESUME_POWER_ON && ocp_dev->driver->resume)
- ocp_dev->driver->resume(ocp_dev);
- }
- return 0;
-}
-
-/**
- * ocp_bus_match - Works out whether an OCP device matches any
- * of the IDs listed for a given OCP driver.
- * @dev: the generic device struct for the OCP device
- * @drv: the generic driver struct for the OCP driver
- *
- * Used by a driver to check whether a OCP device present in the
- * system is in its list of supported devices. Returns 1 for a
- * match, or 0 if there is no match.
- */
-static int
-ocp_bus_match(struct device *dev, struct device_driver *drv)
-{
- struct ocp_device *ocp_dev = to_ocp_dev(dev);
- struct ocp_driver *ocp_drv = to_ocp_driver(drv);
- const struct ocp_device_id *ids = ocp_drv->id_table;
-
- if (!ids)
- return 0;
-
- while (ids->vendor || ids->device) {
- if ((ids->vendor == OCP_ANY_ID
- || ids->vendor == ocp_dev->vendor)
- && (ids->device == OCP_ANY_ID
- || ids->device == ocp_dev->device)) {
- DBG("Bus match -vendor:%x device:%x\n", ids->vendor,
- ids->device);
- return 1;
- }
- ids++;
- }
- return 0;
-}
-
-struct bus_type ocp_bus_type = {
- .name = "ocp",
- .match = ocp_bus_match,
-};
-
-static int __init
-ocp_driver_init(void)
-{
- return bus_register(&ocp_bus_type);
-}
-
-postcore_initcall(ocp_driver_init);
-
-/**
- * ocp_register_driver - register a new ocp driver
- * @drv: the driver structure to register
- *
- * Adds the driver structure to the list of registered drivers
- * Returns the number of ocp devices which were claimed by the driver
- * during registration. The driver remains registered even if the
- * return value is zero.
- */
-int
-ocp_register_driver(struct ocp_driver *drv)
-{
- int count = 0;
-
- /* initialize common driver fields */
- drv->driver.name = drv->name;
- drv->driver.bus = &ocp_bus_type;
- drv->driver.probe = ocp_device_probe;
- drv->driver.resume = ocp_device_resume;
- drv->driver.suspend = ocp_device_suspend;
- drv->driver.remove = ocp_device_remove;
-
- /* register with core */
- count = driver_register(&drv->driver);
- return count ? count : 1;
-}
-
-/**
- * ocp_unregister_driver - unregister a ocp driver
- * @drv: the driver structure to unregister
- *
- * Deletes the driver structure from the list of registered OCP drivers,
- * gives it a chance to clean up by calling its remove() function for
- * each device it was responsible for, and marks those devices as
- * driverless.
- */
-
-void
-ocp_unregister_driver(struct ocp_driver *drv)
-{
- driver_unregister(&drv->driver);
-}
-
-EXPORT_SYMBOL(ocp_register_driver);
-EXPORT_SYMBOL(ocp_unregister_driver);
-EXPORT_SYMBOL(ocp_bus_type);
+++ /dev/null
-/*
- * FILE NAME: ocp-probe.c
- *
- * BRIEF MODULE DESCRIPTION:
- * Device scanning & bus set routines
- * Based on drivers/pci/probe, Copyright (c) 1997--1999 Martin Mares
- *
- * Maintained by: Armin <akuster@mvista.com>
- *
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <asm/ocp.h>
-
-LIST_HEAD(ocp_devices);
-struct device *ocp_bus;
-
-static struct ocp_device * __devinit
-ocp_setup_dev(struct ocp_def *odef, unsigned int index)
-{
- struct ocp_device *dev;
-
- dev = kmalloc(sizeof(*dev), GFP_KERNEL);
- if (!dev)
- return NULL;
- memset(dev, 0, sizeof(*dev));
-
- dev->vendor = odef->vendor;
- dev->device = odef->device;
- dev->num = ocp_get_num(dev->device);
- dev->paddr = odef->paddr;
- dev->irq = odef->irq;
- dev->pm = odef->pm;
- dev->current_state = 4;
-
- sprintf(dev->name, "OCP device %04x:%04x", dev->vendor, dev->device);
-
- DBG("%s %s 0x%lx irq:%d pm:0x%lx \n", dev->slot_name, dev->name,
- (unsigned long) dev->paddr, dev->irq, dev->pm);
-
- /* now put in global tree */
- sprintf(dev->dev.bus_id, "%d", index);
- dev->dev.parent = ocp_bus;
- dev->dev.bus = &ocp_bus_type;
- device_register(&dev->dev);
-
- return dev;
-}
-
-static struct device * __devinit ocp_alloc_primary_bus(void)
-{
- struct device *b;
-
- b = kmalloc(sizeof(struct device), GFP_KERNEL);
- if (b == NULL)
- return NULL;
- memset(b, 0, sizeof(struct device));
- strcpy(b->bus_id, "ocp");
-
- device_register(b);
-
- return b;
-}
-
-void __devinit ocp_setup_devices(struct ocp_def *odef)
-{
- int index;
- struct ocp_device *dev;
-
- if (ocp_bus == NULL)
- ocp_bus = ocp_alloc_primary_bus();
- for (index = 0; odef->vendor != OCP_VENDOR_INVALID; ++index, ++odef) {
- dev = ocp_setup_dev(odef, index);
- if (dev != NULL)
- list_add_tail(&dev->global_list, &ocp_devices);
- }
-}
-
-extern struct ocp_def core_ocp[];
-
-static int __init
-ocparch_init(void)
-{
- ocp_setup_devices(core_ocp);
- return 0;
-}
-
-subsys_initcall(ocparch_init);
-
-EXPORT_SYMBOL(ocp_devices);
+++ /dev/null
-/*
- * ocp.c
- *
- * The is drived from pci.c
- *
- * Current Maintainer
- * Armin Kuster akuster@dslextreme.com
- * Jan, 2002
- *
- *
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/list.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/config.h>
-#include <linux/stddef.h>
-#include <linux/slab.h>
-#include <linux/types.h>
-#include <asm/io.h>
-#include <asm/ocp.h>
-#include <asm/errno.h>
-
-/**
- * ocp_get_num - This determines how many OCP devices of a given
- * device are registered
- * @device: OCP device such as HOST, PCI, GPT, UART, OPB, IIC, GPIO, EMAC, ZMII,
- *
- * The routine returns the number that devices which is registered
- */
-unsigned int ocp_get_num(unsigned int device)
-{
- unsigned int count = 0;
- struct ocp_device *ocp;
- struct list_head *ocp_l;
-
- list_for_each(ocp_l, &ocp_devices) {
- ocp = list_entry(ocp_l, struct ocp_device, global_list);
- if (device == ocp->device)
- count++;
- }
- return count;
-}
-
-/**
- * ocp_get_dev - get ocp driver pointer for ocp device and instance of it
- * @device: OCP device such as PCI, GPT, UART, OPB, IIC, GPIO, EMAC, ZMII
- * @dev_num: ocp device number whos paddr you want
- *
- * The routine returns ocp device pointer
- * in list based on device and instance of that device
- *
- */
-struct ocp_device *
-ocp_get_dev(unsigned int device, int dev_num)
-{
- struct ocp_device *ocp;
- struct list_head *ocp_l;
- int count = 0;
-
- list_for_each(ocp_l, &ocp_devices) {
- ocp = list_entry(ocp_l, struct ocp_device, global_list);
- if (device == ocp->device) {
- if (dev_num == count)
- return ocp;
- count++;
- }
- }
- return NULL;
-}
-
-EXPORT_SYMBOL(ocp_get_dev);
-EXPORT_SYMBOL(ocp_get_num);
-
-#ifdef CONFIG_PM
-int ocp_generic_suspend(struct ocp_device *pdev, u32 state)
-{
- ocp_force_power_off(pdev);
- return 0;
-}
-
-int ocp_generic_resume(struct ocp_device *pdev)
-{
- ocp_force_power_on(pdev);
-}
-
-EXPORT_SYMBOL(ocp_generic_suspend);
-EXPORT_SYMBOL(ocp_generic_resume);
-#endif /* CONFIG_PM */
+++ /dev/null
-/**
- * @file init.c
- *
- * @remark Copyright 2002 OProfile authors
- * @remark Read the file COPYING
- *
- * @author John Levon <levon@movementarian.org>
- */
-
-#include <linux/kernel.h>
-#include <linux/oprofile.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-
-int __init oprofile_arch_init(struct oprofile_operations ** ops)
-{
- return -ENODEV;
-}
-
-
-void oprofile_arch_exit(void)
-{
-}
+++ /dev/null
-/*
- * arch/ppc/platforms/85xx/mpc8540.c
- *
- * MPC8540 I/O descriptions
- *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <asm/mpc85xx.h>
-#include <asm/ocp.h>
-
-/* These should be defined in platform code */
-extern struct ocp_gfar_data mpc85xx_tsec1_def;
-extern struct ocp_gfar_data mpc85xx_tsec2_def;
-extern struct ocp_gfar_data mpc85xx_fec_def;
-extern struct ocp_mpc_i2c_data mpc85xx_i2c1_def;
-
-/* We use offsets for paddr since we do not know at compile time
- * what CCSRBAR is, platform code should fix this up in
- * setup_arch
- *
- * Only the first IRQ is given even if a device has
- * multiple lines associated with ita
- */
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_IIC,
- .index = 0,
- .paddr = MPC85xx_IIC1_OFFSET,
- .irq = MPC85xx_IRQ_IIC1,
- .pm = OCP_CPM_NA,
- .additions = &mpc85xx_i2c1_def,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = MPC85xx_UART0_OFFSET,
- .irq = MPC85xx_IRQ_DUART,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = MPC85xx_UART1_OFFSET,
- .irq = MPC85xx_IRQ_DUART,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_GFAR,
- .index = 0,
- .paddr = MPC85xx_ENET1_OFFSET,
- .irq = MPC85xx_IRQ_TSEC1_TX,
- .pm = OCP_CPM_NA,
- .additions = &mpc85xx_tsec1_def,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_GFAR,
- .index = 1,
- .paddr = MPC85xx_ENET2_OFFSET,
- .irq = MPC85xx_IRQ_TSEC2_TX,
- .pm = OCP_CPM_NA,
- .additions = &mpc85xx_tsec2_def,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_GFAR,
- .index = 2,
- .paddr = MPC85xx_ENET3_OFFSET,
- .irq = MPC85xx_IRQ_FEC,
- .pm = OCP_CPM_NA,
- .additions = &mpc85xx_fec_def,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_DMA,
- .index = 0,
- .paddr = MPC85xx_DMA_OFFSET,
- .irq = MPC85xx_IRQ_DMA0,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_PERFMON,
- .index = 0,
- .paddr = MPC85xx_PERFMON_OFFSET,
- .irq = MPC85xx_IRQ_PERFMON,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
+++ /dev/null
-/*
- * arch/ppc/platform/85xx/mpc8555.c
- *
- * MPC8555 I/O descriptions
- *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <asm/mpc85xx.h>
-#include <asm/ocp.h>
-
-/* These should be defined in platform code */
-extern struct ocp_gfar_data mpc85xx_tsec1_def;
-extern struct ocp_gfar_data mpc85xx_tsec2_def;
-extern struct ocp_mpc_i2c_data mpc85xx_i2c1_def;
-
-/* We use offsets for paddr since we do not know at compile time
- * what CCSRBAR is, platform code should fix this up in
- * setup_arch
- *
- * Only the first IRQ is given even if a device has
- * multiple lines associated with ita
- */
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_IIC,
- .index = 0,
- .paddr = MPC85xx_IIC1_OFFSET,
- .irq = MPC85xx_IRQ_IIC1,
- .pm = OCP_CPM_NA,
- .additions = &mpc85xx_i2c1_def,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = MPC85xx_UART0_OFFSET,
- .irq = MPC85xx_IRQ_DUART,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = MPC85xx_UART1_OFFSET,
- .irq = MPC85xx_IRQ_DUART,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_GFAR,
- .index = 0,
- .paddr = MPC85xx_ENET1_OFFSET,
- .irq = MPC85xx_IRQ_TSEC1_TX,
- .pm = OCP_CPM_NA,
- .additions = &mpc85xx_tsec1_def,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_GFAR,
- .index = 1,
- .paddr = MPC85xx_ENET2_OFFSET,
- .irq = MPC85xx_IRQ_TSEC2_TX,
- .pm = OCP_CPM_NA,
- .additions = &mpc85xx_tsec2_def,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_DMA,
- .index = 0,
- .paddr = MPC85xx_DMA_OFFSET,
- .irq = MPC85xx_IRQ_DMA0,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_SEC2,
- .index = 0,
- .paddr = MPC85xx_SEC2_OFFSET,
- .irq = MPC85xx_IRQ_SEC2,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_PERFMON,
- .index = 0,
- .paddr = MPC85xx_PERFMON_OFFSET,
- .irq = MPC85xx_IRQ_PERFMON,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
+++ /dev/null
-/*
- * arch/ppc/platforms/85xx/mpc8560.c
- *
- * MPC8560 I/O descriptions
- *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <asm/mpc85xx.h>
-#include <asm/ocp.h>
-
-/* These should be defined in platform code */
-extern struct ocp_gfar_data mpc85xx_tsec1_def;
-extern struct ocp_gfar_data mpc85xx_tsec2_def;
-extern struct ocp_mpc_i2c_data mpc85xx_i2c1_def;
-
-/* We use offsets for paddr since we do not know at compile time
- * what CCSRBAR is, platform code should fix this up in
- * setup_arch
- *
- * Only the first IRQ is given even if a device has
- * multiple lines associated with ita
- */
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_IIC,
- .index = 0,
- .paddr = MPC85xx_IIC1_OFFSET,
- .irq = MPC85xx_IRQ_IIC1,
- .pm = OCP_CPM_NA,
- .additions = &mpc85xx_i2c1_def,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_GFAR,
- .index = 0,
- .paddr = MPC85xx_ENET1_OFFSET,
- .irq = MPC85xx_IRQ_TSEC1_TX,
- .pm = OCP_CPM_NA,
- .additions = &mpc85xx_tsec1_def,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_GFAR,
- .index = 1,
- .paddr = MPC85xx_ENET2_OFFSET,
- .irq = MPC85xx_IRQ_TSEC2_TX,
- .pm = OCP_CPM_NA,
- .additions = &mpc85xx_tsec2_def,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_DMA,
- .index = 0,
- .paddr = MPC85xx_DMA_OFFSET,
- .irq = MPC85xx_IRQ_DMA0,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_PERFMON,
- .index = 0,
- .paddr = MPC85xx_PERFMON_OFFSET,
- .irq = MPC85xx_IRQ_PERFMON,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
+++ /dev/null
-/*
- * arch/ppc/kernel/error_log.c
- *
- * Copyright (c) 2000 Tilmann Bitterberg
- * (tilmann@bitterberg.de)
- *
- * Error processing of errors found by rtas even-scan routine
- * which is done with every heartbeat. (chrp_setup.c)
- */
-
-#include <linux/sched.h>
-
-#include <asm/prom.h>
-
-#include "error_log.h"
-
-/* ****************************************************************** */
-/*
- * EVENT-SCAN
- * The whole stuff below here doesn't take any action when it found
- * an error, it just prints as much information as possible and
- * then its up to the user to decide what to do.
- *
- * Returns 0 if no errors were found
- * Returns 1 if there may be more errors
- */
-int ppc_rtas_errorlog_scan(void)
-{
-const char *_errlog_severity[] = {
-#ifdef VERBOSE_ERRORS
- "No Error\n\t\
-Should require no further information",
- "Event\n\t\
-This is not really an error, it is an event. I use events\n\t\
-to communicate with RTAS back and forth.",
- "Warning\n\t\
-Indicates a non-state-losing error, either fully recovered\n\t\
-by RTAS or not needing recovery. Ignore it.",
- "Error sync\n\t\
-May only be fatal to a certain program or thread. Recovery\n\t\
-and continuation is possible, if I only had a handler for\n\t\
-this. Less serious",
- "Error\n\t\
-Less serious, but still causing a loss of data and state.\n\t\
-I can't tell you exactly what to do, You have to decide\n\t\
-with help from the target and initiator field, what kind\n\t\
-of further actions may take place.",
- "Fatal\n\t\
-Represent a permanent hardware failure and I believe this\n\t\
-affects my overall performance and behaviour. I would not\n\t\
-attempt to continue normal operation."
-#else
- "No Error",
- "Event",
- "Warning",
- "Error sync",
- "Error",
- "Fatal"
-#endif /* VERBOSE_ERRORS */
-};
-
-#if 0 /* unused?? */
-const char *_errlog_disposition[] = {
-#ifdef VERBOSE_ERRORS
- "Fully recovered\n\t\
-There was an error, but it is fully recovered by RTAS.",
- "Limited recovery\n\t\
-RTAS was able to recover the state of the machine, but some\n\t\
-feature of the machine has been disabled or lost (for example\n\t\
-error checking) or performance may suffer.",
- "Not recovered\n\t\
-Whether RTAS did not try to recover anything or recovery failed:\n\t\
-HOUSTON, WE HAVE A PROBLEM!"
-#else
- "Fully recovered",
- "Limited recovery",
- "Not recovered"
-#endif /* VERBOSE_ERRORS */
-};
-#endif
-
-const char *_errlog_extended[] = {
-#ifdef VERBOSE_ERRORS
- "Not present\n\t\
-Sad, the RTAS call didn't return an extended error log.",
- "Present\n\t\
-The extended log is present and hopefully it contains a lot of\n\t\
-useful information, which leads to the solution of the problem."
-#else
- "Not present",
- "Present"
-#endif /* VERBOSE_ERRORS */
-};
-
-const char *_errlog_initiator[] = {
- "Unknown or not applicable",
- "CPU",
- "PCI",
- "ISA",
- "Memory",
- "Power management"
-};
-
-const char *_errlog_target[] = {
- "Unknown or not applicable",
- "CPU",
- "PCI",
- "ISA",
- "Memory",
- "Power management"
-};
- rtas_error_log error_log;
- char logdata[1024];
- int error;
-#if 0 /* unused?? */
- int retries = 0; /* if HW error, try 10 times */
-#endif
-
- error = call_rtas ("event-scan", 4, 1, (unsigned long *)&error_log,
- INTERNAL_ERROR | EPOW_WARNING,
- 0, __pa(logdata), 1024);
-
- if (error == 1) /* no errors found */
- return 0;
-
- if (error == -1) {
- printk(KERN_ERR "Unable to get errors. Do you a favor and throw this box away\n");
- return 0;
- }
- if (error_log.version != 1)
- printk(KERN_WARNING "Unknown version (%d), please implement me\n",
- error_log.version);
-
- switch (error_log.disposition) {
- case DISP_FULLY_RECOVERED:
- /* there was an error, but everything is fine now */
- return 0;
- case DISP_NOT_RECOVERED:
- printk("We have a really serious Problem!\n");
- case DISP_LIMITED_RECOVERY:
- printk("Error classification\n");
- printk("Severity : %s\n",
- ppc_rtas_errorlog_check_severity (error_log));
- printk("Initiator : %s\n",
- ppc_rtas_errorlog_check_initiator (error_log));
- printk("Target : %s\n",
- ppc_rtas_errorlog_check_target (error_log));
- printk("Type : %s\n",
- ppc_rtas_errorlog_check_type (error_log));
- printk("Ext. log : %s\n",
- ppc_rtas_errorlog_check_extended (error_log));
- if (error_log.extended)
- ppc_rtas_errorlog_disect_extended (logdata);
- return 1;
- default:
- /* nothing */
- break;
- }
- return 0;
-}
-/* ****************************************************************** */
-const char * ppc_rtas_errorlog_check_type (rtas_error_log error_log)
-{
- const char *_errlog_type[] = {
- "unknown type",
- "too many tries failed",
- "TCE error",
- "RTAS device failed",
- "target timed out",
- "parity error on data", /* 5 */
- "parity error on address",
- "parity error on external cache",
- "access to invalid address",
- "uncorrectable ECC error",
- "corrected ECC error" /* 10 */
- };
- if (error_log.type == TYPE_EPOW)
- return "EPOW";
- if (error_log.type >= TYPE_PMGM_POWER_SW_ON)
- return "PowerMGM Event (not handled right now)";
- return _errlog_type[error_log.type];
-}
-
+++ /dev/null
-#ifndef __ERROR_LOG_H__
-#define __ERROR_LOG_H__
-
-#define VERBOSE_ERRORS 1 /* Maybe I enlarge the kernel too much */
-#undef VERBOSE_ERRORS
-
-/* Event classes */
-/* XXX: Endianess correct? NOW*/
-#define INTERNAL_ERROR 0x80000000 /* set bit 0 */
-#define EPOW_WARNING 0x40000000 /* set bit 1 */
-#define POWERMGM_EVENTS 0x20000000 /* set bit 2 */
-
-/* event-scan returns */
-#define SEVERITY_FATAL 0x5
-#define SEVERITY_ERROR 0x4
-#define SEVERITY_ERROR_SYNC 0x3
-#define SEVERITY_WARNING 0x2
-#define SEVERITY_EVENT 0x1
-#define SEVERITY_NO_ERROR 0x0
-#define DISP_FULLY_RECOVERED 0x0
-#define DISP_LIMITED_RECOVERY 0x1
-#define DISP_NOT_RECOVERED 0x2
-#define PART_PRESENT 0x0
-#define PART_NOT_PRESENT 0x1
-#define INITIATOR_UNKNOWN 0x0
-#define INITIATOR_CPU 0x1
-#define INITIATOR_PCI 0x2
-#define INITIATOR_ISA 0x3
-#define INITIATOR_MEMORY 0x4
-#define INITIATOR_POWERMGM 0x5
-#define TARGET_UNKNOWN 0x0
-#define TARGET_CPU 0x1
-#define TARGET_PCI 0x2
-#define TARGET_ISA 0x3
-#define TARGET_MEMORY 0x4
-#define TARGET_POWERMGM 0x5
-#define TYPE_RETRY 0x01
-#define TYPE_TCE_ERR 0x02
-#define TYPE_INTERN_DEV_FAIL 0x03
-#define TYPE_TIMEOUT 0x04
-#define TYPE_DATA_PARITY 0x05
-#define TYPE_ADDR_PARITY 0x06
-#define TYPE_CACHE_PARITY 0x07
-#define TYPE_ADDR_INVALID 0x08
-#define TYPE_ECC_UNCORR 0x09
-#define TYPE_ECC_CORR 0x0a
-#define TYPE_EPOW 0x40
-/* I don't add PowerMGM events right now, this is a different topic */
-#define TYPE_PMGM_POWER_SW_ON 0x60
-#define TYPE_PMGM_POWER_SW_OFF 0x61
-#define TYPE_PMGM_LID_OPEN 0x62
-#define TYPE_PMGM_LID_CLOSE 0x63
-#define TYPE_PMGM_SLEEP_BTN 0x64
-#define TYPE_PMGM_WAKE_BTN 0x65
-#define TYPE_PMGM_BATTERY_WARN 0x66
-#define TYPE_PMGM_BATTERY_CRIT 0x67
-#define TYPE_PMGM_SWITCH_TO_BAT 0x68
-#define TYPE_PMGM_SWITCH_TO_AC 0x69
-#define TYPE_PMGM_KBD_OR_MOUSE 0x6a
-#define TYPE_PMGM_ENCLOS_OPEN 0x6b
-#define TYPE_PMGM_ENCLOS_CLOSED 0x6c
-#define TYPE_PMGM_RING_INDICATE 0x6d
-#define TYPE_PMGM_LAN_ATTENTION 0x6e
-#define TYPE_PMGM_TIME_ALARM 0x6f
-#define TYPE_PMGM_CONFIG_CHANGE 0x70
-#define TYPE_PMGM_SERVICE_PROC 0x71
-
-typedef struct _rtas_error_log {
- unsigned long version:8; /* Architectural version */
- unsigned long severity:3; /* Severity level of error */
- unsigned long disposition:2; /* Degree of recovery */
- unsigned long extended:1; /* extended log present? */
- unsigned long /* reserved */ :2; /* Reserved for future use */
- unsigned long initiator:4; /* Initiator of event */
- unsigned long target:4; /* Target of failed operation */
- unsigned long type:8; /* General event or error*/
- unsigned long extended_log_length:32; /* length in bytes */
-} rtas_error_log;
-
-/* ****************************************************************** */
-#define ppc_rtas_errorlog_check_severity(x) \
- (_errlog_severity[x.severity])
-#define ppc_rtas_errorlog_check_target(x) \
- (_errlog_target[x.target])
-#define ppc_rtas_errorlog_check_initiator(x) \
- (_errlog_initiator[x.initiator])
-#define ppc_rtas_errorlog_check_extended(x) \
- (_errlog_extended[x.extended])
-#define ppc_rtas_errorlog_disect_extended(x) \
- do { /* implement me */ } while(0)
-extern const char * ppc_rtas_errorlog_check_type (rtas_error_log error_log);
-extern int ppc_rtas_errorlog_scan(void);
-
-
-#endif /* __ERROR_LOG_H__ */
+++ /dev/null
-/*
- * arch/ppc/platforms/est8260_setup.c
- *
- * EST8260 platform support
- *
- * Author: Allen Curtis <acurtis@onz.com>
- * Derived from: m8260_setup.c by Dan Malek, MVista
- *
- * Copyright 2002 Ones and Zeros, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/config.h>
-#include <linux/seq_file.h>
-
-#include <asm/mpc8260.h>
-#include <asm/machdep.h>
-
-static void (*callback_setup_arch)(void);
-
-extern unsigned char __res[sizeof(bd_t)];
-
-extern void m8260_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, unsigned long r7);
-
-static int
-est8260_show_cpuinfo(struct seq_file *m)
-{
- bd_t *binfo = (bd_t *)__res;
-
- seq_printf(m, "vendor\t\t: EST Corporation\n"
- "machine\t\t: SBC8260 PowerPC\n"
- "\n"
- "mem size\t\t: 0x%08x\n"
- "console baud\t\t: %d\n"
- "\n",
- binfo->bi_memsize,
- binfo->bi_baudrate);
- return 0;
-}
-
-static void __init
-est8260_setup_arch(void)
-{
- printk("EST SBC8260 Port\n");
- callback_setup_arch();
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- /* Generic 8260 platform initialization */
- m8260_init(r3, r4, r5, r6, r7);
-
- /* Anything special for this platform */
- ppc_md.show_cpuinfo = est8260_show_cpuinfo;
-
- callback_setup_arch = ppc_md.setup_arch;
- ppc_md.setup_arch = est8260_setup_arch;
-}
+++ /dev/null
-/*
- * arch/ppc/platforms/ev64260_setup.c
- *
- * Board setup routines for the Marvell/Galileo EV-64260-BP Evaluation Board.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * The EV-64260-BP port is the result of hard work from many people from
- * many companies. In particular, employees of Marvell/Galileo, Mission
- * Critical Linux, Xyterra, and MontaVista Software were heavily involved.
- */
-#include <linux/config.h>
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
-#include <linux/ide.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#if !defined(CONFIG_GT64260_CONSOLE)
-#include <linux/serial.h>
-#endif
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/time.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/prom.h>
-#include <asm/smp.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/gt64260.h>
-#include <platforms/ev64260.h>
-
-
-extern char cmd_line[];
-unsigned long ev64260_find_end_of_memory(void);
-
-TODC_ALLOC();
-
-/*
- * Marvell/Galileo EV-64260-BP Evaluation Board PCI interrupt routing.
- */
-static int __init
-ev64260_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
-
- if (hose->index == 0) {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 91, 0, 0, 0 }, /* IDSEL 7 - PCI bus 0 */
- { 91, 0, 0, 0 }, /* IDSEL 8 - PCI bus 0 */
- };
-
- const long min_idsel = 7, max_idsel = 8, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- }
- else {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 93, 0, 0, 0 }, /* IDSEL 7 - PCI bus 1 */
- { 93, 0, 0, 0 }, /* IDSEL 8 - PCI bus 1 */
- };
-
- const long min_idsel = 7, max_idsel = 8, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- }
-}
-
-static void __init
-ev64260_setup_bridge(void)
-{
- gt64260_bridge_info_t info;
- int window;
-
- GT64260_BRIDGE_INFO_DEFAULT(&info, ev64260_find_end_of_memory());
-
- /* Lookup PCI host bridges */
- if (gt64260_find_bridges(EV64260_BRIDGE_REG_BASE,
- &info,
- ev64260_map_irq)) {
- printk("Bridge initialization failed.\n");
- }
-
- /*
- * Enabling of PCI internal-vs-external arbitration
- * is a platform- and errata-dependent decision.
- */
- if(gt64260_revision == GT64260) {
- /* FEr#35 */
- gt_clr_bits(GT64260_PCI_0_ARBITER_CNTL, (1<<31));
- gt_clr_bits(GT64260_PCI_1_ARBITER_CNTL, (1<<31));
- } else if( gt64260_revision == GT64260A ) {
- gt_set_bits(GT64260_PCI_0_ARBITER_CNTL, (1<<31));
- gt_set_bits(GT64260_PCI_1_ARBITER_CNTL, (1<<31));
- /* Make external GPP interrupts level sensitive */
- gt_set_bits(GT64260_COMM_ARBITER_CNTL, (1<<10));
- /* Doc Change 9: > 100 MHz so must be set */
- gt_set_bits(GT64260_CPU_CONFIG, (1<<23));
- }
-
- gt_set_bits(GT64260_CPU_MASTER_CNTL, (1<<9)); /* Only 1 cpu */
-
- /* SCS windows not disabled above, disable all but SCS 0 */
- for (window=1; window<GT64260_CPU_SCS_DECODE_WINDOWS; window++) {
- gt64260_cpu_scs_set_window(window, 0, 0);
- }
-
- /* Set up windows to RTC/TODC and DUART on device module (CS 1 & 2) */
- gt64260_cpu_cs_set_window(1, EV64260_TODC_BASE, EV64260_TODC_LEN);
- gt64260_cpu_cs_set_window(2, EV64260_UART_BASE, EV64260_UART_LEN);
-
- /*
- * The EV-64260-BP uses several Multi-Purpose Pins (MPP) on the 64260
- * bridge as interrupt inputs (via the General Purpose Ports (GPP)
- * register). Need to route the MPP inputs to the GPP and set the
- * polarity correctly.
- *
- * In MPP Control 2 Register
- * MPP 21 -> GPP 21 (DUART channel A intr)
- * MPP 22 -> GPP 22 (DUART channel B intr)
- *
- * In MPP Control 3 Register
- * MPP 27 -> GPP 27 (PCI 0 INTA)
- * MPP 29 -> GPP 29 (PCI 1 INTA)
- */
- gt_clr_bits(GT64260_MPP_CNTL_2,
- ((1<<20) | (1<<21) | (1<<22) | (1<<23) |
- (1<<24) | (1<<25) | (1<<26) | (1<<27)));
-
- gt_clr_bits(GT64260_MPP_CNTL_3,
- ((1<<12) | (1<<13) | (1<<14) | (1<<15) |
- (1<<20) | (1<<21) | (1<<22) | (1<<23)));
-
- gt_write(GT64260_GPP_LEVEL_CNTL, 0x000002c6);
-
- /* DUART & PCI interrupts are active low */
- gt_set_bits(GT64260_GPP_LEVEL_CNTL,
- ((1<<21) | (1<<22) | (1<<27) | (1<<29)));
-
- /* Clear any pending interrupts for these inputs and enable them. */
- gt_write(GT64260_GPP_INTR_CAUSE,
- ~((1<<21) | (1<<22) | (1<<27) | (1<<29)));
- gt_set_bits(GT64260_GPP_INTR_MASK,
- ((1<<21) | (1<<22)| (1<<27) | (1<<29)));
- gt_set_bits(GT64260_IC_CPU_INTR_MASK_HI, ((1<<26) | (1<<27)));
-
- /* Set MPSC Multiplex RMII */
- /* NOTE: ethernet driver modifies bit 0 and 1 */
- gt_write(GT64260_MPP_SERIAL_PORTS_MULTIPLEX, 0x00001102);
-
- return;
-}
-
-
-static void __init
-ev64260_setup_arch(void)
-{
-#if !defined(CONFIG_GT64260_CONSOLE)
- struct serial_struct serial_req;
-#endif
-
- if ( ppc_md.progress )
- ppc_md.progress("ev64260_setup_arch: enter", 0);
-
- loops_per_jiffy = 50000000 / HZ;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- if ( ppc_md.progress )
- ppc_md.progress("ev64260_setup_arch: find_bridges", 0);
-
- /*
- * Set up the L2CR register.
- * L2 cache was invalidated by bootloader.
- */
- switch (PVR_VER(mfspr(PVR))) {
- case PVR_VER(PVR_750):
- _set_L2CR(0xfd100000);
- break;
- case PVR_VER(PVR_7400):
- case PVR_VER(PVR_7410):
- _set_L2CR(0xcd100000);
- break;
- /* case PVR_VER(PVR_7450): */
- /* XXXX WHAT VALUE?? FIXME */
- break;
- }
-
- ev64260_setup_bridge();
-
- TODC_INIT(TODC_TYPE_DS1501, 0, 0, ioremap(EV64260_TODC_BASE,0x20), 8);
-
-#if !defined(CONFIG_GT64260_CONSOLE)
- memset(&serial_req, 0, sizeof(serial_req));
- serial_req.line = 0;
- serial_req.baud_base = BASE_BAUD;
- serial_req.port = 0;
- serial_req.irq = 85;
- serial_req.flags = STD_COM_FLAGS;
- serial_req.io_type = SERIAL_IO_MEM;
- serial_req.iomem_base = ioremap(EV64260_SERIAL_0, 0x20);
- serial_req.iomem_reg_shift = 2;
-
- if (early_serial_setup(&serial_req) != 0) {
- printk("Early serial init of port 0 failed\n");
- }
-
- /* Assume early_serial_setup() doesn't modify serial_req */
- serial_req.line = 1;
- serial_req.port = 1;
- serial_req.irq = 86;
- serial_req.iomem_base = ioremap(EV64260_SERIAL_1, 0x20);
-
- if (early_serial_setup(&serial_req) != 0) {
- printk("Early serial init of port 1 failed\n");
- }
-#endif
-
- printk("Marvell/Galileo EV-64260-BP Evaluation Board\n");
- printk("EV-64260-BP port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
-
- if ( ppc_md.progress )
- ppc_md.progress("ev64260_setup_arch: exit", 0);
-
- return;
-}
-
-static void __init
-ev64260_init_irq(void)
-{
- gt64260_init_irq();
-
- if(gt64260_revision != GT64260) {
- /* XXXX Kludge--need to fix gt64260_init_irq() interface */
- /* Mark PCI intrs level sensitive */
- irq_desc[91].status |= IRQ_LEVEL;
- irq_desc[93].status |= IRQ_LEVEL;
- }
-}
-
-unsigned long __init
-ev64260_find_end_of_memory(void)
-{
- return 32*1024*1024; /* XXXX FIXME */
-}
-
-static void
-ev64260_reset_board(void)
-{
- local_irq_disable();
-
- /* Set exception prefix high - to the firmware */
- _nmask_and_or_msr(0, MSR_IP);
-
- /* XXX FIXME */
- printk("XXXX **** trying to reset board ****\n");
- return;
-}
-
-static void
-ev64260_restart(char *cmd)
-{
- volatile ulong i = 10000000;
-
- ev64260_reset_board();
-
- while (i-- > 0);
- panic("restart failed\n");
-}
-
-static void
-ev64260_halt(void)
-{
- local_irq_disable();
- while (1);
- /* NOTREACHED */
-}
-
-static void
-ev64260_power_off(void)
-{
- ev64260_halt();
- /* NOTREACHED */
-}
-
-static int
-ev64260_show_cpuinfo(struct seq_file *m)
-{
- uint pvid;
-
- pvid = mfspr(PVR);
- seq_printf(m, "vendor\t\t: Marvell/Galileo\n");
- seq_printf(m, "machine\t\t: EV-64260-BP\n");
- seq_printf(m, "PVID\t\t: 0x%x, vendor: %s\n",
- pvid, (pvid & (1<<15) ? "IBM" : "Motorola"));
-
- return 0;
-}
-
-/* DS1501 RTC has too much variation to use RTC for calibration */
-static void __init
-ev64260_calibrate_decr(void)
-{
- ulong freq;
-
- freq = 100000000 / 4;
-
- printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
- freq/1000000, freq%1000000);
-
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-
- return;
-}
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG)
-/*
- * Set BAT 3 to map 0xf0000000 to end of physical memory space.
- */
-static __inline__ void
-ev64260_set_bat(void)
-{
- unsigned long bat3u, bat3l;
- static int mapping_set = 0;
-
- if (!mapping_set) {
-
- __asm__ __volatile__(
- " lis %0,0xf000\n \
- ori %1,%0,0x002a\n \
- ori %0,%0,0x1ffe\n \
- mtspr 0x21e,%0\n \
- mtspr 0x21f,%1\n \
- isync\n \
- sync "
- : "=r" (bat3u), "=r" (bat3l));
-
- mapping_set = 1;
- }
-
- return;
-}
-
-#if !defined(CONFIG_GT64260_CONSOLE)
-#include <linux/serialP.h>
-#include <linux/serial_reg.h>
-#include <asm/serial.h>
-
-static struct serial_state rs_table[RS_TABLE_SIZE] = {
- SERIAL_PORT_DFNS /* Defined in <asm/serial.h> */
-};
-
-static void
-ev64260_16550_progress(char *s, unsigned short hex)
-{
- volatile char c;
- volatile unsigned long com_port;
- u16 shift;
-
- com_port = rs_table[0].port;
- shift = rs_table[0].iomem_reg_shift;
-
- while ((c = *s++) != 0) {
- while ((*((volatile unsigned char *)com_port +
- (UART_LSR << shift)) & UART_LSR_THRE) == 0)
- ;
- *(volatile unsigned char *)com_port = c;
-
- if (c == '\n') {
- while ((*((volatile unsigned char *)com_port +
- (UART_LSR << shift)) & UART_LSR_THRE) == 0)
- ;
- *(volatile unsigned char *)com_port = '\r';
- }
- }
-
- /* Move to next line on */
- while ((*((volatile unsigned char *)com_port +
- (UART_LSR << shift)) & UART_LSR_THRE) == 0)
- ;
- *(volatile unsigned char *)com_port = '\n';
- while ((*((volatile unsigned char *)com_port +
- (UART_LSR << shift)) & UART_LSR_THRE) == 0)
- ;
- *(volatile unsigned char *)com_port = '\r';
-
- return;
-}
-#endif /* !CONFIG_GT64260_CONSOLE */
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- isa_mem_base = 0;
-
- ppc_md.setup_arch = ev64260_setup_arch;
- ppc_md.show_cpuinfo = ev64260_show_cpuinfo;
- ppc_md.irq_canonicalize = NULL;
- ppc_md.init_IRQ = ev64260_init_irq;
- ppc_md.get_irq = gt64260_get_irq;
- ppc_md.init = NULL;
-
- ppc_md.restart = ev64260_restart;
- ppc_md.power_off = ev64260_power_off;
- ppc_md.halt = ev64260_halt;
-
- ppc_md.find_end_of_memory = ev64260_find_end_of_memory;
-
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.calibrate_decr = ev64260_calibrate_decr;
-
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-
- ppc_md.heartbeat = NULL;
- ppc_md.heartbeat_reset = 0;
- ppc_md.heartbeat_count = 0;
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ev64260_set_bat();
-#ifdef CONFIG_GT64260_CONSOLE
- gt64260_base = EV64260_BRIDGE_REG_BASE;
- ppc_md.progress = gt64260_mpsc_progress; /* embedded UART */
-#else
- ppc_md.progress = ev64260_16550_progress; /* Dev module DUART */
-#endif
-#else /* !CONFIG_SERIAL_TEXT_DEBUG */
- ppc_md.progress = NULL;
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-
- return;
-}
+++ /dev/null
-/*
- * arch/ppc/platforms/lopec_pci.c
- *
- * PCI setup routines for the Motorola LoPEC.
- *
- * Author: Dan Cox
- * danc@mvista.com (or, alternately, source@mvista.com)
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc10x.h>
-
-static inline int __init
-lopec_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- int irq;
- static char pci_irq_table[][4] = {
- {16, 0, 0, 0}, /* ID 11 - Winbond */
- {22, 0, 0, 0}, /* ID 12 - SCSI */
- {0, 0, 0, 0}, /* ID 13 - nothing */
- {17, 0, 0, 0}, /* ID 14 - 82559 Ethernet */
- {27, 0, 0, 0}, /* ID 15 - USB */
- {23, 0, 0, 0}, /* ID 16 - PMC slot 1 */
- {24, 0, 0, 0}, /* ID 17 - PMC slot 2 */
- {25, 0, 0, 0}, /* ID 18 - PCI slot */
- {0, 0, 0, 0}, /* ID 19 - nothing */
- {0, 0, 0, 0}, /* ID 20 - nothing */
- {0, 0, 0, 0}, /* ID 21 - nothing */
- {0, 0, 0, 0}, /* ID 22 - nothing */
- {0, 0, 0, 0}, /* ID 23 - nothing */
- {0, 0, 0, 0}, /* ID 24 - PMC slot 1b */
- {0, 0, 0, 0}, /* ID 25 - nothing */
- {0, 0, 0, 0} /* ID 26 - PMC Slot 2b */
- };
- const long min_idsel = 11, max_idsel = 26, irqs_per_slot = 4;
-
- irq = PCI_IRQ_TABLE_LOOKUP;
- if (!irq)
- return 0;
-
- return irq;
-}
-
-void __init
-lopec_setup_winbond_83553(struct pci_controller *hose)
-{
- int devfn;
-
- devfn = PCI_DEVFN(11,0);
-
- /* IDE interrupt routing (primary 14, secondary 15) */
- early_write_config_byte(hose, 0, devfn, 0x43, 0xef);
- /* PCI interrupt routing */
- early_write_config_word(hose, 0, devfn, 0x44, 0x0000);
-
- /* ISA-PCI address decoder */
- early_write_config_byte(hose, 0, devfn, 0x48, 0xf0);
-
- /* RTC, kb, not used in PPC */
- early_write_config_byte(hose, 0, devfn, 0x4d, 0x00);
- early_write_config_byte(hose, 0, devfn, 0x4e, 0x04);
- devfn = PCI_DEVFN(11, 1);
- early_write_config_byte(hose, 0, devfn, 0x09, 0x8f);
- early_write_config_dword(hose, 0, devfn, 0x40, 0x00ff0011);
-}
-
-void __init
-lopec_find_bridges(void)
-{
- struct pci_controller *hose;
-
- hose = pcibios_alloc_controller();
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- if (mpc10x_bridge_init(hose,
- MPC10X_MEM_MAP_B,
- MPC10X_MEM_MAP_B,
- MPC10X_MAPB_EUMB_BASE) == 0) {
-
- hose->mem_resources[0].end = 0xffffffff;
- lopec_setup_winbond_83553(hose);
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = lopec_map_irq;
- }
-}
+++ /dev/null
-/*
- * include/asm-ppc/lopec_serial.h
- *
- * Definitions for Motorola LoPEC board.
- *
- * Author: Dan Cox
- * danc@mvista.com (or, alternately, source@mvista.com)
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __H_LOPEC_SERIAL
-#define __H_LOPEC_SERIAL
-
-#define RS_TABLE_SIZE 3
-
-#define BASE_BAUD (1843200 / 16)
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
-#endif
-
-#define SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, 0xffe10000, 29, STD_COM_FLAGS, \
- iomem_base: (u8 *) 0xffe10000, \
- io_type: SERIAL_IO_MEM }, \
- { 0, BASE_BAUD, 0xffe11000, 20, STD_COM_FLAGS, \
- iomem_base: (u8 *) 0xffe11000, \
- io_type: SERIAL_IO_MEM }, \
- { 0, BASE_BAUD, 0xffe12000, 21, STD_COM_FLAGS, \
- iomem_base: (u8 *) 0xffe12000, \
- io_type: SERIAL_IO_MEM }
-
-#endif
+++ /dev/null
-/*
- * arch/ppc/platforms/lopec_setup.c
- *
- * Setup routines for the Motorola LoPEC.
- *
- * Author: Dan Cox
- * danc@mvista.com
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/delay.h>
-#include <linux/pci_ids.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/ide.h>
-#include <linux/seq_file.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/root_dev.h>
-
-#include <asm/io.h>
-#include <asm/open_pic.h>
-#include <asm/i8259.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/mpc10x.h>
-#include <asm/hw_irq.h>
-#include <asm/prep_nvram.h>
-
-extern void lopec_find_bridges(void);
-
-/*
- * Define all of the IRQ senses and polarities. Taken from the
- * LoPEC Programmer's Reference Guide.
- */
-static u_char lopec_openpic_initsenses[16] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 4 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 5 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 6 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 7 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 8 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 9 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 10 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 11 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 12 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 13 */
- (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE), /* IRQ 14 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE) /* IRQ 15 */
-};
-
-static int
-lopec_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "machine\t\t: Motorola LoPEC\n");
- return 0;
-}
-
-static u32
-lopec_irq_canonicalize(u32 irq)
-{
- if (irq == 2)
- return 9;
- else
- return irq;
-}
-
-static void
-lopec_restart(char *cmd)
-{
-#define LOPEC_SYSSTAT1 0xffe00000
- /* force a hard reset, if possible */
- unsigned char reg = *((unsigned char *) LOPEC_SYSSTAT1);
- reg |= 0x80;
- *((unsigned char *) LOPEC_SYSSTAT1) = reg;
-
- local_irq_disable();
- while(1);
-#undef LOPEC_SYSSTAT1
-}
-
-static void
-lopec_halt(void)
-{
- local_irq_disable();
- while(1);
-}
-
-static void
-lopec_power_off(void)
-{
- lopec_halt();
-}
-
-#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
-int lopec_ide_ports_known = 0;
-static unsigned long lopec_ide_regbase[MAX_HWIFS];
-static unsigned long lopec_ide_ctl_regbase[MAX_HWIFS];
-static unsigned long lopec_idedma_regbase;
-
-static void
-lopec_ide_probe(void)
-{
- struct pci_dev *dev = pci_find_device(PCI_VENDOR_ID_WINBOND,
- PCI_DEVICE_ID_WINBOND_82C105,
- NULL);
- lopec_ide_ports_known = 1;
-
- if (dev) {
- lopec_ide_regbase[0] = dev->resource[0].start;
- lopec_ide_regbase[1] = dev->resource[2].start;
- lopec_ide_ctl_regbase[0] = dev->resource[1].start;
- lopec_ide_ctl_regbase[1] = dev->resource[3].start;
- lopec_idedma_regbase = dev->resource[4].start;
- }
-}
-
-static int
-lopec_ide_default_irq(unsigned long base)
-{
- if (lopec_ide_ports_known == 0)
- lopec_ide_probe();
-
- if (base == lopec_ide_regbase[0])
- return 14;
- else if (base == lopec_ide_regbase[1])
- return 15;
- else
- return 0;
-}
-
-static unsigned long
-lopec_ide_default_io_base(int index)
-{
- if (lopec_ide_ports_known == 0)
- lopec_ide_probe();
- return lopec_ide_regbase[index];
-}
-
-static void __init
-lopec_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data,
- unsigned long ctl, int *irq)
-{
- unsigned long reg = data;
- uint alt_status_base;
- int i;
-
- for(i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
- hw->io_ports[i] = reg++;
-
- if (data == lopec_ide_regbase[0]) {
- alt_status_base = lopec_ide_ctl_regbase[0] + 2;
- hw->irq = 14;
- }
- else if (data == lopec_ide_regbase[1]) {
- alt_status_base = lopec_ide_ctl_regbase[1] + 2;
- hw->irq = 15;
- }
- else {
- alt_status_base = 0;
- hw->irq = 0;
- }
-
- if (ctl)
- hw->io_ports[IDE_CONTROL_OFFSET] = ctl;
- else
- hw->io_ports[IDE_CONTROL_OFFSET] = alt_status_base;
-
- if (irq != NULL)
- *irq = hw->irq;
-
-}
-#endif /* BLK_DEV_IDE */
-
-static void __init
-lopec_init_IRQ(void)
-{
- int i;
-
- /*
- * Provide the open_pic code with the correct table of interrupts.
- */
- OpenPIC_InitSenses = lopec_openpic_initsenses;
- OpenPIC_NumInitSenses = sizeof(lopec_openpic_initsenses);
-
- mpc10x_set_openpic();
-
- /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
- openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
- &i8259_irq);
-
- /* Map i8259 interrupts */
- for(i = 0; i < NUM_8259_INTERRUPTS; i++)
- irq_desc[i].handler = &i8259_pic;
-
- /*
- * The EPIC allows for a read in the range of 0xFEF00000 ->
- * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction.
- */
- i8259_init(0xfef00000);
-}
-
-static int __init
-lopec_request_io(void)
-{
- outb(0x00, 0x4d0);
- outb(0xc0, 0x4d1);
-
- request_region(0x00, 0x20, "dma1");
- request_region(0x20, 0x20, "pic1");
- request_region(0x40, 0x20, "timer");
- request_region(0x80, 0x10, "dma page reg");
- request_region(0xa0, 0x20, "pic2");
- request_region(0xc0, 0x20, "dma2");
-
- return 0;
-}
-
-device_initcall(lopec_request_io);
-
-static void __init
-lopec_map_io(void)
-{
- io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
- io_block_mapping(0xb0000000, 0xb0000000, 0x10000000, _PAGE_IO);
-}
-
-static void __init
-lopec_set_bat(void)
-{
- unsigned long batu, batl;
-
- __asm__ __volatile__(
- "lis %0,0xf800\n \
- ori %1,%0,0x002a\n \
- ori %0,%0,0x0ffe\n \
- mtspr 0x21e,%0\n \
- mtspr 0x21f,%1\n \
- isync\n \
- sync "
- : "=r" (batu), "=r" (batl));
-}
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
-#include <linux/serial.h>
-#include <linux/serialP.h>
-#include <linux/serial_reg.h>
-#include <asm/serial.h>
-
-static struct serial_state rs_table[RS_TABLE_SIZE] = {
- SERIAL_PORT_DFNS /* Defined in <asm/serial.h> */
-};
-
-volatile unsigned char *com_port;
-volatile unsigned char *com_port_lsr;
-
-static void
-serial_writechar(char c)
-{
- while ((*com_port_lsr & UART_LSR_THRE) == 0)
- ;
- *com_port = c;
-}
-
-void
-lopec_progress(char *s, unsigned short hex)
-{
- volatile char c;
-
- com_port = (volatile unsigned char *) rs_table[0].port;
- com_port_lsr = com_port + UART_LSR;
-
- while ((c = *s++) != 0)
- serial_writechar(c);
-
- /* Most messages don't have a newline in them */
- serial_writechar('\n');
- serial_writechar('\r');
-}
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-
-TODC_ALLOC();
-
-static void __init
-lopec_setup_arch(void)
-{
-
- TODC_INIT(TODC_TYPE_MK48T37, 0, 0,
- ioremap(0xffe80000, 0x8000), 8);
-
- loops_per_jiffy = 100000000/HZ;
-
- lopec_find_bridges();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#elif defined(CONFIG_ROOT_NFS)
- ROOT_DEV = Root_NFS;
-#elif defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
- ROOT_DEV = Root_HDA1;
-#else
- ROOT_DEV = Root_SDA1;
-#endif
-
-#ifdef CONFIG_VT
- conswitchp = &dummy_con;
-#endif
-#ifdef CONFIG_PPCBUG_NVRAM
- /* Read in NVRAM data */
- init_prep_nvram();
-
- /* if no bootargs, look in NVRAM */
- if ( cmd_line[0] == '\0' ) {
- char *bootargs;
- bootargs = prep_nvram_get_var("bootargs");
- if (bootargs != NULL) {
- strcpy(cmd_line, bootargs);
- /* again.. */
- strcpy(saved_command_line, cmd_line);
- }
- }
-#endif
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
- lopec_set_bat();
-
- isa_io_base = MPC10X_MAPB_ISA_IO_BASE;
- isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE;
- pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET;
- ISA_DMA_THRESHOLD = 0x00ffffff;
- DMA_MODE_READ = 0x44;
- DMA_MODE_WRITE = 0x48;
-
- ppc_md.setup_arch = lopec_setup_arch;
- ppc_md.show_cpuinfo = lopec_show_cpuinfo;
- ppc_md.irq_canonicalize = lopec_irq_canonicalize;
- ppc_md.init_IRQ = lopec_init_IRQ;
- ppc_md.get_irq = openpic_get_irq;
-
- ppc_md.restart = lopec_restart;
- ppc_md.power_off = lopec_power_off;
- ppc_md.halt = lopec_halt;
-
- ppc_md.setup_io_mappings = lopec_map_io;
-
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.calibrate_decr = todc_calibrate_decr;
-
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-
-#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
- ppc_ide_md.default_irq = lopec_ide_default_irq;
- ppc_ide_md.default_io_base = lopec_ide_default_io_base;
- ppc_ide_md.ide_init_hwif = lopec_ide_init_hwif_ports;
-#endif
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.progress = lopec_progress;
-#endif
-}
+++ /dev/null
-/*
- * include/asm-ppc/mcpn765_serial.h
- *
- * Definitions for Motorola MCG MCPN765 cPCI board support
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __ASMPPC_MCPN765_SERIAL_H
-#define __ASMPPC_MCPN765_SERIAL_H
-
-#include <linux/config.h>
-
-/* Define the UART base addresses */
-#define MCPN765_SERIAL_1 0xfef88000
-#define MCPN765_SERIAL_2 0xfef88200
-#define MCPN765_SERIAL_3 0xfef88400
-#define MCPN765_SERIAL_4 0xfef88600
-
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define RS_TABLE_SIZE 64
-#else
-#define RS_TABLE_SIZE 4
-#endif
-
-/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
-#define BASE_BAUD ( 1843200 / 16 )
-#define UART_CLK 1843200
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
-#endif
-
-/* All UART IRQ's are wire-OR'd to IRQ 17 */
-#define STD_SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, MCPN765_SERIAL_1, 17, STD_COM_FLAGS, /* ttyS0 */\
- iomem_base: (u8 *)MCPN765_SERIAL_1, \
- iomem_reg_shift: 4, \
- io_type: SERIAL_IO_MEM }, \
- { 0, BASE_BAUD, MCPN765_SERIAL_2, 17, STD_COM_FLAGS, /* ttyS1 */\
- iomem_base: (u8 *)MCPN765_SERIAL_2, \
- iomem_reg_shift: 4, \
- io_type: SERIAL_IO_MEM }, \
- { 0, BASE_BAUD, MCPN765_SERIAL_3, 17, STD_COM_FLAGS, /* ttyS2 */\
- iomem_base: (u8 *)MCPN765_SERIAL_3, \
- iomem_reg_shift: 4, \
- io_type: SERIAL_IO_MEM }, \
- { 0, BASE_BAUD, MCPN765_SERIAL_4, 17, STD_COM_FLAGS, /* ttyS3 */\
- iomem_base: (u8 *)MCPN765_SERIAL_4, \
- iomem_reg_shift: 4, \
- io_type: SERIAL_IO_MEM },
-
-#define SERIAL_PORT_DFNS \
- STD_SERIAL_PORT_DFNS
-
-#endif /* __ASMPPC_MCPN765_SERIAL_H */
+++ /dev/null
-/*
- * arch/ppc/platforms/mvme5100_pci.c
- *
- * PCI setup routines for the Motorola MVME5100.
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <platforms/mvme5100.h>
-#include <asm/pplus.h>
-
-static inline int
-mvme5100_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- int irq;
-
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 0, 0, 0, 0 }, /* IDSEL 11 - Winbond */
- { 0, 0, 0, 0 }, /* IDSEL 12 - unused */
- { 21, 22, 23, 24 }, /* IDSEL 13 - Universe II */
- { 18, 0, 0, 0 }, /* IDSEL 14 - Enet 1 */
- { 0, 0, 0, 0 }, /* IDSEL 15 - unused */
- { 25, 26, 27, 28 }, /* IDSEL 16 - PMC Slot 1 */
- { 28, 25, 26, 27 }, /* IDSEL 17 - PMC Slot 2 */
- { 0, 0, 0, 0 }, /* IDSEL 18 - unused */
- { 29, 0, 0, 0 }, /* IDSEL 19 - Enet 2 */
- { 0, 0, 0, 0 }, /* IDSEL 20 - PMCSPAN */
- };
-
- const long min_idsel = 11, max_idsel = 20, irqs_per_slot = 4;
- irq = PCI_IRQ_TABLE_LOOKUP;
- /* If lookup is zero, always return 0 */
- if (!irq)
- return 0;
- else
-#ifdef CONFIG_MVME5100_IPMC761_PRESENT
- /* If IPMC761 present, return table value */
- return irq;
-#else
- /* If IPMC761 not present, we don't have an i8259 so adjust */
- return (irq - NUM_8259_INTERRUPTS);
-#endif
-}
-
-static void
-mvme5100_pcibios_fixup_resources(struct pci_dev *dev)
-{
- int i;
-
- if ((dev->vendor == PCI_VENDOR_ID_MOTOROLA) &&
- (dev->device == PCI_DEVICE_ID_MOTOROLA_HAWK))
- for (i=0; i<DEVICE_COUNT_RESOURCE; i++)
- {
- dev->resource[i].start = 0;
- dev->resource[i].end = 0;
- }
-}
-
-void __init
-mvme5100_setup_bridge(void)
-{
- struct pci_controller* hose;
-
- hose = pcibios_alloc_controller();
-
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
- hose->pci_mem_offset = MVME5100_PCI_MEM_OFFSET;
-
- pci_init_resource(&hose->io_resource,
- MVME5100_PCI_LOWER_IO,
- MVME5100_PCI_UPPER_IO,
- IORESOURCE_IO,
- "PCI host bridge");
-
- pci_init_resource(&hose->mem_resources[0],
- MVME5100_PCI_LOWER_MEM,
- MVME5100_PCI_UPPER_MEM,
- IORESOURCE_MEM,
- "PCI host bridge");
-
- hose->io_space.start = MVME5100_PCI_LOWER_IO;
- hose->io_space.end = MVME5100_PCI_UPPER_IO;
- hose->mem_space.start = MVME5100_PCI_LOWER_MEM;
- hose->mem_space.end = MVME5100_PCI_UPPER_MEM;
- hose->io_base_virt = (void *)MVME5100_ISA_IO_BASE;
-
- /* Use indirect method of Hawk */
- setup_indirect_pci(hose,
- MVME5100_PCI_CONFIG_ADDR,
- MVME5100_PCI_CONFIG_DATA);
-
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pcibios_fixup_resources = mvme5100_pcibios_fixup_resources;
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = mvme5100_map_irq;
-}
+++ /dev/null
-/*
- * include/asm-ppc/mvme5100_serial.h
- *
- * Definitions for Motorola MVME5100 support
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_MVME5100_SERIAL_H__
-#define __ASM_MVME5100_SERIAL_H__
-
-#include <linux/config.h>
-#include <platforms/mvme5100.h>
-
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define RS_TABLE_SIZE 64
-#else
-#define RS_TABLE_SIZE 4
-#endif
-
-#define BASE_BAUD ( MVME5100_BASE_BAUD / 16 )
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
-#endif
-
-/* All UART IRQ's are wire-OR'd to one MPIC IRQ */
-#define STD_SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, MVME5100_SERIAL_1, \
- MVME5100_SERIAL_IRQ, \
- STD_COM_FLAGS, /* ttyS0 */ \
- iomem_base: (unsigned char *)MVME5100_SERIAL_1, \
- iomem_reg_shift: 4, \
- io_type: SERIAL_IO_MEM }, \
- { 0, BASE_BAUD, MVME5100_SERIAL_2, \
- MVME5100_SERIAL_IRQ, \
- STD_COM_FLAGS, /* ttyS1 */ \
- iomem_base: (unsigned char *)MVME5100_SERIAL_2, \
- iomem_reg_shift: 4, \
- io_type: SERIAL_IO_MEM },
-
-#define SERIAL_PORT_DFNS \
- STD_SERIAL_PORT_DFNS
-
-#endif /* __ASM_MVME5100_SERIAL_H__ */
-#endif /* __KERNEL__ */
+++ /dev/null
-/*
- * arch/ppc/platforms/mvme5100_setup.c
- *
- * Board setup routines for the Motorola MVME5100.
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/config.h>
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
-#include <linux/ide.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/time.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/prom.h>
-#include <asm/smp.h>
-#include <asm/open_pic.h>
-#include <asm/i8259.h>
-#include <platforms/mvme5100.h>
-#include <asm/todc.h>
-#include <asm/pci-bridge.h>
-#include <asm/bootinfo.h>
-#include <asm/pplus.h>
-
-extern char cmd_line[];
-
-static u_char mvme5100_openpic_initsenses[] __initdata = {
- 0, /* 16: i8259 cascade (active high) */
- 1, /* 17: TL16C550 UART 1,2 */
- 1, /* 18: Enet 1 (front panel or P2) */
- 1, /* 19: Hawk Watchdog 1,2 */
- 1, /* 20: DS1621 thermal alarm */
- 1, /* 21: Universe II LINT0# */
- 1, /* 22: Universe II LINT1# */
- 1, /* 23: Universe II LINT2# */
- 1, /* 24: Universe II LINT3# */
- 1, /* 25: PMC1 INTA#, PMC2 INTB# */
- 1, /* 26: PMC1 INTB#, PMC2 INTC# */
- 1, /* 27: PMC1 INTC#, PMC2 INTD# */
- 1, /* 28: PMC1 INTD#, PMC2 INTA# */
- 1, /* 29: Enet 2 (front panel) */
- 1, /* 30: Abort Switch */
- 1, /* 31: RTC Alarm */
-};
-
-static void __init
-mvme5100_setup_arch(void)
-{
- if ( ppc_md.progress )
- ppc_md.progress("mvme5100_setup_arch: enter", 0);
-
- loops_per_jiffy = 50000000 / HZ;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
-#ifdef CONFIG_DUMMY_CONSOLE
- conswitchp = &dummy_con;
-#endif
-
- if ( ppc_md.progress )
- ppc_md.progress("mvme5100_setup_arch: find_bridges", 0);
-
- /* Setup PCI host bridge */
- mvme5100_setup_bridge();
-
- /* Find and map our OpenPIC */
- pplus_mpic_init(MVME5100_PCI_MEM_OFFSET);
- OpenPIC_InitSenses = mvme5100_openpic_initsenses;
- OpenPIC_NumInitSenses = sizeof(mvme5100_openpic_initsenses);
-
- printk("MVME5100 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
-
- if ( ppc_md.progress )
- ppc_md.progress("mvme5100_setup_arch: exit", 0);
-
- return;
-}
-
-static void __init
-mvme5100_init2(void)
-{
-#ifdef CONFIG_MVME5100_IPMC761_PRESENT
- request_region(0x00,0x20,"dma1");
- request_region(0x20,0x20,"pic1");
- request_region(0x40,0x20,"timer");
- request_region(0x80,0x10,"dma page reg");
- request_region(0xa0,0x20,"pic2");
- request_region(0xc0,0x20,"dma2");
-#endif
- return;
-}
-
-/*
- * Interrupt setup and service.
- * Have MPIC on HAWK and cascaded 8259s on Winbond cascaded to MPIC.
- */
-static void __init
-mvme5100_init_IRQ(void)
-{
-#ifdef CONFIG_MVME5100_IPMC761_PRESENT
- int i;
-#endif
-
- if ( ppc_md.progress )
- ppc_md.progress("init_irq: enter", 0);
-
-#ifdef CONFIG_MVME5100_IPMC761_PRESENT
- openpic_init(1, NUM_8259_INTERRUPTS, NULL, -1);
- openpic_hookup_cascade(NUM_8259_INTERRUPTS,"82c59 cascade",&i8259_irq);
-
- for(i=0; i < NUM_8259_INTERRUPTS; i++)
- irq_desc[i].handler = &i8259_pic;
-
- i8259_init(NULL);
-#else
- openpic_init(1, 0, NULL, -1);
-#endif
-
- if ( ppc_md.progress )
- ppc_md.progress("init_irq: exit", 0);
-
- return;
-}
-
-/*
- * Set BAT 3 to map 0xf0000000 to end of physical memory space.
- */
-static __inline__ void
-mvme5100_set_bat(void)
-{
- unsigned long bat3u, bat3l;
- static int mapping_set = 0;
-
- if (!mapping_set) {
-
- __asm__ __volatile__(
- " lis %0,0xf000\n \
- ori %1,%0,0x002a\n \
- ori %0,%0,0x1ffe\n \
- mtspr 0x21e,%0\n \
- mtspr 0x21f,%1\n \
- isync\n \
- sync "
- : "=r" (bat3u), "=r" (bat3l));
-
- mapping_set = 1;
- }
-
- return;
-}
-
-static unsigned long __init
-mvme5100_find_end_of_memory(void)
-{
- mvme5100_set_bat();
- return pplus_get_mem_size(MVME5100_HAWK_SMC_BASE);
-}
-
-static void __init
-mvme5100_map_io(void)
-{
- io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
- ioremap_base = 0xfe000000;
-}
-
-static void
-mvme5100_reset_board(void)
-{
- local_irq_disable();
-
- /* Set exception prefix high - to the firmware */
- _nmask_and_or_msr(0, MSR_IP);
-
- out_8((u_char *)MVME5100_BOARD_MODRST_REG, 0x01);
-
- return;
-}
-
-static void
-mvme5100_restart(char *cmd)
-{
- volatile ulong i = 10000000;
-
- mvme5100_reset_board();
-
- while (i-- > 0);
- panic("restart failed\n");
-}
-
-static void
-mvme5100_halt(void)
-{
- local_irq_disable();
- while (1);
-}
-
-static void
-mvme5100_power_off(void)
-{
- mvme5100_halt();
-}
-
-static int
-mvme5100_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: Motorola\n");
- seq_printf(m, "machine\t\t: MVME5100\n");
-
- return 0;
-}
-
-TODC_ALLOC();
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- isa_io_base = MVME5100_ISA_IO_BASE;
- isa_mem_base = MVME5100_ISA_MEM_BASE;
- pci_dram_offset = MVME5100_PCI_DRAM_OFFSET;
-
- ppc_md.setup_arch = mvme5100_setup_arch;
- ppc_md.show_cpuinfo = mvme5100_show_cpuinfo;
- ppc_md.init_IRQ = mvme5100_init_IRQ;
- ppc_md.get_irq = openpic_get_irq;
- ppc_md.init = mvme5100_init2;
-
- ppc_md.restart = mvme5100_restart;
- ppc_md.power_off = mvme5100_power_off;
- ppc_md.halt = mvme5100_halt;
-
- ppc_md.find_end_of_memory = mvme5100_find_end_of_memory;
- ppc_md.setup_io_mappings = mvme5100_map_io;
-
- TODC_INIT(TODC_TYPE_MK48T37,
- MVME5100_NVRAM_AS0,
- MVME5100_NVRAM_AS1,
- MVME5100_NVRAM_DATA,
- 8);
-
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.calibrate_decr = todc_calibrate_decr;
-
- ppc_md.nvram_read_val = todc_m48txx_read_val;
- ppc_md.nvram_write_val = todc_m48txx_write_val;
-
- ppc_md.progress = NULL;
-}
+++ /dev/null
-/*
- * include/asm-ppc/platforms/powerpmc250_serial.h
- *
- * Motorola PrPMC750 serial support
- *
- * Author: Troy Benjegerdes <tbenjegerdes@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASMPPC_POWERPMC250_SERIAL_H
-#define __ASMPPC_POWERPMC250_SERIAL_H
-
-#include <linux/config.h>
-#include <platforms/powerpmc250.h>
-
-#define RS_TABLE_SIZE 1
-
-#define BASE_BAUD (POWERPMC250_BASE_BAUD / 16)
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
-#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
-#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF)
-#endif
-
-#define SERIAL_PORT_DFNS \
-{ 0, BASE_BAUD, POWERPMC250_SERIAL, POWERPMC250_SERIAL_IRQ, STD_COM_FLAGS, /* ttyS0 */\
- iomem_base: (u8 *)POWERPMC250_SERIAL, \
- iomem_reg_shift: 0, \
- io_type: SERIAL_IO_MEM }
-
-#endif
-#endif /* __KERNEL__ */
+++ /dev/null
-/*
- * arch/ppc/platforms/pq2ads_setup.c
- *
- * PQ2ADS platform support
- *
- * Author: Kumar Gala <kumar.gala@freescale.com>
- * Derived from: est8260_setup.c by Allen Curtis
- *
- * Copyright 2004 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/config.h>
-#include <linux/seq_file.h>
-
-#include <asm/mpc8260.h>
-#include <asm/machdep.h>
-
-static void (*callback_setup_arch)(void);
-
-extern unsigned char __res[sizeof(bd_t)];
-
-extern void m8260_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, unsigned long r7);
-
-static int
-pq2ads_show_cpuinfo(struct seq_file *m)
-{
- bd_t *binfo = (bd_t *)__res;
-
- seq_printf(m, "vendor\t\t: Motorola\n"
- "machine\t\t: PQ2 ADS PowerPC\n"
- "\n"
- "mem size\t\t: 0x%08lx\n"
- "console baud\t\t: %ld\n"
- "\n",
- binfo->bi_memsize,
- binfo->bi_baudrate);
- return 0;
-}
-
-static void __init
-pq2ads_setup_arch(void)
-{
- printk("PQ2 ADS Port\n");
- callback_setup_arch();
- *(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_RS232_EN2;
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- /* Generic 8260 platform initialization */
- m8260_init(r3, r4, r5, r6, r7);
-
- /* Anything special for this platform */
- ppc_md.show_cpuinfo = pq2ads_show_cpuinfo;
-
- callback_setup_arch = ppc_md.setup_arch;
- ppc_md.setup_arch = pq2ads_setup_arch;
-}
+++ /dev/null
-/*
- * arch/ppc/platforms/proc_rtas.c
- * Copyright (C) 2000 Tilmann Bitterberg
- * (tilmann@bitterberg.de)
- *
- * RTAS (Runtime Abstraction Services) stuff
- * Intention is to provide a clean user interface
- * to use the RTAS.
- *
- * TODO:
- * Split off a header file and maybe move it to a different
- * location. Write Documentation on what the /proc/rtas/ entries
- * actually do.
- */
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/proc_fs.h>
-#include <linux/stat.h>
-#include <linux/ctype.h>
-#include <linux/time.h>
-#include <linux/string.h>
-#include <linux/init.h>
-
-#include <asm/uaccess.h>
-#include <asm/bitops.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/machdep.h> /* for ppc_md */
-#include <asm/time.h>
-
-/* Token for Sensors */
-#define KEY_SWITCH 0x0001
-#define ENCLOSURE_SWITCH 0x0002
-#define THERMAL_SENSOR 0x0003
-#define LID_STATUS 0x0004
-#define POWER_SOURCE 0x0005
-#define BATTERY_VOLTAGE 0x0006
-#define BATTERY_REMAINING 0x0007
-#define BATTERY_PERCENTAGE 0x0008
-#define EPOW_SENSOR 0x0009
-#define BATTERY_CYCLESTATE 0x000a
-#define BATTERY_CHARGING 0x000b
-
-/* IBM specific sensors */
-#define IBM_SURVEILLANCE 0x2328 /* 9000 */
-#define IBM_FANRPM 0x2329 /* 9001 */
-#define IBM_VOLTAGE 0x232a /* 9002 */
-#define IBM_DRCONNECTOR 0x232b /* 9003 */
-#define IBM_POWERSUPPLY 0x232c /* 9004 */
-#define IBM_INTQUEUE 0x232d /* 9005 */
-
-/* Status return values */
-#define SENSOR_CRITICAL_HIGH 13
-#define SENSOR_WARNING_HIGH 12
-#define SENSOR_NORMAL 11
-#define SENSOR_WARNING_LOW 10
-#define SENSOR_CRITICAL_LOW 9
-#define SENSOR_SUCCESS 0
-#define SENSOR_HW_ERROR -1
-#define SENSOR_BUSY -2
-#define SENSOR_NOT_EXIST -3
-#define SENSOR_DR_ENTITY -9000
-
-/* Location Codes */
-#define LOC_SCSI_DEV_ADDR 'A'
-#define LOC_SCSI_DEV_LOC 'B'
-#define LOC_CPU 'C'
-#define LOC_DISKETTE 'D'
-#define LOC_ETHERNET 'E'
-#define LOC_FAN 'F'
-#define LOC_GRAPHICS 'G'
-/* reserved / not used 'H' */
-#define LOC_IO_ADAPTER 'I'
-/* reserved / not used 'J' */
-#define LOC_KEYBOARD 'K'
-#define LOC_LCD 'L'
-#define LOC_MEMORY 'M'
-#define LOC_NV_MEMORY 'N'
-#define LOC_MOUSE 'O'
-#define LOC_PLANAR 'P'
-#define LOC_OTHER_IO 'Q'
-#define LOC_PARALLEL 'R'
-#define LOC_SERIAL 'S'
-#define LOC_DEAD_RING 'T'
-#define LOC_RACKMOUNTED 'U' /* for _u_nit is rack mounted */
-#define LOC_VOLTAGE 'V'
-#define LOC_SWITCH_ADAPTER 'W'
-#define LOC_OTHER 'X'
-#define LOC_FIRMWARE 'Y'
-#define LOC_SCSI 'Z'
-
-/* Tokens for indicators */
-#define TONE_FREQUENCY 0x0001 /* 0 - 1000 (HZ)*/
-#define TONE_VOLUME 0x0002 /* 0 - 100 (%) */
-#define SYSTEM_POWER_STATE 0x0003
-#define WARNING_LIGHT 0x0004
-#define DISK_ACTIVITY_LIGHT 0x0005
-#define HEX_DISPLAY_UNIT 0x0006
-#define BATTERY_WARNING_TIME 0x0007
-#define CONDITION_CYCLE_REQUEST 0x0008
-#define SURVEILLANCE_INDICATOR 0x2328 /* 9000 */
-#define DR_ACTION 0x2329 /* 9001 */
-#define DR_INDICATOR 0x232a /* 9002 */
-/* 9003 - 9004: Vendor specific */
-#define GLOBAL_INTERRUPT_QUEUE 0x232d /* 9005 */
-/* 9006 - 9999: Vendor specific */
-
-/* other */
-#define MAX_SENSORS 17 /* I only know of 17 sensors */
-#define MAX_LINELENGTH 256
-#define SENSOR_PREFIX "ibm,sensor-"
-#define cel_to_fahr(x) ((x*9/5)+32)
-
-
-/* Globals */
-static struct proc_dir_entry *proc_rtas;
-static struct rtas_sensors sensors;
-static struct device_node *rtas;
-static unsigned long power_on_time = 0; /* Save the time the user set */
-static char progress_led[MAX_LINELENGTH];
-
-static unsigned long rtas_tone_frequency = 1000;
-static unsigned long rtas_tone_volume = 0;
-
-/* ****************STRUCTS******************************************* */
-struct individual_sensor {
- unsigned int token;
- unsigned int quant;
-};
-
-struct rtas_sensors {
- struct individual_sensor sensor[MAX_SENSORS];
- unsigned int quant;
-};
-
-/* ****************************************************************** */
-/* Declarations */
-static int ppc_rtas_sensor_read(char * buf, char ** start, off_t off,
- int count, int *eof, void *data);
-static ssize_t ppc_rtas_clock_read(struct file * file, char * buf,
- size_t count, loff_t *ppos);
-static ssize_t ppc_rtas_clock_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos);
-static ssize_t ppc_rtas_progress_read(struct file * file, char * buf,
- size_t count, loff_t *ppos);
-static ssize_t ppc_rtas_progress_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos);
-static ssize_t ppc_rtas_poweron_read(struct file * file, char * buf,
- size_t count, loff_t *ppos);
-static ssize_t ppc_rtas_poweron_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos);
-
-static ssize_t ppc_rtas_tone_freq_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos);
-static ssize_t ppc_rtas_tone_freq_read(struct file * file, char * buf,
- size_t count, loff_t *ppos);
-static ssize_t ppc_rtas_tone_volume_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos);
-static ssize_t ppc_rtas_tone_volume_read(struct file * file, char * buf,
- size_t count, loff_t *ppos);
-
-struct file_operations ppc_rtas_poweron_operations = {
- .read = ppc_rtas_poweron_read,
- .write = ppc_rtas_poweron_write
-};
-struct file_operations ppc_rtas_progress_operations = {
- .read = ppc_rtas_progress_read,
- .write = ppc_rtas_progress_write
-};
-
-struct file_operations ppc_rtas_clock_operations = {
- .read = ppc_rtas_clock_read,
- .write = ppc_rtas_clock_write
-};
-
-struct file_operations ppc_rtas_tone_freq_operations = {
- .read = ppc_rtas_tone_freq_read,
- .write = ppc_rtas_tone_freq_write
-};
-struct file_operations ppc_rtas_tone_volume_operations = {
- .read = ppc_rtas_tone_volume_read,
- .write = ppc_rtas_tone_volume_write
-};
-
-int ppc_rtas_find_all_sensors (void);
-int ppc_rtas_process_sensor(struct individual_sensor s, int state,
- int error, char * buf);
-char * ppc_rtas_process_error(int error);
-int get_location_code(struct individual_sensor s, char * buf);
-int check_location_string (char *c, char * buf);
-int check_location (char *c, int idx, char * buf);
-
-/* ****************************************************************** */
-/* MAIN */
-/* ****************************************************************** */
-static int __init proc_rtas_init(void)
-{
- struct proc_dir_entry *entry;
-
- rtas = find_devices("rtas");
- if ((rtas == 0) || (_machine != _MACH_chrp)) {
- return 1;
- }
-
- proc_rtas = proc_mkdir("rtas", 0);
- if (proc_rtas == 0)
- return 1;
-
- /* /proc/rtas entries */
-
- entry = create_proc_entry("progress", S_IRUGO|S_IWUSR, proc_rtas);
- if (entry) entry->proc_fops = &ppc_rtas_progress_operations;
-
- entry = create_proc_entry("clock", S_IRUGO|S_IWUSR, proc_rtas);
- if (entry) entry->proc_fops = &ppc_rtas_clock_operations;
-
- entry = create_proc_entry("poweron", S_IWUSR|S_IRUGO, proc_rtas);
- if (entry) entry->proc_fops = &ppc_rtas_poweron_operations;
-
- create_proc_read_entry("sensors", S_IRUGO, proc_rtas,
- ppc_rtas_sensor_read, NULL);
-
- entry = create_proc_entry("frequency", S_IWUSR|S_IRUGO, proc_rtas);
- if (entry) entry->proc_fops = &ppc_rtas_tone_freq_operations;
-
- entry = create_proc_entry("volume", S_IWUSR|S_IRUGO, proc_rtas);
- if (entry) entry->proc_fops = &ppc_rtas_tone_volume_operations;
-
- return 0;
-}
-__initcall(proc_rtas_init);
-
-/* ****************************************************************** */
-/* POWER-ON-TIME */
-/* ****************************************************************** */
-static ssize_t ppc_rtas_poweron_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos)
-{
- struct rtc_time tm;
- unsigned long nowtime;
- char *dest;
- int error;
-
- nowtime = simple_strtoul(buf, &dest, 10);
- if (*dest != '\0' && *dest != '\n') {
- printk("ppc_rtas_poweron_write: Invalid time\n");
- return count;
- }
- power_on_time = nowtime; /* save the time */
-
- to_tm(nowtime, &tm);
-
- error = call_rtas("set-time-for-power-on", 7, 1, NULL,
- tm.tm_year, tm.tm_mon, tm.tm_mday,
- tm.tm_hour, tm.tm_min, tm.tm_sec, 0 /* nano */);
- if (error != 0)
- printk(KERN_WARNING "error: setting poweron time returned: %s\n",
- ppc_rtas_process_error(error));
- return count;
-}
-/* ****************************************************************** */
-static ssize_t ppc_rtas_poweron_read(struct file * file, char * buf,
- size_t count, loff_t *ppos)
-{
- int n;
- if (power_on_time == 0)
- n = sprintf(buf, "Power on time not set\n");
- else
- n = sprintf(buf, "%lu\n", power_on_time);
-
- if (*ppos >= strlen(buf))
- return 0;
- if (n > strlen(buf) - *ppos)
- n = strlen(buf) - *ppos;
- if (n > count)
- n = count;
- *ppos += n;
- return n;
-}
-
-/* ****************************************************************** */
-/* PROGRESS */
-/* ****************************************************************** */
-static ssize_t ppc_rtas_progress_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos)
-{
- unsigned long hex;
-
- strcpy(progress_led, buf); /* save the string */
- /* Lets see if the user passed hexdigits */
- hex = simple_strtoul(buf, NULL, 10);
-
- ppc_md.progress ((char *)buf, hex);
- return count;
-
- /* clear the line */ /* ppc_md.progress(" ", 0xffff);*/
-}
-/* ****************************************************************** */
-static ssize_t ppc_rtas_progress_read(struct file * file, char * buf,
- size_t count, loff_t *ppos)
-{
- int n = 0;
- if (progress_led != NULL)
- n = sprintf (buf, "%s\n", progress_led);
- if (*ppos >= strlen(buf))
- return 0;
- if (n > strlen(buf) - *ppos)
- n = strlen(buf) - *ppos;
- if (n > count)
- n = count;
- *ppos += n;
- return n;
-}
-
-/* ****************************************************************** */
-/* CLOCK */
-/* ****************************************************************** */
-static ssize_t ppc_rtas_clock_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos)
-{
- struct rtc_time tm;
- unsigned long nowtime;
- char *dest;
- int error;
-
- nowtime = simple_strtoul(buf, &dest, 10);
- if (*dest != '\0' && *dest != '\n') {
- printk("ppc_rtas_clock_write: Invalid time\n");
- return count;
- }
-
- to_tm(nowtime, &tm);
- error = call_rtas("set-time-of-day", 7, 1, NULL,
- tm.tm_year, tm.tm_mon, tm.tm_mday,
- tm.tm_hour, tm.tm_min, tm.tm_sec, 0);
- if (error != 0)
- printk(KERN_WARNING "error: setting the clock returned: %s\n",
- ppc_rtas_process_error(error));
- return count;
-}
-/* ****************************************************************** */
-static ssize_t ppc_rtas_clock_read(struct file * file, char * buf,
- size_t count, loff_t *ppos)
-{
- unsigned int year, mon, day, hour, min, sec;
- unsigned long *ret = kmalloc(4*8, GFP_KERNEL);
- int n, error;
-
- error = call_rtas("get-time-of-day", 0, 8, ret);
-
- year = ret[0]; mon = ret[1]; day = ret[2];
- hour = ret[3]; min = ret[4]; sec = ret[5];
-
- if (error != 0){
- printk(KERN_WARNING "error: reading the clock returned: %s\n",
- ppc_rtas_process_error(error));
- n = sprintf (buf, "0");
- } else {
- n = sprintf (buf, "%lu\n", mktime(year, mon, day, hour, min, sec));
- }
- kfree(ret);
-
- if (*ppos >= strlen(buf))
- return 0;
- if (n > strlen(buf) - *ppos)
- n = strlen(buf) - *ppos;
- if (n > count)
- n = count;
- *ppos += n;
- return n;
-}
-
-/* ****************************************************************** */
-/* SENSOR STUFF */
-/* ****************************************************************** */
-static int ppc_rtas_sensor_read(char * buf, char ** start, off_t off,
- int count, int *eof, void *data)
-{
- int i,j,n;
- unsigned long ret;
- int state, error;
- char buffer[MAX_LINELENGTH*MAX_SENSORS]; /* May not be enough */
-
- if (count < 0)
- return -EINVAL;
-
- n = sprintf ( buffer , "RTAS (RunTime Abstraction Services) Sensor Information\n");
- n += sprintf ( buffer+n, "Sensor\t\tValue\t\tCondition\tLocation\n");
- n += sprintf ( buffer+n, "********************************************************\n");
-
- if (ppc_rtas_find_all_sensors() != 0) {
- n += sprintf ( buffer+n, "\nNo sensors are available\n");
- goto return_string;
- }
-
- for (i=0; i<sensors.quant; i++) {
- j = sensors.sensor[i].quant;
- /* A sensor may have multiple instances */
- while (j >= 0) {
- error = call_rtas("get-sensor-state", 2, 2, &ret,
- sensors.sensor[i].token, sensors.sensor[i].quant-j);
- state = (int) ret;
- n += ppc_rtas_process_sensor(sensors.sensor[i], state, error, buffer+n );
- n += sprintf (buffer+n, "\n");
- j--;
- } /* while */
- } /* for */
-
-return_string:
- if (off >= strlen(buffer)) {
- *eof = 1;
- return 0;
- }
- if (n > strlen(buffer) - off)
- n = strlen(buffer) - off;
- if (n > count)
- n = count;
- else
- *eof = 1;
- memcpy(buf, buffer + off, n);
- *start = buf;
- return n;
-}
-
-/* ****************************************************************** */
-
-int ppc_rtas_find_all_sensors (void)
-{
- unsigned long *utmp;
- int len, i, j;
-
- utmp = (unsigned long *) get_property(rtas, "rtas-sensors", &len);
- if (utmp == NULL) {
- printk (KERN_ERR "error: could not get rtas-sensors\n");
- return 1;
- }
-
- sensors.quant = len / 8; /* int + int */
-
- for (i=0, j=0; j<sensors.quant; i+=2, j++) {
- sensors.sensor[j].token = utmp[i];
- sensors.sensor[j].quant = utmp[i+1];
- }
- return 0;
-}
-
-/* ****************************************************************** */
-/*
- * Builds a string of what rtas returned
- */
-char * ppc_rtas_process_error(int error)
-{
- switch (error) {
- case SENSOR_CRITICAL_HIGH:
- return "(critical high)";
- case SENSOR_WARNING_HIGH:
- return "(warning high)";
- case SENSOR_NORMAL:
- return "(normal)";
- case SENSOR_WARNING_LOW:
- return "(warning low)";
- case SENSOR_CRITICAL_LOW:
- return "(critical low)";
- case SENSOR_SUCCESS:
- return "(read ok)";
- case SENSOR_HW_ERROR:
- return "(hardware error)";
- case SENSOR_BUSY:
- return "(busy)";
- case SENSOR_NOT_EXIST:
- return "(non existant)";
- case SENSOR_DR_ENTITY:
- return "(dr entity removed)";
- default:
- return "(UNKNOWN)";
- }
-}
-
-/* ****************************************************************** */
-/*
- * Builds a string out of what the sensor said
- */
-
-int ppc_rtas_process_sensor(struct individual_sensor s, int state,
- int error, char * buf)
-{
- /* Defined return vales */
- const char * key_switch[] = { "Off\t", "Normal\t", "Secure\t", "Mainenance" };
- const char * enclosure_switch[] = { "Closed", "Open" };
- const char * lid_status[] = { " ", "Open", "Closed" };
- const char * power_source[] = { "AC\t", "Battery", "AC & Battery" };
- const char * battery_remaining[] = { "Very Low", "Low", "Mid", "High" };
- const char * epow_sensor[] = {
- "EPOW Reset", "Cooling warning", "Power warning",
- "System shutdown", "System halt", "EPOW main enclosure",
- "EPOW power off" };
- const char * battery_cyclestate[] = { "None", "In progress", "Requested" };
- const char * battery_charging[] = { "Charging", "Discharching", "No current flow" };
- const char * ibm_drconnector[] = { "Empty", "Present" };
- const char * ibm_intqueue[] = { "Disabled", "Enabled" };
-
- int have_strings = 0;
- int temperature = 0;
- int unknown = 0;
- int n = 0;
-
- /* What kind of sensor do we have here? */
- switch (s.token) {
- case KEY_SWITCH:
- n += sprintf(buf+n, "Key switch:\t");
- n += sprintf(buf+n, "%s\t", key_switch[state]);
- have_strings = 1;
- break;
- case ENCLOSURE_SWITCH:
- n += sprintf(buf+n, "Enclosure switch:\t");
- n += sprintf(buf+n, "%s\t", enclosure_switch[state]);
- have_strings = 1;
- break;
- case THERMAL_SENSOR:
- n += sprintf(buf+n, "Temp. (°C/°F):\t");
- temperature = 1;
- break;
- case LID_STATUS:
- n += sprintf(buf+n, "Lid status:\t");
- n += sprintf(buf+n, "%s\t", lid_status[state]);
- have_strings = 1;
- break;
- case POWER_SOURCE:
- n += sprintf(buf+n, "Power source:\t");
- n += sprintf(buf+n, "%s\t", power_source[state]);
- have_strings = 1;
- break;
- case BATTERY_VOLTAGE:
- n += sprintf(buf+n, "Battery voltage:\t");
- break;
- case BATTERY_REMAINING:
- n += sprintf(buf+n, "Battery remaining:\t");
- n += sprintf(buf+n, "%s\t", battery_remaining[state]);
- have_strings = 1;
- break;
- case BATTERY_PERCENTAGE:
- n += sprintf(buf+n, "Battery percentage:\t");
- break;
- case EPOW_SENSOR:
- n += sprintf(buf+n, "EPOW Sensor:\t");
- n += sprintf(buf+n, "%s\t", epow_sensor[state]);
- have_strings = 1;
- break;
- case BATTERY_CYCLESTATE:
- n += sprintf(buf+n, "Battery cyclestate:\t");
- n += sprintf(buf+n, "%s\t", battery_cyclestate[state]);
- have_strings = 1;
- break;
- case BATTERY_CHARGING:
- n += sprintf(buf+n, "Battery Charging:\t");
- n += sprintf(buf+n, "%s\t", battery_charging[state]);
- have_strings = 1;
- break;
- case IBM_SURVEILLANCE:
- n += sprintf(buf+n, "Surveillance:\t");
- break;
- case IBM_FANRPM:
- n += sprintf(buf+n, "Fan (rpm):\t");
- break;
- case IBM_VOLTAGE:
- n += sprintf(buf+n, "Voltage (mv):\t");
- break;
- case IBM_DRCONNECTOR:
- n += sprintf(buf+n, "DR connector:\t");
- n += sprintf(buf+n, "%s\t", ibm_drconnector[state]);
- have_strings = 1;
- break;
- case IBM_POWERSUPPLY:
- n += sprintf(buf+n, "Powersupply:\t");
- break;
- case IBM_INTQUEUE:
- n += sprintf(buf+n, "Interrupt queue:\t");
- n += sprintf(buf+n, "%s\t", ibm_intqueue[state]);
- have_strings = 1;
- break;
- default:
- n += sprintf(buf+n, "Unkown sensor (type %d), ignoring it\n",
- s.token);
- unknown = 1;
- have_strings = 1;
- break;
- }
- if (have_strings == 0) {
- if (temperature) {
- n += sprintf(buf+n, "%4d /%4d\t", state, cel_to_fahr(state));
- } else
- n += sprintf(buf+n, "%10d\t", state);
- }
- if (unknown == 0) {
- n += sprintf ( buf+n, "%s\t", ppc_rtas_process_error(error));
- n += get_location_code(s, buf+n);
- }
- return n;
-}
-
-/* ****************************************************************** */
-
-int check_location (char *c, int idx, char * buf)
-{
- int n = 0;
-
- switch (*(c+idx)) {
- case LOC_PLANAR:
- n += sprintf ( buf, "Planar #%c", *(c+idx+1));
- break;
- case LOC_CPU:
- n += sprintf ( buf, "CPU #%c", *(c+idx+1));
- break;
- case LOC_FAN:
- n += sprintf ( buf, "Fan #%c", *(c+idx+1));
- break;
- case LOC_RACKMOUNTED:
- n += sprintf ( buf, "Rack #%c", *(c+idx+1));
- break;
- case LOC_VOLTAGE:
- n += sprintf ( buf, "Voltage #%c", *(c+idx+1));
- break;
- case LOC_LCD:
- n += sprintf ( buf, "LCD #%c", *(c+idx+1));
- break;
- case '.':
- n += sprintf ( buf, "- %c", *(c+idx+1));
- default:
- n += sprintf ( buf, "Unknown location");
- break;
- }
- return n;
-}
-
-
-/* ****************************************************************** */
-/*
- * Format:
- * ${LETTER}${NUMBER}[[-/]${LETTER}${NUMBER} [ ... ] ]
- * the '.' may be an abbrevation
- */
-int check_location_string (char *c, char *buf)
-{
- int n=0,i=0;
-
- while (c[i]) {
- if (isalpha(c[i]) || c[i] == '.') {
- n += check_location(c, i, buf+n);
- }
- else if (c[i] == '/' || c[i] == '-')
- n += sprintf(buf+n, " at ");
- i++;
- }
- return n;
-}
-
-
-/* ****************************************************************** */
-
-int get_location_code(struct individual_sensor s, char * buffer)
-{
- char rstr[512], tmp[10], tmp2[10];
- int n=0, i=0, llen, len;
- /* char *buf = kmalloc(MAX_LINELENGTH, GFP_KERNEL); */
- char *ret;
-
- static int pos = 0; /* remember position where buffer was */
-
- /* construct the sensor number like 0003 */
- /* fill with zeros */
- n = sprintf(tmp, "%d", s.token);
- len = strlen(tmp);
- while (strlen(tmp) < 4)
- n += sprintf (tmp+n, "0");
-
- /* invert the string */
- while (tmp[i]) {
- if (i<len)
- tmp2[4-len+i] = tmp[i];
- else
- tmp2[3-i] = tmp[i];
- i++;
- }
- tmp2[4] = '\0';
-
- sprintf (rstr, SENSOR_PREFIX"%s", tmp2);
-
- ret = (char *) get_property(rtas, rstr, &llen);
-
- n=0;
- if (ret[0] == '\0')
- n += sprintf ( buffer+n, "--- ");/* does not have a location */
- else {
- char t[50];
- ret += pos;
-
- n += check_location_string(ret, buffer + n);
- n += sprintf ( buffer+n, " ");
- /* see how many characters we have printed */
- sprintf ( t, "%s ", ret);
-
- pos += strlen(t);
- if (pos >= llen) pos=0;
- }
- return n;
-}
-/* ****************************************************************** */
-/* INDICATORS - Tone Frequency */
-/* ****************************************************************** */
-static ssize_t ppc_rtas_tone_freq_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos)
-{
- unsigned long freq;
- char *dest;
- int error;
- freq = simple_strtoul(buf, &dest, 10);
- if (*dest != '\0' && *dest != '\n') {
- printk("ppc_rtas_tone_freq_write: Invalid tone freqency\n");
- return count;
- }
- if (freq < 0) freq = 0;
- rtas_tone_frequency = freq; /* save it for later */
- error = call_rtas("set-indicator", 3, 1, NULL,
- TONE_FREQUENCY, 0, freq);
- if (error != 0)
- printk(KERN_WARNING "error: setting tone frequency returned: %s\n",
- ppc_rtas_process_error(error));
- return count;
-}
-/* ****************************************************************** */
-static ssize_t ppc_rtas_tone_freq_read(struct file * file, char * buf,
- size_t count, loff_t *ppos)
-{
- int n;
- n = sprintf(buf, "%lu\n", rtas_tone_frequency);
-
- if (*ppos >= strlen(buf))
- return 0;
- if (n > strlen(buf) - *ppos)
- n = strlen(buf) - *ppos;
- if (n > count)
- n = count;
- *ppos += n;
- return n;
-}
-/* ****************************************************************** */
-/* INDICATORS - Tone Volume */
-/* ****************************************************************** */
-static ssize_t ppc_rtas_tone_volume_write(struct file * file, const char * buf,
- size_t count, loff_t *ppos)
-{
- unsigned long volume;
- char *dest;
- int error;
- volume = simple_strtoul(buf, &dest, 10);
- if (*dest != '\0' && *dest != '\n') {
- printk("ppc_rtas_tone_volume_write: Invalid tone volume\n");
- return count;
- }
- if (volume < 0) volume = 0;
- if (volume > 100) volume = 100;
-
- rtas_tone_volume = volume; /* save it for later */
- error = call_rtas("set-indicator", 3, 1, NULL,
- TONE_VOLUME, 0, volume);
- if (error != 0)
- printk(KERN_WARNING "error: setting tone volume returned: %s\n",
- ppc_rtas_process_error(error));
- return count;
-}
-/* ****************************************************************** */
-static ssize_t ppc_rtas_tone_volume_read(struct file * file, char * buf,
- size_t count, loff_t *ppos)
-{
- int n;
- n = sprintf(buf, "%lu\n", rtas_tone_volume);
-
- if (*ppos >= strlen(buf))
- return 0;
- if (n > strlen(buf) - *ppos)
- n = strlen(buf) - *ppos;
- if (n > count)
- n = count;
- *ppos += n;
- return n;
-}
+++ /dev/null
-/*
- * include/asm-ppc/platforms/prpmc750_serial.h
- *
- * Motorola PrPMC750 serial support
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_PRPMC750_SERIAL_H__
-#define __ASM_PRPMC750_SERIAL_H__
-
-#include <linux/config.h>
-#include <platforms/prpmc750.h>
-
-#define RS_TABLE_SIZE 4
-
-/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
-#define BASE_BAUD (PRPMC750_BASE_BAUD / 16)
-
-#ifndef SERIAL_MAGIC_KEY
-#define kernel_debugger ppc_kernel_debug
-#endif
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
-#endif
-
-#define SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, PRPMC750_SERIAL_0, 1, STD_COM_FLAGS, \
- iomem_base: (unsigned char *)PRPMC750_SERIAL_0, \
- iomem_reg_shift: 4, \
- io_type: SERIAL_IO_MEM } /* ttyS0 */
-
-#endif /* __ASM_PRPMC750_SERIAL_H__ */
-#endif /* __KERNEL__ */
+++ /dev/null
-/*
- * arch/ppc/platforms/prpmc800_serial.h
- *
- * Definitions for Motorola MCG PRPMC800 cPCI board support
- *
- * Author: Dale Farnsworth dale.farnsworth@mvista.com
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __ASMPPC_PRPMC800_SERIAL_H
-#define __ASMPPC_PRPMC800_SERIAL_H
-
-#include <linux/config.h>
-#include <platforms/prpmc800.h>
-
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define RS_TABLE_SIZE 64
-#else
-#define RS_TABLE_SIZE 4
-#endif
-
-/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
-#define BASE_BAUD (PRPMC800_BASE_BAUD / 16)
-
-#ifndef SERIAL_MAGIC_KEY
-#define kernel_debugger ppc_kernel_debug
-#endif
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
-#endif
-
-/* UARTS are at IRQ 16 */
-#define STD_SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, PRPMC800_SERIAL_1, 16, STD_COM_FLAGS, /* ttyS0 */\
- iomem_base: (unsigned char *)PRPMC800_SERIAL_1, \
- iomem_reg_shift: 0, \
- io_type: SERIAL_IO_MEM },
-
-#define SERIAL_PORT_DFNS \
- STD_SERIAL_PORT_DFNS
-
-#endif /* __ASMPPC_PRPMC800_SERIAL_H */
+++ /dev/null
-/*
- * arch/ppc/platforms/rpx8260.c
- *
- * RPC EP8260 platform support
- *
- * Author: Dan Malek <dan@embeddededge.com>
- * Derived from: pq2ads_setup.c by Kumar
- *
- * Copyright 2004 Embedded Edge, LLC
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/config.h>
-#include <linux/seq_file.h>
-
-#include <asm/mpc8260.h>
-#include <asm/machdep.h>
-
-static void (*callback_setup_arch)(void);
-
-extern unsigned char __res[sizeof(bd_t)];
-
-extern void m8260_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, unsigned long r7);
-
-static int
-ep8260_show_cpuinfo(struct seq_file *m)
-{
- bd_t *binfo = (bd_t *)__res;
-
- seq_printf(m, "vendor\t\t: RPC\n"
- "machine\t\t: EP8260 PPC\n"
- "\n"
- "mem size\t\t: 0x%08x\n"
- "console baud\t\t: %d\n"
- "\n",
- binfo->bi_memsize,
- binfo->bi_baudrate);
- return 0;
-}
-
-static void __init
-ep8260_setup_arch(void)
-{
- printk("RPC EP8260 Port\n");
- callback_setup_arch();
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- /* Generic 8260 platform initialization */
- m8260_init(r3, r4, r5, r6, r7);
-
- /* Anything special for this platform */
- ppc_md.show_cpuinfo = ep8260_show_cpuinfo;
-
- callback_setup_arch = ppc_md.setup_arch;
- ppc_md.setup_arch = ep8260_setup_arch;
-}
+++ /dev/null
-/*
- * A collection of structures, addresses, and values associated with
- * the Embedded Planet RPX6 (or RPX Super) MPC8260 board.
- * Copied from the RPX-Classic and SBS8260 stuff.
- *
- * Copyright (c) 2001 Dan Malek <dan@embeddededge.com>
- */
-#ifdef __KERNEL__
-#ifndef __ASM_PLATFORMS_RPXSUPER_H__
-#define __ASM_PLATFORMS_RPXSUPER_H__
-
-/* A Board Information structure that is given to a program when
- * prom starts it up.
- */
-typedef struct bd_info {
- unsigned int bi_memstart; /* Memory start address */
- unsigned int bi_memsize; /* Memory (end) size in bytes */
- unsigned int bi_nvsize; /* NVRAM size in bytes (can be 0) */
- unsigned int bi_intfreq; /* Internal Freq, in Hz */
- unsigned int bi_busfreq; /* Bus Freq, in MHz */
- unsigned int bi_cpmfreq; /* CPM Freq, in MHz */
- unsigned int bi_brgfreq; /* BRG Freq, in MHz */
- unsigned int bi_vco; /* VCO Out from PLL */
- unsigned int bi_baudrate; /* Default console baud rate */
- unsigned int bi_immr; /* IMMR when called from boot rom */
- unsigned char bi_enetaddr[6];
-} bd_t;
-
-extern bd_t m8xx_board_info;
-
-/* Memory map is configured by the PROM startup.
- * We just map a few things we need. The CSR is actually 4 byte-wide
- * registers that can be accessed as 8-, 16-, or 32-bit values.
- */
-#define IMAP_ADDR ((uint)0xf0000000)
-#define RPX_CSR_ADDR ((uint)0xfa000000)
-#define RPX_CSR_SIZE ((uint)(512 * 1024))
-#define RPX_NVRTC_ADDR ((uint)0xfa080000)
-#define RPX_NVRTC_SIZE ((uint)(512 * 1024))
-
-/* The RPX6 has 16, byte wide control/status registers.
- * Not all are used (yet).
- */
-extern volatile u_char *rpx6_csr_addr;
-
-/* Things of interest in the CSR.
-*/
-#define BCSR0_ID_MASK ((u_char)0xf0) /* Read only */
-#define BCSR0_SWITCH_MASK ((u_char)0x0f) /* Read only */
-#define BCSR1_XCVR_SMC1 ((u_char)0x80)
-#define BCSR1_XCVR_SMC2 ((u_char)0x40)
-#define BCSR2_FLASH_WENABLE ((u_char)0x20)
-#define BCSR2_NVRAM_ENABLE ((u_char)0x10)
-#define BCSR2_ALT_IRQ2 ((u_char)0x08)
-#define BCSR2_ALT_IRQ3 ((u_char)0x04)
-#define BCSR2_PRST ((u_char)0x02) /* Force reset */
-#define BCSR2_ENPRST ((u_char)0x01) /* Enable POR */
-#define BCSR3_MODCLK_MASK ((u_char)0xe0)
-#define BCSR3_ENCLKHDR ((u_char)0x10)
-#define BCSR3_LED5 ((u_char)0x04) /* 0 == on */
-#define BCSR3_LED6 ((u_char)0x02) /* 0 == on */
-#define BCSR3_LED7 ((u_char)0x01) /* 0 == on */
-#define BCSR4_EN_PHY ((u_char)0x80) /* Enable PHY */
-#define BCSR4_EN_MII ((u_char)0x40) /* Enable PHY */
-#define BCSR4_MII_READ ((u_char)0x04)
-#define BCSR4_MII_MDC ((u_char)0x02)
-#define BCSR4_MII_MDIO ((u_char)0x02)
-#define BCSR13_FETH_IRQMASK ((u_char)0xf0)
-#define BCSR15_FETH_IRQ ((u_char)0x20)
-
-#endif /* __ASM_PLATFORMS_RPXSUPER_H__ */
-#endif /* __KERNEL__ */
+++ /dev/null
-/*
- * arch/ppc/syslib/gt64260_common.c
- *
- * Common routines for the Marvell/Galileo GT64260 (Discovery) host bridge,
- * interrupt controller, memory controller, serial controller, enet controller,
- * etc.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * The GT64260 port is the result of hard work from many people from
- * many companies. In particular, employees of Marvell/Galileo, Mission
- * Critical Linux, Xyterra, and MontaVista Software were heavily involved.
- */
-
-/*
- * At last count, the 64260-B-0 has 65 errata and 24 restrictions. The odds of
- * you getting it to work well, under stress, for a long period of time are
- * low. If nothing else, you will likely run into an interrupt controller
- * bug.
- *
- * The newer 64260A-B-0 is much improved but has its own problems.
- * Dave Wilhardt <dwilhardt@zyterra.com> has discovered that you must set
- * up your PCI snoop regions to be prefetchable with 4-word bursts AND set the
- * "Memory Write and Invalidate bit" (bit 4) in the cmd reg of each PCI device
- * before coherency works between PCI and other devices. Many thanks to Dave.
- *
- * So far this code has been tested on Marvell/Galileo EV-64260-BP and
- * an EV-64260A-BP uni-processor boards with 750 and 7400 processors.
- * It has not yet been tested with a 7410 or 7450, or on an smp system.
- *
- * Note: I have not had any luck moving the base register address of the bridge
- * with the gt64260_set_base() routine. I move it in the bootloader
- * before starting the kernel. I haven't really looked into it so it
- * may be an easy fix. -- MAG
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/gt64260.h>
-#include <asm/delay.h>
-
-
-u32 gt64260_base; /* Virtual base address of 64260's regs */
-u32 gt64260_revision; /* Revision of the chip */
-u8 gt64260_pci_exclude_bridge = TRUE;
-
-
-/*
- *****************************************************************************
- *
- * Bridge Initialization Routines
- *
- *****************************************************************************
- */
-static void gt64260_check_errata(struct pci_controller *hose_a,
- struct pci_controller *hose_b);
-
-/*
- * Typical '_find_bridges()' routine for boards with a GT64260 bridge.
- */
-int __init
-gt64260_find_bridges(u32 phys_base_addr, gt64260_bridge_info_t *info,
- int ((*map_irq)(struct pci_dev *, unsigned char, unsigned char)))
-{
- struct pci_controller *hose_a, *hose_b;
- u32 io_base_a, io_base_b;
- int rc;
-
-
- gt64260_base = (u32)ioremap(phys_base_addr,GT64260_INTERNAL_SPACE_SIZE);
-
- hose_a = pcibios_alloc_controller();
- if (!hose_a)
- return -1;
-
- hose_b = pcibios_alloc_controller();
- if (!hose_b)
- return -1;
-
- info->hose_a = hose_a;
- info->hose_b = hose_b;
-
- /* Ends up mapping PCI Config addr/data pairs twice */
- setup_indirect_pci(hose_a,
- phys_base_addr + GT64260_PCI_0_CONFIG_ADDR,
- phys_base_addr + GT64260_PCI_0_CONFIG_DATA);
-
- setup_indirect_pci(hose_b,
- phys_base_addr + GT64260_PCI_1_CONFIG_ADDR,
- phys_base_addr + GT64260_PCI_1_CONFIG_DATA);
-
- if ((rc = gt64260_bridge_init(info)) != 0) {
- iounmap((void *)hose_a->cfg_addr);
- iounmap((void *)hose_a->cfg_data);
- iounmap((void *)hose_b->cfg_addr);
- iounmap((void *)hose_b->cfg_data);
- iounmap((void *)gt64260_base);
- return rc;
- }
-
- /* ioremap PCI I/O regions */
- io_base_b = (u32)ioremap(info->pci_1_io_start_proc,info->pci_1_io_size);
- io_base_a = (u32)ioremap(info->pci_0_io_start_proc,info->pci_0_io_size);
- isa_io_base = io_base_a;
-
- hose_a->first_busno = 0;
- hose_a->last_busno = 0xff;
-
- pci_init_resource(&hose_a->io_resource,
- 0, /* really: io_base_a - isa_io_base */
- info->pci_0_io_size - 1,
- IORESOURCE_IO,
- "host bridge PCI bus 0");
- hose_a->io_space.start = info->pci_0_io_start_pci;
- hose_a->io_space.end = info->pci_0_io_start_pci +
- info->pci_0_io_size - 1;
- hose_a->io_base_virt = (void *)isa_io_base;
-
- pci_init_resource(&hose_a->mem_resources[0],
- info->pci_0_mem_start_proc,
- info->pci_0_mem_start_proc + info->pci_0_mem_size - 1,
- IORESOURCE_MEM,
- "host bridge PCI bus 0");
- hose_a->mem_space.start = info->pci_0_mem_start_pci_lo;
- hose_a->mem_space.end = info->pci_0_mem_start_pci_lo +
- info->pci_0_mem_size - 1;
- hose_a->pci_mem_offset = (info->pci_0_mem_start_proc -
- info->pci_0_mem_start_pci_lo);
-
- hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
-
-
- hose_b->first_busno = hose_a->last_busno + 1;
- hose_b->bus_offset = hose_b->first_busno;
- hose_b->last_busno = 0xff;
-
- pci_init_resource(&hose_b->io_resource,
- io_base_b - isa_io_base,
- io_base_b - isa_io_base + info->pci_1_io_size - 1,
- IORESOURCE_IO,
- "host bridge PCI bus 1");
- hose_b->io_space.start = info->pci_1_io_start_pci;
- hose_b->io_space.end = info->pci_1_io_start_pci +
- info->pci_1_io_size - 1;
- hose_b->io_base_virt = (void *)isa_io_base;
-
- pci_init_resource(&hose_b->mem_resources[0],
- info->pci_1_mem_start_proc,
- info->pci_1_mem_start_proc + info->pci_1_mem_size - 1,
- IORESOURCE_MEM,
- "host bridge PCI bus 1");
- hose_b->mem_space.start = info->pci_1_mem_start_pci_lo;
- hose_b->mem_space.end = info->pci_1_mem_start_pci_lo +
- info->pci_1_mem_size - 1;
- hose_b->pci_mem_offset = (info->pci_1_mem_start_proc -
- info->pci_1_mem_start_pci_lo);
-
- hose_b->last_busno = pciauto_bus_scan(hose_b, hose_b->first_busno);
-
-
- ppc_md.pci_exclude_device = gt64260_pci_exclude_device;
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = map_irq;
-
- return 0;
-} /* gt64260_find_bridges() */
-
-/*
- * gt64260_bridge_init()
- *
- * Perform bridge initialization for a "typical" setup for a PPC system.
- */
-int __init
-gt64260_bridge_init(gt64260_bridge_info_t *info)
-{
- int window;
- u16 u16_val;
- u32 u32_val;
- int rc = 0;
- u8 save_exclude;
-
- /*
- * Count on firmware to set/clear other bits in this register.
- *
- * Set CPU CONFIG Reg bit:
- * bit 13 - Pipeline
- * bit 16 - RdOOO
- *
- * Clear CPU Config Reg bit:
- * bit 12 - endianess
- * bit 27 - RemapWrDis
- */
- u32_val = gt_read(GT64260_CPU_CONFIG);
- u32_val |= ((1<<13) | (1<<16));
- u32_val &= ~((1<<8) | (1<<12) | (1<<27));
- gt_write(GT64260_CPU_CONFIG, u32_val);
-
- /* PCI 0/1 Timeout and Retry limits */
- u32_val = gt_read(GT64260_PCI_0_TO_RETRY);
- u32_val |= 0x0000ffff;
- gt_write(GT64260_PCI_0_TO_RETRY, u32_val);
-
- u32_val = gt_read(GT64260_PCI_1_TO_RETRY);
- u32_val |= 0x0000ffff;
- gt_write(GT64260_PCI_1_TO_RETRY, u32_val);
-
- save_exclude = gt64260_pci_exclude_bridge;
- gt64260_pci_exclude_bridge = FALSE;
-
- /* Set class code to indicate host bridge */
- early_read_config_dword(info->hose_a,
- info->hose_a->first_busno,
- PCI_DEVFN(0,0),
- PCI_CLASS_REVISION,
- &u32_val);
- u32_val &= 0x000000ff;
- gt64260_revision = u32_val; /* a 64260 or 64260A? */
- u32_val |= (PCI_CLASS_BRIDGE_HOST << 16);
- early_write_config_dword(info->hose_a,
- info->hose_a->first_busno,
- PCI_DEVFN(0,0),
- PCI_CLASS_REVISION,
- u32_val);
-
- early_read_config_dword(info->hose_b,
- info->hose_b->first_busno,
- PCI_DEVFN(0,0),
- PCI_CLASS_REVISION,
- &u32_val);
- u32_val &= 0x000000ff;
- u32_val |= (PCI_CLASS_BRIDGE_HOST << 16);
- early_write_config_dword(info->hose_b,
- info->hose_b->first_busno,
- PCI_DEVFN(0,0),
- PCI_CLASS_REVISION,
- u32_val);
-
- /* Enable 64260 to be PCI master & respond to PCI MEM cycles */
- early_read_config_word(info->hose_a,
- info->hose_a->first_busno,
- PCI_DEVFN(0,0),
- PCI_COMMAND,
- &u16_val);
- u16_val |= (PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
- early_write_config_word(info->hose_a,
- info->hose_a->first_busno,
- PCI_DEVFN(0,0),
- PCI_COMMAND,
- u16_val);
-
- early_read_config_word(info->hose_b,
- info->hose_b->first_busno,
- PCI_DEVFN(0,0),
- PCI_COMMAND,
- &u16_val);
- u16_val |= (PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
- early_write_config_word(info->hose_b,
- info->hose_b->first_busno,
- PCI_DEVFN(0,0),
- PCI_COMMAND,
- u16_val);
-
- gt64260_pci_exclude_bridge = save_exclude;
-
- /*
- * Disable all CPU windows on the bridge except for SCS 0 which
- * is covering all of system memory.:
- */
- gt64260_cpu_disable_all_windows();
-
- /*
- * Set CPU snoop window to indicate all of system memory
- * is covered with wirte-back cache.
- */
- gt64260_cpu_snoop_set_window(0,
- 0x00000000,
- info->mem_size,
- GT64260_CPU_SNOOP_WB);
-
- /*
- * Set up CPU->PCI mappings (so CPU can get at PCI dev regs/mem).
- * Will only use one of the four CPU->PCI MEM windows on each bus.
- */
- gt64260_cpu_set_pci_io_window(0,
- info->pci_0_io_start_proc,
- info->pci_0_io_start_pci,
- info->pci_0_io_size,
- info->pci_0_io_swap);
-
- gt64260_cpu_set_pci_mem_window(0,
- 0,
- info->pci_0_mem_start_proc,
- info->pci_0_mem_start_pci_hi,
- info->pci_0_mem_start_pci_lo,
- info->pci_0_mem_size,
- info->pci_0_mem_swap);
-
- gt64260_cpu_set_pci_io_window(1,
- info->pci_1_io_start_proc,
- info->pci_1_io_start_pci,
- info->pci_1_io_size,
- info->pci_1_io_swap);
-
- gt64260_cpu_set_pci_mem_window(1,
- 0,
- info->pci_1_mem_start_proc,
- info->pci_1_mem_start_pci_hi,
- info->pci_1_mem_start_pci_lo,
- info->pci_1_mem_size,
- info->pci_1_mem_swap);
-
- /*
- * Set up PCI MEM->system memory mapping (bridge slave PCI window).
- *
- * Set BAR enables to allow only the SCS0 slave window to respond
- * to PCI read/write cycles.
- */
- gt64260_pci_bar_enable(0, GT64260_PCI_SLAVE_BAR_REG_ENABLES_SCS_0);
- gt64260_pci_bar_enable(1, GT64260_PCI_SLAVE_BAR_REG_ENABLES_SCS_0);
-
- /*
- * For virt_to_bus & bus_to_virt to work correctly, this mapping
- * must be the same on both PCI buses.
- */
- gt64260_pci_slave_scs_set_window(info->hose_a,
- 0,
- 0x00000000,
- 0x00000000,
- info->mem_size);
-
- gt64260_pci_slave_scs_set_window(info->hose_b,
- 0,
- 0x00000000,
- 0x00000000,
- info->mem_size);
- pci_dram_offset = 0; /* System mem at same addr on PCI & cpu bus */
-
- /* Disable all the access control windows */
- for (window=0; window<GT64260_PCI_ACC_CNTL_WINDOWS; window++) {
- gt64260_pci_acc_cntl_set_window(0, window, 0, 0, 0, 0);
- gt64260_pci_acc_cntl_set_window(1, window, 0, 0, 0, 0);
- }
-
- /* Disable all the PCI snoop regions */
- for (window=0; window<GT64260_PCI_SNOOP_WINDOWS; window++) {
- gt64260_pci_snoop_set_window(0, window, 0, 0, 0, 0);
- gt64260_pci_snoop_set_window(1, window, 0, 0, 0, 0);
- }
-
- gt64260_pci_acc_cntl_set_window(0,
- 0,
- 0x00000000,
- 0x00000000,
- info->mem_size,
- (GT64260_PCI_ACC_CNTL_PREFETCHEN |
- GT64260_PCI_ACC_CNTL_MBURST_4_WORDS |
- GT64260_PCI_ACC_CNTL_SWAP_BYTE));
-
- gt64260_pci_acc_cntl_set_window(1,
- 0,
- 0x00000000,
- 0x00000000,
- info->mem_size,
- (GT64260_PCI_ACC_CNTL_PREFETCHEN |
- GT64260_PCI_ACC_CNTL_MBURST_4_WORDS |
- GT64260_PCI_ACC_CNTL_SWAP_BYTE));
-
- gt64260_pci_snoop_set_window(0,
- 0,
- 0x00000000,
- 0x00000000,
- info->mem_size,
- GT64260_PCI_SNOOP_WB);
-
- gt64260_pci_snoop_set_window(1,
- 0,
- 0x00000000,
- 0x00000000,
- info->mem_size,
- GT64260_PCI_SNOOP_WB);
-
- gt64260_check_errata(info->hose_a, info->hose_b);
-
-
- /* Set latency timer (to 64) & cacheline size; clear BIST */
- gt64260_pci_exclude_bridge = FALSE;
- u32_val = ((0x04 << 8) | (L1_CACHE_LINE_SIZE / 4));
-
- early_write_config_dword(info->hose_a,
- info->hose_a->first_busno,
- PCI_DEVFN(0,0),
- PCI_CACHE_LINE_SIZE,
- u32_val);
- early_write_config_dword(info->hose_b,
- info->hose_b->first_busno,
- PCI_DEVFN(0,0),
- PCI_CACHE_LINE_SIZE,
- u32_val);
- gt64260_pci_exclude_bridge = TRUE;
-
- return rc;
-} /* gt64260_bridge_init() */
-
-/*
- * gt64260_check_errata()
- *
- * Apply applicable errata and restrictions from 0.5 of the
- * Errata and Restrictions document from Marvell/Galileo.
- */
-static void __init
-gt64260_check_errata(struct pci_controller *hose_a,
- struct pci_controller *hose_b)
-{
- u32 val;
- u8 save_exclude;
-
- /* Currently 2 versions, 64260 and 64260A */
- if (gt64260_revision == GT64260) {
- save_exclude = gt64260_pci_exclude_bridge;
- gt64260_pci_exclude_bridge = FALSE;
-
- /* FEr#5, FEr#12 */
- early_read_config_dword(hose_a,
- hose_a->first_busno,
- PCI_DEVFN(0,0),
- PCI_COMMAND,
- &val);
- val &= ~(PCI_COMMAND_INVALIDATE | PCI_COMMAND_PARITY);
- early_write_config_dword(hose_a,
- hose_a->first_busno,
- PCI_DEVFN(0,0),
- PCI_COMMAND,
- val);
-
- early_read_config_dword(hose_b,
- hose_b->first_busno,
- PCI_DEVFN(0,0),
- PCI_COMMAND,
- &val);
- val &= ~(PCI_COMMAND_INVALIDATE | PCI_COMMAND_PARITY);
- early_write_config_dword(hose_b,
- hose_b->first_busno,
- PCI_DEVFN(0,0),
- PCI_COMMAND,
- val);
- gt64260_pci_exclude_bridge = save_exclude;
-
- /* FEr#12, FEr#13 */
- gt_clr_bits(GT64260_PCI_0_CMD, ((1<<4) | (1<<5) | (1<<9)));
- gt_clr_bits(GT64260_PCI_1_CMD, ((1<<4) | (1<<5) | (1<<9)));
-
- /* FEr#54 */
- gt_clr_bits(GT64260_CPU_SNOOP_BASE_0, 0xfffcf000);
- gt_clr_bits(GT64260_CPU_SNOOP_BASE_1, 0xfffcf000);
- gt_clr_bits(GT64260_CPU_SNOOP_BASE_2, 0xfffcf000);
- gt_clr_bits(GT64260_CPU_SNOOP_BASE_3, 0xfffcf000);
-
- /* R#18 */
- gt_set_bits(GT64260_SDRAM_CONFIG, (1<<26));
-
- } else if (gt64260_revision == GT64260A) {
- /* R#18 */
- gt_set_bits(GT64260_SDRAM_CONFIG, (1<<26));
-
- /* No longer errata so turn on */
- gt_set_bits(GT64260_PCI_0_CMD, ((1<<4) | (1<<5) | (1<<9)));
- gt_set_bits(GT64260_PCI_1_CMD, ((1<<4) | (1<<5) | (1<<9)));
- }
-} /* gt64260_check_errata() */
-
-
-/*
- *****************************************************************************
- *
- * General Window Setting Routines
- *
- *****************************************************************************
- */
-
-static int
-gt64260_set_32bit_window(u32 base_addr,
- u32 size,
- u32 other_bits,
- u32 bot_reg,
- u32 top_reg)
-{
- u32 val;
-
- if (size > 0) {
- /* Set up the window on the CPU side */
- gt_write(bot_reg, (base_addr >> 20) | other_bits);
- gt_write(top_reg, (base_addr + size - 1) >> 20);
- } else { /* Disable window */
- gt_write(top_reg, 0x00000000);
- gt_write(bot_reg, 0x00000fff | other_bits);
- }
-
- val = gt_read(bot_reg); /* Flush FIFO */
- return 0;
-} /* gt64260_set_32bit_window() */
-
-static int
-gt64260_set_64bit_window(u32 base_addr_hi,
- u32 base_addr_lo,
- u32 size,
- u32 other_bits,
- u32 bot_reg_hi,
- u32 bot_reg_lo,
- u32 top_reg)
-{
- int rc;
-
- if ((rc = gt64260_set_32bit_window(base_addr_lo,
- size,
- other_bits,
- bot_reg_lo,
- top_reg)) == 0) {
-
- gt_write(bot_reg_hi, base_addr_hi);
- base_addr_hi = gt_read(bot_reg_hi); /* Flush FIFO */
- }
-
- return rc;
-} /* gt64260_set_64bit_window() */
-
-
-/*
- *****************************************************************************
- *
- * CPU Configuration Routines
- *
- *****************************************************************************
- */
-
-int
-gt64260_cpu_scs_set_window(u32 window,
- u32 base_addr,
- u32 size)
-{
- static u32
- cpu_scs_windows[GT64260_CPU_SCS_DECODE_WINDOWS][2] = {
- { GT64260_CPU_SCS_DECODE_0_BOT, GT64260_CPU_SCS_DECODE_0_TOP },
- { GT64260_CPU_SCS_DECODE_1_BOT, GT64260_CPU_SCS_DECODE_1_TOP },
- { GT64260_CPU_SCS_DECODE_2_BOT, GT64260_CPU_SCS_DECODE_2_TOP },
- { GT64260_CPU_SCS_DECODE_3_BOT, GT64260_CPU_SCS_DECODE_3_TOP },
- }; /* cpu_scs_windows[][] */
- int rc = -1;
-
- if (window < GT64260_CPU_SCS_DECODE_WINDOWS) {
- rc = gt64260_set_32bit_window(base_addr,
- size,
- 0,
- cpu_scs_windows[window][0],
- cpu_scs_windows[window][1]);
- }
-
- return rc;
-} /* gt64260_cpu_scs_set_window() */
-
-int
-gt64260_cpu_cs_set_window(u32 window,
- u32 base_addr,
- u32 size)
-{
- static u32
- cpu_cs_windows[GT64260_CPU_CS_DECODE_WINDOWS][2] = {
- { GT64260_CPU_CS_DECODE_0_BOT, GT64260_CPU_CS_DECODE_0_TOP },
- { GT64260_CPU_CS_DECODE_1_BOT, GT64260_CPU_CS_DECODE_1_TOP },
- { GT64260_CPU_CS_DECODE_2_BOT, GT64260_CPU_CS_DECODE_2_TOP },
- { GT64260_CPU_CS_DECODE_3_BOT, GT64260_CPU_CS_DECODE_3_TOP },
- }; /* cpu_cs_windows[][] */
- int rc = -1;
-
- if (window < GT64260_CPU_CS_DECODE_WINDOWS) {
- rc = gt64260_set_32bit_window(base_addr,
- size,
- 0,
- cpu_cs_windows[window][0],
- cpu_cs_windows[window][1]);
- }
-
- return rc;
-} /* gt64260_cpu_cs_set_window() */
-
-int
-gt64260_cpu_boot_set_window(u32 base_addr,
- u32 size)
-{
- int rc;
-
- rc = gt64260_set_32bit_window(base_addr,
- size,
- 0,
- GT64260_CPU_BOOT_CS_DECODE_0_BOT,
- GT64260_CPU_BOOT_CS_DECODE_0_TOP);
-
- return rc;
-} /* gt64260_cpu_boot_set_window() */
-
-/*
- * gt64260_cpu_set_pci_io_window()
- *
- * Set up a CPU window into PCI I/O or MEM space.
- * Always do Read/Modify/Write to window regs.
- */
-static int
-gt64260_cpu_pci_set_window(u32 cpu_base_addr,
- u32 pci_base_addr,
- u32 size,
- u32 other_bits,
- u32 bot_reg,
- u32 top_reg,
- u32 remap_reg)
-{
- u32 val;
- int rc;
-
- if ((rc = gt64260_set_32bit_window(cpu_base_addr,
- size,
- other_bits,
- bot_reg,
- top_reg)) == 0) {
-
- /* Set up CPU->PCI remapping (on lower 32 bits) */
- gt_write(remap_reg, pci_base_addr >> 20);
- val = gt_read(bot_reg); /* Flush FIFO */
- }
-
- return rc;
-} /* gt64260_cpu_pci_set_window() */
-
-
-/*
- * gt64260_cpu_set_pci_io_window()
- *
- * Set up a CPU window into PCI I/O space.
- * Always do Read/Modify/Write to window regs.
- */
-int
-gt64260_cpu_set_pci_io_window(u32 pci_bus,
- u32 cpu_base_addr,
- u32 pci_base_addr,
- u32 size,
- u32 swap)
-{
- /* 2 PCI buses with 1 I/O window each (from CPU point of view) */
- static u32
- cpu_pci_io_windows[GT64260_PCI_BUSES][3] = {
- { GT64260_CPU_PCI_0_IO_DECODE_BOT,
- GT64260_CPU_PCI_0_IO_DECODE_TOP,
- GT64260_CPU_PCI_0_IO_REMAP },
-
- { GT64260_CPU_PCI_1_IO_DECODE_BOT,
- GT64260_CPU_PCI_1_IO_DECODE_TOP,
- GT64260_CPU_PCI_1_IO_REMAP },
- }; /* cpu_pci_io_windows[][] */
- int rc = -1;
-
- if (pci_bus < GT64260_PCI_BUSES) {
- rc = gt64260_cpu_pci_set_window(cpu_base_addr,
- pci_base_addr,
- size,
- swap,
- cpu_pci_io_windows[pci_bus][0],
- cpu_pci_io_windows[pci_bus][1],
- cpu_pci_io_windows[pci_bus][2]);
- }
-
- return rc;
-} /* gt64260_cpu_set_pci_io_window() */
-
-/*
- * gt64260_cpu_set_pci_mem_window()
- *
- * Set up a CPU window into PCI MEM space (4 PCI MEM windows per PCI bus).
- * Always do Read/Modify/Write to window regs.
- */
-int
-gt64260_cpu_set_pci_mem_window(u32 pci_bus,
- u32 window,
- u32 cpu_base_addr,
- u32 pci_base_addr_hi,
- u32 pci_base_addr_lo,
- u32 size,
- u32 swap_64bit)
-{
- /* 2 PCI buses with 4 memory windows each (from CPU point of view) */
- static u32
- cpu_pci_mem_windows[GT64260_PCI_BUSES][GT64260_PCI_MEM_WINDOWS_PER_BUS][4] = {
- { /* PCI 0 */
- { GT64260_CPU_PCI_0_MEM_0_DECODE_BOT,
- GT64260_CPU_PCI_0_MEM_0_DECODE_TOP,
- GT64260_CPU_PCI_0_MEM_0_REMAP_HI,
- GT64260_CPU_PCI_0_MEM_0_REMAP_LO },
-
- { GT64260_CPU_PCI_0_MEM_1_DECODE_BOT,
- GT64260_CPU_PCI_0_MEM_1_DECODE_TOP,
- GT64260_CPU_PCI_0_MEM_1_REMAP_HI,
- GT64260_CPU_PCI_0_MEM_1_REMAP_LO },
-
- { GT64260_CPU_PCI_0_MEM_2_DECODE_BOT,
- GT64260_CPU_PCI_0_MEM_2_DECODE_TOP,
- GT64260_CPU_PCI_0_MEM_2_REMAP_HI,
- GT64260_CPU_PCI_0_MEM_2_REMAP_LO },
-
- { GT64260_CPU_PCI_0_MEM_3_DECODE_BOT,
- GT64260_CPU_PCI_0_MEM_3_DECODE_TOP,
- GT64260_CPU_PCI_0_MEM_3_REMAP_HI,
- GT64260_CPU_PCI_0_MEM_3_REMAP_LO }
- },
-
- { /* PCI 1 */
- { GT64260_CPU_PCI_1_MEM_0_DECODE_BOT,
- GT64260_CPU_PCI_1_MEM_0_DECODE_TOP,
- GT64260_CPU_PCI_1_MEM_0_REMAP_HI,
- GT64260_CPU_PCI_1_MEM_0_REMAP_LO },
-
- { GT64260_CPU_PCI_1_MEM_1_DECODE_BOT,
- GT64260_CPU_PCI_1_MEM_1_DECODE_TOP,
- GT64260_CPU_PCI_1_MEM_1_REMAP_HI,
- GT64260_CPU_PCI_1_MEM_1_REMAP_LO },
-
- { GT64260_CPU_PCI_1_MEM_2_DECODE_BOT,
- GT64260_CPU_PCI_1_MEM_2_DECODE_TOP,
- GT64260_CPU_PCI_1_MEM_2_REMAP_HI,
- GT64260_CPU_PCI_1_MEM_2_REMAP_LO },
-
- { GT64260_CPU_PCI_1_MEM_3_DECODE_BOT,
- GT64260_CPU_PCI_1_MEM_3_DECODE_TOP,
- GT64260_CPU_PCI_1_MEM_3_REMAP_HI,
- GT64260_CPU_PCI_1_MEM_3_REMAP_LO },
- }
- }; /* cpu_pci_mem_windows[][][] */
- u32 remap_reg, remap;
- int rc = -1;
-
- if ((pci_bus < GT64260_PCI_BUSES) &&
- (window < GT64260_PCI_MEM_WINDOWS_PER_BUS)) {
-
- if (gt64260_cpu_pci_set_window(
- cpu_base_addr,
- pci_base_addr_lo,
- size,
- swap_64bit,
- cpu_pci_mem_windows[pci_bus][window][0],
- cpu_pci_mem_windows[pci_bus][window][1],
- cpu_pci_mem_windows[pci_bus][window][3]) == 0) {
-
- remap_reg = cpu_pci_mem_windows[pci_bus][window][2];
- gt_write(remap_reg, pci_base_addr_hi);
-
- remap = gt_read(remap_reg); /* Flush FIFO */
-
- rc = 0;
- }
- }
-
- return rc;
-} /* gt64260_cpu_set_pci_mem_window() */
-
-int
-gt64260_cpu_prot_set_window(u32 window,
- u32 base_addr,
- u32 size,
- u32 access_bits)
-{
- static u32
- cpu_prot_windows[GT64260_CPU_PROT_WINDOWS][2] = {
- { GT64260_CPU_PROT_BASE_0, GT64260_CPU_PROT_TOP_0 },
- { GT64260_CPU_PROT_BASE_1, GT64260_CPU_PROT_TOP_1 },
- { GT64260_CPU_PROT_BASE_2, GT64260_CPU_PROT_TOP_2 },
- { GT64260_CPU_PROT_BASE_3, GT64260_CPU_PROT_TOP_3 },
- { GT64260_CPU_PROT_BASE_4, GT64260_CPU_PROT_TOP_4 },
- { GT64260_CPU_PROT_BASE_5, GT64260_CPU_PROT_TOP_5 },
- { GT64260_CPU_PROT_BASE_6, GT64260_CPU_PROT_TOP_6 },
- { GT64260_CPU_PROT_BASE_7, GT64260_CPU_PROT_TOP_7 },
- }; /* cpu_prot_windows[][] */
- int rc = -1;
-
- if (window < GT64260_CPU_PROT_WINDOWS) {
- rc = gt64260_set_32bit_window(base_addr,
- size,
- access_bits,
- cpu_prot_windows[window][0],
- cpu_prot_windows[window][1]);
- }
-
- return rc;
-} /* gt64260_cpu_prot_set_window() */
-
-int
-gt64260_cpu_snoop_set_window(u32 window,
- u32 base_addr,
- u32 size,
- u32 snoop_type)
-{
- static u32
- cpu_snoop_windows[GT64260_CPU_SNOOP_WINDOWS][2] = {
- { GT64260_CPU_SNOOP_BASE_0, GT64260_CPU_SNOOP_TOP_0 },
- { GT64260_CPU_SNOOP_BASE_1, GT64260_CPU_SNOOP_TOP_1 },
- { GT64260_CPU_SNOOP_BASE_2, GT64260_CPU_SNOOP_TOP_2 },
- { GT64260_CPU_SNOOP_BASE_3, GT64260_CPU_SNOOP_TOP_3 },
- }; /* cpu_snoop_windows[][] */
- int rc = -1;
-
- if ((window < GT64260_CPU_SNOOP_WINDOWS) &&
- (snoop_type <= GT64260_CPU_SNOOP_WB)) {
-
- rc = gt64260_set_32bit_window(base_addr,
- size,
- snoop_type,
- cpu_snoop_windows[window][0],
- cpu_snoop_windows[window][1]);
- }
-
- return rc;
-} /* gt64260_cpu_snoop_set_window() */
-
-void
-gt64260_cpu_disable_all_windows(void)
-{
- int pci_bus, window;
-
- /* Don't disable SCS windows b/c we need to access system memory */
-
- for (window=0; window<GT64260_CPU_CS_DECODE_WINDOWS; window++) {
- gt64260_cpu_cs_set_window(window, 0, 0);
- }
-
- gt64260_cpu_boot_set_window(0, 0);
-
- for (pci_bus=0; pci_bus<GT64260_PCI_BUSES; pci_bus++) {
- gt64260_cpu_set_pci_io_window(pci_bus, 0, 0, 0, 0);
-
- for (window=0;window<GT64260_PCI_MEM_WINDOWS_PER_BUS;window++) {
- gt64260_cpu_set_pci_mem_window(pci_bus,
- window,
- 0, 0, 0, 0, 0);
- }
- }
-
- for (window=0; window<GT64260_CPU_PROT_WINDOWS; window++) {
- gt64260_cpu_prot_set_window(window, 0, 0, 0);
- }
-
- for (window=0; window<GT64260_CPU_SNOOP_WINDOWS; window++) {
- gt64260_cpu_snoop_set_window(window, 0, 0, 0);
- }
-
- return;
-} /* gt64260_cpu_disable_all_windows() */
-
-
-/*
- *****************************************************************************
- *
- * PCI Slave Window Configuration Routines
- *
- *****************************************************************************
- */
-
-int
-gt64260_pci_bar_enable(u32 pci_bus,
- u32 enable_bits)
-{
- u32 reg, val;
- int rc = -1;
-
- if (pci_bus < GT64260_PCI_BUSES) {
- reg = (pci_bus == 0) ? GT64260_PCI_0_SLAVE_BAR_REG_ENABLES :
- GT64260_PCI_1_SLAVE_BAR_REG_ENABLES;
-
-
- /* Note: '0' enables, '1' disables */
- val = gt_read(reg);
- val |= 0xffffffff; /* Disable everything by default */
- val &= ~enable_bits;
- gt_write(reg, val);
-
- gt_read(reg); /* Flush FIFO */
-
- rc = 0;
- }
-
- return rc;
-} /* gt64260_pci_bar_enable() */
-
-static int
-gt64260_pci_slave_set_window(struct pci_controller *hose,
- u32 pci_base_addr,
- u32 cpu_base_addr,
- u32 bar_size,
- u32 pci_cfg_fcn,
- u32 pci_cfg_hdr_offset,
- u32 bar_size_reg,
- u32 remap_reg)
-{
- u32 val;
- int devfn;
- u8 save_exclude;
-
- pci_base_addr &= 0xfffff000;
- cpu_base_addr &= 0xfffff000;
- bar_size &= 0xfffff000;
- devfn = PCI_DEVFN(0, pci_cfg_fcn);
-
- gt_write(bar_size_reg, (bar_size - 1) & 0xfffff000);
- gt_write(remap_reg, cpu_base_addr);
- gt_read(remap_reg); /* Flush FIFO */
-
- save_exclude = gt64260_pci_exclude_bridge;
- gt64260_pci_exclude_bridge = FALSE;
- early_read_config_dword(hose,
- hose->first_busno,
- devfn,
- pci_cfg_hdr_offset,
- &val);
- val &= 0x0000000f;
- early_write_config_dword(hose,
- hose->first_busno,
- devfn,
- pci_cfg_hdr_offset,
- pci_base_addr | val);
- gt64260_pci_exclude_bridge = save_exclude;
-
- return 0;
-} /* gt64260_pci_slave_set_window() */
-
-int
-gt64260_pci_slave_scs_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr,
- u32 cpu_base_addr,
- u32 size)
-{
- static u32
- pci_scs_windows[GT64260_PCI_BUSES][GT64260_PCI_SCS_WINDOWS][4] = {
- { /* PCI 0 */
- { 0, 0x10,
- GT64260_PCI_0_SLAVE_SCS_0_SIZE,
- GT64260_PCI_0_SLAVE_SCS_0_REMAP },
- { 0, 0x14,
- GT64260_PCI_0_SLAVE_SCS_1_SIZE,
- GT64260_PCI_0_SLAVE_SCS_1_REMAP },
- { 0, 0x18,
- GT64260_PCI_0_SLAVE_SCS_2_SIZE,
- GT64260_PCI_0_SLAVE_SCS_2_REMAP },
- { 0, 0x1c,
- GT64260_PCI_0_SLAVE_SCS_3_SIZE,
- GT64260_PCI_0_SLAVE_SCS_3_REMAP },
- },
- { /* PCI 1 */
- { 0, 0x10,
- GT64260_PCI_1_SLAVE_SCS_0_SIZE,
- GT64260_PCI_1_SLAVE_SCS_0_REMAP },
- { 0, 0x14,
- GT64260_PCI_1_SLAVE_SCS_1_SIZE,
- GT64260_PCI_1_SLAVE_SCS_1_REMAP },
- { 0, 0x18,
- GT64260_PCI_1_SLAVE_SCS_2_SIZE,
- GT64260_PCI_1_SLAVE_SCS_2_REMAP },
- { 0, 0x1c,
- GT64260_PCI_1_SLAVE_SCS_3_SIZE,
- GT64260_PCI_1_SLAVE_SCS_3_REMAP },
- }
- }; /* pci_scs_windows[][][] */
- int pci_bus;
- int rc = -1;
-
- if (window < GT64260_PCI_SCS_WINDOWS) {
- pci_bus = (hose->first_busno == 0) ? 0 : 1;
-
- rc = gt64260_pci_slave_set_window(
- hose,
- pci_base_addr,
- cpu_base_addr,
- size,
- pci_scs_windows[pci_bus][window][0],
- pci_scs_windows[pci_bus][window][1],
- pci_scs_windows[pci_bus][window][2],
- pci_scs_windows[pci_bus][window][3]);
- }
-
- return rc;
-} /* gt64260_pci_slave_scs_set_window() */
-
-int
-gt64260_pci_slave_cs_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr,
- u32 cpu_base_addr,
- u32 size)
-{
- static u32
- pci_cs_windows[GT64260_PCI_BUSES][GT64260_PCI_CS_WINDOWS][4] = {
- { /* PCI 0 */
- { 1, 0x10,
- GT64260_PCI_0_SLAVE_CS_0_SIZE,
- GT64260_PCI_0_SLAVE_CS_0_REMAP },
- { 1, 0x14,
- GT64260_PCI_0_SLAVE_CS_1_SIZE,
- GT64260_PCI_0_SLAVE_CS_1_REMAP },
- { 1, 0x18,
- GT64260_PCI_0_SLAVE_CS_2_SIZE,
- GT64260_PCI_0_SLAVE_CS_2_REMAP },
- { 1, 0x1c,
- GT64260_PCI_0_SLAVE_CS_3_SIZE,
- GT64260_PCI_0_SLAVE_CS_3_REMAP },
- },
- { /* PCI 1 */
- { 1, 0x10,
- GT64260_PCI_1_SLAVE_CS_0_SIZE,
- GT64260_PCI_1_SLAVE_CS_0_REMAP },
- { 1, 0x14,
- GT64260_PCI_1_SLAVE_CS_1_SIZE,
- GT64260_PCI_1_SLAVE_CS_1_REMAP },
- { 1, 0x18,
- GT64260_PCI_1_SLAVE_CS_2_SIZE,
- GT64260_PCI_1_SLAVE_CS_2_REMAP },
- { 1, 0x1c,
- GT64260_PCI_1_SLAVE_CS_3_SIZE,
- GT64260_PCI_1_SLAVE_CS_3_REMAP },
- }
- }; /* pci_cs_windows[][][] */
- int pci_bus;
- int rc = -1;
-
- if (window < GT64260_PCI_CS_WINDOWS) {
- pci_bus = (hose->first_busno == 0) ? 0 : 1;
-
- rc = gt64260_pci_slave_set_window(
- hose,
- pci_base_addr,
- cpu_base_addr,
- size,
- pci_cs_windows[pci_bus][window][0],
- pci_cs_windows[pci_bus][window][1],
- pci_cs_windows[pci_bus][window][2],
- pci_cs_windows[pci_bus][window][3]);
- }
-
- return rc;
-} /* gt64260_pci_slave_cs_set_window() */
-
-int
-gt64260_pci_slave_boot_set_window(struct pci_controller *hose,
- u32 pci_base_addr,
- u32 cpu_base_addr,
- u32 size)
-{
- int rc;
-
- rc = gt64260_pci_slave_set_window(hose,
- pci_base_addr,
- cpu_base_addr,
- size,
- 1,
- 0x20,
- GT64260_PCI_1_SLAVE_BOOT_SIZE,
- GT64260_PCI_1_SLAVE_BOOT_REMAP);
-
- return rc;
-} /* gt64260_pci_slave_boot_set_window() */
-
-int
-gt64260_pci_slave_p2p_mem_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr,
- u32 other_bus_base_addr,
- u32 size)
-{
- static u32
- pci_p2p_mem_windows[GT64260_PCI_BUSES][GT64260_PCI_P2P_MEM_WINDOWS][4]={
- { /* PCI 0 */
- { 2, 0x10,
- GT64260_PCI_0_SLAVE_P2P_MEM_0_SIZE,
- GT64260_PCI_0_SLAVE_P2P_MEM_0_REMAP_LO },
- { 2, 0x14,
- GT64260_PCI_0_SLAVE_P2P_MEM_1_SIZE,
- GT64260_PCI_0_SLAVE_P2P_MEM_1_REMAP_LO },
- },
- { /* PCI 1 */
- { 2, 0x10,
- GT64260_PCI_1_SLAVE_P2P_MEM_0_SIZE,
- GT64260_PCI_1_SLAVE_P2P_MEM_0_REMAP_LO },
- { 2, 0x14,
- GT64260_PCI_1_SLAVE_P2P_MEM_1_SIZE,
- GT64260_PCI_1_SLAVE_P2P_MEM_1_REMAP_LO },
- }
- }; /* pci_p2p_mem_windows[][][] */
- int pci_bus;
- int rc = -1;
-
- if (window < GT64260_PCI_P2P_MEM_WINDOWS) {
- pci_bus = (hose->first_busno == 0) ? 0 : 1;
-
- rc = gt64260_pci_slave_set_window(
- hose,
- pci_base_addr,
- other_bus_base_addr,
- size,
- pci_p2p_mem_windows[pci_bus][window][0],
- pci_p2p_mem_windows[pci_bus][window][1],
- pci_p2p_mem_windows[pci_bus][window][2],
- pci_p2p_mem_windows[pci_bus][window][3]);
- }
-
- return rc;
-} /* gt64260_pci_slave_p2p_mem_set_window() */
-
-int
-gt64260_pci_slave_p2p_io_set_window(struct pci_controller *hose,
- u32 pci_base_addr,
- u32 other_bus_base_addr,
- u32 size)
-{
- int rc;
-
- rc = gt64260_pci_slave_set_window(hose,
- pci_base_addr,
- other_bus_base_addr,
- size,
- 2,
- 0x18,
- GT64260_PCI_1_SLAVE_P2P_IO_SIZE,
- GT64260_PCI_1_SLAVE_P2P_IO_REMAP);
-
- return rc;
-} /* gt64260_pci_slave_p2p_io_set_window() */
-
-int
-gt64260_pci_slave_dac_scs_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr_hi,
- u32 pci_base_addr_lo,
- u32 cpu_base_addr,
- u32 size)
-{
- static u32
- pci_dac_scs_windows[GT64260_PCI_BUSES][GT64260_PCI_DAC_SCS_WINDOWS][5]={
- { /* PCI 0 */
- { 4, 0x10, 0x14,
- GT64260_PCI_0_SLAVE_DAC_SCS_0_SIZE,
- GT64260_PCI_0_SLAVE_DAC_SCS_0_REMAP },
- { 4, 0x18, 0x1c,
- GT64260_PCI_0_SLAVE_DAC_SCS_1_SIZE,
- GT64260_PCI_0_SLAVE_DAC_SCS_1_REMAP },
- { 5, 0x10, 0x14,
- GT64260_PCI_0_SLAVE_DAC_SCS_2_SIZE,
- GT64260_PCI_0_SLAVE_DAC_SCS_2_REMAP },
- { 5, 0x18, 0x1c,
- GT64260_PCI_0_SLAVE_DAC_SCS_3_SIZE,
- GT64260_PCI_0_SLAVE_DAC_SCS_3_REMAP },
- },
- { /* PCI 1 */
- { 4, 0x10, 0x14,
- GT64260_PCI_1_SLAVE_DAC_SCS_0_SIZE,
- GT64260_PCI_1_SLAVE_DAC_SCS_0_REMAP },
- { 4, 0x18, 0x1c,
- GT64260_PCI_1_SLAVE_DAC_SCS_1_SIZE,
- GT64260_PCI_1_SLAVE_DAC_SCS_1_REMAP },
- { 5, 0x10, 0x14,
- GT64260_PCI_1_SLAVE_DAC_SCS_2_SIZE,
- GT64260_PCI_1_SLAVE_DAC_SCS_2_REMAP },
- { 5, 0x18, 0x1c,
- GT64260_PCI_1_SLAVE_DAC_SCS_3_SIZE,
- GT64260_PCI_1_SLAVE_DAC_SCS_3_REMAP },
- }
- }; /* pci_dac_scs_windows[][][] */
- int pci_bus;
- int rc = -1;
-
- if (window < GT64260_PCI_DAC_SCS_WINDOWS) {
- pci_bus = (hose->first_busno == 0) ? 0 : 1;
-
- rc = gt64260_pci_slave_set_window(
- hose,
- pci_base_addr_lo,
- cpu_base_addr,
- size,
- pci_dac_scs_windows[pci_bus][window][0],
- pci_dac_scs_windows[pci_bus][window][1],
- pci_dac_scs_windows[pci_bus][window][3],
- pci_dac_scs_windows[pci_bus][window][4]);
-
- early_write_config_dword(
- hose,
- hose->first_busno,
- PCI_DEVFN(0, pci_dac_scs_windows[pci_bus][window][0]),
- pci_dac_scs_windows[pci_bus][window][2],
- pci_base_addr_hi);
- }
-
- return rc;
-} /* gt64260_pci_slave_dac_scs_set_window() */
-
-int
-gt64260_pci_slave_dac_cs_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr_hi,
- u32 pci_base_addr_lo,
- u32 cpu_base_addr,
- u32 size)
-{
- static u32
- pci_dac_cs_windows[GT64260_PCI_BUSES][GT64260_PCI_DAC_CS_WINDOWS][5] = {
- { /* PCI 0 */
- { 6, 0x10, 0x14,
- GT64260_PCI_0_SLAVE_DAC_CS_0_SIZE,
- GT64260_PCI_0_SLAVE_DAC_CS_0_REMAP },
- { 6, 0x18, 0x1c,
- GT64260_PCI_0_SLAVE_DAC_CS_1_SIZE,
- GT64260_PCI_0_SLAVE_DAC_CS_1_REMAP },
- { 6, 0x20, 0x24,
- GT64260_PCI_0_SLAVE_DAC_CS_2_SIZE,
- GT64260_PCI_0_SLAVE_DAC_CS_2_REMAP },
- { 7, 0x10, 0x14,
- GT64260_PCI_0_SLAVE_DAC_CS_3_SIZE,
- GT64260_PCI_0_SLAVE_DAC_CS_3_REMAP },
- },
- { /* PCI 1 */
- { 6, 0x10, 0x14,
- GT64260_PCI_1_SLAVE_DAC_CS_0_SIZE,
- GT64260_PCI_1_SLAVE_DAC_CS_0_REMAP },
- { 6, 0x18, 0x1c,
- GT64260_PCI_1_SLAVE_DAC_CS_1_SIZE,
- GT64260_PCI_1_SLAVE_DAC_CS_1_REMAP },
- { 6, 0x20, 0x24,
- GT64260_PCI_1_SLAVE_DAC_CS_2_SIZE,
- GT64260_PCI_1_SLAVE_DAC_CS_2_REMAP },
- { 7, 0x10, 0x14,
- GT64260_PCI_1_SLAVE_DAC_CS_3_SIZE,
- GT64260_PCI_1_SLAVE_DAC_CS_3_REMAP },
- }
- }; /* pci_dac_cs_windows[][][] */
- int pci_bus;
- int rc = -1;
-
- if (window < GT64260_PCI_CS_WINDOWS) {
- pci_bus = (hose->first_busno == 0) ? 0 : 1;
-
- rc = gt64260_pci_slave_set_window(
- hose,
- pci_base_addr_lo,
- cpu_base_addr,
- size,
- pci_dac_cs_windows[pci_bus][window][0],
- pci_dac_cs_windows[pci_bus][window][1],
- pci_dac_cs_windows[pci_bus][window][3],
- pci_dac_cs_windows[pci_bus][window][4]);
-
- early_write_config_dword(
- hose,
- hose->first_busno,
- PCI_DEVFN(0, pci_dac_cs_windows[pci_bus][window][0]),
- pci_dac_cs_windows[pci_bus][window][2],
- pci_base_addr_hi);
- }
-
- return rc;
-} /* gt64260_pci_slave_dac_cs_set_window() */
-
-int
-gt64260_pci_slave_dac_boot_set_window(struct pci_controller *hose,
- u32 pci_base_addr_hi,
- u32 pci_base_addr_lo,
- u32 cpu_base_addr,
- u32 size)
-{
- int rc;
-
- rc = gt64260_pci_slave_set_window(hose,
- pci_base_addr_lo,
- cpu_base_addr,
- size,
- 7,
- 0x18,
- GT64260_PCI_1_SLAVE_BOOT_SIZE,
- GT64260_PCI_1_SLAVE_BOOT_REMAP);
-
- early_write_config_dword(hose,
- hose->first_busno,
- PCI_DEVFN(0, 7),
- 0x1c,
- pci_base_addr_hi);
-
- return rc;
-} /* gt64260_pci_slave_dac_boot_set_window() */
-
-int
-gt64260_pci_slave_dac_p2p_mem_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr_hi,
- u32 pci_base_addr_lo,
- u32 other_bus_base_addr,
- u32 size)
-{
- static u32
- pci_dac_p2p_mem_windows[GT64260_PCI_BUSES][GT64260_PCI_DAC_P2P_MEM_WINDOWS][5] = {
- { /* PCI 0 */
- { 4, 0x20, 0x24,
- GT64260_PCI_0_SLAVE_DAC_P2P_MEM_0_SIZE,
- GT64260_PCI_0_SLAVE_DAC_P2P_MEM_0_REMAP_LO },
- { 5, 0x20, 0x24,
- GT64260_PCI_0_SLAVE_DAC_P2P_MEM_1_SIZE,
- GT64260_PCI_0_SLAVE_DAC_P2P_MEM_1_REMAP_LO },
- },
- { /* PCI 1 */
- { 4, 0xa0, 0xa4,
- GT64260_PCI_0_SLAVE_DAC_P2P_MEM_0_SIZE,
- GT64260_PCI_0_SLAVE_DAC_P2P_MEM_0_REMAP_LO },
- { 5, 0xa0, 0xa4,
- GT64260_PCI_0_SLAVE_DAC_P2P_MEM_1_SIZE,
- GT64260_PCI_0_SLAVE_DAC_P2P_MEM_1_REMAP_LO },
- }
- }; /* pci_dac_p2p_windows[][][] */
- int pci_bus;
- int rc = -1;
-
- if (window < GT64260_PCI_P2P_MEM_WINDOWS) {
- pci_bus = (hose->first_busno == 0) ? 0 : 1;
-
- rc = gt64260_pci_slave_set_window(
- hose,
- pci_base_addr_lo,
- other_bus_base_addr,
- size,
- pci_dac_p2p_mem_windows[pci_bus][window][0],
- pci_dac_p2p_mem_windows[pci_bus][window][1],
- pci_dac_p2p_mem_windows[pci_bus][window][3],
- pci_dac_p2p_mem_windows[pci_bus][window][4]);
-
- early_write_config_dword(
- hose,
- hose->first_busno,
- PCI_DEVFN(0, pci_dac_p2p_mem_windows[pci_bus][window][0]),
- pci_dac_p2p_mem_windows[pci_bus][window][2],
- pci_base_addr_hi);
- }
-
- return rc;
-} /* gt64260_pci_slave_dac_p2p_mem_set_window() */
-
-
-/*
- *****************************************************************************
- *
- * PCI Control Configuration Routines
- *
- *****************************************************************************
- */
-
-
-int
-gt64260_pci_acc_cntl_set_window(u32 pci_bus,
- u32 window,
- u32 base_addr_hi,
- u32 base_addr_lo,
- u32 size,
- u32 features)
-{
- static u32
- pci_acc_cntl_windows[GT64260_PCI_BUSES][GT64260_PCI_ACC_CNTL_WINDOWS][3] = {
- { /* PCI 0 */
- { GT64260_PCI_0_ACC_CNTL_0_BASE_HI,
- GT64260_PCI_0_ACC_CNTL_0_BASE_LO,
- GT64260_PCI_0_ACC_CNTL_0_TOP },
-
- { GT64260_PCI_0_ACC_CNTL_1_BASE_HI,
- GT64260_PCI_0_ACC_CNTL_1_BASE_LO,
- GT64260_PCI_0_ACC_CNTL_1_TOP },
-
- { GT64260_PCI_0_ACC_CNTL_2_BASE_HI,
- GT64260_PCI_0_ACC_CNTL_2_BASE_LO,
- GT64260_PCI_0_ACC_CNTL_2_TOP },
-
- { GT64260_PCI_0_ACC_CNTL_3_BASE_HI,
- GT64260_PCI_0_ACC_CNTL_3_BASE_LO,
- GT64260_PCI_0_ACC_CNTL_3_TOP },
-
- { GT64260_PCI_0_ACC_CNTL_4_BASE_HI,
- GT64260_PCI_0_ACC_CNTL_4_BASE_LO,
- GT64260_PCI_0_ACC_CNTL_4_TOP },
-
- { GT64260_PCI_0_ACC_CNTL_5_BASE_HI,
- GT64260_PCI_0_ACC_CNTL_5_BASE_LO,
- GT64260_PCI_0_ACC_CNTL_5_TOP },
-
- { GT64260_PCI_0_ACC_CNTL_6_BASE_HI,
- GT64260_PCI_0_ACC_CNTL_6_BASE_LO,
- GT64260_PCI_0_ACC_CNTL_6_TOP },
-
- { GT64260_PCI_0_ACC_CNTL_7_BASE_HI,
- GT64260_PCI_0_ACC_CNTL_7_BASE_LO,
- GT64260_PCI_0_ACC_CNTL_7_TOP },
- },
- { /* PCI 1 */
- { GT64260_PCI_1_ACC_CNTL_0_BASE_HI,
- GT64260_PCI_1_ACC_CNTL_0_BASE_LO,
- GT64260_PCI_1_ACC_CNTL_0_TOP },
-
- { GT64260_PCI_1_ACC_CNTL_1_BASE_HI,
- GT64260_PCI_1_ACC_CNTL_1_BASE_LO,
- GT64260_PCI_1_ACC_CNTL_1_TOP },
-
- { GT64260_PCI_1_ACC_CNTL_2_BASE_HI,
- GT64260_PCI_1_ACC_CNTL_2_BASE_LO,
- GT64260_PCI_1_ACC_CNTL_2_TOP },
-
- { GT64260_PCI_1_ACC_CNTL_3_BASE_HI,
- GT64260_PCI_1_ACC_CNTL_3_BASE_LO,
- GT64260_PCI_1_ACC_CNTL_3_TOP },
-
- { GT64260_PCI_1_ACC_CNTL_4_BASE_HI,
- GT64260_PCI_1_ACC_CNTL_4_BASE_LO,
- GT64260_PCI_1_ACC_CNTL_4_TOP },
-
- { GT64260_PCI_1_ACC_CNTL_5_BASE_HI,
- GT64260_PCI_1_ACC_CNTL_5_BASE_LO,
- GT64260_PCI_1_ACC_CNTL_5_TOP },
-
- { GT64260_PCI_1_ACC_CNTL_6_BASE_HI,
- GT64260_PCI_1_ACC_CNTL_6_BASE_LO,
- GT64260_PCI_1_ACC_CNTL_6_TOP },
-
- { GT64260_PCI_1_ACC_CNTL_7_BASE_HI,
- GT64260_PCI_1_ACC_CNTL_7_BASE_LO,
- GT64260_PCI_1_ACC_CNTL_7_TOP },
- }
- }; /* pci_acc_cntl_windows[][][] */
- int rc = -1;
-
- if ((pci_bus < GT64260_PCI_BUSES) &&
- (window < GT64260_PCI_ACC_CNTL_WINDOWS)) {
-
- rc = gt64260_set_64bit_window(
- base_addr_hi,
- base_addr_lo,
- size,
- features,
- pci_acc_cntl_windows[pci_bus][window][0],
- pci_acc_cntl_windows[pci_bus][window][1],
- pci_acc_cntl_windows[pci_bus][window][2]);
- }
-
- return rc;
-} /* gt64260_pci_acc_cntl_set_window() */
-
-int
-gt64260_pci_snoop_set_window(u32 pci_bus,
- u32 window,
- u32 base_addr_hi,
- u32 base_addr_lo,
- u32 size,
- u32 snoop_type)
-{
- static u32
- pci_snoop_windows[GT64260_PCI_BUSES][GT64260_PCI_SNOOP_WINDOWS][3] = {
- { /* PCI 0 */
- { GT64260_PCI_0_SNOOP_0_BASE_HI,
- GT64260_PCI_0_SNOOP_0_BASE_LO,
- GT64260_PCI_0_SNOOP_0_TOP },
-
- { GT64260_PCI_0_SNOOP_1_BASE_HI,
- GT64260_PCI_0_SNOOP_1_BASE_LO,
- GT64260_PCI_0_SNOOP_1_TOP },
-
- { GT64260_PCI_0_SNOOP_2_BASE_HI,
- GT64260_PCI_0_SNOOP_2_BASE_LO,
- GT64260_PCI_0_SNOOP_2_TOP },
-
- { GT64260_PCI_0_SNOOP_3_BASE_HI,
- GT64260_PCI_0_SNOOP_3_BASE_LO,
- GT64260_PCI_0_SNOOP_3_TOP },
- },
- { /* PCI 1 */
- { GT64260_PCI_1_SNOOP_0_BASE_HI,
- GT64260_PCI_1_SNOOP_0_BASE_LO,
- GT64260_PCI_1_SNOOP_0_TOP },
-
- { GT64260_PCI_1_SNOOP_1_BASE_HI,
- GT64260_PCI_1_SNOOP_1_BASE_LO,
- GT64260_PCI_1_SNOOP_1_TOP },
-
- { GT64260_PCI_1_SNOOP_2_BASE_HI,
- GT64260_PCI_1_SNOOP_2_BASE_LO,
- GT64260_PCI_1_SNOOP_2_TOP },
-
- { GT64260_PCI_1_SNOOP_3_BASE_HI,
- GT64260_PCI_1_SNOOP_3_BASE_LO,
- GT64260_PCI_1_SNOOP_3_TOP },
- },
- }; /* pci_snoop_windows[][][] */
- int rc = -1;
-
- if ((pci_bus < GT64260_PCI_BUSES) &&
- (window < GT64260_PCI_SNOOP_WINDOWS)) {
-
- rc = gt64260_set_64bit_window(
- base_addr_hi,
- base_addr_lo,
- size,
- snoop_type,
- pci_snoop_windows[pci_bus][window][0],
- pci_snoop_windows[pci_bus][window][1],
- pci_snoop_windows[pci_bus][window][2]);
- }
-
- return rc;
-} /* gt64260_pci_snoop_set_window() */
-
-/*
- *****************************************************************************
- *
- * 64260's Register Base Address Routines
- *
- *****************************************************************************
- */
-
-/*
- * gt64260_remap_bridge_regs()
- *
- * Move the bridge's register to the specified base address.
- * Assume that there are no other windows overlapping this area and that
- * all but the highest 3 nibbles are 0.
- */
-int
-gt64260_set_base(u32 new_base)
-{
- u32 val;
- int limit = 100000;
- int rc = 0;
-
- val = gt_read(GT64260_INTERNAL_SPACE_DECODE);
- val = (new_base >> 20) | (val & 0xffff0000);
- gt_write(GT64260_INTERNAL_SPACE_DECODE, val);
-
- iounmap((void *)gt64260_base);
- gt64260_base = (u32)ioremap((new_base & 0xfff00000),
- GT64260_INTERNAL_SPACE_SIZE);
-
- do { /* Wait for bridge to move its regs */
- val = gt_read(GT64260_INTERNAL_SPACE_DECODE);
- } while ((val != 0xffffffff) && (limit-- > 0));
-
- if (limit <= 0) {
- rc = -1;
- }
-
- return rc;
-} /* gt64260_remap_bridge_regs() */
-
-/*
- * gt64260_get_base()
- *
- * Return the current virtual base address of the 64260's registers.
- */
-int
-gt64260_get_base(u32 *base)
-{
- *base = gt64260_base;
- return 0;
-} /* gt64260_remap_bridge_regs() */
-
-/*
- *****************************************************************************
- *
- * Exclude PCI config space access to bridge itself
- *
- *****************************************************************************
- */
-
-/*
- * gt64260_exclude_pci_device()
- *
- * This routine causes the PCI subsystem to skip the PCI device in slot 0
- * (which is the 64260 itself) unless explicitly allowed.
- */
-int
-gt64260_pci_exclude_device(u8 bus, u8 devfn)
-{
- struct pci_controller *hose;
-
- hose = pci_bus_to_hose(bus);
-
- /* Skip slot 0 and 1 on both hoses */
- if ((gt64260_pci_exclude_bridge == TRUE) &&
- (PCI_SLOT(devfn) == 0) &&
- (hose->first_busno == bus)) {
-
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- else {
- return PCIBIOS_SUCCESSFUL;
- }
-} /* gt64260_pci_exclude_device() */
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG)
-
-/*
- * gt64260_putc()
- *
- * Dump a character out the MPSC port for gt64260_mpsc_progress
- * this assumes the baud rate has already been set up and the
- * MPSC initialized by the bootloader or firmware.
- */
-
-static inline void
-gt_putc(char c){
- mb();
- gt_write(GT64260_MPSC_0_CHR_1, c);
- mb();
- gt_write(GT64260_MPSC_0_CHR_2, 0x200);
- mb();
-
- udelay(10000);
-}
-
-void
-puthex(unsigned long val){
-
- int i;
-
- for (i = 7; i >= 0; i--) {
- gt_putc("0123456789ABCDEF"[(val>>28) & 0x0f]);
- val <<= 4;
- }
- gt_putc('\r');
- gt_putc('\n');
-
-}
-
-
-void
-gt64260_mpsc_progress(char *s, unsigned short hex){
- /* spit stuff out the 64260 mpsc */
-
- volatile char c;
- while ((c = *s++) != 0){
- gt_putc(c);
- if ( c == '\n' ) gt_putc('\r');
- }
- gt_putc('\n');
- gt_putc('\r');
-
- return;
-}
-
-#endif /* CONFIG_DEBUG_TEXT */
+++ /dev/null
-#include <linux/stddef.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <asm/irq.h>
-#include <asm/immap_8260.h>
-#include <asm/mpc8260.h>
-#include "ppc8260_pic.h"
-
-/* The 8260 internal interrupt controller. It is usually
- * the only interrupt controller.
- * There are two 32-bit registers (high/low) for up to 64
- * possible interrupts.
- *
- * Now, the fun starts.....Interrupt Numbers DO NOT MAP
- * in a simple arithmetic fashion to mask or pending registers.
- * That is, interrupt 4 does not map to bit position 4.
- * We create two tables, indexed by vector number, to indicate
- * which register to use and which bit in the register to use.
- */
-static u_char irq_to_siureg[] = {
- 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0
-};
-
-static u_char irq_to_siubit[] = {
- 31, 16, 17, 18, 19, 20, 21, 22,
- 23, 24, 25, 26, 27, 28, 29, 30,
- 29, 30, 16, 17, 18, 19, 20, 21,
- 22, 23, 24, 25, 26, 27, 28, 31,
- 0, 1, 2, 3, 4, 5, 6, 7,
- 8, 9, 10, 11, 12, 13, 14, 15,
- 15, 14, 13, 12, 11, 10, 9, 8,
- 7, 6, 5, 4, 3, 2, 1, 0
-};
-
-static void m8260_mask_irq(unsigned int irq_nr)
-{
- int bit, word;
- volatile uint *simr;
-
- bit = irq_to_siubit[irq_nr];
- word = irq_to_siureg[irq_nr];
-
- simr = &(immr->im_intctl.ic_simrh);
- ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
- simr[word] = ppc_cached_irq_mask[word];
-}
-
-static void m8260_unmask_irq(unsigned int irq_nr)
-{
- int bit, word;
- volatile uint *simr;
-
- bit = irq_to_siubit[irq_nr];
- word = irq_to_siureg[irq_nr];
-
- simr = &(immr->im_intctl.ic_simrh);
- ppc_cached_irq_mask[word] |= (1 << (31 - bit));
- simr[word] = ppc_cached_irq_mask[word];
-}
-
-static void m8260_mask_and_ack(unsigned int irq_nr)
-{
- int bit, word;
- volatile uint *simr, *sipnr;
-
- bit = irq_to_siubit[irq_nr];
- word = irq_to_siureg[irq_nr];
-
- simr = &(immr->im_intctl.ic_simrh);
- sipnr = &(immr->im_intctl.ic_sipnrh);
- ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
- simr[word] = ppc_cached_irq_mask[word];
- sipnr[word] = 1 << (31 - bit);
-}
-
-static void m8260_end_irq(unsigned int irq_nr)
-{
- int bit, word;
- volatile uint *simr;
-
- if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
- && irq_desc[irq_nr].action) {
-
- bit = irq_to_siubit[irq_nr];
- word = irq_to_siureg[irq_nr];
-
- simr = &(immr->im_intctl.ic_simrh);
- ppc_cached_irq_mask[word] |= (1 << (31 - bit));
- simr[word] = ppc_cached_irq_mask[word];
- }
-}
-
-struct hw_interrupt_type ppc8260_pic = {
- " 8260 SIU ",
- NULL,
- NULL,
- m8260_unmask_irq,
- m8260_mask_irq,
- m8260_mask_and_ack,
- m8260_end_irq,
- 0
-};
-
-
-int
-m8260_get_irq(struct pt_regs *regs)
-{
- int irq;
- unsigned long bits;
-
- /* For MPC8260, read the SIVEC register and shift the bits down
- * to get the irq number. */
- bits = immr->im_intctl.ic_sivec;
- irq = bits >> 26;
-
- if (irq == 0)
- return(-1);
-#if 0
- irq += ppc8260_pic.irq_offset;
-#endif
- return irq;
-}
-
+++ /dev/null
-#ifndef _PPC_KERNEL_PPC8260_H
-#define _PPC_KERNEL_PPC8260_H
-
-#include <linux/irq.h>
-
-extern struct hw_interrupt_type ppc8260_pic;
-
-void m8260_pic_init(void);
-void m8260_do_IRQ(struct pt_regs *regs,
- int cpu);
-int m8260_get_irq(struct pt_regs *regs);
-
-#endif /* _PPC_KERNEL_PPC8260_H */
+++ /dev/null
-#include <stdio.h>
-#include <stdlib.h>
-#include <byteswap.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <string.h>
-
-void xlate( char * inb, char * trb, unsigned len )
-{
- unsigned i;
- for ( i=0; i<len; ++i )
- {
- char c = *inb++;
- char c1 = c >> 4;
- char c2 = c & 0xf;
- if ( c1 > 9 )
- c1 = c1 + 'A' - 10;
- else
- c1 = c1 + '0';
- if ( c2 > 9 )
- c2 = c2 + 'A' - 10;
- else
- c2 = c2 + '0';
- *trb++ = c1;
- *trb++ = c2;
- }
- *trb = 0;
-}
-
-#define ElfHeaderSize (64 * 1024)
-#define ElfPages (ElfHeaderSize / 4096)
-
-void get4k( /*istream *inf*/FILE *file, char *buf )
-{
- unsigned j;
- unsigned num = fread(buf, 1, 4096, file);
- for ( j=num; j<4096; ++j )
- buf[j] = 0;
-}
-
-void put4k( /*ostream *outf*/FILE *file, char *buf )
-{
- fwrite(buf, 1, 4096, file);
-}
-
-int main(int argc, char **argv)
-{
- char inbuf[4096];
- FILE *sysmap = NULL;
- char* ptr_end = NULL;
- FILE *inputVmlinux = NULL;
- FILE *outputVmlinux = NULL;
- long i = 0;
- unsigned long sysmapFileLen = 0;
- unsigned long sysmapLen = 0;
- unsigned long roundR = 0;
- unsigned long kernelLen = 0;
- unsigned long actualKernelLen = 0;
- unsigned long round = 0;
- unsigned long roundedKernelLen = 0;
- unsigned long sysmapStartOffs = 0;
- unsigned long sysmapPages = 0;
- unsigned long roundedKernelPages = 0;
- long padPages = 0;
- if ( argc < 2 )
- {
- fprintf(stderr, "Name of System Map file missing.\n");
- exit(1);
- }
-
- if ( argc < 3 )
- {
- fprintf(stderr, "Name of vmlinux file missing.\n");
- exit(1);
- }
-
- if ( argc < 4 )
- {
- fprintf(stderr, "Name of vmlinux output file missing.\n");
- exit(1);
- }
-
- sysmap = fopen(argv[1], "r");
- if ( ! sysmap )
- {
- fprintf(stderr, "System Map file \"%s\" failed to open.\n", argv[1]);
- exit(1);
- }
- inputVmlinux = fopen(argv[2], "r");
- if ( ! inputVmlinux )
- {
- fprintf(stderr, "vmlinux file \"%s\" failed to open.\n", argv[2]);
- exit(1);
- }
- outputVmlinux = fopen(argv[3], "w");
- if ( ! outputVmlinux )
- {
- fprintf(stderr, "output vmlinux file \"%s\" failed to open.\n", argv[3]);
- exit(1);
- }
-
-
-
- fseek(inputVmlinux, 0, SEEK_END);
- kernelLen = ftell(inputVmlinux);
- fseek(inputVmlinux, 0, SEEK_SET);
- printf("kernel file size = %ld\n", kernelLen);
- if ( kernelLen == 0 )
- {
- fprintf(stderr, "You must have a linux kernel specified as argv[2]\n");
- exit(1);
- }
-
-
- actualKernelLen = kernelLen - ElfHeaderSize;
-
- printf("actual kernel length (minus ELF header) = %ld/%lxx \n", actualKernelLen, actualKernelLen);
-
- round = actualKernelLen % 4096;
- roundedKernelLen = actualKernelLen;
- if ( round )
- roundedKernelLen += (4096 - round);
-
- printf("Kernel length rounded up to a 4k multiple = %ld/%lxx \n", roundedKernelLen, roundedKernelLen);
- roundedKernelPages = roundedKernelLen / 4096;
- printf("Kernel pages to copy = %ld/%lxx\n", roundedKernelPages, roundedKernelPages);
-
-
-
- /* Sysmap file */
- fseek(sysmap, 0, SEEK_END);
- sysmapFileLen = ftell(sysmap);
- fseek(sysmap, 0, SEEK_SET);
- printf("%s file size = %ld\n", argv[1], sysmapFileLen);
-
- sysmapLen = sysmapFileLen;
-
- roundR = 4096 - (sysmapLen % 4096);
- if (roundR)
- {
- printf("Rounding System Map file up to a multiple of 4096, adding %ld\n", roundR);
- sysmapLen += roundR;
- }
- printf("Rounded System Map size is %ld\n", sysmapLen);
-
- /* Process the Sysmap file to determine the true end of the kernel */
- sysmapPages = sysmapLen / 4096;
- printf("System map pages to copy = %ld\n", sysmapPages);
- /* read the whole file line by line, expect that it doesn't fail */
- while ( fgets(inbuf, 4096, sysmap) ) ;
- /* search for _end in the last page of the system map */
- ptr_end = strstr(inbuf, " _end");
- if (!ptr_end)
- {
- fprintf(stderr, "Unable to find _end in the sysmap file \n");
- fprintf(stderr, "inbuf: \n");
- fprintf(stderr, "%s \n", inbuf);
- exit(1);
- }
- printf("Found _end in the last page of the sysmap - backing up 10 characters it looks like %s", ptr_end-10);
- sysmapStartOffs = (unsigned int)strtol(ptr_end-10, NULL, 16);
- /* calc how many pages we need to insert between the vmlinux and the start of the sysmap */
- padPages = sysmapStartOffs/4096 - roundedKernelPages;
-
- /* Check and see if the vmlinux is larger than _end in System.map */
- if (padPages < 0)
- { /* vmlinux is larger than _end - adjust the offset to start the embedded system map */
- sysmapStartOffs = roundedKernelLen;
- printf("vmlinux is larger than _end indicates it needs to be - sysmapStartOffs = %lx \n", sysmapStartOffs);
- padPages = 0;
- printf("will insert %lx pages between the vmlinux and the start of the sysmap \n", padPages);
- }
- else
- { /* _end is larger than vmlinux - use the sysmapStartOffs we calculated from the system map */
- printf("vmlinux is smaller than _end indicates is needed - sysmapStartOffs = %lx \n", sysmapStartOffs);
- printf("will insert %lx pages between the vmlinux and the start of the sysmap \n", padPages);
- }
-
-
-
-
- /* Copy 64K ELF header */
- for (i=0; i<(ElfPages); ++i)
- {
- get4k( inputVmlinux, inbuf );
- put4k( outputVmlinux, inbuf );
- }
-
-
- /* Copy the vmlinux (as full pages). */
- fseek(inputVmlinux, ElfHeaderSize, SEEK_SET);
- for ( i=0; i<roundedKernelPages; ++i )
- {
- get4k( inputVmlinux, inbuf );
-
- /* Set the offsets (of the start and end) of the embedded sysmap so it is set in the vmlinux.sm */
- if ( i == 0 )
- {
- unsigned long * p;
- printf("Storing embedded_sysmap_start at 0x3c\n");
- p = (unsigned long *)(inbuf + 0x3c);
-
-#if (BYTE_ORDER == __BIG_ENDIAN)
- *p = sysmapStartOffs;
-#else
- *p = bswap_32(sysmapStartOffs);
-#endif
-
- printf("Storing embedded_sysmap_end at 0x44\n");
- p = (unsigned long *)(inbuf + 0x44);
-
-#if (BYTE_ORDER == __BIG_ENDIAN)
- *p = sysmapStartOffs + sysmapFileLen;
-#else
- *p = bswap_32(sysmapStartOffs + sysmapFileLen);
-#endif
- }
-
- put4k( outputVmlinux, inbuf );
- }
-
-
- /* Insert any pad pages between the end of the vmlinux and where the system map needs to be. */
- for (i=0; i<padPages; ++i)
- {
- memset(inbuf, 0, 4096);
- put4k(outputVmlinux, inbuf);
- }
-
-
- /* Copy the system map (as full pages). */
- fseek(sysmap, 0, SEEK_SET); /* start reading from begining of the system map */
- for ( i=0; i<sysmapPages; ++i )
- {
- get4k( sysmap, inbuf );
- put4k( outputVmlinux, inbuf );
- }
-
-
- fclose(sysmap);
- fclose(inputVmlinux);
- fclose(outputVmlinux);
- /* Set permission to executable */
- chmod(argv[3], S_IRUSR|S_IWUSR|S_IXUSR|S_IRGRP|S_IXGRP|S_IROTH|S_IXOTH);
-
- return 0;
-}
-
+++ /dev/null
-/*
- * linux/arch/ppc/kernel/setup.c
- *
- * Copyright (C) 1995 Linus Torvalds
- * Adapted from 'alpha' version by Gary Thomas
- * Modified by Cort Dougan (cort@cs.nmt.edu)
- * Modified by PPC64 Team, IBM Corp
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-/*
- * bootup setup stuff..
- */
-
-#include <linux/config.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/slab.h>
-#include <linux/user.h>
-#include <linux/a.out.h>
-#include <linux/tty.h>
-#include <linux/major.h>
-#include <linux/interrupt.h>
-#include <linux/reboot.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/console.h>
-#include <linux/pci.h>
-#include <linux/version.h>
-#include <linux/adb.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-
-#include <linux/irq.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-
-#include <asm/mmu.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/prom.h>
-#include <asm/rtas.h>
-#include <asm/pci-bridge.h>
-#include <asm/iommu.h>
-#include <asm/dma.h>
-#include <asm/machdep.h>
-#include <asm/irq.h>
-#include <asm/naca.h>
-#include <asm/time.h>
-#include <asm/nvram.h>
-
-#include "i8259.h"
-#include "open_pic.h"
-#include <asm/xics.h>
-#include <asm/ppcdebug.h>
-#include <asm/cputable.h>
-
-void chrp_progress(char *, unsigned short);
-
-extern void pSeries_init_openpic(void);
-
-extern void find_and_init_phbs(void);
-extern void pSeries_final_fixup(void);
-
-extern void pSeries_get_boot_time(struct rtc_time *rtc_time);
-extern void pSeries_get_rtc_time(struct rtc_time *rtc_time);
-extern int pSeries_set_rtc_time(struct rtc_time *rtc_time);
-void pSeries_calibrate_decr(void);
-void fwnmi_init(void);
-extern void SystemReset_FWNMI(void), MachineCheck_FWNMI(void); /* from head.S */
-int fwnmi_active; /* TRUE if an FWNMI handler is present */
-
-dev_t boot_dev;
-unsigned long virtPython0Facilities = 0; // python0 facility area (memory mapped io) (64-bit format) VIRTUAL address.
-
-extern unsigned long loops_per_jiffy;
-
-extern unsigned long ppc_proc_freq;
-extern unsigned long ppc_tb_freq;
-
-void chrp_get_cpuinfo(struct seq_file *m)
-{
- struct device_node *root;
- const char *model = "";
-
- root = of_find_node_by_path("/");
- if (root)
- model = get_property(root, "model", NULL);
- seq_printf(m, "machine\t\t: CHRP %s\n", model);
- of_node_put(root);
-}
-
-#define I8042_DATA_REG 0x60
-
-void __init chrp_request_regions(void)
-{
- struct device_node *i8042;
-
- request_region(0x20,0x20,"pic1");
- request_region(0xa0,0x20,"pic2");
- request_region(0x00,0x20,"dma1");
- request_region(0x40,0x20,"timer");
- request_region(0x80,0x10,"dma page reg");
- request_region(0xc0,0x20,"dma2");
-
- /*
- * Some machines have an unterminated i8042 so check the device
- * tree and reserve the region if it does not appear. Later on
- * the i8042 code will try and reserve this region and fail.
- */
- if (!(i8042 = of_find_node_by_type(NULL, "8042")))
- request_region(I8042_DATA_REG, 16, "reserved (no i8042)");
- of_node_put(i8042);
-}
-
-void __init
-chrp_setup_arch(void)
-{
- struct device_node *root;
- unsigned int *opprop;
-
- /* openpic global configuration register (64-bit format). */
- /* openpic Interrupt Source Unit pointer (64-bit format). */
- /* python0 facility area (mmio) (64-bit format) REAL address. */
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000;
-
- if (ROOT_DEV == 0) {
- printk("No ramdisk, default root is /dev/sda2\n");
- ROOT_DEV = Root_SDA2;
- }
-
- printk("Boot arguments: %s\n", cmd_line);
-
- fwnmi_init();
-
-#ifndef CONFIG_PPC_ISERIES
- /* Find and initialize PCI host bridges */
- /* iSeries needs to be done much later. */
- eeh_init();
- find_and_init_phbs();
-#endif
-
- /* Find the Open PIC if present */
- root = of_find_node_by_path("/");
- opprop = (unsigned int *) get_property(root,
- "platform-open-pic", NULL);
- if (opprop != 0) {
- int n = prom_n_addr_cells(root);
- unsigned long openpic;
-
- for (openpic = 0; n > 0; --n)
- openpic = (openpic << 32) + *opprop++;
- printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic);
- OpenPIC_Addr = __ioremap(openpic, 0x40000, _PAGE_NO_CACHE);
- }
- of_node_put(root);
-
-#ifdef CONFIG_DUMMY_CONSOLE
- conswitchp = &dummy_con;
-#endif
-
-#ifdef CONFIG_PPC_PSERIES
- pSeries_nvram_init();
-#endif
-}
-
-void __init
-chrp_init2(void)
-{
- /* Manually leave the kernel version on the panel. */
- ppc_md.progress("Linux ppc64\n", 0);
- ppc_md.progress(UTS_RELEASE, 0);
-}
-
-/* Initialize firmware assisted non-maskable interrupts if
- * the firmware supports this feature.
- *
- */
-void __init fwnmi_init(void)
-{
- int ret;
- int ibm_nmi_register = rtas_token("ibm,nmi-register");
- if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
- return;
- ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
- __pa((unsigned long)SystemReset_FWNMI),
- __pa((unsigned long)MachineCheck_FWNMI));
- if (ret == 0)
- fwnmi_active = 1;
-}
-
-/* Early initialization. Relocation is on but do not reference unbolted pages */
-void __init pSeries_init_early(void)
-{
- void *comport;
-
- hpte_init_pSeries();
-
- if (ppc64_iommu_off)
- pci_dma_init_direct();
- else
- tce_init_pSeries();
-
-#ifdef CONFIG_SMP
- smp_init_pSeries();
-#endif
-
- /* Map the uart for udbg. */
- comport = (void *)__ioremap(naca->serialPortAddr, 16, _PAGE_NO_CACHE);
- udbg_init_uart(comport);
-
- ppc_md.udbg_putc = udbg_putc;
- ppc_md.udbg_getc = udbg_getc;
- ppc_md.udbg_getc_poll = udbg_getc_poll;
-}
-
-void __init
-chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- struct device_node * dn;
- char * hypertas;
- unsigned int len;
-
- ppc_md.setup_arch = chrp_setup_arch;
- ppc_md.get_cpuinfo = chrp_get_cpuinfo;
- if (naca->interrupt_controller == IC_OPEN_PIC) {
- ppc_md.init_IRQ = pSeries_init_openpic;
- ppc_md.get_irq = openpic_get_irq;
- } else {
- ppc_md.init_IRQ = xics_init_IRQ;
- ppc_md.get_irq = xics_get_irq;
- }
-
- ppc_md.log_error = pSeries_log_error;
-
- ppc_md.init = chrp_init2;
-
- ppc_md.pcibios_fixup = pSeries_final_fixup;
-
- ppc_md.restart = rtas_restart;
- ppc_md.power_off = rtas_power_off;
- ppc_md.halt = rtas_halt;
- ppc_md.panic = rtas_os_term;
-
- ppc_md.get_boot_time = pSeries_get_boot_time;
- ppc_md.get_rtc_time = pSeries_get_rtc_time;
- ppc_md.set_rtc_time = pSeries_set_rtc_time;
- ppc_md.calibrate_decr = pSeries_calibrate_decr;
-
- ppc_md.progress = chrp_progress;
-
- /* Build up the firmware_features bitmask field
- * using contents of device-tree/ibm,hypertas-functions.
- * Ultimately this functionality may be moved into prom.c prom_init().
- */
- cur_cpu_spec->firmware_features = 0;
- dn = of_find_node_by_path("/rtas");
- if (dn == NULL) {
- printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
- goto no_rtas;
- }
-
- hypertas = get_property(dn, "ibm,hypertas-functions", &len);
- if (hypertas) {
- while (len > 0){
- int i, hypertas_len;
- /* check value against table of strings */
- for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
- if ((firmware_features_table[i].name) &&
- (strcmp(firmware_features_table[i].name,hypertas))==0) {
- /* we have a match */
- cur_cpu_spec->firmware_features |=
- (firmware_features_table[i].val);
- break;
- }
- }
- hypertas_len = strlen(hypertas);
- len -= hypertas_len +1;
- hypertas+= hypertas_len +1;
- }
- }
-
- of_node_put(dn);
- no_rtas:
- printk(KERN_INFO "firmware_features = 0x%lx\n",
- cur_cpu_spec->firmware_features);
-}
-
-void chrp_progress(char *s, unsigned short hex)
-{
- struct device_node *root;
- int width, *p;
- char *os;
- static int display_character, set_indicator;
- static int max_width;
- static spinlock_t progress_lock = SPIN_LOCK_UNLOCKED;
- static int pending_newline = 0; /* did last write end with unprinted newline? */
-
- if (!rtas.base)
- return;
-
- if (max_width == 0) {
- if ((root = find_path_device("/rtas")) &&
- (p = (unsigned int *)get_property(root,
- "ibm,display-line-length",
- NULL)))
- max_width = *p;
- else
- max_width = 0x10;
- display_character = rtas_token("display-character");
- set_indicator = rtas_token("set-indicator");
- }
-
- if (display_character == RTAS_UNKNOWN_SERVICE) {
- /* use hex display if available */
- if (set_indicator != RTAS_UNKNOWN_SERVICE)
- rtas_call(set_indicator, 3, 1, NULL, 6, 0, hex);
- return;
- }
-
- spin_lock(&progress_lock);
-
- /*
- * Last write ended with newline, but we didn't print it since
- * it would just clear the bottom line of output. Print it now
- * instead.
- *
- * If no newline is pending, print a CR to start output at the
- * beginning of the line.
- */
- if (pending_newline) {
- rtas_call(display_character, 1, 1, NULL, '\r');
- rtas_call(display_character, 1, 1, NULL, '\n');
- pending_newline = 0;
- } else {
- rtas_call(display_character, 1, 1, NULL, '\r');
- }
-
- width = max_width;
- os = s;
- while (*os) {
- if (*os == '\n' || *os == '\r') {
- /* Blank to end of line. */
- while (width-- > 0)
- rtas_call(display_character, 1, 1, NULL, ' ');
-
- /* If newline is the last character, save it
- * until next call to avoid bumping up the
- * display output.
- */
- if (*os == '\n' && !os[1]) {
- pending_newline = 1;
- spin_unlock(&progress_lock);
- return;
- }
-
- /* RTAS wants CR-LF, not just LF */
-
- if (*os == '\n') {
- rtas_call(display_character, 1, 1, NULL, '\r');
- rtas_call(display_character, 1, 1, NULL, '\n');
- } else {
- /* CR might be used to re-draw a line, so we'll
- * leave it alone and not add LF.
- */
- rtas_call(display_character, 1, 1, NULL, *os);
- }
-
- width = max_width;
- } else {
- width--;
- rtas_call(display_character, 1, 1, NULL, *os);
- }
-
- os++;
-
- /* if we overwrite the screen length */
- if (width <= 0)
- while ((*os != 0) && (*os != '\n') && (*os != '\r'))
- os++;
- }
-
- /* Blank to end of line. */
- while (width-- > 0)
- rtas_call(display_character, 1, 1, NULL, ' ');
-
- spin_unlock(&progress_lock);
-}
-
-extern void setup_default_decr(void);
-
-/* Some sane defaults: 125 MHz timebase, 1GHz processor */
-#define DEFAULT_TB_FREQ 125000000UL
-#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
-
-void __init pSeries_calibrate_decr(void)
-{
- struct device_node *cpu;
- struct div_result divres;
- unsigned int *fp;
- int node_found;
-
- /*
- * The cpu node should have a timebase-frequency property
- * to tell us the rate at which the decrementer counts.
- */
- cpu = of_find_node_by_type(NULL, "cpu");
-
- ppc_tb_freq = DEFAULT_TB_FREQ; /* hardcoded default */
- node_found = 0;
- if (cpu != 0) {
- fp = (unsigned int *)get_property(cpu, "timebase-frequency",
- NULL);
- if (fp != 0) {
- node_found = 1;
- ppc_tb_freq = *fp;
- }
- }
- if (!node_found)
- printk(KERN_ERR "WARNING: Estimating decrementer frequency "
- "(not found)\n");
-
- ppc_proc_freq = DEFAULT_PROC_FREQ;
- node_found = 0;
- if (cpu != 0) {
- fp = (unsigned int *)get_property(cpu, "clock-frequency",
- NULL);
- if (fp != 0) {
- node_found = 1;
- ppc_proc_freq = *fp;
- }
- }
- if (!node_found)
- printk(KERN_ERR "WARNING: Estimating processor frequency "
- "(not found)\n");
-
- of_node_put(cpu);
-
- printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n",
- ppc_tb_freq/1000000, ppc_tb_freq%1000000);
- printk(KERN_INFO "time_init: processor frequency = %lu.%.6lu MHz\n",
- ppc_proc_freq/1000000, ppc_proc_freq%1000000);
-
- tb_ticks_per_jiffy = ppc_tb_freq / HZ;
- tb_ticks_per_sec = tb_ticks_per_jiffy * HZ;
- tb_ticks_per_usec = ppc_tb_freq / 1000000;
- tb_to_us = mulhwu_scale_factor(ppc_tb_freq, 1000000);
- div128_by_32(1024*1024, 0, tb_ticks_per_sec, &divres);
- tb_to_xs = divres.result_low;
-
- setup_default_decr();
-}
+++ /dev/null
-#define PCIFR(...)
-/************************************************************************/
-/* This module supports the iSeries I/O Address translation mapping */
-/* Copyright (C) 20yy <Allan H Trautman> <IBM Corp> */
-/* */
-/* This program is free software; you can redistribute it and/or modify */
-/* it under the terms of the GNU General Public License as published by */
-/* the Free Software Foundation; either version 2 of the License, or */
-/* (at your option) any later version. */
-/* */
-/* This program is distributed in the hope that it will be useful, */
-/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
-/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
-/* GNU General Public License for more details. */
-/* */
-/* You should have received a copy of the GNU General Public License */
-/* along with this program; if not, write to the: */
-/* Free Software Foundation, Inc., */
-/* 59 Temple Place, Suite 330, */
-/* Boston, MA 02111-1307 USA */
-/************************************************************************/
-/* Change Activity: */
-/* Created, December 14, 2000 */
-/* Added Bar table for IoMm performance. */
-/* Ported to ppc64 */
-/* Added dynamic table allocation */
-/* End Change Activity */
-/************************************************************************/
-#include <asm/types.h>
-#include <asm/resource.h>
-#include <linux/pci.h>
-#include <linux/spinlock.h>
-#include <asm/ppcdebug.h>
-#include <asm/iSeries/HvCallPci.h>
-#include <asm/iSeries/iSeries_pci.h>
-
-#include "iSeries_IoMmTable.h"
-#include "pci.h"
-
-/*
- * Table defines
- * Each Entry size is 4 MB * 1024 Entries = 4GB I/O address space.
- */
-#define Max_Entries 1024
-unsigned long iSeries_IoMmTable_Entry_Size = 0x0000000000400000;
-unsigned long iSeries_Base_Io_Memory = 0xE000000000000000;
-unsigned long iSeries_Max_Io_Memory = 0xE000000000000000;
-static long iSeries_CurrentIndex = 0;
-
-/*
- * Lookup Tables.
- */
-struct iSeries_Device_Node **iSeries_IoMmTable;
-u8 *iSeries_IoBarTable;
-
-/*
- * Static and Global variables
- */
-static char *iSeriesPciIoText = "iSeries PCI I/O";
-static spinlock_t iSeriesIoMmTableLock = SPIN_LOCK_UNLOCKED;
-
-/*
- * iSeries_IoMmTable_Initialize
- *
- * Allocates and initalizes the Address Translation Table and Bar
- * Tables to get them ready for use. Must be called before any
- * I/O space is handed out to the device BARs.
- * A follow up method,iSeries_IoMmTable_Status can be called to
- * adjust the table after the device BARs have been assiged to
- * resize the table.
- */
-void iSeries_IoMmTable_Initialize(void)
-{
- spin_lock(&iSeriesIoMmTableLock);
- iSeries_IoMmTable = kmalloc(sizeof(void *) * Max_Entries, GFP_KERNEL);
- iSeries_IoBarTable = kmalloc(sizeof(u8) * Max_Entries, GFP_KERNEL);
- spin_unlock(&iSeriesIoMmTableLock);
- PCIFR("IoMmTable Initialized 0x%p", iSeries_IoMmTable);
- if ((iSeries_IoMmTable == NULL) || (iSeries_IoBarTable == NULL))
- panic("PCI: I/O tables allocation failed.\n");
-}
-
-/*
- * iSeries_IoMmTable_AllocateEntry
- *
- * Adds pci_dev entry in address translation table
- *
- * - Allocates the number of entries required in table base on BAR
- * size.
- * - Allocates starting at iSeries_Base_Io_Memory and increases.
- * - The size is round up to be a multiple of entry size.
- * - CurrentIndex is incremented to keep track of the last entry.
- * - Builds the resource entry for allocated BARs.
- */
-static void iSeries_IoMmTable_AllocateEntry(struct pci_dev *PciDev,
- int BarNumber)
-{
- struct resource *BarResource = &PciDev->resource[BarNumber];
- long BarSize = pci_resource_len(PciDev, BarNumber);
-
- /*
- * No space to allocate, quick exit, skip Allocation.
- */
- if (BarSize == 0)
- return;
- /*
- * Set Resource values.
- */
- spin_lock(&iSeriesIoMmTableLock);
- BarResource->name = iSeriesPciIoText;
- BarResource->start =
- iSeries_IoMmTable_Entry_Size * iSeries_CurrentIndex;
- BarResource->start += iSeries_Base_Io_Memory;
- BarResource->end = BarResource->start+BarSize-1;
- /*
- * Allocate the number of table entries needed for BAR.
- */
- while (BarSize > 0 ) {
- *(iSeries_IoMmTable + iSeries_CurrentIndex) =
- (struct iSeries_Device_Node *)PciDev->sysdata;
- *(iSeries_IoBarTable + iSeries_CurrentIndex) = BarNumber;
- BarSize -= iSeries_IoMmTable_Entry_Size;
- ++iSeries_CurrentIndex;
- }
- iSeries_Max_Io_Memory = iSeries_Base_Io_Memory +
- (iSeries_IoMmTable_Entry_Size * iSeries_CurrentIndex);
- spin_unlock(&iSeriesIoMmTableLock);
-}
-
-/*
- * iSeries_allocateDeviceBars
- *
- * - Allocates ALL pci_dev BAR's and updates the resources with the
- * BAR value. BARS with zero length will have the resources
- * The HvCallPci_getBarParms is used to get the size of the BAR
- * space. It calls iSeries_IoMmTable_AllocateEntry to allocate
- * each entry.
- * - Loops through The Bar resources(0 - 5) including the ROM
- * is resource(6).
- */
-void iSeries_allocateDeviceBars(struct pci_dev *PciDev)
-{
- struct resource *BarResource;
- int BarNumber;
-
- for (BarNumber = 0; BarNumber <= PCI_ROM_RESOURCE; ++BarNumber) {
- BarResource = &PciDev->resource[BarNumber];
- iSeries_IoMmTable_AllocateEntry(PciDev, BarNumber);
- }
-}
-
-/*
- * Translates the IoAddress to the device that is mapped to IoSpace.
- * This code is inlined, see the iSeries_pci.c file for the replacement.
- */
-struct iSeries_Device_Node *iSeries_xlateIoMmAddress(void *IoAddress)
-{
- return NULL;
-}
-
-/*
- * Status hook for IoMmTable
- */
-void iSeries_IoMmTable_Status(void)
-{
- PCIFR("IoMmTable......: 0x%p", iSeries_IoMmTable);
- PCIFR("IoMmTable Range: 0x%p to 0x%p", iSeries_Base_Io_Memory,
- iSeries_Max_Io_Memory);
-}
+++ /dev/null
-#ifndef _ISERIES_IOMMTABLE_H
-#define _ISERIES_IOMMTABLE_H
-/************************************************************************/
-/* File iSeries_IoMmTable.h created by Allan Trautman on Dec 12 2001. */
-/************************************************************************/
-/* Interfaces for the write/read Io address translation table. */
-/* Copyright (C) 20yy Allan H Trautman, IBM Corporation */
-/* */
-/* This program is free software; you can redistribute it and/or modify */
-/* it under the terms of the GNU General Public License as published by */
-/* the Free Software Foundation; either version 2 of the License, or */
-/* (at your option) any later version. */
-/* */
-/* This program is distributed in the hope that it will be useful, */
-/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
-/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
-/* GNU General Public License for more details. */
-/* */
-/* You should have received a copy of the GNU General Public License */
-/* along with this program; if not, write to the: */
-/* Free Software Foundation, Inc., */
-/* 59 Temple Place, Suite 330, */
-/* Boston, MA 02111-1307 USA */
-/************************************************************************/
-/* Change Activity: */
-/* Created December 12, 2000 */
-/* Ported to ppc64, August 30, 2001 */
-/* End Change Activity */
-/************************************************************************/
-
-struct pci_dev;
-struct iSeries_Device_Node;
-
-extern struct iSeries_Device_Node **iSeries_IoMmTable;
-extern u8 *iSeries_IoBarTable;
-extern unsigned long iSeries_Base_Io_Memory;
-extern unsigned long iSeries_Max_Io_Memory;
-extern unsigned long iSeries_Base_Io_Memory;
-extern unsigned long iSeries_IoMmTable_Entry_Size;
-/*
- * iSeries_IoMmTable_Initialize
- *
- * - Initalizes the Address Translation Table and get it ready for use.
- * Must be called before any client calls any of the other methods.
- *
- * Parameters: None.
- *
- * Return: None.
- */
-extern void iSeries_IoMmTable_Initialize(void);
-extern void iSeries_IoMmTable_Status(void);
-
-/*
- * iSeries_allocateDeviceBars
- *
- * - Allocates ALL pci_dev BAR's and updates the resources with the BAR
- * value. BARS with zero length will not have the resources. The
- * HvCallPci_getBarParms is used to get the size of the BAR space.
- * It calls iSeries_IoMmTable_AllocateEntry to allocate each entry.
- *
- * Parameters:
- * pci_dev = Pointer to pci_dev structure that will be mapped to pseudo
- * I/O Address.
- *
- * Return:
- * The pci_dev I/O resources updated with pseudo I/O Addresses.
- */
-extern void iSeries_allocateDeviceBars(struct pci_dev *);
-
-/*
- * iSeries_xlateIoMmAddress
- *
- * - Translates an I/O Memory address to Device Node that has been the
- * allocated the psuedo I/O Address.
- *
- * Parameters:
- * IoAddress = I/O Memory Address.
- *
- * Return:
- * An iSeries_Device_Node to the device mapped to the I/O address. The
- * BarNumber and BarOffset are valid if the Device Node is returned.
- */
-extern struct iSeries_Device_Node *iSeries_xlateIoMmAddress(void *IoAddress);
-
-#endif /* _ISERIES_IOMMTABLE_H */
+++ /dev/null
-/*
- * mf_proc.c
- * Copyright (C) 2001 Kyle A. Lucke IBM Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <asm/uaccess.h>
-#include <asm/iSeries/mf.h>
-
-static int proc_mf_dump_cmdline(char *page, char **start, off_t off,
- int count, int *eof, void *data)
-{
- int len = count;
- char *p;
-
- if (off) {
- *eof = 1;
- return 0;
- }
-
- len = mf_getCmdLine(page, &len, (u64)data);
-
- p = page;
- while (len < (count - 1)) {
- if (!*p || *p == '\n')
- break;
- p++;
- len++;
- }
- *p = '\n';
- p++;
- *p = 0;
-
- return p - page;
-}
-
-#if 0
-static int proc_mf_dump_vmlinux(char *page, char **start, off_t off,
- int count, int *eof, void *data)
-{
- int sizeToGet = count;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EACCES;
-
- if (mf_getVmlinuxChunk(page, &sizeToGet, off, (u64)data) == 0) {
- if (sizeToGet != 0) {
- *start = page + off;
- return sizeToGet;
- }
- *eof = 1;
- return 0;
- }
- *eof = 1;
- return 0;
-}
-#endif
-
-static int proc_mf_dump_side(char *page, char **start, off_t off,
- int count, int *eof, void *data)
-{
- int len;
- char mf_current_side = mf_getSide();
-
- len = sprintf(page, "%c\n", mf_current_side);
-
- if (len <= (off + count))
- *eof = 1;
- *start = page + off;
- len -= off;
- if (len > count)
- len = count;
- if (len < 0)
- len = 0;
- return len;
-}
-
-static int proc_mf_change_side(struct file *file, const char __user *buffer,
- unsigned long count, void *data)
-{
- char stkbuf[10];
-
- if (!capable(CAP_SYS_ADMIN))
- return -EACCES;
-
- if (count > (sizeof(stkbuf) - 1))
- count = sizeof(stkbuf) - 1;
- if (copy_from_user(stkbuf, buffer, count))
- return -EFAULT;
- stkbuf[count] = 0;
- if ((*stkbuf != 'A') && (*stkbuf != 'B') &&
- (*stkbuf != 'C') && (*stkbuf != 'D')) {
- printk(KERN_ERR "mf_proc.c: proc_mf_change_side: invalid side\n");
- return -EINVAL;
- }
-
- mf_setSide(*stkbuf);
-
- return count;
-}
-
-static int proc_mf_dump_src(char *page, char **start, off_t off,
- int count, int *eof, void *data)
-{
- int len;
-
- mf_getSrcHistory(page, count);
- len = count;
- len -= off;
- if (len < count) {
- *eof = 1;
- if (len <= 0)
- return 0;
- } else
- len = count;
- *start = page + off;
- return len;
-}
-
-static int proc_mf_change_src(struct file *file, const char __user *buffer,
- unsigned long count, void *data)
-{
- char stkbuf[10];
-
- if (!capable(CAP_SYS_ADMIN))
- return -EACCES;
-
- if ((count < 4) && (count != 1)) {
- printk(KERN_ERR "mf_proc: invalid src\n");
- return -EINVAL;
- }
-
- if (count > (sizeof(stkbuf) - 1))
- count = sizeof(stkbuf) - 1;
- if (copy_from_user(stkbuf, buffer, count))
- return -EFAULT;
-
- if ((count == 1) && (*stkbuf == '\0'))
- mf_clearSrc();
- else
- mf_displaySrc(*(u32 *)stkbuf);
-
- return count;
-}
-
-static int proc_mf_change_cmdline(struct file *file, const char *buffer,
- unsigned long count, void *data)
-{
- if (!capable(CAP_SYS_ADMIN))
- return -EACCES;
-
- mf_setCmdLine(buffer, count, (u64)data);
-
- return count;
-}
-
-static ssize_t proc_mf_change_vmlinux(struct file *file,
- const char __user *buf,
- size_t count, loff_t *ppos)
-{
- struct inode * inode = file->f_dentry->d_inode;
- struct proc_dir_entry * dp = PDE(inode);
- int rc;
- if (!capable(CAP_SYS_ADMIN))
- return -EACCES;
-
- rc = mf_setVmlinuxChunk(buf, count, *ppos, (u64)dp->data);
- if (rc < 0)
- return rc;
-
- *ppos += count;
-
- return count;
-}
-
-static struct file_operations proc_vmlinux_operations = {
- .write = proc_mf_change_vmlinux,
-};
-
-static int __init mf_proc_init(void)
-{
- struct proc_dir_entry *mf_proc_root;
- struct proc_dir_entry *ent;
- struct proc_dir_entry *mf;
- char name[2];
- int i;
-
- mf_proc_root = proc_mkdir("iSeries/mf", NULL);
- if (!mf_proc_root)
- return 1;
-
- name[1] = '\0';
- for (i = 0; i < 4; i++) {
- name[0] = 'A' + i;
- mf = proc_mkdir(name, mf_proc_root);
- if (!mf)
- return 1;
-
- ent = create_proc_entry("cmdline", S_IFREG|S_IRUSR|S_IWUSR, mf);
- if (!ent)
- return 1;
- ent->nlink = 1;
- ent->data = (void *)(long)i;
- ent->read_proc = proc_mf_dump_cmdline;
- ent->write_proc = proc_mf_change_cmdline;
-
- if (i == 3) /* no vmlinux entry for 'D' */
- continue;
-
- ent = create_proc_entry("vmlinux", S_IFREG|S_IWUSR, mf);
- if (!ent)
- return 1;
- ent->nlink = 1;
- ent->data = (void *)(long)i;
- ent->proc_fops = &proc_vmlinux_operations;
- }
-
- ent = create_proc_entry("side", S_IFREG|S_IRUSR|S_IWUSR, mf_proc_root);
- if (!ent)
- return 1;
- ent->nlink = 1;
- ent->data = (void *)0;
- ent->read_proc = proc_mf_dump_side;
- ent->write_proc = proc_mf_change_side;
-
- ent = create_proc_entry("src", S_IFREG|S_IRUSR|S_IWUSR, mf_proc_root);
- if (!ent)
- return 1;
- ent->nlink = 1;
- ent->data = (void *)0;
- ent->read_proc = proc_mf_dump_src;
- ent->write_proc = proc_mf_change_src;
-
- return 0;
-}
-
-__initcall(mf_proc_init);
+++ /dev/null
-/*
- * arch/ppc/kernel/open_pic.c -- OpenPIC Interrupt Handling
- *
- * Copyright (C) 1997 Geert Uytterhoeven
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/smp.h>
-#include <linux/interrupt.h>
-#include <asm/ptrace.h>
-#include <asm/signal.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/irq.h>
-#include <asm/prom.h>
-
-#include <asm/machdep.h>
-
-#include "open_pic.h"
-#include "open_pic_defs.h"
-#include "i8259.h"
-#include <asm/ppcdebug.h>
-
-void* OpenPIC_Addr;
-static volatile struct OpenPIC *OpenPIC = NULL;
-u_int OpenPIC_NumInitSenses __initdata = 0;
-u_char *OpenPIC_InitSenses __initdata = NULL;
-
-/*
- * Local (static) OpenPIC Operations
- */
-
-
-/* Global Operations */
-static void openpic_reset(void);
-static void openpic_enable_8259_pass_through(void);
-static void openpic_disable_8259_pass_through(void);
-static u_int openpic_irq(void);
-static void openpic_eoi(void);
-static u_int openpic_get_priority(void);
-static void openpic_set_priority(u_int pri);
-static u_int openpic_get_spurious(void);
-static void openpic_set_spurious(u_int vector);
-
-#ifdef CONFIG_SMP
-/* Interprocessor Interrupts */
-static void openpic_initipi(u_int ipi, u_int pri, u_int vector);
-static irqreturn_t openpic_ipi_action(int cpl, void *dev_id,
- struct pt_regs *regs);
-#endif
-
-/* Timer Interrupts */
-static void openpic_inittimer(u_int timer, u_int pri, u_int vector);
-static void openpic_maptimer(u_int timer, u_int cpumask);
-
-/* Interrupt Sources */
-static void openpic_enable_irq(u_int irq);
-static void openpic_disable_irq(u_int irq);
-static void openpic_initirq(u_int irq, u_int pri, u_int vector, int polarity,
- int is_level);
-static void openpic_mapirq(u_int irq, u_int cpumask);
-
-static void find_ISUs(void);
-
-static u_int NumProcessors;
-static u_int NumSources;
-static int NumISUs;
-static int open_pic_irq_offset;
-static volatile unsigned char* chrp_int_ack_special;
-
-OpenPIC_SourcePtr ISU[OPENPIC_MAX_ISU];
-
-static void openpic_end_irq(unsigned int irq_nr);
-static void openpic_set_affinity(unsigned int irq_nr, cpumask_t cpumask);
-
-struct hw_interrupt_type open_pic = {
- " OpenPIC ",
- NULL,
- NULL,
- openpic_enable_irq,
- openpic_disable_irq,
- NULL,
- openpic_end_irq,
- openpic_set_affinity
-};
-
-#ifdef CONFIG_SMP
-static void openpic_end_ipi(unsigned int irq_nr);
-static void openpic_enable_ipi(unsigned int irq_nr);
-static void openpic_disable_ipi(unsigned int irq_nr);
-
-struct hw_interrupt_type open_pic_ipi = {
- " OpenPIC ",
- NULL,
- NULL,
- openpic_enable_ipi,
- openpic_disable_ipi,
- NULL,
- openpic_end_ipi,
- NULL
-};
-#endif /* CONFIG_SMP */
-
-unsigned int openpic_vec_ipi;
-unsigned int openpic_vec_timer;
-unsigned int openpic_vec_spurious;
-
-/*
- * Accesses to the current processor's openpic registers
- */
-#ifdef CONFIG_SMP
-#define THIS_CPU Processor[cpu]
-#define DECL_THIS_CPU int cpu = hard_smp_processor_id()
-#define CHECK_THIS_CPU check_arg_cpu(cpu)
-#else
-#define THIS_CPU Processor[hard_smp_processor_id()]
-#define DECL_THIS_CPU
-#define CHECK_THIS_CPU
-#endif /* CONFIG_SMP */
-
-#if 0
-#define check_arg_ipi(ipi) \
- if (ipi < 0 || ipi >= OPENPIC_NUM_IPI) \
- printk(KERN_ERR "open_pic.c:%d: invalid ipi %d\n", __LINE__, ipi);
-#define check_arg_timer(timer) \
- if (timer < 0 || timer >= OPENPIC_NUM_TIMERS) \
- printk(KERN_ERR "open_pic.c:%d: invalid timer %d\n", __LINE__, timer);
-#define check_arg_vec(vec) \
- if (vec < 0 || vec >= OPENPIC_NUM_VECTORS) \
- printk(KERN_ERR "open_pic.c:%d: invalid vector %d\n", __LINE__, vec);
-#define check_arg_pri(pri) \
- if (pri < 0 || pri >= OPENPIC_NUM_PRI) \
- printk(KERN_ERR "open_pic.c:%d: invalid priority %d\n", __LINE__, pri);
-/*
- * Print out a backtrace if it's out of range, since if it's larger than NR_IRQ's
- * data has probably been corrupted and we're going to panic or deadlock later
- * anyway --Troy
- */
-#define check_arg_irq(irq) \
- if (irq < open_pic_irq_offset || irq >= (NumSources+open_pic_irq_offset)){ \
- printk(KERN_ERR "open_pic.c:%d: invalid irq %d\n", __LINE__, irq); \
- dump_stack(); }
-#define check_arg_cpu(cpu) \
- if (cpu < 0 || cpu >= OPENPIC_MAX_PROCESSORS){ \
- printk(KERN_ERR "open_pic.c:%d: invalid cpu %d\n", __LINE__, cpu); \
- dump_stack(); }
-#else
-#define check_arg_ipi(ipi) do {} while (0)
-#define check_arg_timer(timer) do {} while (0)
-#define check_arg_vec(vec) do {} while (0)
-#define check_arg_pri(pri) do {} while (0)
-#define check_arg_irq(irq) do {} while (0)
-#define check_arg_cpu(cpu) do {} while (0)
-#endif
-
-#define GET_ISU(source) ISU[(source) >> 4][(source) & 0xf]
-
-void __init pSeries_init_openpic(void)
-{
- struct device_node *np;
- int i;
- unsigned int *addrp;
- unsigned char* chrp_int_ack_special = NULL;
- unsigned char init_senses[NR_IRQS - NUM_ISA_INTERRUPTS];
- int nmi_irq = -1;
-#if defined(CONFIG_VT) && defined(CONFIG_ADB_KEYBOARD) && defined(XMON)
- struct device_node *kbd;
-#endif
-
- if (!(np = of_find_node_by_name(NULL, "pci"))
- || !(addrp = (unsigned int *)
- get_property(np, "8259-interrupt-acknowledge", NULL)))
- printk(KERN_ERR "Cannot find pci to get ack address\n");
- else
- chrp_int_ack_special = (unsigned char *)
- __ioremap(addrp[prom_n_addr_cells(np)-1], 1, _PAGE_NO_CACHE);
- /* hydra still sets OpenPIC_InitSenses to a static set of values */
- if (OpenPIC_InitSenses == NULL) {
- prom_get_irq_senses(init_senses, NUM_ISA_INTERRUPTS, NR_IRQS);
- OpenPIC_InitSenses = init_senses;
- OpenPIC_NumInitSenses = NR_IRQS - NUM_ISA_INTERRUPTS;
- }
- openpic_init(1, NUM_ISA_INTERRUPTS, chrp_int_ack_special, nmi_irq);
- for (i = 0; i < NUM_ISA_INTERRUPTS; i++)
- irq_desc[i].handler = &i8259_pic;
- of_node_put(np);
-}
-
-static inline u_int openpic_read(volatile u_int *addr)
-{
- u_int val;
-
- val = in_le32(addr);
- return val;
-}
-
-static inline void openpic_write(volatile u_int *addr, u_int val)
-{
- out_le32(addr, val);
-}
-
-static inline u_int openpic_readfield(volatile u_int *addr, u_int mask)
-{
- u_int val = openpic_read(addr);
- return val & mask;
-}
-
-static inline void openpic_writefield(volatile u_int *addr, u_int mask,
- u_int field)
-{
- u_int val = openpic_read(addr);
- openpic_write(addr, (val & ~mask) | (field & mask));
-}
-
-static inline void openpic_clearfield(volatile u_int *addr, u_int mask)
-{
- openpic_writefield(addr, mask, 0);
-}
-
-static inline void openpic_setfield(volatile u_int *addr, u_int mask)
-{
- openpic_writefield(addr, mask, mask);
-}
-
-static void openpic_safe_writefield(volatile u_int *addr, u_int mask,
- u_int field)
-{
- unsigned int loops = 100000;
-
- openpic_setfield(addr, OPENPIC_MASK);
- while (openpic_read(addr) & OPENPIC_ACTIVITY) {
- if (!loops--) {
- printk(KERN_ERR "openpic_safe_writefield timeout\n");
- break;
- }
- }
- openpic_writefield(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK);
-}
-
-#ifdef CONFIG_SMP
-
-static int broken_ipi_registers;
-
-static u_int openpic_read_IPI(volatile u_int* addr)
-{
- u_int val = 0;
-
- if (broken_ipi_registers)
- /* yes this is right ... bug, feature, you decide! -- tgall */
- val = in_be32(addr);
- else
- val = in_le32(addr);
-
- return val;
-}
-
-static void openpic_test_broken_IPI(void)
-{
- u_int t;
-
- openpic_write(&OpenPIC->Global.IPI_Vector_Priority(0), OPENPIC_MASK);
- t = openpic_read(&OpenPIC->Global.IPI_Vector_Priority(0));
- if (t == le32_to_cpu(OPENPIC_MASK)) {
- printk(KERN_INFO "OpenPIC reversed IPI registers detected\n");
- broken_ipi_registers = 1;
- }
-}
-
-/* because of the power3 be / le above, this is needed */
-static inline void openpic_writefield_IPI(volatile u_int* addr, u_int mask, u_int field)
-{
- u_int val = openpic_read_IPI(addr);
- openpic_write(addr, (val & ~mask) | (field & mask));
-}
-
-static inline void openpic_clearfield_IPI(volatile u_int *addr, u_int mask)
-{
- openpic_writefield_IPI(addr, mask, 0);
-}
-
-static inline void openpic_setfield_IPI(volatile u_int *addr, u_int mask)
-{
- openpic_writefield_IPI(addr, mask, mask);
-}
-
-static void openpic_safe_writefield_IPI(volatile u_int *addr, u_int mask, u_int field)
-{
- unsigned int loops = 100000;
-
- openpic_setfield_IPI(addr, OPENPIC_MASK);
-
- /* wait until it's not in use */
- /* BenH: Is this code really enough ? I would rather check the result
- * and eventually retry ...
- */
- while(openpic_read_IPI(addr) & OPENPIC_ACTIVITY) {
- if (!loops--) {
- printk(KERN_ERR "openpic_safe_writefield timeout\n");
- break;
- }
- }
-
- openpic_writefield_IPI(addr, mask, field | OPENPIC_MASK);
-}
-#endif /* CONFIG_SMP */
-
-void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack,
- int programmer_switch_irq)
-{
- u_int t, i;
- u_int timerfreq;
- const char *version;
-
- if (!OpenPIC_Addr) {
- printk(KERN_INFO "No OpenPIC found !\n");
- return;
- }
- OpenPIC = (volatile struct OpenPIC *)OpenPIC_Addr;
-
- ppc64_boot_msg(0x20, "OpenPic Init");
-
- t = openpic_read(&OpenPIC->Global.Feature_Reporting0);
- switch (t & OPENPIC_FEATURE_VERSION_MASK) {
- case 1:
- version = "1.0";
- break;
- case 2:
- version = "1.2";
- break;
- case 3:
- version = "1.3";
- break;
- default:
- version = "?";
- break;
- }
- NumProcessors = ((t & OPENPIC_FEATURE_LAST_PROCESSOR_MASK) >>
- OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT) + 1;
- NumSources = ((t & OPENPIC_FEATURE_LAST_SOURCE_MASK) >>
- OPENPIC_FEATURE_LAST_SOURCE_SHIFT) + 1;
- printk(KERN_INFO "OpenPIC Version %s (%d CPUs and %d IRQ sources) at %p\n",
- version, NumProcessors, NumSources, OpenPIC);
- timerfreq = openpic_read(&OpenPIC->Global.Timer_Frequency);
- if (timerfreq)
- printk(KERN_INFO "OpenPIC timer frequency is %d.%06d MHz\n",
- timerfreq / 1000000, timerfreq % 1000000);
-
- if (!main_pic)
- return;
-
- open_pic_irq_offset = offset;
- chrp_int_ack_special = (volatile unsigned char*)chrp_ack;
-
- find_ISUs();
-
- /* Initialize timer interrupts */
- for (i = 0; i < OPENPIC_NUM_TIMERS; i++) {
- /* Disabled, Priority 0 */
- openpic_inittimer(i, 0, openpic_vec_timer+i);
- /* No processor */
- openpic_maptimer(i, 0);
- }
-
-#ifdef CONFIG_SMP
- /* Initialize IPI interrupts */
- openpic_test_broken_IPI();
- for (i = 0; i < OPENPIC_NUM_IPI; i++) {
- /* Disabled, Priority 10..13 */
- openpic_initipi(i, 10+i, openpic_vec_ipi+i);
- /* IPIs are per-CPU */
- irq_desc[openpic_vec_ipi+i].status |= IRQ_PER_CPU;
- irq_desc[openpic_vec_ipi+i].handler = &open_pic_ipi;
- }
-#endif
-
- /* Initialize external interrupts */
- openpic_set_priority(0xf);
-
- /* SIOint (8259 cascade) is special */
- if (offset) {
- openpic_initirq(0, 8, offset, 1, 1);
- openpic_mapirq(0, 1 << get_hard_smp_processor_id(boot_cpuid));
- }
-
- /* Init all external sources */
- for (i = 0; i < NumSources; i++) {
- int pri, sense;
-
- /* skip cascade if any */
- if (offset && i == 0)
- continue;
- /* the bootloader may have left it enabled (bad !) */
- openpic_disable_irq(i+offset);
-
- pri = (i == programmer_switch_irq)? 9: 8;
- sense = (i < OpenPIC_NumInitSenses)? OpenPIC_InitSenses[i]: 1;
- if (sense)
- irq_desc[i+offset].status = IRQ_LEVEL;
-
- /* Enabled, Priority 8 or 9 */
- openpic_initirq(i, pri, i+offset, !sense, sense);
- /* Processor 0 */
- openpic_mapirq(i, 1 << get_hard_smp_processor_id(boot_cpuid));
- }
-
- /* Init descriptors */
- for (i = offset; i < NumSources + offset; i++)
- irq_desc[i].handler = &open_pic;
-
- /* Initialize the spurious interrupt */
- openpic_set_spurious(openpic_vec_spurious);
-
- openpic_set_priority(0);
- openpic_disable_8259_pass_through();
-
- ppc64_boot_msg(0x25, "OpenPic Done");
-}
-
-/*
- * We cant do this in init_IRQ because we need the memory subsystem up for
- * request_irq()
- */
-static int __init openpic_setup_i8259(void)
-{
- if (systemcfg->platform == PLATFORM_POWERMAC)
- return 0;
-
- if (naca->interrupt_controller == IC_OPEN_PIC) {
- /* Initialize the cascade */
- if (request_irq(NUM_ISA_INTERRUPTS, no_action, SA_INTERRUPT,
- "82c59 cascade", NULL))
- printk(KERN_ERR "Unable to get OpenPIC IRQ 0 for cascade\n");
- i8259_init();
- }
-
- return 0;
-}
-arch_initcall(openpic_setup_i8259);
-
-void openpic_setup_ISU(int isu_num, unsigned long addr)
-{
- if (isu_num >= OPENPIC_MAX_ISU)
- return;
- ISU[isu_num] = (OpenPIC_SourcePtr) __ioremap(addr, 0x400, _PAGE_NO_CACHE);
- if (isu_num >= NumISUs)
- NumISUs = isu_num + 1;
-}
-
-void find_ISUs(void)
-{
- /* For PowerMac, setup ISUs on base openpic */
- if (systemcfg->platform == PLATFORM_POWERMAC) {
- int i;
- for (i=0; i<128; i+=0x10) {
- ISU[i>>4] = &((struct OpenPIC *)OpenPIC_Addr)->Source[i];
- NumISUs++;
- }
- }
- /* Use /interrupt-controller/reg and
- * /interrupt-controller/interrupt-ranges from OF device tree
- * the ISU array is setup in chrp_pci.c in ibm_add_bridges
- * as a result
- * -- tgall
- */
-
- /* basically each ISU is a bus, and this assumes that
- * open_pic_isu_count interrupts per bus are possible
- * ISU == Interrupt Source
- *
- * On G5, we keep the original NumSources provided by the controller,
- * it's below 128, so we have room to stuff the IPIs and timers like darwin
- * does. We put the spurrious vector up at 0xff though.
- */
- if (systemcfg->platform == PLATFORM_POWERMAC) {
- openpic_vec_ipi = NumSources;
- openpic_vec_timer = openpic_vec_ipi + 4;
- openpic_vec_spurious = 0xff;
- } else {
- NumSources = NumISUs * 0x10;
-
- openpic_vec_ipi = NumSources + open_pic_irq_offset;
- openpic_vec_timer = openpic_vec_ipi + OPENPIC_NUM_IPI;
- openpic_vec_spurious = openpic_vec_timer + OPENPIC_NUM_TIMERS;
- }
-}
-
-static inline void openpic_reset(void)
-{
- openpic_setfield(&OpenPIC->Global.Global_Configuration0,
- OPENPIC_CONFIG_RESET);
-}
-
-static inline void openpic_enable_8259_pass_through(void)
-{
- openpic_clearfield(&OpenPIC->Global.Global_Configuration0,
- OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
-}
-
-static void openpic_disable_8259_pass_through(void)
-{
- openpic_setfield(&OpenPIC->Global.Global_Configuration0,
- OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
-}
-
-/*
- * Find out the current interrupt
- */
-static u_int openpic_irq(void)
-{
- u_int vec;
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- vec = openpic_readfield(&OpenPIC->THIS_CPU.Interrupt_Acknowledge,
- OPENPIC_VECTOR_MASK);
- return vec;
-}
-
-static void openpic_eoi(void)
-{
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- openpic_write(&OpenPIC->THIS_CPU.EOI, 0);
- /* Handle PCI write posting */
- (void)openpic_read(&OpenPIC->THIS_CPU.EOI);
-}
-
-
-static inline u_int openpic_get_priority(void)
-{
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- return openpic_readfield(&OpenPIC->THIS_CPU.Current_Task_Priority,
- OPENPIC_CURRENT_TASK_PRIORITY_MASK);
-}
-
-static void openpic_set_priority(u_int pri)
-{
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- check_arg_pri(pri);
- openpic_writefield(&OpenPIC->THIS_CPU.Current_Task_Priority,
- OPENPIC_CURRENT_TASK_PRIORITY_MASK, pri);
-}
-
-/*
- * Get/set the spurious vector
- */
-static inline u_int openpic_get_spurious(void)
-{
- return openpic_readfield(&OpenPIC->Global.Spurious_Vector,
- OPENPIC_VECTOR_MASK);
-}
-
-static void openpic_set_spurious(u_int vec)
-{
- check_arg_vec(vec);
- openpic_writefield(&OpenPIC->Global.Spurious_Vector, OPENPIC_VECTOR_MASK,
- vec);
-}
-
-/*
- * Convert a cpu mask from logical to physical cpu numbers.
- */
-static inline u32 physmask(u32 cpumask)
-{
- int i;
- u32 mask = 0;
-
- for (i = 0; i < NR_CPUS; ++i, cpumask >>= 1)
- mask |= (cpumask & 1) << get_hard_smp_processor_id(i);
- return mask;
-}
-
-void openpic_init_processor(u_int cpumask)
-{
- openpic_write(&OpenPIC->Global.Processor_Initialization,
- physmask(cpumask & cpus_addr(cpu_online_map)[0]));
-}
-
-#ifdef CONFIG_SMP
-/*
- * Initialize an interprocessor interrupt (and disable it)
- *
- * ipi: OpenPIC interprocessor interrupt number
- * pri: interrupt source priority
- * vec: the vector it will produce
- */
-static void __init openpic_initipi(u_int ipi, u_int pri, u_int vec)
-{
- check_arg_ipi(ipi);
- check_arg_pri(pri);
- check_arg_vec(vec);
- openpic_safe_writefield_IPI(&OpenPIC->Global.IPI_Vector_Priority(ipi),
- OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK,
- (pri << OPENPIC_PRIORITY_SHIFT) | vec);
-}
-
-/*
- * Send an IPI to one or more CPUs
- *
- * Externally called, however, it takes an IPI number (0...OPENPIC_NUM_IPI)
- * and not a system-wide interrupt number
- */
-void openpic_cause_IPI(u_int ipi, u_int cpumask)
-{
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- check_arg_ipi(ipi);
- openpic_write(&OpenPIC->THIS_CPU.IPI_Dispatch(ipi),
- physmask(cpumask & cpus_addr(cpu_online_map)[0]));
-}
-
-void openpic_request_IPIs(void)
-{
- int i;
-
- /*
- * Make sure this matches what is defined in smp.c for
- * smp_message_{pass|recv}() or what shows up in
- * /proc/interrupts will be wrong!!! --Troy */
-
- if (OpenPIC == NULL)
- return;
-
- /* IPIs are marked SA_INTERRUPT as they must run with irqs disabled */
- request_irq(openpic_vec_ipi, openpic_ipi_action, SA_INTERRUPT,
- "IPI0 (call function)", NULL);
- request_irq(openpic_vec_ipi+1, openpic_ipi_action, SA_INTERRUPT,
- "IPI1 (reschedule)", NULL);
- request_irq(openpic_vec_ipi+2, openpic_ipi_action, SA_INTERRUPT,
- "IPI2 (unused)", NULL);
- request_irq(openpic_vec_ipi+3, openpic_ipi_action, SA_INTERRUPT,
- "IPI3 (debugger break)", NULL);
-
- for ( i = 0; i < OPENPIC_NUM_IPI ; i++ )
- openpic_enable_ipi(openpic_vec_ipi+i);
-}
-
-/*
- * Do per-cpu setup for SMP systems.
- *
- * Get IPI's working and start taking interrupts.
- * -- Cort
- */
-static spinlock_t openpic_setup_lock __devinitdata = SPIN_LOCK_UNLOCKED;
-
-void __devinit do_openpic_setup_cpu(void)
-{
-#ifdef CONFIG_IRQ_ALL_CPUS
- int i;
- u32 msk = 1 << hard_smp_processor_id();
-#endif
-
- spin_lock(&openpic_setup_lock);
-
-#ifdef CONFIG_IRQ_ALL_CPUS
- /* let the openpic know we want intrs. default affinity
- * is 0xffffffff until changed via /proc
- * That's how it's done on x86. If we want it differently, then
- * we should make sure we also change the default values of irq_affinity
- * in irq.c.
- */
- for (i = 0; i < NumSources ; i++)
- openpic_mapirq(i, openpic_read(&GET_ISU(i).Destination) | msk);
-#endif /* CONFIG_IRQ_ALL_CPUS */
- openpic_set_priority(0);
-
- spin_unlock(&openpic_setup_lock);
-}
-#endif /* CONFIG_SMP */
-
-/*
- * Initialize a timer interrupt (and disable it)
- *
- * timer: OpenPIC timer number
- * pri: interrupt source priority
- * vec: the vector it will produce
- */
-static void __init openpic_inittimer(u_int timer, u_int pri, u_int vec)
-{
- check_arg_timer(timer);
- check_arg_pri(pri);
- check_arg_vec(vec);
- openpic_safe_writefield(&OpenPIC->Global.Timer[timer].Vector_Priority,
- OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK,
- (pri << OPENPIC_PRIORITY_SHIFT) | vec);
-}
-
-/*
- * Map a timer interrupt to one or more CPUs
- */
-static void __init openpic_maptimer(u_int timer, u_int cpumask)
-{
- check_arg_timer(timer);
- openpic_write(&OpenPIC->Global.Timer[timer].Destination,
- physmask(cpumask & cpus_addr(cpu_online_map)[0]));
-}
-
-
-/*
- *
- * All functions below take an offset'ed irq argument
- *
- */
-
-
-/*
- * Enable/disable an external interrupt source
- *
- * Externally called, irq is an offseted system-wide interrupt number
- */
-static void openpic_enable_irq(u_int irq)
-{
- unsigned int loops = 100000;
- check_arg_irq(irq);
-
- openpic_clearfield(&GET_ISU(irq - open_pic_irq_offset).Vector_Priority, OPENPIC_MASK);
- /* make sure mask gets to controller before we return to user */
- do {
- if (!loops--) {
- printk(KERN_ERR "openpic_enable_irq timeout\n");
- break;
- }
-
- mb(); /* sync is probably useless here */
- } while(openpic_readfield(&GET_ISU(irq - open_pic_irq_offset).Vector_Priority,
- OPENPIC_MASK));
-}
-
-static void openpic_disable_irq(u_int irq)
-{
- u32 vp;
- unsigned int loops = 100000;
-
- check_arg_irq(irq);
-
- openpic_setfield(&GET_ISU(irq - open_pic_irq_offset).Vector_Priority, OPENPIC_MASK);
- /* make sure mask gets to controller before we return to user */
- do {
- if (!loops--) {
- printk(KERN_ERR "openpic_disable_irq timeout\n");
- break;
- }
-
- mb(); /* sync is probably useless here */
- vp = openpic_readfield(&GET_ISU(irq - open_pic_irq_offset).Vector_Priority,
- OPENPIC_MASK | OPENPIC_ACTIVITY);
- } while((vp & OPENPIC_ACTIVITY) && !(vp & OPENPIC_MASK));
-}
-
-#ifdef CONFIG_SMP
-/*
- * Enable/disable an IPI interrupt source
- *
- * Externally called, irq is an offseted system-wide interrupt number
- */
-void openpic_enable_ipi(u_int irq)
-{
- irq -= openpic_vec_ipi;
- check_arg_ipi(irq);
- openpic_clearfield_IPI(&OpenPIC->Global.IPI_Vector_Priority(irq), OPENPIC_MASK);
-
-}
-void openpic_disable_ipi(u_int irq)
-{
- /* NEVER disable an IPI... that's just plain wrong! */
-}
-
-#endif
-
-/*
- * Initialize an interrupt source (and disable it!)
- *
- * irq: OpenPIC interrupt number
- * pri: interrupt source priority
- * vec: the vector it will produce
- * pol: polarity (1 for positive, 0 for negative)
- * sense: 1 for level, 0 for edge
- */
-static void openpic_initirq(u_int irq, u_int pri, u_int vec, int pol, int sense)
-{
- openpic_safe_writefield(&GET_ISU(irq).Vector_Priority,
- OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK |
- OPENPIC_SENSE_MASK | OPENPIC_POLARITY_MASK,
- (pri << OPENPIC_PRIORITY_SHIFT) | vec |
- (pol ? OPENPIC_POLARITY_POSITIVE :
- OPENPIC_POLARITY_NEGATIVE) |
- (sense ? OPENPIC_SENSE_LEVEL : OPENPIC_SENSE_EDGE));
-}
-
-/*
- * Map an interrupt source to one or more CPUs
- */
-static void openpic_mapirq(u_int irq, u_int physmask)
-{
- openpic_write(&GET_ISU(irq).Destination, physmask);
-}
-
-/*
- * Set the sense for an interrupt source (and disable it!)
- *
- * sense: 1 for level, 0 for edge
- */
-#if 0 /* not used */
-static void openpic_set_sense(u_int irq, int sense)
-{
- openpic_safe_writefield(&GET_ISU(irq).Vector_Priority,
- OPENPIC_SENSE_LEVEL,
- (sense ? OPENPIC_SENSE_LEVEL : 0));
-}
-
-static int openpic_get_sense(u_int irq)
-{
- return openpic_readfield(&GET_ISU(irq).Vector_Priority,
- OPENPIC_SENSE_LEVEL) != 0;
-}
-#endif
-
-static void openpic_end_irq(unsigned int irq_nr)
-{
- openpic_eoi();
-}
-
-static void openpic_set_affinity(unsigned int irq_nr, cpumask_t cpumask)
-{
- cpumask_t tmp;
-
- cpus_and(tmp, cpumask, cpu_online_map);
- openpic_mapirq(irq_nr - open_pic_irq_offset, physmask(cpus_addr(tmp)[0]));
-}
-
-#ifdef CONFIG_SMP
-static void openpic_end_ipi(unsigned int irq_nr)
-{
- /*
- * IPIs are marked IRQ_PER_CPU. This has the side effect of
- * preventing the IRQ_PENDING/IRQ_INPROGRESS logic from
- * applying to them. We EOI them late to avoid re-entering.
- * We mark IPI's with SA_INTERRUPT as they must run with
- * irqs disabled.
- */
- openpic_eoi();
-}
-
-static irqreturn_t openpic_ipi_action(int cpl, void *dev_id,
- struct pt_regs *regs)
-{
- smp_message_recv(cpl-openpic_vec_ipi, regs);
- return IRQ_HANDLED;
-}
-
-#endif /* CONFIG_SMP */
-
-int openpic_get_irq(struct pt_regs *regs)
-{
- extern int i8259_irq(int cpu);
-
- int irq = openpic_irq();
-
- if (open_pic_irq_offset && irq == open_pic_irq_offset) {
- /*
- * This magic address generates a PCI IACK cycle.
- */
- if ( chrp_int_ack_special )
- irq = *chrp_int_ack_special;
- else
- irq = i8259_irq( smp_processor_id() );
- openpic_eoi();
- }
- if (irq == openpic_vec_spurious)
- irq = -1;
- return irq;
-}
+++ /dev/null
-/*
- * arch/ppc/kernel/open_pic.h -- OpenPIC Interrupt Handling
- *
- * Copyright (C) 1997 Geert Uytterhoeven
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- *
- */
-
-#ifndef _PPC64_KERNEL_OPEN_PIC_H
-#define _PPC64_KERNEL_OPEN_PIC_H
-
-#include <linux/config.h>
-#include <linux/cpumask.h>
-#include <linux/irq.h>
-
-#define OPENPIC_SIZE 0x40000
-
-/* OpenPIC IRQ controller structure */
-extern struct hw_interrupt_type open_pic;
-
-/* OpenPIC IPI controller structure */
-#ifdef CONFIG_SMP
-extern struct hw_interrupt_type open_pic_ipi;
-#endif /* CONFIG_SMP */
-
-extern u_int OpenPIC_NumInitSenses;
-extern u_char *OpenPIC_InitSenses;
-extern void* OpenPIC_Addr;
-
-/* Exported functions */
-extern void openpic_init(int, int, unsigned char *, int);
-extern void openpic_request_IPIs(void);
-extern void do_openpic_setup_cpu(void);
-extern int openpic_get_irq(struct pt_regs *regs);
-extern void openpic_init_processor(u_int cpumask);
-extern void openpic_setup_ISU(int isu_num, unsigned long addr);
-extern void openpic_cause_IPI(u_int ipi, u_int cpumask);
-
-#endif /* _PPC64_KERNEL_OPEN_PIC_H */
+++ /dev/null
-/*
- * linux/openpic.h -- OpenPIC definitions
- *
- * Copyright (C) 1997 Geert Uytterhoeven
- *
- * This file is based on the following documentation:
- *
- * The Open Programmable Interrupt Controller (PIC)
- * Register Interface Specification Revision 1.2
- *
- * Issue Date: October 1995
- *
- * Issued jointly by Advanced Micro Devices and Cyrix Corporation
- *
- * AMD is a registered trademark of Advanced Micro Devices, Inc.
- * Copyright (C) 1995, Advanced Micro Devices, Inc. and Cyrix, Inc.
- * All Rights Reserved.
- *
- * To receive a copy of this documentation, send an email to openpic@amd.com.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#ifndef _LINUX_OPENPIC_H
-#define _LINUX_OPENPIC_H
-
-#ifdef __KERNEL__
-
-#include <linux/config.h>
-
-/*
- * OpenPIC supports up to 2048 interrupt sources and up to 32 processors
- */
-
-#define OPENPIC_MAX_SOURCES 2048
-#define OPENPIC_MAX_PROCESSORS 32
-#define OPENPIC_MAX_ISU 32
-
-#define OPENPIC_NUM_TIMERS 4
-#define OPENPIC_NUM_IPI 4
-#define OPENPIC_NUM_PRI 16
-#define OPENPIC_NUM_VECTORS OPENPIC_MAX_SOURCES
-
-/*
- * OpenPIC Registers are 32 bits and aligned on 128 bit boundaries
- */
-
-typedef struct _OpenPIC_Reg {
- u_int Reg; /* Little endian! */
- char Pad[0xc];
-} OpenPIC_Reg;
-
-
-/*
- * Per Processor Registers
- */
-
-typedef struct _OpenPIC_Processor {
- /*
- * Private Shadow Registers (for SLiC backwards compatibility)
- */
- u_int IPI0_Dispatch_Shadow; /* Write Only */
- char Pad1[0x4];
- u_int IPI0_Vector_Priority_Shadow; /* Read/Write */
- char Pad2[0x34];
- /*
- * Interprocessor Interrupt Command Ports
- */
- OpenPIC_Reg _IPI_Dispatch[OPENPIC_NUM_IPI]; /* Write Only */
- /*
- * Current Task Priority Register
- */
- OpenPIC_Reg _Current_Task_Priority; /* Read/Write */
- char Pad3[0x10];
- /*
- * Interrupt Acknowledge Register
- */
- OpenPIC_Reg _Interrupt_Acknowledge; /* Read Only */
- /*
- * End of Interrupt (EOI) Register
- */
- OpenPIC_Reg _EOI; /* Read/Write */
- char Pad5[0xf40];
-} OpenPIC_Processor;
-
-
- /*
- * Timer Registers
- */
-
-typedef struct _OpenPIC_Timer {
- OpenPIC_Reg _Current_Count; /* Read Only */
- OpenPIC_Reg _Base_Count; /* Read/Write */
- OpenPIC_Reg _Vector_Priority; /* Read/Write */
- OpenPIC_Reg _Destination; /* Read/Write */
-} OpenPIC_Timer;
-
-
- /*
- * Global Registers
- */
-
-typedef struct _OpenPIC_Global {
- /*
- * Feature Reporting Registers
- */
- OpenPIC_Reg _Feature_Reporting0; /* Read Only */
- OpenPIC_Reg _Feature_Reporting1; /* Future Expansion */
- /*
- * Global Configuration Registers
- */
- OpenPIC_Reg _Global_Configuration0; /* Read/Write */
- OpenPIC_Reg _Global_Configuration1; /* Future Expansion */
- /*
- * Vendor Specific Registers
- */
- OpenPIC_Reg _Vendor_Specific[4];
- /*
- * Vendor Identification Register
- */
- OpenPIC_Reg _Vendor_Identification; /* Read Only */
- /*
- * Processor Initialization Register
- */
- OpenPIC_Reg _Processor_Initialization; /* Read/Write */
- /*
- * IPI Vector/Priority Registers
- */
- OpenPIC_Reg _IPI_Vector_Priority[OPENPIC_NUM_IPI]; /* Read/Write */
- /*
- * Spurious Vector Register
- */
- OpenPIC_Reg _Spurious_Vector; /* Read/Write */
- /*
- * Global Timer Registers
- */
- OpenPIC_Reg _Timer_Frequency; /* Read/Write */
- OpenPIC_Timer Timer[OPENPIC_NUM_TIMERS];
- char Pad1[0xee00];
-} OpenPIC_Global;
-
-
- /*
- * Interrupt Source Registers
- */
-
-typedef struct _OpenPIC_Source {
- OpenPIC_Reg _Vector_Priority; /* Read/Write */
- OpenPIC_Reg _Destination; /* Read/Write */
-} OpenPIC_Source, *OpenPIC_SourcePtr;
-
-
- /*
- * OpenPIC Register Map
- */
-
-struct OpenPIC {
- char Pad1[0x1000];
- /*
- * Global Registers
- */
- OpenPIC_Global Global;
- /*
- * Interrupt Source Configuration Registers
- */
- OpenPIC_Source Source[OPENPIC_MAX_SOURCES];
- /*
- * Per Processor Registers
- */
- OpenPIC_Processor Processor[OPENPIC_MAX_PROCESSORS];
-};
-
-
-/*
- * Current Task Priority Register
- */
-
-#define OPENPIC_CURRENT_TASK_PRIORITY_MASK 0x0000000f
-
-/*
- * Who Am I Register
- */
-
-#define OPENPIC_WHO_AM_I_ID_MASK 0x0000001f
-
-/*
- * Feature Reporting Register 0
- */
-
-#define OPENPIC_FEATURE_LAST_SOURCE_MASK 0x07ff0000
-#define OPENPIC_FEATURE_LAST_SOURCE_SHIFT 16
-#define OPENPIC_FEATURE_LAST_PROCESSOR_MASK 0x00001f00
-#define OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT 8
-#define OPENPIC_FEATURE_VERSION_MASK 0x000000ff
-
-/*
- * Global Configuration Register 0
- */
-
-#define OPENPIC_CONFIG_RESET 0x80000000
-#define OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE 0x20000000
-#define OPENPIC_CONFIG_BASE_MASK 0x000fffff
-
-/*
- * Vendor Identification Register
- */
-
-#define OPENPIC_VENDOR_ID_STEPPING_MASK 0x00ff0000
-#define OPENPIC_VENDOR_ID_STEPPING_SHIFT 16
-#define OPENPIC_VENDOR_ID_DEVICE_ID_MASK 0x0000ff00
-#define OPENPIC_VENDOR_ID_DEVICE_ID_SHIFT 8
-#define OPENPIC_VENDOR_ID_VENDOR_ID_MASK 0x000000ff
-
-/*
- * Vector/Priority Registers
- */
-
-#define OPENPIC_MASK 0x80000000
-#define OPENPIC_ACTIVITY 0x40000000 /* Read Only */
-#define OPENPIC_PRIORITY_MASK 0x000f0000
-#define OPENPIC_PRIORITY_SHIFT 16
-#define OPENPIC_VECTOR_MASK 0x000007ff
-
-
-/*
- * Interrupt Source Registers
- */
-
-#define OPENPIC_POLARITY_POSITIVE 0x00800000
-#define OPENPIC_POLARITY_NEGATIVE 0x00000000
-#define OPENPIC_POLARITY_MASK 0x00800000
-#define OPENPIC_SENSE_LEVEL 0x00400000
-#define OPENPIC_SENSE_EDGE 0x00000000
-#define OPENPIC_SENSE_MASK 0x00400000
-
-
-/*
- * Timer Registers
- */
-
-#define OPENPIC_COUNT_MASK 0x7fffffff
-#define OPENPIC_TIMER_TOGGLE 0x80000000
-#define OPENPIC_TIMER_COUNT_INHIBIT 0x80000000
-
-
-/*
- * Aliases to make life simpler
- */
-
-/* Per Processor Registers */
-#define IPI_Dispatch(i) _IPI_Dispatch[i].Reg
-#define Current_Task_Priority _Current_Task_Priority.Reg
-#define Interrupt_Acknowledge _Interrupt_Acknowledge.Reg
-#define EOI _EOI.Reg
-
-/* Global Registers */
-#define Feature_Reporting0 _Feature_Reporting0.Reg
-#define Feature_Reporting1 _Feature_Reporting1.Reg
-#define Global_Configuration0 _Global_Configuration0.Reg
-#define Global_Configuration1 _Global_Configuration1.Reg
-#define Vendor_Specific(i) _Vendor_Specific[i].Reg
-#define Vendor_Identification _Vendor_Identification.Reg
-#define Processor_Initialization _Processor_Initialization.Reg
-#define IPI_Vector_Priority(i) _IPI_Vector_Priority[i].Reg
-#define Spurious_Vector _Spurious_Vector.Reg
-#define Timer_Frequency _Timer_Frequency.Reg
-
-/* Timer Registers */
-#define Current_Count _Current_Count.Reg
-#define Base_Count _Base_Count.Reg
-#define Vector_Priority _Vector_Priority.Reg
-#define Destination _Destination.Reg
-
-/* Interrupt Source Registers */
-#define Vector_Priority _Vector_Priority.Reg
-#define Destination _Destination.Reg
-
-
-#endif /* __KERNEL__ */
-
-#endif /* _LINUX_OPENPIC_H */
+++ /dev/null
-/*
- * arch/ppc/kernel/open_pic.c -- OpenPIC Interrupt Handling
- *
- * Copyright (C) 1997 Geert Uytterhoeven
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/smp.h>
-#include <linux/interrupt.h>
-#include <asm/ptrace.h>
-#include <asm/signal.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/irq.h>
-#include <asm/prom.h>
-
-#include <asm/machdep.h>
-
-#include "open_pic.h"
-#include "open_pic_defs.h"
-
-void* OpenPIC2_Addr;
-static volatile struct OpenPIC *OpenPIC2 = NULL;
-
-extern u_int OpenPIC_NumInitSenses;
-extern u_char *OpenPIC_InitSenses;
-
-static u_int NumSources;
-static int NumISUs;
-static int open_pic2_irq_offset;
-
-static OpenPIC_SourcePtr ISU2[OPENPIC_MAX_ISU];
-
-unsigned int openpic2_vec_spurious;
-
-/*
- * Accesses to the current processor's openpic registers
- * U3 secondary openpic has only one output
- */
-#define THIS_CPU Processor[0]
-#define DECL_THIS_CPU
-#define CHECK_THIS_CPU
-
-#define GET_ISU(source) ISU2[(source) >> 4][(source) & 0xf]
-
-static inline u_int openpic2_read(volatile u_int *addr)
-{
- u_int val;
-
- val = in_be32(addr);
- return val;
-}
-
-static inline void openpic2_write(volatile u_int *addr, u_int val)
-{
- out_be32(addr, val);
-}
-
-static inline u_int openpic2_readfield(volatile u_int *addr, u_int mask)
-{
- u_int val = openpic2_read(addr);
- return val & mask;
-}
-
-static inline void openpic2_writefield(volatile u_int *addr, u_int mask,
- u_int field)
-{
- u_int val = openpic2_read(addr);
- openpic2_write(addr, (val & ~mask) | (field & mask));
-}
-
-static inline void openpic2_clearfield(volatile u_int *addr, u_int mask)
-{
- openpic2_writefield(addr, mask, 0);
-}
-
-static inline void openpic2_setfield(volatile u_int *addr, u_int mask)
-{
- openpic2_writefield(addr, mask, mask);
-}
-
-static void openpic2_safe_writefield(volatile u_int *addr, u_int mask,
- u_int field)
-{
- unsigned int loops = 100000;
-
- openpic2_setfield(addr, OPENPIC_MASK);
- while (openpic2_read(addr) & OPENPIC_ACTIVITY) {
- if (!loops--) {
- printk(KERN_ERR "openpic2_safe_writefield timeout\n");
- break;
- }
- }
- openpic2_writefield(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK);
-}
-
-
-static inline void openpic2_reset(void)
-{
- openpic2_setfield(&OpenPIC2->Global.Global_Configuration0,
- OPENPIC_CONFIG_RESET);
-}
-
-static void openpic2_disable_8259_pass_through(void)
-{
- openpic2_setfield(&OpenPIC2->Global.Global_Configuration0,
- OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
-}
-
-/*
- * Find out the current interrupt
- */
-static u_int openpic2_irq(void)
-{
- u_int vec;
- DECL_THIS_CPU;
- CHECK_THIS_CPU;
- vec = openpic2_readfield(&OpenPIC2->THIS_CPU.Interrupt_Acknowledge,
- OPENPIC_VECTOR_MASK);
- return vec;
-}
-
-static void openpic2_eoi(void)
-{
- DECL_THIS_CPU;
- CHECK_THIS_CPU;
- openpic2_write(&OpenPIC2->THIS_CPU.EOI, 0);
- /* Handle PCI write posting */
- (void)openpic2_read(&OpenPIC2->THIS_CPU.EOI);
-}
-
-
-static inline u_int openpic2_get_priority(void)
-{
- DECL_THIS_CPU;
- CHECK_THIS_CPU;
- return openpic2_readfield(&OpenPIC2->THIS_CPU.Current_Task_Priority,
- OPENPIC_CURRENT_TASK_PRIORITY_MASK);
-}
-
-static void openpic2_set_priority(u_int pri)
-{
- DECL_THIS_CPU;
- CHECK_THIS_CPU;
- openpic2_writefield(&OpenPIC2->THIS_CPU.Current_Task_Priority,
- OPENPIC_CURRENT_TASK_PRIORITY_MASK, pri);
-}
-
-/*
- * Get/set the spurious vector
- */
-static inline u_int openpic2_get_spurious(void)
-{
- return openpic2_readfield(&OpenPIC2->Global.Spurious_Vector,
- OPENPIC_VECTOR_MASK);
-}
-
-static void openpic2_set_spurious(u_int vec)
-{
- openpic2_writefield(&OpenPIC2->Global.Spurious_Vector, OPENPIC_VECTOR_MASK,
- vec);
-}
-
-/*
- * Enable/disable an external interrupt source
- *
- * Externally called, irq is an offseted system-wide interrupt number
- */
-static void openpic2_enable_irq(u_int irq)
-{
- unsigned int loops = 100000;
-
- openpic2_clearfield(&GET_ISU(irq - open_pic2_irq_offset).Vector_Priority, OPENPIC_MASK);
- /* make sure mask gets to controller before we return to user */
- do {
- if (!loops--) {
- printk(KERN_ERR "openpic_enable_irq timeout\n");
- break;
- }
-
- mb(); /* sync is probably useless here */
- } while(openpic2_readfield(&GET_ISU(irq - open_pic2_irq_offset).Vector_Priority,
- OPENPIC_MASK));
-}
-
-static void openpic2_disable_irq(u_int irq)
-{
- u32 vp;
- unsigned int loops = 100000;
-
- openpic2_setfield(&GET_ISU(irq - open_pic2_irq_offset).Vector_Priority,
- OPENPIC_MASK);
- /* make sure mask gets to controller before we return to user */
- do {
- if (!loops--) {
- printk(KERN_ERR "openpic_disable_irq timeout\n");
- break;
- }
-
- mb(); /* sync is probably useless here */
- vp = openpic2_readfield(&GET_ISU(irq - open_pic2_irq_offset).Vector_Priority,
- OPENPIC_MASK | OPENPIC_ACTIVITY);
- } while((vp & OPENPIC_ACTIVITY) && !(vp & OPENPIC_MASK));
-}
-
-/*
- * Initialize an interrupt source (and disable it!)
- *
- * irq: OpenPIC interrupt number
- * pri: interrupt source priority
- * vec: the vector it will produce
- * pol: polarity (1 for positive, 0 for negative)
- * sense: 1 for level, 0 for edge
- */
-static void openpic2_initirq(u_int irq, u_int pri, u_int vec, int pol, int sense)
-{
- openpic2_safe_writefield(&GET_ISU(irq).Vector_Priority,
- OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK |
- OPENPIC_SENSE_MASK | OPENPIC_POLARITY_MASK,
- (pri << OPENPIC_PRIORITY_SHIFT) | vec |
- (pol ? OPENPIC_POLARITY_POSITIVE :
- OPENPIC_POLARITY_NEGATIVE) |
- (sense ? OPENPIC_SENSE_LEVEL : OPENPIC_SENSE_EDGE));
-}
-
-/*
- * Map an interrupt source to one or more CPUs
- */
-static void openpic2_mapirq(u_int irq, u_int physmask)
-{
- openpic2_write(&GET_ISU(irq).Destination, physmask);
-}
-
-/*
- * Set the sense for an interrupt source (and disable it!)
- *
- * sense: 1 for level, 0 for edge
- */
-static inline void openpic2_set_sense(u_int irq, int sense)
-{
- openpic2_safe_writefield(&GET_ISU(irq).Vector_Priority,
- OPENPIC_SENSE_LEVEL,
- (sense ? OPENPIC_SENSE_LEVEL : 0));
-}
-
-static void openpic2_end_irq(unsigned int irq_nr)
-{
- openpic2_eoi();
-}
-
-int openpic2_get_irq(struct pt_regs *regs)
-{
- int irq = openpic2_irq();
-
- if (irq == openpic2_vec_spurious)
- return -1;
- return irq + open_pic2_irq_offset;
-}
-
-struct hw_interrupt_type open_pic2 = {
- " OpenPIC2 ",
- NULL,
- NULL,
- openpic2_enable_irq,
- openpic2_disable_irq,
- NULL,
- openpic2_end_irq,
-};
-
-void __init openpic2_init(int offset)
-{
- u_int t, i;
- const char *version;
-
- if (!OpenPIC2_Addr) {
- printk(KERN_INFO "No OpenPIC2 found !\n");
- return;
- }
- OpenPIC2 = (volatile struct OpenPIC *)OpenPIC2_Addr;
-
- ppc64_boot_msg(0x20, "OpenPic U3 Init");
-
- t = openpic2_read(&OpenPIC2->Global.Feature_Reporting0);
- switch (t & OPENPIC_FEATURE_VERSION_MASK) {
- case 1:
- version = "1.0";
- break;
- case 2:
- version = "1.2";
- break;
- case 3:
- version = "1.3";
- break;
- default:
- version = "?";
- break;
- }
- printk(KERN_INFO "OpenPIC (U3) Version %s\n", version);
-
- open_pic2_irq_offset = offset;
-
- for (i=0; i<128; i+=0x10) {
- ISU2[i>>4] = &((struct OpenPIC *)OpenPIC2_Addr)->Source[i];
- NumISUs++;
- }
- NumSources = NumISUs * 0x10;
- openpic2_vec_spurious = NumSources;
-
- openpic2_set_priority(0xf);
-
- /* Init all external sources */
- for (i = 0; i < NumSources; i++) {
- int pri, sense;
-
- /* the bootloader may have left it enabled (bad !) */
- openpic2_disable_irq(i+offset);
-
- pri = 8;
- sense = (i < OpenPIC_NumInitSenses) ? OpenPIC_InitSenses[i]: 1;
- if (sense)
- irq_desc[i+offset].status = IRQ_LEVEL;
-
- /* Enabled, Priority 8 or 9 */
- openpic2_initirq(i, pri, i, !sense, sense);
- /* Processor 0 */
- openpic2_mapirq(i, 0x1);
- }
-
- /* Init descriptors */
- for (i = offset; i < NumSources + offset; i++)
- irq_desc[i].handler = &open_pic2;
-
- /* Initialize the spurious interrupt */
- openpic2_set_spurious(openpic2_vec_spurious);
-
- openpic2_set_priority(0);
- openpic2_disable_8259_pass_through();
-
- ppc64_boot_msg(0x25, "OpenPic U3 Done");
-}
+++ /dev/null
-/*
- * pSeries hashtable management.
- *
- * SMP scalability work:
- * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <linux/spinlock.h>
-#include <linux/bitops.h>
-#include <linux/threads.h>
-#include <linux/smp.h>
-
-#include <asm/abs_addr.h>
-#include <asm/machdep.h>
-#include <asm/mmu.h>
-#include <asm/mmu_context.h>
-#include <asm/pgtable.h>
-#include <asm/tlbflush.h>
-#include <asm/tlb.h>
-#include <asm/cputable.h>
-
-#define HPTE_LOCK_BIT 3
-
-static inline void pSeries_lock_hpte(HPTE *hptep)
-{
- unsigned long *word = &hptep->dw0.dword0;
-
- while (1) {
- if (!test_and_set_bit(HPTE_LOCK_BIT, word))
- break;
- while(test_bit(HPTE_LOCK_BIT, word))
- cpu_relax();
- }
-}
-
-static inline void pSeries_unlock_hpte(HPTE *hptep)
-{
- unsigned long *word = &hptep->dw0.dword0;
-
- asm volatile("lwsync":::"memory");
- clear_bit(HPTE_LOCK_BIT, word);
-}
-
-static spinlock_t pSeries_tlbie_lock = SPIN_LOCK_UNLOCKED;
-
-long pSeries_hpte_insert(unsigned long hpte_group, unsigned long va,
- unsigned long prpn, int secondary,
- unsigned long hpteflags, int bolted, int large)
-{
- unsigned long arpn = physRpn_to_absRpn(prpn);
- HPTE *hptep = htab_data.htab + hpte_group;
- Hpte_dword0 dw0;
- HPTE lhpte;
- int i;
-
- for (i = 0; i < HPTES_PER_GROUP; i++) {
- dw0 = hptep->dw0.dw0;
-
- if (!dw0.v) {
- /* retry with lock held */
- pSeries_lock_hpte(hptep);
- dw0 = hptep->dw0.dw0;
- if (!dw0.v)
- break;
- pSeries_unlock_hpte(hptep);
- }
-
- hptep++;
- }
-
- if (i == HPTES_PER_GROUP)
- return -1;
-
- lhpte.dw1.dword1 = 0;
- lhpte.dw1.dw1.rpn = arpn;
- lhpte.dw1.flags.flags = hpteflags;
-
- lhpte.dw0.dword0 = 0;
- lhpte.dw0.dw0.avpn = va >> 23;
- lhpte.dw0.dw0.h = secondary;
- lhpte.dw0.dw0.bolted = bolted;
- lhpte.dw0.dw0.v = 1;
-
- if (large) {
- lhpte.dw0.dw0.l = 1;
- lhpte.dw0.dw0.avpn &= ~0x1UL;
- }
-
- hptep->dw1.dword1 = lhpte.dw1.dword1;
-
- /* Guarantee the second dword is visible before the valid bit */
- __asm__ __volatile__ ("eieio" : : : "memory");
-
- /*
- * Now set the first dword including the valid bit
- * NOTE: this also unlocks the hpte
- */
- hptep->dw0.dword0 = lhpte.dw0.dword0;
-
- __asm__ __volatile__ ("ptesync" : : : "memory");
-
- return i | (secondary << 3);
-}
-
-static long pSeries_hpte_remove(unsigned long hpte_group)
-{
- HPTE *hptep;
- Hpte_dword0 dw0;
- int i;
- int slot_offset;
-
- /* pick a random entry to start at */
- slot_offset = mftb() & 0x7;
-
- for (i = 0; i < HPTES_PER_GROUP; i++) {
- hptep = htab_data.htab + hpte_group + slot_offset;
- dw0 = hptep->dw0.dw0;
-
- if (dw0.v && !dw0.bolted) {
- /* retry with lock held */
- pSeries_lock_hpte(hptep);
- dw0 = hptep->dw0.dw0;
- if (dw0.v && !dw0.bolted)
- break;
- pSeries_unlock_hpte(hptep);
- }
-
- slot_offset++;
- slot_offset &= 0x7;
- }
-
- if (i == HPTES_PER_GROUP)
- return -1;
-
- /* Invalidate the hpte. NOTE: this also unlocks it */
- hptep->dw0.dword0 = 0;
-
- return i;
-}
-
-static inline void set_pp_bit(unsigned long pp, HPTE *addr)
-{
- unsigned long old;
- unsigned long *p = &addr->dw1.dword1;
-
- __asm__ __volatile__(
- "1: ldarx %0,0,%3\n\
- rldimi %0,%2,0,61\n\
- stdcx. %0,0,%3\n\
- bne 1b"
- : "=&r" (old), "=m" (*p)
- : "r" (pp), "r" (p), "m" (*p)
- : "cc");
-}
-
-/*
- * Only works on small pages. Yes its ugly to have to check each slot in
- * the group but we only use this during bootup.
- */
-static long pSeries_hpte_find(unsigned long vpn)
-{
- HPTE *hptep;
- unsigned long hash;
- unsigned long i, j;
- long slot;
- Hpte_dword0 dw0;
-
- hash = hpt_hash(vpn, 0);
-
- for (j = 0; j < 2; j++) {
- slot = (hash & htab_data.htab_hash_mask) * HPTES_PER_GROUP;
- for (i = 0; i < HPTES_PER_GROUP; i++) {
- hptep = htab_data.htab + slot;
- dw0 = hptep->dw0.dw0;
-
- if ((dw0.avpn == (vpn >> 11)) && dw0.v &&
- (dw0.h == j)) {
- /* HPTE matches */
- if (j)
- slot = -slot;
- return slot;
- }
- ++slot;
- }
- hash = ~hash;
- }
-
- return -1;
-}
-
-static long pSeries_hpte_updatepp(unsigned long slot, unsigned long newpp,
- unsigned long va, int large, int local)
-{
- HPTE *hptep = htab_data.htab + slot;
- Hpte_dword0 dw0;
- unsigned long avpn = va >> 23;
- int ret = 0;
-
- if (large)
- avpn &= ~0x1UL;
-
- pSeries_lock_hpte(hptep);
-
- dw0 = hptep->dw0.dw0;
-
- /* Even if we miss, we need to invalidate the TLB */
- if ((dw0.avpn != avpn) || !dw0.v) {
- pSeries_unlock_hpte(hptep);
- ret = -1;
- } else {
- set_pp_bit(newpp, hptep);
- pSeries_unlock_hpte(hptep);
- }
-
- /* Ensure it is out of the tlb too */
- if ((cur_cpu_spec->cpu_features & CPU_FTR_TLBIEL) && !large && local) {
- tlbiel(va);
- } else {
- if (!(cur_cpu_spec->cpu_features & CPU_FTR_LOCKLESS_TLBIE))
- spin_lock(&pSeries_tlbie_lock);
- tlbie(va, large);
- if (!(cur_cpu_spec->cpu_features & CPU_FTR_LOCKLESS_TLBIE))
- spin_unlock(&pSeries_tlbie_lock);
- }
-
- return ret;
-}
-
-/*
- * Update the page protection bits. Intended to be used to create
- * guard pages for kernel data structures on pages which are bolted
- * in the HPT. Assumes pages being operated on will not be stolen.
- * Does not work on large pages.
- *
- * No need to lock here because we should be the only user.
- */
-static void pSeries_hpte_updateboltedpp(unsigned long newpp, unsigned long ea)
-{
- unsigned long vsid, va, vpn, flags;
- long slot;
- HPTE *hptep;
-
- vsid = get_kernel_vsid(ea);
- va = (vsid << 28) | (ea & 0x0fffffff);
- vpn = va >> PAGE_SHIFT;
-
- slot = pSeries_hpte_find(vpn);
- if (slot == -1)
- panic("could not find page to bolt\n");
- hptep = htab_data.htab + slot;
-
- set_pp_bit(newpp, hptep);
-
- /* Ensure it is out of the tlb too */
- if (!(cur_cpu_spec->cpu_features & CPU_FTR_LOCKLESS_TLBIE))
- spin_lock_irqsave(&pSeries_tlbie_lock, flags);
- tlbie(va, 0);
- if (!(cur_cpu_spec->cpu_features & CPU_FTR_LOCKLESS_TLBIE))
- spin_unlock_irqrestore(&pSeries_tlbie_lock, flags);
-}
-
-static void pSeries_hpte_invalidate(unsigned long slot, unsigned long va,
- int large, int local)
-{
- HPTE *hptep = htab_data.htab + slot;
- Hpte_dword0 dw0;
- unsigned long avpn = va >> 23;
- unsigned long flags;
-
- if (large)
- avpn &= ~0x1UL;
-
- local_irq_save(flags);
- pSeries_lock_hpte(hptep);
-
- dw0 = hptep->dw0.dw0;
-
- /* Even if we miss, we need to invalidate the TLB */
- if ((dw0.avpn != avpn) || !dw0.v) {
- pSeries_unlock_hpte(hptep);
- } else {
- /* Invalidate the hpte. NOTE: this also unlocks it */
- hptep->dw0.dword0 = 0;
- }
-
- /* Invalidate the tlb */
- if ((cur_cpu_spec->cpu_features & CPU_FTR_TLBIEL) && !large && local) {
- tlbiel(va);
- } else {
- if (!(cur_cpu_spec->cpu_features & CPU_FTR_LOCKLESS_TLBIE))
- spin_lock(&pSeries_tlbie_lock);
- tlbie(va, large);
- if (!(cur_cpu_spec->cpu_features & CPU_FTR_LOCKLESS_TLBIE))
- spin_unlock(&pSeries_tlbie_lock);
- }
- local_irq_restore(flags);
-}
-
-static void pSeries_flush_hash_range(unsigned long context,
- unsigned long number, int local)
-{
- unsigned long vsid, vpn, va, hash, secondary, slot, flags, avpn;
- int i, j;
- HPTE *hptep;
- Hpte_dword0 dw0;
- struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
-
- /* XXX fix for large ptes */
- unsigned long large = 0;
-
- local_irq_save(flags);
-
- j = 0;
- for (i = 0; i < number; i++) {
- if ((batch->addr[i] >= USER_START) &&
- (batch->addr[i] <= USER_END))
- vsid = get_vsid(context, batch->addr[i]);
- else
- vsid = get_kernel_vsid(batch->addr[i]);
-
- va = (vsid << 28) | (batch->addr[i] & 0x0fffffff);
- batch->vaddr[j] = va;
- if (large)
- vpn = va >> LARGE_PAGE_SHIFT;
- else
- vpn = va >> PAGE_SHIFT;
- hash = hpt_hash(vpn, large);
- secondary = (pte_val(batch->pte[i]) & _PAGE_SECONDARY) >> 15;
- if (secondary)
- hash = ~hash;
- slot = (hash & htab_data.htab_hash_mask) * HPTES_PER_GROUP;
- slot += (pte_val(batch->pte[i]) & _PAGE_GROUP_IX) >> 12;
-
- hptep = htab_data.htab + slot;
-
- avpn = va >> 23;
- if (large)
- avpn &= ~0x1UL;
-
- pSeries_lock_hpte(hptep);
-
- dw0 = hptep->dw0.dw0;
-
- /* Even if we miss, we need to invalidate the TLB */
- if ((dw0.avpn != avpn) || !dw0.v) {
- pSeries_unlock_hpte(hptep);
- } else {
- /* Invalidate the hpte. NOTE: this also unlocks it */
- hptep->dw0.dword0 = 0;
- }
-
- j++;
- }
-
- if ((cur_cpu_spec->cpu_features & CPU_FTR_TLBIEL) && !large && local) {
- asm volatile("ptesync":::"memory");
-
- for (i = 0; i < j; i++)
- __tlbiel(batch->vaddr[i]);
-
- asm volatile("ptesync":::"memory");
- } else {
- /* XXX double check that it is safe to take this late */
- if (!(cur_cpu_spec->cpu_features & CPU_FTR_LOCKLESS_TLBIE))
- spin_lock(&pSeries_tlbie_lock);
-
- asm volatile("ptesync":::"memory");
-
- for (i = 0; i < j; i++)
- __tlbie(batch->vaddr[i], 0);
-
- asm volatile("eieio; tlbsync; ptesync":::"memory");
-
- if (!(cur_cpu_spec->cpu_features & CPU_FTR_LOCKLESS_TLBIE))
- spin_unlock(&pSeries_tlbie_lock);
- }
-
- local_irq_restore(flags);
-}
-
-void hpte_init_pSeries(void)
-{
- struct device_node *root;
- const char *model;
-
- ppc_md.hpte_invalidate = pSeries_hpte_invalidate;
- ppc_md.hpte_updatepp = pSeries_hpte_updatepp;
- ppc_md.hpte_updateboltedpp = pSeries_hpte_updateboltedpp;
- ppc_md.hpte_insert = pSeries_hpte_insert;
- ppc_md.hpte_remove = pSeries_hpte_remove;
-
- /* Disable TLB batching on nighthawk */
- root = of_find_node_by_path("/");
- if (root) {
- model = get_property(root, "model", NULL);
- if (!strcmp(model, "CHRP IBM,9076-N81")) {
- of_node_put(root);
- return;
- }
- of_node_put(root);
- }
-
- ppc_md.flush_hash_range = pSeries_flush_hash_range;
-}
+++ /dev/null
-/*
- * Support for DMA from PCI devices to main memory on
- * machines without an iommu or with directly addressable
- * RAM (typically a pmac with 2Gb of RAM or less)
- *
- * Copyright (C) 2003 Benjamin Herrenschmidt (benh@kernel.crashing.org)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <linux/bootmem.h>
-#include <linux/mm.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/sections.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/pci-bridge.h>
-#include <asm/machdep.h>
-#include <asm/pmac_feature.h>
-#include <asm/abs_addr.h>
-
-#include "pci.h"
-
-static void *pci_direct_alloc_consistent(struct pci_dev *hwdev, size_t size,
- dma_addr_t *dma_handle)
-{
- void *ret;
-
- ret = (void *)__get_free_pages(GFP_ATOMIC, get_order(size));
- if (ret != NULL) {
- memset(ret, 0, size);
- *dma_handle = virt_to_abs(ret);
- }
- return ret;
-}
-
-static void pci_direct_free_consistent(struct pci_dev *hwdev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
-{
- free_pages((unsigned long)vaddr, get_order(size));
-}
-
-static dma_addr_t pci_direct_map_single(struct pci_dev *hwdev, void *ptr,
- size_t size, enum dma_data_direction direction)
-{
- return virt_to_abs(ptr);
-}
-
-static void pci_direct_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
- size_t size, enum dma_data_direction direction)
-{
-}
-
-static int pci_direct_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
- int nents, enum dma_data_direction direction)
-{
- int i;
-
- for (i = 0; i < nents; i++, sg++) {
- sg->dma_address = page_to_phys(sg->page) + sg->offset;
- sg->dma_length = sg->length;
- }
-
- return nents;
-}
-
-static void pci_direct_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
- int nents, enum dma_data_direction direction)
-{
-}
-
-void __init pci_dma_init_direct(void)
-{
- pci_dma_ops.pci_alloc_consistent = pci_direct_alloc_consistent;
- pci_dma_ops.pci_free_consistent = pci_direct_free_consistent;
- pci_dma_ops.pci_map_single = pci_direct_map_single;
- pci_dma_ops.pci_unmap_single = pci_direct_unmap_single;
- pci_dma_ops.pci_map_sg = pci_direct_map_sg;
- pci_dma_ops.pci_unmap_sg = pci_direct_unmap_sg;
-}
+++ /dev/null
-/*
- * arch/ppc64/kernel/pmac_iommu.c
- *
- * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
- *
- * Based on pSeries_iommu.c:
- * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
- * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
- *
- * Dynamic DMA mapping support, PowerMac G5 (DART)-specific parts.
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/mm.h>
-#include <linux/spinlock.h>
-#include <linux/string.h>
-#include <linux/pci.h>
-#include <linux/dma-mapping.h>
-#include <linux/vmalloc.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/rtas.h>
-#include <asm/ppcdebug.h>
-#include <asm/iommu.h>
-#include <asm/pci-bridge.h>
-#include <asm/machdep.h>
-#include <asm/abs_addr.h>
-#include <asm/cacheflush.h>
-#include "pci.h"
-
-
-/* physical base of DART registers */
-#define DART_BASE 0xf8033000UL
-
-/* Offset from base to control register */
-#define DARTCNTL 0
-/* Offset from base to exception register */
-#define DARTEXCP 0x10
-/* Offset from base to TLB tag registers */
-#define DARTTAG 0x1000
-
-
-/* Control Register fields */
-
-/* base address of table (pfn) */
-#define DARTCNTL_BASE_MASK 0xfffff
-#define DARTCNTL_BASE_SHIFT 12
-
-#define DARTCNTL_FLUSHTLB 0x400
-#define DARTCNTL_ENABLE 0x200
-
-/* size of table in pages */
-#define DARTCNTL_SIZE_MASK 0x1ff
-#define DARTCNTL_SIZE_SHIFT 0
-
-/* DART table fields */
-#define DARTMAP_VALID 0x80000000
-#define DARTMAP_RPNMASK 0x00ffffff
-
-/* Physical base address and size of the DART table */
-unsigned long dart_tablebase;
-unsigned long dart_tablesize;
-
-/* Virtual base address of the DART table */
-static u32 *dart_vbase;
-
-/* Mapped base address for the dart */
-static unsigned int *dart;
-
-/* Dummy val that entries are set to when unused */
-static unsigned int dart_emptyval;
-
-static struct iommu_table iommu_table_pmac;
-static int dart_dirty;
-
-#define DBG(...)
-
-static inline void dart_tlb_invalidate_all(void)
-{
- unsigned long l = 0;
- unsigned int reg;
- unsigned long limit;
-
- DBG("dart: flush\n");
-
- /* To invalidate the DART, set the DARTCNTL_FLUSHTLB bit in the
- * control register and wait for it to clear.
- *
- * Gotcha: Sometimes, the DART won't detect that the bit gets
- * set. If so, clear it and set it again.
- */
-
- limit = 0;
-
-retry:
- reg = in_be32((unsigned int *)dart+DARTCNTL);
- reg |= DARTCNTL_FLUSHTLB;
- out_be32((unsigned int *)dart+DARTCNTL, reg);
-
- l = 0;
- while ((in_be32((unsigned int *)dart+DARTCNTL) & DARTCNTL_FLUSHTLB) &&
- l < (1L<<limit)) {
- l++;
- }
- if (l == (1L<<limit)) {
- if (limit < 4) {
- limit++;
- reg = in_be32((unsigned int *)dart+DARTCNTL);
- reg &= ~DARTCNTL_FLUSHTLB;
- out_be32((unsigned int *)dart+DARTCNTL, reg);
- goto retry;
- } else
- panic("U3-DART: TLB did not flush after waiting a long "
- "time. Buggy U3 ?");
- }
-}
-
-static void dart_flush(struct iommu_table *tbl)
-{
- if (dart_dirty)
- dart_tlb_invalidate_all();
- dart_dirty = 0;
-}
-
-static void dart_build_pmac(struct iommu_table *tbl, long index,
- long npages, unsigned long uaddr,
- enum dma_data_direction direction)
-{
- unsigned int *dp;
- unsigned int rpn;
-
- DBG("dart: build at: %lx, %lx, addr: %x\n", index, npages, uaddr);
-
- dp = ((unsigned int*)tbl->it_base) + index;
-
- /* On pmac, all memory is contigous, so we can move this
- * out of the loop.
- */
- while (npages--) {
- rpn = virt_to_abs(uaddr) >> PAGE_SHIFT;
-
- *(dp++) = DARTMAP_VALID | (rpn & DARTMAP_RPNMASK);
-
- rpn++;
- uaddr += PAGE_SIZE;
- }
-
- dart_dirty = 1;
-}
-
-
-static void dart_free_pmac(struct iommu_table *tbl, long index, long npages)
-{
- unsigned int *dp;
-
- /* We don't worry about flushing the TLB cache. The only drawback of
- * not doing it is that we won't catch buggy device drivers doing
- * bad DMAs, but then no 32-bit architecture ever does either.
- */
-
- DBG("dart: free at: %lx, %lx\n", index, npages);
-
- dp = ((unsigned int *)tbl->it_base) + index;
-
- while (npages--)
- *(dp++) = dart_emptyval;
-}
-
-
-static int dart_init(struct device_node *dart_node)
-{
- unsigned int regword;
- unsigned int i;
- unsigned long tmp;
- struct page *p;
-
- if (dart_tablebase == 0 || dart_tablesize == 0) {
- printk(KERN_INFO "U3-DART: table not allocated, using direct DMA\n");
- return -ENODEV;
- }
-
- /* Make sure nothing from the DART range remains in the CPU cache
- * from a previous mapping that existed before the kernel took
- * over
- */
- flush_dcache_phys_range(dart_tablebase, dart_tablebase + dart_tablesize);
-
- /* Allocate a spare page to map all invalid DART pages. We need to do
- * that to work around what looks like a problem with the HT bridge
- * prefetching into invalid pages and corrupting data
- */
- tmp = __get_free_pages(GFP_ATOMIC, 1);
- if (tmp == 0)
- panic("U3-DART: Cannot allocate spare page !");
- dart_emptyval = DARTMAP_VALID |
- ((virt_to_abs(tmp) >> PAGE_SHIFT) & DARTMAP_RPNMASK);
-
- /* Map in DART registers. FIXME: Use device node to get base address */
- dart = ioremap(DART_BASE, 0x7000);
- if (dart == NULL)
- panic("U3-DART: Cannot map registers !");
-
- /* Set initial control register contents: table base,
- * table size and enable bit
- */
- regword = DARTCNTL_ENABLE |
- ((dart_tablebase >> PAGE_SHIFT) << DARTCNTL_BASE_SHIFT) |
- (((dart_tablesize >> PAGE_SHIFT) & DARTCNTL_SIZE_MASK)
- << DARTCNTL_SIZE_SHIFT);
- p = virt_to_page(dart_tablebase);
- dart_vbase = ioremap(virt_to_abs(dart_tablebase), dart_tablesize);
-
- /* Fill initial table */
- for (i = 0; i < dart_tablesize/4; i++)
- dart_vbase[i] = dart_emptyval;
-
- /* Initialize DART with table base and enable it. */
- out_be32((unsigned int *)dart, regword);
-
- /* Invalidate DART to get rid of possible stale TLBs */
- dart_tlb_invalidate_all();
-
- iommu_table_pmac.it_busno = 0;
-
- /* Units of tce entries */
- iommu_table_pmac.it_offset = 0;
-
- /* Set the tce table size - measured in pages */
- iommu_table_pmac.it_size = dart_tablesize >> PAGE_SHIFT;
-
- /* Initialize the common IOMMU code */
- iommu_table_pmac.it_base = (unsigned long)dart_vbase;
- iommu_table_pmac.it_index = 0;
- iommu_table_pmac.it_blocksize = 1;
- iommu_table_pmac.it_entrysize = sizeof(u32);
- iommu_init_table(&iommu_table_pmac);
-
- /* Reserve the last page of the DART to avoid possible prefetch
- * past the DART mapped area
- */
- set_bit(iommu_table_pmac.it_mapsize - 1, iommu_table_pmac.it_map);
-
- printk(KERN_INFO "U3-DART IOMMU initialized\n");
-
- return 0;
-}
-
-
-void iommu_setup_pmac(void)
-{
- struct pci_dev *dev = NULL;
- struct device_node *dn;
-
- /* Find the DART in the device-tree */
- dn = of_find_compatible_node(NULL, "dart", "u3-dart");
- if (dn == NULL)
- return;
-
- /* Setup low level TCE operations for the core IOMMU code */
- ppc_md.tce_build = dart_build_pmac;
- ppc_md.tce_free = dart_free_pmac;
- ppc_md.tce_flush = dart_flush;
-
- /* Initialize the DART HW */
- if (dart_init(dn))
- return;
-
- /* Setup pci_dma ops */
- pci_iommu_init();
-
- /* We only have one iommu table on the mac for now, which makes
- * things simple. Setup all PCI devices to point to this table
- */
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- /* We must use pci_device_to_OF_node() to make sure that
- * we get the real "final" pointer to the device in the
- * pci_dev sysdata and not the temporary PHB one
- */
- struct device_node *dn = pci_device_to_OF_node(dev);
- if (dn)
- dn->iommu_table = &iommu_table_pmac;
- }
-}
-
-
-
-
+++ /dev/null
-/*
- * PowerPC64 Segment Translation Support.
- *
- * Dave Engebretsen and Mike Corrigan {engebret|mikejc}@us.ibm.com
- * Copyright (c) 2001 Dave Engebretsen
- *
- * Copyright (C) 2002 Anton Blanchard <anton@au.ibm.com>, IBM
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/config.h>
-#include <asm/pgtable.h>
-#include <asm/mmu.h>
-#include <asm/mmu_context.h>
-#include <asm/paca.h>
-#include <asm/naca.h>
-#include <asm/cputable.h>
-
-static int make_ste(unsigned long stab, unsigned long esid,
- unsigned long vsid);
-
-void slb_initialize(void);
-
-/*
- * Build an entry for the base kernel segment and put it into
- * the segment table or SLB. All other segment table or SLB
- * entries are faulted in.
- */
-void stab_initialize(unsigned long stab)
-{
- unsigned long vsid = get_kernel_vsid(KERNELBASE);
-
- if (cur_cpu_spec->cpu_features & CPU_FTR_SLB) {
- slb_initialize();
- } else {
- asm volatile("isync; slbia; isync":::"memory");
- make_ste(stab, GET_ESID(KERNELBASE), vsid);
-
- /* Order update */
- asm volatile("sync":::"memory");
- }
-}
-
-/* Both the segment table and SLB code uses the following cache */
-#define NR_STAB_CACHE_ENTRIES 8
-DEFINE_PER_CPU(long, stab_cache_ptr);
-DEFINE_PER_CPU(long, stab_cache[NR_STAB_CACHE_ENTRIES]);
-
-/*
- * Segment table stuff
- */
-
-/*
- * Create a segment table entry for the given esid/vsid pair.
- */
-static int make_ste(unsigned long stab, unsigned long esid, unsigned long vsid)
-{
- unsigned long entry, group, old_esid, castout_entry, i;
- unsigned int global_entry;
- STE *ste, *castout_ste;
- unsigned long kernel_segment = (REGION_ID(esid << SID_SHIFT) !=
- USER_REGION_ID);
-
- /* Search the primary group first. */
- global_entry = (esid & 0x1f) << 3;
- ste = (STE *)(stab | ((esid & 0x1f) << 7));
-
- /* Find an empty entry, if one exists. */
- for (group = 0; group < 2; group++) {
- for (entry = 0; entry < 8; entry++, ste++) {
- if (!(ste->dw0.dw0.v)) {
- ste->dw0.dword0 = 0;
- ste->dw1.dword1 = 0;
- ste->dw1.dw1.vsid = vsid;
- ste->dw0.dw0.esid = esid;
- ste->dw0.dw0.kp = 1;
- if (!kernel_segment)
- ste->dw0.dw0.ks = 1;
- asm volatile("eieio":::"memory");
- ste->dw0.dw0.v = 1;
- return (global_entry | entry);
- }
- }
- /* Now search the secondary group. */
- global_entry = ((~esid) & 0x1f) << 3;
- ste = (STE *)(stab | (((~esid) & 0x1f) << 7));
- }
-
- /*
- * Could not find empty entry, pick one with a round robin selection.
- * Search all entries in the two groups.
- */
- castout_entry = get_paca()->stab_rr;
- for (i = 0; i < 16; i++) {
- if (castout_entry < 8) {
- global_entry = (esid & 0x1f) << 3;
- ste = (STE *)(stab | ((esid & 0x1f) << 7));
- castout_ste = ste + castout_entry;
- } else {
- global_entry = ((~esid) & 0x1f) << 3;
- ste = (STE *)(stab | (((~esid) & 0x1f) << 7));
- castout_ste = ste + (castout_entry - 8);
- }
-
- /* Dont cast out the first kernel segment */
- if (castout_ste->dw0.dw0.esid != GET_ESID(KERNELBASE))
- break;
-
- castout_entry = (castout_entry + 1) & 0xf;
- }
-
- get_paca()->stab_rr = (castout_entry + 1) & 0xf;
-
- /* Modify the old entry to the new value. */
-
- /* Force previous translations to complete. DRENG */
- asm volatile("isync" : : : "memory");
-
- castout_ste->dw0.dw0.v = 0;
- asm volatile("sync" : : : "memory"); /* Order update */
-
- castout_ste->dw0.dword0 = 0;
- castout_ste->dw1.dword1 = 0;
- castout_ste->dw1.dw1.vsid = vsid;
- old_esid = castout_ste->dw0.dw0.esid;
- castout_ste->dw0.dw0.esid = esid;
- castout_ste->dw0.dw0.kp = 1;
- if (!kernel_segment)
- castout_ste->dw0.dw0.ks = 1;
- asm volatile("eieio" : : : "memory"); /* Order update */
- castout_ste->dw0.dw0.v = 1;
- asm volatile("slbie %0" : : "r" (old_esid << SID_SHIFT));
- /* Ensure completion of slbie */
- asm volatile("sync" : : : "memory");
-
- return (global_entry | (castout_entry & 0x7));
-}
-
-static inline void __ste_allocate(unsigned long esid, unsigned long vsid)
-{
- unsigned char stab_entry;
- unsigned long offset;
- int region_id = REGION_ID(esid << SID_SHIFT);
-
- stab_entry = make_ste(get_paca()->stab_addr, esid, vsid);
-
- if (region_id != USER_REGION_ID)
- return;
-
- offset = __get_cpu_var(stab_cache_ptr);
- if (offset < NR_STAB_CACHE_ENTRIES)
- __get_cpu_var(stab_cache[offset++]) = stab_entry;
- else
- offset = NR_STAB_CACHE_ENTRIES+1;
- __get_cpu_var(stab_cache_ptr) = offset;
-}
-
-/*
- * Allocate a segment table entry for the given ea.
- */
-int ste_allocate(unsigned long ea)
-{
- unsigned long vsid, esid;
- mm_context_t context;
-
- /* Check for invalid effective addresses. */
- if (!IS_VALID_EA(ea))
- return 1;
-
- /* Kernel or user address? */
- if (REGION_ID(ea) >= KERNEL_REGION_ID) {
- vsid = get_kernel_vsid(ea);
- context = KERNEL_CONTEXT(ea);
- } else {
- if (!current->mm)
- return 1;
-
- context = current->mm->context;
- vsid = get_vsid(context.id, ea);
- }
-
- esid = GET_ESID(ea);
- __ste_allocate(esid, vsid);
- /* Order update */
- asm volatile("sync":::"memory");
-
- return 0;
-}
-
-/*
- * preload some userspace segments into the segment table.
- */
-static void preload_stab(struct task_struct *tsk, struct mm_struct *mm)
-{
- unsigned long pc = KSTK_EIP(tsk);
- unsigned long stack = KSTK_ESP(tsk);
- unsigned long unmapped_base;
- unsigned long pc_esid = GET_ESID(pc);
- unsigned long stack_esid = GET_ESID(stack);
- unsigned long unmapped_base_esid;
- unsigned long vsid;
-
- if (test_tsk_thread_flag(tsk, TIF_32BIT))
- unmapped_base = TASK_UNMAPPED_BASE_USER32;
- else
- unmapped_base = TASK_UNMAPPED_BASE_USER64;
-
- unmapped_base_esid = GET_ESID(unmapped_base);
-
- if (!IS_VALID_EA(pc) || (REGION_ID(pc) >= KERNEL_REGION_ID))
- return;
- vsid = get_vsid(mm->context.id, pc);
- __ste_allocate(pc_esid, vsid);
-
- if (pc_esid == stack_esid)
- return;
-
- if (!IS_VALID_EA(stack) || (REGION_ID(stack) >= KERNEL_REGION_ID))
- return;
- vsid = get_vsid(mm->context.id, stack);
- __ste_allocate(stack_esid, vsid);
-
- if (pc_esid == unmapped_base_esid || stack_esid == unmapped_base_esid)
- return;
-
- if (!IS_VALID_EA(unmapped_base) ||
- (REGION_ID(unmapped_base) >= KERNEL_REGION_ID))
- return;
- vsid = get_vsid(mm->context.id, unmapped_base);
- __ste_allocate(unmapped_base_esid, vsid);
-
- /* Order update */
- asm volatile("sync" : : : "memory");
-}
-
-/* Flush all user entries from the segment table of the current processor. */
-void flush_stab(struct task_struct *tsk, struct mm_struct *mm)
-{
- STE *stab = (STE *) get_paca()->stab_addr;
- STE *ste;
- unsigned long offset = __get_cpu_var(stab_cache_ptr);
-
- /* Force previous translations to complete. DRENG */
- asm volatile("isync" : : : "memory");
-
- if (offset <= NR_STAB_CACHE_ENTRIES) {
- int i;
-
- for (i = 0; i < offset; i++) {
- ste = stab + __get_cpu_var(stab_cache[i]);
- ste->dw0.dw0.v = 0;
- }
- } else {
- unsigned long entry;
-
- /* Invalidate all entries. */
- ste = stab;
-
- /* Never flush the first entry. */
- ste += 1;
- for (entry = 1;
- entry < (PAGE_SIZE / sizeof(STE));
- entry++, ste++) {
- unsigned long ea;
- ea = ste->dw0.dw0.esid << SID_SHIFT;
- if (ea < KERNELBASE) {
- ste->dw0.dw0.v = 0;
- }
- }
- }
-
- asm volatile("sync; slbia; sync":::"memory");
-
- __get_cpu_var(stab_cache_ptr) = 0;
-
- preload_stab(tsk, mm);
-}
+++ /dev/null
-/*
- * Copyright (C) 1996 Paul Mackerras.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * NB this file must be compiled with -O2.
- */
-
-int
-xmon_setjmp(long *buf) /* NOTE: assert(sizeof(buf) > 184) */
-{
- /* XXX should save fp regs as well */
- asm volatile (
- "mflr 0; std 0,0(%0)\n\
- std 1,8(%0)\n\
- std 2,16(%0)\n\
- mfcr 0; std 0,24(%0)\n\
- std 13,32(%0)\n\
- std 14,40(%0)\n\
- std 15,48(%0)\n\
- std 16,56(%0)\n\
- std 17,64(%0)\n\
- std 18,72(%0)\n\
- std 19,80(%0)\n\
- std 20,88(%0)\n\
- std 21,96(%0)\n\
- std 22,104(%0)\n\
- std 23,112(%0)\n\
- std 24,120(%0)\n\
- std 25,128(%0)\n\
- std 26,136(%0)\n\
- std 27,144(%0)\n\
- std 28,152(%0)\n\
- std 29,160(%0)\n\
- std 30,168(%0)\n\
- std 31,176(%0)\n\
- " : : "r" (buf));
- return 0;
-}
-
-void
-xmon_longjmp(long *buf, int val)
-{
- if (val == 0)
- val = 1;
- asm volatile (
- "ld 13,32(%0)\n\
- ld 14,40(%0)\n\
- ld 15,48(%0)\n\
- ld 16,56(%0)\n\
- ld 17,64(%0)\n\
- ld 18,72(%0)\n\
- ld 19,80(%0)\n\
- ld 20,88(%0)\n\
- ld 21,96(%0)\n\
- ld 22,104(%0)\n\
- ld 23,112(%0)\n\
- ld 24,120(%0)\n\
- ld 25,128(%0)\n\
- ld 26,136(%0)\n\
- ld 27,144(%0)\n\
- ld 28,152(%0)\n\
- ld 29,160(%0)\n\
- ld 30,168(%0)\n\
- ld 31,176(%0)\n\
- ld 0,24(%0)\n\
- mtcrf 0x38,0\n\
- ld 0,0(%0)\n\
- ld 1,8(%0)\n\
- ld 2,16(%0)\n\
- mtlr 0\n\
- mr 3,%1\n\
- " : : "r" (buf), "r" (val));
-}
+++ /dev/null
-/*
- * Support for 32-bit Linux for S390 ELF binaries.
- *
- * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
- * Author(s): Gerhard Tonn (ton@de.ibm.com)
- *
- * Separated from binfmt_elf32.c to reduce exports for module enablement.
- *
- */
-
-#include <linux/config.h>
-#include <linux/slab.h>
-#include <linux/file.h>
-#include <linux/mman.h>
-#include <linux/a.out.h>
-#include <linux/stat.h>
-#include <linux/fcntl.h>
-#include <linux/smp_lock.h>
-#include <linux/init.h>
-#include <linux/pagemap.h>
-#include <linux/mm.h>
-#include <linux/highmem.h>
-#include <linux/spinlock.h>
-#include <linux/binfmts.h>
-#include <linux/module.h>
-#include <linux/security.h>
-
-#include <asm/uaccess.h>
-#include <asm/pgalloc.h>
-#include <asm/mmu_context.h>
-
-#ifdef CONFIG_KMOD
-#include <linux/kmod.h>
-#endif
-
-
-int setup_arg_pages32(struct linux_binprm *bprm, int executable_stack)
-{
- unsigned long stack_base;
- struct vm_area_struct *mpnt;
- struct mm_struct *mm = current->mm;
- int i, ret;
-
- stack_base = STACK_TOP - MAX_ARG_PAGES*PAGE_SIZE;
- mm->arg_start = bprm->p + stack_base;
-
- bprm->p += stack_base;
- if (bprm->loader)
- bprm->loader += stack_base;
- bprm->exec += stack_base;
-
- mpnt = kmem_cache_alloc(vm_area_cachep, SLAB_KERNEL);
- if (!mpnt)
- return -ENOMEM;
-
- if (security_vm_enough_memory((STACK_TOP - (PAGE_MASK & (unsigned long) bprm->p))>>PAGE_SHIFT)) {
- kmem_cache_free(vm_area_cachep, mpnt);
- return -ENOMEM;
- }
-
- memset(mpnt, 0, sizeof(*mpnt));
-
- down_write(&mm->mmap_sem);
- {
- mpnt->vm_mm = mm;
- mpnt->vm_start = PAGE_MASK & (unsigned long) bprm->p;
- mpnt->vm_end = STACK_TOP;
- /* executable stack setting would be applied here */
- mpnt->vm_page_prot = PAGE_COPY;
- mpnt->vm_flags = VM_STACK_FLAGS;
- if ((ret = insert_vm_struct(mm, mpnt))) {
- up_write(&mm->mmap_sem);
- kmem_cache_free(vm_area_cachep, mpnt);
- return ret;
- }
- mm->stack_vm = mm->total_vm = vma_pages(mpnt);
- }
-
- for (i = 0 ; i < MAX_ARG_PAGES ; i++) {
- struct page *page = bprm->page[i];
- if (page) {
- bprm->page[i] = NULL;
- install_arg_page(mpnt, page, stack_base);
- }
- stack_base += PAGE_SIZE;
- }
- up_write(&mm->mmap_sem);
-
- return 0;
-}
-
-EXPORT_SYMBOL(setup_arg_pages32);
+++ /dev/null
-/*
- * arch/s390/lib/memset.S
- * S390 fast memset routine
- *
- * S390 version
- * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
- * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- */
-
-/*
- * R2 = address to memory area
- * R3 = byte to fill memory with
- * R4 = number of bytes to fill
- */
- .globl memset
-memset:
- LTR 4,4
- JZ memset_end
- LR 0,2 # save pointer to memory area
- LR 1,3 # move pad byte to R1
- LR 3,4
- SR 4,4 # no source for MVCLE, only a pad byte
- SR 5,5
- MVCLE 2,4,0(1) # thats it, MVCLE is your friend
- JO .-4
- LR 2,0 # return pointer to mem.
-memset_end:
- BR 14
-
-
+++ /dev/null
-/*
- * arch/s390/lib/memset.S
- * S390 fast memset routine
- *
- * S390 version
- * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
- * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- */
-
-/*
- * R2 = address to memory area
- * R3 = byte to fill memory with
- * R4 = number of bytes to fill
- */
- .globl memset
-memset:
- LTGR 4,4
- JZ memset_end
- LGR 0,2 # save pointer to memory area
- LGR 1,3 # move pad byte to R1
- LGR 3,4
- SGR 4,4 # no source for MVCLE, only a pad byte
- SGR 5,5
- MVCLE 2,4,0(1) # thats it, MVCLE is your friend
- JO .-4
- LGR 2,0 # return pointer to mem.
-memset_end:
- BR 14
-
-
+++ /dev/null
-/*
- * arch/s390/lib/strcmp.S
- * S390 strcmp routine
- *
- * S390 version
- * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
- * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- */
-
-/*
- * R2 = address of compare string
- * R3 = address of test string
- */
- .globl strcmp
-strcmp:
- SR 0,0
- SR 1,1
- CLST 2,3
- JO .-4
- JE strcmp_equal
- IC 0,0(3)
- IC 1,0(2)
- SR 1,0
-strcmp_equal:
- LR 2,1
- BR 14
-
+++ /dev/null
-/*
- * arch/s390/lib/strcmp.S
- * S390 strcmp routine
- *
- * S390 version
- * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
- * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- */
-
-/*
- * R2 = address of compare string
- * R3 = address of test string
- */
- .globl strcmp
-strcmp:
- SGR 0,0
- SGR 1,1
- CLST 2,3
- JO .-4
- JE strcmp_equal
- IC 0,0(3)
- IC 1,0(2)
- SGR 1,0
-strcmp_equal:
- LGR 2,1
- BR 14
-
+++ /dev/null
-/*
- * arch/s390/kernel/strcpy.S
- * S390 strcpy routine
- *
- * S390 version
- * Copyright (C) 2004 IBM Deutschland Entwicklung GmbH, IBM Corporation
- * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- */
-
-/*
- * R2 = address of destination
- * R3 = address of source string
- */
- .globl strcpy
-strcpy:
- sr %r0,%r0
-0: mvst %r2,%r3
- jo 0b
- br %r14
-
+++ /dev/null
-/*
- * arch/s390/kernel/strcpy.S
- * S390 strcpy routine
- *
- * S390 version
- * Copyright (C) 2004 IBM Deutschland Entwicklung GmbH, IBM Corporation
- * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- */
-
-/*
- * R2 = address of destination
- * R3 = address of source string
- */
- .globl strcpy
-strcpy:
- sgr %r0,%r0
-0: mvst %r2,%r3
- jo 0b
- br %r14
-
+++ /dev/null
-/*
- * arch/s390/kernel/strncpy.S
- * S390 strncpy routine
- *
- * S390 version
- * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
- * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- */
-
-/*
- * R2 = address of destination
- * R3 = address of source string
- * R4 = max number of bytes to copy
- */
- .globl strncpy
-strncpy:
- LR 1,2 # don't touch address in R2
- LTR 4,4
- JZ strncpy_exit # 0 bytes -> nothing to do
- SR 0,0
-strncpy_loop:
- ICM 0,1,0(3) # ICM sets the cc, IC does not
- LA 3,1(3)
- STC 0,0(1)
- LA 1,1(1)
- JZ strncpy_pad # ICM inserted a 0x00
- BRCT 4,strncpy_loop # R4 -= 1, jump to strncpy_loop if > 0
-strncpy_exit:
- BR 14
-strncpy_clear:
- STC 0,0(1)
- LA 1,1(1)
-strncpy_pad:
- BRCT 4,strncpy_clear
- BR 14
+++ /dev/null
-/*
- * arch/s390/kernel/strncpy.S
- * S390 strncpy routine
- *
- * S390 version
- * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
- * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- */
-
-/*
- * R2 = address of destination
- * R3 = address of source string
- * R4 = max number of bytes to copy
- */
- .globl strncpy
-strncpy:
- LGR 1,2 # don't touch address in R2
- LTR 4,4
- JZ strncpy_exit # 0 bytes -> nothing to do
- SGR 0,0
-strncpy_loop:
- ICM 0,1,0(3) # ICM sets the cc, IC does not
- LA 3,1(3)
- STC 0,0(1)
- LA 1,1(1)
- JZ strncpy_pad # ICM inserted a 0x00
- BRCTG 4,strncpy_loop # R4 -= 1, jump to strncpy_loop if > 0
-strncpy_exit:
- BR 14
-strncpy_clear:
- STC 0,0(1)
- LA 1,1(1)
-strncpy_pad:
- BRCTG 4,strncpy_clear
- BR 14
+++ /dev/null
-#
-# Makefile for the SystemH specific parts of the kernel
-#
-
-obj-y := setup.o irq.o io.o
-
-# XXX: This wants to be consolidated in arch/sh/drivers/pci, and more
-# importantly, with the generic sh7751_pcic_init() code. For now, we'll
-# just abuse the hell out of kbuild, because we can..
-
-obj-$(CONFIG_PCI) += pci.o
-pci-y := ../se/7751/pci.o
-
+++ /dev/null
-/*
- * linux/arch/sh/boards/systemh/io.c
- *
- * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
- * Based largely on io_se.c.
- *
- * I/O routine for Hitachi 7751 Systemh.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <asm/systemh/7751systemh.h>
-#include <asm/addrspace.h>
-#include <asm/io.h>
-
-#include <linux/pci.h>
-#include "../../drivers/pci/pci-sh7751.h"
-
-/*
- * The 7751 SystemH Engine uses the built-in PCI controller (PCIC)
- * of the 7751 processor, and has a SuperIO accessible on its memory
- * bus.
- */
-
-#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
-#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
-#define PCI_IO_AREA SH7751_PCI_IO_BASE
-#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
-
-#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
-#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area
- of smc lan chip*/
-
-#define maybebadio(name,port) \
- printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
- #name, (port), (__u32) __builtin_return_address(0))
-
-static inline void delay(void)
-{
- ctrl_inw(0xa0000000);
-}
-
-static inline volatile __u16 *
-port2adr(unsigned int port)
-{
- if (port >= 0x2000)
- return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
-#if 0
- else
- return (volatile __u16 *) (PA_SUPERIO + (port << 1));
-#endif
- maybebadio(name,(unsigned long)port);
- return (volatile __u16*)port;
-}
-
-/* In case someone configures the kernel w/o PCI support: in that */
-/* scenario, don't ever bother to check for PCI-window addresses */
-
-/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
-#if defined(CONFIG_PCI)
-#define CHECK_SH7751_PCIIO(port) \
- ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
-#else
-#define CHECK_SH7751_PCIIO(port) (0)
-#endif
-
-/*
- * General outline: remap really low stuff [eventually] to SuperIO,
- * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
- * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
- * should be way beyond the window, and is used w/o translation for
- * compatibility.
- */
-unsigned char sh7751systemh_inb(unsigned long port)
-{
- if (PXSEG(port))
- return *(volatile unsigned char *)port;
- else if (CHECK_SH7751_PCIIO(port))
- return *(volatile unsigned char *)PCI_IOMAP(port);
- else if (port <= 0x3F1)
- return *(volatile unsigned char *)ETHER_IOMAP(port);
- else
- return (*port2adr(port))&0xff;
-}
-
-unsigned char sh7751systemh_inb_p(unsigned long port)
-{
- unsigned char v;
-
- if (PXSEG(port))
- v = *(volatile unsigned char *)port;
- else if (CHECK_SH7751_PCIIO(port))
- v = *(volatile unsigned char *)PCI_IOMAP(port);
- else if (port <= 0x3F1)
- v = *(volatile unsigned char *)ETHER_IOMAP(port);
- else
- v = (*port2adr(port))&0xff;
- delay();
- return v;
-}
-
-unsigned short sh7751systemh_inw(unsigned long port)
-{
- if (PXSEG(port))
- return *(volatile unsigned short *)port;
- else if (CHECK_SH7751_PCIIO(port))
- return *(volatile unsigned short *)PCI_IOMAP(port);
- else if (port >= 0x2000)
- return *port2adr(port);
- else if (port <= 0x3F1)
- return *(volatile unsigned int *)ETHER_IOMAP(port);
- else
- maybebadio(inw, port);
- return 0;
-}
-
-unsigned int sh7751systemh_inl(unsigned long port)
-{
- if (PXSEG(port))
- return *(volatile unsigned long *)port;
- else if (CHECK_SH7751_PCIIO(port))
- return *(volatile unsigned int *)PCI_IOMAP(port);
- else if (port >= 0x2000)
- return *port2adr(port);
- else if (port <= 0x3F1)
- return *(volatile unsigned int *)ETHER_IOMAP(port);
- else
- maybebadio(inl, port);
- return 0;
-}
-
-void sh7751systemh_outb(unsigned char value, unsigned long port)
-{
-
- if (PXSEG(port))
- *(volatile unsigned char *)port = value;
- else if (CHECK_SH7751_PCIIO(port))
- *((unsigned char*)PCI_IOMAP(port)) = value;
- else if (port <= 0x3F1)
- *(volatile unsigned char *)ETHER_IOMAP(port) = value;
- else
- *(port2adr(port)) = value;
-}
-
-void sh7751systemh_outb_p(unsigned char value, unsigned long port)
-{
- if (PXSEG(port))
- *(volatile unsigned char *)port = value;
- else if (CHECK_SH7751_PCIIO(port))
- *((unsigned char*)PCI_IOMAP(port)) = value;
- else if (port <= 0x3F1)
- *(volatile unsigned char *)ETHER_IOMAP(port) = value;
- else
- *(port2adr(port)) = value;
- delay();
-}
-
-void sh7751systemh_outw(unsigned short value, unsigned long port)
-{
- if (PXSEG(port))
- *(volatile unsigned short *)port = value;
- else if (CHECK_SH7751_PCIIO(port))
- *((unsigned short *)PCI_IOMAP(port)) = value;
- else if (port >= 0x2000)
- *port2adr(port) = value;
- else if (port <= 0x3F1)
- *(volatile unsigned short *)ETHER_IOMAP(port) = value;
- else
- maybebadio(outw, port);
-}
-
-void sh7751systemh_outl(unsigned int value, unsigned long port)
-{
- if (PXSEG(port))
- *(volatile unsigned long *)port = value;
- else if (CHECK_SH7751_PCIIO(port))
- *((unsigned long*)PCI_IOMAP(port)) = value;
- else
- maybebadio(outl, port);
-}
-
-void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count)
-{
- unsigned char *p = addr;
- while (count--) *p++ = sh7751systemh_inb(port);
-}
-
-void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count)
-{
- unsigned short *p = addr;
- while (count--) *p++ = sh7751systemh_inw(port);
-}
-
-void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count)
-{
- maybebadio(insl, port);
-}
-
-void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count)
-{
- unsigned char *p = (unsigned char*)addr;
- while (count--) sh7751systemh_outb(*p++, port);
-}
-
-void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long count)
-{
- unsigned short *p = (unsigned short*)addr;
- while (count--) sh7751systemh_outw(*p++, port);
-}
-
-void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count)
-{
- maybebadio(outsw, port);
-}
-
-/* For read/write calls, just copy generic (pass-thru); PCIMBR is */
-/* already set up. For a larger memory space, these would need to */
-/* reset PCIMBR as needed on a per-call basis... */
-
-unsigned char sh7751systemh_readb(unsigned long addr)
-{
- return *(volatile unsigned char*)addr;
-}
-
-unsigned short sh7751systemh_readw(unsigned long addr)
-{
- return *(volatile unsigned short*)addr;
-}
-
-unsigned int sh7751systemh_readl(unsigned long addr)
-{
- return *(volatile unsigned long*)addr;
-}
-
-void sh7751systemh_writeb(unsigned char b, unsigned long addr)
-{
- *(volatile unsigned char*)addr = b;
-}
-
-void sh7751systemh_writew(unsigned short b, unsigned long addr)
-{
- *(volatile unsigned short*)addr = b;
-}
-
-void sh7751systemh_writel(unsigned int b, unsigned long addr)
-{
- *(volatile unsigned long*)addr = b;
-}
-
-\f
-
-/* Map ISA bus address to the real address. Only for PCMCIA. */
-
-/* ISA page descriptor. */
-static __u32 sh_isa_memmap[256];
-
-#if 0
-static int
-sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
-{
- int idx;
-
- if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
- return -1;
-
- idx = start >> 12;
- sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
- printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
- start, length, offset, idx, sh_isa_memmap[idx]);
- return 0;
-}
-#endif
-
-unsigned long
-sh7751systemh_isa_port2addr(unsigned long offset)
-{
- int idx;
-
- idx = (offset >> 12) & 0xff;
- offset &= 0xfff;
- return sh_isa_memmap[idx] + offset;
-}
+++ /dev/null
-/*
- * linux/arch/sh/boards/systemh/irq.c
- *
- * Copyright (C) 2000 Kazumoto Kojima
- *
- * Hitachi SystemH Support.
- *
- * Modified for 7751 SystemH by
- * Jonathan Short.
- */
-
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-
-#include <linux/hdreg.h>
-#include <linux/ide.h>
-#include <asm/io.h>
-#include <asm/mach/7751systemh.h>
-#include <asm/smc37c93x.h>
-
-/* address of external interrupt mask register
- * address must be set prior to use these (maybe in init_XXX_irq())
- * XXX : is it better to use .config than specifying it in code? */
-static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004;
-static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000;
-
-/* forward declaration */
-static unsigned int startup_systemh_irq(unsigned int irq);
-static void shutdown_systemh_irq(unsigned int irq);
-static void enable_systemh_irq(unsigned int irq);
-static void disable_systemh_irq(unsigned int irq);
-static void mask_and_ack_systemh(unsigned int);
-static void end_systemh_irq(unsigned int irq);
-
-/* hw_interrupt_type */
-static struct hw_interrupt_type systemh_irq_type = {
- " SystemH Register",
- startup_systemh_irq,
- shutdown_systemh_irq,
- enable_systemh_irq,
- disable_systemh_irq,
- mask_and_ack_systemh,
- end_systemh_irq
-};
-
-static unsigned int startup_systemh_irq(unsigned int irq)
-{
- enable_systemh_irq(irq);
- return 0; /* never anything pending */
-}
-
-static void shutdown_systemh_irq(unsigned int irq)
-{
- disable_systemh_irq(irq);
-}
-
-static void disable_systemh_irq(unsigned int irq)
-{
- if (systemh_irq_mask_register) {
- unsigned long flags;
- unsigned long val, mask = 0x01 << 1;
-
- /* Clear the "irq"th bit in the mask and set it in the request */
- local_irq_save(flags);
-
- val = ctrl_inl((unsigned long)systemh_irq_mask_register);
- val &= ~mask;
- ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
-
- val = ctrl_inl((unsigned long)systemh_irq_request_register);
- val |= mask;
- ctrl_outl(val, (unsigned long)systemh_irq_request_register);
-
- local_irq_restore(flags);
- }
-}
-
-static void enable_systemh_irq(unsigned int irq)
-{
- if (systemh_irq_mask_register) {
- unsigned long flags;
- unsigned long val, mask = 0x01 << 1;
-
- /* Set "irq"th bit in the mask register */
- local_irq_save(flags);
- val = ctrl_inl((unsigned long)systemh_irq_mask_register);
- val |= mask;
- ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
- local_irq_restore(flags);
- }
-}
-
-static void mask_and_ack_systemh(unsigned int irq)
-{
- disable_systemh_irq(irq);
-}
-
-static void end_systemh_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_systemh_irq(irq);
-}
-
-void make_systemh_irq(unsigned int irq)
-{
- disable_irq_nosync(irq);
- irq_desc[irq].handler = &systemh_irq_type;
- disable_systemh_irq(irq);
-}
-
+++ /dev/null
-/*
- * linux/arch/sh/boards/systemh/setup.c
- *
- * Copyright (C) 2000 Kazumoto Kojima
- * Copyright (C) 2003 Paul Mundt
- *
- * Hitachi SystemH Support.
- *
- * Modified for 7751 SystemH by Jonathan Short.
- *
- * Rewritten for 2.6 by Paul Mundt.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <asm/mach/7751systemh.h>
-#include <asm/mach/io.h>
-#include <asm/machvec.h>
-
-extern void make_systemh_irq(unsigned int irq);
-
-const char *get_system_type(void)
-{
- return "7751 SystemH";
-}
-
-/*
- * Initialize IRQ setting
- */
-void __init init_7751systemh_IRQ(void)
-{
-/* make_ipr_irq(10, BCR_ILCRD, 1, 0x0f-10); LAN */
-/* make_ipr_irq(14, BCR_ILCRA, 2, 0x0f-4); */
- make_systemh_irq(0xb); /* Ethernet interrupt */
-}
-
-struct sh_machine_vector mv_7751systemh __initmv = {
- .mv_nr_irqs = 72,
-
- .mv_inb = sh7751systemh_inb,
- .mv_inw = sh7751systemh_inw,
- .mv_inl = sh7751systemh_inl,
- .mv_outb = sh7751systemh_outb,
- .mv_outw = sh7751systemh_outw,
- .mv_outl = sh7751systemh_outl,
-
- .mv_inb_p = sh7751systemh_inb_p,
- .mv_inw_p = sh7751systemh_inw,
- .mv_inl_p = sh7751systemh_inl,
- .mv_outb_p = sh7751systemh_outb_p,
- .mv_outw_p = sh7751systemh_outw,
- .mv_outl_p = sh7751systemh_outl,
-
- .mv_insb = sh7751systemh_insb,
- .mv_insw = sh7751systemh_insw,
- .mv_insl = sh7751systemh_insl,
- .mv_outsb = sh7751systemh_outsb,
- .mv_outsw = sh7751systemh_outsw,
- .mv_outsl = sh7751systemh_outsl,
-
- .mv_readb = sh7751systemh_readb,
- .mv_readw = sh7751systemh_readw,
- .mv_readl = sh7751systemh_readl,
- .mv_writeb = sh7751systemh_writeb,
- .mv_writew = sh7751systemh_writew,
- .mv_writel = sh7751systemh_writel,
-
- .mv_isa_port2addr = sh7751systemh_isa_port2addr,
-
- .mv_init_irq = init_7751systemh_IRQ,
-};
-ALIAS_MV(7751systemh)
-
-int __init platform_setup(void)
-{
- return 0;
-}
-
+++ /dev/null
-#!/bin/sh
-#
-# include/asm-sh/machtype.h header generation script for SuperH
-#
-# Copyright (C) 2003 Paul Mundt
-#
-# This is pretty much a quick and dirty hack based off of the awk
-# script written by rmk that ARM uses to achieve the same sort of
-# thing.
-#
-# Unfortunately this script has a dependance on bash/sed/cut/tr,
-# though they should be prevalent enough for this dependancy not
-# to matter overly much.
-#
-# As a note for anyone attempting to manually invoke this script,
-# it expects to be run straight out of the arch/sh/tools/ directory
-# as it doesn't look at TOPDIR to figure out where asm-sh is
-# located.
-#
-# See the note at the top of the generated header for additional
-# information.
-#
-# Released under the terms of the GNU GPL v2.0.
-#
-
-[ $# -ne 1 ] && echo "Usage: $0 <mach defs>" && exit 1
-
-cat << EOF > tmp.h
-/*
- * Automagically generated, don't touch.
- */
-#ifndef __ASM_SH_MACHTYPES_H
-#define __ASM_SH_MACHTYPES_H
-
-#include <linux/config.h>
-
-/*
- * We'll use the following MACH_xxx defs for placeholders for the time
- * being .. these will all go away once sh_machtype is assigned per-board.
- *
- * For now we leave things the way they are for backwards compatibility.
- */
-
-/* Mach types */
-EOF
-
-newline='
-'
-IFS=$newline
-
-rm -f tmp2.h
-
-for entry in `cat $1 | sed -e 's/\#.*$//g;/^$/d' | tr '\t' ' ' | tr -s ' '`; do
- board=`echo $entry | cut -f1 -d' '`
-
- printf "#ifdef CONFIG_`echo $entry | cut -f2 -d' '`\n" >> tmp.h
- printf " #define MACH_$board\t\t1\n#else\n #define MACH_$board\t\t0\n#endif\n" >> tmp.h
- printf "#define mach_is_`echo $board | tr '[A-Z]' '[a-z]'`()\t\t\t(MACH_$board)\n" >> tmp2.h
-done
-
-printf "\n/* Machtype checks */\n" >> tmp.h
-cat tmp2.h >> tmp.h && rm -f tmp2.h
-
-cat << EOF >> tmp.h
-
-#endif /* __ASM_SH_MACHTYPES_H */
-EOF
-
-cat tmp.h
-rm -f tmp.h
-
+++ /dev/null
-/* U3copy_in_user.S: UltraSparc-III optimized memcpy.
- *
- * Copyright (C) 1999, 2000, 2004 David S. Miller (davem@redhat.com)
- */
-
-#include <asm/visasm.h>
-#include <asm/asi.h>
-#include <asm/dcu.h>
-#include <asm/spitfire.h>
-
-#define XCC xcc
-
-#define EXNV(x,y,a,b) \
-98: x,y; \
- .section .fixup; \
- .align 4; \
-99: retl; \
- a, b, %o0; \
- .section __ex_table; \
- .align 4; \
- .word 98b, 99b; \
- .text; \
- .align 4;
-#define EXNV1(x,y,a,b) \
-98: x,y; \
- .section .fixup; \
- .align 4; \
-99: a, b, %o0; \
- retl; \
- add %o0, 1, %o0; \
- .section __ex_table; \
- .align 4; \
- .word 98b, 99b; \
- .text; \
- .align 4;
-#define EXNV4(x,y,a,b) \
-98: x,y; \
- .section .fixup; \
- .align 4; \
-99: a, b, %o0; \
- retl; \
- add %o0, 4, %o0; \
- .section __ex_table; \
- .align 4; \
- .word 98b, 99b; \
- .text; \
- .align 4;
-#define EXNV8(x,y,a,b) \
-98: x,y; \
- .section .fixup; \
- .align 4; \
-99: a, b, %o0; \
- retl; \
- add %o0, 8, %o0; \
- .section __ex_table; \
- .align 4; \
- .word 98b, 99b; \
- .text; \
- .align 4;
-
- .register %g2,#scratch
- .register %g3,#scratch
-
- .text
- .align 32
-
- /* Don't try to get too fancy here, just nice and
- * simple. This is predominantly used for well aligned
- * small copies in the compat layer. It is also used
- * to copy register windows around during thread cloning.
- */
-
- .globl U3copy_in_user
-U3copy_in_user: /* %o0=dst, %o1=src, %o2=len */
- /* Writing to %asi is _expensive_ so we hardcode it.
- * Reading %asi to check for KERNEL_DS is comparatively
- * cheap.
- */
- rd %asi, %g1
- cmp %g1, ASI_AIUS
- bne,pn %icc, U3memcpy_user_stub
- nop
-
- cmp %o2, 0
- be,pn %XCC, out
- or %o0, %o1, %o3
- cmp %o2, 16
- bleu,a,pn %XCC, small_copy
- or %o3, %o2, %o3
-
-medium_copy: /* 16 < len <= 64 */
- andcc %o3, 0x7, %g0
- bne,pn %XCC, small_copy_unaligned
- sub %o0, %o1, %o3
-
-medium_copy_aligned:
- andn %o2, 0x7, %o4
- and %o2, 0x7, %o2
-1: subcc %o4, 0x8, %o4
- EXNV8(ldxa [%o1] %asi, %o5, add %o4, %o2)
- EXNV8(stxa %o5, [%o1 + %o3] ASI_AIUS, add %o4, %o2)
- bgu,pt %XCC, 1b
- add %o1, 0x8, %o1
- andcc %o2, 0x4, %g0
- be,pt %XCC, 1f
- nop
- sub %o2, 0x4, %o2
- EXNV4(lduwa [%o1] %asi, %o5, add %o4, %o2)
- EXNV4(stwa %o5, [%o1 + %o3] ASI_AIUS, add %o4, %o2)
- add %o1, 0x4, %o1
-1: cmp %o2, 0
- be,pt %XCC, out
- nop
- ba,pt %xcc, small_copy_unaligned
- nop
-
-small_copy: /* 0 < len <= 16 */
- andcc %o3, 0x3, %g0
- bne,pn %XCC, small_copy_unaligned
- sub %o0, %o1, %o3
-
-small_copy_aligned:
- subcc %o2, 4, %o2
- EXNV4(lduwa [%o1] %asi, %g1, add %o2, %g0)
- EXNV4(stwa %g1, [%o1 + %o3] ASI_AIUS, add %o2, %g0)
- bgu,pt %XCC, small_copy_aligned
- add %o1, 4, %o1
-
-out: retl
- clr %o0
-
- .align 32
-small_copy_unaligned:
- subcc %o2, 1, %o2
- EXNV1(lduba [%o1] %asi, %g1, add %o2, %g0)
- EXNV1(stba %g1, [%o1 + %o3] ASI_AIUS, add %o2, %g0)
- bgu,pt %XCC, small_copy_unaligned
- add %o1, 1, %o1
- retl
- clr %o0
+++ /dev/null
-/* $Id: VIScopy.S,v 1.27 2002/02/09 19:49:30 davem Exp $
- * VIScopy.S: High speed copy operations utilizing the UltraSparc
- * Visual Instruction Set.
- *
- * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 1996, 1997, 1998, 1999 Jakub Jelinek (jj@ultra.linux.cz)
- */
-
-#include "VIS.h"
-
- /* VIS code can be used for numerous copy/set operation variants.
- * It can be made to work in the kernel, one single instance,
- * for all of memcpy, copy_to_user, and copy_from_user by setting
- * the ASI src/dest globals correctly. Furthermore it can
- * be used for kernel-->kernel page copies as well, a hook label
- * is put in here just for this purpose.
- *
- * For userland, compiling this without __KERNEL__ defined makes
- * it work just fine as a generic libc bcopy and memcpy.
- * If for userland it is compiled with a 32bit gcc (but you need
- * -Wa,-Av9a for as), the code will just rely on lower 32bits of
- * IEU registers, if you compile it with 64bit gcc (ie. define
- * __sparc_v9__), the code will use full 64bit.
- */
-
-#ifdef __KERNEL__
-
-#include <asm/visasm.h>
-#include <asm/thread_info.h>
-
-#define FPU_CLEAN_RETL \
- ldub [%g6 + TI_CURRENT_DS], %o1; \
- VISExit \
- clr %o0; \
- retl; \
- wr %o1, %g0, %asi;
-#define FPU_RETL \
- ldub [%g6 + TI_CURRENT_DS], %o1; \
- VISExit \
- clr %o0; \
- retl; \
- wr %o1, %g0, %asi;
-#define NORMAL_RETL \
- ldub [%g6 + TI_CURRENT_DS], %o1; \
- clr %o0; \
- retl; \
- wr %o1, %g0, %asi;
-#define EX(x,y,a,b) \
-98: x,y; \
- .section .fixup; \
- .align 4; \
-99: ba VIScopyfixup_ret; \
- a, b, %o1; \
- .section __ex_table; \
- .align 4; \
- .word 98b, 99b; \
- .text; \
- .align 4;
-#define EX2(x,y,c,d,e,a,b) \
-98: x,y; \
- .section .fixup; \
- .align 4; \
-99: c, d, e; \
- ba VIScopyfixup_ret; \
- a, b, %o1; \
- .section __ex_table; \
- .align 4; \
- .word 98b, 99b; \
- .text; \
- .align 4;
-#define EXO2(x,y) \
-98: x,y; \
- .section __ex_table; \
- .align 4; \
- .word 98b, VIScopyfixup_reto2; \
- .text; \
- .align 4;
-#define EXVISN(x,y,n) \
-98: x,y; \
- .section __ex_table; \
- .align 4; \
- .word 98b, VIScopyfixup_vis##n; \
- .text; \
- .align 4;
-#define EXT(start,end,handler) \
- .section __ex_table; \
- .align 4; \
- .word start, 0, end, handler; \
- .text; \
- .align 4;
-#else
-#ifdef REGS_64BIT
-#define FPU_CLEAN_RETL \
- retl; \
- mov %g6, %o0;
-#define FPU_RETL \
- retl; \
- mov %g6, %o0;
-#else
-#define FPU_CLEAN_RETL \
- wr %g0, FPRS_FEF, %fprs; \
- retl; \
- mov %g6, %o0;
-#define FPU_RETL \
- wr %g0, FPRS_FEF, %fprs; \
- retl; \
- mov %g6, %o0;
-#endif
-#define NORMAL_RETL \
- retl; \
- mov %g6, %o0;
-#define EX(x,y,a,b) x,y
-#define EX2(x,y,c,d,e,a,b) x,y
-#define EXO2(x,y) x,y
-#define EXVISN(x,y,n) x,y
-#define EXT(a,b,c)
-#endif
-#define EXVIS(x,y) EXVISN(x,y,0)
-#define EXVIS1(x,y) EXVISN(x,y,1)
-#define EXVIS2(x,y) EXVISN(x,y,2)
-#define EXVIS3(x,y) EXVISN(x,y,3)
-#define EXVIS4(x,y) EXVISN(x,y,4)
-
-#define FREG_FROB(f1, f2, f3, f4, f5, f6, f7, f8, f9) \
- faligndata %f1, %f2, %f48; \
- faligndata %f2, %f3, %f50; \
- faligndata %f3, %f4, %f52; \
- faligndata %f4, %f5, %f54; \
- faligndata %f5, %f6, %f56; \
- faligndata %f6, %f7, %f58; \
- faligndata %f7, %f8, %f60; \
- faligndata %f8, %f9, %f62;
-
-#define MAIN_LOOP_CHUNK(src, dest, fdest, fsrc, len, jmptgt) \
- EXVIS(LDBLK [%src] ASIBLK, %fdest); \
- ASI_SETDST_BLK \
- EXVIS(STBLK %fsrc, [%dest] ASIBLK); \
- add %src, 0x40, %src; \
- subcc %len, 0x40, %len; \
- be,pn %xcc, jmptgt; \
- add %dest, 0x40, %dest; \
- ASI_SETSRC_BLK
-
-#define LOOP_CHUNK1(src, dest, len, branch_dest) \
- MAIN_LOOP_CHUNK(src, dest, f0, f48, len, branch_dest)
-#define LOOP_CHUNK2(src, dest, len, branch_dest) \
- MAIN_LOOP_CHUNK(src, dest, f16, f48, len, branch_dest)
-#define LOOP_CHUNK3(src, dest, len, branch_dest) \
- MAIN_LOOP_CHUNK(src, dest, f32, f48, len, branch_dest)
-
-#define STORE_SYNC(dest, fsrc) \
- EXVIS(STBLK %fsrc, [%dest] ASIBLK); \
- add %dest, 0x40, %dest;
-
-#ifdef __KERNEL__
-#define STORE_JUMP(dest, fsrc, target) \
- srl asi_dest, 3, %g5; \
- EXVIS2(STBLK %fsrc, [%dest] ASIBLK); \
- xor asi_dest, ASI_BLK_XOR1, asi_dest;\
- add %dest, 0x40, %dest; \
- xor asi_dest, %g5, asi_dest; \
- ba,pt %xcc, target;
-#else
-#define STORE_JUMP(dest, fsrc, target) \
- EXVIS2(STBLK %fsrc, [%dest] ASIBLK); \
- add %dest, 0x40, %dest; \
- ba,pt %xcc, target;
-#endif
-
-#ifndef __KERNEL__
-#define VISLOOP_PAD nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop;
-#else
-#define VISLOOP_PAD
-#endif
-
-#define FINISH_VISCHUNK(dest, f0, f1, left) \
- ASI_SETDST_NOBLK \
- subcc %left, 8, %left; \
- bl,pn %xcc, vis_out; \
- faligndata %f0, %f1, %f48; \
- EXVIS3(STDF %f48, [%dest] ASINORMAL); \
- add %dest, 8, %dest;
-
-#define UNEVEN_VISCHUNK_LAST(dest, f0, f1, left) \
- subcc %left, 8, %left; \
- bl,pn %xcc, vis_out; \
- fsrc1 %f0, %f1;
-#define UNEVEN_VISCHUNK(dest, f0, f1, left) \
- UNEVEN_VISCHUNK_LAST(dest, f0, f1, left) \
- ba,a,pt %xcc, vis_out_slk;
-
- /* Macros for non-VIS memcpy code. */
-#ifdef REGS_64BIT
-
-#define MOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3) \
- ASI_SETSRC_NOBLK \
- LDX [%src + offset + 0x00] ASINORMAL, %t0; \
- LDX [%src + offset + 0x08] ASINORMAL, %t1; \
- LDX [%src + offset + 0x10] ASINORMAL, %t2; \
- LDX [%src + offset + 0x18] ASINORMAL, %t3; \
- ASI_SETDST_NOBLK \
- STW %t0, [%dst + offset + 0x04] ASINORMAL; \
- srlx %t0, 32, %t0; \
- STW %t0, [%dst + offset + 0x00] ASINORMAL; \
- STW %t1, [%dst + offset + 0x0c] ASINORMAL; \
- srlx %t1, 32, %t1; \
- STW %t1, [%dst + offset + 0x08] ASINORMAL; \
- STW %t2, [%dst + offset + 0x14] ASINORMAL; \
- srlx %t2, 32, %t2; \
- STW %t2, [%dst + offset + 0x10] ASINORMAL; \
- STW %t3, [%dst + offset + 0x1c] ASINORMAL; \
- srlx %t3, 32, %t3; \
- STW %t3, [%dst + offset + 0x18] ASINORMAL;
-
-#define MOVE_BIGALIGNCHUNK(src, dst, offset, t0, t1, t2, t3) \
- ASI_SETSRC_NOBLK \
- LDX [%src + offset + 0x00] ASINORMAL, %t0; \
- LDX [%src + offset + 0x08] ASINORMAL, %t1; \
- LDX [%src + offset + 0x10] ASINORMAL, %t2; \
- LDX [%src + offset + 0x18] ASINORMAL, %t3; \
- ASI_SETDST_NOBLK \
- STX %t0, [%dst + offset + 0x00] ASINORMAL; \
- STX %t1, [%dst + offset + 0x08] ASINORMAL; \
- STX %t2, [%dst + offset + 0x10] ASINORMAL; \
- STX %t3, [%dst + offset + 0x18] ASINORMAL; \
- ASI_SETSRC_NOBLK \
- LDX [%src + offset + 0x20] ASINORMAL, %t0; \
- LDX [%src + offset + 0x28] ASINORMAL, %t1; \
- LDX [%src + offset + 0x30] ASINORMAL, %t2; \
- LDX [%src + offset + 0x38] ASINORMAL, %t3; \
- ASI_SETDST_NOBLK \
- STX %t0, [%dst + offset + 0x20] ASINORMAL; \
- STX %t1, [%dst + offset + 0x28] ASINORMAL; \
- STX %t2, [%dst + offset + 0x30] ASINORMAL; \
- STX %t3, [%dst + offset + 0x38] ASINORMAL;
-
-#define MOVE_LASTCHUNK(src, dst, offset, t0, t1, t2, t3) \
- ASI_SETSRC_NOBLK \
- LDX [%src - offset - 0x10] ASINORMAL, %t0; \
- LDX [%src - offset - 0x08] ASINORMAL, %t1; \
- ASI_SETDST_NOBLK \
- STW %t0, [%dst - offset - 0x0c] ASINORMAL; \
- srlx %t0, 32, %t2; \
- STW %t2, [%dst - offset - 0x10] ASINORMAL; \
- STW %t1, [%dst - offset - 0x04] ASINORMAL; \
- srlx %t1, 32, %t3; \
- STW %t3, [%dst - offset - 0x08] ASINORMAL;
-
-#define MOVE_LASTALIGNCHUNK(src, dst, offset, t0, t1) \
- ASI_SETSRC_NOBLK \
- LDX [%src - offset - 0x10] ASINORMAL, %t0; \
- LDX [%src - offset - 0x08] ASINORMAL, %t1; \
- ASI_SETDST_NOBLK \
- STX %t0, [%dst - offset - 0x10] ASINORMAL; \
- STX %t1, [%dst - offset - 0x08] ASINORMAL;
-
-#else /* !REGS_64BIT */
-
-#define MOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3) \
- lduw [%src + offset + 0x00], %t0; \
- lduw [%src + offset + 0x04], %t1; \
- lduw [%src + offset + 0x08], %t2; \
- lduw [%src + offset + 0x0c], %t3; \
- stw %t0, [%dst + offset + 0x00]; \
- stw %t1, [%dst + offset + 0x04]; \
- stw %t2, [%dst + offset + 0x08]; \
- stw %t3, [%dst + offset + 0x0c]; \
- lduw [%src + offset + 0x10], %t0; \
- lduw [%src + offset + 0x14], %t1; \
- lduw [%src + offset + 0x18], %t2; \
- lduw [%src + offset + 0x1c], %t3; \
- stw %t0, [%dst + offset + 0x10]; \
- stw %t1, [%dst + offset + 0x14]; \
- stw %t2, [%dst + offset + 0x18]; \
- stw %t3, [%dst + offset + 0x1c];
-
-#define MOVE_LASTCHUNK(src, dst, offset, t0, t1, t2, t3) \
- lduw [%src - offset - 0x10], %t0; \
- lduw [%src - offset - 0x0c], %t1; \
- lduw [%src - offset - 0x08], %t2; \
- lduw [%src - offset - 0x04], %t3; \
- stw %t0, [%dst - offset - 0x10]; \
- stw %t1, [%dst - offset - 0x0c]; \
- stw %t2, [%dst - offset - 0x08]; \
- stw %t3, [%dst - offset - 0x04];
-
-#endif /* !REGS_64BIT */
-
-#ifdef __KERNEL__
- .section __ex_table,#alloc
- .section .fixup,#alloc,#execinstr
-#endif
-
- .text
- .align 32
- .globl memcpy
- .type memcpy,@function
-
- .globl bcopy
- .type bcopy,@function
-
-#ifdef __KERNEL__
-memcpy_private:
-memcpy: mov ASI_P, asi_src ! IEU0 Group
- brnz,pt %o2, __memcpy_entry ! CTI
- mov ASI_P, asi_dest ! IEU1
- retl
- clr %o0
-
- .align 32
- .globl __copy_from_user
- .type __copy_from_user,@function
-__copy_from_user:rd %asi, asi_src ! IEU0 Group
- brnz,pt %o2, __memcpy_entry ! CTI
- mov ASI_P, asi_dest ! IEU1
-
- .globl __copy_to_user
- .type __copy_to_user,@function
-__copy_to_user: mov ASI_P, asi_src ! IEU0 Group
- brnz,pt %o2, __memcpy_entry ! CTI
- rd %asi, asi_dest ! IEU1
- retl ! CTI Group
- clr %o0 ! IEU0 Group
-
- .globl __copy_in_user
- .type __copy_in_user,@function
-__copy_in_user: rd %asi, asi_src ! IEU0 Group
- brnz,pt %o2, __memcpy_entry ! CTI
- mov asi_src, asi_dest ! IEU1
- retl ! CTI Group
- clr %o0 ! IEU0 Group
-#endif
-
-bcopy: or %o0, 0, %g3 ! IEU0 Group
- addcc %o1, 0, %o0 ! IEU1
- brgez,pt %o2, memcpy_private ! CTI
- or %g3, 0, %o1 ! IEU0 Group
- retl ! CTI Group brk forced
- clr %o0 ! IEU0
-
-
-#ifdef __KERNEL__
-#define BRANCH_ALWAYS 0x10680000
-#define NOP 0x01000000
-#define ULTRA3_DO_PATCH(OLD, NEW) \
- sethi %hi(NEW), %g1; \
- or %g1, %lo(NEW), %g1; \
- sethi %hi(OLD), %g2; \
- or %g2, %lo(OLD), %g2; \
- sub %g1, %g2, %g1; \
- sethi %hi(BRANCH_ALWAYS), %g3; \
- srl %g1, 2, %g1; \
- or %g3, %lo(BRANCH_ALWAYS), %g3; \
- or %g3, %g1, %g3; \
- stw %g3, [%g2]; \
- sethi %hi(NOP), %g3; \
- or %g3, %lo(NOP), %g3; \
- stw %g3, [%g2 + 0x4]; \
- flush %g2;
-
- .globl cheetah_patch_copyops
-cheetah_patch_copyops:
- ULTRA3_DO_PATCH(memcpy, U3memcpy)
- ULTRA3_DO_PATCH(__copy_from_user, U3copy_from_user)
- ULTRA3_DO_PATCH(__copy_to_user, U3copy_to_user)
- ULTRA3_DO_PATCH(__copy_in_user, U3copy_in_user)
- retl
- nop
-#undef BRANCH_ALWAYS
-#undef NOP
-#undef ULTRA3_DO_PATCH
-#endif /* __KERNEL__ */
-
- .align 32
-#ifdef __KERNEL__
- andcc %o0, 7, %g2 ! IEU1 Group
-#endif
-VIS_enter:
- be,pt %xcc, dest_is_8byte_aligned ! CTI
-#ifdef __KERNEL__
- nop ! IEU0 Group
-#else
- andcc %o0, 0x38, %g5 ! IEU1 Group
-#endif
-do_dest_8byte_align:
- mov 8, %g1 ! IEU0
- sub %g1, %g2, %g2 ! IEU0 Group
- andcc %o0, 1, %g0 ! IEU1
- be,pt %icc, 2f ! CTI
- sub %o2, %g2, %o2 ! IEU0 Group
-1: ASI_SETSRC_NOBLK ! LSU Group
- EX(LDUB [%o1] ASINORMAL, %o5,
- add %o2, %g2) ! Load Group
- add %o1, 1, %o1 ! IEU0
- add %o0, 1, %o0 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- subcc %g2, 1, %g2 ! IEU1 Group
- be,pn %xcc, 3f ! CTI
- EX2(STB %o5, [%o0 - 1] ASINORMAL,
- add %g2, 1, %g2,
- add %o2, %g2) ! Store
-2: ASI_SETSRC_NOBLK ! LSU Group
- EX(LDUB [%o1] ASINORMAL, %o5,
- add %o2, %g2) ! Load Group
- add %o0, 2, %o0 ! IEU0
- EX2(LDUB [%o1 + 1] ASINORMAL, %g3,
- sub %o0, 2, %o0,
- add %o2, %g2) ! Load Group
- ASI_SETDST_NOBLK ! LSU Group
- subcc %g2, 2, %g2 ! IEU1 Group
- EX2(STB %o5, [%o0 - 2] ASINORMAL,
- add %g2, 2, %g2,
- add %o2, %g2) ! Store
- add %o1, 2, %o1 ! IEU0
- bne,pt %xcc, 2b ! CTI Group
- EX2(STB %g3, [%o0 - 1] ASINORMAL,
- add %g2, 1, %g2,
- add %o2, %g2) ! Store
-#ifdef __KERNEL__
-3:
-dest_is_8byte_aligned:
- VISEntry
- andcc %o0, 0x38, %g5 ! IEU1 Group
-#else
-3: andcc %o0, 0x38, %g5 ! IEU1 Group
-dest_is_8byte_aligned:
-#endif
- be,pt %icc, dest_is_64byte_aligned ! CTI
- mov 64, %g1 ! IEU0
- fmovd %f0, %f2 ! FPU
- sub %g1, %g5, %g5 ! IEU0 Group
- ASI_SETSRC_NOBLK ! LSU Group
- alignaddr %o1, %g0, %g1 ! GRU Group
- EXO2(LDDF [%g1] ASINORMAL, %f4) ! Load Group
- sub %o2, %g5, %o2 ! IEU0
-1: EX(LDDF [%g1 + 0x8] ASINORMAL, %f6,
- add %o2, %g5) ! Load Group
- add %g1, 0x8, %g1 ! IEU0 Group
- subcc %g5, 8, %g5 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- faligndata %f4, %f6, %f0 ! GRU Group
- EX2(STDF %f0, [%o0] ASINORMAL,
- add %g5, 8, %g5,
- add %o2, %g5) ! Store
- add %o1, 8, %o1 ! IEU0 Group
- be,pn %xcc, dest_is_64byte_aligned ! CTI
- add %o0, 8, %o0 ! IEU1
- ASI_SETSRC_NOBLK ! LSU Group
- EX(LDDF [%g1 + 0x8] ASINORMAL, %f4,
- add %o2, %g5) ! Load Group
- add %g1, 8, %g1 ! IEU0
- subcc %g5, 8, %g5 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- faligndata %f6, %f4, %f0 ! GRU Group
- EX2(STDF %f0, [%o0] ASINORMAL,
- add %g5, 8, %g5,
- add %o2, %g5) ! Store
- add %o1, 8, %o1 ! IEU0
- ASI_SETSRC_NOBLK ! LSU Group
- bne,pt %xcc, 1b ! CTI Group
- add %o0, 8, %o0 ! IEU0
-dest_is_64byte_aligned:
- membar #LoadStore | #StoreStore | #StoreLoad ! LSU Group
-#ifndef __KERNEL__
- wr %g0, ASI_BLK_P, %asi ! LSU Group
-#endif
- subcc %o2, 0x40, %g7 ! IEU1 Group
- mov %o1, %g1 ! IEU0
- andncc %g7, (0x40 - 1), %g7 ! IEU1 Group
- srl %g1, 3, %g2 ! IEU0
- sub %o2, %g7, %g3 ! IEU0 Group
- andn %o1, (0x40 - 1), %o1 ! IEU1
- and %g2, 7, %g2 ! IEU0 Group
- andncc %g3, 0x7, %g3 ! IEU1
- fmovd %f0, %f2 ! FPU
- sub %g3, 0x10, %g3 ! IEU0 Group
- sub %o2, %g7, %o2 ! IEU1
-#ifdef __KERNEL__
- or asi_src, ASI_BLK_OR, asi_src ! IEU0 Group
- or asi_dest, ASI_BLK_OR, asi_dest ! IEU1
-#endif
- alignaddr %g1, %g0, %g0 ! GRU Group
- add %g1, %g7, %g1 ! IEU0 Group
- subcc %o2, %g3, %o2 ! IEU1
- ASI_SETSRC_BLK ! LSU Group
- EXVIS1(LDBLK [%o1 + 0x00] ASIBLK, %f0) ! LSU Group
- add %g1, %g3, %g1 ! IEU0
- EXVIS1(LDBLK [%o1 + 0x40] ASIBLK, %f16) ! LSU Group
- sub %g7, 0x80, %g7 ! IEU0
- EXVIS(LDBLK [%o1 + 0x80] ASIBLK, %f32) ! LSU Group
-#ifdef __KERNEL__
-vispc: sll %g2, 9, %g2 ! IEU0 Group
- sethi %hi(vis00), %g5 ! IEU1
- or %g5, %lo(vis00), %g5 ! IEU0 Group
- jmpl %g5 + %g2, %g0 ! CTI Group brk forced
- addcc %o1, 0xc0, %o1 ! IEU1 Group
-#else
- ! Clk1 Group 8-(
- ! Clk2 Group 8-(
- ! Clk3 Group 8-(
- ! Clk4 Group 8-(
-vispc: rd %pc, %g5 ! PDU Group 8-(
- addcc %g5, %lo(vis00 - vispc), %g5 ! IEU1 Group
- sll %g2, 9, %g2 ! IEU0
- jmpl %g5 + %g2, %g0 ! CTI Group brk forced
- addcc %o1, 0xc0, %o1 ! IEU1 Group
-#endif
- .align 512 /* OK, here comes the fun part... */
-vis00:FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16) LOOP_CHUNK1(o1, o0, g7, vis01)
- FREG_FROB(f16,f18,f20,f22,f24,f26,f28,f30,f32) LOOP_CHUNK2(o1, o0, g7, vis02)
- FREG_FROB(f32,f34,f36,f38,f40,f42,f44,f46,f0) LOOP_CHUNK3(o1, o0, g7, vis03)
- b,pt %xcc, vis00+4; faligndata %f0, %f2, %f48
-vis01:FREG_FROB(f16,f18,f20,f22,f24,f26,f28,f30,f32) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f32,f34,f36,f38,f40,f42,f44,f46,f0) STORE_JUMP(o0, f48, finish_f0) membar #Sync
-vis02:FREG_FROB(f32,f34,f36,f38,f40,f42,f44,f46,f0) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16) STORE_JUMP(o0, f48, finish_f16) membar #Sync
-vis03:FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f16,f18,f20,f22,f24,f26,f28,f30,f32) STORE_JUMP(o0, f48, finish_f32) membar #Sync
- VISLOOP_PAD
-vis10:FREG_FROB(f2, f4, f6, f8, f10,f12,f14,f16,f18) LOOP_CHUNK1(o1, o0, g7, vis11)
- FREG_FROB(f18,f20,f22,f24,f26,f28,f30,f32,f34) LOOP_CHUNK2(o1, o0, g7, vis12)
- FREG_FROB(f34,f36,f38,f40,f42,f44,f46,f0, f2) LOOP_CHUNK3(o1, o0, g7, vis13)
- b,pt %xcc, vis10+4; faligndata %f2, %f4, %f48
-vis11:FREG_FROB(f18,f20,f22,f24,f26,f28,f30,f32,f34) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f34,f36,f38,f40,f42,f44,f46,f0, f2) STORE_JUMP(o0, f48, finish_f2) membar #Sync
-vis12:FREG_FROB(f34,f36,f38,f40,f42,f44,f46,f0, f2) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f2, f4, f6, f8, f10,f12,f14,f16,f18) STORE_JUMP(o0, f48, finish_f18) membar #Sync
-vis13:FREG_FROB(f2, f4, f6, f8, f10,f12,f14,f16,f18) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f18,f20,f22,f24,f26,f28,f30,f32,f34) STORE_JUMP(o0, f48, finish_f34) membar #Sync
- VISLOOP_PAD
-vis20:FREG_FROB(f4, f6, f8, f10,f12,f14,f16,f18,f20) LOOP_CHUNK1(o1, o0, g7, vis21)
- FREG_FROB(f20,f22,f24,f26,f28,f30,f32,f34,f36) LOOP_CHUNK2(o1, o0, g7, vis22)
- FREG_FROB(f36,f38,f40,f42,f44,f46,f0, f2, f4) LOOP_CHUNK3(o1, o0, g7, vis23)
- b,pt %xcc, vis20+4; faligndata %f4, %f6, %f48
-vis21:FREG_FROB(f20,f22,f24,f26,f28,f30,f32,f34,f36) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f36,f38,f40,f42,f44,f46,f0, f2, f4) STORE_JUMP(o0, f48, finish_f4) membar #Sync
-vis22:FREG_FROB(f36,f38,f40,f42,f44,f46,f0, f2, f4) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f4, f6, f8, f10,f12,f14,f16,f18,f20) STORE_JUMP(o0, f48, finish_f20) membar #Sync
-vis23:FREG_FROB(f4, f6, f8, f10,f12,f14,f16,f18,f20) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f20,f22,f24,f26,f28,f30,f32,f34,f36) STORE_JUMP(o0, f48, finish_f36) membar #Sync
- VISLOOP_PAD
-vis30:FREG_FROB(f6, f8, f10,f12,f14,f16,f18,f20,f22) LOOP_CHUNK1(o1, o0, g7, vis31)
- FREG_FROB(f22,f24,f26,f28,f30,f32,f34,f36,f38) LOOP_CHUNK2(o1, o0, g7, vis32)
- FREG_FROB(f38,f40,f42,f44,f46,f0, f2, f4, f6) LOOP_CHUNK3(o1, o0, g7, vis33)
- b,pt %xcc, vis30+4; faligndata %f6, %f8, %f48
-vis31:FREG_FROB(f22,f24,f26,f28,f30,f32,f34,f36,f38) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f38,f40,f42,f44,f46,f0, f2, f4, f6) STORE_JUMP(o0, f48, finish_f6) membar #Sync
-vis32:FREG_FROB(f38,f40,f42,f44,f46,f0, f2, f4, f6) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f6, f8, f10,f12,f14,f16,f18,f20,f22) STORE_JUMP(o0, f48, finish_f22) membar #Sync
-vis33:FREG_FROB(f6, f8, f10,f12,f14,f16,f18,f20,f22) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f22,f24,f26,f28,f30,f32,f34,f36,f38) STORE_JUMP(o0, f48, finish_f38) membar #Sync
- VISLOOP_PAD
-vis40:FREG_FROB(f8, f10,f12,f14,f16,f18,f20,f22,f24) LOOP_CHUNK1(o1, o0, g7, vis41)
- FREG_FROB(f24,f26,f28,f30,f32,f34,f36,f38,f40) LOOP_CHUNK2(o1, o0, g7, vis42)
- FREG_FROB(f40,f42,f44,f46,f0, f2, f4, f6, f8) LOOP_CHUNK3(o1, o0, g7, vis43)
- b,pt %xcc, vis40+4; faligndata %f8, %f10, %f48
-vis41:FREG_FROB(f24,f26,f28,f30,f32,f34,f36,f38,f40) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f40,f42,f44,f46,f0, f2, f4, f6, f8) STORE_JUMP(o0, f48, finish_f8) membar #Sync
-vis42:FREG_FROB(f40,f42,f44,f46,f0, f2, f4, f6, f8) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f8, f10,f12,f14,f16,f18,f20,f22,f24) STORE_JUMP(o0, f48, finish_f24) membar #Sync
-vis43:FREG_FROB(f8, f10,f12,f14,f16,f18,f20,f22,f24) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f24,f26,f28,f30,f32,f34,f36,f38,f40) STORE_JUMP(o0, f48, finish_f40) membar #Sync
- VISLOOP_PAD
-vis50:FREG_FROB(f10,f12,f14,f16,f18,f20,f22,f24,f26) LOOP_CHUNK1(o1, o0, g7, vis51)
- FREG_FROB(f26,f28,f30,f32,f34,f36,f38,f40,f42) LOOP_CHUNK2(o1, o0, g7, vis52)
- FREG_FROB(f42,f44,f46,f0, f2, f4, f6, f8, f10) LOOP_CHUNK3(o1, o0, g7, vis53)
- b,pt %xcc, vis50+4; faligndata %f10, %f12, %f48
-vis51:FREG_FROB(f26,f28,f30,f32,f34,f36,f38,f40,f42) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f42,f44,f46,f0, f2, f4, f6, f8, f10) STORE_JUMP(o0, f48, finish_f10) membar #Sync
-vis52:FREG_FROB(f42,f44,f46,f0, f2, f4, f6, f8, f10) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f10,f12,f14,f16,f18,f20,f22,f24,f26) STORE_JUMP(o0, f48, finish_f26) membar #Sync
-vis53:FREG_FROB(f10,f12,f14,f16,f18,f20,f22,f24,f26) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f26,f28,f30,f32,f34,f36,f38,f40,f42) STORE_JUMP(o0, f48, finish_f42) membar #Sync
- VISLOOP_PAD
-vis60:FREG_FROB(f12,f14,f16,f18,f20,f22,f24,f26,f28) LOOP_CHUNK1(o1, o0, g7, vis61)
- FREG_FROB(f28,f30,f32,f34,f36,f38,f40,f42,f44) LOOP_CHUNK2(o1, o0, g7, vis62)
- FREG_FROB(f44,f46,f0, f2, f4, f6, f8, f10,f12) LOOP_CHUNK3(o1, o0, g7, vis63)
- b,pt %xcc, vis60+4; faligndata %f12, %f14, %f48
-vis61:FREG_FROB(f28,f30,f32,f34,f36,f38,f40,f42,f44) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f44,f46,f0, f2, f4, f6, f8, f10,f12) STORE_JUMP(o0, f48, finish_f12) membar #Sync
-vis62:FREG_FROB(f44,f46,f0, f2, f4, f6, f8, f10,f12) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f12,f14,f16,f18,f20,f22,f24,f26,f28) STORE_JUMP(o0, f48, finish_f28) membar #Sync
-vis63:FREG_FROB(f12,f14,f16,f18,f20,f22,f24,f26,f28) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f28,f30,f32,f34,f36,f38,f40,f42,f44) STORE_JUMP(o0, f48, finish_f44) membar #Sync
- VISLOOP_PAD
-vis70:FREG_FROB(f14,f16,f18,f20,f22,f24,f26,f28,f30) LOOP_CHUNK1(o1, o0, g7, vis71)
- FREG_FROB(f30,f32,f34,f36,f38,f40,f42,f44,f46) LOOP_CHUNK2(o1, o0, g7, vis72)
- FREG_FROB(f46,f0, f2, f4, f6, f8, f10,f12,f14) LOOP_CHUNK3(o1, o0, g7, vis73)
- b,pt %xcc, vis70+4; faligndata %f14, %f16, %f48
-vis71:FREG_FROB(f30,f32,f34,f36,f38,f40,f42,f44,f46) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f46,f0, f2, f4, f6, f8, f10,f12,f14) STORE_JUMP(o0, f48, finish_f14) membar #Sync
-vis72:FREG_FROB(f46,f0, f2, f4, f6, f8, f10,f12,f14) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f14,f16,f18,f20,f22,f24,f26,f28,f30) STORE_JUMP(o0, f48, finish_f30) membar #Sync
-vis73:FREG_FROB(f14,f16,f18,f20,f22,f24,f26,f28,f30) STORE_SYNC(o0, f48) membar #Sync
- FREG_FROB(f30,f32,f34,f36,f38,f40,f42,f44,f46) STORE_JUMP(o0, f48, finish_f46) membar #Sync
- VISLOOP_PAD
-finish_f0: FINISH_VISCHUNK(o0, f0, f2, g3)
-finish_f2: FINISH_VISCHUNK(o0, f2, f4, g3)
-finish_f4: FINISH_VISCHUNK(o0, f4, f6, g3)
-finish_f6: FINISH_VISCHUNK(o0, f6, f8, g3)
-finish_f8: FINISH_VISCHUNK(o0, f8, f10, g3)
-finish_f10: FINISH_VISCHUNK(o0, f10, f12, g3)
-finish_f12: FINISH_VISCHUNK(o0, f12, f14, g3)
-finish_f14: UNEVEN_VISCHUNK(o0, f14, f0, g3)
-finish_f16: FINISH_VISCHUNK(o0, f16, f18, g3)
-finish_f18: FINISH_VISCHUNK(o0, f18, f20, g3)
-finish_f20: FINISH_VISCHUNK(o0, f20, f22, g3)
-finish_f22: FINISH_VISCHUNK(o0, f22, f24, g3)
-finish_f24: FINISH_VISCHUNK(o0, f24, f26, g3)
-finish_f26: FINISH_VISCHUNK(o0, f26, f28, g3)
-finish_f28: FINISH_VISCHUNK(o0, f28, f30, g3)
-finish_f30: UNEVEN_VISCHUNK(o0, f30, f0, g3)
-finish_f32: FINISH_VISCHUNK(o0, f32, f34, g3)
-finish_f34: FINISH_VISCHUNK(o0, f34, f36, g3)
-finish_f36: FINISH_VISCHUNK(o0, f36, f38, g3)
-finish_f38: FINISH_VISCHUNK(o0, f38, f40, g3)
-finish_f40: FINISH_VISCHUNK(o0, f40, f42, g3)
-finish_f42: FINISH_VISCHUNK(o0, f42, f44, g3)
-finish_f44: FINISH_VISCHUNK(o0, f44, f46, g3)
-finish_f46: UNEVEN_VISCHUNK_LAST(o0, f46, f0, g3)
-vis_out_slk:
-#ifdef __KERNEL__
- srl asi_src, 3, %g5 ! IEU0 Group
- xor asi_src, ASI_BLK_XOR1, asi_src ! IEU1
- xor asi_src, %g5, asi_src ! IEU0 Group
-#endif
-vis_slk:ASI_SETSRC_NOBLK ! LSU Group
- EXVIS3(LDDF [%o1] ASINORMAL, %f2) ! Load Group
- add %o1, 8, %o1 ! IEU0
- subcc %g3, 8, %g3 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- faligndata %f0, %f2, %f8 ! GRU Group
- EXVIS4(STDF %f8, [%o0] ASINORMAL) ! Store
- bl,pn %xcc, vis_out_slp ! CTI
- add %o0, 8, %o0 ! IEU0 Group
- ASI_SETSRC_NOBLK ! LSU Group
- EXVIS3(LDDF [%o1] ASINORMAL, %f0) ! Load Group
- add %o1, 8, %o1 ! IEU0
- subcc %g3, 8, %g3 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- faligndata %f2, %f0, %f8 ! GRU Group
- EXVIS4(STDF %f8, [%o0] ASINORMAL) ! Store
- bge,pt %xcc, vis_slk ! CTI
- add %o0, 8, %o0 ! IEU0 Group
-vis_out_slp:
-#ifdef __KERNEL__
- brz,pt %o2, vis_ret ! CTI Group
- mov %g1, %o1 ! IEU0
- ba,pt %xcc, vis_slp+4 ! CTI Group
- ASI_SETSRC_NOBLK ! LSU Group
-#endif
-vis_out:brz,pt %o2, vis_ret ! CTI Group
- mov %g1, %o1 ! IEU0
-#ifdef __KERNEL__
- srl asi_src, 3, %g5 ! IEU0 Group
- xor asi_src, ASI_BLK_XOR1, asi_src ! IEU1
- xor asi_src, %g5, asi_src ! IEU0 Group
-#endif
-vis_slp:ASI_SETSRC_NOBLK ! LSU Group
- EXO2(LDUB [%o1] ASINORMAL, %g5) ! LOAD
- add %o1, 1, %o1 ! IEU0
- add %o0, 1, %o0 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- subcc %o2, 1, %o2 ! IEU1
- bne,pt %xcc, vis_slp ! CTI
- EX(STB %g5, [%o0 - 1] ASINORMAL,
- add %o2, 1) ! Store Group
-vis_ret:membar #StoreLoad | #StoreStore ! LSU Group
- FPU_CLEAN_RETL
-
-
-__memcpy_short:
- andcc %o2, 1, %g0 ! IEU1 Group
- be,pt %icc, 2f ! CTI
-1: ASI_SETSRC_NOBLK ! LSU Group
- EXO2(LDUB [%o1] ASINORMAL, %g5) ! LOAD Group
- add %o1, 1, %o1 ! IEU0
- add %o0, 1, %o0 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- subcc %o2, 1, %o2 ! IEU1 Group
- be,pn %xcc, short_ret ! CTI
- EX(STB %g5, [%o0 - 1] ASINORMAL,
- add %o2, 1) ! Store
-2: ASI_SETSRC_NOBLK ! LSU Group
- EXO2(LDUB [%o1] ASINORMAL, %g5) ! LOAD Group
- add %o0, 2, %o0 ! IEU0
- EX2(LDUB [%o1 + 1] ASINORMAL, %o5,
- sub %o0, 2, %o0,
- add %o2, %g0) ! LOAD Group
- add %o1, 2, %o1 ! IEU0
- ASI_SETDST_NOBLK ! LSU Group
- subcc %o2, 2, %o2 ! IEU1 Group
- EX(STB %g5, [%o0 - 2] ASINORMAL,
- add %o2, 2) ! Store
- bne,pt %xcc, 2b ! CTI
- EX(STB %o5, [%o0 - 1] ASINORMAL,
- add %o2, 1) ! Store
-short_ret:
- NORMAL_RETL
-
-#ifndef __KERNEL__
-memcpy_private:
-memcpy:
-#ifndef REGS_64BIT
- srl %o2, 0, %o2 ! IEU1 Group
-#endif
- brz,pn %o2, short_ret ! CTI Group
- mov %o0, %g6 ! IEU0
-#endif
-__memcpy_entry:
- cmp %o2, 15 ! IEU1 Group
- bleu,pn %xcc, __memcpy_short ! CTI
- cmp %o2, (64 * 6) ! IEU1 Group
- bgeu,pn %xcc, VIS_enter ! CTI
- andcc %o0, 7, %g2 ! IEU1 Group
- sub %o0, %o1, %g5 ! IEU0
- andcc %g5, 3, %o5 ! IEU1 Group
- bne,pn %xcc, memcpy_noVIS_misaligned ! CTI
- andcc %o1, 3, %g0 ! IEU1 Group
-#ifdef REGS_64BIT
- be,a,pt %xcc, 3f ! CTI
- andcc %o1, 4, %g0 ! IEU1 Group
- andcc %o1, 1, %g0 ! IEU1 Group
-#else /* !REGS_64BIT */
- be,pt %xcc, 5f ! CTI
- andcc %o1, 1, %g0 ! IEU1 Group
-#endif /* !REGS_64BIT */
- be,pn %xcc, 4f ! CTI
- andcc %o1, 2, %g0 ! IEU1 Group
- ASI_SETSRC_NOBLK ! LSU Group
- EXO2(LDUB [%o1] ASINORMAL, %g2) ! Load Group
- add %o1, 1, %o1 ! IEU0
- add %o0, 1, %o0 ! IEU1
- sub %o2, 1, %o2 ! IEU0 Group
- ASI_SETDST_NOBLK ! LSU Group
- bne,pn %xcc, 5f ! CTI Group
- EX(STB %g2, [%o0 - 1] ASINORMAL,
- add %o2, 1) ! Store
-4: ASI_SETSRC_NOBLK ! LSU Group
- EXO2(LDUH [%o1] ASINORMAL, %g2) ! Load Group
- add %o1, 2, %o1 ! IEU0
- add %o0, 2, %o0 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- sub %o2, 2, %o2 ! IEU0
- EX(STH %g2, [%o0 - 2] ASINORMAL,
- add %o2, 2) ! Store Group + bubble
-#ifdef REGS_64BIT
-5: andcc %o1, 4, %g0 ! IEU1
-3: be,a,pn %xcc, 2f ! CTI
- andcc %o2, -128, %g7 ! IEU1 Group
- ASI_SETSRC_NOBLK ! LSU Group
- EXO2(LDUW [%o1] ASINORMAL, %g5) ! Load Group
- add %o1, 4, %o1 ! IEU0
- add %o0, 4, %o0 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- sub %o2, 4, %o2 ! IEU0 Group
- EX(STW %g5, [%o0 - 4] ASINORMAL,
- add %o2, 4) ! Store
- andcc %o2, -128, %g7 ! IEU1 Group
-2: be,pn %xcc, 3f ! CTI
- andcc %o0, 4, %g0 ! IEU1 Group
- be,pn %xcc, 82f + 4 ! CTI Group
-#else /* !REGS_64BIT */
-5: andcc %o2, -128, %g7 ! IEU1
- be,a,pn %xcc, 41f ! CTI
- andcc %o2, 0x70, %g7 ! IEU1 Group
-#endif /* !REGS_64BIT */
-5: MOVE_BIGCHUNK(o1, o0, 0x00, g1, g3, g5, o5)
- MOVE_BIGCHUNK(o1, o0, 0x20, g1, g3, g5, o5)
- MOVE_BIGCHUNK(o1, o0, 0x40, g1, g3, g5, o5)
- MOVE_BIGCHUNK(o1, o0, 0x60, g1, g3, g5, o5)
- EXT(5b,35f,VIScopyfixup1)
-35: subcc %g7, 128, %g7 ! IEU1 Group
- add %o1, 128, %o1 ! IEU0
- bne,pt %xcc, 5b ! CTI
- add %o0, 128, %o0 ! IEU0 Group
-3: andcc %o2, 0x70, %g7 ! IEU1 Group
-41: be,pn %xcc, 80f ! CTI
- andcc %o2, 8, %g0 ! IEU1 Group
-#ifdef __KERNEL__
-79: sethi %hi(80f), %o5 ! IEU0
- sll %g7, 1, %g5 ! IEU0 Group
- add %o1, %g7, %o1 ! IEU1
- srl %g7, 1, %g2 ! IEU0 Group
- sub %o5, %g5, %o5 ! IEU1
- sub %o5, %g2, %o5 ! IEU0 Group
- jmpl %o5 + %lo(80f), %g0 ! CTI Group brk forced
- add %o0, %g7, %o0 ! IEU0 Group
-#else
- ! Clk1 8-(
- ! Clk2 8-(
- ! Clk3 8-(
- ! Clk4 8-(
-79: rd %pc, %o5 ! PDU Group
- sll %g7, 1, %g5 ! IEU0 Group
- add %o1, %g7, %o1 ! IEU1
- sub %o5, %g5, %o5 ! IEU0 Group
- jmpl %o5 + %lo(80f - 79b), %g0 ! CTI Group brk forced
- add %o0, %g7, %o0 ! IEU0 Group
-#endif
-36: MOVE_LASTCHUNK(o1, o0, 0x60, g2, g3, g5, o5)
- MOVE_LASTCHUNK(o1, o0, 0x50, g2, g3, g5, o5)
- MOVE_LASTCHUNK(o1, o0, 0x40, g2, g3, g5, o5)
- MOVE_LASTCHUNK(o1, o0, 0x30, g2, g3, g5, o5)
- MOVE_LASTCHUNK(o1, o0, 0x20, g2, g3, g5, o5)
- MOVE_LASTCHUNK(o1, o0, 0x10, g2, g3, g5, o5)
- MOVE_LASTCHUNK(o1, o0, 0x00, g2, g3, g5, o5)
- EXT(36b,80f,VIScopyfixup2)
-80: be,pt %xcc, 81f ! CTI
- andcc %o2, 4, %g0 ! IEU1
-#ifdef REGS_64BIT
- ASI_SETSRC_NOBLK ! LSU Group
- EX(LDX [%o1] ASINORMAL, %g2,
- and %o2, 0xf) ! Load Group
- add %o0, 8, %o0 ! IEU0
- ASI_SETDST_NOBLK ! LSU Group
- EX(STW %g2, [%o0 - 0x4] ASINORMAL,
- and %o2, 0xf) ! Store Group
- add %o1, 8, %o1 ! IEU1
- srlx %g2, 32, %g2 ! IEU0 Group
- EX2(STW %g2, [%o0 - 0x8] ASINORMAL,
- and %o2, 0xf, %o2,
- sub %o2, 4) ! Store
-#else /* !REGS_64BIT */
- lduw [%o1], %g2 ! Load Group
- add %o0, 8, %o0 ! IEU0
- lduw [%o1 + 0x4], %g3 ! Load Group
- add %o1, 8, %o1 ! IEU0
- stw %g2, [%o0 - 0x8] ! Store Group
- stw %g3, [%o0 - 0x4] ! Store Group
-#endif /* !REGS_64BIT */
-81: be,pt %xcc, 1f ! CTI
- andcc %o2, 2, %g0 ! IEU1 Group
- ASI_SETSRC_NOBLK ! LSU Group
- EX(LDUW [%o1] ASINORMAL, %g2,
- and %o2, 0x7) ! Load Group
- add %o1, 4, %o1 ! IEU0
- ASI_SETDST_NOBLK ! LSU Group
- EX(STW %g2, [%o0] ASINORMAL,
- and %o2, 0x7) ! Store Group
- add %o0, 4, %o0 ! IEU0
-1: be,pt %xcc, 1f ! CTI
- andcc %o2, 1, %g0 ! IEU1 Group
- ASI_SETSRC_NOBLK ! LSU Group
- EX(LDUH [%o1] ASINORMAL, %g2,
- and %o2, 0x3) ! Load Group
- add %o1, 2, %o1 ! IEU0
- ASI_SETDST_NOBLK ! LSU Group
- EX(STH %g2, [%o0] ASINORMAL,
- and %o2, 0x3) ! Store Group
- add %o0, 2, %o0 ! IEU0
-1: be,pt %xcc, normal_retl ! CTI
- nop ! IEU1
- ASI_SETSRC_NOBLK ! LSU Group
- EX(LDUB [%o1] ASINORMAL, %g2,
- add %g0, 1) ! Load Group
- ASI_SETDST_NOBLK ! LSU Group
- EX(STB %g2, [%o0] ASINORMAL,
- add %g0, 1) ! Store Group + bubble
-normal_retl:
- NORMAL_RETL
-
-#ifdef REGS_64BIT
-82: MOVE_BIGALIGNCHUNK(o1, o0, 0x00, g1, g3, g5, o5)
- MOVE_BIGALIGNCHUNK(o1, o0, 0x40, g1, g3, g5, o5)
- EXT(82b,37f,VIScopyfixup3)
-37: subcc %g7, 128, %g7 ! IEU1 Group
- add %o1, 128, %o1 ! IEU0
- bne,pt %xcc, 82b ! CTI
- add %o0, 128, %o0 ! IEU0 Group
- andcc %o2, 0x70, %g7 ! IEU1
- be,pn %xcc, 84f ! CTI
- andcc %o2, 8, %g0 ! IEU1 Group
-#ifdef __KERNEL__
-83: srl %g7, 1, %g5 ! IEU0
- sethi %hi(84f), %o5 ! IEU0 Group
- add %g7, %g5, %g5 ! IEU1
- add %o1, %g7, %o1 ! IEU0 Group
- sub %o5, %g5, %o5 ! IEU1
- jmpl %o5 + %lo(84f), %g0 ! CTI Group brk forced
- add %o0, %g7, %o0 ! IEU0 Group
-#else
- ! Clk1 8-(
- ! Clk2 8-(
- ! Clk3 8-(
- ! Clk4 8-(
-83: rd %pc, %o5 ! PDU Group
- add %o1, %g7, %o1 ! IEU0 Group
- sub %o5, %g7, %o5 ! IEU1
- jmpl %o5 + %lo(84f - 83b), %g0 ! CTI Group brk forced
- add %o0, %g7, %o0 ! IEU0 Group
-#endif
-38: MOVE_LASTALIGNCHUNK(o1, o0, 0x60, g2, g3)
- MOVE_LASTALIGNCHUNK(o1, o0, 0x50, g2, g3)
- MOVE_LASTALIGNCHUNK(o1, o0, 0x40, g2, g3)
- MOVE_LASTALIGNCHUNK(o1, o0, 0x30, g2, g3)
- MOVE_LASTALIGNCHUNK(o1, o0, 0x20, g2, g3)
- MOVE_LASTALIGNCHUNK(o1, o0, 0x10, g2, g3)
- MOVE_LASTALIGNCHUNK(o1, o0, 0x00, g2, g3)
- EXT(38b,84f,VIScopyfixup4)
-84: be,pt %xcc, 85f ! CTI Group
- andcc %o2, 4, %g0 ! IEU1
- ASI_SETSRC_NOBLK ! LSU Group
- EX(LDX [%o1] ASINORMAL, %g2,
- and %o2, 0xf) ! Load Group
- add %o0, 8, %o0 ! IEU0
- ASI_SETDST_NOBLK ! LSU Group
- add %o1, 8, %o1 ! IEU0 Group
- EX(STX %g2, [%o0 - 0x8] ASINORMAL,
- and %o2, 0xf) ! Store
-85: be,pt %xcc, 1f ! CTI
- andcc %o2, 2, %g0 ! IEU1 Group
- ASI_SETSRC_NOBLK ! LSU Group
- EX(LDUW [%o1] ASINORMAL, %g2,
- and %o2, 0x7) ! Load Group
- add %o0, 4, %o0 ! IEU0
- ASI_SETDST_NOBLK ! LSU Group
- add %o1, 4, %o1 ! IEU0 Group
- EX(STW %g2, [%o0 - 0x4] ASINORMAL,
- and %o2, 0x7) ! Store
-1: be,pt %xcc, 1f ! CTI
- andcc %o2, 1, %g0 ! IEU1 Group
- ASI_SETSRC_NOBLK ! LSU Group
- EX(LDUH [%o1] ASINORMAL, %g2,
- and %o2, 0x3) ! Load Group
- add %o0, 2, %o0 ! IEU0
- ASI_SETDST_NOBLK ! LSU Group
- add %o1, 2, %o1 ! IEU0 Group
- EX(STH %g2, [%o0 - 0x2] ASINORMAL,
- and %o2, 0x3) ! Store
-1: be,pt %xcc, 1f ! CTI
- nop ! IEU0 Group
- ASI_SETSRC_NOBLK ! LSU Group
- EX(LDUB [%o1] ASINORMAL, %g2,
- add %g0, 1) ! Load Group
- ASI_SETDST_NOBLK ! LSU Group
- EX(STB %g2, [%o0] ASINORMAL,
- add %g0, 1) ! Store Group + bubble
-1: NORMAL_RETL
-#endif /* REGS_64BIT */
-
-memcpy_noVIS_misaligned:
- brz,pt %g2, 2f ! CTI Group
- mov 8, %g1 ! IEU0
- sub %g1, %g2, %g2 ! IEU0 Group
- sub %o2, %g2, %o2 ! IEU0 Group
-1: ASI_SETSRC_NOBLK ! LSU Group
- EX(LDUB [%o1] ASINORMAL, %g5,
- add %o2, %g2) ! Load Group
- add %o1, 1, %o1 ! IEU0
- add %o0, 1, %o0 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- subcc %g2, 1, %g2 ! IEU1 Group
- bne,pt %xcc, 1b ! CTI
- EX2(STB %g5, [%o0 - 1] ASINORMAL,
- add %o2, %g2, %o2,
- add %o2, 1) ! Store
-2:
-#ifdef __KERNEL__
- VISEntry
-#endif
- andn %o2, 7, %g5 ! IEU0 Group
- and %o2, 7, %o2 ! IEU1
- fmovd %f0, %f2 ! FPU
- ASI_SETSRC_NOBLK ! LSU Group
- alignaddr %o1, %g0, %g1 ! GRU Group
- EXO2(LDDF [%g1] ASINORMAL, %f4) ! Load Group
-1: EX(LDDF [%g1 + 0x8] ASINORMAL, %f6,
- add %o2, %g5) ! Load Group
- add %g1, 0x8, %g1 ! IEU0 Group
- subcc %g5, 8, %g5 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- faligndata %f4, %f6, %f0 ! GRU Group
- EX2(STDF %f0, [%o0] ASINORMAL,
- add %o2, %g5, %o2,
- add %o2, 8) ! Store
- add %o1, 8, %o1 ! IEU0 Group
- be,pn %xcc, end_cruft ! CTI
- add %o0, 8, %o0 ! IEU1
- ASI_SETSRC_NOBLK ! LSU Group
- EX(LDDF [%g1 + 0x8] ASINORMAL, %f4,
- add %o2, %g5) ! Load Group
- add %g1, 8, %g1 ! IEU0
- subcc %g5, 8, %g5 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- faligndata %f6, %f4, %f0 ! GRU Group
- EX2(STDF %f0, [%o0] ASINORMAL,
- add %o2, %g5, %o2,
- add %o2, 8) ! Store
- add %o1, 8, %o1 ! IEU0
- ASI_SETSRC_NOBLK ! LSU Group
- bne,pn %xcc, 1b ! CTI Group
- add %o0, 8, %o0 ! IEU0
-end_cruft:
- brz,pn %o2, fpu_retl ! CTI Group
-#ifndef __KERNEL__
- nop ! IEU0
-#else
- ASI_SETSRC_NOBLK ! LSU Group
-#endif
- EXO2(LDUB [%o1] ASINORMAL, %g5) ! LOAD
- add %o1, 1, %o1 ! IEU0
- add %o0, 1, %o0 ! IEU1
- ASI_SETDST_NOBLK ! LSU Group
- subcc %o2, 1, %o2 ! IEU1
- bne,pt %xcc, vis_slp ! CTI
- EX(STB %g5, [%o0 - 1] ASINORMAL,
- add %o2, 1) ! Store Group
-fpu_retl:
- FPU_RETL
-
-#ifdef __KERNEL__
- .section .fixup
- .align 4
-VIScopyfixup_reto2:
- mov %o2, %o1
-VIScopyfixup_ret:
- /* If this is copy_from_user(), zero out the rest of the
- * kernel buffer.
- */
- ldub [%g6 + TI_CURRENT_DS], %o4
- andcc asi_src, 0x1, %g0
- be,pt %icc, 1f
- VISExit
- andcc asi_dest, 0x1, %g0
- bne,pn %icc, 1f
- nop
- save %sp, -160, %sp
- mov %i0, %o0
- call __bzero
- mov %i1, %o1
- restore
-1: mov %o1, %o0
- retl
- wr %o4, %g0, %asi
-VIScopyfixup1: subcc %g2, 18, %g2
- add %o0, 32, %o0
- bgeu,a,pt %icc, VIScopyfixup1
- sub %g7, 32, %g7
- sub %o0, 32, %o0
- rd %pc, %g5
- add %g2, (18 + 16), %g2
- ldub [%g5 + %g2], %g2
- ba,a,pt %xcc, 2f
-.byte 0, 0, 0, 0, 0, 0, 0, 4, 4, 8, 12, 12, 16, 20, 20, 24, 28, 28
- .align 4
-VIScopyfixup2: mov (7 * 16), %g7
-1: subcc %g2, 10, %g2
- bgeu,a,pt %icc, 1b
- sub %g7, 16, %g7
- sub %o0, %g7, %o0
- rd %pc, %g5
- add %g2, (10 + 16), %g2
- ldub [%g5 + %g2], %g2
- ba,a,pt %xcc, 4f
-.byte 0, 0, 0, 0, 0, 4, 4, 8, 12, 12
- .align 4
-VIScopyfixup3: subcc %g2, 10, %g2
- add %o0, 32, %o0
- bgeu,a,pt %icc, VIScopyfixup3
- sub %g7, 32, %g7
- sub %o0, 32, %o0
- rd %pc, %g5
- add %g2, (10 + 16), %g2
- ldub [%g5 + %g2], %g2
- ba,a,pt %xcc, 2f
-.byte 0, 0, 0, 0, 0, 0, 0, 8, 16, 24
- .align 4
-2: and %o2, 0x7f, %o2
- sub %g7, %g2, %g7
- ba,pt %xcc, VIScopyfixup_ret
- add %g7, %o2, %o1
-VIScopyfixup4: mov (7 * 16), %g7
-3: subcc %g2, 6, %g2
- bgeu,a,pt %icc, 3b
- sub %g7, 16, %g7
- sub %o0, %g7, %o0
- rd %pc, %g5
- add %g2, (6 + 16), %g2
- ldub [%g5 + %g2], %g2
- ba,a,pt %xcc, 4f
-.byte 0, 0, 0, 0, 0, 8
- .align 4
-4: and %o2, 0xf, %o2
- sub %g7, %g2, %g7
- ba,pt %xcc, VIScopyfixup_ret
- add %g7, %o2, %o1
-VIScopyfixup_vis2:
- sub %o2, 0x40, %o2
-VIScopyfixup_vis0:
- add %o2, 0x80, %o2
-VIScopyfixup_vis1:
- add %g7, %g3, %g7
- ba,pt %xcc, VIScopyfixup_ret
- add %o2, %g7, %o1
-VIScopyfixup_vis4:
- add %g3, 8, %g3
-VIScopyfixup_vis3:
- add %g3, 8, %g3
- ba,pt %xcc, VIScopyfixup_ret
- add %o2, %g3, %o1
-#endif
-
-#ifdef __KERNEL__
- .text
- .align 32
-
- .globl __memmove
- .type __memmove,@function
-
- .globl memmove
- .type memmove,@function
-
-memmove:
-__memmove: cmp %o0, %o1
- blu,pt %xcc, memcpy_private
- sub %o0, %o1, %g5
- add %o1, %o2, %g3
- cmp %g3, %o0
- bleu,pt %xcc, memcpy_private
- add %o1, %o2, %g5
- add %o0, %o2, %o5
-
- sub %g5, 1, %o1
- sub %o5, 1, %o0
-1: ldub [%o1], %g5
- subcc %o2, 1, %o2
- sub %o1, 1, %o1
- stb %g5, [%o0]
- bne,pt %icc, 1b
- sub %o0, 1, %o0
-
- retl
- clr %o0
-#endif
+++ /dev/null
-/* $Id: blockops.S,v 1.42 2002/02/09 19:49:30 davem Exp $
- * blockops.S: UltraSparc block zero optimized routines.
- *
- * Copyright (C) 1996, 1998, 1999, 2000 David S. Miller (davem@redhat.com)
- * Copyright (C) 1997 Jakub Jelinek (jakub@redhat.com)
- */
-
-#include "VIS.h"
-#include <asm/visasm.h>
-#include <asm/thread_info.h>
-#include <asm/page.h>
-#include <asm/dcu.h>
-#include <asm/spitfire.h>
-#include <asm/pgtable.h>
-
-#define TOUCH(reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7) \
- fmovd %reg0, %f48; fmovd %reg1, %f50; \
- fmovd %reg2, %f52; fmovd %reg3, %f54; \
- fmovd %reg4, %f56; fmovd %reg5, %f58; \
- fmovd %reg6, %f60; fmovd %reg7, %f62;
-
-#define DCACHE_SIZE (PAGE_SIZE * 2)
-#define TLBTEMP_ENT1 (60 << 3)
-#define TLBTEMP_ENT2 (61 << 3)
-#define TLBTEMP_ENTSZ (1 << 3)
-
-#if (PAGE_SHIFT == 13) || (PAGE_SHIFT == 19)
-#define PAGE_SIZE_REM 0x80
-#elif (PAGE_SHIFT == 16) || (PAGE_SHIFT == 22)
-#define PAGE_SIZE_REM 0x100
-#else
-#error Wrong PAGE_SHIFT specified
-#endif
-
- .text
-
- .align 32
- .globl copy_user_page
- .type copy_user_page,@function
-copy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
- VISEntry
- sethi %hi(PAGE_SIZE), %g3
- sethi %uhi(PAGE_OFFSET), %g2
- sllx %g2, 32, %g2
- sub %o0, %g2, %g1
- and %o2, %g3, %o0
- sethi %hi(TLBTEMP_BASE), %o3
- sethi %uhi(_PAGE_VALID | _PAGE_SZBITS), %g3
- sub %o1, %g2, %g2
- sllx %g3, 32, %g3
- mov TLB_TAG_ACCESS, %o2
- or %g3, (_PAGE_CP | _PAGE_CV | _PAGE_P | _PAGE_L | _PAGE_W), %g3
- sethi %hi(DCACHE_SIZE), %o1
- or %g1, %g3, %g1
- or %g2, %g3, %g2
- add %o0, %o3, %o0
- add %o0, %o1, %o1
-#define FIX_INSN_1 0x96102060 /* mov (12 << 3), %o3 */
-cheetah_patch_1:
- mov TLBTEMP_ENT1, %o3
- rdpr %pstate, %g3
- wrpr %g3, PSTATE_IE, %pstate
-
- /* Do this now, before loading the fixed TLB entries for copying,
- * so we do not risk a multiple TLB match condition later when
- * restoring those entries.
- */
- ldx [%g6 + TI_FLAGS], %g3
-
- /* Spitfire Errata #32 workaround */
- mov PRIMARY_CONTEXT, %o4
- stxa %g0, [%o4] ASI_DMMU
- membar #Sync
-
- ldxa [%o3] ASI_DTLB_TAG_READ, %o4
-
- /* Spitfire Errata #32 workaround */
- mov PRIMARY_CONTEXT, %o5
- stxa %g0, [%o5] ASI_DMMU
- membar #Sync
-
- ldxa [%o3] ASI_DTLB_DATA_ACCESS, %g0
- ldxa [%o3] ASI_DTLB_DATA_ACCESS, %o5
- stxa %o0, [%o2] ASI_DMMU
- stxa %g1, [%o3] ASI_DTLB_DATA_ACCESS
- membar #Sync
- add %o3, (TLBTEMP_ENTSZ), %o3
-
- /* Spitfire Errata #32 workaround */
- mov PRIMARY_CONTEXT, %g5
- stxa %g0, [%g5] ASI_DMMU
- membar #Sync
-
- ldxa [%o3] ASI_DTLB_TAG_READ, %g5
-
- /* Spitfire Errata #32 workaround */
- mov PRIMARY_CONTEXT, %g7
- stxa %g0, [%g7] ASI_DMMU
- membar #Sync
-
- ldxa [%o3] ASI_DTLB_DATA_ACCESS, %g0
- ldxa [%o3] ASI_DTLB_DATA_ACCESS, %g7
- stxa %o1, [%o2] ASI_DMMU
- stxa %g2, [%o3] ASI_DTLB_DATA_ACCESS
- membar #Sync
-
- andcc %g3, _TIF_BLKCOMMIT, %g0
- bne,pn %xcc, copy_page_using_blkcommit
- nop
-
- BRANCH_IF_ANY_CHEETAH(g3,o2,cheetah_copy_user_page)
- ba,pt %xcc, spitfire_copy_user_page
- nop
-
-cheetah_copy_user_page:
- .globl cheetah_copy_user_page_nop_1_6
-cheetah_copy_user_page_nop_1_6:
- ldxa [%g0] ASI_DCU_CONTROL_REG, %g3
- sethi %uhi(DCU_PE), %o2
- sllx %o2, 32, %o2
- or %g3, %o2, %o2
- stxa %o2, [%g0] ASI_DCU_CONTROL_REG ! Enable P-cache
- membar #Sync
-
- sethi %hi((PAGE_SIZE/64)-7), %o2 ! A0 Group
- prefetch [%o1 + 0x000], #one_read ! MS
- or %o2, %lo((PAGE_SIZE/64)-7), %o2 ! A1 Group
- prefetch [%o1 + 0x040], #one_read ! MS
- prefetch [%o1 + 0x080], #one_read ! MS Group
- prefetch [%o1 + 0x0c0], #one_read ! MS Group
- ldd [%o1 + 0x000], %f0 ! MS Group
- prefetch [%o1 + 0x100], #one_read ! MS Group
- ldd [%o1 + 0x008], %f2 ! AX
- prefetch [%o1 + 0x140], #one_read ! MS Group
- ldd [%o1 + 0x010], %f4 ! AX
- prefetch [%o1 + 0x180], #one_read ! MS Group
- fmovd %f0, %f32 ! FGA Group
- ldd [%o1 + 0x018], %f6 ! AX
- fmovd %f2, %f34 ! FGA Group
- ldd [%o1 + 0x020], %f8 ! MS
- fmovd %f4, %f36 ! FGA Group
- ldd [%o1 + 0x028], %f10 ! AX
- membar #StoreStore ! MS
- fmovd %f6, %f38 ! FGA Group
- ldd [%o1 + 0x030], %f12 ! MS
- fmovd %f8, %f40 ! FGA Group
- ldd [%o1 + 0x038], %f14 ! AX
- fmovd %f10, %f42 ! FGA Group
- ldd [%o1 + 0x040], %f16 ! MS
-1: ldd [%o1 + 0x048], %f2 ! AX (Group)
- fmovd %f12, %f44 ! FGA
- ldd [%o1 + 0x050], %f4 ! MS
- fmovd %f14, %f46 ! FGA Group
- stda %f32, [%o0] ASI_BLK_P ! MS
- ldd [%o1 + 0x058], %f6 ! AX
- fmovd %f16, %f32 ! FGA Group (8-cycle stall)
- ldd [%o1 + 0x060], %f8 ! MS
- fmovd %f2, %f34 ! FGA Group
- ldd [%o1 + 0x068], %f10 ! AX
- fmovd %f4, %f36 ! FGA Group
- ldd [%o1 + 0x070], %f12 ! MS
- fmovd %f6, %f38 ! FGA Group
- ldd [%o1 + 0x078], %f14 ! AX
- fmovd %f8, %f40 ! FGA Group
- ldd [%o1 + 0x080], %f16 ! AX
- prefetch [%o1 + 0x180], #one_read ! MS
- fmovd %f10, %f42 ! FGA Group
- subcc %o2, 1, %o2 ! A0
- add %o0, 0x40, %o0 ! A1
- bne,pt %xcc, 1b ! BR
- add %o1, 0x40, %o1 ! A0 Group
-
- mov 5, %o2 ! A0 Group
-1: ldd [%o1 + 0x048], %f2 ! AX
- fmovd %f12, %f44 ! FGA
- ldd [%o1 + 0x050], %f4 ! MS
- fmovd %f14, %f46 ! FGA Group
- stda %f32, [%o0] ASI_BLK_P ! MS
- ldd [%o1 + 0x058], %f6 ! AX
- fmovd %f16, %f32 ! FGA Group (8-cycle stall)
- ldd [%o1 + 0x060], %f8 ! MS
- fmovd %f2, %f34 ! FGA Group
- ldd [%o1 + 0x068], %f10 ! AX
- fmovd %f4, %f36 ! FGA Group
- ldd [%o1 + 0x070], %f12 ! MS
- fmovd %f6, %f38 ! FGA Group
- ldd [%o1 + 0x078], %f14 ! AX
- fmovd %f8, %f40 ! FGA Group
- ldd [%o1 + 0x080], %f16 ! MS
- fmovd %f10, %f42 ! FGA Group
- subcc %o2, 1, %o2 ! A0
- add %o0, 0x40, %o0 ! A1
- bne,pt %xcc, 1b ! BR
- add %o1, 0x40, %o1 ! A0 Group
-
- ldd [%o1 + 0x048], %f2 ! AX
- fmovd %f12, %f44 ! FGA
- ldd [%o1 + 0x050], %f4 ! MS
- fmovd %f14, %f46 ! FGA Group
- stda %f32, [%o0] ASI_BLK_P ! MS
- ldd [%o1 + 0x058], %f6 ! AX
- fmovd %f16, %f32 ! FGA Group (8-cycle stall)
- ldd [%o1 + 0x060], %f8 ! MS
- fmovd %f2, %f34 ! FGA Group
- ldd [%o1 + 0x068], %f10 ! AX
- fmovd %f4, %f36 ! FGA Group
- ldd [%o1 + 0x070], %f12 ! MS
- fmovd %f6, %f38 ! FGA Group
- add %o0, 0x40, %o0 ! A0
- ldd [%o1 + 0x078], %f14 ! AX
- fmovd %f8, %f40 ! FGA Group
- fmovd %f10, %f42 ! FGA Group
- fmovd %f12, %f44 ! FGA Group
- fmovd %f14, %f46 ! FGA Group
- stda %f32, [%o0] ASI_BLK_P ! MS
- .globl cheetah_copy_user_page_nop_2_3
-cheetah_copy_user_page_nop_2_3:
- mov PRIMARY_CONTEXT, %o2
- stxa %g0, [%o2] ASI_DMMU ! Flush P-cache
- stxa %g3, [%g0] ASI_DCU_CONTROL_REG ! Disable P-cache
- ba,a,pt %xcc, copy_user_page_continue
-
-spitfire_copy_user_page:
- ldda [%o1] ASI_BLK_P, %f0
- add %o1, 0x40, %o1
- ldda [%o1] ASI_BLK_P, %f16
- add %o1, 0x40, %o1
- sethi %hi(PAGE_SIZE), %o2
-1: TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
- ldda [%o1] ASI_BLK_P, %f32
- stda %f48, [%o0] ASI_BLK_P
- add %o1, 0x40, %o1
- sub %o2, 0x40, %o2
- add %o0, 0x40, %o0
- TOUCH(f16, f18, f20, f22, f24, f26, f28, f30)
- ldda [%o1] ASI_BLK_P, %f0
- stda %f48, [%o0] ASI_BLK_P
- add %o1, 0x40, %o1
- sub %o2, 0x40, %o2
- add %o0, 0x40, %o0
- TOUCH(f32, f34, f36, f38, f40, f42, f44, f46)
- ldda [%o1] ASI_BLK_P, %f16
- stda %f48, [%o0] ASI_BLK_P
- sub %o2, 0x40, %o2
- add %o1, 0x40, %o1
- cmp %o2, PAGE_SIZE_REM
- bne,pt %xcc, 1b
- add %o0, 0x40, %o0
-#if (PAGE_SHIFT == 16) || (PAGE_SHIFT == 22)
- TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
- ldda [%o1] ASI_BLK_P, %f32
- stda %f48, [%o0] ASI_BLK_P
- add %o1, 0x40, %o1
- sub %o2, 0x40, %o2
- add %o0, 0x40, %o0
- TOUCH(f16, f18, f20, f22, f24, f26, f28, f30)
- ldda [%o1] ASI_BLK_P, %f0
- stda %f48, [%o0] ASI_BLK_P
- add %o1, 0x40, %o1
- sub %o2, 0x40, %o2
- add %o0, 0x40, %o0
- membar #Sync
- stda %f32, [%o0] ASI_BLK_P
- add %o0, 0x40, %o0
- stda %f0, [%o0] ASI_BLK_P
-#else
- membar #Sync
- stda %f0, [%o0] ASI_BLK_P
- add %o0, 0x40, %o0
- stda %f16, [%o0] ASI_BLK_P
-#endif
-copy_user_page_continue:
- membar #Sync
- VISExit
-
- mov TLB_TAG_ACCESS, %o2
- stxa %g5, [%o2] ASI_DMMU
- stxa %g7, [%o3] ASI_DTLB_DATA_ACCESS
- membar #Sync
- sub %o3, (TLBTEMP_ENTSZ), %o3
- stxa %o4, [%o2] ASI_DMMU
- stxa %o5, [%o3] ASI_DTLB_DATA_ACCESS
- membar #Sync
- rdpr %pstate, %g3
- jmpl %o7 + 0x8, %g0
- wrpr %g3, PSTATE_IE, %pstate
-
-copy_page_using_blkcommit:
- membar #LoadStore | #StoreStore | #StoreLoad
- ldda [%o1] ASI_BLK_P, %f0
- add %o1, 0x40, %o1
- ldda [%o1] ASI_BLK_P, %f16
- add %o1, 0x40, %o1
- sethi %hi(PAGE_SIZE), %o2
-1: TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
- ldda [%o1] ASI_BLK_P, %f32
- stda %f48, [%o0] ASI_BLK_COMMIT_P
- add %o1, 0x40, %o1
- sub %o2, 0x40, %o2
- add %o0, 0x40, %o0
- TOUCH(f16, f18, f20, f22, f24, f26, f28, f30)
- ldda [%o1] ASI_BLK_P, %f0
- stda %f48, [%o0] ASI_BLK_COMMIT_P
- add %o1, 0x40, %o1
- sub %o2, 0x40, %o2
- add %o0, 0x40, %o0
- TOUCH(f32, f34, f36, f38, f40, f42, f44, f46)
- ldda [%o1] ASI_BLK_P, %f16
- stda %f48, [%o0] ASI_BLK_COMMIT_P
- sub %o2, 0x40, %o2
- add %o1, 0x40, %o1
- cmp %o2, PAGE_SIZE_REM
- bne,pt %xcc, 1b
- add %o0, 0x40, %o0
-#if (PAGE_SHIFT == 16) || (PAGE_SHIFT == 22)
- TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
- ldda [%o1] ASI_BLK_P, %f32
- stda %f48, [%o0] ASI_BLK_COMMIT_P
- add %o1, 0x40, %o1
- sub %o2, 0x40, %o2
- add %o0, 0x40, %o0
- TOUCH(f16, f18, f20, f22, f24, f26, f28, f30)
- ldda [%o1] ASI_BLK_P, %f0
- stda %f48, [%o0] ASI_BLK_COMMIT_P
- add %o1, 0x40, %o1
- sub %o2, 0x40, %o2
- add %o0, 0x40, %o0
- membar #Sync
- stda %f32, [%o0] ASI_BLK_COMMIT_P
- add %o0, 0x40, %o0
- ba,pt %xcc, copy_user_page_continue
- stda %f0, [%o0] ASI_BLK_COMMIT_P
-#else
- membar #Sync
- stda %f0, [%o0] ASI_BLK_COMMIT_P
- add %o0, 0x40, %o0
- ba,pt %xcc, copy_user_page_continue
- stda %f16, [%o0] ASI_BLK_COMMIT_P
-#endif
-
- .align 32
- .globl _clear_page
- .type _clear_page,@function
-_clear_page: /* %o0=dest */
- VISEntryHalf
- ba,pt %xcc, clear_page_common
- clr %o4
-
- .align 32
- .globl clear_user_page
- .type clear_user_page,@function
-clear_user_page: /* %o0=dest, %o1=vaddr */
- VISEntryHalf
- sethi %hi(PAGE_SIZE), %g3
- sethi %uhi(PAGE_OFFSET), %g2
- sllx %g2, 32, %g2
- sub %o0, %g2, %g1
- and %o1, %g3, %o0
- mov TLB_TAG_ACCESS, %o2
- sethi %uhi(_PAGE_VALID | _PAGE_SZBITS), %g3
- sethi %hi(TLBTEMP_BASE), %o3
- sllx %g3, 32, %g3
- or %g3, (_PAGE_CP | _PAGE_CV | _PAGE_P | _PAGE_L | _PAGE_W), %g3
- or %g1, %g3, %g1
- add %o0, %o3, %o0
-#define FIX_INSN_2 0x96102068 /* mov (13 << 3), %o3 */
-cheetah_patch_2:
- mov TLBTEMP_ENT2, %o3
- rdpr %pstate, %g3
- wrpr %g3, PSTATE_IE, %pstate
-
- /* Spitfire Errata #32 workaround */
- mov PRIMARY_CONTEXT, %g5
- stxa %g0, [%g5] ASI_DMMU
- membar #Sync
-
- ldxa [%o3] ASI_DTLB_TAG_READ, %g5
-
- /* Spitfire Errata #32 workaround */
- mov PRIMARY_CONTEXT, %g7
- stxa %g0, [%g7] ASI_DMMU
- membar #Sync
-
- ldxa [%o3] ASI_DTLB_DATA_ACCESS, %g0
- ldxa [%o3] ASI_DTLB_DATA_ACCESS, %g7
- stxa %o0, [%o2] ASI_DMMU
- stxa %g1, [%o3] ASI_DTLB_DATA_ACCESS
- membar #Sync
-
- mov 1, %o4
-
-clear_page_common:
- membar #StoreLoad | #StoreStore | #LoadStore ! LSU Group
- fzero %f0 ! FPA Group
- sethi %hi(PAGE_SIZE/256), %o1 ! IEU0
- fzero %f2 ! FPA Group
- or %o1, %lo(PAGE_SIZE/256), %o1 ! IEU0
- faddd %f0, %f2, %f4 ! FPA Group
- fmuld %f0, %f2, %f6 ! FPM
- faddd %f0, %f2, %f8 ! FPA Group
- fmuld %f0, %f2, %f10 ! FPM
-
- faddd %f0, %f2, %f12 ! FPA Group
- fmuld %f0, %f2, %f14 ! FPM
-1: stda %f0, [%o0 + %g0] ASI_BLK_P ! Store Group
- add %o0, 0x40, %o0 ! IEU0
- stda %f0, [%o0 + %g0] ASI_BLK_P ! Store Group
- add %o0, 0x40, %o0 ! IEU0
- stda %f0, [%o0 + %g0] ASI_BLK_P ! Store Group
-
- add %o0, 0x40, %o0 ! IEU0 Group
- stda %f0, [%o0 + %g0] ASI_BLK_P ! Store Group
- subcc %o1, 1, %o1 ! IEU1
- bne,pt %icc, 1b ! CTI
- add %o0, 0x40, %o0 ! IEU0 Group
- membar #Sync ! LSU Group
- VISExitHalf
-
- brnz,pt %o4, 1f
- nop
-
- retl
- nop
-
-1:
- stxa %g5, [%o2] ASI_DMMU
- stxa %g7, [%o3] ASI_DTLB_DATA_ACCESS
- membar #Sync
- jmpl %o7 + 0x8, %g0
- wrpr %g3, 0x0, %pstate
-
- .globl cheetah_patch_pgcopyops
-cheetah_patch_pgcopyops:
- sethi %hi(FIX_INSN_1), %g1
- or %g1, %lo(FIX_INSN_1), %g1
- sethi %hi(cheetah_patch_1), %g2
- or %g2, %lo(cheetah_patch_1), %g2
- stw %g1, [%g2]
- flush %g2
- sethi %hi(FIX_INSN_2), %g1
- or %g1, %lo(FIX_INSN_2), %g1
- sethi %hi(cheetah_patch_2), %g2
- or %g2, %lo(cheetah_patch_2), %g2
- stw %g1, [%g2]
- flush %g2
- retl
- nop
-
-#undef FIX_INSN1
-#undef FIX_INSN2
-#undef PAGE_SIZE_REM
+++ /dev/null
-/* $Id: rwlock.S,v 1.4 2000/09/09 00:00:34 davem Exp $
- * rwlocks.S: These things are too big to do inline.
- *
- * Copyright (C) 1999 David S. Miller (davem@redhat.com)
- */
-
- .text
- .align 64
-
- /* The non-contention read lock usage is 2 cache lines. */
-
- .globl __read_lock, __read_unlock
-__read_lock: /* %o0 = lock_ptr */
- ldsw [%o0], %g5
- brlz,pn %g5, __read_wait_for_writer
-4: add %g5, 1, %g7
- cas [%o0], %g5, %g7
- cmp %g5, %g7
- bne,pn %icc, __read_lock
- membar #StoreLoad | #StoreStore
-99: retl
- nop
-__read_unlock: /* %o0 = lock_ptr */
- lduw [%o0], %g5
- sub %g5, 1, %g7
- cas [%o0], %g5, %g7
- cmp %g5, %g7
- be,pt %xcc, 99b
- membar #StoreLoad | #StoreStore
- ba,a,pt %xcc, __read_unlock
-
-__read_wait_for_writer:
- ldsw [%o0], %g5
- brlz,pt %g5, __read_wait_for_writer
- membar #LoadLoad
- ba,a,pt %xcc, 4b
-__write_wait_for_any:
- lduw [%o0], %g5
- brnz,pt %g5, __write_wait_for_any
- membar #LoadLoad
- ba,a,pt %xcc, 4f
-
- .align 64
- .globl __write_unlock
-__write_unlock: /* %o0 = lock_ptr */
- membar #LoadStore | #StoreStore
- retl
- stw %g0, [%o0]
-
- .globl __write_lock
-__write_lock: /* %o0 = lock_ptr */
- sethi %hi(0x80000000), %g2
-
-1: lduw [%o0], %g5
- brnz,pn %g5, __write_wait_for_any
-4: or %g5, %g2, %g7
- cas [%o0], %g5, %g7
-
- cmp %g5, %g7
- be,pt %icc, 99b
- membar #StoreLoad | #StoreStore
- ba,a,pt %xcc, 1b
-
- .globl __write_trylock
-__write_trylock: /* %o0 = lock_ptr */
- sethi %hi(0x80000000), %g2
-1: lduw [%o0], %g5
- brnz,pn %g5, __write_trylock_fail
-4: or %g5, %g2, %g7
-
- cas [%o0], %g5, %g7
- cmp %g5, %g7
- be,pt %icc, __write_trylock_succeed
- membar #StoreLoad | #StoreStore
-
- ba,pt %xcc, 1b
- nop
-__write_trylock_succeed:
- retl
- mov 1, %o0
-
-__write_trylock_fail:
- retl
- mov 0, %o0
-
+++ /dev/null
-/* splock.S: Spinlock primitives too large to inline.
- *
- * Copyright (C) 2004 David S. Miller (davem@redhat.com)
- */
-
- .text
- .align 64
-
- .globl _raw_spin_lock
-_raw_spin_lock: /* %o0 = lock_ptr */
-1: ldstub [%o0], %g7
- brnz,pn %g7, 2f
- membar #StoreLoad | #StoreStore
- retl
- nop
-2: ldub [%o0], %g7
- brnz,pt %g7, 2b
- membar #LoadLoad
- ba,a,pt %xcc, 1b
-
- .globl _raw_spin_lock_flags
-_raw_spin_lock_flags: /* %o0 = lock_ptr, %o1 = irq_flags */
-1: ldstub [%o0], %g7
- brnz,pn %g7, 2f
- membar #StoreLoad | #StoreStore
- retl
- nop
-
-2: rdpr %pil, %g2 ! Save PIL
- wrpr %o1, %pil ! Set previous PIL
-3: ldub [%o0], %g7 ! Spin on lock set
- brnz,pt %g7, 3b
- membar #LoadLoad
- ba,pt %xcc, 1b ! Retry lock acquire
- wrpr %g2, %pil ! Restore PIL
+++ /dev/null
-
-menu "Block Devices"
-
-config BLK_DEV_UBD
- bool "Virtual block device"
- help
- The User-Mode Linux port includes a driver called UBD which will let
- you access arbitrary files on the host computer as block devices.
- Unless you know that you do not need such virtual block devices say
- Y here.
-
-config BLK_DEV_UBD_SYNC
- bool "Always do synchronous disk IO for UBD"
- depends on BLK_DEV_UBD
- help
- Writes to the virtual block device are not immediately written to the
- host's disk; this may cause problems if, for example, the
- User-Mode Linux 'Virtual Machine' uses a journalling filesystem and
- the host computer crashes.
-
- Synchronous operation (i.e. always writing data to the host's disk
- immediately) is configurable on a per-UBD basis by using a special
- kernel command line option. Alternatively, you can say Y here to
- turn on synchronous operation by default for all block devices.
-
- If you're running a journalling file system (like reiserfs, for
- example) in your virtual machine, you will want to say Y here. If
- you care for the safety of the data in your virtual machine, Y is a
- wise choice too. In all other cases (for example, if you're just
- playing around with User-Mode Linux) you can choose N.
-
-config BLK_DEV_COW_COMMON
- bool
- default BLK_DEV_UBD
-
-config BLK_DEV_LOOP
- tristate "Loopback device support"
-
-config BLK_DEV_NBD
- tristate "Network block device support"
- depends on NET
-
-config BLK_DEV_RAM
- tristate "RAM disk support"
-
-config BLK_DEV_RAM_COUNT
- int "Default number of RAM disks" if BLK_DEV_RAM
- default "16"
-
-config BLK_DEV_RAM_SIZE
- int "Default RAM disk size"
- depends on BLK_DEV_RAM
- default "4096"
-
-config BLK_DEV_INITRD
- bool "Initial RAM disk (initrd) support"
- depends on BLK_DEV_RAM=y
-
-#Copied directly from drivers/block/Kconfig
-config INITRAMFS_SOURCE
- string "Source directory of cpio_list"
- default ""
- help
- This can be set to either a directory containing files, etc to be
- included in the initramfs archive, or a file containing newline
- separated entries.
-
- If it is a file, it should be in the following format:
- # a comment
- file <name> <location> <mode> <uid> <gid>
- dir <name> <mode> <uid> <gid>
- nod <name> <mode> <uid> <gid> <dev_type> <maj> <min>
-
- Where:
- <name> name of the file/dir/nod in the archive
- <location> location of the file in the current filesystem
- <mode> mode/permissions of the file
- <uid> user id (0=root)
- <gid> group id (0=root)
- <dev_type> device type (b=block, c=character)
- <maj> major number of nod
- <min> minor number of nod
-
- If you are not sure, leave it blank.
-
-config MMAPPER
- tristate "Example IO memory driver"
- depends on BROKEN
- help
- The User-Mode Linux port can provide support for IO Memory
- emulation with this option. This allows a host file to be
- specified as an I/O region on the kernel command line. That file
- will be mapped into UML's kernel address space where a driver can
- locate it and do whatever it wants with the memory, including
- providing an interface to it for UML processes to use.
-
- For more information, see
- <http://user-mode-linux.sourceforge.net/iomem.html>.
-
- If you'd like to be able to provide a simulated IO port space for
- User-Mode Linux processes, say Y. If unsure, say N.
-
-source "drivers/block/Kconfig.iosched"
-
-endmenu
+++ /dev/null
-/*
- * Copyright (C) 2002 Steve Schmidtke
- * Licensed under the GPL
- */
-
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <sys/ioctl.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include <errno.h>
-#include "hostaudio.h"
-#include "user_util.h"
-#include "kern_util.h"
-#include "user.h"
-#include "os.h"
-
-/* /dev/dsp file operations */
-
-ssize_t hostaudio_read_user(struct hostaudio_state *state, char *buffer,
- size_t count, loff_t *ppos)
-{
- ssize_t ret;
-
-#ifdef DEBUG
- printk("hostaudio: read_user called, count = %d\n", count);
-#endif
-
- ret = read(state->fd, buffer, count);
-
- if(ret < 0) return(-errno);
- return(ret);
-}
-
-ssize_t hostaudio_write_user(struct hostaudio_state *state, const char *buffer,
- size_t count, loff_t *ppos)
-{
- ssize_t ret;
-
-#ifdef DEBUG
- printk("hostaudio: write_user called, count = %d\n", count);
-#endif
-
- ret = write(state->fd, buffer, count);
-
- if(ret < 0) return(-errno);
- return(ret);
-}
-
-int hostaudio_ioctl_user(struct hostaudio_state *state, unsigned int cmd,
- unsigned long arg)
-{
- int ret;
-#ifdef DEBUG
- printk("hostaudio: ioctl_user called, cmd = %u\n", cmd);
-#endif
-
- ret = ioctl(state->fd, cmd, arg);
-
- if(ret < 0) return(-errno);
- return(ret);
-}
-
-int hostaudio_open_user(struct hostaudio_state *state, int r, int w, char *dsp)
-{
-#ifdef DEBUG
- printk("hostaudio: open_user called\n");
-#endif
-
- state->fd = os_open_file(dsp, of_set_rw(OPENFLAGS(), r, w), 0);
-
- if(state->fd >= 0) return(0);
-
- printk("hostaudio_open_user failed to open '%s', errno = %d\n",
- dsp, errno);
-
- return(-errno);
-}
-
-int hostaudio_release_user(struct hostaudio_state *state)
-{
-#ifdef DEBUG
- printk("hostaudio: release called\n");
-#endif
- if(state->fd >= 0){
- close(state->fd);
- state->fd=-1;
- }
-
- return(0);
-}
-
-/* /dev/mixer file operations */
-
-int hostmixer_ioctl_mixdev_user(struct hostmixer_state *state,
- unsigned int cmd, unsigned long arg)
-{
- int ret;
-#ifdef DEBUG
- printk("hostmixer: ioctl_user called cmd = %u\n",cmd);
-#endif
-
- ret = ioctl(state->fd, cmd, arg);
- if(ret < 0)
- return(-errno);
- return(ret);
-}
-
-int hostmixer_open_mixdev_user(struct hostmixer_state *state, int r, int w,
- char *mixer)
-{
-#ifdef DEBUG
- printk("hostmixer: open_user called\n");
-#endif
-
- state->fd = os_open_file(mixer, of_set_rw(OPENFLAGS(), r, w), 0);
-
- if(state->fd >= 0) return(0);
-
- printk("hostaudio_open_mixdev_user failed to open '%s', errno = %d\n",
- mixer, errno);
-
- return(-errno);
-}
-
-int hostmixer_release_mixdev_user(struct hostmixer_state *state)
-{
-#ifdef DEBUG
- printk("hostmixer: release_user called\n");
-#endif
-
- if(state->fd >= 0){
- close(state->fd);
- state->fd = -1;
- }
-
- return 0;
-}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-OUTPUT_FORMAT(ELF_FORMAT)
-OUTPUT_ARCH(ELF_ARCH)
-ENTRY(_start)
-jiffies = jiffies_64;
-
-SEARCH_DIR("/usr/local/i686-pc-linux-gnu/lib"); SEARCH_DIR("/usr/local/lib"); SEARCH_DIR("/lib"); SEARCH_DIR("/usr/lib");
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- . = START + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- . = ALIGN(4096);
- __binary_start = .;
- . = ALIGN(4096); /* Init code and data */
- _stext = .;
- __init_begin = .;
- .text.init : { *(.text.init) }
-
- . = ALIGN(4096);
-
- /* Read-only sections, merged into text segment: */
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .gnu.version : { *(.gnu.version) }
- .gnu.version_d : { *(.gnu.version_d) }
- .gnu.version_r : { *(.gnu.version_r) }
- .rel.init : { *(.rel.init) }
- .rela.init : { *(.rela.init) }
- .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) }
- .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) }
- .rel.fini : { *(.rel.fini) }
- .rela.fini : { *(.rela.fini) }
- .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) }
- .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) }
- .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) }
- .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) }
- .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) }
- .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) }
- .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) }
- .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) }
- .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : {
- KEEP (*(.init))
- } =0x90909090
- .plt : { *(.plt) }
- .text : {
- *(.text .stub .text.* .gnu.linkonce.t.*)
- /* .gnu.warning sections are handled specially by elf32.em. */
- *(.gnu.warning)
- } =0x90909090
- .fini : {
- KEEP (*(.fini))
- } =0x90909090
-
- .kstrtab : { *(.kstrtab) }
-
- #include "asm/common.lds.S"
-
- .data.init : { *(.data.init) }
-
- /* Ensure the __preinit_array_start label is properly aligned. We
- could instead move the label definition inside the section, but
- the linker would then create the section even if it turns out to
- be empty, which isn't pretty. */
- . = ALIGN(32 / 8);
- .preinit_array : { *(.preinit_array) }
- .init_array : { *(.init_array) }
- .fini_array : { *(.fini_array) }
- .data : {
- . = ALIGN(KERNEL_STACK_SIZE); /* init_task */
- *(.data.init_task)
- *(.data .data.* .gnu.linkonce.d.*)
- SORT(CONSTRUCTORS)
- }
- .data1 : { *(.data1) }
- .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) }
- .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
- .eh_frame : { KEEP (*(.eh_frame)) }
- .gcc_except_table : { *(.gcc_except_table) }
- .dynamic : { *(.dynamic) }
- .ctors : {
- /* gcc uses crtbegin.o to find the start of
- the constructors, so we make sure it is
- first. Because this is a wildcard, it
- doesn't matter if the user does not
- actually link against crtbegin.o; the
- linker won't look for a file to match a
- wildcard. The wildcard also means that it
- doesn't matter which directory crtbegin.o
- is in. */
- KEEP (*crtbegin.o(.ctors))
- /* We don't want to include the .ctor section from
- from the crtend.o file until after the sorted ctors.
- The .ctor section from the crtend file contains the
- end of ctors marker and it must be last */
- KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
- }
- .dtors : {
- KEEP (*crtbegin.o(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- }
- .jcr : { KEEP (*(.jcr)) }
- .got : { *(.got.plt) *(.got) }
- _edata = .;
- PROVIDE (edata = .);
- __bss_start = .;
- .bss : {
- *(.dynbss)
- *(.bss .bss.* .gnu.linkonce.b.*)
- *(COMMON)
- /* Align here to ensure that the .bss section occupies space up to
- _end. Align after .bss to ensure correct alignment even if the
- .bss section disappears because there are no input sections. */
- . = ALIGN(32 / 8);
- . = ALIGN(32 / 8);
- }
- _end = .;
- PROVIDE (end = .);
- /* Stabs debugging sections. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- .comment 0 : { *(.comment) }
- /* DWARF debug sections.
- Symbols in the DWARF debugging sections are relative to the beginning
- of the section so we begin them at 0. */
- /* DWARF 1 */
- .debug 0 : { *(.debug) }
- .line 0 : { *(.line) }
- /* GNU DWARF 1 extensions */
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- /* DWARF 1.1 and DWARF 2 */
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- /* DWARF 2 */
- .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line) }
- .debug_frame 0 : { *(.debug_frame) }
- .debug_str 0 : { *(.debug_str) }
- .debug_loc 0 : { *(.debug_loc) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- /* SGI/MIPS DWARF 2 extensions */
- .debug_weaknames 0 : { *(.debug_weaknames) }
- .debug_funcnames 0 : { *(.debug_funcnames) }
- .debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
-}
+++ /dev/null
-all : sc.h
-
-sc.h : ../util/mk_sc
- ../util/mk_sc > $@
-
-../util/mk_sc :
- $(MAKE) -C ../util mk_sc
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __FRAME_H_
-#define __FRAME_H_
-
-#include "sysdep/frame.h"
-
-struct frame_common {
- void *data;
- int len;
- int sig_index;
- int sr_index;
- int sr_relative;
- int sp_index;
- struct arch_frame_data arch;
-};
-
-struct sc_frame {
- struct frame_common common;
- int sc_index;
-};
-
-extern struct sc_frame signal_frame_sc;
-
-extern struct sc_frame signal_frame_sc_sr;
-
-struct si_frame {
- struct frame_common common;
- int sip_index;
- int si_index;
- int ucp_index;
- int uc_index;
-};
-
-extern struct si_frame signal_frame_si;
-
-extern void capture_signal_stack(void);
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __FRAME_USER_H_
-#define __FRAME_USER_H_
-
-#include "sysdep/frame_user.h"
-#include "frame.h"
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Steve Schmidtke
- * Licensed under the GPL
- */
-
-#ifndef HOSTAUDIO_H
-#define HOSTAUDIO_H
-
-#define HOSTAUDIO_DEV_DSP "/dev/sound/dsp"
-#define HOSTAUDIO_DEV_MIXER "/dev/sound/mixer"
-
-struct hostaudio_state {
- int fd;
-};
-
-struct hostmixer_state {
- int fd;
-};
-
-/* UML user-side protoypes */
-extern ssize_t hostaudio_read_user(struct hostaudio_state *state, char *buffer,
- size_t count, loff_t *ppos);
-extern ssize_t hostaudio_write_user(struct hostaudio_state *state,
- const char *buffer, size_t count,
- loff_t *ppos);
-extern int hostaudio_ioctl_user(struct hostaudio_state *state,
- unsigned int cmd, unsigned long arg);
-extern int hostaudio_open_user(struct hostaudio_state *state, int r, int w,
- char *dsp);
-extern int hostaudio_release_user(struct hostaudio_state *state);
-extern int hostmixer_ioctl_mixdev_user(struct hostmixer_state *state,
- unsigned int cmd, unsigned long arg);
-extern int hostmixer_open_mixdev_user(struct hostmixer_state *state, int r,
- int w, char *mixer);
-extern int hostmixer_release_mixdev_user(struct hostmixer_state *state);
-
-#endif /* HOSTAUDIO_H */
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __FRAME_I386_H
-#define __FRAME_I386_H
-
-struct arch_frame_data_raw {
- unsigned long fp_start;
- unsigned long sr;
-};
-
-struct arch_frame_data {
- int fpstate_size;
-};
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __FRAME_KERN_I386_H
-#define __FRAME_KERN_I386_H
-
-/* This is called from sys_sigreturn. It takes the sp at the point of the
- * sigreturn system call and returns the address of the sigcontext struct
- * on the stack.
- */
-
-static inline void *sp_to_sc(unsigned long sp)
-{
- return((void *) sp);
-}
-
-static inline void *sp_to_uc(unsigned long sp)
-{
- unsigned long uc;
-
- uc = sp + signal_frame_si.uc_index -
- signal_frame_si.common.sp_index - 4;
- return((void *) uc);
-}
-
-static inline void *sp_to_rt_sc(unsigned long sp)
-{
- unsigned long sc;
-
- sc = sp - signal_frame_si.common.sp_index +
- signal_frame_si.common.len - 4;
- return((void *) sc);
-}
-
-static inline void *sp_to_mask(unsigned long sp)
-{
- unsigned long mask;
-
- mask = sp - signal_frame_sc.common.sp_index +
- signal_frame_sc.common.len - 8;
- return((void *) mask);
-}
-
-extern int sc_size(void *data);
-
-static inline void *sp_to_rt_mask(unsigned long sp)
-{
- unsigned long mask;
-
- mask = sp - signal_frame_si.common.sp_index +
- signal_frame_si.common.len +
- sc_size(&signal_frame_si.common.arch) - 4;
- return((void *) mask);
-}
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __FRAME_USER_I386_H
-#define __FRAME_USER_I386_H
-
-#include <asm/page.h>
-#include "sysdep/frame.h"
-
-/* This stuff is to calculate the size of the fp state struct at runtime
- * because it has changed between 2.2 and 2.4 and it would be good for a
- * UML compiled on one to work on the other.
- * So, setup_arch_frame_raw fills in the arch struct with the raw data, which
- * just contains the address of the end of the sigcontext. This is invoked
- * from the signal handler.
- * setup_arch_frame uses that data to figure out what
- * arch_frame_data.fpstate_size should be. It really has no idea, since it's
- * not allowed to do sizeof(struct fpstate) but it's safe to consider that it's
- * everything from the end of the sigcontext up to the top of the stack. So,
- * it masks off the page number to get the offset within the page and subtracts
- * that from the page size, and that's how big the fpstate struct will be
- * considered to be.
- */
-
-static inline void setup_arch_frame_raw(struct arch_frame_data_raw *data,
- void *end, unsigned long srp)
-{
- unsigned long sr = *((unsigned long *) srp);
-
- data->fp_start = (unsigned long) end;
- if((sr & PAGE_MASK) == ((unsigned long) end & PAGE_MASK))
- data->sr = sr;
- else data->sr = 0;
-}
-
-static inline void setup_arch_frame(struct arch_frame_data_raw *in,
- struct arch_frame_data *out)
-{
- unsigned long fpstate_start = in->fp_start;
-
- if(in->sr == 0){
- fpstate_start &= ~PAGE_MASK;
- out->fpstate_size = PAGE_SIZE - fpstate_start;
- }
- else {
- out->fpstate_size = in->sr - fpstate_start;
- }
-}
-
-/* This figures out where on the stack the SA_RESTORER function address
- * is stored. For i386, it's the signal handler return address, so it's
- * located next to the frame pointer.
- * This is inlined, so __builtin_frame_address(0) is correct. Otherwise,
- * it would have to be __builtin_frame_address(1).
- */
-
-#define frame_restorer() \
-({ \
- unsigned long *fp; \
-\
- fp = __builtin_frame_address(0); \
- ((unsigned long) (fp + 1)); \
-})
-
-/* Similarly, this returns the value of sp when the handler was first
- * entered. This is used to calculate the proper sp when delivering
- * signals.
- */
-
-#define frame_sp() \
-({ \
- unsigned long *fp; \
-\
- fp = __builtin_frame_address(0); \
- ((unsigned long) (fp + 1)); \
-})
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2000 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __UMN_H
-#define __UMN_H
-
-extern int open_umn_tty(int *slave_out, int *slipno_out);
-extern void close_umn_tty(int master, int slave);
-extern int umn_send_packet(int fd, void *data, int len);
-extern int set_umn_addr(int fd, char *addr, char *ptp_addr);
-extern void slip_unesc(unsigned char s);
-extern void umn_read(int fd);
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <string.h>
-#include <signal.h>
-#include <wait.h>
-#include <sched.h>
-#include <errno.h>
-#include <sys/ptrace.h>
-#include <sys/syscall.h>
-#include <sys/mman.h>
-#include <asm/page.h>
-#include <asm/ptrace.h>
-#include <asm/sigcontext.h>
-#include "sysdep/ptrace.h"
-#include "sysdep/sigcontext.h"
-#include "frame_user.h"
-#include "kern_util.h"
-#include "user_util.h"
-#include "ptrace_user.h"
-#include "os.h"
-
-static int capture_stack(int (*child)(void *arg), void *arg, void *sp,
- unsigned long top, void **data_out)
-{
- unsigned long regs[FRAME_SIZE];
- int pid, status, n, len;
-
- /* Start the child as a thread */
- pid = clone(child, sp, CLONE_VM | SIGCHLD, arg);
- if(pid < 0){
- printf("capture_stack : clone failed - errno = %d\n", errno);
- exit(1);
- }
-
- /* Wait for it to stop itself and continue it with a SIGUSR1 to force
- * it into the signal handler.
- */
- CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED));
- if(n < 0){
- printf("capture_stack : waitpid failed - errno = %d\n", errno);
- exit(1);
- }
- if(!WIFSTOPPED(status) || (WSTOPSIG(status) != SIGSTOP)){
- fprintf(stderr, "capture_stack : Expected SIGSTOP, "
- "got status = 0x%x\n", status);
- exit(1);
- }
- if(ptrace(PTRACE_CONT, pid, 0, SIGUSR1) < 0){
- printf("capture_stack : PTRACE_CONT failed - errno = %d\n",
- errno);
- exit(1);
- }
-
- /* Wait for it to stop itself again and grab its registers again.
- * At this point, the handler has stuffed the addresses of
- * sig, sc, and SA_RESTORER in raw.
- */
- CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED));
- if(n < 0){
- printf("capture_stack : waitpid failed - errno = %d\n", errno);
- exit(1);
- }
- if(!WIFSTOPPED(status) || (WSTOPSIG(status) != SIGSTOP)){
- fprintf(stderr, "capture_stack : Expected SIGSTOP, "
- "got status = 0x%x\n", status);
- exit(1);
- }
- if(ptrace(PTRACE_GETREGS, pid, 0, regs) < 0){
- printf("capture_stack : PTRACE_GETREGS failed - errno = %d\n",
- errno);
- exit(1);
- }
-
- /* It has outlived its usefulness, so continue it so it can exit */
- if(ptrace(PTRACE_CONT, pid, 0, 0) < 0){
- printf("capture_stack : PTRACE_CONT failed - errno = %d\n",
- errno);
- exit(1);
- }
- CATCH_EINTR(n = waitpid(pid, &status, 0));
- if(n < 0){
- printf("capture_stack : waitpid failed - errno = %d\n", errno);
- exit(1);
- }
- if(!WIFSIGNALED(status) || (WTERMSIG(status) != 9)){
- printf("capture_stack : Expected exit signal 9, "
- "got status = 0x%x\n", status);
- exit(1);
- }
-
- /* The frame that we want is the top of the signal stack */
-
- len = top - PT_SP(regs);
- *data_out = malloc(len);
- if(*data_out == NULL){
- printf("capture_stack : malloc failed - errno = %d\n", errno);
- exit(1);
- }
- memcpy(*data_out, (void *) PT_SP(regs), len);
-
- return(len);
-}
-
-struct common_raw {
- void *stack;
- int size;
- unsigned long sig;
- unsigned long sr;
- unsigned long sp;
- struct arch_frame_data_raw arch;
-};
-
-#define SA_RESTORER (0x04000000)
-
-typedef unsigned long old_sigset_t;
-
-struct old_sigaction {
- __sighandler_t handler;
- old_sigset_t sa_mask;
- unsigned long sa_flags;
- void (*sa_restorer)(void);
-};
-
-static void child_common(struct common_raw *common, sighandler_t handler,
- int restorer, int flags)
-{
- stack_t ss = ((stack_t) { .ss_sp = common->stack,
- .ss_flags = 0,
- .ss_size = common->size });
- int err;
-
- if(ptrace(PTRACE_TRACEME, 0, 0, 0) < 0){
- printf("PTRACE_TRACEME failed, errno = %d\n", errno);
- }
- if(sigaltstack(&ss, NULL) < 0){
- printf("sigaltstack failed - errno = %d\n", errno);
- kill(os_getpid(), SIGKILL);
- }
-
- if(restorer){
- struct sigaction sa;
-
- sa.sa_handler = handler;
- sigemptyset(&sa.sa_mask);
- sa.sa_flags = SA_ONSTACK | flags;
- err = sigaction(SIGUSR1, &sa, NULL);
- }
- else {
- struct old_sigaction sa;
-
- sa.handler = handler;
- sa.sa_mask = 0;
- sa.sa_flags = (SA_ONSTACK | flags) & ~SA_RESTORER;
- err = syscall(__NR_sigaction, SIGUSR1, &sa, NULL);
- }
-
- if(err < 0){
- printf("sigaction failed - errno = %d\n", errno);
- kill(os_getpid(), SIGKILL);
- }
-
- os_stop_process(os_getpid());
-}
-
-/* Changed only during early boot */
-struct sc_frame signal_frame_sc;
-
-struct sc_frame signal_frame_sc_sr;
-
-struct sc_frame_raw {
- struct common_raw common;
- unsigned long sc;
- int restorer;
-};
-
-/* Changed only during early boot */
-static struct sc_frame_raw *raw_sc = NULL;
-
-static void sc_handler(int sig, struct sigcontext sc)
-{
- raw_sc->common.sig = (unsigned long) &sig;
- raw_sc->common.sr = frame_restorer();
- raw_sc->common.sp = frame_sp();
- raw_sc->sc = (unsigned long) ≻
- setup_arch_frame_raw(&raw_sc->common.arch, &sc + 1, raw_sc->common.sr);
-
- os_stop_process(os_getpid());
- kill(os_getpid(), SIGKILL);
-}
-
-static int sc_child(void *arg)
-{
- raw_sc = arg;
- child_common(&raw_sc->common, (sighandler_t) sc_handler,
- raw_sc->restorer, 0);
- return(-1);
-}
-
-/* Changed only during early boot */
-struct si_frame signal_frame_si;
-
-struct si_frame_raw {
- struct common_raw common;
- unsigned long sip;
- unsigned long si;
- unsigned long ucp;
- unsigned long uc;
-};
-
-/* Changed only during early boot */
-static struct si_frame_raw *raw_si = NULL;
-
-static void si_handler(int sig, siginfo_t *si, struct ucontext *ucontext)
-{
- raw_si->common.sig = (unsigned long) &sig;
- raw_si->common.sr = frame_restorer();
- raw_si->common.sp = frame_sp();
- raw_si->sip = (unsigned long) &si;
- raw_si->si = (unsigned long) si;
- raw_si->ucp = (unsigned long) &ucontext;
- raw_si->uc = (unsigned long) ucontext;
- setup_arch_frame_raw(&raw_si->common.arch,
- ucontext->uc_mcontext.fpregs, raw_si->common.sr);
-
- os_stop_process(os_getpid());
- kill(os_getpid(), SIGKILL);
-}
-
-static int si_child(void *arg)
-{
- raw_si = arg;
- child_common(&raw_si->common, (sighandler_t) si_handler, 1,
- SA_SIGINFO);
- return(-1);
-}
-
-static int relative_sr(unsigned long sr, int sr_index, void *stack,
- void *framep)
-{
- unsigned long *srp = (unsigned long *) sr;
- unsigned long frame = (unsigned long) framep;
-
- if((*srp & PAGE_MASK) == (unsigned long) stack){
- *srp -= sr;
- *((unsigned long *) (frame + sr_index)) = *srp;
- return(1);
- }
- else return(0);
-}
-
-static unsigned long capture_stack_common(int (*proc)(void *), void *arg,
- struct common_raw *common_in,
- void *top, void *sigstack,
- int stack_len,
- struct frame_common *common_out)
-{
- unsigned long sig_top = (unsigned long) sigstack + stack_len, base;
-
- common_in->stack = (void *) sigstack;
- common_in->size = stack_len;
- common_out->len = capture_stack(proc, arg, top, sig_top,
- &common_out->data);
- base = sig_top - common_out->len;
- common_out->sig_index = common_in->sig - base;
- common_out->sp_index = common_in->sp - base;
- common_out->sr_index = common_in->sr - base;
- common_out->sr_relative = relative_sr(common_in->sr,
- common_out->sr_index, sigstack,
- common_out->data);
- return(base);
-}
-
-void capture_signal_stack(void)
-{
- struct sc_frame_raw raw_sc;
- struct si_frame_raw raw_si;
- void *stack, *sigstack;
- unsigned long top, base;
-
- stack = mmap(NULL, PAGE_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC,
- MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
- sigstack = mmap(NULL, PAGE_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC,
- MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
- if((stack == MAP_FAILED) || (sigstack == MAP_FAILED)){
- printf("capture_signal_stack : mmap failed - errno = %d\n",
- errno);
- exit(1);
- }
-
- top = (unsigned long) stack + PAGE_SIZE - sizeof(void *);
-
- /* Get the sigcontext, no sigrestorer layout */
- raw_sc.restorer = 0;
- base = capture_stack_common(sc_child, &raw_sc, &raw_sc.common,
- (void *) top, sigstack, PAGE_SIZE,
- &signal_frame_sc.common);
-
- signal_frame_sc.sc_index = raw_sc.sc - base;
- setup_arch_frame(&raw_sc.common.arch, &signal_frame_sc.common.arch);
-
- /* Ditto for the sigcontext, sigrestorer layout */
- raw_sc.restorer = 1;
- base = capture_stack_common(sc_child, &raw_sc, &raw_sc.common,
- (void *) top, sigstack, PAGE_SIZE,
- &signal_frame_sc_sr.common);
- signal_frame_sc_sr.sc_index = raw_sc.sc - base;
- setup_arch_frame(&raw_sc.common.arch, &signal_frame_sc_sr.common.arch);
-
- /* And the siginfo layout */
-
- base = capture_stack_common(si_child, &raw_si, &raw_si.common,
- (void *) top, sigstack, PAGE_SIZE,
- &signal_frame_si.common);
- signal_frame_si.sip_index = raw_si.sip - base;
- signal_frame_si.si_index = raw_si.si - base;
- signal_frame_si.ucp_index = raw_si.ucp - base;
- signal_frame_si.uc_index = raw_si.uc - base;
- setup_arch_frame(&raw_si.common.arch, &signal_frame_si.common.arch);
-
- if((munmap(stack, PAGE_SIZE) < 0) ||
- (munmap(sigstack, PAGE_SIZE) < 0)){
- printf("capture_signal_stack : munmap failed - errno = %d\n",
- errno);
- exit(1);
- }
-}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#include "asm/ptrace.h"
-#include "asm/uaccess.h"
-#include "asm/signal.h"
-#include "asm/ucontext.h"
-#include "frame_kern.h"
-#include "sigcontext.h"
-#include "sysdep/ptrace.h"
-#include "choose-mode.h"
-#include "mode.h"
-
-static int copy_restorer(void (*restorer)(void), unsigned long start,
- unsigned long sr_index, int sr_relative)
-{
- unsigned long sr;
-
- if(sr_relative){
- sr = (unsigned long) restorer;
- sr += start + sr_index;
- restorer = (void (*)(void)) sr;
- }
-
- return(copy_to_user((void *) (start + sr_index), &restorer,
- sizeof(restorer)));
-}
-
-extern int userspace_pid[];
-
-static int copy_sc_to_user(void *to, void *fp, struct pt_regs *from,
- struct arch_frame_data *arch)
-{
- return(CHOOSE_MODE(copy_sc_to_user_tt(to, fp, UPT_SC(&from->regs),
- arch),
- copy_sc_to_user_skas(userspace_pid[0], to, fp,
- &from->regs,
- current->thread.cr2,
- current->thread.err)));
-}
-
-static int copy_ucontext_to_user(struct ucontext *uc, void *fp, sigset_t *set,
- unsigned long sp)
-{
- int err = 0;
-
- err |= put_user(current->sas_ss_sp, &uc->uc_stack.ss_sp);
- err |= put_user(sas_ss_flags(sp), &uc->uc_stack.ss_flags);
- err |= put_user(current->sas_ss_size, &uc->uc_stack.ss_size);
- err |= copy_sc_to_user(&uc->uc_mcontext, fp, ¤t->thread.regs,
- &signal_frame_si.common.arch);
- err |= copy_to_user(&uc->uc_sigmask, set, sizeof(*set));
- return(err);
-}
-
-int setup_signal_stack_si(unsigned long stack_top, int sig,
- struct k_sigaction *ka, struct pt_regs *regs,
- siginfo_t *info, sigset_t *mask)
-{
- unsigned long start;
- void *restorer;
- void *sip, *ucp, *fp;
-
- start = stack_top - signal_frame_si.common.len;
- sip = (void *) (start + signal_frame_si.si_index);
- ucp = (void *) (start + signal_frame_si.uc_index);
- fp = (void *) (((unsigned long) ucp) + sizeof(struct ucontext));
-
- restorer = NULL;
- if(ka->sa.sa_flags & SA_RESTORER)
- restorer = ka->sa.sa_restorer;
-
- if(restorer == NULL)
- panic("setup_signal_stack_si - no restorer");
-
- if(copy_to_user((void *) start, signal_frame_si.common.data,
- signal_frame_si.common.len) ||
- copy_to_user((void *) (start + signal_frame_si.common.sig_index),
- &sig, sizeof(sig)) ||
- copy_siginfo_to_user(sip, info) ||
- copy_to_user((void *) (start + signal_frame_si.sip_index), &sip,
- sizeof(sip)) ||
- copy_ucontext_to_user(ucp, fp, mask, PT_REGS_SP(regs)) ||
- copy_to_user((void *) (start + signal_frame_si.ucp_index), &ucp,
- sizeof(ucp)) ||
- copy_restorer(restorer, start, signal_frame_si.common.sr_index,
- signal_frame_si.common.sr_relative))
- return(1);
-
- PT_REGS_IP(regs) = (unsigned long) ka->sa.sa_handler;
- PT_REGS_SP(regs) = start + signal_frame_si.common.sp_index;
- return(0);
-}
-
-int setup_signal_stack_sc(unsigned long stack_top, int sig,
- struct k_sigaction *ka, struct pt_regs *regs,
- sigset_t *mask)
-{
- struct frame_common *frame = &signal_frame_sc_sr.common;
- void *restorer;
- void *user_sc;
- int sig_size = (_NSIG_WORDS - 1) * sizeof(unsigned long);
- unsigned long sigs, sr;
- unsigned long start = stack_top - frame->len - sig_size;
-
- restorer = NULL;
- if(ka->sa.sa_flags & SA_RESTORER)
- restorer = ka->sa.sa_restorer;
-
- user_sc = (void *) (start + signal_frame_sc_sr.sc_index);
- if(restorer == NULL){
- frame = &signal_frame_sc.common;
- user_sc = (void *) (start + signal_frame_sc.sc_index);
- sr = (unsigned long) frame->data;
- sr += frame->sr_index;
- sr = *((unsigned long *) sr);
- restorer = ((void (*)(void)) sr);
- }
-
- sigs = start + frame->len;
- if(copy_to_user((void *) start, frame->data, frame->len) ||
- copy_to_user((void *) (start + frame->sig_index), &sig,
- sizeof(sig)) ||
- copy_sc_to_user(user_sc, NULL, regs,
- &signal_frame_sc.common.arch) ||
- copy_to_user(sc_sigmask(user_sc), mask, sizeof(mask->sig[0])) ||
- copy_to_user((void *) sigs, &mask->sig[1], sig_size) ||
- copy_restorer(restorer, start, frame->sr_index, frame->sr_relative))
- return(1);
-
- PT_REGS_IP(regs) = (unsigned long) ka->sa.sa_handler;
- PT_REGS_SP(regs) = start + frame->sp_index;
-
- return(0);
-}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-#ifndef __MPROT_H__
-#define __MPROT_H__
-
-extern void no_access(unsigned long addr, unsigned int len);
-
-#endif
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#include <stdlib.h>
-#include <errno.h>
-#include <signal.h>
-#include <sched.h>
-#include <sys/wait.h>
-#include <sys/ptrace.h>
-#include "user.h"
-#include "kern_util.h"
-#include "user_util.h"
-#include "os.h"
-#include "time_user.h"
-
-static int user_thread_tramp(void *arg)
-{
- if(ptrace(PTRACE_TRACEME, 0, 0, 0) < 0)
- panic("user_thread_tramp - PTRACE_TRACEME failed, "
- "errno = %d\n", errno);
- enable_timer();
- os_stop_process(os_getpid());
- return(0);
-}
-
-int user_thread(unsigned long stack, int flags)
-{
- int pid, status, err;
-
- pid = clone(user_thread_tramp, (void *) stack_sp(stack),
- flags | CLONE_FILES | SIGCHLD, NULL);
- if(pid < 0){
- printk("user_thread - clone failed, errno = %d\n", errno);
- return(pid);
- }
-
- CATCH_EINTR(err = waitpid(pid, &status, WUNTRACED));
- if(err < 0){
- printk("user_thread - waitpid failed, errno = %d\n", errno);
- return(-errno);
- }
-
- if(!WIFSTOPPED(status) || (WSTOPSIG(status) != SIGSTOP)){
- printk("user_thread - trampoline didn't stop, status = %d\n",
- status);
- return(-EINVAL);
- }
-
- return(pid);
-}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __SKAS_MMU_H
-#define __SKAS_MMU_H
-
-#include "linux/list.h"
-#include "linux/spinlock.h"
-
-struct mmu_context_skas {
- int mm_fd;
-};
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __MODE_SKAS_H__
-#define __MODE_SKAS_H__
-
-extern unsigned long exec_regs[];
-extern unsigned long exec_fp_regs[];
-extern unsigned long exec_fpx_regs[];
-extern int have_fpx_regs;
-
-extern void user_time_init_skas(void);
-extern int copy_sc_from_user_skas(int pid, union uml_pt_regs *regs,
- void *from_ptr);
-extern int copy_sc_to_user_skas(int pid, void *to_ptr, void *fp,
- union uml_pt_regs *regs,
- unsigned long fault_addr, int fault_type);
-extern void sig_handler_common_skas(int sig, void *sc_ptr);
-extern void halt_skas(void);
-extern void reboot_skas(void);
-extern void kill_off_processes_skas(void);
-extern int is_skas_winch(int pid, int fd, void *data);
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __SKAS_MODE_KERN_H__
-#define __SKAS_MODE_KERN_H__
-
-#include "linux/sched.h"
-#include "asm/page.h"
-#include "asm/ptrace.h"
-
-extern void flush_thread_skas(void);
-extern void *switch_to_skas(void *prev, void *next);
-extern void start_thread_skas(struct pt_regs *regs, unsigned long eip,
- unsigned long esp);
-extern int copy_thread_skas(int nr, unsigned long clone_flags,
- unsigned long sp, unsigned long stack_top,
- struct task_struct *p, struct pt_regs *regs);
-extern void release_thread_skas(struct task_struct *task);
-extern void exit_thread_skas(void);
-extern void initial_thread_cb_skas(void (*proc)(void *), void *arg);
-extern void init_idle_skas(void);
-extern void flush_tlb_kernel_range_skas(unsigned long start,
- unsigned long end);
-extern void flush_tlb_kernel_vm_skas(void);
-extern void __flush_tlb_one_skas(unsigned long addr);
-extern void flush_tlb_range_skas(struct vm_area_struct *vma,
- unsigned long start, unsigned long end);
-extern void flush_tlb_mm_skas(struct mm_struct *mm);
-extern void force_flush_all_skas(void);
-extern long execute_syscall_skas(void *r);
-extern void before_mem_skas(unsigned long unused);
-extern unsigned long set_task_sizes_skas(int arg, unsigned long *host_size_out,
- unsigned long *task_size_out);
-extern int start_uml_skas(void);
-extern int external_pid_skas(struct task_struct *task);
-extern int thread_pid_skas(struct task_struct *task);
-
-#define kmem_end_skas (host_task_size - 1024 * 1024)
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __PTRACE_SKAS_H
-#define __PTRACE_SKAS_H
-
-#include "uml-config.h"
-
-#ifdef UML_CONFIG_MODE_SKAS
-
-#include "skas_ptregs.h"
-
-#define HOST_FRAME_SIZE 17
-
-#define REGS_IP(r) ((r)[HOST_IP])
-#define REGS_SP(r) ((r)[HOST_SP])
-#define REGS_EFLAGS(r) ((r)[HOST_EFLAGS])
-#define REGS_EAX(r) ((r)[HOST_EAX])
-#define REGS_EBX(r) ((r)[HOST_EBX])
-#define REGS_ECX(r) ((r)[HOST_ECX])
-#define REGS_EDX(r) ((r)[HOST_EDX])
-#define REGS_ESI(r) ((r)[HOST_ESI])
-#define REGS_EDI(r) ((r)[HOST_EDI])
-#define REGS_EBP(r) ((r)[HOST_EBP])
-#define REGS_CS(r) ((r)[HOST_CS])
-#define REGS_SS(r) ((r)[HOST_SS])
-#define REGS_DS(r) ((r)[HOST_DS])
-#define REGS_ES(r) ((r)[HOST_ES])
-#define REGS_FS(r) ((r)[HOST_FS])
-#define REGS_GS(r) ((r)[HOST_GS])
-
-#define REGS_SET_SYSCALL_RETURN(r, res) REGS_EAX(r) = (res)
-
-#define REGS_RESTART_SYSCALL(r) IP_RESTART_SYSCALL(REGS_IP(r))
-
-#define REGS_SEGV_IS_FIXABLE(r) SEGV_IS_FIXABLE((r)->trap_type)
-
-#define REGS_FAULT_ADDR(r) ((r)->fault_addr)
-
-#define REGS_FAULT_WRITE(r) FAULT_WRITE((r)->fault_type)
-
-#endif
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __SKAS_UACCESS_H
-#define __SKAS_UACCESS_H
-
-#include "asm/errno.h"
-
-#define access_ok_skas(type, addr, size) \
- ((segment_eq(get_fs(), KERNEL_DS)) || \
- (((unsigned long) (addr) < TASK_SIZE) && \
- ((unsigned long) (addr) + (size) <= TASK_SIZE)))
-
-static inline int verify_area_skas(int type, const void * addr,
- unsigned long size)
-{
- return(access_ok_skas(type, addr, size) ? 0 : -EFAULT);
-}
-
-extern int copy_from_user_skas(void *to, const void *from, int n);
-extern int copy_to_user_skas(void *to, const void *from, int n);
-extern int strncpy_from_user_skas(char *dst, const char *src, int count);
-extern int __clear_user_skas(void *mem, int len);
-extern int clear_user_skas(void *mem, int len);
-extern int strnlen_user_skas(const void *str, int len);
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-#
-# Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
-# Licensed under the GPL
-#
-
-obj-y = sigcontext.o
-
-USER_OBJS = sigcontext.o
-USER_OBJS := $(foreach file,$(USER_OBJS),$(obj)/$(file))
-
-$(USER_OBJS) : %.o: %.c
- $(CC) $(CFLAGS_$(notdir $@)) $(USER_CFLAGS) -c -o $@ $<
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#include <errno.h>
-#include <asm/sigcontext.h>
-#include <sys/ptrace.h>
-#include <linux/ptrace.h>
-#include "sysdep/ptrace.h"
-#include "sysdep/ptrace_user.h"
-#include "kern_util.h"
-#include "user.h"
-#include "sigcontext.h"
-#include "mode.h"
-
-int copy_sc_from_user_skas(int pid, union uml_pt_regs *regs, void *from_ptr)
-{
- struct sigcontext sc, *from = from_ptr;
- unsigned long fpregs[FP_FRAME_SIZE];
- int err;
-
- err = copy_from_user_proc(&sc, from, sizeof(sc));
- err |= copy_from_user_proc(fpregs, sc.fpstate, sizeof(fpregs));
- if(err)
- return(err);
-
- regs->skas.regs[GS] = sc.gs;
- regs->skas.regs[FS] = sc.fs;
- regs->skas.regs[ES] = sc.es;
- regs->skas.regs[DS] = sc.ds;
- regs->skas.regs[EDI] = sc.edi;
- regs->skas.regs[ESI] = sc.esi;
- regs->skas.regs[EBP] = sc.ebp;
- regs->skas.regs[UESP] = sc.esp;
- regs->skas.regs[EBX] = sc.ebx;
- regs->skas.regs[EDX] = sc.edx;
- regs->skas.regs[ECX] = sc.ecx;
- regs->skas.regs[EAX] = sc.eax;
- regs->skas.regs[EIP] = sc.eip;
- regs->skas.regs[CS] = sc.cs;
- regs->skas.regs[EFL] = sc.eflags;
- regs->skas.regs[SS] = sc.ss;
- regs->skas.fault_addr = sc.cr2;
- regs->skas.fault_type = FAULT_WRITE(sc.err);
- regs->skas.trap_type = sc.trapno;
-
- err = ptrace(PTRACE_SETFPREGS, pid, 0, fpregs);
- if(err < 0){
- printk("copy_sc_to_user - PTRACE_SETFPREGS failed, "
- "errno = %d\n", errno);
- return(1);
- }
-
- return(0);
-}
-
-int copy_sc_to_user_skas(int pid, void *to_ptr, void *fp,
- union uml_pt_regs *regs, unsigned long fault_addr,
- int fault_type)
-{
- struct sigcontext sc, *to = to_ptr;
- struct _fpstate *to_fp;
- unsigned long fpregs[FP_FRAME_SIZE];
- int err;
-
- sc.gs = regs->skas.regs[GS];
- sc.fs = regs->skas.regs[FS];
- sc.es = regs->skas.regs[ES];
- sc.ds = regs->skas.regs[DS];
- sc.edi = regs->skas.regs[EDI];
- sc.esi = regs->skas.regs[ESI];
- sc.ebp = regs->skas.regs[EBP];
- sc.esp = regs->skas.regs[UESP];
- sc.ebx = regs->skas.regs[EBX];
- sc.edx = regs->skas.regs[EDX];
- sc.ecx = regs->skas.regs[ECX];
- sc.eax = regs->skas.regs[EAX];
- sc.eip = regs->skas.regs[EIP];
- sc.cs = regs->skas.regs[CS];
- sc.eflags = regs->skas.regs[EFL];
- sc.esp_at_signal = regs->skas.regs[UESP];
- sc.ss = regs->skas.regs[SS];
- sc.cr2 = fault_addr;
- sc.err = TO_SC_ERR(fault_type);
- sc.trapno = regs->skas.trap_type;
-
- err = ptrace(PTRACE_GETFPREGS, pid, 0, fpregs);
- if(err < 0){
- printk("copy_sc_to_user - PTRACE_GETFPREGS failed, "
- "errno = %d\n", errno);
- return(1);
- }
- to_fp = (struct _fpstate *)
- (fp ? (unsigned long) fp : ((unsigned long) to + sizeof(*to)));
- sc.fpstate = to_fp;
-
- if(err)
- return(err);
-
- return(copy_to_user_proc(to, &sc, sizeof(sc)) ||
- copy_to_user_proc(to_fp, fpregs, sizeof(fpregs)));
-}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-#include <stdio.h>
-#include <asm/ptrace.h>
-#include <asm/user.h>
-
-#define PRINT_REG(name, val) printf("#define HOST_%s %d\n", (name), (val))
-
-int main(int argc, char **argv)
-{
- printf("/* Automatically generated by "
- "arch/um/kernel/skas/util/mk_ptregs */\n");
- printf("\n");
- printf("#ifndef __SKAS_PT_REGS_\n");
- printf("#define __SKAS_PT_REGS_\n");
- printf("\n");
- printf("#define HOST_FRAME_SIZE %d\n", FRAME_SIZE);
- printf("#define HOST_FP_SIZE %d\n",
- sizeof(struct user_i387_struct) / sizeof(unsigned long));
- printf("#define HOST_XFP_SIZE %d\n",
- sizeof(struct user_fxsr_struct) / sizeof(unsigned long));
-
- PRINT_REG("IP", EIP);
- PRINT_REG("SP", UESP);
- PRINT_REG("EFLAGS", EFL);
- PRINT_REG("EAX", EAX);
- PRINT_REG("EBX", EBX);
- PRINT_REG("ECX", ECX);
- PRINT_REG("EDX", EDX);
- PRINT_REG("ESI", ESI);
- PRINT_REG("EDI", EDI);
- PRINT_REG("EBP", EBP);
- PRINT_REG("CS", CS);
- PRINT_REG("SS", SS);
- PRINT_REG("DS", DS);
- PRINT_REG("FS", FS);
- PRINT_REG("ES", ES);
- PRINT_REG("GS", GS);
- printf("\n");
- printf("#endif\n");
- return(0);
-}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __TT_MMU_H
-#define __TT_MMU_H
-
-struct mmu_context_tt {
-};
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __MODE_TT_H__
-#define __MODE_TT_H__
-
-#include "sysdep/ptrace.h"
-
-enum { OP_NONE, OP_EXEC, OP_FORK, OP_TRACE_ON, OP_REBOOT, OP_HALT, OP_CB };
-
-extern int tracing_pid;
-
-extern int tracer(int (*init_proc)(void *), void *sp);
-extern void user_time_init_tt(void);
-extern int copy_sc_from_user_tt(void *to_ptr, void *from_ptr, void *data);
-extern int copy_sc_to_user_tt(void *to_ptr, void *fp, void *from_ptr,
- void *data);
-extern void sig_handler_common_tt(int sig, void *sc);
-extern void syscall_handler_tt(int sig, union uml_pt_regs *regs);
-extern void reboot_tt(void);
-extern void halt_tt(void);
-extern int is_tracer_winch(int pid, int fd, void *data);
-extern void kill_off_processes_tt(void);
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __TT_MODE_KERN_H__
-#define __TT_MODE_KERN_H__
-
-#include "linux/sched.h"
-#include "asm/page.h"
-#include "asm/ptrace.h"
-#include "asm/uaccess.h"
-
-extern void *switch_to_tt(void *prev, void *next);
-extern void flush_thread_tt(void);
-extern void start_thread_tt(struct pt_regs *regs, unsigned long eip,
- unsigned long esp);
-extern int copy_thread_tt(int nr, unsigned long clone_flags, unsigned long sp,
- unsigned long stack_top, struct task_struct *p,
- struct pt_regs *regs);
-extern void release_thread_tt(struct task_struct *task);
-extern void exit_thread_tt(void);
-extern void initial_thread_cb_tt(void (*proc)(void *), void *arg);
-extern void init_idle_tt(void);
-extern void flush_tlb_kernel_range_tt(unsigned long start, unsigned long end);
-extern void flush_tlb_kernel_vm_tt(void);
-extern void __flush_tlb_one_tt(unsigned long addr);
-extern void flush_tlb_range_tt(struct vm_area_struct *vma,
- unsigned long start, unsigned long end);
-extern void flush_tlb_mm_tt(struct mm_struct *mm);
-extern void force_flush_all_tt(void);
-extern long execute_syscall_tt(void *r);
-extern void before_mem_tt(unsigned long brk_start);
-extern unsigned long set_task_sizes_tt(int arg, unsigned long *host_size_out,
- unsigned long *task_size_out);
-extern int start_uml_tt(void);
-extern int external_pid_tt(struct task_struct *task);
-extern int thread_pid_tt(struct task_struct *task);
-
-#define kmem_end_tt (host_task_size - ABOVE_KMEM)
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __PTRACE_TT_H
-#define __PTRACE_TT_H
-
-#include "uml-config.h"
-
-#ifdef UML_CONFIG_MODE_TT
-#include "sysdep/sc.h"
-#endif
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2000 - 2003 Jeff Dike (jdike@addtoit.com)
- * Licensed under the GPL
- */
-
-#ifndef __TT_UACCESS_H
-#define __TT_UACCESS_H
-
-#include "linux/string.h"
-#include "linux/sched.h"
-#include "asm/processor.h"
-#include "asm/errno.h"
-#include "asm/current.h"
-#include "asm/a.out.h"
-#include "uml_uaccess.h"
-
-#define ABOVE_KMEM (16 * 1024 * 1024)
-
-extern unsigned long end_vm;
-extern unsigned long uml_physmem;
-
-#define under_task_size(addr, size) \
- (((unsigned long) (addr) < TASK_SIZE) && \
- (((unsigned long) (addr) + (size)) < TASK_SIZE))
-
-#define is_stack(addr, size) \
- (((unsigned long) (addr) < STACK_TOP) && \
- ((unsigned long) (addr) >= STACK_TOP - ABOVE_KMEM) && \
- (((unsigned long) (addr) + (size)) <= STACK_TOP))
-
-#define access_ok_tt(type, addr, size) \
- ((type == VERIFY_READ) || (segment_eq(get_fs(), KERNEL_DS)) || \
- (((unsigned long) (addr) <= ((unsigned long) (addr) + (size))) && \
- (under_task_size(addr, size) || is_stack(addr, size))))
-
-static inline int verify_area_tt(int type, const void * addr,
- unsigned long size)
-{
- return(access_ok_tt(type, addr, size) ? 0 : -EFAULT);
-}
-
-extern unsigned long get_fault_addr(void);
-
-extern int __do_copy_from_user(void *to, const void *from, int n,
- void **fault_addr, void **fault_catcher);
-extern int __do_strncpy_from_user(char *dst, const char *src, size_t n,
- void **fault_addr, void **fault_catcher);
-extern int __do_clear_user(void *mem, size_t len, void **fault_addr,
- void **fault_catcher);
-extern int __do_strnlen_user(const char *str, unsigned long n,
- void **fault_addr, void **fault_catcher);
-
-extern int copy_from_user_tt(void *to, const void *from, int n);
-extern int copy_to_user_tt(void *to, const void *from, int n);
-extern int strncpy_from_user_tt(char *dst, const char *src, int count);
-extern int __clear_user_tt(void *mem, int len);
-extern int clear_user_tt(void *mem, int len);
-extern int strnlen_user_tt(const void *str, int len);
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-#
-# Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
-# Licensed under the GPL
-#
-
-obj-y = sigcontext.o
-
-USER_OBJS = sigcontext.o
-USER_OBJS := $(foreach file,$(USER_OBJS),$(obj)/$(file))
-
-$(USER_OBJS) : %.o: %.c
- $(CC) $(CFLAGS_$(notdir $@)) $(USER_CFLAGS) -c -o $@ $<
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#include <stdlib.h>
-#include <asm/sigcontext.h>
-#include "kern_util.h"
-#include "sysdep/frame.h"
-
-int copy_sc_from_user_tt(void *to_ptr, void *from_ptr, void *data)
-{
- struct arch_frame_data *arch = data;
- struct sigcontext *to = to_ptr, *from = from_ptr;
- struct _fpstate *to_fp, *from_fp;
- unsigned long sigs;
- int err;
-
- to_fp = to->fpstate;
- from_fp = from->fpstate;
- sigs = to->oldmask;
- err = copy_from_user_proc(to, from, sizeof(*to));
- to->oldmask = sigs;
- if(to_fp != NULL){
- err |= copy_from_user_proc(&to->fpstate, &to_fp,
- sizeof(to->fpstate));
- err |= copy_from_user_proc(to_fp, from_fp, arch->fpstate_size);
- }
- return(err);
-}
-
-int copy_sc_to_user_tt(void *to_ptr, void *fp, void *from_ptr, void *data)
-{
- struct arch_frame_data *arch = data;
- struct sigcontext *to = to_ptr, *from = from_ptr;
- struct _fpstate *to_fp, *from_fp;
- int err;
-
- to_fp = (struct _fpstate *)
- (fp ? (unsigned long) fp : ((unsigned long) to + sizeof(*to)));
- from_fp = from->fpstate;
- err = copy_to_user_proc(to, from, sizeof(*to));
- if(from_fp != NULL){
- err |= copy_to_user_proc(&to->fpstate, &to_fp,
- sizeof(to->fpstate));
- err |= copy_to_user_proc(to_fp, from_fp, arch->fpstate_size);
- }
- return(err);
-}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-#include <stdio.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <dirent.h>
-#include <errno.h>
-#include <utime.h>
-#include <string.h>
-#include <sys/stat.h>
-#include <sys/vfs.h>
-#include <sys/ioctl.h>
-#include "user_util.h"
-#include "mem_user.h"
-#include "uml-config.h"
-
-/* Had to steal this from linux/module.h because that file can't be included
- * since this includes various user-level headers.
- */
-
-struct module_symbol
-{
- unsigned long value;
- const char *name;
-};
-
-/* Indirect stringification. */
-
-#define __MODULE_STRING_1(x) #x
-#define __MODULE_STRING(x) __MODULE_STRING_1(x)
-
-#if !defined(__AUTOCONF_INCLUDED__)
-
-#define __EXPORT_SYMBOL(sym,str) error config_must_be_included_before_module
-#define EXPORT_SYMBOL(var) error config_must_be_included_before_module
-#define EXPORT_SYMBOL_NOVERS(var) error config_must_be_included_before_module
-
-#elif !defined(UML_CONFIG_MODULES)
-
-#define __EXPORT_SYMBOL(sym,str)
-#define EXPORT_SYMBOL(var)
-#define EXPORT_SYMBOL_NOVERS(var)
-
-#else
-
-#define __EXPORT_SYMBOL(sym, str) \
-const char __kstrtab_##sym[] \
-__attribute__((section(".kstrtab"))) = str; \
-const struct module_symbol __ksymtab_##sym \
-__attribute__((section("__ksymtab"))) = \
-{ (unsigned long)&sym, __kstrtab_##sym }
-
-#if defined(__MODVERSIONS__) || !defined(UML_CONFIG_MODVERSIONS)
-#define EXPORT_SYMBOL(var) __EXPORT_SYMBOL(var, __MODULE_STRING(var))
-#else
-#define EXPORT_SYMBOL(var) __EXPORT_SYMBOL(var, __MODULE_STRING(__VERSIONED_SYMBOL(var)))
-#endif
-
-#define EXPORT_SYMBOL_NOVERS(var) __EXPORT_SYMBOL(var, __MODULE_STRING(var))
-
-#endif
-
-EXPORT_SYMBOL(__errno_location);
-
-EXPORT_SYMBOL(access);
-EXPORT_SYMBOL(open);
-EXPORT_SYMBOL(open64);
-EXPORT_SYMBOL(close);
-EXPORT_SYMBOL(read);
-EXPORT_SYMBOL(write);
-EXPORT_SYMBOL(dup2);
-EXPORT_SYMBOL(__xstat);
-EXPORT_SYMBOL(__lxstat);
-EXPORT_SYMBOL(__lxstat64);
-EXPORT_SYMBOL(lseek);
-EXPORT_SYMBOL(lseek64);
-EXPORT_SYMBOL(chown);
-EXPORT_SYMBOL(truncate);
-EXPORT_SYMBOL(utime);
-EXPORT_SYMBOL(chmod);
-EXPORT_SYMBOL(rename);
-EXPORT_SYMBOL(__xmknod);
-
-EXPORT_SYMBOL(symlink);
-EXPORT_SYMBOL(link);
-EXPORT_SYMBOL(unlink);
-EXPORT_SYMBOL(readlink);
-
-EXPORT_SYMBOL(mkdir);
-EXPORT_SYMBOL(rmdir);
-EXPORT_SYMBOL(opendir);
-EXPORT_SYMBOL(readdir);
-EXPORT_SYMBOL(closedir);
-EXPORT_SYMBOL(seekdir);
-EXPORT_SYMBOL(telldir);
-
-EXPORT_SYMBOL(ioctl);
-
-extern ssize_t pread64 (int __fd, void *__buf, size_t __nbytes,
- __off64_t __offset);
-extern ssize_t pwrite64 (int __fd, __const void *__buf, size_t __n,
- __off64_t __offset);
-EXPORT_SYMBOL(pread64);
-EXPORT_SYMBOL(pwrite64);
-
-EXPORT_SYMBOL(statfs);
-EXPORT_SYMBOL(statfs64);
-
-EXPORT_SYMBOL(memcpy);
-EXPORT_SYMBOL(getuid);
-
-EXPORT_SYMBOL(memset);
-EXPORT_SYMBOL(strstr);
-
-EXPORT_SYMBOL(find_iomem);
+++ /dev/null
-#include <asm-generic/vmlinux.lds.h>
-
-OUTPUT_FORMAT(ELF_FORMAT)
-OUTPUT_ARCH(ELF_ARCH)
-ENTRY(_start)
-jiffies = jiffies_64;
-
-SECTIONS
-{
-#include "asm/common.lds.S"
-}
+++ /dev/null
-/*
- * Copyright (C) 2000, 2001 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#include <unistd.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <signal.h>
-#include <sys/resource.h>
-#include <sys/mman.h>
-#include <sys/user.h>
-#include <asm/page.h>
-#include "user_util.h"
-#include "kern_util.h"
-#include "mem_user.h"
-#include "signal_user.h"
-#include "user.h"
-#include "init.h"
-#include "mode.h"
-#include "choose-mode.h"
-#include "uml-config.h"
-
-/* Set in set_stklim, which is called from main and __wrap_malloc.
- * __wrap_malloc only calls it if main hasn't started.
- */
-unsigned long stacksizelim;
-
-/* Set in main */
-char *linux_prog;
-
-#define PGD_BOUND (4 * 1024 * 1024)
-#define STACKSIZE (8 * 1024 * 1024)
-#define THREAD_NAME_LEN (256)
-
-static void set_stklim(void)
-{
- struct rlimit lim;
-
- if(getrlimit(RLIMIT_STACK, &lim) < 0){
- perror("getrlimit");
- exit(1);
- }
- if((lim.rlim_cur == RLIM_INFINITY) || (lim.rlim_cur > STACKSIZE)){
- lim.rlim_cur = STACKSIZE;
- if(setrlimit(RLIMIT_STACK, &lim) < 0){
- perror("setrlimit");
- exit(1);
- }
- }
- stacksizelim = (lim.rlim_cur + PGD_BOUND - 1) & ~(PGD_BOUND - 1);
-}
-
-static __init void do_uml_initcalls(void)
-{
- initcall_t *call;
-
- call = &__uml_initcall_start;
- while (call < &__uml_initcall_end){;
- (*call)();
- call++;
- }
-}
-
-static void last_ditch_exit(int sig)
-{
- CHOOSE_MODE(kmalloc_ok = 0, (void) 0);
- signal(SIGINT, SIG_DFL);
- signal(SIGTERM, SIG_DFL);
- signal(SIGHUP, SIG_DFL);
- uml_cleanup();
- exit(1);
-}
-
-extern int uml_exitcode;
-
-int main(int argc, char **argv, char **envp)
-{
- char **new_argv;
- sigset_t mask;
- int ret, i;
-
- /* Enable all signals except SIGIO - in some environments, we can
- * enter with some signals blocked
- */
-
- sigemptyset(&mask);
- sigaddset(&mask, SIGIO);
- if(sigprocmask(SIG_SETMASK, &mask, NULL) < 0){
- perror("sigprocmask");
- exit(1);
- }
-
-#ifdef UML_CONFIG_MODE_TT
- /* Allocate memory for thread command lines */
- if(argc < 2 || strlen(argv[1]) < THREAD_NAME_LEN - 1){
-
- char padding[THREAD_NAME_LEN] = {
- [ 0 ... THREAD_NAME_LEN - 2] = ' ', '\0'
- };
-
- new_argv = malloc((argc + 2) * sizeof(char*));
- if(!new_argv) {
- perror("Allocating extended argv");
- exit(1);
- }
-
- new_argv[0] = argv[0];
- new_argv[1] = padding;
-
- for(i = 2; i <= argc; i++)
- new_argv[i] = argv[i - 1];
- new_argv[argc + 1] = NULL;
-
- execvp(new_argv[0], new_argv);
- perror("execing with extended args");
- exit(1);
- }
-#endif
-
- linux_prog = argv[0];
-
- set_stklim();
-
- if((new_argv = malloc((argc + 1) * sizeof(char *))) == NULL){
- perror("Mallocing argv");
- exit(1);
- }
- for(i=0;i<argc;i++){
- if((new_argv[i] = strdup(argv[i])) == NULL){
- perror("Mallocing an arg");
- exit(1);
- }
- }
- new_argv[argc] = NULL;
-
- set_handler(SIGINT, last_ditch_exit, SA_ONESHOT | SA_NODEFER, -1);
- set_handler(SIGTERM, last_ditch_exit, SA_ONESHOT | SA_NODEFER, -1);
- set_handler(SIGHUP, last_ditch_exit, SA_ONESHOT | SA_NODEFER, -1);
-
- do_uml_initcalls();
- ret = linux_main(argc, argv);
-
- /* Reboot */
- if(ret){
- printf("\n");
- execvp(new_argv[0], new_argv);
- perror("Failed to exec kernel");
- ret = 1;
- }
- printf("\n");
- return(uml_exitcode);
-}
-
-#define CAN_KMALLOC() \
- (kmalloc_ok && CHOOSE_MODE((getpid() != tracing_pid), 1))
-
-extern void *__real_malloc(int);
-
-void *__wrap_malloc(int size)
-{
- if(CAN_KMALLOC())
- return(um_kmalloc(size));
- else
- return(__real_malloc(size));
-}
-
-void *__wrap_calloc(int n, int size)
-{
- void *ptr = __wrap_malloc(n * size);
-
- if(ptr == NULL) return(NULL);
- memset(ptr, 0, n * size);
- return(ptr);
-}
-
-extern void __real_free(void *);
-
-void __wrap_free(void *ptr)
-{
- if(CAN_KMALLOC()) kfree(ptr);
- else __real_free(ptr);
-}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * linux/arch/i386/mm/extable.c
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/spinlock.h>
-#include <asm/uaccess.h>
-
-/* Simple binary search */
-const struct exception_table_entry *
-search_extable(const struct exception_table_entry *first,
- const struct exception_table_entry *last,
- unsigned long value)
-{
- while (first <= last) {
- const struct exception_table_entry *mid;
- long diff;
-
- mid = (last - first) / 2 + first;
- diff = mid->insn - value;
- if (diff == 0)
- return mid;
- else if (diff < 0)
- first = mid+1;
- else
- last = mid-1;
- }
- return NULL;
-}
+++ /dev/null
-#include <asm-generic/vmlinux.lds.h>
-
-OUTPUT_FORMAT(ELF_FORMAT)
-OUTPUT_ARCH(ELF_ARCH)
-ENTRY(_start)
-jiffies = jiffies_64;
-
-SECTIONS
-{
- . = START + SIZEOF_HEADERS;
-
- . = ALIGN(4096);
- __binary_start = .;
-#ifdef MODE_TT
- .thread_private : {
- __start_thread_private = .;
- errno = .;
- . += 4;
- arch/um/kernel/tt/unmap_fin.o (.data)
- __end_thread_private = .;
- }
- . = ALIGN(4096);
- .remap : { arch/um/kernel/tt/unmap_fin.o (.text) }
-#endif
-
- . = ALIGN(4096); /* Init code and data */
- _stext = .;
- __init_begin = .;
- .text.init : { *(.text.init) }
- . = ALIGN(4096);
- .text :
- {
- *(.text)
- /* .gnu.warning sections are handled specially by elf32.em. */
- *(.gnu.warning)
- *(.gnu.linkonce.t*)
- }
-
- #include "asm/common.lds.S"
-
- .data.init : { *(.data.init) }
- .data :
- {
- . = ALIGN(KERNEL_STACK_SIZE); /* init_task */
- *(.data.init_task)
- *(.data)
- *(.gnu.linkonce.d*)
- CONSTRUCTORS
- }
- .data1 : { *(.data1) }
- .ctors :
- {
- *(.ctors)
- }
- .dtors :
- {
- *(.dtors)
- }
-
- .got : { *(.got.plt) *(.got) }
- .dynamic : { *(.dynamic) }
- /* We want the small data sections together, so single-instruction offsets
- can access them all, and initialized data all before uninitialized, so
- we can shorten the on-disk segment size. */
- .sdata : { *(.sdata) }
- _edata = .;
- PROVIDE (edata = .);
- . = ALIGN(0x1000);
- .sbss :
- {
- __bss_start = .;
- PROVIDE(_bss_start = .);
- *(.sbss)
- *(.scommon)
- }
- .bss :
- {
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
- /* Stabs debugging sections. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- .comment 0 : { *(.comment) }
-}
+++ /dev/null
-#
-# Makefile for the linux kernel.
-#
-
-extra-y := head.o head64.o init_task.o vmlinux.lds.s
-EXTRA_AFLAGS := -traditional
-obj-y := process.o semaphore.o signal.o entry.o traps.o irq.o \
- ptrace.o i8259.o ioport.o ldt.o setup.o time.o sys_x86_64.o \
- x8664_ksyms.o i387.o syscall.o vsyscall.o \
- setup64.o bootflag.o e820.o reboot.o warmreboot.o
-obj-y += mce.o
-
-obj-$(CONFIG_MTRR) += ../../i386/kernel/cpu/mtrr/
-obj-$(CONFIG_ACPI_BOOT) += acpi/
-obj-$(CONFIG_X86_MSR) += msr.o
-obj-$(CONFIG_MICROCODE) += microcode.o
-obj-$(CONFIG_X86_CPUID) += cpuid.o
-obj-$(CONFIG_SMP) += smp.o smpboot.o trampoline.o
-obj-$(CONFIG_X86_LOCAL_APIC) += apic.o nmi.o
-obj-$(CONFIG_X86_IO_APIC) += io_apic.o mpparse.o
-obj-$(CONFIG_PM) += suspend.o
-obj-$(CONFIG_SOFTWARE_SUSPEND) += suspend_asm.o
-obj-$(CONFIG_CPU_FREQ) += cpufreq/
-obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-obj-$(CONFIG_GART_IOMMU) += pci-gart.o aperture.o
-obj-$(CONFIG_DUMMY_IOMMU) += pci-nommu.o pci-dma.o
-obj-$(CONFIG_SWIOTLB) += swiotlb.o
-obj-$(CONFIG_SCHED_SMT) += domain.o
-
-obj-$(CONFIG_MODULES) += module.o
-
-obj-y += topology.o
-
-bootflag-y += ../../i386/kernel/bootflag.o
-cpuid-$(subst m,y,$(CONFIG_X86_CPUID)) += ../../i386/kernel/cpuid.o
-topology-y += ../../i386/mach-default/topology.o
-swiotlb-$(CONFIG_SWIOTLB) += ../../ia64/lib/swiotlb.o
-microcode-$(subst m,y,$(CONFIG_MICROCODE)) += ../../i386/kernel/microcode.o
+++ /dev/null
-#include <linux/init.h>
-#include <linux/sched.h>
-
-/* Don't do any NUMA setup on Opteron right now. They seem to be
- better off with flat scheduling. This is just for SMT. */
-
-#ifdef CONFIG_SCHED_SMT
-
-static struct sched_group sched_group_cpus[NR_CPUS];
-static struct sched_group sched_group_phys[NR_CPUS];
-static DEFINE_PER_CPU(struct sched_domain, cpu_domains);
-static DEFINE_PER_CPU(struct sched_domain, phys_domains);
-__init void arch_init_sched_domains(void)
-{
- int i;
- struct sched_group *first = NULL, *last = NULL;
-
- /* Set up domains */
- for_each_cpu(i) {
- struct sched_domain *cpu_domain = &per_cpu(cpu_domains, i);
- struct sched_domain *phys_domain = &per_cpu(phys_domains, i);
-
- *cpu_domain = SD_SIBLING_INIT;
- /* Disable SMT NICE for CMP */
- /* RED-PEN use a generic flag */
- if (cpu_data[i].x86_vendor == X86_VENDOR_AMD)
- cpu_domain->flags &= ~SD_SHARE_CPUPOWER;
- cpu_domain->span = cpu_sibling_map[i];
- cpu_domain->parent = phys_domain;
- cpu_domain->groups = &sched_group_cpus[i];
-
- *phys_domain = SD_CPU_INIT;
- phys_domain->span = cpu_possible_map;
- phys_domain->groups = &sched_group_phys[first_cpu(cpu_domain->span)];
- }
-
- /* Set up CPU (sibling) groups */
- for_each_cpu(i) {
- struct sched_domain *cpu_domain = &per_cpu(cpu_domains, i);
- int j;
- first = last = NULL;
-
- if (i != first_cpu(cpu_domain->span))
- continue;
-
- for_each_cpu_mask(j, cpu_domain->span) {
- struct sched_group *cpu = &sched_group_cpus[j];
-
- cpus_clear(cpu->cpumask);
- cpu_set(j, cpu->cpumask);
- cpu->cpu_power = SCHED_LOAD_SCALE;
-
- if (!first)
- first = cpu;
- if (last)
- last->next = cpu;
- last = cpu;
- }
- last->next = first;
- }
-
- first = last = NULL;
- /* Set up physical groups */
- for_each_cpu(i) {
- struct sched_domain *cpu_domain = &per_cpu(cpu_domains, i);
- struct sched_group *cpu = &sched_group_phys[i];
-
- if (i != first_cpu(cpu_domain->span))
- continue;
-
- cpu->cpumask = cpu_domain->span;
- /*
- * Make each extra sibling increase power by 10% of
- * the basic CPU. This is very arbitrary.
- */
- cpu->cpu_power = SCHED_LOAD_SCALE + SCHED_LOAD_SCALE*(cpus_weight(cpu->cpumask)-1) / 10;
-
- if (!first)
- first = cpu;
- if (last)
- last->next = cpu;
- last = cpu;
- }
- last->next = first;
-
- mb();
- for_each_cpu(i) {
- struct sched_domain *cpu_domain = &per_cpu(cpu_domains, i);
- cpu_attach_domain(cpu_domain, i);
- }
-}
-
-#endif
+++ /dev/null
-/*
- * Switch back to real mode and call the BIOS reboot vector.
- * This is a trampoline copied around in process.c
- * Written 2003 by Andi Kleen, SuSE Labs.
- */
-
-#include <asm/msr.h>
-
-#define R(x) x-warm_reboot(%ebx)
-#define R64(x) x-warm_reboot(%rbx)
-
- /* running in identity mapping and in the first 64k of memory
- and in compatibility mode. This must be position independent */
-
- /* Follows 14.7 "Leaving Long Mode" in the AMD x86-64 manual, volume 2
- and 8.9.2 "Switching Back to Real-Address Mode" in the Intel IA32
- manual, volume 2 */
-
- /* ebx: self pointer to warm_reboot */
-
- .globl warm_reboot
-warm_reboot:
- addl %ebx, R64(real_mode_desc) /* relocate tables */
- addl %ebx,2+R64(warm_gdt_desc)
-
- movq %cr0,%rax
- btr $31,%rax
- movq %rax,%cr0 /* disable paging */
- jmp 1f /* flush prefetch queue */
-
- .code32
-1: movl $MSR_EFER,%ecx
- rdmsr
- andl $~((1<<_EFER_LME)|(1<<_EFER_SCE)|(1<<_EFER_NX)),%eax
- wrmsr /* disable long mode in EFER */
-
- xorl %eax,%eax
- movl %eax,%cr3 /* flush tlb */
-
- /* Running protected mode without paging now */
-
- wbinvd /* flush caches. Needed? */
-
- lidt R(warm_idt_desc)
- lgdt R(warm_gdt_desc)
-
- movl $0x10,%ecx /* load segment registers with real mode settings */
- movl %ecx,%ds
- movl %ecx,%es
- movl %ecx,%fs
- movl %ecx,%gs
- movl %ecx,%ss
-
- lea R(real_mode_desc),%eax
- ljmp *(%eax)
-
- .code16:
-real_mode:
- xorl %eax,%eax
- movl %eax,%cr0
-
- /* some people claim $0xf000,0xfff0 is better. Use what 32bit linux uses. */
- /* code as bytes because gas has problems with it */
- .byte 0xea,0xf0,0xff,0x00,0xf0 /* ljmp 0xf000:0xfff0 */
-
-real_mode_desc:
- .long real_mode - warm_reboot
- .short 8
-warm_gdt_desc:
- .short 8*3
- .long warm_gdt - warm_reboot
-warm_gdt:
- .quad 0
- .quad 0x00009a000000ffff /* 16-bit real-mode 64k code at 0x00000000 */
- .quad 0x000092000100ffff /* 16-bit real-mode 64k data at 0x00000100 */
-
-warm_idt_desc:
- .short 0x3ff
- .long 0
-
- .globl warm_reboot_end
-warm_reboot_end:
-
+++ /dev/null
-/*
- * Temporal C versions of the checksum functions until optimized assembler versions
- * can go in.
- */
-
-#include <net/checksum.h>
-
-/*
- * Copy from userspace and compute checksum. If we catch an exception
- * then zero the rest of the buffer.
- */
-unsigned int csum_partial_copy_from_user (const char *src, char *dst,
- int len, unsigned int sum,
- int *err_ptr)
-{
- int missing;
-
- missing = copy_from_user(dst, src, len);
- if (missing) {
- memset(dst + len - missing, 0, missing);
- *err_ptr = -EFAULT;
- }
-
- return csum_partial(dst, len, sum);
-}
-
-unsigned int csum_partial_copy_nocheck(const char *src, char *dst, int len, unsigned int sum)
-{
- memcpy(dst,src,len);
- return csum_partial(dst,len,sum);
-}
-
-/* Fallback for csum_and_copy_to_user is currently in include/net/checksum.h */
+++ /dev/null
-/*
- * acpi_ksyms.c - ACPI Kernel Symbols ($Revision: 16 $)
- *
- * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
- * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- */
-
-#include <linux/module.h>
-#include <linux/acpi.h>
-#include <acpi/acpi.h>
-#include <acpi/acpi_bus.h>
-
-
-#ifdef CONFIG_ACPI_INTERPRETER
-
-/* ACPI Debugger */
-
-#ifdef ENABLE_DEBUGGER
-
-extern int acpi_in_debugger;
-
-EXPORT_SYMBOL(acpi_in_debugger);
-EXPORT_SYMBOL(acpi_db_user_commands);
-
-#endif /* ENABLE_DEBUGGER */
-
-/* ACPI Core Subsystem */
-
-#ifdef ACPI_DEBUG_OUTPUT
-EXPORT_SYMBOL(acpi_dbg_layer);
-EXPORT_SYMBOL(acpi_dbg_level);
-EXPORT_SYMBOL(acpi_ut_debug_print_raw);
-EXPORT_SYMBOL(acpi_ut_debug_print);
-EXPORT_SYMBOL(acpi_ut_status_exit);
-EXPORT_SYMBOL(acpi_ut_value_exit);
-EXPORT_SYMBOL(acpi_ut_exit);
-EXPORT_SYMBOL(acpi_ut_trace);
-#endif /*ACPI_DEBUG_OUTPUT*/
-
-EXPORT_SYMBOL(acpi_get_handle);
-EXPORT_SYMBOL(acpi_get_parent);
-EXPORT_SYMBOL(acpi_get_type);
-EXPORT_SYMBOL(acpi_get_name);
-EXPORT_SYMBOL(acpi_get_object_info);
-EXPORT_SYMBOL(acpi_get_next_object);
-EXPORT_SYMBOL(acpi_evaluate_object);
-EXPORT_SYMBOL(acpi_get_table);
-EXPORT_SYMBOL(acpi_get_firmware_table);
-EXPORT_SYMBOL(acpi_install_notify_handler);
-EXPORT_SYMBOL(acpi_remove_notify_handler);
-EXPORT_SYMBOL(acpi_install_gpe_handler);
-EXPORT_SYMBOL(acpi_remove_gpe_handler);
-EXPORT_SYMBOL(acpi_install_address_space_handler);
-EXPORT_SYMBOL(acpi_remove_address_space_handler);
-EXPORT_SYMBOL(acpi_install_fixed_event_handler);
-EXPORT_SYMBOL(acpi_remove_fixed_event_handler);
-EXPORT_SYMBOL(acpi_acquire_global_lock);
-EXPORT_SYMBOL(acpi_release_global_lock);
-EXPORT_SYMBOL(acpi_install_gpe_block);
-EXPORT_SYMBOL(acpi_remove_gpe_block);
-EXPORT_SYMBOL(acpi_get_current_resources);
-EXPORT_SYMBOL(acpi_get_possible_resources);
-EXPORT_SYMBOL(acpi_walk_resources);
-EXPORT_SYMBOL(acpi_set_current_resources);
-EXPORT_SYMBOL(acpi_resource_to_address64);
-EXPORT_SYMBOL(acpi_enable_event);
-EXPORT_SYMBOL(acpi_disable_event);
-EXPORT_SYMBOL(acpi_clear_event);
-EXPORT_SYMBOL(acpi_set_gpe_type);
-EXPORT_SYMBOL(acpi_enable_gpe);
-EXPORT_SYMBOL(acpi_get_timer_duration);
-EXPORT_SYMBOL(acpi_get_timer);
-EXPORT_SYMBOL(acpi_get_sleep_type_data);
-EXPORT_SYMBOL(acpi_get_register);
-EXPORT_SYMBOL(acpi_set_register);
-EXPORT_SYMBOL(acpi_enter_sleep_state);
-EXPORT_SYMBOL(acpi_enter_sleep_state_s4bios);
-EXPORT_SYMBOL(acpi_get_system_info);
-EXPORT_SYMBOL(acpi_get_devices);
-
-/* ACPI OS Services Layer (acpi_osl.c) */
-
-EXPORT_SYMBOL(acpi_os_free);
-EXPORT_SYMBOL(acpi_os_printf);
-EXPORT_SYMBOL(acpi_os_sleep);
-EXPORT_SYMBOL(acpi_os_stall);
-EXPORT_SYMBOL(acpi_os_signal);
-EXPORT_SYMBOL(acpi_os_queue_for_execution);
-EXPORT_SYMBOL(acpi_os_signal_semaphore);
-EXPORT_SYMBOL(acpi_os_create_semaphore);
-EXPORT_SYMBOL(acpi_os_delete_semaphore);
-EXPORT_SYMBOL(acpi_os_wait_semaphore);
-EXPORT_SYMBOL(acpi_os_wait_events_complete);
-EXPORT_SYMBOL(acpi_os_read_pci_configuration);
-
-/* ACPI Utilities (acpi_utils.c) */
-
-EXPORT_SYMBOL(acpi_extract_package);
-EXPORT_SYMBOL(acpi_evaluate_integer);
-EXPORT_SYMBOL(acpi_evaluate_reference);
-
-#endif /*CONFIG_ACPI_INTERPRETER*/
-
-
-/* ACPI Bus Driver (acpi_bus.c) */
-
-#ifdef CONFIG_ACPI_BUS
-
-EXPORT_SYMBOL(acpi_fadt);
-EXPORT_SYMBOL(acpi_walk_namespace);
-EXPORT_SYMBOL(acpi_root_dir);
-EXPORT_SYMBOL(acpi_bus_get_device);
-EXPORT_SYMBOL(acpi_bus_get_status);
-EXPORT_SYMBOL(acpi_bus_get_power);
-EXPORT_SYMBOL(acpi_bus_set_power);
-EXPORT_SYMBOL(acpi_bus_generate_event);
-EXPORT_SYMBOL(acpi_bus_receive_event);
-EXPORT_SYMBOL(acpi_bus_register_driver);
-EXPORT_SYMBOL(acpi_bus_unregister_driver);
-
-#endif /*CONFIG_ACPI_BUS*/
-
-
-/* ACPI PCI Driver (pci_irq.c) */
-
-#ifdef CONFIG_ACPI_PCI
-
-#include <linux/pci.h>
-extern int acpi_pci_irq_enable(struct pci_dev *dev);
-EXPORT_SYMBOL(acpi_pci_irq_enable);
-EXPORT_SYMBOL(acpi_pci_register_driver);
-EXPORT_SYMBOL(acpi_pci_unregister_driver);
-#endif /*CONFIG_ACPI_PCI */
-
-#ifdef CONFIG_ACPI_EC
-/* ACPI EC driver (ec.c) */
-
-EXPORT_SYMBOL(ec_read);
-EXPORT_SYMBOL(ec_write);
-#endif
-
+++ /dev/null
-/*
- * acpi_processor.c - ACPI Processor Driver ($Revision: 71 $)
- *
- * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
- * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
- * Copyright (C) 2004 Dominik Brodowski <linux@brodo.de>
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- * TBD:
- * 1. Make # power states dynamic.
- * 2. Support duty_cycle values that span bit 4.
- * 3. Optimize by having scheduler determine business instead of
- * having us try to calculate it here.
- * 4. Need C1 timing -- must modify kernel (IRQ handler) to get this.
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/pm.h>
-#include <linux/cpufreq.h>
-#include <linux/proc_fs.h>
-#include <linux/seq_file.h>
-#include <linux/dmi.h>
-#include <linux/moduleparam.h>
-
-#include <asm/io.h>
-#include <asm/system.h>
-#include <asm/delay.h>
-#include <asm/uaccess.h>
-#include <asm/processor.h>
-#include <asm/smp.h>
-#include <asm/acpi.h>
-
-#include <acpi/acpi_bus.h>
-#include <acpi/acpi_drivers.h>
-#include <acpi/processor.h>
-
-
-#define ACPI_PROCESSOR_COMPONENT 0x01000000
-#define ACPI_PROCESSOR_CLASS "processor"
-#define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver"
-#define ACPI_PROCESSOR_DEVICE_NAME "Processor"
-#define ACPI_PROCESSOR_FILE_INFO "info"
-#define ACPI_PROCESSOR_FILE_POWER "power"
-#define ACPI_PROCESSOR_FILE_THROTTLING "throttling"
-#define ACPI_PROCESSOR_FILE_LIMIT "limit"
-#define ACPI_PROCESSOR_FILE_PERFORMANCE "performance"
-#define ACPI_PROCESSOR_NOTIFY_PERFORMANCE 0x80
-#define ACPI_PROCESSOR_NOTIFY_POWER 0x81
-
-#define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
-#define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
-#define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
-
-
-#define ACPI_PROCESSOR_LIMIT_USER 0
-#define ACPI_PROCESSOR_LIMIT_THERMAL 1
-
-#define _COMPONENT ACPI_PROCESSOR_COMPONENT
-ACPI_MODULE_NAME ("acpi_processor")
-
-MODULE_AUTHOR("Paul Diefenbaugh");
-MODULE_DESCRIPTION(ACPI_PROCESSOR_DRIVER_NAME);
-MODULE_LICENSE("GPL");
-
-
-static int acpi_processor_add (struct acpi_device *device);
-static int acpi_processor_remove (struct acpi_device *device, int type);
-static int acpi_processor_info_open_fs(struct inode *inode, struct file *file);
-static int acpi_processor_throttling_open_fs(struct inode *inode, struct file *file);
-static int acpi_processor_power_open_fs(struct inode *inode, struct file *file);
-static int acpi_processor_limit_open_fs(struct inode *inode, struct file *file);
-static int acpi_processor_get_limit_info(struct acpi_processor *pr);
-
-static struct acpi_driver acpi_processor_driver = {
- .name = ACPI_PROCESSOR_DRIVER_NAME,
- .class = ACPI_PROCESSOR_CLASS,
- .ids = ACPI_PROCESSOR_HID,
- .ops = {
- .add = acpi_processor_add,
- .remove = acpi_processor_remove,
- },
-};
-
-
-struct acpi_processor_errata {
- u8 smp;
- struct {
- u8 throttle:1;
- u8 fdma:1;
- u8 reserved:6;
- u32 bmisx;
- } piix4;
-};
-
-static struct file_operations acpi_processor_info_fops = {
- .open = acpi_processor_info_open_fs,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static struct file_operations acpi_processor_power_fops = {
- .open = acpi_processor_power_open_fs,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static struct file_operations acpi_processor_throttling_fops = {
- .open = acpi_processor_throttling_open_fs,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static struct file_operations acpi_processor_limit_fops = {
- .open = acpi_processor_limit_open_fs,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static struct acpi_processor *processors[NR_CPUS];
-static struct acpi_processor_errata errata;
-static void (*pm_idle_save)(void);
-
-
-/* --------------------------------------------------------------------------
- Errata Handling
- -------------------------------------------------------------------------- */
-
-int
-acpi_processor_errata_piix4 (
- struct pci_dev *dev)
-{
- u8 rev = 0;
- u8 value1 = 0;
- u8 value2 = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_errata_piix4");
-
- if (!dev)
- return_VALUE(-EINVAL);
-
- /*
- * Note that 'dev' references the PIIX4 ACPI Controller.
- */
-
- pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
-
- switch (rev) {
- case 0:
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4 A-step\n"));
- break;
- case 1:
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4 B-step\n"));
- break;
- case 2:
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4E\n"));
- break;
- case 3:
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4M\n"));
- break;
- default:
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found unknown PIIX4\n"));
- break;
- }
-
- switch (rev) {
-
- case 0: /* PIIX4 A-step */
- case 1: /* PIIX4 B-step */
- /*
- * See specification changes #13 ("Manual Throttle Duty Cycle")
- * and #14 ("Enabling and Disabling Manual Throttle"), plus
- * erratum #5 ("STPCLK# Deassertion Time") from the January
- * 2002 PIIX4 specification update. Applies to only older
- * PIIX4 models.
- */
- errata.piix4.throttle = 1;
-
- case 2: /* PIIX4E */
- case 3: /* PIIX4M */
- /*
- * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
- * Livelock") from the January 2002 PIIX4 specification update.
- * Applies to all PIIX4 models.
- */
-
- /*
- * BM-IDE
- * ------
- * Find the PIIX4 IDE Controller and get the Bus Master IDE
- * Status register address. We'll use this later to read
- * each IDE controller's DMA status to make sure we catch all
- * DMA activity.
- */
- dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
- PCI_DEVICE_ID_INTEL_82371AB,
- PCI_ANY_ID, PCI_ANY_ID, NULL);
- if (dev) {
- errata.piix4.bmisx = pci_resource_start(dev, 4);
- pci_dev_put(dev);
- }
-
- /*
- * Type-F DMA
- * ----------
- * Find the PIIX4 ISA Controller and read the Motherboard
- * DMA controller's status to see if Type-F (Fast) DMA mode
- * is enabled (bit 7) on either channel. Note that we'll
- * disable C3 support if this is enabled, as some legacy
- * devices won't operate well if fast DMA is disabled.
- */
- dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
- PCI_DEVICE_ID_INTEL_82371AB_0,
- PCI_ANY_ID, PCI_ANY_ID, NULL);
- if (dev) {
- pci_read_config_byte(dev, 0x76, &value1);
- pci_read_config_byte(dev, 0x77, &value2);
- if ((value1 & 0x80) || (value2 & 0x80))
- errata.piix4.fdma = 1;
- pci_dev_put(dev);
- }
-
- break;
- }
-
- if (errata.piix4.bmisx)
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Bus master activity detection (BM-IDE) erratum enabled\n"));
- if (errata.piix4.fdma)
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Type-F DMA livelock erratum (C3 disabled)\n"));
-
- return_VALUE(0);
-}
-
-
-int
-acpi_processor_errata (
- struct acpi_processor *pr)
-{
- int result = 0;
- struct pci_dev *dev = NULL;
-
- ACPI_FUNCTION_TRACE("acpi_processor_errata");
-
- if (!pr)
- return_VALUE(-EINVAL);
-
- /*
- * PIIX4
- */
- dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
- PCI_DEVICE_ID_INTEL_82371AB_3, PCI_ANY_ID, PCI_ANY_ID, NULL);
- if (dev) {
- result = acpi_processor_errata_piix4(dev);
- pci_dev_put(dev);
- }
-
- return_VALUE(result);
-}
-
-
-/* --------------------------------------------------------------------------
- Power Management
- -------------------------------------------------------------------------- */
-
-static inline u32
-ticks_elapsed (
- u32 t1,
- u32 t2)
-{
- if (t2 >= t1)
- return (t2 - t1);
- else if (!acpi_fadt.tmr_val_ext)
- return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
- else
- return ((0xFFFFFFFF - t1) + t2);
-}
-
-
-static void
-acpi_processor_power_activate (
- struct acpi_processor *pr,
- int state)
-{
- if (!pr)
- return;
-
- pr->power.states[pr->power.state].promotion.count = 0;
- pr->power.states[pr->power.state].demotion.count = 0;
-
- /* Cleanup from old state. */
- switch (pr->power.state) {
- case ACPI_STATE_C3:
- /* Disable bus master reload */
- acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK);
- break;
- }
-
- /* Prepare to use new state. */
- switch (state) {
- case ACPI_STATE_C3:
- /* Enable bus master reload */
- acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1, ACPI_MTX_DO_NOT_LOCK);
- break;
- }
-
- pr->power.state = state;
-
- return;
-}
-
-
-static void
-acpi_processor_idle (void)
-{
- struct acpi_processor *pr = NULL;
- struct acpi_processor_cx *cx = NULL;
- unsigned int next_state = 0;
- unsigned int sleep_ticks = 0;
- u32 t1, t2 = 0;
-
- pr = processors[smp_processor_id()];
- if (!pr)
- return;
-
- /*
- * Interrupts must be disabled during bus mastering calculations and
- * for C2/C3 transitions.
- */
- local_irq_disable();
-
- /*
- * Check whether we truly need to go idle, or should
- * reschedule:
- */
- if (unlikely(need_resched())) {
- local_irq_enable();
- return;
- }
-
- cx = &(pr->power.states[pr->power.state]);
-
- /*
- * Check BM Activity
- * -----------------
- * Check for bus mastering activity (if required), record, and check
- * for demotion.
- */
- if (pr->flags.bm_check) {
- u32 bm_status = 0;
-
- pr->power.bm_activity <<= 1;
-
- acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS,
- &bm_status, ACPI_MTX_DO_NOT_LOCK);
- if (bm_status) {
- pr->power.bm_activity++;
- acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS,
- 1, ACPI_MTX_DO_NOT_LOCK);
- }
- /*
- * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
- * the true state of bus mastering activity; forcing us to
- * manually check the BMIDEA bit of each IDE channel.
- */
- else if (errata.piix4.bmisx) {
- if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
- || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
- pr->power.bm_activity++;
- }
- /*
- * Apply bus mastering demotion policy. Automatically demote
- * to avoid a faulty transition. Note that the processor
- * won't enter a low-power state during this call (to this
- * funciton) but should upon the next.
- *
- * TBD: A better policy might be to fallback to the demotion
- * state (use it for this quantum only) istead of
- * demoting -- and rely on duration as our sole demotion
- * qualification. This may, however, introduce DMA
- * issues (e.g. floppy DMA transfer overrun/underrun).
- */
- if (pr->power.bm_activity & cx->demotion.threshold.bm) {
- local_irq_enable();
- next_state = cx->demotion.state;
- goto end;
- }
- }
-
- cx->usage++;
-
- /*
- * Sleep:
- * ------
- * Invoke the current Cx state to put the processor to sleep.
- */
- switch (pr->power.state) {
-
- case ACPI_STATE_C1:
- /*
- * Invoke C1.
- * Use the appropriate idle routine, the one that would
- * be used without acpi C-states.
- */
- if (pm_idle_save)
- pm_idle_save();
- else
- safe_halt();
- /*
- * TBD: Can't get time duration while in C1, as resumes
- * go to an ISR rather than here. Need to instrument
- * base interrupt handler.
- */
- sleep_ticks = 0xFFFFFFFF;
- break;
-
- case ACPI_STATE_C2:
- /* Get start time (ticks) */
- t1 = inl(acpi_fadt.xpm_tmr_blk.address);
- /* Invoke C2 */
- inb(pr->power.states[ACPI_STATE_C2].address);
- /* Dummy op - must do something useless after P_LVL2 read */
- t2 = inl(acpi_fadt.xpm_tmr_blk.address);
- /* Get end time (ticks) */
- t2 = inl(acpi_fadt.xpm_tmr_blk.address);
- /* Re-enable interrupts */
- local_irq_enable();
- /* Compute time (ticks) that we were actually asleep */
- sleep_ticks = ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
- break;
-
- case ACPI_STATE_C3:
- /* Disable bus master arbitration */
- acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK);
- /* Get start time (ticks) */
- t1 = inl(acpi_fadt.xpm_tmr_blk.address);
- /* Invoke C3 */
- inb(pr->power.states[ACPI_STATE_C3].address);
- /* Dummy op - must do something useless after P_LVL3 read */
- t2 = inl(acpi_fadt.xpm_tmr_blk.address);
- /* Get end time (ticks) */
- t2 = inl(acpi_fadt.xpm_tmr_blk.address);
- /* Enable bus master arbitration */
- acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK);
- /* Re-enable interrupts */
- local_irq_enable();
- /* Compute time (ticks) that we were actually asleep */
- sleep_ticks = ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
- break;
-
- default:
- local_irq_enable();
- return;
- }
-
- next_state = pr->power.state;
-
- /*
- * Promotion?
- * ----------
- * Track the number of longs (time asleep is greater than threshold)
- * and promote when the count threshold is reached. Note that bus
- * mastering activity may prevent promotions.
- * Do not promote above max_cstate.
- */
- if (cx->promotion.state && (cx->promotion.state <= max_cstate)) {
- if (sleep_ticks > cx->promotion.threshold.ticks) {
- cx->promotion.count++;
- cx->demotion.count = 0;
- if (cx->promotion.count >= cx->promotion.threshold.count) {
- if (pr->flags.bm_check) {
- if (!(pr->power.bm_activity & cx->promotion.threshold.bm)) {
- next_state = cx->promotion.state;
- goto end;
- }
- }
- else {
- next_state = cx->promotion.state;
- goto end;
- }
- }
- }
- }
-
- /*
- * Demotion?
- * ---------
- * Track the number of shorts (time asleep is less than time threshold)
- * and demote when the usage threshold is reached.
- */
- if (cx->demotion.state) {
- if (sleep_ticks < cx->demotion.threshold.ticks) {
- cx->demotion.count++;
- cx->promotion.count = 0;
- if (cx->demotion.count >= cx->demotion.threshold.count) {
- next_state = cx->demotion.state;
- goto end;
- }
- }
- }
-
-end:
- /*
- * Demote if current state exceeds max_cstate
- */
- if (pr->power.state > max_cstate) {
- next_state = max_cstate;
- }
-
- /*
- * New Cx State?
- * -------------
- * If we're going to start using a new Cx state we must clean up
- * from the previous and prepare to use the new.
- */
- if (next_state != pr->power.state)
- acpi_processor_power_activate(pr, next_state);
-
- return;
-}
-
-
-static int
-acpi_processor_set_power_policy (
- struct acpi_processor *pr)
-{
- ACPI_FUNCTION_TRACE("acpi_processor_set_power_policy");
-
- /*
- * This function sets the default Cx state policy (OS idle handler).
- * Our scheme is to promote quickly to C2 but more conservatively
- * to C3. We're favoring C2 for its characteristics of low latency
- * (quick response), good power savings, and ability to allow bus
- * mastering activity. Note that the Cx state policy is completely
- * customizable and can be altered dynamically.
- */
-
- if (!pr)
- return_VALUE(-EINVAL);
-
- /*
- * C0/C1
- * -----
- */
- pr->power.state = ACPI_STATE_C1;
- pr->power.default_state = ACPI_STATE_C1;
-
- /*
- * C1/C2
- * -----
- * Set the default C1 promotion and C2 demotion policies, where we
- * promote from C1 to C2 after several (10) successive C1 transitions,
- * as we cannot (currently) measure the time spent in C1. Demote from
- * C2 to C1 anytime we experience a 'short' (time spent in C2 is less
- * than the C2 transtion latency). Note the simplifying assumption
- * that the 'cost' of a transition is amortized when we sleep for at
- * least as long as the transition's latency (thus the total transition
- * time is two times the latency).
- *
- * TBD: Measure C1 sleep times by instrumenting the core IRQ handler.
- * TBD: Demote to default C-State after long periods of activity.
- * TBD: Investigate policy's use of CPU utilization -vs- sleep duration.
- */
- if (pr->power.states[ACPI_STATE_C2].valid) {
- pr->power.states[ACPI_STATE_C1].promotion.threshold.count = 10;
- pr->power.states[ACPI_STATE_C1].promotion.threshold.ticks =
- pr->power.states[ACPI_STATE_C2].latency_ticks;
- pr->power.states[ACPI_STATE_C1].promotion.state = ACPI_STATE_C2;
-
- pr->power.states[ACPI_STATE_C2].demotion.threshold.count = 1;
- pr->power.states[ACPI_STATE_C2].demotion.threshold.ticks =
- pr->power.states[ACPI_STATE_C2].latency_ticks;
- pr->power.states[ACPI_STATE_C2].demotion.state = ACPI_STATE_C1;
- }
-
- /*
- * C2/C3
- * -----
- * Set default C2 promotion and C3 demotion policies, where we promote
- * from C2 to C3 after several (4) cycles of no bus mastering activity
- * while maintaining sleep time criteria. Demote immediately on a
- * short or whenever bus mastering activity occurs.
- */
- if ((pr->power.states[ACPI_STATE_C2].valid) &&
- (pr->power.states[ACPI_STATE_C3].valid)) {
- pr->power.states[ACPI_STATE_C2].promotion.threshold.count = 4;
- pr->power.states[ACPI_STATE_C2].promotion.threshold.ticks =
- pr->power.states[ACPI_STATE_C3].latency_ticks;
- pr->power.states[ACPI_STATE_C2].promotion.threshold.bm = 0x0F;
- pr->power.states[ACPI_STATE_C2].promotion.state = ACPI_STATE_C3;
-
- pr->power.states[ACPI_STATE_C3].demotion.threshold.count = 1;
- pr->power.states[ACPI_STATE_C3].demotion.threshold.ticks =
- pr->power.states[ACPI_STATE_C3].latency_ticks;
- pr->power.states[ACPI_STATE_C3].demotion.threshold.bm = 0x0F;
- pr->power.states[ACPI_STATE_C3].demotion.state = ACPI_STATE_C2;
- }
-
- return_VALUE(0);
-}
-
-
-int
-acpi_processor_get_power_info (
- struct acpi_processor *pr)
-{
- int result = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_get_power_info");
-
- if (!pr)
- return_VALUE(-EINVAL);
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "lvl2[0x%08x] lvl3[0x%08x]\n",
- pr->power.states[ACPI_STATE_C2].address,
- pr->power.states[ACPI_STATE_C3].address));
-
- /* TBD: Support ACPI 2.0 objects */
-
- /*
- * C0
- * --
- * This state exists only as filler in our array.
- */
- pr->power.states[ACPI_STATE_C0].valid = 1;
-
- /*
- * C1
- * --
- * ACPI requires C1 support for all processors.
- *
- * TBD: What about PROC_C1?
- */
- pr->power.states[ACPI_STATE_C1].valid = 1;
-
- /*
- * C2
- * --
- * We're (currently) only supporting C2 on UP systems.
- *
- * TBD: Support for C2 on MP (P_LVL2_UP).
- */
- if (pr->power.states[ACPI_STATE_C2].address) {
-
- pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.plvl2_lat;
-
- /*
- * C2 latency must be less than or equal to 100 microseconds.
- */
- if (acpi_fadt.plvl2_lat > ACPI_PROCESSOR_MAX_C2_LATENCY)
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "C2 latency too large [%d]\n",
- acpi_fadt.plvl2_lat));
- /*
- * Only support C2 on UP systems (see TBD above).
- */
- else if (errata.smp)
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "C2 not supported in SMP mode\n"));
- /*
- * Otherwise we've met all of our C2 requirements.
- * Normalize the C2 latency to expidite policy.
- */
- else {
- pr->power.states[ACPI_STATE_C2].valid = 1;
- pr->power.states[ACPI_STATE_C2].latency_ticks =
- US_TO_PM_TIMER_TICKS(acpi_fadt.plvl2_lat);
- }
- }
-
- /*
- * C3
- * --
- * TBD: Investigate use of WBINVD on UP/SMP system in absence of
- * bm_control.
- */
- if (pr->power.states[ACPI_STATE_C3].address) {
-
- pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.plvl3_lat;
-
- /*
- * C3 latency must be less than or equal to 1000 microseconds.
- */
- if (acpi_fadt.plvl3_lat > ACPI_PROCESSOR_MAX_C3_LATENCY)
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "C3 latency too large [%d]\n",
- acpi_fadt.plvl3_lat));
- /*
- * Only support C3 when bus mastering arbitration control
- * is present (able to disable bus mastering to maintain
- * cache coherency while in C3).
- */
- else if (!pr->flags.bm_control)
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "C3 support requires bus mastering control\n"));
- /*
- * Only support C3 on UP systems, as bm_control is only viable
- * on a UP system and flushing caches (e.g. WBINVD) is simply
- * too costly (at this time).
- */
- else if (errata.smp)
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "C3 not supported in SMP mode\n"));
- /*
- * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
- * DMA transfers are used by any ISA device to avoid livelock.
- * Note that we could disable Type-F DMA (as recommended by
- * the erratum), but this is known to disrupt certain ISA
- * devices thus we take the conservative approach.
- */
- else if (errata.piix4.fdma) {
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "C3 not supported on PIIX4 with Type-F DMA\n"));
- }
- /*
- * Otherwise we've met all of our C3 requirements.
- * Normalize the C2 latency to expidite policy. Enable
- * checking of bus mastering status (bm_check) so we can
- * use this in our C3 policy.
- */
- else {
- pr->power.states[ACPI_STATE_C3].valid = 1;
- pr->power.states[ACPI_STATE_C3].latency_ticks =
- US_TO_PM_TIMER_TICKS(acpi_fadt.plvl3_lat);
- pr->flags.bm_check = 1;
- }
- }
-
- /*
- * Set Default Policy
- * ------------------
- * Now that we know which state are supported, set the default
- * policy. Note that this policy can be changed dynamically
- * (e.g. encourage deeper sleeps to conserve battery life when
- * not on AC).
- */
- result = acpi_processor_set_power_policy(pr);
- if (result)
- return_VALUE(result);
-
- /*
- * If this processor supports C2 or C3 we denote it as being 'power
- * manageable'. Note that there's really no policy involved for
- * when only C1 is supported.
- */
- if (pr->power.states[ACPI_STATE_C2].valid
- || pr->power.states[ACPI_STATE_C3].valid)
- pr->flags.power = 1;
-
- return_VALUE(0);
-}
-
-
-/* --------------------------------------------------------------------------
- Performance Management
- -------------------------------------------------------------------------- */
-#ifdef CONFIG_CPU_FREQ
-
-static DECLARE_MUTEX(performance_sem);
-
-/*
- * _PPC support is implemented as a CPUfreq policy notifier:
- * This means each time a CPUfreq driver registered also with
- * the ACPI core is asked to change the speed policy, the maximum
- * value is adjusted so that it is within the platform limit.
- *
- * Also, when a new platform limit value is detected, the CPUfreq
- * policy is adjusted accordingly.
- */
-
-#define PPC_REGISTERED 1
-#define PPC_IN_USE 2
-
-static int acpi_processor_ppc_status = 0;
-
-static int acpi_processor_ppc_notifier(struct notifier_block *nb,
- unsigned long event,
- void *data)
-{
- struct cpufreq_policy *policy = data;
- struct acpi_processor *pr;
- unsigned int ppc = 0;
-
- down(&performance_sem);
-
- if (event != CPUFREQ_INCOMPATIBLE)
- goto out;
-
- pr = processors[policy->cpu];
- if (!pr || !pr->performance)
- goto out;
-
- ppc = (unsigned int) pr->performance_platform_limit;
- if (!ppc)
- goto out;
-
- if (ppc > pr->performance->state_count)
- goto out;
-
- cpufreq_verify_within_limits(policy, 0,
- pr->performance->states[ppc].core_frequency * 1000);
-
- out:
- up(&performance_sem);
-
- return 0;
-}
-
-
-static struct notifier_block acpi_ppc_notifier_block = {
- .notifier_call = acpi_processor_ppc_notifier,
-};
-
-
-static int
-acpi_processor_get_platform_limit (
- struct acpi_processor* pr)
-{
- acpi_status status = 0;
- unsigned long ppc = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_get_platform_limit");
-
- if (!pr)
- return_VALUE(-EINVAL);
-
- /*
- * _PPC indicates the maximum state currently supported by the platform
- * (e.g. 0 = states 0..n; 1 = states 1..n; etc.
- */
- status = acpi_evaluate_integer(pr->handle, "_PPC", NULL, &ppc);
-
- if (status != AE_NOT_FOUND)
- acpi_processor_ppc_status |= PPC_IN_USE;
-
- if(ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Error evaluating _PPC\n"));
- return_VALUE(-ENODEV);
- }
-
- pr->performance_platform_limit = (int) ppc;
-
- return_VALUE(0);
-}
-
-
-static int acpi_processor_ppc_has_changed(
- struct acpi_processor *pr)
-{
- int ret = acpi_processor_get_platform_limit(pr);
- if (ret < 0)
- return (ret);
- else
- return cpufreq_update_policy(pr->id);
-}
-
-
-static void acpi_processor_ppc_init(void) {
- if (!cpufreq_register_notifier(&acpi_ppc_notifier_block, CPUFREQ_POLICY_NOTIFIER))
- acpi_processor_ppc_status |= PPC_REGISTERED;
- else
- printk(KERN_DEBUG "Warning: Processor Platform Limit not supported.\n");
-}
-
-
-static void acpi_processor_ppc_exit(void) {
- if (acpi_processor_ppc_status & PPC_REGISTERED)
- cpufreq_unregister_notifier(&acpi_ppc_notifier_block, CPUFREQ_POLICY_NOTIFIER);
-
- acpi_processor_ppc_status &= ~PPC_REGISTERED;
-}
-
-/*
- * when registering a cpufreq driver with this ACPI processor driver, the
- * _PCT and _PSS structures are read out and written into struct
- * acpi_processor_performance.
- */
-static int acpi_processor_set_pdc (struct acpi_processor *pr)
-{
- acpi_status status = AE_OK;
- u32 arg0_buf[3];
- union acpi_object arg0 = {ACPI_TYPE_BUFFER};
- struct acpi_object_list no_object = {1, &arg0};
- struct acpi_object_list *pdc;
-
- ACPI_FUNCTION_TRACE("acpi_processor_set_pdc");
-
- arg0.buffer.length = 12;
- arg0.buffer.pointer = (u8 *) arg0_buf;
- arg0_buf[0] = ACPI_PDC_REVISION_ID;
- arg0_buf[1] = 0;
- arg0_buf[2] = 0;
-
- pdc = (pr->performance->pdc) ? pr->performance->pdc : &no_object;
-
- status = acpi_evaluate_object(pr->handle, "_PDC", pdc, NULL);
-
- if ((ACPI_FAILURE(status)) && (pr->performance->pdc))
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Error evaluating _PDC, using legacy perf. control...\n"));
-
- return_VALUE(status);
-}
-
-
-static int
-acpi_processor_get_performance_control (
- struct acpi_processor *pr)
-{
- int result = 0;
- acpi_status status = 0;
- struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
- union acpi_object *pct = NULL;
- union acpi_object obj = {0};
-
- ACPI_FUNCTION_TRACE("acpi_processor_get_performance_control");
-
- status = acpi_evaluate_object(pr->handle, "_PCT", NULL, &buffer);
- if(ACPI_FAILURE(status)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Error evaluating _PCT\n"));
- return_VALUE(-ENODEV);
- }
-
- pct = (union acpi_object *) buffer.pointer;
- if (!pct || (pct->type != ACPI_TYPE_PACKAGE)
- || (pct->package.count != 2)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Invalid _PCT data\n"));
- result = -EFAULT;
- goto end;
- }
-
- /*
- * control_register
- */
-
- obj = pct->package.elements[0];
-
- if ((obj.type != ACPI_TYPE_BUFFER)
- || (obj.buffer.length < sizeof(struct acpi_pct_register))
- || (obj.buffer.pointer == NULL)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Invalid _PCT data (control_register)\n"));
- result = -EFAULT;
- goto end;
- }
- memcpy(&pr->performance->control_register, obj.buffer.pointer, sizeof(struct acpi_pct_register));
-
-
- /*
- * status_register
- */
-
- obj = pct->package.elements[1];
-
- if ((obj.type != ACPI_TYPE_BUFFER)
- || (obj.buffer.length < sizeof(struct acpi_pct_register))
- || (obj.buffer.pointer == NULL)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Invalid _PCT data (status_register)\n"));
- result = -EFAULT;
- goto end;
- }
-
- memcpy(&pr->performance->status_register, obj.buffer.pointer, sizeof(struct acpi_pct_register));
-
-end:
- acpi_os_free(buffer.pointer);
-
- return_VALUE(result);
-}
-
-
-static int
-acpi_processor_get_performance_states (
- struct acpi_processor *pr)
-{
- int result = 0;
- acpi_status status = AE_OK;
- struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
- struct acpi_buffer format = {sizeof("NNNNNN"), "NNNNNN"};
- struct acpi_buffer state = {0, NULL};
- union acpi_object *pss = NULL;
- unsigned int i;
-
- ACPI_FUNCTION_TRACE("acpi_processor_get_performance_states");
-
- status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
- if(ACPI_FAILURE(status)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Error evaluating _PSS\n"));
- return_VALUE(-ENODEV);
- }
-
- pss = (union acpi_object *) buffer.pointer;
- if (!pss || (pss->type != ACPI_TYPE_PACKAGE)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Invalid _PSS data\n"));
- result = -EFAULT;
- goto end;
- }
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d performance states\n",
- pss->package.count));
-
- pr->performance->state_count = pss->package.count;
- pr->performance->states = kmalloc(sizeof(struct acpi_processor_px) * pss->package.count, GFP_KERNEL);
- if (!pr->performance->states) {
- result = -ENOMEM;
- goto end;
- }
-
- for (i = 0; i < pr->performance->state_count; i++) {
-
- struct acpi_processor_px *px = &(pr->performance->states[i]);
-
- state.length = sizeof(struct acpi_processor_px);
- state.pointer = px;
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Extracting state %d\n", i));
-
- status = acpi_extract_package(&(pss->package.elements[i]),
- &format, &state);
- if (ACPI_FAILURE(status)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Invalid _PSS data\n"));
- result = -EFAULT;
- kfree(pr->performance->states);
- goto end;
- }
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "State [%d]: core_frequency[%d] power[%d] transition_latency[%d] bus_master_latency[%d] control[0x%x] status[0x%x]\n",
- i,
- (u32) px->core_frequency,
- (u32) px->power,
- (u32) px->transition_latency,
- (u32) px->bus_master_latency,
- (u32) px->control,
- (u32) px->status));
-
- if (!px->core_frequency) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Invalid _PSS data: freq is zero\n"));
- result = -EFAULT;
- kfree(pr->performance->states);
- goto end;
- }
- }
-
-end:
- acpi_os_free(buffer.pointer);
-
- return_VALUE(result);
-}
-
-
-static int
-acpi_processor_get_performance_info (
- struct acpi_processor *pr)
-{
- int result = 0;
- acpi_status status = AE_OK;
- acpi_handle handle = NULL;
-
- ACPI_FUNCTION_TRACE("acpi_processor_get_performance_info");
-
- if (!pr || !pr->performance || !pr->handle)
- return_VALUE(-EINVAL);
-
- acpi_processor_set_pdc(pr);
-
- status = acpi_get_handle(pr->handle, "_PCT", &handle);
- if (ACPI_FAILURE(status)) {
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "ACPI-based processor performance control unavailable\n"));
- return_VALUE(-ENODEV);
- }
-
- result = acpi_processor_get_performance_control(pr);
- if (result)
- return_VALUE(result);
-
- result = acpi_processor_get_performance_states(pr);
- if (result)
- return_VALUE(result);
-
- result = acpi_processor_get_platform_limit(pr);
- if (result)
- return_VALUE(result);
-
- return_VALUE(0);
-}
-
-
-int acpi_processor_notify_smm(struct module *calling_module) {
- acpi_status status;
- static int is_done = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_notify_smm");
-
- if (!(acpi_processor_ppc_status & PPC_REGISTERED))
- return_VALUE(-EBUSY);
-
- if (!try_module_get(calling_module))
- return_VALUE(-EINVAL);
-
- /* is_done is set to negative if an error occured,
- * and to postitive if _no_ error occured, but SMM
- * was already notified. This avoids double notification
- * which might lead to unexpected results...
- */
- if (is_done > 0) {
- module_put(calling_module);
- return_VALUE(0);
- }
- else if (is_done < 0) {
- module_put(calling_module);
- return_VALUE(is_done);
- }
-
- is_done = -EIO;
-
- /* Can't write pstate_cnt to smi_cmd if either value is zero */
- if ((!acpi_fadt.smi_cmd) ||
- (!acpi_fadt.pstate_cnt)) {
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "No SMI port or pstate_cnt\n"));
- module_put(calling_module);
- return_VALUE(0);
- }
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Writing pstate_cnt [0x%x] to smi_cmd [0x%x]\n", acpi_fadt.pstate_cnt, acpi_fadt.smi_cmd));
-
- /* FADT v1 doesn't support pstate_cnt, many BIOS vendors use
- * it anyway, so we need to support it... */
- if (acpi_fadt_is_v1) {
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Using v1.0 FADT reserved value for pstate_cnt\n"));
- }
-
- status = acpi_os_write_port (acpi_fadt.smi_cmd,
- (u32) acpi_fadt.pstate_cnt, 8);
- if (ACPI_FAILURE (status)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Failed to write pstate_cnt [0x%x] to "
- "smi_cmd [0x%x]\n", acpi_fadt.pstate_cnt, acpi_fadt.smi_cmd));
- module_put(calling_module);
- return_VALUE(status);
- }
-
- /* Success. If there's no _PPC, we need to fear nothing, so
- * we can allow the cpufreq driver to be rmmod'ed. */
- is_done = 1;
-
- if (!(acpi_processor_ppc_status & PPC_IN_USE))
- module_put(calling_module);
-
- return_VALUE(0);
-}
-EXPORT_SYMBOL(acpi_processor_notify_smm);
-
-
-#ifdef CONFIG_X86_ACPI_CPUFREQ_PROC_INTF
-/* /proc/acpi/processor/../performance interface (DEPRECATED) */
-
-static int acpi_processor_perf_open_fs(struct inode *inode, struct file *file);
-static struct file_operations acpi_processor_perf_fops = {
- .open = acpi_processor_perf_open_fs,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static int acpi_processor_perf_seq_show(struct seq_file *seq, void *offset)
-{
- struct acpi_processor *pr = (struct acpi_processor *)seq->private;
- unsigned int i;
-
- ACPI_FUNCTION_TRACE("acpi_processor_perf_seq_show");
-
- if (!pr)
- goto end;
-
- if (!pr->performance) {
- seq_puts(seq, "<not supported>\n");
- goto end;
- }
-
- seq_printf(seq, "state count: %d\n"
- "active state: P%d\n",
- pr->performance->state_count,
- pr->performance->state);
-
- seq_puts(seq, "states:\n");
- for (i = 0; i < pr->performance->state_count; i++)
- seq_printf(seq, " %cP%d: %d MHz, %d mW, %d uS\n",
- (i == pr->performance->state?'*':' '), i,
- (u32) pr->performance->states[i].core_frequency,
- (u32) pr->performance->states[i].power,
- (u32) pr->performance->states[i].transition_latency);
-
-end:
- return_VALUE(0);
-}
-
-static int acpi_processor_perf_open_fs(struct inode *inode, struct file *file)
-{
- return single_open(file, acpi_processor_perf_seq_show,
- PDE(inode)->data);
-}
-
-static ssize_t
-acpi_processor_write_performance (
- struct file *file,
- const char __user *buffer,
- size_t count,
- loff_t *data)
-{
- int result = 0;
- struct seq_file *m = (struct seq_file *) file->private_data;
- struct acpi_processor *pr = (struct acpi_processor *) m->private;
- struct acpi_processor_performance *perf;
- char state_string[12] = {'\0'};
- unsigned int new_state = 0;
- struct cpufreq_policy policy;
-
- ACPI_FUNCTION_TRACE("acpi_processor_write_performance");
-
- if (!pr || (count > sizeof(state_string) - 1))
- return_VALUE(-EINVAL);
-
- perf = pr->performance;
- if (!perf)
- return_VALUE(-EINVAL);
-
- if (copy_from_user(state_string, buffer, count))
- return_VALUE(-EFAULT);
-
- state_string[count] = '\0';
- new_state = simple_strtoul(state_string, NULL, 0);
-
- if (new_state >= perf->state_count)
- return_VALUE(-EINVAL);
-
- cpufreq_get_policy(&policy, pr->id);
-
- policy.cpu = pr->id;
- policy.min = perf->states[new_state].core_frequency * 1000;
- policy.max = perf->states[new_state].core_frequency * 1000;
-
- result = cpufreq_set_policy(&policy);
- if (result)
- return_VALUE(result);
-
- return_VALUE(count);
-}
-
-static void
-acpi_cpufreq_add_file (
- struct acpi_processor *pr)
-{
- struct proc_dir_entry *entry = NULL;
- struct acpi_device *device = NULL;
-
- ACPI_FUNCTION_TRACE("acpi_cpufreq_addfile");
-
- if (acpi_bus_get_device(pr->handle, &device))
- return_VOID;
-
- /* add file 'performance' [R/W] */
- entry = create_proc_entry(ACPI_PROCESSOR_FILE_PERFORMANCE,
- S_IFREG|S_IRUGO|S_IWUSR, acpi_device_dir(device));
- if (!entry)
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Unable to create '%s' fs entry\n",
- ACPI_PROCESSOR_FILE_PERFORMANCE));
- else {
- entry->proc_fops = &acpi_processor_perf_fops;
- entry->proc_fops->write = acpi_processor_write_performance;
- entry->data = acpi_driver_data(device);
- entry->owner = THIS_MODULE;
- }
- return_VOID;
-}
-
-static void
-acpi_cpufreq_remove_file (
- struct acpi_processor *pr)
-{
- struct acpi_device *device = NULL;
-
- ACPI_FUNCTION_TRACE("acpi_cpufreq_addfile");
-
- if (acpi_bus_get_device(pr->handle, &device))
- return_VOID;
-
- /* remove file 'performance' */
- remove_proc_entry(ACPI_PROCESSOR_FILE_PERFORMANCE,
- acpi_device_dir(device));
-
- return_VOID;
-}
-
-#else
-static void acpi_cpufreq_add_file (struct acpi_processor *pr) { return; }
-static void acpi_cpufreq_remove_file (struct acpi_processor *pr) { return; }
-#endif /* CONFIG_X86_ACPI_CPUFREQ_PROC_INTF */
-
-
-int
-acpi_processor_register_performance (
- struct acpi_processor_performance * performance,
- unsigned int cpu)
-{
- struct acpi_processor *pr;
-
- ACPI_FUNCTION_TRACE("acpi_processor_register_performance");
-
- if (!(acpi_processor_ppc_status & PPC_REGISTERED))
- return_VALUE(-EINVAL);
-
- down(&performance_sem);
-
- pr = processors[cpu];
- if (!pr) {
- up(&performance_sem);
- return_VALUE(-ENODEV);
- }
-
- if (pr->performance) {
- up(&performance_sem);
- return_VALUE(-EBUSY);
- }
-
- pr->performance = performance;
-
- if (acpi_processor_get_performance_info(pr)) {
- pr->performance = NULL;
- up(&performance_sem);
- return_VALUE(-EIO);
- }
-
- acpi_cpufreq_add_file(pr);
-
- up(&performance_sem);
- return_VALUE(0);
-}
-EXPORT_SYMBOL(acpi_processor_register_performance);
-
-
-void
-acpi_processor_unregister_performance (
- struct acpi_processor_performance * performance,
- unsigned int cpu)
-{
- struct acpi_processor *pr;
-
- ACPI_FUNCTION_TRACE("acpi_processor_unregister_performance");
-
- down(&performance_sem);
-
- pr = processors[cpu];
- if (!pr) {
- up(&performance_sem);
- return_VOID;
- }
-
- kfree(pr->performance->states);
- pr->performance = NULL;
-
- acpi_cpufreq_remove_file(pr);
-
- up(&performance_sem);
-
- return_VOID;
-}
-EXPORT_SYMBOL(acpi_processor_unregister_performance);
-
-
-/* for the rest of it, check arch/i386/kernel/cpu/cpufreq/acpi.c */
-
-#else /* !CONFIG_CPU_FREQ */
-
-static void acpi_processor_ppc_init(void) { return; }
-static void acpi_processor_ppc_exit(void) { return; }
-
-static int acpi_processor_ppc_has_changed(struct acpi_processor *pr) {
- static unsigned int printout = 1;
- if (printout) {
- printk(KERN_WARNING "Warning: Processor Platform Limit event detected, but not handled.\n");
- printk(KERN_WARNING "Consider compiling CPUfreq support into your kernel.\n");
- printout = 0;
- }
- return 0;
-}
-
-#endif /* CONFIG_CPU_FREQ */
-
-/* --------------------------------------------------------------------------
- Throttling Control
- -------------------------------------------------------------------------- */
-
-static int
-acpi_processor_get_throttling (
- struct acpi_processor *pr)
-{
- int state = 0;
- u32 value = 0;
- u32 duty_mask = 0;
- u32 duty_value = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_get_throttling");
-
- if (!pr)
- return_VALUE(-EINVAL);
-
- if (!pr->flags.throttling)
- return_VALUE(-ENODEV);
-
- pr->throttling.state = 0;
-
- local_irq_disable();
-
- duty_mask = pr->throttling.state_count - 1;
-
- duty_mask <<= pr->throttling.duty_offset;
-
- value = inl(pr->throttling.address);
-
- /*
- * Compute the current throttling state when throttling is enabled
- * (bit 4 is on).
- */
- if (value & 0x10) {
- duty_value = value & duty_mask;
- duty_value >>= pr->throttling.duty_offset;
-
- if (duty_value)
- state = pr->throttling.state_count-duty_value;
- }
-
- pr->throttling.state = state;
-
- local_irq_enable();
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Throttling state is T%d (%d%% throttling applied)\n",
- state, pr->throttling.states[state].performance));
-
- return_VALUE(0);
-}
-
-
-static int
-acpi_processor_set_throttling (
- struct acpi_processor *pr,
- int state)
-{
- u32 value = 0;
- u32 duty_mask = 0;
- u32 duty_value = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_set_throttling");
-
- if (!pr)
- return_VALUE(-EINVAL);
-
- if ((state < 0) || (state > (pr->throttling.state_count - 1)))
- return_VALUE(-EINVAL);
-
- if (!pr->flags.throttling)
- return_VALUE(-ENODEV);
-
- if (state == pr->throttling.state)
- return_VALUE(0);
-
- local_irq_disable();
-
- /*
- * Calculate the duty_value and duty_mask.
- */
- if (state) {
- duty_value = pr->throttling.state_count - state;
-
- duty_value <<= pr->throttling.duty_offset;
-
- /* Used to clear all duty_value bits */
- duty_mask = pr->throttling.state_count - 1;
-
- duty_mask <<= acpi_fadt.duty_offset;
- duty_mask = ~duty_mask;
- }
-
- /*
- * Disable throttling by writing a 0 to bit 4. Note that we must
- * turn it off before you can change the duty_value.
- */
- value = inl(pr->throttling.address);
- if (value & 0x10) {
- value &= 0xFFFFFFEF;
- outl(value, pr->throttling.address);
- }
-
- /*
- * Write the new duty_value and then enable throttling. Note
- * that a state value of 0 leaves throttling disabled.
- */
- if (state) {
- value &= duty_mask;
- value |= duty_value;
- outl(value, pr->throttling.address);
-
- value |= 0x00000010;
- outl(value, pr->throttling.address);
- }
-
- pr->throttling.state = state;
-
- local_irq_enable();
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Throttling state set to T%d (%d%%)\n", state,
- (pr->throttling.states[state].performance?pr->throttling.states[state].performance/10:0)));
-
- return_VALUE(0);
-}
-
-
-static int
-acpi_processor_get_throttling_info (
- struct acpi_processor *pr)
-{
- int result = 0;
- int step = 0;
- int i = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_get_throttling_info");
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n",
- pr->throttling.address,
- pr->throttling.duty_offset,
- pr->throttling.duty_width));
-
- if (!pr)
- return_VALUE(-EINVAL);
-
- /* TBD: Support ACPI 2.0 objects */
-
- if (!pr->throttling.address) {
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No throttling register\n"));
- return_VALUE(0);
- }
- else if (!pr->throttling.duty_width) {
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No throttling states\n"));
- return_VALUE(0);
- }
- /* TBD: Support duty_cycle values that span bit 4. */
- else if ((pr->throttling.duty_offset
- + pr->throttling.duty_width) > 4) {
- ACPI_DEBUG_PRINT((ACPI_DB_WARN, "duty_cycle spans bit 4\n"));
- return_VALUE(0);
- }
-
- /*
- * PIIX4 Errata: We don't support throttling on the original PIIX4.
- * This shouldn't be an issue as few (if any) mobile systems ever
- * used this part.
- */
- if (errata.piix4.throttle) {
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Throttling not supported on PIIX4 A- or B-step\n"));
- return_VALUE(0);
- }
-
- pr->throttling.state_count = 1 << acpi_fadt.duty_width;
-
- /*
- * Compute state values. Note that throttling displays a linear power/
- * performance relationship (at 50% performance the CPU will consume
- * 50% power). Values are in 1/10th of a percent to preserve accuracy.
- */
-
- step = (1000 / pr->throttling.state_count);
-
- for (i=0; i<pr->throttling.state_count; i++) {
- pr->throttling.states[i].performance = step * i;
- pr->throttling.states[i].power = step * i;
- }
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d throttling states\n",
- pr->throttling.state_count));
-
- pr->flags.throttling = 1;
-
- /*
- * Disable throttling (if enabled). We'll let subsequent policy (e.g.
- * thermal) decide to lower performance if it so chooses, but for now
- * we'll crank up the speed.
- */
-
- result = acpi_processor_get_throttling(pr);
- if (result)
- goto end;
-
- if (pr->throttling.state) {
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Disabling throttling (was T%d)\n",
- pr->throttling.state));
- result = acpi_processor_set_throttling(pr, 0);
- if (result)
- goto end;
- }
-
-end:
- if (result)
- pr->flags.throttling = 0;
-
- return_VALUE(result);
-}
-
-
-/* --------------------------------------------------------------------------
- Limit Interface
- -------------------------------------------------------------------------- */
-
-static int
-acpi_processor_apply_limit (
- struct acpi_processor* pr)
-{
- int result = 0;
- u16 px = 0;
- u16 tx = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_apply_limit");
-
- if (!pr)
- return_VALUE(-EINVAL);
-
- if (!pr->flags.limit)
- return_VALUE(-ENODEV);
-
- if (pr->flags.throttling) {
- if (pr->limit.user.tx > tx)
- tx = pr->limit.user.tx;
- if (pr->limit.thermal.tx > tx)
- tx = pr->limit.thermal.tx;
-
- result = acpi_processor_set_throttling(pr, tx);
- if (result)
- goto end;
- }
-
- pr->limit.state.px = px;
- pr->limit.state.tx = tx;
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Processor [%d] limit set to (P%d:T%d)\n",
- pr->id,
- pr->limit.state.px,
- pr->limit.state.tx));
-
-end:
- if (result)
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Unable to set limit\n"));
-
- return_VALUE(result);
-}
-
-
-#ifdef CONFIG_CPU_FREQ
-
-/* If a passive cooling situation is detected, primarily CPUfreq is used, as it
- * offers (in most cases) voltage scaling in addition to frequency scaling, and
- * thus a cubic (instead of linear) reduction of energy. Also, we allow for
- * _any_ cpufreq driver and not only the acpi-cpufreq driver.
- */
-
-static unsigned int cpufreq_thermal_reduction_pctg[NR_CPUS];
-static unsigned int acpi_thermal_cpufreq_is_init = 0;
-
-
-static int cpu_has_cpufreq(unsigned int cpu)
-{
- struct cpufreq_policy policy;
- if (!acpi_thermal_cpufreq_is_init)
- return -ENODEV;
- if (!cpufreq_get_policy(&policy, cpu))
- return -ENODEV;
- return 0;
-}
-
-
-static int acpi_thermal_cpufreq_increase(unsigned int cpu)
-{
- if (!cpu_has_cpufreq(cpu))
- return -ENODEV;
-
- if (cpufreq_thermal_reduction_pctg[cpu] < 60) {
- cpufreq_thermal_reduction_pctg[cpu] += 20;
- cpufreq_update_policy(cpu);
- return 0;
- }
-
- return -ERANGE;
-}
-
-
-static int acpi_thermal_cpufreq_decrease(unsigned int cpu)
-{
- if (!cpu_has_cpufreq(cpu))
- return -ENODEV;
-
- if (cpufreq_thermal_reduction_pctg[cpu] >= 20) {
- cpufreq_thermal_reduction_pctg[cpu] -= 20;
- cpufreq_update_policy(cpu);
- return 0;
- }
-
- return -ERANGE;
-}
-
-
-static int acpi_thermal_cpufreq_notifier(
- struct notifier_block *nb,
- unsigned long event,
- void *data)
-{
- struct cpufreq_policy *policy = data;
- unsigned long max_freq = 0;
-
- if (event != CPUFREQ_ADJUST)
- goto out;
-
- max_freq = (policy->cpuinfo.max_freq * (100 - cpufreq_thermal_reduction_pctg[policy->cpu])) / 100;
-
- cpufreq_verify_within_limits(policy, 0, max_freq);
-
- out:
- return 0;
-}
-
-
-static struct notifier_block acpi_thermal_cpufreq_notifier_block = {
- .notifier_call = acpi_thermal_cpufreq_notifier,
-};
-
-
-static void acpi_thermal_cpufreq_init(void) {
- int i;
-
- for (i=0; i<NR_CPUS; i++)
- cpufreq_thermal_reduction_pctg[i] = 0;
-
- i = cpufreq_register_notifier(&acpi_thermal_cpufreq_notifier_block, CPUFREQ_POLICY_NOTIFIER);
- if (!i)
- acpi_thermal_cpufreq_is_init = 1;
-}
-
-static void acpi_thermal_cpufreq_exit(void) {
- if (acpi_thermal_cpufreq_is_init)
- cpufreq_unregister_notifier(&acpi_thermal_cpufreq_notifier_block, CPUFREQ_POLICY_NOTIFIER);
-
- acpi_thermal_cpufreq_is_init = 0;
-}
-
-#else /* ! CONFIG_CPU_FREQ */
-
-static void acpi_thermal_cpufreq_init(void) { return; }
-static void acpi_thermal_cpufreq_exit(void) { return; }
-static int acpi_thermal_cpufreq_increase(unsigned int cpu) { return -ENODEV; }
-static int acpi_thermal_cpufreq_decrease(unsigned int cpu) { return -ENODEV; }
-
-
-#endif
-
-
-int
-acpi_processor_set_thermal_limit (
- acpi_handle handle,
- int type)
-{
- int result = 0;
- struct acpi_processor *pr = NULL;
- struct acpi_device *device = NULL;
- int tx = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_set_thermal_limit");
-
- if ((type < ACPI_PROCESSOR_LIMIT_NONE)
- || (type > ACPI_PROCESSOR_LIMIT_DECREMENT))
- return_VALUE(-EINVAL);
-
- result = acpi_bus_get_device(handle, &device);
- if (result)
- return_VALUE(result);
-
- pr = (struct acpi_processor *) acpi_driver_data(device);
- if (!pr)
- return_VALUE(-ENODEV);
-
- /* Thermal limits are always relative to the current Px/Tx state. */
- if (pr->flags.throttling)
- pr->limit.thermal.tx = pr->throttling.state;
-
- /*
- * Our default policy is to only use throttling at the lowest
- * performance state.
- */
-
- tx = pr->limit.thermal.tx;
-
- switch (type) {
-
- case ACPI_PROCESSOR_LIMIT_NONE:
- do {
- result = acpi_thermal_cpufreq_decrease(pr->id);
- } while (!result);
- tx = 0;
- break;
-
- case ACPI_PROCESSOR_LIMIT_INCREMENT:
- /* if going up: P-states first, T-states later */
-
- result = acpi_thermal_cpufreq_increase(pr->id);
- if (!result)
- goto end;
- else if (result == -ERANGE)
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "At maximum performance state\n"));
-
- if (pr->flags.throttling) {
- if (tx == (pr->throttling.state_count - 1))
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "At maximum throttling state\n"));
- else
- tx++;
- }
- break;
-
- case ACPI_PROCESSOR_LIMIT_DECREMENT:
- /* if going down: T-states first, P-states later */
-
- if (pr->flags.throttling) {
- if (tx == 0)
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "At minimum throttling state\n"));
- else {
- tx--;
- goto end;
- }
- }
-
- result = acpi_thermal_cpufreq_decrease(pr->id);
- if (result == -ERANGE)
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "At minimum performance state\n"));
-
- break;
- }
-
-end:
- if (pr->flags.throttling) {
- pr->limit.thermal.px = 0;
- pr->limit.thermal.tx = tx;
-
- result = acpi_processor_apply_limit(pr);
- if (result)
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Unable to set thermal limit\n"));
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Thermal limit now (P%d:T%d)\n",
- pr->limit.thermal.px,
- pr->limit.thermal.tx));
- } else
- result = 0;
-
- return_VALUE(result);
-}
-
-
-static int
-acpi_processor_get_limit_info (
- struct acpi_processor *pr)
-{
- ACPI_FUNCTION_TRACE("acpi_processor_get_limit_info");
-
- if (!pr)
- return_VALUE(-EINVAL);
-
- if (pr->flags.throttling)
- pr->flags.limit = 1;
-
- return_VALUE(0);
-}
-
-
-/* --------------------------------------------------------------------------
- FS Interface (/proc)
- -------------------------------------------------------------------------- */
-
-struct proc_dir_entry *acpi_processor_dir = NULL;
-
-static int acpi_processor_info_seq_show(struct seq_file *seq, void *offset)
-{
- struct acpi_processor *pr = (struct acpi_processor *)seq->private;
-
- ACPI_FUNCTION_TRACE("acpi_processor_info_seq_show");
-
- if (!pr)
- goto end;
-
- seq_printf(seq, "processor id: %d\n"
- "acpi id: %d\n"
- "bus mastering control: %s\n"
- "power management: %s\n"
- "throttling control: %s\n"
- "limit interface: %s\n",
- pr->id,
- pr->acpi_id,
- pr->flags.bm_control ? "yes" : "no",
- pr->flags.power ? "yes" : "no",
- pr->flags.throttling ? "yes" : "no",
- pr->flags.limit ? "yes" : "no");
-
-end:
- return_VALUE(0);
-}
-
-static int acpi_processor_info_open_fs(struct inode *inode, struct file *file)
-{
- return single_open(file, acpi_processor_info_seq_show,
- PDE(inode)->data);
-}
-
-static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
-{
- struct acpi_processor *pr = (struct acpi_processor *)seq->private;
- unsigned int i;
-
- ACPI_FUNCTION_TRACE("acpi_processor_power_seq_show");
-
- if (!pr)
- goto end;
-
- seq_printf(seq, "active state: C%d\n"
- "default state: C%d\n"
- "max_cstate: C%d\n"
- "bus master activity: %08x\n",
- pr->power.state,
- pr->power.default_state,
- max_cstate,
- pr->power.bm_activity);
-
- seq_puts(seq, "states:\n");
-
- for (i = 1; i < ACPI_C_STATE_COUNT; i++) {
- seq_printf(seq, " %cC%d: ",
- (i == pr->power.state?'*':' '), i);
-
- if (!pr->power.states[i].valid) {
- seq_puts(seq, "<not supported>\n");
- continue;
- }
-
- if (pr->power.states[i].promotion.state)
- seq_printf(seq, "promotion[C%d] ",
- pr->power.states[i].promotion.state);
- else
- seq_puts(seq, "promotion[--] ");
-
- if (pr->power.states[i].demotion.state)
- seq_printf(seq, "demotion[C%d] ",
- pr->power.states[i].demotion.state);
- else
- seq_puts(seq, "demotion[--] ");
-
- seq_printf(seq, "latency[%03d] usage[%08d]\n",
- pr->power.states[i].latency,
- pr->power.states[i].usage);
- }
-
-end:
- return_VALUE(0);
-}
-
-static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
-{
- return single_open(file, acpi_processor_power_seq_show,
- PDE(inode)->data);
-}
-
-static int acpi_processor_throttling_seq_show(struct seq_file *seq, void *offset)
-{
- struct acpi_processor *pr = (struct acpi_processor *)seq->private;
- int i = 0;
- int result = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_throttling_seq_show");
-
- if (!pr)
- goto end;
-
- if (!(pr->throttling.state_count > 0)) {
- seq_puts(seq, "<not supported>\n");
- goto end;
- }
-
- result = acpi_processor_get_throttling(pr);
-
- if (result) {
- seq_puts(seq, "Could not determine current throttling state.\n");
- goto end;
- }
-
- seq_printf(seq, "state count: %d\n"
- "active state: T%d\n",
- pr->throttling.state_count,
- pr->throttling.state);
-
- seq_puts(seq, "states:\n");
- for (i = 0; i < pr->throttling.state_count; i++)
- seq_printf(seq, " %cT%d: %02d%%\n",
- (i == pr->throttling.state?'*':' '), i,
- (pr->throttling.states[i].performance?pr->throttling.states[i].performance/10:0));
-
-end:
- return_VALUE(0);
-}
-
-static int acpi_processor_throttling_open_fs(struct inode *inode, struct file *file)
-{
- return single_open(file, acpi_processor_throttling_seq_show,
- PDE(inode)->data);
-}
-
-static ssize_t
-acpi_processor_write_throttling (
- struct file *file,
- const char __user *buffer,
- size_t count,
- loff_t *data)
-{
- int result = 0;
- struct seq_file *m = (struct seq_file *)file->private_data;
- struct acpi_processor *pr = (struct acpi_processor *)m->private;
- char state_string[12] = {'\0'};
-
- ACPI_FUNCTION_TRACE("acpi_processor_write_throttling");
-
- if (!pr || (count > sizeof(state_string) - 1))
- return_VALUE(-EINVAL);
-
- if (copy_from_user(state_string, buffer, count))
- return_VALUE(-EFAULT);
-
- state_string[count] = '\0';
-
- result = acpi_processor_set_throttling(pr,
- simple_strtoul(state_string, NULL, 0));
- if (result)
- return_VALUE(result);
-
- return_VALUE(count);
-}
-
-static int acpi_processor_limit_seq_show(struct seq_file *seq, void *offset)
-{
- struct acpi_processor *pr = (struct acpi_processor *)seq->private;
-
- ACPI_FUNCTION_TRACE("acpi_processor_limit_seq_show");
-
- if (!pr)
- goto end;
-
- if (!pr->flags.limit) {
- seq_puts(seq, "<not supported>\n");
- goto end;
- }
-
- seq_printf(seq, "active limit: P%d:T%d\n"
- "user limit: P%d:T%d\n"
- "thermal limit: P%d:T%d\n",
- pr->limit.state.px, pr->limit.state.tx,
- pr->limit.user.px, pr->limit.user.tx,
- pr->limit.thermal.px, pr->limit.thermal.tx);
-
-end:
- return_VALUE(0);
-}
-
-static int acpi_processor_limit_open_fs(struct inode *inode, struct file *file)
-{
- return single_open(file, acpi_processor_limit_seq_show,
- PDE(inode)->data);
-}
-
-static ssize_t
-acpi_processor_write_limit (
- struct file *file,
- const char __user *buffer,
- size_t count,
- loff_t *data)
-{
- int result = 0;
- struct seq_file *m = (struct seq_file *)file->private_data;
- struct acpi_processor *pr = (struct acpi_processor *)m->private;
- char limit_string[25] = {'\0'};
- int px = 0;
- int tx = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_write_limit");
-
- if (!pr || (count > sizeof(limit_string) - 1)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Invalid argument\n"));
- return_VALUE(-EINVAL);
- }
-
- if (copy_from_user(limit_string, buffer, count)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Invalid data\n"));
- return_VALUE(-EFAULT);
- }
-
- limit_string[count] = '\0';
-
- if (sscanf(limit_string, "%d:%d", &px, &tx) != 2) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Invalid data format\n"));
- return_VALUE(-EINVAL);
- }
-
- if (pr->flags.throttling) {
- if ((tx < 0) || (tx > (pr->throttling.state_count - 1))) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Invalid tx\n"));
- return_VALUE(-EINVAL);
- }
- pr->limit.user.tx = tx;
- }
-
- result = acpi_processor_apply_limit(pr);
-
- return_VALUE(count);
-}
-
-
-static int
-acpi_processor_add_fs (
- struct acpi_device *device)
-{
- struct proc_dir_entry *entry = NULL;
-
- ACPI_FUNCTION_TRACE("acpi_processor_add_fs");
-
- if (!acpi_device_dir(device)) {
- acpi_device_dir(device) = proc_mkdir(acpi_device_bid(device),
- acpi_processor_dir);
- if (!acpi_device_dir(device))
- return_VALUE(-ENODEV);
- }
- acpi_device_dir(device)->owner = THIS_MODULE;
-
- /* 'info' [R] */
- entry = create_proc_entry(ACPI_PROCESSOR_FILE_INFO,
- S_IRUGO, acpi_device_dir(device));
- if (!entry)
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Unable to create '%s' fs entry\n",
- ACPI_PROCESSOR_FILE_INFO));
- else {
- entry->proc_fops = &acpi_processor_info_fops;
- entry->data = acpi_driver_data(device);
- entry->owner = THIS_MODULE;
- }
-
- /* 'power' [R] */
- entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
- S_IRUGO, acpi_device_dir(device));
- if (!entry)
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Unable to create '%s' fs entry\n",
- ACPI_PROCESSOR_FILE_POWER));
- else {
- entry->proc_fops = &acpi_processor_power_fops;
- entry->data = acpi_driver_data(device);
- entry->owner = THIS_MODULE;
- }
-
- /* 'throttling' [R/W] */
- entry = create_proc_entry(ACPI_PROCESSOR_FILE_THROTTLING,
- S_IFREG|S_IRUGO|S_IWUSR, acpi_device_dir(device));
- if (!entry)
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Unable to create '%s' fs entry\n",
- ACPI_PROCESSOR_FILE_THROTTLING));
- else {
- entry->proc_fops = &acpi_processor_throttling_fops;
- entry->proc_fops->write = acpi_processor_write_throttling;
- entry->data = acpi_driver_data(device);
- entry->owner = THIS_MODULE;
- }
-
- /* 'limit' [R/W] */
- entry = create_proc_entry(ACPI_PROCESSOR_FILE_LIMIT,
- S_IFREG|S_IRUGO|S_IWUSR, acpi_device_dir(device));
- if (!entry)
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Unable to create '%s' fs entry\n",
- ACPI_PROCESSOR_FILE_LIMIT));
- else {
- entry->proc_fops = &acpi_processor_limit_fops;
- entry->proc_fops->write = acpi_processor_write_limit;
- entry->data = acpi_driver_data(device);
- entry->owner = THIS_MODULE;
- }
-
- return_VALUE(0);
-}
-
-
-static int
-acpi_processor_remove_fs (
- struct acpi_device *device)
-{
- ACPI_FUNCTION_TRACE("acpi_processor_remove_fs");
-
- if (acpi_device_dir(device)) {
- remove_proc_entry(ACPI_PROCESSOR_FILE_INFO,acpi_device_dir(device));
- remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,acpi_device_dir(device));
- remove_proc_entry(ACPI_PROCESSOR_FILE_THROTTLING,
- acpi_device_dir(device));
- remove_proc_entry(ACPI_PROCESSOR_FILE_LIMIT,acpi_device_dir(device));
- remove_proc_entry(acpi_device_bid(device), acpi_processor_dir);
- acpi_device_dir(device) = NULL;
- }
-
- return_VALUE(0);
-}
-
-/* Use the acpiid in MADT to map cpus in case of SMP */
-#ifndef CONFIG_SMP
-#define convert_acpiid_to_cpu(acpi_id) (0xff)
-#else
-
-#ifdef CONFIG_IA64
-#define arch_acpiid_to_apicid ia64_acpiid_to_sapicid
-#define arch_cpu_to_apicid ia64_cpu_to_sapicid
-#define ARCH_BAD_APICID (0xffff)
-#else
-#define arch_acpiid_to_apicid x86_acpiid_to_apicid
-#define arch_cpu_to_apicid x86_cpu_to_apicid
-#define ARCH_BAD_APICID (0xff)
-#endif
-
-static u8 convert_acpiid_to_cpu(u8 acpi_id)
-{
- u16 apic_id;
- int i;
-
- apic_id = arch_acpiid_to_apicid[acpi_id];
- if (apic_id == ARCH_BAD_APICID)
- return -1;
-
- for (i = 0; i < NR_CPUS; i++) {
- if (arch_cpu_to_apicid[i] == apic_id)
- return i;
- }
- return -1;
-}
-#endif
-
-/* --------------------------------------------------------------------------
- Driver Interface
- -------------------------------------------------------------------------- */
-
-static int
-acpi_processor_get_info (
- struct acpi_processor *pr)
-{
- acpi_status status = 0;
- union acpi_object object = {0};
- struct acpi_buffer buffer = {sizeof(union acpi_object), &object};
- u8 cpu_index;
- static int cpu0_initialized;
-
- ACPI_FUNCTION_TRACE("acpi_processor_get_info");
-
- if (!pr)
- return_VALUE(-EINVAL);
-
- if (num_online_cpus() > 1)
- errata.smp = TRUE;
-
- acpi_processor_errata(pr);
-
- /*
- * Check to see if we have bus mastering arbitration control. This
- * is required for proper C3 usage (to maintain cache coherency).
- */
- if (acpi_fadt.V1_pm2_cnt_blk && acpi_fadt.pm2_cnt_len) {
- pr->flags.bm_control = 1;
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Bus mastering arbitration control present\n"));
- }
- else
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "No bus mastering arbitration control\n"));
-
- /*
- * Evalute the processor object. Note that it is common on SMP to
- * have the first (boot) processor with a valid PBLK address while
- * all others have a NULL address.
- */
- status = acpi_evaluate_object(pr->handle, NULL, NULL, &buffer);
- if (ACPI_FAILURE(status)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Error evaluating processor object\n"));
- return_VALUE(-ENODEV);
- }
-
- /*
- * TBD: Synch processor ID (via LAPIC/LSAPIC structures) on SMP.
- * >>> 'acpi_get_processor_id(acpi_id, &id)' in arch/xxx/acpi.c
- */
- pr->acpi_id = object.processor.proc_id;
-
- cpu_index = convert_acpiid_to_cpu(pr->acpi_id);
-
- if ( !cpu0_initialized && (cpu_index == 0xff)) {
- /* Handle UP system running SMP kernel, with no LAPIC in MADT */
- cpu_index = 0;
- } else if (cpu_index > num_online_cpus()) {
- /*
- * Extra Processor objects may be enumerated on MP systems with
- * less than the max # of CPUs. They should be ignored.
- */
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Error getting cpuindex for acpiid 0x%x\n",
- pr->acpi_id));
- return_VALUE(-ENODEV);
- }
- cpu0_initialized = 1;
-
- pr->id = cpu_index;
-
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Processor [%d:%d]\n", pr->id,
- pr->acpi_id));
-
- if (!object.processor.pblk_address)
- ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No PBLK (NULL address)\n"));
- else if (object.processor.pblk_length != 6)
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Invalid PBLK length [%d]\n",
- object.processor.pblk_length));
- else {
- pr->throttling.address = object.processor.pblk_address;
- pr->throttling.duty_offset = acpi_fadt.duty_offset;
- pr->throttling.duty_width = acpi_fadt.duty_width;
- pr->power.states[ACPI_STATE_C2].address =
- object.processor.pblk_address + 4;
- pr->power.states[ACPI_STATE_C3].address =
- object.processor.pblk_address + 5;
-
- /*
- * We don't care about error returns - we just try to mark
- * these reserved so that nobody else is confused into thinking
- * that this region might be unused..
- *
- * (In particular, allocating the IO range for Cardbus)
- */
- request_region(pr->throttling.address, 6, "ACPI CPU throttle");
- }
-
- acpi_processor_get_power_info(pr);
-#ifdef CONFIG_CPU_FREQ
- acpi_processor_ppc_has_changed(pr);
-#endif
- acpi_processor_get_throttling_info(pr);
- acpi_processor_get_limit_info(pr);
-
- return_VALUE(0);
-}
-
-
-static void
-acpi_processor_notify (
- acpi_handle handle,
- u32 event,
- void *data)
-{
- struct acpi_processor *pr = (struct acpi_processor *) data;
- struct acpi_device *device = NULL;
-
- ACPI_FUNCTION_TRACE("acpi_processor_notify");
-
- if (!pr)
- return_VOID;
-
- if (acpi_bus_get_device(pr->handle, &device))
- return_VOID;
-
- switch (event) {
- case ACPI_PROCESSOR_NOTIFY_PERFORMANCE:
- acpi_processor_ppc_has_changed(pr);
- acpi_bus_generate_event(device, event,
- pr->performance_platform_limit);
- break;
- case ACPI_PROCESSOR_NOTIFY_POWER:
- /* TBD */
- acpi_bus_generate_event(device, event, 0);
- break;
- default:
- ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- "Unsupported event [0x%x]\n", event));
- break;
- }
-
- return_VOID;
-}
-
-
-static int
-acpi_processor_add (
- struct acpi_device *device)
-{
- int result = 0;
- acpi_status status = AE_OK;
- struct acpi_processor *pr = NULL;
- u32 i = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_add");
-
- if (!device)
- return_VALUE(-EINVAL);
-
- pr = kmalloc(sizeof(struct acpi_processor), GFP_KERNEL);
- if (!pr)
- return_VALUE(-ENOMEM);
- memset(pr, 0, sizeof(struct acpi_processor));
-
- pr->handle = device->handle;
- strcpy(acpi_device_name(device), ACPI_PROCESSOR_DEVICE_NAME);
- strcpy(acpi_device_class(device), ACPI_PROCESSOR_CLASS);
- acpi_driver_data(device) = pr;
-
- result = acpi_processor_get_info(pr);
- if (result)
- goto end;
-
- result = acpi_processor_add_fs(device);
- if (result)
- goto end;
-
- status = acpi_install_notify_handler(pr->handle, ACPI_DEVICE_NOTIFY,
- acpi_processor_notify, pr);
- if (ACPI_FAILURE(status)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Error installing notify handler\n"));
- result = -ENODEV;
- goto end;
- }
-
- processors[pr->id] = pr;
-
- /*
- * Install the idle handler if processor power management is supported.
- * Note that we use previously set idle handler will be used on
- * platforms that only support C1.
- */
- if ((pr->flags.power) && (!boot_option_idle_override)) {
- printk(KERN_INFO PREFIX "%s [%s] (supports",
- acpi_device_name(device), acpi_device_bid(device));
- for (i = 1; i < ACPI_C_STATE_COUNT; i++)
- if (pr->power.states[i].valid)
- printk(" C%d", i);
- printk(")\n");
- if (pr->id == 0) {
- pm_idle_save = pm_idle;
- pm_idle = acpi_processor_idle;
- }
- }
-
- if (pr->flags.throttling) {
- printk(KERN_INFO PREFIX "%s [%s] (supports",
- acpi_device_name(device), acpi_device_bid(device));
- printk(" %d throttling states", pr->throttling.state_count);
- printk(")\n");
- }
-
-end:
- if (result) {
- acpi_processor_remove_fs(device);
- kfree(pr);
- }
-
- return_VALUE(result);
-}
-
-
-static int
-acpi_processor_remove (
- struct acpi_device *device,
- int type)
-{
- acpi_status status = AE_OK;
- struct acpi_processor *pr = NULL;
-
- ACPI_FUNCTION_TRACE("acpi_processor_remove");
-
- if (!device || !acpi_driver_data(device))
- return_VALUE(-EINVAL);
-
- pr = (struct acpi_processor *) acpi_driver_data(device);
-
- /* Unregister the idle handler when processor #0 is removed. */
- if (pr->id == 0) {
- pm_idle = pm_idle_save;
- /*
- * We are about to unload the current idle thread pm callback
- * (pm_idle), Wait for all processors to update cached/local
- * copies of pm_idle before proceeding.
- */
- synchronize_kernel();
- }
-
- status = acpi_remove_notify_handler(pr->handle, ACPI_DEVICE_NOTIFY,
- acpi_processor_notify);
- if (ACPI_FAILURE(status)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Error removing notify handler\n"));
- }
-
- acpi_processor_remove_fs(device);
-
- processors[pr->id] = NULL;
-
- kfree(pr);
-
- return_VALUE(0);
-}
-
-/*
- * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
- * For now disable this. Probably a bug somewhere else.
- *
- * To skip this limit, boot/load with a large max_cstate limit.
- */
-static int no_c2c3(struct dmi_system_id *id)
-{
- if (max_cstate > ACPI_C_STATES_MAX)
- return 0;
-
- printk(KERN_NOTICE PREFIX "%s detected - C2,C3 disabled."
- " Override with \"processor.max_cstate=9\"\n", id->ident);
-
- max_cstate = 1;
-
- return 0;
-}
-
-static struct dmi_system_id __initdata processor_dmi_table[] = {
- { no_c2c3, "IBM ThinkPad R40e", {
- DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
- DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }},
- { no_c2c3, "Medion 41700", {
- DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
- DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J") }},
- {},
-};
-
-/* We keep the driver loaded even when ACPI is not running.
- This is needed for the powernow-k8 driver, that works even without
- ACPI, but needs symbols from this driver */
-
-static int __init
-acpi_processor_init (void)
-{
- int result = 0;
-
- ACPI_FUNCTION_TRACE("acpi_processor_init");
-
- memset(&processors, 0, sizeof(processors));
- memset(&errata, 0, sizeof(errata));
-
- acpi_processor_dir = proc_mkdir(ACPI_PROCESSOR_CLASS, acpi_root_dir);
- if (!acpi_processor_dir)
- return_VALUE(0);
- acpi_processor_dir->owner = THIS_MODULE;
-
- result = acpi_bus_register_driver(&acpi_processor_driver);
- if (result < 0) {
- remove_proc_entry(ACPI_PROCESSOR_CLASS, acpi_root_dir);
- return_VALUE(0);
- }
-
- acpi_thermal_cpufreq_init();
-
- acpi_processor_ppc_init();
-
- dmi_check_system(processor_dmi_table);
-
- if (max_cstate < ACPI_C_STATES_MAX)
- printk(KERN_NOTICE "ACPI: processor limited to max C-state %d\n", max_cstate);
-
- return_VALUE(0);
-}
-
-
-static void __exit
-acpi_processor_exit (void)
-{
- ACPI_FUNCTION_TRACE("acpi_processor_exit");
-
- acpi_processor_ppc_exit();
-
- acpi_thermal_cpufreq_exit();
-
- acpi_bus_unregister_driver(&acpi_processor_driver);
-
- remove_proc_entry(ACPI_PROCESSOR_CLASS, acpi_root_dir);
-
- return_VOID;
-}
-
-
-module_init(acpi_processor_init);
-module_exit(acpi_processor_exit);
-module_param_named(max_cstate, max_cstate, uint, 0);
-
-EXPORT_SYMBOL(acpi_processor_set_thermal_limit);
+++ /dev/null
-/******************************************************************************
- *
- * nicstarmac.h
- *
- * Header file for nicstarmac.c
- *
- ******************************************************************************/
-
-
-typedef void __iomem *virt_addr_t;
-
-u_int32_t nicstar_read_eprom_status( virt_addr_t base );
-void nicstar_init_eprom( virt_addr_t base );
-void nicstar_read_eprom( virt_addr_t, u_int8_t, u_int8_t *, u_int32_t);
+++ /dev/null
-/*
- * carmel.c: Driver for Promise SATA SX8 looks-like-I2O hardware
- *
- * Copyright 2004 Red Hat, Inc.
- *
- * Author/maintainer: Jeff Garzik <jgarzik@pobox.com>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-#include <linux/blkdev.h>
-#include <linux/sched.h>
-#include <linux/devfs_fs_kernel.h>
-#include <linux/interrupt.h>
-#include <linux/compiler.h>
-#include <linux/workqueue.h>
-#include <linux/bitops.h>
-#include <linux/delay.h>
-#include <linux/time.h>
-#include <linux/hdreg.h>
-#include <asm/io.h>
-#include <asm/semaphore.h>
-#include <asm/uaccess.h>
-
-MODULE_AUTHOR("Jeff Garzik");
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("Promise SATA SX8 (carmel) block driver");
-
-#if 0
-#define CARM_DEBUG
-#define CARM_VERBOSE_DEBUG
-#else
-#undef CARM_DEBUG
-#undef CARM_VERBOSE_DEBUG
-#endif
-#undef CARM_NDEBUG
-
-#define DRV_NAME "carmel"
-#define DRV_VERSION "0.8"
-#define PFX DRV_NAME ": "
-
-#define NEXT_RESP(idx) ((idx + 1) % RMSG_Q_LEN)
-
-/* 0xf is just arbitrary, non-zero noise; this is sorta like poisoning */
-#define TAG_ENCODE(tag) (((tag) << 16) | 0xf)
-#define TAG_DECODE(tag) (((tag) >> 16) & 0x1f)
-#define TAG_VALID(tag) ((((tag) & 0xf) == 0xf) && (TAG_DECODE(tag) < 32))
-
-/* note: prints function name for you */
-#ifdef CARM_DEBUG
-#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
-#ifdef CARM_VERBOSE_DEBUG
-#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
-#else
-#define VPRINTK(fmt, args...)
-#endif /* CARM_VERBOSE_DEBUG */
-#else
-#define DPRINTK(fmt, args...)
-#define VPRINTK(fmt, args...)
-#endif /* CARM_DEBUG */
-
-#ifdef CARM_NDEBUG
-#define assert(expr)
-#else
-#define assert(expr) \
- if(unlikely(!(expr))) { \
- printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
- #expr,__FILE__,__FUNCTION__,__LINE__); \
- }
-#endif
-
-/* defines only for the constants which don't work well as enums */
-struct carm_host;
-
-enum {
- /* adapter-wide limits */
- CARM_MAX_PORTS = 8,
- CARM_SHM_SIZE = (4096 << 7),
- CARM_MINORS_PER_MAJOR = 256 / CARM_MAX_PORTS,
- CARM_MAX_WAIT_Q = CARM_MAX_PORTS + 1,
-
- /* command message queue limits */
- CARM_MAX_REQ = 64, /* max command msgs per host */
- CARM_MAX_Q = 1, /* one command at a time */
- CARM_MSG_LOW_WATER = (CARM_MAX_REQ / 4), /* refill mark */
-
- /* S/G limits, host-wide and per-request */
- CARM_MAX_REQ_SG = 32, /* max s/g entries per request */
- CARM_SG_BOUNDARY = 0xffffUL, /* s/g segment boundary */
- CARM_MAX_HOST_SG = 600, /* max s/g entries per host */
- CARM_SG_LOW_WATER = (CARM_MAX_HOST_SG / 4), /* re-fill mark */
-
- /* hardware registers */
- CARM_IHQP = 0x1c,
- CARM_INT_STAT = 0x10, /* interrupt status */
- CARM_INT_MASK = 0x14, /* interrupt mask */
- CARM_HMUC = 0x18, /* host message unit control */
- RBUF_ADDR_LO = 0x20, /* response msg DMA buf low 32 bits */
- RBUF_ADDR_HI = 0x24, /* response msg DMA buf high 32 bits */
- RBUF_BYTE_SZ = 0x28,
- CARM_RESP_IDX = 0x2c,
- CARM_CMS0 = 0x30, /* command message size reg 0 */
- CARM_LMUC = 0x48,
- CARM_HMPHA = 0x6c,
- CARM_INITC = 0xb5,
-
- /* bits in CARM_INT_{STAT,MASK} */
- INT_RESERVED = 0xfffffff0,
- INT_WATCHDOG = (1 << 3), /* watchdog timer */
- INT_Q_OVERFLOW = (1 << 2), /* cmd msg q overflow */
- INT_Q_AVAILABLE = (1 << 1), /* cmd msg q has free space */
- INT_RESPONSE = (1 << 0), /* response msg available */
- INT_ACK_MASK = INT_WATCHDOG | INT_Q_OVERFLOW,
- INT_DEF_MASK = INT_RESERVED | INT_Q_OVERFLOW |
- INT_RESPONSE,
-
- /* command messages, and related register bits */
- CARM_HAVE_RESP = 0x01,
- CARM_MSG_READ = 1,
- CARM_MSG_WRITE = 2,
- CARM_MSG_VERIFY = 3,
- CARM_MSG_GET_CAPACITY = 4,
- CARM_MSG_FLUSH = 5,
- CARM_MSG_IOCTL = 6,
- CARM_MSG_ARRAY = 8,
- CARM_MSG_MISC = 9,
- CARM_CME = (1 << 2),
- CARM_RME = (1 << 1),
- CARM_WZBC = (1 << 0),
- CARM_RMI = (1 << 0),
- CARM_Q_FULL = (1 << 3),
- CARM_MSG_SIZE = 288,
- CARM_Q_LEN = 48,
-
- /* CARM_MSG_IOCTL messages */
- CARM_IOC_SCAN_CHAN = 5, /* scan channels for devices */
- CARM_IOC_GET_TCQ = 13, /* get tcq/ncq depth */
- CARM_IOC_SET_TCQ = 14, /* set tcq/ncq depth */
-
- IOC_SCAN_CHAN_NODEV = 0x1f,
- IOC_SCAN_CHAN_OFFSET = 0x40,
-
- /* CARM_MSG_ARRAY messages */
- CARM_ARRAY_INFO = 0,
-
- ARRAY_NO_EXIST = (1 << 31),
-
- /* response messages */
- RMSG_SZ = 8, /* sizeof(struct carm_response) */
- RMSG_Q_LEN = 48, /* resp. msg list length */
- RMSG_OK = 1, /* bit indicating msg was successful */
- /* length of entire resp. msg buffer */
- RBUF_LEN = RMSG_SZ * RMSG_Q_LEN,
-
- PDC_SHM_SIZE = (4096 << 7), /* length of entire h/w buffer */
-
- /* CARM_MSG_MISC messages */
- MISC_GET_FW_VER = 2,
- MISC_ALLOC_MEM = 3,
- MISC_SET_TIME = 5,
-
- /* MISC_GET_FW_VER feature bits */
- FW_VER_4PORT = (1 << 2), /* 1=4 ports, 0=8 ports */
- FW_VER_NON_RAID = (1 << 1), /* 1=non-RAID firmware, 0=RAID */
- FW_VER_ZCR = (1 << 0), /* zero channel RAID (whatever that is) */
-
- /* carm_host flags */
- FL_NON_RAID = FW_VER_NON_RAID,
- FL_4PORT = FW_VER_4PORT,
- FL_FW_VER_MASK = (FW_VER_NON_RAID | FW_VER_4PORT),
- FL_DAC = (1 << 16),
- FL_DYN_MAJOR = (1 << 17),
-};
-
-enum scatter_gather_types {
- SGT_32BIT = 0,
- SGT_64BIT = 1,
-};
-
-enum host_states {
- HST_INVALID, /* invalid state; never used */
- HST_ALLOC_BUF, /* setting up master SHM area */
- HST_ERROR, /* we never leave here */
- HST_PORT_SCAN, /* start dev scan */
- HST_DEV_SCAN_START, /* start per-device probe */
- HST_DEV_SCAN, /* continue per-device probe */
- HST_DEV_ACTIVATE, /* activate devices we found */
- HST_PROBE_FINISHED, /* probe is complete */
- HST_PROBE_START, /* initiate probe */
- HST_SYNC_TIME, /* tell firmware what time it is */
- HST_GET_FW_VER, /* get firmware version, adapter port cnt */
-};
-
-#ifdef CARM_DEBUG
-static const char *state_name[] = {
- "HST_INVALID",
- "HST_ALLOC_BUF",
- "HST_ERROR",
- "HST_PORT_SCAN",
- "HST_DEV_SCAN_START",
- "HST_DEV_SCAN",
- "HST_DEV_ACTIVATE",
- "HST_PROBE_FINISHED",
- "HST_PROBE_START",
- "HST_SYNC_TIME",
- "HST_GET_FW_VER",
-};
-#endif
-
-struct carm_port {
- unsigned int port_no;
- unsigned int n_queued;
- struct gendisk *disk;
- struct carm_host *host;
-
- /* attached device characteristics */
- u64 capacity;
- char name[41];
- u16 dev_geom_head;
- u16 dev_geom_sect;
- u16 dev_geom_cyl;
-};
-
-struct carm_request {
- unsigned int tag;
- int n_elem;
- unsigned int msg_type;
- unsigned int msg_subtype;
- unsigned int msg_bucket;
- struct request *rq;
- struct carm_port *port;
- struct scatterlist sg[CARM_MAX_REQ_SG];
-};
-
-struct carm_host {
- unsigned long flags;
- void *mmio;
- void *shm;
- dma_addr_t shm_dma;
-
- int major;
- int id;
- char name[32];
-
- spinlock_t lock;
- struct pci_dev *pdev;
- unsigned int state;
- u32 fw_ver;
-
- request_queue_t *oob_q;
- unsigned int n_oob;
-
- unsigned int hw_sg_used;
-
- unsigned int resp_idx;
-
- unsigned int wait_q_prod;
- unsigned int wait_q_cons;
- request_queue_t *wait_q[CARM_MAX_WAIT_Q];
-
- unsigned int n_msgs;
- u64 msg_alloc;
- struct carm_request req[CARM_MAX_REQ];
- void *msg_base;
- dma_addr_t msg_dma;
-
- int cur_scan_dev;
- unsigned long dev_active;
- unsigned long dev_present;
- struct carm_port port[CARM_MAX_PORTS];
-
- struct work_struct fsm_task;
-
- struct semaphore probe_sem;
-};
-
-struct carm_response {
- u32 ret_handle;
- u32 status;
-} __attribute__((packed));
-
-struct carm_msg_sg {
- u32 start;
- u32 len;
-} __attribute__((packed));
-
-struct carm_msg_rw {
- u8 type;
- u8 id;
- u8 sg_count;
- u8 sg_type;
- u32 handle;
- u32 lba;
- u16 lba_count;
- u16 lba_high;
- struct carm_msg_sg sg[32];
-} __attribute__((packed));
-
-struct carm_msg_allocbuf {
- u8 type;
- u8 subtype;
- u8 n_sg;
- u8 sg_type;
- u32 handle;
- u32 addr;
- u32 len;
- u32 evt_pool;
- u32 n_evt;
- u32 rbuf_pool;
- u32 n_rbuf;
- u32 msg_pool;
- u32 n_msg;
- struct carm_msg_sg sg[8];
-} __attribute__((packed));
-
-struct carm_msg_ioctl {
- u8 type;
- u8 subtype;
- u8 array_id;
- u8 reserved1;
- u32 handle;
- u32 data_addr;
- u32 reserved2;
-} __attribute__((packed));
-
-struct carm_msg_sync_time {
- u8 type;
- u8 subtype;
- u16 reserved1;
- u32 handle;
- u32 reserved2;
- u32 timestamp;
-} __attribute__((packed));
-
-struct carm_msg_get_fw_ver {
- u8 type;
- u8 subtype;
- u16 reserved1;
- u32 handle;
- u32 data_addr;
- u32 reserved2;
-} __attribute__((packed));
-
-struct carm_fw_ver {
- u32 version;
- u8 features;
- u8 reserved1;
- u16 reserved2;
-} __attribute__((packed));
-
-struct carm_array_info {
- u32 size;
-
- u16 size_hi;
- u16 stripe_size;
-
- u32 mode;
-
- u16 stripe_blk_sz;
- u16 reserved1;
-
- u16 cyl;
- u16 head;
-
- u16 sect;
- u8 array_id;
- u8 reserved2;
-
- char name[40];
-
- u32 array_status;
-
- /* device list continues beyond this point? */
-} __attribute__((packed));
-
-static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
-static void carm_remove_one (struct pci_dev *pdev);
-static int carm_bdev_ioctl(struct inode *ino, struct file *fil,
- unsigned int cmd, unsigned long arg);
-
-static struct pci_device_id carm_pci_tbl[] = {
- { PCI_VENDOR_ID_PROMISE, 0x8000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
- { PCI_VENDOR_ID_PROMISE, 0x8002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
- { } /* terminate list */
-};
-MODULE_DEVICE_TABLE(pci, carm_pci_tbl);
-
-static struct pci_driver carm_driver = {
- .name = DRV_NAME,
- .id_table = carm_pci_tbl,
- .probe = carm_init_one,
- .remove = carm_remove_one,
-};
-
-static struct block_device_operations carm_bd_ops = {
- .owner = THIS_MODULE,
- .ioctl = carm_bdev_ioctl,
-};
-
-static unsigned int carm_host_id;
-static unsigned long carm_major_alloc;
-
-
-
-static int carm_bdev_ioctl(struct inode *ino, struct file *fil,
- unsigned int cmd, unsigned long arg)
-{
- void __user *usermem = (void __user *) arg;
- struct carm_port *port = ino->i_bdev->bd_disk->private_data;
- struct hd_geometry geom;
-
- switch (cmd) {
- case HDIO_GETGEO:
- if (!usermem)
- return -EINVAL;
-
- geom.heads = (u8) port->dev_geom_head;
- geom.sectors = (u8) port->dev_geom_sect;
- geom.cylinders = port->dev_geom_cyl;
- geom.start = get_start_sect(ino->i_bdev);
-
- if (copy_to_user(usermem, &geom, sizeof(geom)))
- return -EFAULT;
- return 0;
-
- default:
- break;
- }
-
- return -EOPNOTSUPP;
-}
-
-static const u32 msg_sizes[] = { 32, 64, 128, CARM_MSG_SIZE };
-
-static inline int carm_lookup_bucket(u32 msg_size)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(msg_sizes); i++)
- if (msg_size <= msg_sizes[i])
- return i;
-
- return -ENOENT;
-}
-
-static void carm_init_buckets(void *mmio)
-{
- unsigned int i;
-
- for (i = 0; i < ARRAY_SIZE(msg_sizes); i++)
- writel(msg_sizes[i], mmio + CARM_CMS0 + (4 * i));
-}
-
-static inline void *carm_ref_msg(struct carm_host *host,
- unsigned int msg_idx)
-{
- return host->msg_base + (msg_idx * CARM_MSG_SIZE);
-}
-
-static inline dma_addr_t carm_ref_msg_dma(struct carm_host *host,
- unsigned int msg_idx)
-{
- return host->msg_dma + (msg_idx * CARM_MSG_SIZE);
-}
-
-static int carm_send_msg(struct carm_host *host,
- struct carm_request *crq)
-{
- void *mmio = host->mmio;
- u32 msg = (u32) carm_ref_msg_dma(host, crq->tag);
- u32 cm_bucket = crq->msg_bucket;
- u32 tmp;
- int rc = 0;
-
- VPRINTK("ENTER\n");
-
- tmp = readl(mmio + CARM_HMUC);
- if (tmp & CARM_Q_FULL) {
-#if 0
- tmp = readl(mmio + CARM_INT_MASK);
- tmp |= INT_Q_AVAILABLE;
- writel(tmp, mmio + CARM_INT_MASK);
- readl(mmio + CARM_INT_MASK); /* flush */
-#endif
- DPRINTK("host msg queue full\n");
- rc = -EBUSY;
- } else {
- writel(msg | (cm_bucket << 1), mmio + CARM_IHQP);
- readl(mmio + CARM_IHQP); /* flush */
- }
-
- return rc;
-}
-
-static struct carm_request *carm_get_request(struct carm_host *host)
-{
- unsigned int i;
-
- /* obey global hardware limit on S/G entries */
- if (host->hw_sg_used >= (CARM_MAX_HOST_SG - CARM_MAX_REQ_SG))
- return NULL;
-
- for (i = 0; i < CARM_MAX_Q; i++)
- if ((host->msg_alloc & (1ULL << i)) == 0) {
- struct carm_request *crq = &host->req[i];
- crq->port = NULL;
- crq->n_elem = 0;
-
- host->msg_alloc |= (1ULL << i);
- host->n_msgs++;
-
- assert(host->n_msgs <= CARM_MAX_REQ);
- return crq;
- }
-
- DPRINTK("no request available, returning NULL\n");
- return NULL;
-}
-
-static int carm_put_request(struct carm_host *host, struct carm_request *crq)
-{
- assert(crq->tag < CARM_MAX_Q);
-
- if (unlikely((host->msg_alloc & (1ULL << crq->tag)) == 0))
- return -EINVAL; /* tried to clear a tag that was not active */
-
- assert(host->hw_sg_used >= crq->n_elem);
-
- host->msg_alloc &= ~(1ULL << crq->tag);
- host->hw_sg_used -= crq->n_elem;
- host->n_msgs--;
-
- return 0;
-}
-
-static struct carm_request *carm_get_special(struct carm_host *host)
-{
- unsigned long flags;
- struct carm_request *crq = NULL;
- struct request *rq;
- int tries = 5000;
-
- while (tries-- > 0) {
- spin_lock_irqsave(&host->lock, flags);
- crq = carm_get_request(host);
- spin_unlock_irqrestore(&host->lock, flags);
-
- if (crq)
- break;
- msleep(10);
- }
-
- if (!crq)
- return NULL;
-
- rq = blk_get_request(host->oob_q, WRITE /* bogus */, GFP_KERNEL);
- if (!rq) {
- spin_lock_irqsave(&host->lock, flags);
- carm_put_request(host, crq);
- spin_unlock_irqrestore(&host->lock, flags);
- return NULL;
- }
-
- crq->rq = rq;
- return crq;
-}
-
-static int carm_array_info (struct carm_host *host, unsigned int array_idx)
-{
- struct carm_msg_ioctl *ioc;
- unsigned int idx;
- u32 msg_data;
- dma_addr_t msg_dma;
- struct carm_request *crq;
- int rc;
-
- crq = carm_get_special(host);
- if (!crq) {
- rc = -ENOMEM;
- goto err_out;
- }
-
- idx = crq->tag;
-
- ioc = carm_ref_msg(host, idx);
- msg_dma = carm_ref_msg_dma(host, idx);
- msg_data = (u32) (msg_dma + sizeof(struct carm_array_info));
-
- crq->msg_type = CARM_MSG_ARRAY;
- crq->msg_subtype = CARM_ARRAY_INFO;
- rc = carm_lookup_bucket(sizeof(struct carm_msg_ioctl) +
- sizeof(struct carm_array_info));
- BUG_ON(rc < 0);
- crq->msg_bucket = (u32) rc;
-
- memset(ioc, 0, sizeof(*ioc));
- ioc->type = CARM_MSG_ARRAY;
- ioc->subtype = CARM_ARRAY_INFO;
- ioc->array_id = (u8) array_idx;
- ioc->handle = cpu_to_le32(TAG_ENCODE(idx));
- ioc->data_addr = cpu_to_le32(msg_data);
-
- spin_lock_irq(&host->lock);
- assert(host->state == HST_DEV_SCAN_START ||
- host->state == HST_DEV_SCAN);
- spin_unlock_irq(&host->lock);
-
- DPRINTK("blk_insert_request, tag == %u\n", idx);
- blk_insert_request(host->oob_q, crq->rq, 1, crq, 0);
-
- return 0;
-
-err_out:
- spin_lock_irq(&host->lock);
- host->state = HST_ERROR;
- spin_unlock_irq(&host->lock);
- return rc;
-}
-
-typedef unsigned int (*carm_sspc_t)(struct carm_host *, unsigned int, void *);
-
-static int carm_send_special (struct carm_host *host, carm_sspc_t func)
-{
- struct carm_request *crq;
- struct carm_msg_ioctl *ioc;
- void *mem;
- unsigned int idx, msg_size;
- int rc;
-
- crq = carm_get_special(host);
- if (!crq)
- return -ENOMEM;
-
- idx = crq->tag;
-
- mem = carm_ref_msg(host, idx);
-
- msg_size = func(host, idx, mem);
-
- ioc = mem;
- crq->msg_type = ioc->type;
- crq->msg_subtype = ioc->subtype;
- rc = carm_lookup_bucket(msg_size);
- BUG_ON(rc < 0);
- crq->msg_bucket = (u32) rc;
-
- DPRINTK("blk_insert_request, tag == %u\n", idx);
- blk_insert_request(host->oob_q, crq->rq, 1, crq, 0);
-
- return 0;
-}
-
-static unsigned int carm_fill_sync_time(struct carm_host *host,
- unsigned int idx, void *mem)
-{
- struct timeval tv;
- struct carm_msg_sync_time *st = mem;
-
- do_gettimeofday(&tv);
-
- memset(st, 0, sizeof(*st));
- st->type = CARM_MSG_MISC;
- st->subtype = MISC_SET_TIME;
- st->handle = cpu_to_le32(TAG_ENCODE(idx));
- st->timestamp = cpu_to_le32(tv.tv_sec);
-
- return sizeof(struct carm_msg_sync_time);
-}
-
-static unsigned int carm_fill_alloc_buf(struct carm_host *host,
- unsigned int idx, void *mem)
-{
- struct carm_msg_allocbuf *ab = mem;
-
- memset(ab, 0, sizeof(*ab));
- ab->type = CARM_MSG_MISC;
- ab->subtype = MISC_ALLOC_MEM;
- ab->handle = cpu_to_le32(TAG_ENCODE(idx));
- ab->n_sg = 1;
- ab->sg_type = SGT_32BIT;
- ab->addr = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1));
- ab->len = cpu_to_le32(PDC_SHM_SIZE >> 1);
- ab->evt_pool = cpu_to_le32(host->shm_dma + (16 * 1024));
- ab->n_evt = cpu_to_le32(1024);
- ab->rbuf_pool = cpu_to_le32(host->shm_dma);
- ab->n_rbuf = cpu_to_le32(RMSG_Q_LEN);
- ab->msg_pool = cpu_to_le32(host->shm_dma + RBUF_LEN);
- ab->n_msg = cpu_to_le32(CARM_Q_LEN);
- ab->sg[0].start = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1));
- ab->sg[0].len = cpu_to_le32(65536);
-
- return sizeof(struct carm_msg_allocbuf);
-}
-
-static unsigned int carm_fill_scan_channels(struct carm_host *host,
- unsigned int idx, void *mem)
-{
- struct carm_msg_ioctl *ioc = mem;
- u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) +
- IOC_SCAN_CHAN_OFFSET);
-
- memset(ioc, 0, sizeof(*ioc));
- ioc->type = CARM_MSG_IOCTL;
- ioc->subtype = CARM_IOC_SCAN_CHAN;
- ioc->handle = cpu_to_le32(TAG_ENCODE(idx));
- ioc->data_addr = cpu_to_le32(msg_data);
-
- /* fill output data area with "no device" default values */
- mem += IOC_SCAN_CHAN_OFFSET;
- memset(mem, IOC_SCAN_CHAN_NODEV, CARM_MAX_PORTS);
-
- return IOC_SCAN_CHAN_OFFSET + CARM_MAX_PORTS;
-}
-
-static unsigned int carm_fill_get_fw_ver(struct carm_host *host,
- unsigned int idx, void *mem)
-{
- struct carm_msg_get_fw_ver *ioc = mem;
- u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) + sizeof(*ioc));
-
- memset(ioc, 0, sizeof(*ioc));
- ioc->type = CARM_MSG_MISC;
- ioc->subtype = MISC_GET_FW_VER;
- ioc->handle = cpu_to_le32(TAG_ENCODE(idx));
- ioc->data_addr = cpu_to_le32(msg_data);
-
- return sizeof(struct carm_msg_get_fw_ver) +
- sizeof(struct carm_fw_ver);
-}
-
-static inline void carm_end_request_queued(struct carm_host *host,
- struct carm_request *crq,
- int uptodate)
-{
- struct request *req = crq->rq;
- int rc;
-
- rc = end_that_request_first(req, uptodate, req->hard_nr_sectors);
- assert(rc == 0);
-
- end_that_request_last(req);
-
- rc = carm_put_request(host, crq);
- assert(rc == 0);
-}
-
-static inline void carm_push_q (struct carm_host *host, request_queue_t *q)
-{
- unsigned int idx = host->wait_q_prod % CARM_MAX_WAIT_Q;
-
- blk_stop_queue(q);
- VPRINTK("STOPPED QUEUE %p\n", q);
-
- host->wait_q[idx] = q;
- host->wait_q_prod++;
- BUG_ON(host->wait_q_prod == host->wait_q_cons); /* overrun */
-}
-
-static inline request_queue_t *carm_pop_q(struct carm_host *host)
-{
- unsigned int idx;
-
- if (host->wait_q_prod == host->wait_q_cons)
- return NULL;
-
- idx = host->wait_q_cons % CARM_MAX_WAIT_Q;
- host->wait_q_cons++;
-
- return host->wait_q[idx];
-}
-
-static inline void carm_round_robin(struct carm_host *host)
-{
- request_queue_t *q = carm_pop_q(host);
- if (q) {
- blk_start_queue(q);
- VPRINTK("STARTED QUEUE %p\n", q);
- }
-}
-
-static inline void carm_end_rq(struct carm_host *host, struct carm_request *crq,
- int is_ok)
-{
- carm_end_request_queued(host, crq, is_ok);
- if (CARM_MAX_Q == 1)
- carm_round_robin(host);
- else if ((host->n_msgs <= CARM_MSG_LOW_WATER) &&
- (host->hw_sg_used <= CARM_SG_LOW_WATER)) {
- carm_round_robin(host);
- }
-}
-
-static void carm_oob_rq_fn(request_queue_t *q)
-{
- struct carm_host *host = q->queuedata;
- struct carm_request *crq;
- struct request *rq;
- int rc;
-
- while (1) {
- DPRINTK("get req\n");
- rq = elv_next_request(q);
- if (!rq)
- break;
-
- blkdev_dequeue_request(rq);
-
- crq = rq->special;
- assert(crq != NULL);
- assert(crq->rq == rq);
-
- crq->n_elem = 0;
-
- DPRINTK("send req\n");
- rc = carm_send_msg(host, crq);
- if (rc) {
- blk_requeue_request(q, rq);
- carm_push_q(host, q);
- return; /* call us again later, eventually */
- }
- }
-}
-
-static void carm_rq_fn(request_queue_t *q)
-{
- struct carm_port *port = q->queuedata;
- struct carm_host *host = port->host;
- struct carm_msg_rw *msg;
- struct carm_request *crq;
- struct request *rq;
- struct scatterlist *sg;
- int writing = 0, pci_dir, i, n_elem, rc;
- u32 tmp;
- unsigned int msg_size;
-
-queue_one_request:
- VPRINTK("get req\n");
- rq = elv_next_request(q);
- if (!rq)
- return;
-
- crq = carm_get_request(host);
- if (!crq) {
- carm_push_q(host, q);
- return; /* call us again later, eventually */
- }
- crq->rq = rq;
-
- blkdev_dequeue_request(rq);
-
- if (rq_data_dir(rq) == WRITE) {
- writing = 1;
- pci_dir = PCI_DMA_TODEVICE;
- } else {
- pci_dir = PCI_DMA_FROMDEVICE;
- }
-
- /* get scatterlist from block layer */
- sg = &crq->sg[0];
- n_elem = blk_rq_map_sg(q, rq, sg);
- if (n_elem <= 0) {
- carm_end_rq(host, crq, 0);
- return; /* request with no s/g entries? */
- }
-
- /* map scatterlist to PCI bus addresses */
- n_elem = pci_map_sg(host->pdev, sg, n_elem, pci_dir);
- if (n_elem <= 0) {
- carm_end_rq(host, crq, 0);
- return; /* request with no s/g entries? */
- }
- crq->n_elem = n_elem;
- crq->port = port;
- host->hw_sg_used += n_elem;
-
- /*
- * build read/write message
- */
-
- VPRINTK("build msg\n");
- msg = (struct carm_msg_rw *) carm_ref_msg(host, crq->tag);
-
- if (writing) {
- msg->type = CARM_MSG_WRITE;
- crq->msg_type = CARM_MSG_WRITE;
- } else {
- msg->type = CARM_MSG_READ;
- crq->msg_type = CARM_MSG_READ;
- }
-
- msg->id = port->port_no;
- msg->sg_count = n_elem;
- msg->sg_type = SGT_32BIT;
- msg->handle = cpu_to_le32(TAG_ENCODE(crq->tag));
- msg->lba = cpu_to_le32(rq->sector & 0xffffffff);
- tmp = (rq->sector >> 16) >> 16;
- msg->lba_high = cpu_to_le16( (u16) tmp );
- msg->lba_count = cpu_to_le16(rq->nr_sectors);
-
- msg_size = sizeof(struct carm_msg_rw) - sizeof(msg->sg);
- for (i = 0; i < n_elem; i++) {
- struct carm_msg_sg *carm_sg = &msg->sg[i];
- carm_sg->start = cpu_to_le32(sg_dma_address(&crq->sg[i]));
- carm_sg->len = cpu_to_le32(sg_dma_len(&crq->sg[i]));
- msg_size += sizeof(struct carm_msg_sg);
- }
-
- rc = carm_lookup_bucket(msg_size);
- BUG_ON(rc < 0);
- crq->msg_bucket = (u32) rc;
-
- /*
- * queue read/write message to hardware
- */
-
- VPRINTK("send msg, tag == %u\n", crq->tag);
- rc = carm_send_msg(host, crq);
- if (rc) {
- carm_put_request(host, crq);
- blk_requeue_request(q, rq);
- carm_push_q(host, q);
- return; /* call us again later, eventually */
- }
-
- goto queue_one_request;
-}
-
-static void carm_handle_array_info(struct carm_host *host,
- struct carm_request *crq, u8 *mem,
- int is_ok)
-{
- struct carm_port *port;
- u8 *msg_data = mem + sizeof(struct carm_array_info);
- struct carm_array_info *desc = (struct carm_array_info *) msg_data;
- u64 lo, hi;
- int cur_port;
- size_t slen;
-
- DPRINTK("ENTER\n");
-
- carm_end_rq(host, crq, is_ok);
-
- if (!is_ok)
- goto out;
- if (le32_to_cpu(desc->array_status) & ARRAY_NO_EXIST)
- goto out;
-
- cur_port = host->cur_scan_dev;
-
- /* should never occur */
- if ((cur_port < 0) || (cur_port >= CARM_MAX_PORTS)) {
- printk(KERN_ERR PFX "BUG: cur_scan_dev==%d, array_id==%d\n",
- cur_port, (int) desc->array_id);
- goto out;
- }
-
- port = &host->port[cur_port];
-
- lo = (u64) le32_to_cpu(desc->size);
- hi = (u64) le32_to_cpu(desc->size_hi);
-
- port->capacity = lo | (hi << 32);
- port->dev_geom_head = le16_to_cpu(desc->head);
- port->dev_geom_sect = le16_to_cpu(desc->sect);
- port->dev_geom_cyl = le16_to_cpu(desc->cyl);
-
- host->dev_active |= (1 << cur_port);
-
- strncpy(port->name, desc->name, sizeof(port->name));
- port->name[sizeof(port->name) - 1] = 0;
- slen = strlen(port->name);
- while (slen && (port->name[slen - 1] == ' ')) {
- port->name[slen - 1] = 0;
- slen--;
- }
-
- printk(KERN_INFO DRV_NAME "(%s): port %u device %Lu sectors\n",
- pci_name(host->pdev), port->port_no,
- (unsigned long long) port->capacity);
- printk(KERN_INFO DRV_NAME "(%s): port %u device \"%s\"\n",
- pci_name(host->pdev), port->port_no, port->name);
-
-out:
- assert(host->state == HST_DEV_SCAN);
- schedule_work(&host->fsm_task);
-}
-
-static void carm_handle_scan_chan(struct carm_host *host,
- struct carm_request *crq, u8 *mem,
- int is_ok)
-{
- u8 *msg_data = mem + IOC_SCAN_CHAN_OFFSET;
- unsigned int i, dev_count = 0;
- int new_state = HST_DEV_SCAN_START;
-
- DPRINTK("ENTER\n");
-
- carm_end_rq(host, crq, is_ok);
-
- if (!is_ok) {
- new_state = HST_ERROR;
- goto out;
- }
-
- /* TODO: scan and support non-disk devices */
- for (i = 0; i < 8; i++)
- if (msg_data[i] == 0) { /* direct-access device (disk) */
- host->dev_present |= (1 << i);
- dev_count++;
- }
-
- printk(KERN_INFO DRV_NAME "(%s): found %u interesting devices\n",
- pci_name(host->pdev), dev_count);
-
-out:
- assert(host->state == HST_PORT_SCAN);
- host->state = new_state;
- schedule_work(&host->fsm_task);
-}
-
-static void carm_handle_generic(struct carm_host *host,
- struct carm_request *crq, int is_ok,
- int cur_state, int next_state)
-{
- DPRINTK("ENTER\n");
-
- carm_end_rq(host, crq, is_ok);
-
- assert(host->state == cur_state);
- if (is_ok)
- host->state = next_state;
- else
- host->state = HST_ERROR;
- schedule_work(&host->fsm_task);
-}
-
-static inline void carm_handle_rw(struct carm_host *host,
- struct carm_request *crq, int is_ok)
-{
- int pci_dir;
-
- VPRINTK("ENTER\n");
-
- if (rq_data_dir(crq->rq) == WRITE)
- pci_dir = PCI_DMA_TODEVICE;
- else
- pci_dir = PCI_DMA_FROMDEVICE;
-
- pci_unmap_sg(host->pdev, &crq->sg[0], crq->n_elem, pci_dir);
-
- carm_end_rq(host, crq, is_ok);
-}
-
-static inline void carm_handle_resp(struct carm_host *host,
- u32 ret_handle_le, u32 status)
-{
- u32 handle = le32_to_cpu(ret_handle_le);
- unsigned int msg_idx;
- struct carm_request *crq;
- int is_ok = (status == RMSG_OK);
- u8 *mem;
-
- VPRINTK("ENTER, handle == 0x%x\n", handle);
-
- if (unlikely(!TAG_VALID(handle))) {
- printk(KERN_ERR DRV_NAME "(%s): BUG: invalid tag 0x%x\n",
- pci_name(host->pdev), handle);
- return;
- }
-
- msg_idx = TAG_DECODE(handle);
- VPRINTK("tag == %u\n", msg_idx);
-
- crq = &host->req[msg_idx];
-
- /* fast path */
- if (likely(crq->msg_type == CARM_MSG_READ ||
- crq->msg_type == CARM_MSG_WRITE)) {
- carm_handle_rw(host, crq, is_ok);
- return;
- }
-
- mem = carm_ref_msg(host, msg_idx);
-
- switch (crq->msg_type) {
- case CARM_MSG_IOCTL: {
- switch (crq->msg_subtype) {
- case CARM_IOC_SCAN_CHAN:
- carm_handle_scan_chan(host, crq, mem, is_ok);
- break;
- default:
- /* unknown / invalid response */
- goto err_out;
- }
- break;
- }
-
- case CARM_MSG_MISC: {
- switch (crq->msg_subtype) {
- case MISC_ALLOC_MEM:
- carm_handle_generic(host, crq, is_ok,
- HST_ALLOC_BUF, HST_SYNC_TIME);
- break;
- case MISC_SET_TIME:
- carm_handle_generic(host, crq, is_ok,
- HST_SYNC_TIME, HST_GET_FW_VER);
- break;
- case MISC_GET_FW_VER: {
- struct carm_fw_ver *ver = (struct carm_fw_ver *)
- mem + sizeof(struct carm_msg_get_fw_ver);
- if (is_ok) {
- host->fw_ver = le32_to_cpu(ver->version);
- host->flags |= (ver->features & FL_FW_VER_MASK);
- }
- carm_handle_generic(host, crq, is_ok,
- HST_GET_FW_VER, HST_PORT_SCAN);
- break;
- }
- default:
- /* unknown / invalid response */
- goto err_out;
- }
- break;
- }
-
- case CARM_MSG_ARRAY: {
- switch (crq->msg_subtype) {
- case CARM_ARRAY_INFO:
- carm_handle_array_info(host, crq, mem, is_ok);
- break;
- default:
- /* unknown / invalid response */
- goto err_out;
- }
- break;
- }
-
- default:
- /* unknown / invalid response */
- goto err_out;
- }
-
- return;
-
-err_out:
- printk(KERN_WARNING DRV_NAME "(%s): BUG: unhandled message type %d/%d\n",
- pci_name(host->pdev), crq->msg_type, crq->msg_subtype);
- carm_end_rq(host, crq, 0);
-}
-
-static inline void carm_handle_responses(struct carm_host *host)
-{
- void *mmio = host->mmio;
- struct carm_response *resp = (struct carm_response *) host->shm;
- unsigned int work = 0;
- unsigned int idx = host->resp_idx % RMSG_Q_LEN;
-
- while (1) {
- u32 status = le32_to_cpu(resp[idx].status);
-
- if (status == 0xffffffff) {
- VPRINTK("ending response on index %u\n", idx);
- writel(idx << 3, mmio + CARM_RESP_IDX);
- break;
- }
-
- /* response to a message we sent */
- else if ((status & (1 << 31)) == 0) {
- VPRINTK("handling msg response on index %u\n", idx);
- carm_handle_resp(host, resp[idx].ret_handle, status);
- resp[idx].status = 0xffffffff;
- }
-
- /* asynchronous events the hardware throws our way */
- else if ((status & 0xff000000) == (1 << 31)) {
- u8 *evt_type_ptr = (u8 *) &resp[idx];
- u8 evt_type = *evt_type_ptr;
- printk(KERN_WARNING DRV_NAME "(%s): unhandled event type %d\n",
- pci_name(host->pdev), (int) evt_type);
- resp[idx].status = 0xffffffff;
- }
-
- idx = NEXT_RESP(idx);
- work++;
- }
-
- VPRINTK("EXIT, work==%u\n", work);
- host->resp_idx += work;
-}
-
-static irqreturn_t carm_interrupt(int irq, void *__host, struct pt_regs *regs)
-{
- struct carm_host *host = __host;
- void *mmio;
- u32 mask;
- int handled = 0;
- unsigned long flags;
-
- if (!host) {
- VPRINTK("no host\n");
- return IRQ_NONE;
- }
-
- spin_lock_irqsave(&host->lock, flags);
-
- mmio = host->mmio;
-
- /* reading should also clear interrupts */
- mask = readl(mmio + CARM_INT_STAT);
-
- if (mask == 0 || mask == 0xffffffff) {
- VPRINTK("no work, mask == 0x%x\n", mask);
- goto out;
- }
-
- if (mask & INT_ACK_MASK)
- writel(mask, mmio + CARM_INT_STAT);
-
- if (unlikely(host->state == HST_INVALID)) {
- VPRINTK("not initialized yet, mask = 0x%x\n", mask);
- goto out;
- }
-
- if (mask & CARM_HAVE_RESP) {
- handled = 1;
- carm_handle_responses(host);
- }
-
-out:
- spin_unlock_irqrestore(&host->lock, flags);
- VPRINTK("EXIT\n");
- return IRQ_RETVAL(handled);
-}
-
-static void carm_fsm_task (void *_data)
-{
- struct carm_host *host = _data;
- unsigned long flags;
- unsigned int state;
- int rc, i, next_dev;
- int reschedule = 0;
- int new_state = HST_INVALID;
-
- spin_lock_irqsave(&host->lock, flags);
- state = host->state;
- spin_unlock_irqrestore(&host->lock, flags);
-
- DPRINTK("ENTER, state == %s\n", state_name[state]);
-
- switch (state) {
- case HST_PROBE_START:
- new_state = HST_ALLOC_BUF;
- reschedule = 1;
- break;
-
- case HST_ALLOC_BUF:
- rc = carm_send_special(host, carm_fill_alloc_buf);
- if (rc) {
- new_state = HST_ERROR;
- reschedule = 1;
- }
- break;
-
- case HST_SYNC_TIME:
- rc = carm_send_special(host, carm_fill_sync_time);
- if (rc) {
- new_state = HST_ERROR;
- reschedule = 1;
- }
- break;
-
- case HST_GET_FW_VER:
- rc = carm_send_special(host, carm_fill_get_fw_ver);
- if (rc) {
- new_state = HST_ERROR;
- reschedule = 1;
- }
- break;
-
- case HST_PORT_SCAN:
- rc = carm_send_special(host, carm_fill_scan_channels);
- if (rc) {
- new_state = HST_ERROR;
- reschedule = 1;
- }
- break;
-
- case HST_DEV_SCAN_START:
- host->cur_scan_dev = -1;
- new_state = HST_DEV_SCAN;
- reschedule = 1;
- break;
-
- case HST_DEV_SCAN:
- next_dev = -1;
- for (i = host->cur_scan_dev + 1; i < CARM_MAX_PORTS; i++)
- if (host->dev_present & (1 << i)) {
- next_dev = i;
- break;
- }
-
- if (next_dev >= 0) {
- host->cur_scan_dev = next_dev;
- rc = carm_array_info(host, next_dev);
- if (rc) {
- new_state = HST_ERROR;
- reschedule = 1;
- }
- } else {
- new_state = HST_DEV_ACTIVATE;
- reschedule = 1;
- }
- break;
-
- case HST_DEV_ACTIVATE: {
- int activated = 0;
- for (i = 0; i < CARM_MAX_PORTS; i++)
- if (host->dev_active & (1 << i)) {
- struct carm_port *port = &host->port[i];
- struct gendisk *disk = port->disk;
-
- set_capacity(disk, port->capacity);
- add_disk(disk);
- activated++;
- }
-
- printk(KERN_INFO DRV_NAME "(%s): %d ports activated\n",
- pci_name(host->pdev), activated);
-
- new_state = HST_PROBE_FINISHED;
- reschedule = 1;
- break;
- }
-
- case HST_PROBE_FINISHED:
- up(&host->probe_sem);
- break;
-
- case HST_ERROR:
- /* FIXME: TODO */
- break;
-
- default:
- /* should never occur */
- printk(KERN_ERR PFX "BUG: unknown state %d\n", state);
- assert(0);
- break;
- }
-
- if (new_state != HST_INVALID) {
- spin_lock_irqsave(&host->lock, flags);
- host->state = new_state;
- spin_unlock_irqrestore(&host->lock, flags);
- }
- if (reschedule)
- schedule_work(&host->fsm_task);
-}
-
-static int carm_init_wait(void *mmio, u32 bits, unsigned int test_bit)
-{
- unsigned int i;
-
- for (i = 0; i < 50000; i++) {
- u32 tmp = readl(mmio + CARM_LMUC);
- udelay(100);
-
- if (test_bit) {
- if ((tmp & bits) == bits)
- return 0;
- } else {
- if ((tmp & bits) == 0)
- return 0;
- }
-
- cond_resched();
- }
-
- printk(KERN_ERR PFX "carm_init_wait timeout, bits == 0x%x, test_bit == %s\n",
- bits, test_bit ? "yes" : "no");
- return -EBUSY;
-}
-
-static void carm_init_responses(struct carm_host *host)
-{
- void *mmio = host->mmio;
- unsigned int i;
- struct carm_response *resp = (struct carm_response *) host->shm;
-
- for (i = 0; i < RMSG_Q_LEN; i++)
- resp[i].status = 0xffffffff;
-
- writel(0, mmio + CARM_RESP_IDX);
-}
-
-static int carm_init_host(struct carm_host *host)
-{
- void *mmio = host->mmio;
- u32 tmp;
- u8 tmp8;
- int rc;
-
- DPRINTK("ENTER\n");
-
- writel(0, mmio + CARM_INT_MASK);
-
- tmp8 = readb(mmio + CARM_INITC);
- if (tmp8 & 0x01) {
- tmp8 &= ~0x01;
- writeb(tmp8, CARM_INITC);
- readb(mmio + CARM_INITC); /* flush */
-
- DPRINTK("snooze...\n");
- msleep(5000);
- }
-
- tmp = readl(mmio + CARM_HMUC);
- if (tmp & CARM_CME) {
- DPRINTK("CME bit present, waiting\n");
- rc = carm_init_wait(mmio, CARM_CME, 1);
- if (rc) {
- DPRINTK("EXIT, carm_init_wait 1 failed\n");
- return rc;
- }
- }
- if (tmp & CARM_RME) {
- DPRINTK("RME bit present, waiting\n");
- rc = carm_init_wait(mmio, CARM_RME, 1);
- if (rc) {
- DPRINTK("EXIT, carm_init_wait 2 failed\n");
- return rc;
- }
- }
-
- tmp &= ~(CARM_RME | CARM_CME);
- writel(tmp, mmio + CARM_HMUC);
- readl(mmio + CARM_HMUC); /* flush */
-
- rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 0);
- if (rc) {
- DPRINTK("EXIT, carm_init_wait 3 failed\n");
- return rc;
- }
-
- carm_init_buckets(mmio);
-
- writel(host->shm_dma & 0xffffffff, mmio + RBUF_ADDR_LO);
- writel((host->shm_dma >> 16) >> 16, mmio + RBUF_ADDR_HI);
- writel(RBUF_LEN, mmio + RBUF_BYTE_SZ);
-
- tmp = readl(mmio + CARM_HMUC);
- tmp |= (CARM_RME | CARM_CME | CARM_WZBC);
- writel(tmp, mmio + CARM_HMUC);
- readl(mmio + CARM_HMUC); /* flush */
-
- rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 1);
- if (rc) {
- DPRINTK("EXIT, carm_init_wait 4 failed\n");
- return rc;
- }
-
- writel(0, mmio + CARM_HMPHA);
- writel(INT_DEF_MASK, mmio + CARM_INT_MASK);
-
- carm_init_responses(host);
-
- /* start initialization, probing state machine */
- spin_lock_irq(&host->lock);
- assert(host->state == HST_INVALID);
- host->state = HST_PROBE_START;
- spin_unlock_irq(&host->lock);
- schedule_work(&host->fsm_task);
-
- DPRINTK("EXIT\n");
- return 0;
-}
-
-static int carm_init_disks(struct carm_host *host)
-{
- unsigned int i;
- int rc = 0;
-
- for (i = 0; i < CARM_MAX_PORTS; i++) {
- struct gendisk *disk;
- request_queue_t *q;
- struct carm_port *port;
-
- port = &host->port[i];
- port->host = host;
- port->port_no = i;
-
- disk = alloc_disk(CARM_MINORS_PER_MAJOR);
- if (!disk) {
- rc = -ENOMEM;
- break;
- }
-
- port->disk = disk;
- sprintf(disk->disk_name, DRV_NAME "%u_%u", host->id, i);
- sprintf(disk->devfs_name, DRV_NAME "/%u_%u", host->id, i);
- disk->major = host->major;
- disk->first_minor = i * CARM_MINORS_PER_MAJOR;
- disk->fops = &carm_bd_ops;
- disk->private_data = port;
-
- q = blk_init_queue(carm_rq_fn, &host->lock);
- if (!q) {
- rc = -ENOMEM;
- break;
- }
- disk->queue = q;
- blk_queue_max_hw_segments(q, CARM_MAX_REQ_SG);
- blk_queue_max_phys_segments(q, CARM_MAX_REQ_SG);
- blk_queue_segment_boundary(q, CARM_SG_BOUNDARY);
-
- q->queuedata = port;
- }
-
- return rc;
-}
-
-static void carm_free_disks(struct carm_host *host)
-{
- unsigned int i;
-
- for (i = 0; i < CARM_MAX_PORTS; i++) {
- struct gendisk *disk = host->port[i].disk;
- if (disk) {
- request_queue_t *q = disk->queue;
-
- if (disk->flags & GENHD_FL_UP)
- del_gendisk(disk);
- if (q)
- blk_cleanup_queue(q);
- put_disk(disk);
- }
- }
-}
-
-static int carm_init_shm(struct carm_host *host)
-{
- host->shm = pci_alloc_consistent(host->pdev, CARM_SHM_SIZE,
- &host->shm_dma);
- if (!host->shm)
- return -ENOMEM;
-
- host->msg_base = host->shm + RBUF_LEN;
- host->msg_dma = host->shm_dma + RBUF_LEN;
-
- memset(host->shm, 0xff, RBUF_LEN);
- memset(host->msg_base, 0, PDC_SHM_SIZE - RBUF_LEN);
-
- return 0;
-}
-
-static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- static unsigned int printed_version;
- struct carm_host *host;
- unsigned int pci_dac;
- int rc;
- request_queue_t *q;
- unsigned int i;
-
- if (!printed_version++)
- printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
-
- rc = pci_enable_device(pdev);
- if (rc)
- return rc;
-
- rc = pci_request_regions(pdev, DRV_NAME);
- if (rc)
- goto err_out;
-
-#if IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
- rc = pci_set_dma_mask(pdev, 0xffffffffffffffffULL);
- if (!rc) {
- rc = pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);
- if (rc) {
- printk(KERN_ERR DRV_NAME "(%s): consistent DMA mask failure\n",
- pci_name(pdev));
- goto err_out_regions;
- }
- pci_dac = 1;
- } else {
-#endif
- rc = pci_set_dma_mask(pdev, 0xffffffffULL);
- if (rc) {
- printk(KERN_ERR DRV_NAME "(%s): DMA mask failure\n",
- pci_name(pdev));
- goto err_out_regions;
- }
- pci_dac = 0;
-#if IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
- }
-#endif
-
- host = kmalloc(sizeof(*host), GFP_KERNEL);
- if (!host) {
- printk(KERN_ERR DRV_NAME "(%s): memory alloc failure\n",
- pci_name(pdev));
- rc = -ENOMEM;
- goto err_out_regions;
- }
-
- memset(host, 0, sizeof(*host));
- host->pdev = pdev;
- host->flags = pci_dac ? FL_DAC : 0;
- spin_lock_init(&host->lock);
- INIT_WORK(&host->fsm_task, carm_fsm_task, host);
- init_MUTEX_LOCKED(&host->probe_sem);
-
- for (i = 0; i < ARRAY_SIZE(host->req); i++)
- host->req[i].tag = i;
-
- host->mmio = ioremap(pci_resource_start(pdev, 0),
- pci_resource_len(pdev, 0));
- if (!host->mmio) {
- printk(KERN_ERR DRV_NAME "(%s): MMIO alloc failure\n",
- pci_name(pdev));
- rc = -ENOMEM;
- goto err_out_kfree;
- }
-
- rc = carm_init_shm(host);
- if (rc) {
- printk(KERN_ERR DRV_NAME "(%s): DMA SHM alloc failure\n",
- pci_name(pdev));
- goto err_out_iounmap;
- }
-
- q = blk_init_queue(carm_oob_rq_fn, &host->lock);
- if (!q) {
- printk(KERN_ERR DRV_NAME "(%s): OOB queue alloc failure\n",
- pci_name(pdev));
- rc = -ENOMEM;
- goto err_out_pci_free;
- }
- host->oob_q = q;
- q->queuedata = host;
-
- /*
- * Figure out which major to use: 160, 161, or dynamic
- */
- if (!test_and_set_bit(0, &carm_major_alloc))
- host->major = 160;
- else if (!test_and_set_bit(1, &carm_major_alloc))
- host->major = 161;
- else
- host->flags |= FL_DYN_MAJOR;
-
- host->id = carm_host_id;
- sprintf(host->name, DRV_NAME "%d", carm_host_id);
-
- rc = register_blkdev(host->major, host->name);
- if (rc < 0)
- goto err_out_free_majors;
- if (host->flags & FL_DYN_MAJOR)
- host->major = rc;
-
- devfs_mk_dir(DRV_NAME);
-
- rc = carm_init_disks(host);
- if (rc)
- goto err_out_blkdev_disks;
-
- pci_set_master(pdev);
-
- rc = request_irq(pdev->irq, carm_interrupt, SA_SHIRQ, DRV_NAME, host);
- if (rc) {
- printk(KERN_ERR DRV_NAME "(%s): irq alloc failure\n",
- pci_name(pdev));
- goto err_out_blkdev_disks;
- }
-
- rc = carm_init_host(host);
- if (rc)
- goto err_out_free_irq;
-
- DPRINTK("waiting for probe_sem\n");
- down(&host->probe_sem);
-
- printk(KERN_INFO "%s: pci %s, ports %d, io %lx, irq %u, major %d\n",
- host->name, pci_name(pdev), (int) CARM_MAX_PORTS,
- pci_resource_start(pdev, 0), pdev->irq, host->major);
-
- carm_host_id++;
- pci_set_drvdata(pdev, host);
- return 0;
-
-err_out_free_irq:
- free_irq(pdev->irq, host);
-err_out_blkdev_disks:
- carm_free_disks(host);
- unregister_blkdev(host->major, host->name);
-err_out_free_majors:
- if (host->major == 160)
- clear_bit(0, &carm_major_alloc);
- else if (host->major == 161)
- clear_bit(1, &carm_major_alloc);
- blk_cleanup_queue(host->oob_q);
-err_out_pci_free:
- pci_free_consistent(pdev, CARM_SHM_SIZE, host->shm, host->shm_dma);
-err_out_iounmap:
- iounmap(host->mmio);
-err_out_kfree:
- kfree(host);
-err_out_regions:
- pci_release_regions(pdev);
-err_out:
- pci_disable_device(pdev);
- return rc;
-}
-
-static void carm_remove_one (struct pci_dev *pdev)
-{
- struct carm_host *host = pci_get_drvdata(pdev);
-
- if (!host) {
- printk(KERN_ERR PFX "BUG: no host data for PCI(%s)\n",
- pci_name(pdev));
- return;
- }
-
- free_irq(pdev->irq, host);
- carm_free_disks(host);
- devfs_remove(DRV_NAME);
- unregister_blkdev(host->major, host->name);
- if (host->major == 160)
- clear_bit(0, &carm_major_alloc);
- else if (host->major == 161)
- clear_bit(1, &carm_major_alloc);
- blk_cleanup_queue(host->oob_q);
- pci_free_consistent(pdev, CARM_SHM_SIZE, host->shm, host->shm_dma);
- iounmap(host->mmio);
- kfree(host);
- pci_release_regions(pdev);
- pci_disable_device(pdev);
- pci_set_drvdata(pdev, NULL);
-}
-
-static int __init carm_init(void)
-{
- return pci_module_init(&carm_driver);
-}
-
-static void __exit carm_exit(void)
-{
- pci_unregister_driver(&carm_driver);
-}
-
-module_init(carm_init);
-module_exit(carm_exit);
-
-
+++ /dev/null
-/*
- * linux/drivers/block/floppy.c
- *
- * Copyright (C) 1991, 1992 Linus Torvalds
- * Copyright (C) 1993, 1994 Alain Knaff
- * Copyright (C) 1998 Alan Cox
- */
-/*
- * 02.12.91 - Changed to static variables to indicate need for reset
- * and recalibrate. This makes some things easier (output_byte reset
- * checking etc), and means less interrupt jumping in case of errors,
- * so the code is hopefully easier to understand.
- */
-
-/*
- * This file is certainly a mess. I've tried my best to get it working,
- * but I don't like programming floppies, and I have only one anyway.
- * Urgel. I should check for more errors, and do more graceful error
- * recovery. Seems there are problems with several drives. I've tried to
- * correct them. No promises.
- */
-
-/*
- * As with hd.c, all routines within this file can (and will) be called
- * by interrupts, so extreme caution is needed. A hardware interrupt
- * handler may not sleep, or a kernel panic will happen. Thus I cannot
- * call "floppy-on" directly, but have to set a special timer interrupt
- * etc.
- */
-
-/*
- * 28.02.92 - made track-buffering routines, based on the routines written
- * by entropy@wintermute.wpi.edu (Lawrence Foard). Linus.
- */
-
-/*
- * Automatic floppy-detection and formatting written by Werner Almesberger
- * (almesber@nessie.cs.id.ethz.ch), who also corrected some problems with
- * the floppy-change signal detection.
- */
-
-/*
- * 1992/7/22 -- Hennus Bergman: Added better error reporting, fixed
- * FDC data overrun bug, added some preliminary stuff for vertical
- * recording support.
- *
- * 1992/9/17: Added DMA allocation & DMA functions. -- hhb.
- *
- * TODO: Errors are still not counted properly.
- */
-
-/* 1992/9/20
- * Modifications for ``Sector Shifting'' by Rob Hooft (hooft@chem.ruu.nl)
- * modeled after the freeware MS-DOS program fdformat/88 V1.8 by
- * Christoph H. Hochst\"atter.
- * I have fixed the shift values to the ones I always use. Maybe a new
- * ioctl() should be created to be able to modify them.
- * There is a bug in the driver that makes it impossible to format a
- * floppy as the first thing after bootup.
- */
-
-/*
- * 1993/4/29 -- Linus -- cleaned up the timer handling in the kernel, and
- * this helped the floppy driver as well. Much cleaner, and still seems to
- * work.
- */
-
-/* 1994/6/24 --bbroad-- added the floppy table entries and made
- * minor modifications to allow 2.88 floppies to be run.
- */
-
-/* 1994/7/13 -- Paul Vojta -- modified the probing code to allow three or more
- * disk types.
- */
-
-/*
- * 1994/8/8 -- Alain Knaff -- Switched to fdpatch driver: Support for bigger
- * format bug fixes, but unfortunately some new bugs too...
- */
-
-/* 1994/9/17 -- Koen Holtman -- added logging of physical floppy write
- * errors to allow safe writing by specialized programs.
- */
-
-/* 1995/4/24 -- Dan Fandrich -- added support for Commodore 1581 3.5" disks
- * by defining bit 1 of the "stretch" parameter to mean put sectors on the
- * opposite side of the disk, leaving the sector IDs alone (i.e. Commodore's
- * drives are "upside-down").
- */
-
-/*
- * 1995/8/26 -- Andreas Busse -- added Mips support.
- */
-
-/*
- * 1995/10/18 -- Ralf Baechle -- Portability cleanup; move machine dependent
- * features to asm/floppy.h.
- */
-
-/*
- * 1998/05/07 -- Russell King -- More portability cleanups; moved definition of
- * interrupt and dma channel to asm/floppy.h. Cleaned up some formatting &
- * use of '0' for NULL.
- */
-
-/*
- * 1998/06/07 -- Alan Cox -- Merged the 2.0.34 fixes for resource allocation
- * failures.
- */
-
-/*
- * 1998/09/20 -- David Weinehall -- Added slow-down code for buggy PS/2-drives.
- */
-
-/*
- * 1999/01/19 -- N.Fujita & Linux/98 Project -- Added code for NEC PC-9800
- * series.
- */
-
-/*
- * 1999/08/13 -- Paul Slootman -- floppy stopped working on Alpha after 24
- * days, 6 hours, 32 minutes and 32 seconds (i.e. MAXINT jiffies; ints were
- * being used to store jiffies, which are unsigned longs).
- */
-
-/*
- * 2000/08/28 -- Arnaldo Carvalho de Melo <acme@conectiva.com.br>
- * - get rid of check_region
- * - s/suser/capable/
- */
-
-/*
- * 2001/08/26 -- Paul Gortmaker - fix insmod oops on machines with no
- * floppy controller (lingering task on list after module is gone... boom.)
- */
-
-/*
- * 2002/02/07 -- Anton Altaparmakov - Fix io ports reservation to correct range
- * (0x3f2-0x3f5, 0x3f7). This fix is a bit of a hack but the proper fix
- * requires many non-obvious changes in arch dependent code.
- */
-
-/*
- * 2002/10/12 -- Osamu Tomita <tomita@cinet.co.jp>
- * split code from floppy.c
- * support NEC PC-9800 only
- */
-
-#define FLOPPY_SANITY_CHECK
-#undef FLOPPY_SILENT_DCL_CLEAR
-
-/*
-#define PC9800_DEBUG_FLOPPY
-#define PC9800_DEBUG_FLOPPY2
-*/
-
-#define REALLY_SLOW_IO
-
-#define DEBUGT 2
-#define DCL_DEBUG /* debug disk change line */
-
-/* do print messages for unexpected interrupts */
-static int print_unex=1;
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/kernel.h>
-#include <linux/timer.h>
-#include <linux/workqueue.h>
-#include <linux/version.h>
-#include <linux/fdreg.h>
-#include <linux/blkdev.h>
-#include <linux/blkpg.h>
-#include <linux/cdrom.h> /* for the compatibility eject ioctl */
-#include <linux/completion.h>
-
-/*
- * 1998/1/21 -- Richard Gooch <rgooch@atnf.csiro.au> -- devfs support
- */
-
-
-#include <linux/fd.h>
-#define FLOPPY98_MOTOR_MASK 0x08
-
-#include <linux/hdreg.h>
-#define FD98_STATUS (0 + FD_IOPORT )
-#define FD98_DATA (2 + FD_IOPORT )
-#define FD_MODE (4 + FD_IOPORT )
-#define FD_MODE_CHANGE 0xbe
-#define FD_EMODE_CHANGE 0x4be
-
-#include <linux/errno.h>
-#include <linux/slab.h>
-#include <linux/mm.h>
-#include <linux/bio.h>
-#include <linux/string.h>
-#include <linux/fcntl.h>
-#include <linux/delay.h>
-#include <linux/mc146818rtc.h> /* CMOS defines */
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/devfs_fs_kernel.h>
-#include <linux/device.h>
-#include <linux/buffer_head.h> /* for invalidate_buffers() */
-
-/*
- * PS/2 floppies have much slower step rates than regular floppies.
- * It's been recommended that take about 1/4 of the default speed
- * in some more extreme cases.
- */
-static int slow_floppy;
-
-#include <asm/dma.h>
-#include <asm/irq.h>
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-
-#ifndef DEFAULT_FLOPPY_IRQ
-# define DEFAULT_FLOPPY_IRQ 11
-#endif
-#ifndef DEFAULT_FLOPPY_DMA
-# define DEFAULT_FLOPPY_DMA 2
-#endif
-
-static int FLOPPY_IRQ=DEFAULT_FLOPPY_IRQ;
-static int FLOPPY_DMA=DEFAULT_FLOPPY_DMA;
-static int can_use_virtual_dma=2;
-static int auto_detect_mode = 0;
-static int retry_auto_detect = 0;
-#define FD_AFTER_RESET_DELAY 1000
-
-/* =======
- * can use virtual DMA:
- * 0 = use of virtual DMA disallowed by config
- * 1 = use of virtual DMA prescribed by config
- * 2 = no virtual DMA preference configured. By default try hard DMA,
- * but fall back on virtual DMA when not enough memory available
- */
-
-static int use_virtual_dma;
-/* =======
- * use virtual DMA
- * 0 using hard DMA
- * 1 using virtual DMA
- * This variable is set to virtual when a DMA mem problem arises, and
- * reset back in floppy_grab_irq_and_dma.
- * It is not safe to reset it in other circumstances, because the floppy
- * driver may have several buffers in use at once, and we do currently not
- * record each buffers capabilities
- */
-
-static spinlock_t floppy_lock = SPIN_LOCK_UNLOCKED;
-static struct completion device_release;
-
-static unsigned short virtual_dma_port=0x3f0;
-irqreturn_t floppy_interrupt(int irq, void *dev_id, struct pt_regs * regs);
-static int set_mode(char mask, char data);
-static void register_devfs_entries (int drive) __init;
-
-#define K_64 0x10000 /* 64KB */
-
-/* the following is the mask of allowed drives. By default units 2 and
- * 3 of both floppy controllers are disabled, because switching on the
- * motor of these drives causes system hangs on some PCI computers. drive
- * 0 is the low bit (0x1), and drive 7 is the high bit (0x80). Bits are on if
- * a drive is allowed.
- *
- * NOTE: This must come before we include the arch floppy header because
- * some ports reference this variable from there. -DaveM
- */
-
-static int allowed_drive_mask = 0x0f;
-
-#include <asm/floppy.h>
-
-static int irqdma_allocated;
-
-#define LOCAL_END_REQUEST
-#define DEVICE_NAME "floppy"
-
-#include <linux/blkpg.h>
-#include <linux/cdrom.h> /* for the compatibility eject ioctl */
-#include <linux/completion.h>
-
-static struct request *current_req;
-static struct request_queue *floppy_queue;
-
-#ifndef fd_get_dma_residue
-#define fd_get_dma_residue() get_dma_residue(FLOPPY_DMA)
-#endif
-
-/* Dma Memory related stuff */
-
-#ifndef fd_dma_mem_free
-#define fd_dma_mem_free(addr, size) free_pages(addr, get_order(size))
-#endif
-
-#ifndef fd_dma_mem_alloc
-#define fd_dma_mem_alloc(size) __get_dma_pages(GFP_KERNEL,get_order(size))
-#endif
-
-static inline void fallback_on_nodma_alloc(char **addr, size_t l)
-{
-#ifdef FLOPPY_CAN_FALLBACK_ON_NODMA
- if (*addr)
- return; /* we have the memory */
- if (can_use_virtual_dma != 2)
- return; /* no fallback allowed */
- printk("DMA memory shortage. Temporarily falling back on virtual DMA\n");
- *addr = (char *) nodma_mem_alloc(l);
-#else
- return;
-#endif
-}
-
-/* End dma memory related stuff */
-
-static unsigned long fake_change;
-static int initialising=1;
-
-#define ITYPE(x) (((x)>>2) & 0x1f)
-#define TOMINOR(x) ((x & 3) | ((x & 4) << 5))
-#define UNIT(x) ((x) & 0x03) /* drive on fdc */
-#define FDC(x) (((x) & 0x04) >> 2) /* fdc of drive */
-#define REVDRIVE(fdc, unit) ((unit) + ((fdc) << 2))
- /* reverse mapping from unit and fdc to drive */
-#define DP (&drive_params[current_drive])
-#define DRS (&drive_state[current_drive])
-#define DRWE (&write_errors[current_drive])
-#define FDCS (&fdc_state[fdc])
-#define CLEARF(x) (clear_bit(x##_BIT, &DRS->flags))
-#define SETF(x) (set_bit(x##_BIT, &DRS->flags))
-#define TESTF(x) (test_bit(x##_BIT, &DRS->flags))
-
-#define UDP (&drive_params[drive])
-#define UDRS (&drive_state[drive])
-#define UDRWE (&write_errors[drive])
-#define UFDCS (&fdc_state[FDC(drive)])
-#define UCLEARF(x) (clear_bit(x##_BIT, &UDRS->flags))
-#define USETF(x) (set_bit(x##_BIT, &UDRS->flags))
-#define UTESTF(x) (test_bit(x##_BIT, &UDRS->flags))
-
-#define DPRINT(format, args...) printk(DEVICE_NAME "%d: " format, current_drive , ## args)
-
-#define PH_HEAD(floppy,head) (((((floppy)->stretch & 2) >>1) ^ head) << 2)
-#define STRETCH(floppy) ((floppy)->stretch & FD_STRETCH)
-
-#define CLEARSTRUCT(x) memset((x), 0, sizeof(*(x)))
-
-/* read/write */
-#define COMMAND raw_cmd->cmd[0]
-#define DR_SELECT raw_cmd->cmd[1]
-#define TRACK raw_cmd->cmd[2]
-#define HEAD raw_cmd->cmd[3]
-#define SECTOR raw_cmd->cmd[4]
-#define SIZECODE raw_cmd->cmd[5]
-#define SECT_PER_TRACK raw_cmd->cmd[6]
-#define GAP raw_cmd->cmd[7]
-#define SIZECODE2 raw_cmd->cmd[8]
-#define NR_RW 9
-
-/* format */
-#define F_SIZECODE raw_cmd->cmd[2]
-#define F_SECT_PER_TRACK raw_cmd->cmd[3]
-#define F_GAP raw_cmd->cmd[4]
-#define F_FILL raw_cmd->cmd[5]
-#define NR_F 6
-
-/*
- * Maximum disk size (in kilobytes). This default is used whenever the
- * current disk size is unknown.
- * [Now it is rather a minimum]
- */
-#define MAX_DISK_SIZE 4 /* 3984*/
-
-
-/*
- * globals used by 'result()'
- */
-#define MAX_REPLIES 16
-static unsigned char reply_buffer[MAX_REPLIES];
-static int inr; /* size of reply buffer, when called from interrupt */
-#define ST0 (reply_buffer[0])
-#define ST1 (reply_buffer[1])
-#define ST2 (reply_buffer[2])
-#define ST3 (reply_buffer[0]) /* result of GETSTATUS */
-#define R_TRACK (reply_buffer[3])
-#define R_HEAD (reply_buffer[4])
-#define R_SECTOR (reply_buffer[5])
-#define R_SIZECODE (reply_buffer[6])
-
-#define SEL_DLY (2*HZ/100)
-
-/*
- * this struct defines the different floppy drive types.
- */
-static struct {
- struct floppy_drive_params params;
- const char *name; /* name printed while booting */
-} default_drive_params[]= {
-/* NOTE: the time values in jiffies should be in msec!
- CMOS drive type
- | Maximum data rate supported by drive type
- | | Head load time, msec
- | | | Head unload time, msec (not used)
- | | | | Step rate interval, usec
- | | | | | Time needed for spinup time (jiffies)
- | | | | | | Timeout for spinning down (jiffies)
- | | | | | | | Spindown offset (where disk stops)
- | | | | | | | | Select delay
- | | | | | | | | | RPS
- | | | | | | | | | | Max number of tracks
- | | | | | | | | | | | Interrupt timeout
- | | | | | | | | | | | | Max nonintlv. sectors
- | | | | | | | | | | | | | -Max Errors- flags */
-{{0, 500, 16, 16, 8000, 1*HZ, 3*HZ, 0, SEL_DLY, 5, 80, 3*HZ, 20, {3,1,2,0,2}, 0,
- 0, { 7, 4, 8, 2, 1, 5, 3,10}, 3*HZ/2, 0 }, "unknown" },
-
-{{1, 300, 16, 16, 8000, 1*HZ, 3*HZ, 0, SEL_DLY, 5, 40, 3*HZ, 17, {3,1,2,0,2}, 0,
- 0, { 1, 0, 0, 0, 0, 0, 0, 0}, 3*HZ/2, 1 }, "360K PC" }, /*5 1/4 360 KB PC*/
-
-{{2, 500, 16, 16, 6000, 4*HZ/10, 3*HZ, 14, SEL_DLY, 6, 83, 3*HZ, 17, {3,1,2,0,2}, 0,
- 0, { 2, 6, 4, 0, 0, 0, 0, 0}, 3*HZ/2, 2 }, "1.2M" }, /*5 1/4 HD AT*/
-
-{{3, 250, 16, 16, 3000, 1*HZ, 3*HZ, 0, SEL_DLY, 5, 83, 3*HZ, 20, {3,1,2,0,2}, 0,
- 0, { 4, 6, 0, 0, 0, 0, 0, 0}, 3*HZ/2, 4 }, "720k" }, /*3 1/2 DD*/
-
-{{4, 500, 16, 16, 4000, 4*HZ/10, 3*HZ, 10, SEL_DLY, 5, 83, 3*HZ, 20, {3,1,2,0,2}, 0,
- 0, { 7,10, 2, 4, 6, 0, 0, 0}, 3*HZ/2, 7 }, "1.44M" }, /*3 1/2 HD*/
-
-{{5, 1000, 15, 8, 3000, 4*HZ/10, 3*HZ, 10, SEL_DLY, 5, 83, 3*HZ, 40, {3,1,2,0,2}, 0,
- 0, { 7, 8, 4,25,28,22,31,21}, 3*HZ/2, 8 }, "2.88M AMI BIOS" }, /*3 1/2 ED*/
-
-{{6, 1000, 15, 8, 3000, 4*HZ/10, 3*HZ, 10, SEL_DLY, 5, 83, 3*HZ, 40, {3,1,2,0,2}, 0,
- 0, { 7, 8, 4,25,28,22,31,21}, 3*HZ/2, 8 }, "2.88M" } /*3 1/2 ED*/
-/* | --autodetected formats--- | | |
- * read_track | | Name printed when booting
- * | Native format
- * Frequency of disk change checks */
-};
-
-static struct floppy_drive_params drive_params[N_DRIVE];
-static struct floppy_drive_struct drive_state[N_DRIVE];
-static struct floppy_write_errors write_errors[N_DRIVE];
-static struct timer_list motor_off_timer[N_DRIVE];
-static struct gendisk *disks[N_DRIVE];
-static struct block_device *opened_bdev[N_DRIVE];
-static DECLARE_MUTEX(open_lock);
-static struct floppy_raw_cmd *raw_cmd, default_raw_cmd;
-
-/*
- * This struct defines the different floppy types.
- *
- * Bit 0 of 'stretch' tells if the tracks need to be doubled for some
- * types (e.g. 360kB diskette in 1.2MB drive, etc.). Bit 1 of 'stretch'
- * tells if the disk is in Commodore 1581 format, which means side 0 sectors
- * are located on side 1 of the disk but with a side 0 ID, and vice-versa.
- * This is the same as the Sharp MZ-80 5.25" CP/M disk format, except that the
- * 1581's logical side 0 is on physical side 1, whereas the Sharp's logical
- * side 0 is on physical side 0 (but with the misnamed sector IDs).
- * 'stretch' should probably be renamed to something more general, like
- * 'options'. Other parameters should be self-explanatory (see also
- * setfdprm(8)).
- */
-/*
- Size
- | Sectors per track
- | | Head
- | | | Tracks
- | | | | Stretch
- | | | | | Gap 1 size
- | | | | | | Data rate, | 0x40 for perp
- | | | | | | | Spec1 (stepping rate, head unload
- | | | | | | | | /fmt gap (gap2) */
-static struct floppy_struct floppy_type[32] = {
- { 0, 0,0, 0,0,0x00,0x00,0x00,0x00,NULL }, /* 0 no testing */
-#if 0
- { 720, 9,2,40,0,0x2A,0x02,0xDF,0x50,"d360" }, /* 1 360KB PC */
-#else
- { 2464,16,2,77,0,0x35,0x48,0xDF,0x74,"d360" }, /* 1 1.25MB 98 */
-#endif
- { 2400,15,2,80,0,0x1B,0x00,0xDF,0x54,"h1200" }, /* 2 1.2MB AT */
- { 720, 9,1,80,0,0x2A,0x02,0xDF,0x50,"D360" }, /* 3 360KB SS 3.5" */
- { 1440, 9,2,80,0,0x2A,0x02,0xDF,0x50,"D720" }, /* 4 720KB 3.5" */
- { 720, 9,2,40,1,0x23,0x01,0xDF,0x50,"h360" }, /* 5 360KB AT */
- { 1440, 9,2,80,0,0x23,0x01,0xDF,0x50,"h720" }, /* 6 720KB AT */
- { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,"H1440" }, /* 7 1.44MB 3.5" */
- { 5760,36,2,80,0,0x1B,0x43,0xAF,0x54,"E2880" }, /* 8 2.88MB 3.5" */
- { 6240,39,2,80,0,0x1B,0x43,0xAF,0x28,"E3120" }, /* 9 3.12MB 3.5" */
-
- { 2880,18,2,80,0,0x25,0x00,0xDF,0x02,"h1440" }, /* 10 1.44MB 5.25" */
- { 3360,21,2,80,0,0x1C,0x00,0xCF,0x0C,"H1680" }, /* 11 1.68MB 3.5" */
- { 820,10,2,41,1,0x25,0x01,0xDF,0x2E,"h410" }, /* 12 410KB 5.25" */
- { 1640,10,2,82,0,0x25,0x02,0xDF,0x2E,"H820" }, /* 13 820KB 3.5" */
- { 2952,18,2,82,0,0x25,0x00,0xDF,0x02,"h1476" }, /* 14 1.48MB 5.25" */
- { 3444,21,2,82,0,0x25,0x00,0xDF,0x0C,"H1722" }, /* 15 1.72MB 3.5" */
- { 840,10,2,42,1,0x25,0x01,0xDF,0x2E,"h420" }, /* 16 420KB 5.25" */
- { 1660,10,2,83,0,0x25,0x02,0xDF,0x2E,"H830" }, /* 17 830KB 3.5" */
- { 2988,18,2,83,0,0x25,0x00,0xDF,0x02,"h1494" }, /* 18 1.49MB 5.25" */
- { 3486,21,2,83,0,0x25,0x00,0xDF,0x0C,"H1743" }, /* 19 1.74 MB 3.5" */
-
- { 1760,11,2,80,0,0x1C,0x09,0xCF,0x00,"h880" }, /* 20 880KB 5.25" */
- { 2080,13,2,80,0,0x1C,0x01,0xCF,0x00,"D1040" }, /* 21 1.04MB 3.5" */
- { 2240,14,2,80,0,0x1C,0x19,0xCF,0x00,"D1120" }, /* 22 1.12MB 3.5" */
- { 3200,20,2,80,0,0x1C,0x20,0xCF,0x2C,"h1600" }, /* 23 1.6MB 5.25" */
- { 3520,22,2,80,0,0x1C,0x08,0xCF,0x2e,"H1760" }, /* 24 1.76MB 3.5" */
- { 3840,24,2,80,0,0x1C,0x20,0xCF,0x00,"H1920" }, /* 25 1.92MB 3.5" */
- { 6400,40,2,80,0,0x25,0x5B,0xCF,0x00,"E3200" }, /* 26 3.20MB 3.5" */
- { 7040,44,2,80,0,0x25,0x5B,0xCF,0x00,"E3520" }, /* 27 3.52MB 3.5" */
- { 7680,48,2,80,0,0x25,0x63,0xCF,0x00,"E3840" }, /* 28 3.84MB 3.5" */
-
- { 3680,23,2,80,0,0x1C,0x10,0xCF,0x00,"H1840" }, /* 29 1.84MB 3.5" */
- { 1600,10,2,80,0,0x25,0x02,0xDF,0x2E,"D800" }, /* 30 800KB 3.5" */
- { 3200,20,2,80,0,0x1C,0x00,0xCF,0x2C,"H1600" }, /* 31 1.6MB 3.5" */
-};
-
-#define NUMBER(x) (sizeof(x) / sizeof(*(x)))
-#define SECTSIZE (_FD_SECTSIZE(*floppy))
-
-/* Auto-detection: Disk type used until the next media change occurs. */
-static struct floppy_struct *current_type[N_DRIVE];
-
-/*
- * User-provided type information. current_type points to
- * the respective entry of this array.
- */
-static struct floppy_struct user_params[N_DRIVE];
-
-static sector_t floppy_sizes[256];
-
-/*
- * The driver is trying to determine the correct media format
- * while probing is set. rw_interrupt() clears it after a
- * successful access.
- */
-static int probing;
-
-/* Synchronization of FDC access. */
-#define FD_COMMAND_NONE -1
-#define FD_COMMAND_ERROR 2
-#define FD_COMMAND_OKAY 3
-
-static volatile int command_status = FD_COMMAND_NONE;
-static unsigned long fdc_busy;
-static DECLARE_WAIT_QUEUE_HEAD(fdc_wait);
-static DECLARE_WAIT_QUEUE_HEAD(command_done);
-
-#define NO_SIGNAL (!interruptible || !signal_pending(current))
-#define CALL(x) if ((x) == -EINTR) return -EINTR
-#define ECALL(x) if ((ret = (x))) return ret;
-#define _WAIT(x,i) CALL(ret=wait_til_done((x),i))
-#define WAIT(x) _WAIT((x),interruptible)
-#define IWAIT(x) _WAIT((x),1)
-
-/* Errors during formatting are counted here. */
-static int format_errors;
-
-/* Format request descriptor. */
-static struct format_descr format_req;
-
-/*
- * Rate is 0 for 500kb/s, 1 for 300kbps, 2 for 250kbps
- * Spec1 is 0xSH, where S is stepping rate (F=1ms, E=2ms, D=3ms etc),
- * H is head unload time (1=16ms, 2=32ms, etc)
- */
-
-/*
- * Track buffer
- * Because these are written to by the DMA controller, they must
- * not contain a 64k byte boundary crossing, or data will be
- * corrupted/lost.
- */
-static char *floppy_track_buffer;
-static int max_buffer_sectors;
-
-static int *errors;
-typedef void (*done_f)(int);
-static struct cont_t {
- void (*interrupt)(void); /* this is called after the interrupt of the
- * main command */
- void (*redo)(void); /* this is called to retry the operation */
- void (*error)(void); /* this is called to tally an error */
- done_f done; /* this is called to say if the operation has
- * succeeded/failed */
-} *cont;
-
-static void floppy_ready(void);
-static void floppy_start(void);
-static void process_fd_request(void);
-static void recalibrate_floppy(void);
-static void floppy_shutdown(unsigned long);
-
-static int floppy_grab_irq_and_dma(void);
-static void floppy_release_irq_and_dma(void);
-
-/*
- * The "reset" variable should be tested whenever an interrupt is scheduled,
- * after the commands have been sent. This is to ensure that the driver doesn't
- * get wedged when the interrupt doesn't come because of a failed command.
- * reset doesn't need to be tested before sending commands, because
- * output_byte is automatically disabled when reset is set.
- */
-#define CHECK_RESET { if (FDCS->reset){ reset_fdc(); return; } }
-static void reset_fdc(void);
-
-/*
- * These are global variables, as that's the easiest way to give
- * information to interrupts. They are the data used for the current
- * request.
- */
-#define NO_TRACK -1
-#define NEED_1_RECAL -2
-#define NEED_2_RECAL -3
-
-static int usage_count;
-
-/* buffer related variables */
-static int buffer_track = -1;
-static int buffer_drive = -1;
-static int buffer_min = -1;
-static int buffer_max = -1;
-
-/* fdc related variables, should end up in a struct */
-static struct floppy_fdc_state fdc_state[N_FDC];
-static int fdc; /* current fdc */
-
-static struct floppy_struct *_floppy = floppy_type;
-static unsigned char current_drive;
-static long current_count_sectors;
-static unsigned char fsector_t; /* sector in track */
-static unsigned char in_sector_offset; /* offset within physical sector,
- * expressed in units of 512 bytes */
-
-#ifndef fd_eject
-static inline int fd_eject(int drive)
-{
- return -EINVAL;
-}
-#endif
-
-#ifdef DEBUGT
-static long unsigned debugtimer;
-#endif
-
-/*
- * Debugging
- * =========
- */
-static inline void set_debugt(void)
-{
-#ifdef DEBUGT
- debugtimer = jiffies;
-#endif
-}
-
-static inline void debugt(const char *message)
-{
-#ifdef DEBUGT
- if (DP->flags & DEBUGT)
- printk("%s dtime=%lu\n", message, jiffies-debugtimer);
-#endif
-}
-
-typedef void (*timeout_fn)(unsigned long);
-static struct timer_list fd_timeout = TIMER_INITIALIZER(floppy_shutdown, 0, 0);
-
-static const char *timeout_message;
-
-#ifdef FLOPPY_SANITY_CHECK
-static void is_alive(const char *message)
-{
- /* this routine checks whether the floppy driver is "alive" */
- if (fdc_busy && command_status < 2 && !timer_pending(&fd_timeout)){
- DPRINT("timeout handler died: %s\n",message);
- }
-}
-#endif
-
-static void (*do_floppy)(void) = NULL;
-
-#ifdef FLOPPY_SANITY_CHECK
-
-#define OLOGSIZE 20
-
-static void (*lasthandler)(void);
-static unsigned long interruptjiffies;
-static unsigned long resultjiffies;
-static int resultsize;
-static unsigned long lastredo;
-
-static struct output_log {
- unsigned char data;
- unsigned char status;
- unsigned long jiffies;
-} output_log[OLOGSIZE];
-
-static int output_log_pos;
-#endif
-
-#define current_reqD -1
-#define MAXTIMEOUT -2
-
-static void reschedule_timeout(int drive, const char *message, int marg)
-{
- unsigned long delay;
-
- if (drive == current_reqD)
- drive = current_drive;
- if (drive < 0 || drive > N_DRIVE) {
- delay = 20UL*HZ;
- drive=0;
- } else
- delay = UDP->timeout;
- mod_timer(&fd_timeout, delay + jiffies);
- if (UDP->flags & FD_DEBUG){
- DPRINT("reschedule timeout ");
- printk(message, marg);
- printk("\n");
- }
- timeout_message = message;
-}
-
-static int maximum(int a, int b)
-{
- if (a > b)
- return a;
- else
- return b;
-}
-#define INFBOUND(a,b) (a)=maximum((a),(b));
-
-static int minimum(int a, int b)
-{
- if (a < b)
- return a;
- else
- return b;
-}
-#define SUPBOUND(a,b) (a)=minimum((a),(b));
-
-
-/*
- * Bottom half floppy driver.
- * ==========================
- *
- * This part of the file contains the code talking directly to the hardware,
- * and also the main service loop (seek-configure-spinup-command)
- */
-
-/*
- * disk change.
- * This routine is responsible for maintaining the FD_DISK_CHANGE flag,
- * and the last_checked date.
- *
- * last_checked is the date of the last check which showed 'no disk change'
- * FD_DISK_CHANGE is set under two conditions:
- * 1. The floppy has been changed after some i/o to that floppy already
- * took place.
- * 2. No floppy disk is in the drive. This is done in order to ensure that
- * requests are quickly flushed in case there is no disk in the drive. It
- * follows that FD_DISK_CHANGE can only be cleared if there is a disk in
- * the drive.
- *
- * For 1., maxblock is observed. Maxblock is 0 if no i/o has taken place yet.
- * For 2., FD_DISK_NEWCHANGE is watched. FD_DISK_NEWCHANGE is cleared on
- * each seek. If a disk is present, the disk change line should also be
- * cleared on each seek. Thus, if FD_DISK_NEWCHANGE is clear, but the disk
- * change line is set, this means either that no disk is in the drive, or
- * that it has been removed since the last seek.
- *
- * This means that we really have a third possibility too:
- * The floppy has been changed after the last seek.
- */
-
-static int disk_change(int drive)
-{
- return UTESTF(FD_DISK_CHANGED);
-}
-
-static int set_mode(char mask, char data)
-{
- register unsigned char newdor, olddor;
-
- olddor = FDCS->dor;
- newdor = (olddor & mask) | data;
- if (newdor != olddor) {
- FDCS->dor = newdor;
- fd_outb(newdor, FD_MODE);
- }
-
- if (newdor & FLOPPY98_MOTOR_MASK)
- floppy_grab_irq_and_dma();
-
- if (olddor & FLOPPY98_MOTOR_MASK)
- floppy_release_irq_and_dma();
-
- return olddor;
-}
-
-static void twaddle(void)
-{
- if (DP->select_delay)
- return;
-
- fd_outb(FDCS->dor & 0xf7, FD_MODE);
- fd_outb(FDCS->dor, FD_MODE);
- DRS->select_date = jiffies;
-}
-
-/* reset all driver information about the current fdc. This is needed after
- * a reset, and after a raw command. */
-static void reset_fdc_info(int mode)
-{
- int drive;
-
- FDCS->spec1 = FDCS->spec2 = -1;
- FDCS->need_configure = 1;
- FDCS->perp_mode = 1;
- FDCS->rawcmd = 0;
- for (drive = 0; drive < N_DRIVE; drive++)
- if (FDC(drive) == fdc &&
- (mode || UDRS->track != NEED_1_RECAL))
- UDRS->track = NEED_2_RECAL;
-}
-
-/* selects the fdc and drive, and enables the fdc's input/dma. */
-static void set_fdc(int drive)
-{
- fdc = 0;
- current_drive = drive;
- set_mode(~0, 0x10);
- if (FDCS->rawcmd == 2)
- reset_fdc_info(1);
-
- if (fd_inb(FD98_STATUS) != STATUS_READY)
- FDCS->reset = 1;
-}
-
-/* locks the driver */
-static int _lock_fdc(int drive, int interruptible, int line)
-{
- if (!usage_count){
- printk(KERN_ERR "Trying to lock fdc while usage count=0 at line %d\n", line);
- return -1;
- }
- if(floppy_grab_irq_and_dma()==-1)
- return -EBUSY;
-
- if (test_and_set_bit(0, &fdc_busy)) {
- DECLARE_WAITQUEUE(wait, current);
- add_wait_queue(&fdc_wait, &wait);
-
- for (;;) {
- set_current_state(TASK_INTERRUPTIBLE);
-
- if (!test_and_set_bit(0, &fdc_busy))
- break;
-
- schedule();
-
- if (!NO_SIGNAL) {
- remove_wait_queue(&fdc_wait, &wait);
- return -EINTR;
- }
- }
-
- set_current_state(TASK_RUNNING);
- remove_wait_queue(&fdc_wait, &wait);
- }
- command_status = FD_COMMAND_NONE;
-
- reschedule_timeout(drive, "lock fdc", 0);
- set_fdc(drive);
- return 0;
-}
-
-#define lock_fdc(drive,interruptible) _lock_fdc(drive,interruptible, __LINE__)
-
-#define LOCK_FDC(drive,interruptible) \
-if (lock_fdc(drive,interruptible)) return -EINTR;
-
-
-/* unlocks the driver */
-static inline void unlock_fdc(void)
-{
- raw_cmd = 0;
- if (!fdc_busy)
- DPRINT("FDC access conflict!\n");
-
- if (do_floppy)
- DPRINT("device interrupt still active at FDC release: %p!\n",
- do_floppy);
- command_status = FD_COMMAND_NONE;
- del_timer(&fd_timeout);
- cont = NULL;
- clear_bit(0, &fdc_busy);
- floppy_release_irq_and_dma();
- wake_up(&fdc_wait);
-}
-
-#ifndef CONFIG_PC9800_MOTOR_OFF /* tomita */
-
-/* switches the motor off after a given timeout */
-static void motor_off_callback(unsigned long nr)
-{
- printk(KERN_DEBUG "fdc%lu: turn off motor\n", nr);
-}
-
-/* schedules motor off */
-static void floppy_off(unsigned int drive)
-{
-}
-
-#else /* CONFIG_PC9800_MOTOR_OFF */
-
-/* switches the motor off after a given timeout */
-static void motor_off_callback(unsigned long fdc)
-{
- printk(KERN_DEBUG "fdc%u: turn off motor\n", (unsigned int) fdc);
-
- fd_outb(0, FD_MODE); /* MTON = 0 */
-}
-
-static struct timer_list motor_off_timer[N_FDC] = {
- { data: 0, function: motor_off_callback },
-#if N_FDC > 1
- { data: 1, function: motor_off_callback },
-#endif
-#if N_FDC > 2
-# error "N_FDC > 2; please fix initializer for motor_off_timer[]"
-#endif
-};
-
-/* schedules motor off */
-static void floppy_off(unsigned int drive)
-{
- unsigned long volatile delta;
- register int fdc = FDC(drive);
-
- if (!(FDCS->dor & (0x10 << UNIT(drive))))
- return;
-
- del_timer(motor_off_timer + fdc);
-
-#if 0
- /* make spindle stop in a position which minimizes spinup time
- * next time */
- if (UDP->rps){
- delta = jiffies - UDRS->first_read_date + HZ -
- UDP->spindown_offset;
- delta = ((delta * UDP->rps) % HZ) / UDP->rps;
- motor_off_timer[drive].expires = jiffies + UDP->spindown - delta;
- }
-#else
- if (UDP->rps)
- motor_off_timer[drive].expires = jiffies + UDP->spindown;
-#endif
-
- add_timer(motor_off_timer + fdc);
-}
-
-#endif /* CONFIG_PC9800_MOTOR_OFF */
-
-/*
- * cycle through all N_DRIVE floppy drives, for disk change testing.
- * stopping at current drive. This is done before any long operation, to
- * be sure to have up to date disk change information.
- */
-static void scandrives(void)
-{
- int i, drive, saved_drive;
-
- if (DP->select_delay)
- return;
-
- saved_drive = current_drive;
- for (i=0; i < N_DRIVE; i++){
- drive = (saved_drive + i + 1) % N_DRIVE;
- if (UDRS->fd_ref == 0 || UDP->select_delay != 0)
- continue; /* skip closed drives */
- set_fdc(drive);
- }
- set_fdc(saved_drive);
-}
-
-static void empty(void)
-{
-}
-
-static DECLARE_WORK(floppy_work, NULL, NULL);
-
-static void schedule_bh(void (*handler) (void))
-{
- PREPARE_WORK(&floppy_work, (void (*)(void *))handler, NULL);
- schedule_work(&floppy_work);
-}
-
-static struct timer_list fd_timer = TIMER_INITIALIZER(NULL, 0, 0);
-
-static void cancel_activity(void)
-{
- do_floppy = NULL;
- PREPARE_WORK(&floppy_work, (void*)(void*)empty, NULL);
- del_timer(&fd_timer);
-}
-
-/* this function makes sure that the disk stays in the drive during the
- * transfer */
-static void fd_watchdog(void)
-{
-#ifdef DCL_DEBUG
- if (DP->flags & FD_DEBUG){
- DPRINT("calling disk change from watchdog\n");
- }
-#endif
-
- if (disk_change(current_drive)){
- DPRINT("disk removed during i/o\n");
- cancel_activity();
- cont->done(0);
- reset_fdc();
- } else {
- del_timer(&fd_timer);
- fd_timer.function = (timeout_fn) fd_watchdog;
- fd_timer.expires = jiffies + HZ / 10;
- add_timer(&fd_timer);
- }
-}
-
-static void main_command_interrupt(void)
-{
- del_timer(&fd_timer);
- cont->interrupt();
-}
-
-/* waits for a delay (spinup or select) to pass */
-static int fd_wait_for_completion(unsigned long delay, timeout_fn function)
-{
- if (FDCS->reset){
- reset_fdc(); /* do the reset during sleep to win time
- * if we don't need to sleep, it's a good
- * occasion anyways */
- return 1;
- }
-
- if ((signed) (jiffies - delay) < 0){
- del_timer(&fd_timer);
- fd_timer.function = function;
- fd_timer.expires = delay;
- add_timer(&fd_timer);
- return 1;
- }
- return 0;
-}
-
-static spinlock_t floppy_hlt_lock = SPIN_LOCK_UNLOCKED;
-static int hlt_disabled;
-static void floppy_disable_hlt(void)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&floppy_hlt_lock, flags);
- if (!hlt_disabled) {
- hlt_disabled=1;
-#ifdef HAVE_DISABLE_HLT
- disable_hlt();
-#endif
- }
- spin_unlock_irqrestore(&floppy_hlt_lock, flags);
-}
-
-static void floppy_enable_hlt(void)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&floppy_hlt_lock, flags);
- if (hlt_disabled){
- hlt_disabled=0;
-#ifdef HAVE_DISABLE_HLT
- enable_hlt();
-#endif
- }
- spin_unlock_irqrestore(&floppy_hlt_lock, flags);
-}
-
-
-static void setup_DMA(void)
-{
- unsigned long f;
-
-#ifdef FLOPPY_SANITY_CHECK
- if (raw_cmd->length == 0){
- int i;
-
- printk("zero dma transfer size:");
- for (i=0; i < raw_cmd->cmd_count; i++)
- printk("%x,", raw_cmd->cmd[i]);
- printk("\n");
- cont->done(0);
- FDCS->reset = 1;
- return;
- }
- if (((unsigned long) raw_cmd->kernel_data) % 512){
- printk("non aligned address: %p\n", raw_cmd->kernel_data);
- cont->done(0);
- FDCS->reset=1;
- return;
- }
-#endif
- f=claim_dma_lock();
- fd_disable_dma();
-#ifdef fd_dma_setup
- if (fd_dma_setup(raw_cmd->kernel_data, raw_cmd->length,
- (raw_cmd->flags & FD_RAW_READ)?
- DMA_MODE_READ : DMA_MODE_WRITE,
- FDCS->address) < 0) {
- release_dma_lock(f);
- cont->done(0);
- FDCS->reset=1;
- return;
- }
- release_dma_lock(f);
-#else
- fd_clear_dma_ff();
- fd_cacheflush(raw_cmd->kernel_data, raw_cmd->length);
- fd_set_dma_mode((raw_cmd->flags & FD_RAW_READ)?
- DMA_MODE_READ : DMA_MODE_WRITE);
- fd_set_dma_addr(raw_cmd->kernel_data);
- fd_set_dma_count(raw_cmd->length);
- virtual_dma_port = FDCS->address;
- fd_enable_dma();
- release_dma_lock(f);
-#endif
- floppy_disable_hlt();
-}
-
-static void show_floppy(void);
-
-/* waits until the fdc becomes ready */
-
-#ifdef PC9800_DEBUG_FLOPPY
-#define READY_DELAY 10000000
-#else
-#define READY_DELAY 100000
-#endif
-
-static int wait_til_ready(void)
-{
- int counter, status;
- if (FDCS->reset)
- return -1;
- for (counter = 0; counter < READY_DELAY; counter++) {
- status = fd_inb(FD98_STATUS);
- if (status & STATUS_READY)
- return status;
- }
- if (!initialising) {
- DPRINT("Getstatus times out (%x) on fdc %d\n",
- status, fdc);
- show_floppy();
- }
- FDCS->reset = 1;
- return -1;
-}
-
-/* sends a command byte to the fdc */
-static int output_byte(char byte)
-{
- int status;
-
- if ((status = wait_til_ready()) < 0)
- return -1;
- if ((status & (STATUS_READY|STATUS_DIR|STATUS_DMA)) == STATUS_READY){
- fd_outb(byte,FD98_DATA);
-#ifdef FLOPPY_SANITY_CHECK
- output_log[output_log_pos].data = byte;
- output_log[output_log_pos].status = status;
- output_log[output_log_pos].jiffies = jiffies;
- output_log_pos = (output_log_pos + 1) % OLOGSIZE;
-#endif
- return 0;
- }
- FDCS->reset = 1;
- if (!initialising) {
- DPRINT("Unable to send byte %x to FDC. Fdc=%x Status=%x\n",
- byte, fdc, status);
- show_floppy();
- }
- return -1;
-}
-#define LAST_OUT(x) if (output_byte(x)<0){ reset_fdc();return;}
-
-/* gets the response from the fdc */
-static int result(void)
-{
- int i, status=0;
-
- for(i=0; i < MAX_REPLIES; i++) {
- if ((status = wait_til_ready()) < 0)
- break;
- status &= STATUS_DIR|STATUS_READY|STATUS_BUSY|STATUS_DMA;
- if ((status & ~STATUS_BUSY) == STATUS_READY){
-#ifdef FLOPPY_SANITY_CHECK
- resultjiffies = jiffies;
- resultsize = i;
-#endif
- return i;
- }
- if (status == (STATUS_DIR|STATUS_READY|STATUS_BUSY))
- reply_buffer[i] = fd_inb(FD98_DATA);
- else
- break;
- }
- if (!initialising) {
- DPRINT("get result error. Fdc=%d Last status=%x Read bytes=%d\n",
- fdc, status, i);
- show_floppy();
- }
- FDCS->reset = 1;
- return -1;
-}
-
-static int fifo_depth = 0xa;
-static int no_fifo;
-
-#define NOMINAL_DTR 500
-
-/* Issue a "SPECIFY" command to set the step rate time, head unload time,
- * head load time, and DMA disable flag to values needed by floppy.
- *
- * The value "dtr" is the data transfer rate in Kbps. It is needed
- * to account for the data rate-based scaling done by the 82072 and 82077
- * FDC types. This parameter is ignored for other types of FDCs (i.e.
- * 8272a).
- *
- * Note that changing the data transfer rate has a (probably deleterious)
- * effect on the parameters subject to scaling for 82072/82077 FDCs, so
- * fdc_specify is called again after each data transfer rate
- * change.
- *
- * srt: 1000 to 16000 in microseconds
- * hut: 16 to 240 milliseconds
- * hlt: 2 to 254 milliseconds
- *
- * These values are rounded up to the next highest available delay time.
- */
-static void fdc_specify(void)
-{
- output_byte(FD_SPECIFY);
- output_byte(FDCS->spec1 = 0xdf);
- output_byte(FDCS->spec2 = 0x24);
-}
-
-static void tell_sector(void)
-{
- printk(": track %d, head %d, sector %d, size %d",
- R_TRACK, R_HEAD, R_SECTOR, R_SIZECODE);
-} /* tell_sector */
-
-static int auto_detect_mode_pc9800(void)
-{
-#ifdef PC9800_DEBUG_FLOPPY
- printk("auto_detect_mode_pc9800: retry_auto_detect=%d\n",
- retry_auto_detect);
-#endif
- if (retry_auto_detect > 4) {
- retry_auto_detect = 0;
- return 1;
- }
-
- switch ((int)(_floppy - floppy_type)) {
- case 2:
- _floppy = floppy_type + 4;
- break;
-
- case 4:
- case 6:
- _floppy = floppy_type + 7;
- break;
-
- case 7:
- case 10:
- _floppy = floppy_type + 2;
- break;
-
- default:
- _floppy = floppy_type + 7;
- }
-
- retry_auto_detect++;
- return 0;
-}
-
-static void access_mode_change_pc9800(void);
-
-/*
- * OK, this error interpreting routine is called after a
- * DMA read/write has succeeded
- * or failed, so we check the results, and copy any buffers.
- * hhb: Added better error reporting.
- * ak: Made this into a separate routine.
- */
-static int interpret_errors(void)
-{
- char bad;
-
- if (inr!=7) {
- DPRINT("-- FDC reply error");
- FDCS->reset = 1;
- return 1;
- }
-
- /* check IC to find cause of interrupt */
- switch (ST0 & ST0_INTR) {
- case 0x40: /* error occurred during command execution */
- if (ST1 & ST1_EOC)
- return 0; /* occurs with pseudo-DMA */
- bad = 1;
- if (ST1 & ST1_WP) {
- DPRINT("Drive is write protected\n");
- CLEARF(FD_DISK_WRITABLE);
- cont->done(0);
- bad = 2;
- } else if (ST1 & ST1_ND) {
- SETF(FD_NEED_TWADDLE);
- } else if (ST1 & ST1_OR) {
- if (DP->flags & FTD_MSG)
- DPRINT("Over/Underrun - retrying\n");
- bad = 0;
- }else if (*errors >= DP->max_errors.reporting){
- if (ST0 & ST0_ECE) {
- printk("Recalibrate failed!");
- } else if (ST2 & ST2_CRC) {
- printk("data CRC error");
- tell_sector();
- } else if (ST1 & ST1_CRC) {
- printk("CRC error");
- tell_sector();
- } else if ((ST1 & (ST1_MAM|ST1_ND)) || (ST2 & ST2_MAM)) {
- if (auto_detect_mode) {
- bad = (char)auto_detect_mode_pc9800();
- access_mode_change_pc9800();
- }
-
- if (bad) {
- printk("floppy error: MA: _floppy - floppy_type=%d\n", (int)(_floppy - floppy_type));
- printk("bad=%d\n", (int)bad);
- if (!probing) {
- printk("sector not found");
- tell_sector();
- } else
- printk("probe failed...");
- }
- } else if (ST2 & ST2_WC) { /* seek error */
- printk("wrong cylinder");
- } else if (ST2 & ST2_BC) { /* cylinder marked as bad */
- printk("bad cylinder");
- } else {
- printk("unknown error. ST[0..2] are: 0x%x 0x%x 0x%x", ST0, ST1, ST2);
- tell_sector();
- }
- printk("\n");
-
- }
- if (ST2 & ST2_WC || ST2 & ST2_BC)
- /* wrong cylinder => recal */
- DRS->track = NEED_2_RECAL;
- return bad;
- case 0x80: /* invalid command given */
- DPRINT("Invalid FDC command given!\n");
- cont->done(0);
- return 2;
- case 0xc0:
- SETF(FD_DISK_CHANGED);
- SETF(FD_DISK_WRITABLE);
- DPRINT("Abnormal termination caused by polling\n");
- cont->error();
- return 2;
- default: /* (0) Normal command termination */
- auto_detect_mode = 0;
- return 0;
- }
-}
-
-/*
- * This routine is called when everything should be correctly set up
- * for the transfer (i.e. floppy motor is on, the correct floppy is
- * selected, and the head is sitting on the right track).
- */
-static void setup_rw_floppy(void)
-{
- int i,r, flags,dflags;
- unsigned long ready_date;
- timeout_fn function;
-
- access_mode_change_pc9800();
- flags = raw_cmd->flags;
- if (flags & (FD_RAW_READ | FD_RAW_WRITE))
- flags |= FD_RAW_INTR;
-
- if ((flags & FD_RAW_SPIN) && !(flags & FD_RAW_NO_MOTOR)){
- ready_date = DRS->spinup_date + DP->spinup;
- /* If spinup will take a long time, rerun scandrives
- * again just before spinup completion. Beware that
- * after scandrives, we must again wait for selection.
- */
- if ((signed) (ready_date - jiffies) > DP->select_delay){
- ready_date -= DP->select_delay;
- function = (timeout_fn) floppy_start;
- } else
- function = (timeout_fn) setup_rw_floppy;
-
- /* wait until the floppy is spinning fast enough */
- if (fd_wait_for_completion(ready_date,function))
- return;
- }
- dflags = DRS->flags;
-
- if ((flags & FD_RAW_READ) || (flags & FD_RAW_WRITE))
- setup_DMA();
-
- if (flags & FD_RAW_INTR)
- do_floppy = main_command_interrupt;
-
- r=0;
- for (i=0; i< raw_cmd->cmd_count; i++)
- r|=output_byte(raw_cmd->cmd[i]);
-
-#ifdef DEBUGT
- debugt("rw_command: ");
-#endif
- if (r){
- cont->error();
- reset_fdc();
- return;
- }
-
- if (!(flags & FD_RAW_INTR)){
- inr = result();
- cont->interrupt();
- } else if (flags & FD_RAW_NEED_DISK)
- fd_watchdog();
-}
-
-static int blind_seek;
-
-/*
- * This is the routine called after every seek (or recalibrate) interrupt
- * from the floppy controller.
- */
-static void seek_interrupt(void)
-{
-#ifdef DEBUGT
- debugt("seek interrupt:");
-#endif
- if (inr != 2 || (ST0 & 0xF8) != 0x20) {
- DRS->track = NEED_2_RECAL;
- cont->error();
- cont->redo();
- return;
- }
- if (DRS->track >= 0 && DRS->track != ST1 && !blind_seek){
-#ifdef DCL_DEBUG
- if (DP->flags & FD_DEBUG){
- DPRINT("clearing NEWCHANGE flag because of effective seek\n");
- DPRINT("jiffies=%lu\n", jiffies);
- }
-#endif
- CLEARF(FD_DISK_NEWCHANGE); /* effective seek */
- CLEARF(FD_DISK_CHANGED); /* effective seek */
- DRS->select_date = jiffies;
- }
- DRS->track = ST1;
- floppy_ready();
-}
-
-static void check_wp(void)
-{
- if (TESTF(FD_VERIFY)) {
- /* check write protection */
- output_byte(FD_GETSTATUS);
- output_byte(UNIT(current_drive));
- if (result() != 1){
- FDCS->reset = 1;
- return;
- }
- CLEARF(FD_VERIFY);
- CLEARF(FD_NEED_TWADDLE);
-#ifdef DCL_DEBUG
- if (DP->flags & FD_DEBUG){
- DPRINT("checking whether disk is write protected\n");
- DPRINT("wp=%x\n",ST3 & 0x40);
- }
-#endif
- if (!(ST3 & 0x40))
- SETF(FD_DISK_WRITABLE);
- else
- CLEARF(FD_DISK_WRITABLE);
- }
-}
-
-static void seek_floppy(void)
-{
- int track;
-
- blind_seek=0;
-
-#ifdef DCL_DEBUG
- if (DP->flags & FD_DEBUG){
- DPRINT("calling disk change from seek\n");
- }
-#endif
-
- if (!TESTF(FD_DISK_NEWCHANGE) &&
- disk_change(current_drive) &&
- (raw_cmd->flags & FD_RAW_NEED_DISK)){
- /* the media changed flag should be cleared after the seek.
- * If it isn't, this means that there is really no disk in
- * the drive.
- */
- SETF(FD_DISK_CHANGED);
- cont->done(0);
- cont->redo();
- return;
- }
- if (DRS->track <= NEED_1_RECAL){
- recalibrate_floppy();
- return;
- } else if (TESTF(FD_DISK_NEWCHANGE) &&
- (raw_cmd->flags & FD_RAW_NEED_DISK) &&
- (DRS->track <= NO_TRACK || DRS->track == raw_cmd->track)) {
- /* we seek to clear the media-changed condition. Does anybody
- * know a more elegant way, which works on all drives? */
- if (raw_cmd->track)
- track = raw_cmd->track - 1;
- else {
- if (DP->flags & FD_SILENT_DCL_CLEAR){
- blind_seek = 1;
- raw_cmd->flags |= FD_RAW_NEED_SEEK;
- }
- track = 1;
- }
- } else {
- check_wp();
- if (raw_cmd->track != DRS->track &&
- (raw_cmd->flags & FD_RAW_NEED_SEEK))
- track = raw_cmd->track;
- else {
- setup_rw_floppy();
- return;
- }
- }
-
- do_floppy = seek_interrupt;
- output_byte(FD_SEEK);
- output_byte(UNIT(current_drive));
- LAST_OUT(track);
-#ifdef DEBUGT
- debugt("seek command:");
-#endif
-}
-
-static void recal_interrupt(void)
-{
-#ifdef DEBUGT
- debugt("recal interrupt:");
-#endif
- if (inr !=2)
- FDCS->reset = 1;
- else if (ST0 & ST0_ECE) {
- switch(DRS->track){
- case NEED_1_RECAL:
-#ifdef DEBUGT
- debugt("recal interrupt need 1 recal:");
-#endif
- /* after a second recalibrate, we still haven't
- * reached track 0. Probably no drive. Raise an
- * error, as failing immediately might upset
- * computers possessed by the Devil :-) */
- cont->error();
- cont->redo();
- return;
- case NEED_2_RECAL:
-#ifdef DEBUGT
- debugt("recal interrupt need 2 recal:");
-#endif
- /* If we already did a recalibrate,
- * and we are not at track 0, this
- * means we have moved. (The only way
- * not to move at recalibration is to
- * be already at track 0.) Clear the
- * new change flag */
-#ifdef DCL_DEBUG
- if (DP->flags & FD_DEBUG){
- DPRINT("clearing NEWCHANGE flag because of second recalibrate\n");
- }
-#endif
-
- CLEARF(FD_DISK_NEWCHANGE);
- DRS->select_date = jiffies;
- /* fall through */
- default:
-#ifdef DEBUGT
- debugt("recal interrupt default:");
-#endif
- /* Recalibrate moves the head by at
- * most 80 steps. If after one
- * recalibrate we don't have reached
- * track 0, this might mean that we
- * started beyond track 80. Try
- * again. */
- DRS->track = NEED_1_RECAL;
- break;
- }
- } else
- DRS->track = ST1;
- floppy_ready();
-}
-
-static void print_result(char *message, int inr)
-{
- int i;
-
- DPRINT("%s ", message);
- if (inr >= 0)
- for (i=0; i<inr; i++)
- printk("repl[%d]=%x ", i, reply_buffer[i]);
- printk("\n");
-}
-
-/* interrupt handler. Note that this can be called externally on the Sparc */
-irqreturn_t floppy_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-{
- void (*handler)(void) = do_floppy;
- int do_print;
- unsigned long f;
-
- lasthandler = handler;
- interruptjiffies = jiffies;
-
- f=claim_dma_lock();
- fd_disable_dma();
- release_dma_lock(f);
-
- floppy_enable_hlt();
- do_floppy = NULL;
- if (fdc >= N_FDC || FDCS->address == -1){
- /* we don't even know which FDC is the culprit */
- printk("DOR0=%x\n", fdc_state[0].dor);
- printk("floppy interrupt on bizarre fdc %d\n",fdc);
- printk("handler=%p\n", handler);
- is_alive("bizarre fdc");
- return IRQ_NONE;
- }
-
- FDCS->reset = 0;
- /* We have to clear the reset flag here, because apparently on boxes
- * with level triggered interrupts (PS/2, Sparc, ...), it is needed to
- * emit SENSEI's to clear the interrupt line. And FDCS->reset blocks the
- * emission of the SENSEI's.
- * It is OK to emit floppy commands because we are in an interrupt
- * handler here, and thus we have to fear no interference of other
- * activity.
- */
-
- do_print = !handler && print_unex && !initialising;
-
- inr = result();
- if (inr && do_print)
- print_result("unexpected interrupt", inr);
- if (inr == 0){
- do {
- output_byte(FD_SENSEI);
- inr = result();
- if ((ST0 & ST0_INTR) == 0xC0) {
- int drive = ST0 & ST0_DS;
-
- /* Attention Interrupt. */
- if (ST0 & ST0_NR) {
-#ifdef PC9800_DEBUG_FLOPPY
- if (do_print)
- printk(KERN_DEBUG
- "floppy debug: floppy ejected (drive %d)\n",
- drive);
-#endif
- USETF(FD_DISK_CHANGED);
- USETF(FD_VERIFY);
- } else {
-#ifdef PC9800_DEBUG_FLOPPY
- if (do_print)
- printk(KERN_DEBUG
- "floppy debug: floppy inserted (drive %d)\n",
- drive);
-#endif
- }
- } /* Attention Interrupt */
-#ifdef PC9800_DEBUG_FLOPPY
- else {
- printk(KERN_DEBUG
- "floppy debug : unknown interrupt\n");
- }
-#endif
- } while ((ST0 & 0x83) != UNIT(current_drive) && inr == 2);
- }
- if (handler) {
- schedule_bh(handler);
- } else {
-#if 0
- FDCS->reset = 1;
-#endif
- }
- is_alive("normal interrupt end");
-
- /* FIXME! Was it really for us? */
- return IRQ_HANDLED;
-}
-
-static void recalibrate_floppy(void)
-{
-#ifdef DEBUGT
- debugt("recalibrate floppy:");
-#endif
- do_floppy = recal_interrupt;
- output_byte(FD_RECALIBRATE);
- LAST_OUT(UNIT(current_drive));
-}
-
-/*
- * Must do 4 FD_SENSEIs after reset because of ``drive polling''.
- */
-static void reset_interrupt(void)
-{
-#ifdef PC9800_DEBUG_FLOPPY
- printk("floppy debug: reset interrupt\n");
-#endif
-#ifdef DEBUGT
- debugt("reset interrupt:");
-#endif
- result(); /* get the status ready for set_fdc */
- if (FDCS->reset) {
- printk("reset set in interrupt, calling %p\n", cont->error);
- cont->error(); /* a reset just after a reset. BAD! */
- }
- cont->redo();
-}
-
-/*
- * reset is done by pulling bit 2 of DOR low for a while (old FDCs),
- * or by setting the self clearing bit 7 of STATUS (newer FDCs)
- */
-static void reset_fdc(void)
-{
- unsigned long flags;
-
-#ifdef PC9800_DEBUG_FLOPPY
- printk("floppy debug: reset_fdc\n");
-#endif
-
- do_floppy = reset_interrupt;
- FDCS->reset = 0;
- reset_fdc_info(0);
-
- /* Pseudo-DMA may intercept 'reset finished' interrupt. */
- /* Irrelevant for systems with true DMA (i386). */
-
- flags=claim_dma_lock();
- fd_disable_dma();
- release_dma_lock(flags);
-
- fd_outb(FDCS->dor | 0x80, FD_MODE);
- udelay(FD_RESET_DELAY);
- fd_outb(FDCS->dor, FD_MODE);
- udelay(FD_AFTER_RESET_DELAY);
-}
-
-static void show_floppy(void)
-{
- int i;
-
- printk("\n");
- printk("floppy driver state\n");
- printk("-------------------\n");
- printk("now=%lu last interrupt=%lu diff=%lu last called handler=%p\n",
- jiffies, interruptjiffies, jiffies-interruptjiffies, lasthandler);
-
-
-#ifdef FLOPPY_SANITY_CHECK
- printk("timeout_message=%s\n", timeout_message);
- printk("last output bytes:\n");
- for (i=0; i < OLOGSIZE; i++)
- printk("%2x %2x %lu\n",
- output_log[(i+output_log_pos) % OLOGSIZE].data,
- output_log[(i+output_log_pos) % OLOGSIZE].status,
- output_log[(i+output_log_pos) % OLOGSIZE].jiffies);
- printk("last result at %lu\n", resultjiffies);
- printk("last redo_fd_request at %lu\n", lastredo);
- for (i=0; i<resultsize; i++){
- printk("%2x ", reply_buffer[i]);
- }
- printk("\n");
-#endif
-
- printk("status=%x\n", fd_inb(FD98_STATUS));
- printk("fdc_busy=%lu\n", fdc_busy);
- if (do_floppy)
- printk("do_floppy=%p\n", do_floppy);
- if (floppy_work.pending)
- printk("floppy_work.func=%p\n", floppy_work.func);
- if (timer_pending(&fd_timer))
- printk("fd_timer.function=%p\n", fd_timer.function);
- if (timer_pending(&fd_timeout)){
- printk("timer_function=%p\n",fd_timeout.function);
- printk("expires=%lu\n",fd_timeout.expires-jiffies);
- printk("now=%lu\n",jiffies);
- }
- printk("cont=%p\n", cont);
- printk("current_req=%p\n", current_req);
- printk("command_status=%d\n", command_status);
- printk("\n");
-}
-
-static void floppy_shutdown(unsigned long data)
-{
- unsigned long flags;
-
- if (!initialising)
- show_floppy();
- cancel_activity();
-
- floppy_enable_hlt();
-
- flags=claim_dma_lock();
- fd_disable_dma();
- release_dma_lock(flags);
-
- /* avoid dma going to a random drive after shutdown */
-
- if (!initialising)
- DPRINT("floppy timeout called\n");
- FDCS->reset = 1;
- if (cont){
- cont->done(0);
- cont->redo(); /* this will recall reset when needed */
- } else {
- printk("no cont in shutdown!\n");
- process_fd_request();
- }
- is_alive("floppy shutdown");
-}
-/*typedef void (*timeout_fn)(unsigned long);*/
-
-static void access_mode_change_pc9800(void)
-{
- static int access_mode, mode_change_now, old_mode, new_set = 1;
-#ifdef PC9800_DEBUG_FLOPPY2
- printk("enter access_mode_change\n");
-#endif
- access_mode = mode_change_now = 0;
- if (DP->cmos==4) {
- switch ((int)(_floppy - &floppy_type[0])) {
- case 1:
- case 2:
- new_set = 1;
- access_mode = 2;
- break;
-
- case 4:
- case 6:
- new_set = 1;
- access_mode = 3;
- break;
-
- case 7:
- case 10:
- new_set = 1;
- access_mode = 1;
- break;
-
- default:
- access_mode = 1;
- break;
- }
-
- old_mode = fd_inb(FD_MODE_CHANGE) & 3;
-
- switch (access_mode) {
- case 1:
- if ((old_mode & 2) == 0) {
- fd_outb(old_mode | 2, FD_MODE_CHANGE);
- mode_change_now = 1;
- } else {
- fd_outb(current_drive << 5, FD_EMODE_CHANGE);
- if (fd_inb(FD_EMODE_CHANGE) == 0xff)
- return;
- }
-
- fd_outb((current_drive << 5) | 0x11, FD_EMODE_CHANGE);
- mode_change_now = 1;
- break;
-
- case 2:
- if ((old_mode & 2) == 0) {
- fd_outb(old_mode | 2, FD_MODE_CHANGE);
- mode_change_now = 1;
- } else {
- fd_outb(current_drive << 5, FD_EMODE_CHANGE);
- if ((fd_inb(FD_EMODE_CHANGE) & 1) == 0)
- return;
- fd_outb((current_drive << 5) | 0x10, FD_EMODE_CHANGE);
- mode_change_now = 1;
- }
-
- break;
-
- case 3:
- if ((old_mode & 2) == 0)
- return;
- fd_outb(current_drive << 5, FD_EMODE_CHANGE);
- if (fd_inb(FD_EMODE_CHANGE) & 1)
- fd_outb((current_drive << 5) | 0x10, FD_EMODE_CHANGE);
- fd_outb(old_mode & 0xfd, FD_MODE_CHANGE);
- mode_change_now = 1;
- break;
-
- default:
- break;
- }
- } else {
- switch ((int)(_floppy - &floppy_type[0])) {
- case 1:
- case 2:
- new_set = 1;
- access_mode = 2;
- break;
-
- case 4:
- case 6:
- new_set = 1;
- access_mode = 3;
- break;
-
- default:
- switch (DP->cmos) {
- case 2:
- access_mode = 2;
- break;
-
- case 3:
- access_mode = 3;
- break;
-
- default:
- break;
- }
-
- break;
- }
-
- old_mode = fd_inb(FD_MODE_CHANGE) & 3;
-
- switch (access_mode) {
- case 2:
- if ((old_mode & 2) == 0) {
- fd_outb(old_mode | 2, FD_MODE_CHANGE);
- mode_change_now = 1;
- }
-
- break;
-
- case 3:
- if (old_mode & 2) {
- fd_outb(old_mode & 0xfd, FD_MODE_CHANGE);
- mode_change_now = 1;
- }
-
- break;
-
- default:
- break;
- }
- }
-#ifdef PC9800_DEBUG_FLOPPY2
- printk("floppy debug: DP->cmos=%d\n", DP->cmos);
- printk("floppy debug: mode_change_now=%d\n", mode_change_now);
- printk("floppy debug: access_mode=%d\n", access_mode);
- printk("floppy debug: old_mode=%d\n", old_mode);
- printk("floppy debug: _floppy - &floppy_type[0]=%d\n", (int)(_floppy - &floppy_type[0]));
-#endif /* PC9800_DEBUG_FLOPPY2 */
- if(mode_change_now)
- reset_fdc();
-}
-
-/* start motor, check media-changed condition and write protection */
-static int start_motor(void (*function)(void) )
-{
- access_mode_change_pc9800();
- set_mode(~0, 0x8);
-
- /* wait_for_completion also schedules reset if needed. */
- return(fd_wait_for_completion(DRS->select_date+DP->select_delay,
- (timeout_fn) function));
-}
-
-static void floppy_ready(void)
-{
- CHECK_RESET;
- if (start_motor(floppy_ready)) return;
-
-#ifdef DCL_DEBUG
- if (DP->flags & FD_DEBUG){
- DPRINT("calling disk change from floppy_ready\n");
- }
-#endif
- if (!(raw_cmd->flags & FD_RAW_NO_MOTOR) &&
- disk_change(current_drive) &&
- !DP->select_delay)
- twaddle(); /* this clears the dcl on certain drive/controller
- * combinations */
-
-#ifdef fd_chose_dma_mode
- if ((raw_cmd->flags & FD_RAW_READ) ||
- (raw_cmd->flags & FD_RAW_WRITE))
- {
- unsigned long flags = claim_dma_lock();
- fd_chose_dma_mode(raw_cmd->kernel_data,
- raw_cmd->length);
- release_dma_lock(flags);
- }
-#endif
-
-#if 0
- access_mode_change_pc9800();
-#endif
- if (raw_cmd->flags & (FD_RAW_NEED_SEEK | FD_RAW_NEED_DISK)){
- fdc_specify(); /* must be done here because of hut, hlt ... */
- seek_floppy();
- } else {
- if ((raw_cmd->flags & FD_RAW_READ) ||
- (raw_cmd->flags & FD_RAW_WRITE))
- fdc_specify();
- setup_rw_floppy();
- }
-}
-
-static void floppy_start(void)
-{
- reschedule_timeout(current_reqD, "floppy start", 0);
-
- scandrives();
-#ifdef DCL_DEBUG
- if (DP->flags & FD_DEBUG){
- DPRINT("setting NEWCHANGE in floppy_start\n");
- }
-#endif
- SETF(FD_DISK_NEWCHANGE);
- floppy_ready();
-}
-
-/*
- * ========================================================================
- * here ends the bottom half. Exported routines are:
- * floppy_start, floppy_off, floppy_ready, lock_fdc, unlock_fdc, set_fdc,
- * start_motor, reset_fdc, reset_fdc_info, interpret_errors.
- * Initialization also uses output_byte, result, set_dor, floppy_interrupt
- * and set_dor.
- * ========================================================================
- */
-/*
- * General purpose continuations.
- * ==============================
- */
-
-static void do_wakeup(void)
-{
- reschedule_timeout(MAXTIMEOUT, "do wakeup", 0);
- cont = 0;
- command_status += 2;
- wake_up(&command_done);
-}
-
-static struct cont_t wakeup_cont={
- empty,
- do_wakeup,
- empty,
- (done_f)empty
-};
-
-
-static struct cont_t intr_cont={
- empty,
- process_fd_request,
- empty,
- (done_f) empty
-};
-
-static int wait_til_done(void (*handler)(void), int interruptible)
-{
- int ret;
-
- schedule_bh((void *)(void *)handler);
-
- if (command_status < 2 && NO_SIGNAL) {
- DECLARE_WAITQUEUE(wait, current);
-
- add_wait_queue(&command_done, &wait);
- for (;;) {
- set_current_state(interruptible?
- TASK_INTERRUPTIBLE:
- TASK_UNINTERRUPTIBLE);
-
- if (command_status >= 2 || !NO_SIGNAL)
- break;
-
- is_alive("wait_til_done");
-
- schedule();
- }
-
- set_current_state(TASK_RUNNING);
- remove_wait_queue(&command_done, &wait);
- }
-
- if (command_status < 2){
- cancel_activity();
- cont = &intr_cont;
- reset_fdc();
- return -EINTR;
- }
-
-#ifdef PC9800_DEBUG_FLOPPY
- if (command_status != FD_COMMAND_OKAY)
- printk("floppy check: wait_til_done out:%d\n", command_status);
-#endif
- if (FDCS->reset)
- command_status = FD_COMMAND_ERROR;
- if (command_status == FD_COMMAND_OKAY)
- ret=0;
- else
- ret=-EIO;
- command_status = FD_COMMAND_NONE;
- return ret;
-}
-
-static void generic_done(int result)
-{
- command_status = result;
- cont = &wakeup_cont;
-}
-
-static void generic_success(void)
-{
- cont->done(1);
-}
-
-static void generic_failure(void)
-{
- cont->done(0);
-}
-
-static void success_and_wakeup(void)
-{
- generic_success();
- cont->redo();
-}
-
-
-/*
- * formatting and rw support.
- * ==========================
- */
-
-static int next_valid_format(void)
-{
- int probed_format;
-
- probed_format = DRS->probed_format;
- while(1){
- if (probed_format >= 8 ||
- !DP->autodetect[probed_format]){
- DRS->probed_format = 0;
- return 1;
- }
- if (floppy_type[DP->autodetect[probed_format]].sect){
- DRS->probed_format = probed_format;
- return 0;
- }
- probed_format++;
- }
-}
-
-static void bad_flp_intr(void)
-{
- if (probing){
- DRS->probed_format++;
- if (!next_valid_format())
- return;
- }
- (*errors)++;
- INFBOUND(DRWE->badness, *errors);
- if (*errors > DP->max_errors.abort)
- cont->done(0);
- if (*errors > DP->max_errors.reset)
- FDCS->reset = 1;
- else if (*errors > DP->max_errors.recal)
- DRS->track = NEED_2_RECAL;
-}
-
-static void set_floppy(int drive)
-{
- int type = ITYPE(UDRS->fd_device);
- if (type) {
- auto_detect_mode = 0;
- _floppy = floppy_type + type;
- } else if (auto_detect_mode == 0) {
- auto_detect_mode = 1;
- retry_auto_detect = 0;
- _floppy = current_type[drive];
- }
-#ifdef PC9800_DEBUG_FLOPPY2
- printk("set_floppy: set floppy type=%d\n", (int)(_floppy - floppy_type));
-#endif
-}
-
-/*
- * formatting support.
- * ===================
- */
-static void format_interrupt(void)
-{
- switch (interpret_errors()){
- case 1:
- cont->error();
- case 2:
- break;
- case 0:
- cont->done(1);
- }
- cont->redo();
-}
-
-#define CODE2SIZE (ssize = ((1 << SIZECODE) + 3) >> 2)
-#define FM_MODE(x,y) ((y) & ~(((x)->rate & 0x80) >>1))
-#define CT(x) ((x) | 0xc0)
-static void setup_format_params(int track)
-{
- struct fparm {
- unsigned char track,head,sect,size;
- } *here = (struct fparm *)floppy_track_buffer;
- int il,n;
- int count,head_shift,track_shift;
-
- raw_cmd = &default_raw_cmd;
- raw_cmd->track = track;
-
- raw_cmd->flags = FD_RAW_WRITE | FD_RAW_INTR | FD_RAW_SPIN |
- FD_RAW_NEED_DISK | FD_RAW_NEED_SEEK;
- raw_cmd->rate = _floppy->rate & 0x43;
- raw_cmd->cmd_count = NR_F;
- COMMAND = FM_MODE(_floppy,FD_FORMAT);
- DR_SELECT = UNIT(current_drive) + PH_HEAD(_floppy,format_req.head);
- F_SIZECODE = FD_SIZECODE(_floppy);
- F_SECT_PER_TRACK = _floppy->sect << 2 >> F_SIZECODE;
- F_GAP = _floppy->fmt_gap;
- F_FILL = FD_FILL_BYTE;
-
- raw_cmd->kernel_data = floppy_track_buffer;
- raw_cmd->length = 4 * F_SECT_PER_TRACK;
-
- /* allow for about 30ms for data transport per track */
- head_shift = (F_SECT_PER_TRACK + 5) / 6;
-
- /* a ``cylinder'' is two tracks plus a little stepping time */
- track_shift = 2 * head_shift + 3;
-
- /* position of logical sector 1 on this track */
- n = (track_shift * format_req.track + head_shift * format_req.head)
- % F_SECT_PER_TRACK;
-
- /* determine interleave */
- il = 1;
- if (_floppy->fmt_gap < 0x22)
- il++;
-
- /* initialize field */
- for (count = 0; count < F_SECT_PER_TRACK; ++count) {
- here[count].track = format_req.track;
- here[count].head = format_req.head;
- here[count].sect = 0;
- here[count].size = F_SIZECODE;
- }
- /* place logical sectors */
- for (count = 1; count <= F_SECT_PER_TRACK; ++count) {
- here[n].sect = count;
- n = (n+il) % F_SECT_PER_TRACK;
- if (here[n].sect) { /* sector busy, find next free sector */
- ++n;
- if (n>= F_SECT_PER_TRACK) {
- n-=F_SECT_PER_TRACK;
- while (here[n].sect) ++n;
- }
- }
- }
-}
-
-static void redo_format(void)
-{
- buffer_track = -1;
- setup_format_params(format_req.track << STRETCH(_floppy));
- floppy_start();
-#ifdef DEBUGT
- debugt("queue format request");
-#endif
-}
-
-static struct cont_t format_cont={
- format_interrupt,
- redo_format,
- bad_flp_intr,
- generic_done };
-
-static int do_format(int drive, struct format_descr *tmp_format_req)
-{
- int ret;
-
- LOCK_FDC(drive,1);
- set_floppy(drive);
- if (!_floppy ||
- _floppy->track > DP->tracks ||
- tmp_format_req->track >= _floppy->track ||
- tmp_format_req->head >= _floppy->head ||
- (_floppy->sect << 2) % (1 << FD_SIZECODE(_floppy)) ||
- !_floppy->fmt_gap) {
- process_fd_request();
- return -EINVAL;
- }
- format_req = *tmp_format_req;
- format_errors = 0;
- cont = &format_cont;
- errors = &format_errors;
- IWAIT(redo_format);
- process_fd_request();
- return ret;
-}
-
-/*
- * Buffer read/write and support
- * =============================
- */
-
-static void floppy_end_request(struct request *req, int uptodate)
-{
- if (end_that_request_first(req, uptodate, current_count_sectors))
- return;
- add_disk_randomness(req->rq_disk);
- floppy_off((long)req->rq_disk->private_data);
- blkdev_dequeue_request(req);
- end_that_request_last(req);
-
- /* We're done with the request */
- current_req = NULL;
-}
-
-
-/* new request_done. Can handle physical sectors which are smaller than a
- * logical buffer */
-static void request_done(int uptodate)
-{
- struct request_queue *q = floppy_queue;
- struct request *req = current_req;
- unsigned long flags;
- int block;
-
- probing = 0;
- reschedule_timeout(MAXTIMEOUT, "request done %d", uptodate);
-
- if (!req) {
- printk("floppy.c: no request in request_done\n");
- return;
- }
-
- if (uptodate){
- /* maintain values for invalidation on geometry
- * change */
- block = current_count_sectors + req->sector;
- INFBOUND(DRS->maxblock, block);
- if (block > _floppy->sect)
- DRS->maxtrack = 1;
-
- /* unlock chained buffers */
- spin_lock_irqsave(q->queue_lock, flags);
- floppy_end_request(req, 1);
- spin_unlock_irqrestore(q->queue_lock, flags);
- } else {
- if (rq_data_dir(req) == WRITE) {
- /* record write error information */
- DRWE->write_errors++;
- if (DRWE->write_errors == 1) {
- DRWE->first_error_sector = req->sector;
- DRWE->first_error_generation = DRS->generation;
- }
- DRWE->last_error_sector = req->sector;
- DRWE->last_error_generation = DRS->generation;
- }
- spin_lock_irqsave(q->queue_lock, flags);
- floppy_end_request(req, 0);
- spin_unlock_irqrestore(q->queue_lock, flags);
- }
-}
-
-/* Interrupt handler evaluating the result of the r/w operation */
-static void rw_interrupt(void)
-{
- int nr_sectors, ssize, eoc, heads;
-
- if (R_HEAD >= 2) {
- /* some Toshiba floppy controllers occasionnally seem to
- * return bogus interrupts after read/write operations, which
- * can be recognized by a bad head number (>= 2) */
- return;
- }
-
- if (!DRS->first_read_date)
- DRS->first_read_date = jiffies;
-
- nr_sectors = 0;
- CODE2SIZE;
-
- if (ST1 & ST1_EOC)
- eoc = 1;
- else
- eoc = 0;
-
- if (COMMAND & 0x80)
- heads = 2;
- else
- heads = 1;
-
- nr_sectors = (((R_TRACK-TRACK) * heads +
- R_HEAD-HEAD) * SECT_PER_TRACK +
- R_SECTOR-SECTOR + eoc) << SIZECODE >> 2;
-
-#ifdef FLOPPY_SANITY_CHECK
- if (nr_sectors / ssize >
- (in_sector_offset + current_count_sectors + ssize - 1) / ssize) {
- DPRINT("long rw: %x instead of %lx\n",
- nr_sectors, current_count_sectors);
- printk("rs=%d s=%d\n", R_SECTOR, SECTOR);
- printk("rh=%d h=%d\n", R_HEAD, HEAD);
- printk("rt=%d t=%d\n", R_TRACK, TRACK);
- printk("heads=%d eoc=%d\n", heads, eoc);
- printk("spt=%d st=%d ss=%d\n", SECT_PER_TRACK,
- fsector_t, ssize);
- printk("in_sector_offset=%d\n", in_sector_offset);
- }
-#endif
-
- nr_sectors -= in_sector_offset;
- INFBOUND(nr_sectors,0);
- SUPBOUND(current_count_sectors, nr_sectors);
-
- switch (interpret_errors()){
- case 2:
- cont->redo();
- return;
- case 1:
- if (!current_count_sectors){
- cont->error();
- cont->redo();
- return;
- }
- break;
- case 0:
- if (!current_count_sectors){
- cont->redo();
- return;
- }
- current_type[current_drive] = _floppy;
- floppy_sizes[TOMINOR(current_drive) ]= _floppy->size;
- break;
- }
-
- if (probing) {
- if (DP->flags & FTD_MSG)
- DPRINT("Auto-detected floppy type %s in fd%d\n",
- _floppy->name,current_drive);
- current_type[current_drive] = _floppy;
- floppy_sizes[TOMINOR(current_drive)] = _floppy->size;
- probing = 0;
- }
-
- if (CT(COMMAND) != FD_READ ||
- raw_cmd->kernel_data == current_req->buffer){
- /* transfer directly from buffer */
- cont->done(1);
- } else if (CT(COMMAND) == FD_READ){
- buffer_track = raw_cmd->track;
- buffer_drive = current_drive;
- INFBOUND(buffer_max, nr_sectors + fsector_t);
- }
- cont->redo();
-}
-
-/* Compute maximal contiguous buffer size. */
-static int buffer_chain_size(void)
-{
- struct bio *bio;
- struct bio_vec *bv;
- int size, i;
- char *base;
-
- base = bio_data(current_req->bio);
- size = 0;
-
- rq_for_each_bio(bio, current_req) {
- bio_for_each_segment(bv, bio, i) {
- if (page_address(bv->bv_page) + bv->bv_offset != base + size)
- break;
-
- size += bv->bv_len;
- }
- }
-
- return size >> 9;
-}
-
-/* Compute the maximal transfer size */
-static int transfer_size(int ssize, int max_sector, int max_size)
-{
- SUPBOUND(max_sector, fsector_t + max_size);
-
- /* alignment */
- max_sector -= (max_sector % _floppy->sect) % ssize;
-
- /* transfer size, beginning not aligned */
- current_count_sectors = max_sector - fsector_t ;
-
- return max_sector;
-}
-
-/*
- * Move data from/to the track buffer to/from the buffer cache.
- */
-static void copy_buffer(int ssize, int max_sector, int max_sector_2)
-{
- int remaining; /* number of transferred 512-byte sectors */
- struct bio_vec *bv;
- struct bio *bio;
- char *buffer, *dma_buffer;
- int size, i;
-
- max_sector = transfer_size(ssize,
- minimum(max_sector, max_sector_2),
- current_req->nr_sectors);
-
- if (current_count_sectors <= 0 && CT(COMMAND) == FD_WRITE &&
- buffer_max > fsector_t + current_req->nr_sectors)
- current_count_sectors = minimum(buffer_max - fsector_t,
- current_req->nr_sectors);
-
- remaining = current_count_sectors << 9;
-#ifdef FLOPPY_SANITY_CHECK
- if ((remaining >> 9) > current_req->nr_sectors &&
- CT(COMMAND) == FD_WRITE){
- DPRINT("in copy buffer\n");
- printk("current_count_sectors=%ld\n", current_count_sectors);
- printk("remaining=%d\n", remaining >> 9);
- printk("current_req->nr_sectors=%ld\n",current_req->nr_sectors);
- printk("current_req->current_nr_sectors=%u\n",
- current_req->current_nr_sectors);
- printk("max_sector=%d\n", max_sector);
- printk("ssize=%d\n", ssize);
- }
-#endif
-
- buffer_max = maximum(max_sector, buffer_max);
-
- dma_buffer = floppy_track_buffer + ((fsector_t - buffer_min) << 9);
-
- size = current_req->current_nr_sectors << 9;
-
- rq_for_each_bio(bio, current_req) {
- bio_for_each_segment(bv, bio, i) {
- if (!remaining)
- break;
-
- size = bv->bv_len;
- SUPBOUND(size, remaining);
-
- buffer = page_address(bv->bv_page) + bv->bv_offset;
-#ifdef FLOPPY_SANITY_CHECK
- if (dma_buffer + size >
- floppy_track_buffer + (max_buffer_sectors << 10) ||
- dma_buffer < floppy_track_buffer){
- DPRINT("buffer overrun in copy buffer %d\n",
- (int) ((floppy_track_buffer - dma_buffer) >>9));
- printk("fsector_t=%d buffer_min=%d\n",
- fsector_t, buffer_min);
- printk("current_count_sectors=%ld\n",
- current_count_sectors);
- if (CT(COMMAND) == FD_READ)
- printk("read\n");
- if (CT(COMMAND) == FD_WRITE)
- printk("write\n");
- break;
- }
- if (((unsigned long)buffer) % 512)
- DPRINT("%p buffer not aligned\n", buffer);
-#endif
- if (CT(COMMAND) == FD_READ)
- memcpy(buffer, dma_buffer, size);
- else
- memcpy(dma_buffer, buffer, size);
-
- remaining -= size;
- dma_buffer += size;
- }
- }
-#ifdef FLOPPY_SANITY_CHECK
- if (remaining){
- if (remaining > 0)
- max_sector -= remaining >> 9;
- DPRINT("weirdness: remaining %d\n", remaining>>9);
- }
-#endif
-}
-
-#if 0
-static inline int check_dma_crossing(char *start,
- unsigned long length, char *message)
-{
- if (CROSS_64KB(start, length)) {
- printk("DMA xfer crosses 64KB boundary in %s %p-%p\n",
- message, start, start+length);
- return 1;
- } else
- return 0;
-}
-#endif
-
-/* work around a bug in pseudo DMA
- * (on some FDCs) pseudo DMA does not stop when the CPU stops
- * sending data. Hence we need a different way to signal the
- * transfer length: We use SECT_PER_TRACK. Unfortunately, this
- * does not work with MT, hence we can only transfer one head at
- * a time
- */
-static void virtualdmabug_workaround(void)
-{
- int hard_sectors, end_sector;
-
- if(CT(COMMAND) == FD_WRITE) {
- COMMAND &= ~0x80; /* switch off multiple track mode */
-
- hard_sectors = raw_cmd->length >> (7 + SIZECODE);
- end_sector = SECTOR + hard_sectors - 1;
-#ifdef FLOPPY_SANITY_CHECK
- if(end_sector > SECT_PER_TRACK) {
- printk("too many sectors %d > %d\n",
- end_sector, SECT_PER_TRACK);
- return;
- }
-#endif
- SECT_PER_TRACK = end_sector; /* make sure SECT_PER_TRACK points
- * to end of transfer */
- }
-}
-
-/*
- * Formulate a read/write request.
- * this routine decides where to load the data (directly to buffer, or to
- * tmp floppy area), how much data to load (the size of the buffer, the whole
- * track, or a single sector)
- * All floppy_track_buffer handling goes in here. If we ever add track buffer
- * allocation on the fly, it should be done here. No other part should need
- * modification.
- */
-
-static int make_raw_rw_request(void)
-{
- int aligned_sector_t;
- int max_sector, max_size, tracksize, ssize;
-
- if(max_buffer_sectors == 0) {
- printk("VFS: Block I/O scheduled on unopened device\n");
- return 0;
- }
-
- set_fdc((long)current_req->rq_disk->private_data);
-
- raw_cmd = &default_raw_cmd;
- raw_cmd->flags = FD_RAW_SPIN | FD_RAW_NEED_DISK | FD_RAW_NEED_DISK |
- FD_RAW_NEED_SEEK;
- raw_cmd->cmd_count = NR_RW;
- if (rq_data_dir(current_req) == READ) {
- raw_cmd->flags |= FD_RAW_READ;
- COMMAND = FM_MODE(_floppy,FD_READ);
- } else if (rq_data_dir(current_req) == WRITE){
- raw_cmd->flags |= FD_RAW_WRITE;
- COMMAND = FM_MODE(_floppy,FD_WRITE);
- } else {
- DPRINT("make_raw_rw_request: unknown command\n");
- return 0;
- }
-
- max_sector = _floppy->sect * _floppy->head;
-
- TRACK = (int)current_req->sector / max_sector;
- fsector_t = (int)current_req->sector % max_sector;
- if (_floppy->track && TRACK >= _floppy->track) {
- if (current_req->current_nr_sectors & 1) {
- current_count_sectors = 1;
- return 1;
- } else
- return 0;
- }
- HEAD = fsector_t / _floppy->sect;
-
- if (((_floppy->stretch & FD_SWAPSIDES) || TESTF(FD_NEED_TWADDLE)) &&
- fsector_t < _floppy->sect)
- max_sector = _floppy->sect;
-
- /* 2M disks have phantom sectors on the first track */
- if ((_floppy->rate & FD_2M) && (!TRACK) && (!HEAD)){
- max_sector = 2 * _floppy->sect / 3;
- if (fsector_t >= max_sector){
- current_count_sectors = minimum(_floppy->sect - fsector_t,
- current_req->nr_sectors);
- return 1;
- }
- SIZECODE = 2;
- } else
- SIZECODE = FD_SIZECODE(_floppy);
- raw_cmd->rate = _floppy->rate & 0x43;
- if ((_floppy->rate & FD_2M) &&
- (TRACK || HEAD) &&
- raw_cmd->rate == 2)
- raw_cmd->rate = 1;
-
- if (SIZECODE)
- SIZECODE2 = 0xff;
- else
- SIZECODE2 = 0x80;
- raw_cmd->track = TRACK << STRETCH(_floppy);
- DR_SELECT = UNIT(current_drive) + PH_HEAD(_floppy,HEAD);
- GAP = _floppy->gap;
- CODE2SIZE;
- SECT_PER_TRACK = _floppy->sect << 2 >> SIZECODE;
- SECTOR = ((fsector_t % _floppy->sect) << 2 >> SIZECODE) + 1;
-
- /* tracksize describes the size which can be filled up with sectors
- * of size ssize.
- */
- tracksize = _floppy->sect - _floppy->sect % ssize;
- if (tracksize < _floppy->sect){
- SECT_PER_TRACK ++;
- if (tracksize <= fsector_t % _floppy->sect)
- SECTOR--;
-
- /* if we are beyond tracksize, fill up using smaller sectors */
- while (tracksize <= fsector_t % _floppy->sect){
- while(tracksize + ssize > _floppy->sect){
- SIZECODE--;
- ssize >>= 1;
- }
- SECTOR++; SECT_PER_TRACK ++;
- tracksize += ssize;
- }
- max_sector = HEAD * _floppy->sect + tracksize;
- } else if (!TRACK && !HEAD && !(_floppy->rate & FD_2M) && probing) {
- max_sector = _floppy->sect;
- } else if (!HEAD && CT(COMMAND) == FD_WRITE) {
- /* for virtual DMA bug workaround */
- max_sector = _floppy->sect;
- }
-
- in_sector_offset = (fsector_t % _floppy->sect) % ssize;
- aligned_sector_t = fsector_t - in_sector_offset;
- max_size = current_req->nr_sectors;
- if ((raw_cmd->track == buffer_track) &&
- (current_drive == buffer_drive) &&
- (fsector_t >= buffer_min) && (fsector_t < buffer_max)) {
- /* data already in track buffer */
- if (CT(COMMAND) == FD_READ) {
- copy_buffer(1, max_sector, buffer_max);
- return 1;
- }
- } else if (in_sector_offset || current_req->nr_sectors < ssize){
- if (CT(COMMAND) == FD_WRITE){
- if (fsector_t + current_req->nr_sectors > ssize &&
- fsector_t + current_req->nr_sectors < ssize + ssize)
- max_size = ssize + ssize;
- else
- max_size = ssize;
- }
- raw_cmd->flags &= ~FD_RAW_WRITE;
- raw_cmd->flags |= FD_RAW_READ;
- COMMAND = FM_MODE(_floppy,FD_READ);
- } else if ((unsigned long)current_req->buffer < MAX_DMA_ADDRESS) {
- unsigned long dma_limit;
- int direct, indirect;
-
- indirect= transfer_size(ssize,max_sector,max_buffer_sectors*2) -
- fsector_t;
-
- /*
- * Do NOT use minimum() here---MAX_DMA_ADDRESS is 64 bits wide
- * on a 64 bit machine!
- */
- max_size = buffer_chain_size();
- dma_limit = (MAX_DMA_ADDRESS - ((unsigned long) current_req->buffer)) >> 9;
- if ((unsigned long) max_size > dma_limit) {
- max_size = dma_limit;
- }
- /* 64 kb boundaries */
- if (CROSS_64KB(current_req->buffer, max_size << 9))
- max_size = (K_64 -
- ((unsigned long)current_req->buffer) % K_64)>>9;
- direct = transfer_size(ssize,max_sector,max_size) - fsector_t;
- /*
- * We try to read tracks, but if we get too many errors, we
- * go back to reading just one sector at a time.
- *
- * This means we should be able to read a sector even if there
- * are other bad sectors on this track.
- */
- if (!direct ||
- (indirect * 2 > direct * 3 &&
- *errors < DP->max_errors.read_track &&
- /*!TESTF(FD_NEED_TWADDLE) &&*/
- ((!probing || (DP->read_track&(1<<DRS->probed_format)))))){
- max_size = current_req->nr_sectors;
- } else {
- raw_cmd->kernel_data = current_req->buffer;
- raw_cmd->length = current_count_sectors << 9;
- if (raw_cmd->length == 0){
- DPRINT("zero dma transfer attempted from make_raw_request\n");
- DPRINT("indirect=%d direct=%d fsector_t=%d",
- indirect, direct, fsector_t);
- return 0;
- }
-/* check_dma_crossing(raw_cmd->kernel_data,
- raw_cmd->length,
- "end of make_raw_request [1]");*/
-
- virtualdmabug_workaround();
- return 2;
- }
- }
-
- if (CT(COMMAND) == FD_READ)
- max_size = max_sector; /* unbounded */
-
- /* claim buffer track if needed */
- if (buffer_track != raw_cmd->track || /* bad track */
- buffer_drive !=current_drive || /* bad drive */
- fsector_t > buffer_max ||
- fsector_t < buffer_min ||
- ((CT(COMMAND) == FD_READ ||
- (!in_sector_offset && current_req->nr_sectors >= ssize))&&
- max_sector > 2 * max_buffer_sectors + buffer_min &&
- max_size + fsector_t > 2 * max_buffer_sectors + buffer_min)
- /* not enough space */){
- buffer_track = -1;
- buffer_drive = current_drive;
- buffer_max = buffer_min = aligned_sector_t;
- }
- raw_cmd->kernel_data = floppy_track_buffer +
- ((aligned_sector_t-buffer_min)<<9);
-
- if (CT(COMMAND) == FD_WRITE){
- /* copy write buffer to track buffer.
- * if we get here, we know that the write
- * is either aligned or the data already in the buffer
- * (buffer will be overwritten) */
-#ifdef FLOPPY_SANITY_CHECK
- if (in_sector_offset && buffer_track == -1)
- DPRINT("internal error offset !=0 on write\n");
-#endif
- buffer_track = raw_cmd->track;
- buffer_drive = current_drive;
- copy_buffer(ssize, max_sector, 2*max_buffer_sectors+buffer_min);
- } else
- transfer_size(ssize, max_sector,
- 2*max_buffer_sectors+buffer_min-aligned_sector_t);
-
- /* round up current_count_sectors to get dma xfer size */
- raw_cmd->length = in_sector_offset+current_count_sectors;
- raw_cmd->length = ((raw_cmd->length -1)|(ssize-1))+1;
- raw_cmd->length <<= 9;
-#ifdef FLOPPY_SANITY_CHECK
- /*check_dma_crossing(raw_cmd->kernel_data, raw_cmd->length,
- "end of make_raw_request");*/
- if ((raw_cmd->length < current_count_sectors << 9) ||
- (raw_cmd->kernel_data != current_req->buffer &&
- CT(COMMAND) == FD_WRITE &&
- (aligned_sector_t + (raw_cmd->length >> 9) > buffer_max ||
- aligned_sector_t < buffer_min)) ||
- raw_cmd->length % (128 << SIZECODE) ||
- raw_cmd->length <= 0 || current_count_sectors <= 0){
- DPRINT("fractionary current count b=%lx s=%lx\n",
- raw_cmd->length, current_count_sectors);
- if (raw_cmd->kernel_data != current_req->buffer)
- printk("addr=%d, length=%ld\n",
- (int) ((raw_cmd->kernel_data -
- floppy_track_buffer) >> 9),
- current_count_sectors);
- printk("st=%d ast=%d mse=%d msi=%d\n",
- fsector_t, aligned_sector_t, max_sector, max_size);
- printk("ssize=%x SIZECODE=%d\n", ssize, SIZECODE);
- printk("command=%x SECTOR=%d HEAD=%d, TRACK=%d\n",
- COMMAND, SECTOR, HEAD, TRACK);
- printk("buffer drive=%d\n", buffer_drive);
- printk("buffer track=%d\n", buffer_track);
- printk("buffer_min=%d\n", buffer_min);
- printk("buffer_max=%d\n", buffer_max);
- return 0;
- }
-
- if (raw_cmd->kernel_data != current_req->buffer){
- if (raw_cmd->kernel_data < floppy_track_buffer ||
- current_count_sectors < 0 ||
- raw_cmd->length < 0 ||
- raw_cmd->kernel_data + raw_cmd->length >
- floppy_track_buffer + (max_buffer_sectors << 10)){
- DPRINT("buffer overrun in schedule dma\n");
- printk("fsector_t=%d buffer_min=%d current_count=%ld\n",
- fsector_t, buffer_min,
- raw_cmd->length >> 9);
- printk("current_count_sectors=%ld\n",
- current_count_sectors);
- if (CT(COMMAND) == FD_READ)
- printk("read\n");
- if (CT(COMMAND) == FD_WRITE)
- printk("write\n");
- return 0;
- }
- } else if (raw_cmd->length > current_req->nr_sectors << 9 ||
- current_count_sectors > current_req->nr_sectors){
- DPRINT("buffer overrun in direct transfer\n");
- return 0;
- } else if (raw_cmd->length < current_count_sectors << 9){
- DPRINT("more sectors than bytes\n");
- printk("bytes=%ld\n", raw_cmd->length >> 9);
- printk("sectors=%ld\n", current_count_sectors);
- }
- if (raw_cmd->length == 0){
- DPRINT("zero dma transfer attempted from make_raw_request\n");
- return 0;
- }
-#endif
-
- virtualdmabug_workaround();
- return 2;
-}
-
-static void redo_fd_request(void)
-{
-#define REPEAT {request_done(0); continue; }
- int drive;
- int tmp;
-
- lastredo = jiffies;
- if (current_drive < N_DRIVE)
- floppy_off(current_drive);
-
- for (;;) {
- if (!current_req) {
- struct request *req;
-
- spin_lock_irq(floppy_queue->queue_lock);
- req = elv_next_request(floppy_queue);
- spin_unlock_irq(floppy_queue->queue_lock);
- if (!req) {
- do_floppy = NULL;
- unlock_fdc();
- return;
- }
- current_req = req;
- }
- drive = (long)current_req->rq_disk->private_data;
- set_fdc(drive);
- reschedule_timeout(current_reqD, "redo fd request", 0);
-
- set_floppy(drive);
- raw_cmd = & default_raw_cmd;
- raw_cmd->flags = 0;
- if (start_motor(redo_fd_request)) return;
- disk_change(current_drive);
- if (test_bit(current_drive, &fake_change) ||
- TESTF(FD_DISK_CHANGED)){
- DPRINT("disk absent or changed during operation\n");
- REPEAT;
- }
- if (!_floppy) { /* Autodetection */
- if (!probing){
- DRS->probed_format = 0;
- if (next_valid_format()){
- DPRINT("no autodetectable formats\n");
- _floppy = NULL;
- REPEAT;
- }
- }
- probing = 1;
- _floppy = floppy_type+DP->autodetect[DRS->probed_format];
- } else
- probing = 0;
- errors = & (current_req->errors);
- tmp = make_raw_rw_request();
- if (tmp < 2){
- request_done(tmp);
- continue;
- }
-
- if (TESTF(FD_NEED_TWADDLE))
- twaddle();
- schedule_bh( (void *)(void *) floppy_start);
-#ifdef DEBUGT
- debugt("queue fd request");
-#endif
- return;
- }
-#undef REPEAT
-}
-
-static struct cont_t rw_cont={
- rw_interrupt,
- redo_fd_request,
- bad_flp_intr,
- request_done };
-
-static void process_fd_request(void)
-{
- cont = &rw_cont;
- schedule_bh( (void *)(void *) redo_fd_request);
-}
-
-static void do_fd_request(request_queue_t * q)
-{
- if(max_buffer_sectors == 0) {
- printk("VFS: do_fd_request called on non-open device\n");
- return;
- }
-
- if (usage_count == 0) {
- printk("warning: usage count=0, current_req=%p exiting\n", current_req);
- printk("sect=%ld flags=%lx\n", (long)current_req->sector, current_req->flags);
- return;
- }
- if (fdc_busy){
- /* fdc busy, this new request will be treated when the
- current one is done */
- is_alive("do fd request, old request running");
- return;
- }
- lock_fdc(MAXTIMEOUT,0);
- process_fd_request();
- is_alive("do fd request");
-}
-
-static struct cont_t poll_cont={
- success_and_wakeup,
- floppy_ready,
- generic_failure,
- generic_done };
-
-static int poll_drive(int interruptible, int flag)
-{
- int ret;
- /* no auto-sense, just clear dcl */
- raw_cmd = &default_raw_cmd;
- raw_cmd->flags= flag;
- raw_cmd->track=0;
- raw_cmd->cmd_count=0;
- cont = &poll_cont;
-#ifdef DCL_DEBUG
- if (DP->flags & FD_DEBUG){
- DPRINT("setting NEWCHANGE in poll_drive\n");
- }
-#endif
- SETF(FD_DISK_NEWCHANGE);
- WAIT(floppy_ready);
- return ret;
-}
-
-/*
- * User triggered reset
- * ====================
- */
-
-static void reset_intr(void)
-{
- printk("weird, reset interrupt called\n");
-}
-
-static struct cont_t reset_cont={
- reset_intr,
- success_and_wakeup,
- generic_failure,
- generic_done };
-
-static int user_reset_fdc(int drive, int arg, int interruptible)
-{
- int ret;
-
- ret=0;
- LOCK_FDC(drive,interruptible);
- if (arg == FD_RESET_ALWAYS)
- FDCS->reset=1;
- if (FDCS->reset){
- cont = &reset_cont;
- WAIT(reset_fdc);
- }
- process_fd_request();
- return ret;
-}
-
-/*
- * Misc Ioctl's and support
- * ========================
- */
-static inline int fd_copyout(void *param, const void *address, unsigned long size)
-{
- return copy_to_user(param,address, size) ? -EFAULT : 0;
-}
-
-static inline int fd_copyin(void *param, void *address, unsigned long size)
-{
- return copy_from_user(address, param, size) ? -EFAULT : 0;
-}
-
-#define _COPYOUT(x) (copy_to_user((void *)param, &(x), sizeof(x)) ? -EFAULT : 0)
-#define _COPYIN(x) (copy_from_user(&(x), (void *)param, sizeof(x)) ? -EFAULT : 0)
-
-#define COPYOUT(x) ECALL(_COPYOUT(x))
-#define COPYIN(x) ECALL(_COPYIN(x))
-
-static inline const char *drive_name(int type, int drive)
-{
- struct floppy_struct *floppy;
-
- if (type)
- floppy = floppy_type + type;
- else {
- if (UDP->native_format)
- floppy = floppy_type + UDP->native_format;
- else
- return "(null)";
- }
- if (floppy->name)
- return floppy->name;
- else
- return "(null)";
-}
-
-
-/* raw commands */
-static void raw_cmd_done(int flag)
-{
- int i;
-
- if (!flag) {
- raw_cmd->flags |= FD_RAW_FAILURE;
- raw_cmd->flags |= FD_RAW_HARDFAILURE;
- } else {
- raw_cmd->reply_count = inr;
- if (raw_cmd->reply_count > MAX_REPLIES)
- raw_cmd->reply_count=0;
- for (i=0; i< raw_cmd->reply_count; i++)
- raw_cmd->reply[i] = reply_buffer[i];
-
- if (raw_cmd->flags & (FD_RAW_READ | FD_RAW_WRITE))
- {
- unsigned long flags;
- flags=claim_dma_lock();
- raw_cmd->length = fd_get_dma_residue();
- release_dma_lock(flags);
- }
-
- if ((raw_cmd->flags & FD_RAW_SOFTFAILURE) &&
- (!raw_cmd->reply_count || (raw_cmd->reply[0] & 0xc0)))
- raw_cmd->flags |= FD_RAW_FAILURE;
-
- if (disk_change(current_drive))
- raw_cmd->flags |= FD_RAW_DISK_CHANGE;
- else
- raw_cmd->flags &= ~FD_RAW_DISK_CHANGE;
- if (raw_cmd->flags & FD_RAW_NO_MOTOR_AFTER)
- motor_off_callback(current_drive);
-
- if (raw_cmd->next &&
- (!(raw_cmd->flags & FD_RAW_FAILURE) ||
- !(raw_cmd->flags & FD_RAW_STOP_IF_FAILURE)) &&
- ((raw_cmd->flags & FD_RAW_FAILURE) ||
- !(raw_cmd->flags &FD_RAW_STOP_IF_SUCCESS))) {
- raw_cmd = raw_cmd->next;
- return;
- }
- }
- generic_done(flag);
-}
-
-
-static struct cont_t raw_cmd_cont={
- success_and_wakeup,
- floppy_start,
- generic_failure,
- raw_cmd_done
-};
-
-static inline int raw_cmd_copyout(int cmd, char *param,
- struct floppy_raw_cmd *ptr)
-{
- int ret;
-
- while(ptr) {
- COPYOUT(*ptr);
- param += sizeof(struct floppy_raw_cmd);
- if ((ptr->flags & FD_RAW_READ) && ptr->buffer_length){
- if (ptr->length>=0 && ptr->length<=ptr->buffer_length)
- ECALL(fd_copyout(ptr->data,
- ptr->kernel_data,
- ptr->buffer_length -
- ptr->length));
- }
- ptr = ptr->next;
- }
- return 0;
-}
-
-
-static void raw_cmd_free(struct floppy_raw_cmd **ptr)
-{
- struct floppy_raw_cmd *next,*this;
-
- this = *ptr;
- *ptr = 0;
- while(this) {
- if (this->buffer_length) {
- fd_dma_mem_free((unsigned long)this->kernel_data,
- this->buffer_length);
- this->buffer_length = 0;
- }
- next = this->next;
- kfree(this);
- this = next;
- }
-}
-
-
-static inline int raw_cmd_copyin(int cmd, char *param,
- struct floppy_raw_cmd **rcmd)
-{
- struct floppy_raw_cmd *ptr;
- int ret;
- int i;
-
- *rcmd = 0;
- while(1) {
- ptr = (struct floppy_raw_cmd *)
- kmalloc(sizeof(struct floppy_raw_cmd), GFP_USER);
- if (!ptr)
- return -ENOMEM;
- *rcmd = ptr;
- COPYIN(*ptr);
- ptr->next = 0;
- ptr->buffer_length = 0;
- param += sizeof(struct floppy_raw_cmd);
- if (ptr->cmd_count > 33)
- /* the command may now also take up the space
- * initially intended for the reply & the
- * reply count. Needed for long 82078 commands
- * such as RESTORE, which takes ... 17 command
- * bytes. Murphy's law #137: When you reserve
- * 16 bytes for a structure, you'll one day
- * discover that you really need 17...
- */
- return -EINVAL;
-
- for (i=0; i< 16; i++)
- ptr->reply[i] = 0;
- ptr->resultcode = 0;
- ptr->kernel_data = 0;
-
- if (ptr->flags & (FD_RAW_READ | FD_RAW_WRITE)) {
- if (ptr->length <= 0)
- return -EINVAL;
- ptr->kernel_data =(char*)fd_dma_mem_alloc(ptr->length);
- fallback_on_nodma_alloc(&ptr->kernel_data,
- ptr->length);
- if (!ptr->kernel_data)
- return -ENOMEM;
- ptr->buffer_length = ptr->length;
- }
- if (ptr->flags & FD_RAW_WRITE)
- ECALL(fd_copyin(ptr->data, ptr->kernel_data,
- ptr->length));
- rcmd = & (ptr->next);
- if (!(ptr->flags & FD_RAW_MORE))
- return 0;
- ptr->rate &= 0x43;
- }
-}
-
-
-static int raw_cmd_ioctl(int cmd, void *param)
-{
- int drive, ret, ret2;
- struct floppy_raw_cmd *my_raw_cmd;
-
- if (FDCS->rawcmd <= 1)
- FDCS->rawcmd = 1;
- for (drive= 0; drive < N_DRIVE; drive++){
- if (FDC(drive) != fdc)
- continue;
- if (drive == current_drive){
- if (UDRS->fd_ref > 1){
- FDCS->rawcmd = 2;
- break;
- }
- } else if (UDRS->fd_ref){
- FDCS->rawcmd = 2;
- break;
- }
- }
-
- if (FDCS->reset)
- return -EIO;
-
- ret = raw_cmd_copyin(cmd, param, &my_raw_cmd);
- if (ret) {
- raw_cmd_free(&my_raw_cmd);
- return ret;
- }
-
- raw_cmd = my_raw_cmd;
- cont = &raw_cmd_cont;
- ret=wait_til_done(floppy_start,1);
-#ifdef DCL_DEBUG
- if (DP->flags & FD_DEBUG){
- DPRINT("calling disk change from raw_cmd ioctl\n");
- }
-#endif
-
- if (ret != -EINTR && FDCS->reset)
- ret = -EIO;
-
- DRS->track = NO_TRACK;
-
- ret2 = raw_cmd_copyout(cmd, param, my_raw_cmd);
- if (!ret)
- ret = ret2;
- raw_cmd_free(&my_raw_cmd);
- return ret;
-}
-
-static int invalidate_drive(struct block_device *bdev)
-{
- /* invalidate the buffer track to force a reread */
- set_bit((long)bdev->bd_disk->private_data, &fake_change);
- process_fd_request();
- check_disk_change(bdev);
- return 0;
-}
-
-
-static inline void clear_write_error(int drive)
-{
- CLEARSTRUCT(UDRWE);
-}
-
-static inline int set_geometry(unsigned int cmd, struct floppy_struct *g,
- int drive, int type, struct block_device *bdev)
-{
- int cnt;
-
- /* sanity checking for parameters.*/
- if (g->sect <= 0 ||
- g->head <= 0 ||
- g->track <= 0 ||
- g->track > UDP->tracks>>STRETCH(g) ||
- /* check if reserved bits are set */
- (g->stretch&~(FD_STRETCH|FD_SWAPSIDES)) != 0)
- return -EINVAL;
- if (type){
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
- down(&open_lock);
- LOCK_FDC(drive,1);
- floppy_type[type] = *g;
- floppy_type[type].name="user format";
- for (cnt = type << 2; cnt < (type << 2) + 4; cnt++)
- floppy_sizes[cnt]= floppy_sizes[cnt+0x80]=
- floppy_type[type].size+1;
- process_fd_request();
- for (cnt = 0; cnt < N_DRIVE; cnt++) {
- struct block_device *bdev = opened_bdev[cnt];
- if (!bdev || ITYPE(drive_state[cnt].fd_device) != type)
- continue;
- __invalidate_device(bdev, 0);
- }
- up(&open_lock);
- } else {
- LOCK_FDC(drive,1);
- if (cmd != FDDEFPRM)
- /* notice a disk change immediately, else
- * we lose our settings immediately*/
- CALL(poll_drive(1, FD_RAW_NEED_DISK));
- user_params[drive] = *g;
- if (buffer_drive == drive)
- SUPBOUND(buffer_max, user_params[drive].sect);
- current_type[drive] = &user_params[drive];
- floppy_sizes[drive] = user_params[drive].size;
- if (cmd == FDDEFPRM)
- DRS->keep_data = -1;
- else
- DRS->keep_data = 1;
- /* invalidation. Invalidate only when needed, i.e.
- * when there are already sectors in the buffer cache
- * whose number will change. This is useful, because
- * mtools often changes the geometry of the disk after
- * looking at the boot block */
- if (DRS->maxblock > user_params[drive].sect || DRS->maxtrack)
- invalidate_drive(bdev);
- else
- process_fd_request();
- }
- return 0;
-}
-
-/* handle obsolete ioctl's */
-static int ioctl_table[]= {
- FDCLRPRM,
- FDSETPRM,
- FDDEFPRM,
- FDGETPRM,
- FDMSGON,
- FDMSGOFF,
- FDFMTBEG,
- FDFMTTRK,
- FDFMTEND,
- FDSETEMSGTRESH,
- FDFLUSH,
- FDSETMAXERRS,
- FDGETMAXERRS,
- FDGETDRVTYP,
- FDSETDRVPRM,
- FDGETDRVPRM,
- FDGETDRVSTAT,
- FDPOLLDRVSTAT,
- FDRESET,
- FDGETFDCSTAT,
- FDWERRORCLR,
- FDWERRORGET,
- FDRAWCMD,
- FDEJECT,
- FDTWADDLE
-};
-
-static inline int normalize_ioctl(int *cmd, int *size)
-{
- int i;
-
- for (i=0; i < ARRAY_SIZE(ioctl_table); i++) {
- if ((*cmd & 0xffff) == (ioctl_table[i] & 0xffff)){
- *size = _IOC_SIZE(*cmd);
- *cmd = ioctl_table[i];
- if (*size > _IOC_SIZE(*cmd)) {
- printk("ioctl not yet supported\n");
- return -EFAULT;
- }
- return 0;
- }
- }
- return -EINVAL;
-}
-
-static int get_floppy_geometry(int drive, int type, struct floppy_struct **g)
-{
- if (type)
- *g = &floppy_type[type];
- else {
- LOCK_FDC(drive,0);
- CALL(poll_drive(0,0));
- process_fd_request();
- *g = current_type[drive];
- }
- if (!*g)
- return -ENODEV;
- return 0;
-}
-
-static int fd_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long param)
-{
-#define FD_IOCTL_ALLOWED ((filp) && (filp)->private_data)
-#define OUT(c,x) case c: outparam = (const char *) (x); break
-#define IN(c,x,tag) case c: *(x) = inparam. tag ; return 0
-
- int drive = (long)inode->i_bdev->bd_disk->private_data;
- int i, type = ITYPE(UDRS->fd_device);
- int ret;
- int size;
- union inparam {
- struct floppy_struct g; /* geometry */
- struct format_descr f;
- struct floppy_max_errors max_errors;
- struct floppy_drive_params dp;
- } inparam; /* parameters coming from user space */
- const char *outparam; /* parameters passed back to user space */
-
- /* convert compatibility eject ioctls into floppy eject ioctl.
- * We do this in order to provide a means to eject floppy disks before
- * installing the new fdutils package */
- if (cmd == CDROMEJECT || /* CD-ROM eject */
- cmd == 0x6470 /* SunOS floppy eject */) {
- DPRINT("obsolete eject ioctl\n");
- DPRINT("please use floppycontrol --eject\n");
- cmd = FDEJECT;
- }
-
- /* generic block device ioctls */
- switch(cmd) {
- /* the following have been inspired by the corresponding
- * code for other block devices. */
- struct floppy_struct *g;
- case HDIO_GETGEO:
- {
- struct hd_geometry loc;
- ECALL(get_floppy_geometry(drive, type, &g));
- loc.heads = g->head;
- loc.sectors = g->sect;
- loc.cylinders = g->track;
- loc.start = 0;
- return _COPYOUT(loc);
- }
- }
-
- /* convert the old style command into a new style command */
- if ((cmd & 0xff00) == 0x0200) {
- ECALL(normalize_ioctl(&cmd, &size));
- } else
- return -EINVAL;
-
- /* permission checks */
- if (((cmd & 0x40) && !FD_IOCTL_ALLOWED) ||
- ((cmd & 0x80) && !capable(CAP_SYS_ADMIN)))
- return -EPERM;
-
- /* copyin */
- CLEARSTRUCT(&inparam);
- if (_IOC_DIR(cmd) & _IOC_WRITE)
- ECALL(fd_copyin((void *)param, &inparam, size))
-
- switch (cmd) {
- case FDEJECT:
- if (UDRS->fd_ref != 1)
- /* somebody else has this drive open */
- return -EBUSY;
- LOCK_FDC(drive,1);
-
- /* do the actual eject. Fails on
- * non-Sparc architectures */
- ret=fd_eject(UNIT(drive));
-
- USETF(FD_DISK_CHANGED);
- USETF(FD_VERIFY);
- process_fd_request();
- return ret;
- case FDCLRPRM:
- LOCK_FDC(drive,1);
- current_type[drive] = NULL;
- floppy_sizes[drive] = MAX_DISK_SIZE << 1;
- UDRS->keep_data = 0;
- return invalidate_drive(inode->i_bdev);
- case FDSETPRM:
- case FDDEFPRM:
- return set_geometry(cmd, & inparam.g,
- drive, type, inode->i_bdev);
- case FDGETPRM:
- ECALL(get_floppy_geometry(drive, type,
- (struct floppy_struct**)
- &outparam));
- break;
-
- case FDMSGON:
- UDP->flags |= FTD_MSG;
- return 0;
- case FDMSGOFF:
- UDP->flags &= ~FTD_MSG;
- return 0;
-
- case FDFMTBEG:
- LOCK_FDC(drive,1);
- CALL(poll_drive(1, FD_RAW_NEED_DISK));
- ret = UDRS->flags;
- if (ret & FD_VERIFY) {
- CALL(poll_drive(1, FD_RAW_NEED_DISK));
- ret = UDRS->flags;
- }
-
- if (ret & FD_VERIFY) {
- CALL(poll_drive(1, FD_RAW_NEED_DISK));
- ret = UDRS->flags;
- }
-
- if (ret & FD_VERIFY) {
- CALL(poll_drive(1, FD_RAW_NEED_DISK));
- ret = UDRS->flags;
- }
-
- if (ret & FD_VERIFY) {
- CALL(poll_drive(1, FD_RAW_NEED_DISK));
- ret = UDRS->flags;
- }
-
- if(ret & FD_VERIFY){
- CALL(poll_drive(1, FD_RAW_NEED_DISK));
- ret = UDRS->flags;
- }
- process_fd_request();
- if (ret & FD_VERIFY)
- return -ENODEV;
- if (!(ret & FD_DISK_WRITABLE))
- return -EROFS;
- return 0;
- case FDFMTTRK:
- if (UDRS->fd_ref != 1)
- return -EBUSY;
- return do_format(drive, &inparam.f);
- case FDFMTEND:
- case FDFLUSH:
- LOCK_FDC(drive,1);
- return invalidate_drive(inode->i_bdev);
-
- case FDSETEMSGTRESH:
- UDP->max_errors.reporting =
- (unsigned short) (param & 0x0f);
- return 0;
- OUT(FDGETMAXERRS, &UDP->max_errors);
- IN(FDSETMAXERRS, &UDP->max_errors, max_errors);
-
- case FDGETDRVTYP:
- outparam = drive_name(type,drive);
- SUPBOUND(size,strlen(outparam)+1);
- break;
-
- IN(FDSETDRVPRM, UDP, dp);
- OUT(FDGETDRVPRM, UDP);
-
- case FDPOLLDRVSTAT:
- LOCK_FDC(drive,1);
- CALL(poll_drive(1, FD_RAW_NEED_DISK));
- process_fd_request();
- /* fall through */
- OUT(FDGETDRVSTAT, UDRS);
-
- case FDRESET:
- return user_reset_fdc(drive, (int)param, 1);
-
- OUT(FDGETFDCSTAT,UFDCS);
-
- case FDWERRORCLR:
- CLEARSTRUCT(UDRWE);
- return 0;
- OUT(FDWERRORGET,UDRWE);
-
- case FDRAWCMD:
- if (type)
- return -EINVAL;
- LOCK_FDC(drive,1);
- set_floppy(drive);
- CALL(i = raw_cmd_ioctl(cmd,(void *) param));
- process_fd_request();
- return i;
-
- case FDTWADDLE:
- LOCK_FDC(drive,1);
- twaddle();
- process_fd_request();
- return 0;
-
- default:
- return -EINVAL;
- }
-
- if (_IOC_DIR(cmd) & _IOC_READ)
- return fd_copyout((void *)param, outparam, size);
- else
- return 0;
-#undef OUT
-#undef IN
-}
-
-static void __init config_types(void)
-{
- int first=1;
- int drive;
- extern struct fd_info {
- unsigned char dummy[4 * 6];
- unsigned char fd_types[8];
- } drive_info;
-
- for (drive = 0; drive < 4; drive++)
- UDP->cmos = drive_info.fd_types[drive];
-
- /* XXX */
- /* additional physical CMOS drive detection should go here */
-
- for (drive=0; drive < N_DRIVE; drive++){
- unsigned int type = UDP->cmos;
- struct floppy_drive_params *params;
- const char *name = NULL;
- static char temparea[32];
-
- if (type < NUMBER(default_drive_params)) {
- params = &default_drive_params[type].params;
- if (type) {
- name = default_drive_params[type].name;
- allowed_drive_mask |= 1 << drive;
- }
- else
- allowed_drive_mask &= ~(1 << drive);
- } else {
- params = &default_drive_params[0].params;
- sprintf(temparea, "unknown type %d (usb?)", type);
- name = temparea;
- }
- if (name) {
- const char * prepend = ",";
- if (first) {
- prepend = KERN_INFO "Floppy drive(s):";
- first = 0;
- }
- printk("%s fd%d is %s", prepend, drive, name);
- register_devfs_entries (drive);
- }
- *UDP = *params;
- }
- if (!first)
- printk("\n");
-}
-
-static int floppy_release(struct inode * inode, struct file * filp)
-{
- int drive = (long)inode->i_bdev->bd_disk->private_data;
-
- down(&open_lock);
- if (UDRS->fd_ref < 0)
- UDRS->fd_ref=0;
- else if (!UDRS->fd_ref--) {
- DPRINT("floppy_release with fd_ref == 0");
- UDRS->fd_ref = 0;
- }
- if (!UDRS->fd_ref)
- opened_bdev[drive] = NULL;
- floppy_release_irq_and_dma();
- up(&open_lock);
- return 0;
-}
-
-/*
- * floppy_open check for aliasing (/dev/fd0 can be the same as
- * /dev/PS0 etc), and disallows simultaneous access to the same
- * drive with different device numbers.
- */
-#define RETERR(x) do{floppy_release(inode,filp); return -(x);}while(0)
-
-static int floppy_open(struct inode * inode, struct file * filp)
-{
- int drive = (long)inode->i_bdev->bd_disk->private_data;
- int old_dev;
- int try;
- int res = -EBUSY;
- char *tmp;
-
-#ifdef PC9800_DEBUG_FLOPPY
- printk("floppy open: start\n");
-#endif
- filp->private_data = (void*) 0;
-
-#ifdef PC9800_DEBUG_FLOPPY
- printk("floppy open: drive=%d, current_drive=%d, UDP->cmos=%d\n"
- "floppy open: FDCS={spec1=%d, spec2=%d, dtr=%d, version=%d, dor=%d, address=%lu}\n",
- drive, current_drive, UDP->cmos, FDCS->spec1, FDCS->spec2,
- FDCS->dtr, FDCS->version, FDCS->dor, FDCS->address);
- if (_floppy) {
- printk("floppy open: _floppy={size=%d, sect=%d, head=%d, track=%d, spec1=%d}\n",
- _floppy->size, _floppy->sect, _floppy->head,
- _floppy->track, _floppy->spec1);
- } else {
- printk("floppy open: _floppy=NULL\n");
- }
-#endif /* PC9800_DEBUG_FLOPPY */
-
- down(&open_lock);
- old_dev = UDRS->fd_device;
- if (opened_bdev[drive] && opened_bdev[drive] != inode->i_bdev)
- goto out2;
-
- if (!UDRS->fd_ref && (UDP->flags & FD_BROKEN_DCL)){
- USETF(FD_DISK_CHANGED);
- USETF(FD_VERIFY);
- }
-
- if (UDRS->fd_ref == -1 ||
- (UDRS->fd_ref && (filp->f_flags & O_EXCL)))
- goto out2;
-
- if (floppy_grab_irq_and_dma())
- goto out2;
-
- if (filp->f_flags & O_EXCL)
- UDRS->fd_ref = -1;
- else
- UDRS->fd_ref++;
-
- opened_bdev[drive] = inode->i_bdev;
-
- res = -ENXIO;
-
- if (!floppy_track_buffer){
- /* if opening an ED drive, reserve a big buffer,
- * else reserve a small one */
- if ((UDP->cmos == 6) || (UDP->cmos == 5))
- try = 64; /* Only 48 actually useful */
- else
- try = 32; /* Only 24 actually useful */
-
- tmp=(char *)fd_dma_mem_alloc(1024 * try);
- if (!tmp && !floppy_track_buffer) {
- try >>= 1; /* buffer only one side */
- INFBOUND(try, 16);
- tmp= (char *)fd_dma_mem_alloc(1024*try);
- }
- if (!tmp && !floppy_track_buffer) {
- fallback_on_nodma_alloc(&tmp, 2048 * try);
- }
- if (!tmp && !floppy_track_buffer) {
- DPRINT("Unable to allocate DMA memory\n");
- goto out;
- }
- if (floppy_track_buffer) {
- if (tmp)
- fd_dma_mem_free((unsigned long)tmp,try*1024);
- } else {
- buffer_min = buffer_max = -1;
- floppy_track_buffer = tmp;
- max_buffer_sectors = try;
- }
- }
-
- UDRS->fd_device = iminor(inode);
- set_capacity(disks[drive], floppy_sizes[iminor(inode)]);
- if (old_dev != -1 && old_dev != iminor(inode)) {
- if (buffer_drive == drive)
- buffer_track = -1;
- }
-
-#ifdef PC9800_DEBUG_FLOPPY
- printk("floppy open: floppy.c:%d passed\n", __LINE__);
-#endif
-
-
- /* Allow ioctls if we have write-permissions even if read-only open.
- * Needed so that programs such as fdrawcmd still can work on write
- * protected disks */
- if (filp->f_mode & 2 || permission(filp->f_dentry->d_inode,2,NULL) == 0)
- filp->private_data = (void*) 8;
-
- if (UFDCS->rawcmd == 1)
- UFDCS->rawcmd = 2;
-
-#ifdef PC9800_DEBUG_FLOPPY
- printk("floppy open: floppy.c:%d passed\n", __LINE__);
-#endif
-
- if (!(filp->f_flags & O_NDELAY)) {
- if (filp->f_mode & 3) {
- UDRS->last_checked = 0;
- check_disk_change(inode->i_bdev);
- if (UTESTF(FD_DISK_CHANGED))
- goto out;
- }
- res = -EROFS;
- if ((filp->f_mode & 2) && !(UTESTF(FD_DISK_WRITABLE)))
- goto out;
-#ifdef PC9800_DEBUG_FLOPPY
- printk("floppy open: end normally\n");
-#endif
- }
- up(&open_lock);
- return 0;
-out:
- if (UDRS->fd_ref < 0)
- UDRS->fd_ref=0;
- else
- UDRS->fd_ref--;
- if (!UDRS->fd_ref)
- opened_bdev[drive] = NULL;
- floppy_release_irq_and_dma();
-out2:
- up(&open_lock);
- return res;
-}
-
-/*
- * Check if the disk has been changed or if a change has been faked.
- */
-static int check_floppy_change(struct gendisk *disk)
-{
- int drive = (long)disk->private_data;
-
-#ifdef PC9800_DEBUG_FLOPPY
- printk("check_floppy_change: MINOR=%d\n", minor(dev));
-#endif
-
- if (UTESTF(FD_DISK_CHANGED) || UTESTF(FD_VERIFY))
- return 1;
-
- if (UDP->checkfreq < (int)(jiffies - UDRS->last_checked)) {
- if(floppy_grab_irq_and_dma()) {
- return 1;
- }
-
- lock_fdc(drive,0);
- poll_drive(0,0);
- process_fd_request();
- floppy_release_irq_and_dma();
- }
-
- if (UTESTF(FD_DISK_CHANGED) ||
- UTESTF(FD_VERIFY) ||
- test_bit(drive, &fake_change) ||
- (!ITYPE(UDRS->fd_device) && !current_type[drive]))
- return 1;
- return 0;
-}
-
-/*
- * This implements "read block 0" for floppy_revalidate().
- * Needed for format autodetection, checking whether there is
- * a disk in the drive, and whether that disk is writable.
- */
-
-static int floppy_rb0_complete(struct bio *bio, unsigned int bytes_done, int err)
-{
- if (bio->bi_size)
- return 1;
-
- complete((struct completion*)bio->bi_private);
- return 0;
-}
-
-static int __floppy_read_block_0(struct block_device *bdev)
-{
- struct bio bio;
- struct bio_vec bio_vec;
- struct completion complete;
- struct page *page;
- size_t size;
-
- page = alloc_page(GFP_NOIO);
- if (!page) {
- process_fd_request();
- return -ENOMEM;
- }
-
- size = bdev->bd_block_size;
- if (!size)
- size = 1024;
-
- bio_init(&bio);
- bio.bi_io_vec = &bio_vec;
- bio_vec.bv_page = page;
- bio_vec.bv_len = size;
- bio_vec.bv_offset = 0;
- bio.bi_vcnt = 1;
- bio.bi_idx = 0;
- bio.bi_size = size;
- bio.bi_bdev = bdev;
- bio.bi_sector = 0;
- init_completion(&complete);
- bio.bi_private = &complete;
- bio.bi_end_io = floppy_rb0_complete;
-
- submit_bio(READ, &bio);
- generic_unplug_device(bdev_get_queue(bdev));
- process_fd_request();
- wait_for_completion(&complete);
-
- __free_page(page);
-
- return 0;
-}
-
-/* revalidate the floppy disk, i.e. trigger format autodetection by reading
- * the bootblock (block 0). "Autodetection" is also needed to check whether
- * there is a disk in the drive at all... Thus we also do it for fixed
- * geometry formats */
-static int floppy_revalidate(struct gendisk *disk)
-{
- int drive=(long)disk->private_data;
-#define NO_GEOM (!current_type[drive] && !ITYPE(UDRS->fd_device))
- int cf;
- int res = 0;
-
- if (UTESTF(FD_DISK_CHANGED) ||
- UTESTF(FD_VERIFY) ||
- test_bit(drive, &fake_change) ||
- NO_GEOM){
- if(usage_count == 0) {
- printk("VFS: revalidate called on non-open device.\n");
- return -EFAULT;
- }
- lock_fdc(drive,0);
- cf = UTESTF(FD_DISK_CHANGED) || UTESTF(FD_VERIFY);
- if (!(cf || test_bit(drive, &fake_change) || NO_GEOM)){
- process_fd_request(); /*already done by another thread*/
- return 0;
- }
- UDRS->maxblock = 0;
- UDRS->maxtrack = 0;
- if (buffer_drive == drive)
- buffer_track = -1;
- clear_bit(drive, &fake_change);
- UCLEARF(FD_DISK_CHANGED);
- if (cf)
- UDRS->generation++;
- if (NO_GEOM){
- /* auto-sensing */
- res = __floppy_read_block_0(opened_bdev[drive]);
- } else {
- if (cf)
- poll_drive(0, FD_RAW_NEED_DISK);
- process_fd_request();
- }
- }
- set_capacity(disk, floppy_sizes[UDRS->fd_device]);
- return res;
-}
-
-static struct block_device_operations floppy_fops = {
- .owner = THIS_MODULE,
- .open = floppy_open,
- .release = floppy_release,
- .ioctl = fd_ioctl,
- .media_changed = check_floppy_change,
- .revalidate_disk= floppy_revalidate,
-};
-
-static char *table[] =
-{"",
-#if 0
- "d360",
-#else
- "h1232",
-#endif
- "h1200", "u360", "u720", "h360", "h720",
- "u1440", "u2880", "CompaQ", "h1440", "u1680", "h410",
- "u820", "h1476", "u1722", "h420", "u830", "h1494", "u1743",
- "h880", "u1040", "u1120", "h1600", "u1760", "u1920",
- "u3200", "u3520", "u3840", "u1840", "u800", "u1600",
-NULL
-};
-
-static int t360[] = {
- 1,0
-};
-static int t1200[] = {
- 2,5,6,10,12,14,16,18,20,23,0
-};
-static int t3in[] = {
- 8, 9,26,27,28, 7,11,15,19,24,25,
- 29,31, 3, 4,13,17,21,22,30, 0
-};
-
-static int *table_sup[] = {
- NULL, t360, t1200, t3in+5+8, t3in+5, t3in, t3in
-};
-
-static void __init register_devfs_entries (int drive)
-{
- int base_minor = (drive < 4) ? drive : (124 + drive);
-
- if (UDP->cmos < NUMBER(default_drive_params)) {
- int i = 0;
- do {
- int minor = base_minor + (table_sup[UDP->cmos][i] << 2);
-
- devfs_mk_bdev(MKDEV(FLOPPY_MAJOR, minor),
- S_IFBLK|S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP,
- "floppy/%d%s",
- drive, table[table_sup[UDP->cmos][i]]);
- } while (table_sup[UDP->cmos][i++]);
- }
-}
-
-/*
- * Floppy Driver initialization
- * =============================
- */
-
-static inline char __init get_fdc_version(void)
-{
- return FDC_8272A;
-}
-
-/* lilo configuration */
-
-static void __init floppy_set_flags(int *ints,int param, int param2)
-{
- int i;
-
- for (i=0; i < ARRAY_SIZE(default_drive_params); i++){
- if (param)
- default_drive_params[i].params.flags |= param2;
- else
- default_drive_params[i].params.flags &= ~param2;
- }
- DPRINT("%s flag 0x%x\n", param2 ? "Setting" : "Clearing", param);
-}
-
-static void __init daring(int *ints,int param, int param2)
-{
- int i;
-
- for (i=0; i < ARRAY_SIZE(default_drive_params); i++){
- if (param){
- default_drive_params[i].params.select_delay = 0;
- default_drive_params[i].params.flags |= FD_SILENT_DCL_CLEAR;
- } else {
- default_drive_params[i].params.select_delay = 2*HZ/100;
- default_drive_params[i].params.flags &= ~FD_SILENT_DCL_CLEAR;
- }
- }
- DPRINT("Assuming %s floppy hardware\n", param ? "standard" : "broken");
-}
-
-static void __init set_cmos(int *ints, int dummy, int dummy2)
-{
- int current_drive=0;
-
- if (ints[0] != 2){
- DPRINT("wrong number of parameters for CMOS\n");
- return;
- }
- current_drive = ints[1];
- if (current_drive < 0 || current_drive >= 8){
- DPRINT("bad drive for set_cmos\n");
- return;
- }
-#if N_FDC > 1
- if (current_drive >= 4 && !FDC2)
- FDC2 = 0x370;
-#endif
- DP->cmos = ints[2];
- DPRINT("setting CMOS code to %d\n", ints[2]);
-}
-
-static struct param_table {
- const char *name;
- void (*fn)(int *ints, int param, int param2);
- int *var;
- int def_param;
- int param2;
-} config_params[]={
- { "allowed_drive_mask", 0, &allowed_drive_mask, 0xff, 0}, /* obsolete */
- { "all_drives", 0, &allowed_drive_mask, 0xff, 0 }, /* obsolete */
- { "irq", 0, &FLOPPY_IRQ, DEFAULT_FLOPPY_IRQ, 0 },
- { "dma", 0, &FLOPPY_DMA, DEFAULT_FLOPPY_DMA, 0 },
-
- { "daring", daring, 0, 1, 0},
-#if N_FDC > 1
- { "two_fdc", 0, &FDC2, 0x370, 0 },
- { "one_fdc", 0, &FDC2, 0, 0 },
-#endif
- { "broken_dcl", floppy_set_flags, 0, 1, FD_BROKEN_DCL },
- { "messages", floppy_set_flags, 0, 1, FTD_MSG },
- { "silent_dcl_clear", floppy_set_flags, 0, 1, FD_SILENT_DCL_CLEAR },
- { "debug", floppy_set_flags, 0, 1, FD_DEBUG },
-
- { "nodma", 0, &can_use_virtual_dma, 1, 0 },
- { "yesdma", 0, &can_use_virtual_dma, 0, 0 },
-
- { "fifo_depth", 0, &fifo_depth, 0xa, 0 },
- { "nofifo", 0, &no_fifo, 0x20, 0 },
- { "usefifo", 0, &no_fifo, 0, 0 },
-
- { "cmos", set_cmos, 0, 0, 0 },
- { "slow", 0, &slow_floppy, 1, 0 },
-
- { "unexpected_interrupts", 0, &print_unex, 1, 0 },
- { "no_unexpected_interrupts", 0, &print_unex, 0, 0 },
-
- EXTRA_FLOPPY_PARAMS
-};
-
-static int __init floppy_setup(char *str)
-{
- int i;
- int param;
- int ints[11];
-
- str = get_options(str,ARRAY_SIZE(ints),ints);
- if (str) {
- for (i=0; i< ARRAY_SIZE(config_params); i++){
- if (strcmp(str,config_params[i].name) == 0){
- if (ints[0])
- param = ints[1];
- else
- param = config_params[i].def_param;
- if (config_params[i].fn)
- config_params[i].
- fn(ints,param,
- config_params[i].param2);
- if (config_params[i].var) {
- DPRINT("%s=%d\n", str, param);
- *config_params[i].var = param;
- }
- return 1;
- }
- }
- }
- if (str) {
- DPRINT("unknown floppy option [%s]\n", str);
-
- DPRINT("allowed options are:");
- for (i=0; i< ARRAY_SIZE(config_params); i++)
- printk(" %s",config_params[i].name);
- printk("\n");
- } else
- DPRINT("botched floppy option\n");
- DPRINT("Read linux/Documentation/floppy.txt\n");
- return 0;
-}
-
-static int have_no_fdc= -ENODEV;
-
-static void floppy_device_release(struct device *dev)
-{
- complete(&device_release);
-}
-
-static struct platform_device floppy_device = {
- .name = "floppy",
- .id = 0,
- .dev = {
- .release = floppy_device_release,
- },
-};
-
-static struct kobject *floppy_find(dev_t dev, int *part, void *data)
-{
- int drive = (*part&3) | ((*part&0x80) >> 5);
- if (drive >= N_DRIVE ||
- !(allowed_drive_mask & (1 << drive)) ||
- fdc_state[FDC(drive)].version == FDC_NONE)
- return NULL;
- if (((*part>>2) & 0x1f) >= NUMBER(floppy_type))
- return NULL;
- *part = 0;
- return get_disk(disks[drive]);
-}
-
-int __init floppy_init(void)
-{
- int i,unit,drive;
- int err;
-
- raw_cmd = NULL;
- FDC1 = 0x90;
-
- for (i=0; i<N_DRIVE; i++) {
- disks[i] = alloc_disk(1);
- if (!disks[i])
- goto Enomem;
- }
-
- devfs_mk_dir (NULL, "floppy", NULL);
- if ((err = register_blkdev(FLOPPY_MAJOR,"fd")))
- goto out;
-
- for (i=0; i<N_DRIVE; i++) {
- disks[i]->major = FLOPPY_MAJOR;
- disks[i]->first_minor = TOMINOR(i);
- disks[i]->fops = &floppy_fops;
- sprintf(disks[i]->disk_name, "fd%d", i);
- }
-
- blk_register_region(MKDEV(FLOPPY_MAJOR, 0), 256, THIS_MODULE,
- floppy_find, NULL, NULL);
-
- for (i=0; i<256; i++)
- if (ITYPE(i))
- floppy_sizes[i] = floppy_type[ITYPE(i)].size;
- else
- floppy_sizes[i] = MAX_DISK_SIZE << 1;
-
- floppy_queue = blk_init_queue(do_fd_request, &floppy_lock);
- if (!floppy_queue)
- goto out_queue;
-
- reschedule_timeout(MAXTIMEOUT, "floppy init", MAXTIMEOUT);
- config_types();
-
- for (i = 0; i < N_FDC; i++) {
- fdc = i;
- CLEARSTRUCT(FDCS);
- FDCS->dtr = -1;
- FDCS->dor = 0;
- }
-
- if ((fd_inb(FD_MODE_CHANGE) & 1) == 0)
- FDC1 = 0xc8;
-
- use_virtual_dma = can_use_virtual_dma & 1;
- fdc_state[0].address = FDC1;
- if (fdc_state[0].address == -1) {
- err = -ENODEV;
- goto out1;
- }
-#if N_FDC > 1
- fdc_state[1].address = FDC2;
-#endif
-
- fdc = 0; /* reset fdc in case of unexpected interrupt */
- if (floppy_grab_irq_and_dma()){
- err = -EBUSY;
- goto out1;
- }
-
- /* initialise drive state */
- for (drive = 0; drive < N_DRIVE; drive++) {
- CLEARSTRUCT(UDRS);
- CLEARSTRUCT(UDRWE);
- USETF(FD_DISK_NEWCHANGE);
- USETF(FD_DISK_CHANGED);
- USETF(FD_VERIFY);
- UDRS->fd_device = -1;
- floppy_track_buffer = NULL;
- max_buffer_sectors = 0;
- }
-
- for (i = 0; i < N_FDC; i++) {
- fdc = i;
- FDCS->driver_version = FD_DRIVER_VERSION;
- for (unit=0; unit<4; unit++)
- FDCS->track[unit] = 0;
- if (FDCS->address == -1)
- continue;
- FDCS->rawcmd = 2;
- user_reset_fdc(-1, FD_RESET_ALWAYS, 0);
-
- /* Try to determine the floppy controller type */
- FDCS->version = get_fdc_version();
- if (FDCS->version == FDC_NONE){
- /* free ioports reserved by floppy_grab_irq_and_dma() */
- release_region(FDCS->address, 1);
- release_region(FDCS->address + 2, 1);
- release_region(FDCS->address + 4, 1);
- release_region(0xbe, 1);
- release_region(0x4be, 1);
- FDCS->address = -1;
- continue;
- }
- if (can_use_virtual_dma == 2 && FDCS->version < FDC_82072A)
- can_use_virtual_dma = 0;
-
- have_no_fdc = 0;
- /* Not all FDCs seem to be able to handle the version command
- * properly, so force a reset for the standard FDC clones,
- * to avoid interrupt garbage.
- */
- user_reset_fdc(-1,FD_RESET_ALWAYS,0);
- }
- fdc=0;
- del_timer(&fd_timeout);
- current_drive = 0;
- floppy_release_irq_and_dma();
-#if 0 /* no message */
- initialising=0;
-#endif
- if (have_no_fdc) {
- DPRINT("no floppy controllers found\n");
- flush_scheduled_work();
- if (usage_count)
- floppy_release_irq_and_dma();
- err = have_no_fdc;
- goto out2;
- }
-
- for (drive = 0; drive < N_DRIVE; drive++) {
- init_timer(&motor_off_timer[drive]);
- motor_off_timer[drive].data = drive;
- motor_off_timer[drive].function = motor_off_callback;
- if (!(allowed_drive_mask & (1 << drive)))
- continue;
- if (fdc_state[FDC(drive)].version == FDC_NONE)
- continue;
- /* to be cleaned up... */
- disks[drive]->private_data = (void*)(long)drive;
- disks[drive]->queue = floppy_queue;
- add_disk(disks[drive]);
- }
-
- platform_device_register(&floppy_device);
- return 0;
-
-out1:
- del_timer_sync(&fd_timeout);
-out2:
- blk_cleanup_queue(floppy_queue);
-out_queue:
- blk_unregister_region(MKDEV(FLOPPY_MAJOR, 0), 256);
- unregister_blkdev(FLOPPY_MAJOR,"fd");
-out:
- for (i=0; i<N_DRIVE; i++)
- put_disk(disks[i]);
- return err;
-
-Enomem:
- while (i--)
- put_disk(disks[i]);
- return -ENOMEM;
-}
-
-static spinlock_t floppy_usage_lock = SPIN_LOCK_UNLOCKED;
-
-static int floppy_grab_irq_and_dma(void)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&floppy_usage_lock, flags);
- if (usage_count++){
- spin_unlock_irqrestore(&floppy_usage_lock, flags);
- return 0;
- }
- spin_unlock_irqrestore(&floppy_usage_lock, flags);
- if (fd_request_irq()) {
- DPRINT("Unable to grab IRQ%d for the floppy driver\n",
- FLOPPY_IRQ);
- spin_lock_irqsave(&floppy_usage_lock, flags);
- usage_count--;
- spin_unlock_irqrestore(&floppy_usage_lock, flags);
- return -1;
- }
- if (fd_request_dma()) {
- DPRINT("Unable to grab DMA%d for the floppy driver\n",
- FLOPPY_DMA);
- fd_free_irq();
- spin_lock_irqsave(&floppy_usage_lock, flags);
- usage_count--;
- spin_unlock_irqrestore(&floppy_usage_lock, flags);
- return -1;
- }
-
- for (fdc=0; fdc< N_FDC; fdc++){
- if (FDCS->address != -1){
- static char floppy[] = "floppy";
- if (!request_region(FDCS->address, 1, floppy))
- goto cleanup0;
-
- if (!request_region(FDCS->address + 2, 1, floppy)) {
- release_region(FDCS->address, 1);
- goto cleanup0;
- }
-
- if (!request_region(FDCS->address + 4, 1, floppy)) {
- release_region(FDCS->address, 1);
- release_region(FDCS->address + 2, 1);
- goto cleanup0;
- }
-
- if (fdc == 0) { /* internal FDC */
- if (request_region(0xbe, 1, "floppy mode change")) {
- if (request_region(0x4be, 1, "floppy ex. mode change"))
- continue;
- else
- DPRINT("Floppy io-port 0x4be in use\n");
-
- release_region(0xbe, 1);
- } else
- DPRINT("Floppy io-port 0xbe in use\n");
-
- release_region(FDCS->address, 1);
- release_region(FDCS->address + 2, 1);
- release_region(FDCS->address + 4, 1);
- }
-
- goto cleanup1;
- }
- }
- for (fdc=0; fdc< N_FDC; fdc++){
- if (FDCS->address != -1){
- reset_fdc_info(1);
- fd_outb(FDCS->dor, FD_MODE);
- }
- }
- fdc = 0;
- fd_outb((FDCS->dor & 8), FD_MODE);
-
- for (fdc = 0; fdc < N_FDC; fdc++)
- if (FDCS->address != -1)
- fd_outb(FDCS->dor, FD_MODE);
- /*
- * The driver will try and free resources and relies on us
- * to know if they were allocated or not.
- */
- fdc = 0;
- irqdma_allocated = 1;
- return 0;
-
-cleanup0:
- DPRINT("Floppy io-port 0x%04lx in use\n", FDCS->address);
-cleanup1:
- fd_free_irq();
- fd_free_dma();
- while(--fdc >= 0) {
- release_region(FDCS->address, 1);
- release_region(FDCS->address + 2, 1);
- release_region(FDCS->address + 4, 1);
- if (fdc == 0) {
- release_region(0x00be, 1);
- release_region(0x04be, 1);
- }
- }
- spin_lock_irqsave(&floppy_usage_lock, flags);
- usage_count--;
- spin_unlock_irqrestore(&floppy_usage_lock, flags);
- return -1;
-}
-
-static void floppy_release_irq_and_dma(void)
-{
- int old_fdc;
-#ifdef FLOPPY_SANITY_CHECK
- int drive;
-#endif
- long tmpsize;
- unsigned long tmpaddr;
- unsigned long flags;
-
- spin_lock_irqsave(&floppy_usage_lock, flags);
- if (--usage_count){
- spin_unlock_irqrestore(&floppy_usage_lock, flags);
- return;
- }
- spin_unlock_irqrestore(&floppy_usage_lock, flags);
- if(irqdma_allocated)
- {
- fd_disable_dma();
- fd_free_dma();
- fd_free_irq();
- irqdma_allocated=0;
- }
- fd_outb(0, FD_MODE);
- floppy_enable_hlt();
-
- if (floppy_track_buffer && max_buffer_sectors) {
- tmpsize = max_buffer_sectors*1024;
- tmpaddr = (unsigned long)floppy_track_buffer;
- floppy_track_buffer = NULL;
- max_buffer_sectors = 0;
- buffer_min = buffer_max = -1;
- fd_dma_mem_free(tmpaddr, tmpsize);
- }
-
-#ifdef FLOPPY_SANITY_CHECK
- for (drive=0; drive < N_FDC * 4; drive++)
- if (timer_pending(motor_off_timer + drive))
- printk("motor off timer %d still active\n", drive);
-
- if (timer_pending(&fd_timeout))
- printk("floppy timer still active:%s\n", timeout_message);
- if (timer_pending(&fd_timer))
- printk("auxiliary floppy timer still active\n");
- if (floppy_work.pending)
- printk("work still pending\n");
-#endif
- old_fdc = fdc;
- for (fdc = 0; fdc < N_FDC; fdc++)
- if (FDCS->address != -1) {
- release_region(FDCS->address, 1);
- release_region(FDCS->address + 2, 1);
- release_region(FDCS->address + 4, 1);
- if (fdc == 0) {
- release_region(0xbe, 1);
- release_region(0x4be, 1);
- }
- }
- fdc = old_fdc;
-}
-
-
-#ifdef MODULE
-
-char *floppy;
-
-static void unregister_devfs_entries (int drive)
-{
- int i;
-
- if (UDP->cmos < NUMBER(default_drive_params)) {
- i = 0;
- do {
- devfs_remove("floppy/%d%s", drive, table[table_sup[UDP->cmos][i]]);
- } while (table_sup[UDP->cmos][i++]);
- }
-}
-
-static void __init parse_floppy_cfg_string(char *cfg)
-{
- char *ptr;
-
- while(*cfg) {
- for(ptr = cfg;*cfg && *cfg != ' ' && *cfg != '\t'; cfg++);
- if (*cfg) {
- *cfg = '\0';
- cfg++;
- }
- if (*ptr)
- floppy_setup(ptr);
- }
-}
-
-int init_module(void)
-{
- printk(KERN_INFO "inserting floppy driver for " UTS_RELEASE "\n");
-
- if (floppy)
- parse_floppy_cfg_string(floppy);
- return floppy_init();
-}
-
-void cleanup_module(void)
-{
- int drive;
-
- init_completion(&device_release);
- platform_device_unregister(&floppy_device);
- blk_unregister_region(MKDEV(FLOPPY_MAJOR, 0), 256);
- unregister_blkdev(FLOPPY_MAJOR, "fd");
-
- for (drive = 0; drive < N_DRIVE; drive++) {
- del_timer_sync(&motor_off_timer[drive]);
-
- if ((allowed_drive_mask & (1 << drive)) &&
- fdc_state[FDC(drive)].version != FDC_NONE) {
- del_gendisk(disks[drive]);
- unregister_devfs_entries(drive);
- }
- put_disk(disks[drive]);
- }
- devfs_remove("floppy");
-
- del_timer_sync(&fd_timeout);
- del_timer_sync(&fd_timer);
- blk_cleanup_queue(floppy_queue);
-
- if (usage_count)
- floppy_release_irq_and_dma();
-
- /* eject disk, if any */
- fd_eject(0);
-
- wait_for_completion(&device_release);
-}
-
-MODULE_PARM(floppy,"s");
-MODULE_PARM(FLOPPY_IRQ,"i");
-MODULE_PARM(FLOPPY_DMA,"i");
-MODULE_AUTHOR("Osamu Tomita");
-MODULE_SUPPORTED_DEVICE("fd");
-MODULE_LICENSE("GPL");
-
-#else
-
-__setup ("floppy=", floppy_setup);
-module_init(floppy_init)
-#endif
+++ /dev/null
-Computone Intelliport II/Plus Multiport Serial Driver
------------------------------------------------------
-
-Release Notes For Linux Kernel 2.2 and higher
-
-This file is now deprecated and will be removed at some point.
-
-Please refer to the file Documentation/computone.txt instead.
-
-Michael H. Warfield 08/12/2001
+++ /dev/null
-
-The Cyclades-Z must have firmware loaded onto the card before it will
-operate. This operation should be performed during system startup,
-
-The firmware, loader program and the latest device driver code are
-available from Cyclades at
- ftp://ftp.cyclades.com/pub/cyclades/cyclades-z/linux/
-
+++ /dev/null
-
-NOTE: Earlier versions of the driver mapped ttyC0 to minor
-number 32, but this is changed in this distribution. Port ttyC0
-now maps to minor number 0.) The following patch should be
-applied to /dev/MAKEDEV and the script should then be re-run
-to create new entries for the ports.
---------------------------- CUT HERE ----------------------------
---- /dev/MAKEDEV Sun Aug 20 10:51:55 1995
-+++ MAKEDEV.new Fri Apr 19 06:48:12 1996
-@@ -206,8 +206,8 @@
- major2=`Major cub` || continue
- for i in 0 1 2 3 4 5 6 7 # 8 9 10 11 12 13 14 15
- do
-- makedev ttyC$i c $major1 `expr 32 + $i` $tty
-- makedev cub$i c $major2 `expr 32 + $i` $dialout
-+ makedev ttyC$i c $major1 $i $tty
-+ makedev cub$i c $major2 $i $dialout
- done
- ;;
- par[0-2])
---------------------------- CUT HERE ----------------------------
-
-
+++ /dev/null
-user.doc
-Digi International driver package for the PC/Xe, PC/Xi, PC/Xr, PC/Xem as well
-the EISA and PCI variants of these boards where applicable.
-Copyright (C) 1996 Digi International. Written by Ronnie Sanford digilnux@dgii.com
-
- This program is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published by the
- Free Software Foundation; either version 2 of the License, or (At your
- option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not write to the Free Software Foundation, Inc.,
- 675 Mass Ave, Cambridge, MA 02139, USA.
-
-
-This document describes the software used with the Digi/Linux driver package.
-The four user programs listed below are described in this document:
-
- 1. digiConfig -> Application that configures the Digi driver.
-
- 2. digiDload -> Application which initializes the Digi hardware.
-
- 3. buildPCI -> Application which provides the user a method of
- building device nodes for PCI devices.
-
- 4. ditty -> Application which provides the user a method of
- configuring terminal options on Digi hardware.
-
-
-
---------------------------------------------------------------------------
-1. Configuring driver/kernel for Digi products
---------------------------------------------------------------------------
-
- The Digi driver must be configured each time Digi hardware is added
- or removed. There are two supported methods of doing this. The
- first method configures the driver dynamically at boot time but requires
- the user to utilize the lilo loader. This method is the preffered method
- as it does not require the rebuilding of the kernel. In order to use lilo
- to configure Digi boards at boot time an appropriate append command should
- be added to /etc/lilo.conf below the appropriate label decleration.
- See footer 4. The append commands format is a string of comma separated
- identifiers or integers used to configure supported boards. These six
- values in order are:
-
- Enable/Disable this card or Override,
- Type of card: PC/Xe (AccelePort) (0), PC/Xeve (1), PC/Xem or PC/Xr (2),
- EISA/Xem (3), PC/Xe (64K) (4), PC/Xi (5).
- Enable/Disable alternate pin arrangement,
- Number of ports on this card,
- I/O Port where card is configured (in HEX if using string identifiers),
- Base of memory window (in HEX if using string identifiers)
-
- A sample append command is given below which if used would configure and
- enable a PC/Xe with 8 ports, at i/o address 200, memory address 0xd0000
- with alt pin turned off. The lilo.conf file should look like this:
-
- image = /vmlinuz
- root = /dev/hda2
- label = vmlinuz
- append="digiepca=E,PC/Xe,D,8,200,D0000"
-
- likewise the below will perform the same function:
-
- image = /vmlinuz
- root = /dev/hda2
- label = vmlinuz
- append="digiepca=1,0,0,8,512,851968"
-
- Note:
-
- PCI boards are auto-detected and configured (Hence their codes are
- not given here). Do not attempt to configure PCI boards with the lilo
- append command.
-
- If configuration data has been specified by using digiConfig (Described
- below), and you wish to override this configuration using lilo without
- specifying a specific card (Example if there are PCI cards in the system)
- the following override command will accomplish this:
-
- -> append="digiepca=2"
-
- If lilo is not enabled, the second method of configuring Digi hardware
- will have to be used. digiConfig is an application that can be used
- to inform the system of any additions, deletions, or modifications
- involving Digi hardware. To use this method the operator executes
- digiConfig anytime an EISA or ISA card is added that he wishes to use.
- This routine is also used to remove cards from the system, and to modify
- parameters of those cards already present in the system. Upon being
- executed digiConfig modifies files accessed by the Digi driver. To make
- these changes permanent; the operating system must be recompiled. After
- the operating system has been recompiled and booted, the changes made with
- digiConfig will be introduced to the user. This program MUST be executed
- every time Digi EISA/ISA hardware configuration changes. Note, it is not
- necessary to execute digiConfig in order to configure the Digi PCI cards.
- These cards are self-identifying and will be recognized by the driver.
- They cannot be displayed using digiConfig nor will digiConfig build the
- device nodes their device nodes. See footer 1.
-
- To execute digiConfig; simply type: digiConfig
-
- The application will query you for the type, memory address, port
- address, number of ports, alt pin disposition and status of each board
- that exist on the system. Note, currently this driver only supports
- PC/Xe, PC/Xeve, PC/Xi, PC/Xr, and PC/Xem as well as their EISA and PCI
- implementations if applicable. All supported cards (Other than PCI) that
- are present should be registered via digiConfig. See footer 2.
-
- After all cards have been configured select exit. The system will then
- inform you if any changes have been made, and ask you if it is okay to
- make these changes permanent. If the data entered is correct, select okay.
- Selecting cancel will prevent the changes from becoming active. digiConfig
- can then be re-executed to configure the system again.
-
---------------------------------------------------------------------------
-2. Initializing Digi hardware with digiDload
---------------------------------------------------------------------------
-
- digiDload is the application executed after the Digi driver has been
- loaded. It is responsible for initializing the hardware and leaving
- it in a state such that the Digi board may be operated by the user.
- The application may be placed anywhere on the path, but its related
- support files must be located in /etc/digi. The related files are:
-
- sxfep.bin
- sxbios.bin
- xxfep.bin
- xxbios.bin
-
- The format for this command is "digiDload [v]". If given the "v"
- option turns on verbosity. If not given the application runs in quite
- mode. To execute the program simply type:
-
- digiDload
-
- Upon completion digiDload will generate the below message:
-
- "digiDload complete: Card initialized"
-
- At this point the card is configured and ready for normal usage. See
- technotes.doc for information on how how ports are determined and
- assigned.
-
---------------------------------------------------------------------------
-3. Build PCI device nodes with buildPCI
---------------------------------------------------------------------------
-
- buildPCI is an application useful for building the necessary device nodes
- for Digi PCI cards. It is reccomended that this tool be used because the
- current digiConfig application does not provide this function for PCI cards
- (Though it does build device nodes for non-PCI cards). To use this program
- execute the following:first install the driver, and execute digiDload (See above). After digiDload
- has successfully loaded, execute the following:
-
- buildPCI <arg1> <arg2>
-
- Where arg1 is the number of ports connected to Digi cards that are not PCI
- (As shown by the digiConfig utility), and arg2 is the number of ports
- connected to Digi cards that are PCI.
-
- Note, buildPCI only has to be ran once to build the necessary device
- nodes. Though this program may be executed at anytime, we reccomend
- delaying execution until the first time you install the package and after
- digiDload has been executed.
-
---------------------------------------------------------------------------
-4. Setting Terminal Options with ditty
---------------------------------------------------------------------------
-
-ditty is a utility program that sets and displays the terminal options
-for Digi intelligent serial products. See man ditty for detailed information.
-
-
-Footnotes:
-
-1. The 1.2.x kernel does not provide a method of mapping the high
- addresses (Normally higher than RAM) associated with PCI. For this
- reason, this driver disables PCI support while running under the 1.2.x
- kernels.
-
-2. PCI cards should not and cannot be registered with digiConfig. After
- the driver has been loaded buildPCI may be executed to construct the
- necessary device nodes. This step is not necessary for system not
- having Digi PCI cards.
-
-3. This is because we forsee a time when buildPCI may auto-detect the
- available Digi PCI cards and this would only work if the program is
- executed after digiDload.
-
-4. A complete example is given in install.doc.
-
--------------CHANGES--------------------
-
-All changes should be recorded here. All changes should be explained in
-verbose detail.
------------------------------------------------------------------------
-Programmer : Ronnie Sanford
-Date : June 1, 1996
-Description (Verbose) : Initial release of driver package.
-Files affected : all
-Release version : 1.0.0f (BETA)
------------------------------------------------------------------------
------------------------------------------------------------------------
-Programmer : Ronnie Sanford
-Date : August 7, 1996
-Description (Verbose) : Made several modifications to provide PCI and EISA
- support:
-
- 1. We now allocate the termios structures based on
- the maximum number of channels that COULD be
- available to the system. We no longer use the
- number of channels declared in epcaconfig.h
- (NBDEVS) as the total channel number. This is
- because this value does not represent channels
- available to potential PCI cards. This new
- larger value is also passed back to the os in
- the num field of tty_driver.
-
- 2. Added code to copy the previous board structure
- (Now called static_boards) into a new local
- copy of the boards structure. This has been
- done so that PCI cards may be added to this
- board array and later referenced (And even
- queried.).
-
- 3. Added code to pc_init that checks for supported
- PCI cards. If found this code initializes a new
- entry into the drivers local board structure
- with the PCI cards address, and type, etc.. It
- also bumps the card count (num_cards).
-
- 4. Modified code in post_fep_init so that when this
- routine is executed the number of ports supported
- by a particular PCI card will be determined and
- loaded into the board structure. It would be
- much better if this code was placed in pc_init
- (Because we could then report to the os the true
- number of ports available; not just the max), but
- since the card has to be booted to determine the
- number of ports it supports, we are forced to do it
- after DIGI_INIT has called post_fep_init. In the
- future we may attempt to read the num ports
- attached directly (address 0x1ac).
-
- 5. Added board types to epca.h in support of various
- PCI boards (Some of which do not exist yet).
- Added procedures for these boards throughout the
- code. Note, windowing is not necessary for PCI
- boards.
-
- 6. Added code supporting the EISA/XEM. This included
- modifying epca.h with the new board type and
- adding this type into the driver. The EISA/XEM
- is basically identical to the PC/XEM, other than
- it's base address does not have to be (And cannot
- be configured directly).
-
- 7. Modified digiConfig to prompt for EISA/XEM cards.
-
-Files affected : epca.c, epca.h, digi1.h, digiConfig
-Release version : 1.0.0g (BETA)
------------------------------------------------------------------------
------------------------------------------------------------------------
-Programmer : Ronnie Sanford
-Date : August 21, 1996
-Description (Verbose) : Made the following modifications:
-
- 1. A problem affecting hard flow control was found
- in the termios2digi_h routine. Specifically,
- when the user activated hard flow control using
- the CRTSCTS specification, the values used to
- program hard flow control on the board were
- incorrect. The solution was to change a line
- that read "res |= ((ch->m_dtr) | (ch->m_rts));"
- to "res |= ((ch->m_cts) | (ch->m_rts));" This
- line only applies if cflag & CRTSCTS. Special
- thanks to Matt Robinson (matt@mania.com.au) who
- found and fixed this problem.
-
- 2. In previous betas the cud device was set to CLOCAL
- on driver boot up. Likewise the ttyD device was
- set to ~CLOCAL. This has been fixed in this driver.
- Now ttyD is CLOCAL and cud is ~CLOCAL. The fix
- for this can be found in pc_init.
-
- 3. In ditty.c many changes were made to eliminate bugs
- and warning messages. Two ioctl calls were eliminated
- as well a problem involving using the returned baud
- index to determine the drivers baud rate. Newer
- Linux kernels support higher baud rates by using
- 0x1000 bit. When the returned value (ored with
- 0x1000) was used to reference our fbaud table a
- serious memory problem occurred. This has been fixed.
-
- 4. Added a request_region call to post_fep_init. This
- should cause the i/o ports being used to be
- registered with proc.
-
- 5. Modified digiConfig to set all cud and ttyD devices
- to read/write all permission.
-
- 6. Developed a new apps called buildPCI that provides
- an easy way to build device nodes for PCI cards.
-
- 7. Modified user.doc and technotes.doc document the
- use of buildPCI.
-
-Files affected : epca.c, ditty.c, digiConfig, user.doc, technotes.doc
-Release version : 1.0.0 (Official release)
------------------------------------------------------------------------
-Programmer : Ronnie Sanford
-Date : August 21, 1996
-Description (Verbose) : Made the following modifications:
-
- 1. Removed code from pc_close which closes the
- drivers line discipline and restores its original
- line discipline. This is currently unnecessary,
- though future fast cook enhancements may require
- this.
-
- 2. Removed code in block_til_ready that set the
- asyncflags to either ASYNC_CALLOUT_ACTIVE, or
- ASYNC_NORMAL_ACTIVE. This code was redundant
- as it already existed in block_til_ready.
-
- 3. Added code in block_til_ready to cause a return
- prior to schedule being called if the device
- was a CALLOUT device. CALLOUT devices never
- block on CD. (This was a serious bug that
- prevented the CALLOUT devices (ttyD) from
- functioning properly in some instances.
-
- Make a change in the MODEMCHG_IND case of doevent
- such that it does not require ASYNC_CALLOUT_ACTIVE
- or ASYNC_NORMAL_ACTIVE to be set in order to
- unblock an open (Using wait_interruptible).
-
- Thanks to Mike McLagan (mike.mclagan@linux.org)
- for diagnosing and fixing this problem.
-
- 4. Made changes to the disposition of CLOCAL on
- both SERIAL NORMAL and CALLOUT devices. Both
- device types now have CLOCAL active at default.
- This may be changed with a stty command.
-
- 5. Made changes to digiConfig such that it checks
- major.h (If valid) for the correct major
- numbers to use.
-
-Files affected : epca.c, digiConfig
-Release version : 1.0.1a
-
-
------------------------------------------------------------------------
-Programmer : Ronnie Sanford
-Date : September 17, 1996
-Description (Verbose) : Made the following modifications:
-
- 1. Modified pc_open such that it no longer checks
- the cflag value returned by termios2digi_c for
- CLOCAL. Digi hardware does not use this value
- and thus termios2digi_c rightly screens this
- value out. This driver checks for CLOCAL using
- the drivers cflag value as known by the Linux OS.
- (The value passed into termios2digi_c)
-
- 2. Modified termios2digi_c to screen out the
- CBAUDEX in CBAUD. This error caused parity to
- automaticaly be enabled on at higher baud rates.
-
-
- 3. Added the "disable_bh()" call to the shutdown
- subroutine. Hopefully this will allow the driver
- to correctly clean up after itself when used as a
- module.
-
- 4. Added support for the PC/XI and 64K PC/XE cards.
- This involved primarily modifying digiDload to
- initialize and boot the new cards; however
- driver modifications were also required to
- provide the proper windowing for the newly
- supported cards. (Code was also added to
- determine the memory segment of the XI card as
- that card may have more than 64K. Currently
- digiDload assumes a 64K XI card.)
-
- 5. Added subroutine called epca_setup that can be
- called during LILO boot up. This provides the
- user an easy way to change cards; without
- running digiConfig and without recompiling the
- kernel. Added code in pc_init and pc_open to
- support the epca_setup routine. pc_init checks
- the liloconfig flag (Which is set by epca_setup)
- to determine if the driver is using the LILO
- arguments. If not pc_init loads the board data
- found in epcaconfig.h; if so it DOESN'T load
- epcaconfig data depending on epca_setup to handle
- board configuration. pc_open has been modified
- such that it checks to ensure that no errors
- occurred during the LILO boot process. If a
- user attempts to boot the driver (via. LILO)
- with incorrect data, the open will fail.
-
- 6. Modified the windowing routines pcxe_rxwinon
- and pcxe_txwinon routines. A bug existed such
- that those routines checked to see if the rxwin
- and txwin flags were reset. If so they assumed
- the board was an XI or 64K XE. Furthermore since
- these flags were never initialized in our driver
- sometimes they were 0 and therefore caused a
- memory fault (Or at least a window overrun). This
- code has been removed since the pcxe shares
- nothing in common with the 64K XI and XE.
-
- 7. Added code in pc_init to set the memory_seg for
- the various boards. This code was necessary to
- correct a bug in the PCXE, PCXEVE code where
- receive and transmit pointers were being calculated
- from an uninitialized variable (memory_seg).
-
- 8. Modified digiConfig to allow 64K PC/XI and 64K
- PC/XE cards to be configured.
-
- 9. Made changes to support the new 2.1.x development
- kernel. In particular this required changing all
- references to vremap to ioremap.
-
- 10. Modified digiConfig such that it now generates
- node names corresponding to their internal
- as opposed to the label on the port itself. Nodes
- (ttyD?? and cud??) now start at 0. Example:
- ttyD0 and cud0 represent port 1 on any supported
- Digi product. A similar change has been made
- in buildPCI.c.
-
- 12. At the early portion of post_fep_init if a PCI
- card is detected a warning message could be given
- incorrectly if 64 ports were attached to a PCI
- card. The below line :
-
- epcaassert(bd->numports > 64,"PCI returned a invalid number of ports");
-
- was changed to :
-
- epcaassert(bd->numports <= 64,"PCI returned a invalid number of ports");
-
- Remember that epcaassert checks for NOT true.
- Special thanks to Daniel Taylor for fixing this.
-
- 13. Modified the epcaparam routine. In version 100
- and 101a there was a line that looked like the
- below:
-
- if (ch->omodem != mval)
-
- The problem with this line was that the first time
- through omodem was not initialized. Secondly, since
- many TIOC commands did not alter mval (They use
- a different variable) changes made by these commands
- could be lost. This line was changed to:
-
- mval ^= ch->modemfake & (mval ^ ch->modem);
-
- if (ch->omodem ^ mval)
-
- 14. Modified digiConfig in such a way that it checks
- the version number of the kernel and if it finds
- a 2.x.x kernel or higher it reads the necessary
- major numbers for cud and ttyD devices from major.h.
- This was also done in prior versions but these
- versions required a #define which identified the
- kernel as a version which did not have major numbers
- assigned to Digi systems. This #define is no
- longer required allowing the same source tree for
- multiple kernel releases.
-
- 15. Used macros to replace kernel specific calls such
- as put_fs_long, get_fs_long, put_user, and get_user
- the kernel version is now detected and the macro
- is defined as to correspond with the kernel it
- is being compiled into. Again this was done to
- allow one source tree for multiple kernel releases.
-
- 16. Added support for the new 2.1.x development kernels
- to digiInstall.
-
-Files affected : epca.c, digiConfig
-Release version : 1.1.0
------------------------------------------------------------------------
-Programmer : Daniel Taylor
-Date : April 25, 1997
-Description (Verbose) : Updated driver:
- 1. Fixed DCD bug. (&tq scheduler)
- 2. Removed BH handler code, as it was only handling
- hangups, and not being called for that.
- 3. Namespace cleanup (DIGI_TIMER2 => DIGI_TIMER)
- 4. Updated to 2.1.36, removed #ifdefs for earlier
- kernel revisions.
-Files affected : epca.c
-Release version : 1.1.1 (BETA)
------------------------------------------------------------------------
-Programmer : Daniel Taylor
-Date : March 11, 1999
-Description (Verbose) : Updated driver:
- 1. Simultaneous data and modem change events were
- resulting in the modem change events not being
- recognized. Fixed.
- 2. Modified pc_info device name to work better
- with devfs.
-Files affected : epca.c
-Release version : 1.3.0-K
------------------------------------------------------------------------
-Programmer : Jeff Garzik
-Date : February 26, 2000
-Description (Verbose) : Updated driver:
- 1. Use new kernel PCI interfaces.
- 2. Updated list of includes.
-Files affected : epca.c
-Release version : 1.3.0.1-LK
------------------------------------------------------------------------
-Programmer : Arjan van de Ven <adve@oce.nl>
-Date : March 10, 2000
-Description (Verbose) : Fixed includes to make it actually compile
- for kernel 2.3.51
-Files affected : epca.c
-Release version : 1.3.0.2-LK
------------------------------------------------------------------------
+++ /dev/null
-The z8530drv is now a network device driver, you can find it in
- ../net/scc.c
-
-A subset of the documentation is in
- Documentation/networking/z8530drv.txt
+++ /dev/null
-/*
- * linux/drivers/char/busmouse.c
- *
- * Copyright (C) 1995 - 1998 Russell King <linux@arm.linux.org.uk>
- * Protocol taken from original busmouse.c
- * read() waiting taken from psaux.c
- *
- * Medium-level interface for quadrature or bus mice.
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/slab.h>
-#include <linux/errno.h>
-#include <linux/mm.h>
-#include <linux/poll.h>
-#include <linux/miscdevice.h>
-#include <linux/random.h>
-#include <linux/init.h>
-#include <linux/smp_lock.h>
-
-#include <asm/uaccess.h>
-#include <asm/system.h>
-#include <asm/io.h>
-
-#include "busmouse.h"
-
-/* Uncomment this if your mouse drivers expect the kernel to
- * return with EAGAIN if the mouse does not have any events
- * available, even if the mouse is opened in blocking mode.
- * Please report use of this "feature" to the author using the
- * above address.
- */
-/*#define BROKEN_MOUSE*/
-
-struct busmouse_data {
- struct miscdevice miscdev;
- struct busmouse *ops;
- spinlock_t lock;
-
- wait_queue_head_t wait;
- struct fasync_struct *fasyncptr;
- char active;
- char buttons;
- char ready;
- int dxpos;
- int dypos;
-};
-
-#define NR_MICE 15
-#define FIRST_MOUSE 0
-#define DEV_TO_MOUSE(inode) MINOR_TO_MOUSE(iminor(inode))
-#define MINOR_TO_MOUSE(minor) ((minor) - FIRST_MOUSE)
-
-/*
- * List of mice and guarding semaphore. You must take the semaphore
- * before you take the misc device semaphore if you need both
- */
-
-static struct busmouse_data *busmouse_data[NR_MICE];
-static DECLARE_MUTEX(mouse_sem);
-
-/**
- * busmouse_add_movement - notification of a change of mouse position
- * @mousedev: mouse number
- * @dx: delta X movement
- * @dy: delta Y movement
- * @buttons: new button state
- *
- * Updates the mouse position and button information. The mousedev
- * parameter is the value returned from register_busmouse. The
- * movement information is updated, and the new button state is
- * saved. A waiting user thread is woken.
- */
-
-void busmouse_add_movementbuttons(int mousedev, int dx, int dy, int buttons)
-{
- struct busmouse_data *mse = busmouse_data[mousedev];
- int changed;
-
- spin_lock(&mse->lock);
- changed = (dx != 0 || dy != 0 || mse->buttons != buttons);
-
- if (changed) {
- add_mouse_randomness((buttons << 16) + (dy << 8) + dx);
-
- mse->buttons = buttons;
- mse->dxpos += dx;
- mse->dypos += dy;
- mse->ready = 1;
-
- /*
- * keep dx/dy reasonable, but still able to track when X (or
- * whatever) must page or is busy (i.e. long waits between
- * reads)
- */
- if (mse->dxpos < -2048)
- mse->dxpos = -2048;
- if (mse->dxpos > 2048)
- mse->dxpos = 2048;
- if (mse->dypos < -2048)
- mse->dypos = -2048;
- if (mse->dypos > 2048)
- mse->dypos = 2048;
- }
-
- spin_unlock(&mse->lock);
-
- if (changed) {
- wake_up(&mse->wait);
-
- kill_fasync(&mse->fasyncptr, SIGIO, POLL_IN);
- }
-}
-
-/**
- * busmouse_add_movement - notification of a change of mouse position
- * @mousedev: mouse number
- * @dx: delta X movement
- * @dy: delta Y movement
- *
- * Updates the mouse position. The mousedev parameter is the value
- * returned from register_busmouse. The movement information is
- * updated, and a waiting user thread is woken.
- */
-
-void busmouse_add_movement(int mousedev, int dx, int dy)
-{
- struct busmouse_data *mse = busmouse_data[mousedev];
-
- busmouse_add_movementbuttons(mousedev, dx, dy, mse->buttons);
-}
-
-/**
- * busmouse_add_buttons - notification of a change of button state
- * @mousedev: mouse number
- * @clear: mask of buttons to clear
- * @eor: mask of buttons to change
- *
- * Updates the button state. The mousedev parameter is the value
- * returned from register_busmouse. The buttons are updated by:
- * new_state = (old_state & ~clear) ^ eor
- * A waiting user thread is woken up.
- */
-
-void busmouse_add_buttons(int mousedev, int clear, int eor)
-{
- struct busmouse_data *mse = busmouse_data[mousedev];
-
- busmouse_add_movementbuttons(mousedev, 0, 0, (mse->buttons & ~clear) ^ eor);
-}
-
-static int busmouse_fasync(int fd, struct file *filp, int on)
-{
- struct busmouse_data *mse = (struct busmouse_data *)filp->private_data;
- int retval;
-
- retval = fasync_helper(fd, filp, on, &mse->fasyncptr);
- if (retval < 0)
- return retval;
- return 0;
-}
-
-static int busmouse_release(struct inode *inode, struct file *file)
-{
- struct busmouse_data *mse = (struct busmouse_data *)file->private_data;
- int ret = 0;
-
- lock_kernel();
- busmouse_fasync(-1, file, 0);
-
- down(&mouse_sem); /* to protect mse->active */
- if (--mse->active == 0) {
- if (mse->ops->release)
- ret = mse->ops->release(inode, file);
- module_put(mse->ops->owner);
- mse->ready = 0;
- }
- unlock_kernel();
- up( &mouse_sem);
-
- return ret;
-}
-
-static int busmouse_open(struct inode *inode, struct file *file)
-{
- struct busmouse_data *mse;
- unsigned int mousedev;
- int ret;
-
- mousedev = DEV_TO_MOUSE(inode);
- if (mousedev >= NR_MICE)
- return -EINVAL;
-
- down(&mouse_sem);
- mse = busmouse_data[mousedev];
- ret = -ENODEV;
- if (!mse || !mse->ops) /* shouldn't happen, but... */
- goto end;
-
- if (!try_module_get(mse->ops->owner))
- goto end;
-
- ret = 0;
- if (mse->ops->open) {
- ret = mse->ops->open(inode, file);
- if (ret)
- module_put(mse->ops->owner);
- }
-
- if (ret)
- goto end;
-
- file->private_data = mse;
-
- if (mse->active++)
- goto end;
-
- spin_lock_irq(&mse->lock);
-
- mse->ready = 0;
- mse->dxpos = 0;
- mse->dypos = 0;
- mse->buttons = mse->ops->init_button_state;
-
- spin_unlock_irq(&mse->lock);
-end:
- up(&mouse_sem);
- return ret;
-}
-
-static ssize_t busmouse_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
-{
- return -EINVAL;
-}
-
-static ssize_t busmouse_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
-{
- struct busmouse_data *mse = (struct busmouse_data *)file->private_data;
- DECLARE_WAITQUEUE(wait, current);
- int dxpos, dypos, buttons;
-
- if (count < 3)
- return -EINVAL;
-
- spin_lock_irq(&mse->lock);
-
- if (!mse->ready) {
-#ifdef BROKEN_MOUSE
- spin_unlock_irq(&mse->lock);
- return -EAGAIN;
-#else
- if (file->f_flags & O_NONBLOCK) {
- spin_unlock_irq(&mse->lock);
- return -EAGAIN;
- }
-
- add_wait_queue(&mse->wait, &wait);
-repeat:
- set_current_state(TASK_INTERRUPTIBLE);
- if (!mse->ready && !signal_pending(current)) {
- spin_unlock_irq(&mse->lock);
- schedule();
- spin_lock_irq(&mse->lock);
- goto repeat;
- }
-
- current->state = TASK_RUNNING;
- remove_wait_queue(&mse->wait, &wait);
-
- if (signal_pending(current)) {
- spin_unlock_irq(&mse->lock);
- return -ERESTARTSYS;
- }
-#endif
- }
-
- dxpos = mse->dxpos;
- dypos = mse->dypos;
- buttons = mse->buttons;
-
- if (dxpos < -127)
- dxpos =- 127;
- if (dxpos > 127)
- dxpos = 127;
- if (dypos < -127)
- dypos =- 127;
- if (dypos > 127)
- dypos = 127;
-
- mse->dxpos -= dxpos;
- mse->dypos -= dypos;
-
- /* This is something that many drivers have apparantly
- * forgotten... If the X and Y positions still contain
- * information, we still have some info ready for the
- * user program...
- */
- mse->ready = mse->dxpos || mse->dypos;
-
- spin_unlock_irq(&mse->lock);
-
- /* Write out data to the user. Format is:
- * byte 0 - identifer (0x80) and (inverted) mouse buttons
- * byte 1 - X delta position +/- 127
- * byte 2 - Y delta position +/- 127
- */
- if (put_user((char)buttons | 128, buffer) ||
- put_user((char)dxpos, buffer + 1) ||
- put_user((char)dypos, buffer + 2))
- return -EFAULT;
-
- if (count > 3 && clear_user(buffer + 3, count - 3))
- return -EFAULT;
-
- file->f_dentry->d_inode->i_atime = CURRENT_TIME;
-
- return count;
-}
-
-/* No kernel lock held - fine */
-static unsigned int busmouse_poll(struct file *file, poll_table *wait)
-{
- struct busmouse_data *mse = (struct busmouse_data *)file->private_data;
-
- poll_wait(file, &mse->wait, wait);
-
- if (mse->ready)
- return POLLIN | POLLRDNORM;
-
- return 0;
-}
-
-struct file_operations busmouse_fops=
-{
- .owner = THIS_MODULE,
- .read = busmouse_read,
- .write = busmouse_write,
- .poll = busmouse_poll,
- .open = busmouse_open,
- .release = busmouse_release,
- .fasync = busmouse_fasync,
-};
-
-/**
- * register_busmouse - register a bus mouse interface
- * @ops: busmouse structure for the mouse
- *
- * Registers a mouse with the driver. The return is mouse number on
- * success and a negative errno code on an error. The passed ops
- * structure most not be freed until the mouser is unregistered
- */
-
-int register_busmouse(struct busmouse *ops)
-{
- unsigned int msedev = MINOR_TO_MOUSE(ops->minor);
- struct busmouse_data *mse;
- int ret = -EINVAL;
-
- if (msedev >= NR_MICE) {
- printk(KERN_ERR "busmouse: trying to allocate mouse on minor %d\n",
- ops->minor);
- goto out;
- }
-
- ret = -ENOMEM;
- mse = kmalloc(sizeof(*mse), GFP_KERNEL);
- if (!mse)
- goto out;
-
- down(&mouse_sem);
- ret = -EBUSY;
- if (busmouse_data[msedev])
- goto freemem;
-
- memset(mse, 0, sizeof(*mse));
-
- mse->miscdev.minor = ops->minor;
- mse->miscdev.name = ops->name;
- mse->miscdev.fops = &busmouse_fops;
- mse->ops = ops;
- mse->lock = (spinlock_t)SPIN_LOCK_UNLOCKED;
- init_waitqueue_head(&mse->wait);
-
-
- ret = misc_register(&mse->miscdev);
-
- if (ret < 0)
- goto freemem;
-
- busmouse_data[msedev] = mse;
- ret = msedev;
-out:
- up(&mouse_sem);
- return ret;
-
-
-freemem:
- kfree(mse);
- goto out;
-}
-
-/**
- * unregister_busmouse - unregister a bus mouse interface
- * @mousedev: Mouse number to release
- *
- * Unregister a previously installed mouse handler. The mousedev
- * passed is the return code from a previous call to register_busmouse
- */
-
-
-int unregister_busmouse(int mousedev)
-{
- int err = -EINVAL;
-
- if (mousedev < 0)
- return 0;
- if (mousedev >= NR_MICE) {
- printk(KERN_ERR "busmouse: trying to free mouse on"
- " mousedev %d\n", mousedev);
- return -EINVAL;
- }
-
- down(&mouse_sem);
-
- if (!busmouse_data[mousedev]) {
- printk(KERN_WARNING "busmouse: trying to free free mouse"
- " on mousedev %d\n", mousedev);
- goto fail;
- }
-
- if (busmouse_data[mousedev]->active) {
- printk(KERN_ERR "busmouse: trying to free active mouse"
- " on mousedev %d\n", mousedev);
- goto fail;
- }
-
- err = misc_deregister(&busmouse_data[mousedev]->miscdev);
-
- kfree(busmouse_data[mousedev]);
- busmouse_data[mousedev] = NULL;
-fail:
- up(&mouse_sem);
- return err;
-}
-
-EXPORT_SYMBOL(busmouse_add_movementbuttons);
-EXPORT_SYMBOL(busmouse_add_movement);
-EXPORT_SYMBOL(busmouse_add_buttons);
-EXPORT_SYMBOL(register_busmouse);
-EXPORT_SYMBOL(unregister_busmouse);
-
-MODULE_ALIAS_MISCDEV(BUSMOUSE_MINOR);
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * linux/drivers/char/busmouse.h
- *
- * Copyright (C) 1995 - 1998 Russell King
- *
- * Prototypes for generic busmouse interface
- */
-#ifndef BUSMOUSE_H
-#define BUSMOUSE_H
-
-struct busmouse {
- int minor;
- const char *name;
- struct module *owner;
- int (*open)(struct inode * inode, struct file * file);
- int (*release)(struct inode * inode, struct file * file);
- int init_button_state;
-};
-
-extern void busmouse_add_movementbuttons(int mousedev, int dx, int dy, int buttons);
-extern void busmouse_add_movement(int mousedev, int dx, int dy);
-extern void busmouse_add_buttons(int mousedev, int clear, int eor);
-
-extern int register_busmouse(struct busmouse *ops);
-extern int unregister_busmouse(int mousedev);
-
-#endif
+++ /dev/null
-/**
- * \file ati_pcigart.h
- * ATI PCI GART support
- *
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
- *
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-#if PAGE_SIZE == 65536
-# define ATI_PCIGART_TABLE_ORDER 0
-# define ATI_PCIGART_TABLE_PAGES (1 << 0)
-#elif PAGE_SIZE == 16384
-# define ATI_PCIGART_TABLE_ORDER 1
-# define ATI_PCIGART_TABLE_PAGES (1 << 1)
-#elif PAGE_SIZE == 8192
-# define ATI_PCIGART_TABLE_ORDER 2
-# define ATI_PCIGART_TABLE_PAGES (1 << 2)
-#elif PAGE_SIZE == 4096
-# define ATI_PCIGART_TABLE_ORDER 3
-# define ATI_PCIGART_TABLE_PAGES (1 << 3)
-#else
-# error - PAGE_SIZE not 64K, 16K, 8K or 4K
-#endif
-
-# define ATI_MAX_PCIGART_PAGES 8192 /**< 32 MB aperture, 4K pages */
-# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
-
-static unsigned long DRM(ati_alloc_pcigart_table)( void )
-{
- unsigned long address;
- struct page *page;
- int i;
- DRM_DEBUG( "%s\n", __FUNCTION__ );
-
- address = __get_free_pages( GFP_KERNEL, ATI_PCIGART_TABLE_ORDER );
- if ( address == 0UL ) {
- return 0;
- }
-
- page = virt_to_page( address );
-
- for ( i = 0 ; i < ATI_PCIGART_TABLE_PAGES ; i++, page++ ) {
- get_page(page);
- SetPageReserved( page );
- }
-
- DRM_DEBUG( "%s: returning 0x%08lx\n", __FUNCTION__, address );
- return address;
-}
-
-static void DRM(ati_free_pcigart_table)( unsigned long address )
-{
- struct page *page;
- int i;
- DRM_DEBUG( "%s\n", __FUNCTION__ );
-
- page = virt_to_page( address );
-
- for ( i = 0 ; i < ATI_PCIGART_TABLE_PAGES ; i++, page++ ) {
- __put_page(page);
- ClearPageReserved( page );
- }
-
- free_pages( address, ATI_PCIGART_TABLE_ORDER );
-}
-
-int DRM(ati_pcigart_init)( drm_device_t *dev,
- unsigned long *addr,
- dma_addr_t *bus_addr)
-{
- drm_sg_mem_t *entry = dev->sg;
- unsigned long address = 0;
- unsigned long pages;
- u32 *pci_gart, page_base, bus_address = 0;
- int i, j, ret = 0;
-
- if ( !entry ) {
- DRM_ERROR( "no scatter/gather memory!\n" );
- goto done;
- }
-
- address = DRM(ati_alloc_pcigart_table)();
- if ( !address ) {
- DRM_ERROR( "cannot allocate PCI GART page!\n" );
- goto done;
- }
-
- if ( !dev->pdev ) {
- DRM_ERROR( "PCI device unknown!\n" );
- goto done;
- }
-
- bus_address = pci_map_single(dev->pdev, (void *)address,
- ATI_PCIGART_TABLE_PAGES * PAGE_SIZE,
- PCI_DMA_TODEVICE);
- if (bus_address == 0) {
- DRM_ERROR( "unable to map PCIGART pages!\n" );
- DRM(ati_free_pcigart_table)( address );
- address = 0;
- goto done;
- }
-
- pci_gart = (u32 *)address;
-
- pages = ( entry->pages <= ATI_MAX_PCIGART_PAGES )
- ? entry->pages : ATI_MAX_PCIGART_PAGES;
-
- memset( pci_gart, 0, ATI_MAX_PCIGART_PAGES * sizeof(u32) );
-
- for ( i = 0 ; i < pages ; i++ ) {
- /* we need to support large memory configurations */
- entry->busaddr[i] = pci_map_single(dev->pdev,
- page_address( entry->pagelist[i] ),
- PAGE_SIZE,
- PCI_DMA_TODEVICE);
- if (entry->busaddr[i] == 0) {
- DRM_ERROR( "unable to map PCIGART pages!\n" );
- DRM(ati_pcigart_cleanup)( dev, address, bus_address );
- address = 0;
- bus_address = 0;
- goto done;
- }
- page_base = (u32) entry->busaddr[i];
-
- for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
- *pci_gart++ = cpu_to_le32( page_base );
- page_base += ATI_PCIGART_PAGE_SIZE;
- }
- }
-
- ret = 1;
-
-#if defined(__i386__) || defined(__x86_64__)
- asm volatile ( "wbinvd" ::: "memory" );
-#else
- mb();
-#endif
-
-done:
- *addr = address;
- *bus_addr = bus_address;
- return ret;
-}
-
-int DRM(ati_pcigart_cleanup)( drm_device_t *dev,
- unsigned long addr,
- dma_addr_t bus_addr)
-{
- drm_sg_mem_t *entry = dev->sg;
- unsigned long pages;
- int i;
-
- /* we need to support large memory configurations */
- if ( !entry ) {
- DRM_ERROR( "no scatter/gather memory!\n" );
- return 0;
- }
-
- if ( bus_addr ) {
- pci_unmap_single(dev->pdev, bus_addr,
- ATI_PCIGART_TABLE_PAGES * PAGE_SIZE,
- PCI_DMA_TODEVICE);
-
- pages = ( entry->pages <= ATI_MAX_PCIGART_PAGES )
- ? entry->pages : ATI_MAX_PCIGART_PAGES;
-
- for ( i = 0 ; i < pages ; i++ ) {
- if ( !entry->busaddr[i] ) break;
- pci_unmap_single(dev->pdev, entry->busaddr[i],
- PAGE_SIZE, PCI_DMA_TODEVICE);
- }
- }
-
- if ( addr ) {
- DRM(ati_free_pcigart_table)( addr );
- }
-
- return 1;
-}
+++ /dev/null
-/**
- * \file drm_agpsupport.h
- * DRM support for AGP/GART backend
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include <linux/module.h>
-
-#if __OS_HAS_AGP
-
-#define DRM_AGP_GET (drm_agp_t *)inter_module_get("drm_agp")
-#define DRM_AGP_PUT inter_module_put("drm_agp")
-
-/**
- * Pointer to the drm_agp_t structure made available by the agpgart module.
- */
-static const drm_agp_t *drm_agp = NULL;
-
-/**
- * AGP information ioctl.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a (output) drm_agp_info structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device has been initialized and acquired and fills in the
- * drm_agp_info structure with the information in drm_agp_head::agp_info.
- */
-int DRM(agp_info)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- DRM_AGP_KERN *kern;
- drm_agp_info_t info;
-
- if (!dev->agp || !dev->agp->acquired || !drm_agp->copy_info)
- return -EINVAL;
-
- kern = &dev->agp->agp_info;
- info.agp_version_major = kern->version.major;
- info.agp_version_minor = kern->version.minor;
- info.mode = kern->mode;
- info.aperture_base = kern->aper_base;
- info.aperture_size = kern->aper_size * 1024 * 1024;
- info.memory_allowed = kern->max_memory << PAGE_SHIFT;
- info.memory_used = kern->current_memory << PAGE_SHIFT;
- info.id_vendor = kern->device->vendor;
- info.id_device = kern->device->device;
-
- if (copy_to_user((drm_agp_info_t __user *)arg, &info, sizeof(info)))
- return -EFAULT;
- return 0;
-}
-
-/**
- * Acquire the AGP device (ioctl).
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device hasn't been acquired before and calls
- * drm_agp->acquire().
- */
-int DRM(agp_acquire)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode;
-
- if (!dev->agp)
- return -ENODEV;
- if (dev->agp->acquired)
- return -EBUSY;
- if (!drm_agp->acquire)
- return -EINVAL;
- if ((retcode = drm_agp->acquire()))
- return retcode;
- dev->agp->acquired = 1;
- return 0;
-}
-
-/**
- * Release the AGP device (ioctl).
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device has been acquired and calls drm_agp->release().
- */
-int DRM(agp_release)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
-
- if (!dev->agp || !dev->agp->acquired || !drm_agp->release)
- return -EINVAL;
- drm_agp->release();
- dev->agp->acquired = 0;
- return 0;
-
-}
-
-/**
- * Release the AGP device.
- *
- * Calls drm_agp->release().
- */
-void DRM(agp_do_release)(void)
-{
- if (drm_agp->release)
- drm_agp->release();
-}
-
-/**
- * Enable the AGP bus.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_agp_mode structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device has been acquired but not enabled, and calls
- * drm_agp->enable().
- */
-int DRM(agp_enable)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_agp_mode_t mode;
-
- if (!dev->agp || !dev->agp->acquired || !drm_agp->enable)
- return -EINVAL;
-
- if (copy_from_user(&mode, (drm_agp_mode_t __user *)arg, sizeof(mode)))
- return -EFAULT;
-
- dev->agp->mode = mode.mode;
- drm_agp->enable(mode.mode);
- dev->agp->base = dev->agp->agp_info.aper_base;
- dev->agp->enabled = 1;
- return 0;
-}
-
-/**
- * Allocate AGP memory.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_agp_buffer structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device is present and has been acquired, allocates the
- * memory via alloc_agp() and creates a drm_agp_mem entry for it.
- */
-int DRM(agp_alloc)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_agp_buffer_t request;
- drm_agp_mem_t *entry;
- DRM_AGP_MEM *memory;
- unsigned long pages;
- u32 type;
- drm_agp_buffer_t __user *argp = (void __user *)arg;
-
- if (!dev->agp || !dev->agp->acquired)
- return -EINVAL;
- if (copy_from_user(&request, argp, sizeof(request)))
- return -EFAULT;
- if (!(entry = DRM(alloc)(sizeof(*entry), DRM_MEM_AGPLISTS)))
- return -ENOMEM;
-
- memset(entry, 0, sizeof(*entry));
-
- pages = (request.size + PAGE_SIZE - 1) / PAGE_SIZE;
- type = (u32) request.type;
-
- if (!(memory = DRM(alloc_agp)(pages, type))) {
- DRM(free)(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- return -ENOMEM;
- }
-
- entry->handle = (unsigned long)memory->key + 1;
- entry->memory = memory;
- entry->bound = 0;
- entry->pages = pages;
- entry->prev = NULL;
- entry->next = dev->agp->memory;
- if (dev->agp->memory)
- dev->agp->memory->prev = entry;
- dev->agp->memory = entry;
-
- request.handle = entry->handle;
- request.physical = memory->physical;
-
- if (copy_to_user(argp, &request, sizeof(request))) {
- dev->agp->memory = entry->next;
- dev->agp->memory->prev = NULL;
- DRM(free_agp)(memory, pages);
- DRM(free)(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- return -EFAULT;
- }
- return 0;
-}
-
-/**
- * Search for the AGP memory entry associated with a handle.
- *
- * \param dev DRM device structure.
- * \param handle AGP memory handle.
- * \return pointer to the drm_agp_mem structure associated with \p handle.
- *
- * Walks through drm_agp_head::memory until finding a matching handle.
- */
-static drm_agp_mem_t *DRM(agp_lookup_entry)(drm_device_t *dev,
- unsigned long handle)
-{
- drm_agp_mem_t *entry;
-
- for (entry = dev->agp->memory; entry; entry = entry->next) {
- if (entry->handle == handle)
- return entry;
- }
- return NULL;
-}
-
-/**
- * Unbind AGP memory from the GATT (ioctl).
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_agp_binding structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device is present and acquired, looks-up the AGP memory
- * entry and passes it to the unbind_agp() function.
- */
-int DRM(agp_unbind)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_agp_binding_t request;
- drm_agp_mem_t *entry;
- int ret;
-
- if (!dev->agp || !dev->agp->acquired)
- return -EINVAL;
- if (copy_from_user(&request, (drm_agp_binding_t __user *)arg, sizeof(request)))
- return -EFAULT;
- if (!(entry = DRM(agp_lookup_entry)(dev, request.handle)))
- return -EINVAL;
- if (!entry->bound)
- return -EINVAL;
- ret = DRM(unbind_agp)(entry->memory);
- if (ret == 0)
- entry->bound = 0;
- return ret;
-}
-
-/**
- * Bind AGP memory into the GATT (ioctl)
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_agp_binding structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device is present and has been acquired and that no memory
- * is currently bound into the GATT. Looks-up the AGP memory entry and passes
- * it to bind_agp() function.
- */
-int DRM(agp_bind)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_agp_binding_t request;
- drm_agp_mem_t *entry;
- int retcode;
- int page;
-
- if (!dev->agp || !dev->agp->acquired || !drm_agp->bind_memory)
- return -EINVAL;
- if (copy_from_user(&request, (drm_agp_binding_t __user *)arg, sizeof(request)))
- return -EFAULT;
- if (!(entry = DRM(agp_lookup_entry)(dev, request.handle)))
- return -EINVAL;
- if (entry->bound)
- return -EINVAL;
- page = (request.offset + PAGE_SIZE - 1) / PAGE_SIZE;
- if ((retcode = DRM(bind_agp)(entry->memory, page)))
- return retcode;
- entry->bound = dev->agp->base + (page << PAGE_SHIFT);
- DRM_DEBUG("base = 0x%lx entry->bound = 0x%lx\n",
- dev->agp->base, entry->bound);
- return 0;
-}
-
-/**
- * Free AGP memory (ioctl).
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_agp_buffer structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device is present and has been acquired and looks up the
- * AGP memory entry. If the memory it's currently bound, unbind it via
- * unbind_agp(). Frees it via free_agp() as well as the entry itself
- * and unlinks from the doubly linked list it's inserted in.
- */
-int DRM(agp_free)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_agp_buffer_t request;
- drm_agp_mem_t *entry;
-
- if (!dev->agp || !dev->agp->acquired)
- return -EINVAL;
- if (copy_from_user(&request, (drm_agp_buffer_t __user *)arg, sizeof(request)))
- return -EFAULT;
- if (!(entry = DRM(agp_lookup_entry)(dev, request.handle)))
- return -EINVAL;
- if (entry->bound)
- DRM(unbind_agp)(entry->memory);
-
- if (entry->prev)
- entry->prev->next = entry->next;
- else
- dev->agp->memory = entry->next;
-
- if (entry->next)
- entry->next->prev = entry->prev;
-
- DRM(free_agp)(entry->memory, entry->pages);
- DRM(free)(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- return 0;
-}
-
-/**
- * Initialize the AGP resources.
- *
- * \return pointer to a drm_agp_head structure.
- *
- * Gets the drm_agp_t structure which is made available by the agpgart module
- * via the inter_module_* functions. Creates and initializes a drm_agp_head
- * structure.
- */
-drm_agp_head_t *DRM(agp_init)(void)
-{
- drm_agp_head_t *head = NULL;
-
- drm_agp = DRM_AGP_GET;
- if (drm_agp) {
- if (!(head = DRM(alloc)(sizeof(*head), DRM_MEM_AGPLISTS)))
- return NULL;
- memset((void *)head, 0, sizeof(*head));
- drm_agp->copy_info(&head->agp_info);
- if (head->agp_info.chipset == NOT_SUPPORTED) {
- DRM(free)(head, sizeof(*head), DRM_MEM_AGPLISTS);
- return NULL;
- }
- head->memory = NULL;
-#if LINUX_VERSION_CODE <= 0x020408
- head->cant_use_aperture = 0;
- head->page_mask = ~(0xfff);
-#else
- head->cant_use_aperture = head->agp_info.cant_use_aperture;
- head->page_mask = head->agp_info.page_mask;
-#endif
- }
- return head;
-}
-
-/**
- * Free the AGP resources.
- *
- * Releases the pointer in ::drm_agp.
- */
-void DRM(agp_uninit)(void)
-{
- DRM_AGP_PUT;
- drm_agp = NULL;
-}
-
-/** Calls drm_agp->allocate_memory() */
-DRM_AGP_MEM *DRM(agp_allocate_memory)(size_t pages, u32 type)
-{
- if (!drm_agp->allocate_memory)
- return NULL;
- return drm_agp->allocate_memory(pages, type);
-}
-
-/** Calls drm_agp->free_memory() */
-int DRM(agp_free_memory)(DRM_AGP_MEM *handle)
-{
- if (!handle || !drm_agp->free_memory)
- return 0;
- drm_agp->free_memory(handle);
- return 1;
-}
-
-/** Calls drm_agp->bind_memory() */
-int DRM(agp_bind_memory)(DRM_AGP_MEM *handle, off_t start)
-{
- if (!handle || !drm_agp->bind_memory)
- return -EINVAL;
- return drm_agp->bind_memory(handle, start);
-}
-
-/** Calls drm_agp->unbind_memory() */
-int DRM(agp_unbind_memory)(DRM_AGP_MEM *handle)
-{
- if (!handle || !drm_agp->unbind_memory)
- return -EINVAL;
- return drm_agp->unbind_memory(handle);
-}
-
-#endif /* __OS_HAS_AGP */
+++ /dev/null
-/**
- * \file drm_auth.h
- * IOCTLs for authentication
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-/**
- * Generate a hash key from a magic.
- *
- * \param magic magic.
- * \return hash key.
- *
- * The key is the modulus of the hash table size, #DRM_HASH_SIZE, which must be
- * a power of 2.
- */
-static int DRM(hash_magic)(drm_magic_t magic)
-{
- return magic & (DRM_HASH_SIZE-1);
-}
-
-/**
- * Find the file with the given magic number.
- *
- * \param dev DRM device.
- * \param magic magic number.
- *
- * Searches in drm_device::magiclist within all files with the same hash key
- * the one with matching magic number, while holding the drm_device::struct_sem
- * lock.
- */
-static drm_file_t *DRM(find_file)(drm_device_t *dev, drm_magic_t magic)
-{
- drm_file_t *retval = NULL;
- drm_magic_entry_t *pt;
- int hash = DRM(hash_magic)(magic);
-
- down(&dev->struct_sem);
- for (pt = dev->magiclist[hash].head; pt; pt = pt->next) {
- if (pt->magic == magic) {
- retval = pt->priv;
- break;
- }
- }
- up(&dev->struct_sem);
- return retval;
-}
-
-/**
- * Adds a magic number.
- *
- * \param dev DRM device.
- * \param priv file private data.
- * \param magic magic number.
- *
- * Creates a drm_magic_entry structure and appends to the linked list
- * associated the magic number hash key in drm_device::magiclist, while holding
- * the drm_device::struct_sem lock.
- */
-int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic)
-{
- int hash;
- drm_magic_entry_t *entry;
-
- DRM_DEBUG("%d\n", magic);
-
- hash = DRM(hash_magic)(magic);
- entry = DRM(alloc)(sizeof(*entry), DRM_MEM_MAGIC);
- if (!entry) return -ENOMEM;
- memset(entry, 0, sizeof(*entry));
- entry->magic = magic;
- entry->priv = priv;
- entry->next = NULL;
-
- down(&dev->struct_sem);
- if (dev->magiclist[hash].tail) {
- dev->magiclist[hash].tail->next = entry;
- dev->magiclist[hash].tail = entry;
- } else {
- dev->magiclist[hash].head = entry;
- dev->magiclist[hash].tail = entry;
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-/**
- * Remove a magic number.
- *
- * \param dev DRM device.
- * \param magic magic number.
- *
- * Searches and unlinks the entry in drm_device::magiclist with the magic
- * number hash key, while holding the drm_device::struct_sem lock.
- */
-int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic)
-{
- drm_magic_entry_t *prev = NULL;
- drm_magic_entry_t *pt;
- int hash;
-
-
- DRM_DEBUG("%d\n", magic);
- hash = DRM(hash_magic)(magic);
-
- down(&dev->struct_sem);
- for (pt = dev->magiclist[hash].head; pt; prev = pt, pt = pt->next) {
- if (pt->magic == magic) {
- if (dev->magiclist[hash].head == pt) {
- dev->magiclist[hash].head = pt->next;
- }
- if (dev->magiclist[hash].tail == pt) {
- dev->magiclist[hash].tail = prev;
- }
- if (prev) {
- prev->next = pt->next;
- }
- up(&dev->struct_sem);
- return 0;
- }
- }
- up(&dev->struct_sem);
-
- DRM(free)(pt, sizeof(*pt), DRM_MEM_MAGIC);
-
- return -EINVAL;
-}
-
-/**
- * Get a unique magic number (ioctl).
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a resulting drm_auth structure.
- * \return zero on success, or a negative number on failure.
- *
- * If there is a magic number in drm_file::magic then use it, otherwise
- * searches an unique non-zero magic number and add it associating it with \p
- * filp.
- */
-int DRM(getmagic)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- static drm_magic_t sequence = 0;
- static spinlock_t lock = SPIN_LOCK_UNLOCKED;
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_auth_t auth;
-
- /* Find unique magic */
- if (priv->magic) {
- auth.magic = priv->magic;
- } else {
- do {
- spin_lock(&lock);
- if (!sequence) ++sequence; /* reserve 0 */
- auth.magic = sequence++;
- spin_unlock(&lock);
- } while (DRM(find_file)(dev, auth.magic));
- priv->magic = auth.magic;
- DRM(add_magic)(dev, priv, auth.magic);
- }
-
- DRM_DEBUG("%u\n", auth.magic);
- if (copy_to_user((drm_auth_t __user *)arg, &auth, sizeof(auth)))
- return -EFAULT;
- return 0;
-}
-
-/**
- * Authenticate with a magic.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_auth structure.
- * \return zero if authentication successed, or a negative number otherwise.
- *
- * Checks if \p filp is associated with the magic number passed in \arg.
- */
-int DRM(authmagic)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_auth_t auth;
- drm_file_t *file;
-
- if (copy_from_user(&auth, (drm_auth_t __user *)arg, sizeof(auth)))
- return -EFAULT;
- DRM_DEBUG("%u\n", auth.magic);
- if ((file = DRM(find_file)(dev, auth.magic))) {
- file->authenticated = 1;
- DRM(remove_magic)(dev, auth.magic);
- return 0;
- }
- return -EINVAL;
-}
+++ /dev/null
-/**
- * \file drm_bufs.h
- * Generic buffer template
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <linux/vmalloc.h>
-#include "drmP.h"
-
-/**
- * Compute size order. Returns the exponent of the smaller power of two which
- * is greater or equal to given number.
- *
- * \param size size.
- * \return order.
- *
- * \todo Can be made faster.
- */
-int DRM(order)( unsigned long size )
-{
- int order;
- unsigned long tmp;
-
- for (order = 0, tmp = size >> 1; tmp; tmp >>= 1, order++)
- ;
-
- if (size & (size - 1))
- ++order;
-
- return order;
-}
-
-/**
- * Ioctl to specify a range of memory that is available for mapping by a non-root process.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_map structure.
- * \return zero on success or a negative value on error.
- *
- * Adjusts the memory offset to its absolute value according to the mapping
- * type. Adds the map to the map list drm_device::maplist. Adds MTRR's where
- * applicable and if supported by the kernel.
- */
-int DRM(addmap)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_map_t *map;
- drm_map_t __user *argp = (void __user *)arg;
- drm_map_list_t *list;
-
- if ( !(filp->f_mode & 3) ) return -EACCES; /* Require read/write */
-
- map = DRM(alloc)( sizeof(*map), DRM_MEM_MAPS );
- if ( !map )
- return -ENOMEM;
-
- if ( copy_from_user( map, argp, sizeof(*map) ) ) {
- DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
- return -EFAULT;
- }
-
- /* Only allow shared memory to be removable since we only keep enough
- * book keeping information about shared memory to allow for removal
- * when processes fork.
- */
- if ( (map->flags & _DRM_REMOVABLE) && map->type != _DRM_SHM ) {
- DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
- return -EINVAL;
- }
- DRM_DEBUG( "offset = 0x%08lx, size = 0x%08lx, type = %d\n",
- map->offset, map->size, map->type );
- if ( (map->offset & (~PAGE_MASK)) || (map->size & (~PAGE_MASK)) ) {
- DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
- return -EINVAL;
- }
- map->mtrr = -1;
- map->handle = NULL;
-
- switch ( map->type ) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__)
- if ( map->offset + map->size < map->offset ||
- map->offset < virt_to_phys(high_memory) ) {
- DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
- return -EINVAL;
- }
-#endif
-#ifdef __alpha__
- map->offset += dev->hose->mem_space->start;
-#endif
- if (drm_core_has_MTRR(dev)) {
- if ( map->type == _DRM_FRAME_BUFFER ||
- (map->flags & _DRM_WRITE_COMBINING) ) {
- map->mtrr = mtrr_add( map->offset, map->size,
- MTRR_TYPE_WRCOMB, 1 );
- }
- }
- if (map->type == _DRM_REGISTERS)
- map->handle = DRM(ioremap)( map->offset, map->size,
- dev );
- break;
-
- case _DRM_SHM:
- map->handle = vmalloc_32(map->size);
- DRM_DEBUG( "%lu %d %p\n",
- map->size, DRM(order)( map->size ), map->handle );
- if ( !map->handle ) {
- DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
- return -ENOMEM;
- }
- map->offset = (unsigned long)map->handle;
- if ( map->flags & _DRM_CONTAINS_LOCK ) {
- /* Prevent a 2nd X Server from creating a 2nd lock */
- if (dev->lock.hw_lock != NULL) {
- vfree( map->handle );
- DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
- return -EBUSY;
- }
- dev->sigdata.lock =
- dev->lock.hw_lock = map->handle; /* Pointer to lock */
- }
- break;
- case _DRM_AGP:
- if (drm_core_has_AGP(dev)) {
-#ifdef __alpha__
- map->offset += dev->hose->mem_space->start;
-#endif
- map->offset += dev->agp->base;
- map->mtrr = dev->agp->agp_mtrr; /* for getmap */
- }
- break;
- case _DRM_SCATTER_GATHER:
- if (!dev->sg) {
- DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
- return -EINVAL;
- }
- map->offset += dev->sg->handle;
- break;
-
- default:
- DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
- return -EINVAL;
- }
-
- list = DRM(alloc)(sizeof(*list), DRM_MEM_MAPS);
- if(!list) {
- DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
- return -EINVAL;
- }
- memset(list, 0, sizeof(*list));
- list->map = map;
-
- down(&dev->struct_sem);
- list_add(&list->head, &dev->maplist->head);
- up(&dev->struct_sem);
-
- if ( copy_to_user( argp, map, sizeof(*map) ) )
- return -EFAULT;
- if ( map->type != _DRM_SHM ) {
- if ( copy_to_user( &argp->handle,
- &map->offset,
- sizeof(map->offset) ) )
- return -EFAULT;
- }
- return 0;
-}
-
-
-/**
- * Remove a map private from list and deallocate resources if the mapping
- * isn't in use.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_map_t structure.
- * \return zero on success or a negative value on error.
- *
- * Searches the map on drm_device::maplist, removes it from the list, see if
- * its being used, and free any associate resource (such as MTRR's) if it's not
- * being on use.
- *
- * \sa addmap().
- */
-int DRM(rmmap)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- struct list_head *list;
- drm_map_list_t *r_list = NULL;
- drm_vma_entry_t *pt, *prev;
- drm_map_t *map;
- drm_map_t request;
- int found_maps = 0;
-
- if (copy_from_user(&request, (drm_map_t __user *)arg,
- sizeof(request))) {
- return -EFAULT;
- }
-
- down(&dev->struct_sem);
- list = &dev->maplist->head;
- list_for_each(list, &dev->maplist->head) {
- r_list = list_entry(list, drm_map_list_t, head);
-
- if(r_list->map &&
- r_list->map->handle == request.handle &&
- r_list->map->flags & _DRM_REMOVABLE) break;
- }
-
- /* List has wrapped around to the head pointer, or its empty we didn't
- * find anything.
- */
- if(list == (&dev->maplist->head)) {
- up(&dev->struct_sem);
- return -EINVAL;
- }
- map = r_list->map;
- list_del(list);
- DRM(free)(list, sizeof(*list), DRM_MEM_MAPS);
-
- for (pt = dev->vmalist, prev = NULL; pt; prev = pt, pt = pt->next) {
- if (pt->vma->vm_private_data == map) found_maps++;
- }
-
- if(!found_maps) {
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
- if (drm_core_has_MTRR(dev)) {
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
- }
- DRM(ioremapfree)(map->handle, map->size, dev);
- break;
- case _DRM_SHM:
- vfree(map->handle);
- break;
- case _DRM_AGP:
- case _DRM_SCATTER_GATHER:
- break;
- }
- DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
- }
- up(&dev->struct_sem);
- return 0;
-}
-
-/**
- * Cleanup after an error on one of the addbufs() functions.
- *
- * \param entry buffer entry where the error occurred.
- *
- * Frees any pages and buffers associated with the given entry.
- */
-static void DRM(cleanup_buf_error)(drm_buf_entry_t *entry)
-{
- int i;
-
- if (entry->seg_count) {
- for (i = 0; i < entry->seg_count; i++) {
- if (entry->seglist[i]) {
- DRM(free_pages)(entry->seglist[i],
- entry->page_order,
- DRM_MEM_DMA);
- }
- }
- DRM(free)(entry->seglist,
- entry->seg_count *
- sizeof(*entry->seglist),
- DRM_MEM_SEGS);
-
- entry->seg_count = 0;
- }
-
- if (entry->buf_count) {
- for (i = 0; i < entry->buf_count; i++) {
- if (entry->buflist[i].dev_private) {
- DRM(free)(entry->buflist[i].dev_private,
- entry->buflist[i].dev_priv_size,
- DRM_MEM_BUFS);
- }
- }
- DRM(free)(entry->buflist,
- entry->buf_count *
- sizeof(*entry->buflist),
- DRM_MEM_BUFS);
-
- entry->buf_count = 0;
- }
-}
-
-#if __OS_HAS_AGP
-/**
- * Add AGP buffers for DMA transfers (ioctl).
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_buf_desc_t request.
- * \return zero on success or a negative number on failure.
- *
- * After some sanity checks creates a drm_buf structure for each buffer and
- * reallocates the buffer list of the same size order to accommodate the new
- * buffers.
- */
-int DRM(addbufs_agp)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_device_dma_t *dma = dev->dma;
- drm_buf_desc_t request;
- drm_buf_entry_t *entry;
- drm_buf_t *buf;
- unsigned long offset;
- unsigned long agp_offset;
- int count;
- int order;
- int size;
- int alignment;
- int page_order;
- int total;
- int byte_count;
- int i;
- drm_buf_t **temp_buflist;
- drm_buf_desc_t __user *argp = (void __user *)arg;
-
- if ( !dma ) return -EINVAL;
-
- if ( copy_from_user( &request, argp,
- sizeof(request) ) )
- return -EFAULT;
-
- count = request.count;
- order = DRM(order)( request.size );
- size = 1 << order;
-
- alignment = (request.flags & _DRM_PAGE_ALIGN)
- ? PAGE_ALIGN(size) : size;
- page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
- total = PAGE_SIZE << page_order;
-
- byte_count = 0;
- agp_offset = dev->agp->base + request.agp_start;
-
- DRM_DEBUG( "count: %d\n", count );
- DRM_DEBUG( "order: %d\n", order );
- DRM_DEBUG( "size: %d\n", size );
- DRM_DEBUG( "agp_offset: %lu\n", agp_offset );
- DRM_DEBUG( "alignment: %d\n", alignment );
- DRM_DEBUG( "page_order: %d\n", page_order );
- DRM_DEBUG( "total: %d\n", total );
-
- if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) return -EINVAL;
- if ( dev->queue_count ) return -EBUSY; /* Not while in use */
-
- spin_lock( &dev->count_lock );
- if ( dev->buf_use ) {
- spin_unlock( &dev->count_lock );
- return -EBUSY;
- }
- atomic_inc( &dev->buf_alloc );
- spin_unlock( &dev->count_lock );
-
- down( &dev->struct_sem );
- entry = &dma->bufs[order];
- if ( entry->buf_count ) {
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM; /* May only call once for each order */
- }
-
- if (count < 0 || count > 4096) {
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -EINVAL;
- }
-
- entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist),
- DRM_MEM_BUFS );
- if ( !entry->buflist ) {
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
- memset( entry->buflist, 0, count * sizeof(*entry->buflist) );
-
- entry->buf_size = size;
- entry->page_order = page_order;
-
- offset = 0;
-
- while ( entry->buf_count < count ) {
- buf = &entry->buflist[entry->buf_count];
- buf->idx = dma->buf_count + entry->buf_count;
- buf->total = alignment;
- buf->order = order;
- buf->used = 0;
-
- buf->offset = (dma->byte_count + offset);
- buf->bus_address = agp_offset + offset;
- buf->address = (void *)(agp_offset + offset);
- buf->next = NULL;
- buf->waiting = 0;
- buf->pending = 0;
- init_waitqueue_head( &buf->dma_wait );
- buf->filp = NULL;
-
- buf->dev_priv_size = dev->dev_priv_size;
- buf->dev_private = DRM(alloc)( buf->dev_priv_size,
- DRM_MEM_BUFS );
- if(!buf->dev_private) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- DRM(cleanup_buf_error)(entry);
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
- memset( buf->dev_private, 0, buf->dev_priv_size );
-
- DRM_DEBUG( "buffer %d @ %p\n",
- entry->buf_count, buf->address );
-
- offset += alignment;
- entry->buf_count++;
- byte_count += PAGE_SIZE << page_order;
- }
-
- DRM_DEBUG( "byte_count: %d\n", byte_count );
-
- temp_buflist = DRM(realloc)( dma->buflist,
- dma->buf_count * sizeof(*dma->buflist),
- (dma->buf_count + entry->buf_count)
- * sizeof(*dma->buflist),
- DRM_MEM_BUFS );
- if(!temp_buflist) {
- /* Free the entry because it isn't valid */
- DRM(cleanup_buf_error)(entry);
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
- dma->buflist = temp_buflist;
-
- for ( i = 0 ; i < entry->buf_count ; i++ ) {
- dma->buflist[i + dma->buf_count] = &entry->buflist[i];
- }
-
- dma->buf_count += entry->buf_count;
- dma->byte_count += byte_count;
-
- DRM_DEBUG( "dma->buf_count : %d\n", dma->buf_count );
- DRM_DEBUG( "entry->buf_count : %d\n", entry->buf_count );
-
- up( &dev->struct_sem );
-
- request.count = entry->buf_count;
- request.size = size;
-
- if ( copy_to_user( argp, &request, sizeof(request) ) )
- return -EFAULT;
-
- dma->flags = _DRM_DMA_USE_AGP;
-
- atomic_dec( &dev->buf_alloc );
- return 0;
-}
-#endif /* __OS_HAS_AGP */
-
-int DRM(addbufs_pci)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_device_dma_t *dma = dev->dma;
- drm_buf_desc_t request;
- int count;
- int order;
- int size;
- int total;
- int page_order;
- drm_buf_entry_t *entry;
- unsigned long page;
- drm_buf_t *buf;
- int alignment;
- unsigned long offset;
- int i;
- int byte_count;
- int page_count;
- unsigned long *temp_pagelist;
- drm_buf_t **temp_buflist;
- drm_buf_desc_t __user *argp = (void __user *)arg;
-
- if (!drm_core_check_feature(dev, DRIVER_PCI_DMA)) return -EINVAL;
- if ( !dma ) return -EINVAL;
-
- if ( copy_from_user( &request, argp, sizeof(request) ) )
- return -EFAULT;
-
- count = request.count;
- order = DRM(order)( request.size );
- size = 1 << order;
-
- DRM_DEBUG( "count=%d, size=%d (%d), order=%d, queue_count=%d\n",
- request.count, request.size, size,
- order, dev->queue_count );
-
- if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) return -EINVAL;
- if ( dev->queue_count ) return -EBUSY; /* Not while in use */
-
- alignment = (request.flags & _DRM_PAGE_ALIGN)
- ? PAGE_ALIGN(size) : size;
- page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
- total = PAGE_SIZE << page_order;
-
- spin_lock( &dev->count_lock );
- if ( dev->buf_use ) {
- spin_unlock( &dev->count_lock );
- return -EBUSY;
- }
- atomic_inc( &dev->buf_alloc );
- spin_unlock( &dev->count_lock );
-
- down( &dev->struct_sem );
- entry = &dma->bufs[order];
- if ( entry->buf_count ) {
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM; /* May only call once for each order */
- }
-
- if (count < 0 || count > 4096) {
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -EINVAL;
- }
-
- entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist),
- DRM_MEM_BUFS );
- if ( !entry->buflist ) {
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
- memset( entry->buflist, 0, count * sizeof(*entry->buflist) );
-
- entry->seglist = DRM(alloc)( count * sizeof(*entry->seglist),
- DRM_MEM_SEGS );
- if ( !entry->seglist ) {
- DRM(free)( entry->buflist,
- count * sizeof(*entry->buflist),
- DRM_MEM_BUFS );
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
- memset( entry->seglist, 0, count * sizeof(*entry->seglist) );
-
- /* Keep the original pagelist until we know all the allocations
- * have succeeded
- */
- temp_pagelist = DRM(alloc)( (dma->page_count + (count << page_order))
- * sizeof(*dma->pagelist),
- DRM_MEM_PAGES );
- if (!temp_pagelist) {
- DRM(free)( entry->buflist,
- count * sizeof(*entry->buflist),
- DRM_MEM_BUFS );
- DRM(free)( entry->seglist,
- count * sizeof(*entry->seglist),
- DRM_MEM_SEGS );
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
- memcpy(temp_pagelist,
- dma->pagelist,
- dma->page_count * sizeof(*dma->pagelist));
- DRM_DEBUG( "pagelist: %d entries\n",
- dma->page_count + (count << page_order) );
-
- entry->buf_size = size;
- entry->page_order = page_order;
- byte_count = 0;
- page_count = 0;
-
- while ( entry->buf_count < count ) {
- page = DRM(alloc_pages)( page_order, DRM_MEM_DMA );
- if ( !page ) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- entry->seg_count = count;
- DRM(cleanup_buf_error)(entry);
- DRM(free)( temp_pagelist,
- (dma->page_count + (count << page_order))
- * sizeof(*dma->pagelist),
- DRM_MEM_PAGES );
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
- entry->seglist[entry->seg_count++] = page;
- for ( i = 0 ; i < (1 << page_order) ; i++ ) {
- DRM_DEBUG( "page %d @ 0x%08lx\n",
- dma->page_count + page_count,
- page + PAGE_SIZE * i );
- temp_pagelist[dma->page_count + page_count++]
- = page + PAGE_SIZE * i;
- }
- for ( offset = 0 ;
- offset + size <= total && entry->buf_count < count ;
- offset += alignment, ++entry->buf_count ) {
- buf = &entry->buflist[entry->buf_count];
- buf->idx = dma->buf_count + entry->buf_count;
- buf->total = alignment;
- buf->order = order;
- buf->used = 0;
- buf->offset = (dma->byte_count + byte_count + offset);
- buf->address = (void *)(page + offset);
- buf->next = NULL;
- buf->waiting = 0;
- buf->pending = 0;
- init_waitqueue_head( &buf->dma_wait );
- buf->filp = NULL;
-
- buf->dev_priv_size = dev->dev_priv_size;
- buf->dev_private = DRM(alloc)( dev->dev_priv_size,
- DRM_MEM_BUFS );
- if(!buf->dev_private) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- entry->seg_count = count;
- DRM(cleanup_buf_error)(entry);
- DRM(free)( temp_pagelist,
- (dma->page_count + (count << page_order))
- * sizeof(*dma->pagelist),
- DRM_MEM_PAGES );
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
- memset( buf->dev_private, 0, buf->dev_priv_size );
-
- DRM_DEBUG( "buffer %d @ %p\n",
- entry->buf_count, buf->address );
- }
- byte_count += PAGE_SIZE << page_order;
- }
-
- temp_buflist = DRM(realloc)( dma->buflist,
- dma->buf_count * sizeof(*dma->buflist),
- (dma->buf_count + entry->buf_count)
- * sizeof(*dma->buflist),
- DRM_MEM_BUFS );
- if (!temp_buflist) {
- /* Free the entry because it isn't valid */
- DRM(cleanup_buf_error)(entry);
- DRM(free)( temp_pagelist,
- (dma->page_count + (count << page_order))
- * sizeof(*dma->pagelist),
- DRM_MEM_PAGES );
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
- dma->buflist = temp_buflist;
-
- for ( i = 0 ; i < entry->buf_count ; i++ ) {
- dma->buflist[i + dma->buf_count] = &entry->buflist[i];
- }
-
- /* No allocations failed, so now we can replace the orginal pagelist
- * with the new one.
- */
- if (dma->page_count) {
- DRM(free)(dma->pagelist,
- dma->page_count * sizeof(*dma->pagelist),
- DRM_MEM_PAGES);
- }
- dma->pagelist = temp_pagelist;
-
- dma->buf_count += entry->buf_count;
- dma->seg_count += entry->seg_count;
- dma->page_count += entry->seg_count << page_order;
- dma->byte_count += PAGE_SIZE * (entry->seg_count << page_order);
-
- up( &dev->struct_sem );
-
- request.count = entry->buf_count;
- request.size = size;
-
- if ( copy_to_user( argp, &request, sizeof(request) ) )
- return -EFAULT;
-
- atomic_dec( &dev->buf_alloc );
- return 0;
-
-}
-
-int DRM(addbufs_sg)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_device_dma_t *dma = dev->dma;
- drm_buf_desc_t __user *argp = (void __user *)arg;
- drm_buf_desc_t request;
- drm_buf_entry_t *entry;
- drm_buf_t *buf;
- unsigned long offset;
- unsigned long agp_offset;
- int count;
- int order;
- int size;
- int alignment;
- int page_order;
- int total;
- int byte_count;
- int i;
- drm_buf_t **temp_buflist;
-
- if (!drm_core_check_feature(dev, DRIVER_SG)) return -EINVAL;
-
- if ( !dma ) return -EINVAL;
-
- if ( copy_from_user( &request, argp, sizeof(request) ) )
- return -EFAULT;
-
- count = request.count;
- order = DRM(order)( request.size );
- size = 1 << order;
-
- alignment = (request.flags & _DRM_PAGE_ALIGN)
- ? PAGE_ALIGN(size) : size;
- page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
- total = PAGE_SIZE << page_order;
-
- byte_count = 0;
- agp_offset = request.agp_start;
-
- DRM_DEBUG( "count: %d\n", count );
- DRM_DEBUG( "order: %d\n", order );
- DRM_DEBUG( "size: %d\n", size );
- DRM_DEBUG( "agp_offset: %lu\n", agp_offset );
- DRM_DEBUG( "alignment: %d\n", alignment );
- DRM_DEBUG( "page_order: %d\n", page_order );
- DRM_DEBUG( "total: %d\n", total );
-
- if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) return -EINVAL;
- if ( dev->queue_count ) return -EBUSY; /* Not while in use */
-
- spin_lock( &dev->count_lock );
- if ( dev->buf_use ) {
- spin_unlock( &dev->count_lock );
- return -EBUSY;
- }
- atomic_inc( &dev->buf_alloc );
- spin_unlock( &dev->count_lock );
-
- down( &dev->struct_sem );
- entry = &dma->bufs[order];
- if ( entry->buf_count ) {
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM; /* May only call once for each order */
- }
-
- if (count < 0 || count > 4096) {
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -EINVAL;
- }
-
- entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist),
- DRM_MEM_BUFS );
- if ( !entry->buflist ) {
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
- memset( entry->buflist, 0, count * sizeof(*entry->buflist) );
-
- entry->buf_size = size;
- entry->page_order = page_order;
-
- offset = 0;
-
- while ( entry->buf_count < count ) {
- buf = &entry->buflist[entry->buf_count];
- buf->idx = dma->buf_count + entry->buf_count;
- buf->total = alignment;
- buf->order = order;
- buf->used = 0;
-
- buf->offset = (dma->byte_count + offset);
- buf->bus_address = agp_offset + offset;
- buf->address = (void *)(agp_offset + offset + dev->sg->handle);
- buf->next = NULL;
- buf->waiting = 0;
- buf->pending = 0;
- init_waitqueue_head( &buf->dma_wait );
- buf->filp = NULL;
-
- buf->dev_priv_size = dev->dev_priv_size;
- buf->dev_private = DRM(alloc)( dev->dev_priv_size,
- DRM_MEM_BUFS );
- if(!buf->dev_private) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- DRM(cleanup_buf_error)(entry);
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
-
- memset( buf->dev_private, 0, buf->dev_priv_size );
-
- DRM_DEBUG( "buffer %d @ %p\n",
- entry->buf_count, buf->address );
-
- offset += alignment;
- entry->buf_count++;
- byte_count += PAGE_SIZE << page_order;
- }
-
- DRM_DEBUG( "byte_count: %d\n", byte_count );
-
- temp_buflist = DRM(realloc)( dma->buflist,
- dma->buf_count * sizeof(*dma->buflist),
- (dma->buf_count + entry->buf_count)
- * sizeof(*dma->buflist),
- DRM_MEM_BUFS );
- if(!temp_buflist) {
- /* Free the entry because it isn't valid */
- DRM(cleanup_buf_error)(entry);
- up( &dev->struct_sem );
- atomic_dec( &dev->buf_alloc );
- return -ENOMEM;
- }
- dma->buflist = temp_buflist;
-
- for ( i = 0 ; i < entry->buf_count ; i++ ) {
- dma->buflist[i + dma->buf_count] = &entry->buflist[i];
- }
-
- dma->buf_count += entry->buf_count;
- dma->byte_count += byte_count;
-
- DRM_DEBUG( "dma->buf_count : %d\n", dma->buf_count );
- DRM_DEBUG( "entry->buf_count : %d\n", entry->buf_count );
-
- up( &dev->struct_sem );
-
- request.count = entry->buf_count;
- request.size = size;
-
- if ( copy_to_user( argp, &request, sizeof(request) ) )
- return -EFAULT;
-
- dma->flags = _DRM_DMA_USE_SG;
-
- atomic_dec( &dev->buf_alloc );
- return 0;
-}
-
-/**
- * Add buffers for DMA transfers (ioctl).
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_buf_desc_t request.
- * \return zero on success or a negative number on failure.
- *
- * According with the memory type specified in drm_buf_desc::flags and the
- * build options, it dispatches the call either to addbufs_agp(),
- * addbufs_sg() or addbufs_pci() for AGP, scatter-gather or consistent
- * PCI memory respectively.
- */
-int DRM(addbufs)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_buf_desc_t request;
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- return -EINVAL;
-
- if ( copy_from_user( &request, (drm_buf_desc_t __user *)arg,
- sizeof(request) ) )
- return -EFAULT;
-
-#if __OS_HAS_AGP
- if ( request.flags & _DRM_AGP_BUFFER )
- return DRM(addbufs_agp)( inode, filp, cmd, arg );
- else
-#endif
- if ( request.flags & _DRM_SG_BUFFER )
- return DRM(addbufs_sg)( inode, filp, cmd, arg );
- else
- return DRM(addbufs_pci)( inode, filp, cmd, arg );
-}
-
-
-/**
- * Get information about the buffer mappings.
- *
- * This was originally mean for debugging purposes, or by a sophisticated
- * client library to determine how best to use the available buffers (e.g.,
- * large buffers can be used for image transfer).
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_buf_info structure.
- * \return zero on success or a negative number on failure.
- *
- * Increments drm_device::buf_use while holding the drm_device::count_lock
- * lock, preventing of allocating more buffers after this call. Information
- * about each requested buffer is then copied into user space.
- */
-int DRM(infobufs)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_device_dma_t *dma = dev->dma;
- drm_buf_info_t request;
- drm_buf_info_t __user *argp = (void __user *)arg;
- int i;
- int count;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- return -EINVAL;
-
- if ( !dma ) return -EINVAL;
-
- spin_lock( &dev->count_lock );
- if ( atomic_read( &dev->buf_alloc ) ) {
- spin_unlock( &dev->count_lock );
- return -EBUSY;
- }
- ++dev->buf_use; /* Can't allocate more after this call */
- spin_unlock( &dev->count_lock );
-
- if ( copy_from_user( &request, argp, sizeof(request) ) )
- return -EFAULT;
-
- for ( i = 0, count = 0 ; i < DRM_MAX_ORDER + 1 ; i++ ) {
- if ( dma->bufs[i].buf_count ) ++count;
- }
-
- DRM_DEBUG( "count = %d\n", count );
-
- if ( request.count >= count ) {
- for ( i = 0, count = 0 ; i < DRM_MAX_ORDER + 1 ; i++ ) {
- if ( dma->bufs[i].buf_count ) {
- drm_buf_desc_t __user *to = &request.list[count];
- drm_buf_entry_t *from = &dma->bufs[i];
- drm_freelist_t *list = &dma->bufs[i].freelist;
- if ( copy_to_user( &to->count,
- &from->buf_count,
- sizeof(from->buf_count) ) ||
- copy_to_user( &to->size,
- &from->buf_size,
- sizeof(from->buf_size) ) ||
- copy_to_user( &to->low_mark,
- &list->low_mark,
- sizeof(list->low_mark) ) ||
- copy_to_user( &to->high_mark,
- &list->high_mark,
- sizeof(list->high_mark) ) )
- return -EFAULT;
-
- DRM_DEBUG( "%d %d %d %d %d\n",
- i,
- dma->bufs[i].buf_count,
- dma->bufs[i].buf_size,
- dma->bufs[i].freelist.low_mark,
- dma->bufs[i].freelist.high_mark );
- ++count;
- }
- }
- }
- request.count = count;
-
- if ( copy_to_user( argp, &request, sizeof(request) ) )
- return -EFAULT;
-
- return 0;
-}
-
-/**
- * Specifies a low and high water mark for buffer allocation
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg a pointer to a drm_buf_desc structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies that the size order is bounded between the admissible orders and
- * updates the respective drm_device_dma::bufs entry low and high water mark.
- *
- * \note This ioctl is deprecated and mostly never used.
- */
-int DRM(markbufs)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_device_dma_t *dma = dev->dma;
- drm_buf_desc_t request;
- int order;
- drm_buf_entry_t *entry;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- return -EINVAL;
-
- if ( !dma ) return -EINVAL;
-
- if ( copy_from_user( &request,
- (drm_buf_desc_t __user *)arg,
- sizeof(request) ) )
- return -EFAULT;
-
- DRM_DEBUG( "%d, %d, %d\n",
- request.size, request.low_mark, request.high_mark );
- order = DRM(order)( request.size );
- if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) return -EINVAL;
- entry = &dma->bufs[order];
-
- if ( request.low_mark < 0 || request.low_mark > entry->buf_count )
- return -EINVAL;
- if ( request.high_mark < 0 || request.high_mark > entry->buf_count )
- return -EINVAL;
-
- entry->freelist.low_mark = request.low_mark;
- entry->freelist.high_mark = request.high_mark;
-
- return 0;
-}
-
-/**
- * Unreserve the buffers in list, previously reserved using drmDMA.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_buf_free structure.
- * \return zero on success or a negative number on failure.
- *
- * Calls free_buffer() for each used buffer.
- * This function is primarily used for debugging.
- */
-int DRM(freebufs)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_device_dma_t *dma = dev->dma;
- drm_buf_free_t request;
- int i;
- int idx;
- drm_buf_t *buf;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- return -EINVAL;
-
- if ( !dma ) return -EINVAL;
-
- if ( copy_from_user( &request,
- (drm_buf_free_t __user *)arg,
- sizeof(request) ) )
- return -EFAULT;
-
- DRM_DEBUG( "%d\n", request.count );
- for ( i = 0 ; i < request.count ; i++ ) {
- if ( copy_from_user( &idx,
- &request.list[i],
- sizeof(idx) ) )
- return -EFAULT;
- if ( idx < 0 || idx >= dma->buf_count ) {
- DRM_ERROR( "Index %d (of %d max)\n",
- idx, dma->buf_count - 1 );
- return -EINVAL;
- }
- buf = dma->buflist[idx];
- if ( buf->filp != filp ) {
- DRM_ERROR( "Process %d freeing buffer not owned\n",
- current->pid );
- return -EINVAL;
- }
- DRM(free_buffer)( dev, buf );
- }
-
- return 0;
-}
-
-/**
- * Maps all of the DMA buffers into client-virtual space (ioctl).
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg pointer to a drm_buf_map structure.
- * \return zero on success or a negative number on failure.
- *
- * Maps the AGP or SG buffer region with do_mmap(), and copies information
- * about each buffer into user space. The PCI buffers are already mapped on the
- * addbufs_pci() call.
- */
-int DRM(mapbufs)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_device_dma_t *dma = dev->dma;
- drm_buf_map_t __user *argp = (void __user *)arg;
- int retcode = 0;
- const int zero = 0;
- unsigned long virtual;
- unsigned long address;
- drm_buf_map_t request;
- int i;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- return -EINVAL;
-
- if ( !dma ) return -EINVAL;
-
- spin_lock( &dev->count_lock );
- if ( atomic_read( &dev->buf_alloc ) ) {
- spin_unlock( &dev->count_lock );
- return -EBUSY;
- }
- dev->buf_use++; /* Can't allocate more after this call */
- spin_unlock( &dev->count_lock );
-
- if ( copy_from_user( &request, argp, sizeof(request) ) )
- return -EFAULT;
-
- if ( request.count >= dma->buf_count ) {
- if ((drm_core_has_AGP(dev) && (dma->flags & _DRM_DMA_USE_AGP)) ||
- (drm_core_check_feature(dev, DRIVER_SG) && (dma->flags & _DRM_DMA_USE_SG)) ) {
- drm_map_t *map = dev->agp_buffer_map;
-
- if ( !map ) {
- retcode = -EINVAL;
- goto done;
- }
-
-#if LINUX_VERSION_CODE <= 0x020402
- down( ¤t->mm->mmap_sem );
-#else
- down_write( ¤t->mm->mmap_sem );
-#endif
- virtual = do_mmap( filp, 0, map->size,
- PROT_READ | PROT_WRITE,
- MAP_SHARED,
- (unsigned long)map->offset );
-#if LINUX_VERSION_CODE <= 0x020402
- up( ¤t->mm->mmap_sem );
-#else
- up_write( ¤t->mm->mmap_sem );
-#endif
- } else {
-#if LINUX_VERSION_CODE <= 0x020402
- down( ¤t->mm->mmap_sem );
-#else
- down_write( ¤t->mm->mmap_sem );
-#endif
- virtual = do_mmap( filp, 0, dma->byte_count,
- PROT_READ | PROT_WRITE,
- MAP_SHARED, 0 );
-#if LINUX_VERSION_CODE <= 0x020402
- up( ¤t->mm->mmap_sem );
-#else
- up_write( ¤t->mm->mmap_sem );
-#endif
- }
- if ( virtual > -1024UL ) {
- /* Real error */
- retcode = (signed long)virtual;
- goto done;
- }
- request.virtual = (void __user *)virtual;
-
- for ( i = 0 ; i < dma->buf_count ; i++ ) {
- if ( copy_to_user( &request.list[i].idx,
- &dma->buflist[i]->idx,
- sizeof(request.list[0].idx) ) ) {
- retcode = -EFAULT;
- goto done;
- }
- if ( copy_to_user( &request.list[i].total,
- &dma->buflist[i]->total,
- sizeof(request.list[0].total) ) ) {
- retcode = -EFAULT;
- goto done;
- }
- if ( copy_to_user( &request.list[i].used,
- &zero,
- sizeof(zero) ) ) {
- retcode = -EFAULT;
- goto done;
- }
- address = virtual + dma->buflist[i]->offset; /* *** */
- if ( copy_to_user( &request.list[i].address,
- &address,
- sizeof(address) ) ) {
- retcode = -EFAULT;
- goto done;
- }
- }
- }
- done:
- request.count = dma->buf_count;
- DRM_DEBUG( "%d buffers, retcode = %d\n", request.count, retcode );
-
- if ( copy_to_user( argp, &request, sizeof(request) ) )
- return -EFAULT;
-
- return retcode;
-}
-
+++ /dev/null
-/**
- * \file drm_context.h
- * IOCTLs for generic contexts
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Fri Nov 24 18:31:37 2000 by gareth@valinux.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * ChangeLog:
- * 2001-11-16 Torsten Duwe <duwe@caldera.de>
- * added context constructor/destructor hooks,
- * needed by SiS driver's memory management.
- */
-
-#include "drmP.h"
-
-/******************************************************************/
-/** \name Context bitmap support */
-/*@{*/
-
-/**
- * Free a handle from the context bitmap.
- *
- * \param dev DRM device.
- * \param ctx_handle context handle.
- *
- * Clears the bit specified by \p ctx_handle in drm_device::ctx_bitmap and the entry
- * in drm_device::context_sareas, while holding the drm_device::struct_sem
- * lock.
- */
-void DRM(ctxbitmap_free)( drm_device_t *dev, int ctx_handle )
-{
- if ( ctx_handle < 0 ) goto failed;
- if ( !dev->ctx_bitmap ) goto failed;
-
- if ( ctx_handle < DRM_MAX_CTXBITMAP ) {
- down(&dev->struct_sem);
- clear_bit( ctx_handle, dev->ctx_bitmap );
- dev->context_sareas[ctx_handle] = NULL;
- up(&dev->struct_sem);
- return;
- }
-failed:
- DRM_ERROR( "Attempt to free invalid context handle: %d\n",
- ctx_handle );
- return;
-}
-
-/**
- * Context bitmap allocation.
- *
- * \param dev DRM device.
- * \return (non-negative) context handle on success or a negative number on failure.
- *
- * Find the first zero bit in drm_device::ctx_bitmap and (re)allocates
- * drm_device::context_sareas to accommodate the new entry while holding the
- * drm_device::struct_sem lock.
- */
-int DRM(ctxbitmap_next)( drm_device_t *dev )
-{
- int bit;
-
- if(!dev->ctx_bitmap) return -1;
-
- down(&dev->struct_sem);
- bit = find_first_zero_bit( dev->ctx_bitmap, DRM_MAX_CTXBITMAP );
- if ( bit < DRM_MAX_CTXBITMAP ) {
- set_bit( bit, dev->ctx_bitmap );
- DRM_DEBUG( "drm_ctxbitmap_next bit : %d\n", bit );
- if((bit+1) > dev->max_context) {
- dev->max_context = (bit+1);
- if(dev->context_sareas) {
- drm_map_t **ctx_sareas;
-
- ctx_sareas = DRM(realloc)(dev->context_sareas,
- (dev->max_context - 1) *
- sizeof(*dev->context_sareas),
- dev->max_context *
- sizeof(*dev->context_sareas),
- DRM_MEM_MAPS);
- if(!ctx_sareas) {
- clear_bit(bit, dev->ctx_bitmap);
- up(&dev->struct_sem);
- return -1;
- }
- dev->context_sareas = ctx_sareas;
- dev->context_sareas[bit] = NULL;
- } else {
- /* max_context == 1 at this point */
- dev->context_sareas = DRM(alloc)(
- dev->max_context *
- sizeof(*dev->context_sareas),
- DRM_MEM_MAPS);
- if(!dev->context_sareas) {
- clear_bit(bit, dev->ctx_bitmap);
- up(&dev->struct_sem);
- return -1;
- }
- dev->context_sareas[bit] = NULL;
- }
- }
- up(&dev->struct_sem);
- return bit;
- }
- up(&dev->struct_sem);
- return -1;
-}
-
-/**
- * Context bitmap initialization.
- *
- * \param dev DRM device.
- *
- * Allocates and initialize drm_device::ctx_bitmap and drm_device::context_sareas, while holding
- * the drm_device::struct_sem lock.
- */
-int DRM(ctxbitmap_init)( drm_device_t *dev )
-{
- int i;
- int temp;
-
- down(&dev->struct_sem);
- dev->ctx_bitmap = (unsigned long *) DRM(alloc)( PAGE_SIZE,
- DRM_MEM_CTXBITMAP );
- if ( dev->ctx_bitmap == NULL ) {
- up(&dev->struct_sem);
- return -ENOMEM;
- }
- memset( (void *)dev->ctx_bitmap, 0, PAGE_SIZE );
- dev->context_sareas = NULL;
- dev->max_context = -1;
- up(&dev->struct_sem);
-
- for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) {
- temp = DRM(ctxbitmap_next)( dev );
- DRM_DEBUG( "drm_ctxbitmap_init : %d\n", temp );
- }
-
- return 0;
-}
-
-/**
- * Context bitmap cleanup.
- *
- * \param dev DRM device.
- *
- * Frees drm_device::ctx_bitmap and drm_device::context_sareas, while holding
- * the drm_device::struct_sem lock.
- */
-void DRM(ctxbitmap_cleanup)( drm_device_t *dev )
-{
- down(&dev->struct_sem);
- if( dev->context_sareas ) DRM(free)( dev->context_sareas,
- sizeof(*dev->context_sareas) *
- dev->max_context,
- DRM_MEM_MAPS );
- DRM(free)( (void *)dev->ctx_bitmap, PAGE_SIZE, DRM_MEM_CTXBITMAP );
- up(&dev->struct_sem);
-}
-
-/*@}*/
-
-/******************************************************************/
-/** \name Per Context SAREA Support */
-/*@{*/
-
-/**
- * Get per-context SAREA.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx_priv_map structure.
- * \return zero on success or a negative number on failure.
- *
- * Gets the map from drm_device::context_sareas with the handle specified and
- * returns its handle.
- */
-int DRM(getsareactx)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_ctx_priv_map_t __user *argp = (void __user *)arg;
- drm_ctx_priv_map_t request;
- drm_map_t *map;
-
- if (copy_from_user(&request, argp, sizeof(request)))
- return -EFAULT;
-
- down(&dev->struct_sem);
- if (dev->max_context < 0 || request.ctx_id >= (unsigned) dev->max_context) {
- up(&dev->struct_sem);
- return -EINVAL;
- }
-
- map = dev->context_sareas[request.ctx_id];
- up(&dev->struct_sem);
-
- request.handle = map->handle;
- if (copy_to_user(argp, &request, sizeof(request)))
- return -EFAULT;
- return 0;
-}
-
-/**
- * Set per-context SAREA.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx_priv_map structure.
- * \return zero on success or a negative number on failure.
- *
- * Searches the mapping specified in \p arg and update the entry in
- * drm_device::context_sareas with it.
- */
-int DRM(setsareactx)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_ctx_priv_map_t request;
- drm_map_t *map = NULL;
- drm_map_list_t *r_list = NULL;
- struct list_head *list;
-
- if (copy_from_user(&request,
- (drm_ctx_priv_map_t __user *)arg,
- sizeof(request)))
- return -EFAULT;
-
- down(&dev->struct_sem);
- list_for_each(list, &dev->maplist->head) {
- r_list = list_entry(list, drm_map_list_t, head);
- if(r_list->map &&
- r_list->map->handle == request.handle)
- goto found;
- }
-bad:
- up(&dev->struct_sem);
- return -EINVAL;
-
-found:
- map = r_list->map;
- if (!map) goto bad;
- if (dev->max_context < 0)
- goto bad;
- if (request.ctx_id >= (unsigned) dev->max_context)
- goto bad;
- dev->context_sareas[request.ctx_id] = map;
- up(&dev->struct_sem);
- return 0;
-}
-
-/*@}*/
-
-/******************************************************************/
-/** \name The actual DRM context handling routines */
-/*@{*/
-
-/**
- * Switch context.
- *
- * \param dev DRM device.
- * \param old old context handle.
- * \param new new context handle.
- * \return zero on success or a negative number on failure.
- *
- * Attempt to set drm_device::context_flag.
- */
-int DRM(context_switch)( drm_device_t *dev, int old, int new )
-{
- if ( test_and_set_bit( 0, &dev->context_flag ) ) {
- DRM_ERROR( "Reentering -- FIXME\n" );
- return -EBUSY;
- }
-
-
- DRM_DEBUG( "Context switch from %d to %d\n", old, new );
-
- if ( new == dev->last_context ) {
- clear_bit( 0, &dev->context_flag );
- return 0;
- }
-
- return 0;
-}
-
-/**
- * Complete context switch.
- *
- * \param dev DRM device.
- * \param new new context handle.
- * \return zero on success or a negative number on failure.
- *
- * Updates drm_device::last_context and drm_device::last_switch. Verifies the
- * hardware lock is held, clears the drm_device::context_flag and wakes up
- * drm_device::context_wait.
- */
-int DRM(context_switch_complete)( drm_device_t *dev, int new )
-{
- dev->last_context = new; /* PRE/POST: This is the _only_ writer. */
- dev->last_switch = jiffies;
-
- if ( !_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) ) {
- DRM_ERROR( "Lock isn't held after context switch\n" );
- }
-
- /* If a context switch is ever initiated
- when the kernel holds the lock, release
- that lock here. */
- clear_bit( 0, &dev->context_flag );
- wake_up( &dev->context_wait );
-
- return 0;
-}
-
-/**
- * Reserve contexts.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx_res structure.
- * \return zero on success or a negative number on failure.
- */
-int DRM(resctx)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_ctx_res_t res;
- drm_ctx_t __user *argp = (void __user *)arg;
- drm_ctx_t ctx;
- int i;
-
- if ( copy_from_user( &res, argp, sizeof(res) ) )
- return -EFAULT;
-
- if ( res.count >= DRM_RESERVED_CONTEXTS ) {
- memset( &ctx, 0, sizeof(ctx) );
- for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) {
- ctx.handle = i;
- if ( copy_to_user( &res.contexts[i],
- &i, sizeof(i) ) )
- return -EFAULT;
- }
- }
- res.count = DRM_RESERVED_CONTEXTS;
-
- if ( copy_to_user( argp, &res, sizeof(res) ) )
- return -EFAULT;
- return 0;
-}
-
-/**
- * Add context.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx structure.
- * \return zero on success or a negative number on failure.
- *
- * Get a new handle for the context and copy to userspace.
- */
-int DRM(addctx)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_ctx_list_t * ctx_entry;
- drm_ctx_t __user *argp = (void __user *)arg;
- drm_ctx_t ctx;
-
- if ( copy_from_user( &ctx, argp, sizeof(ctx) ) )
- return -EFAULT;
-
- ctx.handle = DRM(ctxbitmap_next)( dev );
- if ( ctx.handle == DRM_KERNEL_CONTEXT ) {
- /* Skip kernel's context and get a new one. */
- ctx.handle = DRM(ctxbitmap_next)( dev );
- }
- DRM_DEBUG( "%d\n", ctx.handle );
- if ( ctx.handle == -1 ) {
- DRM_DEBUG( "Not enough free contexts.\n" );
- /* Should this return -EBUSY instead? */
- return -ENOMEM;
- }
-
- if ( ctx.handle != DRM_KERNEL_CONTEXT )
- {
- if (dev->fn_tbl.context_ctor)
- dev->fn_tbl.context_ctor(dev, ctx.handle);
- }
-
- ctx_entry = DRM(alloc)( sizeof(*ctx_entry), DRM_MEM_CTXLIST );
- if ( !ctx_entry ) {
- DRM_DEBUG("out of memory\n");
- return -ENOMEM;
- }
-
- INIT_LIST_HEAD( &ctx_entry->head );
- ctx_entry->handle = ctx.handle;
- ctx_entry->tag = priv;
-
- down( &dev->ctxlist_sem );
- list_add( &ctx_entry->head, &dev->ctxlist->head );
- ++dev->ctx_count;
- up( &dev->ctxlist_sem );
-
- if ( copy_to_user( argp, &ctx, sizeof(ctx) ) )
- return -EFAULT;
- return 0;
-}
-
-int DRM(modctx)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- /* This does nothing */
- return 0;
-}
-
-/**
- * Get context.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx structure.
- * \return zero on success or a negative number on failure.
- */
-int DRM(getctx)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_ctx_t __user *argp = (void __user *)arg;
- drm_ctx_t ctx;
-
- if ( copy_from_user( &ctx, argp, sizeof(ctx) ) )
- return -EFAULT;
-
- /* This is 0, because we don't handle any context flags */
- ctx.flags = 0;
-
- if ( copy_to_user( argp, &ctx, sizeof(ctx) ) )
- return -EFAULT;
- return 0;
-}
-
-/**
- * Switch context.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx structure.
- * \return zero on success or a negative number on failure.
- *
- * Calls context_switch().
- */
-int DRM(switchctx)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_ctx_t ctx;
-
- if ( copy_from_user( &ctx, (drm_ctx_t __user *)arg, sizeof(ctx) ) )
- return -EFAULT;
-
- DRM_DEBUG( "%d\n", ctx.handle );
- return DRM(context_switch)( dev, dev->last_context, ctx.handle );
-}
-
-/**
- * New context.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx structure.
- * \return zero on success or a negative number on failure.
- *
- * Calls context_switch_complete().
- */
-int DRM(newctx)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_ctx_t ctx;
-
- if ( copy_from_user( &ctx, (drm_ctx_t __user *)arg, sizeof(ctx) ) )
- return -EFAULT;
-
- DRM_DEBUG( "%d\n", ctx.handle );
- DRM(context_switch_complete)( dev, ctx.handle );
-
- return 0;
-}
-
-/**
- * Remove context.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx structure.
- * \return zero on success or a negative number on failure.
- *
- * If not the special kernel context, calls ctxbitmap_free() to free the specified context.
- */
-int DRM(rmctx)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_ctx_t ctx;
-
- if ( copy_from_user( &ctx, (drm_ctx_t __user *)arg, sizeof(ctx) ) )
- return -EFAULT;
-
- DRM_DEBUG( "%d\n", ctx.handle );
- if ( ctx.handle == DRM_KERNEL_CONTEXT + 1 ) {
- priv->remove_auth_on_close = 1;
- }
- if ( ctx.handle != DRM_KERNEL_CONTEXT ) {
- if (dev->fn_tbl.context_dtor)
- dev->fn_tbl.context_dtor(dev, ctx.handle);
- DRM(ctxbitmap_free)( dev, ctx.handle );
- }
-
- down( &dev->ctxlist_sem );
- if ( !list_empty( &dev->ctxlist->head ) ) {
- drm_ctx_list_t *pos, *n;
-
- list_for_each_entry_safe( pos, n, &dev->ctxlist->head, head ) {
- if ( pos->handle == ctx.handle ) {
- list_del( &pos->head );
- DRM(free)( pos, sizeof(*pos), DRM_MEM_CTXLIST );
- --dev->ctx_count;
- }
- }
- }
- up( &dev->ctxlist_sem );
-
- return 0;
-}
-
-/*@}*/
-
+++ /dev/null
-/**
- * \file drm_dma.h
- * DMA IOCTL and function support
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Fri Mar 19 14:30:16 1999 by faith@valinux.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-/**
- * Initialize the DMA data.
- *
- * \param dev DRM device.
- * \return zero on success or a negative value on failure.
- *
- * Allocate and initialize a drm_device_dma structure.
- */
-int DRM(dma_setup)( drm_device_t *dev )
-{
- int i;
-
- dev->dma = DRM(alloc)( sizeof(*dev->dma), DRM_MEM_DRIVER );
- if ( !dev->dma )
- return -ENOMEM;
-
- memset( dev->dma, 0, sizeof(*dev->dma) );
-
- for ( i = 0 ; i <= DRM_MAX_ORDER ; i++ )
- memset(&dev->dma->bufs[i], 0, sizeof(dev->dma->bufs[0]));
-
- return 0;
-}
-
-/**
- * Cleanup the DMA resources.
- *
- * \param dev DRM device.
- *
- * Free all pages associated with DMA buffers, the buffers and pages lists, and
- * finally the the drm_device::dma structure itself.
- */
-void DRM(dma_takedown)(drm_device_t *dev)
-{
- drm_device_dma_t *dma = dev->dma;
- int i, j;
-
- if (!dma) return;
-
- /* Clear dma buffers */
- for (i = 0; i <= DRM_MAX_ORDER; i++) {
- if (dma->bufs[i].seg_count) {
- DRM_DEBUG("order %d: buf_count = %d,"
- " seg_count = %d\n",
- i,
- dma->bufs[i].buf_count,
- dma->bufs[i].seg_count);
- for (j = 0; j < dma->bufs[i].seg_count; j++) {
- if (dma->bufs[i].seglist[j]) {
- DRM(free_pages)(dma->bufs[i].seglist[j],
- dma->bufs[i].page_order,
- DRM_MEM_DMA);
- }
- }
- DRM(free)(dma->bufs[i].seglist,
- dma->bufs[i].seg_count
- * sizeof(*dma->bufs[0].seglist),
- DRM_MEM_SEGS);
- }
- if (dma->bufs[i].buf_count) {
- for (j = 0; j < dma->bufs[i].buf_count; j++) {
- if (dma->bufs[i].buflist[j].dev_private) {
- DRM(free)(dma->bufs[i].buflist[j].dev_private,
- dma->bufs[i].buflist[j].dev_priv_size,
- DRM_MEM_BUFS);
- }
- }
- DRM(free)(dma->bufs[i].buflist,
- dma->bufs[i].buf_count *
- sizeof(*dma->bufs[0].buflist),
- DRM_MEM_BUFS);
- }
- }
-
- if (dma->buflist) {
- DRM(free)(dma->buflist,
- dma->buf_count * sizeof(*dma->buflist),
- DRM_MEM_BUFS);
- }
-
- if (dma->pagelist) {
- DRM(free)(dma->pagelist,
- dma->page_count * sizeof(*dma->pagelist),
- DRM_MEM_PAGES);
- }
- DRM(free)(dev->dma, sizeof(*dev->dma), DRM_MEM_DRIVER);
- dev->dma = NULL;
-}
-
-
-/**
- * Free a buffer.
- *
- * \param dev DRM device.
- * \param buf buffer to free.
- *
- * Resets the fields of \p buf.
- */
-void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
-{
- if (!buf) return;
-
- buf->waiting = 0;
- buf->pending = 0;
- buf->filp = NULL;
- buf->used = 0;
-
- if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE) && waitqueue_active(&buf->dma_wait)) {
- wake_up_interruptible(&buf->dma_wait);
- }
-}
-
-/**
- * Reclaim the buffers.
- *
- * \param filp file pointer.
- *
- * Frees each buffer associated with \p filp not already on the hardware.
- */
-void DRM(core_reclaim_buffers)( struct file *filp )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_device_dma_t *dma = dev->dma;
- int i;
-
- if (!dma) return;
- for (i = 0; i < dma->buf_count; i++) {
- if (dma->buflist[i]->filp == filp) {
- switch (dma->buflist[i]->list) {
- case DRM_LIST_NONE:
- DRM(free_buffer)(dev, dma->buflist[i]);
- break;
- case DRM_LIST_WAIT:
- dma->buflist[i]->list = DRM_LIST_RECLAIM;
- break;
- default:
- /* Buffer already on hardware. */
- break;
- }
- }
- }
-}
-
+++ /dev/null
-/**
- * \file drm_drawable.h
- * IOCTLs for drawables
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-/** No-op. */
-int DRM(adddraw)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_draw_t draw;
-
- draw.handle = 0; /* NOOP */
- DRM_DEBUG("%d\n", draw.handle);
- if (copy_to_user((drm_draw_t __user *)arg, &draw, sizeof(draw)))
- return -EFAULT;
- return 0;
-}
-
-/** No-op. */
-int DRM(rmdraw)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- return 0; /* NOOP */
-}
+++ /dev/null
-/**
- * \file drm_drv.h
- * Generic driver template
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- *
- * To use this template, you must at least define the following (samples
- * given for the MGA driver):
- *
- * \code
- * #define DRIVER_AUTHOR "VA Linux Systems, Inc."
- *
- * #define DRIVER_NAME "mga"
- * #define DRIVER_DESC "Matrox G200/G400"
- * #define DRIVER_DATE "20001127"
- *
- * #define DRIVER_MAJOR 2
- * #define DRIVER_MINOR 0
- * #define DRIVER_PATCHLEVEL 2
- *
- * #define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( mga_ioctls )
- *
- * #define DRM(x) mga_##x
- * \endcode
- */
-
-/*
- * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef DRIVER_IOCTLS
-#define DRIVER_IOCTLS
-#endif
-
-#ifndef MODULE
-/** Use an additional macro to avoid preprocessor troubles */
-#define DRM_OPTIONS_FUNC DRM(options)
-/**
- * Called by the kernel to parse command-line options passed via the
- * boot-loader (e.g., LILO). It calls the insmod option routine,
- * parse_options().
- */
-static int __init DRM(options)( char *str )
-{
- DRM(parse_options)( str );
- return 1;
-}
-
-__setup( DRIVER_NAME "=", DRM_OPTIONS_FUNC );
-#undef DRM_OPTIONS_FUNC
-#endif
-
-#define MAX_DEVICES 4
-static drm_device_t DRM(device)[MAX_DEVICES];
-static int DRM(numdevs) = 0;
-
-struct file_operations DRM(fops) = {
- .owner = THIS_MODULE,
- .open = DRM(open),
- .flush = DRM(flush),
- .release = DRM(release),
- .ioctl = DRM(ioctl),
- .mmap = DRM(mmap),
- .fasync = DRM(fasync),
- .poll = DRM(poll),
- .read = DRM(read),
-};
-
-/** Ioctl table */
-drm_ioctl_desc_t DRM(ioctls)[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { DRM(version), 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { DRM(getunique), 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { DRM(getmagic), 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { DRM(irq_by_busid), 0, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)] = { DRM(getmap), 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)] = { DRM(getclient), 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)] = { DRM(getstats), 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SET_VERSION)] = { DRM(setversion), 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { DRM(setunique), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { DRM(noop), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { DRM(noop), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { DRM(authmagic), 1, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { DRM(addmap), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_MAP)] = { DRM(rmmap), 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_SAREA_CTX)] = { DRM(setsareactx), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_SAREA_CTX)] = { DRM(getsareactx), 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { DRM(addctx), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { DRM(rmctx), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { DRM(modctx), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { DRM(getctx), 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { DRM(switchctx), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { DRM(newctx), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { DRM(resctx), 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { DRM(adddraw), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { DRM(rmdraw), 1, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { DRM(lock), 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { DRM(unlock), 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { DRM(noop), 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { DRM(addbufs), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { DRM(markbufs), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { DRM(infobufs), 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { DRM(mapbufs), 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { DRM(freebufs), 1, 0 },
- /* The DRM_IOCTL_DMA ioctl should be defined by the driver. */
-
- [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { DRM(control), 1, 1 },
-
-#if __OS_HAS_AGP
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { DRM(agp_acquire), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { DRM(agp_release), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { DRM(agp_enable), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { DRM(agp_info), 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { DRM(agp_alloc), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { DRM(agp_free), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { DRM(agp_bind), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { DRM(agp_unbind), 1, 1 },
-#endif
-
- [DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC)] = { DRM(sg_alloc), 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)] = { DRM(sg_free), 1, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK)] = { DRM(wait_vblank), 0, 0 },
-
- DRIVER_IOCTLS
-};
-
-#define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( DRM(ioctls) )
-
-#ifdef MODULE
-static char *drm_opts = NULL;
-#endif
-
-MODULE_AUTHOR( DRIVER_AUTHOR );
-MODULE_DESCRIPTION( DRIVER_DESC );
-MODULE_PARM( drm_opts, "s" );
-MODULE_LICENSE("GPL and additional rights");
-
-static int DRM(setup)( drm_device_t *dev )
-{
- int i;
- int ret;
-
- if (dev->fn_tbl.presetup)
- {
- ret=dev->fn_tbl.presetup(dev);
- if (ret!=0)
- return ret;
- }
-
- atomic_set( &dev->ioctl_count, 0 );
- atomic_set( &dev->vma_count, 0 );
- dev->buf_use = 0;
- atomic_set( &dev->buf_alloc, 0 );
-
- if (drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- {
- i = DRM(dma_setup)( dev );
- if ( i < 0 )
- return i;
- }
-
- for ( i = 0 ; i < DRM_ARRAY_SIZE(dev->counts) ; i++ )
- atomic_set( &dev->counts[i], 0 );
-
- for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
-
- dev->maplist = DRM(alloc)(sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- if(dev->maplist == NULL) return -ENOMEM;
- memset(dev->maplist, 0, sizeof(*dev->maplist));
- INIT_LIST_HEAD(&dev->maplist->head);
-
- dev->ctxlist = DRM(alloc)(sizeof(*dev->ctxlist),
- DRM_MEM_CTXLIST);
- if(dev->ctxlist == NULL) return -ENOMEM;
- memset(dev->ctxlist, 0, sizeof(*dev->ctxlist));
- INIT_LIST_HEAD(&dev->ctxlist->head);
-
- dev->vmalist = NULL;
- dev->sigdata.lock = dev->lock.hw_lock = NULL;
- init_waitqueue_head( &dev->lock.lock_queue );
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq_enabled = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_waitqueue_head( &dev->context_wait );
- dev->if_version = 0;
-
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head( &dev->buf_readers );
- init_waitqueue_head( &dev->buf_writers );
-
- DRM_DEBUG( "\n" );
-
- /*
- * The kernel's context could be created here, but is now created
- * in drm_dma_enqueue. This is more resource-efficient for
- * hardware that does not do DMA, but may mean that
- * drm_select_queue fails between the time the interrupt is
- * initialized and the time the queues are initialized.
- */
- if (dev->fn_tbl.postsetup)
- dev->fn_tbl.postsetup(dev);
-
- return 0;
-}
-
-
-/**
- * Take down the DRM device.
- *
- * \param dev DRM device structure.
- *
- * Frees every resource in \p dev.
- *
- * \sa drm_device and setup().
- */
-static int DRM(takedown)( drm_device_t *dev )
-{
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_map_list_t *r_list;
- struct list_head *list, *list_next;
- drm_vma_entry_t *vma, *vma_next;
- int i;
-
- DRM_DEBUG( "\n" );
-
- if (dev->fn_tbl.pretakedown)
- dev->fn_tbl.pretakedown(dev);
-
- if ( dev->irq_enabled ) DRM(irq_uninstall)( dev );
-
- down( &dev->struct_sem );
- del_timer( &dev->timer );
-
- if ( dev->devname ) {
- DRM(free)( dev->devname, strlen( dev->devname ) + 1,
- DRM_MEM_DRIVER );
- dev->devname = NULL;
- }
-
- if ( dev->unique ) {
- DRM(free)( dev->unique, strlen( dev->unique ) + 1,
- DRM_MEM_DRIVER );
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) {
- for ( pt = dev->magiclist[i].head ; pt ; pt = next ) {
- next = pt->next;
- DRM(free)( pt, sizeof(*pt), DRM_MEM_MAGIC );
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
-
- /* Clear AGP information */
- if (drm_core_has_AGP(dev) && dev->agp) {
- drm_agp_mem_t *entry;
- drm_agp_mem_t *nexte;
-
- /* Remove AGP resources, but leave dev->agp
- intact until drv_cleanup is called. */
- for ( entry = dev->agp->memory ; entry ; entry = nexte ) {
- nexte = entry->next;
- if ( entry->bound ) DRM(unbind_agp)( entry->memory );
- DRM(free_agp)( entry->memory, entry->pages );
- DRM(free)( entry, sizeof(*entry), DRM_MEM_AGPLISTS );
- }
- dev->agp->memory = NULL;
-
- if ( dev->agp->acquired ) DRM(agp_do_release)();
-
- dev->agp->acquired = 0;
- dev->agp->enabled = 0;
- }
-
- /* Clear vma list (only built for debugging) */
- if ( dev->vmalist ) {
- for ( vma = dev->vmalist ; vma ; vma = vma_next ) {
- vma_next = vma->next;
- DRM(free)( vma, sizeof(*vma), DRM_MEM_VMAS );
- }
- dev->vmalist = NULL;
- }
-
- if( dev->maplist ) {
- list_for_each_safe( list, list_next, &dev->maplist->head ) {
- r_list = (drm_map_list_t *)list;
-
- if ( ( map = r_list->map ) ) {
- switch ( map->type ) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
- if (drm_core_has_MTRR(dev)) {
- if ( map->mtrr >= 0 ) {
- int retcode;
- retcode = mtrr_del( map->mtrr,
- map->offset,
- map->size );
- DRM_DEBUG( "mtrr_del=%d\n", retcode );
- }
- }
- DRM(ioremapfree)( map->handle, map->size, dev );
- break;
- case _DRM_SHM:
- vfree(map->handle);
- break;
-
- case _DRM_AGP:
- /* Do nothing here, because this is all
- * handled in the AGP/GART driver.
- */
- break;
- case _DRM_SCATTER_GATHER:
- /* Handle it */
- if (drm_core_check_feature(dev, DRIVER_SG) && dev->sg) {
- DRM(sg_cleanup)(dev->sg);
- dev->sg = NULL;
- }
- break;
- }
- DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
- }
- list_del( list );
- DRM(free)(r_list, sizeof(*r_list), DRM_MEM_MAPS);
- }
- DRM(free)(dev->maplist, sizeof(*dev->maplist), DRM_MEM_MAPS);
- dev->maplist = NULL;
- }
-
- if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE) && dev->queuelist ) {
- for ( i = 0 ; i < dev->queue_count ; i++ ) {
- if ( dev->queuelist[i] ) {
- DRM(free)( dev->queuelist[i],
- sizeof(*dev->queuelist[0]),
- DRM_MEM_QUEUES );
- dev->queuelist[i] = NULL;
- }
- }
- DRM(free)( dev->queuelist,
- dev->queue_slots * sizeof(*dev->queuelist),
- DRM_MEM_QUEUES );
- dev->queuelist = NULL;
- }
- dev->queue_count = 0;
-
- if (drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- DRM(dma_takedown)( dev );
-
- if ( dev->lock.hw_lock ) {
- dev->sigdata.lock = dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.filp = NULL;
- wake_up_interruptible( &dev->lock.lock_queue );
- }
- up( &dev->struct_sem );
-
- return 0;
-}
-
-static void DRM(init_fn_table)(struct drm_device *dev)
-{
- dev->fn_tbl.reclaim_buffers = DRM(core_reclaim_buffers);
- dev->fn_tbl.get_map_ofs = DRM(core_get_map_ofs);
- dev->fn_tbl.get_reg_ofs = DRM(core_get_reg_ofs);
-}
-
-#include "drm_pciids.h"
-
-static struct pci_device_id DRM(pciidlist)[] = {
- DRM(PCI_IDS)
-};
-
-static int DRM(probe)(struct pci_dev *pdev)
-{
- drm_device_t *dev;
- int retcode;
- int i;
- int is_compat = 0;
-
- DRM_DEBUG( "\n" );
-
- for (i = 0; DRM(pciidlist)[i].vendor != 0; i++) {
- if ((DRM(pciidlist)[i].vendor == pdev->vendor) &&
- (DRM(pciidlist)[i].device == pdev->device)) {
- is_compat = 1;
- }
- }
- if (is_compat == 0)
- return -ENODEV;
-
- if (DRM(numdevs) >= MAX_DEVICES)
- return -ENODEV;
-
- if ((retcode=pci_enable_device(pdev)))
- return retcode;
-
- dev = &(DRM(device)[DRM(numdevs)]);
-
- memset( (void *)dev, 0, sizeof(*dev) );
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- init_timer( &dev->timer );
- sema_init( &dev->struct_sem, 1 );
- sema_init( &dev->ctxlist_sem, 1 );
-
- if ((dev->minor = DRM(stub_register)(DRIVER_NAME, &DRM(fops),dev)) < 0)
- return -EPERM;
- dev->device = MKDEV(DRM_MAJOR, dev->minor );
- dev->name = DRIVER_NAME;
-
- dev->pdev = pdev;
-#ifdef __alpha__
- dev->hose = pdev->sysdata;
- dev->pci_domain = dev->hose->bus->number;
-#else
- dev->pci_domain = 0;
-#endif
- dev->pci_bus = pdev->bus->number;
- dev->pci_slot = PCI_SLOT(pdev->devfn);
- dev->pci_func = PCI_FUNC(pdev->devfn);
- dev->irq = pdev->irq;
-
- /* dev_priv_size can be changed by a driver in driver_register_fns */
- dev->dev_priv_size = sizeof(u32);
-
- /* the DRM has 6 basic counters - drivers add theirs in register_fns */
- dev->counters = 6;
- dev->types[0] = _DRM_STAT_LOCK;
- dev->types[1] = _DRM_STAT_OPENS;
- dev->types[2] = _DRM_STAT_CLOSES;
- dev->types[3] = _DRM_STAT_IOCTLS;
- dev->types[4] = _DRM_STAT_LOCKS;
- dev->types[5] = _DRM_STAT_UNLOCKS;
-
- DRM(init_fn_table)(dev);
-
- DRM(driver_register_fns)(dev);
-
- if (dev->fn_tbl.preinit)
- dev->fn_tbl.preinit(dev);
-
- if (drm_core_has_AGP(dev))
- {
- dev->agp = DRM(agp_init)();
- if (drm_core_check_feature(dev, DRIVER_REQUIRE_AGP) && (dev->agp == NULL)) {
- DRM_ERROR( "Cannot initialize the agpgart module.\n" );
- DRM(stub_unregister)(dev->minor);
- DRM(takedown)( dev );
- return -EINVAL;
- }
- if (drm_core_has_MTRR(dev)) {
- if (dev->agp)
- dev->agp->agp_mtrr = mtrr_add( dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size*1024*1024,
- MTRR_TYPE_WRCOMB,
- 1 );
- }
- }
-
- retcode = DRM(ctxbitmap_init)( dev );
- if( retcode ) {
- DRM_ERROR( "Cannot allocate memory for context bitmap.\n" );
- DRM(stub_unregister)(dev->minor);
- DRM(takedown)( dev );
- return retcode;
- }
-
- DRM(numdevs)++; /* no errors, mark it reserved */
-
- DRM_INFO( "Initialized %s %d.%d.%d %s on minor %d: %s\n",
- DRIVER_NAME,
- DRIVER_MAJOR,
- DRIVER_MINOR,
- DRIVER_PATCHLEVEL,
- DRIVER_DATE,
- dev->minor,
- pci_pretty_name(pdev));
-
- if (dev->fn_tbl.postinit)
- dev->fn_tbl.postinit(dev);
-
- return 0;
-}
-
-/**
- * Module initialization. Called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported).
- *
- * \return zero on success or a negative number on failure.
- *
- * Initializes an array of drm_device structures, and attempts to
- * initialize all available devices, using consecutive minors, registering the
- * stubs and initializing the AGP device.
- *
- * Expands the \c DRIVER_PREINIT and \c DRIVER_POST_INIT macros before and
- * after the initialization for driver customization.
- */
-static int __init drm_init( void )
-{
- struct pci_dev *pdev = NULL;
-
- DRM_DEBUG( "\n" );
-
-#ifdef MODULE
- DRM(parse_options)( drm_opts );
-#endif
-
- DRM(mem_init)();
-
- for_each_pci_dev(pdev)
- DRM(probe)(pdev);
- return 0;
-}
-
-/**
- * Called via cleanup_module() at module unload time.
- *
- * Cleans up all DRM device, calling takedown().
- *
- * \sa drm_init().
- */
-static void __exit drm_cleanup( void )
-{
- drm_device_t *dev;
- int i;
-
- DRM_DEBUG( "\n" );
-
- for (i = DRM(numdevs) - 1; i >= 0; i--) {
- dev = &(DRM(device)[i]);
- if ( DRM(stub_unregister)(dev->minor) ) {
- DRM_ERROR( "Cannot unload module\n" );
- } else {
- DRM_DEBUG("minor %d unregistered\n", dev->minor);
- if (i == 0) {
- DRM_INFO( "Module unloaded\n" );
- }
- }
-
- DRM(ctxbitmap_cleanup)( dev );
-
- if (drm_core_has_MTRR(dev) && drm_core_has_AGP(dev) &&
- dev->agp && dev->agp->agp_mtrr >= 0) {
- int retval;
- retval = mtrr_del( dev->agp->agp_mtrr,
- dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size*1024*1024 );
- DRM_DEBUG( "mtrr_del=%d\n", retval );
- }
-
- DRM(takedown)( dev );
-
- if (drm_core_has_AGP(dev) && dev->agp ) {
- DRM(agp_uninit)();
- DRM(free)( dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS );
- dev->agp = NULL;
- }
-
- if (dev->fn_tbl.postcleanup)
- dev->fn_tbl.postcleanup(dev);
-
- }
- DRM(numdevs) = 0;
-}
-
-module_init( drm_init );
-module_exit( drm_cleanup );
-
-
-/**
- * Get version information
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_version structure.
- * \return zero on success or negative number on failure.
- *
- * Fills in the version information in \p arg.
- */
-int DRM(version)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_version_t __user *argp = (void __user *)arg;
- drm_version_t version;
- int len;
-
- if ( copy_from_user( &version, argp, sizeof(version) ) )
- return -EFAULT;
-
-#define DRM_COPY( name, value ) \
- len = strlen( value ); \
- if ( len > name##_len ) len = name##_len; \
- name##_len = strlen( value ); \
- if ( len && name ) { \
- if ( copy_to_user( name, value, len ) ) \
- return -EFAULT; \
- }
-
- version.version_major = DRIVER_MAJOR;
- version.version_minor = DRIVER_MINOR;
- version.version_patchlevel = DRIVER_PATCHLEVEL;
-
- DRM_COPY( version.name, DRIVER_NAME );
- DRM_COPY( version.date, DRIVER_DATE );
- DRM_COPY( version.desc, DRIVER_DESC );
-
- if ( copy_to_user( argp, &version, sizeof(version) ) )
- return -EFAULT;
- return 0;
-}
-
-/**
- * Open file.
- *
- * \param inode device inode
- * \param filp file pointer.
- * \return zero on success or a negative number on failure.
- *
- * Searches the DRM device with the same minor number, calls open_helper(), and
- * increments the device open count. If the open count was previous at zero,
- * i.e., it's the first that the device is open, then calls setup().
- */
-int DRM(open)( struct inode *inode, struct file *filp )
-{
- drm_device_t *dev = NULL;
- int retcode = 0;
- int i;
-
- for (i = 0; i < DRM(numdevs); i++) {
- if (iminor(inode) == DRM(device)[i].minor) {
- dev = &(DRM(device)[i]);
- break;
- }
- }
- if (!dev) {
- return -ENODEV;
- }
-
- retcode = DRM(open_helper)( inode, filp, dev );
- if ( !retcode ) {
- atomic_inc( &dev->counts[_DRM_STAT_OPENS] );
- spin_lock( &dev->count_lock );
- if ( !dev->open_count++ ) {
- spin_unlock( &dev->count_lock );
- return DRM(setup)( dev );
- }
- spin_unlock( &dev->count_lock );
- }
-
- return retcode;
-}
-
-/**
- * Release file.
- *
- * \param inode device inode
- * \param filp file pointer.
- * \return zero on success or a negative number on failure.
- *
- * If the hardware lock is held then free it, and take it again for the kernel
- * context since it's necessary to reclaim buffers. Unlink the file private
- * data from its list and free it. Decreases the open count and if it reaches
- * zero calls takedown().
- */
-int DRM(release)( struct inode *inode, struct file *filp )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
-
- DRM_DEBUG( "open_count = %d\n", dev->open_count );
-
- if (dev->fn_tbl.prerelease)
- dev->fn_tbl.prerelease(dev, filp);
-
- /* ========================================================
- * Begin inline drm_release
- */
-
- DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n",
- current->pid, (long)old_encode_dev(dev->device), dev->open_count );
-
- if ( priv->lock_count && dev->lock.hw_lock &&
- _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) &&
- dev->lock.filp == filp ) {
- DRM_DEBUG( "File %p released, freeing lock for context %d\n",
- filp,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) );
-
- if (dev->fn_tbl.release)
- dev->fn_tbl.release(dev, filp);
-
- DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) );
-
- /* FIXME: may require heavy-handed reset of
- hardware at this point, possibly
- processed via a callback to the X
- server. */
- }
- else if ( dev->fn_tbl.release && priv->lock_count && dev->lock.hw_lock ) {
- /* The lock is required to reclaim buffers */
- DECLARE_WAITQUEUE( entry, current );
-
- add_wait_queue( &dev->lock.lock_queue, &entry );
- for (;;) {
- __set_current_state(TASK_INTERRUPTIBLE);
- if ( !dev->lock.hw_lock ) {
- /* Device has been unregistered */
- retcode = -EINTR;
- break;
- }
- if ( DRM(lock_take)( &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT ) ) {
- dev->lock.filp = filp;
- dev->lock.lock_time = jiffies;
- atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
- break; /* Got lock */
- }
- /* Contention */
- schedule();
- if ( signal_pending( current ) ) {
- retcode = -ERESTARTSYS;
- break;
- }
- }
- __set_current_state(TASK_RUNNING);
- remove_wait_queue( &dev->lock.lock_queue, &entry );
- if( !retcode ) {
- if (dev->fn_tbl.release)
- dev->fn_tbl.release(dev, filp);
- DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT );
- }
- }
-
- if (drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- {
- dev->fn_tbl.reclaim_buffers(filp);
- }
-
- DRM(fasync)( -1, filp, 0 );
-
- down( &dev->ctxlist_sem );
- if ( !list_empty( &dev->ctxlist->head ) ) {
- drm_ctx_list_t *pos, *n;
-
- list_for_each_entry_safe( pos, n, &dev->ctxlist->head, head ) {
- if ( pos->tag == priv &&
- pos->handle != DRM_KERNEL_CONTEXT ) {
- if (dev->fn_tbl.context_dtor)
- dev->fn_tbl.context_dtor(dev, pos->handle);
-
- DRM(ctxbitmap_free)( dev, pos->handle );
-
- list_del( &pos->head );
- DRM(free)( pos, sizeof(*pos), DRM_MEM_CTXLIST );
- --dev->ctx_count;
- }
- }
- }
- up( &dev->ctxlist_sem );
-
- down( &dev->struct_sem );
- if ( priv->remove_auth_on_close == 1 ) {
- drm_file_t *temp = dev->file_first;
- while ( temp ) {
- temp->authenticated = 0;
- temp = temp->next;
- }
- }
- if ( priv->prev ) {
- priv->prev->next = priv->next;
- } else {
- dev->file_first = priv->next;
- }
- if ( priv->next ) {
- priv->next->prev = priv->prev;
- } else {
- dev->file_last = priv->prev;
- }
- up( &dev->struct_sem );
-
- if (dev->fn_tbl.free_filp_priv)
- dev->fn_tbl.free_filp_priv(dev, priv);
-
- DRM(free)( priv, sizeof(*priv), DRM_MEM_FILES );
-
- /* ========================================================
- * End inline drm_release
- */
-
- atomic_inc( &dev->counts[_DRM_STAT_CLOSES] );
- spin_lock( &dev->count_lock );
- if ( !--dev->open_count ) {
- if ( atomic_read( &dev->ioctl_count ) || dev->blocked ) {
- DRM_ERROR( "Device busy: %d %d\n",
- atomic_read( &dev->ioctl_count ),
- dev->blocked );
- spin_unlock( &dev->count_lock );
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock( &dev->count_lock );
- unlock_kernel();
- return DRM(takedown)( dev );
- }
- spin_unlock( &dev->count_lock );
-
- unlock_kernel();
-
- return retcode;
-}
-
-/**
- * Called whenever a process performs an ioctl on /dev/drm.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument.
- * \return zero on success or negative number on failure.
- *
- * Looks up the ioctl function in the ::ioctls table, checking for root
- * previleges if so required, and dispatches to the respective function.
- */
-int DRM(ioctl)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
- int nr = DRM_IOCTL_NR(cmd);
- int retcode = 0;
-
- atomic_inc( &dev->ioctl_count );
- atomic_inc( &dev->counts[_DRM_STAT_IOCTLS] );
- ++priv->ioctl_count;
-
- DRM_DEBUG( "pid=%d, cmd=0x%02x, nr=0x%02x, dev 0x%lx, auth=%d\n",
- current->pid, cmd, nr, (long)old_encode_dev(dev->device),
- priv->authenticated );
-
- if ( nr >= DRIVER_IOCTL_COUNT ) {
- retcode = -EINVAL;
- } else {
- ioctl = &DRM(ioctls)[nr];
- func = ioctl->func;
-
- if ( !func ) {
- DRM_DEBUG( "no function\n" );
- retcode = -EINVAL;
- } else if ( ( ioctl->root_only && !capable( CAP_SYS_ADMIN ) )||
- ( ioctl->auth_needed && !priv->authenticated ) ) {
- retcode = -EACCES;
- } else {
- retcode = func( inode, filp, cmd, arg );
- }
- }
-
- atomic_dec( &dev->ioctl_count );
- return retcode;
-}
-
-/**
- * Lock ioctl.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_lock structure.
- * \return zero on success or negative number on failure.
- *
- * Add the current task to the lock wait queue, and attempt to take to lock.
- */
-int DRM(lock)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- DECLARE_WAITQUEUE( entry, current );
- drm_lock_t lock;
- int ret = 0;
-
- ++priv->lock_count;
-
- if ( copy_from_user( &lock, (drm_lock_t __user *)arg, sizeof(lock) ) )
- return -EFAULT;
-
- if ( lock.context == DRM_KERNEL_CONTEXT ) {
- DRM_ERROR( "Process %d using kernel context %d\n",
- current->pid, lock.context );
- return -EINVAL;
- }
-
- DRM_DEBUG( "%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock.context, current->pid,
- dev->lock.hw_lock->lock, lock.flags );
-
- if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE))
- if ( lock.context < 0 )
- return -EINVAL;
-
- add_wait_queue( &dev->lock.lock_queue, &entry );
- for (;;) {
- __set_current_state(TASK_INTERRUPTIBLE);
- if ( !dev->lock.hw_lock ) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if ( DRM(lock_take)( &dev->lock.hw_lock->lock,
- lock.context ) ) {
- dev->lock.filp = filp;
- dev->lock.lock_time = jiffies;
- atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
- break; /* Got lock */
- }
-
- /* Contention */
- schedule();
- if ( signal_pending( current ) ) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- __set_current_state(TASK_RUNNING);
- remove_wait_queue( &dev->lock.lock_queue, &entry );
-
- sigemptyset( &dev->sigmask );
- sigaddset( &dev->sigmask, SIGSTOP );
- sigaddset( &dev->sigmask, SIGTSTP );
- sigaddset( &dev->sigmask, SIGTTIN );
- sigaddset( &dev->sigmask, SIGTTOU );
- dev->sigdata.context = lock.context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals( DRM(notifier),
- &dev->sigdata, &dev->sigmask );
-
- if (dev->fn_tbl.dma_ready && (lock.flags & _DRM_LOCK_READY))
- dev->fn_tbl.dma_ready(dev);
-
- if ( dev->fn_tbl.dma_quiescent && (lock.flags & _DRM_LOCK_QUIESCENT ))
- return dev->fn_tbl.dma_quiescent(dev);
-
- /* dev->fn_tbl.kernel_context_switch isn't used by any of the x86
- * drivers but is used by the Sparc driver.
- */
-
- if (dev->fn_tbl.kernel_context_switch &&
- dev->last_context != lock.context) {
- dev->fn_tbl.kernel_context_switch(dev, dev->last_context,
- lock.context);
- }
- DRM_DEBUG( "%d %s\n", lock.context, ret ? "interrupted" : "has lock" );
-
- return ret;
-}
-
-/**
- * Unlock ioctl.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_lock structure.
- * \return zero on success or negative number on failure.
- *
- * Transfer and free the lock.
- */
-int DRM(unlock)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if ( copy_from_user( &lock, (drm_lock_t __user *)arg, sizeof(lock) ) )
- return -EFAULT;
-
- if ( lock.context == DRM_KERNEL_CONTEXT ) {
- DRM_ERROR( "Process %d using kernel context %d\n",
- current->pid, lock.context );
- return -EINVAL;
- }
-
- atomic_inc( &dev->counts[_DRM_STAT_UNLOCKS] );
-
- /* kernel_context_switch isn't used by any of the x86 drm
- * modules but is required by the Sparc driver.
- */
- if (dev->fn_tbl.kernel_context_switch_unlock)
- dev->fn_tbl.kernel_context_switch_unlock(dev, &lock);
- else {
- DRM(lock_transfer)( dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT );
-
- if ( DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT ) ) {
- DRM_ERROR( "\n" );
- }
- }
-
- unblock_all_signals();
- return 0;
-}
+++ /dev/null
-/**
- * \file drm_fops.h
- * File operations for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Daryll Strauss <daryll@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Mon Jan 4 08:58:31 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include <linux/poll.h>
-
-
-/**
- * Called whenever a process opens /dev/drm.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param dev device.
- * \return zero on success or a negative number on failure.
- *
- * Creates and initializes a drm_file structure for the file private data in \p
- * filp and add it into the double linked list in \p dev.
- */
-int DRM(open_helper)(struct inode *inode, struct file *filp, drm_device_t *dev)
-{
- int minor = iminor(inode);
- drm_file_t *priv;
- int ret;
-
- if (filp->f_flags & O_EXCL) return -EBUSY; /* No exclusive opens */
- if (!DRM(cpu_valid)()) return -EINVAL;
-
- DRM_DEBUG("pid = %d, minor = %d\n", current->pid, minor);
-
- priv = DRM(alloc)(sizeof(*priv), DRM_MEM_FILES);
- if(!priv) return -ENOMEM;
-
- memset(priv, 0, sizeof(*priv));
- filp->private_data = priv;
- priv->uid = current->euid;
- priv->pid = current->pid;
- priv->minor = minor;
- priv->dev = dev;
- priv->ioctl_count = 0;
- priv->authenticated = capable(CAP_SYS_ADMIN);
- priv->lock_count = 0;
-
- if (dev->fn_tbl.open_helper) {
- ret=dev->fn_tbl.open_helper(dev, priv);
- if (ret < 0)
- goto out_free;
- }
-
- down(&dev->struct_sem);
- if (!dev->file_last) {
- priv->next = NULL;
- priv->prev = NULL;
- dev->file_first = priv;
- dev->file_last = priv;
- } else {
- priv->next = NULL;
- priv->prev = dev->file_last;
- dev->file_last->next = priv;
- dev->file_last = priv;
- }
- up(&dev->struct_sem);
-
-#ifdef __alpha__
- /*
- * Default the hose
- */
- if (!dev->hose) {
- struct pci_dev *pci_dev;
- pci_dev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, NULL);
- if (pci_dev) {
- dev->hose = pci_dev->sysdata;
- pci_dev_put(pci_dev);
- }
- if (!dev->hose) {
- struct pci_bus *b = pci_bus_b(pci_root_buses.next);
- if (b) dev->hose = b->sysdata;
- }
- }
-#endif
-
- return 0;
-out_free:
- DRM(free)(priv, sizeof(*priv), DRM_MEM_FILES);
- filp->private_data=NULL;
- return ret;
-}
-
-/** No-op. */
-int DRM(flush)(struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
-
- DRM_DEBUG("pid = %d, device = 0x%lx, open_count = %d\n",
- current->pid, (long)old_encode_dev(dev->device), dev->open_count);
- return 0;
-}
-
-/** No-op. */
-int DRM(fasync)(int fd, struct file *filp, int on)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode;
-
- DRM_DEBUG("fd = %d, device = 0x%lx\n", fd, (long)old_encode_dev(dev->device));
- retcode = fasync_helper(fd, filp, on, &dev->buf_async);
- if (retcode < 0) return retcode;
- return 0;
-}
-
-/** No-op. */
-unsigned int DRM(poll)(struct file *filp, struct poll_table_struct *wait)
-{
- return 0;
-}
-
-
-/** No-op. */
-ssize_t DRM(read)(struct file *filp, char __user *buf, size_t count, loff_t *off)
-{
- return 0;
-}
+++ /dev/null
-/**
- * \file drm_init.h
- * Setup/Cleanup for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Mon Jan 4 08:58:31 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-/** Debug flags. Set by parse_option(). */
-#if 0
-int DRM(flags) = DRM_FLAG_DEBUG;
-#else
-int DRM(flags) = 0;
-#endif
-
-/**
- * Parse a single option.
- *
- * \param s option string.
- *
- * \sa See parse_options() for details.
- */
-static void DRM(parse_option)(char *s)
-{
- char *c, *r;
-
- DRM_DEBUG("\"%s\"\n", s);
- if (!s || !*s) return;
- for (c = s; *c && *c != ':'; c++); /* find : or \0 */
- if (*c) r = c + 1; else r = NULL; /* remember remainder */
- *c = '\0'; /* terminate */
- if (!strcmp(s, "debug")) {
- DRM(flags) |= DRM_FLAG_DEBUG;
- DRM_INFO("Debug messages ON\n");
- return;
- }
- DRM_ERROR("\"%s\" is not a valid option\n", s);
- return;
-}
-
-/**
- * Parse the insmod "drm_opts=" options, or the command-line
- * options passed to the kernel via LILO.
- *
- * \param s contains option_list without the 'drm_opts=' part.
- *
- * The grammar of the format is as
- * follows:
- *
- * \code
- * drm ::= 'drm_opts=' option_list
- * option_list ::= option [ ';' option_list ]
- * option ::= 'device:' major
- * | 'debug'
- * | 'noctx'
- * major ::= INTEGER
- * \endcode
- *
- * - device=major,minor specifies the device number used for /dev/drm
- * - if major == 0 then the misc device is used
- * - if major == 0 and minor == 0 then dynamic misc allocation is used
- * - debug=on specifies that debugging messages will be printk'd
- * - debug=trace specifies that each function call will be logged via printk
- * - debug=off turns off all debugging options
- *
- * \todo Actually only the \e presence of the 'debug' option is currently
- * checked.
- */
-
-void DRM(parse_options)(char *s)
-{
- char *h, *t, *n;
-
- DRM_DEBUG("\"%s\"\n", s ?: "");
- if (!s || !*s) return;
-
- for (h = t = n = s; h && *h; h = n) {
- for (; *t && *t != ';'; t++); /* find ; or \0 */
- if (*t) n = t + 1; else n = NULL; /* remember next */
- *t = '\0'; /* terminate */
- DRM(parse_option)(h); /* parse */
- }
-}
-
-/**
- * Check whether DRI will run on this CPU.
- *
- * \return non-zero if the DRI will run on this CPU, or zero otherwise.
- */
-int DRM(cpu_valid)(void)
-{
-#if defined(__i386__)
- if (boot_cpu_data.x86 == 3) return 0; /* No cmpxchg on a 386 */
-#endif
-#if defined(__sparc__) && !defined(__sparc_v9__)
- return 0; /* No cmpxchg before v9 sparc. */
-#endif
- return 1;
-}
+++ /dev/null
-/**
- * \file drm_ioctl.h
- * IOCTL processing for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Fri Jan 8 09:01:26 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-#include "linux/pci.h"
-
-/**
- * Get the bus id.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_unique structure.
- * \return zero on success or a negative number on failure.
- *
- * Copies the bus id from drm_device::unique into user space.
- */
-int DRM(getunique)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_unique_t __user *argp = (void __user *)arg;
- drm_unique_t u;
-
- if (copy_from_user(&u, argp, sizeof(u)))
- return -EFAULT;
- if (u.unique_len >= dev->unique_len) {
- if (copy_to_user(u.unique, dev->unique, dev->unique_len))
- return -EFAULT;
- }
- u.unique_len = dev->unique_len;
- if (copy_to_user(argp, &u, sizeof(u)))
- return -EFAULT;
- return 0;
-}
-
-/**
- * Set the bus id.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_unique structure.
- * \return zero on success or a negative number on failure.
- *
- * Copies the bus id from userspace into drm_device::unique, and verifies that
- * it matches the device this DRM is attached to (EINVAL otherwise). Deprecated
- * in interface version 1.1 and will return EBUSY when setversion has requested
- * version 1.1 or greater.
- */
-int DRM(setunique)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_unique_t u;
- int domain, bus, slot, func, ret;
-
- if (dev->unique_len || dev->unique) return -EBUSY;
-
- if (copy_from_user(&u, (drm_unique_t __user *)arg, sizeof(u)))
- return -EFAULT;
-
- if (!u.unique_len || u.unique_len > 1024) return -EINVAL;
-
- dev->unique_len = u.unique_len;
- dev->unique = DRM(alloc)(u.unique_len + 1, DRM_MEM_DRIVER);
- if(!dev->unique) return -ENOMEM;
- if (copy_from_user(dev->unique, u.unique, dev->unique_len))
- return -EFAULT;
-
- dev->unique[dev->unique_len] = '\0';
-
- dev->devname = DRM(alloc)(strlen(dev->name) + strlen(dev->unique) + 2,
- DRM_MEM_DRIVER);
- if (!dev->devname)
- return -ENOMEM;
-
- sprintf(dev->devname, "%s@%s", dev->name, dev->unique);
-
- /* Return error if the busid submitted doesn't match the device's actual
- * busid.
- */
- ret = sscanf(dev->unique, "PCI:%d:%d:%d", &bus, &slot, &func);
- if (ret != 3)
- return DRM_ERR(EINVAL);
- domain = bus >> 8;
- bus &= 0xff;
-
- if ((domain != dev->pci_domain) ||
- (bus != dev->pci_bus) ||
- (slot != dev->pci_slot) ||
- (func != dev->pci_func))
- return -EINVAL;
-
- return 0;
-}
-
-static int
-DRM(set_busid)(drm_device_t *dev)
-{
- if (dev->unique != NULL)
- return EBUSY;
-
- dev->unique_len = 20;
- dev->unique = DRM(alloc)(dev->unique_len + 1, DRM_MEM_DRIVER);
- if (dev->unique == NULL)
- return ENOMEM;
-
- snprintf(dev->unique, dev->unique_len, "pci:%04x:%02x:%02x.%d",
- dev->pci_domain, dev->pci_bus, dev->pci_slot, dev->pci_func);
-
- dev->devname = DRM(alloc)(strlen(dev->name) + dev->unique_len + 2,
- DRM_MEM_DRIVER);
- if (dev->devname == NULL)
- return ENOMEM;
-
- sprintf(dev->devname, "%s@%s", dev->name, dev->unique);
-
- return 0;
-}
-
-
-/**
- * Get a mapping information.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_map structure.
- *
- * \return zero on success or a negative number on failure.
- *
- * Searches for the mapping with the specified offset and copies its information
- * into userspace
- */
-int DRM(getmap)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_map_t __user *argp = (void __user *)arg;
- drm_map_t map;
- drm_map_list_t *r_list = NULL;
- struct list_head *list;
- int idx;
- int i;
-
- if (copy_from_user(&map, argp, sizeof(map)))
- return -EFAULT;
- idx = map.offset;
-
- down(&dev->struct_sem);
- if (idx < 0) {
- up(&dev->struct_sem);
- return -EINVAL;
- }
-
- i = 0;
- list_for_each(list, &dev->maplist->head) {
- if(i == idx) {
- r_list = list_entry(list, drm_map_list_t, head);
- break;
- }
- i++;
- }
- if(!r_list || !r_list->map) {
- up(&dev->struct_sem);
- return -EINVAL;
- }
-
- map.offset = r_list->map->offset;
- map.size = r_list->map->size;
- map.type = r_list->map->type;
- map.flags = r_list->map->flags;
- map.handle = r_list->map->handle;
- map.mtrr = r_list->map->mtrr;
- up(&dev->struct_sem);
-
- if (copy_to_user(argp, &map, sizeof(map))) return -EFAULT;
- return 0;
-}
-
-/**
- * Get client information.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_client structure.
- *
- * \return zero on success or a negative number on failure.
- *
- * Searches for the client with the specified index and copies its information
- * into userspace
- */
-int DRM(getclient)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_client_t __user *argp = (void __user *)arg;
- drm_client_t client;
- drm_file_t *pt;
- int idx;
- int i;
-
- if (copy_from_user(&client, argp, sizeof(client)))
- return -EFAULT;
- idx = client.idx;
- down(&dev->struct_sem);
- for (i = 0, pt = dev->file_first; i < idx && pt; i++, pt = pt->next)
- ;
-
- if (!pt) {
- up(&dev->struct_sem);
- return -EINVAL;
- }
- client.auth = pt->authenticated;
- client.pid = pt->pid;
- client.uid = pt->uid;
- client.magic = pt->magic;
- client.iocs = pt->ioctl_count;
- up(&dev->struct_sem);
-
- if (copy_to_user((drm_client_t __user *)arg, &client, sizeof(client)))
- return -EFAULT;
- return 0;
-}
-
-/**
- * Get statistics information.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_stats structure.
- *
- * \return zero on success or a negative number on failure.
- */
-int DRM(getstats)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_stats_t stats;
- int i;
-
- memset(&stats, 0, sizeof(stats));
-
- down(&dev->struct_sem);
-
- for (i = 0; i < dev->counters; i++) {
- if (dev->types[i] == _DRM_STAT_LOCK)
- stats.data[i].value
- = (dev->lock.hw_lock
- ? dev->lock.hw_lock->lock : 0);
- else
- stats.data[i].value = atomic_read(&dev->counts[i]);
- stats.data[i].type = dev->types[i];
- }
-
- stats.count = dev->counters;
-
- up(&dev->struct_sem);
-
- if (copy_to_user((drm_stats_t __user *)arg, &stats, sizeof(stats)))
- return -EFAULT;
- return 0;
-}
-
-#define DRM_IF_MAJOR 1
-#define DRM_IF_MINOR 2
-
-int DRM(setversion)(DRM_IOCTL_ARGS)
-{
- DRM_DEVICE;
- drm_set_version_t sv;
- drm_set_version_t retv;
- int if_version;
- drm_set_version_t __user *argp = (void __user *)data;
-
- DRM_COPY_FROM_USER_IOCTL(sv, argp, sizeof(sv));
-
- retv.drm_di_major = DRM_IF_MAJOR;
- retv.drm_di_minor = DRM_IF_MINOR;
- retv.drm_dd_major = DRIVER_MAJOR;
- retv.drm_dd_minor = DRIVER_MINOR;
-
- DRM_COPY_TO_USER_IOCTL(argp, retv, sizeof(sv));
-
- if (sv.drm_di_major != -1) {
- if (sv.drm_di_major != DRM_IF_MAJOR ||
- sv.drm_di_minor < 0 || sv.drm_di_minor > DRM_IF_MINOR)
- return EINVAL;
- if_version = DRM_IF_VERSION(sv.drm_di_major, sv.drm_dd_minor);
- dev->if_version = DRM_MAX(if_version, dev->if_version);
- if (sv.drm_di_minor >= 1) {
- /*
- * Version 1.1 includes tying of DRM to specific device
- */
- DRM(set_busid)(dev);
- }
- }
-
- if (sv.drm_dd_major != -1) {
- if (sv.drm_dd_major != DRIVER_MAJOR ||
- sv.drm_dd_minor < 0 || sv.drm_dd_minor > DRIVER_MINOR)
- return EINVAL;
-
- if (dev->fn_tbl.set_version)
- dev->fn_tbl.set_version(dev, &sv);
- }
- return 0;
-}
+++ /dev/null
-/**
- * \file drm_irq.h
- * IRQ support
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Fri Mar 19 14:30:16 1999 by faith@valinux.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-#include <linux/interrupt.h> /* For task queue support */
-
-/**
- * Get interrupt from bus id.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_irq_busid structure.
- * \return zero on success or a negative number on failure.
- *
- * Finds the PCI device with the specified bus id and gets its IRQ number.
- * This IOCTL is deprecated, and will now return EINVAL for any busid not equal
- * to that of the device that this DRM instance attached to.
- */
-int DRM(irq_by_busid)(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_irq_busid_t __user *argp = (void __user *)arg;
- drm_irq_busid_t p;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return -EINVAL;
-
- if (copy_from_user(&p, argp, sizeof(p)))
- return -EFAULT;
-
- if ((p.busnum >> 8) != dev->pci_domain ||
- (p.busnum & 0xff) != dev->pci_bus ||
- p.devnum != dev->pci_slot ||
- p.funcnum != dev->pci_func)
- return -EINVAL;
-
- p.irq = dev->irq;
-
- DRM_DEBUG("%d:%d:%d => IRQ %d\n",
- p.busnum, p.devnum, p.funcnum, p.irq);
- if (copy_to_user(argp, &p, sizeof(p)))
- return -EFAULT;
- return 0;
-}
-
-/**
- * Install IRQ handler.
- *
- * \param dev DRM device.
- * \param irq IRQ number.
- *
- * Initializes the IRQ related data, and setups drm_device::vbl_queue. Installs the handler, calling the driver
- * \c DRM(driver_irq_preinstall)() and \c DRM(driver_irq_postinstall)() functions
- * before and after the installation.
- */
-int DRM(irq_install)( drm_device_t *dev )
-{
- int ret;
- unsigned long sh_flags=0;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return -EINVAL;
-
- if ( dev->irq == 0 )
- return -EINVAL;
-
- down( &dev->struct_sem );
-
- /* Driver must have been initialized */
- if ( !dev->dev_private ) {
- up( &dev->struct_sem );
- return -EINVAL;
- }
-
- if ( dev->irq_enabled ) {
- up( &dev->struct_sem );
- return -EBUSY;
- }
- dev->irq_enabled = 1;
- up( &dev->struct_sem );
-
- DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, dev->irq );
-
- if (drm_core_check_feature(dev, DRIVER_IRQ_VBL)) {
- init_waitqueue_head(&dev->vbl_queue);
-
- spin_lock_init( &dev->vbl_lock );
-
- INIT_LIST_HEAD( &dev->vbl_sigs.head );
-
- dev->vbl_pending = 0;
- }
-
- /* Before installing handler */
- dev->fn_tbl.irq_preinstall(dev);
-
- /* Install handler */
- if (drm_core_check_feature(dev, DRIVER_IRQ_SHARED))
- sh_flags = SA_SHIRQ;
-
- ret = request_irq( dev->irq, dev->fn_tbl.irq_handler,
- sh_flags, dev->devname, dev );
- if ( ret < 0 ) {
- down( &dev->struct_sem );
- dev->irq_enabled = 0;
- up( &dev->struct_sem );
- return ret;
- }
-
- /* After installing handler */
- dev->fn_tbl.irq_postinstall(dev);
-
- return 0;
-}
-
-/**
- * Uninstall the IRQ handler.
- *
- * \param dev DRM device.
- *
- * Calls the driver's \c DRM(driver_irq_uninstall)() function, and stops the irq.
- */
-int DRM(irq_uninstall)( drm_device_t *dev )
-{
- int irq_enabled;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return -EINVAL;
-
- down( &dev->struct_sem );
- irq_enabled = dev->irq_enabled;
- dev->irq_enabled = 0;
- up( &dev->struct_sem );
-
- if ( !irq_enabled )
- return -EINVAL;
-
- DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, dev->irq );
-
- dev->fn_tbl.irq_uninstall(dev);
-
- free_irq( dev->irq, dev );
-
- return 0;
-}
-
-/**
- * IRQ control ioctl.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_control structure.
- * \return zero on success or a negative number on failure.
- *
- * Calls irq_install() or irq_uninstall() according to \p arg.
- */
-int DRM(control)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_control_t ctl;
-
- /* if we haven't irq we fallback for compatibility reasons - this used to be a separate function in drm_dma.h */
-
- if ( copy_from_user( &ctl, (drm_control_t __user *)arg, sizeof(ctl) ) )
- return -EFAULT;
-
- switch ( ctl.func ) {
- case DRM_INST_HANDLER:
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return 0;
- if (dev->if_version < DRM_IF_VERSION(1, 2) &&
- ctl.irq != dev->irq)
- return -EINVAL;
- return DRM(irq_install)( dev );
- case DRM_UNINST_HANDLER:
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return 0;
- return DRM(irq_uninstall)( dev );
- default:
- return -EINVAL;
- }
-}
-
-/**
- * Wait for VBLANK.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param cmd command.
- * \param data user argument, pointing to a drm_wait_vblank structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the IRQ is installed.
- *
- * If a signal is requested checks if this task has already scheduled the same signal
- * for the same vblank sequence number - nothing to be done in
- * that case. If the number of tasks waiting for the interrupt exceeds 100 the
- * function fails. Otherwise adds a new entry to drm_device::vbl_sigs for this
- * task.
- *
- * If a signal is not requested, then calls vblank_wait().
- */
-int DRM(wait_vblank)( DRM_IOCTL_ARGS )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_wait_vblank_t __user *argp = (void __user *)data;
- drm_wait_vblank_t vblwait;
- struct timeval now;
- int ret = 0;
- unsigned int flags;
-
- if (!drm_core_check_feature(dev, DRIVER_IRQ_VBL))
- return -EINVAL;
-
- if (!dev->irq)
- return -EINVAL;
-
- DRM_COPY_FROM_USER_IOCTL( vblwait, argp, sizeof(vblwait) );
-
- switch ( vblwait.request.type & ~_DRM_VBLANK_FLAGS_MASK ) {
- case _DRM_VBLANK_RELATIVE:
- vblwait.request.sequence += atomic_read( &dev->vbl_received );
- vblwait.request.type &= ~_DRM_VBLANK_RELATIVE;
- case _DRM_VBLANK_ABSOLUTE:
- break;
- default:
- return -EINVAL;
- }
-
- flags = vblwait.request.type & _DRM_VBLANK_FLAGS_MASK;
-
- if ( flags & _DRM_VBLANK_SIGNAL ) {
- unsigned long irqflags;
- drm_vbl_sig_t *vbl_sig;
-
- vblwait.reply.sequence = atomic_read( &dev->vbl_received );
-
- spin_lock_irqsave( &dev->vbl_lock, irqflags );
-
- /* Check if this task has already scheduled the same signal
- * for the same vblank sequence number; nothing to be done in
- * that case
- */
- list_for_each_entry( vbl_sig, &dev->vbl_sigs.head, head ) {
- if (vbl_sig->sequence == vblwait.request.sequence
- && vbl_sig->info.si_signo == vblwait.request.signal
- && vbl_sig->task == current)
- {
- spin_unlock_irqrestore( &dev->vbl_lock, irqflags );
- goto done;
- }
- }
-
- if ( dev->vbl_pending >= 100 ) {
- spin_unlock_irqrestore( &dev->vbl_lock, irqflags );
- return -EBUSY;
- }
-
- dev->vbl_pending++;
-
- spin_unlock_irqrestore( &dev->vbl_lock, irqflags );
-
- if ( !( vbl_sig = DRM_MALLOC( sizeof( drm_vbl_sig_t ) ) ) ) {
- return -ENOMEM;
- }
-
- memset( (void *)vbl_sig, 0, sizeof(*vbl_sig) );
-
- vbl_sig->sequence = vblwait.request.sequence;
- vbl_sig->info.si_signo = vblwait.request.signal;
- vbl_sig->task = current;
-
- spin_lock_irqsave( &dev->vbl_lock, irqflags );
-
- list_add_tail( (struct list_head *) vbl_sig, &dev->vbl_sigs.head );
-
- spin_unlock_irqrestore( &dev->vbl_lock, irqflags );
- } else {
- if (dev->fn_tbl.vblank_wait)
- ret = dev->fn_tbl.vblank_wait( dev, &vblwait.request.sequence );
-
- do_gettimeofday( &now );
- vblwait.reply.tval_sec = now.tv_sec;
- vblwait.reply.tval_usec = now.tv_usec;
- }
-
-done:
- DRM_COPY_TO_USER_IOCTL( argp, vblwait, sizeof(vblwait) );
-
- return ret;
-}
-
-/**
- * Send the VBLANK signals.
- *
- * \param dev DRM device.
- *
- * Sends a signal for each task in drm_device::vbl_sigs and empties the list.
- *
- * If a signal is not requested, then calls vblank_wait().
- */
-void DRM(vbl_send_signals)( drm_device_t *dev )
-{
- struct list_head *list, *tmp;
- drm_vbl_sig_t *vbl_sig;
- unsigned int vbl_seq = atomic_read( &dev->vbl_received );
- unsigned long flags;
-
- spin_lock_irqsave( &dev->vbl_lock, flags );
-
- list_for_each_safe( list, tmp, &dev->vbl_sigs.head ) {
- vbl_sig = list_entry( list, drm_vbl_sig_t, head );
- if ( ( vbl_seq - vbl_sig->sequence ) <= (1<<23) ) {
- vbl_sig->info.si_code = vbl_seq;
- send_sig_info( vbl_sig->info.si_signo, &vbl_sig->info, vbl_sig->task );
-
- list_del( list );
-
- DRM_FREE( vbl_sig, sizeof(*vbl_sig) );
-
- dev->vbl_pending--;
- }
- }
-
- spin_unlock_irqrestore( &dev->vbl_lock, flags );
-}
-
-
+++ /dev/null
-/**
- * \file drm_lock.h
- * IOCTLs for locking
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-/** No-op ioctl. */
-int DRM(noop)(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- DRM_DEBUG("\n");
- return 0;
-}
-
-/**
- * Take the heavyweight lock.
- *
- * \param lock lock pointer.
- * \param context locking context.
- * \return one if the lock is held, or zero otherwise.
- *
- * Attempt to mark the lock as held by the given context, via the \p cmpxchg instruction.
- */
-int DRM(lock_take)(__volatile__ unsigned int *lock, unsigned int context)
-{
- unsigned int old, new, prev;
-
- do {
- old = *lock;
- if (old & _DRM_LOCK_HELD) new = old | _DRM_LOCK_CONT;
- else new = context | _DRM_LOCK_HELD;
- prev = cmpxchg(lock, old, new);
- } while (prev != old);
- if (_DRM_LOCKING_CONTEXT(old) == context) {
- if (old & _DRM_LOCK_HELD) {
- if (context != DRM_KERNEL_CONTEXT) {
- DRM_ERROR("%d holds heavyweight lock\n",
- context);
- }
- return 0;
- }
- }
- if (new == (context | _DRM_LOCK_HELD)) {
- /* Have lock */
- return 1;
- }
- return 0;
-}
-
-/**
- * This takes a lock forcibly and hands it to context. Should ONLY be used
- * inside *_unlock to give lock to kernel before calling *_dma_schedule.
- *
- * \param dev DRM device.
- * \param lock lock pointer.
- * \param context locking context.
- * \return always one.
- *
- * Resets the lock file pointer.
- * Marks the lock as held by the given context, via the \p cmpxchg instruction.
- */
-int DRM(lock_transfer)(drm_device_t *dev,
- __volatile__ unsigned int *lock, unsigned int context)
-{
- unsigned int old, new, prev;
-
- dev->lock.filp = NULL;
- do {
- old = *lock;
- new = context | _DRM_LOCK_HELD;
- prev = cmpxchg(lock, old, new);
- } while (prev != old);
- return 1;
-}
-
-/**
- * Free lock.
- *
- * \param dev DRM device.
- * \param lock lock.
- * \param context context.
- *
- * Resets the lock file pointer.
- * Marks the lock as not held, via the \p cmpxchg instruction. Wakes any task
- * waiting on the lock queue.
- */
-int DRM(lock_free)(drm_device_t *dev,
- __volatile__ unsigned int *lock, unsigned int context)
-{
- unsigned int old, new, prev;
-
- dev->lock.filp = NULL;
- do {
- old = *lock;
- new = 0;
- prev = cmpxchg(lock, old, new);
- } while (prev != old);
- if (_DRM_LOCK_IS_HELD(old) && _DRM_LOCKING_CONTEXT(old) != context) {
- DRM_ERROR("%d freed heavyweight lock held by %d\n",
- context,
- _DRM_LOCKING_CONTEXT(old));
- return 1;
- }
- wake_up_interruptible(&dev->lock.lock_queue);
- return 0;
-}
-
-/**
- * If we get here, it means that the process has called DRM_IOCTL_LOCK
- * without calling DRM_IOCTL_UNLOCK.
- *
- * If the lock is not held, then let the signal proceed as usual. If the lock
- * is held, then set the contended flag and keep the signal blocked.
- *
- * \param priv pointer to a drm_sigdata structure.
- * \return one if the signal should be delivered normally, or zero if the
- * signal should be blocked.
- */
-int DRM(notifier)(void *priv)
-{
- drm_sigdata_t *s = (drm_sigdata_t *)priv;
- unsigned int old, new, prev;
-
-
- /* Allow signal delivery if lock isn't held */
- if (!s->lock || !_DRM_LOCK_IS_HELD(s->lock->lock)
- || _DRM_LOCKING_CONTEXT(s->lock->lock) != s->context) return 1;
-
- /* Otherwise, set flag to force call to
- drmUnlock */
- do {
- old = s->lock->lock;
- new = old | _DRM_LOCK_CONT;
- prev = cmpxchg(&s->lock->lock, old, new);
- } while (prev != old);
- return 0;
-}
+++ /dev/null
-/**
- * \file drm_proc.h
- * /proc support for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- *
- * \par Acknowledgements:
- * Matthew J Sottek <matthew.j.sottek@intel.com> sent in a patch to fix
- * the problem with the proc files not outputting all their information.
- */
-
-/*
- * Created: Mon Jan 11 09:48:47 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-static int DRM(name_info)(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-static int DRM(vm_info)(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-static int DRM(clients_info)(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-static int DRM(queues_info)(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-static int DRM(bufs_info)(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-#if DRM_DEBUG_CODE
-static int DRM(vma_info)(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-#endif
-
-/**
- * Proc file list.
- */
-struct drm_proc_list {
- const char *name; /**< file name */
- int (*f)(char *, char **, off_t, int, int *, void *); /**< proc callback*/
-} DRM(proc_list)[] = {
- { "name", DRM(name_info) },
- { "mem", DRM(mem_info) },
- { "vm", DRM(vm_info) },
- { "clients", DRM(clients_info) },
- { "queues", DRM(queues_info) },
- { "bufs", DRM(bufs_info) },
-#if DRM_DEBUG_CODE
- { "vma", DRM(vma_info) },
-#endif
-};
-#define DRM_PROC_ENTRIES (sizeof(DRM(proc_list))/sizeof(DRM(proc_list)[0]))
-
-/**
- * Initialize the DRI proc filesystem for a device.
- *
- * \param dev DRM device.
- * \param minor device minor number.
- * \param root DRI proc dir entry.
- * \param dev_root resulting DRI device proc dir entry.
- * \return root entry pointer on success, or NULL on failure.
- *
- * Create the DRI proc root entry "/proc/dri", the device proc root entry
- * "/proc/dri/%minor%/", and each entry in proc_list as
- * "/proc/dri/%minor%/%name%".
- */
-struct proc_dir_entry *DRM(proc_init)(drm_device_t *dev, int minor,
- struct proc_dir_entry *root,
- struct proc_dir_entry **dev_root)
-{
- struct proc_dir_entry *ent;
- int i, j;
- char name[64];
-
- if (!minor) root = create_proc_entry("dri", S_IFDIR, NULL);
- if (!root) {
- DRM_ERROR("Cannot create /proc/dri\n");
- return NULL;
- }
-
- sprintf(name, "%d", minor);
- *dev_root = create_proc_entry(name, S_IFDIR, root);
- if (!*dev_root) {
- DRM_ERROR("Cannot create /proc/dri/%s\n", name);
- return NULL;
- }
-
- for (i = 0; i < DRM_PROC_ENTRIES; i++) {
- ent = create_proc_entry(DRM(proc_list)[i].name,
- S_IFREG|S_IRUGO, *dev_root);
- if (!ent) {
- DRM_ERROR("Cannot create /proc/dri/%s/%s\n",
- name, DRM(proc_list)[i].name);
- for (j = 0; j < i; j++)
- remove_proc_entry(DRM(proc_list)[i].name,
- *dev_root);
- remove_proc_entry(name, root);
- if (!minor) remove_proc_entry("dri", NULL);
- return NULL;
- }
- ent->read_proc = DRM(proc_list)[i].f;
- ent->data = dev;
- }
-
- return root;
-}
-
-
-/**
- * Cleanup the proc filesystem resources.
- *
- * \param minor device minor number.
- * \param root DRI proc dir entry.
- * \param dev_root DRI device proc dir entry.
- * \return always zero.
- *
- * Remove all proc entries created by proc_init().
- */
-int DRM(proc_cleanup)(int minor, struct proc_dir_entry *root,
- struct proc_dir_entry *dev_root)
-{
- int i;
- char name[64];
-
- if (!root || !dev_root) return 0;
-
- for (i = 0; i < DRM_PROC_ENTRIES; i++)
- remove_proc_entry(DRM(proc_list)[i].name, dev_root);
- sprintf(name, "%d", minor);
- remove_proc_entry(name, root);
- if (!minor) remove_proc_entry("dri", NULL);
-
- return 0;
-}
-
-/**
- * Called when "/proc/dri/.../name" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- *
- * Prints the device name together with the bus id if available.
- */
-static int DRM(name_info)(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- drm_device_t *dev = (drm_device_t *)data;
- int len = 0;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- if (dev->unique) {
- DRM_PROC_PRINT("%s 0x%lx %s\n",
- dev->name, (long)old_encode_dev(dev->device), dev->unique);
- } else {
- DRM_PROC_PRINT("%s 0x%lx\n", dev->name, (long)old_encode_dev(dev->device));
- }
-
- if (len > request + offset) return request;
- *eof = 1;
- return len - offset;
-}
-
-/**
- * Called when "/proc/dri/.../vm" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- *
- * Prints information about all mappings in drm_device::maplist.
- */
-static int DRM(_vm_info)(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- drm_device_t *dev = (drm_device_t *)data;
- int len = 0;
- drm_map_t *map;
- drm_map_list_t *r_list;
- struct list_head *list;
-
- /* Hardcoded from _DRM_FRAME_BUFFER,
- _DRM_REGISTERS, _DRM_SHM, _DRM_AGP, and
- _DRM_SCATTER_GATHER. */
- const char *types[] = { "FB", "REG", "SHM", "AGP", "SG" };
- const char *type;
- int i;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- DRM_PROC_PRINT("slot offset size type flags "
- "address mtrr\n\n");
- i = 0;
- if (dev->maplist != NULL) list_for_each(list, &dev->maplist->head) {
- r_list = list_entry(list, drm_map_list_t, head);
- map = r_list->map;
- if(!map) continue;
- if (map->type < 0 || map->type > 4) type = "??";
- else type = types[map->type];
- DRM_PROC_PRINT("%4d 0x%08lx 0x%08lx %4.4s 0x%02x 0x%08lx ",
- i,
- map->offset,
- map->size,
- type,
- map->flags,
- (unsigned long)map->handle);
- if (map->mtrr < 0) {
- DRM_PROC_PRINT("none\n");
- } else {
- DRM_PROC_PRINT("%4d\n", map->mtrr);
- }
- i++;
- }
-
- if (len > request + offset) return request;
- *eof = 1;
- return len - offset;
-}
-
-/**
- * Simply calls _vm_info() while holding the drm_device::struct_sem lock.
- */
-static int DRM(vm_info)(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- drm_device_t *dev = (drm_device_t *)data;
- int ret;
-
- down(&dev->struct_sem);
- ret = DRM(_vm_info)(buf, start, offset, request, eof, data);
- up(&dev->struct_sem);
- return ret;
-}
-
-/**
- * Called when "/proc/dri/.../queues" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- */
-static int DRM(_queues_info)(char *buf, char **start, off_t offset,
- int request, int *eof, void *data)
-{
- drm_device_t *dev = (drm_device_t *)data;
- int len = 0;
- int i;
- drm_queue_t *q;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- DRM_PROC_PRINT(" ctx/flags use fin"
- " blk/rw/rwf wait flushed queued"
- " locks\n\n");
- for (i = 0; i < dev->queue_count; i++) {
- q = dev->queuelist[i];
- atomic_inc(&q->use_count);
- DRM_PROC_PRINT_RET(atomic_dec(&q->use_count),
- "%5d/0x%03x %5d %5d"
- " %5d/%c%c/%c%c%c %5Zd\n",
- i,
- q->flags,
- atomic_read(&q->use_count),
- atomic_read(&q->finalization),
- atomic_read(&q->block_count),
- atomic_read(&q->block_read) ? 'r' : '-',
- atomic_read(&q->block_write) ? 'w' : '-',
- waitqueue_active(&q->read_queue) ? 'r':'-',
- waitqueue_active(&q->write_queue) ? 'w':'-',
- waitqueue_active(&q->flush_queue) ? 'f':'-',
- DRM_BUFCOUNT(&q->waitlist));
- atomic_dec(&q->use_count);
- }
-
- if (len > request + offset) return request;
- *eof = 1;
- return len - offset;
-}
-
-/**
- * Simply calls _queues_info() while holding the drm_device::struct_sem lock.
- */
-static int DRM(queues_info)(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- drm_device_t *dev = (drm_device_t *)data;
- int ret;
-
- down(&dev->struct_sem);
- ret = DRM(_queues_info)(buf, start, offset, request, eof, data);
- up(&dev->struct_sem);
- return ret;
-}
-
-/**
- * Called when "/proc/dri/.../bufs" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- */
-static int DRM(_bufs_info)(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- drm_device_t *dev = (drm_device_t *)data;
- int len = 0;
- drm_device_dma_t *dma = dev->dma;
- int i;
-
- if (!dma || offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- DRM_PROC_PRINT(" o size count free segs pages kB\n\n");
- for (i = 0; i <= DRM_MAX_ORDER; i++) {
- if (dma->bufs[i].buf_count)
- DRM_PROC_PRINT("%2d %8d %5d %5d %5d %5d %5ld\n",
- i,
- dma->bufs[i].buf_size,
- dma->bufs[i].buf_count,
- atomic_read(&dma->bufs[i]
- .freelist.count),
- dma->bufs[i].seg_count,
- dma->bufs[i].seg_count
- *(1 << dma->bufs[i].page_order),
- (dma->bufs[i].seg_count
- * (1 << dma->bufs[i].page_order))
- * PAGE_SIZE / 1024);
- }
- DRM_PROC_PRINT("\n");
- for (i = 0; i < dma->buf_count; i++) {
- if (i && !(i%32)) DRM_PROC_PRINT("\n");
- DRM_PROC_PRINT(" %d", dma->buflist[i]->list);
- }
- DRM_PROC_PRINT("\n");
-
- if (len > request + offset) return request;
- *eof = 1;
- return len - offset;
-}
-
-/**
- * Simply calls _bufs_info() while holding the drm_device::struct_sem lock.
- */
-static int DRM(bufs_info)(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- drm_device_t *dev = (drm_device_t *)data;
- int ret;
-
- down(&dev->struct_sem);
- ret = DRM(_bufs_info)(buf, start, offset, request, eof, data);
- up(&dev->struct_sem);
- return ret;
-}
-
-/**
- * Called when "/proc/dri/.../clients" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- */
-static int DRM(_clients_info)(char *buf, char **start, off_t offset,
- int request, int *eof, void *data)
-{
- drm_device_t *dev = (drm_device_t *)data;
- int len = 0;
- drm_file_t *priv;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- DRM_PROC_PRINT("a dev pid uid magic ioctls\n\n");
- for (priv = dev->file_first; priv; priv = priv->next) {
- DRM_PROC_PRINT("%c %3d %5d %5d %10u %10lu\n",
- priv->authenticated ? 'y' : 'n',
- priv->minor,
- priv->pid,
- priv->uid,
- priv->magic,
- priv->ioctl_count);
- }
-
- if (len > request + offset) return request;
- *eof = 1;
- return len - offset;
-}
-
-/**
- * Simply calls _clients_info() while holding the drm_device::struct_sem lock.
- */
-static int DRM(clients_info)(char *buf, char **start, off_t offset,
- int request, int *eof, void *data)
-{
- drm_device_t *dev = (drm_device_t *)data;
- int ret;
-
- down(&dev->struct_sem);
- ret = DRM(_clients_info)(buf, start, offset, request, eof, data);
- up(&dev->struct_sem);
- return ret;
-}
-
-#if DRM_DEBUG_CODE
-
-static int DRM(_vma_info)(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- drm_device_t *dev = (drm_device_t *)data;
- int len = 0;
- drm_vma_entry_t *pt;
- struct vm_area_struct *vma;
-#if defined(__i386__)
- unsigned int pgprot;
-#endif
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- DRM_PROC_PRINT("vma use count: %d, high_memory = %p, 0x%08lx\n",
- atomic_read(&dev->vma_count),
- high_memory, virt_to_phys(high_memory));
- for (pt = dev->vmalist; pt; pt = pt->next) {
- if (!(vma = pt->vma)) continue;
- DRM_PROC_PRINT("\n%5d 0x%08lx-0x%08lx %c%c%c%c%c%c 0x%08lx",
- pt->pid,
- vma->vm_start,
- vma->vm_end,
- vma->vm_flags & VM_READ ? 'r' : '-',
- vma->vm_flags & VM_WRITE ? 'w' : '-',
- vma->vm_flags & VM_EXEC ? 'x' : '-',
- vma->vm_flags & VM_MAYSHARE ? 's' : 'p',
- vma->vm_flags & VM_LOCKED ? 'l' : '-',
- vma->vm_flags & VM_IO ? 'i' : '-',
- VM_OFFSET(vma));
-
-#if defined(__i386__)
- pgprot = pgprot_val(vma->vm_page_prot);
- DRM_PROC_PRINT(" %c%c%c%c%c%c%c%c%c",
- pgprot & _PAGE_PRESENT ? 'p' : '-',
- pgprot & _PAGE_RW ? 'w' : 'r',
- pgprot & _PAGE_USER ? 'u' : 's',
- pgprot & _PAGE_PWT ? 't' : 'b',
- pgprot & _PAGE_PCD ? 'u' : 'c',
- pgprot & _PAGE_ACCESSED ? 'a' : '-',
- pgprot & _PAGE_DIRTY ? 'd' : '-',
- pgprot & _PAGE_PSE ? 'm' : 'k',
- pgprot & _PAGE_GLOBAL ? 'g' : 'l' );
-#endif
- DRM_PROC_PRINT("\n");
- }
-
- if (len > request + offset) return request;
- *eof = 1;
- return len - offset;
-}
-
-static int DRM(vma_info)(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- drm_device_t *dev = (drm_device_t *)data;
- int ret;
-
- down(&dev->struct_sem);
- ret = DRM(_vma_info)(buf, start, offset, request, eof, data);
- up(&dev->struct_sem);
- return ret;
-}
-#endif
-
-
+++ /dev/null
-/**
- * \file drm_scatter.h
- * IOCTLs to manage scatter/gather memory
- *
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Mon Dec 18 23:20:54 2000 by gareth@valinux.com
- *
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include <linux/config.h>
-#include <linux/vmalloc.h>
-#include "drmP.h"
-
-#define DEBUG_SCATTER 0
-
-void DRM(sg_cleanup)( drm_sg_mem_t *entry )
-{
- struct page *page;
- int i;
-
- for ( i = 0 ; i < entry->pages ; i++ ) {
- page = entry->pagelist[i];
- if ( page )
- ClearPageReserved( page );
- }
-
- vfree( entry->virtual );
-
- DRM(free)( entry->busaddr,
- entry->pages * sizeof(*entry->busaddr),
- DRM_MEM_PAGES );
- DRM(free)( entry->pagelist,
- entry->pages * sizeof(*entry->pagelist),
- DRM_MEM_PAGES );
- DRM(free)( entry,
- sizeof(*entry),
- DRM_MEM_SGLISTS );
-}
-
-int DRM(sg_alloc)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_scatter_gather_t __user *argp = (void __user *)arg;
- drm_scatter_gather_t request;
- drm_sg_mem_t *entry;
- unsigned long pages, i, j;
-
- DRM_DEBUG( "%s\n", __FUNCTION__ );
-
- if (!drm_core_check_feature(dev, DRIVER_SG))
- return -EINVAL;
-
- if ( dev->sg )
- return -EINVAL;
-
- if ( copy_from_user( &request, argp, sizeof(request) ) )
- return -EFAULT;
-
- entry = DRM(alloc)( sizeof(*entry), DRM_MEM_SGLISTS );
- if ( !entry )
- return -ENOMEM;
-
- memset( entry, 0, sizeof(*entry) );
-
- pages = (request.size + PAGE_SIZE - 1) / PAGE_SIZE;
- DRM_DEBUG( "sg size=%ld pages=%ld\n", request.size, pages );
-
- entry->pages = pages;
- entry->pagelist = DRM(alloc)( pages * sizeof(*entry->pagelist),
- DRM_MEM_PAGES );
- if ( !entry->pagelist ) {
- DRM(free)( entry, sizeof(*entry), DRM_MEM_SGLISTS );
- return -ENOMEM;
- }
-
- memset(entry->pagelist, 0, pages * sizeof(*entry->pagelist));
-
- entry->busaddr = DRM(alloc)( pages * sizeof(*entry->busaddr),
- DRM_MEM_PAGES );
- if ( !entry->busaddr ) {
- DRM(free)( entry->pagelist,
- entry->pages * sizeof(*entry->pagelist),
- DRM_MEM_PAGES );
- DRM(free)( entry,
- sizeof(*entry),
- DRM_MEM_SGLISTS );
- return -ENOMEM;
- }
- memset( (void *)entry->busaddr, 0, pages * sizeof(*entry->busaddr) );
-
- entry->virtual = vmalloc_32( pages << PAGE_SHIFT );
- if ( !entry->virtual ) {
- DRM(free)( entry->busaddr,
- entry->pages * sizeof(*entry->busaddr),
- DRM_MEM_PAGES );
- DRM(free)( entry->pagelist,
- entry->pages * sizeof(*entry->pagelist),
- DRM_MEM_PAGES );
- DRM(free)( entry,
- sizeof(*entry),
- DRM_MEM_SGLISTS );
- return -ENOMEM;
- }
-
- /* This also forces the mapping of COW pages, so our page list
- * will be valid. Please don't remove it...
- */
- memset( entry->virtual, 0, pages << PAGE_SHIFT );
-
- entry->handle = (unsigned long)entry->virtual;
-
- DRM_DEBUG( "sg alloc handle = %08lx\n", entry->handle );
- DRM_DEBUG( "sg alloc virtual = %p\n", entry->virtual );
-
- for ( i = entry->handle, j = 0 ; j < pages ; i += PAGE_SIZE, j++ ) {
- entry->pagelist[j] = vmalloc_to_page((void *)i);
- if (!entry->pagelist[j])
- goto failed;
- SetPageReserved(entry->pagelist[j]);
- }
-
- request.handle = entry->handle;
-
- if ( copy_to_user( argp, &request, sizeof(request) ) ) {
- DRM(sg_cleanup)( entry );
- return -EFAULT;
- }
-
- dev->sg = entry;
-
-#if DEBUG_SCATTER
- /* Verify that each page points to its virtual address, and vice
- * versa.
- */
- {
- int error = 0;
-
- for ( i = 0 ; i < pages ; i++ ) {
- unsigned long *tmp;
-
- tmp = page_address( entry->pagelist[i] );
- for ( j = 0 ;
- j < PAGE_SIZE / sizeof(unsigned long) ;
- j++, tmp++ ) {
- *tmp = 0xcafebabe;
- }
- tmp = (unsigned long *)((u8 *)entry->virtual +
- (PAGE_SIZE * i));
- for( j = 0 ;
- j < PAGE_SIZE / sizeof(unsigned long) ;
- j++, tmp++ ) {
- if ( *tmp != 0xcafebabe && error == 0 ) {
- error = 1;
- DRM_ERROR( "Scatter allocation error, "
- "pagelist does not match "
- "virtual mapping\n" );
- }
- }
- tmp = page_address( entry->pagelist[i] );
- for(j = 0 ;
- j < PAGE_SIZE / sizeof(unsigned long) ;
- j++, tmp++) {
- *tmp = 0;
- }
- }
- if (error == 0)
- DRM_ERROR( "Scatter allocation matches pagelist\n" );
- }
-#endif
-
- return 0;
-
- failed:
- DRM(sg_cleanup)( entry );
- return -ENOMEM;
-}
-
-int DRM(sg_free)( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_scatter_gather_t request;
- drm_sg_mem_t *entry;
-
- if (!drm_core_check_feature(dev, DRIVER_SG))
- return -EINVAL;
-
- if ( copy_from_user( &request,
- (drm_scatter_gather_t __user *)arg,
- sizeof(request) ) )
- return -EFAULT;
-
- entry = dev->sg;
- dev->sg = NULL;
-
- if ( !entry || entry->handle != request.handle )
- return -EINVAL;
-
- DRM_DEBUG( "sg free virtual = %p\n", entry->virtual );
-
- DRM(sg_cleanup)( entry );
-
- return 0;
-}
+++ /dev/null
-/**
- * \file drm_stub.h
- * Stub support
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- */
-
-/*
- * Created: Fri Jan 19 10:48:35 2001 by faith@acm.org
- *
- * Copyright 2001 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-#define DRM_STUB_MAXCARDS 16 /* Enough for one machine */
-
-static struct class_simple *drm_class;
-
-/** Stub list. One for each minor. */
-static struct drm_stub_list {
- const char *name;
- struct file_operations *fops; /**< file operations */
- struct proc_dir_entry *dev_root; /**< proc directory entry */
-} *DRM(stub_list);
-
-static struct proc_dir_entry *DRM(stub_root);
-
-/** Stub information */
-static struct drm_stub_info {
- int (*info_register)(const char *name, struct file_operations *fops,
- drm_device_t *dev);
- int (*info_unregister)(int minor);
-} DRM(stub_info);
-
-/**
- * File \c open operation.
- *
- * \param inode device inode.
- * \param filp file pointer.
- *
- * Puts the drm_stub_list::fops corresponding to the device minor number into
- * \p filp, call the \c open method, and restore the file operations.
- */
-static int DRM(stub_open)(struct inode *inode, struct file *filp)
-{
- int minor = iminor(inode);
- int err = -ENODEV;
- struct file_operations *old_fops;
-
- if (!DRM(stub_list) || !DRM(stub_list)[minor].fops) return -ENODEV;
- old_fops = filp->f_op;
- filp->f_op = fops_get(DRM(stub_list)[minor].fops);
- if (filp->f_op->open && (err = filp->f_op->open(inode, filp))) {
- fops_put(filp->f_op);
- filp->f_op = fops_get(old_fops);
- }
- fops_put(old_fops);
-
- return err;
-}
-
-/** File operations structure */
-static struct file_operations DRM(stub_fops) = {
- .owner = THIS_MODULE,
- .open = DRM(stub_open)
-};
-
-/**
- * Get a device minor number.
- *
- * \param name driver name.
- * \param fops file operations.
- * \param dev DRM device.
- * \return minor number on success, or a negative number on failure.
- *
- * Allocate and initialize ::stub_list if one doesn't exist already. Search an
- * empty entry and initialize it to the given parameters, and create the proc
- * init entry via proc_init().
- */
-static int DRM(stub_getminor)(const char *name, struct file_operations *fops,
- drm_device_t *dev)
-{
- int i;
-
- if (!DRM(stub_list)) {
- DRM(stub_list) = DRM(alloc)(sizeof(*DRM(stub_list))
- * DRM_STUB_MAXCARDS, DRM_MEM_STUB);
- if(!DRM(stub_list)) return -1;
- for (i = 0; i < DRM_STUB_MAXCARDS; i++) {
- DRM(stub_list)[i].name = NULL;
- DRM(stub_list)[i].fops = NULL;
- }
- }
- for (i = 0; i < DRM_STUB_MAXCARDS; i++) {
- if (!DRM(stub_list)[i].fops) {
- DRM(stub_list)[i].name = name;
- DRM(stub_list)[i].fops = fops;
- DRM(stub_root) = DRM(proc_init)(dev, i, DRM(stub_root),
- &DRM(stub_list)[i]
- .dev_root);
- class_simple_device_add(drm_class, MKDEV(DRM_MAJOR, i), NULL, name);
- return i;
- }
- }
- return -1;
-}
-
-/**
- * Put a device minor number.
- *
- * \param minor minor number.
- * \return always zero.
- *
- * Cleans up the proc resources. If a minor is zero then release the foreign
- * "drm" data, otherwise unregisters the "drm" data, frees the stub list and
- * unregisters the character device.
- */
-static int DRM(stub_putminor)(int minor)
-{
- if (minor < 0 || minor >= DRM_STUB_MAXCARDS) return -1;
- DRM(stub_list)[minor].name = NULL;
- DRM(stub_list)[minor].fops = NULL;
- DRM(proc_cleanup)(minor, DRM(stub_root),
- DRM(stub_list)[minor].dev_root);
- if (minor) {
- class_simple_device_remove(MKDEV(DRM_MAJOR, minor));
- inter_module_put("drm");
- } else {
- inter_module_unregister("drm");
- DRM(free)(DRM(stub_list),
- sizeof(*DRM(stub_list)) * DRM_STUB_MAXCARDS,
- DRM_MEM_STUB);
- unregister_chrdev(DRM_MAJOR, "drm");
- class_simple_device_remove(MKDEV(DRM_MAJOR, minor));
- class_simple_destroy(drm_class);
- }
- return 0;
-}
-
-/**
- * Register.
- *
- * \param name driver name.
- * \param fops file operations
- * \param dev DRM device.
- * \return zero on success or a negative number on failure.
- *
- * Attempt to register the char device and get the foreign "drm" data. If
- * successful then another module already registered so gets the stub info,
- * otherwise use this module stub info and make it available for other modules.
- *
- * Finally calls stub_info::info_register.
- */
-int DRM(stub_register)(const char *name, struct file_operations *fops,
- drm_device_t *dev)
-{
- struct drm_stub_info *i = NULL;
- int ret1;
- int ret2;
-
- DRM_DEBUG("\n");
- ret1 = register_chrdev(DRM_MAJOR, "drm", &DRM(stub_fops));
- if (!ret1) {
- drm_class = class_simple_create(THIS_MODULE, "drm");
- if (IS_ERR(drm_class)) {
- printk (KERN_ERR "Error creating drm class.\n");
- unregister_chrdev(DRM_MAJOR, "drm");
- return PTR_ERR(drm_class);
- }
- }
- else if (ret1 == -EBUSY)
- i = (struct drm_stub_info *)inter_module_get("drm");
- else
- return -1;
-
- if (i) {
- /* Already registered */
- DRM(stub_info).info_register = i->info_register;
- DRM(stub_info).info_unregister = i->info_unregister;
- DRM_DEBUG("already registered\n");
- } else if (DRM(stub_info).info_register != DRM(stub_getminor)) {
- DRM(stub_info).info_register = DRM(stub_getminor);
- DRM(stub_info).info_unregister = DRM(stub_putminor);
- DRM_DEBUG("calling inter_module_register\n");
- inter_module_register("drm", THIS_MODULE, &DRM(stub_info));
- }
- if (DRM(stub_info).info_register) {
- ret2 = DRM(stub_info).info_register(name, fops, dev);
- if (ret2) {
- if (!ret1) {
- unregister_chrdev(DRM_MAJOR, "drm");
- class_simple_destroy(drm_class);
- }
- if (!i)
- inter_module_unregister("drm");
- }
- return ret2;
- }
- return -1;
-}
-
-/**
- * Unregister.
- *
- * \param minor
- *
- * Calls drm_stub_info::unregister.
- */
-int DRM(stub_unregister)(int minor)
-{
- DRM_DEBUG("%d\n", minor);
- if (DRM(stub_info).info_unregister)
- return DRM(stub_info).info_unregister(minor);
- return -1;
-}
+++ /dev/null
-/**
- * \file drm_vm.h
- * Memory mapping for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Mon Jan 4 08:58:31 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-
-/**
- * \c nopage method for AGP virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Find the right map and if it's AGP memory find the real physical page to
- * map, get the page, increment the use count and return it.
- */
-#if __OS_HAS_AGP
-static __inline__ struct page *DRM(do_vm_nopage)(struct vm_area_struct *vma,
- unsigned long address)
-{
- drm_file_t *priv = vma->vm_file->private_data;
- drm_device_t *dev = priv->dev;
- drm_map_t *map = NULL;
- drm_map_list_t *r_list;
- struct list_head *list;
-
- /*
- * Find the right map
- */
- if (!drm_core_has_AGP(dev))
- goto vm_nopage_error;
-
- if(!dev->agp || !dev->agp->cant_use_aperture) goto vm_nopage_error;
-
- list_for_each(list, &dev->maplist->head) {
- r_list = list_entry(list, drm_map_list_t, head);
- map = r_list->map;
- if (!map) continue;
- if (map->offset == VM_OFFSET(vma)) break;
- }
-
- if (map && map->type == _DRM_AGP) {
- unsigned long offset = address - vma->vm_start;
- unsigned long baddr = VM_OFFSET(vma) + offset;
- struct drm_agp_mem *agpmem;
- struct page *page;
-
-#ifdef __alpha__
- /*
- * Adjust to a bus-relative address
- */
- baddr -= dev->hose->mem_space->start;
-#endif
-
- /*
- * It's AGP memory - find the real physical page to map
- */
- for(agpmem = dev->agp->memory; agpmem; agpmem = agpmem->next) {
- if (agpmem->bound <= baddr &&
- agpmem->bound + agpmem->pages * PAGE_SIZE > baddr)
- break;
- }
-
- if (!agpmem) goto vm_nopage_error;
-
- /*
- * Get the page, inc the use count, and return it
- */
- offset = (baddr - agpmem->bound) >> PAGE_SHIFT;
- page = virt_to_page(__va(agpmem->memory->memory[offset]));
- get_page(page);
-
- DRM_DEBUG("baddr = 0x%lx page = 0x%p, offset = 0x%lx, count=%d\n",
- baddr, __va(agpmem->memory->memory[offset]), offset,
- page_count(page));
-
- return page;
- }
-vm_nopage_error:
- return NOPAGE_SIGBUS; /* Disallow mremap */
-}
-#else /* __OS_HAS_AGP */
-static __inline__ struct page *DRM(do_vm_nopage)(struct vm_area_struct *vma,
- unsigned long address)
-{
- return NOPAGE_SIGBUS;
-}
-#endif /* __OS_HAS_AGP */
-
-/**
- * \c nopage method for shared virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Get the the mapping, find the real physical page to map, get the page, and
- * return it.
- */
-static __inline__ struct page *DRM(do_vm_shm_nopage)(struct vm_area_struct *vma,
- unsigned long address)
-{
- drm_map_t *map = (drm_map_t *)vma->vm_private_data;
- unsigned long offset;
- unsigned long i;
- struct page *page;
-
- if (address > vma->vm_end) return NOPAGE_SIGBUS; /* Disallow mremap */
- if (!map) return NOPAGE_OOM; /* Nothing allocated */
-
- offset = address - vma->vm_start;
- i = (unsigned long)map->handle + offset;
- page = vmalloc_to_page((void *)i);
- if (!page)
- return NOPAGE_OOM;
- get_page(page);
-
- DRM_DEBUG("shm_nopage 0x%lx\n", address);
- return page;
-}
-
-
-/**
- * \c close method for shared virtual memory.
- *
- * \param vma virtual memory area.
- *
- * Deletes map information if we are the last
- * person to close a mapping and it's not in the global maplist.
- */
-void DRM(vm_shm_close)(struct vm_area_struct *vma)
-{
- drm_file_t *priv = vma->vm_file->private_data;
- drm_device_t *dev = priv->dev;
- drm_vma_entry_t *pt, *prev, *next;
- drm_map_t *map;
- drm_map_list_t *r_list;
- struct list_head *list;
- int found_maps = 0;
-
- DRM_DEBUG("0x%08lx,0x%08lx\n",
- vma->vm_start, vma->vm_end - vma->vm_start);
- atomic_dec(&dev->vma_count);
-
- map = vma->vm_private_data;
-
- down(&dev->struct_sem);
- for (pt = dev->vmalist, prev = NULL; pt; pt = next) {
- next = pt->next;
- if (pt->vma->vm_private_data == map) found_maps++;
- if (pt->vma == vma) {
- if (prev) {
- prev->next = pt->next;
- } else {
- dev->vmalist = pt->next;
- }
- DRM(free)(pt, sizeof(*pt), DRM_MEM_VMAS);
- } else {
- prev = pt;
- }
- }
- /* We were the only map that was found */
- if(found_maps == 1 &&
- map->flags & _DRM_REMOVABLE) {
- /* Check to see if we are in the maplist, if we are not, then
- * we delete this mappings information.
- */
- found_maps = 0;
- list = &dev->maplist->head;
- list_for_each(list, &dev->maplist->head) {
- r_list = list_entry(list, drm_map_list_t, head);
- if (r_list->map == map) found_maps++;
- }
-
- if(!found_maps) {
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
- if (drm_core_has_MTRR(dev) && map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
- DRM(ioremapfree)(map->handle, map->size, dev);
- break;
- case _DRM_SHM:
- vfree(map->handle);
- break;
- case _DRM_AGP:
- case _DRM_SCATTER_GATHER:
- break;
- }
- DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
- }
- }
- up(&dev->struct_sem);
-}
-
-/**
- * \c nopage method for DMA virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Determine the page number from the page offset and get it from drm_device_dma::pagelist.
- */
-static __inline__ struct page *DRM(do_vm_dma_nopage)(struct vm_area_struct *vma,
- unsigned long address)
-{
- drm_file_t *priv = vma->vm_file->private_data;
- drm_device_t *dev = priv->dev;
- drm_device_dma_t *dma = dev->dma;
- unsigned long offset;
- unsigned long page_nr;
- struct page *page;
-
- if (!dma) return NOPAGE_SIGBUS; /* Error */
- if (address > vma->vm_end) return NOPAGE_SIGBUS; /* Disallow mremap */
- if (!dma->pagelist) return NOPAGE_OOM ; /* Nothing allocated */
-
- offset = address - vma->vm_start; /* vm_[pg]off[set] should be 0 */
- page_nr = offset >> PAGE_SHIFT;
- page = virt_to_page((dma->pagelist[page_nr] +
- (offset & (~PAGE_MASK))));
-
- get_page(page);
-
- DRM_DEBUG("dma_nopage 0x%lx (page %lu)\n", address, page_nr);
- return page;
-}
-
-/**
- * \c nopage method for scatter-gather virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Determine the map offset from the page offset and get it from drm_sg_mem::pagelist.
- */
-static __inline__ struct page *DRM(do_vm_sg_nopage)(struct vm_area_struct *vma,
- unsigned long address)
-{
- drm_map_t *map = (drm_map_t *)vma->vm_private_data;
- drm_file_t *priv = vma->vm_file->private_data;
- drm_device_t *dev = priv->dev;
- drm_sg_mem_t *entry = dev->sg;
- unsigned long offset;
- unsigned long map_offset;
- unsigned long page_offset;
- struct page *page;
-
- if (!entry) return NOPAGE_SIGBUS; /* Error */
- if (address > vma->vm_end) return NOPAGE_SIGBUS; /* Disallow mremap */
- if (!entry->pagelist) return NOPAGE_OOM ; /* Nothing allocated */
-
-
- offset = address - vma->vm_start;
- map_offset = map->offset - dev->sg->handle;
- page_offset = (offset >> PAGE_SHIFT) + (map_offset >> PAGE_SHIFT);
- page = entry->pagelist[page_offset];
- get_page(page);
-
- return page;
-}
-
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-
-static struct page *DRM(vm_nopage)(struct vm_area_struct *vma,
- unsigned long address,
- int *type) {
- if (type) *type = VM_FAULT_MINOR;
- return DRM(do_vm_nopage)(vma, address);
-}
-
-static struct page *DRM(vm_shm_nopage)(struct vm_area_struct *vma,
- unsigned long address,
- int *type) {
- if (type) *type = VM_FAULT_MINOR;
- return DRM(do_vm_shm_nopage)(vma, address);
-}
-
-static struct page *DRM(vm_dma_nopage)(struct vm_area_struct *vma,
- unsigned long address,
- int *type) {
- if (type) *type = VM_FAULT_MINOR;
- return DRM(do_vm_dma_nopage)(vma, address);
-}
-
-static struct page *DRM(vm_sg_nopage)(struct vm_area_struct *vma,
- unsigned long address,
- int *type) {
- if (type) *type = VM_FAULT_MINOR;
- return DRM(do_vm_sg_nopage)(vma, address);
-}
-
-#else /* LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,0) */
-
-static struct page *DRM(vm_nopage)(struct vm_area_struct *vma,
- unsigned long address,
- int unused) {
- return DRM(do_vm_nopage)(vma, address);
-}
-
-static struct page *DRM(vm_shm_nopage)(struct vm_area_struct *vma,
- unsigned long address,
- int unused) {
- return DRM(do_vm_shm_nopage)(vma, address);
-}
-
-static struct page *DRM(vm_dma_nopage)(struct vm_area_struct *vma,
- unsigned long address,
- int unused) {
- return DRM(do_vm_dma_nopage)(vma, address);
-}
-
-static struct page *DRM(vm_sg_nopage)(struct vm_area_struct *vma,
- unsigned long address,
- int unused) {
- return DRM(do_vm_sg_nopage)(vma, address);
-}
-
-#endif
-
-
-/** AGP virtual memory operations */
-static struct vm_operations_struct DRM(vm_ops) = {
- .nopage = DRM(vm_nopage),
- .open = DRM(vm_open),
- .close = DRM(vm_close),
-};
-
-/** Shared virtual memory operations */
-static struct vm_operations_struct DRM(vm_shm_ops) = {
- .nopage = DRM(vm_shm_nopage),
- .open = DRM(vm_open),
- .close = DRM(vm_shm_close),
-};
-
-/** DMA virtual memory operations */
-static struct vm_operations_struct DRM(vm_dma_ops) = {
- .nopage = DRM(vm_dma_nopage),
- .open = DRM(vm_open),
- .close = DRM(vm_close),
-};
-
-/** Scatter-gather virtual memory operations */
-static struct vm_operations_struct DRM(vm_sg_ops) = {
- .nopage = DRM(vm_sg_nopage),
- .open = DRM(vm_open),
- .close = DRM(vm_close),
-};
-
-
-/**
- * \c open method for shared virtual memory.
- *
- * \param vma virtual memory area.
- *
- * Create a new drm_vma_entry structure as the \p vma private data entry and
- * add it to drm_device::vmalist.
- */
-void DRM(vm_open)(struct vm_area_struct *vma)
-{
- drm_file_t *priv = vma->vm_file->private_data;
- drm_device_t *dev = priv->dev;
- drm_vma_entry_t *vma_entry;
-
- DRM_DEBUG("0x%08lx,0x%08lx\n",
- vma->vm_start, vma->vm_end - vma->vm_start);
- atomic_inc(&dev->vma_count);
-
- vma_entry = DRM(alloc)(sizeof(*vma_entry), DRM_MEM_VMAS);
- if (vma_entry) {
- down(&dev->struct_sem);
- vma_entry->vma = vma;
- vma_entry->next = dev->vmalist;
- vma_entry->pid = current->pid;
- dev->vmalist = vma_entry;
- up(&dev->struct_sem);
- }
-}
-
-/**
- * \c close method for all virtual memory types.
- *
- * \param vma virtual memory area.
- *
- * Search the \p vma private data entry in drm_device::vmalist, unlink it, and
- * free it.
- */
-void DRM(vm_close)(struct vm_area_struct *vma)
-{
- drm_file_t *priv = vma->vm_file->private_data;
- drm_device_t *dev = priv->dev;
- drm_vma_entry_t *pt, *prev;
-
- DRM_DEBUG("0x%08lx,0x%08lx\n",
- vma->vm_start, vma->vm_end - vma->vm_start);
- atomic_dec(&dev->vma_count);
-
- down(&dev->struct_sem);
- for (pt = dev->vmalist, prev = NULL; pt; prev = pt, pt = pt->next) {
- if (pt->vma == vma) {
- if (prev) {
- prev->next = pt->next;
- } else {
- dev->vmalist = pt->next;
- }
- DRM(free)(pt, sizeof(*pt), DRM_MEM_VMAS);
- break;
- }
- }
- up(&dev->struct_sem);
-}
-
-/**
- * mmap DMA memory.
- *
- * \param filp file pointer.
- * \param vma virtual memory area.
- * \return zero on success or a negative number on failure.
- *
- * Sets the virtual memory area operations structure to vm_dma_ops, the file
- * pointer, and calls vm_open().
- */
-int DRM(mmap_dma)(struct file *filp, struct vm_area_struct *vma)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- drm_device_dma_t *dma;
- unsigned long length = vma->vm_end - vma->vm_start;
-
- lock_kernel();
- dev = priv->dev;
- dma = dev->dma;
- DRM_DEBUG("start = 0x%lx, end = 0x%lx, offset = 0x%lx\n",
- vma->vm_start, vma->vm_end, VM_OFFSET(vma));
-
- /* Length must match exact page count */
- if (!dma || (length >> PAGE_SHIFT) != dma->page_count) {
- unlock_kernel();
- return -EINVAL;
- }
- unlock_kernel();
-
- vma->vm_ops = &DRM(vm_dma_ops);
-
-#if LINUX_VERSION_CODE <= 0x02040e /* KERNEL_VERSION(2,4,14) */
- vma->vm_flags |= VM_LOCKED | VM_SHM; /* Don't swap */
-#else
- vma->vm_flags |= VM_RESERVED; /* Don't swap */
-#endif
-
- vma->vm_file = filp; /* Needed for drm_vm_open() */
- DRM(vm_open)(vma);
- return 0;
-}
-
-unsigned long DRM(core_get_map_ofs)(drm_map_t *map)
-{
- return map->offset;
-}
-
-unsigned long DRM(core_get_reg_ofs)(struct drm_device *dev)
-{
-#ifdef __alpha__
- return dev->hose->dense_mem_base - dev->hose->mem_space->start;
-#else
- return 0;
-#endif
-}
-
-/**
- * mmap DMA memory.
- *
- * \param filp file pointer.
- * \param vma virtual memory area.
- * \return zero on success or a negative number on failure.
- *
- * If the virtual memory area has no offset associated with it then it's a DMA
- * area, so calls mmap_dma(). Otherwise searches the map in drm_device::maplist,
- * checks that the restricted flag is not set, sets the virtual memory operations
- * according to the mapping type and remaps the pages. Finally sets the file
- * pointer and calls vm_open().
- */
-int DRM(mmap)(struct file *filp, struct vm_area_struct *vma)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_map_t *map = NULL;
- drm_map_list_t *r_list;
- unsigned long offset = 0;
- struct list_head *list;
-
- DRM_DEBUG("start = 0x%lx, end = 0x%lx, offset = 0x%lx\n",
- vma->vm_start, vma->vm_end, VM_OFFSET(vma));
-
- if ( !priv->authenticated ) return -EACCES;
-
- /* We check for "dma". On Apple's UniNorth, it's valid to have
- * the AGP mapped at physical address 0
- * --BenH.
- */
- if (!VM_OFFSET(vma)
-#if __OS_HAS_AGP
- && (!dev->agp || dev->agp->agp_info.device->vendor != PCI_VENDOR_ID_APPLE)
-#endif
- )
- return DRM(mmap_dma)(filp, vma);
-
- /* A sequential search of a linked list is
- fine here because: 1) there will only be
- about 5-10 entries in the list and, 2) a
- DRI client only has to do this mapping
- once, so it doesn't have to be optimized
- for performance, even if the list was a
- bit longer. */
- list_for_each(list, &dev->maplist->head) {
- unsigned long off;
-
- r_list = list_entry(list, drm_map_list_t, head);
- map = r_list->map;
- if (!map) continue;
- off = dev->fn_tbl.get_map_ofs(map);
- if (off == VM_OFFSET(vma)) break;
- }
-
- if (!map || ((map->flags&_DRM_RESTRICTED) && !capable(CAP_SYS_ADMIN)))
- return -EPERM;
-
- /* Check for valid size. */
- if (map->size != vma->vm_end - vma->vm_start) return -EINVAL;
-
- if (!capable(CAP_SYS_ADMIN) && (map->flags & _DRM_READ_ONLY)) {
- vma->vm_flags &= ~(VM_WRITE | VM_MAYWRITE);
-#if defined(__i386__) || defined(__x86_64__)
- pgprot_val(vma->vm_page_prot) &= ~_PAGE_RW;
-#else
- /* Ye gads this is ugly. With more thought
- we could move this up higher and use
- `protection_map' instead. */
- vma->vm_page_prot = __pgprot(pte_val(pte_wrprotect(
- __pte(pgprot_val(vma->vm_page_prot)))));
-#endif
- }
-
- switch (map->type) {
- case _DRM_AGP:
- if (drm_core_has_AGP(dev) && dev->agp->cant_use_aperture) {
- /*
- * On some platforms we can't talk to bus dma address from the CPU, so for
- * memory of type DRM_AGP, we'll deal with sorting out the real physical
- * pages and mappings in nopage()
- */
-#if defined(__powerpc__)
- pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
-#endif
- vma->vm_ops = &DRM(vm_ops);
- break;
- }
- /* fall through to _DRM_FRAME_BUFFER... */
- case _DRM_FRAME_BUFFER:
- case _DRM_REGISTERS:
- if (VM_OFFSET(vma) >= __pa(high_memory)) {
-#if defined(__i386__) || defined(__x86_64__)
- if (boot_cpu_data.x86 > 3 && map->type != _DRM_AGP) {
- pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
- pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT;
- }
-#elif defined(__powerpc__)
- pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE | _PAGE_GUARDED;
-#endif
- vma->vm_flags |= VM_IO; /* not in core dump */
- }
-#if defined(__ia64__)
- if (map->type != _DRM_AGP)
- vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
-#endif
- offset = dev->fn_tbl.get_reg_ofs(dev);
-#ifdef __sparc__
- if (io_remap_page_range(DRM_RPR_ARG(vma) vma->vm_start,
- VM_OFFSET(vma) + offset,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot, 0))
-#else
- if (remap_pfn_range(DRM_RPR_ARG(vma) vma->vm_start,
- (VM_OFFSET(vma) + offset) >> PAGE_SHIFT,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot))
-#endif
- return -EAGAIN;
- DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx,"
- " offset = 0x%lx\n",
- map->type,
- vma->vm_start, vma->vm_end, VM_OFFSET(vma) + offset);
- vma->vm_ops = &DRM(vm_ops);
- break;
- case _DRM_SHM:
- vma->vm_ops = &DRM(vm_shm_ops);
- vma->vm_private_data = (void *)map;
- /* Don't let this area swap. Change when
- DRM_KERNEL advisory is supported. */
-#if LINUX_VERSION_CODE <= 0x02040e /* KERNEL_VERSION(2,4,14) */
- vma->vm_flags |= VM_LOCKED;
-#else
- vma->vm_flags |= VM_RESERVED;
-#endif
- break;
- case _DRM_SCATTER_GATHER:
- vma->vm_ops = &DRM(vm_sg_ops);
- vma->vm_private_data = (void *)map;
-#if LINUX_VERSION_CODE <= 0x02040e /* KERNEL_VERSION(2,4,14) */
- vma->vm_flags |= VM_LOCKED;
-#else
- vma->vm_flags |= VM_RESERVED;
-#endif
- break;
- default:
- return -EINVAL; /* This should never happen. */
- }
-#if LINUX_VERSION_CODE <= 0x02040e /* KERNEL_VERSION(2,4,14) */
- vma->vm_flags |= VM_LOCKED | VM_SHM; /* Don't swap */
-#else
- vma->vm_flags |= VM_RESERVED; /* Don't swap */
-#endif
-
- vma->vm_file = filp; /* Needed for drm_vm_open() */
- DRM(vm_open)(vma);
- return 0;
-}
+++ /dev/null
-/* ffb.h -- ffb DRM template customization -*- linux-c -*-
- */
-
-#ifndef __FFB_H__
-#define __FFB_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) ffb_##x
-
-#endif
-
+++ /dev/null
-/* gamma.c -- 3dlabs GMX 2000 driver -*- linux-c -*-
- * Created: Mon Jan 4 08:58:31 1999 by gareth@valinux.com
- *
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#ifndef __GAMMA_H__
-#define __GAMMA_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) gamma_##x
-
-/* General customization:
- */
-#define DRIVER_AUTHOR "VA Linux Systems Inc."
-
-#define DRIVER_NAME "gamma"
-#define DRIVER_DESC "3DLabs gamma"
-#define DRIVER_DATE "20010624"
-
-#define DRIVER_MAJOR 2
-#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 0
-
-#define DRIVER_IOCTLS \
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { gamma_dma, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_GAMMA_INIT)] = { gamma_dma_init, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_GAMMA_COPY)] = { gamma_dma_copy, 1, 1 }
-
-#define IOCTL_TABLE_NAME DRM(ioctls)
-#define IOCTL_FUNC_NAME DRM(ioctl)
-
-#define __HAVE_COUNTERS 5
-#define __HAVE_COUNTER6 _DRM_STAT_IRQ
-#define __HAVE_COUNTER7 _DRM_STAT_DMA
-#define __HAVE_COUNTER8 _DRM_STAT_PRIMARY
-#define __HAVE_COUNTER9 _DRM_STAT_SPECIAL
-#define __HAVE_COUNTER10 _DRM_STAT_MISSED
-
-/* Driver customization:
- */
-#define DRIVER_PRETAKEDOWN() do { \
- gamma_do_cleanup_dma( dev ); \
-} while (0)
-
-/* DMA customization:
- */
-#define __HAVE_MULTIPLE_DMA_QUEUES 1
-#define __HAVE_DMA_WAITQUEUE 1
-
-/* removed from DRM HAVE_DMA_FREELIST & HAVE_DMA_SCHEDULE */
-
-#endif /* __GAMMA_H__ */
+++ /dev/null
-/* i810.h -- Intel i810/i815 DRM template customization -*- linux-c -*-
- * Created: Thu Feb 15 00:01:12 2001 by gareth@valinux.com
- *
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#ifndef __I810_H__
-#define __I810_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) i810_##x
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "VA Linux Systems Inc."
-
-#define DRIVER_NAME "i810"
-#define DRIVER_DESC "Intel i810"
-#define DRIVER_DATE "20030605"
-
-/* Interface history
- *
- * 1.1 - XFree86 4.1
- * 1.2 - XvMC interfaces
- * - XFree86 4.2
- * 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility)
- * - Remove requirement for interrupt (leave stubs again)
- * 1.3 - Add page flipping.
- * 1.4 - fix DRM interface
- */
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 4
-#define DRIVER_PATCHLEVEL 0
-
-#define DRIVER_IOCTLS \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_INIT)] = { i810_dma_init, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_VERTEX)] = { i810_dma_vertex, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_CLEAR)] = { i810_clear_bufs, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_FLUSH)] = { i810_flush_ioctl, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_GETAGE)] = { i810_getage, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_GETBUF)] = { i810_getbuf, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_SWAP)] = { i810_swap_bufs, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_COPY)] = { i810_copybuf, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_DOCOPY)] = { i810_docopy, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_OV0INFO)] = { i810_ov0_info, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_FSTATUS)] = { i810_fstatus, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_OV0FLIP)] = { i810_ov0_flip, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_MC)] = { i810_dma_mc, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_RSTATUS)] = { i810_rstatus, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I810_FLIP)] = { i810_flip_bufs, 1, 0 }
-
-#endif
+++ /dev/null
-/* i830.h -- Intel I830 DRM template customization -*- linux-c -*-
- * Created: Thu Feb 15 00:01:12 2001 by gareth@valinux.com
- *
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#ifndef __I830_H__
-#define __I830_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) i830_##x
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "VA Linux Systems Inc."
-
-#define DRIVER_NAME "i830"
-#define DRIVER_DESC "Intel 830M"
-#define DRIVER_DATE "20021108"
-
-/* Interface history:
- *
- * 1.1: Original.
- * 1.2: ?
- * 1.3: New irq emit/wait ioctls.
- * New pageflip ioctl.
- * New getparam ioctl.
- * State for texunits 3&4 in sarea.
- * New (alternative) layout for texture state.
- */
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 3
-#define DRIVER_PATCHLEVEL 2
-
-#define DRIVER_IOCTLS \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_INIT)] = { i830_dma_init, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_VERTEX)] = { i830_dma_vertex, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_CLEAR)] = { i830_clear_bufs, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_FLUSH)] = { i830_flush_ioctl, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_GETAGE)] = { i830_getage, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_GETBUF)] = { i830_getbuf, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_SWAP)] = { i830_swap_bufs, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_COPY)] = { i830_copybuf, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_DOCOPY)] = { i830_docopy, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_FLIP)] = { i830_flip_bufs, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_IRQ_EMIT)] = { i830_irq_emit, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_IRQ_WAIT)] = { i830_irq_wait, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_GETPARAM)] = { i830_getparam, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I830_SETPARAM)] = { i830_setparam, 1, 0 }
-
-/* Driver will work either way: IRQ's save cpu time when waiting for
- * the card, but are subject to subtle interactions between bios,
- * hardware and the driver.
- */
-/* XXX: Add vblank support? */
-#define USE_IRQS 0
-
-#endif
+++ /dev/null
-/* i915.h -- Intel I915 DRM template customization -*- linux-c -*-
- */
-/**************************************************************************
- *
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- **************************************************************************/
-
-#ifndef __I915_H__
-#define __I915_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) i915_##x
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "Tungsten Graphics, Inc."
-
-#define DRIVER_NAME "i915"
-#define DRIVER_DESC "Intel Graphics"
-#define DRIVER_DATE "20040405"
-
-/* Interface history:
- *
- * 1.1: Original.
- */
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 1
-#define DRIVER_PATCHLEVEL 0
-
-#define DRIVER_IOCTLS \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_INIT)] = { i915_dma_init, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_FLUSH)] = { i915_flush_ioctl, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_FLIP)] = { i915_flip_bufs, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_BATCHBUFFER)] = { i915_batchbuffer, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_IRQ_EMIT)] = { i915_irq_emit, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_IRQ_WAIT)] = { i915_irq_wait, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_GETPARAM)] = { i915_getparam, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_SETPARAM)] = { i915_setparam, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_ALLOC)] = { i915_mem_alloc, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_FREE)] = { i915_mem_free, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_INIT_HEAP)] = { i915_mem_init_heap, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_I915_CMDBUFFER)] = { i915_cmdbuffer, 1, 0 }
-
-/* We use our own dma mechanisms, not the drm template code. However,
- * the shared IRQ code is useful to us:
- */
-#define __HAVE_PM 1
-
-#endif
+++ /dev/null
-/* mga.h -- Matrox G200/G400 DRM template customization -*- linux-c -*-
- * Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com
- *
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#ifndef __MGA_H__
-#define __MGA_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) mga_##x
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
-
-#define DRIVER_NAME "mga"
-#define DRIVER_DESC "Matrox G200/G400"
-#define DRIVER_DATE "20021029"
-
-#define DRIVER_MAJOR 3
-#define DRIVER_MINOR 1
-#define DRIVER_PATCHLEVEL 0
-
-#define DRIVER_IOCTLS \
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_dma_blit, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_GETPARAM)]= { mga_getparam, 1, 0 },
-
-#endif
+++ /dev/null
-/* r128.h -- ATI Rage 128 DRM template customization -*- linux-c -*-
- * Created: Wed Feb 14 16:07:10 2001 by gareth@valinux.com
- *
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#ifndef __R128_H__
-#define __R128_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) r128_##x
-
-/* General customization:
- */
-#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
-
-#define DRIVER_NAME "r128"
-#define DRIVER_DESC "ATI Rage 128"
-#define DRIVER_DATE "20030725"
-
-#define DRIVER_MAJOR 2
-#define DRIVER_MINOR 5
-#define DRIVER_PATCHLEVEL 0
-
-/* Interface history:
- *
- * ?? - ??
- * 2.4 - Add support for ycbcr textures (no new ioctls)
- * 2.5 - Add FLIP ioctl, disable FULLSCREEN.
- */
-#define DRIVER_IOCTLS \
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { r128_cce_buffers, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_INIT)] = { r128_cce_init, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_START)] = { r128_cce_start, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_STOP)] = { r128_cce_stop, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_RESET)] = { r128_cce_reset, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_IDLE)] = { r128_cce_idle, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)] = { r128_engine_reset, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_FULLSCREEN)] = { r128_fullscreen, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_SWAP)] = { r128_cce_swap, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_FLIP)] = { r128_cce_flip, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CLEAR)] = { r128_cce_clear, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)] = { r128_cce_vertex, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_INDICES)] = { r128_cce_indices, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_BLIT)] = { r128_cce_blit, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_DEPTH)] = { r128_cce_depth, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_R128_GETPARAM)] = { r128_getparam, 1, 0 },
-
-#endif
+++ /dev/null
-/* radeon.h -- ATI Radeon DRM template customization -*- linux-c -*-
- * Created: Wed Feb 14 17:07:34 2001 by gareth@valinux.com
- *
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- * Keith Whitwell <keith@tungstengraphics.com>
- */
-
-#ifndef __RADEON_H__
-#define __RADEON_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) radeon_##x
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "Gareth Hughes, Keith Whitwell, others."
-
-#define DRIVER_NAME "radeon"
-#define DRIVER_DESC "ATI Radeon"
-#define DRIVER_DATE "20020828"
-
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 11
-#define DRIVER_PATCHLEVEL 0
-
-/* Interface history:
- *
- * 1.1 - ??
- * 1.2 - Add vertex2 ioctl (keith)
- * - Add stencil capability to clear ioctl (gareth, keith)
- * - Increase MAX_TEXTURE_LEVELS (brian)
- * 1.3 - Add cmdbuf ioctl (keith)
- * - Add support for new radeon packets (keith)
- * - Add getparam ioctl (keith)
- * - Add flip-buffers ioctl, deprecate fullscreen foo (keith).
- * 1.4 - Add scratch registers to get_param ioctl.
- * 1.5 - Add r200 packets to cmdbuf ioctl
- * - Add r200 function to init ioctl
- * - Add 'scalar2' instruction to cmdbuf
- * 1.6 - Add static GART memory manager
- * Add irq handler (won't be turned on unless X server knows to)
- * Add irq ioctls and irq_active getparam.
- * Add wait command for cmdbuf ioctl
- * Add GART offset query for getparam
- * 1.7 - Add support for cube map registers: R200_PP_CUBIC_FACES_[0..5]
- * and R200_PP_CUBIC_OFFSET_F1_[0..5].
- * Added packets R200_EMIT_PP_CUBIC_FACES_[0..5] and
- * R200_EMIT_PP_CUBIC_OFFSETS_[0..5]. (brian)
- * 1.8 - Remove need to call cleanup ioctls on last client exit (keith)
- * Add 'GET' queries for starting additional clients on different VT's.
- * 1.9 - Add DRM_IOCTL_RADEON_CP_RESUME ioctl.
- * Add texture rectangle support for r100.
- * 1.10- Add SETPARAM ioctl; first parameter to set is FB_LOCATION, which
- * clients use to tell the DRM where they think the framebuffer is
- * located in the card's address space
- * 1.11- Add packet R200_EMIT_RB3D_BLENDCOLOR to support GL_EXT_blend_color
- * and GL_EXT_blend_[func|equation]_separate on r200
- */
-#define DRIVER_IOCTLS \
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)] = { radeon_cp_start, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESUME)] = { radeon_cp_resume, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)] = { radeon_engine_reset, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_TEXTURE)] = { radeon_cp_texture, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)] = { radeon_cp_indirect, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX2)] = { radeon_cp_vertex2, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CMDBUF)] = { radeon_cp_cmdbuf, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_GETPARAM)] = { radeon_cp_getparam, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FLIP)] = { radeon_cp_flip, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_ALLOC)] = { radeon_mem_alloc, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FREE)] = { radeon_mem_free, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INIT_HEAP)] = { radeon_mem_init_heap, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_EMIT)] = { radeon_irq_emit, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_WAIT)] = { radeon_irq_wait, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SETPARAM)] = { radeon_cp_setparam, 1, 0 }, \
-
-#endif
+++ /dev/null
-/* sis_drv.h -- Private header for sis driver -*- linux-c -*-
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h,v 1.3 2002/10/30 12:52:38 alanh Exp $ */
-
-#ifndef __SIS_H__
-#define __SIS_H__
-
-/* This remains constant for all DRM template files.
- * Name it sisdrv_##x as there's a conflict with sis_free/malloc in the kernel
- * that's used for fb devices
- */
-#ifdef __linux__
-#define DRM(x) sisdrv_##x
-#else
-#define DRM(x) sis_##x
-#endif
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "SIS"
-#define DRIVER_NAME "sis"
-#define DRIVER_DESC "SIS 300/630/540"
-#define DRIVER_DATE "20030826"
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 1
-#define DRIVER_PATCHLEVEL 0
-
-#define DRIVER_IOCTLS \
- [DRM_IOCTL_NR(DRM_IOCTL_SIS_FB_ALLOC)] = { sis_fb_alloc, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_SIS_FB_FREE)] = { sis_fb_free, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_SIS_AGP_INIT)] = { sis_ioctl_agp_init, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_SIS_AGP_ALLOC)] = { sis_ioctl_agp_alloc, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_SIS_AGP_FREE)] = { sis_ioctl_agp_free, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_SIS_FB_INIT)] = { sis_fb_init, 1, 1 }
-
-#endif
+++ /dev/null
-/* tdfx.h -- 3dfx DRM template customization -*- linux-c -*-
- * Created: Wed Feb 14 12:32:32 2001 by gareth@valinux.com
- *
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#ifndef __TDFX_H__
-#define __TDFX_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) tdfx_##x
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "VA Linux Systems Inc."
-
-#define DRIVER_NAME "tdfx"
-#define DRIVER_DESC "3dfx Banshee/Voodoo3+"
-#define DRIVER_DATE "20010216"
-
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 0
-
-#endif
+++ /dev/null
-/*
- * dz.c: Serial port driver for DECStations equiped
- * with the DZ chipset.
- *
- * Copyright (C) 1998 Olivier A. D. Lebaillif
- *
- * Email: olivier.lebaillif@ifrsys.com
- *
- * [31-AUG-98] triemer
- * Changed IRQ to use Harald's dec internals interrupts.h
- * removed base_addr code - moving address assignment to setup.c
- * Changed name of dz_init to rs_init to be consistent with tc code
- * [13-NOV-98] triemer fixed code to receive characters
- * after patches by harald to irq code.
- * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
- * field from "current" - somewhere between 2.1.121 and 2.1.131
-Qua Jun 27 15:02:26 BRT 2001
- * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
- *
- * Parts (C) 1999 David Airlie, airlied@linux.ie
- * [07-SEP-99] Bugfixes
- */
-
-/* #define DEBUG_DZ 1 */
-
-#include <linux/module.h>
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/mm.h>
-#include <linux/major.h>
-#include <linux/param.h>
-#include <linux/interrupt.h>
-#include <linux/serial.h>
-#include <linux/serialP.h>
-#include <asm-mips/wbflush.h>
-#include <asm/dec/interrupts.h> /* for definition of SERIAL */
-
-/* for definition of struct console */
-#ifdef CONFIG_SERIAL_CONSOLE
-#define CONSOLE_LINE (3)
-#endif /* ifdef CONFIG_SERIAL_CONSOLE */
-#if defined(CONFIG_SERIAL_CONSOLE) || defined(DEBUG_DZ)
-#include <linux/console.h>
-#endif /* if defined(CONFIG_SERIAL_CONSOLE) || defined(DEBUG_DZ) */
-
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-
-#include <asm/uaccess.h>
-#include <asm/irq.h>
-#include <asm/dec/machtype.h>
-#include <asm/dec/kn01.h>
-#include <asm/dec/kn02.h>
-
-#ifdef DEBUG_DZ
-#include <linux/ptrace.h>
-#include <linux/fs.h>
-#include <asm/bootinfo.h>
-
-extern int (*prom_printf) (char *,...);
-#endif
-
-
-
-#include "dz.h"
-
-#define DZ_INTR_DEBUG 1
-
-DECLARE_TASK_QUEUE(tq_serial);
-
-static struct dz_serial *lines[4];
-static unsigned char tmp_buffer[256];
-
-
-
-#ifdef DEBUG_DZ
-/*
- * debugging code to send out chars via prom
- */
-static void debug_console( const char *s,int count)
-{
- unsigned i;
-
- for (i = 0; i < count; i++) {
- if (*s == 10)
- prom_printf("%c", 13);
- prom_printf("%c", *s++);
- }
-}
-#endif
-
-/*
- * ------------------------------------------------------------
- * dz_in () and dz_out ()
- *
- * These routines are used to access the registers of the DZ
- * chip, hiding relocation differences between implementation.
- * ------------------------------------------------------------
- */
-
-static inline unsigned short dz_in (struct dz_serial *info, unsigned offset)
-{
- volatile u16 *addr = (volatile u16 *)(info->port + offset);
-
- return *addr;
-}
-
-static inline void dz_out (struct dz_serial *info, unsigned offset,
- unsigned short value)
-{
- volatile u16 *addr = (volatile u16 *)(info->port + offset);
- *addr = value;
-}
-
-/*
- * ------------------------------------------------------------
- * rs_stop () and rs_start ()
- *
- * These routines are called before setting or resetting
- * tty->stopped. They enable or disable transmitter interrupts,
- * as necessary.
- * ------------------------------------------------------------
- */
-
-static void dz_stop (struct tty_struct *tty)
-{
- struct dz_serial *info;
- unsigned short mask, tmp;
-
- if (!tty)
- return;
-
- info = (struct dz_serial *)tty->driver_data;
-
- mask = 1 << info->line;
- tmp = dz_in (info, DZ_TCR); /* read the TX flag */
-
- tmp &= ~mask; /* clear the TX flag */
- dz_out (info, DZ_TCR, tmp);
-}
-
-static void dz_start (struct tty_struct *tty)
-{
- struct dz_serial *info = (struct dz_serial *)tty->driver_data;
- unsigned short mask, tmp;
-
- mask = 1 << info->line;
- tmp = dz_in (info, DZ_TCR); /* read the TX flag */
-
- tmp |= mask; /* set the TX flag */
- dz_out (info, DZ_TCR, tmp);
-}
-
-/*
- * ------------------------------------------------------------
- * Here starts the interrupt handling routines. All of the
- * following subroutines are declared as inline and are folded
- * into dz_interrupt. They were separated out for readability's
- * sake.
- *
- * Note: rs_interrupt() is a "fast" interrupt, which means that it
- * runs with interrupts turned off. People who may want to modify
- * rs_interrupt() should try to keep the interrupt handler as fast as
- * possible. After you are done making modifications, it is not a bad
- * idea to do:
- *
- * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer dz.c
- *
- * and look at the resulting assemble code in serial.s.
- *
- * ------------------------------------------------------------
- */
-
-/*
- * ------------------------------------------------------------
- * dz_sched_event ()
- *
- * This routine is used by the interrupt handler to schedule
- * processing in the software interrupt portion of the driver.
- * ------------------------------------------------------------
- */
-static inline void dz_sched_event (struct dz_serial *info, int event)
-{
- info->event |= 1 << event;
- queue_task(&info->tqueue, &tq_serial);
- mark_bh(SERIAL_BH);
-}
-
-/*
- * ------------------------------------------------------------
- * receive_char ()
- *
- * This routine deals with inputs from any lines.
- * ------------------------------------------------------------
- */
-static inline void receive_chars (struct dz_serial *info_in)
-{
- struct dz_serial *info;
- struct tty_struct *tty = 0;
- struct async_icount *icount;
- int ignore = 0;
- unsigned short status, tmp;
- unsigned char ch;
-
- /*
- * This code is going to be a problem... the call to tty_flip_buffer
- * is going to need to be rethought...
- */
- do {
- status = dz_in (info_in, DZ_RBUF);
- info = lines[LINE(status)];
-
- /* punt so we don't get duplicate characters */
- if (!(status & DZ_DVAL))
- goto ignore_char;
-
- ch = UCHAR(status); /* grab the char */
-
-#if 0
- if (info->is_console) {
- if (ch == 0)
- return; /* it's a break ... */
- }
-#endif
-
- tty = info->tty; /* now tty points to the proper dev */
- icount = &info->icount;
-
- if (!tty)
- break;
- if (tty->flip.count >= TTY_FLIPBUF_SIZE) break;
-
- *tty->flip.char_buf_ptr = ch;
- *tty->flip.flag_buf_ptr = 0;
- icount->rx++;
-
- /* keep track of the statistics */
- if (status & (DZ_OERR | DZ_FERR | DZ_PERR)) {
- if (status & DZ_PERR) /* parity error */
- icount->parity++;
- else if (status & DZ_FERR) /* frame error */
- icount->frame++;
- if (status & DZ_OERR) /* overrun error */
- icount->overrun++;
-
- /*
- * Check to see if we should ignore the character and
- * mask off conditions that should be ignored
- */
-
- if (status & info->ignore_status_mask) {
- if (++ignore > 100)
- break;
- goto ignore_char;
- }
-
- /* mask off the error conditions we want to ignore */
- tmp = status & info->read_status_mask;
-
- if (tmp & DZ_PERR) {
- *tty->flip.flag_buf_ptr = TTY_PARITY;
-#ifdef DEBUG_DZ
- debug_console("PERR\n",5);
-#endif /* DEBUG_DZ */
- } else if (tmp & DZ_FERR) {
- *tty->flip.flag_buf_ptr = TTY_FRAME;
-#ifdef DEBUG_DZ
- debug_console("FERR\n",5);
-#endif /* DEBUG_DZ */
- } if (tmp & DZ_OERR) {
-#ifdef DEBUG_DZ
- debug_console("OERR\n",5);
-#endif /* DEBUG_DZ */
- if (tty->flip.count < TTY_FLIPBUF_SIZE) {
- tty->flip.count++;
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- *tty->flip.flag_buf_ptr = TTY_OVERRUN;
- }
- }
- }
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- tty->flip.count++;
-ignore_char:
- ;
- } while (status & DZ_DVAL);
-
- if (tty)
- tty_flip_buffer_push(tty);
-}
-
-/*
- * ------------------------------------------------------------
- * transmit_char ()
- *
- * This routine deals with outputs to any lines.
- * ------------------------------------------------------------
- */
-static inline void transmit_chars (struct dz_serial *info)
-{
- unsigned char tmp;
-
- if (info->x_char) { /* XON/XOFF chars */
- dz_out(info, DZ_TDR, info->x_char);
- info->icount.tx++;
- info->x_char = 0;
- return;
- }
-
- /* if nothing to do or stopped or hardware stopped */
- if ((info->xmit_cnt <= 0) || info->tty->stopped ||
- info->tty->hw_stopped) {
- dz_stop(info->tty);
- return;
- }
-
- /*
- * If something to do ... (rember the dz has no output fifo so we go
- * one char at a time :-<
- */
- tmp = (unsigned short) info->xmit_buf[info->xmit_tail++];
- dz_out(info, DZ_TDR, tmp);
- info->xmit_tail = info->xmit_tail & (DZ_XMIT_SIZE - 1);
- info->icount.tx++;
-
- if (--info->xmit_cnt < WAKEUP_CHARS)
- dz_sched_event(info, DZ_EVENT_WRITE_WAKEUP);
-
- /* Are we done */
- if (info->xmit_cnt <= 0)
- dz_stop(info->tty);
-}
-
-/*
- * ------------------------------------------------------------
- * check_modem_status ()
- *
- * Only valid for the MODEM line duh !
- * ------------------------------------------------------------
- */
-static inline void check_modem_status (struct dz_serial *info)
-{
- unsigned short status;
-
- /* if not ne modem line just return */
- if (info->line != DZ_MODEM)
- return;
-
- status = dz_in(info, DZ_MSR);
-
- /* it's easy, since DSR2 is the only bit in the register */
- if (status)
- info->icount.dsr++;
-}
-
-/*
- * ------------------------------------------------------------
- * dz_interrupt ()
- *
- * this is the main interrupt routine for the DZ chip.
- * It deals with the multiple ports.
- * ------------------------------------------------------------
- */
-static void dz_interrupt (int irq, void *dev, struct pt_regs *regs)
-{
- struct dz_serial *info;
- unsigned short status;
-
- /* get the reason why we just got an irq */
- status = dz_in((struct dz_serial *)dev, DZ_CSR);
- info = lines[LINE(status)]; /* re-arrange info the proper port */
-
- if (status & DZ_RDONE)
- receive_chars(info); /* the receive function */
-
- if (status & DZ_TRDY)
- transmit_chars (info);
-}
-
-/*
- * -------------------------------------------------------------------
- * Here ends the DZ interrupt routines.
- * -------------------------------------------------------------------
- */
-
-/*
- * This routine is used to handle the "bottom half" processing for the
- * serial driver, known also the "software interrupt" processing.
- * This processing is done at the kernel interrupt level, after the
- * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
- * is where time-consuming activities which can not be done in the
- * interrupt driver proper are done; the interrupt driver schedules
- * them using rs_sched_event(), and they get done here.
- */
-static void do_serial_bh (void)
-{
- run_task_queue (&tq_serial);
-}
-
-static void do_softint (void *private_data)
-{
- struct dz_serial *info = (struct dz_serial *) private_data;
- struct tty_struct *tty = info->tty;
-
- if (!tty)
- return;
-
- if (test_and_clear_bit(DZ_EVENT_WRITE_WAKEUP, &info->event)) {
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup) (tty);
- wake_up_interruptible (&tty->write_wait);
- }
-}
-
-/*
- * -------------------------------------------------------------------
- * This routine is called from the scheduler tqueue when the interrupt
- * routine has signalled that a hangup has occurred. The path of
- * hangup processing is:
- *
- * serial interrupt routine -> (scheduler tqueue) ->
- * do_serial_hangup() -> tty->hangup() -> rs_hangup()
- * -------------------------------------------------------------------
- */
-static void do_serial_hangup (void *private_data)
-{
- struct dz_serial *info = (struct dz_serial *) private_data;
- struct tty_struct *tty = info->tty;
-
- if (!tty)
- return;
-
- tty_hangup(tty);
-}
-
-/*
- * -------------------------------------------------------------------
- * startup ()
- *
- * various initialization tasks
- * -------------------------------------------------------------------
- */
-static int startup (struct dz_serial *info)
-{
- unsigned long page, flags;
- unsigned short tmp;
-
- if (info->is_initialized)
- return 0;
-
- save_and_cli(flags);
-
- if (!info->port) {
- if (info->tty) set_bit(TTY_IO_ERROR, &info->tty->flags);
- restore_flags(flags);
- return -ENODEV;
- }
-
- if (!info->xmit_buf) {
- page = get_zeroed_page(GFP_KERNEL);
- if (!page) {
- restore_flags (flags);
- return -ENOMEM;
- }
- info->xmit_buf = (unsigned char *)page;
- }
-
- if (info->tty)
- clear_bit(TTY_IO_ERROR, &info->tty->flags);
-
- /* enable the interrupt and the scanning */
- tmp = dz_in(info, DZ_CSR);
- tmp |= (DZ_RIE | DZ_TIE | DZ_MSE);
- dz_out(info, DZ_CSR, tmp);
-
- info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
-
- change_speed(info); /* set up the speed */
-
- /*
- * Clear the line transmitter buffer I can't figure out why I need to
- * do this - but its necessary - in order for the console portion and
- * the interrupt portion to live happily side by side.
- */
-
- info->is_initialized = 1;
-
- restore_flags(flags);
-
- return 0;
-}
-
-/*
- * -------------------------------------------------------------------
- * shutdown ()
- *
- * This routine will shutdown a serial port; interrupts are disabled, and
- * DTR is dropped if the hangup on close termio flag is on.
- * -------------------------------------------------------------------
- */
-static void shutdown (struct dz_serial *info)
-{
- unsigned long flags;
- unsigned short tmp;
-
- if (!info->is_initialized)
- return;
-
- save_and_cli(flags);
-
- dz_stop (info->tty);
-
- info->cflags &= ~DZ_CREAD; /* turn off receive enable flag */
- dz_out(info, DZ_LPR, info->cflags);
-
- if (info->xmit_buf) { /* free Tx buffer */
- free_page((unsigned long)info->xmit_buf);
- info->xmit_buf = 0;
- }
-
- if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
- tmp = dz_in(info, DZ_TCR);
- if (tmp & DZ_MODEM_DTR) {
- tmp &= ~DZ_MODEM_DTR;
- dz_out(info, DZ_TCR, tmp);
- }
- }
-
- if (info->tty)
- set_bit (TTY_IO_ERROR, &info->tty->flags);
-
- info->is_initialized = 0;
-
- restore_flags (flags);
-}
-
-/*
- * -------------------------------------------------------------------
- * change_speed ()
- *
- * set the baud rate.
- * -------------------------------------------------------------------
- */
-static void change_speed (struct dz_serial *info)
-{
- unsigned long flags;
- unsigned cflag;
- int baud;
-
- if (!info->tty || !info->tty->termios)
- return;
-
- save_and_cli(flags);
-
- info->cflags = info->line;
-
- cflag = info->tty->termios->c_cflag;
-
- switch (cflag & CSIZE) {
- case CS5:
- info->cflags |= DZ_CS5;
- break;
- case CS6:
- info->cflags |= DZ_CS6;
- break;
- case CS7:
- info->cflags |= DZ_CS7;
- break;
- case CS8:
- default:
- info->cflags |= DZ_CS8;
- }
-
- if (cflag & CSTOPB)
- info->cflags |= DZ_CSTOPB;
- if (cflag & PARENB)
- info->cflags |= DZ_PARENB;
- if (cflag & PARODD)
- info->cflags |= DZ_PARODD;
-
- baud = tty_get_baud_rate(info->tty);
- switch (baud) {
- case 50:
- info->cflags |= DZ_B50;
- break;
- case 75:
- info->cflags |= DZ_B75;
- break;
- case 110:
- info->cflags |= DZ_B110;
- break;
- case 134:
- info->cflags |= DZ_B134;
- break;
- case 150:
- info->cflags |= DZ_B150;
- break;
- case 300:
- info->cflags |= DZ_B300;
- break;
- case 600:
- info->cflags |= DZ_B600;
- break;
- case 1200:
- info->cflags |= DZ_B1200;
- break;
- case 1800:
- info->cflags |= DZ_B1800;
- break;
- case 2000:
- info->cflags |= DZ_B2000;
- break;
- case 2400:
- info->cflags |= DZ_B2400;
- break;
- case 3600:
- info->cflags |= DZ_B3600;
- break;
- case 4800:
- info->cflags |= DZ_B4800;
- break;
- case 7200:
- info->cflags |= DZ_B7200;
- break;
- case 9600:
- default:
- info->cflags |= DZ_B9600;
- }
-
- info->cflags |= DZ_RXENAB;
- dz_out(info, DZ_LPR, info->cflags);
-
- /* setup accept flag */
- info->read_status_mask = DZ_OERR;
- if (I_INPCK(info->tty))
- info->read_status_mask |= (DZ_FERR | DZ_PERR);
-
- /* characters to ignore */
- info->ignore_status_mask = 0;
- if (I_IGNPAR(info->tty))
- info->ignore_status_mask |= (DZ_FERR | DZ_PERR);
-
- restore_flags(flags);
-}
-
-/*
- * -------------------------------------------------------------------
- * dz_flush_char ()
- *
- * Flush the buffer.
- * -------------------------------------------------------------------
- */
-static void dz_flush_chars (struct tty_struct *tty)
-{
- struct dz_serial *info = (struct dz_serial *)tty->driver_data;
- unsigned long flags;
-
- if (info->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped ||
- !info->xmit_buf)
- return;
-
- save_and_cli(flags);
- dz_start (info->tty);
- restore_flags(flags);
-}
-
-
-/*
- * -------------------------------------------------------------------
- * dz_write ()
- *
- * main output routine.
- * -------------------------------------------------------------------
- */
-static int dz_write (struct tty_struct *tty, int from_user,
- const unsigned char *buf, int count)
-{
- struct dz_serial *info = (struct dz_serial *)tty->driver_data;
- unsigned long flags;
- int c, ret = 0;
-
- if (!tty )
- return ret;
- if (!info->xmit_buf)
- return ret;
- if (!tmp_buf)
- tmp_buf = tmp_buffer;
-
- if (from_user) {
- down (&tmp_buf_sem);
- while (1) {
- c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1,
- DZ_XMIT_SIZE - info->xmit_head));
- if (c <= 0)
- break;
-
- c -= copy_from_user (tmp_buf, buf, c);
- if (!c) {
- if (!ret)
- ret = -EFAULT;
- break;
- }
-
- save_and_cli(flags);
-
- c = MIN(c, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1,
- DZ_XMIT_SIZE - info->xmit_head));
- memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
- info->xmit_head = ((info->xmit_head + c) &
- (DZ_XMIT_SIZE - 1));
- info->xmit_cnt += c;
- restore_flags(flags);
-
- buf += c;
- count -= c;
- ret += c;
- }
- up(&tmp_buf_sem);
- } else {
- while (1) {
- save_and_cli(flags);
-
- c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1,
- DZ_XMIT_SIZE - info->xmit_head));
- if (c <= 0) {
- restore_flags (flags);
- break;
- }
- memcpy(info->xmit_buf + info->xmit_head, buf, c);
- info->xmit_head = ((info->xmit_head + c) &
- (DZ_XMIT_SIZE-1));
- info->xmit_cnt += c;
- restore_flags(flags);
-
- buf += c;
- count -= c;
- ret += c;
- }
- }
-
- if (info->xmit_cnt) {
- if (!tty->stopped) {
- if (!tty->hw_stopped) {
- dz_start (info->tty);
- }
- }
- }
-
- return ret;
-}
-
-/*
- * -------------------------------------------------------------------
- * dz_write_room ()
- *
- * compute the amount of space available for writing.
- * -------------------------------------------------------------------
- */
-static int dz_write_room (struct tty_struct *tty)
-{
- struct dz_serial *info = (struct dz_serial *)tty->driver_data;
- int ret;
-
- ret = DZ_XMIT_SIZE - info->xmit_cnt - 1;
- if (ret < 0)
- ret = 0;
-
- return ret;
-}
-
-/*
- * -------------------------------------------------------------------
- * dz_chars_in_buffer ()
- *
- * compute the amount of char left to be transmitted
- * -------------------------------------------------------------------
- */
-static int dz_chars_in_buffer (struct tty_struct *tty)
-{
- struct dz_serial *info = (struct dz_serial *)tty->driver_data;
-
- return info->xmit_cnt;
-}
-
-/*
- * -------------------------------------------------------------------
- * dz_flush_buffer ()
- *
- * Empty the output buffer
- * -------------------------------------------------------------------
- */
-static void dz_flush_buffer (struct tty_struct *tty)
-{
- struct dz_serial *info = (struct dz_serial *)tty->driver_data;
-
- cli();
- info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
- sti();
-
- wake_up_interruptible (&tty->write_wait);
-
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- tty->ldisc.write_wakeup(tty);
-}
-
-/*
- * ------------------------------------------------------------
- * dz_throttle () and dz_unthrottle ()
- *
- * This routine is called by the upper-layer tty layer to signal that
- * incoming characters should be throttled (or not).
- * ------------------------------------------------------------
- */
-static void dz_throttle (struct tty_struct *tty)
-{
- struct dz_serial *info = (struct dz_serial *)tty->driver_data;
-
- if (I_IXOFF(tty))
- info->x_char = STOP_CHAR(tty);
-}
-
-static void dz_unthrottle (struct tty_struct *tty)
-{
- struct dz_serial *info = (struct dz_serial *)tty->driver_data;
-
- if (I_IXOFF(tty)) {
- if (info->x_char)
- info->x_char = 0;
- else
- info->x_char = START_CHAR(tty);
- }
-}
-
-static void dz_send_xchar (struct tty_struct *tty, char ch)
-{
- struct dz_serial *info = (struct dz_serial *)tty->driver_data;
-
- info->x_char = ch;
-
- if (ch)
- dz_start(info->tty);
-}
-
-/*
- * ------------------------------------------------------------
- * rs_ioctl () and friends
- * ------------------------------------------------------------
- */
-static int get_serial_info(struct dz_serial *info,
- struct serial_struct *retinfo)
-{
- struct serial_struct tmp;
-
- if (!retinfo)
- return -EFAULT;
-
- memset (&tmp, 0, sizeof(tmp));
-
- tmp.type = info->type;
- tmp.line = info->line;
- tmp.port = info->port;
- tmp.irq = SERIAL;
- tmp.flags = info->flags;
- tmp.baud_base = info->baud_base;
- tmp.close_delay = info->close_delay;
- tmp.closing_wait = info->closing_wait;
-
- return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
-}
-
-static int set_serial_info (struct dz_serial *info,
- struct serial_struct *new_info)
-{
- struct serial_struct new_serial;
- struct dz_serial old_info;
- int retval = 0;
-
- if (!new_info)
- return -EFAULT;
-
- if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
- return -EFAULT;
-
- old_info = *info;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- if (info->count > 1)
- return -EBUSY;
-
- /*
- * OK, past this point, all the error checking has been done.
- * At this point, we start making changes.....
- */
-
- info->baud_base = new_serial.baud_base;
- info->type = new_serial.type;
- info->close_delay = new_serial.close_delay;
- info->closing_wait = new_serial.closing_wait;
-
- retval = startup(info);
-
- return retval;
-}
-
-/*
- * get_lsr_info - get line status register info
- *
- * Purpose: Let user call ioctl() to get info when the UART physically
- * is emptied. On bus types like RS485, the transmitter must
- * release the bus after transmitting. This must be done when
- * the transmit shift register is empty, not be done when the
- * transmit holding register is empty. This functionality
- * allows an RS485 driver to be written in user space.
- */
-static int get_lsr_info (struct dz_serial *info, unsigned int *value)
-{
- unsigned short status = dz_in (info, DZ_LPR);
-
- return put_user (status, value);
-}
-
-/*
- * This routine sends a break character out the serial port.
- */
-static void send_break (struct dz_serial *info, int duration)
-{
- unsigned long flags;
- unsigned short tmp, mask;
-
- if (!info->port)
- return;
-
- mask = 1 << info->line;
- tmp = dz_in (info, DZ_TCR);
- tmp |= mask;
-
- current->state = TASK_INTERRUPTIBLE;
-
- save_and_cli(flags);
- dz_out(info, DZ_TCR, tmp);
- schedule_timeout(duration);
- tmp &= ~mask;
- dz_out(info, DZ_TCR, tmp);
- restore_flags(flags);
-}
-
-static int dz_ioctl(struct tty_struct *tty, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- int error;
- struct dz_serial * info = (struct dz_serial *)tty->driver_data;
- int retval;
-
- if (cmd != TIOCGSERIAL && cmd != TIOCSSERIAL &&
- cmd != TIOCSERCONFIG && cmd != TIOCSERGWILD &&
- cmd != TIOCSERSWILD && cmd != TIOCSERGSTRUCT) {
- if (tty->flags & (1 << TTY_IO_ERROR))
- return -EIO;
- }
-
- switch (cmd) {
- case TCSBRK: /* SVID version: non-zero arg --> no break */
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- tty_wait_until_sent(tty, 0);
- if (!arg)
- send_break(info, HZ/4); /* 1/4 second */
- return 0;
-
- case TCSBRKP: /* support for POSIX tcsendbreak() */
- retval = tty_check_change(tty);
- if (retval)
- return retval;
- tty_wait_until_sent(tty, 0);
- send_break(info, arg ? arg*(HZ/10) : HZ/4);
- return 0;
-
- case TIOCGSOFTCAR:
- return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long *)arg);
-
- case TIOCSSOFTCAR:
- if (get_user (arg, (unsigned long *)arg))
- return -EFAULT;
-
- tty->termios->c_cflag = (tty->termios->c_cflag & ~CLOCAL) |
- (arg ? CLOCAL : 0);
- return 0;
-
- case TIOCGSERIAL:
- return get_serial_info(info, (struct serial_struct *)arg);
-
- case TIOCSSERIAL:
- return set_serial_info(info, (struct serial_struct *) arg);
-
- case TIOCSERGETLSR: /* Get line status register */
- return get_lsr_info (info, (unsigned int *)arg);
-
- case TIOCSERGSTRUCT:
- return copy_to_user((struct dz_serial *)arg, info,
- sizeof(struct dz_serial)) ? -EFAULT : 0;
-
- default:
- return -ENOIOCTLCMD;
- }
-
- return 0;
-}
-
-static void dz_set_termios (struct tty_struct *tty,
- struct termios *old_termios)
-{
- struct dz_serial *info = (struct dz_serial *)tty->driver_data;
-
- if (tty->termios->c_cflag == old_termios->c_cflag)
- return;
-
- change_speed (info);
-
- if ((old_termios->c_cflag & CRTSCTS) &&
- !(tty->termios->c_cflag & CRTSCTS)) {
- tty->hw_stopped = 0;
- dz_start(tty);
- }
-}
-
-/*
- * ------------------------------------------------------------
- * dz_close()
- *
- * This routine is called when the serial port gets closed. First, we
- * wait for the last remaining data to be sent. Then, we turn off
- * the transmit enable and receive enable flags.
- * ------------------------------------------------------------
- */
-static void dz_close(struct tty_struct *tty, struct file *filp)
-{
- struct dz_serial * info = (struct dz_serial *)tty->driver_data;
- unsigned long flags;
-
- if (!info)
- return;
-
- save_and_cli(flags);
-
- if (tty_hung_up_p(filp)) {
- restore_flags(flags);
- return;
- }
-
- if ((tty->count == 1) && (info->count != 1)) {
- /*
- * Uh, oh. tty->count is 1, which means that the tty structure
- * will be freed. Info->count should always be one in these
- * conditions. If it's greater than one, we've got real
- * problems, since it means the serial port won't be shutdown.
- */
- printk("dz_close: bad serial port count; tty->count is 1, "
- "info->count is %d\n", info->count);
- info->count = 1;
- }
-
- if (--info->count < 0) {
- printk("ds_close: bad serial port count for ttyS%02d: %d\n",
- info->line, info->count);
- info->count = 0;
- }
-
- if (info->count) {
- restore_flags(flags);
- return;
- }
- info->flags |= DZ_CLOSING;
- /*
- * Now we wait for the transmit buffer to clear; and we notify the line
- * discipline to only process XON/XOFF characters.
- */
- tty->closing = 1;
-
- if (info->closing_wait != DZ_CLOSING_WAIT_NONE)
- tty_wait_until_sent(tty, info->closing_wait);
-
- /*
- * At this point we stop accepting input. To do this, we disable the
- * receive line status interrupts.
- */
- shutdown(info);
-
- if (tty->driver->flush_buffer)
- tty->driver->flush_buffer (tty);
- if (tty->ldisc.flush_buffer)
- tty->ldisc.flush_buffer (tty);
- tty->closing = 0;
- info->event = 0;
- info->tty = 0;
-
- if (tty->ldisc.num != ldiscs[N_TTY].num) {
- if (tty->ldisc.close)
- tty->ldisc.close(tty);
- tty->ldisc = ldiscs[N_TTY];
- tty->termios->c_line = N_TTY;
- if (tty->ldisc.open)
- tty->ldisc.open(tty);
- }
- if (info->blocked_open) {
- if (info->close_delay) {
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(info->close_delay);
- }
- wake_up_interruptible(&info->open_wait);
- }
-
- info->flags &= ~(DZ_NORMAL_ACTIVE | DZ_CLOSING);
- wake_up_interruptible(&info->close_wait);
-
- restore_flags(flags);
-}
-
-/*
- * dz_hangup () --- called by tty_hangup() when a hangup is signaled.
- */
-static void dz_hangup (struct tty_struct *tty)
-{
- struct dz_serial *info = (struct dz_serial *) tty->driver_data;
-
- dz_flush_buffer(tty);
- shutdown(info);
- info->event = 0;
- info->count = 0;
- info->flags &= ~DZ_NORMAL_ACTIVE;
- info->tty = 0;
- wake_up_interruptible(&info->open_wait);
-}
-
-/*
- * ------------------------------------------------------------
- * rs_open() and friends
- * ------------------------------------------------------------
- */
-static int block_til_ready(struct tty_struct *tty, struct file *filp,
- struct dz_serial *info)
-{
- DECLARE_WAITQUEUE(wait, current);
- int retval;
- int do_clocal = 0;
-
- /*
- * If the device is in the middle of being closed, then block
- * until it's done, and then try again.
- */
- if (info->flags & DZ_CLOSING) {
- interruptible_sleep_on(&info->close_wait);
- return -EAGAIN;
- }
-
- /*
- * If non-blocking mode is set, or the port is not enabled, then make
- * the check up front and then exit.
- */
- if ((filp->f_flags & O_NONBLOCK) ||
- (tty->flags & (1 << TTY_IO_ERROR))) {
- info->flags |= DZ_NORMAL_ACTIVE;
-
- return 0;
- }
-
- if (tty->termios->c_cflag & CLOCAL)
- do_clocal = 1;
-
- /*
- * Block waiting for the carrier detect and the line to become free
- * (i.e., not in use by the callout). While we are in this loop,
- * info->count is dropped by one, so that dz_close() knows when to free
- * things. We restore it upon exit, either normal or abnormal.
- */
- retval = 0;
- add_wait_queue(&info->open_wait, &wait);
-
- info->count--;
- info->blocked_open++;
- while (1) {
- set_current_state(TASK_INTERRUPTIBLE);
- if (tty_hung_up_p (filp) || !(info->is_initialized)) {
- retval = -EAGAIN;
- break;
- }
- if (!(info->flags & DZ_CLOSING) && do_clocal)
- break;
- if (signal_pending(current)) {
- retval = -ERESTARTSYS;
- break;
- }
- schedule();
- }
-
- current->state = TASK_RUNNING;
- remove_wait_queue (&info->open_wait, &wait);
- if (!tty_hung_up_p(filp))
- info->count++;
- info->blocked_open--;
-
- if (retval)
- return retval;
- info->flags |= DZ_NORMAL_ACTIVE;
- return 0;
-}
-
-/*
- * This routine is called whenever a serial port is opened. It
- * enables interrupts for a serial port. It also performs the
- * serial-specific initialization for the tty structure.
- */
-static int dz_open (struct tty_struct *tty, struct file *filp)
-{
- struct dz_serial *info;
- int retval, line;
-
- line = tty->index;
-
- /*
- * The dz lines for the mouse/keyboard must be opened using their
- * respective drivers.
- */
- if ((line < 0) || (line >= DZ_NB_PORT))
- return -ENODEV;
-
- if ((line == DZ_KEYBOARD) || (line == DZ_MOUSE))
- return -ENODEV;
-
- info = lines[line];
- info->count++;
-
- tty->driver_data = info;
- info->tty = tty;
-
- /*
- * Start up serial port
- */
- retval = startup (info);
- if (retval)
- return retval;
-
- retval = block_til_ready (tty, filp, info);
- if (retval)
- return retval;
-
- return 0;
-}
-
-static void show_serial_version (void)
-{
- printk("%s%s\n", dz_name, dz_version);
-}
-
-static struct tty_driver *serial_driver;
-
-static struct tty_operations serial_ops = {
- .open = dz_open,
- .close = dz_close,
- .write = dz_write,
- .flush_chars = dz_flush_chars,
- .write_room = dz_write_room,
- .chars_in_buffer = dz_chars_in_buffer,
- .flush_buffer = dz_flush_buffer,
- .ioctl = dz_ioctl,
- .throttle = dz_throttle,
- .unthrottle = dz_unthrottle,
- .send_xchar = dz_send_xchar,
- .set_termios = dz_set_termios,
- .stop = dz_stop,
- .start = dz_start,
- .hangup = dz_hangup,
-};
-
-int __init dz_init(void)
-{
- int i, flags;
- struct dz_serial *info;
-
- serial_driver = alloc_tty_driver(DZ_NB_PORT);
- if (!serial_driver)
- return -ENOMEM;
-
- /* Setup base handler, and timer table. */
- init_bh(SERIAL_BH, do_serial_bh);
-
- show_serial_version();
-
- serial_driver->owner = THIS_MODULE;
- serial_driver->devfs_name = "tts/";
- serial_driver->name = "ttyS";
- serial_driver->major = TTY_MAJOR;
- serial_driver->minor_start = 64;
- serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
- serial_driver->subtype = SERIAL_TYPE_NORMAL;
- serial_driver->init_termios = tty_std_termios;
- serial_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL |
- CLOCAL;
- serial_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
- tty_set_operations(serial_driver, &serial_ops);
-
- if (tty_register_driver(serial_driver))
- panic("Couldn't register serial driver\n");
-
- save_flags(flags); cli();
- for (i=0; i < DZ_NB_PORT; i++) {
- info = &multi[i];
- lines[i] = info;
- info->magic = SERIAL_MAGIC;
-
- if ((mips_machtype == MACH_DS23100) ||
- (mips_machtype == MACH_DS5100))
- info->port = (unsigned long) KN01_DZ11_BASE;
- else
- info->port = (unsigned long) KN02_DZ11_BASE;
-
- info->line = i;
- info->tty = 0;
- info->close_delay = 50;
- info->closing_wait = 3000;
- info->x_char = 0;
- info->event = 0;
- info->count = 0;
- info->blocked_open = 0;
- info->tqueue.routine = do_softint;
- info->tqueue.data = info;
- info->tqueue_hangup.routine = do_serial_hangup;
- info->tqueue_hangup.data = info;
- init_waitqueue_head(&info->open_wait);
- init_waitqueue_head(&info->close_wait);
-
- /*
- * If we are pointing to address zero then punt - not correctly
- * set up in setup.c to handle this.
- */
- if (! info->port)
- return 0;
-
- printk("ttyS%02d at 0x%08x (irq = %d)\n", info->line,
- info->port, SERIAL);
-
- tty_register_device(serial_driver, info->line, NULL);
- }
-
- /* Reset the chip */
-#ifndef CONFIG_SERIAL_CONSOLE
- {
- int tmp;
- dz_out(info, DZ_CSR, DZ_CLR);
- while ((tmp = dz_in(info,DZ_CSR)) & DZ_CLR);
- wbflush();
-
- /* Enable scanning */
- dz_out(info, DZ_CSR, DZ_MSE);
- }
-#endif
-
- /*
- * Order matters here... the trick is that flags is updated... in
- * request_irq - to immediatedly obliterate it is unwise.
- */
- restore_flags(flags);
-
- if (request_irq(SERIAL, dz_interrupt, SA_INTERRUPT, "DZ", lines[0]))
- panic("Unable to register DZ interrupt\n");
-
- return 0;
-}
-
-#ifdef CONFIG_SERIAL_CONSOLE
-static void dz_console_put_char (unsigned char ch)
-{
- unsigned long flags;
- int loops = 2500;
- unsigned short tmp = ch;
- /*
- * this code sends stuff out to serial device - spinning its wheels and
- * waiting.
- */
-
- /* force the issue - point it at lines[3]*/
- dz_console = &multi[CONSOLE_LINE];
-
- save_and_cli(flags);
-
- /* spin our wheels */
- while (((dz_in(dz_console, DZ_CSR) & DZ_TRDY) != DZ_TRDY) && loops--)
- ;
-
- /* Actually transmit the character. */
- dz_out(dz_console, DZ_TDR, tmp);
-
- restore_flags(flags);
-}
-
-/*
- * -------------------------------------------------------------------
- * dz_console_print ()
- *
- * dz_console_print is registered for printk.
- * The console must be locked when we get here.
- * -------------------------------------------------------------------
- */
-static void dz_console_print (struct console *cons,
- const char *str,
- unsigned int count)
-{
-#ifdef DEBUG_DZ
- prom_printf((char *)str);
-#endif
- while (count--) {
- if (*str == '\n')
- dz_console_put_char('\r');
- dz_console_put_char(*str++);
- }
-}
-
-static struct tty_driver *dz_console_device(struct console *c, int *index)
-{
- *index = c->index;
- return serial_driver;
-}
-
-static int __init dz_console_setup(struct console *co, char *options)
-{
- int baud = 9600;
- int bits = 8;
- int parity = 'n';
- int cflag = CREAD | HUPCL | CLOCAL;
- char *s;
- unsigned short mask,tmp;
-
- if (options) {
- baud = simple_strtoul(options, NULL, 10);
- s = options;
- while (*s >= '0' && *s <= '9')
- s++;
- if (*s)
- parity = *s++;
- if (*s)
- bits = *s - '0';
- }
-
- /*
- * Now construct a cflag setting.
- */
- switch (baud) {
- case 1200:
- cflag |= DZ_B1200;
- break;
- case 2400:
- cflag |= DZ_B2400;
- break;
- case 4800:
- cflag |= DZ_B4800;
- break;
- case 9600:
- default:
- cflag |= DZ_B9600;
- break;
- }
- switch (bits) {
- case 7:
- cflag |= DZ_CS7;
- break;
- default:
- case 8:
- cflag |= DZ_CS8;
- break;
- }
- switch (parity) {
- case 'o':
- case 'O':
- cflag |= DZ_PARODD;
- break;
- case 'e':
- case 'E':
- cflag |= DZ_PARENB;
- break;
- }
- co->cflag = cflag;
-
- /* TOFIX: force to console line */
- dz_console = &multi[CONSOLE_LINE];
- if ((mips_machtype == MACH_DS23100) || (mips_machtype == MACH_DS5100))
- dz_console->port = KN01_DZ11_BASE;
- else
- dz_console->port = KN02_DZ11_BASE;
- dz_console->line = CONSOLE_LINE;
-
- dz_out(dz_console, DZ_CSR, DZ_CLR);
- while ((tmp = dz_in(dz_console,DZ_CSR)) & DZ_CLR)
- ;
-
- /* enable scanning */
- dz_out(dz_console, DZ_CSR, DZ_MSE);
-
- /* Set up flags... */
- dz_console->cflags = 0;
- dz_console->cflags |= DZ_B9600;
- dz_console->cflags |= DZ_CS8;
- dz_console->cflags |= DZ_PARENB;
- dz_out(dz_console, DZ_LPR, dz_console->cflags);
-
- mask = 1 << dz_console->line;
- tmp = dz_in (dz_console, DZ_TCR); /* read the TX flag */
- if (!(tmp & mask)) {
- tmp |= mask; /* set the TX flag */
- dz_out (dz_console, DZ_TCR, tmp);
- }
-
- return 0;
-}
-
-static struct console dz_sercons = {
- .name = "ttyS",
- .write = dz_console_print,
- .device = dz_console_device,
- .setup = dz_console_setup,
- .flags = CON_CONSDEV | CON_PRINTBUFFER,
- .index = CONSOLE_LINE,
-};
-
-void __init dz_serial_console_init(void)
-{
- register_console(&dz_sercons);
-}
-
-#endif /* ifdef CONFIG_SERIAL_CONSOLE */
-
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * dz.h: Serial port driver for DECStations equiped
- * with the DZ chipset.
- *
- * Copyright (C) 1998 Olivier A. D. Lebaillif
- *
- * Email: olivier.lebaillif@ifrsys.com
- *
- */
-#ifndef DZ_SERIAL_H
-#define DZ_SERIAL_H
-
-/*
- * Definitions for the Control and Status Received.
- */
-#define DZ_TRDY 0x8000 /* Transmitter empty */
-#define DZ_TIE 0x4000 /* Transmitter Interrupt Enable */
-#define DZ_RDONE 0x0080 /* Receiver data ready */
-#define DZ_RIE 0x0040 /* Receive Interrupt Enable */
-#define DZ_MSE 0x0020 /* Master Scan Enable */
-#define DZ_CLR 0x0010 /* Master reset */
-#define DZ_MAINT 0x0008 /* Loop Back Mode */
-
-/*
- * Definitions for the Received buffer.
- */
-#define DZ_RBUF_MASK 0x00FF /* Data Mask in the Receive Buffer */
-#define DZ_LINE_MASK 0x0300 /* Line Mask in the Receive Buffer */
-#define DZ_DVAL 0x8000 /* Valid Data indicator */
-#define DZ_OERR 0x4000 /* Overrun error indicator */
-#define DZ_FERR 0x2000 /* Frame error indicator */
-#define DZ_PERR 0x1000 /* Parity error indicator */
-
-#define LINE(x) (x & DZ_LINE_MASK) >> 8 /* Get the line number from the input buffer */
-#define UCHAR(x) (unsigned char)(x & DZ_RBUF_MASK)
-
-/*
- * Definitions for the Transmit Register.
- */
-#define DZ_LINE_KEYBOARD 0x0001
-#define DZ_LINE_MOUSE 0x0002
-#define DZ_LINE_MODEM 0x0004
-#define DZ_LINE_PRINTER 0x0008
-
-#define DZ_MODEM_DTR 0x0400 /* DTR for the modem line (2) */
-
-/*
- * Definitions for the Modem Status Register.
- */
-#define DZ_MODEM_DSR 0x0200 /* DSR for the modem line (2) */
-
-/*
- * Definitions for the Transmit Data Register.
- */
-#define DZ_BRK0 0x0100 /* Break assertion for line 0 */
-#define DZ_BRK1 0x0200 /* Break assertion for line 1 */
-#define DZ_BRK2 0x0400 /* Break assertion for line 2 */
-#define DZ_BRK3 0x0800 /* Break assertion for line 3 */
-
-/*
- * Definitions for the Line Parameter Register.
- */
-#define DZ_KEYBOARD 0x0000 /* line 0 = keyboard */
-#define DZ_MOUSE 0x0001 /* line 1 = mouse */
-#define DZ_MODEM 0x0002 /* line 2 = modem */
-#define DZ_PRINTER 0x0003 /* line 3 = printer */
-
-#define DZ_CSIZE 0x0018 /* Number of bits per byte (mask) */
-#define DZ_CS5 0x0000 /* 5 bits per byte */
-#define DZ_CS6 0x0008 /* 6 bits per byte */
-#define DZ_CS7 0x0010 /* 7 bits per byte */
-#define DZ_CS8 0x0018 /* 8 bits per byte */
-
-#define DZ_CSTOPB 0x0020 /* 2 stop bits instead of one */
-
-#define DZ_PARENB 0x0040 /* Parity enable */
-#define DZ_PARODD 0x0080 /* Odd parity instead of even */
-
-#define DZ_CBAUD 0x0E00 /* Baud Rate (mask) */
-#define DZ_B50 0x0000
-#define DZ_B75 0x0100
-#define DZ_B110 0x0200
-#define DZ_B134 0x0300
-#define DZ_B150 0x0400
-#define DZ_B300 0x0500
-#define DZ_B600 0x0600
-#define DZ_B1200 0x0700
-#define DZ_B1800 0x0800
-#define DZ_B2000 0x0900
-#define DZ_B2400 0x0A00
-#define DZ_B3600 0x0B00
-#define DZ_B4800 0x0C00
-#define DZ_B7200 0x0D00
-#define DZ_B9600 0x0E00
-
-#define DZ_CREAD 0x1000 /* Enable receiver */
-#define DZ_RXENAB 0x1000 /* enable receive char */
-/*
- * Addresses for the DZ registers
- */
-#define DZ_CSR 0x00 /* Control and Status Register */
-#define DZ_RBUF 0x08 /* Receive Buffer */
-#define DZ_LPR 0x08 /* Line Parameters Register */
-#define DZ_TCR 0x10 /* Transmitter Control Register */
-#define DZ_MSR 0x18 /* Modem Status Register */
-#define DZ_TDR 0x18 /* Transmit Data Register */
-
-
-#define DZ_NB_PORT 4
-
-#define DZ_XMIT_SIZE 4096 /* buffer size */
-#define WAKEUP_CHARS DZ_XMIT_SIZE/4
-
-#define DZ_EVENT_WRITE_WAKEUP 0
-
-#ifndef MIN
-#define MIN(a,b) ((a) < (b) ? (a) : (b))
-
-#define DZ_INITIALIZED 0x80000000 /* Serial port was initialized */
-#define DZ_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */
-#define DZ_NORMAL_ACTIVE 0x20000000 /* Normal device is active */
-#define DZ_BOOT_AUTOCONF 0x10000000 /* Autoconfigure port on bootup */
-#define DZ_CLOSING 0x08000000 /* Serial port is closing */
-#define DZ_CTS_FLOW 0x04000000 /* Do CTS flow control */
-#define DZ_CHECK_CD 0x02000000 /* i.e., CLOCAL */
-
-#define DZ_CLOSING_WAIT_INF 0
-#define DZ_CLOSING_WAIT_NONE 65535
-
-#define DZ_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */
-#define DZ_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
-#define DZ_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */
-
-struct dz_serial {
- unsigned port; /* base address for the port */
- int type;
- int flags;
- int baud_base;
- int blocked_open;
- unsigned short close_delay;
- unsigned short closing_wait;
- unsigned short line; /* port/line number */
- unsigned short cflags; /* line configuration flag */
- unsigned short x_char; /* xon/xoff character */
- unsigned short read_status_mask; /* mask for read condition */
- unsigned short ignore_status_mask; /* mask for ignore condition */
- unsigned long event; /* mask used in BH */
- unsigned char *xmit_buf; /* Transmit buffer */
- int xmit_head; /* Position of the head */
- int xmit_tail; /* Position of the tail */
- int xmit_cnt; /* Count of the chars in the buffer */
- int count; /* indicates how many times it has been opened */
- int magic;
-
- struct async_icount icount; /* keep track of things ... */
- struct tty_struct *tty; /* tty associated */
- struct tq_struct tqueue; /* Queue for BH */
- struct tq_struct tqueue_hangup;
- wait_queue_head_t open_wait;
- wait_queue_head_t close_wait;
-
- unsigned char is_console; /* flag indicating a serial console */
- unsigned char is_initialized;
-};
-
-static struct dz_serial multi[DZ_NB_PORT]; /* Four serial lines in the DZ chip */
-static struct dz_serial *dz_console;
-
-/*
- * tmp_buf is used as a temporary buffer by serial_write. We need to
- * lock it in case the copy_from_user blocks while swapping in a page,
- * and some other program tries to do a serial write at the same time.
- * Since the lock will only come under contention when the system is
- * swapping and available memory is low, it makes sense to share one
- * buffer across all the serial ports, since it significantly saves
- * memory if large numbers of serial ports are open.
- */
-static unsigned char *tmp_buf;
-static DECLARE_MUTEX(tmp_buf_sem);
-
-static char *dz_name = "DECstation DZ serial driver version ";
-static char *dz_version = "1.02";
-
-static inline unsigned short dz_in (struct dz_serial *, unsigned);
-static inline void dz_out (struct dz_serial *, unsigned, unsigned short);
-
-static inline void dz_sched_event (struct dz_serial *, int);
-static inline void receive_chars (struct dz_serial *);
-static inline void transmit_chars (struct dz_serial *);
-static inline void check_modem_status (struct dz_serial *);
-
-static void dz_stop (struct tty_struct *);
-static void dz_start (struct tty_struct *);
-static void dz_interrupt (int, void *, struct pt_regs *);
-static void do_serial_bh (void);
-static void do_softint (void *);
-static void do_serial_hangup (void *);
-static void change_speed (struct dz_serial *);
-static void dz_flush_chars (struct tty_struct *);
-static void dz_console_print (struct console *, const char *, unsigned int);
-static void dz_flush_buffer (struct tty_struct *);
-static void dz_throttle (struct tty_struct *);
-static void dz_unthrottle (struct tty_struct *);
-static void dz_send_xchar (struct tty_struct *, char);
-static void shutdown (struct dz_serial *);
-static void send_break (struct dz_serial *, int);
-static void dz_set_termios (struct tty_struct *, struct termios *);
-static void dz_close (struct tty_struct *, struct file *);
-static void dz_hangup (struct tty_struct *);
-static void show_serial_version (void);
-
-static int dz_write (struct tty_struct *, int, const unsigned char *, int);
-static int dz_write_room (struct tty_struct *);
-static int dz_chars_in_buffer (struct tty_struct *);
-static int startup (struct dz_serial *);
-static int get_serial_info (struct dz_serial *, struct serial_struct *);
-static int set_serial_info (struct dz_serial *, struct serial_struct *);
-static int get_lsr_info (struct dz_serial *, unsigned int *);
-static int dz_ioctl (struct tty_struct *, struct file *, unsigned int, unsigned long);
-static int block_til_ready (struct tty_struct *, struct file *, struct dz_serial *);
-static int dz_open (struct tty_struct *, struct file *);
-
-#ifdef MODULE
-int init_module (void)
-void cleanup_module (void)
-#endif
-
-#endif
-
-#endif /* DZ_SERIAL_H */
+++ /dev/null
-/*
- * Hitachi H8/337 Microcontroller driver
- *
- * The H8 is used to deal with the power and thermal environment
- * of a system.
- *
- * Fixes:
- * June 1999, AV added releasing /proc/driver/h8
- * Feb 2000, Borislav Deianov
- * changed queues to use list.h instead of lists.h
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-
-#include <asm/system.h>
-#include <asm/io.h>
-
-#include <linux/types.h>
-#include <linux/stddef.h>
-#include <linux/timer.h>
-#include <linux/fcntl.h>
-#include <linux/linkage.h>
-#include <linux/stat.h>
-#include <linux/proc_fs.h>
-#include <linux/miscdevice.h>
-#include <linux/list.h>
-#include <linux/ioport.h>
-#include <linux/poll.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-
-#include "h8.h"
-
-#define DEBUG_H8
-
-#ifdef DEBUG_H8
-#define Dprintk printk
-#else
-#define Dprintk
-#endif
-
-#define XDprintk if(h8_debug==-1)printk
-
-/*
- * The h8 device is one of the misc char devices.
- */
-#define H8_MINOR_DEV 140
-
-/*
- * Forward declarations.
- */
-static int h8_init(void);
-static int h8_display_blank(void);
-static int h8_display_unblank(void);
-
-static void h8_intr(int irq, void *dev_id, struct pt_regs *regs);
-
-static int h8_get_info(char *, char **, off_t, int);
-
-/*
- * Support Routines.
- */
-static void h8_hw_init(void);
-static void h8_start_new_cmd(void);
-static void h8_send_next_cmd_byte(void);
-static void h8_read_event_status(void);
-static void h8_sync(void);
-static void h8_q_cmd(u_char *, int, int);
-static void h8_cmd_done(h8_cmd_q_t *qp);
-static int h8_alloc_queues(void);
-
-static u_long h8_get_cpu_speed(void);
-static int h8_get_curr_temp(u_char curr_temp[]);
-static void h8_get_max_temp(void);
-static void h8_get_upper_therm_thold(void);
-static void h8_set_upper_therm_thold(int);
-static int h8_get_ext_status(u_char stat_word[]);
-
-static int h8_monitor_thread(void *);
-
-static int h8_manage_therm(void);
-static void h8_set_cpu_speed(int speed_divisor);
-
-static void h8_start_monitor_timer(unsigned long secs);
-static void h8_activate_monitor(unsigned long unused);
-
-/* in arch/alpha/kernel/lca.c */
-extern void lca_clock_print(void);
-extern int lca_get_clock(void);
-extern void lca_clock_fiddle(int);
-
-static void h8_set_event_mask(int);
-static void h8_clear_event_mask(int);
-
-/*
- * Driver structures
- */
-
-static struct timer_list h8_monitor_timer;
-static int h8_monitor_timer_active = 0;
-
-static char driver_version[] = "X0.0";/* no spaces */
-
-static union intr_buf intrbuf;
-static int intr_buf_ptr;
-static union intr_buf xx;
-static u_char last_temp;
-
-/*
- * I/O Macros for register reads and writes.
- */
-#define H8_READ(a) inb((a))
-#define H8_WRITE(d,a) outb((d),(a))
-
-#define H8_GET_STATUS H8_READ((h8_base) + H8_STATUS_REG_OFF)
-#define H8_READ_DATA H8_READ((h8_base) + H8_DATA_REG_OFF)
-#define WRITE_DATA(d) H8_WRITE((d), h8_base + H8_DATA_REG_OFF)
-#define WRITE_CMD(d) H8_WRITE((d), h8_base + H8_CMD_REG_OFF)
-
-static unsigned int h8_base = H8_BASE_ADDR;
-static unsigned int h8_irq = H8_IRQ;
-static unsigned int h8_state = H8_IDLE;
-static unsigned int h8_index = -1;
-static unsigned int h8_enabled = 0;
-
-static LIST_HEAD(h8_actq);
-static LIST_HEAD(h8_cmdq);
-static LIST_HEAD(h8_freeq);
-
-/*
- * Globals used in thermal control of Alphabook1.
- */
-static int cpu_speed_divisor = -1;
-static int h8_event_mask = 0;
-static DECLARE_WAIT_QUEUE_HEAD(h8_monitor_wait);
-static unsigned int h8_command_mask = 0;
-static int h8_uthermal_threshold = DEFAULT_UTHERMAL_THRESHOLD;
-static int h8_uthermal_window = UTH_HYSTERESIS;
-static int h8_debug = 0xfffffdfc;
-static int h8_ldamp = MHZ_115;
-static int h8_udamp = MHZ_57;
-static u_char h8_current_temp = 0;
-static u_char h8_system_temp = 0;
-static int h8_sync_channel = 0;
-static DECLARE_WAIT_QUEUE_HEAD(h8_sync_wait);
-static int h8_init_performed;
-
-/* CPU speeds and clock divisor values */
-static int speed_tab[6] = {230, 153, 115, 57, 28, 14};
-
-/*
- * H8 interrupt handler
- */
-static void h8_intr(int irq, void *dev_id, struct pt_regs *regs)
-{
- u_char stat_reg, data_reg;
- h8_cmd_q_t *qp = list_entry(h8_actq.next, h8_cmd_q_t, link);
-
- stat_reg = H8_GET_STATUS;
- data_reg = H8_READ_DATA;
-
- XDprintk("h8_intr: state %d status 0x%x data 0x%x\n", h8_state, stat_reg, data_reg);
-
- switch (h8_state) {
- /* Response to an asynchronous event. */
- case H8_IDLE: { /* H8_IDLE */
- if (stat_reg & H8_OFULL) {
- if (data_reg == H8_INTR) {
- h8_state = H8_INTR_MODE;
- /* Executing a command to determine what happened. */
- WRITE_CMD(H8_RD_EVENT_STATUS);
- intr_buf_ptr = 1;
- WRITE_CMD(H8_RD_EVENT_STATUS);
- } else {
- Dprintk("h8_intr: idle stat 0x%x data 0x%x\n",
- stat_reg, data_reg);
- }
- } else {
- Dprintk("h8_intr: bogus interrupt\n");
- }
- break;
- }
- case H8_INTR_MODE: { /* H8_INTR_MODE */
- XDprintk("H8 intr/intr_mode\n");
- if (data_reg == H8_BYTE_LEVEL_ACK) {
- return;
- } else if (data_reg == H8_CMD_ACK) {
- return;
- } else {
- intrbuf.byte[intr_buf_ptr] = data_reg;
- if(!intr_buf_ptr) {
- h8_state = H8_IDLE;
- h8_read_event_status();
- }
- intr_buf_ptr--;
- }
- break;
- }
- /* Placed in this state by h8_start_new_cmd(). */
- case H8_XMIT: { /* H8_XMIT */
- XDprintk("H8 intr/xmit\n");
- /* If a byte level acknowledgement has been received */
- if (data_reg == H8_BYTE_LEVEL_ACK) {
- XDprintk("H8 intr/xmit BYTE ACK\n");
- qp->nacks++;
- if (qp->nacks > qp->ncmd)
- if(h8_debug & 0x1)
- Dprintk("h8intr: bogus # of acks!\n");
- /*
- * If the number of bytes sent is less than the total
- * number of bytes in the command.
- */
- if (qp->cnt < qp->ncmd) {
- h8_send_next_cmd_byte();
- }
- return;
- /* If the complete command has produced an acknowledgement. */
- } else if (data_reg == H8_CMD_ACK) {
- XDprintk("H8 intr/xmit CMD ACK\n");
- /* If there are response bytes */
- if (qp->nrsp)
- h8_state = H8_RCV;
- else
- h8_state = H8_IDLE;
- qp->cnt = 0;
- return;
- /* Error, need to start over with a clean slate. */
- } else if (data_reg == H8_NACK) {
- XDprintk("h8_intr: NACK received restarting command\n");
- qp->nacks = 0;
- qp->cnt = 0;
- h8_state = H8_IDLE;
- WRITE_CMD(H8_SYNC);
- return;
- } else {
- Dprintk ("h8intr: xmit unknown data 0x%x \n", data_reg);
- return;
- }
- break;
- }
- case H8_RESYNC: { /* H8_RESYNC */
- XDprintk("H8 intr/resync\n");
- if (data_reg == H8_BYTE_LEVEL_ACK) {
- return;
- } else if (data_reg == H8_SYNC_BYTE) {
- h8_state = H8_IDLE;
- if (!list_empty(&h8_actq))
- h8_send_next_cmd_byte();
- } else {
- Dprintk ("h8_intr: resync unknown data 0x%x \n", data_reg);
- return;
- }
- break;
- }
- case H8_RCV: { /* H8_RCV */
- XDprintk("H8 intr/rcv\n");
- if (qp->cnt < qp->nrsp) {
- qp->rcvbuf[qp->cnt] = data_reg;
- qp->cnt++;
- /* If command reception finished. */
- if (qp->cnt == qp->nrsp) {
- h8_state = H8_IDLE;
- list_del(&qp->link);
- h8_cmd_done (qp);
- /* More commands to send over? */
- if (!list_empty(&h8_cmdq))
- h8_start_new_cmd();
- }
- return;
- } else {
- Dprintk ("h8intr: rcv overflow cmd 0x%x\n", qp->cmdbuf[0]);
- }
- break;
- }
- default: /* default */
- Dprintk("H8 intr/unknown\n");
- break;
- }
- return;
-}
-
-static void __exit h8_cleanup (void)
-{
- remove_proc_entry("driver/h8", NULL);
- release_region(h8_base, 8);
- free_irq(h8_irq, NULL);
-}
-
-static int __init h8_init(void)
-{
- if(request_irq(h8_irq, h8_intr, SA_INTERRUPT, "h8", NULL))
- {
- printk(KERN_ERR "H8: error: IRQ %d is not free\n", h8_irq);
- return -EIO;
- }
- printk(KERN_INFO "H8 at 0x%x IRQ %d\n", h8_base, h8_irq);
-
- if (!request_region(h8_base, 8, "h8"))
- {
- free_irq(h8_irq, NULL);
- return -EIO;
- }
-
- create_proc_info_entry("driver/h8", 0, NULL, h8_get_info);
-
- h8_alloc_queues();
-
- h8_hw_init();
-
- kernel_thread(h8_monitor_thread, NULL, 0);
-
- return 0;
-}
-
-module_init(h8_init);
-module_exit(h8_cleanup);
-
-static void __init h8_hw_init(void)
-{
- u_char buf[H8_MAX_CMD_SIZE];
-
- /* set CPU speed to max for booting */
- h8_set_cpu_speed(MHZ_230);
-
- /*
- * Initialize the H8
- */
- h8_sync(); /* activate interrupts */
-
- /* To clear conditions left by console */
- h8_read_event_status();
-
- /* Perform a conditioning read */
- buf[0] = H8_DEVICE_CONTROL;
- buf[1] = 0xff;
- buf[2] = 0x0;
- h8_q_cmd(buf, 3, 1);
-
- /* Turn on built-in and external mice, capture power switch */
- buf[0] = H8_DEVICE_CONTROL;
- buf[1] = 0x0;
- buf[2] = H8_ENAB_INT_PTR | H8_ENAB_EXT_PTR |
- /*H8_DISAB_PWR_OFF_SW |*/ H8_ENAB_LOW_SPD_IND;
- h8_q_cmd(buf, 3, 1);
-
- h8_enabled = 1;
- return;
-}
-
-static int h8_get_info(char *buf, char **start, off_t fpos, int length)
-{
-#ifdef CONFIG_PROC_FS
- char *p;
-
- if (!h8_enabled)
- return 0;
- p = buf;
-
-
- /*
- 0) Linux driver version (this will change if format changes)
- 1)
- 2)
- 3)
- 4)
- */
-
- p += sprintf(p, "%s \n",
- driver_version
- );
-
- return p - buf;
-#else
- return 0;
-#endif
-}
-
-/* Called from console driver -- must make sure h8_enabled. */
-static int h8_display_blank(void)
-{
-#ifdef CONFIG_H8_DISPLAY_BLANK
- int error;
-
- if (!h8_enabled)
- return 0;
- error = h8_set_display_power_state(H8_STATE_STANDBY);
- if (error == H8_SUCCESS)
- return 1;
- h8_error("set display standby", error);
-#endif
- return 0;
-}
-
-/* Called from console driver -- must make sure h8_enabled. */
-static int h8_display_unblank(void)
-{
-#ifdef CONFIG_H8_DISPLAY_BLANK
- int error;
-
- if (!h8_enabled)
- return 0;
- error = h8_set_display_power_state(H8_STATE_READY);
- if (error == H8_SUCCESS)
- return 1;
- h8_error("set display ready", error);
-#endif
- return 0;
-}
-
-static int h8_alloc_queues(void)
-{
- h8_cmd_q_t *qp;
- unsigned long flags;
- int i;
-
- qp = (h8_cmd_q_t *)kmalloc((sizeof (h8_cmd_q_t) * H8_Q_ALLOC_AMOUNT),
- GFP_KERNEL);
-
- if (!qp) {
- printk(KERN_ERR "H8: could not allocate memory for command queue\n");
- return(0);
- }
- /* add to the free queue */
- save_flags(flags); cli();
- for (i = 0; i < H8_Q_ALLOC_AMOUNT; i++) {
- /* place each at front of freeq */
- list_add(&qp[i].link, &h8_freeq);
- }
- restore_flags(flags);
- return (1);
-}
-
-/*
- * Basic means by which commands are sent to the H8.
- */
-void
-h8_q_cmd(u_char *cmd, int cmd_size, int resp_size)
-{
- h8_cmd_q_t *qp;
- unsigned long flags;
- int i;
-
- /* get cmd buf */
- save_flags(flags); cli();
- while (list_empty(&h8_freeq)) {
- Dprintk("H8: need to allocate more cmd buffers\n");
- restore_flags(flags);
- h8_alloc_queues();
- save_flags(flags); cli();
- }
- /* get first element from queue */
- qp = list_entry(h8_freeq.next, h8_cmd_q_t, link);
- list_del(&qp->link);
-
- restore_flags(flags);
-
- /* fill it in */
- for (i = 0; i < cmd_size; i++)
- qp->cmdbuf[i] = cmd[i];
- qp->ncmd = cmd_size;
- qp->nrsp = resp_size;
-
- /* queue it at the end of the cmd queue */
- save_flags(flags); cli();
-
- /* XXX this actually puts it at the start of cmd queue, bug? */
- list_add(&qp->link, &h8_cmdq);
-
- restore_flags(flags);
-
- h8_start_new_cmd();
-}
-
-void
-h8_start_new_cmd(void)
-{
- unsigned long flags;
- h8_cmd_q_t *qp;
-
- save_flags(flags); cli();
- if (h8_state != H8_IDLE) {
- if (h8_debug & 0x1)
- Dprintk("h8_start_new_cmd: not idle\n");
- restore_flags(flags);
- return;
- }
-
- if (!list_empty(&h8_actq)) {
- Dprintk("h8_start_new_cmd: inconsistency: IDLE with non-empty active queue!\n");
- restore_flags(flags);
- return;
- }
-
- if (list_empty(&h8_cmdq)) {
- Dprintk("h8_start_new_cmd: no command to dequeue\n");
- restore_flags(flags);
- return;
- }
- /*
- * Take first command off of the command queue and put
- * it on the active queue.
- */
- qp = list_entry(h8_cmdq.next, h8_cmd_q_t, link);
- list_del(&qp->link);
- /* XXX should this go to the end of the active queue? */
- list_add(&qp->link, &h8_actq);
- h8_state = H8_XMIT;
- if (h8_debug & 0x1)
- Dprintk("h8_start_new_cmd: Starting a command\n");
-
- qp->cnt = 1;
- WRITE_CMD(qp->cmdbuf[0]); /* Kick it off */
-
- restore_flags(flags);
- return;
-}
-
-void
-h8_send_next_cmd_byte(void)
-{
- h8_cmd_q_t *qp = list_entry(h8_actq.next, h8_cmd_q_t, link);
- int cnt;
-
- cnt = qp->cnt;
- qp->cnt++;
-
- if (h8_debug & 0x1)
- Dprintk("h8 sending next cmd byte 0x%x (0x%x)\n",
- cnt, qp->cmdbuf[cnt]);
-
- if (cnt) {
- WRITE_DATA(qp->cmdbuf[cnt]);
- } else {
- WRITE_CMD(qp->cmdbuf[cnt]);
- }
- return;
-}
-
-/*
- * Synchronize H8 communications channel for command transmission.
- */
-void
-h8_sync(void)
-{
- u_char buf[H8_MAX_CMD_SIZE];
-
- buf[0] = H8_SYNC;
- buf[1] = H8_SYNC_BYTE;
- h8_q_cmd(buf, 2, 1);
-}
-
-/*
- * Responds to external interrupt. Reads event status word and
- * decodes type of interrupt.
- */
-void
-h8_read_event_status(void)
-{
-
- if(h8_debug & 0x200)
- printk(KERN_DEBUG "h8_read_event_status: value 0x%x\n", intrbuf.word);
-
- /*
- * Power related items
- */
- if (intrbuf.word & H8_DC_CHANGE) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: DC_CHANGE\n");
- /* see if dc added or removed, set batt/dc flag, send event */
-
- h8_set_event_mask(H8_MANAGE_BATTERY);
- wake_up(&h8_monitor_wait);
- }
-
- if (intrbuf.word & H8_POWER_BUTTON) {
- printk(KERN_CRIT "Power switch pressed - please wait - preparing to power
-off\n");
- h8_set_event_mask(H8_POWER_BUTTON);
- wake_up(&h8_monitor_wait);
- }
-
- /*
- * Thermal related items
- */
- if (intrbuf.word & H8_THERMAL_THRESHOLD) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: THERMAL_THRESHOLD\n");
- h8_set_event_mask(H8_MANAGE_UTHERM);
- wake_up(&h8_monitor_wait);
- }
-
- /*
- * nops -for now
- */
- if (intrbuf.word & H8_DOCKING_STATION_STATUS) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: DOCKING_STATION_STATUS\n");
- /* read_ext_status */
- }
- if (intrbuf.word & H8_EXT_BATT_STATUS) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: EXT_BATT_STATUS\n");
-
- }
- if (intrbuf.word & H8_EXT_BATT_CHARGE_STATE) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: EXT_BATT_CHARGE_STATE\n");
-
- }
- if (intrbuf.word & H8_BATT_CHANGE_OVER) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: BATT_CHANGE_OVER\n");
-
- }
- if (intrbuf.word & H8_WATCHDOG) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: WATCHDOG\n");
- /* nop */
- }
- if (intrbuf.word & H8_SHUTDOWN) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: SHUTDOWN\n");
- /* nop */
- }
- if (intrbuf.word & H8_KEYBOARD) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: KEYBOARD\n");
- /* nop */
- }
- if (intrbuf.word & H8_EXT_MOUSE_OR_CASE_SWITCH) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: EXT_MOUSE_OR_CASE_SWITCH\n");
- /* read_ext_status*/
- }
- if (intrbuf.word & H8_INT_BATT_LOW) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: INT_BATT_LOW\n"); post
- /* event, warn user */
- }
- if (intrbuf.word & H8_INT_BATT_CHARGE_STATE) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: INT_BATT_CHARGE_STATE\n");
- /* nop - happens often */
- }
- if (intrbuf.word & H8_INT_BATT_STATUS) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: INT_BATT_STATUS\n");
-
- }
- if (intrbuf.word & H8_INT_BATT_CHARGE_THRESHOLD) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: INT_BATT_CHARGE_THRESHOLD\n");
- /* nop - happens often */
- }
- if (intrbuf.word & H8_EXT_BATT_LOW) {
- if(h8_debug & 0x4)
- printk(KERN_DEBUG "h8_read_event_status: EXT_BATT_LOW\n");
- /*if no internal, post event, warn user */
- /* else nop */
- }
-
- return;
-}
-
-/*
- * Function called when H8 has performed requested command.
- */
-static void
-h8_cmd_done(h8_cmd_q_t *qp)
-{
-
- /* what to do */
- switch (qp->cmdbuf[0]) {
- case H8_SYNC:
- if (h8_debug & 0x40000)
- printk(KERN_DEBUG "H8: Sync command done - byte returned was 0x%x\n",
- qp->rcvbuf[0]);
- list_add(&qp->link, &h8_freeq);
- break;
-
- case H8_RD_SN:
- case H8_RD_ENET_ADDR:
- printk(KERN_DEBUG "H8: read Ethernet address: command done - address: %x - %x - %x - %x - %x - %x \n",
- qp->rcvbuf[0], qp->rcvbuf[1], qp->rcvbuf[2],
- qp->rcvbuf[3], qp->rcvbuf[4], qp->rcvbuf[5]);
- list_add(&qp->link, &h8_freeq);
- break;
-
- case H8_RD_HW_VER:
- case H8_RD_MIC_VER:
- case H8_RD_MAX_TEMP:
- printk(KERN_DEBUG "H8: Max recorded CPU temp %d, Sys temp %d\n",
- qp->rcvbuf[0], qp->rcvbuf[1]);
- list_add(&qp->link, &h8_freeq);
- break;
-
- case H8_RD_MIN_TEMP:
- printk(KERN_DEBUG "H8: Min recorded CPU temp %d, Sys temp %d\n",
- qp->rcvbuf[0], qp->rcvbuf[1]);
- list_add(&qp->link, &h8_freeq);
- break;
-
- case H8_RD_CURR_TEMP:
- h8_sync_channel |= H8_RD_CURR_TEMP;
- xx.byte[0] = qp->rcvbuf[0];
- xx.byte[1] = qp->rcvbuf[1];
- wake_up(&h8_sync_wait);
- list_add(&qp->link, &h8_freeq);
- break;
-
- case H8_RD_SYS_VARIENT:
- case H8_RD_PWR_ON_CYCLES:
- printk(KERN_DEBUG " H8: RD_PWR_ON_CYCLES command done\n");
- break;
-
- case H8_RD_PWR_ON_SECS:
- printk(KERN_DEBUG "H8: RD_PWR_ON_SECS command done\n");
- break;
-
- case H8_RD_RESET_STATUS:
- case H8_RD_PWR_DN_STATUS:
- case H8_RD_EVENT_STATUS:
- case H8_RD_ROM_CKSM:
- case H8_RD_EXT_STATUS:
- xx.byte[1] = qp->rcvbuf[0];
- xx.byte[0] = qp->rcvbuf[1];
- h8_sync_channel |= H8_GET_EXT_STATUS;
- wake_up(&h8_sync_wait);
- list_add(&qp->link, &h8_freeq);
- break;
-
- case H8_RD_USER_CFG:
- case H8_RD_INT_BATT_VOLT:
- case H8_RD_DC_INPUT_VOLT:
- case H8_RD_HORIZ_PTR_VOLT:
- case H8_RD_VERT_PTR_VOLT:
- case H8_RD_EEPROM_STATUS:
- case H8_RD_ERR_STATUS:
- case H8_RD_NEW_BUSY_SPEED:
- case H8_RD_CONFIG_INTERFACE:
- case H8_RD_INT_BATT_STATUS:
- printk(KERN_DEBUG "H8: Read int batt status cmd done - returned was %x %x %x\n",
- qp->rcvbuf[0], qp->rcvbuf[1], qp->rcvbuf[2]);
- list_add(&qp->link, &h8_freeq);
- break;
-
- case H8_RD_EXT_BATT_STATUS:
- case H8_RD_PWR_UP_STATUS:
- case H8_RD_EVENT_STATUS_MASK:
- case H8_CTL_EMU_BITPORT:
- case H8_DEVICE_CONTROL:
- if(h8_debug & 0x20000) {
- printk(KERN_DEBUG "H8: Device control cmd done - byte returned was 0x%x\n",
- qp->rcvbuf[0]);
- }
- list_add(&qp->link, &h8_freeq);
- break;
-
- case H8_CTL_TFT_BRT_DC:
- case H8_CTL_WATCHDOG:
- case H8_CTL_MIC_PROT:
- case H8_CTL_INT_BATT_CHG:
- case H8_CTL_EXT_BATT_CHG:
- case H8_CTL_MARK_SPACE:
- case H8_CTL_MOUSE_SENSITIVITY:
- case H8_CTL_DIAG_MODE:
- case H8_CTL_IDLE_AND_BUSY_SPDS:
- printk(KERN_DEBUG "H8: Idle and busy speed command done\n");
- break;
-
- case H8_CTL_TFT_BRT_BATT:
- case H8_CTL_UPPER_TEMP:
- if(h8_debug & 0x10) {
- XDprintk("H8: ctl upper thermal thresh cmd done - returned was %d\n",
- qp->rcvbuf[0]);
- }
- list_add(&qp->link, &h8_freeq);
- break;
-
- case H8_CTL_LOWER_TEMP:
- case H8_CTL_TEMP_CUTOUT:
- case H8_CTL_WAKEUP:
- case H8_CTL_CHG_THRESHOLD:
- case H8_CTL_TURBO_MODE:
- case H8_SET_DIAG_STATUS:
- case H8_SOFTWARE_RESET:
- case H8_RECAL_PTR:
- case H8_SET_INT_BATT_PERCENT:
- case H8_WRT_CFG_INTERFACE_REG:
- case H8_WRT_EVENT_STATUS_MASK:
- case H8_ENTER_POST_MODE:
- case H8_EXIT_POST_MODE:
- case H8_RD_EEPROM:
- case H8_WRT_EEPROM:
- case H8_WRT_TO_STATUS_DISP:
- printk("H8: Write IO status display command done\n");
- break;
-
- case H8_DEFINE_SPC_CHAR:
- case H8_DEFINE_TABLE_STRING_ENTRY:
- case H8_PERFORM_EMU_CMD:
- case H8_EMU_RD_REG:
- case H8_EMU_WRT_REG:
- case H8_EMU_RD_RAM:
- case H8_EMU_WRT_RAM:
- case H8_BQ_RD_REG:
- case H8_BQ_WRT_REG:
- case H8_PWR_OFF:
- printk (KERN_DEBUG "H8: misc command completed\n");
- break;
- }
- return;
-}
-
-/*
- * Retrieve the current CPU temperature and case temperature. Provides
- * the feedback for the thermal control algorithm. Synchcronized via
- * sleep() for priority so that no other actions in the process will take
- * place before the data becomes available.
- */
-int
-h8_get_curr_temp(u_char curr_temp[])
-{
- u_char buf[H8_MAX_CMD_SIZE];
- unsigned long flags;
-
- memset(buf, 0, H8_MAX_CMD_SIZE);
- buf[0] = H8_RD_CURR_TEMP;
-
- h8_q_cmd(buf, 1, 2);
-
- save_flags(flags); cli();
-
- while((h8_sync_channel & H8_RD_CURR_TEMP) == 0)
- sleep_on(&h8_sync_wait);
-
- restore_flags(flags);
-
- h8_sync_channel &= ~H8_RD_CURR_TEMP;
- curr_temp[0] = xx.byte[0];
- curr_temp[1] = xx.byte[1];
- xx.word = 0;
-
- if(h8_debug & 0x8)
- printk("H8: curr CPU temp %d, Sys temp %d\n",
- curr_temp[0], curr_temp[1]);
- return 0;
-}
-
-static void
-h8_get_max_temp(void)
-{
- u_char buf[H8_MAX_CMD_SIZE];
-
- buf[0] = H8_RD_MAX_TEMP;
- h8_q_cmd(buf, 1, 2);
-}
-
-/*
- * Assigns an upper limit to the value of the H8 thermal interrupt.
- * As an example setting a value of 115 F here will cause the
- * interrupt to trigger when the CPU temperature reaches 115 F.
- */
-static void
-h8_set_upper_therm_thold(int thold)
-{
- u_char buf[H8_MAX_CMD_SIZE];
-
- /* write 0 to reinitialize interrupt */
- buf[0] = H8_CTL_UPPER_TEMP;
- buf[1] = 0x0;
- buf[2] = 0x0;
- h8_q_cmd(buf, 3, 1);
-
- /* Do it for real */
- buf[0] = H8_CTL_UPPER_TEMP;
- buf[1] = 0x0;
- buf[2] = thold;
- h8_q_cmd(buf, 3, 1);
-}
-
-static void
-h8_get_upper_therm_thold(void)
-{
- u_char buf[H8_MAX_CMD_SIZE];
-
- buf[0] = H8_CTL_UPPER_TEMP;
- buf[1] = 0xff;
- buf[2] = 0;
- h8_q_cmd(buf, 3, 1);
-}
-
-/*
- * The external status word contains information on keyboard controller,
- * power button, changes in external batt status, change in DC state,
- * docking station, etc. General purpose querying use.
- */
-int
-h8_get_ext_status(u_char stat_word[])
-{
- u_char buf[H8_MAX_CMD_SIZE];
- unsigned long flags;
-
- memset(buf, 0, H8_MAX_CMD_SIZE);
- buf[0] = H8_RD_EXT_STATUS;
-
- h8_q_cmd(buf, 1, 2);
-
- save_flags(flags); cli();
-
- while((h8_sync_channel & H8_GET_EXT_STATUS) == 0)
- sleep_on(&h8_sync_wait);
-
- restore_flags(flags);
-
- h8_sync_channel &= ~H8_GET_EXT_STATUS;
- stat_word[0] = xx.byte[0];
- stat_word[1] = xx.byte[1];
- xx.word = 0;
-
- if(h8_debug & 0x8)
- printk("H8: curr ext status %x, %x\n",
- stat_word[0], stat_word[1]);
-
- return 0;
-}
-
-/*
- * Thread attached to task 0 manages thermal/physcial state of Alphabook.
- * When a condition is detected by the interrupt service routine, the
- * isr does a wakeup() on h8_monitor_wait. The mask value is then
- * screened for the appropriate action.
- */
-
-int
-h8_monitor_thread(void * unused)
-{
- u_char curr_temp[2];
-
- /*
- * Need a logic based safety valve here. During boot when this thread is
- * started and the thermal interrupt is not yet initialized this logic
- * checks the temperature and acts accordingly. When this path is acted
- * upon system boot is painfully slow, however, the priority associated
- * with overheating is high enough to warrant this action.
- */
- h8_get_curr_temp(curr_temp);
-
- printk(KERN_INFO "H8: Initial CPU temp: %d\n", curr_temp[0]);
-
- if(curr_temp[0] >= h8_uthermal_threshold) {
- h8_set_event_mask(H8_MANAGE_UTHERM);
- h8_manage_therm();
- } else {
- /*
- * Arm the upper thermal limit of the H8 so that any temp in
- * excess will trigger the thermal control mechanism.
- */
- h8_set_upper_therm_thold(h8_uthermal_threshold);
- }
-
- for(;;) {
- sleep_on(&h8_monitor_wait);
-
- if(h8_debug & 0x2)
- printk(KERN_DEBUG "h8_monitor_thread awakened, mask:%x\n",
- h8_event_mask);
-
- if (h8_event_mask & (H8_MANAGE_UTHERM|H8_MANAGE_LTHERM)) {
- h8_manage_therm();
- }
-
-#if 0
- if (h8_event_mask & H8_POWER_BUTTON) {
- h8_system_down();
- }
-
- /*
- * If an external DC supply is removed or added make
- * appropriate CPU speed adjustments.
- */
- if (h8_event_mask & H8_MANAGE_BATTERY) {
- h8_run_level_3_manage(H8_RUN);
- h8_clear_event_mask(H8_MANAGE_BATTERY);
- }
-#endif
- }
-}
-
-/*
- * Function implements the following policy. When the machine is booted
- * the system is set to run at full clock speed. When the upper thermal
- * threshold is reached as a result of full clock a damping factor is
- * applied to cool off the cpu. The default value is one quarter clock
- * (57 Mhz). When as a result of this cooling a temperature lower by
- * hmc_uthermal_window is reached, the machine is reset to a higher
- * speed, one half clock (115 Mhz). One half clock is maintained until
- * the upper thermal threshold is again reached restarting the cycle.
- */
-
-int
-h8_manage_therm(void)
-{
- u_char curr_temp[2];
-
- if(h8_event_mask & H8_MANAGE_UTHERM) {
- /* Upper thermal interrupt received, need to cool down. */
- if(h8_debug & 0x10)
- printk(KERN_WARNING "H8: Thermal threshold %d F reached\n",
- h8_uthermal_threshold);
- h8_set_cpu_speed(h8_udamp);
- h8_clear_event_mask(H8_MANAGE_UTHERM);
- h8_set_event_mask(H8_MANAGE_LTHERM);
- /* Check again in 30 seconds for CPU temperature */
- h8_start_monitor_timer(H8_TIMEOUT_INTERVAL);
- } else if (h8_event_mask & H8_MANAGE_LTHERM) {
- /* See how cool the system has become as a result
- of the reduction in speed. */
- h8_get_curr_temp(curr_temp);
- last_temp = curr_temp[0];
- if (curr_temp[0] < (h8_uthermal_threshold - h8_uthermal_window))
- {
- /* System cooling has progressed to a point
- that the CPU may be sped up. */
- h8_set_upper_therm_thold(h8_uthermal_threshold);
- h8_set_cpu_speed(h8_ldamp); /* adjustable */
- if(h8_debug & 0x10)
- printk(KERN_WARNING "H8: CPU cool, applying cpu_divisor: %d \n",
- h8_ldamp);
- h8_clear_event_mask(H8_MANAGE_LTHERM);
- }
- else /* Not cool enough yet, check again in 30 seconds. */
- h8_start_monitor_timer(H8_TIMEOUT_INTERVAL);
- } else {
-
- }
- return 0;
-}
-
-/*
- * Function conditions the value of global_rpb_counter before
- * calling the primitive which causes the actual speed change.
- */
-void
-h8_set_cpu_speed(int speed_divisor)
-{
-
-#ifdef NOT_YET
-/*
- * global_rpb_counter is consumed by alpha_delay() in determining just
- * how much time to delay. It is necessary that the number of microseconds
- * in DELAY(n) be kept consistent over a variety of CPU clock speeds.
- * To that end global_rpb_counter is here adjusted.
- */
-
- switch (speed_divisor) {
- case 0:
- global_rpb_counter = rpb->rpb_counter * 2L;
- break;
- case 1:
- global_rpb_counter = rpb->rpb_counter * 4L / 3L ;
- break;
- case 3:
- global_rpb_counter = rpb->rpb_counter / 2L;
- break;
- case 4:
- global_rpb_counter = rpb->rpb_counter / 4L;
- break;
- case 5:
- global_rpb_counter = rpb->rpb_counter / 8L;
- break;
- /*
- * This case most commonly needed for cpu_speed_divisor
- * of 2 which is the value assigned by the firmware.
- */
- default:
- global_rpb_counter = rpb->rpb_counter;
- break;
- }
-#endif /* NOT_YET */
-
- if(h8_debug & 0x8)
- printk(KERN_DEBUG "H8: Setting CPU speed to %d MHz\n",
- speed_tab[speed_divisor]);
-
- /* Make the actual speed change */
- lca_clock_fiddle(speed_divisor);
-}
-
-/*
- * Gets value stored in rpb representing CPU clock speed and adjusts this
- * value based on the current clock speed divisor.
- */
-u_long
-h8_get_cpu_speed(void)
-{
- u_long speed = 0;
- u_long counter;
-
-#ifdef NOT_YET
- counter = rpb->rpb_counter / 1000000L;
-
- switch (alphabook_get_clock()) {
- case 0:
- speed = counter * 2L;
- break;
- case 1:
- speed = counter * 4L / 3L ;
- break;
- case 2:
- speed = counter;
- break;
- case 3:
- speed = counter / 2L;
- break;
- case 4:
- speed = counter / 4L;
- break;
- case 5:
- speed = counter / 8L;
- break;
- default:
- break;
- }
- if(h8_debug & 0x8)
- printk(KERN_DEBUG "H8: CPU speed current setting: %d MHz\n", speed);
-#endif /* NOT_YET */
- return speed;
-}
-
-static void
-h8_activate_monitor(unsigned long unused)
-{
- unsigned long flags;
-
- save_flags(flags); cli();
- h8_monitor_timer_active = 0;
- restore_flags(flags);
-
- wake_up(&h8_monitor_wait);
-}
-
-static void
-h8_start_monitor_timer(unsigned long secs)
-{
- unsigned long flags;
-
- if (h8_monitor_timer_active)
- return;
-
- save_flags(flags); cli();
- h8_monitor_timer_active = 1;
- restore_flags(flags);
-
- init_timer(&h8_monitor_timer);
- h8_monitor_timer.function = h8_activate_monitor;
- h8_monitor_timer.expires = secs * HZ + jiffies;
- add_timer(&h8_monitor_timer);
-}
-
-static void h8_set_event_mask(int mask)
-{
- unsigned long flags;
-
- save_flags(flags); cli();
- h8_event_mask |= mask;
- restore_flags(flags);
-}
-
-static void h8_clear_event_mask(int mask)
-{
- unsigned long flags;
-
- save_flags(flags); cli();
- h8_event_mask &= (~mask);
- restore_flags(flags);
-}
-
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- */
-
-#ifndef __H8_H__
-#define __H8_H__
-
-/*
- * Register address and offsets
- */
-#define H8_BASE_ADDR 0x170 /* default */
-#define H8_IRQ 9 /* default */
-#define H8_STATUS_REG_OFF 0x4
-#define H8_CMD_REG_OFF 0x4
-#define H8_DATA_REG_OFF 0x0
-
-
-/* H8 register bit definitions */
-/* status register */
-#define H8_OFULL 0x1 /* output data register full */
-#define H8_IFULL 0x2 /* input data register full */
-#define H8_CMD 0x8 /* command / not data */
-
-#define H8_INTR 0xfa
-#define H8_NACK 0xfc
-#define H8_BYTE_LEVEL_ACK 0xfd
-#define H8_CMD_ACK 0xfe
-#define H8_SYNC_BYTE 0x99
-
-/*
- * H8 command definitions
- */
-/* System info commands */
-#define H8_SYNC 0x0
-#define H8_RD_SN 0x1
-#define H8_RD_ENET_ADDR 0x2
-#define H8_RD_HW_VER 0x3
-#define H8_RD_MIC_VER 0x4
-#define H8_RD_MAX_TEMP 0x5
-#define H8_RD_MIN_TEMP 0x6
-#define H8_RD_CURR_TEMP 0x7
-#define H8_RD_SYS_VARIENT 0x8
-#define H8_RD_PWR_ON_CYCLES 0x9
-#define H8_RD_PWR_ON_SECS 0xa
-#define H8_RD_RESET_STATUS 0xb
-#define H8_RD_PWR_DN_STATUS 0xc
-#define H8_RD_EVENT_STATUS 0xd
-#define H8_RD_ROM_CKSM 0xe
-#define H8_RD_EXT_STATUS 0xf
-#define H8_RD_USER_CFG 0x10
-#define H8_RD_INT_BATT_VOLT 0x11
-#define H8_RD_DC_INPUT_VOLT 0x12
-#define H8_RD_HORIZ_PTR_VOLT 0x13
-#define H8_RD_VERT_PTR_VOLT 0x14
-#define H8_RD_EEPROM_STATUS 0x15
-#define H8_RD_ERR_STATUS 0x16
-#define H8_RD_NEW_BUSY_SPEED 0x17
-#define H8_RD_CONFIG_INTERFACE 0x18
-#define H8_RD_INT_BATT_STATUS 0x19
-#define H8_RD_EXT_BATT_STATUS 0x1a
-#define H8_RD_PWR_UP_STATUS 0x1b
-#define H8_RD_EVENT_STATUS_MASK 0x56
-
-/* Read/write/modify commands */
-#define H8_CTL_EMU_BITPORT 0x32
-#define H8_DEVICE_CONTROL 0x21
-#define H8_CTL_TFT_BRT_DC 0x22
-#define H8_CTL_WATCHDOG 0x23
-#define H8_CTL_MIC_PROT 0x24
-#define H8_CTL_INT_BATT_CHG 0x25
-#define H8_CTL_EXT_BATT_CHG 0x26
-#define H8_CTL_MARK_SPACE 0x27
-#define H8_CTL_MOUSE_SENSITIVITY 0x28
-#define H8_CTL_DIAG_MODE 0x29
-#define H8_CTL_IDLE_AND_BUSY_SPDS 0x2a
-#define H8_CTL_TFT_BRT_BATT 0x2b
-#define H8_CTL_UPPER_TEMP 0x2c
-#define H8_CTL_LOWER_TEMP 0x2d
-#define H8_CTL_TEMP_CUTOUT 0x2e
-#define H8_CTL_WAKEUP 0x2f
-#define H8_CTL_CHG_THRESHOLD 0x30
-#define H8_CTL_TURBO_MODE 0x31
-#define H8_SET_DIAG_STATUS 0x40
-#define H8_SOFTWARE_RESET 0x41
-#define H8_RECAL_PTR 0x42
-#define H8_SET_INT_BATT_PERCENT 0x43
-#define H8_WRT_CFG_INTERFACE_REG 0x45
-#define H8_WRT_EVENT_STATUS_MASK 0x57
-#define H8_ENTER_POST_MODE 0x46
-#define H8_EXIT_POST_MODE 0x47
-
-/* Block transfer commands */
-#define H8_RD_EEPROM 0x50
-#define H8_WRT_EEPROM 0x51
-#define H8_WRT_TO_STATUS_DISP 0x52
-#define H8_DEFINE_SPC_CHAR 0x53
-
-/* Generic commands */
-#define H8_DEFINE_TABLE_STRING_ENTRY 0x60
-
-/* Battery control commands */
-#define H8_PERFORM_EMU_CMD 0x70
-#define H8_EMU_RD_REG 0x71
-#define H8_EMU_WRT_REG 0x72
-#define H8_EMU_RD_RAM 0x73
-#define H8_EMU_WRT_RAM 0x74
-#define H8_BQ_RD_REG 0x75
-#define H8_BQ_WRT_REG 0x76
-
-/* System admin commands */
-#define H8_PWR_OFF 0x80
-
-/*
- * H8 command related definitions
- */
-
-/* device control argument bits */
-#define H8_ENAB_EXTSMI 0x1
-#define H8_DISAB_IRQ 0x2
-#define H8_ENAB_FLASH_WRT 0x4
-#define H8_ENAB_THERM 0x8
-#define H8_ENAB_INT_PTR 0x10
-#define H8_ENAB_LOW_SPD_IND 0x20
-#define H8_ENAB_EXT_PTR 0x40
-#define H8_DISAB_PWR_OFF_SW 0x80
-#define H8_POWER_OFF 0x80
-
-/* H8 read event status bits */
-#define H8_DC_CHANGE 0x1
-#define H8_INT_BATT_LOW 0x2
-#define H8_INT_BATT_CHARGE_THRESHOLD 0x4
-#define H8_INT_BATT_CHARGE_STATE 0x8
-#define H8_INT_BATT_STATUS 0x10
-#define H8_EXT_BATT_CHARGE_STATE 0x20
-#define H8_EXT_BATT_LOW 0x40
-#define H8_EXT_BATT_STATUS 0x80
-#define H8_THERMAL_THRESHOLD 0x100
-#define H8_WATCHDOG 0x200
-#define H8_DOCKING_STATION_STATUS 0x400
-#define H8_EXT_MOUSE_OR_CASE_SWITCH 0x800
-#define H8_KEYBOARD 0x1000
-#define H8_BATT_CHANGE_OVER 0x2000
-#define H8_POWER_BUTTON 0x4000
-#define H8_SHUTDOWN 0x8000
-
-/* H8 control idle and busy speeds */
-#define H8_SPEED_LOW 0x1
-#define H8_SPEED_MED 0x2
-#define H8_SPEED_HI 0x3
-#define H8_SPEED_LOCKED 0x80
-
-#define H8_MAX_CMD_SIZE 18
-#define H8_Q_ALLOC_AMOUNT 10
-
-/* H8 state field values */
-#define H8_IDLE 1
-#define H8_XMIT 2
-#define H8_RCV 3
-#define H8_RESYNC 4
-#define H8_INTR_MODE 5
-
-/* Mask values for control functions */
-#define UTH_HYSTERESIS 5
-#define DEFAULT_UTHERMAL_THRESHOLD 115
-#define H8_TIMEOUT_INTERVAL 30
-#define H8_RUN 4
-
-#define H8_GET_MAX_TEMP 0x1
-#define H8_GET_CURR_TEMP 0x2
-#define H8_GET_UPPR_THRMAL_THOLD 0x4
-#define H8_GET_ETHERNET_ADDR 0x8
-#define H8_SYNC_OP 0x10
-#define H8_SET_UPPR_THRMAL_THOLD 0x20
-#define H8_GET_INT_BATT_STAT 0x40
-#define H8_GET_CPU_SPD 0x80
-#define H8_MANAGE_UTHERM 0x100
-#define H8_MANAGE_LTHERM 0x200
-#define H8_HALT 0x400
-#define H8_CRASH 0x800
-#define H8_GET_EXT_STATUS 0x10000
-#define H8_MANAGE_QUIET 0x20000
-#define H8_MANAGE_SPEEDUP 0x40000
-#define H8_MANAGE_BATTERY 0x80000
-#define H8_SYSTEM_DELAY_TEST 0x100000
-#define H8_POWER_SWITCH_TEST 0x200000
-
-/* CPU speeds and clock divisor values */
-#define MHZ_14 5
-#define MHZ_28 4
-#define MHZ_57 3
-#define MHZ_115 2
-#define MHZ_230 0
-
-/*
- * H8 data
- */
-struct h8_data {
- u_int ser_num;
- u_char ether_add[6];
- u_short hw_ver;
- u_short mic_ver;
- u_short max_tmp;
- u_short min_tmp;
- u_short cur_tmp;
- u_int sys_var;
- u_int pow_on;
- u_int pow_on_secs;
- u_char reset_status;
- u_char pwr_dn_status;
- u_short event_status;
- u_short rom_cksm;
- u_short ext_status;
- u_short u_cfg;
- u_char ibatt_volt;
- u_char dc_volt;
- u_char ptr_horiz;
- u_char ptr_vert;
- u_char eeprom_status;
- u_char error_status;
- u_char new_busy_speed;
- u_char cfg_interface;
- u_short int_batt_status;
- u_short ext_batt_status;
- u_char pow_up_status;
- u_char event_status_mask;
-};
-
-
-/*
- * H8 command buffers
- */
-typedef struct h8_cmd_q {
- struct list_head link; /* double linked list */
- int ncmd; /* number of bytes in command */
- int nrsp; /* number of bytes in response */
- int cnt; /* number of bytes sent/received */
- int nacks; /* number of byte level acks */
- u_char cmdbuf[H8_MAX_CMD_SIZE]; /* buffer to store command */
- u_char rcvbuf[H8_MAX_CMD_SIZE]; /* buffer to store response */
-} h8_cmd_q_t;
-
-union intr_buf {
- u_char byte[2];
- u_int word;
-};
-
-#endif /* __H8_H_ */
+++ /dev/null
-
-all: ip2mkdev ip2trace ip2stat
-
-ip2mkdev: ip2mkdev.c
- cc -o ip2mkdev ip2mkdev.c
-
-ip2trace: ip2trace.c
- cc -o ip2trace ip2trace.c
-
-ip2stat: ip2stat.c
- cc -o ip2stat ip2stat.c
-
+++ /dev/null
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <linux/major.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include <stdio.h>
-
-#include "ip2.h"
-#include "i2ellis.h"
-
-char nm[256];
-i2eBordStr Board[2];
-
-static void ex_details(i2eBordStrPtr);
-
-int main (int argc, char *argv[])
-{
- int board, box, port;
- int fd;
- int dev;
- i2eBordStrPtr pB = Board;
-
- // Remove all IP2 devices
-
- for ( board = 0; board < 4; ++board )
- {
- sprintf ( nm, "/dev/ip2ipl%d", board );
- unlink ( nm );
- sprintf ( nm, "/dev/ip2stat%d", board );
- unlink ( nm );
- }
-
- for ( port = 0; port < 256; ++port )
- {
- sprintf ( nm, "/dev/ttyF%d", port );
- unlink ( nm );
- sprintf ( nm, "/dev/cuf%d", port );
- unlink ( nm );
- }
-
- // Now create management devices, and use the status device to determine how
- // port devices need to exist, and then create them.
-
- for ( board = 0; board < 4; ++board )
- {
- printf("Board %d: ", board );
-
- sprintf ( nm, "/dev/ip2ipl%d", board );
- mknod ( nm, S_IFCHR|0666, (IP2_IPL_MAJOR << 8) | board * 4 );
- sprintf ( nm, "/dev/ip2stat%d", board );
- mknod ( nm, S_IFCHR|0666, (IP2_IPL_MAJOR << 8) | board * 4 + 1 );
-
- fd = open ( nm, O_RDONLY );
- if ( !fd )
- {
- printf ( "Unable to open status device %s\n", nm );
- exit ( 1 );
- }
- if ( ioctl ( fd, 65, Board ) < 0 )
- {
- printf ( "not present\n" );
- close ( fd );
- unlink ( nm );
- sprintf ( nm, "/dev/ip2ipl%d", board );
- unlink ( nm );
- }
- else
- {
- switch( pB->i2ePom.e.porID & ~POR_ID_RESERVED )
- {
- case POR_ID_FIIEX: ex_details ( pB ); break;
- case POR_ID_II_4: printf ( "ISA-4" ); break;
- case POR_ID_II_8: printf ( "ISA-8 std" ); break;
- case POR_ID_II_8R: printf ( "ISA-8 RJ11" ); break;
-
- default:
- printf ( "Unknown board type, ID = %x", pB->i2ePom.e.porID );
- }
-
- for ( box = 0; box < ABS_MAX_BOXES; ++box )
- {
- for ( port = 0; port < ABS_BIGGEST_BOX; ++port )
- {
- if ( pB->i2eChannelMap[box] & ( 1 << port ) )
- {
- dev = port
- + box * ABS_BIGGEST_BOX
- + board * ABS_BIGGEST_BOX * ABS_MAX_BOXES;
-
- sprintf ( nm, "/dev/ttyF%d", dev );
- mknod ( nm, S_IFCHR|0666, (IP2_TTY_MAJOR << 8) | dev );
- sprintf ( nm, "/dev/cuf%d", dev );
- mknod ( nm, S_IFCHR|0666, (IP2_CALLOUT_MAJOR << 8) | dev );
-
- printf(".");
- }
- }
- }
- printf("\n");
- }
- }
-}
-
-static void ex_details ( i2eBordStrPtr pB )
-{
- int box;
- int i;
- int ports = 0;
- int boxes = 0;
-
- for( box = 0; box < ABS_MAX_BOXES; ++box )
- {
- if( pB->i2eChannelMap[box] != 0 ) ++boxes;
- for( i = 0; i < ABS_BIGGEST_BOX; ++i )
- {
- if( pB->i2eChannelMap[box] & 1<< i ) ++ports;
- }
- }
-
- printf("EX bx=%d pt=%d %d bit", boxes, ports, pB->i2eDataWidth16 ? 16 : 8 );
-}
-
-
+++ /dev/null
-/*******************************************************************************
-*
-* (c) 1998 by Computone Corporation
-*
-********************************************************************************
-*
-*
-* PACKAGE: Linux tty Device Driver for IntelliPort family of multiport
-* serial I/O controllers.
-*
-* DESCRIPTION: Status display utility
-*
-*******************************************************************************/
-
-#include <sys/time.h>
-#include <sys/types.h>
-#include <unistd.h>
-#include <stdio.h>
-#include <signal.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <ctype.h>
-#include <linux/timer.h>
-#include <linux/termios.h>
-
-#include "i2ellis.h"
-#include "i2lib.h"
-
-i2eBordStr Board[2];
-i2ChanStr Port[2];
-
-struct driver_stats
-{
- ULONG ref_count;
- ULONG irq_counter;
- ULONG bh_counter;
-} Driver;
-
-char devname[20];
-
-int main (int argc, char *argv[])
-{
- int fd;
- int dev, i;
- i2eBordStrPtr pB = Board;
- i2ChanStrPtr pCh = Port;
-
- if ( argc != 2 )
- {
- printf ( "Usage: %s <port>\n", argv[0] );
- exit(1);
- }
- i = sscanf ( argv[1], "/dev/ttyF%d", &dev );
-
- if ( i != 1 ) exit(1);
-
- //printf("%s: board %d, port %d\n", argv[1], dev / 64, dev % 64 );
-
- sprintf ( devname, "/dev/ip2stat%d", dev / 64 );
- if( 0 > ( fd = open ( devname, O_RDONLY ) ) ) {
- // Conventional name failed - try devfs name
- sprintf ( devname, "/dev/ip2/stat%d", dev / 64 );
- if( 0 > ( fd = open ( devname, O_RDONLY ) ) ) {
- // Where is our board???
- printf( "Unable to open board %d to retrieve stats\n",
- dev / 64 );
- exit( 255 );
- }
- }
-
- ioctl ( fd, 64, &Driver );
- ioctl ( fd, 65, Board );
- ioctl ( fd, dev % 64, Port );
-
- printf ( "Driver statistics:-\n" );
- printf ( " Reference Count: %d\n", Driver.ref_count );
- printf ( " Interrupts to date: %ld\n", Driver.irq_counter );
- printf ( " Bottom half to date: %ld\n", Driver.bh_counter );
-
- printf ( "Board statistics(%d):-\n",dev/64 );
- printf ( "FIFO: remains = %d%s\n", pB->i2eFifoRemains,
- pB->i2eWaitingForEmptyFifo ? ", busy" : "" );
- printf ( "Mail: out mail = %02x\n", pB->i2eOutMailWaiting );
- printf ( " Input interrupts : %d\n", pB->i2eFifoInInts );
- printf ( " Output interrupts: %d\n", pB->i2eFifoOutInts );
- printf ( " Flow queued : %ld\n", pB->debugFlowQueued );
- printf ( " Bypass queued : %ld\n", pB->debugBypassQueued );
- printf ( " Inline queued : %ld\n", pB->debugInlineQueued );
- printf ( " Data queued : %ld\n", pB->debugDataQueued );
- printf ( " Flow packets : %ld\n", pB->debugFlowCount );
- printf ( " Bypass packets : %ld\n", pB->debugBypassCount );
- printf ( " Inline packets : %ld\n", pB->debugInlineCount );
- printf ( " Mail status : %x\n", pB->i2eStatus );
- printf ( " Output mail : %x\n", pB->i2eOutMailWaiting );
- printf ( " Fatal flag : %d\n", pB->i2eFatal );
-
- printf ( "Channel statistics(%s:%d):-\n",argv[1],dev%64 );
- printf ( "ibuf: stuff = %d strip = %d\n", pCh->Ibuf_stuff, pCh->Ibuf_strip );
- printf ( "obuf: stuff = %d strip = %d\n", pCh->Obuf_stuff, pCh->Obuf_strip );
- printf ( "pbuf: stuff = %d\n", pCh->Pbuf_stuff );
- printf ( "cbuf: stuff = %d strip = %d\n", pCh->Cbuf_stuff, pCh->Cbuf_strip );
- printf ( "infl: count = %d room = %d\n", pCh->infl.asof, pCh->infl.room );
- printf ( "outfl: count = %d room = %d\n", pCh->outfl.asof, pCh->outfl.room );
- printf ( "throttled = %d ",pCh->throttled);
- printf ( "bookmarks = %d ",pCh->bookMarks);
- printf ( "flush_flags = %x\n",pCh->flush_flags);
- printf ( "needs: ");
- if (pCh->channelNeeds & NEED_FLOW) printf("FLOW ");
- if (pCh->channelNeeds & NEED_INLINE) printf("INLINE ");
- if (pCh->channelNeeds & NEED_BYPASS) printf("BYPASS ");
- if (pCh->channelNeeds & NEED_CREDIT) printf("CREDIT ");
- printf ( "\n");
- printf ( "dss: in = %x, out = %x\n",pCh->dataSetIn,pCh->dataSetOut);
-
-}
+++ /dev/null
-/*******************************************************************************
-*
-* (c) 1998 by Computone Corporation
-*
-********************************************************************************
-*
-*
-* PACKAGE: Linux tty Device Driver for IntelliPort family of multiport
-* serial I/O controllers.
-*
-* DESCRIPTION: Interpretive trace dump utility
-*
-*******************************************************************************/
-
-#include <sys/time.h>
-#include <sys/types.h>
-#include <unistd.h>
-#include <stdio.h>
-#include <signal.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <ctype.h>
-#include "ip2trace.h"
-
-unsigned long namebuf[100];
-
-struct {
- int wrap,
- size,
- o_strip,
- o_stuff,
- strip,
- stuff;
- unsigned long buf[1000];
-} tbuf;
-
-struct sigaction act;
-
-typedef enum { kChar, kInt, kAddr, kHex } eFormat;
-
-int active = 1;
-void quit() { active = 0; }
-
-int main (int argc, char *argv[])
-{
- int fd = open ( "/dev/ip2trace", O_RDONLY );
- int cnt, i;
- unsigned long ts, td;
- struct timeval timeout;
- union ip2breadcrumb bc;
- eFormat fmt = kHex;
-
- if ( fd < 0 )
- {
- printf ( "Can't open device /dev/ip2trace\n" );
- exit ( 1 );
- }
-
- act.sa_handler = quit;
- /*act.sa_mask = 0;*/
- sigemptyset(&act.sa_mask);
- act.sa_flags = 0;
- act.sa_restorer = NULL;
-
- sigaction ( SIGTERM, &act, NULL );
-
- ioctl ( fd, 1, namebuf );
-
- printf ( "iiSendPendingMail %p\n", namebuf[0] );
- printf ( "i2InitChannels %p\n", namebuf[1] );
- printf ( "i2QueueNeeds %p\n", namebuf[2] );
- printf ( "i2QueueCommands %p\n", namebuf[3] );
- printf ( "i2GetStatus %p\n", namebuf[4] );
- printf ( "i2Input %p\n", namebuf[5] );
- printf ( "i2InputFlush %p\n", namebuf[6] );
- printf ( "i2Output %p\n", namebuf[7] );
- printf ( "i2FlushOutput %p\n", namebuf[8] );
- printf ( "i2DrainWakeup %p\n", namebuf[9] );
- printf ( "i2DrainOutput %p\n", namebuf[10] );
- printf ( "i2OutputFree %p\n", namebuf[11] );
- printf ( "i2StripFifo %p\n", namebuf[12] );
- printf ( "i2StuffFifoBypass %p\n", namebuf[13] );
- printf ( "i2StuffFifoFlow %p\n", namebuf[14] );
- printf ( "i2StuffFifoInline %p\n", namebuf[15] );
- printf ( "i2ServiceBoard %p\n", namebuf[16] );
- printf ( "serviceOutgoingFifo %p\n", namebuf[17] );
- printf ( "ip2_init %p\n", namebuf[18] );
- printf ( "ip2_init_board %p\n", namebuf[19] );
- printf ( "find_eisa_board %p\n", namebuf[20] );
- printf ( "set_irq %p\n", namebuf[21] );
- printf ( "ex_details %p\n", namebuf[22] );
- printf ( "ip2_interrupt %p\n", namebuf[23] );
- printf ( "ip2_poll %p\n", namebuf[24] );
- printf ( "service_all_boards %p\n", namebuf[25] );
- printf ( "do_input %p\n", namebuf[27] );
- printf ( "do_status %p\n", namebuf[26] );
- printf ( "open_sanity_check %p\n", namebuf[27] );
- printf ( "open_block_til_ready %p\n", namebuf[28] );
- printf ( "ip2_open %p\n", namebuf[29] );
- printf ( "ip2_close %p\n", namebuf[30] );
- printf ( "ip2_hangup %p\n", namebuf[31] );
- printf ( "ip2_write %p\n", namebuf[32] );
- printf ( "ip2_putchar %p\n", namebuf[33] );
- printf ( "ip2_flush_chars %p\n", namebuf[34] );
- printf ( "ip2_write_room %p\n", namebuf[35] );
- printf ( "ip2_chars_in_buf %p\n", namebuf[36] );
- printf ( "ip2_flush_buffer %p\n", namebuf[37] );
- //printf ( "ip2_wait_until_sent %p\n", namebuf[38] );
- printf ( "ip2_throttle %p\n", namebuf[39] );
- printf ( "ip2_unthrottle %p\n", namebuf[40] );
- printf ( "ip2_ioctl %p\n", namebuf[41] );
- printf ( "get_modem_info %p\n", namebuf[42] );
- printf ( "set_modem_info %p\n", namebuf[43] );
- printf ( "get_serial_info %p\n", namebuf[44] );
- printf ( "set_serial_info %p\n", namebuf[45] );
- printf ( "ip2_set_termios %p\n", namebuf[46] );
- printf ( "ip2_set_line_discipline %p\n", namebuf[47] );
- printf ( "set_line_characteristics %p\n", namebuf[48] );
-
- printf("\n-------------------------\n");
- printf("Start of trace\n");
-
- while ( active ) {
- cnt = read ( fd, &tbuf, sizeof tbuf );
-
- if ( cnt ) {
- if ( tbuf.wrap ) {
- printf ( "\nTrace buffer: wrap=%d, strip=%d, stuff=%d\n",
- tbuf.wrap, tbuf.strip, tbuf.stuff );
- }
- for ( i = 0, bc.value = 0; i < cnt; ++i ) {
- if ( !bc.hdr.codes ) {
- td = tbuf.buf[i] - ts;
- ts = tbuf.buf[i++];
- bc.value = tbuf.buf[i];
-
- printf ( "\n(%d) Port %3d ", ts, bc.hdr.port );
-
- fmt = kHex;
-
- switch ( bc.hdr.cat )
- {
- case ITRC_INIT:
- printf ( "Init %d: ", bc.hdr.label );
- break;
-
- case ITRC_OPEN:
- printf ( "Open %d: ", bc.hdr.label );
- break;
-
- case ITRC_CLOSE:
- printf ( "Close %d: ", bc.hdr.label );
- break;
-
- case ITRC_DRAIN:
- printf ( "Drain %d: ", bc.hdr.label );
- fmt = kInt;
- break;
-
- case ITRC_IOCTL:
- printf ( "Ioctl %d: ", bc.hdr.label );
- break;
-
- case ITRC_FLUSH:
- printf ( "Flush %d: ", bc.hdr.label );
- break;
-
- case ITRC_STATUS:
- printf ( "GetS %d: ", bc.hdr.label );
- break;
-
- case ITRC_HANGUP:
- printf ( "Hangup %d: ", bc.hdr.label );
- break;
-
- case ITRC_INTR:
- printf ( "*Intr %d: ", bc.hdr.label );
- break;
-
- case ITRC_SFLOW:
- printf ( "SFlow %d: ", bc.hdr.label );
- fmt = kInt;
- break;
-
- case ITRC_SBCMD:
- printf ( "Bypass CMD %d: ", bc.hdr.label );
- fmt = kInt;
- break;
-
- case ITRC_SICMD:
- printf ( "Inline CMD %d: ", bc.hdr.label );
- fmt = kInt;
- break;
-
- case ITRC_MODEM:
- printf ( "Modem %d: ", bc.hdr.label );
- break;
-
- case ITRC_INPUT:
- printf ( "Input %d: ", bc.hdr.label );
- break;
-
- case ITRC_OUTPUT:
- printf ( "Output %d: ", bc.hdr.label );
- fmt = kInt;
- break;
-
- case ITRC_PUTC:
- printf ( "Put char %d: ", bc.hdr.label );
- fmt = kChar;
- break;
-
- case ITRC_QUEUE:
- printf ( "Queue CMD %d: ", bc.hdr.label );
- fmt = kInt;
- break;
-
- case ITRC_STFLW:
- printf ( "Stat Flow %d: ", bc.hdr.label );
- fmt = kInt;
- break;
-
- case ITRC_SFIFO:
- printf ( "SFifo %d: ", bc.hdr.label );
- break;
-
- case ITRC_VERIFY:
- printf ( "Verfy %d: ", bc.hdr.label );
- fmt = kHex;
- break;
-
- case ITRC_WRITE:
- printf ( "Write %d: ", bc.hdr.label );
- fmt = kChar;
- break;
-
- case ITRC_ERROR:
- printf ( "ERROR %d: ", bc.hdr.label );
- fmt = kInt;
- break;
-
- default:
- printf ( "%08x ", tbuf.buf[i] );
- break;
- }
- }
- else
- {
- --bc.hdr.codes;
- switch ( fmt )
- {
- case kChar:
- printf ( "%c (0x%02x) ",
- isprint ( tbuf.buf[i] ) ? tbuf.buf[i] : '.', tbuf.buf[i] );
- break;
- case kInt:
- printf ( "%d ", tbuf.buf[i] );
- break;
-
- case kAddr:
- case kHex:
- printf ( "0x%x ", tbuf.buf[i] );
- break;
- }
- }
- }
- }
- fflush ( stdout );
- timeout.tv_sec = 0;
- timeout.tv_usec = 250;
- select ( 0, NULL, NULL, NULL, &timeout );
-
- }
- printf("\n-------------------------\n");
- printf("End of trace\n");
-
- close ( fd );
-}
-
+++ /dev/null
-/*
- * linux/drivers/char/lp_old98.c
- *
- * printer port driver for ancient PC-9800s with no bidirectional port support
- *
- * Copyright (C) 1998,99 Kousuke Takai <tak@kmc.kyoto-u.ac.jp>,
- * Kyoto University Microcomputer Club
- *
- * This driver is based on and has compatibility with `lp.c',
- * generic PC printer port driver.
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/config.h>
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/major.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-#include <linux/ioport.h>
-#include <linux/fcntl.h>
-#include <linux/delay.h>
-#include <linux/console.h>
-#include <linux/fs.h>
-
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#include <linux/lp.h>
-
-/*
- * I/O port numbers
- */
-#define LP_PORT_DATA 0x40
-#define LP_PORT_STATUS (LP_PORT_DATA + 2)
-#define LP_PORT_STROBE (LP_PORT_DATA + 4)
-#define LP_PORT_CONTROL (LP_PORT_DATA + 6)
-
-#define LP_PORT_H98MODE 0x0448
-#define LP_PORT_EXTMODE 0x0149
-
-/*
- * bit mask for I/O
- */
-#define LP_MASK_nBUSY (1 << 2)
-#define LP_MASK_nSTROBE (1 << 7)
-
-#define LP_CONTROL_ASSERT_STROBE (0x0e)
-#define LP_CONTROL_NEGATE_STROBE (0x0f)
-
-/*
- * Acceptable maximum value for non-privileged user for LPCHARS ioctl.
- */
-#define LP_CHARS_NOPRIV_MAX 65535
-
-#define DC1 '\x11'
-#define DC3 '\x13'
-
-/* PC-9800s have at least and at most one old-style printer port. */
-static struct lp_struct lp = {
- .flags = LP_EXIST | LP_ABORTOPEN,
- .chars = LP_INIT_CHAR,
- .time = LP_INIT_TIME,
- .wait = LP_INIT_WAIT,
-};
-
-static int dc1_check;
-static spinlock_t lp_old98_lock = SPIN_LOCK_UNLOCKED;
-
-
-#undef LP_OLD98_DEBUG
-
-#ifdef CONFIG_PC9800_OLDLP_CONSOLE
-static struct console lp_old98_console; /* defined later */
-static short saved_console_flags;
-#endif
-
-static DECLARE_WAIT_QUEUE_HEAD (lp_old98_waitq);
-
-static void lp_old98_timer_function(unsigned long data)
-{
- if (inb(LP_PORT_STATUS) & LP_MASK_nBUSY)
- wake_up_interruptible(&lp_old98_waitq);
- else {
- struct timer_list *t = (struct timer_list *) data;
-
- t->expires = jiffies + 1;
- add_timer(t);
- }
-}
-
-static inline int lp_old98_wait_ready(void)
-{
- struct timer_list timer;
-
- init_timer(&timer);
- timer.function = lp_old98_timer_function;
- timer.expires = jiffies + 1;
- timer.data = (unsigned long)&timer;
- add_timer(&timer);
- interruptible_sleep_on(&lp_old98_waitq);
- del_timer(&timer);
- return signal_pending(current);
-}
-
-static inline int lp_old98_char(char lpchar)
-{
- unsigned long count = 0;
-#ifdef LP_STATS
- int tmp;
-#endif
-
- while (!(inb(LP_PORT_STATUS) & LP_MASK_nBUSY)) {
- count++;
- if (count >= lp.chars)
- return 0;
- }
-
- outb(lpchar, LP_PORT_DATA);
-
-#ifdef LP_STATS
- /*
- * Update lp statsistics here (and between next two outb()'s).
- * Time to compute it is part of storobe delay.
- */
- if (count > lp.stats.maxwait) {
-#ifdef LP_OLD98_DEBUG
- printk(KERN_DEBUG "lp_old98: success after %d counts.\n",
- count);
-#endif
- lp.stats.maxwait = count;
- }
- count *= 256;
- tmp = count - lp.stats.meanwait;
- if (tmp < 0)
- tmp = -tmp;
-#endif
- ndelay(lp.wait);
-
- /* negate PSTB# (activate strobe) */
- outb(LP_CONTROL_ASSERT_STROBE, LP_PORT_CONTROL);
-
-#ifdef LP_STATS
- lp.stats.meanwait = (255 * lp.stats.meanwait + count + 128) / 256;
- lp.stats.mdev = (127 * lp.stats.mdev + tmp + 64) / 128;
- lp.stats.chars ++;
-#endif
-
- ndelay(lp.wait);
-
- /* assert PSTB# (deactivate strobe) */
- outb(LP_CONTROL_NEGATE_STROBE, LP_PORT_CONTROL);
-
- return 1;
-}
-
-static ssize_t lp_old98_write(struct file * file,
- const char * buf, size_t count,
- loff_t *dummy)
-{
- unsigned long total_bytes_written = 0;
-
- if (!access_ok(VERIFY_READ, buf, count))
- return -EFAULT;
-
-#ifdef LP_STATS
- if (jiffies - lp.lastcall > lp.time)
- lp.runchars = 0;
- lp.lastcall = jiffies;
-#endif
-
- do {
- unsigned long bytes_written = 0;
- unsigned long copy_size
- = (count < LP_BUFFER_SIZE ? count : LP_BUFFER_SIZE);
-
- if (__copy_from_user(lp.lp_buffer, buf, copy_size))
- return -EFAULT;
-
- while (bytes_written < copy_size) {
- if (lp_old98_char(lp.lp_buffer[bytes_written]))
- bytes_written ++;
- else {
-#ifdef LP_STATS
- int rc = lp.runchars + bytes_written;
-
- if (rc > lp.stats.maxrun)
- lp.stats.maxrun = rc;
-
- lp.stats.sleeps ++;
-#endif
-#ifdef LP_OLD98_DEBUG
- printk(KERN_DEBUG
- "lp_old98: sleeping at %d characters"
- " for %d jiffies\n",
- lp.runchars, lp.time);
- lp.runchars = 0;
-#endif
- if (lp_old98_wait_ready())
- return ((total_bytes_written
- + bytes_written)
- ? : -EINTR);
- }
- }
- total_bytes_written += bytes_written;
- buf += bytes_written;
-#ifdef LP_STATS
- lp.runchars += bytes_written;
-#endif
- count -= bytes_written;
- } while (count > 0);
-
- return total_bytes_written;
-}
-
-static int lp_old98_open(struct inode * inode, struct file * file)
-{
- if (iminor(inode) != 0)
- return -ENXIO;
-
- if (lp.flags & LP_BUSY)
- return -EBUSY;
-
- if (dc1_check && (lp.flags & LP_ABORTOPEN)
- && !(file->f_flags & O_NONBLOCK)) {
- /*
- * Check whether printer is on-line.
- * PC-9800's old style port have only BUSY# as status input,
- * so that it is impossible to distinguish that the printer is
- * ready and that the printer is off-line or not connected
- * (in both case BUSY# is in the same state). So:
- *
- * (1) output DC1 (0x11) to printer port and do strobe.
- * (2) watch BUSY# line for a while. If BUSY# is pulled
- * down, the printer will be ready. Otherwise,
- * it will be off-line (or not connected, or power-off,
- * ...).
- *
- * The source of this procedure:
- * Terumasa KODAKA, Kazufumi SHIMIZU, Yu HAYAMI:
- * `PC-9801 Super Technique', Ascii, 1992.
- */
- int count;
- unsigned long flags;
-
- /* interrupts while check is fairly bad */
- spin_lock_irqsave(&lp_old98_lock, flags);
-
- if (!lp_old98_char(DC1)) {
- spin_unlock_irqrestore(&lp_old98_lock, flags);
- return -EBUSY;
- }
- count = (unsigned int)dc1_check > 10000 ? 10000 : dc1_check;
- while (inb(LP_PORT_STATUS) & LP_MASK_nBUSY) {
- if (--count == 0) {
- spin_unlock_irqrestore(&lp_old98_lock, flags);
- return -ENODEV;
- }
- }
- spin_unlock_irqrestore(&lp_old98_lock, flags);
- }
-
- if ((lp.lp_buffer = kmalloc(LP_BUFFER_SIZE, GFP_KERNEL)) == NULL)
- return -ENOMEM;
-
- lp.flags |= LP_BUSY;
-
-#ifdef CONFIG_PC9800_OLDLP_CONSOLE
- saved_console_flags = lp_old98_console.flags;
- lp_old98_console.flags &= ~CON_ENABLED;
-#endif
- return 0;
-}
-
-static int lp_old98_release(struct inode * inode, struct file * file)
-{
- kfree(lp.lp_buffer);
- lp.lp_buffer = NULL;
- lp.flags &= ~LP_BUSY;
-#ifdef CONFIG_PC9800_OLDLP_CONSOLE
- lp_old98_console.flags = saved_console_flags;
-#endif
- return 0;
-}
-
-static int lp_old98_init_device(void)
-{
- unsigned char data;
-
- if ((data = inb(LP_PORT_EXTMODE)) != 0xFF && (data & 0x10)) {
- printk(KERN_INFO
- "lp_old98: shutting down extended parallel port mode...\n");
- outb(data & ~0x10, LP_PORT_EXTMODE);
- }
-#ifdef PC98_HW_H98
- if ((pc98_hw_flags & PC98_HW_H98)
- && ((data = inb(LP_PORT_H98MODE)) & 0x01)) {
- printk(KERN_INFO
- "lp_old98: shutting down H98 full centronics mode...\n");
- outb(data & ~0x01, LP_PORT_H98MODE);
- }
-#endif
- return 0;
-}
-
-static int lp_old98_ioctl(struct inode *inode, struct file *file,
- unsigned int command, unsigned long arg)
-{
- int retval = 0;
-
- switch (command) {
- case LPTIME:
- lp.time = arg * HZ/100;
- break;
- case LPCHAR:
- lp.chars = arg;
- break;
- case LPABORT:
- if (arg)
- lp.flags |= LP_ABORT;
- else
- lp.flags &= ~LP_ABORT;
- break;
- case LPABORTOPEN:
- if (arg)
- lp.flags |= LP_ABORTOPEN;
- else
- lp.flags &= ~LP_ABORTOPEN;
- break;
- case LPCAREFUL:
- /* do nothing */
- break;
- case LPWAIT:
- lp.wait = arg;
- break;
- case LPGETIRQ:
- retval = put_user(0, (int *)arg);
- break;
- case LPGETSTATUS:
- /*
- * convert PC-9800's status to IBM PC's one, so that tunelp(8)
- * works in the same way on this driver.
- */
- retval = put_user((inb(LP_PORT_STATUS) & LP_MASK_nBUSY)
- ? (LP_PBUSY | LP_PERRORP) : LP_PERRORP,
- (int *)arg);
- break;
- case LPRESET:
- retval = lp_old98_init_device();
- break;
-#ifdef LP_STATS
- case LPGETSTATS:
- if (copy_to_user((struct lp_stats *)arg, &lp.stats,
- sizeof(struct lp_stats)))
- retval = -EFAULT;
- else if (suser())
- memset(&lp.stats, 0, sizeof(struct lp_stats));
- break;
-#endif
- case LPGETFLAGS:
- retval = put_user(lp.flags, (int *)arg);
- break;
- case LPSETIRQ:
- default:
- retval = -EINVAL;
- }
- return retval;
-}
-
-static struct file_operations lp_old98_fops = {
- .owner = THIS_MODULE,
- .write = lp_old98_write,
- .ioctl = lp_old98_ioctl,
- .open = lp_old98_open,
- .release = lp_old98_release,
-};
-
-/*
- * Support for console on lp_old98
- */
-#ifdef CONFIG_PC9800_OLDLP_CONSOLE
-
-static inline void io_delay(void)
-{
- unsigned char dummy; /* actually not output */
-
- asm volatile ("out%B0 %0,%1" : "=a"(dummy) : "N"(0x5f));
-}
-
-static void lp_old98_console_write(struct console *console,
- const char *s, unsigned int count)
-{
- int i;
- static unsigned int timeout_run = 0;
-
- while (count) {
- /* wait approx 1.2 seconds */
- for (i = 2000000; !(inb(LP_PORT_STATUS) & LP_MASK_nBUSY);
- io_delay())
- if (!--i) {
- if (++timeout_run >= 10)
- /* disable forever... */
- console->flags &= ~CON_ENABLED;
- return;
- }
-
- timeout_run = 0;
-
- if (*s == '\n') {
- outb('\r', LP_PORT_DATA);
- io_delay();
- io_delay();
- outb(LP_CONTROL_ASSERT_STROBE, LP_PORT_CONTROL);
- io_delay();
- io_delay();
- outb(LP_CONTROL_NEGATE_STROBE, LP_PORT_CONTROL);
- io_delay();
- io_delay();
- for (i = 1000000;
- !(inb(LP_PORT_STATUS) & LP_MASK_nBUSY);
- io_delay())
- if (!--i)
- return;
- }
-
- outb(*s++, LP_PORT_DATA);
- io_delay();
- io_delay();
- outb(LP_CONTROL_ASSERT_STROBE, LP_PORT_CONTROL);
- io_delay();
- io_delay();
- outb(LP_CONTROL_NEGATE_STROBE, LP_PORT_CONTROL);
- io_delay();
- io_delay();
-
- --count;
- }
-}
-
-static struct console lp_old98_console = {
- .name = "lp_old98",
- .write = lp_old98_console_write,
- .flags = CON_PRINTBUFFER,
- .index = -1,
-};
-
-#endif /* console on lp_old98 */
-
-static int __init lp_old98_init(void)
-{
- char *errmsg = "I/O ports already occupied, giving up.";
-
-#ifdef PC98_HW_H98
- if (pc98_hw_flags & PC98_HW_H98)
- if (!request_region(LP_PORT_H98MODE, 1, "lp_old98")
- goto err1;
-#endif
- if (!request_region(LP_PORT_DATA, 1, "lp_old98"))
- goto err2;
- if (!request_region(LP_PORT_STATUS, 1, "lp_old98"))
- goto err3;
- if (!request_region(LP_PORT_STROBE, 1, "lp_old98"))
- goto err4;
- if (!request_region(LP_PORT_EXTMODE, 1, "lp_old98"))
- goto err5;
- if (!register_chrdev(LP_MAJOR, "lp", &lp_old98_fops)) {
-#ifdef CONFIG_PC9800_OLDLP_CONSOLE
- register_console(&lp_old98_console);
- printk(KERN_INFO "lp_old98: console ready\n");
-#endif
- /*
- * rest are not needed by this driver,
- * but for locking out other printer drivers...
- */
- lp_old98_init_device();
- return 0;
- } else
- errmsg = "unable to register device";
-
- release_region(LP_PORT_EXTMODE, 1);
-err5:
- release_region(LP_PORT_STROBE, 1);
-err4:
- release_region(LP_PORT_STATUS, 1);
-err3:
- release_region(LP_PORT_DATA, 1);
-err2:
-#ifdef PC98_HW_H98
- if (pc98_hw_flags & PC98_HW_H98)
- release_region(LP_PORT_H98MODE, 1);
-
-err1:
-#endif
- printk(KERN_ERR "lp_old98: %s\n", errmsg);
- return -EBUSY;
-}
-
-static void __exit lp_old98_exit(void)
-{
-#ifdef CONFIG_PC9800_OLDLP_CONSOLE
- unregister_console(&lp_old98_console);
-#endif
- unregister_chrdev(LP_MAJOR, "lp");
-
- release_region(LP_PORT_DATA, 1);
- release_region(LP_PORT_STATUS, 1);
- release_region(LP_PORT_STROBE, 1);
-#ifdef PC98_HW_H98
- if (pc98_hw_flags & PC98_HW_H98)
- release_region(LP_PORT_H98MODE, 1);
-#endif
- release_region(LP_PORT_EXTMODE, 1);
-}
-
-#ifndef MODULE
-static int __init lp_old98_setup(char *str)
-{
- int ints[4];
-
- str = get_options(str, ARRAY_SIZE(ints), ints);
- if (ints[0] > 0)
- dc1_check = ints[1];
- return 1;
-}
-__setup("lp_old98_dc1_check=", lp_old98_setup);
-#endif
-
-MODULE_PARM(dc1_check, "i");
-MODULE_AUTHOR("Kousuke Takai <tak@kmc.kyoto-u.ac.jp>");
-MODULE_DESCRIPTION("PC-9800 old printer port driver");
-MODULE_LICENSE("GPL");
-
-module_init(lp_old98_init);
-module_exit(lp_old98_exit);
+++ /dev/null
-/*
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
-#ifndef _cirrusprots_h
-#define _cirrusprots_h
-
-#ifdef RTA
-extern void cd1400_reset ( int uart) ;
-extern void cd1400_init ( int uart ) ;
-extern void ccr_wait ( int priority, int port) ;
-extern void cd1400_txstart( int port) ;
-extern void cd1400_rxstart ( int port) ;
-extern void command_acknowledge ( PHB *port_header ) ;
-extern int close_port ( ushort port, PHB *port_header, ushort preemptive, int pseudo) ;
-extern void command_preemptive ( PKT *packet) ;
-extern void rup_service ( void ) ;
-extern ushort GetModemLines(struct PHB *, register short *);
-extern void cd1400_intr (Process *cirrus_p, ushort *RtaType) ;
-extern void cd1400_mdint ( short port) ;
-extern void cd1400_rxint ( short port) ;
-extern void cd1400_rxexcept ( short port) ;
-extern void cd1400_txdata ( short port, PHB *port_header, PKT *packet) ;
-extern void cd1400_fast_clock(void);
-extern void cd1400_map_baud ( ushort host_rate, ushort *prescaler, ushort *divisor) ;
-extern void cd1400_modem ( ushort port, ushort way) ;
-extern void cd1400_txcommand ( short port, PHB *port_header, PKT *packet) ;
-extern void cd1400_txint ( int port) ;
-void Rprintf( char *RIOPrBuf, char *Str, ... );
-#if defined(DCIRRUS)
-void debug_packet(PKT *pkt, int option, char *string, int channel);
-#endif /* defined(DCIRRUS) */
-#endif
-
-#ifdef HOST
-extern void wflush (PHB *);
-extern void command_preemptive (PKT *);
-#endif
-
-#endif /* _cirrusprots_h */
+++ /dev/null
-/* SF16FMI FMRadio include file.
- * (c) 1998 Petr Vandrovec
- *
- * Not in include/linux/ because there's no need for anyone
- * to know about these details, I reckon.
- */
-
-#ifndef __RSF16FMI_H
-#define __RSF16FMI_H
-
-int radiosf16fmi_init(void);
-
-#endif /* __RSF16FMI_H */
+++ /dev/null
-/*
- * drivers/char/serial_tx3912.c
- *
- * Copyright (C) 1999 Harald Koerfgen
- * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
- * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Serial driver for TMPR3912/05 and PR31700 processors
- */
-#include <linux/init.h>
-#include <linux/config.h>
-#include <linux/tty.h>
-#include <linux/major.h>
-#include <linux/ptrace.h>
-#include <linux/console.h>
-#include <linux/fs.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/pm.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/delay.h>
-#include <asm/wbflush.h>
-#include <asm/tx3912.h>
-#include "serial_tx3912.h"
-
-/*
- * Forward declarations for serial routines
- */
-static void rs_disable_tx_interrupts (void * ptr);
-static void rs_enable_tx_interrupts (void * ptr);
-static void rs_disable_rx_interrupts (void * ptr);
-static void rs_enable_rx_interrupts (void * ptr);
-static int rs_get_CD (void * ptr);
-static void rs_shutdown_port (void * ptr);
-static int rs_set_real_termios (void *ptr);
-static int rs_chars_in_buffer (void * ptr);
-
-/*
- * Used by generic serial driver to access hardware
- */
-static struct real_driver rs_real_driver = {
- .disable_tx_interrupts = rs_disable_tx_interrupts,
- .enable_tx_interrupts = rs_enable_tx_interrupts,
- .disable_rx_interrupts = rs_disable_rx_interrupts,
- .enable_rx_interrupts = rs_enable_rx_interrupts,
- .get_CD = rs_get_CD,
- .shutdown_port = rs_shutdown_port,
- .set_real_termios = rs_set_real_termios,
- .chars_in_buffer = rs_chars_in_buffer,
-};
-
-/*
- * Structures and such for TTY sessions and usage counts
- */
-static struct tty_driver *rs_driver;
-struct rs_port *rs_ports;
-int rs_initialized = 0;
-
-/*
- * ----------------------------------------------------------------------
- *
- * Here starts the interrupt handling routines. All of the following
- * subroutines are declared as inline and are folded into
- * rs_interrupt(). They were separated out for readability's sake.
- *
- * Note: rs_interrupt() is a "fast" interrupt, which means that it
- * runs with interrupts turned off. People who may want to modify
- * rs_interrupt() should try to keep the interrupt handler as fast as
- * possible. After you are done making modifications, it is not a bad
- * idea to do:
- *
- * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
- *
- * and look at the resulting assemble code in serial.s.
- *
- * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
- * -----------------------------------------------------------------------
- */
-static inline void receive_char_pio(struct rs_port *port)
-{
- struct tty_struct *tty = port->gs.tty;
- unsigned char ch;
- int counter = 2048;
-
- /* While there are characters, get them ... */
- while (counter>0) {
- if (!(inl(port->base + TX3912_UART_CTRL1) & UART_RX_HOLD_FULL))
- break;
- ch = inb(port->base + TX3912_UART_DATA);
- if (tty->flip.count < TTY_FLIPBUF_SIZE) {
- *tty->flip.char_buf_ptr++ = ch;
- *tty->flip.flag_buf_ptr++ = 0;
- tty->flip.count++;
- }
- udelay(1); /* Allow things to happen - it take a while */
- counter--;
- }
- if (!counter)
- printk( "Ugh, looped in receive_char_pio!\n" );
-
- tty_flip_buffer_push(tty);
-
-#if 0
- /* Now handle error conditions */
- if (*status & (INTTYPE(UART_RXOVERRUN_INT) |
- INTTYPE(UART_FRAMEERR_INT) |
- INTTYPE(UART_PARITYERR_INT) |
- INTTYPE(UART_BREAK_INT))) {
-
- /*
- * Now check to see if character should be
- * ignored, and mask off conditions which
- * should be ignored.
- */
- if (*status & port->ignore_status_mask) {
- goto ignore_char;
- }
- *status &= port->read_status_mask;
-
- if (*status & INTTYPE(UART_BREAK_INT)) {
- rs_dprintk(TX3912_UART_DEBUG_INTERRUPTS, "handling break....");
- *tty->flip.flag_buf_ptr = TTY_BREAK;
- }
- else if (*status & INTTYPE(UART_PARITYERR_INT)) {
- *tty->flip.flag_buf_ptr = TTY_PARITY;
- }
- else if (*status & INTTYPE(UART_FRAMEERR_INT)) {
- *tty->flip.flag_buf_ptr = TTY_FRAME;
- }
- if (*status & INTTYPE(UART_RXOVERRUN_INT)) {
- /*
- * Overrun is special, since it's
- * reported immediately, and doesn't
- * affect the current character
- */
- if (tty->flip.count < TTY_FLIPBUF_SIZE) {
- tty->flip.count++;
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- *tty->flip.flag_buf_ptr = TTY_OVERRUN;
- }
- }
- }
-
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- tty->flip.count++;
-
-ignore_char:
- tty_flip_buffer_push(tty);
-#endif
-}
-
-static inline void transmit_char_pio(struct rs_port *port)
-{
- /* While I'm able to transmit ... */
- for (;;) {
- if (!(inl(port->base + TX3912_UART_CTRL1) & UART_TX_EMPTY))
- break;
- else if (port->x_char) {
- outb(port->x_char, port->base + TX3912_UART_DATA);
- port->icount.tx++;
- port->x_char = 0;
- }
- else if (port->gs.xmit_cnt <= 0 || port->gs.tty->stopped ||
- port->gs.tty->hw_stopped) {
- break;
- }
- else {
- outb(port->gs.xmit_buf[port->gs.xmit_tail++],
- port->base + TX3912_UART_DATA);
- port->icount.tx++;
- port->gs.xmit_tail &= SERIAL_XMIT_SIZE-1;
- if (--port->gs.xmit_cnt <= 0) {
- break;
- }
- }
- udelay(10); /* Allow things to happen - it take a while */
- }
-
- if (port->gs.xmit_cnt <= 0 || port->gs.tty->stopped ||
- port->gs.tty->hw_stopped) {
- rs_disable_tx_interrupts(port);
- }
-
- if (port->gs.xmit_cnt <= port->gs.wakeup_chars) {
- tty_wakeup(port->gs.tty);
- rs_dprintk (TX3912_UART_DEBUG_TRANSMIT, "Waking up.... ldisc (%d)....\n",
- port->gs.wakeup_chars);
- }
-}
-
-
-
-static inline void check_modem_status(struct rs_port *port)
-{
- /* We don't have a carrier detect line - but just respond
- like we had one anyways so that open() becomes unblocked */
- wake_up_interruptible(&port->gs.open_wait);
-}
-
-int count = 0;
-
-/*
- * This is the serial driver's interrupt routine (inlined, because
- * there are two different versions of this, one for each serial port,
- * differing only by the bits used in interrupt status 2 register)
- */
-
-static inline void rs_rx_interrupt(int irq, void *dev_id,
- struct pt_regs * regs, int intshift)
-{
- struct rs_port * port;
- unsigned long int2status;
- unsigned long flags;
- unsigned long ints;
-
- save_and_cli(flags);
-
- port = (struct rs_port *)dev_id;
- rs_dprintk (TX3912_UART_DEBUG_INTERRUPTS, "rs_interrupt (port %p, shift %d)...", port, intshift);
-
- /* Get the interrrupts we have enabled */
- int2status = IntStatus2 & IntEnable2;
-
- /* Get interrupts in easy to use form */
- ints = int2status >> intshift;
-
- /* Clear any interrupts we might be about to handle */
- IntClear2 = int2status & (
- (INTTYPE(UART_RXOVERRUN_INT) |
- INTTYPE(UART_FRAMEERR_INT) |
- INTTYPE(UART_BREAK_INT) |
- INTTYPE(UART_PARITYERR_INT) |
- INTTYPE(UART_RX_INT)) << intshift);
-
- if (!port || !port->gs.tty) {
- restore_flags(flags);
- return;
- }
-
- /* RX Receiver Holding Register Overrun */
- if (ints & INTTYPE(UART_RXOVERRUN_INT)) {
- rs_dprintk (TX3912_UART_DEBUG_INTERRUPTS, "overrun");
- port->icount.overrun++;
- }
-
- /* RX Frame Error */
- if (ints & INTTYPE(UART_FRAMEERR_INT)) {
- rs_dprintk (TX3912_UART_DEBUG_INTERRUPTS, "frame error");
- port->icount.frame++;
- }
-
- /* Break signal received */
- if (ints & INTTYPE(UART_BREAK_INT)) {
- rs_dprintk (TX3912_UART_DEBUG_INTERRUPTS, "break");
- port->icount.brk++;
- }
-
- /* RX Parity Error */
- if (ints & INTTYPE(UART_PARITYERR_INT)) {
- rs_dprintk (TX3912_UART_DEBUG_INTERRUPTS, "parity error");
- port->icount.parity++;
- }
-
- /* Receive byte (non-DMA) */
- if (ints & INTTYPE(UART_RX_INT)) {
- receive_char_pio(port);
- }
-
- restore_flags(flags);
-
- rs_dprintk (TX3912_UART_DEBUG_INTERRUPTS, "end.\n");
-}
-
-static inline void rs_tx_interrupt(int irq, void *dev_id,
- struct pt_regs * regs, int intshift)
-{
- struct rs_port * port;
- unsigned long int2status;
- unsigned long flags;
- unsigned long ints;
-
- save_and_cli(flags);
-
- port = (struct rs_port *)dev_id;
- rs_dprintk (TX3912_UART_DEBUG_INTERRUPTS, "rs_interrupt (port %p, shift %d)...", port, intshift);
-
- /* Get the interrrupts we have enabled */
- int2status = IntStatus2 & IntEnable2;
-
- if (!port || !port->gs.tty) {
- restore_flags(flags);
- return;
- }
-
- /* Get interrupts in easy to use form */
- ints = int2status >> intshift;
-
- /* Clear any interrupts we might be about to handle */
- IntClear2 = int2status & (
- (INTTYPE(UART_TX_INT) |
- INTTYPE(UART_EMPTY_INT) |
- INTTYPE(UART_TXOVERRUN_INT)) << intshift);
-
- /* TX holding register empty, so transmit byte (non-DMA) */
- if (ints & (INTTYPE(UART_TX_INT) | INTTYPE(UART_EMPTY_INT))) {
- transmit_char_pio(port);
- }
-
- /* TX Transmit Holding Register Overrun (shouldn't happen) */
- if (ints & INTTYPE(UART_TXOVERRUN_INT)) {
- printk ( "rs: TX overrun\n");
- }
-
- /*
- check_modem_status();
- */
-
- restore_flags(flags);
-
- rs_dprintk (TX3912_UART_DEBUG_INTERRUPTS, "end.\n");
-}
-
-static void rs_rx_interrupt_uarta(int irq, void *dev_id,
- struct pt_regs * regs)
-{
- rs_rx_interrupt(irq, dev_id, regs, UARTA_SHIFT);
-}
-
-static void rs_tx_interrupt_uarta(int irq, void *dev_id,
- struct pt_regs * regs)
-{
- rs_tx_interrupt(irq, dev_id, regs, UARTA_SHIFT);
-}
-
-/*
- ***********************************************************************
- * Here are the routines that actually *
- * interface with the generic_serial driver *
- ***********************************************************************
- */
-static void rs_disable_tx_interrupts (void * ptr)
-{
- struct rs_port *port = ptr;
- unsigned long flags;
-
- save_and_cli(flags);
- port->gs.flags &= ~GS_TX_INTEN;
-
- IntEnable2 &= ~((INTTYPE(UART_TX_INT) |
- INTTYPE(UART_EMPTY_INT) |
- INTTYPE(UART_TXOVERRUN_INT)) << port->intshift);
-
- IntClear2 = (INTTYPE(UART_TX_INT) |
- INTTYPE(UART_EMPTY_INT) |
- INTTYPE(UART_TXOVERRUN_INT)) << port->intshift;
-
- restore_flags(flags);
-}
-
-static void rs_enable_tx_interrupts (void * ptr)
-{
- struct rs_port *port = ptr;
- unsigned long flags;
-
- save_and_cli(flags);
-
- IntClear2 = (INTTYPE(UART_TX_INT) |
- INTTYPE(UART_EMPTY_INT) |
- INTTYPE(UART_TXOVERRUN_INT)) << port->intshift;
-
- IntEnable2 |= (INTTYPE(UART_TX_INT) |
- INTTYPE(UART_EMPTY_INT) |
- INTTYPE(UART_TXOVERRUN_INT)) << port->intshift;
-
- /* Send a char to start TX interrupts happening */
- transmit_char_pio(port);
-
- restore_flags(flags);
-}
-
-static void rs_disable_rx_interrupts (void * ptr)
-{
- struct rs_port *port = ptr;
- unsigned long flags;
-
- save_and_cli(flags);
-
- IntEnable2 &= ~((INTTYPE(UART_RX_INT) |
- INTTYPE(UART_RXOVERRUN_INT) |
- INTTYPE(UART_FRAMEERR_INT) |
- INTTYPE(UART_BREAK_INT) |
- INTTYPE(UART_PARITYERR_INT)) << port->intshift);
-
- IntClear2 = (INTTYPE(UART_RX_INT) |
- INTTYPE(UART_RXOVERRUN_INT) |
- INTTYPE(UART_FRAMEERR_INT) |
- INTTYPE(UART_BREAK_INT) |
- INTTYPE(UART_PARITYERR_INT)) << port->intshift;
-
- restore_flags(flags);
-}
-
-static void rs_enable_rx_interrupts (void * ptr)
-{
- struct rs_port *port = ptr;
- unsigned long flags;
-
- save_and_cli(flags);
-
- IntEnable2 |= (INTTYPE(UART_RX_INT) |
- INTTYPE(UART_RXOVERRUN_INT) |
- INTTYPE(UART_FRAMEERR_INT) |
- INTTYPE(UART_BREAK_INT) |
- INTTYPE(UART_PARITYERR_INT)) << port->intshift;
-
- /* Empty the input buffer - apparently this is *vital* */
- while (inl(port->base + TX3912_UART_CTRL1) & UART_RX_HOLD_FULL) {
- inb(port->base + TX3912_UART_DATA);
- }
-
- IntClear2 = (INTTYPE(UART_RX_INT) |
- INTTYPE(UART_RXOVERRUN_INT) |
- INTTYPE(UART_FRAMEERR_INT) |
- INTTYPE(UART_BREAK_INT) |
- INTTYPE(UART_PARITYERR_INT)) << port->intshift;
-
- restore_flags(flags);
-}
-
-
-static int rs_get_CD (void * ptr)
-{
- /* No Carried Detect in Hardware - just return true */
- func_exit();
- return (1);
-}
-
-static void rs_shutdown_port (void * ptr)
-{
- struct rs_port *port = ptr;
-
- func_enter();
-
- port->gs.flags &= ~GS_ACTIVE;
-
- func_exit();
-}
-
-static int rs_set_real_termios (void *ptr)
-{
- struct rs_port *port = ptr;
- int t;
-
- switch (port->gs.baud) {
- /* Save some typing work... */
-#define e(x) case x:t= TX3912_UART_CTRL2_B ## x ; break
- e(300);e(600);e(1200);e(2400);e(4800);e(9600);
- e(19200);e(38400);e(57600);e(76800);e(115200);e(230400);
- case 0 :t = -1;
- break;
- default:
- /* Can I return "invalid"? */
- t = TX3912_UART_CTRL2_B9600;
- printk (KERN_INFO "rs: unsupported baud rate: %d.\n", port->gs.baud);
- break;
- }
-#undef e
- if (t >= 0) {
- /* Jim: Set Hardware Baud rate - there is some good
- code in drivers/char/serial.c */
-
- /* Program hardware for parity, data bits, stop bits (note: these are hardcoded to 8N1 */
- UartA_Ctrl1 &= 0xf000000f;
- UartA_Ctrl1 &= ~(UART_DIS_TXD | SER_SEVEN_BIT | SER_EVEN_PARITY | SER_TWO_STOP);
-
-#define CFLAG port->gs.tty->termios->c_cflag
- if (C_PARENB(port->gs.tty)) {
- if (!C_PARODD(port->gs.tty))
- UartA_Ctrl1 |= SER_EVEN_PARITY;
- else
- UartA_Ctrl1 |= SER_ODD_PARITY;
- }
- if ((CFLAG & CSIZE)==CS6)
- printk(KERN_ERR "6 bits not supported\n");
- if ((CFLAG & CSIZE)==CS5)
- printk(KERN_ERR "5 bits not supported\n");
- if ((CFLAG & CSIZE)==CS7)
- UartA_Ctrl1 |= SER_SEVEN_BIT;
- if (C_CSTOPB(port->gs.tty))
- UartA_Ctrl1 |= SER_TWO_STOP;
-
- outl(t, port->base + TX3912_UART_CTRL2);
- outl(0, port->base + TX3912_UART_DMA_CTRL1);
- outl(0, port->base + TX3912_UART_DMA_CTRL2);
- UartA_Ctrl1 |= TX3912_UART_CTRL1_UARTON;
-
- /* wait until UARTA is stable */
- while (~UartA_Ctrl1 & TX3912_UART_CTRL1_UARTON);
- }
-
- func_exit ();
- return 0;
-}
-
-static int rs_chars_in_buffer (void * ptr)
-{
- struct rs_port *port = ptr;
- int scratch;
-
- scratch = inl(port->base + TX3912_UART_CTRL1);
-
- return ((scratch & UART_TX_EMPTY) ? 0 : 1);
-}
-
-/* ********************************************************************** *
- * Here are the routines that actually *
- * interface with the rest of the system *
- * ********************************************************************** */
-static int rs_open (struct tty_struct * tty, struct file * filp)
-{
- struct rs_port *port;
- int retval, line;
-
- func_enter();
-
- if (!rs_initialized) {
- return -EIO;
- }
-
- line = tty->index;
- rs_dprintk (TX3912_UART_DEBUG_OPEN, "%d: opening line %d. tty=%p ctty=%p)\n",
- (int) current->pid, line, tty, current->tty);
-
- if ((line < 0) || (line >= TX3912_UART_NPORTS))
- return -ENODEV;
-
- /* Pre-initialized already */
- port = & rs_ports[line];
-
- rs_dprintk (TX3912_UART_DEBUG_OPEN, "port = %p\n", port);
-
- tty->driver_data = port;
- port->gs.tty = tty;
- port->gs.count++;
-
- rs_dprintk (TX3912_UART_DEBUG_OPEN, "starting port\n");
-
- /*
- * Start up serial port
- */
- retval = gs_init_port(&port->gs);
- rs_dprintk (TX3912_UART_DEBUG_OPEN, "done gs_init\n");
- if (retval) {
- port->gs.count--;
- return retval;
- }
-
- port->gs.flags |= GS_ACTIVE;
-
- rs_dprintk (TX3912_UART_DEBUG_OPEN, "before inc_use_count (count=%d.\n",
- port->gs.count);
- rs_dprintk (TX3912_UART_DEBUG_OPEN, "after inc_use_count\n");
-
- /* Jim: Initialize port hardware here */
-
- /* Enable high-priority interrupts for UARTA */
- IntEnable6 |= INT6_UARTARXINT;
- rs_enable_rx_interrupts(&rs_ports[0]);
-
- retval = gs_block_til_ready(&port->gs, filp);
- rs_dprintk (TX3912_UART_DEBUG_OPEN, "Block til ready returned %d. Count=%d\n",
- retval, port->gs.count);
-
- if (retval) {
- port->gs.count--;
- return retval;
- }
- /* tty->low_latency = 1; */
-
- func_exit();
-
- /* Jim */
-/* cli(); */
-
- return 0;
-
-}
-
-
-static int rs_ioctl (struct tty_struct * tty, struct file * filp,
- unsigned int cmd, unsigned long arg)
-{
- int rc;
- struct rs_port *port = tty->driver_data;
- int ival;
-
- rc = 0;
- switch (cmd) {
- case TIOCGSOFTCAR:
- rc = put_user(((tty->termios->c_cflag & CLOCAL) ? 1 : 0),
- (unsigned int *) arg);
- break;
- case TIOCSSOFTCAR:
- if ((rc = get_user(ival, (unsigned int *) arg)) == 0) {
- tty->termios->c_cflag =
- (tty->termios->c_cflag & ~CLOCAL) |
- (ival ? CLOCAL : 0);
- }
- break;
- case TIOCGSERIAL:
- if ((rc = verify_area(VERIFY_WRITE, (void *) arg,
- sizeof(struct serial_struct))) == 0)
- rc = gs_getserial(&port->gs, (struct serial_struct *) arg);
- break;
- case TIOCSSERIAL:
- if ((rc = verify_area(VERIFY_READ, (void *) arg,
- sizeof(struct serial_struct))) == 0)
- rc = gs_setserial(&port->gs, (struct serial_struct *) arg);
- break;
- default:
- rc = -ENOIOCTLCMD;
- break;
- }
-
- /* func_exit(); */
- return rc;
-}
-
-
-/*
- * This function is used to send a high-priority XON/XOFF character to
- * the device
- */
-static void rs_send_xchar(struct tty_struct * tty, char ch)
-{
- struct rs_port *port = (struct rs_port *)tty->driver_data;
- func_enter ();
-
- port->x_char = ch;
- if (ch) {
- /* Make sure transmit interrupts are on */
- rs_enable_tx_interrupts(tty);
- }
-
- func_exit();
-}
-
-
-/*
- * ------------------------------------------------------------
- * rs_throttle()
- *
- * This routine is called by the upper-layer tty layer to signal that
- * incoming characters should be throttled.
- * ------------------------------------------------------------
- */
-static void rs_throttle(struct tty_struct * tty)
-{
-#ifdef TX3912_UART_DEBUG_THROTTLE
- char buf[64];
-
- printk("throttle %s: %d....\n", tty_name(tty, buf),
- tty->ldisc.chars_in_buffer(tty));
-#endif
-
- func_enter ();
-
- if (I_IXOFF(tty))
- rs_send_xchar(tty, STOP_CHAR(tty));
-
- func_exit ();
-}
-
-static void rs_unthrottle(struct tty_struct * tty)
-{
- struct rs_port *port = (struct rs_port *)tty->driver_data;
-#ifdef TX3912_UART_DEBUG_THROTTLE
- char buf[64];
-
- printk("unthrottle %s: %d....\n", tty_name(tty, buf),
- tty->ldisc.chars_in_buffer(tty));
-#endif
-
- func_enter();
-
- if (I_IXOFF(tty)) {
- if (port->x_char)
- port->x_char = 0;
- else
- rs_send_xchar(tty, START_CHAR(tty));
- }
-
- func_exit();
-}
-
-
-
-
-
-/* ********************************************************************** *
- * Here are the initialization routines. *
- * ********************************************************************** */
-
-void * ckmalloc (int size)
-{
- void *p;
-
- p = kmalloc(size, GFP_KERNEL);
- if (p)
- memset(p, 0, size);
- return p;
-}
-
-
-
-static int rs_init_portstructs(void)
-{
- struct rs_port *port;
- int i;
-
- /* Debugging */
- func_enter();
-
- rs_ports = ckmalloc(TX3912_UART_NPORTS * sizeof (struct rs_port));
- if (!rs_ports)
- return -ENOMEM;
-
- port = rs_ports;
- for (i=0; i < TX3912_UART_NPORTS;i++) {
- rs_dprintk (TX3912_UART_DEBUG_INIT, "initing port %d\n", i);
- port->gs.magic = SERIAL_MAGIC;
- port->gs.close_delay = HZ/2;
- port->gs.closing_wait = 30 * HZ;
- port->gs.rd = &rs_real_driver;
-#ifdef NEW_WRITE_LOCKING
- port->gs.port_write_sem = MUTEX;
-#endif
-#ifdef DECLARE_WAITQUEUE
- init_waitqueue_head(&port->gs.open_wait);
- init_waitqueue_head(&port->gs.close_wait);
-#endif
- port->base = (i == 0) ? TX3912_UARTA_BASE : TX3912_UARTB_BASE;
- port->intshift = (i == 0) ? UARTA_SHIFT : UARTB_SHIFT;
- rs_dprintk (TX3912_UART_DEBUG_INIT, "base 0x%08lx intshift %d\n",
- port->base, port->intshift);
- port++;
- }
-
- func_exit();
- return 0;
-}
-
-static struct tty_operations rs_ops = {
- .open = rs_open,
- .close = gs_close,
- .write = gs_write,
- .put_char = gs_put_char,
- .flush_chars = gs_flush_chars,
- .write_room = gs_write_room,
- .chars_in_buffer = gs_chars_in_buffer,
- .flush_buffer = gs_flush_buffer,
- .ioctl = rs_ioctl,
- .throttle = rs_throttle,
- .unthrottle = rs_unthrottle,
- .set_termios = gs_set_termios,
- .stop = gs_stop,
- .start = gs_start,
- .hangup = gs_hangup,
-};
-
-static int rs_init_drivers(void)
-{
- int error;
-
- func_enter();
-
- rs_driver = alloc_tty_driver(TX3912_UART_NPORTS);
- if (!rs_driver)
- return -ENOMEM;
- rs_driver->owner = THIS_MODULE;
- rs_driver->driver_name = "serial";
- rs_driver->name = "ttyS";
- rs_driver->major = TTY_MAJOR;
- rs_driver->minor_start = 64;
- rs_driver->type = TTY_DRIVER_TYPE_SERIAL;
- rs_driver->subtype = SERIAL_TYPE_NORMAL;
- rs_driver->init_termios = tty_std_termios;
- rs_driver->init_termios.c_cflag =
- B115200 | CS8 | CREAD | HUPCL | CLOCAL;
- tty_set_operations(rs_driver, &rs_ops);
- if ((error = tty_register_driver(rs_driver))) {
- printk(KERN_ERR "Couldn't register serial driver, error = %d\n",
- error);
- put_tty_driver(rs_driver);
- return 1;
- }
- return 0;
-}
-
-
-static void __init tx3912_rs_init(void)
-{
- int rc;
-
-
- func_enter();
- rs_dprintk (TX3912_UART_DEBUG_INIT, "Initing serial module... (rs_debug=%d)\n", rs_debug);
-
- rc = rs_init_portstructs ();
- rs_init_drivers ();
- if (request_irq(2, rs_tx_interrupt_uarta, SA_SHIRQ | SA_INTERRUPT,
- "serial", &rs_ports[0])) {
- printk(KERN_ERR "rs: Cannot allocate irq for UARTA.\n");
- rc = 0;
- }
- if (request_irq(3, rs_rx_interrupt_uarta, SA_SHIRQ | SA_INTERRUPT,
- "serial", &rs_ports[0])) {
- printk(KERN_ERR "rs: Cannot allocate irq for UARTA.\n");
- rc = 0;
- }
-
- IntEnable6 |= INT6_UARTARXINT;
- rs_enable_rx_interrupts(&rs_ports[0]);
-
-#ifndef CONFIG_SERIAL_TX3912_CONSOLE
-{
- unsigned int scratch = 0;
-
- /* Setup master clock for UART */
- scratch = inl(TX3912_CLK_CTRL_BASE);
- scratch &= ~TX3912_CLK_CTRL_SIBMCLKDIV_MASK;
- scratch |= ((0x2 << TX3912_CLK_CTRL_SIBMCLKDIV_SHIFT) &
- TX3912_CLK_CTRL_SIBMCLKDIV_MASK)
- | TX3912_CLK_CTRL_SIBMCLKDIR
- | TX3912_CLK_CTRL_ENSIBMCLK
- | TX3912_CLK_CTRL_CSERSEL;
- outl(scratch, TX3912_CLK_CTRL_BASE);
-
- /* Configure UARTA clock */
- scratch = inl(TX3912_CLK_CTRL_BASE);
- scratch |= ((0x3 << TX3912_CLK_CTRL_CSERDIV_SHIFT) &
- TX3912_CLK_CTRL_CSERDIV_MASK)
- | TX3912_CLK_CTRL_ENCSERCLK
- | TX3912_CLK_CTRL_ENUARTACLK;
- outl(scratch, TX3912_CLK_CTRL_BASE);
-
- /* Setup UARTA for 115200,8N1 */
- outl(0, TX3912_UARTA_BASE + TX3912_UART_CTRL1);
- outl(TX3912_UART_CTRL2_B115200, TX3912_UARTA_BASE + TX3912_UART_CTRL2);
- outl(0, TX3912_UARTA_BASE + TX3912_UART_DMA_CTRL1);
- outl(0, TX3912_UARTA_BASE + TX3912_UART_DMA_CTRL2);
-
- /* Enable UARTA */
- outl(TX3912_UART_CTRL1_ENUART, TX3912_UARTA_BASE + TX3912_UART_CTRL1);
- while (~inl(TX3912_UARTA_BASE + TX3912_UART_CTRL1) &
- TX3912_UART_CTRL1_UARTON);
-}
-#endif
-
- /* Note: I didn't do anything to enable the second UART */
- if (rc >= 0)
- rs_initialized++;
-
- func_exit();
-}
-module_init(tx3912_rs_init);
-
-/*
- * Begin serial console routines
- */
-#ifdef CONFIG_SERIAL_TX3912_CONSOLE
-
-void serial_outc(unsigned char c)
-{
- int i;
- unsigned long int2;
- #define BUSY_WAIT 10000
-
- /*
- * Turn UARTA interrupts off
- */
- int2 = IntEnable2;
- IntEnable2 &=
- ~(INT2_UARTATXINT | INT2_UARTATXOVERRUN | INT2_UARTAEMPTY);
-
- /*
- * The UART_TX_EMPTY bit in UartA_Ctrl1 seems
- * not to be very reliable :-(
- *
- * Wait for the Tx register to become empty
- */
- for (i = 0; !(IntStatus2 & INT2_UARTATXINT) && (i < BUSY_WAIT); i++);
-
- IntClear2 = INT2_UARTATXINT | INT2_UARTATXOVERRUN | INT2_UARTAEMPTY;
- UartA_Data = c;
- for (i = 0; !(IntStatus2 & INT2_UARTATXINT) && (i < BUSY_WAIT); i++);
- IntClear2 = INT2_UARTATXINT | INT2_UARTATXOVERRUN | INT2_UARTAEMPTY;
-
- IntEnable2 = int2;
-}
-
-static void serial_console_write(struct console *co, const char *s,
- unsigned count)
-{
- unsigned int i;
-
- for (i = 0; i < count; i++) {
- if (*s == '\n')
- serial_outc('\r');
- serial_outc(*s++);
- }
-}
-
-static struct tty_driver *serial_console_device(struct console *c, int *index)
-{
- *index = c->index;
- return rs_driver;
-}
-
-static __init int serial_console_setup(struct console *co, char *options)
-{
- unsigned int scratch = 0;
-
- /* Setup master clock for UART */
- scratch = inl(TX3912_CLK_CTRL_BASE);
- scratch &= ~TX3912_CLK_CTRL_SIBMCLKDIV_MASK;
- scratch |= ((0x2 << TX3912_CLK_CTRL_SIBMCLKDIV_SHIFT) &
- TX3912_CLK_CTRL_SIBMCLKDIV_MASK)
- | TX3912_CLK_CTRL_SIBMCLKDIR
- | TX3912_CLK_CTRL_ENSIBMCLK
- | TX3912_CLK_CTRL_CSERSEL;
- outl(scratch, TX3912_CLK_CTRL_BASE);
-
- /* Configure UARTA clock */
- scratch = inl(TX3912_CLK_CTRL_BASE);
- scratch |= ((0x3 << TX3912_CLK_CTRL_CSERDIV_SHIFT) &
- TX3912_CLK_CTRL_CSERDIV_MASK)
- | TX3912_CLK_CTRL_ENCSERCLK
- | TX3912_CLK_CTRL_ENUARTACLK;
- outl(scratch, TX3912_CLK_CTRL_BASE);
-
- /* Setup UARTA for 115200,8N1 */
- outl(0, TX3912_UARTA_BASE + TX3912_UART_CTRL1);
- outl(TX3912_UART_CTRL2_B115200, TX3912_UARTA_BASE + TX3912_UART_CTRL2);
- outl(0, TX3912_UARTA_BASE + TX3912_UART_DMA_CTRL1);
- outl(0, TX3912_UARTA_BASE + TX3912_UART_DMA_CTRL2);
-
- /* Enable UARTA */
- outl(TX3912_UART_CTRL1_ENUART, TX3912_UARTA_BASE + TX3912_UART_CTRL1);
- while (~inl(TX3912_UARTA_BASE + TX3912_UART_CTRL1) &
- TX3912_UART_CTRL1_UARTON);
-
- return 0;
-}
-
-static struct console sercons = {
- .name = "ttyS",
- .write = serial_console_write,
- .device = serial_console_device,
- .setup = serial_console_setup,
- .flags = CON_PRINTBUFFER,
- .index = -1
-};
-
-static int __init tx3912_console_init(void)
-{
- register_console(&sercons);
- return 0;
-}
-console_initcall(tx3912_console_init);
-
-#endif
+++ /dev/null
-/*
- * drivers/char/serial_tx3912.h
- *
- * Copyright (C) 1999 Harald Koerfgen
- * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
- * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Serial driver for TMPR3912/05 and PR31700 processors
- */
-#include <linux/serialP.h>
-#include <linux/generic_serial.h>
-
-/* UART Interrupt (Interrupt 2) bits (UARTA,UARTB) */
-#define UART_RX_INT 9 /* receiver holding register full (31, 21) */
-#define UART_RXOVERRUN_INT 8 /* receiver overrun error (30, 20) */
-#define UART_FRAMEERR_INT 7 /* receiver frame error (29, 19) */
-#define UART_BREAK_INT 6 /* received break signal (28, 18) */
-#define UART_PARITYERR_INT 5 /* receiver parity error (27, 17) */
-#define UART_TX_INT 4 /* transmit holding register empty (26, 16) */
-#define UART_TXOVERRUN_INT 3 /* transmit overrun error (25, 15) */
-#define UART_EMPTY_INT 2 /* both trans/recv regs empty (24, 14) */
-#define UART_DMAFULL_INT 1 /* DMA at end of buffer (23, 13) */
-#define UART_DMAHALF_INT 0 /* DMA halfway through buffer (22, 12) */
-
-#define UARTA_SHIFT 22
-#define UARTB_SHIFT 12
-
-#define INTTYPE(interrupttype) (1 << interrupttype)
-
-/*
- * This driver can spew a whole lot of debugging output at you. If you
- * need maximum performance, you should disable the DEBUG define.
- */
-#undef TX3912_UART_DEBUG
-
-#ifdef TX3912_UART_DEBUG
-#define TX3912_UART_DEBUG_OPEN 0x00000001
-#define TX3912_UART_DEBUG_SETTING 0x00000002
-#define TX3912_UART_DEBUG_FLOW 0x00000004
-#define TX3912_UART_DEBUG_MODEMSIGNALS 0x00000008
-#define TX3912_UART_DEBUG_TERMIOS 0x00000010
-#define TX3912_UART_DEBUG_TRANSMIT 0x00000020
-#define TX3912_UART_DEBUG_RECEIVE 0x00000040
-#define TX3912_UART_DEBUG_INTERRUPTS 0x00000080
-#define TX3912_UART_DEBUG_PROBE 0x00000100
-#define TX3912_UART_DEBUG_INIT 0x00000200
-#define TX3912_UART_DEBUG_CLEANUP 0x00000400
-#define TX3912_UART_DEBUG_CLOSE 0x00000800
-#define TX3912_UART_DEBUG_FIRMWARE 0x00001000
-#define TX3912_UART_DEBUG_MEMTEST 0x00002000
-#define TX3912_UART_DEBUG_THROTTLE 0x00004000
-#define TX3912_UART_DEBUG_ALL 0xffffffff
-
-int rs_debug = TX3912_UART_DEBUG_ALL & ~TX3912_UART_DEBUG_TRANSMIT;
-
-#define rs_dprintk(f, str...) if (rs_debug & f) printk (str)
-#define func_enter() rs_dprintk (TX3912_UART_DEBUG_FLOW, \
- "rs: enter %s\n", __FUNCTION__)
-#define func_exit() rs_dprintk (TX3912_UART_DEBUG_FLOW, \
- "rs: exit %s\n", __FUNCTION__)
-
-#else
-#define rs_dprintk(f, str...)
-#define func_enter()
-#define func_exit()
-
-#endif /* TX3912_UART_DEBUG */
-
-/*
- * Number of serial ports
- */
-#define TX3912_UART_NPORTS 2
-
-/*
- * Hardware specific serial port structure
- */
-struct rs_port {
- struct gs_port gs; /* Must be first field! */
-
- unsigned long base;
- int intshift; /* Register shift */
- struct wait_queue *shutdown_wait;
- int stat_flags;
- struct async_icount icount; /* Counters for 4 input IRQs */
- int read_status_mask;
- int ignore_status_mask;
- int x_char; /* XON/XOFF character */
-};
+++ /dev/null
-/* $Id: sh-sci.c,v 1.16 2004/02/10 17:04:17 lethal Exp $
- *
- * linux/drivers/char/sh-sci.c
- *
- * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
- * Copyright (C) 1999, 2000 Niibe Yutaka
- * Copyright (C) 2000 Sugioka Toshinobu
- * Modified to support multiple serial ports. Stuart Menefy (May 2000).
- * Modified to support SH7760 SCIF. Paul Mundt (Oct 2003).
- * Modified to support H8/300 Series. Yoshinori Sato (Feb 2004).
- *
- * TTY code is based on sx.c (Specialix SX driver) by:
- *
- * (C) 1998 R.E.Wolff@BitWizard.nl
- *
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/timer.h>
-#include <linux/interrupt.h>
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-#include <linux/serial.h>
-#include <linux/major.h>
-#include <linux/string.h>
-#include <linux/fcntl.h>
-#include <linux/ptrace.h>
-#include <linux/ioport.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_SH_KGDB_CONSOLE)
-#include <linux/console.h>
-#endif
-#ifdef CONFIG_CPU_FREQ
-#include <linux/notifier.h>
-#include <linux/cpufreq.h>
-#endif
-
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/bitops.h>
-
-#include <linux/generic_serial.h>
-
-#ifdef CONFIG_SH_STANDARD_BIOS
-#include <asm/sh_bios.h>
-#endif
-
-#include "sh-sci.h"
-
-#ifdef CONFIG_SH_KGDB
-#include <asm/kgdb.h>
-
-int kgdb_sci_setup(void);
-static int kgdb_get_char(struct sci_port *port);
-static void kgdb_put_char(struct sci_port *port, char c);
-static void kgdb_handle_error(struct sci_port *port);
-static struct sci_port *kgdb_sci_port;
-
-#ifdef CONFIG_SH_KGDB_CONSOLE
-static struct console kgdbcons;
-void __init kgdb_console_init(void);
-#endif /* CONFIG_SH_KGDB_CONSOLE */
-
-#endif /* CONFIG_SH_KGDB */
-
-#ifdef CONFIG_SERIAL_CONSOLE
-static struct console sercons;
-static struct sci_port* sercons_port=0;
-static int sercons_baud;
-#ifdef CONFIG_MAGIC_SYSRQ
-#include <linux/sysrq.h>
-static int break_pressed;
-#endif /* CONFIG_MAGIC_SYSRQ */
-#endif /* CONFIG_SERIAL_CONSOLE */
-
-/* Function prototypes */
-static void sci_init_pins_sci(struct sci_port* port, unsigned int cflag);
-#ifndef SCI_ONLY
-static void sci_init_pins_scif(struct sci_port* port, unsigned int cflag);
-#if defined(CONFIG_CPU_SH3)
-static void sci_init_pins_irda(struct sci_port* port, unsigned int cflag);
-#endif
-#endif
-static void sci_disable_tx_interrupts(void *ptr);
-static void sci_enable_tx_interrupts(void *ptr);
-static void sci_disable_rx_interrupts(void *ptr);
-static void sci_enable_rx_interrupts(void *ptr);
-static int sci_get_CD(void *ptr);
-static void sci_shutdown_port(void *ptr);
-static int sci_set_real_termios(void *ptr);
-static void sci_hungup(void *ptr);
-static void sci_close(void *ptr);
-static int sci_chars_in_buffer(void *ptr);
-static int sci_request_irq(struct sci_port *port);
-static void sci_free_irq(struct sci_port *port);
-static int sci_init_drivers(void);
-
-static struct tty_driver *sci_driver;
-
-static struct sci_port sci_ports[SCI_NPORTS] = SCI_INIT;
-
-static int sci_debug = 0;
-
-#ifdef MODULE
-MODULE_PARM(sci_debug, "i");
-#endif
-
-#define dprintk(x...) do { if (sci_debug) printk(x); } while(0)
-
-#ifdef CONFIG_SERIAL_CONSOLE
-static void put_char(struct sci_port *port, char c)
-{
- unsigned long flags;
- unsigned short status;
-
- local_irq_save(flags);
-
- do
- status = sci_in(port, SCxSR);
- while (!(status & SCxSR_TDxE(port)));
-
- sci_out(port, SCxTDR, c);
- sci_in(port, SCxSR); /* Dummy read */
- sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
-
- local_irq_restore(flags);
-}
-#endif
-
-#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
-
-static void handle_error(struct sci_port *port)
-{ /* Clear error flags */
- sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
-}
-
-static int get_char(struct sci_port *port)
-{
- unsigned long flags;
- unsigned short status;
- int c;
-
- local_irq_save(flags);
- do {
- status = sci_in(port, SCxSR);
- if (status & SCxSR_ERRORS(port)) {
- handle_error(port);
- continue;
- }
- } while (!(status & SCxSR_RDxF(port)));
- c = sci_in(port, SCxRDR);
- sci_in(port, SCxSR); /* Dummy read */
- sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
- local_irq_restore(flags);
-
- return c;
-}
-
-/* Taken from sh-stub.c of GDB 4.18 */
-static const char hexchars[] = "0123456789abcdef";
-
-static __inline__ char highhex(int x)
-{
- return hexchars[(x >> 4) & 0xf];
-}
-
-static __inline__ char lowhex(int x)
-{
- return hexchars[x & 0xf];
-}
-
-#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
-
-/*
- * Send the packet in buffer. The host gets one chance to read it.
- * This routine does not wait for a positive acknowledge.
- */
-
-#ifdef CONFIG_SERIAL_CONSOLE
-static void put_string(struct sci_port *port, const char *buffer, int count)
-{
- int i;
- const unsigned char *p = buffer;
-
-#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
- int checksum;
- int usegdb=0;
-
-#ifdef CONFIG_SH_STANDARD_BIOS
- /* This call only does a trap the first time it is
- * called, and so is safe to do here unconditionally
- */
- usegdb |= sh_bios_in_gdb_mode();
-#endif
-#ifdef CONFIG_SH_KGDB
- usegdb |= (kgdb_in_gdb_mode && (port == kgdb_sci_port));
-#endif
-
- if (usegdb) {
- /* $<packet info>#<checksum>. */
- do {
- unsigned char c;
- put_char(port, '$');
- put_char(port, 'O'); /* 'O'utput to console */
- checksum = 'O';
-
- for (i=0; i<count; i++) { /* Don't use run length encoding */
- int h, l;
-
- c = *p++;
- h = highhex(c);
- l = lowhex(c);
- put_char(port, h);
- put_char(port, l);
- checksum += h + l;
- }
- put_char(port, '#');
- put_char(port, highhex(checksum));
- put_char(port, lowhex(checksum));
- } while (get_char(port) != '+');
- } else
-#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
- for (i=0; i<count; i++) {
- if (*p == 10)
- put_char(port, '\r');
- put_char(port, *p++);
- }
-}
-#endif /* CONFIG_SERIAL_CONSOLE */
-
-
-#ifdef CONFIG_SH_KGDB
-
-/* Is the SCI ready, ie is there a char waiting? */
-static int kgdb_is_char_ready(struct sci_port *port)
-{
- unsigned short status = sci_in(port, SCxSR);
-
- if (status & (SCxSR_ERRORS(port) | SCxSR_BRK(port)))
- kgdb_handle_error(port);
-
- return (status & SCxSR_RDxF(port));
-}
-
-/* Write a char */
-static void kgdb_put_char(struct sci_port *port, char c)
-{
- unsigned short status;
-
- do
- status = sci_in(port, SCxSR);
- while (!(status & SCxSR_TDxE(port)));
-
- sci_out(port, SCxTDR, c);
- sci_in(port, SCxSR); /* Dummy read */
- sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
-}
-
-/* Get a char if there is one, else ret -1 */
-static int kgdb_get_char(struct sci_port *port)
-{
- int c;
-
- if (kgdb_is_char_ready(port) == 0)
- c = -1;
- else {
- c = sci_in(port, SCxRDR);
- sci_in(port, SCxSR); /* Dummy read */
- sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
- }
-
- return c;
-}
-
-/* Called from kgdbstub.c to get a character, i.e. is blocking */
-static int kgdb_sci_getchar(void)
-{
- volatile int c;
-
- /* Keep trying to read a character, this could be neater */
- while ((c = kgdb_get_char(kgdb_sci_port)) < 0);
-
- return c;
-}
-
-/* Called from kgdbstub.c to put a character, just a wrapper */
-static void kgdb_sci_putchar(int c)
-{
-
- kgdb_put_char(kgdb_sci_port, c);
-}
-
-/* Clear any errors on the SCI */
-static void kgdb_handle_error(struct sci_port *port)
-{
- sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); /* Clear error flags */
-}
-
-/* Breakpoint if there's a break sent on the serial port */
-static void kgdb_break_interrupt(int irq, void *ptr, struct pt_regs *regs)
-{
- struct sci_port *port = ptr;
- unsigned short status = sci_in(port, SCxSR);
-
- if (status & SCxSR_BRK(port)) {
-
- /* Break into the debugger if a break is detected */
- BREAKPOINT();
-
- /* Clear */
- sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
- return;
- }
-}
-
-#endif /* CONFIG_SH_KGDB */
-
-static struct real_driver sci_real_driver = {
- sci_disable_tx_interrupts,
- sci_enable_tx_interrupts,
- sci_disable_rx_interrupts,
- sci_enable_rx_interrupts,
- sci_get_CD,
- sci_shutdown_port,
- sci_set_real_termios,
- sci_chars_in_buffer,
- sci_close,
- sci_hungup,
- NULL
-};
-
-#if !defined(__H8300H__) && !defined(__H8300S__)
-#if defined(SCI_ONLY) || defined(SCI_AND_SCIF)
-static void sci_init_pins_sci(struct sci_port* port, unsigned int cflag)
-{
-}
-#endif
-
-#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
-#if defined(CONFIG_CPU_SH3)
-/* For SH7707, SH7709, SH7709A, SH7729 */
-static void sci_init_pins_scif(struct sci_port* port, unsigned int cflag)
-{
- unsigned int fcr_val = 0;
-
- {
- unsigned short data;
-
- /* We need to set SCPCR to enable RTS/CTS */
- data = ctrl_inw(SCPCR);
- /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
- ctrl_outw(data&0x0cff, SCPCR);
- }
- if (cflag & CRTSCTS)
- fcr_val |= SCFCR_MCE;
- else {
- unsigned short data;
-
- /* We need to set SCPCR to enable RTS/CTS */
- data = ctrl_inw(SCPCR);
- /* Clear out SCP7MD1,0, SCP4MD1,0,
- Set SCP6MD1,0 = {01} (output) */
- ctrl_outw((data&0x0cff)|0x1000, SCPCR);
-
- data = ctrl_inb(SCPDR);
- /* Set /RTS2 (bit6) = 0 */
- ctrl_outb(data&0xbf, SCPDR);
- }
- sci_out(port, SCFCR, fcr_val);
-}
-
-static void sci_init_pins_irda(struct sci_port* port, unsigned int cflag)
-{
- unsigned int fcr_val = 0;
-
- if (cflag & CRTSCTS)
- fcr_val |= SCFCR_MCE;
-
- sci_out(port, SCFCR, fcr_val);
-}
-
-#else
-
-/* For SH7750 */
-static void sci_init_pins_scif(struct sci_port* port, unsigned int cflag)
-{
- unsigned int fcr_val = 0;
-
- if (cflag & CRTSCTS) {
- fcr_val |= SCFCR_MCE;
- } else {
- ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
- }
- sci_out(port, SCFCR, fcr_val);
-}
-
-#endif
-#endif /* SCIF_ONLY || SCI_AND_SCIF */
-#else /* !defined(__H8300H__) && !defined(__H8300S__) */
-static void sci_init_pins_sci(struct sci_port* port, unsigned int cflag)
-{
- int ch = (port->base - SMR0) >> 3;
- /* set DDR regs */
- H8300_GPIO_DDR(h8300_sci_pins[ch].port,h8300_sci_pins[ch].rx,H8300_GPIO_INPUT);
- H8300_GPIO_DDR(h8300_sci_pins[ch].port,h8300_sci_pins[ch].tx,H8300_GPIO_OUTPUT);
- /* tx mark output*/
- H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
-}
-
-#if defined(__H8300S__)
-enum {sci_disable,sci_enable};
-
-static void h8300_sci_enable(struct sci_port* port, unsigned int ctrl)
-{
- volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
- int ch = (port->base - SMR0) >> 3;
- unsigned char mask = 1 << (ch+1);
- if (ctrl == sci_disable)
- *mstpcrl |= mask;
- else
- *mstpcrl &= ~mask;
-}
-#endif
-#endif
-
-static void sci_setsignals(struct sci_port *port, int dtr, int rts)
-{
- /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
- /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
- /* If you have signals for DTR and DCD, please implement here. */
- ;
-}
-
-static int sci_getsignals(struct sci_port *port)
-{
- /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
- and CTS/RTS */
-
- return TIOCM_DTR|TIOCM_RTS|TIOCM_DSR;
-/*
- (((o_stat & OP_DTR)?TIOCM_DTR:0) |
- ((o_stat & OP_RTS)?TIOCM_RTS:0) |
- ((i_stat & IP_CTS)?TIOCM_CTS:0) |
- ((i_stat & IP_DCD)?TIOCM_CAR:0) |
- ((i_stat & IP_DSR)?TIOCM_DSR:0) |
- ((i_stat & IP_RI) ?TIOCM_RNG:0)
-*/
-}
-
-static void sci_set_baud(struct sci_port *port, int baud)
-{
- int t;
-
- switch (baud) {
- case 0:
- t = -1;
- break;
- case 2400:
- t = BPS_2400;
- break;
- case 4800:
- t = BPS_4800;
- break;
- case 9600:
- t = BPS_9600;
- break;
- case 19200:
- t = BPS_19200;
- break;
- case 38400:
- t = BPS_38400;
- break;
- case 57600:
- t = BPS_57600;
- break;
- default:
- printk(KERN_INFO "sci: unsupported baud rate: %d, using 115200 instead.\n", baud);
- case 115200:
- t = BPS_115200;
- break;
- }
-
- if (t > 0) {
- sci_setsignals (port, 1, -1);
- if(t >= 256) {
- sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
- t >>= 2;
- } else {
- sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
- }
- sci_out(port, SCBRR, t);
- udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
- } else {
- sci_setsignals (port, 0, -1);
- }
-}
-
-static void sci_set_termios_cflag(struct sci_port *port, int cflag, int baud)
-{
- unsigned int status;
- unsigned int smr_val;
-
- do
- status = sci_in(port, SCxSR);
- while (!(status & SCxSR_TEND(port)));
-
- sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
-
-#if !defined(SCI_ONLY)
- if (port->type == PORT_SCIF) {
- sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
- }
-#endif
-
- smr_val = sci_in(port, SCSMR) & 3;
- if ((cflag & CSIZE) == CS7)
- smr_val |= 0x40;
- if (cflag & PARENB)
- smr_val |= 0x20;
- if (cflag & PARODD)
- smr_val |= 0x30;
- if (cflag & CSTOPB)
- smr_val |= 0x08;
- sci_out(port, SCSMR, smr_val);
- sci_set_baud(port, baud);
-
- port->init_pins(port, cflag);
- sci_out(port, SCSCR, SCSCR_INIT(port));
-}
-
-static int sci_set_real_termios(void *ptr)
-{
- struct sci_port *port = ptr;
-
- if (port->old_cflag != port->gs.tty->termios->c_cflag) {
- port->old_cflag = port->gs.tty->termios->c_cflag;
- sci_set_termios_cflag(port, port->old_cflag, port->gs.baud);
- sci_enable_rx_interrupts(port);
- }
-
- return 0;
-}
-
-/* ********************************************************************** *
- * the interrupt related routines *
- * ********************************************************************** */
-
-/*
- * This routine is used by the interrupt handler to schedule
- * processing in the software interrupt portion of the driver.
- */
-static inline void sci_sched_event(struct sci_port *port, int event)
-{
- port->event |= 1 << event;
- schedule_work(&port->tqueue);
-}
-
-static void sci_transmit_chars(struct sci_port *port)
-{
- int count, i;
- int txroom;
- unsigned long flags;
- unsigned short status;
- unsigned short ctrl;
- unsigned char c;
-
- status = sci_in(port, SCxSR);
- if (!(status & SCxSR_TDxE(port))) {
- local_irq_save(flags);
- ctrl = sci_in(port, SCSCR);
- if (port->gs.xmit_cnt == 0) {
- ctrl &= ~SCI_CTRL_FLAGS_TIE;
- port->gs.flags &= ~GS_TX_INTEN;
- } else
- ctrl |= SCI_CTRL_FLAGS_TIE;
- sci_out(port, SCSCR, ctrl);
- local_irq_restore(flags);
- return;
- }
-
- while (1) {
- count = port->gs.xmit_cnt;
-#if !defined(SCI_ONLY)
- if (port->type == PORT_SCIF) {
- txroom = 16 - (sci_in(port, SCFDR)>>8);
- } else {
- txroom = (sci_in(port, SCxSR) & SCI_TDRE)?1:0;
- }
-#else
- txroom = (sci_in(port, SCxSR) & SCI_TDRE)?1:0;
-#endif
- if (count > txroom)
- count = txroom;
-
- /* Don't copy past the end of the source buffer */
- if (count > SERIAL_XMIT_SIZE - port->gs.xmit_tail)
- count = SERIAL_XMIT_SIZE - port->gs.xmit_tail;
-
- /* If for one reason or another, we can't copy more data, we're done! */
- if (count == 0)
- break;
-
- for (i=0; i<count; i++) {
- c = port->gs.xmit_buf[port->gs.xmit_tail + i];
- sci_out(port, SCxTDR, c);
- }
- sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
-
- port->icount.tx += count;
-
- /* Update the kernel buffer end */
- port->gs.xmit_tail = (port->gs.xmit_tail + count) & (SERIAL_XMIT_SIZE-1);
-
- /* This one last. (this is essential)
- It would allow others to start putting more data into the buffer! */
- port->gs.xmit_cnt -= count;
- }
-
- if (port->gs.xmit_cnt <= port->gs.wakeup_chars)
- sci_sched_event(port, SCI_EVENT_WRITE_WAKEUP);
-
- local_irq_save(flags);
- ctrl = sci_in(port, SCSCR);
- if (port->gs.xmit_cnt == 0) {
- ctrl &= ~SCI_CTRL_FLAGS_TIE;
- port->gs.flags &= ~GS_TX_INTEN;
- } else {
-#if !defined(SCI_ONLY)
- if (port->type == PORT_SCIF) {
- sci_in(port, SCxSR); /* Dummy read */
- sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
- }
-#endif
- ctrl |= SCI_CTRL_FLAGS_TIE;
- }
- sci_out(port, SCSCR, ctrl);
- local_irq_restore(flags);
-}
-
-/* On SH3, SCIF may read end-of-break as a space->mark char */
-#define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
-
-static inline void sci_receive_chars(struct sci_port *port,
- struct pt_regs *regs)
-{
- int i, count;
- struct tty_struct *tty;
- int copied=0;
- unsigned short status;
-
- status = sci_in(port, SCxSR);
- if (!(status & SCxSR_RDxF(port)))
- return;
-
- tty = port->gs.tty;
- while (1) {
-#if !defined(SCI_ONLY)
- if (port->type == PORT_SCIF) {
- count = sci_in(port, SCFDR)&0x001f;
- } else {
- count = (sci_in(port, SCxSR)&SCxSR_RDxF(port))?1:0;
- }
-#else
- count = (sci_in(port, SCxSR)&SCxSR_RDxF(port))?1:0;
-#endif
-
- /* Don't copy more bytes than there is room for in the buffer */
- if (tty->flip.count + count > TTY_FLIPBUF_SIZE)
- count = TTY_FLIPBUF_SIZE - tty->flip.count;
-
- /* If for any reason we can't copy more data, we're done! */
- if (count == 0)
- break;
-
- if (port->type == PORT_SCI) {
- tty->flip.char_buf_ptr[0] = sci_in(port, SCxRDR);
- tty->flip.flag_buf_ptr[0] = TTY_NORMAL;
- } else {
- for (i=0; i<count; i++) {
- char c = sci_in(port, SCxRDR);
- status = sci_in(port, SCxSR);
-#if defined(__SH3__)
- /* Skip "chars" during break */
- if (port->break_flag) {
- if ((c == 0) &&
- (status & SCxSR_FER(port))) {
- count--; i--;
- continue;
- }
- /* Nonzero => end-of-break */
- dprintk("scif: debounce<%02x>\n", c);
- port->break_flag = 0;
- if (STEPFN(c)) {
- count--; i--;
- continue;
- }
- }
-#endif /* __SH3__ */
-#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
- if (break_pressed && (port == sercons_port)) {
- if (c != 0 &&
- time_before(jiffies,
- break_pressed + HZ*5)) {
- handle_sysrq(c, regs, NULL);
- break_pressed = 0;
- count--; i--;
- continue;
- } else if (c != 0) {
- break_pressed = 0;
- }
- }
-#endif /* CONFIG_SERIAL_CONSOLE && CONFIG_MAGIC_SYSRQ */
-
- /* Store data and status */
- tty->flip.char_buf_ptr[i] = c;
- if (status&SCxSR_FER(port)) {
- tty->flip.flag_buf_ptr[i] = TTY_FRAME;
- dprintk("sci: frame error\n");
- } else if (status&SCxSR_PER(port)) {
- tty->flip.flag_buf_ptr[i] = TTY_PARITY;
- dprintk("sci: parity error\n");
- } else {
- tty->flip.flag_buf_ptr[i] = TTY_NORMAL;
- }
- }
- }
-
- sci_in(port, SCxSR); /* dummy read */
- sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
-
- /* Update the kernel buffer end */
- tty->flip.count += count;
- tty->flip.char_buf_ptr += count;
- tty->flip.flag_buf_ptr += count;
-
- copied += count;
- port->icount.rx += count;
- }
-
- if (copied)
- /* Tell the rest of the system the news. New characters! */
- tty_flip_buffer_push(tty);
- else {
- sci_in(port, SCxSR); /* dummy read */
- sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
- }
-}
-
-static inline int sci_handle_errors(struct sci_port *port)
-{
- int copied = 0;
- unsigned short status = sci_in(port, SCxSR);
- struct tty_struct *tty = port->gs.tty;
-
- if (status&SCxSR_ORER(port) && tty->flip.count<TTY_FLIPBUF_SIZE) {
- /* overrun error */
- copied++;
- *tty->flip.flag_buf_ptr++ = TTY_OVERRUN;
- dprintk("sci: overrun error\n");
- }
-
- if (status&SCxSR_FER(port) && tty->flip.count<TTY_FLIPBUF_SIZE) {
- if (sci_rxd_in(port) == 0) {
- /* Notify of BREAK */
- copied++;
- *tty->flip.flag_buf_ptr++ = TTY_BREAK;
- dprintk("sci: BREAK detected\n");
- }
- else {
- /* frame error */
- copied++;
- *tty->flip.flag_buf_ptr++ = TTY_FRAME;
- dprintk("sci: frame error\n");
- }
- }
-
- if (status&SCxSR_PER(port) && tty->flip.count<TTY_FLIPBUF_SIZE) {
- /* parity error */
- copied++;
- *tty->flip.flag_buf_ptr++ = TTY_PARITY;
- dprintk("sci: parity error\n");
- }
-
- if (copied) {
- tty->flip.count += copied;
- tty_flip_buffer_push(tty);
- }
-
- return copied;
-}
-
-static inline int sci_handle_breaks(struct sci_port *port)
-{
- int copied = 0;
- unsigned short status = sci_in(port, SCxSR);
- struct tty_struct *tty = port->gs.tty;
-
- if (status&SCxSR_BRK(port) && tty->flip.count<TTY_FLIPBUF_SIZE) {
-#if defined(__SH3__)
- /* Debounce break */
- if (port->break_flag)
- goto break_continue;
- port->break_flag = 1;
-#endif
-#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
- if (port == sercons_port) {
- if (break_pressed == 0) {
- break_pressed = jiffies;
- dprintk("sci: implied sysrq\n");
- goto break_continue;
- }
- /* Double break implies a real break */
- break_pressed = 0;
- }
-#endif
- /* Notify of BREAK */
- copied++;
- *tty->flip.flag_buf_ptr++ = TTY_BREAK;
- dprintk("sci: BREAK detected\n");
- }
- break_continue:
-
-#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_ST40STB1) || \
- defined(CONFIG_CPU_SUBTYPE_SH7760)
- /* XXX: Handle SCIF overrun error */
- if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
- sci_out(port, SCLSR, 0);
- if(tty->flip.count<TTY_FLIPBUF_SIZE) {
- copied++;
- *tty->flip.flag_buf_ptr++ = TTY_OVERRUN;
- dprintk("sci: overrun error\n");
- }
- }
-#endif
-
- if (copied) {
- tty->flip.count += copied;
- tty_flip_buffer_push(tty);
- }
-
- return copied;
-}
-
-static irqreturn_t sci_rx_interrupt(int irq, void *ptr, struct pt_regs *regs)
-{
- struct sci_port *port = ptr;
-
- if (port->gs.flags & GS_ACTIVE)
- if (!(port->gs.flags & SCI_RX_THROTTLE)) {
- sci_receive_chars(port, regs);
- return IRQ_HANDLED;
-
- }
- sci_disable_rx_interrupts(port);
-
- return IRQ_HANDLED;
-}
-
-static irqreturn_t sci_tx_interrupt(int irq, void *ptr, struct pt_regs *regs)
-{
- struct sci_port *port = ptr;
-
- if (port->gs.flags & GS_ACTIVE)
- sci_transmit_chars(port);
- else {
- sci_disable_tx_interrupts(port);
- }
-
- return IRQ_HANDLED;
-}
-
-static irqreturn_t sci_er_interrupt(int irq, void *ptr, struct pt_regs *regs)
-{
- struct sci_port *port = ptr;
-
- /* Handle errors */
- if (port->type == PORT_SCI) {
- if(sci_handle_errors(port)) {
- /* discard character in rx buffer */
- sci_in(port, SCxSR);
- sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
- }
- }
- else
- sci_rx_interrupt(irq, ptr, regs);
-
- sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
-
- /* Kick the transmission */
- sci_tx_interrupt(irq, ptr, regs);
-
- return IRQ_HANDLED;
-}
-
-#if !defined(SCI_ONLY)
-static irqreturn_t sci_br_interrupt(int irq, void *ptr, struct pt_regs *regs)
-{
- struct sci_port *port = ptr;
-
- /* Handle BREAKs */
- sci_handle_breaks(port);
- sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
-
- return IRQ_HANDLED;
-}
-#endif
-
-static void do_softint(void *private_)
-{
- struct sci_port *port = (struct sci_port *) private_;
- struct tty_struct *tty;
-
- tty = port->gs.tty;
- if (!tty)
- return;
-
- if (test_and_clear_bit(SCI_EVENT_WRITE_WAKEUP, &port->event)) {
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
- wake_up_interruptible(&tty->write_wait);
- }
-}
-
-/* ********************************************************************** *
- * Here are the routines that actually *
- * interface with the generic_serial driver *
- * ********************************************************************** */
-
-static void sci_disable_tx_interrupts(void *ptr)
-{
- struct sci_port *port = ptr;
- unsigned long flags;
- unsigned short ctrl;
-
- /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
- local_irq_save(flags);
- ctrl = sci_in(port, SCSCR);
- ctrl &= ~SCI_CTRL_FLAGS_TIE;
- sci_out(port, SCSCR, ctrl);
- local_irq_restore(flags);
-}
-
-static void sci_enable_tx_interrupts(void *ptr)
-{
- struct sci_port *port = ptr;
-
- disable_irq(port->irqs[SCIx_TXI_IRQ]);
- sci_transmit_chars(port);
- enable_irq(port->irqs[SCIx_TXI_IRQ]);
-}
-
-static void sci_disable_rx_interrupts(void * ptr)
-{
- struct sci_port *port = ptr;
- unsigned long flags;
- unsigned short ctrl;
-
- /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
- local_irq_save(flags);
- ctrl = sci_in(port, SCSCR);
- ctrl &= ~SCI_CTRL_FLAGS_RIE;
- sci_out(port, SCSCR, ctrl);
- local_irq_restore(flags);
-}
-
-static void sci_enable_rx_interrupts(void * ptr)
-{
- struct sci_port *port = ptr;
- unsigned long flags;
- unsigned short ctrl;
-
- /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
- local_irq_save(flags);
- ctrl = sci_in(port, SCSCR);
- ctrl |= SCI_CTRL_FLAGS_RIE;
- sci_out(port, SCSCR, ctrl);
- local_irq_restore(flags);
-}
-
-static int sci_get_CD(void * ptr)
-{
- /* If you have signal for CD (Carrier Detect), please change here. */
- return 1;
-}
-
-static int sci_chars_in_buffer(void * ptr)
-{
- struct sci_port *port = ptr;
-
-#if !defined(SCI_ONLY)
- if (port->type == PORT_SCIF) {
- return (sci_in(port, SCFDR) >> 8) + ((sci_in(port, SCxSR) & SCxSR_TEND(port))? 0: 1);
- } else {
- return (sci_in(port, SCxSR) & SCxSR_TEND(port))? 0: 1;
- }
-#else
- return (sci_in(port, SCxSR) & SCxSR_TEND(port))? 0: 1;
-#endif
-}
-
-static void sci_shutdown_port(void * ptr)
-{
- struct sci_port *port = ptr;
-
- port->gs.flags &= ~ GS_ACTIVE;
- if (port->gs.tty && port->gs.tty->termios->c_cflag & HUPCL)
- sci_setsignals(port, 0, 0);
- sci_free_irq(port);
-#if defined(__H8300S__)
- h8300_sci_enable(port,sci_disable);
-#endif
-}
-
-/* ********************************************************************** *
- * Here are the routines that actually *
- * interface with the rest of the system *
- * ********************************************************************** */
-
-static int sci_open(struct tty_struct * tty, struct file * filp)
-{
- struct sci_port *port;
- int retval, line;
-
- line = tty->index;
-
- if ((line < 0) || (line >= SCI_NPORTS))
- return -ENODEV;
-
- port = &sci_ports[line];
-
- tty->driver_data = port;
- port->gs.tty = tty;
- port->gs.count++;
-
- port->event = 0;
- INIT_WORK(&port->tqueue, do_softint, port);
-
-#if defined(__H8300S__)
- h8300_sci_enable(port,sci_enable);
-#endif
-
- /*
- * Start up serial port
- */
- retval = gs_init_port(&port->gs);
- if (retval) {
- goto failed_1;
- }
-
- port->gs.flags |= GS_ACTIVE;
- sci_setsignals(port, 1,1);
-
- if (port->gs.count == 1) {
- retval = sci_request_irq(port);
- }
-
- retval = gs_block_til_ready(port, filp);
-
- if (retval) {
- goto failed_3;
- }
-
-#ifdef CONFIG_SERIAL_CONSOLE
- if (sercons.cflag && sercons.index == line) {
- tty->termios->c_cflag = sercons.cflag;
- port->gs.baud = sercons_baud;
- sercons.cflag = 0;
- sci_set_real_termios(port);
- }
-#endif
-
-#ifdef CONFIG_SH_KGDB_CONSOLE
- if (kgdbcons.cflag && kgdbcons.index == line) {
- tty->termios->c_cflag = kgdbcons.cflag;
- port->gs.baud = kgdb_baud;
- sercons.cflag = 0;
- sci_set_real_termios(port);
- }
-#endif
-
- sci_enable_rx_interrupts(port);
-
- return 0;
-
-failed_3:
- sci_free_irq(port);
-failed_1:
- port->gs.count--;
- return retval;
-}
-
-static void sci_hungup(void *ptr)
-{
- return;
-}
-
-static void sci_close(void *ptr)
-{
- return;
-}
-
-static int sci_tiocmget(struct tty_struct *tty, struct file *file)
-{
- struct sci_port *port = tty->driver_data;
- return sci_getsignals(port);
-}
-
-static int sci_tiocmset(struct tty_struct *tty, struct file *file,
- unsigned int set, unsigned int clear)
-{
- struct sci_port *port = tty->driver_data;
- int rts = -1, dtr = -1;
-
- if (set & TIOCM_RTS)
- rts = 1;
- if (set & TIOCM_DTR)
- dtr = 1;
- if (clear & TIOCM_RTS)
- rts = 0;
- if (clear & TIOCM_DTR)
- dtr = 0;
-
- sci_setsignals(port, dtr, rts);
- return 0;
-}
-
-static int sci_ioctl(struct tty_struct * tty, struct file * filp,
- unsigned int cmd, unsigned long arg)
-{
- int rc;
- struct sci_port *port = tty->driver_data;
- int ival;
-
- rc = 0;
- switch (cmd) {
- case TIOCGSOFTCAR:
- rc = put_user(((tty->termios->c_cflag & CLOCAL) ? 1 : 0),
- (unsigned int __user *) arg);
- break;
- case TIOCSSOFTCAR:
- if ((rc = get_user(ival, (unsigned int __user *) arg)) == 0)
- tty->termios->c_cflag =
- (tty->termios->c_cflag & ~CLOCAL) |
- (ival ? CLOCAL : 0);
- break;
- case TIOCGSERIAL:
- if ((rc = verify_area(VERIFY_WRITE, (void __user *) arg,
- sizeof(struct serial_struct))) == 0)
- rc = gs_getserial(&port->gs, (struct serial_struct *) arg);
- break;
- case TIOCSSERIAL:
- if ((rc = verify_area(VERIFY_READ, (void __user *) arg,
- sizeof(struct serial_struct))) == 0)
- rc = gs_setserial(&port->gs,
- (struct serial_struct *) arg);
- break;
- default:
- rc = -ENOIOCTLCMD;
- break;
- }
-
- return rc;
-}
-
-static void sci_throttle(struct tty_struct * tty)
-{
- struct sci_port *port = (struct sci_port *)tty->driver_data;
-
- /* If the port is using any type of input flow
- * control then throttle the port.
- */
- if ((tty->termios->c_cflag & CRTSCTS) || (I_IXOFF(tty)) )
- port->gs.flags |= SCI_RX_THROTTLE;
-}
-
-static void sci_unthrottle(struct tty_struct * tty)
-{
- struct sci_port *port = (struct sci_port *)tty->driver_data;
-
- /* Always unthrottle even if flow control is not enabled on
- * this port in case we disabled flow control while the port
- * was throttled
- */
- port->gs.flags &= ~SCI_RX_THROTTLE;
- sci_enable_rx_interrupts(port);
- return;
-}
-
-#ifdef CONFIG_PROC_FS
-static int sci_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- int i;
- struct sci_port *port;
- int len = 0;
-
- len += sprintf(page, "sciinfo:0.1\n");
- for (i = 0; i < SCI_NPORTS && len < 4000; i++) {
- port = &sci_ports[i];
- len += sprintf(page+len, "%d: uart:%s address: %08x", i,
- (port->type == PORT_SCI) ? "SCI" : "SCIF",
- port->base);
- len += sprintf(page+len, " baud:%d", port->gs.baud);
- len += sprintf(page+len, " tx:%d rx:%d",
- port->icount.tx, port->icount.rx);
-
- if (port->icount.frame)
- len += sprintf(page+len, " fe:%d", port->icount.frame);
- if (port->icount.parity)
- len += sprintf(page+len, " pe:%d", port->icount.parity);
- if (port->icount.brk)
- len += sprintf(page+len, " brk:%d", port->icount.brk);
- if (port->icount.overrun)
- len += sprintf(page+len, " oe:%d", port->icount.overrun);
- len += sprintf(page+len, "\n");
- }
- return len;
-}
-#endif
-
-#ifdef CONFIG_CPU_FREQ
-/*
- * Here we define a transistion notifier so that we can update all of our
- * ports' baud rate when the peripheral clock changes.
- */
-
-static int sci_notifier(struct notifier_block *self, unsigned long phase, void *p)
-{
- struct cpufreq_freqs *freqs = p;
- int i;
-
- if (phase == CPUFREQ_POSTCHANGE) {
- for (i = 0; i < SCI_NPORTS; i++) {
- /*
- * This will force a baud rate change in hardware.
- */
- if (sci_ports[i].gs.tty != NULL) {
- sci_set_baud(&sci_ports[i], sci_ports[i].gs.baud);
- }
- }
- printk("%s: got a postchange notification for cpu %d (old %d, new %d)\n",
- __FUNCTION__, freqs->cpu, freqs->old, freqs->new);
- }
-
- return NOTIFY_OK;
-}
-
-static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
-#endif /* CONFIG_CPU_FREQ */
-
-static struct tty_operations sci_ops = {
- .open = sci_open,
- .close = gs_close,
- .write = gs_write,
- .put_char = gs_put_char,
- .flush_chars = gs_flush_chars,
- .write_room = gs_write_room,
- .chars_in_buffer = gs_chars_in_buffer,
- .flush_buffer = gs_flush_buffer,
- .ioctl = sci_ioctl,
- .throttle = sci_throttle,
- .unthrottle = sci_unthrottle,
- .set_termios = gs_set_termios,
- .stop = gs_stop,
- .start = gs_start,
- .hangup = gs_hangup,
-#ifdef CONFIG_PROC_FS
- .read_proc = sci_read_proc,
-#endif
- .tiocmget = sci_tiocmget,
- .tiocmset = sci_tiocmset,
-};
-
-/* ********************************************************************** *
- * Here are the initialization routines. *
- * ********************************************************************** */
-
-static int sci_init_drivers(void)
-{
- int error;
- struct sci_port *port;
- sci_driver = alloc_tty_driver(SCI_NPORTS);
- if (!sci_driver)
- return -ENOMEM;
-
- sci_driver->owner = THIS_MODULE;
- sci_driver->driver_name = "sci";
- sci_driver->name = "ttySC";
- sci_driver->devfs_name = "ttsc/";
- sci_driver->major = SCI_MAJOR;
- sci_driver->minor_start = SCI_MINOR_START;
- sci_driver->type = TTY_DRIVER_TYPE_SERIAL;
- sci_driver->subtype = SERIAL_TYPE_NORMAL;
- sci_driver->init_termios = tty_std_termios;
- sci_driver->init_termios.c_cflag =
- B9600 | CS8 | CREAD | HUPCL | CLOCAL | CRTSCTS;
- sci_driver->flags = TTY_DRIVER_REAL_RAW;
- tty_set_operations(sci_driver, &sci_ops);
- if ((error = tty_register_driver(sci_driver))) {
- printk(KERN_ERR "sci: Couldn't register SCI driver, error = %d\n",
- error);
- put_tty_driver(sci_driver);
- return 1;
- }
-
- for (port = &sci_ports[0]; port < &sci_ports[SCI_NPORTS]; port++) {
- port->gs.magic = SCI_MAGIC;
- port->gs.close_delay = HZ/2;
- port->gs.closing_wait = 30 * HZ;
- port->gs.rd = &sci_real_driver;
- init_waitqueue_head(&port->gs.open_wait);
- init_waitqueue_head(&port->gs.close_wait);
- port->old_cflag = 0;
- port->icount.cts = port->icount.dsr =
- port->icount.rng = port->icount.dcd = 0;
- port->icount.rx = port->icount.tx = 0;
- port->icount.frame = port->icount.parity = 0;
- port->icount.overrun = port->icount.brk = 0;
- }
-
-#ifdef CONFIG_CPU_FREQ
- /* Setup transition notifier */
- if (cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER) < 0) {
- printk(KERN_ERR "sci: Unable to register CPU frequency notifier\n");
- return 1;
- }
- printk("sci: CPU frequency notifier registered\n");
-#endif
- return 0;
-}
-
-static int sci_request_irq(struct sci_port *port)
-{
- int i;
-#if !defined(SCI_ONLY)
- irqreturn_t (*handlers[4])(int irq, void *p, struct pt_regs *regs) = {
- sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
- sci_br_interrupt,
- };
-#else
- void (*handlers[3])(int irq, void *ptr, struct pt_regs *regs) = {
- sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
- };
-#endif
- for (i=0; i<(sizeof(handlers)/sizeof(handlers[0])); i++) {
- if (!port->irqs[i]) continue;
- if (request_irq(port->irqs[i], handlers[i], SA_INTERRUPT,
- "sci", port)) {
- printk(KERN_ERR "sci: Cannot allocate irq.\n");
- return -ENODEV;
- }
- }
- return 0;
-}
-
-static void sci_free_irq(struct sci_port *port)
-{
- int i;
-
- for (i=0; i<4; i++) {
- if (!port->irqs[i]) continue;
- free_irq(port->irqs[i], port);
- }
-}
-
-static char banner[] __initdata =
- KERN_INFO "SuperH SCI(F) driver initialized\n";
-
-int __init sci_init(void)
-{
- struct sci_port *port;
- int j;
-
- printk("%s", banner);
-
- for (j=0; j<SCI_NPORTS; j++) {
- port = &sci_ports[j];
- printk(KERN_INFO "ttySC%d at 0x%08x is a %s\n", j, port->base,
- (port->type == PORT_SCI) ? "SCI" : "SCIF");
- }
-
- sci_init_drivers();
-
-#ifdef CONFIG_SH_STANDARD_BIOS
- sh_bios_gdb_detach();
-#endif
- return 0; /* Return -EIO when not detected */
-}
-
-module_init(sci_init);
-
-#ifdef MODULE
-#undef func_enter
-#undef func_exit
-
-void cleanup_module(void)
-{
- tty_unregister_driver(sci_driver);
- put_tty_driver(sci_driver);
-}
-
-#include "generic_serial.c"
-#endif
-
-#ifdef CONFIG_SERIAL_CONSOLE
-/*
- * Print a string to the serial port trying not to disturb
- * any possible real use of the port...
- */
-static void serial_console_write(struct console *co, const char *s,
- unsigned count)
-{
- put_string(sercons_port, s, count);
-}
-
-static struct tty_driver *serial_console_device(struct console *c, int *index)
-{
- *index = c->index;
- return sci_driver;
-}
-
-/*
- * Setup initial baud/bits/parity. We do two things here:
- * - construct a cflag setting for the first rs_open()
- * - initialize the serial port
- * Return non-zero if we didn't find a serial port.
- */
-static int __init serial_console_setup(struct console *co, char *options)
-{
- int baud = 9600;
- int bits = 8;
- int parity = 'n';
- int cflag = CREAD | HUPCL | CLOCAL;
- char *s;
-
- sercons_port = &sci_ports[co->index];
-
- if (options) {
- baud = simple_strtoul(options, NULL, 10);
- s = options;
- while(*s >= '0' && *s <= '9')
- s++;
- if (*s) parity = *s++;
- if (*s) bits = *s - '0';
- }
-
- /*
- * Now construct a cflag setting.
- */
- switch (baud) {
- case 19200:
- cflag |= B19200;
- break;
- case 38400:
- cflag |= B38400;
- break;
- case 57600:
- cflag |= B57600;
- break;
- case 115200:
- cflag |= B115200;
- break;
- case 9600:
- default:
- cflag |= B9600;
- baud = 9600;
- break;
- }
- switch (bits) {
- case 7:
- cflag |= CS7;
- break;
- default:
- case 8:
- cflag |= CS8;
- break;
- }
- switch (parity) {
- case 'o': case 'O':
- cflag |= PARODD;
- break;
- case 'e': case 'E':
- cflag |= PARENB;
- break;
- }
-
- co->cflag = cflag;
- sercons_baud = baud;
-
-#if defined(__H8300S__)
- h8300_sci_enable(sercons_port,sci_enable);
-#endif
- sci_set_termios_cflag(sercons_port, cflag, baud);
- sercons_port->old_cflag = cflag;
-
- return 0;
-}
-
-static struct console sercons = {
- .name = "ttySC",
- .write = serial_console_write,
- .device = serial_console_device,
- .setup = serial_console_setup,
- .flags = CON_PRINTBUFFER,
- .index = -1,
-};
-
-/*
- * Register console.
- */
-
-#ifdef CONFIG_SH_EARLY_PRINTK
-extern void sh_console_unregister (void);
-#endif
-
-static int __init sci_console_init(void)
-{
- register_console(&sercons);
-#ifdef CONFIG_SH_EARLY_PRINTK
- /* Now that the real console is available, unregister the one we
- * used while first booting.
- */
- sh_console_unregister();
-#endif
- return 0;
-}
-console_initcall(sci_console_init);
-
-#endif /* CONFIG_SERIAL_CONSOLE */
-
-
-#ifdef CONFIG_SH_KGDB
-
-/* Initialise the KGDB serial port */
-int kgdb_sci_setup(void)
-{
- int cflag = CREAD | HUPCL | CLOCAL;
-
- if ((kgdb_portnum < 0) || (kgdb_portnum >= SCI_NPORTS))
- return -1;
-
- kgdb_sci_port = &sci_ports[kgdb_portnum];
-
- switch (kgdb_baud) {
- case 115200:
- cflag |= B115200;
- break;
- case 57600:
- cflag |= B57600;
- break;
- case 38400:
- cflag |= B38400;
- break;
- case 19200:
- cflag |= B19200;
- break;
- case 9600:
- default:
- cflag |= B9600;
- kgdb_baud = 9600;
- break;
- }
-
- switch (kgdb_bits) {
- case '7':
- cflag |= CS7;
- break;
- default:
- case '8':
- cflag |= CS8;
- break;
- }
-
- switch (kgdb_parity) {
- case 'O':
- cflag |= PARODD;
- break;
- case 'E':
- cflag |= PARENB;
- break;
- }
-
- kgdb_cflag = cflag;
- sci_set_termios_cflag(kgdb_sci_port, kgdb_cflag, kgdb_baud);
-
- /* Set up the interrupt for BREAK from GDB */
- /* Commented out for now since it may not be possible yet...
- request_irq(kgdb_sci_port->irqs[0], kgdb_break_interrupt,
- SA_INTERRUPT, "sci", kgdb_sci_port);
- sci_enable_rx_interrupts(kgdb_sci_port);
- */
-
- /* Setup complete: initialize function pointers */
- kgdb_getchar = kgdb_sci_getchar;
- kgdb_putchar = kgdb_sci_putchar;
-
- return 0;
-}
-
-#ifdef CONFIG_SH_KGDB_CONSOLE
-
-/* Create a console device */
-static kdev_t kgdb_console_device(struct console *c)
-{
- return MKDEV(SCI_MAJOR, SCI_MINOR_START + c->index);
-}
-
-/* Set up the KGDB console */
-static int __init kgdb_console_setup(struct console *co, char *options)
-{
- /* NB we ignore 'options' because we've already done the setup */
- co->cflag = kgdb_cflag;
-
- return 0;
-}
-
-/* Register the KGDB console so we get messages (d'oh!) */
-void __init kgdb_console_init(void)
-{
- register_console(&kgdbcons);
-}
-
-/* The console structure for KGDB */
-static struct console kgdbcons = {
- name:"ttySC",
- write:kgdb_console_write,
- device:kgdb_console_device,
- wait_key:serial_console_wait_key,
- setup:kgdb_console_setup,
- flags:CON_PRINTBUFFER | CON_ENABLED,
- index:-1,
-};
-
-#endif /* CONFIG_SH_KGDB_CONSOLE */
-
-#endif /* CONFIG_SH_KGDB */
+++ /dev/null
-/* $Id: sh-sci.h,v 1.7 2004/02/10 17:04:17 lethal Exp $
- *
- * linux/drivers/char/sh-sci.h
- *
- * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
- * Copyright (C) 1999, 2000 Niibe Yutaka
- * Copyright (C) 2000 Greg Banks
- * Modified to support multiple serial ports. Stuart Menefy (May 2000).
- * Modified to support SH7760 SCIF. Paul Mundt (Oct 2003).
- * Modified to support H8/300 Serise Yoshinori Sato (Feb 2004).
- *
- */
-#include <linux/config.h>
-
-#if defined(__H8300H__) || defined(__H8300S__)
-#include <asm/gpio.h>
-#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
-#include <asm/regs306x.h>
-#endif
-#if defined(CONFIG_H8S2678)
-#include <asm/regs267x.h>
-#endif
-#endif
-
-/* Values for sci_port->type */
-#define PORT_SCI 0
-#define PORT_SCIF 1
-#define PORT_IRDA 1 /* XXX: temporary assignment */
-
-/* Offsets into the sci_port->irqs array */
-#define SCIx_ERI_IRQ 0
-#define SCIx_RXI_IRQ 1
-#define SCIx_TXI_IRQ 2
-
-/* ERI, RXI, TXI, BRI */
-#define SCI_IRQS { 23, 24, 25, 0 }
-#define SH3_SCIF_IRQS { 56, 57, 59, 58 }
-#define SH3_IRDA_IRQS { 52, 53, 55, 54 }
-#define SH4_SCIF_IRQS { 40, 41, 43, 42 }
-#define STB1_SCIF1_IRQS {23, 24, 26, 25 }
-#define SH7760_SCIF0_IRQS { 52, 53, 55, 54 }
-#define SH7760_SCIF1_IRQS { 72, 73, 75, 74 }
-#define SH7760_SCIF2_IRQS { 76, 77, 79, 78 }
-#define H8300H_SCI_IRQS0 {52, 53, 54, 0 }
-#define H8300H_SCI_IRQS1 {56, 57, 58, 0 }
-#define H8300H_SCI_IRQS2 {60, 61, 62, 0 }
-#define H8S_SCI_IRQS0 {88, 89, 90, 0 }
-#define H8S_SCI_IRQS1 {92, 93, 94, 0 }
-#define H8S_SCI_IRQS2 {96, 97, 98, 0 }
-
-#if defined(CONFIG_CPU_SUBTYPE_SH7708)
-# define SCI_NPORTS 1
-# define SCI_INIT { \
- { {}, PORT_SCI, 0xfffffe80, SCI_IRQS, sci_init_pins_sci } \
-}
-# define SCSPTR 0xffffff7c /* 8 bit */
-# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
-# define SCI_ONLY
-#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
-# define SCI_NPORTS 3
-# define SCI_INIT { \
- { {}, PORT_SCI, 0xfffffe80, SCI_IRQS, sci_init_pins_sci }, \
- { {}, PORT_SCIF, 0xA4000150, SH3_SCIF_IRQS, sci_init_pins_scif }, \
- { {}, PORT_SCIF, 0xA4000140, SH3_IRDA_IRQS, sci_init_pins_irda } \
-}
-# define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */
-# define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */
-# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
-# define SCI_AND_SCIF
-#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751)
-# define SCI_NPORTS 2
-# define SCI_INIT { \
- { {}, PORT_SCI, 0xffe00000, SCI_IRQS, sci_init_pins_sci }, \
- { {}, PORT_SCIF, 0xFFE80000, SH4_SCIF_IRQS, sci_init_pins_scif } \
-}
-# define SCSPTR1 0xffe0001c /* 8 bit SCI */
-# define SCSPTR2 0xFFE80020 /* 16 bit SCIF */
-# define SCIF_ORER 0x0001 /* overrun error bit */
-# define SCSCR_INIT(port) (((port)->type == PORT_SCI) ? \
- 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ : \
- 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ )
-# define SCI_AND_SCIF
-#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
-# define SCI_NPORTS 3
-# define SCI_INIT { \
- { {}, PORT_SCIF, 0xfe600000, SH7760_SCIF0_IRQS, sci_init_pins_scif }, \
- { {}, PORT_SCIF, 0xfe610000, SH7760_SCIF1_IRQS, sci_init_pins_scif }, \
- { {}, PORT_SCIF, 0xfe620000, SH7760_SCIF2_IRQS, sci_init_pins_scif } \
-}
-# define SCSPTR0 0xfe600024 /* 16 bit SCIF */
-# define SCSPTR1 0xfe610024 /* 16 bit SCIF */
-# define SCSPTR2 0xfe620024 /* 16 bit SCIF */
-# define SCIF_ORDER 0x0001 /* overrun error bit */
-# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
-#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
-# define SCI_NPORTS 2
-# define SCI_INIT { \
- { {}, PORT_SCIF, 0xffe00000, STB1_SCIF1_IRQS, sci_init_pins_scif }, \
- { {}, PORT_SCIF, 0xffe80000, SH4_SCIF_IRQS, sci_init_pins_scif } \
-}
-# define SCSPTR1 0xffe00020 /* 16 bit SCIF */
-# define SCSPTR2 0xffe80020 /* 16 bit SCIF */
-# define SCIF_ORER 0x0001 /* overrun error bit */
-# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
-#elif defined(CONFIG_H83007) || defined(CONFIG_H83068)
-# define SCI_NPORTS 3
-# define SCI_INIT { \
- { {}, PORT_SCI, 0x00ffffb0, H8300H_SCI_IRQS0, sci_init_pins_sci }, \
- { {}, PORT_SCI, 0x00ffffb8, H8300H_SCI_IRQS1, sci_init_pins_sci }, \
- { {}, PORT_SCI, 0x00ffffc0, H8300H_SCI_IRQS2, sci_init_pins_sci } \
-}
-# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
-# define SCI_ONLY
-# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port)
-#elif defined(CONFIG_H8S2678)
-# define SCI_NPORTS 3
-# define SCI_INIT { \
- { {}, PORT_SCI, 0x00ffff78, H8S_SCI_IRQS0, sci_init_pins_sci }, \
- { {}, PORT_SCI, 0x00ffff80, H8S_SCI_IRQS1, sci_init_pins_sci }, \
- { {}, PORT_SCI, 0x00ffff88, H8S_SCI_IRQS2, sci_init_pins_sci } \
-}
-# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
-# define SCI_ONLY
-# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port)
-#else
-# error CPU subtype not defined
-#endif
-
-/* SCSCR */
-#define SCI_CTRL_FLAGS_TIE 0x80 /* all */
-#define SCI_CTRL_FLAGS_RIE 0x40 /* all */
-#define SCI_CTRL_FLAGS_TE 0x20 /* all */
-#define SCI_CTRL_FLAGS_RE 0x10 /* all */
-/* SCI_CTRL_FLAGS_REIE 0x08 * 7750 SCIF */
-/* SCI_CTRL_FLAGS_MPIE 0x08 * 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */
-/* SCI_CTRL_FLAGS_TEIE 0x04 * 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */
-/* SCI_CTRL_FLAGS_CKE1 0x02 * all */
-/* SCI_CTRL_FLAGS_CKE0 0x01 * 7707 SCI/SCIF, 7708 SCI, 7709 SCI/SCIF, 7750 SCI */
-
-/* SCxSR SCI */
-#define SCI_TDRE 0x80 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */
-#define SCI_RDRF 0x40 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */
-#define SCI_ORER 0x20 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */
-#define SCI_FER 0x10 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */
-#define SCI_PER 0x08 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */
-#define SCI_TEND 0x04 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */
-/* SCI_MPB 0x02 * 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */
-/* SCI_MPBT 0x01 * 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */
-
-#define SCI_ERRORS ( SCI_PER | SCI_FER | SCI_ORER)
-
-/* SCxSR SCIF */
-#define SCIF_ER 0x0080 /* 7707 SCIF, 7709 SCIF, 7750 SCIF */
-#define SCIF_TEND 0x0040 /* 7707 SCIF, 7709 SCIF, 7750 SCIF */
-#define SCIF_TDFE 0x0020 /* 7707 SCIF, 7709 SCIF, 7750 SCIF */
-#define SCIF_BRK 0x0010 /* 7707 SCIF, 7709 SCIF, 7750 SCIF */
-#define SCIF_FER 0x0008 /* 7707 SCIF, 7709 SCIF, 7750 SCIF */
-#define SCIF_PER 0x0004 /* 7707 SCIF, 7709 SCIF, 7750 SCIF */
-#define SCIF_RDF 0x0002 /* 7707 SCIF, 7709 SCIF, 7750 SCIF */
-#define SCIF_DR 0x0001 /* 7707 SCIF, 7709 SCIF, 7750 SCIF */
-
-#define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
-
-#if defined(SCI_ONLY)
-# define SCxSR_TEND(port) SCI_TEND
-# define SCxSR_ERRORS(port) SCI_ERRORS
-# define SCxSR_RDxF(port) SCI_RDRF
-# define SCxSR_TDxE(port) SCI_TDRE
-# define SCxSR_ORER(port) SCI_ORER
-# define SCxSR_FER(port) SCI_FER
-# define SCxSR_PER(port) SCI_PER
-# define SCxSR_BRK(port) 0x00
-# define SCxSR_RDxF_CLEAR(port) 0xbc
-# define SCxSR_ERROR_CLEAR(port) 0xc4
-# define SCxSR_TDxE_CLEAR(port) 0x78
-# define SCxSR_BREAK_CLEAR(port) 0xc4
-#elif defined(SCIF_ONLY)
-# define SCxSR_TEND(port) SCIF_TEND
-# define SCxSR_ERRORS(port) SCIF_ERRORS
-# define SCxSR_RDxF(port) SCIF_RDF
-# define SCxSR_TDxE(port) SCIF_TDFE
-# define SCxSR_ORER(port) 0x0000
-# define SCxSR_FER(port) SCIF_FER
-# define SCxSR_PER(port) SCIF_PER
-# define SCxSR_BRK(port) SCIF_BRK
-# define SCxSR_RDxF_CLEAR(port) 0x00fc
-# define SCxSR_ERROR_CLEAR(port) 0x0073
-# define SCxSR_TDxE_CLEAR(port) 0x00df
-# define SCxSR_BREAK_CLEAR(port) 0x00e3
-#else
-# define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND)
-# define SCxSR_ERRORS(port) (((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS)
-# define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_RDF)
-# define SCxSR_TDxE(port) (((port)->type == PORT_SCI) ? SCI_TDRE : SCIF_TDFE)
-# define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : 0x0000)
-# define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER)
-# define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER)
-# define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK)
-# define SCxSR_RDxF_CLEAR(port) (((port)->type == PORT_SCI) ? 0xbc : 0x00fc)
-# define SCxSR_ERROR_CLEAR(port) (((port)->type == PORT_SCI) ? 0xc4 : 0x0073)
-# define SCxSR_TDxE_CLEAR(port) (((port)->type == PORT_SCI) ? 0x78 : 0x00df)
-# define SCxSR_BREAK_CLEAR(port) (((port)->type == PORT_SCI) ? 0xc4 : 0x00e3)
-#endif
-
-/* SCFCR */
-#define SCFCR_RFRST 0x0002
-#define SCFCR_TFRST 0x0004
-#define SCFCR_MCE 0x0008
-
-#define SCI_MAJOR 204
-#define SCI_MINOR_START 8
-
-/* Generic serial flags */
-#define SCI_RX_THROTTLE 0x0000001
-
-#define SCI_MAGIC 0xbabeface
-
-/*
- * Events are used to schedule things to happen at timer-interrupt
- * time, instead of at rs interrupt time.
- */
-#define SCI_EVENT_WRITE_WAKEUP 0
-
-struct sci_port {
- struct gs_port gs;
- int type;
- unsigned int base;
- unsigned char irqs[4]; /* ERI, RXI, TXI, BRI */
- void (*init_pins)(struct sci_port* port, unsigned int cflag);
- unsigned int old_cflag;
- struct async_icount icount;
- struct work_struct tqueue;
- unsigned long event;
- int break_flag;
-};
-
-#define SCI_IN(size, offset) \
- unsigned int addr = port->base + (offset); \
- if ((size) == 8) { \
- return ctrl_inb(addr); \
- } else { \
- return ctrl_inw(addr); \
- }
-#define SCI_OUT(size, offset, value) \
- unsigned int addr = port->base + (offset); \
- if ((size) == 8) { \
- ctrl_outb(value, addr); \
- } else { \
- ctrl_outw(value, addr); \
- }
-
-#define CPU_SCIx_FNS(name, sci_offset, sci_size, scif_offset, scif_size)\
- static inline unsigned int sci_##name##_in(struct sci_port* port) \
- { \
- if (port->type == PORT_SCI) { \
- SCI_IN(sci_size, sci_offset) \
- } else { \
- SCI_IN(scif_size, scif_offset); \
- } \
- } \
- static inline void sci_##name##_out(struct sci_port* port, unsigned int value) \
- { \
- if (port->type == PORT_SCI) { \
- SCI_OUT(sci_size, sci_offset, value) \
- } else { \
- SCI_OUT(scif_size, scif_offset, value); \
- } \
- }
-
-#define CPU_SCIF_FNS(name, scif_offset, scif_size) \
- static inline unsigned int sci_##name##_in(struct sci_port* port) \
- { \
- SCI_IN(scif_size, scif_offset); \
- } \
- static inline void sci_##name##_out(struct sci_port* port, unsigned int value) \
- { \
- SCI_OUT(scif_size, scif_offset, value); \
- }
-
-#define CPU_SCI_FNS(name, sci_offset, sci_size) \
- static inline unsigned int sci_##name##_in(struct sci_port* port) \
- { \
- SCI_IN(sci_size, sci_offset); \
- } \
- static inline void sci_##name##_out(struct sci_port* port, unsigned int value) \
- { \
- SCI_OUT(sci_size, sci_offset, value); \
- }
-
-#ifdef CONFIG_CPU_SH3
-#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
- sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
- h8_sci_offset, h8_sci_size) \
- CPU_SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh3_scif_offset, sh3_scif_size)
-#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \
- CPU_SCIF_FNS(name, sh3_scif_offset, sh3_scif_size)
-#elif defined(__H8300H__) || defined(__H8300S__)
-#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
- sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
- h8_sci_offset, h8_sci_size) \
- CPU_SCI_FNS(name, h8_sci_offset, h8_sci_size)
-#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size)
-#else
-#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
- sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
- h8_sci_offset, h8_sci_size) \
- CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size)
-#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \
- CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
-#endif
-
-/* reg SCI/SH3 SCI/SH4 SCIF/SH3 SCIF/SH4 SCI/H8*/
-/* name off sz off sz off sz off sz off sz*/
-SCIx_FNS(SCSMR, 0x00, 8, 0x00, 8, 0x00, 8, 0x00, 16, 0x00, 8)
-SCIx_FNS(SCBRR, 0x02, 8, 0x04, 8, 0x02, 8, 0x04, 8, 0x01, 8)
-SCIx_FNS(SCSCR, 0x04, 8, 0x08, 8, 0x04, 8, 0x08, 16, 0x02, 8)
-SCIx_FNS(SCxTDR, 0x06, 8, 0x0c, 8, 0x06, 8, 0x0C, 8, 0x03, 8)
-SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8)
-SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8)
-SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16)
-SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
-SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
-
-#define sci_in(port, reg) sci_##reg##_in(port)
-#define sci_out(port, reg, value) sci_##reg##_out(port, value)
-
-/* H8/300 series SCI pins assignment */
-#if defined(__H8300H__) || defined(__H8300S__)
-static const struct __attribute__((packed))
-{
- int port; /* GPIO port no */
- unsigned short rx,tx; /* GPIO bit no */
-} h8300_sci_pins[] =
-{
-#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
- { /* SCI0 */
- .port = H8300_GPIO_P9,
- .rx = H8300_GPIO_B2,
- .tx = H8300_GPIO_B0,
- },
- { /* SCI1 */
- .port = H8300_GPIO_P9,
- .rx = H8300_GPIO_B3,
- .tx = H8300_GPIO_B1,
- },
- { /* SCI2 */
- .port = H8300_GPIO_PB,
- .rx = H8300_GPIO_B7,
- .tx = H8300_GPIO_B6,
- }
-#elif defined(CONFIG_H8S2678)
- { /* SCI0 */
- .port = H8300_GPIO_P3,
- .rx = H8300_GPIO_B2,
- .tx = H8300_GPIO_B0,
- },
- { /* SCI1 */
- .port = H8300_GPIO_P3,
- .rx = H8300_GPIO_B3,
- .tx = H8300_GPIO_B1,
- },
- { /* SCI2 */
- .port = H8300_GPIO_P5,
- .rx = H8300_GPIO_B1,
- .tx = H8300_GPIO_B0,
- }
-#endif
-};
-#endif
-
-#if defined(CONFIG_CPU_SUBTYPE_SH7708)
-static inline int sci_rxd_in(struct sci_port *port)
-{
- if (port->base == 0xfffffe80)
- return ctrl_inb(SCSPTR)&0x01 ? 1 : 0; /* SCI */
- return 1;
-}
-#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
-static inline int sci_rxd_in(struct sci_port *port)
-{
- if (port->base == 0xfffffe80)
- return ctrl_inb(SCPDR)&0x01 ? 1 : 0; /* SCI */
- if (port->base == 0xa4000150)
- return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
- if (port->base == 0xa4000140)
- return ctrl_inb(SCPDR)&0x04 ? 1 : 0; /* IRDA */
- return 1;
-}
-#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751)
-static inline int sci_rxd_in(struct sci_port *port)
-{
-#ifndef SCIF_ONLY
- if (port->base == 0xffe00000)
- return ctrl_inb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */
-#endif
-#ifndef SCI_ONLY
- if (port->base == 0xffe80000)
- return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
-#endif
- return 1;
-}
-#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
-static inline int sci_rxd_in(struct sci_port *port)
-{
- if (port->base == 0xfe600000)
- return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
- if (port->base == 0xfe610000)
- return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
- if (port->base == 0xfe620000)
- return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
-}
-#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
-static inline int sci_rxd_in(struct sci_port *port)
-{
- if (port->base == 0xffe00000)
- return ctrl_inw(SCSPTR1)&0x0001 ? 1 : 0; /* SCIF */
- else
- return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
-
-}
-#elif defined(__H8300H__) || defined(__H8300S__)
-static inline int sci_rxd_in(struct sci_port *port)
-{
- int ch = (port->base - SMR0) >> 3;
- return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0;
-}
-#endif
-
-/*
- * Values for the BitRate Register (SCBRR)
- *
- * The values are actually divisors for a frequency which can
- * be internal to the SH3 (14.7456MHz) or derived from an external
- * clock source. This driver assumes the internal clock is used;
- * to support using an external clock source, config options or
- * possibly command-line options would need to be added.
- *
- * Also, to support speeds below 2400 (why?) the lower 2 bits of
- * the SCSMR register would also need to be set to non-zero values.
- *
- * -- Greg Banks 27Feb2000
- *
- * Answer: The SCBRR register is only eight bits, and the value in
- * it gets larger with lower baud rates. At around 2400 (depending on
- * the peripherial module clock) you run out of bits. However the
- * lower two bits of SCSMR allow the module clock to be divided down,
- * scaling the value which is needed in SCBRR.
- *
- * -- Stuart Menefy - 23 May 2000
- *
- * I meant, why would anyone bother with bitrates below 2400.
- *
- * -- Greg Banks - 7Jul2000
- *
- * You "speedist"! How will I use my 110bps ASR-33 teletype with paper
- * tape reader as a console!
- *
- * -- Mitch Davis - 15 Jul 2000
- */
-
-#define PCLK (current_cpu_data.module_clock)
-
-#if !defined(__H8300H__) && !defined(__H8300S__)
-#define SCBRR_VALUE(bps) ((PCLK+16*bps)/(32*bps)-1)
-#else
-#define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1)
-#endif
-#define BPS_2400 SCBRR_VALUE(2400)
-#define BPS_4800 SCBRR_VALUE(4800)
-#define BPS_9600 SCBRR_VALUE(9600)
-#define BPS_19200 SCBRR_VALUE(19200)
-#define BPS_38400 SCBRR_VALUE(38400)
-#define BPS_57600 SCBRR_VALUE(57600)
-#define BPS_115200 SCBRR_VALUE(115200)
-#define BPS_230400 SCBRR_VALUE(230400)
-
+++ /dev/null
-/*
- * C-Brick Serial Port (and console) driver for SGI Altix machines.
- *
- * This driver is NOT suitable for talking to the l1-controller for
- * anything other than 'console activities' --- please use the l1
- * driver for that.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/config.h>
-#include <linux/interrupt.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/console.h>
-#include <linux/module.h>
-#include <linux/sysrq.h>
-#include <linux/circ_buf.h>
-#include <linux/serial_reg.h>
-#include <asm/uaccess.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/sn_sal.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/simulator.h>
-#include <asm/sn/sn2/sn_private.h>
-
-#if defined(CONFIG_SGI_L1_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
-static char sysrq_serial_str[] = "\eSYS";
-static char *sysrq_serial_ptr = sysrq_serial_str;
-static unsigned long sysrq_requested;
-#endif /* CONFIG_SGI_L1_SERIAL_CONSOLE && CONFIG_MAGIC_SYSRQ */
-
-/* minor device number */
-#define SN_SAL_MINOR 64
-
-/* number of characters left in xmit buffer before we ask for more */
-#define WAKEUP_CHARS 128
-
-/* number of characters we can transmit to the SAL console at a time */
-#define SN_SAL_MAX_CHARS 120
-
-#define SN_SAL_EVENT_WRITE_WAKEUP 0
-
-/* 64K, when we're asynch, it must be at least printk's LOG_BUF_LEN to
- * avoid losing chars, (always has to be a power of 2) */
-#define SN_SAL_BUFFER_SIZE (64 * (1 << 10))
-
-#define SN_SAL_UART_FIFO_DEPTH 16
-#define SN_SAL_UART_FIFO_SPEED_CPS 9600/10
-
-/* we don't kmalloc/get_free_page these as we want them available
- * before either of those are initialized */
-static char sn_xmit_buff_mem[SN_SAL_BUFFER_SIZE];
-
-struct volatile_circ_buf {
- char *cb_buf;
- int cb_head;
- int cb_tail;
-};
-
-static struct volatile_circ_buf xmit = { .cb_buf = sn_xmit_buff_mem };
-static char sn_tmp_buffer[SN_SAL_BUFFER_SIZE];
-
-static struct tty_struct *sn_sal_tty;
-
-static struct timer_list sn_sal_timer;
-static int sn_sal_event; /* event type for task queue */
-
-static int sn_sal_is_asynch;
-static int sn_sal_irq;
-static spinlock_t sn_sal_lock = SPIN_LOCK_UNLOCKED;
-static int sn_total_tx_count;
-static int sn_total_rx_count;
-
-static void sn_sal_tasklet_action(unsigned long data);
-static DECLARE_TASKLET(sn_sal_tasklet, sn_sal_tasklet_action, 0);
-
-static unsigned long sn_interrupt_timeout;
-
-extern u64 master_node_bedrock_address;
-
-#undef DEBUG
-#ifdef DEBUG
-static int sn_debug_printf(const char *fmt, ...);
-#define DPRINTF(x...) sn_debug_printf(x)
-#else
-#define DPRINTF(x...) do { } while (0)
-#endif
-
-struct sn_sal_ops {
- int (*sal_puts)(const char *s, int len);
- int (*sal_getc)(void);
- int (*sal_input_pending)(void);
- void (*sal_wakeup_transmit)(void);
-};
-
-/* This is the pointer used. It is assigned to point to one of
- * the tables below.
- */
-static struct sn_sal_ops *sn_func;
-
-/* Prototypes */
-static int snt_hw_puts(const char *, int);
-static int snt_poll_getc(void);
-static int snt_poll_input_pending(void);
-static int snt_sim_puts(const char *, int);
-static int snt_sim_getc(void);
-static int snt_sim_input_pending(void);
-static int snt_intr_getc(void);
-static int snt_intr_input_pending(void);
-static void sn_intr_transmit_chars(void);
-
-/* A table for polling */
-static struct sn_sal_ops poll_ops = {
- .sal_puts = snt_hw_puts,
- .sal_getc = snt_poll_getc,
- .sal_input_pending = snt_poll_input_pending
-};
-
-/* A table for the simulator */
-static struct sn_sal_ops sim_ops = {
- .sal_puts = snt_sim_puts,
- .sal_getc = snt_sim_getc,
- .sal_input_pending = snt_sim_input_pending
-};
-
-/* A table for interrupts enabled */
-static struct sn_sal_ops intr_ops = {
- .sal_puts = snt_hw_puts,
- .sal_getc = snt_intr_getc,
- .sal_input_pending = snt_intr_input_pending,
- .sal_wakeup_transmit = sn_intr_transmit_chars
-};
-
-
-/* the console does output in two distinctly different ways:
- * synchronous and asynchronous (buffered). initally, early_printk
- * does synchronous output. any data written goes directly to the SAL
- * to be output (incidentally, it is internally buffered by the SAL)
- * after interrupts and timers are initialized and available for use,
- * the console init code switches to asynchronous output. this is
- * also the earliest opportunity to begin polling for console input.
- * after console initialization, console output and tty (serial port)
- * output is buffered and sent to the SAL asynchronously (either by
- * timer callback or by UART interrupt) */
-
-
-/* routines for running the console in polling mode */
-
-static int
-snt_hw_puts(const char *s, int len)
-{
- /* looking at the PROM source code, putb calls the flush
- * routine, so if we send characters in FIFO sized chunks, it
- * should go out by the next time the timer gets called */
- return ia64_sn_console_putb(s, len);
-}
-
-static int
-snt_poll_getc(void)
-{
- int ch;
- ia64_sn_console_getc(&ch);
- return ch;
-}
-
-static int
-snt_poll_input_pending(void)
-{
- int status, input;
-
- status = ia64_sn_console_check(&input);
- return !status && input;
-}
-
-
-/* routines for running the console on the simulator */
-
-static int
-snt_sim_puts(const char *str, int count)
-{
- int counter = count;
-
-#ifdef FLAG_DIRECT_CONSOLE_WRITES
- /* This is an easy way to pre-pend the output to know whether the output
- * was done via sal or directly */
- writeb('[', master_node_bedrock_address + (UART_TX << 3));
- writeb('+', master_node_bedrock_address + (UART_TX << 3));
- writeb(']', master_node_bedrock_address + (UART_TX << 3));
- writeb(' ', master_node_bedrock_address + (UART_TX << 3));
-#endif /* FLAG_DIRECT_CONSOLE_WRITES */
- while (counter > 0) {
- writeb(*str, master_node_bedrock_address + (UART_TX << 3));
- counter--;
- str++;
- }
-
- return count;
-}
-
-static int
-snt_sim_getc(void)
-{
- return readb(master_node_bedrock_address + (UART_RX << 3));
-}
-
-static int
-snt_sim_input_pending(void)
-{
- return readb(master_node_bedrock_address + (UART_LSR << 3)) & UART_LSR_DR;
-}
-
-
-/* routines for an interrupt driven console (normal) */
-
-static int
-snt_intr_getc(void)
-{
- return ia64_sn_console_readc();
-}
-
-static int
-snt_intr_input_pending(void)
-{
- return ia64_sn_console_intr_status() & SAL_CONSOLE_INTR_RECV;
-}
-
-/* The early printk (possible setup) and function call */
-
-void
-early_printk_sn_sal(const char *s, unsigned count)
-{
- extern void early_sn_setup(void);
-
- if (!sn_func) {
- if (IS_RUNNING_ON_SIMULATOR())
- sn_func = &sim_ops;
- else
- sn_func = &poll_ops;
-
- early_sn_setup();
- }
- sn_func->sal_puts(s, count);
-}
-
-#ifdef DEBUG
-/* this is as "close to the metal" as we can get, used when the driver
- * itself may be broken */
-static int
-sn_debug_printf(const char *fmt, ...)
-{
- static char printk_buf[1024];
- int printed_len;
- va_list args;
-
- va_start(args, fmt);
- printed_len = vscnprintf(printk_buf, sizeof(printk_buf), fmt, args);
- early_printk_sn_sal(printk_buf, printed_len);
- va_end(args);
- return printed_len;
-}
-#endif /* DEBUG */
-
-/*
- * Interrupt handling routines.
- */
-
-static void
-sn_sal_sched_event(int event)
-{
- sn_sal_event |= (1 << event);
- tasklet_schedule(&sn_sal_tasklet);
-}
-
-/* sn_receive_chars can be called before sn_sal_tty is initialized. in
- * that case, its only use is to trigger sysrq and kdb */
-static void
-sn_receive_chars(struct pt_regs *regs, unsigned long *flags)
-{
- int ch;
-
- while (sn_func->sal_input_pending()) {
- ch = sn_func->sal_getc();
- if (ch < 0) {
- printk(KERN_ERR "sn_serial: An error occured while "
- "obtaining data from the console (0x%0x)\n", ch);
- break;
- }
-#if defined(CONFIG_SGI_L1_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
- if (sysrq_requested) {
- unsigned long sysrq_timeout = sysrq_requested + HZ*5;
-
- sysrq_requested = 0;
- if (ch && time_before(jiffies, sysrq_timeout)) {
- spin_unlock_irqrestore(&sn_sal_lock, *flags);
- handle_sysrq(ch, regs, NULL);
- spin_lock_irqsave(&sn_sal_lock, *flags);
- /* don't record this char */
- continue;
- }
- }
- if (ch == *sysrq_serial_ptr) {
- if (!(*++sysrq_serial_ptr)) {
- sysrq_requested = jiffies;
- sysrq_serial_ptr = sysrq_serial_str;
- }
- }
- else
- sysrq_serial_ptr = sysrq_serial_str;
-#endif /* CONFIG_SGI_L1_SERIAL_CONSOLE && CONFIG_MAGIC_SYSRQ */
-
- /* record the character to pass up to the tty layer */
- if (sn_sal_tty) {
- *sn_sal_tty->flip.char_buf_ptr = ch;
- sn_sal_tty->flip.char_buf_ptr++;
- sn_sal_tty->flip.count++;
- if (sn_sal_tty->flip.count == TTY_FLIPBUF_SIZE)
- break;
- }
- sn_total_rx_count++;
- }
-
- if (sn_sal_tty)
- tty_flip_buffer_push((struct tty_struct *)sn_sal_tty);
-}
-
-
-/* synch_flush_xmit must be called with sn_sal_lock */
-static void
-synch_flush_xmit(void)
-{
- int xmit_count, tail, head, loops, ii;
- int result;
- char *start;
-
- if (xmit.cb_head == xmit.cb_tail)
- return; /* Nothing to do. */
-
- head = xmit.cb_head;
- tail = xmit.cb_tail;
- start = &xmit.cb_buf[tail];
-
- /* twice around gets the tail to the end of the buffer and
- * then to the head, if needed */
- loops = (head < tail) ? 2 : 1;
-
- for (ii = 0; ii < loops; ii++) {
- xmit_count = (head < tail) ? (SN_SAL_BUFFER_SIZE - tail) : (head - tail);
-
- if (xmit_count > 0) {
- result = sn_func->sal_puts((char *)start, xmit_count);
- if (!result)
- DPRINTF("\n*** synch_flush_xmit failed to flush\n");
- if (result > 0) {
- xmit_count -= result;
- sn_total_tx_count += result;
- tail += result;
- tail &= SN_SAL_BUFFER_SIZE - 1;
- xmit.cb_tail = tail;
- start = (char *)&xmit.cb_buf[tail];
- }
- }
- }
-}
-
-/* must be called with a lock protecting the circular buffer and
- * sn_sal_tty */
-static void
-sn_poll_transmit_chars(void)
-{
- int xmit_count, tail, head;
- int result;
- char *start;
-
- BUG_ON(!sn_sal_is_asynch);
-
- if (xmit.cb_head == xmit.cb_tail ||
- (sn_sal_tty && (sn_sal_tty->stopped || sn_sal_tty->hw_stopped))) {
- /* Nothing to do. */
- return;
- }
-
- head = xmit.cb_head;
- tail = xmit.cb_tail;
- start = &xmit.cb_buf[tail];
-
- xmit_count = (head < tail) ? (SN_SAL_BUFFER_SIZE - tail) : (head - tail);
-
- if (xmit_count == 0)
- DPRINTF("\n*** empty xmit_count\n");
-
- /* use the ops, as we could be on the simulator */
- result = sn_func->sal_puts((char *)start, xmit_count);
- if (!result)
- DPRINTF("\n*** error in synchronous sal_puts\n");
- /* XXX chadt clean this up */
- if (result > 0) {
- xmit_count -= result;
- sn_total_tx_count += result;
- tail += result;
- tail &= SN_SAL_BUFFER_SIZE - 1;
- xmit.cb_tail = tail;
- start = &xmit.cb_buf[tail];
- }
-
- /* if there's few enough characters left in the xmit buffer
- * that we could stand for the upper layer to send us some
- * more, ask for it. */
- if (sn_sal_tty)
- if (CIRC_CNT(xmit.cb_head, xmit.cb_tail, SN_SAL_BUFFER_SIZE) < WAKEUP_CHARS)
- sn_sal_sched_event(SN_SAL_EVENT_WRITE_WAKEUP);
-}
-
-
-/* must be called with a lock protecting the circular buffer and
- * sn_sal_tty */
-static void
-sn_intr_transmit_chars(void)
-{
- int xmit_count, tail, head, loops, ii;
- int result;
- char *start;
-
- BUG_ON(!sn_sal_is_asynch);
-
- if (xmit.cb_head == xmit.cb_tail ||
- (sn_sal_tty && (sn_sal_tty->stopped || sn_sal_tty->hw_stopped))) {
- /* Nothing to do. */
- return;
- }
-
- head = xmit.cb_head;
- tail = xmit.cb_tail;
- start = &xmit.cb_buf[tail];
-
- /* twice around gets the tail to the end of the buffer and
- * then to the head, if needed */
- loops = (head < tail) ? 2 : 1;
-
- for (ii = 0; ii < loops; ii++) {
- xmit_count = (head < tail) ?
- (SN_SAL_BUFFER_SIZE - tail) : (head - tail);
-
- if (xmit_count > 0) {
- result = ia64_sn_console_xmit_chars((char *)start, xmit_count);
-#ifdef DEBUG
- if (!result)
- DPRINTF("`");
-#endif
- if (result > 0) {
- xmit_count -= result;
- sn_total_tx_count += result;
- tail += result;
- tail &= SN_SAL_BUFFER_SIZE - 1;
- xmit.cb_tail = tail;
- start = &xmit.cb_buf[tail];
- }
- }
- }
-
- /* if there's few enough characters left in the xmit buffer
- * that we could stand for the upper layer to send us some
- * more, ask for it. */
- if (sn_sal_tty)
- if (CIRC_CNT(xmit.cb_head, xmit.cb_tail, SN_SAL_BUFFER_SIZE) < WAKEUP_CHARS)
- sn_sal_sched_event(SN_SAL_EVENT_WRITE_WAKEUP);
-}
-
-
-static irqreturn_t
-sn_sal_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- /* this call is necessary to pass the interrupt back to the
- * SAL, since it doesn't intercept the UART interrupts
- * itself */
- int status = ia64_sn_console_intr_status();
- unsigned long flags;
-
- spin_lock_irqsave(&sn_sal_lock, flags);
- if (status & SAL_CONSOLE_INTR_RECV)
- sn_receive_chars(regs, &flags);
- if (status & SAL_CONSOLE_INTR_XMIT)
- sn_intr_transmit_chars();
- spin_unlock_irqrestore(&sn_sal_lock, flags);
- return IRQ_HANDLED;
-}
-
-
-/* returns the console irq if interrupt is successfully registered,
- * else 0 */
-static int
-sn_sal_connect_interrupt(void)
-{
- cpuid_t intr_cpuid;
- unsigned int intr_cpuloc;
- nasid_t console_nasid;
- unsigned int console_irq;
- int result;
-
- console_nasid = ia64_sn_get_console_nasid();
- intr_cpuid = first_cpu(node_to_cpumask(nasid_to_cnodeid(console_nasid)));
- intr_cpuloc = cpu_physical_id(intr_cpuid);
- console_irq = CPU_VECTOR_TO_IRQ(intr_cpuloc, SGI_UART_VECTOR);
-
- result = intr_connect_level(intr_cpuid, SGI_UART_VECTOR);
- BUG_ON(result != SGI_UART_VECTOR);
-
- result = request_irq(console_irq, sn_sal_interrupt, SA_INTERRUPT, "SAL console driver", &sn_sal_tty);
- if (result >= 0)
- return console_irq;
-
- printk(KERN_WARNING "sn_serial: console proceeding in polled mode\n");
- return 0;
-}
-
-static void
-sn_sal_tasklet_action(unsigned long data)
-{
- unsigned long flags;
-
- if (sn_sal_tty) {
- spin_lock_irqsave(&sn_sal_lock, flags);
- if (sn_sal_tty) {
- if (test_and_clear_bit(SN_SAL_EVENT_WRITE_WAKEUP, &sn_sal_event)) {
- if ((sn_sal_tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && sn_sal_tty->ldisc.write_wakeup)
- (sn_sal_tty->ldisc.write_wakeup)((struct tty_struct *)sn_sal_tty);
- wake_up_interruptible((wait_queue_head_t *)&sn_sal_tty->write_wait);
- }
- }
- spin_unlock_irqrestore(&sn_sal_lock, flags);
- }
-}
-
-
-/*
- * This function handles polled mode.
- */
-static void
-sn_sal_timer_poll(unsigned long dummy)
-{
- unsigned long flags;
-
- if (!sn_sal_irq) {
- spin_lock_irqsave(&sn_sal_lock, flags);
- sn_receive_chars(NULL, &flags);
- sn_poll_transmit_chars();
- spin_unlock_irqrestore(&sn_sal_lock, flags);
- mod_timer(&sn_sal_timer, jiffies + sn_interrupt_timeout);
- }
-}
-
-
-/*
- * User-level console routines
- */
-
-static int
-sn_sal_open(struct tty_struct *tty, struct file *filp)
-{
- unsigned long flags;
-
- DPRINTF("sn_sal_open: sn_sal_tty = %p, tty = %p, filp = %p\n",
- sn_sal_tty, tty, filp);
-
- spin_lock_irqsave(&sn_sal_lock, flags);
- if (!sn_sal_tty)
- sn_sal_tty = tty;
- spin_unlock_irqrestore(&sn_sal_lock, flags);
-
- return 0;
-}
-
-
-/* We're keeping all our resources. We're keeping interrupts turned
- * on. Maybe just let the tty layer finish its stuff...? GMSH
- */
-static void
-sn_sal_close(struct tty_struct *tty, struct file * filp)
-{
- if (tty->count == 1) {
- unsigned long flags;
- tty->closing = 1;
- if (tty->driver->flush_buffer)
- tty->driver->flush_buffer(tty);
- if (tty->ldisc.flush_buffer)
- tty->ldisc.flush_buffer(tty);
- tty->closing = 0;
- spin_lock_irqsave(&sn_sal_lock, flags);
- sn_sal_tty = NULL;
- spin_unlock_irqrestore(&sn_sal_lock, flags);
- }
-}
-
-
-static int
-sn_sal_write(struct tty_struct *tty, int from_user,
- const unsigned char *buf, int count)
-{
- int c, ret = 0;
- unsigned long flags;
-
- if (from_user) {
- while (1) {
- int c1;
- c = CIRC_SPACE_TO_END(xmit.cb_head, xmit.cb_tail,
- SN_SAL_BUFFER_SIZE);
-
- if (count < c)
- c = count;
- if (c <= 0)
- break;
-
- c -= copy_from_user(sn_tmp_buffer, buf, c);
- if (!c) {
- if (!ret)
- ret = -EFAULT;
- break;
- }
-
- /* Turn off interrupts and see if the xmit buffer has
- * moved since the last time we looked.
- */
- spin_lock_irqsave(&sn_sal_lock, flags);
- c1 = CIRC_SPACE_TO_END(xmit.cb_head, xmit.cb_tail, SN_SAL_BUFFER_SIZE);
-
- if (c1 < c)
- c = c1;
-
- memcpy(xmit.cb_buf + xmit.cb_head, sn_tmp_buffer, c);
- xmit.cb_head = ((xmit.cb_head + c) & (SN_SAL_BUFFER_SIZE - 1));
- spin_unlock_irqrestore(&sn_sal_lock, flags);
-
- buf += c;
- count -= c;
- ret += c;
- }
- }
- else {
- /* The buffer passed in isn't coming from userland,
- * so cut out the middleman (sn_tmp_buffer).
- */
- spin_lock_irqsave(&sn_sal_lock, flags);
- while (1) {
- c = CIRC_SPACE_TO_END(xmit.cb_head, xmit.cb_tail, SN_SAL_BUFFER_SIZE);
-
- if (count < c)
- c = count;
- if (c <= 0) {
- break;
- }
- memcpy(xmit.cb_buf + xmit.cb_head, buf, c);
- xmit.cb_head = ((xmit.cb_head + c) & (SN_SAL_BUFFER_SIZE - 1));
- buf += c;
- count -= c;
- ret += c;
- }
- spin_unlock_irqrestore(&sn_sal_lock, flags);
- }
-
- spin_lock_irqsave(&sn_sal_lock, flags);
- if (xmit.cb_head != xmit.cb_tail && !(tty && (tty->stopped || tty->hw_stopped)))
- if (sn_func->sal_wakeup_transmit)
- sn_func->sal_wakeup_transmit();
- spin_unlock_irqrestore(&sn_sal_lock, flags);
-
- return ret;
-}
-
-
-static void
-sn_sal_put_char(struct tty_struct *tty, unsigned char ch)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&sn_sal_lock, flags);
- if (CIRC_SPACE(xmit.cb_head, xmit.cb_tail, SN_SAL_BUFFER_SIZE) != 0) {
- xmit.cb_buf[xmit.cb_head] = ch;
- xmit.cb_head = (xmit.cb_head + 1) & (SN_SAL_BUFFER_SIZE-1);
- if ( sn_func->sal_wakeup_transmit )
- sn_func->sal_wakeup_transmit();
- }
- spin_unlock_irqrestore(&sn_sal_lock, flags);
-}
-
-
-static void
-sn_sal_flush_chars(struct tty_struct *tty)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&sn_sal_lock, flags);
- if (CIRC_CNT(xmit.cb_head, xmit.cb_tail, SN_SAL_BUFFER_SIZE))
- if (sn_func->sal_wakeup_transmit)
- sn_func->sal_wakeup_transmit();
- spin_unlock_irqrestore(&sn_sal_lock, flags);
-}
-
-
-static int
-sn_sal_write_room(struct tty_struct *tty)
-{
- unsigned long flags;
- int space;
-
- spin_lock_irqsave(&sn_sal_lock, flags);
- space = CIRC_SPACE(xmit.cb_head, xmit.cb_tail, SN_SAL_BUFFER_SIZE);
- spin_unlock_irqrestore(&sn_sal_lock, flags);
- return space;
-}
-
-
-static int
-sn_sal_chars_in_buffer(struct tty_struct *tty)
-{
- unsigned long flags;
- int space;
-
- spin_lock_irqsave(&sn_sal_lock, flags);
- space = CIRC_CNT(xmit.cb_head, xmit.cb_tail, SN_SAL_BUFFER_SIZE);
- DPRINTF("<%d>", space);
- spin_unlock_irqrestore(&sn_sal_lock, flags);
- return space;
-}
-
-
-static void
-sn_sal_flush_buffer(struct tty_struct *tty)
-{
- unsigned long flags;
-
- /* drop everything */
- spin_lock_irqsave(&sn_sal_lock, flags);
- xmit.cb_head = xmit.cb_tail = 0;
- spin_unlock_irqrestore(&sn_sal_lock, flags);
-
- /* wake up tty level */
- wake_up_interruptible(&tty->write_wait);
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
-}
-
-
-static void
-sn_sal_hangup(struct tty_struct *tty)
-{
- sn_sal_flush_buffer(tty);
-}
-
-
-static void
-sn_sal_wait_until_sent(struct tty_struct *tty, int timeout)
-{
- /* this is SAL's problem */
- DPRINTF("<sn_serial: should wait until sent>");
-}
-
-
-/*
- * sn_sal_read_proc
- *
- * Console /proc interface
- */
-
-static int
-sn_sal_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- int len = 0;
- off_t begin = 0;
-
- len += sprintf(page, "sn_serial: nasid:%ld irq:%d tx:%d rx:%d\n",
- ia64_sn_get_console_nasid(), sn_sal_irq,
- sn_total_tx_count, sn_total_rx_count);
- *eof = 1;
-
- if (off >= len+begin)
- return 0;
- *start = page + (off-begin);
-
- return count < begin+len-off ? count : begin+len-off;
-}
-
-
-static struct tty_operations sn_sal_driver_ops = {
- .open = sn_sal_open,
- .close = sn_sal_close,
- .write = sn_sal_write,
- .put_char = sn_sal_put_char,
- .flush_chars = sn_sal_flush_chars,
- .write_room = sn_sal_write_room,
- .chars_in_buffer = sn_sal_chars_in_buffer,
- .hangup = sn_sal_hangup,
- .wait_until_sent = sn_sal_wait_until_sent,
- .read_proc = sn_sal_read_proc,
-};
-static struct tty_driver *sn_sal_driver;
-
-/* sn_sal_init wishlist:
- * - allocate sn_tmp_buffer
- * - fix up the tty_driver struct
- * - turn on receive interrupts
- * - do any termios twiddling once and for all
- */
-
-/*
- * Boot-time initialization code
- */
-
-static void __init
-sn_sal_switch_to_asynch(void)
-{
- unsigned long flags;
-
- /* without early_printk, we may be invoked late enough to race
- * with other cpus doing console IO at this point, however
- * console interrupts will never be enabled */
- spin_lock_irqsave(&sn_sal_lock, flags);
-
- if (sn_sal_is_asynch) {
- spin_unlock_irqrestore(&sn_sal_lock, flags);
- return;
- }
-
- DPRINTF("sn_serial: switch to asynchronous console\n");
-
- /* early_printk invocation may have done this for us */
- if (!sn_func) {
- if (IS_RUNNING_ON_SIMULATOR())
- sn_func = &sim_ops;
- else
- sn_func = &poll_ops;
- }
-
- /* we can't turn on the console interrupt (as request_irq
- * calls kmalloc, which isn't set up yet), so we rely on a
- * timer to poll for input and push data from the console
- * buffer.
- */
- init_timer(&sn_sal_timer);
- sn_sal_timer.function = sn_sal_timer_poll;
-
- if (IS_RUNNING_ON_SIMULATOR())
- sn_interrupt_timeout = 6;
- else {
- /* 960cps / 16 char FIFO = 60HZ
- * HZ / (SN_SAL_FIFO_SPEED_CPS / SN_SAL_FIFO_DEPTH) */
- sn_interrupt_timeout = HZ * SN_SAL_UART_FIFO_DEPTH / SN_SAL_UART_FIFO_SPEED_CPS;
- }
- mod_timer(&sn_sal_timer, jiffies + sn_interrupt_timeout);
-
- sn_sal_is_asynch = 1;
- spin_unlock_irqrestore(&sn_sal_lock, flags);
-}
-
-static void __init
-sn_sal_switch_to_interrupts(void)
-{
- int irq;
-
- DPRINTF("sn_serial: switching to interrupt driven console\n");
-
- irq = sn_sal_connect_interrupt();
- if (irq) {
- unsigned long flags;
- spin_lock_irqsave(&sn_sal_lock, flags);
-
- /* sn_sal_irq is a global variable. When it's set to
- * a non-zero value, we stop polling for input (since
- * interrupts should now be enabled). */
- sn_sal_irq = irq;
- sn_func = &intr_ops;
-
- /* turn on receive interrupts */
- ia64_sn_console_intr_enable(SAL_CONSOLE_INTR_RECV);
- spin_unlock_irqrestore(&sn_sal_lock, flags);
- }
-}
-
-static int __init
-sn_sal_module_init(void)
-{
- int retval;
-
- DPRINTF("sn_serial: sn_sal_module_init\n");
-
- if (!ia64_platform_is("sn2"))
- return -ENODEV;
-
- sn_sal_driver = alloc_tty_driver(1);
- if ( !sn_sal_driver )
- return -ENOMEM;
-
- sn_sal_driver->owner = THIS_MODULE;
- sn_sal_driver->driver_name = "sn_serial";
- sn_sal_driver->name = "ttyS";
- sn_sal_driver->major = TTY_MAJOR;
- sn_sal_driver->minor_start = SN_SAL_MINOR;
- sn_sal_driver->type = TTY_DRIVER_TYPE_SERIAL;
- sn_sal_driver->subtype = SERIAL_TYPE_NORMAL;
- sn_sal_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
-
- tty_set_operations(sn_sal_driver, &sn_sal_driver_ops);
-
- /* when this driver is compiled in, the console initialization
- * will have already switched us into asynchronous operation
- * before we get here through the module initcalls */
- sn_sal_switch_to_asynch();
-
- /* at this point (module_init) we can try to turn on interrupts */
- if (!IS_RUNNING_ON_SIMULATOR())
- sn_sal_switch_to_interrupts();
-
- sn_sal_driver->init_termios = tty_std_termios;
- sn_sal_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
-
- if ((retval = tty_register_driver(sn_sal_driver))) {
- printk(KERN_ERR "sn_serial: Unable to register tty driver\n");
- return retval;
- }
- return 0;
-}
-
-
-static void __exit
-sn_sal_module_exit(void)
-{
- del_timer_sync(&sn_sal_timer);
- tty_unregister_driver(sn_sal_driver);
- put_tty_driver(sn_sal_driver);
-}
-
-module_init(sn_sal_module_init);
-module_exit(sn_sal_module_exit);
-
-/*
- * Kernel console definitions
- */
-
-#ifdef CONFIG_SGI_L1_SERIAL_CONSOLE
-/*
- * Print a string to the SAL console. The console_lock must be held
- * when we get here.
- */
-static void
-sn_sal_console_write(struct console *co, const char *s, unsigned count)
-{
- unsigned long flags;
- const char *s1;
-
- BUG_ON(!sn_sal_is_asynch);
-
- /* somebody really wants this output, might be an
- * oops, kdb, panic, etc. make sure they get it. */
- if (spin_is_locked(&sn_sal_lock)) {
- synch_flush_xmit();
- /* Output '\r' before each '\n' */
- while ((s1 = memchr(s, '\n', count)) != NULL) {
- sn_func->sal_puts(s, s1 - s);
- sn_func->sal_puts("\r\n", 2);
- count -= s1 + 1 - s;
- s = s1 + 1;
- }
- sn_func->sal_puts(s, count);
- }
- else if (in_interrupt()) {
- spin_lock_irqsave(&sn_sal_lock, flags);
- synch_flush_xmit();
- spin_unlock_irqrestore(&sn_sal_lock, flags);
- /* Output '\r' before each '\n' */
- while ((s1 = memchr(s, '\n', count)) != NULL) {
- sn_func->sal_puts(s, s1 - s);
- sn_func->sal_puts("\r\n", 2);
- count -= s1 + 1 - s;
- s = s1 + 1;
- }
- sn_func->sal_puts(s, count);
- }
- else {
- /* Output '\r' before each '\n' */
- while ((s1 = memchr(s, '\n', count)) != NULL) {
- sn_sal_write(NULL, 0, s, s1 - s);
- sn_sal_write(NULL, 0, "\r\n", 2);
- count -= s1 + 1 - s;
- s = s1 + 1;
- }
- sn_sal_write(NULL, 0, s, count);
- }
-}
-
-static struct tty_driver *
-sn_sal_console_device(struct console *c, int *index)
-{
- *index = c->index;
- return sn_sal_driver;
-}
-
-static int __init
-sn_sal_console_setup(struct console *co, char *options)
-{
- return 0;
-}
-
-
-static struct console sal_console = {
- .name = "ttyS",
- .write = sn_sal_console_write,
- .device = sn_sal_console_device,
- .setup = sn_sal_console_setup,
- .index = -1
-};
-
-static int __init
-sn_sal_serial_console_init(void)
-{
- if (ia64_platform_is("sn2")) {
- sn_sal_switch_to_asynch();
- DPRINTF("sn_sal_serial_console_init : register console\n");
- register_console(&sal_console);
- }
- return 0;
-}
-console_initcall(sn_sal_serial_console_init);
-
-#endif /* CONFIG_SGI_L1_SERIAL_CONSOLE */
+++ /dev/null
-/*
- * Sony Programmable I/O Control Device driver for VAIO
- *
- * Copyright (C) 2001-2004 Stelian Pop <stelian@popies.net>
- *
- * Copyright (C) 2001-2002 Alcôve <www.alcove.com>
- *
- * Copyright (C) 2001 Michael Ashley <m.ashley@unsw.edu.au>
- *
- * Copyright (C) 2001 Junichi Morita <jun1m@mars.dti.ne.jp>
- *
- * Copyright (C) 2000 Takaya Kinjo <t-kinjo@tc4.so-net.ne.jp>
- *
- * Copyright (C) 2000 Andrew Tridgell <tridge@valinux.com>
- *
- * Earlier work by Werner Almesberger, Paul `Rusty' Russell and Paul Mackerras.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#ifndef _SONYPI_PRIV_H_
-#define _SONYPI_PRIV_H_
-
-#ifdef __KERNEL__
-
-#define SONYPI_DRIVER_VERSION "1.25"
-
-#define SONYPI_DEVICE_MODEL_TYPE1 1
-#define SONYPI_DEVICE_MODEL_TYPE2 2
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/input.h>
-#include <linux/acpi.h>
-#include <linux/kfifo.h>
-#include <linux/sonypi.h>
-
-/* type1 models use those */
-#define SONYPI_IRQ_PORT 0x8034
-#define SONYPI_IRQ_SHIFT 22
-#define SONYPI_BASE 0x50
-#define SONYPI_G10A (SONYPI_BASE+0x14)
-#define SONYPI_TYPE1_REGION_SIZE 0x08
-#define SONYPI_TYPE1_EVTYPE_OFFSET 0x04
-
-/* type2 series specifics */
-#define SONYPI_SIRQ 0x9b
-#define SONYPI_SLOB 0x9c
-#define SONYPI_SHIB 0x9d
-#define SONYPI_TYPE2_REGION_SIZE 0x20
-#define SONYPI_TYPE2_EVTYPE_OFFSET 0x12
-
-/* battery / brightness addresses */
-#define SONYPI_BAT_FLAGS 0x81
-#define SONYPI_LCD_LIGHT 0x96
-#define SONYPI_BAT1_PCTRM 0xa0
-#define SONYPI_BAT1_LEFT 0xa2
-#define SONYPI_BAT1_MAXRT 0xa4
-#define SONYPI_BAT2_PCTRM 0xa8
-#define SONYPI_BAT2_LEFT 0xaa
-#define SONYPI_BAT2_MAXRT 0xac
-#define SONYPI_BAT1_MAXTK 0xb0
-#define SONYPI_BAT1_FULL 0xb2
-#define SONYPI_BAT2_MAXTK 0xb8
-#define SONYPI_BAT2_FULL 0xba
-
-/* ioports used for brightness and type2 events */
-#define SONYPI_DATA_IOPORT 0x62
-#define SONYPI_CST_IOPORT 0x66
-
-/* The set of possible ioports */
-struct sonypi_ioport_list {
- u16 port1;
- u16 port2;
-};
-
-static struct sonypi_ioport_list sonypi_type1_ioport_list[] = {
- { 0x10c0, 0x10c4 }, /* looks like the default on C1Vx */
- { 0x1080, 0x1084 },
- { 0x1090, 0x1094 },
- { 0x10a0, 0x10a4 },
- { 0x10b0, 0x10b4 },
- { 0x0, 0x0 }
-};
-
-static struct sonypi_ioport_list sonypi_type2_ioport_list[] = {
- { 0x1080, 0x1084 },
- { 0x10a0, 0x10a4 },
- { 0x10c0, 0x10c4 },
- { 0x10e0, 0x10e4 },
- { 0x0, 0x0 }
-};
-
-/* The set of possible interrupts */
-struct sonypi_irq_list {
- u16 irq;
- u16 bits;
-};
-
-static struct sonypi_irq_list sonypi_type1_irq_list[] = {
- { 11, 0x2 }, /* IRQ 11, GO22=0,GO23=1 in AML */
- { 10, 0x1 }, /* IRQ 10, GO22=1,GO23=0 in AML */
- { 5, 0x0 }, /* IRQ 5, GO22=0,GO23=0 in AML */
- { 0, 0x3 } /* no IRQ, GO22=1,GO23=1 in AML */
-};
-
-static struct sonypi_irq_list sonypi_type2_irq_list[] = {
- { 11, 0x80 }, /* IRQ 11, 0x80 in SIRQ in AML */
- { 10, 0x40 }, /* IRQ 10, 0x40 in SIRQ in AML */
- { 9, 0x20 }, /* IRQ 9, 0x20 in SIRQ in AML */
- { 6, 0x10 }, /* IRQ 6, 0x10 in SIRQ in AML */
- { 0, 0x00 } /* no IRQ, 0x00 in SIRQ in AML */
-};
-
-#define SONYPI_CAMERA_BRIGHTNESS 0
-#define SONYPI_CAMERA_CONTRAST 1
-#define SONYPI_CAMERA_HUE 2
-#define SONYPI_CAMERA_COLOR 3
-#define SONYPI_CAMERA_SHARPNESS 4
-
-#define SONYPI_CAMERA_PICTURE 5
-#define SONYPI_CAMERA_EXPOSURE_MASK 0xC
-#define SONYPI_CAMERA_WHITE_BALANCE_MASK 0x3
-#define SONYPI_CAMERA_PICTURE_MODE_MASK 0x30
-#define SONYPI_CAMERA_MUTE_MASK 0x40
-
-/* the rest don't need a loop until not 0xff */
-#define SONYPI_CAMERA_AGC 6
-#define SONYPI_CAMERA_AGC_MASK 0x30
-#define SONYPI_CAMERA_SHUTTER_MASK 0x7
-
-#define SONYPI_CAMERA_SHUTDOWN_REQUEST 7
-#define SONYPI_CAMERA_CONTROL 0x10
-
-#define SONYPI_CAMERA_STATUS 7
-#define SONYPI_CAMERA_STATUS_READY 0x2
-#define SONYPI_CAMERA_STATUS_POSITION 0x4
-
-#define SONYPI_DIRECTION_BACKWARDS 0x4
-
-#define SONYPI_CAMERA_REVISION 8
-#define SONYPI_CAMERA_ROMVERSION 9
-
-/* Event masks */
-#define SONYPI_JOGGER_MASK 0x00000001
-#define SONYPI_CAPTURE_MASK 0x00000002
-#define SONYPI_FNKEY_MASK 0x00000004
-#define SONYPI_BLUETOOTH_MASK 0x00000008
-#define SONYPI_PKEY_MASK 0x00000010
-#define SONYPI_BACK_MASK 0x00000020
-#define SONYPI_HELP_MASK 0x00000040
-#define SONYPI_LID_MASK 0x00000080
-#define SONYPI_ZOOM_MASK 0x00000100
-#define SONYPI_THUMBPHRASE_MASK 0x00000200
-#define SONYPI_MEYE_MASK 0x00000400
-#define SONYPI_MEMORYSTICK_MASK 0x00000800
-#define SONYPI_BATTERY_MASK 0x00001000
-
-struct sonypi_event {
- u8 data;
- u8 event;
-};
-
-/* The set of possible button release events */
-static struct sonypi_event sonypi_releaseev[] = {
- { 0x00, SONYPI_EVENT_ANYBUTTON_RELEASED },
- { 0, 0 }
-};
-
-/* The set of possible jogger events */
-static struct sonypi_event sonypi_joggerev[] = {
- { 0x1f, SONYPI_EVENT_JOGDIAL_UP },
- { 0x01, SONYPI_EVENT_JOGDIAL_DOWN },
- { 0x5f, SONYPI_EVENT_JOGDIAL_UP_PRESSED },
- { 0x41, SONYPI_EVENT_JOGDIAL_DOWN_PRESSED },
- { 0x1e, SONYPI_EVENT_JOGDIAL_FAST_UP },
- { 0x02, SONYPI_EVENT_JOGDIAL_FAST_DOWN },
- { 0x5e, SONYPI_EVENT_JOGDIAL_FAST_UP_PRESSED },
- { 0x42, SONYPI_EVENT_JOGDIAL_FAST_DOWN_PRESSED },
- { 0x1d, SONYPI_EVENT_JOGDIAL_VFAST_UP },
- { 0x03, SONYPI_EVENT_JOGDIAL_VFAST_DOWN },
- { 0x5d, SONYPI_EVENT_JOGDIAL_VFAST_UP_PRESSED },
- { 0x43, SONYPI_EVENT_JOGDIAL_VFAST_DOWN_PRESSED },
- { 0x40, SONYPI_EVENT_JOGDIAL_PRESSED },
- { 0, 0 }
-};
-
-/* The set of possible capture button events */
-static struct sonypi_event sonypi_captureev[] = {
- { 0x05, SONYPI_EVENT_CAPTURE_PARTIALPRESSED },
- { 0x07, SONYPI_EVENT_CAPTURE_PRESSED },
- { 0x01, SONYPI_EVENT_CAPTURE_PARTIALRELEASED },
- { 0, 0 }
-};
-
-/* The set of possible fnkeys events */
-static struct sonypi_event sonypi_fnkeyev[] = {
- { 0x10, SONYPI_EVENT_FNKEY_ESC },
- { 0x11, SONYPI_EVENT_FNKEY_F1 },
- { 0x12, SONYPI_EVENT_FNKEY_F2 },
- { 0x13, SONYPI_EVENT_FNKEY_F3 },
- { 0x14, SONYPI_EVENT_FNKEY_F4 },
- { 0x15, SONYPI_EVENT_FNKEY_F5 },
- { 0x16, SONYPI_EVENT_FNKEY_F6 },
- { 0x17, SONYPI_EVENT_FNKEY_F7 },
- { 0x18, SONYPI_EVENT_FNKEY_F8 },
- { 0x19, SONYPI_EVENT_FNKEY_F9 },
- { 0x1a, SONYPI_EVENT_FNKEY_F10 },
- { 0x1b, SONYPI_EVENT_FNKEY_F11 },
- { 0x1c, SONYPI_EVENT_FNKEY_F12 },
- { 0x1f, SONYPI_EVENT_FNKEY_RELEASED },
- { 0x21, SONYPI_EVENT_FNKEY_1 },
- { 0x22, SONYPI_EVENT_FNKEY_2 },
- { 0x31, SONYPI_EVENT_FNKEY_D },
- { 0x32, SONYPI_EVENT_FNKEY_E },
- { 0x33, SONYPI_EVENT_FNKEY_F },
- { 0x34, SONYPI_EVENT_FNKEY_S },
- { 0x35, SONYPI_EVENT_FNKEY_B },
- { 0x36, SONYPI_EVENT_FNKEY_ONLY },
- { 0, 0 }
-};
-
-/* The set of possible program key events */
-static struct sonypi_event sonypi_pkeyev[] = {
- { 0x01, SONYPI_EVENT_PKEY_P1 },
- { 0x02, SONYPI_EVENT_PKEY_P2 },
- { 0x04, SONYPI_EVENT_PKEY_P3 },
- { 0x5c, SONYPI_EVENT_PKEY_P1 },
- { 0, 0 }
-};
-
-/* The set of possible bluetooth events */
-static struct sonypi_event sonypi_blueev[] = {
- { 0x55, SONYPI_EVENT_BLUETOOTH_PRESSED },
- { 0x59, SONYPI_EVENT_BLUETOOTH_ON },
- { 0x5a, SONYPI_EVENT_BLUETOOTH_OFF },
- { 0, 0 }
-};
-
-/* The set of possible back button events */
-static struct sonypi_event sonypi_backev[] = {
- { 0x20, SONYPI_EVENT_BACK_PRESSED },
- { 0, 0 }
-};
-
-/* The set of possible help button events */
-static struct sonypi_event sonypi_helpev[] = {
- { 0x3b, SONYPI_EVENT_HELP_PRESSED },
- { 0, 0 }
-};
-
-
-/* The set of possible lid events */
-static struct sonypi_event sonypi_lidev[] = {
- { 0x51, SONYPI_EVENT_LID_CLOSED },
- { 0x50, SONYPI_EVENT_LID_OPENED },
- { 0, 0 }
-};
-
-/* The set of possible zoom events */
-static struct sonypi_event sonypi_zoomev[] = {
- { 0x39, SONYPI_EVENT_ZOOM_PRESSED },
- { 0, 0 }
-};
-
-/* The set of possible thumbphrase events */
-static struct sonypi_event sonypi_thumbphraseev[] = {
- { 0x3a, SONYPI_EVENT_THUMBPHRASE_PRESSED },
- { 0, 0 }
-};
-
-/* The set of possible motioneye camera events */
-static struct sonypi_event sonypi_meyeev[] = {
- { 0x00, SONYPI_EVENT_MEYE_FACE },
- { 0x01, SONYPI_EVENT_MEYE_OPPOSITE },
- { 0, 0 }
-};
-
-/* The set of possible memorystick events */
-static struct sonypi_event sonypi_memorystickev[] = {
- { 0x53, SONYPI_EVENT_MEMORYSTICK_INSERT },
- { 0x54, SONYPI_EVENT_MEMORYSTICK_EJECT },
- { 0, 0 }
-};
-
-/* The set of possible battery events */
-static struct sonypi_event sonypi_batteryev[] = {
- { 0x20, SONYPI_EVENT_BATTERY_INSERT },
- { 0x30, SONYPI_EVENT_BATTERY_REMOVE },
- { 0, 0 }
-};
-
-struct sonypi_eventtypes {
- int model;
- u8 data;
- unsigned long mask;
- struct sonypi_event * events;
-} sonypi_eventtypes[] = {
- { SONYPI_DEVICE_MODEL_TYPE1, 0, 0xffffffff, sonypi_releaseev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x70, SONYPI_MEYE_MASK, sonypi_meyeev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_LID_MASK, sonypi_lidev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x60, SONYPI_CAPTURE_MASK, sonypi_captureev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x10, SONYPI_JOGGER_MASK, sonypi_joggerev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x20, SONYPI_FNKEY_MASK, sonypi_fnkeyev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_BLUETOOTH_MASK, sonypi_blueev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x40, SONYPI_PKEY_MASK, sonypi_pkeyev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x30, SONYPI_MEMORYSTICK_MASK, sonypi_memorystickev },
- { SONYPI_DEVICE_MODEL_TYPE1, 0x40, SONYPI_BATTERY_MASK, sonypi_batteryev },
-
- { SONYPI_DEVICE_MODEL_TYPE2, 0, 0xffffffff, sonypi_releaseev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x38, SONYPI_LID_MASK, sonypi_lidev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x11, SONYPI_JOGGER_MASK, sonypi_joggerev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x61, SONYPI_CAPTURE_MASK, sonypi_captureev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_FNKEY_MASK, sonypi_fnkeyev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_BLUETOOTH_MASK, sonypi_blueev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x08, SONYPI_PKEY_MASK, sonypi_pkeyev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x11, SONYPI_BACK_MASK, sonypi_backev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x08, SONYPI_HELP_MASK, sonypi_helpev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x21, SONYPI_ZOOM_MASK, sonypi_zoomev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x20, SONYPI_THUMBPHRASE_MASK, sonypi_thumbphraseev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_MEMORYSTICK_MASK, sonypi_memorystickev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x41, SONYPI_BATTERY_MASK, sonypi_batteryev },
- { SONYPI_DEVICE_MODEL_TYPE2, 0x31, SONYPI_PKEY_MASK, sonypi_pkeyev },
-
- { 0 }
-};
-
-#define SONYPI_BUF_SIZE 128
-
-/* The name of the devices for the input device drivers */
-#define SONYPI_JOG_INPUTNAME "Sony Vaio Jogdial"
-#define SONYPI_KEY_INPUTNAME "Sony Vaio Keys"
-
-/* Correspondance table between sonypi events and input layer events */
-struct {
- int sonypiev;
- int inputev;
-} sonypi_inputkeys[] = {
- { SONYPI_EVENT_CAPTURE_PRESSED, KEY_CAMERA },
- { SONYPI_EVENT_FNKEY_ONLY, KEY_FN },
- { SONYPI_EVENT_FNKEY_ESC, KEY_FN_ESC },
- { SONYPI_EVENT_FNKEY_F1, KEY_FN_F1 },
- { SONYPI_EVENT_FNKEY_F2, KEY_FN_F2 },
- { SONYPI_EVENT_FNKEY_F3, KEY_FN_F3 },
- { SONYPI_EVENT_FNKEY_F4, KEY_FN_F4 },
- { SONYPI_EVENT_FNKEY_F5, KEY_FN_F5 },
- { SONYPI_EVENT_FNKEY_F6, KEY_FN_F6 },
- { SONYPI_EVENT_FNKEY_F7, KEY_FN_F7 },
- { SONYPI_EVENT_FNKEY_F8, KEY_FN_F8 },
- { SONYPI_EVENT_FNKEY_F9, KEY_FN_F9 },
- { SONYPI_EVENT_FNKEY_F10, KEY_FN_F10 },
- { SONYPI_EVENT_FNKEY_F11, KEY_FN_F11 },
- { SONYPI_EVENT_FNKEY_F12, KEY_FN_F12 },
- { SONYPI_EVENT_FNKEY_1, KEY_FN_1 },
- { SONYPI_EVENT_FNKEY_2, KEY_FN_2 },
- { SONYPI_EVENT_FNKEY_D, KEY_FN_D },
- { SONYPI_EVENT_FNKEY_E, KEY_FN_E },
- { SONYPI_EVENT_FNKEY_F, KEY_FN_F },
- { SONYPI_EVENT_FNKEY_S, KEY_FN_S },
- { SONYPI_EVENT_FNKEY_B, KEY_FN_B },
- { SONYPI_EVENT_BLUETOOTH_PRESSED, KEY_BLUE },
- { SONYPI_EVENT_BLUETOOTH_ON, KEY_BLUE },
- { SONYPI_EVENT_PKEY_P1, KEY_PROG1 },
- { SONYPI_EVENT_PKEY_P2, KEY_PROG2 },
- { SONYPI_EVENT_PKEY_P3, KEY_PROG3 },
- { SONYPI_EVENT_BACK_PRESSED, KEY_BACK },
- { SONYPI_EVENT_HELP_PRESSED, KEY_HELP },
- { SONYPI_EVENT_ZOOM_PRESSED, KEY_ZOOM },
- { SONYPI_EVENT_THUMBPHRASE_PRESSED, BTN_THUMB },
- { 0, 0 },
-};
-
-struct sonypi_device {
- struct pci_dev *dev;
- struct platform_device *pdev;
- u16 irq;
- u16 bits;
- u16 ioport1;
- u16 ioport2;
- u16 region_size;
- u16 evtype_offset;
- int camera_power;
- int bluetooth_power;
- struct semaphore lock;
- struct kfifo *fifo;
- spinlock_t fifo_lock;
- wait_queue_head_t fifo_proc_list;
- struct fasync_struct *fifo_async;
- int open_count;
- int model;
- struct input_dev input_jog_dev;
- struct input_dev input_key_dev;
- struct work_struct input_work;
- struct kfifo *input_fifo;
- spinlock_t input_fifo_lock;
-};
-
-#define ITERATIONS_LONG 10000
-#define ITERATIONS_SHORT 10
-
-#define wait_on_command(quiet, command, iterations) { \
- unsigned int n = iterations; \
- while (--n && (command)) \
- udelay(1); \
- if (!n && (verbose || !quiet)) \
- printk(KERN_WARNING "sonypi command failed at %s : %s (line %d)\n", __FILE__, __FUNCTION__, __LINE__); \
-}
-
-#ifdef CONFIG_ACPI
-#define SONYPI_ACPI_ACTIVE (!acpi_disabled)
-#else
-#define SONYPI_ACPI_ACTIVE 0
-#endif /* CONFIG_ACPI */
-
-#endif /* __KERNEL__ */
-
-#endif /* _SONYPI_PRIV_H_ */
+++ /dev/null
-/*
- * NEC PC-9800 Real Time Clock interface for Linux
- *
- * Copyright (C) 1997-2001 Linux/98 project,
- * Kyoto University Microcomputer Club.
- *
- * Based on:
- * drivers/char/rtc.c by Paul Gortmaker
- *
- * Changes:
- * 2001-02-09 Call check_region on rtc_init and do not request I/O 0033h.
- * Call del_timer and release_region on rtc_exit. -- tak
- * 2001-07-14 Rewrite <linux/upd4990a.h> and split to <linux/upd4990a.h>
- * and <asm-i386/upd4990a.h>.
- * Introduce a lot of spin_lock/unlock (&rtc_lock).
- */
-
-#define RTC98_VERSION "1.2"
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/miscdevice.h>
-#include <linux/ioport.h>
-#include <linux/fcntl.h>
-#include <linux/rtc.h>
-#include <linux/bcd.h>
-#include <linux/upd4990a.h>
-#include <linux/init.h>
-#include <linux/poll.h>
-#include <linux/proc_fs.h>
-#include <linux/spinlock.h>
-
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-/*
- * We sponge a minor off of the misc major. No need slurping
- * up another valuable major dev number for this. If you add
- * an ioctl, make sure you don't conflict with SPARC's RTC
- * ioctls.
- */
-
-static struct fasync_struct *rtc_async_queue;
-
-static DECLARE_WAIT_QUEUE_HEAD(rtc_wait);
-
-static struct timer_list rtc_uie_timer;
-static u8 old_refclk;
-
-static int rtc_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg);
-
-static int rtc_read_proc(char *page, char **start, off_t off,
- int count, int *eof, void *data);
-
-/*
- * Bits in rtc_status. (5 bits of room for future expansion)
- */
-
-#define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
-#define RTC_TIMER_ON 0x02 /* not used */
-#define RTC_UIE_TIMER_ON 0x04 /* UIE emulation timer is active */
-
-/*
- * rtc_status is never changed by rtc_interrupt, and ioctl/open/close is
- * protected by the big kernel lock. However, ioctl can still disable the timer
- * in rtc_status and then with del_timer after the interrupt has read
- * rtc_status but before mod_timer is called, which would then reenable the
- * timer (but you would need to have an awful timing before you'd trip on it)
- */
-static unsigned char rtc_status; /* bitmapped status byte. */
-static unsigned long rtc_irq_data; /* our output to the world */
-
-static const unsigned char days_in_mo[] =
-{31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
-
-extern spinlock_t rtc_lock; /* defined in arch/i386/kernel/time.c */
-
-static void rtc_uie_intr(unsigned long data)
-{
- u8 refclk, tmp;
-
- /* Kernel timer does del_timer internally before calling
- each timer entry, so this is unnecessary.
- del_timer(&rtc_uie_timer); */
- spin_lock(&rtc_lock);
-
- /* Detect rising edge of 1Hz reference clock. */
- refclk = UPD4990A_READ_DATA();
- tmp = old_refclk & refclk;
- old_refclk = ~refclk;
- if (!(tmp & 1))
- rtc_irq_data += 0x100;
-
- spin_unlock(&rtc_lock);
-
- if (!(tmp & 1)) {
- /* Now do the rest of the actions */
- wake_up_interruptible(&rtc_wait);
- kill_fasync(&rtc_async_queue, SIGIO, POLL_IN);
- }
-
- rtc_uie_timer.expires = jiffies + 1;
- add_timer(&rtc_uie_timer);
-}
-
-/*
- * Now all the various file operations that we export.
- */
-
-static ssize_t rtc_read(struct file *file, char *buf,
- size_t count, loff_t *ppos)
-{
- DECLARE_WAITQUEUE(wait, current);
- unsigned long data;
- ssize_t retval = 0;
-
- if (count < sizeof(unsigned long))
- return -EINVAL;
-
- add_wait_queue(&rtc_wait, &wait);
-
- set_current_state(TASK_INTERRUPTIBLE);
-
- do {
- /* First make it right. Then make it fast. Putting this whole
- * block within the parentheses of a while would be too
- * confusing. And no, xchg() is not the answer. */
- spin_lock_irq(&rtc_lock);
- data = rtc_irq_data;
- rtc_irq_data = 0;
- spin_unlock_irq(&rtc_lock);
-
- if (data != 0)
- break;
- if (file->f_flags & O_NONBLOCK) {
- retval = -EAGAIN;
- goto out;
- }
- if (signal_pending(current)) {
- retval = -ERESTARTSYS;
- goto out;
- }
- schedule();
- } while (1);
-
- retval = put_user(data, (unsigned long *)buf);
- if (!retval)
- retval = sizeof(unsigned long);
- out:
- set_current_state(TASK_RUNNING);
- remove_wait_queue(&rtc_wait, &wait);
-
- return retval;
-}
-
-static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- struct rtc_time wtime;
- struct upd4990a_raw_data raw;
-
- switch (cmd) {
- case RTC_UIE_OFF: /* Mask ints from RTC updates. */
- spin_lock_irq(&rtc_lock);
- if (rtc_status & RTC_UIE_TIMER_ON) {
- rtc_status &= ~RTC_UIE_TIMER_ON;
- del_timer(&rtc_uie_timer);
- }
- spin_unlock_irq(&rtc_lock);
- return 0;
-
- case RTC_UIE_ON: /* Allow ints for RTC updates. */
- spin_lock_irq(&rtc_lock);
- rtc_irq_data = 0;
- if (!(rtc_status & RTC_UIE_TIMER_ON)) {
- rtc_status |= RTC_UIE_TIMER_ON;
- rtc_uie_timer.expires = jiffies + 1;
- add_timer(&rtc_uie_timer);
- }
- /* Just in case... */
- upd4990a_serial_command(UPD4990A_REGISTER_HOLD);
- old_refclk = ~UPD4990A_READ_DATA();
- spin_unlock_irq(&rtc_lock);
- return 0;
-
- case RTC_RD_TIME: /* Read the time/date from RTC */
- spin_lock_irq(&rtc_lock);
- upd4990a_get_time(&raw, 0);
- spin_unlock_irq(&rtc_lock);
-
- wtime.tm_sec = BCD2BIN(raw.sec);
- wtime.tm_min = BCD2BIN(raw.min);
- wtime.tm_hour = BCD2BIN(raw.hour);
- wtime.tm_mday = BCD2BIN(raw.mday);
- wtime.tm_mon = raw.mon - 1; /* convert to 0-base */
- wtime.tm_wday = raw.wday;
-
- /*
- * Account for differences between how the RTC uses the values
- * and how they are defined in a struct rtc_time;
- */
- if ((wtime.tm_year = BCD2BIN(raw.year)) < 95)
- wtime.tm_year += 100;
-
- wtime.tm_isdst = 0;
- break;
-
- case RTC_SET_TIME: /* Set the RTC */
- {
- int leap_yr;
-
- if (!capable(CAP_SYS_TIME))
- return -EACCES;
-
- if (copy_from_user(&wtime, (struct rtc_time *) arg,
- sizeof (struct rtc_time)))
- return -EFAULT;
-
- /* Valid year is 1995 - 2094, inclusive. */
- if (wtime.tm_year < 95 || wtime.tm_year > 194)
- return -EINVAL;
-
- if (wtime.tm_mon > 11 || wtime.tm_mday == 0)
- return -EINVAL;
-
- /* For acceptable year domain (1995 - 2094),
- this IS sufficient. */
- leap_yr = !(wtime.tm_year % 4);
-
- if (wtime.tm_mday > (days_in_mo[wtime.tm_mon]
- + (wtime.tm_mon == 2 && leap_yr)))
- return -EINVAL;
-
- if (wtime.tm_hour >= 24
- || wtime.tm_min >= 60 || wtime.tm_sec >= 60)
- return -EINVAL;
-
- if (wtime.tm_wday > 6)
- return -EINVAL;
-
- raw.sec = BIN2BCD(wtime.tm_sec);
- raw.min = BIN2BCD(wtime.tm_min);
- raw.hour = BIN2BCD(wtime.tm_hour);
- raw.mday = BIN2BCD(wtime.tm_mday);
- raw.mon = wtime.tm_mon + 1;
- raw.wday = wtime.tm_wday;
- raw.year = BIN2BCD(wtime.tm_year % 100);
-
- spin_lock_irq(&rtc_lock);
- upd4990a_set_time(&raw, 0);
- spin_unlock_irq(&rtc_lock);
-
- return 0;
- }
- default:
- return -EINVAL;
- }
- return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0;
-}
-
-/*
- * We enforce only one user at a time here with the open/close.
- * Also clear the previous interrupt data on an open, and clean
- * up things on a close.
- */
-
-static int rtc_open(struct inode *inode, struct file *file)
-{
- spin_lock_irq(&rtc_lock);
-
- if(rtc_status & RTC_IS_OPEN)
- goto out_busy;
-
- rtc_status |= RTC_IS_OPEN;
-
- rtc_irq_data = 0;
- spin_unlock_irq(&rtc_lock);
- return 0;
-
- out_busy:
- spin_unlock_irq(&rtc_lock);
- return -EBUSY;
-}
-
-static int rtc_fasync(int fd, struct file *filp, int on)
-{
- return fasync_helper(fd, filp, on, &rtc_async_queue);
-}
-
-static int rtc_release(struct inode *inode, struct file *file)
-{
- del_timer(&rtc_uie_timer);
-
- if (file->f_flags & FASYNC)
- rtc_fasync(-1, file, 0);
-
- rtc_irq_data = 0;
-
- /* No need for locking -- nobody else can do anything until this rmw is
- * committed, and no timer is running. */
- rtc_status &= ~(RTC_IS_OPEN | RTC_UIE_TIMER_ON);
- return 0;
-}
-
-static unsigned int rtc_poll(struct file *file, poll_table *wait)
-{
- unsigned long l;
-
- poll_wait(file, &rtc_wait, wait);
-
- spin_lock_irq(&rtc_lock);
- l = rtc_irq_data;
- spin_unlock_irq(&rtc_lock);
-
- if (l != 0)
- return POLLIN | POLLRDNORM;
- return 0;
-}
-
-/*
- * The various file operations we support.
- */
-
-static struct file_operations rtc_fops = {
- .owner = THIS_MODULE,
- .read = rtc_read,
- .poll = rtc_poll,
- .ioctl = rtc_ioctl,
- .open = rtc_open,
- .release = rtc_release,
- .fasync = rtc_fasync,
-};
-
-static struct miscdevice rtc_dev=
-{
- .minor = RTC_MINOR,
- .name = "rtc",
- .fops = &rtc_fops,
-};
-
-static int __init rtc_init(void)
-{
- int err = 0;
-
- if (!request_region(UPD4990A_IO, 1, "rtc")) {
- printk(KERN_ERR "upd4990a: could not acquire I/O port %#x\n",
- UPD4990A_IO);
- return -EBUSY;
- }
-
- err = misc_register(&rtc_dev);
- if (err) {
- printk(KERN_ERR "upd4990a: can't misc_register() on minor=%d\n",
- RTC_MINOR);
- release_region(UPD4990A_IO, 1);
- return err;
- }
-
-#if 0
- printk(KERN_INFO "\xB6\xDA\xDD\xC0\xDE \xC4\xDE\xB9\xB2 Driver\n"); /* Calender Clock Driver */
-#else
- printk(KERN_INFO
- "Real Time Clock driver for NEC PC-9800 v" RTC98_VERSION "\n");
-#endif
- create_proc_read_entry("driver/rtc", 0, NULL, rtc_read_proc, NULL);
-
- init_timer(&rtc_uie_timer);
- rtc_uie_timer.function = rtc_uie_intr;
-
- return 0;
-}
-
-module_init (rtc_init);
-
-static void __exit rtc_exit(void)
-{
- del_timer(&rtc_uie_timer);
- release_region(UPD4990A_IO, 1);
- remove_proc_entry("driver/rtc", NULL);
- misc_deregister(&rtc_dev);
-}
-
-module_exit (rtc_exit);
-
-/*
- * Info exported via "/proc/driver/rtc".
- */
-
-static inline int rtc_get_status(char *buf)
-{
- char *p;
- unsigned int year;
- struct upd4990a_raw_data data;
-
- p = buf;
-
- upd4990a_get_time(&data, 0);
-
- /*
- * There is no way to tell if the luser has the RTC set for local
- * time or for Universal Standard Time (GMT). Probably local though.
- */
- if ((year = BCD2BIN(data.year) + 1900) < 1995)
- year += 100;
- p += sprintf(p,
- "rtc_time\t: %02d:%02d:%02d\n"
- "rtc_date\t: %04d-%02d-%02d\n",
- BCD2BIN(data.hour), BCD2BIN(data.min),
- BCD2BIN(data.sec),
- year, data.mon, BCD2BIN(data.mday));
-
- return p - buf;
-}
-
-static int rtc_read_proc(char *page, char **start, off_t off,
- int count, int *eof, void *data)
-{
- int len = rtc_get_status(page);
-
- if (len <= off + count)
- *eof = 1;
- *start = page + off;
- len -= off;
- if (len > count)
- len = count;
- if (len < 0)
- len = 0;
- return len;
-}
+++ /dev/null
-/*
- * drivers/i2c/i2c-adap-ixp42x.c
- *
- * Intel's IXP42x XScale NPU chipsets (IXP420, 421, 422, 425) do not have
- * an on board I2C controller but provide 16 GPIO pins that are often
- * used to create an I2C bus. This driver provides an i2c_adapter
- * interface that plugs in under algo_bit and drives the GPIO pins
- * as instructed by the alogorithm driver.
- *
- * Author: Deepak Saxena <dsaxena@plexity.net>
- *
- * Copyright (c) 2003-2004 MontaVista Software Inc.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- *
- * NOTE: Since different platforms will use different GPIO pins for
- * I2C, this driver uses an IXP42x-specific platform_data
- * pointer to pass the GPIO numbers to the driver. This
- * allows us to support all the different IXP42x platforms
- * w/o having to put #ifdefs in this driver.
- *
- * See arch/arm/mach-ixp42x/ixdp425.c for an example of building a
- * device list and filling in the ixp42x_i2c_pins data structure
- * that is passed as the platform_data to this driver.
- */
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/module.h>
-#include <linux/i2c.h>
-
-#include <asm/hardware.h> /* Pick up IXP42x-specific bits */
-
-static inline int ixp42x_scl_pin(void *data)
-{
- return ((struct ixp42x_i2c_pins*)data)->scl_pin;
-}
-
-static inline int ixp42x_sda_pin(void *data)
-{
- return ((struct ixp42x_i2c_pins*)data)->sda_pin;
-}
-
-static void ixp42x_bit_setscl(void *data, int val)
-{
- gpio_line_set(ixp42x_scl_pin(data), 0);
- gpio_line_config(ixp42x_scl_pin(data),
- val ? IXP425_GPIO_IN : IXP425_GPIO_OUT );
-}
-
-static void ixp42x_bit_setsda(void *data, int val)
-{
- gpio_line_set(ixp42x_sda_pin(data), 0);
- gpio_line_config(ixp42x_sda_pin(data),
- val ? IXP425_GPIO_IN : IXP425_GPIO_OUT );
-}
-
-static int ixp42x_bit_getscl(void *data)
-{
- int scl;
-
- gpio_line_config(ixp42x_scl_pin(data), IXP425_GPIO_IN );
- gpio_line_get(ixp42x_scl_pin(data), &scl);
-
- return scl;
-}
-
-static int ixp42x_bit_getsda(void *data)
-{
- int sda;
-
- gpio_line_config(ixp42x_sda_pin(data), IXP425_GPIO_IN );
- gpio_line_get(ixp42x_sda_pin(data), &sda);
-
- return sda;
-}
-
-struct ixp42x_i2c_data {
- struct ixp42x_i2c_pins *gpio_pins;
- struct i2c_adapter adapter;
- struct i2c_algo_bit_data algo_data;
-};
-
-static int ixp42x_i2c_remove(struct device *dev)
-{
- struct platform_device *plat_dev = to_platform_device(dev);
- struct ixp42x_i2c_data *drv_data = dev_get_drvdata(&plat_dev->dev);
-
- dev_set_drvdata(&plat_dev->dev, NULL);
-
- i2c_bit_del_bus(&drv_data->adapter);
-
- kfree(drv_data);
-
- return 0;
-}
-
-static int ixp42x_i2c_probe(struct device *dev)
-{
- int err;
- struct platform_device *plat_dev = to_platform_device(dev);
- struct ixp42x_i2c_pins *gpio = plat_dev->dev.platform_data;
- struct ixp42x_i2c_data *drv_data =
- kmalloc(sizeof(struct ixp42x_i2c_data), GFP_KERNEL);
-
- if(!drv_data)
- return -ENOMEM;
-
- memzero(drv_data, sizeof(struct ixp42x_i2c_data));
- drv_data->gpio_pins = gpio;
-
- /*
- * We could make a lot of these structures static, but
- * certain platforms may have multiple GPIO-based I2C
- * buses for various device domains, so we need per-device
- * algo_data->data.
- */
- drv_data->algo_data.data = gpio;
- drv_data->algo_data.setsda = ixp42x_bit_setsda;
- drv_data->algo_data.setscl = ixp42x_bit_setscl;
- drv_data->algo_data.getsda = ixp42x_bit_getsda;
- drv_data->algo_data.getscl = ixp42x_bit_getscl;
- drv_data->algo_data.udelay = 10;
- drv_data->algo_data.mdelay = 10;
- drv_data->algo_data.timeout = 100;
-
- drv_data->adapter.id = I2C_HW_B_IXP425,
- drv_data->adapter.algo_data = &drv_data->algo_data,
-
- drv_data->adapter.dev.parent = &plat_dev->dev;
-
- gpio_line_config(gpio->scl_pin, IXP425_GPIO_IN);
- gpio_line_config(gpio->sda_pin, IXP425_GPIO_IN);
- gpio_line_set(gpio->scl_pin, 0);
- gpio_line_set(gpio->sda_pin, 0);
-
- if ((err = i2c_bit_add_bus(&drv_data->adapter) != 0)) {
- printk(KERN_ERR "ERROR: Could not install %s\n", dev->bus_id);
-
- kfree(drv_data);
- return err;
- }
-
- dev_set_drvdata(&plat_dev->dev, drv_data);
-
- return 0;
-}
-
-static struct device_driver ixp42x_i2c_driver = {
- .name = "IXP42X-I2C",
- .bus = &platform_bus_type,
- .probe = ixp42x_i2c_probe,
- .remove = ixp42x_i2c_remove,
-};
-
-static int __init ixp42x_i2c_init(void)
-{
- return driver_register(&ixp42x_i2c_driver);
-}
-
-static void __exit ixp42x_i2c_exit(void)
-{
- driver_unregister(&ixp42x_i2c_driver);
-}
-
-module_init(ixp42x_i2c_init);
-module_exit(ixp42x_i2c_exit);
-
-MODULE_DESCRIPTION("GPIO-based I2C driver for IXP42x systems");
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net>");
-
+++ /dev/null
-/*
- i2c-sensor.c - Part of lm_sensors, Linux kernel modules for hardware
- monitoring
- Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl> and
- Mark D. Studebaker <mdsxyz123@yahoo.com>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/ctype.h>
-#include <linux/sysctl.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/i2c.h>
-#include <linux/i2c-sensor.h>
-#include <asm/uaccess.h>
-
-
-/* Very inefficient for ISA detects, and won't work for 10-bit addresses! */
-int i2c_detect(struct i2c_adapter *adapter,
- struct i2c_address_data *address_data,
- int (*found_proc) (struct i2c_adapter *, int, int))
-{
- int addr, i, found, j, err;
- struct i2c_force_data *this_force;
- int is_isa = i2c_is_isa_adapter(adapter);
- int adapter_id =
- is_isa ? ANY_I2C_ISA_BUS : i2c_adapter_id(adapter);
-
- /* Forget it if we can't probe using SMBUS_QUICK */
- if ((!is_isa) &&
- !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_QUICK))
- return -1;
-
- for (addr = 0x00; addr <= (is_isa ? 0xffff : 0x7f); addr++) {
- if (!is_isa && i2c_check_addr(adapter, addr))
- continue;
-
- /* If it is in one of the force entries, we don't do any
- detection at all */
- found = 0;
- for (i = 0; !found && (this_force = address_data->forces + i, this_force->force); i++) {
- for (j = 0; !found && (this_force->force[j] != I2C_CLIENT_END); j += 2) {
- if ( ((adapter_id == this_force->force[j]) ||
- ((this_force->force[j] == ANY_I2C_BUS) && !is_isa)) &&
- (addr == this_force->force[j + 1]) ) {
- dev_dbg(&adapter->dev, "found force parameter for adapter %d, addr %04x\n", adapter_id, addr);
- if ((err = found_proc(adapter, addr, this_force->kind)))
- return err;
- found = 1;
- }
- }
- }
- if (found)
- continue;
-
- /* If this address is in one of the ignores, we can forget about it
- right now */
- for (i = 0; !found && (address_data->ignore[i] != I2C_CLIENT_END); i += 2) {
- if ( ((adapter_id == address_data->ignore[i]) ||
- ((address_data->ignore[i] == ANY_I2C_BUS) &&
- !is_isa)) &&
- (addr == address_data->ignore[i + 1])) {
- dev_dbg(&adapter->dev, "found ignore parameter for adapter %d, addr %04x\n", adapter_id, addr);
- found = 1;
- }
- }
- for (i = 0; !found && (address_data->ignore_range[i] != I2C_CLIENT_END); i += 3) {
- if ( ((adapter_id == address_data->ignore_range[i]) ||
- ((address_data-> ignore_range[i] == ANY_I2C_BUS) &
- !is_isa)) &&
- (addr >= address_data->ignore_range[i + 1]) &&
- (addr <= address_data->ignore_range[i + 2])) {
- dev_dbg(&adapter->dev, "found ignore_range parameter for adapter %d, addr %04x\n", adapter_id, addr);
- found = 1;
- }
- }
- if (found)
- continue;
-
- /* Now, we will do a detection, but only if it is in the normal or
- probe entries */
- if (is_isa) {
- for (i = 0; !found && (address_data->normal_isa[i] != I2C_CLIENT_ISA_END); i += 1) {
- if (addr == address_data->normal_isa[i]) {
- dev_dbg(&adapter->dev, "found normal isa entry for adapter %d, addr %04x\n", adapter_id, addr);
- found = 1;
- }
- }
- for (i = 0; !found && (address_data->normal_isa_range[i] != I2C_CLIENT_ISA_END); i += 3) {
- if ((addr >= address_data->normal_isa_range[i]) &&
- (addr <= address_data->normal_isa_range[i + 1]) &&
- ((addr - address_data->normal_isa_range[i]) % address_data->normal_isa_range[i + 2] == 0)) {
- dev_dbg(&adapter->dev, "found normal isa_range entry for adapter %d, addr %04x", adapter_id, addr);
- found = 1;
- }
- }
- } else {
- for (i = 0; !found && (address_data->normal_i2c[i] != I2C_CLIENT_END); i += 1) {
- if (addr == address_data->normal_i2c[i]) {
- found = 1;
- dev_dbg(&adapter->dev, "found normal i2c entry for adapter %d, addr %02x", adapter_id, addr);
- }
- }
- for (i = 0; !found && (address_data->normal_i2c_range[i] != I2C_CLIENT_END); i += 2) {
- if ((addr >= address_data->normal_i2c_range[i]) &&
- (addr <= address_data->normal_i2c_range[i + 1])) {
- dev_dbg(&adapter->dev, "found normal i2c_range entry for adapter %d, addr %04x\n", adapter_id, addr);
- found = 1;
- }
- }
- }
-
- for (i = 0;
- !found && (address_data->probe[i] != I2C_CLIENT_END);
- i += 2) {
- if (((adapter_id == address_data->probe[i]) ||
- ((address_data->
- probe[i] == ANY_I2C_BUS) && !is_isa))
- && (addr == address_data->probe[i + 1])) {
- dev_dbg(&adapter->dev, "found probe parameter for adapter %d, addr %04x\n", adapter_id, addr);
- found = 1;
- }
- }
- for (i = 0; !found && (address_data->probe_range[i] != I2C_CLIENT_END); i += 3) {
- if ( ((adapter_id == address_data->probe_range[i]) ||
- ((address_data->probe_range[i] == ANY_I2C_BUS) && !is_isa)) &&
- (addr >= address_data->probe_range[i + 1]) &&
- (addr <= address_data->probe_range[i + 2])) {
- found = 1;
- dev_dbg(&adapter->dev, "found probe_range parameter for adapter %d, addr %04x\n", adapter_id, addr);
- }
- }
- if (!found)
- continue;
-
- /* OK, so we really should examine this address. First check
- whether there is some client here at all! */
- if (is_isa ||
- (i2c_smbus_xfer (adapter, addr, 0, 0, 0, I2C_SMBUS_QUICK, NULL) >= 0))
- if ((err = found_proc(adapter, addr, -1)))
- return err;
- }
- return 0;
-}
-
-EXPORT_SYMBOL(i2c_detect);
-
-MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>");
-MODULE_DESCRIPTION("i2c-sensor driver");
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * Copyright (C) 2001, 2002 Jens Axboe <axboe@suse.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-/*
- * Support for the DMA queued protocol, which enables ATA disk drives to
- * use tagged command queueing.
- */
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/ide.h>
-
-#include <asm/io.h>
-#include <asm/delay.h>
-
-/*
- * warning: it will be _very_ verbose if defined
- */
-#undef IDE_TCQ_DEBUG
-
-#ifdef IDE_TCQ_DEBUG
-#define TCQ_PRINTK printk
-#else
-#define TCQ_PRINTK(x...)
-#endif
-
-/*
- * use nIEN or not
- */
-#undef IDE_TCQ_NIEN
-
-/*
- * we are leaving the SERVICE interrupt alone, IBM drives have it
- * on per default and it can't be turned off. Doesn't matter, this
- * is the sane config.
- */
-#undef IDE_TCQ_FIDDLE_SI
-
-/*
- * bad drive blacklist, for drives that raport tcq capability but don't
- * work reliably with the default config. initially from freebsd table.
- */
-struct ide_tcq_blacklist {
- char *model;
- char works;
- unsigned int max_sectors;
-};
-
-static struct ide_tcq_blacklist ide_tcq_blacklist[] = {
- {
- .model = "IBM-DTTA",
- .works = 1,
- .max_sectors = 128,
- },
- {
- .model = "IBM-DJNA",
- .works = 0,
- },
- {
- .model = "WDC AC",
- .works = 0,
- },
- {
- .model = NULL,
- },
-};
-
-ide_startstop_t ide_dmaq_intr(ide_drive_t *drive);
-ide_startstop_t ide_service(ide_drive_t *drive);
-
-static struct ide_tcq_blacklist *ide_find_drive_blacklist(ide_drive_t *drive)
-{
- struct ide_tcq_blacklist *itb;
- int i = 0;
-
- do {
- itb = &ide_tcq_blacklist[i];
-
- if (!itb->model)
- break;
-
- if (!strncmp(drive->id->model, itb->model, strlen(itb->model)))
- return itb;
-
- i++;
- } while (1);
-
- return NULL;
-}
-
-static inline void drive_ctl_nien(ide_drive_t *drive, int set)
-{
-#ifdef IDE_TCQ_NIEN
- if (IDE_CONTROL_REG) {
- int mask = set ? 0x02 : 0x00;
-
- hwif->OUTB(drive->ctl | mask, IDE_CONTROL_REG);
- }
-#endif
-}
-
-static ide_startstop_t ide_tcq_nop_handler(ide_drive_t *drive)
-{
- ide_task_t *args = HWGROUP(drive)->rq->special;
- ide_hwif_t *hwif = HWIF(drive);
- int auto_poll_check = 0;
- u8 stat, err;
-
- if (args->tfRegister[IDE_FEATURE_OFFSET] & 0x01)
- auto_poll_check = 1;
-
- local_irq_enable();
-
- stat = hwif->INB(IDE_STATUS_REG);
- err = hwif->INB(IDE_ERROR_REG);
- ide_end_drive_cmd(drive, stat, err);
-
- /*
- * do taskfile and check ABRT bit -- intelligent adapters will not
- * pass NOP with sub-code 0x01 to device, so the command will not
- * fail there
- */
- if (auto_poll_check) {
- if (!(args->tfRegister[IDE_FEATURE_OFFSET] & ABRT_ERR)) {
- HWIF(drive)->auto_poll = 1;
- printk("%s: NOP Auto-poll enabled\n",HWIF(drive)->name);
- }
- }
-
- kfree(args);
- return ide_stopped;
-}
-
-/*
- * if we encounter _any_ error doing I/O to one of the tags, we must
- * invalidate the pending queue. clear the software busy queue and requeue
- * on the request queue for restart. issue a WIN_NOP to clear hardware queue
- */
-static void ide_tcq_invalidate_queue(ide_drive_t *drive)
-{
- ide_hwgroup_t *hwgroup = HWGROUP(drive);
- request_queue_t *q = drive->queue;
- struct request *rq;
- unsigned long flags;
-
- printk("%s: invalidating tag queue (%d commands)\n", drive->name, ata_pending_commands(drive));
-
- /*
- * first kill timer and block queue
- */
- spin_lock_irqsave(&ide_lock, flags);
-
- del_timer(&hwgroup->timer);
-
- if (HWIF(drive)->dma)
- HWIF(drive)->ide_dma_end(drive);
-
- blk_queue_invalidate_tags(q);
-
- drive->using_tcq = 0;
- drive->queue_depth = 1;
- hwgroup->busy = 0;
- hwgroup->handler = NULL;
-
- spin_unlock_irqrestore(&ide_lock, flags);
-
- /*
- * now kill hardware queue with a NOP
- */
- rq = &hwgroup->wrq;
- ide_init_drive_cmd(rq);
- rq->buffer = hwgroup->cmd_buf;
- memset(rq->buffer, 0, sizeof(hwgroup->cmd_buf));
- rq->buffer[0] = WIN_NOP;
- ide_do_drive_cmd(drive, rq, ide_preempt);
-}
-
-void ide_tcq_intr_timeout(unsigned long data)
-{
- ide_drive_t *drive = (ide_drive_t *) data;
- ide_hwgroup_t *hwgroup = HWGROUP(drive);
- ide_hwif_t *hwif = HWIF(drive);
- unsigned long flags;
-
- printk(KERN_ERR "ide_tcq_intr_timeout: timeout waiting for %s interrupt\n", hwgroup->rq ? "completion" : "service");
-
- spin_lock_irqsave(&ide_lock, flags);
-
- if (!hwgroup->busy)
- printk(KERN_ERR "ide_tcq_intr_timeout: hwgroup not busy\n");
- if (hwgroup->handler == NULL)
- printk(KERN_ERR "ide_tcq_intr_timeout: missing isr!\n");
-
- hwgroup->busy = 1;
- spin_unlock_irqrestore(&ide_lock, flags);
-
- /*
- * if pending commands, try service before giving up
- */
- if (ata_pending_commands(drive)) {
- u8 stat = hwif->INB(IDE_STATUS_REG);
-
- if ((stat & SRV_STAT) && (ide_service(drive) == ide_started))
- return;
- }
-
- if (drive)
- ide_tcq_invalidate_queue(drive);
-}
-
-void __ide_tcq_set_intr(ide_hwgroup_t *hwgroup, ide_handler_t *handler)
-{
- /*
- * always just bump the timer for now, the timeout handling will
- * have to be changed to be per-command
- */
- hwgroup->timer.function = ide_tcq_intr_timeout;
- hwgroup->timer.data = (unsigned long) hwgroup->drive;
- mod_timer(&hwgroup->timer, jiffies + 5 * HZ);
-
- hwgroup->handler = handler;
-}
-
-void ide_tcq_set_intr(ide_hwgroup_t *hwgroup, ide_handler_t *handler)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&ide_lock, flags);
- __ide_tcq_set_intr(hwgroup, handler);
- spin_unlock_irqrestore(&ide_lock, flags);
-}
-
-/*
- * wait 400ns, then poll for busy_mask to clear from alt status
- */
-#define IDE_TCQ_WAIT (10000)
-int ide_tcq_wait_altstat(ide_drive_t *drive, byte *stat, byte busy_mask)
-{
- ide_hwif_t *hwif = HWIF(drive);
- int i = 0;
-
- udelay(1);
-
- do {
- *stat = hwif->INB(IDE_ALTSTATUS_REG);
-
- if (!(*stat & busy_mask))
- break;
-
- if (unlikely(i++ > IDE_TCQ_WAIT))
- return 1;
-
- udelay(10);
- } while (1);
-
- return 0;
-}
-
-/*
- * issue SERVICE command to drive -- drive must have been selected first,
- * and it must have reported a need for service (status has SRV_STAT set)
- *
- * Also, nIEN must be set as not to need protection against ide_dmaq_intr
- */
-ide_startstop_t ide_service(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = HWIF(drive);
- unsigned long flags;
- struct request *rq;
- byte feat, stat;
- int tag;
-
- TCQ_PRINTK("%s: started service\n", drive->name);
-
- /*
- * could be called with IDE_DMA in-progress from invalidate
- * handler, refuse to do anything
- */
- if (hwif->dma)
- return ide_stopped;
-
- /*
- * need to select the right drive first...
- */
- if (drive != HWGROUP(drive)->drive) {
- SELECT_DRIVE(drive);
- udelay(10);
- }
-
- drive_ctl_nien(drive, 1);
-
- /*
- * send SERVICE, wait 400ns, wait for BUSY_STAT to clear
- */
- hwif->OUTB(WIN_QUEUED_SERVICE, IDE_COMMAND_REG);
-
- if (ide_tcq_wait_altstat(drive, &stat, BUSY_STAT)) {
- printk(KERN_ERR "ide_service: BUSY clear took too long\n");
- ide_dump_status(drive, "ide_service", stat);
- ide_tcq_invalidate_queue(drive);
- return ide_stopped;
- }
-
- drive_ctl_nien(drive, 0);
-
- /*
- * FIXME, invalidate queue
- */
- if (stat & ERR_STAT) {
- ide_dump_status(drive, "ide_service", stat);
- ide_tcq_invalidate_queue(drive);
- return ide_stopped;
- }
-
- /*
- * should not happen, a buggy device could introduce loop
- */
- feat = hwif->INB(IDE_NSECTOR_REG);
- if (feat & REL) {
- HWGROUP(drive)->rq = NULL;
- printk(KERN_ERR "%s: release in service\n", drive->name);
- return ide_stopped;
- }
-
- tag = feat >> 3;
-
- TCQ_PRINTK("ide_service: stat %x, feat %x\n", stat, feat);
-
- spin_lock_irqsave(&ide_lock, flags);
-
- if ((rq = blk_queue_find_tag(drive->queue, tag))) {
- HWGROUP(drive)->rq = rq;
-
- /*
- * we'll start a dma read or write, device will trigger
- * interrupt to indicate end of transfer, release is not
- * allowed
- */
- TCQ_PRINTK("ide_service: starting command, stat=%x\n", stat);
- spin_unlock_irqrestore(&ide_lock, flags);
- return __ide_dma_queued_start(drive);
- }
-
- printk(KERN_ERR "ide_service: missing request for tag %d\n", tag);
- spin_unlock_irqrestore(&ide_lock, flags);
- return ide_stopped;
-}
-
-ide_startstop_t ide_check_service(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = HWIF(drive);
- byte stat;
-
- TCQ_PRINTK("%s: ide_check_service\n", drive->name);
-
- if (!ata_pending_commands(drive))
- return ide_stopped;
-
- stat = hwif->INB(IDE_STATUS_REG);
- if (stat & SRV_STAT)
- return ide_service(drive);
-
- /*
- * we have pending commands, wait for interrupt
- */
- TCQ_PRINTK("%s: wait for service interrupt\n", drive->name);
- ide_tcq_set_intr(HWGROUP(drive), ide_dmaq_intr);
- return ide_started;
-}
-
-ide_startstop_t ide_dmaq_complete(ide_drive_t *drive, struct request *rq, byte stat)
-{
- byte dma_stat;
-
- /*
- * transfer was in progress, stop DMA engine
- */
- dma_stat = HWIF(drive)->ide_dma_end(drive);
-
- /*
- * must be end of I/O, check status and complete as necessary
- */
- if (unlikely(!OK_STAT(stat, READY_STAT, drive->bad_wstat | DRQ_STAT))) {
- printk(KERN_ERR "ide_dmaq_intr: %s: error status %x\n",drive->name,stat);
- ide_dump_status(drive, "ide_dmaq_complete", stat);
- ide_tcq_invalidate_queue(drive);
- return ide_stopped;
- }
-
- if (dma_stat)
- printk(KERN_WARNING "%s: bad DMA status (dma_stat=%x)\n", drive->name, dma_stat);
-
- TCQ_PRINTK("ide_dmaq_complete: ending %p, tag %d\n", rq, rq->tag);
- ide_end_request(drive, 1, rq->nr_sectors);
-
- /*
- * we completed this command, check if we can service a new command
- */
- return ide_check_service(drive);
-}
-
-/*
- * intr handler for queued dma operations. this can be entered for two
- * reasons:
- *
- * 1) device has completed dma transfer
- * 2) service request to start a command
- *
- * if the drive has an active tag, we first complete that request before
- * processing any pending SERVICE.
- */
-ide_startstop_t ide_dmaq_intr(ide_drive_t *drive)
-{
- struct request *rq = HWGROUP(drive)->rq;
- ide_hwif_t *hwif = HWIF(drive);
- byte stat = hwif->INB(IDE_STATUS_REG);
-
- TCQ_PRINTK("ide_dmaq_intr: stat=%x\n", stat);
-
- /*
- * if a command completion interrupt is pending, do that first and
- * check service afterwards
- */
- if (rq) {
- TCQ_PRINTK("ide_dmaq_intr: completion\n");
- return ide_dmaq_complete(drive, rq, stat);
- }
-
- /*
- * service interrupt
- */
- if (stat & SRV_STAT) {
- TCQ_PRINTK("ide_dmaq_intr: SERV (stat=%x)\n", stat);
- return ide_service(drive);
- }
-
- printk("ide_dmaq_intr: stat=%x, not expected\n", stat);
- return ide_check_service(drive);
-}
-
-/*
- * check if the ata adapter this drive is attached to supports the
- * NOP auto-poll for multiple tcq enabled drives on one channel
- */
-static int ide_tcq_check_autopoll(ide_drive_t *drive)
-{
- ide_task_t *args;
- int i, drives;
-
- /*
- * only need to probe if both drives on a channel support tcq
- */
- for (i = 0, drives = 0; i < MAX_DRIVES; i++)
- if (HWIF(drive)->drives[i].present && drive->media == ide_disk)
- drives++;
-
- if (drives <= 1)
- return 0;
-
- /*
- * what a mess...
- */
- args = kmalloc(sizeof(*args), GFP_ATOMIC);
- if (!args)
- return 1;
-
- memset(args, 0, sizeof(*args));
-
- args->tfRegister[IDE_FEATURE_OFFSET] = 0x01;
- args->tfRegister[IDE_COMMAND_OFFSET] = WIN_NOP;
- args->command_type = IDE_DRIVE_TASK_NO_DATA;
- args->handler = ide_tcq_nop_handler;
- return ide_raw_taskfile(drive, args, NULL);
-}
-
-/*
- * configure the drive for tcq
- */
-static int ide_tcq_configure(ide_drive_t *drive)
-{
- int tcq_mask = 1 << 1 | 1 << 14;
- int tcq_bits = tcq_mask | 1 << 15;
- ide_task_t *args;
-
- /*
- * bit 14 and 1 must be set in word 83 of the device id to indicate
- * support for dma queued protocol, and bit 15 must be cleared
- */
- if ((drive->id->command_set_2 & tcq_bits) ^ tcq_mask) {
- printk(KERN_INFO "%s: TCQ not supported\n", drive->name);
- return -EIO;
- }
-
- args = kmalloc(sizeof(*args), GFP_ATOMIC);
- if (!args)
- return -ENOMEM;
-
- memset(args, 0, sizeof(ide_task_t));
- args->tfRegister[IDE_COMMAND_OFFSET] = WIN_SETFEATURES;
- args->tfRegister[IDE_FEATURE_OFFSET] = SETFEATURES_EN_WCACHE;
- args->command_type = IDE_DRIVE_TASK_NO_DATA;
- args->handler = &task_no_data_intr;
-
- if (ide_raw_taskfile(drive, args, NULL)) {
- printk(KERN_WARNING "%s: failed to enable write cache\n", drive->name);
- goto err;
- }
-
- /*
- * disable RELease interrupt, it's quicker to poll this after
- * having sent the command opcode
- */
- memset(args, 0, sizeof(ide_task_t));
- args->tfRegister[IDE_COMMAND_OFFSET] = WIN_SETFEATURES;
- args->tfRegister[IDE_FEATURE_OFFSET] = SETFEATURES_DIS_RI;
- args->command_type = IDE_DRIVE_TASK_NO_DATA;
- args->handler = &task_no_data_intr;
-
- if (ide_raw_taskfile(drive, args, NULL)) {
- printk(KERN_ERR "%s: disabling release interrupt fail\n", drive->name);
- goto err;
- }
-
-#ifdef IDE_TCQ_FIDDLE_SI
- /*
- * enable SERVICE interrupt
- */
- memset(args, 0, sizeof(ide_task_t));
- args->tfRegister[IDE_COMMAND_OFFSET] = WIN_SETFEATURES;
- args->tfRegister[IDE_FEATURE_OFFSET] = SETFEATURES_EN_SI;
- args->command_type = IDE_DRIVE_TASK_NO_DATA;
- args->handler = &task_no_data_intr;
-
- if (ide_raw_taskfile(drive, args, NULL)) {
- printk(KERN_ERR "%s: enabling service interrupt fail\n", drive->name);
- goto err;
- }
-#endif
-
- kfree(args);
- return 0;
-err:
- kfree(args);
- return -EIO;
-}
-
-/*
- * for now assume that command list is always as big as we need and don't
- * attempt to shrink it on tcq disable
- */
-static int ide_enable_queued(ide_drive_t *drive, int on)
-{
- struct ide_tcq_blacklist *itb;
- int depth = drive->using_tcq ? drive->queue_depth : 0;
-
- /*
- * disable or adjust queue depth
- */
- if (!on) {
- if (drive->using_tcq)
- printk(KERN_INFO "%s: TCQ disabled\n", drive->name);
-
- drive->using_tcq = 0;
- return 0;
- }
-
- if (ide_tcq_configure(drive)) {
- drive->using_tcq = 0;
- return 1;
- }
-
- /*
- * some drives need limited transfer size in tcq
- */
- itb = ide_find_drive_blacklist(drive);
- if (itb && itb->max_sectors) {
- if (itb->max_sectors > HWIF(drive)->rqsize)
- itb->max_sectors = HWIF(drive)->rqsize;
-
- blk_queue_max_sectors(drive->queue, itb->max_sectors);
- }
-
- /*
- * enable block tagging
- */
- if (!blk_queue_tagged(drive->queue))
- blk_queue_init_tags(drive->queue, IDE_MAX_TAG, NULL);
-
- /*
- * check auto-poll support
- */
- ide_tcq_check_autopoll(drive);
-
- if (depth != drive->queue_depth)
- printk(KERN_INFO "%s: tagged command queueing enabled, command queue depth %d\n", drive->name, drive->queue_depth);
-
- drive->using_tcq = 1;
- return 0;
-}
-
-int ide_tcq_wait_dataphase(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = HWIF(drive);
- byte stat;
- int i;
-
- do {
- stat = hwif->INB(IDE_STATUS_REG);
- if (!(stat & BUSY_STAT))
- break;
-
- udelay(10);
- } while (1);
-
- if (OK_STAT(stat, READY_STAT | DRQ_STAT, drive->bad_wstat))
- return 0;
-
- i = 0;
- udelay(1);
- do {
- stat = hwif->INB(IDE_STATUS_REG);
-
- if (OK_STAT(stat, READY_STAT | DRQ_STAT, drive->bad_wstat))
- break;
-
- ++i;
- if (unlikely(i >= IDE_TCQ_WAIT))
- return 1;
-
- udelay(10);
- } while (1);
-
- return 0;
-}
-
-static int ide_tcq_check_blacklist(ide_drive_t *drive)
-{
- struct ide_tcq_blacklist *itb = ide_find_drive_blacklist(drive);
-
- if (!itb)
- return 0;
-
- return !itb->works;
-}
-
-int __ide_dma_queued_on(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = HWIF(drive);
-
- if (drive->media != ide_disk)
- return 1;
- if (!drive->using_dma)
- return 1;
- if (hwif->chipset == ide_pdc4030)
- return 1;
- if (ide_tcq_check_blacklist(drive)) {
- printk(KERN_WARNING "%s: tcq forbidden by blacklist\n",
- drive->name);
- return 1;
- }
- if (hwif->drives[0].present && hwif->drives[1].present) {
- printk(KERN_WARNING "%s: only one drive on a channel supported"
- " for tcq\n", drive->name);
- return 1;
- }
- if (ata_pending_commands(drive)) {
- printk(KERN_WARNING "ide-tcq; can't toggle tcq feature on "
- "busy drive\n");
- return 1;
- }
-
- return ide_enable_queued(drive, 1);
-}
-
-int __ide_dma_queued_off(ide_drive_t *drive)
-{
- if (drive->media != ide_disk)
- return 1;
- if (ata_pending_commands(drive)) {
- printk("ide-tcq; can't toggle tcq feature on busy drive\n");
- return 1;
- }
-
- return ide_enable_queued(drive, 0);
-}
-
-static ide_startstop_t ide_dma_queued_rw(ide_drive_t *drive, u8 command)
-{
- ide_hwif_t *hwif = HWIF(drive);
- unsigned long flags;
- byte stat, feat;
-
- TCQ_PRINTK("%s: starting tag\n", drive->name);
-
- /*
- * set nIEN, tag start operation will enable again when
- * it is safe
- */
- drive_ctl_nien(drive, 1);
-
- TCQ_PRINTK("%s: sending cmd=%x\n", drive->name, command);
- hwif->OUTB(command, IDE_COMMAND_REG);
-
- if (ide_tcq_wait_altstat(drive, &stat, BUSY_STAT)) {
- printk("%s: alt stat timeout\n", drive->name);
- goto err;
- }
-
- drive_ctl_nien(drive, 0);
-
- if (stat & ERR_STAT)
- goto err;
-
- /*
- * bus not released, start dma
- */
- feat = hwif->INB(IDE_NSECTOR_REG);
- if (!(feat & REL)) {
- TCQ_PRINTK("IMMED in queued_start, feat=%x\n", feat);
- return __ide_dma_queued_start(drive);
- }
-
- /*
- * drive released the bus, clear active request and check for service
- */
- spin_lock_irqsave(&ide_lock, flags);
- HWGROUP(drive)->rq = NULL;
- __ide_tcq_set_intr(HWGROUP(drive), ide_dmaq_intr);
- spin_unlock_irqrestore(&ide_lock, flags);
-
- TCQ_PRINTK("REL in queued_start\n");
-
- stat = hwif->INB(IDE_STATUS_REG);
- if (stat & SRV_STAT)
- return ide_service(drive);
-
- return ide_released;
-err:
- ide_dump_status(drive, "rw_queued", stat);
- ide_tcq_invalidate_queue(drive);
- return ide_stopped;
-}
-
-ide_startstop_t __ide_dma_queued_read(ide_drive_t *drive)
-{
- u8 command = WIN_READDMA_QUEUED;
-
- if (drive->addressing == 1)
- command = WIN_READDMA_QUEUED_EXT;
-
- return ide_dma_queued_rw(drive, command);
-}
-
-ide_startstop_t __ide_dma_queued_write(ide_drive_t *drive)
-{
- u8 command = WIN_WRITEDMA_QUEUED;
-
- if (drive->addressing == 1)
- command = WIN_WRITEDMA_QUEUED_EXT;
-
- return ide_dma_queued_rw(drive, command);
-}
-
-ide_startstop_t __ide_dma_queued_start(ide_drive_t *drive)
-{
- ide_hwgroup_t *hwgroup = HWGROUP(drive);
- struct request *rq = hwgroup->rq;
- ide_hwif_t *hwif = HWIF(drive);
- unsigned int reading = 0;
-
- TCQ_PRINTK("ide_dma: setting up queued tag=%d\n", rq->tag);
-
- if (!hwgroup->busy)
- printk(KERN_ERR "queued_rw: hwgroup not busy\n");
-
- if (ide_tcq_wait_dataphase(drive)) {
- printk(KERN_WARNING "timeout waiting for data phase\n");
- return ide_stopped;
- }
-
- if (rq_data_dir(rq) == READ)
- reading = 1 << 3;
-
- if (ide_start_dma(hwif, drive, reading))
- return ide_stopped;
-
- ide_tcq_set_intr(hwgroup, ide_dmaq_intr);
-
- if (!hwif->ide_dma_begin(drive))
- return ide_started;
-
- return ide_stopped;
-}
+++ /dev/null
-/*
- * Copyright (C) 1991, 1992 Linus Torvalds
- *
- * This is the low-level hd interrupt support. It traverses the
- * request-list, using interrupts to jump between functions. As
- * all the functions are called within interrupts, we may not
- * sleep. Special care is recommended.
- *
- * modified by Drew Eckhardt to check nr of hd's from the CMOS.
- *
- * Thanks to Branko Lankester, lankeste@fwi.uva.nl, who found a bug
- * in the early extended-partition checks and added DM partitions
- *
- * IRQ-unmask, drive-id, multiple-mode, support for ">16 heads",
- * and general streamlining by Mark Lord.
- *
- * Removed 99% of above. Use Mark's ide driver for those options.
- * This is now a lightweight ST-506 driver. (Paul Gortmaker)
- *
- * Modified 1995 Russell King for ARM processor.
- *
- * Bugfix: max_sectors must be <= 255 or the wheels tend to come
- * off in a hurry once you queue things up - Paul G. 02/2001
- */
-
-/* Uncomment the following if you want verbose error reports. */
-/* #define VERBOSE_ERRORS */
-
-#include <linux/errno.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/timer.h>
-#include <linux/fs.h>
-#include <linux/kernel.h>
-#include <linux/genhd.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/ioport.h>
-#include <linux/mc146818rtc.h> /* CMOS defines */
-#include <linux/init.h>
-#include <linux/blkpg.h>
-#include <linux/hdreg.h>
-
-#define REALLY_SLOW_IO
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-
-#include "io_ports.h"
-
-#ifdef __arm__
-#undef HD_IRQ
-#endif
-#include <asm/irq.h>
-#ifdef __arm__
-#define HD_IRQ IRQ_HARDDISK
-#endif
-
-/* Hd controller regster ports */
-
-#define HD_DATA 0x640 /* _CTL when writing */
-#define HD_ERROR 0x642 /* see err-bits */
-#define HD_NSECTOR 0x644 /* nr of sectors to read/write */
-#define HD_SECTOR 0x646 /* starting sector */
-#define HD_LCYL 0x648 /* starting cylinder */
-#define HD_HCYL 0x64a /* high byte of starting cyl */
-#define HD_CURRENT 0x64c /* 101dhhhh , d=drive, hhhh=head */
-#define HD_STATUS 0x64e /* see status-bits */
-#define HD_FEATURE HD_ERROR /* same io address, read=error, write=feature */
-#define HD_PRECOMP HD_FEATURE /* obsolete use of this port - predates IDE */
-#define HD_COMMAND HD_STATUS /* same io address, read=status, write=cmd */
-
-#define HD_CMD 0x74c /* used for resets */
-#define HD_ALTSTATUS 0x74c /* same as HD_STATUS but doesn't clear irq */
-
-/* Bits of HD_STATUS */
-#define ERR_STAT 0x01
-#define INDEX_STAT 0x02
-#define ECC_STAT 0x04 /* Corrected error */
-#define DRQ_STAT 0x08
-#define SEEK_STAT 0x10
-#define SERVICE_STAT SEEK_STAT
-#define WRERR_STAT 0x20
-#define READY_STAT 0x40
-#define BUSY_STAT 0x80
-
-/* Bits for HD_ERROR */
-#define MARK_ERR 0x01 /* Bad address mark */
-#define TRK0_ERR 0x02 /* couldn't find track 0 */
-#define ABRT_ERR 0x04 /* Command aborted */
-#define MCR_ERR 0x08 /* media change request */
-#define ID_ERR 0x10 /* ID field not found */
-#define MC_ERR 0x20 /* media changed */
-#define ECC_ERR 0x40 /* Uncorrectable ECC error */
-#define BBD_ERR 0x80 /* pre-EIDE meaning: block marked bad */
-#define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
-
-static spinlock_t hd_lock = SPIN_LOCK_UNLOCKED;
-static struct request_queue *hd_queue;
-
-#define CURRENT elv_next_request(hd_queue)
-
-#define TIMEOUT_VALUE (6*HZ)
-#define HD_DELAY 0
-
-#define MAX_ERRORS 16 /* Max read/write errors/sector */
-#define RESET_FREQ 8 /* Reset controller every 8th retry */
-#define RECAL_FREQ 4 /* Recalibrate every 4th retry */
-#define MAX_HD 2
-
-#define STAT_OK (READY_STAT|SEEK_STAT)
-#define OK_STATUS(s) (((s)&(STAT_OK|(BUSY_STAT|WRERR_STAT|ERR_STAT)))==STAT_OK)
-
-static void recal_intr(void);
-static void bad_rw_intr(void);
-
-static int reset;
-static int hd_error;
-
-/*
- * This struct defines the HD's and their types.
- */
-struct hd_i_struct {
- unsigned int head,sect,cyl,wpcom,lzone,ctl;
- int unit;
- int recalibrate;
- int special_op;
-};
-
-#ifdef HD_TYPE
-static struct hd_i_struct hd_info[] = { HD_TYPE };
-static int NR_HD = ((sizeof (hd_info))/(sizeof (struct hd_i_struct)));
-#else
-static struct hd_i_struct hd_info[MAX_HD];
-static int NR_HD;
-#endif
-
-static struct gendisk *hd_gendisk[MAX_HD];
-
-static struct timer_list device_timer;
-
-#define TIMEOUT_VALUE (6*HZ)
-
-#define SET_TIMER \
- do { \
- mod_timer(&device_timer, jiffies + TIMEOUT_VALUE); \
- } while (0)
-
-static void (*do_hd)(void) = NULL;
-#define SET_HANDLER(x) \
-if ((do_hd = (x)) != NULL) \
- SET_TIMER; \
-else \
- del_timer(&device_timer);
-
-
-#if (HD_DELAY > 0)
-unsigned long last_req;
-
-unsigned long read_timer(void)
-{
- extern spinlock_t i8253_lock;
- unsigned long t, flags;
- int i;
-
- spin_lock_irqsave(&i8253_lock, flags);
- t = jiffies * 11932;
- outb_p(0, PIT_MODE);
- i = inb_p(PIT_CH0);
- i |= inb(PIT_CH0) << 8;
- spin_unlock_irqrestore(&i8253_lock, flags);
- return(t - i);
-}
-#endif
-
-void __init hd_setup(char *str, int *ints)
-{
- int hdind = 0;
-
- if (ints[0] != 3)
- return;
- if (hd_info[0].head != 0)
- hdind=1;
- hd_info[hdind].head = ints[2];
- hd_info[hdind].sect = ints[3];
- hd_info[hdind].cyl = ints[1];
- hd_info[hdind].wpcom = 0;
- hd_info[hdind].lzone = ints[1];
- hd_info[hdind].ctl = (ints[2] > 8 ? 8 : 0);
- NR_HD = hdind+1;
-}
-
-static void dump_status (const char *msg, unsigned int stat)
-{
- char *name = CURRENT ?
- CURRENT->rq_dev->bd_disk->disk_name :
- "hd?";
-#ifdef VERBOSE_ERRORS
- printk("%s: %s: status=0x%02x { ", name, msg, stat & 0xff);
- if (stat & BUSY_STAT) printk("Busy ");
- if (stat & READY_STAT) printk("DriveReady ");
- if (stat & WRERR_STAT) printk("WriteFault ");
- if (stat & SEEK_STAT) printk("SeekComplete ");
- if (stat & DRQ_STAT) printk("DataRequest ");
- if (stat & ECC_STAT) printk("CorrectedError ");
- if (stat & INDEX_STAT) printk("Index ");
- if (stat & ERR_STAT) printk("Error ");
- printk("}\n");
- if ((stat & ERR_STAT) == 0) {
- hd_error = 0;
- } else {
- hd_error = inb(HD_ERROR);
- printk("%s: %s: error=0x%02x { ", name, msg, hd_error & 0xff);
- if (hd_error & BBD_ERR) printk("BadSector ");
- if (hd_error & ECC_ERR) printk("UncorrectableError ");
- if (hd_error & ID_ERR) printk("SectorIdNotFound ");
- if (hd_error & ABRT_ERR) printk("DriveStatusError ");
- if (hd_error & TRK0_ERR) printk("TrackZeroNotFound ");
- if (hd_error & MARK_ERR) printk("AddrMarkNotFound ");
- printk("}");
- if (hd_error & (BBD_ERR|ECC_ERR|ID_ERR|MARK_ERR)) {
- printk(", CHS=%d/%d/%d", (inb(HD_HCYL)<<8) + inb(HD_LCYL),
- inb(HD_CURRENT) & 0xf, inb(HD_SECTOR));
- if (CURRENT)
- printk(", sector=%ld", CURRENT->sector);
- }
- printk("\n");
- }
-#else
- printk("%s: %s: status=0x%02x.\n", name, msg, stat & 0xff);
- if ((stat & ERR_STAT) == 0) {
- hd_error = 0;
- } else {
- hd_error = inb(HD_ERROR);
- printk("%s: %s: error=0x%02x.\n", name, msg, hd_error & 0xff);
- }
-#endif
-}
-
-void check_status(void)
-{
- int i = inb(HD_STATUS);
-
- if (!OK_STATUS(i)) {
- dump_status("check_status", i);
- bad_rw_intr();
- }
-}
-
-static int controller_busy(void)
-{
- int retries = 100000;
- unsigned char status;
-
- do {
- status = inb(HD_STATUS);
- } while ((status & BUSY_STAT) && --retries);
- return status;
-}
-
-static int status_ok(void)
-{
- unsigned char status = inb(HD_STATUS);
-
- if (status & BUSY_STAT)
- return 1; /* Ancient, but does it make sense??? */
- if (status & WRERR_STAT)
- return 0;
- if (!(status & READY_STAT))
- return 0;
- if (!(status & SEEK_STAT))
- return 0;
- return 1;
-}
-
-static int controller_ready(unsigned int drive, unsigned int head)
-{
- int retry = 100;
-
- do {
- if (controller_busy() & BUSY_STAT)
- return 0;
- outb(0xA0 | (drive<<4) | head, HD_CURRENT);
- if (status_ok())
- return 1;
- } while (--retry);
- return 0;
-}
-
-static void hd_out(struct hd_i_struct *disk,
- unsigned int nsect,
- unsigned int sect,
- unsigned int head,
- unsigned int cyl,
- unsigned int cmd,
- void (*intr_addr)(void))
-{
- unsigned short port;
-
-#if (HD_DELAY > 0)
- while (read_timer() - last_req < HD_DELAY)
- /* nothing */;
-#endif
- if (reset)
- return;
- if (!controller_ready(disk->unit, head)) {
- reset = 1;
- return;
- }
- SET_HANDLER(intr_addr);
- outb(disk->ctl,HD_CMD);
- port=HD_DATA + 2;
- outb(disk->wpcom>>2, port); port += 2;
- outb(nsect, port); port += 2;
- outb(sect, port); port += 2;
- outb(cyl, port); port += 2;
- outb(cyl>>8, port); port += 2;
- outb(0xA0|(disk->unit<<4)|head, port); port += 2;
- outb(cmd, port);
-}
-
-static void hd_request (void);
-
-static int drive_busy(void)
-{
- unsigned int i;
- unsigned char c;
-
- for (i = 0; i < 500000 ; i++) {
- c = inb(HD_STATUS);
- if ((c & (BUSY_STAT | READY_STAT | SEEK_STAT)) == STAT_OK)
- return 0;
- }
- dump_status("reset timed out", c);
- return 1;
-}
-
-static void reset_controller(void)
-{
- int i;
-
- outb(4,HD_CMD);
- for(i = 0; i < 1000; i++) barrier();
- outb(hd_info[0].ctl & 0x0f,HD_CMD);
- for(i = 0; i < 1000; i++) barrier();
- if (drive_busy())
- printk("hd: controller still busy\n");
- else if ((hd_error = inb(HD_ERROR)) != 1)
- printk("hd: controller reset failed: %02x\n",hd_error);
-}
-
-static void reset_hd(void)
-{
- static int i;
-
-repeat:
- if (reset) {
- reset = 0;
- i = -1;
- reset_controller();
- } else {
- check_status();
- if (reset)
- goto repeat;
- }
- if (++i < NR_HD) {
- struct hd_i_struct *disk = &hd_info[i];
- disk->special_op = disk->recalibrate = 1;
- hd_out(disk, disk->sect, disk->sect, disk->head-1,
- disk->cyl, WIN_SPECIFY, &reset_hd);
- if (reset)
- goto repeat;
- } else
- hd_request();
-}
-
-/*
- * Ok, don't know what to do with the unexpected interrupts: on some machines
- * doing a reset and a retry seems to result in an eternal loop. Right now I
- * ignore it, and just set the timeout.
- *
- * On laptops (and "green" PCs), an unexpected interrupt occurs whenever the
- * drive enters "idle", "standby", or "sleep" mode, so if the status looks
- * "good", we just ignore the interrupt completely.
- */
-void unexpected_hd_interrupt(void)
-{
- unsigned int stat = inb(HD_STATUS);
-
- if (stat & (BUSY_STAT|DRQ_STAT|ECC_STAT|ERR_STAT)) {
- dump_status ("unexpected interrupt", stat);
- SET_TIMER;
- }
-}
-
-/*
- * bad_rw_intr() now tries to be a bit smarter and does things
- * according to the error returned by the controller.
- * -Mika Liljeberg (liljeber@cs.Helsinki.FI)
- */
-static void bad_rw_intr(void)
-{
- struct request *req = CURRENT;
- struct hd_i_struct *disk;
-
- if (!req)
- return;
- disk = req->rq_disk->private_data;
- if (++req->errors >= MAX_ERRORS || (hd_error & BBD_ERR)) {
- end_request(req, 0);
- disk->special_op = disk->recalibrate = 1;
- } else if (req->errors % RESET_FREQ == 0)
- reset = 1;
- else if ((hd_error & TRK0_ERR) || req->errors % RECAL_FREQ == 0)
- disk->special_op = disk->recalibrate = 1;
- /* Otherwise just retry */
-}
-
-static inline int wait_DRQ(void)
-{
- int retries = 100000, stat;
-
- while (--retries > 0)
- if ((stat = inb(HD_STATUS)) & DRQ_STAT)
- return 0;
- dump_status("wait_DRQ", stat);
- return -1;
-}
-
-static void read_intr(void)
-{
- int i, retries = 100000;
- struct request *req;
-
- do {
- i = (unsigned) inb(HD_STATUS);
- if (i & BUSY_STAT)
- continue;
- if (!OK_STATUS(i))
- break;
- if (i & DRQ_STAT)
- goto ok_to_read;
- } while (--retries > 0);
- dump_status("read_intr", i);
- bad_rw_intr();
- hd_request();
- return;
-ok_to_read:
- req = CURRENT;
- insw(HD_DATA,req->buffer,256);
- req->sector++;
- req->buffer += 512;
- req->errors = 0;
- i = --req->nr_sectors;
- --req->current_nr_sectors;
-#ifdef DEBUG
- printk("%s: read: sector %ld, remaining = %ld, buffer=%p\n",
- req->rq_disk->disk_name, req->sector, req->nr_sectors,
- req->buffer+512);
-#endif
- if (req->current_nr_sectors <= 0)
- end_request(req, 1);
- if (i > 0) {
- SET_HANDLER(&read_intr);
- return;
- }
- (void) inb(HD_STATUS);
-#if (HD_DELAY > 0)
- last_req = read_timer();
-#endif
- if (CURRENT)
- hd_request();
- return;
-}
-
-static void write_intr(void)
-{
- int i;
- int retries = 100000;
- struct request *req = CURRENT;
-
- do {
- i = (unsigned) inb(HD_STATUS);
- if (i & BUSY_STAT)
- continue;
- if (!OK_STATUS(i))
- break;
- if ((req->nr_sectors <= 1) || (i & DRQ_STAT))
- goto ok_to_write;
- } while (--retries > 0);
- dump_status("write_intr", i);
- bad_rw_intr();
- hd_request();
- return;
-ok_to_write:
- req->sector++;
- i = --req->nr_sectors;
- --req->current_nr_sectors;
- req->buffer += 512;
- if (!i || (req->bio && req->current_nr_sectors < 1))
- end_request(req, 1);
- if (i > 0) {
- SET_HANDLER(&write_intr);
- outsw(HD_DATA,req->buffer,256);
- local_irq_enable();
- } else {
-#if (HD_DELAY > 0)
- last_req = read_timer();
-#endif
- hd_request();
- }
- return;
-}
-
-static void recal_intr(void)
-{
- check_status();
-#if (HD_DELAY > 0)
- last_req = read_timer();
-#endif
- hd_request();
-}
-
-/*
- * This is another of the error-routines I don't know what to do with. The
- * best idea seems to just set reset, and start all over again.
- */
-static void hd_times_out(unsigned long dummy)
-{
- do_hd = NULL;
-
- if (!CURRENT)
- return;
-
- disable_irq(HD_IRQ);
- local_irq_enable();
- reset = 1;
- printk("%s: timeout\n", CURRENT->rq_disk->disk_name);
- if (++CURRENT->errors >= MAX_ERRORS) {
-#ifdef DEBUG
- printk("%s: too many errors\n", CURRENT->rq_disk->disk_name);
-#endif
- end_request(CURRENT, 0);
- }
- local_irq_disable();
- hd_request();
- enable_irq(HD_IRQ);
-}
-
-int do_special_op(struct hd_i_struct *disk, struct request *req)
-{
- if (disk->recalibrate) {
- disk->recalibrate = 0;
- hd_out(disk, disk->sect,0,0,0,WIN_RESTORE,&recal_intr);
- return reset;
- }
- if (disk->head > 16) {
- printk ("%s: cannot handle device with more than 16 heads - giving up\n", req->rq_disk->disk_name);
- end_request(req, 0);
- }
- disk->special_op = 0;
- return 1;
-}
-
-/*
- * The driver enables interrupts as much as possible. In order to do this,
- * (a) the device-interrupt is disabled before entering hd_request(),
- * and (b) the timeout-interrupt is disabled before the sti().
- *
- * Interrupts are still masked (by default) whenever we are exchanging
- * data/cmds with a drive, because some drives seem to have very poor
- * tolerance for latency during I/O. The IDE driver has support to unmask
- * interrupts for non-broken hardware, so use that driver if required.
- */
-static void hd_request(void)
-{
- unsigned int block, nsect, sec, track, head, cyl;
- struct hd_i_struct *disk;
- struct request *req;
-
- if (do_hd)
- return;
-repeat:
- del_timer(&device_timer);
- local_irq_enable();
-
- if (!CURRENT) {
- do_hd = NULL;
- return;
- }
- req = CURRENT;
-
- if (reset) {
- local_irq_disable();
- reset_hd();
- return;
- }
- disk = req->rq_disk->private_data;
- block = req->sector;
- nsect = req->nr_sectors;
- if (block >= get_capacity(req->rq_disk) ||
- ((block+nsect) > get_capacity(req->rq_disk))) {
- printk("%s: bad access: block=%d, count=%d\n",
- req->rq_disk->disk_name, block, nsect);
- end_request(req, 0);
- goto repeat;
- }
-
- if (disk->special_op) {
- if (do_special_op(disk, req))
- goto repeat;
- return;
- }
- sec = block % disk->sect + 1;
- track = block / disk->sect;
- head = track % disk->head;
- cyl = track / disk->head;
-#ifdef DEBUG
- printk("%s: %sing: CHS=%d/%d/%d, sectors=%d, buffer=%p\n",
- req->rq_disk->disk_name, (req->cmd == READ)?"read":"writ",
- cyl, head, sec, nsect, req->buffer);
-#endif
- if (req->flags & REQ_CMD) {
- switch (rq_data_dir(req)) {
- case READ:
- hd_out(disk,nsect,sec,head,cyl,WIN_READ,&read_intr);
- if (reset)
- goto repeat;
- break;
- case WRITE:
- hd_out(disk,nsect,sec,head,cyl,WIN_WRITE,&write_intr);
- if (reset)
- goto repeat;
- if (wait_DRQ()) {
- bad_rw_intr();
- goto repeat;
- }
- outsw(HD_DATA,req->buffer,256);
- break;
- default:
- printk("unknown hd-command\n");
- end_request(req, 0);
- break;
- }
- }
-}
-
-static void do_hd_request (request_queue_t * q)
-{
- disable_irq(HD_IRQ);
- hd_request();
- enable_irq(HD_IRQ);
-}
-
-static int hd_ioctl(struct inode * inode, struct file * file,
- unsigned int cmd, unsigned long arg)
-{
- struct hd_i_struct *disk = inode->i_bdev->bd_disk->private_data;
- struct hd_geometry *loc = (struct hd_geometry *) arg;
- struct hd_geometry g;
-
- if (cmd != HDIO_GETGEO)
- return -EINVAL;
- if (!loc)
- return -EINVAL;
- g.heads = disk->head;
- g.sectors = disk->sect;
- g.cylinders = disk->cyl;
- g.start = get_start_sect(inode->i_bdev);
- return copy_to_user(loc, &g, sizeof g) ? -EFAULT : 0;
-}
-
-/*
- * Releasing a block device means we sync() it, so that it can safely
- * be forgotten about...
- */
-
-static void hd_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- void (*handler)(void) = do_hd;
-
- do_hd = NULL;
- del_timer(&device_timer);
- if (!handler)
- handler = unexpected_hd_interrupt;
- handler();
- local_irq_enable();
-}
-
-static struct block_device_operations hd_fops = {
- .ioctl = hd_ioctl,
-};
-
-/*
- * This is the hard disk IRQ description. The SA_INTERRUPT in sa_flags
- * means we run the IRQ-handler with interrupts disabled: this is bad for
- * interrupt latency, but anything else has led to problems on some
- * machines.
- *
- * We enable interrupts in some of the routines after making sure it's
- * safe.
- */
-
-static int __init hd_init(void)
-{
- int drive;
- if (register_blkdev(HD_MAJOR,"hd")) {
- printk("hd: unable to get major %d for hard disk\n",HD_MAJOR);
- return -1;
- }
- hd_queue = blk_init_queue(do_hd_request, &hd_lock);
- if (!hd_queue) {
- unregister_blkdev(HD_MAJOR,"hd");
- return -1;
- }
- blk_queue_max_sectors(hd_queue, 255);
- init_timer(&device_timer);
- device_timer.function = hd_times_out;
- blk_queue_hardsect_size(hd_queue, 512);
-
-#ifdef __i386__
- if (!NR_HD) {
- extern struct drive_info drive_info;
- unsigned char *BIOS = (unsigned char *) &drive_info;
- unsigned long flags;
-#ifndef CONFIG_X86_PC9800
- int cmos_disks;
-#endif
-
- for (drive=0 ; drive<2 ; drive++) {
- hd_info[drive].cyl = *(unsigned short *) BIOS;
- hd_info[drive].head = *(3+BIOS);
- hd_info[drive].sect = *(2+BIOS);
- hd_info[drive].wpcom = 0;
- hd_info[drive].ctl = *(3+BIOS) > 8 ? 8 : 0;
- hd_info[drive].lzone = *(unsigned short *) BIOS;
- if (hd_info[drive].cyl && NR_HD == drive)
- NR_HD++;
- BIOS += 6;
- }
-
- }
-#endif /* __i386__ */
-#ifdef __arm__
- if (!NR_HD) {
- /* We don't know anything about the drive. This means
- * that you *MUST* specify the drive parameters to the
- * kernel yourself.
- */
- printk("hd: no drives specified - use hd=cyl,head,sectors"
- " on kernel command line\n");
- }
-#endif
- if (!NR_HD)
- goto out;
-
- for (drive=0 ; drive < NR_HD ; drive++) {
- struct gendisk *disk = alloc_disk(64);
- struct hd_i_struct *p = &hd_info[drive];
- if (!disk)
- goto Enomem;
- disk->major = HD_MAJOR;
- disk->first_minor = drive << 6;
- disk->fops = &hd_fops;
- sprintf(disk->disk_name, "hd%c", 'a'+drive);
- disk->private_data = p;
- set_capacity(disk, p->head * p->sect * p->cyl);
- disk->queue = hd_queue;
- p->unit = drive;
- hd_gendisk[drive] = disk;
- printk ("%s: %luMB, CHS=%d/%d/%d\n",
- disk->disk_name, (unsigned long)get_capacity(disk)/2048,
- p->cyl, p->head, p->sect);
- }
-
- if (request_irq(HD_IRQ, hd_interrupt, SA_INTERRUPT, "hd", NULL)) {
- printk("hd: unable to get IRQ%d for the hard disk driver\n",
- HD_IRQ);
- goto out1;
- }
-
- if (!request_region(HD_DATA, 2, "hd(data)")) {
- printk(KERN_WARNING "hd: port 0x%x busy\n", HD_DATA);
- NR_HD = 0;
- free_irq(HD_IRQ, NULL);
- return;
- }
-
- if (!request_region(HD_DATA + 2, 1, "hd"))
- {
- printk(KERN_WARNING "hd: port 0x%x busy\n", HD_DATA);
- goto out2;
- }
-
- if (!request_region(HD_DATA + 4, 1, "hd"))
- {
- printk(KERN_WARNING "hd: port 0x%x busy\n", HD_DATA);
- goto out3;
- }
-
- if (!request_region(HD_DATA + 6, 1, "hd"))
- {
- printk(KERN_WARNING "hd: port 0x%x busy\n", HD_DATA);
- goto out4;
- }
-
- if (!request_region(HD_DATA + 8, 1, "hd"))
- {
- printk(KERN_WARNING "hd: port 0x%x busy\n", HD_DATA);
- goto out5;
- }
-
- if (!request_region(HD_DATA + 10, 1, "hd"))
- {
- printk(KERN_WARNING "hd: port 0x%x busy\n", HD_DATA);
- goto out6;
- }
-
- if (!request_region(HD_DATA + 12, 1, "hd"))
- {
- printk(KERN_WARNING "hd: port 0x%x busy\n", HD_DATA);
- goto out7;
- }
-
- if (!request_region(HD_CMD, 1, "hd(cmd)"))
- {
- printk(KERN_WARNING "hd: port 0x%x busy\n", HD_CMD);
- goto out8;
- }
-
- if (!request_region(HD_CMD + 2, 1, "hd(cmd)"))
- {
- printk(KERN_WARNING "hd: port 0x%x busy\n", HD_CMD);
- goto out9;
- }
-
- for(drive=0; drive < NR_HD; drive++)
- add_disk(hd_gendisk[drive]);
- return 0;
-
-out9:
- release_region(HD_CMD, 1);
-out8:
- release_region(HD_DATA + 12, 1);
-out7:
- release_region(HD_DATA + 10, 1);
-out6:
- release_region(HD_DATA + 8, 1);
-out5:
- release_region(HD_DATA + 6, 1);
-out4:
- release_region(HD_DATA + 4, 1);
-out3:
- release_region(HD_DATA + 2, 1);
-out2:
- release_region(HD_DATA, 2);
- free_irq(HD_IRQ, NULL);
-out1:
- for (drive = 0; drive < NR_HD; drive++)
- put_disk(hd_gendisk[drive]);
- NR_HD = 0;
-out:
- del_timer(&device_timer);
- unregister_blkdev(HD_MAJOR,"hd");
- blk_cleanup_queue(hd_queue);
- return -1;
-Enomem:
- while (drive--)
- put_disk(hd_gendisk[drive]);
- goto out;
-}
-
-static int parse_hd_setup (char *line) {
- int ints[6];
-
- (void) get_options(line, ARRAY_SIZE(ints), ints);
- hd_setup(NULL, ints);
-
- return 1;
-}
-__setup("hd=", parse_hd_setup);
-
-module_init(hd_init);
+++ /dev/null
-/*
- * ide_pc9800.c
- *
- * Copyright (C) 1997-2000 Linux/98 project,
- * Kyoto University Microcomputer Club.
- */
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/ioport.h>
-#include <linux/ide.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/pc9800.h>
-
-#define PC9800_IDE_BANKSELECT 0x432
-
-#undef PC9800_IDE_DEBUG
-
-static void pc9800_select(ide_drive_t *drive)
-{
-#ifdef PC9800_IDE_DEBUG
- byte old;
-
- /* Too noisy: */
- /* printk(KERN_DEBUG "pc9800_select(%s)\n", drive->name); */
-
- outb(0x80, PC9800_IDE_BANKSELECT);
- old = inb(PC9800_IDE_BANKSELECT);
- if (old != HWIF(drive)->index)
- printk(KERN_DEBUG "ide-pc9800: switching bank #%d -> #%d\n",
- old, HWIF(drive)->index);
-#endif
- outb(HWIF(drive)->index, PC9800_IDE_BANKSELECT);
-}
-
-void __init ide_probe_for_pc9800(void)
-{
- u8 saved_bank;
-
- if (!PC9800_9821_P() /* || !PC9821_IDEIF_DOUBLE_P() */)
- return;
-
- if (!request_region(PC9800_IDE_BANKSELECT, 1, "ide0/1 bank")) {
- printk(KERN_ERR
- "ide: bank select port (%#x) is already occupied!\n",
- PC9800_IDE_BANKSELECT);
- return;
- }
-
- /* Do actual probing. */
- if ((saved_bank = inb(PC9800_IDE_BANKSELECT)) == (u8) ~0
- || (outb(saved_bank ^ 1, PC9800_IDE_BANKSELECT),
- /* Next outb is dummy for reading status. */
- outb(0x80, PC9800_IDE_BANKSELECT),
- inb(PC9800_IDE_BANKSELECT) != (saved_bank ^ 1))) {
- printk(KERN_INFO
- "ide: pc9800 type bank selecting port not found\n");
- release_region(PC9800_IDE_BANKSELECT, 1);
- return;
- }
-
- /* Restore original value, just in case. */
- outb(saved_bank, PC9800_IDE_BANKSELECT);
-
- /* These ports are reseved by IDE I/F. */
- if (!request_region(0x430, 1, "ide") ||
- !request_region(0x435, 1, "ide")) {
- printk(KERN_WARNING
- "ide: IO port 0x430 and 0x435 are reserved for IDE"
- " the card using these ports may not work\n");
- }
-
- if (ide_hwifs[0].io_ports[IDE_DATA_OFFSET] == HD_DATA &&
- ide_hwifs[1].io_ports[IDE_DATA_OFFSET] == HD_DATA) {
- ide_hwifs[0].chipset = ide_pc9800;
- ide_hwifs[0].mate = &ide_hwifs[1];
- ide_hwifs[0].selectproc = pc9800_select;
- ide_hwifs[1].chipset = ide_pc9800;
- ide_hwifs[1].mate = &ide_hwifs[0];
- ide_hwifs[1].selectproc = pc9800_select;
- }
-}
+++ /dev/null
-/* -*- linux-c -*-
- * linux/drivers/ide/legacy/pdc4030.c Version 0.90 May 27, 1999
- *
- * Copyright (C) 1995-2002 Linus Torvalds & authors (see below)
- */
-
-/*
- * Principal Author/Maintainer: Peter Denison <promise@pnd-pc.demon.co.uk>
- *
- * This file provides support for the second port and cache of Promise
- * IDE interfaces, e.g. DC4030VL, DC4030VL-1 and DC4030VL-2.
- *
- * Thanks are due to Mark Lord for advice and patiently answering stupid
- * questions, and all those mugs^H^H^H^Hbrave souls who've tested this,
- * especially Andre Hedrick.
- *
- * Version 0.01 Initial version, #include'd in ide.c rather than
- * compiled separately.
- * Reads use Promise commands, writes as before. Drives
- * on second channel are read-only.
- * Version 0.02 Writes working on second channel, reads on both
- * channels. Writes fail under high load. Suspect
- * transfers of >127 sectors don't work.
- * Version 0.03 Brought into line with ide.c version 5.27.
- * Other minor changes.
- * Version 0.04 Updated for ide.c version 5.30
- * Changed initialization strategy
- * Version 0.05 Kernel integration. -ml
- * Version 0.06 Ooops. Add hwgroup to direct call of ide_intr() -ml
- * Version 0.07 Added support for DC4030 variants
- * Secondary interface autodetection
- * Version 0.08 Renamed to pdc4030.c
- * Version 0.09 Obsolete - never released - did manual write request
- * splitting before max_sectors[major][minor] available.
- * Version 0.10 Updated for 2.1 series of kernels
- * Version 0.11 Updated for 2.3 series of kernels
- * Autodetection code added.
- *
- * Version 0.90 Transition to BETA code. No lost/unexpected interrupts
- */
-
-/*
- * Once you've compiled it in, you'll have to also enable the interface
- * setup routine from the kernel command line, as in
- *
- * 'linux ide0=dc4030' or 'linux ide1=dc4030'
- *
- * It should now work as a second controller also ('ide1=dc4030') but only
- * if you DON'T have BIOS V4.44, which has a bug. If you have this version
- * and EPROM programming facilities, you need to fix 4 bytes:
- * 2496: 81 81
- * 2497: 3E 3E
- * 2498: 22 98 *
- * 2499: 06 05 *
- * 249A: F0 F0
- * 249B: 01 01
- * ...
- * 24A7: 81 81
- * 24A8: 3E 3E
- * 24A9: 22 98 *
- * 24AA: 06 05 *
- * 24AB: 70 70
- * 24AC: 01 01
- *
- * As of January 1999, Promise Technology Inc. have finally supplied me with
- * some technical information which has shed a glimmer of light on some of the
- * problems I was having, especially with writes.
- *
- * There are still potential problems with the robustness and efficiency of
- * this driver because I still don't understand what the card is doing with
- * interrupts, however, it has been stable for a while with no reports of ill
- * effects.
- */
-
-#define DEBUG_READ
-#define DEBUG_WRITE
-#define __PROMISE_4030
-
-#include <linux/module.h>
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/timer.h>
-#include <linux/mm.h>
-#include <linux/ioport.h>
-#include <linux/blkdev.h>
-#include <linux/hdreg.h>
-#include <linux/ide.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-
-#include "pdc4030.h"
-
-static ide_startstop_t promise_rw_disk (ide_drive_t *drive, struct request *rq, sector_t block);
-
-/*
- * promise_selectproc() is invoked by ide.c
- * in preparation for access to the specified drive.
- */
-static void promise_selectproc (ide_drive_t *drive)
-{
- unsigned int number;
-
- number = (HWIF(drive)->channel << 1) + drive->select.b.unit;
- HWIF(drive)->OUTB(number, IDE_FEATURE_REG);
-}
-
-/*
- * pdc4030_cmd handles the set of vendor specific commands that are initiated
- * by command F0. They all have the same success/failure notification -
- * 'P' (=0x50) on success, 'p' (=0x70) on failure.
- */
-int pdc4030_cmd(ide_drive_t *drive, u8 cmd)
-{
- unsigned long timeout;
- u8 status_val;
-
- promise_selectproc(drive); /* redundant? */
- HWIF(drive)->OUTB(0xF3, IDE_SECTOR_REG);
- HWIF(drive)->OUTB(cmd, IDE_SELECT_REG);
- HWIF(drive)->OUTB(PROMISE_EXTENDED_COMMAND, IDE_COMMAND_REG);
- timeout = HZ * 10;
- timeout += jiffies;
- do {
- if(time_after(jiffies, timeout)) {
- return 2; /* device timed out */
- }
- /* Delays at least 10ms to give interface a chance */
- mdelay(10);
- status_val = HWIF(drive)->INB(IDE_SECTOR_REG);
- } while (status_val != 0x50 && status_val != 0x70);
-
- if(status_val == 0x50)
- return 0; /* device returned success */
- else
- return 1; /* device returned failure */
-}
-
-/*
- * pdc4030_identify sends a vendor-specific IDENTIFY command to the drive
- */
-int pdc4030_identify(ide_drive_t *drive)
-{
- return pdc4030_cmd(drive, PROMISE_IDENTIFY);
-}
-
-/*
- * setup_pdc4030()
- * Completes the setup of a Promise DC4030 controller card, once found.
- */
-int __init setup_pdc4030(ide_hwif_t *hwif)
-{
- ide_drive_t *drive;
- ide_hwif_t *hwif2;
- struct dc_ident ident;
- int i;
- ide_startstop_t startstop;
-
- if (!hwif) return 0;
-
- drive = &hwif->drives[0];
- hwif2 = &ide_hwifs[hwif->index+1];
- if (hwif->chipset == ide_pdc4030) /* we've already been found ! */
- return 1;
-
- if (hwif->INB(IDE_NSECTOR_REG) == 0xFF ||
- hwif->INB(IDE_SECTOR_REG) == 0xFF) {
- return 0;
- }
- if (IDE_CONTROL_REG)
- hwif->OUTB(0x08, IDE_CONTROL_REG);
- if (pdc4030_cmd(drive,PROMISE_GET_CONFIG)) {
- return 0;
- }
- if (ide_wait_stat(&startstop, drive,DATA_READY,BAD_W_STAT,WAIT_DRQ)) {
- printk(KERN_INFO
- "%s: Failed Promise read config!\n",hwif->name);
- return 0;
- }
- hwif->ata_input_data(drive, &ident, SECTOR_WORDS);
- if (ident.id[1] != 'P' || ident.id[0] != 'T') {
- return 0;
- }
- printk(KERN_INFO "%s: Promise caching controller, ",hwif->name);
- switch(ident.type) {
- case 0x43: printk("DC4030VL-2, "); break;
- case 0x41: printk("DC4030VL-1, "); break;
- case 0x40: printk("DC4030VL, "); break;
- default:
- printk("unknown - type 0x%02x - please report!\n"
- ,ident.type);
- printk("Please e-mail the following data to "
- "promise@pnd-pc.demon.co.uk along with\n"
- "a description of your card and drives:\n");
- for (i=0; i < 0x90; i++) {
- printk("%02x ", ((unsigned char *)&ident)[i]);
- if ((i & 0x0f) == 0x0f) printk("\n");
- }
- return 0;
- }
- printk("%dKB cache, ",(int)ident.cache_mem);
- switch(ident.irq) {
- case 0x00: hwif->irq = 14; break;
- case 0x01: hwif->irq = 12; break;
- default: hwif->irq = 15; break;
- }
- printk("on IRQ %d\n",hwif->irq);
-
- /*
- * Once found and identified, we set up the next hwif in the array
- * (hwif2 = ide_hwifs[hwif->index+1]) with the same io ports, irq
- * and other settings as the main hwif. This gives us two "mated"
- * hwifs pointing to the Promise card.
- *
- * We also have to shift the default values for the remaining
- * interfaces "up by one" to make room for the second interface on the
- * same set of values.
- */
-
- hwif->chipset = hwif2->chipset = ide_pdc4030;
- hwif->mate = hwif2;
- hwif2->mate = hwif;
- hwif2->channel = 1;
- hwif->rqsize = hwif2->rqsize = 127;
- hwif->no_lba48 = hwif2->no_lba48 = 1;
- hwif->selectproc = hwif2->selectproc = &promise_selectproc;
- hwif->serialized = hwif2->serialized = 1;
- /* DC4030 hosted drives need their own identify... */
- hwif->identify = hwif2->identify = &pdc4030_identify;
-
- /* Override the normal ide disk read/write. */
- hwif->rw_disk = promise_rw_disk;
- hwif2->rw_disk = promise_rw_disk;
-
- /* Shift the remaining interfaces up by one */
- for (i=MAX_HWIFS-1 ; i > hwif->index+1 ; i--) {
- ide_hwif_t *h = &ide_hwifs[i];
-
-#ifdef DEBUG
- printk(KERN_DEBUG "pdc4030: Shifting i/f %d values to i/f %d\n",i-1,i);
-#endif /* DEBUG */
- ide_init_hwif_ports(&h->hw, (h-1)->io_ports[IDE_DATA_OFFSET], 0, NULL);
- memcpy(h->io_ports, h->hw.io_ports, sizeof(h->io_ports));
- h->noprobe = (h-1)->noprobe;
- }
- ide_init_hwif_ports(&hwif2->hw, hwif->io_ports[IDE_DATA_OFFSET], 0, NULL);
- memcpy(hwif2->io_ports, hwif->hw.io_ports, sizeof(hwif2->io_ports));
- hwif2->irq = hwif->irq;
- hwif2->hw.irq = hwif->hw.irq = hwif->irq;
- for (i=0; i<2 ; i++) {
- hwif->drives[i].io_32bit = 3;
- hwif2->drives[i].io_32bit = 3;
- hwif->drives[i].keep_settings = 1;
- hwif2->drives[i].keep_settings = 1;
- if (!ident.current_tm[i].cyl)
- hwif->drives[i].noprobe = 1;
- if (!ident.current_tm[i+2].cyl)
- hwif2->drives[i].noprobe = 1;
- }
-
- probe_hwif_init(&ide_hwifs[hwif->index]);
- probe_hwif_init(&ide_hwifs[hwif2->index]);
-
- return 1;
-}
-
-/*
- * detect_pdc4030()
- * Tests for the presence of a DC4030 Promise card on this interface
- * Returns: 1 if found, 0 if not found
- */
-int __init detect_pdc4030(ide_hwif_t *hwif)
-{
- ide_drive_t *drive = &hwif->drives[0];
-
- if (IDE_DATA_REG == 0) { /* Skip test for non-existent interface */
- return 0;
- }
- hwif->OUTB(0xF3, IDE_SECTOR_REG);
- hwif->OUTB(0x14, IDE_SELECT_REG);
- hwif->OUTB(PROMISE_EXTENDED_COMMAND, IDE_COMMAND_REG);
-
- msleep(50);
-
- if (hwif->INB(IDE_ERROR_REG) == 'P' &&
- hwif->INB(IDE_NSECTOR_REG) == 'T' &&
- hwif->INB(IDE_SECTOR_REG) == 'I') {
- return 1;
- } else {
- return 0;
- }
-}
-
-int __init pdc4030_init(void)
-{
- unsigned int index;
- ide_hwif_t *hwif;
-
- for (index = 0; index < MAX_HWIFS; index++) {
- hwif = &ide_hwifs[index];
- if (hwif->chipset == ide_unknown && detect_pdc4030(hwif)) {
- if (!setup_pdc4030(hwif))
- return -ENODEV;
- return 0;
- }
- }
- return -ENODEV;
-}
-
-#ifdef MODULE
-module_init(pdc4030_init);
-#endif
-
-MODULE_AUTHOR("Peter Denison");
-MODULE_DESCRIPTION("Support of Promise 4030 VLB series IDE chipsets");
-MODULE_LICENSE("GPL");
-
-/*
- * promise_read_intr() is the handler for disk read/multread interrupts
- */
-static ide_startstop_t promise_read_intr (ide_drive_t *drive)
-{
- unsigned int sectors_left, sectors_avail, nsect;
- struct request *rq = HWGROUP(drive)->rq;
- ata_status_t status;
-
- status.all = HWIF(drive)->INB(IDE_STATUS_REG);
- if (!OK_STAT(status.all, DATA_READY, BAD_R_STAT))
- return DRIVER(drive)->error(drive, __FUNCTION__, status.all);
-
-read_again:
- do {
- sectors_left = HWIF(drive)->INB(IDE_NSECTOR_REG);
- HWIF(drive)->INB(IDE_SECTOR_REG);
- } while (HWIF(drive)->INB(IDE_NSECTOR_REG) != sectors_left);
- sectors_avail = rq->nr_sectors - sectors_left;
- if (!sectors_avail)
- goto read_again;
-
-read_next:
- nsect = rq->current_nr_sectors;
- if (nsect > sectors_avail)
- nsect = sectors_avail;
- sectors_avail -= nsect;
-
-#ifdef DEBUG_READ
- printk(KERN_DEBUG "%s: %s: sectors(%lu-%lu), rem=%lu\n",
- drive->name, __FUNCTION__,
- (unsigned long)rq->sector,
- (unsigned long)rq->sector + nsect - 1,
- (unsigned long)rq->nr_sectors - nsect);
-#endif /* DEBUG_READ */
-
- HWIF(drive)->ata_input_data(drive, rq->buffer, nsect * SECTOR_WORDS);
- rq->buffer += nsect<<9;
- rq->sector += nsect;
- rq->errors = 0;
- rq->nr_sectors -= nsect;
- if (!rq->current_nr_sectors)
- DRIVER(drive)->end_request(drive, 1, 0);
-
-/*
- * Now the data has been read in, do the following:
- *
- * if there are still sectors left in the request,
- * if we know there are still sectors available from the interface,
- * go back and read the next bit of the request.
- * else if DRQ is asserted, there are more sectors available, so
- * go back and find out how many, then read them in.
- * else if BUSY is asserted, we are going to get an interrupt, so
- * set the handler for the interrupt and just return
- */
- if (rq->nr_sectors > 0) {
- if (sectors_avail)
- goto read_next;
- status.all = HWIF(drive)->INB(IDE_STATUS_REG);
- if (status.b.drq)
- goto read_again;
- if (status.b.bsy) {
- if (HWGROUP(drive)->handler != NULL)
- BUG();
- ide_set_handler(drive,
- &promise_read_intr,
- WAIT_CMD,
- NULL);
-#ifdef DEBUG_READ
- printk(KERN_DEBUG "%s: promise_read: waiting for"
- "interrupt\n", drive->name);
-#endif /* DEBUG_READ */
- return ide_started;
- }
- printk(KERN_ERR "%s: Eeek! promise_read_intr: sectors left "
- "!DRQ !BUSY\n", drive->name);
- return DRIVER(drive)->error(drive,
- "promise read intr", status.all);
- }
- return ide_stopped;
-}
-
-/*
- * promise_complete_pollfunc()
- * This is the polling function for waiting (nicely!) until drive stops
- * being busy. It is invoked at the end of a write, after the previous poll
- * has finished.
- *
- * Once not busy, the end request is called.
- */
-static ide_startstop_t promise_complete_pollfunc(ide_drive_t *drive)
-{
- ide_hwgroup_t *hwgroup = HWGROUP(drive);
- struct request *rq = &hwgroup->wrq;
- struct bio *bio = rq->bio;
-
- if ((HWIF(drive)->INB(IDE_STATUS_REG)) & BUSY_STAT) {
- if (time_before(jiffies, hwgroup->poll_timeout)) {
- if (hwgroup->handler != NULL)
- BUG();
- ide_set_handler(drive,
- &promise_complete_pollfunc,
- HZ/100,
- NULL);
- return ide_started; /* continue polling... */
- }
- hwgroup->poll_timeout = 0;
- printk(KERN_ERR "%s: completion timeout - still busy!\n",
- drive->name);
- return DRIVER(drive)->error(drive, "busy timeout",
- HWIF(drive)->INB(IDE_STATUS_REG));
- }
-
- hwgroup->poll_timeout = 0;
-#ifdef DEBUG_WRITE
- printk(KERN_DEBUG "%s: Write complete - end_request\n", drive->name);
-#endif /* DEBUG_WRITE */
-
- bio->bi_idx = bio->bi_vcnt - rq->nr_cbio_segments;
- rq = hwgroup->rq;
- DRIVER(drive)->end_request(drive, 1, rq->hard_nr_sectors);
-
- return ide_stopped;
-}
-
-/*
- * promise_multwrite() transfers a block of up to mcount sectors of data
- * to a drive as part of a disk multiple-sector write operation.
- */
-static void promise_multwrite (ide_drive_t *drive, unsigned int mcount)
-{
- ide_hwgroup_t *hwgroup = HWGROUP(drive);
- struct request *rq = &hwgroup->wrq;
-
- do {
- char *buffer;
- int nsect = rq->current_nr_sectors;
-
- if (nsect > mcount)
- nsect = mcount;
- mcount -= nsect;
- buffer = rq->buffer;
-
- rq->sector += nsect;
- rq->buffer += nsect << 9;
- rq->nr_sectors -= nsect;
- rq->current_nr_sectors -= nsect;
-
- /* Do we move to the next bh after this? */
- if (!rq->current_nr_sectors) {
- struct bio *bio = rq->bio;
-
- /*
- * only move to next bio, when we have processed
- * all bvecs in this one.
- */
- if (++bio->bi_idx >= bio->bi_vcnt) {
- bio->bi_idx = bio->bi_vcnt - rq->nr_cbio_segments;
- bio = bio->bi_next;
- }
-
- /* end early early we ran out of requests */
- if (!bio) {
- mcount = 0;
- } else {
- rq->bio = bio;
- rq->nr_cbio_segments = bio_segments(bio);
- rq->current_nr_sectors = bio_cur_sectors(bio);
- rq->hard_cur_sectors = rq->current_nr_sectors;
- }
- }
-
- /*
- * Ok, we're all setup for the interrupt
- * re-entering us on the last transfer.
- */
- taskfile_output_data(drive, buffer, nsect<<7);
- } while (mcount);
-}
-
-/*
- * promise_write_pollfunc() is the handler for disk write completion polling.
- */
-static ide_startstop_t promise_write_pollfunc (ide_drive_t *drive)
-{
- ide_hwgroup_t *hwgroup = HWGROUP(drive);
- struct request *rq = &hwgroup->wrq;
- struct bio *bio = rq->bio;
-
- if (HWIF(drive)->INB(IDE_NSECTOR_REG) != 0) {
- if (time_before(jiffies, hwgroup->poll_timeout)) {
- if (hwgroup->handler != NULL)
- BUG();
- ide_set_handler(drive,
- &promise_write_pollfunc,
- HZ/100,
- NULL);
- return ide_started; /* continue polling... */
- }
- hwgroup->poll_timeout = 0;
- printk(KERN_ERR "%s: write timed-out!\n",drive->name);
- bio->bi_idx = bio->bi_vcnt - rq->nr_cbio_segments;
- return DRIVER(drive)->error(drive, "write timeout",
- HWIF(drive)->INB(IDE_STATUS_REG));
- }
-
- /*
- * Now write out last 4 sectors and poll for not BUSY
- */
- promise_multwrite(drive, 4);
- hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
- if (hwgroup->handler != NULL)
- BUG();
- ide_set_handler(drive, &promise_complete_pollfunc, HZ/100, NULL);
-#ifdef DEBUG_WRITE
- printk(KERN_DEBUG "%s: Done last 4 sectors - status = %02x\n",
- drive->name, HWIF(drive)->INB(IDE_STATUS_REG));
-#endif /* DEBUG_WRITE */
- return ide_started;
-}
-
-/*
- * promise_write() transfers a block of one or more sectors of data to a
- * drive as part of a disk write operation. All but 4 sectors are transferred
- * in the first attempt, then the interface is polled (nicely!) for completion
- * before the final 4 sectors are transferred. There is no interrupt generated
- * on writes (at least on the DC4030VL-2), we just have to poll for NOT BUSY.
- */
-static ide_startstop_t promise_write (ide_drive_t *drive)
-{
- ide_hwgroup_t *hwgroup = HWGROUP(drive);
- struct request *rq = &hwgroup->wrq;
-
-#ifdef DEBUG_WRITE
- printk(KERN_DEBUG "%s: %s: sectors(%lu-%lu)\n",
- drive->name, __FUNCTION__,
- (unsigned long)rq->sector,
- (unsigned long)rq->sector + rq->nr_sectors - 1);
-#endif /* DEBUG_WRITE */
-
- /*
- * If there are more than 4 sectors to transfer, do n-4 then go into
- * the polling strategy as defined above.
- */
- if (rq->nr_sectors > 4) {
- promise_multwrite(drive, rq->nr_sectors - 4);
- hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
- if (hwgroup->handler != NULL) /* paranoia check */
- BUG();
- ide_set_handler (drive, &promise_write_pollfunc, HZ/100, NULL);
- return ide_started;
- } else {
- /*
- * There are 4 or fewer sectors to transfer, do them all in one go
- * and wait for NOT BUSY.
- */
- promise_multwrite(drive, rq->nr_sectors);
- hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
- if (hwgroup->handler != NULL)
- BUG();
- ide_set_handler(drive,
- &promise_complete_pollfunc,
- HZ/100,
- NULL);
-
-#ifdef DEBUG_WRITE
- printk(KERN_DEBUG "%s: promise_write: <= 4 sectors, "
- "status = %02x\n", drive->name,
- HWIF(drive)->INB(IDE_STATUS_REG));
-#endif /* DEBUG_WRITE */
- return ide_started;
- }
-}
-
-/*
- * do_pdc4030_io() is called from promise_rw_disk, having had the block number
- * already set up. It issues a READ or WRITE command to the Promise
- * controller, assuming LBA has been used to set up the block number.
- */
-ide_startstop_t do_pdc4030_io (ide_drive_t *drive, struct request *rq)
-{
- ide_startstop_t startstop;
- unsigned long timeout;
- u8 stat = 0;
-
- if (rq_data_dir(rq) == READ) {
- HWIF(drive)->OUTB(PROMISE_READ, IDE_COMMAND_REG);
-/*
- * The card's behaviour is odd at this point. If the data is
- * available, DRQ will be true, and no interrupt will be
- * generated by the card. If this is the case, we need to call the
- * "interrupt" handler (promise_read_intr) directly. Otherwise, if
- * an interrupt is going to occur, bit0 of the SELECT register will
- * be high, so we can set the handler the just return and be interrupted.
- * If neither of these is the case, we wait for up to 50ms (badly I'm
- * afraid!) until one of them is.
- */
- timeout = jiffies + HZ/20; /* 50ms wait */
- do {
- stat = HWIF(drive)->INB(IDE_STATUS_REG);
- if (stat & DRQ_STAT) {
- udelay(1);
- return promise_read_intr(drive);
- }
- if (HWIF(drive)->INB(IDE_SELECT_REG) & 0x01) {
-#ifdef DEBUG_READ
- printk(KERN_DEBUG "%s: read: waiting for "
- "interrupt\n", drive->name);
-#endif /* DEBUG_READ */
- ide_set_handler(drive,
- &promise_read_intr,
- WAIT_CMD,
- NULL);
- return ide_started;
- }
- udelay(1);
- } while (time_before(jiffies, timeout));
-
- printk(KERN_ERR "%s: reading: No DRQ and not "
- "waiting - Odd!\n", drive->name);
- return ide_stopped;
- } else {
- HWIF(drive)->OUTB(PROMISE_WRITE, IDE_COMMAND_REG);
- if (ide_wait_stat(&startstop, drive, DATA_READY,
- drive->bad_wstat, WAIT_DRQ)) {
- printk(KERN_ERR "%s: no DRQ after issuing "
- "PROMISE_WRITE\n", drive->name);
- return startstop;
- }
- if (!drive->unmask)
- local_irq_disable();
- HWGROUP(drive)->wrq = *rq; /* scratchpad */
- return promise_write(drive);
- }
-}
-
-static ide_startstop_t promise_rw_disk (ide_drive_t *drive, struct request *rq, sector_t block)
-{
- /* The four drives on the two logical (one physical) interfaces
- are distinguished by writing the drive number (0-3) to the
- Feature register.
- FIXME: Is promise_selectproc now redundant??
- */
- ide_hwif_t *hwif = HWIF(drive);
- int drive_number = (hwif->channel << 1) + drive->select.b.unit;
-
- BUG_ON(rq->nr_sectors > 127);
-
- if (IDE_CONTROL_REG)
- hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
- hwif->OUTB(drive_number, IDE_FEATURE_REG);
- hwif->OUTB(rq->nr_sectors, IDE_NSECTOR_REG);
- hwif->OUTB(block,IDE_SECTOR_REG);
- hwif->OUTB(block>>=8,IDE_LCYL_REG);
- hwif->OUTB(block>>=8,IDE_HCYL_REG);
- hwif->OUTB(((block>>8)&0x0f)|drive->select.all,IDE_SELECT_REG);
-
- return do_pdc4030_io(drive, rq);
-}
+++ /dev/null
-/*
- * linux/drivers/ide/legacy/pdc4030.h
- *
- * Copyright (C) 1995-1998 Linus Torvalds & authors
- */
-
-/*
- * Principal author: Peter Denison <peterd@pnd-pc.demon.co.uk>
- */
-
-#ifndef IDE_PROMISE_H
-#define IDE_PROMISE_H
-
-#include <linux/config.h>
-
-#ifndef CONFIG_BLK_DEV_PDC4030
-# ifdef _IDE_DISK
-
-# define IS_PDC4030_DRIVE (0) /* auto-NULLs out pdc4030 code */
-
-ide_startstop_t promise_rw_disk(ide_drive_t *, struct request *, unsigned long);
-
-ide_startstop_t promise_rw_disk(ide_drive_t *drive, struct request *rq, unsigned long block)
-{
- return ide_stopped;
-}
-# endif /* _IDE_DISK */
-#else /* CONFIG_BLK_DEV_PDC4030 */
-# ifdef _IDE_DISK
-# define IS_PDC4030_DRIVE (HWIF(drive)->chipset == ide_pdc4030)
-
-ide_startstop_t promise_rw_disk(ide_drive_t *, struct request *, unsigned long);
-
-# endif /* _IDE_DISK */
-#endif /* CONFIG_BLK_DEV_PDC4030 */
-
-#ifdef __PROMISE_4030
-#define PROMISE_EXTENDED_COMMAND 0xF0
-#define PROMISE_READ 0xF2
-#define PROMISE_WRITE 0xF3
-/* Extended commands - main command code = 0xf0 */
-#define PROMISE_GET_CONFIG 0x10
-#define PROMISE_IDENTIFY 0x20
-
-struct translation_mode {
- u16 cyl;
- u8 head;
- u8 sect;
-};
-
-struct dc_ident {
- u8 type;
- u8 unknown1;
- u8 hw_revision;
- u8 firmware_major;
- u8 firmware_minor;
- u8 bios_address;
- u8 irq;
- u8 unknown2;
- u16 cache_mem;
- u16 unknown3;
- u8 id[2];
- u16 info;
- struct translation_mode current_tm[4];
- u8 pad[SECTOR_WORDS*4 - 32];
-};
-
-#endif /* __PROMISE_4030 */
-
-#endif /* IDE_PROMISE_H */
+++ /dev/null
-/*
- * linux/drivers/ide/pci/adma100.c -- basic support for Pacific Digital ADMA-100 boards
- *
- * Created 09 Apr 2002 by Mark Lord
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive for
- * more details.
- */
-
-#include <linux/mm.h>
-#include <linux/blkdev.h>
-#include <linux/hdreg.h>
-#include <linux/ide.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <asm/io.h>
-
-void __init ide_init_adma100 (ide_hwif_t *hwif)
-{
- unsigned long phy_admctl = pci_resource_start(hwif->pci_dev, 4) + 0x80 + (hwif->channel * 0x20);
- void *v_admctl;
-
- hwif->autodma = 0; // not compatible with normal IDE DMA transfers
- hwif->dma_base = 0; // disable DMA completely
- hwif->io_ports[IDE_CONTROL_OFFSET] += 4; // chip needs offset of 6 instead of 2
- v_admctl = ioremap_nocache(phy_admctl, 1024); // map config regs, so we can turn on drive IRQs
- *((unsigned short *)v_admctl) &= 3; // enable aIEN; preserve PIO mode
- iounmap(v_admctl); // all done; unmap config regs
-}
+++ /dev/null
-#ifndef ADMA_100_H
-#define ADMA_100_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-extern void init_setup_pdcadma(struct pci_dev *, ide_pci_device_t *);
-extern unsigned int init_chipset_pdcadma(struct pci_dev *, const char *);
-extern void init_hwif_pdcadma(ide_hwif_t *);
-extern void init_dma_pdcadma(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t pdcadma_chipsets[] __devinitdata = {
- {
- .vendor = PCI_VENDOR_ID_PDC,
- .device = PCI_DEVICE_ID_PDC_1841,
- .name = "ADMA100",
- .init_setup = init_setup_pdcadma,
- .init_chipset = init_chipset_pdcadma,
- .init_hwif = init_hwif_pdcadma,
- .init_dma = init_dma_pdcadma,
- .channels = 2,
- .autodma = NODMA,
- .bootable = OFF_BOARD,
- }
-}
-
-#endif /* ADMA_100_H */
+++ /dev/null
-#ifndef AEC62XX_H
-#define AEC62XX_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-struct chipset_bus_clock_list_entry {
- byte xfer_speed;
- byte chipset_settings;
- byte ultra_settings;
-};
-
-static struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
- { XFER_UDMA_6, 0x31, 0x07 },
- { XFER_UDMA_5, 0x31, 0x06 },
- { XFER_UDMA_4, 0x31, 0x05 },
- { XFER_UDMA_3, 0x31, 0x04 },
- { XFER_UDMA_2, 0x31, 0x03 },
- { XFER_UDMA_1, 0x31, 0x02 },
- { XFER_UDMA_0, 0x31, 0x01 },
-
- { XFER_MW_DMA_2, 0x31, 0x00 },
- { XFER_MW_DMA_1, 0x31, 0x00 },
- { XFER_MW_DMA_0, 0x0a, 0x00 },
- { XFER_PIO_4, 0x31, 0x00 },
- { XFER_PIO_3, 0x33, 0x00 },
- { XFER_PIO_2, 0x08, 0x00 },
- { XFER_PIO_1, 0x0a, 0x00 },
- { XFER_PIO_0, 0x00, 0x00 },
- { 0, 0x00, 0x00 }
-};
-
-static struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
- { XFER_UDMA_6, 0x41, 0x06 },
- { XFER_UDMA_5, 0x41, 0x05 },
- { XFER_UDMA_4, 0x41, 0x04 },
- { XFER_UDMA_3, 0x41, 0x03 },
- { XFER_UDMA_2, 0x41, 0x02 },
- { XFER_UDMA_1, 0x41, 0x01 },
- { XFER_UDMA_0, 0x41, 0x01 },
-
- { XFER_MW_DMA_2, 0x41, 0x00 },
- { XFER_MW_DMA_1, 0x42, 0x00 },
- { XFER_MW_DMA_0, 0x7a, 0x00 },
- { XFER_PIO_4, 0x41, 0x00 },
- { XFER_PIO_3, 0x43, 0x00 },
- { XFER_PIO_2, 0x78, 0x00 },
- { XFER_PIO_1, 0x7a, 0x00 },
- { XFER_PIO_0, 0x70, 0x00 },
- { 0, 0x00, 0x00 }
-};
-
-#ifndef SPLIT_BYTE
-#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
-#endif
-#ifndef MAKE_WORD
-#define MAKE_WORD(W,HB,LB) ((W)=((HB<<8)+LB))
-#endif
-
-#define BUSCLOCK(D) \
- ((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D)))
-
-static void init_setup_aec6x80(struct pci_dev *, ide_pci_device_t *);
-static void init_setup_aec62xx(struct pci_dev *, ide_pci_device_t *);
-static unsigned int init_chipset_aec62xx(struct pci_dev *, const char *);
-static void init_hwif_aec62xx(ide_hwif_t *);
-static void init_dma_aec62xx(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "AEC6210",
- .init_setup = init_setup_aec62xx,
- .init_chipset = init_chipset_aec62xx,
- .init_hwif = init_hwif_aec62xx,
- .init_dma = init_dma_aec62xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
- .bootable = OFF_BOARD,
- },{ /* 1 */
- .name = "AEC6260",
- .init_setup = init_setup_aec62xx,
- .init_chipset = init_chipset_aec62xx,
- .init_hwif = init_hwif_aec62xx,
- .init_dma = init_dma_aec62xx,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 2 */
- .name = "AEC6260R",
- .init_setup = init_setup_aec62xx,
- .init_chipset = init_chipset_aec62xx,
- .init_hwif = init_hwif_aec62xx,
- .init_dma = init_dma_aec62xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
- .bootable = NEVER_BOARD,
- },{ /* 3 */
- .name = "AEC6X80",
- .init_setup = init_setup_aec6x80,
- .init_chipset = init_chipset_aec62xx,
- .init_hwif = init_hwif_aec62xx,
- .init_dma = init_dma_aec62xx,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 4 */
- .name = "AEC6X80R",
- .init_setup = init_setup_aec6x80,
- .init_chipset = init_chipset_aec62xx,
- .init_hwif = init_hwif_aec62xx,
- .init_dma = init_dma_aec62xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
- .bootable = OFF_BOARD,
- }
-};
-
-#endif /* AEC62XX_H */
+++ /dev/null
-#ifndef ALI15X3_H
-#define ALI15X3_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define DISPLAY_ALI_TIMINGS
-
-static unsigned int init_chipset_ali15x3(struct pci_dev *, const char *);
-static void init_hwif_common_ali15x3(ide_hwif_t *);
-static void init_hwif_ali15x3(ide_hwif_t *);
-static void init_dma_ali15x3(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t ali15x3_chipsets[] __devinitdata = {
- { /* 0 */
- .vendor = PCI_VENDOR_ID_AL,
- .device = PCI_DEVICE_ID_AL_M5229,
- .name = "ALI15X3",
- .init_chipset = init_chipset_ali15x3,
- .init_iops = NULL,
- .init_hwif = init_hwif_ali15x3,
- .init_dma = init_dma_ali15x3,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
- .bootable = ON_BOARD,
- .extra = 0
- },{
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* ALI15X3 */
+++ /dev/null
-#ifndef AMD74XX_H
-#define AMD74XX_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define DISPLAY_AMD_TIMINGS
-
-static unsigned int init_chipset_amd74xx(struct pci_dev *, const char *);
-static void init_hwif_amd74xx(ide_hwif_t *);
-
-static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
- { /* 0 */
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_AMD_COBRA_7401,
- .name = "AMD7401",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
- .bootable = ON_BOARD,
- .extra = 0
- },{ /* 1 */
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_AMD_VIPER_7409,
- .name = "AMD7409",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
- .bootable = ON_BOARD,
- .extra = 0
- },{ /* 2 */
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_AMD_VIPER_7411,
- .name = "AMD7411",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
- .bootable = ON_BOARD,
- .extra = 0
- },{ /* 3 */
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_AMD_OPUS_7441,
- .name = "AMD7441",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
- .bootable = ON_BOARD,
- .extra = 0
- },{ /* 4 */
- .vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_AMD_8111_IDE,
- .name = "AMD8111",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .autodma = AUTODMA,
- .channels = 2,
- .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
- .bootable = ON_BOARD,
- .extra = 0
- },
- { /* 5 */
- .vendor = PCI_VENDOR_ID_NVIDIA,
- .device = PCI_DEVICE_ID_NVIDIA_NFORCE_IDE,
- .name = "NFORCE",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}},
- .bootable = ON_BOARD,
- .extra = 0,
- },
- { /* 6 */
- .vendor = PCI_VENDOR_ID_NVIDIA,
- .device = PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE,
- .name = "NFORCE2",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}},
- .bootable = ON_BOARD,
- .extra = 0,
- },
- { /* 7 */
- .vendor = PCI_VENDOR_ID_NVIDIA,
- .device = PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE,
- .name = "NFORCE2S",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}},
- .bootable = ON_BOARD,
- },
- { /* 8 */
- .vendor = PCI_VENDOR_ID_NVIDIA,
- .device = PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA,
- .name = "NFORCE2S-SATA",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}},
- .bootable = ON_BOARD,
- },
- { /* 9 */
- .vendor = PCI_VENDOR_ID_NVIDIA,
- .device = PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE,
- .name = "NFORCE3",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}},
- .bootable = ON_BOARD,
- },
- { /* 10 */
- .vendor = PCI_VENDOR_ID_NVIDIA,
- .device = PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE,
- .name = "NFORCE3S",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}},
- .bootable = ON_BOARD,
- },
- { /* 11 */
- .vendor = PCI_VENDOR_ID_NVIDIA,
- .device = PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA,
- .name = "NFORCE3S-SATA",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}},
- .bootable = ON_BOARD,
- },
- { /* 12 */
- .vendor = PCI_VENDOR_ID_NVIDIA,
- .device = PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2,
- .name = "NFORCE3S-SATA2",
- .init_chipset = init_chipset_amd74xx,
- .init_hwif = init_hwif_amd74xx,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}},
- .bootable = ON_BOARD,
- },
- {
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* AMD74XX_H */
+++ /dev/null
-#ifndef CMD640_H
-#define CMD640_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define IDE_IGNORE ((void *)-1)
-
-static ide_pci_device_t cmd640_chipsets[] __initdata = {
- {
- .vendor = PCI_VENDOR_ID_CMD,
- .device = PCI_DEVICE_ID_CMD_640,
- .name = "CMD640",
- .init_setup = NULL,
- .init_chipset = NULL,
- .init_iops = NULL,
- .init_hwif = IDE_IGNORE,
- .init_dma = NULL,
- .channels = 2,
- .autodma = NODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
- .bootable = ON_BOARD,
- .extra = 0
- },{
- .vendor = 0,
- .device = 0,
- .bootable = EOL,
- }
-}
-
-#endif /* CMD640_H */
+++ /dev/null
-#ifndef CMD64X_H
-#define CMD64X_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define DISPLAY_CMD64X_TIMINGS
-
-#define CMD_DEBUG 0
-
-#if CMD_DEBUG
-#define cmdprintk(x...) printk(x)
-#else
-#define cmdprintk(x...)
-#endif
-
-/*
- * CMD64x specific registers definition.
- */
-#define CFR 0x50
-#define CFR_INTR_CH0 0x02
-#define CNTRL 0x51
-#define CNTRL_DIS_RA0 0x40
-#define CNTRL_DIS_RA1 0x80
-#define CNTRL_ENA_2ND 0x08
-
-#define CMDTIM 0x52
-#define ARTTIM0 0x53
-#define DRWTIM0 0x54
-#define ARTTIM1 0x55
-#define DRWTIM1 0x56
-#define ARTTIM23 0x57
-#define ARTTIM23_DIS_RA2 0x04
-#define ARTTIM23_DIS_RA3 0x08
-#define ARTTIM23_INTR_CH1 0x10
-#define ARTTIM2 0x57
-#define ARTTIM3 0x57
-#define DRWTIM23 0x58
-#define DRWTIM2 0x58
-#define BRST 0x59
-#define DRWTIM3 0x5b
-
-#define BMIDECR0 0x70
-#define MRDMODE 0x71
-#define MRDMODE_INTR_CH0 0x04
-#define MRDMODE_INTR_CH1 0x08
-#define MRDMODE_BLK_CH0 0x10
-#define MRDMODE_BLK_CH1 0x20
-#define BMIDESR0 0x72
-#define UDIDETCR0 0x73
-#define DTPR0 0x74
-#define BMIDECR1 0x78
-#define BMIDECSR 0x79
-#define BMIDESR1 0x7A
-#define UDIDETCR1 0x7B
-#define DTPR1 0x7C
-
-static unsigned int init_chipset_cmd64x(struct pci_dev *, const char *);
-static void init_hwif_cmd64x(ide_hwif_t *);
-
-static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "CMD643",
- .init_chipset = init_chipset_cmd64x,
- .init_hwif = init_hwif_cmd64x,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 1 */
- .name = "CMD646",
- .init_chipset = init_chipset_cmd64x,
- .init_hwif = init_hwif_cmd64x,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x51,0x80,0x80}},
- .bootable = ON_BOARD,
- },{ /* 2 */
- .name = "CMD648",
- .init_chipset = init_chipset_cmd64x,
- .init_hwif = init_hwif_cmd64x,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{
- .name = "CMD649",
- .init_chipset = init_chipset_cmd64x,
- .init_hwif = init_hwif_cmd64x,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- }
-};
-
-#endif /* CMD64X_H */
+++ /dev/null
-#ifndef CS5520_H
-#define CS5520_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define DISPLAY_CS5520_TIMINGS
-
-static unsigned int init_chipset_cs5520(struct pci_dev *, const char *);
-static void init_hwif_cs5520(ide_hwif_t *);
-static void cs5520_init_setup_dma(struct pci_dev *dev, struct ide_pci_device_s *d, ide_hwif_t *hwif);
-
-static ide_pci_device_t cyrix_chipsets[] __devinitdata = {
- {
- .vendor = PCI_VENDOR_ID_CYRIX,
- .device = PCI_DEVICE_ID_CYRIX_5510,
- .name = "Cyrix 5510",
- .init_chipset = init_chipset_cs5520,
- .init_setup_dma = cs5520_init_setup_dma,
- .init_iops = NULL,
- .init_hwif = init_hwif_cs5520,
- .isa_ports = 1,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- .extra = 0,
- },
- {
- .vendor = PCI_VENDOR_ID_CYRIX,
- .device = PCI_DEVICE_ID_CYRIX_5520,
- .name = "Cyrix 5520",
- .init_chipset = init_chipset_cs5520,
- .init_setup_dma = cs5520_init_setup_dma,
- .init_iops = NULL,
- .init_hwif = init_hwif_cs5520,
- .isa_ports = 1,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- .extra = 0,
- }
-};
-
-
-#endif /* CS5520_H */
-
-
+++ /dev/null
-#ifndef CS5530_H
-#define CS5530_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define DISPLAY_CS5530_TIMINGS
-
-static unsigned int init_chipset_cs5530(struct pci_dev *, const char *);
-static void init_hwif_cs5530(ide_hwif_t *);
-
-static ide_pci_device_t cs5530_chipsets[] __devinitdata = {
- { /* 0 */
- .vendor = PCI_VENDOR_ID_CYRIX,
- .device = PCI_DEVICE_ID_CYRIX_5530_IDE,
- .name = "CS5530",
- .init_chipset = init_chipset_cs5530,
- .init_iops = NULL,
- .init_hwif = init_hwif_cs5530,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* CS5530_H */
+++ /dev/null
-#ifndef CY82C693_H
-#define CY82C693_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-/* the current version */
-#define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs (akrebs@altavista.net)"
-
-/*
- * The following are used to debug the driver.
- */
-#define CY82C693_DEBUG_LOGS 0
-#define CY82C693_DEBUG_INFO 0
-
-/* define CY82C693_SETDMA_CLOCK to set DMA Controller Clock Speed to ATCLK */
-#undef CY82C693_SETDMA_CLOCK
-
-/*
- * NOTE: the value for busmaster timeout is tricky and I got it by
- * trial and error! By using a to low value will cause DMA timeouts
- * and drop IDE performance, and by using a to high value will cause
- * audio playback to scatter.
- * If you know a better value or how to calc it, please let me know.
- */
-
-/* twice the value written in cy82c693ub datasheet */
-#define BUSMASTER_TIMEOUT 0x50
-/*
- * the value above was tested on my machine and it seems to work okay
- */
-
-/* here are the offset definitions for the registers */
-#define CY82_IDE_CMDREG 0x04
-#define CY82_IDE_ADDRSETUP 0x48
-#define CY82_IDE_MASTER_IOR 0x4C
-#define CY82_IDE_MASTER_IOW 0x4D
-#define CY82_IDE_SLAVE_IOR 0x4E
-#define CY82_IDE_SLAVE_IOW 0x4F
-#define CY82_IDE_MASTER_8BIT 0x50
-#define CY82_IDE_SLAVE_8BIT 0x51
-
-#define CY82_INDEX_PORT 0x22
-#define CY82_DATA_PORT 0x23
-
-#define CY82_INDEX_CTRLREG1 0x01
-#define CY82_INDEX_CHANNEL0 0x30
-#define CY82_INDEX_CHANNEL1 0x31
-#define CY82_INDEX_TIMEOUT 0x32
-
-/* the max PIO mode - from datasheet */
-#define CY82C693_MAX_PIO 4
-
-/* the min and max PCI bus speed in MHz - from datasheet */
-#define CY82C963_MIN_BUS_SPEED 25
-#define CY82C963_MAX_BUS_SPEED 33
-
-/* the struct for the PIO mode timings */
-typedef struct pio_clocks_s {
- u8 address_time; /* Address setup (clocks) */
- u8 time_16r; /* clocks for 16bit IOR (0xF0=Active/data, 0x0F=Recovery) */
- u8 time_16w; /* clocks for 16bit IOW (0xF0=Active/data, 0x0F=Recovery) */
- u8 time_8; /* clocks for 8bit (0xF0=Active/data, 0x0F=Recovery) */
-} pio_clocks_t;
-
-static unsigned int init_chipset_cy82c693(struct pci_dev *, const char *);
-static void init_hwif_cy82c693(ide_hwif_t *);
-static void init_iops_cy82c693(ide_hwif_t *);
-
-static ide_pci_device_t cy82c693_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "CY82C693",
- .init_chipset = init_chipset_cy82c693,
- .init_iops = init_iops_cy82c693,
- .init_hwif = init_hwif_cy82c693,
- .channels = 1,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- }
-};
-
-#endif /* CY82C693_H */
+++ /dev/null
-#ifndef IDE_GENERIC_H
-#define IDE_GENERIC_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static unsigned int init_chipset_generic(struct pci_dev *, const char *);
-static void init_hwif_generic(ide_hwif_t *);
-
-static ide_pci_device_t generic_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "NS87410",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}},
- .bootable = ON_BOARD,
- },{ /* 1 */
- .name = "SAMURAI",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 2 */
- .name = "HT6565",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 3 */
- .name = "UM8673F",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NODMA,
- .bootable = ON_BOARD,
- },{ /* 4 */
- .name = "UM8886A",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NODMA,
- .bootable = ON_BOARD,
- },{ /* 5 */
- .name = "UM8886BF",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NODMA,
- .bootable = ON_BOARD,
- },{ /* 6 */
- .name = "HINT_IDE",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 7 */
- .name = "VIA_IDE",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = ON_BOARD,
- },{ /* 8 */
- .name = "OPTI621V",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = ON_BOARD,
- },{ /* 9 */
- .name = "VIA8237SATA",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 10 */
- .name = "Piccolo0102",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = ON_BOARD,
- },{ /* 11 */
- .name = "Piccolo0103",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = ON_BOARD,
- },{ /* 12 */
- .name = "Piccolo0105",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = ON_BOARD,
- }
-};
-
-#if 0
-static ide_pci_device_t unknown_chipset[] __devinitdata = {
- { /* 0 */
- .name = "PCI_IDE",
- .init_chipset = init_chipset_generic,
- .init_hwif = init_hwif_generic,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- }
-};
-#endif
-
-#endif /* IDE_GENERIC_H */
+++ /dev/null
-#ifndef HPT34X_H
-#define HPT34X_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define HPT343_DEBUG_DRIVE_INFO 0
-
-#ifndef SPLIT_BYTE
-#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
-#endif
-
-static unsigned int init_chipset_hpt34x(struct pci_dev *, const char *);
-static void init_hwif_hpt34x(ide_hwif_t *);
-
-static ide_pci_device_t hpt34x_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "HPT34X",
- .init_chipset = init_chipset_hpt34x,
- .init_hwif = init_hwif_hpt34x,
- .channels = 2,
- .autodma = NOAUTODMA,
- .bootable = NEVER_BOARD,
- .extra = 16
- }
-};
-
-#endif /* HPT34X_H */
+++ /dev/null
-#ifndef HPT366_H
-#define HPT366_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-/* various tuning parameters */
-#define HPT_RESET_STATE_ENGINE
-#undef HPT_DELAY_INTERRUPT
-#undef HPT_SERIALIZE_IO
-
-static const char *quirk_drives[] = {
- "QUANTUM FIREBALLlct08 08",
- "QUANTUM FIREBALLP KA6.4",
- "QUANTUM FIREBALLP LM20.4",
- "QUANTUM FIREBALLP LM20.5",
- NULL
-};
-
-static const char *bad_ata100_5[] = {
- "IBM-DTLA-307075",
- "IBM-DTLA-307060",
- "IBM-DTLA-307045",
- "IBM-DTLA-307030",
- "IBM-DTLA-307020",
- "IBM-DTLA-307015",
- "IBM-DTLA-305040",
- "IBM-DTLA-305030",
- "IBM-DTLA-305020",
- "IC35L010AVER07-0",
- "IC35L020AVER07-0",
- "IC35L030AVER07-0",
- "IC35L040AVER07-0",
- "IC35L060AVER07-0",
- "WDC AC310200R",
- NULL
-};
-
-static const char *bad_ata66_4[] = {
- "IBM-DTLA-307075",
- "IBM-DTLA-307060",
- "IBM-DTLA-307045",
- "IBM-DTLA-307030",
- "IBM-DTLA-307020",
- "IBM-DTLA-307015",
- "IBM-DTLA-305040",
- "IBM-DTLA-305030",
- "IBM-DTLA-305020",
- "IC35L010AVER07-0",
- "IC35L020AVER07-0",
- "IC35L030AVER07-0",
- "IC35L040AVER07-0",
- "IC35L060AVER07-0",
- "WDC AC310200R",
- NULL
-};
-
-static const char *bad_ata66_3[] = {
- "WDC AC310200R",
- NULL
-};
-
-static const char *bad_ata33[] = {
- "Maxtor 92720U8", "Maxtor 92040U6", "Maxtor 91360U4", "Maxtor 91020U3", "Maxtor 90845U3", "Maxtor 90650U2",
- "Maxtor 91360D8", "Maxtor 91190D7", "Maxtor 91020D6", "Maxtor 90845D5", "Maxtor 90680D4", "Maxtor 90510D3", "Maxtor 90340D2",
- "Maxtor 91152D8", "Maxtor 91008D7", "Maxtor 90845D6", "Maxtor 90840D6", "Maxtor 90720D5", "Maxtor 90648D5", "Maxtor 90576D4",
- "Maxtor 90510D4",
- "Maxtor 90432D3", "Maxtor 90288D2", "Maxtor 90256D2",
- "Maxtor 91000D8", "Maxtor 90910D8", "Maxtor 90875D7", "Maxtor 90840D7", "Maxtor 90750D6", "Maxtor 90625D5", "Maxtor 90500D4",
- "Maxtor 91728D8", "Maxtor 91512D7", "Maxtor 91303D6", "Maxtor 91080D5", "Maxtor 90845D4", "Maxtor 90680D4", "Maxtor 90648D3", "Maxtor 90432D2",
- NULL
-};
-
-struct chipset_bus_clock_list_entry {
- byte xfer_speed;
- unsigned int chipset_settings;
-};
-
-/* key for bus clock timings
- * bit
- * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW
- * DMA. cycles = value + 1
- * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW
- * DMA. cycles = value + 1
- * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file
- * register access.
- * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file
- * register access.
- * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer.
- * during task file register access.
- * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA
- * xfer.
- * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task
- * register access.
- * 28 UDMA enable
- * 29 DMA enable
- * 30 PIO_MST enable. if set, the chip is in bus master mode during
- * PIO.
- * 31 FIFO enable.
- */
-static struct chipset_bus_clock_list_entry forty_base_hpt366[] = {
- { XFER_UDMA_4, 0x900fd943 },
- { XFER_UDMA_3, 0x900ad943 },
- { XFER_UDMA_2, 0x900bd943 },
- { XFER_UDMA_1, 0x9008d943 },
- { XFER_UDMA_0, 0x9008d943 },
-
- { XFER_MW_DMA_2, 0xa008d943 },
- { XFER_MW_DMA_1, 0xa010d955 },
- { XFER_MW_DMA_0, 0xa010d9fc },
-
- { XFER_PIO_4, 0xc008d963 },
- { XFER_PIO_3, 0xc010d974 },
- { XFER_PIO_2, 0xc010d997 },
- { XFER_PIO_1, 0xc010d9c7 },
- { XFER_PIO_0, 0xc018d9d9 },
- { 0, 0x0120d9d9 }
-};
-
-static struct chipset_bus_clock_list_entry thirty_three_base_hpt366[] = {
- { XFER_UDMA_4, 0x90c9a731 },
- { XFER_UDMA_3, 0x90cfa731 },
- { XFER_UDMA_2, 0x90caa731 },
- { XFER_UDMA_1, 0x90cba731 },
- { XFER_UDMA_0, 0x90c8a731 },
-
- { XFER_MW_DMA_2, 0xa0c8a731 },
- { XFER_MW_DMA_1, 0xa0c8a732 }, /* 0xa0c8a733 */
- { XFER_MW_DMA_0, 0xa0c8a797 },
-
- { XFER_PIO_4, 0xc0c8a731 },
- { XFER_PIO_3, 0xc0c8a742 },
- { XFER_PIO_2, 0xc0d0a753 },
- { XFER_PIO_1, 0xc0d0a7a3 }, /* 0xc0d0a793 */
- { XFER_PIO_0, 0xc0d0a7aa }, /* 0xc0d0a7a7 */
- { 0, 0x0120a7a7 }
-};
-
-static struct chipset_bus_clock_list_entry twenty_five_base_hpt366[] = {
-
- { XFER_UDMA_4, 0x90c98521 },
- { XFER_UDMA_3, 0x90cf8521 },
- { XFER_UDMA_2, 0x90cf8521 },
- { XFER_UDMA_1, 0x90cb8521 },
- { XFER_UDMA_0, 0x90cb8521 },
-
- { XFER_MW_DMA_2, 0xa0ca8521 },
- { XFER_MW_DMA_1, 0xa0ca8532 },
- { XFER_MW_DMA_0, 0xa0ca8575 },
-
- { XFER_PIO_4, 0xc0ca8521 },
- { XFER_PIO_3, 0xc0ca8532 },
- { XFER_PIO_2, 0xc0ca8542 },
- { XFER_PIO_1, 0xc0d08572 },
- { XFER_PIO_0, 0xc0d08585 },
- { 0, 0x01208585 }
-};
-
-/* from highpoint documentation. these are old values */
-static struct chipset_bus_clock_list_entry thirty_three_base_hpt370[] = {
-/* { XFER_UDMA_5, 0x1A85F442, 0x16454e31 }, */
- { XFER_UDMA_5, 0x16454e31 },
- { XFER_UDMA_4, 0x16454e31 },
- { XFER_UDMA_3, 0x166d4e31 },
- { XFER_UDMA_2, 0x16494e31 },
- { XFER_UDMA_1, 0x164d4e31 },
- { XFER_UDMA_0, 0x16514e31 },
-
- { XFER_MW_DMA_2, 0x26514e21 },
- { XFER_MW_DMA_1, 0x26514e33 },
- { XFER_MW_DMA_0, 0x26514e97 },
-
- { XFER_PIO_4, 0x06514e21 },
- { XFER_PIO_3, 0x06514e22 },
- { XFER_PIO_2, 0x06514e33 },
- { XFER_PIO_1, 0x06914e43 },
- { XFER_PIO_0, 0x06914e57 },
- { 0, 0x06514e57 }
-};
-
-static struct chipset_bus_clock_list_entry sixty_six_base_hpt370[] = {
- { XFER_UDMA_5, 0x14846231 },
- { XFER_UDMA_4, 0x14886231 },
- { XFER_UDMA_3, 0x148c6231 },
- { XFER_UDMA_2, 0x148c6231 },
- { XFER_UDMA_1, 0x14906231 },
- { XFER_UDMA_0, 0x14986231 },
-
- { XFER_MW_DMA_2, 0x26514e21 },
- { XFER_MW_DMA_1, 0x26514e33 },
- { XFER_MW_DMA_0, 0x26514e97 },
-
- { XFER_PIO_4, 0x06514e21 },
- { XFER_PIO_3, 0x06514e22 },
- { XFER_PIO_2, 0x06514e33 },
- { XFER_PIO_1, 0x06914e43 },
- { XFER_PIO_0, 0x06914e57 },
- { 0, 0x06514e57 }
-};
-
-/* these are the current (4 sep 2001) timings from highpoint */
-static struct chipset_bus_clock_list_entry thirty_three_base_hpt370a[] = {
- { XFER_UDMA_5, 0x12446231 },
- { XFER_UDMA_4, 0x12446231 },
- { XFER_UDMA_3, 0x126c6231 },
- { XFER_UDMA_2, 0x12486231 },
- { XFER_UDMA_1, 0x124c6233 },
- { XFER_UDMA_0, 0x12506297 },
-
- { XFER_MW_DMA_2, 0x22406c31 },
- { XFER_MW_DMA_1, 0x22406c33 },
- { XFER_MW_DMA_0, 0x22406c97 },
-
- { XFER_PIO_4, 0x06414e31 },
- { XFER_PIO_3, 0x06414e42 },
- { XFER_PIO_2, 0x06414e53 },
- { XFER_PIO_1, 0x06814e93 },
- { XFER_PIO_0, 0x06814ea7 },
- { 0, 0x06814ea7 }
-};
-
-/* 2x 33MHz timings */
-static struct chipset_bus_clock_list_entry sixty_six_base_hpt370a[] = {
- { XFER_UDMA_5, 0x1488e673 },
- { XFER_UDMA_4, 0x1488e673 },
- { XFER_UDMA_3, 0x1498e673 },
- { XFER_UDMA_2, 0x1490e673 },
- { XFER_UDMA_1, 0x1498e677 },
- { XFER_UDMA_0, 0x14a0e73f },
-
- { XFER_MW_DMA_2, 0x2480fa73 },
- { XFER_MW_DMA_1, 0x2480fa77 },
- { XFER_MW_DMA_0, 0x2480fb3f },
-
- { XFER_PIO_4, 0x0c82be73 },
- { XFER_PIO_3, 0x0c82be95 },
- { XFER_PIO_2, 0x0c82beb7 },
- { XFER_PIO_1, 0x0d02bf37 },
- { XFER_PIO_0, 0x0d02bf5f },
- { 0, 0x0d02bf5f }
-};
-
-static struct chipset_bus_clock_list_entry fifty_base_hpt370a[] = {
- { XFER_UDMA_5, 0x12848242 },
- { XFER_UDMA_4, 0x12ac8242 },
- { XFER_UDMA_3, 0x128c8242 },
- { XFER_UDMA_2, 0x120c8242 },
- { XFER_UDMA_1, 0x12148254 },
- { XFER_UDMA_0, 0x121882ea },
-
- { XFER_MW_DMA_2, 0x22808242 },
- { XFER_MW_DMA_1, 0x22808254 },
- { XFER_MW_DMA_0, 0x228082ea },
-
- { XFER_PIO_4, 0x0a81f442 },
- { XFER_PIO_3, 0x0a81f443 },
- { XFER_PIO_2, 0x0a81f454 },
- { XFER_PIO_1, 0x0ac1f465 },
- { XFER_PIO_0, 0x0ac1f48a },
- { 0, 0x0ac1f48a }
-};
-
-static struct chipset_bus_clock_list_entry thirty_three_base_hpt372[] = {
- { XFER_UDMA_6, 0x1c81dc62 },
- { XFER_UDMA_5, 0x1c6ddc62 },
- { XFER_UDMA_4, 0x1c8ddc62 },
- { XFER_UDMA_3, 0x1c8edc62 }, /* checkme */
- { XFER_UDMA_2, 0x1c91dc62 },
- { XFER_UDMA_1, 0x1c9adc62 }, /* checkme */
- { XFER_UDMA_0, 0x1c82dc62 }, /* checkme */
-
- { XFER_MW_DMA_2, 0x2c829262 },
- { XFER_MW_DMA_1, 0x2c829266 }, /* checkme */
- { XFER_MW_DMA_0, 0x2c82922e }, /* checkme */
-
- { XFER_PIO_4, 0x0c829c62 },
- { XFER_PIO_3, 0x0c829c84 },
- { XFER_PIO_2, 0x0c829ca6 },
- { XFER_PIO_1, 0x0d029d26 },
- { XFER_PIO_0, 0x0d029d5e },
- { 0, 0x0d029d5e }
-};
-
-static struct chipset_bus_clock_list_entry fifty_base_hpt372[] = {
- { XFER_UDMA_5, 0x12848242 },
- { XFER_UDMA_4, 0x12ac8242 },
- { XFER_UDMA_3, 0x128c8242 },
- { XFER_UDMA_2, 0x120c8242 },
- { XFER_UDMA_1, 0x12148254 },
- { XFER_UDMA_0, 0x121882ea },
-
- { XFER_MW_DMA_2, 0x22808242 },
- { XFER_MW_DMA_1, 0x22808254 },
- { XFER_MW_DMA_0, 0x228082ea },
-
- { XFER_PIO_4, 0x0a81f442 },
- { XFER_PIO_3, 0x0a81f443 },
- { XFER_PIO_2, 0x0a81f454 },
- { XFER_PIO_1, 0x0ac1f465 },
- { XFER_PIO_0, 0x0ac1f48a },
- { 0, 0x0a81f443 }
-};
-
-static struct chipset_bus_clock_list_entry sixty_six_base_hpt372[] = {
- { XFER_UDMA_6, 0x1c869c62 },
- { XFER_UDMA_5, 0x1cae9c62 },
- { XFER_UDMA_4, 0x1c8a9c62 },
- { XFER_UDMA_3, 0x1c8e9c62 },
- { XFER_UDMA_2, 0x1c929c62 },
- { XFER_UDMA_1, 0x1c9a9c62 },
- { XFER_UDMA_0, 0x1c829c62 },
-
- { XFER_MW_DMA_2, 0x2c829c62 },
- { XFER_MW_DMA_1, 0x2c829c66 },
- { XFER_MW_DMA_0, 0x2c829d2e },
-
- { XFER_PIO_4, 0x0c829c62 },
- { XFER_PIO_3, 0x0c829c84 },
- { XFER_PIO_2, 0x0c829ca6 },
- { XFER_PIO_1, 0x0d029d26 },
- { XFER_PIO_0, 0x0d029d5e },
- { 0, 0x0d029d26 }
-};
-
-static struct chipset_bus_clock_list_entry thirty_three_base_hpt374[] = {
- { XFER_UDMA_6, 0x12808242 },
- { XFER_UDMA_5, 0x12848242 },
- { XFER_UDMA_4, 0x12ac8242 },
- { XFER_UDMA_3, 0x128c8242 },
- { XFER_UDMA_2, 0x120c8242 },
- { XFER_UDMA_1, 0x12148254 },
- { XFER_UDMA_0, 0x121882ea },
-
- { XFER_MW_DMA_2, 0x22808242 },
- { XFER_MW_DMA_1, 0x22808254 },
- { XFER_MW_DMA_0, 0x228082ea },
-
- { XFER_PIO_4, 0x0a81f442 },
- { XFER_PIO_3, 0x0a81f443 },
- { XFER_PIO_2, 0x0a81f454 },
- { XFER_PIO_1, 0x0ac1f465 },
- { XFER_PIO_0, 0x0ac1f48a },
- { 0, 0x06814e93 }
-};
-
-#if 0
-static struct chipset_bus_clock_list_entry fifty_base_hpt374[] = {
- { XFER_UDMA_6, },
- { XFER_UDMA_5, },
- { XFER_UDMA_4, },
- { XFER_UDMA_3, },
- { XFER_UDMA_2, },
- { XFER_UDMA_1, },
- { XFER_UDMA_0, },
- { XFER_MW_DMA_2, },
- { XFER_MW_DMA_1, },
- { XFER_MW_DMA_0, },
- { XFER_PIO_4, },
- { XFER_PIO_3, },
- { XFER_PIO_2, },
- { XFER_PIO_1, },
- { XFER_PIO_0, },
- { 0, }
-};
-#endif
-#if 0
-static struct chipset_bus_clock_list_entry sixty_six_base_hpt374[] = {
- { XFER_UDMA_6, 0x12406231 }, /* checkme */
- { XFER_UDMA_5, 0x12446231 },
- 0x14846231
- { XFER_UDMA_4, 0x16814ea7 },
- 0x14886231
- { XFER_UDMA_3, 0x16814ea7 },
- 0x148c6231
- { XFER_UDMA_2, 0x16814ea7 },
- 0x148c6231
- { XFER_UDMA_1, 0x16814ea7 },
- 0x14906231
- { XFER_UDMA_0, 0x16814ea7 },
- 0x14986231
- { XFER_MW_DMA_2, 0x16814ea7 },
- 0x26514e21
- { XFER_MW_DMA_1, 0x16814ea7 },
- 0x26514e97
- { XFER_MW_DMA_0, 0x16814ea7 },
- 0x26514e97
- { XFER_PIO_4, 0x06814ea7 },
- 0x06514e21
- { XFER_PIO_3, 0x06814ea7 },
- 0x06514e22
- { XFER_PIO_2, 0x06814ea7 },
- 0x06514e33
- { XFER_PIO_1, 0x06814ea7 },
- 0x06914e43
- { XFER_PIO_0, 0x06814ea7 },
- 0x06914e57
- { 0, 0x06814ea7 }
-};
-#endif
-
-#define HPT366_DEBUG_DRIVE_INFO 0
-#define HPT374_ALLOW_ATA133_6 0
-#define HPT371_ALLOW_ATA133_6 0
-#define HPT302_ALLOW_ATA133_6 0
-#define HPT372_ALLOW_ATA133_6 1
-#define HPT370_ALLOW_ATA100_5 1
-#define HPT366_ALLOW_ATA66_4 1
-#define HPT366_ALLOW_ATA66_3 1
-#define HPT366_MAX_DEVS 8
-
-#define F_LOW_PCI_33 0x23
-#define F_LOW_PCI_40 0x29
-#define F_LOW_PCI_50 0x2d
-#define F_LOW_PCI_66 0x42
-
-static void init_setup_hpt366(struct pci_dev *, ide_pci_device_t *);
-static void init_setup_hpt37x(struct pci_dev *, ide_pci_device_t *);
-static void init_setup_hpt374(struct pci_dev *, ide_pci_device_t *);
-static unsigned int init_chipset_hpt366(struct pci_dev *, const char *);
-static void init_hwif_hpt366(ide_hwif_t *);
-static void init_dma_hpt366(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "HPT366",
- .init_setup = init_setup_hpt366,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- .extra = 240
- },{ /* 1 */
- .name = "HPT372A",
- .init_setup = init_setup_hpt37x,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 2 */
- .name = "HPT302",
- .init_setup = init_setup_hpt37x,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 3 */
- .name = "HPT371",
- .init_setup = init_setup_hpt37x,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 4 */
- .name = "HPT374",
- .init_setup = init_setup_hpt374,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2, /* 4 */
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 5 */
- .name = "HPT372N",
- .init_setup = init_setup_hpt37x,
- .init_chipset = init_chipset_hpt366,
- .init_hwif = init_hwif_hpt366,
- .init_dma = init_dma_hpt366,
- .channels = 2, /* 4 */
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- }
-};
-
-#endif /* HPT366_H */
+++ /dev/null
-#ifndef ITE8172G_H
-#define ITE8172G_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static u8 it8172_ratemask(ide_drive_t *drive);
-static u8 it8172_ratefilter(ide_drive_t *drive, u8 speed);
-static void it8172_tune_drive(ide_drive_t *drive, u8 pio);
-static u8 it8172_dma_2_pio(u8 xfer_rate);
-static int it8172_tune_chipset(ide_drive_t *drive, u8 xferspeed);
-#ifdef CONFIG_BLK_DEV_IDEDMA
-static int it8172_config_chipset_for_dma(ide_drive_t *drive);
-#endif
-
-static void init_setup_it8172(struct pci_dev *, ide_pci_device_t *);
-static unsigned int init_chipset_it8172(struct pci_dev *, const char *);
-static void init_hwif_it8172(ide_hwif_t *);
-
-static ide_pci_device_t it8172_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "IT8172G",
- .init_setup = init_setup_it8172,
- .init_chipset = init_chipset_it8172,
- .init_hwif = init_hwif_it8172,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x40,0x00,0x01}},
- .bootable = ON_BOARD,
- }
-};
-
-#endif /* ITE8172G_H */
+++ /dev/null
-#ifndef NS87415_H
-#define NS87415_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static void init_hwif_ns87415(ide_hwif_t *);
-
-static ide_pci_device_t ns87415_chipsets[] __devinitdata = {
- { /* 0 */
- .vendor = PCI_VENDOR_ID_NS,
- .device = PCI_DEVICE_ID_NS_87415,
- .name = "NS87415",
- .init_chipset = NULL,
- .init_iops = NULL,
- .init_hwif = init_hwif_ns87415,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* NS87415_H */
+++ /dev/null
-#ifndef OPTI621_H
-#define OPTI621_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static void init_setup_opti621(struct pci_dev *, ide_pci_device_t *);
-static void init_hwif_opti621(ide_hwif_t *);
-
-static ide_pci_device_t opti621_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "OPTI621",
- .init_setup = init_setup_opti621,
- .init_hwif = init_hwif_opti621,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
- .bootable = ON_BOARD,
- },{ /* 1 */
- .name = "OPTI621X",
- .init_setup = init_setup_opti621,
- .init_hwif = init_hwif_opti621,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
- .bootable = ON_BOARD,
- }
-};
-
-#endif /* OPTI621_H */
+++ /dev/null
-#ifndef PDC202XX_H
-#define PDC202XX_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-const static char *pdc_quirk_drives[] = {
- "QUANTUM FIREBALLlct08 08",
- "QUANTUM FIREBALLP KA6.4",
- "QUANTUM FIREBALLP KA9.1",
- "QUANTUM FIREBALLP LM20.4",
- "QUANTUM FIREBALLP KX13.6",
- "QUANTUM FIREBALLP KX20.5",
- "QUANTUM FIREBALLP KX27.3",
- "QUANTUM FIREBALLP LM20.5",
- NULL
-};
-
-#define set_2regs(a, b) \
- do { \
- hwif->OUTB((a + adj), indexreg); \
- hwif->OUTB(b, datareg); \
- } while(0)
-
-#define set_ultra(a, b, c) \
- do { \
- set_2regs(0x10,(a)); \
- set_2regs(0x11,(b)); \
- set_2regs(0x12,(c)); \
- } while(0)
-
-#define set_ata2(a, b) \
- do { \
- set_2regs(0x0e,(a)); \
- set_2regs(0x0f,(b)); \
- } while(0)
-
-#define set_pio(a, b, c) \
- do { \
- set_2regs(0x0c,(a)); \
- set_2regs(0x0d,(b)); \
- set_2regs(0x13,(c)); \
- } while(0)
-
-static void init_setup_pdcnew(struct pci_dev *, ide_pci_device_t *);
-static void init_setup_pdc20270(struct pci_dev *, ide_pci_device_t *);
-static void init_setup_pdc20276(struct pci_dev *dev, ide_pci_device_t *d);
-static unsigned int init_chipset_pdcnew(struct pci_dev *, const char *);
-static void init_hwif_pdc202new(ide_hwif_t *);
-
-static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "PDC20268",
- .init_setup = init_setup_pdcnew,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 1 */
- .name = "PDC20269",
- .init_setup = init_setup_pdcnew,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 2 */
- .name = "PDC20270",
- .init_setup = init_setup_pdc20270,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- },{ /* 3 */
- .name = "PDC20271",
- .init_setup = init_setup_pdcnew,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 4 */
- .name = "PDC20275",
- .init_setup = init_setup_pdcnew,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- },{ /* 5 */
- .name = "PDC20276",
- .init_setup = init_setup_pdc20276,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- },{ /* 6 */
- .name = "PDC20277",
- .init_setup = init_setup_pdcnew,
- .init_chipset = init_chipset_pdcnew,
- .init_hwif = init_hwif_pdc202new,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = OFF_BOARD,
- }
-};
-
-#endif /* PDC202XX_H */
+++ /dev/null
-#ifndef PDC202XX_H
-#define PDC202XX_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#ifndef SPLIT_BYTE
-#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
-#endif
-
-#define PDC202XX_DEBUG_DRIVE_INFO 0
-
-static const char *pdc_quirk_drives[] = {
- "QUANTUM FIREBALLlct08 08",
- "QUANTUM FIREBALLP KA6.4",
- "QUANTUM FIREBALLP KA9.1",
- "QUANTUM FIREBALLP LM20.4",
- "QUANTUM FIREBALLP KX13.6",
- "QUANTUM FIREBALLP KX20.5",
- "QUANTUM FIREBALLP KX27.3",
- "QUANTUM FIREBALLP LM20.5",
- NULL
-};
-
-/* A Register */
-#define SYNC_ERRDY_EN 0xC0
-
-#define SYNC_IN 0x80 /* control bit, different for master vs. slave drives */
-#define ERRDY_EN 0x40 /* control bit, different for master vs. slave drives */
-#define IORDY_EN 0x20 /* PIO: IOREADY */
-#define PREFETCH_EN 0x10 /* PIO: PREFETCH */
-
-#define PA3 0x08 /* PIO"A" timing */
-#define PA2 0x04 /* PIO"A" timing */
-#define PA1 0x02 /* PIO"A" timing */
-#define PA0 0x01 /* PIO"A" timing */
-
-/* B Register */
-
-#define MB2 0x80 /* DMA"B" timing */
-#define MB1 0x40 /* DMA"B" timing */
-#define MB0 0x20 /* DMA"B" timing */
-
-#define PB4 0x10 /* PIO_FORCE 1:0 */
-
-#define PB3 0x08 /* PIO"B" timing */ /* PIO flow Control mode */
-#define PB2 0x04 /* PIO"B" timing */ /* PIO 4 */
-#define PB1 0x02 /* PIO"B" timing */ /* PIO 3 half */
-#define PB0 0x01 /* PIO"B" timing */ /* PIO 3 other half */
-
-/* C Register */
-#define IORDYp_NO_SPEED 0x4F
-#define SPEED_DIS 0x0F
-
-#define DMARQp 0x80
-#define IORDYp 0x40
-#define DMAR_EN 0x20
-#define DMAW_EN 0x10
-
-#define MC3 0x08 /* DMA"C" timing */
-#define MC2 0x04 /* DMA"C" timing */
-#define MC1 0x02 /* DMA"C" timing */
-#define MC0 0x01 /* DMA"C" timing */
-
-static void init_setup_pdc202ata4(struct pci_dev *dev, ide_pci_device_t *d);
-static void init_setup_pdc20265(struct pci_dev *, ide_pci_device_t *);
-static void init_setup_pdc202xx(struct pci_dev *, ide_pci_device_t *);
-static unsigned int init_chipset_pdc202xx(struct pci_dev *, const char *);
-static void init_hwif_pdc202xx(ide_hwif_t *);
-static void init_dma_pdc202xx(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "PDC20246",
- .init_setup = init_setup_pdc202ata4,
- .init_chipset = init_chipset_pdc202xx,
- .init_hwif = init_hwif_pdc202xx,
- .init_dma = init_dma_pdc202xx,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- .extra = 16,
- },{ /* 1 */
- .name = "PDC20262",
- .init_setup = init_setup_pdc202ata4,
- .init_chipset = init_chipset_pdc202xx,
- .init_hwif = init_hwif_pdc202xx,
- .init_dma = init_dma_pdc202xx,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- .extra = 48,
- .flags = IDEPCI_FLAG_FORCE_PDC,
- },{ /* 2 */
- .name = "PDC20263",
- .init_setup = init_setup_pdc202ata4,
- .init_chipset = init_chipset_pdc202xx,
- .init_hwif = init_hwif_pdc202xx,
- .init_dma = init_dma_pdc202xx,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- .extra = 48,
- },{ /* 3 */
- .name = "PDC20265",
- .init_setup = init_setup_pdc20265,
- .init_chipset = init_chipset_pdc202xx,
- .init_hwif = init_hwif_pdc202xx,
- .init_dma = init_dma_pdc202xx,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- .extra = 48,
- .flags = IDEPCI_FLAG_FORCE_PDC,
- },{ /* 4 */
- .name = "PDC20267",
- .init_setup = init_setup_pdc202xx,
- .init_chipset = init_chipset_pdc202xx,
- .init_hwif = init_hwif_pdc202xx,
- .init_dma = init_dma_pdc202xx,
- .channels = 2,
- .autodma = AUTODMA,
-#ifndef CONFIG_PDC202XX_FORCE
- .enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
-#endif
- .bootable = OFF_BOARD,
- .extra = 48,
- }
-};
-
-#endif /* PDC202XX_H */
+++ /dev/null
-#ifndef PIIX_H
-#define PIIX_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static void init_setup_piix(struct pci_dev *, ide_pci_device_t *);
-static unsigned int __devinit init_chipset_piix(struct pci_dev *, const char *);
-static void init_hwif_piix(ide_hwif_t *);
-
-#define DECLARE_PIIX_DEV(name_str) \
- { \
- .name = name_str, \
- .init_setup = init_setup_piix, \
- .init_chipset = init_chipset_piix, \
- .init_hwif = init_hwif_piix, \
- .channels = 2, \
- .autodma = AUTODMA, \
- .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
- .bootable = ON_BOARD, \
- }
-
-/*
- * Table of the various PIIX capability blocks
- *
- */
-
-static ide_pci_device_t piix_pci_info[] __devinitdata = {
- /* 0 */ DECLARE_PIIX_DEV("PIIXa"),
- /* 1 */ DECLARE_PIIX_DEV("PIIXb"),
-
- { /* 2 */
- .name = "MPIIX",
- .init_setup = init_setup_piix,
- .init_hwif = init_hwif_piix,
- .channels = 2,
- .autodma = NODMA,
- .enablebits = {{0x6D,0x80,0x80}, {0x6F,0x80,0x80}},
- .bootable = ON_BOARD,
- },
-
- /* 3 */ DECLARE_PIIX_DEV("PIIX3"),
- /* 4 */ DECLARE_PIIX_DEV("PIIX4"),
- /* 5 */ DECLARE_PIIX_DEV("ICH0"),
- /* 6 */ DECLARE_PIIX_DEV("PIIX4"),
- /* 7 */ DECLARE_PIIX_DEV("ICH"),
- /* 8 */ DECLARE_PIIX_DEV("PIIX4"),
- /* 9 */ DECLARE_PIIX_DEV("PIIX4"),
- /* 10 */ DECLARE_PIIX_DEV("ICH2"),
- /* 11 */ DECLARE_PIIX_DEV("ICH2M"),
- /* 12 */ DECLARE_PIIX_DEV("ICH3M"),
- /* 13 */ DECLARE_PIIX_DEV("ICH3"),
- /* 14 */ DECLARE_PIIX_DEV("ICH4"),
- /* 15 */ DECLARE_PIIX_DEV("ICH5"),
- /* 16 */ DECLARE_PIIX_DEV("C-ICH"),
- /* 17 */ DECLARE_PIIX_DEV("ICH4"),
- /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA"),
- /* 19 */ DECLARE_PIIX_DEV("ICH5"),
- /* 20 */ DECLARE_PIIX_DEV("ICH6")
-};
-
-#endif /* PIIX_H */
+++ /dev/null
-#ifndef RZ100X_H
-#define RZ100X_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static void init_hwif_rz1000(ide_hwif_t *);
-
-static ide_pci_device_t rz1000_chipsets[] __devinitdata = {
-{
- .vendor = PCI_VENDOR_ID_PCTECH,
- .device = PCI_DEVICE_ID_PCTECH_RZ1000,
- .name = "RZ1000",
- .init_chipset = NULL,
- .init_iops = NULL,
- .init_hwif = init_hwif_rz1000,
- .init_dma = NULL,
- .channels = 2,
- .autodma = NODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{
- .vendor = PCI_VENDOR_ID_PCTECH,
- .device = PCI_DEVICE_ID_PCTECH_RZ1001,
- .name = "RZ1001",
- .init_chipset = NULL,
- .init_iops = NULL,
- .init_hwif = init_hwif_rz1000,
- .init_dma = NULL,
- .channels = 2,
- .autodma = NODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* RZ100X_H */
+++ /dev/null
-#ifndef SC1200_H
-#define SC1200_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define DISPLAY_SC1200_TIMINGS
-
-static unsigned int init_chipset_sc1200(struct pci_dev *, const char *);
-static void init_hwif_sc1200(ide_hwif_t *);
-
-static ide_pci_device_t sc1200_chipsets[] __devinitdata = {
- { /* 0 */
- .vendor = PCI_VENDOR_ID_NS,
- .device = PCI_DEVICE_ID_NS_SCx200_IDE,
- .name = "SC1200",
- .init_chipset = init_chipset_sc1200,
- .init_iops = NULL,
- .init_hwif = init_hwif_sc1200,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* SC1200_H */
+++ /dev/null
-
-#ifndef SERVERWORKS_H
-#define SERVERWORKS_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#undef SVWKS_DEBUG_DRIVE_INFO
-
-#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
-#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
-
-/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
- * can overrun their FIFOs when used with the CSB5 */
-static const char *svwks_bad_ata100[] = {
- "ST320011A",
- "ST340016A",
- "ST360021A",
- "ST380021A",
- NULL
-};
-
-static void init_setup_svwks(struct pci_dev *, ide_pci_device_t *);
-static void init_setup_csb6(struct pci_dev *, ide_pci_device_t *);
-static unsigned int init_chipset_svwks(struct pci_dev *, const char *);
-static void init_hwif_svwks(ide_hwif_t *);
-static void init_dma_svwks(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "SvrWks OSB4",
- .init_setup = init_setup_svwks,
- .init_chipset = init_chipset_svwks,
- .init_hwif = init_hwif_svwks,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 1 */
- .name = "SvrWks CSB5",
- .init_setup = init_setup_svwks,
- .init_chipset = init_chipset_svwks,
- .init_hwif = init_hwif_svwks,
- .init_dma = init_dma_svwks,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 2 */
- .name = "SvrWks CSB6",
- .init_setup = init_setup_csb6,
- .init_chipset = init_chipset_svwks,
- .init_hwif = init_hwif_svwks,
- .init_dma = init_dma_svwks,
- .channels = 2,
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- },{ /* 3 */
- .name = "SvrWks CSB6",
- .init_setup = init_setup_csb6,
- .init_chipset = init_chipset_svwks,
- .init_hwif = init_hwif_svwks,
- .init_dma = init_dma_svwks,
- .channels = 1, /* 2 */
- .autodma = AUTODMA,
- .bootable = ON_BOARD,
- }
-};
-
-#endif /* SERVERWORKS_H */
+++ /dev/null
-#ifndef SIIMAGE_H
-#define SIIMAGE_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#include <asm/io.h>
-
-#define DISPLAY_SIIMAGE_TIMINGS
-
-#undef SIIMAGE_VIRTUAL_DMAPIO
-#undef SIIMAGE_BUFFERED_TASKFILE
-#undef SIIMAGE_LARGE_DMA
-
-#define SII_DEBUG 0
-
-#if SII_DEBUG
-#define siiprintk(x...) printk(x)
-#else
-#define siiprintk(x...)
-#endif
-
-static unsigned int init_chipset_siimage(struct pci_dev *, const char *);
-static void init_iops_siimage(ide_hwif_t *);
-static void init_hwif_siimage(ide_hwif_t *);
-
-static ide_pci_device_t siimage_chipsets[] __devinitdata = {
- { /* 0 */
- .vendor = PCI_VENDOR_ID_CMD,
- .device = PCI_DEVICE_ID_SII_680,
- .name = "SiI680",
- .init_chipset = init_chipset_siimage,
- .init_iops = init_iops_siimage,
- .init_hwif = init_hwif_siimage,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{ /* 1 */
- .vendor = PCI_VENDOR_ID_CMD,
- .device = PCI_DEVICE_ID_SII_3112,
- .name = "SiI3112 Serial ATA",
- .init_chipset = init_chipset_siimage,
- .init_iops = init_iops_siimage,
- .init_hwif = init_hwif_siimage,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{ /* 2 */
- .vendor = PCI_VENDOR_ID_CMD,
- .device = PCI_DEVICE_ID_SII_1210SA,
- .name = "Adaptec AAR-1210SA",
- .init_chipset = init_chipset_siimage,
- .init_iops = init_iops_siimage,
- .init_hwif = init_hwif_siimage,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* SIIMAGE_H */
+++ /dev/null
-#ifndef SIS5513_H
-#define SIS5513_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define DISPLAY_SIS_TIMINGS
-
-static unsigned int init_chipset_sis5513(struct pci_dev *, const char *);
-static void init_hwif_sis5513(ide_hwif_t *);
-
-static ide_pci_device_t sis5513_chipsets[] __devinitdata = {
- { /* 0 */
- .vendor = PCI_VENDOR_ID_SI,
- .device = PCI_DEVICE_ID_SI_5513,
- .name = "SIS5513",
- .init_chipset = init_chipset_sis5513,
- .init_iops = NULL,
- .init_hwif = init_hwif_sis5513,
- .channels = 2,
- .autodma = NOAUTODMA,
- .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
- .bootable = ON_BOARD,
- .extra = 0
- },{
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* SIS5513_H */
+++ /dev/null
-#ifndef W82C105_H
-#define W82C105_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static unsigned int init_chipset_sl82c105(struct pci_dev *, const char *);
-static void init_hwif_sl82c105(ide_hwif_t *);
-static void init_dma_sl82c105(ide_hwif_t *, unsigned long);
-
-static ide_pci_device_t sl82c105_chipsets[] __devinitdata = {
- { /* 0 */
- .vendor = PCI_VENDOR_ID_WINBOND,
- .device = PCI_DEVICE_ID_WINBOND_82C105,
- .name = "W82C105",
- .init_chipset = init_chipset_sl82c105,
- .init_iops = NULL,
- .init_hwif = init_hwif_sl82c105,
- .init_dma = init_dma_sl82c105,
- .channels = 2,
- .autodma = NOAUTODMA,
- .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* W82C105_H */
+++ /dev/null
-#ifndef SLC90E66_H
-#define SLC90E66_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define DISPLAY_SLC90E66_TIMINGS
-
-#define SLC90E66_DEBUG_DRIVE_INFO 0
-
-static unsigned int init_chipset_slc90e66(struct pci_dev *, const char *);
-static void init_hwif_slc90e66(ide_hwif_t *);
-
-static ide_pci_device_t slc90e66_chipsets[] __devinitdata = {
- { /* 0 */
- .vendor = PCI_VENDOR_ID_EFAR,
- .device = PCI_DEVICE_ID_EFAR_SLC90E66_1,
- .name = "SLC90E66",
- .init_chipset = init_chipset_slc90e66,
- .init_iops = NULL,
- .init_hwif = init_hwif_slc90e66,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* SLC90E66_H */
+++ /dev/null
-/*
- * triflex.h
- *
- * Copyright (C) 2002 Hewlett-Packard Development Group, L.P.
- * Author: Torben Mathiasen <torben.mathiasen@hp.com>
- *
- */
-#ifndef TRIFLEX_H
-#define TRIFLEX_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-static unsigned int __devinit init_chipset_triflex(struct pci_dev *, const char *);
-static void init_hwif_triflex(ide_hwif_t *);
-
-static ide_pci_device_t triflex_devices[] __devinitdata = {
- {
- .vendor = PCI_VENDOR_ID_COMPAQ,
- .device = PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE,
- .name = "TRIFLEX",
- .init_chipset = init_chipset_triflex,
- .init_iops = NULL,
- .init_hwif = init_hwif_triflex,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}},
- .bootable = ON_BOARD,
- },{
- .bootable = EOL,
- }
-};
-
-static struct pci_device_id triflex_pci_tbl[] = {
- { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE, PCI_ANY_ID,
- PCI_ANY_ID, 0, 0, 0 },
- { 0, },
-};
-MODULE_DEVICE_TABLE(pci, triflex_pci_tbl);
-
-#endif /* TRIFLEX_H */
+++ /dev/null
-#ifndef TRM290_H
-#define TRM290_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-extern void init_hwif_trm290(ide_hwif_t *);
-
-static ide_pci_device_t trm290_chipsets[] __devinitdata = {
- { /* 0 */
- .vendor = PCI_VENDOR_ID_TEKRAM,
- .device = PCI_DEVICE_ID_TEKRAM_DC290,
- .name = "TRM290",
- .init_chipset = NULL,
- .init_iops = NULL,
- .init_hwif = init_hwif_trm290,
- .init_dma = NULL,
- .channels = 2,
- .autodma = NOAUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* TRM290_H */
+++ /dev/null
-#ifndef VIA82CXXX_H
-#define VIA82CXXX_H
-
-#include <linux/config.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-#define DISPLAY_VIA_TIMINGS
-
-static unsigned int init_chipset_via82cxxx(struct pci_dev *, const char *);
-static void init_hwif_via82cxxx(ide_hwif_t *);
-
-static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = {
- { /* 0 */
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_82C576_1,
- .name = "VP_IDE",
- .init_chipset = init_chipset_via82cxxx,
- .init_hwif = init_hwif_via82cxxx,
- .channels = 2,
- .autodma = NOAUTODMA,
- .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{ /* 1 */
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_82C586_1,
- .name = "VP_IDE",
- .init_chipset = init_chipset_via82cxxx,
- .init_hwif = init_hwif_via82cxxx,
- .channels = 2,
- .autodma = NOAUTODMA,
- .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
- .bootable = ON_BOARD,
- .extra = 0,
- },{
- .vendor = 0,
- .device = 0,
- .channels = 0,
- .bootable = EOL,
- }
-};
-
-#endif /* VIA82CXXX_H */
+++ /dev/null
-/*
- * Copyright (C) 2001 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-/* Derived loosely from ide-pmac.c, so:
- *
- * Copyright (C) 1998 Paul Mackerras.
- * Copyright (C) 1995-1998 Mark Lord
- */
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/ide.h>
-#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/sibyte/sb1250_int.h>
-
-#define __IDE_SWARM_C
-
-#include <asm/sibyte/swarm_ide.h>
-
-void __init swarm_ide_probe(void)
-{
- int i;
- ide_hwif_t *hwif;
- /*
- * Find the first untaken slot in hwifs
- */
- for (i = 0; i < MAX_HWIFS; i++) {
- if (!ide_hwifs[i].io_ports[IDE_DATA_OFFSET]) {
- break;
- }
- }
- if (i == MAX_HWIFS) {
- printk("No space for SWARM onboard IDE driver in ide_hwifs[]. Not enabled.\n");
- return;
- }
-
- /* Set up our stuff */
- hwif = &ide_hwifs[i];
- hwif->hw.io_ports[IDE_DATA_OFFSET] = SWARM_IDE_REG(0x1f0);
- hwif->hw.io_ports[IDE_ERROR_OFFSET] = SWARM_IDE_REG(0x1f1);
- hwif->hw.io_ports[IDE_NSECTOR_OFFSET] = SWARM_IDE_REG(0x1f2);
- hwif->hw.io_ports[IDE_SECTOR_OFFSET] = SWARM_IDE_REG(0x1f3);
- hwif->hw.io_ports[IDE_LCYL_OFFSET] = SWARM_IDE_REG(0x1f4);
- hwif->hw.io_ports[IDE_HCYL_OFFSET] = SWARM_IDE_REG(0x1f5);
- hwif->hw.io_ports[IDE_SELECT_OFFSET] = SWARM_IDE_REG(0x1f6);
- hwif->hw.io_ports[IDE_STATUS_OFFSET] = SWARM_IDE_REG(0x1f7);
- hwif->hw.io_ports[IDE_CONTROL_OFFSET] = SWARM_IDE_REG(0x3f6);
- hwif->hw.io_ports[IDE_IRQ_OFFSET] = SWARM_IDE_REG(0x3f7);
-// hwif->hw->ack_intr = swarm_ide_ack_intr;
- hwif->hw.irq = SWARM_IDE_INT;
-#if 0
- hwif->iops = swarm_iops;
-#else
- hwif->OUTB = hwif->OUTBP = swarm_outb;
- hwif->OUTW = hwif->OUTWP = swarm_outw;
- hwif->OUTL = hwif->OUTLP = swarm_outl;
- hwif->OUTSW = hwif->OUTSWP = swarm_outsw;
- hwif->OUTSL = hwif->OUTSLP = swarm_outsl;
- hwif->INB = hwif->INBP = swarm_inb;
- hwif->INW = hwif->INWP = swarm_inw;
- hwif->INL = hwif->INLP = swarm_inl;
- hwif->INSW = hwif->INSWP = swarm_insw;
- hwif->INSL = hwif->INSLP = swarm_insl;
-#endif
-#if 0
- hwif->pioops = swarm_pio_ops;
-#else
- hwif->ata_input_data = swarm_ata_input_data;
- hwif->ata_output_data = swarm_ata_output_data;
- hwif->atapi_input_bytes = swarm_atapi_input_bytes;
- hwif->atapi_output_bytes = swarm_atapi_output_bytes;
-#endif
- memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
- hwif->irq = hwif->hw.irq;
- printk("SWARM onboard IDE configured as device %i\n", i);
-
-#ifndef HWIF_PROBE_CLASSIC_METHOD
- probe_hwif_init(hwif->index);
-#endif /* HWIF_PROBE_CLASSIC_METHOD */
-
-}
-
+++ /dev/null
-/*
- * drivers/input/keyboard/98kbd.c
- *
- * PC-9801 keyboard driver for Linux
- *
- * Based on atkbd.c and xtkbd.c written by Vojtech Pavlik
- *
- * Copyright (c) 2002 Osamu Tomita
- * Copyright (c) 1999-2001 Vojtech Pavlik
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#include <linux/delay.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/input.h>
-#include <linux/init.h>
-#include <linux/serio.h>
-
-#include <asm/io.h>
-#include <asm/pc9800.h>
-
-MODULE_AUTHOR("Osamu Tomita <tomita@cinet.co.jp>");
-MODULE_DESCRIPTION("PC-9801 keyboard driver");
-MODULE_LICENSE("GPL");
-
-#define KBD98_KEY 0x7f
-#define KBD98_RELEASE 0x80
-
-static unsigned char kbd98_keycode[256] = {
- 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 43, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 41, 26, 28, 30, 31, 32,
- 33, 34, 35, 36, 37, 38, 39, 40, 27, 44, 45, 46, 47, 48, 49, 50,
- 51, 52, 53, 12, 57, 92,109,104,110,111,103,105,106,108,102,107,
- 74, 98, 71, 72, 73, 55, 75, 76, 77, 78, 79, 80, 81,117, 82,121,
- 83, 94, 87, 88,183,184,185, 0, 0, 0, 0, 0, 0, 0,102, 0,
- 99,133, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 0, 0, 0, 0,
- 54, 58, 42, 56, 29
-};
-
-struct jis_kbd_conv {
- unsigned char scancode;
- struct {
- unsigned char shift;
- unsigned char keycode;
- } emul[2];
-};
-
-static struct jis_kbd_conv kbd98_jis[] = {
- {0x02, {{0, 3}, {1, 40}}},
- {0x06, {{0, 7}, {1, 8}}},
- {0x07, {{0, 8}, {0, 40}}},
- {0x08, {{0, 9}, {1, 10}}},
- {0x09, {{0, 10}, {1, 11}}},
- {0x0a, {{0, 11}, {1, 255}}},
- {0x0b, {{0, 12}, {0, 13}}},
- {0x0c, {{1, 7}, {0, 41}}},
- {0x1a, {{1, 3}, {1, 41}}},
- {0x26, {{0, 39}, {1, 13}}},
- {0x27, {{1, 39}, {1, 9}}},
- {0x33, {{0, 255}, {1, 12}}},
- {0xff, {{0, 255}, {1, 255}}} /* terminater */
-};
-
-#define KBD98_CMD_SETEXKEY 0x1095 /* Enable/Disable Windows, Appli key */
-#define KBD98_CMD_SETRATE 0x109c /* Set typematic rate */
-#define KBD98_CMD_SETLEDS 0x109d /* Set keyboard leds */
-#define KBD98_CMD_GETLEDS 0x119d /* Get keyboard leds */
-#define KBD98_CMD_GETID 0x019f
-
-#define KBD98_RET_ACK 0xfa
-#define KBD98_RET_NAK 0xfc /* Command NACK, send the cmd again */
-
-#define KBD98_KEY_JIS_EMUL 253
-#define KBD98_KEY_UNKNOWN 254
-#define KBD98_KEY_NULL 255
-
-static char *kbd98_name = "PC-9801 Keyboard";
-
-struct kbd98 {
- unsigned char keycode[256];
- struct input_dev dev;
- struct serio *serio;
- char phys[32];
- unsigned char cmdbuf[4];
- unsigned char cmdcnt;
- signed char ack;
- unsigned char shift;
- struct {
- unsigned char scancode;
- unsigned char keycode;
- } emul;
- struct jis_kbd_conv jis[16];
-};
-
-irqreturn_t kbd98_interrupt(struct serio *serio, unsigned char data,
- unsigned int flags, struct pt_regs *regs)
-{
- struct kbd98 *kbd98 = serio->private;
- unsigned char scancode, keycode;
- int press, i;
-
- switch (data) {
- case KBD98_RET_ACK:
- kbd98->ack = 1;
- goto out;
- case KBD98_RET_NAK:
- kbd98->ack = -1;
- goto out;
- }
-
- if (kbd98->cmdcnt) {
- kbd98->cmdbuf[--kbd98->cmdcnt] = data;
- goto out;
- }
-
- scancode = data & KBD98_KEY;
- keycode = kbd98->keycode[scancode];
- press = !(data & KBD98_RELEASE);
- if (kbd98->emul.scancode != KBD98_KEY_UNKNOWN
- && scancode != kbd98->emul.scancode) {
- input_report_key(&kbd98->dev, kbd98->emul.keycode, 0);
- kbd98->emul.scancode = KBD98_KEY_UNKNOWN;
- }
-
- if (keycode == KEY_RIGHTSHIFT)
- kbd98->shift = press;
-
- switch (keycode) {
- case KEY_2:
- case KEY_6:
- case KEY_7:
- case KEY_8:
- case KEY_9:
- case KEY_0:
- case KEY_MINUS:
- case KEY_EQUAL:
- case KEY_GRAVE:
- case KEY_SEMICOLON:
- case KEY_APOSTROPHE:
- /* emulation: JIS keyboard to US101 keyboard */
- i = 0;
- while (kbd98->jis[i].scancode != 0xff) {
- if (scancode == kbd98->jis[i].scancode)
- break;
- i ++;
- }
-
- keycode = kbd98->jis[i].emul[kbd98->shift].keycode;
- if (keycode == KBD98_KEY_NULL)
- break;
-
- if (press) {
- kbd98->emul.scancode = scancode;
- kbd98->emul.keycode = keycode;
- if (kbd98->jis[i].emul[kbd98->shift].shift
- != kbd98->shift)
- input_report_key(&kbd98->dev,
- KEY_RIGHTSHIFT,
- !(kbd98->shift));
- }
-
- input_report_key(&kbd98->dev, keycode, press);
- if (!press) {
- if (kbd98->jis[i].emul[kbd98->shift].shift
- != kbd98->shift)
- input_report_key(&kbd98->dev,
- KEY_RIGHTSHIFT,
- kbd98->shift);
- kbd98->emul.scancode = KBD98_KEY_UNKNOWN;
- }
-
- input_sync(&kbd98->dev);
- break;
-
- case KEY_CAPSLOCK:
- input_report_key(&kbd98->dev, keycode, 1);
- input_sync(&kbd98->dev);
- input_report_key(&kbd98->dev, keycode, 0);
- input_sync(&kbd98->dev);
- break;
-
- case KBD98_KEY_NULL:
- break;
-
- case 0:
- printk(KERN_WARNING "kbd98.c: Unknown key (scancode %#x) %s.\n",
- data & KBD98_KEY, data & KBD98_RELEASE ? "released" : "pressed");
- break;
-
- default:
- input_report_key(&kbd98->dev, keycode, press);
- input_sync(&kbd98->dev);
- break;
- }
-
-out:
- return IRQ_HANDLED;
-}
-
-/*
- * kbd98_sendbyte() sends a byte to the keyboard, and waits for
- * acknowledge. It doesn't handle resends according to the keyboard
- * protocol specs, because if these are needed, the keyboard needs
- * replacement anyway, and they only make a mess in the protocol.
- */
-
-static int kbd98_sendbyte(struct kbd98 *kbd98, unsigned char byte)
-{
- int timeout = 10000; /* 100 msec */
- kbd98->ack = 0;
-
- if (serio_write(kbd98->serio, byte))
- return -1;
-
- while (!kbd98->ack && timeout--) udelay(10);
-
- return -(kbd98->ack <= 0);
-}
-
-/*
- * kbd98_command() sends a command, and its parameters to the keyboard,
- * then waits for the response and puts it in the param array.
- */
-
-static int kbd98_command(struct kbd98 *kbd98, unsigned char *param, int command)
-{
- int timeout = 50000; /* 500 msec */
- int send = (command >> 12) & 0xf;
- int receive = (command >> 8) & 0xf;
- int i;
-
- kbd98->cmdcnt = receive;
-
- if (command & 0xff)
- if (kbd98_sendbyte(kbd98, command & 0xff))
- return (kbd98->cmdcnt = 0) - 1;
-
- for (i = 0; i < send; i++)
- if (kbd98_sendbyte(kbd98, param[i]))
- return (kbd98->cmdcnt = 0) - 1;
-
- while (kbd98->cmdcnt && timeout--) udelay(10);
-
- if (param)
- for (i = 0; i < receive; i++)
- param[i] = kbd98->cmdbuf[(receive - 1) - i];
-
- if (kbd98->cmdcnt)
- return (kbd98->cmdcnt = 0) - 1;
-
- return 0;
-}
-
-/*
- * Event callback from the input module. Events that change the state of
- * the hardware are processed here.
- */
-
-static int kbd98_event(struct input_dev *dev, unsigned int type, unsigned int code, int value)
-{
- struct kbd98 *kbd98 = dev->private;
- char param[2];
-
- switch (type) {
-
- case EV_LED:
-
- if (__PC9800SCA_TEST_BIT(0x481, 3)) {
- /* 98note with Num Lock key */
- /* keep Num Lock status */
- *param = 0x60;
- if (kbd98_command(kbd98, param,
- KBD98_CMD_GETLEDS))
- printk(KERN_DEBUG
- "kbd98: Get keyboard LED"
- " status Error\n");
-
- *param &= 1;
- } else {
- /* desktop PC-9801 */
- *param = 1; /* Always set Num Lock */
- }
-
- *param |= 0x70
- | (test_bit(LED_CAPSL, dev->led) ? 4 : 0)
- | (test_bit(LED_KANA, dev->led) ? 8 : 0);
- kbd98_command(kbd98, param, KBD98_CMD_SETLEDS);
-
- return 0;
- }
-
- return -1;
-}
-
-void kbd98_connect(struct serio *serio, struct serio_dev *dev)
-{
- struct kbd98 *kbd98;
- int i;
-
- if ((serio->type & SERIO_TYPE) != SERIO_PC9800)
- return;
-
- if (!(kbd98 = kmalloc(sizeof(struct kbd98), GFP_KERNEL)))
- return;
-
- memset(kbd98, 0, sizeof(struct kbd98));
- kbd98->emul.scancode = KBD98_KEY_UNKNOWN;
-
- kbd98->dev.evbit[0] = BIT(EV_KEY) | BIT(EV_LED) | BIT(EV_REP);
- kbd98->dev.ledbit[0] = BIT(LED_NUML) | BIT(LED_CAPSL) | BIT(LED_KANA);
-
- kbd98->serio = serio;
-
- init_input_dev(&kbd98->dev);
- kbd98->dev.keycode = kbd98->keycode;
- kbd98->dev.keycodesize = sizeof(unsigned char);
- kbd98->dev.keycodemax = ARRAY_SIZE(kbd98_keycode);
- kbd98->dev.event = kbd98_event;
- kbd98->dev.private = kbd98;
-
- serio->private = kbd98;
-
- if (serio_open(serio, dev)) {
- kfree(kbd98);
- return;
- }
-
- memcpy(kbd98->jis, kbd98_jis, sizeof(kbd98_jis));
- memcpy(kbd98->keycode, kbd98_keycode, sizeof(kbd98->keycode));
- for (i = 0; i < 255; i++)
- set_bit(kbd98->keycode[i], kbd98->dev.keybit);
- clear_bit(0, kbd98->dev.keybit);
-
- sprintf(kbd98->phys, "%s/input0", serio->phys);
-
- kbd98->dev.name = kbd98_name;
- kbd98->dev.phys = kbd98->phys;
- kbd98->dev.id.bustype = BUS_XTKBD;
- kbd98->dev.id.vendor = 0x0002;
- kbd98->dev.id.product = 0x0001;
- kbd98->dev.id.version = 0x0100;
-
- input_register_device(&kbd98->dev);
-
- printk(KERN_INFO "input: %s on %s\n", kbd98_name, serio->phys);
-}
-
-void kbd98_disconnect(struct serio *serio)
-{
- struct kbd98 *kbd98 = serio->private;
- input_unregister_device(&kbd98->dev);
- serio_close(serio);
- kfree(kbd98);
-}
-
-struct serio_dev kbd98_dev = {
- .interrupt = kbd98_interrupt,
- .connect = kbd98_connect,
- .disconnect = kbd98_disconnect
-};
-
-int __init kbd98_init(void)
-{
- serio_register_device(&kbd98_dev);
- return 0;
-}
-
-void __exit kbd98_exit(void)
-{
- serio_unregister_device(&kbd98_dev);
-}
-
-module_init(kbd98_init);
-module_exit(kbd98_exit);
+++ /dev/null
-/*
- * PC-9800 Speaker beeper driver for Linux
- *
- * Copyright (c) 2002 Osamu Tomita
- * Copyright (c) 2002 Vojtech Pavlik
- * Copyright (c) 1992 Orest Zborowski
- *
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/input.h>
-#include <asm/8253pit.h>
-#include <asm/io.h>
-
-MODULE_AUTHOR("Osamu Tomita <tomita@cinet.co.jp>");
-MODULE_DESCRIPTION("PC-9800 Speaker beeper driver");
-MODULE_LICENSE("GPL");
-
-static char spkr98_name[] = "PC-9801 Speaker";
-static char spkr98_phys[] = "isa3fdb/input0";
-static struct input_dev spkr98_dev;
-
-spinlock_t i8253_beep_lock = SPIN_LOCK_UNLOCKED;
-
-static int spkr98_event(struct input_dev *dev, unsigned int type, unsigned int code, int value)
-{
- unsigned int count = 0;
- unsigned long flags;
-
- if (type != EV_SND)
- return -1;
-
- switch (code) {
- case SND_BELL: if (value) value = 1000;
- case SND_TONE: break;
- default: return -1;
- }
-
- if (value > 20 && value < 32767)
- count = PIT_TICK_RATE / value;
-
- spin_lock_irqsave(&i8253_beep_lock, flags);
-
- if (count) {
- outb(0x76, 0x3fdf);
- outb(0, 0x5f);
- outb(count & 0xff, 0x3fdb);
- outb(0, 0x5f);
- outb((count >> 8) & 0xff, 0x3fdb);
- /* beep on */
- outb(6, 0x37);
- } else {
- /* beep off */
- outb(7, 0x37);
- }
-
- spin_unlock_irqrestore(&i8253_beep_lock, flags);
-
- return 0;
-}
-
-static int __init spkr98_init(void)
-{
- spkr98_dev.evbit[0] = BIT(EV_SND);
- spkr98_dev.sndbit[0] = BIT(SND_BELL) | BIT(SND_TONE);
- spkr98_dev.event = spkr98_event;
-
- spkr98_dev.name = spkr98_name;
- spkr98_dev.phys = spkr98_phys;
- spkr98_dev.id.bustype = BUS_ISA;
- spkr98_dev.id.vendor = 0x001f;
- spkr98_dev.id.product = 0x0001;
- spkr98_dev.id.version = 0x0100;
-
- input_register_device(&spkr98_dev);
-
- printk(KERN_INFO "input: %s\n", spkr98_name);
-
- return 0;
-}
-
-static void __exit spkr98_exit(void)
-{
- input_unregister_device(&spkr98_dev);
-}
-
-module_init(spkr98_init);
-module_exit(spkr98_exit);
+++ /dev/null
-/*
- *
- * Copyright (c) 2002 Osamu Tomita
- *
- * Based on the work of:
- * James Banks Matthew Dillon
- * David Giller Nathan Laredo
- * Linus Torvalds Johan Myreen
- * Cliff Matthews Philip Blundell
- * Russell King Vojtech Pavlik
- */
-
-/*
- * NEC PC-9801 Bus Mouse Driver for Linux
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/delay.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/input.h>
-#include <linux/interrupt.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-
-MODULE_AUTHOR("Osamu Tomita <tomita@cinet.co.jp>");
-MODULE_DESCRIPTION("PC-9801 busmouse driver");
-MODULE_LICENSE("GPL");
-
-#define PC98BM_BASE 0x7fd9
-#define PC98BM_DATA_PORT PC98BM_BASE + 0
-/* PC98BM_SIGNATURE_PORT does not exist */
-#define PC98BM_CONTROL_PORT PC98BM_BASE + 4
-/* PC98BM_INTERRUPT_PORT does not exist */
-#define PC98BM_CONFIG_PORT PC98BM_BASE + 6
-
-#define PC98BM_ENABLE_IRQ 0x00
-#define PC98BM_DISABLE_IRQ 0x10
-#define PC98BM_READ_X_LOW 0x80
-#define PC98BM_READ_X_HIGH 0xa0
-#define PC98BM_READ_Y_LOW 0xc0
-#define PC98BM_READ_Y_HIGH 0xe0
-
-#define PC98BM_DEFAULT_MODE 0x93
-/* PC98BM_CONFIG_BYTE is not used */
-/* PC98BM_SIGNATURE_BYTE is not used */
-
-#define PC98BM_TIMER_PORT 0xbfdb
-#define PC98BM_DEFAULT_TIMER_VAL 0x00
-
-#define PC98BM_IRQ 13
-
-static int pc98bm_irq = PC98BM_IRQ;
-module_param_named(irq, pc98bm_irq, uint, 0);
-MODULE_PARM_DESC(irq, "IRQ number (13=default)");
-
-__obsolete_setup("pc98bm_irq=");
-
-static int pc98bm_used = 0;
-
-static irqreturn_t pc98bm_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-
-static int pc98bm_open(struct input_dev *dev)
-{
- if (pc98bm_used++)
- return 0;
- if (request_irq(pc98bm_irq, pc98bm_interrupt, 0, "98busmouse", NULL)) {
- pc98bm_used--;
- printk(KERN_ERR "98busmouse.c: Can't allocate irq %d\n", pc98bm_irq);
- return -EBUSY;
- }
- outb(PC98BM_ENABLE_IRQ, PC98BM_CONTROL_PORT);
- return 0;
-}
-
-static void pc98bm_close(struct input_dev *dev)
-{
- if (--pc98bm_used)
- return;
- outb(PC98BM_DISABLE_IRQ, PC98BM_CONTROL_PORT);
- free_irq(pc98bm_irq, NULL);
-}
-
-static struct input_dev pc98bm_dev = {
- .evbit = { BIT(EV_KEY) | BIT(EV_REL) },
- .keybit = { [LONG(BTN_LEFT)] = BIT(BTN_LEFT) | BIT(BTN_MIDDLE) | BIT(BTN_RIGHT) },
- .relbit = { BIT(REL_X) | BIT(REL_Y) },
- .open = pc98bm_open,
- .close = pc98bm_close,
- .name = "PC-9801 bus mouse",
- .phys = "isa7fd9/input0",
- .id = {
- .bustype = BUS_ISA,
- .vendor = 0x0004,
- .product = 0x0001,
- .version = 0x0100,
- },
-};
-
-static irqreturn_t pc98bm_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- char dx, dy;
- unsigned char buttons;
-
- outb(PC98BM_READ_X_LOW, PC98BM_CONTROL_PORT);
- dx = (inb(PC98BM_DATA_PORT) & 0xf);
- outb(PC98BM_READ_X_HIGH, PC98BM_CONTROL_PORT);
- dx |= (inb(PC98BM_DATA_PORT) & 0xf) << 4;
- outb(PC98BM_READ_Y_LOW, PC98BM_CONTROL_PORT);
- dy = (inb(PC98BM_DATA_PORT) & 0xf);
- outb(PC98BM_READ_Y_HIGH, PC98BM_CONTROL_PORT);
- buttons = inb(PC98BM_DATA_PORT);
- dy |= (buttons & 0xf) << 4;
- buttons = ~buttons >> 5;
-
- input_report_rel(&pc98bm_dev, REL_X, dx);
- input_report_rel(&pc98bm_dev, REL_Y, dy);
- input_report_key(&pc98bm_dev, BTN_RIGHT, buttons & 1);
- input_report_key(&pc98bm_dev, BTN_MIDDLE, buttons & 2);
- input_report_key(&pc98bm_dev, BTN_LEFT, buttons & 4);
- input_sync(&pc98bm_dev);
-
- outb(PC98BM_ENABLE_IRQ, PC98BM_CONTROL_PORT);
-
- return IRQ_HANDLED;
-}
-
-static int __init pc98bm_init(void)
-{
- int i;
-
- for (i = 0; i <= 6; i += 2) {
- if (!request_region(PC98BM_BASE + i, 1, "98busmouse")) {
- printk(KERN_ERR "98busmouse.c: Can't allocate ports at %#x\n", PC98BM_BASE + i);
- while (i > 0) {
- i -= 2;
- release_region(PC98BM_BASE + i, 1);
- }
-
- return -EBUSY;
- }
-
- }
-
- if (!request_region(PC98BM_TIMER_PORT, 1, "98busmouse")) {
- printk(KERN_ERR "98busmouse.c: Can't allocate ports at %#x\n", PC98BM_TIMER_PORT);
- for (i = 0; i <= 6; i += 2)
- release_region(PC98BM_BASE + i, 1);
-
- return -EBUSY;
- }
-
- outb(PC98BM_DEFAULT_MODE, PC98BM_CONFIG_PORT);
- outb(PC98BM_DISABLE_IRQ, PC98BM_CONTROL_PORT);
-
- outb(PC98BM_DEFAULT_TIMER_VAL, PC98BM_TIMER_PORT);
-
- input_register_device(&pc98bm_dev);
-
- printk(KERN_INFO "input: PC-9801 bus mouse at %#x irq %d\n", PC98BM_BASE, pc98bm_irq);
-
- return 0;
-}
-
-static void __exit pc98bm_exit(void)
-{
- int i;
-
- input_unregister_device(&pc98bm_dev);
- for (i = 0; i <= 6; i += 2)
- release_region(PC98BM_BASE + i, 1);
-
- release_region(PC98BM_TIMER_PORT, 1);
-}
-
-module_init(pc98bm_init);
-module_exit(pc98bm_exit);
+++ /dev/null
-/*
- * NEC PC-9801 keyboard controller driver for Linux
- *
- * Copyright (c) 1999-2002 Osamu Tomita <tomita@cinet.co.jp>
- * Based on i8042.c written by Vojtech Pavlik
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-
-#include <linux/config.h>
-#include <linux/delay.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/serio.h>
-#include <linux/sched.h>
-
-#include <asm/io.h>
-
-MODULE_AUTHOR("Osamu Tomita <tomita@cinet.co.jp>");
-MODULE_DESCRIPTION("NEC PC-9801 keyboard controller driver");
-MODULE_LICENSE("GPL");
-
-/*
- * Names.
- */
-
-#define KBD98_PHYS_DESC "isa0041/serio0"
-
-/*
- * IRQs.
- */
-
-#define KBD98_IRQ 1
-
-/*
- * Register numbers.
- */
-
-#define KBD98_COMMAND_REG 0x43
-#define KBD98_STATUS_REG 0x43
-#define KBD98_DATA_REG 0x41
-
-spinlock_t kbd98io_lock = SPIN_LOCK_UNLOCKED;
-
-static struct serio kbd98_port;
-extern struct pt_regs *kbd_pt_regs;
-
-static irqreturn_t kbd98io_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-
-/*
- * kbd98_flush() flushes all data that may be in the keyboard buffers
- */
-
-static int kbd98_flush(void)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&kbd98io_lock, flags);
-
- while (inb(KBD98_STATUS_REG) & 0x02) /* RxRDY */
- inb(KBD98_DATA_REG);
-
- if (inb(KBD98_STATUS_REG) & 0x38)
- printk("98kbd-io: Keyboard error!\n");
-
- spin_unlock_irqrestore(&kbd98io_lock, flags);
-
- return 0;
-}
-
-/*
- * kbd98_write() sends a byte out through the keyboard interface.
- */
-
-static int kbd98_write(struct serio *port, unsigned char c)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&kbd98io_lock, flags);
-
- outb(0, 0x5f); /* wait */
- outb(0x17, KBD98_COMMAND_REG); /* enable send command */
- outb(0, 0x5f); /* wait */
- outb(c, KBD98_DATA_REG);
- outb(0, 0x5f); /* wait */
- outb(0x16, KBD98_COMMAND_REG); /* disable send command */
- outb(0, 0x5f); /* wait */
-
- spin_unlock_irqrestore(&kbd98io_lock, flags);
-
- return 0;
-}
-
-/*
- * kbd98_open() is called when a port is open by the higher layer.
- * It allocates the interrupt and enables in in the chip.
- */
-
-static int kbd98_open(struct serio *port)
-{
- kbd98_flush();
-
- if (request_irq(KBD98_IRQ, kbd98io_interrupt, 0, "kbd98", NULL)) {
- printk(KERN_ERR "98kbd-io.c: Can't get irq %d for %s, unregistering the port.\n", KBD98_IRQ, "KBD");
- serio_unregister_port(port);
- return -1;
- }
-
- return 0;
-}
-
-static void kbd98_close(struct serio *port)
-{
- free_irq(KBD98_IRQ, NULL);
-
- kbd98_flush();
-}
-
-/*
- * Structures for registering the devices in the serio.c module.
- */
-
-static struct serio kbd98_port =
-{
- .type = SERIO_PC9800,
- .write = kbd98_write,
- .open = kbd98_open,
- .close = kbd98_close,
- .driver = NULL,
- .name = "PC-9801 Kbd Port",
- .phys = KBD98_PHYS_DESC,
-};
-
-/*
- * kbd98io_interrupt() is the most important function in this driver -
- * it handles the interrupts from keyboard, and sends incoming bytes
- * to the upper layers.
- */
-
-static irqreturn_t kbd98io_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- unsigned long flags;
- unsigned char data;
-
- spin_lock_irqsave(&kbd98io_lock, flags);
-
- data = inb(KBD98_DATA_REG);
- spin_unlock_irqrestore(&kbd98io_lock, flags);
- serio_interrupt(&kbd98_port, data, 0, regs);
-
- return IRQ_HANDLED;
-}
-
-int __init kbd98io_init(void)
-{
- serio_register_port(&kbd98_port);
-
- printk(KERN_INFO "serio: PC-9801 %s port at %#lx,%#lx irq %d\n",
- "KBD",
- (unsigned long) KBD98_DATA_REG,
- (unsigned long) KBD98_COMMAND_REG,
- KBD98_IRQ);
-
- return 0;
-}
-
-void __exit kbd98io_exit(void)
-{
- serio_unregister_port(&kbd98_port);
-}
-
-module_init(kbd98io_init);
-module_exit(kbd98io_exit);
+++ /dev/null
-/*
- * Driver for mobile USB Budget DVB-T devices based on reference
- * design made by DiBcom (http://www.dibcom.fr/)
- *
- * dvb-dibusb.c
- *
- * Copyright (C) 2004 Patrick Boettcher (patrick.boettcher@desy.de)
- *
- * based on GPL code from DiBcom, which has
- * Copyright (C) 2004 Amaury Demol for DiBcom (ademol@dibcom.fr)
- *
- * Remote control code added by David Matthews (dm@prolingua.co.uk)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation, version 2.
- *
- * Acknowledgements
- *
- * Amaury Demol (ademol@dibcom.fr) from DiBcom for providing specs and driver
- * sources, on which this driver (and the dib3000mb/mc/p frontends) are based.
- *
- * see Documentation/dvb/README.dibusb for more information
- */
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/usb.h>
-#include <linux/firmware.h>
-#include <linux/version.h>
-#include <linux/moduleparam.h>
-#include <linux/pci.h>
-#include <linux/input.h>
-
-#include "dmxdev.h"
-#include "dvb_demux.h"
-#include "dvb_filter.h"
-#include "dvb_net.h"
-#include "dvb_frontend.h"
-#include "dib3000.h"
-
-#include "dvb-dibusb.h"
-
-
-/* debug */
-#ifdef CONFIG_DVB_DIBCOM_DEBUG
-#define dprintk(level,args...) \
- do { if ((debug & level)) { printk(args); } } while (0)
-
-#define debug_dump(b,l) if (debug) {\
- int i; deb_xfer("%s: %d > ",__FUNCTION__,l); \
- for (i = 0; i < l; i++) deb_xfer("%02x ", b[i]); \
- deb_xfer("\n");\
-}
-
-static int debug;
-module_param(debug, int, 0x644);
-MODULE_PARM_DESC(debug, "set debugging level (1=info,2=xfer,4=alotmore,8=ts,16=err,32=rc (|-able)).");
-#else
-#define dprintk(args...)
-#define debug_dump(b,l)
-#endif
-
-#define deb_info(args...) dprintk(0x01,args)
-#define deb_xfer(args...) dprintk(0x02,args)
-#define deb_alot(args...) dprintk(0x04,args)
-#define deb_ts(args...) dprintk(0x08,args)
-#define deb_err(args...) dprintk(0x10,args)
-#define deb_rc(args...) dprintk(0x20,args)
-
-static int pid_parse;
-module_param(pid_parse, int, 0x644);
-MODULE_PARM_DESC(pid_parse, "enable pid parsing (filtering) when running at USB2.0");
-
-/* Version information */
-#define DRIVER_VERSION "0.1"
-#define DRIVER_DESC "Driver for DiBcom based USB Budget DVB-T device"
-#define DRIVER_AUTHOR "Patrick Boettcher, patrick.boettcher@desy.de"
-
-static int dibusb_readwrite_usb(struct usb_dibusb *dib,
- u8 *wbuf, u16 wlen, u8 *rbuf, u16 rlen)
-{
- int actlen,ret = -ENOMEM;
-
- if (wbuf == NULL || wlen == 0)
- return -EINVAL;
-
- if ((ret = down_interruptible(&dib->usb_sem)))
- return ret;
-
- if (dib->feedcount &&
- wbuf[0] == DIBUSB_REQ_I2C_WRITE &&
- dib->dibdev->parm->type == DIBUSB1_1)
- deb_err("BUG: writing to i2c, while TS-streaming destroys the stream."
- "(%x reg: %x %x)\n", wbuf[0],wbuf[2],wbuf[3]);
-
- debug_dump(wbuf,wlen);
-
- ret = usb_bulk_msg(dib->udev,usb_sndbulkpipe(dib->udev,
- dib->dibdev->parm->cmd_pipe), wbuf,wlen,&actlen,
- DIBUSB_I2C_TIMEOUT);
-
- if (ret)
- err("bulk message failed: %d (%d/%d)",ret,wlen,actlen);
- else
- ret = actlen != wlen ? -1 : 0;
-
- /* an answer is expected, and no error before */
- if (!ret && rbuf && rlen) {
- ret = usb_bulk_msg(dib->udev,usb_rcvbulkpipe(dib->udev,
- dib->dibdev->parm->result_pipe),rbuf,rlen,&actlen,
- DIBUSB_I2C_TIMEOUT);
-
- if (ret)
- err("recv bulk message failed: %d",ret);
- else {
- deb_alot("rlen: %d\n",rlen);
- debug_dump(rbuf,actlen);
- }
- }
-
- up(&dib->usb_sem);
- return ret;
-}
-
-static int dibusb_i2c_msg(struct usb_dibusb *dib, u8 addr,
- u8 *wbuf, u16 wlen, u8 *rbuf, u16 rlen)
-{
- u8 sndbuf[wlen+4]; /* lead(1) devaddr,direction(1) addr(2) data(wlen) (len(2) (when reading)) */
- /* write only ? */
- int wo = (rbuf == NULL || rlen == 0),
- len = 2 + wlen + (wo ? 0 : 2);
-
- deb_alot("wo: %d, wlen: %d, len: %d\n",wo,wlen,len);
-
- sndbuf[0] = wo ? DIBUSB_REQ_I2C_WRITE : DIBUSB_REQ_I2C_READ;
- sndbuf[1] = (addr & 0xfe) | (wo ? 0 : 1);
-
- memcpy(&sndbuf[2],wbuf,wlen);
-
- if (!wo) {
- sndbuf[wlen+2] = (rlen >> 8) & 0xff;
- sndbuf[wlen+3] = rlen & 0xff;
- }
-
- return dibusb_readwrite_usb(dib,sndbuf,len,rbuf,rlen);
-}
-
-/*
- * DVB stuff
- */
-static void dibusb_urb_complete(struct urb *urb, struct pt_regs *ptregs)
-{
- struct usb_dibusb *dib = urb->context;
-
- deb_ts("urb complete feedcount: %d, status: %d\n",dib->feedcount,urb->status);
-
- if (dib->feedcount > 0 && urb->status == 0) {
- deb_ts("URB return len: %d\n",urb->actual_length);
- if (urb->actual_length % 188)
- deb_ts("TS Packets: %d, %d\n", urb->actual_length/188,urb->actual_length % 188);
-
- /* Francois recommends to drop not full-filled packets, even if they may
- * contain valid TS packets
- */
- if (urb->actual_length == dib->dibdev->parm->default_size && dib->dvb_is_ready)
- dvb_dmx_swfilter_packets(&dib->demux, (u8*) urb->transfer_buffer,urb->actual_length/188);
- else
- deb_ts("URB dropped because of the "
- "actual_length or !dvb_is_ready (%d).\n",dib->dvb_is_ready);
- } else
- deb_ts("URB dropped because of feedcount or status.\n");
-
- usb_submit_urb(urb,GFP_KERNEL);
-}
-
-static int dibusb_ctrl_feed(struct usb_dibusb *dib, int pid, int onoff)
-{
- if (dib->dibdev->parm->firmware_bug && dib->feedcount) {
- deb_ts("stop feeding\n");
- if (dib->xfer_ops.fifo_ctrl != NULL) {
- if (dib->xfer_ops.fifo_ctrl(dib->fe,0)) {
- err("error while inhibiting fifo.");
- return -ENODEV;
- }
- } else {
- err("fifo_ctrl is not set.");
- return -ENODEV;
- }
- }
-
- dib->feedcount += onoff ? 1 : -1;
-
- if (dib->pid_parse) {
- if (dib->xfer_ops.pid_ctrl != NULL) {
- if (dib->xfer_ops.pid_ctrl(dib->fe,pid,onoff) < 0) {
- err("no free pid in list.");
- return -ENODEV;
- }
- } else {
- err("no pid ctrl callback.");
- return -ENODEV;
- }
- }
- /*
- * start the feed, either if there is the firmware bug or
- * if this was the first pid to set.
- */
- if (dib->dibdev->parm->firmware_bug || dib->feedcount == onoff) {
-
- deb_ts("controlling pid parser\n");
- if (dib->xfer_ops.pid_parse != NULL) {
- if (dib->xfer_ops.pid_parse(dib->fe,dib->pid_parse) < 0) {
- err("could not handle pid_parser");
- }
- }
-
- deb_ts("start feeding\n");
- if (dib->xfer_ops.fifo_ctrl != NULL) {
- if (dib->xfer_ops.fifo_ctrl(dib->fe,1)) {
- err("error while enabling fifo.");
- return -ENODEV;
- }
- } else {
- err("fifo_ctrl is not set.");
- return -ENODEV;
-}
- }
- return 0;
-}
-
-static int dibusb_start_feed(struct dvb_demux_feed *dvbdmxfeed)
-{
- struct usb_dibusb *dib = dvbdmxfeed->demux->priv;
- deb_ts("pid: 0x%04x, feedtype: %d\n", dvbdmxfeed->pid,dvbdmxfeed->type);
- dvbdmxfeed->priv = dib;
- return dibusb_ctrl_feed(dib,dvbdmxfeed->pid,1);
-}
-
-static int dibusb_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
-{
- struct usb_dibusb *dib = (struct usb_dibusb *) dvbdmxfeed->priv;
- if (dib == NULL) {
- err("dib in dmxfeed->priv was NULL");
- return -EINVAL;
-}
- deb_ts("dvbdmxfeed pid: 0x%04x, feedtype: %d\n",
- dvbdmxfeed->pid, dvbdmxfeed->type);
- return dibusb_ctrl_feed(dib,dvbdmxfeed->pid,0);
-}
-
-/* Table to map raw key codes to key events. This should not be hard-wired
- into the kernel. */
-static const struct { u8 c0, c1, c2; uint32_t key; } rc_keys [] =
-{
- /* Key codes for the little Artec T1/Twinhan/HAMA/ remote. */
- { 0x00, 0xff, 0x16, KEY_POWER },
- { 0x00, 0xff, 0x10, KEY_MUTE },
- { 0x00, 0xff, 0x03, KEY_1 },
- { 0x00, 0xff, 0x01, KEY_2 },
- { 0x00, 0xff, 0x06, KEY_3 },
- { 0x00, 0xff, 0x09, KEY_4 },
- { 0x00, 0xff, 0x1d, KEY_5 },
- { 0x00, 0xff, 0x1f, KEY_6 },
- { 0x00, 0xff, 0x0d, KEY_7 },
- { 0x00, 0xff, 0x19, KEY_8 },
- { 0x00, 0xff, 0x1b, KEY_9 },
- { 0x00, 0xff, 0x15, KEY_0 },
- { 0x00, 0xff, 0x05, KEY_CHANNELUP },
- { 0x00, 0xff, 0x02, KEY_CHANNELDOWN },
- { 0x00, 0xff, 0x1e, KEY_VOLUMEUP },
- { 0x00, 0xff, 0x0a, KEY_VOLUMEDOWN },
- { 0x00, 0xff, 0x11, KEY_RECORD },
- { 0x00, 0xff, 0x17, KEY_FAVORITES }, /* Heart symbol - Channel list. */
- { 0x00, 0xff, 0x14, KEY_PLAY },
- { 0x00, 0xff, 0x1a, KEY_STOP },
- { 0x00, 0xff, 0x40, KEY_REWIND },
- { 0x00, 0xff, 0x12, KEY_FASTFORWARD },
- { 0x00, 0xff, 0x0e, KEY_PREVIOUS }, /* Recall - Previous channel. */
- { 0x00, 0xff, 0x4c, KEY_PAUSE },
- { 0x00, 0xff, 0x4d, KEY_SCREEN }, /* Full screen mode. */
- { 0x00, 0xff, 0x54, KEY_AUDIO }, /* MTS - Switch to secondary audio. */
- /* additional keys TwinHan VisionPlus, the Artec seemingly not have */
- { 0x00, 0xff, 0x0c, KEY_CANCEL }, /* Cancel */
- { 0x00, 0xff, 0x1c, KEY_EPG }, /* EPG */
- { 0x00, 0xff, 0x00, KEY_TAB }, /* Tab */
- { 0x00, 0xff, 0x48, KEY_INFO }, /* Preview */
- { 0x00, 0xff, 0x04, KEY_LIST }, /* RecordList */
- { 0x00, 0xff, 0x0f, KEY_TEXT }, /* Teletext */
- /* Key codes for the KWorld/ADSTech/JetWay remote. */
- { 0x86, 0x6b, 0x12, KEY_POWER },
- { 0x86, 0x6b, 0x0f, KEY_SELECT }, /* source */
- { 0x86, 0x6b, 0x0c, KEY_UNKNOWN }, /* scan */
- { 0x86, 0x6b, 0x0b, KEY_EPG },
- { 0x86, 0x6b, 0x10, KEY_MUTE },
- { 0x86, 0x6b, 0x01, KEY_1 },
- { 0x86, 0x6b, 0x02, KEY_2 },
- { 0x86, 0x6b, 0x03, KEY_3 },
- { 0x86, 0x6b, 0x04, KEY_4 },
- { 0x86, 0x6b, 0x05, KEY_5 },
- { 0x86, 0x6b, 0x06, KEY_6 },
- { 0x86, 0x6b, 0x07, KEY_7 },
- { 0x86, 0x6b, 0x08, KEY_8 },
- { 0x86, 0x6b, 0x09, KEY_9 },
- { 0x86, 0x6b, 0x0a, KEY_0 },
- { 0x86, 0x6b, 0x18, KEY_ZOOM },
- { 0x86, 0x6b, 0x1c, KEY_UNKNOWN }, /* preview */
- { 0x86, 0x6b, 0x13, KEY_UNKNOWN }, /* snap */
- { 0x86, 0x6b, 0x00, KEY_UNDO },
- { 0x86, 0x6b, 0x1d, KEY_RECORD },
- { 0x86, 0x6b, 0x0d, KEY_STOP },
- { 0x86, 0x6b, 0x0e, KEY_PAUSE },
- { 0x86, 0x6b, 0x16, KEY_PLAY },
- { 0x86, 0x6b, 0x11, KEY_BACK },
- { 0x86, 0x6b, 0x19, KEY_FORWARD },
- { 0x86, 0x6b, 0x14, KEY_UNKNOWN }, /* pip */
- { 0x86, 0x6b, 0x15, KEY_ESC },
- { 0x86, 0x6b, 0x1a, KEY_UP },
- { 0x86, 0x6b, 0x1e, KEY_DOWN },
- { 0x86, 0x6b, 0x1f, KEY_LEFT },
- { 0x86, 0x6b, 0x1b, KEY_RIGHT },
-};
-
-/*
- * Read the remote control and feed the appropriate event.
- * NEC protocol is used for remote controls
- */
-static int dibusb_read_remote_control(struct usb_dibusb *dib)
-{
- u8 b[1] = { DIBUSB_REQ_POLL_REMOTE }, rb[5];
- int ret;
- int i;
- if ((ret = dibusb_readwrite_usb(dib,b,1,rb,5)))
- return ret;
-
- switch (rb[0]) {
- case DIBUSB_RC_NEC_KEY_PRESSED:
- /* rb[1-3] is the actual key, rb[4] is a checksum */
- deb_rc("raw key code 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
- rb[1], rb[2], rb[3], rb[4]);
-
- if ((0xff - rb[3]) != rb[4]) {
- deb_rc("remote control checksum failed.\n");
- break;
- }
-
- /* See if we can match the raw key code. */
- for (i = 0; i < sizeof(rc_keys)/sizeof(rc_keys[0]); i++) {
- if (rc_keys[i].c0 == rb[1] &&
- rc_keys[i].c1 == rb[2] &&
- rc_keys[i].c2 == rb[3]) {
- dib->rc_input_event = rc_keys[i].key;
- deb_rc("Translated key 0x%04x\n", dib->rc_input_event);
- /* Signal down and up events for this key. */
- input_report_key(&dib->rc_input_dev, dib->rc_input_event, 1);
- input_report_key(&dib->rc_input_dev, dib->rc_input_event, 0);
- input_sync(&dib->rc_input_dev);
- break;
- }
- }
- break;
- case DIBUSB_RC_NEC_EMPTY: /* No (more) remote control keys. */
- break;
- case DIBUSB_RC_NEC_KEY_REPEATED:
- /* rb[1]..rb[4] are always zero.*/
- /* Repeats often seem to occur so for the moment just ignore this. */
- deb_rc("Key repeat\n");
- break;
- default:
- break;
- }
-
- return 0;
-}
-
-#define RC_QUERY_INTERVAL (100) /* milliseconds */
-
-/* Remote-control poll function - called every RC_QUERY_INTERVAL ms to see
- whether the remote control has received anything. */
-static void dibusb_query_rc (void *data)
-{
- struct usb_dibusb *dib = (struct usb_dibusb *) data;
- /* TODO: need a lock here. We can simply skip checking for the remote control
- if we're busy. */
- dibusb_read_remote_control(dib);
- schedule_delayed_work(&dib->rc_query_work,
- msecs_to_jiffies(RC_QUERY_INTERVAL));
-}
-
-/*
- * Cypress controls
- */
-
-#if 0
-/*
- * #if 0'ing the following functions as they are not in use _now_,
- * but probably will be sometime.
- */
-
-/*
- * do not use this, just a workaround for a bug,
- * which will hopefully never occur :).
- */
-static int dibusb_interrupt_read_loop(struct usb_dibusb *dib)
-{
- u8 b[1] = { DIBUSB_REQ_INTR_READ };
- return dibusb_write_usb(dib,b,1);
-}
-
-/*
- * ioctl for power control
- */
-static int dibusb_hw_sleep(struct usb_dibusb *dib)
-{
- u8 b[1] = { DIBUSB_IOCTL_POWER_SLEEP };
- return dibusb_ioctl_cmd(dib,DIBUSB_IOCTL_CMD_POWER_MODE, b,1);
-}
-
-#endif
-static int dibusb_write_usb(struct usb_dibusb *dib, u8 *buf, u16 len)
-{
- return dibusb_readwrite_usb(dib,buf,len,NULL,0);
-}
-
-/*
- * ioctl for the firmware
- */
-static int dibusb_ioctl_cmd(struct usb_dibusb *dib, u8 cmd, u8 *param, int plen)
-{
- u8 b[34];
- int size = plen > 32 ? 32 : plen;
- b[0] = DIBUSB_REQ_SET_IOCTL;
- b[1] = cmd;
- memcpy(&b[2],param,size);
-
- return dibusb_write_usb(dib,b,2+size);
-}
-
-static int dibusb_hw_wakeup(struct usb_dibusb *dib)
-{
- u8 b[1] = { DIBUSB_IOCTL_POWER_WAKEUP };
- return dibusb_ioctl_cmd(dib,DIBUSB_IOCTL_CMD_POWER_MODE, b,1);
-}
-
-/*
- * I2C
- */
-static int dibusb_i2c_xfer(struct i2c_adapter *adap,struct i2c_msg msg[],int num)
-{
- struct usb_dibusb *dib = i2c_get_adapdata(adap);
- int i;
-
- if (down_interruptible(&dib->i2c_sem) < 0)
- return -EAGAIN;
-
- for (i = 0; i < num; i++) {
- /* write/read request */
- if (i+1 < num && (msg[i+1].flags & I2C_M_RD)) {
- if (dibusb_i2c_msg(dib, msg[i].addr, msg[i].buf,msg[i].len,
- msg[i+1].buf,msg[i+1].len) < 0)
- break;
- i++;
- } else
- if (dibusb_i2c_msg(dib, msg[i].addr, msg[i].buf,msg[i].len,NULL,0) < 0)
- break;
- }
-
- up(&dib->i2c_sem);
- return i;
-}
-
-static u32 dibusb_i2c_func(struct i2c_adapter *adapter)
-{
- return I2C_FUNC_I2C;
-}
-
-static int thomson_cable_eu_pll_set(struct dvb_frontend* fe, struct
- dvb_frontend_parameters* params);
-
-static struct dib3000_config thomson_cable_eu_config = {
- .demod_address = 0x10,
- .pll_addr = 194,
- .pll_set = thomson_cable_eu_pll_set,
-};
-
-static int thomson_cable_eu_pll_set(struct dvb_frontend* fe, struct
- dvb_frontend_parameters* params)
-{
- struct usb_dibusb* dib = (struct usb_dibusb*) fe->dvb->priv;
- u8 buf[4];
- struct i2c_msg msg = {
- .addr = thomson_cable_eu_config.pll_addr,
- .flags = 0,
- .buf = buf,
- .len = sizeof(buf)
- };
- u32 tfreq = (params->frequency + 36125000) / 62500;
- int vu,p0,p1,p2;
-
- if (params->frequency > 403250000)
- vu = 1, p2 = 1, p1 = 0, p0 = 1;
- else if (params->frequency > 115750000)
- vu = 0, p2 = 1, p1 = 1, p0 = 0;
- else if (params->frequency > 44250000)
- vu = 0, p2 = 0, p1 = 1, p0 = 1;
- else
- return -EINVAL;
-
- buf[0] = (tfreq >> 8) & 0x7f;
- buf[1] = tfreq & 0xff;
- buf[2] = 0x8e;
- buf[3] = (vu << 7) | (p2 << 2) | (p1 << 1) | p0;
-
- if (i2c_transfer (&dib->i2c_adap, &msg, 1) != 1)
- return -EIO;
-
- msleep(1);
- return 0;
-}
-
-static int panasonic_cofdm_env57h1xd5_pll_set(struct dvb_frontend *fe, struct
- dvb_frontend_parameters *params);
-
-static struct dib3000_config panasonic_cofdm_env57h1xd5 = {
- .demod_address = 0x18,
- .pll_addr = 192,
- .pll_set = panasonic_cofdm_env57h1xd5_pll_set,
-};
-
-static int panasonic_cofdm_env57h1xd5_pll_set(struct dvb_frontend *fe, struct
- dvb_frontend_parameters *params)
-{
- struct usb_dibusb* dib = (struct usb_dibusb*) fe->dvb->priv;
- u8 buf[4];
- u32 freq = params->frequency;
- u32 tfreq = (freq + 36125000) / 1000000 * 6 + 1;
- u8 TA, T210, R210, ctrl1, cp210, p4321;
- struct i2c_msg msg = {
- .addr = panasonic_cofdm_env57h1xd5.pll_addr,
- .flags = 0,
- .buf = buf,
- .len = sizeof(buf)
- };
-
- if (freq > 858000000) {
- err("frequency cannot be larger than 858 MHz.");
- return -EINVAL;
- }
-
- // contol data 1 : 1 | T/A=1 | T2,T1,T0 = 0,0,0 | R2,R1,R0 = 0,1,0
- TA = 1;
- T210 = 0;
- R210 = 0x2;
- ctrl1 = (1 << 7) | (TA << 6) | (T210 << 3) | R210;
-
-// ******** CHARGE PUMP CONFIG vs RF FREQUENCIES *****************
- if (freq < 470000000)
- cp210 = 2; // VHF Low and High band ch E12 to E4 to E12
- else if (freq < 526000000)
- cp210 = 4; // UHF band Ch E21 to E27
- else // if (freq < 862000000)
- cp210 = 5; // UHF band ch E28 to E69
-
-//********************* BW select *******************************
- if (freq < 153000000)
- p4321 = 1; // BW selected for VHF low
- else if (freq < 470000000)
- p4321 = 2; // BW selected for VHF high E5 to E12
- else // if (freq < 862000000)
- p4321 = 4; // BW selection for UHF E21 to E69
-
- buf[0] = (tfreq >> 8) & 0xff;
- buf[1] = (tfreq >> 0) & 0xff;
- buf[2] = 0xff & ctrl1;
- buf[3] = (cp210 << 5) | (p4321);
-
- if (i2c_transfer (&dib->i2c_adap, &msg, 1) != 1)
- return -EIO;
-
- msleep(1);
- return 0;
-}
-
-static struct i2c_algorithm dibusb_algo = {
- .name = "DiBcom USB i2c algorithm",
- .id = I2C_ALGO_BIT,
- .master_xfer = dibusb_i2c_xfer,
- .functionality = dibusb_i2c_func,
-};
-
-static void frontend_init(struct usb_dibusb* dib)
-{
- switch (dib->dibdev->parm->type) {
- case DIBUSB1_1:
- case DIBUSB1_1_AN2235:
- dib->fe = dib3000mb_attach(&thomson_cable_eu_config, &dib->i2c_adap,&dib->xfer_ops);
- break;
- case DIBUSB2_0:
- dib->fe = dib3000mc_attach(&panasonic_cofdm_env57h1xd5,&dib->i2c_adap, &dib->xfer_ops);
- break;
- }
-
- if (dib->fe == NULL) {
- printk("dvb-dibusb: A frontend driver was not found for device %04x/%04x\n",
- dib->udev->descriptor.idVendor,
- dib->udev->descriptor.idProduct);
- } else {
- if (dvb_register_frontend(dib->adapter, dib->fe)) {
- printk("dvb-dibusb: Frontend registration failed!\n");
- if (dib->fe->ops->release)
- dib->fe->ops->release(dib->fe);
- dib->fe = NULL;
- }
- }
-}
-
-static int dibusb_dvb_init(struct usb_dibusb *dib)
-{
- int ret;
-
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,4)
- if ((ret = dvb_register_adapter(&dib->adapter, DRIVER_DESC)) < 0) {
-#else
- if ((ret = dvb_register_adapter(&dib->adapter, DRIVER_DESC ,
- THIS_MODULE)) < 0) {
-#endif
- deb_info("dvb_register_adapter failed: error %d", ret);
- goto err;
- }
- dib->adapter->priv = dib;
-
- strncpy(dib->i2c_adap.name,dib->dibdev->name,I2C_NAME_SIZE);
-#ifdef I2C_ADAP_CLASS_TV_DIGITAL
- dib->i2c_adap.class = I2C_ADAP_CLASS_TV_DIGITAL,
-#else
- dib->i2c_adap.class = I2C_CLASS_TV_DIGITAL,
-#endif
- dib->i2c_adap.algo = &dibusb_algo;
- dib->i2c_adap.algo_data = NULL;
- dib->i2c_adap.id = I2C_ALGO_BIT;
-
- i2c_set_adapdata(&dib->i2c_adap, dib);
-
- if ((i2c_add_adapter(&dib->i2c_adap) < 0)) {
- err("could not add i2c adapter");
- goto err_i2c;
- }
-
- dib->demux.dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
-
- dib->demux.priv = (void *)dib;
- /* get pidcount from demod */
- dib->demux.feednum = dib->demux.filternum = 16;
- dib->demux.start_feed = dibusb_start_feed;
- dib->demux.stop_feed = dibusb_stop_feed;
- dib->demux.write_to_decoder = NULL;
- if ((ret = dvb_dmx_init(&dib->demux)) < 0) {
- err("dvb_dmx_init failed: error %d",ret);
- goto err_dmx;
- }
-
- dib->dmxdev.filternum = dib->demux.filternum;
- dib->dmxdev.demux = &dib->demux.dmx;
- dib->dmxdev.capabilities = 0;
- if ((ret = dvb_dmxdev_init(&dib->dmxdev, dib->adapter)) < 0) {
- err("dvb_dmxdev_init failed: error %d",ret);
- goto err_dmx_dev;
- }
-
- dvb_net_init(dib->adapter, &dib->dvb_net, &dib->demux.dmx);
-
- frontend_init(dib);
-
- /* Start the remote-control polling. */
- schedule_delayed_work(&dib->rc_query_work, msecs_to_jiffies(RC_QUERY_INTERVAL));
-
- goto success;
-err_dmx_dev:
- dvb_dmx_release(&dib->demux);
-err_dmx:
- i2c_del_adapter(&dib->i2c_adap);
-err_i2c:
- dvb_unregister_adapter(dib->adapter);
-err:
- return ret;
-success:
- dib->dvb_is_ready = 1;
- return 0;
-}
-
-static int dibusb_dvb_exit(struct usb_dibusb *dib)
-{
- cancel_delayed_work(&dib->rc_query_work);
- flush_scheduled_work();
- input_unregister_device(&dib->rc_input_dev);
-
- dib->dvb_is_ready = 0;
- deb_info("unregistering DVB part\n");
- dvb_net_release(&dib->dvb_net);
- dib->demux.dmx.close(&dib->demux.dmx);
- dvb_dmxdev_release(&dib->dmxdev);
- dvb_dmx_release(&dib->demux);
- if (dib->fe != NULL) dvb_unregister_frontend(dib->fe);
- i2c_del_adapter(&dib->i2c_adap);
- dvb_unregister_adapter(dib->adapter);
-
- return 0;
-}
-
-static int dibusb_exit(struct usb_dibusb *dib)
-{
- int i;
- if (dib->urb_list != NULL) {
- for (i = 0; i < dib->dibdev->parm->num_urbs; i++) {
- if (dib->urb_list[i] != NULL) {
- deb_info("killing URB no. %d.\n",i);
-
- /* stop the URBs */
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,7)
- usb_unlink_urb(dib->urb_list[i]);
-#else
- usb_kill_urb(dib->urb_list[i]);
-#endif
-
- deb_info("freeing URB no. %d.\n",i);
- /* free the URBs */
- usb_free_urb(dib->urb_list[i]);
- }
- }
- /* free the urb array */
- kfree(dib->urb_list);
- }
-
- pci_free_consistent(NULL,
- dib->dibdev->parm->urb_buf_size*dib->dibdev->parm->num_urbs,dib->buffer,
- dib->dma_handle);
- return 0;
-}
-
-static int dibusb_init(struct usb_dibusb *dib)
-{
- int ret,i,bufsize;
- sema_init(&dib->usb_sem, 1);
- sema_init(&dib->i2c_sem, 1);
-
- /*
- * when reloading the driver w/o replugging the device
- * a timeout occures, this helps
- */
- usb_clear_halt(dib->udev,usb_sndbulkpipe(dib->udev,dib->dibdev->parm->cmd_pipe));
- usb_clear_halt(dib->udev,usb_rcvbulkpipe(dib->udev,dib->dibdev->parm->result_pipe));
- usb_clear_halt(dib->udev,usb_rcvbulkpipe(dib->udev,dib->dibdev->parm->data_pipe));
-
- /* allocate the array for the data transfer URBs */
- dib->urb_list = kmalloc(dib->dibdev->parm->num_urbs*sizeof(struct urb *),GFP_KERNEL);
- if (dib->urb_list == NULL)
- return -ENOMEM;
- memset(dib->urb_list,0,dib->dibdev->parm->num_urbs*sizeof(struct urb *));
-
- bufsize = dib->dibdev->parm->num_urbs*dib->dibdev->parm->urb_buf_size;
- deb_info("allocate %d bytes as buffersize for all URBs\n",bufsize);
- /* allocate the actual buffer for the URBs */
- if ((dib->buffer = pci_alloc_consistent(NULL,bufsize,&dib->dma_handle)) == NULL) {
- deb_info("not enough memory.\n");
- dibusb_exit(dib);
- return -ENOMEM;
- }
- deb_info("allocation complete\n");
- memset(dib->buffer,0,bufsize);
-
- /* allocate and submit the URBs */
- for (i = 0; i < dib->dibdev->parm->num_urbs; i++) {
- if (!(dib->urb_list[i] = usb_alloc_urb(0,GFP_KERNEL))) {
- dibusb_exit(dib);
- return -ENOMEM;
- }
- deb_info("submitting URB no. %d\n",i);
-
- usb_fill_bulk_urb( dib->urb_list[i], dib->udev,
- usb_rcvbulkpipe(dib->udev,dib->dibdev->parm->data_pipe),
- &dib->buffer[i*dib->dibdev->parm->urb_buf_size],
- dib->dibdev->parm->urb_buf_size,
- dibusb_urb_complete, dib);
-
- dib->urb_list[i]->transfer_flags = 0;
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,7)
- dib->urb_list[i]->timeout = 0;
-#endif
-
- if ((ret = usb_submit_urb(dib->urb_list[i],GFP_KERNEL))) {
- err("could not submit buffer urb no. %d\n",i);
- dibusb_exit(dib);
- return ret;
- }
- }
-
- dib->dvb_is_ready = 0;
-
- /* Initialise the remote-control structures.*/
- init_input_dev(&dib->rc_input_dev);
-
- dib->rc_input_dev.evbit[0] = BIT(EV_KEY);
- dib->rc_input_dev.keycodesize = sizeof(unsigned char);
- dib->rc_input_dev.keycodemax = KEY_MAX;
- dib->rc_input_dev.name = DRIVER_DESC " remote control";
-
- for (i=0; i<sizeof(rc_keys)/sizeof(rc_keys[0]); i++)
- set_bit(rc_keys[i].key, dib->rc_input_dev.keybit);
-
- input_register_device(&dib->rc_input_dev);
-
- dib->rc_input_event = KEY_MAX;
-
- INIT_WORK(&dib->rc_query_work, dibusb_query_rc, dib);
-
- dibusb_hw_wakeup(dib);
-
- if ((ret = dibusb_dvb_init(dib))) {
- dibusb_exit(dib);
- return ret;
- }
- return 0;
-}
-
-/*
- * load a firmware packet to the device
- */
-static int dibusb_writemem(struct usb_device *udev,u16 addr,u8 *data, u8 len)
-{
- return usb_control_msg(udev, usb_sndctrlpipe(udev,0),
- 0xa0, USB_TYPE_VENDOR, addr, 0x00, data, len, 5*HZ);
-}
-
-static int dibusb_loadfirmware(struct usb_device *udev,
- struct dibusb_device *dibdev)
-{
- const struct firmware *fw = NULL;
- const char **fws;
- u16 addr;
- u8 *b,*p;
- int ret = 0,i;
-
- fws = dibdev->parm->fw_filenames;
-
- for (i = 0; i < sizeof(fws)/sizeof(const char*); i++) {
- if ((ret = request_firmware(&fw, fws[i], &udev->dev)) == 0) {
- info("using firmware file (%s).",fws[i]);
- break;
- }
- deb_info("tried to find '%s' firmware - unsuccessful. (%d)\n",
- fws[i],ret);
- }
-
- if (fw == NULL) {
- err("did not find a valid firmware file. "
- "Please see linux/Documentation/dvb/ for more details on firmware-problems.");
- return -EINVAL;
- }
- p = kmalloc(fw->size,GFP_KERNEL);
- if (p != NULL) {
- u8 reset;
- /*
- * you cannot use the fw->data as buffer for
- * usb_control_msg, a new buffer has to be
- * created
- */
- memcpy(p,fw->data,fw->size);
-
- /* stop the CPU */
- reset = 1;
- if ((ret = dibusb_writemem(udev,dibdev->parm->usb_cpu_csreg,&reset,1)) != 1)
- err("could not stop the USB controller CPU.");
- for(i = 0; p[i+3] == 0 && i < fw->size; ) {
- b = (u8 *) &p[i];
- addr = *((u16 *) &b[1]);
-
- ret = dibusb_writemem(udev,addr,&b[4],b[0]);
-
- if (ret != b[0]) {
- err("error while transferring firmware "
- "(transferred size: %d, block size: %d)",
- ret,b[0]);
- ret = -EINVAL;
- break;
- }
- i += 5 + b[0];
- }
- /* length in ret */
- if (ret > 0)
- ret = 0;
- /* restart the CPU */
- reset = 0;
- if (ret || dibusb_writemem(udev,dibdev->parm->usb_cpu_csreg,&reset,1) != 1) {
- err("could not restart the USB controller CPU.");
- ret = -EINVAL;
- }
-
- kfree(p);
- } else {
- ret = -ENOMEM;
- }
- release_firmware(fw);
-
- return ret;
-}
-
-/*
- * USB
- */
-static int dibusb_probe(struct usb_interface *intf,
- const struct usb_device_id *id)
-{
- struct usb_device *udev = interface_to_usbdev(intf);
- struct usb_dibusb *dib = NULL;
- struct dibusb_device *dibdev = NULL;
-
- int ret = -ENOMEM,i,cold=0;
-
- for (i = 0; i < DIBUSB_SUPPORTED_DEVICES; i++)
- if (dibusb_devices[i].cold_product_id == udev->descriptor.idProduct ||
- dibusb_devices[i].warm_product_id == udev->descriptor.idProduct) {
- dibdev = &dibusb_devices[i];
-
- cold = dibdev->cold_product_id == udev->descriptor.idProduct;
-
- if (cold)
- info("found a '%s' in cold state, will try to load a firmware",dibdev->name);
- else
- info("found a '%s' in warm state.",dibdev->name);
- }
-
- if (dibdev == NULL) {
- err("something went very wrong, "
- "unknown product ID: %.4x",udev->descriptor.idProduct);
- return -ENODEV;
- }
-
- if (cold)
- ret = dibusb_loadfirmware(udev,dibdev);
- else {
- dib = kmalloc(sizeof(struct usb_dibusb),GFP_KERNEL);
- if (dib == NULL) {
- err("no memory");
- return ret;
- }
- memset(dib,0,sizeof(struct usb_dibusb));
-
- dib->pid_parse = 1;
- switch (udev->speed) {
- case USB_SPEED_LOW:
- err("cannot handle USB speed because it is to sLOW.");
- break;
- case USB_SPEED_FULL:
- info("running at FULL speed, will use pid parsing.");
- break;
- case USB_SPEED_HIGH:
- if (!pid_parse) {
- dib->pid_parse = 0;
- info("running at HIGH speed, will deliver the complete TS.");
- } else
- info("running at HIGH speed, will use pid_parsing anyway.");
- break;
- case USB_SPEED_UNKNOWN: /* fall through */
- default:
- err("cannot handle USB speed because it is unkown.");
- break;
- }
-
- dib->udev = udev;
- dib->dibdev = dibdev;
-
- usb_set_intfdata(intf, dib);
-
- ret = dibusb_init(dib);
- }
-
- if (ret == 0)
- info("%s successfully initialized and connected.",dibdev->name);
- else
- info("%s error while loading driver (%d)",dibdev->name,ret);
- return ret;
-}
-
-static void dibusb_disconnect(struct usb_interface *intf)
-{
- struct usb_dibusb *dib = usb_get_intfdata(intf);
- const char *name = DRIVER_DESC;
-
- usb_set_intfdata(intf,NULL);
- if (dib != NULL) {
- name = dib->dibdev->name;
- dibusb_dvb_exit(dib);
- dibusb_exit(dib);
- kfree(dib);
- }
- info("%s successfully deinitialized and disconnected.",name);
-
-}
-
-/* usb specific object needed to register this driver with the usb subsystem */
-static struct usb_driver dibusb_driver = {
- .owner = THIS_MODULE,
- .name = "dvb_dibusb",
- .probe = dibusb_probe,
- .disconnect = dibusb_disconnect,
- .id_table = dibusb_table,
-};
-
-/* module stuff */
-static int __init usb_dibusb_init(void)
-{
- int result;
- if ((result = usb_register(&dibusb_driver))) {
- err("usb_register failed. Error number %d",result);
- return result;
- }
-
- return 0;
-}
-
-static void __exit usb_dibusb_exit(void)
-{
- /* deregister this driver from the USB subsystem */
- usb_deregister(&dibusb_driver);
-}
-
-module_init (usb_dibusb_init);
-module_exit (usb_dibusb_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL");
+++ /dev/null
-obj-$(CONFIG_DVB_CORE) += crc32.o
+++ /dev/null
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/string.h>
-#include <linux/module.h>
-#include <linux/ioctl.h>
-#include <linux/slab.h>
-#include <linux/smp_lock.h>
-#include <asm/uaccess.h>
-
-void dvb_kernel_thread_setup (const char *thread_name)
-{
- lock_kernel ();
-
- daemonize (thread_name);
-
- sigfillset (¤t->blocked);
-
- unlock_kernel ();
-}
-
-/* if the miracle happens and "generic_usercopy()" is included into
- the kernel, then this can vanish. please don't make the mistake and
- define this as video_usercopy(). this will introduce a dependecy
- to the v4l "videodev.o" module, which is unnecessary for some
- cards (ie. the budget dvb-cards don't need the v4l module...) */
-int dvb_usercopy(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg,
- int (*func)(struct inode *inode, struct file *file,
- unsigned int cmd, void *arg))
-{
- char sbuf[128];
- void *mbuf = NULL;
- void *parg = NULL;
- int err = -EINVAL;
-
- /* Copy arguments into temp kernel buffer */
- switch (_IOC_DIR(cmd)) {
- case _IOC_NONE:
- /*
- * For this command, the pointer is actually an integer
- * argument.
- */
- parg = (void *) arg;
- break;
- case _IOC_READ: /* some v4l ioctls are marked wrong ... */
- case _IOC_WRITE:
- case (_IOC_WRITE | _IOC_READ):
- if (_IOC_SIZE(cmd) <= sizeof(sbuf)) {
- parg = sbuf;
- } else {
- /* too big to allocate from stack */
- mbuf = kmalloc(_IOC_SIZE(cmd),GFP_KERNEL);
- if (NULL == mbuf)
- return -ENOMEM;
- parg = mbuf;
- }
-
- err = -EFAULT;
- if (copy_from_user(parg, (void __user *)arg, _IOC_SIZE(cmd)))
- goto out;
- break;
- }
-
- /* call driver */
- if ((err = func(inode, file, cmd, parg)) == -ENOIOCTLCMD)
- err = -EINVAL;
-
- if (err < 0)
- goto out;
-
- /* Copy results into user buffer */
- switch (_IOC_DIR(cmd))
- {
- case _IOC_READ:
- case (_IOC_WRITE | _IOC_READ):
- if (copy_to_user((void __user *)arg, parg, _IOC_SIZE(cmd)))
- err = -EFAULT;
- break;
- }
-
-out:
- if (mbuf)
- kfree(mbuf);
-
- return err;
-}
-
-EXPORT_SYMBOL(dvb_usercopy);
-EXPORT_SYMBOL(dvb_kernel_thread_setup);
+++ /dev/null
-/*
- * dvb_functions.h: isolate some Linux specific stuff from the dvb-core
- * that can't be expressed as a one-liner
- * in order to make porting to other environments easier
- *
- * Copyright (C) 2003 Convergence GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Lesser Public License
- * as published by the Free Software Foundation; either version 2.1
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- *
- */
-
-#ifndef __DVB_FUNCTIONS_H__
-#define __DVB_FUNCTIONS_H__
-
-/**
- * a sleeping delay function, waits i ms
- *
- */
-static inline
-void dvb_delay(int i)
-{
- current->state=TASK_INTERRUPTIBLE;
- schedule_timeout((HZ*i)/1000);
-}
-
-/* we don't mess with video_usercopy() any more,
-we simply define out own dvb_usercopy(), which will hopefull become
-generic_usercopy() someday... */
-
-extern int dvb_usercopy(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg,
- int (*func)(struct inode *inode, struct file *file,
- unsigned int cmd, void *arg));
-
-extern void dvb_kernel_thread_setup (const char *thread_name);
-
-#endif
-
+++ /dev/null
-/*
- * dvb_i2c.h: simplified i2c interface for DVB adapters to get rid of i2c-core.c
- *
- * Copyright (C) 2002 Holger Waechtler for convergence integrated media GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
- */
-
-#include <linux/errno.h>
-#include <linux/slab.h>
-#include <linux/list.h>
-#include <linux/module.h>
-#include <asm/semaphore.h>
-
-#include "dvb_i2c.h"
-#include "dvb_functions.h"
-
-
-struct dvb_i2c_device {
- struct list_head list_head;
- struct module *owner;
- int (*attach) (struct dvb_i2c_bus *i2c, void **data);
- void (*detach) (struct dvb_i2c_bus *i2c, void *data);
- void *data;
-};
-
-LIST_HEAD(dvb_i2c_buslist);
-LIST_HEAD(dvb_i2c_devicelist);
-
-DECLARE_MUTEX(dvb_i2c_mutex);
-
-static int register_i2c_client (struct dvb_i2c_bus *i2c, struct dvb_i2c_device *dev)
-{
- struct dvb_i2c_device *client;
-
- if (!(client = kmalloc (sizeof (struct dvb_i2c_device), GFP_KERNEL)))
- return -ENOMEM;
-
- client->detach = dev->detach;
- client->owner = dev->owner;
- client->data = dev->data;
-
- INIT_LIST_HEAD(&client->list_head);
-
- list_add_tail (&client->list_head, &i2c->client_list);
-
- return 0;
-}
-
-
-static void try_attach_device (struct dvb_i2c_bus *i2c, struct dvb_i2c_device *dev)
-{
- if (dev->owner) {
- if (!try_module_get(dev->owner))
- return;
- }
-
- if (dev->attach (i2c, &dev->data) == 0) {
- register_i2c_client (i2c, dev);
- } else {
- if (dev->owner)
- module_put (dev->owner);
- }
-}
-
-
-static void detach_device (struct dvb_i2c_bus *i2c, struct dvb_i2c_device *dev)
-{
- dev->detach (i2c, dev->data);
-
- if (dev->owner)
- module_put (dev->owner);
-}
-
-
-static void unregister_i2c_client_from_bus (struct dvb_i2c_device *dev,
- struct dvb_i2c_bus *i2c)
-{
- struct list_head *entry, *n;
-
- list_for_each_safe (entry, n, &i2c->client_list) {
- struct dvb_i2c_device *client;
-
- client = list_entry (entry, struct dvb_i2c_device, list_head);
-
- if (client->detach == dev->detach) {
- list_del (entry);
- detach_device (i2c, dev);
- }
- }
-}
-
-
-static void unregister_i2c_client_from_all_busses (struct dvb_i2c_device *dev)
-{
- struct list_head *entry, *n;
-
- list_for_each_safe (entry, n, &dvb_i2c_buslist) {
- struct dvb_i2c_bus *i2c;
-
- i2c = list_entry (entry, struct dvb_i2c_bus, list_head);
-
- unregister_i2c_client_from_bus (dev, i2c);
- }
-}
-
-
-static void unregister_all_clients_from_bus (struct dvb_i2c_bus *i2c)
-{
- struct list_head *entry, *n;
-
- list_for_each_safe (entry, n, &(i2c->client_list)) {
- struct dvb_i2c_device *dev;
-
- dev = list_entry (entry, struct dvb_i2c_device, list_head);
-
- unregister_i2c_client_from_bus (dev, i2c);
- }
-}
-
-
-static void probe_device_on_all_busses (struct dvb_i2c_device *dev)
-{
- struct list_head *entry;
-
- list_for_each (entry, &dvb_i2c_buslist) {
- struct dvb_i2c_bus *i2c;
-
- i2c = list_entry (entry, struct dvb_i2c_bus, list_head);
-
- try_attach_device (i2c, dev);
- }
-}
-
-
-static void probe_devices_on_bus (struct dvb_i2c_bus *i2c)
-{
- struct list_head *entry;
-
- list_for_each (entry, &dvb_i2c_devicelist) {
- struct dvb_i2c_device *dev;
-
- dev = list_entry (entry, struct dvb_i2c_device, list_head);
-
- try_attach_device (i2c, dev);
- }
-}
-
-
-static struct dvb_i2c_bus* dvb_find_i2c_bus (int (*xfer) (struct dvb_i2c_bus *i2c,
- const struct i2c_msg msgs[],
- int num),
- struct dvb_adapter *adapter,
- int id)
-{
- struct list_head *entry;
-
- list_for_each (entry, &dvb_i2c_buslist) {
- struct dvb_i2c_bus *i2c;
-
- i2c = list_entry (entry, struct dvb_i2c_bus, list_head);
-
- if (i2c->xfer == xfer && i2c->adapter == adapter && i2c->id == id)
- return i2c;
- }
-
- return NULL;
-}
-
-
-struct dvb_i2c_bus*
-dvb_register_i2c_bus (int (*xfer) (struct dvb_i2c_bus *i2c,
- const struct i2c_msg *msgs, int num),
- void *data, struct dvb_adapter *adapter, int id)
-{
- struct dvb_i2c_bus *i2c;
-
- if (down_interruptible (&dvb_i2c_mutex))
- return NULL;
-
- if (!(i2c = kmalloc (sizeof (struct dvb_i2c_bus), GFP_KERNEL))) {
- up (&dvb_i2c_mutex);
- return NULL;
- }
-
- INIT_LIST_HEAD(&i2c->list_head);
- INIT_LIST_HEAD(&i2c->client_list);
-
- i2c->xfer = xfer;
- i2c->data = data;
- i2c->adapter = adapter;
- i2c->id = id;
-
- probe_devices_on_bus (i2c);
-
- list_add_tail (&i2c->list_head, &dvb_i2c_buslist);
-
- up (&dvb_i2c_mutex);
-
- return i2c;
-}
-
-
-void dvb_unregister_i2c_bus (int (*xfer) (struct dvb_i2c_bus *i2c,
- const struct i2c_msg msgs[], int num),
- struct dvb_adapter *adapter, int id)
-{
- struct dvb_i2c_bus *i2c;
-
- down (&dvb_i2c_mutex);
-
- if ((i2c = dvb_find_i2c_bus (xfer, adapter, id))) {
- unregister_all_clients_from_bus (i2c);
- list_del (&i2c->list_head);
- kfree (i2c);
- }
-
- up (&dvb_i2c_mutex);
-}
-
-
-int dvb_register_i2c_device (struct module *owner,
- int (*attach) (struct dvb_i2c_bus *i2c, void **data),
- void (*detach) (struct dvb_i2c_bus *i2c, void *data))
-{
- struct dvb_i2c_device *entry;
-
- if (down_interruptible (&dvb_i2c_mutex))
- return -ERESTARTSYS;
-
- if (!(entry = kmalloc (sizeof (struct dvb_i2c_device), GFP_KERNEL))) {
- up(&dvb_i2c_mutex);
- return -ENOMEM;
- }
-
- entry->owner = owner;
- entry->attach = attach;
- entry->detach = detach;
-
- INIT_LIST_HEAD(&entry->list_head);
-
- probe_device_on_all_busses (entry);
-
- list_add_tail (&entry->list_head, &dvb_i2c_devicelist);
-
- up (&dvb_i2c_mutex);
-
- return 0;
-}
-
-
-int dvb_unregister_i2c_device (int (*attach) (struct dvb_i2c_bus *i2c, void **data))
-{
- struct list_head *entry, *n;
-
- down (&dvb_i2c_mutex);
-
- list_for_each_safe (entry, n, &dvb_i2c_devicelist) {
- struct dvb_i2c_device *dev;
-
- dev = list_entry (entry, struct dvb_i2c_device, list_head);
-
- if (dev->attach == attach) {
- list_del (entry);
- unregister_i2c_client_from_all_busses (dev);
- kfree (entry);
- up (&dvb_i2c_mutex);
- return 0;
- }
- }
-
- up (&dvb_i2c_mutex);
-
- return -EINVAL;
-}
-
-
+++ /dev/null
-/*
- * dvb_i2c.h: i2c interface to get rid of i2c-core.c
- *
- * Copyright (C) 2002 Holger Waechtler for convergence integrated media GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public License
- * as published by the Free Software Foundation; either version 2.1
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#ifndef _DVB_I2C_H_
-#define _DVB_I2C_H_
-
-#include <linux/list.h>
-#include <linux/i2c.h>
-
-#include "dvbdev.h"
-
-
-struct dvb_i2c_bus {
- struct list_head list_head;
- int (*xfer) (struct dvb_i2c_bus *i2c,
- const struct i2c_msg msgs[],
- int num);
- void *data;
- struct dvb_adapter *adapter;
- int id;
- struct list_head client_list;
-};
-
-
-extern struct dvb_i2c_bus*
-dvb_register_i2c_bus (int (*xfer) (struct dvb_i2c_bus *i2c,
- const struct i2c_msg *msgs, int num),
- void *data,
- struct dvb_adapter *adapter,
- int id);
-
-extern
-void dvb_unregister_i2c_bus (int (*xfer) (struct dvb_i2c_bus *i2c,
- const struct i2c_msg msgs[], int num),
- struct dvb_adapter *adapter,
- int id);
-
-
-extern int dvb_register_i2c_device (struct module *owner,
- int (*attach) (struct dvb_i2c_bus *i2c, void **data),
- void (*detach) (struct dvb_i2c_bus *i2c, void *data));
-
-extern int dvb_unregister_i2c_device (int (*attach) (struct dvb_i2c_bus *i2c, void **data));
-
-#endif
-
+++ /dev/null
-#include <linux/errno.h>
-#include <linux/module.h>
-#include <linux/ioctl.h>
-#include <linux/slab.h>
-#include <linux/fs.h>
-#include <asm/uaccess.h>
-
-#include "dmxdev.h"
-#include "dvb_demux.h"
-#include "dvb_frontend.h"
-#include "dvb_net.h"
-#include "dvb_filter.h"
-#include "dvb_ca_en50221.h"
-
-EXPORT_SYMBOL(dvb_dmxdev_init);
-EXPORT_SYMBOL(dvb_dmxdev_release);
-EXPORT_SYMBOL(dvb_dmx_init);
-EXPORT_SYMBOL(dvb_dmx_release);
-EXPORT_SYMBOL(dvb_dmx_swfilter_packet);
-EXPORT_SYMBOL(dvb_dmx_swfilter_packets);
-EXPORT_SYMBOL(dvb_dmx_swfilter);
-EXPORT_SYMBOL(dvb_dmx_swfilter_204);
-EXPORT_SYMBOL(dvbdmx_connect_frontend);
-EXPORT_SYMBOL(dvbdmx_disconnect_frontend);
-
-EXPORT_SYMBOL(dvb_register_frontend);
-EXPORT_SYMBOL(dvb_unregister_frontend);
-EXPORT_SYMBOL(dvb_add_frontend_ioctls);
-EXPORT_SYMBOL(dvb_remove_frontend_ioctls);
-EXPORT_SYMBOL(dvb_add_frontend_notifier);
-EXPORT_SYMBOL(dvb_remove_frontend_notifier);
-
-EXPORT_SYMBOL(dvb_register_i2c_bus);
-EXPORT_SYMBOL(dvb_unregister_i2c_bus);
-EXPORT_SYMBOL(dvb_register_i2c_device);
-EXPORT_SYMBOL(dvb_unregister_i2c_device);
-
-EXPORT_SYMBOL(dvb_net_init);
-EXPORT_SYMBOL(dvb_net_release);
-
-EXPORT_SYMBOL(dvb_register_adapter);
-EXPORT_SYMBOL(dvb_unregister_adapter);
-EXPORT_SYMBOL(dvb_register_device);
-EXPORT_SYMBOL(dvb_unregister_device);
-EXPORT_SYMBOL(dvb_generic_ioctl);
-EXPORT_SYMBOL(dvb_generic_open);
-EXPORT_SYMBOL(dvb_generic_release);
-
-EXPORT_SYMBOL(dvb_filter_pes2ts_init);
-EXPORT_SYMBOL(dvb_filter_pes2ts);
-EXPORT_SYMBOL(dvb_filter_get_ac3info);
-
-EXPORT_SYMBOL(dvb_ca_en50221_init);
-EXPORT_SYMBOL(dvb_ca_en50221_release);
-EXPORT_SYMBOL(dvb_ca_en50221_frda_irq);
-EXPORT_SYMBOL(dvb_ca_en50221_camchange_irq);
-EXPORT_SYMBOL(dvb_ca_en50221_camready_irq);
+++ /dev/null
-/*
- Driver for Alps TDLB7 Frontend
-
- Copyright (C) 1999 Juergen Peitz
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
-*/
-
-
-/*
- This driver needs a copy of the firmware file 'Sc_main.mc' from the Haupauge
- windows driver in the '/usr/lib/DVB/driver/frontends' directory.
- You can also pass the complete file name with the module parameter 'firmware_file'.
-
-*/
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/vmalloc.h>
-#include <linux/fs.h>
-#include <linux/unistd.h>
-#include <linux/delay.h>
-#include <linux/syscalls.h>
-
-#include "dvb_frontend.h"
-#include "dvb_functions.h"
-
-#ifndef CONFIG_ALPS_TDLB7_FIRMWARE_LOCATION
-#define CONFIG_ALPS_TDLB7_FIRMWARE_LOCATION "/usr/lib/DVB/driver/frontends/Sc_main.mc"
-#endif
-
-static char * firmware_file = CONFIG_ALPS_TDLB7_FIRMWARE_LOCATION;
-static int debug = 0;
-
-#define dprintk if (debug) printk
-
-/* firmware size for sp8870 */
-#define SP8870_FIRMWARE_SIZE 16382
-
-/* starting point for firmware in file 'Sc_main.mc' */
-#define SP8870_FIRMWARE_OFFSET 0x0A
-
-static struct dvb_frontend_info tdlb7_info = {
- .name = "Alps TDLB7",
- .type = FE_OFDM,
- .frequency_min = 470000000,
- .frequency_max = 860000000,
- .frequency_stepsize = 166666,
- .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
- FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
- FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
- FE_CAN_QPSK | FE_CAN_QAM_16 |
- FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
- FE_CAN_HIERARCHY_AUTO | FE_CAN_RECOVER
-};
-
-
-static int sp8870_writereg (struct dvb_i2c_bus *i2c, u16 reg, u16 data)
-{
- u8 buf [] = { reg >> 8, reg & 0xff, data >> 8, data & 0xff };
- struct i2c_msg msg = { .addr = 0x71, .flags = 0, .buf = buf, .len = 4 };
- int err;
-
- if ((err = i2c->xfer (i2c, &msg, 1)) != 1) {
- dprintk ("%s: writereg error (err == %i, reg == 0x%02x, data == 0x%02x)\n", __FUNCTION__, err, reg, data);
- return -EREMOTEIO;
- }
-
- return 0;
-}
-
-
-static u16 sp8870_readreg (struct dvb_i2c_bus *i2c, u16 reg)
-{
- int ret;
- u8 b0 [] = { reg >> 8 , reg & 0xff };
- u8 b1 [] = { 0, 0 };
- struct i2c_msg msg [] = { { .addr = 0x71, .flags = 0, .buf = b0, .len = 2 },
- { .addr = 0x71, .flags = I2C_M_RD, .buf = b1, .len = 2 } };
-
- ret = i2c->xfer (i2c, msg, 2);
-
- if (ret != 2) {
- dprintk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
- return -1;
- }
-
- return (b1[0] << 8 | b1[1]);
-}
-
-
-static int sp5659_write (struct dvb_i2c_bus *i2c, u8 data [4])
-{
- int ret;
- struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = 4 };
-
- ret = i2c->xfer (i2c, &msg, 1);
-
- if (ret != 1)
- printk("%s: i/o error (ret == %i)\n", __FUNCTION__, ret);
-
- return (ret != 1) ? -1 : 0;
-}
-
-
-static void sp5659_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq)
-{
- u32 div = (freq + 36200000) / 166666;
- u8 buf [4];
- int pwr;
-
- if (freq <= 782000000)
- pwr = 1;
- else
- pwr = 2;
-
- buf[0] = (div >> 8) & 0x7f;
- buf[1] = div & 0xff;
- buf[2] = 0x85;
- buf[3] = pwr << 6;
-
- /* open i2c gate for PLL message transmission... */
- sp8870_writereg(i2c, 0x206, 0x001);
- sp5659_write (i2c, buf);
- sp8870_writereg(i2c, 0x206, 0x000);
-}
-
-
-static int sp8870_read_firmware_file (const char *fn, char **fp)
-{
- int fd;
- loff_t filesize;
- char *dp;
-
- fd = sys_open(fn, 0, 0);
- if (fd == -1) {
- printk("%s: unable to open '%s'.\n", __FUNCTION__, fn);
- return -EIO;
- }
-
- filesize = sys_lseek(fd, 0L, 2);
- if (filesize <= 0 || filesize < SP8870_FIRMWARE_OFFSET + SP8870_FIRMWARE_SIZE) {
- printk("%s: firmware filesize to small '%s'\n", __FUNCTION__, fn);
- sys_close(fd);
- return -EIO;
- }
-
- *fp= dp = vmalloc(SP8870_FIRMWARE_SIZE);
- if (dp == NULL) {
- printk("%s: out of memory loading '%s'.\n", __FUNCTION__, fn);
- sys_close(fd);
- return -EIO;
- }
-
- sys_lseek(fd, SP8870_FIRMWARE_OFFSET, 0);
- if (sys_read(fd, dp, SP8870_FIRMWARE_SIZE) != SP8870_FIRMWARE_SIZE) {
- printk("%s: failed to read '%s'.\n",__FUNCTION__, fn);
- vfree(dp);
- sys_close(fd);
- return -EIO;
- }
-
- sys_close(fd);
- *fp = dp;
-
- return 0;
-}
-
-
-static int sp8870_firmware_upload (struct dvb_i2c_bus *i2c)
-{
- struct i2c_msg msg;
- char *fw_buf = NULL;
- int fw_pos;
- u8 tx_buf[255];
- int tx_len;
- int err = 0;
- mm_segment_t fs = get_fs();
-
- dprintk ("%s: ...\n", __FUNCTION__);
-
- // system controller stop
- sp8870_writereg(i2c,0x0F00,0x0000);
-
- // instruction RAM register hiword
- sp8870_writereg(i2c, 0x8F08, ((SP8870_FIRMWARE_SIZE / 2) & 0xFFFF));
-
- // instruction RAM MWR
- sp8870_writereg(i2c, 0x8F0A, ((SP8870_FIRMWARE_SIZE / 2) >> 16));
-
- // reading firmware file to buffer
- set_fs(get_ds());
- err = sp8870_read_firmware_file(firmware_file, (char**) &fw_buf);
- set_fs(fs);
- if (err != 0) {
- printk("%s: reading firmware file failed!\n", __FUNCTION__);
- return err;
- }
-
- // do firmware upload
- fw_pos = 0;
- while (fw_pos < SP8870_FIRMWARE_SIZE){
- tx_len = (fw_pos <= SP8870_FIRMWARE_SIZE - 252) ? 252 : SP8870_FIRMWARE_SIZE - fw_pos;
- // write register 0xCF0A
- tx_buf[0] = 0xCF;
- tx_buf[1] = 0x0A;
- memcpy(&tx_buf[2], fw_buf + fw_pos, tx_len);
- msg.addr=0x71;
- msg.flags=0;
- msg.buf = tx_buf;
- msg.len = tx_len + 2;
- if ((err = i2c->xfer (i2c, &msg, 1)) != 1) {
- printk("%s: firmware upload failed!\n", __FUNCTION__);
- printk ("%s: i2c error (err == %i)\n", __FUNCTION__, err);
- vfree(fw_buf);
- return err;
- }
- fw_pos += tx_len;
- }
-
- vfree(fw_buf);
-
- dprintk ("%s: done!\n", __FUNCTION__);
- return 0;
-};
-
-
-static void sp8870_microcontroller_stop (struct dvb_i2c_bus *i2c)
-{
- sp8870_writereg(i2c, 0x0F08, 0x000);
- sp8870_writereg(i2c, 0x0F09, 0x000);
-
- // microcontroller STOP
- sp8870_writereg(i2c, 0x0F00, 0x000);
-}
-
-
-static void sp8870_microcontroller_start (struct dvb_i2c_bus *i2c)
-{
- sp8870_writereg(i2c, 0x0F08, 0x000);
- sp8870_writereg(i2c, 0x0F09, 0x000);
-
- // microcontroller START
- sp8870_writereg(i2c, 0x0F00, 0x001);
- // not documented but if we don't read 0x0D01 out here
- // we don't get a correct data valid signal
- sp8870_readreg(i2c, 0x0D01);
-}
-
-
-static int sp8870_init (struct dvb_i2c_bus *i2c)
-{
- dprintk ("%s\n", __FUNCTION__);
-
- /* enable TS output and interface pins */
- sp8870_writereg(i2c, 0xc18, 0x00d);
-
- // system controller stop
- sp8870_microcontroller_stop(i2c);
-
- // ADC mode
- sp8870_writereg(i2c,0x0301,0x0003);
-
- // Reed Solomon parity bytes passed to output
- sp8870_writereg(i2c,0x0C13,0x0001);
-
- // MPEG clock is suppressed if no valid data
- sp8870_writereg(i2c,0x0C14,0x0001);
-
- /* bit 0x010: enable data valid signal */
- sp8870_writereg(i2c, 0x0D00, 0x010);
- sp8870_writereg(i2c, 0x0D01, 0x000);
-
- return 0;
-}
-
-
-static int sp8870_read_status (struct dvb_i2c_bus *i2c, fe_status_t * fe_status)
-{
- int status;
- int signal;
-
- *fe_status = 0;
-
- status = sp8870_readreg (i2c, 0x0200);
- if (status < 0)
- return -EIO;
-
- signal = sp8870_readreg (i2c, 0x0303);
- if (signal < 0)
- return -EIO;
-
- if (signal > 0x0F)
- *fe_status |= FE_HAS_SIGNAL;
- if (status & 0x08)
- *fe_status |= FE_HAS_SYNC;
- if (status & 0x04)
- *fe_status |= FE_HAS_LOCK | FE_HAS_CARRIER | FE_HAS_VITERBI;
-
- return 0;
-}
-
-
-static int sp8870_read_ber (struct dvb_i2c_bus *i2c, u32 * ber)
-{
- int ret;
- u32 tmp;
-
- *ber = 0;
-
- ret = sp8870_readreg(i2c, 0xC08);
- if (ret < 0)
- return -EIO;
-
- tmp = ret & 0x3F;
-
- ret = sp8870_readreg(i2c, 0xC07);
- if (ret < 0)
- return -EIO;
-
- tmp = ret << 6;
-
- if (tmp >= 0x3FFF0)
- tmp = ~0;
-
- *ber = tmp;
-
- return 0;
- }
-
-
-static int sp8870_read_signal_strength (struct dvb_i2c_bus *i2c, u16 * signal)
- {
- int ret;
- u16 tmp;
-
- *signal = 0;
-
- ret = sp8870_readreg (i2c, 0x306);
- if (ret < 0)
- return -EIO;
-
- tmp = ret << 8;
-
- ret = sp8870_readreg (i2c, 0x303);
- if (ret < 0)
- return -EIO;
-
- tmp |= ret;
-
- if (tmp)
- *signal = 0xFFFF - tmp;
-
- return 0;
- }
-
-
-static int sp8870_read_snr(struct dvb_i2c_bus *i2c, u32* snr)
- {
- *snr=0;
- return -EOPNOTSUPP;
- }
-
-
-static int sp8870_read_uncorrected_blocks (struct dvb_i2c_bus *i2c, u32* ublocks)
- {
- int ret;
-
- *ublocks=0;
-
- ret = sp8870_readreg(i2c, 0xC0C);
- if (ret < 0)
- return -EIO;
-
- if (ret == 0xFFFF)
- ret = ~0;
-
- *ublocks = ret;
-
- return 0;
- }
-
-
-static int sp8870_read_data_valid_signal(struct dvb_i2c_bus *i2c)
-{
- return (sp8870_readreg(i2c, 0x0D02) > 0);
-}
-
-
-static
-int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05)
-{
- int known_parameters = 1;
-
- *reg0xc05 = 0x000;
-
- switch (p->u.ofdm.constellation) {
- case QPSK:
- break;
- case QAM_16:
- *reg0xc05 |= (1 << 10);
- break;
- case QAM_64:
- *reg0xc05 |= (2 << 10);
- break;
- case QAM_AUTO:
- known_parameters = 0;
- break;
- default:
- return -EINVAL;
- };
-
- switch (p->u.ofdm.hierarchy_information) {
- case HIERARCHY_NONE:
- break;
- case HIERARCHY_1:
- *reg0xc05 |= (1 << 7);
- break;
- case HIERARCHY_2:
- *reg0xc05 |= (2 << 7);
- break;
- case HIERARCHY_4:
- *reg0xc05 |= (3 << 7);
- break;
- case HIERARCHY_AUTO:
- known_parameters = 0;
- break;
- default:
- return -EINVAL;
- };
-
- switch (p->u.ofdm.code_rate_HP) {
- case FEC_1_2:
- break;
- case FEC_2_3:
- *reg0xc05 |= (1 << 3);
- break;
- case FEC_3_4:
- *reg0xc05 |= (2 << 3);
- break;
- case FEC_5_6:
- *reg0xc05 |= (3 << 3);
- break;
- case FEC_7_8:
- *reg0xc05 |= (4 << 3);
- break;
- case FEC_AUTO:
- known_parameters = 0;
- break;
- default:
- return -EINVAL;
- };
-
- if (known_parameters)
- *reg0xc05 |= (2 << 1); /* use specified parameters */
- else
- *reg0xc05 |= (1 << 1); /* enable autoprobing */
-
- return 0;
-}
-
-
-static int sp8870_set_frontend_parameters (struct dvb_i2c_bus *i2c,
- struct dvb_frontend_parameters *p)
- {
- int err;
- u16 reg0xc05;
-
- if ((err = configure_reg0xc05(p, ®0xc05)))
- return err;
-
- // system controller stop
- sp8870_microcontroller_stop(i2c);
-
- // set tuner parameters
- sp5659_set_tv_freq (i2c, p->frequency);
-
- // sample rate correction bit [23..17]
- sp8870_writereg(i2c,0x0319,0x000A);
-
- // sample rate correction bit [16..0]
- sp8870_writereg(i2c,0x031A,0x0AAB);
-
- // integer carrier offset
- sp8870_writereg(i2c,0x0309,0x0400);
-
- // fractional carrier offset
- sp8870_writereg(i2c,0x030A,0x0000);
-
- // filter for 6/7/8 Mhz channel
- if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ)
- sp8870_writereg(i2c,0x0311,0x0002);
- else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
- sp8870_writereg(i2c,0x0311,0x0001);
- else
- sp8870_writereg(i2c,0x0311,0x0000);
-
- // scan order: 2k first = 0x0000, 8k first = 0x0001
- if (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_2K)
- sp8870_writereg(i2c,0x0338,0x0000);
- else
- sp8870_writereg(i2c,0x0338,0x0001);
-
- sp8870_writereg(i2c, 0xc05, reg0xc05);
-
- // read status reg in order to clear pending irqs
- sp8870_readreg(i2c, 0x200);
-
- // system controller start
- sp8870_microcontroller_start(i2c);
-
- return 0;
- }
-
-
-// number of trials to recover from lockup
-#define MAXTRIALS 5
-// maximum checks for data valid signal
-#define MAXCHECKS 100
-
-// only for debugging: counter for detected lockups
-static int lockups = 0;
-// only for debugging: counter for channel switches
-static int switches = 0;
-
-static int sp8870_set_frontend (struct dvb_i2c_bus *i2c, struct dvb_frontend_parameters *p)
- {
- /*
- The firmware of the sp8870 sometimes locks up after setting frontend parameters.
- We try to detect this by checking the data valid signal.
- If it is not set after MAXCHECKS we try to recover the lockup by setting
- the frontend parameters again.
- */
-
- int err = 0;
- int valid = 0;
- int trials = 0;
- int check_count = 0;
-
- dprintk("%s: frequency = %i\n", __FUNCTION__, p->frequency);
-
- for (trials = 1; trials <= MAXTRIALS; trials++) {
-
- if ((err = sp8870_set_frontend_parameters(i2c, p)))
- return err;
-
- for (check_count = 0; check_count < MAXCHECKS; check_count++) {
-// valid = ((sp8870_readreg(i2c, 0x0200) & 4) == 0);
- valid = sp8870_read_data_valid_signal(i2c);
- if (valid) {
- dprintk("%s: delay = %i usec\n",
- __FUNCTION__, check_count * 10);
- break;
- }
- udelay(10);
- }
- if (valid)
- break;
- }
-
- if (!valid) {
- printk("%s: firmware crash!!!!!!\n", __FUNCTION__);
- return -EIO;
- }
-
- if (debug) {
- if (valid) {
- if (trials > 1) {
- printk("%s: firmware lockup!!!\n", __FUNCTION__);
- printk("%s: recovered after %i trial(s))\n", __FUNCTION__, trials - 1);
- lockups++;
- }
- }
- switches++;
- printk("%s: switches = %i lockups = %i\n", __FUNCTION__, switches, lockups);
- }
-
- return 0;
-}
-
-
-static int sp8870_sleep(struct dvb_i2c_bus *i2c)
-{
- // tristate TS output and disable interface pins
- return sp8870_writereg(i2c, 0xC18, 0x000);
-}
-
-
-static int sp8870_wake_up(struct dvb_i2c_bus *i2c)
-{
- // enable TS output and interface pins
- return sp8870_writereg(i2c, 0xC18, 0x00D);
-}
-
-
-static int tdlb7_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
-{
- struct dvb_i2c_bus *i2c = fe->i2c;
-
- switch (cmd) {
- case FE_GET_INFO:
- memcpy (arg, &tdlb7_info, sizeof(struct dvb_frontend_info));
- break;
-
- case FE_READ_STATUS:
- return sp8870_read_status(i2c, (fe_status_t *) arg);
-
- case FE_READ_BER:
- return sp8870_read_ber(i2c, (u32 *) arg);
-
- case FE_READ_SIGNAL_STRENGTH:
- return sp8870_read_signal_strength(i2c, (u16 *) arg);
-
- case FE_READ_SNR: // not supported by hardware?
- return sp8870_read_snr(i2c, (u32 *) arg);
-
- case FE_READ_UNCORRECTED_BLOCKS:
- return sp8870_read_uncorrected_blocks(i2c, (u32 *) arg);
-
- case FE_SET_FRONTEND:
- return sp8870_set_frontend(i2c, (struct dvb_frontend_parameters*) arg);
-
- case FE_GET_FRONTEND: // FIXME: read known values back from Hardware...
- return -EOPNOTSUPP;
-
- case FE_SLEEP:
- return sp8870_sleep(i2c);
-
- case FE_INIT:
- sp8870_wake_up(i2c);
- if (fe->data == NULL) { // first time initialisation...
- fe->data = (void*) ~0;
- sp8870_init (i2c);
- }
- break;
-
- case FE_GET_TUNE_SETTINGS:
- {
- struct dvb_frontend_tune_settings* fesettings = (struct dvb_frontend_tune_settings*) arg;
- fesettings->min_delay_ms = 150;
- fesettings->step_size = 166667;
- fesettings->max_drift = 166667*2;
- return 0;
- }
-
- default:
- return -EOPNOTSUPP;
- };
-
- return 0;
-}
-
-
-static int tdlb7_attach (struct dvb_i2c_bus *i2c, void **data)
-{
- u8 b0 [] = { 0x02 , 0x00 };
- u8 b1 [] = { 0, 0 };
- struct i2c_msg msg [] = { { .addr = 0x71, .flags = 0, .buf = b0, .len = 2 },
- { .addr = 0x71, .flags = I2C_M_RD, .buf = b1, .len = 2 } };
-
- dprintk ("%s\n", __FUNCTION__);
-
- if (i2c->xfer (i2c, msg, 2) != 2)
- return -ENODEV;
-
- sp8870_firmware_upload(i2c);
-
- return dvb_register_frontend (tdlb7_ioctl, i2c, NULL, &tdlb7_info);
-}
-
-
-static void tdlb7_detach (struct dvb_i2c_bus *i2c, void *data)
-{
- dprintk ("%s\n", __FUNCTION__);
-
- dvb_unregister_frontend (tdlb7_ioctl, i2c);
-}
-
-
-static int __init init_tdlb7 (void)
-{
- dprintk ("%s\n", __FUNCTION__);
-
- return dvb_register_i2c_device (THIS_MODULE, tdlb7_attach, tdlb7_detach);
-}
-
-
-static void __exit exit_tdlb7 (void)
-{
- dprintk ("%s\n", __FUNCTION__);
-
- dvb_unregister_i2c_device (tdlb7_attach);
-}
-
-
-module_init(init_tdlb7);
-module_exit(exit_tdlb7);
-
-
-MODULE_PARM(debug,"i");
-MODULE_PARM_DESC(debug, "enable verbose debug messages");
-
-MODULE_PARM(firmware_file,"s");
-MODULE_PARM_DESC(firmware_file, "where to find the firmware file");
-
-MODULE_DESCRIPTION("TDLB7 DVB-T Frontend");
-MODULE_AUTHOR("Juergen Peitz");
-MODULE_LICENSE("GPL");
-
-
+++ /dev/null
-/*
- Alps TDMB7 DVB OFDM frontend driver
-
- Copyright (C) 2001-2002 Convergence Integrated Media GmbH
- Holger Waechtler <holger@convergence.de>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/slab.h>
-
-#include "dvb_frontend.h"
-#include "dvb_functions.h"
-
-
-static int debug = 0;
-#define dprintk if (debug) printk
-
-
-static struct dvb_frontend_info tdmb7_info = {
- .name = "Alps TDMB7",
- .type = FE_OFDM,
- .frequency_min = 470000000,
- .frequency_max = 860000000,
- .frequency_stepsize = 166667,
-#if 0
- .frequency_tolerance = ???,
- .symbol_rate_min = ???,
- .symbol_rate_max = ???,
- .symbol_rate_tolerance = 500, /* ppm */
- .notifier_delay = 0,
-#endif
- .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
- FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
- FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
- FE_CAN_RECOVER
-};
-
-
-static u8 init_tab [] = {
- 0x04, 0x10,
- 0x05, 0x09,
- 0x06, 0x00,
- 0x08, 0x04,
- 0x09, 0x00,
- 0x0a, 0x01,
- 0x15, 0x40,
- 0x16, 0x10,
- 0x17, 0x87,
- 0x18, 0x17,
- 0x1a, 0x10,
- 0x25, 0x04,
- 0x2e, 0x00,
- 0x39, 0x00,
- 0x3a, 0x04,
- 0x45, 0x08,
- 0x46, 0x02,
- 0x47, 0x05,
-};
-
-
-static int cx22700_writereg (struct dvb_i2c_bus *i2c, u8 reg, u8 data)
-{
- int ret;
- u8 buf [] = { reg, data };
- struct i2c_msg msg = { .addr = 0x43, .flags = 0, .buf = buf, .len = 2 };
-
- dprintk ("%s\n", __FUNCTION__);
-
- ret = i2c->xfer (i2c, &msg, 1);
-
- if (ret != 1)
- printk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
- __FUNCTION__, reg, data, ret);
-
- return (ret != 1) ? -1 : 0;
-}
-
-
-static u8 cx22700_readreg (struct dvb_i2c_bus *i2c, u8 reg)
-{
- int ret;
- u8 b0 [] = { reg };
- u8 b1 [] = { 0 };
- struct i2c_msg msg [] = { { .addr = 0x43, .flags = 0, .buf = b0, .len = 1 },
- { .addr = 0x43, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
-
- dprintk ("%s\n", __FUNCTION__);
-
- ret = i2c->xfer (i2c, msg, 2);
-
- if (ret != 2)
- printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
-
- return b1[0];
-}
-
-
-static int pll_write (struct dvb_i2c_bus *i2c, u8 data [4])
-{
- struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = 4 };
- int ret;
-
- cx22700_writereg (i2c, 0x0a, 0x00); /* open i2c bus switch */
- ret = i2c->xfer (i2c, &msg, 1);
- cx22700_writereg (i2c, 0x0a, 0x01); /* close i2c bus switch */
-
- if (ret != 1)
- printk("%s: i/o error (addr == 0x%02x, ret == %i)\n", __FUNCTION__, msg.addr, ret);
-
- return (ret != 1) ? -1 : 0;
-}
-
-
-/**
- * set up the downconverter frequency divisor for a
- * reference clock comparision frequency of 125 kHz.
- */
-static int pll_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq)
-{
- u32 div = (freq + 36166667) / 166667;
-#if 1 //ALPS_SETTINGS
- u8 buf [4] = { (div >> 8) & 0x7f, div & 0xff, ((div >> 10) & 0x60) | 0x85,
- freq < 592000000 ? 0x40 : 0x80 };
-#else
- u8 buf [4] = { (div >> 8) & 0x7f, div & 0xff, ((div >> 10) & 0x60) | 0x85,
- freq < 470000000 ? 0x42 : freq < 862000000 ? 0x41 : 0x81 };
-#endif
-
- dprintk ("%s: freq == %i, div == %i\n", __FUNCTION__, (int) freq, (int) div);
-
- return pll_write (i2c, buf);
-}
-
-
-static int cx22700_init (struct dvb_i2c_bus *i2c)
-{
- int i;
-
- dprintk("cx22700_init: init chip\n");
-
- cx22700_writereg (i2c, 0x00, 0x02); /* soft reset */
- cx22700_writereg (i2c, 0x00, 0x00);
-
- dvb_delay(10);
-
- for (i=0; i<sizeof(init_tab); i+=2)
- cx22700_writereg (i2c, init_tab[i], init_tab[i+1]);
-
- cx22700_writereg (i2c, 0x00, 0x01);
-
- return 0;
-}
-
-
-static int cx22700_set_inversion (struct dvb_i2c_bus *i2c, int inversion)
-{
- u8 val;
-
- dprintk ("%s\n", __FUNCTION__);
-
- switch (inversion) {
- case INVERSION_AUTO:
- return -EOPNOTSUPP;
- case INVERSION_ON:
- val = cx22700_readreg (i2c, 0x09);
- return cx22700_writereg (i2c, 0x09, val | 0x01);
- case INVERSION_OFF:
- val = cx22700_readreg (i2c, 0x09);
- return cx22700_writereg (i2c, 0x09, val & 0xfe);
- default:
- return -EINVAL;
- }
-}
-
-
-static int cx22700_set_tps (struct dvb_i2c_bus *i2c, struct dvb_ofdm_parameters *p)
-{
- static const u8 qam_tab [4] = { 0, 1, 0, 2 };
- static const u8 fec_tab [6] = { 0, 1, 2, 0, 3, 4 };
- u8 val;
-
- dprintk ("%s\n", __FUNCTION__);
-
- if (p->code_rate_HP < FEC_1_2 || p->code_rate_HP > FEC_7_8)
- return -EINVAL;
-
- if (p->code_rate_LP < FEC_1_2 || p->code_rate_LP > FEC_7_8)
-
- if (p->code_rate_HP == FEC_4_5 || p->code_rate_LP == FEC_4_5)
- return -EINVAL;
-
- if (p->guard_interval < GUARD_INTERVAL_1_32 ||
- p->guard_interval > GUARD_INTERVAL_1_4)
- return -EINVAL;
-
- if (p->transmission_mode != TRANSMISSION_MODE_2K &&
- p->transmission_mode != TRANSMISSION_MODE_8K)
- return -EINVAL;
-
- if (p->constellation != QPSK &&
- p->constellation != QAM_16 &&
- p->constellation != QAM_64)
- return -EINVAL;
-
- if (p->hierarchy_information < HIERARCHY_NONE ||
- p->hierarchy_information > HIERARCHY_4)
- return -EINVAL;
-
- if (p->bandwidth < BANDWIDTH_8_MHZ && p->bandwidth > BANDWIDTH_6_MHZ)
- return -EINVAL;
-
- if (p->bandwidth == BANDWIDTH_7_MHZ)
- cx22700_writereg (i2c, 0x09, cx22700_readreg (i2c, 0x09 | 0x10));
- else
- cx22700_writereg (i2c, 0x09, cx22700_readreg (i2c, 0x09 & ~0x10));
-
- val = qam_tab[p->constellation - QPSK];
- val |= p->hierarchy_information - HIERARCHY_NONE;
-
- cx22700_writereg (i2c, 0x04, val);
-
- val = fec_tab[p->code_rate_HP - FEC_1_2] << 3;
- val |= fec_tab[p->code_rate_LP - FEC_1_2];
-
- cx22700_writereg (i2c, 0x05, val);
-
- val = (p->guard_interval - GUARD_INTERVAL_1_32) << 2;
- val |= p->transmission_mode - TRANSMISSION_MODE_2K;
-
- cx22700_writereg (i2c, 0x06, val);
-
- cx22700_writereg (i2c, 0x08, 0x04 | 0x02); /* use user tps parameters */
- cx22700_writereg (i2c, 0x08, 0x04); /* restart aquisition */
-
- return 0;
-}
-
-
-static int cx22700_get_tps (struct dvb_i2c_bus *i2c, struct dvb_ofdm_parameters *p)
-{
- static const fe_modulation_t qam_tab [3] = { QPSK, QAM_16, QAM_64 };
- static const fe_code_rate_t fec_tab [5] = { FEC_1_2, FEC_2_3, FEC_3_4,
- FEC_5_6, FEC_7_8 };
- u8 val;
-
- dprintk ("%s\n", __FUNCTION__);
-
- if (!(cx22700_readreg(i2c, 0x07) & 0x20)) /* tps valid? */
- return -EAGAIN;
-
- val = cx22700_readreg (i2c, 0x01);
-
- if ((val & 0x7) > 4)
- p->hierarchy_information = HIERARCHY_AUTO;
- else
- p->hierarchy_information = HIERARCHY_NONE + (val & 0x7);
-
- if (((val >> 3) & 0x3) > 2)
- p->constellation = QAM_AUTO;
- else
- p->constellation = qam_tab[(val >> 3) & 0x3];
-
-
- val = cx22700_readreg (i2c, 0x02);
-
- if (((val >> 3) & 0x07) > 4)
- p->code_rate_HP = FEC_AUTO;
- else
- p->code_rate_HP = fec_tab[(val >> 3) & 0x07];
-
- if ((val & 0x07) > 4)
- p->code_rate_LP = FEC_AUTO;
- else
- p->code_rate_LP = fec_tab[val & 0x07];
-
-
- val = cx22700_readreg (i2c, 0x03);
-
- p->guard_interval = GUARD_INTERVAL_1_32 + ((val >> 6) & 0x3);
- p->transmission_mode = TRANSMISSION_MODE_2K + ((val >> 5) & 0x1);
-
- return 0;
-}
-
-
-static int tdmb7_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
-{
- struct dvb_i2c_bus *i2c = fe->i2c;
-
- dprintk ("%s\n", __FUNCTION__);
-
- switch (cmd) {
- case FE_GET_INFO:
- memcpy (arg, &tdmb7_info, sizeof(struct dvb_frontend_info));
- break;
-
- case FE_READ_STATUS:
- {
- fe_status_t *status = (fe_status_t *) arg;
- u16 rs_ber = (cx22700_readreg (i2c, 0x0d) << 9)
- | (cx22700_readreg (i2c, 0x0e) << 1);
- u8 sync = cx22700_readreg (i2c, 0x07);
-
- *status = 0;
-
- if (rs_ber < 0xff00)
- *status |= FE_HAS_SIGNAL;
-
- if (sync & 0x20)
- *status |= FE_HAS_CARRIER;
-
- if (sync & 0x10)
- *status |= FE_HAS_VITERBI;
-
- if (sync & 0x10)
- *status |= FE_HAS_SYNC;
-
- if (*status == 0x0f)
- *status |= FE_HAS_LOCK;
-
- break;
- }
-
- case FE_READ_BER:
- *((u32*) arg) = cx22700_readreg (i2c, 0x0c) & 0x7f;
- cx22700_writereg (i2c, 0x0c, 0x00);
- break;
-
- case FE_READ_SIGNAL_STRENGTH:
- {
- u16 rs_ber = (cx22700_readreg (i2c, 0x0d) << 9)
- | (cx22700_readreg (i2c, 0x0e) << 1);
- *((u16*) arg) = ~rs_ber;
- break;
- }
- case FE_READ_SNR:
- {
- u16 rs_ber = (cx22700_readreg (i2c, 0x0d) << 9)
- | (cx22700_readreg (i2c, 0x0e) << 1);
- *((u16*) arg) = ~rs_ber;
- break;
- }
- case FE_READ_UNCORRECTED_BLOCKS:
- *((u32*) arg) = cx22700_readreg (i2c, 0x0f);
- cx22700_writereg (i2c, 0x0f, 0x00);
- break;
-
- case FE_SET_FRONTEND:
- {
- struct dvb_frontend_parameters *p = arg;
-
- cx22700_writereg (i2c, 0x00, 0x02); /* XXX CHECKME: soft reset*/
- cx22700_writereg (i2c, 0x00, 0x00);
-
- pll_set_tv_freq (i2c, p->frequency);
- cx22700_set_inversion (i2c, p->inversion);
- cx22700_set_tps (i2c, &p->u.ofdm);
- cx22700_writereg (i2c, 0x37, 0x01); /* PAL loop filter off */
- cx22700_writereg (i2c, 0x00, 0x01); /* restart acquire */
- break;
- }
-
- case FE_GET_FRONTEND:
- {
- struct dvb_frontend_parameters *p = arg;
- u8 reg09 = cx22700_readreg (i2c, 0x09);
-
- p->inversion = reg09 & 0x1 ? INVERSION_ON : INVERSION_OFF;
- return cx22700_get_tps (i2c, &p->u.ofdm);
- }
-
- case FE_INIT:
- return cx22700_init (i2c);
-
- case FE_GET_TUNE_SETTINGS:
- {
- struct dvb_frontend_tune_settings* fesettings = (struct dvb_frontend_tune_settings*) arg;
- fesettings->min_delay_ms = 150;
- fesettings->step_size = 166667;
- fesettings->max_drift = 166667*2;
- return 0;
- }
-
- default:
- return -EOPNOTSUPP;
- };
-
- return 0;
-}
-
-
-
-static int tdmb7_attach (struct dvb_i2c_bus *i2c, void **data)
-{
- u8 b0 [] = { 0x7 };
- u8 b1 [] = { 0 };
- struct i2c_msg msg [] = { { .addr = 0x43, .flags = 0, .buf = b0, .len = 1 },
- { .addr = 0x43, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
-
- dprintk ("%s\n", __FUNCTION__);
-
- if (i2c->xfer (i2c, msg, 2) != 2)
- return -ENODEV;
-
- return dvb_register_frontend (tdmb7_ioctl, i2c, NULL, &tdmb7_info);
-}
-
-
-static void tdmb7_detach (struct dvb_i2c_bus *i2c, void *data)
-{
- dprintk ("%s\n", __FUNCTION__);
-
- dvb_unregister_frontend (tdmb7_ioctl, i2c);
-}
-
-
-static int __init init_tdmb7 (void)
-{
- dprintk ("%s\n", __FUNCTION__);
-
- return dvb_register_i2c_device (THIS_MODULE, tdmb7_attach, tdmb7_detach);
-}
-
-
-static void __exit exit_tdmb7 (void)
-{
- dprintk ("%s\n", __FUNCTION__);
-
- dvb_unregister_i2c_device (tdmb7_attach);
-}
-
-module_init (init_tdmb7);
-module_exit (exit_tdmb7);
-
-MODULE_PARM(debug,"i");
-MODULE_PARM_DESC(debug, "enable verbose debug messages");
-MODULE_DESCRIPTION("TDMB7 DVB Frontend driver");
-MODULE_AUTHOR("Holger Waechtler");
-MODULE_LICENSE("GPL");
-
+++ /dev/null
-/*
- * dst-bt878.h: part of the DST driver for the TwinHan DST Frontend
- *
- * Copyright (C) 2003 Jamie Honan
- */
-
-struct dst_gpio_enable {
- u32 mask;
- u32 enable;
-};
-
-struct dst_gpio_output {
- u32 mask;
- u32 highvals;
-};
-
-struct dst_gpio_read {
- unsigned long value;
-};
-
-union dst_gpio_packet {
- struct dst_gpio_enable enb;
- struct dst_gpio_output outp;
- struct dst_gpio_read rd;
- int psize;
-};
-
-#define DST_IG_ENABLE 0
-#define DST_IG_WRITE 1
-#define DST_IG_READ 2
-#define DST_IG_TS 3
-
-struct bt878 ;
-
-int
-bt878_device_control(struct bt878 *bt, unsigned int cmd, union dst_gpio_packet *mp);
-
-struct bt878 *bt878_find_by_dvb_adap(struct dvb_adapter *adap);
+++ /dev/null
-/*
- Frontend-driver for TwinHan DST Frontend
-
- Copyright (C) 2003 Jamie Honan
-
-
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
-*/
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/string.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/delay.h>
-#include <asm/div64.h>
-
-#include "dvb_frontend.h"
-#include "dvb_functions.h"
-#include "dst-bt878.h"
-
-unsigned int dst_debug = 0;
-unsigned int dst_verbose = 0;
-
-MODULE_PARM(dst_verbose, "i");
-MODULE_PARM_DESC(dst_verbose,
- "verbose startup messages, default is 1 (yes)");
-MODULE_PARM(dst_debug, "i");
-MODULE_PARM_DESC(dst_debug, "debug messages, default is 0 (no)");
-
-#define DST_MAX_CARDS 6
-unsigned int dst_cur_no = 0;
-
-unsigned int dst_type[DST_MAX_CARDS] = { [0 ... (DST_MAX_CARDS-1)] = (-1U)};
-unsigned int dst_type_flags[DST_MAX_CARDS] = { [0 ... (DST_MAX_CARDS-1)] = (-1U)};
-MODULE_PARM(dst_type, "1-" __stringify(DST_MAX_CARDS) "i");
-MODULE_PARM_DESC(dst_type,
- "Type of DST card, 0 Satellite, 1 terrestial TV, 2 Cable, default driver determined");
-MODULE_PARM(dst_type_flags, "1-" __stringify(DST_MAX_CARDS) "i");
-MODULE_PARM_DESC(dst_type_flags,
- "Type flags of DST card, bitfield 1=10 byte tuner, 2=TS is 204, 4=symdiv");
-
-#define dprintk if (dst_debug) printk
-
-#define DST_TYPE_IS_SAT 0
-#define DST_TYPE_IS_TERR 1
-#define DST_TYPE_IS_CABLE 2
-
-#define DST_TYPE_HAS_NEWTUNE 1
-#define DST_TYPE_HAS_TS204 2
-#define DST_TYPE_HAS_SYMDIV 4
-
-#define HAS_LOCK 1
-#define ATTEMPT_TUNE 2
-#define HAS_POWER 4
-
-struct dst_data {
- u8 tx_tuna[10];
- u8 rx_tuna[10];
- u8 rxbuffer[10];
- u8 diseq_flags;
- u8 dst_type;
- u32 type_flags;
- u32 frequency; /* intermediate frequency in kHz for QPSK */
- fe_spectral_inversion_t inversion;
- u32 symbol_rate; /* symbol rate in Symbols per second */
- fe_code_rate_t fec;
- fe_sec_voltage_t voltage;
- fe_sec_tone_mode_t tone;
- u32 decode_freq;
- u8 decode_lock;
- u16 decode_strength;
- u16 decode_snr;
- unsigned long cur_jiff;
- u8 k22;
- fe_bandwidth_t bandwidth;
- struct bt878 *bt;
- struct dvb_i2c_bus *i2c;
-} ;
-
-static struct dvb_frontend_info dst_info_sat = {
- .name = "DST SAT",
- .type = FE_QPSK,
- .frequency_min = 950000,
- .frequency_max = 2150000,
- .frequency_stepsize = 1000, /* kHz for QPSK frontends */
- .frequency_tolerance = 29500,
- .symbol_rate_min = 1000000,
- .symbol_rate_max = 45000000,
-/* . symbol_rate_tolerance = ???,*/
- .notifier_delay = 50, /* 1/20 s */
- .caps = FE_CAN_FEC_AUTO |
- FE_CAN_QPSK
-};
-
-static struct dvb_frontend_info dst_info_cable = {
- .name = "DST CABLE",
- .type = FE_QAM,
- .frequency_stepsize = 62500,
- .frequency_min = 51000000,
- .frequency_max = 858000000,
- .symbol_rate_min = 1000000,
- .symbol_rate_max = 45000000,
-/* . symbol_rate_tolerance = ???,*/
- .notifier_delay = 50, /* 1/20 s */
- .caps = FE_CAN_FEC_AUTO |
- FE_CAN_QAM_AUTO
-};
-
-static struct dvb_frontend_info dst_info_tv = {
- .name = "DST TERR",
- .type = FE_OFDM,
- .frequency_min = 137000000,
- .frequency_max = 858000000,
- .frequency_stepsize = 166667,
- .caps = FE_CAN_FEC_AUTO |
- FE_CAN_QAM_AUTO |
- FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO
-};
-
-static void dst_packsize(struct dst_data *dst, int psize)
-{
- union dst_gpio_packet bits;
-
- bits.psize = psize;
- bt878_device_control(dst->bt, DST_IG_TS, &bits);
-}
-
-static int dst_gpio_outb(struct dst_data *dst, u32 mask, u32 enbb, u32 outhigh)
-{
- union dst_gpio_packet enb;
- union dst_gpio_packet bits;
- int err;
-
- enb.enb.mask = mask;
- enb.enb.enable = enbb;
- if ((err = bt878_device_control(dst->bt, DST_IG_ENABLE, &enb)) < 0) {
- dprintk ("%s: dst_gpio_enb error (err == %i, mask == 0x%02x, enb == 0x%02x)\n", __FUNCTION__, err, mask, enbb);
- return -EREMOTEIO;
- }
-
- /* because complete disabling means no output, no need to do
- * output packet */
- if (enbb == 0)
- return 0;
-
- bits.outp.mask = enbb;
- bits.outp.highvals = outhigh;
-
- if ((err = bt878_device_control(dst->bt, DST_IG_WRITE, &bits)) < 0) {
- dprintk ("%s: dst_gpio_outb error (err == %i, enbb == 0x%02x, outhigh == 0x%02x)\n", __FUNCTION__, err, enbb, outhigh);
- return -EREMOTEIO;
- }
- return 0;
-}
-
-static int dst_gpio_inb(struct dst_data *dst, u8 *result)
-{
- union dst_gpio_packet rd_packet;
- int err;
-
- *result = 0;
-
- if ((err = bt878_device_control(dst->bt, DST_IG_READ, &rd_packet)) < 0) {
- dprintk ("%s: dst_gpio_inb error (err == %i)\n", __FUNCTION__, err);
- return -EREMOTEIO;
- }
- *result = (u8)rd_packet.rd.value;
- return 0;
-}
-
-#define DST_I2C_ENABLE 1
-#define DST_8820 2
-
-static int
-dst_reset8820(struct dst_data *dst)
-{
-int retval;
- /* pull 8820 gpio pin low, wait, high, wait, then low */
- // dprintk ("%s: reset 8820\n", __FUNCTION__);
- retval = dst_gpio_outb(dst, DST_8820, DST_8820, 0);
- if (retval < 0)
- return retval;
- dvb_delay(10);
- retval = dst_gpio_outb(dst, DST_8820, DST_8820, DST_8820);
- if (retval < 0)
- return retval;
- /* wait for more feedback on what works here *
- dvb_delay(10);
- retval = dst_gpio_outb(dst, DST_8820, DST_8820, 0);
- if (retval < 0)
- return retval;
- */
- return 0;
-}
-
-static int
-dst_i2c_enable(struct dst_data *dst)
-{
-int retval;
- /* pull I2C enable gpio pin low, wait */
- // dprintk ("%s: i2c enable\n", __FUNCTION__);
- retval = dst_gpio_outb(dst, ~0, DST_I2C_ENABLE, 0);
- if (retval < 0)
- return retval;
- // dprintk ("%s: i2c enable delay\n", __FUNCTION__);
- dvb_delay(33);
- return 0;
-}
-
-static int
-dst_i2c_disable(struct dst_data *dst)
-{
-int retval;
- /* release I2C enable gpio pin, wait */
- // dprintk ("%s: i2c disable\n", __FUNCTION__);
- retval = dst_gpio_outb(dst, ~0, 0, 0);
- if (retval < 0)
- return retval;
- // dprintk ("%s: i2c disable delay\n", __FUNCTION__);
- dvb_delay(33);
- return 0;
-}
-
-static int
-dst_wait_dst_ready(struct dst_data *dst)
-{
-u8 reply;
-int retval;
-int i;
- for (i = 0; i < 200; i++) {
- retval = dst_gpio_inb(dst, &reply);
- if (retval < 0)
- return retval;
- if ((reply & DST_I2C_ENABLE) == 0) {
- dprintk ("%s: dst wait ready after %d\n", __FUNCTION__, i);
- return 1;
- }
- dvb_delay(5);
- }
- dprintk ("%s: dst wait NOT ready after %d\n", __FUNCTION__, i);
- return 0;
-}
-
-#define DST_I2C_ADDR 0x55
-
-static int write_dst (struct dst_data *dst, u8 *data, u8 len)
-{
- struct i2c_msg msg = {
- .addr = DST_I2C_ADDR, .flags = 0, .buf = data, .len = len };
- int err;
- int cnt;
-
- if (dst_debug && dst_verbose) {
- u8 i;
- dprintk("%s writing",__FUNCTION__);
- for (i = 0 ; i < len ; i++) {
- dprintk(" 0x%02x", data[i]);
- }
- dprintk("\n");
- }
- dvb_delay(30);
- for (cnt = 0; cnt < 4; cnt++) {
- if ((err = dst->i2c->xfer (dst->i2c, &msg, 1)) < 0) {
- dprintk ("%s: write_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)\n", __FUNCTION__, err, len, data[0]);
- dst_i2c_disable(dst);
- dvb_delay(500);
- dst_i2c_enable(dst);
- dvb_delay(500);
- continue;
- } else
- break;
- }
- if (cnt >= 4)
- return -EREMOTEIO;
- return 0;
-}
-
-static int read_dst (struct dst_data *dst, u8 *ret, u8 len)
-{
- struct i2c_msg msg =
- { .addr = DST_I2C_ADDR, .flags = I2C_M_RD, .buf = ret, .len = len };
- int err;
- int cnt;
-
- for (cnt = 0; cnt < 4; cnt++) {
- if ((err = dst->i2c->xfer (dst->i2c, &msg, 1)) < 0) {
- dprintk ("%s: read_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)\n", __FUNCTION__, err, len, ret[0]);
- dst_i2c_disable(dst);
- dst_i2c_enable(dst);
- continue;
- } else
- break;
- }
- if (cnt >= 4)
- return -EREMOTEIO;
- dprintk("%s reply is 0x%x\n", __FUNCTION__, ret[0]);
- if (dst_debug && dst_verbose) {
- for (err = 1; err < len; err++)
- dprintk(" 0x%x", ret[err]);
- if (err > 1)
- dprintk("\n");
- }
- return 0;
-}
-
-static int dst_set_freq(struct dst_data *dst, u32 freq)
-{
- u8 *val;
-
- dst->frequency = freq;
-
- // dprintk("%s: set frequency %u\n", __FUNCTION__, freq);
- if (dst->dst_type == DST_TYPE_IS_SAT) {
- freq = freq / 1000;
- if (freq < 950 || freq > 2150)
- return -EINVAL;
- val = &dst->tx_tuna[0];
- val[2] = (freq >> 8) & 0x7f;
- val[3] = (u8)freq;
- val[4] = 1;
- val[8] &= ~4;
- if (freq < 1531)
- val[8] |= 4;
- } else if (dst->dst_type == DST_TYPE_IS_TERR) {
- freq = freq / 1000;
- if (freq < 137000 || freq > 858000)
- return -EINVAL;
- val = &dst->tx_tuna[0];
- val[2] = (freq >> 16) & 0xff;
- val[3] = (freq >> 8) & 0xff;
- val[4] = (u8)freq;
- val[5] = 0;
- switch (dst->bandwidth) {
- case BANDWIDTH_6_MHZ:
- val[6] = 6;
- break;
-
- case BANDWIDTH_7_MHZ:
- case BANDWIDTH_AUTO:
- val[6] = 7;
- break;
-
- case BANDWIDTH_8_MHZ:
- val[6] = 8;
- break;
- }
-
- val[7] = 0;
- val[8] = 0;
- } else if (dst->dst_type == DST_TYPE_IS_CABLE) {
- /* guess till will get one */
- freq = freq / 1000;
- val = &dst->tx_tuna[0];
- val[2] = (freq >> 16) & 0xff;
- val[3] = (freq >> 8) & 0xff;
- val[4] = (u8)freq;
- } else
- return -EINVAL;
- return 0;
-}
-
-static int dst_set_bandwidth(struct dst_data *dst, fe_bandwidth_t bandwidth)
-{
- u8 *val;
-
- dst->bandwidth = bandwidth;
-
- if (dst->dst_type != DST_TYPE_IS_TERR)
- return 0;
-
- val = &dst->tx_tuna[0];
- switch (bandwidth) {
- case BANDWIDTH_6_MHZ:
- val[6] = 6;
- break;
-
- case BANDWIDTH_7_MHZ:
- val[6] = 7;
- break;
-
- case BANDWIDTH_8_MHZ:
- val[6] = 8;
- break;
-
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-static int dst_set_inversion (struct dst_data *dst, fe_spectral_inversion_t inversion)
-{
- u8 *val;
-
- dst->inversion = inversion;
-
- val = &dst->tx_tuna[0];
-
- val[8] &= ~0x80;
-
- switch (inversion) {
- case INVERSION_OFF:
- break;
- case INVERSION_ON:
- val[8] |= 0x80;
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-
-static int dst_set_fec (struct dst_data *dst, fe_code_rate_t fec)
-{
- dst->fec = fec;
- return 0;
-}
-
-static fe_code_rate_t dst_get_fec (struct dst_data *dst)
-{
- return dst->fec;
-}
-
-static int dst_set_symbolrate (struct dst_data *dst, u32 srate)
-{
- u8 *val;
- u32 symcalc;
- u64 sval;
-
- dst->symbol_rate = srate;
-
- if (dst->dst_type == DST_TYPE_IS_TERR) {
- return 0;
- }
-
- // dprintk("%s: set srate %u\n", __FUNCTION__, srate);
- srate /= 1000;
- val = &dst->tx_tuna[0];
-
- if (dst->type_flags & DST_TYPE_HAS_SYMDIV) {
- sval = srate;
- sval <<= 20;
- do_div(sval, 88000);
- symcalc = (u32)sval;
- // dprintk("%s: set symcalc %u\n", __FUNCTION__, symcalc);
- val[5] = (u8)(symcalc >> 12);
- val[6] = (u8)(symcalc >> 4);
- val[7] = (u8)(symcalc << 4);
- } else {
- val[5] = (u8)(srate >> 16) & 0x7f;
- val[6] = (u8)(srate >> 8);
- val[7] = (u8)srate;
- }
- val[8] &= ~0x20;
- if (srate > 8000)
- val[8] |= 0x20;
- return 0;
-}
-
-
-static u8 dst_check_sum(u8 *buf, u32 len)
-{
- u32 i;
- u8 val = 0;
- if (!len)
- return 0;
- for (i = 0; i < len; i++) {
- val += buf[i];
- }
- return ((~val) + 1);
-}
-
-typedef struct dst_types {
- char *mstr;
- int offs;
- u8 dst_type;
- u32 type_flags;
-} DST_TYPES;
-
-struct dst_types dst_tlist[] = {
- { "DST-020", 0, DST_TYPE_IS_SAT, DST_TYPE_HAS_SYMDIV },
- { "DST-030", 0, DST_TYPE_IS_SAT, DST_TYPE_HAS_TS204|DST_TYPE_HAS_NEWTUNE },
- { "DST-03T", 0, DST_TYPE_IS_SAT, DST_TYPE_HAS_SYMDIV|DST_TYPE_HAS_TS204},
- { "DST-MOT", 0, DST_TYPE_IS_SAT, DST_TYPE_HAS_SYMDIV },
- { "DST-CI", 1, DST_TYPE_IS_SAT, DST_TYPE_HAS_TS204|DST_TYPE_HAS_NEWTUNE },
- { "DSTMCI", 1, DST_TYPE_IS_SAT, DST_TYPE_HAS_NEWTUNE },
- { "DSTFCI", 1, DST_TYPE_IS_SAT, DST_TYPE_HAS_NEWTUNE },
- { "DCTNEW", 1, DST_TYPE_IS_CABLE, DST_TYPE_HAS_NEWTUNE },
- { "DCT_CI", 1, DST_TYPE_IS_CABLE, DST_TYPE_HAS_NEWTUNE|DST_TYPE_HAS_TS204 },
- { "DTTDIG" , 1, DST_TYPE_IS_TERR, 0} };
-/* DCTNEW and DCT-CI are guesses */
-
-static void dst_type_flags_print(u32 type_flags)
-{
- printk("DST type flags :");
- if (type_flags & DST_TYPE_HAS_NEWTUNE)
- printk(" 0x%x newtuner", DST_TYPE_HAS_NEWTUNE);
- if (type_flags & DST_TYPE_HAS_TS204)
- printk(" 0x%x ts204", DST_TYPE_HAS_TS204);
- if (type_flags & DST_TYPE_HAS_SYMDIV)
- printk(" 0x%x symdiv", DST_TYPE_HAS_SYMDIV);
- printk("\n");
-}
-
-static int dst_type_print(u8 type)
-{
- char *otype;
- switch (type) {
- case DST_TYPE_IS_SAT:
- otype = "satellite";
- break;
- case DST_TYPE_IS_TERR:
- otype = "terrestial TV";
- break;
- case DST_TYPE_IS_CABLE:
- otype = "terrestial TV";
- break;
- default:
- printk("%s: invalid dst type %d\n",
- __FUNCTION__, type);
- return -EINVAL;
- }
- printk("DST type : %s\n", otype);
- return 0;
-}
-
-static int dst_check_ci (struct dst_data *dst)
-{
- u8 txbuf[8];
- u8 rxbuf[8];
- int retval;
- int i;
- struct dst_types *dsp;
- u8 use_dst_type;
- u32 use_type_flags;
-
- memset(txbuf, 0, sizeof(txbuf));
- txbuf[1] = 6;
- txbuf[7] = dst_check_sum (txbuf, 7);
-
- dst_i2c_enable(dst);
- dst_reset8820(dst);
- retval = write_dst (dst, txbuf, 8);
- if (retval < 0) {
- dst_i2c_disable(dst);
- dprintk("%s: write not successful, maybe no card?\n", __FUNCTION__);
- return retval;
- }
- dvb_delay(3);
- retval = read_dst (dst, rxbuf, 1);
- dst_i2c_disable(dst);
- if (retval < 0) {
- dprintk("%s: read not successful, maybe no card?\n", __FUNCTION__);
- return retval;
- }
- if (rxbuf[0] != 0xff) {
- dprintk("%s: write reply not 0xff, not ci (%02x)\n", __FUNCTION__, rxbuf[0]);
- return retval;
- }
- if (!dst_wait_dst_ready(dst))
- return 0;
- // dst_i2c_enable(i2c); Dimitri
- retval = read_dst (dst, rxbuf, 8);
- dst_i2c_disable(dst);
- if (retval < 0) {
- dprintk("%s: read not successful\n", __FUNCTION__);
- return retval;
- }
- if (rxbuf[7] != dst_check_sum (rxbuf, 7)) {
- dprintk("%s: checksum failure\n", __FUNCTION__);
- return retval;
- }
- rxbuf[7] = '\0';
- for (i = 0, dsp = &dst_tlist[0]; i < sizeof(dst_tlist) / sizeof(dst_tlist[0]); i++, dsp++) {
- if (!strncmp(&rxbuf[dsp->offs],
- dsp->mstr,
- strlen(dsp->mstr))) {
- use_type_flags = dsp->type_flags;
- use_dst_type = dsp->dst_type;
- printk("%s: recognize %s\n", __FUNCTION__, dsp->mstr);
- break;
- }
- }
- if (i >= sizeof(dst_tlist) / sizeof(dst_tlist[0])) {
- printk("%s: unable to recognize %s or %s\n", __FUNCTION__, &rxbuf[0], &rxbuf[1]);
- printk("%s please email linux-dvb@linuxtv.org with this type in\n", __FUNCTION__);
- use_dst_type = DST_TYPE_IS_SAT;
- use_type_flags = DST_TYPE_HAS_SYMDIV;
- }
- switch (dst_type[dst_cur_no]) {
- case (-1U):
- /* not used */
- break;
- case DST_TYPE_IS_SAT:
- case DST_TYPE_IS_TERR:
- case DST_TYPE_IS_CABLE:
- use_dst_type = (u8)(dst_type[dst_cur_no]);
- break;
- default:
- printk("%s: invalid user override dst type %d, not used\n",
- __FUNCTION__, dst_type[dst_cur_no]);
- break;
- }
- dst_type_print(use_dst_type);
- if (dst_type_flags[dst_cur_no] != (-1U)) {
- printk("%s: user override dst type flags 0x%x\n",
- __FUNCTION__, dst_type_flags[dst_cur_no]);
- use_type_flags = dst_type_flags[dst_cur_no];
- }
- dst->type_flags = use_type_flags;
- dst->dst_type= use_dst_type;
- dst_type_flags_print(dst->type_flags);
-
- if (dst->type_flags & DST_TYPE_HAS_TS204) {
- dst_packsize(dst, 204);
- }
- return 0;
-}
-
-static int dst_command (struct dst_data *dst, u8 *data, u8 len)
-{
- int retval;
- u8 reply;
-
- dst_i2c_enable(dst);
- dst_reset8820(dst);
- retval = write_dst (dst, data, len);
- if (retval < 0) {
- dst_i2c_disable(dst);
- dprintk("%s: write not successful\n", __FUNCTION__);
- return retval;
- }
- dvb_delay(33);
- retval = read_dst (dst, &reply, 1);
- dst_i2c_disable(dst);
- if (retval < 0) {
- dprintk("%s: read verify not successful\n", __FUNCTION__);
- return retval;
- }
- if (reply != 0xff) {
- dprintk("%s: write reply not 0xff 0x%02x \n", __FUNCTION__, reply);
- return 0;
- }
- if (len >= 2 && data[0] == 0 && (data[1] == 1 || data[1] == 3))
- return 0;
- if (!dst_wait_dst_ready(dst))
- return 0;
- // dst_i2c_enable(i2c); Per dimitri
- retval = read_dst (dst, dst->rxbuffer, 8);
- dst_i2c_disable(dst);
- if (retval < 0) {
- dprintk("%s: read not successful\n", __FUNCTION__);
- return 0;
- }
- if (dst->rxbuffer[7] != dst_check_sum (dst->rxbuffer, 7)) {
- dprintk("%s: checksum failure\n", __FUNCTION__);
- return 0;
- }
- return 0;
-}
-
-static int dst_get_signal(struct dst_data *dst)
-{
- int retval;
- u8 get_signal[] = {0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfb};
-
- if ((dst->diseq_flags & ATTEMPT_TUNE) == 0) {
- dst->decode_lock = dst->decode_strength = dst->decode_snr = 0;
- return 0;
- }
- if (0 == (dst->diseq_flags & HAS_LOCK)) {
- dst->decode_lock = dst->decode_strength = dst->decode_snr = 0;
- return 0;
- }
- if (time_after_eq(jiffies, dst->cur_jiff + (HZ/5))) {
- retval = dst_command(dst, get_signal, 8);
- if (retval < 0)
- return retval;
- if (dst->dst_type == DST_TYPE_IS_SAT) {
- dst->decode_lock = ((dst->rxbuffer[6] & 0x10) == 0) ?
- 1 : 0;
- dst->decode_strength = dst->rxbuffer[5] << 8;
- dst->decode_snr = dst->rxbuffer[2] << 8 |
- dst->rxbuffer[3];
- } else if ((dst->dst_type == DST_TYPE_IS_TERR) ||
- (dst->dst_type == DST_TYPE_IS_CABLE)) {
- dst->decode_lock = (dst->rxbuffer[1]) ?
- 1 : 0;
- dst->decode_strength = dst->rxbuffer[4] << 8;
- dst->decode_snr = dst->rxbuffer[3] << 8;
- }
- dst->cur_jiff = jiffies;
- }
- return 0;
-}
-
-/*
- * line22k0 0x00, 0x09, 0x00, 0xff, 0x01, 0x00, 0x00, 0x00
- * line22k1 0x00, 0x09, 0x01, 0xff, 0x01, 0x00, 0x00, 0x00
- * line22k2 0x00, 0x09, 0x02, 0xff, 0x01, 0x00, 0x00, 0x00
- * tone 0x00, 0x09, 0xff, 0x00, 0x01, 0x00, 0x00, 0x00
- * data 0x00, 0x09, 0xff, 0x01, 0x01, 0x00, 0x00, 0x00
- * power_off 0x00, 0x09, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
- * power_on 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00
- * Diseqc 1 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec
- * Diseqc 2 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf4, 0xe8
- * Diseqc 3 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf8, 0xe4
- * Diseqc 4 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xfc, 0xe0
- */
-
-static int dst_set_diseqc (struct dst_data *dst, u8 *cmd, u8 len)
-{
- u8 paket[8] = {0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec };
-
- if (dst->dst_type == DST_TYPE_IS_TERR)
- return 0;
-
- if (len == 0 || len > 4)
- return -EINVAL;
- memcpy(&paket[3], cmd, len);
- paket[7] = dst_check_sum (&paket[0], 7);
- dst_command(dst, paket, 8);
- return 0;
-}
-
-static int dst_tone_power_cmd (struct dst_data *dst)
-{
- u8 paket[8] = {0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00};
-
- if (dst->dst_type == DST_TYPE_IS_TERR)
- return 0;
-
- if (dst->voltage == SEC_VOLTAGE_OFF)
- paket[4] = 0;
- else
- paket[4] = 1;
- if (dst->tone == SEC_TONE_ON)
- paket[2] = dst->k22;
- else
- paket[2] = 0;
- paket[7] = dst_check_sum (&paket[0], 7);
- dst_command(dst, paket, 8);
- return 0;
-}
-
-static int dst_set_voltage (struct dst_data *dst, fe_sec_voltage_t voltage)
-{
- u8 *val;
- int need_cmd;
-
- dst->voltage = voltage;
-
- if (dst->dst_type == DST_TYPE_IS_TERR)
- return 0;
-
- need_cmd = 0;
- val = &dst->tx_tuna[0];
- val[8] &= ~0x40;
- switch (voltage) {
- case SEC_VOLTAGE_13:
- if ((dst->diseq_flags & HAS_POWER) == 0)
- need_cmd = 1;
- dst->diseq_flags |= HAS_POWER;
- break;
- case SEC_VOLTAGE_18:
- if ((dst->diseq_flags & HAS_POWER) == 0)
- need_cmd = 1;
- dst->diseq_flags |= HAS_POWER;
- val[8] |= 0x40;
- break;
- case SEC_VOLTAGE_OFF:
- need_cmd = 1;
- dst->diseq_flags &= ~(HAS_POWER|HAS_LOCK|ATTEMPT_TUNE);
- break;
- default:
- return -EINVAL;
- }
- if (need_cmd) {
- dst_tone_power_cmd(dst);
- }
- return 0;
-}
-
-
-static int dst_set_tone (struct dst_data *dst, fe_sec_tone_mode_t tone)
-{
- u8 *val;
-
- dst->tone = tone;
-
- if (dst->dst_type == DST_TYPE_IS_TERR)
- return 0;
-
- val = &dst->tx_tuna[0];
-
- val[8] &= ~0x1;
-
- switch (tone) {
- case SEC_TONE_OFF:
- break;
- case SEC_TONE_ON:
- val[8] |= 1;
- break;
- default:
- return -EINVAL;
- }
- dst_tone_power_cmd(dst);
- return 0;
-}
-
-static int dst_get_tuna (struct dst_data *dst)
-{
-int retval;
- if ((dst->diseq_flags & ATTEMPT_TUNE) == 0)
- return 0;
- dst->diseq_flags &= ~(HAS_LOCK);
- if (!dst_wait_dst_ready(dst))
- return 0;
- if (dst->type_flags & DST_TYPE_HAS_NEWTUNE) {
- /* how to get variable length reply ???? */
- retval = read_dst (dst, dst->rx_tuna, 10);
- } else {
- retval = read_dst (dst, &dst->rx_tuna[2], 8);
- }
- if (retval < 0) {
- dprintk("%s: read not successful\n", __FUNCTION__);
- return 0;
- }
- if (dst->type_flags & DST_TYPE_HAS_NEWTUNE) {
- if (dst->rx_tuna[9] != dst_check_sum (&dst->rx_tuna[0], 9)) {
- dprintk("%s: checksum failure?\n", __FUNCTION__);
- return 0;
- }
- } else {
- if (dst->rx_tuna[9] != dst_check_sum (&dst->rx_tuna[2], 7)) {
- dprintk("%s: checksum failure?\n", __FUNCTION__);
- return 0;
- }
- }
- if (dst->rx_tuna[2] == 0 && dst->rx_tuna[3] == 0)
- return 0;
- dst->decode_freq = ((dst->rx_tuna[2] & 0x7f) << 8) + dst->rx_tuna[3];
-
- dst->decode_lock = 1;
- /*
- dst->decode_n1 = (dst->rx_tuna[4] << 8) +
- (dst->rx_tuna[5]);
-
- dst->decode_n2 = (dst->rx_tuna[8] << 8) +
- (dst->rx_tuna[7]);
- */
- dst->diseq_flags |= HAS_LOCK;
- /* dst->cur_jiff = jiffies; */
- return 1;
-}
-
-static int dst_write_tuna (struct dst_data *dst)
-{
- int retval;
- u8 reply;
-
- dprintk("%s: type_flags 0x%x \n", __FUNCTION__, dst->type_flags);
- dst->decode_freq = 0;
- dst->decode_lock = dst->decode_strength = dst->decode_snr = 0;
- if (dst->dst_type == DST_TYPE_IS_SAT) {
- if (!(dst->diseq_flags & HAS_POWER))
- dst_set_voltage (dst, SEC_VOLTAGE_13);
- }
- dst->diseq_flags &= ~(HAS_LOCK|ATTEMPT_TUNE);
- dst_i2c_enable(dst);
- if (dst->type_flags & DST_TYPE_HAS_NEWTUNE) {
- dst_reset8820(dst);
- dst->tx_tuna[9] = dst_check_sum (&dst->tx_tuna[0], 9);
- retval = write_dst (dst, &dst->tx_tuna[0], 10);
- } else {
- dst->tx_tuna[9] = dst_check_sum (&dst->tx_tuna[2], 7);
- retval = write_dst (dst, &dst->tx_tuna[2], 8);
- }
- if (retval < 0) {
- dst_i2c_disable(dst);
- dprintk("%s: write not successful\n", __FUNCTION__);
- return retval;
- }
- dvb_delay(3);
- retval = read_dst (dst, &reply, 1);
- dst_i2c_disable(dst);
- if (retval < 0) {
- dprintk("%s: read verify not successful\n", __FUNCTION__);
- return retval;
- }
- if (reply != 0xff) {
- dprintk("%s: write reply not 0xff 0x%02x \n", __FUNCTION__, reply);
- return 0;
- }
- dst->diseq_flags |= ATTEMPT_TUNE;
- return dst_get_tuna(dst);
-}
-
-static void dst_init (struct dst_data *dst)
-{
-static u8 ini_satci_tuna[] = { 9, 0, 3, 0xb6, 1, 0, 0x73, 0x21, 0, 0 };
-static u8 ini_satfta_tuna[] = { 0, 0, 3, 0xb6, 1, 0x55, 0xbd, 0x50, 0, 0 };
-static u8 ini_tvfta_tuna[] = { 0, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 };
-static u8 ini_tvci_tuna[] = { 9, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 };
-static u8 ini_cabfta_tuna[] = { 0, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 };
-static u8 ini_cabci_tuna[] = { 9, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 };
- dst->inversion = INVERSION_ON;
- dst->voltage = SEC_VOLTAGE_13;
- dst->tone = SEC_TONE_OFF;
- dst->symbol_rate = 29473000;
- dst->fec = FEC_AUTO;
- dst->diseq_flags = 0;
- dst->k22 = 0x02;
- dst->bandwidth = BANDWIDTH_7_MHZ;
- dst->cur_jiff = jiffies;
- if (dst->dst_type == DST_TYPE_IS_SAT) {
- dst->frequency = 950000;
- memcpy(dst->tx_tuna, ((dst->type_flags & DST_TYPE_HAS_NEWTUNE )?
- ini_satci_tuna : ini_satfta_tuna),
- sizeof(ini_satfta_tuna));
- } else if (dst->dst_type == DST_TYPE_IS_TERR) {
- dst->frequency = 137000000;
- memcpy(dst->tx_tuna, ((dst->type_flags & DST_TYPE_HAS_NEWTUNE )?
- ini_tvci_tuna : ini_tvfta_tuna),
- sizeof(ini_tvfta_tuna));
- } else if (dst->dst_type == DST_TYPE_IS_CABLE) {
- dst->frequency = 51000000;
- memcpy(dst->tx_tuna, ((dst->type_flags & DST_TYPE_HAS_NEWTUNE )?
- ini_cabci_tuna : ini_cabfta_tuna),
- sizeof(ini_cabfta_tuna));
- }
-}
-
-struct lkup {
- unsigned int cmd;
- char *desc;
-} looker[] = {
- {FE_GET_INFO, "FE_GET_INFO:"},
- {FE_READ_STATUS, "FE_READ_STATUS:" },
- {FE_READ_BER, "FE_READ_BER:" },
- {FE_READ_SIGNAL_STRENGTH, "FE_READ_SIGNAL_STRENGTH:" },
- {FE_READ_SNR, "FE_READ_SNR:" },
- {FE_READ_UNCORRECTED_BLOCKS, "FE_READ_UNCORRECTED_BLOCKS:" },
- {FE_SET_FRONTEND, "FE_SET_FRONTEND:" },
- {FE_GET_FRONTEND, "FE_GET_FRONTEND:" },
- {FE_SLEEP, "FE_SLEEP:" },
- {FE_INIT, "FE_INIT:" },
- {FE_SET_TONE, "FE_SET_TONE:" },
- {FE_SET_VOLTAGE, "FE_SET_VOLTAGE:" },
- };
-
-static int dst_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
-{
- struct dst_data *dst = fe->data;
- int retval;
- /*
- char *cc;
-
- cc = "FE_UNSUPP:";
- for(retval = 0; retval < sizeof(looker) / sizeof(looker[0]); retval++) {
- if (looker[retval].cmd == cmd) {
- cc = looker[retval].desc;
- break;
- }
- }
- dprintk("%s cmd %s (0x%x)\n",__FUNCTION__, cc, cmd);
- */
- // printk("%s: dst %8.8x bt %8.8x i2c %8.8x\n", __FUNCTION__, dst, dst->bt, dst->i2c);
- /* should be set by attach, but just in case */
- dst->i2c = fe->i2c;
- switch (cmd) {
- case FE_GET_INFO:
- {
- struct dvb_frontend_info *info;
- info = &dst_info_sat;
- if (dst->dst_type == DST_TYPE_IS_TERR)
- info = &dst_info_tv;
- else if (dst->dst_type == DST_TYPE_IS_CABLE)
- info = &dst_info_cable;
- memcpy (arg, info, sizeof(struct dvb_frontend_info));
- break;
- }
- case FE_READ_STATUS:
- {
- fe_status_t *status = arg;
-
- *status = 0;
- if (dst->diseq_flags & HAS_LOCK) {
- dst_get_signal(dst);
- if (dst->decode_lock)
- *status |= FE_HAS_LOCK
- | FE_HAS_SIGNAL
- | FE_HAS_CARRIER
- | FE_HAS_SYNC
- | FE_HAS_VITERBI;
- }
- break;
- }
-
- case FE_READ_BER:
- {
- /* guess */
- // *(u32*) arg = dst->decode_n1;
- *(u32*) arg = 0;
- return -EOPNOTSUPP;
- }
-
- case FE_READ_SIGNAL_STRENGTH:
- {
- dst_get_signal(dst);
- *((u16*) arg) = dst->decode_strength;
- break;
- }
-
- case FE_READ_SNR:
- {
- dst_get_signal(dst);
- *((u16*) arg) = dst->decode_snr;
- break;
- }
-
- case FE_READ_UNCORRECTED_BLOCKS:
- {
- *((u32*) arg) = 0; /* the stv0299 can't measure BER and */
- return -EOPNOTSUPP; /* errors at the same time.... */
- }
-
- case FE_SET_FRONTEND:
- {
- struct dvb_frontend_parameters *p = arg;
-
- dst_set_freq (dst, p->frequency);
- dst_set_inversion (dst, p->inversion);
- if (dst->dst_type == DST_TYPE_IS_SAT) {
- dst_set_fec (dst, p->u.qpsk.fec_inner);
- dst_set_symbolrate (dst, p->u.qpsk.symbol_rate);
- } else if (dst->dst_type == DST_TYPE_IS_TERR) {
- dst_set_bandwidth(dst, p->u.ofdm.bandwidth);
- } else if (dst->dst_type == DST_TYPE_IS_CABLE) {
- dst_set_fec (dst, p->u.qam.fec_inner);
- dst_set_symbolrate (dst, p->u.qam.symbol_rate);
- }
- dst_write_tuna (dst);
-
- break;
- }
-
- case FE_GET_FRONTEND:
- {
- struct dvb_frontend_parameters *p = arg;
-
-
- p->frequency = dst->decode_freq;
- p->inversion = dst->inversion;
- if (dst->dst_type == DST_TYPE_IS_SAT) {
- p->u.qpsk.symbol_rate = dst->symbol_rate;
- p->u.qpsk.fec_inner = dst_get_fec (dst);
- } else if (dst->dst_type == DST_TYPE_IS_TERR) {
- p->u.ofdm.bandwidth = dst->bandwidth;
- } else if (dst->dst_type == DST_TYPE_IS_CABLE) {
- p->u.qam.symbol_rate = dst->symbol_rate;
- p->u.qam.fec_inner = dst_get_fec (dst);
- p->u.qam.modulation = QAM_AUTO;
- }
- break;
- }
-
- case FE_SLEEP:
- return 0;
-
- case FE_INIT:
- dst_init(dst);
- break;
-
- case FE_DISEQC_SEND_MASTER_CMD:
- {
- struct dvb_diseqc_master_cmd *cmd = (struct dvb_diseqc_master_cmd *)arg;
- retval = dst_set_diseqc (dst, cmd->msg, cmd->msg_len);
- if (retval < 0)
- return retval;
- break;
- }
- case FE_SET_TONE:
- retval = dst_set_tone (dst, (fe_sec_tone_mode_t) arg);
- if (retval < 0)
- return retval;
- break;
- case FE_SET_VOLTAGE:
- retval = dst_set_voltage (dst, (fe_sec_voltage_t) arg);
- if (retval < 0)
- return retval;
- break;
- default:
- return -EOPNOTSUPP;
- };
-
- return 0;
-}
-
-
-static int dst_attach (struct dvb_i2c_bus *i2c, void **data)
-{
- struct dst_data *dst;
- struct bt878 *bt;
- struct dvb_frontend_info *info;
-
- dprintk("%s: check ci\n", __FUNCTION__);
- if (dst_cur_no >= DST_MAX_CARDS) {
- dprintk("%s: can't have more than %d cards\n", __FUNCTION__, DST_MAX_CARDS);
- return -ENODEV;
- }
- bt = bt878_find_by_dvb_adap(i2c->adapter);
- if (!bt)
- return -ENODEV;
- dst = kmalloc(sizeof(struct dst_data), GFP_KERNEL);
- if (dst == NULL) {
- printk(KERN_INFO "%s: Out of memory.\n", __FUNCTION__);
- return -ENOMEM;
- }
- memset(dst, 0, sizeof(*dst));
- *data = dst;
- dst->bt = bt;
- dst->i2c = i2c;
- if (dst_check_ci(dst) < 0) {
- kfree(dst);
- return -ENODEV;
- }
-
- dst_init (dst);
- dprintk("%s: register dst %p bt %p i2c %p\n", __FUNCTION__,
- dst, dst->bt, dst->i2c);
-
- info = &dst_info_sat;
- if (dst->dst_type == DST_TYPE_IS_TERR)
- info = &dst_info_tv;
- else if (dst->dst_type == DST_TYPE_IS_CABLE)
- info = &dst_info_cable;
-
- dvb_register_frontend (dst_ioctl, i2c, dst, info);
- dst_cur_no++;
- return 0;
-}
-
-static void dst_detach (struct dvb_i2c_bus *i2c, void *data)
-{
- dvb_unregister_frontend (dst_ioctl, i2c);
- dprintk("%s: unregister dst %p\n", __FUNCTION__, data);
- if (data)
- kfree(data);
-}
-
-static int __init init_dst (void)
-{
- return dvb_register_i2c_device (THIS_MODULE, dst_attach, dst_detach);
-}
-
-static void __exit exit_dst (void)
-{
- dvb_unregister_i2c_device (dst_attach);
-}
-
-
-module_init(init_dst);
-module_exit(exit_dst);
-
-MODULE_DESCRIPTION("DST DVB-S Frontend");
-MODULE_AUTHOR("Jamie Honan");
-MODULE_LICENSE("GPL");
-
+++ /dev/null
-/*
- driver for Grundig 29504-401 DVB-T Frontends based on
- LSI L64781 COFDM demodulator as used in Technotrend DVB-T cards
-
- Copyright (C) 2001 Holger Waechtler <holger@convergence.de>
- for Convergence Integrated Media GmbH
- Marko Kohtala <marko.kohtala@nokia.com>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
-*/
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/slab.h>
-
-#include "dvb_frontend.h"
-#include "dvb_functions.h"
-
-static int debug = 0;
-
-#define dprintk if (debug) printk
-
-struct grundig_state {
- int first:1;
-};
-
-struct dvb_frontend_info grundig_29504_401_info = {
- .name = "Grundig 29504-401",
- .type = FE_OFDM,
-/* .frequency_min = ???,*/
-/* .frequency_max = ???,*/
- .frequency_stepsize = 166666,
-/* .frequency_tolerance = ???,*/
-/* .symbol_rate_tolerance = ???,*/
- .notifier_delay = 0,
- .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
- FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
- FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
- FE_CAN_MUTE_TS
-};
-
-
-static int l64781_writereg (struct dvb_i2c_bus *i2c, u8 reg, u8 data)
-{
- int ret;
- u8 buf [] = { reg, data };
- struct i2c_msg msg = { .addr = 0x55, .flags = 0, .buf = buf, .len = 2 };
-
- if ((ret = i2c->xfer (i2c, &msg, 1)) != 1)
- dprintk ("%s: write_reg error (reg == %02x) = %02x!\n",
- __FUNCTION__, reg, ret);
-
- return (ret != 1) ? -1 : 0;
-}
-
-
-static u8 l64781_readreg (struct dvb_i2c_bus *i2c, u8 reg)
-{
- int ret;
- u8 b0 [] = { reg };
- u8 b1 [] = { 0 };
- struct i2c_msg msg [] = { { .addr = 0x55, .flags = 0, .buf = b0, .len = 1 },
- { .addr = 0x55, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
-
- ret = i2c->xfer (i2c, msg, 2);
-
- if (ret != 2)
- dprintk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
-
- return b1[0];
-}
-
-
-static int tsa5060_write (struct dvb_i2c_bus *i2c, u8 data [4])
-{
- int ret;
- struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = 4 };
-
- if ((ret = i2c->xfer (i2c, &msg, 1)) != 1)
- dprintk ("%s: write_reg error == %02x!\n", __FUNCTION__, ret);
-
- return (ret != 1) ? -1 : 0;
-}
-
-
-/**
- * set up the downconverter frequency divisor for a
- * reference clock comparision frequency of 166666 Hz.
- * frequency offset is 36125000 Hz.
- */
-static int tsa5060_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq)
-{
-#if 1
- u32 div;
- u8 buf [4];
- u8 cfg, cpump, band_select;
-
- div = (36125000 + freq) / 166666;
- cfg = 0x88;
-
- cpump = freq < 175000000 ? 2 : freq < 390000000 ? 1 :
- freq < 470000000 ? 2 : freq < 750000000 ? 1 : 3;
-
- band_select = freq < 175000000 ? 0x0e : freq < 470000000 ? 0x05 : 0x03;
-
- buf [0] = (div >> 8) & 0x7f;
- buf [1] = div & 0xff;
- buf [2] = ((div >> 10) & 0x60) | cfg;
- buf [3] = (cpump << 6) | band_select;
-#else
- /* old code which seems to work better for at least one person */
- u32 div;
- u8 buf [4];
- u8 cfg;
-
- div = (36000000 + freq) / 166666;
- cfg = 0x88;
-
- buf [0] = (div >> 8) & 0x7f;
- buf [1] = div & 0xff;
- buf [2] = ((div >> 10) & 0x60) | cfg;
- buf [3] = 0xc0;
-#endif
-
- return tsa5060_write (i2c, buf);
-}
-
-
-static void apply_tps (struct dvb_i2c_bus *i2c)
-{
- l64781_writereg (i2c, 0x2a, 0x00);
- l64781_writereg (i2c, 0x2a, 0x01);
-
- /* This here is a little bit questionable because it enables
- the automatic update of TPS registers. I think we'd need to
- handle the IRQ from FE to update some other registers as
- well, or at least implement some magic to tuning to correct
- to the TPS received from transmission. */
- l64781_writereg (i2c, 0x2a, 0x02);
-}
-
-
-static void reset_afc (struct dvb_i2c_bus *i2c)
-{
- /* Set AFC stall for the AFC_INIT_FRQ setting, TIM_STALL for
- timing offset */
- l64781_writereg (i2c, 0x07, 0x9e); /* stall AFC */
- l64781_writereg (i2c, 0x08, 0); /* AFC INIT FREQ */
- l64781_writereg (i2c, 0x09, 0);
- l64781_writereg (i2c, 0x0a, 0);
- l64781_writereg (i2c, 0x07, 0x8e);
- l64781_writereg (i2c, 0x0e, 0); /* AGC gain to zero in beginning */
- l64781_writereg (i2c, 0x11, 0x80); /* stall TIM */
- l64781_writereg (i2c, 0x10, 0); /* TIM_OFFSET_LSB */
- l64781_writereg (i2c, 0x12, 0);
- l64781_writereg (i2c, 0x13, 0);
- l64781_writereg (i2c, 0x11, 0x00);
-}
-
-
-static int apply_frontend_param (struct dvb_i2c_bus *i2c,
- struct dvb_frontend_parameters *param)
-{
- /* The coderates for FEC_NONE, FEC_4_5 and FEC_FEC_6_7 are arbitrary */
- static const u8 fec_tab[] = { 7, 0, 1, 2, 9, 3, 10, 4 };
- /* QPSK, QAM_16, QAM_64 */
- static const u8 qam_tab [] = { 2, 4, 0, 6 };
- static const u8 bw_tab [] = { 8, 7, 6 }; /* 8Mhz, 7MHz, 6MHz */
- static const u8 guard_tab [] = { 1, 2, 4, 8 };
- /* The Grundig 29504-401.04 Tuner comes with 18.432MHz crystal. */
- static const u32 ppm = 8000;
- struct dvb_ofdm_parameters *p = ¶m->u.ofdm;
- u32 ddfs_offset_fixed;
-/* u32 ddfs_offset_variable = 0x6000-((1000000UL+ppm)/ */
-/* bw_tab[p->bandWidth]<<10)/15625; */
- u32 init_freq;
- u32 spi_bias;
- u8 val0x04;
- u8 val0x05;
- u8 val0x06;
- int bw = p->bandwidth - BANDWIDTH_8_MHZ;
-
- if (param->inversion != INVERSION_ON &&
- param->inversion != INVERSION_OFF)
- return -EINVAL;
-
- if (bw < 0 || bw > 2)
- return -EINVAL;
-
- if (p->code_rate_HP != FEC_1_2 && p->code_rate_HP != FEC_2_3 &&
- p->code_rate_HP != FEC_3_4 && p->code_rate_HP != FEC_5_6 &&
- p->code_rate_HP != FEC_7_8)
- return -EINVAL;
-
- if (p->hierarchy_information != HIERARCHY_NONE &&
- (p->code_rate_LP != FEC_1_2 && p->code_rate_LP != FEC_2_3 &&
- p->code_rate_LP != FEC_3_4 && p->code_rate_LP != FEC_5_6 &&
- p->code_rate_LP != FEC_7_8))
- return -EINVAL;
-
- if (p->constellation != QPSK && p->constellation != QAM_16 &&
- p->constellation != QAM_64)
- return -EINVAL;
-
- if (p->transmission_mode != TRANSMISSION_MODE_2K &&
- p->transmission_mode != TRANSMISSION_MODE_8K)
- return -EINVAL;
-
- if (p->guard_interval < GUARD_INTERVAL_1_32 ||
- p->guard_interval > GUARD_INTERVAL_1_4)
- return -EINVAL;
-
- if (p->hierarchy_information < HIERARCHY_NONE ||
- p->hierarchy_information > HIERARCHY_4)
- return -EINVAL;
-
- ddfs_offset_fixed = 0x4000-(ppm<<16)/bw_tab[p->bandwidth]/1000000;
-
- /* This works up to 20000 ppm, it overflows if too large ppm! */
- init_freq = (((8UL<<25) + (8UL<<19) / 25*ppm / (15625/25)) /
- bw_tab[p->bandwidth] & 0xFFFFFF);
-
- /* SPI bias calculation is slightly modified to fit in 32bit */
- /* will work for high ppm only... */
- spi_bias = 378 * (1 << 10);
- spi_bias *= 16;
- spi_bias *= bw_tab[p->bandwidth];
- spi_bias *= qam_tab[p->constellation];
- spi_bias /= p->code_rate_HP + 1;
- spi_bias /= (guard_tab[p->guard_interval] + 32);
- spi_bias *= 1000ULL;
- spi_bias /= 1000ULL + ppm/1000;
- spi_bias *= p->code_rate_HP;
-
- val0x04 = (p->transmission_mode << 2) | p->guard_interval;
- val0x05 = fec_tab[p->code_rate_HP];
-
- if (p->hierarchy_information != HIERARCHY_NONE)
- val0x05 |= (p->code_rate_LP - FEC_1_2) << 3;
-
- val0x06 = (p->hierarchy_information << 2) | p->constellation;
-
- l64781_writereg (i2c, 0x04, val0x04);
- l64781_writereg (i2c, 0x05, val0x05);
- l64781_writereg (i2c, 0x06, val0x06);
-
- reset_afc (i2c);
-
- /* Technical manual section 2.6.1, TIM_IIR_GAIN optimal values */
- l64781_writereg (i2c, 0x15,
- p->transmission_mode == TRANSMISSION_MODE_2K ? 1 : 3);
- l64781_writereg (i2c, 0x16, init_freq & 0xff);
- l64781_writereg (i2c, 0x17, (init_freq >> 8) & 0xff);
- l64781_writereg (i2c, 0x18, (init_freq >> 16) & 0xff);
-
- l64781_writereg (i2c, 0x1b, spi_bias & 0xff);
- l64781_writereg (i2c, 0x1c, (spi_bias >> 8) & 0xff);
- l64781_writereg (i2c, 0x1d, ((spi_bias >> 16) & 0x7f) |
- (param->inversion == INVERSION_ON ? 0x80 : 0x00));
-
- l64781_writereg (i2c, 0x22, ddfs_offset_fixed & 0xff);
- l64781_writereg (i2c, 0x23, (ddfs_offset_fixed >> 8) & 0x3f);
-
- l64781_readreg (i2c, 0x00); /* clear interrupt registers... */
- l64781_readreg (i2c, 0x01); /* dto. */
-
- apply_tps (i2c);
-
- return 0;
-}
-
-
-static int reset_and_configure (struct dvb_i2c_bus *i2c)
-{
- u8 buf [] = { 0x06 };
- struct i2c_msg msg = { .addr = 0x00, .flags = 0, .buf = buf, .len = 1 };
-
- return (i2c->xfer (i2c, &msg, 1) == 1) ? 0 : -ENODEV;
-}
-
-
-static int get_frontend(struct dvb_i2c_bus* i2c, struct dvb_frontend_parameters* param)
-{
- int tmp;
-
-
- tmp = l64781_readreg(i2c, 0x04);
- switch(tmp & 3) {
- case 0:
- param->u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
- break;
- case 1:
- param->u.ofdm.guard_interval = GUARD_INTERVAL_1_16;
- break;
- case 2:
- param->u.ofdm.guard_interval = GUARD_INTERVAL_1_8;
- break;
- case 3:
- param->u.ofdm.guard_interval = GUARD_INTERVAL_1_4;
- break;
- }
- switch((tmp >> 2) & 3) {
- case 0:
- param->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K;
- break;
- case 1:
- param->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
- break;
- default:
- printk("Unexpected value for transmission_mode\n");
- }
-
-
-
- tmp = l64781_readreg(i2c, 0x05);
- switch(tmp & 7) {
- case 0:
- param->u.ofdm.code_rate_HP = FEC_1_2;
- break;
- case 1:
- param->u.ofdm.code_rate_HP = FEC_2_3;
- break;
- case 2:
- param->u.ofdm.code_rate_HP = FEC_3_4;
- break;
- case 3:
- param->u.ofdm.code_rate_HP = FEC_5_6;
- break;
- case 4:
- param->u.ofdm.code_rate_HP = FEC_7_8;
- break;
- default:
- printk("Unexpected value for code_rate_HP\n");
- }
- switch((tmp >> 3) & 7) {
- case 0:
- param->u.ofdm.code_rate_LP = FEC_1_2;
- break;
- case 1:
- param->u.ofdm.code_rate_LP = FEC_2_3;
- break;
- case 2:
- param->u.ofdm.code_rate_LP = FEC_3_4;
- break;
- case 3:
- param->u.ofdm.code_rate_LP = FEC_5_6;
- break;
- case 4:
- param->u.ofdm.code_rate_LP = FEC_7_8;
- break;
- default:
- printk("Unexpected value for code_rate_LP\n");
- }
-
-
- tmp = l64781_readreg(i2c, 0x06);
- switch(tmp & 3) {
- case 0:
- param->u.ofdm.constellation = QPSK;
- break;
- case 1:
- param->u.ofdm.constellation = QAM_16;
- break;
- case 2:
- param->u.ofdm.constellation = QAM_64;
- break;
- default:
- printk("Unexpected value for constellation\n");
- }
- switch((tmp >> 2) & 7) {
- case 0:
- param->u.ofdm.hierarchy_information = HIERARCHY_NONE;
- break;
- case 1:
- param->u.ofdm.hierarchy_information = HIERARCHY_1;
- break;
- case 2:
- param->u.ofdm.hierarchy_information = HIERARCHY_2;
- break;
- case 3:
- param->u.ofdm.hierarchy_information = HIERARCHY_4;
- break;
- default:
- printk("Unexpected value for hierarchy\n");
- }
-
-
- tmp = l64781_readreg (i2c, 0x1d);
- param->inversion = (tmp & 0x80) ? INVERSION_ON : INVERSION_OFF;
-
- tmp = (int) (l64781_readreg (i2c, 0x08) |
- (l64781_readreg (i2c, 0x09) << 8) |
- (l64781_readreg (i2c, 0x0a) << 16));
- param->frequency += tmp;
-
- return 0;
-}
-
-
-static int init (struct dvb_i2c_bus *i2c)
-{
- reset_and_configure (i2c);
-
- /* Power up */
- l64781_writereg (i2c, 0x3e, 0xa5);
-
- /* Reset hard */
- l64781_writereg (i2c, 0x2a, 0x04);
- l64781_writereg (i2c, 0x2a, 0x00);
-
- /* Set tuner specific things */
- /* AFC_POL, set also in reset_afc */
- l64781_writereg (i2c, 0x07, 0x8e);
-
- /* Use internal ADC */
- l64781_writereg (i2c, 0x0b, 0x81);
-
- /* AGC loop gain, and polarity is positive */
- l64781_writereg (i2c, 0x0c, 0x84);
-
- /* Internal ADC outputs two's complement */
- l64781_writereg (i2c, 0x0d, 0x8c);
-
- /* With ppm=8000, it seems the DTR_SENSITIVITY will result in
- value of 2 with all possible bandwidths and guard
- intervals, which is the initial value anyway. */
- /*l64781_writereg (i2c, 0x19, 0x92);*/
-
- /* Everything is two's complement, soft bit and CSI_OUT too */
- l64781_writereg (i2c, 0x1e, 0x09);
-
- return 0;
-}
-
-
-static
-int grundig_29504_401_ioctl (struct dvb_frontend *fe,
- unsigned int cmd, void *arg)
-{
- struct dvb_i2c_bus *i2c = fe->i2c;
- int res;
- struct grundig_state* state = (struct grundig_state*) fe->data;
-
- switch (cmd) {
- case FE_GET_INFO:
- memcpy (arg, &grundig_29504_401_info,
- sizeof(struct dvb_frontend_info));
- break;
-
- case FE_READ_STATUS:
- {
- fe_status_t *status = (fe_status_t *) arg;
- int sync = l64781_readreg (i2c, 0x32);
- int gain = l64781_readreg (i2c, 0x0e);
-
- l64781_readreg (i2c, 0x00); /* clear interrupt registers... */
- l64781_readreg (i2c, 0x01); /* dto. */
-
- *status = 0;
-
- if (gain > 5)
- *status |= FE_HAS_SIGNAL;
-
- if (sync & 0x02) /* VCXO locked, this criteria should be ok */
- *status |= FE_HAS_CARRIER;
-
- if (sync & 0x20)
- *status |= FE_HAS_VITERBI;
-
- if (sync & 0x40)
- *status |= FE_HAS_SYNC;
-
- if (sync == 0x7f)
- *status |= FE_HAS_LOCK;
-
- break;
- }
-
- case FE_READ_BER:
- {
- /* XXX FIXME: set up counting period (reg 0x26...0x28)
- */
- u32 *ber = (u32 *) arg;
- *ber = l64781_readreg (i2c, 0x39)
- | (l64781_readreg (i2c, 0x3a) << 8);
- break;
- }
-
- case FE_READ_SIGNAL_STRENGTH:
- {
- u8 gain = l64781_readreg (i2c, 0x0e);
- *(u16 *) arg = (gain << 8) | gain;
- break;
- }
-
- case FE_READ_SNR:
- {
- u16 *snr = (u16 *) arg;
- u8 avg_quality = 0xff - l64781_readreg (i2c, 0x33);
- *snr = (avg_quality << 8) | avg_quality; /* not exact, but...*/
- break;
- }
-
- case FE_READ_UNCORRECTED_BLOCKS:
- {
- u32 *ub = (u32 *) arg;
- *ub = l64781_readreg (i2c, 0x37)
- | (l64781_readreg (i2c, 0x38) << 8);
- break;
- }
-
- case FE_SET_FRONTEND:
- {
- struct dvb_frontend_parameters *p = arg;
-
- tsa5060_set_tv_freq (i2c, p->frequency);
- return apply_frontend_param (i2c, p);
- }
-
- case FE_GET_FRONTEND:
- {
- struct dvb_frontend_parameters *p = arg;
- return get_frontend(i2c, p);
- }
-
- case FE_SLEEP:
- /* Power down */
- return l64781_writereg (i2c, 0x3e, 0x5a);
-
- case FE_INIT:
- res = init (i2c);
- if ((res == 0) && (state->first)) {
- state->first = 0;
- dvb_delay(200);
- }
- return res;
-
- case FE_GET_TUNE_SETTINGS:
- {
- struct dvb_frontend_tune_settings* fesettings = (struct dvb_frontend_tune_settings*) arg;
- fesettings->min_delay_ms = 200;
- fesettings->step_size = 166667;
- fesettings->max_drift = 166667*2;
- return 0;
- }
-
- default:
- dprintk ("%s: unknown command !!!\n", __FUNCTION__);
- return -EINVAL;
- };
-
- return 0;
-}
-
-
-static int l64781_attach (struct dvb_i2c_bus *i2c, void **data)
-{
- u8 reg0x3e;
- u8 b0 [] = { 0x1a };
- u8 b1 [] = { 0x00 };
- struct i2c_msg msg [] = { { .addr = 0x55, .flags = 0, .buf = b0, .len = 1 },
- { .addr = 0x55, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
- struct grundig_state* state;
-
- /**
- * the L64781 won't show up before we send the reset_and_configure()
- * broadcast. If nothing responds there is no L64781 on the bus...
- */
- if (reset_and_configure(i2c) < 0) {
- dprintk("no response on reset_and_configure() broadcast, bailing out...\n");
- return -ENODEV;
- }
-
- /* The chip always responds to reads */
- if (i2c->xfer(i2c, msg, 2) != 2) {
- dprintk("no response to read on I2C bus\n");
- return -ENODEV;
- }
-
- /* Save current register contents for bailout */
- reg0x3e = l64781_readreg(i2c, 0x3e);
-
- /* Reading the POWER_DOWN register always returns 0 */
- if (reg0x3e != 0) {
- dprintk("Device doesn't look like L64781\n");
- return -ENODEV;
- }
-
- /* Turn the chip off */
- l64781_writereg (i2c, 0x3e, 0x5a);
-
- /* Responds to all reads with 0 */
- if (l64781_readreg(i2c, 0x1a) != 0) {
- dprintk("Read 1 returned unexpcted value\n");
- goto bailout;
- }
-
- /* Turn the chip on */
- l64781_writereg (i2c, 0x3e, 0xa5);
-
- /* Responds with register default value */
- if (l64781_readreg(i2c, 0x1a) != 0xa1) {
- dprintk("Read 2 returned unexpcted value\n");
- goto bailout;
- }
-
- state = kmalloc(sizeof(struct grundig_state), GFP_KERNEL);
- if (state == NULL) goto bailout;
- *data = state;
- state->first = 1;
-
- return dvb_register_frontend (grundig_29504_401_ioctl, i2c, state,
- &grundig_29504_401_info);
-
- bailout:
- l64781_writereg (i2c, 0x3e, reg0x3e); /* restore reg 0x3e */
- return -ENODEV;
-}
-
-
-
-static void l64781_detach (struct dvb_i2c_bus *i2c, void *data)
-{
- kfree(data);
- dvb_unregister_frontend (grundig_29504_401_ioctl, i2c);
-}
-
-
-static int __init init_grundig_29504_401 (void)
-{
- return dvb_register_i2c_device (THIS_MODULE,
- l64781_attach, l64781_detach);
-}
-
-
-static void __exit exit_grundig_29504_401 (void)
-{
- dvb_unregister_i2c_device (l64781_attach);
-}
-
-module_init(init_grundig_29504_401);
-module_exit(exit_grundig_29504_401);
-
-MODULE_PARM(debug,"i");
-MODULE_PARM_DESC(debug, "enable verbose debug messages");
-MODULE_DESCRIPTION("Grundig 29504-401 DVB-T Frontend");
-MODULE_AUTHOR("Holger Waechtler, Marko Kohtala");
-MODULE_LICENSE("GPL");
-
+++ /dev/null
-/*
- Driver for Grundig 29504-491, a Philips TDA8083 based QPSK Frontend
-
- Copyright (C) 2001 Convergence Integrated Media GmbH
-
- written by Ralph Metzler <ralph@convergence.de>
-
- adoption to the new DVB frontend API and diagnostic ioctl's
- by Holger Waechtler <holger@convergence.de>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
-*/
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/slab.h>
-
-#include "dvb_frontend.h"
-#include "dvb_functions.h"
-
-static int debug = 0;
-#define dprintk if (debug) printk
-
-
-static struct dvb_frontend_info grundig_29504_491_info = {
- .name = "Grundig 29504-491, (TDA8083 based)",
- .type = FE_QPSK,
- .frequency_min = 950000, /* FIXME: guessed! */
- .frequency_max = 1400000, /* FIXME: guessed! */
- .frequency_stepsize = 125, /* kHz for QPSK frontends */
-/* .frequency_tolerance = ???,*/
- .symbol_rate_min = 1000000, /* FIXME: guessed! */
- .symbol_rate_max = 45000000, /* FIXME: guessed! */
-/* .symbol_rate_tolerance = ???,*/
- .notifier_delay = 0,
- .caps = FE_CAN_INVERSION_AUTO |
- FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
- FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
- FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
- FE_CAN_QPSK | FE_CAN_MUTE_TS
-};
-
-
-
-static u8 tda8083_init_tab [] = {
- 0x04, 0x00, 0x4a, 0x79, 0x04, 0x00, 0xff, 0xea,
- 0x48, 0x42, 0x79, 0x60, 0x70, 0x52, 0x9a, 0x10,
- 0x0e, 0x10, 0xf2, 0xa7, 0x93, 0x0b, 0x05, 0xc8,
- 0x9d, 0x00, 0x42, 0x80, 0x00, 0x60, 0x40, 0x00,
- 0x00, 0x75, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00
-};
-
-
-
-static int tda8083_writereg (struct dvb_i2c_bus *i2c, u8 reg, u8 data)
-{
- int ret;
- u8 buf [] = { reg, data };
- struct i2c_msg msg = { .addr = 0x68, .flags = 0, .buf = buf, .len = 2 };
-
- ret = i2c->xfer (i2c, &msg, 1);
-
- if (ret != 1)
- dprintk ("%s: writereg error (reg %02x, ret == %i)\n",
- __FUNCTION__, reg, ret);
-
- return (ret != 1) ? -1 : 0;
-}
-
-
-static int tda8083_readregs (struct dvb_i2c_bus *i2c, u8 reg1, u8 *b, u8 len)
-{
- int ret;
- struct i2c_msg msg [] = { { .addr = 0x68, .flags = 0, .buf = ®1, .len = 1 },
- { .addr = 0x68, .flags = I2C_M_RD, .buf = b, .len = len } };
-
- ret = i2c->xfer (i2c, msg, 2);
-
- if (ret != 2)
- dprintk ("%s: readreg error (reg %02x, ret == %i)\n",
- __FUNCTION__, reg1, ret);
-
- return ret == 2 ? 0 : -1;
-}
-
-
-static inline u8 tda8083_readreg (struct dvb_i2c_bus *i2c, u8 reg)
-{
- u8 val;
-
- tda8083_readregs (i2c, reg, &val, 1);
-
- return val;
-}
-
-
-static int tsa5522_write (struct dvb_i2c_bus *i2c, u8 data [4])
-{
- int ret;
- struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = 4 };
-
- ret = i2c->xfer (i2c, &msg, 1);
-
- if (ret != 1)
- dprintk("%s: i/o error (ret == %i)\n", __FUNCTION__, ret);
-
- return (ret != 1) ? -1 : 0;
-}
-
-
-/**
- * set up the downconverter frequency divisor for a
- * reference clock comparision frequency of 125 kHz.
- */
-static int tsa5522_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq)
-{
- u32 div = freq / 125;
- u8 buf [4] = { (div >> 8) & 0x7f, div & 0xff, 0x8e, 0x00 };
-
- return tsa5522_write (i2c, buf);
-}
-
-
-static int tda8083_init (struct dvb_i2c_bus *i2c)
-{
- int i;
-
- dprintk("%s: init TDA8083\n", __FILE__);
-
- for (i=0; i<44; i++)
- tda8083_writereg (i2c, i, tda8083_init_tab[i]);
-
- return 0;
-}
-
-
-static int tda8083_set_inversion (struct dvb_i2c_bus *i2c, fe_spectral_inversion_t inversion)
-{
- /* XXX FIXME: implement other modes than FEC_AUTO */
- if (inversion == INVERSION_AUTO)
- return 0;
-
- return -EINVAL;
-}
-
-
-static int tda8083_set_fec (struct dvb_i2c_bus *i2c, fe_code_rate_t fec)
-{
- if (fec == FEC_AUTO)
- return tda8083_writereg (i2c, 0x07, 0xff);
-
- if (fec >= FEC_1_2 && fec <= FEC_8_9)
- return tda8083_writereg (i2c, 0x07, 1 << (FEC_8_9 - fec));
-
- return -EINVAL;
-}
-
-
-static fe_code_rate_t tda8083_get_fec (struct dvb_i2c_bus *i2c)
-{
- u8 index;
- static fe_code_rate_t fec_tab [] = { FEC_8_9, FEC_1_2, FEC_2_3, FEC_3_4,
- FEC_4_5, FEC_5_6, FEC_6_7, FEC_7_8 };
-
- index = tda8083_readreg(i2c, 0x0e) & 0x07;
-
- return fec_tab [index];
-}
-
-
-static int tda8083_set_symbolrate (struct dvb_i2c_bus *i2c, u32 srate)
-{
- u32 ratio;
- u32 tmp;
- u8 filter;
-
- if (srate > 32000000)
- srate = 32000000;
- if (srate < 500000)
- srate = 500000;
-
- filter = 0;
- if (srate < 24000000)
- filter = 2;
- if (srate < 16000000)
- filter = 3;
-
- tmp = 31250 << 16;
- ratio = tmp / srate;
-
- tmp = (tmp % srate) << 8;
- ratio = (ratio << 8) + tmp / srate;
-
- tmp = (tmp % srate) << 8;
- ratio = (ratio << 8) + tmp / srate;
-
- dprintk("tda8083: ratio == %08x\n", (unsigned int) ratio);
-
- tda8083_writereg (i2c, 0x05, filter);
- tda8083_writereg (i2c, 0x02, (ratio >> 16) & 0xff);
- tda8083_writereg (i2c, 0x03, (ratio >> 8) & 0xff);
- tda8083_writereg (i2c, 0x04, (ratio ) & 0xff);
-
- tda8083_writereg (i2c, 0x00, 0x3c);
- tda8083_writereg (i2c, 0x00, 0x04);
-
- return 1;
-}
-
-
-static void tda8083_wait_diseqc_fifo (struct dvb_i2c_bus *i2c, int timeout)
-{
- unsigned long start = jiffies;
-
- while (jiffies - start < timeout &&
- !(tda8083_readreg(i2c, 0x02) & 0x80))
- {
- dvb_delay(50);
- };
-}
-
-
-static int tda8083_send_diseqc_msg (struct dvb_i2c_bus *i2c,
- struct dvb_diseqc_master_cmd *m)
-{
- int i;
-
- tda8083_writereg (i2c, 0x29, (m->msg_len - 3) | (1 << 2)); /* enable */
-
- for (i=0; i<m->msg_len; i++)
- tda8083_writereg (i2c, 0x23 + i, m->msg[i]);
-
- tda8083_writereg (i2c, 0x29, (m->msg_len - 3) | (3 << 2)); /* send!! */
-
- tda8083_wait_diseqc_fifo (i2c, 100);
-
- return 0;
-}
-
-
-static int tda8083_send_diseqc_burst (struct dvb_i2c_bus *i2c, fe_sec_mini_cmd_t burst)
-{
- switch (burst) {
- case SEC_MINI_A:
- tda8083_writereg (i2c, 0x29, (5 << 2)); /* send burst A */
- break;
- case SEC_MINI_B:
- tda8083_writereg (i2c, 0x29, (7 << 2)); /* send B */
- break;
- default:
- return -EINVAL;
- };
-
- tda8083_wait_diseqc_fifo (i2c, 100);
-
- return 0;
-}
-
-
-static int tda8083_set_tone (struct dvb_i2c_bus *i2c, fe_sec_tone_mode_t tone)
-{
- tda8083_writereg (i2c, 0x26, 0xf1);
-
- switch (tone) {
- case SEC_TONE_OFF:
- return tda8083_writereg (i2c, 0x29, 0x00);
- case SEC_TONE_ON:
- return tda8083_writereg (i2c, 0x29, 0x80);
- default:
- return -EINVAL;
- };
-}
-
-
-static int tda8083_set_voltage (struct dvb_i2c_bus *i2c, fe_sec_voltage_t voltage)
-{
- switch (voltage) {
- case SEC_VOLTAGE_13:
- return tda8083_writereg (i2c, 0x20, 0x00);
- case SEC_VOLTAGE_18:
- return tda8083_writereg (i2c, 0x20, 0x11);
- default:
- return -EINVAL;
- };
-}
-
-
-static int grundig_29504_491_ioctl (struct dvb_frontend *fe, unsigned int cmd,
- void *arg)
-{
- struct dvb_i2c_bus *i2c = fe->i2c;
-
- switch (cmd) {
- case FE_GET_INFO:
- memcpy (arg, &grundig_29504_491_info,
- sizeof(struct dvb_frontend_info));
- break;
-
- case FE_READ_STATUS:
- {
- fe_status_t *status=(fe_status_t *) arg;
- u8 signal = ~tda8083_readreg (i2c, 0x01);
- u8 sync = tda8083_readreg (i2c, 0x02);
-
- *status = 0;
-
- if (signal > 10)
- *status |= FE_HAS_SIGNAL;
-
- if (sync & 0x01)
- *status |= FE_HAS_CARRIER;
-
- if (sync & 0x02)
- *status |= FE_HAS_VITERBI;
-
- if (sync & 0x10)
- *status |= FE_HAS_SYNC;
-
- if ((sync & 0x1f) == 0x1f)
- *status |= FE_HAS_LOCK;
-
- break;
- }
-
- case FE_READ_BER:
- *((u32*) arg) = 0; /* XXX FIXME: implement me!!! */
- return -EOPNOTSUPP;
-
- case FE_READ_SIGNAL_STRENGTH:
- {
- u8 signal = ~tda8083_readreg (i2c, 0x01);
- *((u16*) arg) = (signal << 8) | signal;
- break;
- }
- case FE_READ_SNR:
- {
- u8 snr = tda8083_readreg (i2c, 0x08);
- *((u16*) arg) = (snr << 8) | snr;
- break;
- }
- case FE_READ_UNCORRECTED_BLOCKS:
- *((u32*) arg) = 0; /* XXX FIXME: implement me!!! */
- return -EOPNOTSUPP;
-
-
- case FE_SET_FRONTEND:
- {
- struct dvb_frontend_parameters *p = arg;
-
- tsa5522_set_tv_freq (i2c, p->frequency);
- tda8083_set_inversion (i2c, p->inversion);
- tda8083_set_fec (i2c, p->u.qpsk.fec_inner);
- tda8083_set_symbolrate (i2c, p->u.qpsk.symbol_rate);
-
- tda8083_writereg (i2c, 0x00, 0x3c);
- tda8083_writereg (i2c, 0x00, 0x04);
-
- break;
- }
-
- case FE_GET_FRONTEND:
- {
- struct dvb_frontend_parameters *p = arg;
-
- /* FIXME: get symbolrate & frequency offset...*/
- /*p->frequency = ???;*/
- p->inversion = (tda8083_readreg (i2c, 0x0e) & 0x80) ?
- INVERSION_ON : INVERSION_OFF;
- p->u.qpsk.fec_inner = tda8083_get_fec (i2c);
- /*p->u.qpsk.symbol_rate = tda8083_get_symbolrate (i2c);*/
- break;
- }
-
- case FE_SLEEP:
- tda8083_writereg (i2c, 0x00, 0x02);
- break;
-
- case FE_INIT:
- tda8083_init (i2c);
- tda8083_writereg (i2c, 0x00, 0x3c);
- tda8083_writereg (i2c, 0x00, 0x04);
- break;
-
- case FE_DISEQC_SEND_MASTER_CMD:
- return tda8083_send_diseqc_msg (i2c, arg);
-
- case FE_DISEQC_SEND_BURST:
- tda8083_send_diseqc_burst (i2c, (fe_sec_mini_cmd_t) arg);
- tda8083_writereg (i2c, 0x00, 0x3c);
- tda8083_writereg (i2c, 0x00, 0x04);
-
- break;
-
- case FE_SET_TONE:
- tda8083_set_tone (i2c, (fe_sec_tone_mode_t) arg);
- tda8083_writereg (i2c, 0x00, 0x3c);
- tda8083_writereg (i2c, 0x00, 0x04);
- break;
-
- case FE_SET_VOLTAGE:
- tda8083_set_voltage (i2c, (fe_sec_voltage_t) arg);
- tda8083_writereg (i2c, 0x00, 0x3c);
- tda8083_writereg (i2c, 0x00, 0x04);
- break;
-
- default:
- return -EOPNOTSUPP;
- };
-
- return 0;
-}
-
-
-static int tda8083_attach (struct dvb_i2c_bus *i2c, void **data)
-{
- if ((tda8083_readreg (i2c, 0x00)) != 0x05)
- return -ENODEV;
-
- return dvb_register_frontend (grundig_29504_491_ioctl, i2c, NULL,
- &grundig_29504_491_info);
-}
-
-
-static void tda8083_detach (struct dvb_i2c_bus *i2c, void *data)
-{
- dvb_unregister_frontend (grundig_29504_491_ioctl, i2c);
-}
-
-
-static int __init init_tda8083 (void)
-{
- return dvb_register_i2c_device (THIS_MODULE,
- tda8083_attach, tda8083_detach);
-}
-
-
-static void __exit exit_tda8083 (void)
-{
- dvb_unregister_i2c_device (tda8083_attach);
-}
-
-module_init(init_tda8083);
-module_exit(exit_tda8083);
-
-MODULE_PARM(debug,"i");
-MODULE_DESCRIPTION("Grundig 29504-491 DVB frontend driver");
-MODULE_AUTHOR("Ralph Metzler, Holger Waechtler");
-MODULE_LICENSE("GPL");
-
+++ /dev/null
-#ifndef __SP887x_FIRM_H__
-#define __SP887x_FIRM_H__
-
-
-static const
-u8 sp887x_firm [16384] __devinitdata = {
- 0x00, 0xb9, 0x00, 0xb9, 0x0f, 0xf9, 0x1f, 0x5d, 0x0f, 0xf9, 0x1b, 0x67,
- 0x0f, 0xf9, 0x19, 0x2f, 0x0f, 0xf9, 0x00, 0x36, 0x0f, 0xf9, 0x00, 0x3c,
- 0x0f, 0xf5, 0x00, 0x3e, 0x0f, 0xf9, 0x03, 0x0c, 0x0f, 0xf9, 0x0c, 0x59,
- 0x0f, 0xf9, 0x15, 0xde, 0x0f, 0xf9, 0x19, 0x07, 0x0f, 0xf9, 0x08, 0x98,
- 0x0f, 0xf9, 0x08, 0x03, 0x0f, 0xf9, 0x00, 0x26, 0x0f, 0xf9, 0x03, 0x11,
- 0x0f, 0xf9, 0x1b, 0x47, 0x0f, 0xf9, 0x00, 0x76, 0x0f, 0xf9, 0x0a, 0xdd,
- 0x0f, 0xf9, 0x0d, 0x09, 0x0f, 0xc4, 0x01, 0x62, 0x0b, 0x21, 0x0f, 0x38,
- 0x00, 0x15, 0x0f, 0xf8, 0x00, 0x32, 0x09, 0xa1, 0x0f, 0xf9, 0x04, 0x2e,
- 0x0f, 0xf9, 0x04, 0x5e, 0x0f, 0xd9, 0x00, 0x2e, 0x09, 0xfb, 0x0f, 0x39,
- 0x0f, 0xf0, 0x02, 0x02, 0x0f, 0xc4, 0x01, 0x7a, 0x0f, 0xf9, 0x00, 0x42,
- 0x0f, 0xf0, 0x02, 0x05, 0x0f, 0xc4, 0x01, 0x7b, 0x0f, 0xf9, 0x00, 0x42,
- 0x0b, 0x21, 0x0f, 0xc4, 0x01, 0x7c, 0x0f, 0xd4, 0x02, 0xa0, 0x1f, 0xf8,
- 0x00, 0x53, 0x11, 0xa1, 0x0f, 0xd4, 0x00, 0xa0, 0x1f, 0xf8, 0x00, 0x53,
- 0x11, 0xe1, 0x08, 0x15, 0x1f, 0x39, 0x0f, 0x38, 0x0c, 0x32, 0x0b, 0x13,
- 0x00, 0x08, 0x10, 0x48, 0x0f, 0x38, 0x0c, 0x32, 0x00, 0x21, 0x07, 0x04,
- 0x0b, 0x94, 0x1b, 0x94, 0x1f, 0x39, 0x06, 0x45, 0x0b, 0xd5, 0x1f, 0xf9,
- 0x00, 0x65, 0x0b, 0xd5, 0x1f, 0xf9, 0x00, 0x65, 0x0f, 0x39, 0x07, 0x84,
- 0x0b, 0x27, 0x09, 0xa1, 0x06, 0xc5, 0x0b, 0x67, 0x09, 0x94, 0x1f, 0xf9,
- 0x00, 0x6f, 0x0f, 0x38, 0x09, 0x97, 0x06, 0x44, 0x07, 0x05, 0x0b, 0xa1,
- 0x0b, 0xd8, 0x0b, 0xa1, 0x0f, 0x38, 0x0b, 0xd2, 0x0f, 0xcb, 0x01, 0x39,
- 0x0f, 0xf5, 0x02, 0x47, 0x0f, 0xf4, 0x02, 0x5d, 0x06, 0x0b, 0x05, 0x85,
- 0x0b, 0xea, 0x0b, 0xe1, 0x02, 0xde, 0x09, 0xeb, 0x0f, 0xee, 0x01, 0xc0,
- 0x0f, 0xee, 0x0a, 0x01, 0x0f, 0xcf, 0x0c, 0x80, 0x0e, 0x2a, 0x0e, 0x6b,
- 0x0f, 0xec, 0x06, 0xbe, 0x09, 0x2d, 0x0d, 0xee, 0x0f, 0xc4, 0x00, 0x95,
- 0x12, 0x35, 0x0f, 0xe1, 0x0d, 0xbd, 0x0e, 0x18, 0x09, 0xec, 0x0f, 0xe1,
- 0x00, 0xcd, 0x0e, 0x51, 0x09, 0xed, 0x0d, 0xee, 0x0b, 0xe1, 0x02, 0xdf,
- 0x09, 0xe7, 0x0f, 0xe1, 0x05, 0x6d, 0x0e, 0x18, 0x09, 0xec, 0x0f, 0xe1,
- 0x02, 0x26, 0x0e, 0x51, 0x09, 0xed, 0x0d, 0xee, 0x12, 0x35, 0x0f, 0xe1,
- 0x0d, 0x03, 0x0f, 0xce, 0x03, 0xd2, 0x0e, 0x18, 0x09, 0xec, 0x0d, 0xa1,
- 0x0e, 0x51, 0x09, 0xed, 0x0d, 0xee, 0x0f, 0xcb, 0x0a, 0xe3, 0x0f, 0xe1,
- 0x08, 0x10, 0x0f, 0xce, 0x05, 0x88, 0x0e, 0x18, 0x09, 0xec, 0x0d, 0xa1,
- 0x0e, 0x51, 0x09, 0xed, 0x0d, 0xee, 0x0f, 0xca, 0x09, 0x00, 0x0f, 0xe1,
- 0x00, 0x38, 0x0f, 0xce, 0x07, 0xa7, 0x0e, 0x18, 0x09, 0xec, 0x0d, 0xa1,
- 0x0e, 0x51, 0x09, 0xed, 0x0d, 0xee, 0x0f, 0xe2, 0x00, 0x3f, 0x0f, 0xe1,
- 0x0a, 0xb1, 0x0f, 0xce, 0x0b, 0x89, 0x0e, 0x18, 0x09, 0xec, 0x0d, 0xa1,
- 0x0e, 0x51, 0x09, 0xed, 0x0d, 0xee, 0x0f, 0xc9, 0x0a, 0x75, 0x0f, 0xe1,
- 0x03, 0xf3, 0x0f, 0xce, 0x07, 0x15, 0x0e, 0x18, 0x09, 0xec, 0x0d, 0xa1,
- 0x0e, 0x53, 0x09, 0xed, 0x0d, 0xee, 0x0f, 0xcf, 0x07, 0xc0, 0x0d, 0xce,
- 0x1f, 0xce, 0x01, 0xc0, 0x00, 0x21, 0x0d, 0xae, 0x0c, 0x6e, 0x09, 0x96,
- 0x0f, 0xce, 0x05, 0x00, 0x0f, 0xcd, 0x05, 0x40, 0x0f, 0xcc, 0x03, 0x00,
- 0x09, 0xab, 0x00, 0x2a, 0x0d, 0xee, 0x1d, 0xae, 0x1e, 0x18, 0x19, 0xea,
- 0x1e, 0x58, 0x19, 0xeb, 0x1d, 0x6e, 0x1e, 0x18, 0x19, 0xec, 0x1e, 0x51,
- 0x19, 0xed, 0x1d, 0x2e, 0x0c, 0xee, 0x0f, 0xe1, 0x1f, 0xe7, 0x0c, 0xae,
- 0x05, 0x84, 0x0e, 0x02, 0x0e, 0x42, 0x0e, 0xa4, 0x09, 0x99, 0x09, 0xe1,
- 0x02, 0xdc, 0x12, 0xdd, 0x0f, 0x38, 0x09, 0xc2, 0x0f, 0xfb, 0x00, 0x7d,
- 0x03, 0x37, 0x0f, 0xc4, 0x00, 0x9e, 0x05, 0xb7, 0x0f, 0xf5, 0x01, 0x39,
- 0x0f, 0xfb, 0x00, 0x7d, 0x03, 0x37, 0x0f, 0xc4, 0x00, 0xa1, 0x05, 0xb7,
- 0x0f, 0xf5, 0x01, 0x39, 0x05, 0x84, 0x0b, 0xaa, 0x0b, 0xab, 0x0f, 0xef,
- 0x01, 0xc0, 0x0b, 0x88, 0x0c, 0x27, 0x09, 0xa6, 0x18, 0xb4, 0x05, 0x84,
- 0x09, 0xa1, 0x0f, 0xd9, 0x0a, 0x69, 0x09, 0xee, 0x0f, 0xd7, 0x1f, 0xd0,
- 0x18, 0xb5, 0x02, 0x97, 0x0c, 0x21, 0x1f, 0xf8, 0x01, 0x36, 0x02, 0xde,
- 0x0f, 0xc4, 0x06, 0x28, 0x02, 0x34, 0x19, 0x44, 0x1f, 0xf9, 0x01, 0x45,
- 0x0f, 0xee, 0x05, 0x00, 0x00, 0x21, 0x0e, 0x18, 0x09, 0xea, 0x0e, 0x58,
- 0x09, 0xeb, 0x0f, 0xee, 0x05, 0x40, 0x0e, 0x18, 0x0f, 0xf8, 0x01, 0x4a,
- 0x09, 0xc9, 0x0e, 0x09, 0x0f, 0xee, 0x05, 0x00, 0x0e, 0x2a, 0x0e, 0x6b,
- 0x0f, 0xcf, 0x0c, 0x80, 0x0f, 0xec, 0x0e, 0x2d, 0x00, 0x2d, 0x0d, 0xee,
- 0x0f, 0xe1, 0x01, 0xa4, 0x01, 0x4e, 0x0e, 0x20, 0x09, 0xec, 0x0d, 0xa1,
- 0x0e, 0x59, 0x09, 0xed, 0x0d, 0xee, 0x0f, 0xe1, 0x0a, 0x35, 0x0f, 0xce,
- 0x00, 0x27, 0x0e, 0x20, 0x09, 0xec, 0x0d, 0xa1, 0x0e, 0x59, 0x09, 0xed,
- 0x0d, 0xee, 0x0f, 0xe1, 0x04, 0x34, 0x0f, 0xce, 0x00, 0xe3, 0x0e, 0x20,
- 0x09, 0xec, 0x0d, 0xa1, 0x0e, 0x59, 0x09, 0xed, 0x0d, 0xee, 0x0f, 0xe1,
- 0x0f, 0xb1, 0x0f, 0xce, 0x03, 0xd7, 0x0e, 0x20, 0x09, 0xec, 0x0d, 0xa1,
- 0x0e, 0x59, 0x09, 0xed, 0x0d, 0xee, 0x0f, 0xe1, 0x02, 0x15, 0x0f, 0xce,
- 0x0b, 0x17, 0x0e, 0x20, 0x09, 0xec, 0x0d, 0xa1, 0x0e, 0x59, 0x09, 0xed,
- 0x0d, 0xee, 0x0f, 0xcf, 0x0a, 0xbf, 0x0f, 0xce, 0x09, 0x00, 0x0d, 0xee,
- 0x0c, 0x61, 0x0d, 0xae, 0x0e, 0x02, 0x0e, 0x42, 0x0e, 0x99, 0x09, 0xe1,
- 0x12, 0xdf, 0x12, 0x34, 0x19, 0x44, 0x02, 0xdc, 0x0f, 0x38, 0x09, 0xc2,
- 0x09, 0x44, 0x0f, 0xc2, 0x0f, 0xff, 0x0f, 0xc2, 0x0f, 0xff, 0x0f, 0xc2,
- 0x03, 0xff, 0x0f, 0xc4, 0x00, 0x95, 0x0f, 0xc2, 0x0f, 0xff, 0x0f, 0xc2,
- 0x0f, 0xff, 0x0f, 0xc2, 0x0b, 0xff, 0x0f, 0xc4, 0x00, 0x98, 0x00, 0x02,
- 0x0f, 0xc2, 0x08, 0x00, 0x0f, 0xc2, 0x04, 0x00, 0x0f, 0xc4, 0x00, 0x9b,
- 0x00, 0x02, 0x0f, 0xc2, 0x08, 0x00, 0x0f, 0xc2, 0x0c, 0x00, 0x0f, 0xc4,
- 0x00, 0x9e, 0x0f, 0xc2, 0x08, 0xc1, 0x0f, 0xc2, 0x0c, 0x0a, 0x00, 0x42,
- 0x0f, 0xc4, 0x00, 0xa1, 0x0f, 0xc2, 0x08, 0xc1, 0x0f, 0xc2, 0x0c, 0x0a,
- 0x00, 0x82, 0x0f, 0xc4, 0x00, 0xa4, 0x00, 0x02, 0x0f, 0xc2, 0x0a, 0x00,
- 0x00, 0xc2, 0x0f, 0xc4, 0x00, 0xa7, 0x00, 0x02, 0x0f, 0xc2, 0x0c, 0x80,
- 0x0f, 0xf4, 0x04, 0xe0, 0x01, 0x82, 0x0f, 0xc4, 0x01, 0x5d, 0x0b, 0x3b,
- 0x0f, 0x39, 0x04, 0x04, 0x0b, 0x21, 0x0f, 0xc4, 0x01, 0x5c, 0x0f, 0xc5,
- 0x07, 0x3d, 0x0b, 0x01, 0x0b, 0x14, 0x1f, 0x39, 0x00, 0x14, 0x09, 0xc0,
- 0x0f, 0xc8, 0x04, 0x18, 0x00, 0xd4, 0x1f, 0xc8, 0x1b, 0xb6, 0x00, 0x54,
- 0x1f, 0xc8, 0x1c, 0xa7, 0x01, 0x14, 0x1f, 0xc8, 0x1c, 0x9f, 0x00, 0x94,
- 0x1f, 0xc4, 0x01, 0x5e, 0x1b, 0x08, 0x02, 0x94, 0x1f, 0xc8, 0x04, 0x24,
- 0x02, 0xd4, 0x1f, 0xc8, 0x04, 0x26, 0x03, 0x14, 0x1f, 0xc8, 0x04, 0x28,
- 0x03, 0x54, 0x1f, 0xc8, 0x04, 0x2a, 0x03, 0x94, 0x1f, 0xc8, 0x04, 0x2c,
- 0x03, 0xd4, 0x1f, 0xc8, 0x04, 0x2e, 0x05, 0x14, 0x1f, 0xc8, 0x04, 0x30,
- 0x0f, 0xd4, 0x00, 0x28, 0x1f, 0xc8, 0x08, 0xeb, 0x0f, 0xd4, 0x00, 0x29,
- 0x1f, 0xc8, 0x09, 0x49, 0x0f, 0xd4, 0x00, 0x2a, 0x1f, 0xc8, 0x09, 0xe6,
- 0x0f, 0xd4, 0x00, 0x2b, 0x1f, 0xc8, 0x0b, 0x54, 0x0f, 0xd4, 0x00, 0x32,
- 0x1f, 0xc8, 0x0b, 0x87, 0x0f, 0xd4, 0x00, 0x3c, 0x1f, 0xc8, 0x0b, 0xcf,
- 0x0f, 0xd4, 0x00, 0x46, 0x1f, 0xc8, 0x11, 0x95, 0x0f, 0xd4, 0x00, 0x47,
- 0x1f, 0xc8, 0x11, 0xb9, 0x0f, 0xd4, 0x00, 0x3f, 0x1f, 0xc8, 0x09, 0x85,
- 0x0f, 0xd4, 0x00, 0x40, 0x1f, 0xc8, 0x09, 0x89, 0x0f, 0xd4, 0x00, 0x41,
- 0x1f, 0xc8, 0x09, 0xcb, 0x02, 0x14, 0x1f, 0xc8, 0x04, 0x18, 0x0f, 0xd4,
- 0x00, 0x50, 0x1f, 0xc8, 0x0e, 0xd9, 0x0f, 0xc4, 0x01, 0x5d, 0x0f, 0x38,
- 0x0c, 0x00, 0x0f, 0xc8, 0x01, 0x00, 0x0f, 0xf7, 0x05, 0x82, 0x0f, 0xc4,
- 0x01, 0x8b, 0x00, 0x00, 0x0f, 0xc4, 0x01, 0x8a, 0x00, 0x00, 0x0f, 0xf1,
- 0x03, 0x39, 0x0f, 0xc5, 0x01, 0x89, 0x0f, 0xc4, 0x01, 0x8e, 0x0b, 0x21,
- 0x0a, 0x48, 0x0c, 0x13, 0x1f, 0xf8, 0x02, 0x5f, 0x0c, 0x01, 0x0f, 0xc4,
- 0x01, 0x90, 0x00, 0x21, 0x0b, 0x15, 0x1f, 0xc5, 0x01, 0x8b, 0x1c, 0x01,
- 0x1f, 0xc5, 0x01, 0x8a, 0x1b, 0x3a, 0x1b, 0x01, 0x0f, 0xf1, 0x03, 0x39,
- 0x0f, 0xc4, 0x01, 0x8e, 0x0b, 0x21, 0x0a, 0x48, 0x0c, 0x12, 0x1f, 0xf9,
- 0x02, 0x4b, 0x0f, 0xc4, 0x01, 0x8c, 0x0f, 0xf6, 0x05, 0x9d, 0x0c, 0x00,
- 0x0f, 0xf1, 0x03, 0x39, 0x0f, 0xc4, 0x01, 0x8d, 0x1f, 0x38, 0x0a, 0x40,
- 0x0f, 0xc5, 0x01, 0x88, 0x0b, 0x01, 0x0f, 0xc4, 0x01, 0x89, 0x0f, 0xc5,
- 0x07, 0x3b, 0x0b, 0x01, 0x0f, 0xc4, 0x01, 0x8b, 0x0f, 0xc5, 0x07, 0x3c,
- 0x0b, 0x01, 0x0f, 0xc4, 0x01, 0x8c, 0x0f, 0xc5, 0x01, 0x87, 0x0b, 0x01,
- 0x0f, 0xc4, 0x01, 0x8a, 0x0f, 0xc5, 0x01, 0x86, 0x0b, 0x01, 0x0f, 0xc4,
- 0x01, 0x6a, 0x0f, 0xc5, 0x01, 0x85, 0x0b, 0x01, 0x0f, 0xc4, 0x01, 0x6b,
- 0x0f, 0xc5, 0x01, 0x84, 0x0f, 0x38, 0x0b, 0x01, 0x0f, 0xc4, 0x01, 0x90,
- 0x0c, 0x40, 0x0c, 0x21, 0x0f, 0xd9, 0x00, 0x67, 0x09, 0xc8, 0x00, 0xb6,
- 0x00, 0x09, 0x0f, 0xf7, 0x04, 0x66, 0x0f, 0xc4, 0x06, 0x96, 0x0f, 0xc5,
- 0x06, 0x2b, 0x0f, 0xf7, 0x02, 0x74, 0x07, 0x04, 0x00, 0x02, 0x0f, 0xc2,
- 0x0c, 0x00, 0x0f, 0xf6, 0x02, 0x70, 0x01, 0x02, 0x05, 0x37, 0x0f, 0xf7,
- 0x04, 0x6f, 0x0f, 0xf7, 0x02, 0x09, 0x0f, 0xf7, 0x01, 0x33, 0x0f, 0xc4,
- 0x01, 0x8f, 0x07, 0x36, 0x0c, 0x00, 0x0f, 0xe1, 0x08, 0x0f, 0x1f, 0xe1,
- 0x02, 0x0f, 0x0c, 0x11, 0x0f, 0xc4, 0x01, 0x8e, 0x0f, 0x38, 0x09, 0xc0,
- 0x0f, 0xf0, 0x0f, 0x10, 0x0c, 0x32, 0x0f, 0xc4, 0x07, 0xc0, 0x0f, 0x38,
- 0x0c, 0x00, 0x0f, 0xf1, 0x0f, 0x11, 0x00, 0x08, 0x0a, 0x61, 0x00, 0x15,
- 0x11, 0x13, 0x10, 0x49, 0x10, 0x48, 0x0f, 0xf1, 0x0f, 0x13, 0x0f, 0xc4,
- 0x07, 0xbc, 0x0b, 0x22, 0x00, 0x00, 0x0a, 0x65, 0x09, 0xb2, 0x00, 0x21,
- 0x09, 0x95, 0x1c, 0x62, 0x10, 0xa5, 0x19, 0x89, 0x10, 0x48, 0x0c, 0x15,
- 0x1f, 0xf0, 0x02, 0x04, 0x0c, 0x72, 0x0f, 0xf0, 0x02, 0x03, 0x00, 0x32,
- 0x0f, 0x38, 0x00, 0x72, 0x0f, 0xfa, 0x02, 0xb8, 0x00, 0xc8, 0x0f, 0xf9,
- 0x02, 0xbf, 0x0f, 0xc4, 0x07, 0xba, 0x0f, 0xc0, 0x00, 0x40, 0x0f, 0xc4,
- 0x07, 0xbb, 0x00, 0x40, 0x0f, 0xc4, 0x07, 0xb8, 0x0f, 0xc0, 0x04, 0x00,
- 0x0f, 0xc4, 0x07, 0xb9, 0x0f, 0xc0, 0x08, 0x00, 0x0f, 0xc4, 0x07, 0xbd,
- 0x0f, 0xc0, 0x0f, 0xff, 0x0f, 0xc4, 0x07, 0xdd, 0x00, 0x00, 0x0f, 0xc4,
- 0x07, 0xc2, 0x0f, 0x38, 0x00, 0x40, 0x0f, 0xf8, 0x03, 0x03, 0x0b, 0x22,
- 0x0f, 0xf8, 0x03, 0x03, 0x0c, 0x22, 0x0f, 0xc4, 0x07, 0xbd, 0x0b, 0x24,
- 0x09, 0xa2, 0x0f, 0xc4, 0x07, 0xbc, 0x0b, 0x25, 0x0f, 0x38, 0x09, 0x80,
- 0x0f, 0xfa, 0x02, 0xb8, 0x00, 0x48, 0x0f, 0xf9, 0x02, 0xbf, 0x0f, 0xf0,
- 0x0f, 0x10, 0x0c, 0x32, 0x0a, 0xe1, 0x0f, 0xc5, 0x07, 0xc3, 0x0f, 0xf1,
- 0x0f, 0x10, 0x0a, 0x7f, 0x0f, 0xf0, 0x0f, 0x12, 0x0b, 0xf2, 0x0a, 0xd5,
- 0x1f, 0xf9, 0x03, 0x1a, 0x03, 0xb9, 0x0a, 0x44, 0x0f, 0xf1, 0x0f, 0x12,
- 0x0a, 0x7e, 0x0f, 0xfd, 0x03, 0x28, 0x00, 0x3f, 0x0b, 0x83, 0x07, 0x39,
- 0x0a, 0x45, 0x0f, 0xf1, 0x0f, 0x12, 0x0a, 0x7e, 0x0f, 0xfd, 0x03, 0x33,
- 0x00, 0x3f, 0x0f, 0xf1, 0x0f, 0x12, 0x0a, 0x43, 0x03, 0xb9, 0x0f, 0xc4,
- 0x07, 0x6e, 0x00, 0x00, 0x04, 0x04, 0x00, 0x40, 0x0f, 0xc4, 0x07, 0xdd,
- 0x00, 0x00, 0x0f, 0xc4, 0x07, 0xc2, 0x00, 0x40, 0x0f, 0xf0, 0x0f, 0x17,
- 0x03, 0xb8, 0x00, 0x32, 0x04, 0x04, 0x00, 0xc0, 0x0f, 0xc4, 0x07, 0xdd,
- 0x00, 0x40, 0x0f, 0xc4, 0x07, 0xc2, 0x03, 0xb8, 0x00, 0x40, 0x0f, 0xc4,
- 0x07, 0x6e, 0x00, 0x00, 0x04, 0x04, 0x01, 0x00, 0x0f, 0xc4, 0x07, 0xdd,
- 0x00, 0x00, 0x0f, 0xc4, 0x07, 0xc2, 0x03, 0xb8, 0x00, 0x40, 0x04, 0x04,
- 0x02, 0x00, 0x0f, 0xc4, 0x07, 0x6e, 0x00, 0x00, 0x0f, 0xc4, 0x07, 0xdd,
- 0x03, 0xb8, 0x00, 0x00, 0x0f, 0xc4, 0x01, 0x30, 0x0b, 0x83, 0x0b, 0x83,
- 0x0f, 0xc4, 0x01, 0x32, 0x0b, 0x83, 0x07, 0x38, 0x0b, 0x83, 0x0f, 0xc4,
- 0x06, 0x94, 0x0b, 0x83, 0x0b, 0x83, 0x0f, 0xc4, 0x01, 0x6c, 0x07, 0x38,
- 0x0b, 0x83, 0x0f, 0xc4, 0x01, 0x38, 0x0b, 0x83, 0x0b, 0x83, 0x0f, 0xc4,
- 0x01, 0x3a, 0x0b, 0x83, 0x0b, 0x83, 0x0f, 0xc4, 0x01, 0x3c, 0x0b, 0x83,
- 0x0b, 0x83, 0x0f, 0xc4, 0x01, 0x76, 0x0b, 0x83, 0x0f, 0xc4, 0x01, 0x77,
- 0x07, 0x38, 0x0b, 0x83, 0x0f, 0xc4, 0x01, 0x78, 0x0b, 0x83, 0x0f, 0xc4,
- 0x01, 0x79, 0x07, 0x38, 0x0b, 0x83, 0x0f, 0xc4, 0x05, 0xe6, 0x0b, 0x83,
- 0x0b, 0x83, 0x0f, 0xc4, 0x01, 0x40, 0x0b, 0x83, 0x07, 0x38, 0x0b, 0x83,
- 0x0f, 0xf1, 0x0f, 0x11, 0x0a, 0x48, 0x0c, 0x21, 0x02, 0x13, 0x1f, 0xf9,
- 0x02, 0xbf, 0x0f, 0xf1, 0x0f, 0x10, 0x00, 0x09, 0x02, 0x54, 0x13, 0x89,
- 0x02, 0xd4, 0x1f, 0xc9, 0x03, 0x35, 0x03, 0x54, 0x1f, 0xc9, 0x03, 0x44,
- 0x03, 0xd4, 0x1f, 0xc9, 0x03, 0x59, 0x0f, 0xd4, 0x00, 0x59, 0x1f, 0xc9,
- 0x03, 0x4d, 0x0f, 0xd4, 0x00, 0x41, 0x1f, 0xc9, 0x03, 0x21, 0x0f, 0xd4,
- 0x00, 0x49, 0x1f, 0xc9, 0x03, 0x2a, 0x0f, 0xd4, 0x00, 0x71, 0x1f, 0xc9,
- 0x03, 0x62, 0x0f, 0xd4, 0x00, 0x73, 0x1f, 0xc9, 0x03, 0x6b, 0x0f, 0xd4,
- 0x00, 0x80, 0x1f, 0xc9, 0x03, 0x73, 0x0f, 0xd4, 0x00, 0x81, 0x1f, 0xc9,
- 0x03, 0x86, 0x0f, 0xd4, 0x00, 0x82, 0x1f, 0xc9, 0x03, 0x8d, 0x0c, 0x61,
- 0x00, 0x15, 0x1f, 0xf1, 0x0f, 0x12, 0x1f, 0xc5, 0x07, 0xc3, 0x1c, 0x79,
- 0x0f, 0xf9, 0x02, 0xde, 0x0f, 0xfb, 0x03, 0x96, 0x0f, 0xc4, 0x07, 0xdd,
- 0x0b, 0x21, 0x00, 0x15, 0x1f, 0xf9, 0x03, 0xd4, 0x0f, 0x39, 0x0f, 0xc8,
- 0x00, 0x3c, 0x03, 0x3b, 0x1f, 0x39, 0x0f, 0xf1, 0x0a, 0x07, 0x00, 0x21,
- 0x0f, 0xc4, 0x01, 0x91, 0x0b, 0x08, 0x0f, 0xc4, 0x01, 0x92, 0x0b, 0x15,
- 0x1b, 0x08, 0x0c, 0x14, 0x1f, 0x39, 0x0c, 0x21, 0x0a, 0x55, 0x1f, 0xc4,
- 0x01, 0x93, 0x1c, 0x00, 0x1f, 0xc8, 0x03, 0xf6, 0x15, 0x3b, 0x0f, 0x39,
- 0x0f, 0xc4, 0x01, 0x93, 0x0b, 0x0f, 0x0d, 0xc8, 0x00, 0xb6, 0x00, 0x09,
- 0x05, 0x37, 0x0d, 0xe1, 0x02, 0x19, 0x09, 0xc8, 0x00, 0xb6, 0x00, 0x09,
- 0x0f, 0xf7, 0x02, 0x70, 0x0f, 0xc4, 0x00, 0xad, 0x00, 0x37, 0x01, 0xbb,
- 0x0f, 0xc8, 0x00, 0x60, 0x00, 0xb6, 0x00, 0x09, 0x0f, 0xc4, 0x00, 0xad,
- 0x0f, 0xf7, 0x02, 0x81, 0x0f, 0xf0, 0x0a, 0x07, 0x0f, 0xc4, 0x01, 0x93,
- 0x0b, 0x32, 0x0f, 0xc4, 0x00, 0xaa, 0x00, 0x35, 0x02, 0x3a, 0x00, 0x08,
- 0x02, 0xba, 0x00, 0x48, 0x0f, 0xfb, 0x03, 0xd4, 0x0f, 0xf6, 0x00, 0x3a,
- 0x02, 0x08, 0x1f, 0xf9, 0x04, 0x1c, 0x0f, 0x39, 0x0f, 0xf5, 0x05, 0xc7,
- 0x0f, 0xf5, 0x06, 0x07, 0x0f, 0xf5, 0x06, 0x14, 0x0f, 0xf5, 0x06, 0x79,
- 0x0f, 0xf5, 0x06, 0x98, 0x0f, 0xf5, 0x06, 0xbc, 0x0f, 0xc4, 0x06, 0x8f,
- 0x0b, 0x88, 0x00, 0xb6, 0x0b, 0x89, 0x03, 0x37, 0x02, 0x36, 0x04, 0xc4,
- 0x06, 0xbb, 0x1f, 0xf7, 0x00, 0x8f, 0x0f, 0xfb, 0x00, 0x7a, 0x0f, 0xc4,
- 0x00, 0xb0, 0x00, 0x37, 0x04, 0x44, 0x0f, 0xc5, 0x01, 0x94, 0x0b, 0x01,
- 0x0f, 0xf7, 0x06, 0xdc, 0x0f, 0xc4, 0x00, 0xb0, 0x02, 0x37, 0x04, 0x44,
- 0x0b, 0x21, 0x0f, 0xc4, 0x01, 0x94, 0x0b, 0x11, 0x01, 0x36, 0x09, 0xc8,
- 0x03, 0xb7, 0x0f, 0xc4, 0x06, 0x8f, 0x0c, 0x02, 0x03, 0x36, 0x0c, 0x42,
- 0x00, 0xb7, 0x05, 0x37, 0x04, 0x37, 0x06, 0xbb, 0x1f, 0xf7, 0x00, 0x8f,
- 0x00, 0x34, 0x04, 0xc4, 0x01, 0x38, 0x00, 0x48, 0x07, 0x37, 0x0f, 0xc4,
- 0x02, 0x0e, 0x0f, 0xc0, 0x08, 0xe1, 0x1f, 0xc0, 0x02, 0x39, 0x0f, 0xc4,
- 0x07, 0x38, 0x1f, 0xc4, 0x07, 0x37, 0x0f, 0xc5, 0x01, 0x95, 0x0b, 0x01,
- 0x0f, 0xc4, 0x07, 0x2e, 0x1f, 0xc4, 0x07, 0x2b, 0x02, 0x37, 0x0f, 0xc4,
- 0x05, 0xf2, 0x0b, 0x21, 0x01, 0x9e, 0x0f, 0xc5, 0x01, 0x96, 0x0f, 0xc4,
- 0x05, 0xea, 0x0b, 0x01, 0x1f, 0xc4, 0x05, 0xf0, 0x1b, 0x01, 0x0b, 0x61,
- 0x0f, 0xc4, 0x06, 0x2b, 0x00, 0x14, 0x1f, 0xc4, 0x07, 0x31, 0x00, 0x54,
- 0x1f, 0xc4, 0x07, 0x34, 0x06, 0xb7, 0x0f, 0xc4, 0x00, 0xb3, 0x00, 0x37,
- 0x0f, 0xc4, 0x07, 0x39, 0x0b, 0x2a, 0x1f, 0xc4, 0x06, 0x07, 0x1b, 0x21,
- 0x10, 0xd3, 0x11, 0x2a, 0x0f, 0xec, 0x00, 0x2b, 0x0f, 0xee, 0x0d, 0x40,
- 0x0e, 0x21, 0x0f, 0xd9, 0x02, 0xd3, 0x0f, 0xc4, 0x02, 0x0a, 0x0f, 0xc2,
- 0x02, 0xd3, 0x09, 0xc2, 0x0f, 0xc2, 0x02, 0xc7, 0x0f, 0xc2, 0x02, 0xd3,
- 0x0f, 0xfb, 0x08, 0x15, 0x0f, 0xc8, 0x04, 0x60, 0x0f, 0xc9, 0x04, 0xae,
- 0x0f, 0xfb, 0x02, 0x8c, 0x0f, 0xf9, 0x07, 0xed, 0x00, 0x21, 0x0f, 0xc4,
- 0x04, 0x2b, 0x0b, 0x14, 0x1f, 0xc0, 0x04, 0xb6, 0x0b, 0x3b, 0x0f, 0x39,
- 0x0f, 0xc0, 0x04, 0xe6, 0x0f, 0xc4, 0x04, 0x40, 0x0f, 0xc8, 0x04, 0x50,
- 0x0f, 0xf7, 0x00, 0x71, 0x0f, 0xc5, 0x04, 0x2d, 0x0f, 0xfb, 0x08, 0x4d,
- 0x0f, 0xfb, 0x08, 0x4d, 0x0f, 0xc4, 0x02, 0x10, 0x0b, 0x21, 0x00, 0x15,
- 0x1f, 0xfa, 0x08, 0x4d, 0x00, 0x01, 0x0f, 0xc4, 0x02, 0x0e, 0x0b, 0x8f,
- 0x00, 0x61, 0x0f, 0xc5, 0x04, 0x2c, 0x0b, 0x01, 0x0b, 0x19, 0x09, 0xc0,
- 0x0f, 0xc5, 0x02, 0x10, 0x00, 0x41, 0x09, 0xe1, 0x0d, 0xd3, 0x1f, 0xf9,
- 0x08, 0x82, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x0f, 0xfa, 0x08, 0x3d,
- 0x00, 0x00, 0x0f, 0xc4, 0x04, 0x2b, 0x0f, 0xc0, 0x06, 0x8f, 0x0f, 0x39,
- 0x0f, 0xc0, 0x04, 0xf3, 0x0f, 0xc4, 0x01, 0x82, 0x0f, 0xc5, 0x04, 0x33,
- 0x0b, 0x01, 0x0f, 0xcf, 0x04, 0x34, 0x0f, 0xfb, 0x08, 0x5f, 0x0f, 0xf9,
- 0x08, 0x82, 0x0f, 0xc5, 0x01, 0x82, 0x0b, 0x4f, 0x0f, 0xc5, 0x04, 0x33,
- 0x0b, 0x61, 0x0d, 0xd4, 0x1f, 0x38, 0x0d, 0xc1, 0x0f, 0xc0, 0x05, 0x04,
- 0x0f, 0xcf, 0x04, 0x50, 0x0f, 0xfb, 0x08, 0x5f, 0x0f, 0xf9, 0x08, 0x82,
- 0x0f, 0xc0, 0x05, 0x10, 0x0f, 0xc4, 0x04, 0x50, 0x0f, 0xcf, 0x04, 0x34,
- 0x04, 0x0e, 0x0f, 0xcd, 0x04, 0x56, 0x0f, 0xcc, 0x00, 0xc4, 0x05, 0xb9,
- 0x0f, 0xc0, 0x05, 0x1c, 0x0f, 0xc4, 0x04, 0x53, 0x0f, 0xcf, 0x04, 0x37,
- 0x04, 0x0e, 0x0f, 0xcd, 0x04, 0x59, 0x0f, 0xcc, 0x00, 0xc4, 0x05, 0xb9,
- 0x0f, 0xc0, 0x05, 0x27, 0x0f, 0xc4, 0x04, 0x50, 0x0a, 0x8f, 0x0f, 0xce,
- 0x01, 0x39, 0x0f, 0xcd, 0x04, 0x46, 0x05, 0xb8, 0x06, 0x0c, 0x0f, 0xc0,
- 0x05, 0x32, 0x0f, 0xc4, 0x04, 0x53, 0x0a, 0x8f, 0x0f, 0xce, 0x01, 0x39,
- 0x0f, 0xcd, 0x04, 0x46, 0x05, 0xb8, 0x06, 0x0c, 0x0f, 0xc0, 0x05, 0x3d,
- 0x0f, 0xc4, 0x04, 0x56, 0x0a, 0x8f, 0x0f, 0xce, 0x01, 0x39, 0x0f, 0xcd,
- 0x04, 0x49, 0x05, 0xb8, 0x06, 0x0c, 0x0f, 0xc0, 0x05, 0x56, 0x0f, 0xc5,
- 0x04, 0x4f, 0x0b, 0x61, 0x00, 0x15, 0x1f, 0xc0, 0x05, 0x81, 0x0f, 0xc5,
- 0x04, 0x2c, 0x0b, 0x62, 0x00, 0xe4, 0x09, 0xa1, 0x00, 0x15, 0x1f, 0xc0,
- 0x05, 0x6b, 0x0f, 0xc4, 0x04, 0x59, 0x0a, 0x8f, 0x0f, 0xce, 0x01, 0x39,
- 0x0f, 0xcd, 0x04, 0x49, 0x05, 0xb8, 0x06, 0x0c, 0x0f, 0xc5, 0x04, 0x4f,
- 0x0b, 0x61, 0x00, 0x59, 0x09, 0xc1, 0x0f, 0xc5, 0x01, 0x95, 0x0b, 0x52,
- 0x0f, 0xc0, 0x04, 0xf3, 0x1f, 0xc0, 0x05, 0xdf, 0x0f, 0xc4, 0x04, 0x50,
- 0x0f, 0xc5, 0x04, 0x34, 0x03, 0x3e, 0x0f, 0xf7, 0x00, 0x2d, 0x0f, 0xf9,
- 0x08, 0x82, 0x0f, 0xc0, 0x05, 0x76, 0x0f, 0xc4, 0x04, 0x56, 0x0f, 0xcf,
- 0x04, 0x40, 0x06, 0x0e, 0x0d, 0xcd, 0x0f, 0xcc, 0x00, 0xc4, 0x05, 0xb9,
- 0x0f, 0xc0, 0x05, 0x56, 0x0f, 0xc4, 0x04, 0x59, 0x0f, 0xcf, 0x04, 0x43,
- 0x06, 0x0e, 0x0d, 0xcd, 0x0f, 0xcc, 0x00, 0xc4, 0x05, 0xb9, 0x0f, 0xc0,
- 0x05, 0x8e, 0x0f, 0xc4, 0x04, 0x56, 0x0f, 0xcf, 0x04, 0x3a, 0x0f, 0xce,
- 0x01, 0x39, 0x0f, 0xcd, 0x04, 0x5c, 0x0f, 0xcc, 0x00, 0xc4, 0x05, 0xb9,
- 0x0f, 0xc0, 0x05, 0x9a, 0x0f, 0xc4, 0x04, 0x59, 0x0f, 0xcf, 0x04, 0x3d,
- 0x0f, 0xce, 0x01, 0x39, 0x0f, 0xcd, 0x04, 0x5c, 0x05, 0xb8, 0x06, 0x0c,
- 0x0f, 0xc0, 0x05, 0xa7, 0x0f, 0xc4, 0x04, 0x59, 0x0f, 0xcf, 0x04, 0x3a,
- 0x0f, 0xce, 0x01, 0x39, 0x0f, 0xcd, 0x04, 0x5f, 0x0f, 0xcc, 0x00, 0xc4,
- 0x05, 0xb9, 0x0f, 0xc0, 0x05, 0xb3, 0x0f, 0xc4, 0x04, 0x56, 0x0f, 0xcf,
- 0x04, 0x3d, 0x0f, 0xce, 0x01, 0x39, 0x0f, 0xcd, 0x04, 0x5f, 0x05, 0xb8,
- 0x04, 0x0c, 0x0f, 0xc0, 0x05, 0xbe, 0x0f, 0xc4, 0x04, 0x5c, 0x0a, 0x8f,
- 0x0f, 0xce, 0x01, 0x39, 0x0f, 0xcd, 0x04, 0x4c, 0x05, 0xb8, 0x06, 0x0c,
- 0x0f, 0xc0, 0x05, 0xc9, 0x0f, 0xc4, 0x04, 0x5f, 0x0a, 0x8f, 0x0f, 0xce,
- 0x01, 0x39, 0x0f, 0xcd, 0x04, 0x4c, 0x05, 0xb8, 0x06, 0x0c, 0x0f, 0xc0,
- 0x05, 0xd4, 0x0f, 0xc4, 0x04, 0x5c, 0x0f, 0xcf, 0x04, 0x40, 0x06, 0x0e,
- 0x0d, 0xcd, 0x0f, 0xcc, 0x00, 0xc4, 0x05, 0xb9, 0x0f, 0xc0, 0x05, 0x56,
- 0x0f, 0xc4, 0x04, 0x5f, 0x0f, 0xcf, 0x04, 0x43, 0x06, 0x0e, 0x0d, 0xcd,
- 0x0f, 0xcc, 0x00, 0xc4, 0x05, 0xb9, 0x0f, 0xc0, 0x05, 0xec, 0x0f, 0xc4,
- 0x04, 0x40, 0x0f, 0xcf, 0x04, 0x40, 0x0f, 0xce, 0x01, 0x39, 0x0f, 0xcd,
- 0x04, 0x62, 0x0f, 0xcc, 0x00, 0xc4, 0x05, 0xb9, 0x0f, 0xc0, 0x05, 0xf8,
- 0x0f, 0xc4, 0x04, 0x43, 0x0f, 0xcf, 0x04, 0x43, 0x0f, 0xce, 0x01, 0x39,
- 0x0f, 0xcd, 0x04, 0x62, 0x05, 0xb8, 0x06, 0x0c, 0x0f, 0xc0, 0x06, 0x1a,
- 0x0f, 0xc5, 0x04, 0x2c, 0x0b, 0x62, 0x00, 0xe4, 0x09, 0xa1, 0x00, 0x15,
- 0x0f, 0xcf, 0x04, 0x6c, 0x0f, 0xce, 0x04, 0x62, 0x0f, 0xcd, 0x04, 0x6f,
- 0x0f, 0xcc, 0x04, 0x4c, 0x1f, 0xcf, 0x04, 0x72, 0x1f, 0xcd, 0x04, 0x75,
- 0x1f, 0xcc, 0x04, 0x49, 0x0d, 0xc4, 0x0f, 0xf6, 0x02, 0x74, 0x0d, 0x85,
- 0x00, 0x36, 0x0d, 0xc4, 0x0d, 0x44, 0x0f, 0xf6, 0x02, 0x74, 0x0d, 0x05,
- 0x00, 0x34, 0x0d, 0x44, 0x0f, 0xc0, 0x06, 0x2a, 0x0f, 0xc4, 0x04, 0x46,
- 0x02, 0x37, 0x0f, 0xf7, 0x02, 0x99, 0x0f, 0xc4, 0x04, 0x65, 0x00, 0x37,
- 0x0f, 0xc4, 0x04, 0x78, 0x02, 0xb7, 0x0f, 0xc4, 0x04, 0x78, 0x00, 0x35,
- 0x0f, 0xc0, 0x06, 0x3a, 0x0f, 0xc4, 0x04, 0x49, 0x0f, 0xc5, 0x00, 0xaa,
- 0x08, 0x3b, 0x0f, 0xc4, 0x04, 0x49, 0x00, 0x37, 0x0f, 0xc4, 0x04, 0x65,
- 0x06, 0xb7, 0x0f, 0xc4, 0x04, 0x68, 0x00, 0x35, 0x0f, 0xc0, 0x06, 0x57,
- 0x0f, 0xc4, 0x04, 0x68, 0x0f, 0xf7, 0x00, 0xbd, 0x0f, 0xc4, 0x00, 0xb3,
- 0x05, 0xb7, 0x0f, 0xfb, 0x00, 0x58, 0x00, 0x08, 0x10, 0x48, 0x0f, 0xc4,
- 0x04, 0x6b, 0x0c, 0x00, 0x0f, 0xc4, 0x04, 0x87, 0x0b, 0x21, 0x0c, 0x19,
- 0x09, 0xc0, 0x0f, 0xc5, 0x04, 0x2d, 0x0f, 0xfb, 0x08, 0x1b, 0x0f, 0xfb,
- 0x08, 0x1b, 0x0f, 0xf9, 0x08, 0x1b, 0x0f, 0xc0, 0x06, 0x7a, 0x0f, 0xc4,
- 0x04, 0x6b, 0x0b, 0x21, 0x00, 0x14, 0x0f, 0xcf, 0x04, 0x7b, 0x1f, 0xcf,
- 0x04, 0x7e, 0x0f, 0xce, 0x06, 0x28, 0x1f, 0xce, 0x04, 0x49, 0x0f, 0xc4,
- 0x04, 0x46, 0x02, 0x37, 0x0f, 0xc4, 0x02, 0xc4, 0x00, 0x37, 0x0d, 0xc4,
- 0x0f, 0xc5, 0x04, 0x46, 0x0f, 0xf7, 0x02, 0x74, 0x00, 0x36, 0x0d, 0xc4,
- 0x0f, 0xcf, 0x04, 0x81, 0x0d, 0xc4, 0x0f, 0xf6, 0x02, 0x74, 0x0d, 0x85,
- 0x00, 0x34, 0x0d, 0xc4, 0x0f, 0xc0, 0x04, 0xb6, 0x0f, 0xc4, 0x04, 0x6b,
- 0x0b, 0x21, 0x00, 0x14, 0x1f, 0x39, 0x0f, 0xc4, 0x04, 0x84, 0x0f, 0xf7,
- 0x00, 0xbd, 0x0f, 0xc4, 0x04, 0x46, 0x05, 0xb7, 0x0f, 0xfb, 0x00, 0x58,
- 0x1f, 0x39, 0x0f, 0xc4, 0x04, 0x84, 0x0f, 0xf5, 0x00, 0xb2, 0x0f, 0xc0,
- 0x04, 0xe6, 0x0f, 0xc4, 0x04, 0x6c, 0x0f, 0xc5, 0x04, 0x88, 0x07, 0x3e,
- 0x0f, 0xf7, 0x00, 0x2d, 0x0f, 0xfb, 0x08, 0x15, 0x0f, 0xc8, 0x06, 0x9f,
- 0x05, 0x3b, 0x0f, 0xf9, 0x08, 0x82, 0x0f, 0xc4, 0x02, 0x0e, 0x0b, 0x08,
- 0x00, 0xb6, 0x00, 0x09, 0x0f, 0xf7, 0x02, 0x99, 0x0f, 0xc4, 0x00, 0xb6,
- 0x00, 0x37, 0x01, 0xbb, 0x0f, 0xc4, 0x04, 0x97, 0x0f, 0xc5, 0x04, 0x9a,
- 0x0f, 0xf7, 0x02, 0x74, 0x0f, 0xc4, 0x00, 0xc2, 0x00, 0x37, 0x01, 0xbb,
- 0x0f, 0xc4, 0x00, 0xc2, 0x0f, 0xc5, 0x04, 0x94, 0x08, 0x3b, 0x0f, 0xc4,
- 0x00, 0xb6, 0x06, 0xb7, 0x0f, 0xc4, 0x00, 0xb6, 0x06, 0xb7, 0x0f, 0xc4,
- 0x00, 0xc5, 0x00, 0x37, 0x01, 0xbb, 0x0f, 0xc4, 0x04, 0xa3, 0x0b, 0x08,
- 0x00, 0xb6, 0x00, 0x09, 0x0f, 0xc4, 0x00, 0xb9, 0x00, 0x37, 0x0f, 0xc4,
- 0x00, 0xb6, 0x06, 0xb7, 0x0f, 0xc4, 0x00, 0xce, 0x00, 0x37, 0x01, 0xbb,
- 0x0f, 0xc4, 0x02, 0x0e, 0x0b, 0x21, 0x0f, 0xc4, 0x04, 0xa3, 0x0b, 0x11,
- 0x09, 0xc8, 0x00, 0xb6, 0x00, 0x09, 0x0f, 0xc4, 0x00, 0xbc, 0x00, 0x37,
- 0x0f, 0xc4, 0x04, 0x97, 0x06, 0xb7, 0x0f, 0xc4, 0x00, 0xbf, 0x00, 0x37,
- 0x01, 0xbb, 0x0f, 0xc4, 0x00, 0xbf, 0x0f, 0xc5, 0x04, 0x9a, 0x0f, 0xf7,
- 0x02, 0x7d, 0x0f, 0xc4, 0x00, 0xb9, 0x0f, 0xf7, 0x02, 0x81, 0x0f, 0xc4,
- 0x00, 0xc8, 0x00, 0x37, 0x01, 0xbb, 0x0f, 0xc4, 0x04, 0xa0, 0x0f, 0xc5,
- 0x04, 0x9a, 0x0f, 0xf7, 0x02, 0x7d, 0x0f, 0xc4, 0x00, 0xbc, 0x06, 0xb7,
- 0x0f, 0xc4, 0x00, 0xcb, 0x00, 0x37, 0x01, 0xbb, 0x0f, 0xc4, 0x04, 0x8e,
- 0x0f, 0xc5, 0x04, 0x91, 0x0f, 0xf7, 0x02, 0x7d, 0x0f, 0xc4, 0x00, 0xd1,
- 0x00, 0x37, 0x01, 0xbb, 0x0f, 0xc4, 0x04, 0x88, 0x0f, 0xc5, 0x04, 0x8b,
- 0x0f, 0xf7, 0x02, 0x7d, 0x0f, 0xc4, 0x00, 0xd4, 0x00, 0x37, 0x01, 0xbb,
- 0x0f, 0xcf, 0x0f, 0xff, 0x0f, 0xce, 0x02, 0xbb, 0x0f, 0xc4, 0x00, 0xce,
- 0x0f, 0xc9, 0x0f, 0x5c, 0x0f, 0xca, 0x07, 0xf8, 0x0f, 0xcc, 0x0f, 0xf8,
- 0x06, 0x3a, 0x01, 0xcd, 0x0f, 0xc4, 0x00, 0xce, 0x0f, 0xc9, 0x09, 0x9a,
- 0x0f, 0xca, 0x07, 0xfe, 0x07, 0xcc, 0x0f, 0xcd, 0x0f, 0xe7, 0x06, 0x3b,
- 0x0f, 0xc4, 0x00, 0xcb, 0x0f, 0xc9, 0x0a, 0x66, 0x00, 0x0a, 0x0f, 0xcc,
- 0x00, 0x3f, 0x0f, 0xcd, 0x0f, 0xdf, 0x06, 0x3b, 0x0f, 0xc4, 0x00, 0xc8,
- 0x0f, 0xc9, 0x0b, 0x33, 0x0f, 0xca, 0x07, 0xff, 0x0f, 0xcc, 0x00, 0x7f,
- 0x0f, 0xcd, 0x0f, 0xbf, 0x06, 0x3b, 0x0f, 0xc4, 0x00, 0xbf, 0x01, 0xba,
- 0x0d, 0xc0, 0x0f, 0xc4, 0x00, 0xbf, 0x0b, 0x0f, 0x0f, 0xce, 0x02, 0xbf,
- 0x0f, 0xc4, 0x00, 0xc5, 0x0f, 0xc9, 0x08, 0xcd, 0x00, 0x0a, 0x0f, 0xcc,
- 0x0f, 0x7e, 0x0f, 0xcd, 0x00, 0xf9, 0x06, 0x3b, 0x0f, 0xc4, 0x00, 0xc5,
- 0x0f, 0xc9, 0x0b, 0x00, 0x00, 0xca, 0x0f, 0xcc, 0x07, 0xff, 0x0f, 0xcd,
- 0x0b, 0xff, 0x06, 0x3b, 0x0f, 0xc4, 0x00, 0xd1, 0x0f, 0xc9, 0x08, 0x00,
- 0x00, 0x0a, 0x1f, 0xc9, 0x0c, 0x00, 0x1f, 0xca, 0x07, 0xff, 0x0f, 0xcc,
- 0x01, 0xef, 0x0f, 0xcd, 0x0e, 0xff, 0x06, 0x3b, 0x0f, 0xc4, 0x00, 0xd4,
- 0x0f, 0xc9, 0x0c, 0x00, 0x00, 0x4a, 0x1f, 0xc9, 0x0e, 0x00, 0x0f, 0xcc,
- 0x03, 0xef, 0x0f, 0xcd, 0x0d, 0xff, 0x06, 0x3b, 0x0f, 0xc4, 0x00, 0xd1,
- 0x0f, 0xc9, 0x08, 0x00, 0x00, 0x0a, 0x1f, 0xca, 0x07, 0xff, 0x0f, 0xcc,
- 0x0f, 0xfb, 0x0f, 0xcd, 0x0f, 0xfd, 0x06, 0x3b, 0x0f, 0xc4, 0x01, 0x99,
- 0x0f, 0xc5, 0x01, 0x97, 0x0b, 0x61, 0x0d, 0xd5, 0x1f, 0xf8, 0x07, 0x93,
- 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x00, 0xd2, 0x0f, 0xf8, 0x07, 0x99,
- 0x10, 0xc0, 0x00, 0x00, 0x00, 0xd2, 0x1f, 0xf9, 0x07, 0x99, 0x0f, 0xfb,
- 0x07, 0xab, 0x0f, 0xc4, 0x01, 0x98, 0x0f, 0xfa, 0x07, 0xa2, 0x0b, 0x0e,
- 0x0f, 0xc5, 0x01, 0x81, 0x0f, 0x38, 0x00, 0x41, 0x0f, 0xf1, 0x0f, 0x15,
- 0x0f, 0xe2, 0x0f, 0xf8, 0x0a, 0x64, 0x09, 0xa2, 0x0d, 0xa5, 0x0f, 0x38,
- 0x09, 0xb2, 0x0f, 0xc4, 0x01, 0x97, 0x0d, 0xc0, 0x00, 0x0e, 0x07, 0x36,
- 0x04, 0x0d, 0x01, 0x0a, 0x12, 0x8a, 0x02, 0x09, 0x12, 0x09, 0x00, 0x4c,
- 0x00, 0x0b, 0x0d, 0xe2, 0x00, 0x21, 0x0f, 0xe4, 0x00, 0x81, 0x09, 0x95,
- 0x10, 0x4e, 0x10, 0x8d, 0x10, 0x0c, 0x0f, 0xe4, 0x00, 0x50, 0x09, 0x95,
- 0x10, 0x8e, 0x10, 0x8d, 0x10, 0x0c, 0x08, 0x24, 0x09, 0x95, 0x10, 0xce,
- 0x1c, 0x8d, 0x10, 0x4b, 0x0f, 0xe4, 0x08, 0x04, 0x09, 0x95, 0x11, 0x0e,
- 0x11, 0x0d, 0x10, 0x0c, 0x0f, 0xe4, 0x03, 0x0a, 0x09, 0x95, 0x14, 0x24,
- 0x19, 0x94, 0x11, 0x4e, 0x0f, 0xe4, 0x04, 0x00, 0x09, 0x95, 0x11, 0x8e,
- 0x1c, 0x4d, 0x10, 0x4c, 0x0f, 0xc4, 0x07, 0x3a, 0x0b, 0x21, 0x00, 0x15,
- 0x0f, 0xc4, 0x01, 0x98, 0x0d, 0x80, 0x1f, 0xc4, 0x01, 0x91, 0x1d, 0x40,
- 0x1f, 0xc4, 0x01, 0x83, 0x1d, 0x00, 0x1f, 0xf0, 0x0a, 0x11, 0x0f, 0x38,
- 0x1c, 0xf2, 0x01, 0xe2, 0x0f, 0xc4, 0x07, 0xf5, 0x0b, 0x24, 0x09, 0xa1,
- 0x00, 0x0f, 0x00, 0x54, 0x10, 0x4f, 0x00, 0x94, 0x14, 0x0f, 0x01, 0x14,
- 0x11, 0x0f, 0x01, 0x54, 0x10, 0x8f, 0x01, 0x94, 0x1f, 0xcf, 0x04, 0x00,
- 0x0d, 0xe1, 0x00, 0x14, 0x1f, 0x39, 0x0f, 0xf9, 0x07, 0xab, 0x0f, 0xf7,
- 0x00, 0xbd, 0x07, 0x04, 0x00, 0x02, 0x0c, 0x42, 0x0f, 0xfa, 0x00, 0x58,
- 0x0c, 0x82, 0x0d, 0xe2, 0x0d, 0x64, 0x1d, 0x24, 0x09, 0x8f, 0x0d, 0x84,
- 0x0d, 0x48, 0x1d, 0x08, 0x0c, 0x02, 0x07, 0x34, 0x0a, 0x8e, 0x0f, 0xc4,
- 0x04, 0x6c, 0x0f, 0xc8, 0x04, 0x88, 0x0f, 0xf5, 0x00, 0x71, 0x0b, 0xc9,
- 0x0b, 0xca, 0x00, 0x21, 0x0c, 0x54, 0x1f, 0x39, 0x0c, 0x9f, 0x09, 0xe2,
- 0x0c, 0x44, 0x0b, 0x8b, 0x0b, 0x25, 0x09, 0x82, 0x09, 0x8c, 0x0c, 0x14,
- 0x10, 0x22, 0x0b, 0x25, 0x09, 0x82, 0x09, 0x8d, 0x0f, 0xc4, 0x01, 0x80,
- 0x0b, 0x21, 0x00, 0x14, 0x0f, 0xe1, 0x0f, 0xff, 0x0c, 0xd9, 0x0c, 0xce,
- 0x19, 0xce, 0x0d, 0x14, 0x1f, 0xf0, 0x0a, 0x12, 0x1d, 0xb2, 0x1f, 0xf0,
- 0x0a, 0x13, 0x0f, 0x38, 0x1d, 0x72, 0x0b, 0x0f, 0x0f, 0xc4, 0x02, 0x0c,
- 0x0b, 0x21, 0x00, 0xd9, 0x09, 0xc0, 0x09, 0xe1, 0x0f, 0xd2, 0x02, 0xd3,
- 0x1f, 0xc0, 0x02, 0xc7, 0x0b, 0x04, 0x0d, 0xc2, 0x00, 0x02, 0x0f, 0x38,
- 0x00, 0x02, 0x0f, 0xc4, 0x02, 0x0c, 0x0b, 0x03, 0x0f, 0xc4, 0x02, 0x11,
- 0x0b, 0x03, 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x09, 0xe1, 0x03, 0x13,
- 0x1f, 0x39, 0x00, 0x02, 0x0b, 0x21, 0x00, 0x59, 0x0f, 0xf8, 0x08, 0x3d,
- 0x09, 0xc0, 0x0f, 0xf1, 0x0a, 0x1f, 0x0f, 0xc4, 0x04, 0x2c, 0x07, 0x36,
- 0x0b, 0x08, 0x1a, 0x66, 0x19, 0xa6, 0x19, 0xa6, 0x19, 0xa6, 0x19, 0xaa,
- 0x1f, 0xec, 0x02, 0x39, 0x1f, 0xee, 0x0d, 0x40, 0x1e, 0x21, 0x1c, 0x19,
- 0x0f, 0xf6, 0x0b, 0x3f, 0x19, 0xc8, 0x0c, 0x4d, 0x0c, 0x8e, 0x0f, 0xfa,
- 0x08, 0x7a, 0x0c, 0x09, 0x0a, 0x8f, 0x0d, 0x49, 0x00, 0xb6, 0x00, 0x08,
- 0x0d, 0xa1, 0x05, 0xd1, 0x01, 0x36, 0x09, 0xc8, 0x00, 0x34, 0x0d, 0xc4,
- 0x0f, 0xc4, 0x02, 0x0a, 0x0a, 0x8f, 0x0b, 0x85, 0x0b, 0x0e, 0x0f, 0xc4,
- 0x04, 0x2b, 0x0f, 0xfb, 0x08, 0x94, 0x0d, 0xc4, 0x0a, 0xc0, 0x0a, 0xe1,
- 0x0d, 0x92, 0x1f, 0xc0, 0x02, 0xd3, 0x0b, 0x04, 0x0f, 0xc5, 0x04, 0x2b,
- 0x0f, 0xfe, 0x00, 0x2b, 0x0f, 0xf5, 0x00, 0x2d, 0x0f, 0xf7, 0x00, 0xbd,
- 0x05, 0xb6, 0x0d, 0xc4, 0x0d, 0xb7, 0x05, 0x37, 0x0f, 0xf6, 0x00, 0xbd,
- 0x0d, 0x44, 0x0d, 0x37, 0x00, 0x34, 0x0d, 0x44, 0x00, 0x0a, 0x00, 0x0b,
- 0x01, 0x3e, 0x0f, 0xfd, 0x08, 0xb4, 0x00, 0x3f, 0x0b, 0x88, 0x00, 0x09,
- 0x0c, 0x21, 0x02, 0xdf, 0x1f, 0xc9, 0x0f, 0xff, 0x0c, 0xa0, 0x09, 0xca,
- 0x0c, 0x61, 0x0c, 0xd9, 0x09, 0xcb, 0x0c, 0xaa, 0x0c, 0xeb, 0x0f, 0xee,
- 0x02, 0x40, 0x0c, 0xe1, 0x02, 0xdf, 0x0f, 0xc8, 0x0a, 0x7e, 0x1f, 0xc8,
- 0x0a, 0xbe, 0x0c, 0x2e, 0x0f, 0x38, 0x0e, 0x01, 0x0f, 0xc4, 0x00, 0x5c,
- 0x0f, 0xc5, 0x01, 0xb8, 0x0f, 0xfb, 0x08, 0xa4, 0x0f, 0xc4, 0x00, 0x60,
- 0x0f, 0xc5, 0x01, 0xb9, 0x0f, 0xfb, 0x08, 0xa4, 0x0f, 0xc4, 0x00, 0x64,
- 0x0f, 0xc5, 0x01, 0xba, 0x0f, 0xfb, 0x08, 0xa4, 0x0f, 0xc4, 0x00, 0x68,
- 0x0f, 0xc5, 0x01, 0xbb, 0x0f, 0xfb, 0x08, 0xa4, 0x0f, 0xc5, 0x05, 0x60,
- 0x0f, 0xc4, 0x01, 0xb8, 0x0b, 0x03, 0x0f, 0xc4, 0x01, 0xb9, 0x0b, 0x03,
- 0x0f, 0xc5, 0x05, 0x62, 0x0f, 0xc4, 0x01, 0xba, 0x0b, 0x03, 0x0f, 0xc4,
- 0x01, 0xbb, 0x0f, 0x38, 0x0b, 0x03, 0x07, 0xb7, 0x1f, 0xf9, 0x08, 0xf8,
- 0x0f, 0xc4, 0x01, 0x34, 0x00, 0x02, 0x00, 0x02, 0x0f, 0xc4, 0x01, 0x61,
- 0x0f, 0xc0, 0x00, 0x2d, 0x0f, 0xf9, 0x09, 0x02, 0x0f, 0xc4, 0x01, 0x34,
- 0x00, 0x02, 0x00, 0x02, 0x0f, 0xc4, 0x01, 0x61, 0x0f, 0xc0, 0x00, 0xd9,
- 0x0f, 0xf9, 0x09, 0x02, 0x0f, 0xc4, 0x01, 0x34, 0x0f, 0xf0, 0x05, 0x01,
- 0x0b, 0xb2, 0x0f, 0xf0, 0x05, 0x00, 0x0b, 0xb2, 0x0f, 0xc4, 0x01, 0x60,
- 0x0f, 0xf0, 0x05, 0x02, 0x00, 0x00, 0x00, 0x32, 0x0f, 0xf0, 0x0a, 0x03,
- 0x00, 0x32, 0x0f, 0xc4, 0x01, 0x61, 0x0f, 0xf0, 0x0a, 0x02, 0x0b, 0x32,
- 0x0f, 0xc4, 0x01, 0xb0, 0x0f, 0xc0, 0x00, 0x64, 0x00, 0x08, 0x0f, 0xfa,
- 0x19, 0x6d, 0x00, 0x09, 0x0f, 0xf7, 0x02, 0xb6, 0x0f, 0xfb, 0x12, 0xcf,
- 0x0f, 0xc4, 0x06, 0x8d, 0x0b, 0x21, 0x0f, 0xd3, 0x00, 0x30, 0x0f, 0xc4,
- 0x06, 0x94, 0x09, 0xe1, 0x0b, 0xa0, 0x0f, 0xf0, 0x03, 0x2a, 0x09, 0xf2,
- 0x00, 0x21, 0x1f, 0xe1, 0x1f, 0xff, 0x0b, 0x99, 0x0f, 0xf0, 0x03, 0x29,
- 0x09, 0xf2, 0x0f, 0xc4, 0x01, 0x9e, 0x00, 0x02, 0x0f, 0xc4, 0x01, 0xac,
- 0x00, 0x00, 0x0f, 0xc4, 0x01, 0xaf, 0x00, 0x00, 0x0f, 0xc4, 0x05, 0x86,
- 0x00, 0x00, 0x04, 0x05, 0x0f, 0xc1, 0x00, 0x29, 0x02, 0xba, 0x00, 0x08,
- 0x0f, 0x39, 0x0f, 0xc4, 0x06, 0x94, 0x0f, 0xf0, 0x03, 0x2a, 0x0b, 0xb2,
- 0x0f, 0xf0, 0x03, 0x29, 0x0b, 0xb2, 0x0f, 0xc4, 0x06, 0x8d, 0x0f, 0xf0,
- 0x03, 0x2b, 0x0f, 0xc0, 0x00, 0x30, 0x0f, 0xf2, 0x00, 0x30, 0x0f, 0xf7,
- 0x0b, 0xc3, 0x0f, 0xc8, 0x0a, 0xa1, 0x07, 0x36, 0x00, 0x49, 0x1f, 0xc8,
- 0x06, 0xa9, 0x00, 0xb6, 0x10, 0x09, 0x0f, 0xc8, 0x1f, 0xe7, 0x01, 0x37,
- 0x0f, 0xc4, 0x05, 0x5c, 0x00, 0x37, 0x09, 0x36, 0x04, 0x08, 0x0f, 0xc4,
- 0x06, 0x01, 0x04, 0x00, 0x04, 0x04, 0x0f, 0xc0, 0x00, 0x2a, 0x0f, 0xc4,
- 0x01, 0xa0, 0x00, 0x00, 0x08, 0xc4, 0x00, 0x80, 0x0f, 0xc8, 0x00, 0x3f,
- 0x0f, 0xf7, 0x05, 0x23, 0x0f, 0x39, 0x08, 0xc4, 0x0b, 0x21, 0x00, 0x54,
- 0x1f, 0xf9, 0x09, 0x82, 0x0f, 0x38, 0x09, 0xc0, 0x0f, 0xf7, 0x05, 0x37,
- 0x0f, 0x39, 0x04, 0x3b, 0x0f, 0xfb, 0x09, 0x7b, 0x0f, 0x39, 0x04, 0x3b,
- 0x07, 0x37, 0x1f, 0xf9, 0x09, 0x90, 0x0f, 0xf6, 0x05, 0x5c, 0x00, 0x48,
- 0x0f, 0xfb, 0x0d, 0xb2, 0x0f, 0xc4, 0x01, 0xa2, 0x00, 0x21, 0x0b, 0x15,
- 0x1f, 0xf9, 0x09, 0xae, 0x0f, 0xc4, 0x01, 0x5f, 0x0b, 0x21, 0x00, 0x59,
- 0x09, 0xc0, 0x06, 0x53, 0x1f, 0xf9, 0x09, 0xa4, 0x0f, 0xf7, 0x05, 0x37,
- 0x01, 0x38, 0x00, 0xc8, 0x09, 0xe2, 0x00, 0x64, 0x09, 0xa2, 0x00, 0x63,
- 0x02, 0x3a, 0x09, 0x88, 0x0f, 0xf7, 0x0c, 0x13, 0x0f, 0xf5, 0x0c, 0x97,
- 0x08, 0xc4, 0x0b, 0x21, 0x00, 0x54, 0x09, 0xe2, 0x00, 0x64, 0x09, 0xa2,
- 0x00, 0x63, 0x02, 0x3a, 0x09, 0x88, 0x0f, 0xf7, 0x0c, 0x13, 0x0f, 0xf7,
- 0x0c, 0x97, 0x0f, 0xfb, 0x09, 0x7b, 0x04, 0x04, 0x0f, 0xc5, 0x01, 0x5f,
- 0x0b, 0x21, 0x0f, 0xd5, 0x00, 0x40, 0x1f, 0xf8, 0x09, 0xc7, 0x10, 0x01,
- 0x0f, 0x39, 0x0f, 0xf0, 0x05, 0x0c, 0x0f, 0x38, 0x00, 0xb2, 0x04, 0x3b,
- 0x0f, 0xf7, 0x0c, 0x13, 0x0f, 0xf7, 0x0c, 0x97, 0x07, 0x37, 0x1f, 0xf9,
- 0x09, 0xd6, 0x0f, 0xf6, 0x05, 0x5c, 0x00, 0x48, 0x09, 0x3b, 0x04, 0x04,
- 0x0f, 0xc0, 0x00, 0x41, 0x08, 0xc4, 0x0b, 0x21, 0x00, 0x54, 0x09, 0xe2,
- 0x00, 0x64, 0x09, 0xa2, 0x00, 0x63, 0x02, 0x3a, 0x09, 0x88, 0x0f, 0xfb,
- 0x09, 0x7b, 0x0f, 0x39, 0x04, 0x3b, 0x07, 0xba, 0x00, 0xc8, 0x0f, 0xc4,
- 0x01, 0xa0, 0x0b, 0x21, 0x00, 0x15, 0x1f, 0xf9, 0x09, 0xf3, 0x0f, 0xfb,
- 0x0d, 0xf5, 0x0f, 0xf9, 0x0a, 0x38, 0x0f, 0xfb, 0x0d, 0xb2, 0x0f, 0xfb,
- 0x0e, 0x05, 0x0f, 0xc4, 0x01, 0xb6, 0x0b, 0x21, 0x00, 0x15, 0x1f, 0xf9,
- 0x0a, 0xc3, 0x0f, 0xc4, 0x01, 0x9f, 0x0b, 0x22, 0x0f, 0xe4, 0x00, 0xc0,
- 0x09, 0xa1, 0x0f, 0xd4, 0x00, 0xc0, 0x1f, 0xf9, 0x0a, 0x15, 0x0f, 0xd4,
- 0x00, 0x40, 0x1f, 0xf9, 0x0a, 0x15, 0x00, 0x14, 0x1f, 0x39, 0x0f, 0xc4,
- 0x01, 0xa1, 0x0b, 0x21, 0x00, 0x55, 0x1f, 0x38, 0x09, 0xc0, 0x0f, 0xf9,
- 0x0a, 0x38, 0x0f, 0xc4, 0x01, 0x42, 0x0b, 0x08, 0x0f, 0xc4, 0x01, 0xa7,
- 0x0b, 0x21, 0x0f, 0xd4, 0x08, 0x00, 0x1f, 0xf9, 0x0a, 0x2c, 0x0c, 0x14,
- 0x1f, 0xf9, 0x0a, 0x99, 0x0f, 0xc4, 0x01, 0xa8, 0x0b, 0x21, 0x0f, 0xd4,
- 0x08, 0x00, 0x1f, 0xf9, 0x0a, 0x2c, 0x0c, 0x14, 0x1f, 0xf9, 0x0a, 0x99,
- 0x0c, 0x00, 0x0f, 0xc4, 0x01, 0xa6, 0x0b, 0x21, 0x00, 0x54, 0x1f, 0xf8,
- 0x0a, 0x38, 0x09, 0xc0, 0x0f, 0xc4, 0x01, 0xa1, 0x0f, 0x38, 0x01, 0x00,
- 0x0f, 0xc4, 0x01, 0xa3, 0x00, 0x00, 0x0f, 0xc4, 0x01, 0xa2, 0x00, 0x00,
- 0x0f, 0xc4, 0x01, 0xa1, 0x01, 0x00, 0x0f, 0xc4, 0x01, 0xa6, 0x00, 0xc0,
- 0x0f, 0xc4, 0x01, 0xa7, 0x0f, 0xc0, 0x08, 0x00, 0x0f, 0xc4, 0x01, 0xa8,
- 0x0f, 0xc0, 0x08, 0x00, 0x07, 0xb7, 0x01, 0x48, 0x13, 0xc8, 0x0f, 0xc4,
- 0x01, 0xa0, 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x09, 0xcb, 0x09, 0xe1,
- 0x0c, 0x16, 0x1f, 0xf9, 0x0a, 0xda, 0x00, 0x54, 0x10, 0x08, 0x00, 0x94,
- 0x16, 0x48, 0x00, 0xd4, 0x1f, 0xc8, 0x1f, 0xe7, 0x01, 0x14, 0x1f, 0xc8,
- 0x00, 0x32, 0x01, 0x54, 0x1f, 0xc8, 0x1f, 0xce, 0x01, 0x94, 0x1f, 0xc8,
- 0x00, 0x4b, 0x01, 0xd4, 0x1f, 0xc8, 0x1f, 0xb5, 0x02, 0x14, 0x1f, 0xc8,
- 0x00, 0x64, 0x02, 0x54, 0x1f, 0xc8, 0x1f, 0x9c, 0x02, 0x94, 0x1f, 0xc8,
- 0x00, 0x7d, 0x02, 0xd4, 0x1f, 0xc8, 0x1f, 0x83, 0x03, 0x14, 0x1f, 0xc8,
- 0x00, 0x96, 0x03, 0x54, 0x1f, 0xc8, 0x1f, 0x6a, 0x03, 0x94, 0x1f, 0xc8,
- 0x00, 0xaf, 0x03, 0xd4, 0x1f, 0xc8, 0x1f, 0x51, 0x0f, 0xfb, 0x19, 0x85,
- 0x07, 0xb7, 0x0f, 0xc9, 0x00, 0x2d, 0x1f, 0xc9, 0x00, 0xd9, 0x0c, 0x61,
- 0x0c, 0x1b, 0x09, 0xc8, 0x0c, 0x21, 0x0f, 0xd7, 0x1f, 0xff, 0x10, 0x08,
- 0x0f, 0xf0, 0x0a, 0x02, 0x0c, 0x32, 0x0f, 0xc4, 0x01, 0x61, 0x0f, 0x38,
- 0x0c, 0x00, 0x0f, 0xc4, 0x01, 0x42, 0x0f, 0xf6, 0x0d, 0x7c, 0x00, 0x48,
- 0x04, 0xc4, 0x0f, 0xc5, 0x05, 0x6e, 0x04, 0xb7, 0x0f, 0xc4, 0x01, 0xaa,
- 0x00, 0x00, 0x0f, 0xc4, 0x06, 0x96, 0x0f, 0xc5, 0x05, 0x71, 0x04, 0xb7,
- 0x0f, 0xc4, 0x01, 0xab, 0x00, 0x00, 0x04, 0x04, 0x0f, 0xc0, 0x00, 0x2b,
- 0x08, 0xc4, 0x02, 0x80, 0x0f, 0xc8, 0x00, 0x40, 0x0f, 0xf7, 0x05, 0x23,
- 0x07, 0xb7, 0x0f, 0xc8, 0x00, 0x2d, 0x1f, 0xc8, 0x00, 0xd9, 0x0f, 0xf0,
- 0x0a, 0x02, 0x0c, 0x32, 0x00, 0x08, 0x0f, 0xfa, 0x19, 0x6d, 0x00, 0x09,
- 0x0f, 0x39, 0x0f, 0xc4, 0x01, 0x62, 0x0b, 0x22, 0x00, 0x63, 0x09, 0x80,
- 0x02, 0x36, 0x04, 0xc4, 0x0f, 0xf7, 0x00, 0x8f, 0x05, 0x84, 0x0f, 0xf6,
- 0x0d, 0x7c, 0x00, 0x08, 0x08, 0xc4, 0x01, 0x80, 0x0f, 0xc8, 0x00, 0x3f,
- 0x0f, 0xf7, 0x05, 0x23, 0x0f, 0xc4, 0x01, 0xa0, 0x0f, 0x38, 0x00, 0x00,
- 0x01, 0x3a, 0x00, 0x88, 0x0f, 0x39, 0x00, 0x44, 0x0c, 0x00, 0x04, 0x3b,
- 0x0f, 0xf7, 0x0c, 0x13, 0x0f, 0xf7, 0x0c, 0x97, 0x0f, 0xc8, 0x00, 0x2b,
- 0x03, 0x3b, 0x1f, 0xf9, 0x0b, 0x02, 0x0f, 0xf0, 0x0a, 0x07, 0x01, 0x32,
- 0x0f, 0xc4, 0x06, 0xe9, 0x0f, 0xc5, 0x07, 0x51, 0x04, 0xb7, 0x0f, 0xc4,
- 0x06, 0xec, 0x0f, 0xc5, 0x07, 0x54, 0x04, 0xb7, 0x0f, 0xc4, 0x06, 0xe3,
- 0x0f, 0xc5, 0x07, 0x3f, 0x04, 0xb7, 0x0f, 0xc4, 0x06, 0xe6, 0x0f, 0xc5,
- 0x07, 0x42, 0x04, 0xb7, 0x0f, 0xf9, 0x0b, 0x16, 0x0f, 0xc4, 0x06, 0xf5,
- 0x0f, 0xc5, 0x07, 0x51, 0x04, 0xb7, 0x0f, 0xc4, 0x06, 0xf8, 0x0f, 0xc5,
- 0x07, 0x54, 0x04, 0xb7, 0x0f, 0xc4, 0x06, 0xef, 0x0f, 0xc5, 0x07, 0x3f,
- 0x04, 0xb7, 0x0f, 0xc4, 0x06, 0xf2, 0x0f, 0xc5, 0x07, 0x42, 0x04, 0xb7,
- 0x07, 0x37, 0x1f, 0xf9, 0x0b, 0x2d, 0x0f, 0xf7, 0x09, 0x2f, 0x0f, 0xf7,
- 0x09, 0x62, 0x0f, 0xf7, 0x09, 0xc3, 0x0f, 0xc8, 0x00, 0x2b, 0x03, 0x3b,
- 0x1f, 0xfb, 0x0b, 0xfa, 0x00, 0x44, 0x0f, 0xfa, 0x0c, 0x0e, 0x0b, 0x08,
- 0x0f, 0xf6, 0x05, 0x5c, 0x00, 0x48, 0x0f, 0xf9, 0x0b, 0x4b, 0x0f, 0xf7,
- 0x09, 0x2f, 0x0f, 0xf7, 0x09, 0xc3, 0x0f, 0xfb, 0x0b, 0xff, 0x0f, 0xf7,
- 0x09, 0x2f, 0x0f, 0xf7, 0x09, 0x62, 0x0f, 0xc8, 0x00, 0x2b, 0x03, 0x3b,
- 0x1f, 0xf7, 0x0a, 0x0a, 0x0f, 0xfb, 0x0b, 0xff, 0x0f, 0xc8, 0x00, 0x2b,
- 0x03, 0x3b, 0x1f, 0xf7, 0x0a, 0x72, 0x0f, 0xfb, 0x17, 0x68, 0x0f, 0xfb,
- 0x0b, 0xff, 0x00, 0x44, 0x0f, 0xfa, 0x0c, 0x0e, 0x0b, 0x08, 0x0f, 0xc4,
- 0x01, 0x9e, 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x09, 0xe1, 0x00, 0x14,
- 0x10, 0x40, 0x0f, 0x39, 0x0f, 0xc8, 0x00, 0x50, 0x08, 0xbb, 0x07, 0xba,
- 0x01, 0x08, 0x0f, 0xc8, 0x00, 0x50, 0x03, 0x3b, 0x1f, 0xf9, 0x0b, 0x7e,
- 0x0f, 0xc4, 0x01, 0x9e, 0x07, 0x36, 0x0b, 0x08, 0x1c, 0x27, 0x19, 0xa7,
- 0x19, 0x88, 0x0c, 0x21, 0x0f, 0xd2, 0x00, 0x6f, 0x1f, 0xc4, 0x01, 0xb7,
- 0x1f, 0xf8, 0x0b, 0x75, 0x10, 0x40, 0x0f, 0xc4, 0x05, 0xe8, 0x0b, 0x21,
- 0x00, 0x14, 0x14, 0x04, 0x1f, 0xc0, 0x00, 0x2b, 0x1f, 0x39, 0x07, 0xba,
- 0x01, 0x48, 0x0f, 0xf0, 0x0a, 0x07, 0x00, 0x32, 0x0f, 0xc4, 0x01, 0x9e,
- 0x0f, 0x38, 0x00, 0x02, 0x0f, 0xc4, 0x01, 0x9e, 0x0f, 0xc5, 0x07, 0x5e,
- 0x0b, 0xa1, 0x0b, 0xd2, 0x11, 0x3a, 0x11, 0x08, 0x0f, 0x39, 0x0f, 0xc8,
- 0x00, 0x3c, 0x08, 0xbb, 0x0f, 0xc4, 0x01, 0x7f, 0x0b, 0x21, 0x00, 0x00,
- 0x00, 0x15, 0x0f, 0xc4, 0x01, 0xbc, 0x0b, 0x21, 0x00, 0x19, 0x10, 0x59,
- 0x09, 0xc0, 0x09, 0xe1, 0x00, 0x93, 0x14, 0x04, 0x1f, 0xc0, 0x00, 0x32,
- 0x0f, 0xc8, 0x00, 0x3c, 0x03, 0x3b, 0x1f, 0x39, 0x0f, 0xc4, 0x01, 0xb0,
- 0x0f, 0xc0, 0x00, 0x96, 0x0f, 0xc4, 0x01, 0x80, 0x0b, 0x21, 0x00, 0x15,
- 0x1f, 0xc4, 0x01, 0x83, 0x1f, 0xfa, 0x04, 0x60, 0x10, 0x40, 0x0f, 0x39,
- 0x0f, 0xc4, 0x01, 0x78, 0x0b, 0x21, 0x0f, 0xd3, 0x00, 0xfa, 0x1f, 0xf9,
- 0x0b, 0xcd, 0x0f, 0xc5, 0x01, 0xbe, 0x0f, 0xc4, 0x01, 0xbd, 0x0b, 0x21,
- 0x00, 0x59, 0x09, 0xc0, 0x09, 0xe1, 0x0f, 0xd3, 0x00, 0x28, 0x1f, 0x39,
- 0x0f, 0xd2, 0x00, 0x3c, 0x1f, 0xc0, 0x00, 0x28, 0x10, 0x01, 0x0f, 0xc4,
- 0x05, 0x86, 0x0b, 0x21, 0x00, 0x93, 0x1b, 0x61, 0x10, 0x59, 0x19, 0xc1,
- 0x0b, 0x61, 0x02, 0x93, 0x1f, 0x39, 0x01, 0x38, 0x01, 0x08, 0x0f, 0xc8,
- 0x00, 0x3c, 0x08, 0xbb, 0x0f, 0xfb, 0x0b, 0xac, 0x07, 0x37, 0x00, 0x48,
- 0x11, 0x08, 0x0c, 0x21, 0x0f, 0xc4, 0x01, 0x2e, 0x0b, 0x20, 0x09, 0xc2,
- 0x09, 0xc8, 0x00, 0x21, 0x0b, 0x19, 0x09, 0xc2, 0x07, 0xba, 0x00, 0x88,
- 0x0f, 0xc8, 0x00, 0x3c, 0x0f, 0xf7, 0x00, 0x3a, 0x1f, 0xf9, 0x0b, 0xed,
- 0x0f, 0xd5, 0x00, 0x32, 0x1f, 0xf9, 0x0b, 0xf2, 0x0f, 0x39, 0x02, 0x3a,
- 0x00, 0x48, 0x0f, 0xfb, 0x11, 0x41, 0x0f, 0x39, 0x01, 0x3a, 0x01, 0x08,
- 0x02, 0x3a, 0x00, 0x08, 0x02, 0xba, 0x00, 0x08, 0x0f, 0x39, 0x0f, 0x39,
- 0x0f, 0xf7, 0x0a, 0x0a, 0x0f, 0xf7, 0x0a, 0x72, 0x0f, 0x39, 0x09, 0x3b,
- 0x0f, 0xfb, 0x0c, 0xf8, 0x0f, 0xfb, 0x13, 0xae, 0x0f, 0xfb, 0x0c, 0x26,
- 0x0f, 0xfb, 0x02, 0x35, 0x04, 0x3b, 0x0f, 0xf7, 0x0c, 0x13, 0x0f, 0xf7,
- 0x0c, 0x97, 0x0f, 0x39, 0x00, 0x04, 0x0c, 0x00, 0x09, 0x3b, 0x0f, 0xf6,
- 0x00, 0x3a, 0x00, 0x48, 0x1f, 0x39, 0x02, 0x14, 0x1f, 0x39, 0x0f, 0xc4,
- 0x05, 0x86, 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc8, 0x09, 0xe1, 0x02, 0x96,
- 0x1f, 0xf9, 0x0c, 0x22, 0x0f, 0x38, 0x0c, 0x00, 0x04, 0x04, 0x00, 0x05,
- 0x0b, 0x40, 0x0f, 0x39, 0x0f, 0xc4, 0x00, 0x56, 0x02, 0x37, 0x0f, 0xc5,
- 0x00, 0x56, 0x04, 0xb7, 0x0f, 0xc4, 0x00, 0x74, 0x04, 0xb7, 0x0f, 0xc4,
- 0x00, 0xe9, 0x00, 0x37, 0x03, 0x37, 0x0f, 0xc4, 0x05, 0xd7, 0x07, 0x05,
- 0x0b, 0x83, 0x0b, 0x83, 0x0f, 0xc3, 0x07, 0xff, 0x0f, 0xf7, 0x01, 0x39,
- 0x0f, 0xc4, 0x00, 0xec, 0x0f, 0xc5, 0x00, 0xef, 0x04, 0xb7, 0x0f, 0xc4,
- 0x00, 0xec, 0x00, 0x37, 0x0f, 0xc4, 0x00, 0xe9, 0x0f, 0xf7, 0x02, 0x93,
- 0x0f, 0xc4, 0x00, 0xef, 0x02, 0xb7, 0x0f, 0xc4, 0x00, 0xf2, 0x00, 0x37,
- 0x0f, 0xc4, 0x06, 0xb1, 0x0f, 0xf7, 0x02, 0x81, 0x01, 0x36, 0x03, 0x08,
- 0x03, 0xb7, 0x0f, 0xc4, 0x01, 0x64, 0x0f, 0x38, 0x0c, 0x00, 0x0f, 0xc4,
- 0x01, 0xa2, 0x0b, 0x21, 0x00, 0x15, 0x1f, 0xfb, 0x0d, 0xa1, 0x0f, 0xf1,
- 0x05, 0x0d, 0x0a, 0x48, 0x0f, 0xf1, 0x05, 0x0e, 0x0f, 0xc4, 0x01, 0x9a,
- 0x0c, 0x00, 0x0f, 0xc4, 0x01, 0x9b, 0x0a, 0x49, 0x0f, 0xf6, 0x03, 0xcd,
- 0x0c, 0x40, 0x0f, 0xc4, 0x01, 0x72, 0x0c, 0x00, 0x0f, 0xc4, 0x07, 0x06,
- 0x0b, 0x21, 0x00, 0x14, 0x1f, 0xc4, 0x01, 0x64, 0x1c, 0x21, 0x1b, 0x19,
- 0x19, 0xc8, 0x0f, 0xf6, 0x00, 0x47, 0x00, 0x4b, 0x10, 0x08, 0x0f, 0xc4,
- 0x01, 0x83, 0x0b, 0x21, 0x00, 0x15, 0x10, 0x08, 0x0f, 0xc4, 0x01, 0x9c,
- 0x0c, 0x21, 0x0b, 0x19, 0x09, 0xc0, 0x09, 0xc9, 0x0f, 0xc4, 0x01, 0x9d,
- 0x0b, 0x21, 0x0c, 0x51, 0x09, 0xca, 0x0f, 0xc4, 0x01, 0xbf, 0x0b, 0x21,
- 0x0c, 0x91, 0x09, 0xc8, 0x0c, 0x80, 0x0f, 0xf0, 0x05, 0x02, 0x07, 0x36,
- 0x0c, 0xb2, 0x1f, 0xc4, 0x00, 0xd7, 0x1a, 0x85, 0x1b, 0x8b, 0x1b, 0x83,
- 0x1b, 0x83, 0x1c, 0x83, 0x1c, 0xca, 0x0f, 0xf6, 0x00, 0x42, 0x01, 0xcb,
- 0x1f, 0xf0, 0x05, 0x08, 0x1c, 0xb2, 0x0f, 0xc4, 0x01, 0xa9, 0x0c, 0x00,
- 0x0f, 0xfb, 0x0e, 0x59, 0x0f, 0xfb, 0x13, 0x6f, 0x0f, 0xfb, 0x0e, 0xd8,
- 0x0f, 0xc4, 0x01, 0xa9, 0x0b, 0x09, 0x00, 0xb6, 0x00, 0x08, 0x0f, 0xc8,
- 0x1f, 0xe8, 0x01, 0x37, 0x0f, 0xc4, 0x00, 0xda, 0x00, 0x37, 0x03, 0x37,
- 0x0f, 0xc4, 0x06, 0xb1, 0x05, 0xb7, 0x0f, 0xf7, 0x01, 0x39, 0x0f, 0xc4,
- 0x00, 0xdd, 0x00, 0x37, 0x0f, 0xc4, 0x01, 0xa9, 0x0b, 0x08, 0x00, 0x09,
- 0x0c, 0x21, 0x02, 0xdf, 0x1f, 0xc9, 0x0f, 0xff, 0x0f, 0xc4, 0x01, 0x44,
- 0x0b, 0x21, 0x0c, 0x20, 0x09, 0xc2, 0x09, 0xc8, 0x0b, 0x21, 0x0c, 0x59,
- 0x09, 0xc0, 0x09, 0xc9, 0x0f, 0xc5, 0x02, 0x1f, 0x0f, 0xc4, 0x02, 0x21,
- 0x02, 0xbe, 0x0f, 0xf7, 0x00, 0x2d, 0x0c, 0x03, 0x0c, 0x43, 0x0f, 0xf1,
- 0x0a, 0x18, 0x08, 0x84, 0x0b, 0x21, 0x0f, 0xd9, 0x00, 0x5c, 0x09, 0xc4,
- 0x0a, 0x40, 0x0f, 0xf1, 0x0a, 0x19, 0x0f, 0xd9, 0x00, 0x60, 0x09, 0xc4,
- 0x0a, 0x40, 0x0f, 0xf1, 0x0a, 0x1a, 0x0f, 0xd9, 0x00, 0x64, 0x09, 0xc4,
- 0x0a, 0x40, 0x0f, 0xf1, 0x0a, 0x1b, 0x0f, 0xd9, 0x00, 0x68, 0x09, 0xc4,
- 0x0a, 0x40, 0x0f, 0x39, 0x0f, 0xc4, 0x01, 0x34, 0x0b, 0x88, 0x0b, 0x89,
- 0x0f, 0xf0, 0x05, 0x01, 0x0c, 0x32, 0x0f, 0xf0, 0x05, 0x00, 0x0c, 0x72,
- 0x0f, 0xf0, 0x05, 0x07, 0x0c, 0x32, 0x0f, 0xf0, 0x05, 0x06, 0x0f, 0x38,
- 0x0c, 0x72, 0x0f, 0xfb, 0x0d, 0xb2, 0x0f, 0xc4, 0x01, 0x9f, 0x0b, 0x22,
- 0x0f, 0xf1, 0x0a, 0x04, 0x0a, 0x62, 0x00, 0x48, 0x00, 0x09, 0x00, 0x21,
- 0x0f, 0xc4, 0x01, 0xad, 0x0b, 0x21, 0x00, 0xd9, 0x09, 0xca, 0x09, 0xe1,
- 0x03, 0x12, 0x19, 0xca, 0x0c, 0x80, 0x04, 0x24, 0x00, 0x21, 0x09, 0x94,
- 0x1f, 0xf9, 0x0d, 0x46, 0x00, 0x49, 0x08, 0x24, 0x09, 0x94, 0x1f, 0xf8,
- 0x0d, 0x46, 0x10, 0x08, 0x03, 0xe4, 0x0c, 0xa1, 0x09, 0x95, 0x09, 0x80,
- 0x10, 0x08, 0x0f, 0xe4, 0x00, 0x80, 0x09, 0x94, 0x1f, 0xf9, 0x0d, 0x46,
- 0x00, 0x49, 0x0f, 0xe4, 0x00, 0x40, 0x09, 0x94, 0x10, 0x08, 0x0f, 0xc4,
- 0x01, 0x42, 0x00, 0x21, 0x0b, 0x95, 0x10, 0x08, 0x0b, 0x95, 0x10, 0x08,
- 0x08, 0x84, 0x0b, 0x0a, 0x0c, 0xa1, 0x0f, 0xc4, 0x01, 0xa4, 0x0b, 0x15,
- 0x10, 0x08, 0x1c, 0x80, 0x00, 0x21, 0x0c, 0x54, 0x1f, 0xf9, 0x0d, 0x57,
- 0x0c, 0x14, 0x1f, 0xf9, 0x0d, 0x57, 0x0f, 0xc4, 0x01, 0xaf, 0x0b, 0x0b,
- 0x0f, 0xc5, 0x01, 0xae, 0x0c, 0xe1, 0x0b, 0x56, 0x00, 0x00, 0x0f, 0x38,
- 0x1c, 0xc1, 0x0f, 0xc4, 0x01, 0xaf, 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0,
- 0x09, 0xe1, 0x0f, 0xc4, 0x01, 0xb0, 0x0b, 0x17, 0x1f, 0x39, 0x0f, 0xc4,
- 0x01, 0xa5, 0x0c, 0x67, 0x09, 0xa2, 0x0c, 0x25, 0x09, 0x80, 0x0c, 0x21,
- 0x00, 0x15, 0x01, 0x48, 0x01, 0x38, 0x11, 0x88, 0x0f, 0x39, 0x0f, 0xc5,
- 0x01, 0xa4, 0x08, 0x84, 0x00, 0x61, 0x00, 0xe2, 0x0b, 0x19, 0x09, 0xe4,
- 0x09, 0x80, 0x09, 0x81, 0x0f, 0xf1, 0x0a, 0x04, 0x0f, 0xc5, 0x01, 0xb1,
- 0x0f, 0xc4, 0x01, 0x9f, 0x0a, 0x48, 0x0c, 0x01, 0x0c, 0x22, 0x0f, 0xe4,
- 0x00, 0xf0, 0x09, 0x80, 0x0f, 0xe4, 0x00, 0xc0, 0x09, 0xa1, 0x0f, 0xd5,
- 0x00, 0xc0, 0x0f, 0x39, 0x00, 0x61, 0x00, 0xe2, 0x0f, 0xc4, 0x01, 0xa4,
- 0x0b, 0x19, 0x09, 0xe4, 0x09, 0x80, 0x08, 0x84, 0x09, 0x80, 0x09, 0xa1,
- 0x00, 0x14, 0x1f, 0xc4, 0x01, 0x82, 0x1b, 0x21, 0x10, 0x59, 0x19, 0xc0,
- 0x0f, 0xc4, 0x01, 0x9f, 0x0f, 0xc0, 0x00, 0xf0, 0x0f, 0xe1, 0x00, 0xc0,
- 0x0f, 0xd5, 0x00, 0xc0, 0x0f, 0x39, 0x00, 0x61, 0x00, 0xe2, 0x08, 0x84,
- 0x0b, 0x19, 0x09, 0xe4, 0x0f, 0xf0, 0x0a, 0x05, 0x07, 0xb6, 0x09, 0xb2,
- 0x0f, 0xcb, 0x00, 0xac, 0x1f, 0xcb, 0x02, 0xb0, 0x0f, 0xf0, 0x0a, 0x06,
- 0x0c, 0xf2, 0x0f, 0x39, 0x0f, 0xc4, 0x01, 0xa2, 0x0b, 0x21, 0x00, 0x15,
- 0x1f, 0xf9, 0x0d, 0xf2, 0x0f, 0xfb, 0x0d, 0x6d, 0x1f, 0x39, 0x07, 0xb7,
- 0x0f, 0xcb, 0x00, 0xac, 0x1f, 0xcb, 0x02, 0xb0, 0x0f, 0xf1, 0x0a, 0x06,
- 0x0a, 0x4a, 0x0c, 0xa1, 0x0c, 0xd8, 0x09, 0xca, 0x00, 0x21, 0x00, 0x11,
- 0x09, 0xcb, 0x0f, 0xc4, 0x01, 0x42, 0x0c, 0x82, 0x0c, 0xc2, 0x00, 0x21,
- 0x0c, 0x95, 0x1f, 0xf9, 0x0d, 0xe1, 0x0c, 0xd5, 0x1f, 0xf9, 0x0d, 0xe1,
- 0x0f, 0xf1, 0x0a, 0x05, 0x08, 0x84, 0x00, 0xe2, 0x0a, 0x64, 0x09, 0x80,
- 0x08, 0x84, 0x0b, 0x21, 0x0f, 0xc4, 0x01, 0xa4, 0x0b, 0x14, 0x1f, 0xf9,
- 0x0d, 0xe5, 0x0f, 0xc4, 0x01, 0xa3, 0x0f, 0x38, 0x00, 0x00, 0x0f, 0xc4,
- 0x01, 0xa3, 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x09, 0xe1, 0x00, 0xd5,
- 0x1f, 0x39, 0x0f, 0xc4, 0x01, 0xa2, 0x0f, 0xc0, 0x0a, 0xaa, 0x0f, 0x39,
- 0x0f, 0xf9, 0x0d, 0x88, 0x0f, 0x39, 0x0f, 0xc4, 0x01, 0xb6, 0x00, 0x00,
- 0x0f, 0xc4, 0x01, 0xb3, 0x00, 0x00, 0x0f, 0xc4, 0x01, 0xb5, 0x00, 0x00,
- 0x0f, 0xc4, 0x01, 0xb2, 0x08, 0x00, 0x0f, 0xc4, 0x01, 0xb4, 0x0f, 0x38,
- 0x08, 0x00, 0x0f, 0xc4, 0x01, 0xb2, 0x0b, 0x21, 0x00, 0xd9, 0x09, 0xc8,
- 0x09, 0xe1, 0x03, 0x12, 0x19, 0xc8, 0x0c, 0x00, 0x0f, 0xc4, 0x01, 0xb4,
- 0x0b, 0x21, 0x00, 0xd3, 0x09, 0xc8, 0x19, 0xe1, 0x13, 0x19, 0x19, 0xc8,
- 0x0c, 0x00, 0x0f, 0xc4, 0x01, 0xb1, 0x0b, 0x22, 0x0f, 0xe4, 0x00, 0x30,
- 0x09, 0xa1, 0x0f, 0xd5, 0x00, 0x30, 0x1f, 0x39, 0x03, 0xe4, 0x09, 0xa1,
- 0x0f, 0xc4, 0x01, 0xb2, 0x0b, 0x14, 0x09, 0x80, 0x0f, 0xc4, 0x01, 0xb3,
- 0x0b, 0x21, 0x00, 0x19, 0x10, 0x59, 0x09, 0xc0, 0x09, 0xc8, 0x09, 0xa1,
- 0x0f, 0xc4, 0x01, 0xb4, 0x0b, 0x14, 0x09, 0x80, 0x0f, 0xc4, 0x01, 0xb5,
- 0x0b, 0x21, 0x00, 0x19, 0x10, 0x59, 0x09, 0xc0, 0x09, 0xc9, 0x0c, 0x61,
- 0x03, 0x17, 0x1f, 0x39, 0x0c, 0x17, 0x1f, 0xf9, 0x0d, 0xf5, 0x0f, 0xc4,
- 0x01, 0xb6, 0x00, 0x40, 0x0f, 0x39, 0x00, 0xe2, 0x0c, 0x24, 0x09, 0xa1,
- 0x09, 0xa7, 0x09, 0x99, 0x09, 0xc9, 0x0f, 0xc4, 0x01, 0xa4, 0x0b, 0x19,
- 0x09, 0xe4, 0x09, 0x80, 0x08, 0x84, 0x09, 0x80, 0x0f, 0xc4, 0x01, 0xad,
- 0x0b, 0x21, 0x0c, 0x59, 0x09, 0xc0, 0x09, 0xe1, 0x03, 0x12, 0x0f, 0x38,
- 0x19, 0xc0, 0x0f, 0xf1, 0x05, 0x0f, 0x00, 0x04, 0x0f, 0x00, 0x05, 0x84,
- 0x0f, 0xc2, 0x08, 0x00, 0x0a, 0x42, 0x0f, 0xf1, 0x05, 0x10, 0x0f, 0xf6,
- 0x02, 0x99, 0x00, 0x02, 0x05, 0x21, 0x0a, 0x51, 0x01, 0x36, 0x09, 0xc8,
- 0x0f, 0xc4, 0x00, 0xe6, 0x00, 0x37, 0x05, 0x84, 0x0b, 0xaa, 0x0b, 0xab,
- 0x0f, 0xee, 0x01, 0xc0, 0x0b, 0xa7, 0x09, 0xa6, 0x09, 0x89, 0x0c, 0x21,
- 0x0f, 0xd7, 0x1f, 0xff, 0x0f, 0xd0, 0x1f, 0xfd, 0x1f, 0xd9, 0x1f, 0xfd,
- 0x10, 0x09, 0x09, 0xe1, 0x0f, 0xd7, 0x1f, 0xf4, 0x1f, 0xe1, 0x1f, 0xf5,
- 0x0f, 0xd9, 0x0a, 0x80, 0x09, 0xee, 0x0e, 0x48, 0x0c, 0x2a, 0x00, 0x2b,
- 0x0f, 0xee, 0x01, 0xc0, 0x03, 0x61, 0x0c, 0x57, 0x1c, 0x61, 0x0f, 0xd9,
- 0x0a, 0x00, 0x09, 0xee, 0x0f, 0xc4, 0x01, 0x46, 0x0b, 0xa1, 0x0e, 0x18,
- 0x09, 0xca, 0x0b, 0xa1, 0x0e, 0x53, 0x09, 0xcb, 0x10, 0x21, 0x1c, 0x98,
- 0x19, 0xca, 0x1c, 0xd1, 0x19, 0xcb, 0x0f, 0xc4, 0x01, 0x48, 0x0c, 0xa1,
- 0x0b, 0x98, 0x0c, 0xe1, 0x0b, 0x93, 0x1f, 0xf9, 0x0e, 0xd6, 0x0f, 0xc4,
- 0x01, 0x46, 0x0e, 0x02, 0x0e, 0x42, 0x0f, 0xf6, 0x00, 0x47, 0x01, 0x8b,
- 0x1f, 0xf9, 0x0e, 0xd5, 0x0f, 0xf0, 0x05, 0x04, 0x0c, 0x32, 0x0f, 0xf0,
- 0x05, 0x05, 0x07, 0x36, 0x0c, 0x72, 0x1f, 0xf9, 0x0e, 0xc2, 0x0f, 0xf6,
- 0x00, 0x42, 0x01, 0xcb, 0x1f, 0xf0, 0x05, 0x0a, 0x1c, 0x32, 0x1f, 0xf0,
- 0x05, 0x0b, 0x0f, 0xf8, 0x0e, 0xd5, 0x1c, 0x72, 0x0f, 0xf6, 0x00, 0x42,
- 0x01, 0xcb, 0x0f, 0xc4, 0x00, 0x50, 0x0a, 0x85, 0x1f, 0xf0, 0x05, 0x0a,
- 0x1b, 0xb2, 0x1f, 0xf0, 0x05, 0x0b, 0x1b, 0xb2, 0x0f, 0xc4, 0x00, 0x52,
- 0x01, 0x3e, 0x0f, 0xf7, 0x00, 0x2d, 0x0c, 0x03, 0x0c, 0x43, 0x00, 0x3f,
- 0x00, 0x04, 0x0b, 0x39, 0x0f, 0x39, 0x0f, 0xc8, 0x00, 0x80, 0x0f, 0xf7,
- 0x05, 0x5c, 0x0f, 0xf1, 0x03, 0x2d, 0x0f, 0xc4, 0x01, 0xc2, 0x0a, 0x40,
- 0x0f, 0xf0, 0x04, 0x00, 0x00, 0x72, 0x0f, 0xf0, 0x05, 0x11, 0x00, 0x72,
- 0x0f, 0xf1, 0x0a, 0x1f, 0x03, 0xe2, 0x00, 0x61, 0x0f, 0xc4, 0x01, 0xc0,
- 0x0a, 0x64, 0x09, 0x80, 0x0f, 0xc4, 0x05, 0x46, 0x09, 0x99, 0x09, 0xc0,
- 0x0f, 0xc4, 0x05, 0x47, 0x00, 0x00, 0x02, 0xba, 0x00, 0x08, 0x0f, 0xf7,
- 0x0a, 0xc2, 0x0f, 0xf7, 0x0b, 0xb6, 0x0f, 0xfb, 0x0f, 0x73, 0x09, 0x36,
- 0x00, 0x48, 0x0f, 0xf6, 0x05, 0x5c, 0x00, 0x48, 0x0f, 0xf1, 0x03, 0x2d,
- 0x0f, 0xc4, 0x01, 0xc3, 0x0a, 0x40, 0x0f, 0xc4, 0x06, 0x94, 0x0f, 0xc5,
- 0x01, 0x4a, 0x0b, 0xa1, 0x0b, 0xe0, 0x0f, 0xf0, 0x03, 0x2a, 0x09, 0xf2,
- 0x0b, 0xa1, 0x0b, 0xd9, 0x0f, 0xf0, 0x03, 0x29, 0x09, 0xf2, 0x0f, 0xf6,
- 0x05, 0x5c, 0x00, 0x48, 0x0f, 0xc4, 0x06, 0x94, 0x0f, 0xf0, 0x03, 0x2a,
- 0x0b, 0xb2, 0x0f, 0xf0, 0x03, 0x29, 0x0b, 0xb2, 0x0f, 0xf0, 0x05, 0x11,
- 0x00, 0x32, 0x0f, 0xf0, 0x04, 0x00, 0x00, 0x32, 0x0f, 0xf6, 0x05, 0x5c,
- 0x00, 0x48, 0x0f, 0xf0, 0x0a, 0x07, 0x04, 0x32, 0x0f, 0xc4, 0x04, 0xc8,
- 0x0b, 0x21, 0x00, 0x92, 0x1f, 0xf9, 0x0f, 0x3b, 0x04, 0x04, 0x0f, 0xc0,
- 0x00, 0x32, 0x09, 0x04, 0x0f, 0xf8, 0x0f, 0x42, 0x00, 0x80, 0x04, 0x04,
- 0x0f, 0xc0, 0x00, 0x47, 0x0f, 0xfb, 0x16, 0x6c, 0x09, 0x04, 0x00, 0x00,
- 0x08, 0xc4, 0x02, 0xc0, 0x0f, 0xc8, 0x00, 0x41, 0x0f, 0xf7, 0x05, 0x23,
- 0x0f, 0xc4, 0x01, 0xaf, 0x00, 0x00, 0x0f, 0xc4, 0x05, 0x86, 0x00, 0x00,
- 0x02, 0x36, 0x04, 0xc4, 0x0f, 0xc4, 0x05, 0x6e, 0x00, 0x37, 0x0f, 0xc4,
- 0x06, 0x96, 0x02, 0x37, 0x0f, 0xc4, 0x05, 0x71, 0x00, 0x37, 0x0f, 0xf7,
- 0x0b, 0xdb, 0x0f, 0xf7, 0x05, 0xb9, 0x0f, 0xc4, 0x01, 0x71, 0x0b, 0x21,
- 0x00, 0x15, 0x0f, 0xc4, 0x01, 0xc3, 0x0b, 0x21, 0x0f, 0xc4, 0x01, 0xc2,
- 0x0b, 0x11, 0x09, 0xe1, 0x00, 0xd9, 0x10, 0xd9, 0x0f, 0xc4, 0x01, 0xc4,
- 0x09, 0xc0, 0x0f, 0xfa, 0x0e, 0x43, 0x09, 0xc8, 0x07, 0xba, 0x01, 0x88,
- 0x0f, 0x39, 0x0f, 0xfb, 0x10, 0x36, 0x0f, 0xc4, 0x01, 0x07, 0x0f, 0xc5,
- 0x01, 0x04, 0x0b, 0x83, 0x0b, 0x83, 0x0f, 0xfa, 0x10, 0xa4, 0x0b, 0x83,
- 0x0f, 0xfb, 0x10, 0x36, 0x0f, 0xc4, 0x05, 0x49, 0x0b, 0x08, 0x0f, 0xe1,
- 0x07, 0x55, 0x0c, 0x17, 0x1f, 0xf9, 0x0f, 0x8f, 0x00, 0x21, 0x0c, 0x18,
- 0x09, 0xc8, 0x00, 0x11, 0x0f, 0xf8, 0x0f, 0x94, 0x09, 0xc9, 0x00, 0x09,
- 0x0f, 0xe1, 0x08, 0x00, 0x0c, 0x11, 0x09, 0xc8, 0x00, 0xb7, 0x0f, 0xc4,
- 0x01, 0x0a, 0x02, 0xb7, 0x07, 0x04, 0x0f, 0xc2, 0x0a, 0xab, 0x0f, 0xc2,
- 0x0a, 0xaa, 0x0f, 0xc2, 0x07, 0xfe, 0x0f, 0xf7, 0x02, 0x70, 0x04, 0x44,
- 0x00, 0x08, 0x03, 0x61, 0x0b, 0x14, 0x01, 0x36, 0x10, 0x88, 0x0f, 0xc4,
- 0x00, 0xf5, 0x00, 0x37, 0x01, 0x08, 0x00, 0xb6, 0x00, 0x09, 0x0f, 0xc4,
- 0x00, 0xf5, 0x0f, 0xf7, 0x02, 0x93, 0x03, 0xb7, 0x0f, 0xc4, 0x01, 0x4a,
- 0x0c, 0x02, 0x00, 0xb6, 0x0c, 0x42, 0x05, 0x37, 0x04, 0x37, 0x03, 0x37,
- 0x00, 0x08, 0x00, 0xb6, 0x00, 0x09, 0x05, 0x37, 0x04, 0x37, 0x0f, 0xc4,
- 0x00, 0xf8, 0x00, 0x37, 0x03, 0xb7, 0x0f, 0xc4, 0x01, 0x63, 0x03, 0x36,
- 0x0c, 0x00, 0x00, 0xb7, 0x05, 0x37, 0x04, 0x37, 0x0f, 0xc4, 0x06, 0xae,
- 0x00, 0x37, 0x0f, 0xc4, 0x05, 0x74, 0x00, 0x37, 0x0f, 0xc4, 0x00, 0xf8,
- 0x02, 0x37, 0x04, 0x44, 0x02, 0xc8, 0x02, 0xe1, 0x0b, 0x14, 0x01, 0x36,
- 0x13, 0x48, 0x03, 0xb7, 0x0f, 0xc4, 0x01, 0x34, 0x0c, 0x02, 0x0f, 0xfa,
- 0x0c, 0xf8, 0x0c, 0x42, 0x0f, 0x39, 0x0f, 0xf0, 0x05, 0x16, 0x0c, 0x32,
- 0x0f, 0xc4, 0x01, 0x4c, 0x0c, 0x00, 0x0f, 0xf0, 0x05, 0x18, 0x0f, 0x38,
- 0x0c, 0x32, 0x0f, 0xf0, 0x05, 0x32, 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x33,
- 0x0f, 0x38, 0x00, 0x32, 0x0f, 0xf1, 0x05, 0x12, 0x0f, 0xc4, 0x01, 0x4c,
- 0x0c, 0x21, 0x0b, 0x15, 0x1f, 0xfb, 0x0f, 0xe1, 0x1f, 0xf1, 0x05, 0x12,
- 0x0a, 0x49, 0x0f, 0xf1, 0x05, 0x13, 0x0f, 0xc4, 0x01, 0x4c, 0x00, 0x61,
- 0x0b, 0x19, 0x09, 0xc0, 0x0f, 0x38, 0x0a, 0x48, 0x0f, 0xfb, 0x0f, 0xf2,
- 0x0c, 0x2a, 0x0c, 0x6b, 0x0f, 0xee, 0x02, 0x40, 0x03, 0xe2, 0x0c, 0x24,
- 0x0f, 0xee, 0x0a, 0x7e, 0x09, 0x8a, 0x0f, 0xe2, 0x0f, 0xfc, 0x0c, 0x64,
- 0x09, 0x89, 0x0e, 0x24, 0x09, 0x88, 0x00, 0x2a, 0x00, 0x2c, 0x0c, 0x0b,
- 0x00, 0x21, 0x0c, 0x16, 0x19, 0xcb, 0x0c, 0xeb, 0x0c, 0xed, 0x0f, 0xee,
- 0x0c, 0x80, 0x0f, 0xc4, 0x01, 0x0d, 0x0c, 0x02, 0x0c, 0x42, 0x0c, 0x56,
- 0x19, 0xc9, 0x0c, 0x6b, 0x0c, 0x6d, 0x0f, 0xee, 0x0c, 0xc0, 0x0c, 0x82,
- 0x0c, 0xa7, 0x09, 0xa1, 0x05, 0x84, 0x0f, 0xee, 0x0a, 0xd3, 0x0e, 0x02,
- 0x0e, 0x42, 0x0e, 0x99, 0x0f, 0x38, 0x09, 0xc2, 0x04, 0x44, 0x0b, 0x21,
- 0x03, 0x54, 0x1f, 0xf9, 0x10, 0x54, 0x0f, 0xc4, 0x05, 0x49, 0x0b, 0x08,
- 0x0f, 0xfa, 0x0f, 0xe1, 0x00, 0x09, 0x0f, 0xfb, 0x10, 0x06, 0x0f, 0xc4,
- 0x01, 0x07, 0x00, 0x37, 0x0f, 0xc4, 0x00, 0xfe, 0x00, 0x37, 0x0f, 0xc4,
- 0x00, 0xfb, 0x01, 0xb7, 0x0f, 0xc4, 0x01, 0x01, 0x01, 0xb7, 0x0f, 0xc4,
- 0x01, 0x0a, 0x01, 0xb7, 0x0f, 0xf9, 0x0f, 0xeb, 0x0f, 0xc4, 0x05, 0x49,
- 0x0b, 0x21, 0x00, 0x51, 0x09, 0xc8, 0x00, 0x09, 0x00, 0x04, 0x0c, 0x00,
- 0x0f, 0xfb, 0x0f, 0xe1, 0x0f, 0xfb, 0x10, 0x06, 0x0f, 0xf7, 0x04, 0x66,
- 0x03, 0x37, 0x0f, 0xc4, 0x00, 0xfb, 0x00, 0x37, 0x0f, 0xfb, 0x10, 0x99,
- 0x0f, 0xfb, 0x10, 0x06, 0x05, 0x37, 0x0f, 0xc4, 0x00, 0xfe, 0x00, 0x37,
- 0x06, 0x37, 0x03, 0x37, 0x0f, 0xfb, 0x10, 0x99, 0x0f, 0xfb, 0x10, 0x06,
- 0x0f, 0xf7, 0x04, 0x66, 0x05, 0x37, 0x0f, 0xc4, 0x01, 0x01, 0x00, 0x37,
- 0x06, 0x37, 0x0f, 0xc4, 0x01, 0x07, 0x00, 0x37, 0x0f, 0xf7, 0x04, 0x72,
- 0x0f, 0xf7, 0x04, 0x6f, 0x04, 0x37, 0x0f, 0xc4, 0x01, 0x07, 0x0f, 0xf7,
- 0x02, 0x81, 0x07, 0x04, 0x0f, 0xc2, 0x05, 0x3b, 0x0f, 0xc2, 0x08, 0x8c,
- 0x0f, 0xf6, 0x02, 0x70, 0x00, 0x02, 0x0f, 0xc4, 0x01, 0x0a, 0x00, 0x37,
- 0x0f, 0xc4, 0x00, 0xfe, 0x0f, 0xc5, 0x01, 0x07, 0x04, 0xb7, 0x0f, 0xf9,
- 0x0f, 0xeb, 0x00, 0x04, 0x00, 0x61, 0x0f, 0xe2, 0x07, 0xff, 0x0b, 0x19,
- 0x09, 0xe4, 0x09, 0x88, 0x0c, 0x00, 0x0f, 0x38, 0x00, 0x09, 0x0f, 0x39,
- 0x01, 0x84, 0x0f, 0xc0, 0x07, 0xf8, 0x0f, 0xc4, 0x01, 0x04, 0x02, 0x37,
- 0x00, 0x21, 0x0f, 0xc4, 0x07, 0x26, 0x0b, 0x11, 0x01, 0x36, 0x09, 0xc8,
- 0x0f, 0xc4, 0x01, 0x10, 0x00, 0x37, 0x00, 0x36, 0x00, 0x44, 0x0f, 0xc4,
- 0x05, 0x48, 0x0b, 0x08, 0x01, 0xc4, 0x0c, 0x00, 0x01, 0x44, 0x0c, 0x00,
- 0x00, 0x04, 0x00, 0x40, 0x0c, 0x21, 0x01, 0x19, 0x09, 0xe2, 0x0f, 0xe4,
- 0x07, 0xff, 0x09, 0x88, 0x00, 0x09, 0x01, 0x04, 0x0f, 0xfa, 0x0f, 0xe1,
- 0x0c, 0x00, 0x0f, 0xc4, 0x04, 0xc8, 0x00, 0x00, 0x0f, 0xc4, 0x04, 0xc9,
- 0x00, 0x00, 0x0f, 0xc4, 0x04, 0xca, 0x00, 0x00, 0x0f, 0xfb, 0x10, 0x06,
- 0x03, 0x37, 0x0f, 0xc4, 0x01, 0x10, 0x05, 0xb7, 0x0f, 0xfb, 0x00, 0x58,
- 0x1f, 0xf9, 0x10, 0xe7, 0x00, 0x04, 0x0b, 0x21, 0x00, 0x14, 0x1f, 0xf9,
- 0x10, 0xe3, 0x0f, 0xfb, 0x11, 0x1b, 0x01, 0xb6, 0x00, 0x44, 0x0f, 0xf9,
- 0x10, 0xfc, 0x05, 0xb6, 0x00, 0x44, 0x0f, 0xfb, 0x00, 0x58, 0x1f, 0xf9,
- 0x10, 0xf4, 0x00, 0x04, 0x0b, 0x21, 0x00, 0x15, 0x1f, 0xfb, 0x11, 0x1b,
- 0x0f, 0xf9, 0x10, 0xf9, 0x01, 0x04, 0x01, 0x45, 0x0b, 0x01, 0x00, 0x04,
- 0x00, 0x40, 0x0f, 0xf6, 0x00, 0xaf, 0x00, 0x44, 0x01, 0x84, 0x0b, 0x21,
- 0x00, 0x54, 0x1f, 0xf8, 0x11, 0x0d, 0x09, 0xc0, 0x01, 0x04, 0x00, 0x61,
- 0x0f, 0xe2, 0x07, 0xff, 0x0b, 0x19, 0x09, 0xe4, 0x09, 0x88, 0x0c, 0x00,
- 0x0f, 0xf8, 0x10, 0xd2, 0x00, 0x09, 0x0f, 0xfb, 0x0f, 0xeb, 0x0f, 0xc4,
- 0x04, 0xca, 0x0b, 0x21, 0x0f, 0xd9, 0x04, 0xb8, 0x09, 0xc4, 0x0f, 0xc5,
- 0x05, 0x49, 0x0f, 0xfa, 0x12, 0x20, 0x0b, 0x01, 0x0f, 0x39, 0x01, 0x44,
- 0x01, 0xc5, 0x0b, 0x0f, 0x0d, 0xc1, 0x00, 0x04, 0x00, 0x00, 0x0f, 0xc4,
- 0x04, 0xc8, 0x0b, 0x21, 0x04, 0x12, 0x1f, 0x39, 0x0f, 0xd9, 0x04, 0xb8,
- 0x09, 0xc5, 0x0d, 0xc1, 0x00, 0x59, 0x09, 0xc0, 0x00, 0x14, 0x1f, 0x38,
- 0x09, 0xce, 0x0f, 0xc4, 0x04, 0xb8, 0x0d, 0xe1, 0x0b, 0x13, 0x19, 0xe1,
- 0x1f, 0xd9, 0x08, 0x00, 0x09, 0xe1, 0x0f, 0xd2, 0x02, 0x00, 0x1f, 0x39,
- 0x0f, 0xc4, 0x04, 0xc9, 0x0d, 0x80, 0x0f, 0xc4, 0x04, 0xca, 0x0f, 0x38,
- 0x0d, 0x80, 0x0f, 0xc4, 0x04, 0xc9, 0x0b, 0x08, 0x0c, 0x21, 0x0f, 0xc5,
- 0x04, 0xca, 0x0b, 0x49, 0x0c, 0x54, 0x1f, 0x39, 0x0c, 0x40, 0x0c, 0x53,
- 0x0f, 0xe1, 0x04, 0xb8, 0x0c, 0x19, 0x09, 0xc4, 0x0b, 0x0a, 0x0c, 0x59,
- 0x09, 0xc4, 0x0b, 0x0b, 0x0c, 0xa1, 0x1c, 0xe1, 0x0c, 0xd1, 0x1c, 0x91,
- 0x09, 0xcc, 0x09, 0xe1, 0x0f, 0xd2, 0x08, 0x00, 0x19, 0xcc, 0x00, 0x0d,
- 0x0c, 0x21, 0x0c, 0x53, 0x10, 0x21, 0x1d, 0x11, 0x19, 0xcc, 0x1f, 0xcd,
- 0x0f, 0xff, 0x0f, 0xc4, 0x04, 0xcb, 0x0d, 0x00, 0x0d, 0x08, 0x00, 0xb6,
- 0x0d, 0x49, 0x07, 0x04, 0x0f, 0xc2, 0x0a, 0xab, 0x0f, 0xc2, 0x0a, 0xaa,
- 0x0f, 0xc2, 0x07, 0xfe, 0x0f, 0xf7, 0x02, 0x70, 0x07, 0xb7, 0x11, 0x36,
- 0x10, 0x88, 0x03, 0xb7, 0x0f, 0xc4, 0x01, 0x4e, 0x0c, 0x02, 0x0c, 0x42,
- 0x0f, 0xc4, 0x06, 0x94, 0x0b, 0x8a, 0x0b, 0x8b, 0x0f, 0xc4, 0x01, 0x50,
- 0x0c, 0x82, 0x0c, 0xc2, 0x0c, 0xa1, 0x0c, 0x20, 0x09, 0xc8, 0x0c, 0xe1,
- 0x0c, 0x59, 0x0f, 0xf6, 0x09, 0x24, 0x09, 0xc9, 0x04, 0x04, 0x0f, 0xc0,
- 0x00, 0x46, 0x0f, 0xc4, 0x06, 0x01, 0x0f, 0xf6, 0x05, 0xb9, 0x00, 0x40,
- 0x0f, 0x39, 0x0f, 0xc4, 0x01, 0x50, 0x0b, 0x88, 0x0f, 0xf6, 0x09, 0x24,
- 0x0b, 0x89, 0x0f, 0xf6, 0x05, 0x5c, 0x00, 0x48, 0x09, 0x04, 0x00, 0xa1,
- 0x0b, 0x16, 0x04, 0x04, 0x0f, 0xc0, 0x00, 0x32, 0x1f, 0xc0, 0x00, 0x47,
- 0x1f, 0xfb, 0x16, 0x6c, 0x07, 0x37, 0x02, 0xc8, 0x12, 0xc8, 0x08, 0xc4,
- 0x0c, 0x00, 0x0f, 0xc8, 0x00, 0x41, 0x0f, 0xf7, 0x05, 0x23, 0x0f, 0xfa,
- 0x0e, 0x43, 0x00, 0x88, 0x0f, 0xc4, 0x06, 0x01, 0x0f, 0xf4, 0x05, 0xb9,
- 0x04, 0x00, 0x00, 0x21, 0x0f, 0xc4, 0x06, 0xfe, 0x0b, 0x15, 0x1f, 0xf9,
- 0x11, 0xdb, 0x0f, 0xc4, 0x01, 0xb7, 0x0b, 0x15, 0x1f, 0xf9, 0x11, 0xdb,
- 0x0f, 0xc4, 0x01, 0xc5, 0x0f, 0xc0, 0x00, 0x47, 0x0f, 0xc4, 0x05, 0xe8,
- 0x0b, 0x21, 0x00, 0x15, 0x1f, 0xf9, 0x11, 0xe2, 0x0f, 0xc4, 0x01, 0xc6,
- 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x0f, 0xd2, 0x00, 0x46, 0x11, 0x38,
- 0x11, 0x88, 0x0f, 0xc8, 0x00, 0x47, 0x08, 0xbb, 0x0f, 0x39, 0x04, 0x04,
- 0x0f, 0xc0, 0x00, 0x32, 0x0f, 0xc8, 0x00, 0x3c, 0x08, 0xbb, 0x0f, 0x39,
- 0x04, 0x3b, 0x0f, 0xf7, 0x0c, 0x13, 0x0f, 0xf7, 0x0c, 0x97, 0x0f, 0xc4,
- 0x01, 0x70, 0x0b, 0x21, 0x0f, 0xc4, 0x06, 0xff, 0x0b, 0x12, 0x1f, 0xf9,
- 0x12, 0x07, 0x0f, 0xc4, 0x01, 0xc5, 0x0b, 0x21, 0x0f, 0xd5, 0x00, 0x47,
- 0x1f, 0xf9, 0x12, 0x07, 0x0f, 0xfb, 0x16, 0x8b, 0x09, 0x3b, 0x0f, 0xfb,
- 0x0c, 0xf8, 0x0f, 0xfb, 0x13, 0xae, 0x04, 0x04, 0x0f, 0xc5, 0x01, 0xc5,
- 0x0b, 0x01, 0x0f, 0xc0, 0x00, 0x47, 0x0f, 0xf7, 0x05, 0x9d, 0x0f, 0xf9,
- 0x11, 0xe2, 0x07, 0xb7, 0x1f, 0xf6, 0x05, 0x5c, 0x10, 0x48, 0x09, 0x3b,
- 0x0f, 0xe1, 0x00, 0x47, 0x04, 0x04, 0x0b, 0x15, 0x19, 0x45, 0x1f, 0xc4,
- 0x00, 0x80, 0x1f, 0xf7, 0x00, 0xa4, 0x0f, 0xc4, 0x01, 0xc5, 0x0b, 0x15,
- 0x19, 0x45, 0x1f, 0xc4, 0x00, 0x80, 0x1f, 0xf7, 0x00, 0xa4, 0x0f, 0xfb,
- 0x12, 0x46, 0x0f, 0x39, 0x09, 0x04, 0x00, 0x00, 0x0f, 0xc4, 0x04, 0xc9,
- 0x0f, 0xc5, 0x04, 0xce, 0x0b, 0x01, 0x0f, 0xc5, 0x04, 0xcf, 0x0b, 0x01,
- 0x0f, 0xc5, 0x04, 0xcc, 0x00, 0x01, 0x0f, 0xc5, 0x04, 0xcd, 0x00, 0x01,
- 0x0f, 0xc5, 0x04, 0xd0, 0x00, 0x41, 0x0f, 0xc5, 0x04, 0xd5, 0x00, 0x01,
- 0x0f, 0xc5, 0x04, 0xd1, 0x0b, 0x01, 0x02, 0x36, 0x09, 0x44, 0x0f, 0xc8,
- 0x1f, 0xfc, 0x01, 0x37, 0x0f, 0xc4, 0x04, 0xd2, 0x00, 0x37, 0x0f, 0xfb,
- 0x16, 0x2f, 0x0f, 0xfb, 0x16, 0x6c, 0x0f, 0x39, 0x0f, 0xc4, 0x00, 0x80,
- 0x02, 0x37, 0x0f, 0xc4, 0x04, 0xc9, 0x0b, 0x21, 0x0b, 0x27, 0x09, 0x99,
- 0x09, 0xe1, 0x0f, 0xd9, 0x04, 0xd6, 0x00, 0x36, 0x09, 0xc4, 0x0f, 0xc4,
- 0x04, 0xd2, 0x0f, 0xf7, 0x00, 0xbd, 0x0f, 0xc4, 0x00, 0x80, 0x05, 0xb7,
- 0x0f, 0xfb, 0x00, 0x58, 0x0f, 0xc4, 0x04, 0xd0, 0x0b, 0x0c, 0x1f, 0xf8,
- 0x12, 0x65, 0x00, 0x21, 0x0f, 0xf8, 0x12, 0x75, 0x0d, 0x15, 0x0f, 0xc4,
- 0x04, 0xd2, 0x0f, 0xf7, 0x00, 0xb2, 0x0f, 0xc4, 0x04, 0xd1, 0x0f, 0xc5,
- 0x04, 0xc9, 0x0b, 0x40, 0x0f, 0xc4, 0x04, 0xd5, 0x0b, 0x14, 0x1f, 0xf8,
- 0x12, 0x7a, 0x10, 0x40, 0x0d, 0x14, 0x0f, 0xc5, 0x04, 0xcc, 0x1f, 0xc5,
- 0x04, 0xcd, 0x00, 0x41, 0x0f, 0xc4, 0x04, 0xcc, 0x0b, 0x88, 0x0b, 0x89,
- 0x0b, 0x8a, 0x0b, 0x8b, 0x00, 0x21, 0x0c, 0x15, 0x1f, 0xf9, 0x12, 0x8c,
- 0x0c, 0xa1, 0x00, 0x51, 0x09, 0xca, 0x09, 0xe1, 0x0f, 0xd7, 0x1f, 0xff,
- 0x10, 0x0a, 0x10, 0x48, 0x00, 0x21, 0x0c, 0x55, 0x1f, 0xf9, 0x12, 0x9a,
- 0x0c, 0xe1, 0x00, 0x59, 0x09, 0xe1, 0x0f, 0xc4, 0x04, 0xc8, 0x0b, 0x12,
- 0x00, 0x11, 0x10, 0x51, 0x09, 0xcb, 0x10, 0x49, 0x00, 0x21, 0x0d, 0x15,
- 0x1f, 0xf9, 0x12, 0xa4, 0x0c, 0x0d, 0x0d, 0x55, 0x10, 0x4c, 0x0f, 0xf8,
- 0x12, 0xa8, 0x1c, 0x4d, 0x0c, 0x4d, 0x0d, 0x55, 0x10, 0x0c, 0x1c, 0x0d,
- 0x0f, 0xc4, 0x04, 0xcc, 0x0c, 0x02, 0x0c, 0x42, 0x0f, 0xc4, 0x04, 0xd0,
- 0x0d, 0x00, 0x0d, 0x54, 0x1f, 0xf9, 0x12, 0xbf, 0x0f, 0xc4, 0x04, 0xca,
- 0x0f, 0xc5, 0x04, 0xd1, 0x0b, 0x40, 0x04, 0x04, 0x0f, 0xc0, 0x00, 0x32,
- 0x09, 0x04, 0x0f, 0xfa, 0x11, 0x41, 0x00, 0x80, 0x0f, 0x39, 0x0d, 0x15,
- 0x0c, 0x8d, 0x0f, 0xc4, 0x04, 0xce, 0x1c, 0xcd, 0x1f, 0xc4, 0x04, 0xcf,
- 0x0d, 0x40, 0x0f, 0xc4, 0x04, 0xca, 0x0f, 0xfa, 0x11, 0x41, 0x0d, 0x40,
- 0x09, 0x04, 0x0f, 0x38, 0x00, 0x00, 0x07, 0x37, 0x0f, 0xf0, 0x0b, 0x08,
- 0x0f, 0xf2, 0x00, 0x3f, 0x0f, 0xf0, 0x0b, 0x09, 0x0f, 0xf2, 0x0d, 0x59,
- 0x1f, 0xf2, 0x07, 0x4d, 0x0f, 0xf0, 0x0b, 0x10, 0x0f, 0xf2, 0x00, 0x87,
- 0x1f, 0xf2, 0x01, 0x47, 0x0f, 0xf0, 0x0b, 0x11, 0x0f, 0xf2, 0x03, 0x12,
- 0x0f, 0xf0, 0x0b, 0x12, 0x0f, 0xf2, 0x06, 0x61, 0x0f, 0xf0, 0x0b, 0x13,
- 0x0f, 0xf2, 0x0b, 0xbf, 0x0f, 0xc4, 0x06, 0xc9, 0x0f, 0xc2, 0x0c, 0xcd,
- 0x0f, 0xc2, 0x07, 0xfe, 0x1f, 0xc4, 0x06, 0xc9, 0x1f, 0xc2, 0x0a, 0xe1,
- 0x1f, 0xc2, 0x07, 0xfd, 0x0f, 0x39, 0x0f, 0xc4, 0x01, 0xd9, 0x08, 0x02,
- 0x00, 0x02, 0x0f, 0xc2, 0x0b, 0xb5, 0x0f, 0xc2, 0x07, 0xf0, 0x00, 0x02,
- 0x0f, 0xc2, 0x0b, 0xb4, 0x0f, 0xc2, 0x07, 0xf0, 0x00, 0x02, 0x0f, 0xc2,
- 0x0a, 0x5b, 0x0f, 0xc2, 0x07, 0xff, 0x00, 0x02, 0x0f, 0xc2, 0x0d, 0xdf,
- 0x0f, 0xc2, 0x07, 0xfa, 0x00, 0x02, 0x0f, 0xc2, 0x0a, 0x22, 0x00, 0x02,
- 0x00, 0x02, 0x0f, 0xc2, 0x0a, 0x2f, 0x0f, 0xc2, 0x07, 0xf2, 0x00, 0x02,
- 0x0f, 0xc2, 0x0b, 0x40, 0x0f, 0xc2, 0x07, 0xfa, 0x00, 0x02, 0x0f, 0xc2,
- 0x0c, 0x52, 0x00, 0x02, 0x00, 0x02, 0x0f, 0xc2, 0x08, 0x00, 0x00, 0x42,
- 0x00, 0x02, 0x0f, 0xc2, 0x0c, 0xb5, 0x0f, 0xc2, 0x07, 0xfb, 0x00, 0x02,
- 0x0f, 0xc2, 0x0f, 0x98, 0x0f, 0xc2, 0x07, 0xfa, 0x00, 0x02, 0x0f, 0xc2,
- 0x0b, 0x23, 0x0f, 0xc2, 0x07, 0xfa, 0x00, 0x02, 0x0f, 0xc2, 0x08, 0x40,
- 0x0f, 0xc2, 0x07, 0xfa, 0x00, 0x02, 0x0f, 0xc2, 0x0d, 0x4e, 0x0f, 0xc2,
- 0x07, 0xf9, 0x00, 0x02, 0x0f, 0xc2, 0x0d, 0xc5, 0x00, 0x02, 0x00, 0x02,
- 0x0f, 0xc2, 0x09, 0x06, 0x00, 0x42, 0x07, 0xc4, 0x0a, 0x8f, 0x0f, 0xc2,
- 0x04, 0xf3, 0x0f, 0xc2, 0x0b, 0x50, 0x00, 0x02, 0x0d, 0xc4, 0x08, 0x3a,
- 0x0d, 0xc5, 0x0f, 0xc4, 0x06, 0xcb, 0x00, 0x37, 0x06, 0xb6, 0x0d, 0xc4,
- 0x0f, 0xc4, 0x06, 0xce, 0x00, 0x37, 0x06, 0xb6, 0x0d, 0xc4, 0x0f, 0xc4,
- 0x06, 0xd1, 0x00, 0x37, 0x06, 0xb6, 0x0d, 0xc4, 0x0f, 0xc4, 0x06, 0xd4,
- 0x00, 0x37, 0x06, 0xb6, 0x0d, 0xc4, 0x0f, 0xc4, 0x06, 0xd7, 0x00, 0x37,
- 0x0f, 0xc4, 0x06, 0xda, 0x00, 0x02, 0x0f, 0xc2, 0x0c, 0x00, 0x0f, 0x38,
- 0x00, 0xc2, 0x0f, 0xf1, 0x0a, 0x36, 0x0f, 0xc5, 0x01, 0x52, 0x0f, 0xc4,
- 0x01, 0xd9, 0x07, 0x36, 0x0b, 0x0a, 0x0a, 0x43, 0x0f, 0xf1, 0x0a, 0x37,
- 0x1c, 0xa7, 0x19, 0xa7, 0x19, 0x8a, 0x0f, 0xc4, 0x01, 0xc9, 0x0c, 0x80,
- 0x0f, 0xc4, 0x01, 0xc8, 0x0b, 0x0c, 0x0d, 0x21, 0x00, 0x59, 0x09, 0xcb,
- 0x0a, 0x43, 0x0c, 0x97, 0x1c, 0xcc, 0x0f, 0xc5, 0x01, 0xc7, 0x00, 0x21,
- 0x0b, 0x55, 0x00, 0x01, 0x10, 0x0c, 0x0f, 0xc5, 0x01, 0x6e, 0x0b, 0x55,
- 0x00, 0x01, 0x1f, 0xc5, 0x01, 0xcb, 0x10, 0x41, 0x1f, 0xc5, 0x01, 0xcc,
- 0x10, 0x01, 0x1f, 0xc5, 0x01, 0xc7, 0x10, 0x41, 0x1c, 0xa1, 0x10, 0x59,
- 0x19, 0xcc, 0x0d, 0x00, 0x0d, 0x21, 0x0c, 0x92, 0x0f, 0xc4, 0x01, 0xca,
- 0x0b, 0x22, 0x00, 0xe4, 0x09, 0xa2, 0x03, 0x25, 0x10, 0x25, 0x0f, 0xf0,
- 0x0a, 0x2f, 0x09, 0xb2, 0x0f, 0x38, 0x09, 0x80, 0x0f, 0xc4, 0x01, 0xc8,
- 0x0b, 0x21, 0x0f, 0xc4, 0x01, 0xc9, 0x0b, 0x16, 0x1f, 0xf9, 0x14, 0x13,
- 0x0f, 0xc4, 0x01, 0xcb, 0x00, 0x00, 0x00, 0x15, 0x0f, 0xc5, 0x01, 0x52,
- 0x1f, 0xf9, 0x13, 0xc2, 0x0f, 0xc4, 0x05, 0x0b, 0x0f, 0x38, 0x0b, 0xc0,
- 0x0b, 0xc8, 0x0c, 0x2a, 0x00, 0x2b, 0x0c, 0x2c, 0x00, 0x2d, 0x0f, 0xee,
- 0x0c, 0x80, 0x0f, 0xe1, 0x0a, 0x00, 0x0b, 0xc9, 0x0c, 0x59, 0x09, 0xe1,
- 0x0c, 0x59, 0x09, 0xee, 0x0f, 0xce, 0x05, 0x06, 0x0d, 0x84, 0x0b, 0xaa,
- 0x0b, 0xab, 0x0b, 0xac, 0x0b, 0xad, 0x0f, 0xef, 0x08, 0x40, 0x1f, 0xf9,
- 0x13, 0xe9, 0x0d, 0x84, 0x0f, 0xee, 0x05, 0x00, 0x0e, 0x02, 0x0e, 0x42,
- 0x0f, 0xee, 0x05, 0x40, 0x0e, 0x02, 0x0e, 0x42, 0x0f, 0xc4, 0x05, 0x0a,
- 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x0f, 0xf1, 0x05, 0x0f, 0x0f, 0xee,
- 0x03, 0x80, 0x0f, 0xe1, 0x09, 0xf8, 0x00, 0x2d, 0x0f, 0xcf, 0x05, 0x10,
- 0x0a, 0x6c, 0x0d, 0xf1, 0x0f, 0xee, 0x02, 0x80, 0x0f, 0xce, 0x05, 0x0c,
- 0x0d, 0x84, 0x0b, 0xaa, 0x0b, 0xab, 0x0b, 0xac, 0x0b, 0xad, 0x0a, 0x59,
- 0x09, 0xee, 0x0f, 0xcd, 0x05, 0x00, 0x0f, 0xcc, 0x05, 0x40, 0x0f, 0xef,
- 0x08, 0x40, 0x1f, 0x39, 0x0d, 0x84, 0x0d, 0x6e, 0x0e, 0x02, 0x0e, 0x42,
- 0x0d, 0x2e, 0x0e, 0x02, 0x0e, 0x42, 0x0f, 0xc4, 0x05, 0x10, 0x0b, 0x21,
- 0x00, 0x59, 0x0f, 0x38, 0x09, 0xc0, 0x0f, 0xc4, 0x01, 0xcb, 0x0b, 0x21,
- 0x00, 0x15, 0x1f, 0x39, 0x00, 0x40, 0x0f, 0xc4, 0x01, 0xcc, 0x0b, 0x21,
- 0x00, 0x59, 0x09, 0xc8, 0x09, 0xe1, 0x01, 0x17, 0x1c, 0x00, 0x00, 0x54,
- 0x1f, 0xc8, 0x14, 0x26, 0x15, 0x3b, 0x0f, 0x39, 0x0f, 0xc4, 0x01, 0xcc,
- 0x0b, 0x21, 0x00, 0x14, 0x1f, 0x39, 0x0f, 0xc4, 0x05, 0x06, 0x0f, 0xc5,
- 0x05, 0x11, 0x0b, 0x03, 0x00, 0x02, 0x0b, 0x03, 0x00, 0x02, 0x0b, 0x03,
- 0x00, 0x02, 0x0b, 0x03, 0x00, 0x02, 0x0f, 0xc4, 0x05, 0x0a, 0x0f, 0xc5,
- 0x05, 0x15, 0x0b, 0x03, 0x00, 0x02, 0x0f, 0xc4, 0x05, 0x0b, 0x0f, 0xc5,
- 0x05, 0x16, 0x0b, 0x03, 0x00, 0x02, 0x0f, 0xc4, 0x05, 0x0c, 0x0f, 0xc5,
- 0x05, 0x17, 0x0b, 0x03, 0x00, 0x02, 0x0b, 0x03, 0x00, 0x02, 0x0b, 0x03,
- 0x00, 0x02, 0x0b, 0x03, 0x00, 0x02, 0x0f, 0xc4, 0x05, 0x10, 0x0f, 0xc5,
- 0x05, 0x1b, 0x0b, 0x03, 0x00, 0x02, 0x0f, 0xc4, 0x01, 0xc7, 0x00, 0x40,
- 0x0f, 0xc4, 0x05, 0x11, 0x0b, 0xaa, 0x0b, 0xab, 0x0b, 0xac, 0x0b, 0xad,
- 0x0f, 0xee, 0x03, 0x00, 0x0f, 0xee, 0x0a, 0xef, 0x0f, 0xee, 0x09, 0x00,
- 0x07, 0xc4, 0x0f, 0xe2, 0x00, 0x3f, 0x0e, 0x02, 0x0e, 0x42, 0x0e, 0xa4,
- 0x09, 0x82, 0x0f, 0xf6, 0x00, 0xbd, 0x07, 0xc4, 0x0f, 0xc4, 0x05, 0x16,
- 0x0b, 0x2a, 0x0b, 0x2c, 0x0f, 0xee, 0x0d, 0x40, 0x0e, 0x2a, 0x0e, 0x6b,
- 0x0f, 0xc4, 0x05, 0x15, 0x0b, 0x2c, 0x00, 0x2d, 0x0f, 0xee, 0x0c, 0x80,
- 0x0f, 0xee, 0x0a, 0xef, 0x0f, 0xee, 0x09, 0x00, 0x07, 0x04, 0x0f, 0xe2,
- 0x00, 0x3f, 0x0e, 0x02, 0x0e, 0x42, 0x0e, 0xa4, 0x0f, 0xf6, 0x02, 0x09,
- 0x09, 0x82, 0x0f, 0xc4, 0x00, 0x7d, 0x00, 0x37, 0x0f, 0xc4, 0x01, 0xcc,
- 0x0b, 0x21, 0x00, 0x15, 0x1f, 0xc4, 0x01, 0x6f, 0x01, 0xba, 0x10, 0x40,
- 0x0f, 0xc4, 0x00, 0x7d, 0x02, 0x37, 0x07, 0x37, 0x0f, 0xc4, 0x01, 0xda,
- 0x1f, 0xc4, 0x01, 0xdd, 0x06, 0xb7, 0x0f, 0xc4, 0x01, 0x1c, 0x00, 0x37,
- 0x0f, 0xf1, 0x0a, 0x07, 0x0f, 0xc4, 0x01, 0xe0, 0x06, 0xb7, 0x04, 0x21,
- 0x0a, 0x54, 0x0f, 0xf1, 0x0a, 0x10, 0x1f, 0xf9, 0x14, 0xc6, 0x00, 0x2a,
- 0x09, 0xeb, 0x0f, 0xee, 0x01, 0xc0, 0x0f, 0xee, 0x0a, 0xcb, 0x0f, 0xf7,
- 0x04, 0x66, 0x05, 0x84, 0x0e, 0x02, 0x0e, 0x42, 0x0e, 0x82, 0x0f, 0xc4,
- 0x01, 0xe3, 0x06, 0xb7, 0x0f, 0xc4, 0x00, 0x9e, 0x0f, 0xf7, 0x02, 0x81,
- 0x0f, 0xfb, 0x01, 0x1c, 0x0f, 0xf7, 0x04, 0x72, 0x0f, 0xf7, 0x02, 0x70,
- 0x0f, 0xf9, 0x14, 0xd0, 0x07, 0xb7, 0x1f, 0xf9, 0x14, 0xd0, 0x0a, 0x61,
- 0x00, 0x14, 0x1f, 0xf9, 0x14, 0xd0, 0x0f, 0xc4, 0x01, 0xe6, 0x06, 0xb7,
- 0x0f, 0xc4, 0x01, 0x13, 0x00, 0x37, 0x0f, 0xc4, 0x01, 0x1c, 0x02, 0x37,
- 0x0f, 0xfb, 0x01, 0x0c, 0x0f, 0xf7, 0x00, 0x8f, 0x0f, 0xc4, 0x01, 0x22,
- 0x00, 0x37, 0x0f, 0xc4, 0x01, 0x22, 0x0f, 0xc5, 0x00, 0xa7, 0x08, 0x3b,
- 0x03, 0xb7, 0x00, 0x21, 0x0c, 0x55, 0x1f, 0xc8, 0x0f, 0xff, 0x0f, 0xc4,
- 0x01, 0x79, 0x01, 0xba, 0x0c, 0x00, 0x0f, 0xc4, 0x01, 0x13, 0x02, 0x37,
- 0x0f, 0xfb, 0x01, 0x0c, 0x0f, 0xf7, 0x00, 0x8f, 0x0f, 0xc4, 0x06, 0xdd,
- 0x00, 0x37, 0x0f, 0xc4, 0x00, 0xa7, 0x06, 0xb7, 0x03, 0xb7, 0x00, 0x21,
- 0x0c, 0x55, 0x1f, 0xc8, 0x0f, 0xff, 0x0f, 0xf0, 0x0f, 0x16, 0x0c, 0x32,
- 0x0f, 0xc4, 0x01, 0x78, 0x0c, 0x00, 0x0f, 0xc4, 0x01, 0x7f, 0x0c, 0x00,
- 0x0f, 0xfa, 0x03, 0x00, 0x08, 0x08, 0x0f, 0xc4, 0x05, 0x17, 0x0b, 0xaa,
- 0x0b, 0xab, 0x0b, 0xac, 0x0b, 0xad, 0x0f, 0xee, 0x03, 0x00, 0x0f, 0xee,
- 0x0a, 0xef, 0x0f, 0xf1, 0x05, 0x04, 0x0a, 0x4f, 0x0f, 0xf1, 0x05, 0x05,
- 0x0f, 0xee, 0x09, 0x00, 0x0f, 0xe2, 0x00, 0x3f, 0x02, 0x21, 0x07, 0xc4,
- 0x0e, 0x02, 0x0e, 0x42, 0x0e, 0xa4, 0x09, 0x99, 0x09, 0xc2, 0x0f, 0xc4,
- 0x01, 0x54, 0x0d, 0xc2, 0x01, 0xba, 0x0a, 0x42, 0x0f, 0xf6, 0x00, 0xbd,
- 0x07, 0xc4, 0x0f, 0xc4, 0x05, 0x1b, 0x00, 0x2a, 0x0b, 0x2b, 0x0f, 0xee,
- 0x01, 0xc0, 0x0f, 0xee, 0x0a, 0xcb, 0x07, 0x04, 0x00, 0x02, 0x0e, 0x42,
- 0x0f, 0xf6, 0x02, 0x09, 0x0e, 0x82, 0x0f, 0xc4, 0x01, 0x54, 0x0b, 0x8f,
- 0x00, 0x21, 0x0d, 0xd5, 0x10, 0x2a, 0x1d, 0xeb, 0x1f, 0xee, 0x01, 0xc0,
- 0x1f, 0xe1, 0x0b, 0x02, 0x1b, 0x99, 0x19, 0xee, 0x17, 0x04, 0x1e, 0x02,
- 0x1e, 0x42, 0x1e, 0xa2, 0x1f, 0xe4, 0x07, 0xff, 0x1f, 0xf6, 0x02, 0x70,
- 0x19, 0x82, 0x0f, 0xc4, 0x01, 0xe9, 0x06, 0xb7, 0x07, 0x37, 0x11, 0x36,
- 0x10, 0x88, 0x0f, 0xc4, 0x01, 0x1f, 0x00, 0x37, 0x01, 0xbb, 0x0f, 0xc4,
- 0x06, 0xc7, 0x0b, 0x21, 0x00, 0x15, 0x1f, 0xf9, 0x15, 0x68, 0x0f, 0xc4,
- 0x01, 0x1f, 0x02, 0x37, 0x0f, 0xfb, 0x01, 0x14, 0x0f, 0xc4, 0x06, 0xe0,
- 0x0f, 0xf9, 0x15, 0x72, 0x0f, 0xc4, 0x06, 0xe0, 0x0f, 0xc5, 0x00, 0xa1,
- 0x0f, 0xf7, 0x02, 0x7d, 0x0f, 0xfb, 0x01, 0x1c, 0x0f, 0xc4, 0x01, 0x1f,
- 0x00, 0x37, 0x0f, 0xc4, 0x01, 0x1f, 0x02, 0x37, 0x0f, 0xc4, 0x01, 0xec,
- 0x06, 0xb7, 0x0f, 0xc4, 0x01, 0x16, 0x00, 0x37, 0x0f, 0xc4, 0x01, 0x6c,
- 0x0b, 0x22, 0x0f, 0xe4, 0x00, 0x38, 0x09, 0xa1, 0x0f, 0xc4, 0x01, 0xf5,
- 0x02, 0x14, 0x1f, 0xc4, 0x01, 0xf8, 0x04, 0x14, 0x1f, 0xc4, 0x01, 0xfb,
- 0x06, 0x14, 0x1f, 0xc4, 0x01, 0xfe, 0x08, 0x14, 0x1f, 0xc4, 0x02, 0x01,
- 0x0f, 0xe4, 0x0c, 0x00, 0x09, 0xa1, 0x0f, 0xc5, 0x06, 0x2b, 0x0f, 0xd4,
- 0x04, 0x00, 0x1f, 0xc5, 0x02, 0x04, 0x00, 0x14, 0x1f, 0xc5, 0x02, 0x07,
- 0x08, 0x3b, 0x0f, 0xc4, 0x01, 0x7e, 0x0b, 0x21, 0x00, 0x15, 0x11, 0x36,
- 0x10, 0x88, 0x0f, 0xc4, 0x01, 0x25, 0x00, 0x37, 0x0f, 0xc4, 0x01, 0x16,
- 0x06, 0xb7, 0x0f, 0xc4, 0x01, 0x16, 0x06, 0xb7, 0x07, 0x37, 0x0f, 0xc4,
- 0x01, 0xef, 0x1f, 0xc4, 0x01, 0xf2, 0x06, 0xb7, 0x0f, 0xc4, 0x01, 0x19,
- 0x00, 0x37, 0x01, 0xbb, 0x0f, 0xc4, 0x01, 0xcd, 0x0f, 0xc0, 0x06, 0xc8,
- 0x0f, 0xc4, 0x01, 0xce, 0x0f, 0xc0, 0x05, 0x1c, 0x04, 0xbb, 0x04, 0xbb,
- 0x04, 0xbb, 0x04, 0xbb, 0x04, 0xbb, 0x04, 0xbb, 0x01, 0xbb, 0x04, 0xbb,
- 0x0f, 0xc4, 0x05, 0x1c, 0x0f, 0xc8, 0x0a, 0x24, 0x00, 0x61, 0x01, 0xfe,
- 0x0f, 0xfd, 0x15, 0xd2, 0x00, 0x3f, 0x0c, 0x30, 0x0b, 0xb2, 0x0c, 0x19,
- 0x09, 0xc8, 0x0f, 0xc4, 0x01, 0xcc, 0x0b, 0x21, 0x00, 0x14, 0x1f, 0x39,
- 0x00, 0x54, 0x1f, 0x38, 0x09, 0xc0, 0x01, 0xbb, 0x0f, 0xf8, 0x14, 0x26,
- 0x0f, 0xc4, 0x01, 0xcd, 0x0b, 0x05, 0x0b, 0xc8, 0x0b, 0xc9, 0x0b, 0xca,
- 0x0a, 0xc0, 0x05, 0x84, 0x0c, 0x02, 0x0c, 0x42, 0x0c, 0x82, 0x0f, 0xc4,
- 0x01, 0x19, 0x06, 0xb7, 0x0f, 0xc4, 0x01, 0x80, 0x0b, 0x21, 0x00, 0x15,
- 0x1f, 0xf9, 0x16, 0x0c, 0x05, 0x84, 0x0b, 0xaa, 0x0b, 0xab, 0x0f, 0xee,
- 0x01, 0xc0, 0x0f, 0xee, 0x0a, 0x7a, 0x0b, 0xa7, 0x09, 0xa6, 0x09, 0xa1,
- 0x01, 0x51, 0x09, 0xc8, 0x01, 0x16, 0x1f, 0xf9, 0x16, 0x24, 0x0c, 0x21,
- 0x0f, 0xd7, 0x1f, 0xfa, 0x1f, 0xe1, 0x1f, 0xfa, 0x0f, 0xd9, 0x0a, 0x80,
- 0x09, 0xee, 0x0f, 0xf8, 0x16, 0x24, 0x00, 0x08, 0x05, 0x84, 0x0b, 0xaa,
- 0x0b, 0xab, 0x0f, 0xee, 0x01, 0xc0, 0x0f, 0xee, 0x0a, 0x7b, 0x0b, 0xa7,
- 0x09, 0xa6, 0x09, 0xa1, 0x01, 0x91, 0x09, 0xc8, 0x01, 0x56, 0x1f, 0xf9,
- 0x16, 0x24, 0x0c, 0x21, 0x0f, 0xd7, 0x1f, 0xf9, 0x1f, 0xe1, 0x1f, 0xf9,
- 0x0f, 0xd9, 0x0a, 0x80, 0x09, 0xee, 0x00, 0x08, 0x0f, 0xf6, 0x00, 0x26,
- 0x0c, 0x27, 0x09, 0xa2, 0x0e, 0x65, 0x0f, 0xc4, 0x01, 0xce, 0x0b, 0x05,
- 0x09, 0x83, 0x0f, 0x38, 0x0a, 0xc0, 0x0f, 0xc4, 0x01, 0xcf, 0x00, 0x00,
- 0x02, 0x04, 0x0f, 0xc2, 0x00, 0x28, 0x0f, 0xc2, 0x00, 0x29, 0x0f, 0xc2,
- 0x00, 0x2b, 0x0f, 0xc2, 0x00, 0x2d, 0x0f, 0xc2, 0x00, 0x2f, 0x0f, 0xc2,
- 0x00, 0x33, 0x0f, 0xc2, 0x00, 0x37, 0x0f, 0xc2, 0x00, 0x3b, 0x0f, 0xc4,
- 0x00, 0x28, 0x0f, 0xc2, 0x00, 0x88, 0x0f, 0xc2, 0x00, 0x3d, 0x0f, 0xc2,
- 0x00, 0xb6, 0x0f, 0xc2, 0x00, 0x56, 0x0f, 0xc2, 0x00, 0xac, 0x0f, 0xc2,
- 0x00, 0x6b, 0x0f, 0xc2, 0x00, 0xa0, 0x07, 0x82, 0x0f, 0xc2, 0x00, 0x59,
- 0x0f, 0xc2, 0x00, 0x94, 0x0f, 0xc2, 0x00, 0xcf, 0x0f, 0xc2, 0x00, 0x32,
- 0x0f, 0xc2, 0x00, 0x63, 0x0f, 0xc2, 0x00, 0x95, 0x0f, 0xc2, 0x00, 0xc6,
- 0x0f, 0xc2, 0x00, 0x4a, 0x0f, 0xc2, 0x00, 0x6f, 0x0f, 0xc2, 0x00, 0x94,
- 0x0f, 0xc2, 0x00, 0xb9, 0x0f, 0x38, 0x00, 0x02, 0x0f, 0xc4, 0x01, 0x70,
- 0x00, 0x00, 0x0f, 0xc4, 0x00, 0x6c, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02,
- 0x0f, 0x38, 0x00, 0x02, 0x00, 0x21, 0x0c, 0x16, 0x19, 0xc8, 0x0d, 0x09,
- 0x0c, 0x84, 0x0c, 0xfe, 0x0f, 0xfd, 0x16, 0x86, 0x0b, 0xa1, 0x0c, 0x17,
- 0x09, 0xce, 0x10, 0x21, 0x1d, 0x91, 0x19, 0xce, 0x0c, 0x61, 0x0d, 0x96,
- 0x1d, 0x89, 0x0c, 0x6a, 0x0c, 0x6c, 0x0f, 0x38, 0x0d, 0x6e, 0x0f, 0xc4,
- 0x05, 0xeb, 0x0b, 0x08, 0x0f, 0xc4, 0x05, 0xea, 0x0b, 0x09, 0x00, 0x0a,
- 0x0c, 0x61, 0x00, 0x14, 0x1f, 0xf9, 0x16, 0xaa, 0x00, 0x55, 0x1f, 0xf9,
- 0x16, 0xa1, 0x00, 0x4a, 0x0c, 0x21, 0x00, 0x94, 0x10, 0x8a, 0x00, 0xd4,
- 0x0f, 0xf8, 0x16, 0xaa, 0x10, 0xca, 0x00, 0x55, 0x1f, 0xf9, 0x16, 0xaa,
- 0x01, 0x0a, 0x0c, 0x21, 0x00, 0x94, 0x11, 0x4a, 0x00, 0xd4, 0x11, 0x8a,
- 0x0f, 0xc4, 0x01, 0xcf, 0x0c, 0x80, 0x0f, 0xf0, 0x0a, 0x0d, 0x00, 0x32,
- 0x0f, 0xf6, 0x05, 0x5c, 0x01, 0x08, 0x0f, 0xc4, 0x00, 0x6c, 0x0b, 0xaa,
- 0x0b, 0xab, 0x0b, 0xac, 0x0b, 0xad, 0x0f, 0xee, 0x03, 0x00, 0x0f, 0xc5,
- 0x01, 0xcf, 0x0b, 0x61, 0x02, 0x19, 0x09, 0xc5, 0x0b, 0xca, 0x0b, 0xe1,
- 0x0c, 0x91, 0x09, 0xcb, 0x0f, 0xcc, 0x07, 0xff, 0x0f, 0xcd, 0x0c, 0xc0,
- 0x00, 0x2b, 0x00, 0x2d, 0x0f, 0xf1, 0x03, 0x39, 0x0f, 0xce, 0x00, 0xc2,
- 0x0f, 0xcf, 0x07, 0x68, 0x07, 0x37, 0x1f, 0xce, 0x00, 0x41, 0x1f, 0xcf,
- 0x01, 0xe9, 0x0a, 0x61, 0x0f, 0xf1, 0x03, 0x39, 0x0d, 0x93, 0x1f, 0xf9,
- 0x16, 0xd5, 0x0f, 0xf1, 0x0a, 0x22, 0x0a, 0x48, 0x0f, 0xf1, 0x0a, 0x23,
- 0x0f, 0xfb, 0x16, 0x76, 0x0a, 0x48, 0x0f, 0xf1, 0x0a, 0x22, 0x0f, 0xfb,
- 0x16, 0x76, 0x0a, 0x48, 0x0f, 0xf1, 0x03, 0x39, 0x0f, 0xc4, 0x01, 0x70,
- 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x09, 0xe1, 0x0f, 0xc4, 0x06, 0xff,
- 0x0b, 0x12, 0x1f, 0xf9, 0x17, 0x04, 0x0a, 0x61, 0x0d, 0xd3, 0x1f, 0xf9,
- 0x16, 0xde, 0x0f, 0xc4, 0x00, 0x6c, 0x0f, 0xee, 0x05, 0x00, 0x0e, 0x02,
- 0x0e, 0x42, 0x0f, 0xee, 0x05, 0x40, 0x0e, 0x02, 0x0f, 0x38, 0x0e, 0x42,
- 0x0f, 0xee, 0x0a, 0xef, 0x0f, 0xe2, 0x00, 0x3f, 0x0f, 0xe1, 0x1f, 0xf6,
- 0x0f, 0xc4, 0x00, 0x80, 0x0f, 0xee, 0x09, 0x00, 0x0e, 0x02, 0x0e, 0x42,
- 0x0e, 0xa4, 0x09, 0x99, 0x09, 0xe2, 0x0f, 0xe4, 0x07, 0xff, 0x0f, 0x38,
- 0x09, 0x82, 0x0f, 0xfb, 0x17, 0x68, 0x0f, 0xfb, 0x0c, 0x26, 0x0f, 0xfb,
- 0x0c, 0xf8, 0x0f, 0xf7, 0x0d, 0xa3, 0x0f, 0xfb, 0x18, 0x62, 0x0f, 0xfb,
- 0x1f, 0x0b, 0x0f, 0xfb, 0x13, 0xae, 0x0f, 0xf7, 0x05, 0x92, 0x0f, 0xf6,
- 0x05, 0x8d, 0x02, 0x48, 0x1f, 0xf9, 0x17, 0x33, 0x0f, 0xc4, 0x01, 0x69,
- 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x0f, 0xfb, 0x1a, 0xa8, 0x0f, 0xf6,
- 0x05, 0x8d, 0x02, 0x88, 0x1f, 0xf9, 0x17, 0x45, 0x00, 0x61, 0x0f, 0xc4,
- 0x01, 0x67, 0x0b, 0x19, 0x09, 0xc0, 0x0f, 0xc4, 0x01, 0x66, 0x0b, 0x19,
- 0x09, 0xc0, 0x02, 0xba, 0x00, 0x48, 0x0f, 0xf9, 0x17, 0x47, 0x02, 0xba,
- 0x00, 0x08, 0x0f, 0xf6, 0x05, 0x8d, 0x02, 0xc8, 0x1f, 0xf9, 0x17, 0x54,
- 0x0f, 0xc4, 0x01, 0x68, 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x0f, 0xc4,
- 0x07, 0xbf, 0x00, 0x40, 0x0f, 0xc8, 0x0e, 0x00, 0x0f, 0xf7, 0x05, 0x94,
- 0x0f, 0xfb, 0x03, 0x96, 0x0f, 0xc4, 0x01, 0x6c, 0x0f, 0xf1, 0x0c, 0x06,
- 0x0a, 0x40, 0x0f, 0xfb, 0x1a, 0xcf, 0x0f, 0xfb, 0x03, 0xdd, 0x0f, 0xfb,
- 0x18, 0xd3, 0x0f, 0xfb, 0x19, 0x16, 0x0f, 0x39, 0x0f, 0xc4, 0x06, 0x92,
- 0x0b, 0x22, 0x0f, 0xe4, 0x0d, 0xff, 0x09, 0x80, 0x07, 0x64, 0x09, 0xa2,
- 0x0f, 0xe5, 0x1f, 0xe2, 0x09, 0xa2, 0x04, 0x84, 0x0b, 0x24, 0x09, 0x80,
- 0x04, 0x84, 0x0b, 0x21, 0x01, 0x1e, 0x1f, 0xf9, 0x17, 0x87, 0x0f, 0xc4,
- 0x06, 0xa7, 0x02, 0x37, 0x0f, 0xc4, 0x06, 0xae, 0x00, 0x37, 0x0f, 0xc4,
- 0x07, 0x5a, 0x06, 0xb7, 0x0f, 0xc4, 0x00, 0x77, 0x00, 0x37, 0x04, 0x84,
- 0x0b, 0x21, 0x00, 0xde, 0x1f, 0xf9, 0x17, 0x9b, 0x0f, 0xc4, 0x06, 0xaa,
- 0x02, 0x37, 0x0f, 0xc4, 0x07, 0x0b, 0x02, 0xb7, 0x0f, 0xc4, 0x00, 0x7a,
- 0x00, 0x37, 0x0f, 0xc4, 0x07, 0x57, 0x06, 0xb7, 0x0f, 0xc4, 0x00, 0x74,
- 0x00, 0x37, 0x04, 0x84, 0x0b, 0x21, 0x00, 0x9e, 0x1f, 0xf9, 0x17, 0xb5,
- 0x00, 0x21, 0x01, 0x9f, 0x09, 0xe1, 0x01, 0xdf, 0x09, 0xe2, 0x0b, 0x25,
- 0x09, 0x80, 0x0f, 0xc4, 0x06, 0xa4, 0x02, 0x37, 0x0f, 0xc4, 0x00, 0x77,
- 0x02, 0xb7, 0x0f, 0xc4, 0x07, 0x67, 0x02, 0xb7, 0x0f, 0xc4, 0x06, 0x96,
- 0x00, 0x37, 0x0f, 0xf7, 0x0d, 0x69, 0x04, 0x84, 0x0b, 0x21, 0x00, 0x1e,
- 0x1f, 0xf9, 0x17, 0xef, 0x00, 0x21, 0x01, 0x9f, 0x09, 0xe2, 0x0b, 0x25,
- 0x09, 0x80, 0x0f, 0xc4, 0x01, 0x5c, 0x0b, 0x21, 0x03, 0x95, 0x1f, 0xf9,
- 0x17, 0xd3, 0x04, 0xc4, 0x0f, 0xc5, 0x06, 0x9f, 0x0f, 0xf7, 0x02, 0x74,
- 0x03, 0x37, 0x03, 0xb7, 0x00, 0xb7, 0x05, 0x37, 0x04, 0x37, 0x00, 0x36,
- 0x04, 0xc4, 0x0f, 0xf9, 0x17, 0xef, 0x0f, 0xc4, 0x01, 0x44, 0x0b, 0x88,
- 0x00, 0xb6, 0x0b, 0x89, 0x0f, 0xc8, 0x1f, 0xf4, 0x01, 0x37, 0x0f, 0xc4,
- 0x00, 0x86, 0x00, 0x37, 0x0f, 0xc4, 0x07, 0x08, 0x06, 0xb7, 0x0f, 0xc4,
- 0x00, 0x89, 0x00, 0x37, 0x0f, 0xc4, 0x06, 0x9f, 0x02, 0xb7, 0x0f, 0xc4,
- 0x00, 0x74, 0x02, 0xb7, 0x0f, 0xc4, 0x07, 0x64, 0x02, 0xb7, 0x00, 0x36,
- 0x04, 0xc4, 0x04, 0x84, 0x0b, 0x21, 0x00, 0x5e, 0x1f, 0xf9, 0x18, 0x0c,
- 0x00, 0x21, 0x01, 0x9f, 0x09, 0xe2, 0x0b, 0x25, 0x09, 0x80, 0x00, 0x21,
- 0x0f, 0xc4, 0x06, 0xa2, 0x0b, 0x88, 0x06, 0xba, 0x0b, 0x89, 0x10, 0x21,
- 0x1c, 0x18, 0x19, 0xc8, 0x1c, 0x51, 0x19, 0xc9, 0x0f, 0xc4, 0x06, 0x8f,
- 0x0b, 0x21, 0x0c, 0x20, 0x09, 0xc2, 0x0b, 0x21, 0x0c, 0x59, 0x09, 0xc2,
- 0x04, 0x84, 0x0b, 0x21, 0x01, 0x9e, 0x1f, 0xf9, 0x18, 0x33, 0x0f, 0xc4,
- 0x06, 0x8f, 0x0b, 0x88, 0x00, 0xb6, 0x0b, 0x89, 0x06, 0xbb, 0x1f, 0xf7,
- 0x00, 0x8f, 0x02, 0xb6, 0x04, 0xc4, 0x0f, 0xc4, 0x00, 0x92, 0x00, 0x37,
- 0x0f, 0xc4, 0x06, 0x9c, 0x06, 0xb7, 0x03, 0xb7, 0x06, 0xbb, 0x0f, 0xe1,
- 0x04, 0x00, 0x1f, 0xe1, 0x0c, 0x00, 0x0c, 0x59, 0x09, 0xc9, 0x0f, 0xc4,
- 0x01, 0x30, 0x0c, 0x02, 0x0c, 0x42, 0x0f, 0xf0, 0x03, 0x0a, 0x0c, 0x32,
- 0x0f, 0xf0, 0x03, 0x09, 0x0c, 0x72, 0x04, 0x84, 0x0b, 0x21, 0x01, 0xde,
- 0x1f, 0xf9, 0x18, 0x4e, 0x0f, 0xc4, 0x06, 0x96, 0x02, 0x37, 0x01, 0x36,
- 0x06, 0x08, 0x03, 0xb7, 0x0f, 0xc4, 0x01, 0x32, 0x0c, 0x02, 0x0c, 0x42,
- 0x0c, 0x61, 0x02, 0xdf, 0x11, 0x3a, 0x12, 0x08, 0x1f, 0xf9, 0x18, 0x50,
- 0x0f, 0xf0, 0x03, 0x1a, 0x0c, 0x32, 0x0f, 0xf0, 0x03, 0x19, 0x0c, 0x72,
- 0x04, 0x84, 0x00, 0x00, 0x0f, 0x39, 0x0f, 0xf1, 0x03, 0x3a, 0x0f, 0xc4,
- 0x07, 0xe2, 0x0a, 0x48, 0x0c, 0x00, 0x0f, 0xc4, 0x07, 0xe3, 0x0c, 0x00,
- 0x0f, 0xf1, 0x03, 0x03, 0x0f, 0xc4, 0x07, 0xe4, 0x0f, 0xc2, 0x08, 0x00,
- 0x0f, 0x38, 0x0a, 0x42, 0x0f, 0xc4, 0x07, 0xe1, 0x00, 0x21, 0x0b, 0x14,
- 0x1f, 0xf9, 0x18, 0xd2, 0x0f, 0xc4, 0x07, 0xea, 0x0b, 0x15, 0x0f, 0xc8,
- 0x03, 0x03, 0x1f, 0xc8, 0x03, 0x06, 0x0c, 0x31, 0x0f, 0xc4, 0x07, 0xe5,
- 0x0a, 0x40, 0x0f, 0xf1, 0x03, 0x3a, 0x0f, 0xc4, 0x07, 0xe2, 0x0a, 0x48,
- 0x0c, 0x00, 0x0f, 0xc4, 0x07, 0xe3, 0x0c, 0x00, 0x0f, 0xc4, 0x07, 0xe1,
- 0x0b, 0x09, 0x0c, 0x61, 0x0c, 0x13, 0x1c, 0x21, 0x1c, 0x51, 0x09, 0xe1,
- 0x0f, 0xc4, 0x07, 0xf1, 0x0b, 0x13, 0x1f, 0xf9, 0x18, 0xd2, 0x0c, 0x61,
- 0x0c, 0x12, 0x0f, 0xcb, 0x18, 0xa4, 0x1f, 0xcb, 0x18, 0xb2, 0x09, 0xca,
- 0x00, 0x21, 0x0c, 0x91, 0x19, 0xd1, 0x09, 0xe1, 0x0f, 0xc4, 0x07, 0xf2,
- 0x0b, 0x16, 0x0f, 0xc4, 0x07, 0xe6, 0x1f, 0xc4, 0x07, 0xe8, 0x0b, 0x88,
- 0x0b, 0x89, 0x0f, 0xc4, 0x07, 0xf0, 0x0b, 0x21, 0x0f, 0xc4, 0x07, 0xe4,
- 0x0c, 0xf8, 0x00, 0x15, 0x1f, 0xf9, 0x18, 0xb4, 0x0b, 0xa1, 0x0c, 0x18,
- 0x09, 0xc8, 0x0b, 0xa1, 0x0c, 0x51, 0x09, 0xc9, 0x00, 0x21, 0x0c, 0x56,
- 0x10, 0x08, 0x0f, 0xf8, 0x18, 0xc1, 0x10, 0x09, 0x1f, 0xf9, 0x18, 0xa6,
- 0x0b, 0xa1, 0x0c, 0x20, 0x09, 0xc8, 0x0b, 0xa1, 0x0c, 0x59, 0x09, 0xc9,
- 0x0c, 0x61, 0x0f, 0xd6, 0x00, 0xff, 0x1f, 0xc8, 0x0f, 0xff, 0x1f, 0xc9,
- 0x00, 0xff, 0x0f, 0xc4, 0x07, 0xe4, 0x0c, 0x02, 0x0c, 0x42, 0x00, 0x21,
- 0x0f, 0xc4, 0x07, 0xea, 0x0b, 0x14, 0x1f, 0xf0, 0x03, 0x03, 0x1c, 0x72,
- 0x0f, 0xc4, 0x07, 0xeb, 0x0b, 0x14, 0x1f, 0xf0, 0x03, 0x06, 0x1c, 0x72,
- 0x0f, 0x39, 0x0f, 0xc5, 0x01, 0x65, 0x0f, 0xc4, 0x01, 0x81, 0x0b, 0x21,
- 0x00, 0x14, 0x1f, 0x38, 0x10, 0x01, 0x0f, 0xc4, 0x07, 0x6c, 0x0b, 0x21,
- 0x00, 0x14, 0x09, 0xcb, 0x1f, 0x38, 0x10, 0x01, 0x0f, 0xc4, 0x07, 0x6a,
- 0x0b, 0x08, 0x0f, 0xc4, 0x07, 0x6b, 0x0b, 0x09, 0x0c, 0x21, 0x0c, 0x59,
- 0x09, 0xc9, 0x0f, 0xc4, 0x01, 0x65, 0x0f, 0xc5, 0x01, 0x66, 0x0b, 0x21,
- 0x00, 0x59, 0x09, 0xc0, 0x0c, 0x14, 0x1f, 0x38, 0x10, 0x01, 0x0c, 0x55,
- 0x1f, 0x39, 0x0c, 0x00, 0x0b, 0x61, 0x0c, 0xd6, 0x1f, 0x39, 0x01, 0x38,
- 0x01, 0xc8, 0x0b, 0x21, 0x0f, 0xd9, 0x00, 0x48, 0x09, 0xc5, 0x00, 0x59,
- 0x09, 0xc0, 0x09, 0xe1, 0x02, 0x12, 0x0f, 0x38, 0x10, 0x00, 0x0f, 0xc4,
- 0x01, 0xd2, 0x0b, 0x21, 0x02, 0x13, 0x1f, 0xf9, 0x19, 0x0e, 0x0f, 0x39,
- 0x00, 0x59, 0x09, 0xc0, 0x0f, 0xc4, 0x01, 0xd0, 0x0f, 0xfb, 0x18, 0xfd,
- 0x0f, 0x38, 0x0c, 0x01, 0x0f, 0xf1, 0x03, 0x39, 0x0f, 0xc4, 0x01, 0x6a,
- 0x00, 0x00, 0x0f, 0xc4, 0x01, 0x6b, 0x0a, 0x40, 0x0f, 0xc4, 0x01, 0xd2,
- 0x0b, 0x21, 0x00, 0x17, 0x1f, 0x38, 0x10, 0x00, 0x00, 0x51, 0x09, 0xc0,
- 0x0f, 0xc4, 0x01, 0xd1, 0x0f, 0xfb, 0x18, 0xfd, 0x0b, 0x48, 0x0f, 0xc4,
- 0x01, 0x6a, 0x0c, 0x38, 0x0c, 0x00, 0x05, 0x38, 0x0f, 0x08, 0x0d, 0x30,
- 0x0d, 0x21, 0x00, 0x59, 0x09, 0xcc, 0x0d, 0x61, 0x0c, 0xa0, 0x09, 0xea,
- 0x00, 0x21, 0x0c, 0xd9, 0x09, 0xeb, 0x0f, 0xee, 0x01, 0xc0, 0x1f, 0xee,
- 0x0a, 0x7e, 0x0c, 0x21, 0x0e, 0x20, 0x09, 0xce, 0x0c, 0x61, 0x0e, 0x59,
- 0x09, 0xf2, 0x0d, 0x83, 0x09, 0xc3, 0x0d, 0x21, 0x00, 0x59, 0x0d, 0x30,
- 0x0d, 0xb2, 0x0f, 0x38, 0x09, 0xcc, 0x0f, 0xc4, 0x07, 0x0e, 0x00, 0x02,
- 0x00, 0x02, 0x0f, 0xc2, 0x01, 0x90, 0x00, 0x02, 0x0f, 0xc2, 0x00, 0x83,
- 0x00, 0x42, 0x0f, 0xc2, 0x04, 0x07, 0x0f, 0x38, 0x00, 0x42, 0x0f, 0xc4,
- 0x07, 0x0e, 0x0b, 0x8a, 0x0f, 0xfa, 0x19, 0x31, 0x0b, 0x8b, 0x0b, 0x8a,
- 0x0f, 0xfa, 0x19, 0x31, 0x0b, 0x8b, 0x0b, 0x8a, 0x0f, 0xfa, 0x19, 0x31,
- 0x0b, 0x8b, 0x0b, 0x8a, 0x0f, 0xf8, 0x19, 0x31, 0x0b, 0x8b, 0x0f, 0xc5,
- 0x04, 0xa8, 0x07, 0x37, 0x0f, 0xcc, 0x05, 0x38, 0x0f, 0xcd, 0x02, 0xb0,
- 0x0f, 0xfb, 0x19, 0x5b, 0x0f, 0xcc, 0x0a, 0x38, 0x0f, 0xfa, 0x19, 0x5b,
- 0x00, 0x0d, 0x0f, 0xf0, 0x05, 0x2e, 0x00, 0xf2, 0x0f, 0xf1, 0x0a, 0x2e,
- 0x0a, 0x62, 0x0f, 0xe5, 0x01, 0xc0, 0x0f, 0x38, 0x09, 0xb2, 0x00, 0x04,
- 0x0c, 0x00, 0x0c, 0x21, 0x02, 0xdf, 0x1f, 0xf9, 0x19, 0x94, 0x0c, 0x27,
- 0x0c, 0x21, 0x09, 0x99, 0x09, 0xc8, 0x0f, 0xfa, 0x19, 0x6d, 0x00, 0x09,
- 0x0f, 0xf9, 0x19, 0xa1, 0x00, 0x21, 0x0c, 0x11, 0x09, 0xe7, 0x09, 0xe1,
- 0x09, 0x99, 0x09, 0xc8, 0x00, 0x21, 0x0c, 0x11, 0x09, 0xc8, 0x0f, 0xc9,
- 0x1f, 0xff, 0x0f, 0xfb, 0x19, 0x6d, 0x00, 0x04, 0x0f, 0x38, 0x0b, 0x08,
- 0x0f, 0xf1, 0x0a, 0x33, 0x0f, 0xc4, 0x05, 0xe8, 0x0a, 0x48, 0x0c, 0x02,
- 0x0f, 0xee, 0x0a, 0x7f, 0x0c, 0x2a, 0x00, 0x2b, 0x0f, 0xee, 0x02, 0x40,
- 0x0f, 0xee, 0x0a, 0x01, 0x08, 0x36, 0x02, 0x08, 0x0f, 0xc4, 0x05, 0xe9,
- 0x0b, 0x21, 0x00, 0x14, 0x1f, 0xc4, 0x01, 0x41, 0x1b, 0x22, 0x1f, 0xe4,
- 0x0f, 0xef, 0x19, 0x80, 0x00, 0x1e, 0x0f, 0xc5, 0x01, 0x7d, 0x1f, 0x38,
- 0x1c, 0x41, 0x00, 0x2b, 0x0c, 0x6a, 0x0f, 0xee, 0x01, 0xc0, 0x0f, 0xee,
- 0x0a, 0x78, 0x0b, 0x6a, 0x0f, 0xee, 0x02, 0x40, 0x0f, 0xee, 0x0a, 0x08,
- 0x0f, 0xc4, 0x01, 0x40, 0x04, 0x22, 0x0e, 0x02, 0x0e, 0x65, 0x0f, 0x38,
- 0x09, 0x82, 0x0f, 0xc4, 0x05, 0xf3, 0x0f, 0xc2, 0x0f, 0x80, 0x0f, 0xc2,
- 0x0f, 0xff, 0x0f, 0xc2, 0x07, 0xff, 0x00, 0x02, 0x0f, 0xc2, 0x0f, 0xc0,
- 0x01, 0x82, 0x0f, 0xc4, 0x00, 0x3c, 0x00, 0x42, 0x00, 0x82, 0x01, 0x82,
- 0x03, 0x02, 0x07, 0x02, 0x0f, 0xc2, 0x00, 0x30, 0x0f, 0xc2, 0x00, 0x70,
- 0x0f, 0xc2, 0x00, 0xf0, 0x0f, 0xc2, 0x01, 0xd0, 0x0f, 0xc2, 0x03, 0x50,
- 0x0f, 0xc2, 0x07, 0x50, 0x0f, 0xc2, 0x0e, 0x50, 0x0f, 0x39, 0x0f, 0xc4,
- 0x01, 0xd4, 0x0f, 0x00, 0x0f, 0xc4, 0x05, 0xf9, 0x02, 0x37, 0x0f, 0xc4,
- 0x06, 0x34, 0x02, 0xb7, 0x0f, 0xc4, 0x05, 0xf6, 0x0f, 0xf7, 0x02, 0x85,
- 0x0f, 0xf7, 0x01, 0x33, 0x0f, 0xc4, 0x01, 0xd3, 0x0c, 0x21, 0x00, 0x51,
- 0x09, 0xc0, 0x09, 0xcf, 0x09, 0xe1, 0x0f, 0xd9, 0x00, 0x3c, 0x09, 0xc4,
- 0x0b, 0x0d, 0x0f, 0xc4, 0x05, 0xf9, 0x0f, 0xc5, 0x01, 0x2b, 0x04, 0xb7,
- 0x0f, 0xc4, 0x00, 0x70, 0x0d, 0x42, 0x0d, 0x82, 0x01, 0xba, 0x0d, 0xc2,
- 0x0f, 0xc4, 0x00, 0x70, 0x0b, 0x8d, 0x0b, 0x8e, 0x0b, 0x8f, 0x0d, 0xe1,
- 0x00, 0x2a, 0x00, 0x59, 0x09, 0xeb, 0x0f, 0xee, 0x01, 0xc0, 0x0f, 0xee,
- 0x0a, 0xcb, 0x05, 0x84, 0x0e, 0x02, 0x0e, 0x42, 0x0e, 0x82, 0x0f, 0xc4,
- 0x01, 0x28, 0x00, 0x37, 0x0f, 0xc4, 0x05, 0xf9, 0x06, 0xb7, 0x0f, 0xf7,
- 0x01, 0x33, 0x0c, 0x21, 0x0d, 0xe7, 0x09, 0x91, 0x09, 0xce, 0x0d, 0xa1,
- 0x0f, 0xd2, 0x00, 0x80, 0x1f, 0xce, 0x00, 0x7f, 0x0d, 0xa1, 0x09, 0x99,
- 0x00, 0x2a, 0x09, 0xeb, 0x0f, 0xee, 0x01, 0xc0, 0x0f, 0xee, 0x0a, 0xcb,
- 0x05, 0x84, 0x0e, 0x02, 0x0e, 0x42, 0x0e, 0x82, 0x0f, 0xc4, 0x01, 0x28,
- 0x0f, 0xf7, 0x02, 0x81, 0x0f, 0xc4, 0x05, 0xf9, 0x0f, 0xf7, 0x02, 0x93,
- 0x0f, 0xf7, 0x02, 0x05, 0x02, 0xdf, 0x1f, 0xf9, 0x1a, 0x69, 0x0f, 0xc4,
- 0x01, 0x2b, 0x0f, 0xf7, 0x02, 0x90, 0x0f, 0xf7, 0x02, 0x05, 0x1f, 0xf9,
- 0x1a, 0x69, 0x06, 0x44, 0x0f, 0xc5, 0x01, 0x2b, 0x04, 0xb7, 0x0f, 0xc4,
- 0x05, 0xfc, 0x0d, 0x80, 0x0f, 0xc4, 0x05, 0xfd, 0x0d, 0xc0, 0x0d, 0xe1,
- 0x00, 0x53, 0x1f, 0xf9, 0x1a, 0x74, 0x09, 0xcf, 0x0d, 0x61, 0x0d, 0xdf,
- 0x1f, 0xf9, 0x1a, 0x16, 0x0f, 0xf9, 0x1a, 0x69, 0x0f, 0xc4, 0x01, 0xd4,
- 0x0b, 0x39, 0x0f, 0xc4, 0x05, 0xff, 0x0b, 0x0f, 0x0d, 0xe1, 0x00, 0x2b,
- 0x0f, 0xea, 0x0c, 0xe5, 0x00, 0xd4, 0x1f, 0xea, 0x05, 0xac, 0x01, 0x14,
- 0x1f, 0xea, 0x03, 0x44, 0x01, 0x94, 0x1f, 0xea, 0x01, 0x56, 0x02, 0x14,
- 0x1f, 0xea, 0x00, 0x83, 0x0f, 0xc4, 0x05, 0xf0, 0x0b, 0x0e, 0x0d, 0xa1,
- 0x00, 0x2c, 0x03, 0x2d, 0x00, 0x54, 0x11, 0xad, 0x00, 0x94, 0x11, 0x2d,
- 0x0f, 0xee, 0x0c, 0x80, 0x00, 0xa1, 0x0f, 0xc4, 0x01, 0x73, 0x0e, 0x19,
- 0x09, 0xc0, 0x0f, 0xc4, 0x01, 0x75, 0x00, 0x40, 0x0d, 0xa1, 0x00, 0x94,
- 0x10, 0x00, 0x00, 0x54, 0x0d, 0xe1, 0x10, 0x96, 0x10, 0x00, 0x00, 0xd6,
- 0x0f, 0x38, 0x10, 0x00, 0x0f, 0xc8, 0x1a, 0xab, 0x05, 0x39, 0x0f, 0xf7,
- 0x0d, 0xf7, 0x0f, 0xfb, 0x19, 0xa4, 0x0f, 0xc4, 0x07, 0xba, 0x0f, 0xfb,
- 0x02, 0xfd, 0x01, 0xbb, 0x0f, 0xf7, 0x0e, 0x2a, 0x01, 0xbb, 0x0f, 0xf7,
- 0x0e, 0x7e, 0x01, 0xbb, 0x0f, 0xfb, 0x19, 0xf7, 0x01, 0xbb, 0x0f, 0xf7,
- 0x0e, 0xff, 0x01, 0xbb, 0x0f, 0xfb, 0x1a, 0x77, 0x0f, 0xf6, 0x00, 0x42,
- 0x02, 0x8b, 0x1f, 0xf7, 0x0f, 0x52, 0x0f, 0xc4, 0x06, 0x00, 0x0f, 0xf0,
- 0x0a, 0x01, 0x0f, 0x38, 0x0b, 0x32, 0x0f, 0xff, 0x0f, 0x6b, 0x0f, 0xf1,
- 0x0c, 0x0a, 0x0f, 0xc4, 0x01, 0x6d, 0x0a, 0x49, 0x0c, 0x61, 0x00, 0x1e,
- 0x1f, 0xf8, 0x1b, 0x0b, 0x0c, 0x40, 0x0f, 0xf1, 0x0c, 0x07, 0x0f, 0xc4,
- 0x01, 0x36, 0x0f, 0xc5, 0x07, 0x60, 0x00, 0x2b, 0x0a, 0x6a, 0x0f, 0xf1,
- 0x0c, 0x08, 0x0f, 0xee, 0x01, 0xc0, 0x0f, 0xee, 0x0a, 0x06, 0x0e, 0x22,
- 0x0a, 0x65, 0x09, 0x82, 0x0e, 0x42, 0x0f, 0xc4, 0x01, 0x56, 0x0b, 0x21,
- 0x09, 0xa0, 0x09, 0xc2, 0x0b, 0x21, 0x0e, 0x59, 0x09, 0xc2, 0x0f, 0xc4,
- 0x01, 0xd5, 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x09, 0xe1, 0x0b, 0x53,
- 0x1f, 0xf9, 0x1b, 0x0b, 0x0f, 0xc5, 0x01, 0x76, 0x0b, 0x01, 0x00, 0x00,
- 0x0f, 0xc5, 0x01, 0x38, 0x0f, 0xc4, 0x01, 0x56, 0x0b, 0x03, 0x00, 0x02,
- 0x0b, 0x03, 0x00, 0x02, 0x0f, 0xfa, 0x03, 0x00, 0x02, 0x08, 0x0c, 0x61,
- 0x00, 0x5e, 0x1f, 0x39, 0x0f, 0xf1, 0x0c, 0x0c, 0x0f, 0xc4, 0x01, 0x5a,
- 0x0b, 0x21, 0x0a, 0x60, 0x09, 0xc2, 0x0b, 0x21, 0x00, 0x19, 0x09, 0xc0,
- 0x0f, 0xf1, 0x0c, 0x09, 0x0f, 0xc4, 0x01, 0x58, 0x0b, 0x21, 0x0f, 0xc5,
- 0x07, 0x61, 0x0a, 0x48, 0x0c, 0x20, 0x09, 0xc2, 0x0b, 0x21, 0x00, 0x19,
- 0x09, 0xc2, 0x0f, 0xc4, 0x01, 0x74, 0x0c, 0x00, 0x0f, 0xc4, 0x01, 0xd6,
- 0x0b, 0x21, 0x00, 0x59, 0x09, 0xc0, 0x09, 0xe1, 0x0b, 0x53, 0x1f, 0x39,
- 0x0f, 0xc5, 0x01, 0x77, 0x0b, 0x01, 0x00, 0x00, 0x0f, 0xc5, 0x01, 0x3a,
- 0x0f, 0xc4, 0x01, 0x58, 0x0b, 0x03, 0x00, 0x02, 0x0b, 0x03, 0x00, 0x02,
- 0x0f, 0xc5, 0x01, 0x3c, 0x0f, 0xc4, 0x01, 0x5a, 0x0b, 0x03, 0x00, 0x02,
- 0x0b, 0x03, 0x00, 0x02, 0x0f, 0xf8, 0x03, 0x00, 0x04, 0x08, 0x0f, 0xf1,
- 0x0f, 0x17, 0x0f, 0xe2, 0x0f, 0xf0, 0x0c, 0x21, 0x0a, 0x64, 0x09, 0x99,
- 0x09, 0xf2, 0x00, 0x09, 0x0c, 0x22, 0x03, 0xe4, 0x09, 0xa1, 0x00, 0x94,
- 0x11, 0x09, 0x00, 0x54, 0x10, 0x49, 0x01, 0x54, 0x10, 0x89, 0x0c, 0x61,
- 0x00, 0x14, 0x1f, 0x39, 0x01, 0x14, 0x0f, 0xc4, 0x01, 0xd7, 0x0b, 0x21,
- 0x10, 0x40, 0x10, 0x15, 0x1f, 0x39, 0x0f, 0xf8, 0x03, 0x00, 0x0c, 0x48,
- 0x0f, 0x39, 0x00, 0x04, 0x0f, 0x00, 0x04, 0x04, 0x0b, 0x27, 0x09, 0xa7,
- 0x09, 0xa7, 0x09, 0xa7, 0x09, 0xa2, 0x0c, 0x25, 0x0f, 0xc5, 0x07, 0x6e,
- 0x09, 0x81, 0x07, 0xba, 0x04, 0x48, 0x0f, 0xc4, 0x07, 0x6d, 0x0b, 0x21,
- 0x00, 0x15, 0x00, 0x48, 0x12, 0x08, 0x04, 0x04, 0x0c, 0x00, 0x00, 0x04,
- 0x0b, 0x39, 0x00, 0x04, 0x0f, 0x00, 0x0f, 0xc4, 0x07, 0x80, 0x0f, 0xc8,
- 0x08, 0x00, 0x0f, 0xf7, 0x00, 0x71, 0x0f, 0xf1, 0x0f, 0x14, 0x0f, 0xc4,
- 0x07, 0xf4, 0x0a, 0x42, 0x0f, 0xf1, 0x0f, 0x15, 0x0a, 0x42, 0x0f, 0xf1,
- 0x03, 0x0a, 0x0f, 0xc4, 0x07, 0xf6, 0x0a, 0x42, 0x0f, 0xf1, 0x03, 0x09,
- 0x0a, 0x42, 0x0f, 0xf1, 0x03, 0x1a, 0x0f, 0xc4, 0x07, 0xf8, 0x0a, 0x42,
- 0x0f, 0xf1, 0x03, 0x19, 0x0a, 0x42, 0x0f, 0xf1, 0x03, 0x38, 0x0f, 0xc4,
- 0x07, 0xfa, 0x0a, 0x40, 0x0f, 0xf1, 0x03, 0x11, 0x0f, 0xc4, 0x07, 0xfb,
- 0x0a, 0x40, 0x0f, 0xf1, 0x0c, 0x05, 0x0f, 0xc4, 0x07, 0xfc, 0x0a, 0x40,
- 0x0f, 0xc4, 0x07, 0xfe, 0x0f, 0xc2, 0x07, 0x06, 0x0f, 0xc2, 0x00, 0x80,
- 0x00, 0x04, 0x0b, 0x39, 0x0f, 0xc4, 0x07, 0xf3, 0x0f, 0x00, 0x0f, 0xc4,
- 0x06, 0xc0, 0x0f, 0xc8, 0x07, 0x80, 0x0f, 0xf7, 0x00, 0x71, 0x0f, 0xf0,
- 0x0f, 0x17, 0x00, 0x32, 0x0f, 0xf0, 0x02, 0x04, 0x00, 0x32, 0x0f, 0xfa,
- 0x01, 0x92, 0x0e, 0xff, 0x0f, 0xc8, 0x08, 0x89, 0x0f, 0xc9, 0x08, 0x88,
- 0x0f, 0xca, 0x07, 0xfc, 0x0f, 0xcb, 0x07, 0xfe, 0x0f, 0xc4, 0x06, 0xe3,
- 0x0c, 0x02, 0x0c, 0x42, 0x0c, 0xc2, 0x0c, 0x02, 0x0c, 0x42, 0x0c, 0xc2,
- 0x0f, 0xc2, 0x07, 0x0a, 0x0f, 0xc2, 0x0a, 0x3d, 0x0f, 0xc2, 0x07, 0xf6,
- 0x0f, 0xc2, 0x03, 0x9c, 0x0f, 0xc2, 0x0c, 0x95, 0x0f, 0xc2, 0x07, 0xed,
- 0x0c, 0x02, 0x0c, 0x42, 0x0c, 0x82, 0x0c, 0x02, 0x0c, 0x42, 0x0c, 0x82,
- 0x0f, 0xc2, 0x07, 0x0a, 0x0f, 0xc2, 0x0a, 0x3d, 0x0f, 0xc2, 0x07, 0xf3,
- 0x0f, 0xc2, 0x03, 0x9c, 0x0f, 0xc2, 0x0c, 0x95, 0x0f, 0xc2, 0x07, 0xea,
- 0x0f, 0xc9, 0x08, 0x00, 0x0f, 0xca, 0x07, 0xfe, 0x0f, 0xc4, 0x07, 0x45,
- 0x00, 0x02, 0x0f, 0xc2, 0x0c, 0x00, 0x0c, 0x82, 0x00, 0x02, 0x0c, 0x42,
- 0x0c, 0x82, 0x0f, 0xc2, 0x0a, 0xab, 0x0f, 0xc2, 0x0a, 0xaa, 0x0f, 0xc2,
- 0x07, 0xfd, 0x0f, 0xc2, 0x07, 0x0a, 0x0f, 0xc2, 0x0a, 0x3d, 0x0f, 0xc2,
- 0x07, 0xf8, 0x0f, 0xc4, 0x07, 0x57, 0x00, 0x02, 0x0c, 0x42, 0x0f, 0xc2,
- 0x07, 0xfa, 0x00, 0x02, 0x0c, 0x42, 0x0f, 0xc2, 0x07, 0xf0, 0x0f, 0xc4,
- 0x07, 0x08, 0x0f, 0xc2, 0x09, 0x51, 0x0f, 0xc2, 0x09, 0xd4, 0x0f, 0xc2,
- 0x07, 0xf5, 0x0f, 0xc4, 0x07, 0x0b, 0x00, 0x02, 0x0f, 0xc2, 0x08, 0x00,
- 0x0f, 0xc2, 0x07, 0xfd, 0x0f, 0xc4, 0x07, 0x5d, 0x0f, 0xc0, 0x0d, 0xbf,
- 0x0f, 0xc4, 0x07, 0xe1, 0x0f, 0xc0, 0x00, 0x50, 0x0f, 0xc4, 0x07, 0xe6,
- 0x0f, 0xc2, 0x00, 0x40, 0x00, 0x02, 0x0f, 0xc2, 0x08, 0x00, 0x00, 0x02,
- 0x0f, 0xc4, 0x07, 0xf0, 0x00, 0x02, 0x02, 0x02, 0x04, 0x02, 0x0f, 0xc4,
- 0x07, 0x5e, 0x0f, 0xc2, 0x00, 0x64, 0x00, 0x02, 0x0f, 0xc4, 0x07, 0x26,
- 0x02, 0x40, 0x0f, 0xf1, 0x03, 0x04, 0x0f, 0xc4, 0x07, 0x62, 0x02, 0x82,
- 0x00, 0x02, 0x0f, 0xc4, 0x07, 0x6a, 0x0f, 0xc2, 0x0d, 0xac, 0x0f, 0xc2,
- 0x00, 0x64, 0x0f, 0xc2, 0x00, 0x55, 0x0f, 0xc4, 0x07, 0x6d, 0x00, 0x00,
- 0x0f, 0xc4, 0x07, 0xef, 0x02, 0x00, 0x0a, 0x72, 0x0f, 0xc4, 0x07, 0x70,
- 0x0f, 0xc0, 0x0f, 0xff, 0x0f, 0xc4, 0x07, 0x72, 0x03, 0xc2, 0x0f, 0xc2,
- 0x02, 0x80, 0x0f, 0xc2, 0x01, 0xe0, 0x02, 0x82, 0x0f, 0xc4, 0x06, 0xff,
- 0x0f, 0xc2, 0x08, 0x00, 0x0f, 0xfb, 0x19, 0x4d, 0x0f, 0xf1, 0x0d, 0x00,
- 0x0a, 0x61, 0x02, 0xde, 0x0f, 0xc4, 0x07, 0x22, 0x00, 0x40, 0x0f, 0xc4,
- 0x07, 0x2b, 0x0f, 0xc2, 0x02, 0x6e, 0x0f, 0xc2, 0x08, 0x31, 0x0f, 0xc2,
- 0x07, 0xf9, 0x0f, 0xc2, 0x0b, 0xa5, 0x0f, 0xc2, 0x0c, 0x49, 0x0f, 0xc2,
- 0x07, 0xf7, 0x0f, 0xc2, 0x00, 0x38, 0x0f, 0xc2, 0x0e, 0xc3, 0x00, 0xc2,
- 0x0f, 0xc2, 0x05, 0x0d, 0x0f, 0xc2, 0x0f, 0x5e, 0x00, 0x42, 0x02, 0x82,
- 0x01, 0x82, 0x02, 0x02, 0x00, 0x42, 0x1f, 0xc4, 0x07, 0x5d, 0x1f, 0xe2,
- 0x0e, 0xff, 0x1b, 0x24, 0x19, 0x80, 0x0f, 0xc4, 0x07, 0x60, 0x02, 0x00,
- 0x12, 0x00, 0x0f, 0xc4, 0x07, 0x61, 0x01, 0x00, 0x0f, 0xf8, 0x1c, 0xa7,
- 0x11, 0x00, 0x0f, 0xc4, 0x06, 0xfc, 0x00, 0x40, 0x0f, 0xc4, 0x07, 0xf3,
- 0x0f, 0xf8, 0x1c, 0xa7, 0x00, 0x00, 0x0f, 0xc4, 0x07, 0xf3, 0x00, 0x21,
- 0x0b, 0x14, 0x1f, 0x00, 0x0f, 0xc4, 0x07, 0xfd, 0x0b, 0x08, 0x00, 0x61,
- 0x0c, 0x19, 0x09, 0xc0, 0x09, 0xe1, 0x00, 0x14, 0x10, 0x80, 0x0f, 0xfb,
- 0x1e, 0xe0, 0x0f, 0xc4, 0x07, 0xf6, 0x0f, 0xf0, 0x03, 0x0a, 0x0b, 0xb2,
- 0x0f, 0xf0, 0x03, 0x09, 0x0b, 0xb2, 0x0f, 0xc4, 0x07, 0xf8, 0x0b, 0x88,
- 0x0b, 0x89, 0x0f, 0xf0, 0x03, 0x1a, 0x0c, 0x32, 0x0f, 0xf0, 0x03, 0x19,
- 0x0c, 0x72, 0x0f, 0xc4, 0x07, 0xfa, 0x0f, 0xf0, 0x03, 0x38, 0x0b, 0x32,
- 0x0f, 0xc4, 0x07, 0xfb, 0x0f, 0xf0, 0x03, 0x11, 0x0b, 0x32, 0x0f, 0xc4,
- 0x07, 0xfc, 0x0f, 0xf0, 0x0c, 0x05, 0x0f, 0xf8, 0x1c, 0xdd, 0x0b, 0x32,
- 0x0f, 0xc4, 0x07, 0xf3, 0x0f, 0x00, 0x00, 0x04, 0x0f, 0xc8, 0x06, 0xc0,
- 0x0f, 0xf7, 0x00, 0x71, 0x0f, 0xc4, 0x07, 0x3d, 0x0f, 0xc5, 0x07, 0x3e,
- 0x0b, 0x21, 0x0f, 0xd5, 0x00, 0x3c, 0x1f, 0xf8, 0x1c, 0xff, 0x10, 0x01,
- 0x0f, 0xf1, 0x0f, 0x15, 0x01, 0xe2, 0x00, 0x21, 0x0f, 0xc4, 0x07, 0xf5,
- 0x0a, 0x48, 0x0c, 0x24, 0x09, 0x95, 0x1c, 0x00, 0x0b, 0x61, 0x00, 0x59,
- 0x09, 0xc1, 0x00, 0xd2, 0x10, 0x01, 0x1b, 0x22, 0x1f, 0xe4, 0x0f, 0xf8,
- 0x19, 0x80, 0x02, 0x3a, 0x00, 0x48, 0x02, 0xba, 0x00, 0x48, 0x0f, 0xc4,
- 0x07, 0xc2, 0x00, 0x61, 0x0b, 0x15, 0x1f, 0xc4, 0x07, 0x62, 0x1b, 0x88,
- 0x1f, 0xf6, 0x00, 0x4c, 0x1b, 0x89, 0x0f, 0xfb, 0x01, 0x92, 0x0f, 0xfb,
- 0x19, 0xd5, 0x0f, 0xc4, 0x05, 0x80, 0x00, 0x02, 0x0f, 0xc2, 0x0e, 0x00,
- 0x0f, 0xc2, 0x07, 0xff, 0x0f, 0xc4, 0x06, 0x31, 0x0f, 0xc5, 0x05, 0x83,
- 0x04, 0xb7, 0x0f, 0xfb, 0x12, 0xf9, 0x0f, 0xc4, 0x01, 0x5e, 0x0f, 0xc0,
- 0x1c, 0xda, 0x0f, 0xc4, 0x06, 0x92, 0x0f, 0xc5, 0x07, 0x5d, 0x0b, 0x40,
- 0x0f, 0xc4, 0x07, 0xf4, 0x0b, 0x21, 0x01, 0x88, 0x00, 0xdf, 0x11, 0xc8,
- 0x01, 0x1e, 0x12, 0x08, 0x0f, 0xc4, 0x01, 0x7c, 0x0c, 0x00, 0x0f, 0xfb,
- 0x1f, 0x0b, 0x0f, 0xf1, 0x03, 0x11, 0x00, 0xe2, 0x0f, 0xc4, 0x06, 0x8e,
- 0x0a, 0x64, 0x09, 0x80, 0x0f, 0xf1, 0x0c, 0x05, 0x0f, 0xc4, 0x05, 0xf2,
- 0x0a, 0x48, 0x0c, 0x00, 0x0f, 0xf1, 0x03, 0x38, 0x0a, 0x62, 0x00, 0x64,
- 0x09, 0xa1, 0x00, 0x54, 0x03, 0x48, 0x12, 0xc8, 0x04, 0x44, 0x0c, 0x00,
- 0x0f, 0xf1, 0x03, 0x1a, 0x0a, 0x48, 0x0f, 0xf1, 0x03, 0x19, 0x0a, 0x49,
- 0x0f, 0xc4, 0x01, 0x32, 0x0c, 0x02, 0x00, 0xb6, 0x0c, 0x42, 0x0f, 0xc8,
- 0x1f, 0xe8, 0x01, 0x37, 0x0f, 0xc4, 0x06, 0x96, 0x00, 0x37, 0x0f, 0xc4,
- 0x06, 0x2b, 0x02, 0xb7, 0x0f, 0xf7, 0x04, 0x66, 0x0f, 0xc4, 0x01, 0x7c,
- 0x0b, 0x08, 0x00, 0xb6, 0x00, 0x09, 0x03, 0x37, 0x0f, 0xf7, 0x04, 0x72,
- 0x0f, 0xf7, 0x01, 0x39, 0x0f, 0xc8, 0x1f, 0xfd, 0x01, 0x37, 0x0f, 0xc4,
- 0x00, 0x8f, 0x00, 0x37, 0x0f, 0xf7, 0x0d, 0x69, 0x0f, 0xf1, 0x03, 0x0a,
- 0x0a, 0x48, 0x0f, 0xf1, 0x03, 0x09, 0x0a, 0x49, 0x0f, 0xc4, 0x01, 0x30,
- 0x0c, 0x02, 0x0c, 0x42, 0x0c, 0x61, 0x00, 0x17, 0x1f, 0xf9, 0x1d, 0x8b,
- 0x0f, 0xc4, 0x01, 0x62, 0x00, 0x00, 0x0c, 0x61, 0x0f, 0xd1, 0x04, 0x00,
- 0x0f, 0xf8, 0x1d, 0x97, 0x09, 0xc9, 0x0f, 0xc4, 0x01, 0x62, 0x00, 0x40,
- 0x0c, 0x61, 0x0f, 0xd1, 0x0c, 0x00, 0x09, 0xc9, 0x00, 0x21, 0x0c, 0x18,
- 0x09, 0xc8, 0x0c, 0x51, 0x09, 0xc9, 0x00, 0xb7, 0x0f, 0xc4, 0x06, 0x99,
- 0x06, 0xb7, 0x03, 0x37, 0x03, 0xb7, 0x0f, 0xc4, 0x06, 0x8f, 0x0c, 0x02,
- 0x00, 0xb6, 0x0c, 0x42, 0x05, 0x37, 0x04, 0x37, 0x06, 0xbb, 0x1f, 0xf7,
- 0x00, 0x8f, 0x00, 0x36, 0x04, 0xc4, 0x0f, 0xfa, 0x07, 0xa2, 0x00, 0x0e,
- 0x07, 0x37, 0x0f, 0xf0, 0x03, 0x0b, 0x00, 0x32, 0x0f, 0xf0, 0x03, 0x1b,
- 0x00, 0x32, 0x0f, 0xf1, 0x03, 0x1d, 0x0a, 0x7f, 0x0f, 0xf0, 0x03, 0x1c,
- 0x0f, 0xf2, 0x00, 0x3f, 0x0f, 0xf0, 0x03, 0x1e, 0x00, 0x32, 0x0f, 0xf0,
- 0x03, 0x1f, 0x00, 0x32, 0x0f, 0xf0, 0x03, 0x2a, 0x0f, 0xf2, 0x07, 0xff,
- 0x0f, 0xf0, 0x03, 0x29, 0x00, 0xb2, 0x0f, 0xf0, 0x03, 0x2b, 0x0f, 0xf2,
- 0x00, 0x28, 0x0f, 0xf0, 0x03, 0x2f, 0x00, 0x72, 0x0f, 0xf0, 0x04, 0x00,
- 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x11, 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x15,
- 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x17, 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x0c,
- 0x00, 0xb2, 0x0f, 0xf0, 0x05, 0x02, 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x08,
- 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x01, 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x00,
- 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x07, 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x06,
- 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x04, 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x05,
- 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x0a, 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x0b,
- 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x03, 0x00, 0x32, 0x0f, 0xf0, 0x05, 0x09,
- 0x00, 0x32, 0x0f, 0xf0, 0x0a, 0x00, 0x05, 0xb2, 0x0f, 0xc8, 0x01, 0x13,
- 0x0f, 0xc4, 0x06, 0x00, 0x0f, 0xf0, 0x0a, 0x01, 0x0c, 0x32, 0x0c, 0x00,
- 0x0f, 0xf0, 0x0a, 0x20, 0x00, 0x32, 0x0f, 0xf0, 0x0a, 0x10, 0x00, 0x72,
- 0x0f, 0xf0, 0x0a, 0x11, 0x00, 0x32, 0x0f, 0xf0, 0x0a, 0x0a, 0x00, 0x32,
- 0x0f, 0xf0, 0x0a, 0x07, 0x04, 0x32, 0x0f, 0xf0, 0x0a, 0x2e, 0x0f, 0xf2,
- 0x01, 0xc8, 0x0f, 0xf0, 0x0a, 0x30, 0x0f, 0xf6, 0x0d, 0xdb, 0x06, 0x32,
- 0x0f, 0xf0, 0x0c, 0x11, 0x02, 0xb2, 0x0f, 0xf0, 0x0c, 0x12, 0x00, 0x32,
- 0x0f, 0xf0, 0x0c, 0x03, 0x00, 0x72, 0x0f, 0xf0, 0x0c, 0x1a, 0x0f, 0xf2,
- 0x08, 0x72, 0x0f, 0xf1, 0x0c, 0x1b, 0x0a, 0x62, 0x01, 0x25, 0x09, 0xb2,
- 0x0f, 0xc4, 0x01, 0x80, 0x00, 0x40, 0x0f, 0xc8, 0x0c, 0x1d, 0x0c, 0x30,
- 0x0f, 0xf2, 0x00, 0xa0, 0x0c, 0x31, 0x0a, 0x61, 0x0f, 0xd5, 0x02, 0xa0,
- 0x10, 0x00, 0x0c, 0x30, 0x0f, 0xf2, 0x00, 0x60, 0x0c, 0x31, 0x0a, 0x61,
- 0x0f, 0xd5, 0x01, 0x60, 0x10, 0x00, 0x0f, 0xf0, 0x0c, 0x1a, 0x0f, 0xf2,
- 0x08, 0x71, 0x0f, 0xf1, 0x0d, 0x00, 0x0a, 0x49, 0x0c, 0x61, 0x02, 0xde,
- 0x0c, 0x62, 0x0f, 0xe4, 0x08, 0x18, 0x1f, 0xe4, 0x08, 0x1e, 0x09, 0xa2,
- 0x04, 0x25, 0x09, 0xb2, 0x0f, 0xf1, 0x0d, 0x01, 0x00, 0x22, 0x1f, 0xe2,
- 0x0a, 0xaa, 0x0a, 0x64, 0x09, 0xb2, 0x0f, 0xc4, 0x06, 0x93, 0x0f, 0xc0,
- 0x00, 0x2b, 0x0f, 0xc8, 0x0f, 0xff, 0x09, 0x37, 0x0f, 0xc4, 0x06, 0x01,
- 0x00, 0x40, 0x04, 0x84, 0x00, 0x00, 0x04, 0x04, 0x00, 0x80, 0x0f, 0xc4,
- 0x06, 0xba, 0x0f, 0xc0, 0x06, 0xbb, 0x04, 0x04, 0x00, 0x40, 0x0f, 0xc8,
- 0x00, 0x28, 0x0f, 0xf7, 0x05, 0x23, 0x0f, 0xf6, 0x05, 0x23, 0x02, 0x88,
- 0x00, 0x69, 0x0e, 0xff, 0x00, 0x28, 0x0e, 0xff, 0x02, 0x3a, 0x00, 0x08,
- 0x02, 0xba, 0x00, 0x08, 0x0f, 0xc4, 0x01, 0xc1, 0x0f, 0xc0, 0x00, 0x47,
- 0x0f, 0xc4, 0x07, 0xf3, 0x0b, 0x08, 0x0c, 0x38, 0x00, 0x00, 0x01, 0x04,
- 0x0f, 0xc2, 0x0c, 0x18, 0x0f, 0xc2, 0x03, 0x01, 0x0f, 0xc2, 0x0d, 0x01,
- 0x0f, 0xc2, 0x0d, 0x00, 0x0f, 0xc2, 0x03, 0x03, 0x0f, 0xc2, 0x03, 0x06,
- 0x0f, 0xc2, 0x03, 0x05, 0x0f, 0xc2, 0x03, 0x28, 0x0f, 0xc2, 0x03, 0x18,
- 0x0f, 0xc2, 0x03, 0x3c, 0x0f, 0xc2, 0x03, 0x3b, 0x0f, 0xc2, 0x03, 0x16,
- 0x0f, 0xc2, 0x03, 0x17, 0x0f, 0xc2, 0x03, 0x26, 0x0f, 0xc2, 0x03, 0x27,
- 0x0f, 0xc2, 0x03, 0x24, 0x0f, 0xc2, 0x03, 0x25, 0x0f, 0xc2, 0x03, 0x12,
- 0x0f, 0xc2, 0x0f, 0x00, 0x0f, 0xc8, 0x0f, 0x12, 0x0c, 0x02, 0x0c, 0x02,
- 0x0c, 0x02, 0x0c, 0x02, 0x0c, 0x02, 0x0c, 0x02, 0x0c, 0x02, 0x0c, 0x02,
- 0x0f, 0xc2, 0x0f, 0x10, 0x0f, 0xc2, 0x0f, 0x13, 0x0f, 0xc2, 0x02, 0x01,
- 0x0f, 0xc2, 0x02, 0x04, 0x0f, 0xc2, 0x02, 0x03, 0x0f, 0xc2, 0x02, 0x06,
- 0x00, 0xc5, 0x0a, 0x83, 0x0a, 0xa1, 0x0b, 0xf1, 0x0a, 0xd5, 0x0a, 0x42,
- 0x1b, 0xf1, 0x1f, 0xf8, 0x1e, 0xd1, 0x1a, 0xd5, 0x0f, 0x39, 0x00, 0xc5,
- 0x0b, 0xc4, 0x0a, 0xa1, 0x0a, 0xd5, 0x1b, 0xf0, 0x1f, 0xf8, 0x1e, 0xda,
- 0x1b, 0xb2, 0x0f, 0x39, 0x0f, 0xc4, 0x06, 0xfd, 0x00, 0x61, 0x0b, 0x14,
- 0x00, 0x00, 0x1f, 0xc4, 0x06, 0xfc, 0x1f, 0x38, 0x10, 0x00, 0x0f, 0xc4,
- 0x06, 0xfb, 0x0b, 0x15, 0x0f, 0xc4, 0x06, 0xfc, 0x1b, 0x15, 0x1f, 0x39,
- 0x00, 0x40, 0x0f, 0xe2, 0x0a, 0xaa, 0x00, 0x04, 0x0f, 0xc5, 0x07, 0xfd,
- 0x0b, 0x63, 0x09, 0x82, 0x0f, 0xc5, 0x07, 0xfe, 0x0b, 0xe3, 0x09, 0x82,
- 0x0b, 0xe3, 0x0f, 0xfa, 0x1e, 0x8f, 0x09, 0x82, 0x0f, 0xf0, 0x0f, 0x19,
- 0x00, 0x32, 0x0f, 0xf0, 0x0f, 0x18, 0x00, 0x32, 0x0f, 0xf0, 0x0f, 0x1a,
- 0x00, 0x72, 0x0f, 0xf9, 0x1f, 0x09, 0x0f, 0xf1, 0x0f, 0x14, 0x0f, 0xc4,
- 0x01, 0x3e, 0x0a, 0x48, 0x0c, 0x02, 0x0f, 0xf1, 0x0f, 0x15, 0x0a, 0x42,
- 0x0c, 0x21, 0x00, 0x1f, 0x0f, 0xc4, 0x07, 0xf0, 0x00, 0x00, 0x10, 0x40,
- 0x00, 0x09, 0x00, 0x4a, 0x00, 0x5f, 0x10, 0x49, 0x10, 0x0a, 0x00, 0x9e,
- 0x10, 0x49, 0x10, 0x4a, 0x0f, 0xc4, 0x07, 0xea, 0x0c, 0x40, 0x0f, 0xc4,
- 0x07, 0xeb, 0x0c, 0x80, 0x0f, 0xe2, 0x02, 0xa0, 0x0f, 0xc4, 0x01, 0x7b,
- 0x0c, 0x24, 0x09, 0x80, 0x0f, 0xc4, 0x01, 0x7a, 0x0c, 0x26, 0x09, 0xa4,
- 0x0f, 0x38, 0x09, 0x80, 0x0f, 0xf9, 0x19, 0xf7, 0x0f, 0xf9, 0x1f, 0x42,
- 0x0f, 0xf9, 0x1f, 0x46, 0x0f, 0xf9, 0x1f, 0x4a, 0x0f, 0xf9, 0x1f, 0x4e,
- 0x0f, 0xf9, 0x1f, 0x52, 0x0f, 0xf9, 0x1f, 0x5a, 0x0f, 0xc4, 0x00, 0x83,
- 0x00, 0x37, 0x0f, 0xb9, 0x0f, 0xc4, 0x00, 0xe0, 0x00, 0x37, 0x0f, 0xb9,
- 0x0f, 0xc4, 0x00, 0xe3, 0x00, 0x37, 0x0f, 0xb9, 0x0f, 0xc4, 0x00, 0x8c,
- 0x00, 0x37, 0x0f, 0xb9, 0x0f, 0xbb, 0x0f, 0xc4, 0x01, 0x71, 0x0b, 0x14,
- 0x1f, 0x39, 0x0c, 0x51, 0x0f, 0x38, 0x09, 0xc9, 0x0f, 0xfb, 0x08, 0xc2,
- 0x0f, 0xb9, 0x0f, 0xbf, 0x00, 0xf3, 0x0f, 0xfc, 0x1f, 0x34, 0x0f, 0xfc,
- 0x0e, 0xe2, 0x0f, 0xfc, 0x09, 0x7e, 0x0f, 0xfc, 0x09, 0x84, 0x0f, 0xfc,
- 0x09, 0x87, 0x0f, 0xfc, 0x0c, 0x9f, 0x0f, 0xfc, 0x0b, 0x5b, 0x0f, 0xfc,
- 0x0a, 0x72, 0x0f, 0xff, 0x00, 0x00, 0x0f, 0xff, 0x0f, 0x77, 0x0f, 0xff,
- 0x00, 0x26, 0x0f, 0xff, 0x00, 0x27, 0x0f, 0xff, 0x00, 0x28, 0x0f, 0xff,
- 0x00, 0x29, 0x0f, 0xff, 0x00, 0x2a, 0x0f, 0xff, 0x02, 0x00, 0x0f, 0xff,
- 0x02, 0x05, 0x0f, 0xff, 0x0c, 0xad, 0x0f, 0xff, 0x0a, 0xb6, 0x0f, 0xc4,
- 0x06, 0xfd, 0x00, 0x00, 0x00, 0x04, 0x0f, 0xe2, 0x0a, 0xaa, 0x0f, 0xc5,
- 0x07, 0xfd, 0x0b, 0xa3, 0x09, 0xa1, 0x0b, 0xd4, 0x1f, 0xc5, 0x07, 0xfe,
- 0x1b, 0xa3, 0x19, 0xa1, 0x1b, 0xd4, 0x1b, 0xa3, 0x19, 0xa1, 0x1b, 0xd4,
- 0x1f, 0xc4, 0x06, 0xfc, 0x1b, 0x21, 0x10, 0x54, 0x1f, 0xf9, 0x1f, 0xab,
- 0x0f, 0xfb, 0x1b, 0x7f, 0x0f, 0xfb, 0x18, 0x51, 0x0f, 0xfb, 0x02, 0xe3,
- 0x0f, 0xfb, 0x1b, 0xb6, 0x0f, 0xf0, 0x0f, 0x00, 0x0f, 0xf8, 0x1f, 0xb7,
- 0x01, 0x72, 0x0f, 0xc4, 0x06, 0xfd, 0x0f, 0xfa, 0x1e, 0xd7, 0x00, 0x40,
- 0x0f, 0xc4, 0x07, 0xf3, 0x0f, 0xfa, 0x1c, 0xa7, 0x00, 0x00, 0x0f, 0xf9,
- 0x1f, 0xb7, 0x0f, 0xfb, 0x01, 0xcf, 0x0f, 0xf9, 0x1f, 0xc2, 0x03, 0x3a,
- 0x00, 0xc8, 0x10, 0x55, 0x10, 0x95, 0x12, 0x15, 0x1f, 0xfb, 0x02, 0x35,
- 0x0f, 0xfb, 0x01, 0xcb, 0x0f, 0xfb, 0x17, 0x17, 0x0f, 0xfb, 0x01, 0xcf,
- 0x0f, 0xf8, 0x1f, 0xbb, 0x00, 0xc8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x08, 0x07, 0x06
-};
-
-#endif
+++ /dev/null
-#ifndef SCSI_ASCQ_TBL_C_INCLUDED
-#define SCSI_ASCQ_TBL_C_INCLUDED
-
-/* AuToMaGiCaLlY generated from: "t10.org/asc-num.txt"
- *******************************************************************************
- * File: ASC-NUM.TXT
- *
- * SCSI ASC/ASCQ Assignments
- * Numeric Sorted Listing
- * as of 5/18/00
- *
- * D - DIRECT ACCESS DEVICE (SBC-2) device column key
- * .T - SEQUENTIAL ACCESS DEVICE (SSC) -------------------
- * . L - PRINTER DEVICE (SSC) blank = reserved
- * . P - PROCESSOR DEVICE (SPC) not blank = allowed
- * . .W - WRITE ONCE READ MULTIPLE DEVICE (SBC-2)
- * . . R - CD DEVICE (MMC)
- * . . S - SCANNER DEVICE (SCSI-2)
- * . . .O - OPTICAL MEMORY DEVICE (SBC-2)
- * . . . M - MEDIA CHANGER DEVICE (SMC)
- * . . . C - COMMUNICATION DEVICE (SCSI-2)
- * . . . .A - STORAGE ARRAY DEVICE (SCC)
- * . . . . E - ENCLOSURE SERVICES DEVICE (SES)
- * . . . . B - SIMPLIFIED DIRECT-ACCESS DEVICE (RBC)
- * . . . . .K - OPTICAL CARD READER/WRITER DEVICE (OCRW)
- * ASC/ASCQ DTLPWRSOMCAEBK Description
- * ------- -------------- ----------------------------------------------------
- */
-
-static char SenseDevTypes001[] = "DTLPWRSOMCAEBK";
-static char SenseDevTypes002[] = ".T............";
-static char SenseDevTypes003[] = ".T....S.......";
-static char SenseDevTypes004[] = ".TL...S.......";
-static char SenseDevTypes005[] = ".....R........";
-static char SenseDevTypes006[] = "DTL.WRSOM.AEBK";
-static char SenseDevTypes007[] = "D...W..O....BK";
-static char SenseDevTypes008[] = "D...WR.OM...BK";
-static char SenseDevTypes009[] = "DTL.W.SO....BK";
-static char SenseDevTypes010[] = "DTL..R.O....B.";
-static char SenseDevTypes011[] = "DT..W..OMCA.BK";
-static char SenseDevTypes012[] = "..............";
-static char SenseDevTypes013[] = "DTL.WRSOMCAEBK";
-static char SenseDevTypes014[] = "DTL.WRSOM...BK";
-static char SenseDevTypes015[] = "DT...R.OM...BK";
-static char SenseDevTypes016[] = "DTLPWRSO.C...K";
-static char SenseDevTypes017[] = "DT..WR.O....B.";
-static char SenseDevTypes018[] = "....WR.O.....K";
-static char SenseDevTypes019[] = "....WR.O......";
-static char SenseDevTypes020[] = ".T...RS.......";
-static char SenseDevTypes021[] = ".............K";
-static char SenseDevTypes022[] = "DT..W..O....B.";
-static char SenseDevTypes023[] = "DT..WRSO....BK";
-static char SenseDevTypes024[] = "DT..W.SO....BK";
-static char SenseDevTypes025[] = "....WR.O....B.";
-static char SenseDevTypes026[] = "....W..O....B.";
-static char SenseDevTypes027[] = "DT.....O....BK";
-static char SenseDevTypes028[] = "DTL.WRSO....BK";
-static char SenseDevTypes029[] = "DT..WR.O....BK";
-static char SenseDevTypes030[] = "DT..W..O....BK";
-static char SenseDevTypes031[] = "D...WR.O....BK";
-static char SenseDevTypes032[] = "D......O.....K";
-static char SenseDevTypes033[] = "D......O....BK";
-static char SenseDevTypes034[] = "DT..WR.OM...BK";
-static char SenseDevTypes035[] = "D.............";
-static char SenseDevTypes036[] = "DTLPWRSOMCAE.K";
-static char SenseDevTypes037[] = "DTLPWRSOMCA.BK";
-static char SenseDevTypes038[] = ".T...R........";
-static char SenseDevTypes039[] = "DT..WR.OM...B.";
-static char SenseDevTypes040[] = "DTL.WRSOMCAE.K";
-static char SenseDevTypes041[] = "DTLPWRSOMCAE..";
-static char SenseDevTypes042[] = "......S.......";
-static char SenseDevTypes043[] = "............B.";
-static char SenseDevTypes044[] = "DTLPWRSO.CA..K";
-static char SenseDevTypes045[] = "DT...R.......K";
-static char SenseDevTypes046[] = "D.L..R.O....B.";
-static char SenseDevTypes047[] = "..L...........";
-static char SenseDevTypes048[] = ".TL...........";
-static char SenseDevTypes049[] = "DTLPWRSOMC..BK";
-static char SenseDevTypes050[] = "DT..WR.OMCAEBK";
-static char SenseDevTypes051[] = "DT..WR.OMCAEB.";
-static char SenseDevTypes052[] = ".T...R.O......";
-static char SenseDevTypes053[] = "...P..........";
-static char SenseDevTypes054[] = "DTLPWRSOM.AE.K";
-static char SenseDevTypes055[] = "DTLPWRSOM.AE..";
-static char SenseDevTypes056[] = ".......O......";
-static char SenseDevTypes057[] = "DTLPWRSOM...BK";
-static char SenseDevTypes058[] = "DT..WR.O..A.BK";
-static char SenseDevTypes059[] = "DTLPWRSOM....K";
-static char SenseDevTypes060[] = "D......O......";
-static char SenseDevTypes061[] = ".....R......B.";
-static char SenseDevTypes062[] = "D...........B.";
-static char SenseDevTypes063[] = "............BK";
-static char SenseDevTypes064[] = "..........A...";
-
-static ASCQ_Table_t ASCQ_Table[] = {
- {
- 0x00, 0x00,
- SenseDevTypes001,
- "NO ADDITIONAL SENSE INFORMATION"
- },
- {
- 0x00, 0x01,
- SenseDevTypes002,
- "FILEMARK DETECTED"
- },
- {
- 0x00, 0x02,
- SenseDevTypes003,
- "END-OF-PARTITION/MEDIUM DETECTED"
- },
- {
- 0x00, 0x03,
- SenseDevTypes002,
- "SETMARK DETECTED"
- },
- {
- 0x00, 0x04,
- SenseDevTypes003,
- "BEGINNING-OF-PARTITION/MEDIUM DETECTED"
- },
- {
- 0x00, 0x05,
- SenseDevTypes004,
- "END-OF-DATA DETECTED"
- },
- {
- 0x00, 0x06,
- SenseDevTypes001,
- "I/O PROCESS TERMINATED"
- },
- {
- 0x00, 0x11,
- SenseDevTypes005,
- "AUDIO PLAY OPERATION IN PROGRESS"
- },
- {
- 0x00, 0x12,
- SenseDevTypes005,
- "AUDIO PLAY OPERATION PAUSED"
- },
- {
- 0x00, 0x13,
- SenseDevTypes005,
- "AUDIO PLAY OPERATION SUCCESSFULLY COMPLETED"
- },
- {
- 0x00, 0x14,
- SenseDevTypes005,
- "AUDIO PLAY OPERATION STOPPED DUE TO ERROR"
- },
- {
- 0x00, 0x15,
- SenseDevTypes005,
- "NO CURRENT AUDIO STATUS TO RETURN"
- },
- {
- 0x00, 0x16,
- SenseDevTypes001,
- "OPERATION IN PROGRESS"
- },
- {
- 0x00, 0x17,
- SenseDevTypes006,
- "CLEANING REQUESTED"
- },
- {
- 0x01, 0x00,
- SenseDevTypes007,
- "NO INDEX/SECTOR SIGNAL"
- },
- {
- 0x02, 0x00,
- SenseDevTypes008,
- "NO SEEK COMPLETE"
- },
- {
- 0x03, 0x00,
- SenseDevTypes009,
- "PERIPHERAL DEVICE WRITE FAULT"
- },
- {
- 0x03, 0x01,
- SenseDevTypes002,
- "NO WRITE CURRENT"
- },
- {
- 0x03, 0x02,
- SenseDevTypes002,
- "EXCESSIVE WRITE ERRORS"
- },
- {
- 0x04, 0x00,
- SenseDevTypes001,
- "LOGICAL UNIT NOT READY, CAUSE NOT REPORTABLE"
- },
- {
- 0x04, 0x01,
- SenseDevTypes001,
- "LOGICAL UNIT IS IN PROCESS OF BECOMING READY"
- },
- {
- 0x04, 0x02,
- SenseDevTypes001,
- "LOGICAL UNIT NOT READY, INITIALIZING CMD. REQUIRED"
- },
- {
- 0x04, 0x03,
- SenseDevTypes001,
- "LOGICAL UNIT NOT READY, MANUAL INTERVENTION REQUIRED"
- },
- {
- 0x04, 0x04,
- SenseDevTypes010,
- "LOGICAL UNIT NOT READY, FORMAT IN PROGRESS"
- },
- {
- 0x04, 0x05,
- SenseDevTypes011,
- "LOGICAL UNIT NOT READY, REBUILD IN PROGRESS"
- },
- {
- 0x04, 0x06,
- SenseDevTypes011,
- "LOGICAL UNIT NOT READY, RECALCULATION IN PROGRESS"
- },
- {
- 0x04, 0x07,
- SenseDevTypes001,
- "LOGICAL UNIT NOT READY, OPERATION IN PROGRESS"
- },
- {
- 0x04, 0x08,
- SenseDevTypes005,
- "LOGICAL UNIT NOT READY, LONG WRITE IN PROGRESS"
- },
- {
- 0x04, 0x09,
- SenseDevTypes001,
- "LOGICAL UNIT NOT READY, SELF-TEST IN PROGRESS"
- },
- {
- 0x04, 0x10,
- SenseDevTypes012,
- "auxiliary memory code 2 (99-148) [proposed]"
- },
- {
- 0x05, 0x00,
- SenseDevTypes013,
- "LOGICAL UNIT DOES NOT RESPOND TO SELECTION"
- },
- {
- 0x06, 0x00,
- SenseDevTypes008,
- "NO REFERENCE POSITION FOUND"
- },
- {
- 0x07, 0x00,
- SenseDevTypes014,
- "MULTIPLE PERIPHERAL DEVICES SELECTED"
- },
- {
- 0x08, 0x00,
- SenseDevTypes013,
- "LOGICAL UNIT COMMUNICATION FAILURE"
- },
- {
- 0x08, 0x01,
- SenseDevTypes013,
- "LOGICAL UNIT COMMUNICATION TIME-OUT"
- },
- {
- 0x08, 0x02,
- SenseDevTypes013,
- "LOGICAL UNIT COMMUNICATION PARITY ERROR"
- },
- {
- 0x08, 0x03,
- SenseDevTypes015,
- "LOGICAL UNIT COMMUNICATION CRC ERROR (ULTRA-DMA/32)"
- },
- {
- 0x08, 0x04,
- SenseDevTypes016,
- "UNREACHABLE COPY TARGET"
- },
- {
- 0x09, 0x00,
- SenseDevTypes017,
- "TRACK FOLLOWING ERROR"
- },
- {
- 0x09, 0x01,
- SenseDevTypes018,
- "TRACKING SERVO FAILURE"
- },
- {
- 0x09, 0x02,
- SenseDevTypes018,
- "FOCUS SERVO FAILURE"
- },
- {
- 0x09, 0x03,
- SenseDevTypes019,
- "SPINDLE SERVO FAILURE"
- },
- {
- 0x09, 0x04,
- SenseDevTypes017,
- "HEAD SELECT FAULT"
- },
- {
- 0x0A, 0x00,
- SenseDevTypes001,
- "ERROR LOG OVERFLOW"
- },
- {
- 0x0B, 0x00,
- SenseDevTypes001,
- "WARNING"
- },
- {
- 0x0B, 0x01,
- SenseDevTypes001,
- "WARNING - SPECIFIED TEMPERATURE EXCEEDED"
- },
- {
- 0x0B, 0x02,
- SenseDevTypes001,
- "WARNING - ENCLOSURE DEGRADED"
- },
- {
- 0x0C, 0x00,
- SenseDevTypes020,
- "WRITE ERROR"
- },
- {
- 0x0C, 0x01,
- SenseDevTypes021,
- "WRITE ERROR - RECOVERED WITH AUTO REALLOCATION"
- },
- {
- 0x0C, 0x02,
- SenseDevTypes007,
- "WRITE ERROR - AUTO REALLOCATION FAILED"
- },
- {
- 0x0C, 0x03,
- SenseDevTypes007,
- "WRITE ERROR - RECOMMEND REASSIGNMENT"
- },
- {
- 0x0C, 0x04,
- SenseDevTypes022,
- "COMPRESSION CHECK MISCOMPARE ERROR"
- },
- {
- 0x0C, 0x05,
- SenseDevTypes022,
- "DATA EXPANSION OCCURRED DURING COMPRESSION"
- },
- {
- 0x0C, 0x06,
- SenseDevTypes022,
- "BLOCK NOT COMPRESSIBLE"
- },
- {
- 0x0C, 0x07,
- SenseDevTypes005,
- "WRITE ERROR - RECOVERY NEEDED"
- },
- {
- 0x0C, 0x08,
- SenseDevTypes005,
- "WRITE ERROR - RECOVERY FAILED"
- },
- {
- 0x0C, 0x09,
- SenseDevTypes005,
- "WRITE ERROR - LOSS OF STREAMING"
- },
- {
- 0x0C, 0x0A,
- SenseDevTypes005,
- "WRITE ERROR - PADDING BLOCKS ADDED"
- },
- {
- 0x0C, 0x0B,
- SenseDevTypes012,
- "auxiliary memory code 4 (99-148) [proposed]"
- },
- {
- 0x10, 0x00,
- SenseDevTypes007,
- "ID CRC OR ECC ERROR"
- },
- {
- 0x11, 0x00,
- SenseDevTypes023,
- "UNRECOVERED READ ERROR"
- },
- {
- 0x11, 0x01,
- SenseDevTypes023,
- "READ RETRIES EXHAUSTED"
- },
- {
- 0x11, 0x02,
- SenseDevTypes023,
- "ERROR TOO LONG TO CORRECT"
- },
- {
- 0x11, 0x03,
- SenseDevTypes024,
- "MULTIPLE READ ERRORS"
- },
- {
- 0x11, 0x04,
- SenseDevTypes007,
- "UNRECOVERED READ ERROR - AUTO REALLOCATE FAILED"
- },
- {
- 0x11, 0x05,
- SenseDevTypes025,
- "L-EC UNCORRECTABLE ERROR"
- },
- {
- 0x11, 0x06,
- SenseDevTypes025,
- "CIRC UNRECOVERED ERROR"
- },
- {
- 0x11, 0x07,
- SenseDevTypes026,
- "DATA RE-SYNCHRONIZATION ERROR"
- },
- {
- 0x11, 0x08,
- SenseDevTypes002,
- "INCOMPLETE BLOCK READ"
- },
- {
- 0x11, 0x09,
- SenseDevTypes002,
- "NO GAP FOUND"
- },
- {
- 0x11, 0x0A,
- SenseDevTypes027,
- "MISCORRECTED ERROR"
- },
- {
- 0x11, 0x0B,
- SenseDevTypes007,
- "UNRECOVERED READ ERROR - RECOMMEND REASSIGNMENT"
- },
- {
- 0x11, 0x0C,
- SenseDevTypes007,
- "UNRECOVERED READ ERROR - RECOMMEND REWRITE THE DATA"
- },
- {
- 0x11, 0x0D,
- SenseDevTypes017,
- "DE-COMPRESSION CRC ERROR"
- },
- {
- 0x11, 0x0E,
- SenseDevTypes017,
- "CANNOT DECOMPRESS USING DECLARED ALGORITHM"
- },
- {
- 0x11, 0x0F,
- SenseDevTypes005,
- "ERROR READING UPC/EAN NUMBER"
- },
- {
- 0x11, 0x10,
- SenseDevTypes005,
- "ERROR READING ISRC NUMBER"
- },
- {
- 0x11, 0x11,
- SenseDevTypes005,
- "READ ERROR - LOSS OF STREAMING"
- },
- {
- 0x11, 0x12,
- SenseDevTypes012,
- "auxiliary memory code 3 (99-148) [proposed]"
- },
- {
- 0x12, 0x00,
- SenseDevTypes007,
- "ADDRESS MARK NOT FOUND FOR ID FIELD"
- },
- {
- 0x13, 0x00,
- SenseDevTypes007,
- "ADDRESS MARK NOT FOUND FOR DATA FIELD"
- },
- {
- 0x14, 0x00,
- SenseDevTypes028,
- "RECORDED ENTITY NOT FOUND"
- },
- {
- 0x14, 0x01,
- SenseDevTypes029,
- "RECORD NOT FOUND"
- },
- {
- 0x14, 0x02,
- SenseDevTypes002,
- "FILEMARK OR SETMARK NOT FOUND"
- },
- {
- 0x14, 0x03,
- SenseDevTypes002,
- "END-OF-DATA NOT FOUND"
- },
- {
- 0x14, 0x04,
- SenseDevTypes002,
- "BLOCK SEQUENCE ERROR"
- },
- {
- 0x14, 0x05,
- SenseDevTypes030,
- "RECORD NOT FOUND - RECOMMEND REASSIGNMENT"
- },
- {
- 0x14, 0x06,
- SenseDevTypes030,
- "RECORD NOT FOUND - DATA AUTO-REALLOCATED"
- },
- {
- 0x15, 0x00,
- SenseDevTypes014,
- "RANDOM POSITIONING ERROR"
- },
- {
- 0x15, 0x01,
- SenseDevTypes014,
- "MECHANICAL POSITIONING ERROR"
- },
- {
- 0x15, 0x02,
- SenseDevTypes029,
- "POSITIONING ERROR DETECTED BY READ OF MEDIUM"
- },
- {
- 0x16, 0x00,
- SenseDevTypes007,
- "DATA SYNCHRONIZATION MARK ERROR"
- },
- {
- 0x16, 0x01,
- SenseDevTypes007,
- "DATA SYNC ERROR - DATA REWRITTEN"
- },
- {
- 0x16, 0x02,
- SenseDevTypes007,
- "DATA SYNC ERROR - RECOMMEND REWRITE"
- },
- {
- 0x16, 0x03,
- SenseDevTypes007,
- "DATA SYNC ERROR - DATA AUTO-REALLOCATED"
- },
- {
- 0x16, 0x04,
- SenseDevTypes007,
- "DATA SYNC ERROR - RECOMMEND REASSIGNMENT"
- },
- {
- 0x17, 0x00,
- SenseDevTypes023,
- "RECOVERED DATA WITH NO ERROR CORRECTION APPLIED"
- },
- {
- 0x17, 0x01,
- SenseDevTypes023,
- "RECOVERED DATA WITH RETRIES"
- },
- {
- 0x17, 0x02,
- SenseDevTypes029,
- "RECOVERED DATA WITH POSITIVE HEAD OFFSET"
- },
- {
- 0x17, 0x03,
- SenseDevTypes029,
- "RECOVERED DATA WITH NEGATIVE HEAD OFFSET"
- },
- {
- 0x17, 0x04,
- SenseDevTypes025,
- "RECOVERED DATA WITH RETRIES AND/OR CIRC APPLIED"
- },
- {
- 0x17, 0x05,
- SenseDevTypes031,
- "RECOVERED DATA USING PREVIOUS SECTOR ID"
- },
- {
- 0x17, 0x06,
- SenseDevTypes007,
- "RECOVERED DATA WITHOUT ECC - DATA AUTO-REALLOCATED"
- },
- {
- 0x17, 0x07,
- SenseDevTypes031,
- "RECOVERED DATA WITHOUT ECC - RECOMMEND REASSIGNMENT"
- },
- {
- 0x17, 0x08,
- SenseDevTypes031,
- "RECOVERED DATA WITHOUT ECC - RECOMMEND REWRITE"
- },
- {
- 0x17, 0x09,
- SenseDevTypes031,
- "RECOVERED DATA WITHOUT ECC - DATA REWRITTEN"
- },
- {
- 0x18, 0x00,
- SenseDevTypes029,
- "RECOVERED DATA WITH ERROR CORRECTION APPLIED"
- },
- {
- 0x18, 0x01,
- SenseDevTypes031,
- "RECOVERED DATA WITH ERROR CORR. & RETRIES APPLIED"
- },
- {
- 0x18, 0x02,
- SenseDevTypes031,
- "RECOVERED DATA - DATA AUTO-REALLOCATED"
- },
- {
- 0x18, 0x03,
- SenseDevTypes005,
- "RECOVERED DATA WITH CIRC"
- },
- {
- 0x18, 0x04,
- SenseDevTypes005,
- "RECOVERED DATA WITH L-EC"
- },
- {
- 0x18, 0x05,
- SenseDevTypes031,
- "RECOVERED DATA - RECOMMEND REASSIGNMENT"
- },
- {
- 0x18, 0x06,
- SenseDevTypes031,
- "RECOVERED DATA - RECOMMEND REWRITE"
- },
- {
- 0x18, 0x07,
- SenseDevTypes007,
- "RECOVERED DATA WITH ECC - DATA REWRITTEN"
- },
- {
- 0x19, 0x00,
- SenseDevTypes032,
- "DEFECT LIST ERROR"
- },
- {
- 0x19, 0x01,
- SenseDevTypes032,
- "DEFECT LIST NOT AVAILABLE"
- },
- {
- 0x19, 0x02,
- SenseDevTypes032,
- "DEFECT LIST ERROR IN PRIMARY LIST"
- },
- {
- 0x19, 0x03,
- SenseDevTypes032,
- "DEFECT LIST ERROR IN GROWN LIST"
- },
- {
- 0x1A, 0x00,
- SenseDevTypes001,
- "PARAMETER LIST LENGTH ERROR"
- },
- {
- 0x1B, 0x00,
- SenseDevTypes001,
- "SYNCHRONOUS DATA TRANSFER ERROR"
- },
- {
- 0x1C, 0x00,
- SenseDevTypes033,
- "DEFECT LIST NOT FOUND"
- },
- {
- 0x1C, 0x01,
- SenseDevTypes033,
- "PRIMARY DEFECT LIST NOT FOUND"
- },
- {
- 0x1C, 0x02,
- SenseDevTypes033,
- "GROWN DEFECT LIST NOT FOUND"
- },
- {
- 0x1D, 0x00,
- SenseDevTypes029,
- "MISCOMPARE DURING VERIFY OPERATION"
- },
- {
- 0x1E, 0x00,
- SenseDevTypes007,
- "RECOVERED ID WITH ECC CORRECTION"
- },
- {
- 0x1F, 0x00,
- SenseDevTypes032,
- "PARTIAL DEFECT LIST TRANSFER"
- },
- {
- 0x20, 0x00,
- SenseDevTypes001,
- "INVALID COMMAND OPERATION CODE"
- },
- {
- 0x20, 0x01,
- SenseDevTypes012,
- "access controls code 1 (99-314) [proposed]"
- },
- {
- 0x20, 0x02,
- SenseDevTypes012,
- "access controls code 2 (99-314) [proposed]"
- },
- {
- 0x20, 0x03,
- SenseDevTypes012,
- "access controls code 3 (99-314) [proposed]"
- },
- {
- 0x21, 0x00,
- SenseDevTypes034,
- "LOGICAL BLOCK ADDRESS OUT OF RANGE"
- },
- {
- 0x21, 0x01,
- SenseDevTypes034,
- "INVALID ELEMENT ADDRESS"
- },
- {
- 0x22, 0x00,
- SenseDevTypes035,
- "ILLEGAL FUNCTION (USE 20 00, 24 00, OR 26 00)"
- },
- {
- 0x24, 0x00,
- SenseDevTypes001,
- "INVALID FIELD IN CDB"
- },
- {
- 0x24, 0x01,
- SenseDevTypes001,
- "CDB DECRYPTION ERROR"
- },
- {
- 0x25, 0x00,
- SenseDevTypes001,
- "LOGICAL UNIT NOT SUPPORTED"
- },
- {
- 0x26, 0x00,
- SenseDevTypes001,
- "INVALID FIELD IN PARAMETER LIST"
- },
- {
- 0x26, 0x01,
- SenseDevTypes001,
- "PARAMETER NOT SUPPORTED"
- },
- {
- 0x26, 0x02,
- SenseDevTypes001,
- "PARAMETER VALUE INVALID"
- },
- {
- 0x26, 0x03,
- SenseDevTypes036,
- "THRESHOLD PARAMETERS NOT SUPPORTED"
- },
- {
- 0x26, 0x04,
- SenseDevTypes001,
- "INVALID RELEASE OF PERSISTENT RESERVATION"
- },
- {
- 0x26, 0x05,
- SenseDevTypes037,
- "DATA DECRYPTION ERROR"
- },
- {
- 0x26, 0x06,
- SenseDevTypes016,
- "TOO MANY TARGET DESCRIPTORS"
- },
- {
- 0x26, 0x07,
- SenseDevTypes016,
- "UNSUPPORTED TARGET DESCRIPTOR TYPE CODE"
- },
- {
- 0x26, 0x08,
- SenseDevTypes016,
- "TOO MANY SEGMENT DESCRIPTORS"
- },
- {
- 0x26, 0x09,
- SenseDevTypes016,
- "UNSUPPORTED SEGMENT DESCRIPTOR TYPE CODE"
- },
- {
- 0x26, 0x0A,
- SenseDevTypes016,
- "UNEXPECTED INEXACT SEGMENT"
- },
- {
- 0x26, 0x0B,
- SenseDevTypes016,
- "INLINE DATA LENGTH EXCEEDED"
- },
- {
- 0x26, 0x0C,
- SenseDevTypes016,
- "INVALID OPERATION FOR COPY SOURCE OR DESTINATION"
- },
- {
- 0x26, 0x0D,
- SenseDevTypes016,
- "COPY SEGMENT GRANULARITY VIOLATION"
- },
- {
- 0x27, 0x00,
- SenseDevTypes029,
- "WRITE PROTECTED"
- },
- {
- 0x27, 0x01,
- SenseDevTypes029,
- "HARDWARE WRITE PROTECTED"
- },
- {
- 0x27, 0x02,
- SenseDevTypes029,
- "LOGICAL UNIT SOFTWARE WRITE PROTECTED"
- },
- {
- 0x27, 0x03,
- SenseDevTypes038,
- "ASSOCIATED WRITE PROTECT"
- },
- {
- 0x27, 0x04,
- SenseDevTypes038,
- "PERSISTENT WRITE PROTECT"
- },
- {
- 0x27, 0x05,
- SenseDevTypes038,
- "PERMANENT WRITE PROTECT"
- },
- {
- 0x28, 0x00,
- SenseDevTypes001,
- "NOT READY TO READY CHANGE, MEDIUM MAY HAVE CHANGED"
- },
- {
- 0x28, 0x01,
- SenseDevTypes039,
- "IMPORT OR EXPORT ELEMENT ACCESSED"
- },
- {
- 0x29, 0x00,
- SenseDevTypes001,
- "POWER ON, RESET, OR BUS DEVICE RESET OCCURRED"
- },
- {
- 0x29, 0x01,
- SenseDevTypes001,
- "POWER ON OCCURRED"
- },
- {
- 0x29, 0x02,
- SenseDevTypes001,
- "SCSI BUS RESET OCCURRED"
- },
- {
- 0x29, 0x03,
- SenseDevTypes001,
- "BUS DEVICE RESET FUNCTION OCCURRED"
- },
- {
- 0x29, 0x04,
- SenseDevTypes001,
- "DEVICE INTERNAL RESET"
- },
- {
- 0x29, 0x05,
- SenseDevTypes001,
- "TRANSCEIVER MODE CHANGED TO SINGLE-ENDED"
- },
- {
- 0x29, 0x06,
- SenseDevTypes001,
- "TRANSCEIVER MODE CHANGED TO LVD"
- },
- {
- 0x2A, 0x00,
- SenseDevTypes013,
- "PARAMETERS CHANGED"
- },
- {
- 0x2A, 0x01,
- SenseDevTypes013,
- "MODE PARAMETERS CHANGED"
- },
- {
- 0x2A, 0x02,
- SenseDevTypes040,
- "LOG PARAMETERS CHANGED"
- },
- {
- 0x2A, 0x03,
- SenseDevTypes036,
- "RESERVATIONS PREEMPTED"
- },
- {
- 0x2A, 0x04,
- SenseDevTypes041,
- "RESERVATIONS RELEASED"
- },
- {
- 0x2A, 0x05,
- SenseDevTypes041,
- "REGISTRATIONS PREEMPTED"
- },
- {
- 0x2B, 0x00,
- SenseDevTypes016,
- "COPY CANNOT EXECUTE SINCE HOST CANNOT DISCONNECT"
- },
- {
- 0x2C, 0x00,
- SenseDevTypes001,
- "COMMAND SEQUENCE ERROR"
- },
- {
- 0x2C, 0x01,
- SenseDevTypes042,
- "TOO MANY WINDOWS SPECIFIED"
- },
- {
- 0x2C, 0x02,
- SenseDevTypes042,
- "INVALID COMBINATION OF WINDOWS SPECIFIED"
- },
- {
- 0x2C, 0x03,
- SenseDevTypes005,
- "CURRENT PROGRAM AREA IS NOT EMPTY"
- },
- {
- 0x2C, 0x04,
- SenseDevTypes005,
- "CURRENT PROGRAM AREA IS EMPTY"
- },
- {
- 0x2C, 0x05,
- SenseDevTypes043,
- "ILLEGAL POWER CONDITION REQUEST"
- },
- {
- 0x2D, 0x00,
- SenseDevTypes002,
- "OVERWRITE ERROR ON UPDATE IN PLACE"
- },
- {
- 0x2E, 0x00,
- SenseDevTypes044,
- "ERROR DETECTED BY THIRD PARTY TEMPORARY INITIATOR"
- },
- {
- 0x2E, 0x01,
- SenseDevTypes044,
- "THIRD PARTY DEVICE FAILURE"
- },
- {
- 0x2E, 0x02,
- SenseDevTypes044,
- "COPY TARGET DEVICE NOT REACHABLE"
- },
- {
- 0x2E, 0x03,
- SenseDevTypes044,
- "INCORRECT COPY TARGET DEVICE TYPE"
- },
- {
- 0x2E, 0x04,
- SenseDevTypes044,
- "COPY TARGET DEVICE DATA UNDERRUN"
- },
- {
- 0x2E, 0x05,
- SenseDevTypes044,
- "COPY TARGET DEVICE DATA OVERRUN"
- },
- {
- 0x2F, 0x00,
- SenseDevTypes001,
- "COMMANDS CLEARED BY ANOTHER INITIATOR"
- },
- {
- 0x30, 0x00,
- SenseDevTypes034,
- "INCOMPATIBLE MEDIUM INSTALLED"
- },
- {
- 0x30, 0x01,
- SenseDevTypes029,
- "CANNOT READ MEDIUM - UNKNOWN FORMAT"
- },
- {
- 0x30, 0x02,
- SenseDevTypes029,
- "CANNOT READ MEDIUM - INCOMPATIBLE FORMAT"
- },
- {
- 0x30, 0x03,
- SenseDevTypes045,
- "CLEANING CARTRIDGE INSTALLED"
- },
- {
- 0x30, 0x04,
- SenseDevTypes029,
- "CANNOT WRITE MEDIUM - UNKNOWN FORMAT"
- },
- {
- 0x30, 0x05,
- SenseDevTypes029,
- "CANNOT WRITE MEDIUM - INCOMPATIBLE FORMAT"
- },
- {
- 0x30, 0x06,
- SenseDevTypes017,
- "CANNOT FORMAT MEDIUM - INCOMPATIBLE MEDIUM"
- },
- {
- 0x30, 0x07,
- SenseDevTypes006,
- "CLEANING FAILURE"
- },
- {
- 0x30, 0x08,
- SenseDevTypes005,
- "CANNOT WRITE - APPLICATION CODE MISMATCH"
- },
- {
- 0x30, 0x09,
- SenseDevTypes005,
- "CURRENT SESSION NOT FIXATED FOR APPEND"
- },
- {
- 0x31, 0x00,
- SenseDevTypes029,
- "MEDIUM FORMAT CORRUPTED"
- },
- {
- 0x31, 0x01,
- SenseDevTypes046,
- "FORMAT COMMAND FAILED"
- },
- {
- 0x32, 0x00,
- SenseDevTypes007,
- "NO DEFECT SPARE LOCATION AVAILABLE"
- },
- {
- 0x32, 0x01,
- SenseDevTypes007,
- "DEFECT LIST UPDATE FAILURE"
- },
- {
- 0x33, 0x00,
- SenseDevTypes002,
- "TAPE LENGTH ERROR"
- },
- {
- 0x34, 0x00,
- SenseDevTypes001,
- "ENCLOSURE FAILURE"
- },
- {
- 0x35, 0x00,
- SenseDevTypes001,
- "ENCLOSURE SERVICES FAILURE"
- },
- {
- 0x35, 0x01,
- SenseDevTypes001,
- "UNSUPPORTED ENCLOSURE FUNCTION"
- },
- {
- 0x35, 0x02,
- SenseDevTypes001,
- "ENCLOSURE SERVICES UNAVAILABLE"
- },
- {
- 0x35, 0x03,
- SenseDevTypes001,
- "ENCLOSURE SERVICES TRANSFER FAILURE"
- },
- {
- 0x35, 0x04,
- SenseDevTypes001,
- "ENCLOSURE SERVICES TRANSFER REFUSED"
- },
- {
- 0x36, 0x00,
- SenseDevTypes047,
- "RIBBON, INK, OR TONER FAILURE"
- },
- {
- 0x37, 0x00,
- SenseDevTypes013,
- "ROUNDED PARAMETER"
- },
- {
- 0x38, 0x00,
- SenseDevTypes043,
- "EVENT STATUS NOTIFICATION"
- },
- {
- 0x38, 0x02,
- SenseDevTypes043,
- "ESN - POWER MANAGEMENT CLASS EVENT"
- },
- {
- 0x38, 0x04,
- SenseDevTypes043,
- "ESN - MEDIA CLASS EVENT"
- },
- {
- 0x38, 0x06,
- SenseDevTypes043,
- "ESN - DEVICE BUSY CLASS EVENT"
- },
- {
- 0x39, 0x00,
- SenseDevTypes040,
- "SAVING PARAMETERS NOT SUPPORTED"
- },
- {
- 0x3A, 0x00,
- SenseDevTypes014,
- "MEDIUM NOT PRESENT"
- },
- {
- 0x3A, 0x01,
- SenseDevTypes034,
- "MEDIUM NOT PRESENT - TRAY CLOSED"
- },
- {
- 0x3A, 0x02,
- SenseDevTypes034,
- "MEDIUM NOT PRESENT - TRAY OPEN"
- },
- {
- 0x3A, 0x03,
- SenseDevTypes039,
- "MEDIUM NOT PRESENT - LOADABLE"
- },
- {
- 0x3A, 0x04,
- SenseDevTypes039,
- "MEDIUM NOT PRESENT - MEDIUM AUXILIARY MEMORY ACCESSIBLE"
- },
- {
- 0x3B, 0x00,
- SenseDevTypes048,
- "SEQUENTIAL POSITIONING ERROR"
- },
- {
- 0x3B, 0x01,
- SenseDevTypes002,
- "TAPE POSITION ERROR AT BEGINNING-OF-MEDIUM"
- },
- {
- 0x3B, 0x02,
- SenseDevTypes002,
- "TAPE POSITION ERROR AT END-OF-MEDIUM"
- },
- {
- 0x3B, 0x03,
- SenseDevTypes047,
- "TAPE OR ELECTRONIC VERTICAL FORMS UNIT NOT READY"
- },
- {
- 0x3B, 0x04,
- SenseDevTypes047,
- "SLEW FAILURE"
- },
- {
- 0x3B, 0x05,
- SenseDevTypes047,
- "PAPER JAM"
- },
- {
- 0x3B, 0x06,
- SenseDevTypes047,
- "FAILED TO SENSE TOP-OF-FORM"
- },
- {
- 0x3B, 0x07,
- SenseDevTypes047,
- "FAILED TO SENSE BOTTOM-OF-FORM"
- },
- {
- 0x3B, 0x08,
- SenseDevTypes002,
- "REPOSITION ERROR"
- },
- {
- 0x3B, 0x09,
- SenseDevTypes042,
- "READ PAST END OF MEDIUM"
- },
- {
- 0x3B, 0x0A,
- SenseDevTypes042,
- "READ PAST BEGINNING OF MEDIUM"
- },
- {
- 0x3B, 0x0B,
- SenseDevTypes042,
- "POSITION PAST END OF MEDIUM"
- },
- {
- 0x3B, 0x0C,
- SenseDevTypes003,
- "POSITION PAST BEGINNING OF MEDIUM"
- },
- {
- 0x3B, 0x0D,
- SenseDevTypes034,
- "MEDIUM DESTINATION ELEMENT FULL"
- },
- {
- 0x3B, 0x0E,
- SenseDevTypes034,
- "MEDIUM SOURCE ELEMENT EMPTY"
- },
- {
- 0x3B, 0x0F,
- SenseDevTypes005,
- "END OF MEDIUM REACHED"
- },
- {
- 0x3B, 0x11,
- SenseDevTypes034,
- "MEDIUM MAGAZINE NOT ACCESSIBLE"
- },
- {
- 0x3B, 0x12,
- SenseDevTypes034,
- "MEDIUM MAGAZINE REMOVED"
- },
- {
- 0x3B, 0x13,
- SenseDevTypes034,
- "MEDIUM MAGAZINE INSERTED"
- },
- {
- 0x3B, 0x14,
- SenseDevTypes034,
- "MEDIUM MAGAZINE LOCKED"
- },
- {
- 0x3B, 0x15,
- SenseDevTypes034,
- "MEDIUM MAGAZINE UNLOCKED"
- },
- {
- 0x3B, 0x16,
- SenseDevTypes005,
- "MECHANICAL POSITIONING OR CHANGER ERROR"
- },
- {
- 0x3D, 0x00,
- SenseDevTypes036,
- "INVALID BITS IN IDENTIFY MESSAGE"
- },
- {
- 0x3E, 0x00,
- SenseDevTypes001,
- "LOGICAL UNIT HAS NOT SELF-CONFIGURED YET"
- },
- {
- 0x3E, 0x01,
- SenseDevTypes001,
- "LOGICAL UNIT FAILURE"
- },
- {
- 0x3E, 0x02,
- SenseDevTypes001,
- "TIMEOUT ON LOGICAL UNIT"
- },
- {
- 0x3E, 0x03,
- SenseDevTypes001,
- "LOGICAL UNIT FAILED SELF-TEST"
- },
- {
- 0x3E, 0x04,
- SenseDevTypes001,
- "LOGICAL UNIT UNABLE TO UPDATE SELF-TEST LOG"
- },
- {
- 0x3F, 0x00,
- SenseDevTypes001,
- "TARGET OPERATING CONDITIONS HAVE CHANGED"
- },
- {
- 0x3F, 0x01,
- SenseDevTypes001,
- "MICROCODE HAS BEEN CHANGED"
- },
- {
- 0x3F, 0x02,
- SenseDevTypes049,
- "CHANGED OPERATING DEFINITION"
- },
- {
- 0x3F, 0x03,
- SenseDevTypes001,
- "INQUIRY DATA HAS CHANGED"
- },
- {
- 0x3F, 0x04,
- SenseDevTypes050,
- "COMPONENT DEVICE ATTACHED"
- },
- {
- 0x3F, 0x05,
- SenseDevTypes050,
- "DEVICE IDENTIFIER CHANGED"
- },
- {
- 0x3F, 0x06,
- SenseDevTypes051,
- "REDUNDANCY GROUP CREATED OR MODIFIED"
- },
- {
- 0x3F, 0x07,
- SenseDevTypes051,
- "REDUNDANCY GROUP DELETED"
- },
- {
- 0x3F, 0x08,
- SenseDevTypes051,
- "SPARE CREATED OR MODIFIED"
- },
- {
- 0x3F, 0x09,
- SenseDevTypes051,
- "SPARE DELETED"
- },
- {
- 0x3F, 0x0A,
- SenseDevTypes050,
- "VOLUME SET CREATED OR MODIFIED"
- },
- {
- 0x3F, 0x0B,
- SenseDevTypes050,
- "VOLUME SET DELETED"
- },
- {
- 0x3F, 0x0C,
- SenseDevTypes050,
- "VOLUME SET DEASSIGNED"
- },
- {
- 0x3F, 0x0D,
- SenseDevTypes050,
- "VOLUME SET REASSIGNED"
- },
- {
- 0x3F, 0x0E,
- SenseDevTypes041,
- "REPORTED LUNS DATA HAS CHANGED"
- },
- {
- 0x3F, 0x0F,
- SenseDevTypes001,
- "ECHO BUFFER OVERWRITTEN"
- },
- {
- 0x3F, 0x10,
- SenseDevTypes039,
- "MEDIUM LOADABLE"
- },
- {
- 0x3F, 0x11,
- SenseDevTypes039,
- "MEDIUM AUXILIARY MEMORY ACCESSIBLE"
- },
- {
- 0x40, 0x00,
- SenseDevTypes035,
- "RAM FAILURE (SHOULD USE 40 NN)"
- },
- {
- 0x40, 0xFF,
- SenseDevTypes001,
- "DIAGNOSTIC FAILURE ON COMPONENT NN (80H-FFH)"
- },
- {
- 0x41, 0x00,
- SenseDevTypes035,
- "DATA PATH FAILURE (SHOULD USE 40 NN)"
- },
- {
- 0x42, 0x00,
- SenseDevTypes035,
- "POWER-ON OR SELF-TEST FAILURE (SHOULD USE 40 NN)"
- },
- {
- 0x43, 0x00,
- SenseDevTypes001,
- "MESSAGE ERROR"
- },
- {
- 0x44, 0x00,
- SenseDevTypes001,
- "INTERNAL TARGET FAILURE"
- },
- {
- 0x45, 0x00,
- SenseDevTypes001,
- "SELECT OR RESELECT FAILURE"
- },
- {
- 0x46, 0x00,
- SenseDevTypes049,
- "UNSUCCESSFUL SOFT RESET"
- },
- {
- 0x47, 0x00,
- SenseDevTypes001,
- "SCSI PARITY ERROR"
- },
- {
- 0x47, 0x01,
- SenseDevTypes001,
- "DATA PHASE CRC ERROR DETECTED"
- },
- {
- 0x47, 0x02,
- SenseDevTypes001,
- "SCSI PARITY ERROR DETECTED DURING ST DATA PHASE"
- },
- {
- 0x47, 0x03,
- SenseDevTypes001,
- "INFORMATION UNIT CRC ERROR DETECTED"
- },
- {
- 0x47, 0x04,
- SenseDevTypes001,
- "ASYNCHRONOUS INFORMATION PROTECTION ERROR DETECTED"
- },
- {
- 0x48, 0x00,
- SenseDevTypes001,
- "INITIATOR DETECTED ERROR MESSAGE RECEIVED"
- },
- {
- 0x49, 0x00,
- SenseDevTypes001,
- "INVALID MESSAGE ERROR"
- },
- {
- 0x4A, 0x00,
- SenseDevTypes001,
- "COMMAND PHASE ERROR"
- },
- {
- 0x4B, 0x00,
- SenseDevTypes001,
- "DATA PHASE ERROR"
- },
- {
- 0x4C, 0x00,
- SenseDevTypes001,
- "LOGICAL UNIT FAILED SELF-CONFIGURATION"
- },
- {
- 0x4D, 0xFF,
- SenseDevTypes001,
- "TAGGED OVERLAPPED COMMANDS (NN = QUEUE TAG)"
- },
- {
- 0x4E, 0x00,
- SenseDevTypes001,
- "OVERLAPPED COMMANDS ATTEMPTED"
- },
- {
- 0x50, 0x00,
- SenseDevTypes002,
- "WRITE APPEND ERROR"
- },
- {
- 0x50, 0x01,
- SenseDevTypes002,
- "WRITE APPEND POSITION ERROR"
- },
- {
- 0x50, 0x02,
- SenseDevTypes002,
- "POSITION ERROR RELATED TO TIMING"
- },
- {
- 0x51, 0x00,
- SenseDevTypes052,
- "ERASE FAILURE"
- },
- {
- 0x52, 0x00,
- SenseDevTypes002,
- "CARTRIDGE FAULT"
- },
- {
- 0x53, 0x00,
- SenseDevTypes014,
- "MEDIA LOAD OR EJECT FAILED"
- },
- {
- 0x53, 0x01,
- SenseDevTypes002,
- "UNLOAD TAPE FAILURE"
- },
- {
- 0x53, 0x02,
- SenseDevTypes034,
- "MEDIUM REMOVAL PREVENTED"
- },
- {
- 0x54, 0x00,
- SenseDevTypes053,
- "SCSI TO HOST SYSTEM INTERFACE FAILURE"
- },
- {
- 0x55, 0x00,
- SenseDevTypes053,
- "SYSTEM RESOURCE FAILURE"
- },
- {
- 0x55, 0x01,
- SenseDevTypes033,
- "SYSTEM BUFFER FULL"
- },
- {
- 0x55, 0x02,
- SenseDevTypes054,
- "INSUFFICIENT RESERVATION RESOURCES"
- },
- {
- 0x55, 0x03,
- SenseDevTypes041,
- "INSUFFICIENT RESOURCES"
- },
- {
- 0x55, 0x04,
- SenseDevTypes055,
- "INSUFFICIENT REGISTRATION RESOURCES"
- },
- {
- 0x55, 0x05,
- SenseDevTypes012,
- "access controls code 4 (99-314) [proposed]"
- },
- {
- 0x55, 0x06,
- SenseDevTypes012,
- "auxiliary memory code 1 (99-148) [proposed]"
- },
- {
- 0x57, 0x00,
- SenseDevTypes005,
- "UNABLE TO RECOVER TABLE-OF-CONTENTS"
- },
- {
- 0x58, 0x00,
- SenseDevTypes056,
- "GENERATION DOES NOT EXIST"
- },
- {
- 0x59, 0x00,
- SenseDevTypes056,
- "UPDATED BLOCK READ"
- },
- {
- 0x5A, 0x00,
- SenseDevTypes057,
- "OPERATOR REQUEST OR STATE CHANGE INPUT"
- },
- {
- 0x5A, 0x01,
- SenseDevTypes034,
- "OPERATOR MEDIUM REMOVAL REQUEST"
- },
- {
- 0x5A, 0x02,
- SenseDevTypes058,
- "OPERATOR SELECTED WRITE PROTECT"
- },
- {
- 0x5A, 0x03,
- SenseDevTypes058,
- "OPERATOR SELECTED WRITE PERMIT"
- },
- {
- 0x5B, 0x00,
- SenseDevTypes059,
- "LOG EXCEPTION"
- },
- {
- 0x5B, 0x01,
- SenseDevTypes059,
- "THRESHOLD CONDITION MET"
- },
- {
- 0x5B, 0x02,
- SenseDevTypes059,
- "LOG COUNTER AT MAXIMUM"
- },
- {
- 0x5B, 0x03,
- SenseDevTypes059,
- "LOG LIST CODES EXHAUSTED"
- },
- {
- 0x5C, 0x00,
- SenseDevTypes060,
- "RPL STATUS CHANGE"
- },
- {
- 0x5C, 0x01,
- SenseDevTypes060,
- "SPINDLES SYNCHRONIZED"
- },
- {
- 0x5C, 0x02,
- SenseDevTypes060,
- "SPINDLES NOT SYNCHRONIZED"
- },
- {
- 0x5D, 0x00,
- SenseDevTypes001,
- "FAILURE PREDICTION THRESHOLD EXCEEDED"
- },
- {
- 0x5D, 0x01,
- SenseDevTypes061,
- "MEDIA FAILURE PREDICTION THRESHOLD EXCEEDED"
- },
- {
- 0x5D, 0x02,
- SenseDevTypes005,
- "LOGICAL UNIT FAILURE PREDICTION THRESHOLD EXCEEDED"
- },
- {
- 0x5D, 0x10,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE GENERAL HARD DRIVE FAILURE"
- },
- {
- 0x5D, 0x11,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE DRIVE ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x12,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE DATA ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x13,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE SEEK ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x14,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE TOO MANY BLOCK REASSIGNS"
- },
- {
- 0x5D, 0x15,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE ACCESS TIMES TOO HIGH"
- },
- {
- 0x5D, 0x16,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE START UNIT TIMES TOO HIGH"
- },
- {
- 0x5D, 0x17,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE CHANNEL PARAMETRICS"
- },
- {
- 0x5D, 0x18,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE CONTROLLER DETECTED"
- },
- {
- 0x5D, 0x19,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE THROUGHPUT PERFORMANCE"
- },
- {
- 0x5D, 0x1A,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE SEEK TIME PERFORMANCE"
- },
- {
- 0x5D, 0x1B,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE SPIN-UP RETRY COUNT"
- },
- {
- 0x5D, 0x1C,
- SenseDevTypes062,
- "HARDWARE IMPENDING FAILURE DRIVE CALIBRATION RETRY COUNT"
- },
- {
- 0x5D, 0x20,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE GENERAL HARD DRIVE FAILURE"
- },
- {
- 0x5D, 0x21,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE DRIVE ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x22,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE DATA ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x23,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE SEEK ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x24,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE TOO MANY BLOCK REASSIGNS"
- },
- {
- 0x5D, 0x25,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE ACCESS TIMES TOO HIGH"
- },
- {
- 0x5D, 0x26,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE START UNIT TIMES TOO HIGH"
- },
- {
- 0x5D, 0x27,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE CHANNEL PARAMETRICS"
- },
- {
- 0x5D, 0x28,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE CONTROLLER DETECTED"
- },
- {
- 0x5D, 0x29,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE THROUGHPUT PERFORMANCE"
- },
- {
- 0x5D, 0x2A,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE SEEK TIME PERFORMANCE"
- },
- {
- 0x5D, 0x2B,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE SPIN-UP RETRY COUNT"
- },
- {
- 0x5D, 0x2C,
- SenseDevTypes062,
- "CONTROLLER IMPENDING FAILURE DRIVE CALIBRATION RETRY COUNT"
- },
- {
- 0x5D, 0x30,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE GENERAL HARD DRIVE FAILURE"
- },
- {
- 0x5D, 0x31,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE DRIVE ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x32,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE DATA ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x33,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE SEEK ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x34,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE TOO MANY BLOCK REASSIGNS"
- },
- {
- 0x5D, 0x35,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE ACCESS TIMES TOO HIGH"
- },
- {
- 0x5D, 0x36,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE START UNIT TIMES TOO HIGH"
- },
- {
- 0x5D, 0x37,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE CHANNEL PARAMETRICS"
- },
- {
- 0x5D, 0x38,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE CONTROLLER DETECTED"
- },
- {
- 0x5D, 0x39,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE THROUGHPUT PERFORMANCE"
- },
- {
- 0x5D, 0x3A,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE SEEK TIME PERFORMANCE"
- },
- {
- 0x5D, 0x3B,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE SPIN-UP RETRY COUNT"
- },
- {
- 0x5D, 0x3C,
- SenseDevTypes062,
- "DATA CHANNEL IMPENDING FAILURE DRIVE CALIBRATION RETRY COUNT"
- },
- {
- 0x5D, 0x40,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE GENERAL HARD DRIVE FAILURE"
- },
- {
- 0x5D, 0x41,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE DRIVE ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x42,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE DATA ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x43,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE SEEK ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x44,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE TOO MANY BLOCK REASSIGNS"
- },
- {
- 0x5D, 0x45,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE ACCESS TIMES TOO HIGH"
- },
- {
- 0x5D, 0x46,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE START UNIT TIMES TOO HIGH"
- },
- {
- 0x5D, 0x47,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE CHANNEL PARAMETRICS"
- },
- {
- 0x5D, 0x48,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE CONTROLLER DETECTED"
- },
- {
- 0x5D, 0x49,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE THROUGHPUT PERFORMANCE"
- },
- {
- 0x5D, 0x4A,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE SEEK TIME PERFORMANCE"
- },
- {
- 0x5D, 0x4B,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE SPIN-UP RETRY COUNT"
- },
- {
- 0x5D, 0x4C,
- SenseDevTypes062,
- "SERVO IMPENDING FAILURE DRIVE CALIBRATION RETRY COUNT"
- },
- {
- 0x5D, 0x50,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE GENERAL HARD DRIVE FAILURE"
- },
- {
- 0x5D, 0x51,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE DRIVE ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x52,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE DATA ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x53,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE SEEK ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x54,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE TOO MANY BLOCK REASSIGNS"
- },
- {
- 0x5D, 0x55,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE ACCESS TIMES TOO HIGH"
- },
- {
- 0x5D, 0x56,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE START UNIT TIMES TOO HIGH"
- },
- {
- 0x5D, 0x57,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE CHANNEL PARAMETRICS"
- },
- {
- 0x5D, 0x58,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE CONTROLLER DETECTED"
- },
- {
- 0x5D, 0x59,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE THROUGHPUT PERFORMANCE"
- },
- {
- 0x5D, 0x5A,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE SEEK TIME PERFORMANCE"
- },
- {
- 0x5D, 0x5B,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE SPIN-UP RETRY COUNT"
- },
- {
- 0x5D, 0x5C,
- SenseDevTypes062,
- "SPINDLE IMPENDING FAILURE DRIVE CALIBRATION RETRY COUNT"
- },
- {
- 0x5D, 0x60,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE GENERAL HARD DRIVE FAILURE"
- },
- {
- 0x5D, 0x61,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE DRIVE ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x62,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE DATA ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x63,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE SEEK ERROR RATE TOO HIGH"
- },
- {
- 0x5D, 0x64,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE TOO MANY BLOCK REASSIGNS"
- },
- {
- 0x5D, 0x65,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE ACCESS TIMES TOO HIGH"
- },
- {
- 0x5D, 0x66,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE START UNIT TIMES TOO HIGH"
- },
- {
- 0x5D, 0x67,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE CHANNEL PARAMETRICS"
- },
- {
- 0x5D, 0x68,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE CONTROLLER DETECTED"
- },
- {
- 0x5D, 0x69,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE THROUGHPUT PERFORMANCE"
- },
- {
- 0x5D, 0x6A,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE SEEK TIME PERFORMANCE"
- },
- {
- 0x5D, 0x6B,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE SPIN-UP RETRY COUNT"
- },
- {
- 0x5D, 0x6C,
- SenseDevTypes062,
- "FIRMWARE IMPENDING FAILURE DRIVE CALIBRATION RETRY COUNT"
- },
- {
- 0x5D, 0xFF,
- SenseDevTypes001,
- "FAILURE PREDICTION THRESHOLD EXCEEDED (FALSE)"
- },
- {
- 0x5E, 0x00,
- SenseDevTypes044,
- "LOW POWER CONDITION ON"
- },
- {
- 0x5E, 0x01,
- SenseDevTypes044,
- "IDLE CONDITION ACTIVATED BY TIMER"
- },
- {
- 0x5E, 0x02,
- SenseDevTypes044,
- "STANDBY CONDITION ACTIVATED BY TIMER"
- },
- {
- 0x5E, 0x03,
- SenseDevTypes044,
- "IDLE CONDITION ACTIVATED BY COMMAND"
- },
- {
- 0x5E, 0x04,
- SenseDevTypes044,
- "STANDBY CONDITION ACTIVATED BY COMMAND"
- },
- {
- 0x5E, 0x41,
- SenseDevTypes043,
- "POWER STATE CHANGE TO ACTIVE"
- },
- {
- 0x5E, 0x42,
- SenseDevTypes043,
- "POWER STATE CHANGE TO IDLE"
- },
- {
- 0x5E, 0x43,
- SenseDevTypes043,
- "POWER STATE CHANGE TO STANDBY"
- },
- {
- 0x5E, 0x45,
- SenseDevTypes043,
- "POWER STATE CHANGE TO SLEEP"
- },
- {
- 0x5E, 0x47,
- SenseDevTypes063,
- "POWER STATE CHANGE TO DEVICE CONTROL"
- },
- {
- 0x60, 0x00,
- SenseDevTypes042,
- "LAMP FAILURE"
- },
- {
- 0x61, 0x00,
- SenseDevTypes042,
- "VIDEO ACQUISITION ERROR"
- },
- {
- 0x61, 0x01,
- SenseDevTypes042,
- "UNABLE TO ACQUIRE VIDEO"
- },
- {
- 0x61, 0x02,
- SenseDevTypes042,
- "OUT OF FOCUS"
- },
- {
- 0x62, 0x00,
- SenseDevTypes042,
- "SCAN HEAD POSITIONING ERROR"
- },
- {
- 0x63, 0x00,
- SenseDevTypes005,
- "END OF USER AREA ENCOUNTERED ON THIS TRACK"
- },
- {
- 0x63, 0x01,
- SenseDevTypes005,
- "PACKET DOES NOT FIT IN AVAILABLE SPACE"
- },
- {
- 0x64, 0x00,
- SenseDevTypes005,
- "ILLEGAL MODE FOR THIS TRACK"
- },
- {
- 0x64, 0x01,
- SenseDevTypes005,
- "INVALID PACKET SIZE"
- },
- {
- 0x65, 0x00,
- SenseDevTypes001,
- "VOLTAGE FAULT"
- },
- {
- 0x66, 0x00,
- SenseDevTypes042,
- "AUTOMATIC DOCUMENT FEEDER COVER UP"
- },
- {
- 0x66, 0x01,
- SenseDevTypes042,
- "AUTOMATIC DOCUMENT FEEDER LIFT UP"
- },
- {
- 0x66, 0x02,
- SenseDevTypes042,
- "DOCUMENT JAM IN AUTOMATIC DOCUMENT FEEDER"
- },
- {
- 0x66, 0x03,
- SenseDevTypes042,
- "DOCUMENT MISS FEED AUTOMATIC IN DOCUMENT FEEDER"
- },
- {
- 0x67, 0x00,
- SenseDevTypes064,
- "CONFIGURATION FAILURE"
- },
- {
- 0x67, 0x01,
- SenseDevTypes064,
- "CONFIGURATION OF INCAPABLE LOGICAL UNITS FAILED"
- },
- {
- 0x67, 0x02,
- SenseDevTypes064,
- "ADD LOGICAL UNIT FAILED"
- },
- {
- 0x67, 0x03,
- SenseDevTypes064,
- "MODIFICATION OF LOGICAL UNIT FAILED"
- },
- {
- 0x67, 0x04,
- SenseDevTypes064,
- "EXCHANGE OF LOGICAL UNIT FAILED"
- },
- {
- 0x67, 0x05,
- SenseDevTypes064,
- "REMOVE OF LOGICAL UNIT FAILED"
- },
- {
- 0x67, 0x06,
- SenseDevTypes064,
- "ATTACHMENT OF LOGICAL UNIT FAILED"
- },
- {
- 0x67, 0x07,
- SenseDevTypes064,
- "CREATION OF LOGICAL UNIT FAILED"
- },
- {
- 0x67, 0x08,
- SenseDevTypes064,
- "ASSIGN FAILURE OCCURRED"
- },
- {
- 0x67, 0x09,
- SenseDevTypes064,
- "MULTIPLY ASSIGNED LOGICAL UNIT"
- },
- {
- 0x68, 0x00,
- SenseDevTypes064,
- "LOGICAL UNIT NOT CONFIGURED"
- },
- {
- 0x69, 0x00,
- SenseDevTypes064,
- "DATA LOSS ON LOGICAL UNIT"
- },
- {
- 0x69, 0x01,
- SenseDevTypes064,
- "MULTIPLE LOGICAL UNIT FAILURES"
- },
- {
- 0x69, 0x02,
- SenseDevTypes064,
- "PARITY/DATA MISMATCH"
- },
- {
- 0x6A, 0x00,
- SenseDevTypes064,
- "INFORMATIONAL, REFER TO LOG"
- },
- {
- 0x6B, 0x00,
- SenseDevTypes064,
- "STATE CHANGE HAS OCCURRED"
- },
- {
- 0x6B, 0x01,
- SenseDevTypes064,
- "REDUNDANCY LEVEL GOT BETTER"
- },
- {
- 0x6B, 0x02,
- SenseDevTypes064,
- "REDUNDANCY LEVEL GOT WORSE"
- },
- {
- 0x6C, 0x00,
- SenseDevTypes064,
- "REBUILD FAILURE OCCURRED"
- },
- {
- 0x6D, 0x00,
- SenseDevTypes064,
- "RECALCULATE FAILURE OCCURRED"
- },
- {
- 0x6E, 0x00,
- SenseDevTypes064,
- "COMMAND TO LOGICAL UNIT FAILED"
- },
- {
- 0x6F, 0x00,
- SenseDevTypes005,
- "COPY PROTECTION KEY EXCHANGE FAILURE - AUTHENTICATION FAILURE"
- },
- {
- 0x6F, 0x01,
- SenseDevTypes005,
- "COPY PROTECTION KEY EXCHANGE FAILURE - KEY NOT PRESENT"
- },
- {
- 0x6F, 0x02,
- SenseDevTypes005,
- "COPY PROTECTION KEY EXCHANGE FAILURE - KEY NOT ESTABLISHED"
- },
- {
- 0x6F, 0x03,
- SenseDevTypes005,
- "READ OF SCRAMBLED SECTOR WITHOUT AUTHENTICATION"
- },
- {
- 0x6F, 0x04,
- SenseDevTypes005,
- "MEDIA REGION CODE IS MISMATCHED TO LOGICAL UNIT REGION"
- },
- {
- 0x6F, 0x05,
- SenseDevTypes005,
- "DRIVE REGION MUST BE PERMANENT/REGION RESET COUNT ERROR"
- },
- {
- 0x70, 0xFF,
- SenseDevTypes002,
- "DECOMPRESSION EXCEPTION SHORT ALGORITHM ID OF NN"
- },
- {
- 0x71, 0x00,
- SenseDevTypes002,
- "DECOMPRESSION EXCEPTION LONG ALGORITHM ID"
- },
- {
- 0x72, 0x00,
- SenseDevTypes005,
- "SESSION FIXATION ERROR"
- },
- {
- 0x72, 0x01,
- SenseDevTypes005,
- "SESSION FIXATION ERROR WRITING LEAD-IN"
- },
- {
- 0x72, 0x02,
- SenseDevTypes005,
- "SESSION FIXATION ERROR WRITING LEAD-OUT"
- },
- {
- 0x72, 0x03,
- SenseDevTypes005,
- "SESSION FIXATION ERROR - INCOMPLETE TRACK IN SESSION"
- },
- {
- 0x72, 0x04,
- SenseDevTypes005,
- "EMPTY OR PARTIALLY WRITTEN RESERVED TRACK"
- },
- {
- 0x72, 0x05,
- SenseDevTypes005,
- "NO MORE TRACK RESERVATIONS ALLOWED"
- },
- {
- 0x73, 0x00,
- SenseDevTypes005,
- "CD CONTROL ERROR"
- },
- {
- 0x73, 0x01,
- SenseDevTypes005,
- "POWER CALIBRATION AREA ALMOST FULL"
- },
- {
- 0x73, 0x02,
- SenseDevTypes005,
- "POWER CALIBRATION AREA IS FULL"
- },
- {
- 0x73, 0x03,
- SenseDevTypes005,
- "POWER CALIBRATION AREA ERROR"
- },
- {
- 0x73, 0x04,
- SenseDevTypes005,
- "PROGRAM MEMORY AREA UPDATE FAILURE"
- },
- {
- 0x73, 0x05,
- SenseDevTypes005,
- "PROGRAM MEMORY AREA IS FULL"
- },
- {
- 0x73, 0x06,
- SenseDevTypes005,
- "RMA/PMA IS FULL"
- },
-};
-
-static int ASCQ_TableSize = 463;
-
-
-#endif
+++ /dev/null
-#!/bin/sh
-#
-# ascq_tbl.sh - Translate SCSI t10.org's "asc-num.txt" file of
-# SCSI Additional Sense Code & Qualifiers (ASC/ASCQ's)
-# into something useful in C, creating "ascq_tbl.c" file.
-#
-#*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*#
-
-PREF_INFILE="t10.org/asc-num.txt" # From SCSI t10.org
-PREF_OUTFILE="ascq_tbl.c"
-
-#*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*#
-
-xlate_ascq() {
- cat | awk '
- BEGIN {
- DQ = "\042";
- OUTFILE = "'"${PREF_OUTFILE}"'";
- TRUE = 1;
- FALSE = 0;
- #debug = TRUE;
-
- # read and discard all lines up to and including the one that begins
- # with the "magic token" of "------- -------------- ---"...
- headers_gone = FALSE;
- while (!headers_gone) {
- if (getline <= 0)
- exit 1;
- header_line[++hdrs] = $0;
- if (debug)
- printf("header_line[%d] = :%s:\n", ++hdrs, $0);
- if ($0 ~ /^------- -------------- ---/) {
- headers_gone = TRUE;
- }
- }
- outcount = 0;
- }
-
- (NF > 1) {
- ++outcount;
- if (debug)
- printf( "DBG: %s\n", $0 );
- ASC[outcount] = substr($0,1,2);
- ASCQ[outcount] = substr($0,5,2);
- devtypes = substr($0,10,14);
- gsub(/ /, ".", devtypes);
- DESCRIP[outcount] = substr($0,26);
-
- if (!(devtypes in DevTypesVoodoo)) {
- DevTypesVoodoo[devtypes] = ++voodoo;
- DevTypesIdx[voodoo] = devtypes;
- }
- DEVTYPES[outcount] = DevTypesVoodoo[devtypes];
-
- # Handle 0xNN exception stuff...
- if (ASCQ[outcount] == "NN" || ASCQ[outcount] == "nn")
- ASCQ[outcount] = "FF";
- }
-
- END {
- printf("#ifndef SCSI_ASCQ_TBL_C_INCLUDED\n") > OUTFILE;
- printf("#define SCSI_ASCQ_TBL_C_INCLUDED\n") >> OUTFILE;
-
- printf("\n/* AuToMaGiCaLlY generated from: %s'"${FIN}"'%s\n", DQ, DQ) >> OUTFILE;
- printf(" *******************************************************************************\n") >> OUTFILE;
- for (i=1; i<=hdrs; i++) {
- printf(" * %s\n", header_line[i]) >> OUTFILE;
- }
- printf(" */\n") >> OUTFILE;
-
- printf("\n") >> OUTFILE;
- for (i=1; i<=voodoo; i++) {
- printf("static char SenseDevTypes%03d[] = %s%s%s;\n", i, DQ, DevTypesIdx[i], DQ) >> OUTFILE;
- }
-
- printf("\nstatic ASCQ_Table_t ASCQ_Table[] = {\n") >> OUTFILE;
- for (i=1; i<=outcount; i++) {
- printf(" {\n") >> OUTFILE;
- printf(" 0x%s, 0x%s,\n", ASC[i], ASCQ[i]) >> OUTFILE;
- printf(" SenseDevTypes%03d,\n", DEVTYPES[i]) >> OUTFILE;
- printf(" %s%s%s\n", DQ, DESCRIP[i], DQ) >> OUTFILE;
- printf(" },\n") >> OUTFILE;
- }
- printf( "};\n\n" ) >> OUTFILE;
-
- printf( "static int ASCQ_TableSize = %d;\n\n", outcount ) >> OUTFILE;
- printf( "Total of %d ASC/ASCQ records generated\n", outcount );
- printf("\n#endif\n") >> OUTFILE;
- close(OUTFILE);
- }'
- return
-}
-
-#*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*#
-
-# main()
-if [ $# -lt 1 ]; then
- echo "INFO: No input filename supplied - using: $PREF_INFILE" >&2
- FIN=$PREF_INFILE
-else
- FIN="$1"
- if [ "$FIN" != "$PREF_INFILE" ]; then
- echo "INFO: Ok, I'll try chewing on '$FIN' for SCSI ASC/ASCQ combos..." >&2
- fi
- shift
-fi
-
-cat $FIN | xlate_ascq
-exit 0
+++ /dev/null
-/*
- * linux/drivers/message/fusion/isense.c
- * Little linux driver / shim that interfaces with the Fusion MPT
- * Linux base driver to provide english readable strings in SCSI
- * Error Report logging output. This module implements SCSI-3
- * Opcode lookup and a sorted table of SCSI-3 ASC/ASCQ strings.
- *
- * Copyright (c) 1991-2004 Steven J. Ralston
- * Written By: Steven J. Ralston
- * (yes I wrote some of the orig. code back in 1991!)
- * (mailto:sjralston1@netscape.net)
- * (mailto:mpt_linux_developer@lsil.com)
- *
- * $Id: isense.c,v 1.33 2002/02/27 18:44:19 sralston Exp $
- */
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-/*
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; version 2 of the License.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- NO WARRANTY
- THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
- CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
- LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
- MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
- solely responsible for determining the appropriateness of using and
- distributing the Program and assumes all risks associated with its
- exercise of rights under this Agreement, including but not limited to
- the risks and costs of program errors, damage to or loss of data,
- programs or equipment, and unavailability or interruption of operations.
-
- DISCLAIMER OF LIABILITY
- NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
- HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-
-#include <linux/version.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <asm/io.h>
-
-#define MODULEAUTHOR "Steven J. Ralston"
-#define COPYRIGHT "Copyright (c) 2001-2004 " MODULEAUTHOR
-#include "mptbase.h"
-
-#include "isense.h"
-
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-/*
- * Private data...
- */
-
-/*
- * YIKES! I don't usually #include C source files, but..
- * The following #include's pulls in our needed ASCQ_Table[] array,
- * ASCQ_TableSz integer, and ScsiOpcodeString[] array!
- */
-#include "ascq_tbl.c"
-#include "scsiops.c"
-
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-#define my_NAME "SCSI-3 Opcodes & ASC/ASCQ Strings"
-#define my_VERSION MPT_LINUX_VERSION_COMMON
-#define MYNAM "isense"
-
-MODULE_AUTHOR(MODULEAUTHOR);
-MODULE_DESCRIPTION(my_NAME);
-MODULE_LICENSE("GPL");
-
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-int __init isense_init(void)
-{
- show_mptmod_ver(my_NAME, my_VERSION);
-
- /*
- * Install our handler
- */
- if (mpt_register_ascqops_strings(&ASCQ_Table[0], ASCQ_TableSize, ScsiOpcodeString) != 1)
- {
- printk(KERN_ERR MYNAM ": ERROR: Can't register with Fusion MPT base driver!\n");
- return -EBUSY;
- }
- printk(KERN_INFO MYNAM ": Registered SCSI-3 Opcodes & ASC/ASCQ Strings\n");
- return 0;
-}
-
-
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-static void isense_exit(void)
-{
-#ifdef MODULE
- mpt_deregister_ascqops_strings();
-#endif
- printk(KERN_INFO MYNAM ": Deregistered SCSI-3 Opcodes & ASC/ASCQ Strings\n");
-}
-
-module_init(isense_init);
-module_exit(isense_exit);
-
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-
+++ /dev/null
-#ifndef ISENSE_H_INCLUDED
-#define ISENSE_H_INCLUDED
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-
-#ifdef __KERNEL__
-#include <linux/types.h> /* needed for u8, etc. */
-#include <linux/string.h> /* needed for strcat */
-#include <linux/kernel.h> /* needed for sprintf */
-#else
- #ifndef U_STUFF_DEFINED
- #define U_STUFF_DEFINED
- typedef unsigned char u8;
- typedef unsigned short u16;
- typedef unsigned int u32;
- #endif
-#endif
-
-#include "scsi3.h" /* needed for all things SCSI */
-
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-/*
- * Defines and typedefs...
- */
-
-#ifdef __KERNEL__
-#define PrintF(x) printk x
-#else
-#define PrintF(x) printf x
-#endif
-
-#ifndef TRUE
-#define TRUE 1
-#define FALSE 0
-#endif
-
-#define RETRY_STATUS ((int) 1)
-#define PUT_STATUS ((int) 0)
-
-/*
- * A generic structure to hold info about IO request that caused
- * a Request Sense to be performed, and the resulting Sense Data.
- */
-typedef struct IO_Info
-{
- char *DevIDStr; /* String of chars which identifies the device. */
- u8 *cdbPtr; /* Pointer (Virtual/Logical addr) to CDB bytes of
- IO request that caused ContAllegianceCond. */
- u8 *sensePtr; /* Pointer (Virtual/Logical addr) to Sense Data
- returned by Request Sense operation. */
- u8 *dataPtr; /* Pointer (Virtual/Logical addr) to Data buffer
- of IO request caused ContAllegianceCondition. */
- u8 *inqPtr; /* Pointer (Virtual/Logical addr) to Inquiry Data for
- IO *Device* that caused ContAllegianceCondition. */
- u8 SCSIStatus; /* SCSI status byte of IO request that caused
- Contingent Allegiance Condition. */
- u8 DoDisplay; /* Shall we display any messages? */
- u16 rsvd_align1;
- u32 ComplCode; /* Four-byte OS-dependent completion code. */
- u32 NotifyL; /* Four-byte OS-dependent notification field. */
-} IO_Info_t;
-
-/*
- * SCSI Additional Sense Code and Additional Sense Code Qualifier table.
- */
-typedef struct ASCQ_Table
-{
- u8 ASC;
- u8 ASCQ;
- char *DevTypes;
- char *Description;
-} ASCQ_Table_t;
-
-#if 0
-/*
- * SCSI Opcodes table.
- */
-typedef struct SCSI_OPS_Table
-{
- u8 OpCode;
- char *DevTypes;
- char *ScsiCmndStr;
-} SCSI_OPS_Table_t;
-#endif
-
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-/*
- * Public entry point prototypes
- */
-
-/* in scsiherr.c, needed by mptscsih.c */
-extern int mpt_ScsiHost_ErrorReport(IO_Info_t *ioop);
-
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-#endif
-
+++ /dev/null
-/*
- * linux/drivers/message/fusion/scsi3.h
- * SCSI-3 definitions and macros.
- * (Ultimately) SCSI-3 definitions; for now, inheriting
- * SCSI-2 definitions.
- *
- * Copyright (c) 1996-2004 Steven J. Ralston
- * Written By: Steven J. Ralston (19960517)
- * (mailto:sjralston1@netscape.net)
- * (mailto:mpt_linux_developer@lsil.com)
- *
- * $Id: scsi3.h,v 1.9 2002/02/27 18:45:02 sralston Exp $
- */
-
-#ifndef SCSI3_H_INCLUDED
-#define SCSI3_H_INCLUDED
-/***************************************************************************/
-
-/****************************************************************************
- *
- * Includes
- */
-#ifdef __KERNEL__
-#include <linux/types.h>
-#else
- #ifndef U_STUFF_DEFINED
- #define U_STUFF_DEFINED
- typedef unsigned char u8;
- typedef unsigned short u16;
- typedef unsigned int u32;
- #endif
-#endif
-
-/****************************************************************************
- *
- * Defines
- */
-
-/*
- * SCSI Commands
- */
-#define CMD_TestUnitReady 0x00
-#define CMD_RezeroUnit 0x01 /* direct-access devices */
-#define CMD_Rewind 0x01 /* sequential-access devices */
-#define CMD_RequestSense 0x03
-#define CMD_FormatUnit 0x04
-#define CMD_ReassignBlock 0x07
-#define CMD_Read6 0x08
-#define CMD_Write6 0x0A
-#define CMD_WriteFilemark 0x10
-#define CMD_Space 0x11
-#define CMD_Inquiry 0x12
-#define CMD_ModeSelect6 0x15
-#define CMD_ModeSense6 0x1A
-#define CMD_Reserve6 0x16
-#define CMD_Release6 0x17
-#define CMD_Erase 0x19
-#define CMD_StartStopUnit 0x1b /* direct-access devices */
-#define CMD_LoadUnload 0x1b /* sequential-access devices */
-#define CMD_ReceiveDiagnostic 0x1C
-#define CMD_SendDiagnostic 0x1D
-#define CMD_ReadCapacity 0x25
-#define CMD_Read10 0x28
-#define CMD_Write10 0x2A
-#define CMD_WriteVerify 0x2E
-#define CMD_Verify 0x2F
-#define CMD_SynchronizeCache 0x35
-#define CMD_ReadDefectData 0x37
-#define CMD_WriteBuffer 0x3B
-#define CMD_ReadBuffer 0x3C
-#define CMD_ReadLong 0x3E
-#define CMD_LogSelect 0x4C
-#define CMD_LogSense 0x4D
-#define CMD_ModeSelect10 0x55
-#define CMD_Reserve10 0x56
-#define CMD_Release10 0x57
-#define CMD_ModeSense10 0x5A
-#define CMD_PersistReserveIn 0x5E
-#define CMD_PersistReserveOut 0x5F
-#define CMD_ReportLuns 0xA0
-
-/*
- * Control byte field
- */
-#define CONTROL_BYTE_NACA_BIT 0x04
-#define CONTROL_BYTE_Flag_BIT 0x02
-#define CONTROL_BYTE_Link_BIT 0x01
-
-/*
- * SCSI Messages
- */
-#define MSG_COMPLETE 0x00
-#define MSG_EXTENDED 0x01
-#define MSG_SAVE_POINTERS 0x02
-#define MSG_RESTORE_POINTERS 0x03
-#define MSG_DISCONNECT 0x04
-#define MSG_IDERROR 0x05
-#define MSG_ABORT 0x06
-#define MSG_REJECT 0x07
-#define MSG_NOP 0x08
-#define MSG_PARITY_ERROR 0x09
-#define MSG_LINKED_CMD_COMPLETE 0x0a
-#define MSG_LCMD_COMPLETE_W_FLG 0x0b
-#define MSG_BUS_DEVICE_RESET 0x0c
-#define MSG_ABORT_TAG 0x0d
-#define MSG_CLEAR_QUEUE 0x0e
-#define MSG_INITIATE_RECOVERY 0x0f
-
-#define MSG_RELEASE_RECOVRY 0x10
-#define MSG_TERMINATE_IO 0x11
-
-#define MSG_SIMPLE_QUEUE 0x20
-#define MSG_HEAD_OF_QUEUE 0x21
-#define MSG_ORDERED_QUEUE 0x22
-#define MSG_IGNORE_WIDE_RESIDUE 0x23
-
-#define MSG_IDENTIFY 0x80
-#define MSG_IDENTIFY_W_DISC 0xc0
-
-/*
- * SCSI Phases
- */
-#define PHS_DATA_OUT 0x00
-#define PHS_DATA_IN 0x01
-#define PHS_COMMAND 0x02
-#define PHS_STATUS 0x03
-#define PHS_MSG_OUT 0x06
-#define PHS_MSG_IN 0x07
-
-/*
- * Statuses
- */
-#define STS_GOOD 0x00
-#define STS_CHECK_CONDITION 0x02
-#define STS_CONDITION_MET 0x04
-#define STS_BUSY 0x08
-#define STS_INTERMEDIATE 0x10
-#define STS_INTERMEDIATE_CONDITION_MET 0x14
-#define STS_RESERVATION_CONFLICT 0x18
-#define STS_COMMAND_TERMINATED 0x22
-#define STS_TASK_SET_FULL 0x28
-#define STS_QUEUE_FULL 0x28
-#define STS_ACA_ACTIVE 0x30
-
-#define STS_VALID_MASK 0x3e
-
-#define SCSI_STATUS(x) ((x) & STS_VALID_MASK)
-
-/*
- * SCSI QTag Types
- */
-#define QTAG_SIMPLE 0x20
-#define QTAG_HEAD_OF_Q 0x21
-#define QTAG_ORDERED 0x22
-
-/*
- * SCSI Sense Key Definitons
- */
-#define SK_NO_SENSE 0x00
-#define SK_RECOVERED_ERROR 0x01
-#define SK_NOT_READY 0x02
-#define SK_MEDIUM_ERROR 0x03
-#define SK_HARDWARE_ERROR 0x04
-#define SK_ILLEGAL_REQUEST 0x05
-#define SK_UNIT_ATTENTION 0x06
-#define SK_DATA_PROTECT 0x07
-#define SK_BLANK_CHECK 0x08
-#define SK_VENDOR_SPECIFIC 0x09
-#define SK_COPY_ABORTED 0x0a
-#define SK_ABORTED_COMMAND 0x0b
-#define SK_EQUAL 0x0c
-#define SK_VOLUME_OVERFLOW 0x0d
-#define SK_MISCOMPARE 0x0e
-#define SK_RESERVED 0x0f
-
-
-
-#define SCSI_MAX_INQUIRY_BYTES 96
-#define SCSI_STD_INQUIRY_BYTES 36
-
-#undef USE_SCSI_COMPLETE_INQDATA
-/*
- * Structure definition for SCSI Inquiry Data
- *
- * NOTE: The following structure is 96 bytes in size
- * iff USE_SCSI_COMPLETE_INQDATA IS defined above (i.e. w/ "#define").
- * If USE_SCSI_COMPLETE_INQDATA is NOT defined above (i.e. w/ "#undef")
- * then the following structure is only 36 bytes in size.
- * THE CHOICE IS YOURS!
- */
-typedef struct SCSI_Inquiry_Data
-{
-#ifdef USE_SCSI_COMPLETE_INQDATA
- u8 InqByte[SCSI_MAX_INQUIRY_BYTES];
-#else
- u8 InqByte[SCSI_STD_INQUIRY_BYTES];
-#endif
-
-/*
- * the following structure works only for little-endian (Intel,
- * LSB first (1234) byte order) systems with 4-byte ints.
- *
- u32 Periph_Device_Type : 5,
- Periph_Qualifier : 3,
- Device_Type_Modifier : 7,
- Removable_Media : 1,
- ANSI_Version : 3,
- ECMA_Version : 3,
- ISO_Version : 2,
- Response_Data_Format : 4,
- reserved_0 : 3,
- AERC : 1 ;
- u32 Additional_Length : 8,
- reserved_1 :16,
- SftReset : 1,
- CmdQue : 1,
- reserved_2 : 1,
- Linked : 1,
- Sync : 1,
- WBus16 : 1,
- WBus32 : 1,
- RelAdr : 1 ;
- u8 Vendor_ID[8];
- u8 Product_ID[16];
- u8 Revision_Level [4];
-#ifdef USE_SCSI_COMPLETE_INQDATA
- u8 Vendor_Specific[20];
- u8 reserved_3[40];
-#endif
- *
- */
-
-} SCSI_Inquiry_Data_t;
-
-#define INQ_PERIPHINFO_BYTE 0
-#define INQ_Periph_Qualifier_MASK 0xe0
-#define INQ_Periph_Device_Type_MASK 0x1f
-
-#define INQ_Peripheral_Qualifier(inqp) \
- (int)((*((u8*)(inqp)+INQ_PERIPHINFO_BYTE) & INQ_Periph_Qualifier_MASK) >> 5)
-#define INQ_Peripheral_Device_Type(inqp) \
- (int)(*((u8*)(inqp)+INQ_PERIPHINFO_BYTE) & INQ_Periph_Device_Type_MASK)
-
-
-#define INQ_DEVTYPEMOD_BYTE 1
-#define INQ_RMB_BIT 0x80
-#define INQ_Device_Type_Modifier_MASK 0x7f
-
-#define INQ_Removable_Medium(inqp) \
- (int)(*((u8*)(inqp)+INQ_DEVTYPEMOD_BYTE) & INQ_RMB_BIT)
-#define INQ_Device_Type_Modifier(inqp) \
- (int)(*((u8*)(inqp)+INQ_DEVTYPEMOD_BYTE) & INQ_Device_Type_Modifier_MASK)
-
-
-#define INQ_VERSIONINFO_BYTE 2
-#define INQ_ISO_Version_MASK 0xc0
-#define INQ_ECMA_Version_MASK 0x38
-#define INQ_ANSI_Version_MASK 0x07
-
-#define INQ_ISO_Version(inqp) \
- (int)(*((u8*)(inqp)+INQ_VERSIONINFO_BYTE) & INQ_ISO_Version_MASK)
-#define INQ_ECMA_Version(inqp) \
- (int)(*((u8*)(inqp)+INQ_VERSIONINFO_BYTE) & INQ_ECMA_Version_MASK)
-#define INQ_ANSI_Version(inqp) \
- (int)(*((u8*)(inqp)+INQ_VERSIONINFO_BYTE) & INQ_ANSI_Version_MASK)
-
-
-#define INQ_BYTE3 3
-#define INQ_AERC_BIT 0x80
-#define INQ_TrmTsk_BIT 0x40
-#define INQ_NormACA_BIT 0x20
-#define INQ_RDF_MASK 0x0F
-
-#define INQ_AER_Capable(inqp) \
- (int)(*((u8*)(inqp)+INQ_BYTE3) & INQ_AERC_BIT)
-#define INQ_TrmTsk(inqp) \
- (int)(*((u8*)(inqp)+INQ_BYTE3) & INQ_TrmTsk_BIT)
-#define INQ_NormACA(inqp) \
- (int)(*((u8*)(inqp)+INQ_BYTE3) & INQ_NormACA_BIT)
-#define INQ_Response_Data_Format(inqp) \
- (int)(*((u8*)(inqp)+INQ_BYTE3) & INQ_RDF_MASK)
-
-
-#define INQ_CAPABILITY_BYTE 7
-#define INQ_RelAdr_BIT 0x80
-#define INQ_WBus32_BIT 0x40
-#define INQ_WBus16_BIT 0x20
-#define INQ_Sync_BIT 0x10
-#define INQ_Linked_BIT 0x08
- /* INQ_Reserved BIT 0x40 */
-#define INQ_CmdQue_BIT 0x02
-#define INQ_SftRe_BIT 0x01
-
-#define IS_RelAdr_DEV(inqp) \
- (int)(*((u8*)(inqp)+INQ_CAPABILITY_BYTE) & INQ_RelAdr_BIT)
-#define IS_WBus32_DEV(inqp) \
- (int)(*((u8*)(inqp)+INQ_CAPABILITY_BYTE) & INQ_WBus32_BIT)
-#define IS_WBus16_DEV(inqp) \
- (int)(*((u8*)(inqp)+INQ_CAPABILITY_BYTE) & INQ_WBus16_BIT)
-#define IS_Sync_DEV(inqp) \
- (int)(*((u8*)(inqp)+INQ_CAPABILITY_BYTE) & INQ_Sync_BIT)
-#define IS_Linked_DEV(inqp) \
- (int)(*((u8*)(inqp)+INQ_CAPABILITY_BYTE) & INQ_Linked_BIT)
-#define IS_CmdQue_DEV(inqp) \
- (int)(*((u8*)(inqp)+INQ_CAPABILITY_BYTE) & INQ_CmdQue_BIT)
-#define IS_SftRe_DEV(inqp) \
- (int)(*((u8*)(inqp)+INQ_CAPABILITY_BYTE) & INQ_SftRe_BIT)
-
-#define INQ_Width_BITS \
- (INQ_WBus32_BIT | INQ_WBus16_BIT)
-#define IS_Wide_DEV(inqp) \
- (int)(*((u8*)(inqp)+INQ_CAPABILITY_BYTE) & INQ_Width_BITS)
-
-
-/*
- * SCSI peripheral device types
- */
-#define SCSI_TYPE_DAD 0x00 /* Direct Access Device */
-#define SCSI_TYPE_SAD 0x01 /* Sequential Access Device */
-#define SCSI_TYPE_TAPE SCSI_TYPE_SAD
-#define SCSI_TYPE_PRT 0x02 /* Printer */
-#define SCSI_TYPE_PROC 0x03 /* Processor */
-#define SCSI_TYPE_WORM 0x04
-#define SCSI_TYPE_CDROM 0x05
-#define SCSI_TYPE_SCAN 0x06 /* Scanner */
-#define SCSI_TYPE_OPTICAL 0x07 /* Magneto/Optical */
-#define SCSI_TYPE_CHANGER 0x08
-#define SCSI_TYPE_COMM 0x09 /* Communications device */
-#define SCSI_TYPE_UNKNOWN 0x1f
-#define SCSI_TYPE_UNCONFIGURED_LUN 0x7f
-
-#define SCSI_TYPE_MAX_KNOWN SCSI_TYPE_COMM
-
-/*
- * Peripheral Qualifiers
- */
-#define DEVICE_PRESENT 0x00
-#define LUN_NOT_PRESENT 0x01
-#define LUN_NOT_SUPPORTED 0x03
-
-/*
- * ANSI Versions
- */
-#ifndef SCSI_1
-#define SCSI_1 0x01
-#endif
-#ifndef SCSI_2
-#define SCSI_2 0x02
-#endif
-#ifndef SCSI_3
-#define SCSI_3 0x03
-#endif
-
-
-#define SCSI_MAX_SENSE_BYTES 255
-#define SCSI_STD_SENSE_BYTES 18
-#define SCSI_PAD_SENSE_BYTES (SCSI_MAX_SENSE_BYTES - SCSI_STD_SENSE_BYTES)
-
-#undef USE_SCSI_COMPLETE_SENSE
-/*
- * Structure definition for SCSI Sense Data
- *
- * NOTE: The following structure is 255 bytes in size
- * iiff USE_SCSI_COMPLETE_SENSE IS defined above (i.e. w/ "#define").
- * If USE_SCSI_COMPLETE_SENSE is NOT defined above (i.e. w/ "#undef")
- * then the following structure is only 19 bytes in size.
- * THE CHOICE IS YOURS!
- *
- */
-typedef struct SCSI_Sense_Data
-{
-#ifdef USE_SCSI_COMPLETE_SENSE
- u8 SenseByte[SCSI_MAX_SENSE_BYTES];
-#else
- u8 SenseByte[SCSI_STD_SENSE_BYTES];
-#endif
-
-/*
- * the following structure works only for little-endian (Intel,
- * LSB first (1234) byte order) systems with 4-byte ints.
- *
- u8 Error_Code :4, // 0x00
- Error_Class :3,
- Valid :1
- ;
- u8 Segment_Number // 0x01
- ;
- u8 Sense_Key :4, // 0x02
- Reserved :1,
- Incorrect_Length_Indicator:1,
- End_Of_Media :1,
- Filemark :1
- ;
- u8 Information_MSB; // 0x03
- u8 Information_Byte2; // 0x04
- u8 Information_Byte1; // 0x05
- u8 Information_LSB; // 0x06
- u8 Additional_Length; // 0x07
-
- u32 Command_Specific_Information; // 0x08 - 0x0b
-
- u8 Additional_Sense_Code; // 0x0c
- u8 Additional_Sense_Code_Qualifier; // 0x0d
- u8 Field_Replaceable_Unit_Code; // 0x0e
- u8 Illegal_Req_Bit_Pointer :3, // 0x0f
- Illegal_Req_Bit_Valid :1,
- Illegal_Req_Reserved :2,
- Illegal_Req_Cmd_Data :1,
- Sense_Key_Specific_Valid :1
- ;
- u16 Sense_Key_Specific_Data; // 0x10 - 0x11
-
-#ifdef USE_SCSI_COMPLETE_SENSE
- u8 Additional_Sense_Data[SCSI_PAD_SENSE_BYTES];
-#else
- u8 Additional_Sense_Data[1];
-#endif
- *
- */
-
-} SCSI_Sense_Data_t;
-
-
-#define SD_ERRCODE_BYTE 0
-#define SD_Valid_BIT 0x80
-#define SD_Error_Code_MASK 0x7f
-#define SD_Valid(sdp) \
- (int)(*((u8*)(sdp)+SD_ERRCODE_BYTE) & SD_Valid_BIT)
-#define SD_Error_Code(sdp) \
- (int)(*((u8*)(sdp)+SD_ERRCODE_BYTE) & SD_Error_Code_MASK)
-
-
-#define SD_SEGNUM_BYTE 1
-#define SD_Segment_Number(sdp) (int)(*((u8*)(sdp)+SD_SEGNUM_BYTE))
-
-
-#define SD_SENSEKEY_BYTE 2
-#define SD_Filemark_BIT 0x80
-#define SD_EOM_BIT 0x40
-#define SD_ILI_BIT 0x20
-#define SD_Sense_Key_MASK 0x0f
-#define SD_Filemark(sdp) \
- (int)(*((u8*)(sdp)+SD_SENSEKEY_BYTE) & SD_Filemark_BIT)
-#define SD_EOM(sdp) \
- (int)(*((u8*)(sdp)+SD_SENSEKEY_BYTE) & SD_EOM_BIT)
-#define SD_ILI(sdp) \
- (int)(*((u8*)(sdp)+SD_SENSEKEY_BYTE) & SD_ILI_BIT)
-#define SD_Sense_Key(sdp) \
- (int)(*((u8*)(sdp)+SD_SENSEKEY_BYTE) & SD_Sense_Key_MASK)
-
-
-#define SD_INFO3_BYTE 3
-#define SD_INFO2_BYTE 4
-#define SD_INFO1_BYTE 5
-#define SD_INFO0_BYTE 6
-#define SD_Information3(sdp) (int)(*((u8*)(sdp)+SD_INFO3_BYTE))
-#define SD_Information2(sdp) (int)(*((u8*)(sdp)+SD_INFO2_BYTE))
-#define SD_Information1(sdp) (int)(*((u8*)(sdp)+SD_INFO1_BYTE))
-#define SD_Information0(sdp) (int)(*((u8*)(sdp)+SD_INFO0_BYTE))
-
-
-#define SD_ADDL_LEN_BYTE 7
-#define SD_Additional_Sense_Length(sdp) \
- (int)(*((u8*)(sdp)+SD_ADDL_LEN_BYTE))
-#define SD_Addl_Sense_Len SD_Additional_Sense_Length
-
-
-#define SD_CMD_SPECIFIC3_BYTE 8
-#define SD_CMD_SPECIFIC2_BYTE 9
-#define SD_CMD_SPECIFIC1_BYTE 10
-#define SD_CMD_SPECIFIC0_BYTE 11
-#define SD_Cmd_Specific_Info3(sdp) (int)(*((u8*)(sdp)+SD_CMD_SPECIFIC3_BYTE))
-#define SD_Cmd_Specific_Info2(sdp) (int)(*((u8*)(sdp)+SD_CMD_SPECIFIC2_BYTE))
-#define SD_Cmd_Specific_Info1(sdp) (int)(*((u8*)(sdp)+SD_CMD_SPECIFIC1_BYTE))
-#define SD_Cmd_Specific_Info0(sdp) (int)(*((u8*)(sdp)+SD_CMD_SPECIFIC0_BYTE))
-
-
-#define SD_ADDL_SENSE_CODE_BYTE 12
-#define SD_Additional_Sense_Code(sdp) \
- (int)(*((u8*)(sdp)+SD_ADDL_SENSE_CODE_BYTE))
-#define SD_Addl_Sense_Code SD_Additional_Sense_Code
-#define SD_ASC SD_Additional_Sense_Code
-
-
-#define SD_ADDL_SENSE_CODE_QUAL_BYTE 13
-#define SD_Additional_Sense_Code_Qualifier(sdp) \
- (int)(*((u8*)(sdp)+SD_ADDL_SENSE_CODE_QUAL_BYTE))
-#define SD_Addl_Sense_Code_Qual SD_Additional_Sense_Code_Qualifier
-#define SD_ASCQ SD_Additional_Sense_Code_Qualifier
-
-
-#define SD_FIELD_REPL_UNIT_CODE_BYTE 14
-#define SD_Field_Replaceable_Unit_Code(sdp) \
- (int)(*((u8*)(sdp)+SD_FIELD_REPL_UNIT_CODE_BYTE))
-#define SD_Field_Repl_Unit_Code SD_Field_Replaceable_Unit_Code
-#define SD_FRUC SD_Field_Replaceable_Unit_Code
-#define SD_FRU SD_Field_Replaceable_Unit_Code
-
-
-/*
- * Sense-Key Specific offsets and macros.
- */
-#define SD_SKS2_BYTE 15
-#define SD_SKS_Valid_BIT 0x80
-#define SD_SKS_Cmd_Data_BIT 0x40
-#define SD_SKS_Bit_Ptr_Valid_BIT 0x08
-#define SD_SKS_Bit_Ptr_MASK 0x07
-#define SD_SKS1_BYTE 16
-#define SD_SKS0_BYTE 17
-#define SD_Sense_Key_Specific_Valid(sdp) \
- (int)(*((u8*)(sdp)+SD_SKS2_BYTE) & SD_SKS_Valid_BIT)
-#define SD_SKS_Valid SD_Sense_Key_Specific_Valid
-#define SD_SKS_CDB_Error(sdp) \
- (int)(*((u8*)(sdp)+SD_SKS2_BYTE) & SD_SKS_Cmd_Data_BIT)
-#define SD_Was_Illegal_Request SD_SKS_CDB_Error
-#define SD_SKS_Bit_Pointer_Valid(sdp) \
- (int)(*((u8*)(sdp)+SD_SKS2_BYTE) & SD_SKS_Bit_Ptr_Valid_BIT)
-#define SD_SKS_Bit_Pointer(sdp) \
- (int)(*((u8*)(sdp)+SD_SKS2_BYTE) & SD_SKS_Bit_Ptr_MASK)
-#define SD_Field_Pointer(sdp) \
- (int)( ((u16)(*((u8*)(sdp)+SD_SKS1_BYTE)) << 8) \
- + *((u8*)(sdp)+SD_SKS0_BYTE) )
-#define SD_Bad_Byte SD_Field_Pointer
-#define SD_Actual_Retry_Count SD_Field_Pointer
-#define SD_Progress_Indication SD_Field_Pointer
-
-/*
- * Mode Sense Write Protect Mask
- */
-#define WRITE_PROTECT_MASK 0X80
-
-/*
- * Medium Type Codes
- */
-#define OPTICAL_DEFAULT 0x00
-#define OPTICAL_READ_ONLY_MEDIUM 0x01
-#define OPTICAL_WRITE_ONCE_MEDIUM 0x02
-#define OPTICAL_READ_WRITABLE_MEDIUM 0x03
-#define OPTICAL_RO_OR_WO_MEDIUM 0x04
-#define OPTICAL_RO_OR_RW_MEDIUM 0x05
-#define OPTICAL_WO_OR_RW_MEDIUM 0x06
-
-
-
-/*
- * Structure definition for READ6, WRITE6 (6-byte CDB)
- */
-typedef struct SCSI_RW6_CDB
-{
- u32 OpCode :8,
- LBA_HI :5, /* 5 MSBit's of the LBA */
- Lun :3,
- LBA_MID :8, /* NOTE: total of 21 bits in LBA */
- LBA_LO :8 ; /* Max LBA = 0x001fffff */
- u8 BlockCount;
- u8 Control;
-} SCSI_RW6_t;
-
-#define MAX_RW6_LBA ((u32)0x001fffff)
-
-/*
- * Structure definition for READ10, WRITE10 (10-byte CDB)
- *
- * NOTE: ParityCheck bit is applicable only for VERIFY and WRITE VERIFY for
- * the ADP-92 DAC only. In the SCSI2 spec. this same bit is defined as a
- * FUA (forced unit access) bit for READs and WRITEs. Since this driver
- * does not use the FUA, this bit is defined as it is used by the ADP-92.
- * Also, for READ CAPACITY, only the OpCode field is used.
- */
-typedef struct SCSI_RW10_CDB
-{
- u8 OpCode;
- u8 Reserved1;
- u32 LBA;
- u8 Reserved2;
- u16 BlockCount;
- u8 Control;
-} SCSI_RW10_t;
-
-#define PARITY_CHECK 0x08 /* parity check bit - byte[1], bit 3 */
-
- /*
- * Structure definition for data returned by READ CAPACITY cmd;
- * READ CAPACITY data
- */
- typedef struct READ_CAP_DATA
- {
- u32 MaxLBA;
- u32 BlockBytes;
- } SCSI_READ_CAP_DATA_t, *pSCSI_READ_CAP_DATA_t;
-
-
-/*
- * Structure definition for FORMAT UNIT CDB (6-byte CDB)
- */
-typedef struct _SCSI_FORMAT_UNIT
-{
- u8 OpCode;
- u8 Reserved1;
- u8 VendorSpecific;
- u16 Interleave;
- u8 Control;
-} SCSI_FORMAT_UNIT_t;
-
-/*
- * Structure definition for REQUEST SENSE (6-byte CDB)
- */
-typedef struct _SCSI_REQUEST_SENSE
-{
- u8 OpCode;
- u8 Reserved1;
- u8 Reserved2;
- u8 Reserved3;
- u8 AllocLength;
- u8 Control;
-} SCSI_REQ_SENSE_t;
-
-/*
- * Structure definition for REPORT LUNS (12-byte CDB)
- */
-typedef struct _SCSI_REPORT_LUNS
-{
- u8 OpCode;
- u8 Reserved1[5];
- u32 AllocationLength;
- u8 Reserved2;
- u8 Control;
-} SCSI_REPORT_LUNS_t, *pSCSI_REPORT_LUNS_t;
-
- /*
- * (per-level) LUN information bytes
- */
-/*
- * Following doesn't work on ARMCC compiler
- * [apparently] because it pads every struct
- * to be multiple of 4 bytes!
- * So SCSI_LUN_LEVELS_t winds up being 16
- * bytes instead of 8!
- *
- typedef struct LUN_INFO
- {
- u8 AddrMethod_plus_LunOrBusNumber;
- u8 LunOrTarget;
- } SCSI_LUN_INFO_t, *pSCSI_LUN_INFO_t;
-
- typedef struct LUN_LEVELS
- {
- SCSI_LUN_INFO_t LUN_0;
- SCSI_LUN_INFO_t LUN_1;
- SCSI_LUN_INFO_t LUN_2;
- SCSI_LUN_INFO_t LUN_3;
- } SCSI_LUN_LEVELS_t, *pSCSI_LUN_LEVELS_t;
-*/
- /*
- * All 4 levels (8 bytes) of LUN information
- */
- typedef struct LUN_LEVELS
- {
- u8 LVL1_AddrMethod_plus_LunOrBusNumber;
- u8 LVL1_LunOrTarget;
- u8 LVL2_AddrMethod_plus_LunOrBusNumber;
- u8 LVL2_LunOrTarget;
- u8 LVL3_AddrMethod_plus_LunOrBusNumber;
- u8 LVL3_LunOrTarget;
- u8 LVL4_AddrMethod_plus_LunOrBusNumber;
- u8 LVL4_LunOrTarget;
- } SCSI_LUN_LEVELS_t, *pSCSI_LUN_LEVELS_t;
-
- /*
- * Structure definition for data returned by REPORT LUNS cmd;
- * LUN reporting parameter list format
- */
- typedef struct LUN_REPORT
- {
- u32 LunListLength;
- u32 Reserved;
- SCSI_LUN_LEVELS_t LunInfo[1];
- } SCSI_LUN_REPORT_t, *pSCSI_LUN_REPORT_t;
-
-/****************************************************************************
- *
- * Externals
- */
-
-/****************************************************************************
- *
- * Public Typedefs & Related Defines
- */
-
-/****************************************************************************
- *
- * Macros (embedded, above)
- */
-
-/****************************************************************************
- *
- * Public Variables
- */
-
-/****************************************************************************
- *
- * Public Prototypes (module entry points)
- */
-
-
-/***************************************************************************/
-#endif
+++ /dev/null
-
-static const char *ScsiOpcodeString[256] = {
- "TEST UNIT READY\0\01", /* 00h */
- "REWIND\0\002"
- "\001REZERO UNIT", /* 01h */
- "\0\0", /* 02h */
- "REQUEST SENSE\0\01", /* 03h */
- "FORMAT UNIT\0\03"
- "\001FORMAT MEDIUM\0"
- "\002FORMAT", /* 04h */
- "READ BLOCK LIMITS\0\1", /* 05h */
- "\0\0", /* 06h */
- "REASSIGN BLOCKS\0\02"
- "\010INITIALIZE ELEMENT STATUS", /* 07h */
- "READ(06)\0\04"
- "\001READ\0"
- "\003RECEIVE\0"
- "\011GET MESSAGE(06)", /* 08h */
- "\0\0", /* 09h */
- "WRITE(06)\0\05"
- "\001WRITE\0"
- "\002PRINT\0"
- "\003SEND(6)\0"
- "\011SEND MESSAGE(06)", /* 0Ah */
- "SEEK(06)\0\02"
- "\003SLEW AND PRINT", /* 0Bh */
- "\0\0", /* 0Ch */
- "\0\0", /* 0Dh */
- "\0\0", /* 0Eh */
- "READ REVERSE\0\01", /* 0Fh */
- "WRITE FILEMARKS\0\02"
- "\003SYNCRONIZE BUFFER", /* 10h */
- "SPACE(6)\0\01", /* 11h */
- "INQUIRY\0\01", /* 12h */
- "VERIFY\0\01", /* 13h */
- "RECOVER BUFFERED DATA\0\01", /* 14h */
- "MODE SELECT(06)\0\01", /* 15h */
- "RESERVE(06)\0\02"
- "\010RESERVE ELEMENT(06)", /* 16h */
- "RELEASE(06)\0\02"
- "\010RELEASE ELEMENT(06)", /* 17h */
- "COPY\0\01", /* 18h */
- "ERASE\0\01", /* 19h */
- "MODE SENSE(06)\0\01", /* 1Ah */
- "STOP START UNIT\0\04"
- "\001LOAD UNLOAD\0"
- "\002STOP PRINT\0"
- "\006SCAN\0\002", /* 1Bh */
- "RECEIVE DIAGNOSTIC RESULTS\0\01", /* 1Ch */
- "SEND DIAGNOSTIC\0\01", /* 1Dh */
- "PREVENT ALLOW MEDIUM REMOVAL\0\01", /* 1Eh */
- "\0\0", /* 1Fh */
- "\0\0", /* 20h */
- "\0\0", /* 21h */
- "\0\0", /* 22h */
- "READ FORMAT CAPACITIES\0\01", /* 23h */
- "SET WINDOW\0\01", /* 24h */
- "READ CAPACITY\0\03"
- "\006GET WINDOW\0"
- "\037FREAD CARD CAPACITY", /* 25h */
- "\0\0", /* 26h */
- "\0\0", /* 27h */
- "READ(10)\0\02"
- "\011GET MESSAGE(10)", /* 28h */
- "READ GENERATION\0\01", /* 29h */
- "WRITE(10)\0\03"
- "\011SEND(10)\0"
- "\011SEND MESSAGE(10)", /* 2Ah */
- "SEEK(10)\0\03"
- "LOCATE(10)\0"
- "POSITION TO ELEMENT", /* 2Bh */
- "ERASE(10)\0\01", /* 2Ch */
- "READ UPDATED BLOCK\0\01", /* 2Dh */
- "WRITE AND VERIFY(10)\0\01", /* 2Eh */
- "VERIFY(10)\0\01", /* 2Fh */
- "SEARCH DATA HIGH(10)\0\01", /* 30h */
- "SEARCH DATA EQUAL(10)\0\02"
- "OBJECT POSITION", /* 31h */
- "SEARCH DATA LOW(10)\0\01", /* 32h */
- "SET LIMITS(10)\0\01", /* 33h */
- "PRE-FETCH(10)\0\03"
- "READ POSITION\0"
- "GET DATA BUFFER STATUS", /* 34h */
- "SYNCHRONIZE CACHE(10)\0\01", /* 35h */
- "LOCK UNLOCK CACHE(10)\0\01", /* 36h */
- "READ DEFECT DATA(10)\0\01", /* 37h */
- "MEDIUM SCAN\0\01", /* 38h */
- "COMPARE\0\01", /* 39h */
- "COPY AND VERIFY\0\01", /* 3Ah */
- "WRITE BUFFER\0\01", /* 3Bh */
- "READ BUFFER\0\01", /* 3Ch */
- "UPDATE BLOCK\0\01", /* 3Dh */
- "READ LONG\0\01", /* 3Eh */
- "WRITE LONG\0\01", /* 3Fh */
- "CHANGE DEFINITION\0\01", /* 40h */
- "WRITE SAME(10)\0\01", /* 41h */
- "READ SUB-CHANNEL\0\01", /* 42h */
- "READ TOC/PMA/ATIP\0\01", /* 43h */
- "REPORT DENSITY SUPPORT\0\01", /* 44h */
- "READ HEADER\0\01", /* 44h */
- "PLAY AUDIO(10)\0\01", /* 45h */
- "GET CONFIGURATION\0\01", /* 46h */
- "PLAY AUDIO MSF\0\01", /* 47h */
- "PLAY AUDIO TRACK INDEX\0\01", /* 48h */
- "PLAY TRACK RELATIVE(10)\0\01", /* 49h */
- "GET EVENT STATUS NOTIFICATION\0\01", /* 4Ah */
- "PAUSE/RESUME\0\01", /* 4Bh */
- "LOG SELECT\0\01", /* 4Ch */
- "LOG SENSE\0\01", /* 4Dh */
- "STOP PLAY/SCAN\0\01", /* 4Eh */
- "\0\0", /* 4Fh */
- "XDWRITE(10)\0\01", /* 50h */
- "XPWRITE(10)\0\02"
- "READ DISC INFORMATION", /* 51h */
- "XDREAD(10)\0\01"
- "READ TRACK INFORMATION", /* 52h */
- "RESERVE TRACK\0\01", /* 53h */
- "SEND OPC INFORMATION\0\01", /* 54h */
- "MODE SELECT(10)\0\01", /* 55h */
- "RESERVE(10)\0\02"
- "RESERVE ELEMENT(10)", /* 56h */
- "RELEASE(10)\0\02"
- "RELEASE ELEMENT(10)", /* 57h */
- "REPAIR TRACK\0\01", /* 58h */
- "READ MASTER CUE\0\01", /* 59h */
- "MODE SENSE(10)\0\01", /* 5Ah */
- "CLOSE TRACK/SESSION\0\01", /* 5Bh */
- "READ BUFFER CAPACITY\0\01", /* 5Ch */
- "SEND CUE SHEET\0\01", /* 5Dh */
- "PERSISTENT RESERVE IN\0\01", /* 5Eh */
- "PERSISTENT RESERVE OUT\0\01", /* 5Fh */
- "\0\0", /* 60h */
- "\0\0", /* 61h */
- "\0\0", /* 62h */
- "\0\0", /* 63h */
- "\0\0", /* 64h */
- "\0\0", /* 65h */
- "\0\0", /* 66h */
- "\0\0", /* 67h */
- "\0\0", /* 68h */
- "\0\0", /* 69h */
- "\0\0", /* 6Ah */
- "\0\0", /* 6Bh */
- "\0\0", /* 6Ch */
- "\0\0", /* 6Dh */
- "\0\0", /* 6Eh */
- "\0\0", /* 6Fh */
- "\0\0", /* 70h */
- "\0\0", /* 71h */
- "\0\0", /* 72h */
- "\0\0", /* 73h */
- "\0\0", /* 74h */
- "\0\0", /* 75h */
- "\0\0", /* 76h */
- "\0\0", /* 77h */
- "\0\0", /* 78h */
- "\0\0", /* 79h */
- "\0\0", /* 7Ah */
- "\0\0", /* 7Bh */
- "\0\0", /* 7Ch */
- "\0\0", /* 7Eh */
- "\0\0", /* 7Eh */
- "\0\0", /* 7Fh */
- "XDWRITE EXTENDED(16)\0\01", /* 80h */
- "REBUILD(16)\0\01", /* 81h */
- "REGENERATE(16)\0\01", /* 82h */
- "EXTENDED COPY\0\01", /* 83h */
- "RECEIVE COPY RESULTS\0\01", /* 84h */
- "ACCESS CONTROL IN [proposed]\0\01", /* 86h */
- "ACCESS CONTROL OUT [proposed]\0\01", /* 87h */
- "READ(16)\0\01", /* 88h */
- "DEVICE LOCKS [proposed]\0\01", /* 89h */
- "WRITE(16)\0\01", /* 8Ah */
- "\0\0", /* 8Bh */
- "READ ATTRIBUTES [proposed]\0\01", /* 8Ch */
- "WRITE ATTRIBUTES [proposed]\0\01", /* 8Dh */
- "WRITE AND VERIFY(16)\0\01", /* 8Eh */
- "VERIFY(16)\0\01", /* 8Fh */
- "PRE-FETCH(16)\0\01", /* 90h */
- "SYNCHRONIZE CACHE(16)\0\02"
- "SPACE(16) [1]", /* 91h */
- "LOCK UNLOCK CACHE(16)\0\02"
- "LOCATE(16) [1]", /* 92h */
- "WRITE SAME(16)\0\01", /* 93h */
- "[usage proposed by SCSI Socket Services project]\0\01", /* 94h */
- "[usage proposed by SCSI Socket Services project]\0\01", /* 95h */
- "[usage proposed by SCSI Socket Services project]\0\01", /* 96h */
- "[usage proposed by SCSI Socket Services project]\0\01", /* 97h */
- "MARGIN CONTROL [proposed]\0\01", /* 98h */
- "\0\0", /* 99h */
- "\0\0", /* 9Ah */
- "\0\0", /* 9Bh */
- "\0\0", /* 9Ch */
- "\0\0", /* 9Dh */
- "SERVICE ACTION IN [proposed]\0\01", /* 9Eh */
- "SERVICE ACTION OUT [proposed]\0\01", /* 9Fh */
- "REPORT LUNS\0\01", /* A0h */
- "BLANK\0\01", /* A1h */
- "SEND EVENT\0\01", /* A2h */
- "MAINTENANCE (IN)\0\02"
- "SEND KEY", /* A3h */
- "MAINTENANCE (OUT)\0\02"
- "REPORT KEY", /* A4h */
- "MOVE MEDIUM\0\02"
- "PLAY AUDIO(12)", /* A5h */
- "EXCHANGE MEDIUM\0\02"
- "LOAD/UNLOAD C/DVD", /* A6h */
- "MOVE MEDIUM ATTACHED\0\02"
- "SET READ AHEAD\0\01", /* A7h */
- "READ(12)\0\02"
- "GET MESSAGE(12)", /* A8h */
- "PLAY TRACK RELATIVE(12)\0\01", /* A9h */
- "WRITE(12)\0\02"
- "SEND MESSAGE(12)", /* AAh */
- "\0\0", /* ABh */
- "ERASE(12)\0\02"
- "GET PERFORMANCE", /* ACh */
- "READ DVD STRUCTURE\0\01", /* ADh */
- "WRITE AND VERIFY(12)\0\01", /* AEh */
- "VERIFY(12)\0\01", /* AFh */
- "SEARCH DATA HIGH(12)\0\01", /* B0h */
- "SEARCH DATA EQUAL(12)\0\01", /* B1h */
- "SEARCH DATA LOW(12)\0\01", /* B2h */
- "SET LIMITS(12)\0\01", /* B3h */
- "READ ELEMENT STATUS ATTACHED\0\01", /* B4h */
- "REQUEST VOLUME ELEMENT ADDRESS\0\01", /* B5h */
- "SEND VOLUME TAG\0\02"
- "SET STREAMING", /* B6h */
- "READ DEFECT DATA(12)\0\01", /* B7h */
- "READ ELEMENT STATUS\0\01", /* B8h */
- "READ CD MSF\0\01", /* B9h */
- "REDUNDANCY GROUP (IN)\0\02"
- "SCAN", /* BAh */
- "REDUNDANCY GROUP (OUT)\0\02"
- "SET CD-ROM SPEED", /* BBh */
- "SPARE (IN)\0\02"
- "PLAY CD", /* BCh */
- "SPARE (OUT)\0\02"
- "MECHANISM STATUS", /* BDh */
- "VOLUME SET (IN)\0\02"
- "READ CD", /* BEh */
- "VOLUME SET (OUT)\0\0\02"
- "SEND DVD STRUCTURE", /* BFh */
- "\0\0", /* C0h */
- "\0\0", /* C1h */
- "\0\0", /* C2h */
- "\0\0", /* C3h */
- "\0\0", /* C4h */
- "\0\0", /* C5h */
- "\0\0", /* C6h */
- "\0\0", /* C7h */
- "\0\0", /* C8h */
- "\0\0", /* C9h */
- "\0\0", /* CAh */
- "\0\0", /* CBh */
- "\0\0", /* CCh */
- "\0\0", /* CDh */
- "\0\0", /* CEh */
- "\0\0", /* CFh */
- "\0\0", /* D0h */
- "\0\0", /* D1h */
- "\0\0", /* D2h */
- "\0\0", /* D3h */
- "\0\0", /* D4h */
- "\0\0", /* D5h */
- "\0\0", /* D6h */
- "\0\0", /* D7h */
- "\0\0", /* D8h */
- "\0\0", /* D9h */
- "\0\0", /* DAh */
- "\0\0", /* DBh */
- "\0\0", /* DCh */
- "\0\0", /* DEh */
- "\0\0", /* DEh */
- "\0\0", /* DFh */
- "\0\0", /* E0h */
- "\0\0", /* E1h */
- "\0\0", /* E2h */
- "\0\0", /* E3h */
- "\0\0", /* E4h */
- "\0\0", /* E5h */
- "\0\0", /* E6h */
- "\0\0", /* E7h */
- "\0\0", /* E8h */
- "\0\0", /* E9h */
- "\0\0", /* EAh */
- "\0\0", /* EBh */
- "\0\0", /* ECh */
- "\0\0", /* EDh */
- "\0\0", /* EEh */
- "\0\0", /* EFh */
- "\0\0", /* F0h */
- "\0\0", /* F1h */
- "\0\0", /* F2h */
- "\0\0", /* F3h */
- "\0\0", /* F4h */
- "\0\0", /* F5h */
- "\0\0", /* F6h */
- "\0\0", /* F7h */
- "\0\0", /* F8h */
- "\0\0", /* F9h */
- "\0\0", /* FAh */
- "\0\0", /* FBh */
- "\0\0", /* FEh */
- "\0\0", /* FEh */
- "\0\0", /* FEh */
- "\0\0" /* FFh */
-};
-
+++ /dev/null
-/*
- * Core I2O structure management
- *
- * (C) Copyright 1999-2002 Red Hat Software
- *
- * Written by Alan Cox, Building Number Three Ltd
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * A lot of the I2O message side code from this is taken from the
- * Red Creek RCPCI45 adapter driver by Red Creek Communications
- *
- * Fixes/additions:
- * Philipp Rumpf
- * Juha Sievänen <Juha.Sievanen@cs.Helsinki.FI>
- * Auvo Häkkinen <Auvo.Hakkinen@cs.Helsinki.FI>
- * Deepak Saxena <deepak@plexity.net>
- * Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
- * Alan Cox <alan@redhat.com>:
- * Ported to Linux 2.5.
- * Markus Lidel <Markus.Lidel@shadowconnect.com>:
- * Minor fixes for 2.6.
- *
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/pci.h>
-
-#include <linux/i2o.h>
-
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-#include <linux/smp_lock.h>
-
-#include <linux/bitops.h>
-#include <linux/wait.h>
-#include <linux/delay.h>
-#include <linux/timer.h>
-#include <linux/interrupt.h>
-#include <linux/sched.h>
-#include <asm/semaphore.h>
-#include <linux/completion.h>
-#include <linux/workqueue.h>
-
-#include <asm/io.h>
-#include <linux/reboot.h>
-#ifdef CONFIG_MTRR
-#include <asm/mtrr.h>
-#endif // CONFIG_MTRR
-
-#include "i2o_lan.h"
-
-//#define DRIVERDEBUG
-
-#ifdef DRIVERDEBUG
-#define dprintk(s, args...) printk(s, ## args)
-#else
-#define dprintk(s, args...)
-#endif
-
-/* OSM table */
-static struct i2o_handler *i2o_handlers[MAX_I2O_MODULES];
-
-/* Controller list */
-static struct i2o_controller *i2o_controllers[MAX_I2O_CONTROLLERS];
-struct i2o_controller *i2o_controller_chain;
-int i2o_num_controllers;
-
-/* Initiator Context for Core message */
-static int core_context;
-
-/* Initialization && shutdown functions */
-void i2o_sys_init(void);
-static void i2o_sys_shutdown(void);
-static int i2o_reset_controller(struct i2o_controller *);
-static int i2o_reboot_event(struct notifier_block *, unsigned long , void *);
-static int i2o_online_controller(struct i2o_controller *);
-static int i2o_init_outbound_q(struct i2o_controller *);
-static int i2o_post_outbound_messages(struct i2o_controller *);
-
-/* Reply handler */
-static void i2o_core_reply(struct i2o_handler *, struct i2o_controller *,
- struct i2o_message *);
-
-/* Various helper functions */
-static int i2o_lct_get(struct i2o_controller *);
-static int i2o_lct_notify(struct i2o_controller *);
-static int i2o_hrt_get(struct i2o_controller *);
-
-static int i2o_build_sys_table(void);
-static int i2o_systab_send(struct i2o_controller *c);
-
-/* I2O core event handler */
-static int i2o_core_evt(void *);
-static int evt_pid;
-static int evt_running;
-
-/* Dynamic LCT update handler */
-static int i2o_dyn_lct(void *);
-
-void i2o_report_controller_unit(struct i2o_controller *, struct i2o_device *);
-
-static void i2o_pci_dispose(struct i2o_controller *c);
-
-/*
- * I2O System Table. Contains information about
- * all the IOPs in the system. Used to inform IOPs
- * about each other's existence.
- *
- * sys_tbl_ver is the CurrentChangeIndicator that is
- * used by IOPs to track changes.
- */
-static struct i2o_sys_tbl *sys_tbl;
-static int sys_tbl_ind;
-static int sys_tbl_len;
-
-/*
- * This spin lock is used to keep a device from being
- * added and deleted concurrently across CPUs or interrupts.
- * This can occur when a user creates a device and immediatelly
- * deletes it before the new_dev_notify() handler is called.
- */
-static spinlock_t i2o_dev_lock = SPIN_LOCK_UNLOCKED;
-
-/*
- * Structures and definitions for synchronous message posting.
- * See i2o_post_wait() for description.
- */
-struct i2o_post_wait_data
-{
- int *status; /* Pointer to status block on caller stack */
- int *complete; /* Pointer to completion flag on caller stack */
- u32 id; /* Unique identifier */
- wait_queue_head_t *wq; /* Wake up for caller (NULL for dead) */
- struct i2o_post_wait_data *next; /* Chain */
- void *mem[2]; /* Memory blocks to recover on failure path */
- dma_addr_t phys[2]; /* Physical address of blocks to recover */
- u32 size[2]; /* Size of blocks to recover */
-};
-
-static struct i2o_post_wait_data *post_wait_queue;
-static u32 post_wait_id; // Unique ID for each post_wait
-static spinlock_t post_wait_lock = SPIN_LOCK_UNLOCKED;
-static void i2o_post_wait_complete(struct i2o_controller *, u32, int);
-
-/* OSM descriptor handler */
-static struct i2o_handler i2o_core_handler =
-{
- (void *)i2o_core_reply,
- NULL,
- NULL,
- NULL,
- "I2O core layer",
- 0,
- I2O_CLASS_EXECUTIVE
-};
-
-/*
- * Used when queueing a reply to be handled later
- */
-
-struct reply_info
-{
- struct i2o_controller *iop;
- u32 msg[MSG_FRAME_SIZE];
-};
-static struct reply_info evt_reply;
-static struct reply_info events[I2O_EVT_Q_LEN];
-static int evt_in;
-static int evt_out;
-static int evt_q_len;
-#define MODINC(x,y) ((x) = ((x) + 1) % (y))
-
-/*
- * I2O configuration spinlock. This isnt a big deal for contention
- * so we have one only
- */
-
-static DECLARE_MUTEX(i2o_configuration_lock);
-
-/*
- * Event spinlock. Used to keep event queue sane and from
- * handling multiple events simultaneously.
- */
-static spinlock_t i2o_evt_lock = SPIN_LOCK_UNLOCKED;
-
-/*
- * Semaphore used to synchronize event handling thread with
- * interrupt handler.
- */
-
-static DECLARE_MUTEX(evt_sem);
-static DECLARE_COMPLETION(evt_dead);
-static DECLARE_WAIT_QUEUE_HEAD(evt_wait);
-
-static struct notifier_block i2o_reboot_notifier =
-{
- i2o_reboot_event,
- NULL,
- 0
-};
-
-/*
- * Config options
- */
-
-static int verbose;
-
-#if BITS_PER_LONG == 64
-/**
- * i2o_context_list_add - append an ptr to the context list and return a
- * matching context id.
- * @ptr: pointer to add to the context list
- * @c: controller to which the context list belong
- * returns context id, which could be used in the transaction context
- * field.
- *
- * Because the context field in I2O is only 32-bit large, on 64-bit the
- * pointer is to large to fit in the context field. The i2o_context_list
- * functiones map pointers to context fields.
- */
-u32 i2o_context_list_add(void *ptr, struct i2o_controller *c) {
- u32 context = 1;
- struct i2o_context_list_element **entry = &c->context_list;
- struct i2o_context_list_element *element;
- unsigned long flags;
-
- spin_lock_irqsave(&c->context_list_lock, flags);
- while(*entry && ((*entry)->flags & I2O_CONTEXT_LIST_USED)) {
- if((*entry)->context >= context)
- context = (*entry)->context + 1;
- entry = &((*entry)->next);
- }
-
- if(!*entry) {
- if(unlikely(!context)) {
- spin_unlock_irqrestore(&c->context_list_lock, flags);
- printk(KERN_EMERG "i2o_core: context list overflow\n");
- return 0;
- }
-
- element = kmalloc(sizeof(struct i2o_context_list_element), GFP_KERNEL);
- if(!element) {
- printk(KERN_EMERG "i2o_core: could not allocate memory for context list element\n");
- return 0;
- }
- element->context = context;
- element->next = NULL;
- *entry = element;
- } else
- element = *entry;
-
- element->ptr = ptr;
- element->flags = I2O_CONTEXT_LIST_USED;
-
- spin_unlock_irqrestore(&c->context_list_lock, flags);
- dprintk(KERN_DEBUG "i2o_core: add context to list %p -> %d\n", ptr, context);
- return context;
-}
-
-/**
- * i2o_context_list_remove - remove a ptr from the context list and return
- * the matching context id.
- * @ptr: pointer to be removed from the context list
- * @c: controller to which the context list belong
- * returns context id, which could be used in the transaction context
- * field.
- */
-u32 i2o_context_list_remove(void *ptr, struct i2o_controller *c) {
- struct i2o_context_list_element **entry = &c->context_list;
- struct i2o_context_list_element *element;
- u32 context;
- unsigned long flags;
-
- spin_lock_irqsave(&c->context_list_lock, flags);
- while(*entry && ((*entry)->ptr != ptr))
- entry = &((*entry)->next);
-
- if(unlikely(!*entry)) {
- spin_unlock_irqrestore(&c->context_list_lock, flags);
- printk(KERN_WARNING "i2o_core: could not remove nonexistent ptr %p\n", ptr);
- return 0;
- }
-
- element = *entry;
-
- context = element->context;
- element->ptr = NULL;
- element->flags |= I2O_CONTEXT_LIST_DELETED;
-
- spin_unlock_irqrestore(&c->context_list_lock, flags);
- dprintk(KERN_DEBUG "i2o_core: markt as deleted in context list %p -> %d\n", ptr, context);
- return context;
-}
-
-/**
- * i2o_context_list_get - get a ptr from the context list and remove it
- * from the list.
- * @context: context id to which the pointer belong
- * @c: controller to which the context list belong
- * returns pointer to the matching context id
- */
-void *i2o_context_list_get(u32 context, struct i2o_controller *c) {
- struct i2o_context_list_element **entry = &c->context_list;
- struct i2o_context_list_element *element;
- void *ptr;
- int count = 0;
- unsigned long flags;
-
- spin_lock_irqsave(&c->context_list_lock, flags);
- while(*entry && ((*entry)->context != context)) {
- entry = &((*entry)->next);
- count ++;
- }
-
- if(unlikely(!*entry)) {
- spin_unlock_irqrestore(&c->context_list_lock, flags);
- printk(KERN_WARNING "i2o_core: context id %d not found\n", context);
- return NULL;
- }
-
- element = *entry;
- ptr = element->ptr;
- if(count >= I2O_CONTEXT_LIST_MIN_LENGTH) {
- *entry = (*entry)->next;
- kfree(element);
- } else {
- element->ptr = NULL;
- element->flags &= !I2O_CONTEXT_LIST_USED;
- }
-
- spin_unlock_irqrestore(&c->context_list_lock, flags);
- dprintk(KERN_DEBUG "i2o_core: get ptr from context list %d -> %p\n", context, ptr);
- return ptr;
-}
-#endif
-
-/*
- * I2O Core reply handler
- */
-static void i2o_core_reply(struct i2o_handler *h, struct i2o_controller *c,
- struct i2o_message *m)
-{
- u32 *msg=(u32 *)m;
- u32 status;
- u32 context = msg[2];
-
- if (msg[0] & MSG_FAIL) // Fail bit is set
- {
- u32 *preserved_msg = (u32*)(c->msg_virt + msg[7]);
-
- i2o_report_status(KERN_INFO, "i2o_core", msg);
- i2o_dump_message(preserved_msg);
-
- /* If the failed request needs special treatment,
- * it should be done here. */
-
- /* Release the preserved msg by resubmitting it as a NOP */
-
- preserved_msg[0] = cpu_to_le32(THREE_WORD_MSG_SIZE | SGL_OFFSET_0);
- preserved_msg[1] = cpu_to_le32(I2O_CMD_UTIL_NOP << 24 | HOST_TID << 12 | 0);
- preserved_msg[2] = 0;
- i2o_post_message(c, msg[7]);
-
- /* If reply to i2o_post_wait failed, return causes a timeout */
-
- return;
- }
-
-#ifdef DRIVERDEBUG
- i2o_report_status(KERN_INFO, "i2o_core", msg);
-#endif
-
- if(msg[2]&0x80000000) // Post wait message
- {
- if (msg[4] >> 24)
- status = (msg[4] & 0xFFFF);
- else
- status = I2O_POST_WAIT_OK;
-
- i2o_post_wait_complete(c, context, status);
- return;
- }
-
- if(m->function == I2O_CMD_UTIL_EVT_REGISTER)
- {
- memcpy(events[evt_in].msg, msg, (msg[0]>>16)<<2);
- events[evt_in].iop = c;
-
- spin_lock(&i2o_evt_lock);
- MODINC(evt_in, I2O_EVT_Q_LEN);
- if(evt_q_len == I2O_EVT_Q_LEN)
- MODINC(evt_out, I2O_EVT_Q_LEN);
- else
- evt_q_len++;
- spin_unlock(&i2o_evt_lock);
-
- up(&evt_sem);
- wake_up_interruptible(&evt_wait);
- return;
- }
-
- if(m->function == I2O_CMD_LCT_NOTIFY)
- {
- up(&c->lct_sem);
- return;
- }
-
- /*
- * If this happens, we want to dump the message to the syslog so
- * it can be sent back to the card manufacturer by the end user
- * to aid in debugging.
- *
- */
- printk(KERN_WARNING "%s: Unsolicited message reply sent to core!"
- "Message dumped to syslog\n",
- c->name);
- i2o_dump_message(msg);
-
- return;
-}
-
-/**
- * i2o_install_handler - install a message handler
- * @h: Handler structure
- *
- * Install an I2O handler - these handle the asynchronous messaging
- * from the card once it has initialised. If the table of handlers is
- * full then -ENOSPC is returned. On a success 0 is returned and the
- * context field is set by the function. The structure is part of the
- * system from this time onwards. It must not be freed until it has
- * been uninstalled
- */
-
-int i2o_install_handler(struct i2o_handler *h)
-{
- int i;
- down(&i2o_configuration_lock);
- for(i=0;i<MAX_I2O_MODULES;i++)
- {
- if(i2o_handlers[i]==NULL)
- {
- h->context = i;
- i2o_handlers[i]=h;
- up(&i2o_configuration_lock);
- return 0;
- }
- }
- up(&i2o_configuration_lock);
- return -ENOSPC;
-}
-
-/**
- * i2o_remove_handler - remove an i2o message handler
- * @h: handler
- *
- * Remove a message handler previously installed with i2o_install_handler.
- * After this function returns the handler object can be freed or re-used
- */
-
-int i2o_remove_handler(struct i2o_handler *h)
-{
- i2o_handlers[h->context]=NULL;
- return 0;
-}
-
-
-/*
- * Each I2O controller has a chain of devices on it.
- * Each device has a pointer to its LCT entry to be used
- * for fun purposes.
- */
-
-/**
- * i2o_install_device - attach a device to a controller
- * @c: controller
- * @d: device
- *
- * Add a new device to an i2o controller. This can be called from
- * non interrupt contexts only. It adds the device and marks it as
- * unclaimed. The device memory becomes part of the kernel and must
- * be uninstalled before being freed or reused. Zero is returned
- * on success.
- */
-
-int i2o_install_device(struct i2o_controller *c, struct i2o_device *d)
-{
- int i;
-
- down(&i2o_configuration_lock);
- d->controller=c;
- d->owner=NULL;
- d->next=c->devices;
- d->prev=NULL;
- if (c->devices != NULL)
- c->devices->prev=d;
- c->devices=d;
- *d->dev_name = 0;
-
- for(i = 0; i < I2O_MAX_MANAGERS; i++)
- d->managers[i] = NULL;
-
- up(&i2o_configuration_lock);
- return 0;
-}
-
-/* we need this version to call out of i2o_delete_controller */
-
-int __i2o_delete_device(struct i2o_device *d)
-{
- struct i2o_device **p;
- int i;
-
- p=&(d->controller->devices);
-
- /*
- * Hey we have a driver!
- * Check to see if the driver wants us to notify it of
- * device deletion. If it doesn't we assume that it
- * is unsafe to delete a device with an owner and
- * fail.
- */
- if(d->owner)
- {
- if(d->owner->dev_del_notify)
- {
- dprintk(KERN_INFO "Device has owner, notifying\n");
- d->owner->dev_del_notify(d->controller, d);
- if(d->owner)
- {
- printk(KERN_WARNING
- "Driver \"%s\" did not release device!\n", d->owner->name);
- return -EBUSY;
- }
- }
- else
- return -EBUSY;
- }
-
- /*
- * Tell any other users who are talking to this device
- * that it's going away. We assume that everything works.
- */
- for(i=0; i < I2O_MAX_MANAGERS; i++)
- {
- if(d->managers[i] && d->managers[i]->dev_del_notify)
- d->managers[i]->dev_del_notify(d->controller, d);
- }
-
- while(*p!=NULL)
- {
- if(*p==d)
- {
- /*
- * Destroy
- */
- *p=d->next;
- kfree(d);
- return 0;
- }
- p=&((*p)->next);
- }
- printk(KERN_ERR "i2o_delete_device: passed invalid device.\n");
- return -EINVAL;
-}
-
-/**
- * i2o_delete_device - remove an i2o device
- * @d: device to remove
- *
- * This function unhooks a device from a controller. The device
- * will not be unhooked if it has an owner who does not wish to free
- * it, or if the owner lacks a dev_del_notify function. In that case
- * -EBUSY is returned. On success 0 is returned. Other errors cause
- * negative errno values to be returned
- */
-
-int i2o_delete_device(struct i2o_device *d)
-{
- int ret;
-
- down(&i2o_configuration_lock);
-
- /*
- * Seek, locate
- */
-
- ret = __i2o_delete_device(d);
-
- up(&i2o_configuration_lock);
-
- return ret;
-}
-
-/**
- * i2o_install_controller - attach a controller
- * @c: controller
- *
- * Add a new controller to the i2o layer. This can be called from
- * non interrupt contexts only. It adds the controller and marks it as
- * unused with no devices. If the tables are full or memory allocations
- * fail then a negative errno code is returned. On success zero is
- * returned and the controller is bound to the system. The structure
- * must not be freed or reused until being uninstalled.
- */
-
-int i2o_install_controller(struct i2o_controller *c)
-{
- int i;
- down(&i2o_configuration_lock);
- for(i=0;i<MAX_I2O_CONTROLLERS;i++)
- {
- if(i2o_controllers[i]==NULL)
- {
- c->dlct = (i2o_lct*)pci_alloc_consistent(c->pdev, 8192, &c->dlct_phys);
- if(c->dlct==NULL)
- {
- up(&i2o_configuration_lock);
- return -ENOMEM;
- }
- i2o_controllers[i]=c;
- c->devices = NULL;
- c->next=i2o_controller_chain;
- i2o_controller_chain=c;
- c->unit = i;
- c->page_frame = NULL;
- c->hrt = NULL;
- c->hrt_len = 0;
- c->lct = NULL;
- c->status_block = NULL;
- sprintf(c->name, "i2o/iop%d", i);
- i2o_num_controllers++;
- init_MUTEX_LOCKED(&c->lct_sem);
- up(&i2o_configuration_lock);
- return 0;
- }
- }
- printk(KERN_ERR "No free i2o controller slots.\n");
- up(&i2o_configuration_lock);
- return -EBUSY;
-}
-
-/**
- * i2o_delete_controller - delete a controller
- * @c: controller
- *
- * Remove an i2o controller from the system. If the controller or its
- * devices are busy then -EBUSY is returned. On a failure a negative
- * errno code is returned. On success zero is returned.
- */
-
-int i2o_delete_controller(struct i2o_controller *c)
-{
- struct i2o_controller **p;
- int users;
- char name[16];
- int stat;
-
- dprintk(KERN_INFO "Deleting controller %s\n", c->name);
-
- /*
- * Clear event registration as this can cause weird behavior
- */
- if(c->status_block->iop_state == ADAPTER_STATE_OPERATIONAL)
- i2o_event_register(c, core_context, 0, 0, 0);
-
- down(&i2o_configuration_lock);
- if((users=atomic_read(&c->users)))
- {
- dprintk(KERN_INFO "I2O: %d users for controller %s\n", users,
- c->name);
- up(&i2o_configuration_lock);
- return -EBUSY;
- }
- while(c->devices)
- {
- if(__i2o_delete_device(c->devices)<0)
- {
- /* Shouldnt happen */
- I2O_IRQ_WRITE32(c, 0xFFFFFFFF);
- c->enabled = 0;
- up(&i2o_configuration_lock);
- return -EBUSY;
- }
- }
-
- /*
- * If this is shutdown time, the thread's already been killed
- */
- if(c->lct_running) {
- stat = kill_proc(c->lct_pid, SIGKILL, 1);
- if(!stat) {
- int count = 10 * 100;
- while(c->lct_running && --count) {
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(1);
- }
-
- if(!count)
- printk(KERN_ERR
- "%s: LCT thread still running!\n",
- c->name);
- }
- }
-
- p=&i2o_controller_chain;
-
- while(*p)
- {
- if(*p==c)
- {
- /* Ask the IOP to switch to RESET state */
- i2o_reset_controller(c);
-
- /* Release IRQ */
- i2o_pci_dispose(c);
-
- *p=c->next;
- up(&i2o_configuration_lock);
-
- if(c->page_frame)
- {
- pci_unmap_single(c->pdev, c->page_frame_map, MSG_POOL_SIZE, PCI_DMA_FROMDEVICE);
- kfree(c->page_frame);
- }
- if(c->hrt)
- pci_free_consistent(c->pdev, c->hrt_len, c->hrt, c->hrt_phys);
- if(c->lct)
- pci_free_consistent(c->pdev, c->lct->table_size << 2, c->lct, c->lct_phys);
- if(c->status_block)
- pci_free_consistent(c->pdev, sizeof(i2o_status_block), c->status_block, c->status_block_phys);
- if(c->dlct)
- pci_free_consistent(c->pdev, 8192, c->dlct, c->dlct_phys);
-
- i2o_controllers[c->unit]=NULL;
- memcpy(name, c->name, strlen(c->name)+1);
- kfree(c);
- dprintk(KERN_INFO "%s: Deleted from controller chain.\n", name);
-
- i2o_num_controllers--;
- return 0;
- }
- p=&((*p)->next);
- }
- up(&i2o_configuration_lock);
- printk(KERN_ERR "i2o_delete_controller: bad pointer!\n");
- return -ENOENT;
-}
-
-/**
- * i2o_unlock_controller - unlock a controller
- * @c: controller to unlock
- *
- * Take a lock on an i2o controller. This prevents it being deleted.
- * i2o controllers are not refcounted so a deletion of an in use device
- * will fail, not take affect on the last dereference.
- */
-
-void i2o_unlock_controller(struct i2o_controller *c)
-{
- atomic_dec(&c->users);
-}
-
-/**
- * i2o_find_controller - return a locked controller
- * @n: controller number
- *
- * Returns a pointer to the controller object. The controller is locked
- * on return. NULL is returned if the controller is not found.
- */
-
-struct i2o_controller *i2o_find_controller(int n)
-{
- struct i2o_controller *c;
-
- if(n<0 || n>=MAX_I2O_CONTROLLERS)
- return NULL;
-
- down(&i2o_configuration_lock);
- c=i2o_controllers[n];
- if(c!=NULL)
- atomic_inc(&c->users);
- up(&i2o_configuration_lock);
- return c;
-}
-
-/**
- * i2o_issue_claim - claim or release a device
- * @cmd: command
- * @c: controller to claim for
- * @tid: i2o task id
- * @type: type of claim
- *
- * Issue I2O UTIL_CLAIM and UTIL_RELEASE messages. The message to be sent
- * is set by cmd. The tid is the task id of the object to claim and the
- * type is the claim type (see the i2o standard)
- *
- * Zero is returned on success.
- */
-
-static int i2o_issue_claim(u32 cmd, struct i2o_controller *c, int tid, u32 type)
-{
- u32 msg[5];
-
- msg[0] = FIVE_WORD_MSG_SIZE | SGL_OFFSET_0;
- msg[1] = cmd << 24 | HOST_TID<<12 | tid;
- msg[3] = 0;
- msg[4] = type;
-
- return i2o_post_wait(c, msg, sizeof(msg), 60);
-}
-
-/*
- * i2o_claim_device - claim a device for use by an OSM
- * @d: device to claim
- * @h: handler for this device
- *
- * Do the leg work to assign a device to a given OSM on Linux. The
- * kernel updates the internal handler data for the device and then
- * performs an I2O claim for the device, attempting to claim the
- * device as primary. If the attempt fails a negative errno code
- * is returned. On success zero is returned.
- */
-
-int i2o_claim_device(struct i2o_device *d, struct i2o_handler *h)
-{
- int ret = 0;
-
- down(&i2o_configuration_lock);
- if (d->owner) {
- printk(KERN_INFO "Device claim called, but dev already owned by %s!",
- h->name);
- ret = -EBUSY;
- goto out;
- }
- d->owner=h;
-
- if(i2o_issue_claim(I2O_CMD_UTIL_CLAIM ,d->controller,d->lct_data.tid,
- I2O_CLAIM_PRIMARY))
- {
- d->owner = NULL;
- ret = -EBUSY;
- }
-out:
- up(&i2o_configuration_lock);
- return ret;
-}
-
-/**
- * i2o_release_device - release a device that the OSM is using
- * @d: device to claim
- * @h: handler for this device
- *
- * Drop a claim by an OSM on a given I2O device. The handler is cleared
- * and 0 is returned on success.
- *
- * AC - some devices seem to want to refuse an unclaim until they have
- * finished internal processing. It makes sense since you don't want a
- * new device to go reconfiguring the entire system until you are done.
- * Thus we are prepared to wait briefly.
- */
-
-int i2o_release_device(struct i2o_device *d, struct i2o_handler *h)
-{
- int err = 0;
- int tries;
-
- down(&i2o_configuration_lock);
- if (d->owner != h) {
- printk(KERN_INFO "Claim release called, but not owned by %s!\n",
- h->name);
- up(&i2o_configuration_lock);
- return -ENOENT;
- }
-
- for(tries=0;tries<10;tries++)
- {
- d->owner = NULL;
-
- /*
- * If the controller takes a nonblocking approach to
- * releases we have to sleep/poll for a few times.
- */
-
- if((err=i2o_issue_claim(I2O_CMD_UTIL_RELEASE, d->controller, d->lct_data.tid, I2O_CLAIM_PRIMARY)) )
- {
- err = -ENXIO;
- current->state = TASK_UNINTERRUPTIBLE;
- schedule_timeout(HZ);
- }
- else
- {
- err=0;
- break;
- }
- }
- up(&i2o_configuration_lock);
- return err;
-}
-
-/**
- * i2o_device_notify_on - Enable deletion notifiers
- * @d: device for notification
- * @h: handler to install
- *
- * Called by OSMs to let the core know that they want to be
- * notified if the given device is deleted from the system.
- */
-
-int i2o_device_notify_on(struct i2o_device *d, struct i2o_handler *h)
-{
- int i;
-
- if(d->num_managers == I2O_MAX_MANAGERS)
- return -ENOSPC;
-
- for(i = 0; i < I2O_MAX_MANAGERS; i++)
- {
- if(!d->managers[i])
- {
- d->managers[i] = h;
- break;
- }
- }
-
- d->num_managers++;
-
- return 0;
-}
-
-/**
- * i2o_device_notify_off - Remove deletion notifiers
- * @d: device for notification
- * @h: handler to remove
- *
- * Called by OSMs to let the core know that they no longer
- * are interested in the fate of the given device.
- */
-int i2o_device_notify_off(struct i2o_device *d, struct i2o_handler *h)
-{
- int i;
-
- for(i=0; i < I2O_MAX_MANAGERS; i++)
- {
- if(d->managers[i] == h)
- {
- d->managers[i] = NULL;
- d->num_managers--;
- return 0;
- }
- }
-
- return -ENOENT;
-}
-
-/**
- * i2o_event_register - register interest in an event
- * @c: Controller to register interest with
- * @tid: I2O task id
- * @init_context: initiator context to use with this notifier
- * @tr_context: transaction context to use with this notifier
- * @evt_mask: mask of events
- *
- * Create and posts an event registration message to the task. No reply
- * is waited for, or expected. Errors in posting will be reported.
- */
-
-int i2o_event_register(struct i2o_controller *c, u32 tid,
- u32 init_context, u32 tr_context, u32 evt_mask)
-{
- u32 msg[5]; // Not performance critical, so we just
- // i2o_post_this it instead of building it
- // in IOP memory
-
- msg[0] = FIVE_WORD_MSG_SIZE|SGL_OFFSET_0;
- msg[1] = I2O_CMD_UTIL_EVT_REGISTER<<24 | HOST_TID<<12 | tid;
- msg[2] = init_context;
- msg[3] = tr_context;
- msg[4] = evt_mask;
-
- return i2o_post_this(c, msg, sizeof(msg));
-}
-
-/*
- * i2o_event_ack - acknowledge an event
- * @c: controller
- * @msg: pointer to the UTIL_EVENT_REGISTER reply we received
- *
- * We just take a pointer to the original UTIL_EVENT_REGISTER reply
- * message and change the function code since that's what spec
- * describes an EventAck message looking like.
- */
-
-int i2o_event_ack(struct i2o_controller *c, u32 *msg)
-{
- struct i2o_message *m = (struct i2o_message *)msg;
-
- m->function = I2O_CMD_UTIL_EVT_ACK;
-
- return i2o_post_wait(c, msg, m->size * 4, 2);
-}
-
-/*
- * Core event handler. Runs as a separate thread and is woken
- * up whenever there is an Executive class event.
- */
-static int i2o_core_evt(void *reply_data)
-{
- struct reply_info *reply = (struct reply_info *) reply_data;
- u32 *msg = reply->msg;
- struct i2o_controller *c = NULL;
- unsigned long flags;
-
- daemonize("i2oevtd");
- allow_signal(SIGKILL);
-
- evt_running = 1;
-
- while(1)
- {
- if(down_interruptible(&evt_sem))
- {
- dprintk(KERN_INFO "I2O event thread dead\n");
- printk("exiting...");
- evt_running = 0;
- complete_and_exit(&evt_dead, 0);
- }
-
- /*
- * Copy the data out of the queue so that we don't have to lock
- * around the whole function and just around the qlen update
- */
- spin_lock_irqsave(&i2o_evt_lock, flags);
- memcpy(reply, &events[evt_out], sizeof(struct reply_info));
- MODINC(evt_out, I2O_EVT_Q_LEN);
- evt_q_len--;
- spin_unlock_irqrestore(&i2o_evt_lock, flags);
-
- c = reply->iop;
- dprintk(KERN_INFO "I2O IRTOS EVENT: iop%d, event %#10x\n", c->unit, msg[4]);
-
- /*
- * We do not attempt to delete/quiesce/etc. the controller if
- * some sort of error indidication occurs. We may want to do
- * so in the future, but for now we just let the user deal with
- * it. One reason for this is that what to do with an error
- * or when to send what ærror is not really agreed on, so
- * we get errors that may not be fatal but just look like they
- * are...so let the user deal with it.
- */
- switch(msg[4])
- {
- case I2O_EVT_IND_EXEC_RESOURCE_LIMITS:
- printk(KERN_ERR "%s: Out of resources\n", c->name);
- break;
-
- case I2O_EVT_IND_EXEC_POWER_FAIL:
- printk(KERN_ERR "%s: Power failure\n", c->name);
- break;
-
- case I2O_EVT_IND_EXEC_HW_FAIL:
- {
- char *fail[] =
- {
- "Unknown Error",
- "Power Lost",
- "Code Violation",
- "Parity Error",
- "Code Execution Exception",
- "Watchdog Timer Expired"
- };
-
- if(msg[5] <= 6)
- printk(KERN_ERR "%s: Hardware Failure: %s\n",
- c->name, fail[msg[5]]);
- else
- printk(KERN_ERR "%s: Unknown Hardware Failure\n", c->name);
-
- break;
- }
-
- /*
- * New device created
- * - Create a new i2o_device entry
- * - Inform all interested drivers about this device's existence
- */
- case I2O_EVT_IND_EXEC_NEW_LCT_ENTRY:
- {
- struct i2o_device *d = (struct i2o_device *)
- kmalloc(sizeof(struct i2o_device), GFP_KERNEL);
- int i;
-
- if (d == NULL) {
- printk(KERN_EMERG "i2oevtd: out of memory\n");
- break;
- }
- memcpy(&d->lct_data, &msg[5], sizeof(i2o_lct_entry));
-
- d->next = NULL;
- d->controller = c;
- d->flags = 0;
-
- i2o_report_controller_unit(c, d);
- i2o_install_device(c,d);
-
- for(i = 0; i < MAX_I2O_MODULES; i++)
- {
- if(i2o_handlers[i] &&
- i2o_handlers[i]->new_dev_notify &&
- (i2o_handlers[i]->class&d->lct_data.class_id))
- {
- spin_lock(&i2o_dev_lock);
- i2o_handlers[i]->new_dev_notify(c,d);
- spin_unlock(&i2o_dev_lock);
- }
- }
-
- break;
- }
-
- /*
- * LCT entry for a device has been modified, so update it
- * internally.
- */
- case I2O_EVT_IND_EXEC_MODIFIED_LCT:
- {
- struct i2o_device *d;
- i2o_lct_entry *new_lct = (i2o_lct_entry *)&msg[5];
-
- for(d = c->devices; d; d = d->next)
- {
- if(d->lct_data.tid == new_lct->tid)
- {
- memcpy(&d->lct_data, new_lct, sizeof(i2o_lct_entry));
- break;
- }
- }
- break;
- }
-
- case I2O_EVT_IND_CONFIGURATION_FLAG:
- printk(KERN_WARNING "%s requires user configuration\n", c->name);
- break;
-
- case I2O_EVT_IND_GENERAL_WARNING:
- printk(KERN_WARNING "%s: Warning notification received!"
- "Check configuration for errors!\n", c->name);
- break;
-
- case I2O_EVT_IND_EVT_MASK_MODIFIED:
- /* Well I guess that was us hey .. */
- break;
-
- default:
- printk(KERN_WARNING "%s: No handler for event (0x%08x)\n", c->name, msg[4]);
- break;
- }
- }
-
- return 0;
-}
-
-/*
- * Dynamic LCT update. This compares the LCT with the currently
- * installed devices to check for device deletions..this needed b/c there
- * is no DELETED_LCT_ENTRY EventIndicator for the Executive class so
- * we can't just have the event handler do this...annoying
- *
- * This is a hole in the spec that will hopefully be fixed someday.
- */
-static int i2o_dyn_lct(void *foo)
-{
- struct i2o_controller *c = (struct i2o_controller *)foo;
- struct i2o_device *d = NULL;
- struct i2o_device *d1 = NULL;
- int i = 0;
- int found = 0;
- int entries;
- void *tmp;
-
- daemonize("iop%d_lctd", c->unit);
- allow_signal(SIGKILL);
-
- c->lct_running = 1;
-
- while(1)
- {
- down_interruptible(&c->lct_sem);
- if(signal_pending(current))
- {
- dprintk(KERN_ERR "%s: LCT thread dead\n", c->name);
- c->lct_running = 0;
- return 0;
- }
-
- entries = c->dlct->table_size;
- entries -= 3;
- entries /= 9;
-
- dprintk(KERN_INFO "%s: Dynamic LCT Update\n",c->name);
- dprintk(KERN_INFO "%s: Dynamic LCT contains %d entries\n", c->name, entries);
-
- if(!entries)
- {
- printk(KERN_INFO "%s: Empty LCT???\n", c->name);
- continue;
- }
-
- /*
- * Loop through all the devices on the IOP looking for their
- * LCT data in the LCT. We assume that TIDs are not repeated.
- * as that is the only way to really tell. It's been confirmed
- * by the IRTOS vendor(s?) that TIDs are not reused until they
- * wrap arround(4096), and I doubt a system will up long enough
- * to create/delete that many devices.
- */
- for(d = c->devices; d; )
- {
- found = 0;
- d1 = d->next;
-
- for(i = 0; i < entries; i++)
- {
- if(d->lct_data.tid == c->dlct->lct_entry[i].tid)
- {
- found = 1;
- break;
- }
- }
- if(!found)
- {
- dprintk(KERN_INFO "i2o_core: Deleted device!\n");
- spin_lock(&i2o_dev_lock);
- i2o_delete_device(d);
- spin_unlock(&i2o_dev_lock);
- }
- d = d1;
- }
-
- /*
- * Tell LCT to renotify us next time there is a change
- */
- i2o_lct_notify(c);
-
- /*
- * Copy new LCT into public LCT
- *
- * Possible race if someone is reading LCT while we are copying
- * over it. If this happens, we'll fix it then. but I doubt that
- * the LCT will get updated often enough or will get read by
- * a user often enough to worry.
- */
- if(c->lct->table_size < c->dlct->table_size)
- {
- dma_addr_t phys;
- tmp = c->lct;
- c->lct = pci_alloc_consistent(c->pdev, c->dlct->table_size<<2, &phys);
- if(!c->lct)
- {
- printk(KERN_ERR "%s: No memory for LCT!\n", c->name);
- c->lct = tmp;
- continue;
- }
- pci_free_consistent(tmp, c->lct->table_size << 2, c->lct, c->lct_phys);
- c->lct_phys = phys;
- }
- memcpy(c->lct, c->dlct, c->dlct->table_size<<2);
- }
-
- return 0;
-}
-
-/**
- * i2o_run_queue - process pending events on a controller
- * @c: controller to process
- *
- * This is called by the bus specific driver layer when an interrupt
- * or poll of this card interface is desired.
- */
-
-void i2o_run_queue(struct i2o_controller *c)
-{
- struct i2o_message *m;
- u32 mv;
- u32 *msg;
-
- /*
- * Old 960 steppings had a bug in the I2O unit that caused
- * the queue to appear empty when it wasn't.
- */
- if((mv=I2O_REPLY_READ32(c))==0xFFFFFFFF)
- mv=I2O_REPLY_READ32(c);
-
- while(mv!=0xFFFFFFFF)
- {
- struct i2o_handler *i;
- /* Map the message from the page frame map to kernel virtual */
- /* m=(struct i2o_message *)(mv - (unsigned long)c->page_frame_map + (unsigned long)c->page_frame); */
- m=(struct i2o_message *)bus_to_virt(mv);
- msg=(u32*)m;
-
- /*
- * Ensure this message is seen coherently but cachably by
- * the processor
- */
-
- pci_dma_sync_single_for_cpu(c->pdev, c->page_frame_map, MSG_FRAME_SIZE, PCI_DMA_FROMDEVICE);
-
- /*
- * Despatch it
- */
-
- i=i2o_handlers[m->initiator_context&(MAX_I2O_MODULES-1)];
- if(i && i->reply)
- i->reply(i,c,m);
- else
- {
- printk(KERN_WARNING "I2O: Spurious reply to handler %d\n",
- m->initiator_context&(MAX_I2O_MODULES-1));
- }
- i2o_flush_reply(c,mv);
- mb();
-
- /* That 960 bug again... */
- if((mv=I2O_REPLY_READ32(c))==0xFFFFFFFF)
- mv=I2O_REPLY_READ32(c);
- }
-}
-
-
-/**
- * i2o_get_class_name - do i2o class name lookup
- * @class: class number
- *
- * Return a descriptive string for an i2o class
- */
-
-const char *i2o_get_class_name(int class)
-{
- int idx = 16;
- static char *i2o_class_name[] = {
- "Executive",
- "Device Driver Module",
- "Block Device",
- "Tape Device",
- "LAN Interface",
- "WAN Interface",
- "Fibre Channel Port",
- "Fibre Channel Device",
- "SCSI Device",
- "ATE Port",
- "ATE Device",
- "Floppy Controller",
- "Floppy Device",
- "Secondary Bus Port",
- "Peer Transport Agent",
- "Peer Transport",
- "Unknown"
- };
-
- switch(class&0xFFF)
- {
- case I2O_CLASS_EXECUTIVE:
- idx = 0; break;
- case I2O_CLASS_DDM:
- idx = 1; break;
- case I2O_CLASS_RANDOM_BLOCK_STORAGE:
- idx = 2; break;
- case I2O_CLASS_SEQUENTIAL_STORAGE:
- idx = 3; break;
- case I2O_CLASS_LAN:
- idx = 4; break;
- case I2O_CLASS_WAN:
- idx = 5; break;
- case I2O_CLASS_FIBRE_CHANNEL_PORT:
- idx = 6; break;
- case I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL:
- idx = 7; break;
- case I2O_CLASS_SCSI_PERIPHERAL:
- idx = 8; break;
- case I2O_CLASS_ATE_PORT:
- idx = 9; break;
- case I2O_CLASS_ATE_PERIPHERAL:
- idx = 10; break;
- case I2O_CLASS_FLOPPY_CONTROLLER:
- idx = 11; break;
- case I2O_CLASS_FLOPPY_DEVICE:
- idx = 12; break;
- case I2O_CLASS_BUS_ADAPTER_PORT:
- idx = 13; break;
- case I2O_CLASS_PEER_TRANSPORT_AGENT:
- idx = 14; break;
- case I2O_CLASS_PEER_TRANSPORT:
- idx = 15; break;
- }
-
- return i2o_class_name[idx];
-}
-
-
-/**
- * i2o_wait_message - obtain an i2o message from the IOP
- * @c: controller
- * @why: explanation
- *
- * This function waits up to 5 seconds for a message slot to be
- * available. If no message is available it prints an error message
- * that is expected to be what the message will be used for (eg
- * "get_status"). 0xFFFFFFFF is returned on a failure.
- *
- * On a success the message is returned. This is the physical page
- * frame offset address from the read port. (See the i2o spec)
- */
-
-u32 i2o_wait_message(struct i2o_controller *c, char *why)
-{
- long time=jiffies;
- u32 m;
- while((m=I2O_POST_READ32(c))==0xFFFFFFFF)
- {
- if((jiffies-time)>=5*HZ)
- {
- dprintk(KERN_ERR "%s: Timeout waiting for message frame to send %s.\n",
- c->name, why);
- return 0xFFFFFFFF;
- }
- schedule();
- barrier();
- }
- return m;
-}
-
-/**
- * i2o_report_controller_unit - print information about a tid
- * @c: controller
- * @d: device
- *
- * Dump an information block associated with a given unit (TID). The
- * tables are read and a block of text is output to printk that is
- * formatted intended for the user.
- */
-
-void i2o_report_controller_unit(struct i2o_controller *c, struct i2o_device *d)
-{
- char buf[64];
- char str[22];
- int ret;
- int unit = d->lct_data.tid;
-
- if(verbose==0)
- return;
-
- printk(KERN_INFO "Target ID %d.\n", unit);
- if((ret=i2o_query_scalar(c, unit, 0xF100, 3, buf, 16))>=0)
- {
- buf[16]=0;
- printk(KERN_INFO " Vendor: %s\n", buf);
- }
- if((ret=i2o_query_scalar(c, unit, 0xF100, 4, buf, 16))>=0)
- {
- buf[16]=0;
- printk(KERN_INFO " Device: %s\n", buf);
- }
- if(i2o_query_scalar(c, unit, 0xF100, 5, buf, 16)>=0)
- {
- buf[16]=0;
- printk(KERN_INFO " Description: %s\n", buf);
- }
- if((ret=i2o_query_scalar(c, unit, 0xF100, 6, buf, 8))>=0)
- {
- buf[8]=0;
- printk(KERN_INFO " Rev: %s\n", buf);
- }
-
- printk(KERN_INFO " Class: ");
- sprintf(str, "%-21s", i2o_get_class_name(d->lct_data.class_id));
- printk("%s\n", str);
-
- printk(KERN_INFO " Subclass: 0x%04X\n", d->lct_data.sub_class);
- printk(KERN_INFO " Flags: ");
-
- if(d->lct_data.device_flags&(1<<0))
- printk("C"); // ConfigDialog requested
- if(d->lct_data.device_flags&(1<<1))
- printk("U"); // Multi-user capable
- if(!(d->lct_data.device_flags&(1<<4)))
- printk("P"); // Peer service enabled!
- if(!(d->lct_data.device_flags&(1<<5)))
- printk("M"); // Mgmt service enabled!
- printk("\n");
-
-}
-
-
-/*
- * Parse the hardware resource table. Right now we print it out
- * and don't do a lot with it. We should collate these and then
- * interact with the Linux resource allocation block.
- *
- * Lets prove we can read it first eh ?
- *
- * This is full of endianisms!
- */
-
-static int i2o_parse_hrt(struct i2o_controller *c)
-{
-#ifdef DRIVERDEBUG
- u32 *rows=(u32*)c->hrt;
- u8 *p=(u8 *)c->hrt;
- u8 *d;
- int count;
- int length;
- int i;
- int state;
-
- if(p[3]!=0)
- {
- printk(KERN_ERR "%s: HRT table for controller is too new a version.\n",
- c->name);
- return -1;
- }
-
- count=p[0]|(p[1]<<8);
- length = p[2];
-
- printk(KERN_INFO "%s: HRT has %d entries of %d bytes each.\n",
- c->name, count, length<<2);
-
- rows+=2;
-
- for(i=0;i<count;i++)
- {
- printk(KERN_INFO "Adapter %08X: ", rows[0]);
- p=(u8 *)(rows+1);
- d=(u8 *)(rows+2);
- state=p[1]<<8|p[0];
-
- printk("TID %04X:[", state&0xFFF);
- state>>=12;
- if(state&(1<<0))
- printk("H"); /* Hidden */
- if(state&(1<<2))
- {
- printk("P"); /* Present */
- if(state&(1<<1))
- printk("C"); /* Controlled */
- }
- if(state>9)
- printk("*"); /* Hard */
-
- printk("]:");
-
- switch(p[3]&0xFFFF)
- {
- case 0:
- /* Adapter private bus - easy */
- printk("Local bus %d: I/O at 0x%04X Mem 0x%08X",
- p[2], d[1]<<8|d[0], *(u32 *)(d+4));
- break;
- case 1:
- /* ISA bus */
- printk("ISA %d: CSN %d I/O at 0x%04X Mem 0x%08X",
- p[2], d[2], d[1]<<8|d[0], *(u32 *)(d+4));
- break;
-
- case 2: /* EISA bus */
- printk("EISA %d: Slot %d I/O at 0x%04X Mem 0x%08X",
- p[2], d[3], d[1]<<8|d[0], *(u32 *)(d+4));
- break;
-
- case 3: /* MCA bus */
- printk("MCA %d: Slot %d I/O at 0x%04X Mem 0x%08X",
- p[2], d[3], d[1]<<8|d[0], *(u32 *)(d+4));
- break;
-
- case 4: /* PCI bus */
- printk("PCI %d: Bus %d Device %d Function %d",
- p[2], d[2], d[1], d[0]);
- break;
-
- case 0x80: /* Other */
- default:
- printk("Unsupported bus type.");
- break;
- }
- printk("\n");
- rows+=length;
- }
-#endif
- return 0;
-}
-
-/*
- * The logical configuration table tells us what we can talk to
- * on the board. Most of the stuff isn't interesting to us.
- */
-
-static int i2o_parse_lct(struct i2o_controller *c)
-{
- int i;
- int max;
- int tid;
- struct i2o_device *d;
- i2o_lct *lct = c->lct;
-
- if (lct == NULL) {
- printk(KERN_ERR "%s: LCT is empty???\n", c->name);
- return -1;
- }
-
- max = lct->table_size;
- max -= 3;
- max /= 9;
-
- printk(KERN_INFO "%s: LCT has %d entries.\n", c->name, max);
-
- if(lct->iop_flags&(1<<0))
- printk(KERN_WARNING "%s: Configuration dialog desired.\n", c->name);
-
- for(i=0;i<max;i++)
- {
- d = (struct i2o_device *)kmalloc(sizeof(struct i2o_device), GFP_KERNEL);
- if(d==NULL)
- {
- printk(KERN_CRIT "i2o_core: Out of memory for I2O device data.\n");
- return -ENOMEM;
- }
-
- d->controller = c;
- d->next = NULL;
-
- memcpy(&d->lct_data, &lct->lct_entry[i], sizeof(i2o_lct_entry));
-
- d->flags = 0;
- tid = d->lct_data.tid;
-
- i2o_report_controller_unit(c, d);
-
- i2o_install_device(c, d);
- }
- return 0;
-}
-
-
-/**
- * i2o_quiesce_controller - quiesce controller
- * @c: controller
- *
- * Quiesce an IOP. Causes IOP to make external operation quiescent
- * (i2o 'READY' state). Internal operation of the IOP continues normally.
- */
-
-int i2o_quiesce_controller(struct i2o_controller *c)
-{
- u32 msg[4];
- int ret;
-
- i2o_status_get(c);
-
- /* SysQuiesce discarded if IOP not in READY or OPERATIONAL state */
-
- if ((c->status_block->iop_state != ADAPTER_STATE_READY) &&
- (c->status_block->iop_state != ADAPTER_STATE_OPERATIONAL))
- {
- return 0;
- }
-
- msg[0] = FOUR_WORD_MSG_SIZE|SGL_OFFSET_0;
- msg[1] = I2O_CMD_SYS_QUIESCE<<24|HOST_TID<<12|ADAPTER_TID;
- msg[3] = 0;
-
- /* Long timeout needed for quiesce if lots of devices */
-
- if ((ret = i2o_post_wait(c, msg, sizeof(msg), 240)))
- printk(KERN_INFO "%s: Unable to quiesce (status=%#x).\n",
- c->name, -ret);
- else
- dprintk(KERN_INFO "%s: Quiesced.\n", c->name);
-
- i2o_status_get(c); // Entered READY state
- return ret;
-}
-
-/**
- * i2o_enable_controller - move controller from ready to operational
- * @c: controller
- *
- * Enable IOP. This allows the IOP to resume external operations and
- * reverses the effect of a quiesce. In the event of an error a negative
- * errno code is returned.
- */
-
-int i2o_enable_controller(struct i2o_controller *c)
-{
- u32 msg[4];
- int ret;
-
- i2o_status_get(c);
-
- /* Enable only allowed on READY state */
- if(c->status_block->iop_state != ADAPTER_STATE_READY)
- return -EINVAL;
-
- msg[0]=FOUR_WORD_MSG_SIZE|SGL_OFFSET_0;
- msg[1]=I2O_CMD_SYS_ENABLE<<24|HOST_TID<<12|ADAPTER_TID;
-
- /* How long of a timeout do we need? */
-
- if ((ret = i2o_post_wait(c, msg, sizeof(msg), 240)))
- printk(KERN_ERR "%s: Could not enable (status=%#x).\n",
- c->name, -ret);
- else
- dprintk(KERN_INFO "%s: Enabled.\n", c->name);
-
- i2o_status_get(c); // entered OPERATIONAL state
-
- return ret;
-}
-
-/**
- * i2o_clear_controller - clear a controller
- * @c: controller
- *
- * Clear an IOP to HOLD state, ie. terminate external operations, clear all
- * input queues and prepare for a system restart. IOP's internal operation
- * continues normally and the outbound queue is alive.
- * The IOP is not expected to rebuild its LCT.
- */
-
-int i2o_clear_controller(struct i2o_controller *c)
-{
- struct i2o_controller *iop;
- u32 msg[4];
- int ret;
-
- /* Quiesce all IOPs first */
-
- for (iop = i2o_controller_chain; iop; iop = iop->next)
- i2o_quiesce_controller(iop);
-
- msg[0]=FOUR_WORD_MSG_SIZE|SGL_OFFSET_0;
- msg[1]=I2O_CMD_ADAPTER_CLEAR<<24|HOST_TID<<12|ADAPTER_TID;
- msg[3]=0;
-
- if ((ret=i2o_post_wait(c, msg, sizeof(msg), 30)))
- printk(KERN_INFO "%s: Unable to clear (status=%#x).\n",
- c->name, -ret);
- else
- dprintk(KERN_INFO "%s: Cleared.\n",c->name);
-
- i2o_status_get(c);
-
- /* Enable other IOPs */
-
- for (iop = i2o_controller_chain; iop; iop = iop->next)
- if (iop != c)
- i2o_enable_controller(iop);
-
- return ret;
-}
-
-
-/**
- * i2o_reset_controller - reset an IOP
- * @c: controller to reset
- *
- * Reset the IOP into INIT state and wait until IOP gets into RESET state.
- * Terminate all external operations, clear IOP's inbound and outbound
- * queues, terminate all DDMs, and reload the IOP's operating environment
- * and all local DDMs. The IOP rebuilds its LCT.
- */
-
-static int i2o_reset_controller(struct i2o_controller *c)
-{
- struct i2o_controller *iop;
- u32 m;
- u8 *status;
- dma_addr_t status_phys;
- u32 *msg;
- long time;
-
- /* Quiesce all IOPs first */
-
- for (iop = i2o_controller_chain; iop; iop = iop->next)
- {
- if(!iop->dpt)
- i2o_quiesce_controller(iop);
- }
-
- m=i2o_wait_message(c, "AdapterReset");
- if(m==0xFFFFFFFF)
- return -ETIMEDOUT;
- msg=(u32 *)(c->msg_virt+m);
-
- status = pci_alloc_consistent(c->pdev, 4, &status_phys);
- if(status == NULL) {
- printk(KERN_ERR "IOP reset failed - no free memory.\n");
- return -ENOMEM;
- }
- memset(status, 0, 4);
-
- msg[0]=EIGHT_WORD_MSG_SIZE|SGL_OFFSET_0;
- msg[1]=I2O_CMD_ADAPTER_RESET<<24|HOST_TID<<12|ADAPTER_TID;
- msg[2]=core_context;
- msg[3]=0;
- msg[4]=0;
- msg[5]=0;
- msg[6]=status_phys;
- msg[7]=0; /* 64bit host FIXME */
-
- i2o_post_message(c,m);
-
- /* Wait for a reply */
- time=jiffies;
- while(*status==0)
- {
- if((jiffies-time)>=20*HZ)
- {
- printk(KERN_ERR "IOP reset timeout.\n");
- /* The controller still may respond and overwrite
- * status_phys, LEAK it to prevent memory corruption.
- */
- return -ETIMEDOUT;
- }
- schedule();
- barrier();
- }
-
- if (*status==I2O_CMD_IN_PROGRESS)
- {
- /*
- * Once the reset is sent, the IOP goes into the INIT state
- * which is indeterminate. We need to wait until the IOP
- * has rebooted before we can let the system talk to
- * it. We read the inbound Free_List until a message is
- * available. If we can't read one in the given ammount of
- * time, we assume the IOP could not reboot properly.
- */
-
- dprintk(KERN_INFO "%s: Reset in progress, waiting for reboot...\n",
- c->name);
-
- time = jiffies;
- m = I2O_POST_READ32(c);
- while(m == 0XFFFFFFFF)
- {
- if((jiffies-time) >= 30*HZ)
- {
- printk(KERN_ERR "%s: Timeout waiting for IOP reset.\n",
- c->name);
- /* The controller still may respond and
- * overwrite status_phys, LEAK it to prevent
- * memory corruption.
- */
- return -ETIMEDOUT;
- }
- schedule();
- barrier();
- m = I2O_POST_READ32(c);
- }
- i2o_flush_reply(c,m);
- }
-
- /* If IopReset was rejected or didn't perform reset, try IopClear */
-
- i2o_status_get(c);
- if (status[0] == I2O_CMD_REJECTED ||
- c->status_block->iop_state != ADAPTER_STATE_RESET)
- {
- printk(KERN_WARNING "%s: Reset rejected, trying to clear\n",c->name);
- i2o_clear_controller(c);
- }
- else
- dprintk(KERN_INFO "%s: Reset completed.\n", c->name);
-
- /* Enable other IOPs */
-
- for (iop = i2o_controller_chain; iop; iop = iop->next)
- if (iop != c)
- i2o_enable_controller(iop);
-
- pci_free_consistent(c->pdev, 4, status, status_phys);
- return 0;
-}
-
-
-/**
- * i2o_status_get - get the status block for the IOP
- * @c: controller
- *
- * Issue a status query on the controller. This updates the
- * attached status_block. If the controller fails to reply or an
- * error occurs then a negative errno code is returned. On success
- * zero is returned and the status_blok is updated.
- */
-
-int i2o_status_get(struct i2o_controller *c)
-{
- long time;
- u32 m;
- u32 *msg;
- u8 *status_block;
-
- if (c->status_block == NULL)
- {
- c->status_block = (i2o_status_block *)
- pci_alloc_consistent(c->pdev, sizeof(i2o_status_block), &c->status_block_phys);
- if (c->status_block == NULL)
- {
- printk(KERN_CRIT "%s: Get Status Block failed; Out of memory.\n",
- c->name);
- return -ENOMEM;
- }
- }
-
- status_block = (u8*)c->status_block;
- memset(c->status_block,0,sizeof(i2o_status_block));
-
- m=i2o_wait_message(c, "StatusGet");
- if(m==0xFFFFFFFF)
- return -ETIMEDOUT;
- msg=(u32 *)(c->msg_virt+m);
-
- msg[0]=NINE_WORD_MSG_SIZE|SGL_OFFSET_0;
- msg[1]=I2O_CMD_STATUS_GET<<24|HOST_TID<<12|ADAPTER_TID;
- msg[2]=core_context;
- msg[3]=0;
- msg[4]=0;
- msg[5]=0;
- msg[6]=c->status_block_phys;
- msg[7]=0; /* 64bit host FIXME */
- msg[8]=sizeof(i2o_status_block); /* always 88 bytes */
-
- i2o_post_message(c,m);
-
- /* Wait for a reply */
-
- time=jiffies;
- while(status_block[87]!=0xFF)
- {
- if((jiffies-time)>=5*HZ)
- {
- printk(KERN_ERR "%s: Get status timeout.\n",c->name);
- return -ETIMEDOUT;
- }
- yield();
- barrier();
- }
-
-#ifdef DRIVERDEBUG
- printk(KERN_INFO "%s: State = ", c->name);
- switch (c->status_block->iop_state) {
- case 0x01:
- printk("INIT\n");
- break;
- case 0x02:
- printk("RESET\n");
- break;
- case 0x04:
- printk("HOLD\n");
- break;
- case 0x05:
- printk("READY\n");
- break;
- case 0x08:
- printk("OPERATIONAL\n");
- break;
- case 0x10:
- printk("FAILED\n");
- break;
- case 0x11:
- printk("FAULTED\n");
- break;
- default:
- printk("%x (unknown !!)\n",c->status_block->iop_state);
-}
-#endif
-
- return 0;
-}
-
-/*
- * Get the Hardware Resource Table for the device.
- * The HRT contains information about possible hidden devices
- * but is mostly useless to us
- */
-int i2o_hrt_get(struct i2o_controller *c)
-{
- u32 msg[6];
- int ret, size = sizeof(i2o_hrt);
- int loops = 3; /* we only try 3 times to get the HRT, this should be
- more then enough. Worst case should be 2 times.*/
-
- /* First read just the header to figure out the real size */
-
- do {
- /* first we allocate the memory for the HRT */
- if (c->hrt == NULL) {
- c->hrt=pci_alloc_consistent(c->pdev, size, &c->hrt_phys);
- if (c->hrt == NULL) {
- printk(KERN_CRIT "%s: Hrt Get failed; Out of memory.\n", c->name);
- return -ENOMEM;
- }
- c->hrt_len = size;
- }
-
- msg[0]= SIX_WORD_MSG_SIZE| SGL_OFFSET_4;
- msg[1]= I2O_CMD_HRT_GET<<24 | HOST_TID<<12 | ADAPTER_TID;
- msg[3]= 0;
- msg[4]= (0xD0000000 | c->hrt_len); /* Simple transaction */
- msg[5]= c->hrt_phys; /* Dump it here */
-
- ret = i2o_post_wait_mem(c, msg, sizeof(msg), 20, c->hrt, NULL, c->hrt_phys, 0, c->hrt_len, 0);
-
- if(ret == -ETIMEDOUT)
- {
- /* The HRT block we used is in limbo somewhere. When the iop wakes up
- we will recover it */
- c->hrt = NULL;
- c->hrt_len = 0;
- return ret;
- }
-
- if(ret<0)
- {
- printk(KERN_ERR "%s: Unable to get HRT (status=%#x)\n",
- c->name, -ret);
- return ret;
- }
-
- if (c->hrt->num_entries * c->hrt->entry_len << 2 > c->hrt_len) {
- size = c->hrt->num_entries * c->hrt->entry_len << 2;
- pci_free_consistent(c->pdev, c->hrt_len, c->hrt, c->hrt_phys);
- c->hrt_len = 0;
- c->hrt = NULL;
- }
- loops --;
- } while (c->hrt == NULL && loops > 0);
-
- if(c->hrt == NULL)
- {
- printk(KERN_ERR "%s: Unable to get HRT after three tries, giving up\n", c->name);
- return -1;
- }
-
- i2o_parse_hrt(c); // just for debugging
-
- return 0;
-}
-
-/*
- * Send the I2O System Table to the specified IOP
- *
- * The system table contains information about all the IOPs in the
- * system. It is build and then sent to each IOP so that IOPs can
- * establish connections between each other.
- *
- */
-static int i2o_systab_send(struct i2o_controller *iop)
-{
- u32 msg[12];
- dma_addr_t sys_tbl_phys;
- int ret;
- struct resource *root;
- u32 *privbuf = kmalloc(16, GFP_KERNEL);
- if(privbuf == NULL)
- return -ENOMEM;
-
-
- if(iop->status_block->current_mem_size < iop->status_block->desired_mem_size)
- {
- struct resource *res = &iop->mem_resource;
- res->name = iop->pdev->bus->name;
- res->flags = IORESOURCE_MEM;
- res->start = 0;
- res->end = 0;
- printk("%s: requires private memory resources.\n", iop->name);
- root = pci_find_parent_resource(iop->pdev, res);
- if(root==NULL)
- printk("Can't find parent resource!\n");
- if(root && allocate_resource(root, res,
- iop->status_block->desired_mem_size,
- iop->status_block->desired_mem_size,
- iop->status_block->desired_mem_size,
- 1<<20, /* Unspecified, so use 1Mb and play safe */
- NULL,
- NULL)>=0)
- {
- iop->mem_alloc = 1;
- iop->status_block->current_mem_size = 1 + res->end - res->start;
- iop->status_block->current_mem_base = res->start;
- printk(KERN_INFO "%s: allocated %ld bytes of PCI memory at 0x%08lX.\n",
- iop->name, 1+res->end-res->start, res->start);
- }
- }
- if(iop->status_block->current_io_size < iop->status_block->desired_io_size)
- {
- struct resource *res = &iop->io_resource;
- res->name = iop->pdev->bus->name;
- res->flags = IORESOURCE_IO;
- res->start = 0;
- res->end = 0;
- printk("%s: requires private memory resources.\n", iop->name);
- root = pci_find_parent_resource(iop->pdev, res);
- if(root==NULL)
- printk("Can't find parent resource!\n");
- if(root && allocate_resource(root, res,
- iop->status_block->desired_io_size,
- iop->status_block->desired_io_size,
- iop->status_block->desired_io_size,
- 1<<20, /* Unspecified, so use 1Mb and play safe */
- NULL,
- NULL)>=0)
- {
- iop->io_alloc = 1;
- iop->status_block->current_io_size = 1 + res->end - res->start;
- iop->status_block->current_mem_base = res->start;
- printk(KERN_INFO "%s: allocated %ld bytes of PCI I/O at 0x%08lX.\n",
- iop->name, 1+res->end-res->start, res->start);
- }
- }
- else
- {
- privbuf[0] = iop->status_block->current_mem_base;
- privbuf[1] = iop->status_block->current_mem_size;
- privbuf[2] = iop->status_block->current_io_base;
- privbuf[3] = iop->status_block->current_io_size;
- }
-
- msg[0] = I2O_MESSAGE_SIZE(12) | SGL_OFFSET_6;
- msg[1] = I2O_CMD_SYS_TAB_SET<<24 | HOST_TID<<12 | ADAPTER_TID;
- msg[3] = 0;
- msg[4] = (0<<16) | ((iop->unit+2) ); /* Host 0 IOP ID (unit + 2) */
- msg[5] = 0; /* Segment 0 */
-
- /*
- * Provide three SGL-elements:
- * System table (SysTab), Private memory space declaration and
- * Private i/o space declaration
- *
- * Nasty one here. We can't use pci_alloc_consistent to send the
- * same table to everyone. We have to go remap it for them all
- */
-
- sys_tbl_phys = pci_map_single(iop->pdev, sys_tbl, sys_tbl_len, PCI_DMA_TODEVICE);
- msg[6] = 0x54000000 | sys_tbl_phys;
-
- msg[7] = sys_tbl_phys;
- msg[8] = 0x54000000 | privbuf[1];
- msg[9] = privbuf[0];
- msg[10] = 0xD4000000 | privbuf[3];
- msg[11] = privbuf[2];
-
- ret=i2o_post_wait(iop, msg, sizeof(msg), 120);
-
- pci_unmap_single(iop->pdev, sys_tbl_phys, sys_tbl_len, PCI_DMA_TODEVICE);
-
- if(ret==-ETIMEDOUT)
- {
- printk(KERN_ERR "%s: SysTab setup timed out.\n", iop->name);
- }
- else if(ret<0)
- {
- printk(KERN_ERR "%s: Unable to set SysTab (status=%#x).\n",
- iop->name, -ret);
- }
- else
- {
- dprintk(KERN_INFO "%s: SysTab set.\n", iop->name);
- }
- i2o_status_get(iop); // Entered READY state
-
- kfree(privbuf);
- return ret;
-
- }
-
-/*
- * Initialize I2O subsystem.
- */
-void __init i2o_sys_init(void)
-{
- struct i2o_controller *iop, *niop = NULL;
-
- printk(KERN_INFO "Activating I2O controllers...\n");
- printk(KERN_INFO "This may take a few minutes if there are many devices\n");
-
- /* In INIT state, Activate IOPs */
- for (iop = i2o_controller_chain; iop; iop = niop) {
- dprintk(KERN_INFO "Calling i2o_activate_controller for %s...\n",
- iop->name);
- niop = iop->next;
- if (i2o_activate_controller(iop) < 0)
- i2o_delete_controller(iop);
- }
-
- /* Active IOPs in HOLD state */
-
-rebuild_sys_tab:
- if (i2o_controller_chain == NULL)
- return;
-
- /*
- * If build_sys_table fails, we kill everything and bail
- * as we can't init the IOPs w/o a system table
- */
- dprintk(KERN_INFO "i2o_core: Calling i2o_build_sys_table...\n");
- if (i2o_build_sys_table() < 0) {
- i2o_sys_shutdown();
- return;
- }
-
- /* If IOP don't get online, we need to rebuild the System table */
- for (iop = i2o_controller_chain; iop; iop = niop) {
- niop = iop->next;
- dprintk(KERN_INFO "Calling i2o_online_controller for %s...\n", iop->name);
- if (i2o_online_controller(iop) < 0) {
- i2o_delete_controller(iop);
- goto rebuild_sys_tab;
- }
- }
-
- /* Active IOPs now in OPERATIONAL state */
-
- /*
- * Register for status updates from all IOPs
- */
- for(iop = i2o_controller_chain; iop; iop=iop->next) {
-
- /* Create a kernel thread to deal with dynamic LCT updates */
- iop->lct_pid = kernel_thread(i2o_dyn_lct, iop, CLONE_SIGHAND);
-
- /* Update change ind on DLCT */
- iop->dlct->change_ind = iop->lct->change_ind;
-
- /* Start dynamic LCT updates */
- i2o_lct_notify(iop);
-
- /* Register for all events from IRTOS */
- i2o_event_register(iop, core_context, 0, 0, 0xFFFFFFFF);
- }
-}
-
-/**
- * i2o_sys_shutdown - shutdown I2O system
- *
- * Bring down each i2o controller and then return. Each controller
- * is taken through an orderly shutdown
- */
-
-static void i2o_sys_shutdown(void)
-{
- struct i2o_controller *iop, *niop;
-
- /* Delete all IOPs from the controller chain */
- /* that will reset all IOPs too */
-
- for (iop = i2o_controller_chain; iop; iop = niop) {
- niop = iop->next;
- i2o_delete_controller(iop);
- }
-}
-
-/**
- * i2o_activate_controller - bring controller up to HOLD
- * @iop: controller
- *
- * This function brings an I2O controller into HOLD state. The adapter
- * is reset if necessary and then the queues and resource table
- * are read. -1 is returned on a failure, 0 on success.
- *
- */
-
-int i2o_activate_controller(struct i2o_controller *iop)
-{
- /* In INIT state, Wait Inbound Q to initialize (in i2o_status_get) */
- /* In READY state, Get status */
-
- if (i2o_status_get(iop) < 0) {
- printk(KERN_INFO "Unable to obtain status of %s, "
- "attempting a reset.\n", iop->name);
- if (i2o_reset_controller(iop) < 0)
- return -1;
- }
-
- if(iop->status_block->iop_state == ADAPTER_STATE_FAULTED) {
- printk(KERN_CRIT "%s: hardware fault\n", iop->name);
- return -1;
- }
-
- if (iop->status_block->i2o_version > I2OVER15) {
- printk(KERN_ERR "%s: Not running vrs. 1.5. of the I2O Specification.\n",
- iop->name);
- return -1;
- }
-
- if (iop->status_block->iop_state == ADAPTER_STATE_READY ||
- iop->status_block->iop_state == ADAPTER_STATE_OPERATIONAL ||
- iop->status_block->iop_state == ADAPTER_STATE_HOLD ||
- iop->status_block->iop_state == ADAPTER_STATE_FAILED)
- {
- dprintk(KERN_INFO "%s: Already running, trying to reset...\n",
- iop->name);
- if (i2o_reset_controller(iop) < 0)
- return -1;
- }
-
- if (i2o_init_outbound_q(iop) < 0)
- return -1;
-
- if (i2o_post_outbound_messages(iop))
- return -1;
-
- /* In HOLD state */
-
- if (i2o_hrt_get(iop) < 0)
- return -1;
-
- return 0;
-}
-
-
-/**
- * i2o_init_outbound_queue - setup the outbound queue
- * @c: controller
- *
- * Clear and (re)initialize IOP's outbound queue. Returns 0 on
- * success or a negative errno code on a failure.
- */
-
-int i2o_init_outbound_q(struct i2o_controller *c)
-{
- u8 *status;
- dma_addr_t status_phys;
- u32 m;
- u32 *msg;
- u32 time;
-
- dprintk(KERN_INFO "%s: Initializing Outbound Queue...\n", c->name);
- m=i2o_wait_message(c, "OutboundInit");
- if(m==0xFFFFFFFF)
- return -ETIMEDOUT;
- msg=(u32 *)(c->msg_virt+m);
-
- status = pci_alloc_consistent(c->pdev, 4, &status_phys);
- if (status==NULL) {
- printk(KERN_ERR "%s: Outbound Queue initialization failed - no free memory.\n",
- c->name);
- return -ENOMEM;
- }
- memset(status, 0, 4);
-
- msg[0]= EIGHT_WORD_MSG_SIZE| TRL_OFFSET_6;
- msg[1]= I2O_CMD_OUTBOUND_INIT<<24 | HOST_TID<<12 | ADAPTER_TID;
- msg[2]= core_context;
- msg[3]= 0x0106; /* Transaction context */
- msg[4]= 4096; /* Host page frame size */
- /* Frame size is in words. 256 bytes a frame for now */
- msg[5]= MSG_FRAME_SIZE<<16|0x80; /* Outbound msg frame size in words and Initcode */
- msg[6]= 0xD0000004; /* Simple SG LE, EOB */
- msg[7]= status_phys;
-
- i2o_post_message(c,m);
-
- barrier();
- time=jiffies;
- while(status[0] < I2O_CMD_REJECTED)
- {
- if((jiffies-time)>=30*HZ)
- {
- if(status[0]==0x00)
- printk(KERN_ERR "%s: Ignored queue initialize request.\n",
- c->name);
- else
- printk(KERN_ERR "%s: Outbound queue initialize timeout.\n",
- c->name);
- pci_free_consistent(c->pdev, 4, status, status_phys);
- return -ETIMEDOUT;
- }
- yield();
- barrier();
- }
-
- if(status[0] != I2O_CMD_COMPLETED)
- {
- printk(KERN_ERR "%s: IOP outbound initialise failed.\n", c->name);
- pci_free_consistent(c->pdev, 4, status, status_phys);
- return -ETIMEDOUT;
- }
- pci_free_consistent(c->pdev, 4, status, status_phys);
- return 0;
-}
-
-/**
- * i2o_post_outbound_messages - fill message queue
- * @c: controller
- *
- * Allocate a message frame and load the messages into the IOP. The
- * function returns zero on success or a negative errno code on
- * failure.
- */
-
-int i2o_post_outbound_messages(struct i2o_controller *c)
-{
- int i;
- u32 m;
- /* Alloc space for IOP's outbound queue message frames */
-
- c->page_frame = kmalloc(MSG_POOL_SIZE, GFP_KERNEL);
- if(c->page_frame==NULL) {
- printk(KERN_ERR "%s: Outbound Q initialize failed; out of memory.\n",
- c->name);
- return -ENOMEM;
- }
-
- c->page_frame_map = pci_map_single(c->pdev, c->page_frame, MSG_POOL_SIZE, PCI_DMA_FROMDEVICE);
-
- if(c->page_frame_map == 0)
- {
- kfree(c->page_frame);
- printk(KERN_ERR "%s: Unable to map outbound queue.\n", c->name);
- return -ENOMEM;
- }
-
- m = c->page_frame_map;
-
- /* Post frames */
-
- for(i=0; i< NMBR_MSG_FRAMES; i++) {
- I2O_REPLY_WRITE32(c,m);
- mb();
- m += (MSG_FRAME_SIZE << 2);
- }
-
- return 0;
-}
-
-/*
- * Get the IOP's Logical Configuration Table
- */
-int i2o_lct_get(struct i2o_controller *c)
-{
- u32 msg[8];
- int ret, size = c->status_block->expected_lct_size;
-
- do {
- if (c->lct == NULL) {
- c->lct = pci_alloc_consistent(c->pdev, size, &c->lct_phys);
- if(c->lct == NULL) {
- printk(KERN_CRIT "%s: Lct Get failed. Out of memory.\n",
- c->name);
- return -ENOMEM;
- }
- }
- memset(c->lct, 0, size);
-
- msg[0] = EIGHT_WORD_MSG_SIZE|SGL_OFFSET_6;
- msg[1] = I2O_CMD_LCT_NOTIFY<<24 | HOST_TID<<12 | ADAPTER_TID;
- /* msg[2] filled in i2o_post_wait */
- msg[3] = 0;
- msg[4] = 0xFFFFFFFF; /* All devices */
- msg[5] = 0x00000000; /* Report now */
- msg[6] = 0xD0000000|size;
- msg[7] = c->lct_phys;
-
- ret=i2o_post_wait_mem(c, msg, sizeof(msg), 120, c->lct, NULL, c->lct_phys, 0, size, 0);
-
- if(ret == -ETIMEDOUT)
- {
- c->lct = NULL;
- return ret;
- }
-
- if(ret<0)
- {
- printk(KERN_ERR "%s: LCT Get failed (status=%#x.\n",
- c->name, -ret);
- return ret;
- }
-
- if (c->lct->table_size << 2 > size) {
- int new_size = c->lct->table_size << 2;
- pci_free_consistent(c->pdev, size, c->lct, c->lct_phys);
- size = new_size;
- c->lct = NULL;
- }
- } while (c->lct == NULL);
-
- if ((ret=i2o_parse_lct(c)) < 0)
- return ret;
-
- return 0;
-}
-
-/*
- * Like above, but used for async notification. The main
- * difference is that we keep track of the CurrentChangeIndiicator
- * so that we only get updates when it actually changes.
- *
- */
-int i2o_lct_notify(struct i2o_controller *c)
-{
- u32 msg[8];
-
- msg[0] = EIGHT_WORD_MSG_SIZE|SGL_OFFSET_6;
- msg[1] = I2O_CMD_LCT_NOTIFY<<24 | HOST_TID<<12 | ADAPTER_TID;
- msg[2] = core_context;
- msg[3] = 0xDEADBEEF;
- msg[4] = 0xFFFFFFFF; /* All devices */
- msg[5] = c->dlct->change_ind+1; /* Next change */
- msg[6] = 0xD0000000|8192;
- msg[7] = c->dlct_phys;
-
- return i2o_post_this(c, msg, sizeof(msg));
-}
-
-/*
- * Bring a controller online into OPERATIONAL state.
- */
-
-int i2o_online_controller(struct i2o_controller *iop)
-{
- u32 v;
-
- if (i2o_systab_send(iop) < 0)
- return -1;
-
- /* In READY state */
-
- dprintk(KERN_INFO "%s: Attempting to enable...\n", iop->name);
- if (i2o_enable_controller(iop) < 0)
- return -1;
-
- /* In OPERATIONAL state */
-
- dprintk(KERN_INFO "%s: Attempting to get/parse lct...\n", iop->name);
- if (i2o_lct_get(iop) < 0)
- return -1;
-
- /* Check battery status */
-
- iop->battery = 0;
- if(i2o_query_scalar(iop, ADAPTER_TID, 0x0000, 4, &v, 4)>=0)
- {
- if(v&16)
- iop->battery = 1;
- }
-
- return 0;
-}
-
-/*
- * Build system table
- *
- * The system table contains information about all the IOPs in the
- * system (duh) and is used by the Executives on the IOPs to establish
- * peer2peer connections. We're not supporting peer2peer at the moment,
- * but this will be needed down the road for things like lan2lan forwarding.
- */
-static int i2o_build_sys_table(void)
-{
- struct i2o_controller *iop = NULL;
- struct i2o_controller *niop = NULL;
- int count = 0;
-
- sys_tbl_len = sizeof(struct i2o_sys_tbl) + // Header + IOPs
- (i2o_num_controllers) *
- sizeof(struct i2o_sys_tbl_entry);
-
- if(sys_tbl)
- kfree(sys_tbl);
-
- sys_tbl = kmalloc(sys_tbl_len, GFP_KERNEL);
- if(!sys_tbl) {
- printk(KERN_CRIT "SysTab Set failed. Out of memory.\n");
- return -ENOMEM;
- }
- memset((void*)sys_tbl, 0, sys_tbl_len);
-
- sys_tbl->num_entries = i2o_num_controllers;
- sys_tbl->version = I2OVERSION; /* TODO: Version 2.0 */
- sys_tbl->change_ind = sys_tbl_ind++;
-
- for(iop = i2o_controller_chain; iop; iop = niop)
- {
- niop = iop->next;
-
- /*
- * Get updated IOP state so we have the latest information
- *
- * We should delete the controller at this point if it
- * doesn't respond since if it's not on the system table
- * it is techninically not part of the I2O subsyßtem...
- */
- if(i2o_status_get(iop)) {
- printk(KERN_ERR "%s: Deleting b/c could not get status while"
- "attempting to build system table\n", iop->name);
- i2o_delete_controller(iop);
- sys_tbl->num_entries--;
- continue; // try the next one
- }
-
- sys_tbl->iops[count].org_id = iop->status_block->org_id;
- sys_tbl->iops[count].iop_id = iop->unit + 2;
- sys_tbl->iops[count].seg_num = 0;
- sys_tbl->iops[count].i2o_version =
- iop->status_block->i2o_version;
- sys_tbl->iops[count].iop_state =
- iop->status_block->iop_state;
- sys_tbl->iops[count].msg_type =
- iop->status_block->msg_type;
- sys_tbl->iops[count].frame_size =
- iop->status_block->inbound_frame_size;
- sys_tbl->iops[count].last_changed = sys_tbl_ind - 1; // ??
- sys_tbl->iops[count].iop_capabilities =
- iop->status_block->iop_capabilities;
- sys_tbl->iops[count].inbound_low = (u32)iop->post_port;
- sys_tbl->iops[count].inbound_high = 0; // FIXME: 64-bit support
-
- count++;
- }
-
-#ifdef DRIVERDEBUG
-{
- u32 *table;
- table = (u32*)sys_tbl;
- for(count = 0; count < (sys_tbl_len >>2); count++)
- printk(KERN_INFO "sys_tbl[%d] = %0#10x\n", count, table[count]);
-}
-#endif
-
- return 0;
-}
-
-
-/*
- * Run time support routines
- */
-
-/*
- * Generic "post and forget" helpers. This is less efficient - we do
- * a memcpy for example that isnt strictly needed, but for most uses
- * this is simply not worth optimising
- */
-
-int i2o_post_this(struct i2o_controller *c, u32 *data, int len)
-{
- u32 m;
- u32 *msg;
- unsigned long t=jiffies;
-
- do
- {
- mb();
- m = I2O_POST_READ32(c);
- }
- while(m==0xFFFFFFFF && (jiffies-t)<HZ);
-
- if(m==0xFFFFFFFF)
- {
- printk(KERN_ERR "%s: Timeout waiting for message frame!\n",
- c->name);
- return -ETIMEDOUT;
- }
- msg = (u32 *)(c->msg_virt + m);
- memcpy_toio(msg, data, len);
- i2o_post_message(c,m);
- return 0;
-}
-
-/**
- * i2o_post_wait_mem - I2O query/reply with DMA buffers
- * @c: controller
- * @msg: message to send
- * @len: length of message
- * @timeout: time in seconds to wait
- * @mem1: attached memory buffer 1
- * @mem2: attached memory buffer 2
- * @phys1: physical address of buffer 1
- * @phys2: physical address of buffer 2
- * @size1: size of buffer 1
- * @size2: size of buffer 2
- *
- * This core API allows an OSM to post a message and then be told whether
- * or not the system received a successful reply.
- *
- * If the message times out then the value '-ETIMEDOUT' is returned. This
- * is a special case. In this situation the message may (should) complete
- * at an indefinite time in the future. When it completes it will use the
- * memory buffers attached to the request. If -ETIMEDOUT is returned then
- * the memory buffers must not be freed. Instead the event completion will
- * free them for you. In all other cases the buffers are your problem.
- *
- * Pass NULL for unneeded buffers.
- */
-
-int i2o_post_wait_mem(struct i2o_controller *c, u32 *msg, int len, int timeout, void *mem1, void *mem2, dma_addr_t phys1, dma_addr_t phys2, int size1, int size2)
-{
- DECLARE_WAIT_QUEUE_HEAD(wq_i2o_post);
- DECLARE_WAITQUEUE(wait, current);
- int complete = 0;
- int status;
- unsigned long flags = 0;
- struct i2o_post_wait_data *wait_data =
- kmalloc(sizeof(struct i2o_post_wait_data), GFP_KERNEL);
-
- if(!wait_data)
- return -ENOMEM;
-
- /*
- * Create a new notification object
- */
- wait_data->status = &status;
- wait_data->complete = &complete;
- wait_data->mem[0] = mem1;
- wait_data->mem[1] = mem2;
- wait_data->phys[0] = phys1;
- wait_data->phys[1] = phys2;
- wait_data->size[0] = size1;
- wait_data->size[1] = size2;
-
- /*
- * Queue the event with its unique id
- */
- spin_lock_irqsave(&post_wait_lock, flags);
-
- wait_data->next = post_wait_queue;
- post_wait_queue = wait_data;
- wait_data->id = (++post_wait_id) & 0x7fff;
- wait_data->wq = &wq_i2o_post;
-
- spin_unlock_irqrestore(&post_wait_lock, flags);
-
- /*
- * Fill in the message id
- */
-
- msg[2] = 0x80000000|(u32)core_context|((u32)wait_data->id<<16);
-
- /*
- * Post the message to the controller. At some point later it
- * will return. If we time out before it returns then
- * complete will be zero. From the point post_this returns
- * the wait_data may have been deleted.
- */
-
- add_wait_queue(&wq_i2o_post, &wait);
- set_current_state(TASK_INTERRUPTIBLE);
- if ((status = i2o_post_this(c, msg, len))==0) {
- schedule_timeout(HZ * timeout);
- }
- else
- {
- remove_wait_queue(&wq_i2o_post, &wait);
- return -EIO;
- }
- remove_wait_queue(&wq_i2o_post, &wait);
-
- if(signal_pending(current))
- status = -EINTR;
-
- spin_lock_irqsave(&post_wait_lock, flags);
- barrier(); /* Be sure we see complete as it is locked */
- if(!complete)
- {
- /*
- * Mark the entry dead. We cannot remove it. This is important.
- * When it does terminate (which it must do if the controller hasnt
- * died..) then it will otherwise scribble on stuff.
- * !complete lets us safely check if the entry is still
- * allocated and thus we can write into it
- */
- wait_data->wq = NULL;
- status = -ETIMEDOUT;
- }
- else
- {
- /* Debugging check - remove me soon */
- if(status == -ETIMEDOUT)
- {
- printk("TIMEDOUT BUG!\n");
- status = -EIO;
- }
- }
- /* And the wait_data is not leaked either! */
- spin_unlock_irqrestore(&post_wait_lock, flags);
- return status;
-}
-
-/**
- * i2o_post_wait - I2O query/reply
- * @c: controller
- * @msg: message to send
- * @len: length of message
- * @timeout: time in seconds to wait
- *
- * This core API allows an OSM to post a message and then be told whether
- * or not the system received a successful reply.
- */
-
-int i2o_post_wait(struct i2o_controller *c, u32 *msg, int len, int timeout)
-{
- return i2o_post_wait_mem(c, msg, len, timeout, NULL, NULL, 0, 0, 0, 0);
-}
-
-/*
- * i2o_post_wait is completed and we want to wake up the
- * sleeping proccess. Called by core's reply handler.
- */
-
-static void i2o_post_wait_complete(struct i2o_controller *c, u32 context, int status)
-{
- struct i2o_post_wait_data **p1, *q;
- unsigned long flags;
-
- /*
- * We need to search through the post_wait
- * queue to see if the given message is still
- * outstanding. If not, it means that the IOP
- * took longer to respond to the message than we
- * had allowed and timer has already expired.
- * Not much we can do about that except log
- * it for debug purposes, increase timeout, and recompile
- *
- * Lock needed to keep anyone from moving queue pointers
- * around while we're looking through them.
- */
-
- spin_lock_irqsave(&post_wait_lock, flags);
-
- for(p1 = &post_wait_queue; *p1!=NULL; p1 = &((*p1)->next))
- {
- q = (*p1);
- if(q->id == ((context >> 16) & 0x7fff)) {
- /*
- * Delete it
- */
-
- *p1 = q->next;
-
- /*
- * Live or dead ?
- */
-
- if(q->wq)
- {
- /* Live entry - wakeup and set status */
- *q->status = status;
- *q->complete = 1;
- wake_up(q->wq);
- }
- else
- {
- /*
- * Free resources. Caller is dead
- */
-
- if(q->mem[0])
- pci_free_consistent(c->pdev, q->size[0], q->mem[0], q->phys[0]);
- if(q->mem[1])
- pci_free_consistent(c->pdev, q->size[1], q->mem[1], q->phys[1]);
-
- printk(KERN_WARNING "i2o_post_wait event completed after timeout.\n");
- }
- kfree(q);
- spin_unlock(&post_wait_lock);
- return;
- }
- }
- spin_unlock(&post_wait_lock);
-
- printk(KERN_DEBUG "i2o_post_wait: Bogus reply!\n");
-}
-
-/* Issue UTIL_PARAMS_GET or UTIL_PARAMS_SET
- *
- * This function can be used for all UtilParamsGet/Set operations.
- * The OperationList is given in oplist-buffer,
- * and results are returned in reslist-buffer.
- * Note that the minimum sized reslist is 8 bytes and contains
- * ResultCount, ErrorInfoSize, BlockStatus and BlockSize.
- */
-
-int i2o_issue_params(int cmd, struct i2o_controller *iop, int tid,
- void *oplist, int oplen, void *reslist, int reslen)
-{
- u32 msg[9];
- u32 *res32 = (u32*)reslist;
- u32 *restmp = (u32*)reslist;
- int len = 0;
- int i = 0;
- int wait_status;
- u32 *opmem, *resmem;
- dma_addr_t opmem_phys, resmem_phys;
-
- /* Get DMAable memory */
- opmem = pci_alloc_consistent(iop->pdev, oplen, &opmem_phys);
- if(opmem == NULL)
- return -ENOMEM;
- memcpy(opmem, oplist, oplen);
-
- resmem = pci_alloc_consistent(iop->pdev, reslen, &resmem_phys);
- if(resmem == NULL)
- {
- pci_free_consistent(iop->pdev, oplen, opmem, opmem_phys);
- return -ENOMEM;
- }
-
- msg[0] = NINE_WORD_MSG_SIZE | SGL_OFFSET_5;
- msg[1] = cmd << 24 | HOST_TID << 12 | tid;
- msg[3] = 0;
- msg[4] = 0;
- msg[5] = 0x54000000 | oplen; /* OperationList */
- msg[6] = opmem_phys;
- msg[7] = 0xD0000000 | reslen; /* ResultList */
- msg[8] = resmem_phys;
-
- wait_status = i2o_post_wait_mem(iop, msg, sizeof(msg), 10, opmem, resmem, opmem_phys, resmem_phys, oplen, reslen);
-
- /*
- * This only looks like a memory leak - don't "fix" it.
- */
- if(wait_status == -ETIMEDOUT)
- return wait_status;
-
- memcpy(reslist, resmem, reslen);
- pci_free_consistent(iop->pdev, reslen, resmem, resmem_phys);
- pci_free_consistent(iop->pdev, oplen, opmem, opmem_phys);
-
- /* Query failed */
- if(wait_status != 0)
- return wait_status;
- /*
- * Calculate number of bytes of Result LIST
- * We need to loop through each Result BLOCK and grab the length
- */
- restmp = res32 + 1;
- len = 1;
- for(i = 0; i < (res32[0]&0X0000FFFF); i++)
- {
- if(restmp[0]&0x00FF0000) /* BlockStatus != SUCCESS */
- {
- printk(KERN_WARNING "%s - Error:\n ErrorInfoSize = 0x%02x, "
- "BlockStatus = 0x%02x, BlockSize = 0x%04x\n",
- (cmd == I2O_CMD_UTIL_PARAMS_SET) ? "PARAMS_SET"
- : "PARAMS_GET",
- res32[1]>>24, (res32[1]>>16)&0xFF, res32[1]&0xFFFF);
-
- /*
- * If this is the only request,than we return an error
- */
- if((res32[0]&0x0000FFFF) == 1)
- {
- return -((res32[1] >> 16) & 0xFF); /* -BlockStatus */
- }
- }
- len += restmp[0] & 0x0000FFFF; /* Length of res BLOCK */
- restmp += restmp[0] & 0x0000FFFF; /* Skip to next BLOCK */
- }
- return (len << 2); /* bytes used by result list */
-}
-
-/*
- * Query one scalar group value or a whole scalar group.
- */
-int i2o_query_scalar(struct i2o_controller *iop, int tid,
- int group, int field, void *buf, int buflen)
-{
- u16 opblk[] = { 1, 0, I2O_PARAMS_FIELD_GET, group, 1, field };
- u8 resblk[8+buflen]; /* 8 bytes for header */
- int size;
-
- if (field == -1) /* whole group */
- opblk[4] = -1;
-
- size = i2o_issue_params(I2O_CMD_UTIL_PARAMS_GET, iop, tid,
- opblk, sizeof(opblk), resblk, sizeof(resblk));
-
- memcpy(buf, resblk+8, buflen); /* cut off header */
-
- if(size>buflen)
- return buflen;
- return size;
-}
-
-/*
- * Set a scalar group value or a whole group.
- */
-int i2o_set_scalar(struct i2o_controller *iop, int tid,
- int group, int field, void *buf, int buflen)
-{
- u16 *opblk;
- u8 resblk[8+buflen]; /* 8 bytes for header */
- int size;
-
- opblk = kmalloc(buflen+64, GFP_KERNEL);
- if (opblk == NULL)
- {
- printk(KERN_ERR "i2o: no memory for operation buffer.\n");
- return -ENOMEM;
- }
-
- opblk[0] = 1; /* operation count */
- opblk[1] = 0; /* pad */
- opblk[2] = I2O_PARAMS_FIELD_SET;
- opblk[3] = group;
-
- if(field == -1) { /* whole group */
- opblk[4] = -1;
- memcpy(opblk+5, buf, buflen);
- }
- else /* single field */
- {
- opblk[4] = 1;
- opblk[5] = field;
- memcpy(opblk+6, buf, buflen);
- }
-
- size = i2o_issue_params(I2O_CMD_UTIL_PARAMS_SET, iop, tid,
- opblk, 12+buflen, resblk, sizeof(resblk));
-
- kfree(opblk);
- if(size>buflen)
- return buflen;
- return size;
-}
-
-/*
- * if oper == I2O_PARAMS_TABLE_GET, get from all rows
- * if fieldcount == -1 return all fields
- * ibuf and ibuflen are unused (use NULL, 0)
- * else return specific fields
- * ibuf contains fieldindexes
- *
- * if oper == I2O_PARAMS_LIST_GET, get from specific rows
- * if fieldcount == -1 return all fields
- * ibuf contains rowcount, keyvalues
- * else return specific fields
- * fieldcount is # of fieldindexes
- * ibuf contains fieldindexes, rowcount, keyvalues
- *
- * You could also use directly function i2o_issue_params().
- */
-int i2o_query_table(int oper, struct i2o_controller *iop, int tid, int group,
- int fieldcount, void *ibuf, int ibuflen,
- void *resblk, int reslen)
-{
- u16 *opblk;
- int size;
-
- opblk = kmalloc(10 + ibuflen, GFP_KERNEL);
- if (opblk == NULL)
- {
- printk(KERN_ERR "i2o: no memory for query buffer.\n");
- return -ENOMEM;
- }
-
- opblk[0] = 1; /* operation count */
- opblk[1] = 0; /* pad */
- opblk[2] = oper;
- opblk[3] = group;
- opblk[4] = fieldcount;
- memcpy(opblk+5, ibuf, ibuflen); /* other params */
-
- size = i2o_issue_params(I2O_CMD_UTIL_PARAMS_GET,iop, tid,
- opblk, 10+ibuflen, resblk, reslen);
-
- kfree(opblk);
- if(size>reslen)
- return reslen;
- return size;
-}
-
-/*
- * Clear table group, i.e. delete all rows.
- */
-int i2o_clear_table(struct i2o_controller *iop, int tid, int group)
-{
- u16 opblk[] = { 1, 0, I2O_PARAMS_TABLE_CLEAR, group };
- u8 resblk[32]; /* min 8 bytes for result header */
-
- return i2o_issue_params(I2O_CMD_UTIL_PARAMS_SET, iop, tid,
- opblk, sizeof(opblk), resblk, sizeof(resblk));
-}
-
-/*
- * Add a new row into a table group.
- *
- * if fieldcount==-1 then we add whole rows
- * buf contains rowcount, keyvalues
- * else just specific fields are given, rest use defaults
- * buf contains fieldindexes, rowcount, keyvalues
- */
-int i2o_row_add_table(struct i2o_controller *iop, int tid,
- int group, int fieldcount, void *buf, int buflen)
-{
- u16 *opblk;
- u8 resblk[32]; /* min 8 bytes for header */
- int size;
-
- opblk = kmalloc(buflen+64, GFP_KERNEL);
- if (opblk == NULL)
- {
- printk(KERN_ERR "i2o: no memory for operation buffer.\n");
- return -ENOMEM;
- }
-
- opblk[0] = 1; /* operation count */
- opblk[1] = 0; /* pad */
- opblk[2] = I2O_PARAMS_ROW_ADD;
- opblk[3] = group;
- opblk[4] = fieldcount;
- memcpy(opblk+5, buf, buflen);
-
- size = i2o_issue_params(I2O_CMD_UTIL_PARAMS_SET, iop, tid,
- opblk, 10+buflen, resblk, sizeof(resblk));
-
- kfree(opblk);
- if(size>buflen)
- return buflen;
- return size;
-}
-
-
-/*
- * Used for error reporting/debugging purposes.
- * Following fail status are common to all classes.
- * The preserved message must be handled in the reply handler.
- */
-void i2o_report_fail_status(u8 req_status, u32* msg)
-{
- static char *FAIL_STATUS[] = {
- "0x80", /* not used */
- "SERVICE_SUSPENDED", /* 0x81 */
- "SERVICE_TERMINATED", /* 0x82 */
- "CONGESTION",
- "FAILURE",
- "STATE_ERROR",
- "TIME_OUT",
- "ROUTING_FAILURE",
- "INVALID_VERSION",
- "INVALID_OFFSET",
- "INVALID_MSG_FLAGS",
- "FRAME_TOO_SMALL",
- "FRAME_TOO_LARGE",
- "INVALID_TARGET_ID",
- "INVALID_INITIATOR_ID",
- "INVALID_INITIATOR_CONTEX", /* 0x8F */
- "UNKNOWN_FAILURE" /* 0xFF */
- };
-
- if (req_status == I2O_FSC_TRANSPORT_UNKNOWN_FAILURE)
- printk("TRANSPORT_UNKNOWN_FAILURE (%0#2x)\n.", req_status);
- else
- printk("TRANSPORT_%s.\n", FAIL_STATUS[req_status & 0x0F]);
-
- /* Dump some details */
-
- printk(KERN_ERR " InitiatorId = %d, TargetId = %d\n",
- (msg[1] >> 12) & 0xFFF, msg[1] & 0xFFF);
- printk(KERN_ERR " LowestVersion = 0x%02X, HighestVersion = 0x%02X\n",
- (msg[4] >> 8) & 0xFF, msg[4] & 0xFF);
- printk(KERN_ERR " FailingHostUnit = 0x%04X, FailingIOP = 0x%03X\n",
- msg[5] >> 16, msg[5] & 0xFFF);
-
- printk(KERN_ERR " Severity: 0x%02X ", (msg[4] >> 16) & 0xFF);
- if (msg[4] & (1<<16))
- printk("(FormatError), "
- "this msg can never be delivered/processed.\n");
- if (msg[4] & (1<<17))
- printk("(PathError), "
- "this msg can no longer be delivered/processed.\n");
- if (msg[4] & (1<<18))
- printk("(PathState), "
- "the system state does not allow delivery.\n");
- if (msg[4] & (1<<19))
- printk("(Congestion), resources temporarily not available;"
- "do not retry immediately.\n");
-}
-
-/*
- * Used for error reporting/debugging purposes.
- * Following reply status are common to all classes.
- */
-void i2o_report_common_status(u8 req_status)
-{
- static char *REPLY_STATUS[] = {
- "SUCCESS",
- "ABORT_DIRTY",
- "ABORT_NO_DATA_TRANSFER",
- "ABORT_PARTIAL_TRANSFER",
- "ERROR_DIRTY",
- "ERROR_NO_DATA_TRANSFER",
- "ERROR_PARTIAL_TRANSFER",
- "PROCESS_ABORT_DIRTY",
- "PROCESS_ABORT_NO_DATA_TRANSFER",
- "PROCESS_ABORT_PARTIAL_TRANSFER",
- "TRANSACTION_ERROR",
- "PROGRESS_REPORT"
- };
-
- if (req_status >= ARRAY_SIZE(REPLY_STATUS))
- printk("RequestStatus = %0#2x", req_status);
- else
- printk("%s", REPLY_STATUS[req_status]);
-}
-
-/*
- * Used for error reporting/debugging purposes.
- * Following detailed status are valid for executive class,
- * utility class, DDM class and for transaction error replies.
- */
-static void i2o_report_common_dsc(u16 detailed_status)
-{
- static char *COMMON_DSC[] = {
- "SUCCESS",
- "0x01", // not used
- "BAD_KEY",
- "TCL_ERROR",
- "REPLY_BUFFER_FULL",
- "NO_SUCH_PAGE",
- "INSUFFICIENT_RESOURCE_SOFT",
- "INSUFFICIENT_RESOURCE_HARD",
- "0x08", // not used
- "CHAIN_BUFFER_TOO_LARGE",
- "UNSUPPORTED_FUNCTION",
- "DEVICE_LOCKED",
- "DEVICE_RESET",
- "INAPPROPRIATE_FUNCTION",
- "INVALID_INITIATOR_ADDRESS",
- "INVALID_MESSAGE_FLAGS",
- "INVALID_OFFSET",
- "INVALID_PARAMETER",
- "INVALID_REQUEST",
- "INVALID_TARGET_ADDRESS",
- "MESSAGE_TOO_LARGE",
- "MESSAGE_TOO_SMALL",
- "MISSING_PARAMETER",
- "TIMEOUT",
- "UNKNOWN_ERROR",
- "UNKNOWN_FUNCTION",
- "UNSUPPORTED_VERSION",
- "DEVICE_BUSY",
- "DEVICE_NOT_AVAILABLE"
- };
-
- if (detailed_status > I2O_DSC_DEVICE_NOT_AVAILABLE)
- printk(" / DetailedStatus = %0#4x.\n", detailed_status);
- else
- printk(" / %s.\n", COMMON_DSC[detailed_status]);
-}
-
-/*
- * Used for error reporting/debugging purposes
- */
-static void i2o_report_lan_dsc(u16 detailed_status)
-{
- static char *LAN_DSC[] = { // Lan detailed status code strings
- "SUCCESS",
- "DEVICE_FAILURE",
- "DESTINATION_NOT_FOUND",
- "TRANSMIT_ERROR",
- "TRANSMIT_ABORTED",
- "RECEIVE_ERROR",
- "RECEIVE_ABORTED",
- "DMA_ERROR",
- "BAD_PACKET_DETECTED",
- "OUT_OF_MEMORY",
- "BUCKET_OVERRUN",
- "IOP_INTERNAL_ERROR",
- "CANCELED",
- "INVALID_TRANSACTION_CONTEXT",
- "DEST_ADDRESS_DETECTED",
- "DEST_ADDRESS_OMITTED",
- "PARTIAL_PACKET_RETURNED",
- "TEMP_SUSPENDED_STATE", // last Lan detailed status code
- "INVALID_REQUEST" // general detailed status code
- };
-
- if (detailed_status > I2O_DSC_INVALID_REQUEST)
- printk(" / %0#4x.\n", detailed_status);
- else
- printk(" / %s.\n", LAN_DSC[detailed_status]);
-}
-
-/*
- * Used for error reporting/debugging purposes
- */
-static void i2o_report_util_cmd(u8 cmd)
-{
- switch (cmd) {
- case I2O_CMD_UTIL_NOP:
- printk("UTIL_NOP, ");
- break;
- case I2O_CMD_UTIL_ABORT:
- printk("UTIL_ABORT, ");
- break;
- case I2O_CMD_UTIL_CLAIM:
- printk("UTIL_CLAIM, ");
- break;
- case I2O_CMD_UTIL_RELEASE:
- printk("UTIL_CLAIM_RELEASE, ");
- break;
- case I2O_CMD_UTIL_CONFIG_DIALOG:
- printk("UTIL_CONFIG_DIALOG, ");
- break;
- case I2O_CMD_UTIL_DEVICE_RESERVE:
- printk("UTIL_DEVICE_RESERVE, ");
- break;
- case I2O_CMD_UTIL_DEVICE_RELEASE:
- printk("UTIL_DEVICE_RELEASE, ");
- break;
- case I2O_CMD_UTIL_EVT_ACK:
- printk("UTIL_EVENT_ACKNOWLEDGE, ");
- break;
- case I2O_CMD_UTIL_EVT_REGISTER:
- printk("UTIL_EVENT_REGISTER, ");
- break;
- case I2O_CMD_UTIL_LOCK:
- printk("UTIL_LOCK, ");
- break;
- case I2O_CMD_UTIL_LOCK_RELEASE:
- printk("UTIL_LOCK_RELEASE, ");
- break;
- case I2O_CMD_UTIL_PARAMS_GET:
- printk("UTIL_PARAMS_GET, ");
- break;
- case I2O_CMD_UTIL_PARAMS_SET:
- printk("UTIL_PARAMS_SET, ");
- break;
- case I2O_CMD_UTIL_REPLY_FAULT_NOTIFY:
- printk("UTIL_REPLY_FAULT_NOTIFY, ");
- break;
- default:
- printk("Cmd = %0#2x, ",cmd);
- }
-}
-
-/*
- * Used for error reporting/debugging purposes
- */
-static void i2o_report_exec_cmd(u8 cmd)
-{
- switch (cmd) {
- case I2O_CMD_ADAPTER_ASSIGN:
- printk("EXEC_ADAPTER_ASSIGN, ");
- break;
- case I2O_CMD_ADAPTER_READ:
- printk("EXEC_ADAPTER_READ, ");
- break;
- case I2O_CMD_ADAPTER_RELEASE:
- printk("EXEC_ADAPTER_RELEASE, ");
- break;
- case I2O_CMD_BIOS_INFO_SET:
- printk("EXEC_BIOS_INFO_SET, ");
- break;
- case I2O_CMD_BOOT_DEVICE_SET:
- printk("EXEC_BOOT_DEVICE_SET, ");
- break;
- case I2O_CMD_CONFIG_VALIDATE:
- printk("EXEC_CONFIG_VALIDATE, ");
- break;
- case I2O_CMD_CONN_SETUP:
- printk("EXEC_CONN_SETUP, ");
- break;
- case I2O_CMD_DDM_DESTROY:
- printk("EXEC_DDM_DESTROY, ");
- break;
- case I2O_CMD_DDM_ENABLE:
- printk("EXEC_DDM_ENABLE, ");
- break;
- case I2O_CMD_DDM_QUIESCE:
- printk("EXEC_DDM_QUIESCE, ");
- break;
- case I2O_CMD_DDM_RESET:
- printk("EXEC_DDM_RESET, ");
- break;
- case I2O_CMD_DDM_SUSPEND:
- printk("EXEC_DDM_SUSPEND, ");
- break;
- case I2O_CMD_DEVICE_ASSIGN:
- printk("EXEC_DEVICE_ASSIGN, ");
- break;
- case I2O_CMD_DEVICE_RELEASE:
- printk("EXEC_DEVICE_RELEASE, ");
- break;
- case I2O_CMD_HRT_GET:
- printk("EXEC_HRT_GET, ");
- break;
- case I2O_CMD_ADAPTER_CLEAR:
- printk("EXEC_IOP_CLEAR, ");
- break;
- case I2O_CMD_ADAPTER_CONNECT:
- printk("EXEC_IOP_CONNECT, ");
- break;
- case I2O_CMD_ADAPTER_RESET:
- printk("EXEC_IOP_RESET, ");
- break;
- case I2O_CMD_LCT_NOTIFY:
- printk("EXEC_LCT_NOTIFY, ");
- break;
- case I2O_CMD_OUTBOUND_INIT:
- printk("EXEC_OUTBOUND_INIT, ");
- break;
- case I2O_CMD_PATH_ENABLE:
- printk("EXEC_PATH_ENABLE, ");
- break;
- case I2O_CMD_PATH_QUIESCE:
- printk("EXEC_PATH_QUIESCE, ");
- break;
- case I2O_CMD_PATH_RESET:
- printk("EXEC_PATH_RESET, ");
- break;
- case I2O_CMD_STATIC_MF_CREATE:
- printk("EXEC_STATIC_MF_CREATE, ");
- break;
- case I2O_CMD_STATIC_MF_RELEASE:
- printk("EXEC_STATIC_MF_RELEASE, ");
- break;
- case I2O_CMD_STATUS_GET:
- printk("EXEC_STATUS_GET, ");
- break;
- case I2O_CMD_SW_DOWNLOAD:
- printk("EXEC_SW_DOWNLOAD, ");
- break;
- case I2O_CMD_SW_UPLOAD:
- printk("EXEC_SW_UPLOAD, ");
- break;
- case I2O_CMD_SW_REMOVE:
- printk("EXEC_SW_REMOVE, ");
- break;
- case I2O_CMD_SYS_ENABLE:
- printk("EXEC_SYS_ENABLE, ");
- break;
- case I2O_CMD_SYS_MODIFY:
- printk("EXEC_SYS_MODIFY, ");
- break;
- case I2O_CMD_SYS_QUIESCE:
- printk("EXEC_SYS_QUIESCE, ");
- break;
- case I2O_CMD_SYS_TAB_SET:
- printk("EXEC_SYS_TAB_SET, ");
- break;
- default:
- printk("Cmd = %#02x, ",cmd);
- }
-}
-
-/*
- * Used for error reporting/debugging purposes
- */
-static void i2o_report_lan_cmd(u8 cmd)
-{
- switch (cmd) {
- case LAN_PACKET_SEND:
- printk("LAN_PACKET_SEND, ");
- break;
- case LAN_SDU_SEND:
- printk("LAN_SDU_SEND, ");
- break;
- case LAN_RECEIVE_POST:
- printk("LAN_RECEIVE_POST, ");
- break;
- case LAN_RESET:
- printk("LAN_RESET, ");
- break;
- case LAN_SUSPEND:
- printk("LAN_SUSPEND, ");
- break;
- default:
- printk("Cmd = %0#2x, ",cmd);
- }
-}
-
-/*
- * Used for error reporting/debugging purposes.
- * Report Cmd name, Request status, Detailed Status.
- */
-void i2o_report_status(const char *severity, const char *str, u32 *msg)
-{
- u8 cmd = (msg[1]>>24)&0xFF;
- u8 req_status = (msg[4]>>24)&0xFF;
- u16 detailed_status = msg[4]&0xFFFF;
- struct i2o_handler *h = i2o_handlers[msg[2] & (MAX_I2O_MODULES-1)];
-
- if (cmd == I2O_CMD_UTIL_EVT_REGISTER)
- return; // No status in this reply
-
- printk("%s%s: ", severity, str);
-
- if (cmd < 0x1F) // Utility cmd
- i2o_report_util_cmd(cmd);
-
- else if (cmd >= 0xA0 && cmd <= 0xEF) // Executive cmd
- i2o_report_exec_cmd(cmd);
-
- else if (h->class == I2O_CLASS_LAN && cmd >= 0x30 && cmd <= 0x3F)
- i2o_report_lan_cmd(cmd); // LAN cmd
- else
- printk("Cmd = %0#2x, ", cmd); // Other cmds
-
- if (msg[0] & MSG_FAIL) {
- i2o_report_fail_status(req_status, msg);
- return;
- }
-
- i2o_report_common_status(req_status);
-
- if (cmd < 0x1F || (cmd >= 0xA0 && cmd <= 0xEF))
- i2o_report_common_dsc(detailed_status);
- else if (h->class == I2O_CLASS_LAN && cmd >= 0x30 && cmd <= 0x3F)
- i2o_report_lan_dsc(detailed_status);
- else
- printk(" / DetailedStatus = %0#4x.\n", detailed_status);
-}
-
-/* Used to dump a message to syslog during debugging */
-void i2o_dump_message(u32 *msg)
-{
-#ifdef DRIVERDEBUG
- int i;
- printk(KERN_INFO "Dumping I2O message size %d @ %p\n",
- msg[0]>>16&0xffff, msg);
- for(i = 0; i < ((msg[0]>>16)&0xffff); i++)
- printk(KERN_INFO " msg[%d] = %0#10x\n", i, msg[i]);
-#endif
-}
-
-/*
- * I2O reboot/shutdown notification.
- *
- * - Call each OSM's reboot notifier (if one exists)
- * - Quiesce each IOP in the system
- *
- * Each IOP has to be quiesced before we can ensure that the system
- * can be properly shutdown as a transaction that has already been
- * acknowledged still needs to be placed in permanent store on the IOP.
- * The SysQuiesce causes the IOP to force all HDMs to complete their
- * transactions before returning, so only at that point is it safe
- *
- */
-static int i2o_reboot_event(struct notifier_block *n, unsigned long code, void
-*p)
-{
- int i = 0;
- struct i2o_controller *c = NULL;
-
- if(code != SYS_RESTART && code != SYS_HALT && code != SYS_POWER_OFF)
- return NOTIFY_DONE;
-
- printk(KERN_INFO "Shutting down I2O system.\n");
- printk(KERN_INFO
- " This could take a few minutes if there are many devices attached\n");
-
- for(i = 0; i < MAX_I2O_MODULES; i++)
- {
- if(i2o_handlers[i] && i2o_handlers[i]->reboot_notify)
- i2o_handlers[i]->reboot_notify();
- }
-
- for(c = i2o_controller_chain; c; c = c->next)
- {
- if(i2o_quiesce_controller(c))
- {
- printk(KERN_WARNING "i2o: Could not quiesce %s.\n"
- "Verify setup on next system power up.\n",
- c->name);
- }
- }
-
- printk(KERN_INFO "I2O system down.\n");
- return NOTIFY_DONE;
-}
-
-
-
-
-/**
- * i2o_pci_dispose - Free bus specific resources
- * @c: I2O controller
- *
- * Disable interrupts and then free interrupt, I/O and mtrr resources
- * used by this controller. Called by the I2O core on unload.
- */
-
-static void i2o_pci_dispose(struct i2o_controller *c)
-{
- I2O_IRQ_WRITE32(c,0xFFFFFFFF);
- if(c->irq > 0)
- free_irq(c->irq, c);
- iounmap(c->base_virt);
- if(c->raptor)
- iounmap(c->msg_virt);
-
-#ifdef CONFIG_MTRR
- if(c->mtrr_reg0 > 0)
- mtrr_del(c->mtrr_reg0, 0, 0);
- if(c->mtrr_reg1 > 0)
- mtrr_del(c->mtrr_reg1, 0, 0);
-#endif
-}
-
-/**
- * i2o_pci_interrupt - Bus specific interrupt handler
- * @irq: interrupt line
- * @dev_id: cookie
- *
- * Handle an interrupt from a PCI based I2O controller. This turns out
- * to be rather simple. We keep the controller pointer in the cookie.
- */
-
-static irqreturn_t i2o_pci_interrupt(int irq, void *dev_id, struct pt_regs *r)
-{
- struct i2o_controller *c = dev_id;
- i2o_run_queue(c);
- return IRQ_HANDLED;
-}
-
-/**
- * i2o_pci_install - Install a PCI i2o controller
- * @dev: PCI device of the I2O controller
- *
- * Install a PCI (or in theory AGP) i2o controller. Devices are
- * initialized, configured and registered with the i2o core subsystem. Be
- * very careful with ordering. There may be pending interrupts.
- *
- * To Do: Add support for polled controllers
- */
-
-int __init i2o_pci_install(struct pci_dev *dev)
-{
- struct i2o_controller *c=kmalloc(sizeof(struct i2o_controller),
- GFP_KERNEL);
- void *bar0_virt;
- void *bar1_virt;
- unsigned long bar0_phys = 0;
- unsigned long bar1_phys = 0;
- unsigned long bar0_size = 0;
- unsigned long bar1_size = 0;
-
- int i;
-
- if(c==NULL)
- {
- printk(KERN_ERR "i2o: Insufficient memory to add controller.\n");
- return -ENOMEM;
- }
- memset(c, 0, sizeof(*c));
-
- c->irq = -1;
- c->dpt = 0;
- c->raptor = 0;
- c->short_req = 0;
- c->pdev = dev;
-
-#if BITS_PER_LONG == 64
- c->context_list_lock = SPIN_LOCK_UNLOCKED;
-#endif
-
- /*
- * Cards that fall apart if you hit them with large I/O
- * loads...
- */
-
- if(dev->vendor == PCI_VENDOR_ID_NCR && dev->device == 0x0630)
- {
- c->short_req = 1;
- printk(KERN_INFO "I2O: Symbios FC920 workarounds activated.\n");
- }
-
- if(dev->subsystem_vendor == PCI_VENDOR_ID_PROMISE)
- {
- c->promise = 1;
- printk(KERN_INFO "I2O: Promise workarounds activated.\n");
- }
-
- /*
- * Cards that go bananas if you quiesce them before you reset
- * them
- */
-
- if(dev->vendor == PCI_VENDOR_ID_DPT) {
- c->dpt=1;
- if(dev->device == 0xA511)
- c->raptor=1;
- }
-
- for(i=0; i<6; i++)
- {
- /* Skip I/O spaces */
- if(!(pci_resource_flags(dev, i) & IORESOURCE_IO))
- {
- if(!bar0_phys)
- {
- bar0_phys = pci_resource_start(dev, i);
- bar0_size = pci_resource_len(dev, i);
- if(!c->raptor)
- break;
- }
- else
- {
- bar1_phys = pci_resource_start(dev, i);
- bar1_size = pci_resource_len(dev, i);
- break;
- }
- }
- }
-
- if(i==6)
- {
- printk(KERN_ERR "i2o: I2O controller has no memory regions defined.\n");
- kfree(c);
- return -EINVAL;
- }
-
-
- /* Map the I2O controller */
- if(!c->raptor)
- printk(KERN_INFO "i2o: PCI I2O controller at %08lX size=%ld\n", bar0_phys, bar0_size);
- else
- printk(KERN_INFO "i2o: PCI I2O controller\n BAR0 at 0x%08lX size=%ld\n BAR1 at 0x%08lX size=%ld\n", bar0_phys, bar0_size, bar1_phys, bar1_size);
-
- bar0_virt = ioremap(bar0_phys, bar0_size);
- if(bar0_virt==0)
- {
- printk(KERN_ERR "i2o: Unable to map controller.\n");
- kfree(c);
- return -EINVAL;
- }
-
- if(c->raptor)
- {
- bar1_virt = ioremap(bar1_phys, bar1_size);
- if(bar1_virt==0)
- {
- printk(KERN_ERR "i2o: Unable to map controller.\n");
- kfree(c);
- iounmap(bar0_virt);
- return -EINVAL;
- }
- } else {
- bar1_virt = bar0_virt;
- bar1_phys = bar0_phys;
- bar1_size = bar0_size;
- }
-
- c->irq_mask = bar0_virt+0x34;
- c->post_port = bar0_virt+0x40;
- c->reply_port = bar0_virt+0x44;
-
- c->base_phys = bar0_phys;
- c->base_virt = bar0_virt;
- c->msg_phys = bar1_phys;
- c->msg_virt = bar1_virt;
-
- /*
- * Enable Write Combining MTRR for IOP's memory region
- */
-#ifdef CONFIG_MTRR
- c->mtrr_reg0 = mtrr_add(c->base_phys, bar0_size, MTRR_TYPE_WRCOMB, 1);
- /*
- * If it is an INTEL i960 I/O processor then set the first 64K to
- * Uncacheable since the region contains the Messaging unit which
- * shouldn't be cached.
- */
- c->mtrr_reg1 = -1;
- if(dev->vendor == PCI_VENDOR_ID_INTEL || dev->vendor == PCI_VENDOR_ID_DPT)
- {
- printk(KERN_INFO "I2O: MTRR workaround for Intel i960 processor\n");
- c->mtrr_reg1 = mtrr_add(c->base_phys, 65536, MTRR_TYPE_UNCACHABLE, 1);
- if(c->mtrr_reg1< 0)
- {
- printk(KERN_INFO "i2o_pci: Error in setting MTRR_TYPE_UNCACHABLE\n");
- mtrr_del(c->mtrr_reg0, c->msg_phys, bar1_size);
- c->mtrr_reg0 = -1;
- }
- }
- if(c->raptor)
- c->mtrr_reg1 = mtrr_add(c->msg_phys, bar1_size, MTRR_TYPE_WRCOMB, 1);
-
-#endif
-
- I2O_IRQ_WRITE32(c,0xFFFFFFFF);
-
- i = i2o_install_controller(c);
-
- if(i<0)
- {
- printk(KERN_ERR "i2o: Unable to install controller.\n");
- kfree(c);
- iounmap(bar0_virt);
- if(c->raptor)
- iounmap(bar1_virt);
- return i;
- }
-
- c->irq = dev->irq;
- if(c->irq)
- {
- i=request_irq(dev->irq, i2o_pci_interrupt, SA_SHIRQ,
- c->name, c);
- if(i<0)
- {
- printk(KERN_ERR "%s: unable to allocate interrupt %d.\n",
- c->name, dev->irq);
- c->irq = -1;
- i2o_delete_controller(c);
- iounmap(bar0_virt);
- if(c->raptor)
- iounmap(bar1_virt);
- return -EBUSY;
- }
- }
-
- printk(KERN_INFO "%s: Installed at IRQ%d\n", c->name, dev->irq);
- I2O_IRQ_WRITE32(c,0x0);
- c->enabled = 1;
- return 0;
-}
-
-/**
- * i2o_pci_scan - Scan the pci bus for controllers
- *
- * Scan the PCI devices on the system looking for any device which is a
- * memory of the Intelligent, I2O class. We attempt to set up each such device
- * and register it with the core.
- *
- * Returns the number of controllers registered
- *
- * Note; Do not change this to a hot plug interface. I2O 1.5 itself
- * does not support hot plugging.
- */
-
-int __init i2o_pci_scan(void)
-{
- struct pci_dev *dev = NULL;
- int count=0;
-
- printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
- {
- if((dev->class>>8)!=PCI_CLASS_INTELLIGENT_I2O &&
- (dev->vendor!=PCI_VENDOR_ID_DPT || dev->device!=0xA511))
- continue;
-
- if((dev->class>>8)==PCI_CLASS_INTELLIGENT_I2O &&
- (dev->class&0xFF)>1)
- {
- printk(KERN_INFO "i2o: I2O Controller found but does not support I2O 1.5 (skipping).\n");
- continue;
- }
- if (pci_enable_device(dev))
- continue;
- printk(KERN_INFO "i2o: I2O controller on bus %d at %d.\n",
- dev->bus->number, dev->devfn);
- if(pci_set_dma_mask(dev, 0xffffffff))
- {
- printk(KERN_WARNING "I2O controller on bus %d at %d : No suitable DMA available\n", dev->bus->number, dev->devfn);
- continue;
- }
- pci_set_master(dev);
- if(i2o_pci_install(dev)==0)
- count++;
- }
- if(count)
- printk(KERN_INFO "i2o: %d I2O controller%s found and installed.\n", count,
- count==1?"":"s");
- return count?count:-ENODEV;
-}
-
-static int i2o_core_init(void)
-{
- printk(KERN_INFO "I2O Core - (C) Copyright 1999 Red Hat Software\n");
- if (i2o_install_handler(&i2o_core_handler) < 0)
- {
- printk(KERN_ERR "i2o_core: Unable to install core handler.\nI2O stack not loaded!");
- return 0;
- }
-
- core_context = i2o_core_handler.context;
-
- /*
- * Initialize event handling thread
- */
-
- init_MUTEX_LOCKED(&evt_sem);
- evt_pid = kernel_thread(i2o_core_evt, &evt_reply, CLONE_SIGHAND);
- if(evt_pid < 0)
- {
- printk(KERN_ERR "I2O: Could not create event handler kernel thread\n");
- i2o_remove_handler(&i2o_core_handler);
- return 0;
- }
- else
- printk(KERN_INFO "I2O: Event thread created as pid %d\n", evt_pid);
-
- i2o_pci_scan();
- if(i2o_num_controllers)
- i2o_sys_init();
-
- register_reboot_notifier(&i2o_reboot_notifier);
-
- return 0;
-}
-
-static void i2o_core_exit(void)
-{
- int stat;
-
- unregister_reboot_notifier(&i2o_reboot_notifier);
-
- if(i2o_num_controllers)
- i2o_sys_shutdown();
-
- /*
- * If this is shutdown time, the thread has already been killed
- */
- if(evt_running) {
- printk("Terminating i2o threads...");
- stat = kill_proc(evt_pid, SIGKILL, 1);
- if(!stat) {
- printk("waiting...\n");
- wait_for_completion(&evt_dead);
- }
- printk("done.\n");
- }
- i2o_remove_handler(&i2o_core_handler);
-}
-
-module_init(i2o_core_init);
-module_exit(i2o_core_exit);
-
-MODULE_PARM(verbose, "i");
-MODULE_PARM_DESC(verbose, "Verbose diagnostics");
-
-MODULE_AUTHOR("Red Hat Software");
-MODULE_DESCRIPTION("I2O Core");
-MODULE_LICENSE("GPL");
-
-EXPORT_SYMBOL(i2o_controller_chain);
-EXPORT_SYMBOL(i2o_num_controllers);
-EXPORT_SYMBOL(i2o_find_controller);
-EXPORT_SYMBOL(i2o_unlock_controller);
-EXPORT_SYMBOL(i2o_status_get);
-EXPORT_SYMBOL(i2o_install_handler);
-EXPORT_SYMBOL(i2o_remove_handler);
-EXPORT_SYMBOL(i2o_install_controller);
-EXPORT_SYMBOL(i2o_delete_controller);
-EXPORT_SYMBOL(i2o_run_queue);
-EXPORT_SYMBOL(i2o_claim_device);
-EXPORT_SYMBOL(i2o_release_device);
-EXPORT_SYMBOL(i2o_device_notify_on);
-EXPORT_SYMBOL(i2o_device_notify_off);
-EXPORT_SYMBOL(i2o_post_this);
-EXPORT_SYMBOL(i2o_post_wait);
-EXPORT_SYMBOL(i2o_post_wait_mem);
-EXPORT_SYMBOL(i2o_query_scalar);
-EXPORT_SYMBOL(i2o_set_scalar);
-EXPORT_SYMBOL(i2o_query_table);
-EXPORT_SYMBOL(i2o_clear_table);
-EXPORT_SYMBOL(i2o_row_add_table);
-EXPORT_SYMBOL(i2o_issue_params);
-EXPORT_SYMBOL(i2o_event_register);
-EXPORT_SYMBOL(i2o_event_ack);
-EXPORT_SYMBOL(i2o_report_status);
-EXPORT_SYMBOL(i2o_dump_message);
-EXPORT_SYMBOL(i2o_get_class_name);
-EXPORT_SYMBOL(i2o_context_list_add);
-EXPORT_SYMBOL(i2o_context_list_get);
-EXPORT_SYMBOL(i2o_context_list_remove);
+++ /dev/null
-/*======================================================================
-
- $Id: doc1000.c,v 1.15 2001/10/02 15:05:13 dwmw2 Exp $
-
-======================================================================*/
-
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <asm/uaccess.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/timer.h>
-#include <linux/major.h>
-#include <linux/fs.h>
-#include <linux/ioctl.h>
-#include <asm/io.h>
-#include <asm/system.h>
-#include <stdarg.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/iflash.h>
-
-/* Parameters that can be set with 'insmod' */
-
-static u_long base = 0xe0000;
-static int erase_timeout = 10*HZ; /* in ticks */
-static int retry_limit = 4; /* write retries */
-static u_long max_tries = 4096; /* status polling */
-
-MODULE_PARM(base,"l");
-MODULE_PARM(erase_timeout, "i");
-MODULE_PARM(retry_limit, "i");
-MODULE_PARM(max_tries, "i");
-
-#define WINDOW_SIZE 0x2000
-#define WINDOW_MASK (WINDOW_SIZE - 1)
-#define PAGEREG_LO (WINDOW_SIZE)
-#define PAGEREG_HI (WINDOW_SIZE + 2)
-
-static struct mtd_info *mymtd;
-static struct timer_list flashcard_timer;
-
-#define MAX_CELLS 32
-#define MAX_FLASH_DEVICES 8
-
-/* A flash region is composed of one or more "cells", where we allow
- simultaneous erases if they are in different cells */
-
-
-
-struct mypriv {
- u_char *baseaddr;
- u_short curpage;
- u_char locked;
- u_short numdevices;
- u_char interleave;
- struct erase_info *cur_erases;
- wait_queue_head_t wq;
- u_char devstat[MAX_FLASH_DEVICES];
- u_long devshift;
-};
-
-
-static void flashcard_periodic(u_long data);
-static int flashcard_erase (struct mtd_info *mtd, struct erase_info *instr);
-static int flashcard_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
-static int flashcard_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
-static void flashcard_sync (struct mtd_info *mtd);
-
-static inline void resume_erase(volatile u_char *addr);
-static inline int suspend_erase(volatile u_char *addr);
-static inline int byte_write (volatile u_char *addr, u_char byte);
-static inline int word_write (volatile u_char *addr, __u16 word);
-static inline int check_write(volatile u_char *addr);
-static inline void block_erase (volatile u_char *addr);
-static inline int check_erase(volatile u_char *addr);
-
-#ifdef CONFIG_SMP
-#warning This is definitely not SMP safe. Lock the paging mechanism.
-#endif
-
-static u_char *pagein(struct mtd_info *mtd, u_long addr)
-{
- struct mypriv *priv=mtd->priv;
- u_short page = addr >> 13;
-
- priv->baseaddr[PAGEREG_LO] = page & 0xff;
- priv->baseaddr[PAGEREG_HI] = page >> 8;
- priv->curpage = page;
-
- return &priv->baseaddr[addr & WINDOW_MASK];
-}
-
-
-void flashcard_sync (struct mtd_info *mtd)
-{
- struct mypriv *priv=mtd->priv;
-
- flashcard_periodic((u_long) mtd);
- printk("sync...");
- if (priv->cur_erases)
- interruptible_sleep_on(&priv->wq);
- printk("Done.\n");
-}
-
-int flashcard_erase (struct mtd_info *mtd, struct erase_info *instr)
-{
- u_char *pageaddr;
- struct mypriv *priv=mtd->priv;
- struct erase_info **tmp=&priv->cur_erases;
-
- if (instr->len != mtd->erasesize)
- return -EINVAL;
- if (instr->addr + instr->len > mtd->size)
- return -EINVAL;
-
- pageaddr=pagein(mtd,instr->addr);
- instr->mtd = mtd;
- instr->dev = instr->addr >> priv->devshift;
- instr->cell = (instr->addr - (instr->dev << priv->devshift)) / mtd->erasesize;
- instr->next = NULL;
- instr->state = MTD_ERASE_PENDING;
-
- while (*tmp)
- {
- tmp = &((*tmp) -> next);
- }
-
- *tmp = instr;
- flashcard_periodic((u_long)mtd);
- return 0;
-}
-
-
-int flashcard_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
-{
- u_char *pageaddr=pagein(mtd,from);
- struct mypriv *priv=mtd->priv;
- u_char device = from >> priv->devshift;
- u_char cell = (int) (from - (device << priv->devshift)) / mtd->erasesize;
- int ret = 0, timeron = 0;
-
- if ((from & WINDOW_MASK) + len <= WINDOW_SIZE)
- *retlen = len;
- else
- *retlen = WINDOW_SIZE - (from & WINDOW_MASK);
-
- if (priv->devstat[device])
- {
-
- /* There is an erase in progress or pending for this device. Stop it */
- timeron = del_timer(&flashcard_timer);
-
- if (priv->cur_erases && priv->cur_erases->cell == cell)
-
- {
- /* The erase is on the current cell. Just return all 0xff */
- add_timer(&flashcard_timer);
-
-
- printk("Cell %d currently erasing. Setting to all 0xff\n",cell);
- memset(buf, 0xff, *retlen);
- return 0;
- }
- if (priv->devstat[device] == MTD_ERASING)
- {
- ret = suspend_erase(pageaddr);
- priv->devstat[device] = MTD_ERASE_SUSPEND;
-
- if (ret)
- {
- printk("flashcard: failed to suspend erase\n");
- add_timer (&flashcard_timer);
- return ret;
- }
- }
-
- }
-
- writew(IF_READ_ARRAY, (u_long)pageaddr & ~1);
-
- ret = 0;
- memcpy (buf, pageaddr, *retlen);
-
- writew(IF_READ_CSR, (u_long)pageaddr & ~1);
-
-
- if (priv->devstat[device] & MTD_ERASE_SUSPEND)
- {
- resume_erase(pageaddr);
- priv->devstat[device]=MTD_ERASING;
- }
-
-
- if (timeron) add_timer (&flashcard_timer);
-
- return ret;
-}
-
-
-int flashcard_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
-{
- struct mypriv *priv = (struct mypriv *)mtd->priv;
- u_char *endaddr, *startaddr;
- register u_char *pageaddr;
- u_char device = to >> priv->devshift;
-/* jiffies_t oldj=jiffies;*/
- int ret;
-
- while (priv->devstat[device])
- {
- flashcard_sync(mtd);
- }
-
- if ((to & WINDOW_MASK) + len <= WINDOW_SIZE)
- *retlen = len;
- else
- *retlen = WINDOW_SIZE - (to & WINDOW_MASK);
-
- pageaddr = pagein(mtd, to);
- startaddr = (u_char *)((u_long) pageaddr & ~1);
- endaddr = pageaddr+(*retlen);
-
-
-
- /* Set up to read */
- writew(IF_READ_CSR, startaddr);
-
- /* Make sure it's aligned by reading the first byte if necessary */
- if (to & 1)
- {
- /* Unaligned access */
-
- u_char cbuf;
-
- cbuf = *buf;
-
- if (!((u_long)pageaddr & 0xf))
- schedule();
-
- ret = byte_write(pageaddr, cbuf);
- if (ret) return ret;
-
- pageaddr++; buf++;
- }
-
-
- for ( ; pageaddr + 1 < endaddr; buf += 2, pageaddr += 2)
- {
- /* if ((u_long)pageaddr & 0xf) schedule();*/
-
- ret = word_write(pageaddr, *(__u16 *)buf);
- if (ret)
- return ret;
- }
-
- if (pageaddr != endaddr)
- {
- /* One more byte to write at the end. */
- u_char cbuf;
-
- cbuf = *buf;
-
- ret = byte_write(pageaddr, cbuf);
-
- if (ret) return ret;
- }
-
- return check_write(startaddr);
-/* printk("Time taken in flashcard_write: %lx jiffies\n",jiffies - oldj);*/
-}
-
-
-
-
-/*====================================================================*/
-
-static inline int byte_write (volatile u_char *addr, u_char byte)
-{
- register u_char status;
- register u_short i = 0;
-
- do {
- status = readb(addr);
- if (status & CSR_WR_READY)
- {
- writeb(IF_WRITE & 0xff, addr);
- writeb(byte, addr);
- return 0;
- }
- i++;
- } while(i < max_tries);
-
-
- printk(KERN_NOTICE "flashcard: byte_write timed out, status 0x%x\n",status);
- return -EIO;
-}
-
-static inline int word_write (volatile u_char *addr, __u16 word)
-{
- register u_short status;
- register u_short i = 0;
-
- do {
- status = readw(addr);
- if ((status & CSR_WR_READY) == CSR_WR_READY)
- {
- writew(IF_WRITE, addr);
- writew(word, addr);
- return 0;
- }
- i++;
- } while(i < max_tries);
-
- printk(KERN_NOTICE "flashcard: word_write timed out at %p, status 0x%x\n", addr, status);
- return -EIO;
-}
-
-static inline void block_erase (volatile u_char *addr)
-{
- writew(IF_BLOCK_ERASE, addr);
- writew(IF_CONFIRM, addr);
-}
-
-
-static inline int check_erase(volatile u_char *addr)
-{
- __u16 status;
-
-/* writew(IF_READ_CSR, addr);*/
- status = readw(addr);
-
-
- if ((status & CSR_WR_READY) != CSR_WR_READY)
- return -EBUSY;
-
- if (status & (CSR_ERA_ERR | CSR_VPP_LOW | CSR_WR_ERR))
- {
- printk(KERN_NOTICE "flashcard: erase failed, status 0x%x\n",
- status);
- return -EIO;
- }
-
- return 0;
-}
-
-static inline int suspend_erase(volatile u_char *addr)
-{
- __u16 status;
- u_long i = 0;
-
- writew(IF_ERASE_SUSPEND, addr);
- writew(IF_READ_CSR, addr);
-
- do {
- status = readw(addr);
- if ((status & CSR_WR_READY) == CSR_WR_READY)
- return 0;
- i++;
- } while(i < max_tries);
-
- printk(KERN_NOTICE "flashcard: suspend_erase timed out, status 0x%x\n", status);
- return -EIO;
-
-}
-
-static inline void resume_erase(volatile u_char *addr)
-{
- __u16 status;
-
- writew(IF_READ_CSR, addr);
- status = readw(addr);
-
- /* Only give resume signal if the erase is really suspended */
- if (status & CSR_ERA_SUSPEND)
- writew(IF_CONFIRM, addr);
-}
-
-static inline void reset_block(volatile u_char *addr)
-{
- u_short i;
- __u16 status;
-
- writew(IF_CLEAR_CSR, addr);
-
- for (i = 0; i < 100; i++) {
- writew(IF_READ_CSR, addr);
- status = readw(addr);
- if (status != 0xffff) break;
- udelay(1000);
- }
-
- writew(IF_READ_CSR, addr);
-}
-
-static inline int check_write(volatile u_char *addr)
-{
- u_short status, i = 0;
-
- writew(IF_READ_CSR, addr);
-
- do {
- status = readw(addr);
- if (status & (CSR_WR_ERR | CSR_VPP_LOW))
- {
- printk(KERN_NOTICE "flashcard: write failure at %p, status 0x%x\n", addr, status);
- reset_block(addr);
- return -EIO;
- }
- if ((status & CSR_WR_READY) == CSR_WR_READY)
- return 0;
- i++;
- } while (i < max_tries);
-
- printk(KERN_NOTICE "flashcard: write timed out at %p, status 0x%x\n", addr, status);
- return -EIO;
-}
-
-
-/*====================================================================*/
-
-
-
-static void flashcard_periodic(unsigned long data)
-{
- register struct mtd_info *mtd = (struct mtd_info *)data;
- register struct mypriv *priv = mtd->priv;
- struct erase_info *erase = priv->cur_erases;
- u_char *pageaddr;
-
- del_timer (&flashcard_timer);
-
- if (!erase)
- return;
-
- pageaddr = pagein(mtd, erase->addr);
-
- if (erase->state == MTD_ERASE_PENDING)
- {
- block_erase(pageaddr);
- priv->devstat[erase->dev] = erase->state = MTD_ERASING;
- erase->time = jiffies;
- erase->retries = 0;
- }
- else if (erase->state == MTD_ERASING)
- {
- /* It's trying to erase. Check whether it's finished */
-
- int ret = check_erase(pageaddr);
-
- if (!ret)
- {
- /* It's finished OK */
- priv->devstat[erase->dev] = 0;
- priv->cur_erases = erase->next;
- erase->state = MTD_ERASE_DONE;
- if (erase->callback)
- (*(erase->callback))(erase);
- else
- kfree(erase);
- }
- else if (ret == -EIO)
- {
- if (++erase->retries > retry_limit)
- {
- printk("Failed too many times. Giving up\n");
- priv->cur_erases = erase->next;
- priv->devstat[erase->dev] = 0;
- erase->state = MTD_ERASE_FAILED;
- if (erase->callback)
- (*(erase->callback))(erase);
- else
- kfree(erase);
- }
- else
- priv->devstat[erase->dev] = erase->state = MTD_ERASE_PENDING;
- }
- else if (erase->time + erase_timeout < jiffies)
- {
- printk("Flash erase timed out. The world is broken.\n");
-
- /* Just ignore and hope it goes away. For a while, read ops will give the CSR
- and writes won't work. */
-
- priv->cur_erases = erase->next;
- priv->devstat[erase->dev] = 0;
- erase->state = MTD_ERASE_FAILED;
- if (erase->callback)
- (*(erase->callback))(erase);
- else
- kfree(erase);
- }
- }
-
- if (priv->cur_erases)
- {
- flashcard_timer.expires = jiffies + HZ;
- add_timer (&flashcard_timer);
- }
- else
- wake_up_interruptible(&priv->wq);
-
-}
-
-int __init init_doc1000(void)
-{
- struct mypriv *priv;
-
- if (!base)
- {
- printk(KERN_NOTICE "flashcard: No start address for memory device.\n");
- return -EINVAL;
- }
-
- mymtd = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
-
- if (!mymtd)
- {
- printk(KERN_NOTICE "physmem: Cannot allocate memory for new MTD device.\n");
- return -ENOMEM;
- }
-
- memset(mymtd,0,sizeof(struct mtd_info));
-
- mymtd->priv = (void *) kmalloc (sizeof(struct mypriv), GFP_KERNEL);
- if (!mymtd->priv)
- {
- kfree(mymtd);
- printk(KERN_NOTICE "physmem: Cannot allocate memory for new MTD device's private data.\n");
- return -ENOMEM;
- }
-
-
-
-
- priv=mymtd->priv;
- init_waitqueue_head(&priv->wq);
-
- memset (priv,0,sizeof(struct mypriv));
-
- priv->baseaddr = phys_to_virt(base);
- priv->numdevices = 4;
-
- mymtd->name = "M-Systems DiskOnChip 1000";
-
- mymtd->size = 0x100000;
- mymtd->flags = MTD_CLEAR_BITS | MTD_ERASEABLE;
- mymtd->erase = flashcard_erase;
- mymtd->point = NULL;
- mymtd->unpoint = NULL;
- mymtd->read = flashcard_read;
- mymtd->write = flashcard_write;
-
- mymtd->sync = flashcard_sync;
- mymtd->erasesize = 0x10000;
- // mymtd->interleave = 2;
- priv->devshift = 24;
- mymtd->type = MTD_NORFLASH;
-
- if (add_mtd_device(mymtd))
- {
- printk(KERN_NOTICE "MTD device registration failed!\n");
- kfree(mymtd->priv);
- kfree(mymtd);
- return -EAGAIN;
- }
-
- init_timer(&flashcard_timer);
- flashcard_timer.function = flashcard_periodic;
- flashcard_timer.data = (u_long)mymtd;
- return 0;
-}
-
-static void __init cleanup_doc1000(void)
-{
- kfree (mymtd->priv);
- del_mtd_device(mymtd);
- kfree(mymtd);
-}
-
-module_init(init_doc1000);
-module_exit(cleanup_doc1000);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
-MODULE_DESCRIPTION("MTD driver for DiskOnChip 1000");
-
+++ /dev/null
-/*======================================================================
-
- drivers/mtd/maps/armflash.c: ARM Flash Layout/Partitioning
-
- Copyright (C) 2000 ARM Limited
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-
- This is access code for flashes using ARM's flash partitioning
- standards.
-
- $Id: integrator-flash-v24.c,v 1.13 2004/07/12 21:59:44 dwmw2 Exp $
-
-======================================================================*/
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-
-#include <asm/hardware.h>
-#include <asm/io.h>
-#include <asm/system.h>
-
-// board specific stuff - sorry, it should be in arch/arm/mach-*.
-#ifdef CONFIG_ARCH_INTEGRATOR
-
-#define FLASH_BASE INTEGRATOR_FLASH_BASE
-#define FLASH_SIZE INTEGRATOR_FLASH_SIZE
-
-#define FLASH_PART_SIZE 0x400000
-
-#define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
-#define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
-#define EBI_CSR1 (IO_ADDRESS(INTEGRATOR_EBI_BASE) + INTEGRATOR_EBI_CSR1_OFFSET)
-#define EBI_LOCK (IO_ADDRESS(INTEGRATOR_EBI_BASE) + INTEGRATOR_EBI_LOCK_OFFSET)
-
-/*
- * Initialise the flash access systems:
- * - Disable VPP
- * - Assert WP
- * - Set write enable bit in EBI reg
- */
-static void armflash_flash_init(void)
-{
- unsigned int tmp;
-
- __raw_writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
-
- tmp = __raw_readl(EBI_CSR1) | INTEGRATOR_EBI_WRITE_ENABLE;
- __raw_writel(tmp, EBI_CSR1);
-
- if (!(__raw_readl(EBI_CSR1) & INTEGRATOR_EBI_WRITE_ENABLE)) {
- __raw_writel(0xa05f, EBI_LOCK);
- __raw_writel(tmp, EBI_CSR1);
- __raw_writel(0, EBI_LOCK);
- }
-}
-
-/*
- * Shutdown the flash access systems:
- * - Disable VPP
- * - Assert WP
- * - Clear write enable bit in EBI reg
- */
-static void armflash_flash_exit(void)
-{
- unsigned int tmp;
-
- __raw_writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
-
- /*
- * Clear the write enable bit in system controller EBI register.
- */
- tmp = __raw_readl(EBI_CSR1) & ~INTEGRATOR_EBI_WRITE_ENABLE;
- __raw_writel(tmp, EBI_CSR1);
-
- if (__raw_readl(EBI_CSR1) & INTEGRATOR_EBI_WRITE_ENABLE) {
- __raw_writel(0xa05f, EBI_LOCK);
- __raw_writel(tmp, EBI_CSR1);
- __raw_writel(0, EBI_LOCK);
- }
-}
-
-static void armflash_flash_wp(int on)
-{
- unsigned int reg;
-
- if (on)
- reg = SC_CTRLC;
- else
- reg = SC_CTRLS;
-
- __raw_writel(INTEGRATOR_SC_CTRL_nFLWP, reg);
-}
-
-static void armflash_set_vpp(struct map_info *map, int on)
-{
- unsigned int reg;
-
- if (on)
- reg = SC_CTRLS;
- else
- reg = SC_CTRLC;
-
- __raw_writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg);
-}
-#endif
-
-#ifdef CONFIG_ARCH_P720T
-
-#define FLASH_BASE (0x04000000)
-#define FLASH_SIZE (64*1024*1024)
-
-#define FLASH_PART_SIZE (4*1024*1024)
-#define FLASH_BLOCK_SIZE (128*1024)
-
-static void armflash_flash_init(void)
-{
-}
-
-static void armflash_flash_exit(void)
-{
-}
-
-static void armflash_flash_wp(int on)
-{
-}
-
-static void armflash_set_vpp(struct map_info *map, int on)
-{
-}
-#endif
-
-
-static struct map_info armflash_map =
-{
- .name = "AFS",
- .set_vpp = armflash_set_vpp,
- .phys = FLASH_BASE,
-};
-
-static struct mtd_info *mtd;
-static struct mtd_partition *parts;
-static const char *probes[] = { "RedBoot", "afs", NULL };
-
-static int __init armflash_cfi_init(void *base, u_int size)
-{
- int ret;
-
- armflash_flash_init();
- armflash_flash_wp(1);
-
- /*
- * look for CFI based flash parts fitted to this board
- */
- armflash_map.size = size;
- armflash_map.bankwidth = 4;
- armflash_map.virt = (unsigned long) base;
-
- simple_map_init(&armflash_map);
-
- /*
- * Also, the CFI layer automatically works out what size
- * of chips we have, and does the necessary identification
- * for us automatically.
- */
- mtd = do_map_probe("cfi_probe", &armflash_map);
- if (!mtd)
- return -ENXIO;
-
- mtd->owner = THIS_MODULE;
-
- ret = parse_mtd_partitions(mtd, probes, &parts, (void *)0);
- if (ret > 0) {
- ret = add_mtd_partitions(mtd, parts, ret);
- if (ret)
- printk(KERN_ERR "mtd partition registration "
- "failed: %d\n", ret);
- }
-
- /*
- * If we got an error, free all resources.
- */
- if (ret < 0) {
- del_mtd_partitions(mtd);
- map_destroy(mtd);
- }
-
- return ret;
-}
-
-static void armflash_cfi_exit(void)
-{
- if (mtd) {
- del_mtd_partitions(mtd);
- map_destroy(mtd);
- }
- if (parts)
- kfree(parts);
-}
-
-static int __init armflash_init(void)
-{
- int err = -EBUSY;
- void *base;
-
- if (request_mem_region(FLASH_BASE, FLASH_SIZE, "flash") == NULL)
- goto out;
-
- base = ioremap(FLASH_BASE, FLASH_SIZE);
- err = -ENOMEM;
- if (base == NULL)
- goto release;
-
- err = armflash_cfi_init(base, FLASH_SIZE);
- if (err) {
- iounmap(base);
-release:
- release_mem_region(FLASH_BASE, FLASH_SIZE);
- }
-out:
- return err;
-}
-
-static void __exit armflash_exit(void)
-{
- armflash_cfi_exit();
- iounmap((void *)armflash_map.virt);
- release_mem_region(FLASH_BASE, FLASH_SIZE);
- armflash_flash_exit();
-}
-
-module_init(armflash_init);
-module_exit(armflash_exit);
-
-MODULE_AUTHOR("ARM Ltd");
-MODULE_DESCRIPTION("ARM Integrator CFI map driver");
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * drivers/mtd/mtdblock.h
- *
- * common defines for mtdblock-core and mtdblock-2x
- *
- * $Id: mtdblock.h,v 1.1 2002/11/27 10:33:37 gleixner Exp $
- *
- */
-
-#ifndef __MTD_MTDBLOCK_H__
-#define __MTD_MTDBLOCK_H__
-
-#define MAJOR_NR MTD_BLOCK_MAJOR
-#define DEVICE_NAME "mtdblock"
-
-struct mtdblk_dev {
- struct mtd_info *mtd; /* Locked */
- int count;
- struct semaphore cache_sem;
- unsigned char *cache_data;
- unsigned long cache_offset;
- unsigned int cache_size;
- enum { STATE_EMPTY, STATE_CLEAN, STATE_DIRTY } cache_state;
-};
-
-extern int write_cached_data (struct mtdblk_dev *mtdblk);
-extern int do_cached_write (struct mtdblk_dev *mtdblk, unsigned long pos,
- int len, const char *buf);
-extern int do_cached_read (struct mtdblk_dev *mtdblk, unsigned long pos,
- int len, char *buf);
-
-extern void __exit cleanup_mtdblock(void);
-extern int __init init_mtdblock(void);
-
-#endif
+++ /dev/null
-/*
- * drivers/mtd/nand.c
- *
- * Overview:
- * This is the generic MTD driver for NAND flash devices. It should be
- * capable of working with almost all NAND chips currently available.
- *
- * Additional technical information is available on
- * http://www.linux-mtd.infradead.org/tech/nand.html
- *
- * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
- * 2002 Thomas Gleixner (tglx@linutronix.de)
- *
- * 10-29-2001 Thomas Gleixner (tglx@linutronix.de)
- * - Changed nand_chip structure for controlline function to
- * support different hardware structures (Access to
- * controllines ALE,CLE,NCE via hardware specific function.
- * - exit out of "failed erase block" changed, to avoid
- * driver hangup
- * - init_waitqueue_head added in function nand_scan !!
- *
- * 01-30-2002 Thomas Gleixner (tglx@linutronix.de)
- * change in nand_writev to block invalid vecs entries
- *
- * 02-11-2002 Thomas Gleixner (tglx@linutronix.de)
- * - major rewrite to avoid duplicated code
- * common nand_write_page function
- * common get_chip function
- * - added oob_config structure for out of band layouts
- * - write_oob changed for partial programming
- * - read cache for faster access for subsequent reads
- * from the same page.
- * - support for different read/write address
- * - support for device ready/busy line
- * - read oob for more than one page enabled
- *
- * 02-27-2002 Thomas Gleixner (tglx@linutronix.de)
- * - command-delay can be programmed
- * - fixed exit from erase with callback-function enabled
- *
- * 03-21-2002 Thomas Gleixner (tglx@linutronix.de)
- * - DEBUG improvements provided by Elizabeth Clarke
- * (eclarke@aminocom.com)
- * - added zero check for this->chip_delay
- *
- * 04-03-2002 Thomas Gleixner (tglx@linutronix.de)
- * - added added hw-driver supplied command and wait functions
- * - changed blocking for erase (erase suspend enabled)
- * - check pointers before accessing flash provided by
- * John Hall (john.hall@optionexist.co.uk)
- *
- * 04-09-2002 Thomas Gleixner (tglx@linutronix.de)
- * - nand_wait repaired
- *
- * 04-28-2002 Thomas Gleixner (tglx@linutronix.de)
- * - OOB config defines moved to nand.h
- *
- * 08-01-2002 Thomas Gleixner (tglx@linutronix.de)
- * - changed my mailaddress, added pointer to tech/nand.html
- *
- * 08-07-2002 Thomas Gleixner (tglx@linutronix.de)
- * forced bad block location to byte 5 of OOB, even if
- * CONFIG_MTD_NAND_ECC_JFFS2 is not set, to prevent
- * erase /dev/mtdX from erasing bad blocks and destroying
- * bad block info
- *
- * 08-10-2002 Thomas Gleixner (tglx@linutronix.de)
- * Fixed writing tail of data. Thanks to Alice Hennessy
- * <ahennessy@mvista.com>.
- *
- * 08-10-2002 Thomas Gleixner (tglx@linutronix.de)
- * nand_read_ecc and nand_write_page restructured to support
- * hardware ECC. Thanks to Steven Hein (ssh@sgi.com)
- * for basic implementation and suggestions.
- * 3 new pointers in nand_chip structure:
- * calculate_ecc, correct_data, enabled_hwecc
- * forcing all hw-drivers to support page cache
- * eccvalid_pos is now mandatory
- *
- * 08-17-2002 tglx: fixed signed/unsigned missmatch in write.c
- * Thanks to Ken Offer <koffer@arlut.utexas.edu>
- *
- * 08-29-2002 tglx: use buffered read/write only for non pagealigned
- * access, speed up the aligned path by using the fs-buffer
- * reset chip removed from nand_select(), implicit done
- * only, when erase is interrupted
- * waitfuntion use yield, instead of schedule_timeout
- * support for 6byte/512byte hardware ECC
- * read_ecc, write_ecc extended for different oob-layout
- * selections: Implemented NAND_NONE_OOB, NAND_JFFS2_OOB,
- * NAND_YAFFS_OOB. fs-driver gives one of these constants
- * to select the oob-layout fitting the filesystem.
- * oobdata can be read together with the raw data, when
- * the fs-driver supplies a big enough buffer.
- * size = 12 * number of pages to read (256B pagesize)
- * 24 * number of pages to read (512B pagesize)
- * the buffer contains 8/16 byte oobdata and 4/8 byte
- * returncode from calculate_ecc
- * oobdata can be given from filesystem to program them
- * in one go together with the raw data. ECC codes are
- * filled in at the place selected by oobsel.
- *
- * 09-04-2002 tglx: fixed write_verify (John Hall (john.hall@optionexist.co.uk))
- *
- * 11-11-2002 tglx: fixed debug output in nand_write_page
- * (John Hall (john.hall@optionexist.co.uk))
- *
- * 11-25-2002 tglx: Moved device ID/ manufacturer ID from nand_ids.h
- * Splitted device ID and manufacturer ID table.
- * Removed CONFIG_MTD_NAND_ECC, as it defaults to ECC_NONE for
- * mtd->read / mtd->write and is controllable by the fs driver
- * for mtd->read_ecc / mtd->write_ecc
- * some minor cleanups
- *
- * 12-05-2002 tglx: Dave Ellis (DGE@sixnetio) provided the fix for
- * WRITE_VERIFY long time ago. Thanks for remembering me.
- *
- * 02-14-2003 tglx: Reject non page aligned writes
- * Fixed ecc select in nand_write_page to match semantics.
- *
- * 02-18-2003 tglx: Changed oobsel to pointer. Added a default oob-selector
- *
- * 02-18-2003 tglx: Implemented oobsel again. Now it uses a pointer to
- + a structure, which will be supplied by a filesystem driver
- * If NULL is given, then the defaults (none or defaults
- * supplied by ioctl (MEMSETOOBSEL) are used.
- * For partitions the partition defaults are used (mtdpart.c)
- *
- * 06-04-2003 tglx: fix compile errors and fix write verify problem for
- * some chips, which need either a delay between the readback
- * and the next write command or have the CE removed. The
- * CE disable/enable is much faster than a 20us delay and
- * it should work on all available chips.
- *
- * $Id: nand.c,v 1.46 2003/06/04 17:10:36 gleixner Exp $
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/nand_ecc.h>
-#include <linux/mtd/compatmac.h>
-#include <linux/interrupt.h>
-#include <asm/io.h>
-
-/*
- * Macros for low-level register control
- */
-#define nand_select() this->hwcontrol(NAND_CTL_SETNCE);
-#define nand_deselect() this->hwcontrol(NAND_CTL_CLRNCE);
-
-/*
- * NAND low-level MTD interface functions
- */
-static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
-static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
- size_t * retlen, u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
-static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
-static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf);
-static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
- size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
-static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char *buf);
-static int nand_writev (struct mtd_info *mtd, const struct iovec *vecs,
- unsigned long count, loff_t to, size_t * retlen);
-static int nand_writev_ecc (struct mtd_info *mtd, const struct iovec *vecs,
- unsigned long count, loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
-static int nand_erase (struct mtd_info *mtd, struct erase_info *instr);
-static void nand_sync (struct mtd_info *mtd);
-static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf, struct nand_oobinfo *oobsel);
-
-
-/*
- * Send command to NAND device
- */
-static void nand_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
-{
- register struct nand_chip *this = mtd->priv;
- register unsigned long NAND_IO_ADDR = this->IO_ADDR_W;
-
- /* Begin command latch cycle */
- this->hwcontrol (NAND_CTL_SETCLE);
- /*
- * Write out the command to the device.
- */
- if (command != NAND_CMD_SEQIN)
- writeb (command, NAND_IO_ADDR);
- else {
- if (mtd->oobblock == 256 && column >= 256) {
- column -= 256;
- writeb (NAND_CMD_READOOB, NAND_IO_ADDR);
- writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
- } else if (mtd->oobblock == 512 && column >= 256) {
- if (column < 512) {
- column -= 256;
- writeb (NAND_CMD_READ1, NAND_IO_ADDR);
- writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
- } else {
- column -= 512;
- writeb (NAND_CMD_READOOB, NAND_IO_ADDR);
- writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
- }
- } else {
- writeb (NAND_CMD_READ0, NAND_IO_ADDR);
- writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
- }
- }
-
- /* Set ALE and clear CLE to start address cycle */
- this->hwcontrol (NAND_CTL_CLRCLE);
-
- if (column != -1 || page_addr != -1) {
- this->hwcontrol (NAND_CTL_SETALE);
-
- /* Serially input address */
- if (column != -1)
- writeb (column, NAND_IO_ADDR);
- if (page_addr != -1) {
- writeb ((unsigned char) (page_addr & 0xff), NAND_IO_ADDR);
- writeb ((unsigned char) ((page_addr >> 8) & 0xff), NAND_IO_ADDR);
- /* One more address cycle for higher density devices */
- if (mtd->size & 0x0c000000)
- writeb ((unsigned char) ((page_addr >> 16) & 0x0f), NAND_IO_ADDR);
- }
- /* Latch in address */
- this->hwcontrol (NAND_CTL_CLRALE);
- }
-
- /*
- * program and erase have their own busy handlers
- * status and sequential in needs no delay
- */
- switch (command) {
-
- case NAND_CMD_PAGEPROG:
- case NAND_CMD_ERASE1:
- case NAND_CMD_ERASE2:
- case NAND_CMD_SEQIN:
- case NAND_CMD_STATUS:
- return;
-
- case NAND_CMD_RESET:
- if (this->dev_ready)
- break;
- this->hwcontrol (NAND_CTL_SETCLE);
- writeb (NAND_CMD_STATUS, NAND_IO_ADDR);
- this->hwcontrol (NAND_CTL_CLRCLE);
- while ( !(readb (this->IO_ADDR_R) & 0x40));
- return;
-
- /* This applies to read commands */
- default:
- /*
- * If we don't have access to the busy pin, we apply the given
- * command delay
- */
- if (!this->dev_ready) {
- udelay (this->chip_delay);
- return;
- }
- }
-
- /* wait until command is processed */
- while (!this->dev_ready());
-}
-
-/*
- * Get chip for selected access
- */
-static inline void nand_get_chip (struct nand_chip *this, struct mtd_info *mtd, int new_state, int *erase_state)
-{
-
- DECLARE_WAITQUEUE (wait, current);
-
- /*
- * Grab the lock and see if the device is available
- * For erasing, we keep the spinlock until the
- * erase command is written.
- */
-retry:
- spin_lock_bh (&this->chip_lock);
-
- if (this->state == FL_READY) {
- this->state = new_state;
- if (new_state != FL_ERASING)
- spin_unlock_bh (&this->chip_lock);
- return;
- }
-
- if (this->state == FL_ERASING) {
- if (new_state != FL_ERASING) {
- this->state = new_state;
- spin_unlock_bh (&this->chip_lock);
- nand_select (); /* select in any case */
- this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
- return;
- }
- }
-
- set_current_state (TASK_UNINTERRUPTIBLE);
- add_wait_queue (&this->wq, &wait);
- spin_unlock_bh (&this->chip_lock);
- schedule ();
- remove_wait_queue (&this->wq, &wait);
- goto retry;
-}
-
-/*
- * Wait for command done. This applies to erase and program only
- * Erase can take up to 400ms and program up to 20ms according to
- * general NAND and SmartMedia specs
- *
-*/
-static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
-{
-
- unsigned long timeo = jiffies;
- int status;
-
- if (state == FL_ERASING)
- timeo += (HZ * 400) / 1000;
- else
- timeo += (HZ * 20) / 1000;
-
- spin_lock_bh (&this->chip_lock);
- this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
-
- while (time_before(jiffies, timeo)) {
- /* Check, if we were interrupted */
- if (this->state != state) {
- spin_unlock_bh (&this->chip_lock);
- return 0;
- }
- if (this->dev_ready) {
- if (this->dev_ready ())
- break;
- }
- if (readb (this->IO_ADDR_R) & 0x40)
- break;
-
- spin_unlock_bh (&this->chip_lock);
- yield ();
- spin_lock_bh (&this->chip_lock);
- }
- status = (int) readb (this->IO_ADDR_R);
- spin_unlock_bh (&this->chip_lock);
-
- return status;
-}
-
-/*
- * Nand_page_program function is used for write and writev !
- * This function will always program a full page of data
- * If you call it with a non page aligned buffer, you're lost :)
- */
-static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf, struct nand_oobinfo *oobsel)
-{
- int i, status;
- u_char ecc_code[6], *oob_data;
- int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
- int *oob_config = oobsel->eccpos;
-
- /* pad oob area, if we have no oob buffer from fs-driver */
- if (!oob_buf) {
- oob_data = &this->data_buf[mtd->oobblock];
- for (i = 0; i < mtd->oobsize; i++)
- oob_data[i] = 0xff;
- } else
- oob_data = oob_buf;
-
- /* Send command to begin auto page programming */
- this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page);
-
- /* Write out complete page of data, take care of eccmode */
- switch (eccmode) {
- /* No ecc and software ecc 3/256, write all */
- case NAND_ECC_NONE:
- printk (KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
- for (i = 0; i < mtd->oobblock; i++)
- writeb ( this->data_poi[i] , this->IO_ADDR_W);
- break;
- case NAND_ECC_SOFT:
- this->calculate_ecc (&this->data_poi[0], &(ecc_code[0]));
- for (i = 0; i < 3; i++)
- oob_data[oob_config[i]] = ecc_code[i];
- /* Calculate and write the second ECC for 512 Byte page size */
- if (mtd->oobblock == 512) {
- this->calculate_ecc (&this->data_poi[256], &(ecc_code[3]));
- for (i = 3; i < 6; i++)
- oob_data[oob_config[i]] = ecc_code[i];
- }
- for (i = 0; i < mtd->oobblock; i++)
- writeb ( this->data_poi[i] , this->IO_ADDR_W);
- break;
-
- /* Hardware ecc 3 byte / 256 data, write first half, get ecc, then second, if 512 byte pagesize */
- case NAND_ECC_HW3_256:
- this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic for write */
- for (i = 0; i < mtd->eccsize; i++)
- writeb ( this->data_poi[i] , this->IO_ADDR_W);
-
- this->calculate_ecc (NULL, &(ecc_code[0]));
- for (i = 0; i < 3; i++)
- oob_data[oob_config[i]] = ecc_code[i];
-
- if (mtd->oobblock == 512) {
- this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic for write*/
- for (i = mtd->eccsize; i < mtd->oobblock; i++)
- writeb ( this->data_poi[i] , this->IO_ADDR_W);
- this->calculate_ecc (NULL, &(ecc_code[3]));
- for (i = 3; i < 6; i++)
- oob_data[oob_config[i]] = ecc_code[i];
- }
- break;
-
- /* Hardware ecc 3 byte / 512 byte data, write full page */
- case NAND_ECC_HW3_512:
- this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic */
- for (i = 0; i < mtd->oobblock; i++)
- writeb ( this->data_poi[i] , this->IO_ADDR_W);
- this->calculate_ecc (NULL, &(ecc_code[0]));
- for (i = 0; i < 3; i++)
- oob_data[oob_config[i]] = ecc_code[i];
- break;
-
- /* Hardware ecc 6 byte / 512 byte data, write full page */
- case NAND_ECC_HW6_512:
- this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic */
- for (i = 0; i < mtd->oobblock; i++)
- writeb ( this->data_poi[i] , this->IO_ADDR_W);
- this->calculate_ecc (NULL, &(ecc_code[0]));
- for (i = 0; i < 6; i++)
- oob_data[oob_config[i]] = ecc_code[i];
- break;
-
- default:
- printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
- BUG();
- }
-
- /* Write out OOB data */
- for (i = 0; i < mtd->oobsize; i++)
- writeb ( oob_data[i] , this->IO_ADDR_W);
-
- /* Send command to actually program the data */
- this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
-
- /* call wait ready function */
- status = this->waitfunc (mtd, this, FL_WRITING);
-
- /* See if device thinks it succeeded */
- if (status & 0x01) {
- DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
- return -EIO;
- }
-
-#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
- /*
- * The NAND device assumes that it is always writing to
- * a cleanly erased page. Hence, it performs its internal
- * write verification only on bits that transitioned from
- * 1 to 0. The device does NOT verify the whole page on a
- * byte by byte basis. It is possible that the page was
- * not completely erased or the page is becoming unusable
- * due to wear. The read with ECC would catch the error
- * later when the ECC page check fails, but we would rather
- * catch it early in the page write stage. Better to write
- * no data than invalid data.
- */
-
- /* Send command to read back the page */
- this->cmdfunc (mtd, NAND_CMD_READ0, 0, page);
- /* Loop through and verify the data */
- for (i = 0; i < mtd->oobblock; i++) {
- if (this->data_poi[i] != readb (this->IO_ADDR_R)) {
- DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
- return -EIO;
- }
- }
-
- /* check, if we have a fs-supplied oob-buffer */
- if (oob_buf) {
- for (i = 0; i < mtd->oobsize; i++) {
- if (oob_data[i] != readb (this->IO_ADDR_R)) {
- DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
- return -EIO;
- }
- }
- } else {
- if (eccmode != NAND_ECC_NONE) {
- int ecc_bytes = 0;
-
- switch (this->eccmode) {
- case NAND_ECC_SOFT:
- case NAND_ECC_HW3_256: ecc_bytes = (mtd->oobblock == 512) ? 6 : 3; break;
- case NAND_ECC_HW3_512: ecc_bytes = 3; break;
- case NAND_ECC_HW6_512: ecc_bytes = 6; break;
- }
-
- for (i = 0; i < mtd->oobsize; i++)
- oob_data[i] = readb (this->IO_ADDR_R);
-
- for (i = 0; i < ecc_bytes; i++) {
- if (oob_data[oob_config[i]] != ecc_code[i]) {
- DEBUG (MTD_DEBUG_LEVEL0,
- "%s: Failed ECC write "
- "verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
- return -EIO;
- }
- }
- }
- }
- /*
- * Terminate the read command. This is faster than sending a reset command or
- * applying a 20us delay before issuing the next programm sequence.
- * This is not a problem for all chips, but I have found a bunch of them.
- */
- nand_deselect();
- nand_select();
-#endif
- return 0;
-}
-
-/*
-* Use NAND read ECC
-*/
-static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
-{
- return (nand_read_ecc (mtd, from, len, retlen, buf, NULL, NULL));
-}
-
-
-/*
- * NAND read with ECC
- */
-static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
- size_t * retlen, u_char * buf, u_char * oob_buf, struct nand_oobinfo *oobsel)
-{
- int j, col, page, end, ecc;
- int erase_state = 0;
- int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
- struct nand_chip *this = mtd->priv;
- u_char *data_poi, *oob_data = oob_buf;
- u_char ecc_calc[6];
- u_char ecc_code[6];
- int eccmode;
- int *oob_config;
-
- // use chip default if zero
- if (oobsel == NULL)
- oobsel = &mtd->oobinfo;
-
- eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
- oob_config = oobsel->eccpos;
-
- DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
-
- /* Do not allow reads past end of device */
- if ((from + len) > mtd->size) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
- *retlen = 0;
- return -EINVAL;
- }
-
- /* Grab the lock and see if the device is available */
- nand_get_chip (this, mtd ,FL_READING, &erase_state);
-
- /* Select the NAND device */
- nand_select ();
-
- /* First we calculate the starting page */
- page = from >> this->page_shift;
-
- /* Get raw starting column */
- col = from & (mtd->oobblock - 1);
-
- end = mtd->oobblock;
- ecc = mtd->eccsize;
-
- /* Send the read command */
- this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
-
- /* Loop until all data read */
- while (read < len) {
-
- /* If we have consequent page reads, apply delay or wait for ready/busy pin */
- if (read) {
- if (!this->dev_ready)
- udelay (this->chip_delay);
- else
- while (!this->dev_ready());
- }
-
- /*
- * If the read is not page aligned, we have to read into data buffer
- * due to ecc, else we read into return buffer direct
- */
- if (!col && (len - read) >= end)
- data_poi = &buf[read];
- else
- data_poi = this->data_buf;
-
- /* get oob area, if we have no oob buffer from fs-driver */
- if (!oob_buf) {
- oob_data = &this->data_buf[end];
- oob = 0;
- }
-
- j = 0;
- switch (eccmode) {
- case NAND_ECC_NONE: /* No ECC, Read in a page */
- printk (KERN_WARNING "Reading data from NAND FLASH without ECC is not recommended\n");
- while (j < end)
- data_poi[j++] = readb (this->IO_ADDR_R);
- break;
-
- case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
- while (j < end)
- data_poi[j++] = readb (this->IO_ADDR_R);
- this->calculate_ecc (&data_poi[0], &ecc_calc[0]);
- if (mtd->oobblock == 512)
- this->calculate_ecc (&data_poi[256], &ecc_calc[3]);
- break;
-
- case NAND_ECC_HW3_256: /* Hardware ECC 3 byte /256 byte data: Read in first 256 byte, get ecc, */
- this->enable_hwecc (NAND_ECC_READ);
- while (j < ecc)
- data_poi[j++] = readb (this->IO_ADDR_R);
- this->calculate_ecc (&data_poi[0], &ecc_calc[0]); /* read from hardware */
-
- if (mtd->oobblock == 512) { /* read second, if pagesize = 512 */
- this->enable_hwecc (NAND_ECC_READ);
- while (j < end)
- data_poi[j++] = readb (this->IO_ADDR_R);
- this->calculate_ecc (&data_poi[256], &ecc_calc[3]); /* read from hardware */
- }
- break;
-
- case NAND_ECC_HW3_512:
- case NAND_ECC_HW6_512: /* Hardware ECC 3/6 byte / 512 byte data : Read in a page */
- this->enable_hwecc (NAND_ECC_READ);
- while (j < end)
- data_poi[j++] = readb (this->IO_ADDR_R);
- this->calculate_ecc (&data_poi[0], &ecc_calc[0]); /* read from hardware */
- break;
-
- default:
- printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
- BUG();
- }
-
- /* read oobdata */
- for (j = 0; j < mtd->oobsize; j++)
- oob_data[oob + j] = readb (this->IO_ADDR_R);
-
- /* Skip ECC, if not active */
- if (eccmode == NAND_ECC_NONE)
- goto readdata;
-
- /* Pick the ECC bytes out of the oob data */
- for (j = 0; j < 6; j++)
- ecc_code[j] = oob_data[oob + oob_config[j]];
-
- /* correct data, if neccecary */
- ecc_status = this->correct_data (&data_poi[0], &ecc_code[0], &ecc_calc[0]);
- /* check, if we have a fs supplied oob-buffer */
- if (oob_buf) {
- oob += mtd->oobsize;
- *((int *)&oob_data[oob]) = ecc_status;
- oob += sizeof(int);
- }
- if (ecc_status == -1) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
- ecc_failed++;
- }
-
- if (mtd->oobblock == 512 && eccmode != NAND_ECC_HW3_512) {
- ecc_status = this->correct_data (&data_poi[256], &ecc_code[3], &ecc_calc[3]);
- if (oob_buf) {
- *((int *)&oob_data[oob]) = ecc_status;
- oob += sizeof(int);
- }
- if (ecc_status == -1) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
- ecc_failed++;
- }
- }
-readdata:
- if (col || (len - read) < end) {
- for (j = col; j < end && read < len; j++)
- buf[read++] = data_poi[j];
- } else
- read += mtd->oobblock;
- /* For subsequent reads align to page boundary. */
- col = 0;
- /* Increment page address */
- page++;
- }
-
- /* De-select the NAND device */
- nand_deselect ();
-
- /* Wake up anyone waiting on the device */
- spin_lock_bh (&this->chip_lock);
- this->state = FL_READY;
- wake_up (&this->wq);
- spin_unlock_bh (&this->chip_lock);
-
- /*
- * Return success, if no ECC failures, else -EIO
- * fs driver will take care of that, because
- * retlen == desired len and result == -EIO
- */
- *retlen = read;
- return ecc_failed ? -EIO : 0;
-}
-
-/*
- * NAND read out-of-band
- */
-static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
-{
- int i, col, page;
- int erase_state = 0;
- struct nand_chip *this = mtd->priv;
-
- DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
-
- /* Shift to get page */
- page = ((int) from) >> this->page_shift;
-
- /* Mask to get column */
- col = from & 0x0f;
-
- /* Initialize return length value */
- *retlen = 0;
-
- /* Do not allow reads past end of device */
- if ((from + len) > mtd->size) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
- *retlen = 0;
- return -EINVAL;
- }
-
- /* Grab the lock and see if the device is available */
- nand_get_chip (this, mtd , FL_READING, &erase_state);
-
- /* Select the NAND device */
- nand_select ();
-
- /* Send the read command */
- this->cmdfunc (mtd, NAND_CMD_READOOB, col, page);
- /*
- * Read the data, if we read more than one page
- * oob data, let the device transfer the data !
- */
- for (i = 0; i < len; i++) {
- buf[i] = readb (this->IO_ADDR_R);
- if ((col++ & (mtd->oobsize - 1)) == (mtd->oobsize - 1))
- udelay (this->chip_delay);
- }
- /* De-select the NAND device */
- nand_deselect ();
-
- /* Wake up anyone waiting on the device */
- spin_lock_bh (&this->chip_lock);
- this->state = FL_READY;
- wake_up (&this->wq);
- spin_unlock_bh (&this->chip_lock);
-
- /* Return happy */
- *retlen = len;
- return 0;
-}
-
-#define NOTALIGNED(x) (x & (mtd->oobblock-1)) != 0
-
-/*
-* Use NAND write ECC
-*/
-static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
-{
- return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, NULL));
-}
-/*
- * NAND write with ECC
- */
-static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
- size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel)
-{
- int page, ret = 0, oob = 0, written = 0;
- struct nand_chip *this = mtd->priv;
-
- DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
-
- /* Do not allow write past end of device */
- if ((to + len) > mtd->size) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
- return -EINVAL;
- }
-
- /* reject writes, which are not page aligned */
- if (NOTALIGNED (to) || NOTALIGNED(len)) {
- printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
- return -EINVAL;
- }
-
- // if oobsel is NULL, use chip defaults
- if (oobsel == NULL)
- oobsel = &mtd->oobinfo;
-
- /* Shift to get page */
- page = ((int) to) >> this->page_shift;
-
- /* Grab the lock and see if the device is available */
- nand_get_chip (this, mtd, FL_WRITING, NULL);
-
- /* Select the NAND device */
- nand_select ();
-
- /* Check the WP bit */
- this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
- if (!(readb (this->IO_ADDR_R) & 0x80)) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Device is write protected!!!\n");
- ret = -EIO;
- goto out;
- }
-
- /* Loop until all data is written */
- while (written < len) {
- int cnt = mtd->oobblock;
- this->data_poi = (u_char*) &buf[written];
- /* We use the same function for write and writev */
- if (eccbuf) {
- ret = nand_write_page (mtd, this, page, &eccbuf[oob], oobsel);
- oob += mtd->oobsize;
- } else
- ret = nand_write_page (mtd, this, page, NULL, oobsel);
-
- if (ret)
- goto out;
-
- /* Update written bytes count */
- written += cnt;
- /* Increment page address */
- page++;
- }
-
-out:
- /* De-select the NAND device */
- nand_deselect ();
-
- /* Wake up anyone waiting on the device */
- spin_lock_bh (&this->chip_lock);
- this->state = FL_READY;
- wake_up (&this->wq);
- spin_unlock_bh (&this->chip_lock);
-
- *retlen = written;
- return ret;
-}
-
-/*
- * NAND write out-of-band
- */
-static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
-{
- int i, column, page, status, ret = 0;
- struct nand_chip *this = mtd->priv;
-
- DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
-
- /* Shift to get page */
- page = ((int) to) >> this->page_shift;
-
- /* Mask to get column */
- column = to & 0x1f;
-
- /* Initialize return length value */
- *retlen = 0;
-
- /* Do not allow write past end of page */
- if ((column + len) > mtd->oobsize) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
- return -EINVAL;
- }
-
- /* Grab the lock and see if the device is available */
- nand_get_chip (this, mtd, FL_WRITING, NULL);
-
- /* Select the NAND device */
- nand_select ();
-
- /* Check the WP bit */
- this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
- if (!(readb (this->IO_ADDR_R) & 0x80)) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Device is write protected!!!\n");
- ret = -EIO;
- goto out;
- }
-
- /* Write out desired data */
- this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page);
- /* prepad 0xff for partial programming */
- for (i = 0; i < column; i++)
- writeb (0xff, this->IO_ADDR_W);
- /* write data */
- for (i = 0; i < len; i++)
- writeb (buf[i], this->IO_ADDR_W);
- /* postpad 0xff for partial programming */
- for (i = len + column; i < mtd->oobsize; i++)
- writeb (0xff, this->IO_ADDR_W);
-
- /* Send command to program the OOB data */
- this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
-
- status = this->waitfunc (mtd, this, FL_WRITING);
-
- /* See if device thinks it succeeded */
- if (status & 0x01) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
- ret = -EIO;
- goto out;
- }
- /* Return happy */
- *retlen = len;
-
-#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
- /* Send command to read back the data */
- this->cmdfunc (mtd, NAND_CMD_READOOB, column, page);
-
- /* Loop through and verify the data */
- for (i = 0; i < len; i++) {
- if (buf[i] != readb (this->IO_ADDR_R)) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
- ret = -EIO;
- goto out;
- }
- }
-#endif
-
-out:
- /* De-select the NAND device */
- nand_deselect ();
-
- /* Wake up anyone waiting on the device */
- spin_lock_bh (&this->chip_lock);
- this->state = FL_READY;
- wake_up (&this->wq);
- spin_unlock_bh (&this->chip_lock);
-
- return ret;
-}
-
-
-/*
- * NAND write with iovec
- */
-static int nand_writev (struct mtd_info *mtd, const struct iovec *vecs, unsigned long count,
- loff_t to, size_t * retlen)
-{
- return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, 0));
-}
-
-static int nand_writev_ecc (struct mtd_info *mtd, const struct iovec *vecs, unsigned long count,
- loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
-{
- int i, page, len, total_len, ret = 0, written = 0;
- struct nand_chip *this = mtd->priv;
-
- /* Calculate total length of data */
- total_len = 0;
- for (i = 0; i < count; i++)
- total_len += (int) vecs[i].iov_len;
-
- DEBUG (MTD_DEBUG_LEVEL3,
- "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
-
- /* Do not allow write past end of page */
- if ((to + total_len) > mtd->size) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
- return -EINVAL;
- }
-
- /* reject writes, which are not page aligned */
- if (NOTALIGNED (to) || NOTALIGNED(total_len)) {
- printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
- return -EINVAL;
- }
-
- // if oobsel is NULL, use chip defaults
- if (oobsel == NULL)
- oobsel = &mtd->oobinfo;
-
- /* Shift to get page */
- page = ((int) to) >> this->page_shift;
-
- /* Grab the lock and see if the device is available */
- nand_get_chip (this, mtd, FL_WRITING, NULL);
-
- /* Select the NAND device */
- nand_select ();
-
- /* Check the WP bit */
- this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
- if (!(readb (this->IO_ADDR_R) & 0x80)) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Device is write protected!!!\n");
- ret = -EIO;
- goto out;
- }
-
- /* Loop until all iovecs' data has been written */
- len = 0;
- while (count) {
- /*
- * Check, if the tuple gives us not enough data for a
- * full page write. Then we can use the iov direct,
- * else we have to copy into data_buf.
- */
- if ((vecs->iov_len - len) >= mtd->oobblock) {
- this->data_poi = (u_char *) vecs->iov_base;
- this->data_poi += len;
- len += mtd->oobblock;
- /* Check, if we have to switch to the next tuple */
- if (len >= (int) vecs->iov_len) {
- vecs++;
- len = 0;
- count--;
- }
- } else {
- /*
- * Read data out of each tuple until we have a full page
- * to write or we've read all the tuples.
- */
- int cnt = 0;
- while ((cnt < mtd->oobblock) && count) {
- if (vecs->iov_base != NULL && vecs->iov_len) {
- this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
- }
- /* Check, if we have to switch to the next tuple */
- if (len >= (int) vecs->iov_len) {
- vecs++;
- len = 0;
- count--;
- }
- }
- this->data_poi = this->data_buf;
- }
-
- /* We use the same function for write and writev !) */
- ret = nand_write_page (mtd, this, page, NULL, oobsel);
- if (ret)
- goto out;
-
- /* Update written bytes count */
- written += mtd->oobblock;
-
- /* Increment page address */
- page++;
- }
-
-out:
- /* De-select the NAND device */
- nand_deselect ();
-
- /* Wake up anyone waiting on the device */
- spin_lock_bh (&this->chip_lock);
- this->state = FL_READY;
- wake_up (&this->wq);
- spin_unlock_bh (&this->chip_lock);
-
- *retlen = written;
- return ret;
-}
-
-/*
- * NAND erase a block
- */
-static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
-{
- int page, len, status, pages_per_block, ret;
- struct nand_chip *this = mtd->priv;
- DECLARE_WAITQUEUE (wait, current);
-
- DEBUG (MTD_DEBUG_LEVEL3,
- "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
-
- /* Start address must align on block boundary */
- if (instr->addr & (mtd->erasesize - 1)) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
- return -EINVAL;
- }
-
- /* Length must align on block boundary */
- if (instr->len & (mtd->erasesize - 1)) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
- return -EINVAL;
- }
-
- /* Do not allow erase past end of device */
- if ((instr->len + instr->addr) > mtd->size) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
- return -EINVAL;
- }
-
- /* Grab the lock and see if the device is available */
- nand_get_chip (this, mtd, FL_ERASING, NULL);
-
- /* Shift to get first page */
- page = (int) (instr->addr >> this->page_shift);
-
- /* Calculate pages in each block */
- pages_per_block = mtd->erasesize / mtd->oobblock;
-
- /* Select the NAND device */
- nand_select ();
-
- /* Check the WP bit */
- this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
- if (!(readb (this->IO_ADDR_R) & 0x80)) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
- instr->state = MTD_ERASE_FAILED;
- goto erase_exit;
- }
-
- /* Loop through the pages */
- len = instr->len;
-
- instr->state = MTD_ERASING;
-
- while (len) {
- /* Check if we have a bad block, we do not erase bad blocks ! */
- this->cmdfunc (mtd, NAND_CMD_READOOB, NAND_BADBLOCK_POS, page);
- if (readb (this->IO_ADDR_R) != 0xff) {
- printk (KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page);
- instr->state = MTD_ERASE_FAILED;
- goto erase_exit;
- }
-
- /* Send commands to erase a page */
- this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
- this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
-
- spin_unlock_bh (&this->chip_lock);
- status = this->waitfunc (mtd, this, FL_ERASING);
-
- /* Get spinlock, in case we exit */
- spin_lock_bh (&this->chip_lock);
- /* See if block erase succeeded */
- if (status & 0x01) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
- instr->state = MTD_ERASE_FAILED;
- goto erase_exit;
- }
-
- /* Check, if we were interupted */
- if (this->state == FL_ERASING) {
- /* Increment page address and decrement length */
- len -= mtd->erasesize;
- page += pages_per_block;
- }
- /* Release the spin lock */
- spin_unlock_bh (&this->chip_lock);
-erase_retry:
- spin_lock_bh (&this->chip_lock);
- /* Check the state and sleep if it changed */
- if (this->state == FL_ERASING || this->state == FL_READY) {
- /* Select the NAND device again, if we were interrupted */
- this->state = FL_ERASING;
- nand_select ();
- continue;
- } else {
- set_current_state (TASK_UNINTERRUPTIBLE);
- add_wait_queue (&this->wq, &wait);
- spin_unlock_bh (&this->chip_lock);
- schedule ();
- remove_wait_queue (&this->wq, &wait);
- goto erase_retry;
- }
- }
- instr->state = MTD_ERASE_DONE;
-
-erase_exit:
- /* De-select the NAND device */
- nand_deselect ();
- spin_unlock_bh (&this->chip_lock);
-
- ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
- /* Do call back function */
- if (!ret && instr->callback)
- instr->callback (instr);
-
- /* The device is ready */
- spin_lock_bh (&this->chip_lock);
- this->state = FL_READY;
- spin_unlock_bh (&this->chip_lock);
-
- /* Return more or less happy */
- return ret;
-}
-
-/*
- * NAND sync
- */
-static void nand_sync (struct mtd_info *mtd)
-{
- struct nand_chip *this = mtd->priv;
- DECLARE_WAITQUEUE (wait, current);
-
- DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
-
-retry:
- /* Grab the spinlock */
- spin_lock_bh (&this->chip_lock);
-
- /* See what's going on */
- switch (this->state) {
- case FL_READY:
- case FL_SYNCING:
- this->state = FL_SYNCING;
- spin_unlock_bh (&this->chip_lock);
- break;
-
- default:
- /* Not an idle state */
- add_wait_queue (&this->wq, &wait);
- spin_unlock_bh (&this->chip_lock);
- schedule ();
-
- remove_wait_queue (&this->wq, &wait);
- goto retry;
- }
-
- /* Lock the device */
- spin_lock_bh (&this->chip_lock);
-
- /* Set the device to be ready again */
- if (this->state == FL_SYNCING) {
- this->state = FL_READY;
- wake_up (&this->wq);
- }
-
- /* Unlock the device */
- spin_unlock_bh (&this->chip_lock);
-}
-
-/*
- * Scan for the NAND device
- */
-int nand_scan (struct mtd_info *mtd)
-{
- int i, nand_maf_id, nand_dev_id;
- struct nand_chip *this = mtd->priv;
-
- /* check for proper chip_delay setup, set 20us if not */
- if (!this->chip_delay)
- this->chip_delay = 20;
-
- /* check, if a user supplied command function given */
- if (this->cmdfunc == NULL)
- this->cmdfunc = nand_command;
-
- /* check, if a user supplied wait function given */
- if (this->waitfunc == NULL)
- this->waitfunc = nand_wait;
-
- /* Select the device */
- nand_select ();
-
- /* Send the command for reading device ID */
- this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
-
- /* Read manufacturer and device IDs */
- nand_maf_id = readb (this->IO_ADDR_R);
- nand_dev_id = readb (this->IO_ADDR_R);
-
- /* Print and store flash device information */
- for (i = 0; nand_flash_ids[i].name != NULL; i++) {
- if (nand_dev_id == nand_flash_ids[i].id && !mtd->size) {
- mtd->name = nand_flash_ids[i].name;
- mtd->erasesize = nand_flash_ids[i].erasesize;
- mtd->size = (1 << nand_flash_ids[i].chipshift);
- mtd->eccsize = 256;
- if (nand_flash_ids[i].page256) {
- mtd->oobblock = 256;
- mtd->oobsize = 8;
- this->page_shift = 8;
- } else {
- mtd->oobblock = 512;
- mtd->oobsize = 16;
- this->page_shift = 9;
- }
- /* Try to identify manufacturer */
- for (i = 0; nand_manuf_ids[i].id != 0x0; i++) {
- if (nand_manuf_ids[i].id == nand_maf_id)
- break;
- }
- printk (KERN_INFO "NAND device: Manufacture ID:"
- " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
- nand_manuf_ids[i].name , mtd->name);
- break;
- }
- }
-
- /*
- * check ECC mode, default to software
- * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
- * fallback to software ECC
- */
- this->eccsize = 256; /* set default eccsize */
-
- switch (this->eccmode) {
-
- case NAND_ECC_HW3_512:
- if (mtd->oobblock == 256) {
- printk (KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");
- this->eccmode = NAND_ECC_SOFT;
- this->calculate_ecc = nand_calculate_ecc;
- this->correct_data = nand_correct_data;
- break;
- } else
- this->eccsize = 512; /* set eccsize to 512 and fall through for function check */
-
- case NAND_ECC_HW3_256:
- if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
- break;
- printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");
- BUG();
-
- case NAND_ECC_NONE:
- printk (KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n");
- this->eccmode = NAND_ECC_NONE;
- break;
-
- case NAND_ECC_SOFT:
- this->calculate_ecc = nand_calculate_ecc;
- this->correct_data = nand_correct_data;
- break;
-
- default:
- printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
- BUG();
- }
-
- /* Initialize state, waitqueue and spinlock */
- this->state = FL_READY;
- init_waitqueue_head (&this->wq);
- spin_lock_init (&this->chip_lock);
-
- /* De-select the device */
- nand_deselect ();
-
- /* Print warning message for no device */
- if (!mtd->size) {
- printk (KERN_WARNING "No NAND device found!!!\n");
- return 1;
- }
-
- /* Fill in remaining MTD driver data */
- mtd->type = MTD_NANDFLASH;
- mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
- mtd->ecctype = MTD_ECC_SW;
- mtd->erase = nand_erase;
- mtd->point = NULL;
- mtd->unpoint = NULL;
- mtd->read = nand_read;
- mtd->write = nand_write;
- mtd->read_ecc = nand_read_ecc;
- mtd->write_ecc = nand_write_ecc;
- mtd->read_oob = nand_read_oob;
- mtd->write_oob = nand_write_oob;
- mtd->readv = NULL;
- mtd->writev = nand_writev;
- mtd->writev_ecc = nand_writev_ecc;
- mtd->sync = nand_sync;
- mtd->lock = NULL;
- mtd->unlock = NULL;
- mtd->suspend = NULL;
- mtd->resume = NULL;
- mtd->owner = THIS_MODULE;
-
- /* Return happy */
- return 0;
-}
-
-EXPORT_SYMBOL (nand_scan);
-
-MODULE_LICENSE ("GPL");
-MODULE_AUTHOR ("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
-MODULE_DESCRIPTION ("Generic NAND flash driver code");
+++ /dev/null
-/* auto_irq.c: Auto-configure IRQ lines for linux. */
-/*
- Written 1994 by Donald Becker.
-
- The author may be reached as becker@scyld.com
-
- This code is a general-purpose IRQ line detector for devices with
- jumpered IRQ lines. If you can make the device raise an IRQ (and
- that IRQ line isn't already being used), these routines will tell
- you what IRQ line it's using -- perfect for those oh-so-cool boot-time
- device probes!
-
- To use this, first call autoirq_setup(timeout). TIMEOUT is how many
- 'jiffies' (1/100 sec.) to detect other devices that have active IRQ lines,
- and can usually be zero at boot. 'autoirq_setup()' returns the bit
- vector of nominally-available IRQ lines (lines may be physically in-use,
- but not yet registered to a device).
- Next, set up your device to trigger an interrupt.
- Finally call autoirq_report(TIMEOUT) to find out which IRQ line was
- most recently active. The TIMEOUT should usually be zero, but may
- be set to the number of jiffies to wait for a slow device to raise an IRQ.
-
- The idea of using the setup timeout to filter out bogus IRQs came from
- the serial driver.
-*/
-
-
-#ifdef version
-static const char *version=
-"auto_irq.c:v1.11 Donald Becker (becker@scyld.com)";
-#endif
-
-#include <linux/module.h>
-#include <linux/jiffies.h>
-#include <linux/delay.h>
-#include <asm/bitops.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <linux/netdevice.h>
-
-static unsigned long irqs;
-
-void autoirq_setup(int waittime)
-{
- irqs = probe_irq_on();
-}
-
-#define BUSY_LOOP_UNTIL(j) while ((long)(jiffies-(j)) < 0) ;
-int autoirq_report(int waittime)
-{
- unsigned long delay = jiffies + waittime;
- BUSY_LOOP_UNTIL(delay)
- return probe_irq_off(irqs);
-}
-
-EXPORT_SYMBOL(autoirq_setup);
-EXPORT_SYMBOL(autoirq_report);
-
-\f
-/*
- * Local variables:
- * compile-command: "gcc -DKERNEL -Wall -O6 -fomit-frame-pointer -I/usr/src/linux/net/tcp -c auto_irq.c"
- * version-control: t
- * kept-new-versions: 5
- * c-indent-level: 4
- * tab-width: 4
- * End:
- */
+++ /dev/null
-/*
-
- ne2k_cbus.c: A driver for the NE2000 like ethernet on NEC PC-9800.
-
- This is a copy of the 2.5.66 Linux ISA NE2000 driver "ne.c"
- (Donald Becker/Paul Gortmaker) with the NEC PC-9800 specific
- changes added by Osamu Tomita.
-
-From ne.c:
------------
- Copyright 1993 United States Government as represented by the
- Director, National Security Agency.
-
- This software may be used and distributed according to the terms
- of the GNU General Public License, incorporated herein by reference.
------------
-
-*/
-
-/* Routines for the NatSemi-based designs (NE[12]000). */
-
-static const char version[] =
-"ne2k_cbus.c:v1.0 3/24/03 Osamu Tomita\n";
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/isapnp.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-
-#include <asm/system.h>
-#include <asm/io.h>
-
-#include "8390.h"
-
-/* Some defines that people can play with if so inclined. */
-
-/* Do we support clones that don't adhere to 14,15 of the SAprom ? */
-#define SUPPORT_NE_BAD_CLONES
-
-/* Do we perform extra sanity checks on stuff ? */
-/* #define NE_SANITY_CHECK */
-
-/* Do we implement the read before write bugfix ? */
-/* #define NE_RW_BUGFIX */
-
-/* Do we have a non std. amount of memory? (in units of 256 byte pages) */
-/* #define PACKETBUF_MEMSIZE 0x40 */
-
-#ifdef SUPPORT_NE_BAD_CLONES
-/* A list of bad clones that we none-the-less recognize. */
-static struct { const char *name8, *name16; unsigned char SAprefix[4];}
-bad_clone_list[] __initdata = {
- {"LA/T-98?", "LA/T-98", {0x00, 0xa0, 0xb0}}, /* I/O Data */
- {"EGY-98?", "EGY-98", {0x00, 0x40, 0x26}}, /* Melco EGY98 */
- {"ICM?", "ICM-27xx-ET", {0x00, 0x80, 0xc8}}, /* ICM IF-27xx-ET */
- {"CNET-98/EL?", "CNET(98)E/L", {0x00, 0x80, 0x4C}}, /* Contec CNET-98/EL */
- {0,}
-};
-#endif
-
-/* ---- No user-serviceable parts below ---- */
-
-#define NE_BASE (dev->base_addr)
-#define NE_CMD EI_SHIFT(0x00)
-#define NE_DATAPORT EI_SHIFT(0x10) /* NatSemi-defined port window offset. */
-#define NE_RESET EI_SHIFT(0x1f) /* Issue a read to reset, a write to clear. */
-#define NE_IO_EXTENT 0x20
-
-#define NE1SM_START_PG 0x20 /* First page of TX buffer */
-#define NE1SM_STOP_PG 0x40 /* Last page +1 of RX ring */
-#define NESM_START_PG 0x40 /* First page of TX buffer */
-#define NESM_STOP_PG 0x80 /* Last page +1 of RX ring */
-
-#include "ne2k_cbus.h"
-
-static int ne_probe1(struct net_device *dev, int ioaddr);
-static int ne_open(struct net_device *dev);
-static int ne_close(struct net_device *dev);
-
-static void ne_reset_8390(struct net_device *dev);
-static void ne_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *hdr,
- int ring_page);
-static void ne_block_input(struct net_device *dev, int count,
- struct sk_buff *skb, int ring_offset);
-static void ne_block_output(struct net_device *dev, const int count,
- const unsigned char *buf, const int start_page);
-
-\f
-/* Probe for various non-shared-memory ethercards.
-
- NEx000-clone boards have a Station Address PROM (SAPROM) in the packet
- buffer memory space. NE2000 clones have 0x57,0x57 in bytes 0x0e,0x0f of
- the SAPROM, while other supposed NE2000 clones must be detected by their
- SA prefix.
-
- Reading the SAPROM from a word-wide card with the 8390 set in byte-wide
- mode results in doubled values, which can be detected and compensated for.
-
- The probe is also responsible for initializing the card and filling
- in the 'dev' and 'ei_status' structures.
-
- We use the minimum memory size for some ethercard product lines, iff we can't
- distinguish models. You can increase the packet buffer size by setting
- PACKETBUF_MEMSIZE. Reported Cabletron packet buffer locations are:
- E1010 starts at 0x100 and ends at 0x2000.
- E1010-x starts at 0x100 and ends at 0x8000. ("-x" means "more memory")
- E2010 starts at 0x100 and ends at 0x4000.
- E2010-x starts at 0x100 and ends at 0xffff. */
-
-static int __init do_ne_probe(struct net_device *dev)
-{
- unsigned int base_addr = dev->base_addr;
- int irq = dev->irq;
-
- SET_MODULE_OWNER(dev);
-
- if (ei_debug > 2)
- printk(KERN_DEBUG "ne_probe(): entered.\n");
-
- /* If CONFIG_NET_CBUS,
- we need dev->priv->reg_offset BEFORE to probe */
- if (ne2k_cbus_init(dev) != 0)
- return -ENOMEM;
-
- /* First check any supplied i/o locations. User knows best. <cough> */
- if (base_addr > 0) {
- int result;
- const struct ne2k_cbus_hwinfo *hw = ne2k_cbus_get_hwinfo((int)(dev->mem_start & NE2K_CBUS_HARDWARE_TYPE_MASK));
-
- if (ei_debug > 2)
- printk(KERN_DEBUG "ne_probe(): call ne_probe_cbus(base_addr=0x%x)\n", base_addr);
-
- result = ne_probe_cbus(dev, hw, base_addr, irq);
- if (result != 0)
- ne2k_cbus_destroy(dev);
-
- return result;
- }
-
- if (ei_debug > 2)
- printk(KERN_DEBUG "ne_probe(): base_addr is not specified.\n");
-
-#ifndef MODULE
- /* Last resort. The semi-risky C-Bus auto-probe. */
- if (ei_debug > 2)
- printk(KERN_DEBUG "ne_probe(): auto-probe start.\n");
-
- {
- const struct ne2k_cbus_hwinfo *hw = ne2k_cbus_get_hwinfo((int)(dev->mem_start & NE2K_CBUS_HARDWARE_TYPE_MASK));
-
- if (hw && hw->hwtype) {
- const unsigned short *plist;
- for (plist = hw->portlist; *plist; plist++)
- if (ne_probe_cbus(dev, hw, *plist, irq) == 0)
- return 0;
- } else {
- for (hw = &ne2k_cbus_hwinfo_list[0]; hw->hwtype; hw++) {
- const unsigned short *plist;
- for (plist = hw->portlist; *plist; plist++)
- if (ne_probe_cbus(dev, hw, *plist, irq) == 0)
- return 0;
- }
- }
- }
-#endif
-
- ne2k_cbus_destroy(dev);
-
- return -ENODEV;
-}
-
-static void cleanup_card(struct net_device *dev)
-{
- const struct ne2k_cbus_region *rlist;
- const struct ne2k_cbus_hwinfo *hw = ne2k_cbus_get_hwinfo((int)(dev->mem_start & NE2K_CBUS_HARDWARE_TYPE_MASK));
-
- free_irq(dev->irq, dev);
- for (rlist = hw->regionlist; rlist->range; rlist++) {
- release_region(dev->base_addr + rlist->start,
- rlist->range);
- }
- ne2k_cbus_destroy(dev);
-}
-
-struct net_device * __init ne_probe(int unit)
-{
- struct net_device *dev = alloc_ei_netdev();
- int err;
-
- if (!dev)
- return ERR_PTR(-ENOMEM);
-
- sprintf(dev->name, "eth%d", unit);
- netdev_boot_setup_check(dev);
-
- err = do_ne_probe(dev);
- if (err)
- goto out;
- err = register_netdev(dev);
- if (err)
- goto out1;
- return dev;
-out1:
- cleanup_card(dev);
-out:
- free_netdev(dev);
- return ERR_PTR(err);
-}
-
-static int __init ne_probe_cbus(struct net_device *dev, const struct ne2k_cbus_hwinfo *hw, int ioaddr, int irq)
-{
- if (ei_debug > 2)
- printk(KERN_DEBUG "ne_probe_cbus(): entered. (called from %p)\n",
- __builtin_return_address(0));
-
- if (hw && hw->hwtype) {
- ne2k_cbus_set_hwtype(dev, hw, ioaddr);
- dev->irq = irq;
- return ne_probe1(dev, ioaddr);
- } else {
- /* auto detect */
-
- printk(KERN_DEBUG "ne_probe_cbus(): try to determine hardware types.\n");
- for (hw = &ne2k_cbus_hwinfo_list[0]; hw->hwtype; hw++) {
- ne2k_cbus_set_hwtype(dev, hw, ioaddr);
- dev->irq = irq;
- if (ne_probe1(dev, ioaddr) == 0)
- return 0;
- }
- }
- return -ENODEV;
-}
-
-static int __init ne_probe1(struct net_device *dev, int ioaddr)
-{
- int i;
- unsigned char SA_prom[32];
- int wordlength = 2;
- const char *name = NULL;
- int start_page, stop_page;
- int neX000, bad_card;
- int reg0, ret;
- static unsigned version_printed;
- const struct ne2k_cbus_region *rlist;
- const struct ne2k_cbus_hwinfo *hw = ne2k_cbus_get_hwinfo((int)(dev->mem_start & NE2K_CBUS_HARDWARE_TYPE_MASK));
- struct ei_device *ei_local = (struct ei_device *)(dev->priv);
-
-#ifdef CONFIG_NE2K_CBUS_CNET98EL
- if (hw->hwtype == NE2K_CBUS_HARDWARE_TYPE_CNET98EL) {
- outb_p(0, CONFIG_NE2K_CBUS_CNET98EL_IO_BASE);
- /* udelay(5000); */
- outb_p(1, CONFIG_NE2K_CBUS_CNET98EL_IO_BASE);
- /* udelay(5000); */
- outb_p((ioaddr & 0xf000) >> 8 | 0x08 | 0x01, CONFIG_NE2K_CBUS_CNET98EL_IO_BASE + 2);
- /* udelay(5000); */
- }
-#endif
-
- for (rlist = hw->regionlist; rlist->range; rlist++)
- if (!request_region(ioaddr + rlist->start,
- rlist->range, dev->name)) {
- ret = -EBUSY;
- goto err_out;
- }
-
- reg0 = inb_p(ioaddr + EI_SHIFT(0));
- if (reg0 == 0xFF) {
- ret = -ENODEV;
- goto err_out;
- }
-
- /* Do a preliminary verification that we have a 8390. */
-#ifdef CONFIG_NE2K_CBUS_CNET98EL
- if (hw->hwtype != NE2K_CBUS_HARDWARE_TYPE_CNET98EL)
-#endif
- {
- int regd;
- outb_p(E8390_NODMA+E8390_PAGE1+E8390_STOP, ioaddr + E8390_CMD);
- regd = inb_p(ioaddr + EI_SHIFT(0x0d));
- outb_p(0xff, ioaddr + EI_SHIFT(0x0d));
- outb_p(E8390_NODMA+E8390_PAGE0, ioaddr + E8390_CMD);
- inb_p(ioaddr + EN0_COUNTER0); /* Clear the counter by reading. */
- if (inb_p(ioaddr + EN0_COUNTER0) != 0) {
- outb_p(reg0, ioaddr);
- outb_p(regd, ioaddr + EI_SHIFT(0x0d)); /* Restore the old values. */
- ret = -ENODEV;
- goto err_out;
- }
- }
-
- if (ei_debug && version_printed++ == 0)
- printk(KERN_INFO "%s", version);
-
- printk(KERN_INFO "NE*000 ethercard probe at %#3x:", ioaddr);
-
- /* A user with a poor card that fails to ack the reset, or that
- does not have a valid 0x57,0x57 signature can still use this
- without having to recompile. Specifying an i/o address along
- with an otherwise unused dev->mem_end value of "0xBAD" will
- cause the driver to skip these parts of the probe. */
-
- bad_card = ((dev->base_addr != 0) && (dev->mem_end == 0xbad));
-
- /* Reset card. Who knows what dain-bramaged state it was left in. */
-
- {
- unsigned long reset_start_time = jiffies;
-
- /* derived from CNET98EL-patch for bad clones */
- outb_p(E8390_NODMA | E8390_STOP, ioaddr + E8390_CMD);
-
- /* DON'T change these to inb_p/outb_p or reset will fail on clones. */
- outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET);
-
- while ((inb_p(ioaddr + EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
- if (bad_card) {
- printk(" (warning: no reset ack)");
- break;
- } else {
- printk(" not found (no reset ack).\n");
- ret = -ENODEV;
- goto err_out;
- }
- }
-
- outb_p(0xff, ioaddr + EN0_ISR); /* Ack all intr. */
- }
-
-#ifdef CONFIG_NE2K_CBUS_CNET98EL
- if (hw->hwtype == NE2K_CBUS_HARDWARE_TYPE_CNET98EL) {
- static const char pat[32] ="AbcdeFghijKlmnoPqrstUvwxyZ789012";
- char buf[32];
- int maxwait = 200;
-
- if (ei_debug > 2)
- printk(" [CNET98EL-specific initialize...");
- outb_p(E8390_NODMA | E8390_STOP, ioaddr + E8390_CMD); /* 0x20|0x1 */
- ret = -ENODEV;
- i = inb(ioaddr);
- if ((i & ~0x2) != (0x20 | 0x01))
- goto err_out;
- if ((inb(ioaddr + 0x7) & 0x80) != 0x80)
- goto err_out;
- outb_p(E8390_RXOFF, ioaddr + EN0_RXCR); /* out(ioaddr+0xc, 0x20) */
- /* outb_p(ENDCFG_WTS|ENDCFG_FT1|ENDCFG_LS, ioaddr+EN0_DCFG); */
- outb_p(ENDCFG_WTS | 0x48, ioaddr + EN0_DCFG); /* 0x49 */
- outb_p(CNET98EL_START_PG, ioaddr + EN0_STARTPG);
- outb_p(CNET98EL_STOP_PG, ioaddr + EN0_STOPPG);
- if (ei_debug > 2)
- printk("memory check");
- for (i = 0; i < 65536; i += 1024) {
- if (ei_debug > 2)
- printk(" %04x", i);
- ne2k_cbus_writemem(dev, ioaddr, i, pat, 32);
- while (((inb(ioaddr + EN0_ISR) & ENISR_RDC) != ENISR_RDC) && --maxwait)
- ;
- ne2k_cbus_readmem(dev, ioaddr, i, buf, 32);
- if (memcmp(pat, buf, 32)) {
- if (ei_debug > 2)
- printk(" failed.");
- break;
- }
- }
- if (i != 16384) {
- if (ei_debug > 2)
- printk("] ");
- printk("memory failure at %x\n", i);
- goto err_out;
- }
- if (ei_debug > 2)
- printk(" good...");
- if (!dev->irq) {
- if (ei_debug > 2)
- printk("] ");
- printk("IRQ must be specified for C-NET(98)E/L. probe failed.\n");
- goto err_out;
- }
- outb((dev->irq > 5) ? (dev->irq & 4):(dev->irq >> 1), ioaddr + (0x2 | 0x400));
- outb(0x7e, ioaddr + (0x4 | 0x400));
- ne2k_cbus_readmem(dev, ioaddr, 16384, SA_prom, 32);
- outb(0xff, ioaddr + EN0_ISR);
- if (ei_debug > 2)
- printk("done]");
- } else
-#endif /* CONFIG_NE2K_CBUS_CNET98EL */
- /* Read the 16 bytes of station address PROM.
- We must first initialize registers, similar to NS8390_init(eifdev, 0).
- We can't reliably read the SAPROM address without this.
- (I learned the hard way!). */
- {
- struct {unsigned char value; unsigned short offset;} program_seq[] =
- {
- {E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD}, /* Select page 0*/
- /* NEC PC-9800: some board can only handle word-wide access? */
- {0x48 | ENDCFG_WTS, EN0_DCFG}, /* Set word-wide (0x48) access. */
- {16384 / 256, EN0_STARTPG},
- {32768 / 256, EN0_STOPPG},
- {0x00, EN0_RCNTLO}, /* Clear the count regs. */
- {0x00, EN0_RCNTHI},
- {0x00, EN0_IMR}, /* Mask completion irq. */
- {0xFF, EN0_ISR},
- {E8390_RXOFF, EN0_RXCR}, /* 0x20 Set to monitor */
- {E8390_TXOFF, EN0_TXCR}, /* 0x02 and loopback mode. */
- {32, EN0_RCNTLO},
- {0x00, EN0_RCNTHI},
- {0x00, EN0_RSARLO}, /* DMA starting at 0x0000. */
- {0x00, EN0_RSARHI},
- {E8390_RREAD+E8390_START, E8390_CMD},
- };
-
- for (i = 0; i < sizeof(program_seq)/sizeof(program_seq[0]); i++)
- outb_p(program_seq[i].value, ioaddr + program_seq[i].offset);
- insw(ioaddr + NE_DATAPORT, SA_prom, 32 >> 1);
-
- }
-
- if (wordlength == 2)
- {
- for (i = 0; i < 16; i++)
- SA_prom[i] = SA_prom[i+i];
- start_page = NESM_START_PG;
- stop_page = NESM_STOP_PG;
-#ifdef CONFIG_NE2K_CBUS_CNET98EL
- if (hw->hwtype == NE2K_CBUS_HARDWARE_TYPE_CNET98EL) {
- start_page = CNET98EL_START_PG;
- stop_page = CNET98EL_STOP_PG;
- }
-#endif
- } else {
- start_page = NE1SM_START_PG;
- stop_page = NE1SM_STOP_PG;
- }
-
- neX000 = (SA_prom[14] == 0x57 && SA_prom[15] == 0x57);
- if (neX000) {
- name = "C-Bus-NE2K-compat";
- }
- else
- {
-#ifdef SUPPORT_NE_BAD_CLONES
- /* Ack! Well, there might be a *bad* NE*000 clone there.
- Check for total bogus addresses. */
- for (i = 0; bad_clone_list[i].name8; i++)
- {
- if (SA_prom[0] == bad_clone_list[i].SAprefix[0] &&
- SA_prom[1] == bad_clone_list[i].SAprefix[1] &&
- SA_prom[2] == bad_clone_list[i].SAprefix[2])
- {
- if (wordlength == 2)
- {
- name = bad_clone_list[i].name16;
- } else {
- name = bad_clone_list[i].name8;
- }
- break;
- }
- }
- if (bad_clone_list[i].name8 == NULL)
- {
- printk(" not found (invalid signature %2.2x %2.2x).\n",
- SA_prom[14], SA_prom[15]);
- ret = -ENXIO;
- goto err_out;
- }
-#else
- printk(" not found.\n");
- ret = -ENXIO;
- goto err_out;
-#endif
- }
-
- if (dev->irq < 2)
- {
- unsigned long cookie = probe_irq_on();
- outb_p(0x50, ioaddr + EN0_IMR); /* Enable one interrupt. */
- outb_p(0x00, ioaddr + EN0_RCNTLO);
- outb_p(0x00, ioaddr + EN0_RCNTHI);
- outb_p(E8390_RREAD+E8390_START, ioaddr); /* Trigger it... */
- mdelay(10); /* wait 10ms for interrupt to propagate */
- outb_p(0x00, ioaddr + EN0_IMR); /* Mask it again. */
- dev->irq = probe_irq_off(cookie);
- if (ei_debug > 2)
- printk(" autoirq is %d\n", dev->irq);
- } else if (dev->irq == 7)
- /* Fixup for users that don't know that IRQ 7 is really IRQ 11,
- or don't know which one to set. */
- dev->irq = 11;
-
- if (! dev->irq) {
- printk(" failed to detect IRQ line.\n");
- ret = -EAGAIN;
- goto err_out;
- }
-
- /* Snarf the interrupt now. There's no point in waiting since we cannot
- share and the board will usually be enabled. */
- ret = request_irq(dev->irq, ei_interrupt, 0, name, dev);
- if (ret) {
- printk (" unable to get IRQ %d (errno=%d).\n", dev->irq, ret);
- goto err_out_kfree;
- }
-
- dev->base_addr = ioaddr;
-
- for(i = 0; i < ETHER_ADDR_LEN; i++) {
- printk(" %2.2x", SA_prom[i]);
- dev->dev_addr[i] = SA_prom[i];
- }
-
- printk("\n%s: %s found at %#x, hardware type %d(%s), using IRQ %d.\n",
- dev->name, name, ioaddr, hw->hwtype, hw->hwident, dev->irq);
-
- ei_status.name = name;
- ei_status.tx_start_page = start_page;
- ei_status.stop_page = stop_page;
- ei_status.word16 = (wordlength == 2);
-
- ei_status.rx_start_page = start_page + TX_PAGES;
-#ifdef PACKETBUF_MEMSIZE
- /* Allow the packet buffer size to be overridden by know-it-alls. */
- ei_status.stop_page = ei_status.tx_start_page + PACKETBUF_MEMSIZE;
-#endif
-
- ei_status.reset_8390 = &ne_reset_8390;
- ei_status.block_input = &ne_block_input;
- ei_status.block_output = &ne_block_output;
- ei_status.get_8390_hdr = &ne_get_8390_hdr;
- ei_status.priv = 0;
- dev->open = &ne_open;
- dev->stop = &ne_close;
-#ifdef CONFIG_NET_POLL_CONTROLLER
- dev->poll_controller = ei_poll;
-#endif
- NS8390_init(dev, 0);
- return 0;
-
-err_out_kfree:
- ne2k_cbus_destroy(dev);
-err_out:
- while (rlist > hw->regionlist) {
- rlist --;
- release_region(ioaddr + rlist->start, rlist->range);
- }
- return ret;
-}
-
-static int ne_open(struct net_device *dev)
-{
- ei_open(dev);
- return 0;
-}
-
-static int ne_close(struct net_device *dev)
-{
- if (ei_debug > 1)
- printk(KERN_DEBUG "%s: Shutting down ethercard.\n", dev->name);
- ei_close(dev);
- return 0;
-}
-
-/* Hard reset the card. This used to pause for the same period that a
- 8390 reset command required, but that shouldn't be necessary. */
-
-static void ne_reset_8390(struct net_device *dev)
-{
- unsigned long reset_start_time = jiffies;
- struct ei_device *ei_local = (struct ei_device *)(dev->priv);
-
- if (ei_debug > 1)
- printk(KERN_DEBUG "resetting the 8390 t=%ld...", jiffies);
-
- /* derived from CNET98EL-patch for bad clones... */
- outb_p(E8390_NODMA | E8390_STOP, NE_BASE + E8390_CMD); /* 0x20 | 0x1 */
-
- /* DON'T change these to inb_p/outb_p or reset will fail on clones. */
- outb(inb(NE_BASE + NE_RESET), NE_BASE + NE_RESET);
-
- ei_status.txing = 0;
- ei_status.dmaing = 0;
-
- /* This check _should_not_ be necessary, omit eventually. */
- while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
- printk(KERN_WARNING "%s: ne_reset_8390() did not complete.\n", dev->name);
- break;
- }
- outb_p(ENISR_RESET, NE_BASE + EN0_ISR); /* Ack intr. */
-}
-
-/* Grab the 8390 specific header. Similar to the block_input routine, but
- we don't need to be concerned with ring wrap as the header will be at
- the start of a page, so we optimize accordingly. */
-
-static void ne_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *hdr, int ring_page)
-{
- int nic_base = dev->base_addr;
- struct ei_device *ei_local = (struct ei_device *)(dev->priv);
-
- /* This *shouldn't* happen. If it does, it's the last thing you'll see */
-
- if (ei_status.dmaing)
- {
- printk(KERN_EMERG "%s: DMAing conflict in ne_get_8390_hdr "
- "[DMAstat:%d][irqlock:%d].\n",
- dev->name, ei_status.dmaing, ei_status.irqlock);
- return;
- }
-
- ei_status.dmaing |= 0x01;
- outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);
- outb_p(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);
- outb_p(0, nic_base + EN0_RCNTHI);
- outb_p(0, nic_base + EN0_RSARLO); /* On page boundary */
- outb_p(ring_page, nic_base + EN0_RSARHI);
- outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);
-
- if (ei_status.word16)
- insw(NE_BASE + NE_DATAPORT, hdr, sizeof(struct e8390_pkt_hdr)>>1);
- else
- insb(NE_BASE + NE_DATAPORT, hdr, sizeof(struct e8390_pkt_hdr));
-
- outb_p(ENISR_RDC, nic_base + EN0_ISR); /* Ack intr. */
- ei_status.dmaing &= ~0x01;
-
- le16_to_cpus(&hdr->count);
-}
-
-/* Block input and output, similar to the Crynwr packet driver. If you
- are porting to a new ethercard, look at the packet driver source for hints.
- The NEx000 doesn't share the on-board packet memory -- you have to put
- the packet out through the "remote DMA" dataport using outb. */
-
-static void ne_block_input(struct net_device *dev, int count, struct sk_buff *skb, int ring_offset)
-{
-#ifdef NE_SANITY_CHECK
- int xfer_count = count;
-#endif
- int nic_base = dev->base_addr;
- char *buf = skb->data;
- struct ei_device *ei_local = (struct ei_device *)(dev->priv);
-
- /* This *shouldn't* happen. If it does, it's the last thing you'll see */
- if (ei_status.dmaing)
- {
- printk(KERN_EMERG "%s: DMAing conflict in ne_block_input "
- "[DMAstat:%d][irqlock:%d].\n",
- dev->name, ei_status.dmaing, ei_status.irqlock);
- return;
- }
- ei_status.dmaing |= 0x01;
-
- /* round up count to a word (derived from ICM-patch) */
- count = (count + 1) & ~1;
-
- outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);
- outb_p(count & 0xff, nic_base + EN0_RCNTLO);
- outb_p(count >> 8, nic_base + EN0_RCNTHI);
- outb_p(ring_offset & 0xff, nic_base + EN0_RSARLO);
- outb_p(ring_offset >> 8, nic_base + EN0_RSARHI);
- outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);
- if (ei_status.word16)
- {
- insw(NE_BASE + NE_DATAPORT,buf,count>>1);
- if (count & 0x01)
- {
- buf[count-1] = inb(NE_BASE + NE_DATAPORT);
-#ifdef NE_SANITY_CHECK
- xfer_count++;
-#endif
- }
- } else {
- insb(NE_BASE + NE_DATAPORT, buf, count);
- }
-
-#ifdef NE_SANITY_CHECK
- /* This was for the ALPHA version only, but enough people have
- been encountering problems so it is still here. If you see
- this message you either 1) have a slightly incompatible clone
- or 2) have noise/speed problems with your bus. */
-
- if (ei_debug > 1)
- {
- /* DMA termination address check... */
- int addr, tries = 20;
- do {
- /* DON'T check for 'inb_p(EN0_ISR) & ENISR_RDC' here
- -- it's broken for Rx on some cards! */
- int high = inb_p(nic_base + EN0_RSARHI);
- int low = inb_p(nic_base + EN0_RSARLO);
- addr = (high << 8) + low;
- if (((ring_offset + xfer_count) & 0xff) == low)
- break;
- } while (--tries > 0);
- if (tries <= 0)
- printk(KERN_WARNING "%s: RX transfer address mismatch,"
- "%#4.4x (expected) vs. %#4.4x (actual).\n",
- dev->name, ring_offset + xfer_count, addr);
- }
-#endif
- outb_p(ENISR_RDC, nic_base + EN0_ISR); /* Ack intr. */
- ei_status.dmaing &= ~0x01;
-}
-
-static void ne_block_output(struct net_device *dev, int count,
- const unsigned char *buf, const int start_page)
-{
- int nic_base = NE_BASE;
- unsigned long dma_start;
-#ifdef NE_SANITY_CHECK
- int retries = 0;
-#endif
- struct ei_device *ei_local = (struct ei_device *)(dev->priv);
-
- /* Round the count up for word writes. Do we need to do this?
- What effect will an odd byte count have on the 8390?
- I should check someday. */
-
- if (ei_status.word16 && (count & 0x01))
- count++;
-
- /* This *shouldn't* happen. If it does, it's the last thing you'll see */
- if (ei_status.dmaing)
- {
- printk(KERN_EMERG "%s: DMAing conflict in ne_block_output."
- "[DMAstat:%d][irqlock:%d]\n",
- dev->name, ei_status.dmaing, ei_status.irqlock);
- return;
- }
- ei_status.dmaing |= 0x01;
- /* We should already be in page 0, but to be safe... */
- outb_p(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);
-
-#ifdef NE_SANITY_CHECK
-retry:
-#endif
-
-#ifdef NE8390_RW_BUGFIX
- /* Handle the read-before-write bug the same way as the
- Crynwr packet driver -- the NatSemi method doesn't work.
- Actually this doesn't always work either, but if you have
- problems with your NEx000 this is better than nothing! */
-
- outb_p(0x42, nic_base + EN0_RCNTLO);
- outb_p(0x00, nic_base + EN0_RCNTHI);
- outb_p(0x42, nic_base + EN0_RSARLO);
- outb_p(0x00, nic_base + EN0_RSARHI);
- outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);
- /* Make certain that the dummy read has occurred. */
- udelay(6);
-#endif
-
- outb_p(ENISR_RDC, nic_base + EN0_ISR);
-
- /* Now the normal output. */
- outb_p(count & 0xff, nic_base + EN0_RCNTLO);
- outb_p(count >> 8, nic_base + EN0_RCNTHI);
- outb_p(0x00, nic_base + EN0_RSARLO);
- outb_p(start_page, nic_base + EN0_RSARHI);
-
- outb_p(E8390_RWRITE+E8390_START, nic_base + NE_CMD);
- if (ei_status.word16) {
- outsw(NE_BASE + NE_DATAPORT, buf, count>>1);
- } else {
- outsb(NE_BASE + NE_DATAPORT, buf, count);
- }
-
- dma_start = jiffies;
-
-#ifdef NE_SANITY_CHECK
- /* This was for the ALPHA version only, but enough people have
- been encountering problems so it is still here. */
-
- if (ei_debug > 1)
- {
- /* DMA termination address check... */
- int addr, tries = 20;
- do {
- int high = inb_p(nic_base + EN0_RSARHI);
- int low = inb_p(nic_base + EN0_RSARLO);
- addr = (high << 8) + low;
- if ((start_page << 8) + count == addr)
- break;
- } while (--tries > 0);
-
- if (tries <= 0)
- {
- printk(KERN_WARNING "%s: Tx packet transfer address mismatch,"
- "%#4.4x (expected) vs. %#4.4x (actual).\n",
- dev->name, (start_page << 8) + count, addr);
- if (retries++ == 0)
- goto retry;
- }
- }
-#endif
-
- while ((inb_p(nic_base + EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
- printk(KERN_WARNING "%s: timeout waiting for Tx RDC.\n", dev->name);
- ne_reset_8390(dev);
- NS8390_init(dev,1);
- break;
- }
-
- outb_p(ENISR_RDC, nic_base + EN0_ISR); /* Ack intr. */
- ei_status.dmaing &= ~0x01;
- return;
-}
-
-\f
-#ifdef MODULE
-#define MAX_NE_CARDS 4 /* Max number of NE cards per module */
-static struct net_device *dev_ne[MAX_NE_CARDS];
-static int io[MAX_NE_CARDS];
-static int irq[MAX_NE_CARDS];
-static int bad[MAX_NE_CARDS]; /* 0xbad = bad sig or no reset ack */
-static int hwtype[MAX_NE_CARDS] = { 0, }; /* board type */
-
-MODULE_PARM(io, "1-" __MODULE_STRING(MAX_NE_CARDS) "i");
-MODULE_PARM(irq, "1-" __MODULE_STRING(MAX_NE_CARDS) "i");
-MODULE_PARM(bad, "1-" __MODULE_STRING(MAX_NE_CARDS) "i");
-MODULE_PARM(hwtype, "1-" __MODULE_STRING(MAX_NE_CARDS) "i");
-MODULE_PARM_DESC(io, "I/O base address(es),required");
-MODULE_PARM_DESC(irq, "IRQ number(s)");
-MODULE_PARM_DESC(bad, "Accept card(s) with bad signatures");
-MODULE_PARM_DESC(hwtype, "Board type of PC-9800 C-Bus NIC");
-MODULE_DESCRIPTION("NE1000/NE2000 PC-9800 C-bus Ethernet driver");
-MODULE_LICENSE("GPL");
-
-/* This is set up so that no ISA autoprobe takes place. We can't guarantee
-that the ne2k probe is the last 8390 based probe to take place (as it
-is at boot) and so the probe will get confused by any other 8390 cards.
-ISA device autoprobes on a running machine are not recommended anyway. */
-
-int init_module(void)
-{
- int this_dev, found = 0;
-
- for (this_dev = 0; this_dev < MAX_NE_CARDS; this_dev++) {
- struct net_device *dev = alloc_ei_netdev();
- if (!dev)
- break;
- dev->irq = irq[this_dev];
- dev->mem_end = bad[this_dev];
- dev->base_addr = io[this_dev];
- dev->mem_start = hwtype[this_dev];
- if (do_ne_probe(dev) == 0) {
- if (register_netdev(dev) == 0) {
- dev_ne[found++] = dev;
- continue;
- }
- cleanup_card(dev);
- }
- free_netdev(dev);
- if (found)
- break;
- if (io[this_dev] != 0)
- printk(KERN_WARNING "ne2k_cbus: No NE*000 card found at i/o = %#x\n", io[this_dev]);
- else
- printk(KERN_NOTICE "ne.c: You must supply \"io=0xNNN\" value(s) for ISA cards.\n");
- return -ENXIO;
- }
- if (found)
- return 0;
- return -ENODEV;
-}
-
-void cleanup_module(void)
-{
- int this_dev;
-
- for (this_dev = 0; this_dev < MAX_NE_CARDS; this_dev++) {
- struct net_device *dev = dev_ne[this_dev];
- if (dev) {
- unregister_netdev(dev);
- cleanup_card(dev);
- free_netdev(dev);
- }
- }
-}
-#endif /* MODULE */
-
+++ /dev/null
-/* ne2k_cbus.h:
- vender-specific information definition for NEC PC-9800
- C-bus Ethernet Cards
- Used in ne.c
-
- (C)1998,1999 KITAGWA Takurou & Linux/98 project
-*/
-
-#include <linux/config.h>
-
-#undef NE_RESET
-#define NE_RESET EI_SHIFT(0x11) /* Issue a read to reset, a write to clear. */
-
-#ifdef CONFIG_NE2K_CBUS_CNET98EL
-#ifndef CONFIG_NE2K_CBUS_CNET98EL_IO_BASE
-#warning CONFIG_NE2K_CBUS_CNET98EL_IO_BASE is not defined(config error?)
-#warning use 0xaaed as default
-#define CONFIG_NE2K_CBUS_CNET98EL_IO_BASE 0xaaed /* or 0x55ed */
-#endif
-#define CNET98EL_START_PG 0x00
-#define CNET98EL_STOP_PG 0x40
-#endif
-
-/* Hardware type definition (derived from *BSD) */
-#define NE2K_CBUS_HARDWARE_TYPE_MASK 0xff
-
-/* 0: reserved for auto-detect */
-/* 1: (not tested)
- Allied Telesis CentreCom LA-98-T */
-#define NE2K_CBUS_HARDWARE_TYPE_ATLA98 1
-/* 2: (not tested)
- ELECOM Laneed
- LD-BDN[123]A
- PLANET SMART COM 98 EN-2298-C
- MACNICA ME98 */
-#define NE2K_CBUS_HARDWARE_TYPE_BDN 2
-/* 3:
- Melco EGY-98
- Contec C-NET(98)E*A/L*A,C-NET(98)P */
-#define NE2K_CBUS_HARDWARE_TYPE_EGY98 3
-/* 4:
- Melco LGY-98,IND-SP,IND-SS
- MACNICA NE2098 */
-#define NE2K_CBUS_HARDWARE_TYPE_LGY98 4
-/* 5:
- ICM DT-ET-25,DT-ET-T5,IF-2766ET,IF-2771ET
- PLANET SMART COM 98 EN-2298-T,EN-2298P-T
- D-Link DE-298PT,DE-298PCAT
- ELECOM Laneed LD-98P */
-#define NE2K_CBUS_HARDWARE_TYPE_ICM 5
-/* 6: (reserved for SIC-98, which is not supported in this driver.) */
-/* 7: (unused in *BSD?)
- <Original NE2000 compatible>
- <for PCI/PCMCIA cards>
-*/
-#define NE2K_CBUS_HARDWARE_TYPE_NE2K 7
-/* 8:
- NEC PC-9801-108 */
-#define NE2K_CBUS_HARDWARE_TYPE_NEC108 8
-/* 9:
- I-O DATA LA-98,LA/T-98 */
-#define NE2K_CBUS_HARDWARE_TYPE_IOLA98 9
-/* 10: (reserved for C-NET(98), which is not supported in this driver.) */
-/* 11:
- Contec C-NET(98)E,L */
-#define NE2K_CBUS_HARDWARE_TYPE_CNET98EL 11
-
-#define NE2K_CBUS_HARDWARE_TYPE_MAX 11
-
-/* HARDWARE TYPE ID 12-31: reserved */
-
-struct ne2k_cbus_offsetinfo {
- unsigned short skip;
- unsigned short offset8; /* +0x8 - +0xf */
- unsigned short offset10; /* +0x10 */
- unsigned short offset1f; /* +0x1f */
-};
-
-struct ne2k_cbus_region {
- unsigned short start;
- short range;
-};
-
-struct ne2k_cbus_hwinfo {
- const unsigned short hwtype;
- const unsigned char *hwident;
-#ifndef MODULE
- const unsigned short *portlist;
-#endif
- const struct ne2k_cbus_offsetinfo *offsetinfo;
- const struct ne2k_cbus_region *regionlist;
-};
-
-#ifdef CONFIG_NE2K_CBUS_ATLA98
-#ifndef MODULE
-static unsigned short atla98_portlist[] __initdata = {
- 0xd0,
- 0
-};
-#endif
-#define atla98_offsetinfo ne2k_offsetinfo
-#define atla98_regionlist ne2k_regionlist
-#endif /* CONFIG_NE2K_CBUS_ATLA98 */
-
-#ifdef CONFIG_NE2K_CBUS_BDN
-#ifndef MODULE
-static unsigned short bdn_portlist[] __initdata = {
- 0xd0,
- 0
-};
-#endif
-static struct ne2k_cbus_offsetinfo bdn_offsetinfo __initdata = {
-#if 0
- /* comes from FreeBSD(98) ed98.h */
- 0x1000, 0x8000, 0x100, 0xc200 /* ??? */
-#else
- /* comes from NetBSD/pc98 if_ne_isa.c */
- 0x1000, 0x8000, 0x100, 0x7f00 /* ??? */
-#endif
-};
-static struct ne2k_cbus_region bdn_regionlist[] __initdata = {
- {0x0, 1}, {0x1000, 1}, {0x2000, 1}, {0x3000,1},
- {0x4000, 1}, {0x5000, 1}, {0x6000, 1}, {0x7000, 1},
- {0x8000, 1}, {0x9000, 1}, {0xa000, 1}, {0xb000, 1},
- {0xc000, 1}, {0xd000, 1}, {0xe000, 1}, {0xf000, 1},
- {0x100, 1}, {0x7f00, 1},
- {0x0, 0}
-};
-#endif /* CONFIG_NE2K_CBUS_BDN */
-
-#ifdef CONFIG_NE2K_CBUS_EGY98
-#ifndef MODULE
-static unsigned short egy98_portlist[] __initdata = {
- 0xd0,
- 0
-};
-#endif
-static struct ne2k_cbus_offsetinfo egy98_offsetinfo __initdata = {
- 0x02, 0x100, 0x200, 0x300
-};
-static struct ne2k_cbus_region egy98_regionlist[] __initdata = {
- {0x0, 1}, {0x2, 1}, {0x4, 1}, {0x6, 1},
- {0x8, 1}, {0xa, 1}, {0xc, 1}, {0xe, 1},
- {0x100, 1}, {0x102, 1}, {0x104, 1}, {0x106, 1},
- {0x108, 1}, {0x10a, 1}, {0x10c, 1}, {0x10e, 1},
- {0x200, 1}, {0x300, 1},
- {0x0, 0}
-};
-#endif /* CONFIG_NE2K_CBUS_EGY98 */
-
-#ifdef CONFIG_NE2K_CBUS_LGY98
-#ifndef MODULE
-static unsigned short lgy98_portlist[] __initdata = {
- 0xd0, 0x10d0, 0x20d0, 0x30d0, 0x40d0, 0x50d0, 0x60d0, 0x70d0,
- 0
-};
-#endif
-static struct ne2k_cbus_offsetinfo lgy98_offsetinfo __initdata = {
- 0x01, 0x08, 0x200, 0x300
-};
-static struct ne2k_cbus_region lgy98_regionlist[] __initdata = {
- {0x0, 16}, {0x200, 1}, {0x300, 1},
- {0x0, 0}
-};
-#endif /* CONFIG_NE2K_CBUS_LGY98 */
-
-#ifdef CONFIG_NE2K_CBUS_ICM
-#ifndef MODULE
-static unsigned short icm_portlist[] __initdata = {
- /* ICM */
- 0x56d0,
- /* LD-98PT */
- 0x46d0, 0x66d0, 0x76d0, 0x86d0, 0x96d0, 0xa6d0, 0xb6d0, 0xc6d0,
- 0
-};
-#endif
-static struct ne2k_cbus_offsetinfo icm_offsetinfo __initdata = {
- 0x01, 0x08, 0x100, 0x10f
-};
-static struct ne2k_cbus_region icm_regionlist[] __initdata = {
- {0x0, 16}, {0x100, 16},
- {0x0, 0}
-};
-#endif /* CONFIG_NE2K_CBUS_ICM */
-
-#if defined(CONFIG_NE2K_CBUS_NE2K) && !defined(MODULE)
-static unsigned short ne2k_portlist[] __initdata = {
- 0xd0, 0x300, 0x280, 0x320, 0x340, 0x360, 0x380,
- 0
-};
-#endif
-#if defined(CONFIG_NE2K_CBUS_NE2K) || defined(CONFIG_NE2K_CBUS_ATLA98)
-static struct ne2k_cbus_offsetinfo ne2k_offsetinfo __initdata = {
- 0x01, 0x08, 0x10, 0x1f
-};
-static struct ne2k_cbus_region ne2k_regionlist[] __initdata = {
- {0x0, 32},
- {0x0, 0}
-};
-#endif
-
-#ifdef CONFIG_NE2K_CBUS_NEC108
-#ifndef MODULE
-static unsigned short nec108_portlist[] __initdata = {
- 0x770, 0x2770, 0x4770, 0x6770,
- 0
-};
-#endif
-static struct ne2k_cbus_offsetinfo nec108_offsetinfo __initdata = {
- 0x02, 0x1000, 0x888, 0x88a
-};
-static struct ne2k_cbus_region nec108_regionlist[] __initdata = {
- {0x0, 1}, {0x2, 1}, {0x4, 1}, {0x6, 1},
- {0x8, 1}, {0xa, 1}, {0xc, 1}, {0xe, 1},
- {0x1000, 1}, {0x1002, 1}, {0x1004, 1}, {0x1006, 1},
- {0x1008, 1}, {0x100a, 1}, {0x100c, 1}, {0x100e, 1},
- {0x888, 1}, {0x88a, 1}, {0x88c, 1}, {0x88e, 1},
- {0x0, 0}
-};
-#endif
-
-#ifdef CONFIG_NE2K_CBUS_IOLA98
-#ifndef MODULE
-static unsigned short iola98_portlist[] __initdata = {
- 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc, 0xde,
- 0
-};
-#endif
-static struct ne2k_cbus_offsetinfo iola98_offsetinfo __initdata = {
- 0x1000, 0x8000, 0x100, 0xf100
-};
-static struct ne2k_cbus_region iola98_regionlist[] __initdata = {
- {0x0, 1}, {0x1000, 1}, {0x2000, 1}, {0x3000, 1},
- {0x4000, 1}, {0x5000, 1}, {0x6000, 1}, {0x7000, 1},
- {0x8000, 1}, {0x9000, 1}, {0xa000, 1}, {0xb000, 1},
- {0xc000, 1}, {0xd000, 1}, {0xe000, 1}, {0xf000, 1},
- {0x100, 1}, {0xf100, 1},
- {0x0,0}
-};
-#endif /* CONFIG_NE2K_CBUS_IOLA98 */
-
-#ifdef CONFIG_NE2K_CBUS_CNET98EL
-#ifndef MODULE
-static unsigned short cnet98el_portlist[] __initdata = {
- 0x3d0, 0x13d0, 0x23d0, 0x33d0, 0x43d0, 0x53d0, 0x60d0, 0x70d0,
- 0
-};
-#endif
-static struct ne2k_cbus_offsetinfo cnet98el_offsetinfo __initdata = {
- 0x01, 0x08, 0x40e, 0x400
-};
-static struct ne2k_cbus_region cnet98el_regionlist[] __initdata = {
- {0x0, 16}, {0x400, 16},
- {0x0, 0}
-};
-#endif
-
-
-/* port information table (for ne.c initialize/probe process) */
-
-static struct ne2k_cbus_hwinfo ne2k_cbus_hwinfo_list[] __initdata = {
-#ifdef CONFIG_NE2K_CBUS_ATLA98
-/* NOT TESTED */
- {
- NE2K_CBUS_HARDWARE_TYPE_ATLA98,
- "LA-98-T",
-#ifndef MODULE
- atla98_portlist,
-#endif
- &atla98_offsetinfo, atla98_regionlist
- },
-#endif
-#ifdef CONFIG_NE2K_CBUS_BDN
-/* NOT TESTED */
- {
- NE2K_CBUS_HARDWARE_TYPE_BDN,
- "LD-BDN[123]A",
-#ifndef MODULE
- bdn_portlist,
-#endif
- &bdn_offsetinfo, bdn_regionlist
- },
-#endif
-#ifdef CONFIG_NE2K_CBUS_ICM
- {
- NE2K_CBUS_HARDWARE_TYPE_ICM,
- "IF-27xxET",
-#ifndef MODULE
- icm_portlist,
-#endif
- &icm_offsetinfo, icm_regionlist
- },
-#endif
-#ifdef CONFIG_NE2K_CBUS_NE2K
- {
- NE2K_CBUS_HARDWARE_TYPE_NE2K,
- "NE2000 compat.",
-#ifndef MODULE
- ne2k_portlist,
-#endif
- &ne2k_offsetinfo, ne2k_regionlist
- },
-#endif
-#ifdef CONFIG_NE2K_CBUS_NEC108
- {
- NE2K_CBUS_HARDWARE_TYPE_NEC108,
- "PC-9801-108",
-#ifndef MODULE
- nec108_portlist,
-#endif
- &nec108_offsetinfo, nec108_regionlist
- },
-#endif
-#ifdef CONFIG_NE2K_CBUS_IOLA98
- {
- NE2K_CBUS_HARDWARE_TYPE_IOLA98,
- "LA-98",
-#ifndef MODULE
- iola98_portlist,
-#endif
- &iola98_offsetinfo, iola98_regionlist
- },
-#endif
-#ifdef CONFIG_NE2K_CBUS_CNET98EL
- {
- NE2K_CBUS_HARDWARE_TYPE_CNET98EL,
- "C-NET(98)E/L",
-#ifndef MODULE
- cnet98el_portlist,
-#endif
- &cnet98el_offsetinfo, cnet98el_regionlist
- },
-#endif
-/* NOTE: LGY98 must be probed before EGY98, or system stalled!? */
-#ifdef CONFIG_NE2K_CBUS_LGY98
- {
- NE2K_CBUS_HARDWARE_TYPE_LGY98,
- "LGY-98",
-#ifndef MODULE
- lgy98_portlist,
-#endif
- &lgy98_offsetinfo, lgy98_regionlist
- },
-#endif
-#ifdef CONFIG_NE2K_CBUS_EGY98
- {
- NE2K_CBUS_HARDWARE_TYPE_EGY98,
- "EGY-98",
-#ifndef MODULE
- egy98_portlist,
-#endif
- &egy98_offsetinfo, egy98_regionlist
- },
-#endif
- {
- 0,
- "unsupported hardware",
-#ifndef MODULE
- NULL,
-#endif
- NULL, NULL
- }
-};
-
-static int __init ne2k_cbus_init(struct net_device *dev)
-{
- struct ei_device *ei_local;
- if (dev->priv == NULL) {
- ei_local = kmalloc(sizeof(struct ei_device), GFP_KERNEL);
- if (ei_local == NULL)
- return -ENOMEM;
- memset(ei_local, 0, sizeof(struct ei_device));
- ei_local->reg_offset = kmalloc(sizeof(typeof(*ei_local->reg_offset))*18, GFP_KERNEL);
- if (ei_local->reg_offset == NULL) {
- kfree(ei_local);
- return -ENOMEM;
- }
- spin_lock_init(&ei_local->page_lock);
- dev->priv = ei_local;
- }
- return 0;
-}
-
-static void ne2k_cbus_destroy(struct net_device *dev)
-{
- struct ei_device *ei_local = (struct ei_device *)(dev->priv);
- if (ei_local != NULL) {
- if (ei_local->reg_offset)
- kfree(ei_local->reg_offset);
- kfree(dev->priv);
- dev->priv = NULL;
- }
-}
-
-static const struct ne2k_cbus_hwinfo * __init ne2k_cbus_get_hwinfo(int hwtype)
-{
- const struct ne2k_cbus_hwinfo *hw;
-
- for (hw = &ne2k_cbus_hwinfo_list[0]; hw->hwtype; hw++) {
- if (hw->hwtype == hwtype) break;
- }
- return hw;
-}
-
-static void __init ne2k_cbus_set_hwtype(struct net_device *dev, const struct ne2k_cbus_hwinfo *hw, int ioaddr)
-{
- struct ei_device *ei_local = (struct ei_device *)(dev->priv);
- int i;
- int hwtype_old = dev->mem_start & NE2K_CBUS_HARDWARE_TYPE_MASK;
-
- if (!ei_local)
- panic("Gieee! ei_local == NULL!! (from %p)",
- __builtin_return_address(0));
-
- dev->mem_start &= ~NE2K_CBUS_HARDWARE_TYPE_MASK;
- dev->mem_start |= hw->hwtype & NE2K_CBUS_HARDWARE_TYPE_MASK;
-
- if (ei_debug > 2) {
- printk(KERN_DEBUG "hwtype changed: %d -> %d\n",hwtype_old,(int)(dev->mem_start & NE2K_CBUS_HARDWARE_TYPE_MASK));
- }
-
- if (hw->offsetinfo) {
- for (i = 0; i < 8; i++) {
- ei_local->reg_offset[i] = hw->offsetinfo->skip * i;
- }
- for (i = 8; i < 16; i++) {
- ei_local->reg_offset[i] =
- hw->offsetinfo->skip*(i-8) + hw->offsetinfo->offset8;
- }
-#ifdef CONFIG_NE2K_CBUS_NEC108
- if (hw->hwtype == NE2K_CBUS_HARDWARE_TYPE_NEC108) {
- int adj = (ioaddr & 0xf000) /2;
- ei_local->reg_offset[16] =
- (hw->offsetinfo->offset10 | adj) - ioaddr;
- ei_local->reg_offset[17] =
- (hw->offsetinfo->offset1f | adj) - ioaddr;
- } else {
-#endif /* CONFIG_NE2K_CBUS_NEC108 */
- ei_local->reg_offset[16] = hw->offsetinfo->offset10;
- ei_local->reg_offset[17] = hw->offsetinfo->offset1f;
-#ifdef CONFIG_NE2K_CBUS_NEC108
- }
-#endif
- } else {
- /* make dummmy offset list */
- for (i = 0; i < 16; i++) {
- ei_local->reg_offset[i] = i;
- }
- ei_local->reg_offset[16] = 0x10;
- ei_local->reg_offset[17] = 0x1f;
- }
-}
-
-#if defined(CONFIG_NE2K_CBUS_ICM) || defined(CONFIG_NE2K_CBUS_CNET98EL)
-static void __init ne2k_cbus_readmem(struct net_device *dev, int ioaddr, unsigned short memaddr, char *buf, unsigned short len)
-{
- struct ei_device *ei_local = (struct ei_device *)(dev->priv);
- outb_p(E8390_NODMA | E8390_START, ioaddr+E8390_CMD);
- outb_p(len & 0xff, ioaddr+EN0_RCNTLO);
- outb_p(len >> 8, ioaddr+EN0_RCNTHI);
- outb_p(memaddr & 0xff, ioaddr+EN0_RSARLO);
- outb_p(memaddr >> 8, ioaddr+EN0_RSARHI);
- outb_p(E8390_RREAD | E8390_START, ioaddr+E8390_CMD);
- insw(ioaddr+NE_DATAPORT, buf, len >> 1);
-}
-static void __init ne2k_cbus_writemem(struct net_device *dev, int ioaddr, unsigned short memaddr, const char *buf, unsigned short len)
-{
- struct ei_device *ei_local = (struct ei_device *)(dev->priv);
- outb_p(E8390_NODMA | E8390_START, ioaddr+E8390_CMD);
- outb_p(ENISR_RDC, ioaddr+EN0_ISR);
- outb_p(len & 0xff, ioaddr+EN0_RCNTLO);
- outb_p(len >> 8, ioaddr+EN0_RCNTHI);
- outb_p(memaddr & 0xff, ioaddr+EN0_RSARLO);
- outb_p(memaddr >> 8, ioaddr+EN0_RSARHI);
- outb_p(E8390_RWRITE | E8390_START, ioaddr+E8390_CMD);
- outsw(ioaddr+NE_DATAPORT, buf, len >> 1);
-}
-#endif
-
-static int ne_probe_cbus(struct net_device *dev, const struct ne2k_cbus_hwinfo *hw, int ioaddr, int irq);
-/* End of ne2k_cbus.h */
+++ /dev/null
-/* net_init.c: Initialization for network devices. */
-/*
- Written 1993,1994,1995 by Donald Becker.
-
- The author may be reached as becker@scyld.com, or C/O
- Scyld Computing Corporation
- 410 Severn Ave., Suite 210
- Annapolis MD 21403
-
- This file contains the initialization for the "pl14+" style ethernet
- drivers. It should eventually replace most of drivers/net/Space.c.
- It's primary advantage is that it's able to allocate low-memory buffers.
- A secondary advantage is that the dangerous NE*000 netcards can reserve
- their I/O port region before the SCSI probes start.
-
- Modifications/additions by Bjorn Ekwall <bj0rn@blox.se>:
- ethdev_index[MAX_ETH_CARDS]
- register_netdev() / unregister_netdev()
-
- Modifications by Wolfgang Walter
- Use dev_close cleanly so we always shut things down tidily.
-
- Changed 29/10/95, Alan Cox to pass sockaddr's around for mac addresses.
-
- 14/06/96 - Paul Gortmaker: Add generic eth_change_mtu() function.
- 24/09/96 - Paul Norton: Add token-ring variants of the netdev functions.
-
- 08/11/99 - Alan Cox: Got fed up of the mess in this file and cleaned it
- up. We now share common code and have regularised name
- allocation setups. Abolished the 16 card limits.
- 03/19/2000 - jgarzik and Urban Widmark: init_etherdev 32-byte align
- 03/21/2001 - jgarzik: alloc_etherdev and friends
-
-*/
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/if_ether.h>
-#include <linux/string.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/fddidevice.h>
-#include <linux/hippidevice.h>
-#include <linux/trdevice.h>
-#include <linux/fcdevice.h>
-#include <linux/if_arp.h>
-#include <linux/if_ltalk.h>
-#include <linux/rtnetlink.h>
-#include <net/neighbour.h>
-
-/* The network devices currently exist only in the socket namespace, so these
- entries are unused. The only ones that make sense are
- open start the ethercard
- close stop the ethercard
- ioctl To get statistics, perhaps set the interface port (AUI, BNC, etc.)
- One can also imagine getting raw packets using
- read & write
- but this is probably better handled by a raw packet socket.
-
- Given that almost all of these functions are handled in the current
- socket-based scheme, putting ethercard devices in /dev/ seems pointless.
-
- [Removed all support for /dev network devices. When someone adds
- streams then by magic we get them, but otherwise they are un-needed
- and a space waste]
-*/
-
-
-struct net_device *alloc_netdev(int sizeof_priv, const char *mask,
- void (*setup)(struct net_device *))
-{
- void *p;
- struct net_device *dev;
- int alloc_size;
-
- /* ensure 32-byte alignment of both the device and private area */
-
- alloc_size = (sizeof(struct net_device) + NETDEV_ALIGN_CONST)
- & ~NETDEV_ALIGN_CONST;
- alloc_size += sizeof_priv + NETDEV_ALIGN_CONST;
-
- p = kmalloc (alloc_size, GFP_KERNEL);
- if (!p) {
- printk(KERN_ERR "alloc_dev: Unable to allocate device.\n");
- return NULL;
- }
-
- memset(p, 0, alloc_size);
-
- dev = (struct net_device *)(((long)p + NETDEV_ALIGN_CONST)
- & ~NETDEV_ALIGN_CONST);
- dev->padded = (char *)dev - (char *)p;
-
- if (sizeof_priv)
- dev->priv = netdev_priv(dev);
-
- setup(dev);
- strcpy(dev->name, mask);
-
- return dev;
-}
-EXPORT_SYMBOL(alloc_netdev);
-
-int register_netdev(struct net_device *dev)
-{
- int err;
-
- rtnl_lock();
-
- /*
- * If the name is a format string the caller wants us to
- * do a name allocation
- */
-
- if (strchr(dev->name, '%'))
- {
- err = dev_alloc_name(dev, dev->name);
- if (err < 0)
- goto out;
- }
-
- /*
- * Back compatibility hook. Kill this one in 2.5
- */
-
- if (dev->name[0]==0 || dev->name[0]==' ')
- {
- err = dev_alloc_name(dev, "eth%d");
- if (err < 0)
- goto out;
- }
-
- err = register_netdevice(dev);
-
-out:
- rtnl_unlock();
- return err;
-}
-
-void unregister_netdev(struct net_device *dev)
-{
- rtnl_lock();
- unregister_netdevice(dev);
- rtnl_unlock();
-}
-
-EXPORT_SYMBOL(register_netdev);
-EXPORT_SYMBOL(unregister_netdev);
+++ /dev/null
-/*
-** *************************************************************************
-**
-**
-** R C I F . H
-**
-**
-** RedCreek InterFace include file.
-**
-** ---------------------------------------------------------------------
-** --- Copyright (c) 1998-1999, RedCreek Communications Inc. ---
-** --- All rights reserved. ---
-** ---------------------------------------------------------------------
-**
-** File Description:
-**
-** Header file private ioctl commands.
-**
-**
-** This program is free software; you can redistribute it and/or modify
-** it under the terms of the GNU General Public License as published by
-** the Free Software Foundation; either version 2 of the License, or
-** (at your option) any later version.
-
-** This program is distributed in the hope that it will be useful,
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-** GNU General Public License for more details.
-
-** You should have received a copy of the GNU General Public License
-** along with this program; if not, write to the Free Software
-** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-** *************************************************************************
-*/
-
-#ifndef RCIF_H
-#define RCIF_H
-
-/* The following protocol revision # should be incremented every time
- a new protocol or new structures are used in this file. */
-int USER_PROTOCOL_REV = 2; /* used to track different protocol revisions */
-
-/* define a single TCB & buffer */
-typedef struct { /* a single buffer */
- U32 context; /* context */
- U32 scount; /* segment count */
- U32 size; /* segment size */
- U32 addr; /* segment physical address */
-} __attribute__ ((packed))
- singleB, *psingleB;
-typedef struct { /* a single TCB */
- /*
- ** +-----------------------+
- ** | 1 | one buffer in the TCB
- ** +-----------------------+
- ** | <user's Context> | user's buffer reference
- ** +-----------------------+
- ** | 1 | one segment buffer
- ** +-----------------------+ _
- ** | <buffer size> | size \
- ** +-----------------------+ \ segment descriptor
- ** | <physical address> | physical address of buffer /
- ** +-----------------------+ _/
- */
- U32 bcount; /* buffer count */
- singleB b; /* buffer */
-
-} __attribute__ ((packed))
- singleTCB, *psingleTCB;
-
-/*
- When adding new entries, please add all 5 related changes, since
- it helps keep everything consistent:
- 1) User structure entry
- 2) User data entry
- 3) Structure short-cut entry
- 4) Data short-cut entry
- 5) Command identifier entry
-
- For Example ("GETSPEED"):
- 1) struct RCgetspeed_tag { U32 LinkSpeedCode; } RCgetspeed;
- 2) struct RCgetspeed_tag *getspeed;
- 3) #define RCUS_GETSPEED data.RCgetspeed;
- 4) #define RCUD_GETSPEED _RC_user_data.getspeed
- 5) #define RCUC_GETSPEED 0x02
-
- Notes for the "GETSPEED" entry, above:
- 1) RCgetspeed - RC{name}
- RCgetspeed_tag - RC{name}_tag
- LinkSpeedCode - create any structure format desired (not too large,
- since memory will be unioned with all other entries)
- 2) RCgetspeed_tag - RC{name}_tag chosen in #1
- getspeed - arbitrary name (ptr to structure in #1)
- 3) RCUS_GETSPEED - RCUS_{NAME} ("NAME" & "name" do not have to the same)
- data.RCgetspeed - data.RC{name} ("RC{name}" from #1)
- 4) RCUD_GETSPEED - _RC_user_data.getspeed ("getspeed" from #2)
- 5) RCUC_GETSPEED - unique hex identifier entry.
-*/
-
-typedef struct RC_user_tag RCuser_struct;
-
-/* 1) User structure entry */
-struct RC_user_tag {
- int cmd;
- union {
- /* GETINFO structure */
- struct RCgetinfo_tag {
- unsigned long int mem_start;
- unsigned long int mem_end;
- unsigned long int base_addr;
- unsigned char irq;
- unsigned char dma;
- unsigned char port;
- } RCgetinfo; /* <---- RCgetinfo */
-
- /* GETSPEED structure */
- struct RCgetspeed_tag {
- U32 LinkSpeedCode;
- } RCgetspeed; /* <---- RCgetspeed */
-
- /* SETSPEED structure */
- struct RCsetspeed_tag {
- U16 LinkSpeedCode;
- } RCsetspeed; /* <---- RCsetspeed */
-
- /* GETPROM structure */
- struct RCgetprom_tag {
- U32 PromMode;
- } RCgetprom; /* <---- RCgetprom */
-
- /* SETPROM structure */
- struct RCsetprom_tag {
- U16 PromMode;
- } RCsetprom; /* <---- RCsetprom */
-
- /* GETBROADCAST structure */
- struct RCgetbroadcast_tag {
- U32 BroadcastMode;
- } RCgetbroadcast; /* <---- RCgetbroadcast */
-
- /* SETBROADCAST structure */
- struct RCsetbroadcast_tag {
- U16 BroadcastMode;
- } RCsetbroadcast; /* <---- RCsetbroadcast */
-
- /* GETFIRMWAREVER structure */
-#define FirmStringLen 80
- struct RCgetfwver_tag {
- U8 FirmString[FirmStringLen];
- } RCgetfwver; /* <---- RCgetfwver */
-
- /* GETIPANDMASK structure */
- struct RCgetipnmask_tag {
- U32 IpAddr;
- U32 NetMask;
- } RCgetipandmask; /* <---- RCgetipandmask */
-
- /* SETIPANDMASK structure */
- struct RCsetipnmask_tag {
- U32 IpAddr;
- U32 NetMask;
- } RCsetipandmask; /* <---- RCsetipandmask */
-
- /* GETMAC structure */
-#define MAC_SIZE 10
- struct RCgetmac_tag {
- U8 mac[MAC_SIZE];
- } RCgetmac; /* <---- RCgetmac */
-
- /* SETMAC structure */
- struct RCsetmac_tag {
- U8 mac[MAC_SIZE];
- } RCsetmac; /* <---- RCsetmac */
-
- /* GETLINKSTATUS structure */
- struct RCgetlnkstatus_tag {
- U32 ReturnStatus;
- } RCgetlnkstatus; /* <---- RCgetlnkstatus */
-
- /* GETLINKSTATISTICS structure */
- struct RCgetlinkstats_tag {
- RCLINKSTATS StatsReturn;
- } RCgetlinkstats; /* <---- RCgetlinkstats */
-
- /* DEFAULT structure (when no command was recognized) */
- struct RCdefault_tag {
- int rc;
- } RCdefault; /* <---- RCdefault */
-
- } data;
-
-}; /* struct RC_user_tag { ... } */
-
-/* 2) User data entry */
-/* RCUD = RedCreek User Data */
-union RC_user_data_tag { /* structure tags used are taken from RC_user_tag structure above */
- struct RCgetinfo_tag *getinfo;
- struct RCgetspeed_tag *getspeed;
- struct RCgetprom_tag *getprom;
- struct RCgetbroadcast_tag *getbroadcast;
- struct RCgetfwver_tag *getfwver;
- struct RCgetipnmask_tag *getipandmask;
- struct RCgetmac_tag *getmac;
- struct RCgetlnkstatus_tag *getlinkstatus;
- struct RCgetlinkstats_tag *getlinkstatistics;
- struct RCdefault_tag *rcdefault;
- struct RCsetspeed_tag *setspeed;
- struct RCsetprom_tag *setprom;
- struct RCsetbroadcast_tag *setbroadcast;
- struct RCsetipnmask_tag *setipandmask;
- struct RCsetmac_tag *setmac;
-} _RC_user_data; /* declare as a global, so the defines below will work */
-
-/* 3) Structure short-cut entry */
-/* define structure short-cuts *//* structure names are taken from RC_user_tag structure above */
-#define RCUS_GETINFO data.RCgetinfo;
-#define RCUS_GETSPEED data.RCgetspeed;
-#define RCUS_GETPROM data.RCgetprom;
-#define RCUS_GETBROADCAST data.RCgetbroadcast;
-#define RCUS_GETFWVER data.RCgetfwver;
-#define RCUS_GETIPANDMASK data.RCgetipandmask;
-#define RCUS_GETMAC data.RCgetmac;
-#define RCUS_GETLINKSTATUS data.RCgetlnkstatus;
-#define RCUS_GETLINKSTATISTICS data.RCgetlinkstats;
-#define RCUS_DEFAULT data.RCdefault;
-#define RCUS_SETSPEED data.RCsetspeed;
-#define RCUS_SETPROM data.RCsetprom;
-#define RCUS_SETBROADCAST data.RCsetbroadcast;
-#define RCUS_SETIPANDMASK data.RCsetipandmask;
-#define RCUS_SETMAC data.RCsetmac;
-
-/* 4) Data short-cut entry */
-/* define data short-cuts *//* pointer names are from RC_user_data_tag union (just below RC_user_tag) */
-#define RCUD_GETINFO _RC_user_data.getinfo
-#define RCUD_GETSPEED _RC_user_data.getspeed
-#define RCUD_GETPROM _RC_user_data.getprom
-#define RCUD_GETBROADCAST _RC_user_data.getbroadcast
-#define RCUD_GETFWVER _RC_user_data.getfwver
-#define RCUD_GETIPANDMASK _RC_user_data.getipandmask
-#define RCUD_GETMAC _RC_user_data.getmac
-#define RCUD_GETLINKSTATUS _RC_user_data.getlinkstatus
-#define RCUD_GETLINKSTATISTICS _RC_user_data.getlinkstatistics
-#define RCUD_DEFAULT _RC_user_data.rcdefault
-#define RCUD_SETSPEED _RC_user_data.setspeed
-#define RCUD_SETPROM _RC_user_data.setprom
-#define RCUD_SETBROADCAST _RC_user_data.setbroadcast
-#define RCUD_SETIPANDMASK _RC_user_data.setipandmask
-#define RCUD_SETMAC _RC_user_data.setmac
-
-/* 5) Command identifier entry */
-/* define command identifiers */
-#define RCUC_GETINFO 0x01
-#define RCUC_GETSPEED 0x02
-#define RCUC_GETFWVER 0x03
-#define RCUC_GETIPANDMASK 0x04
-#define RCUC_GETMAC 0x05
-#define RCUC_GETLINKSTATUS 0x06
-#define RCUC_GETLINKSTATISTICS 0x07
-#define RCUC_GETPROM 0x14
-#define RCUC_GETBROADCAST 0x15
-#define RCUC_DEFAULT 0xff
-#define RCUC_SETSPEED 0x08
-#define RCUC_SETIPANDMASK 0x09
-#define RCUC_SETMAC 0x0a
-#define RCUC_SETPROM 0x16
-#define RCUC_SETBROADCAST 0x17
-
-/* define ioctl commands to use, when talking to RC 45/PCI driver */
-#define RCU_PROTOCOL_REV SIOCDEVPRIVATE
-#define RCU_COMMAND SIOCDEVPRIVATE+1
-
-/*
- Intended use for the above defines is shown below (GETINFO, as this example):
-
- RCuser_struct RCuser; // declare RCuser structure
- struct ifreq ifr; // declare an interface request structure
-
- RCuser.cmd = RCUC_GETINFO; // set user command to GETINFO
- ifr->ifr_data = (caddr_t) &RCuser; // set point to user structure
-
- sock = socket(AF_INET, SOCK_RAW, IPPROTO_RAW); // get a socket
- ioctl(sock, RCU_COMMAND, &ifr); // do ioctl on socket
-
- RCUD_GETINFO = &RCuser.RCUS_GETINFO; // set data pointer for GETINFO
-
- // print results
- printf("memory 0x%lx-0x%lx, base address 0x%x, irq 0x%x\n",
- RCUD_GETINFO->mem_start, RCUD_GETINFO->mem_end,
- RCUD_GETINFO->base_addr, RCUD_GETINFO->irq);
-*/
-
-#endif /* RCIF_H */
+++ /dev/null
-/*
-** *************************************************************************
-**
-**
-** R C L A N M T L . C $Revision: 6 $
-**
-**
-** RedCreek I2O LAN Message Transport Layer program module.
-**
-** ---------------------------------------------------------------------
-** --- Copyright (c) 1997-1999, RedCreek Communications Inc. ---
-** --- All rights reserved. ---
-** ---------------------------------------------------------------------
-**
-** File Description:
-**
-** Host side I2O (Intelligent I/O) LAN message transport layer.
-**
-** This program is free software; you can redistribute it and/or modify
-** it under the terms of the GNU General Public License as published by
-** the Free Software Foundation; either version 2 of the License, or
-** (at your option) any later version.
-
-** This program is distributed in the hope that it will be useful,
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-** GNU General Public License for more details.
-
-** You should have received a copy of the GNU General Public License
-** along with this program; if not, write to the Free Software
-** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-**
-** 1998-1999, LAN API was modified and enhanced by Alice Hennessy.
-**
-** Sometime in 1997, LAN API was written from scratch by Wendell Nichols.
-** *************************************************************************
-*/
-
-#define DEBUG 1
-
-#define RC_LINUX_MODULE
-#include "rclanmtl.h"
-
- /* RedCreek LAN device Target ID */
-#define RC_LAN_TARGET_ID 0x10
- /* RedCreek's OSM default LAN receive Initiator */
-#define DEFAULT_RECV_INIT_CONTEXT 0xA17
-
-/*
-** I2O message structures
-*/
-
-#define I2O_TID_SZ 12
-#define I2O_FUNCTION_SZ 8
-
-/* Transaction Reply Lists (TRL) Control Word structure */
-
-#define I2O_TRL_FLAGS_SINGLE_FIXED_LENGTH 0x00
-#define I2O_TRL_FLAGS_SINGLE_VARIABLE_LENGTH 0x40
-#define I2O_TRL_FLAGS_MULTIPLE_FIXED_LENGTH 0x80
-
-/* LAN Class specific functions */
-
-#define I2O_LAN_PACKET_SEND 0x3B
-#define I2O_LAN_SDU_SEND 0x3D
-#define I2O_LAN_RECEIVE_POST 0x3E
-#define I2O_LAN_RESET 0x35
-#define I2O_LAN_SHUTDOWN 0x37
-
-/* Private Class specfic function */
-#define I2O_PRIVATE 0xFF
-
-/* I2O Executive Function Codes. */
-
-#define I2O_EXEC_ADAPTER_ASSIGN 0xB3
-#define I2O_EXEC_ADAPTER_READ 0xB2
-#define I2O_EXEC_ADAPTER_RELEASE 0xB5
-#define I2O_EXEC_BIOS_INFO_SET 0xA5
-#define I2O_EXEC_BOOT_DEVICE_SET 0xA7
-#define I2O_EXEC_CONFIG_VALIDATE 0xBB
-#define I2O_EXEC_CONN_SETUP 0xCA
-#define I2O_EXEC_DEVICE_ASSIGN 0xB7
-#define I2O_EXEC_DEVICE_RELEASE 0xB9
-#define I2O_EXEC_HRT_GET 0xA8
-#define I2O_EXEC_IOP_CLEAR 0xBE
-#define I2O_EXEC_IOP_CONNECT 0xC9
-#define I2O_EXEC_IOP_RESET 0xBD
-#define I2O_EXEC_LCT_NOTIFY 0xA2
-#define I2O_EXEC_OUTBOUND_INIT 0xA1
-#define I2O_EXEC_PATH_ENABLE 0xD3
-#define I2O_EXEC_PATH_QUIESCE 0xC5
-#define I2O_EXEC_PATH_RESET 0xD7
-#define I2O_EXEC_STATIC_MF_CREATE 0xDD
-#define I2O_EXEC_STATIC_MF_RELEASE 0xDF
-#define I2O_EXEC_STATUS_GET 0xA0
-#define I2O_EXEC_SW_DOWNLOAD 0xA9
-#define I2O_EXEC_SW_UPLOAD 0xAB
-#define I2O_EXEC_SW_REMOVE 0xAD
-#define I2O_EXEC_SYS_ENABLE 0xD1
-#define I2O_EXEC_SYS_MODIFY 0xC1
-#define I2O_EXEC_SYS_QUIESCE 0xC3
-#define I2O_EXEC_SYS_TAB_SET 0xA3
-
- /* Init Outbound Q status */
-#define I2O_EXEC_OUTBOUND_INIT_IN_PROGRESS 0x01
-#define I2O_EXEC_OUTBOUND_INIT_REJECTED 0x02
-#define I2O_EXEC_OUTBOUND_INIT_FAILED 0x03
-#define I2O_EXEC_OUTBOUND_INIT_COMPLETE 0x04
-
-#define I2O_UTIL_NOP 0x00
-
-/* I2O Get Status State values */
-
-#define I2O_IOP_STATE_INITIALIZING 0x01
-#define I2O_IOP_STATE_RESET 0x02
-#define I2O_IOP_STATE_HOLD 0x04
-#define I2O_IOP_STATE_READY 0x05
-#define I2O_IOP_STATE_OPERATIONAL 0x08
-#define I2O_IOP_STATE_FAILED 0x10
-#define I2O_IOP_STATE_FAULTED 0x11
-
-/* Defines for Request Status Codes: Table 3-1 Reply Status Codes. */
-
-#define I2O_REPLY_STATUS_SUCCESS 0x00
-#define I2O_REPLY_STATUS_ABORT_DIRTY 0x01
-#define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER 0x02
-#define I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER 0x03
-#define I2O_REPLY_STATUS_ERROR_DIRTY 0x04
-#define I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER 0x05
-#define I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER 0x06
-#define I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY 0x07
-#define I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER 0x08
-#define I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER 0x09
-#define I2O_REPLY_STATUS_TRANSACTION_ERROR 0x0A
-#define I2O_REPLY_STATUS_PROGRESS_REPORT 0x80
-
-/* DetailedStatusCode defines for ALL messages: Table 3-2 Detailed Status Codes.*/
-
-#define I2O_DETAIL_STATUS_SUCCESS 0x0000
-#define I2O_DETAIL_STATUS_BAD_KEY 0x0001
-#define I2O_DETAIL_STATUS_CHAIN_BUFFER_TOO_LARGE 0x0002
-#define I2O_DETAIL_STATUS_DEVICE_BUSY 0x0003
-#define I2O_DETAIL_STATUS_DEVICE_LOCKED 0x0004
-#define I2O_DETAIL_STATUS_DEVICE_NOT_AVAILABLE 0x0005
-#define I2O_DETAIL_STATUS_DEVICE_RESET 0x0006
-#define I2O_DETAIL_STATUS_INAPPROPRIATE_FUNCTION 0x0007
-#define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_HARD 0x0008
-#define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_SOFT 0x0009
-#define I2O_DETAIL_STATUS_INVALID_INITIATOR_ADDRESS 0x000A
-#define I2O_DETAIL_STATUS_INVALID_MESSAGE_FLAGS 0x000B
-#define I2O_DETAIL_STATUS_INVALID_OFFSET 0x000C
-#define I2O_DETAIL_STATUS_INVALID_PARAMETER 0x000D
-#define I2O_DETAIL_STATUS_INVALID_REQUEST 0x000E
-#define I2O_DETAIL_STATUS_INVALID_TARGET_ADDRESS 0x000F
-#define I2O_DETAIL_STATUS_MESSAGE_TOO_LARGE 0x0010
-#define I2O_DETAIL_STATUS_MESSAGE_TOO_SMALL 0x0011
-#define I2O_DETAIL_STATUS_MISSING_PARAMETER 0x0012
-#define I2O_DETAIL_STATUS_NO_SUCH_PAGE 0x0013
-#define I2O_DETAIL_STATUS_REPLY_BUFFER_FULL 0x0014
-#define I2O_DETAIL_STATUS_TCL_ERROR 0x0015
-#define I2O_DETAIL_STATUS_TIMEOUT 0x0016
-#define I2O_DETAIL_STATUS_UNKNOWN_ERROR 0x0017
-#define I2O_DETAIL_STATUS_UNKNOWN_FUNCTION 0x0018
-#define I2O_DETAIL_STATUS_UNSUPPORTED_FUNCTION 0x0019
-#define I2O_DETAIL_STATUS_UNSUPPORTED_VERSION 0x001A
-
- /* I2O msg header defines for VersionOffset */
-#define I2OMSGVER_1_5 0x0001
-#define SGL_OFFSET_0 I2OMSGVER_1_5
-#define SGL_OFFSET_4 (0x0040 | I2OMSGVER_1_5)
-#define TRL_OFFSET_5 (0x0050 | I2OMSGVER_1_5)
-#define TRL_OFFSET_6 (0x0060 | I2OMSGVER_1_5)
-
- /* I2O msg header defines for MsgFlags */
-#define MSG_STATIC 0x0100
-#define MSG_64BIT_CNTXT 0x0200
-#define MSG_MULTI_TRANS 0x1000
-#define MSG_FAIL 0x2000
-#define MSG_LAST 0x4000
-#define MSG_REPLY 0x8000
-
- /* normal LAN request message MsgFlags and VersionOffset (0x1041) */
-#define LAN_MSG_REQST (MSG_MULTI_TRANS | SGL_OFFSET_4)
-
- /* minimum size msg */
-#define THREE_WORD_MSG_SIZE 0x00030000
-#define FOUR_WORD_MSG_SIZE 0x00040000
-#define FIVE_WORD_MSG_SIZE 0x00050000
-#define SIX_WORD_MSG_SIZE 0x00060000
-#define SEVEN_WORD_MSG_SIZE 0x00070000
-#define EIGHT_WORD_MSG_SIZE 0x00080000
-#define NINE_WORD_MSG_SIZE 0x00090000
-
-/* Special TID Assignments */
-
-#define I2O_IOP_TID 0
-#define I2O_HOST_TID 0xB91
-
- /* RedCreek I2O private message codes */
-#define RC_PRIVATE_GET_MAC_ADDR 0x0001/**/ /* OBSOLETE */
-#define RC_PRIVATE_SET_MAC_ADDR 0x0002
-#define RC_PRIVATE_GET_NIC_STATS 0x0003
-#define RC_PRIVATE_GET_LINK_STATUS 0x0004
-#define RC_PRIVATE_SET_LINK_SPEED 0x0005
-#define RC_PRIVATE_SET_IP_AND_MASK 0x0006
-/* #define RC_PRIVATE_GET_IP_AND_MASK 0x0007 *//* OBSOLETE */
-#define RC_PRIVATE_GET_LINK_SPEED 0x0008
-#define RC_PRIVATE_GET_FIRMWARE_REV 0x0009
-/* #define RC_PRIVATE_GET_MAC_ADDR 0x000A */
-#define RC_PRIVATE_GET_IP_AND_MASK 0x000B
-#define RC_PRIVATE_DEBUG_MSG 0x000C
-#define RC_PRIVATE_REPORT_DRIVER_CAPABILITY 0x000D
-#define RC_PRIVATE_SET_PROMISCUOUS_MODE 0x000e
-#define RC_PRIVATE_GET_PROMISCUOUS_MODE 0x000f
-#define RC_PRIVATE_SET_BROADCAST_MODE 0x0010
-#define RC_PRIVATE_GET_BROADCAST_MODE 0x0011
-
-#define RC_PRIVATE_REBOOT 0x00FF
-
-/* I2O message header */
-typedef struct _I2O_MESSAGE_FRAME {
- U8 VersionOffset;
- U8 MsgFlags;
- U16 MessageSize;
- BF TargetAddress:I2O_TID_SZ;
- BF InitiatorAddress:I2O_TID_SZ;
- BF Function:I2O_FUNCTION_SZ;
- U32 InitiatorContext;
- /* SGL[] */
-} I2O_MESSAGE_FRAME, *PI2O_MESSAGE_FRAME;
-
- /* assumed a 16K minus 256 byte space for outbound queue message frames */
-#define MSG_FRAME_SIZE 512
-#define NMBR_MSG_FRAMES 30
-
- /*
- ** in reserved space right after PAB in host memory is area for returning
- ** values from card
- */
-
-/*
-** typedef NICSTAT
-**
-** Data structure for NIC statistics retruned from PCI card. Data copied from
-** here to user allocated RCLINKSTATS (see rclanmtl.h) structure.
-*/
-typedef struct tag_NicStat {
- unsigned long TX_good;
- unsigned long TX_maxcol;
- unsigned long TX_latecol;
- unsigned long TX_urun;
- unsigned long TX_crs; /* lost carrier sense */
- unsigned long TX_def; /* transmit deferred */
- unsigned long TX_singlecol; /* single collisions */
- unsigned long TX_multcol;
- unsigned long TX_totcol;
- unsigned long Rcv_good;
- unsigned long Rcv_CRCerr;
- unsigned long Rcv_alignerr;
- unsigned long Rcv_reserr; /* rnr'd pkts */
- unsigned long Rcv_orun;
- unsigned long Rcv_cdt;
- unsigned long Rcv_runt;
- unsigned long dump_status; /* last field directly from the chip */
-} NICSTAT, *P_NICSTAT;
-
-#define DUMP_DONE 0x0000A005 /* completed statistical dump */
-#define DUMP_CLEAR 0x0000A007 /* completed stat dump and clear counters */
-
-static volatile int msgFlag;
-
-/* local function prototypes */
-static void ProcessOutboundI2OMsg (PPAB pPab, U32 phyMsgAddr);
-static int FillI2OMsgSGLFromTCB (PU32 pMsg, PRCTCB pXmitCntrlBlock);
-static int GetI2OStatus (PPAB pPab);
-static int SendI2OOutboundQInitMsg (PPAB pPab);
-static int SendEnableSysMsg (PPAB pPab);
-
-/*
-** =========================================================================
-** RCInitI2OMsgLayer()
-**
-** Initialize the RedCreek I2O Module and adapter.
-**
-** Inputs: dev - the devices net_device struct
-** TransmitCallbackFunction - address of transmit callback function
-** ReceiveCallbackFunction - address of receive callback function
-**
-** private message block is allocated by user. It must be in locked pages.
-** p_msgbuf and p_phymsgbuf point to the same location. Must be contigous
-** memory block of a minimum of 16K byte and long word aligned.
-** =========================================================================
-*/
-RC_RETURN
-RCInitI2OMsgLayer (struct net_device *dev,
- PFNTXCALLBACK TransmitCallbackFunction,
- PFNRXCALLBACK ReceiveCallbackFunction,
- PFNCALLBACK RebootCallbackFunction)
-{
- int result;
- PPAB pPab;
- U32 pciBaseAddr = dev->base_addr;
- PDPA pDpa = dev->priv;
- PU8 p_msgbuf = pDpa->msgbuf;
- PU8 p_phymsgbuf = (PU8) pDpa->msgbuf_dma;
-
- dprintk
- ("InitI2O: Adapter:0x%04ux ATU:0x%08ulx msgbuf:%p phymsgbuf:0x%08ulx\n"
- "TransmitCallbackFunction:0x%08ulx ReceiveCallbackFunction:0x%08ulx\n",
- pDpa->id, pciBaseAddr, p_msgbuf, (u32) p_phymsgbuf,
- (u32) TransmitCallbackFunction, (u32) ReceiveCallbackFunction);
-
- /* Check if this interface already initialized - if so, shut it down */
- if (pDpa->pPab != NULL) {
- printk (KERN_WARNING
- "(rcpci45 driver:) pDpa->pPab [%d] != NULL\n",
- pDpa->id);
-/* RCResetLANCard(pDpa->id, 0, (PU32)NULL, (PFNCALLBACK)NULL); */
- pDpa->pPab = NULL;
- }
-
- /* store adapter instance values in adapter block.
- * Adapter block is at beginning of message buffer */
-
- pPab = kmalloc (sizeof (*pPab), GFP_KERNEL);
- if (!pPab) {
- printk (KERN_ERR
- "(rcpci45 driver:) RCInitI2OMsgLayer: Could not allocate memory for PAB struct!\n");
- result = RC_RTN_MALLOC_ERROR;
- goto err_out;
- }
-
- memset (pPab, 0, sizeof (*pPab));
- pDpa->pPab = pPab;
- pPab->p_atu = (PATU) pciBaseAddr;
- pPab->pPci45LinBaseAddr = (PU8) pciBaseAddr;
-
- /* Set outbound message frame addr */
- pPab->outMsgBlockPhyAddr = (U32) p_phymsgbuf;
- pPab->pLinOutMsgBlock = (PU8) p_msgbuf;
-
- /* store callback function addresses */
- pPab->pTransCallbackFunc = TransmitCallbackFunction;
- pPab->pRecvCallbackFunc = ReceiveCallbackFunction;
- pPab->pRebootCallbackFunc = RebootCallbackFunction;
- pPab->pCallbackFunc = (PFNCALLBACK) NULL;
-
- /*
- ** Initialize I2O IOP
- */
- result = GetI2OStatus (pPab);
-
- if (result != RC_RTN_NO_ERROR)
- goto err_out_dealloc;
-
- if (pPab->IOPState == I2O_IOP_STATE_OPERATIONAL) {
- printk (KERN_INFO
- "(rcpci45 driver:) pPab->IOPState == op: resetting adapter\n");
- RCResetLANCard (dev, 0, (PU32) NULL, (PFNCALLBACK) NULL);
- }
-
- result = SendI2OOutboundQInitMsg (pPab);
-
- if (result != RC_RTN_NO_ERROR)
- goto err_out_dealloc;
-
- result = SendEnableSysMsg (pPab);
-
- if (result != RC_RTN_NO_ERROR)
- goto err_out_dealloc;
-
- return RC_RTN_NO_ERROR;
-
- err_out_dealloc:
- kfree (pPab);
- err_out:
- return result;
-}
-
-/*
-** =========================================================================
-** Disable and Enable I2O interrupts. I2O interrupts are enabled at Init time
-** but can be disabled and re-enabled through these two function calls.
-** Packets will still be put into any posted received buffers and packets will
-** be sent through RCI2OSendPacket() functions. Disabling I2O interrupts
-** will prevent hardware interrupt to host even though the outbound I2O msg
-** queue is not emtpy.
-** =========================================================================
-*/
-#define i960_OUT_POST_Q_INT_BIT 0x0008 /* bit set masks interrupts */
-
-RC_RETURN
-RCDisableI2OInterrupts (struct net_device * dev)
-{
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- pPab->p_atu->OutIntMask |= i960_OUT_POST_Q_INT_BIT;
-
- return RC_RTN_NO_ERROR;
-}
-
-RC_RETURN
-RCEnableI2OInterrupts (struct net_device * dev)
-{
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- pPab->p_atu->OutIntMask &= ~i960_OUT_POST_Q_INT_BIT;
-
- return RC_RTN_NO_ERROR;
-
-}
-
-/*
-** =========================================================================
-** RCI2OSendPacket()
-** =========================================================================
-*/
-RC_RETURN
-RCI2OSendPacket (struct net_device * dev, U32 InitiatorContext,
- PRCTCB pTransCtrlBlock)
-{
- U32 msgOffset;
- PU32 pMsg;
- int size;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- dprintk ("RCI2OSendPacket()...\n");
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- /* get Inbound free Q entry - reading from In Q gets free Q entry */
- /* offset to Msg Frame in PCI msg block */
-
- msgOffset = pPab->p_atu->InQueue;
-
- if (msgOffset == 0xFFFFFFFF) {
- dprintk ("RCI2OSendPacket(): Inbound Free Q empty!\n");
- return RC_RTN_FREE_Q_EMPTY;
- }
-
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-
- size = FillI2OMsgSGLFromTCB (pMsg + 4, pTransCtrlBlock);
-
- if (size == -1) { /* error processing TCB - send NOP msg */
- dprintk ("RCI2OSendPacket(): Error Rrocess TCB!\n");
- pMsg[0] = THREE_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] =
- I2O_UTIL_NOP << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- return RC_RTN_TCB_ERROR;
- } else { /* send over msg header */
-
- pMsg[0] = (size + 4) << 16 | LAN_MSG_REQST; /* send over message size and flags */
- pMsg[1] =
- I2O_LAN_PACKET_SEND << 24 | I2O_HOST_TID << 12 |
- RC_LAN_TARGET_ID;
- pMsg[2] = InitiatorContext;
- pMsg[3] = 0; /* batch reply */
- /* post to Inbound Post Q */
- pPab->p_atu->InQueue = msgOffset;
- return RC_RTN_NO_ERROR;
- }
-}
-
-/*
-** =========================================================================
-** RCI2OPostRecvBuffer()
-**
-** inputs: pBufrCntrlBlock - pointer to buffer control block
-**
-** returns TRUE if successful in sending message, else FALSE.
-** =========================================================================
-*/
-RC_RETURN
-RCPostRecvBuffers (struct net_device * dev, PRCTCB pTransCtrlBlock)
-{
- U32 msgOffset;
- PU32 pMsg;
- int size;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- dprintk ("RCPostRecvBuffers()...\n");
-
- /* search for DeviceHandle */
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- /* get Inbound free Q entry - reading from In Q gets free Q entry */
- /* offset to Msg Frame in PCI msg block */
- msgOffset = pPab->p_atu->InQueue;
-
- if (msgOffset == 0xFFFFFFFF) {
- dprintk ("RCPostRecvBuffers(): Inbound Free Q empty!\n");
- return RC_RTN_FREE_Q_EMPTY;
- }
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-
- size = FillI2OMsgSGLFromTCB (pMsg + 4, pTransCtrlBlock);
-
- if (size == -1) { /* error prcessing TCB - send 3 DWORD private msg == NOP */
- dprintk
- ("RCPostRecvBuffers(): Error Processing TCB! size = %d\n",
- size);
- pMsg[0] = THREE_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] =
- I2O_UTIL_NOP << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- /* post to Post Q */
- pPab->p_atu->InQueue = msgOffset;
- return RC_RTN_TCB_ERROR;
- } else { /* send over size msg header */
-
- pMsg[0] = (size + 4) << 16 | LAN_MSG_REQST; /* send over message size and flags */
- pMsg[1] =
- I2O_LAN_RECEIVE_POST << 24 | I2O_HOST_TID << 12 |
- RC_LAN_TARGET_ID;
- pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
- pMsg[3] = *(PU32) pTransCtrlBlock; /* number of packet buffers */
- /* post to Post Q */
- pPab->p_atu->InQueue = msgOffset;
- return RC_RTN_NO_ERROR;
- }
-}
-
-/*
-** =========================================================================
-** RCProcI2OMsgQ()
-**
-** Process I2O outbound message queue until empty.
-** =========================================================================
-*/
-irqreturn_t
-RCProcI2OMsgQ (struct net_device *dev)
-{
- U32 phyAddrMsg;
- PU8 p8Msg;
- PU32 p32;
- U16 count;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
- unsigned char debug_msg[20];
-
- if (pPab == NULL)
- return IRQ_NONE;
-
- phyAddrMsg = pPab->p_atu->OutQueue;
-
- while (phyAddrMsg != 0xFFFFFFFF) {
- p8Msg =
- pPab->pLinOutMsgBlock + (phyAddrMsg -
- pPab->outMsgBlockPhyAddr);
- p32 = (PU32) p8Msg;
-
- dprintk ("msg: 0x%x 0x%x \n", p8Msg[7], p32[5]);
-
- /* Send Packet Reply Msg */
- if (I2O_LAN_PACKET_SEND == p8Msg[7]) { /* function code byte */
- count = *(PU16) (p8Msg + 2);
- count -= p8Msg[0] >> 4;
- /* status, count, context[], adapter */
- (*pPab->pTransCallbackFunc) (p8Msg[19], count, p32 + 5,
- dev);
- } else if (I2O_LAN_RECEIVE_POST == p8Msg[7]) { /* Receive Packet Reply Msg */
- dprintk
- ("I2O_RECV_REPLY pPab:0x%08ulx p8Msg:0x%08ulx p32:0x%08ulx\n",
- (u32) pPab, (u32) p8Msg, (u32) p32);
- dprintk ("msg: 0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
- p32[0], p32[1], p32[2], p32[3]);
- dprintk (" 0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
- p32[4], p32[5], p32[6], p32[7]);
- dprintk (" 0x%08ulx:0X%08ulx:0x%08ulx:0x%08ulx\n",
- p32[8], p32[9], p32[10], p32[11]);
- /* status, count, buckets remaining, packetParmBlock, adapter */
- (*pPab->pRecvCallbackFunc) (p8Msg[19], p8Msg[12],
- p32[5], p32 + 6, dev);
- } else if (I2O_LAN_RESET == p8Msg[7]
- || I2O_LAN_SHUTDOWN == p8Msg[7])
- if (pPab->pCallbackFunc)
- (*pPab->pCallbackFunc) (p8Msg[19], 0, 0, dev);
- else
- pPab->pCallbackFunc = (PFNCALLBACK) 1;
- else if (I2O_PRIVATE == p8Msg[7]) {
- dprintk ("i2o private 0x%x, 0x%x \n", p8Msg[7], p32[5]);
- switch (p32[5]) {
- case RC_PRIVATE_DEBUG_MSG:
- msgFlag = 1;
- dprintk ("Received I2O_PRIVATE msg\n");
- debug_msg[15] = (p32[6] & 0xff000000) >> 24;
- debug_msg[14] = (p32[6] & 0x00ff0000) >> 16;
- debug_msg[13] = (p32[6] & 0x0000ff00) >> 8;
- debug_msg[12] = (p32[6] & 0x000000ff);
-
- debug_msg[11] = (p32[7] & 0xff000000) >> 24;
- debug_msg[10] = (p32[7] & 0x00ff0000) >> 16;
- debug_msg[9] = (p32[7] & 0x0000ff00) >> 8;
- debug_msg[8] = (p32[7] & 0x000000ff);
-
- debug_msg[7] = (p32[8] & 0xff000000) >> 24;
- debug_msg[6] = (p32[8] & 0x00ff0000) >> 16;
- debug_msg[5] = (p32[8] & 0x0000ff00) >> 8;
- debug_msg[4] = (p32[8] & 0x000000ff);
-
- debug_msg[3] = (p32[9] & 0xff000000) >> 24;
- debug_msg[2] = (p32[9] & 0x00ff0000) >> 16;
- debug_msg[1] = (p32[9] & 0x0000ff00) >> 8;
- debug_msg[0] = (p32[9] & 0x000000ff);
-
- debug_msg[16] = '\0';
- dprintk ("%s", debug_msg);
- break;
- case RC_PRIVATE_REBOOT:
- dprintk ("Adapter reboot initiated...\n");
- if (pPab->pRebootCallbackFunc)
- (*pPab->pRebootCallbackFunc) (0, 0, 0,
- dev);
- break;
- default:
- printk (KERN_WARNING
- "(rcpci45 driver:) Unknown private I2O msg received: 0x%x\n",
- p32[5]);
- break;
- }
- }
-
- /*
- ** Process other Msg's
- */
- else
- ProcessOutboundI2OMsg (pPab, phyAddrMsg);
-
- /* return MFA to outbound free Q */
- pPab->p_atu->OutQueue = phyAddrMsg;
-
- /* any more msgs? */
- phyAddrMsg = pPab->p_atu->OutQueue;
- }
-
- return IRQ_HANDLED;
-}
-
-/*
-** =========================================================================
-** Returns LAN interface statistical counters to space provided by caller at
-** StatsReturnAddr. Returns 0 if success, else RC_RETURN code.
-** This function will call the WaitCallback function provided by
-** user while waiting for card to respond.
-** =========================================================================
-*/
-RC_RETURN
-RCGetLinkStatistics (struct net_device *dev,
- P_RCLINKSTATS StatsReturnAddr,
- PFNWAITCALLBACK WaitCallback)
-{
- U32 msgOffset;
- volatile U32 timeout;
- volatile PU32 pMsg;
- volatile PU32 p32, pReturnAddr;
- P_NICSTAT pStats;
- int i;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
-/*dprintk("Get82558Stats() StatsReturnAddr:0x%08ulx\n", StatsReturnAddr); */
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- msgOffset = pPab->p_atu->InQueue;
-
- if (msgOffset == 0xFFFFFFFF) {
- dprintk ("Get8255XStats(): Inbound Free Q empty!\n");
- return RC_RTN_FREE_Q_EMPTY;
- }
-
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-
-/*dprintk("Get82558Stats - pMsg = 0x%08ulx, InQ msgOffset = 0x%08ulx\n", pMsg, msgOffset);*/
-/*dprintk("Get82558Stats - pMsg = 0x%08X, InQ msgOffset = 0x%08X\n", pMsg, msgOffset);*/
-
- pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
- pMsg[3] = 0x112; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_NIC_STATS;
- pMsg[5] = pPab->outMsgBlockPhyAddr;
-
- p32 = (PU32) pPab->outMsgBlockPhyAddr;
- pStats = (P_NICSTAT) pPab->pLinOutMsgBlock;
- pStats->dump_status = 0xFFFFFFFF;
-
- /* post to Inbound Post Q */
- pPab->p_atu->InQueue = msgOffset;
-
- timeout = 100000;
- while (1) {
- if (WaitCallback)
- (*WaitCallback) ();
-
- udelay (10);
-
- if (pStats->dump_status != 0xFFFFFFFF)
- break;
-
- if (!timeout--) {
- dprintk
- ("RCGet82558Stats() Timeout waiting for NIC statistics\n");
- return RC_RTN_MSG_REPLY_TIMEOUT;
- }
- }
-
- pReturnAddr = (PU32) StatsReturnAddr;
-
- /* copy Nic stats to user's structure */
- for (i = 0; i < (int) sizeof (RCLINKSTATS) / 4; i++)
- pReturnAddr[i] = p32[i];
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** Get82558LinkStatus()
-** =========================================================================
-*/
-RC_RETURN
-RCGetLinkStatus (struct net_device * dev, PU32 ReturnAddr,
- PFNWAITCALLBACK WaitCallback)
-{
- U32 msgOffset;
- volatile U32 timeout;
- volatile PU32 pMsg;
- volatile PU32 p32;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- dprintk ("Get82558LinkStatus() ReturnPhysAddr:0x%08ulx\n",
- (u32) ReturnAddr);
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- msgOffset = pPab->p_atu->InQueue;
-
- if (msgOffset == 0xFFFFFFFF) {
- dprintk ("Get82558LinkStatus(): Inbound Free Q empty!\n");
- return RC_RTN_FREE_Q_EMPTY;
- }
-
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-/*dprintk("Get82558LinkStatus - pMsg = 0x%08ulx, InQ msgOffset = 0x%08ulx\n", pMsg, msgOffset);*/
-/*dprintk("Get82558LinkStatus - pMsg = 0x%08X, InQ msgOffset = 0x%08X\n", pMsg, msgOffset);*/
-
- pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
- pMsg[3] = 0x112; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_LINK_STATUS;
- pMsg[5] = pPab->outMsgBlockPhyAddr;
-
- p32 = (PU32) pPab->pLinOutMsgBlock;
- *p32 = 0xFFFFFFFF;
-
- /* post to Inbound Post Q */
- pPab->p_atu->InQueue = msgOffset;
-
- timeout = 100000;
- while (1) {
- if (WaitCallback)
- (*WaitCallback) ();
-
- udelay (10);
-
- if (*p32 != 0xFFFFFFFF)
- break;
-
- if (!timeout--) {
- dprintk ("Timeout waiting for link status\n");
- return RC_RTN_MSG_REPLY_TIMEOUT;
- }
- }
-
- *ReturnAddr = *p32; /* 1 = up 0 = down */
-
- return RC_RTN_NO_ERROR;
-
-}
-
-/*
-** =========================================================================
-** RCGetMAC()
-**
-** get the MAC address the adapter is listening for in non-promiscous mode.
-** MAC address is in media format.
-** =========================================================================
-*/
-RC_RETURN
-RCGetMAC (struct net_device * dev, PFNWAITCALLBACK WaitCallback)
-{
- unsigned timeout;
- U32 off;
- PU8 mac = dev->dev_addr;
- PU32 p;
- U32 temp[2];
- PPAB pPab = ((PDPA) dev->priv)->pPab;
- PATU p_atu;
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- p_atu = pPab->p_atu;
-
- p_atu->EtherMacLow = 0; /* first zero return data */
- p_atu->EtherMacHi = 0;
-
- off = p_atu->InQueue; /* get addresss of message */
-
- if (0xFFFFFFFF == off)
- return RC_RTN_FREE_Q_EMPTY;
-
- p = (PU32) (pPab->pPci45LinBaseAddr + off);
-
- dprintk ("RCGetMAC: p_atu 0x%08x, off 0x%08x, p 0x%08x\n",
- (uint) p_atu, (uint) off, (uint) p);
- /* setup private message */
- p[0] = FIVE_WORD_MSG_SIZE | SGL_OFFSET_0;
- p[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- p[2] = 0; /* initiator context */
- p[3] = 0x218; /* transaction context */
- p[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_MAC_ADDR;
-
- p_atu->InQueue = off; /* send it to the I2O device */
- dprintk ("RCGetMAC: p_atu 0x%08x, off 0x%08x, p 0x%08x\n",
- (uint) p_atu, (uint) off, (uint) p);
-
- /* wait for the rcpci45 board to update the info */
- timeout = 1000000;
- while (0 == p_atu->EtherMacLow) {
- if (WaitCallback)
- (*WaitCallback) ();
-
- udelay (10);
-
- if (!timeout--) {
- printk ("rc_getmac: Timeout\n");
- return RC_RTN_MSG_REPLY_TIMEOUT;
- }
- }
-
- /* read the mac address */
- temp[0] = p_atu->EtherMacLow;
- temp[1] = p_atu->EtherMacHi;
- memcpy ((char *) mac, (char *) temp, 6);
-
- dprintk ("rc_getmac: 0x%x\n", (u32) mac);
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCSetMAC()
-**
-** set MAC address the adapter is listening for in non-promiscous mode.
-** MAC address is in media format.
-** =========================================================================
-*/
-RC_RETURN
-RCSetMAC (struct net_device * dev, PU8 mac)
-{
- U32 off;
- PU32 pMsg;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- off = pPab->p_atu->InQueue; /* get addresss of message */
-
- if (0xFFFFFFFF == off)
- return RC_RTN_FREE_Q_EMPTY;
-
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
-
- /* setup private message */
- pMsg[0] = SEVEN_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = 0; /* initiator context */
- pMsg[3] = 0x219; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_SET_MAC_ADDR;
- pMsg[5] = *(unsigned *) mac; /* first four bytes */
- pMsg[6] = *(unsigned *) (mac + 4); /* last two bytes */
-
- pPab->p_atu->InQueue = off; /* send it to the I2O device */
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCSetLinkSpeed()
-**
-** set ethernet link speed.
-** input: speedControl - determines action to take as follows
-** 0 = reset and auto-negotiate (NWay)
-** 1 = Full Duplex 100BaseT
-** 2 = Half duplex 100BaseT
-** 3 = Full Duplex 10BaseT
-** 4 = Half duplex 10BaseT
-** all other values are ignore (do nothing)
-** =========================================================================
-*/
-RC_RETURN
-RCSetLinkSpeed (struct net_device * dev, U16 LinkSpeedCode)
-{
- U32 off;
- PU32 pMsg;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- off = pPab->p_atu->InQueue; /* get addresss of message */
-
- if (0xFFFFFFFF == off)
- return RC_RTN_FREE_Q_EMPTY;
-
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
-
- /* setup private message */
- pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = 0; /* initiator context */
- pMsg[3] = 0x219; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_SET_LINK_SPEED;
- pMsg[5] = LinkSpeedCode; /* link speed code */
-
- pPab->p_atu->InQueue = off; /* send it to the I2O device */
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCSetPromiscuousMode()
-**
-** Defined values for Mode:
-** 0 - turn off promiscuous mode
-** 1 - turn on promiscuous mode
-**
-** =========================================================================
-*/
-RC_RETURN
-RCSetPromiscuousMode (struct net_device * dev, U16 Mode)
-{
- U32 off;
- PU32 pMsg;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- off = pPab->p_atu->InQueue; /* get addresss of message */
-
- if (0xFFFFFFFF == off)
- return RC_RTN_FREE_Q_EMPTY;
-
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
-
- /* setup private message */
- pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = 0; /* initiator context */
- pMsg[3] = 0x219; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_SET_PROMISCUOUS_MODE;
- pMsg[5] = Mode; /* promiscuous mode setting */
-
- pPab->p_atu->InQueue = off; /* send it to the device */
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCGetPromiscuousMode()
-**
-** get promiscuous mode setting
-**
-** Possible return values placed in pMode:
-** 0 = promisuous mode not set
-** 1 = promisuous mode is set
-**
-** =========================================================================
-*/
-RC_RETURN
-RCGetPromiscuousMode (struct net_device * dev, PU32 pMode,
- PFNWAITCALLBACK WaitCallback)
-{
- U32 msgOffset, timeout;
- PU32 pMsg;
- volatile PU32 p32;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- msgOffset = pPab->p_atu->InQueue;
-
- if (msgOffset == 0xFFFFFFFF) {
- printk (KERN_WARNING
- "(rcpci45 driver:) RCGetLinkSpeed(): Inbound Free Q empty!\n");
- return RC_RTN_FREE_Q_EMPTY;
- }
-
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-
- /* virtual pointer to return buffer - clear first two dwords */
- p32 = (volatile PU32) pPab->pLinOutMsgBlock;
- p32[0] = 0xff;
-
- /* setup private message */
- pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = 0; /* initiator context */
- pMsg[3] = 0x219; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_PROMISCUOUS_MODE;
- /* phys address to return status - area right after PAB */
- pMsg[5] = pPab->outMsgBlockPhyAddr;
-
- /* post to Inbound Post Q */
-
- pPab->p_atu->InQueue = msgOffset;
-
- /* wait for response */
- timeout = 1000000;
- while (1) {
- if (WaitCallback)
- (*WaitCallback) ();
-
- udelay (10); /* please don't hog the bus!!! */
-
- if (p32[0] != 0xff)
- break;
-
- if (!timeout--) {
- dprintk
- ("Timeout waiting for promiscuous mode from adapter\n");
- dprintk ("0x%8x\n", p32[0]);
- return RC_RTN_NO_LINK_SPEED;
- }
- }
-
- /* get mode */
- *pMode = (U8) ((volatile PU8) p32)[0] & 0x0f;
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCSetBroadcastMode()
-**
-** Defined values for Mode:
-** 0 - turn off promiscuous mode
-** 1 - turn on promiscuous mode
-**
-** =========================================================================
-*/
-RC_RETURN
-RCSetBroadcastMode (struct net_device * dev, U16 Mode)
-{
- U32 off;
- PU32 pMsg;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- off = pPab->p_atu->InQueue; /* get addresss of message */
-
- if (0xFFFFFFFF == off)
- return RC_RTN_FREE_Q_EMPTY;
-
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
-
- /* setup private message */
- pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = 0; /* initiator context */
- pMsg[3] = 0x219; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_SET_BROADCAST_MODE;
- pMsg[5] = Mode; /* promiscuous mode setting */
-
- pPab->p_atu->InQueue = off; /* send it to the device */
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCGetBroadcastMode()
-**
-** get promiscuous mode setting
-**
-** Possible return values placed in pMode:
-** 0 = promisuous mode not set
-** 1 = promisuous mode is set
-**
-** =========================================================================
-*/
-RC_RETURN
-RCGetBroadcastMode (struct net_device * dev, PU32 pMode,
- PFNWAITCALLBACK WaitCallback)
-{
- U32 msgOffset, timeout;
- PU32 pMsg;
- volatile PU32 p32;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- msgOffset = pPab->p_atu->InQueue;
-
- if (msgOffset == 0xFFFFFFFF) {
- printk (KERN_WARNING
- "(rcpci45 driver:) RCGetLinkSpeed(): Inbound Free Q empty!\n");
- return RC_RTN_FREE_Q_EMPTY;
- }
-
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-
- /* virtual pointer to return buffer - clear first two dwords */
- p32 = (volatile PU32) pPab->pLinOutMsgBlock;
- p32[0] = 0xff;
-
- /* setup private message */
- pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = 0; /* initiator context */
- pMsg[3] = 0x219; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_BROADCAST_MODE;
- /* phys address to return status - area right after PAB */
- pMsg[5] = pPab->outMsgBlockPhyAddr;
-
- /* post to Inbound Post Q */
-
- pPab->p_atu->InQueue = msgOffset;
-
- /* wait for response */
- timeout = 1000000;
- while (1) {
- if (WaitCallback)
- (*WaitCallback) ();
-
- udelay (10); /* please don't hog the bus!!! */
-
- if (p32[0] != 0xff)
- break;
-
- if (!timeout--) {
- printk (KERN_WARNING
- "(rcpci45 driver:) Timeout waiting for promiscuous mode from adapter\n");
- printk (KERN_WARNING "(rcpci45 driver:) 0x%8x\n",
- p32[0]);
- return RC_RTN_NO_LINK_SPEED;
- }
- }
-
- /* get mode */
- *pMode = (U8) ((volatile PU8) p32)[0] & 0x0f;
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCGetLinkSpeed()
-**
-** get ethernet link speed.
-**
-** 0 = Unknown
-** 1 = Full Duplex 100BaseT
-** 2 = Half duplex 100BaseT
-** 3 = Full Duplex 10BaseT
-** 4 = Half duplex 10BaseT
-**
-** =========================================================================
-*/
-RC_RETURN
-RCGetLinkSpeed (struct net_device * dev, PU32 pLinkSpeedCode,
- PFNWAITCALLBACK WaitCallback)
-{
- U32 msgOffset, timeout;
- PU32 pMsg;
- volatile PU32 p32;
- U8 IOPLinkSpeed;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- msgOffset = pPab->p_atu->InQueue;
-
- if (msgOffset == 0xFFFFFFFF) {
- printk (KERN_WARNING
- "(rcpci45 driver:) RCGetLinkSpeed(): Inbound Free Q empty!\n");
- return RC_RTN_FREE_Q_EMPTY;
- }
-
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-
- /* virtual pointer to return buffer - clear first two dwords */
- p32 = (volatile PU32) pPab->pLinOutMsgBlock;
- p32[0] = 0xff;
-
- /* setup private message */
- pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = 0; /* initiator context */
- pMsg[3] = 0x219; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_LINK_SPEED;
- /* phys address to return status - area right after PAB */
- pMsg[5] = pPab->outMsgBlockPhyAddr;
-
- /* post to Inbound Post Q */
-
- pPab->p_atu->InQueue = msgOffset;
-
- /* wait for response */
- timeout = 1000000;
- while (1) {
- if (WaitCallback)
- (*WaitCallback) ();
-
- udelay (10); /* please don't hog the bus!!! */
-
- if (p32[0] != 0xff)
- break;
-
- if (!timeout--) {
- dprintk ("Timeout waiting for link speed from IOP\n");
- dprintk ("0x%8x\n", p32[0]);
- return RC_RTN_NO_LINK_SPEED;
- }
- }
-
- /* get Link speed */
- IOPLinkSpeed = (U8) ((volatile PU8) p32)[0] & 0x0f;
-
- *pLinkSpeedCode = IOPLinkSpeed;
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCReportDriverCapability(struct net_device *dev, U32 capability)
-**
-** Currently defined bits:
-** WARM_REBOOT_CAPABLE 0x01
-**
-** =========================================================================
-*/
-RC_RETURN
-RCReportDriverCapability (struct net_device * dev, U32 capability)
-{
- U32 off;
- PU32 pMsg;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- off = pPab->p_atu->InQueue; /* get addresss of message */
-
- if (0xFFFFFFFF == off)
- return RC_RTN_FREE_Q_EMPTY;
-
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
-
- /* setup private message */
- pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = 0; /* initiator context */
- pMsg[3] = 0x219; /* transaction context */
- pMsg[4] =
- RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_REPORT_DRIVER_CAPABILITY;
- pMsg[5] = capability;
-
- pPab->p_atu->InQueue = off; /* send it to the I2O device */
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCGetFirmwareVer()
-**
-** Return firmware version in the form "SoftwareVersion : Bt BootVersion"
-**
-** =========================================================================
-*/
-RC_RETURN
-RCGetFirmwareVer (struct net_device * dev, PU8 pFirmString,
- PFNWAITCALLBACK WaitCallback)
-{
- U32 msgOffset, timeout;
- PU32 pMsg;
- volatile PU32 p32;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- msgOffset = pPab->p_atu->InQueue;
- if (msgOffset == 0xFFFFFFFF) {
- dprintk ("RCGetFirmwareVer(): Inbound Free Q empty!\n");
- return RC_RTN_FREE_Q_EMPTY;
- }
-
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-
- /* virtual pointer to return buffer - clear first two dwords */
- p32 = (volatile PU32) pPab->pLinOutMsgBlock;
- p32[0] = 0xff;
-
- /* setup private message */
- pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = 0; /* initiator context */
- pMsg[3] = 0x219; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_FIRMWARE_REV;
- /* phys address to return status - area right after PAB */
- pMsg[5] = pPab->outMsgBlockPhyAddr;
-
- /* post to Inbound Post Q */
-
- pPab->p_atu->InQueue = msgOffset;
-
- /* wait for response */
- timeout = 1000000;
- while (1) {
- if (WaitCallback)
- (*WaitCallback) ();
-
- udelay (10); /* please don't hog the bus!!! */
-
- if (p32[0] != 0xff)
- break;
-
- if (!timeout--) {
- dprintk ("Timeout waiting for link speed from IOP\n");
- return RC_RTN_NO_FIRM_VER;
- }
- }
-
- strcpy (pFirmString, (PU8) p32);
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCResetLANCard()
-**
-** ResourceFlags indicates whether to return buffer resource explicitly
-** to host or keep and reuse.
-** CallbackFunction (if not NULL) is the function to be called when
-** reset is complete.
-** If CallbackFunction is NULL, ReturnAddr will have a 1 placed in it when
-** reset is done (if not NULL).
-**
-** =========================================================================
-*/
-RC_RETURN
-RCResetLANCard (struct net_device * dev, U16 ResourceFlags, PU32 ReturnAddr,
- PFNCALLBACK CallbackFunction)
-{
- unsigned long off;
- PU32 pMsg;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
- long timeout = 0;
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- off = pPab->p_atu->InQueue; /* get addresss of message */
-
- if (0xFFFFFFFF == off)
- return RC_RTN_FREE_Q_EMPTY;
-
- pPab->pCallbackFunc = CallbackFunction;
-
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
-
- /* setup message */
- pMsg[0] = FOUR_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_LAN_RESET << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
- pMsg[3] = ResourceFlags << 16; /* resource flags */
-
- pPab->p_atu->InQueue = off; /* send it to the I2O device */
-
- if (CallbackFunction == (PFNCALLBACK) NULL) {
- /* call RCProcI2OMsgQ() until something in pPab->pCallbackFunc
- or until timer goes off */
- while (pPab->pCallbackFunc == (PFNCALLBACK) NULL) {
- RCProcI2OMsgQ (dev);
- udelay (1000); /* please don't hog the bus!!! */
- timeout++;
- if (timeout > 10000) {
- break;
- }
- }
- if (ReturnAddr != (PU32) NULL)
- *ReturnAddr = (U32) pPab->pCallbackFunc;
- }
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCResetIOP()
-**
-** Send StatusGet Msg, wait for results return directly to buffer.
-**
-** =========================================================================
-*/
-RC_RETURN
-RCResetIOP (struct net_device * dev)
-{
- U32 msgOffset, timeout;
- PU32 pMsg;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
- volatile PU32 p32;
-
- msgOffset = pPab->p_atu->InQueue;
-
- if (msgOffset == 0xFFFFFFFF) {
- return RC_RTN_FREE_Q_EMPTY;
- }
-
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-
- pMsg[0] = NINE_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_EXEC_IOP_RESET << 24 | I2O_HOST_TID << 12 | I2O_IOP_TID;
- pMsg[2] = 0; /* universal context */
- pMsg[3] = 0; /* universal context */
- pMsg[4] = 0; /* universal context */
- pMsg[5] = 0; /* universal context */
- /* phys address to return status - area right after PAB */
- pMsg[6] = pPab->outMsgBlockPhyAddr;
- pMsg[7] = 0;
- pMsg[8] = 1; /* return 1 byte */
-
- /* virtual pointer to return buffer - clear first two dwords */
- p32 = (volatile PU32) pPab->pLinOutMsgBlock;
- p32[0] = 0;
- p32[1] = 0;
-
- /* post to Inbound Post Q */
-
- pPab->p_atu->InQueue = msgOffset;
-
- /* wait for response */
- timeout = 1000000;
- while (1) {
- udelay (10); /* please don't hog the bus!!! */
-
- if (p32[0] || p32[1])
- break;
-
- if (!timeout--) {
- dprintk ("RCResetIOP timeout\n");
- return RC_RTN_MSG_REPLY_TIMEOUT;
- }
- }
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCShutdownLANCard()
-**
-** ResourceFlags indicates whether to return buffer resource explicitly
-** to host or keep and reuse.
-** CallbackFunction (if not NULL) is the function to be called when
-** shutdown is complete.
-** If CallbackFunction is NULL, ReturnAddr will have a 1 placed in it when
-** shutdown is done (if not NULL).
-**
-** =========================================================================
-*/
-RC_RETURN
-RCShutdownLANCard (struct net_device * dev, U16 ResourceFlags,
- PU32 ReturnAddr, PFNCALLBACK CallbackFunction)
-{
- volatile PU32 pMsg;
- U32 off;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
- long timeout = 0;
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- off = pPab->p_atu->InQueue; /* get addresss of message */
-
- if (0xFFFFFFFF == off)
- return RC_RTN_FREE_Q_EMPTY;
-
- pPab->pCallbackFunc = CallbackFunction;
-
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
-
- /* setup message */
- pMsg[0] = FOUR_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] =
- I2O_LAN_SHUTDOWN << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
- pMsg[3] = ResourceFlags << 16; /* resource flags */
-
- pPab->p_atu->InQueue = off; /* send it to the I2O device */
-
- if (CallbackFunction == (PFNCALLBACK) NULL) {
- /* call RCProcI2OMsgQ() until something in pPab->pCallbackFunc
- or until timer goes off */
- while (pPab->pCallbackFunc == (PFNCALLBACK) NULL) {
- RCProcI2OMsgQ (dev);
- udelay (1000); /* please don't hog the bus!!! */
- timeout++;
- if (timeout > 10000) {
- printk (KERN_WARNING
- "(rcpci45 driver:) RCShutdownLANCard(): timeout\n");
- break;
- }
- }
- if (ReturnAddr != (PU32) NULL)
- *ReturnAddr = (U32) pPab->pCallbackFunc;
- }
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** RCSetRavlinIPandMask()
-**
-** Set the Ravlin 45/PCI cards IP address and network mask.
-**
-** IP address and mask must be in network byte order.
-** For example, IP address 1.2.3.4 and mask 255.255.255.0 would be
-** 0x04030201 and 0x00FFFFFF on a little endian machine.
-**
-** =========================================================================
-*/
-RC_RETURN
-RCSetRavlinIPandMask (struct net_device * dev, U32 ipAddr, U32 netMask)
-{
- volatile PU32 pMsg;
- U32 off;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- off = pPab->p_atu->InQueue; /* get addresss of message */
-
- if (0xFFFFFFFF == off)
- return RC_RTN_FREE_Q_EMPTY;
-
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
-
- /* setup private message */
- pMsg[0] = SEVEN_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = 0; /* initiator context */
- pMsg[3] = 0x219; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_SET_IP_AND_MASK;
- pMsg[5] = ipAddr;
- pMsg[6] = netMask;
-
- pPab->p_atu->InQueue = off; /* send it to the I2O device */
- return RC_RTN_NO_ERROR;
-
-}
-
-/*
-** =========================================================================
-** RCGetRavlinIPandMask()
-**
-** get the IP address and MASK from the card
-**
-** =========================================================================
-*/
-RC_RETURN
-RCGetRavlinIPandMask (struct net_device * dev, PU32 pIpAddr, PU32 pNetMask,
- PFNWAITCALLBACK WaitCallback)
-{
- unsigned timeout;
- U32 off;
- PU32 pMsg, p32;
- PPAB pPab = ((PDPA) dev->priv)->pPab;
- PATU p_atu;
-
- dprintk
- ("RCGetRavlinIPandMask: pIpAddr is 0x%08ulx, *IpAddr is 0x%08ulx\n",
- (u32) pIpAddr, *pIpAddr);
-
- if (pPab == NULL)
- return RC_RTN_ADPTR_NOT_REGISTERED;
-
- p_atu = pPab->p_atu;
- off = p_atu->InQueue; /* get addresss of message */
-
- if (0xFFFFFFFF == off)
- return RC_RTN_FREE_Q_EMPTY;
-
- p32 = (volatile PU32) pPab->pLinOutMsgBlock;
- *p32 = 0xFFFFFFFF;
-
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
-
- dprintk
- ("RCGetRavlinIPandMask: p_atu 0x%08ulx, off 0x%08ulx, p32 0x%08ulx\n",
- (u32) p_atu, off, (u32) p32);
- /* setup private message */
- pMsg[0] = FIVE_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
- pMsg[2] = 0; /* initiator context */
- pMsg[3] = 0x218; /* transaction context */
- pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_IP_AND_MASK;
- pMsg[5] = pPab->outMsgBlockPhyAddr;
-
- p_atu->InQueue = off; /* send it to the I2O device */
- dprintk
- ("RCGetRavlinIPandMask: p_atu 0x%08ulx, off 0x%08ulx, p32 0x%08ulx\n",
- (u32) p_atu, off, (u32) p32);
-
- /* wait for the rcpci45 board to update the info */
- timeout = 100000;
- while (0xffffffff == *p32) {
- if (WaitCallback)
- (*WaitCallback) ();
-
- udelay (10);
-
- if (!timeout--) {
- dprintk ("RCGetRavlinIPandMask: Timeout\n");
- return RC_RTN_MSG_REPLY_TIMEOUT;
- }
- }
-
- dprintk
- ("RCGetRavlinIPandMask: after time out\np32[0] (IpAddr) 0x%08ulx, p32[1] (IPmask) 0x%08ulx\n",
- p32[0], p32[1]);
-
- /* send IP and mask to user's space */
- *pIpAddr = p32[0];
- *pNetMask = p32[1];
-
- dprintk
- ("RCGetRavlinIPandMask: pIpAddr is 0x%08ulx, *IpAddr is 0x%08ulx\n",
- (u32) pIpAddr, *pIpAddr);
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** /////////////////////////////////////////////////////////////////////////
-** /////////////////////////////////////////////////////////////////////////
-**
-** local functions
-**
-** /////////////////////////////////////////////////////////////////////////
-** /////////////////////////////////////////////////////////////////////////
-*/
-
-/*
-** =========================================================================
-** SendI2OOutboundQInitMsg()
-**
-** =========================================================================
-*/
-static int
-SendI2OOutboundQInitMsg (PPAB pPab)
-{
- U32 msgOffset, timeout, phyOutQFrames, i;
- volatile PU32 pMsg;
- volatile PU32 p32;
-
- msgOffset = pPab->p_atu->InQueue;
-
- if (msgOffset == 0xFFFFFFFF) {
- dprintk ("SendI2OOutboundQInitMsg(): Inbound Free Q empty!\n");
- return RC_RTN_FREE_Q_EMPTY;
- }
-
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-
- dprintk
- ("SendI2OOutboundQInitMsg - pMsg = 0x%08ulx, InQ msgOffset = 0x%08ulx\n",
- (u32) pMsg, msgOffset);
-
- pMsg[0] = EIGHT_WORD_MSG_SIZE | TRL_OFFSET_6;
- pMsg[1] =
- I2O_EXEC_OUTBOUND_INIT << 24 | I2O_HOST_TID << 12 | I2O_IOP_TID;
- pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
- pMsg[3] = 0x106; /* transaction context */
- pMsg[4] = 4096; /* Host page frame size */
- pMsg[5] = MSG_FRAME_SIZE << 16 | 0x80; /* outbound msg frame size and Initcode */
- pMsg[6] = 0xD0000004; /* simple sgl element LE, EOB */
- /* phys address to return status - area right after PAB */
- pMsg[7] = pPab->outMsgBlockPhyAddr;
-
- /* virtual pointer to return buffer - clear first two dwords */
- p32 = (PU32) pPab->pLinOutMsgBlock;
- p32[0] = 0;
-
- /* post to Inbound Post Q */
- pPab->p_atu->InQueue = msgOffset;
-
- /* wait for response */
- timeout = 100000;
- while (1) {
- udelay (10); /* please don't hog the bus!!! */
-
- if (p32[0])
- break;
-
- if (!timeout--) {
- dprintk
- ("Timeout wait for InitOutQ InPrgress status from IOP\n");
- return RC_RTN_NO_I2O_STATUS;
- }
- }
-
- timeout = 100000;
- while (1) {
- udelay (10); /* please don't hog the bus!!! */
-
- if (p32[0] == I2O_EXEC_OUTBOUND_INIT_COMPLETE)
- break;
-
- if (!timeout--) {
- dprintk
- ("Timeout wait for InitOutQ Complete status from IOP\n");
- return RC_RTN_NO_I2O_STATUS;
- }
- }
-
- /* load PCI outbound free Q with MF physical addresses */
- phyOutQFrames = pPab->outMsgBlockPhyAddr;
-
- for (i = 0; i < NMBR_MSG_FRAMES; i++) {
- pPab->p_atu->OutQueue = phyOutQFrames;
- phyOutQFrames += MSG_FRAME_SIZE;
- }
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** GetI2OStatus()
-**
-** Send StatusGet Msg, wait for results return directly to buffer.
-**
-** =========================================================================
-*/
-static int
-GetI2OStatus (PPAB pPab)
-{
- U32 msgOffset, timeout;
- PU32 pMsg;
- volatile PU32 p32;
-
- msgOffset = pPab->p_atu->InQueue;
- dprintk ("GetI2OStatus: msg offset = 0x%x\n", msgOffset);
- if (msgOffset == 0xFFFFFFFF) {
- dprintk ("GetI2OStatus(): Inbound Free Q empty!\n");
- return RC_RTN_FREE_Q_EMPTY;
- }
-
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-
- pMsg[0] = NINE_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_EXEC_STATUS_GET << 24 | I2O_HOST_TID << 12 | I2O_IOP_TID;
- pMsg[2] = 0; /* universal context */
- pMsg[3] = 0; /* universal context */
- pMsg[4] = 0; /* universal context */
- pMsg[5] = 0; /* universal context */
- /* phys address to return status - area right after PAB */
- pMsg[6] = pPab->outMsgBlockPhyAddr;
- pMsg[7] = 0;
- pMsg[8] = 88; /* return 88 bytes */
-
- /* virtual pointer to return buffer - clear first two dwords */
- p32 = (volatile PU32) pPab->pLinOutMsgBlock;
- p32[0] = 0;
- p32[1] = 0;
-
- dprintk
- ("GetI2OStatus - pMsg:0x%08ulx, msgOffset:0x%08ulx, [1]:0x%08ulx, [6]:0x%08ulx\n",
- (u32) pMsg, msgOffset, pMsg[1], pMsg[6]);
-
- /* post to Inbound Post Q */
- pPab->p_atu->InQueue = msgOffset;
-
- dprintk ("Return status to p32 = 0x%08ulx\n", (u32) p32);
-
- /* wait for response */
- timeout = 1000000;
- while (1) {
- udelay (10); /* please don't hog the bus!!! */
-
- if (p32[0] && p32[1])
- break;
-
- if (!timeout--) {
- dprintk ("Timeout waiting for status from IOP\n");
- dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
- p32[0], p32[1], p32[2], p32[3]);
- dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
- p32[4], p32[5], p32[6], p32[7]);
- dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
- p32[8], p32[9], p32[10], p32[11]);
- return RC_RTN_NO_I2O_STATUS;
- }
- }
-
- dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n", p32[0], p32[1],
- p32[2], p32[3]);
- dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n", p32[4], p32[5],
- p32[6], p32[7]);
- dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n", p32[8], p32[9],
- p32[10], p32[11]);
- /* get IOP state */
- pPab->IOPState = ((volatile PU8) p32)[10];
- pPab->InboundMFrameSize = ((volatile PU16) p32)[6];
-
- dprintk ("IOP state 0x%02x InFrameSize = 0x%04x\n",
- pPab->IOPState, pPab->InboundMFrameSize);
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** SendEnableSysMsg()
-**
-**
-** =========================================================================
-*/
-static int
-SendEnableSysMsg (PPAB pPab)
-{
- U32 msgOffset;
- volatile PU32 pMsg;
-
- msgOffset = pPab->p_atu->InQueue;
-
- if (msgOffset == 0xFFFFFFFF) {
- dprintk ("SendEnableSysMsg(): Inbound Free Q empty!\n");
- return RC_RTN_FREE_Q_EMPTY;
- }
-
- /* calc virtual address of msg - virtual already mapped to physical */
- pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
-
- dprintk
- ("SendEnableSysMsg - pMsg = 0x%08ulx, InQ msgOffset = 0x%08ulx\n",
- (u32) pMsg, msgOffset);
-
- pMsg[0] = FOUR_WORD_MSG_SIZE | SGL_OFFSET_0;
- pMsg[1] = I2O_EXEC_SYS_ENABLE << 24 | I2O_HOST_TID << 12 | I2O_IOP_TID;
- pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
- pMsg[3] = 0x110; /* transaction context */
- pMsg[4] = 0x50657465; /* RedCreek Private */
-
- /* post to Inbound Post Q */
- pPab->p_atu->InQueue = msgOffset;
-
- return RC_RTN_NO_ERROR;
-}
-
-/*
-** =========================================================================
-** FillI2OMsgFromTCB()
-**
-** inputs pMsgU32 - virtual pointer (mapped to physical) of message frame
-** pXmitCntrlBlock - pointer to caller buffer control block.
-**
-** fills in LAN SGL after Transaction Control Word or Bucket Count.
-** =========================================================================
-*/
-static int
-FillI2OMsgSGLFromTCB (PU32 pMsgFrame, PRCTCB pTransCtrlBlock)
-{
- unsigned int nmbrBuffers, nmbrSeg, nmbrDwords, context, flags;
- PU32 pTCB, pMsg;
-
- /* SGL element flags */
-#define EOB 0x40000000
-#define LE 0x80000000
-#define SIMPLE_SGL 0x10000000
-#define BC_PRESENT 0x01000000
-
- pTCB = (PU32) pTransCtrlBlock;
- pMsg = pMsgFrame;
- nmbrDwords = 0;
-
- dprintk ("FillI2OMsgSGLFromTCBX\n");
- dprintk ("TCB 0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
- pTCB[0], pTCB[1], pTCB[2], pTCB[3], pTCB[4]);
- dprintk ("pTCB 0x%08ulx, pMsg 0x%08ulx\n", (u32) pTCB, (u32) pMsg);
-
- nmbrBuffers = *pTCB++;
-
- if (!nmbrBuffers) {
- return -1;
- }
-
- do {
- context = *pTCB++; /* buffer tag (context) */
- nmbrSeg = *pTCB++; /* number of segments */
-
- if (!nmbrSeg) {
- return -1;
- }
-
- flags = SIMPLE_SGL | BC_PRESENT;
-
- if (1 == nmbrSeg) {
- flags |= EOB;
-
- if (1 == nmbrBuffers)
- flags |= LE;
- }
-
- /* 1st SGL buffer element has context */
- pMsg[0] = pTCB[0] | flags; /* send over count (segment size) */
- pMsg[1] = context;
- pMsg[2] = pTCB[1]; /* send buffer segment physical address */
- nmbrDwords += 3;
- pMsg += 3;
- pTCB += 2;
-
- if (--nmbrSeg) {
- do {
- flags = SIMPLE_SGL;
-
- if (1 == nmbrSeg) {
- flags |= EOB;
-
- if (1 == nmbrBuffers)
- flags |= LE;
- }
-
- pMsg[0] = pTCB[0] | flags; /* send over count */
- pMsg[1] = pTCB[1]; /* send buffer segment physical address */
- nmbrDwords += 2;
- pTCB += 2;
- pMsg += 2;
-
- } while (--nmbrSeg);
- }
-
- } while (--nmbrBuffers);
-
- return nmbrDwords;
-}
-
-/*
-** =========================================================================
-** ProcessOutboundI2OMsg()
-**
-** process I2O reply message
-** * change to msg structure *
-** =========================================================================
-*/
-static void
-ProcessOutboundI2OMsg (PPAB pPab, U32 phyAddrMsg)
-{
- PU8 p8Msg;
- PU32 p32;
-/* U16 count; */
-
- p8Msg = pPab->pLinOutMsgBlock + (phyAddrMsg - pPab->outMsgBlockPhyAddr);
- p32 = (PU32) p8Msg;
-
- dprintk
- ("VXD: ProcessOutboundI2OMsg - pPab 0x%08ulx, phyAdr 0x%08ulx, linAdr 0x%08ulx\n",
- (u32) pPab, phyAddrMsg, (u32) p8Msg);
- dprintk ("msg :0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n", p32[0], p32[1],
- p32[2], p32[3]);
- dprintk ("msg :0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n", p32[4], p32[5],
- p32[6], p32[7]);
-
- if (p32[4] >> 24 != I2O_REPLY_STATUS_SUCCESS) {
- dprintk ("Message reply status not success\n");
- return;
- }
-
- switch (p8Msg[7]) { /* function code byte */
- case I2O_EXEC_SYS_TAB_SET:
- msgFlag = 1;
- dprintk ("Received I2O_EXEC_SYS_TAB_SET reply\n");
- break;
-
- case I2O_EXEC_HRT_GET:
- msgFlag = 1;
- dprintk ("Received I2O_EXEC_HRT_GET reply\n");
- break;
-
- case I2O_EXEC_LCT_NOTIFY:
- msgFlag = 1;
- dprintk ("Received I2O_EXEC_LCT_NOTIFY reply\n");
- break;
-
- case I2O_EXEC_SYS_ENABLE:
- msgFlag = 1;
- dprintk ("Received I2O_EXEC_SYS_ENABLE reply\n");
- break;
-
- default:
- dprintk ("Received UNKNOWN reply\n");
- break;
- }
-}
+++ /dev/null
-/*
-** *************************************************************************
-**
-**
-** R C L A N M T L . H $Revision: 6 $
-**
-**
-** RedCreek I2O LAN Message Transport Layer header file.
-**
-** ---------------------------------------------------------------------
-** --- Copyright (c) 1997-1999, RedCreek Communications Inc. ---
-** --- All rights reserved. ---
-** ---------------------------------------------------------------------
-**
-** File Description:
-**
-** Header file for host I2O (Intelligent I/O) LAN message transport layer
-** API and data types.
-**
-** This program is free software; you can redistribute it and/or modify
-** it under the terms of the GNU General Public License as published by
-** the Free Software Foundation; either version 2 of the License, or
-** (at your option) any later version.
-
-** This program is distributed in the hope that it will be useful,
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-** GNU General Public License for more details.
-
-** You should have received a copy of the GNU General Public License
-** along with this program; if not, write to the Free Software
-** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-**
-** *************************************************************************
-*/
-
-#ifndef RCLANMTL_H
-#define RCLANMTL_H
-
-/* Linux specific includes */
-#include <asm/types.h>
-#ifdef RC_LINUX_MODULE /* linux modules need non-library version of string functions */
-#include <linux/string.h>
-#else
-#include <string.h>
-#endif
-#include <linux/delay.h> /* for udelay() */
-
-#include <linux/netdevice.h>
-#include <linux/if_ether.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-
-#include <asm/io.h>
-
-/* Debug stuff. Define for debug output */
-#undef RCDEBUG
-
-#ifdef RCDEBUG
-#define dprintk(args...) printk(KERN_DEBUG "rc: " args)
-#else
-#define dprintk(args...) { }
-#endif
-
-/* Typedefs */
-
- /* scalar data types */
-typedef __u8 U8;
-typedef __u16 U16;
-typedef __u32 U32;
-typedef __u8 *PU8;
-typedef __u16 *PU16;
-typedef __u32 *PU32;
-typedef unsigned long BF;
-typedef int RC_RETURN;
-
- /*
- ** type PFNWAITCALLBACK
- **
- ** pointer to void function - type used for WaitCallback in some functions
- */
-typedef void (*PFNWAITCALLBACK) (void); /* void argument avoids compiler complaint */
-
- /*
- ** type PFNTXCALLBACK
- **
- ** Pointer to user's transmit callback function. This user function is
- ** called from RCProcI2OMsgQ() when packet have been transmitted from buffers
- ** given in the RCI2OSendPacket() function. BufferContext is a pointer to
- ** an array of 32 bit context values. These are the values the user assigned
- ** and passed in the TCB to the RCI2OSendPacket() function. PcktCount
- ** indicates the number of buffer context values in the BufferContext[] array.
- ** The User's TransmitCallbackFunction should recover (put back in free queue)
- ** the packet buffers associated with the buffer context values.
- */
-typedef void (*PFNTXCALLBACK) (U32 Status,
- U16 PcktCount,
- PU32 BufferContext, struct net_device *);
-
- /*
- ** type PFNRXCALLBACK
- **
- ** Pointer to user's receive callback function. This user function
- ** is called from RCProcI2OMsgQ() when packets have been received into
- ** previously posted packet buffers throught the RCPostRecvBuffers() function.
- ** The received callback function should process the Packet Descriptor Block
- ** pointed to by PacketDescBlock. See Packet Decription Block below.
- */
-typedef void (*PFNRXCALLBACK) (U32 Status,
- U8 PktCount,
- U32 BucketsRemain,
- PU32 PacketDescBlock, struct net_device *);
-
- /*
- ** type PFNCALLBACK
- **
- ** Pointer to user's generic callback function. This user function
- ** can be passed to LANReset or LANShutdown and is called when the
- ** the reset or shutdown is complete.
- ** Param1 and Param2 are invalid for LANReset and LANShutdown.
- */
-typedef void (*PFNCALLBACK) (U32 Status,
- U32 Param1, U32 Param2, struct net_device * dev);
-
-/*
-** Message Unit CSR definitions for RedCreek PCI45 board
-*/
-typedef struct tag_rcatu {
- volatile unsigned long APICRegSel; /* APIC Register Select */
- volatile unsigned long reserved0;
- volatile unsigned long APICWinReg; /* APIC Window Register */
- volatile unsigned long reserved1;
- volatile unsigned long InMsgReg0; /* inbound message register 0 */
- volatile unsigned long InMsgReg1; /* inbound message register 1 */
- volatile unsigned long OutMsgReg0; /* outbound message register 0 */
- volatile unsigned long OutMsgReg1; /* outbound message register 1 */
- volatile unsigned long InDoorReg; /* inbound doorbell register */
- volatile unsigned long InIntStat; /* inbound interrupt status register */
- volatile unsigned long InIntMask; /* inbound interrupt mask register */
- volatile unsigned long OutDoorReg; /* outbound doorbell register */
- volatile unsigned long OutIntStat; /* outbound interrupt status register */
- volatile unsigned long OutIntMask; /* outbound interrupt mask register */
- volatile unsigned long reserved2;
- volatile unsigned long reserved3;
- volatile unsigned long InQueue; /* inbound queue port */
- volatile unsigned long OutQueue; /* outbound queue port */
- volatile unsigned long reserved4;
- volatile unsigned long reserver5;
- /* RedCreek extension */
- volatile unsigned long EtherMacLow;
- volatile unsigned long EtherMacHi;
- volatile unsigned long IPaddr;
- volatile unsigned long IPmask;
-} *PATU;
-
- /*
- ** typedef PAB
- **
- ** PCI Adapter Block - holds instance specific information.
- */
-typedef struct {
- PATU p_atu; /* ptr to ATU register block */
- PU8 pPci45LinBaseAddr;
- PU8 pLinOutMsgBlock;
- U32 outMsgBlockPhyAddr;
- PFNTXCALLBACK pTransCallbackFunc;
- PFNRXCALLBACK pRecvCallbackFunc;
- PFNCALLBACK pRebootCallbackFunc;
- PFNCALLBACK pCallbackFunc;
- U16 IOPState;
- U16 InboundMFrameSize;
-} *PPAB;
-
-/*
- * Driver Private Area, DPA.
- */
-typedef struct {
- U8 id; /* the AdapterID */
-
- /* These two field are basically for the RCioctl function.
- * I could not determine if they could be avoided. (RAA)*/
- U32 pci_addr; /* the pci address of the adapter */
- U32 pci_addr_len;
-
- struct pci_dev *pci_dev;
- struct timer_list timer; /* timer */
- struct net_device_stats stats; /* the statistics structure */
- unsigned long numOutRcvBuffers; /* number of outstanding receive buffers */
- unsigned char shutdown;
- unsigned char reboot;
- unsigned char nexus;
- PU8 msgbuf; /* Pointer to Lan Api Private Area */
- dma_addr_t msgbuf_dma;
- PPAB pPab; /* Pointer to the PCI Adapter Block */
-} *PDPA;
-
-/* PCI/45 Configuration space values */
-#define RC_PCI45_VENDOR_ID 0x4916
-#define RC_PCI45_DEVICE_ID 0x1960
-
- /* RedCreek API function return values */
-#define RC_RTN_NO_ERROR 0
-#define RC_RTN_I2O_NOT_INIT 1
-#define RC_RTN_FREE_Q_EMPTY 2
-#define RC_RTN_TCB_ERROR 3
-#define RC_RTN_TRANSACTION_ERROR 4
-#define RC_RTN_ADAPTER_ALREADY_INIT 5
-#define RC_RTN_MALLOC_ERROR 6
-#define RC_RTN_ADPTR_NOT_REGISTERED 7
-#define RC_RTN_MSG_REPLY_TIMEOUT 8
-#define RC_RTN_NO_I2O_STATUS 9
-#define RC_RTN_NO_FIRM_VER 10
-#define RC_RTN_NO_LINK_SPEED 11
-
-/* Driver capability flags */
-#define WARM_REBOOT_CAPABLE 0x01
-
-/*
-** Status - Transmit and Receive callback status word
-**
-** A 32 bit Status is returned to the TX and RX callback functions. This value
-** contains both the reply status and the detailed status as follows:
-**
-** 32 24 16 0
-** +------+------+------------+
-** | Reply| | Detailed |
-** |Status| 0 | Status |
-** +------+------+------------+
-**
-** Reply Status and Detailed Status of zero indicates No Errors.
-*/
- /* reply message status defines */
-#define I2O_REPLY_STATUS_SUCCESS 0x00
-#define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER 0x02
-#define I2O_REPLY_STATUS_TRANSACTION_ERROR 0x0A
-
-/* DetailedStatusCode defines */
-#define I2O_LAN_DSC_SUCCESS 0x0000
-#define I2O_LAN_DSC_DEVICE_FAILURE 0x0001
-#define I2O_LAN_DSC_DESTINATION_NOT_FOUND 0x0002
-#define I2O_LAN_DSC_TRANSMIT_ERROR 0x0003
-#define I2O_LAN_DSC_TRANSMIT_ABORTED 0x0004
-#define I2O_LAN_DSC_RECEIVE_ERROR 0x0005
-#define I2O_LAN_DSC_RECEIVE_ABORTED 0x0006
-#define I2O_LAN_DSC_DMA_ERROR 0x0007
-#define I2O_LAN_DSC_BAD_PACKET_DETECTED 0x0008
-#define I2O_LAN_DSC_OUT_OF_MEMORY 0x0009
-#define I2O_LAN_DSC_BUCKET_OVERRUN 0x000A
-#define I2O_LAN_DSC_IOP_INTERNAL_ERROR 0x000B
-#define I2O_LAN_DSC_CANCELED 0x000C
-#define I2O_LAN_DSC_INVALID_TRANSACTION_CONTEXT 0x000D
-#define I2O_LAN_DSC_DESTINATION_ADDRESS_DETECTED 0x000E
-#define I2O_LAN_DSC_DESTINATION_ADDRESS_OMITTED 0x000F
-#define I2O_LAN_DSC_PARTIAL_PACKET_RETURNED 0x0010
-
-/*
-** Packet Description Block (Received packets)
-**
-** A pointer to this block structure is returned to the ReceiveCallback
-** function. It contains the list of packet buffers which have either been
-** filled with a packet or returned to host due to a LANReset function.
-** Currently there will only be one packet per receive bucket (buffer) posted.
-**
-** 32 24 0
-** +-----------------------+ -\
-** | Buffer 1 Context | \
-** +-----------------------+ \
-** | 0xC0000000 | / First Bucket Descriptor
-** +-----+-----------------+ /
-** | 0 | packet 1 length | /
-** +-----------------------+ -\
-** | Buffer 2 Context | \
-** +-----------------------+ \
-** | 0xC0000000 | / Second Bucket Descriptor
-** +-----+-----------------+ /
-** | 0 | packet 2 length | /
-** +-----+-----------------+ -
-** | ... | ----- more bucket descriptors
-** +-----------------------+ -\
-** | Buffer n Context | \
-** +-----------------------+ \
-** | 0xC0000000 | / Last Bucket Descriptor
-** +-----+-----------------+ /
-** | 0 | packet n length | /
-** +-----+-----------------+ -
-**
-** Buffer Context values are those given to adapter in the TCB on calls to
-** RCPostRecvBuffers().
-**
-*/
-
-/*
-** Transaction Control Block (TCB) structure
-**
-** A structure like this is filled in by the user and passed by reference to
-** RCI2OSendPacket() and RCPostRecvBuffers() functions. Minimum size is five
-** 32-bit words for one buffer with one segment descriptor.
-** MAX_NMBR_POST_BUFFERS_PER_MSG defines the maximum single segment buffers
-** that can be described in a given TCB.
-**
-** 32 0
-** +-----------------------+
-** | Buffer Count | Number of buffers in the TCB
-** +-----------------------+
-** | Buffer 1 Context | first buffer reference
-** +-----------------------+
-** | Buffer 1 Seg Count | number of segments in buffer
-** +-----------------------+
-** | Buffer 1 Seg Desc 1 | first segment descriptor (size, physical address)
-** +-----------------------+
-** | ... | more segment descriptors (size, physical address)
-** +-----------------------+
-** | Buffer 1 Seg Desc n | last segment descriptor (size, physical address)
-** +-----------------------+
-** | Buffer 2 Context | second buffer reference
-** +-----------------------+
-** | Buffer 2 Seg Count | number of segments in buffer
-** +-----------------------+
-** | Buffer 2 Seg Desc 1 | segment descriptor (size, physical address)
-** +-----------------------+
-** | ... | more segment descriptors (size, physical address)
-** +-----------------------+
-** | Buffer 2 Seg Desc n |
-** +-----------------------+
-** | ... | more buffer descriptor blocks ...
-** +-----------------------+
-** | Buffer n Context |
-** +-----------------------+
-** | Buffer n Seg Count |
-** +-----------------------+
-** | Buffer n Seg Desc 1 |
-** +-----------------------+
-** | ... |
-** +-----------------------+
-** | Buffer n Seg Desc n |
-** +-----------------------+
-**
-**
-** A TCB for one contigous packet buffer would look like the following:
-**
-** 32 0
-** +-----------------------+
-** | 1 | one buffer in the TCB
-** +-----------------------+
-** | <user's Context> | user's buffer reference
-** +-----------------------+
-** | 1 | one segment buffer
-** +-----------------------+ _
-** | <buffer size> | size \
-** +-----------------------+ \ segment descriptor
-** | <physical address> | physical address of buffer /
-** +-----------------------+ _/
-**
-*/
-
- /* Buffer Segment Descriptor */
-typedef struct {
- U32 size;
- U32 phyAddress;
-} BSD, *PBSD;
-
-typedef PU32 PRCTCB;
-/*
-** -------------------------------------------------------------------------
-** Exported functions comprising the API to the LAN I2O message transport layer
-** -------------------------------------------------------------------------
-*/
-
- /*
- ** InitRCI2OMsgLayer()
- **
- ** Called once prior to using the I2O LAN message transport layer. User
- ** provides both the physical and virual address of a locked page buffer
- ** that is used as a private buffer for the RedCreek I2O message
- ** transport layer. This buffer must be a contigous memory block of a
- ** minimum of 16K bytes and long word aligned. The user also must provide
- ** the base address of the RedCreek PCI adapter assigned by BIOS or operating
- ** system.
- **
- ** Inputs: dev - the net_device struct for the device.
- ** TransmitCallbackFunction - address of user's TX callback function
- ** ReceiveCallbackFunction - address of user's RX callback function
- ** RebootCallbackFunction - address of user's reboot callback function
- **
- */
-RC_RETURN RCInitI2OMsgLayer (struct net_device *dev,
- PFNTXCALLBACK TransmitCallbackFunction,
- PFNRXCALLBACK ReceiveCallbackFunction,
- PFNCALLBACK RebootCallbackFunction);
-
- /*
- ** RCSetRavlinIPandMask()
- **
- ** Set the Ravlin 45/PCI cards IP address and network mask.
- **
- ** IP address and mask must be in network byte order.
- ** For example, IP address 1.2.3.4 and mask 255.255.255.0 would be
- ** 0x04030201 and 0x00FFFFFF on a little endian machine.
- **
- */
-RC_RETURN RCSetRavlinIPandMask (struct net_device *dev, U32 ipAddr,
- U32 netMask);
-
-/*
-** =========================================================================
-** RCGetRavlinIPandMask()
-**
-** get the IP address and MASK from the card
-**
-** =========================================================================
-*/
-RC_RETURN
-RCGetRavlinIPandMask (struct net_device *dev, PU32 pIpAddr, PU32 pNetMask,
- PFNWAITCALLBACK WaitCallback);
-
- /*
- ** RCProcI2OMsgQ()
- **
- ** Called from user's polling loop or Interrupt Service Routine for a PCI
- ** interrupt from the RedCreek PCI adapter. User responsible for determining
- ** and hooking the PCI interrupt. This function will call the registered
- ** callback functions, TransmitCallbackFunction or ReceiveCallbackFunction,
- ** if a TX or RX transaction has completed.
- */
-irqreturn_t RCProcI2OMsgQ (struct net_device *dev);
-
- /*
- ** Disable and Enable I2O interrupts. I2O interrupts are enabled at Init time
- ** but can be disabled and re-enabled through these two function calls.
- ** Packets will still be put into any posted received buffers and packets will
- ** be sent through RCI2OSendPacket() functions. Disabling I2O interrupts
- ** will prevent hardware interrupt to host even though the outbound I2O msg
- ** queue is not emtpy.
- */
-RC_RETURN RCEnableI2OInterrupts (struct net_device *dev);
-RC_RETURN RCDisableI2OInterrupts (struct net_device *dev);
-
- /*
- ** RCPostRecvBuffers()
- **
- ** Post user's page locked buffers for use by the PCI adapter to
- ** return ethernet packets received from the LAN. Transaction Control Block,
- ** provided by user, contains buffer descriptor(s) which includes a buffer
- ** context number along with buffer size and physical address. See TCB above.
- ** The buffer context and actual packet length are returned to the
- ** ReceiveCallbackFunction when packets have been received. Buffers posted
- ** to the RedCreek adapter are considered owned by the adapter until the
- ** context is return to user through the ReceiveCallbackFunction.
- */
-RC_RETURN RCPostRecvBuffers (struct net_device *dev,
- PRCTCB pTransactionCtrlBlock);
-#define MAX_NMBR_POST_BUFFERS_PER_MSG 32
-
- /*
- ** RCI2OSendPacket()
- **
- ** Send user's ethernet packet from a locked page buffer.
- ** Packet must have full MAC header, however without a CRC.
- ** Initiator context is a user provided value that is returned
- ** to the TransmitCallbackFunction when packet buffer is free.
- ** Transmit buffer are considered owned by the adapter until context's
- ** returned to user through the TransmitCallbackFunction.
- */
-RC_RETURN RCI2OSendPacket (struct net_device *dev,
- U32 context, PRCTCB pTransactionCtrlBlock);
-
- /* Ethernet Link Statistics structure */
-typedef struct tag_RC_link_stats {
- U32 TX_good; /* good transmit frames */
- U32 TX_maxcol; /* frames not TX due to MAX collisions */
- U32 TX_latecol; /* frames not TX due to late collisions */
- U32 TX_urun; /* frames not TX due to DMA underrun */
- U32 TX_crs; /* frames TX with lost carrier sense */
- U32 TX_def; /* frames deferred due to activity on link */
- U32 TX_singlecol; /* frames TX with one and only on collision */
- U32 TX_multcol; /* frames TX with more than one collision */
- U32 TX_totcol; /* total collisions detected during TX */
- U32 Rcv_good; /* good frames received */
- U32 Rcv_CRCerr; /* frames RX and discarded with CRC errors */
- U32 Rcv_alignerr; /* frames RX with alignment and CRC errors */
- U32 Rcv_reserr; /* good frames discarded due to no RX buffer */
- U32 Rcv_orun; /* RX frames lost due to FIFO overrun */
- U32 Rcv_cdt; /* RX frames with collision during RX */
- U32 Rcv_runt; /* RX frames shorter than 64 bytes */
-} RCLINKSTATS, *P_RCLINKSTATS;
-
- /*
- ** RCGetLinkStatistics()
- **
- ** Returns link statistics in user's structure at address StatsReturnAddr
- ** If given, not NULL, the function WaitCallback is called during the wait
- ** loop while waiting for the adapter to respond.
- */
-RC_RETURN RCGetLinkStatistics (struct net_device *dev,
- P_RCLINKSTATS StatsReturnAddr,
- PFNWAITCALLBACK WaitCallback);
-
- /*
- ** RCGetLinkStatus()
- **
- ** Return link status, up or down, to user's location addressed by ReturnAddr.
- ** If given, not NULL, the function WaitCallback is called during the wait
- ** loop while waiting for the adapter to respond.
- */
-RC_RETURN RCGetLinkStatus (struct net_device *dev,
- PU32 pReturnStatus, PFNWAITCALLBACK WaitCallback);
-
- /* Link Status defines - value returned in pReturnStatus */
-#define RC_LAN_LINK_STATUS_DOWN 0
-#define RC_LAN_LINK_STATUS_UP 1
-
- /*
- ** RCGetMAC()
- **
- ** Get the current MAC address assigned to user. RedCreek Ravlin 45/PCI
- ** has two MAC addresses. One which is private to the PCI Card, and
- ** another MAC which is given to the user as its link layer MAC address. The
- ** adapter runs in promiscous mode because of the dual address requirement.
- ** The MAC address is returned to the unsigned char array pointer to by mac.
- */
-RC_RETURN RCGetMAC (struct net_device *dev, PFNWAITCALLBACK WaitCallback);
-
- /*
- ** RCSetMAC()
- **
- ** Set a new user port MAC address. This address will be returned on
- ** subsequent RCGetMAC() calls.
- */
-RC_RETURN RCSetMAC (struct net_device *dev, PU8 mac);
-
- /*
- ** RCSetLinkSpeed()
- **
- ** set adapter's link speed based on given input code.
- */
-RC_RETURN RCSetLinkSpeed (struct net_device *dev, U16 LinkSpeedCode);
- /* Set link speed codes */
-#define LNK_SPD_AUTO_NEG_NWAY 0
-#define LNK_SPD_100MB_FULL 1
-#define LNK_SPD_100MB_HALF 2
-#define LNK_SPD_10MB_FULL 3
-#define LNK_SPD_10MB_HALF 4
-
- /*
- ** RCGetLinkSpeed()
- **
- ** Return link speed code.
- */
- /* Return link speed codes */
-#define LNK_SPD_UNKNOWN 0
-#define LNK_SPD_100MB_FULL 1
-#define LNK_SPD_100MB_HALF 2
-#define LNK_SPD_10MB_FULL 3
-#define LNK_SPD_10MB_HALF 4
-
-RC_RETURN
-RCGetLinkSpeed (struct net_device *dev, PU32 pLinkSpeedCode,
- PFNWAITCALLBACK WaitCallback);
-/*
-** =========================================================================
-** RCSetPromiscuousMode(struct net_device *dev, U16 Mode)
-**
-** Defined values for Mode:
-** 0 - turn off promiscuous mode
-** 1 - turn on promiscuous mode
-**
-** =========================================================================
-*/
-#define PROMISCUOUS_MODE_OFF 0
-#define PROMISCUOUS_MODE_ON 1
-RC_RETURN RCSetPromiscuousMode (struct net_device *dev, U16 Mode);
-/*
-** =========================================================================
-** RCGetPromiscuousMode(struct net_device *dev, PU32 pMode, PFNWAITCALLBACK WaitCallback)
-**
-** get promiscuous mode setting
-**
-** Possible return values placed in pMode:
-** 0 = promisuous mode not set
-** 1 = promisuous mode is set
-**
-** =========================================================================
-*/
-RC_RETURN
-RCGetPromiscuousMode (struct net_device *dev, PU32 pMode,
- PFNWAITCALLBACK WaitCallback);
-
-/*
-** =========================================================================
-** RCSetBroadcastMode(struct net_device *dev, U16 Mode)
-**
-** Defined values for Mode:
-** 0 - turn off promiscuous mode
-** 1 - turn on promiscuous mode
-**
-** =========================================================================
-*/
-#define BROADCAST_MODE_OFF 0
-#define BROADCAST_MODE_ON 1
-RC_RETURN RCSetBroadcastMode (struct net_device *dev, U16 Mode);
-/*
-** =========================================================================
-** RCGetBroadcastMode(struct net_device *dev, PU32 pMode, PFNWAITCALLBACK WaitCallback)
-**
-** get broadcast mode setting
-**
-** Possible return values placed in pMode:
-** 0 = broadcast mode not set
-** 1 = broadcast mode is set
-**
-** =========================================================================
-*/
-RC_RETURN
-RCGetBroadcastMode (struct net_device *dev, PU32 pMode,
- PFNWAITCALLBACK WaitCallback);
-/*
-** =========================================================================
-** RCReportDriverCapability(struct net_device *dev, U32 capability)
-**
-** Currently defined bits:
-** WARM_REBOOT_CAPABLE 0x01
-**
-** =========================================================================
-*/
-RC_RETURN RCReportDriverCapability (struct net_device *dev, U32 capability);
-
-/*
-** RCGetFirmwareVer()
-**
-** Return firmware version in the form "SoftwareVersion : Bt BootVersion"
-**
-** WARNING: user's space pointed to by pFirmString should be at least 60 bytes.
-*/
-RC_RETURN
-RCGetFirmwareVer (struct net_device *dev, PU8 pFirmString,
- PFNWAITCALLBACK WaitCallback);
-
-/*
-** ----------------------------------------------
-** LAN adapter Reset and Shutdown functions
-** ----------------------------------------------
-*/
- /* resource flag bit assignments for RCResetLANCard() & RCShutdownLANCard() */
-#define RC_RESOURCE_RETURN_POSTED_RX_BUCKETS 0x0001
-#define RC_RESOURCE_RETURN_PEND_TX_BUFFERS 0x0002
-
- /*
- ** RCResetLANCard()
- **
- ** Reset LAN card operation. Causes a software reset of the ethernet
- ** controller and restarts the command and receive units. Depending on
- ** the ResourceFlags given, the buffers are either returned to the
- ** host with reply status of I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER and
- ** detailed status of I2O_LAN_DSC_CANCELED (new receive buffers must be
- ** posted after issuing this) OR the buffers are kept and reused by
- ** the ethernet controller. If CallbackFunction is not NULL, the function
- ** will be called when the reset is complete. If the CallbackFunction is
- ** NULL,a 1 will be put into the ReturnAddr after waiting for the reset
- ** to complete (please disable I2O interrupts during this method).
- ** Any outstanding transmit or receive buffers that are complete will be
- ** returned via the normal reply messages before the requested resource
- ** buffers are returned.
- ** A call to RCPostRecvBuffers() is needed to return the ethernet to full
- ** operation if the receive buffers were returned during LANReset.
- ** Note: The IOP status is not affected by a LAN reset.
- */
-RC_RETURN RCResetLANCard (struct net_device *dev, U16 ResourceFlags,
- PU32 ReturnAddr, PFNCALLBACK CallbackFunction);
-
- /*
- ** RCShutdownLANCard()
- **
- ** Shutdown LAN card operation and put into an idle (suspended) state.
- ** The LAN card is restarted with RCResetLANCard() function.
- ** Depending on the ResourceFlags given, the buffers are either returned
- ** to the host with reply status of I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER
- ** and detailed status of I2O_LAN_DSC_CANCELED (new receive buffers must be
- ** posted after issuing this) OR the buffers are kept and reused by
- ** the ethernet controller. If CallbackFunction is not NULL, the function
- ** will be called when the reset is complete. If the CallbackFunction is
- ** NULL,a 1 will be put into the ReturnAddr after waiting for the reset
- ** to complete (please disable I2O interrupts during this method).
- ** Any outstanding transmit or receive buffers that are complete will be
- ** returned via the normal reply messages before the requested resource
- ** buffers are returned.
- ** Note: The IOP status is not affected by a LAN shutdown.
- */
-RC_RETURN
-RCShutdownLANCard (struct net_device *dev, U16 ResourceFlags, PU32 ReturnAddr,
- PFNCALLBACK CallbackFunction);
-
- /*
- ** RCResetIOP();
- ** Initializes IOPState to I2O_IOP_STATE_RESET.
- ** Stops access to outbound message Q.
- ** Discards any outstanding transmit or posted receive buffers.
- ** Clears outbound message Q.
- */
-RC_RETURN RCResetIOP (struct net_device *dev);
-
-#endif /* RCLANMTL_H */
+++ /dev/null
-/*
-**
-** RCpci45.c
-**
-**
-**
-** ---------------------------------------------------------------------
-** --- Copyright (c) 1998, 1999, RedCreek Communications Inc. ---
-** --- All rights reserved. ---
-** ---------------------------------------------------------------------
-**
-** Written by Pete Popov and Brian Moyle.
-**
-** Known Problems
-**
-** None known at this time.
-**
-** This program is free software; you can redistribute it and/or modify
-** it under the terms of the GNU General Public License as published by
-** the Free Software Foundation; either version 2 of the License, or
-** (at your option) any later version.
-
-** This program is distributed in the hope that it will be useful,
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-** GNU General Public License for more details.
-
-** You should have received a copy of the GNU General Public License
-** along with this program; if not, write to the Free Software
-** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-**
-** Francois Romieu, Apr 2003: Converted to pci DMA mapping API.
-**
-** Pete Popov, Oct 2001: Fixed a few bugs to make the driver functional
-** again. Note that this card is not supported or manufactured by
-** RedCreek anymore.
-**
-** Rasmus Andersen, December 2000: Converted to new PCI API and general
-** cleanup.
-**
-** Pete Popov, January 11,99: Fixed a couple of 2.1.x problems
-** (virt_to_bus() not called), tested it under 2.2pre5 (as a module), and
-** added a #define(s) to enable the use of the same file for both, the 2.0.x
-** kernels as well as the 2.1.x.
-**
-** Ported to 2.1.x by Alan Cox 1998/12/9.
-**
-** Sometime in mid 1998, written by Pete Popov and Brian Moyle.
-**
-***************************************************************************/
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/errno.h>
-#include <linux/in.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/timer.h>
-
-#include <asm/irq.h> /* For NR_IRQS only. */
-#include <asm/bitops.h>
-#include <asm/uaccess.h>
-
-static char version[] __initdata =
- "RedCreek Communications PCI linux driver version 2.21\n";
-
-#define RC_LINUX_MODULE
-#include "rclanmtl.h"
-#include "rcif.h"
-
-#define RUN_AT(x) (jiffies + (x))
-
-#define NEW_MULTICAST
-
-#define MAX_ETHER_SIZE 1520
-#define MAX_NMBR_RCV_BUFFERS 96
-#define RC_POSTED_BUFFERS_LOW_MARK MAX_NMBR_RCV_BUFFERS-16
-#define BD_SIZE 3 /* Bucket Descriptor size */
-#define BD_LEN_OFFSET 2 /* Bucket Descriptor offset to length field */
-
-/* RedCreek LAN device Target ID */
-#define RC_LAN_TARGET_ID 0x10
-/* RedCreek's OSM default LAN receive Initiator */
-#define DEFAULT_RECV_INIT_CONTEXT 0xA17
-
-/* minimum msg buffer size needed by the card
- * Note that the size of this buffer is hard code in the
- * ipsec card's firmware. Thus, the size MUST be a minimum
- * of 16K. Otherwise the card will end up using memory
- * that does not belong to it.
- */
-#define MSG_BUF_SIZE 16384
-
-/* 2003/04/20: I don't know about the hardware ability but the driver won't
- * play safe with 64 bit addressing and DAC without NETIF_F_HIGHDMA doesn't
- * really make sense anyway. Let's play safe - romieu.
- */
-#define RCPCI45_DMA_MASK ((u64) 0xffffffff)
-
-static U32 DriverControlWord;
-
-static void rc_timer (unsigned long);
-
-static int RCopen (struct net_device *);
-static int RC_xmit_packet (struct sk_buff *, struct net_device *);
-static irqreturn_t RCinterrupt (int, void *, struct pt_regs *);
-static int RCclose (struct net_device *dev);
-static struct net_device_stats *RCget_stats (struct net_device *);
-static int RCioctl (struct net_device *, struct ifreq *, int);
-static int RCconfig (struct net_device *, struct ifmap *);
-static void RCxmit_callback (U32, U16, PU32, struct net_device *);
-static void RCrecv_callback (U32, U8, U32, PU32, struct net_device *);
-static void RCreset_callback (U32, U32, U32, struct net_device *);
-static void RCreboot_callback (U32, U32, U32, struct net_device *);
-static int RC_allocate_and_post_buffers (struct net_device *, int);
-
-static struct pci_device_id rcpci45_pci_table[] = {
- { PCI_VENDOR_ID_REDCREEK, PCI_DEVICE_ID_RC45, PCI_ANY_ID, PCI_ANY_ID,},
- {}
-};
-MODULE_DEVICE_TABLE (pci, rcpci45_pci_table);
-MODULE_LICENSE("GPL");
-
-static void __devexit
-rcpci45_remove_one (struct pci_dev *pdev)
-{
- struct net_device *dev = pci_get_drvdata (pdev);
- PDPA pDpa = dev->priv;
-
- RCResetIOP (dev);
- unregister_netdev (dev);
- free_irq (dev->irq, dev);
- iounmap ((void *) dev->base_addr);
- pci_release_regions (pdev);
- pci_free_consistent (pdev, MSG_BUF_SIZE, pDpa->msgbuf,
- pDpa->msgbuf_dma);
- if (pDpa->pPab)
- kfree (pDpa->pPab);
- free_netdev (dev);
- pci_set_drvdata (pdev, NULL);
-}
-
-static int
-rcpci45_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- unsigned long *vaddr;
- PDPA pDpa;
- int error;
- static int card_idx = -1;
- struct net_device *dev;
- unsigned long pci_start, pci_len;
-
- card_idx++;
-
- /*
- * Allocate and fill new device structure.
- * We need enough for struct net_device plus DPA plus the LAN
- * API private area, which requires a minimum of 16KB. The top
- * of the allocated area will be assigned to struct net_device;
- * the next chunk will be assigned to DPA; and finally, the rest
- * will be assigned to the LAN API layer.
- */
-
- dev = alloc_etherdev(sizeof(*pDpa));
- if (!dev) {
- printk (KERN_ERR
- "(rcpci45 driver:) alloc_etherdev alloc failed\n");
- error = -ENOMEM;
- goto err_out;
- }
-
- SET_MODULE_OWNER(dev);
- SET_NETDEV_DEV(dev, &pdev->dev);
-
- error = pci_enable_device (pdev);
- if (error) {
- printk (KERN_ERR
- "(rcpci45 driver:) %d: pci enable device error\n",
- card_idx);
- goto err_out;
- }
- pci_start = pci_resource_start (pdev, 0);
- pci_len = pci_resource_len (pdev, 0);
- printk("pci_start %lx pci_len %lx\n", pci_start, pci_len);
-
- pci_set_drvdata (pdev, dev);
-
- pDpa = dev->priv;
- pDpa->id = card_idx;
- pDpa->pci_dev = pdev;
- pDpa->pci_addr = pci_start;
-
- if (!pci_start || !(pci_resource_flags (pdev, 0) & IORESOURCE_MEM)) {
- printk (KERN_ERR
- "(rcpci45 driver:) No PCI mem resources! Aborting\n");
- error = -EBUSY;
- goto err_out_free_dev;
- }
-
- /*
- * pDpa->msgbuf is where the card will dma the I2O
- * messages. Thus, we need contiguous physical pages of memory.
- * 2003/04/20: pci_alloc_consistent() provides well over the needed
- * alignment on a 256 bytes boundary for the LAN API private area.
- * Thus it isn't needed anymore to align it by hand.
- */
- pDpa->msgbuf = pci_alloc_consistent (pdev, MSG_BUF_SIZE,
- &pDpa->msgbuf_dma);
- if (!pDpa->msgbuf) {
- printk (KERN_ERR "(rcpci45 driver:) \
- Could not allocate %d byte memory for the \
- private msgbuf!\n", MSG_BUF_SIZE);
- error = -ENOMEM;
- goto err_out_free_dev;
- }
-
- /* The adapter is accessible through memory-access read/write, not
- * I/O read/write. Thus, we need to map it to some virtual address
- * area in order to access the registers as normal memory.
- */
- error = pci_request_regions (pdev, dev->name);
- if (error)
- goto err_out_free_msgbuf;
-
- error = pci_set_dma_mask (pdev, RCPCI45_DMA_MASK);
- if (error) {
- printk (KERN_ERR
- "(rcpci45 driver:) pci_set_dma_mask failed!\n");
- goto err_out_free_region;
- }
-
- vaddr = (ulong *) ioremap (pci_start, pci_len);
- if (!vaddr) {
- printk (KERN_ERR
- "(rcpci45 driver:) \
- Unable to remap address range from %lu to %lu\n",
- pci_start, pci_start + pci_len);
- error = -EIO;
- goto err_out_free_region;
- }
-
- dev->base_addr = (unsigned long) vaddr;
- dev->irq = pdev->irq;
- dev->open = &RCopen;
- dev->hard_start_xmit = &RC_xmit_packet;
- dev->stop = &RCclose;
- dev->get_stats = &RCget_stats;
- dev->do_ioctl = &RCioctl;
- dev->set_config = &RCconfig;
-
- if ((error = register_netdev(dev)))
- goto err_out_iounmap;
-
- return 0; /* success */
-
-err_out_iounmap:
- iounmap((void *) dev->base_addr);
-err_out_free_region:
- pci_release_regions (pdev);
-err_out_free_msgbuf:
- pci_free_consistent (pdev, MSG_BUF_SIZE, pDpa->msgbuf,
- pDpa->msgbuf_dma);
-err_out_free_dev:
- free_netdev (dev);
-err_out:
- card_idx--;
- return error;
-}
-
-static struct pci_driver rcpci45_driver = {
- .name = "rcpci45",
- .id_table = rcpci45_pci_table,
- .probe = rcpci45_init_one,
- .remove = __devexit_p(rcpci45_remove_one),
-};
-
-static int __init
-rcpci_init_module (void)
-{
- int rc = pci_module_init (&rcpci45_driver);
- if (!rc)
- printk (KERN_ERR "%s", version);
- return rc;
-}
-
-static int
-RCopen (struct net_device *dev)
-{
- int post_buffers = MAX_NMBR_RCV_BUFFERS;
- PDPA pDpa = dev->priv;
- int count = 0;
- int requested = 0;
- int error;
-
- if (pDpa->nexus) {
- /* This is not the first time RCopen is called. Thus,
- * the interface was previously opened and later closed
- * by RCclose(). RCclose() does a Shutdown; to wake up
- * the adapter, a reset is mandatory before we can post
- * receive buffers. However, if the adapter initiated
- * a reboot while the interface was closed -- and interrupts
- * were turned off -- we need will need to reinitialize
- * the adapter, rather than simply waking it up.
- */
- printk (KERN_INFO "Waking up adapter...\n");
- RCResetLANCard (dev, 0, 0, 0);
- } else {
- pDpa->nexus = 1;
- /*
- * RCInitI2OMsgLayer is done only once, unless the
- * adapter was sent a warm reboot
- */
- error = RCInitI2OMsgLayer (dev, (PFNTXCALLBACK) RCxmit_callback,
- (PFNRXCALLBACK) RCrecv_callback,
- (PFNCALLBACK) RCreboot_callback);
- if (error) {
- printk (KERN_ERR "%s: Unable to init msg layer (%x)\n",
- dev->name, error);
- goto err_out;
- }
- if ((error = RCGetMAC (dev, NULL))) {
- printk (KERN_ERR "%s: Unable to get adapter MAC\n",
- dev->name);
- goto err_out;
- }
- }
-
- /* Request a shared interrupt line. */
- error = request_irq (dev->irq, RCinterrupt, SA_SHIRQ, dev->name, dev);
- if (error) {
- printk (KERN_ERR "%s: unable to get IRQ %d\n",
- dev->name, dev->irq);
- goto err_out;
- }
-
- DriverControlWord |= WARM_REBOOT_CAPABLE;
- RCReportDriverCapability (dev, DriverControlWord);
-
- printk (KERN_INFO "%s: RedCreek Communications IPSEC VPN adapter\n",
- dev->name);
-
- RCEnableI2OInterrupts (dev);
-
- while (post_buffers) {
- if (post_buffers > MAX_NMBR_POST_BUFFERS_PER_MSG)
- requested = MAX_NMBR_POST_BUFFERS_PER_MSG;
- else
- requested = post_buffers;
- count = RC_allocate_and_post_buffers (dev, requested);
-
- if (count < requested) {
- /*
- * Check to see if we were able to post
- * any buffers at all.
- */
- if (post_buffers == MAX_NMBR_RCV_BUFFERS) {
- printk (KERN_ERR "%s: \
- unable to allocate any buffers\n",
- dev->name);
- goto err_out_free_irq;
- }
- printk (KERN_WARNING "%s: \
- unable to allocate all requested buffers\n", dev->name);
- break; /* we'll try to post more buffers later */
- } else
- post_buffers -= count;
- }
- pDpa->numOutRcvBuffers = MAX_NMBR_RCV_BUFFERS - post_buffers;
- pDpa->shutdown = 0; /* just in case */
- netif_start_queue (dev);
- return 0;
-
-err_out_free_irq:
- free_irq (dev->irq, dev);
-err_out:
- return error;
-}
-
-static int
-RC_xmit_packet (struct sk_buff *skb, struct net_device *dev)
-{
-
- PDPA pDpa = dev->priv;
- singleTCB tcb;
- psingleTCB ptcb = &tcb;
- RC_RETURN status = 0;
-
- netif_stop_queue (dev);
-
- if (pDpa->shutdown || pDpa->reboot) {
- printk ("RC_xmit_packet: tbusy!\n");
- return 1;
- }
-
- /*
- * The user is free to reuse the TCB after RCI2OSendPacket()
- * returns, since the function copies the necessary info into its
- * own private space. Thus, our TCB can be a local structure.
- * The skb, on the other hand, will be freed up in our interrupt
- * handler.
- */
-
- ptcb->bcount = 1;
-
- /*
- * we'll get the context when the adapter interrupts us to tell us that
- * the transmission is done. At that time, we can free skb.
- */
- ptcb->b.context = (U32) skb;
- ptcb->b.scount = 1;
- ptcb->b.size = skb->len;
- ptcb->b.addr = pci_map_single(pDpa->pci_dev, skb->data, skb->len,
- PCI_DMA_TODEVICE);
-
- if ((status = RCI2OSendPacket (dev, (U32) NULL, (PRCTCB) ptcb))
- != RC_RTN_NO_ERROR) {
- printk ("%s: send error 0x%x\n", dev->name, (uint) status);
- return 1;
- } else {
- dev->trans_start = jiffies;
- netif_wake_queue (dev);
- }
- /*
- * That's it!
- */
- return 0;
-}
-
-/*
- * RCxmit_callback()
- *
- * The transmit callback routine. It's called by RCProcI2OMsgQ()
- * because the adapter is done with one or more transmit buffers and
- * it's returning them to us, or we asked the adapter to return the
- * outstanding transmit buffers by calling RCResetLANCard() with
- * RC_RESOURCE_RETURN_PEND_TX_BUFFERS flag.
- * All we need to do is free the buffers.
- */
-static void
-RCxmit_callback (U32 Status,
- U16 PcktCount, PU32 BufferContext, struct net_device *dev)
-{
- struct sk_buff *skb;
- PDPA pDpa = dev->priv;
-
- if (!pDpa) {
- printk (KERN_ERR "%s: Fatal Error in xmit callback, !pDpa\n",
- dev->name);
- return;
- }
-
- if (Status != I2O_REPLY_STATUS_SUCCESS)
- printk (KERN_INFO "%s: xmit_callback: Status = 0x%x\n",
- dev->name, (uint) Status);
- if (pDpa->shutdown || pDpa->reboot)
- printk (KERN_INFO "%s: xmit callback: shutdown||reboot\n",
- dev->name);
-
- while (PcktCount--) {
- skb = (struct sk_buff *) (BufferContext[0]);
- BufferContext++;
- pci_unmap_single(pDpa->pci_dev, BufferContext[1], skb->len,
- PCI_DMA_TODEVICE);
- dev_kfree_skb_irq (skb);
- }
- netif_wake_queue (dev);
-}
-
-static void
-RCreset_callback (U32 Status, U32 p1, U32 p2, struct net_device *dev)
-{
- PDPA pDpa = dev->priv;
-
- printk ("RCreset_callback Status 0x%x\n", (uint) Status);
- /*
- * Check to see why we were called.
- */
- if (pDpa->shutdown) {
- printk (KERN_INFO "%s: shutting down interface\n",
- dev->name);
- pDpa->shutdown = 0;
- pDpa->reboot = 0;
- } else if (pDpa->reboot) {
- printk (KERN_INFO "%s: reboot, shutdown adapter\n",
- dev->name);
- /*
- * We don't set any of the flags in RCShutdownLANCard()
- * and we don't pass a callback routine to it.
- * The adapter will have already initiated the reboot by
- * the time the function returns.
- */
- RCDisableI2OInterrupts (dev);
- RCShutdownLANCard (dev, 0, 0, 0);
- printk (KERN_INFO "%s: scheduling timer...\n", dev->name);
- init_timer (&pDpa->timer);
- pDpa->timer.expires = RUN_AT ((40 * HZ) / 10); /* 4 sec. */
- pDpa->timer.data = (unsigned long) dev;
- pDpa->timer.function = &rc_timer; /* timer handler */
- add_timer (&pDpa->timer);
- }
-}
-
-static void
-RCreboot_callback (U32 Status, U32 p1, U32 p2, struct net_device *dev)
-{
- PDPA pDpa = dev->priv;
-
- printk (KERN_INFO "%s: reboot: rcv buffers outstanding = %d\n",
- dev->name, (uint) pDpa->numOutRcvBuffers);
-
- if (pDpa->shutdown) {
- printk (KERN_INFO "%s: skip reboot, shutdown initiated\n",
- dev->name);
- return;
- }
- pDpa->reboot = 1;
- /*
- * OK, we reset the adapter and ask it to return all
- * outstanding transmit buffers as well as the posted
- * receive buffers. When the adapter is done returning
- * those buffers, it will call our RCreset_callback()
- * routine. In that routine, we'll call RCShutdownLANCard()
- * to tell the adapter that it's OK to start the reboot and
- * schedule a timer callback routine to execute 3 seconds
- * later; this routine will reinitialize the adapter at that time.
- */
- RCResetLANCard (dev, RC_RESOURCE_RETURN_POSTED_RX_BUCKETS |
- RC_RESOURCE_RETURN_PEND_TX_BUFFERS, 0,
- (PFNCALLBACK) RCreset_callback);
-}
-
-/*
- * RCrecv_callback()
- *
- * The receive packet callback routine. This is called by
- * RCProcI2OMsgQ() after the adapter posts buffers which have been
- * filled (one ethernet packet per buffer).
- */
-static void
-RCrecv_callback (U32 Status,
- U8 PktCount,
- U32 BucketsRemain,
- PU32 PacketDescBlock, struct net_device *dev)
-{
-
- U32 len, count;
- PDPA pDpa = dev->priv;
- struct sk_buff *skb;
- singleTCB tcb;
- psingleTCB ptcb = &tcb;
-
- ptcb->bcount = 1;
-
- if ((pDpa->shutdown || pDpa->reboot) && !Status)
- printk (KERN_INFO "%s: shutdown||reboot && !Status (%d)\n",
- dev->name, PktCount);
-
- if ((Status != I2O_REPLY_STATUS_SUCCESS) || pDpa->shutdown) {
- /*
- * Free whatever buffers the adapter returned, but don't
- * pass them to the kernel.
- */
-
- if (!pDpa->shutdown && !pDpa->reboot)
- printk (KERN_INFO "%s: recv error status = 0x%x\n",
- dev->name, (uint) Status);
- else
- printk (KERN_DEBUG "%s: Returning %d buffs stat 0x%x\n",
- dev->name, PktCount, (uint) Status);
- /*
- * TO DO: check the nature of the failure and put the
- * adapter in failed mode if it's a hard failure.
- * Send a reset to the adapter and free all outstanding memory.
- */
- if (PacketDescBlock) {
- while (PktCount--) {
- skb = (struct sk_buff *) PacketDescBlock[0];
- dev_kfree_skb (skb);
- pDpa->numOutRcvBuffers--;
- /* point to next context field */
- PacketDescBlock += BD_SIZE;
- }
- }
- return;
- } else {
- while (PktCount--) {
- skb = (struct sk_buff *) PacketDescBlock[0];
- len = PacketDescBlock[2];
- skb->dev = dev;
- skb_put (skb, len); /* adjust length and tail */
- skb->protocol = eth_type_trans (skb, dev);
- netif_rx (skb); /* send the packet to the kernel */
- dev->last_rx = jiffies;
- pDpa->numOutRcvBuffers--;
- /* point to next context field */
- PacketDescBlock += BD_SIZE;
- }
- }
-
- /*
- * Replenish the posted receive buffers.
- * DO NOT replenish buffers if the driver has already
- * initiated a reboot or shutdown!
- */
-
- if (!pDpa->shutdown && !pDpa->reboot) {
- count = RC_allocate_and_post_buffers (dev,
- MAX_NMBR_RCV_BUFFERS -
- pDpa->numOutRcvBuffers);
- pDpa->numOutRcvBuffers += count;
- }
-
-}
-
-/*
- * RCinterrupt()
- *
- * Interrupt handler.
- * This routine sets up a couple of pointers and calls
- * RCProcI2OMsgQ(), which in turn process the message and
- * calls one of our callback functions.
- */
-static irqreturn_t
-RCinterrupt (int irq, void *dev_id, struct pt_regs *regs)
-{
-
- PDPA pDpa;
- struct net_device *dev = dev_id;
-
- pDpa = dev->priv;
-
- if (pDpa->shutdown)
- printk (KERN_DEBUG "%s: shutdown, service irq\n",
- dev->name);
-
- return RCProcI2OMsgQ (dev);
-}
-
-#define REBOOT_REINIT_RETRY_LIMIT 4
-static void
-rc_timer (unsigned long data)
-{
- struct net_device *dev = (struct net_device *) data;
- PDPA pDpa = dev->priv;
- int init_status;
- static int retry;
- int post_buffers = MAX_NMBR_RCV_BUFFERS;
- int count = 0;
- int requested = 0;
-
- if (pDpa->reboot) {
- init_status =
- RCInitI2OMsgLayer (dev, (PFNTXCALLBACK) RCxmit_callback,
- (PFNRXCALLBACK) RCrecv_callback,
- (PFNCALLBACK) RCreboot_callback);
-
- switch (init_status) {
- case RC_RTN_NO_ERROR:
-
- pDpa->reboot = 0;
- pDpa->shutdown = 0; /* just in case */
- RCReportDriverCapability (dev, DriverControlWord);
- RCEnableI2OInterrupts (dev);
-
-
- if (!(dev->flags & IFF_UP)) {
- retry = 0;
- return;
- }
- while (post_buffers) {
- if (post_buffers >
- MAX_NMBR_POST_BUFFERS_PER_MSG)
- requested =
- MAX_NMBR_POST_BUFFERS_PER_MSG;
- else
- requested = post_buffers;
- count =
- RC_allocate_and_post_buffers (dev,
- requested);
- post_buffers -= count;
- if (count < requested)
- break;
- }
- pDpa->numOutRcvBuffers =
- MAX_NMBR_RCV_BUFFERS - post_buffers;
- printk ("Initialization done.\n");
- netif_wake_queue (dev);
- retry = 0;
- return;
- case RC_RTN_FREE_Q_EMPTY:
- retry++;
- printk (KERN_WARNING "%s inbound free q empty\n",
- dev->name);
- break;
- default:
- retry++;
- printk (KERN_WARNING "%s bad stat after reboot: %d\n",
- dev->name, init_status);
- break;
- }
-
- if (retry > REBOOT_REINIT_RETRY_LIMIT) {
- printk (KERN_WARNING "%s unable to reinitialize adapter after reboot\n", dev->name);
- printk (KERN_WARNING "%s shutting down interface\n", dev->name);
- RCDisableI2OInterrupts (dev);
- dev->flags &= ~IFF_UP;
- } else {
- printk (KERN_INFO "%s: rescheduling timer...\n",
- dev->name);
- init_timer (&pDpa->timer);
- pDpa->timer.expires = RUN_AT ((40 * HZ) / 10);
- pDpa->timer.data = (unsigned long) dev;
- pDpa->timer.function = &rc_timer;
- add_timer (&pDpa->timer);
- }
- } else
- printk (KERN_WARNING "%s: unexpected timer irq\n", dev->name);
-}
-
-static int
-RCclose (struct net_device *dev)
-{
- PDPA pDpa = dev->priv;
-
- printk("RCclose\n");
- netif_stop_queue (dev);
-
- if (pDpa->reboot) {
- printk (KERN_INFO "%s skipping reset -- adapter already in reboot mode\n", dev->name);
- dev->flags &= ~IFF_UP;
- pDpa->shutdown = 1;
- return 0;
- }
-
- pDpa->shutdown = 1;
-
- /*
- * We can't allow the driver to be unloaded until the adapter returns
- * all posted receive buffers. It doesn't hurt to tell the adapter
- * to return all posted receive buffers and outstanding xmit buffers,
- * even if there are none.
- */
-
- RCShutdownLANCard (dev, RC_RESOURCE_RETURN_POSTED_RX_BUCKETS |
- RC_RESOURCE_RETURN_PEND_TX_BUFFERS, 0,
- (PFNCALLBACK) RCreset_callback);
-
- dev->flags &= ~IFF_UP;
- return 0;
-}
-
-static struct net_device_stats *
-RCget_stats (struct net_device *dev)
-{
- RCLINKSTATS RCstats;
-
- PDPA pDpa = dev->priv;
-
- if (!pDpa) {
- return 0;
- } else if (!(dev->flags & IFF_UP)) {
- return 0;
- }
-
- memset (&RCstats, 0, sizeof (RCLINKSTATS));
- if ((RCGetLinkStatistics (dev, &RCstats, (void *) 0)) ==
- RC_RTN_NO_ERROR) {
-
- /* total packets received */
- pDpa->stats.rx_packets = RCstats.Rcv_good
- /* total packets transmitted */;
- pDpa->stats.tx_packets = RCstats.TX_good;
-
- pDpa->stats.rx_errors = RCstats.Rcv_CRCerr +
- RCstats.Rcv_alignerr + RCstats.Rcv_reserr +
- RCstats.Rcv_orun + RCstats.Rcv_cdt + RCstats.Rcv_runt;
-
- pDpa->stats.tx_errors = RCstats.TX_urun + RCstats.TX_crs +
- RCstats.TX_def + RCstats.TX_totcol;
-
- /*
- * This needs improvement.
- */
- pDpa->stats.rx_dropped = 0; /* no space in linux buffers */
- pDpa->stats.tx_dropped = 0; /* no space available in linux */
- pDpa->stats.multicast = 0; /* multicast packets received */
- pDpa->stats.collisions = RCstats.TX_totcol;
-
- /* detailed rx_errors: */
- pDpa->stats.rx_length_errors = 0;
- pDpa->stats.rx_over_errors = RCstats.Rcv_orun;
- pDpa->stats.rx_crc_errors = RCstats.Rcv_CRCerr;
- pDpa->stats.rx_frame_errors = 0;
- pDpa->stats.rx_fifo_errors = 0;
- pDpa->stats.rx_missed_errors = 0;
-
- /* detailed tx_errors */
- pDpa->stats.tx_aborted_errors = 0;
- pDpa->stats.tx_carrier_errors = 0;
- pDpa->stats.tx_fifo_errors = 0;
- pDpa->stats.tx_heartbeat_errors = 0;
- pDpa->stats.tx_window_errors = 0;
-
- return ((struct net_device_stats *) &(pDpa->stats));
- }
- return 0;
-}
-
-static int
-RCioctl (struct net_device *dev, struct ifreq *rq, int cmd)
-{
- RCuser_struct RCuser;
- PDPA pDpa = dev->priv;
-
- if (!capable (CAP_NET_ADMIN))
- return -EPERM;
-
- switch (cmd) {
-
- case RCU_PROTOCOL_REV:
- /*
- * Assign user protocol revision, to tell user-level
- * controller program whether or not it's in sync.
- */
- rq->ifr_ifru.ifru_data = (caddr_t) USER_PROTOCOL_REV;
- break;
-
- case RCU_COMMAND:
- {
- if (copy_from_user
- (&RCuser, rq->ifr_data, sizeof (RCuser)))
- return -EFAULT;
-
- dprintk ("RCioctl: RCuser_cmd = 0x%x\n", RCuser.cmd);
-
- switch (RCuser.cmd) {
- case RCUC_GETFWVER:
- RCUD_GETFWVER = &RCuser.RCUS_GETFWVER;
- RCGetFirmwareVer (dev,
- (PU8) & RCUD_GETFWVER->
- FirmString, NULL);
- break;
- case RCUC_GETINFO:
- RCUD_GETINFO = &RCuser.RCUS_GETINFO;
- RCUD_GETINFO->mem_start = dev->base_addr;
- RCUD_GETINFO->mem_end =
- dev->base_addr + pDpa->pci_addr_len;
- RCUD_GETINFO->base_addr = pDpa->pci_addr;
- RCUD_GETINFO->irq = dev->irq;
- break;
- case RCUC_GETIPANDMASK:
- RCUD_GETIPANDMASK = &RCuser.RCUS_GETIPANDMASK;
- RCGetRavlinIPandMask (dev,
- (PU32) &
- RCUD_GETIPANDMASK->IpAddr,
- (PU32) &
- RCUD_GETIPANDMASK->
- NetMask, NULL);
- break;
- case RCUC_GETLINKSTATISTICS:
- RCUD_GETLINKSTATISTICS =
- &RCuser.RCUS_GETLINKSTATISTICS;
- RCGetLinkStatistics (dev,
- (P_RCLINKSTATS) &
- RCUD_GETLINKSTATISTICS->
- StatsReturn, NULL);
- break;
- case RCUC_GETLINKSTATUS:
- RCUD_GETLINKSTATUS = &RCuser.RCUS_GETLINKSTATUS;
- RCGetLinkStatus (dev,
- (PU32) & RCUD_GETLINKSTATUS->
- ReturnStatus, NULL);
- break;
- case RCUC_GETMAC:
- RCUD_GETMAC = &RCuser.RCUS_GETMAC;
- RCGetMAC (dev, NULL);
- memcpy(RCUD_GETMAC, dev->dev_addr, 8);
- break;
- case RCUC_GETPROM:
- RCUD_GETPROM = &RCuser.RCUS_GETPROM;
- RCGetPromiscuousMode (dev,
- (PU32) & RCUD_GETPROM->
- PromMode, NULL);
- break;
- case RCUC_GETBROADCAST:
- RCUD_GETBROADCAST = &RCuser.RCUS_GETBROADCAST;
- RCGetBroadcastMode (dev,
- (PU32) & RCUD_GETBROADCAST->
- BroadcastMode, NULL);
- break;
- case RCUC_GETSPEED:
- if (!(dev->flags & IFF_UP)) {
- return -ENODATA;
- }
- RCUD_GETSPEED = &RCuser.RCUS_GETSPEED;
- RCGetLinkSpeed (dev,
- (PU32) & RCUD_GETSPEED->
- LinkSpeedCode, NULL);
- break;
- case RCUC_SETIPANDMASK:
- RCUD_SETIPANDMASK = &RCuser.RCUS_SETIPANDMASK;
- RCSetRavlinIPandMask (dev,
- (U32) RCUD_SETIPANDMASK->
- IpAddr,
- (U32) RCUD_SETIPANDMASK->
- NetMask);
- break;
- case RCUC_SETMAC:
- RCSetMAC (dev, (PU8) & RCUD_SETMAC->mac);
- break;
- case RCUC_SETSPEED:
- RCUD_SETSPEED = &RCuser.RCUS_SETSPEED;
- RCSetLinkSpeed (dev,
- (U16) RCUD_SETSPEED->
- LinkSpeedCode);
- break;
- case RCUC_SETPROM:
- RCUD_SETPROM = &RCuser.RCUS_SETPROM;
- RCSetPromiscuousMode (dev,
- (U16) RCUD_SETPROM->
- PromMode);
- break;
- case RCUC_SETBROADCAST:
- RCUD_SETBROADCAST = &RCuser.RCUS_SETBROADCAST;
- RCSetBroadcastMode (dev,
- (U16) RCUD_SETBROADCAST->
- BroadcastMode);
- break;
- default:
- RCUD_DEFAULT = &RCuser.RCUS_DEFAULT;
- RCUD_DEFAULT->rc = 0x11223344;
- break;
- }
- if (copy_to_user (rq->ifr_data, &RCuser,
- sizeof (RCuser)))
- return -EFAULT;
- break;
- } /* RCU_COMMAND */
-
- default:
- rq->ifr_ifru.ifru_data = (caddr_t) 0x12345678;
- return -EINVAL;
- }
- return 0;
-}
-
-static int
-RCconfig (struct net_device *dev, struct ifmap *map)
-{
- /*
- * To be completed ...
- */
- return 0;
- if (dev->flags & IFF_UP) /* can't act on a running interface */
- return -EBUSY;
-
- /* Don't allow changing the I/O address */
- if (map->base_addr != dev->base_addr) {
- printk (KERN_WARNING "%s Change I/O address not implemented\n",
- dev->name);
- return -EOPNOTSUPP;
- }
- return 0;
-}
-
-static void __exit
-rcpci_cleanup_module (void)
-{
- pci_unregister_driver (&rcpci45_driver);
-}
-
-module_init (rcpci_init_module);
-module_exit (rcpci_cleanup_module);
-
-static int
-RC_allocate_and_post_buffers (struct net_device *dev, int numBuffers)
-{
-
- int i;
- PU32 p;
- psingleB pB;
- struct sk_buff *skb;
- PDPA pDpa = dev->priv;
- RC_RETURN status;
- U32 res = 0;
-
- if (!numBuffers)
- return 0;
- else if (numBuffers > MAX_NMBR_POST_BUFFERS_PER_MSG) {
- printk (KERN_ERR "%s: Too many buffers requested!\n",
- dev->name);
- numBuffers = 32;
- }
-
- p = (PU32) kmalloc (sizeof (U32) + numBuffers * sizeof (singleB),
- GFP_DMA | GFP_ATOMIC);
-
- if (!p) {
- printk (KERN_WARNING "%s unable to allocate TCB\n",
- dev->name);
- goto out;
- }
-
- p[0] = 0; /* Buffer Count */
- pB = (psingleB) ((U32) p + sizeof (U32));/* point to the first buffer */
-
- for (i = 0; i < numBuffers; i++) {
- skb = dev_alloc_skb (MAX_ETHER_SIZE + 2);
- if (!skb) {
- printk (KERN_WARNING
- "%s: unable to allocate enough skbs!\n",
- dev->name);
- goto err_out_unmap;
- }
- skb_reserve (skb, 2); /* Align IP on 16 byte boundaries */
- pB->context = (U32) skb;
- pB->scount = 1; /* segment count */
- pB->size = MAX_ETHER_SIZE;
- pB->addr = pci_map_single(pDpa->pci_dev, skb->data,
- MAX_ETHER_SIZE, PCI_DMA_FROMDEVICE);
- p[0]++;
- pB++;
- }
-
- if ((status = RCPostRecvBuffers (dev, (PRCTCB) p)) != RC_RTN_NO_ERROR) {
- printk (KERN_WARNING "%s: Post buffer failed, error 0x%x\n",
- dev->name, status);
- goto err_out_unmap;
- }
-out_free:
- res = p[0];
- kfree (p);
-out:
- return (res); /* return the number of posted buffers */
-
-err_out_unmap:
- for (; p[0] > 0; p[0]--) {
- --pB;
- skb = (struct sk_buff *) pB->context;
- pci_unmap_single(pDpa->pci_dev, pB->addr, MAX_ETHER_SIZE,
- PCI_DMA_FROMDEVICE);
- dev_kfree_skb (skb);
- }
- goto out_free;
-}
+++ /dev/null
-/*
- * Hardware-level driver for the COMX and HICOMX cards
- * for Linux kernel 2.2.X
- *
- * Original authors: Arpad Bakay <bakay.arpad@synergon.hu>,
- * Peter Bajan <bajan.peter@synergon.hu>,
- * Rewritten by: Tivadar Szemethy <tiv@itc.hu>
- * Currently maintained by: Gergely Madarasz <gorgo@itc.hu>
- *
- * Copyright (C) 1995-2000 ITConsult-Pro Co. <info@itc.hu>
- *
- * Contributors:
- * Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 0.86
- * Daniele Bellucci <bellucda@tiscali.it> - 0.87
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Version 0.80 (99/06/11):
- * - port back to kernel, add support builtin driver
- * - cleaned up the source code a bit
- *
- * Version 0.81 (99/06/22):
- * - cleaned up the board load functions, no more long reset
- * timeouts
- * - lower modem lines on close
- * - some interrupt handling fixes
- *
- * Version 0.82 (99/08/24):
- * - fix multiple board support
- *
- * Version 0.83 (99/11/30):
- * - interrupt handling and locking fixes during initalization
- * - really fix multiple board support
- *
- * Version 0.84 (99/12/02):
- * - some workarounds for problematic hardware/firmware
- *
- * Version 0.85 (00/01/14):
- * - some additional workarounds :/
- * - printk cleanups
- * Version 0.86 (00/08/15):
- * - resource release on failure at COMX_init
- *
- * Version 0.87 (03/07/09)
- * - audit copy_from_user in comxhw_write_proc
- */
-
-#define VERSION "0.87"
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/netdevice.h>
-#include <linux/proc_fs.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-
-#include <asm/uaccess.h>
-#include <asm/io.h>
-
-#include "comx.h"
-#include "comxhw.h"
-
-MODULE_AUTHOR("Gergely Madarasz <gorgo@itc.hu>, Tivadar Szemethy <tiv@itc.hu>, Arpad Bakay");
-MODULE_DESCRIPTION("Hardware-level driver for the COMX and HICOMX adapters\n");
-MODULE_LICENSE("GPL");
-
-#define COMX_readw(dev, offset) (readw(dev->mem_start + offset + \
- (unsigned int)(((struct comx_privdata *)\
- ((struct comx_channel *)dev->priv)->HW_privdata)->channel) \
- * COMX_CHANNEL_OFFSET))
-
-#define COMX_WRITE(dev, offset, value) (writew(value, dev->mem_start + offset \
- + (unsigned int)(((struct comx_privdata *) \
- ((struct comx_channel *)dev->priv)->HW_privdata)->channel) \
- * COMX_CHANNEL_OFFSET))
-
-#define COMX_CMD(dev, cmd) (COMX_WRITE(dev, OFF_A_L2_CMD, cmd))
-
-struct comx_firmware {
- int len;
- unsigned char *data;
-};
-
-struct comx_privdata {
- struct comx_firmware *firmware;
- u16 clock;
- char channel; // channel no.
- int memory_size;
- short io_extent;
- u_long histogram[5];
-};
-
-static struct net_device *memory_used[(COMX_MEM_MAX - COMX_MEM_MIN) / 0x10000];
-extern struct comx_hardware hicomx_hw;
-extern struct comx_hardware comx_hw;
-extern struct comx_hardware cmx_hw;
-
-static irqreturn_t COMX_interrupt(int irq, void *dev_id, struct pt_regs *regs);
-
-static void COMX_board_on(struct net_device *dev)
-{
- outb_p( (byte) (((dev->mem_start & 0xf0000) >> 16) |
- COMX_ENABLE_BOARD_IT | COMX_ENABLE_BOARD_MEM), dev->base_addr);
-}
-
-static void COMX_board_off(struct net_device *dev)
-{
- outb_p( (byte) (((dev->mem_start & 0xf0000) >> 16) |
- COMX_ENABLE_BOARD_IT), dev->base_addr);
-}
-
-static void HICOMX_board_on(struct net_device *dev)
-{
- outb_p( (byte) (((dev->mem_start & 0xf0000) >> 12) |
- HICOMX_ENABLE_BOARD_MEM), dev->base_addr);
-}
-
-static void HICOMX_board_off(struct net_device *dev)
-{
- outb_p( (byte) (((dev->mem_start & 0xf0000) >> 12) |
- HICOMX_DISABLE_BOARD_MEM), dev->base_addr);
-}
-
-static void COMX_set_clock(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw = ch->HW_privdata;
-
- COMX_WRITE(dev, OFF_A_L1_CLKINI, hw->clock);
-}
-
-static struct net_device *COMX_access_board(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct net_device *ret;
- int mempos = (dev->mem_start - COMX_MEM_MIN) >> 16;
- unsigned long flags;
-
-
- save_flags(flags); cli();
-
- ret = memory_used[mempos];
-
- if(ret == dev) {
- goto out;
- }
-
- memory_used[mempos] = dev;
-
- if (!ch->twin || ret != ch->twin) {
- if (ret) ((struct comx_channel *)ret->priv)->HW_board_off(ret);
- ch->HW_board_on(dev);
- }
-out:
- restore_flags(flags);
- return ret;
-}
-
-static void COMX_release_board(struct net_device *dev, struct net_device *savep)
-{
- unsigned long flags;
- int mempos = (dev->mem_start - COMX_MEM_MIN) >> 16;
- struct comx_channel *ch = dev->priv;
-
- save_flags(flags); cli();
-
- if (memory_used[mempos] == savep) {
- goto out;
- }
-
- memory_used[mempos] = savep;
- if (!ch->twin || ch->twin != savep) {
- ch->HW_board_off(dev);
- if (savep) ((struct comx_channel*)savep->priv)->HW_board_on(savep);
- }
-out:
- restore_flags(flags);
-}
-
-static int COMX_txe(struct net_device *dev)
-{
- struct net_device *savep;
- struct comx_channel *ch = dev->priv;
- int rc = 0;
-
- savep = ch->HW_access_board(dev);
- if (COMX_readw(dev,OFF_A_L2_LINKUP) == LINKUP_READY) {
- rc = COMX_readw(dev,OFF_A_L2_TxEMPTY);
- }
- ch->HW_release_board(dev,savep);
- if(rc==0xffff) {
- printk(KERN_ERR "%s, OFF_A_L2_TxEMPTY is %d\n",dev->name, rc);
- }
- return rc;
-}
-
-static int COMX_send_packet(struct net_device *dev, struct sk_buff *skb)
-{
- struct net_device *savep;
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw = ch->HW_privdata;
- int ret = FRAME_DROPPED;
- word tmp;
-
- savep = ch->HW_access_board(dev);
-
- if (ch->debug_flags & DEBUG_HW_TX) {
- comx_debug_bytes(dev, skb->data, skb->len,"COMX_send packet");
- }
-
- if (skb->len > COMX_MAX_TX_SIZE) {
- ret=FRAME_DROPPED;
- goto out;
- }
-
- tmp=COMX_readw(dev, OFF_A_L2_TxEMPTY);
- if ((ch->line_status & LINE_UP) && tmp==1) {
- int lensave = skb->len;
- int dest = COMX_readw(dev, OFF_A_L2_TxBUFP);
- word *data = (word *)skb->data;
-
- if(dest==0xffff) {
- printk(KERN_ERR "%s: OFF_A_L2_TxBUFP is %d\n", dev->name, dest);
- ret=FRAME_DROPPED;
- goto out;
- }
-
- writew((unsigned short)skb->len, dev->mem_start + dest);
- dest += 2;
- while (skb->len > 1) {
- writew(*data++, dev->mem_start + dest);
- dest += 2; skb->len -= 2;
- }
- if (skb->len == 1) {
- writew(*((byte *)data), dev->mem_start + dest);
- }
- writew(0, dev->mem_start + (int)hw->channel *
- COMX_CHANNEL_OFFSET + OFF_A_L2_TxEMPTY);
- ch->stats.tx_packets++;
- ch->stats.tx_bytes += lensave;
- ret = FRAME_ACCEPTED;
- } else {
- ch->stats.tx_dropped++;
- printk(KERN_INFO "%s: frame dropped\n",dev->name);
- if(tmp) {
- printk(KERN_ERR "%s: OFF_A_L2_TxEMPTY is %d\n",dev->name,tmp);
- }
- }
-
-out:
- ch->HW_release_board(dev, savep);
- dev_kfree_skb(skb);
- return ret;
-}
-
-static inline int comx_read_buffer(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- word rbuf_offs;
- struct sk_buff *skb;
- word len;
- int i=0;
- word *writeptr;
-
- i = 0;
- rbuf_offs = COMX_readw(dev, OFF_A_L2_RxBUFP);
- if(rbuf_offs == 0xffff) {
- printk(KERN_ERR "%s: OFF_A_L2_RxBUFP is %d\n",dev->name,rbuf_offs);
- return 0;
- }
- len = readw(dev->mem_start + rbuf_offs);
- if(len > COMX_MAX_RX_SIZE) {
- printk(KERN_ERR "%s: packet length is %d\n",dev->name,len);
- return 0;
- }
- if ((skb = dev_alloc_skb(len + 16)) == NULL) {
- ch->stats.rx_dropped++;
- COMX_WRITE(dev, OFF_A_L2_DAV, 0);
- return 0;
- }
- rbuf_offs += 2;
- skb_reserve(skb, 16);
- skb_put(skb, len);
- skb->dev = dev;
- writeptr = (word *)skb->data;
- while (i < len) {
- *writeptr++ = readw(dev->mem_start + rbuf_offs);
- rbuf_offs += 2;
- i += 2;
- }
- COMX_WRITE(dev, OFF_A_L2_DAV, 0);
- ch->stats.rx_packets++;
- ch->stats.rx_bytes += len;
- if (ch->debug_flags & DEBUG_HW_RX) {
- comx_debug_skb(dev, skb, "COMX_interrupt receiving");
- }
- ch->LINE_rx(dev, skb);
- return 1;
-}
-
-static inline char comx_line_change(struct net_device *dev, char linestat)
-{
- struct comx_channel *ch=dev->priv;
- char idle=1;
-
-
- if (linestat & LINE_UP) { /* Vonal fol */
- if (ch->lineup_delay) {
- if (!test_and_set_bit(0, &ch->lineup_pending)) {
- ch->lineup_timer.function = comx_lineup_func;
- ch->lineup_timer.data = (unsigned long)dev;
- ch->lineup_timer.expires = jiffies +
- HZ*ch->lineup_delay;
- add_timer(&ch->lineup_timer);
- idle=0;
- }
- } else {
- idle=0;
- ch->LINE_status(dev, ch->line_status |= LINE_UP);
- }
- } else { /* Vonal le */
- idle=0;
- if (test_and_clear_bit(0, &ch->lineup_pending)) {
- del_timer(&ch->lineup_timer);
- } else {
- ch->line_status &= ~LINE_UP;
- if (ch->LINE_status) {
- ch->LINE_status(dev, ch->line_status);
- }
- }
- }
- return idle;
-}
-
-
-
-static irqreturn_t COMX_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- struct net_device *dev = dev_id;
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw = ch->HW_privdata;
- struct net_device *interrupted;
- unsigned long jiffs;
- char idle = 0;
- int count = 0;
- word tmp;
-
- if (dev == NULL) {
- printk(KERN_ERR "COMX_interrupt: irq %d for unknown device\n", irq);
- return IRQ_NONE;
- }
-
- jiffs = jiffies;
-
- interrupted = ch->HW_access_board(dev);
-
- while (!idle && count < 5000) {
- char channel = 0;
- idle = 1;
-
- while (channel < 2) {
- char linestat = 0;
- char buffers_emptied = 0;
-
- if (channel == 1) {
- if (ch->twin) {
- dev = ch->twin;
- ch = dev->priv;
- hw = ch->HW_privdata;
- } else {
- break;
- }
- } else {
- COMX_WRITE(dev, OFF_A_L1_REPENA,
- COMX_readw(dev, OFF_A_L1_REPENA) & 0xFF00);
- }
- channel++;
-
- if ((ch->init_status & (HW_OPEN | LINE_OPEN)) !=
- (HW_OPEN | LINE_OPEN)) {
- continue;
- }
-
- /* Collect stats */
- tmp = COMX_readw(dev, OFF_A_L1_ABOREC);
- COMX_WRITE(dev, OFF_A_L1_ABOREC, 0);
- if(tmp==0xffff) {
- printk(KERN_ERR "%s: OFF_A_L1_ABOREC is %d\n",dev->name,tmp);
- break;
- } else {
- ch->stats.rx_missed_errors += (tmp >> 8) & 0xff;
- ch->stats.rx_over_errors += tmp & 0xff;
- }
- tmp = COMX_readw(dev, OFF_A_L1_CRCREC);
- COMX_WRITE(dev, OFF_A_L1_CRCREC, 0);
- if(tmp==0xffff) {
- printk(KERN_ERR "%s: OFF_A_L1_CRCREC is %d\n",dev->name,tmp);
- break;
- } else {
- ch->stats.rx_crc_errors += (tmp >> 8) & 0xff;
- ch->stats.rx_missed_errors += tmp & 0xff;
- }
-
- if ((ch->line_status & LINE_UP) && ch->LINE_rx) {
- tmp=COMX_readw(dev, OFF_A_L2_DAV);
- while (tmp==1) {
- idle=0;
- buffers_emptied+=comx_read_buffer(dev);
- tmp=COMX_readw(dev, OFF_A_L2_DAV);
- }
- if(tmp) {
- printk(KERN_ERR "%s: OFF_A_L2_DAV is %d\n", dev->name, tmp);
- break;
- }
- }
-
- tmp=COMX_readw(dev, OFF_A_L2_TxEMPTY);
- if (tmp==1 && ch->LINE_tx) {
- ch->LINE_tx(dev);
- }
- if(tmp==0xffff) {
- printk(KERN_ERR "%s: OFF_A_L2_TxEMPTY is %d\n", dev->name, tmp);
- break;
- }
-
- if (COMX_readw(dev, OFF_A_L1_PBUFOVR) >> 8) {
- linestat &= ~LINE_UP;
- } else {
- linestat |= LINE_UP;
- }
-
- if ((linestat & LINE_UP) != (ch->line_status & LINE_UP)) {
- ch->stats.tx_carrier_errors++;
- idle &= comx_line_change(dev,linestat);
- }
-
- hw->histogram[(int)buffers_emptied]++;
- }
- count++;
- }
-
- if(count==5000) {
- printk(KERN_WARNING "%s: interrupt stuck\n",dev->name);
- }
-
- ch->HW_release_board(dev, interrupted);
- return IRQ_HANDLED;
-}
-
-static int COMX_open(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw = ch->HW_privdata;
- struct proc_dir_entry *procfile = ch->procdir->subdir;
- unsigned long jiffs;
- int twin_open=0;
- int retval;
- struct net_device *savep;
-
- if (!dev->base_addr || !dev->irq || !dev->mem_start) {
- return -ENODEV;
- }
-
- if (ch->twin && (((struct comx_channel *)(ch->twin->priv))->init_status & HW_OPEN)) {
- twin_open=1;
- }
-
- if (!twin_open) {
- if (!request_region(dev->base_addr, hw->io_extent, dev->name)) {
- return -EAGAIN;
- }
- if (request_irq(dev->irq, COMX_interrupt, 0, dev->name,
- (void *)dev)) {
- printk(KERN_ERR "comx-hw-comx: unable to obtain irq %d\n", dev->irq);
- release_region(dev->base_addr, hw->io_extent);
- return -EAGAIN;
- }
- ch->init_status |= IRQ_ALLOCATED;
- if (!ch->HW_load_board || ch->HW_load_board(dev)) {
- ch->init_status &= ~IRQ_ALLOCATED;
- retval=-ENODEV;
- goto error;
- }
- }
-
- savep = ch->HW_access_board(dev);
- COMX_WRITE(dev, OFF_A_L2_LINKUP, 0);
-
- if (ch->HW_set_clock) {
- ch->HW_set_clock(dev);
- }
-
- COMX_CMD(dev, COMX_CMD_INIT);
- jiffs = jiffies;
- while (COMX_readw(dev, OFF_A_L2_LINKUP) != 1 && time_before(jiffies, jiffs + HZ)) {
- schedule_timeout(1);
- }
-
- if (time_after_eq(jiffies, jiffs + HZ)) {
- printk(KERN_ERR "%s: board timeout on INIT command\n", dev->name);
- ch->HW_release_board(dev, savep);
- retval=-EIO;
- goto error;
- }
- udelay(1000);
-
- COMX_CMD(dev, COMX_CMD_OPEN);
-
- jiffs = jiffies;
- while (COMX_readw(dev, OFF_A_L2_LINKUP) != 3 && time_before(jiffies, jiffs + HZ)) {
- schedule_timeout(1);
- }
-
- if (time_after_eq(jiffies, jiffs + HZ)) {
- printk(KERN_ERR "%s: board timeout on OPEN command\n", dev->name);
- ch->HW_release_board(dev, savep);
- retval=-EIO;
- goto error;
- }
-
- ch->init_status |= HW_OPEN;
-
- /* Ez eleg ciki, de ilyen a rendszer */
- if (COMX_readw(dev, OFF_A_L1_PBUFOVR) >> 8) {
- ch->line_status &= ~LINE_UP;
- } else {
- ch->line_status |= LINE_UP;
- }
-
- if (ch->LINE_status) {
- ch->LINE_status(dev, ch->line_status);
- }
-
- ch->HW_release_board(dev, savep);
-
- for ( ; procfile ; procfile = procfile->next) {
- if (strcmp(procfile->name, FILENAME_IRQ) == 0
- || strcmp(procfile->name, FILENAME_IO) == 0
- || strcmp(procfile->name, FILENAME_MEMADDR) == 0
- || strcmp(procfile->name, FILENAME_CHANNEL) == 0
- || strcmp(procfile->name, FILENAME_FIRMWARE) == 0
- || strcmp(procfile->name, FILENAME_CLOCK) == 0) {
- procfile->mode = S_IFREG | 0444;
-
- }
- }
-
- return 0;
-
-error:
- if(!twin_open) {
- release_region(dev->base_addr, hw->io_extent);
- free_irq(dev->irq, (void *)dev);
- }
- return retval;
-
-}
-
-static int COMX_close(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct proc_dir_entry *procfile = ch->procdir->subdir;
- struct comx_privdata *hw = ch->HW_privdata;
- struct comx_channel *twin_ch;
- struct net_device *savep;
-
- savep = ch->HW_access_board(dev);
-
- COMX_CMD(dev, COMX_CMD_CLOSE);
- udelay(1000);
- COMX_CMD(dev, COMX_CMD_EXIT);
-
- ch->HW_release_board(dev, savep);
-
- if (ch->init_status & IRQ_ALLOCATED) {
- free_irq(dev->irq, (void *)dev);
- ch->init_status &= ~IRQ_ALLOCATED;
- }
- release_region(dev->base_addr, hw->io_extent);
-
- if (ch->twin && (twin_ch = ch->twin->priv) &&
- (twin_ch->init_status & HW_OPEN)) {
- /* Pass the irq to the twin */
- if (request_irq(dev->irq, COMX_interrupt, 0, ch->twin->name,
- (void *)ch->twin) == 0) {
- twin_ch->init_status |= IRQ_ALLOCATED;
- }
- }
-
- for ( ; procfile ; procfile = procfile->next) {
- if (strcmp(procfile->name, FILENAME_IRQ) == 0
- || strcmp(procfile->name, FILENAME_IO) == 0
- || strcmp(procfile->name, FILENAME_MEMADDR) == 0
- || strcmp(procfile->name, FILENAME_CHANNEL) == 0
- || strcmp(procfile->name, FILENAME_FIRMWARE) == 0
- || strcmp(procfile->name, FILENAME_CLOCK) == 0) {
- procfile->mode = S_IFREG | 0644;
- }
- }
-
- ch->init_status &= ~HW_OPEN;
- return 0;
-}
-
-static int COMX_statistics(struct net_device *dev, char *page)
-{
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw = ch->HW_privdata;
- struct net_device *savep;
- int len = 0;
-
- savep = ch->HW_access_board(dev);
-
- len += sprintf(page + len, "Board data: %s %s %s %s\nPBUFOVR: %02x, "
- "MODSTAT: %02x, LINKUP: %02x, DAV: %02x\nRxBUFP: %02x, "
- "TxEMPTY: %02x, TxBUFP: %02x\n",
- (ch->init_status & HW_OPEN) ? "HW_OPEN" : "",
- (ch->init_status & LINE_OPEN) ? "LINE_OPEN" : "",
- (ch->init_status & FW_LOADED) ? "FW_LOADED" : "",
- (ch->init_status & IRQ_ALLOCATED) ? "IRQ_ALLOCATED" : "",
- COMX_readw(dev, OFF_A_L1_PBUFOVR) & 0xff,
- (COMX_readw(dev, OFF_A_L1_PBUFOVR) >> 8) & 0xff,
- COMX_readw(dev, OFF_A_L2_LINKUP) & 0xff,
- COMX_readw(dev, OFF_A_L2_DAV) & 0xff,
- COMX_readw(dev, OFF_A_L2_RxBUFP) & 0xff,
- COMX_readw(dev, OFF_A_L2_TxEMPTY) & 0xff,
- COMX_readw(dev, OFF_A_L2_TxBUFP) & 0xff);
-
- len += sprintf(page + len, "hist[0]: %8lu hist[1]: %8lu hist[2]: %8lu\n"
- "hist[3]: %8lu hist[4]: %8lu\n",hw->histogram[0],hw->histogram[1],
- hw->histogram[2],hw->histogram[3],hw->histogram[4]);
-
- ch->HW_release_board(dev, savep);
-
- return len;
-}
-
-static int COMX_load_board(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw = ch->HW_privdata;
- struct comx_firmware *fw = hw->firmware;
- word board_segment = dev->mem_start >> 16;
- int mempos = (dev->mem_start - COMX_MEM_MIN) >> 16;
- unsigned long flags;
- unsigned char id1, id2;
- struct net_device *saved;
- int retval;
- int loopcount;
- int len;
- byte *COMX_address;
-
- if (!fw || !fw->len) {
- struct comx_channel *twin_ch = ch->twin ? ch->twin->priv : NULL;
- struct comx_privdata *twin_hw;
-
- if (!twin_ch || !(twin_hw = twin_ch->HW_privdata)) {
- return -EAGAIN;
- }
-
- if (!(fw = twin_hw->firmware) || !fw->len) {
- return -EAGAIN;
- }
- }
-
- id1 = fw->data[OFF_FW_L1_ID];
- id2 = fw->data[OFF_FW_L1_ID + 1];
-
- if (id1 != FW_L1_ID_1 || id2 != FW_L1_ID_2_COMX) {
- printk(KERN_ERR "%s: incorrect firmware, load aborted\n",
- dev->name);
- return -EAGAIN;
- }
-
- printk(KERN_INFO "%s: Loading COMX Layer 1 firmware %s\n", dev->name,
- (char *)(fw->data + OFF_FW_L1_ID + 2));
-
- id1 = fw->data[OFF_FW_L2_ID];
- id2 = fw->data[OFF_FW_L2_ID + 1];
- if (id1 == FW_L2_ID_1 && (id2 == 0xc0 || id2 == 0xc1 || id2 == 0xc2)) {
- printk(KERN_INFO "with Layer 2 code %s\n",
- (char *)(fw->data + OFF_FW_L2_ID + 2));
- }
-
- outb_p(board_segment | COMX_BOARD_RESET, dev->base_addr);
- /* 10 usec should be enough here */
- udelay(100);
-
- save_flags(flags); cli();
- saved=memory_used[mempos];
- if(saved) {
- ((struct comx_channel *)saved->priv)->HW_board_off(saved);
- }
- memory_used[mempos]=dev;
-
- outb_p(board_segment | COMX_ENABLE_BOARD_MEM, dev->base_addr);
-
- writeb(0, dev->mem_start + COMX_JAIL_OFFSET);
-
- loopcount=0;
- while(loopcount++ < 10000 &&
- readb(dev->mem_start + COMX_JAIL_OFFSET) != COMX_JAIL_VALUE) {
- udelay(100);
- }
-
- if (readb(dev->mem_start + COMX_JAIL_OFFSET) != COMX_JAIL_VALUE) {
- printk(KERN_ERR "%s: Can't reset board, JAIL value is %02x\n",
- dev->name, readb(dev->mem_start + COMX_JAIL_OFFSET));
- retval=-ENODEV;
- goto out;
- }
-
- writeb(0x55, dev->mem_start + 0x18ff);
-
- loopcount=0;
- while(loopcount++ < 10000 && readb(dev->mem_start + 0x18ff) != 0) {
- udelay(100);
- }
-
- if(readb(dev->mem_start + 0x18ff) != 0) {
- printk(KERN_ERR "%s: Can't reset board, reset timeout\n",
- dev->name);
- retval=-ENODEV;
- goto out;
- }
-
- len = 0;
- COMX_address = (byte *)dev->mem_start;
- while (fw->len > len) {
- writeb(fw->data[len++], COMX_address++);
- }
-
- len = 0;
- COMX_address = (byte *)dev->mem_start;
- while (len != fw->len && readb(COMX_address++) == fw->data[len]) {
- len++;
- }
-
- if (len != fw->len) {
- printk(KERN_ERR "%s: error loading firmware: [%d] is 0x%02x "
- "instead of 0x%02x\n", dev->name, len,
- readb(COMX_address - 1), fw->data[len]);
- retval=-EAGAIN;
- goto out;
- }
-
- writeb(0, dev->mem_start + COMX_JAIL_OFFSET);
-
- loopcount = 0;
- while ( loopcount++ < 10000 && COMX_readw(dev, OFF_A_L2_LINKUP) != 1 ) {
- udelay(100);
- }
-
- if (COMX_readw(dev, OFF_A_L2_LINKUP) != 1) {
- printk(KERN_ERR "%s: error starting firmware, linkup word is %04x\n",
- dev->name, COMX_readw(dev, OFF_A_L2_LINKUP));
- retval=-EAGAIN;
- goto out;
- }
-
-
- ch->init_status |= FW_LOADED;
- retval=0;
-
-out:
- outb_p(board_segment | COMX_DISABLE_ALL, dev->base_addr);
- if(saved) {
- ((struct comx_channel *)saved->priv)->HW_board_on(saved);
- }
- memory_used[mempos]=saved;
- restore_flags(flags);
- return retval;
-}
-
-static int CMX_load_board(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw = ch->HW_privdata;
- struct comx_firmware *fw = hw->firmware;
- word board_segment = dev->mem_start >> 16;
- int mempos = (dev->mem_start - COMX_MEM_MIN) >> 16;
- #if 0
- unsigned char id1, id2;
- #endif
- struct net_device *saved;
- unsigned long flags;
- int retval;
- int loopcount;
- int len;
- byte *COMX_address;
-
- if (!fw || !fw->len) {
- struct comx_channel *twin_ch = ch->twin ? ch->twin->priv : NULL;
- struct comx_privdata *twin_hw;
-
- if (!twin_ch || !(twin_hw = twin_ch->HW_privdata)) {
- return -EAGAIN;
- }
-
- if (!(fw = twin_hw->firmware) || !fw->len) {
- return -EAGAIN;
- }
- }
-
- /* Ide kell olyat tenni, hogy ellenorizze az ID-t */
-
- if (inb_p(dev->base_addr) != CMX_ID_BYTE) {
- printk(KERN_ERR "%s: CMX id byte is invalid(%02x)\n", dev->name,
- inb_p(dev->base_addr));
- return -ENODEV;
- }
-
- printk(KERN_INFO "%s: Loading CMX Layer 1 firmware %s\n", dev->name,
- (char *)(fw->data + OFF_FW_L1_ID + 2));
-
- save_flags(flags); cli();
- saved=memory_used[mempos];
- if(saved) {
- ((struct comx_channel *)saved->priv)->HW_board_off(saved);
- }
- memory_used[mempos]=dev;
-
- outb_p(board_segment | COMX_ENABLE_BOARD_MEM | COMX_BOARD_RESET,
- dev->base_addr);
-
- len = 0;
- COMX_address = (byte *)dev->mem_start;
- while (fw->len > len) {
- writeb(fw->data[len++], COMX_address++);
- }
-
- len = 0;
- COMX_address = (byte *)dev->mem_start;
- while (len != fw->len && readb(COMX_address++) == fw->data[len]) {
- len++;
- }
-
- outb_p(board_segment | COMX_ENABLE_BOARD_MEM, dev->base_addr);
-
- if (len != fw->len) {
- printk(KERN_ERR "%s: error loading firmware: [%d] is 0x%02x "
- "instead of 0x%02x\n", dev->name, len,
- readb(COMX_address - 1), fw->data[len]);
- retval=-EAGAIN;
- goto out;
- }
-
- loopcount=0;
- while( loopcount++ < 10000 && COMX_readw(dev, OFF_A_L2_LINKUP) != 1 ) {
- udelay(100);
- }
-
- if (COMX_readw(dev, OFF_A_L2_LINKUP) != 1) {
- printk(KERN_ERR "%s: error starting firmware, linkup word is %04x\n",
- dev->name, COMX_readw(dev, OFF_A_L2_LINKUP));
- retval=-EAGAIN;
- goto out;
- }
-
- ch->init_status |= FW_LOADED;
- retval=0;
-
-out:
- outb_p(board_segment | COMX_DISABLE_ALL, dev->base_addr);
- if(saved) {
- ((struct comx_channel *)saved->priv)->HW_board_on(saved);
- }
- memory_used[mempos]=saved;
- restore_flags(flags);
- return retval;
-}
-
-static int HICOMX_load_board(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw = ch->HW_privdata;
- struct comx_firmware *fw = hw->firmware;
- word board_segment = dev->mem_start >> 12;
- int mempos = (dev->mem_start - COMX_MEM_MIN) >> 16;
- struct net_device *saved;
- unsigned char id1, id2;
- unsigned long flags;
- int retval;
- int loopcount;
- int len;
- word *HICOMX_address;
- char id = 1;
-
- if (!fw || !fw->len) {
- struct comx_channel *twin_ch = ch->twin ? ch->twin->priv : NULL;
- struct comx_privdata *twin_hw;
-
- if (!twin_ch || !(twin_hw = twin_ch->HW_privdata)) {
- return -EAGAIN;
- }
-
- if (!(fw = twin_hw->firmware) || !fw->len) {
- return -EAGAIN;
- }
- }
-
- while (id != 4) {
- if (inb_p(dev->base_addr + id++) != HICOMX_ID_BYTE) {
- break;
- }
- }
-
- if (id != 4) {
- printk(KERN_ERR "%s: can't find HICOMX at 0x%04x, id[%d] = %02x\n",
- dev->name, (unsigned int)dev->base_addr, id - 1,
- inb_p(dev->base_addr + id - 1));
- return -1;
- }
-
- id1 = fw->data[OFF_FW_L1_ID];
- id2 = fw->data[OFF_FW_L1_ID + 1];
- if (id1 != FW_L1_ID_1 || id2 != FW_L1_ID_2_HICOMX) {
- printk(KERN_ERR "%s: incorrect firmware, load aborted\n", dev->name);
- return -EAGAIN;
- }
-
- printk(KERN_INFO "%s: Loading HICOMX Layer 1 firmware %s\n", dev->name,
- (char *)(fw->data + OFF_FW_L1_ID + 2));
-
- id1 = fw->data[OFF_FW_L2_ID];
- id2 = fw->data[OFF_FW_L2_ID + 1];
- if (id1 == FW_L2_ID_1 && (id2 == 0xc0 || id2 == 0xc1 || id2 == 0xc2)) {
- printk(KERN_INFO "with Layer 2 code %s\n",
- (char *)(fw->data + OFF_FW_L2_ID + 2));
- }
-
- outb_p(board_segment | HICOMX_BOARD_RESET, dev->base_addr);
- udelay(10);
-
- save_flags(flags); cli();
- saved=memory_used[mempos];
- if(saved) {
- ((struct comx_channel *)saved->priv)->HW_board_off(saved);
- }
- memory_used[mempos]=dev;
-
- outb_p(board_segment | HICOMX_ENABLE_BOARD_MEM, dev->base_addr);
- outb_p(HICOMX_PRG_MEM, dev->base_addr + 1);
-
- len = 0;
- HICOMX_address = (word *)dev->mem_start;
- while (fw->len > len) {
- writeb(fw->data[len++], HICOMX_address++);
- }
-
- len = 0;
- HICOMX_address = (word *)dev->mem_start;
- while (len != fw->len && (readw(HICOMX_address++) & 0xff) == fw->data[len]) {
- len++;
- }
-
- if (len != fw->len) {
- printk(KERN_ERR "%s: error loading firmware: [%d] is 0x%02x "
- "instead of 0x%02x\n", dev->name, len,
- readw(HICOMX_address - 1) & 0xff, fw->data[len]);
- retval=-EAGAIN;
- goto out;
- }
-
- outb_p(board_segment | HICOMX_BOARD_RESET, dev->base_addr);
- outb_p(HICOMX_DATA_MEM, dev->base_addr + 1);
-
- outb_p(board_segment | HICOMX_ENABLE_BOARD_MEM, dev->base_addr);
-
- loopcount=0;
- while(loopcount++ < 10000 && COMX_readw(dev, OFF_A_L2_LINKUP) != 1) {
- udelay(100);
- }
-
- if ( COMX_readw(dev, OFF_A_L2_LINKUP) != 1 ) {
- printk(KERN_ERR "%s: error starting firmware, linkup word is %04x\n",
- dev->name, COMX_readw(dev, OFF_A_L2_LINKUP));
- retval=-EAGAIN;
- goto out;
- }
-
- ch->init_status |= FW_LOADED;
- retval=0;
-
-out:
- outb_p(board_segment | HICOMX_DISABLE_ALL, dev->base_addr);
- outb_p(HICOMX_DATA_MEM, dev->base_addr + 1);
-
- if(saved) {
- ((struct comx_channel *)saved->priv)->HW_board_on(saved);
- }
- memory_used[mempos]=saved;
- restore_flags(flags);
- return retval;
-}
-
-static struct net_device *comx_twin_check(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct proc_dir_entry *procfile = ch->procdir->parent->subdir;
- struct comx_privdata *hw = ch->HW_privdata;
-
- struct net_device *twin;
- struct comx_channel *ch_twin;
- struct comx_privdata *hw_twin;
-
-
- for ( ; procfile ; procfile = procfile->next) {
-
- if(!S_ISDIR(procfile->mode)) {
- continue;
- }
-
- twin=procfile->data;
- ch_twin=twin->priv;
- hw_twin=ch_twin->HW_privdata;
-
-
- if (twin != dev && dev->irq && dev->base_addr && dev->mem_start &&
- dev->irq == twin->irq && dev->base_addr == twin->base_addr &&
- dev->mem_start == twin->mem_start &&
- hw->channel == (1 - hw_twin->channel) &&
- ch->hardware == ch_twin->hardware) {
- return twin;
- }
- }
- return NULL;
-}
-
-static int comxhw_write_proc(struct file *file, const char *buffer,
- u_long count, void *data)
-{
- struct proc_dir_entry *entry = (struct proc_dir_entry *)data;
- struct net_device *dev = entry->parent->data;
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw = ch->HW_privdata;
- char *page;
-
-
- if(ch->init_status & HW_OPEN) {
- return -EAGAIN;
- }
-
- if (strcmp(FILENAME_FIRMWARE, entry->name) != 0) {
- if (!(page = (char *)__get_free_page(GFP_KERNEL))) {
- return -ENOMEM;
- }
- if(copy_from_user(page, buffer, count = (min_t(int, count, PAGE_SIZE))))
- {
- count = -EFAULT;
- goto out;
- }
- if (page[count-1] == '\n')
- page[count-1] = '\0';
- else if (count < PAGE_SIZE)
- page[count] = '\0';
- else if (page[count]) {
- count = -EINVAL;
- goto out;
- }
- page[count]=0; /* Null terminate */
- } else {
- byte *tmp;
-
- if (!hw->firmware) {
- if ((hw->firmware = kmalloc(sizeof(struct comx_firmware),
- GFP_KERNEL)) == NULL) {
- return -ENOMEM;
- }
- hw->firmware->len = 0;
- hw->firmware->data = NULL;
- }
-
- if ((tmp = kmalloc(count + file->f_pos, GFP_KERNEL)) == NULL) {
- return -ENOMEM;
- }
-
- /* Ha nem 0 a fpos, akkor meglevo file-t irunk. Gyenge trukk. */
- if (hw->firmware && hw->firmware->len && file->f_pos
- && hw->firmware->len < count + file->f_pos) {
- memcpy(tmp, hw->firmware->data, hw->firmware->len);
- }
- if (hw->firmware->data) {
- kfree(hw->firmware->data);
- }
- if (copy_from_user(tmp + file->f_pos, buffer, count))
- return -EFAULT;
- hw->firmware->len = entry->size = file->f_pos + count;
- hw->firmware->data = tmp;
- file->f_pos += count;
- return count;
- }
-
- if (strcmp(entry->name, FILENAME_CHANNEL) == 0) {
- hw->channel = simple_strtoul(page, NULL, 0);
- if (hw->channel >= MAX_CHANNELNO) {
- printk(KERN_ERR "Invalid channel number\n");
- hw->channel = 0;
- }
- if ((ch->twin = comx_twin_check(dev)) != NULL) {
- struct comx_channel *twin_ch = ch->twin->priv;
- twin_ch->twin = dev;
- }
- } else if (strcmp(entry->name, FILENAME_IRQ) == 0) {
- dev->irq = simple_strtoul(page, NULL, 0);
- if (dev->irq == 2) {
- dev->irq = 9;
- }
- if (dev->irq < 3 || dev->irq > 15) {
- printk(KERN_ERR "comxhw: Invalid irq number\n");
- dev->irq = 0;
- }
- if ((ch->twin = comx_twin_check(dev)) != NULL) {
- struct comx_channel *twin_ch = ch->twin->priv;
- twin_ch->twin = dev;
- }
- } else if (strcmp(entry->name, FILENAME_IO) == 0) {
- dev->base_addr = simple_strtoul(page, NULL, 0);
- if ((dev->base_addr & 3) != 0 || dev->base_addr < 0x300
- || dev->base_addr > 0x3fc) {
- printk(KERN_ERR "Invalid io value\n");
- dev->base_addr = 0;
- }
- if ((ch->twin = comx_twin_check(dev)) != NULL) {
- struct comx_channel *twin_ch = ch->twin->priv;
-
- twin_ch->twin = dev;
- }
- } else if (strcmp(entry->name, FILENAME_MEMADDR) == 0) {
- dev->mem_start = simple_strtoul(page, NULL, 0);
- if (dev->mem_start <= 0xf000 && dev->mem_start >= 0xa000) {
- dev->mem_start *= 16;
- }
- if ((dev->mem_start & 0xfff) != 0 || dev->mem_start < COMX_MEM_MIN
- || dev->mem_start + hw->memory_size > COMX_MEM_MAX) {
- printk(KERN_ERR "Invalid memory page\n");
- dev->mem_start = 0;
- }
- dev->mem_end = dev->mem_start + hw->memory_size;
- if ((ch->twin = comx_twin_check(dev)) != NULL) {
- struct comx_channel *twin_ch = ch->twin->priv;
-
- twin_ch->twin = dev;
- }
- } else if (strcmp(entry->name, FILENAME_CLOCK) == 0) {
- if (strncmp("ext", page, 3) == 0) {
- hw->clock = 0;
- } else {
- int kbps;
-
- kbps = simple_strtoul(page, NULL, 0);
- hw->clock = kbps ? COMX_CLOCK_CONST/kbps : 0;
- }
- }
-out:
- free_page((unsigned long)page);
- return count;
-}
-
-static int comxhw_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- struct proc_dir_entry *file = (struct proc_dir_entry *)data;
- struct net_device *dev = file->parent->data;
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw = ch->HW_privdata;
- int len = 0;
-
-
- if (strcmp(file->name, FILENAME_IO) == 0) {
- len = sprintf(page, "0x%03x\n", (unsigned int)dev->base_addr);
- } else if (strcmp(file->name, FILENAME_IRQ) == 0) {
- len = sprintf(page, "0x%02x\n", dev->irq == 9 ? 2 : dev->irq);
- } else if (strcmp(file->name, FILENAME_CHANNEL) == 0) {
- len = sprintf(page, "%01d\n", hw->channel);
- } else if (strcmp(file->name, FILENAME_MEMADDR) == 0) {
- len = sprintf(page, "0x%05x\n", (unsigned int)dev->mem_start);
- } else if (strcmp(file->name, FILENAME_TWIN) == 0) {
- len = sprintf(page, "%s\n", ch->twin ? ch->twin->name : "none");
- } else if (strcmp(file->name, FILENAME_CLOCK) == 0) {
- if (hw->clock) {
- len = sprintf(page, "%-8d\n", COMX_CLOCK_CONST/hw->clock);
- } else {
- len = sprintf(page, "external\n");
- }
- } else if (strcmp(file->name, FILENAME_FIRMWARE) == 0) {
- len = min_t(int, FILE_PAGESIZE,
- min_t(int, count,
- hw->firmware ?
- (hw->firmware->len - off) : 0));
- if (len < 0) {
- len = 0;
- }
- *start = hw->firmware ? (hw->firmware->data + off) : NULL;
- if (off + len >= (hw->firmware ? hw->firmware->len : 0) || len == 0) {
- *eof = 1;
- }
- return len;
- }
-
- if (off >= len) {
- *eof = 1;
- return 0;
- }
-
- *start = page + off;
- if (count >= len - off) {
- *eof = 1;
- }
- return min_t(int, count, len - off);
-}
-
-/* Called on echo comx >boardtype */
-static int COMX_init(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw;
- struct proc_dir_entry *new_file;
-
- if ((ch->HW_privdata = kmalloc(sizeof(struct comx_privdata),
- GFP_KERNEL)) == NULL) {
- return -ENOMEM;
- }
- memset(hw = ch->HW_privdata, 0, sizeof(struct comx_privdata));
-
- if (ch->hardware == &comx_hw || ch->hardware == &cmx_hw) {
- hw->memory_size = COMX_MEMORY_SIZE;
- hw->io_extent = COMX_IO_EXTENT;
- dev->base_addr = COMX_DEFAULT_IO;
- dev->irq = COMX_DEFAULT_IRQ;
- dev->mem_start = COMX_DEFAULT_MEMADDR;
- dev->mem_end = COMX_DEFAULT_MEMADDR + COMX_MEMORY_SIZE;
- } else if (ch->hardware == &hicomx_hw) {
- hw->memory_size = HICOMX_MEMORY_SIZE;
- hw->io_extent = HICOMX_IO_EXTENT;
- dev->base_addr = HICOMX_DEFAULT_IO;
- dev->irq = HICOMX_DEFAULT_IRQ;
- dev->mem_start = HICOMX_DEFAULT_MEMADDR;
- dev->mem_end = HICOMX_DEFAULT_MEMADDR + HICOMX_MEMORY_SIZE;
- } else {
- printk(KERN_ERR "SERIOUS INTERNAL ERROR in %s, line %d\n", __FILE__, __LINE__);
- }
-
- if ((new_file = create_proc_entry(FILENAME_IO, S_IFREG | 0644, ch->procdir))
- == NULL) {
- goto cleanup_HW_privdata;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &comxhw_read_proc;
- new_file->write_proc = &comxhw_write_proc;
- new_file->size = 6;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_IRQ, S_IFREG | 0644, ch->procdir))
- == NULL) {
- goto cleanup_filename_io;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &comxhw_read_proc;
- new_file->write_proc = &comxhw_write_proc;
- new_file->size = 5;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_CHANNEL, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_filename_irq;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &comxhw_read_proc;
- new_file->write_proc = &comxhw_write_proc;
- new_file->size = 2; // Ezt tudjuk
- new_file->nlink = 1;
-
- if (ch->hardware == &hicomx_hw || ch->hardware == &cmx_hw) {
- if ((new_file = create_proc_entry(FILENAME_CLOCK, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_filename_channel;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &comxhw_read_proc;
- new_file->write_proc = &comxhw_write_proc;
- new_file->size = 9;
- new_file->nlink = 1;
- }
-
- if ((new_file = create_proc_entry(FILENAME_MEMADDR, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_filename_clock;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &comxhw_read_proc;
- new_file->write_proc = &comxhw_write_proc;
- new_file->size = 8;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_TWIN, S_IFREG | 0444,
- ch->procdir)) == NULL) {
- goto cleanup_filename_memaddr;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &comxhw_read_proc;
- new_file->write_proc = NULL;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_FIRMWARE, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_filename_twin;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &comxhw_read_proc;
- new_file->write_proc = &comxhw_write_proc;
- new_file->nlink = 1;
-
- if (ch->hardware == &comx_hw) {
- ch->HW_board_on = COMX_board_on;
- ch->HW_board_off = COMX_board_off;
- ch->HW_load_board = COMX_load_board;
- } else if (ch->hardware == &cmx_hw) {
- ch->HW_board_on = COMX_board_on;
- ch->HW_board_off = COMX_board_off;
- ch->HW_load_board = CMX_load_board;
- ch->HW_set_clock = COMX_set_clock;
- } else if (ch->hardware == &hicomx_hw) {
- ch->HW_board_on = HICOMX_board_on;
- ch->HW_board_off = HICOMX_board_off;
- ch->HW_load_board = HICOMX_load_board;
- ch->HW_set_clock = COMX_set_clock;
- } else {
- printk(KERN_ERR "SERIOUS INTERNAL ERROR in %s, line %d\n", __FILE__, __LINE__);
- }
-
- ch->HW_access_board = COMX_access_board;
- ch->HW_release_board = COMX_release_board;
- ch->HW_txe = COMX_txe;
- ch->HW_open = COMX_open;
- ch->HW_close = COMX_close;
- ch->HW_send_packet = COMX_send_packet;
- ch->HW_statistics = COMX_statistics;
-
- if ((ch->twin = comx_twin_check(dev)) != NULL) {
- struct comx_channel *twin_ch = ch->twin->priv;
-
- twin_ch->twin = dev;
- }
-
- MOD_INC_USE_COUNT;
- return 0;
-
-cleanup_filename_twin:
- remove_proc_entry(FILENAME_TWIN, ch->procdir);
-cleanup_filename_memaddr:
- remove_proc_entry(FILENAME_MEMADDR, ch->procdir);
-cleanup_filename_clock:
- if (ch->hardware == &hicomx_hw || ch->hardware == &cmx_hw)
- remove_proc_entry(FILENAME_CLOCK, ch->procdir);
-cleanup_filename_channel:
- remove_proc_entry(FILENAME_CHANNEL, ch->procdir);
-cleanup_filename_irq:
- remove_proc_entry(FILENAME_IRQ, ch->procdir);
-cleanup_filename_io:
- remove_proc_entry(FILENAME_IO, ch->procdir);
-cleanup_HW_privdata:
- kfree(ch->HW_privdata);
- return -EIO;
-}
-
-/* Called on echo valami >boardtype */
-static int COMX_exit(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct comx_privdata *hw = ch->HW_privdata;
-
- if (hw->firmware) {
- if (hw->firmware->data) kfree(hw->firmware->data);
- kfree(hw->firmware);
- } if (ch->twin) {
- struct comx_channel *twin_ch = ch->twin->priv;
-
- twin_ch->twin = NULL;
- }
-
- kfree(ch->HW_privdata);
- remove_proc_entry(FILENAME_IO, ch->procdir);
- remove_proc_entry(FILENAME_IRQ, ch->procdir);
- remove_proc_entry(FILENAME_CHANNEL, ch->procdir);
- remove_proc_entry(FILENAME_MEMADDR, ch->procdir);
- remove_proc_entry(FILENAME_FIRMWARE, ch->procdir);
- remove_proc_entry(FILENAME_TWIN, ch->procdir);
- if (ch->hardware == &hicomx_hw || ch->hardware == &cmx_hw) {
- remove_proc_entry(FILENAME_CLOCK, ch->procdir);
- }
-
- MOD_DEC_USE_COUNT;
- return 0;
-}
-
-static int COMX_dump(struct net_device *dev)
-{
- printk(KERN_INFO "%s: COMX_dump called, why ?\n", dev->name);
- return 0;
-}
-
-static struct comx_hardware comx_hw = {
- "comx",
- VERSION,
- COMX_init,
- COMX_exit,
- COMX_dump,
- NULL
-};
-
-static struct comx_hardware cmx_hw = {
- "cmx",
- VERSION,
- COMX_init,
- COMX_exit,
- COMX_dump,
- NULL
-};
-
-static struct comx_hardware hicomx_hw = {
- "hicomx",
- VERSION,
- COMX_init,
- COMX_exit,
- COMX_dump,
- NULL
-};
-
-static int __init comx_hw_comx_init(void)
-{
- comx_register_hardware(&comx_hw);
- comx_register_hardware(&cmx_hw);
- comx_register_hardware(&hicomx_hw);
- return 0;
-}
-
-static void __exit comx_hw_comx_exit(void)
-{
- comx_unregister_hardware("comx");
- comx_unregister_hardware("cmx");
- comx_unregister_hardware("hicomx");
-}
-
-module_init(comx_hw_comx_init);
-module_exit(comx_hw_comx_exit);
+++ /dev/null
-/*
- * Hardware driver for the LoCOMX card, using the generic z85230
- * functions
- *
- * Author: Gergely Madarasz <gorgo@itc.hu>
- *
- * Based on skeleton code and old LoCOMX driver by Tivadar Szemethy <tiv@itc.hu>
- * and the hostess_sv11 driver
- *
- * Contributors:
- * Arnaldo Carvalho de Melo <acme@conectiva.com.br> (0.14)
- *
- * Copyright (C) 1999 ITConsult-Pro Co. <info@itc.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Version 0.10 (99/06/17):
- * - rewritten for the z85230 layer
- *
- * Version 0.11 (99/06/21):
- * - some printk's fixed
- * - get rid of a memory leak (it was impossible though :))
- *
- * Version 0.12 (99/07/07):
- * - check CTS for modem lines, not DCD (which is always high
- * in case of this board)
- * Version 0.13 (99/07/08):
- * - Fix the transmitter status check
- * - Handle the net device statistics better
- * Version 0.14 (00/08/15):
- * - resource release on failure at LOCOMX_init
- */
-
-#define VERSION "0.14"
-
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/netdevice.h>
-#include <linux/proc_fs.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-
-#include <asm/types.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
-#include <asm/dma.h>
-
-#include "comx.h"
-#include "z85230.h"
-
-MODULE_AUTHOR("Gergely Madarasz <gorgo@itc.hu>");
-MODULE_DESCRIPTION("Hardware driver for the LoCOMX board");
-MODULE_LICENSE("GPL");
-
-#define RX_DMA 3
-#define TX_DMA 1
-#define LOCOMX_ID 0x33
-#define LOCOMX_IO_EXTENT 8
-#define LOCOMX_DEFAULT_IO 0x368
-#define LOCOMX_DEFAULT_IRQ 7
-
-u8 z8530_locomx[] = {
- 11, TCRTxCP,
- 14, DTRREQ,
- 255
-};
-
-struct locomx_data {
- int io_extent;
- struct z8530_dev board;
- struct timer_list status_timer;
-};
-
-static int LOCOMX_txe(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct locomx_data *hw = ch->HW_privdata;
-
- return (!hw->board.chanA.tx_next_skb);
-}
-
-
-static void locomx_rx(struct z8530_channel *c, struct sk_buff *skb)
-{
- struct net_device *dev = c->netdevice;
- struct comx_channel *ch = netdev_priv(dev);
-
- if (ch->debug_flags & DEBUG_HW_RX) {
- comx_debug_skb(dev, skb, "locomx_rx receiving");
- }
- ch->LINE_rx(dev,skb);
-}
-
-static int LOCOMX_send_packet(struct net_device *dev, struct sk_buff *skb)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct locomx_data *hw = ch->HW_privdata;
-
- if (ch->debug_flags & DEBUG_HW_TX) {
- comx_debug_bytes(dev, skb->data, skb->len, "LOCOMX_send_packet");
- }
-
- if (!(ch->line_status & LINE_UP)) {
- return FRAME_DROPPED;
- }
-
- if(z8530_queue_xmit(&hw->board.chanA,skb)) {
- printk(KERN_WARNING "%s: FRAME_DROPPED\n",dev->name);
- return FRAME_DROPPED;
- }
-
- if (ch->debug_flags & DEBUG_HW_TX) {
- comx_debug(dev, "%s: LOCOMX_send_packet was successful\n\n", dev->name);
- }
-
- if(!hw->board.chanA.tx_next_skb) {
- return FRAME_QUEUED;
- } else {
- return FRAME_ACCEPTED;
- }
-}
-
-static void locomx_status_timerfun(unsigned long d)
-{
- struct net_device *dev = (struct net_device *)d;
- struct comx_channel *ch = netdev_priv(dev);
- struct locomx_data *hw = ch->HW_privdata;
-
- if(!(ch->line_status & LINE_UP) &&
- (hw->board.chanA.status & CTS)) {
- ch->LINE_status(dev, ch->line_status | LINE_UP);
- }
- if((ch->line_status & LINE_UP) &&
- !(hw->board.chanA.status & CTS)) {
- ch->LINE_status(dev, ch->line_status & ~LINE_UP);
- }
- mod_timer(&hw->status_timer,jiffies + ch->lineup_delay * HZ);
-}
-
-
-static int LOCOMX_open(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct locomx_data *hw = ch->HW_privdata;
- struct proc_dir_entry *procfile = ch->procdir->subdir;
- unsigned long flags;
- int ret;
-
- if (!dev->base_addr || !dev->irq) {
- return -ENODEV;
- }
-
- if (!request_region(dev->base_addr, hw->io_extent, dev->name)) {
- return -EAGAIN;
- }
-
- hw->board.chanA.ctrlio=dev->base_addr + 5;
- hw->board.chanA.dataio=dev->base_addr + 7;
-
- hw->board.irq=dev->irq;
- hw->board.chanA.netdevice=dev;
- hw->board.chanA.dev=&hw->board;
- hw->board.name=dev->name;
- hw->board.chanA.txdma=TX_DMA;
- hw->board.chanA.rxdma=RX_DMA;
- hw->board.chanA.irqs=&z8530_nop;
- hw->board.chanB.irqs=&z8530_nop;
-
- if(request_irq(dev->irq, z8530_interrupt, SA_INTERRUPT,
- dev->name, &hw->board)) {
- printk(KERN_ERR "%s: unable to obtain irq %d\n", dev->name,
- dev->irq);
- ret=-EAGAIN;
- goto irq_fail;
- }
- if(request_dma(TX_DMA,"LoCOMX (TX)")) {
- printk(KERN_ERR "%s: unable to obtain TX DMA (DMA channel %d)\n",
- dev->name, TX_DMA);
- ret=-EAGAIN;
- goto dma1_fail;
- }
-
- if(request_dma(RX_DMA,"LoCOMX (RX)")) {
- printk(KERN_ERR "%s: unable to obtain RX DMA (DMA channel %d)\n",
- dev->name, RX_DMA);
- ret=-EAGAIN;
- goto dma2_fail;
- }
-
- save_flags(flags);
- cli();
-
- if(z8530_init(&hw->board)!=0)
- {
- printk(KERN_ERR "%s: Z8530 device not found.\n",dev->name);
- ret=-ENODEV;
- goto z8530_fail;
- }
-
- hw->board.chanA.dcdcheck=CTS;
-
- z8530_channel_load(&hw->board.chanA, z8530_hdlc_kilostream_85230);
- z8530_channel_load(&hw->board.chanA, z8530_locomx);
- z8530_channel_load(&hw->board.chanB, z8530_dead_port);
-
- z8530_describe(&hw->board, "I/O", dev->base_addr);
-
- if((ret=z8530_sync_dma_open(dev, &hw->board.chanA))!=0) {
- goto z8530_fail;
- }
-
- restore_flags(flags);
-
-
- hw->board.active=1;
- hw->board.chanA.rx_function=locomx_rx;
-
- ch->init_status |= HW_OPEN;
- if (hw->board.chanA.status & DCD) {
- ch->line_status |= LINE_UP;
- } else {
- ch->line_status &= ~LINE_UP;
- }
-
- comx_status(dev, ch->line_status);
-
- init_timer(&hw->status_timer);
- hw->status_timer.function=locomx_status_timerfun;
- hw->status_timer.data=(unsigned long)dev;
- hw->status_timer.expires=jiffies + ch->lineup_delay * HZ;
- add_timer(&hw->status_timer);
-
- for (; procfile ; procfile = procfile->next) {
- if (strcmp(procfile->name, FILENAME_IO) == 0 ||
- strcmp(procfile->name, FILENAME_IRQ) == 0) {
- procfile->mode = S_IFREG | 0444;
- }
- }
- return 0;
-
-z8530_fail:
- restore_flags(flags);
- free_dma(RX_DMA);
-dma2_fail:
- free_dma(TX_DMA);
-dma1_fail:
- free_irq(dev->irq, &hw->board);
-irq_fail:
- release_region(dev->base_addr, hw->io_extent);
- return ret;
-}
-
-static int LOCOMX_close(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct locomx_data *hw = ch->HW_privdata;
- struct proc_dir_entry *procfile = ch->procdir->subdir;
-
- hw->board.chanA.rx_function=z8530_null_rx;
- netif_stop_queue(dev);
- z8530_sync_dma_close(dev, &hw->board.chanA);
-
- z8530_shutdown(&hw->board);
-
- del_timer(&hw->status_timer);
- free_dma(RX_DMA);
- free_dma(TX_DMA);
- free_irq(dev->irq,&hw->board);
- release_region(dev->base_addr,8);
-
- for (; procfile ; procfile = procfile->next) {
- if (strcmp(procfile->name, FILENAME_IO) == 0 ||
- strcmp(procfile->name, FILENAME_IRQ) == 0) {
- procfile->mode = S_IFREG | 0644;
- }
- }
-
- ch->init_status &= ~HW_OPEN;
- return 0;
-}
-
-static int LOCOMX_statistics(struct net_device *dev,char *page)
-{
- int len = 0;
-
- len += sprintf(page + len, "Hello\n");
-
- return len;
-}
-
-static int LOCOMX_dump(struct net_device *dev) {
- printk(KERN_INFO "LOCOMX_dump called\n");
- return(-1);
-}
-
-static int locomx_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- struct proc_dir_entry *file = (struct proc_dir_entry *)data;
- struct net_device *dev = file->parent->data;
- int len = 0;
-
- if (strcmp(file->name, FILENAME_IO) == 0) {
- len = sprintf(page, "0x%x\n", (unsigned int)dev->base_addr);
- } else if (strcmp(file->name, FILENAME_IRQ) == 0) {
- len = sprintf(page, "%d\n", (unsigned int)dev->irq);
- } else {
- printk(KERN_ERR "hw_read_proc: internal error, filename %s\n",
- file->name);
- return -EBADF;
- }
-
- if (off >= len) {
- *eof = 1;
- return 0;
- }
-
- *start = page + off;
- if (count >= len - off) {
- *eof = 1;
- }
- return min_t(int, count, len - off);
-}
-
-static int locomx_write_proc(struct file *file, const char *buffer,
- u_long count, void *data)
-{
- struct proc_dir_entry *entry = (struct proc_dir_entry *)data;
- struct net_device *dev = (struct net_device *)entry->parent->data;
- int val;
- char *page;
-
- if (!(page = (char *)__get_free_page(GFP_KERNEL))) {
- return -ENOMEM;
- }
-
- if (copy_from_user(page, buffer, count = min_t(unsigned long, count, PAGE_SIZE))) {
- free_page((unsigned long)page);
- return -EBADF;
- }
- if (*(page + count - 1) == '\n') {
- *(page + count - 1) = 0;
- }
-
- if (strcmp(entry->name, FILENAME_IO) == 0) {
- val = simple_strtoul(page, NULL, 0);
- if (val != 0x360 && val != 0x368 && val != 0x370 &&
- val != 0x378) {
- printk(KERN_ERR "LoCOMX: incorrect io address!\n");
- } else {
- dev->base_addr = val;
- }
- } else if (strcmp(entry->name, FILENAME_IRQ) == 0) {
- val = simple_strtoul(page, NULL, 0);
- if (val != 3 && val != 4 && val != 5 && val != 6 && val != 7) {
- printk(KERN_ERR "LoCOMX: incorrect irq value!\n");
- } else {
- dev->irq = val;
- }
- } else {
- printk(KERN_ERR "locomx_write_proc: internal error, filename %s\n",
- entry->name);
- free_page((unsigned long)page);
- return -EBADF;
- }
-
- free_page((unsigned long)page);
- return count;
-}
-
-
-
-static int LOCOMX_init(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct locomx_data *hw;
- struct proc_dir_entry *new_file;
-
- /* Alloc data for private structure */
- if ((ch->HW_privdata = kmalloc(sizeof(struct locomx_data),
- GFP_KERNEL)) == NULL) {
- return -ENOMEM;
- }
-
- memset(hw = ch->HW_privdata, 0, sizeof(struct locomx_data));
- hw->io_extent = LOCOMX_IO_EXTENT;
-
- /* Register /proc files */
- if ((new_file = create_proc_entry(FILENAME_IO, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_HW_privdata;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &locomx_read_proc;
- new_file->write_proc = &locomx_write_proc;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_IRQ, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_filename_io;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &locomx_read_proc;
- new_file->write_proc = &locomx_write_proc;
- new_file->nlink = 1;
-
-/* No clock yet */
-/*
- if ((new_file = create_proc_entry(FILENAME_CLOCK, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- return -EIO;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &locomx_read_proc;
- new_file->write_proc = &locomx_write_proc;
- new_file->nlink = 1;
-*/
-
- ch->HW_access_board = NULL;
- ch->HW_release_board = NULL;
- ch->HW_txe = LOCOMX_txe;
- ch->HW_open = LOCOMX_open;
- ch->HW_close = LOCOMX_close;
- ch->HW_send_packet = LOCOMX_send_packet;
- ch->HW_statistics = LOCOMX_statistics;
- ch->HW_set_clock = NULL;
-
- ch->current_stats = &hw->board.chanA.stats;
- memcpy(ch->current_stats, &ch->stats, sizeof(struct net_device_stats));
-
- dev->base_addr = LOCOMX_DEFAULT_IO;
- dev->irq = LOCOMX_DEFAULT_IRQ;
-
-
- /* O.K. Count one more user on this module */
- MOD_INC_USE_COUNT;
- return 0;
-cleanup_filename_io:
- remove_proc_entry(FILENAME_IO, ch->procdir);
-cleanup_HW_privdata:
- kfree(ch->HW_privdata);
- return -EIO;
-}
-
-
-static int LOCOMX_exit(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
-
- ch->HW_access_board = NULL;
- ch->HW_release_board = NULL;
- ch->HW_txe = NULL;
- ch->HW_open = NULL;
- ch->HW_close = NULL;
- ch->HW_send_packet = NULL;
- ch->HW_statistics = NULL;
- ch->HW_set_clock = NULL;
- memcpy(&ch->stats, ch->current_stats, sizeof(struct net_device_stats));
- ch->current_stats = &ch->stats;
-
- kfree(ch->HW_privdata);
-
- remove_proc_entry(FILENAME_IO, ch->procdir);
- remove_proc_entry(FILENAME_IRQ, ch->procdir);
-// remove_proc_entry(FILENAME_CLOCK, ch->procdir);
-
- MOD_DEC_USE_COUNT;
- return 0;
-}
-
-static struct comx_hardware locomx_hw = {
- "locomx",
- VERSION,
- LOCOMX_init,
- LOCOMX_exit,
- LOCOMX_dump,
- NULL
-};
-
-static int __init comx_hw_locomx_init(void)
-{
- comx_register_hardware(&locomx_hw);
- return 0;
-}
-
-static void __exit comx_hw_locomx_exit(void)
-{
- comx_unregister_hardware("locomx");
-}
-
-module_init(comx_hw_locomx_init);
-module_exit(comx_hw_locomx_exit);
+++ /dev/null
-/*
- * Hardware driver for the MixCom synchronous serial board
- *
- * Author: Gergely Madarasz <gorgo@itc.hu>
- *
- * based on skeleton driver code and a preliminary hscx driver by
- * Tivadar Szemethy <tiv@itc.hu>
- *
- * Copyright (C) 1998-1999 ITConsult-Pro Co. <info@itc.hu>
- *
- * Contributors:
- * Arnaldo Carvalho de Melo <acme@conectiva.com.br> (0.65)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Version 0.60 (99/06/11):
- * - ported to the kernel, now works as builtin code
- *
- * Version 0.61 (99/06/11):
- * - recognize the one-channel MixCOM card (id byte = 0x13)
- * - printk fixes
- *
- * Version 0.62 (99/07/15):
- * - fixes according to the new hw docs
- * - report line status when open
- *
- * Version 0.63 (99/09/21):
- * - line status report fixes
- *
- * Version 0.64 (99/12/01):
- * - some more cosmetical fixes
- *
- * Version 0.65 (00/08/15)
- * - resource release on failure at MIXCOM_init
- */
-
-#define VERSION "0.65"
-
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/netdevice.h>
-#include <linux/proc_fs.h>
-#include <linux/ioport.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-
-#include <asm/types.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
-
-#include "comx.h"
-#include "mixcom.h"
-#include "hscx.h"
-
-MODULE_AUTHOR("Gergely Madarasz <gorgo@itc.hu>");
-MODULE_DESCRIPTION("Hardware-level driver for the serial port of the MixCom board");
-MODULE_LICENSE("GPL");
-
-#define MIXCOM_DATA(d) ((struct mixcom_privdata *)(COMX_CHANNEL(d)-> \
- HW_privdata))
-
-#define MIXCOM_BOARD_BASE(d) (d->base_addr - MIXCOM_SERIAL_OFFSET - \
- (1 - MIXCOM_DATA(d)->channel) * MIXCOM_CHANNEL_OFFSET)
-
-#define MIXCOM_DEV_BASE(port,channel) (port + MIXCOM_SERIAL_OFFSET + \
- (1 - channel) * MIXCOM_CHANNEL_OFFSET)
-
-/* Values used to set the IRQ line */
-static unsigned char mixcom_set_irq[]={0xFF, 0xFF, 0xFF, 0x0, 0xFF, 0x2, 0x4, 0x6, 0xFF, 0xFF, 0x8, 0xA, 0xC, 0xFF, 0xE, 0xFF};
-
-static unsigned char* hscx_versions[]={"A1", NULL, "A2", NULL, "A3", "2.1"};
-
-struct mixcom_privdata {
- u16 clock;
- char channel;
- long txbusy;
- struct sk_buff *sending;
- unsigned tx_ptr;
- struct sk_buff *recving;
- unsigned rx_ptr;
- unsigned char status;
- char card_has_status;
-};
-
-static inline void wr_hscx(struct net_device *dev, int reg, unsigned char val)
-{
- outb(val, dev->base_addr + reg);
-}
-
-static inline unsigned char rd_hscx(struct net_device *dev, int reg)
-{
- return inb(dev->base_addr + reg);
-}
-
-static inline void hscx_cmd(struct net_device *dev, int cmd)
-{
- unsigned long jiffs = jiffies;
- unsigned char cec;
- unsigned delay = 0;
-
- while ((cec = (rd_hscx(dev, HSCX_STAR) & HSCX_CEC) != 0) &&
- time_before(jiffies, jiffs + HZ)) {
- udelay(1);
- if (++delay > (100000 / HZ)) break;
- }
- if (cec) {
- printk(KERN_WARNING "%s: CEC stuck, probably no clock!\n",dev->name);
- } else {
- wr_hscx(dev, HSCX_CMDR, cmd);
- }
-}
-
-static inline void hscx_fill_fifo(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct mixcom_privdata *hw = ch->HW_privdata;
- register word to_send = hw->sending->len - hw->tx_ptr;
-
-
- outsb(dev->base_addr + HSCX_FIFO,
- &(hw->sending->data[hw->tx_ptr]), min_t(unsigned int, to_send, 32));
- if (to_send <= 32) {
- hscx_cmd(dev, HSCX_XTF | HSCX_XME);
- kfree_skb(hw->sending);
- hw->sending = NULL;
- hw->tx_ptr = 0;
- } else {
- hscx_cmd(dev, HSCX_XTF);
- hw->tx_ptr += 32;
- }
-}
-
-static inline void hscx_empty_fifo(struct net_device *dev, int cnt)
-{
- struct comx_channel *ch = dev->priv;
- struct mixcom_privdata *hw = ch->HW_privdata;
-
- if (hw->recving == NULL) {
- if (!(hw->recving = dev_alloc_skb(HSCX_MTU + 16))) {
- ch->stats.rx_dropped++;
- hscx_cmd(dev, HSCX_RHR);
- } else {
- skb_reserve(hw->recving, 16);
- skb_put(hw->recving, HSCX_MTU);
- }
- hw->rx_ptr = 0;
- }
- if (cnt > 32 || !cnt || hw->recving == NULL) {
- printk(KERN_ERR "hscx_empty_fifo: cnt is %d, hw->recving %p\n",
- cnt, (void *)hw->recving);
- return;
- }
-
- insb(dev->base_addr + HSCX_FIFO, &(hw->recving->data[hw->rx_ptr]),cnt);
- hw->rx_ptr += cnt;
- hscx_cmd(dev, HSCX_RMC);
-}
-
-
-static int MIXCOM_txe(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct mixcom_privdata *hw = ch->HW_privdata;
-
- return !test_bit(0, &hw->txbusy);
-}
-
-static int mixcom_probe(struct net_device *dev)
-{
- unsigned long flags;
- int id, vstr, ret=0;
-
- save_flags(flags); cli();
-
- id=inb_p(MIXCOM_BOARD_BASE(dev) + MIXCOM_ID_OFFSET) & 0x7f;
-
- if (id != MIXCOM_ID ) {
- ret=-ENODEV;
- printk(KERN_WARNING "%s: no MixCOM board found at 0x%04lx\n",dev->name, dev->base_addr);
- goto out;
- }
-
- vstr=inb_p(dev->base_addr + HSCX_VSTR) & 0x0f;
- if(vstr>=sizeof(hscx_versions)/sizeof(char*) ||
- hscx_versions[vstr]==NULL) {
- printk(KERN_WARNING "%s: board found but no HSCX chip detected at 0x%4lx (vstr = 0x%1x)\n",dev->name,dev->base_addr,vstr);
- ret = -ENODEV;
- } else {
- printk(KERN_INFO "%s: HSCX chip version %s\n",dev->name,hscx_versions[vstr]);
- ret = 0;
- }
-
-out:
-
- restore_flags(flags);
- return ret;
-}
-
-#if 0
-static void MIXCOM_set_clock(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct mixcom_privdata *hw = ch->HW_privdata;
-
- if (hw->clock) {
- ;
- } else {
- ;
- }
-}
-#endif
-
-static void mixcom_board_on(struct net_device *dev)
-{
- outb_p(MIXCOM_OFF , MIXCOM_BOARD_BASE(dev) + MIXCOM_IT_OFFSET);
- udelay(1000);
- outb_p(mixcom_set_irq[dev->irq] | MIXCOM_ON,
- MIXCOM_BOARD_BASE(dev) + MIXCOM_IT_OFFSET);
- udelay(1000);
-}
-
-static void mixcom_board_off(struct net_device *dev)
-{
- outb_p(MIXCOM_OFF , MIXCOM_BOARD_BASE(dev) + MIXCOM_IT_OFFSET);
- udelay(1000);
-}
-
-static void mixcom_off(struct net_device *dev)
-{
- wr_hscx(dev, HSCX_CCR1, 0x0);
-}
-
-static void mixcom_on(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
-
- wr_hscx(dev, HSCX_CCR1, HSCX_PU | HSCX_ODS | HSCX_ITF); // power up, push-pull
- wr_hscx(dev, HSCX_CCR2, HSCX_CIE /* | HSCX_RIE */ );
- wr_hscx(dev, HSCX_MODE, HSCX_TRANS | HSCX_ADM8 | HSCX_RAC | HSCX_RTS );
- wr_hscx(dev, HSCX_RLCR, HSCX_RC | 47); // 1504 bytes
- wr_hscx(dev, HSCX_MASK, HSCX_RSC | HSCX_TIN );
- hscx_cmd(dev, HSCX_XRES | HSCX_RHR);
-
- if (ch->HW_set_clock) ch->HW_set_clock(dev);
-
-}
-
-static int MIXCOM_send_packet(struct net_device *dev, struct sk_buff *skb)
-{
- struct comx_channel *ch = dev->priv;
- struct mixcom_privdata *hw = ch->HW_privdata;
- unsigned long flags;
-
- if (ch->debug_flags & DEBUG_HW_TX) {
- comx_debug_bytes(dev, skb->data, skb->len, "MIXCOM_send_packet");
- }
-
- if (!(ch->line_status & LINE_UP)) {
- return FRAME_DROPPED;
- }
-
- if (skb->len > HSCX_MTU) {
- ch->stats.tx_errors++;
- return FRAME_ERROR;
- }
-
- save_flags(flags); cli();
-
- if (test_and_set_bit(0, &hw->txbusy)) {
- printk(KERN_ERR "%s: transmitter called while busy... dropping frame (length %d)\n", dev->name, skb->len);
- restore_flags(flags);
- return FRAME_DROPPED;
- }
-
-
- hw->sending = skb;
- hw->tx_ptr = 0;
- hw->txbusy = 1;
-// atomic_inc(&skb->users); // save it
- hscx_fill_fifo(dev);
- restore_flags(flags);
-
- ch->stats.tx_packets++;
- ch->stats.tx_bytes += skb->len;
-
- if (ch->debug_flags & DEBUG_HW_TX) {
- comx_debug(dev, "MIXCOM_send_packet was successful\n\n");
- }
-
- return FRAME_ACCEPTED;
-}
-
-static inline void mixcom_receive_frame(struct net_device *dev)
-{
- struct comx_channel *ch=dev->priv;
- struct mixcom_privdata *hw=ch->HW_privdata;
- register byte rsta;
- register word length;
-
- rsta = rd_hscx(dev, HSCX_RSTA) & (HSCX_VFR | HSCX_RDO |
- HSCX_CRC | HSCX_RAB);
- length = ((rd_hscx(dev, HSCX_RBCH) & 0x0f) << 8) |
- rd_hscx(dev, HSCX_RBCL);
-
- if ( length > hw->rx_ptr ) {
- hscx_empty_fifo(dev, length - hw->rx_ptr);
- }
-
- if (!(rsta & HSCX_VFR)) {
- ch->stats.rx_length_errors++;
- }
- if (rsta & HSCX_RDO) {
- ch->stats.rx_over_errors++;
- }
- if (!(rsta & HSCX_CRC)) {
- ch->stats.rx_crc_errors++;
- }
- if (rsta & HSCX_RAB) {
- ch->stats.rx_frame_errors++;
- }
- ch->stats.rx_packets++;
- ch->stats.rx_bytes += length;
-
- if (rsta == (HSCX_VFR | HSCX_CRC) && hw->recving) {
- skb_trim(hw->recving, hw->rx_ptr - 1);
- if (ch->debug_flags & DEBUG_HW_RX) {
- comx_debug_skb(dev, hw->recving,
- "MIXCOM_interrupt receiving");
- }
- hw->recving->dev = dev;
- if (ch->LINE_rx) {
- ch->LINE_rx(dev, hw->recving);
- }
- }
- else if(hw->recving) {
- kfree_skb(hw->recving);
- }
- hw->recving = NULL;
- hw->rx_ptr = 0;
-}
-
-
-static inline void mixcom_extended_interrupt(struct net_device *dev)
-{
- struct comx_channel *ch=dev->priv;
- struct mixcom_privdata *hw=ch->HW_privdata;
- register byte exir;
-
- exir = rd_hscx(dev, HSCX_EXIR) & (HSCX_XDU | HSCX_RFO | HSCX_CSC );
-
- if (exir & HSCX_RFO) {
- ch->stats.rx_over_errors++;
- if (hw->rx_ptr) {
- kfree_skb(hw->recving);
- hw->recving = NULL; hw->rx_ptr = 0;
- }
- printk(KERN_ERR "MIXCOM: rx overrun\n");
- hscx_cmd(dev, HSCX_RHR);
- }
-
- if (exir & HSCX_XDU) { // xmit underrun
- ch->stats.tx_errors++;
- ch->stats.tx_aborted_errors++;
- if (hw->tx_ptr) {
- kfree_skb(hw->sending);
- hw->sending = NULL;
- hw->tx_ptr = 0;
- }
- hscx_cmd(dev, HSCX_XRES);
- clear_bit(0, &hw->txbusy);
- if (ch->LINE_tx) {
- ch->LINE_tx(dev);
- }
- printk(KERN_ERR "MIXCOM: tx underrun\n");
- }
-
- if (exir & HSCX_CSC) {
- ch->stats.tx_carrier_errors++;
- if ((rd_hscx(dev, HSCX_STAR) & HSCX_CTS) == 0) { // Vonal le
- if (test_and_clear_bit(0, &ch->lineup_pending)) {
- del_timer(&ch->lineup_timer);
- } else if (ch->line_status & LINE_UP) {
- ch->line_status &= ~LINE_UP;
- if (ch->LINE_status) {
- ch->LINE_status(dev,ch->line_status);
- }
- }
- }
- if (!(ch->line_status & LINE_UP) && (rd_hscx(dev, HSCX_STAR) &
- HSCX_CTS)) { // Vonal fol
- if (!test_and_set_bit(0,&ch->lineup_pending)) {
- ch->lineup_timer.function = comx_lineup_func;
- ch->lineup_timer.data = (unsigned long)dev;
- ch->lineup_timer.expires = jiffies + HZ *
- ch->lineup_delay;
- add_timer(&ch->lineup_timer);
- hscx_cmd(dev, HSCX_XRES);
- clear_bit(0, &hw->txbusy);
- if (hw->sending) {
- kfree_skb(hw->sending);
- }
- hw->sending=NULL;
- hw->tx_ptr = 0;
- }
- }
- }
-}
-
-
-static irqreturn_t MIXCOM_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- unsigned long flags;
- struct net_device *dev = (struct net_device *)dev_id;
- struct comx_channel *ch, *twin_ch;
- struct mixcom_privdata *hw, *twin_hw;
- register unsigned char ista;
-
- if (dev==NULL) {
- printk(KERN_ERR "comx_interrupt: irq %d for unknown device\n",irq);
- return IRQ_NONE;
- }
-
- ch = dev->priv;
- hw = ch->HW_privdata;
-
- save_flags(flags); cli();
-
- while((ista = (rd_hscx(dev, HSCX_ISTA) & (HSCX_RME | HSCX_RPF |
- HSCX_XPR | HSCX_EXB | HSCX_EXA | HSCX_ICA)))) {
- register byte ista2 = 0;
-
- if (ista & HSCX_RME) {
- mixcom_receive_frame(dev);
- }
- if (ista & HSCX_RPF) {
- hscx_empty_fifo(dev, 32);
- }
- if (ista & HSCX_XPR) {
- if (hw->tx_ptr) {
- hscx_fill_fifo(dev);
- } else {
- clear_bit(0, &hw->txbusy);
- ch->LINE_tx(dev);
- }
- }
-
- if (ista & HSCX_EXB) {
- mixcom_extended_interrupt(dev);
- }
-
- if ((ista & HSCX_EXA) && ch->twin) {
- mixcom_extended_interrupt(ch->twin);
- }
-
- if ((ista & HSCX_ICA) && ch->twin &&
- (ista2 = rd_hscx(ch->twin, HSCX_ISTA) &
- (HSCX_RME | HSCX_RPF | HSCX_XPR ))) {
- if (ista2 & HSCX_RME) {
- mixcom_receive_frame(ch->twin);
- }
- if (ista2 & HSCX_RPF) {
- hscx_empty_fifo(ch->twin, 32);
- }
- if (ista2 & HSCX_XPR) {
- twin_ch=ch->twin->priv;
- twin_hw=twin_ch->HW_privdata;
- if (twin_hw->tx_ptr) {
- hscx_fill_fifo(ch->twin);
- } else {
- clear_bit(0, &twin_hw->txbusy);
- ch->LINE_tx(ch->twin);
- }
- }
- }
- }
-
- restore_flags(flags);
- return IRQ_HANDLED;
-}
-
-static int MIXCOM_open(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct mixcom_privdata *hw = ch->HW_privdata;
- struct proc_dir_entry *procfile = ch->procdir->subdir;
- unsigned long flags;
- int ret = -ENODEV;
-
- if (!dev->base_addr || !dev->irq)
- goto err_ret;
-
-
- if(hw->channel==1) {
- if(!TWIN(dev) || !(COMX_CHANNEL(TWIN(dev))->init_status &
- IRQ_ALLOCATED)) {
- printk(KERN_ERR "%s: channel 0 not yet initialized\n",dev->name);
- ret = -EAGAIN;
- goto err_ret;
- }
- }
-
-
- /* Is our hw present at all ? Not checking for channel 0 if it is already
- open */
- if(hw->channel!=0 || !(ch->init_status & IRQ_ALLOCATED)) {
- if (!request_region(dev->base_addr, MIXCOM_IO_EXTENT, dev->name)) {
- ret = -EAGAIN;
- goto err_ret;
- }
- if (mixcom_probe(dev)) {
- ret = -ENODEV;
- goto err_release_region;
- }
- }
-
- if(hw->channel==0 && !(ch->init_status & IRQ_ALLOCATED)) {
- if (request_irq(dev->irq, MIXCOM_interrupt, 0,
- dev->name, (void *)dev)) {
- printk(KERN_ERR "MIXCOM: unable to obtain irq %d\n", dev->irq);
- ret = -EAGAIN;
- goto err_release_region;
- }
- }
-
- save_flags(flags); cli();
-
- if(hw->channel==0 && !(ch->init_status & IRQ_ALLOCATED)) {
- ch->init_status|=IRQ_ALLOCATED;
- mixcom_board_on(dev);
- }
-
- mixcom_on(dev);
-
-
- hw->status=inb(MIXCOM_BOARD_BASE(dev) + MIXCOM_STATUS_OFFSET);
- if(hw->status != 0xff) {
- printk(KERN_DEBUG "%s: board has status register, good\n", dev->name);
- hw->card_has_status=1;
- }
-
- hw->txbusy = 0;
- ch->init_status |= HW_OPEN;
-
- if (rd_hscx(dev, HSCX_STAR) & HSCX_CTS) {
- ch->line_status |= LINE_UP;
- } else {
- ch->line_status &= ~LINE_UP;
- }
-
- restore_flags(flags);
-
- ch->LINE_status(dev, ch->line_status);
-
- for (; procfile ; procfile = procfile->next) {
- if (strcmp(procfile->name, FILENAME_IO) == 0 ||
- strcmp(procfile->name, FILENAME_CHANNEL) == 0 ||
- strcmp(procfile->name, FILENAME_CLOCK) == 0 ||
- strcmp(procfile->name, FILENAME_IRQ) == 0) {
- procfile->mode = S_IFREG | 0444;
- }
- }
-
- return 0;
-
-err_release_region:
- release_region(dev->base_addr, MIXCOM_IO_EXTENT);
-err_ret:
- return ret;
-}
-
-static int MIXCOM_close(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct mixcom_privdata *hw = ch->HW_privdata;
- struct proc_dir_entry *procfile = ch->procdir->subdir;
- unsigned long flags;
-
-
- save_flags(flags); cli();
-
- mixcom_off(dev);
-
- /* This is channel 0, twin is not open, we can safely turn off everything */
- if(hw->channel==0 && (!(TWIN(dev)) ||
- !(COMX_CHANNEL(TWIN(dev))->init_status & HW_OPEN))) {
- mixcom_board_off(dev);
- free_irq(dev->irq, dev);
- release_region(dev->base_addr, MIXCOM_IO_EXTENT);
- ch->init_status &= ~IRQ_ALLOCATED;
- }
-
- /* This is channel 1, channel 0 has already been shutdown, we can release
- this one too */
- if(hw->channel==1 && !(COMX_CHANNEL(TWIN(dev))->init_status & HW_OPEN)) {
- if(COMX_CHANNEL(TWIN(dev))->init_status & IRQ_ALLOCATED) {
- mixcom_board_off(TWIN(dev));
- free_irq(TWIN(dev)->irq, TWIN(dev));
- release_region(TWIN(dev)->base_addr, MIXCOM_IO_EXTENT);
- COMX_CHANNEL(TWIN(dev))->init_status &= ~IRQ_ALLOCATED;
- }
- }
-
- /* the ioports for channel 1 can be safely released */
- if(hw->channel==1) {
- release_region(dev->base_addr, MIXCOM_IO_EXTENT);
- }
-
- restore_flags(flags);
-
- /* If we don't hold any hardware open */
- if(!(ch->init_status & IRQ_ALLOCATED)) {
- for (; procfile ; procfile = procfile->next) {
- if (strcmp(procfile->name, FILENAME_IO) == 0 ||
- strcmp(procfile->name, FILENAME_CHANNEL) == 0 ||
- strcmp(procfile->name, FILENAME_CLOCK) == 0 ||
- strcmp(procfile->name, FILENAME_IRQ) == 0) {
- procfile->mode = S_IFREG | 0644;
- }
- }
- }
-
- /* channel 0 was only waiting for us to close channel 1
- close it completely */
-
- if(hw->channel==1 && !(COMX_CHANNEL(TWIN(dev))->init_status & HW_OPEN)) {
- for (procfile=COMX_CHANNEL(TWIN(dev))->procdir->subdir;
- procfile ; procfile = procfile->next) {
- if (strcmp(procfile->name, FILENAME_IO) == 0 ||
- strcmp(procfile->name, FILENAME_CHANNEL) == 0 ||
- strcmp(procfile->name, FILENAME_CLOCK) == 0 ||
- strcmp(procfile->name, FILENAME_IRQ) == 0) {
- procfile->mode = S_IFREG | 0644;
- }
- }
- }
-
- ch->init_status &= ~HW_OPEN;
- return 0;
-}
-
-static int MIXCOM_statistics(struct net_device *dev,char *page)
-{
- struct comx_channel *ch = dev->priv;
- // struct mixcom_privdata *hw = ch->HW_privdata;
- int len = 0;
-
- if(ch->init_status && IRQ_ALLOCATED) {
- len += sprintf(page + len, "Mixcom board: hardware open\n");
- }
-
- return len;
-}
-
-static int MIXCOM_dump(struct net_device *dev) {
- return 0;
-}
-
-static int mixcom_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- struct proc_dir_entry *file = (struct proc_dir_entry *)data;
- struct net_device *dev = file->parent->data;
- struct comx_channel *ch = dev->priv;
- struct mixcom_privdata *hw = ch->HW_privdata;
- int len = 0;
-
- if (strcmp(file->name, FILENAME_IO) == 0) {
- len = sprintf(page, "0x%x\n",
- (unsigned int)MIXCOM_BOARD_BASE(dev));
- } else if (strcmp(file->name, FILENAME_IRQ) == 0) {
- len = sprintf(page, "%d\n", (unsigned int)dev->irq);
- } else if (strcmp(file->name, FILENAME_CLOCK) == 0) {
- if (hw->clock) len = sprintf(page, "%d\n", hw->clock);
- else len = sprintf(page, "external\n");
- } else if (strcmp(file->name, FILENAME_CHANNEL) == 0) {
- len = sprintf(page, "%01d\n", hw->channel);
- } else if (strcmp(file->name, FILENAME_TWIN) == 0) {
- if (ch->twin) {
- len = sprintf(page, "%s\n",ch->twin->name);
- } else {
- len = sprintf(page, "none\n");
- }
- } else {
- printk(KERN_ERR "mixcom_read_proc: internal error, filename %s\n", file->name);
- return -EBADF;
- }
-
- if (off >= len) {
- *eof = 1;
- return 0;
- }
- *start = page + off;
- if (count >= len - off) *eof = 1;
- return min_t(int, count, len - off);
-}
-
-
-static struct net_device *mixcom_twin_check(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct proc_dir_entry *procfile = ch->procdir->parent->subdir;
- struct mixcom_privdata *hw = ch->HW_privdata;
-
- struct net_device *twin;
- struct comx_channel *ch_twin;
- struct mixcom_privdata *hw_twin;
-
-
- for ( ; procfile ; procfile = procfile->next) {
- if(!S_ISDIR(procfile->mode)) continue;
-
- twin = procfile->data;
- ch_twin = twin->priv;
- hw_twin = ch_twin->HW_privdata;
-
-
- if (twin != dev && dev->irq && dev->base_addr &&
- dev->irq == twin->irq &&
- ch->hardware == ch_twin->hardware &&
- dev->base_addr == twin->base_addr +
- (1-2*hw->channel)*MIXCOM_CHANNEL_OFFSET &&
- hw->channel == (1 - hw_twin->channel)) {
- if (!TWIN(twin) || TWIN(twin)==dev) {
- return twin;
- }
- }
- }
- return NULL;
-}
-
-
-static void setup_twin(struct net_device* dev)
-{
-
- if(TWIN(dev) && TWIN(TWIN(dev))) {
- TWIN(TWIN(dev))=NULL;
- }
- if ((TWIN(dev) = mixcom_twin_check(dev)) != NULL) {
- if (TWIN(TWIN(dev)) && TWIN(TWIN(dev)) != dev) {
- TWIN(dev)=NULL;
- } else {
- TWIN(TWIN(dev))=dev;
- }
- }
-}
-
-static int mixcom_write_proc(struct file *file, const char *buffer,
- u_long count, void *data)
-{
- struct proc_dir_entry *entry = (struct proc_dir_entry *)data;
- struct net_device *dev = (struct net_device *)entry->parent->data;
- struct comx_channel *ch = dev->priv;
- struct mixcom_privdata *hw = ch->HW_privdata;
- char *page;
- int value;
-
- if (!(page = (char *)__get_free_page(GFP_KERNEL))) {
- return -ENOMEM;
- }
-
- if (copy_from_user(page, buffer, count = min_t(unsigned long, count, PAGE_SIZE))) {
- free_page((unsigned long)page);
- return -EFAULT;
- }
- if (*(page + count - 1) == '\n') {
- *(page + count - 1) = 0;
- }
-
- if (strcmp(entry->name, FILENAME_IO) == 0) {
- value = simple_strtoul(page, NULL, 0);
- if (value != 0x180 && value != 0x280 && value != 0x380) {
- printk(KERN_ERR "MIXCOM: incorrect io address!\n");
- } else {
- dev->base_addr = MIXCOM_DEV_BASE(value,hw->channel);
- }
- } else if (strcmp(entry->name, FILENAME_IRQ) == 0) {
- value = simple_strtoul(page, NULL, 0);
- if (value < 0 || value > 15 || mixcom_set_irq[value]==0xFF) {
- printk(KERN_ERR "MIXCOM: incorrect irq value!\n");
- } else {
- dev->irq = value;
- }
- } else if (strcmp(entry->name, FILENAME_CLOCK) == 0) {
- if (strncmp("ext", page, 3) == 0) {
- hw->clock = 0;
- } else {
- int kbps;
-
- kbps = simple_strtoul(page, NULL, 0);
- if (!kbps) {
- hw->clock = 0;
- } else {
- hw->clock = kbps;
- }
- if (hw->clock < 32 || hw->clock > 2000) {
- hw->clock = 0;
- printk(KERN_ERR "MIXCOM: invalid clock rate!\n");
- }
- }
- if (ch->init_status & HW_OPEN && ch->HW_set_clock) {
- ch->HW_set_clock(dev);
- }
- } else if (strcmp(entry->name, FILENAME_CHANNEL) == 0) {
- value = simple_strtoul(page, NULL, 0);
- if (value > 2) {
- printk(KERN_ERR "Invalid channel number\n");
- } else {
- dev->base_addr+=(hw->channel - value) * MIXCOM_CHANNEL_OFFSET;
- hw->channel = value;
- }
- } else {
- printk(KERN_ERR "hw_read_proc: internal error, filename %s\n",
- entry->name);
- return -EBADF;
- }
-
- setup_twin(dev);
-
- free_page((unsigned long)page);
- return count;
-}
-
-static int MIXCOM_init(struct net_device *dev) {
- struct comx_channel *ch = dev->priv;
- struct mixcom_privdata *hw;
- struct proc_dir_entry *new_file;
-
- if ((ch->HW_privdata = kmalloc(sizeof(struct mixcom_privdata),
- GFP_KERNEL)) == NULL) {
- return -ENOMEM;
- }
-
- memset(hw = ch->HW_privdata, 0, sizeof(struct mixcom_privdata));
-
- if ((new_file = create_proc_entry(FILENAME_IO, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_HW_privdata;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &mixcom_read_proc;
- new_file->write_proc = &mixcom_write_proc;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_IRQ, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_filename_io;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &mixcom_read_proc;
- new_file->write_proc = &mixcom_write_proc;
- new_file->nlink = 1;
-
-#if 0
- if ((new_file = create_proc_entry(FILENAME_CLOCK, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- return -EIO;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &mixcom_read_proc;
- new_file->write_proc = &mixcom_write_proc;
- new_file->nlink = 1;
-#endif
-
- if ((new_file = create_proc_entry(FILENAME_CHANNEL, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_filename_irq;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &mixcom_read_proc;
- new_file->write_proc = &mixcom_write_proc;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_TWIN, S_IFREG | 0444,
- ch->procdir)) == NULL) {
- goto cleanup_filename_channel;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &mixcom_read_proc;
- new_file->write_proc = &mixcom_write_proc;
- new_file->nlink = 1;
-
- setup_twin(dev);
-
- /* Fill in ch_struct hw specific pointers */
- ch->HW_access_board = NULL;
- ch->HW_release_board = NULL;
- ch->HW_txe = MIXCOM_txe;
- ch->HW_open = MIXCOM_open;
- ch->HW_close = MIXCOM_close;
- ch->HW_send_packet = MIXCOM_send_packet;
- ch->HW_statistics = MIXCOM_statistics;
- ch->HW_set_clock = NULL;
-
- dev->base_addr = MIXCOM_DEV_BASE(MIXCOM_DEFAULT_IO,0);
- dev->irq = MIXCOM_DEFAULT_IRQ;
-
- MOD_INC_USE_COUNT;
- return 0;
-cleanup_filename_channel:
- remove_proc_entry(FILENAME_CHANNEL, ch->procdir);
-cleanup_filename_irq:
- remove_proc_entry(FILENAME_IRQ, ch->procdir);
-cleanup_filename_io:
- remove_proc_entry(FILENAME_IO, ch->procdir);
-cleanup_HW_privdata:
- kfree(ch->HW_privdata);
- return -EIO;
-}
-
-static int MIXCOM_exit(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct mixcom_privdata *hw = ch->HW_privdata;
-
- if(hw->channel==0 && TWIN(dev)) {
- return -EBUSY;
- }
-
- if(hw->channel==1 && TWIN(dev)) {
- TWIN(TWIN(dev))=NULL;
- }
-
- kfree(ch->HW_privdata);
- remove_proc_entry(FILENAME_IO, ch->procdir);
- remove_proc_entry(FILENAME_IRQ, ch->procdir);
-#if 0
- remove_proc_entry(FILENAME_CLOCK, ch->procdir);
-#endif
- remove_proc_entry(FILENAME_CHANNEL, ch->procdir);
- remove_proc_entry(FILENAME_TWIN, ch->procdir);
-
- MOD_DEC_USE_COUNT;
- return 0;
-}
-
-static struct comx_hardware mixcomhw = {
- "mixcom",
- VERSION,
- MIXCOM_init,
- MIXCOM_exit,
- MIXCOM_dump,
- NULL
-};
-
-static int __init comx_hw_mixcom_init(void)
-{
- return comx_register_hardware(&mixcomhw);
-}
-
-static void __exit comx_hw_mixcom_exit(void)
-{
- comx_unregister_hardware("mixcom");
-}
-
-module_init(comx_hw_mixcom_init);
-module_exit(comx_hw_mixcom_exit);
+++ /dev/null
-/*
- * Hardware-level driver for the SliceCOM board for Linux kernels 2.4.X
- *
- * Current maintainer / latest changes: Pasztor Szilard <don@itc.hu>
- *
- * Original author: Bartok Istvan <bartoki@itc.hu>
- * Based on skeleton by Tivadar Szemethy <tiv@itc.hu>
- *
- * 0.51:
- * - port for 2.4.x
- * - clean up some code, make it more portable
- * - busted direct hardware access through mapped memory
- * - fix a possible race
- * - prevent procfs buffer overflow
- *
- * 0.50:
- * - support for the pcicom board, lots of rearrangements
- * - handle modem status lines
- *
- * 0.50a:
- * - fix for falc version 1.0
- *
- * 0.50b: T&t
- * - fix for bad localbus
- */
-
-#define VERSION "0.51"
-#define VERSIONSTR "SliceCOM v" VERSION ", 2002/01/07\n"
-
-#include <linux/config.h>
-#include <linux/ctype.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/netdevice.h>
-#include <linux/proc_fs.h>
-#include <linux/ioport.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-
-#include <asm/delay.h>
-#include <asm/types.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
-
-#define COMX_NEW
-
-#ifndef COMX_NEW
-#include "../include/comx.h"
-#include "../include/munich32x.h"
-#include "../include/falc-lh.h"
-#else
-#include "comx.h"
-#include "munich32x.h"
-#include "falc-lh.h"
-#endif
-
-MODULE_AUTHOR("Bartok Istvan <bartoki@itc.hu>, Gergely Madarasz <gorgo@itc.hu>, Szilard Pasztor <don@itc.hu>");
-MODULE_DESCRIPTION("Hardware-level driver for the SliceCOM and PciCOM (WelCOM) adapters");
-MODULE_LICENSE("GPL");
-/*
- * TODO: az ilyenek a comxhw.h -ban szoktak lenni, idovel menjenek majd oda:
- */
-
-#define FILENAME_BOARDNUM "boardnum" /* /proc/comx/comx0.1/boardnum */
-#define FILENAME_TIMESLOTS "timeslots" /* /proc/comx/comx0.1/timeslots */
-#define FILENAME_FRAMING "framing" /* /proc/comx/comx0.1/framing */
-#define FILENAME_LINECODE "linecode" /* /proc/comx/comx0.1/linecode */
-#define FILENAME_CLOCK_SOURCE "clock_source" /* /proc/comx/comx0.1/clock_source */
-#define FILENAME_LOOPBACK "loopback" /* /proc/comx/comx0.1/loopback */
-#define FILENAME_REG "reg" /* /proc/comx/comx0.1/reg */
-#define FILENAME_LBIREG "lbireg" /* /proc/comx/comx0.1/lbireg */
-
-#define SLICECOM_BOARDNUM_DEFAULT 0
-
-#define SLICECOM_FRAMING_CRC4 1
-#define SLICECOM_FRAMING_NO_CRC4 2
-#define SLICECOM_FRAMING_DEFAULT SLICECOM_FRAMING_CRC4
-
-#define SLICECOM_LINECODE_HDB3 1
-#define SLICECOM_LINECODE_AMI 2
-#define SLICECOM_LINECODE_DEFAULT SLICECOM_LINECODE_HDB3
-
-#define SLICECOM_CLOCK_SOURCE_LINE 1
-#define SLICECOM_CLOCK_SOURCE_INTERNAL 2
-#define SLICECOM_CLOCK_SOURCE_DEFAULT SLICECOM_CLOCK_SOURCE_LINE
-
-#define SLICECOM_LOOPBACK_NONE 1
-#define SLICECOM_LOOPBACK_LOCAL 2
-#define SLICECOM_LOOPBACK_REMOTE 3
-#define SLICECOM_LOOPBACK_DEFAULT SLICECOM_LOOPBACK_NONE
-
-#define MUNICH_VIRT(addr) (void *)(&bar1[addr])
-
-struct slicecom_stringtable
-{
- char *name;
- int value;
-};
-
-/* A convention: keep "default" the last not NULL when reading from /proc,
- "error" is an indication that something went wrong, we have an undefined value */
-
-struct slicecom_stringtable slicecom_framings[] =
-{
- {"crc4", SLICECOM_FRAMING_CRC4},
- {"no-crc4", SLICECOM_FRAMING_NO_CRC4},
- {"default", SLICECOM_FRAMING_DEFAULT},
- {"error", 0}
-};
-
-struct slicecom_stringtable slicecom_linecodes[] =
-{
- {"hdb3", SLICECOM_LINECODE_HDB3},
- {"ami", SLICECOM_LINECODE_AMI},
- {"default", SLICECOM_LINECODE_DEFAULT},
- {"error", 0}
-};
-
-struct slicecom_stringtable slicecom_clock_sources[] =
-{
- {"line", SLICECOM_CLOCK_SOURCE_LINE},
- {"internal", SLICECOM_CLOCK_SOURCE_INTERNAL},
- {"default", SLICECOM_CLOCK_SOURCE_DEFAULT},
- {"error", 0}
-};
-
-struct slicecom_stringtable slicecom_loopbacks[] =
-{
- {"none", SLICECOM_LOOPBACK_NONE},
- {"local", SLICECOM_LOOPBACK_LOCAL},
- {"remote", SLICECOM_LOOPBACK_REMOTE},
- {"default", SLICECOM_LOOPBACK_DEFAULT},
- {"error", 0}
-};
-
-/*
- * Some tunable values...
- *
- * Note: when tuning values which change the length of text in
- * /proc/comx/comx[n]/status, keep in mind that it must be shorter then
- * PAGESIZE !
- */
-
-#define MAX_BOARDS 4 /* ezzel 4 kartya lehet a gepben: 0..3 */
-#define RX_DESC_MAX 8 /* Rx ring size, must be >= 4 */
-#define TX_DESC_MAX 4 /* Tx ring size, must be >= 2 */
- /* a sokkal hosszabb Tx ring mar ronthatja a nem-FIFO packet */
- /* schedulerek (fair queueing, stb.) hatekonysagat. */
-#define MAX_WORK 10 /* TOD: update the info max. ennyi-1 esemenyt dolgoz fel egy interrupt hivasnal */
-
-/*
- * These are tunable too, but don't touch them without fully understanding what is happening
- */
-
-#define UDELAY 20 /* We wait UDELAY usecs with disabled interrupts before and */
- /* after each command to avoid writing into each other's */
- /* ccb->action_spec. A _send_packet nem var, mert azt az */
- /* _interrupt()-bol is meghivhatja a LINE_tx() */
-
-/*
- * Just to avoid warnings about implicit declarations:
- */
-
-static int MUNICH_close(struct net_device *dev);
-static struct comx_hardware slicecomhw;
-static struct comx_hardware pcicomhw;
-
-static unsigned long flags;
-static spinlock_t mister_lock = SPIN_LOCK_UNLOCKED;
-
-typedef volatile struct /* Time Slot Assignment */
-{
- u32 rxfillmask:8, // ----------------------------+------+
- // | |
- rxchannel:5, // ----------------------+---+ | |
- rti:1, // ---------------------+| | | |
- res2:2, // -------------------++|| | | |
- // |||| | | |
- txfillmask:8, // ----------+------+ |||| | | |
- // | | |||| | | |
- txchannel:5, // ----+---+ | | |||| | | |
- tti:1, // ---+| | | | |||| | | |
- res1:2; // -++|| | | | |||| | | |
- // 3 2 1
- // 10987654 32109876 54321098 76543210
-} timeslot_spec_t;
-
-typedef volatile struct /* Receive Descriptor */
-{
- u32 zero1:16, no:13, hi:1, hold:1, zero2:1;
-
- u32 next;
- u32 data;
-
- u32 zero3:8, status:8, bno:13, zero4:1, c:1, fe:1;
-} rx_desc_t;
-
-typedef volatile struct /* Transmit Descriptor */
-{
- u32 fnum:11, csm:1, no13:1, zero1:2, v110:1, no:13, hi:1, hold:1, fe:1;
-
- u32 next;
- u32 data;
-
-} tx_desc_t;
-
-typedef volatile struct /* Channel Specification */
-{
- u32 iftf:1, mode:2, fa:1, trv:2, crc:1, inv:1, cs:1, tflag:7, ra:1, ro:1,
- th:1, ta:1, to:1, ti:1, ri:1, nitbs:1, fit:1, fir:1, re:1, te:1, ch:1,
- ifc:1, sfe:1, fe2:1;
-
- u32 frda;
- u32 ftda;
-
- u32 itbs:6, zero1:26;
-
-} channel_spec_t;
-
-typedef volatile struct /* Configuration Control Block */
-{
- u32 action_spec;
- u32 reserved1;
- u32 reserved2;
- timeslot_spec_t timeslot_spec[32];
- channel_spec_t channel_spec[32];
- u32 current_rx_desc[32];
- u32 current_tx_desc[32];
- u32 csa; /* Control Start Address. CSA = *CCBA; CCB = *CSA */
- /* MUNICH does it like: CCB = *( *CCBA ) */
-} munich_ccb_t;
-
-typedef volatile struct /* Entry in the interrupt queue */
-{
- u32 all;
-} munich_intq_t;
-
-#define MUNICH_INTQLEN 63 /* Rx/Tx Interrupt Queue Length
- (not the real len, but the TIQL/RIQL value) */
-#define MUNICH_INTQMAX ( 16*(MUNICH_INTQLEN+1) ) /* Rx/Tx/Periph Interrupt Queue size in munich_intq_t's */
-#define MUNICH_INTQSIZE ( 4*MUNICH_INTQMAX ) /* Rx/Tx/Periph Interrupt Queue size in bytes */
-
-#define MUNICH_PIQLEN 4 /* Peripheral Interrupt Queue Length. Unlike the RIQL/TIQL, */
-#define MUNICH_PIQMAX ( 4*MUNICH_PIQLEN ) /* PIQL register needs it like this */
-#define MUNICH_PIQSIZE ( 4*MUNICH_PIQMAX )
-
-typedef volatile u32 vol_u32; /* TOD: ezek megszunnek ha atirom readw()/writew()-re - kész */
-typedef volatile u8 vol_u8;
-
-typedef volatile struct /* counters of E1-errors and errored seconds, see rfc2495 */
-{
- /* use here only unsigned ints, we depend on it when calculating the sum for the last N intervals */
-
- unsigned line_code_violations, /* AMI: bipolar violations, HDB3: hdb3 violations */
- path_code_violations, /* FAS errors and CRC4 errors */
- e_bit_errors, /* E-Bit Errors (the remote side received from us with CRC4-error) */
- slip_secs, /* number of seconds with (receive) Controlled Slip(s) */
- fr_loss_secs, /* number of seconds an Out Of Frame defect was detected */
- line_err_secs, /* number of seconds with one or more Line Code Violations */
- degraded_mins, /* Degraded Minute - the estimated error rate is >1E-6, but <1E-3 */
- errored_secs, /* Errored Second - at least one of these happened:
- - Path Code Violation
- - Out Of Frame defect
- - Slip
- - receiving AIS
- - not incremented during an Unavailable Second */
- bursty_err_secs, /* Bursty Errored Second: (rfc2495 says it does not apply to E1)
- - Path Code Violations >1, but <320
- - not a Severely Errored Second
- - no AIS
- - not incremented during an Unavailabla Second */
- severely_err_secs, /* Severely Errored Second:
- - CRC4: >=832 Path COde Violations || >0 Out Of Frame defects
- - noCRC4: >=2048 Line Code Violations
- - not incremented during an Unavailable Second */
- unavail_secs; /* number of Unavailable Seconds. Unavailable state is said after:
- - 10 contiguous Severely Errored Seconds
- - or RAI || AIS || LOF || LOS
- - (any) loopback has been set */
-
- /*
- * we do not strictly comply to the rfc: we do not retroactively reduce errored_secs,
- * bursty_err_secs, severely_err_secs when 'unavailable state' is reached
- */
-
-} e1_stats_t;
-
-typedef volatile struct /* ezek board-adatok, nem lehetnek a slicecom_privdata -ban */
-{
- int use_count; /* num. of interfaces using the board */
- int irq; /* a kartya irq-ja. belemasoljuk a dev->irq -kba is, de csak hogy */
- /* szebb legyen az ifconfig outputja */
- /* ha != 0, az azt jelenti hogy az az irq most nekunk sikeresen */
- /* le van foglalva */
- struct pci_dev *pci; /* a kartya PCI strukturaja. NULL, ha nincs kartya */
- u32 *bar1; /* pci->base_address[0] ioremap()-ed by munich_probe(), */
- /* on x86 can be used both as a bus or virtual address. */
- /* These are the Munich's registers */
- u8 *lbi; /* pci->base_address[1] ioremap()-ed by munich_probe(), */
- /* this is a 256-byte range, the start of the LBI on the board */
- munich_ccb_t *ccb; /* virtual address of CCB */
- munich_intq_t *tiq; /* Tx Interrupt Queue */
- munich_intq_t *riq; /* Rx Interrupt Queue */
- munich_intq_t *piq; /* Peripheral Interrupt Queue (FALC interrupts arrive here) */
- int tiq_ptr, /* A 'current' helyek a tiq/riq/piq -ban. */
- riq_ptr, /* amikor feldolgoztam az interruptokat, a legelso ures */
- piq_ptr; /* interrupt_information szora mutatnak. */
- struct net_device *twins[32]; /* MUNICH channel -> network interface assignment */
-
- unsigned long lastcheck; /* When were the Rx rings last checked. Time in jiffies */
-
- struct timer_list modemline_timer;
- char isx21;
- char lineup;
- char framing; /* a beallitasok tarolasa */
- char linecode;
- char clock_source;
- char loopback;
-
- char devname[30]; /* what to show in /proc/interrupts */
- unsigned histogram[MAX_WORK]; /* number of processed events in the interrupt loop */
- unsigned stat_pri_races; /* number of special events, we try to handle them */
- unsigned stat_pti_races;
- unsigned stat_pri_races_missed; /* when it can not be handled, because of MAX_WORK */
- unsigned stat_pti_races_missed;
-
-#define SLICECOM_BOARD_INTERVALS_SIZE 97
- e1_stats_t intervals[SLICECOM_BOARD_INTERVALS_SIZE]; /* E1 line statistics */
- unsigned current_interval; /* pointer to the current interval */
- unsigned elapsed_seconds; /* elapsed seconds from the start of the current interval */
- unsigned ses_seconds; /* counter of contiguous Severely Errored Seconds */
- unsigned is_unavailable; /* set to 1 after 10 contiguous Severely Errored Seconds */
- unsigned no_ses_seconds; /* contiguous Severely Error -free seconds in unavail state */
-
- unsigned deg_elapsed_seconds; /* for counting the 'Degraded Mins' */
- unsigned deg_cumulated_errors;
-
- struct module *owner; /* pointer to our module to avoid module load races */
-} munich_board_t;
-
-struct slicecom_privdata
-{
- int busy; /* transmitter busy - number of packets in the Tx ring */
- int channel; /* Munich logical channel ('channel-group' in Cisco) */
- unsigned boardnum;
- u32 timeslots; /* i-th bit means i-th timeslot is our */
-
- int tx_ring_hist[TX_DESC_MAX]; /* histogram: number of packets in Tx ring when _send_packet is called */
-
- tx_desc_t tx_desc[TX_DESC_MAX]; /* the ring of Tx descriptors */
- u8 tx_data[TX_DESC_MAX][TXBUFFER_SIZE]; /* buffers for data to transmit */
- int tx_desc_ptr; /* hanyadik descriptornal tartunk a beirassal */
- /* ahol ez all, oda irtunk utoljara */
-
- rx_desc_t rx_desc[RX_DESC_MAX]; /* the ring of Rx descriptors */
- u8 rx_data[RX_DESC_MAX][RXBUFFER_SIZE]; /* buffers for received data */
- int rx_desc_ptr; /* hanyadik descriptornal tartunk az olvasassal */
-
- int rafutott;
-};
-
-static u32 reg, reg_ertek; /* why static: don't write stack trash into regs if strtoul() fails */
-static u32 lbireg;
-static u8 lbireg_ertek; /* why static: don't write stack trash into regs if strtoul() fails */
-
-static munich_board_t slicecom_boards[MAX_BOARDS];
-static munich_board_t pcicom_boards[MAX_BOARDS];
-
-/*
- * Reprogram Idle Channel Registers in the FALC - send special code in not used channels
- * Should be called from the open and close, when the timeslot assignment changes
- */
-
-void rework_idle_channels(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct slicecom_privdata *hw = ch->HW_privdata;
- munich_board_t *board = slicecom_boards + hw->boardnum;
- munich_ccb_t *ccb = board->ccb;
-
- u8 *lbi = board->lbi;
- int i, j, tmp;
-
-
- spin_lock_irqsave(&mister_lock, flags);
-
- for (i = 0; i < 4; i++)
- {
- tmp = 0xFF;
- for (j = 0; j < 8; j++)
- if (ccb->timeslot_spec[8 * i + j].tti == 0) tmp ^= (0x80 >> j);
- writeb(tmp, lbi + 0x30 + i);
- }
-
- spin_unlock_irqrestore(&mister_lock, flags);
-}
-
-/*
- * Set PCM framing - /proc/comx/comx0/framing
- */
-
-void slicecom_set_framing(int boardnum, int value)
-{
- u8 *lbi = slicecom_boards[boardnum].lbi;
-
- spin_lock_irqsave(&mister_lock, flags);
-
- slicecom_boards[boardnum].framing = value;
- switch (value)
- {
- case SLICECOM_FRAMING_CRC4:
- writeb(readb(lbi + FMR1) | 8, lbi + FMR1);
- writeb((readb(lbi + FMR2) & 0x3f) | 0x80, lbi + FMR2);
- break;
- case SLICECOM_FRAMING_NO_CRC4:
- writeb(readb(lbi + FMR1) & 0xf7, lbi + FMR1);
- writeb(readb(lbi + FMR2) & 0x3f, lbi + FMR2);
- break;
- default:
- printk("slicecom: board %d: unhandled " FILENAME_FRAMING
- " value %d\n", boardnum, value);
- }
-
- spin_unlock_irqrestore(&mister_lock, flags);
-}
-
-/*
- * Set PCM linecode - /proc/comx/comx0/linecode
- */
-
-void slicecom_set_linecode(int boardnum, int value)
-{
- u8 *lbi = slicecom_boards[boardnum].lbi;
-
- spin_lock_irqsave(&mister_lock, flags);
-
- slicecom_boards[boardnum].linecode = value;
- switch (value)
- {
- case SLICECOM_LINECODE_HDB3:
- writeb(readb(lbi + FMR0) | 0xf0, lbi + FMR0);
- break;
- case SLICECOM_LINECODE_AMI:
- writeb((readb(lbi + FMR0) & 0x0f) | 0xa0, lbi + FMR0);
- break;
- default:
- printk("slicecom: board %d: unhandled " FILENAME_LINECODE
- " value %d\n", boardnum, value);
- }
- spin_unlock_irqrestore(&mister_lock, flags);
-}
-
-/*
- * Set PCM clock source - /proc/comx/comx0/clock_source
- */
-
-void slicecom_set_clock_source(int boardnum, int value)
-{
- u8 *lbi = slicecom_boards[boardnum].lbi;
-
- spin_lock_irqsave(&mister_lock, flags);
-
- slicecom_boards[boardnum].clock_source = value;
- switch (value)
- {
- case SLICECOM_CLOCK_SOURCE_LINE:
- writeb(readb(lbi + LIM0) & ~1, lbi + LIM0);
- break;
- case SLICECOM_CLOCK_SOURCE_INTERNAL:
- writeb(readb(lbi + LIM0) | 1, lbi + LIM0);
- break;
- default:
- printk("slicecom: board %d: unhandled " FILENAME_CLOCK_SOURCE
- " value %d\n", boardnum, value);
- }
- spin_unlock_irqrestore(&mister_lock, flags);
-}
-
-/*
- * Set loopbacks - /proc/comx/comx0/loopback
- */
-
-void slicecom_set_loopback(int boardnum, int value)
-{
- u8 *lbi = slicecom_boards[boardnum].lbi;
-
- spin_lock_irqsave(&mister_lock, flags);
-
- slicecom_boards[boardnum].loopback = value;
- switch (value)
- {
- case SLICECOM_LOOPBACK_NONE:
- writeb(readb(lbi + LIM0) & ~2, lbi + LIM0); /* Local Loop OFF */
- writeb(readb(lbi + LIM1) & ~2, lbi + LIM1); /* Remote Loop OFF */
- break;
- case SLICECOM_LOOPBACK_LOCAL:
- writeb(readb(lbi + LIM1) & ~2, lbi + LIM1); /* Remote Loop OFF */
- writeb(readb(lbi + LIM0) | 2, lbi + LIM0); /* Local Loop ON */
- break;
- case SLICECOM_LOOPBACK_REMOTE:
- writeb(readb(lbi + LIM0) & ~2, lbi + LIM0); /* Local Loop OFF */
- writeb(readb(lbi + LIM1) | 2, lbi + LIM1); /* Remote Loop ON */
- break;
- default:
- printk("slicecom: board %d: unhandled " FILENAME_LOOPBACK
- " value %d\n", boardnum, value);
- }
- spin_unlock_irqrestore(&mister_lock, flags);
-}
-
-/*
- * Update E1 line status LEDs on the adapter
- */
-
-void slicecom_update_leds(munich_board_t * board)
-{
- u32 *bar1 = board->bar1;
- u8 *lbi = board->lbi;
- u8 frs0;
- u32 leds;
- int i;
-
- spin_lock_irqsave(&mister_lock, flags);
-
- leds = 0;
- frs0 = readb(lbi + FRS0); /* FRS0 bits described on page 137 */
-
- if (!(frs0 & 0xa0))
- {
- leds |= 0x2000; /* Green LED: Input signal seems to be OK, no LOS, no LFA */
- if (frs0 & 0x10)
- leds |= 0x8000; /* Red LED: Receiving Remote Alarm */
- }
- writel(leds, MUNICH_VIRT(GPDATA));
-
- if (leds == 0x2000 && !board->lineup)
- { /* line up */
- board->lineup = 1;
- for (i = 0; i < 32; i++)
- {
- if (board->twins[i] && (board->twins[i]->flags & IFF_RUNNING))
- {
- struct comx_channel *ch = board->twins[i]->priv;
-
- if (!test_and_set_bit(0, &ch->lineup_pending))
- {
- ch->lineup_timer.function = comx_lineup_func;
- ch->lineup_timer.data = (unsigned long)board->twins[i];
- ch->lineup_timer.expires = jiffies + HZ * ch->lineup_delay;
- add_timer(&ch->lineup_timer);
- }
- }
- }
- }
- else if (leds != 0x2000 && board->lineup)
- { /* line down */
- board->lineup = 0;
- for (i = 0; i < 32; i++)
- if (board->twins[i] && (board->twins[i]->flags & IFF_RUNNING))
- {
- struct comx_channel *ch = board->twins[i]->priv;
-
- if (test_and_clear_bit(0, &ch->lineup_pending))
- del_timer(&ch->lineup_timer);
- else if (ch->line_status & LINE_UP)
- {
- ch->line_status &= ~LINE_UP;
- if (ch->LINE_status)
- ch->LINE_status(board->twins[i], ch->line_status);
- }
- }
- }
- spin_unlock_irqrestore(&mister_lock, flags);
-}
-
-/*
- * This function gets called every second when the FALC issues the interrupt.
- * Hardware counters contain error counts for last 1-second time interval.
- * We add them to the global counters here.
- * Read rfc2495 to understand this.
- */
-
-void slicecom_update_line_counters(munich_board_t * board)
-{
- e1_stats_t *curr_int = &board->intervals[board->current_interval];
-
- u8 *lbi = board->lbi;
-
- unsigned framing_errors, code_violations, path_code_violations, crc4_errors,
- e_bit_errors;
- unsigned slip_detected, /* this one has logical value, not the number of slips! */
- out_of_frame_defect, /* logical value */
- ais_defect, /* logical value */
- errored_sec, bursty_err_sec, severely_err_sec = 0, failure_sec;
- u8 isr2, isr3, isr5, frs0;
-
- spin_lock_irqsave(&mister_lock, flags);
-
- isr2 = readb(lbi + ISR2); /* ISR0-5 described on page 156 */
- isr3 = readb(lbi + ISR3);
- isr5 = readb(lbi + ISR5);
- frs0 = readb(lbi + FRS0); /* FRS0 described on page 137 */
-
- /* Error Events: */
-
- code_violations = readb(lbi + CVCL) + (readb(lbi + CVCH) << 8);
- framing_errors = readb(lbi + FECL) + (readb(lbi + FECH) << 8);
- crc4_errors = readb(lbi + CEC1L) + (readb(lbi + CEC1H) << 8);
- e_bit_errors = readb(lbi + EBCL) + (readb(lbi + EBCH) << 8);
- slip_detected = isr3 & (ISR3_RSN | ISR3_RSP);
-
- path_code_violations = framing_errors + crc4_errors;
-
- curr_int->line_code_violations += code_violations;
- curr_int->path_code_violations += path_code_violations;
- curr_int->e_bit_errors += e_bit_errors;
-
- /* Performance Defects: */
-
- /* there was an LFA in the last second, but maybe disappeared: */
- out_of_frame_defect = (isr2 & ISR2_LFA) || (frs0 & FRS0_LFA);
-
- /* there was an AIS in the last second, but maybe disappeared: */
- ais_defect = (isr2 & ISR2_AIS) || (frs0 & FRS0_AIS);
-
- /* Performance Parameters: */
-
- if (out_of_frame_defect)
- curr_int->fr_loss_secs++;
- if (code_violations)
- curr_int->line_err_secs++;
-
- errored_sec = ((board->framing == SLICECOM_FRAMING_NO_CRC4) &&
- (code_violations)) || path_code_violations ||
- out_of_frame_defect || slip_detected || ais_defect;
-
- bursty_err_sec = !out_of_frame_defect && !ais_defect &&
- (path_code_violations > 1) && (path_code_violations < 320);
-
- switch (board->framing)
- {
- case SLICECOM_FRAMING_CRC4:
- severely_err_sec = out_of_frame_defect ||
- (path_code_violations >= 832);
- break;
- case SLICECOM_FRAMING_NO_CRC4:
- severely_err_sec = (code_violations >= 2048);
- break;
- }
-
- /*
- * failure_sec: true if there was a condition leading to a failure
- * (and leading to unavailable state) in this second:
- */
-
- failure_sec = (isr2 & ISR2_RA) || (frs0 & FRS0_RRA) /* Remote/Far End/Distant Alarm Failure */
- || ais_defect || out_of_frame_defect /* AIS or LOF Failure */
- || (isr2 & ISR2_LOS) || (frs0 & FRS0_LOS) /* Loss Of Signal Failure */
- || (board->loopback != SLICECOM_LOOPBACK_NONE); /* Loopback has been set */
-
- if (board->is_unavailable)
- {
- if (severely_err_sec)
- board->no_ses_seconds = 0;
- else
- board->no_ses_seconds++;
-
- if ((board->no_ses_seconds >= 10) && !failure_sec)
- {
- board->is_unavailable = 0;
- board->ses_seconds = 0;
- board->no_ses_seconds = 0;
- }
- }
- else
- {
- if (severely_err_sec)
- board->ses_seconds++;
- else
- board->ses_seconds = 0;
-
- if ((board->ses_seconds >= 10) || failure_sec)
- {
- board->is_unavailable = 1;
- board->ses_seconds = 0;
- board->no_ses_seconds = 0;
- }
- }
-
- if (board->is_unavailable)
- curr_int->unavail_secs++;
- else
- {
- if (slip_detected)
- curr_int->slip_secs++;
- curr_int->errored_secs += errored_sec;
- curr_int->bursty_err_secs += bursty_err_sec;
- curr_int->severely_err_secs += severely_err_sec;
- }
-
- /* the RFC does not say clearly which errors to count here, we try to count bit errors */
-
- if (!board->is_unavailable && !severely_err_sec)
- {
- board->deg_cumulated_errors += code_violations;
- board->deg_elapsed_seconds++;
- if (board->deg_elapsed_seconds >= 60)
- {
- if (board->deg_cumulated_errors >= 123)
- curr_int->degraded_mins++;
- board->deg_cumulated_errors = 0;
- board->deg_elapsed_seconds = 0;
- }
-
- }
-
- board->elapsed_seconds++;
- if (board->elapsed_seconds >= 900)
- {
- board->current_interval =
- (board->current_interval + 1) % SLICECOM_BOARD_INTERVALS_SIZE;
- memset((void *)&board->intervals[board->current_interval], 0,
- sizeof(e1_stats_t));
- board->elapsed_seconds = 0;
- }
-
- spin_unlock_irqrestore(&mister_lock, flags);
-}
-
-static void pcicom_modemline(unsigned long b)
-{
- munich_board_t *board = (munich_board_t *) b;
- struct net_device *dev = board->twins[0];
- struct comx_channel *ch = netdev_priv(dev);
- unsigned long regs;
-
- regs = readl((void *)(&board->bar1[GPDATA]));
- if ((ch->line_status & LINE_UP) && (regs & 0x0800))
- {
- ch->line_status &= ~LINE_UP;
- board->lineup = 0;
- if (ch->LINE_status)
- {
- ch->LINE_status(dev, ch->line_status);
- }
- }
-
- if (!(ch->line_status & LINE_UP) && !(regs & 0x0800))
- {
- ch->line_status |= LINE_UP;
- board->lineup = 1;
- if (ch->LINE_status)
- {
- ch->LINE_status(dev, ch->line_status);
- }
- }
-
- mod_timer((struct timer_list *)&board->modemline_timer, jiffies + HZ);
-}
-
-/*
- * Is it possible to transmit ?
- * Called (may be called) by the protocol layer
- */
-
-static int MUNICH_txe(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct slicecom_privdata *hw = ch->HW_privdata;
-
- return (hw->busy < TX_DESC_MAX - 1);
-}
-
-/*
- * Hw probe function. Detects all the boards in the system,
- * and fills up slicecom_boards[] and pcicom_boards[]
- * Returns 0 on success.
- * We do not disable interrupts!
- */
-static int munich_probe(void)
-{
- struct pci_dev *pci;
- int boardnum;
- int slicecom_boardnum;
- int pcicom_boardnum;
- u32 *bar1;
- u8 *lbi;
- munich_board_t *board;
-
- for (boardnum = 0; boardnum < MAX_BOARDS; boardnum++)
- {
- pcicom_boards[boardnum].pci = 0;
- pcicom_boards[boardnum].bar1 = 0;
- pcicom_boards[boardnum].lbi = 0;
- slicecom_boards[boardnum].pci = 0;
- slicecom_boards[boardnum].bar1 = 0;
- slicecom_boards[boardnum].lbi = 0;
- }
-
- pci = NULL;
- board = NULL;
- slicecom_boardnum = 0;
- pcicom_boardnum = 0;
-
- for (boardnum = 0;
- boardnum < MAX_BOARDS && (pci = pci_find_device(PCI_VENDOR_ID_SIEMENS,
- PCI_DEVICE_ID_SIEMENS_MUNICH32X, pci)); boardnum++)
- {
- if (pci_enable_device(pci))
- continue;
-
- printk("munich_probe: munich chip found, IRQ %d\n", pci->irq);
-
- bar1 = ioremap_nocache(pci->resource[0].start, 0x100);
- lbi = ioremap_nocache(pci->resource[1].start, 0x100);
-
- if (bar1 && lbi)
- {
- pci_write_config_dword(pci, MUNICH_PCI_PCIRES, 0xe0000);
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- pci_write_config_dword(pci, MUNICH_PCI_PCIRES, 0);
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- /* check the type of the card */
- writel(LREG0_MAGIC, MUNICH_VIRT(LREG0));
- writel(LREG1_MAGIC, MUNICH_VIRT(LREG1));
- writel(LREG2_MAGIC, MUNICH_VIRT(LREG2));
- writel(LREG3_MAGIC, MUNICH_VIRT(LREG3));
- writel(LREG4_MAGIC, MUNICH_VIRT(LREG4));
- writel(LREG5_MAGIC, MUNICH_VIRT(LREG5));
- writel(LCONF_MAGIC2,MUNICH_VIRT(LCONF)); /* enable the DMSM */
-
- if ((readb(lbi + VSTR) == 0x13) || (readb(lbi + VSTR) == 0x10))
- {
- board = slicecom_boards + slicecom_boardnum;
- sprintf((char *)board->devname, "slicecom%d",
- slicecom_boardnum);
- board->isx21 = 0;
- slicecom_boardnum++;
- }
- else if ((readb(lbi + VSTR) == 0x6) || (readb(lbi + GIS) == 0x6))
- {
- board = pcicom_boards + pcicom_boardnum;
- sprintf((char *)board->devname, "pcicom%d", pcicom_boardnum);
- board->isx21 = 1;
- pcicom_boardnum++;
- }
- if (board)
- {
- printk("munich_probe: %s board found\n", board->devname);
- writel(LCONF_MAGIC1, MUNICH_VIRT(LCONF)); /* reset the DMSM */
- board->pci = pci;
- board->bar1 = bar1;
- board->lbi = lbi;
- board->framing = SLICECOM_FRAMING_DEFAULT;
- board->linecode = SLICECOM_LINECODE_DEFAULT;
- board->clock_source = SLICECOM_CLOCK_SOURCE_DEFAULT;
- board->loopback = SLICECOM_LOOPBACK_DEFAULT;
- board->owner = THIS_MODULE;
- }
- else
- {
- printk("munich_probe: Board error, VSTR: %02X\n",
- readb(lbi + VSTR));
- iounmap((void *)bar1);
- iounmap((void *)lbi);
- }
- }
- else
- {
- printk("munich_probe: ioremap() failed, not enabling this board!\n");
- /* .pci = NULL, so the MUNICH_open will not try to open it */
- if (bar1) iounmap((void *)bar1);
- if (lbi) iounmap((void *)lbi);
- }
- }
-
- if (!pci && !boardnum)
- {
- printk("munich_probe: no PCI present!\n");
- return -ENODEV;
- }
-
- if (pcicom_boardnum + slicecom_boardnum == 0)
- {
- printk
- ("munich_probe: Couldn't find any munich board: vendor:device %x:%x not found\n",
- PCI_VENDOR_ID_SIEMENS, PCI_DEVICE_ID_SIEMENS_MUNICH32X);
- return -ENODEV;
- }
-
- /* Found some */
- if (pcicom_boardnum)
- printk("%d pcicom board(s) found.\n", pcicom_boardnum);
- if (slicecom_boardnum)
- printk("%d slicecom board(s) found.\n", slicecom_boardnum);
-
- return 0;
-}
-
-/*
- * Reset the hardware. Get called only from within this module if needed.
- */
-#if 0
-static int slicecom_reset(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
-
- printk("slicecom_reset: resetting the hardware\n");
-
- /* Begin to reset the hardware */
-
- if (ch->HW_set_clock)
- ch->HW_set_clock(dev);
-
- /* And finish it */
-
- return 0;
-}
-#endif
-
-/*
- * Transmit a packet.
- * Called by the protocol layer
- * Return values:
- * FRAME_ACCEPTED: frame is being transmited, transmitter is busy
- * FRAME_QUEUED: frame is being transmitted, there's more room in
- * the transmitter for additional packet(s)
- * FRAME_ERROR:
- * FRAME_DROPPED: there was some error
- */
-
-static int MUNICH_send_packet(struct net_device *dev, struct sk_buff *skb)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct slicecom_privdata *hw = ch->HW_privdata;
-
- /* Send it to the debug facility too if needed: */
-
- if (ch->debug_flags & DEBUG_HW_TX)
- comx_debug_bytes(dev, skb->data, skb->len, "MUNICH_send_packet");
-
- /* If the line is inactive, don't accept: */
-
- /* TODO: atgondolni hogy mi is legyen itt */
- /* if (!(ch->line_status & LINE_UP)) return FRAME_DROPPED; */
-
- /* More check, to be sure: */
-
- if (skb->len > TXBUFFER_SIZE)
- {
- ch->stats.tx_errors++;
- kfree_skb(skb);
- return FRAME_ERROR;
- }
-
- /* Maybe you have to disable irq's while programming the hw: */
-
- spin_lock_irqsave(&mister_lock, flags);
-
- /* And more check: */
-
- if (hw->busy >= TX_DESC_MAX - 1)
- {
- printk(KERN_ERR
- "%s: Transmitter called while busy... dropping frame, busy = %d\n",
- dev->name, hw->busy);
- spin_unlock_irqrestore(&mister_lock, flags);
- kfree_skb(skb);
- return FRAME_DROPPED;
- }
-
- if (hw->busy >= 0)
- hw->tx_ring_hist[hw->busy]++;
- /* DELL: */
- else
- printk("slicecom: %s: FATAL: busy = %d\n", dev->name, hw->busy);
-
-// /* DEL: */
-// printk("slicecom: %s: _send_packet called, busy = %d\n", dev->name, hw->busy );
-
- /* Packet can go, update stats: */
-
- ch->stats.tx_packets++;
- ch->stats.tx_bytes += skb->len;
-
- /* Pass the packet to the HW: */
- /* Step forward with the transmit descriptors: */
-
- hw->tx_desc_ptr = (hw->tx_desc_ptr + 1) % TX_DESC_MAX;
-
- memcpy(&(hw->tx_data[hw->tx_desc_ptr][0]), skb->data, skb->len);
- hw->tx_desc[hw->tx_desc_ptr].no = skb->len;
-
- /* We don't issue any command, just step with the HOLD bit */
-
- hw->tx_desc[hw->tx_desc_ptr].hold = 1;
- hw->tx_desc[(hw->tx_desc_ptr + TX_DESC_MAX - 1) % TX_DESC_MAX].hold = 0;
-
-#ifdef COMX_NEW
- dev_kfree_skb(skb);
-#endif
- /* csomag kerult a Tx ringbe: */
-
- hw->busy++;
-
- /* Report it: */
-
- if (ch->debug_flags & DEBUG_HW_TX)
- comx_debug(dev, "%s: MUNICH_send_packet was successful\n\n", dev->name);
-
- if (hw->busy >= TX_DESC_MAX - 1)
- {
- spin_unlock_irqrestore(&mister_lock, flags);
- return FRAME_ACCEPTED;
- }
-
- spin_unlock_irqrestore(&mister_lock, flags);
-
- /* All done */
-
- return FRAME_QUEUED;
-}
-
-/*
- * Interrupt handler routine.
- * Called by the Linux kernel.
- * BEWARE! The interrupts are enabled on the call!
- */
-static irqreturn_t MUNICH_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- struct sk_buff *skb;
- int length;
- int rx_status;
- int work; /* hany esemenyt kezeltem mar le */
- u32 *bar1;
- u8 *lbi;
- u32 stat, /* az esemenyek, amiket a ebben a loop korben le kell meg kezelni */
- race_stat = 0, /* race eseten ebben uzenek magamnak hogy mit kell meg lekezelni */
- ack; /* ezt fogom a vegen a STAT-ba irni, kiveszek belole 1-1 bitet ha */
-
- /* az adott dolgot nem kell ack-olni mert volt vele munkam, es */
- /* legjobb ha visszaterek ide megegyszer */
- munich_intq_t int_info;
-
- struct net_device *dev;
- struct comx_channel *ch;
- struct slicecom_privdata *hw;
- munich_board_t *board = (munich_board_t *) dev_id;
- int channel;
-
- // , boardnum = (int)dev_id;
-
- // board = munich_boards + boardnum;
- bar1 = board->bar1;
- lbi = board->lbi;
-
- // Do not uncomment this under heavy load! :->
- // printk("MUNICH_interrupt: masked STAT=0x%08x, tiq=0x%08x, riq=0x%08x, piq=0x%08x\n", stat, board->tiq[0].all, board->riq[0].all, board->piq[0].all );
-
- for (work = 0; (stat = (race_stat | (readl(MUNICH_VIRT(STAT)) & ~STAT_NOT_HANDLED_BY_INTERRUPT))) && (work < MAX_WORK - 1); work++)
- {
- ack = stat & (STAT_PRI | STAT_PTI | STAT_LBII);
-
- /* Handle the interrupt information in the Rx queue. We don't really trust */
- /* info from this queue, because it can be overflowed, so later check */
- /* every Rx ring for received packets. But there are some errors which can't */
- /* be counted from the Rx rings, so we parse it. */
-
- int_info = board->riq[board->riq_ptr];
- if (int_info.all & 0xF0000000) /* ha ez nem 0, akkor itt interrupt_info van */
- {
- ack &= ~STAT_PRI; /* don't ack the interrupt, we had some work to do */
-
- channel = PCM_INT_CHANNEL(int_info.all);
- dev = board->twins[channel];
-
- if (dev == NULL)
- {
- printk
- ("MUNICH_interrupt: got an Rx interrupt info for NULL device "
- "%s.twins[%d], int_info = 0x%08x\n", board->devname,
- channel, int_info.all);
- goto go_for_next_interrupt;
- }
-
- ch = netdev_priv(dev);
- hw = (struct slicecom_privdata *)ch->HW_privdata;
-
- // printk("Rx STAT=0x%08x int_info=0x%08x rx_desc_ptr=%d rx_desc.status=0x%01x\n",
- // stat, int_info.all, hw->rx_desc_ptr, hw->rx_desc[ hw->rx_desc_ptr ].status );
-
- if (int_info.all & PCM_INT_HI)
- printk("SliceCOM: %s: Host Initiated interrupt\n", dev->name);
- if (int_info.all & PCM_INT_IFC)
- printk("SliceCOM: %s: Idle/Flag Change\n", dev->name);
- /* TOD: jo ez az Idle/Flag Change valamire? - azonnal latszik belole hogy mikor ad a masik oldal */
- /* TOD: ilyen IT most nem is jon, mert ki van maszkolva az interrupt, biztosan kell ez? */
-
- if (int_info.all & PCM_INT_FO)
- /* Internal buffer (RB) overrun */
- ch->stats.rx_over_errors++; /* TOD: Ez azt jelenti hogy a belso RB nem volt hozzaferheto, es ezert kihagyott valamit. De nem csak csomag lehetett, hanem esemeny, stb. is. lasd page 247. Ezzel a 'cat status'-hoz igazodok, de a netdevice.h szerint nem egyertelmu hogy ide ez kellene. Nem lehet hogy rx_missed ? */
- /* DE: nem gotozok sehova, elvileg jo igy */
- /* kesobb meg visszaterek az FO-ra, ha packet-FO volt. Keresd a "packet-FO"-t. */
- if (int_info.all & PCM_INT_FI) /* frame received, but we do not trust the int_info queue */
- if (int_info.all & PCM_INT_SF)
- { /* Short Frame: rovidebb mint a CRC */
- /* "rovidebb mint CRC+2byte" vizsgalat a "CRC+2"-nel */
- ch->stats.rx_length_errors++; /* TOD: noveljem? ne noveljem? */
- goto go_for_next_interrupt;
- }
-
- go_for_next_interrupt: /* One step in the interrupt queue */
- board->riq[board->riq_ptr].all = 0; /* megjelolom hogy itt meg nem jart a hw */
- board->riq_ptr = (board->riq_ptr + 1) % MUNICH_INTQMAX;
-
- }
-
- /* Check every Rx ring for incomed packets: */
-
- for (channel = 0; channel < 32; channel++)
- {
- dev = board->twins[channel];
-
- if (dev != NULL)
- {
- ch = netdev_priv(dev);
- hw = (struct slicecom_privdata *)ch->HW_privdata;
-
- rx_status = hw->rx_desc[hw->rx_desc_ptr].status;
-
- if (!(rx_status & 0x80)) /* mar jart itt a hardver */
- {
- ack &= ~STAT_PRI; /* Don't ack, we had some work */
-
- /* Ez most egy kicsit zuros, mert itt mar nem latom az int_infot */
- if (rx_status & RX_STATUS_ROF)
- ch->stats.rx_over_errors++; /* TOD: 'cat status'-hoz igazodok */
-
- if (rx_status & RX_STATUS_RA)
- /* Abort received or issued on channel */
- ch->stats.rx_frame_errors++; /* or HOLD bit in the descriptor */
- /* TOD: 'cat status'-hoz igazodok */
-
- if (rx_status & RX_STATUS_LFD)
- { /* Long Frame (longer then MFL in the MODE1) */
- ch->stats.rx_length_errors++;
- goto go_for_next_frame;
- }
-
- if (rx_status & RX_STATUS_NOB)
- { /* Not n*8 bits long frame - frame alignment */
- ch->stats.rx_frame_errors++; /* ez viszont nem igazodik a 'cat status'-hoz */
- goto go_for_next_frame;
- }
-
- if (rx_status & RX_STATUS_CRCO)
- { /* CRC error */
- ch->stats.rx_crc_errors++;
- goto go_for_next_frame;
- }
-
- if (rx_status & RX_STATUS_SF)
- { /* Short Frame: rovidebb mint CRC+2byte */
- ch->stats.rx_errors++; /* The HW does not set PCI_INT_ERR bit for this one, see page 246 */
- ch->stats.rx_length_errors++;
- goto go_for_next_frame;
- }
-
- if (rx_status != 0)
- {
- printk("SliceCOM: %s: unhandled rx_status: 0x%02x\n",
- dev->name, rx_status);
- goto go_for_next_frame;
- }
-
- /* frame received without errors: */
-
- length = hw->rx_desc[hw->rx_desc_ptr].bno;
- ch->stats.rx_packets++; /* Count only 'good' packets */
- ch->stats.rx_bytes += length;
-
- /* Allocate a larger skb and reserve the heading for efficiency: */
-
- if ((skb = dev_alloc_skb(length + 16)) == NULL)
- {
- ch->stats.rx_dropped++;
- goto go_for_next_frame;
- }
-
- /* Do bookkeeping: */
-
- skb_reserve(skb, 16);
- skb_put(skb, length);
- skb->dev = dev;
-
- /* Now copy the data into the buffer: */
-
- memcpy(skb->data, &(hw->rx_data[hw->rx_desc_ptr][0]), length);
-
- /* DEL: UGLY HACK!!!! */
- if (*((int *)skb->data) == 0x02000000 &&
- *(((int *)skb->data) + 1) == 0x3580008f)
- {
- printk("%s: swapping hack\n", dev->name);
- *((int *)skb->data) = 0x3580008f;
- *(((int *)skb->data) + 1) = 0x02000000;
- }
-
- if (ch->debug_flags & DEBUG_HW_RX)
- comx_debug_skb(dev, skb, "MUNICH_interrupt receiving");
-
- /* Pass it to the protocol entity: */
-
- ch->LINE_rx(dev, skb);
-
- go_for_next_frame:
- /* DEL: rafutott-e a HOLD bitre -detektalas */
- {
- if( ((rx_desc_t*)phys_to_virt(board->ccb->current_rx_desc[channel]))->hold
- && ((rx_desc_t*)phys_to_virt(board->ccb->current_rx_desc[channel]))->status != 0xff)
- hw->rafutott++; /* rafutott: hanyszor volt olyan hogy a current descriptoron HOLD bit volt, es a hw mar befejezte az irast (azaz a hw rafutott a HOLD bitre) */
- }
-
- // if( jiffies % 2 ) /* DELL: okozzunk egy kis Rx ring slipet :) */
- // {
- /* Step forward with the receive descriptors: */
- /* if you change this, change the copy of it below too! Search for: "RxSlip" */
- hw->rx_desc[(hw->rx_desc_ptr + RX_DESC_MAX - 1) % RX_DESC_MAX].hold = 1;
- hw->rx_desc[hw->rx_desc_ptr].status = 0xFF; /* megjelolom hogy itt meg nem jart a hw */
- hw->rx_desc[(hw->rx_desc_ptr + RX_DESC_MAX - 2) % RX_DESC_MAX].hold = 0;
- hw->rx_desc_ptr = (hw->rx_desc_ptr + 1) % RX_DESC_MAX;
- // }
- }
- }
- }
-
- stat &= ~STAT_PRI;
-
-// }
-
-// if( stat & STAT_PTI ) /* TOD: primko megvalositas: mindig csak egy esemenyt dolgozok fel, */
- /* es nem torlom a STAT-ot, ezert ujra visszajon ide a rendszer. Amikor */
- /* jon interrupt, de nincs mit feldolgozni, akkor torlom a STAT-ot. */
- /* 'needs a rewrite', de elso megoldasnak jo lesz */
-// {
- int_info = board->tiq[board->tiq_ptr];
- if (int_info.all & 0xF0000000) /* ha ez nem 0, akkor itt interrupt_info van */
- {
- ack &= ~STAT_PTI; /* don't ack the interrupt, we had some work to do */
-
- channel = PCM_INT_CHANNEL(int_info.all);
- dev = board->twins[channel];
-
- if (dev == NULL)
- {
- printk("MUNICH_interrupt: got a Tx interrupt for NULL device "
- "%s.twins[%d], int_info = 0x%08x\n",
- board->isx21 ? "pcicom" : "slicecom", channel, int_info.all);
- goto go_for_next_tx_interrupt;
- }
-
- ch = netdev_priv(dev);
- hw = (struct slicecom_privdata *)ch->HW_privdata;
-
- // printk("Tx STAT=0x%08x int_info=0x%08x tiq_ptr=%d\n", stat, int_info.all, board->tiq_ptr );
-
- if (int_info.all & PCM_INT_FE2)
- { /* "Tx available" */
- /* do nothing */
- }
- else if (int_info.all & PCM_INT_FO)
- { /* Internal buffer (RB) overrun */
- ch->stats.rx_over_errors++;
- }
- else
- {
- printk("slicecom: %s: unhandled Tx int_info: 0x%08x\n",
- dev->name, int_info.all);
- }
-
- go_for_next_tx_interrupt:
- board->tiq[board->tiq_ptr].all = 0;
- board->tiq_ptr = (board->tiq_ptr + 1) % MUNICH_INTQMAX;
- }
-
- /* Check every Tx ring for incoming packets: */
-
- for (channel = 0; channel < 32; channel++)
- {
- dev = board->twins[channel];
-
- if (dev != NULL)
- {
- int newbusy;
-
- ch = netdev_priv(dev);
- hw = (struct slicecom_privdata *)ch->HW_privdata;
-
- /* We don't trust the "Tx available" info from the TIQ, but check */
- /* every ring if there is some free room */
-
- if (ch->init_status && netif_running(dev))
- {
- newbusy = ( TX_DESC_MAX + (& hw->tx_desc[ hw->tx_desc_ptr ]) -
- (tx_desc_t*)phys_to_virt(board->ccb->current_tx_desc[ hw->channel ]) ) % TX_DESC_MAX;
-
- if(newbusy < 0)
- {
- printk("slicecom: %s: FATAL: fresly computed busy = %d, HW: 0x%p, SW: 0x%p\n",
- dev->name, newbusy,
- phys_to_virt(board->ccb->current_tx_desc[hw->channel]),
- & hw->tx_desc[hw->tx_desc_ptr]);
- }
-
- /* Fogyott valami a Tx ringbol? */
-
- if (newbusy < hw->busy)
- {
- // ack &= ~STAT_PTI; /* Don't ack, we had some work */
- hw->busy = newbusy;
- if (ch->LINE_tx)
- ch->LINE_tx(dev); /* Report it to protocol driver */
- }
- else if (newbusy > hw->busy)
- printk("slicecom: %s: newbusy > hw->busy, this should not happen!\n", dev->name);
- }
- }
- }
- stat &= ~STAT_PTI;
-
- int_info = board->piq[board->piq_ptr];
- if (int_info.all & 0xF0000000) /* ha ez nem 0, akkor itt interrupt_info van */
- {
- ack &= ~STAT_LBII; /* don't ack the interrupt, we had some work to do */
-
- /* We do not really use (yet) the interrupt info from this queue, */
-
- // printk("slicecom: %s: LBI Interrupt event: %08x\n", board->devname, int_info.all);
-
- if (!board->isx21)
- {
- slicecom_update_leds(board);
- slicecom_update_line_counters(board);
- }
-
- goto go_for_next_lbi_interrupt; /* To avoid warning about unused label */
-
- go_for_next_lbi_interrupt: /* One step in the interrupt queue */
- board->piq[board->piq_ptr].all = 0; /* megjelolom hogy itt meg nem jart a hw */
- board->piq_ptr = (board->piq_ptr + 1) % MUNICH_PIQMAX;
- }
- stat &= ~STAT_LBII;
-
- writel(ack, MUNICH_VIRT(STAT));
-
- if (stat & STAT_TSPA)
- {
- // printk("slicecom: %s: PCM TSP Asynchronous\n", board->devname);
- writel(STAT_TSPA, MUNICH_VIRT(STAT));
- stat &= ~STAT_TSPA;
- }
-
- if (stat & STAT_RSPA)
- {
- // printk("slicecom: %s: PCM RSP Asynchronous\n", board->devname);
- writel(STAT_RSPA, MUNICH_VIRT(STAT));
- stat &= ~STAT_RSPA;
- }
- if (stat)
- {
- printk("MUNICH_interrupt: unhandled interrupt, STAT=0x%08x\n",
- stat);
- writel(stat, MUNICH_VIRT(STAT)); /* ha valamit megsem kezeltunk le, azert ack-ot kuldunk neki */
- }
-
- }
- board->histogram[work]++;
-
- /* We can miss these if we reach the MAX_WORK */
- /* Count it to see how often it happens */
-
- if (race_stat & STAT_PRI)
- board->stat_pri_races_missed++;
- if (race_stat & STAT_PTI)
- board->stat_pti_races_missed++;
- return IRQ_HANDLED;
-}
-
-/*
- * Hardware open routine.
- * Called by comx (upper) layer when the user wants to bring up the interface
- * with ifconfig.
- * Initializes hardware, allocates resources etc.
- * Returns 0 on OK, or standard error value on error.
- */
-
-static int MUNICH_open(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct slicecom_privdata *hw = ch->HW_privdata;
- struct proc_dir_entry *procfile = ch->procdir->subdir;
- munich_board_t *board;
- munich_ccb_t *ccb;
-
- u32 *bar1;
- u8 *lbi;
- u32 stat;
- unsigned long flags, jiffs;
-
- int i, channel;
- u32 timeslots = hw->timeslots;
-
- board = hw->boardnum + (ch->hardware == &pcicomhw ? pcicom_boards : slicecom_boards);
-
- bar1 = board->bar1;
- lbi = board->lbi;
-
- /* TODO: a timeslotok ellenorzese kell majd ide .. hat, biztos? mar a write_proc-ban is
- ellenorzom valamennyire.
- if (!dev->io || !dev->irq) return -ENODEV;
- */
-
- if (!board->pci)
- {
- printk("MUNICH_open: no %s board with boardnum = %d\n",
- ch->hardware->name, hw->boardnum);
- return -ENODEV;
- }
-
- spin_lock_irqsave(&mister_lock, flags);
- /* lock the section to avoid race with multiple opens and make sure
- that no interrupts get called while this lock is active */
-
- if (board->use_count == 0) /* bring up the board if it was unused */
- /* if fails, frees allocated resources and returns. */
- /* TOD: is it safe? nem kellene resetelni a kartyat? */
- {
- printk("MUNICH_open: %s: bringing up board\n", board->devname);
-
- /* Clean up the board's static struct if messed: */
-
- for (i = 0; i < 32; i++)
- board->twins[i] = NULL;
- for (i = 0; i < MAX_WORK; i++)
- board->histogram[i] = 0;
-
- board->lineup = 0;
-
- /* Allocate CCB: */
- board->ccb = kmalloc(sizeof(munich_ccb_t), GFP_KERNEL);
- if (board->ccb == NULL)
- {
- spin_unlock_irqrestore(&mister_lock, flags);
- return -ENOMEM;
- }
- memset((void *)board->ccb, 0, sizeof(munich_ccb_t));
- board->ccb->csa = virt_to_phys(board->ccb);
- ccb = board->ccb;
- for (i = 0; i < 32; i++)
- {
- ccb->timeslot_spec[i].tti = 1;
- ccb->timeslot_spec[i].rti = 1;
- }
-
- /* Interrupt queues: */
-
- board->tiq = kmalloc(MUNICH_INTQSIZE, GFP_KERNEL);
- if (board->tiq == NULL)
- {
- spin_unlock_irqrestore(&mister_lock, flags);
- return -ENOMEM;
- }
- memset((void *)board->tiq, 0, MUNICH_INTQSIZE);
-
- board->riq = kmalloc(MUNICH_INTQSIZE, GFP_KERNEL);
- if (board->riq == NULL)
- {
- spin_unlock_irqrestore(&mister_lock, flags);
- return -ENOMEM;
- }
- memset((void *)board->riq, 0, MUNICH_INTQSIZE);
-
- board->piq = kmalloc(MUNICH_PIQSIZE, GFP_KERNEL);
- if (board->piq == NULL)
- {
- spin_unlock_irqrestore(&mister_lock, flags);
- return -ENOMEM;
- }
- memset((void *)board->piq, 0, MUNICH_PIQSIZE);
-
- board->tiq_ptr = 0;
- board->riq_ptr = 0;
- board->piq_ptr = 0;
-
- /* Request irq: */
-
- board->irq = 0;
-
- /* (char*) cast to avoid warning about discarding volatile: */
- if (request_irq(board->pci->irq, MUNICH_interrupt, 0,
- (char *)board->devname, (void *)board))
- {
- printk("MUNICH_open: %s: unable to obtain irq %d\n", board->devname,
- board->pci->irq);
- /* TOD: free other resources (a sok malloc feljebb) */
- spin_unlock_irqrestore(&mister_lock, flags);
- return -EAGAIN;
- }
- board->irq = board->pci->irq; /* csak akkor legyen != 0, ha tenyleg le van foglalva nekunk */
-
- /* Programming device: */
-
- /* Reset the board like a power-on: */
- /* TOD:
- - It is not a real power-on: if a DMA transaction fails with master abort, the board
- stays in half-dead state.
- - It doesn't reset the FALC line driver */
-
- pci_write_config_dword(board->pci, MUNICH_PCI_PCIRES, 0xe0000);
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- pci_write_config_dword(board->pci, MUNICH_PCI_PCIRES, 0);
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
-
- writel(virt_to_phys(&ccb->csa), MUNICH_VIRT(CCBA));
- writel(virt_to_phys( board->tiq ), MUNICH_VIRT(TIQBA));
- writel(MUNICH_INTQLEN, MUNICH_VIRT(TIQL));
- writel(virt_to_phys( board->riq ), MUNICH_VIRT(RIQBA));
- writel(MUNICH_INTQLEN, MUNICH_VIRT(RIQL));
- writel(virt_to_phys( board->piq ), MUNICH_VIRT(PIQBA));
- writel(MUNICH_PIQLEN, MUNICH_VIRT(PIQL));
-
- /* Put the magic values into the registers: */
-
- writel(MODE1_MAGIC, MUNICH_VIRT(MODE1));
- writel(MODE2_MAGIC, MUNICH_VIRT(MODE2));
-
- writel(LREG0_MAGIC, MUNICH_VIRT(LREG0));
- writel(LREG1_MAGIC, MUNICH_VIRT(LREG1));
- writel(LREG2_MAGIC, MUNICH_VIRT(LREG2));
- writel(LREG3_MAGIC, MUNICH_VIRT(LREG3));
- writel(LREG4_MAGIC, MUNICH_VIRT(LREG4));
- writel(LREG5_MAGIC, MUNICH_VIRT(LREG5));
-
- writel(LCONF_MAGIC1, MUNICH_VIRT(LCONF)); /* reset the DMSM */
- writel(LCONF_MAGIC2, MUNICH_VIRT(LCONF)); /* enable the DMSM */
-
- writel(~0, MUNICH_VIRT(TXPOLL));
- writel(board->isx21 ? 0x1400 : 0xa000, MUNICH_VIRT(GPDIR));
-
- if (readl(MUNICH_VIRT(STAT))) writel(readl(MUNICH_VIRT(STAT)), MUNICH_VIRT(STAT));
-
- ccb->action_spec = CCB_ACTIONSPEC_RES | CCB_ACTIONSPEC_IA;
- writel(CMD_ARPCM, MUNICH_VIRT(CMD)); /* Start the PCM core reset */
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
-
- stat = 0; /* Wait for the action to complete max. 1 second */
- jiffs = jiffies;
- while (!((stat = readl(MUNICH_VIRT(STAT))) & (STAT_PCMA | STAT_PCMF)) && time_before(jiffies, jiffs + HZ))
- {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- }
-
- if (stat & STAT_PCMF)
- {
- printk(KERN_ERR
- "MUNICH_open: %s: Initial ARPCM failed. STAT=0x%08x\n",
- board->devname, stat);
- writel(readl(MUNICH_VIRT(STAT)) & STAT_PCMF, MUNICH_VIRT(STAT));
- free_irq(board->irq, (void *)board); /* TOD: free other resources too *//* maybe shut down hw? */
- board->irq = 0;
- spin_unlock_irqrestore(&mister_lock, flags);
- return -EAGAIN;
- }
- else if (!(stat & STAT_PCMA))
- {
- printk(KERN_ERR
- "MUNICH_open: %s: Initial ARPCM timeout. STAT=0x%08x\n",
- board->devname, stat);
- free_irq(board->irq, (void *)board); /* TOD: free other resources too *//* maybe shut off the hw? */
- board->irq = 0;
- spin_unlock_irqrestore(&mister_lock, flags);
- return -EIO;
- }
-
- writel(readl(MUNICH_VIRT(STAT)) & STAT_PCMA, MUNICH_VIRT(STAT)); /* Acknowledge */
-
- if (board->isx21) writel(0, MUNICH_VIRT(GPDATA));
-
- printk("MUNICH_open: %s: succesful HW-open took %ld jiffies\n",
- board->devname, jiffies - jiffs);
-
- /* Set up the FALC hanging on the Local Bus: */
-
- if (!board->isx21)
- {
- writeb(0x0e, lbi + FMR1);
- writeb(0, lbi + LIM0);
- writeb(0xb0, lbi + LIM1); /* TODO: input threshold */
- writeb(0xf7, lbi + XPM0);
- writeb(0x02, lbi + XPM1);
- writeb(0x00, lbi + XPM2);
- writeb(0xf0, lbi + FMR0);
- writeb(0x80, lbi + PCD);
- writeb(0x80, lbi + PCR);
- writeb(0x00, lbi + LIM2);
- writeb(0x07, lbi + XC0);
- writeb(0x3d, lbi + XC1);
- writeb(0x05, lbi + RC0);
- writeb(0x00, lbi + RC1);
- writeb(0x83, lbi + FMR2);
- writeb(0x9f, lbi + XSW);
- writeb(0x0f, lbi + XSP);
- writeb(0x00, lbi + TSWM);
- writeb(0xe0, lbi + MODE);
- writeb(0xff, lbi + IDLE); /* Idle Code to send in unused timeslots */
- writeb(0x83, lbi + IPC); /* interrupt query line mode: Push/pull output, active high */
- writeb(0xbf, lbi + IMR3); /* send an interrupt every second */
-
- slicecom_set_framing(hw->boardnum, board->framing);
- slicecom_set_linecode(hw->boardnum, board->linecode);
- slicecom_set_clock_source(hw->boardnum, board->clock_source);
- slicecom_set_loopback(hw->boardnum, board->loopback);
-
- memset((void *)board->intervals, 0, sizeof(board->intervals));
- board->current_interval = 0;
- board->elapsed_seconds = 0;
- board->ses_seconds = 0;
- board->is_unavailable = 0;
- board->no_ses_seconds = 0;
- board->deg_elapsed_seconds = 0;
- board->deg_cumulated_errors = 0;
- }
-
- /* Enable the interrupts last */
- /* These interrupts will be enabled. We do not need the others. */
-
- writel(readl(MUNICH_VIRT(IMASK)) & ~(STAT_PTI | STAT_PRI | STAT_LBII | STAT_TSPA | STAT_RSPA), MUNICH_VIRT(IMASK));
- }
-
- spin_unlock_irqrestore(&mister_lock, flags);
-
- dev->irq = board->irq; /* hogy szep legyen az ifconfig outputja */
- ccb = board->ccb; /* TODO: ez igy csunya egy kicsit hogy benn is meg kinn is beletoltom :( */
-
- spin_lock_irqsave(&mister_lock, flags);
-
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
-
- /* Check if the selected timeslots aren't used already */
-
- for (i = 0; i < 32; i++)
- if (((1 << i) & timeslots) && !ccb->timeslot_spec[i].tti)
- {
- printk("MUNICH_open: %s: timeslot %d already used by %s\n",
- dev->name, i, board->twins[ccb->timeslot_spec[i].txchannel]->name);
- spin_unlock_irqrestore(&mister_lock, flags);
- return -EBUSY; /* TODO: lehet hogy valami mas errno kellene? */
- }
-
- /* find a free channel: */
- /* TODO: ugly, rewrite it */
-
- for (channel = 0; channel <= 32; channel++)
- {
- if (channel == 32)
- { /* not found a free one */
- printk
- ("MUNICH_open: %s: FATAL: can not find a free channel - this should not happen!\n",
- dev->name);
- spin_unlock_irqrestore(&mister_lock, flags);
- return -ENODEV;
- }
- if (board->twins[channel] == NULL)
- break; /* found the first free one */
- }
-
- board->lastcheck = jiffies; /* avoid checking uninitialized hardware channel */
-
- /* Open the channel. If fails, calls MUNICH_close() to properly free resources and stop the HW */
-
- hw->channel = channel;
- board->twins[channel] = dev;
-
- board->use_count++; /* meg nem nyitottuk meg a csatornat, de a twins-ben
- mar elfoglaltunk egyet, es ha a _close-t akarjuk hivni, akkor ez kell. */
- for (i = 0; i < 32; i++)
- if ((1 << i) & timeslots)
- {
- ccb->timeslot_spec[i].tti = 0;
- ccb->timeslot_spec[i].txchannel = channel;
- ccb->timeslot_spec[i].txfillmask = ~0;
-
- ccb->timeslot_spec[i].rti = 0;
- ccb->timeslot_spec[i].rxchannel = channel;
- ccb->timeslot_spec[i].rxfillmask = ~0;
- }
-
- if (!board->isx21) rework_idle_channels(dev);
-
- memset((void *)&(hw->tx_desc), 0, TX_DESC_MAX * sizeof(tx_desc_t));
- memset((void *)&(hw->rx_desc), 0, RX_DESC_MAX * sizeof(rx_desc_t));
-
- for (i = 0; i < TX_DESC_MAX; i++)
- {
- hw->tx_desc[i].fe = 1;
- hw->tx_desc[i].fnum = 2;
- hw->tx_desc[i].data = virt_to_phys( & (hw->tx_data[i][0]) );
- hw->tx_desc[i].next = virt_to_phys( & (hw->tx_desc[ (i+1) % TX_DESC_MAX ]) );
-
- }
- hw->tx_desc_ptr = 0; /* we will send an initial packet so it is correct: "oda irtunk utoljara" */
- hw->busy = 0;
- hw->tx_desc[hw->tx_desc_ptr].hold = 1;
- hw->tx_desc[hw->tx_desc_ptr].no = 1; /* TOD: inkabb csak 0 hosszut kuldjunk ki az initkor? */
-
- for (i = 0; i < RX_DESC_MAX; i++)
- {
- hw->rx_desc[i].no = RXBUFFER_SIZE;
- hw->rx_desc[i].data = virt_to_phys(&(hw->rx_data[i][0]));
- hw->rx_desc[i].next = virt_to_phys(&(hw->rx_desc[(i+1) % RX_DESC_MAX]));
- hw->rx_desc[i].status = 0xFF;
- }
- hw->rx_desc_ptr = 0;
-
- hw->rx_desc[(hw->rx_desc_ptr + RX_DESC_MAX - 2) % RX_DESC_MAX].hold = 1;
-
- memset((void *)&ccb->channel_spec[channel], 0, sizeof(channel_spec_t));
-
- ccb->channel_spec[channel].ti = 0; /* Transmit off */
- ccb->channel_spec[channel].to = 1;
- ccb->channel_spec[channel].ta = 0;
-
- ccb->channel_spec[channel].th = 1; /* Transmit hold */
-
- ccb->channel_spec[channel].ri = 0; /* Receive off */
- ccb->channel_spec[channel].ro = 1;
- ccb->channel_spec[channel].ra = 0;
-
- ccb->channel_spec[channel].mode = 3; /* HDLC */
-
- ccb->action_spec = CCB_ACTIONSPEC_IN | (channel << 8);
- writel(CMD_ARPCM, MUNICH_VIRT(CMD));
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
-
- spin_unlock_irqrestore(&mister_lock, flags);
-
- stat = 0;
- jiffs = jiffies;
- while (!((stat = readl(MUNICH_VIRT(STAT))) & (STAT_PCMA | STAT_PCMF)) && time_before(jiffies, jiffs + HZ))
- {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- }
-
- if (stat & STAT_PCMF)
- {
- printk(KERN_ERR "MUNICH_open: %s: %s channel %d off failed\n",
- dev->name, board->devname, channel);
- writel(readl(MUNICH_VIRT(STAT)) & STAT_PCMF, MUNICH_VIRT(STAT));
- MUNICH_close(dev);
- return -EAGAIN;
- }
- else if (!(stat & STAT_PCMA))
- {
- printk(KERN_ERR "MUNICH_open: %s: %s channel %d off timeout\n",
- dev->name, board->devname, channel);
- MUNICH_close(dev);
- return -EIO;
- }
-
- writel(readl(MUNICH_VIRT(STAT)) & STAT_PCMA, MUNICH_VIRT(STAT));
- // printk("MUNICH_open: %s: succesful channel off took %ld jiffies\n", board->devname, jiffies-jiffs);
-
- spin_lock_irqsave(&mister_lock, flags);
-
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
-
- ccb->channel_spec[channel].ifc = 1; /* 1 .. 'Idle/Flag change' interrupt letiltva */
- ccb->channel_spec[channel].fit = 1;
- ccb->channel_spec[channel].nitbs = 1;
- ccb->channel_spec[channel].itbs = 2;
-
- /* TODOO: lehet hogy jo lenne igy, de utana kellene nezni hogy nem okoz-e fragmentaciot */
- // ccb->channel_spec[channel].itbs = 2 * number_of_timeslots;
- // printk("open: %s: number_of_timeslots: %d\n", dev->name, number_of_timeslots);
-
- ccb->channel_spec[channel].mode = 3; /* HDLC */
- ccb->channel_spec[channel].ftda = virt_to_phys(&(hw->tx_desc));
- ccb->channel_spec[channel].frda = virt_to_phys(&(hw->rx_desc[0]));
-
- ccb->channel_spec[channel].ti = 1; /* Transmit init */
- ccb->channel_spec[channel].to = 0;
- ccb->channel_spec[channel].ta = 1;
-
- ccb->channel_spec[channel].th = 0;
-
- ccb->channel_spec[channel].ri = 1; /* Receive init */
- ccb->channel_spec[channel].ro = 0;
- ccb->channel_spec[channel].ra = 1;
-
- ccb->action_spec = CCB_ACTIONSPEC_ICO | (channel << 8);
- writel(CMD_ARPCM, MUNICH_VIRT(CMD)); /* Start the channel init */
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
-
- spin_unlock_irqrestore(&mister_lock, flags);
-
- stat = 0; /* Wait for the action to complete max. 1 second */
- jiffs = jiffies;
- while (!((stat = readl(MUNICH_VIRT(STAT))) & (STAT_PCMA | STAT_PCMF)) && time_before(jiffies, jiffs + HZ))
- {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- }
-
- if (stat & STAT_PCMF)
- {
- printk(KERN_ERR "MUNICH_open: %s: channel open ARPCM failed\n",
- board->devname);
- writel(readl(MUNICH_VIRT(STAT)) & STAT_PCMF, MUNICH_VIRT(STAT));
- MUNICH_close(dev);
- return -EAGAIN;
- }
- else if (!(stat & STAT_PCMA))
- {
- printk(KERN_ERR "MUNICH_open: %s: channel open ARPCM timeout\n",
- board->devname);
- MUNICH_close(dev);
- return -EIO;
- }
-
- writel(readl(MUNICH_VIRT(STAT)) & STAT_PCMA, MUNICH_VIRT(STAT));
- // printk("MUNICH_open: %s: succesful channel open took %ld jiffies\n", board->devname, jiffies-jiffs);
-
- spin_lock_irqsave(&mister_lock, flags);
-
- ccb->channel_spec[channel].nitbs = 0; /* once ITBS defined, these must be 0 */
- ccb->channel_spec[channel].itbs = 0;
-
- if (board->isx21)
- {
- init_timer(&board->modemline_timer);
- board->modemline_timer.data = (unsigned long)board;
- board->modemline_timer.function = pcicom_modemline;
- board->modemline_timer.expires = jiffies + HZ;
- add_timer((struct timer_list *)&board->modemline_timer);
- }
-
- /* It is done. Declare that we're open: */
- hw->busy = 0; /* It may be 1 if the frame at Tx init already ended, but it is not */
- /* a real problem: we compute hw->busy on every interrupt */
- hw->rafutott = 0;
- ch->init_status |= HW_OPEN;
-
- /* Initialize line state: */
- if (board->lineup)
- ch->line_status |= LINE_UP;
- else
- ch->line_status &= ~LINE_UP;
-
- /* Remove w attribute from /proc files associated to hw parameters:
- no write when the device is open */
-
- for (; procfile; procfile = procfile->next)
- if (strcmp(procfile->name, FILENAME_BOARDNUM) == 0 ||
- strcmp(procfile->name, FILENAME_TIMESLOTS) == 0)
- procfile->mode = S_IFREG | 0444;
-
- spin_unlock_irqrestore(&mister_lock, flags);
-
- return 0;
-}
-
-/*
- * Hardware close routine.
- * Called by comx (upper) layer when the user wants to bring down the interface
- * with ifconfig.
- * We also call it from MUNICH_open, if the open fails.
- * Brings down hardware, frees resources, stops receiver
- * Returns 0 on OK, or standard error value on error.
- */
-
-static int MUNICH_close(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct slicecom_privdata *hw = ch->HW_privdata;
- struct proc_dir_entry *procfile = ch->procdir->subdir;
- munich_board_t *board;
- munich_ccb_t *ccb;
-
- u32 *bar1;
- u32 timeslots = hw->timeslots;
- int stat, i, channel = hw->channel;
- unsigned long jiffs;
-
- board = hw->boardnum + (ch->hardware == &pcicomhw ? pcicom_boards : slicecom_boards);
-
- ccb = board->ccb;
- bar1 = board->bar1;
-
- if (board->isx21)
- del_timer((struct timer_list *)&board->modemline_timer);
-
- spin_lock_irqsave(&mister_lock, flags);
-
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
-
- /* Disable receiver for the channel: */
-
- for (i = 0; i < 32; i++)
- if ((1 << i) & timeslots)
- {
- ccb->timeslot_spec[i].tti = 1;
- ccb->timeslot_spec[i].txfillmask = 0; /* just to be double-sure :) */
-
- ccb->timeslot_spec[i].rti = 1;
- ccb->timeslot_spec[i].rxfillmask = 0;
- }
-
- if (!board->isx21) rework_idle_channels(dev);
-
- ccb->channel_spec[channel].ti = 0; /* Receive off, Transmit off */
- ccb->channel_spec[channel].to = 1;
- ccb->channel_spec[channel].ta = 0;
- ccb->channel_spec[channel].th = 1;
-
- ccb->channel_spec[channel].ri = 0;
- ccb->channel_spec[channel].ro = 1;
- ccb->channel_spec[channel].ra = 0;
-
- board->twins[channel] = NULL;
-
- ccb->action_spec = CCB_ACTIONSPEC_IN | (channel << 8);
- writel(CMD_ARPCM, MUNICH_VIRT(CMD));
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
-
- spin_unlock_irqrestore(&mister_lock, flags);
-
- stat = 0;
- jiffs = jiffies;
- while (!((stat = readl(MUNICH_VIRT(STAT))) & (STAT_PCMA | STAT_PCMF)) && time_before(jiffies, jiffs + HZ))
- {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- }
-
- if (stat & STAT_PCMF)
- {
- printk(KERN_ERR
- "MUNICH_close: %s: FATAL: channel off ARPCM failed, not closing!\n",
- dev->name);
- writel(readl(MUNICH_VIRT(STAT)) & STAT_PCMF, MUNICH_VIRT(STAT));
- /* If we return success, the privdata (and the descriptor list) will be freed */
- return -EIO;
- }
- else if (!(stat & STAT_PCMA))
- printk(KERN_ERR "MUNICH_close: %s: channel off ARPCM timeout\n",
- board->devname);
-
- writel(readl(MUNICH_VIRT(STAT)) & STAT_PCMA, MUNICH_VIRT(STAT));
- // printk("MUNICH_close: %s: channel off took %ld jiffies\n", board->devname, jiffies-jiffs);
-
- spin_lock_irqsave(&mister_lock, flags);
-
- if (board->use_count) board->use_count--;
-
- if (!board->use_count) /* we were the last user of the board */
- {
- printk("MUNICH_close: bringing down board %s\n", board->devname);
-
- /* program down the board: */
-
- writel(0x0000FF7F, MUNICH_VIRT(IMASK)); /* do not send any interrupts */
- writel(0, MUNICH_VIRT(CMD)); /* stop the timer if someone started it */
- writel(~0U, MUNICH_VIRT(STAT)); /* if an interrupt came between the cli()-sti(), quiet it */
- if (ch->hardware == &pcicomhw)
- writel(0x1400, MUNICH_VIRT(GPDATA));
-
- /* Put the board into 'reset' state: */
- pci_write_config_dword(board->pci, MUNICH_PCI_PCIRES, 0xe0000);
-
- /* Free irq and other resources: */
- if (board->irq)
- free_irq(board->irq, (void *)board); /* Ha nem inicializalta magat, akkor meg nincs irq */
- board->irq = 0;
-
- /* Free CCB and the interrupt queues */
- if (board->ccb) kfree((void *)board->ccb);
- if (board->tiq) kfree((void *)board->tiq);
- if (board->riq) kfree((void *)board->riq);
- if (board->piq) kfree((void *)board->piq);
- board->ccb = NULL;
- board->tiq = board->riq = board->piq = NULL;
- }
-
- /* Enable setting of hw parameters */
- for (; procfile; procfile = procfile->next)
- if (strcmp(procfile->name, FILENAME_BOARDNUM) == 0 ||
- strcmp(procfile->name, FILENAME_TIMESLOTS) == 0)
- procfile->mode = S_IFREG | 0644;
-
- /* We're not open anymore */
- ch->init_status &= ~HW_OPEN;
-
- spin_unlock_irqrestore(&mister_lock, flags);
-
- return 0;
-}
-
-/*
- * Give (textual) status information.
- * The text it returns will be a part of what appears when the user does a
- * cat /proc/comx/comx[n]/status
- * Don't write more than PAGESIZE.
- * Return value: number of bytes written (length of the string, incl. 0)
- */
-
-static int MUNICH_minden(struct net_device *dev, char *page)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct slicecom_privdata *hw = ch->HW_privdata;
- munich_board_t *board;
- struct net_device *devp;
-
- u8 *lbi;
- e1_stats_t *curr_int, *prev_int;
- e1_stats_t last4, last96; /* sum of last 4, resp. last 96 intervals */
- unsigned *sump, /* running pointer for the sum data */
- *p; /* running pointer for the interval data */
-
- int len = 0;
- u8 frs0, frs1;
- u8 fmr2;
- int i, j;
- u32 timeslots;
-
- board = hw->boardnum + (ch->hardware == &pcicomhw ? pcicom_boards : slicecom_boards);
-
- lbi = board->lbi;
- curr_int = &board->intervals[board->current_interval];
- prev_int =
- &board->
- intervals[(board->current_interval + SLICECOM_BOARD_INTERVALS_SIZE -
- 1) % SLICECOM_BOARD_INTERVALS_SIZE];
-
- if (!board->isx21)
- {
- frs0 = readb(lbi + FRS0);
- fmr2 = readb(lbi + FMR2);
- len += scnprintf(page + len, PAGE_SIZE - len, "Controller status:\n");
- if (frs0 == 0)
- len += scnprintf(page + len, PAGE_SIZE - len, "\tNo alarms\n");
- else
- {
- if (frs0 & FRS0_LOS)
- len += scnprintf(page + len, PAGE_SIZE - len, "\tLoss Of Signal\n");
- else
- {
- if (frs0 & FRS0_AIS)
- len += scnprintf(page + len, PAGE_SIZE - len,
- "\tAlarm Indication Signal\n");
- else
- {
- if (frs0 & FRS0_AUXP)
- len += scnprintf(page + len, PAGE_SIZE - len,
- "\tAuxiliary Pattern Indication\n");
- if (frs0 & FRS0_LFA)
- len += scnprintf(page + len, PAGE_SIZE - len,
- "\tLoss of Frame Alignment\n");
- else
- {
- if (frs0 & FRS0_RRA)
- len += scnprintf(page + len, PAGE_SIZE - len,
- "\tReceive Remote Alarm\n");
-
- /* You can't set this framing with the /proc interface, but it */
- /* may be good to have here this alarm if you set it by hand: */
-
- if ((board->framing == SLICECOM_FRAMING_CRC4) &&
- (frs0 & FRS0_LMFA))
- len += scnprintf(page + len, PAGE_SIZE - len,
- "\tLoss of CRC4 Multiframe Alignment\n");
-
- if (((fmr2 & 0xc0) == 0xc0) && (frs0 & FRS0_NMF))
- len += scnprintf(page + len, PAGE_SIZE - len,
- "\tNo CRC4 Multiframe alignment Found after 400 msec\n");
- }
- }
- }
- }
-
- frs1 = readb(lbi + FRS1);
- if (FRS1_XLS & frs1)
- len += scnprintf(page + len, PAGE_SIZE - len,
- "\tTransmit Line Short\n");
-
- /* debug Rx ring: DEL: - vagy meghagyni, de akkor legyen kicsit altalanosabb */
- }
-
- len += scnprintf(page + len, PAGE_SIZE - len, "Rx ring:\n");
- len += scnprintf(page + len, PAGE_SIZE - len, "\trafutott: %d\n", hw->rafutott);
- len += scnprintf(page + len, PAGE_SIZE - len,
- "\tlastcheck: %ld, jiffies: %ld\n", board->lastcheck, jiffies);
- len += scnprintf(page + len, PAGE_SIZE - len, "\tbase: %08x\n",
- (u32) virt_to_phys(&hw->rx_desc[0]));
- len += scnprintf(page + len, PAGE_SIZE - len, "\trx_desc_ptr: %d\n",
- hw->rx_desc_ptr);
- len += scnprintf(page + len, PAGE_SIZE - len, "\trx_desc_ptr: %08x\n",
- (u32) virt_to_phys(&hw->rx_desc[hw->rx_desc_ptr]));
- len += scnprintf(page + len, PAGE_SIZE - len, "\thw_curr_ptr: %08x\n",
- board->ccb->current_rx_desc[hw->channel]);
-
- for (i = 0; i < RX_DESC_MAX; i++)
- len += scnprintf(page + len, PAGE_SIZE - len, "\t%08x %08x %08x %08x\n",
- *((u32 *) & hw->rx_desc[i] + 0),
- *((u32 *) & hw->rx_desc[i] + 1),
- *((u32 *) & hw->rx_desc[i] + 2),
- *((u32 *) & hw->rx_desc[i] + 3));
-
- if (!board->isx21)
- {
- len += scnprintf(page + len, PAGE_SIZE - len,
- "Interfaces using this board: (channel-group, interface, timeslots)\n");
- for (i = 0; i < 32; i++)
- {
- devp = board->twins[i];
- if (devp != NULL)
- {
- timeslots =
- ((struct slicecom_privdata *)((struct comx_channel *)devp->
- priv)->HW_privdata)->
- timeslots;
- len += scnprintf(page + len, PAGE_SIZE - len, "\t%2d %s: ", i,
- devp->name);
- for (j = 0; j < 32; j++)
- if ((1 << j) & timeslots)
- len += scnprintf(page + len, PAGE_SIZE - len, "%d ", j);
- len += scnprintf(page + len, PAGE_SIZE - len, "\n");
- }
- }
- }
-
- len += scnprintf(page + len, PAGE_SIZE - len, "Interrupt work histogram:\n");
- for (i = 0; i < MAX_WORK; i++)
- len += scnprintf(page + len, PAGE_SIZE - len, "hist[%2d]: %8u%c", i,
- board->histogram[i], (i &&
- ((i + 1) % 4 == 0 ||
- i == MAX_WORK - 1)) ? '\n' : ' ');
-
- len += scnprintf(page + len, PAGE_SIZE - len, "Tx ring histogram:\n");
- for (i = 0; i < TX_DESC_MAX; i++)
- len += scnprintf(page + len, PAGE_SIZE - len, "hist[%2d]: %8u%c", i,
- hw->tx_ring_hist[i], (i &&
- ((i + 1) % 4 == 0 ||
- i ==
- TX_DESC_MAX - 1)) ? '\n' : ' ');
-
- if (!board->isx21)
- {
-
- memset((void *)&last4, 0, sizeof(last4));
- memset((void *)&last96, 0, sizeof(last96));
-
- /* Calculate the sum of last 4 intervals: */
-
- for (i = 1; i <= 4; i++)
- {
- p = (unsigned *)&board->intervals[(board->current_interval +
- SLICECOM_BOARD_INTERVALS_SIZE -
- i) % SLICECOM_BOARD_INTERVALS_SIZE];
- sump = (unsigned *)&last4;
- for (j = 0; j < (sizeof(e1_stats_t) / sizeof(unsigned)); j++)
- sump[j] += p[j];
- }
-
- /* Calculate the sum of last 96 intervals: */
-
- for (i = 1; i <= 96; i++)
- {
- p = (unsigned *)&board->intervals[(board->current_interval +
- SLICECOM_BOARD_INTERVALS_SIZE -
- i) % SLICECOM_BOARD_INTERVALS_SIZE];
- sump = (unsigned *)&last96;
- for (j = 0; j < (sizeof(e1_stats_t) / sizeof(unsigned)); j++)
- sump[j] += p[j];
- }
-
- len += scnprintf(page + len, PAGE_SIZE - len,
- "Data in current interval (%d seconds elapsed):\n",
- board->elapsed_seconds);
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Line Code Violations, %d Path Code Violations, %d E-Bit Errors\n",
- curr_int->line_code_violations,
- curr_int->path_code_violations, curr_int->e_bit_errors);
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Slip Secs, %d Fr Loss Secs, %d Line Err Secs, %d Degraded Mins\n",
- curr_int->slip_secs, curr_int->fr_loss_secs,
- curr_int->line_err_secs, curr_int->degraded_mins);
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Errored Secs, %d Bursty Err Secs, %d Severely Err Secs, %d Unavail Secs\n",
- curr_int->errored_secs, curr_int->bursty_err_secs,
- curr_int->severely_err_secs, curr_int->unavail_secs);
-
- len += scnprintf(page + len, PAGE_SIZE - len,
- "Data in Interval 1 (15 minutes):\n");
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Line Code Violations, %d Path Code Violations, %d E-Bit Errors\n",
- prev_int->line_code_violations,
- prev_int->path_code_violations, prev_int->e_bit_errors);
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Slip Secs, %d Fr Loss Secs, %d Line Err Secs, %d Degraded Mins\n",
- prev_int->slip_secs, prev_int->fr_loss_secs,
- prev_int->line_err_secs, prev_int->degraded_mins);
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Errored Secs, %d Bursty Err Secs, %d Severely Err Secs, %d Unavail Secs\n",
- prev_int->errored_secs, prev_int->bursty_err_secs,
- prev_int->severely_err_secs, prev_int->unavail_secs);
-
- len += scnprintf(page + len, PAGE_SIZE - len,
- "Data in last 4 intervals (1 hour):\n");
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Line Code Violations, %d Path Code Violations, %d E-Bit Errors\n",
- last4.line_code_violations, last4.path_code_violations,
- last4.e_bit_errors);
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Slip Secs, %d Fr Loss Secs, %d Line Err Secs, %d Degraded Mins\n",
- last4.slip_secs, last4.fr_loss_secs, last4.line_err_secs,
- last4.degraded_mins);
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Errored Secs, %d Bursty Err Secs, %d Severely Err Secs, %d Unavail Secs\n",
- last4.errored_secs, last4.bursty_err_secs,
- last4.severely_err_secs, last4.unavail_secs);
-
- len += scnprintf(page + len, PAGE_SIZE - len,
- "Data in last 96 intervals (24 hours):\n");
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Line Code Violations, %d Path Code Violations, %d E-Bit Errors\n",
- last96.line_code_violations, last96.path_code_violations,
- last96.e_bit_errors);
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Slip Secs, %d Fr Loss Secs, %d Line Err Secs, %d Degraded Mins\n",
- last96.slip_secs, last96.fr_loss_secs,
- last96.line_err_secs, last96.degraded_mins);
- len += scnprintf(page + len, PAGE_SIZE - len,
- " %d Errored Secs, %d Bursty Err Secs, %d Severely Err Secs, %d Unavail Secs\n",
- last96.errored_secs, last96.bursty_err_secs,
- last96.severely_err_secs, last96.unavail_secs);
-
- }
-
-// len +=scnprintf( page + len, PAGE_SIZE - len, "Special events:\n" );
-// len +=scnprintf( page + len, PAGE_SIZE - len, "\tstat_pri/missed: %u / %u\n", board->stat_pri_races, board->stat_pri_races_missed );
-// len +=scnprintf( page + len, PAGE_SIZE - len, "\tstat_pti/missed: %u / %u\n", board->stat_pti_races, board->stat_pti_races_missed );
- return len;
-}
-
-/*
- * Memory dump function. Not used currently.
- */
-static int BOARD_dump(struct net_device *dev)
-{
- printk
- ("BOARD_dump() requested. It is unimplemented, it should not be called\n");
- return (-1);
-}
-
-/*
- * /proc file read function for the files registered by this module.
- * This function is called by the procfs implementation when a user
- * wants to read from a file registered by this module.
- * page is the workspace, start should point to the real start of data,
- * off is the file offset, data points to the file's proc_dir_entry
- * structure.
- * Returns the number of bytes copied to the request buffer.
- */
-
-static int munich_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- struct proc_dir_entry *file = (struct proc_dir_entry *)data;
- struct net_device *dev = file->parent->data;
- struct comx_channel *ch = netdev_priv(dev);
- struct slicecom_privdata *hw = ch->HW_privdata;
- munich_board_t *board;
-
- int len = 0, i;
- u32 timeslots = hw->timeslots;
-
- board = hw->boardnum + (ch->hardware == &pcicomhw ? pcicom_boards : slicecom_boards);
-
- if (!strcmp(file->name, FILENAME_BOARDNUM))
- len = sprintf(page, "%d\n", hw->boardnum);
- else if (!strcmp(file->name, FILENAME_TIMESLOTS))
- {
- for (i = 0; i < 32; i++)
- if ((1 << i) & timeslots)
- len += scnprintf(page + len, PAGE_SIZE - len, "%d ", i);
- len += scnprintf(page + len, PAGE_SIZE - len, "\n");
- }
- else if (!strcmp(file->name, FILENAME_FRAMING))
- {
- i = 0;
- while (slicecom_framings[i].value &&
- slicecom_framings[i].value != board->framing)
- i++;
- len += scnprintf(page + len, PAGE_SIZE - len, "%s\n",
- slicecom_framings[i].name);
- }
- else if (!strcmp(file->name, FILENAME_LINECODE))
- {
- i = 0;
- while (slicecom_linecodes[i].value &&
- slicecom_linecodes[i].value != board->linecode)
- i++;
- len += scnprintf(page + len, PAGE_SIZE - len, "%s\n",
- slicecom_linecodes[i].name);
- }
- else if (!strcmp(file->name, FILENAME_CLOCK_SOURCE))
- {
- i = 0;
- while (slicecom_clock_sources[i].value &&
- slicecom_clock_sources[i].value != board->clock_source)
- i++;
- len +=
- scnprintf(page + len, PAGE_SIZE - len, "%s\n",
- slicecom_clock_sources[i].name);
- }
- else if (!strcmp(file->name, FILENAME_LOOPBACK))
- {
- i = 0;
- while (slicecom_loopbacks[i].value &&
- slicecom_loopbacks[i].value != board->loopback)
- i++;
- len += scnprintf(page + len, PAGE_SIZE - len, "%s\n",
- slicecom_loopbacks[i].name);
- }
- /* We set permissions to write-only for REG and LBIREG, but root can read them anyway: */
- else if (!strcmp(file->name, FILENAME_REG))
- {
- len += scnprintf(page + len, PAGE_SIZE - len,
- "%s: " FILENAME_REG ": write-only file\n", dev->name);
- }
- else if (!strcmp(file->name, FILENAME_LBIREG))
- {
- len += scnprintf(page + len, PAGE_SIZE - len,
- "%s: " FILENAME_LBIREG ": write-only file\n", dev->name);
- }
- else
- {
- printk("slicecom_read_proc: internal error, filename %s\n", file->name);
- return -EBADF;
- }
- /* file handling administration: count eof status, offset, start address
- and count: */
-
- if (off >= len)
- {
- *eof = 1;
- return 0;
- }
-
- *start = page + off;
- if (count >= len - off)
- *eof = 1;
- return min((off_t) count, (off_t) len - off);
-}
-
-/*
- * Write function for /proc files registered by us.
- * See the comment on read function above.
- * Beware! buffer is in userspace!!!
- * Returns the number of bytes written
- */
-
-static int munich_write_proc(struct file *file, const char *buffer,
- u_long count, void *data)
-{
- struct proc_dir_entry *entry = (struct proc_dir_entry *)data;
- struct net_device *dev = (struct net_device *)entry->parent->data;
- struct comx_channel *ch = netdev_priv(dev);
- struct slicecom_privdata *hw = ch->HW_privdata;
- munich_board_t *board;
-
- unsigned long ts, tmp_boardnum;
-
- u32 tmp_timeslots = 0;
- char *page, *p;
- int i;
-
- board = hw->boardnum + (ch->hardware == &pcicomhw ? pcicom_boards : slicecom_boards);
-
- /* Paranoia checking: */
-
- if (PDE(file->f_dentry->d_inode) != entry)
- {
- printk(KERN_ERR "munich_write_proc: file <-> data internal error\n");
- return -EIO;
- }
-
- /* Request tmp buffer */
- if (!(page = (char *)__get_free_page(GFP_KERNEL)))
- return -ENOMEM;
-
- /* Copy user data and cut trailing \n */
- if (copy_from_user(page, buffer, count = min(count, PAGE_SIZE))) {
- free_page((unsigned long)page);
- return -EFAULT;
- }
- if (*(page + count - 1) == '\n')
- *(page + count - 1) = 0;
- *(page + PAGE_SIZE - 1) = 0;
-
- if (!strcmp(entry->name, FILENAME_BOARDNUM))
- {
- tmp_boardnum = simple_strtoul(page, NULL, 0);
- if (0 <= tmp_boardnum && tmp_boardnum < MAX_BOARDS)
- hw->boardnum = tmp_boardnum;
- else
- {
- printk("%s: " FILENAME_BOARDNUM " range is 0...%d\n", dev->name,
- MAX_BOARDS - 1);
- free_page((unsigned long)page);
- return -EINVAL;
- }
- }
- else if (!strcmp(entry->name, FILENAME_TIMESLOTS))
- {
- p = page;
- while (*p)
- {
- if (isspace(*p))
- p++;
- else
- {
- ts = simple_strtoul(p, &p, 10); /* base = 10: Don't read 09 as an octal number */
- /* ts = 0 ha nem tudta beolvasni a stringet, erre egy kicsit epitek itt: */
- if (0 <= ts && ts < 32)
- {
- tmp_timeslots |= (1 << ts);
- }
- else
- {
- printk("%s: " FILENAME_TIMESLOTS " range is 1...31\n",
- dev->name);
- free_page((unsigned long)page);
- return -EINVAL;
- }
- }
- }
- hw->timeslots = tmp_timeslots;
- }
- else if (!strcmp(entry->name, FILENAME_FRAMING))
- {
- i = 0;
- while (slicecom_framings[i].value &&
- strncmp(slicecom_framings[i].name, page,
- strlen(slicecom_framings[i].name)))
- i++;
- if (!slicecom_framings[i].value)
- {
- printk("slicecom: %s: Invalid " FILENAME_FRAMING " '%s'\n",
- dev->name, page);
- free_page((unsigned long)page);
- return -EINVAL;
- }
- else
- { /*
- * If somebody says:
- * echo >boardnum 0
- * echo >framing no-crc4
- * echo >boardnum 1
- * - when the framing was set, hw->boardnum was 0, so it would set the framing for board 0
- * Workaround: allow to set it only if interface is administrative UP
- */
- if (netif_running(dev))
- slicecom_set_framing(hw->boardnum, slicecom_framings[i].value);
- else
- {
- printk("%s: " FILENAME_FRAMING
- " can not be set while the interface is DOWN\n",
- dev->name);
- free_page((unsigned long)page);
- return -EINVAL;
- }
- }
- }
- else if (!strcmp(entry->name, FILENAME_LINECODE))
- {
- i = 0;
- while (slicecom_linecodes[i].value &&
- strncmp(slicecom_linecodes[i].name, page,
- strlen(slicecom_linecodes[i].name)))
- i++;
- if (!slicecom_linecodes[i].value)
- {
- printk("slicecom: %s: Invalid " FILENAME_LINECODE " '%s'\n",
- dev->name, page);
- free_page((unsigned long)page);
- return -EINVAL;
- }
- else
- { /*
- * Allow to set it only if interface is administrative UP,
- * for the same reason as FILENAME_FRAMING
- */
- if (netif_running(dev))
- slicecom_set_linecode(hw->boardnum,
- slicecom_linecodes[i].value);
- else
- {
- printk("%s: " FILENAME_LINECODE
- " can not be set while the interface is DOWN\n",
- dev->name);
- free_page((unsigned long)page);
- return -EINVAL;
- }
- }
- }
- else if (!strcmp(entry->name, FILENAME_CLOCK_SOURCE))
- {
- i = 0;
- while (slicecom_clock_sources[i].value &&
- strncmp(slicecom_clock_sources[i].name, page,
- strlen(slicecom_clock_sources[i].name)))
- i++;
- if (!slicecom_clock_sources[i].value)
- {
- printk("%s: Invalid " FILENAME_CLOCK_SOURCE " '%s'\n", dev->name,
- page);
- free_page((unsigned long)page);
- return -EINVAL;
- }
- else
- { /*
- * Allow to set it only if interface is administrative UP,
- * for the same reason as FILENAME_FRAMING
- */
- if (netif_running(dev))
- slicecom_set_clock_source(hw->boardnum,
- slicecom_clock_sources[i].value);
- else
- {
- printk("%s: " FILENAME_CLOCK_SOURCE
- " can not be set while the interface is DOWN\n",
- dev->name);
- free_page((unsigned long)page);
- return -EINVAL;
- }
- }
- }
- else if (!strcmp(entry->name, FILENAME_LOOPBACK))
- {
- i = 0;
- while (slicecom_loopbacks[i].value &&
- strncmp(slicecom_loopbacks[i].name, page,
- strlen(slicecom_loopbacks[i].name)))
- i++;
- if (!slicecom_loopbacks[i].value)
- {
- printk("%s: Invalid " FILENAME_LOOPBACK " '%s'\n", dev->name, page);
- free_page((unsigned long)page);
- return -EINVAL;
- }
- else
- { /*
- * Allow to set it only if interface is administrative UP,
- * for the same reason as FILENAME_FRAMING
- */
- if (netif_running(dev))
- slicecom_set_loopback(hw->boardnum,
- slicecom_loopbacks[i].value);
- else
- {
- printk("%s: " FILENAME_LOOPBACK
- " can not be set while the interface is DOWN\n",
- dev->name);
- free_page((unsigned long)page);
- return -EINVAL;
- }
- }
- }
- else if (!strcmp(entry->name, FILENAME_REG))
- { /* DEL: 'reg' csak tmp */
- char *p;
- u32 *bar1 = board->bar1;
-
- reg = simple_strtoul(page, &p, 0);
- reg_ertek = simple_strtoul(p + 1, NULL, 0);
-
- if (reg < 0x100)
- {
- printk("reg(0x%02x) := 0x%08x jiff: %lu\n", reg, reg_ertek, jiffies);
- writel(reg_ertek, MUNICH_VIRT(reg >> 2));
- }
- else
- {
- printk("reg(0x%02x) is 0x%08x jiff: %lu\n", reg - 0x100,
- readl(MUNICH_VIRT((reg - 0x100) >> 2)), jiffies);
- }
- }
- else if (!strcmp(entry->name, FILENAME_LBIREG))
- { /* DEL: 'lbireg' csak tmp */
- char *p;
- u8 *lbi = board->lbi;
-
- lbireg = simple_strtoul(page, &p, 0);
- lbireg_ertek = simple_strtoul(p + 1, NULL, 0);
-
- if (lbireg < 0x100)
- {
- printk("lbireg(0x%02x) := 0x%02x jiff: %lu\n", lbireg,
- lbireg_ertek, jiffies);
- writeb(lbireg_ertek, lbi + lbireg);
- }
- else
- printk("lbireg(0x%02x) is 0x%02x jiff: %lu\n", lbireg - 0x100,
- readb(lbi + lbireg - 0x100), jiffies);
- }
- else
- {
- printk(KERN_ERR "munich_write_proc: internal error, filename %s\n",
- entry->name);
- free_page((unsigned long)page);
- return -EBADF;
- }
-
- /* Don't forget to free the workspace */
- free_page((unsigned long)page);
- return count;
-}
-
-/*
- * Boardtype init function.
- * Called by the comx (upper) layer, when you set boardtype.
- * Allocates resources associated to using munich board for this device,
- * initializes ch_struct pointers etc.
- * Returns 0 on success and standard error codes on error.
- */
-
-static int init_escape(struct comx_channel *ch)
-{
- kfree(ch->HW_privdata);
- return -EIO;
-}
-
-static int BOARD_init(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
- struct slicecom_privdata *hw;
- struct proc_dir_entry *new_file;
-
- /* Alloc data for private structure */
- if ((ch->HW_privdata =
- kmalloc(sizeof(struct slicecom_privdata), GFP_KERNEL)) == NULL)
- return -ENOMEM;
-
- memset(hw = ch->HW_privdata, 0, sizeof(struct slicecom_privdata));
-
- /* Register /proc files */
- if ((new_file = create_proc_entry(FILENAME_BOARDNUM, S_IFREG | 0644,
- ch->procdir)) == NULL)
- return init_escape(ch);
- new_file->data = (void *)new_file;
- new_file->read_proc = &munich_read_proc;
- new_file->write_proc = &munich_write_proc;
-// new_file->proc_iops = &comx_normal_inode_ops;
- new_file->nlink = 1;
-
- if (ch->hardware == &slicecomhw)
- {
- if ((new_file = create_proc_entry(FILENAME_TIMESLOTS, S_IFREG | 0644,
- ch->procdir)) == NULL)
- return init_escape(ch);
- new_file->data = (void *)new_file;
- new_file->read_proc = &munich_read_proc;
- new_file->write_proc = &munich_write_proc;
-// new_file->proc_iops = &comx_normal_inode_ops;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_FRAMING, S_IFREG | 0644,
- ch->procdir)) == NULL)
- return init_escape(ch);
- new_file->data = (void *)new_file;
- new_file->read_proc = &munich_read_proc;
- new_file->write_proc = &munich_write_proc;
-// new_file->proc_iops = &comx_normal_inode_ops;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_LINECODE, S_IFREG | 0644,
- ch->procdir)) == NULL)
- return init_escape(ch);
- new_file->data = (void *)new_file;
- new_file->read_proc = &munich_read_proc;
- new_file->write_proc = &munich_write_proc;
-// new_file->proc_iops = &comx_normal_inode_ops;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_CLOCK_SOURCE, S_IFREG | 0644,
- ch->procdir)) == NULL)
- return init_escape(ch);
- new_file->data = (void *)new_file;
- new_file->read_proc = &munich_read_proc;
- new_file->write_proc = &munich_write_proc;
-// new_file->proc_iops = &comx_normal_inode_ops;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_LOOPBACK, S_IFREG | 0644,
- ch->procdir)) == NULL)
- return init_escape(ch);
- new_file->data = (void *)new_file;
- new_file->read_proc = &munich_read_proc;
- new_file->write_proc = &munich_write_proc;
-// new_file->proc_iops = &comx_normal_inode_ops;
- new_file->nlink = 1;
- }
-
- /* DEL: ez itt csak fejlesztesi celokra!! */
- if ((new_file = create_proc_entry(FILENAME_REG, S_IFREG | 0200, ch->procdir)) == NULL)
- return init_escape(ch);
- new_file->data = (void *)new_file;
- new_file->read_proc = &munich_read_proc;
- new_file->write_proc = &munich_write_proc;
-// new_file->proc_iops = &comx_normal_inode_ops;
- new_file->nlink = 1;
-
- /* DEL: ez itt csak fejlesztesi celokra!! */
- if ((new_file = create_proc_entry(FILENAME_LBIREG, S_IFREG | 0200,
- ch->procdir)) == NULL)
- return init_escape(ch);
- new_file->data = (void *)new_file;
- new_file->read_proc = &munich_read_proc;
- new_file->write_proc = &munich_write_proc;
-// new_file->proc_iops = &comx_normal_inode_ops;
- new_file->nlink = 1;
-
- /* Fill in ch_struct hw specific pointers: */
-
- ch->HW_txe = MUNICH_txe;
- ch->HW_open = MUNICH_open;
- ch->HW_close = MUNICH_close;
- ch->HW_send_packet = MUNICH_send_packet;
-#ifndef COMX_NEW
- ch->HW_minden = MUNICH_minden;
-#else
- ch->HW_statistics = MUNICH_minden;
-#endif
-
- hw->boardnum = SLICECOM_BOARDNUM_DEFAULT;
- hw->timeslots = ch->hardware == &pcicomhw ? 0xffffffff : 2;
-
- /* O.K. Count one more user on this module */
- MOD_INC_USE_COUNT;
- return 0;
-}
-
-/*
- * Boardtype exit function.
- * Called by the comx (upper) layer, when you clear boardtype from munich.
- * Frees resources associated to using munich board for this device,
- * resets ch_struct pointers etc.
- */
-static int BOARD_exit(struct net_device *dev)
-{
- struct comx_channel *ch = netdev_priv(dev);
-
- /* Free private data area */
-// board = hw->boardnum + (ch->hardware == &pcicomhw ? pcicom_boards : slicecom_boards);
-
- kfree(ch->HW_privdata);
- /* Remove /proc files */
- remove_proc_entry(FILENAME_BOARDNUM, ch->procdir);
- if (ch->hardware == &slicecomhw)
- {
- remove_proc_entry(FILENAME_TIMESLOTS, ch->procdir);
- remove_proc_entry(FILENAME_FRAMING, ch->procdir);
- remove_proc_entry(FILENAME_LINECODE, ch->procdir);
- remove_proc_entry(FILENAME_CLOCK_SOURCE, ch->procdir);
- remove_proc_entry(FILENAME_LOOPBACK, ch->procdir);
- }
- remove_proc_entry(FILENAME_REG, ch->procdir);
- remove_proc_entry(FILENAME_LBIREG, ch->procdir);
-
- /* Minus one user for the module accounting */
- MOD_DEC_USE_COUNT;
- return 0;
-}
-
-static struct comx_hardware slicecomhw =
-{
- "slicecom",
-#ifdef COMX_NEW
- VERSION,
-#endif
- BOARD_init,
- BOARD_exit,
- BOARD_dump,
- NULL
-};
-
-static struct comx_hardware pcicomhw =
-{
- "pcicom",
-#ifdef COMX_NEW
- VERSION,
-#endif
- BOARD_init,
- BOARD_exit,
- BOARD_dump,
- NULL
-};
-
-/* Module management */
-
-static int __init init_mister(void)
-{
- printk(VERSIONSTR);
- comx_register_hardware(&slicecomhw);
- comx_register_hardware(&pcicomhw);
- return munich_probe();
-}
-
-static void __exit cleanup_mister(void)
-{
- int i;
-
- comx_unregister_hardware("slicecom");
- comx_unregister_hardware("pcicom");
-
- for (i = 0; i < MAX_BOARDS; i++)
- {
- if (slicecom_boards[i].bar1)
- iounmap((void *)slicecom_boards[i].bar1);
- if (slicecom_boards[i].lbi)
- iounmap((void *)slicecom_boards[i].lbi);
- if (pcicom_boards[i].bar1)
- iounmap((void *)pcicom_boards[i].bar1);
- if (pcicom_boards[i].lbi)
- iounmap((void *)pcicom_boards[i].lbi);
- }
-}
-
-module_init(init_mister);
-module_exit(cleanup_mister);
+++ /dev/null
-/*
- * Frame-relay protocol module for the COMX driver
- * for Linux 2.2.X
- *
- * Original author: Tivadar Szemethy <tiv@itc.hu>
- * Maintainer: Gergely Madarasz <gorgo@itc.hu>
- *
- * Copyright (C) 1998-1999 ITConsult-Pro Co. <info@itc.hu>
- *
- * Contributors:
- * Arnaldo Carvalho de Melo <acme@conectiva.com.br> (0.73)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Version 0.70 (99/06/14):
- * - cleaned up the source code a bit
- * - ported back to kernel, now works as builtin code
- *
- * Version 0.71 (99/06/25):
- * - use skb priorities and queues for sending keepalive
- * - use device queues for slave->master data transmit
- * - set IFF_RUNNING only line protocol up
- * - fixes on slave device flags
- *
- * Version 0.72 (99/07/09):
- * - handle slave tbusy with master tbusy (should be fixed)
- * - fix the keepalive timer addition/deletion
- *
- * Version 0.73 (00/08/15)
- * - resource release on failure at fr_master_init and
- * fr_slave_init
- */
-
-#define VERSION "0.73"
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/jiffies.h>
-#include <linux/netdevice.h>
-#include <linux/proc_fs.h>
-#include <linux/if_arp.h>
-#include <linux/inetdevice.h>
-#include <linux/pkt_sched.h>
-#include <linux/init.h>
-
-#include <asm/uaccess.h>
-
-#include "comx.h"
-#include "comxhw.h"
-
-MODULE_AUTHOR("Author: Tivadar Szemethy <tiv@itc.hu>");
-MODULE_DESCRIPTION("Frame Relay protocol implementation for the COMX drivers"
- "for Linux kernel 2.4.X");
-MODULE_LICENSE("GPL");
-
-#define FRAD_UI 0x03
-#define NLPID_IP 0xcc
-#define NLPID_Q933_LMI 0x08
-#define NLPID_CISCO_LMI 0x09
-#define Q933_ENQ 0x75
-#define Q933_LINESTAT 0x51
-#define Q933_COUNTERS 0x53
-
-#define MAXALIVECNT 3 /* No. of failures */
-
-struct fr_data {
- u16 dlci;
- struct net_device *master;
- char keepa_pend;
- char keepa_freq;
- char keepalivecnt, keeploopcnt;
- struct timer_list keepa_timer;
- u8 local_cnt, remote_cnt;
-};
-
-static struct comx_protocol fr_master_protocol;
-static struct comx_protocol fr_slave_protocol;
-static struct comx_hardware fr_dlci;
-
-static void fr_keepalive_send(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = ch->LINE_privdata;
- struct sk_buff *skb;
- u8 *fr_packet;
-
- skb=alloc_skb(dev->hard_header_len + 13, GFP_ATOMIC);
-
- if(skb==NULL)
- return;
-
- skb_reserve(skb, dev->hard_header_len);
-
- fr_packet=(u8*)skb_put(skb, 13);
-
- fr_packet[0] = (fr->dlci & (1024 - 15)) >> 2;
- fr_packet[1] = (fr->dlci & 15) << 4 | 1; // EA bit 1
- fr_packet[2] = FRAD_UI;
- fr_packet[3] = NLPID_Q933_LMI;
- fr_packet[4] = 0;
- fr_packet[5] = Q933_ENQ;
- fr_packet[6] = Q933_LINESTAT;
- fr_packet[7] = 0x01;
- fr_packet[8] = 0x01;
- fr_packet[9] = Q933_COUNTERS;
- fr_packet[10] = 0x02;
- fr_packet[11] = ++fr->local_cnt;
- fr_packet[12] = fr->remote_cnt;
-
- skb->dev = dev;
- skb->priority = TC_PRIO_CONTROL;
- dev_queue_xmit(skb);
-}
-
-static void fr_keepalive_timerfun(unsigned long d)
-{
- struct net_device *dev = (struct net_device *)d;
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = ch->LINE_privdata;
- struct proc_dir_entry *dir = ch->procdir->parent->subdir;
- struct comx_channel *sch;
- struct fr_data *sfr;
- struct net_device *sdev;
-
- if (ch->init_status & LINE_OPEN) {
- if (fr->keepalivecnt == MAXALIVECNT) {
- comx_status(dev, ch->line_status & ~PROTO_UP);
- dev->flags &= ~IFF_RUNNING;
- for (; dir ; dir = dir->next) {
- if(!S_ISDIR(dir->mode)) {
- continue;
- }
-
- if ((sdev = dir->data) && (sch = sdev->priv) &&
- (sdev->type == ARPHRD_DLCI) &&
- (sfr = sch->LINE_privdata)
- && (sfr->master == dev) &&
- (sdev->flags & IFF_UP)) {
- sdev->flags &= ~IFF_RUNNING;
- comx_status(sdev,
- sch->line_status & ~PROTO_UP);
- }
- }
- }
- if (fr->keepalivecnt <= MAXALIVECNT) {
- ++fr->keepalivecnt;
- }
- fr_keepalive_send(dev);
- }
- mod_timer(&fr->keepa_timer, jiffies + HZ * fr->keepa_freq);
-}
-
-static void fr_rx_lmi(struct net_device *dev, struct sk_buff *skb,
- u16 dlci, u8 nlpid)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = ch->LINE_privdata;
- struct proc_dir_entry *dir = ch->procdir->parent->subdir;
- struct comx_channel *sch;
- struct fr_data *sfr;
- struct net_device *sdev;
-
- if (dlci != fr->dlci || nlpid != NLPID_Q933_LMI || !fr->keepa_freq) {
- return;
- }
-
- fr->remote_cnt = skb->data[7];
- if (skb->data[8] == fr->local_cnt) { // keepalive UP!
- fr->keepalivecnt = 0;
- if ((ch->line_status & LINE_UP) &&
- !(ch->line_status & PROTO_UP)) {
- comx_status(dev, ch->line_status |= PROTO_UP);
- dev->flags |= IFF_RUNNING;
- for (; dir ; dir = dir->next) {
- if(!S_ISDIR(dir->mode)) {
- continue;
- }
-
- if ((sdev = dir->data) && (sch = sdev->priv) &&
- (sdev->type == ARPHRD_DLCI) &&
- (sfr = sch->LINE_privdata)
- && (sfr->master == dev) &&
- (sdev->flags & IFF_UP)) {
- sdev->flags |= IFF_RUNNING;
- comx_status(sdev,
- sch->line_status | PROTO_UP);
- }
- }
- }
- }
-}
-
-static void fr_set_keepalive(struct net_device *dev, int keepa)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = ch->LINE_privdata;
-
- if (!keepa && fr->keepa_freq) { // switch off
- fr->keepa_freq = 0;
- if (ch->line_status & LINE_UP) {
- comx_status(dev, ch->line_status | PROTO_UP);
- dev->flags |= IFF_RUNNING;
- del_timer(&fr->keepa_timer);
- }
- return;
- }
-
- if (keepa) { // bekapcs
- if(fr->keepa_freq && (ch->line_status & LINE_UP)) {
- del_timer(&fr->keepa_timer);
- }
- fr->keepa_freq = keepa;
- fr->local_cnt = fr->remote_cnt = 0;
- init_timer(&fr->keepa_timer);
- fr->keepa_timer.expires = jiffies + HZ;
- fr->keepa_timer.function = fr_keepalive_timerfun;
- fr->keepa_timer.data = (unsigned long)dev;
- ch->line_status &= ~(PROTO_UP | PROTO_LOOP);
- dev->flags &= ~IFF_RUNNING;
- comx_status(dev, ch->line_status);
- if(ch->line_status & LINE_UP) {
- add_timer(&fr->keepa_timer);
- }
- }
-}
-
-static void fr_rx(struct net_device *dev, struct sk_buff *skb)
-{
- struct comx_channel *ch = dev->priv;
- struct proc_dir_entry *dir = ch->procdir->parent->subdir;
- struct net_device *sdev = dev;
- struct comx_channel *sch;
- struct fr_data *sfr;
- u16 dlci;
- u8 nlpid;
-
- if(skb->len <= 4 || skb->data[2] != FRAD_UI) {
- kfree_skb(skb);
- return;
- }
-
- /* Itt majd ki kell talalni, melyik slave kapja a csomagot */
- dlci = ((skb->data[0] & 0xfc) << 2) | ((skb->data[1] & 0xf0) >> 4);
- if ((nlpid = skb->data[3]) == 0) { // Optional padding
- nlpid = skb->data[4];
- skb_pull(skb, 1);
- }
- skb_pull(skb, 4); /* DLCI and header throw away */
-
- if (ch->debug_flags & DEBUG_COMX_DLCI) {
- comx_debug(dev, "Frame received, DLCI: %d, NLPID: 0x%02x\n",
- dlci, nlpid);
- comx_debug_skb(dev, skb, "Contents");
- }
-
- /* Megkeressuk, kihez tartozik */
- for (; dir ; dir = dir->next) {
- if(!S_ISDIR(dir->mode)) {
- continue;
- }
- if ((sdev = dir->data) && (sch = sdev->priv) &&
- (sdev->type == ARPHRD_DLCI) && (sfr = sch->LINE_privdata) &&
- (sfr->master == dev) && (sfr->dlci == dlci)) {
- skb->dev = sdev;
- if (ch->debug_flags & DEBUG_COMX_DLCI) {
- comx_debug(dev, "Passing it to %s\n",sdev->name);
- }
- if (dev != sdev) {
- sch->stats.rx_packets++;
- sch->stats.rx_bytes += skb->len;
- }
- break;
- }
- }
- switch(nlpid) {
- case NLPID_IP:
- skb->protocol = htons(ETH_P_IP);
- skb->mac.raw = skb->data;
- comx_rx(sdev, skb);
- break;
- case NLPID_Q933_LMI:
- fr_rx_lmi(dev, skb, dlci, nlpid);
- default:
- kfree_skb(skb);
- break;
- }
-}
-
-static int fr_tx(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct proc_dir_entry *dir = ch->procdir->parent->subdir;
- struct net_device *sdev;
- struct comx_channel *sch;
- struct fr_data *sfr;
- int cnt = 1;
-
- /* Ha minden igaz, 2 helyen fog allni a tbusy: a masternel,
- es annal a slave-nel aki eppen kuldott.
- Egy helyen akkor all, ha a master kuldott.
- Ez megint jo lesz majd, ha utemezni akarunk */
-
- /* This should be fixed, the slave tbusy should be set when
- the masters queue is full and reset when not */
-
- for (; dir ; dir = dir->next) {
- if(!S_ISDIR(dir->mode)) {
- continue;
- }
- if ((sdev = dir->data) && (sch = sdev->priv) &&
- (sdev->type == ARPHRD_DLCI) && (sfr = sch->LINE_privdata) &&
- (sfr->master == dev) && (netif_queue_stopped(sdev))) {
- netif_wake_queue(sdev);
- cnt++;
- }
- }
-
- netif_wake_queue(dev);
- return 0;
-}
-
-static void fr_status(struct net_device *dev, unsigned short status)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = ch->LINE_privdata;
- struct proc_dir_entry *dir = ch->procdir->parent->subdir;
- struct net_device *sdev;
- struct comx_channel *sch;
- struct fr_data *sfr;
-
- if (status & LINE_UP) {
- if (!fr->keepa_freq) {
- status |= PROTO_UP;
- }
- } else {
- status &= ~(PROTO_UP | PROTO_LOOP);
- }
-
- if (dev == fr->master && fr->keepa_freq) {
- if (status & LINE_UP) {
- fr->keepa_timer.expires = jiffies + HZ;
- add_timer(&fr->keepa_timer);
- fr->keepalivecnt = MAXALIVECNT + 1;
- fr->keeploopcnt = 0;
- } else {
- del_timer(&fr->keepa_timer);
- }
- }
-
- /* Itt a status valtozast vegig kell vinni az osszes slave-n */
- for (; dir ; dir = dir->next) {
- if(!S_ISDIR(dir->mode)) {
- continue;
- }
-
- if ((sdev = dir->data) && (sch = sdev->priv) &&
- (sdev->type == ARPHRD_FRAD || sdev->type == ARPHRD_DLCI) &&
- (sfr = sch->LINE_privdata) && (sfr->master == dev)) {
- if(status & LINE_UP) {
- netif_wake_queue(sdev);
- }
- comx_status(sdev, status);
- if(status & (PROTO_UP | PROTO_LOOP)) {
- dev->flags |= IFF_RUNNING;
- } else {
- dev->flags &= ~IFF_RUNNING;
- }
- }
- }
-}
-
-static int fr_open(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = ch->LINE_privdata;
- struct proc_dir_entry *comxdir = ch->procdir;
- struct comx_channel *mch;
-
- if (!(ch->init_status & HW_OPEN)) {
- return -ENODEV;
- }
-
- if ((ch->hardware == &fr_dlci && ch->protocol != &fr_slave_protocol) ||
- (ch->protocol == &fr_slave_protocol && ch->hardware != &fr_dlci)) {
- printk(KERN_ERR "Trying to open an improperly set FR interface, giving up\n");
- return -EINVAL;
- }
-
- if (!fr->master) {
- return -ENODEV;
- }
- mch = fr->master->priv;
- if (fr->master != dev && (!(mch->init_status & LINE_OPEN)
- || (mch->protocol != &fr_master_protocol))) {
- printk(KERN_ERR "Master %s is inactive, or incorrectly set up, "
- "unable to open %s\n", fr->master->name, dev->name);
- return -ENODEV;
- }
-
- ch->init_status |= LINE_OPEN;
- ch->line_status &= ~(PROTO_UP | PROTO_LOOP);
- dev->flags &= ~IFF_RUNNING;
-
- if (fr->master == dev) {
- if (fr->keepa_freq) {
- fr->keepa_timer.function = fr_keepalive_timerfun;
- fr->keepa_timer.data = (unsigned long)dev;
- add_timer(&fr->keepa_timer);
- } else {
- if (ch->line_status & LINE_UP) {
- ch->line_status |= PROTO_UP;
- dev->flags |= IFF_RUNNING;
- }
- }
- } else {
- ch->line_status = mch->line_status;
- if(fr->master->flags & IFF_RUNNING) {
- dev->flags |= IFF_RUNNING;
- }
- }
-
- for (; comxdir ; comxdir = comxdir->next) {
- if (strcmp(comxdir->name, FILENAME_DLCI) == 0 ||
- strcmp(comxdir->name, FILENAME_MASTER) == 0 ||
- strcmp(comxdir->name, FILENAME_KEEPALIVE) == 0) {
- comxdir->mode = S_IFREG | 0444;
- }
- }
-// comx_status(dev, ch->line_status);
- return 0;
-}
-
-static int fr_close(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = ch->LINE_privdata;
- struct proc_dir_entry *comxdir = ch->procdir;
-
- if (fr->master == dev) { // Ha master
- struct proc_dir_entry *dir = ch->procdir->parent->subdir;
- struct net_device *sdev = dev;
- struct comx_channel *sch;
- struct fr_data *sfr;
-
- if (!(ch->init_status & HW_OPEN)) {
- return -ENODEV;
- }
-
- if (fr->keepa_freq) {
- del_timer(&fr->keepa_timer);
- }
-
- for (; dir ; dir = dir->next) {
- if(!S_ISDIR(dir->mode)) {
- continue;
- }
- if ((sdev = dir->data) && (sch = sdev->priv) &&
- (sdev->type == ARPHRD_DLCI) &&
- (sfr = sch->LINE_privdata) &&
- (sfr->master == dev) &&
- (sch->init_status & LINE_OPEN)) {
- dev_close(sdev);
- }
- }
- }
-
- ch->init_status &= ~LINE_OPEN;
- ch->line_status &= ~(PROTO_UP | PROTO_LOOP);
- dev->flags &= ~IFF_RUNNING;
-
- for (; comxdir ; comxdir = comxdir->next) {
- if (strcmp(comxdir->name, FILENAME_DLCI) == 0 ||
- strcmp(comxdir->name, FILENAME_MASTER) == 0 ||
- strcmp(comxdir->name, FILENAME_KEEPALIVE) == 0) {
- comxdir->mode = S_IFREG | 0444;
- }
- }
-
- return 0;
-}
-
-static int fr_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct comx_channel *sch, *mch;
- struct fr_data *fr = ch->LINE_privdata;
- struct fr_data *sfr;
- struct net_device *sdev;
- struct proc_dir_entry *dir = ch->procdir->parent->subdir;
-
- if (!fr->master) {
- printk(KERN_ERR "BUG: fr_xmit without a master!!! dev: %s\n", dev->name);
- return 0;
- }
-
- mch = fr->master->priv;
-
- /* Ennek majd a slave utemezeskor lesz igazan jelentosege */
- if (ch->debug_flags & DEBUG_COMX_DLCI) {
- comx_debug_skb(dev, skb, "Sending frame");
- }
-
- if (dev != fr->master) {
- struct sk_buff *newskb=skb_clone(skb, GFP_ATOMIC);
- if (!newskb)
- return -ENOMEM;
- newskb->dev=fr->master;
- dev_queue_xmit(newskb);
- ch->stats.tx_bytes += skb->len;
- ch->stats.tx_packets++;
- dev_kfree_skb(skb);
- } else {
- netif_stop_queue(dev);
- for (; dir ; dir = dir->next) {
- if(!S_ISDIR(dir->mode)) {
- continue;
- }
- if ((sdev = dir->data) && (sch = sdev->priv) &&
- (sdev->type == ARPHRD_DLCI) && (sfr = sch->LINE_privdata) &&
- (sfr->master == dev) && (netif_queue_stopped(sdev))) {
- netif_stop_queue(sdev);
- }
- }
-
- switch(mch->HW_send_packet(dev, skb)) {
- case FRAME_QUEUED:
- netif_wake_queue(dev);
- break;
- case FRAME_ACCEPTED:
- case FRAME_DROPPED:
- break;
- case FRAME_ERROR:
- printk(KERN_ERR "%s: Transmit frame error (len %d)\n",
- dev->name, skb->len);
- break;
- }
- }
- return 0;
-}
-
-static int fr_header(struct sk_buff *skb, struct net_device *dev,
- unsigned short type, void *daddr, void *saddr, unsigned len)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = ch->LINE_privdata;
-
- skb_push(skb, dev->hard_header_len);
- /* Put in DLCI */
- skb->data[0] = (fr->dlci & (1024 - 15)) >> 2;
- skb->data[1] = (fr->dlci & 15) << 4 | 1; // EA bit 1
- skb->data[2] = FRAD_UI;
- skb->data[3] = NLPID_IP;
-
- return dev->hard_header_len;
-}
-
-static int fr_statistics(struct net_device *dev, char *page)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = ch->LINE_privdata;
- int len = 0;
-
- if (fr->master == dev) {
- struct proc_dir_entry *dir = ch->procdir->parent->subdir;
- struct net_device *sdev;
- struct comx_channel *sch;
- struct fr_data *sfr;
- int slaves = 0;
-
- len += sprintf(page + len,
- "This is a Frame Relay master device\nSlaves: ");
- for (; dir ; dir = dir->next) {
- if(!S_ISDIR(dir->mode)) {
- continue;
- }
- if ((sdev = dir->data) && (sch = sdev->priv) &&
- (sdev->type == ARPHRD_DLCI) &&
- (sfr = sch->LINE_privdata) &&
- (sfr->master == dev) && (sdev != dev)) {
- slaves++;
- len += sprintf(page + len, "%s ", sdev->name);
- }
- }
- len += sprintf(page + len, "%s\n", slaves ? "" : "(none)");
- if (fr->keepa_freq) {
- len += sprintf(page + len, "Line keepalive (value %d) "
- "status %s [%d]\n", fr->keepa_freq,
- ch->line_status & PROTO_LOOP ? "LOOP" :
- ch->line_status & PROTO_UP ? "UP" : "DOWN",
- fr->keepalivecnt);
- } else {
- len += sprintf(page + len, "Line keepalive protocol "
- "is not set\n");
- }
- } else { // if slave
- len += sprintf(page + len,
- "This is a Frame Relay slave device, master: %s\n",
- fr->master ? fr->master->name : "(not set)");
- }
- return len;
-}
-
-static int fr_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- struct proc_dir_entry *file = (struct proc_dir_entry *)data;
- struct net_device *dev = file->parent->data;
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = NULL;
- int len = 0;
-
- if (ch) {
- fr = ch->LINE_privdata;
- }
-
- if (strcmp(file->name, FILENAME_DLCI) == 0) {
- len = sprintf(page, "%04d\n", fr->dlci);
- } else if (strcmp(file->name, FILENAME_MASTER) == 0) {
- len = sprintf(page, "%-9s\n", fr->master ? fr->master->name :
- "(none)");
- } else if (strcmp(file->name, FILENAME_KEEPALIVE) == 0) {
- len = fr->keepa_freq ? sprintf(page, "% 3d\n", fr->keepa_freq)
- : sprintf(page, "off\n");
- } else {
- printk(KERN_ERR "comxfr: internal error, filename %s\n", file->name);
- return -EBADF;
- }
-
- if (off >= len) {
- *eof = 1;
- return 0;
- }
-
- *start = page + off;
- if (count >= len - off) *eof = 1;
- return min_t(int, count, len - off);
-}
-
-static int fr_write_proc(struct file *file, const char *buffer,
- u_long count, void *data)
-{
- struct proc_dir_entry *entry = (struct proc_dir_entry *)data;
- struct net_device *dev = entry->parent->data;
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = NULL;
- char *page;
-
- if (ch) {
- fr = ch->LINE_privdata;
- }
-
- if (!(page = (char *)__get_free_page(GFP_KERNEL))) {
- return -ENOMEM;
- }
-
- if (copy_from_user(page, buffer, count)) {
- free_page((unsigned long)page);
- return -EFAULT;
- }
- if (*(page + count - 1) == '\n') {
- *(page + count - 1) = 0;
- }
-
- if (strcmp(entry->name, FILENAME_DLCI) == 0) {
- u16 dlci_new = simple_strtoul(page, NULL, 10);
-
- if (dlci_new > 1023) {
- printk(KERN_ERR "Invalid DLCI value\n");
- }
- else fr->dlci = dlci_new;
- } else if (strcmp(entry->name, FILENAME_MASTER) == 0) {
- struct net_device *new_master = dev_get_by_name(page);
-
- if (new_master && new_master->type == ARPHRD_FRAD) {
- struct comx_channel *sch = new_master->priv;
- struct fr_data *sfr = sch->LINE_privdata;
-
- if (sfr && sfr->master == new_master) {
- if(fr->master)
- dev_put(fr->master);
- fr->master = new_master;
- /* Megorokli a master statuszat */
- ch->line_status = sch->line_status;
- }
- }
- } else if (strcmp(entry->name, FILENAME_KEEPALIVE) == 0) {
- int keepa_new = -1;
-
- if (strcmp(page, KEEPALIVE_OFF) == 0) {
- keepa_new = 0;
- } else {
- keepa_new = simple_strtoul(page, NULL, 10);
- }
-
- if (keepa_new < 0 || keepa_new > 100) {
- printk(KERN_ERR "invalid keepalive\n");
- } else {
- if (fr->keepa_freq && keepa_new != fr->keepa_freq) {
- fr_set_keepalive(dev, 0);
- }
- if (keepa_new) {
- fr_set_keepalive(dev, keepa_new);
- }
- }
- } else {
- printk(KERN_ERR "comxfr_write_proc: internal error, filename %s\n",
- entry->name);
- count = -EBADF;
- }
-
- free_page((unsigned long)page);
- return count;
-}
-
-static int fr_exit(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = ch->LINE_privdata;
- struct net_device *sdev = dev;
- struct comx_channel *sch;
- struct fr_data *sfr;
- struct proc_dir_entry *dir = ch->procdir->parent->subdir;
-
- /* Ha lezarunk egy master-t, le kell kattintani a slave-eket is */
- if (fr->master && fr->master == dev) {
- for (; dir ; dir = dir->next) {
- if(!S_ISDIR(dir->mode)) {
- continue;
- }
- if ((sdev = dir->data) && (sch = sdev->priv) &&
- (sdev->type == ARPHRD_DLCI) &&
- (sfr = sch->LINE_privdata) && (sfr->master == dev)) {
- dev_close(sdev);
- sfr->master = NULL;
- }
- }
- }
- dev->flags = 0;
- dev->type = 0;
- dev->mtu = 0;
- dev->hard_header_len = 0;
-
- ch->LINE_rx = NULL;
- ch->LINE_tx = NULL;
- ch->LINE_status = NULL;
- ch->LINE_open = NULL;
- ch->LINE_close = NULL;
- ch->LINE_xmit = NULL;
- ch->LINE_header = NULL;
- ch->LINE_rebuild_header = NULL;
- ch->LINE_statistics = NULL;
-
- ch->LINE_status = 0;
-
- if (fr->master != dev) { // if not master, remove dlci
- if(fr->master)
- dev_put(fr->master);
- remove_proc_entry(FILENAME_DLCI, ch->procdir);
- remove_proc_entry(FILENAME_MASTER, ch->procdir);
- } else {
- if (fr->keepa_freq) {
- fr_set_keepalive(dev, 0);
- }
- remove_proc_entry(FILENAME_KEEPALIVE, ch->procdir);
- remove_proc_entry(FILENAME_DLCI, ch->procdir);
- }
-
- kfree(fr);
- ch->LINE_privdata = NULL;
-
- MOD_DEC_USE_COUNT;
- return 0;
-}
-
-static int fr_master_init(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr;
- struct proc_dir_entry *new_file;
-
- if ((fr = ch->LINE_privdata = kmalloc(sizeof(struct fr_data),
- GFP_KERNEL)) == NULL) {
- return -ENOMEM;
- }
- memset(fr, 0, sizeof(struct fr_data));
- fr->master = dev; // this means master
- fr->dlci = 0; // let's say default
-
- dev->flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST;
- dev->type = ARPHRD_FRAD;
- dev->mtu = 1500;
- dev->hard_header_len = 4;
- dev->addr_len = 0;
-
- ch->LINE_rx = fr_rx;
- ch->LINE_tx = fr_tx;
- ch->LINE_status = fr_status;
- ch->LINE_open = fr_open;
- ch->LINE_close = fr_close;
- ch->LINE_xmit = fr_xmit;
- ch->LINE_header = fr_header;
- ch->LINE_rebuild_header = NULL;
- ch->LINE_statistics = fr_statistics;
-
- if ((new_file = create_proc_entry(FILENAME_DLCI, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_LINE_privdata;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &fr_read_proc;
- new_file->write_proc = &fr_write_proc;
- new_file->size = 5;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_KEEPALIVE, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_filename_dlci;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &fr_read_proc;
- new_file->write_proc = &fr_write_proc;
- new_file->size = 4;
- new_file->nlink = 1;
-
- fr_set_keepalive(dev, 0);
-
- MOD_INC_USE_COUNT;
- return 0;
-cleanup_filename_dlci:
- remove_proc_entry(FILENAME_DLCI, ch->procdir);
-cleanup_LINE_privdata:
- kfree(fr);
- return -EIO;
-}
-
-static int fr_slave_init(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr;
- struct proc_dir_entry *new_file;
-
- if ((fr = ch->LINE_privdata = kmalloc(sizeof(struct fr_data),
- GFP_KERNEL)) == NULL) {
- return -ENOMEM;
- }
- memset(fr, 0, sizeof(struct fr_data));
-
- dev->flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST;
- dev->type = ARPHRD_DLCI;
- dev->mtu = 1500;
- dev->hard_header_len = 4;
- dev->addr_len = 0;
-
- ch->LINE_rx = fr_rx;
- ch->LINE_tx = fr_tx;
- ch->LINE_status = fr_status;
- ch->LINE_open = fr_open;
- ch->LINE_close = fr_close;
- ch->LINE_xmit = fr_xmit;
- ch->LINE_header = fr_header;
- ch->LINE_rebuild_header = NULL;
- ch->LINE_statistics = fr_statistics;
-
- if ((new_file = create_proc_entry(FILENAME_DLCI, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_LINE_privdata;
- }
-
- new_file->data = (void *)new_file;
- new_file->read_proc = &fr_read_proc;
- new_file->write_proc = &fr_write_proc;
- new_file->size = 5;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_MASTER, S_IFREG | 0644,
- ch->procdir)) == NULL) {
- goto cleanup_filename_dlci;
- }
- new_file->data = (void *)new_file;
- new_file->read_proc = &fr_read_proc;
- new_file->write_proc = &fr_write_proc;
- new_file->size = 10;
- new_file->nlink = 1;
- MOD_INC_USE_COUNT;
- return 0;
-cleanup_filename_dlci:
- remove_proc_entry(FILENAME_DLCI, ch->procdir);
-cleanup_LINE_privdata:
- kfree(fr);
- return -EIO;
-}
-
-static int dlci_open(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
-
- ch->init_status |= HW_OPEN;
-
- MOD_INC_USE_COUNT;
- return 0;
-}
-
-static int dlci_close(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
-
- ch->init_status &= ~HW_OPEN;
-
- MOD_DEC_USE_COUNT;
- return 0;
-}
-
-static int dlci_txe(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct fr_data *fr = ch->LINE_privdata;
-
- if (!fr->master) {
- return 0;
- }
-
- ch = fr->master->priv;
- fr = ch->LINE_privdata;
- return ch->HW_txe(fr->master);
-}
-
-static int dlci_statistics(struct net_device *dev, char *page)
-{
- return 0;
-}
-
-static int dlci_init(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
-
- ch->HW_open = dlci_open;
- ch->HW_close = dlci_close;
- ch->HW_txe = dlci_txe;
- ch->HW_statistics = dlci_statistics;
-
- /* Nincs egyeb hw info, mert ugyis a fr->master-bol fog minden kiderulni */
-
- MOD_INC_USE_COUNT;
- return 0;
-}
-
-static int dlci_exit(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
-
- ch->HW_open = NULL;
- ch->HW_close = NULL;
- ch->HW_txe = NULL;
- ch->HW_statistics = NULL;
-
- MOD_DEC_USE_COUNT;
- return 0;
-}
-
-static int dlci_dump(struct net_device *dev)
-{
- printk(KERN_INFO "dlci_dump %s, HOGY MI ???\n", dev->name);
- return -1;
-}
-
-static struct comx_protocol fr_master_protocol = {
- .name = "frad",
- .version = VERSION,
- .encap_type = ARPHRD_FRAD,
- .line_init = fr_master_init,
- .line_exit = fr_exit,
-};
-
-static struct comx_protocol fr_slave_protocol = {
- .name = "ietf-ip",
- .version = VERSION,
- .encap_type = ARPHRD_DLCI,
- .line_init = fr_slave_init,
- .line_exit = fr_exit,
-};
-
-static struct comx_hardware fr_dlci = {
- .name = "dlci",
- .version = VERSION,
- .hw_init = dlci_init,
- .hw_exit = dlci_exit,
- .hw_dump = dlci_dump,
-};
-
-static int __init comx_proto_fr_init(void)
-{
- int ret;
-
- if ((ret = comx_register_hardware(&fr_dlci))) {
- return ret;
- }
- if ((ret = comx_register_protocol(&fr_master_protocol))) {
- return ret;
- }
- return comx_register_protocol(&fr_slave_protocol);
-}
-
-static void __exit comx_proto_fr_exit(void)
-{
- comx_unregister_hardware(fr_dlci.name);
- comx_unregister_protocol(fr_master_protocol.name);
- comx_unregister_protocol(fr_slave_protocol.name);
-}
-
-module_init(comx_proto_fr_init);
-module_exit(comx_proto_fr_exit);
+++ /dev/null
-/*
- * LAPB protocol module for the COMX driver
- * for Linux kernel 2.2.X
- *
- * Original author: Tivadar Szemethy <tiv@itc.hu>
- * Maintainer: Gergely Madarasz <gorgo@itc.hu>
- *
- * Copyright (C) 1997-1999 (C) ITConsult-Pro Co. <info@itc.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Version 0.80 (99/06/14):
- * - cleaned up the source code a bit
- * - ported back to kernel, now works as non-module
- *
- * Changed (00/10/29, Henner Eisen):
- * - comx_rx() / comxlapb_data_indication() return status.
- *
- */
-
-#define VERSION "0.80"
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/netdevice.h>
-#include <linux/proc_fs.h>
-#include <linux/if_arp.h>
-#include <linux/inetdevice.h>
-#include <asm/uaccess.h>
-#include <linux/lapb.h>
-#include <linux/init.h>
-
-#include "comx.h"
-#include "comxhw.h"
-
-static struct proc_dir_entry *create_comxlapb_proc_entry(char *name, int mode,
- int size, struct proc_dir_entry *dir);
-
-static void comxlapb_rx(struct net_device *dev, struct sk_buff *skb)
-{
- if (!dev || !dev->priv) {
- dev_kfree_skb(skb);
- } else {
- lapb_data_received(dev, skb);
- }
-}
-
-static int comxlapb_tx(struct net_device *dev)
-{
- netif_wake_queue(dev);
- return 0;
-}
-
-static int comxlapb_header(struct sk_buff *skb, struct net_device *dev,
- unsigned short type, void *daddr, void *saddr, unsigned len)
-{
- return dev->hard_header_len;
-}
-
-static void comxlapb_status(struct net_device *dev, unsigned short status)
-{
- struct comx_channel *ch;
-
- if (!dev || !(ch = dev->priv)) {
- return;
- }
- if (status & LINE_UP) {
- netif_wake_queue(dev);
- }
- comx_status(dev, status);
-}
-
-static int comxlapb_open(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- int err = 0;
-
- if (!(ch->init_status & HW_OPEN)) {
- return -ENODEV;
- }
-
- err = lapb_connect_request(dev);
-
- if (ch->debug_flags & DEBUG_COMX_LAPB) {
- comx_debug(dev, "%s: lapb opened, error code: %d\n",
- dev->name, err);
- }
-
- if (!err) {
- ch->init_status |= LINE_OPEN;
- MOD_INC_USE_COUNT;
- }
- return err;
-}
-
-static int comxlapb_close(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
-
- if (!(ch->init_status & HW_OPEN)) {
- return -ENODEV;
- }
-
- if (ch->debug_flags & DEBUG_COMX_LAPB) {
- comx_debug(dev, "%s: lapb closed\n", dev->name);
- }
-
- lapb_disconnect_request(dev);
-
- ch->init_status &= ~LINE_OPEN;
- ch->line_status &= ~PROTO_UP;
- MOD_DEC_USE_COUNT;
- return 0;
-}
-
-static int comxlapb_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct sk_buff *skb2;
-
- if (!dev || !(ch = dev->priv) || !(dev->flags & (IFF_UP | IFF_RUNNING))) {
- return -ENODEV;
- }
-
- if (dev->type == ARPHRD_X25) { // first byte tells what to do
- switch(skb->data[0]) {
- case 0x00:
- break; // transmit
- case 0x01:
- lapb_connect_request(dev);
- kfree_skb(skb);
- return 0;
- case 0x02:
- lapb_disconnect_request(dev);
- default:
- kfree_skb(skb);
- return 0;
- }
- skb_pull(skb,1);
- }
-
- netif_stop_queue(dev);
-
- if ((skb2 = skb_clone(skb, GFP_ATOMIC)) != NULL) {
- lapb_data_request(dev, skb2);
- }
-
- return FRAME_ACCEPTED;
-}
-
-static int comxlapb_statistics(struct net_device *dev, char *page)
-{
- struct lapb_parms_struct parms;
- int len = 0;
-
- len += sprintf(page + len, "Line status: ");
- if (lapb_getparms(dev, &parms) != LAPB_OK) {
- len += sprintf(page + len, "not initialized\n");
- return len;
- }
- len += sprintf(page + len, "%s (%s), T1: %d/%d, T2: %d/%d, N2: %d/%d, "
- "window: %d\n", parms.mode & LAPB_DCE ? "DCE" : "DTE",
- parms.mode & LAPB_EXTENDED ? "EXTENDED" : "STANDARD",
- parms.t1timer, parms.t1, parms.t2timer, parms.t2,
- parms.n2count, parms.n2, parms.window);
-
- return len;
-}
-
-static int comxlapb_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- struct proc_dir_entry *file = (struct proc_dir_entry *)data;
- struct net_device *dev = file->parent->data;
- struct lapb_parms_struct parms;
- int len = 0;
-
- if (lapb_getparms(dev, &parms)) {
- return -ENODEV;
- }
-
- if (strcmp(file->name, FILENAME_T1) == 0) {
- len += sprintf(page + len, "%02u / %02u\n",
- parms.t1timer, parms.t1);
- } else if (strcmp(file->name, FILENAME_T2) == 0) {
- len += sprintf(page + len, "%02u / %02u\n",
- parms.t2timer, parms.t2);
- } else if (strcmp(file->name, FILENAME_N2) == 0) {
- len += sprintf(page + len, "%02u / %02u\n",
- parms.n2count, parms.n2);
- } else if (strcmp(file->name, FILENAME_WINDOW) == 0) {
- len += sprintf(page + len, "%u\n", parms.window);
- } else if (strcmp(file->name, FILENAME_MODE) == 0) {
- len += sprintf(page + len, "%s, %s\n",
- parms.mode & LAPB_DCE ? "DCE" : "DTE",
- parms.mode & LAPB_EXTENDED ? "EXTENDED" : "STANDARD");
- } else {
- printk(KERN_ERR "comxlapb: internal error, filename %s\n", file->name);
- return -EBADF;
- }
-
- if (off >= len) {
- *eof = 1;
- return 0;
- }
-
- *start = page + off;
- if (count >= len - off) {
- *eof = 1;
- }
- return min_t(int, count, len - off);
-}
-
-static int comxlapb_write_proc(struct file *file, const char *buffer,
- u_long count, void *data)
-{
- struct proc_dir_entry *entry = (struct proc_dir_entry *)data;
- struct net_device *dev = entry->parent->data;
- struct lapb_parms_struct parms;
- unsigned long parm;
- char *page;
-
- if (lapb_getparms(dev, &parms)) {
- return -ENODEV;
- }
-
- if (!(page = (char *)__get_free_page(GFP_KERNEL))) {
- return -ENOMEM;
- }
-
- if (copy_from_user(page, buffer, count)) {
- free_page((unsigned long)page);
- return -EFAULT;
- }
- if (*(page + count - 1) == '\n') {
- *(page + count - 1) = 0;
- }
-
- if (strcmp(entry->name, FILENAME_T1) == 0) {
- parm=simple_strtoul(page,NULL,10);
- if (parm > 0 && parm < 100) {
- parms.t1=parm;
- lapb_setparms(dev, &parms);
- }
- } else if (strcmp(entry->name, FILENAME_T2) == 0) {
- parm=simple_strtoul(page, NULL, 10);
- if (parm > 0 && parm < 100) {
- parms.t2=parm;
- lapb_setparms(dev, &parms);
- }
- } else if (strcmp(entry->name, FILENAME_N2) == 0) {
- parm=simple_strtoul(page, NULL, 10);
- if (parm > 0 && parm < 100) {
- parms.n2=parm;
- lapb_setparms(dev, &parms);
- }
- } else if (strcmp(entry->name, FILENAME_WINDOW) == 0) {
- parms.window = simple_strtoul(page, NULL, 10);
- lapb_setparms(dev, &parms);
- } else if (strcmp(entry->name, FILENAME_MODE) == 0) {
- if (comx_strcasecmp(page, "dte") == 0) {
- parms.mode &= ~(LAPB_DCE | LAPB_DTE);
- parms.mode |= LAPB_DTE;
- } else if (comx_strcasecmp(page, "dce") == 0) {
- parms.mode &= ~(LAPB_DTE | LAPB_DCE);
- parms.mode |= LAPB_DCE;
- } else if (comx_strcasecmp(page, "std") == 0 ||
- comx_strcasecmp(page, "standard") == 0) {
- parms.mode &= ~LAPB_EXTENDED;
- parms.mode |= LAPB_STANDARD;
- } else if (comx_strcasecmp(page, "ext") == 0 ||
- comx_strcasecmp(page, "extended") == 0) {
- parms.mode &= ~LAPB_STANDARD;
- parms.mode |= LAPB_EXTENDED;
- }
- lapb_setparms(dev, &parms);
- } else {
- printk(KERN_ERR "comxlapb_write_proc: internal error, filename %s\n",
- entry->name);
- return -EBADF;
- }
-
- free_page((unsigned long)page);
- return count;
-}
-
-static void comxlapb_connected(struct net_device *dev, int reason)
-{
- struct comx_channel *ch = dev->priv;
- struct proc_dir_entry *comxdir = ch->procdir->subdir;
-
- if (ch->debug_flags & DEBUG_COMX_LAPB) {
- comx_debug(ch->dev, "%s: lapb connected, reason: %d\n",
- ch->dev->name, reason);
- }
-
- if (ch->dev->type == ARPHRD_X25) {
- unsigned char *p;
- struct sk_buff *skb;
-
- if ((skb = dev_alloc_skb(1)) == NULL) {
- printk(KERN_ERR "comxlapb: out of memory!\n");
- return;
- }
- p = skb_put(skb,1);
- *p = 0x01; // link established
- skb->dev = ch->dev;
- skb->protocol = htons(ETH_P_X25);
- skb->mac.raw = skb->data;
- skb->pkt_type = PACKET_HOST;
-
- netif_rx(skb);
- ch->dev->last_rx = jiffies;
- }
-
- for (; comxdir; comxdir = comxdir->next) {
- if (strcmp(comxdir->name, FILENAME_MODE) == 0) {
- comxdir->mode = S_IFREG | 0444;
- }
- }
-
-
- ch->line_status |= PROTO_UP;
- comx_status(ch->dev, ch->line_status);
-}
-
-static void comxlapb_disconnected(struct net_device *dev, int reason)
-{
- struct comx_channel *ch = dev->priv;
- struct proc_dir_entry *comxdir = ch->procdir->subdir;
-
- if (ch->debug_flags & DEBUG_COMX_LAPB) {
- comx_debug(ch->dev, "%s: lapb disconnected, reason: %d\n",
- ch->dev->name, reason);
- }
-
- if (ch->dev->type == ARPHRD_X25) {
- unsigned char *p;
- struct sk_buff *skb;
-
- if ((skb = dev_alloc_skb(1)) == NULL) {
- printk(KERN_ERR "comxlapb: out of memory!\n");
- return;
- }
- p = skb_put(skb,1);
- *p = 0x02; // link disconnected
- skb->dev = ch->dev;
- skb->protocol = htons(ETH_P_X25);
- skb->mac.raw = skb->data;
- skb->pkt_type = PACKET_HOST;
-
- netif_rx(skb);
- ch->dev->last_rx = jiffies;
- }
-
- for (; comxdir; comxdir = comxdir->next) {
- if (strcmp(comxdir->name, FILENAME_MODE) == 0) {
- comxdir->mode = S_IFREG | 0644;
- }
- }
-
- ch->line_status &= ~PROTO_UP;
- comx_status(ch->dev, ch->line_status);
-}
-
-static int comxlapb_data_indication(struct net_device *dev, struct sk_buff *skb)
-{
- struct comx_channel *ch = dev->priv;
-
- if (ch->dev->type == ARPHRD_X25) {
- skb_push(skb, 1);
-
- if (skb_cow(skb, 1))
- return NET_RX_DROP;
-
- skb->data[0] = 0; // indicate data for X25
- skb->protocol = htons(ETH_P_X25);
- } else {
- skb->protocol = htons(ETH_P_IP);
- }
-
- skb->dev = ch->dev;
- skb->mac.raw = skb->data;
- return comx_rx(ch->dev, skb);
-}
-
-static void comxlapb_data_transmit(struct net_device *dev, struct sk_buff *skb)
-{
- struct comx_channel *ch = dev->priv;
-
- if (ch->HW_send_packet) {
- ch->HW_send_packet(ch->dev, skb);
- }
-}
-
-static int comxlapb_exit(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
-
- dev->flags = 0;
- dev->type = 0;
- dev->mtu = 0;
- dev->hard_header_len = 0;
-
- ch->LINE_rx = NULL;
- ch->LINE_tx = NULL;
- ch->LINE_status = NULL;
- ch->LINE_open = NULL;
- ch->LINE_close = NULL;
- ch->LINE_xmit = NULL;
- ch->LINE_header = NULL;
- ch->LINE_statistics = NULL;
-
- if (ch->debug_flags & DEBUG_COMX_LAPB) {
- comx_debug(dev, "%s: unregistering lapb\n", dev->name);
- }
- lapb_unregister(dev);
-
- remove_proc_entry(FILENAME_T1, ch->procdir);
- remove_proc_entry(FILENAME_T2, ch->procdir);
- remove_proc_entry(FILENAME_N2, ch->procdir);
- remove_proc_entry(FILENAME_MODE, ch->procdir);
- remove_proc_entry(FILENAME_WINDOW, ch->procdir);
-
- MOD_DEC_USE_COUNT;
- return 0;
-}
-
-static int comxlapb_init(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct lapb_register_struct lapbreg;
-
- dev->mtu = 1500;
- dev->hard_header_len = 4;
- dev->addr_len = 0;
-
- ch->LINE_rx = comxlapb_rx;
- ch->LINE_tx = comxlapb_tx;
- ch->LINE_status = comxlapb_status;
- ch->LINE_open = comxlapb_open;
- ch->LINE_close = comxlapb_close;
- ch->LINE_xmit = comxlapb_xmit;
- ch->LINE_header = comxlapb_header;
- ch->LINE_statistics = comxlapb_statistics;
-
- lapbreg.connect_confirmation = comxlapb_connected;
- lapbreg.connect_indication = comxlapb_connected;
- lapbreg.disconnect_confirmation = comxlapb_disconnected;
- lapbreg.disconnect_indication = comxlapb_disconnected;
- lapbreg.data_indication = comxlapb_data_indication;
- lapbreg.data_transmit = comxlapb_data_transmit;
- if (lapb_register(dev, &lapbreg)) {
- return -ENOMEM;
- }
- if (ch->debug_flags & DEBUG_COMX_LAPB) {
- comx_debug(dev, "%s: lapb registered\n", dev->name);
- }
-
- if (!create_comxlapb_proc_entry(FILENAME_T1, 0644, 8, ch->procdir)) {
- return -ENOMEM;
- }
- if (!create_comxlapb_proc_entry(FILENAME_T2, 0644, 8, ch->procdir)) {
- return -ENOMEM;
- }
- if (!create_comxlapb_proc_entry(FILENAME_N2, 0644, 8, ch->procdir)) {
- return -ENOMEM;
- }
- if (!create_comxlapb_proc_entry(FILENAME_MODE, 0644, 14, ch->procdir)) {
- return -ENOMEM;
- }
- if (!create_comxlapb_proc_entry(FILENAME_WINDOW, 0644, 0, ch->procdir)) {
- return -ENOMEM;
- }
-
- MOD_INC_USE_COUNT;
- return 0;
-}
-
-static int comxlapb_init_lapb(struct net_device *dev)
-{
- dev->flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST;
- dev->type = ARPHRD_LAPB;
-
- return(comxlapb_init(dev));
-}
-
-static int comxlapb_init_x25(struct net_device *dev)
-{
- dev->flags = IFF_NOARP;
- dev->type = ARPHRD_X25;
-
- return(comxlapb_init(dev));
-}
-
-static struct proc_dir_entry *create_comxlapb_proc_entry(char *name, int mode,
- int size, struct proc_dir_entry *dir)
-{
- struct proc_dir_entry *new_file;
-
- if ((new_file = create_proc_entry(name, S_IFREG | mode, dir)) != NULL) {
- new_file->data = (void *)new_file;
- new_file->read_proc = &comxlapb_read_proc;
- new_file->write_proc = &comxlapb_write_proc;
- new_file->size = size;
- new_file->nlink = 1;
- }
- return(new_file);
-}
-
-static struct comx_protocol comxlapb_protocol = {
- "lapb",
- VERSION,
- ARPHRD_LAPB,
- comxlapb_init_lapb,
- comxlapb_exit,
- NULL
-};
-
-static struct comx_protocol comx25_protocol = {
- "x25",
- VERSION,
- ARPHRD_X25,
- comxlapb_init_x25,
- comxlapb_exit,
- NULL
-};
-
-static int __init comx_proto_lapb_init(void)
-{
- int ret;
-
- if ((ret = comx_register_protocol(&comxlapb_protocol)) != 0) {
- return ret;
- }
- return comx_register_protocol(&comx25_protocol);
-}
-
-static void __exit comx_proto_lapb_exit(void)
-{
- comx_unregister_protocol(comxlapb_protocol.name);
- comx_unregister_protocol(comx25_protocol.name);
-}
-
-module_init(comx_proto_lapb_init);
-module_exit(comx_proto_lapb_exit);
-
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * Synchronous PPP / Cisco-HDLC driver for the COMX boards
- *
- * Author: Gergely Madarasz <gorgo@itc.hu>
- *
- * based on skeleton code by Tivadar Szemethy <tiv@itc.hu>
- *
- * Copyright (C) 1999 ITConsult-Pro Co. <info@itc.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- *
- * Version 0.10 (99/06/10):
- * - written the first code :)
- *
- * Version 0.20 (99/06/16):
- * - added hdlc protocol
- * - protocol up is IFF_RUNNING
- *
- * Version 0.21 (99/07/15):
- * - some small fixes with the line status
- *
- * Version 0.22 (99/08/05):
- * - don't test IFF_RUNNING but the pp_link_state of the sppp
- *
- * Version 0.23 (99/12/02):
- * - tbusy fixes
- *
- */
-
-#define VERSION "0.23"
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/jiffies.h>
-#include <linux/netdevice.h>
-#include <linux/proc_fs.h>
-#include <linux/if_arp.h>
-#include <linux/inetdevice.h>
-#include <asm/uaccess.h>
-#include <linux/init.h>
-
-#include <net/syncppp.h>
-#include "comx.h"
-
-MODULE_AUTHOR("Author: Gergely Madarasz <gorgo@itc.hu>");
-MODULE_DESCRIPTION("Cisco-HDLC / Synchronous PPP driver for the COMX sync serial boards");
-MODULE_LICENSE("GPL");
-
-static struct comx_protocol syncppp_protocol;
-static struct comx_protocol hdlc_protocol;
-
-struct syncppp_data {
- struct timer_list status_timer;
-};
-
-static void syncppp_status_timerfun(unsigned long d) {
- struct net_device *dev=(struct net_device *)d;
- struct comx_channel *ch=dev->priv;
- struct syncppp_data *spch=ch->LINE_privdata;
- struct sppp *sp = (struct sppp *)sppp_of(dev);
-
- if(!(ch->line_status & PROTO_UP) &&
- (sp->pp_link_state==SPPP_LINK_UP)) {
- comx_status(dev, ch->line_status | PROTO_UP);
- }
- if((ch->line_status & PROTO_UP) &&
- (sp->pp_link_state==SPPP_LINK_DOWN)) {
- comx_status(dev, ch->line_status & ~PROTO_UP);
- }
- mod_timer(&spch->status_timer,jiffies + HZ*3);
-}
-
-static int syncppp_tx(struct net_device *dev)
-{
- struct comx_channel *ch=dev->priv;
-
- if(ch->line_status & LINE_UP) {
- netif_wake_queue(dev);
- }
- return 0;
-}
-
-static void syncppp_status(struct net_device *dev, unsigned short status)
-{
- status &= ~(PROTO_UP | PROTO_LOOP);
- if(status & LINE_UP) {
- netif_wake_queue(dev);
- sppp_open(dev);
- } else {
- /* Line went down */
- netif_stop_queue(dev);
- sppp_close(dev);
- }
- comx_status(dev, status);
-}
-
-static int syncppp_open(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct syncppp_data *spch = ch->LINE_privdata;
-
- if (!(ch->init_status & HW_OPEN)) return -ENODEV;
-
- ch->init_status |= LINE_OPEN;
- ch->line_status &= ~(PROTO_UP | PROTO_LOOP);
-
- if(ch->line_status & LINE_UP) {
- sppp_open(dev);
- }
-
- init_timer(&spch->status_timer);
- spch->status_timer.function=syncppp_status_timerfun;
- spch->status_timer.data=(unsigned long)dev;
- spch->status_timer.expires=jiffies + HZ*3;
- add_timer(&spch->status_timer);
-
- return 0;
-}
-
-static int syncppp_close(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct syncppp_data *spch = ch->LINE_privdata;
-
- if (!(ch->init_status & HW_OPEN)) return -ENODEV;
- del_timer(&spch->status_timer);
-
- sppp_close(dev);
-
- ch->init_status &= ~LINE_OPEN;
- ch->line_status &= ~(PROTO_UP | PROTO_LOOP);
-
- return 0;
-}
-
-static int syncppp_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
-
- netif_stop_queue(dev);
- switch(ch->HW_send_packet(dev, skb)) {
- case FRAME_QUEUED:
- netif_wake_queue(dev);
- break;
- case FRAME_ACCEPTED:
- case FRAME_DROPPED:
- break;
- case FRAME_ERROR:
- printk(KERN_ERR "%s: Transmit frame error (len %d)\n",
- dev->name, skb->len);
- break;
- }
- return 0;
-}
-
-
-static int syncppp_statistics(struct net_device *dev, char *page)
-{
- int len = 0;
-
- len += sprintf(page + len, " ");
- return len;
-}
-
-
-static int syncppp_exit(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
-
- sppp_detach(dev);
-
- dev->flags = 0;
- dev->type = 0;
- dev->mtu = 0;
-
- ch->LINE_rx = NULL;
- ch->LINE_tx = NULL;
- ch->LINE_status = NULL;
- ch->LINE_open = NULL;
- ch->LINE_close = NULL;
- ch->LINE_xmit = NULL;
- ch->LINE_header = NULL;
- ch->LINE_rebuild_header = NULL;
- ch->LINE_statistics = NULL;
-
- kfree(ch->LINE_privdata);
- ch->LINE_privdata = NULL;
-
- MOD_DEC_USE_COUNT;
- return 0;
-}
-
-static int syncppp_init(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct ppp_device *pppdev = (struct ppp_device *)ch->if_ptr;
-
- ch->LINE_privdata = kmalloc(sizeof(struct syncppp_data), GFP_KERNEL);
- if (!ch->LINE_privdata)
- return -ENOMEM;
-
- pppdev->dev = dev;
- sppp_attach(pppdev);
-
- if(ch->protocol == &hdlc_protocol) {
- pppdev->sppp.pp_flags |= PP_CISCO;
- dev->type = ARPHRD_HDLC;
- } else {
- pppdev->sppp.pp_flags &= ~PP_CISCO;
- dev->type = ARPHRD_PPP;
- }
-
- ch->LINE_rx = sppp_input;
- ch->LINE_tx = syncppp_tx;
- ch->LINE_status = syncppp_status;
- ch->LINE_open = syncppp_open;
- ch->LINE_close = syncppp_close;
- ch->LINE_xmit = syncppp_xmit;
- ch->LINE_header = NULL;
- ch->LINE_statistics = syncppp_statistics;
-
-
- MOD_INC_USE_COUNT;
- return 0;
-}
-
-static struct comx_protocol syncppp_protocol = {
- "ppp",
- VERSION,
- ARPHRD_PPP,
- syncppp_init,
- syncppp_exit,
- NULL
-};
-
-static struct comx_protocol hdlc_protocol = {
- "hdlc",
- VERSION,
- ARPHRD_PPP,
- syncppp_init,
- syncppp_exit,
- NULL
-};
-
-static int __init comx_proto_ppp_init(void)
-{
- int ret;
-
- ret = comx_register_protocol(&hdlc_protocol);
- if (!ret) {
- ret = comx_register_protocol(&syncppp_protocol);
- if (ret)
- comx_unregister_protocol(hdlc_protocol.name);
- }
- return ret;
-}
-
-static void __exit comx_proto_ppp_exit(void)
-{
- comx_unregister_protocol(syncppp_protocol.name);
- comx_unregister_protocol(hdlc_protocol.name);
-}
-
-module_init(comx_proto_ppp_init);
-module_exit(comx_proto_ppp_exit);
+++ /dev/null
-/*
- * Device driver framework for the COMX line of synchronous serial boards
- *
- * for Linux kernel 2.2.X / 2.4.X
- *
- * Original authors: Arpad Bakay <bakay.arpad@synergon.hu>,
- * Peter Bajan <bajan.peter@synergon.hu>,
- * Previous maintainer: Tivadar Szemethy <tiv@itc.hu>
- * Current maintainer: Gergely Madarasz <gorgo@itc.hu>
- *
- * Copyright (C) 1995-1999 ITConsult-Pro Co.
- *
- * Contributors:
- * Arnaldo Carvalho de Melo <acme@conectiva.com.br> (0.85)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Version 0.80 (99/06/11):
- * - clean up source code (playing a bit of indent)
- * - port back to kernel, add support for non-module versions
- * - add support for board resets when channel protocol is down
- * - reset the device structure after protocol exit
- * the syncppp driver needs it
- * - add support for /proc/comx/protocols and
- * /proc/comx/boardtypes
- *
- * Version 0.81 (99/06/21):
- * - comment out the board reset support code, the locomx
- * driver seems not buggy now
- * - printk() levels fixed
- *
- * Version 0.82 (99/07/08):
- * - Handle stats correctly if the lowlevel driver is
- * is not a comx one (locomx - z85230)
- *
- * Version 0.83 (99/07/15):
- * - reset line_status when interface is down
- *
- * Version 0.84 (99/12/01):
- * - comx_status should not check for IFF_UP (to report
- * line status from dev->open())
- *
- * Version 0.85 (00/08/15):
- * - resource release on failure in comx_mkdir
- * - fix return value on failure at comx_write_proc
- *
- * Changed (00/10/29, Henner Eisen):
- * - comx_rx() / comxlapb_data_indication() return status.
- */
-
-#define VERSION "0.85"
-
-#include <linux/config.h>
-#include <linux/module.h>
-
-#include <linux/types.h>
-#include <linux/jiffies.h>
-#include <linux/netdevice.h>
-#include <linux/proc_fs.h>
-#include <asm/uaccess.h>
-#include <linux/ctype.h>
-#include <linux/init.h>
-#include <linux/smp_lock.h>
-
-#ifdef CONFIG_KMOD
-#include <linux/kmod.h>
-#endif
-
-#ifndef CONFIG_PROC_FS
-#error For now, COMX really needs the /proc filesystem
-#endif
-
-#include <net/syncppp.h>
-#include "comx.h"
-
-MODULE_AUTHOR("Gergely Madarasz <gorgo@itc.hu>");
-MODULE_DESCRIPTION("Common code for the COMX synchronous serial adapters");
-MODULE_LICENSE("GPL");
-
-static struct comx_hardware *comx_channels = NULL;
-static struct comx_protocol *comx_lines = NULL;
-
-static int comx_mkdir(struct inode *, struct dentry *, int);
-static int comx_rmdir(struct inode *, struct dentry *);
-static struct dentry *comx_lookup(struct inode *, struct dentry *, struct nameidata *);
-
-static struct inode_operations comx_root_inode_ops = {
- .lookup = comx_lookup,
- .mkdir = comx_mkdir,
- .rmdir = comx_rmdir,
-};
-
-static int comx_delete_dentry(struct dentry *dentry);
-static struct proc_dir_entry *create_comx_proc_entry(char *name, int mode,
- int size, struct proc_dir_entry *dir);
-
-static struct dentry_operations comx_dentry_operations = {
- .d_delete = comx_delete_dentry,
-};
-
-
-static struct proc_dir_entry * comx_root_dir;
-
-struct comx_debugflags_struct comx_debugflags[] = {
- { "comx_rx", DEBUG_COMX_RX },
- { "comx_tx", DEBUG_COMX_TX },
- { "hw_tx", DEBUG_HW_TX },
- { "hw_rx", DEBUG_HW_RX },
- { "hdlc_keepalive", DEBUG_HDLC_KEEPALIVE },
- { "comxppp", DEBUG_COMX_PPP },
- { "comxlapb", DEBUG_COMX_LAPB },
- { "dlci", DEBUG_COMX_DLCI },
- { NULL, 0 }
-};
-
-
-int comx_debug(struct net_device *dev, char *fmt, ...)
-{
- struct comx_channel *ch = dev->priv;
- char *page,*str;
- va_list args;
- int len;
-
- if (!ch->debug_area) return 0;
-
- if (!(page = (char *)__get_free_page(GFP_ATOMIC))) return -ENOMEM;
-
- va_start(args, fmt);
- len = vsprintf(str = page, fmt, args);
- va_end(args);
-
- if (len >= PAGE_SIZE) {
- printk(KERN_ERR "comx_debug: PANIC! len = %d !!!\n", len);
- free_page((unsigned long)page);
- return -EINVAL;
- }
-
- while (len) {
- int to_copy;
- int free = (ch->debug_start - ch->debug_end + ch->debug_size)
- % ch->debug_size;
-
- to_copy = min_t(int, free ? free : ch->debug_size,
- min_t(int, ch->debug_size - ch->debug_end, len));
- memcpy(ch->debug_area + ch->debug_end, str, to_copy);
- str += to_copy;
- len -= to_copy;
- ch->debug_end = (ch->debug_end + to_copy) % ch->debug_size;
- if (ch->debug_start == ch->debug_end) // Full ? push start away
- ch->debug_start = (ch->debug_start + len + 1) %
- ch->debug_size;
- ch->debug_file->size = (ch->debug_end - ch->debug_start +
- ch->debug_size) % ch->debug_size;
- }
-
- free_page((unsigned long)page);
- return 0;
-}
-
-int comx_debug_skb(struct net_device *dev, struct sk_buff *skb, char *msg)
-{
- struct comx_channel *ch = dev->priv;
-
- if (!ch->debug_area) return 0;
- if (!skb) comx_debug(dev, "%s: %s NULL skb\n\n", dev->name, msg);
- if (!skb->len) comx_debug(dev, "%s: %s empty skb\n\n", dev->name, msg);
-
- return comx_debug_bytes(dev, skb->data, skb->len, msg);
-}
-
-int comx_debug_bytes(struct net_device *dev, unsigned char *bytes, int len,
- char *msg)
-{
- int pos = 0;
- struct comx_channel *ch = dev->priv;
-
- if (!ch->debug_area) return 0;
-
- comx_debug(dev, "%s: %s len %d\n", dev->name, msg, len);
-
- while (pos != len) {
- char line[80];
- int i = 0;
-
- memset(line, 0, 80);
- sprintf(line,"%04d ", pos);
- do {
- sprintf(line + 5 + (pos % 16) * 3, "%02x", bytes[pos]);
- sprintf(line + 60 + (pos % 16), "%c",
- isprint(bytes[pos]) ? bytes[pos] : '.');
- pos++;
- } while (pos != len && pos % 16);
-
- while ( i++ != 78 ) if (line[i] == 0) line[i] = ' ';
- line[77] = '\n';
- line[78] = 0;
-
- comx_debug(dev, "%s", line);
- }
- comx_debug(dev, "\n");
- return 0;
-}
-
-static void comx_loadavg_timerfun(unsigned long d)
-{
- struct net_device *dev = (struct net_device *)d;
- struct comx_channel *ch = dev->priv;
-
- ch->avg_bytes[ch->loadavg_counter] = ch->current_stats->rx_bytes;
- ch->avg_bytes[ch->loadavg_counter + ch->loadavg_size] =
- ch->current_stats->tx_bytes;
-
- ch->loadavg_counter = (ch->loadavg_counter + 1) % ch->loadavg_size;
-
- mod_timer(&ch->loadavg_timer,jiffies + HZ * ch->loadavg[0]);
-}
-
-#if 0
-static void comx_reset_timerfun(unsigned long d)
-{
- struct net_device *dev = (struct net_device *)d;
- struct comx_channel *ch = dev->priv;
-
- if(!(ch->line_status & (PROTO_LOOP | PROTO_UP))) {
- if(test_and_set_bit(0,&ch->reset_pending) && ch->HW_reset) {
- ch->HW_reset(dev);
- }
- }
-
- mod_timer(&ch->reset_timer, jiffies + HZ * ch->reset_timeout);
-}
-#endif
-
-static int comx_open(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct proc_dir_entry *comxdir = ch->procdir->subdir;
- int ret=0;
-
- if (!ch->protocol || !ch->hardware) return -ENODEV;
-
- if ((ret = ch->HW_open(dev))) return ret;
- if ((ret = ch->LINE_open(dev))) {
- ch->HW_close(dev);
- return ret;
- };
-
- for (; comxdir ; comxdir = comxdir->next) {
- if (strcmp(comxdir->name, FILENAME_HARDWARE) == 0 ||
- strcmp(comxdir->name, FILENAME_PROTOCOL) == 0)
- comxdir->mode = S_IFREG | 0444;
- }
-
-#if 0
- ch->reset_pending = 1;
- ch->reset_timeout = 30;
- ch->reset_timer.function = comx_reset_timerfun;
- ch->reset_timer.data = (unsigned long)dev;
- ch->reset_timer.expires = jiffies + HZ * ch->reset_timeout;
- add_timer(&ch->reset_timer);
-#endif
-
- return 0;
-}
-
-static int comx_close(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- struct proc_dir_entry *comxdir = ch->procdir->subdir;
- int ret = -ENODEV;
-
- if (test_and_clear_bit(0, &ch->lineup_pending)) {
- del_timer(&ch->lineup_timer);
- }
-
-#if 0
- del_timer(&ch->reset_timer);
-#endif
-
- if (ch->init_status & LINE_OPEN && ch->protocol && ch->LINE_close) {
- ret = ch->LINE_close(dev);
- }
-
- if (ret) return ret;
-
- if (ch->init_status & HW_OPEN && ch->hardware && ch->HW_close) {
- ret = ch->HW_close(dev);
- }
-
- ch->line_status=0;
-
- for (; comxdir ; comxdir = comxdir->next) {
- if (strcmp(comxdir->name, FILENAME_HARDWARE) == 0 ||
- strcmp(comxdir->name, FILENAME_PROTOCOL) == 0)
- comxdir->mode = S_IFREG | 0644;
- }
-
- return ret;
-}
-
-void comx_status(struct net_device *dev, int status)
-{
- struct comx_channel *ch = dev->priv;
-
-#if 0
- if(status & (PROTO_UP | PROTO_LOOP)) {
- clear_bit(0,&ch->reset_pending);
- }
-#endif
-
- printk(KERN_NOTICE "Interface %s: modem status %s, line protocol %s\n",
- dev->name, status & LINE_UP ? "UP" : "DOWN",
- status & PROTO_LOOP ? "LOOP" : status & PROTO_UP ?
- "UP" : "DOWN");
-
- ch->line_status = status;
-}
-
-static int comx_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
- int rc;
-
- if (skb->len > dev->mtu + dev->hard_header_len) {
- printk(KERN_ERR "comx_xmit: %s: skb->len %d > dev->mtu %d\n", dev->name,
- (int)skb->len, dev->mtu);
- }
-
- if (ch->debug_flags & DEBUG_COMX_TX) {
- comx_debug_skb(dev, skb, "comx_xmit skb");
- }
-
- rc=ch->LINE_xmit(skb, dev);
-// if (!rc) dev_kfree_skb(skb);
-
- return rc;
-}
-
-static int comx_header(struct sk_buff *skb, struct net_device *dev,
- unsigned short type, void *daddr, void *saddr, unsigned len)
-{
- struct comx_channel *ch = dev->priv;
-
- if (ch->LINE_header) {
- return (ch->LINE_header(skb, dev, type, daddr, saddr, len));
- } else {
- return 0;
- }
-}
-
-static int comx_rebuild_header(struct sk_buff *skb)
-{
- struct net_device *dev = skb->dev;
- struct comx_channel *ch = dev->priv;
-
- if (ch->LINE_rebuild_header) {
- return(ch->LINE_rebuild_header(skb));
- } else {
- return 0;
- }
-}
-
-int comx_rx(struct net_device *dev, struct sk_buff *skb)
-{
- struct comx_channel *ch = dev->priv;
-
- if (ch->debug_flags & DEBUG_COMX_RX) {
- comx_debug_skb(dev, skb, "comx_rx skb");
- }
- if (skb) {
- netif_rx(skb);
- dev->last_rx = jiffies;
- }
- return 0;
-}
-
-static struct net_device_stats *comx_stats(struct net_device *dev)
-{
- struct comx_channel *ch = dev->priv;
-
- return ch->current_stats;
-}
-
-void comx_lineup_func(unsigned long d)
-{
- struct net_device *dev = (struct net_device *)d;
- struct comx_channel *ch = dev->priv;
-
- del_timer(&ch->lineup_timer);
- clear_bit(0, &ch->lineup_pending);
-
- if (ch->LINE_status) {
- ch->LINE_status(dev, ch->line_status |= LINE_UP);
- }
-}
-
-#define LOADAVG(avg, off) (int) \
- ((ch->avg_bytes[(ch->loadavg_counter - 1 + ch->loadavg_size * 2) \
- % ch->loadavg_size + off] - ch->avg_bytes[(ch->loadavg_counter - 1 \
- - ch->loadavg[avg] / ch->loadavg[0] + ch->loadavg_size * 2) \
- % ch->loadavg_size + off]) / ch->loadavg[avg] * 8)
-
-static int comx_statistics(struct net_device *dev, char *page)
-{
- struct comx_channel *ch = dev->priv;
- int len = 0;
- int tmp;
- int i = 0;
- char tmpstr[20];
- int tmpstrlen = 0;
-
- len += sprintf(page + len, "Interface administrative status is %s, "
- "modem status is %s, protocol is %s\n",
- dev->flags & IFF_UP ? "UP" : "DOWN",
- ch->line_status & LINE_UP ? "UP" : "DOWN",
- ch->line_status & PROTO_LOOP ? "LOOP" :
- ch->line_status & PROTO_UP ? "UP" : "DOWN");
- len += sprintf(page + len, "Modem status changes: %lu, Transmitter status "
- "is %s, tbusy: %d\n", ch->current_stats->tx_carrier_errors, ch->HW_txe ?
- ch->HW_txe(dev) ? "IDLE" : "BUSY" : "NOT READY", netif_running(dev));
- len += sprintf(page + len, "Interface load (input): %d / %d / %d bits/s (",
- LOADAVG(0,0), LOADAVG(1, 0), LOADAVG(2, 0));
- tmpstr[0] = 0;
- for (i=0; i != 3; i++) {
- char tf;
-
- tf = ch->loadavg[i] % 60 == 0 &&
- ch->loadavg[i] / 60 > 0 ? 'm' : 's';
- tmpstrlen += sprintf(tmpstr + tmpstrlen, "%d%c%s",
- ch->loadavg[i] / (tf == 'm' ? 60 : 1), tf,
- i == 2 ? ")\n" : "/");
- }
- len += sprintf(page + len,
- "%s (output): %d / %d / %d bits/s (%s", tmpstr,
- LOADAVG(0,ch->loadavg_size), LOADAVG(1, ch->loadavg_size),
- LOADAVG(2, ch->loadavg_size), tmpstr);
-
- len += sprintf(page + len, "Debug flags: ");
- tmp = len; i = 0;
- while (comx_debugflags[i].name) {
- if (ch->debug_flags & comx_debugflags[i].value)
- len += sprintf(page + len, "%s ",
- comx_debugflags[i].name);
- i++;
- }
- len += sprintf(page + len, "%s\n", tmp == len ? "none" : "");
-
- len += sprintf(page + len, "RX errors: len: %lu, overrun: %lu, crc: %lu, "
- "aborts: %lu\n buffer overrun: %lu, pbuffer overrun: %lu\n"
- "TX errors: underrun: %lu\n",
- ch->current_stats->rx_length_errors, ch->current_stats->rx_over_errors,
- ch->current_stats->rx_crc_errors, ch->current_stats->rx_frame_errors,
- ch->current_stats->rx_missed_errors, ch->current_stats->rx_fifo_errors,
- ch->current_stats->tx_fifo_errors);
-
- if (ch->LINE_statistics && (ch->init_status & LINE_OPEN)) {
- len += ch->LINE_statistics(dev, page + len);
- } else {
- len += sprintf(page+len, "Line status: driver not initialized\n");
- }
- if (ch->HW_statistics && (ch->init_status & HW_OPEN)) {
- len += ch->HW_statistics(dev, page + len);
- } else {
- len += sprintf(page+len, "Board status: driver not initialized\n");
- }
-
- return len;
-}
-
-static int comx_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
-{
- struct comx_channel *ch = dev->priv;
-
- if (ch->LINE_ioctl) {
- return(ch->LINE_ioctl(dev, ifr, cmd));
- }
- return -EINVAL;
-}
-
-static void comx_reset_dev(struct net_device *dev)
-{
- dev->open = comx_open;
- dev->stop = comx_close;
- dev->hard_start_xmit = comx_xmit;
- dev->hard_header = comx_header;
- dev->rebuild_header = comx_rebuild_header;
- dev->get_stats = comx_stats;
- dev->do_ioctl = comx_ioctl;
- dev->change_mtu = NULL;
- dev->tx_queue_len = 20;
- dev->flags = IFF_NOARP;
-}
-
-static int comx_init_dev(struct net_device *dev)
-{
- struct comx_channel *ch;
-
- if ((ch = kmalloc(sizeof(struct comx_channel), GFP_KERNEL)) == NULL) {
- return -ENOMEM;
- }
- memset(ch, 0, sizeof(struct comx_channel));
-
- ch->loadavg[0] = 5;
- ch->loadavg[1] = 300;
- ch->loadavg[2] = 900;
- ch->loadavg_size = ch->loadavg[2] / ch->loadavg[0] + 1;
- if ((ch->avg_bytes = kmalloc(ch->loadavg_size *
- sizeof(unsigned long) * 2, GFP_KERNEL)) == NULL) {
- kfree(ch);
- return -ENOMEM;
- }
-
- memset(ch->avg_bytes, 0, ch->loadavg_size * sizeof(unsigned long) * 2);
- ch->loadavg_counter = 0;
- ch->loadavg_timer.function = comx_loadavg_timerfun;
- ch->loadavg_timer.data = (unsigned long)dev;
- ch->loadavg_timer.expires = jiffies + HZ * ch->loadavg[0];
- add_timer(&ch->loadavg_timer);
-
- dev->priv = (void *)ch;
- ch->dev = dev;
- ch->line_status &= ~LINE_UP;
-
- ch->current_stats = &ch->stats;
-
- comx_reset_dev(dev);
- return 0;
-}
-
-static int comx_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- struct proc_dir_entry *file = (struct proc_dir_entry *)data;
- struct net_device *dev = file->parent->data;
- struct comx_channel *ch = dev->priv;
- int len = 0;
-
- if (strcmp(file->name, FILENAME_STATUS) == 0) {
- len = comx_statistics(dev, page);
- } else if (strcmp(file->name, FILENAME_HARDWARE) == 0) {
- len = sprintf(page, "%s\n", ch->hardware ?
- ch->hardware->name : HWNAME_NONE);
- } else if (strcmp(file->name, FILENAME_PROTOCOL) == 0) {
- len = sprintf(page, "%s\n", ch->protocol ?
- ch->protocol->name : PROTONAME_NONE);
- } else if (strcmp(file->name, FILENAME_LINEUPDELAY) == 0) {
- len = sprintf(page, "%01d\n", ch->lineup_delay);
- }
-
- if (off >= len) {
- *eof = 1;
- return 0;
- }
-
- *start = page + off;
- if (count >= len - off) {
- *eof = 1;
- }
- return min_t(int, count, len - off);
-}
-
-
-static int comx_root_read_proc(char *page, char **start, off_t off, int count,
- int *eof, void *data)
-{
- struct proc_dir_entry *file = (struct proc_dir_entry *)data;
- struct comx_hardware *hw;
- struct comx_protocol *line;
-
- int len = 0;
-
- if (strcmp(file->name, FILENAME_HARDWARELIST) == 0) {
- for(hw=comx_channels;hw;hw=hw->next)
- len+=sprintf(page+len, "%s\n", hw->name);
- } else if (strcmp(file->name, FILENAME_PROTOCOLLIST) == 0) {
- for(line=comx_lines;line;line=line->next)
- len+=sprintf(page+len, "%s\n", line->name);
- }
-
- if (off >= len) {
- *eof = 1;
- return 0;
- }
-
- *start = page + off;
- if (count >= len - off) {
- *eof = 1;
- }
- return min_t(int, count, len - off);
-}
-
-
-
-static int comx_write_proc(struct file *file, const char *buffer, u_long count,
- void *data)
-{
- struct proc_dir_entry *entry = (struct proc_dir_entry *)data;
- struct net_device *dev = (struct net_device *)entry->parent->data;
- struct comx_channel *ch = dev->priv;
- char *page;
- struct comx_hardware *hw = comx_channels;
- struct comx_protocol *line = comx_lines;
- int ret=0;
-
- if (count > PAGE_SIZE) {
- printk(KERN_ERR "count is %lu > %d!!!\n", count, (int)PAGE_SIZE);
- return -ENOSPC;
- }
-
- if (!(page = (char *)__get_free_page(GFP_KERNEL))) return -ENOMEM;
-
- if(copy_from_user(page, buffer, count))
- {
- count = -EFAULT;
- goto out;
- }
-
- if (page[count-1] == '\n')
- page[count-1] = '\0';
- else if (count < PAGE_SIZE)
- page[count] = '\0';
- else if (page[count]) {
- count = -EINVAL;
- goto out;
- }
-
- if (strcmp(entry->name, FILENAME_DEBUG) == 0) {
- int i;
- int ret = 0;
-
- if ((i = simple_strtoul(page, NULL, 10)) != 0) {
- unsigned long flags;
-
- save_flags(flags); cli();
- if (ch->debug_area) kfree(ch->debug_area);
- if ((ch->debug_area = kmalloc(ch->debug_size = i,
- GFP_KERNEL)) == NULL) {
- ret = -ENOMEM;
- }
- ch->debug_start = ch->debug_end = 0;
- restore_flags(flags);
- free_page((unsigned long)page);
- return ret ? ret : count;
- }
-
- if (*page != '+' && *page != '-') {
- free_page((unsigned long)page);
- return -EINVAL;
- }
- while (comx_debugflags[i].value &&
- strncmp(comx_debugflags[i].name, page + 1,
- strlen(comx_debugflags[i].name))) {
- i++;
- }
-
- if (comx_debugflags[i].value == 0) {
- printk(KERN_ERR "Invalid debug option\n");
- free_page((unsigned long)page);
- return -EINVAL;
- }
- if (*page == '+') {
- ch->debug_flags |= comx_debugflags[i].value;
- } else {
- ch->debug_flags &= ~comx_debugflags[i].value;
- }
- } else if (strcmp(entry->name, FILENAME_HARDWARE) == 0) {
- if(strlen(page)>10) {
- free_page((unsigned long)page);
- return -EINVAL;
- }
- while (hw) {
- if (strcmp(hw->name, page) == 0) {
- break;
- } else {
- hw = hw->next;
- }
- }
-#ifdef CONFIG_KMOD
- if(!hw && comx_strcasecmp(HWNAME_NONE,page) != 0){
- request_module("comx-hw-%s",page);
- }
- hw=comx_channels;
- while (hw) {
- if (comx_strcasecmp(hw->name, page) == 0) {
- break;
- } else {
- hw = hw->next;
- }
- }
-#endif
-
- if (comx_strcasecmp(HWNAME_NONE, page) != 0 && !hw) {
- free_page((unsigned long)page);
- return -ENODEV;
- }
- if (ch->init_status & HW_OPEN) {
- free_page((unsigned long)page);
- return -EBUSY;
- }
- if (ch->hardware && ch->hardware->hw_exit &&
- (ret=ch->hardware->hw_exit(dev))) {
- free_page((unsigned long)page);
- return ret;
- }
- ch->hardware = hw;
- entry->size = strlen(page) + 1;
- if (hw && hw->hw_init) hw->hw_init(dev);
- } else if (strcmp(entry->name, FILENAME_PROTOCOL) == 0) {
- if(strlen(page)>10) {
- free_page((unsigned long)page);
- return -EINVAL;
- }
- while (line) {
- if (comx_strcasecmp(line->name, page) == 0) {
- break;
- } else {
- line = line->next;
- }
- }
-#ifdef CONFIG_KMOD
- if(!line && comx_strcasecmp(PROTONAME_NONE, page) != 0) {
- request_module("comx-proto-%s",page);
- }
- line=comx_lines;
- while (line) {
- if (comx_strcasecmp(line->name, page) == 0) {
- break;
- } else {
- line = line->next;
- }
- }
-#endif
-
- if (comx_strcasecmp(PROTONAME_NONE, page) != 0 && !line) {
- free_page((unsigned long)page);
- return -ENODEV;
- }
-
- if (ch->init_status & LINE_OPEN) {
- free_page((unsigned long)page);
- return -EBUSY;
- }
-
- if (ch->protocol && ch->protocol->line_exit &&
- (ret=ch->protocol->line_exit(dev))) {
- free_page((unsigned long)page);
- return ret;
- }
- ch->protocol = line;
- entry->size = strlen(page) + 1;
- comx_reset_dev(dev);
- if (line && line->line_init) line->line_init(dev);
- } else if (strcmp(entry->name, FILENAME_LINEUPDELAY) == 0) {
- int i;
-
- if ((i = simple_strtoul(page, NULL, 10)) != 0) {
- if (i >=0 && i < 10) {
- ch->lineup_delay = i;
- } else {
- printk(KERN_ERR "comx: invalid lineup_delay value\n");
- }
- }
- }
-out:
- free_page((unsigned long)page);
- return count;
-}
-
-static int comx_mkdir(struct inode *dir, struct dentry *dentry, int mode)
-{
- struct proc_dir_entry *new_dir, *debug_file;
- struct net_device *dev;
- struct comx_channel *ch;
- int ret = -EIO;
-
- if ((dev = kmalloc(sizeof(struct net_device), GFP_KERNEL)) == NULL) {
- return -ENOMEM;
- }
- memset(dev, 0, sizeof(struct net_device));
-
- lock_kernel();
- if ((new_dir = create_proc_entry(dentry->d_name.name, mode | S_IFDIR,
- comx_root_dir)) == NULL) {
- goto cleanup_dev;
- }
-
- new_dir->nlink = 2;
- new_dir->data = NULL; // ide jon majd a struct dev
-
- /* Ezek kellenek */
- if (!create_comx_proc_entry(FILENAME_HARDWARE, 0644,
- strlen(HWNAME_NONE) + 1, new_dir)) {
- goto cleanup_new_dir;
- }
- if (!create_comx_proc_entry(FILENAME_PROTOCOL, 0644,
- strlen(PROTONAME_NONE) + 1, new_dir)) {
- goto cleanup_filename_hardware;
- }
- if (!create_comx_proc_entry(FILENAME_STATUS, 0444, 0, new_dir)) {
- goto cleanup_filename_protocol;
- }
- if (!create_comx_proc_entry(FILENAME_LINEUPDELAY, 0644, 2, new_dir)) {
- goto cleanup_filename_status;
- }
-
- if ((debug_file = create_proc_entry(FILENAME_DEBUG,
- S_IFREG | 0644, new_dir)) == NULL) {
- goto cleanup_filename_lineupdelay;
- }
- debug_file->data = (void *)debug_file;
- debug_file->read_proc = NULL; // see below
- debug_file->write_proc = &comx_write_proc;
- debug_file->nlink = 1;
-
- strcpy(dev->name, (char *)new_dir->name);
- dev->init = comx_init_dev;
-
- if (register_netdevice(dev)) {
- goto cleanup_filename_debug;
- }
- ch = dev->priv;
- if((ch->if_ptr = (void *)kmalloc(sizeof(struct ppp_device),
- GFP_KERNEL)) == NULL) {
- goto cleanup_register;
- }
- memset(ch->if_ptr, 0, sizeof(struct ppp_device));
- ch->debug_file = debug_file;
- ch->procdir = new_dir;
- new_dir->data = dev;
-
- ch->debug_start = ch->debug_end = 0;
- if ((ch->debug_area = kmalloc(ch->debug_size = DEFAULT_DEBUG_SIZE,
- GFP_KERNEL)) == NULL) {
- ret = -ENOMEM;
- goto cleanup_if_ptr;
- }
-
- ch->lineup_delay = DEFAULT_LINEUP_DELAY;
-
- MOD_INC_USE_COUNT;
- unlock_kernel();
- return 0;
-cleanup_if_ptr:
- kfree(ch->if_ptr);
-cleanup_register:
- unregister_netdevice(dev);
-cleanup_filename_debug:
- remove_proc_entry(FILENAME_DEBUG, new_dir);
-cleanup_filename_lineupdelay:
- remove_proc_entry(FILENAME_LINEUPDELAY, new_dir);
-cleanup_filename_status:
- remove_proc_entry(FILENAME_STATUS, new_dir);
-cleanup_filename_protocol:
- remove_proc_entry(FILENAME_PROTOCOL, new_dir);
-cleanup_filename_hardware:
- remove_proc_entry(FILENAME_HARDWARE, new_dir);
-cleanup_new_dir:
- remove_proc_entry(dentry->d_name.name, comx_root_dir);
-cleanup_dev:
- kfree(dev);
- unlock_kernel();
- return ret;
-}
-
-static int comx_rmdir(struct inode *dir, struct dentry *dentry)
-{
- struct proc_dir_entry *entry = PDE(dentry->d_inode);
- struct net_device *dev;
- struct comx_channel *ch;
- int ret;
-
- lock_kernel();
- dev = entry->data;
- ch = dev->priv;
- if (dev->flags & IFF_UP) {
- printk(KERN_ERR "%s: down interface before removing it\n", dev->name);
- unlock_kernel();
- return -EBUSY;
- }
-
- if (ch->protocol && ch->protocol->line_exit &&
- (ret=ch->protocol->line_exit(dev))) {
- unlock_kernel();
- return ret;
- }
- if (ch->hardware && ch->hardware->hw_exit &&
- (ret=ch->hardware->hw_exit(dev))) {
- if(ch->protocol && ch->protocol->line_init) {
- ch->protocol->line_init(dev);
- }
- unlock_kernel();
- return ret;
- }
- ch->protocol = NULL;
- ch->hardware = NULL;
-
- del_timer(&ch->loadavg_timer);
- kfree(ch->avg_bytes);
-
- unregister_netdev(dev);
- if (ch->debug_area) {
- kfree(ch->debug_area);
- }
- if (dev->priv) {
- kfree(dev->priv);
- }
- free_netdev(dev);
-
- remove_proc_entry(FILENAME_DEBUG, entry);
- remove_proc_entry(FILENAME_LINEUPDELAY, entry);
- remove_proc_entry(FILENAME_STATUS, entry);
- remove_proc_entry(FILENAME_HARDWARE, entry);
- remove_proc_entry(FILENAME_PROTOCOL, entry);
- remove_proc_entry(dentry->d_name.name, comx_root_dir);
-
- MOD_DEC_USE_COUNT;
- unlock_kernel();
- return 0;
-}
-
-static struct dentry *comx_lookup(struct inode *dir, struct dentry *dentry, struct nameidata *nd)
-{
- struct proc_dir_entry *de;
- struct inode *inode = NULL;
-
- lock_kernel();
- if ((de = PDE(dir)) != NULL) {
- for (de = de->subdir ; de ; de = de->next) {
- if ((de->namelen == dentry->d_name.len) &&
- (memcmp(dentry->d_name.name, de->name,
- de->namelen) == 0)) {
- if ((inode = proc_get_inode(dir->i_sb,
- de->low_ino, de)) == NULL) {
- printk(KERN_ERR "COMX: lookup error\n");
- unlock_kernel();
- return ERR_PTR(-EINVAL);
- }
- break;
- }
- }
- }
- unlock_kernel();
- dentry->d_op = &comx_dentry_operations;
- d_add(dentry, inode);
- return NULL;
-}
-
-int comx_strcasecmp(const char *cs, const char *ct)
-{
- register signed char __res;
-
- while (1) {
- if ((__res = toupper(*cs) - toupper(*ct++)) != 0 || !*cs++) {
- break;
- }
- }
- return __res;
-}
-
-static int comx_delete_dentry(struct dentry *dentry)
-{
- return 1;
-}
-
-static struct proc_dir_entry *create_comx_proc_entry(char *name, int mode,
- int size, struct proc_dir_entry *dir)
-{
- struct proc_dir_entry *new_file;
-
- if ((new_file = create_proc_entry(name, S_IFREG | mode, dir)) != NULL) {
- new_file->data = (void *)new_file;
- new_file->read_proc = &comx_read_proc;
- new_file->write_proc = &comx_write_proc;
- new_file->size = size;
- new_file->nlink = 1;
- }
- return(new_file);
-}
-
-int comx_register_hardware(struct comx_hardware *comx_hw)
-{
- struct comx_hardware *hw = comx_channels;
-
- if (!hw) {
- comx_channels = comx_hw;
- } else {
- while (hw->next != NULL && strcmp(comx_hw->name, hw->name) != 0) {
- hw = hw->next;
- }
- if (strcmp(comx_hw->name, hw->name) == 0) {
- return -1;
- }
- hw->next = comx_hw;
- }
-
- printk(KERN_INFO "COMX: driver for hardware type %s, version %s\n", comx_hw->name, comx_hw->version);
- return 0;
-}
-
-int comx_unregister_hardware(char *name)
-{
- struct comx_hardware *hw = comx_channels;
-
- if (!hw) {
- return -1;
- }
-
- if (strcmp(hw->name, name) == 0) {
- comx_channels = comx_channels->next;
- return 0;
- }
-
- while (hw->next != NULL && strcmp(hw->next->name,name) != 0) {
- hw = hw->next;
- }
-
- if (hw->next != NULL && strcmp(hw->next->name, name) == 0) {
- hw->next = hw->next->next;
- return 0;
- }
- return -1;
-}
-
-int comx_register_protocol(struct comx_protocol *comx_line)
-{
- struct comx_protocol *pr = comx_lines;
-
- if (!pr) {
- comx_lines = comx_line;
- } else {
- while (pr->next != NULL && strcmp(comx_line->name, pr->name) !=0) {
- pr = pr->next;
- }
- if (strcmp(comx_line->name, pr->name) == 0) {
- return -1;
- }
- pr->next = comx_line;
- }
-
- printk(KERN_INFO "COMX: driver for protocol type %s, version %s\n", comx_line->name, comx_line->version);
- return 0;
-}
-
-int comx_unregister_protocol(char *name)
-{
- struct comx_protocol *pr = comx_lines;
-
- if (!pr) {
- return -1;
- }
-
- if (strcmp(pr->name, name) == 0) {
- comx_lines = comx_lines->next;
- return 0;
- }
-
- while (pr->next != NULL && strcmp(pr->next->name,name) != 0) {
- pr = pr->next;
- }
-
- if (pr->next != NULL && strcmp(pr->next->name, name) == 0) {
- pr->next = pr->next->next;
- return 0;
- }
- return -1;
-}
-
-static int __init comx_init(void)
-{
- struct proc_dir_entry *new_file;
-
- comx_root_dir = create_proc_entry("comx",
- S_IFDIR | S_IWUSR | S_IRUGO | S_IXUGO, &proc_root);
- if (!comx_root_dir)
- return -ENOMEM;
- comx_root_dir->proc_iops = &comx_root_inode_ops;
-
- if ((new_file = create_proc_entry(FILENAME_HARDWARELIST,
- S_IFREG | 0444, comx_root_dir)) == NULL) {
- return -ENOMEM;
- }
-
- new_file->data = new_file;
- new_file->read_proc = &comx_root_read_proc;
- new_file->write_proc = NULL;
- new_file->nlink = 1;
-
- if ((new_file = create_proc_entry(FILENAME_PROTOCOLLIST,
- S_IFREG | 0444, comx_root_dir)) == NULL) {
- return -ENOMEM;
- }
-
- new_file->data = new_file;
- new_file->read_proc = &comx_root_read_proc;
- new_file->write_proc = NULL;
- new_file->nlink = 1;
-
-
- printk(KERN_INFO "COMX: driver version %s (C) 1995-1999 ITConsult-Pro Co. <info@itc.hu>\n",
- VERSION);
- return 0;
-}
-
-static void __exit comx_exit(void)
-{
- remove_proc_entry(FILENAME_HARDWARELIST, comx_root_dir);
- remove_proc_entry(FILENAME_PROTOCOLLIST, comx_root_dir);
- remove_proc_entry(comx_root_dir->name, &proc_root);
-}
-
-module_init(comx_init);
-module_exit(comx_exit);
-
-EXPORT_SYMBOL(comx_register_hardware);
-EXPORT_SYMBOL(comx_unregister_hardware);
-EXPORT_SYMBOL(comx_register_protocol);
-EXPORT_SYMBOL(comx_unregister_protocol);
-EXPORT_SYMBOL(comx_debug_skb);
-EXPORT_SYMBOL(comx_debug_bytes);
-EXPORT_SYMBOL(comx_debug);
-EXPORT_SYMBOL(comx_lineup_func);
-EXPORT_SYMBOL(comx_status);
-EXPORT_SYMBOL(comx_rx);
-EXPORT_SYMBOL(comx_strcasecmp);
-EXPORT_SYMBOL(comx_root_dir);
+++ /dev/null
-/*
- * General definitions for the COMX driver
- *
- * Original authors: Arpad Bakay <bakay.arpad@synergon.hu>,
- * Peter Bajan <bajan.peter@synergon.hu>,
- * Previous maintainer: Tivadar Szemethy <tiv@itc.hu>
- * Currently maintained by: Gergely Madarasz <gorgo@itc.hu>
- *
- * Copyright (C) 1995-1999 ITConsult-Pro Co. <info@itc.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- *
- * net_device_stats:
- * rx_length_errors rec_len < 4 || rec_len > 2000
- * rx_over_errors receive overrun (OVR)
- * rx_crc_errors rx crc error
- * rx_frame_errors aborts rec'd (ABO)
- * rx_fifo_errors status fifo overrun (PBUFOVR)
- * rx_missed_errors receive buffer overrun (BUFOVR)
- * tx_aborted_errors ?
- * tx_carrier_errors modem line status changes
- * tx_fifo_errors tx underrun (locomx)
- */
-#include <linux/config.h>
-
-struct comx_protocol {
- char *name;
- char *version;
- unsigned short encap_type;
- int (*line_init)(struct net_device *dev);
- int (*line_exit)(struct net_device *dev);
- struct comx_protocol *next;
- };
-
-struct comx_hardware {
- char *name;
- char *version;
- int (*hw_init)(struct net_device *dev);
- int (*hw_exit)(struct net_device *dev);
- int (*hw_dump)(struct net_device *dev);
- struct comx_hardware *next;
- };
-
-struct comx_channel {
- void *if_ptr; // General purpose pointer
- struct net_device *dev; // Where we belong to
- struct net_device *twin; // On dual-port cards
- struct proc_dir_entry *procdir; // the directory
-
- unsigned char init_status;
- unsigned char line_status;
-
- struct timer_list lineup_timer; // against line jitter
- long int lineup_pending;
- unsigned char lineup_delay;
-
-#if 0
- struct timer_list reset_timer; // for board resetting
- long reset_pending;
- int reset_timeout;
-#endif
-
- struct net_device_stats stats;
- struct net_device_stats *current_stats;
-#if 0
- unsigned long board_resets;
-#endif
- unsigned long *avg_bytes;
- int loadavg_counter, loadavg_size;
- int loadavg[3];
- struct timer_list loadavg_timer;
- int debug_flags;
- char *debug_area;
- int debug_start, debug_end, debug_size;
- struct proc_dir_entry *debug_file;
-#ifdef CONFIG_COMX_DEBUG_RAW
- char *raw;
- int raw_len;
-#endif
- // LINE specific
- struct comx_protocol *protocol;
- void (*LINE_rx)(struct net_device *dev, struct sk_buff *skb);
- int (*LINE_tx)(struct net_device *dev);
- void (*LINE_status)(struct net_device *dev, u_short status);
- int (*LINE_open)(struct net_device *dev);
- int (*LINE_close)(struct net_device *dev);
- int (*LINE_xmit)(struct sk_buff *skb, struct net_device *dev);
- int (*LINE_header)(struct sk_buff *skb, struct net_device *dev,
- u_short type,void *daddr, void *saddr,
- unsigned len);
- int (*LINE_rebuild_header)(struct sk_buff *skb);
- int (*LINE_statistics)(struct net_device *dev, char *page);
- int (*LINE_parameter_check)(struct net_device *dev);
- int (*LINE_ioctl)(struct net_device *dev, struct ifreq *ifr,
- int cmd);
- void (*LINE_mod_use)(int);
- void * LINE_privdata;
-
- // HW specific
-
- struct comx_hardware *hardware;
- void (*HW_board_on)(struct net_device *dev);
- void (*HW_board_off)(struct net_device *dev);
- struct net_device *(*HW_access_board)(struct net_device *dev);
- void (*HW_release_board)(struct net_device *dev, struct net_device *savep);
- int (*HW_txe)(struct net_device *dev);
- int (*HW_open)(struct net_device *dev);
- int (*HW_close)(struct net_device *dev);
- int (*HW_send_packet)(struct net_device *dev,struct sk_buff *skb);
- int (*HW_statistics)(struct net_device *dev, char *page);
-#if 0
- int (*HW_reset)(struct net_device *dev, char *page);
-#endif
- int (*HW_load_board)(struct net_device *dev);
- void (*HW_set_clock)(struct net_device *dev);
- void *HW_privdata;
- };
-
-struct comx_debugflags_struct {
- char *name;
- int value;
- };
-
-#define COMX_ROOT_DIR_NAME "comx"
-
-#define FILENAME_HARDWARE "boardtype"
-#define FILENAME_HARDWARELIST "boardtypes"
-#define FILENAME_PROTOCOL "protocol"
-#define FILENAME_PROTOCOLLIST "protocols"
-#define FILENAME_DEBUG "debug"
-#define FILENAME_CLOCK "clock"
-#define FILENAME_STATUS "status"
-#define FILENAME_IO "io"
-#define FILENAME_IRQ "irq"
-#define FILENAME_KEEPALIVE "keepalive"
-#define FILENAME_LINEUPDELAY "lineup_delay"
-#define FILENAME_CHANNEL "channel"
-#define FILENAME_FIRMWARE "firmware"
-#define FILENAME_MEMADDR "memaddr"
-#define FILENAME_TWIN "twin"
-#define FILENAME_T1 "t1"
-#define FILENAME_T2 "t2"
-#define FILENAME_N2 "n2"
-#define FILENAME_WINDOW "window"
-#define FILENAME_MODE "mode"
-#define FILENAME_DLCI "dlci"
-#define FILENAME_MASTER "master"
-#ifdef CONFIG_COMX_DEBUG_RAW
-#define FILENAME_RAW "raw"
-#endif
-
-#define PROTONAME_NONE "none"
-#define HWNAME_NONE "none"
-#define KEEPALIVE_OFF "off"
-
-#define FRAME_ACCEPTED 0 /* sending and xmitter busy */
-#define FRAME_DROPPED 1
-#define FRAME_ERROR 2 /* xmitter error */
-#define FRAME_QUEUED 3 /* sending but more can come */
-
-#define LINE_UP 1 /* Modem UP */
-#define PROTO_UP 2
-#define PROTO_LOOP 4
-
-#define HW_OPEN 1
-#define LINE_OPEN 2
-#define FW_LOADED 4
-#define IRQ_ALLOCATED 8
-
-#define DEBUG_COMX_RX 2
-#define DEBUG_COMX_TX 4
-#define DEBUG_HW_TX 16
-#define DEBUG_HW_RX 32
-#define DEBUG_HDLC_KEEPALIVE 64
-#define DEBUG_COMX_PPP 128
-#define DEBUG_COMX_LAPB 256
-#define DEBUG_COMX_DLCI 512
-
-#define DEBUG_PAGESIZE 3072
-#define DEFAULT_DEBUG_SIZE 4096
-#define DEFAULT_LINEUP_DELAY 1
-#define FILE_PAGESIZE 3072
-
-#ifndef COMX_PPP_MAJOR
-#define COMX_PPP_MAJOR 88
-#endif
-
-
-#define COMX_CHANNEL(dev) ((struct comx_channel*)dev->priv)
-
-#define TWIN(dev) (COMX_CHANNEL(dev)->twin)
-
-
-#ifndef byte
-typedef u8 byte;
-#endif
-#ifndef word
-typedef u16 word;
-#endif
-
-#ifndef SEEK_SET
-#define SEEK_SET 0
-#endif
-#ifndef SEEK_CUR
-#define SEEK_CUR 1
-#endif
-#ifndef SEEK_END
-#define SEEK_END 2
-#endif
-
-extern struct proc_dir_entry * comx_root_dir;
-
-extern int comx_register_hardware(struct comx_hardware *comx_hw);
-extern int comx_unregister_hardware(char *name);
-extern int comx_register_protocol(struct comx_protocol *comx_line);
-extern int comx_unregister_protocol(char *name);
-
-extern int comx_rx(struct net_device *dev, struct sk_buff *skb);
-extern void comx_status(struct net_device *dev, int status);
-extern void comx_lineup_func(unsigned long d);
-
-extern int comx_debug(struct net_device *dev, char *fmt, ...);
-extern int comx_debug_skb(struct net_device *dev, struct sk_buff *skb, char *msg);
-extern int comx_debug_bytes(struct net_device *dev, unsigned char *bytes, int len,
- char *msg);
-extern int comx_strcasecmp(const char *cs, const char *ct);
-
-extern struct inode_operations comx_normal_inode_ops;
+++ /dev/null
-/*
- * Defines for comxhw.c
- *
- * Original authors: Arpad Bakay <bakay.arpad@synergon.hu>,
- * Peter Bajan <bajan.peter@synergon.hu>,
- * Previous maintainer: Tivadar Szemethy <tiv@itc.hu>
- * Current maintainer: Gergely Madarasz <gorgo@itc.hu>
- *
- * Copyright (C) 1995-1999 ITConsult-Pro Co. <info@itc.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#define LOCOMX_IO_EXTENT 8
-#define COMX_IO_EXTENT 4
-#define HICOMX_IO_EXTENT 16
-
-#define COMX_MAX_TX_SIZE 1600
-#define COMX_MAX_RX_SIZE 2048
-
-#define COMX_JAIL_OFFSET 0xffff
-#define COMX_JAIL_VALUE 0xfe
-#define COMX_MEMORY_SIZE 65536
-#define HICOMX_MEMORY_SIZE 16384
-#define COMX_MEM_MIN 0xa0000
-#define COMX_MEM_MAX 0xf0000
-
-#define COMX_DEFAULT_IO 0x360
-#define COMX_DEFAULT_IRQ 10
-#define COMX_DEFAULT_MEMADDR 0xd0000
-#define HICOMX_DEFAULT_IO 0x320
-#define HICOMX_DEFAULT_IRQ 10
-#define HICOMX_DEFAULT_MEMADDR 0xd0000
-#define LOCOMX_DEFAULT_IO 0x368
-#define LOCOMX_DEFAULT_IRQ 7
-
-#define MAX_CHANNELNO 2
-
-#define COMX_CHANNEL_OFFSET 0x2000
-
-#define COMX_ENABLE_BOARD_IT 0x40
-#define COMX_BOARD_RESET 0x20
-#define COMX_ENABLE_BOARD_MEM 0x10
-#define COMX_DISABLE_BOARD_MEM 0
-#define COMX_DISABLE_ALL 0x00
-
-#define HICOMX_DISABLE_ALL 0x00
-#define HICOMX_ENABLE_BOARD_MEM 0x02
-#define HICOMX_DISABLE_BOARD_MEM 0x0
-#define HICOMX_BOARD_RESET 0x01
-#define HICOMX_PRG_MEM 4
-#define HICOMX_DATA_MEM 0
-#define HICOMX_ID_BYTE 0x55
-
-#define CMX_ID_BYTE 0x31
-#define COMX_CLOCK_CONST 8000
-
-#define LINKUP_READY 3
-
-#define OFF_FW_L1_ID 0x01e /* ID bytes */
-#define OFF_FW_L2_ID 0x1006
-#define FW_L1_ID_1 0xab
-#define FW_L1_ID_2_COMX 0xc0
-#define FW_L1_ID_2_HICOMX 0xc1
-#define FW_L2_ID_1 0xab
-
-#define OFF_A_L2_CMD 0x130 /* command register for L2 */
-#define OFF_A_L2_CMDPAR 0x131 /* command parameter byte */
-#define OFF_A_L1_STATB 0x122 /* stat. block for L1 */
-#define OFF_A_L1_ABOREC 0x122 /* receive ABORT counter */
-#define OFF_A_L1_OVERRUN 0x123 /* receive overrun counter */
-#define OFF_A_L1_CRCREC 0x124 /* CRC error counter */
-#define OFF_A_L1_BUFFOVR 0x125 /* buffer overrun counter */
-#define OFF_A_L1_PBUFOVR 0x126 /* priority buffer overrun counter */
-#define OFF_A_L1_MODSTAT 0x127 /* current state of modem ctrl lines */
-#define OFF_A_L1_STATE 0x127 /* end of stat. block for L1 */
-#define OFF_A_L1_TXPC 0x128 /* Tx counter for the PC */
-#define OFF_A_L1_TXZ80 0x129 /* Tx counter for the Z80 */
-#define OFF_A_L1_RXPC 0x12a /* Rx counter for the PC */
-#define OFF_A_L1_RXZ80 0x12b /* Rx counter for the Z80 */
-#define OFF_A_L1_REPENA 0x12c /* IT rep disable */
-#define OFF_A_L1_CHNR 0x12d /* L1 channel logical number */
-#define OFF_A_L1_CLKINI 0x12e /* Timer Const */
-#define OFF_A_L2_LINKUP 0x132 /* Linkup byte */
-#define OFF_A_L2_DAV 0x134 /* Rx DAV */
-#define OFF_A_L2_RxBUFP 0x136 /* Rx buff relative to membase */
-#define OFF_A_L2_TxEMPTY 0x138 /* Tx Empty */
-#define OFF_A_L2_TxBUFP 0x13a /* Tx Buf */
-#define OFF_A_L2_NBUFFS 0x144 /* Number of buffers to fetch */
-
-#define OFF_A_L2_SABMREC 0x164 /* LAPB no. of SABMs received */
-#define OFF_A_L2_SABMSENT 0x165 /* LAPB no. of SABMs sent */
-#define OFF_A_L2_REJREC 0x166 /* LAPB no. of REJs received */
-#define OFF_A_L2_REJSENT 0x167 /* LAPB no. of REJs sent */
-#define OFF_A_L2_FRMRREC 0x168 /* LAPB no. of FRMRs received */
-#define OFF_A_L2_FRMRSENT 0x169 /* LAPB no. of FRMRs sent */
-#define OFF_A_L2_PROTERR 0x16A /* LAPB no. of protocol errors rec'd */
-#define OFF_A_L2_LONGREC 0x16B /* LAPB no. of long frames */
-#define OFF_A_L2_INVNR 0x16C /* LAPB no. of invalid N(R)s rec'd */
-#define OFF_A_L2_UNDEFFR 0x16D /* LAPB no. of invalid frames */
-
-#define OFF_A_L2_T1 0x174 /* T1 timer */
-#define OFF_A_L2_ADDR 0x176 /* DCE = 1, DTE = 3 */
-
-#define COMX_CMD_INIT 1
-#define COMX_CMD_EXIT 2
-#define COMX_CMD_OPEN 16
-#define COMX_CMD_CLOSE 17
-
+++ /dev/null
-/*
- * Defines for comx-hw-slicecom.c - FALC-LH specific
- *
- * Author: Bartok Istvan <bartoki@itc.hu>
- * Last modified: Mon Feb 7 20:00:38 CET 2000
- *
- * :set tabstop=6
- */
-
-/*
- * Control register offsets on the LBI (page 90)
- * use it like:
- * lbi[ MODE ] = 0x34;
- */
-
-#define MODE 0x03
-#define IPC 0x08
-#define IMR0 0x14 /* Interrupt Mask Register 0 */
-#define IMR1 0x15
-#define IMR2 0x16
-#define IMR3 0x17
-#define IMR4 0x18
-#define IMR5 0x19
-#define FMR0 0x1a /* Framer Mode Register 0 */
-#define FMR1 0x1b
-#define FMR2 0x1c
-#define XSW 0x1e
-#define XSP 0x1f
-#define XC0 0x20
-#define XC1 0x21
-#define RC0 0x22
-#define RC1 0x23
-#define XPM0 0x24
-#define XPM1 0x25
-#define XPM2 0x26
-#define TSWM 0x27
-#define IDLE 0x29 /* Idle Code */
-#define LIM0 0x34
-#define LIM1 0x35
-#define PCD 0x36
-#define PCR 0x37
-#define LIM2 0x38
-
-/*
- * Status registers on the LBI (page 134)
- * these are read-only, use it like:
- * if( lbi[ FRS0 ] ) ...
- */
-
-#define FRS0 0x4c /* Framer Receive Status register 0 */
-#define FRS1 0x4d /* Framer Receive Status register 1 */
-#define FECL 0x50 /* Framing Error Counter low byte */ /* Counts FAS word receive errors */
-#define FECH 0x51 /* high byte */
-#define CVCL 0x52 /* Code Violation Counter low byte */ /* Counts bipolar and HDB3 code violations */
-#define CVCH 0x53 /* high byte */
-#define CEC1L 0x54 /* CRC4 Error Counter 1 low byte */ /* Counts CRC4 errors in the incoming stream */
-#define CEC1H 0x55 /* high byte */
-#define EBCL 0x56 /* E Bit error Counter low byte */ /* E-bits: the remote end sends them, when */
-#define EBCH 0x57 /* high byte */ /* it detected a CRC4-error */
-#define ISR0 0x68 /* Interrupt Status Register 0 */
-#define ISR1 0x69 /* Interrupt Status Register 1 */
-#define ISR2 0x6a /* Interrupt Status Register 2 */
-#define ISR3 0x6b /* Interrupt Status Register 3 */
-#define ISR5 0x6c /* Interrupt Status Register 5 */
-#define GIS 0x6e /* Global Interrupt Status Register */
-#define VSTR 0x6f /* version information */
-
-/*
- * Bit fields
- */
-
-#define FRS0_LOS (1 << 7)
-#define FRS0_AIS (1 << 6)
-#define FRS0_LFA (1 << 5)
-#define FRS0_RRA (1 << 4)
-#define FRS0_AUXP (1 << 3)
-#define FRS0_NMF (1 << 2)
-#define FRS0_LMFA (1 << 1)
-
-#define FRS1_XLS (1 << 1)
-#define FRS1_XLO (1)
-
-#define ISR2_FAR (1 << 7)
-#define ISR2_LFA (1 << 6)
-#define ISR2_MFAR (1 << 5)
-#define ISR2_T400MS (1 << 4)
-#define ISR2_AIS (1 << 3)
-#define ISR2_LOS (1 << 2)
-#define ISR2_RAR (1 << 1)
-#define ISR2_RA (1)
-
-#define ISR3_ES (1 << 7)
-#define ISR3_SEC (1 << 6)
-#define ISR3_LMFA16 (1 << 5)
-#define ISR3_AIS16 (1 << 4)
-#define ISR3_RA16 (1 << 3)
-#define ISR3_API (1 << 2)
-#define ISR3_RSN (1 << 1)
-#define ISR3_RSP (1)
-
-#define ISR5_XSP (1 << 7)
-#define ISR5_XSN (1 << 6)
+++ /dev/null
-#define HSCX_MTU 1600
-
-#define HSCX_ISTA 0x00
-#define HSCX_MASK 0x00
-#define HSCX_STAR 0x01
-#define HSCX_CMDR 0x01
-#define HSCX_MODE 0x02
-#define HSCX_TIMR 0x03
-#define HSCX_EXIR 0x04
-#define HSCX_XAD1 0x04
-#define HSCX_RBCL 0x05
-#define HSCX_SAD2 0x05
-#define HSCX_RAH1 0x06
-#define HSCX_RSTA 0x07
-#define HSCX_RAH2 0x07
-#define HSCX_RAL1 0x08
-#define HSCX_RCHR 0x09
-#define HSCX_RAL2 0x09
-#define HSCX_XBCL 0x0a
-#define HSCX_BGR 0x0b
-#define HSCX_CCR2 0x0c
-#define HSCX_RBCH 0x0d
-#define HSCX_XBCH 0x0d
-#define HSCX_VSTR 0x0e
-#define HSCX_RLCR 0x0e
-#define HSCX_CCR1 0x0f
-#define HSCX_FIFO 0x1e
-
-#define HSCX_HSCX_CHOFFS 0x400
-#define HSCX_SEROFFS 0x1000
-
-#define HSCX_RME 0x80
-#define HSCX_RPF 0x40
-#define HSCX_RSC 0x20
-#define HSCX_XPR 0x10
-#define HSCX_TIN 0x08
-#define HSCX_ICA 0x04
-#define HSCX_EXA 0x02
-#define HSCX_EXB 0x01
-
-#define HSCX_XMR 0x80
-#define HSCX_XDU 0x40
-#define HSCX_EXE 0x40
-#define HSCX_PCE 0x20
-#define HSCX_RFO 0x10
-#define HSCX_CSC 0x08
-#define HSCX_RFS 0x04
-
-#define HSCX_XDOV 0x80
-#define HSCX_XFW 0x40
-#define HSCX_XRNR 0x20
-#define HSCX_RRNR 0x10
-#define HSCX_RLI 0x08
-#define HSCX_CEC 0x04
-#define HSCX_CTS 0x02
-#define HSCX_WFA 0x01
-
-#define HSCX_RMC 0x80
-#define HSCX_RHR 0x40
-#define HSCX_RNR 0x20
-#define HSCX_XREP 0x20
-#define HSCX_STI 0x10
-#define HSCX_XTF 0x08
-#define HSCX_XIF 0x04
-#define HSCX_XME 0x02
-#define HSCX_XRES 0x01
-
-#define HSCX_AUTO 0x00
-#define HSCX_NONAUTO 0x40
-#define HSCX_TRANS 0x80
-#define HSCX_XTRANS 0xc0
-#define HSCX_ADM16 0x20
-#define HSCX_ADM8 0x00
-#define HSCX_TMD_EXT 0x00
-#define HSCX_TMD_INT 0x10
-#define HSCX_RAC 0x08
-#define HSCX_RTS 0x04
-#define HSCX_TLP 0x01
-
-#define HSCX_VFR 0x80
-#define HSCX_RDO 0x40
-#define HSCX_CRC 0x20
-#define HSCX_RAB 0x10
-
-#define HSCX_CIE 0x04
-#define HSCX_RIE 0x02
-
-#define HSCX_DMA 0x80
-#define HSCX_NRM 0x40
-#define HSCX_CAS 0x20
-#define HSCX_XC 0x10
-
-#define HSCX_OV 0x10
-
-#define HSCX_CD 0x80
-
-#define HSCX_RC 0x80
-
-#define HSCX_PU 0x80
-#define HSCX_NRZ 0x00
-#define HSCX_NRZI 0x40
-#define HSCX_ODS 0x10
-#define HSCX_ITF 0x08
+++ /dev/null
-/*
- * Defines for the mixcom board
- *
- * Author: Gergely Madarasz <gorgo@itc.hu>
- *
- * Copyright (C) 1999 ITConsult-Pro Co. <info@itc.hu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#define MIXCOM_IO_EXTENT 0x20
-
-#define MIXCOM_DEFAULT_IO 0x180
-#define MIXCOM_DEFAULT_IRQ 5
-
-#define MIXCOM_ID 0x11
-#define MIXCOM_SERIAL_OFFSET 0x1000
-#define MIXCOM_CHANNEL_OFFSET 0x400
-#define MIXCOM_IT_OFFSET 0xc14
-#define MIXCOM_STATUS_OFFSET 0xc14
-#define MIXCOM_ID_OFFSET 0xc10
-#define MIXCOM_ON 0x1
-#define MIXCOM_OFF 0x0
-
-/* Status register bits */
-
-#define MIXCOM_CTSB 0x1
-#define MIXCOM_CTSA 0x2
-#define MIXCOM_CHANNELNO 0x20
-#define MIXCOM_POWERFAIL 0x40
-#define MIXCOM_BOOT 0x80
+++ /dev/null
-/*
- * Defines for comx-hw-slicecom.c - MUNICH32X specific
- *
- * Author: Bartok Istvan <bartoki@itc.hu>
- * Last modified: Tue Jan 11 14:27:36 CET 2000
- *
- * :set tabstop=6
- */
-
-#define TXBUFFER_SIZE 1536 /* Max mennyit tud a kartya hardver atvenni */
-#define RXBUFFER_SIZE (TXBUFFER_SIZE+4) /* For Rx reasons it must be a multiple of 4, and =>4 (page 265) */
- /* +4 .. see page 265, bit FE */
- /* TOD: a MODE1-be nem is ezt teszem, hanem a TXBUFFER-t, lehet hogy nem is kell? */
-
-//#define PCI_VENDOR_ID_SIEMENS 0x110a
-#define PCI_DEVICE_ID_SIEMENS_MUNICH32X 0x2101
-
-/*
- * PCI config space registers (page 120)
- */
-
-#define MUNICH_PCI_PCIRES 0x4c /* 0xe0000 resets the chip */
-
-
-/*
- * MUNICH slave register offsets relative to base_address[0] (PCI BAR1) (page 181):
- * offsets are in bytes, registers are u32's, so we need a >>2 for indexing
- * the int[] by byte offsets. Use it like:
- *
- * bar1[ STAT ] = ~0L; or
- * x = bar1[ STAT ];
- */
-
-#define CONF (0x00 >> 2)
-#define CMD (0x04 >> 2)
-#define STAT (0x08 >> 2)
-#define STACK (0x08 >> 2)
-#define IMASK (0x0c >> 2)
-#define PIQBA (0x14 >> 2)
-#define PIQL (0x18 >> 2)
-#define MODE1 (0x20 >> 2)
-#define MODE2 (0x24 >> 2)
-#define CCBA (0x28 >> 2)
-#define TXPOLL (0x2c >> 2)
-#define TIQBA (0x30 >> 2)
-#define TIQL (0x34 >> 2)
-#define RIQBA (0x38 >> 2)
-#define RIQL (0x3c >> 2)
-#define LCONF (0x40 >> 2) /* LBI Configuration Register */
-#define LCCBA (0x44 >> 2) /* LBI Configuration Control Block */ /* DE: lehet hogy nem is kell? */
-#define LTIQBA (0x50 >> 2) /* DE: lehet hogy nem is kell? page 210: LBI DMA Controller intq - nem hasznalunk DMA-t.. */
-#define LTIQL (0x54 >> 2) /* DE: lehet hogy nem is kell? */
-#define LRIQBA (0x58 >> 2) /* DE: lehet hogy nem is kell? */
-#define LRIQL (0x5c >> 2) /* DE: lehet hogy nem is kell? */
-#define LREG0 (0x60 >> 2) /* LBI Indirect External Configuration register 0 */
-#define LREG1 (0x64 >> 2)
-#define LREG2 (0x68 >> 2)
-#define LREG3 (0x6c >> 2)
-#define LREG4 (0x70 >> 2)
-#define LREG5 (0x74 >> 2)
-#define LREG6 (0x78 >> 2) /* LBI Indirect External Configuration register 6 */
-#define LSTAT (0x7c >> 2) /* LBI Status Register */
-#define GPDIR (0x80 >> 2) /* General Purpose Bus DIRection - 0..input, 1..output */
-#define GPDATA (0x84 >> 2) /* General Purpose Bus DATA */
-
-
-/*
- * MUNICH commands: (they go into register CMD)
- */
-
-#define CMD_ARPCM 0x01 /* Action Request Serial PCM Core */
-#define CMD_ARLBI 0x02 /* Action Request LBI */
-
-
-/*
- * MUNICH event bits in the STAT, STACK, IMASK registers (page 188,189)
- */
-
-#define STAT_PTI (1 << 15)
-#define STAT_PRI (1 << 14)
-#define STAT_LTI (1 << 13)
-#define STAT_LRI (1 << 12)
-#define STAT_IOMI (1 << 11)
-#define STAT_SSCI (1 << 10)
-#define STAT_LBII (1 << 9)
-#define STAT_MBI (1 << 8)
-
-#define STAT_TI (1 << 6)
-#define STAT_TSPA (1 << 5)
-#define STAT_RSPA (1 << 4)
-#define STAT_LBIF (1 << 3)
-#define STAT_LBIA (1 << 2)
-#define STAT_PCMF (1 << 1)
-#define STAT_PCMA (1)
-
-/*
- * We do not handle these (and do not touch their STAT bits) in the interrupt loop
- */
-
-#define STAT_NOT_HANDLED_BY_INTERRUPT (STAT_PCMF | STAT_PCMA)
-
-
-/*
- * MUNICH MODE1/MODE2 slave register fields (page 193,196)
- * these are not all masks, MODE1_XX_YY are my magic values!
- */
-
-#define MODE1_PCM_E1 (1 << 31) /* E1, 2.048 Mbit/sec */
-#define MODE1_TBS_4 (1 << 24) /* TBS = 4 .. no Tx bit shift */
-#define MODE1_RBS_4 (1 << 18) /* RBS = 4 .. no Rx bit shift */
-#define MODE1_REN (1 << 15) /* Rx Enable */
-#define MODE1_MFL_MY TXBUFFER_SIZE /* Maximum Frame Length */
-#define MODE1_MAGIC (MODE1_PCM_E1 | MODE1_TBS_4 | MODE1_RBS_4 | MODE1_REN | MODE1_MFL_MY)
-
-#define MODE2_HPOLL (1 << 8) /* Hold Poll */
-#define MODE2_SPOLL (1 << 7) /* Slow Poll */
-#define MODE2_TSF (1) /* real magic - discovered by probing :) */
-// #define MODE2_MAGIC (MODE2_TSF)
-#define MODE2_MAGIC (MODE2_SPOLL | MODE2_TSF)
-
-
-/*
- * LCONF bits (page 205)
- * these are not all masks, LCONF_XX_YY are my magic values!
- */
-
-#define LCONF_IPA (1 << 31) /* Interrupt Pass. Use 1 for FALC54 */
-#define LCONF_DCA (1 << 30) /* Disregard the int's for Channel A - DMSM does not try to handle them */
-#define LCONF_DCB (1 << 29) /* Disregard the int's for Channel B */
-#define LCONF_EBCRES (1 << 22) /* Reset LBI External Bus Controller, 0..reset, 1..normal operation */
-#define LCONF_LBIRES (1 << 21) /* Reset LBI DMSM, 0..reset, 1..normal operation */
-#define LCONF_BTYP_16DEMUX (1 << 7) /* 16-bit demultiplexed bus */
-#define LCONF_ABM (1 << 4) /* Arbitration Master */
-
-/* writing LCONF_MAGIC1 followed by a LCONF_MAGIC2 into LCONF resets the EBC and DMSM: */
-
-#define LCONF_MAGIC1 (LCONF_BTYP_16DEMUX | LCONF_ABM | LCONF_IPA | LCONF_DCA | LCONF_DCB)
-#define LCONF_MAGIC2 (LCONF_MAGIC1 | LCONF_EBCRES | LCONF_LBIRES)
-
-
-/*
- * LREGx magic values if a FALC54 is on the LBI (page 217)
- */
-
-#define LREG0_MAGIC 0x00000264
-#define LREG1_MAGIC 0x6e6a6b66
-#define LREG2_MAGIC 0x00000264
-#define LREG3_MAGIC 0x6e686966
-#define LREG4_MAGIC 0x00000000
-#define LREG5_MAGIC ( (7<<27) | (3<<24) | (1<<21) | (7<<3) | (2<<9) )
-
-
-/*
- * PCM Action Specification fields (munich_ccb_t.action_spec)
- */
-
-#define CCB_ACTIONSPEC_IN (1 << 15) /* init */
-#define CCB_ACTIONSPEC_ICO (1 << 14) /* init only this channel */
-#define CCB_ACTIONSPEC_RES (1 << 6) /* reset all channels */
-#define CCB_ACTIONSPEC_LOC (1 << 5)
-#define CCB_ACTIONSPEC_LOOP (1 << 4)
-#define CCB_ACTIONSPEC_LOOPI (1 << 3)
-#define CCB_ACTIONSPEC_IA (1 << 2)
-
-
-/*
- * Interrupt Information bits in the TIQ, RIQ
- */
-
-#define PCM_INT_HI (1 << 12)
-#define PCM_INT_FI (1 << 11)
-#define PCM_INT_IFC (1 << 10)
-#define PCM_INT_SF (1 << 9)
-#define PCM_INT_ERR (1 << 8)
-#define PCM_INT_FO (1 << 7)
-#define PCM_INT_FE2 (1 << 6)
-
-#define PCM_INT_CHANNEL( info ) (info & 0x1F)
-
-
-/*
- * Rx status info in the rx_desc_t.status
- */
-
-#define RX_STATUS_SF (1 << 6)
-#define RX_STATUS_LOSS (1 << 5)
-#define RX_STATUS_CRCO (1 << 4)
-#define RX_STATUS_NOB (1 << 3)
-#define RX_STATUS_LFD (1 << 2)
-#define RX_STATUS_RA (1 << 1)
-#define RX_STATUS_ROF 1
+++ /dev/null
-static u8 firmware[]={
-0x60,0x00,0x00,0x16,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0xB9,0x40,0x00,0x00,0x00,0x00,0x00,
-0x10,0x14,0x42,0x80,0x4A,0xB0,0x09,0xB0,0x00,0x00,0x10,0x04,0x67,0x00,0x00,0x0E,
-0x06,0xB0,0x40,0x00,0x00,0x00,0x09,0xB0,0x00,0x00,0x10,0x04,0x58,0x80,0x0C,0x80,
-0x00,0x00,0x00,0x10,0x66,0x00,0xFF,0xDE,0x21,0xFC,0x00,0x00,0x16,0xBC,0x00,0x6C,
-0x21,0xFC,0x00,0x00,0x17,0x5E,0x01,0x00,0x21,0xFC,0x00,0x00,0x16,0xDE,0x01,0x78,
-0x21,0xFC,0x00,0x00,0x16,0xFE,0x01,0x74,0x21,0xFC,0x00,0x00,0x17,0x1E,0x01,0x70,
-0x21,0xFC,0x00,0x00,0x17,0x3E,0x01,0x6C,0x21,0xFC,0x00,0x00,0x18,0x4C,0x02,0x00,
-0x23,0xFC,0x78,0x00,0x00,0x00,0xFF,0xFC,0x15,0x48,0x33,0xFC,0x04,0x80,0xFF,0xFC,
-0x10,0x26,0x33,0xFC,0x01,0x10,0xFF,0xFC,0x10,0x2A,0x23,0xFC,0x00,0xD4,0x9F,0x40,
-0xFF,0xFC,0x15,0x40,0x23,0xFC,0x00,0x00,0x05,0x43,0xFF,0xF9,0x01,0x00,0x23,0xFC,
-0x00,0x00,0x05,0x43,0xFF,0xF9,0x01,0x14,0x23,0xFC,0x00,0x00,0x00,0x00,0xFF,0xF9,
-0x01,0x10,0x23,0xFC,0x00,0x00,0x00,0x08,0xFF,0xF9,0x01,0x24,0x23,0xFC,0x00,0x00,
-0x01,0x01,0xFF,0xF9,0x01,0x28,0x00,0xB9,0x00,0x0F,0x03,0x00,0xFF,0xF9,0x00,0xE8,
-0x23,0xFC,0x00,0x00,0x00,0x01,0xFF,0xF9,0x00,0xD4,0x61,0x00,0x06,0x74,0x33,0xFC,
-0xFF,0xFF,0xFF,0xFC,0x15,0x52,0x42,0x79,0xFF,0xFC,0x15,0x50,0x42,0x79,0xFF,0xFC,
-0x15,0x64,0x2E,0x3A,0x08,0x50,0x42,0xB9,0x00,0x00,0x19,0x54,0x4A,0x87,0x66,0x00,
-0x00,0x0E,0x4E,0x72,0x22,0x00,0x46,0xFC,0x27,0x00,0x60,0x00,0xFF,0xE6,0x42,0x80,
-0x42,0x86,0x08,0x07,0x00,0x04,0x67,0x00,0x00,0x0A,0x08,0x87,0x00,0x00,0x61,0x00,
-0x02,0xA0,0x08,0x07,0x00,0x00,0x67,0x00,0x00,0x06,0x61,0x00,0x00,0x36,0x08,0x07,
-0x00,0x08,0x67,0x00,0x00,0x06,0x61,0x00,0x02,0xB8,0x08,0x07,0x00,0x0C,0x67,0x00,
-0x00,0x0A,0x61,0x00,0x04,0x94,0x61,0x00,0x03,0x60,0xE2,0x8F,0x58,0x80,0x0C,0x80,
-0x00,0x00,0x00,0x10,0x66,0x00,0xFF,0xBC,0x23,0xC6,0xFF,0xF9,0x00,0xE4,0x60,0x00,
-0xFF,0x92,0x20,0x70,0x09,0xB0,0x00,0x00,0x10,0x04,0x4A,0xA8,0x00,0x00,0x66,0x00,
-0x02,0x4E,0x21,0x7C,0x00,0x00,0x00,0x01,0x00,0x00,0x42,0xB0,0x09,0xB0,0x00,0x00,
-0x19,0x58,0x42,0xB0,0x09,0xB0,0x00,0x00,0x19,0x68,0x42,0xB0,0x09,0xB0,0x00,0x00,
-0x19,0x78,0x42,0xB0,0x09,0xB0,0x00,0x00,0x19,0x88,0x22,0x39,0xFF,0xFC,0x16,0xEC,
-0xC2,0xB0,0x09,0xB0,0x00,0x00,0x18,0xF2,0x0C,0xA8,0x00,0x00,0x00,0x04,0x00,0x18,
-0x66,0x00,0x00,0x0E,0x82,0xB0,0x09,0xB0,0x00,0x00,0x18,0xE2,0x60,0x00,0x00,0x0A,
-0x82,0xB0,0x09,0xB0,0x00,0x00,0x18,0xD2,0x23,0xC1,0xFF,0xFC,0x16,0xEC,0x00,0x70,
-0x10,0x00,0x09,0xB0,0x00,0x00,0x19,0xAA,0x61,0x00,0x05,0x76,0x22,0x30,0x09,0xB0,
-0x00,0x00,0x18,0x92,0x22,0x70,0x09,0xB0,0x00,0x00,0x18,0x72,0x74,0x08,0x26,0x3C,
-0x18,0x00,0x00,0x00,0x0C,0xA8,0x00,0x00,0x00,0x01,0x00,0x10,0x67,0x00,0x00,0x06,
-0x08,0xC3,0x00,0x1A,0x22,0xC3,0x22,0xC1,0x06,0x81,0x00,0x00,0x05,0xFC,0x51,0xCA,
-0xFF,0xF4,0x08,0xC3,0x00,0x1D,0x22,0xC3,0x22,0xC1,0x74,0x1C,0x22,0xFC,0x90,0x00,
-0x00,0x00,0x22,0xC1,0x06,0x81,0x00,0x00,0x05,0xFC,0x51,0xCA,0xFF,0xF0,0x22,0xFC,
-0xB0,0x00,0x00,0x00,0x22,0xC1,0x22,0x70,0x09,0xB0,0x00,0x00,0x18,0x62,0x24,0x70,
-0x09,0xB0,0x00,0x00,0x18,0x52,0x25,0x7C,0x00,0x00,0xFF,0xFF,0x00,0x10,0x25,0x7C,
-0x00,0x00,0x00,0x00,0x00,0x14,0x22,0x30,0x09,0xB0,0x00,0x00,0x18,0x72,0x33,0x41,
-0x00,0x02,0x06,0x81,0x00,0x00,0x00,0x50,0x33,0x41,0x00,0x00,0x13,0x7C,0x00,0x08,
-0x00,0x04,0x13,0x7C,0x00,0x08,0x00,0x05,0x0C,0xA8,0x00,0x00,0x00,0x05,0x00,0x10,
-0x66,0x00,0x00,0x2A,0x42,0x6A,0x00,0x08,0x23,0x7C,0x00,0x00,0xF0,0xB8,0x00,0x34,
-0x23,0x7C,0x00,0x00,0xFF,0xFF,0x00,0x38,0x33,0x7C,0x05,0xFA,0x00,0x46,0x31,0xBC,
-0x00,0x02,0x09,0xB0,0x00,0x00,0x19,0x9C,0x60,0x00,0x00,0xBC,0x0C,0xA8,0x00,0x00,
-0x00,0x07,0x00,0x10,0x66,0x00,0x00,0x2C,0x35,0x7C,0x08,0x00,0x00,0x08,0x23,0x7C,
-0xDE,0xBB,0x20,0xE3,0x00,0x34,0x23,0x7C,0xFF,0xFF,0xFF,0xFF,0x00,0x38,0x33,0x7C,
-0x05,0xFC,0x00,0x46,0x31,0xBC,0x00,0x04,0x09,0xB0,0x00,0x00,0x19,0x9C,0x60,0x00,
-0x00,0x86,0x0C,0xA8,0x00,0x00,0x00,0x04,0x00,0x10,0x66,0x00,0x00,0x26,0x42,0x6A,
-0x00,0x08,0x23,0x7C,0x00,0x00,0xF0,0xB8,0x00,0x34,0x42,0xA9,0x00,0x38,0x33,0x7C,
-0x05,0xFA,0x00,0x46,0x31,0xBC,0x00,0x02,0x09,0xB0,0x00,0x00,0x19,0x9C,0x60,0x00,
-0x00,0x56,0x0C,0xA8,0x00,0x00,0x00,0x06,0x00,0x10,0x66,0x00,0x00,0x28,0x35,0x7C,
-0x08,0x00,0x00,0x08,0x23,0x7C,0xDE,0xBB,0x20,0xE3,0x00,0x34,0x42,0xA9,0x00,0x38,
-0x33,0x7C,0x05,0xFC,0x00,0x46,0x31,0xBC,0x00,0x04,0x09,0xB0,0x00,0x00,0x19,0x9C,
-0x60,0x00,0x00,0x24,0x42,0x6A,0x00,0x08,0x23,0x7C,0x00,0x00,0xF0,0xB8,0x00,0x34,
-0x23,0x7C,0x00,0x00,0xFF,0xFF,0x00,0x38,0x33,0x7C,0x05,0xF8,0x00,0x46,0x42,0x70,
-0x09,0xB0,0x00,0x00,0x19,0x9C,0x25,0x7C,0x00,0x00,0x00,0x03,0x00,0x04,0x0C,0xA8,
-0x00,0x00,0x00,0x02,0x00,0x14,0x66,0x00,0x00,0x0E,0x25,0x7C,0x10,0x04,0x09,0x00,
-0x00,0x00,0x60,0x00,0x00,0x0A,0x25,0x7C,0x10,0x04,0x00,0x00,0x00,0x00,0x33,0x7C,
-0x05,0xFC,0x00,0x06,0x22,0x00,0xE9,0x89,0x00,0x81,0x00,0x00,0x00,0x01,0x33,0xC1,
-0xFF,0xFC,0x15,0xC0,0x08,0x39,0x00,0x00,0xFF,0xFC,0x15,0xC0,0x66,0x00,0xFF,0xF6,
-0x35,0x7C,0x00,0x1F,0x00,0x14,0x00,0xAA,0x00,0x00,0x00,0x30,0x00,0x00,0x4E,0x75,
-0x20,0x70,0x09,0xB0,0x00,0x00,0x18,0x52,0x42,0x68,0x00,0x14,0x02,0xA8,0xFF,0xFF,
-0xFF,0xCF,0x00,0x00,0x02,0x70,0xEF,0xFF,0x09,0xB0,0x00,0x00,0x19,0xAA,0x61,0x00,
-0x03,0x70,0x22,0x30,0x09,0xB0,0x00,0x00,0x10,0x04,0x42,0xB0,0x19,0x90,0x4E,0x75,
-0x0C,0xB0,0x00,0x00,0x00,0x0A,0x09,0xB0,0x00,0x00,0x19,0x78,0x67,0x00,0x00,0xA8,
-0x22,0x30,0x09,0xB0,0x00,0x00,0x19,0x68,0x24,0x01,0x4C,0x3C,0x20,0x00,0x00,0x00,
-0x00,0x0C,0xD4,0xB0,0x09,0xB0,0x00,0x00,0x10,0x04,0x06,0x82,0x00,0x00,0x00,0x1C,
-0x0C,0xB0,0x00,0x00,0x00,0x10,0x29,0x90,0x66,0x00,0x00,0x7C,0x20,0x70,0x29,0xA0,
-0x00,0x04,0xE7,0x89,0xD2,0xB0,0x09,0xB0,0x00,0x00,0x18,0x72,0x22,0x70,0x19,0xA0,
-0x00,0x04,0x24,0x30,0x29,0xA0,0x00,0x08,0x31,0x82,0x19,0xA0,0x00,0x02,0x56,0x82,
-0x02,0x82,0xFF,0xFF,0xFF,0xFC,0x23,0xC8,0xFF,0xF9,0x01,0x04,0x23,0xC9,0xFF,0xF9,
-0x01,0x08,0x23,0xC2,0xFF,0xF9,0x01,0x0C,0x23,0xFC,0x00,0x00,0x01,0x03,0xFF,0xF9,
-0x01,0x28,0x61,0x00,0x01,0xF6,0x08,0xF0,0x00,0x1F,0x19,0x90,0x22,0x30,0x09,0xB0,
-0x00,0x00,0x19,0x68,0x52,0x81,0x0C,0x81,0x00,0x00,0x00,0x0A,0x66,0x00,0x00,0x04,
-0x42,0x81,0x21,0x81,0x09,0xB0,0x00,0x00,0x19,0x68,0x52,0xB0,0x09,0xB0,0x00,0x00,
-0x19,0x78,0x60,0x00,0xFF,0x4C,0x4E,0x75,0x22,0x30,0x09,0xB0,0x00,0x00,0x19,0x88,
-0xE7,0x89,0xD2,0xB0,0x09,0xB0,0x00,0x00,0x18,0x82,0x34,0x30,0x19,0x90,0x08,0x02,
-0x00,0x0F,0x66,0x00,0x01,0x12,0x08,0x02,0x00,0x01,0x66,0x00,0x00,0xE6,0x4A,0x70,
-0x09,0xB0,0x00,0x00,0x19,0x9C,0x66,0x00,0x00,0x06,0x08,0x82,0x00,0x02,0x02,0x42,
-0x0C,0xBC,0x0C,0x42,0x0C,0x00,0x66,0x00,0x00,0xDC,0x42,0x83,0x36,0x30,0x19,0xA0,
-0x00,0x02,0x96,0x70,0x09,0xB0,0x00,0x00,0x19,0x9C,0x0C,0x43,0x05,0xF8,0x6E,0x00,
-0x00,0xC4,0x24,0x3A,0x04,0x84,0x4C,0x3C,0x20,0x00,0x00,0x00,0x00,0x0C,0xD4,0xBA,
-0xFA,0xF4,0x0C,0xB0,0x00,0x00,0x00,0x00,0x29,0x90,0x66,0x00,0x00,0x96,0x21,0x83,
-0x29,0xA0,0x00,0x08,0x20,0x70,0x19,0xA0,0x00,0x04,0x22,0x70,0x29,0xA0,0x00,0x04,
-0x4A,0x89,0x67,0x00,0x00,0x2A,0x56,0x83,0x02,0x83,0xFF,0xFF,0xFF,0xFC,0x23,0xC8,
-0xFF,0xF9,0x01,0x1C,0x23,0xC9,0xFF,0xF9,0x01,0x18,0x23,0xC3,0xFF,0xF9,0x01,0x20,
-0x23,0xFC,0x00,0x00,0x03,0x01,0xFF,0xF9,0x01,0x28,0x61,0x00,0x01,0x2C,0x21,0xB0,
-0x09,0xB0,0x00,0x00,0x18,0xC2,0x29,0x90,0x08,0xC6,0x00,0x04,0x24,0x3A,0x04,0x1A,
-0x52,0x82,0x0C,0x82,0x00,0x00,0x00,0x28,0x66,0x00,0x00,0x04,0x42,0x82,0x23,0xC2,
-0x00,0x00,0x19,0x98,0x02,0x70,0xF0,0x00,0x19,0x90,0x08,0xF0,0x00,0x1F,0x19,0x90,
-0x22,0x30,0x09,0xB0,0x00,0x00,0x19,0x88,0x52,0x81,0x0C,0x81,0x00,0x00,0x00,0x1E,
-0x66,0x00,0x00,0x04,0x42,0x81,0x21,0x81,0x09,0xB0,0x00,0x00,0x19,0x88,0x60,0x00,
-0xFE,0xF8,0x24,0x30,0x09,0xB0,0x00,0x00,0x10,0x04,0x52,0xB0,0x29,0xA0,0x00,0x08,
-0x60,0x00,0xFF,0xC2,0x24,0x30,0x09,0xB0,0x00,0x00,0x10,0x04,0x52,0xB0,0x29,0xA0,
-0x00,0x0C,0x60,0x00,0xFF,0xB0,0x4E,0x75,0x4A,0xB0,0x09,0xB0,0x00,0x00,0x19,0x78,
-0x67,0x00,0x00,0x86,0x22,0x30,0x09,0xB0,0x00,0x00,0x19,0x58,0x24,0x01,0xE7,0x89,
-0xD2,0xB0,0x09,0xB0,0x00,0x00,0x18,0x72,0x36,0x30,0x19,0x90,0x08,0x03,0x00,0x0F,
-0x66,0x00,0x00,0x66,0x8C,0xB0,0x09,0xB0,0x00,0x00,0x18,0xA2,0x53,0xB0,0x09,0xB0,
-0x00,0x00,0x19,0x78,0x22,0x30,0x09,0xB0,0x00,0x00,0x19,0x58,0x52,0x81,0x0C,0x81,
-0x00,0x00,0x00,0x0A,0x66,0x00,0x00,0x04,0x42,0x81,0x21,0x81,0x09,0xB0,0x00,0x00,
-0x19,0x58,0x4C,0x3C,0x20,0x00,0x00,0x00,0x00,0x0C,0xD4,0xB0,0x09,0xB0,0x00,0x00,
-0x10,0x04,0x06,0x82,0x00,0x00,0x00,0x1C,0x08,0x03,0x00,0x01,0x66,0x00,0x00,0x0E,
-0x21,0xBC,0x00,0x00,0x00,0x20,0x29,0x90,0x60,0x00,0xFF,0x7E,0x21,0xBC,0x00,0x00,
-0x00,0x30,0x29,0x90,0x60,0x00,0xFF,0x72,0x4E,0x75,0x2F,0x00,0x40,0xE7,0x20,0x39,
-0xFF,0xF9,0x01,0x28,0x08,0x00,0x00,0x04,0x66,0x00,0x00,0x2C,0x4E,0x72,0x22,0x00,
-0x46,0xFC,0x27,0x00,0x60,0x00,0xFF,0xE8,0x2F,0x00,0x40,0xE7,0x20,0x39,0xFF,0xF9,
-0x01,0x28,0x08,0x00,0x00,0x0C,0x66,0x00,0x00,0x0E,0x4E,0x72,0x22,0x00,0x46,0xFC,
-0x27,0x00,0x60,0x00,0xFF,0xE8,0x46,0xDF,0x20,0x1F,0x4E,0x75,0x2F,0x00,0x20,0x39,
-0xFF,0xF9,0x00,0xE0,0x23,0xC0,0xFF,0xF9,0x00,0xE0,0x81,0xB9,0x00,0x00,0x19,0x54,
-0x23,0xFC,0x00,0x00,0x09,0x09,0xFF,0xF9,0x01,0x28,0x20,0x1F,0x4E,0x73,0x00,0xB9,
-0x00,0x00,0x00,0x00,0xFF,0xFC,0x16,0x10,0x00,0xB9,0x00,0x00,0x10,0x00,0x00,0x00,
-0x19,0x54,0x23,0xFC,0x40,0x00,0x00,0x00,0xFF,0xFC,0x15,0x4C,0x4E,0x73,0x00,0xB9,
-0x00,0x00,0x00,0x00,0xFF,0xFC,0x16,0x30,0x00,0xB9,0x00,0x00,0x20,0x00,0x00,0x00,
-0x19,0x54,0x23,0xFC,0x20,0x00,0x00,0x00,0xFF,0xFC,0x15,0x4C,0x4E,0x73,0x00,0xB9,
-0x00,0x00,0x00,0x00,0xFF,0xFC,0x16,0x50,0x00,0xB9,0x00,0x00,0x40,0x00,0x00,0x00,
-0x19,0x54,0x23,0xFC,0x10,0x00,0x00,0x00,0xFF,0xFC,0x15,0x4C,0x4E,0x73,0x00,0xB9,
-0x00,0x00,0x00,0x00,0xFF,0xFC,0x16,0x70,0x00,0xB9,0x00,0x00,0x80,0x00,0x00,0x00,
-0x19,0x54,0x23,0xFC,0x08,0x00,0x00,0x00,0xFF,0xFC,0x15,0x4C,0x4E,0x73,0x4E,0x73,
-0x2F,0x00,0x2F,0x01,0x2F,0x02,0x2F,0x08,0x2F,0x09,0x42,0x80,0x20,0x7C,0xFF,0xFB,
-0x00,0x00,0x32,0x10,0x02,0x81,0x00,0x00,0x00,0xE7,0x0C,0x41,0x00,0x42,0x66,0x00,
-0x00,0x0A,0x32,0x3C,0x0E,0x08,0x60,0x00,0x00,0x3E,0x0C,0x41,0x00,0x63,0x66,0x00,
-0x00,0x0A,0x32,0x3C,0x04,0x08,0x60,0x00,0x00,0x2E,0x0C,0x41,0x00,0x84,0x66,0x00,
-0x00,0x0A,0x32,0x3C,0x02,0x08,0x60,0x00,0x00,0x1E,0x0C,0x41,0x00,0xA5,0x66,0x00,
-0x00,0x0A,0x32,0x3C,0x0D,0x08,0x60,0x00,0x00,0x0E,0x32,0x3C,0x00,0x08,0x34,0x3C,
-0x80,0xE7,0x60,0x00,0x00,0x14,0x34,0x30,0x09,0xB0,0x00,0x00,0x19,0xAA,0x02,0x42,
-0x30,0x00,0x82,0x42,0x34,0x3C,0x80,0xFF,0xB2,0x70,0x09,0xB0,0x00,0x00,0x19,0xAC,
-0x67,0x00,0x00,0x0C,0x31,0x81,0x09,0xB0,0x00,0x00,0x19,0xAC,0x30,0x81,0x32,0x39,
-0xFF,0xFC,0x15,0x66,0xC2,0x70,0x09,0xB0,0x00,0x00,0x19,0x02,0x67,0x00,0x00,0x0C,
-0x32,0x10,0x02,0x41,0xFF,0xF7,0x60,0x00,0x00,0x08,0x32,0x10,0x00,0x41,0x00,0x08,
-0xC2,0x42,0x22,0x70,0x09,0xB0,0x00,0x00,0x10,0x04,0xB2,0xA9,0x00,0x04,0x67,0x00,
-0x00,0x12,0x23,0x41,0x00,0x04,0x23,0xF0,0x09,0xB0,0x00,0x00,0x18,0xB2,0xFF,0xF9,
-0x00,0xE4,0x54,0x88,0x58,0x80,0x0C,0x80,0x00,0x00,0x00,0x10,0x66,0x00,0xFF,0x34,
-0x22,0x5F,0x20,0x5F,0x24,0x1F,0x22,0x1F,0x20,0x1F,0x4E,0x75,0x61,0x00,0xFF,0x12,
-0x4E,0x73,0xFF,0xFC,0x16,0x00,0xFF,0xFC,0x16,0x20,0xFF,0xFC,0x16,0x40,0xFF,0xFC,
-0x16,0x60,0xFF,0xFC,0x0C,0x00,0xFF,0xFC,0x0D,0x00,0xFF,0xFC,0x0E,0x00,0xFF,0xFC,
-0x0F,0x00,0xFF,0xFC,0x00,0x00,0xFF,0xFC,0x01,0x40,0xFF,0xFC,0x02,0x80,0xFF,0xFC,
-0x03,0xC0,0xFF,0xFC,0x00,0x50,0xFF,0xFC,0x01,0x90,0xFF,0xFC,0x02,0xD0,0xFF,0xFC,
-0x04,0x10,0x00,0x00,0x40,0x00,0x00,0x01,0x2F,0x60,0x00,0x02,0x1E,0xC0,0x00,0x03,
-0x0E,0x20,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x04,0x00,0x00,
-0x00,0x08,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x80,0x00,0x00,
-0x01,0x00,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x11,0x00,0x00,0x00,0x12,0x00,0x00,
-0x00,0x13,0x00,0x00,0x00,0x2C,0x00,0x00,0x3E,0x00,0x00,0x2C,0x00,0x00,0x3E,0x00,
-0x00,0x00,0x00,0x00,0x00,0x2D,0x00,0x00,0x3F,0x00,0x00,0x2D,0x00,0x00,0x3F,0x00,
-0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0xFF,0x00,0x00,0xFF,0x00,0x00,0xFF,0x00,
-0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x80,0x00,0x00,0x02,0x00,0x00,0x00,0x08,0x00,
-0x77,0x61,0x6E,0x58,0x4C,0x20,0x66,0x69,0x72,0x6D,0x77,0x61,0x72,0x65,0x0A,0x43,
-0x6F,0x70,0x79,0x72,0x69,0x67,0x68,0x74,0x20,0x28,0x43,0x29,0x20,0x32,0x30,0x30,
-0x33,0x20,0x4B,0x72,0x7A,0x79,0x73,0x7A,0x74,0x6F,0x66,0x20,0x48,0x61,0x6C,0x61,
-0x73,0x61,0x20,0x3C,0x6B,0x68,0x63,0x40,0x70,0x6D,0x2E,0x77,0x61,0x77,0x2E,0x70,
-0x6C,0x3E,0x0A,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-};
+++ /dev/null
-/*
- * PCI Express Hot Plug Controller Driver
- *
- * Copyright (C) 1995,2001 Compaq Computer Corporation
- * Copyright (C) 2001,2003 Greg Kroah-Hartman (greg@kroah.com)
- * Copyright (C) 2001 IBM Corp.
- *
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for more
- * details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Send feedback to <greg@kroah.com>
- *
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/proc_fs.h>
-#include <linux/workqueue.h>
-#include <linux/pci.h>
-#include "pciehp.h"
-
-
-/* A few routines that create sysfs entries for the hot plug controller */
-
-static ssize_t show_ctrl (struct device *dev, char *buf)
-{
- struct pci_dev *pci_dev;
- struct controller *ctrl;
- char * out = buf;
- int index;
- struct pci_resource *res;
-
- pci_dev = container_of (dev, struct pci_dev, dev);
- ctrl = pci_get_drvdata(pci_dev);
-
- out += sprintf(buf, "Free resources: memory\n");
- index = 11;
- res = ctrl->mem_head;
- while (res && index--) {
- out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
- res = res->next;
- }
- out += sprintf(out, "Free resources: prefetchable memory\n");
- index = 11;
- res = ctrl->p_mem_head;
- while (res && index--) {
- out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
- res = res->next;
- }
- out += sprintf(out, "Free resources: IO\n");
- index = 11;
- res = ctrl->io_head;
- while (res && index--) {
- out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
- res = res->next;
- }
- out += sprintf(out, "Free resources: bus numbers\n");
- index = 11;
- res = ctrl->bus_head;
- while (res && index--) {
- out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
- res = res->next;
- }
-
- return out - buf;
-}
-static DEVICE_ATTR (ctrl, S_IRUGO, show_ctrl, NULL);
-
-static ssize_t show_dev (struct device *dev, char *buf)
-{
- struct pci_dev *pci_dev;
- struct controller *ctrl;
- char * out = buf;
- int index;
- struct pci_resource *res;
- struct pci_func *new_slot;
- struct slot *slot;
-
- pci_dev = container_of (dev, struct pci_dev, dev);
- ctrl = pci_get_drvdata(pci_dev);
-
- slot=ctrl->slot;
-
- while (slot) {
- new_slot = pciehp_slot_find(slot->bus, slot->device, 0);
- if (!new_slot)
- break;
- out += sprintf(out, "assigned resources: memory\n");
- index = 11;
- res = new_slot->mem_head;
- while (res && index--) {
- out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
- res = res->next;
- }
- out += sprintf(out, "assigned resources: prefetchable memory\n");
- index = 11;
- res = new_slot->p_mem_head;
- while (res && index--) {
- out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
- res = res->next;
- }
- out += sprintf(out, "assigned resources: IO\n");
- index = 11;
- res = new_slot->io_head;
- while (res && index--) {
- out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
- res = res->next;
- }
- out += sprintf(out, "assigned resources: bus numbers\n");
- index = 11;
- res = new_slot->bus_head;
- while (res && index--) {
- out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
- res = res->next;
- }
- slot=slot->next;
- }
-
- return out - buf;
-}
-static DEVICE_ATTR (dev, S_IRUGO, show_dev, NULL);
-
-void pciehp_create_ctrl_files (struct controller *ctrl)
-{
- device_create_file (&ctrl->pci_dev->dev, &dev_attr_ctrl);
- device_create_file (&ctrl->pci_dev->dev, &dev_attr_dev);
-}
+++ /dev/null
-/*======================================================================
-
- PCMCIA Bulk Memory Services
-
- bulkmem.c 1.38 2000/09/25 19:29:51
-
- The contents of this file are subject to the Mozilla Public
- License Version 1.1 (the "License"); you may not use this file
- except in compliance with the License. You may obtain a copy of
- the License at http://www.mozilla.org/MPL/
-
- Software distributed under the License is distributed on an "AS
- IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
- implied. See the License for the specific language governing
- rights and limitations under the License.
-
- The initial developer of the original code is David A. Hinds
- <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
- are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
-
- Alternatively, the contents of this file may be used under the
- terms of the GNU General Public License version 2 (the "GPL"), in which
- case the provisions of the GPL are applicable instead of the
- above. If you wish to allow the use of your version of this file
- only under the terms of the GPL and not to allow others to use
- your version of this file under the MPL, indicate your decision
- by deleting the provisions above and replace them with the notice
- and other provisions required by the GPL. If you do not delete
- the provisions above, a recipient may use your version of this
- file under either the MPL or the GPL.
-
-======================================================================*/
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/errno.h>
-#include <linux/slab.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/timer.h>
-
-#define IN_CARD_SERVICES
-#include <pcmcia/cs_types.h>
-#include <pcmcia/ss.h>
-#include <pcmcia/cs.h>
-#include <pcmcia/bulkmem.h>
-#include <pcmcia/cistpl.h>
-#include "cs_internal.h"
-
-#ifdef DEBUG
-extern int ds_pc_debug;
-#define cs_socket_name(skt) ((skt)->dev.class_id)
-
-#define ds_dbg(skt, lvl, fmt, arg...) do { \
- if (ds_pc_debug >= lvl) \
- printk(KERN_DEBUG "ds: %s: " fmt, \
- cs_socket_name(skt) , ## arg); \
-} while (0)
-#else
-#define ds_dbg(lvl, fmt, arg...) do { } while (0)
-#endif
-
-/*======================================================================
-
- This stuff is used by Card Services to initialize the table of
- region info used for subsequent calls to GetFirstRegion and
- GetNextRegion.
-
-======================================================================*/
-
-static void setup_regions(struct pcmcia_socket *s, unsigned int function,
- int attr, memory_handle_t *list)
-{
- int i, code, has_jedec, has_geo;
- u_int offset;
- cistpl_device_t device;
- cistpl_jedec_t jedec;
- cistpl_device_geo_t geo;
- memory_handle_t r;
-
- ds_dbg(s, 1, "setup_regions(0x%d, %d, 0x%p)\n",
- function, attr, list);
-
- code = (attr) ? CISTPL_DEVICE_A : CISTPL_DEVICE;
- if (pccard_read_tuple(s, function, code, &device) != CS_SUCCESS)
- return;
- code = (attr) ? CISTPL_JEDEC_A : CISTPL_JEDEC_C;
- has_jedec = (pccard_read_tuple(s, function, code, &jedec) == CS_SUCCESS);
- if (has_jedec && (device.ndev != jedec.nid)) {
- ds_dbg(s, 0, "Device info does not match JEDEC info.\n");
- has_jedec = 0;
- }
- code = (attr) ? CISTPL_DEVICE_GEO_A : CISTPL_DEVICE_GEO;
- has_geo = (pccard_read_tuple(s, function, code, &geo) == CS_SUCCESS);
- if (has_geo && (device.ndev != geo.ngeo)) {
- ds_dbg(s, 0, "Device info does not match geometry tuple.\n");
- has_geo = 0;
- }
-
- offset = 0;
- for (i = 0; i < device.ndev; i++) {
- if ((device.dev[i].type != CISTPL_DTYPE_NULL) &&
- (device.dev[i].size != 0)) {
- r = kmalloc(sizeof(*r), GFP_KERNEL);
- if (!r) {
- printk(KERN_NOTICE "cs: setup_regions: kmalloc failed!\n");
- return;
- }
- r->region_magic = REGION_MAGIC;
- r->state = 0;
- r->dev_info[0] = '\0';
- r->mtd = NULL;
- r->info.Attributes = (attr) ? REGION_TYPE_AM : 0;
- r->info.CardOffset = offset;
- r->info.RegionSize = device.dev[i].size;
- r->info.AccessSpeed = device.dev[i].speed;
- if (has_jedec) {
- r->info.JedecMfr = jedec.id[i].mfr;
- r->info.JedecInfo = jedec.id[i].info;
- } else
- r->info.JedecMfr = r->info.JedecInfo = 0;
- if (has_geo) {
- r->info.BlockSize = geo.geo[i].buswidth *
- geo.geo[i].erase_block * geo.geo[i].interleave;
- r->info.PartMultiple =
- r->info.BlockSize * geo.geo[i].partition;
- } else
- r->info.BlockSize = r->info.PartMultiple = 1;
- r->info.next = *list; *list = r;
- }
- offset += device.dev[i].size;
- }
-} /* setup_regions */
-
-/*======================================================================
-
- This is tricky. When get_first_region() is called by Driver
- Services, we initialize the region info table in the socket
- structure. When it is called by an MTD, we can just scan the
- table for matching entries.
-
-======================================================================*/
-
-static int pccard_match_region(memory_handle_t list, region_info_t *match)
-{
- if (list) {
- *match = list->info;
- return CS_SUCCESS;
- }
- return CS_NO_MORE_ITEMS;
-} /* match_region */
-
-int pccard_get_first_region(struct pcmcia_socket *s, region_info_t *rgn)
-{
- if (!(s->state & SOCKET_REGION_INFO)) {
- setup_regions(s, BIND_FN_ALL, 0, &s->c_region);
- setup_regions(s, BIND_FN_ALL, 1, &s->a_region);
- s->state |= SOCKET_REGION_INFO;
- }
-
- if (rgn->Attributes & REGION_TYPE_AM)
- return pccard_match_region(s->a_region, rgn);
- else
- return pccard_match_region(s->c_region, rgn);
-} /* get_first_region */
-
-int pccard_get_next_region(struct pcmcia_socket *s, region_info_t *rgn)
-{
- return pccard_match_region(rgn->next, rgn);
-} /* get_next_region */
-
-
-#ifdef CONFIG_PCMCIA_OBSOLETE
-
-static int match_region(client_handle_t handle, memory_handle_t list,
- region_info_t *match)
-{
- while (list != NULL) {
- if (!(handle->Attributes & INFO_MTD_CLIENT) ||
- (strcmp(handle->dev_info, list->dev_info) == 0)) {
- *match = list->info;
- return CS_SUCCESS;
- }
- list = list->info.next;
- }
- return CS_NO_MORE_ITEMS;
-} /* match_region */
-
-int pcmcia_get_first_region(client_handle_t handle, region_info_t *rgn)
-{
- struct pcmcia_socket *s = SOCKET(handle);
- if (CHECK_HANDLE(handle))
- return CS_BAD_HANDLE;
-
- if ((handle->Attributes & INFO_MASTER_CLIENT) &&
- (!(s->state & SOCKET_REGION_INFO))) {
- setup_regions(s, handle->Function, 0, &s->c_region);
- setup_regions(s, handle->Function, 1, &s->a_region);
- s->state |= SOCKET_REGION_INFO;
- }
-
- if (rgn->Attributes & REGION_TYPE_AM)
- return match_region(handle, s->a_region, rgn);
- else
- return match_region(handle, s->c_region, rgn);
-} /* get_first_region */
-EXPORT_SYMBOL(pcmcia_get_first_region);
-
-int pcmcia_get_next_region(client_handle_t handle, region_info_t *rgn)
-{
- if (CHECK_HANDLE(handle))
- return CS_BAD_HANDLE;
- return match_region(handle, rgn->next, rgn);
-} /* get_next_region */
-EXPORT_SYMBOL(pcmcia_get_next_region);
-
-#endif
+++ /dev/null
-/*======================================================================
-
- Device driver for the PCMCIA control functionality of StrongARM
- SA-1100 microprocessors.
-
- The contents of this file are subject to the Mozilla Public
- License Version 1.1 (the "License"); you may not use this file
- except in compliance with the License. You may obtain a copy of
- the License at http://www.mozilla.org/MPL/
-
- Software distributed under the License is distributed on an "AS
- IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
- implied. See the License for the specific language governing
- rights and limitations under the License.
-
- The initial developer of the original code is John G. Dorsey
- <john+@cs.cmu.edu>. Portions created by John G. Dorsey are
- Copyright (C) 1999 John G. Dorsey. All Rights Reserved.
-
- Alternatively, the contents of this file may be used under the
- terms of the GNU Public License version 2 (the "GPL"), in which
- case the provisions of the GPL are applicable instead of the
- above. If you wish to allow the use of your version of this file
- only under the terms of the GPL and not to allow others to use
- your version of this file under the MPL, indicate your decision
- by deleting the provisions above and replace them with the notice
- and other provisions required by the GPL. If you do not delete
- the provisions above, a recipient may use your version of this
- file under either the MPL or the GPL.
-
-======================================================================*/
-
-#if !defined(_PCMCIA_SA1100_H)
-# define _PCMCIA_SA1100_H
-
-#include <pcmcia/cs_types.h>
-#include <pcmcia/ss.h>
-#include <pcmcia/bulkmem.h>
-#include <pcmcia/cistpl.h>
-#include "cs_internal.h"
-#include "sa1100_generic.h"
-
-/* MECR: Expansion Memory Configuration Register
- * (SA-1100 Developers Manual, p.10-13; SA-1110 Developers Manual, p.10-24)
- *
- * MECR layout is:
- *
- * FAST1 BSM1<4:0> BSA1<4:0> BSIO1<4:0> FAST0 BSM0<4:0> BSA0<4:0> BSIO0<4:0>
- *
- * (This layout is actually true only for the SA-1110; the FASTn bits are
- * reserved on the SA-1100.)
- */
-
-#define MECR_SOCKET_0_SHIFT (0)
-#define MECR_SOCKET_1_SHIFT (16)
-
-#define MECR_BS_MASK (0x1f)
-#define MECR_FAST_MODE_MASK (0x01)
-
-#define MECR_BSIO_SHIFT (0)
-#define MECR_BSA_SHIFT (5)
-#define MECR_BSM_SHIFT (10)
-#define MECR_FAST_SHIFT (15)
-
-#define MECR_SET(mecr, sock, shift, mask, bs) \
-((mecr)=((mecr)&~(((mask)<<(shift))<<\
- ((sock)==0?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT)))|\
- (((bs)<<(shift))<<((sock)==0?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT)))
-
-#define MECR_GET(mecr, sock, shift, mask) \
-((((mecr)>>(((sock)==0)?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT))>>\
- (shift))&(mask))
-
-#define MECR_BSIO_SET(mecr, sock, bs) \
-MECR_SET((mecr), (sock), MECR_BSIO_SHIFT, MECR_BS_MASK, (bs))
-
-#define MECR_BSIO_GET(mecr, sock) \
-MECR_GET((mecr), (sock), MECR_BSIO_SHIFT, MECR_BS_MASK)
-
-#define MECR_BSA_SET(mecr, sock, bs) \
-MECR_SET((mecr), (sock), MECR_BSA_SHIFT, MECR_BS_MASK, (bs))
-
-#define MECR_BSA_GET(mecr, sock) \
-MECR_GET((mecr), (sock), MECR_BSA_SHIFT, MECR_BS_MASK)
-
-#define MECR_BSM_SET(mecr, sock, bs) \
-MECR_SET((mecr), (sock), MECR_BSM_SHIFT, MECR_BS_MASK, (bs))
-
-#define MECR_BSM_GET(mecr, sock) \
-MECR_GET((mecr), (sock), MECR_BSM_SHIFT, MECR_BS_MASK)
-
-#define MECR_FAST_SET(mecr, sock, fast) \
-MECR_SET((mecr), (sock), MECR_FAST_SHIFT, MECR_FAST_MODE_MASK, (fast))
-
-#define MECR_FAST_GET(mecr, sock) \
-MECR_GET((mecr), (sock), MECR_FAST_SHIFT, MECR_FAST_MODE_MASK)
-
-
-/* This function implements the BS value calculation for setting the MECR
- * using integer arithmetic:
- */
-static inline unsigned int sa1100_pcmcia_mecr_bs(unsigned int pcmcia_cycle_ns,
- unsigned int cpu_clock_khz){
- unsigned int t = ((pcmcia_cycle_ns * cpu_clock_khz) / 6) - 1000000;
- return (t / 1000000) + (((t % 1000000) == 0) ? 0 : 1);
-}
-
-/* This function returns the (approxmiate) command assertion period, in
- * nanoseconds, for a given CPU clock frequency and MECR BS value:
- */
-static inline unsigned int sa1100_pcmcia_cmd_time(unsigned int cpu_clock_khz,
- unsigned int pcmcia_mecr_bs){
- return (((10000000 * 2) / cpu_clock_khz) * (3 * (pcmcia_mecr_bs + 1))) / 10;
-}
-
-
-/* SA-1100 PCMCIA Memory and I/O timing
- * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
- * The SA-1110 Developer's Manual, section 10.2.5, says the following:
- *
- * "To calculate the recommended BS_xx value for each address space:
- * divide the command width time (the greater of twIOWR and twIORD,
- * or the greater of twWE and twOE) by processor cycle time; divide
- * by 2; divide again by 3 (number of BCLK's per command assertion);
- * round up to the next whole number; and subtract 1."
- *
- * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
- * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
- * a minimum value of 165ns, as well. Section 4.7.2 (describing
- * common and attribute memory write timing) says that twWE has a
- * minimum value of 150ns for a 250ns cycle time (for 5V operation;
- * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
- * operation, also section 4.7.4). Section 4.7.3 says that taOE
- * has a maximum value of 150ns for a 300ns cycle time (for 5V
- * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
- *
- * When configuring memory maps, Card Services appears to adopt the policy
- * that a memory access time of "0" means "use the default." The default
- * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
- * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
- * memory command width time is 300ns.
- */
-#define SA1100_PCMCIA_IO_ACCESS (165)
-#define SA1100_PCMCIA_5V_MEM_ACCESS (150)
-#define SA1100_PCMCIA_3V_MEM_ACCESS (300)
-
-
-/* The socket driver actually works nicely in interrupt-driven form,
- * so the (relatively infrequent) polling is "just to be sure."
- */
-#define SA1100_PCMCIA_POLL_PERIOD (2*HZ)
-
-struct pcmcia_low_level;
-
-/* I/O pins replacing memory pins
- * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
- *
- * These signals change meaning when going from memory-only to
- * memory-or-I/O interface:
- */
-#define iostschg bvd1
-#define iospkr bvd2
-
-#endif /* !defined(_PCMCIA_SA1100_H) */
+++ /dev/null
-/*
- * drivers/pcmcia/sa1100_adsbitsy.c
- *
- * PCMCIA implementation routines for ADS Bitsy
- *
- * 9/18/01 Woojung
- * Fixed wrong PCMCIA voltage setting
- *
- * 7/5/01 Woojung Huh <whuh@applieddata.net>
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/device.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-
-#include "sa1111_generic.h"
-
-static int adsbitsy_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
-{
- /* Set GPIO_A<3:0> to be outputs for PCMCIA/CF power controller: */
- PA_DDR &= ~(GPIO_GPIO0 | GPIO_GPIO1 | GPIO_GPIO2 | GPIO_GPIO3);
-
- /* Disable Power 3.3V/5V for PCMCIA/CF */
- PA_DWR |= GPIO_GPIO0 | GPIO_GPIO1 | GPIO_GPIO2 | GPIO_GPIO3;
-
- /* Why? */
- MECR = 0x09430943;
-
- return sa1111_pcmcia_init(skt);
-}
-
-static int
-adsbitsy_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_t *state)
-{
- unsigned int pa_dwr_mask, pa_dwr_set;
- int ret;
-
- switch (skt->nr) {
- case 0:
- pa_dwr_mask = GPIO_GPIO0 | GPIO_GPIO1;
-
- switch (state->Vcc) {
- default:
- case 0: pa_dwr_set = GPIO_GPIO0 | GPIO_GPIO1; break;
- case 33: pa_dwr_set = GPIO_GPIO1; break;
- case 50: pa_dwr_set = GPIO_GPIO0; break;
- }
- break;
-
- case 1:
- pa_dwr_mask = GPIO_GPIO2 | GPIO_GPIO3;
-
- switch (state->Vcc) {
- default:
- case 0: pa_dwr_set = 0; break;
- case 33: pa_dwr_set = GPIO_GPIO2; break;
- case 50: pa_dwr_set = GPIO_GPIO3; break;
- }
-
- default:
- return -1;
- }
-
- if (state->Vpp != state->Vcc && state->Vpp != 0) {
- printk(KERN_ERR "%s(): CF slot cannot support VPP %u\n",
- __FUNCTION__, state->Vpp);
- return -1;
- }
-
- ret = sa1111_pcmcia_configure_socket(skt, state);
- if (ret == 0) {
- unsigned long flags;
-
- local_irq_save(flags);
- PA_DWR = (PA_DWR & ~pa_dwr_mask) | pa_dwr_set;
- local_irq_restore(flags);
- }
-
- return ret;
-}
-
-static struct pcmcia_low_level adsbitsy_pcmcia_ops = {
- .owner = THIS_MODULE,
- .hw_init = adsbitsy_pcmcia_hw_init,
- .hw_shutdown = sa1111_pcmcia_hw_shutdown,
- .socket_state = sa1111_pcmcia_socket_state,
- .configure_socket = adsbitsy_pcmcia_configure_socket,
- .socket_init = sa1111_pcmcia_socket_init,
- .socket_suspend = sa1111_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_adsbitsy_init(struct device *dev)
-{
- int ret = -ENODEV;
- if (machine_is_adsbitsy())
- ret = sa11xx_drv_pcmcia_probe(dev, &adsbitsy_pcmcia_ops, 0, 2);
- return ret;
-}
+++ /dev/null
-/*
- * drivers/pcmcia/sa1100_flexanet.c
- *
- * PCMCIA implementation routines for Flexanet.
- * by Jordi Colomer, 09/05/2001
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/device.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-#include "sa1100_generic.h"
-
-static struct pcmcia_irqs irqs[] = {
- { 0, IRQ_GPIO_CF1_CD, "CF1_CD" },
- { 0, IRQ_GPIO_CF1_BVD1, "CF1_BVD1" },
- { 1, IRQ_GPIO_CF2_CD, "CF2_CD" },
- { 1, IRQ_GPIO_CF2_BVD1, "CF2_BVD1" }
-};
-
-/*
- * Socket initialization.
- *
- * Called by sa1100_pcmcia_driver_init on startup.
- */
-static int flexanet_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
-{
- skt->irq = skt->nr ? IRQ_GPIO_CF2_IRQ : IRQ_GPIO_CF1_IRQ;
-
- return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-
-/*
- * Socket shutdown
- */
-static void flexanet_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-
-/*
- * Get the state of the sockets.
- *
- * Sockets in Flexanet are 3.3V only, without BVD2.
- *
- */
-static void
-flexanet_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
- struct pcmcia_state *state)
-{
- unsigned long levels = GPLR; /* Sense the GPIOs, asynchronously */
-
- switch (skt->nr) {
- ase 0: /* Socket 0 */
- state->detect = ((levels & GPIO_CF1_NCD)==0)?1:0;
- state->ready = (levels & GPIO_CF1_IRQ)?1:0;
- state->bvd1 = (levels & GPIO_CF1_BVD1)?1:0;
- state->bvd2 = 1;
- state->wrprot = 0;
- state->vs_3v = 1;
- state->vs_Xv = 0;
- break;
-
- case 1: /* Socket 1 */
- state->detect = ((levels & GPIO_CF2_NCD)==0)?1:0;
- state->ready = (levels & GPIO_CF2_IRQ)?1:0;
- state->bvd1 = (levels & GPIO_CF2_BVD1)?1:0;
- state->bvd2 = 1;
- state->wrprot = 0;
- state->vs_3v = 1;
- state->vs_Xv = 0;
- break;
- }
-}
-
-
-/*
- *
- */
-static int
-flexanet_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
- const socket_state_t *state)
-{
- unsigned long value, flags, mask;
-
- /* Ignore the VCC level since it is 3.3V and always on */
- switch (state->Vcc) {
- case 0:
- printk(KERN_WARNING "%s(): CS asked to power off.\n",
- __FUNCTION__);
- break;
-
- case 50:
- printk(KERN_WARNING "%s(): CS asked for 5V, applying 3.3V...\n",
- __FUNCTION__);
-
- case 33:
- break;
-
- default:
- printk(KERN_ERR "%s(): unrecognized Vcc %u\n", __FUNCTION__,
- state->Vcc);
- return -1;
- }
-
- /* Reset the slot(s) using the controls in the BCR */
- mask = 0;
-
- switch (skt->nr) {
- case 0:
- mask = FHH_BCR_CF1_RST;
- break;
- case 1:
- mask = FHH_BCR_CF2_RST;
- break;
- }
-
- local_irq_save(flags);
-
- value = flexanet_BCR;
- value = (state->flags & SS_RESET) ? (value | mask) : (value & ~mask);
- FHH_BCR = flexanet_BCR = value;
-
- local_irq_restore(flags);
-
- return 0;
-}
-
-static void flexanet_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_enable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static void flexanet_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_disable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-/*
- * The set of socket operations
- *
- */
-static struct pcmcia_low_level flexanet_pcmcia_ops = {
- .owner = THIS_MODULE,
- .hw_init = flexanet_pcmcia_hw_init,
- .hw_shutdown = flexanet_pcmcia_hw_shutdown,
- .socket_state = flexanet_pcmcia_socket_state,
- .configure_socket = flexanet_pcmcia_configure_socket,
- .socket_init = flexanet_pcmcia_socket_init,
- .socket_suspend = flexanet_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_flexanet_init(struct device *dev)
-{
- int ret = -ENODEV;
-
- if (machine_is_flexanet())
- ret = sa11xx_drv_pcmcia_probe(dev, &flexanet_pcmcia_ops, 0, 2);
-
- return ret;
-}
+++ /dev/null
-/*
- * drivers/pcmcia/sa1100_freebird.c
- *
- * Created by Eric Peng <ericpeng@coventive.com>
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/device.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-#include "sa1100_generic.h"
-
-static struct pcmcia_irqs irqs[] = {
- { 0, IRQ_GPIO_FREEBIRD_CF_CD, "CF_CD" },
- { 0, IRQ_GPIO_FREEBIRD_CF_BVD, "CF_BVD1" },
-};
-
-static int freebird_pcmcia_init(struct soc_pcmcia_socket *skt)
-{
- /* Enable Linkup CF card */
- LINKUP_PRC = 0xc0;
- mdelay(100);
- LINKUP_PRC = 0xc1;
- mdelay(100);
- LINKUP_PRC = 0xd1;
- mdelay(100);
- LINKUP_PRC = 0xd1;
- mdelay(100);
- LINKUP_PRC = 0xc0;
-
- skt->irq = IRQ_GPIO_FREEBIRD_CF_IRQ;
-
- return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static void freebird_pcmcia_shutdown(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs);
-
- /* Disable CF card */
- LINKUP_PRC = 0x40; /* SSP=1 SOE=0 */
- mdelay(100);
-}
-
-static void
-freebird_pcmcia_socket_state(struct soc_pcmcia_socket *skt, struct pcmcia_state *state)
-{
- unsigned long levels = LINKUP_PRS;
-// printk("LINKUP_PRS=%x\n",levels);
-
- state->detect = ((levels & (LINKUP_CD1 | LINKUP_CD2))==0)?1:0;
- state->ready = (levels & LINKUP_RDY)?1:0;
- state->bvd1 = (levels & LINKUP_BVD1)?1:0;
- state->bvd2 = (levels & LINKUP_BVD2)?1:0;
- state->wrprot = 0; /* Not available on Assabet. */
- state->vs_3v = 1; /* Can only apply 3.3V on Assabet. */
- state->vs_Xv = 0;
-}
-
-static int
-freebird_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
- socket_state_t *state)
-{
- unsigned long value, flags;
-
- local_irq_save(flags);
-
- value = 0xc0; /* SSP=1 SOE=1 CFE=1 */
-
- switch (state->Vcc) {
- case 0:
- break;
-
- case 50:
- printk(KERN_WARNING "%s(): CS asked for 5V, applying 3.3V...\n",
- __FUNCTION__);
-
- case 33: /* Can only apply 3.3V to the CF slot. */
- value |= LINKUP_S1;
- break;
-
- default:
- printk(KERN_ERR "%s(): unrecognized Vcc %u\n",
- __FUNCTION__, state->Vcc);
- local_irq_restore(flags);
- return -1;
- }
-
- if (state->flags & SS_RESET)
- value |= LINKUP_RESET;
-
- /* Silently ignore Vpp, output enable, speaker enable. */
-
- LINKUP_PRC = value;
-// printk("LINKUP_PRC=%x\n",value);
- local_irq_restore(flags);
-
- return 0;
-}
-
-static void freebird_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_disable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static void freebird_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_enable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static struct pcmcia_low_level freebird_pcmcia_ops = {
- .owner = THIS_MODULE,
- .hw_init = freebird_pcmcia_hw_init,
- .hw_shutdown = freebird_pcmcia_hw_shutdown,
- .socket_state = freebird_pcmcia_socket_state,
- .configure_socket = freebird_pcmcia_configure_socket,
-
- .socket_init = freebird_pcmcia_socket_init,
- .socket_suspend = freebird_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_freebird_init(struct device *dev)
-{
- int ret = -ENODEV;
-
- if (machine_is_freebird())
- ret = sa11xx_drv_pcmcia_probe(dev, &freebird_pcmcia_ops, 0, 1);
-
- return ret;
-}
+++ /dev/null
-/*
- * drivers/pcmcia/sa1100_graphicsclient.c
- *
- * PCMCIA implementation routines for Graphics Client Plus
- *
- * 9/12/01 Woojung
- * Turn power OFF at startup
- * 1/31/2001 Woojung Huh
- * Fix for GC Plus PCMCIA Reset Problem
- * 2/27/2001 Woojung Huh [whuh@applieddata.net]
- * Fix
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-#include "sa1100_generic.h"
-
-#error This is broken!
-
-#define S0_CD_IRQ 60 // Socket 0 Card Detect IRQ
-#define S0_STS_IRQ 55 // Socket 0 PCMCIA IRQ
-
-static volatile unsigned long *PCMCIA_Status =
- ((volatile unsigned long *) ADS_p2v(_ADS_CS_STATUS));
-
-static volatile unsigned long *PCMCIA_Power =
- ((volatile unsigned long *) ADS_p2v(_ADS_CS_PR));
-
-static struct pcmcia_irqs irqs[] = {
- { 0, S0_CD_IRQ, "PCMCIA 0 CD" },
-};
-
-static int gcplus_pcmcia_init(struct soc_pcmcia_socket *skt)
-{
- // Reset PCMCIA
- // Reset Timing for CPLD(U2) version 8001E or later
- *PCMCIA_Power &= ~ ADS_CS_PR_A_RESET;
- udelay(12); // 12 uSec
-
- *PCMCIA_Power |= ADS_CS_PR_A_RESET;
- mdelay(30); // 30 mSec
-
- // Turn off 5V
- *PCMCIA_Power &= ~0x03;
-
- skt->irq = S0_STS_IRQ;
-
- /* Register interrupts */
- return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static void gcplus_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
-{
- /* disable IRQs */
- free_irq(S0_CD_IRQ, skt);
-
- /* Shutdown PCMCIA power */
- mdelay(2); // 2msec
- *PCMCIA_Power &= ~0x03;
-}
-
-static void
-gcplus_pcmcia_socket_state(struct soc_pcmcia_socket *skt, struct pcmcia_state *state)
-{
- unsigned long levels = *PCMCIA_Status;
-
- state->detect=(levels & ADS_CS_ST_A_CD)?1:0;
- state->ready=(levels & ADS_CS_ST_A_READY)?1:0;
- state->bvd1= 0;
- state->bvd2= 0;
- state->wrprot=0;
- state->vs_3v=0;
- state->vs_Xv=0;
-}
-
-static int
-gcplus_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
- const socket_state_t *state)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- switch (state->Vcc) {
- case 0:
- *PCMCIA_Power &= ~(ADS_CS_PR_A_3V_POWER | ADS_CS_PR_A_5V_POWER);
- break;
-
- case 50:
- *PCMCIA_Power &= ~(ADS_CS_PR_A_3V_POWER | ADS_CS_PR_A_5V_POWER);
- *PCMCIA_Power |= ADS_CS_PR_A_5V_POWER;
- break;
-
- case 33:
- *PCMCIA_Power &= ~(ADS_CS_PR_A_3V_POWER | ADS_CS_PR_A_5V_POWER);
- *PCMCIA_Power |= ADS_CS_PR_A_3V_POWER;
- break;
-
- default:
- printk(KERN_ERR "%s(): unrecognized Vcc %u\n",
- __FUNCTION__, state->Vcc);
- local_irq_restore(flags);
- return -1;
- }
-
- /* Silently ignore Vpp, output enable, speaker enable. */
-
- // Reset PCMCIA
- *PCMCIA_Power &= ~ ADS_CS_PR_A_RESET;
- udelay(12);
-
- *PCMCIA_Power |= ADS_CS_PR_A_RESET;
- mdelay(30);
-
- local_irq_restore(flags);
-
- return 0;
-}
-
-static void gcplus_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
-{
-}
-
-static void gcplus_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
-{
-}
-
-static struct pcmcia_low_level gcplus_pcmcia_ops = {
- .owner = THIS_MODULE,
- .hw_init = gcplus_pcmcia_hw_init,
- .hw_shutdown = gcplus_pcmcia_hw_shutdown,
- .socket_state = gcplus_pcmcia_socket_state,
- .configure_socket = gcplus_pcmcia_configure_socket,
- .socket_init = gcplus_pcmcia_socket_init,
- .socket_suspend = gcplus_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_gcplus_init(struct device *dev)
-{
- int ret = -ENODEV;
-
- if (machine_is_gcplus())
- ret = sa11xx_drv_pcmcia_probe(dev, &gcplus_pcmcia_ops, 0, 1);
-
- return ret;
-}
+++ /dev/null
-/*
- * drivers/pcmcia/sa1100_graphicsmaster.c
- *
- * PCMCIA implementation routines for GraphicsMaster
- *
- * 9/18/01 Woojung
- * Fixed wrong PCMCIA voltage setting
- * 7/5/01 Woojung Huh <whuh@applieddata.net>
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/device.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-
-#include "sa1111_generic.h"
-
-static int graphicsmaster_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
-{
- int return_val=0;
-
- /* Set GPIO_A<3:0> to be outputs for PCMCIA/CF power controller: */
- PA_DDR &= ~(GPIO_GPIO0 | GPIO_GPIO1 | GPIO_GPIO2 | GPIO_GPIO3);
-
- /* Disable Power 3.3V/5V for PCMCIA/CF */
- PA_DWR |= GPIO_GPIO0 | GPIO_GPIO1 | GPIO_GPIO2 | GPIO_GPIO3;
-
- /* why? */
- MECR = 0x09430943;
-
- return sa1111_pcmcia_hwinit(skt);
-}
-
-static int
-graphicsmaster_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
- const socket_state_t *state)
-{
- unsigned int pa_dwr_mask, pa_dwr_set;
- int ret;
-
- switch (skt->nr) {
- case 0:
- pa_dwr_mask = GPIO_GPIO0 | GPIO_GPIO1;
-
- switch (state->Vcc) {
- default:
- case 0: pa_dwr_set = GPIO_GPIO0 | GPIO_GPIO1; break;
- case 33: pa_dwr_set = GPIO_GPIO1; break;
- case 50: pa_dwr_set = GPIO_GPIO0; break;
- }
- break;
-
- case 1:
- pa_dwr_mask = GPIO_GPIO2 | GPIO_GPIO3;
-
- switch (state->Vcc) {
- default:
- case 0: pa_dwr_set = GPIO_GPIO2 | GPIO_GPIO3; break;
- case 33: pa_dwr_set = GPIO_GPIO3; break;
- case 50: pa_dwr_set = GPIO_GPIO2; break;
- }
- break;
- }
-
- if (state->Vpp != state->Vcc && state->Vpp != 0) {
- printk(KERN_ERR "%s(): CF slot cannot support Vpp %u\n",
- __FUNCTION__, state->Vpp);
- return -1;
- }
-
- ret = sa1111_pcmcia_configure_socket(skt, state);
- if (ret == 0) {
- unsigned long flags;
-
- local_irq_save(flags);
- PA_DWR = (PA_DWR & ~pa_dwr_mask) | pa_dwr_set;
- local_irq_restore(flags);
- }
-
- return ret;
-}
-
-static struct pcmcia_low_level graphicsmaster_pcmcia_ops = {
- .owner = THIS_MODULE,
- .hw_init = graphicsmaster_pcmcia_init,
- .hw_shutdown = sa1111_pcmcia_hw_shutdown,
- .socket_state = sa1111_pcmcia_socket_state,
- .configure_socket = graphicsmaster_pcmcia_configure_socket,
-
- .socket_init = sa1111_pcmcia_socket_init,
- .socket_suspend = sa1111_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_graphicsmaster_init(struct device *dev)
-{
- int ret = -ENODEV;
-
- if (machine_is_graphicsmaster())
- ret = sa11xx_drv_pcmcia_probe(dev, &graphicsmaster_pcmcia_ops, 0, 2);
-
- return ret;
-}
+++ /dev/null
-/*
- * drivers/pcmcia/sa1100_pangolin.c
- *
- * PCMCIA implementation routines for Pangolin
- *
- */
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/device.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-#include "sa1100_generic.h"
-
-#ifndef CONFIG_SA1100_PANGOLIN_PCMCIA_IDE
-#define PANGOLIN_SOCK 1
-#else
-#define PANGOLIN_SOCK 0
-#endif
-
-static struct pcmcia_irqs irqs[] = {
- { PANGOLIN_SOCK, IRQ_PCMCIA_CD, "PCMCIA CD" },
-};
-
-static int pangolin_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
-{
- int res;
-
-#ifndef CONFIG_SA1100_PANGOLIN_PCMCIA_IDE
- /* Enable PCMCIA bus: */
- GPCR = GPIO_PCMCIA_BUS_ON;
-#endif
-
- skt->irq = IRQ_PCMCIA_IRQ;
-
- return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static void pangolin_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
-
-#ifndef CONFIG_SA1100_PANGOLIN_PCMCIA_IDE
- /* Disable PCMCIA bus: */
- GPSR = GPIO_PCMCIA_BUS_ON;
-#endif
-}
-
-static void
-pangolin_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
- struct pcmcia_state *state)
-{
- unsigned long levels = GPLR;
-
- state->detect=((levels & GPIO_PCMCIA_CD)==0)?1:0;
- state->ready=(levels & GPIO_PCMCIA_IRQ)?1:0;
- state->bvd1=1; /* Not available on Pangolin. */
- state->bvd2=1; /* Not available on Pangolin. */
- state->wrprot=0; /* Not available on Pangolin. */
- state->vs_3v=1; /* Can only apply 3.3V on Pangolin. */
- state->vs_Xv=0;
-}
-
-static int
-pangolin_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
- const socket_state_t *state)
-{
- unsigned long value, flags;
-
- local_irq_save(flags);
-
- /* Murphy: BUS_ON different from POWER ? */
-
- switch (state->Vcc) {
- case 0:
- break;
-#ifndef CONFIG_SA1100_PANGOLIN_PCMCIA_IDE
- case 50:
- printk(KERN_WARNING "%s(): CS asked for 5V, applying 3.3V...\n",
- __FUNCTION__);
- case 33: /* Can only apply 3.3V to the CF slot. */
- break;
-#else
- case 50:
- printk(KERN_WARNING "%s(): CS asked for 5V, determinded by "
- "jumper setting...\n", __FUNCTION__);
- break;
- case 33:
- printk(KERN_WARNING "%s(): CS asked for 3.3V, determined by "
- "jumper setting...\n", __FUNCTION__);
- break;
-#endif
- default:
- printk(KERN_ERR "%s(): unrecognized Vcc %u\n",
- __FUNCTION__, state->Vcc);
- local_irq_restore(flags);
- return -1;
- }
-#ifdef CONFIG_SA1100_PANGOLIN_PCMCIA_IDE
- /* reset & unreset request */
- if (skt->nr == 0) {
- if (state->flags & SS_RESET) {
- GPSR = GPIO_PCMCIA_RESET;
- } else {
- GPCR = GPIO_PCMCIA_RESET;
- }
- }
-#endif
- /* Silently ignore Vpp, output enable, speaker enable. */
- local_irq_restore(flags);
- return 0;
-}
-
-static void pangolin_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_enable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static void pangolin_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_disable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static struct pcmcia_low_level pangolin_pcmcia_ops = {
- .owner = THIS_MODULE,
- .hw_init = pangolin_pcmcia_hw_init,
- .hw_shutdown = pangolin_pcmcia_hw_shutdown,
- .socket_state = pangolin_pcmcia_socket_state,
- .configure_socket = pangolin_pcmcia_configure_socket,
-
- .socket_init = pangolin_pcmcia_socket_init,
- .socket_suspend = pangolin_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_pangolin_init(struct device *dev)
-{
- int ret = -ENODEV;
-
- if (machine_is_pangolin())
- ret = sa11xx_drv_pcmcia_probe(dev, &pangolin_pcmcia_ops, PANGOLIN_SOCK, 1);
-
- return ret;
-}
+++ /dev/null
-#warning "REVISIT_PFS168: Need to verify and test GPIO power encodings."
-/*
- * drivers/pcmcia/sa1100_pfs168.c
- *
- * PFS168 PCMCIA specific routines
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-
-#include "sa1111_generic.h"
-
-static int pfs168_pcmcia_init(struct soc_pcmcia_socket *skt)
-{
- /* TPS2211 to standby mode: */
- PA_DWR &= ~(GPIO_GPIO0 | GPIO_GPIO1 | GPIO_GPIO2 | GPIO_GPIO3);
-
- /* Set GPIO_A<3:0> to be outputs for PCMCIA (socket 0) power controller: */
- PA_DDR &= ~(GPIO_GPIO0 | GPIO_GPIO1 | GPIO_GPIO2 | GPIO_GPIO3);
-
- return sa1111_pcmcia_init(skt);
-}
-
-static int
-pfs168_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
- const socket_state_t *state)
-{
- unsigned int pa_dwr_mask = 0, pa_dwr_set = 0;
- int ret;
-
- /* PFS168 uses the Texas Instruments TPS2211 for PCMCIA (socket 0) voltage control only,
- * with the following connections:
- *
- * TPS2211 PFS168
- *
- * -VCCD0 SA-1111 GPIO A<0>
- * -VCCD0 SA-1111 GPIO A<1>
- * VPPD0 SA-1111 GPIO A<2>
- * VPPD0 SA-1111 GPIO A<2>
- *
- */
-
- switch (skt->nr) {
- case 0:
- pa_dwr_mask = GPIO_GPIO0 | GPIO_GPIO1 | GPIO_GPIO2 | GPIO_GPIO3;
-
- switch (state->Vcc) {
- default:
- case 0: pa_dwr_set = 0; break;
- case 33: pa_dwr_set = GPIO_GPIO0; break;
- case 50: pa_dwr_set = GPIO_GPIO1; break;
- }
-
- switch (state->Vpp) {
- case 0:
- break;
-
- case 120:
- printk(KERN_ERR "%s(): PFS-168 does not support VPP %uV\n",
- __FUNCTION__, state->Vpp / 10);
- return -1;
- break;
-
- default:
- if (state->Vpp == state->Vcc)
- pa_dwr_set |= GPIO_GPIO3;
- else {
- printk(KERN_ERR "%s(): unrecognized VPP %u\n", __FUNCTION__,
- state->Vpp);
- return -1;
- }
- }
- break;
-
- case 1:
- pa_dwr_mask = 0;
- pa_dwr_set = 0;
-
- switch (conf->vcc) {
- case 0:
- case 33:
- break;
-
- case 50:
- printk(KERN_ERR "%s(): PFS-168 CompactFlash socket does not support VCC %uV\n",
- __FUNCTION__, state->Vcc / 10);
- return -1;
-
- default:
- printk(KERN_ERR "%s(): unrecognized VCC %u\n", __FUNCTION__,
- state->Vcc);
- return -1;
- }
-
- if (state->Vpp != state->Vcc && state->Vpp != 0) {
- printk(KERN_ERR "%s(): CompactFlash socket does not support VPP %uV\n",
- __FUNCTION__, state->Vpp / 10);
- return -1;
- }
- break;
- }
-
- ret = sa1111_pcmcia_configure_socket(skt, state);
- if (ret == 0) {
- unsigned long flags;
-
- local_irq_save(flags);
- PA_DWR = (PA_DWR & ~pa_dwr_mask) | pa_dwr_set;
- local_irq_restore(flags);
- }
-
- return 0;
-}
-
-static struct pcmcia_low_level pfs168_pcmcia_ops = {
- .owner = THIS_MODULE,
- .hw_init = pfs168_pcmcia_hw_init,
- .hw_shutdown = sa1111_pcmcia_hw_shutdown,
- .socket_state = sa1111_pcmcia_socket_state,
- .configure_socket = pfs168_pcmcia_configure_socket,
- .socket_init = sa1111_pcmcia_socket_init,
- .socket_suspend = sa1111_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_pfs168_init(struct device *dev)
-{
- int ret = -ENODEV;
-
- if (machine_is_pfs168())
- ret = sa11xx_drv_pcmcia_probe(dev, &pfs168_pcmcia_ops, 0, 2);
-
- return ret;
-}
+++ /dev/null
-/*
- * drivers/pcmcia/sa1100_stork.c
- *
- Copyright 2001 (C) Ken Gordon
-
- This is derived from pre-existing drivers/pcmcia/sa1100_?????.c
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- *
- * PCMCIA implementation routines for stork
- *
- */
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/device.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-#include "sa1100_generic.h"
-
-static int debug = 0;
-
-static struct pcmcia_irqs irqs[] = {
- { 0, IRQ_GPIO_STORK_PCMCIA_A_CARD_DETECT, "PCMCIA_CD0" },
- { 1, IRQ_GPIO_STORK_PCMCIA_B_CARD_DETECT, "PCMCIA_CD1" },
-};
-
-static int stork_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
-{
- printk("in stork_pcmcia_init\n");
-
- skt->irq = skt->nr ? IRQ_GPIO_STORK_PCMCIA_B_RDY
- : IRQ_GPIO_STORK_PCMCIA_A_RDY;
-
- return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static void stork_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
-{
- int i;
-
- printk("%s\n", __FUNCTION__);
-
- /* disable IRQs */
- soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
-
- /* Disable CF bus: */
- storkClearLatchA(STORK_PCMCIA_PULL_UPS_POWER_ON);
- storkClearLatchA(STORK_PCMCIA_A_POWER_ON);
- storkClearLatchA(STORK_PCMCIA_B_POWER_ON);
-}
-
-static void
-stork_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
- struct pcmcia_state *state)
-{
- unsigned long levels = GPLR;
-
- if (debug > 1)
- printk("%s GPLR=%x IRQ[1:0]=%x\n", __FUNCTION__, levels,
- (levels & (GPIO_STORK_PCMCIA_A_RDY|GPIO_STORK_PCMCIA_B_RDY)));
-
- switch (skt->nr) {
- case 0:
- state->detect=((levels & GPIO_STORK_PCMCIA_A_CARD_DETECT)==0)?1:0;
- state->ready=(levels & GPIO_STORK_PCMCIA_A_RDY)?1:0;
- state->bvd1= 1;
- state->bvd2= 1;
- state->wrprot=0;
- state->vs_3v=1;
- state->vs_Xv=0;
- break;
-
- case 1:
- state->detect=((levels & GPIO_STORK_PCMCIA_B_CARD_DETECT)==0)?1:0;
- state->ready=(levels & GPIO_STORK_PCMCIA_B_RDY)?1:0;
- state->bvd1=1;
- state->bvd2=1;
- state->wrprot=0;
- state->vs_3v=1;
- state->vs_Xv=0;
- break;
- }
-}
-
-static int
-stork_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
- const socket_state_t *state)
-{
- unsigned long flags;
- int DETECT, RDY, POWER, RESET;
-
- printk("%s: socket=%d vcc=%d vpp=%d reset=%d\n", __FUNCTION__,
- skt->nr, state->Vcc, state->Vpp, state->flags & SS_RESET ? 1 : 0);
-
- local_irq_save(flags);
-
- if (skt->nr == 0) {
- DETECT = GPIO_STORK_PCMCIA_A_CARD_DETECT;
- RDY = GPIO_STORK_PCMCIA_A_RDY;
- POWER = STORK_PCMCIA_A_POWER_ON;
- RESET = STORK_PCMCIA_A_RESET;
- } else {
- DETECT = GPIO_STORK_PCMCIA_B_CARD_DETECT;
- RDY = GPIO_STORK_PCMCIA_B_RDY;
- POWER = STORK_PCMCIA_B_POWER_ON;
- RESET = STORK_PCMCIA_B_RESET;
- }
-
-/*
- if (storkTestGPIO(DETECT)) {
- printk("no card detected - but resetting anyway\r\n");
- }
-*/
- switch (state->Vcc) {
- case 0:
-/* storkClearLatchA(STORK_PCMCIA_PULL_UPS_POWER_ON); */
- storkClearLatchA(POWER);
- break;
-
- case 50:
- case 33:
- storkSetLatchA(STORK_PCMCIA_PULL_UPS_POWER_ON);
- storkSetLatchA(POWER);
- break;
-
- default:
- printk(KERN_ERR "%s(): unrecognized Vcc %u\n", __FUNCTION__,
- state->Vcc);
- local_irq_restore(flags);
- return -1;
- }
-
- if (state->flags & SS_RESET)
- storkSetLatchB(RESET);
- else
- storkClearLatchB(RESET);
-
- local_irq_restore(flags);
-
- /* silently ignore vpp and speaker enables. */
-
- printk("%s: finished\n", __FUNCTION__);
-
- return 0;
-}
-
-static void stork_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
-{
- storkSetLatchA(STORK_PCMCIA_PULL_UPS_POWER_ON);
-
- soc_pcmcia_enable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static void stork_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_disable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-
- /*
- * Hack!
- */
- if (skt->nr == 1)
- storkClearLatchA(STORK_PCMCIA_PULL_UPS_POWER_ON);
-
- return 0;
-}
-
-static struct pcmcia_low_level stork_pcmcia_ops = {
- .owner = THIS_MODULE,
- .hw_init = stork_pcmcia_hw_init,
- .hw_shutdown = stork_pcmcia_hw_shutdown,
- .socket_state = stork_pcmcia_socket_state,
- .configure_socket = stork_pcmcia_configure_socket,
-
- .socket_init = stork_pcmcia_socket_init,
- .socket_suspend = stork_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_stork_init(struct device *dev)
-{
- int ret = -ENODEV;
-
- if (machine_is_stork())
- ret = sa11xx_drv_pcmcia_probe(dev, &stork_pcmcia_ops, 0, 2);
-
- return ret;
-}
+++ /dev/null
-/*
- * drivers/pcmcia/sa1100_system3.c
- *
- * PT Diagital Board PCMCIA specific routines
- *
- * Copyright (C) 2001 Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
- *
- * $Id: sa1100_system3.c,v 1.1.4.2 2002/02/25 13:56:45 seletz Exp $
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * $Log: sa1100_system3.c,v $
- * Revision 1.1.4.2 2002/02/25 13:56:45 seletz
- * - more cleanups
- * - setup interrupts for CF card only ATM
- *
- * Revision 1.1.4.1 2002/02/14 02:23:27 seletz
- * - 2.5.2-rmk6 PCMCIA changes
- *
- * Revision 1.1.2.1 2002/02/13 23:49:33 seletz
- * - added from 2.4.16-rmk2
- * - cleanups
- *
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/ioport.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-#include <asm/hardware/sa1111.h>
-
-#include "sa1111_generic.h"
-
-#define DEBUG 0
-
-#ifdef DEBUG
-# define DPRINTK( x, args... ) printk( "%s: line %d: "x, __FUNCTION__, __LINE__, ## args );
-#else
-# define DPRINTK( x, args... ) /* nix */
-#endif
-
-static int system3_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
-{
- skt->irq = skt->nr ? IRQ_S1_READY_NINT : IRQ_S0_READY_NINT;
-
- /* Don't need no CD and BVD* interrupts */
- return 0;
-}
-
-void system3_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
-{
-}
-
-static void
-system3_pcmcia_socket_state(struct soc_pcmcia_socket *skt, struct pcmcia_state *state)
-{
- unsigned long status = PCSR;
-
- switch (skt->nr) {
-#if 0 /* PCMCIA socket not yet connected */
- case 0:
- state->detect = status & PCSR_S0_DETECT ? 0 : 1;
- state->ready = status & PCSR_S0_READY ? 1 : 0;
- state->bvd1 = status & PCSR_S0_BVD1 ? 1 : 0;
- state->bvd2 = 1;
- state->wrprot = status & PCSR_S0_WP ? 1 : 0;
- state->vs_3v = 1;
- state->vs_Xv = 0;
- break;
-#endif
-
- case 1:
- state->detect = status & PCSR_S1_DETECT ? 0 : 1;
- state->ready = status & PCSR_S1_READY ? 1 : 0;
- state->bvd1 = status & PCSR_S1_BVD1 ? 1 : 0;
- state->bvd2 = 1;
- state->wrprot = status & PCSR_S1_WP ? 1 : 0;
- state->vs_3v = 1;
- state->vs_Xv = 0;
- break;
- }
-
- DPRINTK("Sock %d PCSR=0x%08lx, Sx_RDY_nIREQ=%d\n",
- skt->nr, status, state->ready);
-}
-
-struct pcmcia_low_level system3_pcmcia_ops = {
- .owner = THIS_MODULE,
- .init = system3_pcmcia_hw_init,
- .shutdown = system3_pcmcia_hw_shutdown,
- .socket_state = system3_pcmcia_socket_state,
- .configure_socket = sa1111_pcmcia_configure_socket,
-
- .socket_init = sa1111_pcmcia_socket_init,
- .socket_suspend = sa1111_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_system3_init(struct device *dev)
-{
- int ret = -ENODEV;
-
- if (machine_is_pt_system3())
- /* only CF ATM */
- ret = sa11xx_drv_pcmcia_probe(dev, &system3_pcmcia_ops, 1, 1);
-
- return ret;
-}
+++ /dev/null
-/*
- * drivers/pcmcia/sa1100_trizeps.c
- *
- * PCMCIA implementation routines for Trizeps
- *
- * Authors:
- * Andreas Hofer <ho@dsa-ac.de>,
- * Peter Lueg <pl@dsa-ac.de>,
- * Guennadi Liakhovetski <gl@dsa-ac.de>
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/device.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/arch/trizeps.h>
-#include <asm/mach-types.h>
-#include <asm/system.h>
-#include <asm/irq.h>
-#include "sa1100_generic.h"
-
-#define NUMBER_OF_TRIZEPS_PCMCIA_SLOTS 1
-
-static struct pcmcia_irqs irqs[] = {
- { 0, TRIZEPS_IRQ_PCMCIA_CD0, "PCMCIA_CD0" },
-};
-
-/**
- *
- *
- ******************************************************/
-static int trizeps_pcmcia_init(struct soc_pcmcia_socket *skt)
-{
- skt->irq = TRIZEPS_IRQ_PCMCIA_IRQ0;
-
- /* Enable CF bus: */
- TRIZEPS_BCR_clear(TRIZEPS_BCR1, TRIZEPS_nPCM_ENA_REG);
-
- /* All those are inputs */
- GPDR &= ~((GPIO_GPIO(TRIZEPS_GPIO_PCMCIA_CD0))
- | (GPIO_GPIO(TRIZEPS_GPIO_PCMCIA_IRQ0)));
-
- return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-/**
- *
- *
- ******************************************************/
-static void trizeps_pcmcia_shutdown(struct soc_pcmcia_socket *skt)
-{
- printk(">>>>>PCMCIA TRIZEPS shutdown\n");
-
- soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
-
- /* Disable CF bus: */
- TRIZEPS_BCR_set(TRIZEPS_BCR1, TRIZEPS_nPCM_ENA_REG);
-}
-
-/**
- *
- ******************************************************/
-static void
-trizeps_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
- struct pcmcia_state *state_array)
-{
- unsigned long levels = GPLR;
-
- state->detect = ((levels & GPIO_GPIO(TRIZEPS_GPIO_PCMCIA_CD0)) == 0) ? 1 : 0;
- state->ready = ((levels & GPIO_GPIO(TRIZEPS_GPIO_PCMCIA_IRQ0)) != 0) ? 1 : 0;
- state->bvd1 = ((TRIZEPS_BCR1 & TRIZEPS_PCM_BVD1) !=0 ) ? 1 : 0;
- state->bvd2 = ((TRIZEPS_BCR1 & TRIZEPS_PCM_BVD2) != 0) ? 1 : 0;
- state->wrprot = 0; // not write protected
- state->vs_3v = ((TRIZEPS_BCR1 & TRIZEPS_nPCM_VS1) == 0) ? 1 : 0; //VS1=0 -> vs_3v=1
- state->vs_Xv = ((TRIZEPS_BCR1 & TRIZEPS_nPCM_VS2) == 0) ? 1 : 0; //VS2=0 -> vs_Xv=1
-}
-
-/**
- *
- *
- ******************************************************/
-static int
-trizeps_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
- const socket_state_t *state)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- switch (state->Vcc) {
- case 0:
- printk(">>> PCMCIA Power off\n");
- TRIZEPS_BCR_clear(TRIZEPS_BCR1, TRIZEPS_PCM_V3_EN_REG);
- TRIZEPS_BCR_clear(TRIZEPS_BCR1, TRIZEPS_PCM_V5_EN_REG);
- break;
-
- case 33:
- // 3.3V Power on
- TRIZEPS_BCR_clear(TRIZEPS_BCR1, TRIZEPS_PCM_V3_EN_REG);
- TRIZEPS_BCR_set(TRIZEPS_BCR1, TRIZEPS_PCM_V5_EN_REG);
- break;
- case 50:
- // 5.0V Power on
- TRIZEPS_BCR_set(TRIZEPS_BCR1, TRIZEPS_PCM_V3_EN_REG);
- TRIZEPS_BCR_clear(TRIZEPS_BCR1, TRIZEPS_PCM_V5_EN_REG);
- break;
- default:
- printk(KERN_ERR "%s(): unrecognized Vcc %u\n", __FUNCTION__,
- state->Vcc);
- local_irq_restore(flags);
- return -1;
- }
-
- if (state->flags & SS_RESET)
- TRIZEPS_BCR_set(TRIZEPS_BCR1, TRIZEPS_nPCM_RESET_DISABLE); // Reset
- else
- TRIZEPS_BCR_clear(TRIZEPS_BCR1, TRIZEPS_nPCM_RESET_DISABLE); // no Reset
- /*
- printk(" vcc=%u vpp=%u -->reset=%i\n",
- state->Vcc,
- state->Vpp,
- ((BCR_read(1) & nPCM_RESET_DISABLE)? 1:0));
- */
- local_irq_restore(flags);
-
- return 0;
-}
-
-static void trizeps_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_enable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static void trizeps_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_disable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-/**
- * low-level PCMCIA interface
- *
- ******************************************************/
-struct pcmcia_low_level trizeps_pcmcia_ops = {
- .owner = THIS_MODULE,
- .hw_init = trizeps_pcmcia_hw_init,
- .hw_shutdown = trizeps_pcmcia_hw_shutdown,
- .socket_state = trizeps_pcmcia_socket_state,
- .configure_socket = trizeps_pcmcia_configure_socket,
- .socket_init = trizeps_pcmcia_socket_init,
- .socket_suspend = trizeps_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_trizeps_init(struct device *dev)
-{
- int ret = -ENODEV;
-
- if (machine_is_trizeps())
- ret = sa11xx_drv_pcmcia_probe(dev, &trizeps_pcmcia_ops, 0,
- NUMBER_OF_TRIZEPS_PCMCIA_SLOTS);
-
- return ret;
-}
+++ /dev/null
-/*
- * drivers/pcmcia/sa1100_xp860.c
- *
- * XP860 PCMCIA specific routines
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/sched.h>
-#include <linux/device.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-#include "sa1100_generic.h"
-
-#define NCR_A0VPP (1<<16)
-#define NCR_A1VPP (1<<17)
-
-static int xp860_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
-{
- /* Set GPIO_A<3:0> to be outputs for PCMCIA/CF power controller: */
- PA_DDR &= ~(GPIO_GPIO0 | GPIO_GPIO1 | GPIO_GPIO2 | GPIO_GPIO3);
-
- /* MAX1600 to standby mode: */
- PA_DWR &= ~(GPIO_GPIO0 | GPIO_GPIO1 | GPIO_GPIO2 | GPIO_GPIO3);
-
-#error Consider the following comment
- /*
- * 1- Please move GPDR initialisation where it is interrupt or preemption
- * safe (like from xp860_map_io).
- * 2- The GPCR line is bogus i.e. it will simply have absolutely no effect.
- * Please see its definition in the SA1110 manual.
- * 3- Please do not use NCR_* values!
- */
- GPDR |= (NCR_A0VPP | NCR_A1VPP);
- GPCR &= ~(NCR_A0VPP | NCR_A1VPP);
-
- return sa1111_pcmcia_hw_init(skt);
-}
-
-static int
-xp860_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_t *state)
-{
- unsigned int gpio_mask, pa_dwr_mask;
- unsigned int gpio_set, pa_dwr_set;
- int ret;
-
- /* Neponset uses the Maxim MAX1600, with the following connections:
-#warning ^^^ This isn't a neponset!
- *
- * MAX1600 Neponset
- *
- * A0VCC SA-1111 GPIO A<1>
- * A1VCC SA-1111 GPIO A<0>
- * A0VPP CPLD NCR A0VPP
- * A1VPP CPLD NCR A1VPP
- * B0VCC SA-1111 GPIO A<2>
- * B1VCC SA-1111 GPIO A<3>
- * B0VPP ground (slot B is CF)
- * B1VPP ground (slot B is CF)
- *
- * VX VCC (5V)
- * VY VCC3_3 (3.3V)
- * 12INA 12V
- * 12INB ground (slot B is CF)
- *
- * The MAX1600 CODE pin is tied to ground, placing the device in
- * "Standard Intel code" mode. Refer to the Maxim data sheet for
- * the corresponding truth table.
- */
-
- switch (skt->nr) {
- case 0:
- pa_dwr_mask = GPIO_GPIO0 | GPIO_GPIO1;
- gpio_mask = NCR_A0VPP | NCR_A1VPP;
-
- switch (state->Vcc) {
- default:
- case 0: pa_dwr_set = 0; break;
- case 33: pa_dwr_set = GPIO_GPIO1; break;
- case 50: pa_dwr_set = GPIO_GPIO0; break;
- }
-
- switch (state->Vpp) {
- case 0: gpio_set = 0; break;
- case 120: gpio_set = NCR_A1VPP; break;
-
- default:
- if (state->Vpp == state->Vcc)
- gpio_set = NCR_A0VPP;
- else {
- printk(KERN_ERR "%s(): unrecognized Vpp %u\n",
- __FUNCTION__, state->Vpp);
- return -1;
- }
- }
- break;
-
- case 1:
- pa_dwr_mask = GPIO_GPIO2 | GPIO_GPIO3;
- gpio_mask = 0;
- gpio_set = 0;
-
- switch (state->Vcc) {
- default:
- case 0: pa_dwr_set = 0; break;
- case 33: pa_dwr_set = GPIO_GPIO2; break;
- case 50: pa_dwr_set = GPIO_GPIO3; break;
- }
-
- if (state->Vpp != state->Vcc && state->Vpp != 0) {
- printk(KERN_ERR "%s(): CF slot cannot support Vpp %u\n",
- __FUNCTION__, state->Vpp);
- return -1;
- }
- break;
- }
-
- ret = sa1111_pcmcia_configure_socket(skt, state);
- if (ret == 0) {
- unsigned long flags;
-
- local_irq_save(flags);
- PA_DWR = (PA_DWR & ~pa_dwr_mask) | pa_dwr_set;
- GPSR = gpio_set;
- GPCR = gpio_set ^ gpio_mask;
- local_irq_restore(flags);
- }
-
- return ret;
-}
-
-static struct pcmcia_low_level xp860_pcmcia_ops = {
- .owner = THIS_MODULE,
- .hw_init = xp860_pcmcia_hw_init,
- .hw_shutdown = sa1111_pcmcia_hw_shutdown,
- .socket_state = sa1111_pcmcia_socket_state,
- .configure_socket = xp860_pcmcia_configure_socket,
- .socket_init = sa1111_pcmcia_socket_init,
- .socket_suspend = sa1111_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_xp860_init(struct device *dev)
-{
- int ret = -ENODEV;
-
- if (machine_is_xp860())
- ret = sa11xx_drv_pcmcia_probe(dev, &xp860_pcmcia_ops, 0, 2);
-
- return ret;
-}
+++ /dev/null
-/*
- * drivers/pcmcia/sa1100_yopy.c
- *
- * PCMCIA implementation routines for Yopy
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/device.h>
-#include <linux/init.h>
-
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-#include "sa1100_generic.h"
-
-
-static inline void pcmcia_power(int on) {
- /* high for power up */
- yopy_gpio_set(GPIO_CF_POWER, on);
-}
-
-static inline void pcmcia_reset(int reset)
-{
- /* high for reset */
- yopy_gpio_set(GPIO_CF_RESET, reset);
-}
-
-static struct pcmcia_irqs irqs[] = {
- { 0, IRQ_CF_CD, "CF_CD" },
- { 0, IRQ_CF_BVD2, "CF_BVD2" },
- { 0, IRQ_CF_BVD1, "CF_BVD1" },
-};
-
-static int yopy_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
-{
- skt->irq = IRQ_CF_IREQ;
-
- pcmcia_power(0);
- pcmcia_reset(1);
-
- return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static void yopy_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
-
- /* Disable CF */
- pcmcia_reset(1);
- pcmcia_power(0);
-}
-
-static void
-yopy_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
- struct pcmcia_state_array *state)
-{
- unsigned long levels = GPLR;
-
- state->detect = (levels & GPIO_CF_CD) ? 0 : 1;
- state->ready = (levels & GPIO_CF_READY) ? 1 : 0;
- state->bvd1 = (levels & GPIO_CF_BVD1) ? 1 : 0;
- state->bvd2 = (levels & GPIO_CF_BVD2) ? 1 : 0;
- state->wrprot = 0; /* Not available on Yopy. */
- state->vs_3v = 0; /* FIXME Can only apply 3.3V on Yopy. */
- state->vs_Xv = 0;
-}
-
-static int
-yopy_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
- const socket_state_t *state)
-{
- switch (state->Vcc) {
- case 0: /* power off */
- pcmcia_power(0);
- break;
- case 50:
- printk(KERN_WARNING "%s(): CS asked for 5V, applying 3.3V..\n", __FUNCTION__);
- case 33:
- pcmcia_power(1);
- break;
- default:
- printk(KERN_ERR "%s(): unrecognized Vcc %u\n",
- __FUNCTION__, state->Vcc);
- return -1;
- }
-
- pcmcia_reset(state->flags & SS_RESET ? 1 : 0);
-
- /* Silently ignore Vpp, output enable, speaker enable. */
-
- return 0;
-}
-
-static void yopy_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_enable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static void yopy_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
-{
- soc_pcmcia_disable_irqs(skt, irqs, ARRAY_SIZE(irqs));
-}
-
-static struct pcmcia_low_level yopy_pcmcia_ops = {
- .owner = THIS_MODULE,
- .init = yopy_pcmcia_init,
- .shutdown = yopy_pcmcia_shutdown,
- .socket_state = yopy_pcmcia_socket_state,
- .configure_socket = yopy_pcmcia_configure_socket,
-
- .socket_init = yopy_pcmcia_socket_init,
- .socket_suspend = yopy_pcmcia_socket_suspend,
-};
-
-int __init pcmcia_yopy_init(struct device *dev)
-{
- int ret = -ENODEV;
-
- if (machine_is_yopy())
- ret = sa11xx_drv_pcmcia_probe(dev, &yopy_pcmcia_ops, 0, 1);
-
- return ret;
-}
+++ /dev/null
-/*======================================================================
-
- Device driver for the PCMCIA control functionality of StrongARM
- SA-1100 microprocessors.
-
- The contents of this file are subject to the Mozilla Public
- License Version 1.1 (the "License"); you may not use this file
- except in compliance with the License. You may obtain a copy of
- the License at http://www.mozilla.org/MPL/
-
- Software distributed under the License is distributed on an "AS
- IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
- implied. See the License for the specific language governing
- rights and limitations under the License.
-
- The initial developer of the original code is John G. Dorsey
- <john+@cs.cmu.edu>. Portions created by John G. Dorsey are
- Copyright (C) 1999 John G. Dorsey. All Rights Reserved.
-
- Alternatively, the contents of this file may be used under the
- terms of the GNU Public License version 2 (the "GPL"), in which
- case the provisions of the GPL are applicable instead of the
- above. If you wish to allow the use of your version of this file
- only under the terms of the GPL and not to allow others to use
- your version of this file under the MPL, indicate your decision
- by deleting the provisions above and replace them with the notice
- and other provisions required by the GPL. If you do not delete
- the provisions above, a recipient may use your version of this
- file under either the MPL or the GPL.
-
-======================================================================*/
-/*
- * Please see linux/Documentation/arm/SA1100/PCMCIA for more information
- * on the low-level kernel interface.
- */
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/config.h>
-#include <linux/cpufreq.h>
-#include <linux/ioport.h>
-#include <linux/kernel.h>
-#include <linux/timer.h>
-#include <linux/mm.h>
-#include <linux/notifier.h>
-#include <linux/interrupt.h>
-#include <linux/spinlock.h>
-
-#include <asm/hardware.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/system.h>
-
-#include "sa11xx_core.h"
-#include "sa1100.h"
-
-#ifdef DEBUG
-static int pc_debug;
-
-module_param(pc_debug, int, 0644);
-
-#define debug(skt, lvl, fmt, arg...) do { \
- if (pc_debug > (lvl)) \
- printk(KERN_DEBUG "skt%u: %s: " fmt, \
- (skt)->nr, __func__ , ## arg); \
-} while (0)
-
-#else
-#define debug(skt, lvl, fmt, arg...) do { } while (0)
-#endif
-
-#define to_sa1100_socket(x) container_of(x, struct sa1100_pcmcia_socket, socket)
-
-/*
- * sa1100_pcmcia_default_mecr_timing
- * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
- *
- * Calculate MECR clock wait states for given CPU clock
- * speed and command wait state. This function can be over-
- * written by a board specific version.
- *
- * The default is to simply calculate the BS values as specified in
- * the INTEL SA1100 development manual
- * "Expansion Memory (PCMCIA) Configuration Register (MECR)"
- * that's section 10.2.5 in _my_ version of the manual ;)
- */
-static unsigned int
-sa1100_pcmcia_default_mecr_timing(struct sa1100_pcmcia_socket *skt,
- unsigned int cpu_speed,
- unsigned int cmd_time)
-{
- return sa1100_pcmcia_mecr_bs(cmd_time, cpu_speed);
-}
-
-static unsigned short
-calc_speed(unsigned short *spds, int num, unsigned short dflt)
-{
- unsigned short speed = 0;
- int i;
-
- for (i = 0; i < num; i++)
- if (speed < spds[i])
- speed = spds[i];
- if (speed == 0)
- speed = dflt;
-
- return speed;
-}
-
-/* sa1100_pcmcia_set_mecr()
- * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
- *
- * set MECR value for socket <sock> based on this sockets
- * io, mem and attribute space access speed.
- * Call board specific BS value calculation to allow boards
- * to tweak the BS values.
- */
-static int
-sa1100_pcmcia_set_mecr(struct sa1100_pcmcia_socket *skt, unsigned int cpu_clock)
-{
- u32 mecr, old_mecr;
- unsigned long flags;
- unsigned short speed;
- unsigned int bs_io, bs_mem, bs_attr;
-
- speed = calc_speed(skt->spd_io, MAX_IO_WIN, SA1100_PCMCIA_IO_ACCESS);
- bs_io = skt->ops->socket_get_timing(skt, cpu_clock, speed);
-
- speed = calc_speed(skt->spd_mem, MAX_WIN, SA1100_PCMCIA_3V_MEM_ACCESS);
- bs_mem = skt->ops->socket_get_timing(skt, cpu_clock, speed);
-
- speed = calc_speed(skt->spd_attr, MAX_WIN, SA1100_PCMCIA_3V_MEM_ACCESS);
- bs_attr = skt->ops->socket_get_timing(skt, cpu_clock, speed);
-
- local_irq_save(flags);
-
- old_mecr = mecr = MECR;
- MECR_FAST_SET(mecr, skt->nr, 0);
- MECR_BSIO_SET(mecr, skt->nr, bs_io);
- MECR_BSA_SET(mecr, skt->nr, bs_attr);
- MECR_BSM_SET(mecr, skt->nr, bs_mem);
- if (old_mecr != mecr)
- MECR = mecr;
-
- local_irq_restore(flags);
-
- debug(skt, 2, "FAST %X BSM %X BSA %X BSIO %X\n",
- MECR_FAST_GET(mecr, skt->nr),
- MECR_BSM_GET(mecr, skt->nr), MECR_BSA_GET(mecr, skt->nr),
- MECR_BSIO_GET(mecr, skt->nr));
-
- return 0;
-}
-
-static unsigned int sa1100_pcmcia_skt_state(struct sa1100_pcmcia_socket *skt)
-{
- struct pcmcia_state state;
- unsigned int stat;
-
- memset(&state, 0, sizeof(struct pcmcia_state));
-
- skt->ops->socket_state(skt, &state);
-
- stat = state.detect ? SS_DETECT : 0;
- stat |= state.ready ? SS_READY : 0;
- stat |= state.wrprot ? SS_WRPROT : 0;
- stat |= state.vs_3v ? SS_3VCARD : 0;
- stat |= state.vs_Xv ? SS_XVCARD : 0;
-
- /* The power status of individual sockets is not available
- * explicitly from the hardware, so we just remember the state
- * and regurgitate it upon request:
- */
- stat |= skt->cs_state.Vcc ? SS_POWERON : 0;
-
- if (skt->cs_state.flags & SS_IOCARD)
- stat |= state.bvd1 ? SS_STSCHG : 0;
- else {
- if (state.bvd1 == 0)
- stat |= SS_BATDEAD;
- else if (state.bvd2 == 0)
- stat |= SS_BATWARN;
- }
- return stat;
-}
-
-/*
- * sa1100_pcmcia_config_skt
- * ^^^^^^^^^^^^^^^^^^^^^^^^
- *
- * Convert PCMCIA socket state to our socket configure structure.
- */
-static int
-sa1100_pcmcia_config_skt(struct sa1100_pcmcia_socket *skt, socket_state_t *state)
-{
- int ret;
-
- ret = skt->ops->configure_socket(skt, state);
- if (ret == 0) {
- /*
- * This really needs a better solution. The IRQ
- * may or may not be claimed by the driver.
- */
- if (skt->irq_state != 1 && state->io_irq) {
- skt->irq_state = 1;
- set_irq_type(skt->irq, IRQT_FALLING);
- } else if (skt->irq_state == 1 && state->io_irq == 0) {
- skt->irq_state = 0;
- set_irq_type(skt->irq, IRQT_NOEDGE);
- }
-
- skt->cs_state = *state;
- }
-
- if (ret < 0)
- printk(KERN_ERR "sa1100_pcmcia: unable to configure "
- "socket %d\n", skt->nr);
-
- return ret;
-}
-
-/* sa1100_pcmcia_sock_init()
- * ^^^^^^^^^^^^^^^^^^^^^^^^^
- *
- * (Re-)Initialise the socket, turning on status interrupts
- * and PCMCIA bus. This must wait for power to stabilise
- * so that the card status signals report correctly.
- *
- * Returns: 0
- */
-static int sa1100_pcmcia_sock_init(struct pcmcia_socket *sock)
-{
- struct sa1100_pcmcia_socket *skt = to_sa1100_socket(sock);
-
- debug(skt, 2, "initializing socket\n");
-
- skt->ops->socket_init(skt);
- return 0;
-}
-
-
-/*
- * sa1100_pcmcia_suspend()
- * ^^^^^^^^^^^^^^^^^^^^^^^
- *
- * Remove power on the socket, disable IRQs from the card.
- * Turn off status interrupts, and disable the PCMCIA bus.
- *
- * Returns: 0
- */
-static int sa1100_pcmcia_suspend(struct pcmcia_socket *sock)
-{
- struct sa1100_pcmcia_socket *skt = to_sa1100_socket(sock);
- int ret;
-
- debug(skt, 2, "suspending socket\n");
-
- ret = sa1100_pcmcia_config_skt(skt, &dead_socket);
- if (ret == 0)
- skt->ops->socket_suspend(skt);
-
- return ret;
-}
-
-static spinlock_t status_lock = SPIN_LOCK_UNLOCKED;
-
-/* sa1100_check_status()
- * ^^^^^^^^^^^^^^^^^^^^^
- */
-static void sa1100_check_status(struct sa1100_pcmcia_socket *skt)
-{
- unsigned int events;
-
- debug(skt, 4, "entering PCMCIA monitoring thread\n");
-
- do {
- unsigned int status;
- unsigned long flags;
-
- status = sa1100_pcmcia_skt_state(skt);
-
- spin_lock_irqsave(&status_lock, flags);
- events = (status ^ skt->status) & skt->cs_state.csc_mask;
- skt->status = status;
- spin_unlock_irqrestore(&status_lock, flags);
-
- debug(skt, 4, "events: %s%s%s%s%s%s\n",
- events == 0 ? "<NONE>" : "",
- events & SS_DETECT ? "DETECT " : "",
- events & SS_READY ? "READY " : "",
- events & SS_BATDEAD ? "BATDEAD " : "",
- events & SS_BATWARN ? "BATWARN " : "",
- events & SS_STSCHG ? "STSCHG " : "");
-
- if (events)
- pcmcia_parse_events(&skt->socket, events);
- } while (events);
-}
-
-/* sa1100_pcmcia_poll_event()
- * ^^^^^^^^^^^^^^^^^^^^^^^^^^
- * Let's poll for events in addition to IRQs since IRQ only is unreliable...
- */
-static void sa1100_pcmcia_poll_event(unsigned long dummy)
-{
- struct sa1100_pcmcia_socket *skt = (struct sa1100_pcmcia_socket *)dummy;
- debug(skt, 4, "polling for events\n");
-
- mod_timer(&skt->poll_timer, jiffies + SA1100_PCMCIA_POLL_PERIOD);
-
- sa1100_check_status(skt);
-}
-
-
-/* sa1100_pcmcia_interrupt()
- * ^^^^^^^^^^^^^^^^^^^^^^^^^
- * Service routine for socket driver interrupts (requested by the
- * low-level PCMCIA init() operation via sa1100_pcmcia_thread()).
- * The actual interrupt-servicing work is performed by
- * sa1100_pcmcia_thread(), largely because the Card Services event-
- * handling code performs scheduling operations which cannot be
- * executed from within an interrupt context.
- */
-static irqreturn_t sa1100_pcmcia_interrupt(int irq, void *dev, struct pt_regs *regs)
-{
- struct sa1100_pcmcia_socket *skt = dev;
-
- debug(skt, 3, "servicing IRQ %d\n", irq);
-
- sa1100_check_status(skt);
-
- return IRQ_HANDLED;
-}
-
-
-/* sa1100_pcmcia_get_status()
- * ^^^^^^^^^^^^^^^^^^^^^^^^^^
- * Implements the get_status() operation for the in-kernel PCMCIA
- * service (formerly SS_GetStatus in Card Services). Essentially just
- * fills in bits in `status' according to internal driver state or
- * the value of the voltage detect chipselect register.
- *
- * As a debugging note, during card startup, the PCMCIA core issues
- * three set_socket() commands in a row the first with RESET deasserted,
- * the second with RESET asserted, and the last with RESET deasserted
- * again. Following the third set_socket(), a get_status() command will
- * be issued. The kernel is looking for the SS_READY flag (see
- * setup_socket(), reset_socket(), and unreset_socket() in cs.c).
- *
- * Returns: 0
- */
-static int
-sa1100_pcmcia_get_status(struct pcmcia_socket *sock, unsigned int *status)
-{
- struct sa1100_pcmcia_socket *skt = to_sa1100_socket(sock);
-
- skt->status = sa1100_pcmcia_skt_state(skt);
- *status = skt->status;
-
- return 0;
-}
-
-
-/* sa1100_pcmcia_get_socket()
- * ^^^^^^^^^^^^^^^^^^^^^^^^^^
- * Implements the get_socket() operation for the in-kernel PCMCIA
- * service (formerly SS_GetSocket in Card Services). Not a very
- * exciting routine.
- *
- * Returns: 0
- */
-static int
-sa1100_pcmcia_get_socket(struct pcmcia_socket *sock, socket_state_t *state)
-{
- struct sa1100_pcmcia_socket *skt = to_sa1100_socket(sock);
-
- debug(skt, 2, "\n");
-
- *state = skt->cs_state;
-
- return 0;
-}
-
-/* sa1100_pcmcia_set_socket()
- * ^^^^^^^^^^^^^^^^^^^^^^^^^^
- * Implements the set_socket() operation for the in-kernel PCMCIA
- * service (formerly SS_SetSocket in Card Services). We more or
- * less punt all of this work and let the kernel handle the details
- * of power configuration, reset, &c. We also record the value of
- * `state' in order to regurgitate it to the PCMCIA core later.
- *
- * Returns: 0
- */
-static int
-sa1100_pcmcia_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
-{
- struct sa1100_pcmcia_socket *skt = to_sa1100_socket(sock);
-
- debug(skt, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
- (state->csc_mask==0)?"<NONE> ":"",
- (state->csc_mask&SS_DETECT)?"DETECT ":"",
- (state->csc_mask&SS_READY)?"READY ":"",
- (state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
- (state->csc_mask&SS_BATWARN)?"BATWARN ":"",
- (state->csc_mask&SS_STSCHG)?"STSCHG ":"",
- (state->flags==0)?"<NONE> ":"",
- (state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
- (state->flags&SS_IOCARD)?"IOCARD ":"",
- (state->flags&SS_RESET)?"RESET ":"",
- (state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
- (state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
- state->Vcc, state->Vpp, state->io_irq);
-
- return sa1100_pcmcia_config_skt(skt, state);
-} /* sa1100_pcmcia_set_socket() */
-
-
-/* sa1100_pcmcia_set_io_map()
- * ^^^^^^^^^^^^^^^^^^^^^^^^^^
- * Implements the set_io_map() operation for the in-kernel PCMCIA
- * service (formerly SS_SetIOMap in Card Services). We configure
- * the map speed as requested, but override the address ranges
- * supplied by Card Services.
- *
- * Returns: 0 on success, -1 on error
- */
-static int
-sa1100_pcmcia_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *map)
-{
- struct sa1100_pcmcia_socket *skt = to_sa1100_socket(sock);
- unsigned short speed = map->speed;
-
- debug(skt, 2, "map %u speed %u start 0x%08x stop 0x%08x\n",
- map->map, map->speed, map->start, map->stop);
- debug(skt, 2, "flags: %s%s%s%s%s%s%s%s\n",
- (map->flags==0)?"<NONE>":"",
- (map->flags&MAP_ACTIVE)?"ACTIVE ":"",
- (map->flags&MAP_16BIT)?"16BIT ":"",
- (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
- (map->flags&MAP_0WS)?"0WS ":"",
- (map->flags&MAP_WRPROT)?"WRPROT ":"",
- (map->flags&MAP_USE_WAIT)?"USE_WAIT ":"",
- (map->flags&MAP_PREFETCH)?"PREFETCH ":"");
-
- if (map->map >= MAX_IO_WIN) {
- printk(KERN_ERR "%s(): map (%d) out of range\n", __FUNCTION__,
- map->map);
- return -1;
- }
-
- if (map->flags & MAP_ACTIVE) {
- if (speed == 0)
- speed = SA1100_PCMCIA_IO_ACCESS;
- } else {
- speed = 0;
- }
-
- skt->spd_io[map->map] = speed;
- sa1100_pcmcia_set_mecr(skt, cpufreq_get(0));
-
- if (map->stop == 1)
- map->stop = PAGE_SIZE-1;
-
- map->stop -= map->start;
- map->stop += (unsigned long)skt->virt_io;
- map->start = (unsigned long)skt->virt_io;
-
- return 0;
-} /* sa1100_pcmcia_set_io_map() */
-
-
-/* sa1100_pcmcia_set_mem_map()
- * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
- * Implements the set_mem_map() operation for the in-kernel PCMCIA
- * service (formerly SS_SetMemMap in Card Services). We configure
- * the map speed as requested, but override the address ranges
- * supplied by Card Services.
- *
- * Returns: 0 on success, -1 on error
- */
-static int
-sa1100_pcmcia_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
-{
- struct sa1100_pcmcia_socket *skt = to_sa1100_socket(sock);
- struct resource *res;
- unsigned short speed = map->speed;
-
- debug(skt, 2, "map %u speed %u card_start %08x\n",
- map->map, map->speed, map->card_start);
- debug(skt, 2, "flags: %s%s%s%s%s%s%s%s\n",
- (map->flags==0)?"<NONE>":"",
- (map->flags&MAP_ACTIVE)?"ACTIVE ":"",
- (map->flags&MAP_16BIT)?"16BIT ":"",
- (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
- (map->flags&MAP_0WS)?"0WS ":"",
- (map->flags&MAP_WRPROT)?"WRPROT ":"",
- (map->flags&MAP_ATTRIB)?"ATTRIB ":"",
- (map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
-
- if (map->map >= MAX_WIN)
- return -EINVAL;
-
- if (map->flags & MAP_ACTIVE) {
- if (speed == 0)
- speed = 300;
- } else {
- speed = 0;
- }
-
- if (map->flags & MAP_ATTRIB) {
- res = &skt->res_attr;
- skt->spd_attr[map->map] = speed;
- skt->spd_mem[map->map] = 0;
- } else {
- res = &skt->res_mem;
- skt->spd_attr[map->map] = 0;
- skt->spd_mem[map->map] = speed;
- }
-
- sa1100_pcmcia_set_mecr(skt, cpufreq_get(0));
-
- map->sys_stop -= map->sys_start;
- map->sys_stop += res->start + map->card_start;
- map->sys_start = res->start + map->card_start;
-
- return 0;
-}
-
-struct bittbl {
- unsigned int mask;
- const char *name;
-};
-
-static struct bittbl status_bits[] = {
- { SS_WRPROT, "SS_WRPROT" },
- { SS_BATDEAD, "SS_BATDEAD" },
- { SS_BATWARN, "SS_BATWARN" },
- { SS_READY, "SS_READY" },
- { SS_DETECT, "SS_DETECT" },
- { SS_POWERON, "SS_POWERON" },
- { SS_STSCHG, "SS_STSCHG" },
- { SS_3VCARD, "SS_3VCARD" },
- { SS_XVCARD, "SS_XVCARD" },
-};
-
-static struct bittbl conf_bits[] = {
- { SS_PWR_AUTO, "SS_PWR_AUTO" },
- { SS_IOCARD, "SS_IOCARD" },
- { SS_RESET, "SS_RESET" },
- { SS_DMA_MODE, "SS_DMA_MODE" },
- { SS_SPKR_ENA, "SS_SPKR_ENA" },
- { SS_OUTPUT_ENA, "SS_OUTPUT_ENA" },
-};
-
-static void
-dump_bits(char **p, const char *prefix, unsigned int val, struct bittbl *bits, int sz)
-{
- char *b = *p;
- int i;
-
- b += sprintf(b, "%-9s:", prefix);
- for (i = 0; i < sz; i++)
- if (val & bits[i].mask)
- b += sprintf(b, " %s", bits[i].name);
- *b++ = '\n';
- *p = b;
-}
-
-/* show_status()
- * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
- * Implements the /sys/class/pcmcia_socket/??/status file.
- *
- * Returns: the number of characters added to the buffer
- */
-static ssize_t show_status(struct class_device *class_dev, char *buf)
-{
- struct sa1100_pcmcia_socket *skt = container_of(class_dev,
- struct sa1100_pcmcia_socket, socket.dev);
- unsigned int clock = cpufreq_get(0);
- unsigned long mecr = MECR;
- char *p = buf;
-
- p+=sprintf(p, "slot : %d\n", skt->nr);
-
- dump_bits(&p, "status", skt->status,
- status_bits, ARRAY_SIZE(status_bits));
- dump_bits(&p, "csc_mask", skt->cs_state.csc_mask,
- status_bits, ARRAY_SIZE(status_bits));
- dump_bits(&p, "cs_flags", skt->cs_state.flags,
- conf_bits, ARRAY_SIZE(conf_bits));
-
- p+=sprintf(p, "Vcc : %d\n", skt->cs_state.Vcc);
- p+=sprintf(p, "Vpp : %d\n", skt->cs_state.Vpp);
- p+=sprintf(p, "IRQ : %d (%d)\n", skt->cs_state.io_irq, skt->irq);
-
- p+=sprintf(p, "I/O : %u (%u)\n",
- calc_speed(skt->spd_io, MAX_IO_WIN, SA1100_PCMCIA_IO_ACCESS),
- sa1100_pcmcia_cmd_time(clock, MECR_BSIO_GET(mecr, skt->nr)));
-
- p+=sprintf(p, "attribute: %u (%u)\n",
- calc_speed(skt->spd_attr, MAX_WIN, SA1100_PCMCIA_3V_MEM_ACCESS),
- sa1100_pcmcia_cmd_time(clock, MECR_BSA_GET(mecr, skt->nr)));
-
- p+=sprintf(p, "common : %u (%u)\n",
- calc_speed(skt->spd_mem, MAX_WIN, SA1100_PCMCIA_3V_MEM_ACCESS),
- sa1100_pcmcia_cmd_time(clock, MECR_BSM_GET(mecr, skt->nr)));
-
- return p-buf;
-}
-static CLASS_DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
-
-
-static struct pccard_operations sa11xx_pcmcia_operations = {
- .init = sa1100_pcmcia_sock_init,
- .suspend = sa1100_pcmcia_suspend,
- .get_status = sa1100_pcmcia_get_status,
- .get_socket = sa1100_pcmcia_get_socket,
- .set_socket = sa1100_pcmcia_set_socket,
- .set_io_map = sa1100_pcmcia_set_io_map,
- .set_mem_map = sa1100_pcmcia_set_mem_map,
-};
-
-int sa11xx_request_irqs(struct sa1100_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr)
-{
- int i, res = 0;
-
- for (i = 0; i < nr; i++) {
- if (irqs[i].sock != skt->nr)
- continue;
- res = request_irq(irqs[i].irq, sa1100_pcmcia_interrupt,
- SA_INTERRUPT, irqs[i].str, skt);
- if (res)
- break;
- set_irq_type(irqs[i].irq, IRQT_NOEDGE);
- }
-
- if (res) {
- printk(KERN_ERR "PCMCIA: request for IRQ%d failed (%d)\n",
- irqs[i].irq, res);
-
- while (i--)
- if (irqs[i].sock == skt->nr)
- free_irq(irqs[i].irq, skt);
- }
- return res;
-}
-EXPORT_SYMBOL(sa11xx_request_irqs);
-
-void sa11xx_free_irqs(struct sa1100_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr)
-{
- int i;
-
- for (i = 0; i < nr; i++)
- if (irqs[i].sock == skt->nr)
- free_irq(irqs[i].irq, skt);
-}
-EXPORT_SYMBOL(sa11xx_free_irqs);
-
-void sa11xx_disable_irqs(struct sa1100_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr)
-{
- int i;
-
- for (i = 0; i < nr; i++)
- if (irqs[i].sock == skt->nr)
- set_irq_type(irqs[i].irq, IRQT_NOEDGE);
-}
-EXPORT_SYMBOL(sa11xx_disable_irqs);
-
-void sa11xx_enable_irqs(struct sa1100_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr)
-{
- int i;
-
- for (i = 0; i < nr; i++)
- if (irqs[i].sock == skt->nr) {
- set_irq_type(irqs[i].irq, IRQT_RISING);
- set_irq_type(irqs[i].irq, IRQT_BOTHEDGE);
- }
-}
-EXPORT_SYMBOL(sa11xx_enable_irqs);
-
-static LIST_HEAD(sa1100_sockets);
-static DECLARE_MUTEX(sa1100_sockets_lock);
-
-static const char *skt_names[] = {
- "PCMCIA socket 0",
- "PCMCIA socket 1",
-};
-
-struct skt_dev_info {
- int nskt;
- struct sa1100_pcmcia_socket skt[0];
-};
-
-#define SKT_DEV_INFO_SIZE(n) \
- (sizeof(struct skt_dev_info) + (n)*sizeof(struct sa1100_pcmcia_socket))
-
-int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, int first, int nr)
-{
- struct skt_dev_info *sinfo;
- unsigned int cpu_clock;
- int ret, i;
-
- /*
- * set default MECR calculation if the board specific
- * code did not specify one...
- */
- if (!ops->socket_get_timing)
- ops->socket_get_timing = sa1100_pcmcia_default_mecr_timing;
-
- down(&sa1100_sockets_lock);
-
- sinfo = kmalloc(SKT_DEV_INFO_SIZE(nr), GFP_KERNEL);
- if (!sinfo) {
- ret = -ENOMEM;
- goto out;
- }
-
- memset(sinfo, 0, SKT_DEV_INFO_SIZE(nr));
- sinfo->nskt = nr;
-
- cpu_clock = cpufreq_get(0);
-
- /*
- * Initialise the per-socket structure.
- */
- for (i = 0; i < nr; i++) {
- struct sa1100_pcmcia_socket *skt = &sinfo->skt[i];
-
- skt->socket.ops = &sa11xx_pcmcia_operations;
- skt->socket.owner = ops->owner;
- skt->socket.dev.dev = dev;
-
- init_timer(&skt->poll_timer);
- skt->poll_timer.function = sa1100_pcmcia_poll_event;
- skt->poll_timer.data = (unsigned long)skt;
- skt->poll_timer.expires = jiffies + SA1100_PCMCIA_POLL_PERIOD;
-
- skt->nr = first + i;
- skt->irq = NO_IRQ;
- skt->dev = dev;
- skt->ops = ops;
-
- skt->res_skt.start = _PCMCIA(skt->nr);
- skt->res_skt.end = _PCMCIA(skt->nr) + PCMCIASp - 1;
- skt->res_skt.name = skt_names[skt->nr];
- skt->res_skt.flags = IORESOURCE_MEM;
-
- ret = request_resource(&iomem_resource, &skt->res_skt);
- if (ret)
- goto out_err_1;
-
- skt->res_io.start = _PCMCIAIO(skt->nr);
- skt->res_io.end = _PCMCIAIO(skt->nr) + PCMCIAIOSp - 1;
- skt->res_io.name = "io";
- skt->res_io.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
-
- ret = request_resource(&skt->res_skt, &skt->res_io);
- if (ret)
- goto out_err_2;
-
- skt->res_mem.start = _PCMCIAMem(skt->nr);
- skt->res_mem.end = _PCMCIAMem(skt->nr) + PCMCIAMemSp - 1;
- skt->res_mem.name = "memory";
- skt->res_mem.flags = IORESOURCE_MEM;
-
- ret = request_resource(&skt->res_skt, &skt->res_mem);
- if (ret)
- goto out_err_3;
-
- skt->res_attr.start = _PCMCIAAttr(skt->nr);
- skt->res_attr.end = _PCMCIAAttr(skt->nr) + PCMCIAAttrSp - 1;
- skt->res_attr.name = "attribute";
- skt->res_attr.flags = IORESOURCE_MEM;
-
- ret = request_resource(&skt->res_skt, &skt->res_attr);
- if (ret)
- goto out_err_4;
-
- skt->virt_io = ioremap(skt->res_io.start, 0x10000);
- if (skt->virt_io == NULL) {
- ret = -ENOMEM;
- goto out_err_5;
- }
-
- list_add(&skt->node, &sa1100_sockets);
-
- /*
- * We initialize the MECR to default values here, because
- * we are not guaranteed to see a SetIOMap operation at
- * runtime.
- */
- sa1100_pcmcia_set_mecr(skt, cpu_clock);
-
- ret = ops->hw_init(skt);
- if (ret)
- goto out_err_6;
-
- skt->socket.features = SS_CAP_STATIC_MAP|SS_CAP_PCCARD;
- skt->socket.irq_mask = 0;
- skt->socket.map_size = PAGE_SIZE;
- skt->socket.pci_irq = skt->irq;
- skt->socket.io_offset = (unsigned long)skt->virt_io;
-
- skt->status = sa1100_pcmcia_skt_state(skt);
-
- ret = pcmcia_register_socket(&skt->socket);
- if (ret)
- goto out_err_7;
-
- WARN_ON(skt->socket.sock != i);
-
- add_timer(&skt->poll_timer);
-
- class_device_create_file(&skt->socket.dev, &class_device_attr_status);
- }
-
- dev_set_drvdata(dev, sinfo);
- ret = 0;
- goto out;
-
- do {
- struct sa1100_pcmcia_socket *skt = &sinfo->skt[i];
-
- del_timer_sync(&skt->poll_timer);
- pcmcia_unregister_socket(&skt->socket);
-
- out_err_7:
- flush_scheduled_work();
-
- ops->hw_shutdown(skt);
- out_err_6:
- list_del(&skt->node);
- iounmap(skt->virt_io);
- out_err_5:
- release_resource(&skt->res_attr);
- out_err_4:
- release_resource(&skt->res_mem);
- out_err_3:
- release_resource(&skt->res_io);
- out_err_2:
- release_resource(&skt->res_skt);
- out_err_1:
- i--;
- } while (i > 0);
-
- kfree(sinfo);
-
- out:
- up(&sa1100_sockets_lock);
- return ret;
-}
-EXPORT_SYMBOL(sa11xx_drv_pcmcia_probe);
-
-int sa11xx_drv_pcmcia_remove(struct device *dev)
-{
- struct skt_dev_info *sinfo = dev_get_drvdata(dev);
- int i;
-
- dev_set_drvdata(dev, NULL);
-
- down(&sa1100_sockets_lock);
- for (i = 0; i < sinfo->nskt; i++) {
- struct sa1100_pcmcia_socket *skt = &sinfo->skt[i];
-
- del_timer_sync(&skt->poll_timer);
-
- pcmcia_unregister_socket(&skt->socket);
-
- flush_scheduled_work();
-
- skt->ops->hw_shutdown(skt);
-
- sa1100_pcmcia_config_skt(skt, &dead_socket);
-
- list_del(&skt->node);
- iounmap(skt->virt_io);
- skt->virt_io = NULL;
- release_resource(&skt->res_attr);
- release_resource(&skt->res_mem);
- release_resource(&skt->res_io);
- release_resource(&skt->res_skt);
- }
- up(&sa1100_sockets_lock);
-
- kfree(sinfo);
-
- return 0;
-}
-EXPORT_SYMBOL(sa11xx_drv_pcmcia_remove);
-
-#ifdef CONFIG_CPU_FREQ
-
-/* sa1100_pcmcia_update_mecr()
- * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
- * When sa1100_pcmcia_notifier() decides that a MECR adjustment (due
- * to a core clock frequency change) is needed, this routine establishes
- * new BS_xx values consistent with the clock speed `clock'.
- */
-static void sa1100_pcmcia_update_mecr(unsigned int clock)
-{
- struct sa1100_pcmcia_socket *skt;
-
- down(&sa1100_sockets_lock);
- list_for_each_entry(skt, &sa1100_sockets, node)
- sa1100_pcmcia_set_mecr(skt, clock);
- up(&sa1100_sockets_lock);
-}
-
-/* sa1100_pcmcia_notifier()
- * ^^^^^^^^^^^^^^^^^^^^^^^^
- * When changing the processor core clock frequency, it is necessary
- * to adjust the MECR timings accordingly. We've recorded the timings
- * requested by Card Services, so this is just a matter of finding
- * out what our current speed is, and then recomputing the new MECR
- * values.
- *
- * Returns: 0 on success, -1 on error
- */
-static int
-sa1100_pcmcia_notifier(struct notifier_block *nb, unsigned long val,
- void *data)
-{
- struct cpufreq_freqs *freqs = data;
-
- switch (val) {
- case CPUFREQ_PRECHANGE:
- if (freqs->new > freqs->old)
- sa1100_pcmcia_update_mecr(freqs->new);
- break;
-
- case CPUFREQ_POSTCHANGE:
- if (freqs->new < freqs->old)
- sa1100_pcmcia_update_mecr(freqs->new);
- break;
- }
-
- return 0;
-}
-
-static struct notifier_block sa1100_pcmcia_notifier_block = {
- .notifier_call = sa1100_pcmcia_notifier
-};
-
-static int __init sa11xx_pcmcia_init(void)
-{
- int ret;
-
- printk(KERN_INFO "SA11xx PCMCIA\n");
-
- ret = cpufreq_register_notifier(&sa1100_pcmcia_notifier_block,
- CPUFREQ_TRANSITION_NOTIFIER);
- if (ret < 0)
- printk(KERN_ERR "Unable to register CPU frequency change "
- "notifier (%d)\n", ret);
-
- return ret;
-}
-module_init(sa11xx_pcmcia_init);
-
-static void __exit sa11xx_pcmcia_exit(void)
-{
- cpufreq_unregister_notifier(&sa1100_pcmcia_notifier_block, CPUFREQ_TRANSITION_NOTIFIER);
-}
-
-module_exit(sa11xx_pcmcia_exit);
-#endif
-
-MODULE_AUTHOR("John Dorsey <john+@cs.cmu.edu>");
-MODULE_DESCRIPTION("Linux PCMCIA Card Services: SA-11xx core socket driver");
-MODULE_LICENSE("Dual MPL/GPL");
+++ /dev/null
-/*
- * linux/include/asm/arch/pcmcia.h
- *
- * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
- *
- * This file contains definitions for the low-level SA-1100 kernel PCMCIA
- * interface. Please see linux/Documentation/arm/SA1100/PCMCIA for details.
- */
-#ifndef _ASM_ARCH_PCMCIA
-#define _ASM_ARCH_PCMCIA
-
-/* include the world */
-#include <pcmcia/version.h>
-#include <pcmcia/cs_types.h>
-#include <pcmcia/cs.h>
-#include <pcmcia/ss.h>
-#include <pcmcia/bulkmem.h>
-#include <pcmcia/cistpl.h>
-#include "cs_internal.h"
-
-struct device;
-
-/* Ideally, we'd support up to MAX_SOCK sockets, but the SA-1100 only
- * has support for two. This shows up in lots of hardwired ways, such
- * as the fact that MECR only has enough bits to configure two sockets.
- * Since it's so entrenched in the hardware, limiting the software
- * in this way doesn't seem too terrible.
- */
-#define SA1100_PCMCIA_MAX_SOCK (2)
-
-struct pcmcia_state {
- unsigned detect: 1,
- ready: 1,
- bvd1: 1,
- bvd2: 1,
- wrprot: 1,
- vs_3v: 1,
- vs_Xv: 1;
-};
-
-/*
- * This structure encapsulates per-socket state which we might need to
- * use when responding to a Card Services query of some kind.
- */
-struct sa1100_pcmcia_socket {
- struct pcmcia_socket socket;
-
- /*
- * Info from low level handler
- */
- struct device *dev;
- unsigned int nr;
- unsigned int irq;
-
- /*
- * Core PCMCIA state
- */
- struct pcmcia_low_level *ops;
-
- unsigned int status;
- socket_state_t cs_state;
-
- unsigned short spd_io[MAX_IO_WIN];
- unsigned short spd_mem[MAX_WIN];
- unsigned short spd_attr[MAX_WIN];
-
- struct resource res_skt;
- struct resource res_io;
- struct resource res_mem;
- struct resource res_attr;
- void *virt_io;
-
- unsigned int irq_state;
-
- struct timer_list poll_timer;
- struct list_head node;
-};
-
-struct pcmcia_low_level {
- struct module *owner;
-
- int (*hw_init)(struct sa1100_pcmcia_socket *);
- void (*hw_shutdown)(struct sa1100_pcmcia_socket *);
-
- void (*socket_state)(struct sa1100_pcmcia_socket *, struct pcmcia_state *);
- int (*configure_socket)(struct sa1100_pcmcia_socket *, const socket_state_t *);
-
- /*
- * Enable card status IRQs on (re-)initialisation. This can
- * be called at initialisation, power management event, or
- * pcmcia event.
- */
- void (*socket_init)(struct sa1100_pcmcia_socket *);
-
- /*
- * Disable card status IRQs and PCMCIA bus on suspend.
- */
- void (*socket_suspend)(struct sa1100_pcmcia_socket *);
-
- /*
- * Calculate MECR timing clock wait states
- */
- unsigned int (*socket_get_timing)(struct sa1100_pcmcia_socket *,
- unsigned int cpu_speed, unsigned int cmd_time);
-};
-
-struct pcmcia_irqs {
- int sock;
- int irq;
- const char *str;
-};
-
-int sa11xx_request_irqs(struct sa1100_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
-void sa11xx_free_irqs(struct sa1100_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
-void sa11xx_disable_irqs(struct sa1100_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
-void sa11xx_enable_irqs(struct sa1100_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
-
-extern int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, int first, int nr);
-extern int sa11xx_drv_pcmcia_remove(struct device *dev);
-
-#endif
+++ /dev/null
-/*
- * drivers/s390/cio/requestirq.c
- * S/390 common I/O routines -- enabling and disabling of devices
- * $Revision: 1.46 $
- *
- * Copyright (C) 1999-2002 IBM Deutschland Entwicklung GmbH,
- * IBM Corporation
- * Author(s): Ingo Adlung (adlung@de.ibm.com)
- * Cornelia Huck (cohuck@de.ibm.com)
- * Arnd Bergmann (arndb@de.ibm.com)
- */
-
-#include <linux/module.h>
-#include <linux/config.h>
-#include <linux/device.h>
-#include <linux/init.h>
-#include <asm/lowcore.h>
-
-#include "css.h"
-
-struct pgid global_pgid;
-EXPORT_SYMBOL_GPL(global_pgid);
-
-/*
- * init_IRQ is now only used to set the pgid as early as possible
- */
-void __init
-init_IRQ(void)
-{
- /*
- * Let's build our path group ID here.
- */
- if (MACHINE_NEW_STIDP)
- global_pgid.cpu_addr = 0x8000;
- else {
-#ifdef CONFIG_SMP
- global_pgid.cpu_addr = hard_smp_processor_id();
-#else
- global_pgid.cpu_addr = 0;
-#endif
- }
- global_pgid.cpu_id = ((cpuid_t *) __LC_CPUID)->ident;
- global_pgid.cpu_model = ((cpuid_t *) __LC_CPUID)->machine;
- global_pgid.tod_high = (__u32) (get_clock() >> 32);
-}
+++ /dev/null
-/***********************************************************************
- * FILE NAME : DC390.H *
- * BY : C.L. Huang *
- * Description: Device Driver for Tekram DC-390(T) PCI SCSI *
- * Bus Master Host Adapter *
- ***********************************************************************/
-/* $Id: dc390.h,v 2.43.2.22 2000/12/20 00:39:36 garloff Exp $ */
-
-/*
- * DC390/AMD 53C974 driver, header file
- */
-
-#ifndef DC390_H
-#define DC390_H
-
-#include <linux/version.h>
-
-#define DC390_BANNER "Tekram DC390/AM53C974"
-#define DC390_VERSION "2.1d 2004-05-27"
-
-/* We don't have eh_abort_handler, eh_device_reset_handler,
- * eh_bus_reset_handler, eh_host_reset_handler yet!
- * So long: Use old exception handling :-( */
-#define OLD_EH
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION (2,1,70) || defined (OLD_EH)
-# define NEW_EH
-#else
-# define NEW_EH use_new_eh_code: 1,
-# define USE_NEW_EH
-#endif
-#endif /* DC390_H */
+++ /dev/null
-/*
- dmx3191d.h - defines for the Domex DMX3191D SCSI card.
- Copyright (C) 2000 by Massimo Piccioni <dafastidio@libero.it>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-*/
-
-#ifndef __DMX3191D_H
-#define __DMX3191D_H
-
-#define DMX3191D_DRIVER_NAME "dmx3191d"
-#define DMX3191D_REGION 8
-
-#ifndef PCI_VENDOR_ID_DOMEX
-#define PCI_VENDOR_ID_DOMEX 0x134a
-#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001
-#endif
-
-static int dmx3191d_abort(Scsi_Cmnd *);
-static int dmx3191d_detect(Scsi_Host_Template *);
-static const char* dmx3191d_info(struct Scsi_Host *);
-static int dmx3191d_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
-static int dmx3191d_release_resources(struct Scsi_Host *);
-static int dmx3191d_bus_reset(Scsi_Cmnd *);
-static int dmx3191d_host_reset(Scsi_Cmnd *);
-static int dmx3191d_device_reset(Scsi_Cmnd *);
-
-#define NCR5380_read(reg) inb(port + reg)
-#define NCR5380_write(reg, value) outb(value, port + reg)
-
-#define NCR5380_implementation_fields unsigned int port
-#define NCR5380_local_declare() NCR5380_implementation_fields
-#define NCR5380_setup(instance) port = instance->io_port
-
-#define NCR5380_abort dmx3191d_abort
-#define do_NCR5380_intr dmx3191d_do_intr
-#define NCR5380_intr dmx3191d_intr
-#define NCR5380_proc_info dmx3191d_proc_info
-#define NCR5380_queue_command dmx3191d_queue_command
-#define NCR5380_host_reset dmx3191d_host_reset
-#define NCR5380_bus_reset dmx3191d_bus_reset
-#define NCR5380_device_reset dmx3191d_device_reset
-
-#endif /* __DMX3191D_H */
-
+++ /dev/null
-/* BSDI osd_util.h,v 1.8 1998/06/03 19:14:58 karels Exp */
-
-/*
- * Copyright (c) 1996-1999 Distributed Processing Technology Corporation
- * All rights reserved.
- *
- * Redistribution and use in source form, with or without modification, are
- * permitted provided that redistributions of source code must retain the
- * above copyright notice, this list of conditions and the following disclaimer.
- *
- * This software is provided `as is' by Distributed Processing Technology and
- * any express or implied warranties, including, but not limited to, the
- * implied warranties of merchantability and fitness for a particular purpose,
- * are disclaimed. In no event shall Distributed Processing Technology be
- * liable for any direct, indirect, incidental, special, exemplary or
- * consequential damages (including, but not limited to, procurement of
- * substitute goods or services; loss of use, data, or profits; or business
- * interruptions) however caused and on any theory of liability, whether in
- * contract, strict liability, or tort (including negligence or otherwise)
- * arising in any way out of the use of this driver software, even if advised
- * of the possibility of such damage.
- *
- */
-
-#ifndef __OSD_UTIL_H
-#define __OSD_UTIL_H
-
-/*File - OSD_UTIL.H
- ****************************************************************************
- *
- *Description:
- *
- * This file contains defines and function prototypes that are
- *operating system dependent. The resources defined in this file
- *are not specific to any particular application.
- *
- *Copyright Distributed Processing Technology, Corp.
- * 140 Candace Dr.
- * Maitland, Fl. 32751 USA
- * Phone: (407) 830-5522 Fax: (407) 260-5366
- * All Rights Reserved
- *
- *Author: Doug Anderson
- *Date: 1/7/94
- *
- *Editors:
- *
- *Remarks:
- *
- *
- *****************************************************************************/
-
-
-/*Definitions - Defines & Constants ----------------------------------------- */
-
-/*----------------------------- */
-/* Operating system selections: */
-/*----------------------------- */
-
-/*#define _DPT_MSDOS */
-/*#define _DPT_WIN_3X */
-/*#define _DPT_WIN_4X */
-/*#define _DPT_WIN_NT */
-/*#define _DPT_NETWARE */
-/*#define _DPT_OS2 */
-/*#define _DPT_SCO */
-/*#define _DPT_UNIXWARE */
-/*#define _DPT_SOLARIS */
-/*#define _DPT_NEXTSTEP */
-/*#define _DPT_BANYAN */
-
-/*-------------------------------- */
-/* Include the OS specific defines */
-/*-------------------------------- */
-
-/*#define OS_SELECTION From Above List */
-/*#define SEMAPHORE_T ??? */
-/*#define DLL_HANDLE_T ??? */
-
-#if (defined(KERNEL) && (defined(__FreeBSD__) || defined(__bsdi__)))
-# include "i386/isa/dpt_osd_defs.h"
-#else
-# include "osd_defs.h"
-#endif
-
-#ifndef DPT_UNALIGNED
- #define DPT_UNALIGNED
-#endif
-
-#ifndef DPT_EXPORT
- #define DPT_EXPORT
-#endif
-
-#ifndef DPT_IMPORT
- #define DPT_IMPORT
-#endif
-
-#ifndef DPT_RUNTIME_IMPORT
- #define DPT_RUNTIME_IMPORT DPT_IMPORT
-#endif
-
-/*--------------------- */
-/* OS dependent defines */
-/*--------------------- */
-
-#if defined (_DPT_MSDOS) || defined (_DPT_WIN_3X)
- #define _DPT_16_BIT
-#else
- #define _DPT_32_BIT
-#endif
-
-#if defined (_DPT_SCO) || defined (_DPT_UNIXWARE) || defined (_DPT_SOLARIS) || defined (_DPT_AIX) || defined (SNI_MIPS) || defined (_DPT_BSDI) || defined (_DPT_FREE_BSD) || defined(_DPT_LINUX)
- #define _DPT_UNIX
-#endif
-
-#if defined (_DPT_WIN_3x) || defined (_DPT_WIN_4X) || defined (_DPT_WIN_NT) \
- || defined (_DPT_OS2)
- #define _DPT_DLL_SUPPORT
-#endif
-
-#if !defined (_DPT_MSDOS) && !defined (_DPT_WIN_3X) && !defined (_DPT_NETWARE)
- #define _DPT_PREEMPTIVE
-#endif
-
-#if !defined (_DPT_MSDOS) && !defined (_DPT_WIN_3X)
- #define _DPT_MULTI_THREADED
-#endif
-
-#if !defined (_DPT_MSDOS)
- #define _DPT_MULTI_TASKING
-#endif
-
- /* These exist for platforms that */
- /* chunk when accessing mis-aligned */
- /* data */
-#if defined (SNI_MIPS) || defined (_DPT_SOLARIS)
- #if defined (_DPT_BIG_ENDIAN)
- #if !defined (_DPT_STRICT_ALIGN)
- #define _DPT_STRICT_ALIGN
- #endif
- #endif
-#endif
-
- /* Determine if in C or C++ mode */
-#ifdef __cplusplus
- #define _DPT_CPP
-#else
- #define _DPT_C
-#endif
-
-/*-------------------------------------------------------------------*/
-/* Under Solaris the compiler refuses to accept code like: */
-/* { {"DPT"}, 0, NULL .... }, */
-/* and complains about the {"DPT"} part by saying "cannot use { } */
-/* to initialize char*". */
-/* */
-/* By defining these ugly macros we can get around this and also */
-/* not have to copy and #ifdef large sections of code. I know that */
-/* these macros are *really* ugly, but they should help reduce */
-/* maintenance in the long run. */
-/* */
-/*-------------------------------------------------------------------*/
-#if !defined (DPTSQO)
- #if defined (_DPT_SOLARIS)
- #define DPTSQO
- #define DPTSQC
- #else
- #define DPTSQO {
- #define DPTSQC }
- #endif /* solaris */
-#endif /* DPTSQO */
-
-
-/*---------------------- */
-/* OS dependent typedefs */
-/*---------------------- */
-
-#if defined (_DPT_MSDOS) || defined (_DPT_SCO)
- #define BYTE unsigned char
- #define WORD unsigned short
-#endif
-
-#ifndef _DPT_TYPEDEFS
- #define _DPT_TYPEDEFS
- typedef unsigned char uCHAR;
- typedef unsigned short uSHORT;
- typedef unsigned int uINT;
- typedef unsigned long uLONG;
-
- typedef union {
- uCHAR u8[4];
- uSHORT u16[2];
- uLONG u32;
- } access_U;
-#endif
-
-#if !defined (NULL)
- #define NULL 0
-#endif
-
-
-/*Prototypes - function ----------------------------------------------------- */
-
-#ifdef __cplusplus
- extern "C" { /* Declare all these functions as "C" functions */
-#endif
-
-/*------------------------ */
-/* Byte reversal functions */
-/*------------------------ */
-
- /* Reverses the byte ordering of a 2 byte variable */
-#if (!defined(osdSwap2))
- uSHORT osdSwap2(DPT_UNALIGNED uSHORT *);
-#endif // !osdSwap2
-
- /* Reverses the byte ordering of a 4 byte variable and shifts left 8 bits */
-#if (!defined(osdSwap3))
- uLONG osdSwap3(DPT_UNALIGNED uLONG *);
-#endif // !osdSwap3
-
-
-#ifdef _DPT_NETWARE
- #include "novpass.h" /* For DPT_Bswapl() prototype */
- /* Inline the byte swap */
- #ifdef __cplusplus
- inline uLONG osdSwap4(uLONG *inLong) {
- return *inLong = DPT_Bswapl(*inLong);
- }
- #else
- #define osdSwap4(inLong) DPT_Bswapl(inLong)
- #endif // cplusplus
-#else
- /* Reverses the byte ordering of a 4 byte variable */
-# if (!defined(osdSwap4))
- uLONG osdSwap4(DPT_UNALIGNED uLONG *);
-# endif // !osdSwap4
-
- /* The following functions ALWAYS swap regardless of the *
- * presence of DPT_BIG_ENDIAN */
-
- uSHORT trueSwap2(DPT_UNALIGNED uSHORT *);
- uLONG trueSwap4(DPT_UNALIGNED uLONG *);
-
-#endif // netware
-
-
-/*-------------------------------------*
- * Network order swap functions *
- * *
- * These functions/macros will be used *
- * by the structure insert()/extract() *
- * functions. *
- *
- * We will enclose all structure *
- * portability modifications inside *
- * #ifdefs. When we are ready, we *
- * will #define DPT_PORTABLE to begin *
- * using the modifications. *
- *-------------------------------------*/
-uLONG netSwap4(uLONG val);
-
-#if defined (_DPT_BIG_ENDIAN)
-
-// for big-endian we need to swap
-
-#ifndef NET_SWAP_2
-#define NET_SWAP_2(x) (((x) >> 8) | ((x) << 8))
-#endif // NET_SWAP_2
-
-#ifndef NET_SWAP_4
-#define NET_SWAP_4(x) netSwap4((x))
-#endif // NET_SWAP_4
-
-#else
-
-// for little-endian we don't need to do anything
-
-#ifndef NET_SWAP_2
-#define NET_SWAP_2(x) (x)
-#endif // NET_SWAP_2
-
-#ifndef NET_SWAP_4
-#define NET_SWAP_4(x) (x)
-#endif // NET_SWAP_4
-
-#endif // big endian
-
-
-
-/*----------------------------------- */
-/* Run-time loadable module functions */
-/*----------------------------------- */
-
- /* Loads the specified run-time loadable DLL */
-DLL_HANDLE_T osdLoadModule(uCHAR *);
- /* Unloads the specified run-time loadable DLL */
-uSHORT osdUnloadModule(DLL_HANDLE_T);
- /* Returns a pointer to a function inside a run-time loadable DLL */
-void * osdGetFnAddr(DLL_HANDLE_T,uCHAR *);
-
-/*--------------------------------------- */
-/* Mutually exclusive semaphore functions */
-/*--------------------------------------- */
-
- /* Create a named semaphore */
-SEMAPHORE_T osdCreateNamedSemaphore(char *);
- /* Create a mutually exlusive semaphore */
-SEMAPHORE_T osdCreateSemaphore(void);
- /* create an event semaphore */
-SEMAPHORE_T osdCreateEventSemaphore(void);
- /* create a named event semaphore */
-SEMAPHORE_T osdCreateNamedEventSemaphore(char *);
-
- /* Destroy the specified mutually exclusive semaphore object */
-uSHORT osdDestroySemaphore(SEMAPHORE_T);
- /* Request access to the specified mutually exclusive semaphore */
-uLONG osdRequestSemaphore(SEMAPHORE_T,uLONG);
- /* Release access to the specified mutually exclusive semaphore */
-uSHORT osdReleaseSemaphore(SEMAPHORE_T);
- /* wait for a event to happen */
-uLONG osdWaitForEventSemaphore(SEMAPHORE_T, uLONG);
- /* signal an event */
-uLONG osdSignalEventSemaphore(SEMAPHORE_T);
- /* reset the event */
-uLONG osdResetEventSemaphore(SEMAPHORE_T);
-
-/*----------------- */
-/* Thread functions */
-/*----------------- */
-
- /* Releases control to the task switcher in non-preemptive */
- /* multitasking operating systems. */
-void osdSwitchThreads(void);
-
- /* Starts a thread function */
-uLONG osdStartThread(void *,void *);
-
-/* what is my thread id */
-uLONG osdGetThreadID(void);
-
-/* wakes up the specifed thread */
-void osdWakeThread(uLONG);
-
-/* osd sleep for x miliseconds */
-void osdSleep(uLONG);
-
-#define DPT_THREAD_PRIORITY_LOWEST 0x00
-#define DPT_THREAD_PRIORITY_NORMAL 0x01
-#define DPT_THREAD_PRIORITY_HIGHEST 0x02
-
-uCHAR osdSetThreadPriority(uLONG tid, uCHAR priority);
-
-#ifdef __cplusplus
- } /* end the xtern "C" declaration */
-#endif
-
-#endif /* osd_util_h */
+++ /dev/null
-/* fd_mcs.h -- Header for Future Domain MCS 600/700 (or IBM OEM) driver
- *
- * fd_mcs.h v0.2 03/11/1998 ZP Gu (zpg@castle.net)
- *
-
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2, or (at your option) any
- * later version.
-
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
-
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
-
- */
-
-#ifndef _FD_MCS_H
-#define _FD_MCS_H
-
-static int fd_mcs_detect(Scsi_Host_Template *);
-static int fd_mcs_release(struct Scsi_Host *);
-static int fd_mcs_command(Scsi_Cmnd *);
-static int fd_mcs_abort(Scsi_Cmnd *);
-static int fd_mcs_bus_reset(Scsi_Cmnd *);
-static int fd_mcs_device_reset(Scsi_Cmnd *);
-static int fd_mcs_host_reset(Scsi_Cmnd *);
-static int fd_mcs_queue(Scsi_Cmnd *, void (*done) (Scsi_Cmnd *));
-static int fd_mcs_biosparam(struct scsi_device *, struct block_device *,
- sector_t, int *);
-static const char *fd_mcs_info(struct Scsi_Host *);
-
-#endif /* _FD_MCS_H */
+++ /dev/null
-/**************************************************************************
- * Initio A100 device driver for Linux.
- *
- * Copyright (c) 1994-1998 Initio Corporation
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING. If not, write to
- * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * --------------------------------------------------------------------------
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * Where this Software is combined with software released under the terms of
- * the GNU General Public License ("GPL") and the terms of the GPL would require the
- * combined work to also be released under the terms of the GPL, the terms
- * and conditions of this License will apply in addition to those of the
- * GPL with the exception of any terms or conditions of this License that
- * conflict with, or are expressly prohibited by, the GPL.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *************************************************************************
- *
- * module: i60uscsi.c
- * DESCRIPTION:
- * This is the Linux low-level SCSI driver for Initio INIA100 SCSI host
- * adapters
- *
- * 07/02/98 hl - v.91n Initial drivers.
- * 09/14/98 hl - v1.01 Support new Kernel.
- * 09/22/98 hl - v1.01a Support reset.
- * 09/24/98 hl - v1.01b Fixed reset.
- * 10/05/98 hl - v1.02 split the source code and release.
- * 12/19/98 bv - v1.02a Use spinlocks for 2.1.95 and up
- * 01/31/99 bv - v1.02b Use mdelay instead of waitForPause
- * 08/08/99 bv - v1.02c Use waitForPause again.
- * 06/25/02 Doug Ledford <dledford@redhat.com> - v1.02d
- * - Remove limit on number of controllers
- * - Port to DMA mapping API
- * - Clean up interrupt handler registration
- * - Fix memory leaks
- * - Fix allocation of scsi host structs and private data
- **************************************************************************/
-
-#include <linux/module.h>
-#include <asm/irq.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <asm/io.h>
-#include <linux/blkdev.h>
-#include "scsi.h"
-#include <scsi/scsi_host.h>
-#include "inia100.h"
-
-#define JIFFIES_TO_MS(t) ((t) * 1000 / HZ)
-#define MS_TO_JIFFIES(j) ((j * HZ) / 1000)
-
-/* ---- INTERNAL FUNCTIONS ---- */
-static UCHAR waitChipReady(ORC_HCS * hcsp);
-static UCHAR waitFWReady(ORC_HCS * hcsp);
-static UCHAR waitFWReady(ORC_HCS * hcsp);
-static UCHAR waitSCSIRSTdone(ORC_HCS * hcsp);
-static UCHAR waitHDOoff(ORC_HCS * hcsp);
-static UCHAR waitHDIset(ORC_HCS * hcsp, UCHAR * pData);
-static unsigned short get_FW_version(ORC_HCS * hcsp);
-static UCHAR set_NVRAM(ORC_HCS * hcsp, unsigned char address, unsigned char value);
-static UCHAR get_NVRAM(ORC_HCS * hcsp, unsigned char address, unsigned char *pDataIn);
-static int se2_rd_all(ORC_HCS * hcsp);
-static void se2_update_all(ORC_HCS * hcsp); /* setup default pattern */
-static void read_eeprom(ORC_HCS * hcsp);
-static UCHAR load_FW(ORC_HCS * hcsp);
-static void setup_SCBs(ORC_HCS * hcsp);
-static void initAFlag(ORC_HCS * hcsp);
-ORC_SCB *orc_alloc_scb(ORC_HCS * hcsp);
-
-/* ---- EXTERNAL FUNCTIONS ---- */
-extern void inia100SCBPost(BYTE * pHcb, BYTE * pScb);
-
-NVRAM nvram, *nvramp = &nvram;
-static UCHAR dftNvRam[64] =
-{
-/*----------header -------------*/
- 0x01, /* 0x00: Sub System Vendor ID 0 */
- 0x11, /* 0x01: Sub System Vendor ID 1 */
- 0x60, /* 0x02: Sub System ID 0 */
- 0x10, /* 0x03: Sub System ID 1 */
- 0x00, /* 0x04: SubClass */
- 0x01, /* 0x05: Vendor ID 0 */
- 0x11, /* 0x06: Vendor ID 1 */
- 0x60, /* 0x07: Device ID 0 */
- 0x10, /* 0x08: Device ID 1 */
- 0x00, /* 0x09: Reserved */
- 0x00, /* 0x0A: Reserved */
- 0x01, /* 0x0B: Revision of Data Structure */
- /* -- Host Adapter Structure --- */
- 0x01, /* 0x0C: Number Of SCSI Channel */
- 0x01, /* 0x0D: BIOS Configuration 1 */
- 0x00, /* 0x0E: BIOS Configuration 2 */
- 0x00, /* 0x0F: BIOS Configuration 3 */
- /* --- SCSI Channel 0 Configuration --- */
- 0x07, /* 0x10: H/A ID */
- 0x83, /* 0x11: Channel Configuration */
- 0x20, /* 0x12: MAX TAG per target */
- 0x0A, /* 0x13: SCSI Reset Recovering time */
- 0x00, /* 0x14: Channel Configuration4 */
- 0x00, /* 0x15: Channel Configuration5 */
- /* SCSI Channel 0 Target Configuration */
- /* 0x16-0x25 */
- 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
- 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
- /* --- SCSI Channel 1 Configuration --- */
- 0x07, /* 0x26: H/A ID */
- 0x83, /* 0x27: Channel Configuration */
- 0x20, /* 0x28: MAX TAG per target */
- 0x0A, /* 0x29: SCSI Reset Recovering time */
- 0x00, /* 0x2A: Channel Configuration4 */
- 0x00, /* 0x2B: Channel Configuration5 */
- /* SCSI Channel 1 Target Configuration */
- /* 0x2C-0x3B */
- 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
- 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
- 0x00, /* 0x3C: Reserved */
- 0x00, /* 0x3D: Reserved */
- 0x00, /* 0x3E: Reserved */
- 0x00 /* 0x3F: Checksum */
-};
-
-
-/***************************************************************************/
-static void waitForPause(unsigned amount)
-{
- ULONG the_time = jiffies + MS_TO_JIFFIES(amount);
- while (time_before_eq(jiffies, the_time))
- cpu_relax();
-}
-
-/***************************************************************************/
-UCHAR waitChipReady(ORC_HCS * hcsp)
-{
- int i;
-
- for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
- if (ORC_RD(hcsp->HCS_Base, ORC_HCTRL) & HOSTSTOP) /* Wait HOSTSTOP set */
- return (TRUE);
- waitForPause(100); /* wait 100ms before try again */
- }
- return (FALSE);
-}
-
-/***************************************************************************/
-UCHAR waitFWReady(ORC_HCS * hcsp)
-{
- int i;
-
- for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
- if (ORC_RD(hcsp->HCS_Base, ORC_HSTUS) & RREADY) /* Wait READY set */
- return (TRUE);
- waitForPause(100); /* wait 100ms before try again */
- }
- return (FALSE);
-}
-
-/***************************************************************************/
-UCHAR waitSCSIRSTdone(ORC_HCS * hcsp)
-{
- int i;
-
- for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
- if (!(ORC_RD(hcsp->HCS_Base, ORC_HCTRL) & SCSIRST)) /* Wait SCSIRST done */
- return (TRUE);
- waitForPause(100); /* wait 100ms before try again */
- }
- return (FALSE);
-}
-
-/***************************************************************************/
-UCHAR waitHDOoff(ORC_HCS * hcsp)
-{
- int i;
-
- for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
- if (!(ORC_RD(hcsp->HCS_Base, ORC_HCTRL) & HDO)) /* Wait HDO off */
- return (TRUE);
- waitForPause(100); /* wait 100ms before try again */
- }
- return (FALSE);
-}
-
-/***************************************************************************/
-UCHAR waitHDIset(ORC_HCS * hcsp, UCHAR * pData)
-{
- int i;
-
- for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
- if ((*pData = ORC_RD(hcsp->HCS_Base, ORC_HSTUS)) & HDI)
- return (TRUE); /* Wait HDI set */
- waitForPause(100); /* wait 100ms before try again */
- }
- return (FALSE);
-}
-
-/***************************************************************************/
-unsigned short get_FW_version(ORC_HCS * hcsp)
-{
- UCHAR bData;
- union {
- unsigned short sVersion;
- unsigned char cVersion[2];
- } Version;
-
- ORC_WR(hcsp->HCS_Base + ORC_HDATA, ORC_CMD_VERSION);
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, HDO);
- if (waitHDOoff(hcsp) == FALSE) /* Wait HDO off */
- return (FALSE);
-
- if (waitHDIset(hcsp, &bData) == FALSE) /* Wait HDI set */
- return (FALSE);
- Version.cVersion[0] = ORC_RD(hcsp->HCS_Base, ORC_HDATA);
- ORC_WR(hcsp->HCS_Base + ORC_HSTUS, bData); /* Clear HDI */
-
- if (waitHDIset(hcsp, &bData) == FALSE) /* Wait HDI set */
- return (FALSE);
- Version.cVersion[1] = ORC_RD(hcsp->HCS_Base, ORC_HDATA);
- ORC_WR(hcsp->HCS_Base + ORC_HSTUS, bData); /* Clear HDI */
-
- return (Version.sVersion);
-}
-
-/***************************************************************************/
-UCHAR set_NVRAM(ORC_HCS * hcsp, unsigned char address, unsigned char value)
-{
- ORC_WR(hcsp->HCS_Base + ORC_HDATA, ORC_CMD_SET_NVM); /* Write command */
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, HDO);
- if (waitHDOoff(hcsp) == FALSE) /* Wait HDO off */
- return (FALSE);
-
- ORC_WR(hcsp->HCS_Base + ORC_HDATA, address); /* Write address */
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, HDO);
- if (waitHDOoff(hcsp) == FALSE) /* Wait HDO off */
- return (FALSE);
-
- ORC_WR(hcsp->HCS_Base + ORC_HDATA, value); /* Write value */
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, HDO);
- if (waitHDOoff(hcsp) == FALSE) /* Wait HDO off */
- return (FALSE);
-
- return (TRUE);
-}
-
-/***************************************************************************/
-UCHAR get_NVRAM(ORC_HCS * hcsp, unsigned char address, unsigned char *pDataIn)
-{
- unsigned char bData;
-
- ORC_WR(hcsp->HCS_Base + ORC_HDATA, ORC_CMD_GET_NVM); /* Write command */
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, HDO);
- if (waitHDOoff(hcsp) == FALSE) /* Wait HDO off */
- return (FALSE);
-
- ORC_WR(hcsp->HCS_Base + ORC_HDATA, address); /* Write address */
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, HDO);
- if (waitHDOoff(hcsp) == FALSE) /* Wait HDO off */
- return (FALSE);
-
- if (waitHDIset(hcsp, &bData) == FALSE) /* Wait HDI set */
- return (FALSE);
- *pDataIn = ORC_RD(hcsp->HCS_Base, ORC_HDATA);
- ORC_WR(hcsp->HCS_Base + ORC_HSTUS, bData); /* Clear HDI */
-
- return (TRUE);
-}
-
-/***************************************************************************/
-void orc_exec_scb(ORC_HCS * hcsp, ORC_SCB * scbp)
-{
- scbp->SCB_Status = ORCSCB_POST;
- ORC_WR(hcsp->HCS_Base + ORC_PQUEUE, scbp->SCB_ScbIdx);
- return;
-}
-
-
-/***********************************************************************
- Read SCSI H/A configuration parameters from serial EEPROM
-************************************************************************/
-int se2_rd_all(ORC_HCS * hcsp)
-{
- int i;
- UCHAR *np, chksum = 0;
-
- np = (UCHAR *) nvramp;
- for (i = 0; i < 64; i++, np++) { /* <01> */
- if (get_NVRAM(hcsp, (unsigned char) i, np) == FALSE)
- return -1;
-// *np++ = get_NVRAM(hcsp, (unsigned char ) i);
- }
-
-/*------ Is ckecksum ok ? ------*/
- np = (UCHAR *) nvramp;
- for (i = 0; i < 63; i++)
- chksum += *np++;
-
- if (nvramp->CheckSum != (UCHAR) chksum)
- return -1;
- return 1;
-}
-
-/************************************************************************
- Update SCSI H/A configuration parameters from serial EEPROM
-*************************************************************************/
-void se2_update_all(ORC_HCS * hcsp)
-{ /* setup default pattern */
- int i;
- UCHAR *np, *np1, chksum = 0;
-
- /* Calculate checksum first */
- np = (UCHAR *) dftNvRam;
- for (i = 0; i < 63; i++)
- chksum += *np++;
- *np = chksum;
-
- np = (UCHAR *) dftNvRam;
- np1 = (UCHAR *) nvramp;
- for (i = 0; i < 64; i++, np++, np1++) {
- if (*np != *np1) {
- set_NVRAM(hcsp, (unsigned char) i, *np);
- }
- }
- return;
-}
-
-/*************************************************************************
- Function name : read_eeprom
-**************************************************************************/
-void read_eeprom(ORC_HCS * hcsp)
-{
- if (se2_rd_all(hcsp) != 1) {
- se2_update_all(hcsp); /* setup default pattern */
- se2_rd_all(hcsp); /* load again */
- }
-}
-
-
-/***************************************************************************/
-UCHAR load_FW(ORC_HCS * hcsp)
-{
- U32 dData;
- USHORT wBIOSAddress;
- USHORT i;
- UCHAR *pData, bData;
-
-
- bData = ORC_RD(hcsp->HCS_Base, ORC_GCFG);
- ORC_WR(hcsp->HCS_Base + ORC_GCFG, bData | EEPRG); /* Enable EEPROM programming */
- ORC_WR(hcsp->HCS_Base + ORC_EBIOSADR2, 0x00);
- ORC_WRSHORT(hcsp->HCS_Base + ORC_EBIOSADR0, 0x00);
- if (ORC_RD(hcsp->HCS_Base, ORC_EBIOSDATA) != 0x55) {
- ORC_WR(hcsp->HCS_Base + ORC_GCFG, bData); /* Disable EEPROM programming */
- return (FALSE);
- }
- ORC_WRSHORT(hcsp->HCS_Base + ORC_EBIOSADR0, 0x01);
- if (ORC_RD(hcsp->HCS_Base, ORC_EBIOSDATA) != 0xAA) {
- ORC_WR(hcsp->HCS_Base + ORC_GCFG, bData); /* Disable EEPROM programming */
- return (FALSE);
- }
- ORC_WR(hcsp->HCS_Base + ORC_RISCCTL, PRGMRST | DOWNLOAD); /* Enable SRAM programming */
- pData = (UCHAR *) & dData;
- dData = 0; /* Initial FW address to 0 */
- ORC_WRSHORT(hcsp->HCS_Base + ORC_EBIOSADR0, 0x10);
- *pData = ORC_RD(hcsp->HCS_Base, ORC_EBIOSDATA); /* Read from BIOS */
- ORC_WRSHORT(hcsp->HCS_Base + ORC_EBIOSADR0, 0x11);
- *(pData + 1) = ORC_RD(hcsp->HCS_Base, ORC_EBIOSDATA); /* Read from BIOS */
- ORC_WRSHORT(hcsp->HCS_Base + ORC_EBIOSADR0, 0x12);
- *(pData + 2) = ORC_RD(hcsp->HCS_Base, ORC_EBIOSDATA); /* Read from BIOS */
- ORC_WR(hcsp->HCS_Base + ORC_EBIOSADR2, *(pData + 2));
- ORC_WRLONG(hcsp->HCS_Base + ORC_FWBASEADR, dData); /* Write FW address */
-
- wBIOSAddress = (USHORT) dData; /* FW code locate at BIOS address + ? */
- for (i = 0, pData = (UCHAR *) & dData; /* Download the code */
- i < 0x1000; /* Firmware code size = 4K */
- i++, wBIOSAddress++) {
- ORC_WRSHORT(hcsp->HCS_Base + ORC_EBIOSADR0, wBIOSAddress);
- *pData++ = ORC_RD(hcsp->HCS_Base, ORC_EBIOSDATA); /* Read from BIOS */
- if ((i % 4) == 3) {
- ORC_WRLONG(hcsp->HCS_Base + ORC_RISCRAM, dData); /* Write every 4 bytes */
- pData = (UCHAR *) & dData;
- }
- }
-
- ORC_WR(hcsp->HCS_Base + ORC_RISCCTL, PRGMRST | DOWNLOAD); /* Reset program count 0 */
- wBIOSAddress -= 0x1000; /* Reset the BIOS adddress */
- for (i = 0, pData = (UCHAR *) & dData; /* Check the code */
- i < 0x1000; /* Firmware code size = 4K */
- i++, wBIOSAddress++) {
- ORC_WRSHORT(hcsp->HCS_Base + ORC_EBIOSADR0, wBIOSAddress);
- *pData++ = ORC_RD(hcsp->HCS_Base, ORC_EBIOSDATA); /* Read from BIOS */
- if ((i % 4) == 3) {
- if (ORC_RDLONG(hcsp->HCS_Base, ORC_RISCRAM) != dData) {
- ORC_WR(hcsp->HCS_Base + ORC_RISCCTL, PRGMRST); /* Reset program to 0 */
- ORC_WR(hcsp->HCS_Base + ORC_GCFG, bData); /*Disable EEPROM programming */
- return (FALSE);
- }
- pData = (UCHAR *) & dData;
- }
- }
- ORC_WR(hcsp->HCS_Base + ORC_RISCCTL, PRGMRST); /* Reset program to 0 */
- ORC_WR(hcsp->HCS_Base + ORC_GCFG, bData); /* Disable EEPROM programming */
- return (TRUE);
-}
-
-/***************************************************************************/
-void setup_SCBs(ORC_HCS * hcsp)
-{
- ORC_SCB *pVirScb;
- int i;
- ESCB *pVirEscb;
- dma_addr_t pPhysEscb;
-
- /* Setup SCB HCS_Base and SCB Size registers */
- ORC_WR(hcsp->HCS_Base + ORC_SCBSIZE, ORC_MAXQUEUE); /* Total number of SCBs */
- /* SCB HCS_Base address 0 */
- ORC_WRLONG(hcsp->HCS_Base + ORC_SCBBASE0, hcsp->HCS_physScbArray);
- /* SCB HCS_Base address 1 */
- ORC_WRLONG(hcsp->HCS_Base + ORC_SCBBASE1, hcsp->HCS_physScbArray);
-
- /* setup scatter list address with one buffer */
- pVirScb = (ORC_SCB *) hcsp->HCS_virScbArray;
- pVirEscb = (ESCB *) hcsp->HCS_virEscbArray;
-
- for (i = 0; i < ORC_MAXQUEUE; i++) {
- pPhysEscb = (hcsp->HCS_physEscbArray + (sizeof(ESCB) * i));
- pVirScb->SCB_SGPAddr = (U32) pPhysEscb;
- pVirScb->SCB_SensePAddr = (U32) pPhysEscb;
- pVirScb->SCB_EScb = pVirEscb;
- pVirScb->SCB_ScbIdx = i;
- pVirScb++;
- pVirEscb++;
- }
-
- return;
-}
-
-/***************************************************************************/
-static void initAFlag(ORC_HCS * hcsp)
-{
- UCHAR i, j;
-
- for (i = 0; i < MAX_CHANNELS; i++) {
- for (j = 0; j < 8; j++) {
- hcsp->BitAllocFlag[i][j] = 0xffffffff;
- }
- }
-}
-
-/***************************************************************************/
-int init_orchid(ORC_HCS * hcsp)
-{
- UBYTE *readBytep;
- USHORT revision;
- UCHAR i;
-
- initAFlag(hcsp);
- ORC_WR(hcsp->HCS_Base + ORC_GIMSK, 0xFF); /* Disable all interrupt */
- if (ORC_RD(hcsp->HCS_Base, ORC_HSTUS) & RREADY) { /* Orchid is ready */
- revision = get_FW_version(hcsp);
- if (revision == 0xFFFF) {
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, DEVRST); /* Reset Host Adapter */
- if (waitChipReady(hcsp) == FALSE)
- return (-1);
- load_FW(hcsp); /* Download FW */
- setup_SCBs(hcsp); /* Setup SCB HCS_Base and SCB Size registers */
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, 0); /* clear HOSTSTOP */
- if (waitFWReady(hcsp) == FALSE)
- return (-1);
- /* Wait for firmware ready */
- } else {
- setup_SCBs(hcsp); /* Setup SCB HCS_Base and SCB Size registers */
- }
- } else { /* Orchid is not Ready */
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, DEVRST); /* Reset Host Adapter */
- if (waitChipReady(hcsp) == FALSE)
- return (-1);
- load_FW(hcsp); /* Download FW */
- setup_SCBs(hcsp); /* Setup SCB HCS_Base and SCB Size registers */
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, HDO); /* Do Hardware Reset & */
-
- /* clear HOSTSTOP */
- if (waitFWReady(hcsp) == FALSE) /* Wait for firmware ready */
- return (-1);
- }
-
-/*------------- get serial EEProm settting -------*/
-
- read_eeprom(hcsp);
-
- if (nvramp->Revision != 1)
- return (-1);
-
- hcsp->HCS_SCSI_ID = nvramp->SCSI0Id;
- hcsp->HCS_BIOS = nvramp->BIOSConfig1;
- hcsp->HCS_MaxTar = MAX_TARGETS;
- readBytep = (UCHAR *) & (nvramp->Target00Config);
- for (i = 0; i < 16; readBytep++, i++) {
- hcsp->TargetFlag[i] = *readBytep;
- hcsp->MaximumTags[i] = ORC_MAXTAGS;
- } /* for */
-
- if (nvramp->SCSI0Config & NCC_BUSRESET) { /* Reset SCSI bus */
- hcsp->HCS_Flags |= HCF_SCSI_RESET;
- }
- ORC_WR(hcsp->HCS_Base + ORC_GIMSK, 0xFB); /* enable RP FIFO interrupt */
- return (0);
-}
-
-/*****************************************************************************
- Function name : orc_reset_scsi_bus
- Description : Reset registers, reset a hanging bus and
- kill active and disconnected commands for target w/o soft reset
- Input : pHCB - Pointer to host adapter structure
- Output : None.
- Return : pSRB - Pointer to SCSI request block.
-*****************************************************************************/
-int orc_reset_scsi_bus(ORC_HCS * pHCB)
-{ /* I need Host Control Block Information */
- ULONG flags;
-
- spin_lock_irqsave(&(pHCB->BitAllocFlagLock), flags);
-
- initAFlag(pHCB);
- /* reset scsi bus */
- ORC_WR(pHCB->HCS_Base + ORC_HCTRL, SCSIRST);
- if (waitSCSIRSTdone(pHCB) == FALSE) {
- spin_unlock_irqrestore(&(pHCB->BitAllocFlagLock), flags);
- return FAILED;
- } else {
- spin_unlock_irqrestore(&(pHCB->BitAllocFlagLock), flags);
- return SUCCESS;
- }
-}
-
-/*****************************************************************************
- Function name : orc_device_reset
- Description : Reset registers, reset a hanging bus and
- kill active and disconnected commands for target w/o soft reset
- Input : pHCB - Pointer to host adapter structure
- Output : None.
- Return : pSRB - Pointer to SCSI request block.
-*****************************************************************************/
-int orc_device_reset(ORC_HCS * pHCB, Scsi_Cmnd *SCpnt, unsigned int target)
-{ /* I need Host Control Block Information */
- ORC_SCB *pScb;
- ESCB *pVirEscb;
- ORC_SCB *pVirScb;
- UCHAR i;
- ULONG flags;
-
- spin_lock_irqsave(&(pHCB->BitAllocFlagLock), flags);
- pScb = (ORC_SCB *) NULL;
- pVirEscb = (ESCB *) NULL;
-
- /* setup scatter list address with one buffer */
- pVirScb = (ORC_SCB *) pHCB->HCS_virScbArray;
-
- initAFlag(pHCB);
- /* device reset */
- for (i = 0; i < ORC_MAXQUEUE; i++) {
- pVirEscb = pVirScb->SCB_EScb;
- if ((pVirScb->SCB_Status) && (pVirEscb->SCB_Srb == SCpnt))
- break;
- pVirScb++;
- }
-
- if (i == ORC_MAXQUEUE) {
- printk("Unable to Reset - No SCB Found\n");
- spin_unlock_irqrestore(&(pHCB->BitAllocFlagLock), flags);
- return FAILED;
- }
- if ((pScb = orc_alloc_scb(pHCB)) == NULL) {
- spin_unlock_irqrestore(&(pHCB->BitAllocFlagLock), flags);
- return FAILED;
- }
- pScb->SCB_Opcode = ORC_BUSDEVRST;
- pScb->SCB_Target = target;
- pScb->SCB_HaStat = 0;
- pScb->SCB_TaStat = 0;
- pScb->SCB_Status = 0x0;
- pScb->SCB_Link = 0xFF;
- pScb->SCB_Reserved0 = 0;
- pScb->SCB_Reserved1 = 0;
- pScb->SCB_XferLen = 0;
- pScb->SCB_SGLen = 0;
-
- pVirEscb->SCB_Srb = NULL;
- pVirEscb->SCB_Srb = SCpnt;
- orc_exec_scb(pHCB, pScb); /* Start execute SCB */
- spin_unlock_irqrestore(&(pHCB->BitAllocFlagLock), flags);
- return SUCCESS;
-}
-
-
-/***************************************************************************/
-ORC_SCB *__orc_alloc_scb(ORC_HCS * hcsp)
-{
- ORC_SCB *pTmpScb;
- UCHAR Ch;
- ULONG idx;
- UCHAR index;
- UCHAR i;
-
- Ch = hcsp->HCS_Index;
- for (i = 0; i < 8; i++) {
- for (index = 0; index < 32; index++) {
- if ((hcsp->BitAllocFlag[Ch][i] >> index) & 0x01) {
- hcsp->BitAllocFlag[Ch][i] &= ~(1 << index);
- break;
- }
- }
- idx = index + 32 * i;
- pTmpScb = (PVOID) ((ULONG) hcsp->HCS_virScbArray + (idx * sizeof(ORC_SCB)));
- return (pTmpScb);
- }
- return (NULL);
-}
-
-ORC_SCB *orc_alloc_scb(ORC_HCS * hcsp)
-{
- ORC_SCB *pTmpScb;
- ULONG flags;
-
- spin_lock_irqsave(&(hcsp->BitAllocFlagLock), flags);
- pTmpScb = __orc_alloc_scb(hcsp);
- spin_unlock_irqrestore(&(hcsp->BitAllocFlagLock), flags);
- return (pTmpScb);
-}
-
-
-/***************************************************************************/
-void orc_release_scb(ORC_HCS * hcsp, ORC_SCB * scbp)
-{
- ULONG flags;
- UCHAR Index;
- UCHAR i;
- UCHAR Ch;
-
- spin_lock_irqsave(&(hcsp->BitAllocFlagLock), flags);
- Ch = hcsp->HCS_Index;
- Index = scbp->SCB_ScbIdx;
- i = Index / 32;
- Index %= 32;
- hcsp->BitAllocFlag[Ch][i] |= (1 << Index);
- spin_unlock_irqrestore(&(hcsp->BitAllocFlagLock), flags);
-}
-
-
-/***************************************************************************/
-void orc_release_dma(ORC_HCS * hcsp, Scsi_Cmnd * SCpnt)
-{
- struct scatterlist *pSrbSG;
-
- if (SCpnt->use_sg) {
- pSrbSG = (struct scatterlist *)SCpnt->request_buffer;
- pci_unmap_sg(hcsp->pdev, pSrbSG, SCpnt->use_sg,
- scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
- } else if (SCpnt->request_bufflen != 0) {
- pci_unmap_single(hcsp->pdev, (U32)SCpnt->host_scribble,
- SCpnt->request_bufflen,
- scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
- }
-}
-
-/*****************************************************************************
- Function name : abort_SCB
- Description : Abort a queued command.
- (commands that are on the bus can't be aborted easily)
- Input : pHCB - Pointer to host adapter structure
- Output : None.
- Return : pSRB - Pointer to SCSI request block.
-*****************************************************************************/
-int abort_SCB(ORC_HCS * hcsp, ORC_SCB * pScb)
-{
- unsigned char bData, bStatus;
-
- ORC_WR(hcsp->HCS_Base + ORC_HDATA, ORC_CMD_ABORT_SCB); /* Write command */
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, HDO);
- if (waitHDOoff(hcsp) == FALSE) /* Wait HDO off */
- return (FALSE);
-
- ORC_WR(hcsp->HCS_Base + ORC_HDATA, pScb->SCB_ScbIdx); /* Write address */
- ORC_WR(hcsp->HCS_Base + ORC_HCTRL, HDO);
- if (waitHDOoff(hcsp) == FALSE) /* Wait HDO off */
- return (FALSE);
-
- if (waitHDIset(hcsp, &bData) == FALSE) /* Wait HDI set */
- return (FALSE);
- bStatus = ORC_RD(hcsp->HCS_Base, ORC_HDATA);
- ORC_WR(hcsp->HCS_Base + ORC_HSTUS, bData); /* Clear HDI */
-
- if (bStatus == 1) /* 0 - Successfully */
- return (FALSE); /* 1 - Fail */
- return (TRUE);
-}
-
-/*****************************************************************************
- Function name : inia100_abort
- Description : Abort a queued command.
- (commands that are on the bus can't be aborted easily)
- Input : pHCB - Pointer to host adapter structure
- Output : None.
- Return : pSRB - Pointer to SCSI request block.
-*****************************************************************************/
-int orc_abort_srb(ORC_HCS * hcsp, Scsi_Cmnd *SCpnt)
-{
- ESCB *pVirEscb;
- ORC_SCB *pVirScb;
- UCHAR i;
- ULONG flags;
-
- spin_lock_irqsave(&(hcsp->BitAllocFlagLock), flags);
-
- pVirScb = (ORC_SCB *) hcsp->HCS_virScbArray;
-
- for (i = 0; i < ORC_MAXQUEUE; i++, pVirScb++) {
- pVirEscb = pVirScb->SCB_EScb;
- if ((pVirScb->SCB_Status) && (pVirEscb->SCB_Srb == SCpnt)) {
- if (pVirScb->SCB_TagMsg == 0) {
- spin_unlock_irqrestore(&(hcsp->BitAllocFlagLock), flags);
- return FAILED;
- } else {
- if (abort_SCB(hcsp, pVirScb)) {
- pVirEscb->SCB_Srb = NULL;
- spin_unlock_irqrestore(&(hcsp->BitAllocFlagLock), flags);
- return SUCCESS;
- } else {
- spin_unlock_irqrestore(&(hcsp->BitAllocFlagLock), flags);
- return FAILED;
- }
- }
- }
- }
- spin_unlock_irqrestore(&(hcsp->BitAllocFlagLock), flags);
- return FAILED;
-}
-
-/***********************************************************************
- Routine Description:
- This is the interrupt service routine for the Orchid SCSI adapter.
- It reads the interrupt register to determine if the adapter is indeed
- the source of the interrupt and clears the interrupt at the device.
- Arguments:
- HwDeviceExtension - HBA miniport driver's adapter data storage
- Return Value:
-***********************************************************************/
-void orc_interrupt(
- ORC_HCS * hcsp
-)
-{
- BYTE bScbIdx;
- ORC_SCB *pScb;
-
- if (ORC_RD(hcsp->HCS_Base, ORC_RQUEUECNT) == 0) {
- return; // (FALSE);
-
- }
- do {
- bScbIdx = ORC_RD(hcsp->HCS_Base, ORC_RQUEUE);
-
- pScb = (ORC_SCB *) ((ULONG) hcsp->HCS_virScbArray + (ULONG) (sizeof(ORC_SCB) * bScbIdx));
- pScb->SCB_Status = 0x0;
-
- inia100SCBPost((BYTE *) hcsp, (BYTE *) pScb);
- } while (ORC_RD(hcsp->HCS_Base, ORC_RQUEUECNT));
- return; //(TRUE);
-
-} /* End of I1060Interrupt() */
+++ /dev/null
-/**************************************************************************
- * Initio 9100 device driver for Linux.
- *
- * Copyright (c) 1994-1998 Initio Corporation
- * Copyright (c) 1998 Bas Vermeulen <bvermeul@blackstar.xs4all.nl>
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING. If not, write to
- * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * --------------------------------------------------------------------------
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * Where this Software is combined with software released under the terms of
- * the GNU General Public License ("GPL") and the terms of the GPL would require the
- * combined work to also be released under the terms of the GPL, the terms
- * and conditions of this License will apply in addition to those of the
- * GPL with the exception of any terms or conditions of this License that
- * conflict with, or are expressly prohibited by, the GPL.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- ************************************************************************
- Module: i91uscsi.c
- Description: PCI I/F for INI-910 SCSI Bus Master Controller
- Revision History:
- 11/09/94 Tim Chen, Initiali Version 0.90A
- 01/17/95 TC, release ver 1.01
- 02/09/95 TC modify ReadPCIConfig, try both mechanisms;
- 02/15/95 TC add support for INI-9100W
- 06/04/96 HC, Change to fit LINUX from jaspci.c
- 11/18/96 HC, Port for tulip
- 07/08/98 hc, Support 0002134A
- 07/23/98 wh, Change the abort_srb routine.
- 09/16/98 hl, Support ALPHA, Rewrite the returnNumberAdapters <01>
- 12/09/98 bv, Removed unused code, changed tul_se2_wait to
- use udelay(30) and tul_do_pause to enable
- interrupts for >= 2.1.95
- 12/13/98 bv, Use spinlocks instead of cli() for serialized
- access to HCS_Semaph, HCS_FirstAvail and HCS_LastAvail
- members of the HCS structure.
- 01/09/98 bv, Fix a deadlock on SMP system.
-**********************************************************************/
-
-#define DEBUG_INTERRUPT 0
-#define DEBUG_QUEUE 0
-#define DEBUG_STATE 0
-#define INT_DISC 0
-
-#include <linux/jiffies.h>
-#include <linux/delay.h>
-#include <linux/blkdev.h>
-#include <asm/io.h>
-
-#include "i91uscsi.h"
-
-/*--- external functions --*/
-static void tul_se2_wait(void);
-
-/*--- forward refrence ---*/
-static SCB *tul_find_busy_scb(HCS * pCurHcb, WORD tarlun);
-static SCB *tul_find_done_scb(HCS * pCurHcb);
-
-static int tulip_main(HCS * pCurHcb);
-
-static int tul_next_state(HCS * pCurHcb);
-static int tul_state_1(HCS * pCurHcb);
-static int tul_state_2(HCS * pCurHcb);
-static int tul_state_3(HCS * pCurHcb);
-static int tul_state_4(HCS * pCurHcb);
-static int tul_state_5(HCS * pCurHcb);
-static int tul_state_6(HCS * pCurHcb);
-static int tul_state_7(HCS * pCurHcb);
-static int tul_xfer_data_in(HCS * pCurHcb);
-static int tul_xfer_data_out(HCS * pCurHcb);
-static int tul_xpad_in(HCS * pCurHcb);
-static int tul_xpad_out(HCS * pCurHcb);
-static int tul_status_msg(HCS * pCurHcb);
-
-static int tul_msgin(HCS * pCurHcb);
-static int tul_msgin_sync(HCS * pCurHcb);
-static int tul_msgin_accept(HCS * pCurHcb);
-static int tul_msgout_reject(HCS * pCurHcb);
-static int tul_msgin_extend(HCS * pCurHcb);
-
-static int tul_msgout_ide(HCS * pCurHcb);
-static int tul_msgout_abort_targ(HCS * pCurHcb);
-static int tul_msgout_abort_tag(HCS * pCurHcb);
-
-static int tul_bus_device_reset(HCS * pCurHcb);
-static void tul_select_atn(HCS * pCurHcb, SCB * pCurScb);
-static void tul_select_atn3(HCS * pCurHcb, SCB * pCurScb);
-static void tul_select_atn_stop(HCS * pCurHcb, SCB * pCurScb);
-static int int_tul_busfree(HCS * pCurHcb);
-int int_tul_scsi_rst(HCS * pCurHcb);
-static int int_tul_bad_seq(HCS * pCurHcb);
-static int int_tul_resel(HCS * pCurHcb);
-static int tul_sync_done(HCS * pCurHcb);
-static int wdtr_done(HCS * pCurHcb);
-static int wait_tulip(HCS * pCurHcb);
-static int tul_wait_done_disc(HCS * pCurHcb);
-static int tul_wait_disc(HCS * pCurHcb);
-static void tulip_scsi(HCS * pCurHcb);
-static int tul_post_scsi_rst(HCS * pCurHcb);
-
-static void tul_se2_ew_en(WORD CurBase);
-static void tul_se2_ew_ds(WORD CurBase);
-static int tul_se2_rd_all(WORD CurBase);
-static void tul_se2_update_all(WORD CurBase); /* setup default pattern */
-static void tul_read_eeprom(WORD CurBase);
-
- /* ---- EXTERNAL VARIABLES ---- */
-HCS tul_hcs[MAX_SUPPORTED_ADAPTERS];
- /* ---- INTERNAL VARIABLES ---- */
-static INI_ADPT_STRUCT i91u_adpt[MAX_SUPPORTED_ADAPTERS];
-
-/*NVRAM nvram, *nvramp = &nvram; */
-static NVRAM i91unvram;
-static NVRAM *i91unvramp;
-
-
-
-static UCHAR i91udftNvRam[64] =
-{
-/*----------- header -----------*/
- 0x25, 0xc9, /* Signature */
- 0x40, /* Size */
- 0x01, /* Revision */
- /* -- Host Adapter Structure -- */
- 0x95, /* ModelByte0 */
- 0x00, /* ModelByte1 */
- 0x00, /* ModelInfo */
- 0x01, /* NumOfCh */
- NBC1_DEFAULT, /* BIOSConfig1 */
- 0, /* BIOSConfig2 */
- 0, /* HAConfig1 */
- 0, /* HAConfig2 */
- /* SCSI channel 0 and target Structure */
- 7, /* SCSIid */
- NCC1_DEFAULT, /* SCSIconfig1 */
- 0, /* SCSIconfig2 */
- 0x10, /* NumSCSItarget */
-
- NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT,
- NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT,
- NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT,
- NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT,
-
- /* SCSI channel 1 and target Structure */
- 7, /* SCSIid */
- NCC1_DEFAULT, /* SCSIconfig1 */
- 0, /* SCSIconfig2 */
- 0x10, /* NumSCSItarget */
-
- NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT,
- NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT,
- NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT,
- NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT, NTC_DEFAULT,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0}; /* - CheckSum - */
-
-
-static UCHAR tul_rate_tbl[8] = /* fast 20 */
-{
- /* nanosecond devide by 4 */
- 12, /* 50ns, 20M */
- 18, /* 75ns, 13.3M */
- 25, /* 100ns, 10M */
- 31, /* 125ns, 8M */
- 37, /* 150ns, 6.6M */
- 43, /* 175ns, 5.7M */
- 50, /* 200ns, 5M */
- 62 /* 250ns, 4M */
-};
-
-extern int tul_num_ch;
-
-
-static void tul_do_pause(unsigned amount)
-{ /* Pause for amount jiffies */
- unsigned long the_time = jiffies + amount;
-
- while (time_before_eq(jiffies, the_time));
-}
-
-/*-- forward reference --*/
-
-/*******************************************************************
- Use memeory refresh time ~ 15us * 2
-********************************************************************/
-void tul_se2_wait()
-{
-#if 1
- udelay(30);
-#else
- UCHAR readByte;
-
- readByte = TUL_RD(0, 0x61);
- if ((readByte & 0x10) == 0x10) {
- for (;;) {
- readByte = TUL_RD(0, 0x61);
- if ((readByte & 0x10) == 0x10)
- break;
- }
- for (;;) {
- readByte = TUL_RD(0, 0x61);
- if ((readByte & 0x10) != 0x10)
- break;
- }
- } else {
- for (;;) {
- readByte = TUL_RD(0, 0x61);
- if ((readByte & 0x10) == 0x10)
- break;
- }
- for (;;) {
- readByte = TUL_RD(0, 0x61);
- if ((readByte & 0x10) != 0x10)
- break;
- }
- }
-#endif
-}
-
-
-/******************************************************************
- Input: instruction for Serial E2PROM
-
- EX: se2_rd(0 call se2_instr() to send address and read command
-
- StartBit OP_Code Address Data
- --------- -------- ------------------ -------
- 1 1 , 0 A5,A4,A3,A2,A1,A0 D15-D0
-
- +-----------------------------------------------------
- |
- CS -----+
- +--+ +--+ +--+ +--+ +--+
- ^ | ^ | ^ | ^ | ^ |
- | | | | | | | | | |
- CLK -------+ +--+ +--+ +--+ +--+ +--
- (leading edge trigger)
-
- +--1-----1--+
- | SB OP | OP A5 A4
- DI ----+ +--0------------------
- (address and cmd sent to nvram)
-
- -------------------------------------------+
- |
- DO +---
- (data sent from nvram)
-
-
-******************************************************************/
-void tul_se2_instr(WORD CurBase, UCHAR instr)
-{
- int i;
- UCHAR b;
-
- TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2DO); /* cs+start bit */
- tul_se2_wait();
- TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2CLK | SE2DO); /* +CLK */
- tul_se2_wait();
-
- for (i = 0; i < 8; i++) {
- if (instr & 0x80)
- b = SE2CS | SE2DO; /* -CLK+dataBit */
- else
- b = SE2CS; /* -CLK */
- TUL_WR(CurBase + TUL_NVRAM, b);
- tul_se2_wait();
- TUL_WR(CurBase + TUL_NVRAM, b | SE2CLK); /* +CLK */
- tul_se2_wait();
- instr <<= 1;
- }
- TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* -CLK */
- tul_se2_wait();
- return;
-}
-
-
-/******************************************************************
- Function name : tul_se2_ew_en
- Description : Enable erase/write state of serial EEPROM
-******************************************************************/
-void tul_se2_ew_en(WORD CurBase)
-{
- tul_se2_instr(CurBase, 0x30); /* EWEN */
- TUL_WR(CurBase + TUL_NVRAM, 0); /* -CS */
- tul_se2_wait();
- return;
-}
-
-
-/************************************************************************
- Disable erase/write state of serial EEPROM
-*************************************************************************/
-void tul_se2_ew_ds(WORD CurBase)
-{
- tul_se2_instr(CurBase, 0); /* EWDS */
- TUL_WR(CurBase + TUL_NVRAM, 0); /* -CS */
- tul_se2_wait();
- return;
-}
-
-
-/******************************************************************
- Input :address of Serial E2PROM
- Output :value stored in Serial E2PROM
-*******************************************************************/
-USHORT tul_se2_rd(WORD CurBase, ULONG adr)
-{
- UCHAR instr, readByte;
- USHORT readWord;
- int i;
-
- instr = (UCHAR) (adr | 0x80);
- tul_se2_instr(CurBase, instr); /* READ INSTR */
- readWord = 0;
-
- for (i = 15; i >= 0; i--) {
- TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2CLK); /* +CLK */
- tul_se2_wait();
- TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* -CLK */
-
- /* sample data after the following edge of clock */
- readByte = TUL_RD(CurBase, TUL_NVRAM);
- readByte &= SE2DI;
- readWord += (readByte << i);
- tul_se2_wait(); /* 6/20/95 */
- }
-
- TUL_WR(CurBase + TUL_NVRAM, 0); /* no chip select */
- tul_se2_wait();
- return readWord;
-}
-
-
-/******************************************************************
- Input: new value in Serial E2PROM, address of Serial E2PROM
-*******************************************************************/
-void tul_se2_wr(WORD CurBase, UCHAR adr, USHORT writeWord)
-{
- UCHAR readByte;
- UCHAR instr;
- int i;
-
- instr = (UCHAR) (adr | 0x40);
- tul_se2_instr(CurBase, instr); /* WRITE INSTR */
- for (i = 15; i >= 0; i--) {
- if (writeWord & 0x8000)
- TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2DO); /* -CLK+dataBit 1 */
- else
- TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* -CLK+dataBit 0 */
- tul_se2_wait();
- TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2CLK); /* +CLK */
- tul_se2_wait();
- writeWord <<= 1;
- }
- TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* -CLK */
- tul_se2_wait();
- TUL_WR(CurBase + TUL_NVRAM, 0); /* -CS */
- tul_se2_wait();
-
- TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* +CS */
- tul_se2_wait();
-
- for (;;) {
- TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2CLK); /* +CLK */
- tul_se2_wait();
- TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* -CLK */
- tul_se2_wait();
- if ((readByte = TUL_RD(CurBase, TUL_NVRAM)) & SE2DI)
- break; /* write complete */
- }
- TUL_WR(CurBase + TUL_NVRAM, 0); /* -CS */
- return;
-}
-
-
-/***********************************************************************
- Read SCSI H/A configuration parameters from serial EEPROM
-************************************************************************/
-int tul_se2_rd_all(WORD CurBase)
-{
- int i;
- ULONG chksum = 0;
- USHORT *np;
-
- i91unvramp = &i91unvram;
- np = (USHORT *) i91unvramp;
- for (i = 0; i < 32; i++) {
- *np++ = tul_se2_rd(CurBase, i);
- }
-
-/*--------------------Is signature "ini" ok ? ----------------*/
- if (i91unvramp->NVM_Signature != INI_SIGNATURE)
- return -1;
-/*---------------------- Is ckecksum ok ? ----------------------*/
- np = (USHORT *) i91unvramp;
- for (i = 0; i < 31; i++)
- chksum += *np++;
- if (i91unvramp->NVM_CheckSum != (USHORT) chksum)
- return -1;
- return 1;
-}
-
-
-/***********************************************************************
- Update SCSI H/A configuration parameters from serial EEPROM
-************************************************************************/
-void tul_se2_update_all(WORD CurBase)
-{ /* setup default pattern */
- int i;
- ULONG chksum = 0;
- USHORT *np, *np1;
-
- i91unvramp = &i91unvram;
- /* Calculate checksum first */
- np = (USHORT *) i91udftNvRam;
- for (i = 0; i < 31; i++)
- chksum += *np++;
- *np = (USHORT) chksum;
- tul_se2_ew_en(CurBase); /* Enable write */
-
- np = (USHORT *) i91udftNvRam;
- np1 = (USHORT *) i91unvramp;
- for (i = 0; i < 32; i++, np++, np1++) {
- if (*np != *np1) {
- tul_se2_wr(CurBase, i, *np);
- }
- }
-
- tul_se2_ew_ds(CurBase); /* Disable write */
- return;
-}
-
-/*************************************************************************
- Function name : read_eeprom
-**************************************************************************/
-void tul_read_eeprom(WORD CurBase)
-{
- UCHAR gctrl;
-
- i91unvramp = &i91unvram;
-/*------Enable EEProm programming ---*/
- gctrl = TUL_RD(CurBase, TUL_GCTRL);
- TUL_WR(CurBase + TUL_GCTRL, gctrl | TUL_GCTRL_EEPROM_BIT);
- if (tul_se2_rd_all(CurBase) != 1) {
- tul_se2_update_all(CurBase); /* setup default pattern */
- tul_se2_rd_all(CurBase); /* load again */
- }
-/*------ Disable EEProm programming ---*/
- gctrl = TUL_RD(CurBase, TUL_GCTRL);
- TUL_WR(CurBase + TUL_GCTRL, gctrl & ~TUL_GCTRL_EEPROM_BIT);
-} /* read_eeprom */
-
-int Addi91u_into_Adapter_table(WORD wBIOS, WORD wBASE, BYTE bInterrupt,
- BYTE bBus, BYTE bDevice)
-{
- int i, j;
-
- for (i = 0; i < MAX_SUPPORTED_ADAPTERS; i++) {
- if (i91u_adpt[i].ADPT_BIOS < wBIOS)
- continue;
- if (i91u_adpt[i].ADPT_BIOS == wBIOS) {
- if (i91u_adpt[i].ADPT_BASE == wBASE) {
- if (i91u_adpt[i].ADPT_Bus != 0xFF)
- return (FAILURE);
- } else if (i91u_adpt[i].ADPT_BASE < wBASE)
- continue;
- }
- for (j = MAX_SUPPORTED_ADAPTERS - 1; j > i; j--) {
- i91u_adpt[j].ADPT_BASE = i91u_adpt[j - 1].ADPT_BASE;
- i91u_adpt[j].ADPT_INTR = i91u_adpt[j - 1].ADPT_INTR;
- i91u_adpt[j].ADPT_BIOS = i91u_adpt[j - 1].ADPT_BIOS;
- i91u_adpt[j].ADPT_Bus = i91u_adpt[j - 1].ADPT_Bus;
- i91u_adpt[j].ADPT_Device = i91u_adpt[j - 1].ADPT_Device;
- }
- i91u_adpt[i].ADPT_BASE = wBASE;
- i91u_adpt[i].ADPT_INTR = bInterrupt;
- i91u_adpt[i].ADPT_BIOS = wBIOS;
- i91u_adpt[i].ADPT_Bus = bBus;
- i91u_adpt[i].ADPT_Device = bDevice;
- return (SUCCESSFUL);
- }
- return (FAILURE);
-}
-
-void init_i91uAdapter_table(void)
-{
- int i;
-
- for (i = 0; i < MAX_SUPPORTED_ADAPTERS; i++) { /* Initialize adapter structure */
- i91u_adpt[i].ADPT_BIOS = 0xffff;
- i91u_adpt[i].ADPT_BASE = 0xffff;
- i91u_adpt[i].ADPT_INTR = 0xff;
- i91u_adpt[i].ADPT_Bus = 0xff;
- i91u_adpt[i].ADPT_Device = 0xff;
- }
- return;
-}
-
-void tul_stop_bm(HCS * pCurHcb)
-{
-
- if (TUL_RD(pCurHcb->HCS_Base, TUL_XStatus) & XPEND) { /* if DMA xfer is pending, abort DMA xfer */
- TUL_WR(pCurHcb->HCS_Base + TUL_XCmd, TAX_X_ABT | TAX_X_CLR_FIFO);
- /* wait Abort DMA xfer done */
- while ((TUL_RD(pCurHcb->HCS_Base, TUL_Int) & XABT) == 0);
- }
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
-}
-
-/***************************************************************************/
-void get_tulipPCIConfig(HCS * pCurHcb, int ch_idx)
-{
- pCurHcb->HCS_Base = i91u_adpt[ch_idx].ADPT_BASE; /* Supply base address */
- pCurHcb->HCS_BIOS = i91u_adpt[ch_idx].ADPT_BIOS; /* Supply BIOS address */
- pCurHcb->HCS_Intr = i91u_adpt[ch_idx].ADPT_INTR; /* Supply interrupt line */
- return;
-}
-
-/***************************************************************************/
-int tul_reset_scsi(HCS * pCurHcb, int seconds)
-{
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_RST_BUS);
-
- while (!((pCurHcb->HCS_JSInt = TUL_RD(pCurHcb->HCS_Base, TUL_SInt)) & TSS_SCSIRST_INT));
- /* reset tulip chip */
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, 0);
-
- /* Stall for a while, wait for target's firmware ready,make it 2 sec ! */
- /* SONY 5200 tape drive won't work if only stall for 1 sec */
- tul_do_pause(seconds * HZ);
-
- TUL_RD(pCurHcb->HCS_Base, TUL_SInt);
-
- return (SCSI_RESET_SUCCESS);
-}
-
-/***************************************************************************/
-int init_tulip(HCS * pCurHcb, SCB * scbp, int tul_num_scb, BYTE * pbBiosAdr, int seconds)
-{
- int i;
- BYTE *pwFlags;
- BYTE *pbHeads;
- SCB *pTmpScb, *pPrevScb = NULL;
-
- pCurHcb->HCS_NumScbs = tul_num_scb;
- pCurHcb->HCS_Semaph = 1;
- pCurHcb->HCS_SemaphLock = SPIN_LOCK_UNLOCKED;
- pCurHcb->HCS_JSStatus0 = 0;
- pCurHcb->HCS_Scb = scbp;
- pCurHcb->HCS_NxtPend = scbp;
- pCurHcb->HCS_NxtAvail = scbp;
- for (i = 0, pTmpScb = scbp; i < tul_num_scb; i++, pTmpScb++) {
- pTmpScb->SCB_TagId = i;
- if (i != 0)
- pPrevScb->SCB_NxtScb = pTmpScb;
- pPrevScb = pTmpScb;
- }
- pPrevScb->SCB_NxtScb = NULL;
- pCurHcb->HCS_ScbEnd = pTmpScb;
- pCurHcb->HCS_FirstAvail = scbp;
- pCurHcb->HCS_LastAvail = pPrevScb;
- pCurHcb->HCS_AvailLock = SPIN_LOCK_UNLOCKED;
- pCurHcb->HCS_FirstPend = NULL;
- pCurHcb->HCS_LastPend = NULL;
- pCurHcb->HCS_FirstBusy = NULL;
- pCurHcb->HCS_LastBusy = NULL;
- pCurHcb->HCS_FirstDone = NULL;
- pCurHcb->HCS_LastDone = NULL;
- pCurHcb->HCS_ActScb = NULL;
- pCurHcb->HCS_ActTcs = NULL;
-
- tul_read_eeprom(pCurHcb->HCS_Base);
-/*---------- get H/A configuration -------------*/
- if (i91unvramp->NVM_SCSIInfo[0].NVM_NumOfTarg == 8)
- pCurHcb->HCS_MaxTar = 8;
- else
- pCurHcb->HCS_MaxTar = 16;
-
- pCurHcb->HCS_Config = i91unvramp->NVM_SCSIInfo[0].NVM_ChConfig1;
-
- pCurHcb->HCS_SCSI_ID = i91unvramp->NVM_SCSIInfo[0].NVM_ChSCSIID;
- pCurHcb->HCS_IdMask = ~(1 << pCurHcb->HCS_SCSI_ID);
-
-#if CHK_PARITY
- /* Enable parity error response */
- TUL_WR(pCurHcb->HCS_Base + TUL_PCMD, TUL_RD(pCurHcb->HCS_Base, TUL_PCMD) | 0x40);
-#endif
-
- /* Mask all the interrupt */
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x1F);
-
- tul_stop_bm(pCurHcb);
- /* --- Initialize the tulip --- */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_RST_CHIP);
-
- /* program HBA's SCSI ID */
- TUL_WR(pCurHcb->HCS_Base + TUL_SScsiId, pCurHcb->HCS_SCSI_ID << 4);
-
- /* Enable Initiator Mode ,phase latch,alternate sync period mode,
- disable SCSI reset */
- if (pCurHcb->HCS_Config & HCC_EN_PAR)
- pCurHcb->HCS_SConf1 = (TSC_INITDEFAULT | TSC_EN_SCSI_PAR);
- else
- pCurHcb->HCS_SConf1 = (TSC_INITDEFAULT);
- TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, pCurHcb->HCS_SConf1);
-
- /* Enable HW reselect */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl1, TSC_HW_RESELECT);
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SPeriod, 0);
-
- /* selection time out = 250 ms */
- TUL_WR(pCurHcb->HCS_Base + TUL_STimeOut, 153);
-
-/*--------- Enable SCSI terminator -----*/
- TUL_WR(pCurHcb->HCS_Base + TUL_XCtrl, (pCurHcb->HCS_Config & (HCC_ACT_TERM1 | HCC_ACT_TERM2)));
- TUL_WR(pCurHcb->HCS_Base + TUL_GCTRL1,
- ((pCurHcb->HCS_Config & HCC_AUTO_TERM) >> 4) | (TUL_RD(pCurHcb->HCS_Base, TUL_GCTRL1) & 0xFE));
-
- for (i = 0,
- pwFlags = & (i91unvramp->NVM_SCSIInfo[0].NVM_Targ0Config),
- pbHeads = pbBiosAdr + 0x180;
- i < pCurHcb->HCS_MaxTar;
- i++, pwFlags++) {
- pCurHcb->HCS_Tcs[i].TCS_Flags = *pwFlags & ~(TCF_SYNC_DONE | TCF_WDTR_DONE);
- if (pCurHcb->HCS_Tcs[i].TCS_Flags & TCF_EN_255)
- pCurHcb->HCS_Tcs[i].TCS_DrvFlags = TCF_DRV_255_63;
- else
- pCurHcb->HCS_Tcs[i].TCS_DrvFlags = 0;
- pCurHcb->HCS_Tcs[i].TCS_JS_Period = 0;
- pCurHcb->HCS_Tcs[i].TCS_SConfig0 = pCurHcb->HCS_SConf1;
- pCurHcb->HCS_Tcs[i].TCS_DrvHead = *pbHeads++;
- if (pCurHcb->HCS_Tcs[i].TCS_DrvHead == 255)
- pCurHcb->HCS_Tcs[i].TCS_DrvFlags = TCF_DRV_255_63;
- else
- pCurHcb->HCS_Tcs[i].TCS_DrvFlags = 0;
- pCurHcb->HCS_Tcs[i].TCS_DrvSector = *pbHeads++;
- pCurHcb->HCS_Tcs[i].TCS_Flags &= ~TCF_BUSY;
- pCurHcb->HCS_ActTags[i] = 0;
- pCurHcb->HCS_MaxTags[i] = 0xFF;
- } /* for */
- printk("i91u: PCI Base=0x%04X, IRQ=%d, BIOS=0x%04X0, SCSI ID=%d\n",
- pCurHcb->HCS_Base, pCurHcb->HCS_Intr,
- pCurHcb->HCS_BIOS, pCurHcb->HCS_SCSI_ID);
-/*------------------- reset SCSI Bus ---------------------------*/
- if (pCurHcb->HCS_Config & HCC_SCSI_RESET) {
- printk("i91u: Reset SCSI Bus ... \n");
- tul_reset_scsi(pCurHcb, seconds);
- }
- TUL_WR(pCurHcb->HCS_Base + TUL_SCFG1, 0x17);
- TUL_WR(pCurHcb->HCS_Base + TUL_SIntEnable, 0xE9);
- return (0);
-}
-
-/***************************************************************************/
-SCB *tul_alloc_scb(HCS * hcsp)
-{
- SCB *pTmpScb;
- ULONG flags;
- spin_lock_irqsave(&(hcsp->HCS_AvailLock), flags);
- if ((pTmpScb = hcsp->HCS_FirstAvail) != NULL) {
-#if DEBUG_QUEUE
- printk("find scb at %08lx\n", (ULONG) pTmpScb);
-#endif
- if ((hcsp->HCS_FirstAvail = pTmpScb->SCB_NxtScb) == NULL)
- hcsp->HCS_LastAvail = NULL;
- pTmpScb->SCB_NxtScb = NULL;
- pTmpScb->SCB_Status = SCB_RENT;
- }
- spin_unlock_irqrestore(&(hcsp->HCS_AvailLock), flags);
- return (pTmpScb);
-}
-
-/***************************************************************************/
-void tul_release_scb(HCS * hcsp, SCB * scbp)
-{
- ULONG flags;
-
-#if DEBUG_QUEUE
- printk("Release SCB %lx; ", (ULONG) scbp);
-#endif
- spin_lock_irqsave(&(hcsp->HCS_AvailLock), flags);
- scbp->SCB_Srb = 0;
- scbp->SCB_Status = 0;
- scbp->SCB_NxtScb = NULL;
- if (hcsp->HCS_LastAvail != NULL) {
- hcsp->HCS_LastAvail->SCB_NxtScb = scbp;
- hcsp->HCS_LastAvail = scbp;
- } else {
- hcsp->HCS_FirstAvail = scbp;
- hcsp->HCS_LastAvail = scbp;
- }
- spin_unlock_irqrestore(&(hcsp->HCS_AvailLock), flags);
-}
-
-/***************************************************************************/
-void tul_append_pend_scb(HCS * pCurHcb, SCB * scbp)
-{
-
-#if DEBUG_QUEUE
- printk("Append pend SCB %lx; ", (ULONG) scbp);
-#endif
- scbp->SCB_Status = SCB_PEND;
- scbp->SCB_NxtScb = NULL;
- if (pCurHcb->HCS_LastPend != NULL) {
- pCurHcb->HCS_LastPend->SCB_NxtScb = scbp;
- pCurHcb->HCS_LastPend = scbp;
- } else {
- pCurHcb->HCS_FirstPend = scbp;
- pCurHcb->HCS_LastPend = scbp;
- }
-}
-
-/***************************************************************************/
-void tul_push_pend_scb(HCS * pCurHcb, SCB * scbp)
-{
-
-#if DEBUG_QUEUE
- printk("Push pend SCB %lx; ", (ULONG) scbp);
-#endif
- scbp->SCB_Status = SCB_PEND;
- if ((scbp->SCB_NxtScb = pCurHcb->HCS_FirstPend) != NULL) {
- pCurHcb->HCS_FirstPend = scbp;
- } else {
- pCurHcb->HCS_FirstPend = scbp;
- pCurHcb->HCS_LastPend = scbp;
- }
-}
-
-/***************************************************************************/
-SCB *tul_find_first_pend_scb(HCS * pCurHcb)
-{
- SCB *pFirstPend;
-
-
- pFirstPend = pCurHcb->HCS_FirstPend;
- while (pFirstPend != NULL) {
- if (pFirstPend->SCB_Opcode != ExecSCSI) {
- return (pFirstPend);
- }
- if (pFirstPend->SCB_TagMsg == 0) {
- if ((pCurHcb->HCS_ActTags[pFirstPend->SCB_Target] == 0) &&
- !(pCurHcb->HCS_Tcs[pFirstPend->SCB_Target].TCS_Flags & TCF_BUSY)) {
- return (pFirstPend);
- }
- } else {
- if ((pCurHcb->HCS_ActTags[pFirstPend->SCB_Target] >=
- pCurHcb->HCS_MaxTags[pFirstPend->SCB_Target]) |
- (pCurHcb->HCS_Tcs[pFirstPend->SCB_Target].TCS_Flags & TCF_BUSY)) {
- pFirstPend = pFirstPend->SCB_NxtScb;
- continue;
- }
- return (pFirstPend);
- }
- pFirstPend = pFirstPend->SCB_NxtScb;
- }
-
-
- return (pFirstPend);
-}
-/***************************************************************************/
-SCB *tul_pop_pend_scb(HCS * pCurHcb)
-{
- SCB *pTmpScb;
-
- if ((pTmpScb = pCurHcb->HCS_FirstPend) != NULL) {
- if ((pCurHcb->HCS_FirstPend = pTmpScb->SCB_NxtScb) == NULL)
- pCurHcb->HCS_LastPend = NULL;
- pTmpScb->SCB_NxtScb = NULL;
- }
-#if DEBUG_QUEUE
- printk("Pop pend SCB %lx; ", (ULONG) pTmpScb);
-#endif
- return (pTmpScb);
-}
-
-
-/***************************************************************************/
-void tul_unlink_pend_scb(HCS * pCurHcb, SCB * pCurScb)
-{
- SCB *pTmpScb, *pPrevScb;
-
-#if DEBUG_QUEUE
- printk("unlink pend SCB %lx; ", (ULONG) pCurScb);
-#endif
-
- pPrevScb = pTmpScb = pCurHcb->HCS_FirstPend;
- while (pTmpScb != NULL) {
- if (pCurScb == pTmpScb) { /* Unlink this SCB */
- if (pTmpScb == pCurHcb->HCS_FirstPend) {
- if ((pCurHcb->HCS_FirstPend = pTmpScb->SCB_NxtScb) == NULL)
- pCurHcb->HCS_LastPend = NULL;
- } else {
- pPrevScb->SCB_NxtScb = pTmpScb->SCB_NxtScb;
- if (pTmpScb == pCurHcb->HCS_LastPend)
- pCurHcb->HCS_LastPend = pPrevScb;
- }
- pTmpScb->SCB_NxtScb = NULL;
- break;
- }
- pPrevScb = pTmpScb;
- pTmpScb = pTmpScb->SCB_NxtScb;
- }
- return;
-}
-/***************************************************************************/
-void tul_append_busy_scb(HCS * pCurHcb, SCB * scbp)
-{
-
-#if DEBUG_QUEUE
- printk("append busy SCB %lx; ", (ULONG) scbp);
-#endif
- if (scbp->SCB_TagMsg)
- pCurHcb->HCS_ActTags[scbp->SCB_Target]++;
- else
- pCurHcb->HCS_Tcs[scbp->SCB_Target].TCS_Flags |= TCF_BUSY;
- scbp->SCB_Status = SCB_BUSY;
- scbp->SCB_NxtScb = NULL;
- if (pCurHcb->HCS_LastBusy != NULL) {
- pCurHcb->HCS_LastBusy->SCB_NxtScb = scbp;
- pCurHcb->HCS_LastBusy = scbp;
- } else {
- pCurHcb->HCS_FirstBusy = scbp;
- pCurHcb->HCS_LastBusy = scbp;
- }
-}
-
-/***************************************************************************/
-SCB *tul_pop_busy_scb(HCS * pCurHcb)
-{
- SCB *pTmpScb;
-
-
- if ((pTmpScb = pCurHcb->HCS_FirstBusy) != NULL) {
- if ((pCurHcb->HCS_FirstBusy = pTmpScb->SCB_NxtScb) == NULL)
- pCurHcb->HCS_LastBusy = NULL;
- pTmpScb->SCB_NxtScb = NULL;
- if (pTmpScb->SCB_TagMsg)
- pCurHcb->HCS_ActTags[pTmpScb->SCB_Target]--;
- else
- pCurHcb->HCS_Tcs[pTmpScb->SCB_Target].TCS_Flags &= ~TCF_BUSY;
- }
-#if DEBUG_QUEUE
- printk("Pop busy SCB %lx; ", (ULONG) pTmpScb);
-#endif
- return (pTmpScb);
-}
-
-/***************************************************************************/
-void tul_unlink_busy_scb(HCS * pCurHcb, SCB * pCurScb)
-{
- SCB *pTmpScb, *pPrevScb;
-
-#if DEBUG_QUEUE
- printk("unlink busy SCB %lx; ", (ULONG) pCurScb);
-#endif
-
- pPrevScb = pTmpScb = pCurHcb->HCS_FirstBusy;
- while (pTmpScb != NULL) {
- if (pCurScb == pTmpScb) { /* Unlink this SCB */
- if (pTmpScb == pCurHcb->HCS_FirstBusy) {
- if ((pCurHcb->HCS_FirstBusy = pTmpScb->SCB_NxtScb) == NULL)
- pCurHcb->HCS_LastBusy = NULL;
- } else {
- pPrevScb->SCB_NxtScb = pTmpScb->SCB_NxtScb;
- if (pTmpScb == pCurHcb->HCS_LastBusy)
- pCurHcb->HCS_LastBusy = pPrevScb;
- }
- pTmpScb->SCB_NxtScb = NULL;
- if (pTmpScb->SCB_TagMsg)
- pCurHcb->HCS_ActTags[pTmpScb->SCB_Target]--;
- else
- pCurHcb->HCS_Tcs[pTmpScb->SCB_Target].TCS_Flags &= ~TCF_BUSY;
- break;
- }
- pPrevScb = pTmpScb;
- pTmpScb = pTmpScb->SCB_NxtScb;
- }
- return;
-}
-
-/***************************************************************************/
-SCB *tul_find_busy_scb(HCS * pCurHcb, WORD tarlun)
-{
- SCB *pTmpScb, *pPrevScb;
- WORD scbp_tarlun;
-
-
- pPrevScb = pTmpScb = pCurHcb->HCS_FirstBusy;
- while (pTmpScb != NULL) {
- scbp_tarlun = (pTmpScb->SCB_Lun << 8) | (pTmpScb->SCB_Target);
- if (scbp_tarlun == tarlun) { /* Unlink this SCB */
- break;
- }
- pPrevScb = pTmpScb;
- pTmpScb = pTmpScb->SCB_NxtScb;
- }
-#if DEBUG_QUEUE
- printk("find busy SCB %lx; ", (ULONG) pTmpScb);
-#endif
- return (pTmpScb);
-}
-
-/***************************************************************************/
-void tul_append_done_scb(HCS * pCurHcb, SCB * scbp)
-{
-
-#if DEBUG_QUEUE
- printk("append done SCB %lx; ", (ULONG) scbp);
-#endif
-
- scbp->SCB_Status = SCB_DONE;
- scbp->SCB_NxtScb = NULL;
- if (pCurHcb->HCS_LastDone != NULL) {
- pCurHcb->HCS_LastDone->SCB_NxtScb = scbp;
- pCurHcb->HCS_LastDone = scbp;
- } else {
- pCurHcb->HCS_FirstDone = scbp;
- pCurHcb->HCS_LastDone = scbp;
- }
-}
-
-/***************************************************************************/
-SCB *tul_find_done_scb(HCS * pCurHcb)
-{
- SCB *pTmpScb;
-
-
- if ((pTmpScb = pCurHcb->HCS_FirstDone) != NULL) {
- if ((pCurHcb->HCS_FirstDone = pTmpScb->SCB_NxtScb) == NULL)
- pCurHcb->HCS_LastDone = NULL;
- pTmpScb->SCB_NxtScb = NULL;
- }
-#if DEBUG_QUEUE
- printk("find done SCB %lx; ", (ULONG) pTmpScb);
-#endif
- return (pTmpScb);
-}
-
-/***************************************************************************/
-int tul_abort_srb(HCS * pCurHcb, ULONG srbp)
-{
- ULONG flags;
- SCB *pTmpScb, *pPrevScb;
-
- spin_lock_irqsave(&(pCurHcb->HCS_SemaphLock), flags);
-
- if ((pCurHcb->HCS_Semaph == 0) && (pCurHcb->HCS_ActScb == NULL)) {
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x1F);
- /* disable Jasmin SCSI Int */
-
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
-
- tulip_main(pCurHcb);
-
- spin_lock_irqsave(&(pCurHcb->HCS_SemaphLock), flags);
-
- pCurHcb->HCS_Semaph = 1;
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x0F);
-
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
-
- return SCSI_ABORT_SNOOZE;
- }
- pPrevScb = pTmpScb = pCurHcb->HCS_FirstPend; /* Check Pend queue */
- while (pTmpScb != NULL) {
- /* 07/27/98 */
- if (pTmpScb->SCB_Srb == (unsigned char *) srbp) {
- if (pTmpScb == pCurHcb->HCS_ActScb) {
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
- return SCSI_ABORT_BUSY;
- } else if (pTmpScb == pCurHcb->HCS_FirstPend) {
- if ((pCurHcb->HCS_FirstPend = pTmpScb->SCB_NxtScb) == NULL)
- pCurHcb->HCS_LastPend = NULL;
- } else {
- pPrevScb->SCB_NxtScb = pTmpScb->SCB_NxtScb;
- if (pTmpScb == pCurHcb->HCS_LastPend)
- pCurHcb->HCS_LastPend = pPrevScb;
- }
- pTmpScb->SCB_HaStat = HOST_ABORTED;
- pTmpScb->SCB_Flags |= SCF_DONE;
- if (pTmpScb->SCB_Flags & SCF_POST)
- (*pTmpScb->SCB_Post) ((BYTE *) pCurHcb, (BYTE *) pTmpScb);
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
- return SCSI_ABORT_SUCCESS;
- }
- pPrevScb = pTmpScb;
- pTmpScb = pTmpScb->SCB_NxtScb;
- }
-
- pPrevScb = pTmpScb = pCurHcb->HCS_FirstBusy; /* Check Busy queue */
- while (pTmpScb != NULL) {
-
- if (pTmpScb->SCB_Srb == (unsigned char *) srbp) {
-
- if (pTmpScb == pCurHcb->HCS_ActScb) {
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
- return SCSI_ABORT_BUSY;
- } else if (pTmpScb->SCB_TagMsg == 0) {
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
- return SCSI_ABORT_BUSY;
- } else {
- pCurHcb->HCS_ActTags[pTmpScb->SCB_Target]--;
- if (pTmpScb == pCurHcb->HCS_FirstBusy) {
- if ((pCurHcb->HCS_FirstBusy = pTmpScb->SCB_NxtScb) == NULL)
- pCurHcb->HCS_LastBusy = NULL;
- } else {
- pPrevScb->SCB_NxtScb = pTmpScb->SCB_NxtScb;
- if (pTmpScb == pCurHcb->HCS_LastBusy)
- pCurHcb->HCS_LastBusy = pPrevScb;
- }
- pTmpScb->SCB_NxtScb = NULL;
-
-
- pTmpScb->SCB_HaStat = HOST_ABORTED;
- pTmpScb->SCB_Flags |= SCF_DONE;
- if (pTmpScb->SCB_Flags & SCF_POST)
- (*pTmpScb->SCB_Post) ((BYTE *) pCurHcb, (BYTE *) pTmpScb);
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
- return SCSI_ABORT_SUCCESS;
- }
- }
- pPrevScb = pTmpScb;
- pTmpScb = pTmpScb->SCB_NxtScb;
- }
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
- return (SCSI_ABORT_NOT_RUNNING);
-}
-
-/***************************************************************************/
-int tul_bad_seq(HCS * pCurHcb)
-{
- SCB *pCurScb;
-
- printk("tul_bad_seg c=%d\n", pCurHcb->HCS_Index);
-
- if ((pCurScb = pCurHcb->HCS_ActScb) != NULL) {
- tul_unlink_busy_scb(pCurHcb, pCurScb);
- pCurScb->SCB_HaStat = HOST_BAD_PHAS;
- pCurScb->SCB_TaStat = 0;
- tul_append_done_scb(pCurHcb, pCurScb);
- }
- tul_stop_bm(pCurHcb);
-
- tul_reset_scsi(pCurHcb, 8); /* 7/29/98 */
-
- return (tul_post_scsi_rst(pCurHcb));
-}
-
-/************************************************************************/
-int tul_device_reset(HCS * pCurHcb, ULONG pSrb, unsigned int target, unsigned int ResetFlags)
-{
- ULONG flags;
- SCB *pScb;
- spin_lock_irqsave(&(pCurHcb->HCS_SemaphLock), flags);
-
- if (ResetFlags & SCSI_RESET_ASYNCHRONOUS) {
-
- if ((pCurHcb->HCS_Semaph == 0) && (pCurHcb->HCS_ActScb == NULL)) {
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x1F);
- /* disable Jasmin SCSI Int */
-
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
-
- tulip_main(pCurHcb);
-
- spin_lock_irqsave(&(pCurHcb->HCS_SemaphLock), flags);
-
- pCurHcb->HCS_Semaph = 1;
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x0F);
-
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
-
- return SCSI_RESET_SNOOZE;
- }
- pScb = pCurHcb->HCS_FirstBusy; /* Check Busy queue */
- while (pScb != NULL) {
- if (pScb->SCB_Srb == (unsigned char *) pSrb)
- break;
- pScb = pScb->SCB_NxtScb;
- }
- if (pScb == NULL) {
- printk("Unable to Reset - No SCB Found\n");
-
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
- return SCSI_RESET_NOT_RUNNING;
- }
- }
- if ((pScb = tul_alloc_scb(pCurHcb)) == NULL) {
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
- return SCSI_RESET_NOT_RUNNING;
- }
- pScb->SCB_Opcode = BusDevRst;
- pScb->SCB_Flags = SCF_POST;
- pScb->SCB_Target = target;
- pScb->SCB_Mode = 0;
-
- pScb->SCB_Srb = 0;
- if (ResetFlags & SCSI_RESET_SYNCHRONOUS) {
- pScb->SCB_Srb = (unsigned char *) pSrb;
- }
- tul_push_pend_scb(pCurHcb, pScb); /* push this SCB to Pending queue */
-
- if (pCurHcb->HCS_Semaph == 1) {
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x1F);
- /* disable Jasmin SCSI Int */
- pCurHcb->HCS_Semaph = 0;
-
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
-
- tulip_main(pCurHcb);
-
- spin_lock_irqsave(&(pCurHcb->HCS_SemaphLock), flags);
-
- pCurHcb->HCS_Semaph = 1;
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x0F);
- }
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
- return SCSI_RESET_PENDING;
-}
-
-int tul_reset_scsi_bus(HCS * pCurHcb)
-{
- ULONG flags;
-
- spin_lock_irqsave(&(pCurHcb->HCS_SemaphLock), flags);
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x1F);
- pCurHcb->HCS_Semaph = 0;
-
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
-
- tul_stop_bm(pCurHcb);
-
- tul_reset_scsi(pCurHcb, 2); /* 7/29/98 */
-
- spin_lock_irqsave(&(pCurHcb->HCS_SemaphLock), flags);
- tul_post_scsi_rst(pCurHcb);
-
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
-
- tulip_main(pCurHcb);
-
- spin_lock_irqsave(&(pCurHcb->HCS_SemaphLock), flags);
-
- pCurHcb->HCS_Semaph = 1;
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x0F);
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
- return (SCSI_RESET_SUCCESS | SCSI_RESET_HOST_RESET);
-}
-
-/************************************************************************/
-void tul_exec_scb(HCS * pCurHcb, SCB * pCurScb)
-{
- ULONG flags;
-
- pCurScb->SCB_Mode = 0;
-
- pCurScb->SCB_SGIdx = 0;
- pCurScb->SCB_SGMax = pCurScb->SCB_SGLen;
-
- spin_lock_irqsave(&(pCurHcb->HCS_SemaphLock), flags);
-
- tul_append_pend_scb(pCurHcb, pCurScb); /* Append this SCB to Pending queue */
-
-/* VVVVV 07/21/98 */
- if (pCurHcb->HCS_Semaph == 1) {
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x1F);
- /* disable Jasmin SCSI Int */
- pCurHcb->HCS_Semaph = 0;
-
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
-
- tulip_main(pCurHcb);
-
- spin_lock_irqsave(&(pCurHcb->HCS_SemaphLock), flags);
-
- pCurHcb->HCS_Semaph = 1;
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x0F);
- }
- spin_unlock_irqrestore(&(pCurHcb->HCS_SemaphLock), flags);
- return;
-}
-
-/***************************************************************************/
-int tul_isr(HCS * pCurHcb)
-{
- /* Enter critical section */
-
- if (TUL_RD(pCurHcb->HCS_Base, TUL_Int) & TSS_INT_PENDING) {
- if (pCurHcb->HCS_Semaph == 1) {
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x1F);
- /* Disable Tulip SCSI Int */
- pCurHcb->HCS_Semaph = 0;
-
- tulip_main(pCurHcb);
-
- pCurHcb->HCS_Semaph = 1;
- TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x0F);
- return (1);
- }
- }
- return (0);
-}
-
-/***************************************************************************/
-int tulip_main(HCS * pCurHcb)
-{
- SCB *pCurScb;
-
- for (;;) {
-
- tulip_scsi(pCurHcb); /* Call tulip_scsi */
-
- while ((pCurScb = tul_find_done_scb(pCurHcb)) != NULL) { /* find done entry */
- if (pCurScb->SCB_TaStat == QUEUE_FULL) {
- pCurHcb->HCS_MaxTags[pCurScb->SCB_Target] =
- pCurHcb->HCS_ActTags[pCurScb->SCB_Target] - 1;
- pCurScb->SCB_TaStat = 0;
- tul_append_pend_scb(pCurHcb, pCurScb);
- continue;
- }
- if (!(pCurScb->SCB_Mode & SCM_RSENS)) { /* not in auto req. sense mode */
- if (pCurScb->SCB_TaStat == 2) {
-
- /* clr sync. nego flag */
-
- if (pCurScb->SCB_Flags & SCF_SENSE) {
- BYTE len;
- len = pCurScb->SCB_SenseLen;
- if (len == 0)
- len = 1;
- pCurScb->SCB_BufLen = pCurScb->SCB_SenseLen;
- pCurScb->SCB_BufPtr = pCurScb->SCB_SensePtr;
- pCurScb->SCB_Flags &= ~(SCF_SG | SCF_DIR); /* for xfer_data_in */
-/* pCurScb->SCB_Flags |= SCF_NO_DCHK; */
- /* so, we won't report worng direction in xfer_data_in,
- and won't report HOST_DO_DU in state_6 */
- pCurScb->SCB_Mode = SCM_RSENS;
- pCurScb->SCB_Ident &= 0xBF; /* Disable Disconnect */
- pCurScb->SCB_TagMsg = 0;
- pCurScb->SCB_TaStat = 0;
- pCurScb->SCB_CDBLen = 6;
- pCurScb->SCB_CDB[0] = SCSICMD_RequestSense;
- pCurScb->SCB_CDB[1] = 0;
- pCurScb->SCB_CDB[2] = 0;
- pCurScb->SCB_CDB[3] = 0;
- pCurScb->SCB_CDB[4] = len;
- pCurScb->SCB_CDB[5] = 0;
- tul_push_pend_scb(pCurHcb, pCurScb);
- break;
- }
- }
- } else { /* in request sense mode */
-
- if (pCurScb->SCB_TaStat == 2) { /* check contition status again after sending
- requset sense cmd 0x3 */
- pCurScb->SCB_HaStat = HOST_BAD_PHAS;
- }
- pCurScb->SCB_TaStat = 2;
- }
- pCurScb->SCB_Flags |= SCF_DONE;
- if (pCurScb->SCB_Flags & SCF_POST) {
- (*pCurScb->SCB_Post) ((BYTE *) pCurHcb, (BYTE *) pCurScb);
- }
- } /* while */
-
- /* find_active: */
- if (TUL_RD(pCurHcb->HCS_Base, TUL_SStatus0) & TSS_INT_PENDING)
- continue;
-
- if (pCurHcb->HCS_ActScb) { /* return to OS and wait for xfer_done_ISR/Selected_ISR */
- return 1; /* return to OS, enable interrupt */
- }
- /* Check pending SCB */
- if (tul_find_first_pend_scb(pCurHcb) == NULL) {
- return 1; /* return to OS, enable interrupt */
- }
- } /* End of for loop */
- /* statement won't reach here */
-}
-
-
-
-
-/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ */
-/***************************************************************************/
-/***************************************************************************/
-/***************************************************************************/
-/***************************************************************************/
-
-/***************************************************************************/
-void tulip_scsi(HCS * pCurHcb)
-{
- SCB *pCurScb;
- TCS *pCurTcb;
-
- /* make sure to service interrupt asap */
-
- if ((pCurHcb->HCS_JSStatus0 = TUL_RD(pCurHcb->HCS_Base, TUL_SStatus0)) & TSS_INT_PENDING) {
-
- pCurHcb->HCS_Phase = pCurHcb->HCS_JSStatus0 & TSS_PH_MASK;
- pCurHcb->HCS_JSStatus1 = TUL_RD(pCurHcb->HCS_Base, TUL_SStatus1);
- pCurHcb->HCS_JSInt = TUL_RD(pCurHcb->HCS_Base, TUL_SInt);
- if (pCurHcb->HCS_JSInt & TSS_SCSIRST_INT) { /* SCSI bus reset detected */
- int_tul_scsi_rst(pCurHcb);
- return;
- }
- if (pCurHcb->HCS_JSInt & TSS_RESEL_INT) { /* if selected/reselected interrupt */
- if (int_tul_resel(pCurHcb) == 0)
- tul_next_state(pCurHcb);
- return;
- }
- if (pCurHcb->HCS_JSInt & TSS_SEL_TIMEOUT) {
- int_tul_busfree(pCurHcb);
- return;
- }
- if (pCurHcb->HCS_JSInt & TSS_DISC_INT) { /* BUS disconnection */
- int_tul_busfree(pCurHcb); /* unexpected bus free or sel timeout */
- return;
- }
- if (pCurHcb->HCS_JSInt & (TSS_FUNC_COMP | TSS_BUS_SERV)) { /* func complete or Bus service */
- if ((pCurScb = pCurHcb->HCS_ActScb) != NULL)
- tul_next_state(pCurHcb);
- return;
- }
- }
- if (pCurHcb->HCS_ActScb != NULL)
- return;
-
- if ((pCurScb = tul_find_first_pend_scb(pCurHcb)) == NULL)
- return;
-
- /* program HBA's SCSI ID & target SCSI ID */
- TUL_WR(pCurHcb->HCS_Base + TUL_SScsiId,
- (pCurHcb->HCS_SCSI_ID << 4) | (pCurScb->SCB_Target & 0x0F));
- if (pCurScb->SCB_Opcode == ExecSCSI) {
- pCurTcb = &pCurHcb->HCS_Tcs[pCurScb->SCB_Target];
-
- if (pCurScb->SCB_TagMsg)
- pCurTcb->TCS_DrvFlags |= TCF_DRV_EN_TAG;
- else
- pCurTcb->TCS_DrvFlags &= ~TCF_DRV_EN_TAG;
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SPeriod, pCurTcb->TCS_JS_Period);
- if ((pCurTcb->TCS_Flags & (TCF_WDTR_DONE | TCF_NO_WDTR)) == 0) { /* do wdtr negotiation */
- tul_select_atn_stop(pCurHcb, pCurScb);
- } else {
- if ((pCurTcb->TCS_Flags & (TCF_SYNC_DONE | TCF_NO_SYNC_NEGO)) == 0) { /* do sync negotiation */
- tul_select_atn_stop(pCurHcb, pCurScb);
- } else {
- if (pCurScb->SCB_TagMsg)
- tul_select_atn3(pCurHcb, pCurScb);
- else
- tul_select_atn(pCurHcb, pCurScb);
- }
- }
- if (pCurScb->SCB_Flags & SCF_POLL) {
- while (wait_tulip(pCurHcb) != -1) {
- if (tul_next_state(pCurHcb) == -1)
- break;
- }
- }
- } else if (pCurScb->SCB_Opcode == BusDevRst) {
- tul_select_atn_stop(pCurHcb, pCurScb);
- pCurScb->SCB_NxtStat = 8;
- if (pCurScb->SCB_Flags & SCF_POLL) {
- while (wait_tulip(pCurHcb) != -1) {
- if (tul_next_state(pCurHcb) == -1)
- break;
- }
- }
- } else if (pCurScb->SCB_Opcode == AbortCmd) {
- ULONG srbp;
-
- srbp = (ULONG) pCurScb->SCB_Srb;
-/* 08/03/98 */
- if (tul_abort_srb(pCurHcb, srbp) != 0) {
-
-
- tul_unlink_pend_scb(pCurHcb, pCurScb);
-
- tul_release_scb(pCurHcb, pCurScb);
- } else {
- pCurScb->SCB_Opcode = BusDevRst;
- tul_select_atn_stop(pCurHcb, pCurScb);
- pCurScb->SCB_NxtStat = 8;
- }
-
-/* 08/03/98 */
- } else {
- tul_unlink_pend_scb(pCurHcb, pCurScb);
- pCurScb->SCB_HaStat = 0x16; /* bad command */
- tul_append_done_scb(pCurHcb, pCurScb);
- }
- return;
-}
-
-
-/***************************************************************************/
-int tul_next_state(HCS * pCurHcb)
-{
- int next;
-
- next = pCurHcb->HCS_ActScb->SCB_NxtStat;
- for (;;) {
- switch (next) {
- case 1:
- next = tul_state_1(pCurHcb);
- break;
- case 2:
- next = tul_state_2(pCurHcb);
- break;
- case 3:
- next = tul_state_3(pCurHcb);
- break;
- case 4:
- next = tul_state_4(pCurHcb);
- break;
- case 5:
- next = tul_state_5(pCurHcb);
- break;
- case 6:
- next = tul_state_6(pCurHcb);
- break;
- case 7:
- next = tul_state_7(pCurHcb);
- break;
- case 8:
- return (tul_bus_device_reset(pCurHcb));
- default:
- return (tul_bad_seq(pCurHcb));
- }
- if (next <= 0)
- return next;
- }
-}
-
-
-/***************************************************************************/
-/* sTate after selection with attention & stop */
-int tul_state_1(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
- TCS *pCurTcb = pCurHcb->HCS_ActTcs;
-#if DEBUG_STATE
- printk("-s1-");
-#endif
-
- tul_unlink_pend_scb(pCurHcb, pCurScb);
- tul_append_busy_scb(pCurHcb, pCurScb);
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, pCurTcb->TCS_SConfig0);
- /* ATN on */
- if (pCurHcb->HCS_Phase == MSG_OUT) {
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl1, (TSC_EN_BUS_IN | TSC_HW_RESELECT));
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurScb->SCB_Ident);
-
- if (pCurScb->SCB_TagMsg) {
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurScb->SCB_TagMsg);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurScb->SCB_TagId);
- }
- if ((pCurTcb->TCS_Flags & (TCF_WDTR_DONE | TCF_NO_WDTR)) == 0) {
-
- pCurTcb->TCS_Flags |= TCF_WDTR_DONE;
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_EXTEND);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 2); /* Extended msg length */
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 3); /* Sync request */
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 1); /* Start from 16 bits */
- } else if ((pCurTcb->TCS_Flags & (TCF_SYNC_DONE | TCF_NO_SYNC_NEGO)) == 0) {
-
- pCurTcb->TCS_Flags |= TCF_SYNC_DONE;
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_EXTEND);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 3); /* extended msg length */
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 1); /* sync request */
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, tul_rate_tbl[pCurTcb->TCS_Flags & TCF_SCSI_RATE]);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MAX_OFFSET); /* REQ/ACK offset */
- }
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- if (wait_tulip(pCurHcb) == -1)
- return (-1);
- }
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, (TUL_RD(pCurHcb->HCS_Base, TUL_SSignal) & (TSC_SET_ACK | 7)));
- return (3);
-}
-
-
-/***************************************************************************/
-/* state after selection with attention */
-/* state after selection with attention3 */
-int tul_state_2(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
- TCS *pCurTcb = pCurHcb->HCS_ActTcs;
-#if DEBUG_STATE
- printk("-s2-");
-#endif
-
- tul_unlink_pend_scb(pCurHcb, pCurScb);
- tul_append_busy_scb(pCurHcb, pCurScb);
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, pCurTcb->TCS_SConfig0);
-
- if (pCurHcb->HCS_JSStatus1 & TSS_CMD_PH_CMP) {
- return (4);
- }
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, (TUL_RD(pCurHcb->HCS_Base, TUL_SSignal) & (TSC_SET_ACK | 7)));
- return (3);
-}
-
-/***************************************************************************/
-/* state before CDB xfer is done */
-int tul_state_3(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
- TCS *pCurTcb = pCurHcb->HCS_ActTcs;
- int i;
-
-#if DEBUG_STATE
- printk("-s3-");
-#endif
- for (;;) {
- switch (pCurHcb->HCS_Phase) {
- case CMD_OUT: /* Command out phase */
- for (i = 0; i < (int) pCurScb->SCB_CDBLen; i++)
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurScb->SCB_CDB[i]);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- if (wait_tulip(pCurHcb) == -1)
- return (-1);
- if (pCurHcb->HCS_Phase == CMD_OUT) {
- return (tul_bad_seq(pCurHcb));
- }
- return (4);
-
- case MSG_IN: /* Message in phase */
- pCurScb->SCB_NxtStat = 3;
- if (tul_msgin(pCurHcb) == -1)
- return (-1);
- break;
-
- case STATUS_IN: /* Status phase */
- if (tul_status_msg(pCurHcb) == -1)
- return (-1);
- break;
-
- case MSG_OUT: /* Message out phase */
- if (pCurTcb->TCS_Flags & (TCF_SYNC_DONE | TCF_NO_SYNC_NEGO)) {
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_NOP); /* msg nop */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- if (wait_tulip(pCurHcb) == -1)
- return (-1);
-
- } else {
- pCurTcb->TCS_Flags |= TCF_SYNC_DONE;
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_EXTEND);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 3); /* ext. msg len */
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 1); /* sync request */
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, tul_rate_tbl[pCurTcb->TCS_Flags & TCF_SCSI_RATE]);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MAX_OFFSET); /* REQ/ACK offset */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- if (wait_tulip(pCurHcb) == -1)
- return (-1);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, TUL_RD(pCurHcb->HCS_Base, TUL_SSignal) & (TSC_SET_ACK | 7));
-
- }
- break;
-
- default:
- return (tul_bad_seq(pCurHcb));
- }
- }
-}
-
-
-/***************************************************************************/
-int tul_state_4(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
-
-#if DEBUG_STATE
- printk("-s4-");
-#endif
- if ((pCurScb->SCB_Flags & SCF_DIR) == SCF_NO_XF) {
- return (6); /* Go to state 6 */
- }
- for (;;) {
- if (pCurScb->SCB_BufLen == 0)
- return (6); /* Go to state 6 */
-
- switch (pCurHcb->HCS_Phase) {
-
- case STATUS_IN: /* Status phase */
- if ((pCurScb->SCB_Flags & SCF_DIR) != 0) { /* if direction bit set then report data underrun */
- pCurScb->SCB_HaStat = HOST_DO_DU;
- }
- if ((tul_status_msg(pCurHcb)) == -1)
- return (-1);
- break;
-
- case MSG_IN: /* Message in phase */
- pCurScb->SCB_NxtStat = 0x4;
- if (tul_msgin(pCurHcb) == -1)
- return (-1);
- break;
-
- case MSG_OUT: /* Message out phase */
- if (pCurHcb->HCS_JSStatus0 & TSS_PAR_ERROR) {
- pCurScb->SCB_BufLen = 0;
- pCurScb->SCB_HaStat = HOST_DO_DU;
- if (tul_msgout_ide(pCurHcb) == -1)
- return (-1);
- return (6); /* Go to state 6 */
- } else {
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_NOP); /* msg nop */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- if (wait_tulip(pCurHcb) == -1)
- return (-1);
- }
- break;
-
- case DATA_IN: /* Data in phase */
- return (tul_xfer_data_in(pCurHcb));
-
- case DATA_OUT: /* Data out phase */
- return (tul_xfer_data_out(pCurHcb));
-
- default:
- return (tul_bad_seq(pCurHcb));
- }
- }
-}
-
-
-/***************************************************************************/
-/* state after dma xfer done or phase change before xfer done */
-int tul_state_5(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
- long cnt, xcnt; /* cannot use unsigned !! code: if (xcnt < 0) */
-
-#if DEBUG_STATE
- printk("-s5-");
-#endif
-/*------ get remaining count -------*/
-
- cnt = TUL_RDLONG(pCurHcb->HCS_Base, TUL_SCnt0) & 0x0FFFFFF;
-
- if (TUL_RD(pCurHcb->HCS_Base, TUL_XCmd) & 0x20) {
- /* ----------------------- DATA_IN ----------------------------- */
- /* check scsi parity error */
- if (pCurHcb->HCS_JSStatus0 & TSS_PAR_ERROR) {
- pCurScb->SCB_HaStat = HOST_DO_DU;
- }
- if (TUL_RD(pCurHcb->HCS_Base, TUL_XStatus) & XPEND) { /* DMA xfer pending, Send STOP */
- /* tell Hardware scsi xfer has been terminated */
- TUL_WR(pCurHcb->HCS_Base + TUL_XCtrl, TUL_RD(pCurHcb->HCS_Base, TUL_XCtrl) | 0x80);
- /* wait until DMA xfer not pending */
- while (TUL_RD(pCurHcb->HCS_Base, TUL_XStatus) & XPEND);
- }
- } else {
-/*-------- DATA OUT -----------*/
- if ((TUL_RD(pCurHcb->HCS_Base, TUL_SStatus1) & TSS_XFER_CMP) == 0) {
- if (pCurHcb->HCS_ActTcs->TCS_JS_Period & TSC_WIDE_SCSI)
- cnt += (TUL_RD(pCurHcb->HCS_Base, TUL_SFifoCnt) & 0x1F) << 1;
- else
- cnt += (TUL_RD(pCurHcb->HCS_Base, TUL_SFifoCnt) & 0x1F);
- }
- if (TUL_RD(pCurHcb->HCS_Base, TUL_XStatus) & XPEND) { /* if DMA xfer is pending, abort DMA xfer */
- TUL_WR(pCurHcb->HCS_Base + TUL_XCmd, TAX_X_ABT);
- /* wait Abort DMA xfer done */
- while ((TUL_RD(pCurHcb->HCS_Base, TUL_Int) & XABT) == 0);
- }
- if ((cnt == 1) && (pCurHcb->HCS_Phase == DATA_OUT)) {
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- if (wait_tulip(pCurHcb) == -1) {
- return (-1);
- }
- cnt = 0;
- } else {
- if ((TUL_RD(pCurHcb->HCS_Base, TUL_SStatus1) & TSS_XFER_CMP) == 0)
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
- }
- }
-
- if (cnt == 0) {
- pCurScb->SCB_BufLen = 0;
- return (6); /* Go to state 6 */
- }
- /* Update active data pointer */
- xcnt = (long) pCurScb->SCB_BufLen - cnt; /* xcnt== bytes already xferred */
- pCurScb->SCB_BufLen = (U32) cnt; /* cnt == bytes left to be xferred */
- if (pCurScb->SCB_Flags & SCF_SG) {
- register SG *sgp;
- ULONG i;
-
- sgp = &pCurScb->SCB_SGList[pCurScb->SCB_SGIdx];
- for (i = pCurScb->SCB_SGIdx; i < pCurScb->SCB_SGMax; sgp++, i++) {
- xcnt -= (long) sgp->SG_Len;
- if (xcnt < 0) { /* this sgp xfer half done */
- xcnt += (long) sgp->SG_Len; /* xcnt == bytes xferred in this sgp */
- sgp->SG_Ptr += (U32) xcnt; /* new ptr to be xfer */
- sgp->SG_Len -= (U32) xcnt; /* new len to be xfer */
- pCurScb->SCB_BufPtr += ((U32) (i - pCurScb->SCB_SGIdx) << 3);
- /* new SG table ptr */
- pCurScb->SCB_SGLen = (BYTE) (pCurScb->SCB_SGMax - i);
- /* new SG table len */
- pCurScb->SCB_SGIdx = (WORD) i;
- /* for next disc and come in this loop */
- return (4); /* Go to state 4 */
- }
- /* else (xcnt >= 0 , i.e. this sgp already xferred */
- } /* for */
- return (6); /* Go to state 6 */
- } else {
- pCurScb->SCB_BufPtr += (U32) xcnt;
- }
- return (4); /* Go to state 4 */
-}
-
-/***************************************************************************/
-/* state after Data phase */
-int tul_state_6(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
-
-#if DEBUG_STATE
- printk("-s6-");
-#endif
- for (;;) {
- switch (pCurHcb->HCS_Phase) {
- case STATUS_IN: /* Status phase */
- if ((tul_status_msg(pCurHcb)) == -1)
- return (-1);
- break;
-
- case MSG_IN: /* Message in phase */
- pCurScb->SCB_NxtStat = 6;
- if ((tul_msgin(pCurHcb)) == -1)
- return (-1);
- break;
-
- case MSG_OUT: /* Message out phase */
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_NOP); /* msg nop */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- if (wait_tulip(pCurHcb) == -1)
- return (-1);
- break;
-
- case DATA_IN: /* Data in phase */
- return (tul_xpad_in(pCurHcb));
-
- case DATA_OUT: /* Data out phase */
- return (tul_xpad_out(pCurHcb));
-
- default:
- return (tul_bad_seq(pCurHcb));
- }
- }
-}
-
-/***************************************************************************/
-int tul_state_7(HCS * pCurHcb)
-{
- int cnt, i;
-
-#if DEBUG_STATE
- printk("-s7-");
-#endif
- /* flush SCSI FIFO */
- cnt = TUL_RD(pCurHcb->HCS_Base, TUL_SFifoCnt) & 0x1F;
- if (cnt) {
- for (i = 0; i < cnt; i++)
- TUL_RD(pCurHcb->HCS_Base, TUL_SFifo);
- }
- switch (pCurHcb->HCS_Phase) {
- case DATA_IN: /* Data in phase */
- case DATA_OUT: /* Data out phase */
- return (tul_bad_seq(pCurHcb));
- default:
- return (6); /* Go to state 6 */
- }
-}
-
-/***************************************************************************/
-int tul_xfer_data_in(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
-
- if ((pCurScb->SCB_Flags & SCF_DIR) == SCF_DOUT) {
- return (6); /* wrong direction */
- }
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_SCnt0, pCurScb->SCB_BufLen);
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_DMA_IN); /* 7/25/95 */
-
- if (pCurScb->SCB_Flags & SCF_SG) { /* S/G xfer */
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_XCntH, ((ULONG) pCurScb->SCB_SGLen) << 3);
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_XAddH, pCurScb->SCB_BufPtr);
- TUL_WR(pCurHcb->HCS_Base + TUL_XCmd, TAX_SG_IN);
- } else {
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_XCntH, pCurScb->SCB_BufLen);
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_XAddH, pCurScb->SCB_BufPtr);
- TUL_WR(pCurHcb->HCS_Base + TUL_XCmd, TAX_X_IN);
- }
- pCurScb->SCB_NxtStat = 0x5;
- return (0); /* return to OS, wait xfer done , let jas_isr come in */
-}
-
-
-/***************************************************************************/
-int tul_xfer_data_out(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
-
- if ((pCurScb->SCB_Flags & SCF_DIR) == SCF_DIN) {
- return (6); /* wrong direction */
- }
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_SCnt0, pCurScb->SCB_BufLen);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_DMA_OUT);
-
- if (pCurScb->SCB_Flags & SCF_SG) { /* S/G xfer */
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_XCntH, ((ULONG) pCurScb->SCB_SGLen) << 3);
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_XAddH, pCurScb->SCB_BufPtr);
- TUL_WR(pCurHcb->HCS_Base + TUL_XCmd, TAX_SG_OUT);
- } else {
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_XCntH, pCurScb->SCB_BufLen);
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_XAddH, pCurScb->SCB_BufPtr);
- TUL_WR(pCurHcb->HCS_Base + TUL_XCmd, TAX_X_OUT);
- }
-
- pCurScb->SCB_NxtStat = 0x5;
- return (0); /* return to OS, wait xfer done , let jas_isr come in */
-}
-
-
-/***************************************************************************/
-int tul_xpad_in(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
- TCS *pCurTcb = pCurHcb->HCS_ActTcs;
-
- if ((pCurScb->SCB_Flags & SCF_DIR) != SCF_NO_DCHK) {
- pCurScb->SCB_HaStat = HOST_DO_DU; /* over run */
- }
- for (;;) {
- if (pCurTcb->TCS_JS_Period & TSC_WIDE_SCSI)
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_SCnt0, 2);
- else
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_SCnt0, 1);
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_IN);
- if ((wait_tulip(pCurHcb)) == -1) {
- return (-1);
- }
- if (pCurHcb->HCS_Phase != DATA_IN) {
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
- return (6);
- }
- TUL_RD(pCurHcb->HCS_Base, TUL_SFifo);
- }
-}
-
-int tul_xpad_out(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
- TCS *pCurTcb = pCurHcb->HCS_ActTcs;
-
- if ((pCurScb->SCB_Flags & SCF_DIR) != SCF_NO_DCHK) {
- pCurScb->SCB_HaStat = HOST_DO_DU; /* over run */
- }
- for (;;) {
- if (pCurTcb->TCS_JS_Period & TSC_WIDE_SCSI)
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_SCnt0, 2);
- else
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_SCnt0, 1);
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 0);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- if ((wait_tulip(pCurHcb)) == -1) {
- return (-1);
- }
- if (pCurHcb->HCS_Phase != DATA_OUT) { /* Disable wide CPU to allow read 16 bits */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl1, TSC_HW_RESELECT);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
- return (6);
- }
- }
-}
-
-
-/***************************************************************************/
-int tul_status_msg(HCS * pCurHcb)
-{ /* status & MSG_IN */
- SCB *pCurScb = pCurHcb->HCS_ActScb;
- BYTE msg;
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_CMD_COMP);
- if ((wait_tulip(pCurHcb)) == -1) {
- return (-1);
- }
- /* get status */
- pCurScb->SCB_TaStat = TUL_RD(pCurHcb->HCS_Base, TUL_SFifo);
-
- if (pCurHcb->HCS_Phase == MSG_OUT) {
- if (pCurHcb->HCS_JSStatus0 & TSS_PAR_ERROR) {
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_PARITY);
- } else {
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_NOP);
- }
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- return (wait_tulip(pCurHcb));
- }
- if (pCurHcb->HCS_Phase == MSG_IN) {
- msg = TUL_RD(pCurHcb->HCS_Base, TUL_SFifo);
- if (pCurHcb->HCS_JSStatus0 & TSS_PAR_ERROR) { /* Parity error */
- if ((tul_msgin_accept(pCurHcb)) == -1)
- return (-1);
- if (pCurHcb->HCS_Phase != MSG_OUT)
- return (tul_bad_seq(pCurHcb));
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_PARITY);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- return (wait_tulip(pCurHcb));
- }
- if (msg == 0) { /* Command complete */
-
- if ((pCurScb->SCB_TaStat & 0x18) == 0x10) { /* No link support */
- return (tul_bad_seq(pCurHcb));
- }
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_MSG_ACCEPT);
- return tul_wait_done_disc(pCurHcb);
-
- }
- if ((msg == MSG_LINK_COMP) || (msg == MSG_LINK_FLAG)) {
- if ((pCurScb->SCB_TaStat & 0x18) == 0x10)
- return (tul_msgin_accept(pCurHcb));
- }
- }
- return (tul_bad_seq(pCurHcb));
-}
-
-
-/***************************************************************************/
-/* scsi bus free */
-int int_tul_busfree(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
-
- if (pCurScb != NULL) {
- if (pCurScb->SCB_Status & SCB_SELECT) { /* selection timeout */
- tul_unlink_pend_scb(pCurHcb, pCurScb);
- pCurScb->SCB_HaStat = HOST_SEL_TOUT;
- tul_append_done_scb(pCurHcb, pCurScb);
- } else { /* Unexpected bus free */
- tul_unlink_busy_scb(pCurHcb, pCurScb);
- pCurScb->SCB_HaStat = HOST_BUS_FREE;
- tul_append_done_scb(pCurHcb, pCurScb);
- }
- pCurHcb->HCS_ActScb = NULL;
- pCurHcb->HCS_ActTcs = NULL;
- }
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO); /* Flush SCSI FIFO */
- TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, TSC_INITDEFAULT);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl1, TSC_HW_RESELECT); /* Enable HW reselect */
- return (-1);
-}
-
-
-/***************************************************************************/
-/* scsi bus reset */
-int int_tul_scsi_rst(HCS * pCurHcb)
-{
- SCB *pCurScb;
- int i;
-
- /* if DMA xfer is pending, abort DMA xfer */
- if (TUL_RD(pCurHcb->HCS_Base, TUL_XStatus) & 0x01) {
- TUL_WR(pCurHcb->HCS_Base + TUL_XCmd, TAX_X_ABT | TAX_X_CLR_FIFO);
- /* wait Abort DMA xfer done */
- while ((TUL_RD(pCurHcb->HCS_Base, TUL_Int) & 0x04) == 0);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
- }
- /* Abort all active & disconnected scb */
- while ((pCurScb = tul_pop_busy_scb(pCurHcb)) != NULL) {
- pCurScb->SCB_HaStat = HOST_BAD_PHAS;
- tul_append_done_scb(pCurHcb, pCurScb);
- }
- pCurHcb->HCS_ActScb = NULL;
- pCurHcb->HCS_ActTcs = NULL;
-
- /* clr sync nego. done flag */
- for (i = 0; i < pCurHcb->HCS_MaxTar; i++) {
- pCurHcb->HCS_Tcs[i].TCS_Flags &= ~(TCF_SYNC_DONE | TCF_WDTR_DONE);
- }
- return (-1);
-}
-
-
-/***************************************************************************/
-/* scsi reselection */
-int int_tul_resel(HCS * pCurHcb)
-{
- SCB *pCurScb;
- TCS *pCurTcb;
- BYTE tag, msg = 0;
- BYTE tar, lun;
-
- if ((pCurScb = pCurHcb->HCS_ActScb) != NULL) {
- if (pCurScb->SCB_Status & SCB_SELECT) { /* if waiting for selection complete */
- pCurScb->SCB_Status &= ~SCB_SELECT;
- }
- pCurHcb->HCS_ActScb = NULL;
- }
- /* --------- get target id---------------------- */
- tar = TUL_RD(pCurHcb->HCS_Base, TUL_SBusId);
- /* ------ get LUN from Identify message----------- */
- lun = TUL_RD(pCurHcb->HCS_Base, TUL_SIdent) & 0x0F;
- /* 07/22/98 from 0x1F -> 0x0F */
- pCurTcb = &pCurHcb->HCS_Tcs[tar];
- pCurHcb->HCS_ActTcs = pCurTcb;
- TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, pCurTcb->TCS_SConfig0);
- TUL_WR(pCurHcb->HCS_Base + TUL_SPeriod, pCurTcb->TCS_JS_Period);
-
-
- /* ------------- tag queueing ? ------------------- */
- if (pCurTcb->TCS_DrvFlags & TCF_DRV_EN_TAG) {
- if ((tul_msgin_accept(pCurHcb)) == -1)
- return (-1);
- if (pCurHcb->HCS_Phase != MSG_IN)
- goto no_tag;
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_SCnt0, 1);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_IN);
- if ((wait_tulip(pCurHcb)) == -1)
- return (-1);
- msg = TUL_RD(pCurHcb->HCS_Base, TUL_SFifo); /* Read Tag Message */
-
- if ((msg < MSG_STAG) || (msg > MSG_OTAG)) /* Is simple Tag */
- goto no_tag;
-
- if ((tul_msgin_accept(pCurHcb)) == -1)
- return (-1);
-
- if (pCurHcb->HCS_Phase != MSG_IN)
- goto no_tag;
-
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_SCnt0, 1);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_IN);
- if ((wait_tulip(pCurHcb)) == -1)
- return (-1);
- tag = TUL_RD(pCurHcb->HCS_Base, TUL_SFifo); /* Read Tag ID */
- pCurScb = pCurHcb->HCS_Scb + tag;
- if ((pCurScb->SCB_Target != tar) || (pCurScb->SCB_Lun != lun)) {
- return tul_msgout_abort_tag(pCurHcb);
- }
- if (pCurScb->SCB_Status != SCB_BUSY) { /* 03/24/95 */
- return tul_msgout_abort_tag(pCurHcb);
- }
- pCurHcb->HCS_ActScb = pCurScb;
- if ((tul_msgin_accept(pCurHcb)) == -1)
- return (-1);
- } else { /* No tag */
- no_tag:
- if ((pCurScb = tul_find_busy_scb(pCurHcb, tar | (lun << 8))) == NULL) {
- return tul_msgout_abort_targ(pCurHcb);
- }
- pCurHcb->HCS_ActScb = pCurScb;
- if (!(pCurTcb->TCS_DrvFlags & TCF_DRV_EN_TAG)) {
- if ((tul_msgin_accept(pCurHcb)) == -1)
- return (-1);
- }
- }
- return 0;
-}
-
-
-/***************************************************************************/
-int int_tul_bad_seq(HCS * pCurHcb)
-{ /* target wrong phase */
- SCB *pCurScb;
- int i;
-
- tul_reset_scsi(pCurHcb, 10);
-
- while ((pCurScb = tul_pop_busy_scb(pCurHcb)) != NULL) {
- pCurScb->SCB_HaStat = HOST_BAD_PHAS;
- tul_append_done_scb(pCurHcb, pCurScb);
- }
- for (i = 0; i < pCurHcb->HCS_MaxTar; i++) {
- pCurHcb->HCS_Tcs[i].TCS_Flags &= ~(TCF_SYNC_DONE | TCF_WDTR_DONE);
- }
- return (-1);
-}
-
-
-/***************************************************************************/
-int tul_msgout_abort_targ(HCS * pCurHcb)
-{
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, ((TUL_RD(pCurHcb->HCS_Base, TUL_SSignal) & (TSC_SET_ACK | 7)) | TSC_SET_ATN));
- if (tul_msgin_accept(pCurHcb) == -1)
- return (-1);
- if (pCurHcb->HCS_Phase != MSG_OUT)
- return (tul_bad_seq(pCurHcb));
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_ABORT);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
-
- return tul_wait_disc(pCurHcb);
-}
-
-/***************************************************************************/
-int tul_msgout_abort_tag(HCS * pCurHcb)
-{
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, ((TUL_RD(pCurHcb->HCS_Base, TUL_SSignal) & (TSC_SET_ACK | 7)) | TSC_SET_ATN));
- if (tul_msgin_accept(pCurHcb) == -1)
- return (-1);
- if (pCurHcb->HCS_Phase != MSG_OUT)
- return (tul_bad_seq(pCurHcb));
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_ABORT_TAG);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
-
- return tul_wait_disc(pCurHcb);
-
-}
-
-/***************************************************************************/
-int tul_msgin(HCS * pCurHcb)
-{
- TCS *pCurTcb;
-
- for (;;) {
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
-
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_SCnt0, 1);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_IN);
- if ((wait_tulip(pCurHcb)) == -1)
- return (-1);
-
- switch (TUL_RD(pCurHcb->HCS_Base, TUL_SFifo)) {
- case MSG_DISC: /* Disconnect msg */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_MSG_ACCEPT);
-
- return tul_wait_disc(pCurHcb);
-
- case MSG_SDP:
- case MSG_RESTORE:
- case MSG_NOP:
- tul_msgin_accept(pCurHcb);
- break;
-
- case MSG_REJ: /* Clear ATN first */
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal,
- (TUL_RD(pCurHcb->HCS_Base, TUL_SSignal) & (TSC_SET_ACK | 7)));
- pCurTcb = pCurHcb->HCS_ActTcs;
- if ((pCurTcb->TCS_Flags & (TCF_SYNC_DONE | TCF_NO_SYNC_NEGO)) == 0) { /* do sync nego */
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, ((TUL_RD(pCurHcb->HCS_Base, TUL_SSignal) & (TSC_SET_ACK | 7)) | TSC_SET_ATN));
- }
- tul_msgin_accept(pCurHcb);
- break;
-
- case MSG_EXTEND: /* extended msg */
- tul_msgin_extend(pCurHcb);
- break;
-
- case MSG_IGNOREWIDE:
- tul_msgin_accept(pCurHcb);
- break;
-
- /* get */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_IN);
- if (wait_tulip(pCurHcb) == -1)
- return -1;
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 0); /* put pad */
- TUL_RD(pCurHcb->HCS_Base, TUL_SFifo); /* get IGNORE field */
- TUL_RD(pCurHcb->HCS_Base, TUL_SFifo); /* get pad */
-
- tul_msgin_accept(pCurHcb);
- break;
-
- case MSG_COMP:
- {
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_MSG_ACCEPT);
- return tul_wait_done_disc(pCurHcb);
- }
- default:
- tul_msgout_reject(pCurHcb);
- break;
- }
- if (pCurHcb->HCS_Phase != MSG_IN)
- return (pCurHcb->HCS_Phase);
- }
- /* statement won't reach here */
-}
-
-
-
-
-/***************************************************************************/
-int tul_msgout_reject(HCS * pCurHcb)
-{
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, ((TUL_RD(pCurHcb->HCS_Base, TUL_SSignal) & (TSC_SET_ACK | 7)) | TSC_SET_ATN));
-
- if ((tul_msgin_accept(pCurHcb)) == -1)
- return (-1);
-
- if (pCurHcb->HCS_Phase == MSG_OUT) {
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_REJ); /* Msg reject */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- return (wait_tulip(pCurHcb));
- }
- return (pCurHcb->HCS_Phase);
-}
-
-
-
-/***************************************************************************/
-int tul_msgout_ide(HCS * pCurHcb)
-{
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_IDE); /* Initiator Detected Error */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- return (wait_tulip(pCurHcb));
-}
-
-
-/***************************************************************************/
-int tul_msgin_extend(HCS * pCurHcb)
-{
- BYTE len, idx;
-
- if (tul_msgin_accept(pCurHcb) != MSG_IN)
- return (pCurHcb->HCS_Phase);
-
- /* Get extended msg length */
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_SCnt0, 1);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_IN);
- if (wait_tulip(pCurHcb) == -1)
- return (-1);
-
- len = TUL_RD(pCurHcb->HCS_Base, TUL_SFifo);
- pCurHcb->HCS_Msg[0] = len;
- for (idx = 1; len != 0; len--) {
-
- if ((tul_msgin_accept(pCurHcb)) != MSG_IN)
- return (pCurHcb->HCS_Phase);
- TUL_WRLONG(pCurHcb->HCS_Base + TUL_SCnt0, 1);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_IN);
- if (wait_tulip(pCurHcb) == -1)
- return (-1);
- pCurHcb->HCS_Msg[idx++] = TUL_RD(pCurHcb->HCS_Base, TUL_SFifo);
- }
- if (pCurHcb->HCS_Msg[1] == 1) { /* if it's synchronous data transfer request */
- if (pCurHcb->HCS_Msg[0] != 3) /* if length is not right */
- return (tul_msgout_reject(pCurHcb));
- if (pCurHcb->HCS_ActTcs->TCS_Flags & TCF_NO_SYNC_NEGO) { /* Set OFFSET=0 to do async, nego back */
- pCurHcb->HCS_Msg[3] = 0;
- } else {
- if ((tul_msgin_sync(pCurHcb) == 0) &&
- (pCurHcb->HCS_ActTcs->TCS_Flags & TCF_SYNC_DONE)) {
- tul_sync_done(pCurHcb);
- return (tul_msgin_accept(pCurHcb));
- }
- }
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, ((TUL_RD(pCurHcb->HCS_Base, TUL_SSignal) & (TSC_SET_ACK | 7)) | TSC_SET_ATN));
- if ((tul_msgin_accept(pCurHcb)) != MSG_OUT)
- return (pCurHcb->HCS_Phase);
- /* sync msg out */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO);
-
- tul_sync_done(pCurHcb);
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_EXTEND);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 3);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 1);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurHcb->HCS_Msg[2]);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurHcb->HCS_Msg[3]);
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- return (wait_tulip(pCurHcb));
- }
- if ((pCurHcb->HCS_Msg[0] != 2) || (pCurHcb->HCS_Msg[1] != 3))
- return (tul_msgout_reject(pCurHcb));
- /* if it's WIDE DATA XFER REQ */
- if (pCurHcb->HCS_ActTcs->TCS_Flags & TCF_NO_WDTR) {
- pCurHcb->HCS_Msg[2] = 0;
- } else {
- if (pCurHcb->HCS_Msg[2] > 2) /* > 32 bits */
- return (tul_msgout_reject(pCurHcb));
- if (pCurHcb->HCS_Msg[2] == 2) { /* == 32 */
- pCurHcb->HCS_Msg[2] = 1;
- } else {
- if ((pCurHcb->HCS_ActTcs->TCS_Flags & TCF_NO_WDTR) == 0) {
- wdtr_done(pCurHcb);
- if ((pCurHcb->HCS_ActTcs->TCS_Flags & (TCF_SYNC_DONE | TCF_NO_SYNC_NEGO)) == 0)
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, ((TUL_RD(pCurHcb->HCS_Base, TUL_SSignal) & (TSC_SET_ACK | 7)) | TSC_SET_ATN));
- return (tul_msgin_accept(pCurHcb));
- }
- }
- }
- TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, ((TUL_RD(pCurHcb->HCS_Base, TUL_SSignal) & (TSC_SET_ACK | 7)) | TSC_SET_ATN));
-
- if (tul_msgin_accept(pCurHcb) != MSG_OUT)
- return (pCurHcb->HCS_Phase);
- /* WDTR msg out */
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_EXTEND);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 2);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, 3);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurHcb->HCS_Msg[2]);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
- return (wait_tulip(pCurHcb));
-}
-
-/***************************************************************************/
-int tul_msgin_sync(HCS * pCurHcb)
-{
- char default_period;
-
- default_period = tul_rate_tbl[pCurHcb->HCS_ActTcs->TCS_Flags & TCF_SCSI_RATE];
- if (pCurHcb->HCS_Msg[3] > MAX_OFFSET) {
- pCurHcb->HCS_Msg[3] = MAX_OFFSET;
- if (pCurHcb->HCS_Msg[2] < default_period) {
- pCurHcb->HCS_Msg[2] = default_period;
- return 1;
- }
- if (pCurHcb->HCS_Msg[2] >= 59) { /* Change to async */
- pCurHcb->HCS_Msg[3] = 0;
- }
- return 1;
- }
- /* offset requests asynchronous transfers ? */
- if (pCurHcb->HCS_Msg[3] == 0) {
- return 0;
- }
- if (pCurHcb->HCS_Msg[2] < default_period) {
- pCurHcb->HCS_Msg[2] = default_period;
- return 1;
- }
- if (pCurHcb->HCS_Msg[2] >= 59) {
- pCurHcb->HCS_Msg[3] = 0;
- return 1;
- }
- return 0;
-}
-
-
-/***************************************************************************/
-int wdtr_done(HCS * pCurHcb)
-{
- pCurHcb->HCS_ActTcs->TCS_Flags &= ~TCF_SYNC_DONE;
- pCurHcb->HCS_ActTcs->TCS_Flags |= TCF_WDTR_DONE;
-
- pCurHcb->HCS_ActTcs->TCS_JS_Period = 0;
- if (pCurHcb->HCS_Msg[2]) { /* if 16 bit */
- pCurHcb->HCS_ActTcs->TCS_JS_Period |= TSC_WIDE_SCSI;
- }
- pCurHcb->HCS_ActTcs->TCS_SConfig0 &= ~TSC_ALT_PERIOD;
- TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, pCurHcb->HCS_ActTcs->TCS_SConfig0);
- TUL_WR(pCurHcb->HCS_Base + TUL_SPeriod, pCurHcb->HCS_ActTcs->TCS_JS_Period);
-
- return 1;
-}
-
-/***************************************************************************/
-int tul_sync_done(HCS * pCurHcb)
-{
- int i;
-
- pCurHcb->HCS_ActTcs->TCS_Flags |= TCF_SYNC_DONE;
-
- if (pCurHcb->HCS_Msg[3]) {
- pCurHcb->HCS_ActTcs->TCS_JS_Period |= pCurHcb->HCS_Msg[3];
- for (i = 0; i < 8; i++) {
- if (tul_rate_tbl[i] >= pCurHcb->HCS_Msg[2]) /* pick the big one */
- break;
- }
- pCurHcb->HCS_ActTcs->TCS_JS_Period |= (i << 4);
- pCurHcb->HCS_ActTcs->TCS_SConfig0 |= TSC_ALT_PERIOD;
- }
- TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, pCurHcb->HCS_ActTcs->TCS_SConfig0);
- TUL_WR(pCurHcb->HCS_Base + TUL_SPeriod, pCurHcb->HCS_ActTcs->TCS_JS_Period);
-
- return (-1);
-}
-
-
-int tul_post_scsi_rst(HCS * pCurHcb)
-{
- SCB *pCurScb;
- TCS *pCurTcb;
- int i;
-
- pCurHcb->HCS_ActScb = 0;
- pCurHcb->HCS_ActTcs = 0;
- pCurHcb->HCS_Flags = 0;
-
- while ((pCurScb = tul_pop_busy_scb(pCurHcb)) != NULL) {
- pCurScb->SCB_HaStat = HOST_BAD_PHAS;
- tul_append_done_scb(pCurHcb, pCurScb);
- }
- /* clear sync done flag */
- pCurTcb = &pCurHcb->HCS_Tcs[0];
- for (i = 0; i < pCurHcb->HCS_MaxTar; pCurTcb++, i++) {
- pCurTcb->TCS_Flags &= ~(TCF_SYNC_DONE | TCF_WDTR_DONE);
- /* Initialize the sync. xfer register values to an asyn xfer */
- pCurTcb->TCS_JS_Period = 0;
- pCurTcb->TCS_SConfig0 = pCurHcb->HCS_SConf1;
- pCurHcb->HCS_ActTags[0] = 0; /* 07/22/98 */
- pCurHcb->HCS_Tcs[i].TCS_Flags &= ~TCF_BUSY; /* 07/22/98 */
- } /* for */
-
- return (-1);
-}
-
-/***************************************************************************/
-void tul_select_atn_stop(HCS * pCurHcb, SCB * pCurScb)
-{
- pCurScb->SCB_Status |= SCB_SELECT;
- pCurScb->SCB_NxtStat = 0x1;
- pCurHcb->HCS_ActScb = pCurScb;
- pCurHcb->HCS_ActTcs = &pCurHcb->HCS_Tcs[pCurScb->SCB_Target];
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_SELATNSTOP);
- return;
-}
-
-
-/***************************************************************************/
-void tul_select_atn(HCS * pCurHcb, SCB * pCurScb)
-{
- int i;
-
- pCurScb->SCB_Status |= SCB_SELECT;
- pCurScb->SCB_NxtStat = 0x2;
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurScb->SCB_Ident);
- for (i = 0; i < (int) pCurScb->SCB_CDBLen; i++)
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurScb->SCB_CDB[i]);
- pCurHcb->HCS_ActTcs = &pCurHcb->HCS_Tcs[pCurScb->SCB_Target];
- pCurHcb->HCS_ActScb = pCurScb;
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_SEL_ATN);
- return;
-}
-
-/***************************************************************************/
-void tul_select_atn3(HCS * pCurHcb, SCB * pCurScb)
-{
- int i;
-
- pCurScb->SCB_Status |= SCB_SELECT;
- pCurScb->SCB_NxtStat = 0x2;
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurScb->SCB_Ident);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurScb->SCB_TagMsg);
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurScb->SCB_TagId);
- for (i = 0; i < (int) pCurScb->SCB_CDBLen; i++)
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, pCurScb->SCB_CDB[i]);
- pCurHcb->HCS_ActTcs = &pCurHcb->HCS_Tcs[pCurScb->SCB_Target];
- pCurHcb->HCS_ActScb = pCurScb;
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_SEL_ATN3);
- return;
-}
-
-/***************************************************************************/
-/* SCSI Bus Device Reset */
-int tul_bus_device_reset(HCS * pCurHcb)
-{
- SCB *pCurScb = pCurHcb->HCS_ActScb;
- TCS *pCurTcb = pCurHcb->HCS_ActTcs;
- SCB *pTmpScb, *pPrevScb;
- BYTE tar;
-
- if (pCurHcb->HCS_Phase != MSG_OUT) {
- return (int_tul_bad_seq(pCurHcb)); /* Unexpected phase */
- }
- tul_unlink_pend_scb(pCurHcb, pCurScb);
- tul_release_scb(pCurHcb, pCurScb);
-
-
- tar = pCurScb->SCB_Target; /* target */
- pCurTcb->TCS_Flags &= ~(TCF_SYNC_DONE | TCF_WDTR_DONE | TCF_BUSY);
- /* clr sync. nego & WDTR flags 07/22/98 */
-
- /* abort all SCB with same target */
- pPrevScb = pTmpScb = pCurHcb->HCS_FirstBusy; /* Check Busy queue */
- while (pTmpScb != NULL) {
-
- if (pTmpScb->SCB_Target == tar) {
- /* unlink it */
- if (pTmpScb == pCurHcb->HCS_FirstBusy) {
- if ((pCurHcb->HCS_FirstBusy = pTmpScb->SCB_NxtScb) == NULL)
- pCurHcb->HCS_LastBusy = NULL;
- } else {
- pPrevScb->SCB_NxtScb = pTmpScb->SCB_NxtScb;
- if (pTmpScb == pCurHcb->HCS_LastBusy)
- pCurHcb->HCS_LastBusy = pPrevScb;
- }
- pTmpScb->SCB_HaStat = HOST_ABORTED;
- tul_append_done_scb(pCurHcb, pTmpScb);
- }
- /* Previous haven't change */
- else {
- pPrevScb = pTmpScb;
- }
- pTmpScb = pTmpScb->SCB_NxtScb;
- }
-
- TUL_WR(pCurHcb->HCS_Base + TUL_SFifo, MSG_DEVRST);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_XF_FIFO_OUT);
-
- return tul_wait_disc(pCurHcb);
-
-}
-
-/***************************************************************************/
-int tul_msgin_accept(HCS * pCurHcb)
-{
- TUL_WR(pCurHcb->HCS_Base + TUL_SCmd, TSC_MSG_ACCEPT);
- return (wait_tulip(pCurHcb));
-}
-
-/***************************************************************************/
-int wait_tulip(HCS * pCurHcb)
-{
-
- while (!((pCurHcb->HCS_JSStatus0 = TUL_RD(pCurHcb->HCS_Base, TUL_SStatus0))
- & TSS_INT_PENDING));
-
- pCurHcb->HCS_JSInt = TUL_RD(pCurHcb->HCS_Base, TUL_SInt);
- pCurHcb->HCS_Phase = pCurHcb->HCS_JSStatus0 & TSS_PH_MASK;
- pCurHcb->HCS_JSStatus1 = TUL_RD(pCurHcb->HCS_Base, TUL_SStatus1);
-
- if (pCurHcb->HCS_JSInt & TSS_RESEL_INT) { /* if SCSI bus reset detected */
- return (int_tul_resel(pCurHcb));
- }
- if (pCurHcb->HCS_JSInt & TSS_SEL_TIMEOUT) { /* if selected/reselected timeout interrupt */
- return (int_tul_busfree(pCurHcb));
- }
- if (pCurHcb->HCS_JSInt & TSS_SCSIRST_INT) { /* if SCSI bus reset detected */
- return (int_tul_scsi_rst(pCurHcb));
- }
- if (pCurHcb->HCS_JSInt & TSS_DISC_INT) { /* BUS disconnection */
- if (pCurHcb->HCS_Flags & HCF_EXPECT_DONE_DISC) {
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO); /* Flush SCSI FIFO */
- tul_unlink_busy_scb(pCurHcb, pCurHcb->HCS_ActScb);
- pCurHcb->HCS_ActScb->SCB_HaStat = 0;
- tul_append_done_scb(pCurHcb, pCurHcb->HCS_ActScb);
- pCurHcb->HCS_ActScb = NULL;
- pCurHcb->HCS_ActTcs = NULL;
- pCurHcb->HCS_Flags &= ~HCF_EXPECT_DONE_DISC;
- TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, TSC_INITDEFAULT);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl1, TSC_HW_RESELECT); /* Enable HW reselect */
- return (-1);
- }
- if (pCurHcb->HCS_Flags & HCF_EXPECT_DISC) {
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO); /* Flush SCSI FIFO */
- pCurHcb->HCS_ActScb = NULL;
- pCurHcb->HCS_ActTcs = NULL;
- pCurHcb->HCS_Flags &= ~HCF_EXPECT_DISC;
- TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, TSC_INITDEFAULT);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl1, TSC_HW_RESELECT); /* Enable HW reselect */
- return (-1);
- }
- return (int_tul_busfree(pCurHcb));
- }
- if (pCurHcb->HCS_JSInt & (TSS_FUNC_COMP | TSS_BUS_SERV)) {
- return (pCurHcb->HCS_Phase);
- }
- return (pCurHcb->HCS_Phase);
-}
-/***************************************************************************/
-int tul_wait_disc(HCS * pCurHcb)
-{
-
- while (!((pCurHcb->HCS_JSStatus0 = TUL_RD(pCurHcb->HCS_Base, TUL_SStatus0))
- & TSS_INT_PENDING));
-
-
- pCurHcb->HCS_JSInt = TUL_RD(pCurHcb->HCS_Base, TUL_SInt);
-
- if (pCurHcb->HCS_JSInt & TSS_SCSIRST_INT) { /* if SCSI bus reset detected */
- return (int_tul_scsi_rst(pCurHcb));
- }
- if (pCurHcb->HCS_JSInt & TSS_DISC_INT) { /* BUS disconnection */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO); /* Flush SCSI FIFO */
- TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, TSC_INITDEFAULT);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl1, TSC_HW_RESELECT); /* Enable HW reselect */
- pCurHcb->HCS_ActScb = NULL;
- return (-1);
- }
- return (tul_bad_seq(pCurHcb));
-}
-
-/***************************************************************************/
-int tul_wait_done_disc(HCS * pCurHcb)
-{
-
-
- while (!((pCurHcb->HCS_JSStatus0 = TUL_RD(pCurHcb->HCS_Base, TUL_SStatus0))
- & TSS_INT_PENDING));
-
- pCurHcb->HCS_JSInt = TUL_RD(pCurHcb->HCS_Base, TUL_SInt);
-
-
- if (pCurHcb->HCS_JSInt & TSS_SCSIRST_INT) { /* if SCSI bus reset detected */
- return (int_tul_scsi_rst(pCurHcb));
- }
- if (pCurHcb->HCS_JSInt & TSS_DISC_INT) { /* BUS disconnection */
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO); /* Flush SCSI FIFO */
- TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, TSC_INITDEFAULT);
- TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl1, TSC_HW_RESELECT); /* Enable HW reselect */
- tul_unlink_busy_scb(pCurHcb, pCurHcb->HCS_ActScb);
-
- tul_append_done_scb(pCurHcb, pCurHcb->HCS_ActScb);
- pCurHcb->HCS_ActScb = NULL;
- return (-1);
- }
- return (tul_bad_seq(pCurHcb));
-}
-
-/**************************** EOF *********************************/
+++ /dev/null
-/**************************************************************************
- * Initio 9100 device driver for Linux.
- *
- * Copyright (c) 1994-1998 Initio Corporation
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING. If not, write to
- * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * --------------------------------------------------------------------------
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * Where this Software is combined with software released under the terms of
- * the GNU General Public License ("GPL") and the terms of the GPL would require the
- * combined work to also be released under the terms of the GPL, the terms
- * and conditions of this License will apply in addition to those of the
- * GPL with the exception of any terms or conditions of this License that
- * conflict with, or are expressly prohibited by, the GPL.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- **************************************************************************/
-
-#include <linux/config.h>
-#include <linux/types.h>
-
-#define ULONG unsigned long
-#define USHORT unsigned short
-#define UCHAR unsigned char
-#define BYTE unsigned char
-#define WORD unsigned short
-#define DWORD unsigned long
-#define UBYTE unsigned char
-#define UWORD unsigned short
-#define UDWORD unsigned long
-#define U32 u32
-
-#ifndef FAILURE
-#define FAILURE (-1)
-#endif
-
-#define TOTAL_SG_ENTRY 32
-#define MAX_SUPPORTED_ADAPTERS 8
-#define MAX_OFFSET 15
-#define MAX_TARGETS 16
-
-#define INI_VENDOR_ID 0x1101 /* Initio's PCI vendor ID */
-#define I950_DEVICE_ID 0x9500 /* Initio's inic-950 product ID */
-#define I940_DEVICE_ID 0x9400 /* Initio's inic-940 product ID */
-#define I935_DEVICE_ID 0x9401 /* Initio's inic-935 product ID */
-
-#define _I91USCSI_H
-
-typedef struct {
- unsigned short base;
- unsigned short vec;
-} i91u_config;
-
-/***************************************/
-/* Tulip Configuration Register Set */
-/***************************************/
-#define TUL_PVID 0x00 /* Vendor ID */
-#define TUL_PDID 0x02 /* Device ID */
-#define TUL_PCMD 0x04 /* Command */
-#define TUL_PSTUS 0x06 /* Status */
-#define TUL_PRID 0x08 /* Revision number */
-#define TUL_PPI 0x09 /* Programming interface */
-#define TUL_PSC 0x0A /* Sub Class */
-#define TUL_PBC 0x0B /* Base Class */
-#define TUL_PCLS 0x0C /* Cache line size */
-#define TUL_PLTR 0x0D /* Latency timer */
-#define TUL_PHDT 0x0E /* Header type */
-#define TUL_PBIST 0x0F /* BIST */
-#define TUL_PBAD 0x10 /* Base address */
-#define TUL_PBAD1 0x14 /* Base address */
-#define TUL_PBAD2 0x18 /* Base address */
-#define TUL_PBAD3 0x1C /* Base address */
-#define TUL_PBAD4 0x20 /* Base address */
-#define TUL_PBAD5 0x24 /* Base address */
-#define TUL_PRSVD 0x28 /* Reserved */
-#define TUL_PRSVD1 0x2C /* Reserved */
-#define TUL_PRAD 0x30 /* Expansion ROM base address */
-#define TUL_PRSVD2 0x34 /* Reserved */
-#define TUL_PRSVD3 0x38 /* Reserved */
-#define TUL_PINTL 0x3C /* Interrupt line */
-#define TUL_PINTP 0x3D /* Interrupt pin */
-#define TUL_PIGNT 0x3E /* MIN_GNT */
-#define TUL_PMGNT 0x3F /* MAX_GNT */
-
-/************************/
-/* Jasmin Register Set */
-/************************/
-#define TUL_HACFG0 0x40 /* H/A Configuration Register 0 */
-#define TUL_HACFG1 0x41 /* H/A Configuration Register 1 */
-#define TUL_HACFG2 0x42 /* H/A Configuration Register 2 */
-
-#define TUL_SDCFG0 0x44 /* SCSI Device Configuration 0 */
-#define TUL_SDCFG1 0x45 /* SCSI Device Configuration 1 */
-#define TUL_SDCFG2 0x46 /* SCSI Device Configuration 2 */
-#define TUL_SDCFG3 0x47 /* SCSI Device Configuration 3 */
-
-#define TUL_GINTS 0x50 /* Global Interrupt Status Register */
-#define TUL_GIMSK 0x52 /* Global Interrupt MASK Register */
-#define TUL_GCTRL 0x54 /* Global Control Register */
-#define TUL_GCTRL_EEPROM_BIT 0x04
-#define TUL_GCTRL1 0x55 /* Global Control Register */
-#define TUL_DMACFG 0x5B /* DMA configuration */
-#define TUL_NVRAM 0x5D /* Non-volatile RAM port */
-
-#define TUL_SCnt0 0x80 /* 00 R/W Transfer Counter Low */
-#define TUL_SCnt1 0x81 /* 01 R/W Transfer Counter Mid */
-#define TUL_SCnt2 0x82 /* 02 R/W Transfer Count High */
-#define TUL_SFifoCnt 0x83 /* 03 R FIFO counter */
-#define TUL_SIntEnable 0x84 /* 03 W Interrupt enble */
-#define TUL_SInt 0x84 /* 04 R Interrupt Register */
-#define TUL_SCtrl0 0x85 /* 05 W Control 0 */
-#define TUL_SStatus0 0x85 /* 05 R Status 0 */
-#define TUL_SCtrl1 0x86 /* 06 W Control 1 */
-#define TUL_SStatus1 0x86 /* 06 R Status 1 */
-#define TUL_SConfig 0x87 /* 07 W Configuration */
-#define TUL_SStatus2 0x87 /* 07 R Status 2 */
-#define TUL_SPeriod 0x88 /* 08 W Sync. Transfer Period & Offset */
-#define TUL_SOffset 0x88 /* 08 R Offset */
-#define TUL_SScsiId 0x89 /* 09 W SCSI ID */
-#define TUL_SBusId 0x89 /* 09 R SCSI BUS ID */
-#define TUL_STimeOut 0x8A /* 0A W Sel/Resel Time Out Register */
-#define TUL_SIdent 0x8A /* 0A R Identify Message Register */
-#define TUL_SAvail 0x8A /* 0A R Availiable Counter Register */
-#define TUL_SData 0x8B /* 0B R/W SCSI data in/out */
-#define TUL_SFifo 0x8C /* 0C R/W FIFO */
-#define TUL_SSignal 0x90 /* 10 R/W SCSI signal in/out */
-#define TUL_SCmd 0x91 /* 11 R/W Command */
-#define TUL_STest0 0x92 /* 12 R/W Test0 */
-#define TUL_STest1 0x93 /* 13 R/W Test1 */
-#define TUL_SCFG1 0x94 /* 14 R/W Configuration */
-
-#define TUL_XAddH 0xC0 /*DMA Transfer Physical Address */
-#define TUL_XAddW 0xC8 /*DMA Current Transfer Physical Address */
-#define TUL_XCntH 0xD0 /*DMA Transfer Counter */
-#define TUL_XCntW 0xD4 /*DMA Current Transfer Counter */
-#define TUL_XCmd 0xD8 /*DMA Command Register */
-#define TUL_Int 0xDC /*Interrupt Register */
-#define TUL_XStatus 0xDD /*DMA status Register */
-#define TUL_Mask 0xE0 /*Interrupt Mask Register */
-#define TUL_XCtrl 0xE4 /*DMA Control Register */
-#define TUL_XCtrl1 0xE5 /*DMA Control Register 1 */
-#define TUL_XFifo 0xE8 /*DMA FIFO */
-
-#define TUL_WCtrl 0xF7 /*Bus master wait state control */
-#define TUL_DCtrl 0xFB /*DMA delay control */
-
-/*----------------------------------------------------------------------*/
-/* bit definition for Command register of Configuration Space Header */
-/*----------------------------------------------------------------------*/
-#define BUSMS 0x04 /* BUS MASTER Enable */
-#define IOSPA 0x01 /* IO Space Enable */
-
-/*----------------------------------------------------------------------*/
-/* Command Codes of Tulip SCSI Command register */
-/*----------------------------------------------------------------------*/
-#define TSC_EN_RESEL 0x80 /* Enable Reselection */
-#define TSC_CMD_COMP 0x84 /* Command Complete Sequence */
-#define TSC_SEL 0x01 /* Select Without ATN Sequence */
-#define TSC_SEL_ATN 0x11 /* Select With ATN Sequence */
-#define TSC_SEL_ATN_DMA 0x51 /* Select With ATN Sequence with DMA */
-#define TSC_SEL_ATN3 0x31 /* Select With ATN3 Sequence */
-#define TSC_SEL_ATNSTOP 0x12 /* Select With ATN and Stop Sequence */
-#define TSC_SELATNSTOP 0x1E /* Select With ATN and Stop Sequence */
-
-#define TSC_SEL_ATN_DIRECT_IN 0x95 /* Select With ATN Sequence */
-#define TSC_SEL_ATN_DIRECT_OUT 0x15 /* Select With ATN Sequence */
-#define TSC_SEL_ATN3_DIRECT_IN 0xB5 /* Select With ATN3 Sequence */
-#define TSC_SEL_ATN3_DIRECT_OUT 0x35 /* Select With ATN3 Sequence */
-#define TSC_XF_DMA_OUT_DIRECT 0x06 /* DMA Xfer Infomation out */
-#define TSC_XF_DMA_IN_DIRECT 0x86 /* DMA Xfer Infomation in */
-
-#define TSC_XF_DMA_OUT 0x43 /* DMA Xfer Infomation out */
-#define TSC_XF_DMA_IN 0xC3 /* DMA Xfer Infomation in */
-#define TSC_XF_FIFO_OUT 0x03 /* FIFO Xfer Infomation out */
-#define TSC_XF_FIFO_IN 0x83 /* FIFO Xfer Infomation in */
-
-#define TSC_MSG_ACCEPT 0x0F /* Message Accept */
-
-/*----------------------------------------------------------------------*/
-/* bit definition for Tulip SCSI Control 0 Register */
-/*----------------------------------------------------------------------*/
-#define TSC_RST_SEQ 0x20 /* Reset sequence counter */
-#define TSC_FLUSH_FIFO 0x10 /* Flush FIFO */
-#define TSC_ABT_CMD 0x04 /* Abort command (sequence) */
-#define TSC_RST_CHIP 0x02 /* Reset SCSI Chip */
-#define TSC_RST_BUS 0x01 /* Reset SCSI Bus */
-
-/*----------------------------------------------------------------------*/
-/* bit definition for Tulip SCSI Control 1 Register */
-/*----------------------------------------------------------------------*/
-#define TSC_EN_SCAM 0x80 /* Enable SCAM */
-#define TSC_TIMER 0x40 /* Select timeout unit */
-#define TSC_EN_SCSI2 0x20 /* SCSI-2 mode */
-#define TSC_PWDN 0x10 /* Power down mode */
-#define TSC_WIDE_CPU 0x08 /* Wide CPU */
-#define TSC_HW_RESELECT 0x04 /* Enable HW reselect */
-#define TSC_EN_BUS_OUT 0x02 /* Enable SCSI data bus out latch */
-#define TSC_EN_BUS_IN 0x01 /* Enable SCSI data bus in latch */
-
-/*----------------------------------------------------------------------*/
-/* bit definition for Tulip SCSI Configuration Register */
-/*----------------------------------------------------------------------*/
-#define TSC_EN_LATCH 0x80 /* Enable phase latch */
-#define TSC_INITIATOR 0x40 /* Initiator mode */
-#define TSC_EN_SCSI_PAR 0x20 /* Enable SCSI parity */
-#define TSC_DMA_8BIT 0x10 /* Alternate dma 8-bits mode */
-#define TSC_DMA_16BIT 0x08 /* Alternate dma 16-bits mode */
-#define TSC_EN_WDACK 0x04 /* Enable DACK while wide SCSI xfer */
-#define TSC_ALT_PERIOD 0x02 /* Alternate sync period mode */
-#define TSC_DIS_SCSIRST 0x01 /* Disable SCSI bus reset us */
-
-#define TSC_INITDEFAULT (TSC_INITIATOR | TSC_EN_LATCH | TSC_ALT_PERIOD | TSC_DIS_SCSIRST)
-
-#define TSC_WIDE_SCSI 0x80 /* Enable Wide SCSI */
-
-/*----------------------------------------------------------------------*/
-/* bit definition for Tulip SCSI signal Register */
-/*----------------------------------------------------------------------*/
-#define TSC_RST_ACK 0x00 /* Release ACK signal */
-#define TSC_RST_ATN 0x00 /* Release ATN signal */
-#define TSC_RST_BSY 0x00 /* Release BSY signal */
-
-#define TSC_SET_ACK 0x40 /* ACK signal */
-#define TSC_SET_ATN 0x08 /* ATN signal */
-
-#define TSC_REQI 0x80 /* REQ signal */
-#define TSC_ACKI 0x40 /* ACK signal */
-#define TSC_BSYI 0x20 /* BSY signal */
-#define TSC_SELI 0x10 /* SEL signal */
-#define TSC_ATNI 0x08 /* ATN signal */
-#define TSC_MSGI 0x04 /* MSG signal */
-#define TSC_CDI 0x02 /* C/D signal */
-#define TSC_IOI 0x01 /* I/O signal */
-
-
-/*----------------------------------------------------------------------*/
-/* bit definition for Tulip SCSI Status 0 Register */
-/*----------------------------------------------------------------------*/
-#define TSS_INT_PENDING 0x80 /* Interrupt pending */
-#define TSS_SEQ_ACTIVE 0x40 /* Sequencer active */
-#define TSS_XFER_CNT 0x20 /* Transfer counter zero */
-#define TSS_FIFO_EMPTY 0x10 /* FIFO empty */
-#define TSS_PAR_ERROR 0x08 /* SCSI parity error */
-#define TSS_PH_MASK 0x07 /* SCSI phase mask */
-
-/*----------------------------------------------------------------------*/
-/* bit definition for Tulip SCSI Status 1 Register */
-/*----------------------------------------------------------------------*/
-#define TSS_STATUS_RCV 0x08 /* Status received */
-#define TSS_MSG_SEND 0x40 /* Message sent */
-#define TSS_CMD_PH_CMP 0x20 /* command phase done */
-#define TSS_DATA_PH_CMP 0x10 /* Data phase done */
-#define TSS_STATUS_SEND 0x08 /* Status sent */
-#define TSS_XFER_CMP 0x04 /* Transfer completed */
-#define TSS_SEL_CMP 0x02 /* Selection completed */
-#define TSS_ARB_CMP 0x01 /* Arbitration completed */
-
-/*----------------------------------------------------------------------*/
-/* bit definition for Tulip SCSI Status 2 Register */
-/*----------------------------------------------------------------------*/
-#define TSS_CMD_ABTED 0x80 /* Command aborted */
-#define TSS_OFFSET_0 0x40 /* Offset counter zero */
-#define TSS_FIFO_FULL 0x20 /* FIFO full */
-#define TSS_TIMEOUT_0 0x10 /* Timeout counter zero */
-#define TSS_BUSY_RLS 0x08 /* Busy release */
-#define TSS_PH_MISMATCH 0x04 /* Phase mismatch */
-#define TSS_SCSI_BUS_EN 0x02 /* SCSI data bus enable */
-#define TSS_SCSIRST 0x01 /* SCSI bus reset in progress */
-
-/*----------------------------------------------------------------------*/
-/* bit definition for Tulip SCSI Interrupt Register */
-/*----------------------------------------------------------------------*/
-#define TSS_RESEL_INT 0x80 /* Reselected interrupt */
-#define TSS_SEL_TIMEOUT 0x40 /* Selected/reselected timeout */
-#define TSS_BUS_SERV 0x20
-#define TSS_SCSIRST_INT 0x10 /* SCSI bus reset detected */
-#define TSS_DISC_INT 0x08 /* Disconnected interrupt */
-#define TSS_SEL_INT 0x04 /* Select interrupt */
-#define TSS_SCAM_SEL 0x02 /* SCAM selected */
-#define TSS_FUNC_COMP 0x01
-
-/*----------------------------------------------------------------------*/
-/* SCSI Phase Codes. */
-/*----------------------------------------------------------------------*/
-#define DATA_OUT 0
-#define DATA_IN 1 /* 4 */
-#define CMD_OUT 2
-#define STATUS_IN 3 /* 6 */
-#define MSG_OUT 6 /* 3 */
-#define MSG_IN 7
-
-
-
-/*----------------------------------------------------------------------*/
-/* Command Codes of Tulip xfer Command register */
-/*----------------------------------------------------------------------*/
-#define TAX_X_FORC 0x02
-#define TAX_X_ABT 0x04
-#define TAX_X_CLR_FIFO 0x08
-
-#define TAX_X_IN 0x21
-#define TAX_X_OUT 0x01
-#define TAX_SG_IN 0xA1
-#define TAX_SG_OUT 0x81
-
-/*----------------------------------------------------------------------*/
-/* Tulip Interrupt Register */
-/*----------------------------------------------------------------------*/
-#define XCMP 0x01
-#define FCMP 0x02
-#define XABT 0x04
-#define XERR 0x08
-#define SCMP 0x10
-#define IPEND 0x80
-
-/*----------------------------------------------------------------------*/
-/* Tulip DMA Status Register */
-/*----------------------------------------------------------------------*/
-#define XPEND 0x01 /* Transfer pending */
-#define FEMPTY 0x02 /* FIFO empty */
-
-
-
-/*----------------------------------------------------------------------*/
-/* bit definition for TUL_GCTRL */
-/*----------------------------------------------------------------------*/
-#define EXTSG 0x80
-#define EXTAD 0x60
-#define SEG4K 0x08
-#define EEPRG 0x04
-#define MRMUL 0x02
-
-/*----------------------------------------------------------------------*/
-/* bit definition for TUL_NVRAM */
-/*----------------------------------------------------------------------*/
-#define SE2CS 0x08
-#define SE2CLK 0x04
-#define SE2DO 0x02
-#define SE2DI 0x01
-
-
-/************************************************************************/
-/* Scatter-Gather Element Structure */
-/************************************************************************/
-typedef struct SG_Struc {
- U32 SG_Ptr; /* Data Pointer */
- U32 SG_Len; /* Data Length */
-} SG;
-
-/***********************************************************************
- SCSI Control Block
-************************************************************************/
-typedef struct Scsi_Ctrl_Blk {
- struct Scsi_Ctrl_Blk *SCB_NxtScb;
- UBYTE SCB_Status; /*4 */
- UBYTE SCB_NxtStat; /*5 */
- UBYTE SCB_Mode; /*6 */
- UBYTE SCB_Msgin; /*7 SCB_Res0 */
- UWORD SCB_SGIdx; /*8 */
- UWORD SCB_SGMax; /*A */
-#ifdef ALPHA
- U32 SCB_Reserved[2]; /*C */
-#else
- U32 SCB_Reserved[3]; /*C */
-#endif
-
- U32 SCB_XferLen; /*18 Current xfer len */
- U32 SCB_TotXLen; /*1C Total xfer len */
- U32 SCB_PAddr; /*20 SCB phy. Addr. */
-
- UBYTE SCB_Opcode; /*24 SCB command code */
- UBYTE SCB_Flags; /*25 SCB Flags */
- UBYTE SCB_Target; /*26 Target Id */
- UBYTE SCB_Lun; /*27 Lun */
- U32 SCB_BufPtr; /*28 Data Buffer Pointer */
- U32 SCB_BufLen; /*2C Data Allocation Length */
- UBYTE SCB_SGLen; /*30 SG list # */
- UBYTE SCB_SenseLen; /*31 Sense Allocation Length */
- UBYTE SCB_HaStat; /*32 */
- UBYTE SCB_TaStat; /*33 */
- UBYTE SCB_CDBLen; /*34 CDB Length */
- UBYTE SCB_Ident; /*35 Identify */
- UBYTE SCB_TagMsg; /*36 Tag Message */
- UBYTE SCB_TagId; /*37 Queue Tag */
- UBYTE SCB_CDB[12]; /*38 */
- U32 SCB_SGPAddr; /*44 SG List/Sense Buf phy. Addr. */
- U32 SCB_SensePtr; /*48 Sense data pointer */
- void (*SCB_Post) (BYTE *, BYTE *); /*4C POST routine */
- unsigned char *SCB_Srb; /*50 SRB Pointer */
- SG SCB_SGList[TOTAL_SG_ENTRY]; /*54 Start of SG list */
-} SCB;
-
-/* Bit Definition for SCB_Status */
-#define SCB_RENT 0x01
-#define SCB_PEND 0x02
-#define SCB_CONTIG 0x04 /* Contigent Allegiance */
-#define SCB_SELECT 0x08
-#define SCB_BUSY 0x10
-#define SCB_DONE 0x20
-
-
-/* Opcodes of SCB_Opcode */
-#define ExecSCSI 0x1
-#define BusDevRst 0x2
-#define AbortCmd 0x3
-
-
-/* Bit Definition for SCB_Mode */
-#define SCM_RSENS 0x01 /* request sense mode */
-
-
-/* Bit Definition for SCB_Flags */
-#define SCF_DONE 0x01
-#define SCF_POST 0x02
-#define SCF_SENSE 0x04
-#define SCF_DIR 0x18
-#define SCF_NO_DCHK 0x00
-#define SCF_DIN 0x08
-#define SCF_DOUT 0x10
-#define SCF_NO_XF 0x18
-#define SCF_WR_VF 0x20 /* Write verify turn on */
-#define SCF_POLL 0x40
-#define SCF_SG 0x80
-
-/* Error Codes for SCB_HaStat */
-#define HOST_SEL_TOUT 0x11
-#define HOST_DO_DU 0x12
-#define HOST_BUS_FREE 0x13
-#define HOST_BAD_PHAS 0x14
-#define HOST_INV_CMD 0x16
-#define HOST_ABORTED 0x1A /* 07/21/98 */
-#define HOST_SCSI_RST 0x1B
-#define HOST_DEV_RST 0x1C
-
-/* Error Codes for SCB_TaStat */
-#define TARGET_CHKCOND 0x02
-#define TARGET_BUSY 0x08
-#define QUEUE_FULL 0x28
-
-/* SCSI MESSAGE */
-#define MSG_COMP 0x00
-#define MSG_EXTEND 0x01
-#define MSG_SDP 0x02
-#define MSG_RESTORE 0x03
-#define MSG_DISC 0x04
-#define MSG_IDE 0x05
-#define MSG_ABORT 0x06
-#define MSG_REJ 0x07
-#define MSG_NOP 0x08
-#define MSG_PARITY 0x09
-#define MSG_LINK_COMP 0x0A
-#define MSG_LINK_FLAG 0x0B
-#define MSG_DEVRST 0x0C
-#define MSG_ABORT_TAG 0x0D
-
-/* Queue tag msg: Simple_quque_tag, Head_of_queue_tag, Ordered_queue_tag */
-#define MSG_STAG 0x20
-#define MSG_HTAG 0x21
-#define MSG_OTAG 0x22
-
-#define MSG_IGNOREWIDE 0x23
-
-#define MSG_IDENT 0x80
-
-/***********************************************************************
- Target Device Control Structure
-**********************************************************************/
-
-typedef struct Tar_Ctrl_Struc {
- UWORD TCS_Flags; /* 0 */
- UBYTE TCS_JS_Period; /* 2 */
- UBYTE TCS_SConfig0; /* 3 */
-
- UWORD TCS_DrvFlags; /* 4 */
- UBYTE TCS_DrvHead; /* 6 */
- UBYTE TCS_DrvSector; /* 7 */
-} TCS;
-
-/***********************************************************************
- Target Device Control Structure
-**********************************************************************/
-
-/* Bit Definition for TCF_Flags */
-#define TCF_SCSI_RATE 0x0007
-#define TCF_EN_DISC 0x0008
-#define TCF_NO_SYNC_NEGO 0x0010
-#define TCF_NO_WDTR 0x0020
-#define TCF_EN_255 0x0040
-#define TCF_EN_START 0x0080
-#define TCF_WDTR_DONE 0x0100
-#define TCF_SYNC_DONE 0x0200
-#define TCF_BUSY 0x0400
-
-
-/* Bit Definition for TCF_DrvFlags */
-#define TCF_DRV_BUSY 0x01 /* Indicate target busy(driver) */
-#define TCF_DRV_EN_TAG 0x0800
-#define TCF_DRV_255_63 0x0400
-
-typedef struct I91u_Adpt_Struc {
- UWORD ADPT_BIOS; /* 0 */
- UWORD ADPT_BASE; /* 1 */
- UBYTE ADPT_Bus; /* 2 */
- UBYTE ADPT_Device; /* 3 */
- UBYTE ADPT_INTR; /* 4 */
-} INI_ADPT_STRUCT;
-
-
-/***********************************************************************
- Host Adapter Control Structure
-************************************************************************/
-typedef struct Ha_Ctrl_Struc {
- UWORD HCS_Base; /* 00 */
- UWORD HCS_BIOS; /* 02 */
- UBYTE HCS_Intr; /* 04 */
- UBYTE HCS_SCSI_ID; /* 05 */
- UBYTE HCS_MaxTar; /* 06 */
- UBYTE HCS_NumScbs; /* 07 */
-
- UBYTE HCS_Flags; /* 08 */
- UBYTE HCS_Index; /* 09 */
- UBYTE HCS_HaId; /* 0A */
- UBYTE HCS_Config; /* 0B */
- UWORD HCS_IdMask; /* 0C */
- UBYTE HCS_Semaph; /* 0E */
- UBYTE HCS_Phase; /* 0F */
- UBYTE HCS_JSStatus0; /* 10 */
- UBYTE HCS_JSInt; /* 11 */
- UBYTE HCS_JSStatus1; /* 12 */
- UBYTE HCS_SConf1; /* 13 */
-
- UBYTE HCS_Msg[8]; /* 14 */
- SCB *HCS_NxtAvail; /* 1C */
- SCB *HCS_Scb; /* 20 */
- SCB *HCS_ScbEnd; /* 24 */
- SCB *HCS_NxtPend; /* 28 */
- SCB *HCS_NxtContig; /* 2C */
- SCB *HCS_ActScb; /* 30 */
- TCS *HCS_ActTcs; /* 34 */
-
- SCB *HCS_FirstAvail; /* 38 */
- SCB *HCS_LastAvail; /* 3C */
- SCB *HCS_FirstPend; /* 40 */
- SCB *HCS_LastPend; /* 44 */
- SCB *HCS_FirstBusy; /* 48 */
- SCB *HCS_LastBusy; /* 4C */
- SCB *HCS_FirstDone; /* 50 */
- SCB *HCS_LastDone; /* 54 */
- UBYTE HCS_MaxTags[16]; /* 58 */
- UBYTE HCS_ActTags[16]; /* 68 */
- TCS HCS_Tcs[MAX_TARGETS]; /* 78 */
- ULONG pSRB_head; /* SRB save queue header */
- ULONG pSRB_tail; /* SRB save queue tail */
- spinlock_t HCS_AvailLock;
- spinlock_t HCS_SemaphLock;
- spinlock_t pSRB_lock; /* SRB queue lock */
-} HCS;
-
-/* Bit Definition for HCB_Config */
-#define HCC_SCSI_RESET 0x01
-#define HCC_EN_PAR 0x02
-#define HCC_ACT_TERM1 0x04
-#define HCC_ACT_TERM2 0x08
-#define HCC_AUTO_TERM 0x10
-#define HCC_EN_PWR 0x80
-
-/* Bit Definition for HCB_Flags */
-#define HCF_EXPECT_DISC 0x01
-#define HCF_EXPECT_SELECT 0x02
-#define HCF_EXPECT_RESET 0x10
-#define HCF_EXPECT_DONE_DISC 0x20
-
-/******************************************************************
- Serial EEProm
-*******************************************************************/
-
-typedef struct _NVRAM_SCSI { /* SCSI channel configuration */
- UCHAR NVM_ChSCSIID; /* 0Ch -> Channel SCSI ID */
- UCHAR NVM_ChConfig1; /* 0Dh -> Channel config 1 */
- UCHAR NVM_ChConfig2; /* 0Eh -> Channel config 2 */
- UCHAR NVM_NumOfTarg; /* 0Fh -> Number of SCSI target */
- /* SCSI target configuration */
- UCHAR NVM_Targ0Config; /* 10h -> Target 0 configuration */
- UCHAR NVM_Targ1Config; /* 11h -> Target 1 configuration */
- UCHAR NVM_Targ2Config; /* 12h -> Target 2 configuration */
- UCHAR NVM_Targ3Config; /* 13h -> Target 3 configuration */
- UCHAR NVM_Targ4Config; /* 14h -> Target 4 configuration */
- UCHAR NVM_Targ5Config; /* 15h -> Target 5 configuration */
- UCHAR NVM_Targ6Config; /* 16h -> Target 6 configuration */
- UCHAR NVM_Targ7Config; /* 17h -> Target 7 configuration */
- UCHAR NVM_Targ8Config; /* 18h -> Target 8 configuration */
- UCHAR NVM_Targ9Config; /* 19h -> Target 9 configuration */
- UCHAR NVM_TargAConfig; /* 1Ah -> Target A configuration */
- UCHAR NVM_TargBConfig; /* 1Bh -> Target B configuration */
- UCHAR NVM_TargCConfig; /* 1Ch -> Target C configuration */
- UCHAR NVM_TargDConfig; /* 1Dh -> Target D configuration */
- UCHAR NVM_TargEConfig; /* 1Eh -> Target E configuration */
- UCHAR NVM_TargFConfig; /* 1Fh -> Target F configuration */
-} NVRAM_SCSI;
-
-typedef struct _NVRAM {
-/*----------header ---------------*/
- USHORT NVM_Signature; /* 0,1: Signature */
- UCHAR NVM_Size; /* 2: Size of data structure */
- UCHAR NVM_Revision; /* 3: Revision of data structure */
- /* ----Host Adapter Structure ---- */
- UCHAR NVM_ModelByte0; /* 4: Model number (byte 0) */
- UCHAR NVM_ModelByte1; /* 5: Model number (byte 1) */
- UCHAR NVM_ModelInfo; /* 6: Model information */
- UCHAR NVM_NumOfCh; /* 7: Number of SCSI channel */
- UCHAR NVM_BIOSConfig1; /* 8: BIOS configuration 1 */
- UCHAR NVM_BIOSConfig2; /* 9: BIOS configuration 2 */
- UCHAR NVM_HAConfig1; /* A: Hoat adapter configuration 1 */
- UCHAR NVM_HAConfig2; /* B: Hoat adapter configuration 2 */
- NVRAM_SCSI NVM_SCSIInfo[2];
- UCHAR NVM_reserved[10];
- /* ---------- CheckSum ---------- */
- USHORT NVM_CheckSum; /* 0x3E, 0x3F: Checksum of NVRam */
-} NVRAM, *PNVRAM;
-
-/* Bios Configuration for nvram->BIOSConfig1 */
-#define NBC1_ENABLE 0x01 /* BIOS enable */
-#define NBC1_8DRIVE 0x02 /* Support more than 2 drives */
-#define NBC1_REMOVABLE 0x04 /* Support removable drive */
-#define NBC1_INT19 0x08 /* Intercept int 19h */
-#define NBC1_BIOSSCAN 0x10 /* Dynamic BIOS scan */
-#define NBC1_LUNSUPPORT 0x40 /* Support LUN */
-
-/* HA Configuration Byte 1 */
-#define NHC1_BOOTIDMASK 0x0F /* Boot ID number */
-#define NHC1_LUNMASK 0x70 /* Boot LUN number */
-#define NHC1_CHANMASK 0x80 /* Boot Channel number */
-
-/* Bit definition for nvram->SCSIconfig1 */
-#define NCC1_BUSRESET 0x01 /* Reset SCSI bus at power up */
-#define NCC1_PARITYCHK 0x02 /* SCSI parity enable */
-#define NCC1_ACTTERM1 0x04 /* Enable active terminator 1 */
-#define NCC1_ACTTERM2 0x08 /* Enable active terminator 2 */
-#define NCC1_AUTOTERM 0x10 /* Enable auto terminator */
-#define NCC1_PWRMGR 0x80 /* Enable power management */
-
-/* Bit definition for SCSI Target configuration byte */
-#define NTC_DISCONNECT 0x08 /* Enable SCSI disconnect */
-#define NTC_SYNC 0x10 /* SYNC_NEGO */
-#define NTC_NO_WDTR 0x20 /* SYNC_NEGO */
-#define NTC_1GIGA 0x40 /* 255 head / 63 sectors (64/32) */
-#define NTC_SPINUP 0x80 /* Start disk drive */
-
-/* Default NVRam values */
-#define INI_SIGNATURE 0xC925
-#define NBC1_DEFAULT (NBC1_ENABLE)
-#define NCC1_DEFAULT (NCC1_BUSRESET | NCC1_AUTOTERM | NCC1_PARITYCHK)
-#define NTC_DEFAULT (NTC_NO_WDTR | NTC_1GIGA | NTC_DISCONNECT)
-
-/* SCSI related definition */
-#define DISC_NOT_ALLOW 0x80 /* Disconnect is not allowed */
-#define DISC_ALLOW 0xC0 /* Disconnect is allowed */
-#define SCSICMD_RequestSense 0x03
-
-
-/*----------------------------------------------------------------------*/
-/* PCI */
-/*----------------------------------------------------------------------*/
-#define PCI_FUNCTION_ID 0xB1
-#define PCI_BIOS_PRESENT 0x01
-#define FIND_PCI_DEVICE 0x02
-#define FIND_PCI_CLASS_CODE 0x03
-#define GENERATE_SPECIAL_CYCLE 0x06
-#define READ_CONFIG_BYTE 0x08
-#define READ_CONFIG_WORD 0x09
-#define READ_CONFIG_DWORD 0x0A
-#define WRITE_CONFIG_BYTE 0x0B
-#define WRITE_CONFIG_WORD 0x0C
-#define WRITE_CONFIG_DWORD 0x0D
-
-#define SUCCESSFUL 0x00
-#define FUNC_NOT_SUPPORTED 0x81
-#define BAD_VENDOR_ID 0x83 /* Bad vendor ID */
-#define DEVICE_NOT_FOUND 0x86 /* PCI device not found */
-#define BAD_REGISTER_NUMBER 0x87
-
-#define MAX_PCI_DEVICES 21 /* Maximum devices supportted */
-
-#define MAX_PCI_CHANL 4
-
-typedef struct _BIOS32_ENTRY_STRUCTURE {
- DWORD Signatures; /* Should be "_32_" */
- DWORD BIOS32Entry; /* 32-bit physical address */
- BYTE Revision; /* Revision level, should be 0 */
- BYTE Length; /* Multiply of 16, should be 1 */
- BYTE CheckSum; /* Checksum of whole structure */
- BYTE Reserved[5]; /* Reserved */
-} BIOS32_ENTRY_STRUCTURE, *PBIOS32_ENTRY_STRUCTURE;
-
-typedef struct {
- union {
- unsigned int eax;
- struct {
- unsigned short ax;
- } word;
- struct {
- unsigned char al;
- unsigned char ah;
- } byte;
- } eax;
- union {
- unsigned int ebx;
- struct {
- unsigned short bx;
- } word;
- struct {
- unsigned char bl;
- unsigned char bh;
- } byte;
- } ebx;
- union {
- unsigned int ecx;
- struct {
- unsigned short cx;
- } word;
- struct {
- unsigned char cl;
- unsigned char ch;
- } byte;
- } ecx;
- union {
- unsigned int edx;
- struct {
- unsigned short dx;
- } word;
- struct {
- unsigned char dl;
- unsigned char dh;
- } byte;
- } edx;
- union {
- unsigned int edi;
- struct {
- unsigned short di;
- } word;
- } edi;
- union {
- unsigned int esi;
- struct {
- unsigned short si;
- } word;
- } esi;
-} REGS;
-
-typedef union { /* Union define for mechanism 1 */
- struct {
- unsigned char RegNum;
- unsigned char FcnNum:3;
- unsigned char DeviceNum:5;
- unsigned char BusNum;
- unsigned char Reserved:7;
- unsigned char Enable:1;
- } sConfigAdr;
- unsigned long lConfigAdr;
-} CONFIG_ADR;
-
-typedef union { /* Union define for mechanism 2 */
- struct {
- unsigned char RegNum;
- unsigned char DeviceNum;
- unsigned short Reserved;
- } sHostAdr;
- unsigned long lHostAdr;
-} HOST_ADR;
-
-typedef struct _HCSinfo {
- ULONG base;
- UCHAR vec;
- UCHAR bios; /* High byte of BIOS address */
- USHORT BaseAndBios; /* high byte: pHcsInfo->bios,low byte:pHcsInfo->base */
-} HCSINFO;
-
-#define TUL_RD(x,y) (UCHAR)(inb( (int)((ULONG)(x+y)) ))
-#define TUL_RDLONG(x,y) (ULONG)(inl((int)((ULONG)(x+y)) ))
-#define TUL_WR( adr,data) outb( (UCHAR)(data), (int)(adr))
-#define TUL_WRSHORT(adr,data) outw( (UWORD)(data), (int)(adr))
-#define TUL_WRLONG( adr,data) outl( (ULONG)(data), (int)(adr))
-
-#define SCSI_ABORT_SNOOZE 0
-#define SCSI_ABORT_SUCCESS 1
-#define SCSI_ABORT_PENDING 2
-#define SCSI_ABORT_BUSY 3
-#define SCSI_ABORT_NOT_RUNNING 4
-#define SCSI_ABORT_ERROR 5
-
-#define SCSI_RESET_SNOOZE 0
-#define SCSI_RESET_PUNT 1
-#define SCSI_RESET_SUCCESS 2
-#define SCSI_RESET_PENDING 3
-#define SCSI_RESET_WAKEUP 4
-#define SCSI_RESET_NOT_RUNNING 5
-#define SCSI_RESET_ERROR 6
-
-#define SCSI_RESET_SYNCHRONOUS 0x01
-#define SCSI_RESET_ASYNCHRONOUS 0x02
-#define SCSI_RESET_SUGGEST_BUS_RESET 0x04
-#define SCSI_RESET_SUGGEST_HOST_RESET 0x08
-
-#define SCSI_RESET_BUS_RESET 0x100
-#define SCSI_RESET_HOST_RESET 0x200
-#define SCSI_RESET_ACTION 0xff
+++ /dev/null
-/**************************************************************************
- * Initio 9100 device driver for Linux.
- *
- * Copyright (c) 1994-1998 Initio Corporation
- * Copyright (c) 1998 Bas Vermeulen <bvermeul@blackstar.xs4all.nl>
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING. If not, write to
- * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * --------------------------------------------------------------------------
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * Where this Software is combined with software released under the terms of
- * the GNU General Public License ("GPL") and the terms of the GPL would require the
- * combined work to also be released under the terms of the GPL, the terms
- * and conditions of this License will apply in addition to those of the
- * GPL with the exception of any terms or conditions of this License that
- * conflict with, or are expressly prohibited by, the GPL.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *************************************************************************
- *
- * DESCRIPTION:
- *
- * This is the Linux low-level SCSI driver for Initio INI-9X00U/UW SCSI host
- * adapters
- *
- * 08/06/97 hc - v1.01h
- * - Support inic-940 and inic-935
- * 09/26/97 hc - v1.01i
- * - Make correction from J.W. Schultz suggestion
- * 10/13/97 hc - Support reset function
- * 10/21/97 hc - v1.01j
- * - Support 32 LUN (SCSI 3)
- * 01/14/98 hc - v1.01k
- * - Fix memory allocation problem
- * 03/04/98 hc - v1.01l
- * - Fix tape rewind which will hang the system problem
- * - Set can_queue to tul_num_scb
- * 06/25/98 hc - v1.01m
- * - Get it work for kernel version >= 2.1.75
- * - Dynamic assign SCSI bus reset holding time in init_tulip()
- * 07/02/98 hc - v1.01n
- * - Support 0002134A
- * 08/07/98 hc - v1.01o
- * - Change the tul_abort_srb routine to use scsi_done. <01>
- * 09/07/98 hl - v1.02
- * - Change the INI9100U define and proc_dir_entry to
- * reflect the newer Kernel 2.1.118, but the v1.o1o
- * should work with Kernel 2.1.118.
- * 09/20/98 wh - v1.02a
- * - Support Abort command.
- * - Handle reset routine.
- * 09/21/98 hl - v1.03
- * - remove comments.
- * 12/09/98 bv - v1.03a
- * - Removed unused code
- * 12/13/98 bv - v1.03b
- * - Remove cli() locking for kernels >= 2.1.95. This uses
- * spinlocks to serialize access to the pSRB_head and
- * pSRB_tail members of the HCS structure.
- * 09/01/99 bv - v1.03d
- * - Fixed a deadlock problem in SMP.
- * 21/01/99 bv - v1.03e
- * - Add support for the Domex 3192U PCI SCSI
- * This is a slightly modified patch by
- * Brian Macy <bmacy@sunshinecomputing.com>
- * 22/02/99 bv - v1.03f
- * - Didn't detect the INIC-950 in 2.0.x correctly.
- * Now fixed.
- * 05/07/99 bv - v1.03g
- * - Changed the assumption that HZ = 100
- * 10/17/03 mc - v1.04
- * - added new DMA API support
- * 06/01/04 jmd - v1.04a
- * - Re-add reset_bus support
- **************************************************************************/
-
-#define CVT_LINUX_VERSION(V,P,S) (V * 65536 + P * 256 + S)
-
-#ifndef LINUX_VERSION_CODE
-#include <linux/version.h>
-#endif
-
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/blkdev.h>
-#include <linux/spinlock.h>
-#include <linux/stat.h>
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/proc_fs.h>
-#include <linux/string.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-
-#include <asm/io.h>
-
-#include "scsi.h"
-#include <scsi/scsi_host.h>
-#include "ini9100u.h"
-
-#ifdef DEBUG_i91u
-unsigned int i91u_debug = DEBUG_DEFAULT;
-#endif
-
-static Scsi_Host_Template driver_template = {
- .proc_name = "INI9100U",
- .name = i91u_REVID,
- .detect = i91u_detect,
- .release = i91u_release,
- .queuecommand = i91u_queue,
-// .abort = i91u_abort,
-// .reset = i91u_reset,
- .eh_bus_reset_handler = i91u_bus_reset,
- .bios_param = i91u_biosparam,
- .can_queue = 1,
- .this_id = 1,
- .sg_tablesize = SG_ALL,
- .cmd_per_lun = 1,
- .use_clustering = ENABLE_CLUSTERING,
-};
-#include "scsi_module.c"
-
-char *i91uCopyright = "Copyright (C) 1996-98";
-char *i91uInitioName = "by Initio Corporation";
-char *i91uProductName = "INI-9X00U/UW";
-char *i91uVersion = "v1.04a";
-
-#define TULSZ(sz) (sizeof(sz) / sizeof(sz[0]))
-#define TUL_RDWORD(x,y) (short)(inl((int)((ULONG)((ULONG)x+(UCHAR)y)) ))
-
-/* set by i91_setup according to the command line */
-static int setup_called = 0;
-
-static int tul_num_ch = 4; /* Maximum 4 adapters */
-static int tul_num_scb;
-static int tul_tag_enable = 1;
-static SCB *tul_scb;
-
-#ifdef DEBUG_i91u
-static int setup_debug = 0;
-#endif
-
-static char *setup_str = (char *) NULL;
-
-static void i91u_panic(char *msg);
-
-static void i91uSCBPost(BYTE * pHcb, BYTE * pScb);
-
- /* ---- EXTERNAL FUNCTIONS ---- */
- /* Get total number of adapters */
-extern void init_i91uAdapter_table(void);
-extern int Addi91u_into_Adapter_table(WORD, WORD, BYTE, BYTE, BYTE);
-extern int tul_ReturnNumberOfAdapters(void);
-extern void get_tulipPCIConfig(HCS * pHCB, int iChannel_index);
-extern int init_tulip(HCS * pHCB, SCB * pSCB, int tul_num_scb, BYTE * pbBiosAdr, int reset_time);
-extern SCB *tul_alloc_scb(HCS * pHCB);
-extern int tul_abort_srb(HCS * pHCB, Scsi_Cmnd * pSRB);
-extern void tul_exec_scb(HCS * pHCB, SCB * pSCB);
-extern void tul_release_scb(HCS * pHCB, SCB * pSCB);
-extern void tul_stop_bm(HCS * pHCB);
-extern int tul_reset_scsi(HCS * pCurHcb, int seconds);
-extern int tul_isr(HCS * pHCB);
-extern int tul_reset(HCS * pHCB, Scsi_Cmnd * pSRB, unsigned char target);
-extern int tul_reset_scsi_bus(HCS * pCurHcb);
-extern int tul_device_reset(HCS * pCurHcb, ULONG pSrb, unsigned int target, unsigned int ResetFlags);
- /* ---- EXTERNAL VARIABLES ---- */
-extern HCS tul_hcs[];
-
-const PCI_ID i91u_pci_devices[] = {
- { INI_VENDOR_ID, I950_DEVICE_ID },
- { INI_VENDOR_ID, I940_DEVICE_ID },
- { INI_VENDOR_ID, I935_DEVICE_ID },
- { INI_VENDOR_ID, I920_DEVICE_ID },
- { DMX_VENDOR_ID, I920_DEVICE_ID },
-};
-
-/*
- * queue services:
- */
-/*****************************************************************************
- Function name : i91uAppendSRBToQueue
- Description : This function will push current request into save list
- Input : pSRB - Pointer to SCSI request block.
- pHCB - Pointer to host adapter structure
- Output : None.
- Return : None.
-*****************************************************************************/
-static void i91uAppendSRBToQueue(HCS * pHCB, Scsi_Cmnd * pSRB)
-{
- ULONG flags;
- spin_lock_irqsave(&(pHCB->pSRB_lock), flags);
-
- pSRB->host_scribble = NULL; /* Pointer to next */
-
- if (pHCB->pSRB_head == NULL)
- pHCB->pSRB_head = pSRB;
- else
- pHCB->pSRB_tail->host_scribble = (char *)pSRB; /* Pointer to next */
- pHCB->pSRB_tail = pSRB;
-
- spin_unlock_irqrestore(&(pHCB->pSRB_lock), flags);
- return;
-}
-
-/*****************************************************************************
- Function name : i91uPopSRBFromQueue
- Description : This function will pop current request from save list
- Input : pHCB - Pointer to host adapter structure
- Output : None.
- Return : pSRB - Pointer to SCSI request block.
-*****************************************************************************/
-static Scsi_Cmnd *i91uPopSRBFromQueue(HCS * pHCB)
-{
- Scsi_Cmnd *pSRB;
- ULONG flags;
-
- spin_lock_irqsave(&(pHCB->pSRB_lock), flags);
-
- if ((pSRB = pHCB->pSRB_head) != NULL) {
- pHCB->pSRB_head = (struct scsi_cmnd *)pHCB->pSRB_head->host_scribble;
- pSRB->host_scribble = NULL;
- }
- spin_unlock_irqrestore(&(pHCB->pSRB_lock), flags);
-
- return (pSRB);
-}
-
-static irqreturn_t i91u_intr(int irqno, void *dev_id, struct pt_regs *regs)
-{
- struct Scsi_Host *dev = dev_id;
- unsigned long flags;
-
- spin_lock_irqsave(dev->host_lock, flags);
- tul_isr((HCS *)dev->base);
- spin_unlock_irqrestore(dev->host_lock, flags);
- return IRQ_HANDLED;
-}
-
-/* called from init/main.c */
-
-void i91u_setup(char *str, int *ints)
-{
- if (setup_called)
- i91u_panic("i91u: i91u_setup called twice.\n");
-
- setup_called = ints[0];
- setup_str = str;
-
-#ifdef DEBUG_i91u
- setup_debug = ints[0] >= 1 ? ints[1] : DEBUG_DEFAULT;
-#endif
-}
-
-int tul_NewReturnNumberOfAdapters(void)
-{
- struct pci_dev *pDev = NULL; /* Start from none */
- int iAdapters = 0;
- long dRegValue;
- WORD wBIOS;
- int i = 0;
-
- init_i91uAdapter_table();
-
- for (i = 0; i < TULSZ(i91u_pci_devices); i++)
- {
- while ((pDev = pci_find_device(i91u_pci_devices[i].vendor_id, i91u_pci_devices[i].device_id, pDev)) != NULL) {
- if (pci_enable_device(pDev))
- continue;
- pci_read_config_dword(pDev, 0x44, (u32 *) & dRegValue);
- wBIOS = (UWORD) (dRegValue & 0xFF);
- if (((dRegValue & 0xFF00) >> 8) == 0xFF)
- dRegValue = 0;
- wBIOS = (wBIOS << 8) + ((UWORD) ((dRegValue & 0xFF00) >> 8));
- if (pci_set_dma_mask(pDev, 0xffffffff)) {
- printk(KERN_WARNING
- "i91u: Could not set 32 bit DMA mask\n");
- continue;
- }
-
- if (Addi91u_into_Adapter_table(wBIOS,
- (pDev->resource[0].start),
- pDev->irq,
- pDev->bus->number,
- (pDev->devfn >> 3)
- ) == 0)
- iAdapters++;
- }
- }
-
- return (iAdapters);
-}
-
-int i91u_detect(Scsi_Host_Template * tpnt)
-{
- HCS *pHCB;
- struct Scsi_Host *hreg;
- unsigned long i; /* 01/14/98 */
- int ok = 0, iAdapters;
- ULONG dBiosAdr;
- BYTE *pbBiosAdr;
-
- tpnt->proc_name = "INI9100U";
-
- if (setup_called) { /* Setup by i91u_setup */
- printk("i91u: processing commandline: ");
-
-#ifdef DEBUG_i91u
- if (setup_called > 1) {
- printk("\ni91u: %s\n", setup_str);
- printk("i91u: usage: i91u[=<DEBUG>]\n");
- i91u_panic("i91u panics in line %d", __LINE__);
- }
- i91u_debug = setup_debug;
-#endif
- }
- /* Get total number of adapters in the motherboard */
- iAdapters = tul_NewReturnNumberOfAdapters();
- if (iAdapters == 0) /* If no tulip founded, return */
- return (0);
-
- tul_num_ch = (iAdapters > tul_num_ch) ? tul_num_ch : iAdapters;
- /* Update actually channel number */
- if (tul_tag_enable) { /* 1.01i */
- tul_num_scb = MAX_TARGETS * i91u_MAXQUEUE;
- } else {
- tul_num_scb = MAX_TARGETS + 3; /* 1-tape, 1-CD_ROM, 1- extra */
- } /* Update actually SCBs per adapter */
-
- /* Get total memory needed for HCS */
- i = tul_num_ch * sizeof(HCS);
- memset((unsigned char *) &tul_hcs[0], 0, i); /* Initialize tul_hcs 0 */
- /* Get total memory needed for SCB */
-
- for (; tul_num_scb >= MAX_TARGETS + 3; tul_num_scb--) {
- i = tul_num_ch * tul_num_scb * sizeof(SCB);
- if ((tul_scb = (SCB *) kmalloc(i, GFP_ATOMIC | GFP_DMA)) != NULL)
- break;
- }
- if (tul_scb == NULL) {
- printk("i91u: SCB memory allocation error\n");
- return (0);
- }
- memset((unsigned char *) tul_scb, 0, i);
-
- for (i = 0, pHCB = &tul_hcs[0]; /* Get pointer for control block */
- i < tul_num_ch;
- i++, pHCB++) {
- pHCB->pSRB_head = NULL; /* Initial SRB save queue */
- pHCB->pSRB_tail = NULL; /* Initial SRB save queue */
- pHCB->pSRB_lock = SPIN_LOCK_UNLOCKED; /* SRB save queue lock */
- get_tulipPCIConfig(pHCB, i);
-
- dBiosAdr = pHCB->HCS_BIOS;
- dBiosAdr = (dBiosAdr << 4);
-
- pbBiosAdr = phys_to_virt(dBiosAdr);
-
- init_tulip(pHCB, tul_scb + (i * tul_num_scb), tul_num_scb, pbBiosAdr, 10);
- request_region(pHCB->HCS_Base, 256, "i91u"); /* Register */
-
- pHCB->HCS_Index = i; /* 7/29/98 */
- hreg = scsi_register(tpnt, sizeof(HCS));
- if(hreg == NULL) {
- release_region(pHCB->HCS_Base, 256);
- return 0;
- }
- hreg->io_port = pHCB->HCS_Base;
- hreg->n_io_port = 0xff;
- hreg->can_queue = tul_num_scb; /* 03/05/98 */
- hreg->unique_id = pHCB->HCS_Base;
- hreg->max_id = pHCB->HCS_MaxTar;
- hreg->max_lun = 32; /* 10/21/97 */
- hreg->irq = pHCB->HCS_Intr;
- hreg->this_id = pHCB->HCS_SCSI_ID; /* Assign HCS index */
- hreg->base = (unsigned long)pHCB;
- hreg->sg_tablesize = TOTAL_SG_ENTRY; /* Maximun support is 32 */
-
- /* Initial tulip chip */
- ok = request_irq(pHCB->HCS_Intr, i91u_intr, SA_INTERRUPT | SA_SHIRQ, "i91u", hreg);
- if (ok < 0) {
- printk(KERN_WARNING "i91u: unable to request IRQ %d\n\n", pHCB->HCS_Intr);
- return 0;
- }
- }
-
- tpnt->this_id = -1;
- tpnt->can_queue = 1;
-
- return 1;
-}
-
-static void i91uBuildSCB(HCS * pHCB, SCB * pSCB, Scsi_Cmnd * SCpnt)
-{ /* Create corresponding SCB */
- struct scatterlist *pSrbSG;
- SG *pSG; /* Pointer to SG list */
- int i;
- long TotalLen;
- dma_addr_t dma_addr;
-
- pSCB->SCB_Post = i91uSCBPost; /* i91u's callback routine */
- pSCB->SCB_Srb = SCpnt;
- pSCB->SCB_Opcode = ExecSCSI;
- pSCB->SCB_Flags = SCF_POST; /* After SCSI done, call post routine */
- pSCB->SCB_Target = SCpnt->device->id;
- pSCB->SCB_Lun = SCpnt->device->lun;
- pSCB->SCB_Ident = SCpnt->device->lun | DISC_ALLOW;
-
- pSCB->SCB_Flags |= SCF_SENSE; /* Turn on auto request sense */
- dma_addr = dma_map_single(&pHCB->pci_dev->dev, SCpnt->sense_buffer,
- SENSE_SIZE, DMA_FROM_DEVICE);
- pSCB->SCB_SensePtr = cpu_to_le32((u32)dma_addr);
- pSCB->SCB_SenseLen = cpu_to_le32(SENSE_SIZE);
- SCpnt->SCp.ptr = (char *)(unsigned long)dma_addr;
-
- pSCB->SCB_CDBLen = SCpnt->cmd_len;
- pSCB->SCB_HaStat = 0;
- pSCB->SCB_TaStat = 0;
- memcpy(&pSCB->SCB_CDB[0], &SCpnt->cmnd, SCpnt->cmd_len);
-
- if (SCpnt->device->tagged_supported) { /* Tag Support */
- pSCB->SCB_TagMsg = SIMPLE_QUEUE_TAG; /* Do simple tag only */
- } else {
- pSCB->SCB_TagMsg = 0; /* No tag support */
- }
- /* todo handle map_sg error */
- if (SCpnt->use_sg) {
- dma_addr = dma_map_single(&pHCB->pci_dev->dev, &pSCB->SCB_SGList[0],
- sizeof(struct SG_Struc) * TOTAL_SG_ENTRY,
- DMA_BIDIRECTIONAL);
- pSCB->SCB_BufPtr = cpu_to_le32((u32)dma_addr);
- SCpnt->SCp.dma_handle = dma_addr;
-
- pSrbSG = (struct scatterlist *) SCpnt->request_buffer;
- pSCB->SCB_SGLen = dma_map_sg(&pHCB->pci_dev->dev, pSrbSG,
- SCpnt->use_sg, SCpnt->sc_data_direction);
-
- pSCB->SCB_Flags |= SCF_SG; /* Turn on SG list flag */
- for (i = 0, TotalLen = 0, pSG = &pSCB->SCB_SGList[0]; /* 1.01g */
- i < pSCB->SCB_SGLen; i++, pSG++, pSrbSG++) {
- pSG->SG_Ptr = cpu_to_le32((u32)sg_dma_address(pSrbSG));
- TotalLen += pSG->SG_Len = cpu_to_le32((u32)sg_dma_len(pSrbSG));
- }
-
- pSCB->SCB_BufLen = (SCpnt->request_bufflen > TotalLen) ?
- TotalLen : SCpnt->request_bufflen;
- } else if (SCpnt->request_bufflen) { /* Non SG */
- dma_addr = dma_map_single(&pHCB->pci_dev->dev, SCpnt->request_buffer,
- SCpnt->request_bufflen,
- SCpnt->sc_data_direction);
- SCpnt->SCp.dma_handle = dma_addr;
- pSCB->SCB_BufPtr = cpu_to_le32((u32)dma_addr);
- pSCB->SCB_BufLen = cpu_to_le32((u32)SCpnt->request_bufflen);
- pSCB->SCB_SGLen = 0;
- } else {
- pSCB->SCB_BufLen = 0;
- pSCB->SCB_SGLen = 0;
- }
-}
-
-/*
- * Queue a command and setup interrupts for a free bus.
- */
-int i91u_queue(Scsi_Cmnd * SCpnt, void (*done) (Scsi_Cmnd *))
-{
- register SCB *pSCB;
- HCS *pHCB; /* Point to Host adapter control block */
-
- if (SCpnt->device->lun > 16) { /* 07/22/98 */
-
- SCpnt->result = (DID_TIME_OUT << 16);
- done(SCpnt); /* Notify system DONE */
- return (0);
- }
- pHCB = (HCS *) SCpnt->device->host->base;
-
- SCpnt->scsi_done = done;
- /* Get free SCSI control block */
- if ((pSCB = tul_alloc_scb(pHCB)) == NULL) {
- i91uAppendSRBToQueue(pHCB, SCpnt); /* Buffer this request */
- return (0);
- }
- i91uBuildSCB(pHCB, pSCB, SCpnt);
- tul_exec_scb(pHCB, pSCB); /* Start execute SCB */
- return (0);
-}
-
-/*
- * Abort a queued command
- * (commands that are on the bus can't be aborted easily)
- */
-int i91u_abort(Scsi_Cmnd * SCpnt)
-{
- HCS *pHCB;
-
- pHCB = (HCS *) SCpnt->device->host->base;
- return tul_abort_srb(pHCB, SCpnt);
-}
-
-/*
- * Reset registers, reset a hanging bus and
- * kill active and disconnected commands for target w/o soft reset
- */
-int i91u_reset(Scsi_Cmnd * SCpnt, unsigned int reset_flags)
-{ /* I need Host Control Block Information */
- HCS *pHCB;
-
- pHCB = (HCS *) SCpnt->device->host->base;
-
- if (reset_flags & (SCSI_RESET_SUGGEST_BUS_RESET | SCSI_RESET_SUGGEST_HOST_RESET))
- return tul_reset_scsi_bus(pHCB);
- else
- return tul_device_reset(pHCB, (ULONG) SCpnt, SCpnt->device->id, reset_flags);
-}
-
-int i91u_bus_reset(Scsi_Cmnd * SCpnt)
-{
- HCS *pHCB;
-
- pHCB = (HCS *) SCpnt->device->host->base;
- tul_reset_scsi(pHCB, 0);
- return SUCCESS;
-}
-
-/*
- * Return the "logical geometry"
- */
-int i91u_biosparam(struct scsi_device *sdev, struct block_device *dev,
- sector_t capacity, int *info_array)
-{
- HCS *pHcb; /* Point to Host adapter control block */
- TCS *pTcb;
-
- pHcb = (HCS *) sdev->host->base;
- pTcb = &pHcb->HCS_Tcs[sdev->id];
-
- if (pTcb->TCS_DrvHead) {
- info_array[0] = pTcb->TCS_DrvHead;
- info_array[1] = pTcb->TCS_DrvSector;
- info_array[2] = (unsigned long)capacity / pTcb->TCS_DrvHead / pTcb->TCS_DrvSector;
- } else {
- if (pTcb->TCS_DrvFlags & TCF_DRV_255_63) {
- info_array[0] = 255;
- info_array[1] = 63;
- info_array[2] = (unsigned long)capacity / 255 / 63;
- } else {
- info_array[0] = 64;
- info_array[1] = 32;
- info_array[2] = (unsigned long)capacity >> 11;
- }
- }
-
-#if defined(DEBUG_BIOSPARAM)
- if (i91u_debug & debug_biosparam) {
- printk("bios geometry: head=%d, sec=%d, cyl=%d\n",
- info_array[0], info_array[1], info_array[2]);
- printk("WARNING: check, if the bios geometry is correct.\n");
- }
-#endif
-
- return 0;
-}
-
-static void i91u_unmap_cmnd(struct pci_dev *pci_dev, struct scsi_cmnd *cmnd)
-{
- /* auto sense buffer */
- if (cmnd->SCp.ptr) {
- dma_unmap_single(&pci_dev->dev,
- (dma_addr_t)((unsigned long)cmnd->SCp.ptr),
- SENSE_SIZE, SCSI_DATA_READ);
- cmnd->SCp.ptr = NULL;
- }
-
- /* request buffer */
- if (cmnd->use_sg) {
- dma_unmap_single(&pci_dev->dev, cmnd->SCp.dma_handle,
- sizeof(struct SG_Struc) * TOTAL_SG_ENTRY,
- DMA_BIDIRECTIONAL);
-
- dma_unmap_sg(&pci_dev->dev, cmnd->request_buffer,
- cmnd->use_sg,
- cmnd->sc_data_direction);
- } else if (cmnd->request_bufflen) {
- dma_unmap_single(&pci_dev->dev, cmnd->SCp.dma_handle,
- cmnd->request_bufflen,
- cmnd->sc_data_direction);
- }
-}
-
-/*****************************************************************************
- Function name : i91uSCBPost
- Description : This is callback routine be called when tulip finish one
- SCSI command.
- Input : pHCB - Pointer to host adapter control block.
- pSCB - Pointer to SCSI control block.
- Output : None.
- Return : None.
-*****************************************************************************/
-static void i91uSCBPost(BYTE * pHcb, BYTE * pScb)
-{
- Scsi_Cmnd *pSRB; /* Pointer to SCSI request block */
- HCS *pHCB;
- SCB *pSCB;
-
- pHCB = (HCS *) pHcb;
- pSCB = (SCB *) pScb;
- if ((pSRB = pSCB->SCB_Srb) == 0) {
- printk("i91uSCBPost: SRB pointer is empty\n");
-
- tul_release_scb(pHCB, pSCB); /* Release SCB for current channel */
- return;
- }
- switch (pSCB->SCB_HaStat) {
- case 0x0:
- case 0xa: /* Linked command complete without error and linked normally */
- case 0xb: /* Linked command complete without error interrupt generated */
- pSCB->SCB_HaStat = 0;
- break;
-
- case 0x11: /* Selection time out-The initiator selection or target
- reselection was not complete within the SCSI Time out period */
- pSCB->SCB_HaStat = DID_TIME_OUT;
- break;
-
- case 0x14: /* Target bus phase sequence failure-An invalid bus phase or bus
- phase sequence was requested by the target. The host adapter
- will generate a SCSI Reset Condition, notifying the host with
- a SCRD interrupt */
- pSCB->SCB_HaStat = DID_RESET;
- break;
-
- case 0x1a: /* SCB Aborted. 07/21/98 */
- pSCB->SCB_HaStat = DID_ABORT;
- break;
-
- case 0x12: /* Data overrun/underrun-The target attempted to transfer more data
- than was allocated by the Data Length field or the sum of the
- Scatter / Gather Data Length fields. */
- case 0x13: /* Unexpected bus free-The target dropped the SCSI BSY at an unexpected time. */
- case 0x16: /* Invalid SCB Operation Code. */
-
- default:
- printk("ini9100u: %x %x\n", pSCB->SCB_HaStat, pSCB->SCB_TaStat);
- pSCB->SCB_HaStat = DID_ERROR; /* Couldn't find any better */
- break;
- }
-
- pSRB->result = pSCB->SCB_TaStat | (pSCB->SCB_HaStat << 16);
-
- if (pSRB == NULL) {
- printk("pSRB is NULL\n");
- }
-
- i91u_unmap_cmnd(pHCB->pci_dev, pSRB);
- pSRB->scsi_done(pSRB); /* Notify system DONE */
- if ((pSRB = i91uPopSRBFromQueue(pHCB)) != NULL)
- /* Find the next pending SRB */
- { /* Assume resend will success */
- /* Reuse old SCB */
- i91uBuildSCB(pHCB, pSCB, pSRB); /* Create corresponding SCB */
-
- tul_exec_scb(pHCB, pSCB); /* Start execute SCB */
- } else { /* No Pending SRB */
- tul_release_scb(pHCB, pSCB); /* Release SCB for current channel */
- }
- return;
-}
-
-/*
- * Dump the current driver status and panic...
- */
-static void i91u_panic(char *msg)
-{
- printk("\ni91u_panic: %s\n", msg);
- panic("i91u panic");
-}
-
-/*
- * Release ressources
- */
-int i91u_release(struct Scsi_Host *hreg)
-{
- free_irq(hreg->irq, hreg);
- release_region(hreg->io_port, 256);
- return 0;
-}
-MODULE_LICENSE("Dual BSD/GPL");
+++ /dev/null
-/**************************************************************************
- * Initio 9100 device driver for Linux.
- *
- * Copyright (c) 1994-1998 Initio Corporation
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING. If not, write to
- * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * --------------------------------------------------------------------------
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * Where this Software is combined with software released under the terms of
- * the GNU General Public License ("GPL") and the terms of the GPL would require the
- * combined work to also be released under the terms of the GPL, the terms
- * and conditions of this License will apply in addition to those of the
- * GPL with the exception of any terms or conditions of this License that
- * conflict with, or are expressly prohibited by, the GPL.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *************************************************************************
- *
- * Module: ini9100u.h
- * Description: INI-9100U/UW LINUX device driver header
- * Revision History:
- * 06/18/96 Harry Chen, Initial Version 1.00A (Beta)
- * 06/23/98 hc - v1.01k
- * - Get it work for kernel version >= 2.1.75
- * 12/09/98 bv - v1.03a
- * - Removed unused code
- * 12/13/98 bv - v1.03b
- * - Add spinlocks to HCS structure.
- * 21/01/99 bv - v1.03e
- * - Added PCI_ID structure
- **************************************************************************/
-
-#ifndef CVT_LINUX_VERSION
-#define CVT_LINUX_VERSION(V,P,S) (((V) * 65536) + ((P) * 256) + (S))
-#endif
-
-#ifndef LINUX_VERSION_CODE
-#include <linux/version.h>
-#endif
-#include <linux/types.h>
-
-extern int i91u_detect(Scsi_Host_Template *);
-extern int i91u_release(struct Scsi_Host *);
-extern int i91u_command(Scsi_Cmnd *);
-extern int i91u_queue(Scsi_Cmnd *, void (*done) (Scsi_Cmnd *));
-extern int i91u_abort(Scsi_Cmnd *);
-extern int i91u_reset(Scsi_Cmnd *, unsigned int);
-extern int i91u_bus_reset(Scsi_Cmnd *);
-extern int i91u_biosparam(struct scsi_device *, struct block_device *,
- sector_t, int *);
-
-#define i91u_REVID "Initio INI-9X00U/UW SCSI device driver; Revision: 1.04a"
-
-#define VIRT_TO_BUS(i) (unsigned int) virt_to_bus((void *)(i))
-#define ULONG unsigned long
-#define USHORT unsigned short
-#define UCHAR unsigned char
-#define BYTE u8
-#define WORD unsigned short
-#define DWORD unsigned long
-#define UBYTE u8
-#define UWORD unsigned short
-#define UDWORD unsigned long
-#define U32 u32
-
-#ifndef TRUE
-#define TRUE (1) /* boolean true */
-#endif
-#ifndef FALSE
-#define FALSE (0) /* boolean false */
-#endif
-#ifndef FAILURE
-#define FAILURE (-1)
-#endif
-
-#define i91u_MAXQUEUE 2
-#define TOTAL_SG_ENTRY 32
-#define MAX_TARGETS 16
-#define SENSE_SIZE 14
-
-#define INI_VENDOR_ID 0x1101 /* Initio's PCI vendor ID */
-#define DMX_VENDOR_ID 0x134a /* Domex's PCI vendor ID */
-#define I950_DEVICE_ID 0x9500 /* Initio's inic-950 product ID */
-#define I940_DEVICE_ID 0x9400 /* Initio's inic-940 product ID */
-#define I935_DEVICE_ID 0x9401 /* Initio's inic-935 product ID */
-#define I920_DEVICE_ID 0x0002 /* Initio's other product ID */
-
-/************************************************************************/
-/* Vendor ID/Device ID Pair Structure */
-/************************************************************************/
-typedef struct PCI_ID_Struc {
- unsigned short vendor_id;
- unsigned short device_id;
-} PCI_ID;
-
-/************************************************************************/
-/* Scatter-Gather Element Structure */
-/************************************************************************/
-typedef struct SG_Struc {
- U32 SG_Ptr; /* Data Pointer */
- U32 SG_Len; /* Data Length */
-} SG;
-
-/***********************************************************************
- SCSI Control Block
-************************************************************************/
-typedef struct Scsi_Ctrl_Blk {
- U32 SCB_InitioReserved[9]; /* 0 */
-
- UBYTE SCB_Opcode; /*24 SCB command code */
- UBYTE SCB_Flags; /*25 SCB Flags */
- UBYTE SCB_Target; /*26 Target Id */
- UBYTE SCB_Lun; /*27 Lun */
- U32 SCB_BufPtr; /*28 Data Buffer Pointer */
- U32 SCB_BufLen; /*2C Data Allocation Length */
- UBYTE SCB_SGLen; /*30 SG list # */
- UBYTE SCB_SenseLen; /*31 Sense Allocation Length */
- UBYTE SCB_HaStat; /*32 */
- UBYTE SCB_TaStat; /*33 */
- UBYTE SCB_CDBLen; /*34 CDB Length */
- UBYTE SCB_Ident; /*35 Identify */
- UBYTE SCB_TagMsg; /*36 Tag Message */
- UBYTE SCB_TagId; /*37 Queue Tag */
- UBYTE SCB_CDB[12]; /*38 */
- U32 SCB_SGPAddr; /*44 SG List/Sense Buf phy. Addr. */
- U32 SCB_SensePtr; /*48 Sense data pointer */
- void (*SCB_Post) (BYTE *, BYTE *); /*4C POST routine */
- Scsi_Cmnd *SCB_Srb; /*50 SRB Pointer */
- SG SCB_SGList[TOTAL_SG_ENTRY]; /*54 Start of SG list */
-} SCB;
-
-/* Opcodes of SCB_Opcode */
-#define ExecSCSI 0x1
-#define BusDevRst 0x2
-#define AbortCmd 0x3
-
-/* Bit Definition for SCB_Flags */
-#define SCF_DONE 0x01
-#define SCF_POST 0x02
-#define SCF_SENSE 0x04
-#define SCF_DIR 0x18
-#define SCF_NO_DCHK 0x00
-#define SCF_DIN 0x08
-#define SCF_DOUT 0x10
-#define SCF_NO_XF 0x18
-#define SCF_POLL 0x40
-#define SCF_SG 0x80
-
-/* Error Codes for SCB_HaStat */
-#define HOST_SEL_TOUT 0x11
-#define HOST_DO_DU 0x12
-#define HOST_BUS_FREE 0x13
-#define HOST_BAD_PHAS 0x14
-#define HOST_INV_CMD 0x16
-#define HOST_SCSI_RST 0x1B
-#define HOST_DEV_RST 0x1C
-
-/* Error Codes for SCB_TaStat */
-#define TARGET_CHKCOND 0x02
-#define TARGET_BUSY 0x08
-
-/* Queue tag msg: Simple_quque_tag, Head_of_queue_tag, Ordered_queue_tag */
-#define MSG_STAG 0x20
-#define MSG_HTAG 0x21
-#define MSG_OTAG 0x22
-
-/***********************************************************************
- Target Device Control Structure
-**********************************************************************/
-
-typedef struct Tar_Ctrl_Struc {
- ULONG TCS_InitioReserved; /* 0 */
-
- UWORD TCS_DrvFlags; /* 4 */
- UBYTE TCS_DrvHead; /* 6 */
- UBYTE TCS_DrvSector; /* 7 */
-} TCS;
-
-/***********************************************************************
- Target Device Control Structure
-**********************************************************************/
-/* Bit Definition for TCF_DrvFlags */
-#define TCF_DRV_255_63 0x0400
-
-/***********************************************************************
- Host Adapter Control Structure
-************************************************************************/
-typedef struct Ha_Ctrl_Struc {
- UWORD HCS_Base; /* 00 */
- UWORD HCS_BIOS; /* 02 */
- UBYTE HCS_Intr; /* 04 */
- UBYTE HCS_SCSI_ID; /* 05 */
- UBYTE HCS_MaxTar; /* 06 */
- UBYTE HCS_NumScbs; /* 07 */
-
- UBYTE HCS_Flags; /* 08 */
- UBYTE HCS_Index; /* 09 */
- UBYTE HCS_Reserved[2]; /* 0a */
- ULONG HCS_InitioReserved[27]; /* 0C */
- TCS HCS_Tcs[16]; /* 78 -> 16 Targets */
- Scsi_Cmnd *pSRB_head; /* SRB save queue header */
- Scsi_Cmnd *pSRB_tail; /* SRB save queue tail */
- spinlock_t HCS_AvailLock;
- spinlock_t HCS_SemaphLock;
- spinlock_t pSRB_lock;
- struct pci_dev *pci_dev;
-} HCS;
-
-/* Bit Definition for HCB_Flags */
-#define HCF_EXPECT_RESET 0x10
-
-/* SCSI related definition */
-#define DISC_NOT_ALLOW 0x80 /* Disconnect is not allowed */
-#define DISC_ALLOW 0xC0 /* Disconnect is allowed */
+++ /dev/null
-/**************************************************************************
- * Initio A100 device driver for Linux.
- *
- * Copyright (c) 1994-1998 Initio Corporation
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING. If not, write to
- * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * --------------------------------------------------------------------------
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * Where this Software is combined with software released under the terms of
- * the GNU General Public License ("GPL") and the terms of the GPL would require the
- * combined work to also be released under the terms of the GPL, the terms
- * and conditions of this License will apply in addition to those of the
- * GPL with the exception of any terms or conditions of this License that
- * conflict with, or are expressly prohibited by, the GPL.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- **************************************************************************
- *
- * module: inia100.c
- * DESCRIPTION:
- * This is the Linux low-level SCSI driver for Initio INIA100 SCSI host
- * adapters
- * 09/24/98 hl - v1.02 initial production release.
- * 12/19/98 bv - v1.02a Use spinlocks for 2.1.95 and up.
- * 06/25/02 Doug Ledford <dledford@redhat.com> - v1.02d
- * - Remove limit on number of controllers
- * - Port to DMA mapping API
- * - Clean up interrupt handler registration
- * - Fix memory leaks
- * - Fix allocation of scsi host structs and private data
- * 18/11/03 Christoph Hellwig <hch@lst.de>
- * - Port to new probing API
- * - Fix some more leaks in init failure cases
- * TODO:
- * - use list.h macros for SCB queue
- * ( - merge with i60uscsi.c )
- **************************************************************************/
-
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/blkdev.h>
-#include <linux/spinlock.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-
-#include <scsi/scsi.h>
-#include <scsi/scsi_cmnd.h>
-#include <scsi/scsi_device.h>
-#include <scsi/scsi_host.h>
-
-#include "inia100.h"
-
-#define ORC_RDWORD(x,y) (short)(inl((int)((ULONG)((ULONG)x+(UCHAR)y)) ))
-
-char *inia100_Copyright = "Copyright (C) 1998-99";
-char *inia100_InitioName = "by Initio Corporation";
-char *inia100_ProductName = "INI-A100U2W";
-char *inia100_Version = "v1.02d";
-
-/* ---- EXTERNAL FUNCTIONS ---- */
-extern void inia100SCBPost(BYTE * pHcb, BYTE * pScb);
-extern int init_inia100Adapter_table(int);
-extern ORC_SCB *orc_alloc_scb(ORC_HCS * hcsp);
-extern void orc_exec_scb(ORC_HCS * hcsp, ORC_SCB * scbp);
-extern void orc_release_scb(ORC_HCS * hcsp, ORC_SCB * scbp);
-extern void orc_release_dma(ORC_HCS * hcsp, struct scsi_cmnd * cmnd);
-extern void orc_interrupt(ORC_HCS * hcsp);
-extern int orc_device_reset(ORC_HCS * pHCB, struct scsi_cmnd *SCpnt, unsigned int target);
-extern int orc_reset_scsi_bus(ORC_HCS * pHCB);
-extern int abort_SCB(ORC_HCS * hcsp, ORC_SCB * pScb);
-extern int orc_abort_srb(ORC_HCS * hcsp, struct scsi_cmnd *SCpnt);
-extern int init_orchid(ORC_HCS * hcsp);
-
-/*****************************************************************************
- Function name : inia100AppendSRBToQueue
- Description : This function will push current request into save list
- Input : pSRB - Pointer to SCSI request block.
- pHCB - Pointer to host adapter structure
- Output : None.
- Return : None.
-*****************************************************************************/
-static void inia100AppendSRBToQueue(ORC_HCS * pHCB, struct scsi_cmnd * pSRB)
-{
- ULONG flags;
-
- spin_lock_irqsave(&(pHCB->pSRB_lock), flags);
-
- pSRB->SCp.ptr = NULL; /* Pointer to next */
- if (pHCB->pSRB_head == NULL)
- pHCB->pSRB_head = pSRB;
- else
- pHCB->pSRB_tail->SCp.ptr = (char *)pSRB; /* Pointer to next */
- pHCB->pSRB_tail = pSRB;
- spin_unlock_irqrestore(&(pHCB->pSRB_lock), flags);
- return;
-}
-
-/*****************************************************************************
- Function name : inia100PopSRBFromQueue
- Description : This function will pop current request from save list
- Input : pHCB - Pointer to host adapter structure
- Output : None.
- Return : pSRB - Pointer to SCSI request block.
-*****************************************************************************/
-static struct scsi_cmnd *inia100PopSRBFromQueue(ORC_HCS * pHCB)
-{
- struct scsi_cmnd *pSRB;
- ULONG flags;
- spin_lock_irqsave(&(pHCB->pSRB_lock), flags);
- if ((pSRB = (struct scsi_cmnd *) pHCB->pSRB_head) != NULL) {
- pHCB->pSRB_head = (struct scsi_cmnd *) pHCB->pSRB_head->SCp.ptr;
- pSRB->SCp.ptr = NULL;
- }
- spin_unlock_irqrestore(&(pHCB->pSRB_lock), flags);
- return (pSRB);
-}
-
-/*****************************************************************************
- Function name : inia100BuildSCB
- Description :
- Input : pHCB - Pointer to host adapter structure
- Output : None.
- Return : pSRB - Pointer to SCSI request block.
-*****************************************************************************/
-static void inia100BuildSCB(ORC_HCS * pHCB, ORC_SCB * pSCB, struct scsi_cmnd * SCpnt)
-{ /* Create corresponding SCB */
- struct scatterlist *pSrbSG;
- ORC_SG *pSG; /* Pointer to SG list */
- int i, count_sg;
- U32 TotalLen;
- ESCB *pEScb;
-
- pEScb = pSCB->SCB_EScb;
- pEScb->SCB_Srb = SCpnt;
- pSG = NULL;
-
- pSCB->SCB_Opcode = ORC_EXECSCSI;
- pSCB->SCB_Flags = SCF_NO_DCHK; /* Clear done bit */
- pSCB->SCB_Target = SCpnt->device->id;
- pSCB->SCB_Lun = SCpnt->device->lun;
- pSCB->SCB_Reserved0 = 0;
- pSCB->SCB_Reserved1 = 0;
- pSCB->SCB_SGLen = 0;
-
- if ((pSCB->SCB_XferLen = (U32) SCpnt->request_bufflen)) {
- pSG = (ORC_SG *) & pEScb->ESCB_SGList[0];
- if (SCpnt->use_sg) {
- TotalLen = 0;
- pSrbSG = (struct scatterlist *) SCpnt->request_buffer;
- count_sg = pci_map_sg(pHCB->pdev, pSrbSG, SCpnt->use_sg,
- SCpnt->sc_data_direction);
- pSCB->SCB_SGLen = (U32) (count_sg * 8);
- for (i = 0; i < count_sg; i++, pSG++, pSrbSG++) {
- pSG->SG_Ptr = (U32) sg_dma_address(pSrbSG);
- pSG->SG_Len = (U32) sg_dma_len(pSrbSG);
- TotalLen += (U32) sg_dma_len(pSrbSG);
- }
- } else if (SCpnt->request_bufflen != 0) {/* Non SG */
- pSCB->SCB_SGLen = 0x8;
- pSG->SG_Ptr = (U32) pci_map_single(pHCB->pdev,
- SCpnt->request_buffer, SCpnt->request_bufflen,
- SCpnt->sc_data_direction);
- SCpnt->host_scribble = (void *)pSG->SG_Ptr;
- pSG->SG_Len = (U32) SCpnt->request_bufflen;
- } else {
- pSCB->SCB_SGLen = 0;
- pSG->SG_Ptr = 0;
- pSG->SG_Len = 0;
- }
- }
- pSCB->SCB_SGPAddr = (U32) pSCB->SCB_SensePAddr;
- pSCB->SCB_HaStat = 0;
- pSCB->SCB_TaStat = 0;
- pSCB->SCB_Link = 0xFF;
- pSCB->SCB_SenseLen = SENSE_SIZE;
- pSCB->SCB_CDBLen = SCpnt->cmd_len;
- if (pSCB->SCB_CDBLen >= IMAX_CDB) {
- printk("max cdb length= %x\b", SCpnt->cmd_len);
- pSCB->SCB_CDBLen = IMAX_CDB;
- }
- pSCB->SCB_Ident = SCpnt->device->lun | DISC_ALLOW;
- if (SCpnt->device->tagged_supported) { /* Tag Support */
- pSCB->SCB_TagMsg = SIMPLE_QUEUE_TAG; /* Do simple tag only */
- } else {
- pSCB->SCB_TagMsg = 0; /* No tag support */
- }
- memcpy(&pSCB->SCB_CDB[0], &SCpnt->cmnd, pSCB->SCB_CDBLen);
- return;
-}
-
-/*****************************************************************************
- Function name : inia100_queue
- Description : Queue a command and setup interrupts for a free bus.
- Input : pHCB - Pointer to host adapter structure
- Output : None.
- Return : pSRB - Pointer to SCSI request block.
-*****************************************************************************/
-static int inia100_queue(struct scsi_cmnd * SCpnt, void (*done) (struct scsi_cmnd *))
-{
- register ORC_SCB *pSCB;
- ORC_HCS *pHCB; /* Point to Host adapter control block */
-
- pHCB = (ORC_HCS *) SCpnt->device->host->hostdata;
- SCpnt->scsi_done = done;
- /* Get free SCSI control block */
- if ((pSCB = orc_alloc_scb(pHCB)) == NULL) {
- inia100AppendSRBToQueue(pHCB, SCpnt); /* Buffer this request */
- /* printk("inia100_entry: can't allocate SCB\n"); */
- return (0);
- }
- inia100BuildSCB(pHCB, pSCB, SCpnt);
- orc_exec_scb(pHCB, pSCB); /* Start execute SCB */
-
- return (0);
-}
-
-/*****************************************************************************
- Function name : inia100_abort
- Description : Abort a queued command.
- (commands that are on the bus can't be aborted easily)
- Input : pHCB - Pointer to host adapter structure
- Output : None.
- Return : pSRB - Pointer to SCSI request block.
-*****************************************************************************/
-static int inia100_abort(struct scsi_cmnd * SCpnt)
-{
- ORC_HCS *hcsp;
-
- hcsp = (ORC_HCS *) SCpnt->device->host->hostdata;
- return orc_abort_srb(hcsp, SCpnt);
-}
-
-/*****************************************************************************
- Function name : inia100_reset
- Description : Reset registers, reset a hanging bus and
- kill active and disconnected commands for target w/o soft reset
- Input : pHCB - Pointer to host adapter structure
- Output : None.
- Return : pSRB - Pointer to SCSI request block.
-*****************************************************************************/
-static int inia100_bus_reset(struct scsi_cmnd * SCpnt)
-{ /* I need Host Control Block Information */
- ORC_HCS *pHCB;
- pHCB = (ORC_HCS *) SCpnt->device->host->hostdata;
- return orc_reset_scsi_bus(pHCB);
-}
-
-/*****************************************************************************
- Function name : inia100_device_reset
- Description : Reset the device
- Input : pHCB - Pointer to host adapter structure
- Output : None.
- Return : pSRB - Pointer to SCSI request block.
-*****************************************************************************/
-static int inia100_device_reset(struct scsi_cmnd * SCpnt)
-{ /* I need Host Control Block Information */
- ORC_HCS *pHCB;
- pHCB = (ORC_HCS *) SCpnt->device->host->hostdata;
- return orc_device_reset(pHCB, SCpnt, SCpnt->device->id);
-
-}
-
-/*****************************************************************************
- Function name : inia100SCBPost
- Description : This is callback routine be called when orc finish one
- SCSI command.
- Input : pHCB - Pointer to host adapter control block.
- pSCB - Pointer to SCSI control block.
- Output : None.
- Return : None.
-*****************************************************************************/
-void inia100SCBPost(BYTE * pHcb, BYTE * pScb)
-{
- struct scsi_cmnd *pSRB; /* Pointer to SCSI request block */
- ORC_HCS *pHCB;
- ORC_SCB *pSCB;
- ESCB *pEScb;
-
- pHCB = (ORC_HCS *) pHcb;
- pSCB = (ORC_SCB *) pScb;
- pEScb = pSCB->SCB_EScb;
- if ((pSRB = (struct scsi_cmnd *) pEScb->SCB_Srb) == 0) {
- printk("inia100SCBPost: SRB pointer is empty\n");
- orc_release_scb(pHCB, pSCB); /* Release SCB for current channel */
- return;
- }
- pEScb->SCB_Srb = NULL;
-
- switch (pSCB->SCB_HaStat) {
- case 0x0:
- case 0xa: /* Linked command complete without error and linked normally */
- case 0xb: /* Linked command complete without error interrupt generated */
- pSCB->SCB_HaStat = 0;
- break;
-
- case 0x11: /* Selection time out-The initiator selection or target
- reselection was not complete within the SCSI Time out period */
- pSCB->SCB_HaStat = DID_TIME_OUT;
- break;
-
- case 0x14: /* Target bus phase sequence failure-An invalid bus phase or bus
- phase sequence was requested by the target. The host adapter
- will generate a SCSI Reset Condition, notifying the host with
- a SCRD interrupt */
- pSCB->SCB_HaStat = DID_RESET;
- break;
-
- case 0x1a: /* SCB Aborted. 07/21/98 */
- pSCB->SCB_HaStat = DID_ABORT;
- break;
-
- case 0x12: /* Data overrun/underrun-The target attempted to transfer more data
- than was allocated by the Data Length field or the sum of the
- Scatter / Gather Data Length fields. */
- case 0x13: /* Unexpected bus free-The target dropped the SCSI BSY at an unexpected time. */
- case 0x16: /* Invalid CCB Operation Code-The first byte of the CCB was invalid. */
-
- default:
- printk("inia100: %x %x\n", pSCB->SCB_HaStat, pSCB->SCB_TaStat);
- pSCB->SCB_HaStat = DID_ERROR; /* Couldn't find any better */
- break;
- }
-
- if (pSCB->SCB_TaStat == 2) { /* Check condition */
- memcpy((unsigned char *) &pSRB->sense_buffer[0],
- (unsigned char *) &pEScb->ESCB_SGList[0], SENSE_SIZE);
- }
- pSRB->result = pSCB->SCB_TaStat | (pSCB->SCB_HaStat << 16);
- orc_release_dma(pHCB, pSRB); /* release DMA before we call scsi_done */
- pSRB->scsi_done(pSRB); /* Notify system DONE */
-
- /* Find the next pending SRB */
- if ((pSRB = inia100PopSRBFromQueue(pHCB)) != NULL) { /* Assume resend will success */
- inia100BuildSCB(pHCB, pSCB, pSRB); /* Create corresponding SCB */
- orc_exec_scb(pHCB, pSCB); /* Start execute SCB */
- } else {
- orc_release_scb(pHCB, pSCB); /* Release SCB for current channel */
- }
- return;
-}
-
-/*
- * Interrupt handler (main routine of the driver)
- */
-static irqreturn_t inia100_intr(int irqno, void *devid, struct pt_regs *regs)
-{
- struct Scsi_Host *host = (struct Scsi_Host *)devid;
- ORC_HCS *pHcb = (ORC_HCS *)host->hostdata;
- unsigned long flags;
-
- spin_lock_irqsave(host->host_lock, flags);
- orc_interrupt(pHcb);
- spin_unlock_irqrestore(host->host_lock, flags);
-
- return IRQ_HANDLED;
-}
-
-static struct scsi_host_template inia100_template = {
- .proc_name = "inia100",
- .name = inia100_REVID,
- .queuecommand = inia100_queue,
- .eh_abort_handler = inia100_abort,
- .eh_bus_reset_handler = inia100_bus_reset,
- .eh_device_reset_handler = inia100_device_reset,
- .can_queue = 1,
- .this_id = 1,
- .sg_tablesize = SG_ALL,
- .cmd_per_lun = 1,
- .use_clustering = ENABLE_CLUSTERING,
-};
-
-static int __devinit inia100_probe_one(struct pci_dev *pdev,
- const struct pci_device_id *id)
-{
- struct Scsi_Host *shost;
- ORC_HCS *pHCB;
- unsigned long port, bios;
- int error = -ENODEV;
- u32 sz;
- unsigned long dBiosAdr;
- char *pbBiosAdr;
-
- if (pci_enable_device(pdev))
- goto out;
- if (pci_set_dma_mask(pdev, 0xffffffffULL)) {
- printk(KERN_WARNING "Unable to set 32bit DMA "
- "on inia100 adapter, ignoring.\n");
- goto out_disable_device;
- }
-
- pci_set_master(pdev);
-
- port = pci_resource_start(pdev, 0);
- if (!request_region(port, 256, "inia100")) {
- printk(KERN_WARNING "inia100: io port 0x%lx, is busy.\n", port);
- goto out_disable_device;
- }
-
- /* <02> read from base address + 0x50 offset to get the bios balue. */
- bios = ORC_RDWORD(port, 0x50);
-
-
- shost = scsi_host_alloc(&inia100_template, sizeof(ORC_HCS));
- if (!shost)
- goto out_release_region;
-
- pHCB = (ORC_HCS *)shost->hostdata;
- pHCB->pdev = pdev;
- pHCB->HCS_Base = port;
- pHCB->HCS_BIOS = bios;
- pHCB->pSRB_head = NULL; /* Initial SRB save queue */
- pHCB->pSRB_tail = NULL; /* Initial SRB save queue */
- pHCB->pSRB_lock = SPIN_LOCK_UNLOCKED; /* SRB save queue lock */
- pHCB->BitAllocFlagLock = SPIN_LOCK_UNLOCKED;
-
- /* Get total memory needed for SCB */
- sz = ORC_MAXQUEUE * sizeof(ORC_SCB);
- pHCB->HCS_virScbArray = pci_alloc_consistent(pdev, sz,
- &pHCB->HCS_physScbArray);
- if (!pHCB->HCS_virScbArray) {
- printk("inia100: SCB memory allocation error\n");
- goto out_host_put;
- }
- memset(pHCB->HCS_virScbArray, 0, sz);
-
- /* Get total memory needed for ESCB */
- sz = ORC_MAXQUEUE * sizeof(ESCB);
- pHCB->HCS_virEscbArray = pci_alloc_consistent(pdev, sz,
- &pHCB->HCS_physEscbArray);
- if (!pHCB->HCS_virEscbArray) {
- printk("inia100: ESCB memory allocation error\n");
- goto out_free_scb_array;
- }
- memset(pHCB->HCS_virEscbArray, 0, sz);
-
- dBiosAdr = pHCB->HCS_BIOS;
- dBiosAdr = (dBiosAdr << 4);
- pbBiosAdr = phys_to_virt(dBiosAdr);
- if (init_orchid(pHCB)) { /* Initialize orchid chip */
- printk("inia100: initial orchid fail!!\n");
- goto out_free_escb_array;
- }
-
- shost->io_port = pHCB->HCS_Base;
- shost->n_io_port = 0xff;
- shost->can_queue = ORC_MAXQUEUE;
- shost->unique_id = shost->io_port;
- shost->max_id = pHCB->HCS_MaxTar;
- shost->max_lun = 16;
- shost->irq = pHCB->HCS_Intr = pdev->irq;
- shost->this_id = pHCB->HCS_SCSI_ID; /* Assign HCS index */
- shost->sg_tablesize = TOTAL_SG_ENTRY;
-
- /* Initial orc chip */
- error = request_irq(pdev->irq, inia100_intr, SA_SHIRQ,
- "inia100", shost);
- if (error < 0) {
- printk(KERN_WARNING "inia100: unable to get irq %d\n",
- pdev->irq);
- goto out_free_escb_array;
- }
-
- pci_set_drvdata(pdev, shost);
-
- error = scsi_add_host(shost, &pdev->dev);
- if (error)
- goto out_free_irq;
-
- scsi_scan_host(shost);
- return 0;
-
- out_free_irq:
- free_irq(shost->irq, shost);
- out_free_escb_array:
- pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(ESCB),
- pHCB->HCS_virEscbArray, pHCB->HCS_physEscbArray);
- out_free_scb_array:
- pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(ORC_SCB),
- pHCB->HCS_virScbArray, pHCB->HCS_physScbArray);
- out_host_put:
- scsi_host_put(shost);
- out_release_region:
- release_region(port, 256);
- out_disable_device:
- pci_disable_device(pdev);
- out:
- return error;
-}
-
-static void __devexit inia100_remove_one(struct pci_dev *pdev)
-{
- struct Scsi_Host *shost = pci_get_drvdata(pdev);
- ORC_HCS *pHCB = (ORC_HCS *)shost->hostdata;
-
- scsi_remove_host(shost);
-
- free_irq(shost->irq, shost);
- pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(ESCB),
- pHCB->HCS_virEscbArray, pHCB->HCS_physEscbArray);
- pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(ORC_SCB),
- pHCB->HCS_virScbArray, pHCB->HCS_physScbArray);
- release_region(shost->io_port, 256);
-
- scsi_host_put(shost);
-}
-
-static struct pci_device_id inia100_pci_tbl[] = {
- {ORC_VENDOR_ID, ORC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {0,}
-};
-MODULE_DEVICE_TABLE(pci, inia100_pci_tbl);
-
-static struct pci_driver inia100_pci_driver = {
- .name = "inia100",
- .id_table = inia100_pci_tbl,
- .probe = inia100_probe_one,
- .remove = __devexit_p(inia100_remove_one),
-};
-
-static int __init inia100_init(void)
-{
- return pci_module_init(&inia100_pci_driver);
-}
-
-static void __exit inia100_exit(void)
-{
- pci_unregister_driver(&inia100_pci_driver);
-}
-
-MODULE_DESCRIPTION("Initio A100U2W SCSI driver");
-MODULE_AUTHOR("Initio Corporation");
-MODULE_LICENSE("Dual BSD/GPL");
-
-module_init(inia100_init);
-module_exit(inia100_exit);
+++ /dev/null
-/**************************************************************************
- * Initio A100 device driver for Linux.
- *
- * Copyright (c) 1994-1998 Initio Corporation
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING. If not, write to
- * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * --------------------------------------------------------------------------
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * Where this Software is combined with software released under the terms of
- * the GNU General Public License ("GPL") and the terms of the GPL would require the
- * combined work to also be released under the terms of the GPL, the terms
- * and conditions of this License will apply in addition to those of the
- * GPL with the exception of any terms or conditions of this License that
- * conflict with, or are expressly prohibited by, the GPL.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- **************************************************************************
- *
- * Module: inia100.h
- * Description: INI-A100U2W LINUX device driver header
- * Revision History:
- * 06/18/98 HL, Initial production Version 1.02
- * 12/19/98 bv, Use spinlocks for 2.1.95 and up
- * 06/25/02 Doug Ledford <dledford@redhat.com>
- * - This and the i60uscsi.h file are almost identical,
- * merged them into a single header used by both .c files.
- ****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-
-#define inia100_REVID "Initio INI-A100U2W SCSI device driver; Revision: 1.02d"
-
-#define ULONG unsigned long
-#define PVOID void *
-#define USHORT unsigned short
-#define UCHAR unsigned char
-#define BYTE unsigned char
-#define WORD unsigned short
-#define DWORD unsigned long
-#define UBYTE unsigned char
-#define UWORD unsigned short
-#define UDWORD unsigned long
-#define U32 u32
-
-#ifndef FAILURE
-#define FAILURE (-1)
-#endif
-#if 1
-#define ORC_MAXQUEUE 245
-#define ORC_MAXTAGS 64
-#else
-#define ORC_MAXQUEUE 25
-#define ORC_MAXTAGS 8
-#endif
-
-#define TOTAL_SG_ENTRY 32
-#define MAX_TARGETS 16
-#define IMAX_CDB 15
-#define SENSE_SIZE 14
-#define SUCCESSFUL 0x00
-
-#define I920_DEVICE_ID 0x0002 /* Initio's inic-950 product ID */
-
-/************************************************************************/
-/* Scatter-Gather Element Structure */
-/************************************************************************/
-typedef struct ORC_SG_Struc {
- U32 SG_Ptr; /* Data Pointer */
- U32 SG_Len; /* Data Length */
-} ORC_SG;
-
-/* SCSI related definition */
-#define DISC_NOT_ALLOW 0x80 /* Disconnect is not allowed */
-#define DISC_ALLOW 0xC0 /* Disconnect is allowed */
-
-
-#define ORC_OFFSET_SCB 16
-#define ORC_MAX_SCBS 250
-#define MAX_CHANNELS 2
-#define MAX_ESCB_ELE 64
-#define TCF_DRV_255_63 0x0400
-
-/********************************************************/
-/* Orchid Configuration Register Set */
-/********************************************************/
-#define ORC_PVID 0x00 /* Vendor ID */
-#define ORC_VENDOR_ID 0x1101 /* Orchid vendor ID */
-#define ORC_PDID 0x02 /* Device ID */
-#define ORC_DEVICE_ID 0x1060 /* Orchid device ID */
-#define ORC_COMMAND 0x04 /* Command */
-#define BUSMS 0x04 /* BUS MASTER Enable */
-#define IOSPA 0x01 /* IO Space Enable */
-#define ORC_STATUS 0x06 /* Status register */
-#define ORC_REVISION 0x08 /* Revision number */
-#define ORC_BASE 0x10 /* Base address */
-#define ORC_BIOS 0x50 /* Expansion ROM base address */
-#define ORC_INT_NUM 0x3C /* Interrupt line */
-#define ORC_INT_PIN 0x3D /* Interrupt pin */
-
-/********************************************************/
-/* Orchid Host Command Set */
-/********************************************************/
-#define ORC_CMD_NOP 0x00 /* Host command - NOP */
-#define ORC_CMD_VERSION 0x01 /* Host command - Get F/W version */
-#define ORC_CMD_ECHO 0x02 /* Host command - ECHO */
-#define ORC_CMD_SET_NVM 0x03 /* Host command - Set NVRAM */
-#define ORC_CMD_GET_NVM 0x04 /* Host command - Get NVRAM */
-#define ORC_CMD_GET_BUS_STATUS 0x05 /* Host command - Get SCSI bus status */
-#define ORC_CMD_ABORT_SCB 0x06 /* Host command - Abort SCB */
-#define ORC_CMD_ISSUE_SCB 0x07 /* Host command - Issue SCB */
-
-/********************************************************/
-/* Orchid Register Set */
-/********************************************************/
-#define ORC_GINTS 0xA0 /* Global Interrupt Status */
-#define QINT 0x04 /* Reply Queue Interrupt */
-#define ORC_GIMSK 0xA1 /* Global Interrupt MASK */
-#define MQINT 0x04 /* Mask Reply Queue Interrupt */
-#define ORC_GCFG 0xA2 /* Global Configure */
-#define EEPRG 0x01 /* Enable EEPROM programming */
-#define ORC_GSTAT 0xA3 /* Global status */
-#define WIDEBUS 0x10 /* Wide SCSI Devices connected */
-#define ORC_HDATA 0xA4 /* Host Data */
-#define ORC_HCTRL 0xA5 /* Host Control */
-#define SCSIRST 0x80 /* SCSI bus reset */
-#define HDO 0x40 /* Host data out */
-#define HOSTSTOP 0x02 /* Host stop RISC engine */
-#define DEVRST 0x01 /* Device reset */
-#define ORC_HSTUS 0xA6 /* Host Status */
-#define HDI 0x02 /* Host data in */
-#define RREADY 0x01 /* RISC engine is ready to receive */
-#define ORC_NVRAM 0xA7 /* Nvram port address */
-#define SE2CS 0x008
-#define SE2CLK 0x004
-#define SE2DO 0x002
-#define SE2DI 0x001
-#define ORC_PQUEUE 0xA8 /* Posting queue FIFO */
-#define ORC_PQCNT 0xA9 /* Posting queue FIFO Cnt */
-#define ORC_RQUEUE 0xAA /* Reply queue FIFO */
-#define ORC_RQUEUECNT 0xAB /* Reply queue FIFO Cnt */
-#define ORC_FWBASEADR 0xAC /* Firmware base address */
-
-#define ORC_EBIOSADR0 0xB0 /* External Bios address */
-#define ORC_EBIOSADR1 0xB1 /* External Bios address */
-#define ORC_EBIOSADR2 0xB2 /* External Bios address */
-#define ORC_EBIOSDATA 0xB3 /* External Bios address */
-
-#define ORC_SCBSIZE 0xB7 /* SCB size register */
-#define ORC_SCBBASE0 0xB8 /* SCB base address 0 */
-#define ORC_SCBBASE1 0xBC /* SCB base address 1 */
-
-#define ORC_RISCCTL 0xE0 /* RISC Control */
-#define PRGMRST 0x002
-#define DOWNLOAD 0x001
-#define ORC_PRGMCTR0 0xE2 /* RISC program counter */
-#define ORC_PRGMCTR1 0xE3 /* RISC program counter */
-#define ORC_RISCRAM 0xEC /* RISC RAM data port 4 bytes */
-
-typedef struct orc_extended_scb { /* Extended SCB */
- ORC_SG ESCB_SGList[TOTAL_SG_ENTRY]; /*0 Start of SG list */
- struct scsi_cmnd *SCB_Srb; /*50 SRB Pointer */
-} ESCB;
-
-/***********************************************************************
- SCSI Control Block
-************************************************************************/
-typedef struct orc_scb { /* Scsi_Ctrl_Blk */
- UBYTE SCB_Opcode; /*00 SCB command code&residual */
- UBYTE SCB_Flags; /*01 SCB Flags */
- UBYTE SCB_Target; /*02 Target Id */
- UBYTE SCB_Lun; /*03 Lun */
- U32 SCB_Reserved0; /*04 Reserved for ORCHID must 0 */
- U32 SCB_XferLen; /*08 Data Transfer Length */
- U32 SCB_Reserved1; /*0C Reserved for ORCHID must 0 */
- U32 SCB_SGLen; /*10 SG list # * 8 */
- U32 SCB_SGPAddr; /*14 SG List Buf physical Addr */
- U32 SCB_SGPAddrHigh; /*18 SG Buffer high physical Addr */
- UBYTE SCB_HaStat; /*1C Host Status */
- UBYTE SCB_TaStat; /*1D Target Status */
- UBYTE SCB_Status; /*1E SCB status */
- UBYTE SCB_Link; /*1F Link pointer, default 0xFF */
- UBYTE SCB_SenseLen; /*20 Sense Allocation Length */
- UBYTE SCB_CDBLen; /*21 CDB Length */
- UBYTE SCB_Ident; /*22 Identify */
- UBYTE SCB_TagMsg; /*23 Tag Message */
- UBYTE SCB_CDB[IMAX_CDB]; /*24 SCSI CDBs */
- UBYTE SCB_ScbIdx; /*3C Index for this ORCSCB */
- U32 SCB_SensePAddr; /*34 Sense Buffer physical Addr */
-
- ESCB *SCB_EScb; /*38 Extended SCB Pointer */
-#ifndef ALPHA
- UBYTE SCB_Reserved2[4]; /*3E Reserved for Driver use */
-#endif
-} ORC_SCB;
-
-/* Opcodes of ORCSCB_Opcode */
-#define ORC_EXECSCSI 0x00 /* SCSI initiator command with residual */
-#define ORC_BUSDEVRST 0x01 /* SCSI Bus Device Reset */
-
-/* Status of ORCSCB_Status */
-#define ORCSCB_COMPLETE 0x00 /* SCB request completed */
-#define ORCSCB_POST 0x01 /* SCB is posted by the HOST */
-
-/* Bit Definition for ORCSCB_Flags */
-#define SCF_DISINT 0x01 /* Disable HOST interrupt */
-#define SCF_DIR 0x18 /* Direction bits */
-#define SCF_NO_DCHK 0x00 /* Direction determined by SCSI */
-#define SCF_DIN 0x08 /* From Target to Initiator */
-#define SCF_DOUT 0x10 /* From Initiator to Target */
-#define SCF_NO_XF 0x18 /* No data transfer */
-#define SCF_POLL 0x40
-
-/* Error Codes for ORCSCB_HaStat */
-#define HOST_SEL_TOUT 0x11
-#define HOST_DO_DU 0x12
-#define HOST_BUS_FREE 0x13
-#define HOST_BAD_PHAS 0x14
-#define HOST_INV_CMD 0x16
-#define HOST_SCSI_RST 0x1B
-#define HOST_DEV_RST 0x1C
-
-
-/* Error Codes for ORCSCB_TaStat */
-#define TARGET_CHK_COND 0x02
-#define TARGET_BUSY 0x08
-#define TARGET_TAG_FULL 0x28
-
-
-/* Queue tag msg: Simple_quque_tag, Head_of_queue_tag, Ordered_queue_tag */
-#define MSG_STAG 0x20
-#define MSG_HTAG 0x21
-#define MSG_OTAG 0x22
-
-#define MSG_IGNOREWIDE 0x23
-
-#define MSG_IDENT 0x80
-#define MSG_DISC 0x40 /* Disconnect allowed */
-
-
-/* SCSI MESSAGE */
-#define MSG_EXTEND 0x01
-#define MSG_SDP 0x02
-#define MSG_ABORT 0x06
-#define MSG_REJ 0x07
-#define MSG_NOP 0x08
-#define MSG_PARITY 0x09
-#define MSG_DEVRST 0x0C
-#define MSG_STAG 0x20
-
-/***********************************************************************
- Target Device Control Structure
-**********************************************************************/
-
-typedef struct ORC_Tar_Ctrl_Struc {
- UBYTE TCS_DrvDASD; /* 6 */
- UBYTE TCS_DrvSCSI; /* 7 */
- UBYTE TCS_DrvHead; /* 8 */
- UWORD TCS_DrvFlags; /* 4 */
- UBYTE TCS_DrvSector; /* 7 */
-} ORC_TCS, *PORC_TCS;
-
-/* Bit Definition for TCF_DrvFlags */
-#define TCS_DF_NODASD_SUPT 0x20 /* Suppress OS/2 DASD Mgr support */
-#define TCS_DF_NOSCSI_SUPT 0x40 /* Suppress OS/2 SCSI Mgr support */
-
-
-/***********************************************************************
- Host Adapter Control Structure
-************************************************************************/
-typedef struct ORC_Ha_Ctrl_Struc {
- USHORT HCS_Base; /* 00 */
- UBYTE HCS_Index; /* 02 */
- UBYTE HCS_Intr; /* 04 */
- UBYTE HCS_SCSI_ID; /* 06 H/A SCSI ID */
- UBYTE HCS_BIOS; /* 07 BIOS configuration */
-
- UBYTE HCS_Flags; /* 0B */
- UBYTE HCS_HAConfig1; /* 1B SCSI0MAXTags */
- UBYTE HCS_MaxTar; /* 1B SCSI0MAXTags */
-
- USHORT HCS_Units; /* Number of units this adapter */
- USHORT HCS_AFlags; /* Adapter info. defined flags */
- ULONG HCS_Timeout; /* Adapter timeout value */
- PVOID HCS_virScbArray; /* 28 Virtual Pointer to SCB array */
- dma_addr_t HCS_physScbArray; /* Scb Physical address */
- PVOID HCS_virEscbArray; /* Virtual pointer to ESCB Scatter list */
- dma_addr_t HCS_physEscbArray; /* scatter list Physical address */
- UBYTE TargetFlag[16]; /* 30 target configuration, TCF_EN_TAG */
- UBYTE MaximumTags[16]; /* 40 ORC_MAX_SCBS */
- UBYTE ActiveTags[16][16]; /* 50 */
- ORC_TCS HCS_Tcs[16]; /* 28 */
- U32 BitAllocFlag[MAX_CHANNELS][8]; /* Max STB is 256, So 256/32 */
- spinlock_t BitAllocFlagLock;
- struct scsi_cmnd *pSRB_head;
- struct scsi_cmnd *pSRB_tail;
- spinlock_t pSRB_lock;
- struct pci_dev *pdev;
-} ORC_HCS;
-
-/* Bit Definition for HCS_Flags */
-
-#define HCF_SCSI_RESET 0x01 /* SCSI BUS RESET */
-#define HCF_PARITY 0x02 /* parity card */
-#define HCF_LVDS 0x10 /* parity card */
-
-/* Bit Definition for TargetFlag */
-
-#define TCF_EN_255 0x08
-#define TCF_EN_TAG 0x10
-#define TCF_BUSY 0x20
-#define TCF_DISCONNECT 0x40
-#define TCF_SPIN_UP 0x80
-
-/* Bit Definition for HCS_AFlags */
-#define HCS_AF_IGNORE 0x01 /* Adapter ignore */
-#define HCS_AF_DISABLE_RESET 0x10 /* Adapter disable reset */
-#define HCS_AF_DISABLE_ADPT 0x80 /* Adapter disable */
-
-
-/*---------------------------------------*/
-/* TimeOut for RESET to complete (30s) */
-/* */
-/* After a RESET the drive is checked */
-/* every 200ms. */
-/*---------------------------------------*/
-#define DELAYED_RESET_MAX (30*1000L)
-#define DELAYED_RESET_INTERVAL 200L
-
-/*----------------------------------------------*/
-/* TimeOut for IRQ from last interrupt (5s) */
-/*----------------------------------------------*/
-#define IRQ_TIMEOUT_INTERVAL (5*1000L)
-
-/*----------------------------------------------*/
-/* Retry Delay interval (200ms) */
-/*----------------------------------------------*/
-#define DELAYED_RETRY_INTERVAL 200L
-
-#define INQUIRY_SIZE 36
-#define CAPACITY_SIZE 8
-#define DEFAULT_SENSE_LEN 14
-
-#define DEVICE_NOT_FOUND 0x86
-
-/*----------------------------------------------*/
-/* Definition for PCI device */
-/*----------------------------------------------*/
-#define MAX_PCI_DEVICES 21
-#define MAX_PCI_BUSES 8
-
-typedef struct Adpt_Struc {
- USHORT ADPT_BIOS; /* 0 */
- UBYTE ADPT_BASE; /* 1 */
- UBYTE ADPT_Bus; /* 2 */
- UBYTE ADPT_Device; /* 3 */
- UBYTE ADPT_Reserved[3];
-} JACS, *PJACS;
-
-typedef struct _NVRAM {
-/*----------header ---------------*/
- UCHAR SubVendorID0; /* 00 - Sub Vendor ID */
- UCHAR SubVendorID1; /* 00 - Sub Vendor ID */
- UCHAR SubSysID0; /* 02 - Sub System ID */
- UCHAR SubSysID1; /* 02 - Sub System ID */
- UCHAR SubClass; /* 04 - Sub Class */
- UCHAR VendorID0; /* 05 - Vendor ID */
- UCHAR VendorID1; /* 05 - Vendor ID */
- UCHAR DeviceID0; /* 07 - Device ID */
- UCHAR DeviceID1; /* 07 - Device ID */
- UCHAR Reserved0[2]; /* 09 - Reserved */
- UCHAR Revision; /* 0B - Revision of data structure */
- /* ----Host Adapter Structure ---- */
- UCHAR NumOfCh; /* 0C - Number of SCSI channel */
- UCHAR BIOSConfig1; /* 0D - BIOS configuration 1 */
- UCHAR BIOSConfig2; /* 0E - BIOS boot channel&target ID */
- UCHAR BIOSConfig3; /* 0F - BIOS configuration 3 */
- /* ----SCSI channel Structure ---- */
- /* from "CTRL-I SCSI Host Adapter SetUp menu " */
- UCHAR SCSI0Id; /* 10 - Channel 0 SCSI ID */
- UCHAR SCSI0Config; /* 11 - Channel 0 SCSI configuration */
- UCHAR SCSI0MaxTags; /* 12 - Channel 0 Maximum tags */
- UCHAR SCSI0ResetTime; /* 13 - Channel 0 Reset recovering time */
- UCHAR ReservedforChannel0[2]; /* 14 - Reserved */
-
- /* ----SCSI target Structure ---- */
- /* from "CTRL-I SCSI device SetUp menu " */
- UCHAR Target00Config; /* 16 - Channel 0 Target 0 config */
- UCHAR Target01Config; /* 17 - Channel 0 Target 1 config */
- UCHAR Target02Config; /* 18 - Channel 0 Target 2 config */
- UCHAR Target03Config; /* 19 - Channel 0 Target 3 config */
- UCHAR Target04Config; /* 1A - Channel 0 Target 4 config */
- UCHAR Target05Config; /* 1B - Channel 0 Target 5 config */
- UCHAR Target06Config; /* 1C - Channel 0 Target 6 config */
- UCHAR Target07Config; /* 1D - Channel 0 Target 7 config */
- UCHAR Target08Config; /* 1E - Channel 0 Target 8 config */
- UCHAR Target09Config; /* 1F - Channel 0 Target 9 config */
- UCHAR Target0AConfig; /* 20 - Channel 0 Target A config */
- UCHAR Target0BConfig; /* 21 - Channel 0 Target B config */
- UCHAR Target0CConfig; /* 22 - Channel 0 Target C config */
- UCHAR Target0DConfig; /* 23 - Channel 0 Target D config */
- UCHAR Target0EConfig; /* 24 - Channel 0 Target E config */
- UCHAR Target0FConfig; /* 25 - Channel 0 Target F config */
-
- UCHAR SCSI1Id; /* 26 - Channel 1 SCSI ID */
- UCHAR SCSI1Config; /* 27 - Channel 1 SCSI configuration */
- UCHAR SCSI1MaxTags; /* 28 - Channel 1 Maximum tags */
- UCHAR SCSI1ResetTime; /* 29 - Channel 1 Reset recovering time */
- UCHAR ReservedforChannel1[2]; /* 2A - Reserved */
-
- /* ----SCSI target Structure ---- */
- /* from "CTRL-I SCSI device SetUp menu " */
- UCHAR Target10Config; /* 2C - Channel 1 Target 0 config */
- UCHAR Target11Config; /* 2D - Channel 1 Target 1 config */
- UCHAR Target12Config; /* 2E - Channel 1 Target 2 config */
- UCHAR Target13Config; /* 2F - Channel 1 Target 3 config */
- UCHAR Target14Config; /* 30 - Channel 1 Target 4 config */
- UCHAR Target15Config; /* 31 - Channel 1 Target 5 config */
- UCHAR Target16Config; /* 32 - Channel 1 Target 6 config */
- UCHAR Target17Config; /* 33 - Channel 1 Target 7 config */
- UCHAR Target18Config; /* 34 - Channel 1 Target 8 config */
- UCHAR Target19Config; /* 35 - Channel 1 Target 9 config */
- UCHAR Target1AConfig; /* 36 - Channel 1 Target A config */
- UCHAR Target1BConfig; /* 37 - Channel 1 Target B config */
- UCHAR Target1CConfig; /* 38 - Channel 1 Target C config */
- UCHAR Target1DConfig; /* 39 - Channel 1 Target D config */
- UCHAR Target1EConfig; /* 3A - Channel 1 Target E config */
- UCHAR Target1FConfig; /* 3B - Channel 1 Target F config */
- UCHAR reserved[3]; /* 3C - Reserved */
- /* ---------- CheckSum ---------- */
- UCHAR CheckSum; /* 3F - Checksum of NVRam */
-} NVRAM, *PNVRAM;
-
-/* Bios Configuration for nvram->BIOSConfig1 */
-#define NBC_BIOSENABLE 0x01 /* BIOS enable */
-#define NBC_CDROM 0x02 /* Support bootable CDROM */
-#define NBC_REMOVABLE 0x04 /* Support removable drive */
-
-/* Bios Configuration for nvram->BIOSConfig2 */
-#define NBB_TARGET_MASK 0x0F /* Boot SCSI target ID number */
-#define NBB_CHANL_MASK 0xF0 /* Boot SCSI channel number */
-
-/* Bit definition for nvram->SCSIConfig */
-#define NCC_BUSRESET 0x01 /* Reset SCSI bus at power up */
-#define NCC_PARITYCHK 0x02 /* SCSI parity enable */
-#define NCC_LVDS 0x10 /* Enable LVDS */
-#define NCC_ACTTERM1 0x20 /* Enable active terminator 1 */
-#define NCC_ACTTERM2 0x40 /* Enable active terminator 2 */
-#define NCC_AUTOTERM 0x80 /* Enable auto termination */
-
-/* Bit definition for nvram->TargetxConfig */
-#define NTC_PERIOD 0x07 /* Maximum Sync. Speed */
-#define NTC_1GIGA 0x08 /* 255 head / 63 sectors (64/32) */
-#define NTC_NO_SYNC 0x10 /* NO SYNC. NEGO */
-#define NTC_NO_WIDESYNC 0x20 /* NO WIDE SYNC. NEGO */
-#define NTC_DISC_ENABLE 0x40 /* Enable SCSI disconnect */
-#define NTC_SPINUP 0x80 /* Start disk drive */
-
-/* Default NVRam values */
-#define NBC_DEFAULT (NBC_ENABLE)
-#define NCC_DEFAULT (NCC_BUSRESET | NCC_AUTOTERM | NCC_PARITYCHK)
-#define NCC_MAX_TAGS 0x20 /* Maximum tags per target */
-#define NCC_RESET_TIME 0x0A /* SCSI RESET recovering time */
-#define NTC_DEFAULT (NTC_1GIGA | NTC_NO_WIDESYNC | NTC_DISC_ENABLE)
-
-typedef union { /* Union define for mechanism 1 */
- struct {
- unsigned char RegNum;
- unsigned char FcnNum:3;
- unsigned char DeviceNum:5;
- unsigned char BusNum;
- unsigned char Reserved:7;
- unsigned char Enable:1;
- } sConfigAdr;
- unsigned long lConfigAdr;
-} CONFIG_ADR;
-
-typedef union { /* Union define for mechanism 2 */
- struct {
- unsigned char RegNum;
- unsigned char DeviceNum;
- unsigned short Reserved;
- } sHostAdr;
- unsigned long lHostAdr;
-} HOST_ADR;
-
-#define ORC_RD(x,y) (UCHAR)(inb( (int)((ULONG)((ULONG)x+(UCHAR)y)) ))
-#define ORC_RDLONG(x,y) (long)(inl((int)((ULONG)((ULONG)x+(UCHAR)y)) ))
-
-#define ORC_WR( adr,data) outb( (UCHAR)(data), (int)(adr))
-#define ORC_WRSHORT(adr,data) outw( (UWORD)(data), (int)(adr))
-#define ORC_WRLONG( adr,data) outl( (ULONG)(data), (int)(adr))
-
-
-
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8 -*- */
-
-/* PARISC LASI driver for the 53c700 chip
- *
- * Copyright (C) 2001 by James.Bottomley@HansenPartnership.com
-**-----------------------------------------------------------------------------
-**
-** This program is free software; you can redistribute it and/or modify
-** it under the terms of the GNU General Public License as published by
-** the Free Software Foundation; either version 2 of the License, or
-** (at your option) any later version.
-**
-** This program is distributed in the hope that it will be useful,
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-** GNU General Public License for more details.
-**
-** You should have received a copy of the GNU General Public License
-** along with this program; if not, write to the Free Software
-** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-**
-**-----------------------------------------------------------------------------
- */
-
-#ifndef _LASI700_H
-#define _LASI700_H
-
-#define LASI_710_SVERSION 0x082
-#define LASI_700_SVERSION 0x071
-
-#define LASI700_ID_TABLE { \
- .hw_type = HPHW_FIO, \
- .sversion = LASI_700_SVERSION, \
- .hversion = HVERSION_ANY_ID, \
- .hversion_rev = HVERSION_REV_ANY_ID, \
-}
-
-#define LASI710_ID_TABLE { \
- .hw_type = HPHW_FIO, \
- .sversion = LASI_710_SVERSION, \
- .hversion = HVERSION_ANY_ID, \
- .hversion_rev = HVERSION_REV_ANY_ID, \
-}
-
-#define LASI700_CLOCK 25
-#define LASI710_CLOCK 40
-#define LASI_SCSI_CORE_OFFSET 0x100
-
-#endif
+++ /dev/null
-# Driver for Emulex LightPulse fibre channel host bus adapters.
-EXTRA_CFLAGS += -DFC_TRANS_VER1
-obj-$(CONFIG_SCSI_LPFC) := lpfc.o
-
-lpfc-objs := lpfc_mem.o lpfc_sli.o lpfc_ct.o lpfc_els.o \
-lpfc_hbadisc.o lpfc_init.o lpfc_mbox.o lpfc_nportdisc.o lpfc_scsiport.o \
-lpfc_fcp.o
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc.h 1.134 2004/11/18 14:53:45EST sf_support Exp $
- */
-
-#ifndef _H_LPFC
-#define _H_LPFC
-
-struct lpfc_sli2_slim;
-
-#define LPFC_MAX_TARGET 256 /* max nunber of targets
- supported */
-#define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
- requests */
-#define LPFC_MAX_NS_RETRY 3 /* Try to get to the NameServer
- 3 times and then give up. */
-#define LPFC_DFT_HBA_Q_DEPTH 2048 /* max cmds per hba */
-#define LPFC_LC_HBA_Q_DEPTH 1024 /* max cmds per low cost hba */
-#define LPFC_LP101_HBA_Q_DEPTH 128 /* max cmds per low cost hba */
-
-/* Define the SLIM2 page size. */
-#define LPFC_SLIM2_PAGE_AREA 8192
-
-/* Define macros for 64 bit support */
-#define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
-#define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
-#define getPaddr(high, low) ((dma_addr_t)( \
- (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
-/* Provide maximum configuration definitions. */
-#define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
-#define MAX_FCP_TARGET 256 /* max num of FCP targets supported */
-#define FC_MAX_ADPTMSG 64
-
-#define MAX_HBAEVT 32
-
-#if __LITTLE_ENDIAN
-
-#define putLunLow(lunlow, lun) \
- { \
- lunlow = 0; \
- }
-
-#define putLunHigh(lunhigh, lun) \
- { \
- lunhigh = swab16(lun); \
- }
-
-#else /* BIG_ENDIAN_HOST */
-
-#define putLunLow(lunlow, lun) \
- { \
- lunlow = 0; \
- }
-
-#define putLunHigh(lunhigh, lun) \
- { \
- lunhigh = (uint32_t)(lun << 16); \
- }
-#endif
-
-/****************************************************************************/
-/* Device VPD save area */
-/****************************************************************************/
-typedef struct lpfc_vpd {
- uint32_t status; /* vpd status value */
- uint32_t length; /* number of bytes actually returned */
- struct {
- uint32_t rsvd1; /* Revision numbers */
- uint32_t biuRev;
- uint32_t smRev;
- uint32_t smFwRev;
- uint32_t endecRev;
- uint16_t rBit;
- uint8_t fcphHigh;
- uint8_t fcphLow;
- uint8_t feaLevelHigh;
- uint8_t feaLevelLow;
- uint32_t postKernRev;
- uint32_t opFwRev;
- uint8_t opFwName[16];
- uint32_t sli1FwRev;
- uint8_t sli1FwName[16];
- uint32_t sli2FwRev;
- uint8_t sli2FwName[16];
- } rev;
-} lpfc_vpd_t;
-
-struct lpfc_scsi_buf;
-
-struct lpfc_hba_event {
- uint32_t fc_eventcode;
- uint32_t fc_evdata1;
- uint32_t fc_evdata2;
- uint32_t fc_evdata3;
- uint32_t fc_evdata4;
-};
-
-/*
- * lpfc stat counters
- */
-struct lpfc_stats {
- /* Statistics for ELS commands */
- uint32_t elsLogiCol;
- uint32_t elsRetryExceeded;
- uint32_t elsXmitRetry;
- uint32_t elsDelayRetry;
- uint32_t elsRcvDrop;
- uint32_t elsRcvFrame;
- uint32_t elsRcvRSCN;
- uint32_t elsRcvRNID;
- uint32_t elsRcvFARP;
- uint32_t elsRcvFARPR;
- uint32_t elsRcvFLOGI;
- uint32_t elsRcvPLOGI;
- uint32_t elsRcvADISC;
- uint32_t elsRcvPDISC;
- uint32_t elsRcvFAN;
- uint32_t elsRcvLOGO;
- uint32_t elsRcvPRLO;
- uint32_t elsRcvPRLI;
- uint32_t elsRcvRRQ;
- uint32_t elsXmitFLOGI;
- uint32_t elsXmitPLOGI;
- uint32_t elsXmitPRLI;
- uint32_t elsXmitADISC;
- uint32_t elsXmitLOGO;
- uint32_t elsXmitSCR;
- uint32_t elsXmitRNID;
- uint32_t elsXmitFARP;
- uint32_t elsXmitFARPR;
- uint32_t elsXmitACC;
- uint32_t elsXmitLSRJT;
-
- uint32_t frameRcvBcast;
- uint32_t frameRcvMulti;
- uint32_t strayXmitCmpl;
- uint32_t frameXmitDelay;
- uint32_t xriCmdCmpl;
- uint32_t xriStatErr;
- uint32_t LinkUp;
- uint32_t LinkDown;
- uint32_t LinkMultiEvent;
- uint32_t NoRcvBuf;
- uint32_t fcpCmd;
- uint32_t fcpCmpl;
- uint32_t fcpRspErr;
- uint32_t fcpRemoteStop;
- uint32_t fcpPortRjt;
- uint32_t fcpPortBusy;
- uint32_t fcpError;
- uint32_t fcpLocalErr;
-};
-
-enum sysfs_mbox_state {
- SMBOX_IDLE,
- SMBOX_WRITING,
- SMBOX_READING
-};
-
-struct lpfc_sysfs_mbox {
- enum sysfs_mbox_state state;
- size_t offset;
- struct lpfcMboxq * mbox;
-};
-
-struct lpfc_hba {
- uint32_t intr_inited; /* flag for interrupt registration */
- struct list_head hba_list; /* List of hbas/ports */
- struct lpfc_sli sli;
- struct lpfc_sli2_slim *slim2p;
- dma_addr_t slim2p_mapping;
-
- uint32_t hba_state;
-
-#define LPFC_INIT_START 1 /* Initial state after board reset */
-#define LPFC_INIT_MBX_CMDS 2 /* Initialize HBA with mbox commands */
-#define LPFC_LINK_DOWN 3 /* HBA initialized, link is down */
-#define LPFC_LINK_UP 4 /* Link is up - issue READ_LA */
-#define LPFC_LOCAL_CFG_LINK 5 /* local NPORT Id configured */
-#define LPFC_FLOGI 6 /* FLOGI sent to Fabric */
-#define LPFC_FABRIC_CFG_LINK 7 /* Fabric assigned NPORT Id
- configured */
-#define LPFC_NS_REG 8 /* Register with NameServer */
-#define LPFC_NS_QRY 9 /* Query NameServer for NPort ID list */
-#define LPFC_BUILD_DISC_LIST 10 /* Build ADISC and PLOGI lists for
- * device authentication / discovery */
-#define LPFC_DISC_AUTH 11 /* Processing ADISC list */
-#define LPFC_CLEAR_LA 12 /* authentication cmplt - issue
- CLEAR_LA */
-#define LPFC_HBA_READY 32
-#define LPFC_HBA_ERROR 0xff
-
- uint8_t fc_linkspeed; /* Link speed after last READ_LA */
-
- uint32_t fc_eventTag; /* event tag for link attention */
- uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
-
- uint32_t num_disc_nodes; /*in addition to hba_state */
-
- uint8_t fcp_mapping; /* Map FCP devices based on WWNN WWPN or DID */
-#define FCP_SEED_WWNN 0x1
-#define FCP_SEED_WWPN 0x2
-#define FCP_SEED_DID 0x4
-#define FCP_SEED_MASK 0x7
-#define FCP_SEED_AUTO 0x8 /* binding was created by auto mapping */
-
- struct timer_list fc_estabtmo; /* link establishment timer */
- struct timer_list fc_disctmo; /* Discovery rescue timer */
- struct timer_list fc_fdmitmo; /* fdmi timer */
- struct timer_list fc_scantmo; /* scsi scan host timer */
-
-
- void *fc_evt_head; /* waiting for event queue */
- void *fc_evt_tail; /* waiting for event queue */
-
- uint16_t hba_event_put; /* hbaevent event put word anchor */
- uint16_t hba_event_get; /* hbaevent event get word anchor */
- uint32_t hba_event_missed; /* hbaevent missed event word anchor */
- uint32_t sid_cnt; /* SCSI ID counter */
-
- struct lpfc_hba_event hbaevt[MAX_HBAEVT];
-
- /* These fields used to be binfo */
- struct lpfc_name fc_nodename; /* fc nodename */
- struct lpfc_name fc_portname; /* fc portname */
- uint32_t fc_pref_DID; /* preferred D_ID */
- uint8_t fc_pref_ALPA; /* preferred AL_PA */
- uint32_t fc_edtov; /* E_D_TOV timer value */
- uint32_t fc_arbtov; /* ARB_TOV timer value */
- uint32_t fc_ratov; /* R_A_TOV timer value */
- uint32_t fc_rttov; /* R_T_TOV timer value */
- uint32_t fc_altov; /* AL_TOV timer value */
- uint32_t fc_crtov; /* C_R_TOV timer value */
- uint32_t fc_citov; /* C_I_TOV timer value */
- uint32_t fc_myDID; /* fibre channel S_ID */
- uint32_t fc_prevDID; /* previous fibre channel S_ID */
-
- struct serv_parm fc_sparam; /* buffer for our service parameters */
- struct serv_parm fc_fabparam; /* fabric service parameters buffer */
- uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
-
- uint8_t fc_ns_retry; /* retries for fabric nameserver */
- uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
- uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
- struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
- uint32_t lmt;
- uint32_t fc_flag; /* FC flags */
-#define FC_PT2PT 0x1 /* pt2pt with no fabric */
-#define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
-#define FC_DISC_TMO 0x4 /* Discovery timer running */
-#define FC_PUBLIC_LOOP 0x8 /* Public loop */
-#define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
-#define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
-#define FC_NLP_MORE 0x40 /* More node to process in node tbl */
-#define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
-#define FC_FABRIC 0x100 /* We are fabric attached */
-#define FC_ESTABLISH_LINK 0x200 /* Reestablish Link */
-#define FC_RSCN_DISCOVERY 0x400 /* Authenticate all devices after RSCN*/
-#define FC_LOADING 0x1000 /* HBA in process of loading drvr */
-#define FC_UNLOADING 0x2000 /* HBA in process of unloading drvr */
-#define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
-#define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
-
- uint32_t fc_topology; /* link topology, from LINK INIT */
-
- struct lpfc_stats fc_stat;
-
- /* These are the head/tail pointers for the bind, plogi, adisc, unmap,
- * and map lists. Their counters are immediately following.
- */
- struct list_head fc_nlpbind_list;
- struct list_head fc_plogi_list;
- struct list_head fc_adisc_list;
- struct list_head fc_reglogin_list;
- struct list_head fc_prli_list;
- struct list_head fc_nlpunmap_list;
- struct list_head fc_nlpmap_list;
- struct list_head fc_npr_list;
- struct list_head fc_unused_list;
-
- /* Keep counters for the number of entries in each list. */
- uint16_t fc_bind_cnt;
- uint16_t fc_plogi_cnt;
- uint16_t fc_adisc_cnt;
- uint16_t fc_reglogin_cnt;
- uint16_t fc_prli_cnt;
- uint16_t fc_unmap_cnt;
- uint16_t fc_map_cnt;
- uint16_t fc_npr_cnt;
- uint16_t fc_unused_cnt;
- struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
- uint32_t nport_event_cnt; /* timestamp for nlplist entry */
-
- struct lpfc_target *device_queue_hash[MAX_FCP_TARGET];
-#define LPFC_RPI_HASH_SIZE 64
-#define LPFC_RPI_HASH_FUNC(x) ((x) & (0x3f))
- /* ptr to active D_ID / RPIs */
- struct lpfc_nodelist *fc_nlplookup[LPFC_RPI_HASH_SIZE];
- uint32_t wwnn[2];
- uint32_t RandomData[7];
-
- uint32_t cfg_log_verbose;
- uint32_t cfg_lun_queue_depth;
- uint32_t cfg_nodev_tmo;
- uint32_t cfg_hba_queue_depth;
- uint32_t cfg_automap;
- uint32_t cfg_fcp_class;
- uint32_t cfg_use_adisc;
- uint32_t cfg_ack0;
- uint32_t cfg_topology;
- uint32_t cfg_scan_down;
- uint32_t cfg_link_speed;
- uint32_t cfg_cr_delay;
- uint32_t cfg_cr_count;
- uint32_t cfg_fdmi_on;
- uint32_t cfg_fcp_bind_method;
- uint32_t cfg_discovery_threads;
- uint32_t cfg_max_luns;
- uint32_t cfg_scsi_hotplug;
-
- lpfc_vpd_t vpd; /* vital product data */
-
-#if defined(FC_TRANS_265_BLKPATCH)
- /*
- * Provide a per-HBA timer for 2.6.5 kernels patched with the
- * block/unblock FC transport patch.
- */
- struct timer_list dev_loss_timer;
-#endif
-
- struct Scsi_Host *host;
- struct pci_dev *pcidev;
- struct list_head dpc_disc;
-
- pid_t dpc_pid;
- int dpc_kill;
- struct completion dpc_startup;
- struct completion dpc_exiting;
- struct semaphore *dpc_wait;
-
- unsigned long pci_bar0_map; /* Physical address for PCI BAR0 */
- unsigned long pci_bar2_map; /* Physical address for PCI BAR2 */
- void *slim_memmap_p; /* Kernel memory mapped address for PCI
- BAR0 */
- void *ctrl_regs_memmap_p; /* Kernel memory mapped address for PCI
- BAR2 */
-
- void *MBslimaddr; /* virtual address for mbox cmds */
- void *HAregaddr; /* virtual address for host attn reg */
- void *CAregaddr; /* virtual address for chip attn reg */
- void *HSregaddr; /* virtual address for host status reg */
- void *HCregaddr; /* virtual address for host ctl reg */
- wait_queue_head_t linkevtwq;
- wait_queue_head_t rscnevtwq;
- wait_queue_head_t ctevtwq;
-
- uint8_t brd_no; /* FC board number */
-
- char SerialNumber[32]; /* adapter Serial Number */
- char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
-
- struct timer_list els_tmofunc;
-
- void *link_stats;
-
- /*
- * stat counters
- */
- uint64_t fc4InputRequests;
- uint64_t fc4OutputRequests;
- uint64_t fc4ControlRequests;
-
- struct lpfc_sysfs_mbox sysfs_mbox;
-;
- /* pci_mem_pools */
- struct pci_pool *lpfc_scsi_dma_ext_pool;
- struct pci_pool *lpfc_mbuf_pool;
- struct lpfc_dma_pool lpfc_mbuf_safety_pool;
- mempool_t *scsibuf_mem_pool;
-
- mempool_t *iocb_mem_pool;
- mempool_t *mbox_mem_pool;
- mempool_t *nlp_mem_pool;
- mempool_t *bind_mem_pool;
- struct list_head freebufList;
- struct list_head ctrspbuflist;
- struct list_head rnidrspbuflist;
-};
-
-/* event mask definitions */
-#define FC_REG_LINK_EVENT 0x1 /* Register for link up / down events */
-#define FC_REG_RSCN_EVENT 0x2 /* Register for RSCN events */
-#define FC_REG_CT_EVENT 0x4 /* Register for CT request events */
-
-#define FC_FSTYPE_ALL 0xffff /* match on all fsTypes */
-
-typedef struct fcEVT { /* Kernel level Event structure */
- uint32_t evt_handle;
- uint32_t evt_mask;
- uint32_t evt_data0;
- uint16_t evt_sleep;
- uint16_t evt_flags;
- void *evt_type;
- void *evt_next;
- void *evt_data1;
- uint32_t evt_data2;
-} fcEVT_t;
-
-typedef struct fcEVTHDR { /* Kernel level Event Header */
- uint32_t e_handle;
- uint32_t e_mask;
- uint16_t e_mode;
-#define E_SLEEPING_MODE 0x0001
- uint16_t e_refcnt;
- uint16_t e_flag;
-#define E_GET_EVENT_ACTIVE 0x0001
- fcEVT_t *e_head;
- fcEVT_t *e_tail;
- void *e_next_header;
- void *e_type;
-} fcEVTHDR_t;
-
-struct rnidrsp {
- void *buf;
- uint32_t uniqueid;
- struct list_head list;
- uint32_t data;
-};
-
-#endif /* _H_LPFC */
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_compat.h 1.28 2004/11/09 14:49:24EST sf_support Exp $
- *
- * This file provides macros to aid compilation in the Linux 2.4 kernel
- * over various platform architectures.
- */
-
-#ifndef _H_LPFC_COMPAT
-#define _H_LPFC_COMPAT
-
-
-/*******************************************************************
-Note: HBA's SLI memory contains little-endian LW.
-Thus to access it from a little-endian host,
-memcpy_toio() and memcpy_fromio() can be used.
-However on a big-endian host, copy 4 bytes at a time,
-using writel() and readl().
- *******************************************************************/
-
-#if __BIG_ENDIAN
-
-static inline void
-lpfc_memcpy_to_slim( void *dest, void *src, unsigned int bytes)
-{
- uint32_t *dest32;
- uint32_t *src32;
- unsigned int four_bytes;
-
-
- dest32 = (uint32_t *) dest;
- src32 = (uint32_t *) src;
-
- /* write input bytes, 4 bytes at a time */
- for (four_bytes = bytes /4; four_bytes > 0; four_bytes--) {
- writel( *src32, dest32);
- readl(dest32); /* flush */
- dest32++;
- src32++;
- }
-
- return;
-}
-
-static inline void
-lpfc_memcpy_from_slim( void *dest, void *src, unsigned int bytes)
-{
- uint32_t *dest32;
- uint32_t *src32;
- unsigned int four_bytes;
-
-
- dest32 = (uint32_t *) dest;
- src32 = (uint32_t *) src;
-
- /* read input bytes, 4 bytes at a time */
- for (four_bytes = bytes /4; four_bytes > 0; four_bytes--) {
- *dest32 = readl( src32);
- dest32++;
- src32++;
- }
-
- return;
-}
-
-#else
-
-static inline void
-lpfc_memcpy_to_slim( void *dest, void *src, unsigned int bytes)
-{
- /* actually returns 1 byte past dest */
- memcpy_toio( dest, src, bytes);
-}
-
-static inline void
-lpfc_memcpy_from_slim( void *dest, void *src, unsigned int bytes)
-{
- /* actually returns 1 byte past dest */
- memcpy_fromio( dest, src, bytes);
-}
-
-#endif /* __BIG_ENDIAN */
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,6)
-#define msleep(x) do { \
- set_current_state(TASK_UNINTERRUPTIBLE); \
- schedule_timeout((x)); \
- } while (0);
-/* Provide local msecs_to_jiffies call for earlier kernels */
-static inline unsigned long msecs_to_jiffies(const unsigned int m)
-{
-#if HZ <= 1000 && !(1000 % HZ)
- return (m + (1000 / HZ) - 1) / (1000 / HZ);
-#elif HZ > 1000 && !(HZ % 1000)
- return m * (HZ / 1000);
-#else
- return (m * HZ + 999) / 1000;
-#endif
-}
-#endif
-#endif /* _H_LPFC_COMPAT */
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_crtn.h 1.140 2004/11/17 19:00:57EST sf_support Exp $
- */
-
-#ifndef _H_LPFC_CRTN
-#define _H_LPFC_CRTN
-
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <asm/uaccess.h>
-
-#include "lpfc_disc.h"
-#include "lpfc_logmsg.h"
-#include "lpfc_scsi.h"
-#include "lpfc_sli.h"
-
-
-void lpfc_dump_mem(struct lpfc_hba *, LPFC_MBOXQ_t *);
-void lpfc_read_nv(struct lpfc_hba *, LPFC_MBOXQ_t *);
-int lpfc_read_la(struct lpfc_hba *, LPFC_MBOXQ_t *);
-void lpfc_clear_la(struct lpfc_hba *, LPFC_MBOXQ_t *);
-void lpfc_config_link(struct lpfc_hba *, LPFC_MBOXQ_t *);
-int lpfc_read_sparam(struct lpfc_hba *, LPFC_MBOXQ_t *);
-void lpfc_read_config(struct lpfc_hba *, LPFC_MBOXQ_t *);
-void lpfc_set_slim(struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t, uint32_t);
-int lpfc_reg_login(struct lpfc_hba *, uint32_t, uint8_t *, LPFC_MBOXQ_t *,
- uint32_t);
-void lpfc_unreg_login(struct lpfc_hba *, uint32_t, LPFC_MBOXQ_t *);
-void lpfc_unreg_did(struct lpfc_hba *, uint32_t, LPFC_MBOXQ_t *);
-void lpfc_init_link(struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t, uint32_t);
-
-
-int lpfc_linkdown(struct lpfc_hba *);
-void lpfc_mbx_cmpl_read_la(struct lpfc_hba *, LPFC_MBOXQ_t *);
-
-void lpfc_mbx_cmpl_clear_la(struct lpfc_hba *, LPFC_MBOXQ_t *);
-void lpfc_mbx_cmpl_reg_login(struct lpfc_hba *, LPFC_MBOXQ_t *);
-void lpfc_mbx_cmpl_fabric_reg_login(struct lpfc_hba *, LPFC_MBOXQ_t *);
-void lpfc_mbx_cmpl_ns_reg_login(struct lpfc_hba *, LPFC_MBOXQ_t *);
-void lpfc_mbx_cmpl_fdmi_reg_login(struct lpfc_hba *, LPFC_MBOXQ_t *);
-int lpfc_consistent_bind_save(struct lpfc_hba *, struct lpfc_bindlist *);
-int lpfc_nlp_plogi(struct lpfc_hba *, struct lpfc_nodelist *);
-int lpfc_nlp_adisc(struct lpfc_hba *, struct lpfc_nodelist *);
-int lpfc_nlp_unmapped(struct lpfc_hba *, struct lpfc_nodelist *);
-int lpfc_nlp_mapped(struct lpfc_hba *, struct lpfc_nodelist *,
- struct lpfc_bindlist *);
-int lpfc_nlp_list(struct lpfc_hba *, struct lpfc_nodelist *, int);
-void lpfc_set_disctmo(struct lpfc_hba *);
-int lpfc_can_disctmo(struct lpfc_hba *);
-int lpfc_unreg_rpi(struct lpfc_hba *, struct lpfc_nodelist *);
-int lpfc_check_sli_ndlp(struct lpfc_hba *, struct lpfc_sli_ring *,
- struct lpfc_iocbq *, struct lpfc_nodelist *);
-int lpfc_nlp_remove(struct lpfc_hba *, struct lpfc_nodelist *);
-void lpfc_nlp_init(struct lpfc_hba *, struct lpfc_nodelist *, uint32_t);
-struct lpfc_nodelist *lpfc_setup_disc_node(struct lpfc_hba *, uint32_t);
-struct lpfc_nodelist *lpfc_setup_rscn_node(struct lpfc_hba *, uint32_t);
-void lpfc_disc_list_loopmap(struct lpfc_hba *);
-void lpfc_disc_start(struct lpfc_hba *);
-void lpfc_disc_flush_list(struct lpfc_hba *);
-void lpfc_establish_link_tmo(unsigned long);
-void lpfc_disc_timeout(unsigned long);
-void lpfc_scan_timeout(unsigned long);
-struct lpfc_target *lpfc_find_target(struct lpfc_hba *, uint32_t,
- struct lpfc_nodelist *);
-void lpfc_set_failmask(struct lpfc_hba *, struct lpfc_nodelist *, uint32_t,
- uint32_t);
-void lpfc_process_nodev_timeout(struct lpfc_hba *, struct lpfc_nodelist *);
-
-struct lpfc_nodelist *lpfc_findnode_rpi(struct lpfc_hba * phba, uint16_t rpi);
-struct lpfc_nodelist *lpfc_findnode_remove_rpi(struct lpfc_hba * phba,
- uint16_t rpi);
-void lpfc_addnode_rpi(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp,
- uint16_t rpi);
-
-int lpfc_discq_post_event(struct lpfc_hba *, void *, void *, uint32_t);
-int lpfc_do_dpc(void *);
-int lpfc_disc_state_machine(struct lpfc_hba *, struct lpfc_nodelist *, void *,
- uint32_t);
-
-uint32_t lpfc_cmpl_prli_reglogin_issue(struct lpfc_hba *,
- struct lpfc_nodelist *, void *,
- uint32_t);
-uint32_t lpfc_cmpl_plogi_prli_issue(struct lpfc_hba *, struct lpfc_nodelist *,
- void *, uint32_t);
-
-int lpfc_check_sparm(struct lpfc_hba *, struct lpfc_nodelist *,
- struct serv_parm *, uint32_t);
-int lpfc_els_abort_flogi(struct lpfc_hba *);
-int lpfc_initial_flogi(struct lpfc_hba *);
-int lpfc_issue_els_plogi(struct lpfc_hba *, struct lpfc_nodelist *, uint8_t);
-int lpfc_issue_els_prli(struct lpfc_hba *, struct lpfc_nodelist *, uint8_t);
-int lpfc_issue_els_adisc(struct lpfc_hba *, struct lpfc_nodelist *, uint8_t);
-int lpfc_issue_els_logo(struct lpfc_hba *, struct lpfc_nodelist *, uint8_t);
-int lpfc_issue_els_scr(struct lpfc_hba *, uint32_t, uint8_t);
-int lpfc_els_free_iocb(struct lpfc_hba *, struct lpfc_iocbq *);
-int lpfc_els_rsp_acc(struct lpfc_hba *, uint32_t, struct lpfc_iocbq *,
- struct lpfc_nodelist *, LPFC_MBOXQ_t *, uint8_t);
-int lpfc_els_rsp_reject(struct lpfc_hba *, uint32_t, struct lpfc_iocbq *,
- struct lpfc_nodelist *);
-int lpfc_els_rsp_adisc_acc(struct lpfc_hba *, struct lpfc_iocbq *,
- struct lpfc_nodelist *);
-int lpfc_els_rsp_prli_acc(struct lpfc_hba *, struct lpfc_iocbq *,
- struct lpfc_nodelist *);
-void lpfc_els_retry_delay(unsigned long);
-void lpfc_els_unsol_event(struct lpfc_hba *, struct lpfc_sli_ring *,
- struct lpfc_iocbq *);
-int lpfc_els_handle_rscn(struct lpfc_hba *);
-int lpfc_els_flush_rscn(struct lpfc_hba *);
-int lpfc_rscn_payload_check(struct lpfc_hba *, uint32_t);
-void lpfc_els_flush_cmd(struct lpfc_hba *);
-int lpfc_els_disc_adisc(struct lpfc_hba *);
-int lpfc_els_disc_plogi(struct lpfc_hba *);
-void lpfc_els_timeout_handler(unsigned long ptr);
-
-void lpfc_ct_unsol_event(struct lpfc_hba *, struct lpfc_sli_ring *,
- struct lpfc_iocbq *);
-int lpfc_ns_cmd(struct lpfc_hba *, struct lpfc_nodelist *, int);
-int lpfc_fdmi_cmd(struct lpfc_hba *, struct lpfc_nodelist *, int);
-void lpfc_fdmi_tmo(unsigned long);
-
-int lpfc_config_port_prep(struct lpfc_hba *);
-int lpfc_config_port_post(struct lpfc_hba *);
-int lpfc_hba_down_prep(struct lpfc_hba *);
-void lpfc_handle_eratt(struct lpfc_hba *, uint32_t);
-void lpfc_handle_latt(struct lpfc_hba *);
-void lpfc_hba_init(struct lpfc_hba *, uint32_t *);
-int lpfc_post_buffer(struct lpfc_hba *, struct lpfc_sli_ring *, int, int);
-void lpfc_cleanup(struct lpfc_hba *, uint32_t);
-int lpfc_scsi_free(struct lpfc_hba *);
-void lpfc_decode_firmware_rev(struct lpfc_hba *, char *, int);
-uint8_t *lpfc_get_lpfchba_info(struct lpfc_hba *, uint8_t *);
-int lpfc_fcp_abort(struct lpfc_hba *, int, int, int);
-int lpfc_put_event(struct lpfc_hba *, uint32_t, uint32_t, void *,
- uint32_t, uint32_t);
-void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
-int lpfc_online(struct lpfc_hba *);
-int lpfc_offline(struct lpfc_hba *);
-
-
-
-int lpfc_sli_queue_setup(struct lpfc_hba *);
-void lpfc_slim_access(struct lpfc_hba *);
-
-void lpfc_handle_eratt(struct lpfc_hba *, uint32_t);
-void lpfc_handle_latt(struct lpfc_hba *);
-irqreturn_t lpfc_intr_handler(int, void *, struct pt_regs *);
-
-void lpfc_read_rev(struct lpfc_hba *, LPFC_MBOXQ_t *);
-void lpfc_config_ring(struct lpfc_hba *, int, LPFC_MBOXQ_t *);
-void lpfc_config_port(struct lpfc_hba *, LPFC_MBOXQ_t *);
-void lpfc_mbox_put(struct lpfc_hba *, LPFC_MBOXQ_t *);
-LPFC_MBOXQ_t *lpfc_mbox_get(struct lpfc_hba *);
-
-int lpfc_mem_alloc(struct lpfc_hba *);
-void lpfc_mem_free(struct lpfc_hba *);
-
-struct lpfc_iocbq *
-lpfc_prep_els_iocb(struct lpfc_hba * phba,
- uint8_t expectRsp,
- uint16_t cmdSize,
- uint8_t retry, struct lpfc_nodelist * ndlp, uint32_t elscmd);
-
-int lpfc_sli_hba_setup(struct lpfc_hba *);
-int lpfc_sli_hba_down(struct lpfc_hba *);
-int lpfc_sli_intr(struct lpfc_hba *);
-int lpfc_sli_issue_mbox(struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
-int lpfc_sli_issue_iocb(struct lpfc_hba *, struct lpfc_sli_ring *,
- struct lpfc_iocbq *, uint32_t);
-void lpfc_sli_pcimem_bcopy(uint32_t *, uint32_t *, uint32_t);
-int lpfc_sli_ringpostbuf_put(struct lpfc_hba *, struct lpfc_sli_ring *,
- struct lpfc_dmabuf *);
-struct lpfc_dmabuf *lpfc_sli_ringpostbuf_get(struct lpfc_hba *,
- struct lpfc_sli_ring *,
- dma_addr_t);
-uint32_t lpfc_sli_next_iotag(struct lpfc_hba *, struct lpfc_sli_ring *);
-int lpfc_sli_issue_abort_iotag32(struct lpfc_hba *, struct lpfc_sli_ring *,
- struct lpfc_iocbq *);
-int lpfc_sli_abort_iocb_ctx(struct lpfc_hba *, struct lpfc_sli_ring *,
- uint32_t);
-int lpfc_sli_sum_iocb_host(struct lpfc_hba *, struct lpfc_sli_ring *);
-int lpfc_sli_abort_iocb_host(struct lpfc_hba *, struct lpfc_sli_ring *, int);
-int lpfc_sli_sum_iocb_lun(struct lpfc_hba *, struct lpfc_sli_ring *, uint16_t,
- uint64_t);
-int lpfc_sli_abort_iocb_lun(struct lpfc_hba *, struct lpfc_sli_ring *, uint16_t,
- uint64_t, int);
-int lpfc_sli_abort_iocb_tgt(struct lpfc_hba *, struct lpfc_sli_ring *,
- uint16_t, int);
-void lpfc_mbox_timeout(unsigned long);
-
-void lpfc_map_fcp_cmnd_to_bpl(struct lpfc_hba *, struct lpfc_scsi_buf *);
-void lpfc_free_scsi_cmd(struct lpfc_scsi_buf *);
-uint32_t lpfc_os_timeout_transform(struct lpfc_hba *, uint32_t);
-
-struct lpfc_nodelist *
-lpfc_findnode_wwpn(struct lpfc_hba * phba, uint32_t order,
- struct lpfc_name * wwpn);
-struct lpfc_nodelist *
-lpfc_findnode_wwnn(struct lpfc_hba * phba, uint32_t order,
- struct lpfc_name * wwnn);
-struct lpfc_nodelist *lpfc_findnode_did(struct lpfc_hba * phba, uint32_t order,
- uint32_t did);
-
-void lpfc_get_hba_sym_node_name(struct lpfc_hba * phba, uint8_t * symbp);
-
-int lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
- uint32_t timeout);
-
-int
-lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring,
- struct lpfc_iocbq * piocb,
- struct lpfc_iocbq * prspiocbq, uint32_t timeout);
-int lpfc_sli_issue_iocb_wait_high_priority(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring,
- struct lpfc_iocbq * piocb,
- uint32_t flag,
- struct lpfc_iocbq * prspiocbq,
- uint32_t timeout);
-void lpfc_sli_wake_iocb_high_priority(struct lpfc_hba * phba,
- struct lpfc_iocbq * queue1,
- struct lpfc_iocbq * queue2);
-void *lpfc_mbuf_alloc(struct lpfc_hba *, int, dma_addr_t *);
-void lpfc_mbuf_free(struct lpfc_hba *, void *, dma_addr_t);
-
-int lpfc_stop_timer(struct lpfc_hba *);
-
-
-/* Function prototypes. */
-int lpfc_queuecommand(struct scsi_cmnd *, void (*done) (struct scsi_cmnd *));
-int lpfc_abort_handler(struct scsi_cmnd *);
-int lpfc_reset_bus_handler(struct scsi_cmnd *);
-int lpfc_reset_lun_handler(struct scsi_cmnd *);
-
-#if defined(FC_TRANS_VER1) || defined(FC_TRANS_265_BLKPATCH)
-void lpfc_target_unblock(struct lpfc_hba *, struct lpfc_target *);
-void lpfc_target_block(struct lpfc_hba *, struct lpfc_target *);
-int lpfc_target_remove(struct lpfc_hba *, struct lpfc_target *);
-int lpfc_target_add(struct lpfc_hba *, struct lpfc_target *);
-#endif
-
-#define ScsiResult(host_code, scsi_code) (((host_code) << 16) | scsi_code)
-#define HBA_EVENT_RSCN 5
-#define HBA_EVENT_LINK_UP 2
-#define HBA_EVENT_LINK_DOWN 3
-#endif /* _H_LPFC_CRTN */
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_ct.c 1.143 2004/11/17 14:50:38EST sf_support Exp $
- *
- * Fibre Channel SCSI LAN Device Driver CT support
- */
-
-#include <linux/version.h>
-#include <linux/blkdev.h>
-#include <linux/dma-mapping.h>
-#include <linux/pci.h>
-#include <linux/spinlock.h>
-#include <linux/utsname.h>
-#include <scsi/scsi_device.h>
-#include <scsi/scsi_host.h>
-#include "lpfc_sli.h"
-#include "lpfc_disc.h"
-#include "lpfc_scsi.h"
-#include "lpfc.h"
-#include "lpfc_crtn.h"
-#include "lpfc_hw.h"
-#include "lpfc_logmsg.h"
-#include "lpfc_mem.h"
-#include "lpfc_version.h"
-
-
-#define HBA_PORTSPEED_UNKNOWN 0 /* Unknown - transceiver
- * incapable of reporting */
-#define HBA_PORTSPEED_1GBIT 1 /* 1 GBit/sec */
-#define HBA_PORTSPEED_2GBIT 2 /* 2 GBit/sec */
-#define HBA_PORTSPEED_4GBIT 8 /* 4 GBit/sec */
-#define HBA_PORTSPEED_8GBIT 16 /* 8 GBit/sec */
-#define HBA_PORTSPEED_10GBIT 4 /* 10 GBit/sec */
-#define HBA_PORTSPEED_NOT_NEGOTIATED 5 /* Speed not established */
-
-#define FOURBYTES 4
-
-
-static char *lpfc_release_version = LPFC_DRIVER_VERSION;
-
-/*
- * lpfc_ct_unsol_event
- */
-void
-lpfc_ct_unsol_event(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocbq)
-{
-
- struct lpfc_iocbq *next_piocbq;
- struct lpfc_dmabuf *pmbuf = NULL;
- struct lpfc_dmabuf *matp, *next_matp;
- uint32_t ctx = 0, count = 0;
- IOCB_t *icmd = &piocbq->iocb;
- int i, status, go_exit = 0;
- struct list_head head;
-
- if (icmd->ulpStatus)
- return;
-
- list_add_tail(&head, &piocbq->list);
- list_for_each_entry_safe(piocbq, next_piocbq, &head, list) {
- icmd = &piocbq->iocb;
- if (ctx == 0)
- ctx = (uint32_t) (icmd->ulpContext);
- if (icmd->ulpStatus) {
- if ((icmd->ulpStatus == IOSTAT_LOCAL_REJECT) &&
- ((icmd->un.ulpWord[4] & 0xff)
- == IOERR_RCV_BUFFER_WAITING)) {
- phba->fc_stat.NoRcvBuf++;
- lpfc_post_buffer(phba, pring, 0, 1);
- }
- go_exit = 1;
- goto ct_unsol_event_exit_piocbq;
- }
-
- if (icmd->ulpBdeCount == 0)
- continue;
-
- for (i = 0; i < icmd->ulpBdeCount; i++) {
- matp = lpfc_sli_ringpostbuf_get(phba, pring,
- getPaddr(icmd->un.
- cont64[i].
- addrHigh,
- icmd->un.
- cont64[i].
- addrLow));
- if (!matp) {
- /* Insert lpfc log message here */
- go_exit = 1;
- goto ct_unsol_event_exit_piocbq;
- }
-
- /* Typically for Unsolicited CT requests */
- if (!pmbuf) {
- pmbuf = matp;
- INIT_LIST_HEAD(&pmbuf->list);
- } else
- list_add_tail(&matp->list, &pmbuf->list);
-
- count += icmd->un.cont64[i].tus.f.bdeSize;
- }
-
- lpfc_post_buffer(phba, pring, i, 1);
- icmd->ulpBdeCount = 0;
- }
-ct_unsol_event_exit_piocbq:
- list_del(&head);
- /*
- * if not early-exiting and there is pmbuf,
- * then do FC_REG_CT_EVENT for libdfc
- */
- if (!go_exit && pmbuf) {
- status = lpfc_put_event(phba, FC_REG_CT_EVENT, ctx,
- (void *)pmbuf, count, 0);
- if (status)
- /* Need to free IOCB buffer ? */
- return;
- }
- if (pmbuf) {
- list_for_each_entry_safe(matp, next_matp, &pmbuf->list, list) {
- lpfc_mbuf_free(phba, matp->virt, matp->phys);
- list_del(&matp->list);
- kfree(matp);
- }
- lpfc_mbuf_free(phba, pmbuf->virt, pmbuf->phys);
- kfree(pmbuf);
- }
- return;
-}
-
-static void
-lpfc_free_ct_rsp(struct lpfc_hba * phba, struct lpfc_dmabuf * mlist)
-{
- struct lpfc_dmabuf *mlast, *next_mlast;
-
- list_for_each_entry_safe(mlast, next_mlast, &mlist->list, list) {
- lpfc_mbuf_free(phba, mlast->virt, mlast->phys);
- list_del(&mlast->list);
- kfree(mlast);
- }
- lpfc_mbuf_free(phba, mlist->virt, mlist->phys);
- kfree(mlist);
- return;
-}
-
-static struct lpfc_dmabuf *
-lpfc_alloc_ct_rsp(struct lpfc_hba * phba, int cmdcode, struct ulp_bde64 * bpl,
- uint32_t size, int *entries)
-{
- struct lpfc_dmabuf *mlist = NULL;
- struct lpfc_dmabuf *mp;
- int cnt, i = 0;
-
- /* We get chucks of FCELSSIZE */
- cnt = size > FCELSSIZE ? FCELSSIZE: size;
-
- while (size) {
- /* Allocate buffer for rsp payload */
- mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_ATOMIC);
- if (!mp) {
- if (mlist)
- lpfc_free_ct_rsp(phba, mlist);
- return NULL;
- }
-
- INIT_LIST_HEAD(&mp->list);
-
- if (cmdcode == be16_to_cpu(SLI_CTNS_GID_FT))
- mp->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &(mp->phys));
- else
- mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys));
-
- if (!mp->virt) {
- kfree(mp);
- lpfc_free_ct_rsp(phba, mlist);
- return NULL;
- }
-
- /* Queue it to a linked list */
- if (!mlist)
- mlist = mp;
- else
- list_add_tail(&mp->list, &mlist->list);
-
- bpl->tus.f.bdeFlags = BUFF_USE_RCV;
- /* build buffer ptr list for IOCB */
- bpl->addrLow = le32_to_cpu( putPaddrLow(mp->phys) );
- bpl->addrHigh = le32_to_cpu( putPaddrHigh(mp->phys) );
- bpl->tus.f.bdeSize = (uint16_t) cnt;
- bpl->tus.w = le32_to_cpu(bpl->tus.w);
- bpl++;
-
- i++;
- size -= cnt;
- }
-
- *entries = i;
- return mlist;
-}
-
-static int
-lpfc_gen_req(struct lpfc_hba *phba, struct lpfc_dmabuf *bmp,
- struct lpfc_dmabuf *inp, struct lpfc_dmabuf *outp,
- void (*cmpl) (struct lpfc_hba *, struct lpfc_iocbq *,
- struct lpfc_iocbq *),
- struct lpfc_nodelist *ndlp, uint32_t usr_flg, uint32_t num_entry,
- uint32_t tmo)
-{
-
- struct lpfc_sli *psli = &phba->sli;
- struct lpfc_sli_ring *pring = &psli->ring[LPFC_ELS_RING];
- IOCB_t *icmd;
- struct lpfc_iocbq *geniocb;
-
- /* Allocate buffer for command iocb */
- geniocb = mempool_alloc(phba->iocb_mem_pool, GFP_ATOMIC);
- if (!geniocb) {
- return 1;
- }
- memset(geniocb, 0, sizeof (struct lpfc_iocbq));
- icmd = &geniocb->iocb;
-
- icmd->un.genreq64.bdl.ulpIoTag32 = 0;
- icmd->un.genreq64.bdl.addrHigh = putPaddrHigh(bmp->phys);
- icmd->un.genreq64.bdl.addrLow = putPaddrLow(bmp->phys);
- icmd->un.genreq64.bdl.bdeFlags = BUFF_TYPE_BDL;
- icmd->un.genreq64.bdl.bdeSize = (num_entry * sizeof (struct ulp_bde64));
-
- if (usr_flg)
- geniocb->context3 = NULL;
- else
- geniocb->context3 = (uint8_t *) bmp;
-
- /* Save for completion so we can release these resources */
- geniocb->context1 = (uint8_t *) inp;
- geniocb->context2 = (uint8_t *) outp;
-
- /* Fill in payload, bp points to frame payload */
- icmd->ulpCommand = CMD_GEN_REQUEST64_CR;
-
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- icmd->ulpIoTag = lpfc_sli_next_iotag(phba, pring);
-
- /* Fill in rest of iocb */
- icmd->un.genreq64.w5.hcsw.Fctl = (SI | LA);
- icmd->un.genreq64.w5.hcsw.Dfctl = 0;
- icmd->un.genreq64.w5.hcsw.Rctl = FC_UNSOL_CTL;
- icmd->un.genreq64.w5.hcsw.Type = FC_COMMON_TRANSPORT_ULP;
-
- if (!tmo)
- tmo = (2 * phba->fc_ratov) + 1;
- icmd->ulpTimeout = tmo;
- icmd->ulpBdeCount = 1;
- icmd->ulpLe = 1;
- icmd->ulpClass = CLASS3;
- icmd->ulpContext = ndlp->nlp_rpi;
-
- /* Issue GEN REQ IOCB for NPORT <did> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0119 Issue GEN REQ IOCB for NPORT x%x "
- "Data: x%x x%x\n", phba->brd_no, icmd->un.ulpWord[5],
- icmd->ulpIoTag, phba->hba_state);
- geniocb->iocb_cmpl = cmpl;
- geniocb->drvrTimeout = icmd->ulpTimeout + LPFC_DRVR_TIMEOUT;
- if (lpfc_sli_issue_iocb(phba, pring, geniocb, 0) == IOCB_ERROR) {
- mempool_free( geniocb, phba->iocb_mem_pool);
- return 1;
- }
-
- return 0;
-}
-
-static int
-lpfc_ct_cmd(struct lpfc_hba *phba, struct lpfc_dmabuf *inmp,
- struct lpfc_dmabuf *bmp, struct lpfc_nodelist *ndlp,
- void (*cmpl) (struct lpfc_hba *, struct lpfc_iocbq *,
- struct lpfc_iocbq *),
- uint32_t rsp_size)
-{
- struct ulp_bde64 *bpl = (struct ulp_bde64 *) bmp->virt;
- struct lpfc_dmabuf *outmp;
- int cnt = 0, status;
- int cmdcode = ((struct lpfc_sli_ct_request *) inmp->virt)->
- CommandResponse.bits.CmdRsp;
-
- bpl++; /* Skip past ct request */
-
- /* Put buffer(s) for ct rsp in bpl */
- outmp = lpfc_alloc_ct_rsp(phba, cmdcode, bpl, rsp_size, &cnt);
- if (!outmp)
- return -ENOMEM;
-
- status = lpfc_gen_req(phba, bmp, inmp, outmp, cmpl, ndlp, 0,
- cnt+1, 0);
- if (status) {
- lpfc_free_ct_rsp(phba, outmp);
- return -ENOMEM;
- }
- return 0;
-}
-
-static int
-lpfc_ns_rsp(struct lpfc_hba * phba, struct lpfc_dmabuf * mp, uint32_t Size)
-{
- struct lpfc_sli_ct_request *Response =
- (struct lpfc_sli_ct_request *) mp->virt;
- struct lpfc_nodelist *ndlp = NULL;
- struct lpfc_dmabuf *mlast, *next_mp;
- uint32_t *ctptr = (uint32_t *) & Response->un.gid.PortType;
- uint32_t Did;
- uint32_t CTentry;
- int Cnt;
- struct list_head head;
-
- lpfc_set_disctmo(phba);
-
- Cnt = Size > FCELSSIZE ? FCELSSIZE : Size;
-
- list_add_tail(&head, &mp->list);
- list_for_each_entry_safe(mp, next_mp, &head, list) {
- mlast = mp;
- pci_dma_sync_single_for_cpu(phba->pcidev, mp->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- Size -= Cnt;
-
- if (!ctptr)
- ctptr = (uint32_t *) mlast->virt;
- else
- Cnt -= 16; /* subtract length of CT header */
-
- /* Loop through entire NameServer list of DIDs */
- while (Cnt) {
-
- /* Get next DID from NameServer List */
- CTentry = *ctptr++;
- Did = ((be32_to_cpu(CTentry)) & Mask_DID);
-
- ndlp = NULL;
- if (Did != phba->fc_myDID) {
- /* Check for rscn processing or not */
- ndlp = lpfc_setup_disc_node(phba, Did);
- }
- /* Mark all node table entries that are in the
- Nameserver */
- if (ndlp) {
- /* NameServer Rsp */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0238 Process x%x NameServer"
- " Rsp Data: x%x x%x x%x\n",
- phba->brd_no,
- Did, ndlp->nlp_flag,
- phba->fc_flag,
- phba->fc_rscn_id_cnt);
- } else {
- /* NameServer Rsp */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY,
- "%d:0239 Skip x%x NameServer "
- "Rsp Data: x%x x%x x%x\n",
- phba->brd_no,
- Did, Size, phba->fc_flag,
- phba->fc_rscn_id_cnt);
- }
-
- if (CTentry & (be32_to_cpu(SLI_CT_LAST_ENTRY)))
- goto nsout1;
- Cnt -= sizeof (uint32_t);
- }
- ctptr = NULL;
-
- }
-
-nsout1:
- list_del(&head);
-
- /* Here we are finished in the case RSCN */
- if (phba->hba_state == LPFC_HBA_READY) {
- lpfc_els_flush_rscn(phba);
- phba->fc_flag |= FC_RSCN_MODE; /* we are still in RSCN mode */
- }
- return 0;
-}
-
-
-
-
-static void
-lpfc_cmpl_ct_cmd_gid_ft(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- IOCB_t *irsp;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- struct lpfc_dmabuf *inp;
- struct lpfc_dmabuf *outp;
- struct lpfc_nodelist *ndlp;
- struct lpfc_sli_ct_request *CTrsp;
-
- psli = &phba->sli;
- /* we pass cmdiocb to state machine which needs rspiocb as well */
- cmdiocb->context_un.rsp_iocb = rspiocb;
-
- inp = (struct lpfc_dmabuf *) cmdiocb->context1;
- outp = (struct lpfc_dmabuf *) cmdiocb->context2;
- bmp = (struct lpfc_dmabuf *) cmdiocb->context3;
-
- irsp = &rspiocb->iocb;
- if (irsp->ulpStatus) {
- if((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
- ((irsp->un.ulpWord[4] == IOERR_SLI_DOWN) ||
- (irsp->un.ulpWord[4] == IOERR_SLI_ABORTED))) {
- goto out;
- }
-
- /* Check for retry */
- if (phba->fc_ns_retry < LPFC_MAX_NS_RETRY) {
- phba->fc_ns_retry++;
- /* CT command is being retried */
- ndlp =
- lpfc_findnode_did(phba, NLP_SEARCH_UNMAPPED,
- NameServer_DID);
- if (ndlp) {
- if (lpfc_ns_cmd(phba, ndlp, SLI_CTNS_GID_FT) ==
- 0) {
- goto out;
- }
- }
- }
- } else {
- /* Good status, continue checking */
- CTrsp = (struct lpfc_sli_ct_request *) outp->virt;
- if (CTrsp->CommandResponse.bits.CmdRsp ==
- be16_to_cpu(SLI_CT_RESPONSE_FS_ACC)) {
- lpfc_ns_rsp(phba, outp,
- (uint32_t) (irsp->un.genreq64.bdl.bdeSize));
- } else if (CTrsp->CommandResponse.bits.CmdRsp ==
- be16_to_cpu(SLI_CT_RESPONSE_FS_RJT)) {
- /* NameServer Rsp Error */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0240 NameServer Rsp Error "
- "Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- CTrsp->CommandResponse.bits.CmdRsp,
- (uint32_t) CTrsp->ReasonCode,
- (uint32_t) CTrsp->Explanation,
- phba->fc_flag);
- } else {
- /* NameServer Rsp Error */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY,
- "%d:0241 NameServer Rsp Error "
- "Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- CTrsp->CommandResponse.bits.CmdRsp,
- (uint32_t) CTrsp->ReasonCode,
- (uint32_t) CTrsp->Explanation,
- phba->fc_flag);
- }
- }
- /* Link up / RSCN discovery */
- lpfc_disc_start(phba);
-out:
- lpfc_free_ct_rsp(phba, outp);
- lpfc_mbuf_free(phba, inp->virt, inp->phys);
- lpfc_mbuf_free(phba, bmp->virt, bmp->phys);
- kfree(inp);
- kfree(bmp);
- mempool_free( cmdiocb, phba->iocb_mem_pool);
- return;
-}
-
-static void
-lpfc_cmpl_ct_cmd_rft_id(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- struct lpfc_dmabuf *inp;
- struct lpfc_dmabuf *outp;
- IOCB_t *irsp;
- struct lpfc_sli_ct_request *CTrsp;
-
- psli = &phba->sli;
- /* we pass cmdiocb to state machine which needs rspiocb as well */
- cmdiocb->context_un.rsp_iocb = rspiocb;
-
- inp = (struct lpfc_dmabuf *) cmdiocb->context1;
- outp = (struct lpfc_dmabuf *) cmdiocb->context2;
- bmp = (struct lpfc_dmabuf *) cmdiocb->context3;
- irsp = &rspiocb->iocb;
-
- CTrsp = (struct lpfc_sli_ct_request *) outp->virt;
-
- /* RFT request completes status <ulpStatus> CmdRsp <CmdRsp> */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0209 RFT request completes ulpStatus x%x "
- "CmdRsp x%x\n", phba->brd_no, irsp->ulpStatus,
- CTrsp->CommandResponse.bits.CmdRsp);
-
- lpfc_free_ct_rsp(phba, outp);
- lpfc_mbuf_free(phba, inp->virt, inp->phys);
- lpfc_mbuf_free(phba, bmp->virt, bmp->phys);
- kfree(inp);
- kfree(bmp);
- mempool_free( cmdiocb, phba->iocb_mem_pool);
- return;
-}
-
-static void
-lpfc_cmpl_ct_cmd_rnn_id(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- lpfc_cmpl_ct_cmd_rft_id(phba, cmdiocb, rspiocb);
- return;
-}
-
-static void
-lpfc_cmpl_ct_cmd_rsnn_nn(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- lpfc_cmpl_ct_cmd_rft_id(phba, cmdiocb, rspiocb);
- return;
-}
-
-void
-lpfc_get_hba_sym_node_name(struct lpfc_hba * phba, uint8_t * symbp)
-{
- uint8_t buf[16];
- char fwrev[16];
-
- lpfc_decode_firmware_rev(phba, fwrev, 0);
- lpfc_get_hba_model_desc(phba, buf, NULL);
- sprintf(symbp, "Emulex %s FV%s DV%s", buf, fwrev, lpfc_release_version);
-}
-
-/*
- * lpfc_ns_cmd
- * Description:
- * Issue Cmd to NameServer
- * SLI_CTNS_GID_FT
- * LI_CTNS_RFT_ID
- */
-int
-lpfc_ns_cmd(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp, int cmdcode)
-{
- struct lpfc_dmabuf *mp, *bmp;
- struct lpfc_sli_ct_request *CtReq;
- struct ulp_bde64 *bpl;
- void (*cmpl) (struct lpfc_hba *, struct lpfc_iocbq *,
- struct lpfc_iocbq *) = NULL;
- uint32_t rsp_size = 1024;
-
- /* fill in BDEs for command */
- /* Allocate buffer for command payload */
- mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_ATOMIC);
- if (!mp)
- goto ns_cmd_exit;
-
- INIT_LIST_HEAD(&mp->list);
- mp->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &(mp->phys));
- if (!mp->virt)
- goto ns_cmd_free_mp;
-
- /* Allocate buffer for Buffer ptr list */
- bmp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_ATOMIC);
- if (!bmp)
- goto ns_cmd_free_mpvirt;
-
- INIT_LIST_HEAD(&bmp->list);
- bmp->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &(bmp->phys));
- if (!bmp->virt)
- goto ns_cmd_free_bmp;
-
- /* NameServer Req */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY,
- "%d:0236 NameServer Req Data: x%x x%x x%x\n",
- phba->brd_no, cmdcode, phba->fc_flag,
- phba->fc_rscn_id_cnt);
-
- bpl = (struct ulp_bde64 *) bmp->virt;
- memset(bpl, 0, sizeof(struct ulp_bde64));
- bpl->addrHigh = le32_to_cpu( putPaddrHigh(mp->phys) );
- bpl->addrLow = le32_to_cpu( putPaddrLow(mp->phys) );
- bpl->tus.f.bdeFlags = 0;
- if (cmdcode == SLI_CTNS_GID_FT)
- bpl->tus.f.bdeSize = GID_REQUEST_SZ;
- else if (cmdcode == SLI_CTNS_RFT_ID)
- bpl->tus.f.bdeSize = RFT_REQUEST_SZ;
- else if (cmdcode == SLI_CTNS_RNN_ID)
- bpl->tus.f.bdeSize = RNN_REQUEST_SZ;
- else if (cmdcode == SLI_CTNS_RSNN_NN)
- bpl->tus.f.bdeSize = RSNN_REQUEST_SZ;
- else
- bpl->tus.f.bdeSize = 0;
- bpl->tus.w = le32_to_cpu(bpl->tus.w);
-
- CtReq = (struct lpfc_sli_ct_request *) mp->virt;
- memset(CtReq, 0, sizeof (struct lpfc_sli_ct_request));
- CtReq->RevisionId.bits.Revision = SLI_CT_REVISION;
- CtReq->RevisionId.bits.InId = 0;
- CtReq->FsType = SLI_CT_DIRECTORY_SERVICE;
- CtReq->FsSubType = SLI_CT_DIRECTORY_NAME_SERVER;
- CtReq->CommandResponse.bits.Size = 0;
- switch (cmdcode) {
- case SLI_CTNS_GID_FT:
- CtReq->CommandResponse.bits.CmdRsp =
- be16_to_cpu(SLI_CTNS_GID_FT);
- CtReq->un.gid.Fc4Type = SLI_CTPT_FCP;
- if (phba->hba_state < LPFC_HBA_READY)
- phba->hba_state = LPFC_NS_QRY;
- lpfc_set_disctmo(phba);
- cmpl = lpfc_cmpl_ct_cmd_gid_ft;
- rsp_size = FC_MAX_NS_RSP;
- break;
-
- case SLI_CTNS_RFT_ID:
- CtReq->CommandResponse.bits.CmdRsp =
- be16_to_cpu(SLI_CTNS_RFT_ID);
- CtReq->un.rft.PortId = be32_to_cpu(phba->fc_myDID);
- CtReq->un.rft.fcpReg = 1;
- cmpl = lpfc_cmpl_ct_cmd_rft_id;
- break;
-
- case SLI_CTNS_RNN_ID:
- CtReq->CommandResponse.bits.CmdRsp =
- be16_to_cpu(SLI_CTNS_RNN_ID);
- CtReq->un.rnn.PortId = be32_to_cpu(phba->fc_myDID);
- memcpy(CtReq->un.rnn.wwnn, &phba->fc_nodename,
- sizeof (struct lpfc_name));
- cmpl = lpfc_cmpl_ct_cmd_rnn_id;
- break;
-
- case SLI_CTNS_RSNN_NN:
- CtReq->CommandResponse.bits.CmdRsp =
- be16_to_cpu(SLI_CTNS_RSNN_NN);
- memcpy(CtReq->un.rsnn.wwnn, &phba->fc_nodename,
- sizeof (struct lpfc_name));
- lpfc_get_hba_sym_node_name(phba, CtReq->un.rsnn.symbname);
- CtReq->un.rsnn.len = strlen(CtReq->un.rsnn.symbname);
- cmpl = lpfc_cmpl_ct_cmd_rsnn_nn;
- break;
- }
-
- if (!lpfc_ct_cmd(phba, mp, bmp, ndlp, cmpl, rsp_size))
- /* On success, The cmpl function will free the buffers */
- return 0;
-
- lpfc_mbuf_free(phba, bmp->virt, bmp->phys);
-ns_cmd_free_bmp:
- kfree(bmp);
-ns_cmd_free_mpvirt:
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
-ns_cmd_free_mp:
- kfree(mp);
-ns_cmd_exit:
- return 1;
-}
-
-static void
-lpfc_cmpl_ct_cmd_fdmi(struct lpfc_hba * phba,
- struct lpfc_iocbq * cmdiocb, struct lpfc_iocbq * rspiocb)
-{
- struct lpfc_dmabuf *bmp = cmdiocb->context3;
- struct lpfc_dmabuf *inp = cmdiocb->context1;
- struct lpfc_dmabuf *outp = cmdiocb->context2;
- struct lpfc_sli_ct_request *CTrsp = outp->virt;
- struct lpfc_sli_ct_request *CTcmd = inp->virt;
- struct lpfc_nodelist *ndlp;
- uint16_t fdmi_cmd = CTcmd->CommandResponse.bits.CmdRsp;
- uint16_t fdmi_rsp = CTrsp->CommandResponse.bits.CmdRsp;
-
- ndlp = lpfc_findnode_did(phba, NLP_SEARCH_ALL, FDMI_DID);
- if (fdmi_rsp == be16_to_cpu(SLI_CT_RESPONSE_FS_RJT)) {
- /* FDMI rsp failed */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY,
- "%d:0220 FDMI rsp failed Data: x%x\n",
- phba->brd_no,
- be16_to_cpu(fdmi_cmd));
- }
-
- switch (be16_to_cpu(fdmi_cmd)) {
- case SLI_MGMT_RHBA:
- lpfc_fdmi_cmd(phba, ndlp, SLI_MGMT_RPA);
- break;
-
- case SLI_MGMT_RPA:
- break;
-
- case SLI_MGMT_DHBA:
- lpfc_fdmi_cmd(phba, ndlp, SLI_MGMT_DPRT);
- break;
-
- case SLI_MGMT_DPRT:
- lpfc_fdmi_cmd(phba, ndlp, SLI_MGMT_RHBA);
- break;
- }
-
- lpfc_free_ct_rsp(phba, outp);
- lpfc_mbuf_free(phba, inp->virt, inp->phys);
- lpfc_mbuf_free(phba, bmp->virt, bmp->phys);
- kfree(inp);
- kfree(bmp);
- mempool_free(cmdiocb, phba->iocb_mem_pool);
- return;
-}
-int
-lpfc_fdmi_cmd(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp, int cmdcode)
-{
- struct lpfc_dmabuf *mp, *bmp;
- struct lpfc_sli_ct_request *CtReq;
- struct ulp_bde64 *bpl;
- uint32_t size;
- REG_HBA *rh;
- PORT_ENTRY *pe;
- REG_PORT_ATTRIBUTE *pab;
- ATTRIBUTE_BLOCK *ab;
- ATTRIBUTE_ENTRY *ae;
- void (*cmpl) (struct lpfc_hba *, struct lpfc_iocbq *,
- struct lpfc_iocbq *);
-
-
- /* fill in BDEs for command */
- /* Allocate buffer for command payload */
- mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_ATOMIC);
- if (!mp)
- goto fdmi_cmd_exit;
-
- mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys));
- if (!mp->virt)
- goto fdmi_cmd_free_mp;
-
- /* Allocate buffer for Buffer ptr list */
- bmp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_ATOMIC);
- if (!bmp)
- goto fdmi_cmd_free_mpvirt;
-
- bmp->virt = lpfc_mbuf_alloc(phba, 0, &(bmp->phys));
- if (!bmp->virt)
- goto fdmi_cmd_free_bmp;
-
- INIT_LIST_HEAD(&mp->list);
- INIT_LIST_HEAD(&bmp->list);
-
- /* FDMI request */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY,
- "%d:0218 FDMI Request Data: x%x x%x x%x\n",
- phba->brd_no,
- phba->fc_flag, phba->hba_state, cmdcode);
-
- CtReq = (struct lpfc_sli_ct_request *) mp->virt;
-
- memset(CtReq, 0, sizeof(struct lpfc_sli_ct_request));
- CtReq->RevisionId.bits.Revision = SLI_CT_REVISION;
- CtReq->RevisionId.bits.InId = 0;
-
- CtReq->FsType = SLI_CT_MANAGEMENT_SERVICE;
- CtReq->FsSubType = SLI_CT_FDMI_Subtypes;
- size = 0;
-
- switch (cmdcode) {
- case SLI_MGMT_RHBA:
- {
- lpfc_vpd_t *vp = &phba->vpd;
- uint32_t i, j, incr;
- int len;
-
- CtReq->CommandResponse.bits.CmdRsp =
- be16_to_cpu(SLI_MGMT_RHBA);
- CtReq->CommandResponse.bits.Size = 0;
- rh = (REG_HBA *) & CtReq->un.PortID;
- memcpy(&rh->hi.PortName, &phba->fc_sparam.portName,
- sizeof (struct lpfc_name));
- /* One entry (port) per adapter */
- rh->rpl.EntryCnt = be32_to_cpu(1);
- memcpy(&rh->rpl.pe, &phba->fc_sparam.portName,
- sizeof (struct lpfc_name));
-
- /* point to the HBA attribute block */
- size = 2 * sizeof (struct lpfc_name) + FOURBYTES;
- ab = (ATTRIBUTE_BLOCK *) ((uint8_t *) rh + size);
- ab->EntryCnt = 0;
-
- /* Point to the beginning of the first HBA attribute
- entry */
- /* #1 HBA attribute entry */
- size += FOURBYTES;
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size);
- ae->ad.bits.AttrType = be16_to_cpu(NODE_NAME);
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES
- + sizeof (struct lpfc_name));
- memcpy(&ae->un.NodeName, &phba->fc_sparam.nodeName,
- sizeof (struct lpfc_name));
- ab->EntryCnt++;
- size += FOURBYTES + sizeof (struct lpfc_name);
-
- /* #2 HBA attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size);
- ae->ad.bits.AttrType = be16_to_cpu(MANUFACTURER);
- strcpy(ae->un.Manufacturer, "Emulex Corporation");
- len = strlen(ae->un.Manufacturer);
- len += (len & 3) ? (4 - (len & 3)) : 4;
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len);
- ab->EntryCnt++;
- size += FOURBYTES + len;
-
- /* #3 HBA attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size);
- ae->ad.bits.AttrType = be16_to_cpu(SERIAL_NUMBER);
- strcpy(ae->un.SerialNumber, phba->SerialNumber);
- len = strlen(ae->un.SerialNumber);
- len += (len & 3) ? (4 - (len & 3)) : 4;
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len);
- ab->EntryCnt++;
- size += FOURBYTES + len;
-
- /* #4 HBA attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size);
- ae->ad.bits.AttrType = be16_to_cpu(MODEL);
- lpfc_get_hba_model_desc(phba, ae->un.Model, NULL);
- len = strlen(ae->un.Model);
- len += (len & 3) ? (4 - (len & 3)) : 4;
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len);
- ab->EntryCnt++;
- size += FOURBYTES + len;
-
- /* #5 HBA attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size);
- ae->ad.bits.AttrType = be16_to_cpu(MODEL_DESCRIPTION);
- lpfc_get_hba_model_desc(phba, NULL,
- ae->un.ModelDescription);
- len = strlen(ae->un.ModelDescription);
- len += (len & 3) ? (4 - (len & 3)) : 4;
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len);
- ab->EntryCnt++;
- size += FOURBYTES + len;
-
- /* #6 HBA attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size);
- ae->ad.bits.AttrType = be16_to_cpu(HARDWARE_VERSION);
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 8);
- /* Convert JEDEC ID to ascii for hardware version */
- incr = vp->rev.biuRev;
- for (i = 0; i < 8; i++) {
- j = (incr & 0xf);
- if (j <= 9)
- ae->un.HardwareVersion[7 - i] =
- (char)((uint8_t) 0x30 +
- (uint8_t) j);
- else
- ae->un.HardwareVersion[7 - i] =
- (char)((uint8_t) 0x61 +
- (uint8_t) (j - 10));
- incr = (incr >> 4);
- }
- ab->EntryCnt++;
- size += FOURBYTES + 8;
-
- /* #7 HBA attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size);
- ae->ad.bits.AttrType = be16_to_cpu(DRIVER_VERSION);
- strcpy(ae->un.DriverVersion, lpfc_release_version);
- len = strlen(ae->un.DriverVersion);
- len += (len & 3) ? (4 - (len & 3)) : 4;
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len);
- ab->EntryCnt++;
- size += FOURBYTES + len;
-
- /* #8 HBA attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size);
- ae->ad.bits.AttrType = be16_to_cpu(OPTION_ROM_VERSION);
- strcpy(ae->un.OptionROMVersion, phba->OptionROMVersion);
- len = strlen(ae->un.OptionROMVersion);
- len += (len & 3) ? (4 - (len & 3)) : 4;
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len);
- ab->EntryCnt++;
- size += FOURBYTES + len;
-
- /* #9 HBA attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size);
- ae->ad.bits.AttrType = be16_to_cpu(FIRMWARE_VERSION);
- lpfc_decode_firmware_rev(phba, ae->un.FirmwareVersion,
- 1);
- len = strlen(ae->un.FirmwareVersion);
- len += (len & 3) ? (4 - (len & 3)) : 4;
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len);
- ab->EntryCnt++;
- size += FOURBYTES + len;
-
- /* #10 HBA attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size);
- ae->ad.bits.AttrType = be16_to_cpu(OS_NAME_VERSION);
- sprintf(ae->un.OsNameVersion, "%s %s %s",
- system_utsname.sysname, system_utsname.release,
- system_utsname.version);
- len = strlen(ae->un.OsNameVersion);
- len += (len & 3) ? (4 - (len & 3)) : 4;
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len);
- ab->EntryCnt++;
- size += FOURBYTES + len;
-
- /* #11 HBA attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) rh + size);
- ae->ad.bits.AttrType = be16_to_cpu(MAX_CT_PAYLOAD_LEN);
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 4);
- ae->un.MaxCTPayloadLen = (65 * 4096);
- ab->EntryCnt++;
- size += FOURBYTES + 4;
-
- ab->EntryCnt = be32_to_cpu(ab->EntryCnt);
- /* Total size */
- size = GID_REQUEST_SZ - 4 + size;
- }
- break;
-
- case SLI_MGMT_RPA:
- {
- lpfc_vpd_t *vp;
- struct serv_parm *hsp;
- int len;
-
- vp = &phba->vpd;
-
- CtReq->CommandResponse.bits.CmdRsp =
- be16_to_cpu(SLI_MGMT_RPA);
- CtReq->CommandResponse.bits.Size = 0;
- pab = (REG_PORT_ATTRIBUTE *) & CtReq->un.PortID;
- size = sizeof (struct lpfc_name) + FOURBYTES;
- memcpy((uint8_t *) & pab->PortName,
- (uint8_t *) & phba->fc_sparam.portName,
- sizeof (struct lpfc_name));
- pab->ab.EntryCnt = 0;
-
- /* #1 Port attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab + size);
- ae->ad.bits.AttrType = be16_to_cpu(SUPPORTED_FC4_TYPES);
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 32);
- ae->un.SupportFC4Types[2] = 1;
- ae->un.SupportFC4Types[7] = 1;
- pab->ab.EntryCnt++;
- size += FOURBYTES + 32;
-
- /* #2 Port attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab + size);
- ae->ad.bits.AttrType = be16_to_cpu(SUPPORTED_SPEED);
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 4);
- if (FC_JEDEC_ID(vp->rev.biuRev) == VIPER_JEDEC_ID)
- ae->un.SupportSpeed = HBA_PORTSPEED_10GBIT;
- else if (FC_JEDEC_ID(vp->rev.biuRev) == HELIOS_JEDEC_ID)
- ae->un.SupportSpeed = HBA_PORTSPEED_4GBIT;
- else if ((FC_JEDEC_ID(vp->rev.biuRev) ==
- CENTAUR_2G_JEDEC_ID)
- || (FC_JEDEC_ID(vp->rev.biuRev) ==
- PEGASUS_JEDEC_ID)
- || (FC_JEDEC_ID(vp->rev.biuRev) ==
- THOR_JEDEC_ID))
- ae->un.SupportSpeed = HBA_PORTSPEED_2GBIT;
- else
- ae->un.SupportSpeed = HBA_PORTSPEED_1GBIT;
- pab->ab.EntryCnt++;
- size += FOURBYTES + 4;
-
- /* #3 Port attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab + size);
- ae->ad.bits.AttrType = be16_to_cpu(PORT_SPEED);
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 4);
- switch(phba->fc_linkspeed) {
- case LA_1GHZ_LINK:
- ae->un.PortSpeed = HBA_PORTSPEED_1GBIT;
- break;
- case LA_2GHZ_LINK:
- ae->un.PortSpeed = HBA_PORTSPEED_2GBIT;
- break;
- case LA_4GHZ_LINK:
- ae->un.PortSpeed = HBA_PORTSPEED_4GBIT;
- break;
- default:
- ae->un.PortSpeed =
- HBA_PORTSPEED_UNKNOWN;
- break;
- }
- pab->ab.EntryCnt++;
- size += FOURBYTES + 4;
-
- /* #4 Port attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab + size);
- ae->ad.bits.AttrType = be16_to_cpu(MAX_FRAME_SIZE);
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + 4);
- hsp = (struct serv_parm *) & phba->fc_sparam;
- ae->un.MaxFrameSize =
- (((uint32_t) hsp->cmn.
- bbRcvSizeMsb) << 8) | (uint32_t) hsp->cmn.
- bbRcvSizeLsb;
- pab->ab.EntryCnt++;
- size += FOURBYTES + 4;
-
- /* #5 Port attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab + size);
- ae->ad.bits.AttrType = be16_to_cpu(OS_DEVICE_NAME);
- strcpy((char *)ae->un.OsDeviceName, LPFC_DRIVER_NAME);
- len = strlen((char *)ae->un.OsDeviceName);
- len += (len & 3) ? (4 - (len & 3)) : 4;
- ae->ad.bits.AttrLen = be16_to_cpu(FOURBYTES + len);
- pab->ab.EntryCnt++;
- size += FOURBYTES + len;
-
- if (phba->cfg_fdmi_on == 2) {
- /* #6 Port attribute entry */
- ae = (ATTRIBUTE_ENTRY *) ((uint8_t *) pab +
- size);
- ae->ad.bits.AttrType = be16_to_cpu(HOST_NAME);
- sprintf(ae->un.HostName, "%s",
- system_utsname.nodename);
- len = strlen(ae->un.HostName);
- len += (len & 3) ? (4 - (len & 3)) : 4;
- ae->ad.bits.AttrLen =
- be16_to_cpu(FOURBYTES + len);
- pab->ab.EntryCnt++;
- size += FOURBYTES + len;
- }
-
- pab->ab.EntryCnt = be32_to_cpu(pab->ab.EntryCnt);
- /* Total size */
- size = GID_REQUEST_SZ - 4 + size;
- }
- break;
-
- case SLI_MGMT_DHBA:
- CtReq->CommandResponse.bits.CmdRsp = be16_to_cpu(SLI_MGMT_DHBA);
- CtReq->CommandResponse.bits.Size = 0;
- pe = (PORT_ENTRY *) & CtReq->un.PortID;
- memcpy((uint8_t *) & pe->PortName,
- (uint8_t *) & phba->fc_sparam.portName,
- sizeof (struct lpfc_name));
- size = GID_REQUEST_SZ - 4 + sizeof (struct lpfc_name);
- break;
-
- case SLI_MGMT_DPRT:
- CtReq->CommandResponse.bits.CmdRsp = be16_to_cpu(SLI_MGMT_DPRT);
- CtReq->CommandResponse.bits.Size = 0;
- pe = (PORT_ENTRY *) & CtReq->un.PortID;
- memcpy((uint8_t *) & pe->PortName,
- (uint8_t *) & phba->fc_sparam.portName,
- sizeof (struct lpfc_name));
- size = GID_REQUEST_SZ - 4 + sizeof (struct lpfc_name);
- break;
- }
-
- bpl = (struct ulp_bde64 *) bmp->virt;
- bpl->addrHigh = le32_to_cpu( putPaddrHigh(mp->phys) );
- bpl->addrLow = le32_to_cpu( putPaddrLow(mp->phys) );
- bpl->tus.f.bdeFlags = 0;
- bpl->tus.f.bdeSize = size;
- bpl->tus.w = le32_to_cpu(bpl->tus.w);
-
- cmpl = lpfc_cmpl_ct_cmd_fdmi;
-
- if (!lpfc_ct_cmd(phba, mp, bmp, ndlp, cmpl, FC_MAX_NS_RSP))
- return 0;
-
- lpfc_mbuf_free(phba, bmp->virt, bmp->phys);
-fdmi_cmd_free_bmp:
- kfree(bmp);
-fdmi_cmd_free_mpvirt:
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
-fdmi_cmd_free_mp:
- kfree(mp);
-fdmi_cmd_exit:
- /* Issue FDMI request failed */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY,
- "%d:0244 Issue FDMI request failed Data: x%x\n",
- phba->brd_no,
- cmdcode);
- return 1;
-}
-
-
-void
-lpfc_fdmi_tmo(unsigned long ptr)
-{
- struct lpfc_hba *phba = (struct lpfc_hba*)ptr;
- struct lpfc_nodelist *ndlp;
- unsigned long iflag;
-
- spin_lock_irqsave(phba->host->host_lock, iflag);
- ndlp = lpfc_findnode_did(phba, NLP_SEARCH_ALL, FDMI_DID);
- if (ndlp) {
- if (system_utsname.nodename[0] != '\0') {
- lpfc_fdmi_cmd(phba, ndlp, SLI_MGMT_DHBA);
- } else {
- mod_timer(&phba->fc_fdmitmo, jiffies + HZ * 60);
- }
- }
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- return;
-}
-
-
-void
-lpfc_decode_firmware_rev(struct lpfc_hba * phba, char *fwrevision, int flag)
-{
- struct lpfc_sli *psli = &phba->sli;
- lpfc_vpd_t *vp = &phba->vpd;
- uint32_t b1, b2, b3, b4, i, rev;
- char c;
- uint32_t *ptr, str[4];
- uint8_t *fwname;
-
- if (vp->rev.rBit) {
- if (psli->sliinit.sli_flag & LPFC_SLI2_ACTIVE)
- rev = vp->rev.sli2FwRev;
- else
- rev = vp->rev.sli1FwRev;
-
- b1 = (rev & 0x0000f000) >> 12;
- b2 = (rev & 0x00000f00) >> 8;
- b3 = (rev & 0x000000c0) >> 6;
- b4 = (rev & 0x00000030) >> 4;
-
- switch (b4) {
- case 0:
- c = 'N';
- break;
- case 1:
- c = 'A';
- break;
- case 2:
- c = 'B';
- break;
- default:
- c = 0;
- break;
- }
- b4 = (rev & 0x0000000f);
-
- if (psli->sliinit.sli_flag & LPFC_SLI2_ACTIVE)
- fwname = vp->rev.sli2FwName;
- else
- fwname = vp->rev.sli1FwName;
-
- for (i = 0; i < 16; i++)
- if(fwname[i] == 0x20)
- fwname[i] = 0;
-
- ptr = (uint32_t*)fwname;
-
- for (i = 0; i < 3; i++)
- str[i] = be32_to_cpu(*ptr++);
-
- if (c == 0) {
- if (flag)
- sprintf(fwrevision, "%d.%d%d (%s)",
- b1, b2, b3, (char *)str);
- else
- sprintf(fwrevision, "%d.%d%d", b1,
- b2, b3);
- } else {
- if (flag)
- sprintf(fwrevision, "%d.%d%d%c%d (%s)",
- b1, b2, b3, c,
- b4, (char *)str);
- else
- sprintf(fwrevision, "%d.%d%d%c%d",
- b1, b2, b3, c, b4);
- }
- } else {
- rev = vp->rev.smFwRev;
-
- b1 = (rev & 0xff000000) >> 24;
- b2 = (rev & 0x00f00000) >> 20;
- b3 = (rev & 0x000f0000) >> 16;
- c = (rev & 0x0000ff00) >> 8;
- b4 = (rev & 0x000000ff);
-
- if (flag)
- sprintf(fwrevision, "%d.%d%d%c%d ", b1,
- b2, b3, c, b4);
- else
- sprintf(fwrevision, "%d.%d%d%c%d ", b1,
- b2, b3, c, b4);
- }
- return;
-}
-
-void
-lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
-{
- lpfc_vpd_t *vp;
- uint32_t id;
- char str[16];
-
- vp = &phba->vpd;
- pci_read_config_dword(phba->pcidev, PCI_VENDOR_ID, &id);
-
- switch ((id >> 16) & 0xffff) {
- case PCI_DEVICE_ID_SUPERFLY:
- if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
- strcpy(str, "LP7000 1");
- else
- strcpy(str, "LP7000E 1");
- break;
- case PCI_DEVICE_ID_DRAGONFLY:
- strcpy(str, "LP8000 1");
- break;
- case PCI_DEVICE_ID_CENTAUR:
- if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
- strcpy(str, "LP9002 2");
- else
- strcpy(str, "LP9000 1");
- break;
- case PCI_DEVICE_ID_RFLY:
- strcpy(str, "LP952 2");
- break;
- case PCI_DEVICE_ID_PEGASUS:
- strcpy(str, "LP9802 2");
- break;
- case PCI_DEVICE_ID_THOR:
- strcpy(str, "LP10000 2");
- break;
- case PCI_DEVICE_ID_VIPER:
- strcpy(str, "LPX1000 10");
- break;
- case PCI_DEVICE_ID_PFLY:
- strcpy(str, "LP982 2");
- break;
- case PCI_DEVICE_ID_TFLY:
- strcpy(str, "LP1050 2");
- break;
- case PCI_DEVICE_ID_HELIOS:
- strcpy(str, "LP11000 4");
- break;
- case PCI_DEVICE_ID_BMID:
- strcpy(str, "LP1150 4");
- break;
- case PCI_DEVICE_ID_BSMB:
- strcpy(str, "LP111 4");
- break;
- case PCI_DEVICE_ID_ZEPHYR:
- strcpy(str, "LP11000e 4");
- break;
- case PCI_DEVICE_ID_ZMID:
- strcpy(str, "LP1150e 4");
- break;
- case PCI_DEVICE_ID_ZSMB:
- strcpy(str, "LP111e 4");
- break;
- case PCI_DEVICE_ID_LP101:
- strcpy(str, "LP101 2");
- break;
- }
- if (mdp)
- sscanf(str, "%s", mdp);
- if (descp)
- sprintf(descp, "Emulex LightPulse %s Gigabit PCI Fibre "
- "Channel Adapter", str);
-}
-
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_disc.h 1.45 2004/11/10 11:40:40EST sf_support Exp $
- */
-
-#ifndef _H_LPFC_DISC
-#define _H_LPFC_DISC
-
-#include "lpfc_hw.h"
-
-struct lpfc_target;
-
-#define FC_MAX_HOLD_RSCN 32 /* max number of deferred RSCNs */
-#define FC_MAX_NS_RSP 65536 /* max size NameServer rsp */
-#define FC_MAXLOOP 126 /* max devices supported on a fc loop */
-#define LPFC_DISC_FLOGI_TMO 10 /* Discovery FLOGI ratov */
-
-/* Defines for failMask bitmask
- * These are reasons that the device is not currently available
- * for I/O to be sent.
- */
-#define LPFC_DEV_LINK_DOWN 0x1 /* Link is down */
-#define LPFC_DEV_DISAPPEARED 0x2 /* Device disappeared from mapped
- list */
-#define LPFC_DEV_DISCOVERY_INP 0x4 /* Device to go through discovery */
-#define LPFC_DEV_DISCONNECTED 0x8 /* noactive connection to remote dev */
-
-/* These defines are used for set failMask routines */
-#define LPFC_SET_BITMASK 1
-#define LPFC_CLR_BITMASK 2
-
-/* Provide an enumeration for the Types of addresses a FARP can resolve. */
-typedef enum lpfc_farp_addr_type {
- LPFC_FARP_BY_IEEE,
- LPFC_FARP_BY_WWPN,
- LPFC_FARP_BY_WWNN,
-} LPFC_FARP_ADDR_TYPE;
-
-/* This is the protocol dependent definition for a Node List Entry.
- * This is used by Fibre Channel protocol to support FCP.
- */
-
-struct lpfc_bindlist {
- struct list_head nlp_listp;
- struct lpfc_target *nlp_Target; /* ptr to the tgt structure */
- struct lpfc_name nlp_portname; /* port name */
- struct lpfc_name nlp_nodename; /* node name */
- uint16_t nlp_bind_type;
- uint16_t nlp_sid; /* scsi id */
- uint32_t nlp_DID; /* FibreChannel D_ID of entry */
-};
-
-struct lpfc_nodelist {
- struct list_head nlp_listp;
- struct lpfc_name nlp_portname; /* port name */
- struct lpfc_name nlp_nodename; /* node name */
- uint32_t nlp_failMask; /* failure mask for device */
- uint32_t nlp_flag; /* entry flags */
- uint32_t nlp_DID; /* FC D_ID of entry */
- uint32_t nlp_last_elscmd; /* Last ELS cmd sent */
- uint16_t nlp_type;
-#define NLP_FC_NODE 0x1 /* entry is an FC node */
-#define NLP_FABRIC 0x4 /* entry rep a Fabric entity */
-#define NLP_FCP_TARGET 0x8 /* entry is an FCP target */
-
- uint16_t nlp_rpi;
- uint16_t nlp_state; /* state transition indicator */
- uint16_t nlp_xri; /* output exchange id for RPI */
- uint16_t nlp_sid; /* scsi id */
- uint8_t nlp_retry; /* used for ELS retries */
- uint8_t nlp_disc_refcnt; /* used for DSM */
- uint8_t nlp_fcp_info; /* class info, bits 0-3 */
-#define NLP_FCP_2_DEVICE 0x10 /* FCP-2 device */
-
- struct timer_list nlp_delayfunc; /* Used for delayed ELS cmds */
- struct timer_list nlp_tmofunc; /* Used for nodev tmo */
- struct lpfc_target *nlp_Target; /* Pointer to the target
- structure */
-
- struct lpfc_bindlist *nlp_listp_bind; /* Linked list bounded remote
- ports */
- struct lpfc_nodelist *nlp_rpi_hash_next;
- struct lpfc_hba *nlp_phba;
-};
-
-/*++
- * lpfc_node_farp_list:
- * This data structure defines the attributes associated with
- * an outstanding FARP REQ to a remote node.
- *
- * listentry - head of this list of pending farp requests.
- * rnode_addr - The address of the remote node. Either the IEEE, WWPN, or
- * WWNN. Used in the FARP request.
- *
- --*/
-struct lpfc_node_farp_pend {
- struct list_head listentry;
- struct lpfc_name rnode_addr;
-};
-
-/* Defines for nlp_flag (uint32) */
-#define NLP_NO_LIST 0x0 /* Indicates immediately free node */
-#define NLP_UNUSED_LIST 0x1 /* Flg to indicate node will be freed */
-#define NLP_PLOGI_LIST 0x2 /* Flg to indicate sent PLOGI */
-#define NLP_ADISC_LIST 0x3 /* Flg to indicate sent ADISC */
-#define NLP_REGLOGIN_LIST 0x4 /* Flg to indicate sent REG_LOGIN */
-#define NLP_PRLI_LIST 0x5 /* Flg to indicate sent PRLI */
-#define NLP_UNMAPPED_LIST 0x6 /* Node is now unmapped */
-#define NLP_MAPPED_LIST 0x7 /* Node is now mapped */
-#define NLP_NPR_LIST 0x8 /* Node is in NPort Recovery state */
-#define NLP_JUST_DQ 0x9 /* just deque ndlp in lpfc_nlp_list */
-#define NLP_LIST_MASK 0xf /* mask to see what list node is on */
-#define NLP_PLOGI_SND 0x20 /* sent PLOGI request for this entry */
-#define NLP_PRLI_SND 0x40 /* sent PRLI request for this entry */
-#define NLP_ADISC_SND 0x80 /* sent ADISC request for this entry */
-#define NLP_LOGO_SND 0x100 /* sent LOGO request for this entry */
-#define NLP_RNID_SND 0x400 /* sent RNID request for this entry */
-#define NLP_ELS_SND_MASK 0x7e0 /* sent ELS request for this entry */
-#define NLP_AUTOMAP 0x800 /* Entry was automap'ed */
-#define NLP_SEED_WWPN 0x1000 /* Entry scsi id is seeded for WWPN */
-#define NLP_SEED_WWNN 0x2000 /* Entry scsi id is seeded for WWNN */
-#define NLP_SEED_DID 0x4000 /* Entry scsi id is seeded for DID */
-#define NLP_SEED_MASK 0x807000 /* mask for seeded flags */
-#define NLP_NS_NODE 0x8000 /* Authenticated entry by NameServer */
-#define NLP_NODEV_TMO 0x10000 /* nodev timeout is running for node */
-#define NLP_DELAY_TMO 0x20000 /* delay timeout is running for node */
-#define NLP_NPR_2B_DISC 0x40000 /* node is included in num_disc_nodes */
-#define NLP_RCV_PLOGI 0x80000 /* Rcv'ed PLOGI from remote system */
-#define NLP_LOGO_ACC 0x100000 /* Process LOGO after ACC completes */
-#define NLP_TGT_NO_SCSIID 0x200000 /* good PRLI but no binding for scsid */
-#define NLP_SEED_ALPA 0x800000 /* SCSI id is derived from alpa array */
-#define NLP_ACC_REGLOGIN 0x1000000 /* Issue Reg Login after successful
- ACC */
-#define NLP_NPR_ADISC 0x2000000 /* Issue ADISC when dq'ed from
- NPR list */
-#define NLP_DELAY_REMOVE 0x4000000 /* Defer removal till end of DSM */
-
-/* Defines for list searchs */
-#define NLP_SEARCH_MAPPED 0x1 /* search mapped */
-#define NLP_SEARCH_UNMAPPED 0x2 /* search unmapped */
-#define NLP_SEARCH_PLOGI 0x4 /* search plogi */
-#define NLP_SEARCH_ADISC 0x8 /* search adisc */
-#define NLP_SEARCH_REGLOGIN 0x10 /* search reglogin */
-#define NLP_SEARCH_PRLI 0x20 /* search prli */
-#define NLP_SEARCH_NPR 0x40 /* search npr */
-#define NLP_SEARCH_UNUSED 0x80 /* search mapped */
-#define NLP_SEARCH_ALL 0xff /* search all lists */
-
-/* There are 4 different double linked lists nodelist entries can reside on.
- * The Port Login (PLOGI) list and Address Discovery (ADISC) list are used
- * when Link Up discovery or Registered State Change Notification (RSCN)
- * processing is needed. Each list holds the nodes that require a PLOGI or
- * ADISC Extended Link Service (ELS) request. These lists keep track of the
- * nodes affected by an RSCN, or a Link Up (Typically, all nodes are effected
- * by Link Up) event. The unmapped_list contains all nodes that have
- * successfully logged into at the Fibre Channel level. The
- * mapped_list will contain all nodes that are mapped FCP targets.
- *
- * The bind list is a list of undiscovered (potentially non-existent) nodes
- * that we have saved binding information on. This information is used when
- * nodes transition from the unmapped to the mapped list.
- */
-
-/* Defines for nlp_state */
-#define NLP_STE_UNUSED_NODE 0x0 /* node is just allocated */
-#define NLP_STE_PLOGI_ISSUE 0x1 /* PLOGI was sent to NL_PORT */
-#define NLP_STE_ADISC_ISSUE 0x2 /* ADISC was sent to NL_PORT */
-#define NLP_STE_REG_LOGIN_ISSUE 0x3 /* REG_LOGIN was issued for NL_PORT */
-#define NLP_STE_PRLI_ISSUE 0x4 /* PRLI was sent to NL_PORT */
-#define NLP_STE_UNMAPPED_NODE 0x5 /* PRLI completed from NL_PORT */
-#define NLP_STE_MAPPED_NODE 0x6 /* Identified as a FCP Target */
-#define NLP_STE_NPR_NODE 0x7 /* NPort disappeared */
-#define NLP_STE_MAX_STATE 0x8
-#define NLP_STE_FREED_NODE 0xff /* node entry was freed to MEM_NLP */
-
-/* For UNUSED_NODE state, the node has just been allocated.
- * For PLOGI_ISSUE and REG_LOGIN_ISSUE, the node is on
- * the PLOGI list. For REG_LOGIN_COMPL, the node is taken off the PLOGI list
- * and put on the unmapped list. For ADISC processing, the node is taken off
- * the ADISC list and placed on either the mapped or unmapped list (depending
- * on its previous state). Once on the unmapped list, a PRLI is issued and the
- * state changed to PRLI_ISSUE. When the PRLI completion occurs, the state is
- * changed to PRLI_COMPL. If the completion indicates a mapped
- * node, the node is taken off the unmapped list. The binding list is checked
- * for a valid binding, or a binding is automatically assigned. If binding
- * assignment is unsuccessful, the node is left on the unmapped list. If
- * binding assignment is successful, the associated binding list entry (if
- * any) is removed, and the node is placed on the mapped list.
- */
-/*
- * For a Link Down, all nodes on the ADISC, PLOGI, unmapped or mapped
- * lists will receive a DEVICE_RECOVERY event. If the linkdown or nodev timers
- * expire, all effected nodes will receive a DEVICE_RM event.
- */
-/*
- * For a Link Up or RSCN, all nodes will move from the mapped / unmapped lists
- * to either the ADISC or PLOGI list. After a Nameserver query or ALPA loopmap
- * check, additional nodes may be added (DEVICE_ADD) or removed (DEVICE_RM) to /
- * from the PLOGI or ADISC lists. Once the PLOGI and ADISC lists are populated,
- * we will first process the ADISC list. 32 entries are processed initially and
- * ADISC is initited for each one. Completions / Events for each node are
- * funnelled thru the state machine. As each node finishes ADISC processing, it
- * starts ADISC for any nodes waiting for ADISC processing. If no nodes are
- * waiting, and the ADISC list count is identically 0, then we are done. For
- * Link Up discovery, since all nodes on the PLOGI list are UNREG_LOGIN'ed, we
- * can issue a CLEAR_LA and reenable Link Events. Next we will process the PLOGI
- * list. 32 entries are processed initially and PLOGI is initited for each one.
- * Completions / Events for each node are funnelled thru the state machine. As
- * each node finishes PLOGI processing, it starts PLOGI for any nodes waiting
- * for PLOGI processing. If no nodes are waiting, and the PLOGI list count is
- * identically 0, then we are done. We have now completed discovery / RSCN
- * handling. Upon completion, ALL nodes should be on either the mapped or
- * unmapped lists.
- */
-
-/* Defines for Node List Entry Events that could happen */
-#define NLP_EVT_RCV_PLOGI 0x0 /* Rcv'd an ELS PLOGI command */
-#define NLP_EVT_RCV_PRLI 0x1 /* Rcv'd an ELS PRLI command */
-#define NLP_EVT_RCV_LOGO 0x2 /* Rcv'd an ELS LOGO command */
-#define NLP_EVT_RCV_ADISC 0x3 /* Rcv'd an ELS ADISC command */
-#define NLP_EVT_RCV_PDISC 0x4 /* Rcv'd an ELS PDISC command */
-#define NLP_EVT_RCV_PRLO 0x5 /* Rcv'd an ELS PRLO command */
-#define NLP_EVT_CMPL_PLOGI 0x6 /* Sent an ELS PLOGI command */
-#define NLP_EVT_CMPL_PRLI 0x7 /* Sent an ELS PRLI command */
-#define NLP_EVT_CMPL_LOGO 0x8 /* Sent an ELS LOGO command */
-#define NLP_EVT_CMPL_ADISC 0x9 /* Sent an ELS ADISC command */
-#define NLP_EVT_CMPL_REG_LOGIN 0xa /* REG_LOGIN mbox cmd completed */
-#define NLP_EVT_DEVICE_RM 0xb /* Device not found in NS / ALPAmap */
-#define NLP_EVT_DEVICE_RECOVERY 0xc /* Device existence unknown */
-#define NLP_EVT_MAX_EVENT 0xd
-
-/* structure used to queue event to the discovery tasklet */
-struct lpfc_disc_evt {
- struct list_head evt_listp;
- void * evt_arg1;
- void * evt_arg2;
- uint32_t evt;
-};
-typedef struct lpfc_disc_evt LPFC_DISC_EVT_t;
-
-#define LPFC_EVT_MBOX 0x1
-#define LPFC_EVT_SOL_IOCB 0x2
-#define LPFC_EVT_UNSOL_IOCB 0x3
-#define LPFC_EVT_NODEV_TMO 0x4
-#define LPFC_EVT_SCAN 0x5
-
-/* Definitions for Binding Entry Type for lpfc_parse_binding_entry() */
-#define LPFC_BIND_WW_NN_PN 0
-#define LPFC_BIND_DID 1
-
-#endif /* _H_LPFC_DISC */
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_els.c 1.152 2004/11/18 18:27:53EST sf_support Exp $
- */
-#include <linux/version.h>
-#include <linux/blkdev.h>
-#include <linux/dma-mapping.h>
-#include <linux/pci.h>
-#include <linux/spinlock.h>
-#include <scsi/scsi_device.h>
-#include <scsi/scsi_host.h>
-#include "lpfc_sli.h"
-#include "lpfc_disc.h"
-#include "lpfc_scsi.h"
-#include "lpfc.h"
-#include "lpfc_crtn.h"
-#include "lpfc_hw.h"
-#include "lpfc_logmsg.h"
-#include "lpfc_mem.h"
-
-
-static int lpfc_els_retry(struct lpfc_hba *, struct lpfc_iocbq *,
- struct lpfc_iocbq *);
-static int lpfc_max_els_tries = 3;
-
-static int
-lpfc_els_chk_latt(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- LPFC_MBOXQ_t *mbox;
- uint32_t ha_copy;
-
- psli = &phba->sli;
-
- if ((phba->hba_state < LPFC_HBA_READY) &&
- (phba->hba_state != LPFC_LINK_DOWN)) {
-
- /* Read the HBA Host Attention Register */
- ha_copy = readl(phba->HAregaddr);
-
- if (ha_copy & HA_LATT) { /* Link Attention interrupt */
-
- /* Pending Link Event during Discovery */
- lpfc_printf_log(phba, KERN_WARNING, LOG_DISCOVERY,
- "%d:0237 Pending Link Event during "
- "Discovery: State x%x\n",
- phba->brd_no, phba->hba_state);
-
- /* CLEAR_LA should re-enable link attention events and
- * we should then imediately take a LATT event. The
- * LATT processing should call lpfc_linkdown() which
- * will cleanup any left over in-progress discovery
- * events.
- */
- phba->fc_flag |= FC_ABORT_DISCOVERY;
-
- if (phba->hba_state != LPFC_CLEAR_LA) {
- if ((mbox = mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC))) {
- phba->hba_state = LPFC_CLEAR_LA;
- lpfc_clear_la(phba, mbox);
- mbox->mbox_cmpl =
- lpfc_mbx_cmpl_clear_la;
- if (lpfc_sli_issue_mbox
- (phba, mbox,
- (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free(mbox,
- phba->mbox_mem_pool);
- phba->hba_state =
- LPFC_HBA_ERROR;
- }
- }
- }
- return (1);
- }
- }
-
- return (0);
-}
-
-struct lpfc_iocbq *
-lpfc_prep_els_iocb(struct lpfc_hba * phba,
- uint8_t expectRsp,
- uint16_t cmdSize,
- uint8_t retry, struct lpfc_nodelist * ndlp, uint32_t elscmd)
-{
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_dmabuf *pcmd, *prsp, *pbuflist;
- struct ulp_bde64 *bpl;
- IOCB_t *icmd;
- uint32_t tag;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING]; /* ELS ring */
-
- if (phba->hba_state < LPFC_LINK_UP)
- return NULL;
-
-
- /* Allocate buffer for command iocb */
- elsiocb = mempool_alloc(phba->iocb_mem_pool, GFP_ATOMIC);
- if (!elsiocb)
- return NULL;
-
- memset(elsiocb, 0, sizeof (struct lpfc_iocbq));
- icmd = &elsiocb->iocb;
-
- /* fill in BDEs for command */
- /* Allocate buffer for command payload */
- if (((pcmd = kmalloc(sizeof (struct lpfc_dmabuf), GFP_ATOMIC)) == 0) ||
- ((pcmd->virt = lpfc_mbuf_alloc(phba,
- MEM_PRI, &(pcmd->phys))) == 0)) {
- if (pcmd)
- kfree(pcmd);
- mempool_free( elsiocb, phba->iocb_mem_pool);
- return NULL;
- }
-
- INIT_LIST_HEAD(&pcmd->list);
-
- /* Allocate buffer for response payload */
- if (expectRsp) {
- prsp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_ATOMIC);
- if (prsp)
- prsp->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
- &prsp->phys);
- if (prsp == 0 || prsp->virt == 0) {
- if (prsp)
- kfree(prsp);
- lpfc_mbuf_free(phba, pcmd->virt, pcmd->phys);
- kfree(pcmd);
- mempool_free( elsiocb, phba->iocb_mem_pool);
- return NULL;
- }
- INIT_LIST_HEAD(&prsp->list);
- } else {
- prsp = NULL;
- }
-
- /* Allocate buffer for Buffer ptr list */
- pbuflist = kmalloc(sizeof (struct lpfc_dmabuf), GFP_ATOMIC);
- if (pbuflist)
- pbuflist->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
- &pbuflist->phys);
- if (pbuflist == 0 || pbuflist->virt == 0) {
- mempool_free( elsiocb, phba->iocb_mem_pool);
- lpfc_mbuf_free(phba, pcmd->virt, pcmd->phys);
- lpfc_mbuf_free(phba, prsp->virt, prsp->phys);
- kfree(pcmd);
- kfree(prsp);
- if (pbuflist)
- kfree(pbuflist);
- return NULL;
- }
-
- INIT_LIST_HEAD(&pbuflist->list);
-
- icmd->un.elsreq64.bdl.addrHigh = putPaddrHigh(pbuflist->phys);
- icmd->un.elsreq64.bdl.addrLow = putPaddrLow(pbuflist->phys);
- icmd->un.elsreq64.bdl.bdeFlags = BUFF_TYPE_BDL;
- if (expectRsp) {
- icmd->un.elsreq64.bdl.bdeSize = (2 * sizeof (struct ulp_bde64));
- icmd->un.elsreq64.remoteID = ndlp->nlp_DID; /* DID */
- icmd->ulpCommand = CMD_ELS_REQUEST64_CR;
- } else {
- icmd->un.elsreq64.bdl.bdeSize = sizeof (struct ulp_bde64);
- icmd->ulpCommand = CMD_XMIT_ELS_RSP64_CX;
- }
-
- /* NOTE: we don't use ulpIoTag0 because it is a t2 structure */
- tag = lpfc_sli_next_iotag(phba, pring);
- icmd->ulpIoTag = (uint16_t)(tag & 0xffff);
- icmd->un.elsreq64.bdl.ulpIoTag32 = tag;
- icmd->ulpBdeCount = 1;
- icmd->ulpLe = 1;
- icmd->ulpClass = CLASS3;
-
- bpl = (struct ulp_bde64 *) pbuflist->virt;
- bpl->addrLow = le32_to_cpu(putPaddrLow(pcmd->phys));
- bpl->addrHigh = le32_to_cpu(putPaddrHigh(pcmd->phys));
- bpl->tus.f.bdeSize = cmdSize;
- bpl->tus.f.bdeFlags = 0;
- bpl->tus.w = le32_to_cpu(bpl->tus.w);
-
- if (expectRsp) {
- bpl++;
- bpl->addrLow = le32_to_cpu(putPaddrLow(prsp->phys));
- bpl->addrHigh = le32_to_cpu(putPaddrHigh(prsp->phys));
- bpl->tus.f.bdeSize = FCELSSIZE;
- bpl->tus.f.bdeFlags = BUFF_USE_RCV;
- bpl->tus.w = le32_to_cpu(bpl->tus.w);
- }
-
- /* Save for completion so we can release these resources */
- elsiocb->context1 = (uint8_t *) ndlp;
- elsiocb->context2 = (uint8_t *) pcmd;
- elsiocb->context3 = (uint8_t *) pbuflist;
- elsiocb->retry = retry;
- elsiocb->drvrTimeout = (phba->fc_ratov << 1) + LPFC_DRVR_TIMEOUT;
-
- if (prsp) {
- list_add(&prsp->list, &pcmd->list);
- }
-
- /* The els iocb is fully initialize. Flush it to main store for the
- * HBA. Note that all els iocb context buffer are from the driver's
- * dma pool and have length LPFC_BPL_SIZE. Get a short-hand pointer to
- * the physical address.
- */
- pci_dma_sync_single_for_device(phba->pcidev, pbuflist->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- if (expectRsp) {
- /* Xmit ELS command <elsCmd> to remote NPORT <did> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0116 Xmit ELS command x%x to remote "
- "NPORT x%x Data: x%x x%x\n",
- phba->brd_no, elscmd,
- ndlp->nlp_DID, icmd->ulpIoTag, phba->hba_state);
- } else {
- /* Xmit ELS response <elsCmd> to remote NPORT <did> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0117 Xmit ELS response x%x to remote "
- "NPORT x%x Data: x%x x%x\n",
- phba->brd_no, elscmd,
- ndlp->nlp_DID, icmd->ulpIoTag, cmdSize);
- }
-
- return (elsiocb);
-}
-
-static void
-lpfc_cmpl_els_flogi(struct lpfc_hba * phba,
- struct lpfc_iocbq * cmdiocb, struct lpfc_iocbq * rspiocb)
-{
- IOCB_t *irsp;
- struct lpfc_dmabuf *pcmd, *prsp;
- struct serv_parm *sp;
- uint32_t *lp;
- LPFC_MBOXQ_t *mbox;
- struct lpfc_sli *psli;
- struct lpfc_nodelist *ndlp;
- int rc;
-
- psli = &phba->sli;
- irsp = &(rspiocb->iocb);
- ndlp = (struct lpfc_nodelist *) cmdiocb->context1;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- /* Check to see if link went down during discovery */
- if (lpfc_els_chk_latt(phba)) {
- lpfc_nlp_remove(phba, ndlp);
- goto out;
- }
-
- if (irsp->ulpStatus) {
- /* Check for retry */
- if (lpfc_els_retry(phba, cmdiocb, rspiocb)) {
- /* ELS command is being retried */
- goto out;
- }
- /* FLOGI failed, so there is no fabric */
- phba->fc_flag &= ~(FC_FABRIC | FC_PUBLIC_LOOP);
-
- /* If private loop, then allow max outstandting els to be
- * LPFC_MAX_DISC_THREADS (32). Scanning in the case of no
- * alpa map would take too long otherwise.
- */
- if (phba->alpa_map[0] == 0) {
- phba->cfg_discovery_threads =
- LPFC_MAX_DISC_THREADS;
- }
-
- /* FLOGI failure */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_ELS,
- "%d:0100 FLOGI failure Data: x%x x%x\n",
- phba->brd_no,
- irsp->ulpStatus, irsp->un.ulpWord[4]);
- } else {
- /* The FLogI succeeded. Sync the data for the CPU before
- * accessing it.
- */
- prsp = (struct lpfc_dmabuf *) pcmd->list.next;
- lp = (uint32_t *) prsp->virt;
-
- /* The HBA populated the response buffer. Flush cpu cache to
- * before the driver touches this memory.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, prsp->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
- sp = (struct serv_parm *) ((uint8_t *) lp + sizeof (uint32_t));
-
- /* FLOGI completes successfully */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0101 FLOGI completes sucessfully "
- "Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- irsp->un.ulpWord[4], sp->cmn.e_d_tov,
- sp->cmn.w2.r_a_tov, sp->cmn.edtovResolution);
-
- if (phba->hba_state == LPFC_FLOGI) {
- /* If Common Service Parameters indicate Nport
- * we are point to point, if Fport we are Fabric.
- */
- if (sp->cmn.fPort) {
- phba->fc_flag |= FC_FABRIC;
- if (sp->cmn.edtovResolution) {
- /* E_D_TOV ticks are in nanoseconds */
- phba->fc_edtov =
- (be32_to_cpu(sp->cmn.e_d_tov) +
- 999999) / 1000000;
- } else {
- /* E_D_TOV ticks are in milliseconds */
- phba->fc_edtov =
- be32_to_cpu(sp->cmn.e_d_tov);
- }
- phba->fc_ratov =
- (be32_to_cpu(sp->cmn.w2.r_a_tov) +
- 999) / 1000;
-
- if (phba->fc_topology == TOPOLOGY_LOOP) {
- phba->fc_flag |= FC_PUBLIC_LOOP;
- } else {
- /* If we are a N-port connected to a
- * Fabric, fixup sparam's so logins to
- * devices on remote loops work.
- */
- phba->fc_sparam.cmn.altBbCredit = 1;
- }
-
- phba->fc_myDID = irsp->un.ulpWord[4] & Mask_DID;
-
- memcpy(&ndlp->nlp_portname, &sp->portName,
- sizeof (struct lpfc_name));
- memcpy(&ndlp->nlp_nodename, &sp->nodeName,
- sizeof (struct lpfc_name));
- memcpy(&phba->fc_fabparam, sp,
- sizeof (struct serv_parm));
- if ((mbox = mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC)) == 0) {
- goto flogifail;
- }
- phba->hba_state = LPFC_FABRIC_CFG_LINK;
- lpfc_config_link(phba, mbox);
- if (lpfc_sli_issue_mbox
- (phba, mbox, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free(mbox, phba->mbox_mem_pool);
- goto flogifail;
- }
-
- if ((mbox = mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC)) == 0) {
- goto flogifail;
- }
- if (lpfc_reg_login(phba, Fabric_DID,
- (uint8_t *) sp, mbox,
- 0) == 0) {
- /* set_slim mailbox command needs to
- * execute first, queue this command to
- * be processed later.
- */
- mbox->mbox_cmpl =
- lpfc_mbx_cmpl_fabric_reg_login;
- mbox->context2 = ndlp;
- if (lpfc_sli_issue_mbox
- (phba, mbox,
- (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free(mbox,
- phba->mbox_mem_pool);
- goto flogifail;
- }
- } else {
- mempool_free(mbox, phba->mbox_mem_pool);
- goto flogifail;
- }
- } else {
- /* We FLOGIed into an NPort, initiate pt2pt
- protocol */
- phba->fc_flag &= ~(FC_FABRIC | FC_PUBLIC_LOOP);
- phba->fc_edtov = FF_DEF_EDTOV;
- phba->fc_ratov = FF_DEF_RATOV;
- rc = memcmp(&phba->fc_portname, &sp->portName,
- sizeof(struct lpfc_name));
- if (rc >= 0) {
- /* This side will initiate the PLOGI */
- phba->fc_flag |= FC_PT2PT_PLOGI;
-
- /* N_Port ID cannot be 0, set our to
- * LocalID the other side will be
- * RemoteID.
- */
-
- /* not equal */
- if (rc)
- phba->fc_myDID = PT2PT_LocalID;
-
- if ((mbox =
- mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC))
- == 0) {
- goto flogifail;
- }
- lpfc_config_link(phba, mbox);
- if (lpfc_sli_issue_mbox
- (phba, mbox,
- (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free(mbox,
- phba->mbox_mem_pool);
- goto flogifail;
- }
- mempool_free( ndlp, phba->nlp_mem_pool);
-
- if ((ndlp =
- lpfc_findnode_did(phba,
- NLP_SEARCH_ALL,
- PT2PT_RemoteID))
- == 0) {
- /* Cannot find existing Fabric
- ndlp, so allocate a new
- one */
- if ((ndlp =
- mempool_alloc(
- phba->nlp_mem_pool,
- GFP_ATOMIC)) == 0) {
- goto flogifail;
- }
- lpfc_nlp_init(phba, ndlp,
- PT2PT_RemoteID);
- }
- memcpy(&ndlp->nlp_portname,
- &sp->portName,
- sizeof (struct lpfc_name));
- memcpy(&ndlp->nlp_nodename,
- &sp->nodeName,
- sizeof (struct lpfc_name));
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- ndlp->nlp_flag |= NLP_NPR_2B_DISC;
- }
- else {
- /* This side will wait for the PLOGI */
- mempool_free( ndlp, phba->nlp_mem_pool);
- }
-
- phba->fc_flag |= FC_PT2PT;
-
- /* Start discovery - this should just do
- CLEAR_LA */
- lpfc_disc_start(phba);
- }
- goto out;
- }
- }
-
-flogifail:
- lpfc_nlp_remove(phba, ndlp);
-
- if((irsp->ulpStatus != IOSTAT_LOCAL_REJECT) ||
- ((irsp->un.ulpWord[4] != IOERR_SLI_ABORTED) &&
- (irsp->un.ulpWord[4] != IOERR_SLI_DOWN))) {
-
- /* FLOGI failed, so just use loop map to make discovery list */
- lpfc_disc_list_loopmap(phba);
-
- /* Start discovery */
- lpfc_disc_start(phba);
- }
-
-out:
- lpfc_els_free_iocb(phba, cmdiocb);
- return;
-}
-
-static int
-lpfc_issue_els_flogi(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp,
- uint8_t retry)
-{
- struct serv_parm *sp;
- IOCB_t *icmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- uint8_t *pcmd;
- uint16_t cmdsize;
- uint32_t tmo;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING]; /* ELS ring */
-
- cmdsize = (sizeof (uint32_t) + sizeof (struct serv_parm));
- if ((elsiocb = lpfc_prep_els_iocb(phba, 1, cmdsize, retry,
- ndlp, ELS_CMD_FLOGI)) == 0) {
- return (1);
- }
-
- icmd = &elsiocb->iocb;
- pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
-
- /* For FLOGI request, remainder of payload is service parameters */
- *((uint32_t *) (pcmd)) = ELS_CMD_FLOGI;
- pcmd += sizeof (uint32_t);
- memcpy(pcmd, &phba->fc_sparam, sizeof (struct serv_parm));
- sp = (struct serv_parm *) pcmd;
-
- /* Setup CSPs accordingly for Fabric */
- sp->cmn.e_d_tov = 0;
- sp->cmn.w2.r_a_tov = 0;
- sp->cls1.classValid = 0;
- sp->cls2.seqDelivery = 1;
- sp->cls3.seqDelivery = 1;
- if (sp->cmn.fcphLow < FC_PH3)
- sp->cmn.fcphLow = FC_PH3;
- if (sp->cmn.fcphHigh < FC_PH3)
- sp->cmn.fcphHigh = FC_PH3;
-
- tmo = phba->fc_ratov;
- phba->fc_ratov = LPFC_DISC_FLOGI_TMO;
- lpfc_set_disctmo(phba);
- phba->fc_ratov = tmo;
-
- /* Flush the els buffer to main store for the HBA. This context always
- * comes from the driver's dma pool and is always LPFC_BPL_SIZE.
- */
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- phba->fc_stat.elsXmitFLOGI++;
- elsiocb->iocb_cmpl = lpfc_cmpl_els_flogi;
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- return (0);
-}
-
-int
-lpfc_els_abort_flogi(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- struct lpfc_iocbq *iocb, *next_iocb;
- struct lpfc_nodelist *ndlp;
- IOCB_t *icmd;
- struct list_head *curr, *next;
-
- /* Abort outstanding I/O on NPort <nlp_DID> */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0201 Abort outstanding I/O on NPort x%x\n",
- phba->brd_no, Fabric_DID);
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING];
-
- /* check the txcmplq */
- list_for_each_safe(curr, next, &pring->txcmplq) {
- next_iocb = list_entry(curr, struct lpfc_iocbq, list);
- iocb = next_iocb;
- /* Check to see if iocb matches the nport we are
- looking for */
- icmd = &iocb->iocb;
- if (icmd->ulpCommand == CMD_ELS_REQUEST64_CR) {
- ndlp = (struct lpfc_nodelist *)(iocb->context1);
- if(ndlp && (ndlp->nlp_DID == Fabric_DID)) {
- /* It matches, so deque and call compl
- with an error */
- list_del(&iocb->list);
- pring->txcmplq_cnt--;
-
- if ((icmd->un.elsreq64.bdl.ulpIoTag32)) {
- lpfc_sli_issue_abort_iotag32
- (phba, pring, iocb);
- }
- if (iocb->iocb_cmpl) {
- icmd->ulpStatus =
- IOSTAT_LOCAL_REJECT;
- icmd->un.ulpWord[4] =
- IOERR_SLI_ABORTED;
- (iocb->iocb_cmpl) (phba, iocb, iocb);
- } else {
- mempool_free(iocb, phba->iocb_mem_pool);
- }
- }
- }
- }
- return (0);
-}
-
-int
-lpfc_initial_flogi(struct lpfc_hba * phba)
-{
- struct lpfc_nodelist *ndlp;
-
- /* First look for Fabric ndlp on the unmapped list */
-
- if ((ndlp =
- lpfc_findnode_did(phba, NLP_SEARCH_UNMAPPED,
- Fabric_DID)) == 0) {
- /* Cannot find existing Fabric ndlp, so allocate a new one */
- if ((ndlp = mempool_alloc(phba->nlp_mem_pool, GFP_ATOMIC))
- == 0) {
- return (0);
- }
- lpfc_nlp_init(phba, ndlp, Fabric_DID);
- }
- else {
- phba->fc_unmap_cnt--;
- list_del(&ndlp->nlp_listp);
- ndlp->nlp_flag &= ~NLP_LIST_MASK;
- }
- if (lpfc_issue_els_flogi(phba, ndlp, 0)) {
- mempool_free( ndlp, phba->nlp_mem_pool);
- }
- return (1);
-}
-
-static void
-lpfc_more_plogi(struct lpfc_hba * phba)
-{
- int sentplogi;
-
- if (phba->num_disc_nodes)
- phba->num_disc_nodes--;
-
- /* Continue discovery with <num_disc_nodes> PLOGIs to go */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0232 Continue discovery with %d PLOGIs to go "
- "Data: x%x x%x x%x\n",
- phba->brd_no, phba->num_disc_nodes, phba->fc_plogi_cnt,
- phba->fc_flag, phba->hba_state);
-
- /* Check to see if there are more PLOGIs to be sent */
- if (phba->fc_flag & FC_NLP_MORE) {
- /* go thru NPR list and issue any remaining ELS PLOGIs */
- sentplogi = lpfc_els_disc_plogi(phba);
- }
- return;
-}
-
-static void
-lpfc_cmpl_els_plogi(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- IOCB_t *irsp;
- struct lpfc_sli *psli;
- struct lpfc_nodelist *ndlp;
- int disc, rc, did, type;
-
- psli = &phba->sli;
-
- /* we pass cmdiocb to state machine which needs rspiocb as well */
- cmdiocb->context_un.rsp_iocb = rspiocb;
-
- irsp = &rspiocb->iocb;
- ndlp = (struct lpfc_nodelist *) cmdiocb->context1;
- ndlp->nlp_flag &= ~NLP_PLOGI_SND;
-
- /* Since ndlp can be freed in the disc state machine, note if this node
- * is being used during discovery.
- */
- disc = (ndlp->nlp_flag & NLP_NPR_2B_DISC);
- rc = 0;
-
- /* PLOGI completes to NPort <nlp_DID> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0102 PLOGI completes to NPort x%x "
- "Data: x%x x%x x%x x%x\n",
- phba->brd_no, ndlp->nlp_DID, irsp->ulpStatus,
- irsp->un.ulpWord[4], disc, phba->num_disc_nodes);
-
- /* Check to see if link went down during discovery */
- if (lpfc_els_chk_latt(phba)) {
- ndlp->nlp_flag |= NLP_NPR_2B_DISC;
- goto out;
- }
-
- /* ndlp could be freed in DSM, save these values now */
- type = ndlp->nlp_type;
- did = ndlp->nlp_DID;
-
- if (irsp->ulpStatus) {
- /* Check for retry */
- if (lpfc_els_retry(phba, cmdiocb, rspiocb)) {
- /* ELS command is being retried */
- if (disc) {
- ndlp->nlp_flag |= NLP_NPR_2B_DISC;
- }
- goto out;
- }
-
- /* PLOGI failed */
- /* Do not call DSM for lpfc_els_abort'ed ELS cmds */
- if((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
- ((irsp->un.ulpWord[4] == IOERR_SLI_ABORTED) ||
- (irsp->un.ulpWord[4] == IOERR_SLI_DOWN))) {
- disc = (ndlp->nlp_flag & NLP_NPR_2B_DISC);
- }
- else {
- rc = lpfc_disc_state_machine(phba, ndlp, cmdiocb,
- NLP_EVT_CMPL_PLOGI);
- }
- } else {
- /* Good status, call state machine */
- rc = lpfc_disc_state_machine(phba, ndlp, cmdiocb,
- NLP_EVT_CMPL_PLOGI);
- }
-
- if(type & NLP_FABRIC) {
- /* If we cannot login to Nameserver, kick off discovery now */
- if ((did == NameServer_DID) && (rc == NLP_STE_FREED_NODE)) {
- lpfc_disc_start(phba);
- }
- goto out;
- }
-
- if (disc && phba->num_disc_nodes) {
- /* Check to see if there are more PLOGIs to be sent */
- lpfc_more_plogi(phba);
- }
-
- if (rc != NLP_STE_FREED_NODE)
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
-
- if (phba->num_disc_nodes == 0) {
- lpfc_can_disctmo(phba);
- if (phba->fc_flag & FC_RSCN_MODE) {
- /* Check to see if more RSCNs came in while we were
- * processing this one.
- */
- if ((phba->fc_rscn_id_cnt == 0) &&
- (!(phba->fc_flag & FC_RSCN_DISCOVERY))) {
- lpfc_els_flush_rscn(phba);
- } else {
- lpfc_els_handle_rscn(phba);
- }
- }
- }
-
-out:
- lpfc_els_free_iocb(phba, cmdiocb);
- return;
-}
-
-int
-lpfc_issue_els_plogi(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp,
- uint8_t retry)
-{
- struct serv_parm *sp;
- IOCB_t *icmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- uint8_t *pcmd;
- uint16_t cmdsize;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING]; /* ELS ring */
-
- cmdsize = (sizeof (uint32_t) + sizeof (struct serv_parm));
- if ((elsiocb = lpfc_prep_els_iocb(phba, 1, cmdsize, retry,
- ndlp, ELS_CMD_PLOGI)) == 0) {
- return (1);
- }
-
- icmd = &elsiocb->iocb;
- pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
-
- /* For PLOGI request, remainder of payload is service parameters */
- *((uint32_t *) (pcmd)) = ELS_CMD_PLOGI;
- pcmd += sizeof (uint32_t);
- memcpy(pcmd, &phba->fc_sparam, sizeof (struct serv_parm));
- sp = (struct serv_parm *) pcmd;
-
- if (sp->cmn.fcphLow < FC_PH_4_3)
- sp->cmn.fcphLow = FC_PH_4_3;
-
- if (sp->cmn.fcphHigh < FC_PH3)
- sp->cmn.fcphHigh = FC_PH3;
-
- /* The lpfc iocb is fully initialize. Flush it to main store for the
- * HBA. Note that all els iocb context buffer are from the driver's
- * dma pool and have length LPFC_BPL_SIZE.
- */
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- phba->fc_stat.elsXmitPLOGI++;
- elsiocb->iocb_cmpl = lpfc_cmpl_els_plogi;
- ndlp->nlp_flag |= NLP_PLOGI_SND;
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- ndlp->nlp_flag &= ~NLP_PLOGI_SND;
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- return (0);
-}
-
-static void
-lpfc_cmpl_els_prli(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- IOCB_t *irsp;
- struct lpfc_sli *psli;
- struct lpfc_nodelist *ndlp;
-
- psli = &phba->sli;
- /* we pass cmdiocb to state machine which needs rspiocb as well */
- cmdiocb->context_un.rsp_iocb = rspiocb;
-
- irsp = &(rspiocb->iocb);
- ndlp = (struct lpfc_nodelist *) cmdiocb->context1;
- ndlp->nlp_flag &= ~NLP_PRLI_SND;
-
- /* PRLI completes to NPort <nlp_DID> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0103 PRLI completes to NPort x%x "
- "Data: x%x x%x x%x\n",
- phba->brd_no, ndlp->nlp_DID, irsp->ulpStatus,
- irsp->un.ulpWord[4], phba->num_disc_nodes);
-
- phba->fc_prli_sent--;
- /* Check to see if link went down during discovery */
- if (lpfc_els_chk_latt(phba))
- goto out;
-
- if (irsp->ulpStatus) {
- /* Check for retry */
- if (lpfc_els_retry(phba, cmdiocb, rspiocb)) {
- /* ELS command is being retried */
- goto out;
- }
- /* PRLI failed */
- /* Do not call DSM for lpfc_els_abort'ed ELS cmds */
- if((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
- ((irsp->un.ulpWord[4] == IOERR_SLI_ABORTED) ||
- (irsp->un.ulpWord[4] == IOERR_SLI_DOWN))) {
- goto out;
- }
- else {
- lpfc_disc_state_machine(phba, ndlp, cmdiocb,
- NLP_EVT_CMPL_PRLI);
- }
- } else {
- /* Good status, call state machine */
- lpfc_disc_state_machine(phba, ndlp, cmdiocb, NLP_EVT_CMPL_PRLI);
- }
-
-out:
- lpfc_els_free_iocb(phba, cmdiocb);
- return;
-}
-
-int
-lpfc_issue_els_prli(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp,
- uint8_t retry)
-{
- PRLI *npr;
- IOCB_t *icmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- uint8_t *pcmd;
- uint16_t cmdsize;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING]; /* ELS ring */
-
- cmdsize = (sizeof (uint32_t) + sizeof (PRLI));
- if ((elsiocb = lpfc_prep_els_iocb(phba, 1, cmdsize, retry,
- ndlp, ELS_CMD_PRLI)) == 0) {
- return (1);
- }
-
- icmd = &elsiocb->iocb;
- pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
-
- /* For PRLI request, remainder of payload is service parameters */
- memset(pcmd, 0, (sizeof (PRLI) + sizeof (uint32_t)));
- *((uint32_t *) (pcmd)) = ELS_CMD_PRLI;
- pcmd += sizeof (uint32_t);
-
- /* For PRLI, remainder of payload is PRLI parameter page */
- npr = (PRLI *) pcmd;
- /*
- * If our firmware version is 3.20 or later,
- * set the following bits for FC-TAPE support.
- */
- if (phba->vpd.rev.feaLevelHigh >= 0x02) {
- npr->ConfmComplAllowed = 1;
- npr->Retry = 1;
- npr->TaskRetryIdReq = 1;
- }
- npr->estabImagePair = 1;
- npr->readXferRdyDis = 1;
-
- /* For FCP support */
- npr->prliType = PRLI_FCP_TYPE;
- npr->initiatorFunc = 1;
-
- /* The lpfc iocb is fully initialize. Flush it to main store for the
- * HBA. Note that all els iocb context buffer are from the driver's
- * dma pool and have length LPFC_BPL_SIZE.
- */
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- phba->fc_stat.elsXmitPRLI++;
- elsiocb->iocb_cmpl = lpfc_cmpl_els_prli;
- ndlp->nlp_flag |= NLP_PRLI_SND;
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- ndlp->nlp_flag &= ~NLP_PRLI_SND;
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- phba->fc_prli_sent++;
- return (0);
-}
-
-static void
-lpfc_more_adisc(struct lpfc_hba * phba)
-{
- int sentadisc;
-
- if (phba->num_disc_nodes)
- phba->num_disc_nodes--;
-
- /* Continue discovery with <num_disc_nodes> ADISCs to go */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0210 Continue discovery with %d ADISCs to go "
- "Data: x%x x%x x%x\n",
- phba->brd_no, phba->num_disc_nodes, phba->fc_adisc_cnt,
- phba->fc_flag, phba->hba_state);
-
- /* Check to see if there are more ADISCs to be sent */
- if (phba->fc_flag & FC_NLP_MORE) {
- lpfc_set_disctmo(phba);
-
- /* go thru NPR list and issue any remaining ELS ADISCs */
- sentadisc = lpfc_els_disc_adisc(phba);
- }
- return;
-}
-
-static void
-lpfc_rscn_disc(struct lpfc_hba * phba)
-{
- /* RSCN discovery */
- /* go thru NPR list and issue ELS PLOGIs */
- if (phba->fc_npr_cnt) {
- lpfc_els_disc_plogi(phba);
- return;
- }
- if (phba->fc_flag & FC_RSCN_MODE) {
- /* Check to see if more RSCNs came in while we were
- * processing this one.
- */
- if ((phba->fc_rscn_id_cnt == 0) &&
- (!(phba->fc_flag & FC_RSCN_DISCOVERY))) {
- lpfc_els_flush_rscn(phba);
- } else {
- lpfc_els_handle_rscn(phba);
- }
- }
-}
-
-static void
-lpfc_cmpl_els_adisc(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- IOCB_t *irsp;
- struct lpfc_sli *psli;
- struct lpfc_nodelist *ndlp;
- LPFC_MBOXQ_t *mbox;
- int disc;
-
- psli = &phba->sli;
-
- /* we pass cmdiocb to state machine which needs rspiocb as well */
- cmdiocb->context_un.rsp_iocb = rspiocb;
-
- irsp = &(rspiocb->iocb);
- ndlp = (struct lpfc_nodelist *) cmdiocb->context1;
- ndlp->nlp_flag &= ~NLP_ADISC_SND;
-
- /* Since ndlp can be freed in the disc state machine, note if this node
- * is being used during discovery.
- */
- disc = (ndlp->nlp_flag & NLP_NPR_2B_DISC);
-
- /* ADISC completes to NPort <nlp_DID> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0104 ADISC completes to NPort x%x "
- "Data: x%x x%x x%x x%x\n",
- phba->brd_no, ndlp->nlp_DID, irsp->ulpStatus,
- irsp->un.ulpWord[4], disc, phba->num_disc_nodes);
-
- /* Check to see if link went down during discovery */
- if (lpfc_els_chk_latt(phba)) {
- ndlp->nlp_flag |= NLP_NPR_2B_DISC;
- goto out;
- }
-
- if (irsp->ulpStatus) {
- /* Check for retry */
- if (lpfc_els_retry(phba, cmdiocb, rspiocb)) {
- /* ELS command is being retried */
- if (disc) {
- ndlp->nlp_flag |= NLP_NPR_2B_DISC;
- lpfc_set_disctmo(phba);
- }
- goto out;
- }
- /* ADISC failed */
- /* Do not call DSM for lpfc_els_abort'ed ELS cmds */
- if((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
- ((irsp->un.ulpWord[4] == IOERR_SLI_ABORTED) ||
- (irsp->un.ulpWord[4] == IOERR_SLI_DOWN))) {
- disc = (ndlp->nlp_flag & NLP_NPR_2B_DISC);
- }
- else {
- lpfc_disc_state_machine(phba, ndlp, cmdiocb,
- NLP_EVT_CMPL_ADISC);
- }
- } else {
- /* Good status, call state machine */
- lpfc_disc_state_machine(phba, ndlp, cmdiocb,
- NLP_EVT_CMPL_ADISC);
- }
-
- if (disc && phba->num_disc_nodes) {
- /* Check to see if there are more ADISCs to be sent */
- lpfc_more_adisc(phba);
-
- /* Check to see if we are done with ADISC authentication */
- if (phba->num_disc_nodes == 0) {
- /* If we get here, there is nothing left to wait for */
- if ((phba->hba_state < LPFC_HBA_READY) &&
- (phba->hba_state != LPFC_CLEAR_LA)) {
- /* Link up discovery */
- if ((mbox = mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC))) {
- phba->hba_state = LPFC_CLEAR_LA;
- lpfc_clear_la(phba, mbox);
- mbox->mbox_cmpl =
- lpfc_mbx_cmpl_clear_la;
- if (lpfc_sli_issue_mbox
- (phba, mbox,
- (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free(mbox,
- phba->mbox_mem_pool);
- lpfc_disc_flush_list(phba);
- psli->ring[(psli->ip_ring)].
- flag &=
- ~LPFC_STOP_IOCB_EVENT;
- psli->ring[(psli->fcp_ring)].
- flag &=
- ~LPFC_STOP_IOCB_EVENT;
- psli->ring[(psli->next_ring)].
- flag &=
- ~LPFC_STOP_IOCB_EVENT;
- phba->hba_state =
- LPFC_HBA_READY;
- }
- }
- } else {
- lpfc_rscn_disc(phba);
- }
- }
- }
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
-out:
- lpfc_els_free_iocb(phba, cmdiocb);
- return;
-}
-
-int
-lpfc_issue_els_adisc(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp,
- uint8_t retry)
-{
- ADISC *ap;
- IOCB_t *icmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- uint8_t *pcmd;
- uint16_t cmdsize;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING]; /* ELS ring */
-
- cmdsize = (sizeof (uint32_t) + sizeof (ADISC));
- if ((elsiocb = lpfc_prep_els_iocb(phba, 1, cmdsize, retry,
- ndlp, ELS_CMD_ADISC)) == 0) {
- return (1);
- }
-
- icmd = &elsiocb->iocb;
- pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
-
- /* For ADISC request, remainder of payload is service parameters */
- *((uint32_t *) (pcmd)) = ELS_CMD_ADISC;
- pcmd += sizeof (uint32_t);
-
- /* Fill in ADISC payload */
- ap = (ADISC *) pcmd;
- ap->hardAL_PA = phba->fc_pref_ALPA;
- memcpy(&ap->portName, &phba->fc_portname, sizeof (struct lpfc_name));
- memcpy(&ap->nodeName, &phba->fc_nodename, sizeof (struct lpfc_name));
- ap->DID = be32_to_cpu(phba->fc_myDID);
-
- /* The lpfc iocb is fully initialize. Flush it to main store for the
- * HBA. Note that all els iocb context buffer are from the driver's
- * dma pool and have length LPFC_BPL_SIZE. Get a short-hand pointer to
- * the physical address.
- */
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- phba->fc_stat.elsXmitADISC++;
- elsiocb->iocb_cmpl = lpfc_cmpl_els_adisc;
- ndlp->nlp_flag |= NLP_ADISC_SND;
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- ndlp->nlp_flag &= ~NLP_ADISC_SND;
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- return (0);
-}
-
-static void
-lpfc_cmpl_els_logo(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- IOCB_t *irsp;
- struct lpfc_sli *psli;
- struct lpfc_nodelist *ndlp;
-
- psli = &phba->sli;
- /* we pass cmdiocb to state machine which needs rspiocb as well */
- cmdiocb->context_un.rsp_iocb = rspiocb;
-
- irsp = &(rspiocb->iocb);
- ndlp = (struct lpfc_nodelist *) cmdiocb->context1;
- ndlp->nlp_flag &= ~NLP_LOGO_SND;
-
- /* LOGO completes to NPort <nlp_DID> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0105 LOGO completes to NPort x%x "
- "Data: x%x x%x x%x\n",
- phba->brd_no, ndlp->nlp_DID, irsp->ulpStatus,
- irsp->un.ulpWord[4], phba->num_disc_nodes);
-
- /* Check to see if link went down during discovery */
- if (lpfc_els_chk_latt(phba))
- goto out;
-
- if (irsp->ulpStatus) {
- /* Check for retry */
- if (lpfc_els_retry(phba, cmdiocb, rspiocb)) {
- /* ELS command is being retried */
- goto out;
- }
- /* LOGO failed */
- /* Do not call DSM for lpfc_els_abort'ed ELS cmds */
- if((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
- ((irsp->un.ulpWord[4] == IOERR_SLI_ABORTED) ||
- (irsp->un.ulpWord[4] == IOERR_SLI_DOWN))) {
- goto out;
- }
- else {
- lpfc_disc_state_machine(phba, ndlp, cmdiocb,
- NLP_EVT_CMPL_LOGO);
- }
- } else {
- /* Good status, call state machine */
- lpfc_disc_state_machine(phba, ndlp, cmdiocb, NLP_EVT_CMPL_LOGO);
-
- if(ndlp->nlp_flag & NLP_DELAY_TMO) {
- lpfc_unreg_rpi(phba, ndlp);
- }
- }
-
-out:
- lpfc_els_free_iocb(phba, cmdiocb);
- return;
-}
-
-int
-lpfc_issue_els_logo(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp,
- uint8_t retry)
-{
- IOCB_t *icmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- uint8_t *pcmd;
- uint16_t cmdsize;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING];
-
- cmdsize = 2 * (sizeof (uint32_t) + sizeof (struct lpfc_name));
- if ((elsiocb = lpfc_prep_els_iocb(phba, 1, cmdsize, retry,
- ndlp, ELS_CMD_LOGO)) == 0) {
- return (1);
- }
-
- icmd = &elsiocb->iocb;
- pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
- *((uint32_t *) (pcmd)) = ELS_CMD_LOGO;
- pcmd += sizeof (uint32_t);
-
- /* Fill in LOGO payload */
- *((uint32_t *) (pcmd)) = be32_to_cpu(phba->fc_myDID);
- pcmd += sizeof (uint32_t);
- memcpy(pcmd, &phba->fc_portname, sizeof (struct lpfc_name));
-
- /* The els iocb is fully initialize. Flush it to main store for the
- * HBA. Note that all els iocb context buffer are from the driver's
- * dma pool and have length LPFC_BPL_SIZE. Get a short-hand pointer to
- * the physical address.
- */
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- phba->fc_stat.elsXmitLOGO++;
- elsiocb->iocb_cmpl = lpfc_cmpl_els_logo;
- ndlp->nlp_flag |= NLP_LOGO_SND;
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- ndlp->nlp_flag &= ~NLP_LOGO_SND;
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- return (0);
-}
-
-static void
-lpfc_cmpl_els_cmd(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- IOCB_t *irsp;
-
- irsp = &rspiocb->iocb;
-
- /* ELS cmd tag <ulpIoTag> completes */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_ELS,
- "%d:0106 ELS cmd tag x%x completes Data: x%x x%x\n",
- phba->brd_no,
- irsp->ulpIoTag, irsp->ulpStatus, irsp->un.ulpWord[4]);
-
- /* Check to see if link went down during discovery */
- lpfc_els_chk_latt(phba);
- lpfc_els_free_iocb(phba, cmdiocb);
- return;
-}
-
-int
-lpfc_issue_els_scr(struct lpfc_hba * phba, uint32_t nportid, uint8_t retry)
-{
- IOCB_t *icmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- uint8_t *pcmd;
- uint16_t cmdsize;
- struct lpfc_nodelist *ndlp;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING]; /* ELS ring */
- cmdsize = (sizeof (uint32_t) + sizeof (SCR));
- if ((ndlp = mempool_alloc(phba->nlp_mem_pool, GFP_ATOMIC)) == 0) {
- return (1);
- }
-
- lpfc_nlp_init(phba, ndlp, nportid);
-
- if ((elsiocb = lpfc_prep_els_iocb(phba, 1, cmdsize, retry,
- ndlp, ELS_CMD_SCR)) == 0) {
- mempool_free( ndlp, phba->nlp_mem_pool);
- return (1);
- }
-
- icmd = &elsiocb->iocb;
- pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
-
- *((uint32_t *) (pcmd)) = ELS_CMD_SCR;
- pcmd += sizeof (uint32_t);
-
- /* For SCR, remainder of payload is SCR parameter page */
- memset(pcmd, 0, sizeof (SCR));
- ((SCR *) pcmd)->Function = SCR_FUNC_FULL;
-
- /* The els iocb is fully initialize. Flush it to main store for the
- * HBA. Note that all els iocb context buffer are from the driver's
- * dma pool and have length LPFC_BPL_SIZE. Get a short-hand pointer to
- * the physical address.
- */
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- phba->fc_stat.elsXmitSCR++;
- elsiocb->iocb_cmpl = lpfc_cmpl_els_cmd;
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- mempool_free( ndlp, phba->nlp_mem_pool);
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- mempool_free( ndlp, phba->nlp_mem_pool);
- return (0);
-}
-
-static int
-lpfc_issue_els_farpr(struct lpfc_hba * phba, uint32_t nportid, uint8_t retry)
-{
- IOCB_t *icmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- FARP *fp;
- uint8_t *pcmd;
- uint32_t *lp;
- uint16_t cmdsize;
- struct lpfc_nodelist *ondlp;
- struct lpfc_nodelist *ndlp;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING]; /* ELS ring */
- cmdsize = (sizeof (uint32_t) + sizeof (FARP));
- if ((ndlp = mempool_alloc(phba->nlp_mem_pool, GFP_ATOMIC)) == 0) {
- return (1);
- }
- lpfc_nlp_init(phba, ndlp, nportid);
-
- if ((elsiocb = lpfc_prep_els_iocb(phba, 1, cmdsize, retry,
- ndlp, ELS_CMD_RNID)) == 0) {
- mempool_free( ndlp, phba->nlp_mem_pool);
- return (1);
- }
-
- icmd = &elsiocb->iocb;
- pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
-
- *((uint32_t *) (pcmd)) = ELS_CMD_FARPR;
- pcmd += sizeof (uint32_t);
-
- /* Fill in FARPR payload */
- fp = (FARP *) (pcmd);
- memset(fp, 0, sizeof (FARP));
- lp = (uint32_t *) pcmd;
- *lp++ = be32_to_cpu(nportid);
- *lp++ = be32_to_cpu(phba->fc_myDID);
- fp->Rflags = 0;
- fp->Mflags = (FARP_MATCH_PORT | FARP_MATCH_NODE);
-
- memcpy(&fp->RportName, &phba->fc_portname, sizeof (struct lpfc_name));
- memcpy(&fp->RnodeName, &phba->fc_nodename, sizeof (struct lpfc_name));
- if ((ondlp = lpfc_findnode_did(phba, NLP_SEARCH_ALL, nportid))) {
- memcpy(&fp->OportName, &ondlp->nlp_portname,
- sizeof (struct lpfc_name));
- memcpy(&fp->OnodeName, &ondlp->nlp_nodename,
- sizeof (struct lpfc_name));
- }
-
- /* The els iocb is fully initialize. Flush it to main store for the
- * HBA. Note that all els iocb context buffer are from the driver's
- * dma pool and have length LPFC_BPL_SIZE. Get a short-hand pointer to
- * the physical address.
- */
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- phba->fc_stat.elsXmitFARPR++;
- elsiocb->iocb_cmpl = lpfc_cmpl_els_cmd;
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- mempool_free( ndlp, phba->nlp_mem_pool);
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- mempool_free( ndlp, phba->nlp_mem_pool);
- return (0);
-}
-
-void
-lpfc_els_retry_delay(unsigned long ptr)
-{
- struct lpfc_hba *phba;
- struct lpfc_nodelist *ndlp;
- uint32_t cmd;
- uint32_t did;
- uint8_t retry;
- unsigned long iflag;
-
- ndlp = (struct lpfc_nodelist *)ptr;
- phba = ndlp->nlp_phba;
- spin_lock_irqsave(phba->host->host_lock, iflag);
- did = (uint32_t) (ndlp->nlp_DID);
- cmd = (uint32_t) (ndlp->nlp_last_elscmd);
-
- ndlp->nlp_flag &= ~NLP_DELAY_TMO;
- retry = ndlp->nlp_retry;
-
- switch (cmd) {
- case ELS_CMD_FLOGI:
- lpfc_issue_els_flogi(phba, ndlp, retry);
- break;
- case ELS_CMD_PLOGI:
- ndlp->nlp_state = NLP_STE_PLOGI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PLOGI_LIST);
- lpfc_issue_els_plogi(phba, ndlp, retry);
- break;
- case ELS_CMD_ADISC:
- ndlp->nlp_state = NLP_STE_ADISC_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_ADISC_LIST);
- lpfc_issue_els_adisc(phba, ndlp, retry);
- break;
- case ELS_CMD_PRLI:
- ndlp->nlp_state = NLP_STE_PRLI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PRLI_LIST);
- lpfc_issue_els_prli(phba, ndlp, retry);
- break;
- case ELS_CMD_LOGO:
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- lpfc_issue_els_logo(phba, ndlp, retry);
- break;
- }
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- return;
-}
-
-static int
-lpfc_els_retry(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- IOCB_t *irsp;
- struct lpfc_dmabuf *pcmd;
- struct lpfc_nodelist *ndlp;
- uint32_t *elscmd;
- struct ls_rjt stat;
- int retry, maxretry;
- int delay;
- uint32_t cmd;
-
- retry = 0;
- delay = 0;
- maxretry = lpfc_max_els_tries;
- irsp = &rspiocb->iocb;
- ndlp = (struct lpfc_nodelist *) cmdiocb->context1;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
- cmd = 0;
- /* Note: context2 may be 0 for internal driver abort
- * of delays ELS command.
- */
-
- if (pcmd && pcmd->virt) {
- elscmd = (uint32_t *) (pcmd->virt);
- cmd = *elscmd++;
- }
-
- switch (irsp->ulpStatus) {
- case IOSTAT_FCP_RSP_ERROR:
- case IOSTAT_REMOTE_STOP:
- break;
-
- case IOSTAT_LOCAL_REJECT:
- switch ((irsp->un.ulpWord[4] & 0xff)) {
- case IOERR_LOOP_OPEN_FAILURE:
- if (cmd == ELS_CMD_PLOGI) {
- if (cmdiocb->retry == 0) {
- delay = 1;
- }
- }
- retry = 1;
- break;
-
- case IOERR_SEQUENCE_TIMEOUT:
- retry = 1;
- if ((cmd == ELS_CMD_FLOGI)
- && (phba->fc_topology != TOPOLOGY_LOOP)) {
- delay = 1;
- maxretry = 48;
- }
- break;
-
- case IOERR_NO_RESOURCES:
- if (cmd == ELS_CMD_PLOGI) {
- delay = 1;
- }
- retry = 1;
- break;
-
- case IOERR_INVALID_RPI:
- retry = 1;
- break;
- }
- break;
-
- case IOSTAT_NPORT_RJT:
- case IOSTAT_FABRIC_RJT:
- if (irsp->un.ulpWord[4] & RJT_UNAVAIL_TEMP) {
- retry = 1;
- break;
- }
- break;
-
- case IOSTAT_NPORT_BSY:
- case IOSTAT_FABRIC_BSY:
- retry = 1;
- break;
-
- case IOSTAT_LS_RJT:
- stat.un.lsRjtError = be32_to_cpu(irsp->un.ulpWord[4]);
- /* Added for Vendor specifc support
- * Just keep retrying for these Rsn / Exp codes
- */
- switch (stat.un.b.lsRjtRsnCode) {
- case LSRJT_UNABLE_TPC:
- if (stat.un.b.lsRjtRsnCodeExp ==
- LSEXP_CMD_IN_PROGRESS) {
- if (cmd == ELS_CMD_PLOGI) {
- delay = 1;
- maxretry = 48;
- }
- retry = 1;
- break;
- }
- if (cmd == ELS_CMD_PLOGI) {
- delay = 1;
- maxretry = lpfc_max_els_tries + 1;
- retry = 1;
- break;
- }
- break;
-
- case LSRJT_LOGICAL_BSY:
- if (cmd == ELS_CMD_PLOGI) {
- delay = 1;
- maxretry = 48;
- }
- retry = 1;
- break;
- }
- break;
-
- case IOSTAT_INTERMED_RSP:
- case IOSTAT_BA_RJT:
- break;
-
- default:
- break;
- }
-
- if (ndlp->nlp_DID == FDMI_DID) {
- retry = 1;
- }
-
- if ((++cmdiocb->retry) >= maxretry) {
- phba->fc_stat.elsRetryExceeded++;
- retry = 0;
- }
-
- if (retry) {
-
- /* Retry ELS command <elsCmd> to remote NPORT <did> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0107 Retry ELS command x%x to remote "
- "NPORT x%x Data: x%x x%x\n",
- phba->brd_no,
- cmd, ndlp->nlp_DID, cmdiocb->retry, delay);
-
- if ((cmd == ELS_CMD_PLOGI) || (cmd == ELS_CMD_ADISC)) {
- /* If discovery / RSCN timer is running, reset it */
- if (timer_pending(&phba->fc_disctmo) ||
- (phba->fc_flag & FC_RSCN_MODE)) {
- lpfc_set_disctmo(phba);
- }
- }
-
- phba->fc_stat.elsXmitRetry++;
- if (delay) {
- phba->fc_stat.elsDelayRetry++;
- ndlp->nlp_retry = cmdiocb->retry;
-
- mod_timer(&ndlp->nlp_delayfunc, jiffies + HZ);
- ndlp->nlp_flag |= NLP_DELAY_TMO;
-
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- ndlp->nlp_last_elscmd = cmd;
-
- return (1);
- }
- switch (cmd) {
- case ELS_CMD_FLOGI:
- lpfc_issue_els_flogi(phba, ndlp, cmdiocb->retry);
- return (1);
- case ELS_CMD_PLOGI:
- ndlp->nlp_state = NLP_STE_PLOGI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PLOGI_LIST);
- lpfc_issue_els_plogi(phba, ndlp, cmdiocb->retry);
- return (1);
- case ELS_CMD_ADISC:
- ndlp->nlp_state = NLP_STE_ADISC_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_ADISC_LIST);
- lpfc_issue_els_adisc(phba, ndlp, cmdiocb->retry);
- return (1);
- case ELS_CMD_PRLI:
- ndlp->nlp_state = NLP_STE_PRLI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PRLI_LIST);
- lpfc_issue_els_prli(phba, ndlp, cmdiocb->retry);
- return (1);
- case ELS_CMD_LOGO:
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- lpfc_issue_els_logo(phba, ndlp, cmdiocb->retry);
- return (1);
- }
- }
-
- /* No retry ELS command <elsCmd> to remote NPORT <did> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0108 No retry ELS command x%x to remote NPORT x%x "
- "Data: x%x x%x\n",
- phba->brd_no,
- cmd, ndlp->nlp_DID, cmdiocb->retry, ndlp->nlp_flag);
-
- return (0);
-}
-
-int
-lpfc_els_free_iocb(struct lpfc_hba * phba, struct lpfc_iocbq * elsiocb)
-{
- struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
-
- /* context2 = cmd, context2->next = rsp, context3 = bpl */
- if (elsiocb->context2) {
- buf_ptr1 = (struct lpfc_dmabuf *) elsiocb->context2;
- /* Free the response before processing the command. */
- if (!list_empty(&buf_ptr1->list)) {
- buf_ptr = list_entry(buf_ptr1->list.next,
- struct lpfc_dmabuf, list);
- lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
- kfree(buf_ptr);
- }
- lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
- kfree(buf_ptr1);
- }
-
- if (elsiocb->context3) {
- buf_ptr = (struct lpfc_dmabuf *) elsiocb->context3;
- lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
- kfree(buf_ptr);
- }
-
- mempool_free( elsiocb, phba->iocb_mem_pool);
- return 0;
-}
-
-static void
-lpfc_cmpl_els_logo_acc(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- struct lpfc_nodelist *ndlp;
-
- ndlp = (struct lpfc_nodelist *) cmdiocb->context1;
-
- /* ACC to LOGO completes to NPort <nlp_DID> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0109 ACC to LOGO completes to NPort x%x "
- "Data: x%x x%x x%x\n",
- phba->brd_no, ndlp->nlp_DID, ndlp->nlp_flag,
- ndlp->nlp_state, ndlp->nlp_rpi);
-
- ndlp->nlp_flag &= ~NLP_LOGO_ACC;
-
- switch (ndlp->nlp_state) {
- case NLP_STE_UNUSED_NODE: /* node is just allocated */
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- break;
- case NLP_STE_NPR_NODE: /* NPort Recovery mode */
- lpfc_unreg_rpi(phba, ndlp);
- break;
- default:
- break;
- }
- lpfc_els_free_iocb(phba, cmdiocb);
- return;
-}
-
-static void
-lpfc_cmpl_els_acc(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- struct lpfc_nodelist *ndlp;
- LPFC_MBOXQ_t *mbox = NULL;
-
- ndlp = (struct lpfc_nodelist *) cmdiocb->context1;
- if (cmdiocb->context_un.mbox)
- mbox = cmdiocb->context_un.mbox;
-
-
- /* Check to see if link went down during discovery */
- if ((lpfc_els_chk_latt(phba)) || !ndlp) {
- if (mbox) {
- mempool_free( mbox, phba->mbox_mem_pool);
- }
- goto out;
- }
-
- /* ELS response tag <ulpIoTag> completes */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0110 ELS response tag x%x completes "
- "Data: x%x x%x x%x x%x x%x x%x\n",
- phba->brd_no,
- cmdiocb->iocb.ulpIoTag, rspiocb->iocb.ulpStatus,
- rspiocb->iocb.un.ulpWord[4], ndlp->nlp_DID,
- ndlp->nlp_flag, ndlp->nlp_state, ndlp->nlp_rpi);
-
- if (mbox) {
- if ((rspiocb->iocb.ulpStatus == 0)
- && (ndlp->nlp_flag & NLP_ACC_REGLOGIN)) {
- /* set_slim mailbox command needs to execute first,
- * queue this command to be processed later.
- */
- lpfc_unreg_rpi(phba, ndlp);
- mbox->mbox_cmpl = lpfc_mbx_cmpl_reg_login;
- mbox->context2 = ndlp;
- ndlp->nlp_state = NLP_STE_REG_LOGIN_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_REGLOGIN_LIST);
- if (lpfc_sli_issue_mbox(phba, mbox,
- (MBX_NOWAIT | MBX_STOP_IOCB))
- != MBX_NOT_FINISHED) {
- goto out;
- }
- /* NOTE: we should have messages for unsuccessful
- reglogin */
- mempool_free( mbox, phba->mbox_mem_pool);
- } else {
- mempool_free( mbox, phba->mbox_mem_pool);
- if (ndlp->nlp_flag & NLP_ACC_REGLOGIN) {
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- }
- }
- }
-out:
- if(ndlp)
- ndlp->nlp_flag &= ~NLP_ACC_REGLOGIN;
- lpfc_els_free_iocb(phba, cmdiocb);
- return;
-}
-
-int
-lpfc_els_rsp_acc(struct lpfc_hba * phba, uint32_t flag,
- struct lpfc_iocbq * oldiocb, struct lpfc_nodelist * ndlp,
- LPFC_MBOXQ_t * mbox, uint8_t newnode)
-{
- IOCB_t *icmd;
- IOCB_t *oldcmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- uint8_t *pcmd;
- uint16_t cmdsize;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING]; /* ELS ring */
- oldcmd = &oldiocb->iocb;
-
- switch (flag) {
- case ELS_CMD_ACC:
- cmdsize = sizeof (uint32_t);
- if ((elsiocb =
- lpfc_prep_els_iocb(phba, 0, cmdsize, oldiocb->retry,
- ndlp, ELS_CMD_ACC)) == 0) {
- return (1);
- }
- icmd = &elsiocb->iocb;
- icmd->ulpContext = oldcmd->ulpContext; /* Xri */
- pcmd = (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
- *((uint32_t *) (pcmd)) = ELS_CMD_ACC;
- pcmd += sizeof (uint32_t);
- break;
- case ELS_CMD_PLOGI:
- cmdsize = (sizeof (struct serv_parm) + sizeof (uint32_t));
- if ((elsiocb =
- lpfc_prep_els_iocb(phba, 0, cmdsize, oldiocb->retry,
- ndlp, ELS_CMD_ACC)) == 0) {
- return (1);
- }
- icmd = &elsiocb->iocb;
- icmd->ulpContext = oldcmd->ulpContext; /* Xri */
- pcmd = (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
-
- if (mbox)
- elsiocb->context_un.mbox = mbox;
-
- *((uint32_t *) (pcmd)) = ELS_CMD_ACC;
- pcmd += sizeof (uint32_t);
- memcpy(pcmd, &phba->fc_sparam, sizeof (struct serv_parm));
- break;
- default:
- return (1);
- }
-
- if (newnode)
- elsiocb->context1 = NULL;
-
- /* Xmit ELS ACC response tag <ulpIoTag> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0128 Xmit ELS ACC response tag x%x "
- "Data: x%x x%x x%x x%x x%x\n",
- phba->brd_no,
- elsiocb->iocb.ulpIoTag,
- elsiocb->iocb.ulpContext, ndlp->nlp_DID,
- ndlp->nlp_flag, ndlp->nlp_state, ndlp->nlp_rpi);
-
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- if (ndlp->nlp_flag & NLP_LOGO_ACC) {
- elsiocb->iocb_cmpl = lpfc_cmpl_els_logo_acc;
- } else {
- elsiocb->iocb_cmpl = lpfc_cmpl_els_acc;
- }
-
- phba->fc_stat.elsXmitACC++;
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- return (0);
-}
-
-int
-lpfc_els_rsp_reject(struct lpfc_hba * phba, uint32_t rejectError,
- struct lpfc_iocbq * oldiocb, struct lpfc_nodelist * ndlp)
-{
- IOCB_t *icmd;
- IOCB_t *oldcmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- uint8_t *pcmd;
- uint16_t cmdsize;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING]; /* ELS ring */
-
- cmdsize = 2 * sizeof (uint32_t);
- if ((elsiocb = lpfc_prep_els_iocb(phba, 0, cmdsize, oldiocb->retry,
- ndlp, ELS_CMD_LS_RJT)) == 0) {
- return (1);
- }
-
- icmd = &elsiocb->iocb;
- oldcmd = &oldiocb->iocb;
- icmd->ulpContext = oldcmd->ulpContext; /* Xri */
- pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
-
- *((uint32_t *) (pcmd)) = ELS_CMD_LS_RJT;
- pcmd += sizeof (uint32_t);
- *((uint32_t *) (pcmd)) = rejectError;
-
- /* The els iocb is fully initialize. Flush it to main store for the
- * HBA. Note that all els iocb context buffer are from the driver's
- * dma pool and have length LPFC_BPL_SIZE. Get a short-hand pointer to
- * the physical address.
- */
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- /* Xmit ELS RJT <err> response tag <ulpIoTag> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0129 Xmit ELS RJT x%x response tag x%x "
- "Data: x%x x%x x%x x%x x%x\n",
- phba->brd_no,
- rejectError, elsiocb->iocb.ulpIoTag,
- elsiocb->iocb.ulpContext, ndlp->nlp_DID,
- ndlp->nlp_flag, ndlp->nlp_state, ndlp->nlp_rpi);
-
- phba->fc_stat.elsXmitLSRJT++;
- elsiocb->iocb_cmpl = lpfc_cmpl_els_acc;
-
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- return (0);
-}
-
-int
-lpfc_els_rsp_adisc_acc(struct lpfc_hba * phba,
- struct lpfc_iocbq * oldiocb, struct lpfc_nodelist * ndlp)
-{
- ADISC *ap;
- IOCB_t *icmd;
- IOCB_t *oldcmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- uint8_t *pcmd;
- uint16_t cmdsize;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING]; /* ELS ring */
-
- cmdsize = sizeof (uint32_t) + sizeof (ADISC);
- if ((elsiocb = lpfc_prep_els_iocb(phba, 0, cmdsize, oldiocb->retry,
- ndlp, ELS_CMD_ACC)) == 0) {
- return (1);
- }
-
- /* Xmit ADISC ACC response tag <ulpIoTag> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0130 Xmit ADISC ACC response tag x%x "
- "Data: x%x x%x x%x x%x x%x\n",
- phba->brd_no,
- elsiocb->iocb.ulpIoTag,
- elsiocb->iocb.ulpContext, ndlp->nlp_DID,
- ndlp->nlp_flag, ndlp->nlp_state, ndlp->nlp_rpi);
-
- icmd = &elsiocb->iocb;
- oldcmd = &oldiocb->iocb;
- icmd->ulpContext = oldcmd->ulpContext; /* Xri */
- pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
-
- *((uint32_t *) (pcmd)) = ELS_CMD_ACC;
- pcmd += sizeof (uint32_t);
-
- ap = (ADISC *) (pcmd);
- ap->hardAL_PA = phba->fc_pref_ALPA;
- memcpy(&ap->portName, &phba->fc_portname, sizeof (struct lpfc_name));
- memcpy(&ap->nodeName, &phba->fc_nodename, sizeof (struct lpfc_name));
- ap->DID = be32_to_cpu(phba->fc_myDID);
-
- /* The els iocb is fully initialize. Flush it to main store for the
- * HBA. Note that all els iocb context buffer are from the driver's
- * dma pool and have length LPFC_BPL_SIZE. Get a short-hand pointer to
- * the physical address.
- */
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- phba->fc_stat.elsXmitACC++;
- elsiocb->iocb_cmpl = lpfc_cmpl_els_acc;
-
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- return (0);
-}
-
-int
-lpfc_els_rsp_prli_acc(struct lpfc_hba * phba,
- struct lpfc_iocbq * oldiocb, struct lpfc_nodelist * ndlp)
-{
- PRLI *npr;
- lpfc_vpd_t *vpd;
- IOCB_t *icmd;
- IOCB_t *oldcmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- uint8_t *pcmd;
- uint16_t cmdsize;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING]; /* ELS ring */
-
- cmdsize = sizeof (uint32_t) + sizeof (PRLI);
- if ((elsiocb = lpfc_prep_els_iocb(phba, 0, cmdsize, oldiocb->retry,
- ndlp,
- (ELS_CMD_ACC |
- (ELS_CMD_PRLI & ~ELS_RSP_MASK)))) ==
- 0) {
- return (1);
- }
-
- /* Xmit PRLI ACC response tag <ulpIoTag> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0131 Xmit PRLI ACC response tag x%x "
- "Data: x%x x%x x%x x%x x%x\n",
- phba->brd_no,
- elsiocb->iocb.ulpIoTag,
- elsiocb->iocb.ulpContext, ndlp->nlp_DID,
- ndlp->nlp_flag, ndlp->nlp_state, ndlp->nlp_rpi);
-
- icmd = &elsiocb->iocb;
- oldcmd = &oldiocb->iocb;
- icmd->ulpContext = oldcmd->ulpContext; /* Xri */
- pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
-
- *((uint32_t *) (pcmd)) = (ELS_CMD_ACC | (ELS_CMD_PRLI & ~ELS_RSP_MASK));
- pcmd += sizeof (uint32_t);
-
- /* For PRLI, remainder of payload is PRLI parameter page */
- memset(pcmd, 0, sizeof (PRLI));
-
- npr = (PRLI *) pcmd;
- vpd = &phba->vpd;
- /*
- * If our firmware version is 3.20 or later,
- * set the following bits for FC-TAPE support.
- */
- if (vpd->rev.feaLevelHigh >= 0x02) {
- npr->ConfmComplAllowed = 1;
- npr->Retry = 1;
- npr->TaskRetryIdReq = 1;
- }
-
- npr->acceptRspCode = PRLI_REQ_EXECUTED;
- npr->estabImagePair = 1;
- npr->readXferRdyDis = 1;
- npr->ConfmComplAllowed = 1;
-
- npr->prliType = PRLI_FCP_TYPE;
- npr->initiatorFunc = 1;
-
- /* The els iocb is fully initialize. Flush it to main store for the
- * HBA. Note that all els iocb context buffer are from the driver's
- * dma pool and have length LPFC_BPL_SIZE. Get a short-hand pointer to
- * the physical address.
- */
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- phba->fc_stat.elsXmitACC++;
- elsiocb->iocb_cmpl = lpfc_cmpl_els_acc;
-
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- return (0);
-}
-
-static int
-lpfc_els_rsp_rnid_acc(struct lpfc_hba * phba,
- uint8_t format,
- struct lpfc_iocbq * oldiocb, struct lpfc_nodelist * ndlp)
-{
- RNID *rn;
- IOCB_t *icmd;
- IOCB_t *oldcmd;
- struct lpfc_iocbq *elsiocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- struct lpfc_dmabuf *bmp;
- uint8_t *pcmd;
- uint16_t cmdsize;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING];
-
- cmdsize = sizeof (uint32_t) + sizeof (uint32_t)
- + (2 * sizeof (struct lpfc_name));
- if (format)
- cmdsize += sizeof (RNID_TOP_DISC);
-
- if ((elsiocb = lpfc_prep_els_iocb(phba, 0, cmdsize, oldiocb->retry,
- ndlp, ELS_CMD_ACC)) == 0) {
- return (1);
- }
-
- /* Xmit RNID ACC response tag <ulpIoTag> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0132 Xmit RNID ACC response tag x%x "
- "Data: x%x\n",
- phba->brd_no,
- elsiocb->iocb.ulpIoTag,
- elsiocb->iocb.ulpContext);
-
- icmd = &elsiocb->iocb;
- oldcmd = &oldiocb->iocb;
- icmd->ulpContext = oldcmd->ulpContext; /* Xri */
- pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
-
- *((uint32_t *) (pcmd)) = ELS_CMD_ACC;
- pcmd += sizeof (uint32_t);
-
- memset(pcmd, 0, sizeof (RNID));
- rn = (RNID *) (pcmd);
- rn->Format = format;
- rn->CommonLen = (2 * sizeof (struct lpfc_name));
- memcpy(&rn->portName, &phba->fc_portname, sizeof (struct lpfc_name));
- memcpy(&rn->nodeName, &phba->fc_nodename, sizeof (struct lpfc_name));
- switch (format) {
- case 0:
- rn->SpecificLen = 0;
- break;
- case RNID_TOPOLOGY_DISC:
- rn->SpecificLen = sizeof (RNID_TOP_DISC);
- memcpy(&rn->un.topologyDisc.portName,
- &phba->fc_portname, sizeof (struct lpfc_name));
- rn->un.topologyDisc.unitType = RNID_HBA;
- rn->un.topologyDisc.physPort = 0;
- rn->un.topologyDisc.attachedNodes = 0;
- break;
- default:
- rn->CommonLen = 0;
- rn->SpecificLen = 0;
- break;
- }
-
- /* The els iocb is fully initialize. Flush it to main store for the
- * HBA. Note that all els iocb context buffer are from the driver's
- * dma pool and have length LPFC_BPL_SIZE. Get a short-hand pointer to
- * the physical address.
- */
- bmp = (struct lpfc_dmabuf *) (elsiocb->context2);
- pci_dma_sync_single_for_device(phba->pcidev, bmp->phys,
- LPFC_BPL_SIZE, PCI_DMA_TODEVICE);
-
- phba->fc_stat.elsXmitACC++;
- elsiocb->iocb_cmpl = lpfc_cmpl_els_acc;
- elsiocb->context1 = NULL; /* Don't need ndlp for cmpl,
- * it could be freed */
-
- if (lpfc_sli_issue_iocb(phba, pring, elsiocb, 0) == IOCB_ERROR) {
- lpfc_els_free_iocb(phba, elsiocb);
- return (1);
- }
- return (0);
-}
-
-int
-lpfc_els_disc_adisc(struct lpfc_hba * phba)
-{
- int sentadisc;
- struct lpfc_nodelist *ndlp, *next_ndlp;
-
- sentadisc = 0;
- /* go thru NPR list and issue any remaining ELS ADISCs */
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
- nlp_listp) {
- if(ndlp->nlp_flag & NLP_NPR_2B_DISC) {
- if(ndlp->nlp_flag & NLP_NPR_ADISC) {
- ndlp->nlp_flag &= ~NLP_NPR_ADISC;
- ndlp->nlp_state = NLP_STE_ADISC_ISSUE;
- lpfc_nlp_list(phba, ndlp,
- NLP_ADISC_LIST);
- lpfc_issue_els_adisc(phba, ndlp, 0);
- sentadisc++;
- phba->num_disc_nodes++;
- if (phba->num_disc_nodes >=
- phba->cfg_discovery_threads) {
- phba->fc_flag |= FC_NLP_MORE;
- break;
- }
- }
- }
- }
- if (sentadisc == 0) {
- phba->fc_flag &= ~FC_NLP_MORE;
- }
- return(sentadisc);
-}
-
-int
-lpfc_els_disc_plogi(struct lpfc_hba * phba)
-{
- int sentplogi;
- struct lpfc_nodelist *ndlp, *next_ndlp;
-
- sentplogi = 0;
- /* go thru NPR list and issue any remaining ELS PLOGIs */
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
- nlp_listp) {
- if((ndlp->nlp_flag & NLP_NPR_2B_DISC) &&
- (!(ndlp->nlp_flag & NLP_DELAY_TMO))) {
- if(!(ndlp->nlp_flag & NLP_NPR_ADISC)) {
- ndlp->nlp_state = NLP_STE_PLOGI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PLOGI_LIST);
- lpfc_issue_els_plogi(phba, ndlp, 0);
- sentplogi++;
- phba->num_disc_nodes++;
- if (phba->num_disc_nodes >=
- phba->cfg_discovery_threads) {
- phba->fc_flag |= FC_NLP_MORE;
- break;
- }
- }
- }
- }
- if (sentplogi == 0) {
- phba->fc_flag &= ~FC_NLP_MORE;
- }
- return(sentplogi);
-}
-
-int
-lpfc_els_flush_rscn(struct lpfc_hba * phba)
-{
- struct lpfc_dmabuf *mp;
- int i;
-
- for (i = 0; i < phba->fc_rscn_id_cnt; i++) {
- mp = phba->fc_rscn_id_list[i];
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- phba->fc_rscn_id_list[i] = NULL;
- }
- phba->fc_rscn_id_cnt = 0;
- phba->fc_flag &= ~(FC_RSCN_MODE | FC_RSCN_DISCOVERY);
- lpfc_can_disctmo(phba);
- return (0);
-}
-
-int
-lpfc_rscn_payload_check(struct lpfc_hba * phba, uint32_t did)
-{
- D_ID ns_did;
- D_ID rscn_did;
- struct lpfc_dmabuf *mp;
- uint32_t *lp;
- uint32_t payload_len, cmd, i, match;
-
- ns_did.un.word = did;
- match = 0;
-
- /* If we are doing a FULL RSCN rediscovery, match everything */
- if (phba->fc_flag & FC_RSCN_DISCOVERY) {
- return (did);
- }
-
- for (i = 0; i < phba->fc_rscn_id_cnt; i++) {
- mp = phba->fc_rscn_id_list[i];
- lp = (uint32_t *) mp->virt;
- cmd = *lp++;
- payload_len = be32_to_cpu(cmd) & 0xffff; /* payload length */
- payload_len -= sizeof (uint32_t); /* take off word 0 */
- while (payload_len) {
- rscn_did.un.word = *lp++;
- rscn_did.un.word = be32_to_cpu(rscn_did.un.word);
- payload_len -= sizeof (uint32_t);
- switch (rscn_did.un.b.resv) {
- case 0: /* Single N_Port ID effected */
- if (ns_did.un.word == rscn_did.un.word) {
- match = did;
- }
- break;
- case 1: /* Whole N_Port Area effected */
- if ((ns_did.un.b.domain == rscn_did.un.b.domain)
- && (ns_did.un.b.area == rscn_did.un.b.area))
- {
- match = did;
- }
- break;
- case 2: /* Whole N_Port Domain effected */
- if (ns_did.un.b.domain == rscn_did.un.b.domain)
- {
- match = did;
- }
- break;
- case 3: /* Whole Fabric effected */
- match = did;
- break;
- default:
- /* Unknown Identifier in RSCN list */
- lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY,
- "%d:0217 Unknown Identifier in "
- "RSCN payload Data: x%x\n",
- phba->brd_no, rscn_did.un.word);
- break;
- }
- if (match) {
- break;
- }
- }
- }
- return (match);
-}
-
-static int
-lpfc_rscn_recovery_check(struct lpfc_hba * phba)
-{
- struct lpfc_nodelist *ndlp = NULL, *next_ndlp;
- struct list_head *listp;
- struct list_head *node_list[7];
- int i;
-
- /* Look at all nodes effected by pending RSCNs and move
- * them to NPR list.
- */
- node_list[0] = &phba->fc_npr_list; /* MUST do this list first */
- node_list[1] = &phba->fc_nlpmap_list;
- node_list[2] = &phba->fc_nlpunmap_list;
- node_list[3] = &phba->fc_prli_list;
- node_list[4] = &phba->fc_reglogin_list;
- node_list[5] = &phba->fc_adisc_list;
- node_list[6] = &phba->fc_plogi_list;
- for (i = 0; i < 7; i++) {
- listp = node_list[i];
- if (list_empty(listp))
- continue;
-
- list_for_each_entry_safe(ndlp, next_ndlp, listp, nlp_listp) {
- if((lpfc_rscn_payload_check(phba, ndlp->nlp_DID))) {
- /* part of RSCN, process this entry */
- lpfc_set_failmask(phba, ndlp,
- LPFC_DEV_DISCOVERY_INP,
- LPFC_SET_BITMASK);
-
- lpfc_disc_state_machine(phba, ndlp, NULL,
- NLP_EVT_DEVICE_RECOVERY);
- if(ndlp->nlp_flag & NLP_DELAY_TMO) {
- ndlp->nlp_flag &= ~NLP_DELAY_TMO;
- del_timer_sync(&ndlp->nlp_delayfunc);
- }
- }
- }
- }
- return (0);
-}
-
-static int
-lpfc_els_rcv_rscn(struct lpfc_hba * phba,
- struct lpfc_iocbq * cmdiocb,
- struct lpfc_nodelist * ndlp, uint8_t newnode)
-{
- struct lpfc_dmabuf *pcmd;
- uint32_t *lp;
- IOCB_t *icmd;
- uint32_t payload_len, cmd;
-
- icmd = &cmdiocb->iocb;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
- lp = (uint32_t *) pcmd->virt;
-
- /* The response iocb was populated by the HBA. Flush it to main store
- * for the driver. Note that all iocb context buffers are from the
- * driver's dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_device(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- cmd = *lp++;
- payload_len = be32_to_cpu(cmd) & 0xffff; /* payload length */
- payload_len -= sizeof (uint32_t); /* take off word 0 */
- cmd &= ELS_CMD_MASK;
-
- /* RSCN received */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY,
- "%d:0214 RSCN received Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- phba->fc_flag, payload_len, *lp, phba->fc_rscn_id_cnt);
-
- /* if we are already processing an RSCN, save the received
- * RSCN payload buffer, cmdiocb->context2 to process later.
- * If we zero, cmdiocb->context2, the calling routine will
- * not try to free it.
- */
- if (phba->fc_flag & FC_RSCN_MODE) {
- if ((phba->fc_rscn_id_cnt < FC_MAX_HOLD_RSCN) &&
- !(phba->fc_flag & FC_RSCN_DISCOVERY)) {
- phba->fc_rscn_id_list[phba->fc_rscn_id_cnt++] = pcmd;
- cmdiocb->context2 = NULL;
- /* Deferred RSCN */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0235 Deferred RSCN "
- "Data: x%x x%x x%x\n",
- phba->brd_no, phba->fc_rscn_id_cnt,
- phba->fc_flag, phba->hba_state);
- } else {
- phba->fc_flag |= FC_RSCN_DISCOVERY;
- /* ReDiscovery RSCN */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0234 ReDiscovery RSCN "
- "Data: x%x x%x x%x\n",
- phba->brd_no, phba->fc_rscn_id_cnt,
- phba->fc_flag, phba->hba_state);
- }
- /* Send back ACC */
- lpfc_els_rsp_acc(phba, ELS_CMD_ACC, cmdiocb, ndlp, NULL,
- newnode);
-
- /* send RECOVERY event for ALL nodes that match RSCN payload */
- lpfc_rscn_recovery_check(phba);
- return (0);
- }
-
- phba->fc_flag |= FC_RSCN_MODE;
- phba->fc_rscn_id_list[phba->fc_rscn_id_cnt++] = pcmd;
- /*
- * If we zero, cmdiocb->context2, the calling routine will
- * not try to free it.
- */
- cmdiocb->context2 = NULL;
-
- lpfc_set_disctmo(phba);
-
- /* Send back ACC */
- lpfc_els_rsp_acc(phba, ELS_CMD_ACC, cmdiocb, ndlp, NULL, newnode);
-
- /* send RECOVERY event for ALL nodes that match RSCN payload */
- lpfc_rscn_recovery_check(phba);
-
- return (lpfc_els_handle_rscn(phba));
-}
-
-int
-lpfc_els_handle_rscn(struct lpfc_hba * phba)
-{
- struct lpfc_nodelist *ndlp;
-
- lpfc_put_event(phba, HBA_EVENT_RSCN, phba->fc_myDID,
- (void *)(unsigned long)(phba->fc_myDID), 0, 0);
-
- /* Start timer for RSCN processing */
- lpfc_set_disctmo(phba);
-
- /* RSCN processed */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY,
- "%d:0215 RSCN processed Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- phba->fc_flag, 0, phba->fc_rscn_id_cnt,
- phba->hba_state);
-
- /* To process RSCN, first compare RSCN data with NameServer */
- phba->fc_ns_retry = 0;
- if ((ndlp = lpfc_findnode_did(phba, NLP_SEARCH_UNMAPPED,
- NameServer_DID))) {
- /* Good ndlp, issue CT Request to NameServer */
- if (lpfc_ns_cmd(phba, ndlp, SLI_CTNS_GID_FT) == 0) {
- /* Wait for NameServer query cmpl before we can
- continue */
- return (1);
- }
- } else {
- /* If login to NameServer does not exist, issue one */
- /* Good status, issue PLOGI to NameServer */
- if ((ndlp =
- lpfc_findnode_did(phba, NLP_SEARCH_ALL, NameServer_DID))) {
- /* Wait for NameServer login cmpl before we can
- continue */
- return (1);
- }
- if ((ndlp = mempool_alloc(phba->nlp_mem_pool, GFP_ATOMIC))
- == 0) {
- lpfc_els_flush_rscn(phba);
- return (0);
- } else {
- lpfc_nlp_init(phba, ndlp, NameServer_DID);
- ndlp->nlp_type |= NLP_FABRIC;
- ndlp->nlp_state = NLP_STE_PLOGI_ISSUE;
- lpfc_issue_els_plogi(phba, ndlp, 0);
- /* Wait for NameServer login cmpl before we can
- continue */
- return (1);
- }
- }
-
- lpfc_els_flush_rscn(phba);
- return (0);
-}
-
-static int
-lpfc_els_rcv_flogi(struct lpfc_hba * phba,
- struct lpfc_iocbq * cmdiocb,
- struct lpfc_nodelist * ndlp, uint8_t newnode)
-{
- struct lpfc_dmabuf *pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
- uint32_t *lp = (uint32_t *) pcmd->virt;
- IOCB_t *icmd = &cmdiocb->iocb;
- struct serv_parm *sp;
- LPFC_MBOXQ_t *mbox;
- struct ls_rjt stat;
- uint32_t cmd, did;
-
-
- /* The response iocb was populated by the HBA. Flush it to main store
- * for the driver. Note that all iocb context buffers are from the
- * driver's dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_device(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- cmd = *lp++;
- sp = (struct serv_parm *) lp;
-
- /* FLOGI received */
-
- lpfc_set_disctmo(phba);
-
- if (phba->fc_topology == TOPOLOGY_LOOP) {
- /* We should never receive a FLOGI in loop mode, ignore it */
- did = icmd->un.elsreq64.remoteID;
-
- /* An FLOGI ELS command <elsCmd> was received from DID <did> in
- Loop Mode */
- lpfc_printf_log(phba, KERN_ERR, LOG_ELS,
- "%d:0113 An FLOGI ELS command x%x was received "
- "from DID x%x in Loop Mode\n",
- phba->brd_no, cmd, did);
- return (1);
- }
-
- did = Fabric_DID;
-
- if ((lpfc_check_sparm(phba, ndlp, sp, CLASS3))) {
- /* For a FLOGI we accept, then if our portname is greater
- * then the remote portname we initiate Nport login.
- */
- int rc;
-
- rc = memcmp(&phba->fc_portname, &sp->portName,
- sizeof (struct lpfc_name));
-
- if (!rc) {
- if ((mbox = mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC)) == 0) {
- return (1);
- }
- lpfc_linkdown(phba);
- lpfc_init_link(phba, mbox,
- phba->cfg_topology,
- phba->cfg_link_speed);
- mbox->mb.un.varInitLnk.lipsr_AL_PA = 0;
- if (lpfc_sli_issue_mbox
- (phba, mbox, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free( mbox, phba->mbox_mem_pool);
- }
- return (1);
- }
-
- else if (rc > 0) { /* greater than */
- phba->fc_flag |= FC_PT2PT_PLOGI;
- }
- phba->fc_flag |= FC_PT2PT;
- phba->fc_flag &= ~(FC_FABRIC | FC_PUBLIC_LOOP);
- } else {
- /* Reject this request because invalid parameters */
- stat.un.b.lsRjtRsvd0 = 0;
- stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
- stat.un.b.lsRjtRsnCodeExp = LSEXP_SPARM_OPTIONS;
- stat.un.b.vendorUnique = 0;
- lpfc_els_rsp_reject(phba, stat.un.lsRjtError, cmdiocb, ndlp);
- return (1);
- }
-
- /* Send back ACC */
- lpfc_els_rsp_acc(phba, ELS_CMD_PLOGI, cmdiocb, ndlp, NULL, newnode);
-
- return (0);
-}
-
-static int
-lpfc_els_rcv_rnid(struct lpfc_hba * phba,
- struct lpfc_iocbq * cmdiocb, struct lpfc_nodelist * ndlp)
-{
- struct lpfc_dmabuf *pcmd;
- uint32_t *lp;
- IOCB_t *icmd;
- RNID *rn;
- struct ls_rjt stat;
- uint32_t cmd, did;
-
- icmd = &cmdiocb->iocb;
- did = icmd->un.elsreq64.remoteID;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
- lp = (uint32_t *) pcmd->virt;
-
- /* The response iocb was populated by the HBA. Flush it to main store
- * for the driver. Note that all iocb context buffers are from the
- * driver's dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_device(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- cmd = *lp++;
- rn = (RNID *) lp;
-
- /* RNID received */
-
- switch (rn->Format) {
- case 0:
- case RNID_TOPOLOGY_DISC:
- /* Send back ACC */
- lpfc_els_rsp_rnid_acc(phba, rn->Format, cmdiocb, ndlp);
- break;
- default:
- /* Reject this request because format not supported */
- stat.un.b.lsRjtRsvd0 = 0;
- stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
- stat.un.b.lsRjtRsnCodeExp = LSEXP_CANT_GIVE_DATA;
- stat.un.b.vendorUnique = 0;
- lpfc_els_rsp_reject(phba, stat.un.lsRjtError, cmdiocb, ndlp);
- }
- return (0);
-}
-
-static int
-lpfc_els_rcv_rrq(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_nodelist * ndlp)
-{
- struct lpfc_dmabuf *pcmd;
- uint32_t *lp;
- IOCB_t *icmd;
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- RRQ *rrq;
- uint32_t cmd, did;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_FCP_RING];
- icmd = &cmdiocb->iocb;
- did = icmd->un.elsreq64.remoteID;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
- lp = (uint32_t *) pcmd->virt;
-
- /* The response iocb was populated by the HBA. Flush it to main store
- * for the driver. Note that all iocb context buffers are from the
- * driver's dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- cmd = *lp++;
- rrq = (RRQ *) lp;
-
- /* RRQ received */
- /* Get oxid / rxid from payload and abort it */
- if ((rrq->SID == be32_to_cpu(phba->fc_myDID))) {
- lpfc_sli_abort_iocb_ctx(phba, pring, rrq->Oxid);
- } else {
- lpfc_sli_abort_iocb_ctx(phba, pring, rrq->Rxid);
- }
- /* ACCEPT the rrq request */
- lpfc_els_rsp_acc(phba, ELS_CMD_ACC, cmdiocb, ndlp, NULL, 0);
-
- return 0;
-}
-
-static int
-lpfc_els_rcv_farp(struct lpfc_hba * phba,
- struct lpfc_iocbq * cmdiocb, struct lpfc_nodelist * ndlp)
-{
- struct lpfc_dmabuf *pcmd;
- uint32_t *lp;
- IOCB_t *icmd;
- FARP *fp;
- uint32_t cmd, cnt, did;
-
- icmd = &cmdiocb->iocb;
- did = icmd->un.elsreq64.remoteID;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
- lp = (uint32_t *) pcmd->virt;
-
- /* The response iocb was populated by the HBA. Flush it to main store
- * for the driver. Note that all iocb context buffers are from the
- * driver's dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- cmd = *lp++;
- fp = (FARP *) lp;
-
- /* FARP-REQ received from DID <did> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_IP,
- "%d:0601 FARP-REQ received from DID x%x\n",
- phba->brd_no, did);
-
- /* We will only support match on WWPN or WWNN */
- if (fp->Mflags & ~(FARP_MATCH_NODE | FARP_MATCH_PORT)) {
- return (0);
- }
-
- cnt = 0;
- /* If this FARP command is searching for my portname */
- if (fp->Mflags & FARP_MATCH_PORT) {
- if (memcmp(&fp->RportName, &phba->fc_portname,
- sizeof (struct lpfc_name)) == 0)
- cnt = 1;
- }
-
- /* If this FARP command is searching for my nodename */
- if (fp->Mflags & FARP_MATCH_NODE) {
- if (memcmp(&fp->RnodeName, &phba->fc_nodename,
- sizeof (struct lpfc_name)) == 0)
- cnt = 1;
- }
-
- if (cnt) {
- if((ndlp->nlp_state == NLP_STE_UNMAPPED_NODE) ||
- (ndlp->nlp_state == NLP_STE_MAPPED_NODE)) {
- /* Log back into the node before sending the FARP. */
- if (fp->Rflags & FARP_REQUEST_PLOGI) {
- ndlp->nlp_state = NLP_STE_PLOGI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PLOGI_LIST);
- lpfc_issue_els_plogi(phba, ndlp, 0);
- }
-
- /* Send a FARP response to that node */
- if (fp->Rflags & FARP_REQUEST_FARPR) {
- lpfc_issue_els_farpr(phba, did, 0);
- }
- }
- }
- return (0);
-}
-
-static int
-lpfc_els_rcv_farpr(struct lpfc_hba * phba,
- struct lpfc_iocbq * cmdiocb, struct lpfc_nodelist * ndlp)
-{
- struct lpfc_dmabuf *pcmd;
- uint32_t *lp;
- IOCB_t *icmd;
- uint32_t cmd, did;
-
- icmd = &cmdiocb->iocb;
- did = icmd->un.elsreq64.remoteID;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
- lp = (uint32_t *) pcmd->virt;
-
- /* The response iocb was populated by the HBA. Flush it to main store
- * for the driver. Note that all iocb context buffers are from the
- * driver's dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- cmd = *lp++;
- /* FARP-RSP received from DID <did> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_IP,
- "%d:0600 FARP-RSP received from DID x%x\n",
- phba->brd_no, did);
-
- /* ACCEPT the Farp resp request */
- lpfc_els_rsp_acc(phba, ELS_CMD_ACC, cmdiocb, ndlp, NULL, 0);
-
- return 0;
-}
-
-static int
-lpfc_els_rcv_fan(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_nodelist * ndlp)
-{
- struct lpfc_dmabuf *pcmd;
- uint32_t *lp;
- IOCB_t *icmd;
- FAN *fp;
- uint32_t cmd, did;
-
- icmd = &cmdiocb->iocb;
- did = icmd->un.elsreq64.remoteID;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
- lp = (uint32_t *) pcmd->virt;
-
- /* The response iocb was populated by the HBA. Flush it to main store
- * for the driver. Note that all iocb context buffers are from the
- * driver's dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- cmd = *lp++;
- fp = (FAN *) lp;
-
- /* FAN received */
-
- /* ACCEPT the FAN request */
- lpfc_els_rsp_acc(phba, ELS_CMD_ACC, cmdiocb, ndlp, NULL, 0);
-
- if (phba->hba_state == LPFC_LOCAL_CFG_LINK) {
- /* The discovery state machine needs to take a different
- * action if this node has switched fabrics
- */
- if ((memcmp(&fp->FportName, &phba->fc_fabparam.portName,
- sizeof (struct lpfc_name)) != 0)
- ||
- (memcmp(&fp->FnodeName, &phba->fc_fabparam.nodeName,
- sizeof (struct lpfc_name)) != 0)) {
- /* This node has switched fabrics. An FLOGI is required
- * after the timeout
- */
- return (0);
- }
-
- /* Start discovery */
- lpfc_disc_start(phba);
- }
-
- return (0);
-}
-
-void
-lpfc_els_timeout_handler(unsigned long ptr)
-{
- struct lpfc_hba *phba;
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- struct lpfc_iocbq *tmp_iocb, *piocb;
- IOCB_t *cmd = NULL;
- struct lpfc_dmabuf *pcmd;
- struct list_head *dlp;
- uint32_t *elscmd;
- uint32_t els_command;
- uint32_t timeout;
- uint32_t remote_ID;
- unsigned long iflag;
-
- phba = (struct lpfc_hba *)ptr;
- if(phba == 0)
- return;
- spin_lock_irqsave(phba->host->host_lock, iflag);
- timeout = (uint32_t)(phba->fc_ratov << 1);
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING];
- dlp = &pring->txcmplq;
-
- list_for_each_entry_safe(piocb, tmp_iocb, &pring->txcmplq, list) {
- cmd = &piocb->iocb;
-
- if (piocb->iocb_flag & LPFC_IO_LIBDFC) {
- continue;
- }
- pcmd = (struct lpfc_dmabuf *) piocb->context2;
- elscmd = (uint32_t *) (pcmd->virt);
- els_command = *elscmd;
-
- if ((els_command == ELS_CMD_FARP)
- || (els_command == ELS_CMD_FARPR)) {
- continue;
- }
-
- if (piocb->drvrTimeout > 0) {
- if (piocb->drvrTimeout >= timeout) {
- piocb->drvrTimeout -= timeout;
- } else {
- piocb->drvrTimeout = 0;
- }
- continue;
- }
-
- list_del(&piocb->list);
- pring->txcmplq_cnt--;
-
- if (cmd->ulpCommand == CMD_GEN_REQUEST64_CR) {
- struct lpfc_nodelist *ndlp;
-
- ndlp = lpfc_findnode_rpi(phba, cmd->ulpContext);
- remote_ID = ndlp->nlp_DID;
- if (cmd->un.elsreq64.bdl.ulpIoTag32) {
- lpfc_sli_issue_abort_iotag32(phba,
- pring, piocb);
- }
- } else {
- remote_ID = cmd->un.elsreq64.remoteID;
- }
-
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_ELS,
- "%d:0127 ELS timeout Data: x%x x%x x%x x%x\n",
- phba->brd_no, els_command,
- remote_ID, cmd->ulpCommand, cmd->ulpIoTag);
-
- /*
- * The iocb has timed out; abort it.
- */
- if (piocb->iocb_cmpl) {
- cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
- (piocb->iocb_cmpl) (phba, piocb, piocb);
- } else {
- mempool_free(piocb, phba->iocb_mem_pool);
- }
- }
-
- phba->els_tmofunc.expires = jiffies + HZ * timeout;
- add_timer(&phba->els_tmofunc);
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
-}
-
-void
-lpfc_els_flush_cmd(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- struct lpfc_iocbq *tmp_iocb, *piocb;
- IOCB_t *cmd = NULL;
- struct lpfc_dmabuf *pcmd;
- uint32_t *elscmd;
- uint32_t els_command;
- uint32_t remote_ID;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING];
-
- list_for_each_entry_safe(piocb, tmp_iocb, &pring->txq, list) {
- cmd = &piocb->iocb;
-
- if (piocb->iocb_flag & LPFC_IO_LIBDFC) {
- continue;
- }
-
- /* Do not flush out the QUE_RING and ABORT/CLOSE iocbs */
- if ((cmd->ulpCommand == CMD_QUE_RING_BUF_CN) ||
- (cmd->ulpCommand == CMD_QUE_RING_BUF64_CN) ||
- (cmd->ulpCommand == CMD_CLOSE_XRI_CN) ||
- (cmd->ulpCommand == CMD_ABORT_XRI_CN)) {
- continue;
- }
-
- pcmd = (struct lpfc_dmabuf *) piocb->context2;
- elscmd = (uint32_t *) (pcmd->virt);
- els_command = *elscmd;
-
- if (cmd->ulpCommand == CMD_GEN_REQUEST64_CR) {
- struct lpfc_nodelist *ndlp;
-
- ndlp = lpfc_findnode_rpi(phba, cmd->ulpContext);
- remote_ID = ndlp->nlp_DID;
- if (phba->hba_state == LPFC_HBA_READY) {
- continue;
- }
- } else {
- remote_ID = cmd->un.elsreq64.remoteID;
- }
-
- list_del(&piocb->list);
- pring->txcmplq_cnt--;
-
- cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
-
- if (piocb->iocb_cmpl) {
- (piocb->iocb_cmpl) (phba, piocb, piocb);
- } else {
- mempool_free( piocb, phba->iocb_mem_pool);
- }
- }
-
- list_for_each_entry_safe(piocb, tmp_iocb, &pring->txcmplq, list) {
- cmd = &piocb->iocb;
-
- if (piocb->iocb_flag & LPFC_IO_LIBDFC) {
- continue;
- }
- pcmd = (struct lpfc_dmabuf *) piocb->context2;
- elscmd = (uint32_t *) (pcmd->virt);
- els_command = *elscmd;
-
- if (cmd->ulpCommand == CMD_GEN_REQUEST64_CR) {
- struct lpfc_nodelist *ndlp;
-
- ndlp = lpfc_findnode_rpi(phba, cmd->ulpContext);
- remote_ID = ndlp->nlp_DID;
- if (phba->hba_state == LPFC_HBA_READY) {
- continue;
- }
- } else {
- remote_ID = cmd->un.elsreq64.remoteID;
- }
-
- list_del(&piocb->list);
- pring->txcmplq_cnt--;
-
- cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
-
- if (piocb->iocb_cmpl) {
- (piocb->iocb_cmpl) (phba, piocb, piocb);
- } else {
- mempool_free( piocb, phba->iocb_mem_pool);
- }
- }
- return;
-}
-
-void
-lpfc_els_unsol_event(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring, struct lpfc_iocbq * elsiocb)
-{
- struct lpfc_sli *psli;
- struct lpfc_nodelist *ndlp;
- struct lpfc_dmabuf *mp;
- uint32_t *lp;
- IOCB_t *icmd;
- struct ls_rjt stat;
- uint32_t cmd;
- uint32_t did;
- uint32_t newnode;
- uint32_t drop_cmd = 0; /* by default do NOT drop received cmd */
- uint32_t rjt_err = 0;
-
- psli = &phba->sli;
- icmd = &elsiocb->iocb;
-
- /* type of ELS cmd is first 32bit word in packet */
- mp = lpfc_sli_ringpostbuf_get(phba, pring, getPaddr(icmd->un.
- cont64[0].
- addrHigh,
- icmd->un.
- cont64[0].addrLow));
- if (mp == 0) {
- drop_cmd = 1;
- goto dropit;
- }
-
- newnode = 0;
- lp = (uint32_t *) mp->virt;
- cmd = *lp++;
- lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], 1, 1);
-
- if (icmd->ulpStatus) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- drop_cmd = 1;
- goto dropit;
- }
-
- /* Check to see if link went down during discovery */
- if (lpfc_els_chk_latt(phba)) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- drop_cmd = 1;
- goto dropit;
- }
-
- did = icmd->un.rcvels.remoteID;
- if ((ndlp = lpfc_findnode_did(phba, NLP_SEARCH_ALL, did)) == 0) {
- /* Cannot find existing Fabric ndlp, so allocate a new one */
- if ((ndlp = mempool_alloc(phba->nlp_mem_pool, GFP_ATOMIC))
- == 0) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- drop_cmd = 1;
- goto dropit;
- }
-
- lpfc_nlp_init(phba, ndlp, did);
- newnode = 1;
- if ((did & Fabric_DID_MASK) == Fabric_DID_MASK) {
- ndlp->nlp_type |= NLP_FABRIC;
- }
- }
-
- phba->fc_stat.elsRcvFrame++;
- elsiocb->context1 = ndlp;
- elsiocb->context2 = mp;
-
- if ((cmd & ELS_CMD_MASK) == ELS_CMD_RSCN) {
- cmd &= ELS_CMD_MASK;
- }
- /* ELS command <elsCmd> received from NPORT <did> */
- lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
- "%d:0112 ELS command x%x received from NPORT x%x "
- "Data: x%x\n", phba->brd_no, cmd, did, phba->hba_state);
-
- switch (cmd) {
- case ELS_CMD_PLOGI:
- phba->fc_stat.elsRcvPLOGI++;
- if(phba->hba_state < LPFC_DISC_AUTH) {
- rjt_err = LSEXP_NOTHING_MORE;
- break;
- }
- lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_PLOGI);
- break;
- case ELS_CMD_FLOGI:
- phba->fc_stat.elsRcvFLOGI++;
- lpfc_els_rcv_flogi(phba, elsiocb, ndlp, newnode);
- if (newnode) {
- mempool_free( ndlp, phba->nlp_mem_pool);
- }
- break;
- case ELS_CMD_LOGO:
- phba->fc_stat.elsRcvLOGO++;
- if(phba->hba_state < LPFC_DISC_AUTH) {
- rjt_err = LSEXP_NOTHING_MORE;
- break;
- }
- lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_LOGO);
- break;
- case ELS_CMD_PRLO:
- phba->fc_stat.elsRcvPRLO++;
- if(phba->hba_state < LPFC_DISC_AUTH) {
- rjt_err = LSEXP_NOTHING_MORE;
- break;
- }
- lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_PRLO);
- break;
- case ELS_CMD_RSCN:
- phba->fc_stat.elsRcvRSCN++;
- lpfc_els_rcv_rscn(phba, elsiocb, ndlp, newnode);
- if (newnode) {
- mempool_free( ndlp, phba->nlp_mem_pool);
- }
- break;
- case ELS_CMD_ADISC:
- phba->fc_stat.elsRcvADISC++;
- if(phba->hba_state < LPFC_DISC_AUTH) {
- rjt_err = LSEXP_NOTHING_MORE;
- break;
- }
- lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_ADISC);
- break;
- case ELS_CMD_PDISC:
- phba->fc_stat.elsRcvPDISC++;
- if(phba->hba_state < LPFC_DISC_AUTH) {
- rjt_err = LSEXP_NOTHING_MORE;
- break;
- }
- lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_PDISC);
- break;
- case ELS_CMD_FARPR:
- phba->fc_stat.elsRcvFARPR++;
- lpfc_els_rcv_farpr(phba, elsiocb, ndlp);
- break;
- case ELS_CMD_FARP:
- phba->fc_stat.elsRcvFARP++;
- lpfc_els_rcv_farp(phba, elsiocb, ndlp);
- break;
- case ELS_CMD_FAN:
- phba->fc_stat.elsRcvFAN++;
- lpfc_els_rcv_fan(phba, elsiocb, ndlp);
- break;
- case ELS_CMD_RRQ:
- phba->fc_stat.elsRcvRRQ++;
- lpfc_els_rcv_rrq(phba, elsiocb, ndlp);
- break;
- case ELS_CMD_PRLI:
- phba->fc_stat.elsRcvPRLI++;
- if(phba->hba_state < LPFC_DISC_AUTH) {
- rjt_err = LSEXP_NOTHING_MORE;
- break;
- }
- lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_PRLI);
- break;
- case ELS_CMD_RNID:
- phba->fc_stat.elsRcvRNID++;
- lpfc_els_rcv_rnid(phba, elsiocb, ndlp);
- break;
- default:
- /* Unsupported ELS command, reject */
- rjt_err = LSEXP_NOTHING_MORE;
-
- /* Unknown ELS command <elsCmd> received from NPORT <did> */
- lpfc_printf_log(phba, KERN_ERR, LOG_ELS,
- "%d:0115 Unknown ELS command x%x received from "
- "NPORT x%x\n", phba->brd_no, cmd, did);
- if (newnode) {
- mempool_free( ndlp, phba->nlp_mem_pool);
- }
- break;
- }
-
- /* check if need to LS_RJT received ELS cmd */
- if (rjt_err) {
- stat.un.b.lsRjtRsvd0 = 0;
- stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
- stat.un.b.lsRjtRsnCodeExp = rjt_err;
- stat.un.b.vendorUnique = 0;
- lpfc_els_rsp_reject(phba, stat.un.lsRjtError, elsiocb, ndlp);
- }
-
- if (elsiocb->context2) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- }
-dropit:
- /* check if need to drop received ELS cmd */
- if (drop_cmd == 1) {
- lpfc_printf_log(phba, KERN_ERR, LOG_ELS,
- "%d:0111 Dropping received ELS cmd "
- "Data: x%x x%x\n", phba->brd_no,
- icmd->ulpStatus, icmd->un.ulpWord[4]);
- phba->fc_stat.elsRcvDrop++;
- }
- return;
-}
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_hbadisc.c 1.199 2004/11/18 20:19:30EST sf_support Exp $
- */
-
-#include <linux/version.h>
-#include <linux/blkdev.h>
-#include <linux/dma-mapping.h>
-#include <linux/pci.h>
-#include <linux/spinlock.h>
-#include <linux/kernel.h>
-#include <linux/smp_lock.h>
-
-#include <scsi/scsi_cmnd.h>
-#include <scsi/scsi_device.h>
-#include <scsi/scsi_host.h>
-
-#include <scsi/scsi_transport_fc.h>
-
-#include "lpfc_sli.h"
-#include "lpfc_disc.h"
-#include "lpfc_scsi.h"
-#include "lpfc.h"
-#include "lpfc_crtn.h"
-#include "lpfc_fcp.h"
-#include "lpfc_hw.h"
-#include "lpfc_logmsg.h"
-#include "lpfc_mem.h"
-
-/* AlpaArray for assignment of scsid for scan-down and bind_method */
-uint8_t lpfcAlpaArray[] = {
- 0xEF, 0xE8, 0xE4, 0xE2, 0xE1, 0xE0, 0xDC, 0xDA, 0xD9, 0xD6,
- 0xD5, 0xD4, 0xD3, 0xD2, 0xD1, 0xCE, 0xCD, 0xCC, 0xCB, 0xCA,
- 0xC9, 0xC7, 0xC6, 0xC5, 0xC3, 0xBC, 0xBA, 0xB9, 0xB6, 0xB5,
- 0xB4, 0xB3, 0xB2, 0xB1, 0xAE, 0xAD, 0xAC, 0xAB, 0xAA, 0xA9,
- 0xA7, 0xA6, 0xA5, 0xA3, 0x9F, 0x9E, 0x9D, 0x9B, 0x98, 0x97,
- 0x90, 0x8F, 0x88, 0x84, 0x82, 0x81, 0x80, 0x7C, 0x7A, 0x79,
- 0x76, 0x75, 0x74, 0x73, 0x72, 0x71, 0x6E, 0x6D, 0x6C, 0x6B,
- 0x6A, 0x69, 0x67, 0x66, 0x65, 0x63, 0x5C, 0x5A, 0x59, 0x56,
- 0x55, 0x54, 0x53, 0x52, 0x51, 0x4E, 0x4D, 0x4C, 0x4B, 0x4A,
- 0x49, 0x47, 0x46, 0x45, 0x43, 0x3C, 0x3A, 0x39, 0x36, 0x35,
- 0x34, 0x33, 0x32, 0x31, 0x2E, 0x2D, 0x2C, 0x2B, 0x2A, 0x29,
- 0x27, 0x26, 0x25, 0x23, 0x1F, 0x1E, 0x1D, 0x1B, 0x18, 0x17,
- 0x10, 0x0F, 0x08, 0x04, 0x02, 0x01
-};
-
-static void
-lpfc_evt_iocb_free(struct lpfc_hba * phba, struct lpfc_iocbq * saveq)
-{
- struct lpfc_iocbq *rspiocbp, *tmpiocbp;
-
- /* Free up iocb buffer chain for cmd just processed */
- list_for_each_entry_safe(rspiocbp, tmpiocbp,
- &saveq->list, list) {
- list_del(&rspiocbp->list);
- mempool_free( rspiocbp, phba->iocb_mem_pool);
- }
- mempool_free( saveq, phba->iocb_mem_pool);
-}
-
-void
-lpfc_process_nodev_timeout(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp)
-{
- struct lpfc_target *targetp;
- int scsid;
-
- if (!(ndlp->nlp_type & NLP_FABRIC)) {
- /* Nodev timeout on NPort <nlp_DID> */
- lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY,
- "%d:0203 Nodev timeout on NPort x%x "
- "Data: x%x x%x x%x\n",
- phba->brd_no, ndlp->nlp_DID, ndlp->nlp_flag,
- ndlp->nlp_state, ndlp->nlp_rpi);
- }
-
- ndlp->nlp_flag &= ~NLP_NODEV_TMO;
-
- for(scsid=0;scsid<MAX_FCP_TARGET;scsid++) {
- targetp = phba->device_queue_hash[scsid];
- /* First see if the SCSI ID has an allocated struct
- lpfc_target */
- if (targetp) {
- if (targetp->pnode == ndlp) {
- /* flush the target */
- lpfc_sli_abort_iocb_tgt(phba,
- &phba->sli.ring[phba->sli.fcp_ring],
- scsid, LPFC_ABORT_ALLQ);
- }
- }
- }
-
- lpfc_disc_state_machine(phba, ndlp, NULL, NLP_EVT_DEVICE_RM);
- return;
-}
-
-static void
-lpfc_disc_done(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli = &phba->sli;
- LPFC_DISC_EVT_t *evtp, *next_evtp;
- LPFC_MBOXQ_t *pmb;
- struct lpfc_iocbq *cmdiocbp, *saveq;
- struct lpfc_nodelist *ndlp;
- LPFC_RING_MASK_t *func;
- struct Scsi_Host *shost;
- LIST_HEAD(local_dpc_disc);
-
- list_splice_init(&phba->dpc_disc, &local_dpc_disc);
-
- /* check discovery event list */
- list_for_each_entry_safe(evtp, next_evtp, &local_dpc_disc, evt_listp) {
- list_del(&evtp->evt_listp);
-
- switch(evtp->evt) {
- case LPFC_EVT_MBOX:
- pmb = (LPFC_MBOXQ_t *)(evtp->evt_arg1);
- (pmb->mbox_cmpl) (phba, pmb);
- break;
- case LPFC_EVT_SOL_IOCB:
- cmdiocbp = (struct lpfc_iocbq *)(evtp->evt_arg1);
- saveq = (struct lpfc_iocbq *)(evtp->evt_arg2);
- (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
- lpfc_evt_iocb_free(phba, saveq);
- break;
- case LPFC_EVT_UNSOL_IOCB:
- func = (LPFC_RING_MASK_t *)(evtp->evt_arg1);
- saveq = (struct lpfc_iocbq *)(evtp->evt_arg2);
- (func->lpfc_sli_rcv_unsol_event) (phba,
- &psli->ring[LPFC_ELS_RING], saveq);
- lpfc_evt_iocb_free(phba, saveq);
- break;
- case LPFC_EVT_NODEV_TMO:
- ndlp = (struct lpfc_nodelist *)(evtp->evt_arg1);
- lpfc_process_nodev_timeout(phba, ndlp);
- break;
- case LPFC_EVT_SCAN:
- /* SCSI HOTPLUG supported */
- shost = phba->host;
-#ifdef USE_SCAN_TARGET
- {
- struct lpfc_target *targetp;
-
- targetp = (struct lpfc_target *)(evtp->evt_arg1);
- lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY | LOG_FCP,
- "%d:0251 Rescanning scsi target %d\n",
- phba->brd_no, targetp->scsi_id);
-
- if(targetp ==
- phba->device_queue_hash[targetp->scsi_id]) {
- spin_unlock_irq(phba->host->host_lock);
- scsi_scan_single_target(shost, 0,
- targetp->scsi_id);
- spin_lock_irq(phba->host->host_lock);
- }
- }
-#else
- lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY | LOG_FCP,
- "%d:0251 Rescanning scsi host\n", phba->brd_no);
- spin_unlock_irq(shost->host_lock);
- scsi_scan_host(shost);
- spin_lock_irq(shost->host_lock);
-#endif
- break;
- }
- kfree(evtp);
- }
-}
-
-int
-lpfc_do_dpc(void *p)
-{
- unsigned long flags;
- DECLARE_MUTEX_LOCKED(sem);
- struct lpfc_hba *phba = (struct lpfc_hba *)p;
-
- lock_kernel();
-
- daemonize("lpfc_dpc_%d", phba->brd_no);
- allow_signal(SIGHUP);
-
- phba->dpc_wait = &sem;
- set_user_nice(current, -20);
-
- unlock_kernel();
-
- complete(&phba->dpc_startup);
-
- while (1) {
- if (down_interruptible(&sem))
- break;
-
- if (signal_pending(current))
- break;
-
- if (phba->dpc_kill)
- break;
-
- spin_lock_irqsave(phba->host->host_lock, flags);
- lpfc_disc_done(phba);
- spin_unlock_irqrestore(phba->host->host_lock, flags);
- }
-
- /* Zero out semaphore we were waiting on. */
- phba->dpc_wait = NULL;
- complete_and_exit(&phba->dpc_exiting, 0);
- return(0);
-}
-
-/*
- * This is only called to handle FC discovery events. Since this a rare
- * occurance, we allocate an LPFC_DISC_EVT_t structure here instead of
- * embedding it in the IOCB.
- */
-int
-lpfc_discq_post_event(struct lpfc_hba * phba, void *arg1, void *arg2,
- uint32_t evt)
-{
- LPFC_DISC_EVT_t *evtp;
-
- /* All Mailbox completions and LPFC_ELS_RING rcv ring IOCB events
- * will be queued to DPC for processing
- */
- evtp = (LPFC_DISC_EVT_t *) kmalloc(sizeof(LPFC_DISC_EVT_t), GFP_ATOMIC);
- if (!evtp)
- return 0;
-
- evtp->evt_arg1 = arg1;
- evtp->evt_arg2 = arg2;
- evtp->evt = evt;
- evtp->evt_listp.next = NULL;
- evtp->evt_listp.prev = NULL;
-
- /* Queue the event to the DPC to be processed later */
- list_add_tail(&evtp->evt_listp, &phba->dpc_disc);
- if (phba->dpc_wait)
- up(phba->dpc_wait);
-
- return 1;
-}
-
-int
-lpfc_linkdown(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- struct lpfc_nodelist *ndlp, *next_ndlp;
- struct list_head *listp;
- struct list_head *node_list[7];
- LPFC_MBOXQ_t *mb;
- int rc, i;
-
- psli = &phba->sli;
- phba->hba_state = LPFC_LINK_DOWN;
-
-#if !defined(FC_TRANS_VER1) && !defined(FC_TRANS_265_BLKPATCH)
- /* Stop all requests to the driver from the midlayer. */
- scsi_block_requests(phba->host);
-#endif
-
- lpfc_put_event(phba, HBA_EVENT_LINK_DOWN, phba->fc_myDID, NULL, 0, 0);
-
- /* Clean up any firmware default rpi's */
- if ((mb = mempool_alloc(phba->mbox_mem_pool, GFP_ATOMIC))) {
- lpfc_unreg_did(phba, 0xffffffff, mb);
- if (lpfc_sli_issue_mbox(phba, mb, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free( mb, phba->mbox_mem_pool);
- }
- }
-
- /* Cleanup any outstanding RSCN activity */
- lpfc_els_flush_rscn(phba);
-
- /* Cleanup any outstanding ELS commands */
- lpfc_els_flush_cmd(phba);
-
- /*
- * If this function was called by the lpfc_do_dpc, don't recurse into
- * the routine again. If not, just process any outstanding
- * discovery events.
- */
- if (!list_empty(&phba->dpc_disc)) {
- lpfc_disc_done(phba);
- }
-
- /* Issue a LINK DOWN event to all nodes */
- node_list[0] = &phba->fc_npr_list; /* MUST do this list first */
- node_list[1] = &phba->fc_nlpmap_list;
- node_list[2] = &phba->fc_nlpunmap_list;
- node_list[3] = &phba->fc_prli_list;
- node_list[4] = &phba->fc_reglogin_list;
- node_list[5] = &phba->fc_adisc_list;
- node_list[6] = &phba->fc_plogi_list;
- for (i = 0; i < 7; i++) {
- listp = node_list[i];
- if (list_empty(listp))
- continue;
-
- list_for_each_entry_safe(ndlp, next_ndlp, listp, nlp_listp) {
- /* Fabric nodes are not handled thru state machine for
- link down */
- if (ndlp->nlp_type & NLP_FABRIC) {
- /* Remove ALL Fabric nodes except Fabric_DID */
- if (ndlp->nlp_DID != Fabric_DID) {
- /* Take it off current list and free */
- lpfc_nlp_list(phba, ndlp,
- NLP_NO_LIST);
- }
- }
- else {
- lpfc_set_failmask(phba, ndlp,
- LPFC_DEV_LINK_DOWN,
- LPFC_SET_BITMASK);
-
- rc = lpfc_disc_state_machine(phba, ndlp, NULL,
- NLP_EVT_DEVICE_RECOVERY);
- }
- }
- }
-
- /* free any ndlp's on unused list */
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list,
- nlp_listp) {
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- }
-
- /* Setup myDID for link up if we are in pt2pt mode */
- if (phba->fc_flag & FC_PT2PT) {
- phba->fc_myDID = 0;
- if ((mb = mempool_alloc(phba->mbox_mem_pool, GFP_ATOMIC))) {
- lpfc_config_link(phba, mb);
- if (lpfc_sli_issue_mbox
- (phba, mb, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free( mb, phba->mbox_mem_pool);
- }
- }
- phba->fc_flag &= ~(FC_PT2PT | FC_PT2PT_PLOGI);
- }
- phba->fc_flag &= ~FC_LBIT;
-
- /* Turn off discovery timer if its running */
- lpfc_can_disctmo(phba);
-
- /* Must process IOCBs on all rings to handle ABORTed I/Os */
- return (0);
-}
-
-static int
-lpfc_linkup(struct lpfc_hba * phba)
-{
- struct lpfc_nodelist *ndlp, *next_ndlp;
- struct list_head *listp;
- struct list_head *node_list[7];
- int i;
-
- phba->hba_state = LPFC_LINK_UP;
- phba->fc_flag &= ~(FC_PT2PT | FC_PT2PT_PLOGI | FC_ABORT_DISCOVERY |
- FC_RSCN_MODE | FC_NLP_MORE | FC_RSCN_DISCOVERY);
- phba->fc_ns_retry = 0;
-
-
- lpfc_put_event(phba, HBA_EVENT_LINK_UP, phba->fc_myDID,
- (void *)(unsigned long)(phba->fc_topology),
- 0, phba->fc_linkspeed);
-
- /*
- * Clean up old Fabric NLP_FABRIC logins.
- */
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list,
- nlp_listp) {
- if (ndlp->nlp_DID == Fabric_DID) {
- /* Take it off current list and free */
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- }
- }
-
- /* free any ndlp's on unused list */
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list,
- nlp_listp) {
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- }
-
- /* Mark all nodes for LINK UP */
- node_list[0] = &phba->fc_plogi_list;
- node_list[1] = &phba->fc_adisc_list;
- node_list[2] = &phba->fc_reglogin_list;
- node_list[3] = &phba->fc_prli_list;
- node_list[4] = &phba->fc_nlpunmap_list;
- node_list[5] = &phba->fc_nlpmap_list;
- node_list[6] = &phba->fc_npr_list;
- for (i = 0; i < 7; i++) {
- listp = node_list[i];
- if (list_empty(listp))
- continue;
-
- list_for_each_entry(ndlp, listp, nlp_listp) {
- lpfc_set_failmask(phba, ndlp, LPFC_DEV_DISCOVERY_INP,
- LPFC_SET_BITMASK);
- lpfc_set_failmask(phba, ndlp, LPFC_DEV_LINK_DOWN,
- LPFC_CLR_BITMASK);
- }
- }
-
-#if !defined(FC_TRANS_VER1) && !defined(FC_TRANS_265_BLKPATCH)
- spin_unlock_irq(phba->host->host_lock);
- scsi_unblock_requests(phba->host);
- spin_lock_irq(phba->host->host_lock);
-#endif
- return 0;
-}
-
-/*
- * This routine handles processing a CLEAR_LA mailbox
- * command upon completion. It is setup in the LPFC_MBOXQ
- * as the completion routine when the command is
- * handed off to the SLI layer.
- */
-void
-lpfc_mbx_cmpl_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- struct lpfc_sli *psli;
- MAILBOX_t *mb;
- uint32_t control;
-
- psli = &phba->sli;
- mb = &pmb->mb;
- /* Since we don't do discovery right now, turn these off here */
- psli->ring[psli->ip_ring].flag &= ~LPFC_STOP_IOCB_EVENT;
- psli->ring[psli->fcp_ring].flag &= ~LPFC_STOP_IOCB_EVENT;
- psli->ring[psli->next_ring].flag &= ~LPFC_STOP_IOCB_EVENT;
- /* Check for error */
- if ((mb->mbxStatus) && (mb->mbxStatus != 0x1601)) {
- /* CLEAR_LA mbox error <mbxStatus> state <hba_state> */
- lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
- "%d:0320 CLEAR_LA mbxStatus error x%x hba "
- "state x%x\n",
- phba->brd_no, mb->mbxStatus, phba->hba_state);
-
- phba->hba_state = LPFC_HBA_ERROR;
- goto out;
- }
-
- if(phba->fc_flag & FC_ABORT_DISCOVERY)
- goto out;
-
- phba->num_disc_nodes = 0;
- /* go thru NPR list and issue ELS PLOGIs */
- if (phba->fc_npr_cnt) {
- lpfc_els_disc_plogi(phba);
- }
-
- phba->hba_state = LPFC_HBA_READY;
-
-out:
- phba->fc_flag &= ~FC_ABORT_DISCOVERY;
- /* Device Discovery completes */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY,
- "%d:0225 Device Discovery completes\n",
- phba->brd_no);
-
- mempool_free( pmb, phba->mbox_mem_pool);
- if (phba->fc_flag & FC_ESTABLISH_LINK) {
- phba->fc_flag &= ~FC_ESTABLISH_LINK;
- }
- del_timer_sync(&phba->fc_estabtmo);
- lpfc_can_disctmo(phba);
-
- /* turn on Link Attention interrupts */
- psli->sliinit.sli_flag |= LPFC_PROCESS_LA;
- control = readl(phba->HCregaddr);
- control |= HC_LAINT_ENA;
- writel(control, phba->HCregaddr);
- readl(phba->HCregaddr); /* flush */
-
- return;
-}
-
-static void
-lpfc_mbx_cmpl_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- struct lpfc_sli *psli;
- MAILBOX_t *mb;
-
- psli = &phba->sli;
- mb = &pmb->mb;
- /* Check for error */
- if (mb->mbxStatus) {
- /* CONFIG_LINK mbox error <mbxStatus> state <hba_state> */
- lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
- "%d:0306 CONFIG_LINK mbxStatus error x%x "
- "HBA state x%x\n",
- phba->brd_no, mb->mbxStatus, phba->hba_state);
-
- lpfc_linkdown(phba);
- phba->hba_state = LPFC_HBA_ERROR;
- goto out;
- }
-
- if (phba->hba_state == LPFC_LOCAL_CFG_LINK) {
- if (phba->fc_topology == TOPOLOGY_LOOP) {
- /* If we are public loop and L bit was set */
- if ((phba->fc_flag & FC_PUBLIC_LOOP) &&
- !(phba->fc_flag & FC_LBIT)) {
- /* Need to wait for FAN - use discovery timer
- * for timeout. hba_state is identically
- * LPFC_LOCAL_CFG_LINK while waiting for FAN
- */
- lpfc_set_disctmo(phba);
- mempool_free( pmb, phba->mbox_mem_pool);
- return;
- }
- }
-
- /* Start discovery by sending a FLOGI hba_state is identically
- * LPFC_FLOGI while waiting for FLOGI cmpl
- */
- phba->hba_state = LPFC_FLOGI;
- lpfc_set_disctmo(phba);
- lpfc_initial_flogi(phba);
- mempool_free( pmb, phba->mbox_mem_pool);
- return;
- }
- if (phba->hba_state == LPFC_FABRIC_CFG_LINK) {
- mempool_free( pmb, phba->mbox_mem_pool);
- return;
- }
-
-out:
- /* CONFIG_LINK bad hba state <hba_state> */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_DISCOVERY,
- "%d:0200 CONFIG_LINK bad hba state x%x\n",
- phba->brd_no, phba->hba_state);
-
- if (phba->hba_state != LPFC_CLEAR_LA) {
- lpfc_clear_la(phba, pmb);
- pmb->mbox_cmpl = lpfc_mbx_cmpl_clear_la;
- if (lpfc_sli_issue_mbox(phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free( pmb, phba->mbox_mem_pool);
- lpfc_disc_flush_list(phba);
- psli->ring[(psli->ip_ring)].flag &=
- ~LPFC_STOP_IOCB_EVENT;
- psli->ring[(psli->fcp_ring)].flag &=
- ~LPFC_STOP_IOCB_EVENT;
- psli->ring[(psli->next_ring)].flag &=
- ~LPFC_STOP_IOCB_EVENT;
- phba->hba_state = LPFC_HBA_READY;
- }
- } else {
- mempool_free( pmb, phba->mbox_mem_pool);
- }
- return;
-}
-
-static void
-lpfc_mbx_cmpl_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- struct lpfc_sli *psli = &phba->sli;
- MAILBOX_t *mb = &pmb->mb;
- struct lpfc_dmabuf *mp = (struct lpfc_dmabuf *) pmb->context1;
-
-
- /* Check for error */
- if (mb->mbxStatus) {
- /* READ_SPARAM mbox error <mbxStatus> state <hba_state> */
- lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
- "%d:0319 READ_SPARAM mbxStatus error x%x "
- "hba state x%x>\n",
- phba->brd_no, mb->mbxStatus, phba->hba_state);
-
- lpfc_linkdown(phba);
- phba->hba_state = LPFC_HBA_ERROR;
- goto out;
- }
-
- /* The mailbox was populated by the HBA. Flush it to main store for the
- * driver. Note that all context buffers are from the driver's
- * dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, mp->phys, LPFC_BPL_SIZE,
- PCI_DMA_FROMDEVICE);
-
- memcpy((uint8_t *) & phba->fc_sparam, (uint8_t *) mp->virt,
- sizeof (struct serv_parm));
- memcpy((uint8_t *) & phba->fc_nodename,
- (uint8_t *) & phba->fc_sparam.nodeName,
- sizeof (struct lpfc_name));
- memcpy((uint8_t *) & phba->fc_portname,
- (uint8_t *) & phba->fc_sparam.portName,
- sizeof (struct lpfc_name));
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- mempool_free( pmb, phba->mbox_mem_pool);
- return;
-
-out:
- pmb->context1 = NULL;
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- if (phba->hba_state != LPFC_CLEAR_LA) {
- lpfc_clear_la(phba, pmb);
- pmb->mbox_cmpl = lpfc_mbx_cmpl_clear_la;
- if (lpfc_sli_issue_mbox(phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free( pmb, phba->mbox_mem_pool);
- lpfc_disc_flush_list(phba);
- psli->ring[(psli->ip_ring)].flag &=
- ~LPFC_STOP_IOCB_EVENT;
- psli->ring[(psli->fcp_ring)].flag &=
- ~LPFC_STOP_IOCB_EVENT;
- psli->ring[(psli->next_ring)].flag &=
- ~LPFC_STOP_IOCB_EVENT;
- phba->hba_state = LPFC_HBA_READY;
- }
- } else {
- mempool_free( pmb, phba->mbox_mem_pool);
- }
- return;
-}
-
-/*
- * This routine handles processing a READ_LA mailbox
- * command upon completion. It is setup in the LPFC_MBOXQ
- * as the completion routine when the command is
- * handed off to the SLI layer.
- */
-void
-lpfc_mbx_cmpl_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- struct lpfc_sli *psli = &phba->sli;
- READ_LA_VAR *la;
- LPFC_MBOXQ_t *mbox;
- MAILBOX_t *mb = &pmb->mb;
- struct lpfc_dmabuf *mp = (struct lpfc_dmabuf *) (pmb->context1);
- uint32_t control;
- int i;
-
- /* Check for error */
- if (mb->mbxStatus) {
- /* READ_LA mbox error <mbxStatus> state <hba_state> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_LINK_EVENT,
- "%d:1307 READ_LA mbox error x%x state x%x\n",
- phba->brd_no,
- mb->mbxStatus, phba->hba_state);
-
- lpfc_linkdown(phba);
- phba->hba_state = LPFC_HBA_ERROR;
-
- /* turn on Link Attention interrupts */
- psli->sliinit.sli_flag |= LPFC_PROCESS_LA;
- control = readl(phba->HCregaddr);
- control |= HC_LAINT_ENA;
- writel(control, phba->HCregaddr);
- readl(phba->HCregaddr); /* flush */
- return;
- }
- la = (READ_LA_VAR *) & pmb->mb.un.varReadLA;
-
-
- /* The mailbox was populated by the HBA. Flush it to main store for the
- * driver. Note that all context buffers are from the driver's
- * dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, mp->phys, LPFC_BPL_SIZE,
- PCI_DMA_FROMDEVICE);
-
- /* Get Loop Map information */
- if (mp) {
- memcpy(&phba->alpa_map[0], mp->virt, 128);
- } else {
- memset(&phba->alpa_map[0], 0, 128);
- }
-
- if (((phba->fc_eventTag + 1) < la->eventTag) ||
- (phba->fc_eventTag == la->eventTag)) {
- phba->fc_stat.LinkMultiEvent++;
- if (la->attType == AT_LINK_UP) {
- if (phba->fc_eventTag != 0) {
-
- lpfc_linkdown(phba);
- }
- }
- }
-
- phba->fc_eventTag = la->eventTag;
-
- if (la->attType == AT_LINK_UP) {
- phba->fc_stat.LinkUp++;
- /* Link Up Event <eventTag> received */
- lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
- "%d:1303 Link Up Event x%x received "
- "Data: x%x x%x x%x x%x\n",
- phba->brd_no, la->eventTag, phba->fc_eventTag,
- la->granted_AL_PA, la->UlnkSpeed,
- phba->alpa_map[0]);
-
- switch(la->UlnkSpeed) {
- case LA_1GHZ_LINK:
- phba->fc_linkspeed = LA_1GHZ_LINK;
- break;
- case LA_2GHZ_LINK:
- phba->fc_linkspeed = LA_2GHZ_LINK;
- break;
- case LA_4GHZ_LINK:
- phba->fc_linkspeed = LA_4GHZ_LINK;
- break;
- default:
- phba->fc_linkspeed = LA_UNKNW_LINK;
- break;
- }
-
- if ((phba->fc_topology = la->topology) == TOPOLOGY_LOOP) {
-
- if (la->il) {
- phba->fc_flag |= FC_LBIT;
- }
-
- phba->fc_myDID = la->granted_AL_PA;
-
- i = la->un.lilpBde64.tus.f.bdeSize;
- if (i == 0) {
- phba->alpa_map[0] = 0;
- } else {
- if (phba->cfg_log_verbose
- & LOG_LINK_EVENT) {
- int numalpa, j, k;
- union {
- uint8_t pamap[16];
- struct {
- uint32_t wd1;
- uint32_t wd2;
- uint32_t wd3;
- uint32_t wd4;
- } pa;
- } un;
-
- numalpa = phba->alpa_map[0];
- j = 0;
- while (j < numalpa) {
- memset(un.pamap, 0, 16);
- for (k = 1; j < numalpa; k++) {
- un.pamap[k - 1] =
- phba->alpa_map[j +
- 1];
- j++;
- if (k == 16)
- break;
- }
- /* Link Up Event ALPA map */
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_LINK_EVENT,
- "%d:1304 Link Up Event "
- "ALPA map Data: x%x "
- "x%x x%x x%x\n",
- phba->brd_no,
- un.pa.wd1, un.pa.wd2,
- un.pa.wd3, un.pa.wd4);
- }
- }
- }
- } else {
- phba->fc_myDID = phba->fc_pref_DID;
- phba->fc_flag |= FC_LBIT;
- }
-
- lpfc_linkup(phba);
- if ((mbox = mempool_alloc(phba->mbox_mem_pool, GFP_ATOMIC))) {
- lpfc_read_sparam(phba, mbox);
- mbox->mbox_cmpl = lpfc_mbx_cmpl_read_sparam;
- lpfc_sli_issue_mbox
- (phba, mbox, (MBX_NOWAIT | MBX_STOP_IOCB));
- }
-
- if ((mbox = mempool_alloc(phba->mbox_mem_pool, GFP_ATOMIC))) {
- phba->hba_state = LPFC_LOCAL_CFG_LINK;
- lpfc_config_link(phba, mbox);
- mbox->mbox_cmpl = lpfc_mbx_cmpl_config_link;
- lpfc_sli_issue_mbox
- (phba, mbox, (MBX_NOWAIT | MBX_STOP_IOCB));
- }
- } else {
- phba->fc_stat.LinkDown++;
- /* Link Down Event <eventTag> received */
- lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
- "%d:1305 Link Down Event x%x received "
- "Data: x%x x%x x%x\n",
- phba->brd_no, la->eventTag, phba->fc_eventTag,
- phba->hba_state, phba->fc_flag);
-
- lpfc_linkdown(phba);
-
- /* turn on Link Attention interrupts - no CLEAR_LA needed */
- psli->sliinit.sli_flag |= LPFC_PROCESS_LA;
- control = readl(phba->HCregaddr);
- control |= HC_LAINT_ENA;
- writel(control, phba->HCregaddr);
- readl(phba->HCregaddr); /* flush */
- }
-
- pmb->context1 = NULL;
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- mempool_free( pmb, phba->mbox_mem_pool);
- return;
-}
-
-/*
- * This routine handles processing a REG_LOGIN mailbox
- * command upon completion. It is setup in the LPFC_MBOXQ
- * as the completion routine when the command is
- * handed off to the SLI layer.
- */
-void
-lpfc_mbx_cmpl_reg_login(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- struct lpfc_sli *psli;
- MAILBOX_t *mb;
- struct lpfc_dmabuf *mp;
- struct lpfc_nodelist *ndlp;
-
- psli = &phba->sli;
- mb = &pmb->mb;
-
- ndlp = (struct lpfc_nodelist *) pmb->context2;
- mp = (struct lpfc_dmabuf *) (pmb->context1);
-
- /* The mailbox was populated by the HBA. Flush it to main store for the
- * driver. Note that all context buffers are from the driver's
- * dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, mp->phys, LPFC_BPL_SIZE,
- PCI_DMA_FROMDEVICE);
-
- pmb->context1 = NULL;
-
- /* Good status, call state machine */
- lpfc_disc_state_machine(phba, ndlp, pmb, NLP_EVT_CMPL_REG_LOGIN);
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- mempool_free( pmb, phba->mbox_mem_pool);
-
- return;
-}
-
-/*
- * This routine handles processing a Fabric REG_LOGIN mailbox
- * command upon completion. It is setup in the LPFC_MBOXQ
- * as the completion routine when the command is
- * handed off to the SLI layer.
- */
-void
-lpfc_mbx_cmpl_fabric_reg_login(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- struct lpfc_sli *psli;
- MAILBOX_t *mb;
- struct lpfc_dmabuf *mp;
- struct lpfc_nodelist *ndlp;
- struct lpfc_nodelist *ndlp_fdmi;
-
-
- psli = &phba->sli;
- mb = &pmb->mb;
-
- ndlp = (struct lpfc_nodelist *) pmb->context2;
- mp = (struct lpfc_dmabuf *) (pmb->context1);
-
- if (mb->mbxStatus) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- mempool_free( pmb, phba->mbox_mem_pool);
- mempool_free( ndlp, phba->nlp_mem_pool);
-
- /* FLOGI failed, so just use loop map to make discovery list */
- lpfc_disc_list_loopmap(phba);
-
- /* Start discovery */
- lpfc_disc_start(phba);
- return;
- }
-
- /* The mailbox was populated by the HBA. Flush it to main store for the
- * driver. Note that all context buffers are from the driver's
- * dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, mp->phys, LPFC_BPL_SIZE,
- PCI_DMA_FROMDEVICE);
-
- pmb->context1 = NULL;
-
- if (ndlp->nlp_rpi != 0)
- lpfc_findnode_remove_rpi(phba, ndlp->nlp_rpi);
- ndlp->nlp_rpi = mb->un.varWords[0];
- lpfc_addnode_rpi(phba, ndlp, ndlp->nlp_rpi);
- ndlp->nlp_type |= NLP_FABRIC;
- ndlp->nlp_state = NLP_STE_UNMAPPED_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_UNMAPPED_LIST);
-
- if (phba->hba_state == LPFC_FABRIC_CFG_LINK) {
- /* This NPort has been assigned an NPort_ID by the fabric as a
- * result of the completed fabric login. Issue a State Change
- * Registration (SCR) ELS request to the fabric controller
- * (SCR_DID) so that this NPort gets RSCN events from the
- * fabric.
- */
- lpfc_issue_els_scr(phba, SCR_DID, 0);
-
- /* Allocate a new node instance. If the pool is empty, just
- * start the discovery process and skip the Nameserver login
- * process. This is attempted again later on. Otherwise, issue
- * a Port Login (PLOGI) to the NameServer
- */
- if ((ndlp = mempool_alloc(phba->nlp_mem_pool, GFP_ATOMIC))
- == 0) {
- lpfc_disc_start(phba);
- } else {
- lpfc_nlp_init(phba, ndlp, NameServer_DID);
- ndlp->nlp_type |= NLP_FABRIC;
- ndlp->nlp_state = NLP_STE_PLOGI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PLOGI_LIST);
- lpfc_issue_els_plogi(phba, ndlp, 0);
- if (phba->cfg_fdmi_on) {
- if ((ndlp_fdmi = mempool_alloc(
- phba->nlp_mem_pool,
- GFP_ATOMIC))) {
- lpfc_nlp_init(phba, ndlp_fdmi,
- FDMI_DID);
- ndlp_fdmi->nlp_type |= NLP_FABRIC;
- ndlp_fdmi->nlp_state =
- NLP_STE_PLOGI_ISSUE;
- lpfc_issue_els_plogi(phba, ndlp_fdmi,
- 0);
- }
- }
- }
- }
-
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- mempool_free( pmb, phba->mbox_mem_pool);
-
- return;
-}
-
-/*
- * This routine handles processing a NameServer REG_LOGIN mailbox
- * command upon completion. It is setup in the LPFC_MBOXQ
- * as the completion routine when the command is
- * handed off to the SLI layer.
- */
-void
-lpfc_mbx_cmpl_ns_reg_login(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- struct lpfc_sli *psli;
- MAILBOX_t *mb;
- struct lpfc_dmabuf *mp;
- struct lpfc_nodelist *ndlp;
-
- psli = &phba->sli;
- mb = &pmb->mb;
-
- ndlp = (struct lpfc_nodelist *) pmb->context2;
- mp = (struct lpfc_dmabuf *) (pmb->context1);
-
- if (mb->mbxStatus) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- mempool_free( pmb, phba->mbox_mem_pool);
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
-
- /* RegLogin failed, so just use loop map to make discovery
- list */
- lpfc_disc_list_loopmap(phba);
-
- /* Start discovery */
- lpfc_disc_start(phba);
- return;
- }
-
- /* The mailbox was populated by the HBA. Flush it to main store for the
- * driver. Note that all context buffers are from the driver's
- * dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, mp->phys, LPFC_BPL_SIZE,
- PCI_DMA_FROMDEVICE);
-
- pmb->context1 = NULL;
-
- if (ndlp->nlp_rpi != 0)
- lpfc_findnode_remove_rpi(phba, ndlp->nlp_rpi);
- ndlp->nlp_rpi = mb->un.varWords[0];
- lpfc_addnode_rpi(phba, ndlp, ndlp->nlp_rpi);
- ndlp->nlp_type |= NLP_FABRIC;
- ndlp->nlp_state = NLP_STE_UNMAPPED_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_UNMAPPED_LIST);
-
- if (phba->hba_state < LPFC_HBA_READY) {
- /* Link up discovery requires Fabrib registration. */
- lpfc_ns_cmd(phba, ndlp, SLI_CTNS_RNN_ID);
- lpfc_ns_cmd(phba, ndlp, SLI_CTNS_RSNN_NN);
- lpfc_ns_cmd(phba, ndlp, SLI_CTNS_RFT_ID);
- }
-
- phba->fc_ns_retry = 0;
- /* Good status, issue CT Request to NameServer */
- if (lpfc_ns_cmd(phba, ndlp, SLI_CTNS_GID_FT)) {
- /* Cannot issue NameServer Query, so finish up discovery */
- lpfc_disc_start(phba);
- }
-
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- mempool_free( pmb, phba->mbox_mem_pool);
-
- return;
-}
-
-/* Put blp on the bind list */
-int
-lpfc_consistent_bind_save(struct lpfc_hba * phba, struct lpfc_bindlist * blp)
-{
- /* Put it at the end of the bind list */
- list_add_tail(&blp->nlp_listp, &phba->fc_nlpbind_list);
- phba->fc_bind_cnt++;
-
- /* Add scsiid <sid> to BIND list */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0903 Add scsiid %d to BIND list "
- "Data: x%x x%x x%x x%p\n",
- phba->brd_no, blp->nlp_sid, phba->fc_bind_cnt,
- blp->nlp_DID, blp->nlp_bind_type, blp);
-
- return (0);
-}
-
-int
-lpfc_nlp_list(struct lpfc_hba * phba, struct lpfc_nodelist * nlp, int list)
-{
- struct lpfc_bindlist *blp;
- struct lpfc_target *targetp;
- struct lpfc_sli *psli;
- psli = &phba->sli;
-
- /* Sanity check to ensure we are not moving to / from the same list */
- if((nlp->nlp_flag & NLP_LIST_MASK) == list) {
- if(list != NLP_NO_LIST)
- return(0);
- }
-
- blp = nlp->nlp_listp_bind;
-
- switch(nlp->nlp_flag & NLP_LIST_MASK) {
- case NLP_NO_LIST: /* Not on any list */
- break;
- case NLP_UNUSED_LIST:
- phba->fc_unused_cnt--;
- list_del(&nlp->nlp_listp);
- nlp->nlp_flag &= ~NLP_LIST_MASK;
- break;
- case NLP_PLOGI_LIST:
- phba->fc_plogi_cnt--;
- list_del(&nlp->nlp_listp);
- nlp->nlp_flag &= ~NLP_LIST_MASK;
- break;
- case NLP_ADISC_LIST:
- phba->fc_adisc_cnt--;
- list_del(&nlp->nlp_listp);
- nlp->nlp_flag &= ~NLP_LIST_MASK;
- break;
- case NLP_REGLOGIN_LIST:
- phba->fc_reglogin_cnt--;
- list_del(&nlp->nlp_listp);
- nlp->nlp_flag &= ~NLP_LIST_MASK;
- break;
- case NLP_PRLI_LIST:
- phba->fc_prli_cnt--;
- list_del(&nlp->nlp_listp);
- nlp->nlp_flag &= ~NLP_LIST_MASK;
- break;
- case NLP_UNMAPPED_LIST:
- phba->fc_unmap_cnt--;
- list_del(&nlp->nlp_listp);
- nlp->nlp_flag &= ~NLP_LIST_MASK;
- nlp->nlp_flag &= ~NLP_TGT_NO_SCSIID;
- nlp->nlp_type &= ~NLP_FC_NODE;
- phba->nport_event_cnt++;
- break;
- case NLP_MAPPED_LIST:
- phba->fc_map_cnt--;
- list_del(&nlp->nlp_listp);
- nlp->nlp_flag &= ~NLP_LIST_MASK;
- phba->nport_event_cnt++;
- lpfc_set_failmask(phba, nlp, LPFC_DEV_DISAPPEARED,
- LPFC_SET_BITMASK);
- nlp->nlp_type &= ~NLP_FCP_TARGET;
- targetp = nlp->nlp_Target;
- if (targetp && (list != NLP_MAPPED_LIST)) {
- nlp->nlp_Target = NULL;
-#if defined(FC_TRANS_VER1) || defined(FC_TRANS_265_BLKPATCH)
- /*
- * Do not block the target if the driver has just reset
- * its interface to the hardware.
- */
- if (phba->hba_state != LPFC_INIT_START)
- lpfc_target_block(phba, targetp);
-#endif
- }
-
- break;
- case NLP_NPR_LIST:
- phba->fc_npr_cnt--;
- list_del(&nlp->nlp_listp);
- nlp->nlp_flag &= ~NLP_LIST_MASK;
- /* Stop delay tmo if taking node off NPR list */
- if ((nlp->nlp_flag & NLP_DELAY_TMO) &&
- (list != NLP_NPR_LIST)) {
- nlp->nlp_flag &= ~NLP_DELAY_TMO;
- del_timer_sync(&nlp->nlp_delayfunc);
- }
- break;
- }
-
- /* Add NPort <did> to <num> list */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_NODE,
- "%d:0904 Add NPort x%x to %d list Data: x%x x%p\n",
- phba->brd_no,
- nlp->nlp_DID, list, nlp->nlp_flag, blp);
-
- nlp->nlp_listp_bind = NULL;
-
- switch(list) {
- case NLP_NO_LIST: /* No list, just remove it */
- lpfc_nlp_remove(phba, nlp);
- break;
- case NLP_UNUSED_LIST:
- nlp->nlp_flag |= list;
- /* Put it at the end of the unused list */
- list_add_tail(&nlp->nlp_listp, &phba->fc_unused_list);
- phba->fc_unused_cnt++;
- break;
- case NLP_PLOGI_LIST:
- nlp->nlp_flag |= list;
- /* Put it at the end of the plogi list */
- list_add_tail(&nlp->nlp_listp, &phba->fc_plogi_list);
- phba->fc_plogi_cnt++;
- break;
- case NLP_ADISC_LIST:
- nlp->nlp_flag |= list;
- /* Put it at the end of the adisc list */
- list_add_tail(&nlp->nlp_listp, &phba->fc_adisc_list);
- phba->fc_adisc_cnt++;
- break;
- case NLP_REGLOGIN_LIST:
- nlp->nlp_flag |= list;
- /* Put it at the end of the reglogin list */
- list_add_tail(&nlp->nlp_listp, &phba->fc_reglogin_list);
- phba->fc_reglogin_cnt++;
- break;
- case NLP_PRLI_LIST:
- nlp->nlp_flag |= list;
- /* Put it at the end of the prli list */
- list_add_tail(&nlp->nlp_listp, &phba->fc_prli_list);
- phba->fc_prli_cnt++;
- break;
- case NLP_UNMAPPED_LIST:
- nlp->nlp_flag |= list;
- /* Put it at the end of the unmap list */
- list_add_tail(&nlp->nlp_listp, &phba->fc_nlpunmap_list);
- phba->fc_unmap_cnt++;
- phba->nport_event_cnt++;
- /* stop nodev tmo if running */
- if (nlp->nlp_flag & NLP_NODEV_TMO) {
- del_timer_sync(&nlp->nlp_tmofunc);
- }
- nlp->nlp_flag &= ~NLP_NODEV_TMO;
- nlp->nlp_type |= NLP_FC_NODE;
- lpfc_set_failmask(phba, nlp, LPFC_DEV_DISCOVERY_INP,
- LPFC_CLR_BITMASK);
- break;
- case NLP_MAPPED_LIST:
- nlp->nlp_flag |= list;
- /* Put it at the end of the map list */
- list_add_tail(&nlp->nlp_listp, &phba->fc_nlpmap_list);
- phba->fc_map_cnt++;
- phba->nport_event_cnt++;
- /* stop nodev tmo if running */
- if (nlp->nlp_flag & NLP_NODEV_TMO) {
- del_timer_sync(&nlp->nlp_tmofunc);
- }
- nlp->nlp_flag &= ~NLP_NODEV_TMO;
- nlp->nlp_type |= NLP_FCP_TARGET;
- lpfc_set_failmask(phba, nlp, LPFC_DEV_DISAPPEARED,
- LPFC_CLR_BITMASK);
- lpfc_set_failmask(phba, nlp, LPFC_DEV_DISCOVERY_INP,
- LPFC_CLR_BITMASK);
-
- targetp = phba->device_queue_hash[nlp->nlp_sid];
- if (targetp && targetp->pnode) {
- nlp->nlp_Target = targetp;
-#if defined(FC_TRANS_VER1) || defined(FC_TRANS_265_BLKPATCH)
- /* Unblock I/Os on target */
- if(targetp->blocked)
- lpfc_target_unblock(phba, targetp);
-#endif
- }
- break;
- case NLP_NPR_LIST:
- nlp->nlp_flag |= list;
- /* Put it at the end of the npr list */
- list_add_tail(&nlp->nlp_listp, &phba->fc_npr_list);
- phba->fc_npr_cnt++;
-
- /*
- * Sanity check for Fabric entity.
- * Set nodev_tmo for NPR state, for Fabric use 1 sec.
- */
- if (nlp->nlp_type & NLP_FABRIC) {
- mod_timer(&nlp->nlp_tmofunc, jiffies + HZ);
- }
- else {
- mod_timer(&nlp->nlp_tmofunc,
- jiffies + HZ * phba->cfg_nodev_tmo);
- }
- nlp->nlp_flag |= NLP_NODEV_TMO;
- nlp->nlp_flag &= ~NLP_RCV_PLOGI;
- break;
- case NLP_JUST_DQ:
- break;
- }
-
- if (blp) {
- nlp->nlp_sid = 0;
- nlp->nlp_flag &= ~NLP_SEED_MASK;
- nlp->nlp_Target = NULL;
- lpfc_consistent_bind_save(phba, blp);
- }
- return (0);
-}
-
-/*
- * Start / ReStart rescue timer for Discovery / RSCN handling
- */
-void
-lpfc_set_disctmo(struct lpfc_hba * phba)
-{
- uint32_t tmo;
-
- tmo = ((phba->fc_ratov * 2) + 1);
-
- mod_timer(&phba->fc_disctmo, jiffies + HZ * tmo);
- phba->fc_flag |= FC_DISC_TMO;
-
- /* Start Discovery Timer state <hba_state> */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0247 Start Discovery Timer state x%x "
- "Data: x%x x%lx x%x x%x\n",
- phba->brd_no,
- phba->hba_state, tmo, (unsigned long)&phba->fc_disctmo,
- phba->fc_plogi_cnt, phba->fc_adisc_cnt);
-
- return;
-}
-
-/*
- * Cancel rescue timer for Discovery / RSCN handling
- */
-int
-lpfc_can_disctmo(struct lpfc_hba * phba)
-{
- /* Turn off discovery timer if its running */
- if(phba->fc_flag & FC_DISC_TMO) {
- del_timer_sync(&phba->fc_disctmo);
- }
- phba->fc_flag &= ~FC_DISC_TMO;
-
- /* Cancel Discovery Timer state <hba_state> */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0248 Cancel Discovery Timer state x%x "
- "Data: x%x x%x x%x\n",
- phba->brd_no, phba->hba_state, phba->fc_flag,
- phba->fc_plogi_cnt, phba->fc_adisc_cnt);
-
- return (0);
-}
-
-/*
- * Check specified ring for outstanding IOCB on the SLI queue
- * Return true if iocb matches the specified nport
- */
-int
-lpfc_check_sli_ndlp(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring,
- struct lpfc_iocbq * iocb, struct lpfc_nodelist * ndlp)
-{
- struct lpfc_sli *psli;
- IOCB_t *icmd;
-
- psli = &phba->sli;
- icmd = &iocb->iocb;
- if (pring->ringno == LPFC_ELS_RING) {
- switch (icmd->ulpCommand) {
- case CMD_GEN_REQUEST64_CR:
- if (icmd->ulpContext == (volatile ushort)ndlp->nlp_rpi)
- return (1);
- case CMD_ELS_REQUEST64_CR:
- case CMD_XMIT_ELS_RSP64_CX:
- if (iocb->context1 == (uint8_t *) ndlp)
- return (1);
- }
- } else if (pring->ringno == psli->ip_ring) {
-
- } else if (pring->ringno == psli->fcp_ring) {
- /* Skip match check if waiting to relogin to FCP target */
- if ((ndlp->nlp_type & NLP_FCP_TARGET) &&
- (ndlp->nlp_flag & NLP_DELAY_TMO)) {
- return (0);
- }
- if (icmd->ulpContext == (volatile ushort)ndlp->nlp_rpi) {
- return (1);
- }
- } else if (pring->ringno == psli->next_ring) {
-
- }
- return (0);
-}
-
-/*
- * Free resources / clean up outstanding I/Os
- * associated with nlp_rpi in the LPFC_NODELIST entry.
- */
-static int
-lpfc_no_rpi(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp)
-{
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- struct lpfc_iocbq *iocb, *next_iocb;
- IOCB_t *icmd;
- uint32_t rpi, i;
-
- psli = &phba->sli;
- rpi = ndlp->nlp_rpi;
- if (rpi) {
- /* Now process each ring */
- for (i = 0; i < psli->sliinit.num_rings; i++) {
- pring = &psli->ring[i];
-
- list_for_each_entry_safe(iocb, next_iocb, &pring->txq,
- list) {
- /*
- * Check to see if iocb matches the nport we are
- * looking for
- */
- if ((lpfc_check_sli_ndlp
- (phba, pring, iocb, ndlp))) {
- /* It matches, so deque and call compl
- with an error */
- list_del(&iocb->list);
- pring->txq_cnt--;
- if (iocb->iocb_cmpl) {
- icmd = &iocb->iocb;
- icmd->ulpStatus =
- IOSTAT_LOCAL_REJECT;
- icmd->un.ulpWord[4] =
- IOERR_SLI_ABORTED;
- (iocb->iocb_cmpl) (phba,
- iocb, iocb);
- } else {
- mempool_free(iocb,
- phba->iocb_mem_pool);
- }
- }
- }
- /* Everything that matches on txcmplq will be returned
- * by firmware with a no rpi error.
- */
- }
- }
- return (0);
-}
-
-/*
- * Free rpi associated with LPFC_NODELIST entry.
- * This routine is called from lpfc_freenode(), when we are removing
- * a LPFC_NODELIST entry. It is also called if the driver initiates a
- * LOGO that completes successfully, and we are waiting to PLOGI back
- * to the remote NPort. In addition, it is called after we receive
- * and unsolicated ELS cmd, send back a rsp, the rsp completes and
- * we are waiting to PLOGI back to the remote NPort.
- */
-int
-lpfc_unreg_rpi(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp)
-{
- LPFC_MBOXQ_t *mbox;
-
- if (ndlp->nlp_rpi) {
- if ((mbox = mempool_alloc(phba->mbox_mem_pool, GFP_ATOMIC))) {
- lpfc_unreg_login(phba, ndlp->nlp_rpi, mbox);
- if (lpfc_sli_issue_mbox
- (phba, mbox, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free( mbox, phba->mbox_mem_pool);
- }
- }
- lpfc_findnode_remove_rpi(phba, ndlp->nlp_rpi);
- lpfc_no_rpi(phba, ndlp);
- ndlp->nlp_rpi = 0;
- lpfc_set_failmask(phba, ndlp, LPFC_DEV_DISCONNECTED,
- LPFC_SET_BITMASK);
- return 1;
- }
- return 0;
-}
-
-/*
- * Free resources associated with LPFC_NODELIST entry
- * so it can be freed.
- */
-static int
-lpfc_freenode(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp)
-{
- struct lpfc_target *targetp;
- struct lpfc_sli *psli;
- int scsid;
-
- /* The psli variable gets rid of the long pointer deference. */
- psli = &phba->sli;
-
- /* Cleanup node for NPort <nlp_DID> */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0900 Cleanup node for NPort x%x "
- "Data: x%x x%x x%x\n",
- phba->brd_no, ndlp->nlp_DID, ndlp->nlp_flag,
- ndlp->nlp_state, ndlp->nlp_rpi);
-
- lpfc_nlp_list(phba, ndlp, NLP_JUST_DQ);
-
- if(ndlp->nlp_flag & NLP_NODEV_TMO) {
- del_timer_sync(&ndlp->nlp_tmofunc);
- }
- ndlp->nlp_flag &= ~NLP_NODEV_TMO;
-
- if(ndlp->nlp_flag & NLP_DELAY_TMO) {
- del_timer_sync(&ndlp->nlp_delayfunc);
- }
- ndlp->nlp_flag &= ~NLP_DELAY_TMO;
-
- lpfc_unreg_rpi(phba, ndlp);
-
- for(scsid=0;scsid<MAX_FCP_TARGET;scsid++) {
- targetp = phba->device_queue_hash[scsid];
- /* First see if the SCSI ID has an allocated struct
- lpfc_target */
- if (targetp) {
- if (targetp->pnode == ndlp) {
- targetp->pnode = NULL;
- ndlp->nlp_Target = NULL;
-#ifdef FC_TRANS_VER1
- /*
- * This code does not apply to SLES9 since there
- * is no starget defined in the midlayer.
- * Additionally, dynamic target discovery to the
- * midlayer is not supported yet.
- */
- if (targetp->starget) {
- /* Remove SCSI target / SCSI Hotplug */
- lpfc_target_remove(phba, targetp);
- }
-#endif
- break;
- }
- }
- }
- return (0);
-}
-
-/*
- * Check to see if we can free the nlp back to the freelist.
- * If we are in the middle of using the nlp in the discovery state
- * machine, defer the free till we reach the end of the state machine.
- */
-int
-lpfc_nlp_remove(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp)
-{
- if(ndlp->nlp_flag & NLP_NODEV_TMO) {
- del_timer_sync(&ndlp->nlp_tmofunc);
- }
- ndlp->nlp_flag &= ~NLP_NODEV_TMO;
-
- if(ndlp->nlp_flag & NLP_DELAY_TMO) {
- del_timer_sync(&ndlp->nlp_delayfunc);
- }
- ndlp->nlp_flag &= ~NLP_DELAY_TMO;
-
- if (ndlp->nlp_disc_refcnt) {
- ndlp->nlp_flag |= NLP_DELAY_REMOVE;
- }
- else {
- lpfc_freenode(phba, ndlp);
- mempool_free( ndlp, phba->nlp_mem_pool);
- }
- return(0);
-}
-
-static int
-lpfc_matchdid(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp, uint32_t did)
-{
- D_ID mydid;
- D_ID ndlpdid;
- D_ID matchdid;
-
- if (did == Bcast_DID)
- return (0);
-
- if (ndlp->nlp_DID == 0) {
- return (0);
- }
-
- /* First check for Direct match */
- if (ndlp->nlp_DID == did)
- return (1);
-
- /* Next check for area/domain identically equals 0 match */
- mydid.un.word = phba->fc_myDID;
- if ((mydid.un.b.domain == 0) && (mydid.un.b.area == 0)) {
- return (0);
- }
-
- matchdid.un.word = did;
- ndlpdid.un.word = ndlp->nlp_DID;
- if (matchdid.un.b.id == ndlpdid.un.b.id) {
- if ((mydid.un.b.domain == matchdid.un.b.domain) &&
- (mydid.un.b.area == matchdid.un.b.area)) {
- if ((ndlpdid.un.b.domain == 0) &&
- (ndlpdid.un.b.area == 0)) {
- if (ndlpdid.un.b.id)
- return (1);
- }
- return (0);
- }
-
- matchdid.un.word = ndlp->nlp_DID;
- if ((mydid.un.b.domain == ndlpdid.un.b.domain) &&
- (mydid.un.b.area == ndlpdid.un.b.area)) {
- if ((matchdid.un.b.domain == 0) &&
- (matchdid.un.b.area == 0)) {
- if (matchdid.un.b.id)
- return (1);
- }
- }
- }
- return (0);
-}
-
-/* Search for a nodelist entry on a specific list */
-struct lpfc_nodelist *
-lpfc_findnode_wwpn(struct lpfc_hba * phba, uint32_t order,
- struct lpfc_name * wwpn)
-{
- struct lpfc_nodelist *ndlp, *next_ndlp;
- uint32_t data1;
-
- if (order & NLP_SEARCH_UNMAPPED) {
- list_for_each_entry_safe(ndlp, next_ndlp,
- &phba->fc_nlpunmap_list, nlp_listp) {
- if (memcmp(&ndlp->nlp_portname, wwpn,
- sizeof(struct lpfc_name)) == 0) {
-
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* FIND node DID unmapped */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_NODE,
- "%d:0911 FIND node DID unmapped"
- " Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- if (order & NLP_SEARCH_MAPPED) {
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
- nlp_listp) {
- if (memcmp(&ndlp->nlp_portname, wwpn,
- sizeof(struct lpfc_name)) == 0) {
-
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* FIND node DID mapped */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0901 FIND node DID mapped "
- "Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- /* no match found */
- return ((struct lpfc_nodelist *) 0);
-}
-/* Search for a nodelist entry on a specific list */
-struct lpfc_nodelist *
-lpfc_findnode_wwnn(struct lpfc_hba * phba, uint32_t order,
- struct lpfc_name * wwnn)
-{
- struct lpfc_nodelist *ndlp, *next_ndlp;
- uint32_t data1;
-
- if (order & NLP_SEARCH_UNMAPPED) {
- list_for_each_entry_safe(ndlp, next_ndlp,
- &phba->fc_nlpunmap_list, nlp_listp) {
- if (memcmp(&ndlp->nlp_nodename, wwnn,
- sizeof(struct lpfc_name)) == 0) {
-
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* FIND node DID unmapped */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0910 FIND node DID unmapped"
- "Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- if (order & NLP_SEARCH_MAPPED) {
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
- nlp_listp) {
- if (memcmp(&ndlp->nlp_nodename, wwnn,
- sizeof(struct lpfc_name)) == 0) {
-
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* FIND node did mapped */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0902 FIND node DID mapped "
- "Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- /* no match found */
- return ((struct lpfc_nodelist *) 0);
-}
-/* Search for a nodelist entry on a specific list */
-struct lpfc_nodelist *
-lpfc_findnode_did(struct lpfc_hba * phba, uint32_t order, uint32_t did)
-{
- struct lpfc_nodelist *ndlp, *next_ndlp;
- uint32_t data1;
-
- if (order & NLP_SEARCH_UNMAPPED) {
- list_for_each_entry_safe(ndlp, next_ndlp,
- &phba->fc_nlpunmap_list, nlp_listp) {
- if (lpfc_matchdid(phba, ndlp, did)) {
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* FIND node DID unmapped */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0929 FIND node DID unmapped"
- " Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- if (order & NLP_SEARCH_MAPPED) {
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
- nlp_listp) {
- if (lpfc_matchdid(phba, ndlp, did)) {
-
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* FIND node DID mapped */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0930 FIND node DID mapped "
- "Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- if (order & NLP_SEARCH_PLOGI) {
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list,
- nlp_listp) {
- if (lpfc_matchdid(phba, ndlp, did)) {
-
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* LOG change to PLOGI */
- /* FIND node DID plogi */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0908 FIND node DID plogi "
- "Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- if (order & NLP_SEARCH_ADISC) {
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
- nlp_listp) {
- if (lpfc_matchdid(phba, ndlp, did)) {
-
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* LOG change to ADISC */
- /* FIND node DID adisc */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0931 FIND node DID adisc "
- "Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- if (order & NLP_SEARCH_REGLOGIN) {
- list_for_each_entry_safe(ndlp, next_ndlp,
- &phba->fc_reglogin_list, nlp_listp) {
- if (lpfc_matchdid(phba, ndlp, did)) {
-
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* LOG change to REGLOGIN */
- /* FIND node DID reglogin */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0931 FIND node DID reglogin"
- " Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- if (order & NLP_SEARCH_PRLI) {
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list,
- nlp_listp) {
- if (lpfc_matchdid(phba, ndlp, did)) {
-
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* LOG change to PRLI */
- /* FIND node DID prli */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0931 FIND node DID prli "
- "Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- if (order & NLP_SEARCH_NPR) {
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
- nlp_listp) {
- if (lpfc_matchdid(phba, ndlp, did)) {
-
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* LOG change to NPR */
- /* FIND node DID npr */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0931 FIND node DID npr "
- "Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- if (order & NLP_SEARCH_UNUSED) {
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
- nlp_listp) {
- if (lpfc_matchdid(phba, ndlp, did)) {
-
- data1 = (((uint32_t) ndlp->nlp_state << 24) |
- ((uint32_t) ndlp->nlp_xri << 16) |
- ((uint32_t) ndlp->nlp_type << 8) |
- ((uint32_t) ndlp->nlp_rpi & 0xff));
- /* LOG change to UNUSED */
- /* FIND node DID unused */
- lpfc_printf_log(phba, KERN_INFO, LOG_NODE,
- "%d:0931 FIND node DID unused "
- "Data: x%p x%x x%x x%x\n",
- phba->brd_no,
- ndlp, ndlp->nlp_DID,
- ndlp->nlp_flag, data1);
- return (ndlp);
- }
- }
- }
-
- /* FIND node did <did> NOT FOUND */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_NODE,
- "%d:0932 FIND node did x%x NOT FOUND Data: x%x\n",
- phba->brd_no, did, order);
-
- /* no match found */
- return ((struct lpfc_nodelist *) 0);
-}
-
-struct lpfc_nodelist *
-lpfc_setup_disc_node(struct lpfc_hba * phba, uint32_t did)
-{
- struct lpfc_nodelist *ndlp;
- uint32_t flg;
-
- if((ndlp = lpfc_findnode_did(phba, NLP_SEARCH_ALL, did)) == 0) {
- if ((phba->hba_state == LPFC_HBA_READY) &&
- ((lpfc_rscn_payload_check(phba, did) == 0)))
- return NULL;
- ndlp = (struct lpfc_nodelist *)
- mempool_alloc(phba->nlp_mem_pool, GFP_ATOMIC);
- if (!ndlp)
- return NULL;
- lpfc_nlp_init(phba, ndlp, did);
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- ndlp->nlp_flag |= NLP_NPR_2B_DISC;
- return ndlp;
- }
- if ((phba->hba_state == LPFC_HBA_READY) &&
- (phba->fc_flag & FC_RSCN_MODE)) {
- if(lpfc_rscn_payload_check(phba, did)) {
- ndlp->nlp_flag |= NLP_NPR_2B_DISC;
- }
- else {
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
- ndlp = NULL;
- }
- }
- else {
- flg = ndlp->nlp_flag & NLP_LIST_MASK;
- if ((flg == NLP_ADISC_LIST) ||
- (flg == NLP_PLOGI_LIST)) {
- return NULL;
- }
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- ndlp->nlp_flag |= NLP_NPR_2B_DISC;
- }
- return ndlp;
-}
-
-/* Build a list of nodes to discover based on the loopmap */
-void
-lpfc_disc_list_loopmap(struct lpfc_hba * phba)
-{
- int j;
- uint32_t alpa, index;
-
- if (phba->hba_state <= LPFC_LINK_DOWN) {
- return;
- }
- if (phba->fc_topology != TOPOLOGY_LOOP) {
- return;
- }
-
- /* Check for loop map present or not */
- if (phba->alpa_map[0]) {
- for (j = 1; j <= phba->alpa_map[0]; j++) {
- alpa = phba->alpa_map[j];
-
- if (((phba->fc_myDID & 0xff) == alpa) || (alpa == 0)) {
- continue;
- }
- lpfc_setup_disc_node(phba, alpa);
- }
- } else {
- /* No alpamap, so try all alpa's */
- for (j = 0; j < FC_MAXLOOP; j++) {
- /* If cfg_scan_down is set, start from highest
- * ALPA (0xef) to lowest (0x1).
- */
- if (phba->cfg_scan_down)
- index = j;
- else
- index = FC_MAXLOOP - j - 1;
- alpa = lpfcAlpaArray[index];
- if ((phba->fc_myDID & 0xff) == alpa) {
- continue;
- }
-
- lpfc_setup_disc_node(phba, alpa);
- }
- }
- return;
-}
-
-/* Start Link up / RSCN discovery on NPR list */
-void
-lpfc_disc_start(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- LPFC_MBOXQ_t *mbox;
- struct lpfc_nodelist *ndlp, *next_ndlp;
- uint32_t did_changed, num_sent;
- uint32_t clear_la_pending;
-
- psli = &phba->sli;
-
- if (phba->hba_state <= LPFC_LINK_DOWN) {
- return;
- }
- if (phba->hba_state == LPFC_CLEAR_LA)
- clear_la_pending = 1;
- else
- clear_la_pending = 0;
-
- if (phba->hba_state < LPFC_HBA_READY) {
- phba->hba_state = LPFC_DISC_AUTH;
- }
- lpfc_set_disctmo(phba);
-
- if (phba->fc_prevDID == phba->fc_myDID) {
- did_changed = 0;
- } else {
- did_changed = 1;
- }
- phba->fc_prevDID = phba->fc_myDID;
- phba->num_disc_nodes = 0;
-
- /* Start Discovery state <hba_state> */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0202 Start Discovery hba state x%x "
- "Data: x%x x%x x%x\n",
- phba->brd_no, phba->hba_state, phba->fc_flag,
- phba->fc_plogi_cnt, phba->fc_adisc_cnt);
-
- /* If our did changed, we MUST do PLOGI */
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
- nlp_listp) {
- if(ndlp->nlp_flag & NLP_NPR_2B_DISC) {
- if(did_changed)
- ndlp->nlp_flag &= ~NLP_NPR_ADISC;
- }
- }
-
- /* First do ADISCs - if any */
- num_sent = lpfc_els_disc_adisc(phba);
-
- if(num_sent)
- return;
-
- if ((phba->hba_state < LPFC_HBA_READY) && (!clear_la_pending)) {
- /* If we get here, there is nothing to ADISC */
- if ((mbox = mempool_alloc(phba->mbox_mem_pool, GFP_ATOMIC))) {
- phba->hba_state = LPFC_CLEAR_LA;
- lpfc_clear_la(phba, mbox);
- mbox->mbox_cmpl = lpfc_mbx_cmpl_clear_la;
- if (lpfc_sli_issue_mbox
- (phba, mbox, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free( mbox, phba->mbox_mem_pool);
- lpfc_disc_flush_list(phba);
- psli->ring[(psli->ip_ring)].flag &=
- ~LPFC_STOP_IOCB_EVENT;
- psli->ring[(psli->fcp_ring)].flag &=
- ~LPFC_STOP_IOCB_EVENT;
- psli->ring[(psli->next_ring)].flag &=
- ~LPFC_STOP_IOCB_EVENT;
- phba->hba_state = LPFC_HBA_READY;
- }
- }
- } else {
- /* Next do PLOGIs - if any */
- num_sent = lpfc_els_disc_plogi(phba);
-
- if(num_sent)
- return;
-
- if (phba->fc_flag & FC_RSCN_MODE) {
- /* Check to see if more RSCNs came in while we
- * were processing this one.
- */
- if ((phba->fc_rscn_id_cnt == 0) &&
- (!(phba->fc_flag & FC_RSCN_DISCOVERY))) {
- lpfc_els_flush_rscn(phba);
- } else {
- lpfc_els_handle_rscn(phba);
- }
- }
- }
- return;
-}
-
-/*
- * Ignore completion for all IOCBs on tx and txcmpl queue for ELS
- * ring the match the sppecified nodelist.
- */
-static void
-lpfc_free_tx(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp)
-{
- struct lpfc_sli *psli;
- IOCB_t *icmd;
- struct lpfc_iocbq *iocb, *next_iocb;
- struct lpfc_sli_ring *pring;
- struct lpfc_dmabuf *mp;
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING];
-
- /* Error matching iocb on txq or txcmplq
- * First check the txq.
- */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
- if (iocb->context1 != ndlp) {
- continue;
- }
- icmd = &iocb->iocb;
- if ((icmd->ulpCommand == CMD_ELS_REQUEST64_CR) ||
- (icmd->ulpCommand == CMD_XMIT_ELS_RSP64_CX)) {
-
- list_del(&iocb->list);
- pring->txq_cnt--;
- lpfc_els_free_iocb(phba, iocb);
- }
- }
-
- /* Next check the txcmplq */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
- if (iocb->context1 != ndlp) {
- continue;
- }
- icmd = &iocb->iocb;
- if ((icmd->ulpCommand == CMD_ELS_REQUEST64_CR) ||
- (icmd->ulpCommand == CMD_XMIT_ELS_RSP64_CX)) {
-
- iocb->iocb_cmpl = NULL;
- /* context2 = cmd, context2->next = rsp, context3 =
- bpl */
- if (iocb->context2) {
- /* Free the response IOCB before handling the
- command. */
-
- mp = (struct lpfc_dmabuf *)
- (((struct lpfc_dmabuf *) (iocb->context2))
- ->list.next);
- if (mp) {
- /* Delay before releasing rsp buffer to
- * give UNREG mbox a chance to take
- * effect.
- */
- list_add(&mp->list,
- &phba->freebufList);
- }
- lpfc_mbuf_free(phba,
- ((struct lpfc_dmabuf *)
- iocb->context2)->virt,
- ((struct lpfc_dmabuf *)
- iocb->context2)->phys);
- kfree(iocb->context2);
- }
-
- if (iocb->context3) {
- lpfc_mbuf_free(phba,
- ((struct lpfc_dmabuf *)
- iocb->context3)->virt,
- ((struct lpfc_dmabuf *)
- iocb->context3)->phys);
- kfree(iocb->context3);
- }
- }
- }
-
- return;
-}
-
-void
-lpfc_disc_flush_list(struct lpfc_hba * phba)
-{
- struct lpfc_nodelist *ndlp, *next_ndlp;
-
- if (phba->fc_plogi_cnt) {
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list,
- nlp_listp) {
- lpfc_set_failmask(phba, ndlp, LPFC_DEV_DISCONNECTED,
- LPFC_SET_BITMASK);
- lpfc_free_tx(phba, ndlp);
- lpfc_nlp_remove(phba, ndlp);
- }
- }
- if (phba->fc_adisc_cnt) {
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
- nlp_listp) {
- lpfc_set_failmask(phba, ndlp, LPFC_DEV_DISCONNECTED,
- LPFC_SET_BITMASK);
- lpfc_free_tx(phba, ndlp);
- lpfc_nlp_remove(phba, ndlp);
- }
- }
- return;
-}
-
-/*****************************************************************************/
-/*
- * NAME: lpfc_disc_timeout
- *
- * FUNCTION: Fibre Channel driver discovery timeout routine.
- *
- * EXECUTION ENVIRONMENT: interrupt only
- *
- * CALLED FROM:
- * Timer function
- *
- * RETURNS:
- * none
- */
-/*****************************************************************************/
-void
-lpfc_disc_timeout(unsigned long ptr)
-{
- struct lpfc_hba *phba;
- struct lpfc_sli *psli;
- struct lpfc_nodelist *ndlp;
- LPFC_MBOXQ_t *mbox;
- unsigned long iflag;
-
- phba = (struct lpfc_hba *)ptr;
- if (!phba) {
- return;
- }
- spin_lock_irqsave(phba->host->host_lock, iflag);
-
- psli = &phba->sli;
- phba->fc_flag &= ~FC_DISC_TMO;
-
- /* hba_state is identically LPFC_LOCAL_CFG_LINK while waiting for FAN */
- if (phba->hba_state == LPFC_LOCAL_CFG_LINK) {
- /* FAN timeout */
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_DISCOVERY,
- "%d:0221 FAN timeout\n",
- phba->brd_no);
-
- /* Forget about FAN, Start discovery by sending a FLOGI
- * hba_state is identically LPFC_FLOGI while waiting for FLOGI
- * cmpl
- */
- phba->hba_state = LPFC_FLOGI;
- lpfc_set_disctmo(phba);
- lpfc_initial_flogi(phba);
- goto out;
- }
-
- /* hba_state is identically LPFC_FLOGI while waiting for FLOGI cmpl */
- if (phba->hba_state == LPFC_FLOGI) {
- /* Initial FLOGI timeout */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_DISCOVERY,
- "%d:0222 Initial FLOGI timeout\n",
- phba->brd_no);
-
- /* Assume no Fabric and go on with discovery.
- * Check for outstanding ELS FLOGI to abort.
- */
-
- /* FLOGI failed, so just use loop map to make discovery list */
- lpfc_disc_list_loopmap(phba);
-
- /* Start discovery */
- lpfc_disc_start(phba);
- goto out;
- }
-
- /* hba_state is identically LPFC_FABRIC_CFG_LINK while waiting for
- NameServer login */
- if (phba->hba_state == LPFC_FABRIC_CFG_LINK) {
- /* Timeout while waiting for NameServer login */
- lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY,
- "%d:0223 Timeout while waiting for NameServer "
- "login\n", phba->brd_no);
-
- /* Next look for NameServer ndlp */
- if ((ndlp = lpfc_findnode_did(phba,
- NLP_SEARCH_ALL, NameServer_DID))) {
- lpfc_nlp_remove(phba, ndlp);
- }
- /* Start discovery */
- lpfc_disc_start(phba);
- goto out;
- }
-
- /* Check for wait for NameServer Rsp timeout */
- if (phba->hba_state == LPFC_NS_QRY) {
- /* NameServer Query timeout */
- lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY,
- "%d:0224 NameServer Query timeout "
- "Data: x%x x%x\n",
- phba->brd_no,
- phba->fc_ns_retry, LPFC_MAX_NS_RETRY);
-
- if ((ndlp =
- lpfc_findnode_did(phba, NLP_SEARCH_UNMAPPED,
- NameServer_DID))) {
- if (phba->fc_ns_retry < LPFC_MAX_NS_RETRY) {
- /* Try it one more time */
- if (lpfc_ns_cmd(phba, ndlp, SLI_CTNS_GID_FT) ==
- 0) {
- goto out;
- }
- }
- phba->fc_ns_retry = 0;
- }
-
- /* Nothing to authenticate, so CLEAR_LA right now */
- if (phba->hba_state != LPFC_CLEAR_LA) {
- if ((mbox = mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC))) {
- phba->hba_state = LPFC_CLEAR_LA;
- lpfc_clear_la(phba, mbox);
- mbox->mbox_cmpl = lpfc_mbx_cmpl_clear_la;
- if (lpfc_sli_issue_mbox
- (phba, mbox, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free(mbox, phba->mbox_mem_pool);
- goto clrlaerr;
- }
- } else {
- /* Device Discovery completion error */
- lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY,
- "%d:0226 Device Discovery "
- "completion error\n",
- phba->brd_no);
- phba->hba_state = LPFC_HBA_ERROR;
- }
- }
- if ((mbox = mempool_alloc(phba->mbox_mem_pool, GFP_ATOMIC))) {
- /* Setup and issue mailbox INITIALIZE LINK command */
- lpfc_linkdown(phba);
- lpfc_init_link(phba, mbox,
- phba->cfg_topology,
- phba->cfg_link_speed);
- mbox->mb.un.varInitLnk.lipsr_AL_PA = 0;
- if (lpfc_sli_issue_mbox
- (phba, mbox, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free( mbox, phba->mbox_mem_pool);
- }
- }
- goto out;
- }
-
- if (phba->hba_state == LPFC_DISC_AUTH) {
- /* Node Authentication timeout */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_DISCOVERY,
- "%d:0227 Node Authentication timeout\n",
- phba->brd_no);
- lpfc_disc_flush_list(phba);
- if (phba->hba_state != LPFC_CLEAR_LA) {
- if ((mbox = mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC))) {
- phba->hba_state = LPFC_CLEAR_LA;
- lpfc_clear_la(phba, mbox);
- mbox->mbox_cmpl = lpfc_mbx_cmpl_clear_la;
- if (lpfc_sli_issue_mbox
- (phba, mbox, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free(mbox, phba->mbox_mem_pool);
- goto clrlaerr;
- }
- }
- }
- goto out;
- }
-
- if (phba->hba_state == LPFC_CLEAR_LA) {
- /* CLEAR LA timeout */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_DISCOVERY,
- "%d:0228 CLEAR LA timeout\n",
- phba->brd_no);
-clrlaerr:
- lpfc_disc_flush_list(phba);
- psli->ring[(psli->ip_ring)].flag &= ~LPFC_STOP_IOCB_EVENT;
- psli->ring[(psli->fcp_ring)].flag &= ~LPFC_STOP_IOCB_EVENT;
- psli->ring[(psli->next_ring)].flag &= ~LPFC_STOP_IOCB_EVENT;
- phba->hba_state = LPFC_HBA_READY;
- goto out;
- }
-
- if ((phba->hba_state == LPFC_HBA_READY) &&
- (phba->fc_flag & FC_RSCN_MODE)) {
- /* RSCN timeout */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_DISCOVERY,
- "%d:0231 RSCN timeout Data: x%x x%x\n",
- phba->brd_no,
- phba->fc_ns_retry, LPFC_MAX_NS_RETRY);
-
- /* Cleanup any outstanding ELS commands */
- lpfc_els_flush_cmd(phba);
-
- lpfc_els_flush_rscn(phba);
- lpfc_disc_flush_list(phba);
- goto out;
- }
-
-out:
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- return;
-}
-
-/*****************************************************************************/
-/*
- * NAME: lpfc_scan_timeout
- *
- * FUNCTION: Fibre Channel driver scsi_scan_host timeout routine.
- *
- * EXECUTION ENVIRONMENT: interrupt only
- *
- * CALLED FROM:
- * Timer function
- *
- * RETURNS:
- * none
- */
-/*****************************************************************************/
-void
-lpfc_scan_timeout(unsigned long ptr)
-{
- struct lpfc_hba *phba;
- unsigned long iflag;
-
- phba = (struct lpfc_hba *)ptr;
- if (!phba) {
- return;
- }
- spin_lock_irqsave(phba->host->host_lock, iflag);
- phba->fc_flag &= ~FC_SCSI_SCAN_TMO;
- lpfc_discq_post_event(phba, NULL, NULL, LPFC_EVT_SCAN);
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- return;
-}
-
-static void
-lpfc_nodev_timeout(unsigned long ptr)
-{
- struct lpfc_hba *phba;
- struct lpfc_nodelist *ndlp;
- unsigned long iflag;
-
- ndlp = (struct lpfc_nodelist *)ptr;
- phba = ndlp->nlp_phba;
- spin_lock_irqsave(phba->host->host_lock, iflag);
-
- /* All nodev timeouts are posted to discovery tasklet */
- lpfc_discq_post_event(phba, ndlp, NULL, LPFC_EVT_NODEV_TMO);
-
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- return;
-}
-
-/*****************************************************************************/
-/*
- * NAME: lpfc_find_target
- *
- * FUNCTION: Fibre Channel bus/target/LUN to struct lpfc_target lookup
- *
- * EXECUTION ENVIRONMENT:
- *
- * RETURNS:
- * ptr to desired struct lpfc_target
- */
-/*****************************************************************************/
-struct lpfc_target *
-lpfc_find_target(struct lpfc_hba * phba, uint32_t tgt,
- struct lpfc_nodelist *nlp)
-{
- struct lpfc_target *targetp;
-
- /* search the mapped list for this target ID */
- if(!nlp) {
- list_for_each_entry(nlp, &phba->fc_nlpmap_list, nlp_listp) {
- if (tgt == nlp->nlp_sid)
- break;
- }
-
- if (&(nlp->nlp_listp) == &(phba->fc_nlpmap_list))
- return NULL;
- }
-
- targetp = phba->device_queue_hash[tgt];
-
- /* First see if the SCSI ID has an allocated struct lpfc_target */
- if (!targetp) {
- targetp = kmalloc(sizeof (struct lpfc_target), GFP_ATOMIC);
- if (!targetp)
- return NULL;
-
- memset(targetp, 0, sizeof (struct lpfc_target));
- phba->device_queue_hash[tgt] = targetp;
- targetp->scsi_id = tgt;
-
- /* Create SCSI Target <tgt> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY | LOG_FCP,
- "%d:0204 Create SCSI Target %d\n",
- phba->brd_no, tgt);
- }
-
- if (targetp->pnode == NULL) {
- targetp->pnode = nlp;
- nlp->nlp_Target = targetp;
-#ifdef FC_TRANS_VER1
- /*
- * This code does not apply to SLES9 since there is no
- * starget defined in the midlayer. Additionally,
- * dynamic target discovery to the midlayer is not
- * supported yet.
- */
- if(!(phba->fc_flag & FC_LOADING)) {
- /* Add SCSI target / SCSI Hotplug if called
- * after initial driver load.
- */
- lpfc_target_add(phba, targetp);
- }
-#endif
- }
- else {
- if(targetp->pnode != nlp) {
- /*
- * Get rid of the old nlp before updating
- * targetp with the new one.
- */
- lpfc_nlp_list(phba, targetp->pnode, NLP_NO_LIST);
- targetp->pnode = nlp;
- }
- }
- nlp->nlp_Target = targetp;
- return (targetp);
-}
-
-/*
- * lpfc_set_failmask
- * Set, or clear, failMask bits in struct lpfc_nodelist
- */
-void
-lpfc_set_failmask(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, uint32_t bitmask, uint32_t flag)
-{
- uint32_t oldmask;
- uint32_t changed;
-
- /* Failmask change on NPort <nlp_DID> */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0208 Failmask change on NPort x%x "
- "Data: x%x x%x x%x\n",
- phba->brd_no,
- ndlp->nlp_DID, ndlp->nlp_failMask, bitmask, flag);
-
- if (flag == LPFC_SET_BITMASK) {
- oldmask = ndlp->nlp_failMask;
- /* Set failMask event */
- ndlp->nlp_failMask |= bitmask;
- if (oldmask != ndlp->nlp_failMask) {
- changed = 1;
- } else {
- changed = 0;
- }
-
- } else {
- /* Clear failMask event */
- ndlp->nlp_failMask &= ~bitmask;
- changed = 1;
- }
- return;
-}
-
-/*
- * This routine handles processing a NameServer REG_LOGIN mailbox
- * command upon completion. It is setup in the LPFC_MBOXQ
- * as the completion routine when the command is
- * handed off to the SLI layer.
- */
-void
-lpfc_mbx_cmpl_fdmi_reg_login(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- struct lpfc_sli *psli;
- MAILBOX_t *mb;
- struct lpfc_dmabuf *mp;
- struct lpfc_nodelist *ndlp;
-
- psli = &phba->sli;
- mb = &pmb->mb;
-
- ndlp = (struct lpfc_nodelist *) pmb->context2;
- mp = (struct lpfc_dmabuf *) (pmb->context1);
-
- /* The mailbox was populated by the HBA. Flush it to main store for the
- * driver. Note that all context buffers are from the driver's
- * dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, mp->phys, LPFC_BPL_SIZE,
- PCI_DMA_FROMDEVICE);
-
- pmb->context1 = NULL;
-
- if (ndlp->nlp_rpi != 0)
- lpfc_findnode_remove_rpi(phba, ndlp->nlp_rpi);
- ndlp->nlp_rpi = mb->un.varWords[0];
- lpfc_addnode_rpi(phba, ndlp, ndlp->nlp_rpi);
- ndlp->nlp_type |= NLP_FABRIC;
- ndlp->nlp_state = NLP_STE_UNMAPPED_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_UNMAPPED_LIST);
-
- /* Start issuing Fabric-Device Management Interface (FDMI)
- * command to 0xfffffa (FDMI well known port)
- */
- if (phba->cfg_fdmi_on == 1) {
- lpfc_fdmi_cmd(phba, ndlp, SLI_MGMT_DHBA);
- } else {
- /*
- * Delay issuing FDMI command if fdmi-on=2
- * (supporting RPA/hostnmae)
- */
- mod_timer(&phba->fc_fdmitmo, jiffies + HZ * 60);
- }
-
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- mempool_free( pmb, phba->mbox_mem_pool);
-
- return;
-}
-
-/*
- * This routine looks up the ndlp hash
- * table for the given RPI. If rpi found
- * it return the node list pointer
- * else return 0.
- */
-struct lpfc_nodelist *
-lpfc_findnode_rpi(struct lpfc_hba * phba, uint16_t rpi)
-{
- struct lpfc_nodelist *ret;
-
- ret = phba->fc_nlplookup[LPFC_RPI_HASH_FUNC(rpi)];
- while ((ret != 0) && (ret->nlp_rpi != rpi)) {
- ret = ret->nlp_rpi_hash_next;
- }
- return ret;
-}
-
-/*
- * This routine looks up the ndlp hash table for the
- * given RPI. If rpi found it return the node list
- * pointer else return 0 after deleting the entry
- * from hash table.
- */
-struct lpfc_nodelist *
-lpfc_findnode_remove_rpi(struct lpfc_hba * phba, uint16_t rpi)
-{
- struct lpfc_nodelist *ret, *temp;;
-
- ret = phba->fc_nlplookup[LPFC_RPI_HASH_FUNC(rpi)];
- if (ret == 0)
- return NULL;
-
- if (ret->nlp_rpi == rpi) {
- phba->fc_nlplookup[LPFC_RPI_HASH_FUNC(rpi)] =
- ret->nlp_rpi_hash_next;
- ret->nlp_rpi_hash_next = NULL;
- return ret;
- }
-
- while ((ret->nlp_rpi_hash_next != 0) &&
- (ret->nlp_rpi_hash_next->nlp_rpi != rpi)) {
- ret = ret->nlp_rpi_hash_next;
- }
-
- if (ret->nlp_rpi_hash_next != 0) {
- temp = ret->nlp_rpi_hash_next;
- ret->nlp_rpi_hash_next = temp->nlp_rpi_hash_next;
- temp->nlp_rpi_hash_next = NULL;
- return temp;
- } else {
- return NULL;
- }
-}
-
-/*
- * This routine adds the node list entry to the
- * ndlp hash table.
- */
-void
-lpfc_addnode_rpi(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp,
- uint16_t rpi)
-{
-
- uint32_t index;
-
- index = LPFC_RPI_HASH_FUNC(rpi);
- ndlp->nlp_rpi_hash_next = phba->fc_nlplookup[index];
- phba->fc_nlplookup[index] = ndlp;
- return;
-}
-
-void
-lpfc_nlp_init(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp,
- uint32_t did)
-{
- memset(ndlp, 0, sizeof (struct lpfc_nodelist));
- init_timer(&ndlp->nlp_tmofunc);
- ndlp->nlp_tmofunc.function = lpfc_nodev_timeout;
- ndlp->nlp_tmofunc.data = (unsigned long)ndlp;
- init_timer(&ndlp->nlp_delayfunc);
- ndlp->nlp_delayfunc.function = lpfc_els_retry_delay;
- ndlp->nlp_delayfunc.data = (unsigned long)ndlp;
- ndlp->nlp_DID = did;
- ndlp->nlp_phba = phba;
- return;
-}
-
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_hw.h 1.29 2004/11/18 17:28:05EST sf_support Exp $
- */
-
-#ifndef _H_LPFC_HW
-#define _H_LPFC_HW
-
-#define FDMI_DID ((uint32_t)0xfffffa)
-#define NameServer_DID ((uint32_t)0xfffffc)
-#define SCR_DID ((uint32_t)0xfffffd)
-#define Fabric_DID ((uint32_t)0xfffffe)
-#define Bcast_DID ((uint32_t)0xffffff)
-#define Mask_DID ((uint32_t)0xffffff)
-#define CT_DID_MASK ((uint32_t)0xffff00)
-#define Fabric_DID_MASK ((uint32_t)0xfff000)
-#define WELL_KNOWN_DID_MASK ((uint32_t)0xfffff0)
-
-#define PT2PT_LocalID ((uint32_t)1)
-#define PT2PT_RemoteID ((uint32_t)2)
-
-#define FF_DEF_EDTOV 2000 /* Default E_D_TOV (2000ms) */
-#define FF_DEF_ALTOV 15 /* Default AL_TIME (15ms) */
-#define FF_DEF_RATOV 2 /* Default RA_TOV (2s) */
-#define FF_DEF_ARBTOV 1900 /* Default ARB_TOV (1900ms) */
-
-#define LPFC_BUF_RING0 64 /* Number of buffers to post to RING
- 0 */
-
-#define FCELSSIZE 1024 /* maximum ELS transfer size */
-
-#define LPFC_FCP_RING 0 /* ring 2 for FCP initiator commands */
-#define LPFC_IP_RING 1 /* ring 1 for IP commands */
-#define LPFC_ELS_RING 2 /* ring 0 for ELS commands */
-#define LPFC_FCP_NEXT_RING 3
-
-#define SLI2_IOCB_CMD_R0_ENTRIES 172 /* SLI-2 FCP command ring entries */
-#define SLI2_IOCB_RSP_R0_ENTRIES 134 /* SLI-2 FCP response ring entries */
-#define SLI2_IOCB_CMD_R1_ENTRIES 4 /* SLI-2 IP command ring entries */
-#define SLI2_IOCB_RSP_R1_ENTRIES 4 /* SLI-2 IP response ring entries */
-#define SLI2_IOCB_CMD_R1XTRA_ENTRIES 36 /* SLI-2 extra FCP cmd ring entries */
-#define SLI2_IOCB_RSP_R1XTRA_ENTRIES 52 /* SLI-2 extra FCP rsp ring entries */
-#define SLI2_IOCB_CMD_R2_ENTRIES 20 /* SLI-2 ELS command ring entries */
-#define SLI2_IOCB_RSP_R2_ENTRIES 20 /* SLI-2 ELS response ring entries */
-#define SLI2_IOCB_CMD_R3_ENTRIES 0
-#define SLI2_IOCB_RSP_R3_ENTRIES 0
-#define SLI2_IOCB_CMD_R3XTRA_ENTRIES 24
-#define SLI2_IOCB_RSP_R3XTRA_ENTRIES 32
-
-/* Common Transport structures and definitions */
-
-union CtRevisionId {
- /* Structure is in Big Endian format */
- struct {
- uint32_t Revision:8;
- uint32_t InId:24;
- } bits;
- uint32_t word;
-};
-
-union CtCommandResponse {
- /* Structure is in Big Endian format */
- struct {
- uint32_t CmdRsp:16;
- uint32_t Size:16;
- } bits;
- uint32_t word;
-};
-
-struct lpfc_sli_ct_request {
- /* Structure is in Big Endian format */
- union CtRevisionId RevisionId;
- uint8_t FsType;
- uint8_t FsSubType;
- uint8_t Options;
- uint8_t Rsrvd1;
- union CtCommandResponse CommandResponse;
- uint8_t Rsrvd2;
- uint8_t ReasonCode;
- uint8_t Explanation;
- uint8_t VendorUnique;
-
- union {
- uint32_t PortID;
- struct gid {
- uint8_t PortType; /* for GID_PT requests */
- uint8_t DomainScope;
- uint8_t AreaScope;
- uint8_t Fc4Type; /* for GID_FT requests */
- } gid;
- struct rft {
- uint32_t PortId; /* For RFT_ID requests */
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t rsvd0:16;
- uint32_t rsvd1:7;
- uint32_t fcpReg:1; /* Type 8 */
- uint32_t rsvd2:2;
- uint32_t ipReg:1; /* Type 5 */
- uint32_t rsvd3:5;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t rsvd0:16;
- uint32_t fcpReg:1; /* Type 8 */
- uint32_t rsvd1:7;
- uint32_t rsvd3:5;
- uint32_t ipReg:1; /* Type 5 */
- uint32_t rsvd2:2;
-#endif
-
- uint32_t rsvd[7];
- } rft;
- struct rnn {
- uint32_t PortId; /* For RNN_ID requests */
- uint8_t wwnn[8];
- } rnn;
- struct rsnn { /* For RSNN_ID requests */
- uint8_t wwnn[8];
- uint8_t len;
- uint8_t symbname[255];
- } rsnn;
- } un;
-};
-
-#define SLI_CT_REVISION 1
-#define GID_REQUEST_SZ (sizeof(struct lpfc_sli_ct_request) - 260)
-#define RFT_REQUEST_SZ (sizeof(struct lpfc_sli_ct_request) - 228)
-#define RNN_REQUEST_SZ (sizeof(struct lpfc_sli_ct_request) - 252)
-#define RSNN_REQUEST_SZ (sizeof(struct lpfc_sli_ct_request))
-
-/*
- * FsType Definitions
- */
-
-#define SLI_CT_MANAGEMENT_SERVICE 0xFA
-#define SLI_CT_TIME_SERVICE 0xFB
-#define SLI_CT_DIRECTORY_SERVICE 0xFC
-#define SLI_CT_FABRIC_CONTROLLER_SERVICE 0xFD
-
-/*
- * Directory Service Subtypes
- */
-
-#define SLI_CT_DIRECTORY_NAME_SERVER 0x02
-
-/*
- * Response Codes
- */
-
-#define SLI_CT_RESPONSE_FS_RJT 0x8001
-#define SLI_CT_RESPONSE_FS_ACC 0x8002
-
-/*
- * Reason Codes
- */
-
-#define SLI_CT_NO_ADDITIONAL_EXPL 0x0
-#define SLI_CT_INVALID_COMMAND 0x01
-#define SLI_CT_INVALID_VERSION 0x02
-#define SLI_CT_LOGICAL_ERROR 0x03
-#define SLI_CT_INVALID_IU_SIZE 0x04
-#define SLI_CT_LOGICAL_BUSY 0x05
-#define SLI_CT_PROTOCOL_ERROR 0x07
-#define SLI_CT_UNABLE_TO_PERFORM_REQ 0x09
-#define SLI_CT_REQ_NOT_SUPPORTED 0x0b
-#define SLI_CT_HBA_INFO_NOT_REGISTERED 0x10
-#define SLI_CT_MULTIPLE_HBA_ATTR_OF_SAME_TYPE 0x11
-#define SLI_CT_INVALID_HBA_ATTR_BLOCK_LEN 0x12
-#define SLI_CT_HBA_ATTR_NOT_PRESENT 0x13
-#define SLI_CT_PORT_INFO_NOT_REGISTERED 0x20
-#define SLI_CT_MULTIPLE_PORT_ATTR_OF_SAME_TYPE 0x21
-#define SLI_CT_INVALID_PORT_ATTR_BLOCK_LEN 0x22
-#define SLI_CT_VENDOR_UNIQUE 0xff
-
-/*
- * Name Server SLI_CT_UNABLE_TO_PERFORM_REQ Explanations
- */
-
-#define SLI_CT_NO_PORT_ID 0x01
-#define SLI_CT_NO_PORT_NAME 0x02
-#define SLI_CT_NO_NODE_NAME 0x03
-#define SLI_CT_NO_CLASS_OF_SERVICE 0x04
-#define SLI_CT_NO_IP_ADDRESS 0x05
-#define SLI_CT_NO_IPA 0x06
-#define SLI_CT_NO_FC4_TYPES 0x07
-#define SLI_CT_NO_SYMBOLIC_PORT_NAME 0x08
-#define SLI_CT_NO_SYMBOLIC_NODE_NAME 0x09
-#define SLI_CT_NO_PORT_TYPE 0x0A
-#define SLI_CT_ACCESS_DENIED 0x10
-#define SLI_CT_INVALID_PORT_ID 0x11
-#define SLI_CT_DATABASE_EMPTY 0x12
-
-/*
- * Name Server Command Codes
- */
-
-#define SLI_CTNS_GA_NXT 0x0100
-#define SLI_CTNS_GPN_ID 0x0112
-#define SLI_CTNS_GNN_ID 0x0113
-#define SLI_CTNS_GCS_ID 0x0114
-#define SLI_CTNS_GFT_ID 0x0117
-#define SLI_CTNS_GSPN_ID 0x0118
-#define SLI_CTNS_GPT_ID 0x011A
-#define SLI_CTNS_GID_PN 0x0121
-#define SLI_CTNS_GID_NN 0x0131
-#define SLI_CTNS_GIP_NN 0x0135
-#define SLI_CTNS_GIPA_NN 0x0136
-#define SLI_CTNS_GSNN_NN 0x0139
-#define SLI_CTNS_GNN_IP 0x0153
-#define SLI_CTNS_GIPA_IP 0x0156
-#define SLI_CTNS_GID_FT 0x0171
-#define SLI_CTNS_GID_PT 0x01A1
-#define SLI_CTNS_RPN_ID 0x0212
-#define SLI_CTNS_RNN_ID 0x0213
-#define SLI_CTNS_RCS_ID 0x0214
-#define SLI_CTNS_RFT_ID 0x0217
-#define SLI_CTNS_RSPN_ID 0x0218
-#define SLI_CTNS_RPT_ID 0x021A
-#define SLI_CTNS_RIP_NN 0x0235
-#define SLI_CTNS_RIPA_NN 0x0236
-#define SLI_CTNS_RSNN_NN 0x0239
-#define SLI_CTNS_DA_ID 0x0300
-
-/*
- * Port Types
- */
-
-#define SLI_CTPT_N_PORT 0x01
-#define SLI_CTPT_NL_PORT 0x02
-#define SLI_CTPT_FNL_PORT 0x03
-#define SLI_CTPT_IP 0x04
-#define SLI_CTPT_FCP 0x08
-#define SLI_CTPT_NX_PORT 0x7F
-#define SLI_CTPT_F_PORT 0x81
-#define SLI_CTPT_FL_PORT 0x82
-#define SLI_CTPT_E_PORT 0x84
-
-#define SLI_CT_LAST_ENTRY 0x80000000
-
-/* Fibre Channel Service Parameter definitions */
-
-#define FC_PH_4_0 6 /* FC-PH version 4.0 */
-#define FC_PH_4_1 7 /* FC-PH version 4.1 */
-#define FC_PH_4_2 8 /* FC-PH version 4.2 */
-#define FC_PH_4_3 9 /* FC-PH version 4.3 */
-
-#define FC_PH_LOW 8 /* Lowest supported FC-PH version */
-#define FC_PH_HIGH 9 /* Highest supported FC-PH version */
-#define FC_PH3 0x20 /* FC-PH-3 version */
-
-#define FF_FRAME_SIZE 2048
-
-struct lpfc_name {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t nameType:4; /* FC Word 0, bit 28:31 */
- uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit 8:11 of IEEE ext */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit 8:11 of IEEE ext */
- uint8_t nameType:4; /* FC Word 0, bit 28:31 */
-#endif
-
-#define NAME_IEEE 0x1 /* IEEE name - nameType */
-#define NAME_IEEE_EXT 0x2 /* IEEE extended name */
-#define NAME_FC_TYPE 0x3 /* FC native name type */
-#define NAME_IP_TYPE 0x4 /* IP address */
-#define NAME_CCITT_TYPE 0xC
-#define NAME_CCITT_GR_TYPE 0xE
- uint8_t IEEEextLsb; /* FC Word 0, bit 16:23, IEEE extended Lsb */
- uint8_t IEEE[6]; /* FC IEEE address */
-};
-
-struct csp {
- uint8_t fcphHigh; /* FC Word 0, byte 0 */
- uint8_t fcphLow;
- uint8_t bbCreditMsb;
- uint8_t bbCreditlsb; /* FC Word 0, byte 3 */
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t increasingOffset:1; /* FC Word 1, bit 31 */
- uint16_t randomOffset:1; /* FC Word 1, bit 30 */
- uint16_t word1Reserved2:1; /* FC Word 1, bit 29 */
- uint16_t fPort:1; /* FC Word 1, bit 28 */
- uint16_t altBbCredit:1; /* FC Word 1, bit 27 */
- uint16_t edtovResolution:1; /* FC Word 1, bit 26 */
- uint16_t multicast:1; /* FC Word 1, bit 25 */
- uint16_t broadcast:1; /* FC Word 1, bit 24 */
-
- uint16_t huntgroup:1; /* FC Word 1, bit 23 */
- uint16_t simplex:1; /* FC Word 1, bit 22 */
- uint16_t word1Reserved1:3; /* FC Word 1, bit 21:19 */
- uint16_t dhd:1; /* FC Word 1, bit 18 */
- uint16_t contIncSeqCnt:1; /* FC Word 1, bit 17 */
- uint16_t payloadlength:1; /* FC Word 1, bit 16 */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t broadcast:1; /* FC Word 1, bit 24 */
- uint16_t multicast:1; /* FC Word 1, bit 25 */
- uint16_t edtovResolution:1; /* FC Word 1, bit 26 */
- uint16_t altBbCredit:1; /* FC Word 1, bit 27 */
- uint16_t fPort:1; /* FC Word 1, bit 28 */
- uint16_t word1Reserved2:1; /* FC Word 1, bit 29 */
- uint16_t randomOffset:1; /* FC Word 1, bit 30 */
- uint16_t increasingOffset:1; /* FC Word 1, bit 31 */
-
- uint16_t payloadlength:1; /* FC Word 1, bit 16 */
- uint16_t contIncSeqCnt:1; /* FC Word 1, bit 17 */
- uint16_t dhd:1; /* FC Word 1, bit 18 */
- uint16_t word1Reserved1:3; /* FC Word 1, bit 21:19 */
- uint16_t simplex:1; /* FC Word 1, bit 22 */
- uint16_t huntgroup:1; /* FC Word 1, bit 23 */
-#endif
-
- uint8_t bbRcvSizeMsb; /* Upper nibble is reserved */
- uint8_t bbRcvSizeLsb; /* FC Word 1, byte 3 */
- union {
- struct {
- uint8_t word2Reserved1; /* FC Word 2 byte 0 */
-
- uint8_t totalConcurrSeq; /* FC Word 2 byte 1 */
- uint8_t roByCategoryMsb; /* FC Word 2 byte 2 */
-
- uint8_t roByCategoryLsb; /* FC Word 2 byte 3 */
- } nPort;
- uint32_t r_a_tov; /* R_A_TOV must be in B.E. format */
- } w2;
-
- uint32_t e_d_tov; /* E_D_TOV must be in B.E. format */
-};
-
-struct class_parms {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t classValid:1; /* FC Word 0, bit 31 */
- uint8_t intermix:1; /* FC Word 0, bit 30 */
- uint8_t stackedXparent:1; /* FC Word 0, bit 29 */
- uint8_t stackedLockDown:1; /* FC Word 0, bit 28 */
- uint8_t seqDelivery:1; /* FC Word 0, bit 27 */
- uint8_t word0Reserved1:3; /* FC Word 0, bit 24:26 */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t word0Reserved1:3; /* FC Word 0, bit 24:26 */
- uint8_t seqDelivery:1; /* FC Word 0, bit 27 */
- uint8_t stackedLockDown:1; /* FC Word 0, bit 28 */
- uint8_t stackedXparent:1; /* FC Word 0, bit 29 */
- uint8_t intermix:1; /* FC Word 0, bit 30 */
- uint8_t classValid:1; /* FC Word 0, bit 31 */
-
-#endif
-
- uint8_t word0Reserved2; /* FC Word 0, bit 16:23 */
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t iCtlXidReAssgn:2; /* FC Word 0, Bit 14:15 */
- uint8_t iCtlInitialPa:2; /* FC Word 0, bit 12:13 */
- uint8_t iCtlAck0capable:1; /* FC Word 0, bit 11 */
- uint8_t iCtlAckNcapable:1; /* FC Word 0, bit 10 */
- uint8_t word0Reserved3:2; /* FC Word 0, bit 8: 9 */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t word0Reserved3:2; /* FC Word 0, bit 8: 9 */
- uint8_t iCtlAckNcapable:1; /* FC Word 0, bit 10 */
- uint8_t iCtlAck0capable:1; /* FC Word 0, bit 11 */
- uint8_t iCtlInitialPa:2; /* FC Word 0, bit 12:13 */
- uint8_t iCtlXidReAssgn:2; /* FC Word 0, Bit 14:15 */
-#endif
-
- uint8_t word0Reserved4; /* FC Word 0, bit 0: 7 */
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t rCtlAck0capable:1; /* FC Word 1, bit 31 */
- uint8_t rCtlAckNcapable:1; /* FC Word 1, bit 30 */
- uint8_t rCtlXidInterlck:1; /* FC Word 1, bit 29 */
- uint8_t rCtlErrorPolicy:2; /* FC Word 1, bit 27:28 */
- uint8_t word1Reserved1:1; /* FC Word 1, bit 26 */
- uint8_t rCtlCatPerSeq:2; /* FC Word 1, bit 24:25 */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t rCtlCatPerSeq:2; /* FC Word 1, bit 24:25 */
- uint8_t word1Reserved1:1; /* FC Word 1, bit 26 */
- uint8_t rCtlErrorPolicy:2; /* FC Word 1, bit 27:28 */
- uint8_t rCtlXidInterlck:1; /* FC Word 1, bit 29 */
- uint8_t rCtlAckNcapable:1; /* FC Word 1, bit 30 */
- uint8_t rCtlAck0capable:1; /* FC Word 1, bit 31 */
-#endif
-
- uint8_t word1Reserved2; /* FC Word 1, bit 16:23 */
- uint8_t rcvDataSizeMsb; /* FC Word 1, bit 8:15 */
- uint8_t rcvDataSizeLsb; /* FC Word 1, bit 0: 7 */
-
- uint8_t concurrentSeqMsb; /* FC Word 2, bit 24:31 */
- uint8_t concurrentSeqLsb; /* FC Word 2, bit 16:23 */
- uint8_t EeCreditSeqMsb; /* FC Word 2, bit 8:15 */
- uint8_t EeCreditSeqLsb; /* FC Word 2, bit 0: 7 */
-
- uint8_t openSeqPerXchgMsb; /* FC Word 3, bit 24:31 */
- uint8_t openSeqPerXchgLsb; /* FC Word 3, bit 16:23 */
- uint8_t word3Reserved1; /* Fc Word 3, bit 8:15 */
- uint8_t word3Reserved2; /* Fc Word 3, bit 0: 7 */
-};
-
-struct serv_parm { /* Structure is in Big Endian format */
- struct csp cmn;
- struct lpfc_name portName;
- struct lpfc_name nodeName;
- struct class_parms cls1;
- struct class_parms cls2;
- struct class_parms cls3;
- struct class_parms cls4;
- uint8_t vendorVersion[16];
-};
-
-/*
- * Extended Link Service LS_COMMAND codes (Payload Word 0)
- */
-#ifdef __BIG_ENDIAN_BITFIELD
-#define ELS_CMD_MASK 0xffff0000
-#define ELS_RSP_MASK 0xff000000
-#define ELS_CMD_LS_RJT 0x01000000
-#define ELS_CMD_ACC 0x02000000
-#define ELS_CMD_PLOGI 0x03000000
-#define ELS_CMD_FLOGI 0x04000000
-#define ELS_CMD_LOGO 0x05000000
-#define ELS_CMD_ABTX 0x06000000
-#define ELS_CMD_RCS 0x07000000
-#define ELS_CMD_RES 0x08000000
-#define ELS_CMD_RSS 0x09000000
-#define ELS_CMD_RSI 0x0A000000
-#define ELS_CMD_ESTS 0x0B000000
-#define ELS_CMD_ESTC 0x0C000000
-#define ELS_CMD_ADVC 0x0D000000
-#define ELS_CMD_RTV 0x0E000000
-#define ELS_CMD_RLS 0x0F000000
-#define ELS_CMD_ECHO 0x10000000
-#define ELS_CMD_TEST 0x11000000
-#define ELS_CMD_RRQ 0x12000000
-#define ELS_CMD_PRLI 0x20100014
-#define ELS_CMD_PRLO 0x21100014
-#define ELS_CMD_PDISC 0x50000000
-#define ELS_CMD_FDISC 0x51000000
-#define ELS_CMD_ADISC 0x52000000
-#define ELS_CMD_FARP 0x54000000
-#define ELS_CMD_FARPR 0x55000000
-#define ELS_CMD_FAN 0x60000000
-#define ELS_CMD_RSCN 0x61040000
-#define ELS_CMD_SCR 0x62000000
-#define ELS_CMD_RNID 0x78000000
-#else /* __LITTLE_ENDIAN_BITFIELD */
-#define ELS_CMD_MASK 0xffff
-#define ELS_RSP_MASK 0xff
-#define ELS_CMD_LS_RJT 0x01
-#define ELS_CMD_ACC 0x02
-#define ELS_CMD_PLOGI 0x03
-#define ELS_CMD_FLOGI 0x04
-#define ELS_CMD_LOGO 0x05
-#define ELS_CMD_ABTX 0x06
-#define ELS_CMD_RCS 0x07
-#define ELS_CMD_RES 0x08
-#define ELS_CMD_RSS 0x09
-#define ELS_CMD_RSI 0x0A
-#define ELS_CMD_ESTS 0x0B
-#define ELS_CMD_ESTC 0x0C
-#define ELS_CMD_ADVC 0x0D
-#define ELS_CMD_RTV 0x0E
-#define ELS_CMD_RLS 0x0F
-#define ELS_CMD_ECHO 0x10
-#define ELS_CMD_TEST 0x11
-#define ELS_CMD_RRQ 0x12
-#define ELS_CMD_PRLI 0x14001020
-#define ELS_CMD_PRLO 0x14001021
-#define ELS_CMD_PDISC 0x50
-#define ELS_CMD_FDISC 0x51
-#define ELS_CMD_ADISC 0x52
-#define ELS_CMD_FARP 0x54
-#define ELS_CMD_FARPR 0x55
-#define ELS_CMD_FAN 0x60
-#define ELS_CMD_RSCN 0x0461
-#define ELS_CMD_SCR 0x62
-#define ELS_CMD_RNID 0x78
-#endif
-
-/*
- * LS_RJT Payload Definition
- */
-
-struct ls_rjt { /* Structure is in Big Endian format */
- union {
- uint32_t lsRjtError;
- struct {
- uint8_t lsRjtRsvd0; /* FC Word 0, bit 24:31 */
-
- uint8_t lsRjtRsnCode; /* FC Word 0, bit 16:23 */
- /* LS_RJT reason codes */
-#define LSRJT_INVALID_CMD 0x01
-#define LSRJT_LOGICAL_ERR 0x03
-#define LSRJT_LOGICAL_BSY 0x05
-#define LSRJT_PROTOCOL_ERR 0x07
-#define LSRJT_UNABLE_TPC 0x09 /* Unable to perform command */
-#define LSRJT_CMD_UNSUPPORTED 0x0B
-#define LSRJT_VENDOR_UNIQUE 0xFF /* See Byte 3 */
-
- uint8_t lsRjtRsnCodeExp; /* FC Word 0, bit 8:15 */
- /* LS_RJT reason explanation */
-#define LSEXP_NOTHING_MORE 0x00
-#define LSEXP_SPARM_OPTIONS 0x01
-#define LSEXP_SPARM_ICTL 0x03
-#define LSEXP_SPARM_RCTL 0x05
-#define LSEXP_SPARM_RCV_SIZE 0x07
-#define LSEXP_SPARM_CONCUR_SEQ 0x09
-#define LSEXP_SPARM_CREDIT 0x0B
-#define LSEXP_INVALID_PNAME 0x0D
-#define LSEXP_INVALID_NNAME 0x0E
-#define LSEXP_INVALID_CSP 0x0F
-#define LSEXP_INVALID_ASSOC_HDR 0x11
-#define LSEXP_ASSOC_HDR_REQ 0x13
-#define LSEXP_INVALID_O_SID 0x15
-#define LSEXP_INVALID_OX_RX 0x17
-#define LSEXP_CMD_IN_PROGRESS 0x19
-#define LSEXP_INVALID_NPORT_ID 0x1F
-#define LSEXP_INVALID_SEQ_ID 0x21
-#define LSEXP_INVALID_XCHG 0x23
-#define LSEXP_INACTIVE_XCHG 0x25
-#define LSEXP_RQ_REQUIRED 0x27
-#define LSEXP_OUT_OF_RESOURCE 0x29
-#define LSEXP_CANT_GIVE_DATA 0x2A
-#define LSEXP_REQ_UNSUPPORTED 0x2C
- uint8_t vendorUnique; /* FC Word 0, bit 0: 7 */
- } b;
- } un;
-};
-
-/*
- * N_Port Login (FLOGO/PLOGO Request) Payload Definition
- */
-
-typedef struct _LOGO { /* Structure is in Big Endian format */
- union {
- uint32_t nPortId32; /* Access nPortId as a word */
- struct {
- uint8_t word1Reserved1; /* FC Word 1, bit 31:24 */
- uint8_t nPortIdByte0; /* N_port ID bit 16:23 */
- uint8_t nPortIdByte1; /* N_port ID bit 8:15 */
- uint8_t nPortIdByte2; /* N_port ID bit 0: 7 */
- } b;
- } un;
- struct lpfc_name portName; /* N_port name field */
-} LOGO;
-
-/*
- * FCP Login (PRLI Request / ACC) Payload Definition
- */
-
-#define PRLX_PAGE_LEN 0x10
-#define TPRLO_PAGE_LEN 0x14
-
-typedef struct _PRLI { /* Structure is in Big Endian format */
- uint8_t prliType; /* FC Parm Word 0, bit 24:31 */
-
-#define PRLI_FCP_TYPE 0x08
- uint8_t word0Reserved1; /* FC Parm Word 0, bit 16:23 */
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */
- uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */
- uint8_t estabImagePair:1; /* FC Parm Word 0, bit 13 */
-
- /* ACC = imagePairEstablished */
- uint8_t word0Reserved2:1; /* FC Parm Word 0, bit 12 */
- uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */
- uint8_t word0Reserved2:1; /* FC Parm Word 0, bit 12 */
- uint8_t estabImagePair:1; /* FC Parm Word 0, bit 13 */
- uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */
- uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */
- /* ACC = imagePairEstablished */
-#endif
-
-#define PRLI_REQ_EXECUTED 0x1 /* acceptRspCode */
-#define PRLI_NO_RESOURCES 0x2
-#define PRLI_INIT_INCOMPLETE 0x3
-#define PRLI_NO_SUCH_PA 0x4
-#define PRLI_PREDEF_CONFIG 0x5
-#define PRLI_PARTIAL_SUCCESS 0x6
-#define PRLI_INVALID_PAGE_CNT 0x7
- uint8_t word0Reserved3; /* FC Parm Word 0, bit 0:7 */
-
- uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
-
- uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
-
- uint8_t word3Reserved1; /* FC Parm Word 3, bit 24:31 */
- uint8_t word3Reserved2; /* FC Parm Word 3, bit 16:23 */
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t Word3bit15Resved:1; /* FC Parm Word 3, bit 15 */
- uint16_t Word3bit14Resved:1; /* FC Parm Word 3, bit 14 */
- uint16_t Word3bit13Resved:1; /* FC Parm Word 3, bit 13 */
- uint16_t Word3bit12Resved:1; /* FC Parm Word 3, bit 12 */
- uint16_t Word3bit11Resved:1; /* FC Parm Word 3, bit 11 */
- uint16_t Word3bit10Resved:1; /* FC Parm Word 3, bit 10 */
- uint16_t TaskRetryIdReq:1; /* FC Parm Word 3, bit 9 */
- uint16_t Retry:1; /* FC Parm Word 3, bit 8 */
- uint16_t ConfmComplAllowed:1; /* FC Parm Word 3, bit 7 */
- uint16_t dataOverLay:1; /* FC Parm Word 3, bit 6 */
- uint16_t initiatorFunc:1; /* FC Parm Word 3, bit 5 */
- uint16_t targetFunc:1; /* FC Parm Word 3, bit 4 */
- uint16_t cmdDataMixEna:1; /* FC Parm Word 3, bit 3 */
- uint16_t dataRspMixEna:1; /* FC Parm Word 3, bit 2 */
- uint16_t readXferRdyDis:1; /* FC Parm Word 3, bit 1 */
- uint16_t writeXferRdyDis:1; /* FC Parm Word 3, bit 0 */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t Retry:1; /* FC Parm Word 3, bit 8 */
- uint16_t TaskRetryIdReq:1; /* FC Parm Word 3, bit 9 */
- uint16_t Word3bit10Resved:1; /* FC Parm Word 3, bit 10 */
- uint16_t Word3bit11Resved:1; /* FC Parm Word 3, bit 11 */
- uint16_t Word3bit12Resved:1; /* FC Parm Word 3, bit 12 */
- uint16_t Word3bit13Resved:1; /* FC Parm Word 3, bit 13 */
- uint16_t Word3bit14Resved:1; /* FC Parm Word 3, bit 14 */
- uint16_t Word3bit15Resved:1; /* FC Parm Word 3, bit 15 */
- uint16_t writeXferRdyDis:1; /* FC Parm Word 3, bit 0 */
- uint16_t readXferRdyDis:1; /* FC Parm Word 3, bit 1 */
- uint16_t dataRspMixEna:1; /* FC Parm Word 3, bit 2 */
- uint16_t cmdDataMixEna:1; /* FC Parm Word 3, bit 3 */
- uint16_t targetFunc:1; /* FC Parm Word 3, bit 4 */
- uint16_t initiatorFunc:1; /* FC Parm Word 3, bit 5 */
- uint16_t dataOverLay:1; /* FC Parm Word 3, bit 6 */
- uint16_t ConfmComplAllowed:1; /* FC Parm Word 3, bit 7 */
-#endif
-} PRLI;
-
-/*
- * FCP Logout (PRLO Request / ACC) Payload Definition
- */
-
-typedef struct _PRLO { /* Structure is in Big Endian format */
- uint8_t prloType; /* FC Parm Word 0, bit 24:31 */
-
-#define PRLO_FCP_TYPE 0x08
- uint8_t word0Reserved1; /* FC Parm Word 0, bit 16:23 */
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */
- uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */
- uint8_t word0Reserved2:2; /* FC Parm Word 0, bit 12:13 */
- uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */
- uint8_t word0Reserved2:2; /* FC Parm Word 0, bit 12:13 */
- uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */
- uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */
-#endif
-
-#define PRLO_REQ_EXECUTED 0x1 /* acceptRspCode */
-#define PRLO_NO_SUCH_IMAGE 0x4
-#define PRLO_INVALID_PAGE_CNT 0x7
-
- uint8_t word0Reserved3; /* FC Parm Word 0, bit 0:7 */
-
- uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
-
- uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
-
- uint32_t word3Reserved1; /* FC Parm Word 3, bit 0:31 */
-} PRLO;
-
-typedef struct _ADISC { /* Structure is in Big Endian format */
- uint32_t hardAL_PA;
- struct lpfc_name portName;
- struct lpfc_name nodeName;
- uint32_t DID;
-} ADISC;
-
-typedef struct _FARP { /* Structure is in Big Endian format */
- uint32_t Mflags:8;
- uint32_t Odid:24;
-#define FARP_NO_ACTION 0 /* FARP information enclosed, no
- action */
-#define FARP_MATCH_PORT 0x1 /* Match on Responder Port Name */
-#define FARP_MATCH_NODE 0x2 /* Match on Responder Node Name */
-#define FARP_MATCH_IP 0x4 /* Match on IP address, not supported */
-#define FARP_MATCH_IPV4 0x5 /* Match on IPV4 address, not
- supported */
-#define FARP_MATCH_IPV6 0x6 /* Match on IPV6 address, not
- supported */
- uint32_t Rflags:8;
- uint32_t Rdid:24;
-#define FARP_REQUEST_PLOGI 0x1 /* Request for PLOGI */
-#define FARP_REQUEST_FARPR 0x2 /* Request for FARP Response */
- struct lpfc_name OportName;
- struct lpfc_name OnodeName;
- struct lpfc_name RportName;
- struct lpfc_name RnodeName;
- uint8_t Oipaddr[16];
- uint8_t Ripaddr[16];
-} FARP;
-
-typedef struct _FAN { /* Structure is in Big Endian format */
- uint32_t Fdid;
- struct lpfc_name FportName;
- struct lpfc_name FnodeName;
-} FAN;
-
-typedef struct _SCR { /* Structure is in Big Endian format */
- uint8_t resvd1;
- uint8_t resvd2;
- uint8_t resvd3;
- uint8_t Function;
-#define SCR_FUNC_FABRIC 0x01
-#define SCR_FUNC_NPORT 0x02
-#define SCR_FUNC_FULL 0x03
-#define SCR_CLEAR 0xff
-} SCR;
-
-typedef struct _RNID_TOP_DISC {
- struct lpfc_name portName;
- uint8_t resvd[8];
- uint32_t unitType;
-#define RNID_HBA 0x7
-#define RNID_HOST 0xa
-#define RNID_DRIVER 0xd
- uint32_t physPort;
- uint32_t attachedNodes;
- uint16_t ipVersion;
-#define RNID_IPV4 0x1
-#define RNID_IPV6 0x2
- uint16_t UDPport;
- uint8_t ipAddr[16];
- uint16_t resvd1;
- uint16_t flags;
-#define RNID_TD_SUPPORT 0x1
-#define RNID_LP_VALID 0x2
-} RNID_TOP_DISC;
-
-typedef struct _RNID { /* Structure is in Big Endian format */
- uint8_t Format;
-#define RNID_TOPOLOGY_DISC 0xdf
- uint8_t CommonLen;
- uint8_t resvd1;
- uint8_t SpecificLen;
- struct lpfc_name portName;
- struct lpfc_name nodeName;
- union {
- RNID_TOP_DISC topologyDisc; /* topology disc (0xdf) */
- } un;
-} RNID;
-
-typedef struct _RRQ { /* Structure is in Big Endian format */
- uint32_t SID;
- uint16_t Oxid;
- uint16_t Rxid;
- uint8_t resv[32]; /* optional association hdr */
-} RRQ;
-
-/* This is used for RSCN command */
-typedef struct _D_ID { /* Structure is in Big Endian format */
- union {
- uint32_t word;
- struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t resv;
- uint8_t domain;
- uint8_t area;
- uint8_t id;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t id;
- uint8_t area;
- uint8_t domain;
- uint8_t resv;
-#endif
- } b;
- } un;
-} D_ID;
-
-/*
- * Structure to define all ELS Payload types
- */
-
-typedef struct _ELS_PKT { /* Structure is in Big Endian format */
- uint8_t elsCode; /* FC Word 0, bit 24:31 */
- uint8_t elsByte1;
- uint8_t elsByte2;
- uint8_t elsByte3;
- union {
- struct ls_rjt lsRjt; /* Payload for LS_RJT ELS response */
- struct serv_parm logi; /* Payload for PLOGI/FLOGI/PDISC/ACC */
- LOGO logo; /* Payload for PLOGO/FLOGO/ACC */
- PRLI prli; /* Payload for PRLI/ACC */
- PRLO prlo; /* Payload for PRLO/ACC */
- ADISC adisc; /* Payload for ADISC/ACC */
- FARP farp; /* Payload for FARP/ACC */
- FAN fan; /* Payload for FAN */
- SCR scr; /* Payload for SCR/ACC */
- RRQ rrq; /* Payload for RRQ */
- RNID rnid; /* Payload for RNID */
- uint8_t pad[128 - 4]; /* Pad out to payload of 128 bytes */
- } un;
-} ELS_PKT;
-
-/*
- * FDMI
- * HBA MAnagement Operations Command Codes
- */
-#define SLI_MGMT_GRHL 0x100 /* Get registered HBA list */
-#define SLI_MGMT_GHAT 0x101 /* Get HBA attributes */
-#define SLI_MGMT_GRPL 0x102 /* Get registered Port list */
-#define SLI_MGMT_GPAT 0x110 /* Get Port attributes */
-#define SLI_MGMT_RHBA 0x200 /* Register HBA */
-#define SLI_MGMT_RHAT 0x201 /* Register HBA atttributes */
-#define SLI_MGMT_RPRT 0x210 /* Register Port */
-#define SLI_MGMT_RPA 0x211 /* Register Port attributes */
-#define SLI_MGMT_DHBA 0x300 /* De-register HBA */
-#define SLI_MGMT_DPRT 0x310 /* De-register Port */
-
-/*
- * Management Service Subtypes
- */
-#define SLI_CT_FDMI_Subtypes 0x10
-
-/*
- * HBA Management Service Reject Code
- */
-#define REJECT_CODE 0x9 /* Unable to perform command request */
-
-/*
- * HBA Management Service Reject Reason Code
- * Please refer to the Reason Codes above
- */
-
-/*
- * HBA Attribute Types
- */
-#define NODE_NAME 0x1
-#define MANUFACTURER 0x2
-#define SERIAL_NUMBER 0x3
-#define MODEL 0x4
-#define MODEL_DESCRIPTION 0x5
-#define HARDWARE_VERSION 0x6
-#define DRIVER_VERSION 0x7
-#define OPTION_ROM_VERSION 0x8
-#define FIRMWARE_VERSION 0x9
-#define OS_NAME_VERSION 0xa
-#define MAX_CT_PAYLOAD_LEN 0xb
-
-/*
- * Port Attrubute Types
- */
-#define SUPPORTED_FC4_TYPES 0x1
-#define SUPPORTED_SPEED 0x2
-#define PORT_SPEED 0x3
-#define MAX_FRAME_SIZE 0x4
-#define OS_DEVICE_NAME 0x5
-#define HOST_NAME 0x6
-
-union AttributesDef {
- /* Structure is in Big Endian format */
- struct {
- uint32_t AttrType:16;
- uint32_t AttrLen:16;
- } bits;
- uint32_t word;
-};
-
-
-/*
- * HBA Attribute Entry (8 - 260 bytes)
- */
-typedef struct {
- union AttributesDef ad;
- union {
- uint32_t VendorSpecific;
- uint8_t Manufacturer[64];
- uint8_t SerialNumber[64];
- uint8_t Model[256];
- uint8_t ModelDescription[256];
- uint8_t HardwareVersion[256];
- uint8_t DriverVersion[256];
- uint8_t OptionROMVersion[256];
- uint8_t FirmwareVersion[256];
- struct lpfc_name NodeName;
- uint8_t SupportFC4Types[32];
- uint32_t SupportSpeed;
- uint32_t PortSpeed;
- uint32_t MaxFrameSize;
- uint8_t OsDeviceName[256];
- uint8_t OsNameVersion[256];
- uint32_t MaxCTPayloadLen;
- uint8_t HostName[256];
- } un;
-} ATTRIBUTE_ENTRY;
-
-/*
- * HBA Attribute Block
- */
-typedef struct {
- uint32_t EntryCnt; /* Number of HBA attribute entries */
- ATTRIBUTE_ENTRY Entry; /* Variable-length array */
-} ATTRIBUTE_BLOCK;
-
-/*
- * Port Entry
- */
-typedef struct {
- struct lpfc_name PortName;
-} PORT_ENTRY;
-
-/*
- * HBA Identifier
- */
-typedef struct {
- struct lpfc_name PortName;
-} HBA_IDENTIFIER;
-
-/*
- * Registered Port List Format
- */
-typedef struct {
- uint32_t EntryCnt;
- PORT_ENTRY pe; /* Variable-length array */
-} REG_PORT_LIST;
-
-/*
- * Register HBA(RHBA)
- */
-typedef struct {
- HBA_IDENTIFIER hi;
- REG_PORT_LIST rpl; /* variable-length array */
-/* ATTRIBUTE_BLOCK ab; */
-} REG_HBA;
-
-/*
- * Register HBA Attributes (RHAT)
- */
-typedef struct {
- struct lpfc_name HBA_PortName;
- ATTRIBUTE_BLOCK ab;
-} REG_HBA_ATTRIBUTE;
-
-/*
- * Register Port Attributes (RPA)
- */
-typedef struct {
- struct lpfc_name PortName;
- ATTRIBUTE_BLOCK ab;
-} REG_PORT_ATTRIBUTE;
-
-/*
- * Get Registered HBA List (GRHL) Accept Payload Format
- */
-typedef struct {
- uint32_t HBA__Entry_Cnt; /* Number of Registered HBA Identifiers */
- struct lpfc_name HBA_PortName; /* Variable-length array */
-} GRHL_ACC_PAYLOAD;
-
-/*
- * Get Registered Port List (GRPL) Accept Payload Format
- */
-typedef struct {
- uint32_t RPL_Entry_Cnt; /* Number of Registered Port Entries */
- PORT_ENTRY Reg_Port_Entry[1]; /* Variable-length array */
-} GRPL_ACC_PAYLOAD;
-
-/*
- * Get Port Attributes (GPAT) Accept Payload Format
- */
-
-typedef struct {
- ATTRIBUTE_BLOCK pab;
-} GPAT_ACC_PAYLOAD;
-
-
-/*
- * Begin HBA configuration parameters.
- * The PCI configuration register BAR assignments are:
- * BAR0, offset 0x10 - SLIM base memory address
- * BAR1, offset 0x14 - SLIM base memory high address
- * BAR2, offset 0x18 - REGISTER base memory address
- * BAR3, offset 0x1c - REGISTER base memory high address
- * BAR4, offset 0x20 - BIU I/O registers
- * BAR5, offset 0x24 - REGISTER base io high address
- */
-
-/* Number of rings currently used and available. */
-#define MAX_CONFIGURED_RINGS 3
-#define MAX_RINGS 4
-
-/* IOCB / Mailbox is owned by FireFly */
-#define OWN_CHIP 1
-
-/* IOCB / Mailbox is owned by Host */
-#define OWN_HOST 0
-
-/* Number of 4-byte words in an IOCB. */
-#define IOCB_WORD_SZ 8
-
-/* defines for type field in fc header */
-#define FC_ELS_DATA 0x1
-#define FC_LLC_SNAP 0x5
-#define FC_FCP_DATA 0x8
-#define FC_COMMON_TRANSPORT_ULP 0x20
-
-/* defines for rctl field in fc header */
-#define FC_DEV_DATA 0x0
-#define FC_UNSOL_CTL 0x2
-#define FC_SOL_CTL 0x3
-#define FC_UNSOL_DATA 0x4
-#define FC_FCP_CMND 0x6
-#define FC_ELS_REQ 0x22
-#define FC_ELS_RSP 0x23
-
-/* network headers for Dfctl field */
-#define FC_NET_HDR 0x20
-
-/* Start FireFly Register definitions */
-#define PCI_VENDOR_ID_EMULEX 0x10df
-#define PCI_DEVICE_ID_FIREFLY 0x1ae5
-#define PCI_DEVICE_ID_SUPERFLY 0xf700
-#define PCI_DEVICE_ID_DRAGONFLY 0xf800
-#define PCI_DEVICE_ID_RFLY 0xf095
-#define PCI_DEVICE_ID_PFLY 0xf098
-#define PCI_DEVICE_ID_TFLY 0xf0a5
-#define PCI_DEVICE_ID_CENTAUR 0xf900
-#define PCI_DEVICE_ID_PEGASUS 0xf980
-#define PCI_DEVICE_ID_THOR 0xfa00
-#define PCI_DEVICE_ID_VIPER 0xfb00
-#define PCI_DEVICE_ID_HELIOS 0xfd00
-#define PCI_DEVICE_ID_BMID 0xf0d5
-#define PCI_DEVICE_ID_BSMB 0xf0d1
-#define PCI_DEVICE_ID_ZEPHYR 0xfe00
-#define PCI_DEVICE_ID_ZMID 0xf0e5
-#define PCI_DEVICE_ID_ZSMB 0xf0e1
-#define PCI_DEVICE_ID_LP101 0xf0a1
-
-#define JEDEC_ID_ADDRESS 0x0080001c
-#define FIREFLY_JEDEC_ID 0x1ACC
-#define SUPERFLY_JEDEC_ID 0x0020
-#define DRAGONFLY_JEDEC_ID 0x0021
-#define DRAGONFLY_V2_JEDEC_ID 0x0025
-#define CENTAUR_2G_JEDEC_ID 0x0026
-#define CENTAUR_1G_JEDEC_ID 0x0028
-#define PEGASUS_ORION_JEDEC_ID 0x0036
-#define PEGASUS_JEDEC_ID 0x0038
-#define THOR_JEDEC_ID 0x0012
-#define HELIOS_JEDEC_ID 0x0364
-#define ZEPHYR_JEDEC_ID 0x0577
-#define VIPER_JEDEC_ID 0x4838
-
-#define JEDEC_ID_MASK 0x0FFFF000
-#define JEDEC_ID_SHIFT 12
-#define FC_JEDEC_ID(id) ((id & JEDEC_ID_MASK) >> JEDEC_ID_SHIFT)
-
-typedef struct { /* FireFly BIU registers */
- uint32_t hostAtt; /* See definitions for Host Attention
- register */
- uint32_t chipAtt; /* See definitions for Chip Attention
- register */
- uint32_t hostStatus; /* See definitions for Host Status register */
- uint32_t hostControl; /* See definitions for Host Control register */
- uint32_t buiConfig; /* See definitions for BIU configuration
- register */
-} FF_REGS;
-
-/* IO Register size in bytes */
-#define FF_REG_AREA_SIZE 256
-
-/* Host Attention Register */
-
-#define HA_REG_OFFSET 0 /* Word offset from register base address */
-
-#define HA_R0RE_REQ 0x00000001 /* Bit 0 */
-#define HA_R0CE_RSP 0x00000002 /* Bit 1 */
-#define HA_R0ATT 0x00000008 /* Bit 3 */
-#define HA_R1RE_REQ 0x00000010 /* Bit 4 */
-#define HA_R1CE_RSP 0x00000020 /* Bit 5 */
-#define HA_R1ATT 0x00000080 /* Bit 7 */
-#define HA_R2RE_REQ 0x00000100 /* Bit 8 */
-#define HA_R2CE_RSP 0x00000200 /* Bit 9 */
-#define HA_R2ATT 0x00000800 /* Bit 11 */
-#define HA_R3RE_REQ 0x00001000 /* Bit 12 */
-#define HA_R3CE_RSP 0x00002000 /* Bit 13 */
-#define HA_R3ATT 0x00008000 /* Bit 15 */
-#define HA_LATT 0x20000000 /* Bit 29 */
-#define HA_MBATT 0x40000000 /* Bit 30 */
-#define HA_ERATT 0x80000000 /* Bit 31 */
-
-#define HA_RXRE_REQ 0x00000001 /* Bit 0 */
-#define HA_RXCE_RSP 0x00000002 /* Bit 1 */
-#define HA_RXATT 0x00000008 /* Bit 3 */
-#define HA_RXMASK 0x0000000f
-
-/* Chip Attention Register */
-
-#define CA_REG_OFFSET 1 /* Word offset from register base address */
-
-#define CA_R0CE_REQ 0x00000001 /* Bit 0 */
-#define CA_R0RE_RSP 0x00000002 /* Bit 1 */
-#define CA_R0ATT 0x00000008 /* Bit 3 */
-#define CA_R1CE_REQ 0x00000010 /* Bit 4 */
-#define CA_R1RE_RSP 0x00000020 /* Bit 5 */
-#define CA_R1ATT 0x00000080 /* Bit 7 */
-#define CA_R2CE_REQ 0x00000100 /* Bit 8 */
-#define CA_R2RE_RSP 0x00000200 /* Bit 9 */
-#define CA_R2ATT 0x00000800 /* Bit 11 */
-#define CA_R3CE_REQ 0x00001000 /* Bit 12 */
-#define CA_R3RE_RSP 0x00002000 /* Bit 13 */
-#define CA_R3ATT 0x00008000 /* Bit 15 */
-#define CA_MBATT 0x40000000 /* Bit 30 */
-
-/* Host Status Register */
-
-#define HS_REG_OFFSET 2 /* Word offset from register base address */
-
-#define HS_MBRDY 0x00400000 /* Bit 22 */
-#define HS_FFRDY 0x00800000 /* Bit 23 */
-#define HS_FFER8 0x01000000 /* Bit 24 */
-#define HS_FFER7 0x02000000 /* Bit 25 */
-#define HS_FFER6 0x04000000 /* Bit 26 */
-#define HS_FFER5 0x08000000 /* Bit 27 */
-#define HS_FFER4 0x10000000 /* Bit 28 */
-#define HS_FFER3 0x20000000 /* Bit 29 */
-#define HS_FFER2 0x40000000 /* Bit 30 */
-#define HS_FFER1 0x80000000 /* Bit 31 */
-#define HS_FFERM 0xFF000000 /* Mask for error bits 31:24 */
-
-/* Host Control Register */
-
-#define HC_REG_OFFSET 3 /* Word offset from register base address */
-
-#define HC_MBINT_ENA 0x00000001 /* Bit 0 */
-#define HC_R0INT_ENA 0x00000002 /* Bit 1 */
-#define HC_R1INT_ENA 0x00000004 /* Bit 2 */
-#define HC_R2INT_ENA 0x00000008 /* Bit 3 */
-#define HC_R3INT_ENA 0x00000010 /* Bit 4 */
-#define HC_INITHBI 0x02000000 /* Bit 25 */
-#define HC_INITMB 0x04000000 /* Bit 26 */
-#define HC_INITFF 0x08000000 /* Bit 27 */
-#define HC_LAINT_ENA 0x20000000 /* Bit 29 */
-#define HC_ERINT_ENA 0x80000000 /* Bit 31 */
-
-/* Mailbox Commands */
-#define MBX_SHUTDOWN 0x00 /* terminate testing */
-#define MBX_LOAD_SM 0x01
-#define MBX_READ_NV 0x02
-#define MBX_WRITE_NV 0x03
-#define MBX_RUN_BIU_DIAG 0x04
-#define MBX_INIT_LINK 0x05
-#define MBX_DOWN_LINK 0x06
-#define MBX_CONFIG_LINK 0x07
-#define MBX_CONFIG_RING 0x09
-#define MBX_RESET_RING 0x0A
-#define MBX_READ_CONFIG 0x0B
-#define MBX_READ_RCONFIG 0x0C
-#define MBX_READ_SPARM 0x0D
-#define MBX_READ_STATUS 0x0E
-#define MBX_READ_RPI 0x0F
-#define MBX_READ_XRI 0x10
-#define MBX_READ_REV 0x11
-#define MBX_READ_LNK_STAT 0x12
-#define MBX_REG_LOGIN 0x13
-#define MBX_UNREG_LOGIN 0x14
-#define MBX_READ_LA 0x15
-#define MBX_CLEAR_LA 0x16
-#define MBX_DUMP_MEMORY 0x17
-#define MBX_DUMP_CONTEXT 0x18
-#define MBX_RUN_DIAGS 0x19
-#define MBX_RESTART 0x1A
-#define MBX_UPDATE_CFG 0x1B
-#define MBX_DOWN_LOAD 0x1C
-#define MBX_DEL_LD_ENTRY 0x1D
-#define MBX_RUN_PROGRAM 0x1E
-#define MBX_SET_MASK 0x20
-#define MBX_SET_SLIM 0x21
-#define MBX_UNREG_D_ID 0x23
-#define MBX_CONFIG_FARP 0x25
-
-#define MBX_LOAD_AREA 0x81
-#define MBX_RUN_BIU_DIAG64 0x84
-#define MBX_CONFIG_PORT 0x88
-#define MBX_READ_SPARM64 0x8D
-#define MBX_READ_RPI64 0x8F
-#define MBX_REG_LOGIN64 0x93
-#define MBX_READ_LA64 0x95
-
-#define MBX_FLASH_WR_ULA 0x98
-#define MBX_SET_DEBUG 0x99
-#define MBX_LOAD_EXP_ROM 0x9C
-
-#define MBX_MAX_CMDS 0x9D
-#define MBX_SLI2_CMD_MASK 0x80
-
-/* IOCB Commands */
-
-#define CMD_RCV_SEQUENCE_CX 0x01
-#define CMD_XMIT_SEQUENCE_CR 0x02
-#define CMD_XMIT_SEQUENCE_CX 0x03
-#define CMD_XMIT_BCAST_CN 0x04
-#define CMD_XMIT_BCAST_CX 0x05
-#define CMD_QUE_RING_BUF_CN 0x06
-#define CMD_QUE_XRI_BUF_CX 0x07
-#define CMD_IOCB_CONTINUE_CN 0x08
-#define CMD_RET_XRI_BUF_CX 0x09
-#define CMD_ELS_REQUEST_CR 0x0A
-#define CMD_ELS_REQUEST_CX 0x0B
-#define CMD_RCV_ELS_REQ_CX 0x0D
-#define CMD_ABORT_XRI_CN 0x0E
-#define CMD_ABORT_XRI_CX 0x0F
-#define CMD_CLOSE_XRI_CN 0x10
-#define CMD_CLOSE_XRI_CX 0x11
-#define CMD_CREATE_XRI_CR 0x12
-#define CMD_CREATE_XRI_CX 0x13
-#define CMD_GET_RPI_CN 0x14
-#define CMD_XMIT_ELS_RSP_CX 0x15
-#define CMD_GET_RPI_CR 0x16
-#define CMD_XRI_ABORTED_CX 0x17
-#define CMD_FCP_IWRITE_CR 0x18
-#define CMD_FCP_IWRITE_CX 0x19
-#define CMD_FCP_IREAD_CR 0x1A
-#define CMD_FCP_IREAD_CX 0x1B
-#define CMD_FCP_ICMND_CR 0x1C
-#define CMD_FCP_ICMND_CX 0x1D
-
-#define CMD_ADAPTER_MSG 0x20
-#define CMD_ADAPTER_DUMP 0x22
-
-/* SLI_2 IOCB Command Set */
-
-#define CMD_RCV_SEQUENCE64_CX 0x81
-#define CMD_XMIT_SEQUENCE64_CR 0x82
-#define CMD_XMIT_SEQUENCE64_CX 0x83
-#define CMD_XMIT_BCAST64_CN 0x84
-#define CMD_XMIT_BCAST64_CX 0x85
-#define CMD_QUE_RING_BUF64_CN 0x86
-#define CMD_QUE_XRI_BUF64_CX 0x87
-#define CMD_IOCB_CONTINUE64_CN 0x88
-#define CMD_RET_XRI_BUF64_CX 0x89
-#define CMD_ELS_REQUEST64_CR 0x8A
-#define CMD_ELS_REQUEST64_CX 0x8B
-#define CMD_ABORT_MXRI64_CN 0x8C
-#define CMD_RCV_ELS_REQ64_CX 0x8D
-#define CMD_XMIT_ELS_RSP64_CX 0x95
-#define CMD_FCP_IWRITE64_CR 0x98
-#define CMD_FCP_IWRITE64_CX 0x99
-#define CMD_FCP_IREAD64_CR 0x9A
-#define CMD_FCP_IREAD64_CX 0x9B
-#define CMD_FCP_ICMND64_CR 0x9C
-#define CMD_FCP_ICMND64_CX 0x9D
-
-#define CMD_GEN_REQUEST64_CR 0xC2
-#define CMD_GEN_REQUEST64_CX 0xC3
-
-#define CMD_MAX_IOCB_CMD 0xE6
-#define CMD_IOCB_MASK 0xff
-
-#define MAX_MSG_DATA 28 /* max msg data in CMD_ADAPTER_MSG
- iocb */
-#define LPFC_MAX_ADPTMSG 32 /* max msg data */
-/*
- * Define Status
- */
-#define MBX_SUCCESS 0
-#define MBXERR_NUM_RINGS 1
-#define MBXERR_NUM_IOCBS 2
-#define MBXERR_IOCBS_EXCEEDED 3
-#define MBXERR_BAD_RING_NUMBER 4
-#define MBXERR_MASK_ENTRIES_RANGE 5
-#define MBXERR_MASKS_EXCEEDED 6
-#define MBXERR_BAD_PROFILE 7
-#define MBXERR_BAD_DEF_CLASS 8
-#define MBXERR_BAD_MAX_RESPONDER 9
-#define MBXERR_BAD_MAX_ORIGINATOR 10
-#define MBXERR_RPI_REGISTERED 11
-#define MBXERR_RPI_FULL 12
-#define MBXERR_NO_RESOURCES 13
-#define MBXERR_BAD_RCV_LENGTH 14
-#define MBXERR_DMA_ERROR 15
-#define MBXERR_ERROR 16
-#define MBX_NOT_FINISHED 255
-
-#define MBX_BUSY 0xffffff /* Attempted cmd to busy Mailbox */
-#define MBX_TIMEOUT 0xfffffe /* time-out expired waiting for */
-
-/*
- * Begin Structure Definitions for Mailbox Commands
- */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t tval;
- uint8_t tmask;
- uint8_t rval;
- uint8_t rmask;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t rmask;
- uint8_t rval;
- uint8_t tmask;
- uint8_t tval;
-#endif
-} RR_REG;
-
-struct ulp_bde {
- uint32_t bdeAddress;
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t bdeReserved:4;
- uint32_t bdeAddrHigh:4;
- uint32_t bdeSize:24;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t bdeSize:24;
- uint32_t bdeAddrHigh:4;
- uint32_t bdeReserved:4;
-#endif
-};
-
-struct ulp_bde64 { /* SLI-2 */
- union ULP_BDE_TUS {
- uint32_t w;
- struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
- VALUE !! */
- uint32_t bdeSize:24; /* Size of buffer (in bytes) */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t bdeSize:24; /* Size of buffer (in bytes) */
- uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
- VALUE !! */
-#endif
-
-#define BUFF_USE_RSVD 0x01 /* bdeFlags */
-#define BUFF_USE_INTRPT 0x02 /* Not Implemented with LP6000 */
-#define BUFF_USE_CMND 0x04 /* Optional, 1=cmd/rsp 0=data buffer */
-#define BUFF_USE_RCV 0x08 /* "" "", 1=rcv buffer, 0=xmit
- buffer */
-#define BUFF_TYPE_32BIT 0x10 /* "" "", 1=32 bit addr 0=64 bit
- addr */
-#define BUFF_TYPE_SPECIAL 0x20 /* Not Implemented with LP6000 */
-#define BUFF_TYPE_BDL 0x40 /* Optional, may be set in BDL */
-#define BUFF_TYPE_INVALID 0x80 /* "" "" */
- } f;
- } tus;
- uint32_t addrLow;
- uint32_t addrHigh;
-};
-#define BDE64_SIZE_WORD 0
-#define BPL64_SIZE_WORD 0x40
-
-typedef struct ULP_BDL { /* SLI-2 */
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t bdeFlags:8; /* BDL Flags */
- uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
- uint32_t bdeFlags:8; /* BDL Flags */
-#endif
-
- uint32_t addrLow; /* Address 0:31 */
- uint32_t addrHigh; /* Address 32:63 */
- uint32_t ulpIoTag32; /* Can be used for 32 bit I/O Tag */
-} ULP_BDL;
-
-/* Structure for MB Command LOAD_SM and DOWN_LOAD */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t rsvd2:25;
- uint32_t acknowledgment:1;
- uint32_t version:1;
- uint32_t erase_or_prog:1;
- uint32_t update_flash:1;
- uint32_t update_ram:1;
- uint32_t method:1;
- uint32_t load_cmplt:1;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t load_cmplt:1;
- uint32_t method:1;
- uint32_t update_ram:1;
- uint32_t update_flash:1;
- uint32_t erase_or_prog:1;
- uint32_t version:1;
- uint32_t acknowledgment:1;
- uint32_t rsvd2:25;
-#endif
-
- uint32_t dl_to_adr_low;
- uint32_t dl_to_adr_high;
- uint32_t dl_len;
- union {
- uint32_t dl_from_mbx_offset;
- struct ulp_bde dl_from_bde;
- struct ulp_bde64 dl_from_bde64;
- } un;
-
-} LOAD_SM_VAR;
-
-/* Structure for MB Command READ_NVPARM (02) */
-
-typedef struct {
- uint32_t rsvd1[3]; /* Read as all one's */
- uint32_t rsvd2; /* Read as all zero's */
- uint32_t portname[2]; /* N_PORT name */
- uint32_t nodename[2]; /* NODE name */
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t pref_DID:24;
- uint32_t hardAL_PA:8;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t hardAL_PA:8;
- uint32_t pref_DID:24;
-#endif
-
- uint32_t rsvd3[21]; /* Read as all one's */
-} READ_NV_VAR;
-
-/* Structure for MB Command WRITE_NVPARMS (03) */
-
-typedef struct {
- uint32_t rsvd1[3]; /* Must be all one's */
- uint32_t rsvd2; /* Must be all zero's */
- uint32_t portname[2]; /* N_PORT name */
- uint32_t nodename[2]; /* NODE name */
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t pref_DID:24;
- uint32_t hardAL_PA:8;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t hardAL_PA:8;
- uint32_t pref_DID:24;
-#endif
-
- uint32_t rsvd3[21]; /* Must be all one's */
-} WRITE_NV_VAR;
-
-/* Structure for MB Command RUN_BIU_DIAG (04) */
-/* Structure for MB Command RUN_BIU_DIAG64 (0x84) */
-
-typedef struct {
- uint32_t rsvd1;
- union {
- struct {
- struct ulp_bde xmit_bde;
- struct ulp_bde rcv_bde;
- } s1;
- struct {
- struct ulp_bde64 xmit_bde64;
- struct ulp_bde64 rcv_bde64;
- } s2;
- } un;
-} BIU_DIAG_VAR;
-
-/* Structure for MB Command INIT_LINK (05) */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t rsvd1:24;
- uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
- uint32_t rsvd1:24;
-#endif
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t fabric_AL_PA; /* If using a Fabric Assigned AL_PA */
- uint8_t rsvd2;
- uint16_t link_flags;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t link_flags;
- uint8_t rsvd2;
- uint8_t fabric_AL_PA; /* If using a Fabric Assigned AL_PA */
-#endif
-
-#define FLAGS_LOCAL_LB 0x01 /* link_flags (=1) ENDEC loopback */
-#define FLAGS_TOPOLOGY_MODE_LOOP_PT 0x00 /* Attempt loop then pt-pt */
-#define FLAGS_TOPOLOGY_MODE_PT_PT 0x02 /* Attempt pt-pt only */
-#define FLAGS_TOPOLOGY_MODE_LOOP 0x04 /* Attempt loop only */
-#define FLAGS_TOPOLOGY_MODE_PT_LOOP 0x06 /* Attempt pt-pt then loop */
-#define FLAGS_LIRP_LILP 0x80 /* LIRP / LILP is disabled */
-
-#define FLAGS_TOPOLOGY_FAILOVER 0x0400 /* Bit 10 */
-#define FLAGS_LINK_SPEED 0x0800 /* Bit 11 */
-
- uint32_t link_speed;
-#define LINK_SPEED_AUTO 0 /* Auto selection */
-#define LINK_SPEED_1G 1 /* 1 Gigabaud */
-#define LINK_SPEED_2G 2 /* 2 Gigabaud */
-#define LINK_SPEED_4G 4 /* 4 Gigabaud */
-#define LINK_SPEED_8G 8 /* 4 Gigabaud */
-#define LINK_SPEED_10G 16 /* 10 Gigabaud */
-
-} INIT_LINK_VAR;
-
-/* Structure for MB Command DOWN_LINK (06) */
-
-typedef struct {
- uint32_t rsvd1;
-} DOWN_LINK_VAR;
-
-/* Structure for MB Command CONFIG_LINK (07) */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t cr:1;
- uint32_t ci:1;
- uint32_t cr_delay:6;
- uint32_t cr_count:8;
- uint32_t rsvd1:8;
- uint32_t MaxBBC:8;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t MaxBBC:8;
- uint32_t rsvd1:8;
- uint32_t cr_count:8;
- uint32_t cr_delay:6;
- uint32_t ci:1;
- uint32_t cr:1;
-#endif
-
- uint32_t myId;
- uint32_t rsvd2;
- uint32_t edtov;
- uint32_t arbtov;
- uint32_t ratov;
- uint32_t rttov;
- uint32_t altov;
- uint32_t crtov;
- uint32_t citov;
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t rrq_enable:1;
- uint32_t rrq_immed:1;
- uint32_t rsvd4:29;
- uint32_t ack0_enable:1;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t ack0_enable:1;
- uint32_t rsvd4:29;
- uint32_t rrq_immed:1;
- uint32_t rrq_enable:1;
-#endif
-} CONFIG_LINK;
-
-/* Structure for MB Command PART_SLIM (08)
- * will be removed since SLI1 is no longer supported!
- */
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t offCiocb;
- uint16_t numCiocb;
- uint16_t offRiocb;
- uint16_t numRiocb;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t numCiocb;
- uint16_t offCiocb;
- uint16_t numRiocb;
- uint16_t offRiocb;
-#endif
-} RING_DEF;
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t unused1:24;
- uint32_t numRing:8;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t numRing:8;
- uint32_t unused1:24;
-#endif
-
- RING_DEF ringdef[4];
- uint32_t hbainit;
-} PART_SLIM_VAR;
-
-/* Structure for MB Command CONFIG_RING (09) */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t unused2:6;
- uint32_t recvSeq:1;
- uint32_t recvNotify:1;
- uint32_t numMask:8;
- uint32_t profile:8;
- uint32_t unused1:4;
- uint32_t ring:4;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t ring:4;
- uint32_t unused1:4;
- uint32_t profile:8;
- uint32_t numMask:8;
- uint32_t recvNotify:1;
- uint32_t recvSeq:1;
- uint32_t unused2:6;
-#endif
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t maxRespXchg;
- uint16_t maxOrigXchg;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t maxOrigXchg;
- uint16_t maxRespXchg;
-#endif
-
- RR_REG rrRegs[6];
-} CONFIG_RING_VAR;
-
-/* Structure for MB Command RESET_RING (10) */
-
-typedef struct {
- uint32_t ring_no;
-} RESET_RING_VAR;
-
-/* Structure for MB Command READ_CONFIG (11) */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t cr:1;
- uint32_t ci:1;
- uint32_t cr_delay:6;
- uint32_t cr_count:8;
- uint32_t InitBBC:8;
- uint32_t MaxBBC:8;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t MaxBBC:8;
- uint32_t InitBBC:8;
- uint32_t cr_count:8;
- uint32_t cr_delay:6;
- uint32_t ci:1;
- uint32_t cr:1;
-#endif
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t topology:8;
- uint32_t myDid:24;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t myDid:24;
- uint32_t topology:8;
-#endif
-
- /* Defines for topology (defined previously) */
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t AR:1;
- uint32_t IR:1;
- uint32_t rsvd1:29;
- uint32_t ack0:1;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t ack0:1;
- uint32_t rsvd1:29;
- uint32_t IR:1;
- uint32_t AR:1;
-#endif
-
- uint32_t edtov;
- uint32_t arbtov;
- uint32_t ratov;
- uint32_t rttov;
- uint32_t altov;
- uint32_t lmt;
-#define LMT_RESERVED 0x0 /* Not used */
-#define LMT_266_10bit 0x1 /* 265.625 Mbaud 10 bit iface */
-#define LMT_532_10bit 0x2 /* 531.25 Mbaud 10 bit iface */
-#define LMT_1063_20bit 0x3 /* 1062.5 Mbaud 20 bit iface */
-#define LMT_1063_10bit 0x4 /* 1062.5 Mbaud 10 bit iface */
-#define LMT_2125_10bit 0x8 /* 2125 Mbaud 10 bit iface */
-#define LMT_4250_10bit 0x40 /* 4250 Mbaud 10 bit iface */
-
- uint32_t rsvd2;
- uint32_t rsvd3;
- uint32_t max_xri;
- uint32_t max_iocb;
- uint32_t max_rpi;
- uint32_t avail_xri;
- uint32_t avail_iocb;
- uint32_t avail_rpi;
- uint32_t default_rpi;
-} READ_CONFIG_VAR;
-
-/* Structure for MB Command READ_RCONFIG (12) */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t rsvd2:7;
- uint32_t recvNotify:1;
- uint32_t numMask:8;
- uint32_t profile:8;
- uint32_t rsvd1:4;
- uint32_t ring:4;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t ring:4;
- uint32_t rsvd1:4;
- uint32_t profile:8;
- uint32_t numMask:8;
- uint32_t recvNotify:1;
- uint32_t rsvd2:7;
-#endif
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t maxResp;
- uint16_t maxOrig;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t maxOrig;
- uint16_t maxResp;
-#endif
-
- RR_REG rrRegs[6];
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t cmdRingOffset;
- uint16_t cmdEntryCnt;
- uint16_t rspRingOffset;
- uint16_t rspEntryCnt;
- uint16_t nextCmdOffset;
- uint16_t rsvd3;
- uint16_t nextRspOffset;
- uint16_t rsvd4;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t cmdEntryCnt;
- uint16_t cmdRingOffset;
- uint16_t rspEntryCnt;
- uint16_t rspRingOffset;
- uint16_t rsvd3;
- uint16_t nextCmdOffset;
- uint16_t rsvd4;
- uint16_t nextRspOffset;
-#endif
-} READ_RCONF_VAR;
-
-/* Structure for MB Command READ_SPARM (13) */
-/* Structure for MB Command READ_SPARM64 (0x8D) */
-
-typedef struct {
- uint32_t rsvd1;
- uint32_t rsvd2;
- union {
- struct ulp_bde sp; /* This BDE points to struct serv_parm
- structure */
- struct ulp_bde64 sp64;
- } un;
-} READ_SPARM_VAR;
-
-/* Structure for MB Command READ_STATUS (14) */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t rsvd1:31;
- uint32_t clrCounters:1;
- uint16_t activeXriCnt;
- uint16_t activeRpiCnt;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t clrCounters:1;
- uint32_t rsvd1:31;
- uint16_t activeRpiCnt;
- uint16_t activeXriCnt;
-#endif
-
- uint32_t xmitByteCnt;
- uint32_t rcvByteCnt;
- uint32_t xmitFrameCnt;
- uint32_t rcvFrameCnt;
- uint32_t xmitSeqCnt;
- uint32_t rcvSeqCnt;
- uint32_t totalOrigExchanges;
- uint32_t totalRespExchanges;
- uint32_t rcvPbsyCnt;
- uint32_t rcvFbsyCnt;
-} READ_STATUS_VAR;
-
-/* Structure for MB Command READ_RPI (15) */
-/* Structure for MB Command READ_RPI64 (0x8F) */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t nextRpi;
- uint16_t reqRpi;
- uint32_t rsvd2:8;
- uint32_t DID:24;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t reqRpi;
- uint16_t nextRpi;
- uint32_t DID:24;
- uint32_t rsvd2:8;
-#endif
-
- union {
- struct ulp_bde sp;
- struct ulp_bde64 sp64;
- } un;
-
-} READ_RPI_VAR;
-
-/* Structure for MB Command READ_XRI (16) */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t nextXri;
- uint16_t reqXri;
- uint16_t rsvd1;
- uint16_t rpi;
- uint32_t rsvd2:8;
- uint32_t DID:24;
- uint32_t rsvd3:8;
- uint32_t SID:24;
- uint32_t rsvd4;
- uint8_t seqId;
- uint8_t rsvd5;
- uint16_t seqCount;
- uint16_t oxId;
- uint16_t rxId;
- uint32_t rsvd6:30;
- uint32_t si:1;
- uint32_t exchOrig:1;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t reqXri;
- uint16_t nextXri;
- uint16_t rpi;
- uint16_t rsvd1;
- uint32_t DID:24;
- uint32_t rsvd2:8;
- uint32_t SID:24;
- uint32_t rsvd3:8;
- uint32_t rsvd4;
- uint16_t seqCount;
- uint8_t rsvd5;
- uint8_t seqId;
- uint16_t rxId;
- uint16_t oxId;
- uint32_t exchOrig:1;
- uint32_t si:1;
- uint32_t rsvd6:30;
-#endif
-} READ_XRI_VAR;
-
-/* Structure for MB Command READ_REV (17) */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t cv:1;
- uint32_t rr:1;
- uint32_t rsvd1:29;
- uint32_t rv:1;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t rv:1;
- uint32_t rsvd1:29;
- uint32_t rr:1;
- uint32_t cv:1;
-#endif
-
- uint32_t biuRev;
- uint32_t smRev;
- union {
- uint32_t smFwRev;
- struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t ProgType;
- uint8_t ProgId;
- uint16_t ProgVer:4;
- uint16_t ProgRev:4;
- uint16_t ProgFixLvl:2;
- uint16_t ProgDistType:2;
- uint16_t DistCnt:4;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t DistCnt:4;
- uint16_t ProgDistType:2;
- uint16_t ProgFixLvl:2;
- uint16_t ProgRev:4;
- uint16_t ProgVer:4;
- uint8_t ProgId;
- uint8_t ProgType;
-#endif
-
- } b;
- } un;
- uint32_t endecRev;
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t feaLevelHigh;
- uint8_t feaLevelLow;
- uint8_t fcphHigh;
- uint8_t fcphLow;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t fcphLow;
- uint8_t fcphHigh;
- uint8_t feaLevelLow;
- uint8_t feaLevelHigh;
-#endif
-
- uint32_t postKernRev;
- uint32_t opFwRev;
- uint8_t opFwName[16];
- uint32_t sli1FwRev;
- uint8_t sli1FwName[16];
- uint32_t sli2FwRev;
- uint8_t sli2FwName[16];
- uint32_t rsvd2;
- uint32_t RandomData[7];
-} READ_REV_VAR;
-
-/* Structure for MB Command READ_LINK_STAT (18) */
-
-typedef struct {
- uint32_t rsvd1;
- uint32_t linkFailureCnt;
- uint32_t lossSyncCnt;
-
- uint32_t lossSignalCnt;
- uint32_t primSeqErrCnt;
- uint32_t invalidXmitWord;
- uint32_t crcCnt;
- uint32_t primSeqTimeout;
- uint32_t elasticOverrun;
- uint32_t arbTimeout;
-} READ_LNK_VAR;
-
-/* Structure for MB Command REG_LOGIN (19) */
-/* Structure for MB Command REG_LOGIN64 (0x93) */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t rsvd1;
- uint16_t rpi;
- uint32_t rsvd2:8;
- uint32_t did:24;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t rpi;
- uint16_t rsvd1;
- uint32_t did:24;
- uint32_t rsvd2:8;
-#endif
-
- union {
- struct ulp_bde sp;
- struct ulp_bde64 sp64;
- } un;
-
-} REG_LOGIN_VAR;
-
-/* Word 30 contents for REG_LOGIN */
-typedef union {
- struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t rsvd1:12;
- uint16_t wd30_class:4;
- uint16_t xri;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t xri;
- uint16_t wd30_class:4;
- uint16_t rsvd1:12;
-#endif
- } f;
- uint32_t word;
-} REG_WD30;
-
-/* Structure for MB Command UNREG_LOGIN (20) */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t rsvd1;
- uint16_t rpi;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t rpi;
- uint16_t rsvd1;
-#endif
-} UNREG_LOGIN_VAR;
-
-/* Structure for MB Command UNREG_D_ID (0x23) */
-
-typedef struct {
- uint32_t did;
-} UNREG_D_ID_VAR;
-
-/* Structure for MB Command READ_LA (21) */
-/* Structure for MB Command READ_LA64 (0x95) */
-
-typedef struct {
- uint32_t eventTag; /* Event tag */
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t rsvd1:22;
- uint32_t pb:1;
- uint32_t il:1;
- uint32_t attType:8;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t attType:8;
- uint32_t il:1;
- uint32_t pb:1;
- uint32_t rsvd1:22;
-#endif
-
-#define AT_RESERVED 0x00 /* Reserved - attType */
-#define AT_LINK_UP 0x01 /* Link is up */
-#define AT_LINK_DOWN 0x02 /* Link is down */
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t granted_AL_PA;
- uint8_t lipAlPs;
- uint8_t lipType;
- uint8_t topology;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t topology;
- uint8_t lipType;
- uint8_t lipAlPs;
- uint8_t granted_AL_PA;
-#endif
-
-#define TOPOLOGY_PT_PT 0x01 /* Topology is pt-pt / pt-fabric */
-#define TOPOLOGY_LOOP 0x02 /* Topology is FC-AL */
-
- union {
- struct ulp_bde lilpBde; /* This BDE points to a 128 byte buffer
- to */
- /* store the LILP AL_PA position map into */
- struct ulp_bde64 lilpBde64;
- } un;
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t Dlu:1;
- uint32_t Dtf:1;
- uint32_t Drsvd2:14;
- uint32_t DlnkSpeed:8;
- uint32_t DnlPort:4;
- uint32_t Dtx:2;
- uint32_t Drx:2;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t Drx:2;
- uint32_t Dtx:2;
- uint32_t DnlPort:4;
- uint32_t DlnkSpeed:8;
- uint32_t Drsvd2:14;
- uint32_t Dtf:1;
- uint32_t Dlu:1;
-#endif
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t Ulu:1;
- uint32_t Utf:1;
- uint32_t Ursvd2:14;
- uint32_t UlnkSpeed:8;
- uint32_t UnlPort:4;
- uint32_t Utx:2;
- uint32_t Urx:2;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t Urx:2;
- uint32_t Utx:2;
- uint32_t UnlPort:4;
- uint32_t UlnkSpeed:8;
- uint32_t Ursvd2:14;
- uint32_t Utf:1;
- uint32_t Ulu:1;
-#endif
-
-#define LA_UNKNW_LINK 0x0 /* lnkSpeed */
-#define LA_1GHZ_LINK 0x04 /* lnkSpeed */
-#define LA_2GHZ_LINK 0x08 /* lnkSpeed */
-#define LA_4GHZ_LINK 0x10 /* lnkSpeed */
-#define LA_8GHZ_LINK 0x20 /* lnkSpeed */
-#define LA_10GHZ_LINK 0x40 /* lnkSpeed */
-
-} READ_LA_VAR;
-
-/* Structure for MB Command CLEAR_LA (22) */
-
-typedef struct {
- uint32_t eventTag; /* Event tag */
- uint32_t rsvd1;
-} CLEAR_LA_VAR;
-
-/* Structure for MB Command DUMP */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t rsvd:25;
- uint32_t ra:1;
- uint32_t co:1;
- uint32_t cv:1;
- uint32_t type:4;
- uint32_t entry_index:16;
- uint32_t region_id:16;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t type:4;
- uint32_t cv:1;
- uint32_t co:1;
- uint32_t ra:1;
- uint32_t rsvd:25;
- uint32_t region_id:16;
- uint32_t entry_index:16;
-#endif
-
- uint32_t rsvd1;
- uint32_t word_cnt;
- uint32_t resp_offset;
-} DUMP_VAR;
-
-#define DMP_MEM_REG 0x1
-#define DMP_NV_PARAMS 0x2
-
-#define DMP_REGION_VPD 0xe
-#define DMP_VPD_SIZE 0x100
-
-/* Structure for MB Command CONFIG_PORT (0x88) */
-
-typedef struct {
- uint32_t pcbLen;
- uint32_t pcbLow; /* bit 31:0 of memory based port config block */
- uint32_t pcbHigh; /* bit 63:32 of memory based port config block */
- uint32_t hbainit[5];
-} CONFIG_PORT_VAR;
-
-/* SLI-2 Port Control Block */
-
-/* SLIM POINTER */
-#define SLIMOFF 0x30 /* WORD */
-
-typedef struct _SLI2_RDSC {
- uint32_t cmdEntries;
- uint32_t cmdAddrLow;
- uint32_t cmdAddrHigh;
-
- uint32_t rspEntries;
- uint32_t rspAddrLow;
- uint32_t rspAddrHigh;
-} SLI2_RDSC;
-
-typedef struct _PCB {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t type:8;
-#define TYPE_NATIVE_SLI2 0x01;
- uint32_t feature:8;
-#define FEATURE_INITIAL_SLI2 0x01;
- uint32_t rsvd:12;
- uint32_t maxRing:4;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t maxRing:4;
- uint32_t rsvd:12;
- uint32_t feature:8;
-#define FEATURE_INITIAL_SLI2 0x01;
- uint32_t type:8;
-#define TYPE_NATIVE_SLI2 0x01;
-#endif
-
- uint32_t mailBoxSize;
- uint32_t mbAddrLow;
- uint32_t mbAddrHigh;
-
- uint32_t hgpAddrLow;
- uint32_t hgpAddrHigh;
-
- uint32_t pgpAddrLow;
- uint32_t pgpAddrHigh;
- SLI2_RDSC rdsc[MAX_RINGS];
-} PCB_t;
-
-/* NEW_FEATURE */
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t rsvd0:27;
- uint32_t discardFarp:1;
- uint32_t IPEnable:1;
- uint32_t nodeName:1;
- uint32_t portName:1;
- uint32_t filterEnable:1;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t filterEnable:1;
- uint32_t portName:1;
- uint32_t nodeName:1;
- uint32_t IPEnable:1;
- uint32_t discardFarp:1;
- uint32_t rsvd:27;
-#endif
-
- uint8_t portname[8]; /* Used to be struct lpfc_name */
- uint8_t nodename[8];
- uint32_t rsvd1;
- uint32_t rsvd2;
- uint32_t rsvd3;
- uint32_t IPAddress;
-} CONFIG_FARP_VAR;
-
-/* Union of all Mailbox Command types */
-#define MAILBOX_CMD_WSIZE 32
-
-typedef union {
- uint32_t varWords[MAILBOX_CMD_WSIZE - 1];
- LOAD_SM_VAR varLdSM; /* cmd = 1 (LOAD_SM) */
- READ_NV_VAR varRDnvp; /* cmd = 2 (READ_NVPARMS) */
- WRITE_NV_VAR varWTnvp; /* cmd = 3 (WRITE_NVPARMS) */
- BIU_DIAG_VAR varBIUdiag; /* cmd = 4 (RUN_BIU_DIAG) */
- INIT_LINK_VAR varInitLnk; /* cmd = 5 (INIT_LINK) */
- DOWN_LINK_VAR varDwnLnk; /* cmd = 6 (DOWN_LINK) */
- CONFIG_LINK varCfgLnk; /* cmd = 7 (CONFIG_LINK) */
- PART_SLIM_VAR varSlim; /* cmd = 8 (PART_SLIM) */
- CONFIG_RING_VAR varCfgRing; /* cmd = 9 (CONFIG_RING) */
- RESET_RING_VAR varRstRing; /* cmd = 10 (RESET_RING) */
- READ_CONFIG_VAR varRdConfig; /* cmd = 11 (READ_CONFIG) */
- READ_RCONF_VAR varRdRConfig; /* cmd = 12 (READ_RCONFIG) */
- READ_SPARM_VAR varRdSparm; /* cmd = 13 (READ_SPARM(64)) */
- READ_STATUS_VAR varRdStatus; /* cmd = 14 (READ_STATUS) */
- READ_RPI_VAR varRdRPI; /* cmd = 15 (READ_RPI(64)) */
- READ_XRI_VAR varRdXRI; /* cmd = 16 (READ_XRI) */
- READ_REV_VAR varRdRev; /* cmd = 17 (READ_REV) */
- READ_LNK_VAR varRdLnk; /* cmd = 18 (READ_LNK_STAT) */
- REG_LOGIN_VAR varRegLogin; /* cmd = 19 (REG_LOGIN(64)) */
- UNREG_LOGIN_VAR varUnregLogin; /* cmd = 20 (UNREG_LOGIN) */
- READ_LA_VAR varReadLA; /* cmd = 21 (READ_LA(64)) */
- CLEAR_LA_VAR varClearLA; /* cmd = 22 (CLEAR_LA) */
- DUMP_VAR varDmp; /* Warm Start DUMP mbx cmd */
- UNREG_D_ID_VAR varUnregDID; /* cmd = 0x23 (UNREG_D_ID) */
- CONFIG_FARP_VAR varCfgFarp; /* cmd = 0x25 (CONFIG_FARP) NEW_FEATURE */
- CONFIG_PORT_VAR varCfgPort; /* cmd = 0x88 (CONFIG_PORT) */
-} MAILVARIANTS;
-
-/*
- * SLI-2 specific structures
- */
-
-typedef struct {
- uint32_t cmdPutInx;
- uint32_t rspGetInx;
-} HGP;
-
-typedef struct {
- uint32_t cmdGetInx;
- uint32_t rspPutInx;
-} PGP;
-
-typedef struct _SLI2_DESC {
- HGP host[MAX_RINGS];
- uint32_t unused1[16];
- PGP port[MAX_RINGS];
-} SLI2_DESC;
-
-typedef union {
- SLI2_DESC s2;
-} SLI_VAR;
-
-typedef volatile struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t mbxStatus;
- uint8_t mbxCommand;
- uint8_t mbxReserved:6;
- uint8_t mbxHc:1;
- uint8_t mbxOwner:1; /* Low order bit first word */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t mbxOwner:1; /* Low order bit first word */
- uint8_t mbxHc:1;
- uint8_t mbxReserved:6;
- uint8_t mbxCommand;
- uint16_t mbxStatus;
-#endif
-
- MAILVARIANTS un;
- SLI_VAR us;
-} MAILBOX_t;
-
-/*
- * Begin Structure Definitions for IOCB Commands
- */
-
-typedef struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t statAction;
- uint8_t statRsn;
- uint8_t statBaExp;
- uint8_t statLocalError;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t statLocalError;
- uint8_t statBaExp;
- uint8_t statRsn;
- uint8_t statAction;
-#endif
- /* statRsn P/F_RJT reason codes */
-#define RJT_BAD_D_ID 0x01 /* Invalid D_ID field */
-#define RJT_BAD_S_ID 0x02 /* Invalid S_ID field */
-#define RJT_UNAVAIL_TEMP 0x03 /* N_Port unavailable temp. */
-#define RJT_UNAVAIL_PERM 0x04 /* N_Port unavailable perm. */
-#define RJT_UNSUP_CLASS 0x05 /* Class not supported */
-#define RJT_DELIM_ERR 0x06 /* Delimiter usage error */
-#define RJT_UNSUP_TYPE 0x07 /* Type not supported */
-#define RJT_BAD_CONTROL 0x08 /* Invalid link conrtol */
-#define RJT_BAD_RCTL 0x09 /* R_CTL invalid */
-#define RJT_BAD_FCTL 0x0A /* F_CTL invalid */
-#define RJT_BAD_OXID 0x0B /* OX_ID invalid */
-#define RJT_BAD_RXID 0x0C /* RX_ID invalid */
-#define RJT_BAD_SEQID 0x0D /* SEQ_ID invalid */
-#define RJT_BAD_DFCTL 0x0E /* DF_CTL invalid */
-#define RJT_BAD_SEQCNT 0x0F /* SEQ_CNT invalid */
-#define RJT_BAD_PARM 0x10 /* Param. field invalid */
-#define RJT_XCHG_ERR 0x11 /* Exchange error */
-#define RJT_PROT_ERR 0x12 /* Protocol error */
-#define RJT_BAD_LENGTH 0x13 /* Invalid Length */
-#define RJT_UNEXPECTED_ACK 0x14 /* Unexpected ACK */
-#define RJT_LOGIN_REQUIRED 0x16 /* Login required */
-#define RJT_TOO_MANY_SEQ 0x17 /* Excessive sequences */
-#define RJT_XCHG_NOT_STRT 0x18 /* Exchange not started */
-#define RJT_UNSUP_SEC_HDR 0x19 /* Security hdr not supported */
-#define RJT_UNAVAIL_PATH 0x1A /* Fabric Path not available */
-#define RJT_VENDOR_UNIQUE 0xFF /* Vendor unique error */
-
-#define IOERR_SUCCESS 0x00 /* statLocalError */
-#define IOERR_MISSING_CONTINUE 0x01
-#define IOERR_SEQUENCE_TIMEOUT 0x02
-#define IOERR_INTERNAL_ERROR 0x03
-#define IOERR_INVALID_RPI 0x04
-#define IOERR_NO_XRI 0x05
-#define IOERR_ILLEGAL_COMMAND 0x06
-#define IOERR_XCHG_DROPPED 0x07
-#define IOERR_ILLEGAL_FIELD 0x08
-#define IOERR_BAD_CONTINUE 0x09
-#define IOERR_TOO_MANY_BUFFERS 0x0A
-#define IOERR_RCV_BUFFER_WAITING 0x0B
-#define IOERR_NO_CONNECTION 0x0C
-#define IOERR_TX_DMA_FAILED 0x0D
-#define IOERR_RX_DMA_FAILED 0x0E
-#define IOERR_ILLEGAL_FRAME 0x0F
-#define IOERR_EXTRA_DATA 0x10
-#define IOERR_NO_RESOURCES 0x11
-#define IOERR_RESERVED 0x12
-#define IOERR_ILLEGAL_LENGTH 0x13
-#define IOERR_UNSUPPORTED_FEATURE 0x14
-#define IOERR_ABORT_IN_PROGRESS 0x15
-#define IOERR_ABORT_REQUESTED 0x16
-#define IOERR_RECEIVE_BUFFER_TIMEOUT 0x17
-#define IOERR_LOOP_OPEN_FAILURE 0x18
-#define IOERR_RING_RESET 0x19
-#define IOERR_LINK_DOWN 0x1A
-#define IOERR_CORRUPTED_DATA 0x1B
-#define IOERR_CORRUPTED_RPI 0x1C
-#define IOERR_OUT_OF_ORDER_DATA 0x1D
-#define IOERR_OUT_OF_ORDER_ACK 0x1E
-#define IOERR_DUP_FRAME 0x1F
-#define IOERR_LINK_CONTROL_FRAME 0x20 /* ACK_N received */
-#define IOERR_BAD_HOST_ADDRESS 0x21
-#define IOERR_RCV_HDRBUF_WAITING 0x22
-#define IOERR_MISSING_HDR_BUFFER 0x23
-#define IOERR_MSEQ_CHAIN_CORRUPTED 0x24
-#define IOERR_ABORTMULT_REQUESTED 0x25
-#define IOERR_BUFFER_SHORTAGE 0x28
-#define IOERR_DEFAULT 0x29
-#define IOERR_CNT 0x2A
-
-#define IOERR_DRVR_MASK 0x100
-#define IOERR_SLI_DOWN 0x101 /* ulpStatus - Driver defined */
-#define IOERR_SLI_BRESET 0x102
-#define IOERR_SLI_ABORTED 0x103
-} PARM_ERR;
-
-typedef union {
- struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t Rctl; /* R_CTL field */
- uint8_t Type; /* TYPE field */
- uint8_t Dfctl; /* DF_CTL field */
- uint8_t Fctl; /* Bits 0-7 of IOCB word 5 */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t Fctl; /* Bits 0-7 of IOCB word 5 */
- uint8_t Dfctl; /* DF_CTL field */
- uint8_t Type; /* TYPE field */
- uint8_t Rctl; /* R_CTL field */
-#endif
-
-#define BC 0x02 /* Broadcast Received - Fctl */
-#define SI 0x04 /* Sequence Initiative */
-#define LA 0x08 /* Ignore Link Attention state */
-#define LS 0x80 /* Last Sequence */
- } hcsw;
- uint32_t reserved;
-} WORD5;
-
-/* IOCB Command template for a generic response */
-typedef struct {
- uint32_t reserved[4];
- PARM_ERR perr;
-} GENERIC_RSP;
-
-/* IOCB Command template for XMIT / XMIT_BCAST / RCV_SEQUENCE / XMIT_ELS */
-typedef struct {
- struct ulp_bde xrsqbde[2];
- uint32_t xrsqRo; /* Starting Relative Offset */
- WORD5 w5; /* Header control/status word */
-} XR_SEQ_FIELDS;
-
-/* IOCB Command template for ELS_REQUEST */
-typedef struct {
- struct ulp_bde elsReq;
- struct ulp_bde elsRsp;
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t word4Rsvd:7;
- uint32_t fl:1;
- uint32_t myID:24;
- uint32_t word5Rsvd:8;
- uint32_t remoteID:24;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t myID:24;
- uint32_t fl:1;
- uint32_t word4Rsvd:7;
- uint32_t remoteID:24;
- uint32_t word5Rsvd:8;
-#endif
-} ELS_REQUEST;
-
-/* IOCB Command template for RCV_ELS_REQ */
-typedef struct {
- struct ulp_bde elsReq[2];
- uint32_t parmRo;
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t word5Rsvd:8;
- uint32_t remoteID:24;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t remoteID:24;
- uint32_t word5Rsvd:8;
-#endif
-} RCV_ELS_REQ;
-
-/* IOCB Command template for ABORT / CLOSE_XRI */
-typedef struct {
- uint32_t rsvd[3];
- uint32_t abortType;
-#define ABORT_TYPE_ABTX 0x00000000
-#define ABORT_TYPE_ABTS 0x00000001
- uint32_t parm;
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t abortContextTag; /* ulpContext from command to abort/close */
- uint16_t abortIoTag; /* ulpIoTag from command to abort/close */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t abortIoTag; /* ulpIoTag from command to abort/close */
- uint16_t abortContextTag; /* ulpContext from command to abort/close */
-#endif
-} AC_XRI;
-
-/* IOCB Command template for ABORT_MXRI64 */
-typedef struct {
- uint32_t rsvd[3];
- uint32_t abortType;
- uint32_t parm;
- uint32_t iotag32;
-} A_MXRI64;
-
-/* IOCB Command template for GET_RPI */
-typedef struct {
- uint32_t rsvd[4];
- uint32_t parmRo;
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t word5Rsvd:8;
- uint32_t remoteID:24;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t remoteID:24;
- uint32_t word5Rsvd:8;
-#endif
-} GET_RPI;
-
-/* IOCB Command template for all FCP Initiator commands */
-typedef struct {
- struct ulp_bde fcpi_cmnd; /* FCP_CMND payload descriptor */
- struct ulp_bde fcpi_rsp; /* Rcv buffer */
- uint32_t fcpi_parm;
- uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
-} FCPI_FIELDS;
-
-/* IOCB Command template for all FCP Target commands */
-typedef struct {
- struct ulp_bde fcpt_Buffer[2]; /* FCP_CMND payload descriptor */
- uint32_t fcpt_Offset;
- uint32_t fcpt_Length; /* transfer ready for IWRITE */
-} FCPT_FIELDS;
-
-/* SLI-2 IOCB structure definitions */
-
-/* IOCB Command template for 64 bit XMIT / XMIT_BCAST / XMIT_ELS */
-typedef struct {
- ULP_BDL bdl;
- uint32_t xrsqRo; /* Starting Relative Offset */
- WORD5 w5; /* Header control/status word */
-} XMT_SEQ_FIELDS64;
-
-/* IOCB Command template for 64 bit RCV_SEQUENCE64 */
-typedef struct {
- struct ulp_bde64 rcvBde;
- uint32_t rsvd1;
- uint32_t xrsqRo; /* Starting Relative Offset */
- WORD5 w5; /* Header control/status word */
-} RCV_SEQ_FIELDS64;
-
-/* IOCB Command template for ELS_REQUEST64 */
-typedef struct {
- ULP_BDL bdl;
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t word4Rsvd:7;
- uint32_t fl:1;
- uint32_t myID:24;
- uint32_t word5Rsvd:8;
- uint32_t remoteID:24;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t myID:24;
- uint32_t fl:1;
- uint32_t word4Rsvd:7;
- uint32_t remoteID:24;
- uint32_t word5Rsvd:8;
-#endif
-} ELS_REQUEST64;
-
-/* IOCB Command template for GEN_REQUEST64 */
-typedef struct {
- ULP_BDL bdl;
- uint32_t xrsqRo; /* Starting Relative Offset */
- WORD5 w5; /* Header control/status word */
-} GEN_REQUEST64;
-
-/* IOCB Command template for RCV_ELS_REQ64 */
-typedef struct {
- struct ulp_bde64 elsReq;
- uint32_t rcvd1;
- uint32_t parmRo;
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t word5Rsvd:8;
- uint32_t remoteID:24;
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t remoteID:24;
- uint32_t word5Rsvd:8;
-#endif
-} RCV_ELS_REQ64;
-
-/* IOCB Command template for all 64 bit FCP Initiator commands */
-typedef struct {
- ULP_BDL bdl;
- uint32_t fcpi_parm;
- uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
-} FCPI_FIELDS64;
-
-/* IOCB Command template for all 64 bit FCP Target commands */
-typedef struct {
- ULP_BDL bdl;
- uint32_t fcpt_Offset;
- uint32_t fcpt_Length; /* transfer ready for IWRITE */
-} FCPT_FIELDS64;
-
-typedef volatile struct _IOCB { /* IOCB structure */
- union {
- GENERIC_RSP grsp; /* Generic response */
- XR_SEQ_FIELDS xrseq; /* XMIT / BCAST / RCV_SEQUENCE cmd */
- struct ulp_bde cont[3]; /* up to 3 continuation bdes */
- RCV_ELS_REQ rcvels; /* RCV_ELS_REQ template */
- AC_XRI acxri; /* ABORT / CLOSE_XRI template */
- A_MXRI64 amxri; /* abort multiple xri command overlay */
- GET_RPI getrpi; /* GET_RPI template */
- FCPI_FIELDS fcpi; /* FCP Initiator template */
- FCPT_FIELDS fcpt; /* FCP target template */
-
- /* SLI-2 structures */
-
- struct ulp_bde64 cont64[2]; /* up to 2 64 bit continuation
- bde_64s */
- ELS_REQUEST64 elsreq64; /* ELS_REQUEST template */
- GEN_REQUEST64 genreq64; /* GEN_REQUEST template */
- RCV_ELS_REQ64 rcvels64; /* RCV_ELS_REQ template */
- XMT_SEQ_FIELDS64 xseq64; /* XMIT / BCAST cmd */
- FCPI_FIELDS64 fcpi64; /* FCP 64 bit Initiator template */
- FCPT_FIELDS64 fcpt64; /* FCP 64 bit target template */
-
- uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */
- } un;
- union {
- struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t ulpContext; /* High order bits word 6 */
- uint16_t ulpIoTag; /* Low order bits word 6 */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t ulpIoTag; /* Low order bits word 6 */
- uint16_t ulpContext; /* High order bits word 6 */
-#endif
- } t1;
- struct {
-#ifdef __BIG_ENDIAN_BITFIELD
- uint16_t ulpContext; /* High order bits word 6 */
- uint16_t ulpIoTag1:2; /* Low order bits word 6 */
- uint16_t ulpIoTag0:14; /* Low order bits word 6 */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint16_t ulpIoTag0:14; /* Low order bits word 6 */
- uint16_t ulpIoTag1:2; /* Low order bits word 6 */
- uint16_t ulpContext; /* High order bits word 6 */
-#endif
- } t2;
- } un1;
-#define ulpContext un1.t1.ulpContext
-#define ulpIoTag un1.t1.ulpIoTag
-#define ulpIoTag0 un1.t2.ulpIoTag0
-
-#ifdef __BIG_ENDIAN_BITFIELD
- uint32_t ulpTimeout:8;
- uint32_t ulpXS:1;
- uint32_t ulpFCP2Rcvy:1;
- uint32_t ulpPU:2;
- uint32_t ulpIr:1;
- uint32_t ulpClass:3;
- uint32_t ulpCommand:8;
- uint32_t ulpStatus:4;
- uint32_t ulpBdeCount:2;
- uint32_t ulpLe:1;
- uint32_t ulpOwner:1; /* Low order bit word 7 */
-#else /* __LITTLE_ENDIAN_BITFIELD */
- uint32_t ulpOwner:1; /* Low order bit word 7 */
- uint32_t ulpLe:1;
- uint32_t ulpBdeCount:2;
- uint32_t ulpStatus:4;
- uint32_t ulpCommand:8;
- uint32_t ulpClass:3;
- uint32_t ulpIr:1;
- uint32_t ulpPU:2;
- uint32_t ulpFCP2Rcvy:1;
- uint32_t ulpXS:1;
- uint32_t ulpTimeout:8;
-#endif
-
-#define PARM_UNUSED 0 /* PU field (Word 4) not used */
-#define PARM_REL_OFF 1 /* PU field (Word 4) = R. O. */
-#define PARM_READ_CHECK 2 /* PU field (Word 4) = Data Transfer Length */
-#define CLASS1 0 /* Class 1 */
-#define CLASS2 1 /* Class 2 */
-#define CLASS3 2 /* Class 3 */
-#define CLASS_FCP_INTERMIX 7 /* FCP Data->Cls 1, all else->Cls 2 */
-
-#define IOSTAT_SUCCESS 0x0 /* ulpStatus - HBA defined */
-#define IOSTAT_FCP_RSP_ERROR 0x1
-#define IOSTAT_REMOTE_STOP 0x2
-#define IOSTAT_LOCAL_REJECT 0x3
-#define IOSTAT_NPORT_RJT 0x4
-#define IOSTAT_FABRIC_RJT 0x5
-#define IOSTAT_NPORT_BSY 0x6
-#define IOSTAT_FABRIC_BSY 0x7
-#define IOSTAT_INTERMED_RSP 0x8
-#define IOSTAT_LS_RJT 0x9
-#define IOSTAT_BA_RJT 0xA
-#define IOSTAT_RSVD1 0xB
-#define IOSTAT_RSVD2 0xC
-#define IOSTAT_RSVD3 0xD
-#define IOSTAT_RSVD4 0xE
-#define IOSTAT_RSVD5 0xF
-#define IOSTAT_DRIVER_REJECT 0x10 /* ulpStatus - Driver defined */
-#define IOSTAT_DEFAULT 0xF /* Same as rsvd5 for now */
-#define IOSTAT_CNT 0x11
-
-} IOCB_t;
-
-
-#define SLI1_SLIM_SIZE (4 * 1024)
-
-/* Up to 498 IOCBs will fit into 16k
- * 256 (MAILBOX_t) + 140 (PCB_t) + ( 32 (IOCB_t) * 498 ) = < 16384
- */
-#define SLI2_SLIM_SIZE (16 * 1024)
-
-/* Maximum IOCBs that will fit in SLI2 slim */
-#define MAX_SLI2_IOCB 498
-
-struct lpfc_sli2_slim {
- MAILBOX_t mbx;
- PCB_t pcb;
- IOCB_t IOCBs[MAX_SLI2_IOCB];
-};
-
-/*******************************************************************
-This macro check PCI device to allow special handling for LC HBAs.
-
-Parameters:
-device : struct pci_dev 's device field
-
-return 1 => TRUE
- 0 => FALSE
- *******************************************************************/
-static inline int
-lpfc_is_LC_HBA(unsigned short device)
-{
- if ((device == PCI_DEVICE_ID_TFLY) ||
- (device == PCI_DEVICE_ID_PFLY) ||
- (device == PCI_DEVICE_ID_LP101) ||
- (device == PCI_DEVICE_ID_BMID) ||
- (device == PCI_DEVICE_ID_BSMB) ||
- (device == PCI_DEVICE_ID_ZMID) ||
- (device == PCI_DEVICE_ID_ZSMB) ||
- (device == PCI_DEVICE_ID_RFLY))
- return 1;
- else
- return 0;
-}
-
-#endif /* _H_LPFC_HW */
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_init.c 1.168 2004/11/15 11:01:33EST sf_support Exp $
- */
-
-#include <linux/version.h>
-#include <linux/blkdev.h>
-#include <linux/ctype.h>
-#include <linux/dma-mapping.h>
-#include <linux/pci.h>
-#include <linux/spinlock.h>
-
-#include <scsi/scsi_device.h>
-#include <scsi/scsi_host.h>
-
-#include "lpfc_sli.h"
-#include "lpfc_disc.h"
-#include "lpfc_scsi.h"
-#include "lpfc.h"
-#include "lpfc_crtn.h"
-#include "lpfc_hw.h"
-#include "lpfc_logmsg.h"
-#include "lpfc_mem.h"
-#include "lpfc_version.h"
-#include "lpfc_compat.h"
-
-static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *);
-static int lpfc_post_rcv_buf(struct lpfc_hba *);
-static int lpfc_rdrev_wd30 = 0;
-
-/************************************************************************/
-/* */
-/* lpfc_config_port_prep */
-/* This routine will do LPFC initialization prior to the */
-/* CONFIG_PORT mailbox command. This will be initialized */
-/* as a SLI layer callback routine. */
-/* This routine returns 0 on success or -ERESTART if it wants */
-/* the SLI layer to reset the HBA and try again. Any */
-/* other return value indicates an error. */
-/* */
-/************************************************************************/
-int
-lpfc_config_port_prep(struct lpfc_hba * phba)
-{
- lpfc_vpd_t *vp = &phba->vpd;
- int i = 0;
- LPFC_MBOXQ_t *pmb;
- MAILBOX_t *mb;
-
-
- /* Get a Mailbox buffer to setup mailbox commands for HBA
- initialization */
- pmb = mempool_alloc(phba->mbox_mem_pool, GFP_ATOMIC);
- if (!pmb) {
- phba->hba_state = LPFC_HBA_ERROR;
- return -ENOMEM;
- }
-
- mb = &pmb->mb;
- phba->hba_state = LPFC_INIT_MBX_CMDS;
-
- /* special handling for LC HBAs */
- if (lpfc_is_LC_HBA(phba->pcidev->device)) {
- char licensed[56] =
- "key unlock for use with gnu public licensed code only\0";
- uint32_t *ptext = (uint32_t *) licensed;
-
- for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
- *ptext = cpu_to_be32(*ptext);
-
- /* Setup and issue mailbox READ NVPARAMS command */
- lpfc_read_nv(phba, pmb);
- memset((char*)mb->un.varRDnvp.rsvd3, 0,
- sizeof (mb->un.varRDnvp.rsvd3));
- memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
- sizeof (licensed));
-
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
- /* Adapter initialization error, mbxCmd <cmd>
- READ_NVPARM, mbxStatus <status> */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_MBOX,
- "%d:0324 Config Port initialization "
- "error, mbxCmd x%x READ_NVPARM, "
- "mbxStatus x%x\n",
- phba->brd_no,
- mb->mbxCommand, mb->mbxStatus);
- return -ERESTART;
- }
- memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
- sizeof (mb->un.varRDnvp.nodename));
- }
-
- /* Setup and issue mailbox READ REV command */
- lpfc_read_rev(phba, pmb);
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
- /* Adapter failed to init, mbxCmd <mbxCmd> READ_REV, mbxStatus
- <status> */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_INIT,
- "%d:0439 Adapter failed to init, mbxCmd x%x "
- "READ_REV, mbxStatus x%x\n",
- phba->brd_no,
- mb->mbxCommand, mb->mbxStatus);
- mempool_free( pmb, phba->mbox_mem_pool);
- return -ERESTART;
- }
-
- /* The HBA's current state is provided by the ProgType and rr fields.
- * Read and check the value of these fields before continuing to config
- * this port.
- */
- if (mb->un.varRdRev.rr == 0 || mb->un.varRdRev.un.b.ProgType != 2) {
- /* Old firmware */
- vp->rev.rBit = 0;
- /* Adapter failed to init, mbxCmd <cmd> READ_REV detected
- outdated firmware */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_INIT,
- "%d:0440 Adapter failed to init, mbxCmd x%x "
- "READ_REV detected outdated firmware"
- "Data: x%x\n",
- phba->brd_no,
- mb->mbxCommand, 0);
- mempool_free(pmb, phba->mbox_mem_pool);
- return -ERESTART;
- } else {
- vp->rev.rBit = 1;
- vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
- memcpy(vp->rev.sli1FwName,
- (char*)mb->un.varRdRev.sli1FwName, 16);
- vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
- memcpy(vp->rev.sli2FwName,
- (char *)mb->un.varRdRev.sli2FwName, 16);
- }
-
- /* Save information as VPD data */
- vp->rev.biuRev = mb->un.varRdRev.biuRev;
- vp->rev.smRev = mb->un.varRdRev.smRev;
- vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
- vp->rev.endecRev = mb->un.varRdRev.endecRev;
- vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
- vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
- vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
- vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
- vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
- vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
- lpfc_rdrev_wd30 = mb->un.varWords[30];
-
- if (lpfc_is_LC_HBA(phba->pcidev->device))
- memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
- sizeof (phba->RandomData));
-
- /* Get adapter VPD information */
- lpfc_dump_mem(phba, pmb);
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
- /* Let it go through even if failed. */
- /* Adapter failed to init, mbxCmd <cmd> DUMP VPD,
- mbxStatus <status> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_INIT,
- "%d:0441 VPD not present on adapter, mbxCmd "
- "x%x DUMP VPD, mbxStatus x%x\n",
- phba->brd_no,
- mb->mbxCommand, mb->mbxStatus);
- } else if (mb->un.varDmp.ra == 1) {
- lpfc_parse_vpd(phba, (uint8_t *)&mb->un.varDmp.resp_offset);
- }
- mempool_free(pmb, phba->mbox_mem_pool);
- return 0;
-}
-
-/************************************************************************/
-/* */
-/* lpfc_config_port_post */
-/* This routine will do LPFC initialization after the */
-/* CONFIG_PORT mailbox command. This will be initialized */
-/* as a SLI layer callback routine. */
-/* This routine returns 0 on success. Any other return value */
-/* indicates an error. */
-/* */
-/************************************************************************/
-int
-lpfc_config_port_post(struct lpfc_hba * phba)
-{
- LPFC_MBOXQ_t *pmb;
- MAILBOX_t *mb;
- struct lpfc_dmabuf *mp;
- struct lpfc_sli *psli = &phba->sli;
- uint32_t status, timeout;
- int i, j, flogi_sent;
- unsigned long isr_cnt, clk_cnt;
-
-
- /* Get a Mailbox buffer to setup mailbox commands for HBA
- initialization */
- pmb = mempool_alloc(phba->mbox_mem_pool, GFP_ATOMIC);
- if (!pmb) {
- phba->hba_state = LPFC_HBA_ERROR;
- return -ENOMEM;
- }
- mb = &pmb->mb;
-
- /* Setup link timers */
- lpfc_config_link(phba, pmb);
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_INIT,
- "%d:0447 Adapter failed init, mbxCmd x%x "
- "CONFIG_LINK mbxStatus x%x\n",
- phba->brd_no,
- mb->mbxCommand, mb->mbxStatus);
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free( pmb, phba->mbox_mem_pool);
- return -EIO;
- }
-
- /* Get login parameters for NID. */
- lpfc_read_sparam(phba, pmb);
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_INIT,
- "%d:0448 Adapter failed init, mbxCmd x%x "
- "READ_SPARM mbxStatus x%x\n",
- phba->brd_no,
- mb->mbxCommand, mb->mbxStatus);
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free( pmb, phba->mbox_mem_pool);
- return -EIO;
- }
-
- mp = (struct lpfc_dmabuf *) pmb->context1;
-
- /* The mailbox was populated by the HBA. Flush it to main store for the
- * driver. Note that all context buffers are from the driver's
- * dma pool and have length LPFC_BPL_SIZE.
- */
- pci_dma_sync_single_for_cpu(phba->pcidev, mp->phys, LPFC_BPL_SIZE,
- PCI_DMA_FROMDEVICE);
-
- memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm));
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- pmb->context1 = NULL;
-
- memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName,
- sizeof (struct lpfc_name));
- memcpy(&phba->fc_portname, &phba->fc_sparam.portName,
- sizeof (struct lpfc_name));
- /* If no serial number in VPD data, use low 6 bytes of WWNN */
- /* This should be consolidated into parse_vpd ? - mr */
- if (phba->SerialNumber[0] == 0) {
- uint8_t *outptr;
-
- outptr = (uint8_t *) & phba->fc_nodename.IEEE[0];
- for (i = 0; i < 12; i++) {
- status = *outptr++;
- j = ((status & 0xf0) >> 4);
- if (j <= 9)
- phba->SerialNumber[i] =
- (char)((uint8_t) 0x30 + (uint8_t) j);
- else
- phba->SerialNumber[i] =
- (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
- i++;
- j = (status & 0xf);
- if (j <= 9)
- phba->SerialNumber[i] =
- (char)((uint8_t) 0x30 + (uint8_t) j);
- else
- phba->SerialNumber[i] =
- (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
- }
- }
-
- /* This should turn on DELAYED ABTS for ELS timeouts */
- lpfc_set_slim(phba, pmb, 0x052198, 0x1);
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free( pmb, phba->mbox_mem_pool);
- return -EIO;
- }
-
-
- lpfc_read_config(phba, pmb);
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_INIT,
- "%d:0453 Adapter failed to init, mbxCmd x%x "
- "READ_CONFIG, mbxStatus x%x\n",
- phba->brd_no,
- mb->mbxCommand, mb->mbxStatus);
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free( pmb, phba->mbox_mem_pool);
- return -EIO;
- }
-
- /* Reset the DFT_HBA_Q_DEPTH to the max xri */
- if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1))
- phba->cfg_hba_queue_depth =
- mb->un.varRdConfig.max_xri + 1;
-
- phba->lmt = mb->un.varRdConfig.lmt;
- /* HBA is not 4GB capable, or HBA is not 2GB capable,
- don't let link speed ask for it */
- if ((((phba->lmt & LMT_4250_10bit) != LMT_4250_10bit) &&
- (phba->cfg_link_speed > LINK_SPEED_2G)) ||
- (((phba->lmt & LMT_2125_10bit) != LMT_2125_10bit) &&
- (phba->cfg_link_speed > LINK_SPEED_1G))) {
- /* Reset link speed to auto. 1G/2GB HBA cfg'd for 4G */
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_LINK_EVENT,
- "%d:1302 Invalid speed for this board: "
- "Reset link speed to auto: x%x\n",
- phba->brd_no,
- phba->cfg_link_speed);
- phba->cfg_link_speed = LINK_SPEED_AUTO;
- }
-
- if (!phba->intr_inited) {
- /* Add our interrupt routine to kernel's interrupt chain &
- enable it */
-
- if (request_irq(phba->pcidev->irq,
- lpfc_intr_handler,
- SA_SHIRQ,
- LPFC_DRIVER_NAME,
- phba) != 0) {
- /* Enable interrupt handler failed */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_INIT,
- "%d:0451 Enable interrupt handler "
- "failed\n",
- phba->brd_no);
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free(pmb, phba->mbox_mem_pool);
- return -EIO;
- }
- phba->intr_inited =
- (HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA);
- }
-
- phba->hba_state = LPFC_LINK_DOWN;
-
- /* Only process IOCBs on ring 0 till hba_state is READY */
- if (psli->ring[psli->ip_ring].cmdringaddr)
- psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT;
- if (psli->ring[psli->fcp_ring].cmdringaddr)
- psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
- if (psli->ring[psli->next_ring].cmdringaddr)
- psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT;
-
- /* Post receive buffers for desired rings */
- lpfc_post_rcv_buf(phba);
-
- /* Enable appropriate host interrupts */
- status = readl(phba->HCregaddr);
- status |= phba->intr_inited;
- if (psli->sliinit.num_rings > 0)
- status |= HC_R0INT_ENA;
- if (psli->sliinit.num_rings > 1)
- status |= HC_R1INT_ENA;
- if (psli->sliinit.num_rings > 2)
- status |= HC_R2INT_ENA;
- if (psli->sliinit.num_rings > 3)
- status |= HC_R3INT_ENA;
-
- writel(status, phba->HCregaddr);
- readl(phba->HCregaddr); /* flush */
-
- /* Setup and issue mailbox INITIALIZE LINK command */
- lpfc_init_link(phba, pmb, phba->cfg_topology,
- phba->cfg_link_speed);
-
- isr_cnt = psli->slistat.sliIntr;
- clk_cnt = jiffies;
-
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) != MBX_SUCCESS) {
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_INIT,
- "%d:0454 Adapter failed to init, mbxCmd x%x "
- "INIT_LINK, mbxStatus x%x\n",
- phba->brd_no,
- mb->mbxCommand, mb->mbxStatus);
-
- /* Clear all interrupt enable conditions */
- writel(0, phba->HCregaddr);
- readl(phba->HCregaddr); /* flush */
- /* Clear all pending interrupts */
- writel(0xffffffff, phba->HAregaddr);
- readl(phba->HAregaddr); /* flush */
-
- free_irq(phba->pcidev->irq, phba);
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free(pmb, phba->mbox_mem_pool);
- return -EIO;
- }
- /* MBOX buffer will be freed in mbox compl */
-
- /*
- * Setup the ring 0 (els) timeout handler
- */
- timeout = phba->fc_ratov << 1;
-
- phba->els_tmofunc.expires = jiffies + HZ * timeout;
- add_timer(&phba->els_tmofunc);
-
- phba->fc_prevDID = Mask_DID;
- flogi_sent = 0;
- i = 0;
- while ((phba->hba_state != LPFC_HBA_READY) ||
- (phba->num_disc_nodes) || (phba->fc_prli_sent) ||
- ((phba->fc_map_cnt == 0) && (i<2)) ||
- (psli->sliinit.sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
- /* Check every second for 30 retries. */
- i++;
- if (i > 30) {
- break;
- }
- if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) {
- /* The link is down. Set linkdown timeout */
- break;
- }
-
- /* Delay for 1 second to give discovery time to complete. */
- for (j = 0; j < 20; j++) {
- /* On some systems, the driver's attach/detect routines
- * are uninterruptible. Since the driver cannot predict
- * when this is true, just manually call the ISR every
- * 50 ms to service any interrupts.
- */
- msleep(50);
- if (isr_cnt == psli->slistat.sliIntr) {
- lpfc_sli_intr(phba);
- isr_cnt = psli->slistat.sliIntr;
- }
- }
- isr_cnt = psli->slistat.sliIntr;
-
- if (clk_cnt == jiffies) {
- /* REMOVE: IF THIS HAPPENS, SYSTEM CLOCK IS NOT RUNNING.
- * WE HAVE TO MANUALLY CALL OUR TIMEOUT ROUTINES.
- */
- clk_cnt = jiffies;
- }
- }
-
- /* Since num_disc_nodes keys off of PLOGI, delay a bit to let
- * any potential PRLIs to flush thru the SLI sub-system.
- */
- msleep(50);
- if (isr_cnt == psli->slistat.sliIntr) {
- lpfc_sli_intr(phba);
- }
-
- return (0);
-}
-
-/************************************************************************/
-/* */
-/* lpfc_hba_down_prep */
-/* This routine will do LPFC uninitialization before the */
-/* HBA is reset when bringing down the SLI Layer. This will be */
-/* initialized as a SLI layer callback routine. */
-/* This routine returns 0 on success. Any other return value */
-/* indicates an error. */
-/* */
-/************************************************************************/
-int
-lpfc_hba_down_prep(struct lpfc_hba * phba)
-{
- /* Disable interrupts */
- writel(0, phba->HCregaddr);
- readl(phba->HCregaddr); /* flush */
-
- /* Cleanup potential discovery resources */
- lpfc_els_flush_rscn(phba);
- lpfc_els_flush_cmd(phba);
- lpfc_disc_flush_list(phba);
-
- return (0);
-}
-
-/************************************************************************/
-/* */
-/* lpfc_handle_eratt */
-/* This routine will handle processing a Host Attention */
-/* Error Status event. This will be initialized */
-/* as a SLI layer callback routine. */
-/* */
-/************************************************************************/
-void
-lpfc_handle_eratt(struct lpfc_hba * phba, uint32_t status)
-{
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- struct lpfc_iocbq *iocb, *next_iocb;
- IOCB_t *icmd = NULL, *cmd = NULL;
- struct lpfc_scsi_buf *lpfc_cmd;
- volatile uint32_t status1, status2;
- void *from_slim;
- unsigned long iflag;
-
- psli = &phba->sli;
- from_slim = ((uint8_t *)phba->MBslimaddr + 0xa8);
- status1 = readl( from_slim);
- from_slim = ((uint8_t *)phba->MBslimaddr + 0xac);
- status2 = readl( from_slim);
-
- if (status & HS_FFER6) {
- /* Re-establishing Link */
- spin_lock_irqsave(phba->host->host_lock, iflag);
- lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
- "%d:1301 Re-establishing Link "
- "Data: x%x x%x x%x\n",
- phba->brd_no, status, status1, status2);
- phba->fc_flag |= FC_ESTABLISH_LINK;
-
- /*
- * Firmware stops when it triggled erratt with HS_FFER6.
- * That could cause the I/Os dropped by the firmware.
- * Error iocb (I/O) on txcmplq and let the SCSI layer
- * retry it after re-establishing link.
- */
- pring = &psli->ring[psli->fcp_ring];
-
- list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
- list) {
- cmd = &iocb->iocb;
-
- /* Must be a FCP command */
- if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
- continue;
- }
-
- /* context1 MUST be a struct lpfc_scsi_buf */
- lpfc_cmd = (struct lpfc_scsi_buf *)(iocb->context1);
- if (lpfc_cmd == 0) {
- continue;
- }
-
- list_del(&iocb->list);
- pring->txcmplq_cnt--;
-
- if (iocb->iocb_cmpl) {
- icmd = &iocb->iocb;
- icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
- (iocb->iocb_cmpl)(phba, iocb, iocb);
- } else {
- mempool_free( iocb, phba->iocb_mem_pool);
- }
- }
-
- /*
- * There was a firmware error. Take the hba offline and then
- * attempt to restart it.
- */
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- lpfc_offline(phba);
- if (lpfc_online(phba) == 0) { /* Initialize the HBA */
- mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
- return;
- }
- } else {
- /* The if clause above forces this code path when the status
- * failure is a value other than FFER6. Do not call the offline
- * twice. This is the adapter hardware error path.
- */
- lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
- "%d:0457 Adapter Hardware Error "
- "Data: x%x x%x x%x\n",
- phba->brd_no, status, status1, status2);
-
- lpfc_offline(phba);
-
- /*
- * Restart all traffic to this host. Since the fc_transport
- * block functions (future) were not called in lpfc_offline,
- * don't call them here.
- */
- scsi_unblock_requests(phba->host);
- }
- return;
-}
-
-/************************************************************************/
-/* */
-/* lpfc_handle_latt */
-/* This routine will handle processing a Host Attention */
-/* Link Status event. This will be initialized */
-/* as a SLI layer callback routine. */
-/* */
-/************************************************************************/
-void
-lpfc_handle_latt(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- LPFC_MBOXQ_t *pmb;
- volatile uint32_t control;
- unsigned long iflag;
-
-
- spin_lock_irqsave(phba->host->host_lock, iflag);
-
- /* called from host_interrupt, to process LATT */
- psli = &phba->sli;
- psli->slistat.linkEvent++;
-
- /* Get a buffer which will be used for mailbox commands */
- if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC))) {
- if (lpfc_read_la(phba, pmb) == 0) {
- pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
- if (lpfc_sli_issue_mbox
- (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB))
- != MBX_NOT_FINISHED) {
- /* Turn off Link Attention interrupts until
- CLEAR_LA done */
- psli->sliinit.sli_flag &= ~LPFC_PROCESS_LA;
- control = readl(phba->HCregaddr);
- control &= ~HC_LAINT_ENA;
- writel(control, phba->HCregaddr);
- readl(phba->HCregaddr); /* flush */
-
- /* Clear Link Attention in HA REG */
- writel(HA_LATT, phba->HAregaddr);
- readl(phba->HAregaddr); /* flush */
- spin_unlock_irqrestore(phba->host->host_lock,
- iflag);
- return;
- } else {
- mempool_free(pmb, phba->mbox_mem_pool);
- }
- } else {
- mempool_free(pmb, phba->mbox_mem_pool);
- }
- }
-
- /* Clear Link Attention in HA REG */
- writel(HA_LATT, phba->HAregaddr);
- readl(phba->HAregaddr); /* flush */
- lpfc_linkdown(phba);
- phba->hba_state = LPFC_HBA_ERROR;
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- return;
-}
-
-/************************************************************************/
-/* */
-/* lpfc_parse_vpd */
-/* This routine will parse the VPD data */
-/* */
-/************************************************************************/
-static int
-lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd)
-{
- uint8_t lenlo, lenhi;
- uint8_t *Length;
- int i, j;
- int finished = 0;
- int index = 0;
-
- /* Vital Product */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_INIT,
- "%d:0455 Vital Product Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
- (uint32_t) vpd[3]);
- do {
- switch (vpd[index]) {
- case 0x82:
- index += 1;
- lenlo = vpd[index];
- index += 1;
- lenhi = vpd[index];
- index += 1;
- i = ((((unsigned short)lenhi) << 8) + lenlo);
- index += i;
- break;
- case 0x90:
- index += 1;
- lenlo = vpd[index];
- index += 1;
- lenhi = vpd[index];
- index += 1;
- i = ((((unsigned short)lenhi) << 8) + lenlo);
- do {
- /* Look for Serial Number */
- if ((vpd[index] == 'S')
- && (vpd[index + 1] == 'N')) {
- index += 2;
- Length = &vpd[index];
- index += 1;
- i = *Length;
- j = 0;
- while (i--) {
- phba->SerialNumber[j++] =
- vpd[index++];
- if (j == 31)
- break;
- }
- phba->SerialNumber[j] = 0;
- return (1);
- } else {
- index += 2;
- Length = &vpd[index];
- index += 1;
- j = (int)(*Length);
- index += j;
- i -= (3 + j);
- }
- } while (i > 0);
- finished = 0;
- break;
- case 0x78:
- finished = 1;
- break;
- default:
- return (0);
- }
- } while (!finished);
- return (1);
-}
-
-/**************************************************/
-/* lpfc_post_buffer */
-/* */
-/* This routine will post count buffers to the */
-/* ring with the QUE_RING_BUF_CN command. This */
-/* allows 3 buffers / command to be posted. */
-/* Returns the number of buffers NOT posted. */
-/**************************************************/
-int
-lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt,
- int type)
-{
- IOCB_t *icmd;
- struct lpfc_iocbq *iocb;
- struct lpfc_dmabuf *mp1, *mp2;
-
- cnt += pring->missbufcnt;
-
- /* While there are buffers to post */
- while (cnt > 0) {
- /* Allocate buffer for command iocb */
- if ((iocb = mempool_alloc(phba->iocb_mem_pool, GFP_ATOMIC))
- == 0) {
- pring->missbufcnt = cnt;
- return (cnt);
- }
- memset(iocb, 0, sizeof (struct lpfc_iocbq));
- icmd = &iocb->iocb;
-
- /* 2 buffers can be posted per command */
- /* Allocate buffer to post */
- mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_ATOMIC);
- if (mp1)
- mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
- &mp1->phys);
- if (mp1 == 0 || mp1->virt == 0) {
- if (mp1)
- kfree(mp1);
-
- mempool_free( iocb, phba->iocb_mem_pool);
- pring->missbufcnt = cnt;
- return (cnt);
- }
-
- INIT_LIST_HEAD(&mp1->list);
- /* Allocate buffer to post */
- if (cnt > 1) {
- mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
- if (mp2)
- mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
- &mp2->phys);
- if (mp2 == 0 || mp2->virt == 0) {
- if (mp2)
- kfree(mp2);
- lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
- kfree(mp1);
- mempool_free( iocb, phba->iocb_mem_pool);
- pring->missbufcnt = cnt;
- return (cnt);
- }
-
- INIT_LIST_HEAD(&mp2->list);
- } else {
- mp2 = NULL;
- }
-
- icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
- icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
- icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
- icmd->ulpBdeCount = 1;
- cnt--;
- if (mp2) {
- icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
- icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
- icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
- cnt--;
- icmd->ulpBdeCount = 2;
- }
-
- icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
- icmd->ulpIoTag = lpfc_sli_next_iotag(phba, pring);
- icmd->ulpLe = 1;
-
- if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) {
- lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
- kfree(mp1);
- if (mp2) {
- lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
- kfree(mp2);
- }
- mempool_free( iocb, phba->iocb_mem_pool);
- pring->missbufcnt = cnt;
- return (cnt);
- }
- lpfc_sli_ringpostbuf_put(phba, pring, mp1);
- if (mp2) {
- lpfc_sli_ringpostbuf_put(phba, pring, mp2);
- }
- }
- pring->missbufcnt = 0;
- return (0);
-}
-
-/************************************************************************/
-/* */
-/* lpfc_post_rcv_buf */
-/* This routine post initial rcv buffers to the configured rings */
-/* */
-/************************************************************************/
-static int
-lpfc_post_rcv_buf(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli = &phba->sli;
-
- /* Ring 0, ELS / CT buffers */
- lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1);
- /* Ring 2 - FCP no buffers needed */
-
- return 0;
-}
-
-#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
-
-/************************************************************************/
-/* */
-/* lpfc_sha_init */
-/* */
-/************************************************************************/
-static void
-lpfc_sha_init(uint32_t * HashResultPointer)
-{
- HashResultPointer[0] = 0x67452301;
- HashResultPointer[1] = 0xEFCDAB89;
- HashResultPointer[2] = 0x98BADCFE;
- HashResultPointer[3] = 0x10325476;
- HashResultPointer[4] = 0xC3D2E1F0;
-}
-
-/************************************************************************/
-/* */
-/* lpfc_sha_iterate */
-/* */
-/************************************************************************/
-static void
-lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
-{
- int t;
- uint32_t TEMP;
- uint32_t A, B, C, D, E;
- t = 16;
- do {
- HashWorkingPointer[t] =
- S(1,
- HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
- 8] ^
- HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
- } while (++t <= 79);
- t = 0;
- A = HashResultPointer[0];
- B = HashResultPointer[1];
- C = HashResultPointer[2];
- D = HashResultPointer[3];
- E = HashResultPointer[4];
-
- do {
- if (t < 20) {
- TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
- } else if (t < 40) {
- TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
- } else if (t < 60) {
- TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
- } else {
- TEMP = (B ^ C ^ D) + 0xCA62C1D6;
- }
- TEMP += S(5, A) + E + HashWorkingPointer[t];
- E = D;
- D = C;
- C = S(30, B);
- B = A;
- A = TEMP;
- } while (++t <= 79);
-
- HashResultPointer[0] += A;
- HashResultPointer[1] += B;
- HashResultPointer[2] += C;
- HashResultPointer[3] += D;
- HashResultPointer[4] += E;
-
-}
-
-/************************************************************************/
-/* */
-/* lpfc_challenge_key */
-/* */
-/************************************************************************/
-static void
-lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
-{
- *HashWorking = (*RandomChallenge ^ *HashWorking);
-}
-
-/************************************************************************/
-/* */
-/* lpfc_hba_init */
-/* */
-/************************************************************************/
-void
-lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
-{
- int t;
- uint32_t *HashWorking;
- uint32_t *pwwnn = phba->wwnn;
-
- HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_ATOMIC);
- if (!HashWorking)
- return;
-
- memset(HashWorking, 0, (80 * sizeof(uint32_t)));
- HashWorking[0] = HashWorking[78] = *pwwnn++;
- HashWorking[1] = HashWorking[79] = *pwwnn;
-
- for (t = 0; t < 7; t++)
- lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
-
- lpfc_sha_init(hbainit);
- lpfc_sha_iterate(hbainit, HashWorking);
- kfree(HashWorking);
-}
-
-static void
-lpfc_consistent_bind_cleanup(struct lpfc_hba * phba)
-{
- struct lpfc_bindlist *bdlp, *next_bdlp;
-
- list_for_each_entry_safe(bdlp, next_bdlp,
- &phba->fc_nlpbind_list, nlp_listp) {
- list_del(&bdlp->nlp_listp);
- mempool_free( bdlp, phba->bind_mem_pool);
- }
- phba->fc_bind_cnt = 0;
-}
-
-void
-lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind)
-{
- struct lpfc_nodelist *ndlp, *next_ndlp;
-
- /* clean up phba - lpfc specific */
- lpfc_can_disctmo(phba);
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list,
- nlp_listp) {
- lpfc_nlp_remove(phba, ndlp);
- }
-
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
- nlp_listp) {
- lpfc_nlp_remove(phba, ndlp);
- }
-
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list,
- nlp_listp) {
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- }
-
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list,
- nlp_listp) {
- lpfc_nlp_remove(phba, ndlp);
- }
-
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
- nlp_listp) {
- lpfc_nlp_remove(phba, ndlp);
- }
-
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list,
- nlp_listp) {
- lpfc_nlp_remove(phba, ndlp);
- }
-
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list,
- nlp_listp) {
- lpfc_nlp_remove(phba, ndlp);
- }
-
- list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
- nlp_listp) {
- lpfc_nlp_remove(phba, ndlp);
- }
-
- if (save_bind == 0) {
- lpfc_consistent_bind_cleanup(phba);
- }
-
- INIT_LIST_HEAD(&phba->fc_nlpmap_list);
- INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
- INIT_LIST_HEAD(&phba->fc_unused_list);
- INIT_LIST_HEAD(&phba->fc_plogi_list);
- INIT_LIST_HEAD(&phba->fc_adisc_list);
- INIT_LIST_HEAD(&phba->fc_reglogin_list);
- INIT_LIST_HEAD(&phba->fc_prli_list);
- INIT_LIST_HEAD(&phba->fc_npr_list);
-
- phba->fc_map_cnt = 0;
- phba->fc_unmap_cnt = 0;
- phba->fc_plogi_cnt = 0;
- phba->fc_adisc_cnt = 0;
- phba->fc_reglogin_cnt = 0;
- phba->fc_prli_cnt = 0;
- phba->fc_npr_cnt = 0;
- phba->fc_unused_cnt= 0;
- return;
-}
-
-void
-lpfc_establish_link_tmo(unsigned long ptr)
-{
- struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
- unsigned long iflag;
-
- spin_lock_irqsave(phba->host->host_lock, iflag);
-
- /* Re-establishing Link, timer expired */
- lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
- "%d:1300 Re-establishing Link, timer expired "
- "Data: x%x x%x\n",
- phba->brd_no, phba->fc_flag, phba->hba_state);
- phba->fc_flag &= ~FC_ESTABLISH_LINK;
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
-}
-
-int
-lpfc_online(struct lpfc_hba * phba)
-{
- if (!phba)
- return 0;
-
- if (!(phba->fc_flag & FC_OFFLINE_MODE))
- return 0;
-
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_INIT,
- "%d:0458 Bring Adapter online\n",
- phba->brd_no);
-
- if (!lpfc_sli_queue_setup(phba))
- return 1;
-
- if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */
- return 1;
-
- phba->fc_flag &= ~FC_OFFLINE_MODE;
-
- /*
- * Restart all traffic to this host. Since the fc_transport block
- * functions (future) were not called in lpfc_offline, don't call them
- * here.
- */
- scsi_unblock_requests(phba->host);
- return 0;
-}
-
-int
-lpfc_offline(struct lpfc_hba * phba)
-{
- struct lpfc_sli_ring *pring;
- struct lpfc_sli *psli;
- unsigned long iflag;
- int i = 0;
-
- if (!phba)
- return 0;
-
- if (phba->fc_flag & FC_OFFLINE_MODE)
- return 0;
-
- /*
- * Don't call the fc_transport block api (future). The device is
- * going offline and causing a timer to fire in the midlayer is
- * unproductive. Just block all new requests until the driver
- * comes back online.
- */
- scsi_block_requests(phba->host);
- psli = &phba->sli;
- pring = &psli->ring[psli->fcp_ring];
-
- lpfc_linkdown(phba);
-
- /* The linkdown event takes 30 seconds to timeout. */
- while (pring->txcmplq_cnt) {
- mdelay(10);
- if (i++ > 3000)
- break;
- }
-
- /* stop all timers associated with this hba */
- spin_lock_irqsave(phba->host->host_lock, iflag);
- lpfc_stop_timer(phba);
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
-
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_INIT,
- "%d:0460 Bring Adapter offline\n",
- phba->brd_no);
-
- /* Bring down the SLI Layer and cleanup. The HBA is offline
- now. */
- lpfc_sli_hba_down(phba);
- lpfc_cleanup(phba, 1);
- phba->fc_flag |= FC_OFFLINE_MODE;
- return 0;
-}
-
-/******************************************************************************
-* Function name : lpfc_scsi_free
-*
-* Description : Called from fc_detach to free scsi tgt / lun resources
-*
-******************************************************************************/
-int
-lpfc_scsi_free(struct lpfc_hba * phba)
-{
- struct lpfc_target *targetp;
- int i;
-
- for (i = 0; i < MAX_FCP_TARGET; i++) {
- targetp = phba->device_queue_hash[i];
- if (targetp) {
- kfree(targetp);
- phba->device_queue_hash[i] = NULL;
- }
- }
- return 0;
-}
-
-static void
-lpfc_wakeup_event(struct lpfc_hba * phba, fcEVTHDR_t * ep)
-{
- ep->e_mode &= ~E_SLEEPING_MODE;
- switch (ep->e_mask) {
- case FC_REG_LINK_EVENT:
- wake_up_interruptible(&phba->linkevtwq);
- break;
- case FC_REG_RSCN_EVENT:
- wake_up_interruptible(&phba->rscnevtwq);
- break;
- case FC_REG_CT_EVENT:
- wake_up_interruptible(&phba->ctevtwq);
- break;
- }
- return;
-}
-
-int
-lpfc_put_event(struct lpfc_hba * phba, uint32_t evcode, uint32_t evdata0,
- void * evdata1, uint32_t evdata2, uint32_t evdata3)
-{
- fcEVT_t *ep;
- fcEVTHDR_t *ehp = phba->fc_evt_head;
- int found = 0;
- void *fstype = NULL;
- struct lpfc_dmabuf *mp;
- struct lpfc_sli_ct_request *ctp;
- struct lpfc_hba_event *rec;
- uint32_t evtype;
-
- switch (evcode) {
- case HBA_EVENT_RSCN:
- evtype = FC_REG_RSCN_EVENT;
- break;
- case HBA_EVENT_LINK_DOWN:
- case HBA_EVENT_LINK_UP:
- evtype = FC_REG_LINK_EVENT;
- break;
- default:
- evtype = FC_REG_CT_EVENT;
- }
-
- if (evtype == FC_REG_RSCN_EVENT || evtype == FC_REG_LINK_EVENT) {
- rec = &phba->hbaevt[phba->hba_event_put];
- rec->fc_eventcode = evcode;
- rec->fc_evdata1 = evdata0;
- rec->fc_evdata2 = (uint32_t)(unsigned long)evdata1;
- rec->fc_evdata3 = evdata2;
- rec->fc_evdata4 = evdata3;
-
- phba->hba_event_put++;
- if (phba->hba_event_put >= MAX_HBAEVT)
- phba->hba_event_put = 0;
-
- if (phba->hba_event_put == phba->hba_event_get) {
- phba->hba_event_missed++;
- phba->hba_event_get++;
- if (phba->hba_event_get >= MAX_HBAEVT)
- phba->hba_event_get = 0;
- }
- }
-
- if (evtype == FC_REG_CT_EVENT) {
- mp = (struct lpfc_dmabuf *) evdata1;
- ctp = (struct lpfc_sli_ct_request *) mp->virt;
- fstype = (void *)(ulong) (ctp->FsType);
- }
-
- while (ehp && ((ehp->e_mask != evtype) || (ehp->e_type != fstype)))
- ehp = (fcEVTHDR_t *) ehp->e_next_header;
-
- if (!ehp)
- return (0);
-
- ep = ehp->e_head;
-
- while (ep && !(found)) {
- if (ep->evt_sleep) {
- switch (evtype) {
- case FC_REG_CT_EVENT:
- if ((ep->evt_type ==
- (void *)(ulong) FC_FSTYPE_ALL)
- || (ep->evt_type == fstype)) {
- found++;
- ep->evt_data0 = evdata0; /* tag */
- ep->evt_data1 = evdata1; /* buffer
- ptr */
- ep->evt_data2 = evdata2; /* count */
- ep->evt_sleep = 0;
- if (ehp->e_mode & E_SLEEPING_MODE) {
- ehp->e_flag |=
- E_GET_EVENT_ACTIVE;
- lpfc_wakeup_event(phba, ehp);
- }
- /* For FC_REG_CT_EVENT just give it to
- first one found */
- }
- break;
- default:
- found++;
- ep->evt_data0 = evdata0;
- ep->evt_data1 = evdata1;
- ep->evt_data2 = evdata2;
- ep->evt_sleep = 0;
- if ((ehp->e_mode & E_SLEEPING_MODE)
- && !(ehp->e_flag & E_GET_EVENT_ACTIVE)) {
- ehp->e_flag |= E_GET_EVENT_ACTIVE;
- lpfc_wakeup_event(phba, ehp);
- }
- /* For all other events, give it to every one
- waiting */
- break;
- }
- }
- ep = ep->evt_next;
- }
- if (evtype == FC_REG_LINK_EVENT)
- phba->nport_event_cnt++;
-
- return (found);
-}
-
-int
-lpfc_stop_timer(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli = &phba->sli;
-
- /* Instead of a timer, this has been converted to a
- * deferred procedding list.
- */
- while (!list_empty(&phba->freebufList)) {
- struct lpfc_dmabuf *mp;
-
- mp = (struct lpfc_dmabuf *)(phba->freebufList.next);
- if (mp) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- list_del(&mp->list);
- kfree(mp);
- }
- }
-
- del_timer_sync(&phba->fc_estabtmo);
- del_timer_sync(&phba->fc_disctmo);
- del_timer_sync(&phba->fc_scantmo);
- del_timer_sync(&phba->fc_fdmitmo);
- del_timer_sync(&phba->els_tmofunc);
- psli = &phba->sli;
- del_timer_sync(&psli->mbox_tmo);
- return(1);
-}
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_logmsg.h 1.31 2004/08/26 19:17:52EDT sf_support Exp $
- */
-
-#ifndef _H_LPFC_LOGMSG
-#define _H_LPFC_LOGMSG
-
-#define LOG_ELS 0x1 /* ELS events */
-#define LOG_DISCOVERY 0x2 /* Link discovery events */
-#define LOG_MBOX 0x4 /* Mailbox events */
-#define LOG_INIT 0x8 /* Initialization events */
-#define LOG_LINK_EVENT 0x10 /* Link events */
-#define LOG_IP 0x20 /* IP traffic history */
-#define LOG_FCP 0x40 /* FCP traffic history */
-#define LOG_NODE 0x80 /* Node table events */
-#define LOG_MISC 0x400 /* Miscellaneous events */
-#define LOG_SLI 0x800 /* SLI events */
-#define LOG_CHK_COND 0x1000 /* FCP Check condition flag */
-#define LOG_LIBDFC 0x2000 /* Libdfc events */
-#define LOG_ALL_MSG 0xffff /* LOG all messages */
-
-#define lpfc_printf_log(phba, level, mask, fmt, arg...) \
- { if (((mask) &(phba)->cfg_log_verbose) || (level[1] <= '3')) \
- dev_printk(level, &((phba)->pcidev)->dev, fmt, ##arg); }
-#endif
-
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_mbox.c 1.70 2004/11/18 17:33:04EST sf_support Exp $
- */
-#include <linux/version.h>
-#include <linux/blkdev.h>
-#include <linux/dma-mapping.h>
-#include <linux/pci.h>
-#include <linux/spinlock.h>
-#include <scsi/scsi_device.h>
-#include "lpfc_sli.h"
-#include "lpfc_disc.h"
-#include "lpfc_scsi.h"
-#include "lpfc.h"
-#include "lpfc_crtn.h"
-#include "lpfc_hw.h"
-#include "lpfc_logmsg.h"
-#include "lpfc_mem.h"
-#include "lpfc_compat.h"
-
-/**********************************************/
-
-/* mailbox command */
-/**********************************************/
-void
-lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- MAILBOX_t *mb;
-
- mb = &pmb->mb;
- /* Setup to dump VPD region */
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
- mb->mbxCommand = MBX_DUMP_MEMORY;
- mb->un.varDmp.cv = 1;
- mb->un.varDmp.type = DMP_NV_PARAMS;
- mb->un.varDmp.region_id = DMP_REGION_VPD;
- mb->un.varDmp.word_cnt = (DMP_VPD_SIZE / sizeof (uint32_t));
-
- mb->un.varDmp.co = 0;
- mb->un.varDmp.resp_offset = 0;
- mb->mbxOwner = OWN_HOST;
- return;
-}
-
-/**********************************************/
-/* lpfc_read_nv Issue a READ NVPARAM */
-/* mailbox command */
-/**********************************************/
-void
-lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- MAILBOX_t *mb;
-
- mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
- mb->mbxCommand = MBX_READ_NV;
- mb->mbxOwner = OWN_HOST;
- return;
-}
-
-/**********************************************/
-/* lpfc_read_la Issue a READ LA */
-/* mailbox command */
-/**********************************************/
-int
-lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- MAILBOX_t *mb;
- struct lpfc_dmabuf *mp;
- struct lpfc_sli *psli;
-
- psli = &phba->sli;
- mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
-
- /* Get a buffer to hold the loop map */
- if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_ATOMIC)) == 0) ||
- ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
- if (mp)
- kfree(mp);
- mb->mbxCommand = MBX_READ_LA64;
- /* READ_LA: no buffers */
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_MBOX,
- "%d:0300 READ_LA: no buffers\n",
- phba->brd_no);
- return (1);
- }
- INIT_LIST_HEAD(&mp->list);
- mb->mbxCommand = MBX_READ_LA64;
- mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128;
- mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys);
- mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys);
-
- /* Sync the mailbox data with its PCI memory address now. */
- pci_dma_sync_single_for_device(phba->pcidev, mp->phys, LPFC_BPL_SIZE,
- PCI_DMA_TODEVICE);
-
- /* Save address for later completion and set the owner to host so that
- * the FW knows this mailbox is available for processing.
- */
- pmb->context1 = (uint8_t *) mp;
- mb->mbxOwner = OWN_HOST;
- return (0);
-}
-
-/**********************************************/
-/* lpfc_clear_la Issue a CLEAR LA */
-/* mailbox command */
-/**********************************************/
-void
-lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- MAILBOX_t *mb;
-
- mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
-
- mb->un.varClearLA.eventTag = phba->fc_eventTag;
- mb->mbxCommand = MBX_CLEAR_LA;
- mb->mbxOwner = OWN_HOST;
- return;
-}
-
-/**************************************************/
-/* lpfc_config_link Issue a CONFIG LINK */
-/* mailbox command */
-/**************************************************/
-void
-lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- MAILBOX_t *mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
-
- /* NEW_FEATURE
- * SLI-2, Coalescing Response Feature.
- */
- if (phba->cfg_cr_delay) {
- mb->un.varCfgLnk.cr = 1;
- mb->un.varCfgLnk.ci = 1;
- mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay;
- mb->un.varCfgLnk.cr_count = phba->cfg_cr_count;
- }
-
- mb->un.varCfgLnk.myId = phba->fc_myDID;
- mb->un.varCfgLnk.edtov = phba->fc_edtov;
- mb->un.varCfgLnk.arbtov = phba->fc_arbtov;
- mb->un.varCfgLnk.ratov = phba->fc_ratov;
- mb->un.varCfgLnk.rttov = phba->fc_rttov;
- mb->un.varCfgLnk.altov = phba->fc_altov;
- mb->un.varCfgLnk.crtov = phba->fc_crtov;
- mb->un.varCfgLnk.citov = phba->fc_citov;
-
- if (phba->cfg_ack0)
- mb->un.varCfgLnk.ack0_enable = 1;
-
- mb->mbxCommand = MBX_CONFIG_LINK;
- mb->mbxOwner = OWN_HOST;
- return;
-}
-
-/**********************************************/
-/* lpfc_init_link Issue an INIT LINK */
-/* mailbox command */
-/**********************************************/
-void
-lpfc_init_link(struct lpfc_hba * phba,
- LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed)
-{
- lpfc_vpd_t *vpd;
- struct lpfc_sli *psli;
- MAILBOX_t *mb;
-
- mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
-
- psli = &phba->sli;
- switch (topology) {
- case FLAGS_TOPOLOGY_MODE_LOOP_PT:
- mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
- mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
- break;
- case FLAGS_TOPOLOGY_MODE_PT_PT:
- mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
- break;
- case FLAGS_TOPOLOGY_MODE_LOOP:
- mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
- break;
- case FLAGS_TOPOLOGY_MODE_PT_LOOP:
- mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
- mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
- break;
- }
-
- /* NEW_FEATURE
- * Setting up the link speed
- */
- vpd = &phba->vpd;
- if (vpd->rev.feaLevelHigh >= 0x02){
- switch(linkspeed){
- case LINK_SPEED_1G:
- case LINK_SPEED_2G:
- case LINK_SPEED_4G:
- mb->un.varInitLnk.link_flags |=
- FLAGS_LINK_SPEED;
- mb->un.varInitLnk.link_speed = linkspeed;
- break;
- case LINK_SPEED_AUTO:
- default:
- mb->un.varInitLnk.link_speed =
- LINK_SPEED_AUTO;
- break;
- }
-
- }
- else
- mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO;
-
- mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
- mb->mbxOwner = OWN_HOST;
- mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA;
- return;
-}
-
-/**********************************************/
-/* lpfc_read_sparam Issue a READ SPARAM */
-/* mailbox command */
-/**********************************************/
-int
-lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- struct lpfc_dmabuf *mp;
- MAILBOX_t *mb;
- struct lpfc_sli *psli;
-
- psli = &phba->sli;
- mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
-
- mb->mbxOwner = OWN_HOST;
-
- /* Get a buffer to hold the HBAs Service Parameters */
-
- if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_ATOMIC)) == 0) ||
- ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
- if (mp)
- kfree(mp);
- mb->mbxCommand = MBX_READ_SPARM64;
- /* READ_SPARAM: no buffers */
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_MBOX,
- "%d:0301 READ_SPARAM: no buffers\n",
- phba->brd_no);
- return (1);
- }
- INIT_LIST_HEAD(&mp->list);
- mb->mbxCommand = MBX_READ_SPARM64;
- mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
- mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys);
- mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys);
-
- pci_dma_sync_single_for_device(phba->pcidev, mp->phys, LPFC_BPL_SIZE,
- PCI_DMA_TODEVICE);
-
- /* save address for completion */
- pmb->context1 = mp;
-
- return (0);
-}
-
-/********************************************/
-/* lpfc_unreg_did Issue a UNREG_DID */
-/* mailbox command */
-/********************************************/
-void
-lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb)
-{
- MAILBOX_t *mb;
-
- mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
-
- mb->un.varUnregDID.did = did;
-
- mb->mbxCommand = MBX_UNREG_D_ID;
- mb->mbxOwner = OWN_HOST;
- return;
-}
-
-/***********************************************/
-
-/* command to write slim */
-/***********************************************/
-void
-lpfc_set_slim(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint32_t addr,
- uint32_t value)
-{
- MAILBOX_t *mb;
-
- mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
-
- /* addr = 0x090597 is AUTO ABTS disable for ELS commands */
- /* addr = 0x052198 is DELAYED ABTS enable for ELS commands */
-
- /*
- * Always turn on DELAYED ABTS for ELS timeouts
- */
- if ((addr == 0x052198) && (value == 0))
- value = 1;
-
- mb->un.varWords[0] = addr;
- mb->un.varWords[1] = value;
-
- mb->mbxCommand = MBX_SET_SLIM;
- mb->mbxOwner = OWN_HOST;
- return;
-}
-
-/**********************************************/
-/* lpfc_read_nv Issue a READ CONFIG */
-/* mailbox command */
-/**********************************************/
-void
-lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- MAILBOX_t *mb;
-
- mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
-
- mb->mbxCommand = MBX_READ_CONFIG;
- mb->mbxOwner = OWN_HOST;
- return;
-}
-
-/********************************************/
-/* lpfc_reg_login Issue a REG_LOGIN */
-/* mailbox command */
-/********************************************/
-int
-lpfc_reg_login(struct lpfc_hba * phba,
- uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag)
-{
- uint8_t *sparam;
- struct lpfc_dmabuf *mp;
- MAILBOX_t *mb;
- struct lpfc_sli *psli;
-
- psli = &phba->sli;
- mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
-
- mb->un.varRegLogin.rpi = 0;
- mb->un.varRegLogin.did = did;
- mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */
-
- mb->mbxOwner = OWN_HOST;
-
- /* Get a buffer to hold NPorts Service Parameters */
- if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_ATOMIC)) == 0) ||
- ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
- if (mp)
- kfree(mp);
-
- mb->mbxCommand = MBX_REG_LOGIN64;
- /* REG_LOGIN: no buffers */
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_MBOX,
- "%d:0302 REG_LOGIN: no buffers Data x%x x%x\n",
- phba->brd_no,
- (uint32_t) did, (uint32_t) flag);
- return (1);
- }
- INIT_LIST_HEAD(&mp->list);
- sparam = mp->virt;
-
- /* Copy param's into a new buffer */
- memcpy(sparam, param, sizeof (struct serv_parm));
-
- /* Sync the mailbox data with its PCI memory address now. */
- pci_dma_sync_single_for_device(phba->pcidev, mp->phys, LPFC_BPL_SIZE,
- PCI_DMA_TODEVICE);
-
- /* save address for completion */
- pmb->context1 = (uint8_t *) mp;
-
- mb->mbxCommand = MBX_REG_LOGIN64;
- mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
- mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys);
- mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys);
-
- return (0);
-}
-
-/**********************************************/
-/* lpfc_unreg_login Issue a UNREG_LOGIN */
-/* mailbox command */
-/**********************************************/
-void
-lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb)
-{
- MAILBOX_t *mb;
-
- mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
-
- mb->un.varUnregLogin.rpi = (uint16_t) rpi;
- mb->un.varUnregLogin.rsvd1 = 0;
-
- mb->mbxCommand = MBX_UNREG_LOGIN;
- mb->mbxOwner = OWN_HOST;
- return;
-}
-
-static void
-lpfc_config_pcb_setup(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli = &phba->sli;
- struct lpfc_sli_ring *pring;
- PCB_t *pcbp = &phba->slim2p->pcb;
- LPFC_RING_INIT_t *pringinit;
- dma_addr_t pdma_addr;
- uint32_t offset;
- uint32_t iocbCnt;
- int i;
-
- psli->MBhostaddr = (uint32_t *)&phba->slim2p->mbx;
- pcbp->maxRing = (psli->sliinit.num_rings - 1);
-
- iocbCnt = 0;
- for (i = 0; i < psli->sliinit.num_rings; i++) {
- pringinit = &psli->sliinit.ringinit[i];
- pring = &psli->ring[i];
- /* A ring MUST have both cmd and rsp entries defined to be
- valid */
- if ((pringinit->numCiocb == 0) || (pringinit->numRiocb == 0)) {
- pcbp->rdsc[i].cmdEntries = 0;
- pcbp->rdsc[i].rspEntries = 0;
- pcbp->rdsc[i].cmdAddrHigh = 0;
- pcbp->rdsc[i].rspAddrHigh = 0;
- pcbp->rdsc[i].cmdAddrLow = 0;
- pcbp->rdsc[i].rspAddrLow = 0;
- pring->cmdringaddr = NULL;
- pring->rspringaddr = NULL;
- continue;
- }
- /* Command ring setup for ring */
- pring->cmdringaddr =
- (void *)&phba->slim2p->IOCBs[iocbCnt];
- pcbp->rdsc[i].cmdEntries = pringinit->numCiocb;
-
- offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
- (uint8_t *)phba->slim2p;
- pdma_addr = phba->slim2p_mapping + offset;
- pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
- pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
- iocbCnt += pringinit->numCiocb;
-
- /* Response ring setup for ring */
- pring->rspringaddr =
- (void *)&phba->slim2p->IOCBs[iocbCnt];
-
- pcbp->rdsc[i].rspEntries = pringinit->numRiocb;
- offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
- (uint8_t *)phba->slim2p;
- pdma_addr = phba->slim2p_mapping + offset;
- pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
- pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
- iocbCnt += pringinit->numRiocb;
- }
-}
-
-void
-lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- MAILBOX_t *mb;
-
- mb = &pmb->mb;
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
- mb->un.varRdRev.cv = 1;
- mb->mbxCommand = MBX_READ_REV;
- mb->mbxOwner = OWN_HOST;
- return;
-}
-
-void
-lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb)
-{
- int i;
- MAILBOX_t *mb = &pmb->mb;
- struct lpfc_sli *psli;
- LPFC_RING_INIT_t *pring;
-
- memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
-
- mb->un.varCfgRing.ring = ring;
- mb->un.varCfgRing.maxOrigXchg = 0;
- mb->un.varCfgRing.maxRespXchg = 0;
- mb->un.varCfgRing.recvNotify = 1;
-
- psli = &phba->sli;
- pring = &psli->sliinit.ringinit[ring];
- mb->un.varCfgRing.numMask = pring->num_mask;
- mb->mbxCommand = MBX_CONFIG_RING;
- mb->mbxOwner = OWN_HOST;
-
- /* Is this ring configured for a specific profile */
- if (pring->prt[0].profile) {
- mb->un.varCfgRing.profile = pring->prt[0].profile;
- return;
- }
-
- /* Otherwise we setup specific rctl / type masks for this ring */
- for (i = 0; i < pring->num_mask; i++) {
- mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl;
- if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ)
- mb->un.varCfgRing.rrRegs[i].rmask = 0xff;
- else
- mb->un.varCfgRing.rrRegs[i].rmask = 0xfe;
- mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type;
- mb->un.varCfgRing.rrRegs[i].tmask = 0xff;
- }
-
- return;
-}
-
-void
-lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
-{
- MAILBOX_t *mb = &pmb->mb;
- dma_addr_t pdma_addr;
- uint32_t bar_low, bar_high;
- size_t offset;
- HGP hgp;
- void *to_slim;
-
- memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
- mb->mbxCommand = MBX_CONFIG_PORT;
- mb->mbxOwner = OWN_HOST;
-
- mb->un.varCfgPort.pcbLen = sizeof(PCB_t);
- offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p;
- pdma_addr = phba->slim2p_mapping + offset;
- mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
- mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);
-
- /* Now setup pcb */
- phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
- phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;
-
- /* Setup Mailbox pointers */
- phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t);
- offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p;
- pdma_addr = phba->slim2p_mapping + offset;
- phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
- phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);
-
- /*
- * Setup Host Group ring pointer.
- *
- * For efficiency reasons, the ring get/put pointers can be
- * placed in adapter memory (SLIM) rather than in host memory.
- * This allows firmware to avoid PCI reads/writes when updating
- * and checking pointers.
- *
- * The firmware recognizes the use of SLIM memory by comparing
- * the address of the get/put pointers structure with that of
- * the SLIM BAR (BAR0).
- *
- * Caution: be sure to use the PCI config space value of BAR0/BAR1
- * (the hardware's view of the base address), not the OS's
- * value of pci_resource_start() as the OS value may be a cookie
- * for ioremap/iomap.
- */
-
-
- pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low);
- pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);
-
-
- /* mask off BAR0's flag bits 0 - 3 */
- phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
- (SLIMOFF*sizeof(uint32_t));
- if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
- phba->slim2p->pcb.hgpAddrHigh = bar_high;
- else
- phba->slim2p->pcb.hgpAddrHigh = 0;
- /* write HGP data to SLIM at the required longword offset */
- memset(&hgp, 0, sizeof(HGP));
- to_slim = (uint8_t *)phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t));
- lpfc_memcpy_to_slim(to_slim, &hgp, sizeof (HGP));
-
- /* Setup Port Group ring pointer */
- offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
- (uint8_t *)phba->slim2p;
- pdma_addr = phba->slim2p_mapping + offset;
- phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
- phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);
-
- /* Use callback routine to setp rings in the pcb */
- lpfc_config_pcb_setup(phba);
-
- /* special handling for LC HBAs */
- if (lpfc_is_LC_HBA(phba->pcidev->device)) {
- uint32_t hbainit[5];
-
- lpfc_hba_init(phba, hbainit);
-
- memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20);
- }
-
- /* Swap PCB if needed */
- lpfc_sli_pcimem_bcopy((uint32_t *)&phba->slim2p->pcb,
- (uint32_t *)&phba->slim2p->pcb,
- sizeof (PCB_t));
-
- lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
- "%d:0405 Service Level Interface (SLI) 2 selected\n",
- phba->brd_no);
-}
-
-void
-lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
-{
- struct lpfc_sli *psli;
-
- psli = &phba->sli;
-
- list_add_tail(&mbq->list, &psli->mboxq);
-
- psli->mboxq_cnt++;
-
- return;
-}
-
-LPFC_MBOXQ_t *
-lpfc_mbox_get(struct lpfc_hba * phba)
-{
- LPFC_MBOXQ_t *mbq = NULL;
- struct lpfc_sli *psli = &phba->sli;
-
- if (!list_empty(&psli->mboxq)) {
- mbq = list_entry(psli->mboxq.next, LPFC_MBOXQ_t, list);
- list_del_init(&mbq->list);
- psli->mboxq_cnt--;
- }
-
- return mbq;
-}
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_mem.c 1.69 2004/09/28 07:54:24EDT sf_support Exp $
- */
-
-#include <linux/mempool.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <scsi/scsi_device.h>
-
-#include "lpfc_sli.h"
-#include "lpfc_disc.h"
-#include "lpfc_scsi.h"
-#include "lpfc.h"
-#include "lpfc_crtn.h"
-#include "lpfc_mem.h"
-
-static void *
-lpfc_pool_kmalloc(int gfp_flags, void *data)
-{
- return kmalloc((unsigned long)data, gfp_flags);
-}
-
-static void
-lpfc_pool_kfree(void *obj, void *data)
-{
- kfree(obj);
-}
-
-int
-lpfc_mem_alloc(struct lpfc_hba * phba)
-{
- struct lpfc_dma_pool *pool = &phba->lpfc_mbuf_safety_pool;
- int i;
-
- phba->lpfc_scsi_dma_ext_pool = pci_pool_create("lpfc_scsi_dma_ext_pool",
- phba->pcidev, LPFC_SCSI_DMA_EXT_SIZE, 8, 0);
- if (!phba->lpfc_scsi_dma_ext_pool)
- goto fail;
-
- phba->lpfc_mbuf_pool = pci_pool_create("lpfc_mbuf_pool", phba->pcidev,
- LPFC_BPL_SIZE, 8,0);
- if (!phba->lpfc_mbuf_pool)
- goto fail_free_dma_ext_pool;
-
- pool->elements = kmalloc(sizeof(struct lpfc_dmabuf) *
- LPFC_MBUF_POOL_SIZE, GFP_KERNEL);
- pool->max_count = 0;
- pool->current_count = 0;
- for ( i = 0; i < LPFC_MBUF_POOL_SIZE; i++) {
- pool->elements[i].virt = pci_pool_alloc(phba->lpfc_mbuf_pool,
- GFP_KERNEL, &pool->elements[i].phys);
- if (!pool->elements[i].virt)
- goto fail_free_mbuf_pool;
- pool->max_count++;
- pool->current_count++;
- }
-
- phba->iocb_mem_pool = mempool_create(LPFC_MEM_POOL_SIZE,
- lpfc_pool_kmalloc, lpfc_pool_kfree,
- (void *)(unsigned long)sizeof(struct lpfc_iocbq));
- if (!phba->iocb_mem_pool)
- goto fail_free_mbuf_pool;
-
- phba->scsibuf_mem_pool = mempool_create(LPFC_MEM_POOL_SIZE,
- lpfc_pool_kmalloc, lpfc_pool_kfree,
- (void *)(unsigned long)sizeof(struct lpfc_scsi_buf));
- if (!phba->scsibuf_mem_pool)
- goto fail_free_iocb_pool;
-
- phba->mbox_mem_pool = mempool_create(LPFC_MEM_POOL_SIZE,
- lpfc_pool_kmalloc, lpfc_pool_kfree,
- (void *)(unsigned long)sizeof(LPFC_MBOXQ_t));
- if (!phba->mbox_mem_pool)
- goto fail_free_scsibuf_pool;
-
- phba->nlp_mem_pool = mempool_create(LPFC_MEM_POOL_SIZE,
- lpfc_pool_kmalloc, lpfc_pool_kfree,
- (void *)(unsigned long)sizeof(struct lpfc_nodelist));
- if (!phba->nlp_mem_pool)
- goto fail_free_mbox_pool;
-
- phba->bind_mem_pool = mempool_create(LPFC_MEM_POOL_SIZE,
- lpfc_pool_kmalloc, lpfc_pool_kfree,
- (void *)(unsigned long)sizeof(struct lpfc_bindlist));
- if (!phba->bind_mem_pool)
- goto fail_free_nlp_pool;
-
- return 0;
-
- fail_free_nlp_pool:
- mempool_destroy(phba->nlp_mem_pool);
- fail_free_mbox_pool:
- mempool_destroy(phba->mbox_mem_pool);
- fail_free_scsibuf_pool:
- mempool_destroy(phba->scsibuf_mem_pool);
- fail_free_iocb_pool:
- mempool_destroy(phba->iocb_mem_pool);
- fail_free_mbuf_pool:
- while (--i)
- pci_pool_free(phba->lpfc_mbuf_pool, pool->elements[i].virt,
- pool->elements[i].phys);
- kfree(pool->elements);
- pci_pool_destroy(phba->lpfc_mbuf_pool);
- fail_free_dma_ext_pool:
- pci_pool_destroy(phba->lpfc_scsi_dma_ext_pool);
- fail:
- return -ENOMEM;
-}
-
-void
-lpfc_mem_free(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli = &phba->sli;
- struct lpfc_dma_pool *pool = &phba->lpfc_mbuf_safety_pool;
- LPFC_MBOXQ_t *mbox, *next_mbox;
- int i;
-
- list_for_each_entry_safe(mbox, next_mbox, &psli->mboxq, list) {
- list_del(&mbox->list);
- mempool_free(mbox, phba->mbox_mem_pool);
- }
-
- psli->sliinit.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
- if (psli->mbox_active) {
- mempool_free(psli->mbox_active, phba->mbox_mem_pool);
- psli->mbox_active = NULL;
- }
-
- for (i = 0; i < pool->current_count; i++)
- pci_pool_free(phba->lpfc_mbuf_pool, pool->elements[i].virt,
- pool->elements[i].phys);
- kfree(pool->elements);
- mempool_destroy(phba->bind_mem_pool);
- mempool_destroy(phba->nlp_mem_pool);
- mempool_destroy(phba->mbox_mem_pool);
- mempool_destroy(phba->scsibuf_mem_pool);
- mempool_destroy(phba->iocb_mem_pool);
-
- pci_pool_destroy(phba->lpfc_scsi_dma_ext_pool);
- pci_pool_destroy(phba->lpfc_mbuf_pool);
-}
-
-void *
-lpfc_mbuf_alloc(struct lpfc_hba *phba, int mem_flags, dma_addr_t *handle)
-{
- struct lpfc_dma_pool *pool = &phba->lpfc_mbuf_safety_pool;
- void *ret;
-
- ret = pci_pool_alloc(phba->lpfc_mbuf_pool, GFP_ATOMIC, handle);
-
- if (!ret && ( mem_flags & MEM_PRI) && pool->current_count) {
- pool->current_count--;
- ret = pool->elements[pool->current_count].virt;
- *handle = pool->elements[pool->current_count].phys;
- }
- return ret;
-}
-
-void
-lpfc_mbuf_free(struct lpfc_hba * phba, void *virt, dma_addr_t dma)
-{
- struct lpfc_dma_pool *pool = &phba->lpfc_mbuf_safety_pool;
-
- if (pool->current_count < pool->max_count) {
- pool->elements[pool->current_count].virt = virt;
- pool->elements[pool->current_count].phys = dma;
- pool->current_count++;
- } else {
- pci_pool_free(phba->lpfc_mbuf_pool, virt, dma);
- }
- return;
-}
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_nportdisc.c 1.146 2004/11/18 14:53:54EST sf_support Exp $
- */
-
-#include <linux/version.h>
-#include <linux/blkdev.h>
-#include <linux/dma-mapping.h>
-#include <linux/pci.h>
-#include <linux/spinlock.h>
-#include <scsi/scsi_device.h>
-#include "lpfc_sli.h"
-#include "lpfc_disc.h"
-#include "lpfc_scsi.h"
-#include "lpfc.h"
-#include "lpfc_crtn.h"
-#include "lpfc_hw.h"
-#include "lpfc_logmsg.h"
-#include "lpfc_mem.h"
-
-extern uint8_t lpfcAlpaArray[];
-
-
-/* Called to verify a rcv'ed ADISC was intended for us. */
-static int
-lpfc_check_adisc(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp,
- struct lpfc_name * nn, struct lpfc_name * pn)
-{
- /* Compare the ADISC rsp WWNN / WWPN matches our internal node
- * table entry for that node.
- */
- if (memcmp(nn, &ndlp->nlp_nodename, sizeof (struct lpfc_name)) != 0)
- return (0);
-
- if (memcmp(pn, &ndlp->nlp_portname, sizeof (struct lpfc_name)) != 0)
- return (0);
-
- /* we match, return success */
- return (1);
-}
-
-
-int
-lpfc_check_sparm(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, struct serv_parm * sp,
- uint32_t class)
-{
- volatile struct serv_parm *hsp = &phba->fc_sparam;
- /* First check for supported version */
-
- /* Next check for class validity */
- if (sp->cls1.classValid) {
-
- if (sp->cls1.rcvDataSizeMsb > hsp->cls1.rcvDataSizeMsb)
- sp->cls1.rcvDataSizeMsb = hsp->cls1.rcvDataSizeMsb;
- if (sp->cls1.rcvDataSizeLsb > hsp->cls1.rcvDataSizeLsb)
- sp->cls1.rcvDataSizeLsb = hsp->cls1.rcvDataSizeLsb;
- } else if (class == CLASS1) {
- return (0);
- }
-
- if (sp->cls2.classValid) {
-
- if (sp->cls2.rcvDataSizeMsb > hsp->cls2.rcvDataSizeMsb)
- sp->cls2.rcvDataSizeMsb = hsp->cls2.rcvDataSizeMsb;
- if (sp->cls2.rcvDataSizeLsb > hsp->cls2.rcvDataSizeLsb)
- sp->cls2.rcvDataSizeLsb = hsp->cls2.rcvDataSizeLsb;
- } else if (class == CLASS2) {
- return (0);
- }
-
- if (sp->cls3.classValid) {
-
- if (sp->cls3.rcvDataSizeMsb > hsp->cls3.rcvDataSizeMsb)
- sp->cls3.rcvDataSizeMsb = hsp->cls3.rcvDataSizeMsb;
- if (sp->cls3.rcvDataSizeLsb > hsp->cls3.rcvDataSizeLsb)
- sp->cls3.rcvDataSizeLsb = hsp->cls3.rcvDataSizeLsb;
- } else if (class == CLASS3) {
- return (0);
- }
-
- if (sp->cmn.bbRcvSizeMsb > hsp->cmn.bbRcvSizeMsb)
- sp->cmn.bbRcvSizeMsb = hsp->cmn.bbRcvSizeMsb;
- if (sp->cmn.bbRcvSizeLsb > hsp->cmn.bbRcvSizeLsb)
- sp->cmn.bbRcvSizeLsb = hsp->cmn.bbRcvSizeLsb;
-
- /* If check is good, copy wwpn wwnn into ndlp */
- memcpy(&ndlp->nlp_nodename, &sp->nodeName, sizeof (struct lpfc_name));
- memcpy(&ndlp->nlp_portname, &sp->portName, sizeof (struct lpfc_name));
- return (1);
-}
-
-static void *
-lpfc_check_elscmpl_iocb(struct lpfc_hba * phba,
- struct lpfc_iocbq *cmdiocb,
- struct lpfc_iocbq *rspiocb)
-{
- struct lpfc_dmabuf *pcmd, *prsp;
- uint32_t *lp;
- void *ptr;
- IOCB_t *irsp;
-
- irsp = &rspiocb->iocb;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- /* For lpfc_els_abort, context2 could be zero'ed to delay
- * freeing associated memory till after ABTS completes.
- */
- if (pcmd) {
- prsp = (struct lpfc_dmabuf *) pcmd->list.next;
- lp = (uint32_t *) prsp->virt;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, prsp->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- ptr = (void *)((uint8_t *)lp + sizeof(uint32_t));
- }
- else {
- /* Force ulpStatus error since we are returning NULL ptr */
- if (!(irsp->ulpStatus)) {
- irsp->ulpStatus = IOSTAT_LOCAL_REJECT;
- irsp->un.ulpWord[4] = IOERR_SLI_ABORTED;
- }
- ptr = NULL;
- }
- return (ptr);
-}
-
-
-/*
- * Free resources / clean up outstanding I/Os
- * associated with a LPFC_NODELIST entry. This
- * routine effectively results in a "software abort".
- */
-static int
-lpfc_els_abort(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp,
- int send_abts)
-{
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- struct lpfc_iocbq *iocb, *next_iocb;
- IOCB_t *icmd;
-
- /* Abort outstanding I/O on NPort <nlp_DID> */
- lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
- "%d:0201 Abort outstanding I/O on NPort x%x "
- "Data: x%x x%x x%x\n",
- phba->brd_no, ndlp->nlp_DID, ndlp->nlp_flag,
- ndlp->nlp_state, ndlp->nlp_rpi);
-
- psli = &phba->sli;
- pring = &psli->ring[LPFC_ELS_RING];
-
- /* First check the txq */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
- /* Check to see if iocb matches the nport we are looking for */
- if ((lpfc_check_sli_ndlp(phba, pring, iocb, ndlp))) {
- /* It matches, so deque and call compl with an error */
- list_del(&iocb->list);
- pring->txq_cnt--;
- if (iocb->iocb_cmpl) {
- icmd = &iocb->iocb;
- icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
- (iocb->iocb_cmpl) (phba, iocb, iocb);
- } else {
- mempool_free(iocb, phba->iocb_mem_pool);
- }
- }
- }
-
- /* Everything on txcmplq will be returned by firmware
- * with a no rpi / linkdown / abort error. For ring 0,
- * ELS discovery, we want to get rid of it right here.
- */
- /* Next check the txcmplq */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
- /* Check to see if iocb matches the nport we are looking for */
- if ((lpfc_check_sli_ndlp (phba, pring, iocb, ndlp))) {
- /* It matches, so deque and call compl with an error */
- list_del(&iocb->list);
- pring->txcmplq_cnt--;
-
- icmd = &iocb->iocb;
- /* If the driver is completing an ELS
- * command early, flush it out of the firmware.
- */
- if (send_abts &&
- (icmd->ulpCommand == CMD_ELS_REQUEST64_CR) &&
- (icmd->un.elsreq64.bdl.ulpIoTag32)) {
- lpfc_sli_issue_abort_iotag32(phba, pring, iocb);
- }
- if (iocb->iocb_cmpl) {
- icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
- (iocb->iocb_cmpl) (phba, iocb, iocb);
- } else {
- mempool_free(iocb, phba->iocb_mem_pool);
- }
- }
- }
-
- /* If we are delaying issuing an ELS command, cancel it */
- if(ndlp->nlp_flag & NLP_DELAY_TMO) {
- ndlp->nlp_flag &= ~NLP_DELAY_TMO;
- del_timer_sync(&ndlp->nlp_delayfunc);
- }
- return (0);
-}
-
-static int
-lpfc_rcv_plogi(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp,
- struct lpfc_iocbq *cmdiocb)
-{
- struct lpfc_dmabuf *pcmd;
- uint32_t *lp;
- IOCB_t *icmd;
- struct serv_parm *sp;
- LPFC_MBOXQ_t *mbox;
- struct ls_rjt stat;
-
- memset(&stat, 0, sizeof (struct ls_rjt));
- if (phba->hba_state <= LPFC_FLOGI) {
- /* Before responding to PLOGI, check for pt2pt mode.
- * If we are pt2pt, with an outstanding FLOGI, abort
- * the FLOGI and resend it first.
- */
- if (phba->fc_flag & FC_PT2PT) {
- lpfc_els_abort_flogi(phba);
- if(!(phba->fc_flag & FC_PT2PT_PLOGI)) {
- /* If the other side is supposed to initiate
- * the PLOGI anyway, just ACC it now and
- * move on with discovery.
- */
- phba->fc_edtov = FF_DEF_EDTOV;
- phba->fc_ratov = FF_DEF_RATOV;
- /* Start discovery - this should just do
- CLEAR_LA */
- lpfc_disc_start(phba);
- }
- else {
- lpfc_initial_flogi(phba);
- }
- }
- else {
- stat.un.b.lsRjtRsnCode = LSRJT_LOGICAL_BSY;
- stat.un.b.lsRjtRsnCodeExp = LSEXP_NOTHING_MORE;
- goto out;
- }
- }
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
- lp = (uint32_t *) pcmd->virt;
- sp = (struct serv_parm *) ((uint8_t *) lp + sizeof (uint32_t));
- if ((lpfc_check_sparm(phba, ndlp, sp, CLASS3) == 0)) {
- /* Reject this request because invalid parameters */
- stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
- stat.un.b.lsRjtRsnCodeExp = LSEXP_SPARM_OPTIONS;
- goto out;
- }
- icmd = &cmdiocb->iocb;
-
- /* PLOGI chkparm OK */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_ELS,
- "%d:0114 PLOGI chkparm OK Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- ndlp->nlp_DID, ndlp->nlp_state, ndlp->nlp_flag,
- ndlp->nlp_rpi);
-
- if ((phba->cfg_fcp_class == 2) &&
- (sp->cls2.classValid)) {
- ndlp->nlp_fcp_info |= CLASS2;
- } else {
- ndlp->nlp_fcp_info |= CLASS3;
- }
-
- /* no need to reg_login if we are already in one of these states */
- switch(ndlp->nlp_state) {
- case NLP_STE_REG_LOGIN_ISSUE:
- case NLP_STE_PRLI_ISSUE:
- case NLP_STE_UNMAPPED_NODE:
- case NLP_STE_MAPPED_NODE:
- lpfc_els_rsp_acc(phba, ELS_CMD_PLOGI, cmdiocb, ndlp, NULL, 0);
- return (1);
- }
-
- if ((mbox = mempool_alloc(phba->mbox_mem_pool, GFP_ATOMIC)) == 0) {
- stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
- stat.un.b.lsRjtRsnCodeExp = LSEXP_OUT_OF_RESOURCE;
- goto out;
- }
-
- if ((phba->fc_flag & FC_PT2PT)
- && !(phba->fc_flag & FC_PT2PT_PLOGI)) {
- /* rcv'ed PLOGI decides what our NPortId will be */
- phba->fc_myDID = icmd->un.rcvels.parmRo;
- lpfc_config_link(phba, mbox);
- if (lpfc_sli_issue_mbox
- (phba, mbox, (MBX_NOWAIT | MBX_STOP_IOCB))
- == MBX_NOT_FINISHED) {
- mempool_free( mbox, phba->mbox_mem_pool);
- stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
- stat.un.b.lsRjtRsnCodeExp = LSEXP_OUT_OF_RESOURCE;
- goto out;
- }
- if ((mbox = mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC)) == 0) {
- stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
- stat.un.b.lsRjtRsnCodeExp = LSEXP_OUT_OF_RESOURCE;
- goto out;
- }
- lpfc_can_disctmo(phba);
- }
-
- if(lpfc_reg_login(phba, icmd->un.rcvels.remoteID,
- (uint8_t *) sp, mbox, 0)) {
- mempool_free( mbox, phba->mbox_mem_pool);
- stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
- stat.un.b.lsRjtRsnCodeExp = LSEXP_OUT_OF_RESOURCE;
-out:
- lpfc_els_rsp_reject(phba, stat.un.lsRjtError, cmdiocb, ndlp);
- return (0);
- }
-
- /* ACC PLOGI rsp command needs to execute first,
- * queue this mbox command to be processed later.
- */
- mbox->mbox_cmpl = lpfc_mbx_cmpl_reg_login;
- mbox->context2 = ndlp;
- ndlp->nlp_flag |= NLP_ACC_REGLOGIN;
-
- /* If there is an outstanding PLOGI issued, abort it before
- * sending ACC rsp to PLOGI recieved.
- */
- if(ndlp->nlp_state == NLP_STE_PLOGI_ISSUE) {
- /* software abort outstanding PLOGI */
- lpfc_els_abort(phba, ndlp, 1);
- }
- ndlp->nlp_flag |= NLP_RCV_PLOGI;
- lpfc_els_rsp_acc(phba, ELS_CMD_PLOGI, cmdiocb, ndlp, mbox, 0);
- return (1);
-}
-
-static int
-lpfc_rcv_padisc(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp,
- struct lpfc_iocbq *cmdiocb)
-{
- struct lpfc_dmabuf *pcmd;
- struct serv_parm *sp;
- struct lpfc_name *pnn, *ppn;
- struct ls_rjt stat;
- ADISC *ap;
- IOCB_t *icmd;
- uint32_t *lp;
- uint32_t cmd;
-
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
- lp = (uint32_t *) pcmd->virt;
-
- cmd = *lp++;
- if (cmd == ELS_CMD_ADISC) {
- ap = (ADISC *) lp;
- pnn = (struct lpfc_name *) & ap->nodeName;
- ppn = (struct lpfc_name *) & ap->portName;
- } else {
- sp = (struct serv_parm *) lp;
- pnn = (struct lpfc_name *) & sp->nodeName;
- ppn = (struct lpfc_name *) & sp->portName;
- }
-
- icmd = &cmdiocb->iocb;
- if ((icmd->ulpStatus == 0) &&
- (lpfc_check_adisc(phba, ndlp, pnn, ppn))) {
- if (cmd == ELS_CMD_ADISC) {
- lpfc_els_rsp_adisc_acc(phba, cmdiocb, ndlp);
- }
- else {
- lpfc_els_rsp_acc(phba, ELS_CMD_PLOGI, cmdiocb, ndlp,
- NULL, 0);
- }
- return (1);
- }
- /* Reject this request because invalid parameters */
- stat.un.b.lsRjtRsvd0 = 0;
- stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
- stat.un.b.lsRjtRsnCodeExp = LSEXP_SPARM_OPTIONS;
- stat.un.b.vendorUnique = 0;
- lpfc_els_rsp_reject(phba, stat.un.lsRjtError, cmdiocb, ndlp);
-
- ndlp->nlp_last_elscmd = (unsigned long)ELS_CMD_PLOGI;
- /* 1 sec timeout */
- mod_timer(&ndlp->nlp_delayfunc, jiffies + HZ);
-
- ndlp->nlp_flag |= NLP_DELAY_TMO;
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- return (0);
-}
-
-static int
-lpfc_rcv_logo(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp,
- struct lpfc_iocbq *cmdiocb)
-{
- /* Put ndlp on NPR list with 1 sec timeout for plogi, ACC logo */
- /* Only call LOGO ACC for first LOGO, this avoids sending unnecessary
- * PLOGIs during LOGO storms from a device.
- */
- ndlp->nlp_flag |= NLP_LOGO_ACC;
- lpfc_els_rsp_acc(phba, ELS_CMD_ACC, cmdiocb, ndlp, NULL, 0);
-
- if (!(ndlp->nlp_type & NLP_FABRIC)) {
- /* Only try to re-login if this is NOT a Fabric Node */
- ndlp->nlp_last_elscmd = (unsigned long)ELS_CMD_PLOGI;
- mod_timer(&ndlp->nlp_delayfunc, jiffies + HZ * 1);
- ndlp->nlp_flag |= NLP_DELAY_TMO;
- }
-
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
-
- ndlp->nlp_flag &= ~NLP_NPR_ADISC;
- /* The driver has to wait until the ACC completes before it continues
- * processing the LOGO. The action will resume in
- * lpfc_cmpl_els_logo_acc routine. Since part of processing includes an
- * unreg_login, the driver waits so the ACC does not get aborted.
- */
- return (0);
-}
-
-static int
-lpfc_binding_found(struct lpfc_bindlist * blp, struct lpfc_nodelist * ndlp)
-{
- uint16_t bindtype = blp->nlp_bind_type;
-
- if ((bindtype & FCP_SEED_DID) &&
- (ndlp->nlp_DID == be32_to_cpu(blp->nlp_DID))) {
- return (1);
- } else if ((bindtype & FCP_SEED_WWPN) &&
- (memcmp(&ndlp->nlp_portname, &blp->nlp_portname,
- sizeof (struct lpfc_name)) == 0)) {
- return (1);
- } else if ((bindtype & FCP_SEED_WWNN) &&
- (memcmp(&ndlp->nlp_nodename, &blp->nlp_nodename,
- sizeof (struct lpfc_name)) == 0)) {
- return (1);
- }
- return (0);
-}
-
-static int
-lpfc_binding_useid(struct lpfc_hba * phba, uint32_t sid)
-{
- struct lpfc_bindlist *blp;
-
- list_for_each_entry(blp, &phba->fc_nlpbind_list, nlp_listp) {
- if (blp->nlp_sid == sid) {
- return (1);
- }
- }
- return (0);
-}
-
-static int
-lpfc_mapping_useid(struct lpfc_hba * phba, uint32_t sid)
-{
- struct lpfc_nodelist *mapnode;
- struct lpfc_bindlist *blp;
-
- list_for_each_entry(mapnode, &phba->fc_nlpmap_list, nlp_listp) {
- blp = mapnode->nlp_listp_bind;
- if (blp->nlp_sid == sid) {
- return (1);
- }
- }
- return (0);
-}
-
-static struct lpfc_bindlist *
-lpfc_create_binding(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, uint16_t index,
- uint16_t bindtype)
-{
- struct lpfc_bindlist *blp;
-
- if ((blp = mempool_alloc(phba->bind_mem_pool, GFP_ATOMIC))) {
- memset(blp, 0, sizeof (struct lpfc_bindlist));
- switch (bindtype) {
- case FCP_SEED_WWPN:
- blp->nlp_bind_type = FCP_SEED_WWPN;
- break;
- case FCP_SEED_WWNN:
- blp->nlp_bind_type = FCP_SEED_WWNN;
- break;
- case FCP_SEED_DID:
- blp->nlp_bind_type = FCP_SEED_DID;
- break;
- }
- blp->nlp_sid = index;
- blp->nlp_DID = ndlp->nlp_DID;
- memcpy(&blp->nlp_nodename, &ndlp->nlp_nodename,
- sizeof (struct lpfc_name));
- memcpy(&blp->nlp_portname, &ndlp->nlp_portname,
- sizeof (struct lpfc_name));
-
- return (blp);
- }
- return NULL;
-}
-
-
-static struct lpfc_bindlist *
-lpfc_consistent_bind_get(struct lpfc_hba * phba, struct lpfc_nodelist * ndlp)
-{
- struct lpfc_bindlist *blp, *next_blp;
- uint16_t index;
-
- /* check binding list */
- list_for_each_entry_safe(blp, next_blp, &phba->fc_nlpbind_list,
- nlp_listp) {
- if (lpfc_binding_found(blp, ndlp)) {
-
- /* take it off the binding list */
- phba->fc_bind_cnt--;
- list_del_init(&blp->nlp_listp);
-
- /* Reassign scsi id <sid> to NPort <nlp_DID> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY | LOG_FCP,
- "%d:0213 Reassign scsi id x%x to "
- "NPort x%x Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- blp->nlp_sid, ndlp->nlp_DID,
- blp->nlp_bind_type, ndlp->nlp_flag,
- ndlp->nlp_state, ndlp->nlp_rpi);
-
- return (blp);
- }
- }
-
- /* NOTE: if scan-down = 2 and we have private loop, then we use
- * AlpaArray to determine sid.
- */
- if ((phba->cfg_fcp_bind_method == 4) &&
- ((phba->fc_flag & (FC_PUBLIC_LOOP | FC_FABRIC)) ||
- (phba->fc_topology != TOPOLOGY_LOOP))) {
- /* Log message: ALPA based binding used on a non loop
- topology */
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_DISCOVERY,
- "%d:0245 ALPA based bind method used on an HBA "
- "which is in a nonloop topology Data: x%x\n",
- phba->brd_no,
- phba->fc_topology);
- }
-
- if ((phba->cfg_fcp_bind_method == 4) &&
- !(phba->fc_flag & (FC_PUBLIC_LOOP | FC_FABRIC)) &&
- (phba->fc_topology == TOPOLOGY_LOOP)) {
- for (index = 0; index < FC_MAXLOOP; index++) {
- if (ndlp->nlp_DID == (uint32_t) lpfcAlpaArray[index]) {
- if ((blp =
- lpfc_create_binding(phba, ndlp, index,
- FCP_SEED_DID))) {
- return (blp);
- }
- goto errid;
- }
- }
- }
-
- if (phba->cfg_automap) {
- while (1) {
- if ((lpfc_binding_useid(phba, phba->sid_cnt))
- || (lpfc_mapping_useid (phba, phba->sid_cnt))) {
-
- phba->sid_cnt++;
- } else {
- if ((blp =
- lpfc_create_binding(phba, ndlp,
- phba->sid_cnt,
- phba->fcp_mapping))) {
- blp->nlp_bind_type |= FCP_SEED_AUTO;
-
- phba->sid_cnt++;
- return (blp);
- }
- goto errid;
- }
- }
- }
- /* if automap on */
-errid:
- /* Cannot assign scsi id on NPort <nlp_DID> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY | LOG_FCP,
- "%d:0230 Cannot assign scsi ID on NPort x%x "
- "Data: x%x x%x x%x\n",
- phba->brd_no,
- ndlp->nlp_DID, ndlp->nlp_flag, ndlp->nlp_state,
- ndlp->nlp_rpi);
-
- return NULL;
-}
-
-static uint32_t
-lpfc_assign_binding(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, struct lpfc_bindlist *blp)
-{
- struct lpfc_target *targetp;
-
- targetp = lpfc_find_target(phba, blp->nlp_sid, ndlp);
- if(!targetp) {
- /* Cannot assign scsi id <sid> to NPort <nlp_DID> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY | LOG_FCP,
- "%d:0229 Cannot assign scsi id x%x to NPort x%x "
- "Data: x%x x%x x%x\n",
- phba->brd_no, blp->nlp_sid,
- ndlp->nlp_DID, ndlp->nlp_flag, ndlp->nlp_state,
- ndlp->nlp_rpi);
- return(0);
- }
- ndlp->nlp_sid = blp->nlp_sid;
- ndlp->nlp_flag &= ~NLP_SEED_MASK;
- switch ((blp->nlp_bind_type & FCP_SEED_MASK)) {
- case FCP_SEED_WWPN:
- ndlp->nlp_flag |= NLP_SEED_WWPN;
- break;
- case FCP_SEED_WWNN:
- ndlp->nlp_flag |= NLP_SEED_WWNN;
- break;
- case FCP_SEED_DID:
- ndlp->nlp_flag |= NLP_SEED_DID;
- break;
- }
- if (blp->nlp_bind_type & FCP_SEED_AUTO) {
- ndlp->nlp_flag |= NLP_AUTOMAP;
- }
- /* Assign scsi id <sid> to NPort <nlp_DID> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY | LOG_FCP,
- "%d:0216 Assign scsi "
- "id x%x to NPort x%x "
- "Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- ndlp->nlp_sid, ndlp->nlp_DID,
- blp->nlp_bind_type,
- ndlp->nlp_flag, ndlp->nlp_state,
- ndlp->nlp_rpi);
- return(1);
-}
-
-static uint32_t
-lpfc_disc_set_adisc(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp)
-{
- /* Check config parameter use-adisc or FCP-2 */
- if ((phba->cfg_use_adisc == 0) &&
- !(phba->fc_flag & FC_RSCN_MODE)) {
- return (0);
- }
- ndlp->nlp_flag |= NLP_NPR_ADISC;
- return (1);
-}
-
-static uint32_t
-lpfc_disc_noop(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- /* This routine does nothing, just return the current state */
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_disc_illegal(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_DISCOVERY,
- "%d:0253 Illegal State Transition: node x%x event x%x, "
- "state x%x Data: x%x x%x\n",
- phba->brd_no,
- ndlp->nlp_DID, evt, ndlp->nlp_state, ndlp->nlp_rpi,
- ndlp->nlp_flag);
- return (ndlp->nlp_state);
-}
-
-/* Start of Discovery State Machine routines */
-
-static uint32_t
-lpfc_rcv_plogi_unused_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- if(lpfc_rcv_plogi(phba, ndlp, cmdiocb)) {
- ndlp->nlp_state = NLP_STE_UNUSED_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_UNUSED_LIST);
- return (ndlp->nlp_state);
- }
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- return (NLP_STE_FREED_NODE);
-}
-
-static uint32_t
-lpfc_rcv_els_unused_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- lpfc_issue_els_logo(phba, ndlp, 0);
- lpfc_nlp_list(phba, ndlp, NLP_UNUSED_LIST);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_logo_unused_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- ndlp->nlp_flag |= NLP_LOGO_ACC;
- lpfc_els_rsp_acc(phba, ELS_CMD_ACC, cmdiocb, ndlp, NULL, 0);
- lpfc_nlp_list(phba, ndlp, NLP_UNUSED_LIST);
-
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_cmpl_logo_unused_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- return (NLP_STE_FREED_NODE);
-}
-
-static uint32_t
-lpfc_device_rm_unused_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- return (NLP_STE_FREED_NODE);
-}
-
-static uint32_t
-lpfc_rcv_plogi_plogi_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp,
- struct lpfc_iocbq *cmdiocb, uint32_t evt)
-{
- struct lpfc_dmabuf *pcmd;
- struct serv_parm *sp;
- uint32_t *lp;
- struct ls_rjt stat;
- int port_cmp;
-
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
- lp = (uint32_t *) pcmd->virt;
- sp = (struct serv_parm *) ((uint8_t *) lp + sizeof (uint32_t));
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- memset(&stat, 0, sizeof (struct ls_rjt));
-
- /* For a PLOGI, we only accept if our portname is less
- * than the remote portname.
- */
- phba->fc_stat.elsLogiCol++;
- port_cmp = memcmp(&phba->fc_portname, &sp->portName,
- sizeof (struct lpfc_name));
-
- if (port_cmp >= 0) {
- /* Reject this request because the remote node will accept
- ours */
- stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
- stat.un.b.lsRjtRsnCodeExp = LSEXP_CMD_IN_PROGRESS;
- lpfc_els_rsp_reject(phba, stat.un.lsRjtError, cmdiocb, ndlp);
- }
- else {
- lpfc_rcv_plogi(phba, ndlp, cmdiocb);
- } /* if our portname was less */
-
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_els_plogi_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- /* software abort outstanding PLOGI */
- lpfc_els_abort(phba, ndlp, 1);
- mod_timer(&ndlp->nlp_delayfunc, jiffies + HZ * 1);
- ndlp->nlp_flag |= NLP_DELAY_TMO;
-
- if(evt == NLP_EVT_RCV_LOGO) {
- lpfc_els_rsp_acc(phba, ELS_CMD_ACC, cmdiocb, ndlp, NULL, 0);
- }
- else {
- lpfc_issue_els_logo(phba, ndlp, 0);
- }
-
- /* Put ndlp in npr list set plogi timer for 1 sec */
- ndlp->nlp_last_elscmd = (unsigned long)ELS_CMD_PLOGI;
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
-
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_cmpl_plogi_plogi_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb, *rspiocb;
- struct lpfc_dmabuf *pcmd, *prsp;
- uint32_t *lp;
- IOCB_t *irsp;
- struct serv_parm *sp;
- LPFC_MBOXQ_t *mbox;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- rspiocb = cmdiocb->context_un.rsp_iocb;
-
- if (ndlp->nlp_flag & NLP_ACC_REGLOGIN) {
- return (ndlp->nlp_state);
- }
-
- irsp = &rspiocb->iocb;
-
- if (irsp->ulpStatus == 0) {
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- prsp = (struct lpfc_dmabuf *) pcmd->list.next;
- lp = (uint32_t *) prsp->virt;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, prsp->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- sp = (struct serv_parm *) ((uint8_t *) lp + sizeof (uint32_t));
- if ((lpfc_check_sparm(phba, ndlp, sp, CLASS3))) {
- /* PLOGI chkparm OK */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_ELS,
- "%d:0121 PLOGI chkparm OK "
- "Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- ndlp->nlp_DID, ndlp->nlp_state,
- ndlp->nlp_flag, ndlp->nlp_rpi);
-
- if ((phba->cfg_fcp_class == 2) &&
- (sp->cls2.classValid)) {
- ndlp->nlp_fcp_info |= CLASS2;
- } else {
- ndlp->nlp_fcp_info |= CLASS3;
- }
-
- if ((mbox = mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC))) {
- lpfc_unreg_rpi(phba, ndlp);
- if (lpfc_reg_login
- (phba, irsp->un.elsreq64.remoteID,
- (uint8_t *) sp, mbox, 0) == 0) {
- /* set_slim mailbox command needs to
- * execute first, queue this command to
- * be processed later.
- */
- switch(ndlp->nlp_DID) {
- case NameServer_DID:
- mbox->mbox_cmpl =
- lpfc_mbx_cmpl_ns_reg_login;
- break;
- case FDMI_DID:
- mbox->mbox_cmpl =
- lpfc_mbx_cmpl_fdmi_reg_login;
- break;
- default:
- mbox->mbox_cmpl =
- lpfc_mbx_cmpl_reg_login;
- }
- mbox->context2 = ndlp;
- if (lpfc_sli_issue_mbox(phba, mbox,
- (MBX_NOWAIT | MBX_STOP_IOCB))
- != MBX_NOT_FINISHED) {
- ndlp->nlp_state =
- NLP_STE_REG_LOGIN_ISSUE;
- lpfc_nlp_list(phba, ndlp,
- NLP_REGLOGIN_LIST);
- return (ndlp->nlp_state);
- }
- mempool_free(mbox, phba->mbox_mem_pool);
- } else {
- mempool_free(mbox, phba->mbox_mem_pool);
- }
- }
- }
- }
-
- /* Free this node since the driver cannot login or has the wrong
- sparm */
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- return (NLP_STE_FREED_NODE);
-}
-
-static uint32_t
-lpfc_device_rm_plogi_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- /* software abort outstanding PLOGI */
- lpfc_els_abort(phba, ndlp, 1);
-
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- return (NLP_STE_FREED_NODE);
-}
-
-static uint32_t
-lpfc_device_recov_plogi_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- /* software abort outstanding PLOGI */
- lpfc_els_abort(phba, ndlp, 1);
-
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
-
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_plogi_adisc_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- /* software abort outstanding ADISC */
- lpfc_els_abort(phba, ndlp, 1);
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- if(lpfc_rcv_plogi(phba, ndlp, cmdiocb)) {
- return (ndlp->nlp_state);
- }
- ndlp->nlp_state = NLP_STE_PLOGI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PLOGI_LIST);
- lpfc_issue_els_plogi(phba, ndlp, 0);
-
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_prli_adisc_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_els_rsp_prli_acc(phba, cmdiocb, ndlp);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_logo_adisc_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- /* software abort outstanding ADISC */
- lpfc_els_abort(phba, ndlp, 0);
-
- lpfc_rcv_logo(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_padisc_adisc_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_padisc(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_prlo_adisc_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- /* Treat like rcv logo */
- lpfc_rcv_logo(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_cmpl_adisc_adisc_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb, *rspiocb;
- struct lpfc_bindlist *blp;
- IOCB_t *irsp;
- ADISC *ap;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- rspiocb = cmdiocb->context_un.rsp_iocb;
-
- ap = (ADISC *)lpfc_check_elscmpl_iocb(phba, cmdiocb, rspiocb);
- irsp = &rspiocb->iocb;
-
- if ((irsp->ulpStatus) ||
- (!lpfc_check_adisc(phba, ndlp, &ap->nodeName, &ap->portName))) {
- ndlp->nlp_last_elscmd = (unsigned long)ELS_CMD_PLOGI;
- /* 1 sec timeout */
- mod_timer(&ndlp->nlp_delayfunc, jiffies + HZ);
- ndlp->nlp_flag |= NLP_DELAY_TMO;
-
- memset(&ndlp->nlp_nodename, 0, sizeof (struct lpfc_name));
- memset(&ndlp->nlp_portname, 0, sizeof (struct lpfc_name));
-
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- lpfc_unreg_rpi(phba, ndlp);
- return (ndlp->nlp_state);
- }
- /* move to mapped / unmapped list accordingly */
- /* Can we assign a SCSI Id to this NPort */
- if ((blp = lpfc_consistent_bind_get(phba, ndlp))) {
- /* Next 4 lines MUST be in this order */
- if(lpfc_assign_binding(phba, ndlp, blp)) {
- ndlp->nlp_state = NLP_STE_MAPPED_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_MAPPED_LIST);
- ndlp->nlp_listp_bind = blp;
-
- lpfc_set_failmask(phba, ndlp,
- (LPFC_DEV_DISCOVERY_INP|LPFC_DEV_DISCONNECTED),
- LPFC_CLR_BITMASK);
-
- return (ndlp->nlp_state);
- }
- }
- ndlp->nlp_flag |= NLP_TGT_NO_SCSIID;
- ndlp->nlp_state = NLP_STE_UNMAPPED_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_UNMAPPED_LIST);
-
- lpfc_set_failmask(phba, ndlp,
- (LPFC_DEV_DISCOVERY_INP | LPFC_DEV_DISCONNECTED),
- LPFC_CLR_BITMASK);
-
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_device_rm_adisc_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- /* software abort outstanding ADISC */
- lpfc_els_abort(phba, ndlp, 1);
-
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- return (NLP_STE_FREED_NODE);
-}
-
-static uint32_t
-lpfc_device_recov_adisc_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- /* software abort outstanding ADISC */
- lpfc_els_abort(phba, ndlp, 1);
-
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
-
- lpfc_disc_set_adisc(phba, ndlp);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_plogi_reglogin_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_plogi(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_prli_reglogin_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_els_rsp_prli_acc(phba, cmdiocb, ndlp);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_logo_reglogin_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_logo(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_padisc_reglogin_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_padisc(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_prlo_reglogin_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- lpfc_els_rsp_acc(phba, ELS_CMD_ACC, cmdiocb, ndlp, NULL, 0);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_cmpl_reglogin_reglogin_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp,
- void *arg, uint32_t evt)
-{
- LPFC_MBOXQ_t *pmb;
- MAILBOX_t *mb;
- uint32_t did;
-
- pmb = (LPFC_MBOXQ_t *) arg;
- mb = &pmb->mb;
- did = mb->un.varWords[1];
- if (mb->mbxStatus) {
- /* RegLogin failed */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_DISCOVERY,
- "%d:0246 RegLogin failed Data: x%x x%x x%x\n",
- phba->brd_no,
- did, mb->mbxStatus, phba->hba_state);
-
- mod_timer(&ndlp->nlp_delayfunc, jiffies + HZ * 1);
- ndlp->nlp_flag |= NLP_DELAY_TMO;
-
- lpfc_issue_els_logo(phba, ndlp, 0);
- /* Put ndlp in npr list set plogi timer for 1 sec */
- ndlp->nlp_last_elscmd = (unsigned long)ELS_CMD_PLOGI;
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- return (ndlp->nlp_state);
- }
-
- if (ndlp->nlp_rpi != 0)
- lpfc_findnode_remove_rpi(phba, ndlp->nlp_rpi);
-
- ndlp->nlp_rpi = mb->un.varWords[0];
- lpfc_addnode_rpi(phba, ndlp, ndlp->nlp_rpi);
-
- /* Only if we are not a fabric nport do we issue PRLI */
- if (!(ndlp->nlp_type & NLP_FABRIC)) {
- ndlp->nlp_state = NLP_STE_PRLI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PRLI_LIST);
- lpfc_issue_els_prli(phba, ndlp, 0);
- } else {
- ndlp->nlp_state = NLP_STE_UNMAPPED_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_UNMAPPED_LIST);
- }
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_device_rm_reglogin_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- return (NLP_STE_FREED_NODE);
-}
-
-static uint32_t
-lpfc_device_recov_reglogin_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_plogi_prli_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_plogi(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_prli_prli_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_els_rsp_prli_acc(phba, cmdiocb, ndlp);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_logo_prli_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- /* Software abort outstanding PRLI before sending acc */
- lpfc_els_abort(phba, ndlp, 1);
-
- lpfc_rcv_logo(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_padisc_prli_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_padisc(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-/* This routine is envoked when we rcv a PRLO request from a nport
- * we are logged into. We should send back a PRLO rsp setting the
- * appropriate bits.
- * NEXT STATE = PRLI_ISSUE
- */
-static uint32_t
-lpfc_rcv_prlo_prli_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- lpfc_els_rsp_acc(phba, ELS_CMD_ACC, cmdiocb, ndlp, NULL, 0);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_cmpl_prli_prli_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb, *rspiocb;
- IOCB_t *irsp;
- PRLI *npr;
- struct lpfc_bindlist *blp;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- rspiocb = cmdiocb->context_un.rsp_iocb;
- npr = (PRLI *)lpfc_check_elscmpl_iocb(phba, cmdiocb, rspiocb);
-
- irsp = &rspiocb->iocb;
- if (irsp->ulpStatus) {
- ndlp->nlp_state = NLP_STE_UNMAPPED_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_UNMAPPED_LIST);
- lpfc_set_failmask(phba, ndlp, LPFC_DEV_DISCOVERY_INP,
- LPFC_CLR_BITMASK);
- return (ndlp->nlp_state);
- }
-
- /* Check out PRLI rsp */
- if ((npr->acceptRspCode != PRLI_REQ_EXECUTED) ||
- (npr->prliType != PRLI_FCP_TYPE) || (npr->targetFunc != 1)) {
- ndlp->nlp_state = NLP_STE_UNMAPPED_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_UNMAPPED_LIST);
- lpfc_set_failmask(phba, ndlp,
- (LPFC_DEV_DISCOVERY_INP | LPFC_DEV_DISCONNECTED),
- LPFC_CLR_BITMASK);
- return (ndlp->nlp_state);
- }
- if (npr->Retry == 1) {
- ndlp->nlp_fcp_info |= NLP_FCP_2_DEVICE;
- }
-
- /* Can we assign a SCSI Id to this NPort */
- if ((blp = lpfc_consistent_bind_get(phba, ndlp))) {
- /* Next 4 lines MUST be in this order */
- if(lpfc_assign_binding(phba, ndlp, blp)) {
- ndlp->nlp_state = NLP_STE_MAPPED_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_MAPPED_LIST);
- ndlp->nlp_listp_bind = blp;
-
- lpfc_set_failmask(phba, ndlp,
- (LPFC_DEV_DISCOVERY_INP|LPFC_DEV_DISCONNECTED),
- LPFC_CLR_BITMASK);
- return (ndlp->nlp_state);
- }
- }
- ndlp->nlp_flag |= NLP_TGT_NO_SCSIID;
- ndlp->nlp_state = NLP_STE_UNMAPPED_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_UNMAPPED_LIST);
-
- lpfc_set_failmask(phba, ndlp,
- (LPFC_DEV_DISCOVERY_INP | LPFC_DEV_DISCONNECTED),
- LPFC_CLR_BITMASK);
- return (ndlp->nlp_state);
-}
-
-/*! lpfc_device_rm_prli_issue
- *
- * \pre
- * \post
- * \param phba
- * \param ndlp
- * \param arg
- * \param evt
- * \return uint32_t
- *
- * \b Description:
- * This routine is envoked when we a request to remove a nport we are in the
- * process of PRLIing. We should software abort outstanding prli, unreg
- * login, send a logout. We will change node state to UNUSED_NODE, put it
- * on plogi list so it can be freed when LOGO completes.
- *
- */
-static uint32_t
-lpfc_device_rm_prli_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- /* software abort outstanding PRLI */
- lpfc_els_abort(phba, ndlp, 1);
-
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- return (NLP_STE_FREED_NODE);
-}
-
-
-/*! lpfc_device_recov_prli_issue
- *
- * \pre
- * \post
- * \param phba
- * \param ndlp
- * \param arg
- * \param evt
- * \return uint32_t
- *
- * \b Description:
- * The routine is envoked when the state of a device is unknown, like
- * during a link down. We should remove the nodelist entry from the
- * unmapped list, issue a UNREG_LOGIN, do a software abort of the
- * outstanding PRLI command, then free the node entry.
- */
-static uint32_t
-lpfc_device_recov_prli_issue(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- /* software abort outstanding PRLI */
- lpfc_els_abort(phba, ndlp, 1);
-
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_plogi_unmap_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_plogi(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_prli_unmap_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_els_rsp_prli_acc(phba, cmdiocb, ndlp);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_logo_unmap_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_logo(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_padisc_unmap_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_padisc(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_prlo_unmap_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- /* Treat like rcv logo */
- lpfc_rcv_logo(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_device_recov_unmap_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
- lpfc_disc_set_adisc(phba, ndlp);
-
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_plogi_mapped_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_plogi(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_prli_mapped_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_els_rsp_prli_acc(phba, cmdiocb, ndlp);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_logo_mapped_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_logo(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_padisc_mapped_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_padisc(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_prlo_mapped_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- /* flush the target */
- lpfc_sli_abort_iocb_tgt(phba,
- &phba->sli.ring[phba->sli.fcp_ring],
- ndlp->nlp_sid, LPFC_ABORT_ALLQ);
-
- /* Treat like rcv logo */
- lpfc_rcv_logo(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_device_recov_mapped_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- ndlp->nlp_state = NLP_STE_NPR_NODE;
- lpfc_nlp_list(phba, ndlp, NLP_NPR_LIST);
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
- lpfc_disc_set_adisc(phba, ndlp);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_plogi_npr_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- /* Ignore PLOGI if we have an outstanding LOGO */
- if (ndlp->nlp_flag & NLP_LOGO_SND) {
- return (ndlp->nlp_state);
- }
-
- if(lpfc_rcv_plogi(phba, ndlp, cmdiocb)) {
- ndlp->nlp_flag &= ~(NLP_NPR_ADISC | NLP_NPR_2B_DISC);
- return (ndlp->nlp_state);
- }
-
- /* send PLOGI immediately, move to PLOGI issue state */
- if(!(ndlp->nlp_flag & NLP_DELAY_TMO)) {
- ndlp->nlp_state = NLP_STE_PLOGI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PLOGI_LIST);
- lpfc_issue_els_plogi(phba, ndlp, 0);
- }
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_prli_npr_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
- struct ls_rjt stat;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- memset(&stat, 0, sizeof (struct ls_rjt));
- stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
- stat.un.b.lsRjtRsnCodeExp = LSEXP_NOTHING_MORE;
- lpfc_els_rsp_reject(phba, stat.un.lsRjtError, cmdiocb, ndlp);
-
- if(!(ndlp->nlp_flag & NLP_DELAY_TMO)) {
- if (ndlp->nlp_flag & NLP_NPR_ADISC) {
- ndlp->nlp_state = NLP_STE_ADISC_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_ADISC_LIST);
- lpfc_issue_els_adisc(phba, ndlp, 0);
- } else {
- ndlp->nlp_state = NLP_STE_PLOGI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PLOGI_LIST);
- lpfc_issue_els_plogi(phba, ndlp, 0);
- }
- }
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_logo_npr_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_logo(phba, ndlp, cmdiocb);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_padisc_npr_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_rcv_padisc(phba, ndlp, cmdiocb);
-
- if(!(ndlp->nlp_flag & NLP_DELAY_TMO)) {
- if (ndlp->nlp_flag & NLP_NPR_ADISC) {
- ndlp->nlp_state = NLP_STE_ADISC_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_ADISC_LIST);
- lpfc_issue_els_adisc(phba, ndlp, 0);
- } else {
- ndlp->nlp_state = NLP_STE_PLOGI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PLOGI_LIST);
- lpfc_issue_els_plogi(phba, ndlp, 0);
- }
- }
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_rcv_prlo_npr_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- struct lpfc_iocbq *cmdiocb;
- struct lpfc_dmabuf *pcmd;
-
- cmdiocb = (struct lpfc_iocbq *) arg;
- pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- pci_dma_sync_single_for_cpu(phba->pcidev, pcmd->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
-
- lpfc_els_rsp_acc(phba, ELS_CMD_ACC, cmdiocb, ndlp, NULL, 0);
-
- if(ndlp->nlp_flag & NLP_DELAY_TMO) {
- if (ndlp->nlp_last_elscmd == (unsigned long)ELS_CMD_PLOGI) {
- return (ndlp->nlp_state);
- } else {
- del_timer_sync(&ndlp->nlp_delayfunc);
- ndlp->nlp_flag &= ~NLP_DELAY_TMO;
- }
- }
-
- ndlp->nlp_state = NLP_STE_PLOGI_ISSUE;
- lpfc_nlp_list(phba, ndlp, NLP_PLOGI_LIST);
- lpfc_issue_els_plogi(phba, ndlp, 0);
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_cmpl_logo_npr_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- lpfc_unreg_rpi(phba, ndlp);
- /* This routine does nothing, just return the current state */
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_cmpl_reglogin_npr_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- LPFC_MBOXQ_t *pmb;
- MAILBOX_t *mb;
-
- pmb = (LPFC_MBOXQ_t *) arg;
- mb = &pmb->mb;
-
- /* save rpi */
- if (ndlp->nlp_rpi != 0)
- lpfc_findnode_remove_rpi(phba, ndlp->nlp_rpi);
-
- ndlp->nlp_rpi = mb->un.varWords[0];
- lpfc_addnode_rpi(phba, ndlp, ndlp->nlp_rpi);
-
- return (ndlp->nlp_state);
-}
-
-static uint32_t
-lpfc_device_rm_npr_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
- return (NLP_STE_FREED_NODE);
-}
-
-static uint32_t
-lpfc_device_recov_npr_node(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg,
- uint32_t evt)
-{
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
- return (ndlp->nlp_state);
-}
-
-
-/* This next section defines the NPort Discovery State Machine */
-
-/* There are 4 different double linked lists nodelist entries can reside on.
- * The plogi list and adisc list are used when Link Up discovery or RSCN
- * processing is needed. Each list holds the nodes that we will send PLOGI
- * or ADISC on. These lists will keep track of what nodes will be effected
- * by an RSCN, or a Link Up (Typically, all nodes are effected on Link Up).
- * The unmapped_list will contain all nodes that we have successfully logged
- * into at the Fibre Channel level. The mapped_list will contain all nodes
- * that are mapped FCP targets.
- */
-/*
- * The bind list is a list of undiscovered (potentially non-existent) nodes
- * that we have saved binding information on. This information is used when
- * nodes transition from the unmapped to the mapped list.
- */
-/* For UNUSED_NODE state, the node has just been allocated .
- * For PLOGI_ISSUE and REG_LOGIN_ISSUE, the node is on
- * the PLOGI list. For REG_LOGIN_COMPL, the node is taken off the PLOGI list
- * and put on the unmapped list. For ADISC processing, the node is taken off
- * the ADISC list and placed on either the mapped or unmapped list (depending
- * on its previous state). Once on the unmapped list, a PRLI is issued and the
- * state changed to PRLI_ISSUE. When the PRLI completion occurs, the state is
- * changed to UNMAPPED_NODE. If the completion indicates a mapped
- * node, the node is taken off the unmapped list. The binding list is checked
- * for a valid binding, or a binding is automatically assigned. If binding
- * assignment is unsuccessful, the node is left on the unmapped list. If
- * binding assignment is successful, the associated binding list entry (if
- * any) is removed, and the node is placed on the mapped list.
- */
-/*
- * For a Link Down, all nodes on the ADISC, PLOGI, unmapped or mapped
- * lists will receive a DEVICE_RECOVERY event. If the linkdown or nodev timers
- * expire, all effected nodes will receive a DEVICE_RM event.
- */
-/*
- * For a Link Up or RSCN, all nodes will move from the mapped / unmapped lists
- * to either the ADISC or PLOGI list. After a Nameserver query or ALPA loopmap
- * check, additional nodes may be added or removed (via DEVICE_RM) to / from
- * the PLOGI or ADISC lists. Once the PLOGI and ADISC lists are populated,
- * we will first process the ADISC list. 32 entries are processed initially and
- * ADISC is initited for each one. Completions / Events for each node are
- * funnelled thru the state machine. As each node finishes ADISC processing, it
- * starts ADISC for any nodes waiting for ADISC processing. If no nodes are
- * waiting, and the ADISC list count is identically 0, then we are done. For
- * Link Up discovery, since all nodes on the PLOGI list are UNREG_LOGIN'ed, we
- * can issue a CLEAR_LA and reenable Link Events. Next we will process the PLOGI
- * list. 32 entries are processed initially and PLOGI is initited for each one.
- * Completions / Events for each node are funnelled thru the state machine. As
- * each node finishes PLOGI processing, it starts PLOGI for any nodes waiting
- * for PLOGI processing. If no nodes are waiting, and the PLOGI list count is
- * indentically 0, then we are done. We have now completed discovery / RSCN
- * handling. Upon completion, ALL nodes should be on either the mapped or
- * unmapped lists.
- */
-
-static void *lpfc_disc_action[NLP_STE_MAX_STATE * NLP_EVT_MAX_EVENT] = {
- /* Action routine Event Current State */
- (void *)lpfc_rcv_plogi_unused_node, /* RCV_PLOGI UNUSED_NODE */
- (void *)lpfc_rcv_els_unused_node, /* RCV_PRLI */
- (void *)lpfc_rcv_logo_unused_node, /* RCV_LOGO */
- (void *)lpfc_rcv_els_unused_node, /* RCV_ADISC */
- (void *)lpfc_rcv_els_unused_node, /* RCV_PDISC */
- (void *)lpfc_rcv_els_unused_node, /* RCV_PRLO */
- (void *)lpfc_disc_illegal, /* CMPL_PLOGI */
- (void *)lpfc_disc_illegal, /* CMPL_PRLI */
- (void *)lpfc_cmpl_logo_unused_node, /* CMPL_LOGO */
- (void *)lpfc_disc_illegal, /* CMPL_ADISC */
- (void *)lpfc_disc_illegal, /* CMPL_REG_LOGIN */
- (void *)lpfc_device_rm_unused_node, /* DEVICE_RM */
- (void *)lpfc_disc_illegal, /* DEVICE_RECOVERY */
-
- (void *)lpfc_rcv_plogi_plogi_issue, /* RCV_PLOGI PLOGI_ISSUE */
- (void *)lpfc_rcv_els_plogi_issue, /* RCV_PRLI */
- (void *)lpfc_rcv_els_plogi_issue, /* RCV_LOGO */
- (void *)lpfc_rcv_els_plogi_issue, /* RCV_ADISC */
- (void *)lpfc_rcv_els_plogi_issue, /* RCV_PDISC */
- (void *)lpfc_rcv_els_plogi_issue, /* RCV_PRLO */
- (void *)lpfc_cmpl_plogi_plogi_issue, /* CMPL_PLOGI */
- (void *)lpfc_disc_illegal, /* CMPL_PRLI */
- (void *)lpfc_disc_illegal, /* CMPL_LOGO */
- (void *)lpfc_disc_illegal, /* CMPL_ADISC */
- (void *)lpfc_disc_illegal, /* CMPL_REG_LOGIN */
- (void *)lpfc_device_rm_plogi_issue, /* DEVICE_RM */
- (void *)lpfc_device_recov_plogi_issue, /* DEVICE_RECOVERY */
-
- (void *)lpfc_rcv_plogi_adisc_issue, /* RCV_PLOGI ADISC_ISSUE */
- (void *)lpfc_rcv_prli_adisc_issue, /* RCV_PRLI */
- (void *)lpfc_rcv_logo_adisc_issue, /* RCV_LOGO */
- (void *)lpfc_rcv_padisc_adisc_issue, /* RCV_ADISC */
- (void *)lpfc_rcv_padisc_adisc_issue, /* RCV_PDISC */
- (void *)lpfc_rcv_prlo_adisc_issue, /* RCV_PRLO */
- (void *)lpfc_disc_illegal, /* CMPL_PLOGI */
- (void *)lpfc_disc_illegal, /* CMPL_PRLI */
- (void *)lpfc_disc_illegal, /* CMPL_LOGO */
- (void *)lpfc_cmpl_adisc_adisc_issue, /* CMPL_ADISC */
- (void *)lpfc_disc_illegal, /* CMPL_REG_LOGIN */
- (void *)lpfc_device_rm_adisc_issue, /* DEVICE_RM */
- (void *)lpfc_device_recov_adisc_issue, /* DEVICE_RECOVERY */
-
- (void *)lpfc_rcv_plogi_reglogin_issue, /* RCV_PLOGI REG_LOGIN_ISSUE */
- (void *)lpfc_rcv_prli_reglogin_issue, /* RCV_PLOGI */
- (void *)lpfc_rcv_logo_reglogin_issue, /* RCV_LOGO */
- (void *)lpfc_rcv_padisc_reglogin_issue, /* RCV_ADISC */
- (void *)lpfc_rcv_padisc_reglogin_issue, /* RCV_PDISC */
- (void *)lpfc_rcv_prlo_reglogin_issue, /* RCV_PRLO */
- (void *)lpfc_disc_illegal, /* CMPL_PLOGI */
- (void *)lpfc_disc_illegal, /* CMPL_PRLI */
- (void *)lpfc_disc_illegal, /* CMPL_LOGO */
- (void *)lpfc_disc_illegal, /* CMPL_ADISC */
- (void *)lpfc_cmpl_reglogin_reglogin_issue,/* CMPL_REG_LOGIN */
- (void *)lpfc_device_rm_reglogin_issue, /* DEVICE_RM */
- (void *)lpfc_device_recov_reglogin_issue,/* DEVICE_RECOVERY */
-
- (void *)lpfc_rcv_plogi_prli_issue, /* RCV_PLOGI PRLI_ISSUE */
- (void *)lpfc_rcv_prli_prli_issue, /* RCV_PRLI */
- (void *)lpfc_rcv_logo_prli_issue, /* RCV_LOGO */
- (void *)lpfc_rcv_padisc_prli_issue, /* RCV_ADISC */
- (void *)lpfc_rcv_padisc_prli_issue, /* RCV_PDISC */
- (void *)lpfc_rcv_prlo_prli_issue, /* RCV_PRLO */
- (void *)lpfc_disc_illegal, /* CMPL_PLOGI */
- (void *)lpfc_cmpl_prli_prli_issue, /* CMPL_PRLI */
- (void *)lpfc_disc_illegal, /* CMPL_LOGO */
- (void *)lpfc_disc_illegal, /* CMPL_ADISC */
- (void *)lpfc_disc_illegal, /* CMPL_REG_LOGIN */
- (void *)lpfc_device_rm_prli_issue, /* DEVICE_RM */
- (void *)lpfc_device_recov_prli_issue, /* DEVICE_RECOVERY */
-
- (void *)lpfc_rcv_plogi_unmap_node, /* RCV_PLOGI UNMAPPED_NODE */
- (void *)lpfc_rcv_prli_unmap_node, /* RCV_PRLI */
- (void *)lpfc_rcv_logo_unmap_node, /* RCV_LOGO */
- (void *)lpfc_rcv_padisc_unmap_node, /* RCV_ADISC */
- (void *)lpfc_rcv_padisc_unmap_node, /* RCV_PDISC */
- (void *)lpfc_rcv_prlo_unmap_node, /* RCV_PRLO */
- (void *)lpfc_disc_illegal, /* CMPL_PLOGI */
- (void *)lpfc_disc_illegal, /* CMPL_PRLI */
- (void *)lpfc_disc_illegal, /* CMPL_LOGO */
- (void *)lpfc_disc_illegal, /* CMPL_ADISC */
- (void *)lpfc_disc_illegal, /* CMPL_REG_LOGIN */
- (void *)lpfc_disc_illegal, /* DEVICE_RM */
- (void *)lpfc_device_recov_unmap_node, /* DEVICE_RECOVERY */
-
- (void *)lpfc_rcv_plogi_mapped_node, /* RCV_PLOGI MAPPED_NODE */
- (void *)lpfc_rcv_prli_mapped_node, /* RCV_PRLI */
- (void *)lpfc_rcv_logo_mapped_node, /* RCV_LOGO */
- (void *)lpfc_rcv_padisc_mapped_node, /* RCV_ADISC */
- (void *)lpfc_rcv_padisc_mapped_node, /* RCV_PDISC */
- (void *)lpfc_rcv_prlo_mapped_node, /* RCV_PRLO */
- (void *)lpfc_disc_illegal, /* CMPL_PLOGI */
- (void *)lpfc_disc_illegal, /* CMPL_PRLI */
- (void *)lpfc_disc_illegal, /* CMPL_LOGO */
- (void *)lpfc_disc_illegal, /* CMPL_ADISC */
- (void *)lpfc_disc_illegal, /* CMPL_REG_LOGIN */
- (void *)lpfc_disc_illegal, /* DEVICE_RM */
- (void *)lpfc_device_recov_mapped_node, /* DEVICE_RECOVERY */
-
- (void *)lpfc_rcv_plogi_npr_node, /* RCV_PLOGI NPR_NODE */
- (void *)lpfc_rcv_prli_npr_node, /* RCV_PRLI */
- (void *)lpfc_rcv_logo_npr_node, /* RCV_LOGO */
- (void *)lpfc_rcv_padisc_npr_node, /* RCV_ADISC */
- (void *)lpfc_rcv_padisc_npr_node, /* RCV_PDISC */
- (void *)lpfc_rcv_prlo_npr_node, /* RCV_PRLO */
- (void *)lpfc_disc_noop, /* CMPL_PLOGI */
- (void *)lpfc_disc_noop, /* CMPL_PRLI */
- (void *)lpfc_cmpl_logo_npr_node, /* CMPL_LOGO */
- (void *)lpfc_disc_noop, /* CMPL_ADISC */
- (void *)lpfc_cmpl_reglogin_npr_node, /* CMPL_REG_LOGIN */
- (void *)lpfc_device_rm_npr_node, /* DEVICE_RM */
- (void *)lpfc_device_recov_npr_node, /* DEVICE_RECOVERY */
-};
-
-int
-lpfc_disc_state_machine(struct lpfc_hba * phba,
- struct lpfc_nodelist * ndlp, void *arg, uint32_t evt)
-{
- uint32_t cur_state, rc;
- uint32_t(*func) (struct lpfc_hba *, struct lpfc_nodelist *, void *,
- uint32_t);
-
- ndlp->nlp_disc_refcnt++;
- cur_state = ndlp->nlp_state;
-
- /* DSM in event <evt> on NPort <nlp_DID> in state <cur_state> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY,
- "%d:0211 DSM in event x%x on NPort x%x in state %d "
- "Data: x%x\n",
- phba->brd_no,
- evt, ndlp->nlp_DID, cur_state, ndlp->nlp_flag);
-
- func = (uint32_t(*)(struct lpfc_hba *, struct lpfc_nodelist *, void *,
- uint32_t))
- lpfc_disc_action[(cur_state * NLP_EVT_MAX_EVENT) + evt];
- rc = (func) (phba, ndlp, arg, evt);
-
- /* DSM out state <rc> on NPort <nlp_DID> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_DISCOVERY,
- "%d:0212 DSM out state %d on NPort x%x Data: x%x\n",
- phba->brd_no,
- rc, ndlp->nlp_DID, ndlp->nlp_flag);
-
- ndlp->nlp_disc_refcnt--;
-
- /* Check to see if ndlp removal is deferred */
- if ((ndlp->nlp_disc_refcnt == 0)
- && (ndlp->nlp_flag & NLP_DELAY_REMOVE)) {
-
- ndlp->nlp_flag &= ~NLP_DELAY_REMOVE;
- lpfc_nlp_remove(phba, ndlp);
- return (NLP_STE_FREED_NODE);
- }
- if (rc == NLP_STE_FREED_NODE)
- return (NLP_STE_FREED_NODE);
- ndlp->nlp_state = rc;
- return (rc);
-}
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_scsi.h 1.68 2004/11/10 11:40:43EST sf_support Exp $
- */
-
-#ifndef _H_LPFC_SCSI
-#define _H_LPFC_SCSI
-
-#include "lpfc_disc.h"
-#include "lpfc_mem.h"
-#include "lpfc_sli.h"
-
-struct lpfc_hba;
-
-
-struct lpfc_target {
- struct lpfc_nodelist *pnode; /* Pointer to the node structure. */
- uint16_t scsi_id;
- uint32_t qcmdcnt;
- uint32_t iodonecnt;
- uint32_t errorcnt;
- uint32_t slavecnt;
-#if defined(FC_TRANS_VER1) || defined(FC_TRANS_265_BLKPATCH)
- uint16_t blocked;
-#endif
-#ifdef FC_TRANS_VER1
- struct scsi_target *starget; /* Pointer to midlayer target
- structure. */
-#endif
-#if defined(FC_TRANS_265_BLKPATCH)
- struct timer_list dev_loss_timer;
-#endif
-};
-
-struct lpfc_scsi_buf {
- struct scsi_cmnd *pCmd;
- struct lpfc_hba *scsi_hba;
- struct lpfc_target *target;
-
- uint32_t timeout;
-
- uint16_t status; /* From IOCB Word 7- ulpStatus */
- uint32_t result; /* From IOCB Word 4. */
-
- uint32_t seg_cnt; /* Number of scatter-gather segments returned by
- * dma_map_sg. The driver needs this for calls
- * to dma_unmap_sg. */
- dma_addr_t nonsg_phys; /* Non scatter-gather physical address. */
-
- /* dma_ext has both virt, phys to dma-able buffer
- * which contains fcp_cmd, fcp_rsp and scatter gather list fro upto
- * 68 (LPFC_SCSI_BPL_SIZE) BDE entries,
- * xfer length, cdb, data direction....
- */
- struct lpfc_dmabuf dma_ext;
- struct fcp_cmnd *fcp_cmnd;
- struct fcp_rsp *fcp_rsp;
- struct ulp_bde64 *fcp_bpl;
-
- /* cur_iocbq has phys of the dma-able buffer.
- * Iotag is in here
- */
- struct lpfc_iocbq cur_iocbq;
-};
-
-#define LPFC_SCSI_INITIAL_BPL_SIZE 4 /* Number of scsi buf BDEs in fcp_bpl */
-
-#define LPFC_SCSI_DMA_EXT_SIZE 264
-#define LPFC_BPL_SIZE 1024
-
-#define MDAC_DIRECT_CMD 0x22
-
-#endif /* _H_LPFC_SCSI */
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_sli.c 1.178 2004/11/23 16:57:11EST sf_support Exp $
- */
-
-#include <linux/version.h>
-#include <linux/blkdev.h>
-#include <linux/dma-mapping.h>
-#include <linux/pci.h>
-#include <linux/spinlock.h>
-
-#include <scsi/scsi_cmnd.h>
-#include <scsi/scsi_device.h>
-#include <scsi/scsi_host.h>
-
-#include "lpfc_sli.h"
-#include "lpfc_disc.h"
-#include "lpfc_scsi.h"
-#include "lpfc.h"
-#include "lpfc_crtn.h"
-#include "lpfc_hw.h"
-#include "lpfc_logmsg.h"
-#include "lpfc_mem.h"
-#include "lpfc_compat.h"
-
-static int lpfc_sli_reset_on_init = 1;
-
-/*
- * Define macro to log: Mailbox command x%x cannot issue Data
- * This allows multiple uses of lpfc_msgBlk0311
- * w/o perturbing log msg utility.
-*/
-#define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
- lpfc_printf_log(phba, \
- KERN_INFO, \
- LOG_MBOX | LOG_SLI, \
- "%d:0311 Mailbox command x%x cannot issue " \
- "Data: x%x x%x x%x\n", \
- phba->brd_no, \
- mb->mbxCommand, \
- phba->hba_state, \
- psli->sliinit.sli_flag, \
- flag);
-
-
-/* This will save a huge switch to determine if the IOCB cmd
- * is unsolicited or solicited.
- */
-#define LPFC_UNKNOWN_IOCB 0
-#define LPFC_UNSOL_IOCB 1
-#define LPFC_SOL_IOCB 2
-#define LPFC_ABORT_IOCB 3
-static uint8_t lpfc_sli_iocb_cmd_type[CMD_MAX_IOCB_CMD] = {
- LPFC_UNKNOWN_IOCB, /* 0x00 */
- LPFC_UNSOL_IOCB, /* CMD_RCV_SEQUENCE_CX 0x01 */
- LPFC_SOL_IOCB, /* CMD_XMIT_SEQUENCE_CR 0x02 */
- LPFC_SOL_IOCB, /* CMD_XMIT_SEQUENCE_CX 0x03 */
- LPFC_SOL_IOCB, /* CMD_XMIT_BCAST_CN 0x04 */
- LPFC_SOL_IOCB, /* CMD_XMIT_BCAST_CX 0x05 */
- LPFC_UNKNOWN_IOCB, /* CMD_QUE_RING_BUF_CN 0x06 */
- LPFC_UNKNOWN_IOCB, /* CMD_QUE_XRI_BUF_CX 0x07 */
- LPFC_UNKNOWN_IOCB, /* CMD_IOCB_CONTINUE_CN 0x08 */
- LPFC_UNKNOWN_IOCB, /* CMD_RET_XRI_BUF_CX 0x09 */
- LPFC_SOL_IOCB, /* CMD_ELS_REQUEST_CR 0x0A */
- LPFC_SOL_IOCB, /* CMD_ELS_REQUEST_CX 0x0B */
- LPFC_UNKNOWN_IOCB, /* 0x0C */
- LPFC_UNSOL_IOCB, /* CMD_RCV_ELS_REQ_CX 0x0D */
- LPFC_ABORT_IOCB, /* CMD_ABORT_XRI_CN 0x0E */
- LPFC_ABORT_IOCB, /* CMD_ABORT_XRI_CX 0x0F */
- LPFC_ABORT_IOCB, /* CMD_CLOSE_XRI_CR 0x10 */
- LPFC_ABORT_IOCB, /* CMD_CLOSE_XRI_CX 0x11 */
- LPFC_SOL_IOCB, /* CMD_CREATE_XRI_CR 0x12 */
- LPFC_SOL_IOCB, /* CMD_CREATE_XRI_CX 0x13 */
- LPFC_SOL_IOCB, /* CMD_GET_RPI_CN 0x14 */
- LPFC_SOL_IOCB, /* CMD_XMIT_ELS_RSP_CX 0x15 */
- LPFC_SOL_IOCB, /* CMD_GET_RPI_CR 0x16 */
- LPFC_ABORT_IOCB, /* CMD_XRI_ABORTED_CX 0x17 */
- LPFC_SOL_IOCB, /* CMD_FCP_IWRITE_CR 0x18 */
- LPFC_SOL_IOCB, /* CMD_FCP_IWRITE_CX 0x19 */
- LPFC_SOL_IOCB, /* CMD_FCP_IREAD_CR 0x1A */
- LPFC_SOL_IOCB, /* CMD_FCP_IREAD_CX 0x1B */
- LPFC_SOL_IOCB, /* CMD_FCP_ICMND_CR 0x1C */
- LPFC_SOL_IOCB, /* CMD_FCP_ICMND_CX 0x1D */
- LPFC_UNKNOWN_IOCB, /* 0x1E */
- LPFC_SOL_IOCB, /* CMD_FCP_TSEND_CX 0x1F */
- LPFC_SOL_IOCB, /* CMD_ADAPTER_MSG 0x20 */
- LPFC_SOL_IOCB, /* CMD_FCP_TRECEIVE_CX 0x21 */
- LPFC_SOL_IOCB, /* CMD_ADAPTER_DUMP 0x22 */
- LPFC_SOL_IOCB, /* CMD_FCP_TRSP_CX 0x23 */
- /* 0x24 - 0x80 */
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- /* 0x30 */
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB,
- /* 0x40 */
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB,
- /* 0x50 */
- LPFC_SOL_IOCB,
- LPFC_SOL_IOCB,
- LPFC_UNKNOWN_IOCB,
- LPFC_SOL_IOCB,
- LPFC_SOL_IOCB,
- LPFC_UNSOL_IOCB,
- LPFC_UNSOL_IOCB,
- LPFC_SOL_IOCB,
- LPFC_SOL_IOCB,
-
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB,
- /* 0x60 */
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB,
- /* 0x70 */
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB,
- /* 0x80 */
- LPFC_UNKNOWN_IOCB,
- LPFC_UNSOL_IOCB, /* CMD_RCV_SEQUENCE64_CX 0x81 */
- LPFC_SOL_IOCB, /* CMD_XMIT_SEQUENCE64_CR 0x82 */
- LPFC_SOL_IOCB, /* CMD_XMIT_SEQUENCE64_CX 0x83 */
- LPFC_SOL_IOCB, /* CMD_XMIT_BCAST64_CN 0x84 */
- LPFC_SOL_IOCB, /* CMD_XMIT_BCAST64_CX 0x85 */
- LPFC_UNKNOWN_IOCB, /* CMD_QUE_RING_BUF64_CN 0x86 */
- LPFC_UNKNOWN_IOCB, /* CMD_QUE_XRI_BUF64_CX 0x87 */
- LPFC_UNKNOWN_IOCB, /* CMD_IOCB_CONTINUE64_CN 0x88 */
- LPFC_UNKNOWN_IOCB, /* CMD_RET_XRI_BUF64_CX 0x89 */
- LPFC_SOL_IOCB, /* CMD_ELS_REQUEST64_CR 0x8A */
- LPFC_SOL_IOCB, /* CMD_ELS_REQUEST64_CX 0x8B */
- LPFC_ABORT_IOCB, /* CMD_ABORT_MXRI64_CN 0x8C */
- LPFC_UNSOL_IOCB, /* CMD_RCV_ELS_REQ64_CX 0x8D */
- /* 0x8E - 0x94 */
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB,
- LPFC_SOL_IOCB, /* CMD_XMIT_ELS_RSP64_CX 0x95 */
- LPFC_UNKNOWN_IOCB, /* 0x96 */
- LPFC_UNKNOWN_IOCB, /* 0x97 */
- LPFC_SOL_IOCB, /* CMD_FCP_IWRITE64_CR 0x98 */
- LPFC_SOL_IOCB, /* CMD_FCP_IWRITE64_CX 0x99 */
- LPFC_SOL_IOCB, /* CMD_FCP_IREAD64_CR 0x9A */
- LPFC_SOL_IOCB, /* CMD_FCP_IREAD64_CX 0x9B */
- LPFC_SOL_IOCB, /* CMD_FCP_ICMND64_CR 0x9C */
- LPFC_SOL_IOCB, /* CMD_FCP_ICMND64_CX 0x9D */
- LPFC_UNKNOWN_IOCB, /* 0x9E */
- LPFC_SOL_IOCB, /* CMD_FCP_TSEND64_CX 0x9F */
- LPFC_UNKNOWN_IOCB, /* 0xA0 */
- LPFC_SOL_IOCB, /* CMD_FCP_TRECEIVE64_CX 0xA1 */
- LPFC_UNKNOWN_IOCB, /* 0xA2 */
- LPFC_SOL_IOCB, /* CMD_FCP_TRSP64_CX 0xA3 */
- /* 0xA4 - 0xC1 */
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_SOL_IOCB, /* CMD_GEN_REQUEST64_CR 0xC2 */
- LPFC_SOL_IOCB, /* CMD_GEN_REQUEST64_CX 0xC3 */
- /* 0xC4 - 0xCF */
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
-
- LPFC_SOL_IOCB,
- LPFC_SOL_IOCB, /* CMD_SENDTEXT_CR 0xD1 */
- LPFC_SOL_IOCB, /* CMD_SENDTEXT_CX 0xD2 */
- LPFC_SOL_IOCB, /* CMD_RCV_LOGIN 0xD3 */
- LPFC_SOL_IOCB, /* CMD_ACCEPT_LOGIN 0xD4 */
- LPFC_SOL_IOCB, /* CMD_REJECT_LOGIN 0xD5 */
- LPFC_UNSOL_IOCB,
- /* 0xD7 - 0xDF */
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB, LPFC_UNKNOWN_IOCB,
- /* 0xE0 */
- LPFC_UNSOL_IOCB,
- LPFC_SOL_IOCB,
- LPFC_SOL_IOCB,
- LPFC_SOL_IOCB,
- LPFC_SOL_IOCB,
- LPFC_UNSOL_IOCB
-};
-
-
-static int
-lpfc_sli_ring_map(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- LPFC_MBOXQ_t *pmb;
- MAILBOX_t *pmbox;
- int i;
-
- psli = &phba->sli;
-
- /* Get a Mailbox buffer to setup mailbox commands for HBA
- initialization */
- if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC)) == 0) {
- phba->hba_state = LPFC_HBA_ERROR;
- return -ENOMEM;
- }
- pmbox = &pmb->mb;
-
- /* Initialize the struct lpfc_sli_ring structure for each ring */
- for (i = 0; i < psli->sliinit.num_rings; i++) {
- /* Issue a CONFIG_RING mailbox command for each ring */
- phba->hba_state = LPFC_INIT_MBX_CMDS;
- lpfc_config_ring(phba, i, pmb);
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
- /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
- mbxStatus <status>, ring <num> */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_INIT,
- "%d:0446 Adapter failed to init, "
- "mbxCmd x%x CFG_RING, mbxStatus x%x, "
- "ring %d\n",
- phba->brd_no,
- pmbox->mbxCommand,
- pmbox->mbxStatus,
- i);
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free( pmb, phba->mbox_mem_pool);
- return -ENXIO;
- }
- }
- mempool_free( pmb, phba->mbox_mem_pool);
- return 0;
-}
-
-static int
-lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
-{
- uint16_t iotag;
-
- list_add_tail(&piocb->list, &pring->txcmplq);
- pring->txcmplq_cnt++;
-
- if (pring->fast_lookup) {
- /* Setup fast lookup based on iotag for completion */
- iotag = piocb->iocb.ulpIoTag;
- if (iotag && (iotag
- < phba->sli.sliinit.ringinit[pring->ringno].fast_iotag))
- *(pring->fast_lookup + iotag) = piocb;
- else {
-
- /* Cmd ring <ringno> put: iotag <iotag> greater then
- configured max <fast_iotag> wd0 <icmd> */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_SLI,
- "%d:0316 Cmd ring %d put: iotag x%x "
- "greater then configured max x%x "
- "wd0 x%x\n",
- phba->brd_no,
- pring->ringno, iotag, phba->sli.sliinit
- .ringinit[pring->ringno].fast_iotag,
- *(((uint32_t *)(&piocb->iocb)) + 7));
- }
- }
- return (0);
-}
-
-static struct lpfc_iocbq *
-lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
-{
- struct list_head *dlp;
- struct lpfc_iocbq *cmd_iocb;
- struct lpfc_iocbq *next_iocb;
-
- dlp = &pring->txq;
- cmd_iocb = NULL;
- next_iocb = (struct lpfc_iocbq *) pring->txq.next;
- if (next_iocb != (struct lpfc_iocbq *) & pring->txq) {
- /* If the first ptr is not equal to the list header,
- * deque the IOCBQ_t and return it.
- */
- cmd_iocb = next_iocb;
- list_del(&cmd_iocb->list);
- pring->txq_cnt--;
- }
- return (cmd_iocb);
-}
-
-static IOCB_t *
-lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
-{
- MAILBOX_t *mbox = (MAILBOX_t *)phba->sli.MBhostaddr;
- PGP *pgp = (PGP *)&mbox->us.s2.port[pring->ringno];
- uint32_t max_cmd_idx =
- phba->sli.sliinit.ringinit[pring->ringno].numCiocb;
- IOCB_t *iocb = NULL;
-
- if((pring->next_cmdidx == pring->cmdidx) &&
- (++pring->next_cmdidx >= max_cmd_idx))
- pring->next_cmdidx = 0;
-
- if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
-
- pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
-
- if (unlikely(pring->local_getidx >= max_cmd_idx)) {
- lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
- "%d:0315 Ring %d issue: portCmdGet %d "
- "is bigger then cmd ring %d\n",
- phba->brd_no, pring->ringno,
- pring->local_getidx, max_cmd_idx);
-
- phba->hba_state = LPFC_HBA_ERROR;
- lpfc_handle_eratt(phba, HS_FFER3);
-
- return NULL;
- }
-
- if (pring->local_getidx == pring->next_cmdidx)
- return NULL;
- }
-
- iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
-
- return iocb;
-}
-
-static void
-lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
- IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
-{
- struct lpfc_sli *psli = &phba->sli;
- int ringno = pring->ringno;
-
- /*
- * Alloocate and set up an iotag
- */
- nextiocb->iocb.ulpIoTag =
- lpfc_sli_next_iotag(phba, &psli->ring[psli->fcp_ring]);
-
- /*
- * Issue iocb command to adapter
- */
- lpfc_sli_pcimem_bcopy((uint32_t *)&nextiocb->iocb,
- (uint32_t *)(iocb), sizeof (IOCB_t));
- wmb();
- psli->slistat.iocbCmd[ringno]++;
-
- /*
- * If there is no completion routine to call, we can release the
- * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
- * that have no rsp ring completion, iocb_cmpl MUST be NULL.
- */
- if (nextiocb->iocb_cmpl)
- lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
- else
- mempool_free(nextiocb, phba->iocb_mem_pool);
-
- /*
- * Let the HBA know what IOCB slot will be the next one the
- * driver will put a command into.
- */
- pring->cmdidx = pring->next_cmdidx;
- writeb(pring->cmdidx,
- (u8 *)phba->MBslimaddr + (SLIMOFF + (ringno * 2)) * 4);
-
- return;
-}
-
-static void
-lpfc_sli_update_full_ring(struct lpfc_hba * phba,
- struct lpfc_sli_ring *pring)
-{
- int ringno = pring->ringno;
-
- pring->flag |= LPFC_CALL_RING_AVAILABLE;
-
- wmb();
-
- /*
- * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
- * The HBA will tell us when an IOCB entry is available.
- */
- writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
- readl(phba->CAregaddr); /* flush */
-
- phba->sli.slistat.iocbCmdFull[ringno]++;
-}
-
-static void
-lpfc_sli_update_ring(struct lpfc_hba * phba,
- struct lpfc_sli_ring *pring)
-{
- int ringno = pring->ringno;
-
- /*
- * Tell the HBA that there is work to do in this ring.
- */
- wmb();
- writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
- readl(phba->CAregaddr); /* flush */
-}
-
-static void
-lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
-{
- struct lpfc_sli *psli = &phba->sli;
- IOCB_t *iocb;
- struct lpfc_iocbq *nextiocb;
-
- /*
- * Check to see if:
- * (a) there is anything on the txq to send
- * (b) link is up
- * (c) link attention events can be processed (fcp ring only)
- * (d) IOCB processing is not blocked by the outstanding mbox command.
- */
- if (pring->txq_cnt &&
- (phba->hba_state > LPFC_LINK_DOWN) &&
- (pring->ringno != psli->fcp_ring ||
- psli->sliinit.sli_flag & LPFC_PROCESS_LA) &&
- !(pring->flag & LPFC_STOP_IOCB_MBX)) {
-
- while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
- (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
- lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
-
- if (iocb)
- lpfc_sli_update_ring(phba, pring);
- else
- lpfc_sli_update_full_ring(phba, pring);
- }
-
- return;
-}
-
-/* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
-static void
-lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
-{
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- PGP *pgp;
-
- psli = &phba->sli;
- pring = &psli->ring[ringno];
- pgp = (PGP *) & (((MAILBOX_t *)psli->MBhostaddr)->us.s2.port[ringno]);
-
- /* If the ring is active, flag it */
- if (psli->ring[ringno].cmdringaddr) {
- if (psli->ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
- psli->ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
- /*
- * Force update of the local copy of cmdGetInx
- */
- pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
- lpfc_sli_resume_iocb(phba, pring);
- }
- }
-}
-
-static int
-lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
-{
- uint8_t ret;
-
- switch (mbxCommand) {
- case MBX_LOAD_SM:
- case MBX_READ_NV:
- case MBX_WRITE_NV:
- case MBX_RUN_BIU_DIAG:
- case MBX_INIT_LINK:
- case MBX_DOWN_LINK:
- case MBX_CONFIG_LINK:
- case MBX_CONFIG_RING:
- case MBX_RESET_RING:
- case MBX_READ_CONFIG:
- case MBX_READ_RCONFIG:
- case MBX_READ_SPARM:
- case MBX_READ_STATUS:
- case MBX_READ_RPI:
- case MBX_READ_XRI:
- case MBX_READ_REV:
- case MBX_READ_LNK_STAT:
- case MBX_REG_LOGIN:
- case MBX_UNREG_LOGIN:
- case MBX_READ_LA:
- case MBX_CLEAR_LA:
- case MBX_DUMP_MEMORY:
- case MBX_DUMP_CONTEXT:
- case MBX_RUN_DIAGS:
- case MBX_RESTART:
- case MBX_UPDATE_CFG:
- case MBX_DOWN_LOAD:
- case MBX_DEL_LD_ENTRY:
- case MBX_RUN_PROGRAM:
- case MBX_SET_MASK:
- case MBX_SET_SLIM:
- case MBX_UNREG_D_ID:
- case MBX_CONFIG_FARP:
- case MBX_LOAD_AREA:
- case MBX_RUN_BIU_DIAG64:
- case MBX_CONFIG_PORT:
- case MBX_READ_SPARM64:
- case MBX_READ_RPI64:
- case MBX_REG_LOGIN64:
- case MBX_READ_LA64:
- case MBX_FLASH_WR_ULA:
- case MBX_SET_DEBUG:
- case MBX_LOAD_EXP_ROM:
- ret = mbxCommand;
- break;
- default:
- ret = MBX_SHUTDOWN;
- break;
- }
- return (ret);
-}
-static int
-lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
-{
- MAILBOX_t *mbox;
- MAILBOX_t *pmbox;
- LPFC_MBOXQ_t *pmb;
- struct lpfc_dmabuf *mp;
- struct lpfc_sli *psli;
- int i;
- unsigned long iflag;
- uint32_t process_next;
-
-
- psli = &phba->sli;
- /* We should only get here if we are in SLI2 mode */
- if (!(psli->sliinit.sli_flag & LPFC_SLI2_ACTIVE)) {
- return (1);
- }
-
- spin_lock_irqsave(phba->host->host_lock, iflag);
-
- psli->slistat.mboxEvent++;
-
- /* Get a Mailbox buffer to setup mailbox commands for callback */
- if ((pmb = psli->mbox_active)) {
- pmbox = &pmb->mb;
- mbox = (MAILBOX_t *) psli->MBhostaddr;
-
- /* First check out the status word */
- lpfc_sli_pcimem_bcopy((uint32_t *) mbox, (uint32_t *) pmbox,
- sizeof (uint32_t));
-
- /* Sanity check to ensure the host owns the mailbox */
- if (pmbox->mbxOwner != OWN_HOST) {
- /* Lets try for a while */
- for (i = 0; i < 10240; i++) {
- /* First copy command data */
- lpfc_sli_pcimem_bcopy((uint32_t *) mbox,
- (uint32_t *) pmbox,
- sizeof (uint32_t));
- if (pmbox->mbxOwner == OWN_HOST)
- goto mbout;
- }
- /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
- <status> */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_MBOX | LOG_SLI,
- "%d:0304 Stray Mailbox Interrupt "
- "mbxCommand x%x mbxStatus x%x\n",
- phba->brd_no,
- pmbox->mbxCommand,
- pmbox->mbxStatus);
-
- psli->sliinit.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- return (1);
- }
-
- mbout:
- del_timer_sync(&psli->mbox_tmo);
-
- /*
- * It is a fatal error if unknown mbox command completion.
- */
- if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
- MBX_SHUTDOWN) {
-
- /* Unknow mailbox command compl */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_MBOX | LOG_SLI,
- "%d:0323 Unknown Mailbox command %x Cmpl\n",
- phba->brd_no,
- pmbox->mbxCommand);
- phba->hba_state = LPFC_HBA_ERROR;
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- lpfc_handle_eratt(phba, HS_FFER3);
- return (0);
- }
-
- psli->mbox_active = NULL;
- if (pmbox->mbxStatus) {
- psli->slistat.mboxStatErr++;
- if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
- /* Mbox cmd cmpl error - RETRYing */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_MBOX | LOG_SLI,
- "%d:0305 Mbox cmd cmpl error - "
- "RETRYing Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- pmbox->mbxCommand,
- pmbox->mbxStatus,
- pmbox->un.varWords[0],
- phba->hba_state);
- pmbox->mbxStatus = 0;
- pmbox->mbxOwner = OWN_HOST;
- psli->sliinit.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT)
- == MBX_SUCCESS) {
- spin_unlock_irqrestore(
- phba->host->host_lock,
- iflag);
- return (0);
- }
- }
- }
-
- /* Mailbox cmd <cmd> Cmpl <cmpl> */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_MBOX | LOG_SLI,
- "%d:0307 Mailbox cmd x%x Cmpl x%p "
- "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
- phba->brd_no,
- pmbox->mbxCommand,
- pmb->mbox_cmpl,
- *((uint32_t *) pmbox),
- pmbox->un.varWords[0],
- pmbox->un.varWords[1],
- pmbox->un.varWords[2],
- pmbox->un.varWords[3],
- pmbox->un.varWords[4],
- pmbox->un.varWords[5],
- pmbox->un.varWords[6],
- pmbox->un.varWords[7]);
-
- if (pmb->mbox_cmpl) {
- /* Copy entire mbox completion over buffer */
- lpfc_sli_pcimem_bcopy((uint32_t *) mbox,
- (uint32_t *) pmbox,
- (sizeof (uint32_t) *
- (MAILBOX_CMD_WSIZE)));
- /* All mbox cmpls are posted to discovery tasklet */
- lpfc_discq_post_event(phba, pmb, NULL,
- LPFC_EVT_MBOX);
- } else {
- mp = (struct lpfc_dmabuf *) (pmb->context1);
- if (mp) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- }
- mempool_free( pmb, phba->mbox_mem_pool);
- }
- }
-
-
- do {
- process_next = 0; /* by default don't loop */
- psli->sliinit.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
-
- /* Process next mailbox command if there is one */
- if ((pmb = lpfc_mbox_get(phba))) {
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) ==
- MBX_NOT_FINISHED) {
- mp = (struct lpfc_dmabuf *) (pmb->context1);
- if (mp) {
- lpfc_mbuf_free(phba, mp->virt,
- mp->phys);
- kfree(mp);
- }
- mempool_free( pmb, phba->mbox_mem_pool);
- process_next = 1;
- continue; /* loop back */
- }
- } else {
- /* Turn on IOCB processing */
- for (i = 0; i < psli->sliinit.num_rings; i++) {
- lpfc_sli_turn_on_ring(phba, i);
- }
-
- /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
- while (!list_empty(&phba->freebufList)) {
- struct lpfc_dmabuf *mp;
-
- mp = (struct lpfc_dmabuf *)
- (phba->freebufList.next);
- if (mp) {
- lpfc_mbuf_free(phba, mp->virt,
- mp->phys);
- list_del(&mp->list);
- kfree(mp);
- }
- }
- }
-
- } while (process_next);
-
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- return (0);
-}
-static int
-lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
- struct lpfc_iocbq *saveq)
-{
- struct lpfc_sli * psli;
- IOCB_t * irsp;
- LPFC_RING_INIT_t * pringinit;
- WORD5 * w5p;
- uint32_t Rctl, Type;
- uint32_t match, ringno, i;
-
- psli = &phba->sli;
- match = 0;
- ringno = pring->ringno;
- irsp = &(saveq->iocb);
- if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
- || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
- Rctl = FC_ELS_REQ;
- Type = FC_ELS_DATA;
- } else {
- w5p =
- (WORD5 *) & (saveq->iocb.un.
- ulpWord[5]);
- Rctl = w5p->hcsw.Rctl;
- Type = w5p->hcsw.Type;
- }
- /* unSolicited Responses */
- pringinit = &psli->sliinit.ringinit[ringno];
- if (pringinit->prt[0].profile) {
- /* If this ring has a profile set, just
- send it to prt[0] */
- /* All unsol iocbs for LPFC_ELS_RING
- * are posted to discovery tasklet.
- */
- if (ringno == LPFC_ELS_RING) {
- lpfc_discq_post_event(phba, (void *)&pringinit->prt[0],
- (void *)saveq, LPFC_EVT_UNSOL_IOCB);
- }
- else {
- (pringinit->prt[0].
- lpfc_sli_rcv_unsol_event) (phba, pring, saveq);
- }
- match = 1;
- } else {
- /* We must search, based on rctl / type
- for the right routine */
- for (i = 0; i < pringinit->num_mask;
- i++) {
- if ((pringinit->prt[i].rctl ==
- Rctl)
- && (pringinit->prt[i].
- type == Type)) {
- /* All unsol iocbs for LPFC_ELS_RING
- * are posted to discovery tasklet.
- */
- if (ringno == LPFC_ELS_RING) {
- lpfc_discq_post_event(phba,
- (void *)&pringinit->prt[i],
- (void *)saveq, LPFC_EVT_UNSOL_IOCB);
- }
- else {
- (pringinit->prt[i].
- lpfc_sli_rcv_unsol_event)
- (phba, pring, saveq);
- }
- match = 1;
- break;
- }
- }
- }
- if (match == 0) {
- /* Unexpected Rctl / Type received */
- /* Ring <ringno> handler: unexpected
- Rctl <Rctl> Type <Type> received */
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_SLI,
- "%d:0313 Ring %d handler: unexpected Rctl x%x "
- "Type x%x received \n",
- phba->brd_no,
- ringno,
- Rctl,
- Type);
- }
- return(1);
-}
-static struct lpfc_iocbq *
-lpfc_search_txcmpl(struct lpfc_sli_ring * pring, struct lpfc_iocbq * prspiocb)
-{
- IOCB_t *icmd = NULL;
- IOCB_t *irsp = NULL;
- struct lpfc_iocbq *cmd_iocb;
- struct lpfc_iocbq *iocb, *next_iocb;
- uint16_t iotag;
-
- irsp = &prspiocb->iocb;
- iotag = irsp->ulpIoTag;
- cmd_iocb = NULL;
-
- /* Search through txcmpl from the begining */
- list_for_each_entry_safe(iocb, next_iocb, &(pring->txcmplq), list) {
- icmd = &iocb->iocb;
- if (iotag == icmd->ulpIoTag) {
- /* Found a match. */
- cmd_iocb = iocb;
- list_del(&iocb->list);
- pring->txcmplq_cnt--;
- break;
- }
- }
-
- return (cmd_iocb);
-}
-static struct lpfc_iocbq *
-lpfc_sli_ringtxcmpl_get(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring,
- struct lpfc_iocbq * prspiocb, uint32_t srch)
-{
- struct list_head *dlp;
- IOCB_t *irsp = NULL;
- struct lpfc_iocbq *cmd_iocb;
- struct lpfc_sli *psli;
- uint16_t iotag;
-
-
- dlp = &pring->txcmplq;
-
- if (pring->fast_lookup && (srch == 0)) {
- /*
- * Use fast lookup based on iotag for completion
- */
- psli = &phba->sli;
- irsp = &prspiocb->iocb;
- iotag = irsp->ulpIoTag;
- if (iotag < psli->sliinit.ringinit[pring->ringno].fast_iotag) {
- cmd_iocb = *(pring->fast_lookup + iotag);
- *(pring->fast_lookup + iotag) = NULL;
- if (cmd_iocb) {
- list_del(&cmd_iocb->list);
- pring->txcmplq_cnt--;
- return cmd_iocb;
- }
- } else {
- /*
- * Rsp ring <ringno> get: iotag <iotag> greater then
- * configured max <fast_iotag> wd0 <irsp>
- */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_SLI,
- "%d:0317 Rsp ring %d get: iotag x%x "
- "greater then configured max x%x "
- "wd0 x%x\n",
- phba->brd_no,
- pring->ringno, iotag,
- psli->sliinit.ringinit[pring->ringno]
- .fast_iotag,
- *(((uint32_t *) irsp) + 7));
- }
- }
-
- cmd_iocb = lpfc_search_txcmpl(pring, prspiocb);
-
- return cmd_iocb;
-}
-
-static int
-lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
- struct lpfc_iocbq *saveq)
-{
- struct lpfc_iocbq * cmdiocbp;
- int ringno, rc;
- unsigned long iflag;
-
- rc = 1;
- ringno = pring->ringno;
- /* Solicited Responses */
- /* Based on the iotag field, get the cmd IOCB
- from the txcmplq */
- spin_lock_irqsave(phba->host->host_lock, iflag);
- if ((cmdiocbp =
- lpfc_sli_ringtxcmpl_get(phba, pring, saveq,
- 0))) {
- /* Call the specified completion
- routine */
- if (cmdiocbp->iocb_cmpl) {
- /* All iocb cmpls for LPFC_ELS_RING
- * are posted to discovery tasklet.
- */
- if (ringno == LPFC_ELS_RING) {
- lpfc_discq_post_event(phba, (void *)cmdiocbp,
- (void *)saveq, LPFC_EVT_SOL_IOCB);
- }
- else {
- if (cmdiocbp->iocb_flag & LPFC_IO_POLL) {
- rc = 0;
- }
-
- spin_unlock_irqrestore(phba->host->host_lock,
- iflag);
- (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
- spin_lock_irqsave(phba->host->host_lock, iflag);
- }
- } else {
- mempool_free( cmdiocbp, phba->iocb_mem_pool);
- }
- } else {
- /* Could not find the initiating command
- * based of the response iotag.
- * This is expected on ELS ring because of lpfc_els_abort().
- */
- if (ringno != LPFC_ELS_RING) {
- /* Ring <ringno> handler: unexpected
- completion IoTag <IoTag> */
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_SLI,
- "%d:0322 Ring %d handler: unexpected "
- "completion IoTag x%x Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- ringno,
- saveq->iocb.ulpIoTag,
- saveq->iocb.ulpStatus,
- saveq->iocb.un.ulpWord[4],
- saveq->iocb.ulpCommand,
- saveq->iocb.ulpContext);
- }
- }
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- return(rc);
-}
-static int
-lpfc_sli_handle_ring_event(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring, uint32_t mask)
-{
- struct lpfc_sli * psli;
- IOCB_t * entry;
- IOCB_t * irsp;
- struct lpfc_iocbq * rspiocbp, *next_iocb;
- struct lpfc_iocbq * cmdiocbp;
- struct lpfc_iocbq * saveq;
- HGP * hgp;
- PGP * pgp;
- MAILBOX_t * mbox;
- uint32_t status, free_saveq;
- uint32_t portRspPut, portRspMax;
- int ringno, loopcnt, rc;
- uint8_t type;
- unsigned long iflag;
- void *to_slim;
-
- psli = &phba->sli;
- ringno = pring->ringno;
- irsp = NULL;
- rc = 1;
-
- spin_lock_irqsave(phba->host->host_lock, iflag);
- psli->slistat.iocbEvent[ringno]++;
-
- /* At this point we assume SLI-2 */
- mbox = (MAILBOX_t *) psli->MBhostaddr;
- pgp = (PGP *) & mbox->us.s2.port[ringno];
- hgp = (HGP *) & mbox->us.s2.host[ringno];
-
- /* portRspMax is the number of rsp ring entries for this specific
- ring. */
- portRspMax = psli->sliinit.ringinit[ringno].numRiocb;
-
- rspiocbp = NULL;
- loopcnt = 0;
-
- /* Gather iocb entries off response ring.
- * rspidx is the IOCB index of the next IOCB that the driver
- * is going to process.
- */
- entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
- portRspPut = le32_to_cpu(pgp->rspPutInx);
-
- if (portRspPut >= portRspMax) {
-
- /* Ring <ringno> handler: portRspPut <portRspPut> is bigger then
- rsp ring <portRspMax> */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_SLI,
- "%d:0312 Ring %d handler: portRspPut %d "
- "is bigger then rsp ring %d\n",
- phba->brd_no,
- ringno, portRspPut, portRspMax);
- /*
- * Treat it as adapter hardware error.
- */
- phba->hba_state = LPFC_HBA_ERROR;
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- lpfc_handle_eratt(phba, HS_FFER3);
- return (1);
- }
-
- rmb();
-
- /* Get the next available response iocb.
- * rspidx is the IOCB index of the next IOCB that the driver
- * is going to process.
- */
- while (pring->rspidx != portRspPut) {
- /* get an iocb buffer to copy entry into */
- if ((rspiocbp = mempool_alloc(phba->iocb_mem_pool,
- GFP_ATOMIC)) == 0) {
- break;
- }
-
- lpfc_sli_pcimem_bcopy((uint32_t *) entry,
- (uint32_t *) & rspiocbp->iocb,
- sizeof (IOCB_t));
- irsp = &rspiocbp->iocb;
-
- /* bump iocb available response index */
- if (++pring->rspidx >= portRspMax) {
- pring->rspidx = 0;
- }
-
- /* Let the HBA know what IOCB slot will be the next one the
- * driver will read a response from.
- */
- to_slim = (uint8_t *) phba->MBslimaddr +
- (SLIMOFF + (ringno * 2) + 1) * 4;
- writeb( pring->rspidx, to_slim);
-
- /* chain all iocb entries until LE is set */
- if (list_empty(&(pring->iocb_continueq))) {
- list_add(&rspiocbp->list, &(pring->iocb_continueq));
- } else {
- list_add_tail(&rspiocbp->list,
- &(pring->iocb_continueq));
- }
- pring->iocb_continueq_cnt++;
-
- /*
- * When the ulpLe field is set, the entire Command has been
- * received. Start by getting a pointer to the first iocb entry
- * in the chain.
- */
- if (irsp->ulpLe) {
- /*
- * By default, the driver expects to free all resources
- * associated with this iocb completion.
- */
- free_saveq = 1;
- saveq = list_entry(pring->iocb_continueq.next,
- struct lpfc_iocbq, list);
- irsp = &(saveq->iocb);
- list_del_init(&pring->iocb_continueq);
- pring->iocb_continueq_cnt = 0;
-
- psli->slistat.iocbRsp[ringno]++;
-
- if(irsp->ulpStatus) {
- /* Rsp ring <ringno> error: IOCB */
- lpfc_printf_log(phba,
- KERN_WARNING,
- LOG_SLI,
- "%d:0324 Rsp Ring %d error: IOCB Data: "
- "x%x x%x x%x x%x x%x x%x x%x x%x\n",
- phba->brd_no,
- ringno,
- irsp->un.ulpWord[0],
- irsp->un.ulpWord[1],
- irsp->un.ulpWord[2],
- irsp->un.ulpWord[3],
- irsp->un.ulpWord[4],
- irsp->un.ulpWord[5],
- *(((uint32_t *) irsp) + 6),
- *(((uint32_t *) irsp) + 7));
- }
-
- /* Determine if IOCB command is a solicited or
- unsolicited event */
- type =
- lpfc_sli_iocb_cmd_type[(irsp->
- ulpCommand &
- CMD_IOCB_MASK)];
- if (type == LPFC_SOL_IOCB) {
- spin_unlock_irqrestore(phba->host->host_lock,
- iflag);
- rc = lpfc_sli_process_sol_iocb(phba, pring,
- saveq);
- spin_lock_irqsave(phba->host->host_lock, iflag);
- /*
- * If this solicted completion is an ELS
- * command, don't free the resources now because
- * the discoverytasklet does later.
- */
- if (pring->ringno == LPFC_ELS_RING)
- free_saveq = 0;
- else
- free_saveq = 1;
-
- } else if (type == LPFC_UNSOL_IOCB) {
- spin_unlock_irqrestore(phba->host->host_lock,
- iflag);
- rc = lpfc_sli_process_unsol_iocb(phba, pring,
- saveq);
- spin_lock_irqsave(phba->host->host_lock, iflag);
-
- /*
- * If this unsolicted completion is an ELS
- * command, don't free the resources now because
- * the discoverytasklet does later.
- */
- if (pring->ringno == LPFC_ELS_RING)
- free_saveq = 0;
- else
- free_saveq = 1;
-
- } else if (type == LPFC_ABORT_IOCB) {
- /* Solicited ABORT Responses */
- /* Based on the iotag field, get the cmd IOCB
- from the txcmplq */
- if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
- ((cmdiocbp =
- lpfc_sli_ringtxcmpl_get(phba, pring,
- saveq, 0)))) {
- /* Call the specified completion
- routine */
- if (cmdiocbp->iocb_cmpl) {
- spin_unlock_irqrestore(
- phba->host->host_lock,
- iflag);
- (cmdiocbp->iocb_cmpl) (phba,
- cmdiocbp, saveq);
- spin_lock_irqsave(
- phba->host->host_lock,
- iflag);
- } else {
- mempool_free(cmdiocbp,
- phba->iocb_mem_pool);
- }
- }
- } else if (type == LPFC_UNKNOWN_IOCB) {
- if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
-
- char adaptermsg[LPFC_MAX_ADPTMSG];
-
- memset(adaptermsg, 0,
- LPFC_MAX_ADPTMSG);
- memcpy(&adaptermsg[0], (uint8_t *) irsp,
- MAX_MSG_DATA);
- dev_warn(&((phba->pcidev)->dev),
- "lpfc%d: %s",
- phba->brd_no, adaptermsg);
- } else {
- /* Unknown IOCB command */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_SLI,
- "%d:0321 Unknown IOCB command "
- "Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- irsp->ulpCommand,
- irsp->ulpStatus,
- irsp->ulpIoTag,
- irsp->ulpContext);
- }
- }
-
- if (free_saveq) {
- /*
- * Free up iocb buffer chain for command just
- * processed
- */
- if (!list_empty(&pring->iocb_continueq)) {
- list_for_each_entry_safe(rspiocbp,
- next_iocb,
- &pring->iocb_continueq, list) {
- list_del_init(&rspiocbp->list);
- mempool_free(rspiocbp,
- phba->iocb_mem_pool);
- }
- }
- mempool_free( saveq, phba->iocb_mem_pool);
- }
- }
-
- /* Entire Command has been received */
- entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
-
- /* If the port response put pointer has not been updated, sync
- * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
- * response put pointer.
- */
- if (pring->rspidx == portRspPut) {
- portRspPut = le32_to_cpu(pgp->rspPutInx);
- }
- } /* while (pring->rspidx != portRspPut) */
-
- if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
- /* At least one response entry has been freed */
- psli->slistat.iocbRspFull[ringno]++;
- /* SET RxRE_RSP in Chip Att register */
- status = ((CA_R0ATT | CA_R0RE_RSP) << (ringno * 4));
- writel(status, phba->CAregaddr);
- readl(phba->CAregaddr); /* flush */
- }
- if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
- pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
- psli->slistat.iocbCmdEmpty[ringno]++;
- /*
- * Force update of the local copy of cmdGetInx
- */
- pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
- lpfc_sli_resume_iocb(phba, pring);
-
- if ((psli->sliinit.ringinit[ringno].lpfc_sli_cmd_available))
- (psli->sliinit.ringinit[ringno].
- lpfc_sli_cmd_available) (phba, pring);
-
- }
-
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- return (rc);
-}
-
-static uint32_t
-lpfc_intr_prep(struct lpfc_hba * phba)
-{
- uint32_t ha_copy;
-
- /* Ignore all interrupts during initialization. */
- if (phba->hba_state < LPFC_LINK_DOWN)
- return (0);
-
- /* Read host attention register to determine interrupt source */
- ha_copy = readl(phba->HAregaddr);
-
- /* Clear Attention Sources, except ERATT (to preserve status) & LATT
- * (ha_copy & ~(HA_ERATT | HA_LATT));
- */
- writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
- readl(phba->HAregaddr); /* flush */
- return (ha_copy);
-} /* lpfc_intr_prep */
-
-int
-lpfc_sli_intr(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- uint32_t ha_copy, status;
- int i;
-
- psli = &phba->sli;
- psli->slistat.sliIntr++;
-
- /*
- * Call the HBA to see if it is interrupting. If not, don't claim
- * the interrupt
- */
- ha_copy = lpfc_intr_prep(phba);
- if (!ha_copy) {
- return (1);
- }
-
- if (ha_copy & HA_ERATT) {
- /*
- * There was a link/board error. Read the status register to
- * retrieve the error event and process it.
- */
- psli->slistat.errAttnEvent++;
- status = readl(phba->HSregaddr);
-
- /* Clear Chip error bit */
- writel(HA_ERATT, phba->HAregaddr);
- readl(phba->HAregaddr); /* flush */
-
- lpfc_handle_eratt(phba, status);
- return (0);
- }
-
- if (ha_copy & HA_MBATT) {
- /* There was a Mailbox event. */
- lpfc_sli_handle_mb_event(phba);
- }
-
- if (ha_copy & HA_LATT) {
- /*
- * There was a link attention event. Provided the driver is in
- * a state to handle link events, handle this event.
- */
- if (psli->sliinit.sli_flag & LPFC_PROCESS_LA) {
- lpfc_handle_latt(phba);
- }
- }
-
- /* Process all events on each ring */
- for (i = 0; i < psli->sliinit.num_rings; i++) {
- pring = &psli->ring[i];
- if ((ha_copy & HA_RXATT)
- || (pring->flag & LPFC_DEFERRED_RING_EVENT)) {
- if (pring->flag & LPFC_STOP_IOCB_MASK) {
- pring->flag |= LPFC_DEFERRED_RING_EVENT;
- } else {
- lpfc_sli_handle_ring_event(phba, pring,
- (ha_copy &
- HA_RXMASK));
- pring->flag &= ~LPFC_DEFERRED_RING_EVENT;
- }
- }
- ha_copy = (ha_copy >> 4);
- }
-
- return (0);
-}
-
-static int
-lpfc_sli_abort_iocb_ring(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
- uint32_t flag)
-{
- struct lpfc_sli *psli;
- struct lpfc_iocbq *iocb, *next_iocb;
- struct lpfc_iocbq *abtsiocbp;
- IOCB_t *icmd = NULL, *cmd = NULL;
- int errcnt;
- uint16_t iotag;
-
- psli = &phba->sli;
- errcnt = 0;
-
- /* Error everything on txq and txcmplq
- * First do the txq.
- */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
- list_del_init(&iocb->list);
- if (iocb->iocb_cmpl) {
- icmd = &iocb->iocb;
- icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
- (iocb->iocb_cmpl) (phba, iocb, iocb);
- } else {
- mempool_free( iocb, phba->iocb_mem_pool);
- }
- }
-
- pring->txq_cnt = 0;
- INIT_LIST_HEAD(&(pring->txq));
-
- /* Next issue ABTS for everything on the txcmplq */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
- cmd = &iocb->iocb;
-
- if (flag == LPFC_SLI_ABORT_IMED) {
- /*
- * Imediate abort of IOCB, clear fast_lookup entry,
- * if any, deque and call compl
- */
- iotag = cmd->ulpIoTag;
- if (pring->fast_lookup &&
- iotag &&
- (iotag <
- psli->sliinit.ringinit[pring->ringno].fast_iotag))
- *(pring->fast_lookup + iotag) = NULL;
-
- list_del_init(&iocb->list);
- pring->txcmplq_cnt--;
-
- if (iocb->iocb_cmpl) {
- cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
- (iocb->iocb_cmpl) (phba, iocb, iocb);
- } else {
- mempool_free( iocb, phba->iocb_mem_pool);
- }
- continue;
- }
-
- /* issue ABTS for this IOCB based on iotag */
-
- if ((abtsiocbp = mempool_alloc(phba->iocb_mem_pool,
- GFP_ATOMIC)) == 0) {
- errcnt++;
- continue;
- }
- memset(abtsiocbp, 0, sizeof (struct lpfc_iocbq));
- icmd = &abtsiocbp->iocb;
-
- icmd->un.acxri.abortType = ABORT_TYPE_ABTS;
- icmd->un.acxri.abortContextTag = cmd->ulpContext;
- icmd->un.acxri.abortIoTag = cmd->ulpIoTag;
-
- icmd->ulpLe = 1;
- icmd->ulpClass = cmd->ulpClass;
- if (phba->hba_state >= LPFC_LINK_UP) {
- icmd->ulpCommand = CMD_ABORT_XRI_CN;
- } else {
- icmd->ulpCommand = CMD_CLOSE_XRI_CN;
-
- }
-
- if (lpfc_sli_issue_iocb
- (phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
- mempool_free(abtsiocbp, phba->iocb_mem_pool);
- errcnt++;
- continue;
- }
- /* The rsp ring completion will remove IOCB from txcmplq when
- * abort is read by HBA.
- */
- }
-
- if (flag == LPFC_SLI_ABORT_IMED) {
- INIT_LIST_HEAD(&(pring->txcmplq));
- pring->txcmplq_cnt = 0;
- }
-
- return (errcnt);
-}
-
-int
-lpfc_sli_brdreset(struct lpfc_hba * phba)
-{
- MAILBOX_t *swpmb;
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- uint16_t cfg_value, skip_post;
- volatile uint32_t word0;
- int i;
- void *to_slim;
- struct lpfc_dmabuf *mp, *next_mp;
-
- psli = &phba->sli;
-
- /* A board reset must use REAL SLIM. */
- psli->sliinit.sli_flag &= ~LPFC_SLI2_ACTIVE;
-
- word0 = 0;
- swpmb = (MAILBOX_t *) & word0;
- swpmb->mbxCommand = MBX_RESTART;
- swpmb->mbxHc = 1;
-
- to_slim = phba->MBslimaddr;
- writel(*(uint32_t *) swpmb, to_slim);
- readl(to_slim); /* flush */
-
- /* Only skip post after fc_ffinit is completed */
- if (phba->hba_state) {
- skip_post = 1;
- word0 = 1; /* This is really setting up word1 */
- } else {
- skip_post = 0;
- word0 = 0; /* This is really setting up word1 */
- }
- to_slim = (uint8_t *) phba->MBslimaddr + sizeof (uint32_t);
- writel(*(uint32_t *) swpmb, to_slim);
- readl(to_slim); /* flush */
-
- /* Reset HBA */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_SLI,
- "%d:0325 Reset HBA Data: x%x x%x\n",
- phba->brd_no,
- phba->hba_state,
- psli->sliinit.sli_flag);
-
- /* Turn off SERR, PERR in PCI cmd register */
- phba->hba_state = LPFC_INIT_START;
-
- /* perform board reset */
- phba->fc_eventTag = 0;
- phba->fc_myDID = 0;
- phba->fc_prevDID = 0;
-
- /* Turn off parity checking and serr during the physical reset */
- pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
- pci_write_config_word(phba->pcidev, PCI_COMMAND,
- (cfg_value &
- ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
-
- /* Now toggle INITFF bit in the Host Control Register */
- writel(HC_INITFF, phba->HCregaddr);
- mdelay(1);
- readl(phba->HCregaddr); /* flush */
- writel(0, phba->HCregaddr);
- readl(phba->HCregaddr); /* flush */
-
- /* Restore PCI cmd register */
-
- pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
- phba->hba_state = LPFC_INIT_START;
-
- /* Initialize relevant SLI info */
- for (i = 0; i < psli->sliinit.num_rings; i++) {
- pring = &psli->ring[i];
- pring->flag = 0;
- pring->rspidx = 0;
- pring->next_cmdidx = 0;
- pring->local_getidx = 0;
- pring->cmdidx = 0;
- pring->missbufcnt = 0;
- }
-
- if (skip_post) {
- mdelay(100);
- } else {
- mdelay(2000);
- }
-
- /* Cleanup preposted buffers on the ELS ring */
- pring = &psli->ring[LPFC_ELS_RING];
- list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
- list_del(&mp->list);
- pring->postbufq_cnt--;
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- }
-
- for (i = 0; i < psli->sliinit.num_rings; i++) {
- pring = &psli->ring[i];
- lpfc_sli_abort_iocb_ring(phba, pring, LPFC_SLI_ABORT_IMED);
- }
-
- return (0);
-}
-
-static void
-lpfc_setup_slim_access(struct lpfc_hba *phba)
-{
- phba->MBslimaddr = phba->slim_memmap_p;
- phba->HAregaddr = (uint32_t *) (phba->ctrl_regs_memmap_p) +
- HA_REG_OFFSET;
- phba->HCregaddr = (uint32_t *) (phba->ctrl_regs_memmap_p) +
- HC_REG_OFFSET;
- phba->CAregaddr = (uint32_t *) (phba->ctrl_regs_memmap_p) +
- CA_REG_OFFSET;
- phba->HSregaddr = (uint32_t *) (phba->ctrl_regs_memmap_p) +
- HS_REG_OFFSET;
- return;
-}
-
-int
-lpfc_sli_hba_setup(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- LPFC_MBOXQ_t *pmb;
- int read_rev_reset, i, rc;
- uint32_t status;
-
- psli = &phba->sli;
-
- /* Setep SLI interface for HBA register and HBA SLIM access */
- lpfc_setup_slim_access(phba);
-
- /* Set board state to initialization started */
- phba->hba_state = LPFC_INIT_START;
- read_rev_reset = 0;
-
- /* On some platforms/OS's, the driver can't rely on the state the
- * adapter may be in. For this reason, the driver is allowed to reset
- * the HBA before initialization.
- */
- if (lpfc_sli_reset_on_init) {
- phba->hba_state = 0; /* Don't skip post */
- lpfc_sli_brdreset(phba);
- phba->hba_state = LPFC_INIT_START;
-
- /* Sleep for 2.5 sec */
- msleep(2500);
- }
-
-top:
- /* Read the HBA Host Status Register */
- status = readl(phba->HSregaddr);
-
- /* Check status register to see what current state is */
- i = 0;
- while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
-
- /* Check every 100ms for 5 retries, then every 500ms for 5, then
- * every 2.5 sec for 5, then reset board and every 2.5 sec for
- * 4.
- */
- if (i++ >= 20) {
- /* Adapter failed to init, timeout, status reg
- <status> */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_INIT,
- "%d:0436 Adapter failed to init, "
- "timeout, status reg x%x\n",
- phba->brd_no,
- status);
- phba->hba_state = LPFC_HBA_ERROR;
- return -ETIMEDOUT;
- }
-
- /* Check to see if any errors occurred during init */
- if (status & HS_FFERM) {
- /* ERROR: During chipset initialization */
- /* Adapter failed to init, chipset, status reg
- <status> */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_INIT,
- "%d:0437 Adapter failed to init, "
- "chipset, status reg x%x\n",
- phba->brd_no,
- status);
- phba->hba_state = LPFC_HBA_ERROR;
- return -EIO;
- }
-
- if (i <= 5) {
- msleep(10);
- } else if (i <= 10) {
- msleep(500);
- } else {
- msleep(2500);
- }
-
- if (i == 15) {
- phba->hba_state = 0; /* Don't skip post */
- lpfc_sli_brdreset(phba);
- phba->hba_state = LPFC_INIT_START;
- }
- /* Read the HBA Host Status Register */
- status = readl(phba->HSregaddr);
- }
-
- /* Check to see if any errors occurred during init */
- if (status & HS_FFERM) {
- /* ERROR: During chipset initialization */
- /* Adapter failed to init, chipset, status reg <status> */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_INIT,
- "%d:0438 Adapter failed to init, chipset, "
- "status reg x%x\n",
- phba->brd_no,
- status);
- phba->hba_state = LPFC_HBA_ERROR;
- return -EIO;
- }
-
- /* Clear all interrupt enable conditions */
- writel(0, phba->HCregaddr);
- readl(phba->HCregaddr); /* flush */
-
- /* setup host attn register */
- writel(0xffffffff, phba->HAregaddr);
- readl(phba->HAregaddr); /* flush */
-
- /* Get a Mailbox buffer to setup mailbox commands for HBA
- initialization */
- if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
- GFP_ATOMIC)) == 0) {
- phba->hba_state = LPFC_HBA_ERROR;
- return -ENOMEM;
- }
-
- /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
- * means the call was successful. Any other nonzero value is a failure,
- * but if ERESTART is returned, the driver may reset the HBA and try
- * again.
- */
- if ((rc = lpfc_config_port_prep(phba))) {
- if ((rc == -ERESTART) && (read_rev_reset == 0)) {
- mempool_free( pmb, phba->mbox_mem_pool);
- phba->hba_state = 0; /* Don't skip post */
- lpfc_sli_brdreset(phba);
- phba->hba_state = LPFC_INIT_START;
- msleep(500);
- read_rev_reset = 1;
- goto top;
- }
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free( pmb, phba->mbox_mem_pool);
- return -ENXIO;
- }
-
- /* Setup and issue mailbox CONFIG_PORT command */
- phba->hba_state = LPFC_INIT_MBX_CMDS;
- lpfc_config_port(phba, pmb);
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
- /* Adapter failed to init, mbxCmd <cmd> CONFIG_PORT,
- mbxStatus <status> */
- lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
- "%d:0442 Adapter failed to init, mbxCmd x%x "
- "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
- phba->brd_no, pmb->mb.mbxCommand,
- pmb->mb.mbxStatus, 0);
-
- /* This clause gives the config_port call is given multiple
- chances to succeed. */
- if (read_rev_reset == 0) {
- mempool_free( pmb, phba->mbox_mem_pool);
- phba->hba_state = 0; /* Don't skip post */
- lpfc_sli_brdreset(phba);
- phba->hba_state = LPFC_INIT_START;
- msleep(2500);
- read_rev_reset = 1;
- goto top;
- }
-
- psli->sliinit.sli_flag &= ~LPFC_SLI2_ACTIVE;
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free( pmb, phba->mbox_mem_pool);
- return -ENXIO;
- }
-
- if ((rc = lpfc_sli_ring_map(phba))) {
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free( pmb, phba->mbox_mem_pool);
- return -ENXIO;
- }
- psli->sliinit.sli_flag |= LPFC_PROCESS_LA;
-
- /* Call post CONFIG_PORT mailbox command initialization. */
- if ((rc = lpfc_config_port_post(phba))) {
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free( pmb, phba->mbox_mem_pool);
- return -ENXIO;
- }
- mempool_free( pmb, phba->mbox_mem_pool);
- return 0;
-}
-
-
-
-
-
-
-
-static void
-lpfc_mbox_abort(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- LPFC_MBOXQ_t *pmbox;
- MAILBOX_t *mb;
- struct lpfc_dmabuf *mp;
-
- psli = &phba->sli;
-
- if (psli->mbox_active) {
- del_timer_sync(&psli->mbox_tmo);
- pmbox = psli->mbox_active;
- mb = &pmbox->mb;
- psli->mbox_active = NULL;
- if (pmbox->mbox_cmpl) {
- mb->mbxStatus = MBX_NOT_FINISHED;
- (pmbox->mbox_cmpl) (phba, pmbox);
- } else {
- mp = (struct lpfc_dmabuf *) (pmbox->context1);
- if (mp) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- }
- mempool_free( pmbox, phba->mbox_mem_pool);
- }
- psli->sliinit.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
- }
-
- /* Abort all the non active mailbox commands. */
- pmbox = lpfc_mbox_get(phba);
- while (pmbox) {
- mb = &pmbox->mb;
- if (pmbox->mbox_cmpl) {
- mb->mbxStatus = MBX_NOT_FINISHED;
- (pmbox->mbox_cmpl) (phba, pmbox);
- } else {
- mp = (struct lpfc_dmabuf *) (pmbox->context1);
- if (mp) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- }
- mempool_free( pmbox, phba->mbox_mem_pool);
- }
- pmbox = lpfc_mbox_get(phba);
- }
- return;
-}
-/*! lpfc_mbox_timeout
- *
- * \pre
- * \post
- * \param hba Pointer to per struct lpfc_hba structure
- * \param l1 Pointer to the driver's mailbox queue.
- * \return
- * void
- *
- * \b Description:
- *
- * This routine handles mailbox timeout events at timer interrupt context.
- */
-void
-lpfc_mbox_timeout(unsigned long ptr)
-{
- struct lpfc_hba *phba;
- struct lpfc_sli *psli;
- LPFC_MBOXQ_t *pmbox;
- MAILBOX_t *mb;
- struct lpfc_dmabuf *mp;
- unsigned long iflag;
-
- phba = (struct lpfc_hba *)ptr;
- psli = &phba->sli;
- spin_lock_irqsave(phba->host->host_lock, iflag);
-
- pmbox = psli->mbox_active;
- mb = &pmbox->mb;
-
- /* Mbox cmd <mbxCommand> timeout */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_MBOX | LOG_SLI,
- "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
- phba->brd_no,
- mb->mbxCommand,
- phba->hba_state,
- psli->sliinit.sli_flag,
- psli->mbox_active);
-
- if (psli->mbox_active == pmbox) {
- psli->mbox_active = NULL;
- if (pmbox->mbox_cmpl) {
- mb->mbxStatus = MBX_NOT_FINISHED;
- (pmbox->mbox_cmpl) (phba, pmbox);
- } else {
- mp = (struct lpfc_dmabuf *) (pmbox->context1);
- if (mp) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- }
- mempool_free( pmbox, phba->mbox_mem_pool);
- }
- psli->sliinit.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
- }
-
- lpfc_mbox_abort(phba);
- spin_unlock_irqrestore(phba->host->host_lock, iflag);
- return;
-}
-
-
-int
-lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
-{
- MAILBOX_t *mbox;
- MAILBOX_t *mb;
- struct lpfc_sli *psli;
- uint32_t status, evtctr;
- uint32_t ha_copy;
- int i;
- unsigned long drvr_flag = 0;
- volatile uint32_t word0, ldata;
- void *to_slim;
-
- psli = &phba->sli;
- if (flag & MBX_POLL) {
- spin_lock_irqsave(phba->host->host_lock, drvr_flag);
- }
-
- mb = &pmbox->mb;
- status = MBX_SUCCESS;
-
- if (psli->sliinit.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
- /* Polling for a mbox command when another one is already active
- * is not allowed in SLI. Also, the driver must have established
- * SLI2 mode to queue and process multiple mbox commands.
- */
-
- if (flag & MBX_POLL) {
- spin_unlock_irqrestore(phba->host->host_lock,
- drvr_flag);
-
- /* Mbox command <mbxCommand> cannot issue */
- LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
- return (MBX_NOT_FINISHED);
- }
-
- if (!(psli->sliinit.sli_flag & LPFC_SLI2_ACTIVE)) {
-
- /* Mbox command <mbxCommand> cannot issue */
- LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
- return (MBX_NOT_FINISHED);
- }
-
- /* Handle STOP IOCB processing flag. This is only meaningful
- * if we are not polling for mbox completion.
- */
- if (flag & MBX_STOP_IOCB) {
- flag &= ~MBX_STOP_IOCB;
- /* Now flag each ring */
- for (i = 0; i < psli->sliinit.num_rings; i++) {
- /* If the ring is active, flag it */
- if (psli->ring[i].cmdringaddr) {
- psli->ring[i].flag |=
- LPFC_STOP_IOCB_MBX;
- }
- }
- }
-
- /* Another mailbox command is still being processed, queue this
- * command to be processed later.
- */
- lpfc_mbox_put(phba, pmbox);
-
- /* Mbox cmd issue - BUSY */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_MBOX | LOG_SLI,
- "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
- phba->brd_no,
- mb->mbxCommand,
- phba->hba_state,
- psli->sliinit.sli_flag,
- flag);
-
- psli->slistat.mboxBusy++;
- if (flag == MBX_POLL) {
- spin_unlock_irqrestore(phba->host->host_lock,
- drvr_flag);
- }
- return (MBX_BUSY);
- }
-
- /* Handle STOP IOCB processing flag. This is only meaningful
- * if we are not polling for mbox completion.
- */
- if (flag & MBX_STOP_IOCB) {
- flag &= ~MBX_STOP_IOCB;
- if (flag == MBX_NOWAIT) {
- /* Now flag each ring */
- for (i = 0; i < psli->sliinit.num_rings; i++) {
- /* If the ring is active, flag it */
- if (psli->ring[i].cmdringaddr) {
- psli->ring[i].flag |=
- LPFC_STOP_IOCB_MBX;
- }
- }
- }
- }
-
- psli->sliinit.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
-
- /* If we are not polling, we MUST be in SLI2 mode */
- if (flag != MBX_POLL) {
- if (!(psli->sliinit.sli_flag & LPFC_SLI2_ACTIVE)) {
- psli->sliinit.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
-
- /* Mbox command <mbxCommand> cannot issue */
- LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
- return (MBX_NOT_FINISHED);
- }
- /* timeout active mbox command */
- mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
- }
-
- /* Mailbox cmd <cmd> issue */
- lpfc_printf_log(phba,
- KERN_INFO,
- LOG_MBOX | LOG_SLI,
- "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
- phba->brd_no,
- mb->mbxCommand,
- phba->hba_state,
- psli->sliinit.sli_flag,
- flag);
-
- psli->slistat.mboxCmd++;
- evtctr = psli->slistat.mboxEvent;
-
- /* next set own bit for the adapter and copy over command word */
- mb->mbxOwner = OWN_CHIP;
-
- if (psli->sliinit.sli_flag & LPFC_SLI2_ACTIVE) {
-
- /* First copy command data to host SLIM area */
- mbox = (MAILBOX_t *) psli->MBhostaddr;
- lpfc_sli_pcimem_bcopy((uint32_t *) mb, (uint32_t *) mbox,
- (sizeof (uint32_t) *
- (MAILBOX_CMD_WSIZE)));
-
- pci_dma_sync_single_for_device(phba->pcidev,
- phba->slim2p_mapping,
- sizeof (MAILBOX_t),
- PCI_DMA_TODEVICE);
- } else {
- if (mb->mbxCommand == MBX_CONFIG_PORT) {
- /* copy command data into host mbox for cmpl */
- mbox = (MAILBOX_t *) psli->MBhostaddr;
- lpfc_sli_pcimem_bcopy((uint32_t *) mb,
- (uint32_t *) mbox,
- (sizeof (uint32_t) *
- (MAILBOX_CMD_WSIZE)));
- }
-
- /* First copy mbox command data to HBA SLIM, skip past first
- word */
- to_slim = (uint8_t *) phba->MBslimaddr + sizeof (uint32_t);
- lpfc_memcpy_to_slim(to_slim, (void *)&mb->un.varWords[0],
- (MAILBOX_CMD_WSIZE - 1) * sizeof (uint32_t));
-
- /* Next copy over first word, with mbxOwner set */
- ldata = *((volatile uint32_t *)mb);
- to_slim = phba->MBslimaddr;
- writel(ldata, to_slim);
- readl(to_slim); /* flush */
-
- if (mb->mbxCommand == MBX_CONFIG_PORT) {
- /* switch over to host mailbox */
- psli->sliinit.sli_flag |= LPFC_SLI2_ACTIVE;
- }
- }
-
- wmb();
- /* interrupt board to doit right away */
- writel(CA_MBATT, phba->CAregaddr);
- readl(phba->CAregaddr); /* flush */
-
- switch (flag) {
- case MBX_NOWAIT:
- /* Don't wait for it to finish, just return */
- psli->mbox_active = pmbox;
- break;
-
- case MBX_POLL:
- i = 0;
- psli->mbox_active = NULL;
- if (psli->sliinit.sli_flag & LPFC_SLI2_ACTIVE) {
- /* First read mbox status word */
- mbox = (MAILBOX_t *) psli->MBhostaddr;
- word0 = *((volatile uint32_t *)mbox);
- word0 = le32_to_cpu(word0);
- } else {
- /* First read mbox status word */
- word0 = readl(phba->MBslimaddr);
- }
-
- /* Read the HBA Host Attention Register */
- ha_copy = readl(phba->HAregaddr);
-
- /* Wait for command to complete */
- while (((word0 & OWN_CHIP) == OWN_CHIP)
- || !(ha_copy & HA_MBATT)) {
- if (i++ >= 100) {
- psli->sliinit.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
- spin_unlock_irqrestore(phba->host->host_lock,
- drvr_flag);
- return (MBX_NOT_FINISHED);
- }
-
- /* Check if we took a mbox interrupt while we were
- polling */
- if (((word0 & OWN_CHIP) != OWN_CHIP)
- && (evtctr != psli->slistat.mboxEvent))
- break;
-
- spin_unlock_irqrestore(phba->host->host_lock,
- drvr_flag);
-
- /* Can be in interrupt context, do not sleep */
- /* (or might be called with interrupts disabled) */
- mdelay(i);
-
- spin_lock_irqsave(phba->host->host_lock, drvr_flag);
-
- if (psli->sliinit.sli_flag & LPFC_SLI2_ACTIVE) {
- /* First copy command data */
- mbox = (MAILBOX_t *) psli->MBhostaddr;
- word0 = *((volatile uint32_t *)mbox);
- word0 = le32_to_cpu(word0);
- if (mb->mbxCommand == MBX_CONFIG_PORT) {
- MAILBOX_t *slimmb;
- volatile uint32_t slimword0;
- /* Check real SLIM for any errors */
- slimword0 = readl(phba->MBslimaddr);
- slimmb = (MAILBOX_t *) & slimword0;
- if (((slimword0 & OWN_CHIP) != OWN_CHIP)
- && slimmb->mbxStatus) {
- psli->sliinit.sli_flag &=
- ~LPFC_SLI2_ACTIVE;
- word0 = slimword0;
- }
- }
- } else {
- /* First copy command data */
- word0 = readl(phba->MBslimaddr);
- }
- /* Read the HBA Host Attention Register */
- ha_copy = readl(phba->HAregaddr);
- }
-
- if (psli->sliinit.sli_flag & LPFC_SLI2_ACTIVE) {
- /* First copy command data */
- mbox = (MAILBOX_t *) psli->MBhostaddr;
- /* copy results back to user */
- lpfc_sli_pcimem_bcopy((uint32_t *) mbox,
- (uint32_t *) mb,
- (sizeof (uint32_t) *
- MAILBOX_CMD_WSIZE));
- } else {
- /* First copy command data */
- lpfc_memcpy_from_slim((void *)mb,
- phba->MBslimaddr,
- sizeof (uint32_t) * (MAILBOX_CMD_WSIZE));
- }
-
- writel(HA_MBATT, phba->HAregaddr);
- readl(phba->HAregaddr); /* flush */
-
- psli->sliinit.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
- status = mb->mbxStatus;
- }
-
- if (flag == MBX_POLL) {
- spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
- }
- return (status);
-}
-
-static int
-lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
- struct lpfc_iocbq * piocb)
-{
- /* Insert the caller's iocb in the txq tail for later processing. */
- list_add_tail(&piocb->list, &pring->txq);
- pring->txq_cnt++;
- return (0);
-}
-
-static struct lpfc_iocbq *
-lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
- struct lpfc_iocbq ** piocb)
-{
- struct lpfc_iocbq * nextiocb;
-
- nextiocb = lpfc_sli_ringtx_get(phba, pring);
- if (!nextiocb) {
- nextiocb = *piocb;
- *piocb = NULL;
- }
-
- return nextiocb;
-}
-
-int
-lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
- struct lpfc_iocbq *piocb, uint32_t flag)
-{
- struct lpfc_sli *psli = &phba->sli;
- int ringno = pring->ringno;
- struct lpfc_iocbq *nextiocb;
- IOCB_t *iocb;
-
- /*
- * We should never get an IOCB if we are in a < LINK_DOWN state
- */
- if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
- return IOCB_ERROR;
-
- /*
- * Check to see if we are blocking IOCB processing because of a
- * outstanding mbox command.
- */
- if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
- goto iocb_busy;
-
- if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
- /*
- * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
- * can be issued if the link is not up.
- */
- switch (piocb->iocb.ulpCommand) {
- case CMD_QUE_RING_BUF_CN:
- case CMD_QUE_RING_BUF64_CN:
- case CMD_CLOSE_XRI_CN:
- case CMD_ABORT_XRI_CN:
- /*
- * For IOCBs, like QUE_RING_BUF, that have no rsp ring
- * completion, iocb_cmpl MUST be 0.
- */
- if (piocb->iocb_cmpl)
- piocb->iocb_cmpl = NULL;
- /*FALLTHROUGH*/
- case CMD_CREATE_XRI_CR:
- break;
- default:
- goto iocb_busy;
- }
-
- /*
- * For FCP commands, we must be in a state where we can process link
- * attention events.
- */
- } else if (unlikely(pring->ringno == psli->fcp_ring &&
- !(psli->sliinit.sli_flag & LPFC_PROCESS_LA)))
- goto iocb_busy;
-
- /*
- * Check to see if this is a high priority command.
- * If so bypass tx queue processing.
- */
- if (unlikely((flag & SLI_IOCB_HIGH_PRIORITY) &&
- (iocb = lpfc_sli_next_iocb_slot(phba, pring)))) {
- lpfc_sli_submit_iocb(phba, pring, iocb, piocb);
- piocb = NULL;
- }
-
- while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
- (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
- lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
-
- if (iocb)
- lpfc_sli_update_ring(phba, pring);
- else
- lpfc_sli_update_full_ring(phba, pring);
-
- if (!piocb)
- return IOCB_SUCCESS;
-
- goto out_busy;
-
- iocb_busy:
- psli->slistat.iocbCmdDelay[ringno]++;
-
- out_busy:
-
- if (!(flag & SLI_IOCB_RET_IOCB)) {
- lpfc_sli_ringtx_put(phba, pring, piocb);
- return IOCB_SUCCESS;
- }
-
- return IOCB_BUSY;
-}
-
-int
-lpfc_sli_queue_setup(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- int i, cnt;
-
- psli = &phba->sli;
- INIT_LIST_HEAD(&psli->mboxq);
- /* Initialize list headers for txq and txcmplq as double linked lists */
- for (i = 0; i < psli->sliinit.num_rings; i++) {
- pring = &psli->ring[i];
- pring->ringno = i;
- pring->next_cmdidx = 0;
- pring->local_getidx = 0;
- pring->cmdidx = 0;
- INIT_LIST_HEAD(&pring->txq);
- INIT_LIST_HEAD(&pring->txcmplq);
- INIT_LIST_HEAD(&pring->iocb_continueq);
- INIT_LIST_HEAD(&pring->postbufq);
- cnt = psli->sliinit.ringinit[i].fast_iotag;
- if (cnt) {
- pring->fast_lookup =
- kmalloc(cnt * sizeof (struct lpfc_iocbq *),
- GFP_KERNEL);
- if (pring->fast_lookup == 0) {
- return (0);
- }
- memset((char *)pring->fast_lookup, 0,
- cnt * sizeof (struct lpfc_iocbq *));
- }
- }
- return (1);
-}
-
-int
-lpfc_sli_hba_down(struct lpfc_hba * phba)
-{
- struct lpfc_sli *psli;
- struct lpfc_sli_ring *pring;
- LPFC_MBOXQ_t *pmb;
- struct lpfc_dmabuf *mp;
- struct lpfc_iocbq *iocb, *next_iocb;
- IOCB_t *icmd = NULL;
- int i;
-
- psli = &phba->sli;
- lpfc_hba_down_prep(phba);
-
- for (i = 0; i < psli->sliinit.num_rings; i++) {
- pring = &psli->ring[i];
- pring->flag |= LPFC_DEFERRED_RING_EVENT;
-
- /*
- * Error everything on the txq since these iocbs have not been
- * given to the FW yet.
- */
- pring->txq_cnt = 0;
-
- list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
- list_del_init(&iocb->list);
- if (iocb->iocb_cmpl) {
- icmd = &iocb->iocb;
- icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
- (iocb->iocb_cmpl) (phba, iocb, iocb);
- } else {
- mempool_free( iocb, phba->iocb_mem_pool);
- }
- }
-
- INIT_LIST_HEAD(&(pring->txq));
-
- if (pring->fast_lookup) {
- kfree(pring->fast_lookup);
- pring->fast_lookup = NULL;
- }
-
- }
-
- /* Return any active mbox cmds */
- del_timer_sync(&psli->mbox_tmo);
- if ((psli->mbox_active)) {
- pmb = psli->mbox_active;
- mp = (struct lpfc_dmabuf *) (pmb->context1);
- if (mp) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- }
- mempool_free(psli->mbox_active, phba->mbox_mem_pool);
- }
- psli->sliinit.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
- psli->mbox_active = NULL;
-
- /* Return any pending mbox cmds */
- while ((pmb = lpfc_mbox_get(phba)) != NULL) {
- mp = (struct lpfc_dmabuf *) (pmb->context1);
- if (mp) {
- lpfc_mbuf_free(phba, mp->virt, mp->phys);
- kfree(mp);
- }
- mempool_free(pmb, phba->mbox_mem_pool);
- }
-
- INIT_LIST_HEAD(&psli->mboxq);
-
- /*
- * Provided the hba is not in an error state, reset it. It is not
- * capable of IO anymore.
- */
- if (phba->hba_state != LPFC_HBA_ERROR) {
- phba->hba_state = LPFC_INIT_START;
- lpfc_sli_brdreset(phba);
- }
-
- return 1;
-}
-
-void
-lpfc_sli_pcimem_bcopy(uint32_t * src, uint32_t * dest, uint32_t cnt)
-{
- uint32_t ldata;
- int i;
-
- for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
- ldata = *src++;
- ldata = le32_to_cpu(ldata);
- *dest++ = ldata;
- }
-}
-
-int
-lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
- struct lpfc_dmabuf * mp)
-{
- /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
- later */
- list_add_tail(&mp->list, &pring->postbufq);
-
- pring->postbufq_cnt++;
- return 0;
-}
-
-
-struct lpfc_dmabuf *
-lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
- dma_addr_t phys)
-{
- struct lpfc_dmabuf *mp, *next_mp;
- struct list_head *slp = &pring->postbufq;
-
- /* Search postbufq, from the begining, looking for a match on phys */
- list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
- if (mp->phys == phys) {
- list_del_init(&mp->list);
- pring->postbufq_cnt--;
- pci_dma_sync_single_for_cpu(phba->pcidev, mp->phys,
- LPFC_BPL_SIZE, PCI_DMA_FROMDEVICE);
- return mp;
- }
- }
-
- lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
- "%d:0410 Cannot find virtual addr for mapped buf on "
- "ring %d Data x%llx x%p x%p x%x\n",
- phba->brd_no, pring->ringno, (unsigned long long)phys,
- slp->next, slp->prev, pring->postbufq_cnt);
- return NULL;
-}
-
-uint32_t
-lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
-{
- LPFC_RING_INIT_t *pringinit;
- struct lpfc_sli *psli;
- uint32_t search_start;
-
- psli = &phba->sli;
- pringinit = &psli->sliinit.ringinit[pring->ringno];
-
- if (pring->fast_lookup == NULL) {
- pringinit->iotag_ctr++;
- if (pringinit->iotag_ctr >= pringinit->iotag_max)
- pringinit->iotag_ctr = 1;
- return pringinit->iotag_ctr;
- }
-
- search_start = pringinit->iotag_ctr;
-
- do {
- pringinit->iotag_ctr++;
- if (pringinit->iotag_ctr >= pringinit->fast_iotag)
- pringinit->iotag_ctr = 1;
-
- if(*(pring->fast_lookup + pringinit->iotag_ctr) == NULL)
- return pringinit->iotag_ctr;
-
- } while (pringinit->iotag_ctr != search_start);
-
- /*
- * Outstanding I/O count for ring <ringno> is at max <fast_iotag>
- */
- lpfc_printf_log(phba,
- KERN_ERR,
- LOG_SLI,
- "%d:0318 Outstanding I/O count for ring %d is at max x%x\n",
- phba->brd_no,
- pring->ringno,
- psli->sliinit.ringinit[pring->ringno].fast_iotag);
- return (0);
-}
-
-static void
-lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
- struct lpfc_iocbq * rspiocb)
-{
- struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
- /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
- * just aborted.
- * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
- */
- if (cmdiocb->context2) {
- buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
-
- /* Free the response IOCB before completing the abort
- command. */
- if (!list_empty(&buf_ptr1->list)) {
-
- buf_ptr = list_entry(buf_ptr1->list.next,
- struct lpfc_dmabuf, list);
-
- list_del(&buf_ptr->list);
- lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
- kfree(buf_ptr);
- }
- lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
- kfree(buf_ptr1);
- }
-
- if (cmdiocb->context3) {
- buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
- lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
- kfree(buf_ptr);
- }
- mempool_free( cmdiocb, phba->iocb_mem_pool);
- return;
-}
-
-int
-lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring,
- struct lpfc_iocbq * cmdiocb)
-{
- struct lpfc_sli *psli;
- struct lpfc_iocbq *abtsiocbp;
- IOCB_t *icmd = NULL;
- IOCB_t *iabt = NULL;
- uint32_t iotag32;
-
- psli = &phba->sli;
-
- /* issue ABTS for this IOCB based on iotag */
- if ((abtsiocbp = mempool_alloc(phba->iocb_mem_pool, GFP_ATOMIC)) == 0) {
- return (0);
- }
- memset(abtsiocbp, 0, sizeof (struct lpfc_iocbq));
- iabt = &abtsiocbp->iocb;
-
- icmd = &cmdiocb->iocb;
- switch (icmd->ulpCommand) {
- case CMD_ELS_REQUEST64_CR:
- iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
- /* Even though we abort the ELS command, the firmware may access
- * the BPL or other resources before it processes our
- * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
- * resources till the actual abort request completes.
- */
- abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
- abtsiocbp->context2 = cmdiocb->context2;
- abtsiocbp->context3 = cmdiocb->context3;
- cmdiocb->context2 = NULL;
- cmdiocb->context3 = NULL;
- abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
- break;
- default:
- mempool_free( abtsiocbp, phba->iocb_mem_pool);
- return (0);
- }
-
- iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
- iabt->un.amxri.iotag32 = iotag32;
-
- iabt->ulpLe = 1;
- iabt->ulpClass = CLASS3;
- iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
-
- if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
- mempool_free( abtsiocbp, phba->iocb_mem_pool);
- return (0);
- }
-
- return (1);
-}
-
-int
-lpfc_sli_abort_iocb_ctx(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
- uint32_t ctx)
-{
- struct lpfc_sli *psli;
- struct lpfc_iocbq *iocb, *next_iocb;
- struct lpfc_iocbq *abtsiocbp;
- IOCB_t *icmd = NULL, *cmd = NULL;
- int errcnt;
-
- psli = &phba->sli;
- errcnt = 0;
-
- /* Error matching iocb on txq or txcmplq
- * First check the txq.
- */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
- cmd = &iocb->iocb;
- if (cmd->ulpContext != ctx) {
- continue;
- }
-
- list_del_init(&iocb->list);
- pring->txq_cnt--;
- if (iocb->iocb_cmpl) {
- icmd = &iocb->iocb;
- icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
- (iocb->iocb_cmpl) (phba, iocb, iocb);
- } else {
- mempool_free( iocb, phba->iocb_mem_pool);
- }
- }
-
- /* Next check the txcmplq */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
- cmd = &iocb->iocb;
- if (cmd->ulpContext != ctx) {
- continue;
- }
-
- /* issue ABTS for this IOCB based on iotag */
- if ((abtsiocbp = mempool_alloc(phba->iocb_mem_pool,
- GFP_ATOMIC)) == 0) {
- errcnt++;
- continue;
- }
- memset(abtsiocbp, 0, sizeof (struct lpfc_iocbq));
- icmd = &abtsiocbp->iocb;
-
- icmd->un.acxri.abortType = ABORT_TYPE_ABTS;
- icmd->un.acxri.abortContextTag = cmd->ulpContext;
- icmd->un.acxri.abortIoTag = cmd->ulpIoTag;
-
- icmd->ulpLe = 1;
- icmd->ulpClass = cmd->ulpClass;
- if (phba->hba_state >= LPFC_LINK_UP) {
- icmd->ulpCommand = CMD_ABORT_XRI_CN;
- } else {
- icmd->ulpCommand = CMD_CLOSE_XRI_CN;
- }
-
- if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) ==
- IOCB_ERROR) {
- mempool_free( abtsiocbp, phba->iocb_mem_pool);
- errcnt++;
- continue;
- }
- /* The rsp ring completion will remove IOCB from txcmplq when
- * abort is read by HBA.
- */
- }
- return (errcnt);
-}
-
-int
-lpfc_sli_sum_iocb_host(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring)
-{
- struct lpfc_sli *psli;
- struct lpfc_iocbq *iocb, *next_iocb;
- IOCB_t *cmd = NULL;
- struct lpfc_scsi_buf *lpfc_cmd;
- int sum;
-
- psli = &phba->sli;
- sum = 0;
-
- /* Error matching iocb on txq or txcmplq
- * First check the txq.
- */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
- cmd = &iocb->iocb;
-
- /* Must be a FCP command */
- if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
- continue;
- }
-
- /* context1 MUST be a struct lpfc_scsi_buf */
- lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
- if (lpfc_cmd == 0) {
- continue;
- }
- sum++;
- }
-
- /* Next check the txcmplq */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
- cmd = &iocb->iocb;
-
- /* Must be a FCP command */
- if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
- continue;
- }
-
- /* context1 MUST be a struct lpfc_scsi_buf */
- lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
- if (lpfc_cmd == 0) {
- continue;
- }
- sum++;
- }
- return (sum);
-}
-
-int
-lpfc_sli_abort_iocb_host(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring, int flag)
-{
- struct lpfc_sli *psli;
- struct lpfc_iocbq *iocb, *next_iocb;
- struct lpfc_iocbq *abtsiocbp;
- IOCB_t *icmd = NULL, *cmd = NULL;
- struct lpfc_scsi_buf *lpfc_cmd;
- int errcnt;
-
- psli = &phba->sli;
- errcnt = 0;
-
- /* Error matching iocb on txq or txcmplq
- * First check the txq.
- */
- if(flag & LPFC_ABORT_TXQ) {
- list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
- cmd = &iocb->iocb;
-
- /* Must be a FCP command */
- if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
- continue;
- }
-
- /* context1 MUST be a struct lpfc_scsi_buf */
- lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
- if (lpfc_cmd == 0) {
- continue;
- }
-
- list_del_init(&iocb->list);
- pring->txq_cnt--;
- if (iocb->iocb_cmpl) {
- icmd = &iocb->iocb;
- icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
- (iocb->iocb_cmpl) (phba, iocb, iocb);
- } else {
- mempool_free( iocb, phba->iocb_mem_pool);
- }
- }
- }
-
- if(flag & LPFC_ABORT_TXCMPLQ) {
- /* Next check the txcmplq */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
- list) {
- cmd = &iocb->iocb;
-
- /* Must be a FCP command */
- if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
- continue;
- }
-
- /* context1 MUST be a struct lpfc_scsi_buf */
- lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
- if (lpfc_cmd == 0) {
- continue;
- }
-
- /* issue ABTS for this IOCB based on iotag */
- if ((abtsiocbp = mempool_alloc(phba->iocb_mem_pool,
- GFP_ATOMIC)) == 0) {
- errcnt++;
- continue;
- }
- memset(abtsiocbp, 0, sizeof (struct lpfc_iocbq));
- icmd = &abtsiocbp->iocb;
-
- icmd->un.acxri.abortType = ABORT_TYPE_ABTS;
- icmd->un.acxri.abortContextTag = cmd->ulpContext;
- icmd->un.acxri.abortIoTag = cmd->ulpIoTag;
-
- icmd->ulpLe = 1;
- icmd->ulpClass = cmd->ulpClass;
- if (phba->hba_state >= LPFC_LINK_UP) {
- icmd->ulpCommand = CMD_ABORT_XRI_CN;
- } else {
- icmd->ulpCommand = CMD_CLOSE_XRI_CN;
- }
-
- if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) ==
- IOCB_ERROR) {
- mempool_free( abtsiocbp, phba->iocb_mem_pool);
- errcnt++;
- continue;
- }
- /* The rsp ring completion will remove IOCB from
- * tacmplq when abort is read by HBA.
- */
- }
- }
- return (errcnt);
-}
-
-int
-lpfc_sli_sum_iocb_lun(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring,
- uint16_t scsi_target, uint64_t scsi_lun)
-{
- struct lpfc_sli *psli;
- struct lpfc_iocbq *iocb, *next_iocb;
- IOCB_t *cmd = NULL;
- struct lpfc_scsi_buf *lpfc_cmd;
- int sum;
-
- psli = &phba->sli;
- sum = 0;
-
- /* Error matching iocb on txq or txcmplq
- * First check the txq.
- */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
- cmd = &iocb->iocb;
-
- /* Must be a FCP command */
- if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
- continue;
- }
-
- /* context1 MUST be a struct lpfc_scsi_buf */
- lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
- if ((lpfc_cmd == 0) ||
- (lpfc_cmd->pCmd->device->id != scsi_target) ||
- (lpfc_cmd->pCmd->device->lun != scsi_lun)) {
- continue;
- }
- sum++;
- }
-
- /* Next check the txcmplq */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
- cmd = &iocb->iocb;
-
- /* Must be a FCP command */
- if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
- continue;
- }
-
- /* context1 MUST be a struct lpfc_scsi_buf */
- lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
- if ((lpfc_cmd == 0) ||
- (lpfc_cmd->pCmd->device->id != scsi_target) ||
- (lpfc_cmd->pCmd->device->lun != scsi_lun)) {
- continue;
- }
-
- sum++;
- }
- return (sum);
-}
-
-int
-lpfc_sli_abort_iocb_lun(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring,
- uint16_t scsi_target, uint64_t scsi_lun, int flag)
-{
- struct lpfc_sli *psli;
- struct lpfc_iocbq *iocb, *next_iocb;
- struct lpfc_iocbq *abtsiocbp;
- IOCB_t *icmd = NULL, *cmd = NULL;
- struct lpfc_scsi_buf *lpfc_cmd;
- int errcnt;
-
- psli = &phba->sli;
- errcnt = 0;
-
- /* Error matching iocb on txq or txcmplq
- * First check the txq.
- */
- if(flag & LPFC_ABORT_TXQ) {
- list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
- cmd = &iocb->iocb;
-
- /* Must be a FCP command */
- if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
- continue;
- }
-
- /* context1 MUST be a struct lpfc_scsi_buf */
- lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
- if ((lpfc_cmd == 0) ||
- (lpfc_cmd->pCmd->device->id != scsi_target) ||
- (lpfc_cmd->pCmd->device->lun != scsi_lun)) {
- continue;
- }
-
- list_del_init(&iocb->list);
- pring->txq_cnt--;
- if (iocb->iocb_cmpl) {
- icmd = &iocb->iocb;
- icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
- (iocb->iocb_cmpl) (phba, iocb, iocb);
- } else {
- mempool_free( iocb, phba->iocb_mem_pool);
- }
- }
- }
-
- if(flag & LPFC_ABORT_TXCMPLQ) {
- /* Next check the txcmplq */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
- list) {
- cmd = &iocb->iocb;
-
- /* Must be a FCP command */
- if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
- continue;
- }
-
- /* context1 MUST be a struct lpfc_scsi_buf */
- lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
- if ((lpfc_cmd == 0) ||
- (lpfc_cmd->pCmd->device->id != scsi_target) ||
- (lpfc_cmd->pCmd->device->lun != scsi_lun)) {
- continue;
- }
-
- /* issue ABTS for this IOCB based on iotag */
- if ((abtsiocbp = mempool_alloc(phba->iocb_mem_pool,
- GFP_ATOMIC)) == 0) {
- errcnt++;
- continue;
- }
- memset(abtsiocbp, 0, sizeof (struct lpfc_iocbq));
- icmd = &abtsiocbp->iocb;
-
- icmd->un.acxri.abortType = ABORT_TYPE_ABTS;
- icmd->un.acxri.abortContextTag = cmd->ulpContext;
- icmd->un.acxri.abortIoTag = cmd->ulpIoTag;
-
- icmd->ulpLe = 1;
- icmd->ulpClass = cmd->ulpClass;
- if (phba->hba_state >= LPFC_LINK_UP) {
- icmd->ulpCommand = CMD_ABORT_XRI_CN;
- } else {
- icmd->ulpCommand = CMD_CLOSE_XRI_CN;
- }
-
- if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) ==
- IOCB_ERROR) {
- mempool_free( abtsiocbp, phba->iocb_mem_pool);
- errcnt++;
- continue;
- }
- /* The rsp ring completion will remove IOCB from
- * tacmplq when abort is read by HBA.
- */
- }
- }
- return (errcnt);
-}
-
-int
-lpfc_sli_abort_iocb_tgt(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring,
- uint16_t scsi_target, int flag)
-{
- struct lpfc_sli *psli;
- struct lpfc_iocbq *iocb, *next_iocb;
- struct lpfc_iocbq *abtsiocbp;
- IOCB_t *icmd = NULL, *cmd = NULL;
- struct lpfc_scsi_buf *lpfc_cmd;
- int errcnt;
-
- psli = &phba->sli;
- errcnt = 0;
-
- /* Error matching iocb on txq or txcmplq
- * First check the txq.
- */
- if(flag & LPFC_ABORT_TXQ) {
- list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
- cmd = &iocb->iocb;
-
- /* Must be a FCP command */
- if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
- continue;
- }
-
- /* context1 MUST be a struct lpfc_scsi_buf */
- lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
- if ((lpfc_cmd == 0)
- || (lpfc_cmd->pCmd->device->id != scsi_target)) {
- continue;
- }
-
- list_del_init(&iocb->list);
- pring->txq_cnt--;
- if (iocb->iocb_cmpl) {
- icmd = &iocb->iocb;
- icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
- icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
- (iocb->iocb_cmpl) (phba, iocb, iocb);
- } else {
- mempool_free( iocb, phba->iocb_mem_pool);
- }
- }
- }
-
- if(flag & LPFC_ABORT_TXCMPLQ) {
- /* Next check the txcmplq */
- list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
- list) {
- cmd = &iocb->iocb;
-
- /* Must be a FCP command */
- if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
- (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
- continue;
- }
-
- /* context1 MUST be a struct lpfc_scsi_buf */
- lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
- if ((lpfc_cmd == 0)
- || (lpfc_cmd->pCmd->device->id != scsi_target)) {
- continue;
- }
-
- /* issue ABTS for this IOCB based on iotag */
- if ((abtsiocbp = mempool_alloc(phba->iocb_mem_pool,
- GFP_ATOMIC)) == 0) {
- errcnt++;
- continue;
- }
- memset(abtsiocbp, 0, sizeof (struct lpfc_iocbq));
- icmd = &abtsiocbp->iocb;
-
- icmd->un.acxri.abortType = ABORT_TYPE_ABTS;
- icmd->un.acxri.abortContextTag = cmd->ulpContext;
- icmd->un.acxri.abortIoTag = cmd->ulpIoTag;
-
- icmd->ulpLe = 1;
- icmd->ulpClass = cmd->ulpClass;
- if (phba->hba_state >= LPFC_LINK_UP) {
- icmd->ulpCommand = CMD_ABORT_XRI_CN;
- } else {
- icmd->ulpCommand = CMD_CLOSE_XRI_CN;
- }
-
- if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) ==
- IOCB_ERROR) {
- mempool_free( abtsiocbp, phba->iocb_mem_pool);
- errcnt++;
- continue;
- }
- /* The rsp ring completion will remove IOCB from
- * txcmplq when abort is read by HBA.
- */
- }
- }
- return (errcnt);
-}
-
-
-
-void
-lpfc_sli_wake_iocb_high_priority(struct lpfc_hba * phba,
- struct lpfc_iocbq * queue1,
- struct lpfc_iocbq * queue2)
-{
- if (queue1->context2 && queue2)
- memcpy(queue1->context2, queue2, sizeof (struct lpfc_iocbq));
-
- /* The waiter is looking for LPFC_IO_HIPRI bit to be set
- as a signal to wake up */
- queue1->iocb_flag |= LPFC_IO_HIPRI;
- return;
-}
-
-int
-lpfc_sli_issue_iocb_wait_high_priority(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring,
- struct lpfc_iocbq * piocb,
- uint32_t flag,
- struct lpfc_iocbq * prspiocbq,
- uint32_t timeout)
-{
- int j, delay_time, retval = IOCB_ERROR;
-
- /* The caller must left context1 empty. */
- if (piocb->context_un.hipri_wait_queue != 0) {
- return IOCB_ERROR;
- }
-
- /*
- * If the caller has provided a response iocbq buffer, context2 must
- * be NULL or its an error.
- */
- if (prspiocbq && piocb->context2) {
- return IOCB_ERROR;
- }
-
- piocb->context2 = prspiocbq;
-
- /* Setup callback routine and issue the command. */
- piocb->iocb_cmpl = lpfc_sli_wake_iocb_high_priority;
- retval = lpfc_sli_issue_iocb(phba, pring, piocb,
- flag | SLI_IOCB_HIGH_PRIORITY);
- if (retval != IOCB_SUCCESS) {
- piocb->context2 = NULL;
- return IOCB_ERROR;
- }
-
- /*
- * This high-priority iocb was sent out-of-band. Poll for its
- * completion rather than wait for a signal. Note that the host_lock
- * is held by the midlayer and must be released here to allow the
- * interrupt handlers to complete the IO and signal this routine via
- * the iocb_flag.
- * Also, the delay_time is computed to be one second longer than
- * the scsi command timeout to give the FW time to abort on
- * timeout rather than the driver just giving up. Typically,
- * the midlayer does not specify a time for this command so the
- * driver is free to enforce its own timeout.
- */
-
- delay_time = ((timeout + 1) * 1000) >> 6;
- retval = IOCB_ERROR;
- spin_unlock_irq(phba->host->host_lock);
- for (j = 0; j < 64; j++) {
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,6)
- mdelay(delay_time);
-#else
- msleep(delay_time);
-#endif
- if (piocb->iocb_flag & LPFC_IO_HIPRI) {
- piocb->iocb_flag &= ~LPFC_IO_HIPRI;
- retval = IOCB_SUCCESS;
- break;
- }
- }
-
- spin_lock_irq(phba->host->host_lock);
- piocb->context2 = NULL;
- return retval;
-}
-static void
-lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
-{
- wait_queue_head_t *pdone_q;
-
- /*
- * If pdone_q is empty, the driver thread gave up waiting and
- * continued running.
- */
- pdone_q = (wait_queue_head_t *) pmboxq->context1;
- if (pdone_q)
- wake_up_interruptible(pdone_q);
- return;
-}
-
-int
-lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
- uint32_t timeout)
-{
- DECLARE_WAIT_QUEUE_HEAD(done_q);
- DECLARE_WAITQUEUE(wq_entry, current);
- uint32_t timeleft = 0;
- int retval;
-
- /* The caller must leave context1 empty. */
- if (pmboxq->context1 != 0) {
- return (MBX_NOT_FINISHED);
- }
-
- /* setup wake call as IOCB callback */
- pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
- /* setup context field to pass wait_queue pointer to wake function */
- pmboxq->context1 = &done_q;
-
- /* start to sleep before we wait, to avoid races */
- set_current_state(TASK_INTERRUPTIBLE);
- add_wait_queue(&done_q, &wq_entry);
-
- /* now issue the command */
- spin_lock_irq(phba->host->host_lock);
- retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
- spin_unlock_irq(phba->host->host_lock);
-
- if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
- timeleft = schedule_timeout(timeout * HZ);
- pmboxq->context1 = NULL;
- /* if schedule_timeout returns 0, we timed out and were not
- woken up */
- if (timeleft == 0) {
- retval = MBX_TIMEOUT;
- } else {
- retval = MBX_SUCCESS;
- }
- }
-
-
- set_current_state(TASK_RUNNING);
- remove_wait_queue(&done_q, &wq_entry);
- return retval;
-}
-
-static void
-lpfc_sli_wake_iocb_wait(struct lpfc_hba * phba,
- struct lpfc_iocbq * queue1, struct lpfc_iocbq * queue2)
-{
- wait_queue_head_t *pdone_q;
-
- queue1->iocb_flag |= LPFC_IO_WAIT;
- if (queue1->context2 && queue2)
- memcpy(queue1->context2, queue2, sizeof (struct lpfc_iocbq));
-
- /*
- * If pdone_q is empty, the waiter gave up and returned and this
- * call has nothing to do.
- */
- pdone_q = queue1->context_un.hipri_wait_queue;
- if (pdone_q) {
- wake_up(pdone_q);
- }
-
- return;
-}
-
-int
-lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
- struct lpfc_sli_ring * pring,
- struct lpfc_iocbq * piocb,
- struct lpfc_iocbq * prspiocbq, uint32_t timeout)
-{
- DECLARE_WAIT_QUEUE_HEAD(done_q);
- DECLARE_WAITQUEUE(wq_entry, current);
- uint32_t timeleft = 0;
- int retval;
-
- /* The caller must leave context1 empty for the driver. */
- if (piocb->context_un.hipri_wait_queue != 0)
- return (IOCB_ERROR);
-
- /* If the caller has provided a response iocbq buffer, then context2
- * is NULL or its an error.
- */
- if (prspiocbq) {
- if (piocb->context2)
- return (IOCB_ERROR);
- piocb->context2 = prspiocbq;
- }
-
- /* setup wake call as IOCB callback */
- piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
- /* setup context field to pass wait_queue pointer to wake function */
- piocb->context_un.hipri_wait_queue = &done_q;
-
- /* start to sleep before we wait, to avoid races */
- set_current_state(TASK_UNINTERRUPTIBLE);
- add_wait_queue(&done_q, &wq_entry);
-
- /* now issue the command */
- retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
- if (retval == IOCB_SUCCESS) {
- /* Give up thread time and wait for the iocb to complete or for
- * the alloted time to expire.
- */
- timeleft = schedule_timeout(timeout * HZ);
-
- piocb->context_un.hipri_wait_queue = NULL;
- piocb->iocb_cmpl = NULL;
- if (piocb->context2 == prspiocbq)
- piocb->context2 = NULL;
-
- /*
- * Catch the error cases. A timeleft of zero is an error since
- * the iocb should have completed. The iocb_flag not have value
- * LPFC_IO_WAIT is also an error since the wakeup callback sets
- * this flag when it runs. Handle each.
- */
- if (timeleft == 0) {
- printk(KERN_WARNING "lpfc driver detected iocb "
- "Timeout!\n");
- retval = IOCB_TIMEDOUT;
- } else if (!(piocb->iocb_flag & LPFC_IO_WAIT)) {
- printk(KERN_WARNING "lpfc driver detected iocb "
- "flag = 0x%X\n", piocb->iocb_flag);
- retval = IOCB_TIMEDOUT;
- }
- }
-
- remove_wait_queue(&done_q, &wq_entry);
- set_current_state(TASK_RUNNING);
- piocb->context2 = NULL;
- return retval;
-}
-
-irqreturn_t
-lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
-{
- struct lpfc_hba *phba;
- int intr_status;
-
- /*
- * Get the driver's phba structure from the dev_id and
- * assume the HBA is not interrupting.
- */
- phba = (struct lpfc_hba *) dev_id;
-
- if (phba) {
- /* Call SLI to handle the interrupt event. */
- intr_status = lpfc_sli_intr(phba);
- if (intr_status == 0)
- return IRQ_HANDLED;
- }
-
- return IRQ_NONE;
-
-} /* lpfc_intr_handler */
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_sli.h 1.36 2004/11/23 16:56:58EST sf_support Exp $
- */
-
-#ifndef _H_LPFC_SLI
-#define _H_LPFC_SLI
-
-#include "lpfc_hw.h"
-
-/* forward declaration for LPFC_IOCB_t's use */
-struct lpfc_hba;
-
-/* This structure is used to handle IOCB requests / responses */
-struct lpfc_iocbq {
- /* lpfc_iocbqs are used in double linked lists */
- struct list_head list;
- IOCB_t iocb; /* IOCB cmd */
- uint8_t retry; /* retry counter for IOCB cmd - if needed */
- uint8_t iocb_flag;
-#define LPFC_IO_POLL 1 /* Polling mode iocb */
-#define LPFC_IO_LIBDFC 2 /* libdfc iocb */
-#define LPFC_IO_WAIT 4
-#define LPFC_IO_HIPRI 8 /* High Priority Queue signal flag */
-
- uint8_t abort_count;
- uint8_t rsvd2;
- uint32_t drvrTimeout; /* driver timeout in seconds */
- void *context1; /* caller context information */
- void *context2; /* caller context information */
- void *context3; /* caller context information */
- union {
- wait_queue_head_t *hipri_wait_queue; /* High Priority Queue wait
- queue */
- struct lpfc_iocbq *rsp_iocb;
- struct lpfcMboxq *mbox;
- } context_un;
-
- void (*iocb_cmpl) (struct lpfc_hba *, struct lpfc_iocbq *,
- struct lpfc_iocbq *);
-
-};
-
-#define SLI_IOCB_RET_IOCB 1 /* Return IOCB if cmd ring full */
-#define SLI_IOCB_HIGH_PRIORITY 2 /* High priority command */
-
-#define IOCB_SUCCESS 0
-#define IOCB_BUSY 1
-#define IOCB_ERROR 2
-#define IOCB_TIMEDOUT 3
-
-typedef struct lpfcMboxq {
- /* MBOXQs are used in single linked lists */
- struct list_head list; /* ptr to next mailbox command */
- MAILBOX_t mb; /* Mailbox cmd */
- void *context1; /* caller context information */
- void *context2; /* caller context information */
-
- void (*mbox_cmpl) (struct lpfc_hba *, struct lpfcMboxq *);
-
-} LPFC_MBOXQ_t;
-
-#define MBX_POLL 1 /* poll mailbox till command done, then
- return */
-#define MBX_NOWAIT 2 /* issue command then return immediately */
-#define MBX_STOP_IOCB 4 /* Stop iocb processing till mbox cmds
- complete */
-
-#define LPFC_MAX_RING_MASK 4 /* max num of rctl/type masks allowed per
- ring */
-#define LPFC_MAX_RING 4 /* max num of SLI rings used by driver */
-
-/* Structure used to hold SLI ring information */
-struct lpfc_sli_ring {
- uint16_t flag; /* ring flags */
-#define LPFC_DEFERRED_RING_EVENT 0x001 /* Deferred processing a ring event */
-#define LPFC_CALL_RING_AVAILABLE 0x002 /* indicates cmd was full */
-#define LPFC_STOP_IOCB_MBX 0x010 /* Stop processing IOCB cmds mbox */
-#define LPFC_STOP_IOCB_EVENT 0x020 /* Stop processing IOCB cmds event */
-#define LPFC_STOP_IOCB_MASK 0x030 /* Stop processing IOCB cmds mask */
- uint16_t abtsiotag; /* tracks next iotag to use for ABTS */
-
- uint32_t local_getidx; /* last available cmd index (from cmdGetInx) */
- uint32_t next_cmdidx; /* next_cmd index */
- uint8_t rsvd;
- uint8_t ringno; /* ring number */
- uint8_t rspidx; /* current index in response ring */
- uint8_t cmdidx; /* current index in command ring */
- struct lpfc_iocbq ** fast_lookup; /* array of IOCB ptrs indexed by
- iotag */
- struct list_head txq;
- uint16_t txq_cnt; /* current length of queue */
- uint16_t txq_max; /* max length */
- struct list_head txcmplq;
- uint16_t txcmplq_cnt; /* current length of queue */
- uint16_t txcmplq_max; /* max length */
- volatile uint32_t *cmdringaddr; /* virtual address for cmd rings */
- volatile uint32_t *rspringaddr; /* virtual address for rsp rings */
- uint32_t missbufcnt; /* keep track of buffers to post */
- struct list_head postbufq;
- uint16_t postbufq_cnt; /* current length of queue */
- uint16_t postbufq_max; /* max length */
- struct list_head iocb_continueq;
- uint16_t iocb_continueq_cnt; /* current length of queue */
- uint16_t iocb_continueq_max; /* max length */
-};
-
-typedef struct {
- uint8_t profile; /* profile associated with ring */
- uint8_t rctl; /* rctl / type pair configured for ring */
- uint8_t type; /* rctl / type pair configured for ring */
- uint8_t rsvd;
- /* rcv'd unsol event */
- void (*lpfc_sli_rcv_unsol_event) (struct lpfc_hba *,
- struct lpfc_sli_ring *,
- struct lpfc_iocbq *);
-} LPFC_RING_MASK_t;
-
-/* Structure used for configuring rings to a specific profile or rctl / type */
-typedef struct {
- LPFC_RING_MASK_t prt[LPFC_MAX_RING_MASK];
- uint32_t num_mask; /* number of mask entries in prt array */
- uint32_t iotag_ctr; /* keeps track of the next iotag to use */
- uint32_t iotag_max; /* max iotag value to use */
- uint32_t fast_iotag; /* max fastlookup based iotag */
- uint16_t numCiocb; /* number of command iocb's per ring */
- uint16_t numRiocb; /* number of rsp iocb's per ring */
- /* cmd ring available */
- void (*lpfc_sli_cmd_available) (struct lpfc_hba *,
- struct lpfc_sli_ring *);
-} LPFC_RING_INIT_t;
-
-typedef struct {
- LPFC_RING_INIT_t ringinit[LPFC_MAX_RING]; /* ring initialization info */
- uint32_t num_rings;
- uint32_t sli_flag;
-} LPFC_SLI_INIT_t;
-
-/* Structure used to hold SLI statistical counters and info */
-typedef struct {
- uint64_t iocbEvent[LPFC_MAX_RING]; /* IOCB event counters */
- uint64_t iocbCmd[LPFC_MAX_RING]; /* IOCB cmd issued */
- uint64_t iocbRsp[LPFC_MAX_RING]; /* IOCB rsp received */
- uint64_t iocbCmdDelay[LPFC_MAX_RING]; /* IOCB cmd ring delay */
- uint64_t iocbCmdFull[LPFC_MAX_RING]; /* IOCB cmd ring full */
- uint64_t iocbCmdEmpty[LPFC_MAX_RING]; /* IOCB cmd ring is now empty */
- uint64_t iocbRspFull[LPFC_MAX_RING]; /* IOCB rsp ring full */
- uint64_t mboxStatErr; /* Mbox cmds completed status error */
- uint64_t mboxCmd; /* Mailbox commands issued */
- uint64_t sliIntr; /* Count of Host Attention interrupts */
- uint32_t errAttnEvent; /* Error Attn event counters */
- uint32_t linkEvent; /* Link event counters */
- uint32_t mboxEvent; /* Mailbox event counters */
- uint32_t mboxBusy; /* Mailbox cmd busy */
-} LPFC_SLI_STAT_t;
-
-/* Structure used to hold SLI information */
-struct lpfc_sli {
- LPFC_SLI_INIT_t sliinit; /* initialization info */
- /* Additional sli_flags */
-#define LPFC_SLI_MBOX_ACTIVE 0x100 /* HBA mailbox is currently active */
-#define LPFC_SLI2_ACTIVE 0x200 /* SLI2 overlay in firmware is active */
-#define LPFC_PROCESS_LA 0x400 /* Able to process link attention */
-
- struct lpfc_sli_ring ring[LPFC_MAX_RING];
- int fcp_ring; /* ring used for FCP initiator commands */
- int next_ring;
-
- int ip_ring; /* ring used for IP network drv cmds */
-
- LPFC_SLI_STAT_t slistat; /* SLI statistical info */
- struct list_head mboxq;
- uint16_t mboxq_cnt; /* current length of queue */
- uint16_t mboxq_max; /* max length */
- LPFC_MBOXQ_t *mbox_active; /* active mboxq information */
-
- struct timer_list mbox_tmo; /* Hold clk to timeout active mbox
- cmd */
-
- volatile uint32_t *MBhostaddr; /* virtual address for mbox cmds */
-};
-
-/* Given a pointer to the start of the ring, and the slot number of
- * the desired iocb entry, calc a pointer to that entry.
- * (assume iocb entry size is 32 bytes, or 8 words)
- */
-#define IOCB_ENTRY(ring,slot) ((IOCB_t *)(((char *)(ring)) + ((slot) * 32)))
-
-#define LPFC_SLI_ABORT_IMED 0 /* Immediate abort of IOCB, deque and
- call compl routine immediately. */
-#define LPFC_MBOX_TMO 30 /* Sec tmo for outstanding mbox
- command */
-
-/* Flags for aborting I/Os on tx and txcmpl queues */
-#define LPFC_ABORT_TXQ 1 /* Abort I/Os on txq */
-#define LPFC_ABORT_TXCMPLQ 2 /* Abort I/Os on txcmplq */
-#define LPFC_ABORT_ALLQ 3 /* Abort I/Os both txq and txcmplq */
-
-#endif /* _H_LPFC_SLI */
+++ /dev/null
-/*******************************************************************
- * This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
- * www.emulex.com *
- * *
- * This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
- *******************************************************************/
-
-/*
- * $Id: lpfc_version.h 1.36 2004/12/07 14:51:53EST sf_support Exp $
- */
-
-#ifndef _H_LPFC_VERSION
-#define _H_LPFC_VERSION
-
-#define LPFC_DRIVER_VERSION "8.0.16"
-
-#define LPFC_DRIVER_NAME "lpfc"
-
-#define LPFC_MODULE_DESC "Emulex LightPulse Fibre Channel SCSI driver " \
- LPFC_DRIVER_VERSION
-
-#define DFC_API_VERSION "0.0.0"
-
-#endif
+++ /dev/null
-/*
- *
- * drivers/scsi/pc980155.c
- *
- * PC-9801-55 SCSI host adapter driver
- *
- * Copyright (C) 1997-2003 Kyoto University Microcomputer Club
- * (Linux/98 project)
- * Tomoharu Ugawa <ohirune@kmc.gr.jp>
- *
- */
-
-#include <linux/module.h>
-#include <linux/blkdev.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/delay.h>
-
-#include <asm/dma.h>
-
-#include "scsi.h"
-#include "hosts.h"
-#include "wd33c93.h"
-#include "pc980155.h"
-
-extern int pc98_bios_param(struct scsi_device *, struct block_device *,
- sector_t, int *);
-static int scsi_pc980155_detect(Scsi_Host_Template *);
-static int scsi_pc980155_release(struct Scsi_Host *);
-
-#ifndef CMD_PER_LUN
-#define CMD_PER_LUN 2
-#endif
-
-#ifndef CAN_QUEUE
-#define CAN_QUEUE 16
-#endif
-
-#undef PC_9801_55_DEBUG
-#undef PC_9801_55_DEBUG_VERBOSE
-
-#define NR_BASE_IOS 4
-static int nr_base_ios = NR_BASE_IOS;
-static unsigned int base_ios[NR_BASE_IOS] = {0xcc0, 0xcd0, 0xce0, 0xcf0};
-static wd33c93_regs init_regs;
-static int io;
-
-static struct Scsi_Host *pc980155_host = NULL;
-
-static void pc980155_intr_handle(int irq, void *dev_id, struct pt_regs *regp);
-
-static inline void pc980155_dma_enable(unsigned int base_io)
-{
- outb(0x01, REG_CWRITE);
-}
-
-static inline void pc980155_dma_disable(unsigned int base_io)
-{
- outb(0x02, REG_CWRITE);
-}
-
-
-static void pc980155_intr_handle(int irq, void *dev_id, struct pt_regs *regp)
-{
- wd33c93_intr(pc980155_host);
-}
-
-static int dma_setup(Scsi_Cmnd *sc, int dir_in)
-{
- /*
- * sc->SCp.this_residual : transfer count
- * sc->SCp.ptr : distination address (virtual address)
- * dir_in : data direction (DATA_OUT_DIR:0 or DATA_IN_DIR:1)
- *
- * if success return 0
- */
-
- /*
- * DMA WRITE MODE
- * bit 7,6 01b single mode (this mode only)
- * bit 5 inc/dec (default:0 = inc)
- * bit 4 auto initialize (normaly:0 = off)
- * bit 3,2 01b memory -> io
- * 10b io -> memory
- * 00b verify
- * bit 1,0 channel
- */
- disable_dma(sc->device->host->dma_channel);
- set_dma_mode(sc->device->host->dma_channel,
- 0x40 | (dir_in ? 0x04 : 0x08));
- clear_dma_ff(sc->device->host->dma_channel);
- set_dma_addr(sc->device->host->dma_channel, virt_to_phys(sc->SCp.ptr));
- set_dma_count(sc->device->host->dma_channel, sc->SCp.this_residual);
-#ifdef PC_9801_55_DEBUG
- printk("D%d(%x)D", sc->device->host->dma_channel,
- sc->SCp.this_residual);
-#endif
- enable_dma(sc->device->host->dma_channel);
- pc980155_dma_enable(sc->device->host->io_port);
- return 0;
-}
-
-static void dma_stop(struct Scsi_Host *instance, Scsi_Cmnd *sc, int status)
-{
- /*
- * instance: Hostadapter's instance
- * sc: scsi command
- * status: True if success
- */
- pc980155_dma_disable(sc->device->host->io_port);
- disable_dma(sc->device->host->dma_channel);
-}
-
-/* return non-zero on detection */
-static inline int pc980155_test_port(wd33c93_regs regs)
-{
- /* Quick and dirty test for presence of the card. */
- if (inb(regs.SASR) == 0xff)
- return 0;
-
- return 1;
-}
-
-static inline int pc980155_getconfig(unsigned int base_io, wd33c93_regs regs,
- unsigned char* irq, unsigned char* dma,
- unsigned char* scsi_id)
-{
- static unsigned char irqs[] = {3, 5, 6, 9, 12, 13};
- unsigned char result;
-
- printk(KERN_DEBUG "PC-9801-55: base_io=%x SASR=%x SCMD=%x\n",
- base_io, regs.SASR, regs.SCMD);
- result = read_pc980155_resetint(regs);
- printk(KERN_DEBUG "PC-9801-55: getting config (%x)\n", result);
- *scsi_id = result & 0x07;
- *irq = (result >> 3) & 0x07;
- if (*irq > 5) {
- printk(KERN_ERR "PC-9801-55 (base %#x): impossible IRQ (%d)"
- " - other device here?\n", base_io, *irq);
- return 0;
- }
-
- *irq = irqs[*irq];
- result = inb(REG_STATRD);
- *dma = result & 0x03;
- if (*dma == 1) {
- printk(KERN_ERR
- "PC-9801-55 (base %#x): impossible DMA channl (%d)"
- " - other device here?\n", base_io, *dma);
- return 0;
- }
-#ifdef PC_9801_55_DEBUG
- printk("PC-9801-55: end of getconfig\n");
-#endif
- return 1;
-}
-
-/* return non-zero on detection */
-static int scsi_pc980155_detect(Scsi_Host_Template* tpnt)
-{
- unsigned int base_io;
- unsigned char irq, dma, scsi_id;
- int i;
-#ifdef PC_9801_55_DEBUG
- unsigned char debug;
-#endif
-
- if (io) {
- base_ios[0] = io;
- nr_base_ios = 1;
- }
-
- for (i = 0; i < nr_base_ios; i++) {
- base_io = base_ios[i];
- init_regs.SASR = REG_ADDRST;
- init_regs.SCMD = REG_CONTRL;
-#ifdef PC_9801_55_DEBUG
- printk("PC-9801-55: SASR(%x = %x)\n", SASR, REG_ADDRST);
-#endif
- if (!request_region(base_io, 6, "PC-9801-55"))
- continue;
-
- if (pc980155_test_port(init_regs) &&
- pc980155_getconfig(base_io, init_regs,
- &irq, &dma, &scsi_id))
- goto found;
-
- release_region(base_io, 6);
- }
-
- printk("PC-9801-55: not found\n");
- return 0;
-
- found:
-#ifdef PC_9801_55_DEBUG
- printk("PC-9801-55: config: base io = %x, irq = %d, dma channel = %d, scsi id = %d\n", base_io, irq, dma, scsi_id);
-#endif
- if (request_irq(irq, pc980155_intr_handle, 0, "PC-9801-55", NULL)) {
- printk(KERN_ERR "PC-9801-55: unable to allocate IRQ %d\n", irq);
- goto err1;
- }
-
- if (request_dma(dma, "PC-9801-55")) {
- printk(KERN_ERR "PC-9801-55: unable to allocate DMA channel %d\n", dma);
- goto err2;
- }
-
- pc980155_host = scsi_register(tpnt, sizeof(struct WD33C93_hostdata));
- if (pc980155_host) {
- pc980155_host->this_id = scsi_id;
- pc980155_host->io_port = base_io;
- pc980155_host->n_io_port = 6;
- pc980155_host->irq = irq;
- pc980155_host->dma_channel = dma;
- printk("PC-9801-55: scsi host found at %x irq = %d, use dma channel %d.\n", base_io, irq, dma);
- pc980155_int_enable(init_regs);
- wd33c93_init(pc980155_host, init_regs, dma_setup, dma_stop,
- WD33C93_FS_12_15);
- return 1;
- }
-
- printk(KERN_ERR "PC-9801-55: failed to register device\n");
-
-err2:
- free_irq(irq, NULL);
-err1:
- release_region(base_io, 6);
- return 0;
-}
-
-static int scsi_pc980155_release(struct Scsi_Host *shost)
-{
- struct WD33C93_hostdata *hostdata
- = (struct WD33C93_hostdata *)shost->hostdata;
-
- pc980155_int_disable(hostdata->regs);
- release_region(shost->io_port, shost->n_io_port);
- free_irq(shost->irq, NULL);
- free_dma(shost->dma_channel);
- wd33c93_release();
- return 1;
-}
-
-static int pc980155_bus_reset(Scsi_Cmnd *cmd)
-{
- struct WD33C93_hostdata *hostdata
- = (struct WD33C93_hostdata *)cmd->device->host->hostdata;
-
- pc980155_int_disable(hostdata->regs);
- pc980155_assert_bus_reset(hostdata->regs);
- udelay(50);
- pc980155_negate_bus_reset(hostdata->regs);
- (void) inb(hostdata->regs.SASR);
- (void) read_pc980155(hostdata->regs, WD_SCSI_STATUS);
- pc980155_int_enable(hostdata->regs);
- wd33c93_host_reset(cmd);
- return SUCCESS;
-}
-
-
-#ifndef MODULE
-static int __init pc980155_setup(char *str)
-{
- int ints[4];
-
- str = get_options(str, ARRAY_SIZE(ints), ints);
- if (ints[0] > 0)
- io = ints[1];
- return 1;
-}
-__setup("pc980155_io=", pc980155_setup);
-#endif
-
-MODULE_PARM(io, "i");
-MODULE_AUTHOR("Tomoharu Ugawa <ohirune@kmc.gr.jp>");
-MODULE_DESCRIPTION("PC-9801-55 SCSI host adapter driver");
-MODULE_LICENSE("GPL");
-
-static Scsi_Host_Template driver_template = {
- .proc_info = wd33c93_proc_info,
- .name = "SCSI PC-9801-55",
- .detect = scsi_pc980155_detect,
- .release = scsi_pc980155_release,
- .queuecommand = wd33c93_queuecommand,
- .eh_abort_handler = wd33c93_abort,
- .eh_bus_reset_handler = pc980155_bus_reset,
- .eh_host_reset_handler = wd33c93_host_reset,
- .bios_param = pc98_bios_param,
- .can_queue = CAN_QUEUE,
- .this_id = 7,
- .sg_tablesize = SG_ALL,
- .cmd_per_lun = CMD_PER_LUN, /* dont use link command */
- .unchecked_isa_dma = 1, /* use dma **XXXX***/
- .use_clustering = ENABLE_CLUSTERING,
- .proc_name = "PC_9801_55",
-};
-
-#include "scsi_module.c"
+++ /dev/null
-/*
- *
- * drivers/scsi/pc980155.h
- *
- * PC-9801-55 SCSI host adapter driver
- *
- * Copyright (C) 1997-2003 Kyoto University Microcomputer Club
- * (Linux/98 project)
- * Tomoharu Ugawa <ohirune@kmc.gr.jp>
- *
- */
-
-#ifndef __PC980155_H
-#define __PC980155_H
-
-#include "wd33c93.h"
-
-#define REG_ADDRST (base_io)
-#define REG_CONTRL (base_io + 2)
-#define REG_CWRITE (base_io + 4)
-#define REG_STATRD (base_io + 4)
-
-#define WD_MEMORYBANK 0x30
-#define WD_RESETINT 0x33
-
-static inline uchar read_pc980155(const wd33c93_regs regs, uchar reg_num)
-{
- outb(reg_num, regs.SASR);
- return (uchar)inb(regs.SCMD);
-}
-
-static inline void write_memorybank(const wd33c93_regs regs, uchar value)
-{
- outb(WD_MEMORYBANK, regs.SASR);
- outb(value, regs.SCMD);
-}
-
-#define read_pc980155_resetint(regs) \
- read_pc980155((regs), WD_RESETINT)
-#define pc980155_int_enable(regs) \
- write_memorybank((regs), read_pc980155((regs), WD_MEMORYBANK) | 0x04)
-
-#define pc980155_int_disable(regs) \
- write_memorybank((regs), read_pc980155((regs), WD_MEMORYBANK) & ~0x04)
-
-#define pc980155_assert_bus_reset(regs) \
- write_memorybank((regs), read_pc980155((regs), WD_MEMORYBANK) | 0x02)
-
-#define pc980155_negate_bus_reset(regs) \
- write_memorybank((regs), read_pc980155((regs), WD_MEMORYBANK) & ~0x02)
-
-#endif /* __PC980155_H */
+++ /dev/null
-#define PCMCIA 1
-#include "qlogicfas.c"
+++ /dev/null
-/*
- * QLogic ISP6322 device driver for Linux 2.6.x
- * Copyright (C) 2003-2004 QLogic Corporation (www.qlogic.com)
- *
- * Released under GPL v2.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/pci.h>
-
-#include "qla_def.h"
-
-static char qla_driver_name[] = "qla6322";
-
-extern unsigned char fw2322flx_version[];
-extern unsigned char fw2322flx_version_str[];
-extern unsigned short fw2322flx_addr01;
-extern unsigned short fw2322flx_code01[];
-extern unsigned short fw2322flx_length01;
-extern unsigned long rseqflx_code_addr01;
-extern unsigned short rseqflx_code01[];
-extern unsigned short rseqflx_code_length01;
-extern unsigned long xseqflx_code_addr01;
-extern unsigned short xseqflx_code01[];
-extern unsigned short xseqflx_code_length01;
-
-static struct qla_fw_info qla_fw_tbl[] = {
- {
- .addressing = FW_INFO_ADDR_NORMAL,
- .fwcode = &fw2322flx_code01[0],
- .fwlen = &fw2322flx_length01,
- .fwstart = &fw2322flx_addr01,
- },
- {
- .addressing = FW_INFO_ADDR_EXTENDED,
- .fwcode = &rseqflx_code01[0],
- .fwlen = &rseqflx_code_length01,
- .lfwstart = &rseqflx_code_addr01,
- },
- {
- .addressing = FW_INFO_ADDR_EXTENDED,
- .fwcode = &xseqflx_code01[0],
- .fwlen = &xseqflx_code_length01,
- .lfwstart = &xseqflx_code_addr01,
- },
- { FW_INFO_ADDR_NOMORE, },
-};
-
-static struct qla_board_info qla_board_tbl[] = {
- {
- .drv_name = qla_driver_name,
- .isp_name = "ISP6322",
- .fw_info = qla_fw_tbl,
- },
-};
-
-static struct pci_device_id qla6322_pci_tbl[] = {
- {
- .vendor = PCI_VENDOR_ID_QLOGIC,
- .device = PCI_DEVICE_ID_QLOGIC_ISP6322,
- .subvendor = PCI_ANY_ID,
- .subdevice = PCI_ANY_ID,
- .driver_data = (unsigned long)&qla_board_tbl[0],
- },
- {0, 0},
-};
-MODULE_DEVICE_TABLE(pci, qla6322_pci_tbl);
-
-static int __devinit
-qla6322_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
-{
- return qla2x00_probe_one(pdev,
- (struct qla_board_info *)id->driver_data);
-}
-
-static void __devexit
-qla6322_remove_one(struct pci_dev *pdev)
-{
- qla2x00_remove_one(pdev);
-}
-
-static struct pci_driver qla6322_pci_driver = {
- .name = "qla6322",
- .id_table = qla6322_pci_tbl,
- .probe = qla6322_probe_one,
- .remove = __devexit_p(qla6322_remove_one),
-};
-
-static int __init
-qla6322_init(void)
-{
- return pci_module_init(&qla6322_pci_driver);
-}
-
-static void __exit
-qla6322_exit(void)
-{
- pci_unregister_driver(&qla6322_pci_driver);
-}
-
-module_init(qla6322_init);
-module_exit(qla6322_exit);
-
-MODULE_AUTHOR("QLogic Corporation");
-MODULE_DESCRIPTION("QLogic ISP6322 FC-SCSI Host Bus Adapter driver");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(QLA2XXX_VERSION);
+++ /dev/null
-/**************************************************************************
- * QLOGIC LINUX SOFTWARE
- *
- * QLogic ISP2x00 device driver for Linux 2.6.x
- * Copyright (C) 2003-2004 QLogic Corporation
- * (www.qlogic.com)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2, or (at your option) any
- * later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- *************************************************************************/
-
-/*
- * Firmware Version 3.03.02 (16:54 Aug 10, 2004)
- */
-
-#ifdef UNIQUE_FW_NAME
-unsigned short fw2322flx_version = 3*1024+3;
-#else
-unsigned short risc_code_version = 3*1024+3;
-#endif
-
-#ifdef UNIQUE_FW_NAME
-unsigned char fw2322flx_version_str[] = {3, 3, 2};
-#else
-unsigned char firmware_version[] = {3, 3, 2};
-#endif
-
-#ifdef UNIQUE_FW_NAME
-#define fw2322flx_VERSION_STRING "3.03.02"
-#else
-#define FW_VERSION_STRING "3.03.02"
-#endif
-
-#ifdef UNIQUE_FW_NAME
-unsigned short fw2322flx_addr01 = 0x0800 ;
-#else
-unsigned short risc_code_addr01 = 0x0800 ;
-#endif
-
-#ifdef UNIQUE_FW_NAME
-unsigned short fw2322flx_code01[] = {
-#else
-unsigned short risc_code01[] = {
-#endif
- 0x0470, 0x0000, 0x0000, 0xce84, 0x0000, 0x0003, 0x0003, 0x0002,
- 0x0317, 0x2043, 0x4f50, 0x5952, 0x4947, 0x4854, 0x2032, 0x3030,
- 0x3120, 0x514c, 0x4f47, 0x4943, 0x2043, 0x4f52, 0x504f, 0x5241,
- 0x5449, 0x4f4e, 0x2049, 0x5350, 0x3233, 0x3030, 0x2046, 0x6972,
- 0x6d77, 0x6172, 0x6520, 0x2056, 0x6572, 0x7369, 0x6f6e, 0x2030,
- 0x332e, 0x3033, 0x2e30, 0x3220, 0x2020, 0x2020, 0x2400, 0x20a9,
- 0x000f, 0x2001, 0x0000, 0x400f, 0x2091, 0x2200, 0x20a9, 0x000f,
- 0x2001, 0x0000, 0x400f, 0x2091, 0x2400, 0x20a9, 0x000f, 0x2001,
- 0x0000, 0x400f, 0x2091, 0x2600, 0x20a9, 0x000f, 0x2001, 0x0000,
- 0x400f, 0x2091, 0x2800, 0x20a9, 0x000f, 0x2001, 0x0000, 0x400f,
- 0x2091, 0x2a00, 0x20a9, 0x000f, 0x2001, 0x0000, 0x400f, 0x2091,
- 0x2c00, 0x20a9, 0x000f, 0x2001, 0x0000, 0x400f, 0x2091, 0x2e00,
- 0x20a9, 0x000f, 0x2001, 0x0000, 0x400f, 0x2091, 0x2000, 0x2001,
- 0x0000, 0x20c1, 0x0004, 0x20c9, 0x1cff, 0x2059, 0x0000, 0x2b78,
- 0x7883, 0x0004, 0x2089, 0x290c, 0x2051, 0x1800, 0x2a70, 0x20e1,
- 0x0001, 0x20e9, 0x0001, 0x2009, 0x0000, 0x080c, 0x0e4a, 0x00f6,
- 0x7888, 0x9005, 0x11f8, 0x2061, 0xc000, 0x080c, 0x1f21, 0x1170,
- 0x2079, 0x0300, 0x080c, 0x1f37, 0x2061, 0xe000, 0x080c, 0x1f21,
- 0x1128, 0x2079, 0x0380, 0x080c, 0x1f37, 0x0060, 0x00fe, 0x7883,
- 0x4010, 0x7837, 0x4010, 0x7833, 0x0010, 0x2091, 0x5000, 0x2091,
- 0x4080, 0x0cf8, 0x00fe, 0x2029, 0x26c0, 0x2031, 0xffff, 0x2039,
- 0x269c, 0x2021, 0x0050, 0x20e9, 0x0001, 0x20a1, 0x0000, 0x20a9,
- 0x0800, 0x900e, 0x4104, 0x20e9, 0x0001, 0x20a1, 0x1000, 0x900e,
- 0x2001, 0x0dc1, 0x9084, 0x0fff, 0x20a8, 0x4104, 0x2001, 0x0000,
- 0x9086, 0x0000, 0x0120, 0x21a8, 0x4104, 0x8001, 0x1de0, 0x756a,
- 0x766e, 0x7766, 0x7472, 0x7476, 0x00e6, 0x2071, 0x1b25, 0x2472,
- 0x00ee, 0x20a1, 0x1ddc, 0x716c, 0x810d, 0x810d, 0x810d, 0x810d,
- 0x918c, 0x000f, 0x2001, 0x0001, 0x9112, 0x900e, 0x21a8, 0x4104,
- 0x8211, 0x1de0, 0x716c, 0x3400, 0x8001, 0x9102, 0x0120, 0x0218,
- 0x20a8, 0x900e, 0x4104, 0x2009, 0x1800, 0x810d, 0x810d, 0x810d,
- 0x810d, 0x810d, 0x918c, 0x001f, 0x2001, 0x0001, 0x9112, 0x20e9,
- 0x0001, 0x20a1, 0x0800, 0x900e, 0x20a9, 0x0800, 0x4104, 0x8211,
- 0x1dd8, 0x080c, 0x0f47, 0x080c, 0x5d05, 0x080c, 0x9b7c, 0x080c,
- 0x10fe, 0x080c, 0x12ee, 0x080c, 0x1a7f, 0x080c, 0x8456, 0x080c,
- 0x0cf7, 0x080c, 0x1083, 0x080c, 0x329f, 0x080c, 0x73cd, 0x080c,
- 0x6745, 0x080c, 0x809d, 0x080c, 0x210e, 0x080c, 0x7a62, 0x080c,
- 0x1f50, 0x080c, 0x208e, 0x080c, 0x2103, 0x2091, 0x3009, 0x7883,
- 0x0000, 0x1004, 0x0941, 0x7880, 0x9086, 0x0002, 0x1190, 0x7883,
- 0x4000, 0x7837, 0x4000, 0x7833, 0x0010, 0x0e04, 0x0935, 0x2091,
- 0x5000, 0x2091, 0x4080, 0x2001, 0x0089, 0x2004, 0xd084, 0x190c,
- 0x11d6, 0x2071, 0x1800, 0x7003, 0x0000, 0x2071, 0x1800, 0x7000,
- 0x908e, 0x0003, 0x1158, 0x080c, 0x49bf, 0x080c, 0x32c6, 0x080c,
- 0x7435, 0x080c, 0x6bdd, 0x080c, 0x80c6, 0x0c78, 0x000b, 0x0c98,
- 0x0962, 0x0963, 0x0afa, 0x0960, 0x0bab, 0x0cf6, 0x0cf6, 0x0cf6,
- 0x080c, 0x0d65, 0x0005, 0x0126, 0x00f6, 0x2091, 0x8000, 0x7000,
- 0x9086, 0x0001, 0x1904, 0x0acd, 0x080c, 0x0e9a, 0x080c, 0x70ba,
- 0x0150, 0x080c, 0x70dd, 0x15b0, 0x2079, 0x0100, 0x7828, 0x9085,
- 0x1800, 0x782a, 0x0478, 0x080c, 0x6feb, 0x7000, 0x9086, 0x0001,
- 0x1904, 0x0acd, 0x7094, 0x9086, 0x0028, 0x1904, 0x0acd, 0x080c,
- 0x8095, 0x080c, 0x8087, 0x2001, 0x0161, 0x2003, 0x0001, 0x2079,
- 0x0100, 0x2011, 0xffff, 0x080c, 0x28ac, 0x7a28, 0x9295, 0x5e2c,
- 0x7a2a, 0x2011, 0x6f30, 0x080c, 0x816c, 0x2011, 0x6f23, 0x080c,
- 0x8272, 0x2011, 0x5b5c, 0x080c, 0x816c, 0x2011, 0x8030, 0x901e,
- 0x7392, 0x04d0, 0x080c, 0x5409, 0x2079, 0x0100, 0x7844, 0x9005,
- 0x1904, 0x0acd, 0x2011, 0x5b5c, 0x080c, 0x816c, 0x2011, 0x6f30,
- 0x080c, 0x816c, 0x2011, 0x6f23, 0x080c, 0x8272, 0x2001, 0x0265,
- 0x2001, 0x0205, 0x2003, 0x0000, 0x7840, 0x9084, 0xfffb, 0x7842,
- 0x2001, 0x197e, 0x2004, 0x9005, 0x1140, 0x00c6, 0x2061, 0x0100,
- 0x080c, 0x5cad, 0x00ce, 0x0804, 0x0acd, 0x780f, 0x006b, 0x7a28,
- 0x080c, 0x70c2, 0x0118, 0x9295, 0x5e2c, 0x0010, 0x9295, 0x402c,
- 0x7a2a, 0x2011, 0x8010, 0x73d4, 0x2001, 0x197f, 0x2003, 0x0001,
- 0x080c, 0x2774, 0x080c, 0x48fa, 0x7244, 0xc284, 0x7246, 0x2001,
- 0x180c, 0x200c, 0xc1ac, 0xc1cc, 0x2102, 0x2001, 0x0390, 0x2003,
- 0x0400, 0x080c, 0x98c7, 0x080c, 0x91f8, 0x2011, 0x0004, 0x080c,
- 0xb880, 0x080c, 0x98e3, 0x080c, 0x6585, 0x080c, 0x70ba, 0x1120,
- 0x080c, 0x27d5, 0x0600, 0x0420, 0x080c, 0x5cb4, 0x0140, 0x7093,
- 0x0001, 0x70cf, 0x0000, 0x080c, 0x55d6, 0x0804, 0x0acd, 0x080c,
- 0x53a8, 0xd094, 0x01a8, 0x2001, 0x0390, 0x2003, 0x0404, 0x2011,
- 0x180c, 0x2204, 0xc0cd, 0x2012, 0x080c, 0x53ac, 0xd0d4, 0x1118,
- 0x080c, 0x27d5, 0x1270, 0x2011, 0x180c, 0x2204, 0xc0bc, 0x0088,
- 0x080c, 0x53ac, 0xd0d4, 0x1db8, 0x2011, 0x180c, 0x2204, 0xc0bd,
- 0x0040, 0x2011, 0x180c, 0x2204, 0xc0bd, 0x2012, 0x080c, 0x6682,
- 0x0008, 0x2012, 0x080c, 0x6648, 0x0120, 0x7a0c, 0xc2b4, 0x7a0e,
- 0x00a8, 0x707b, 0x0000, 0x080c, 0x70ba, 0x1130, 0x70ac, 0x9005,
- 0x1168, 0x080c, 0xbcdc, 0x0050, 0x080c, 0xbcdc, 0x70d8, 0xd09c,
- 0x1128, 0x70ac, 0x9005, 0x0110, 0x080c, 0x5c8a, 0x70e3, 0x0000,
- 0x70df, 0x0000, 0x70a3, 0x0000, 0x080c, 0x27dd, 0x0228, 0x2011,
- 0x0101, 0x2204, 0xc0c4, 0x2012, 0x72d8, 0x080c, 0x70ba, 0x1178,
- 0x9016, 0x0016, 0x2009, 0x0002, 0x2019, 0x1945, 0x211a, 0x001e,
- 0x705b, 0xffff, 0x705f, 0x00ef, 0x707f, 0x0000, 0x0020, 0x2019,
- 0x1945, 0x201b, 0x0000, 0x2079, 0x185b, 0x7804, 0xd0ac, 0x0108,
- 0xc295, 0x72da, 0x080c, 0x70ba, 0x0118, 0x9296, 0x0004, 0x0518,
- 0x2011, 0x0001, 0x080c, 0xb880, 0x70a7, 0x0000, 0x70ab, 0xffff,
- 0x7003, 0x0002, 0x00fe, 0x080c, 0x2e09, 0x080c, 0x98c7, 0x2011,
- 0x0005, 0x080c, 0x9324, 0x080c, 0x98e3, 0x080c, 0x70ba, 0x0148,
- 0x00c6, 0x2061, 0x0100, 0x0016, 0x2009, 0x0002, 0x61e2, 0x001e,
- 0x00ce, 0x012e, 0x00e0, 0x70a7, 0x0000, 0x70ab, 0xffff, 0x7003,
- 0x0002, 0x080c, 0x98c7, 0x2011, 0x0005, 0x080c, 0x9324, 0x080c,
- 0x98e3, 0x080c, 0x70ba, 0x0148, 0x00c6, 0x2061, 0x0100, 0x0016,
- 0x2009, 0x0002, 0x61e2, 0x001e, 0x00ce, 0x00fe, 0x012e, 0x0005,
- 0x00c6, 0x00b6, 0x080c, 0x70ba, 0x1118, 0x20a9, 0x0800, 0x0010,
- 0x20a9, 0x0782, 0x080c, 0x70ba, 0x1110, 0x900e, 0x0010, 0x2009,
- 0x007e, 0x86ff, 0x0138, 0x9180, 0x1000, 0x2004, 0x905d, 0x0110,
- 0xb800, 0xd0bc, 0x090c, 0x3136, 0x8108, 0x1f04, 0x0ae1, 0x707b,
- 0x0000, 0x707c, 0x9084, 0x00ff, 0x707e, 0x70af, 0x0000, 0x00be,
- 0x00ce, 0x0005, 0x00b6, 0x0126, 0x2091, 0x8000, 0x7000, 0x9086,
- 0x0002, 0x1904, 0x0ba8, 0x70a8, 0x9086, 0xffff, 0x0120, 0x080c,
- 0x2e09, 0x0804, 0x0ba8, 0x70d8, 0xd0ac, 0x1110, 0xd09c, 0x0520,
- 0xd084, 0x0510, 0x0006, 0x2001, 0x0103, 0x2003, 0x002b, 0x000e,
- 0xd08c, 0x01d0, 0x70dc, 0x9086, 0xffff, 0x0190, 0x080c, 0x2f94,
- 0x70d8, 0xd094, 0x1904, 0x0ba8, 0x2011, 0x0001, 0x080c, 0xbf8f,
- 0x0110, 0x2011, 0x0003, 0x901e, 0x080c, 0x2fce, 0x0804, 0x0ba8,
- 0x70e0, 0x9005, 0x1904, 0x0ba8, 0x70a4, 0x9005, 0x1904, 0x0ba8,
- 0x70d8, 0xd0a4, 0x0118, 0xd0b4, 0x0904, 0x0ba8, 0x080c, 0x6648,
- 0x1904, 0x0ba8, 0x080c, 0x669b, 0x1904, 0x0ba8, 0x080c, 0x6682,
- 0x01c0, 0x0156, 0x00c6, 0x20a9, 0x007f, 0x900e, 0x0016, 0x080c,
- 0x628f, 0x1118, 0xb800, 0xd0ec, 0x1138, 0x001e, 0x8108, 0x1f04,
- 0x0b4e, 0x00ce, 0x015e, 0x0028, 0x001e, 0x00ce, 0x015e, 0x0804,
- 0x0ba8, 0x0006, 0x2001, 0x0103, 0x2003, 0x006b, 0x000e, 0x2011,
- 0x198b, 0x080c, 0x0fb7, 0x2011, 0x19a5, 0x080c, 0x0fb7, 0x7030,
- 0xc08c, 0x7032, 0x7003, 0x0003, 0x70ab, 0xffff, 0x080c, 0x0e6e,
- 0x9006, 0x080c, 0x23fe, 0x0036, 0x0046, 0x2019, 0xffff, 0x2021,
- 0x0006, 0x080c, 0x4a97, 0x004e, 0x003e, 0x00f6, 0x2079, 0x0100,
- 0x080c, 0x70dd, 0x0150, 0x080c, 0x70ba, 0x7828, 0x0118, 0x9084,
- 0xe1ff, 0x0010, 0x9084, 0xffdf, 0x782a, 0x00fe, 0x080c, 0x98c7,
- 0x2001, 0x19c0, 0x2004, 0x9086, 0x0005, 0x1120, 0x2011, 0x0000,
- 0x080c, 0x9324, 0x2011, 0x0000, 0x080c, 0x932e, 0x080c, 0x98e3,
- 0x012e, 0x00be, 0x0005, 0x0016, 0x0026, 0x0046, 0x00f6, 0x0126,
- 0x2091, 0x8000, 0x2079, 0x0100, 0x7904, 0x918c, 0xfffd, 0x7906,
- 0x2009, 0x00f7, 0x080c, 0x5c73, 0x7940, 0x918c, 0x0010, 0x7942,
- 0x7924, 0xd1b4, 0x0120, 0x2011, 0x0040, 0x080c, 0x28ac, 0xd19c,
- 0x0120, 0x2011, 0x0008, 0x080c, 0x28ac, 0x0006, 0x0036, 0x0156,
- 0x0000, 0x2001, 0x197f, 0x2004, 0x9005, 0x1518, 0x080c, 0x2840,
- 0x1148, 0x2001, 0x0001, 0x080c, 0x27a3, 0x2001, 0x0001, 0x080c,
- 0x2786, 0x00b8, 0x080c, 0x2848, 0x1138, 0x9006, 0x080c, 0x27a3,
- 0x9006, 0x080c, 0x2786, 0x0068, 0x080c, 0x2850, 0x1d50, 0x2001,
- 0x1970, 0x2004, 0xd0fc, 0x0108, 0x0020, 0x080c, 0x259d, 0x0804,
- 0x0ca9, 0x080c, 0x28cf, 0x080c, 0x2902, 0x20a9, 0x003a, 0x1d04,
- 0x0bff, 0x080c, 0x8252, 0x1f04, 0x0bff, 0x080c, 0x70cb, 0x0148,
- 0x080c, 0x70dd, 0x1118, 0x080c, 0x73c8, 0x0050, 0x080c, 0x70c2,
- 0x0dd0, 0x080c, 0x73c3, 0x080c, 0x73b9, 0x080c, 0x6feb, 0x0020,
- 0x2009, 0x00f8, 0x080c, 0x5c73, 0x7850, 0xc0e5, 0x7852, 0x080c,
- 0x70ba, 0x0120, 0x7843, 0x0090, 0x7843, 0x0010, 0x2021, 0xe678,
- 0x2019, 0xea60, 0x0d0c, 0x8252, 0x7820, 0xd09c, 0x15a0, 0x080c,
- 0x70ba, 0x0904, 0x0c8b, 0x7824, 0xd0ac, 0x1904, 0x0cae, 0x080c,
- 0x70dd, 0x1548, 0x0046, 0x2021, 0x0320, 0x8421, 0x1df0, 0x004e,
- 0x2011, 0x1800, 0x080c, 0x28ac, 0x080c, 0x2858, 0x7824, 0x9084,
- 0x1800, 0x1168, 0x9484, 0x0fff, 0x1140, 0x2001, 0x1810, 0x2004,
- 0x9084, 0x9000, 0x0110, 0x080c, 0x0cd1, 0x8421, 0x1160, 0x1d04,
- 0x0c5b, 0x080c, 0x8252, 0x080c, 0x73c3, 0x080c, 0x73b9, 0x7003,
- 0x0001, 0x0804, 0x0cae, 0x8319, 0x1928, 0x2001, 0x1810, 0x2004,
- 0x9084, 0x9000, 0x0110, 0x080c, 0x0cd1, 0x1d04, 0x0c71, 0x080c,
- 0x8252, 0x2009, 0x1973, 0x2104, 0x9005, 0x0118, 0x8001, 0x200a,
- 0x1188, 0x200b, 0x000a, 0x2011, 0x0048, 0x080c, 0x28ac, 0x20a9,
- 0x0002, 0x080c, 0x2839, 0x7924, 0x080c, 0x2858, 0xd19c, 0x0110,
- 0x080c, 0x2774, 0x00f0, 0x080c, 0x70cb, 0x1140, 0x94a2, 0x03e8,
- 0x1128, 0x080c, 0x708e, 0x7003, 0x0001, 0x00c0, 0x2011, 0x1800,
- 0x080c, 0x28ac, 0x080c, 0x2858, 0x7824, 0x080c, 0x70d4, 0x0110,
- 0xd0ac, 0x1160, 0x9084, 0x1800, 0x0904, 0x0c63, 0x7003, 0x0001,
- 0x0028, 0x2001, 0x0001, 0x080c, 0x23fe, 0x00a0, 0x7850, 0xc0e4,
- 0x7852, 0x2009, 0x180c, 0x210c, 0xd19c, 0x1120, 0x7904, 0x918d,
- 0x0002, 0x7906, 0x2011, 0x0048, 0x080c, 0x28ac, 0x7828, 0x9085,
- 0x0028, 0x782a, 0x2001, 0x197f, 0x2003, 0x0000, 0x9006, 0x78f2,
- 0x015e, 0x003e, 0x000e, 0x012e, 0x00fe, 0x004e, 0x002e, 0x001e,
- 0x0005, 0x0006, 0x0016, 0x0026, 0x0036, 0x0046, 0x00b6, 0x00c6,
- 0x00d6, 0x00e6, 0x00f6, 0x0156, 0x0071, 0x0d0c, 0x8252, 0x015e,
- 0x00fe, 0x00ee, 0x00de, 0x00ce, 0x00be, 0x004e, 0x003e, 0x002e,
- 0x001e, 0x000e, 0x0005, 0x00e6, 0x2071, 0x189c, 0x7004, 0x9086,
- 0x0001, 0x1110, 0x080c, 0x32c6, 0x00ee, 0x0005, 0x0005, 0x2a70,
- 0x2061, 0x1983, 0x2063, 0x0003, 0x6007, 0x0003, 0x600b, 0x0002,
- 0x600f, 0x0317, 0x2001, 0x1954, 0x900e, 0x2102, 0x7192, 0x2001,
- 0x0100, 0x2004, 0x9082, 0x0002, 0x0218, 0x705b, 0xffff, 0x0008,
- 0x715a, 0x7063, 0xffff, 0x717a, 0x717e, 0x080c, 0xbcdc, 0x70eb,
- 0x00c0, 0x2061, 0x1944, 0x6003, 0x0909, 0x6106, 0x600b, 0x8800,
- 0x600f, 0x0200, 0x6013, 0x00ff, 0x6017, 0x000f, 0x611a, 0x601f,
- 0x07d0, 0x2061, 0x194c, 0x6003, 0x8000, 0x6106, 0x610a, 0x600f,
- 0x0200, 0x6013, 0x00ff, 0x6116, 0x601b, 0x0001, 0x611e, 0x2061,
- 0x1961, 0x6003, 0x514c, 0x6007, 0x4f47, 0x600b, 0x4943, 0x600f,
- 0x2020, 0x2001, 0x182b, 0x2102, 0x0005, 0x9016, 0x080c, 0x628f,
- 0x1178, 0xb804, 0x90c4, 0x00ff, 0x98c6, 0x0006, 0x0128, 0x90c4,
- 0xff00, 0x98c6, 0x0600, 0x1120, 0x9186, 0x0080, 0x0108, 0x8210,
- 0x8108, 0x9186, 0x0800, 0x1d50, 0x2208, 0x0005, 0x2091, 0x8000,
- 0x2079, 0x0000, 0x000e, 0x00f6, 0x0010, 0x2091, 0x8000, 0x0e04,
- 0x0d67, 0x0006, 0x0016, 0x2001, 0x8002, 0x0006, 0x2079, 0x0000,
- 0x000e, 0x7882, 0x7836, 0x001e, 0x798e, 0x000e, 0x788a, 0x000e,
- 0x7886, 0x3900, 0x789a, 0x7833, 0x0012, 0x2091, 0x5000, 0x0156,
- 0x00d6, 0x0036, 0x0026, 0x2079, 0x0300, 0x2069, 0x1afb, 0x7a08,
- 0x226a, 0x2069, 0x1afc, 0x7a18, 0x226a, 0x8d68, 0x7a1c, 0x226a,
- 0x782c, 0x2019, 0x1b09, 0x201a, 0x2019, 0x1b0c, 0x9016, 0x7808,
- 0xd09c, 0x0168, 0x7820, 0x201a, 0x8210, 0x8318, 0x9386, 0x1b25,
- 0x0108, 0x0ca8, 0x7808, 0xd09c, 0x0110, 0x2011, 0xdead, 0x2019,
- 0x1b0a, 0x782c, 0x201a, 0x8318, 0x221a, 0x7803, 0x0000, 0x2069,
- 0x1a51, 0x901e, 0x20a9, 0x0020, 0x7b26, 0x7a28, 0x226a, 0x8d68,
- 0x8318, 0x1f04, 0x0db4, 0x2069, 0x1a71, 0x2019, 0x0050, 0x20a9,
- 0x0020, 0x7b26, 0x7a28, 0x226a, 0x8d68, 0x8318, 0x1f04, 0x0dc1,
- 0x0491, 0x002e, 0x003e, 0x00de, 0x015e, 0x2079, 0x1800, 0x7803,
- 0x0005, 0x2091, 0x4080, 0x2001, 0x0089, 0x2004, 0xd084, 0x0180,
- 0x2001, 0x19fa, 0x2004, 0x9005, 0x0128, 0x2001, 0x008b, 0x2004,
- 0xd0fc, 0x0dd8, 0x2001, 0x008a, 0x2003, 0x0002, 0x2003, 0x1001,
- 0x080c, 0x53b7, 0x1170, 0x080c, 0x0f08, 0x0110, 0x080c, 0x0e5b,
- 0x080c, 0x53b7, 0x1130, 0x2071, 0x1800, 0x2011, 0x8000, 0x080c,
- 0x0f1c, 0x0c70, 0x0005, 0x2001, 0x0382, 0x2004, 0x9084, 0x0007,
- 0x9086, 0x0001, 0x1120, 0x2001, 0x0015, 0x080c, 0x98b8, 0x2079,
- 0x0380, 0x2069, 0x1adb, 0x7818, 0x6802, 0x781c, 0x6806, 0x7840,
- 0x680a, 0x7844, 0x680e, 0x782c, 0x6812, 0x2019, 0x1ae6, 0x9016,
- 0x7808, 0xd09c, 0x0150, 0x7820, 0x201a, 0x8210, 0x8318, 0x8210,
- 0x9282, 0x0011, 0x0ea8, 0x2011, 0xdead, 0x6a2a, 0x7830, 0x681a,
- 0x7834, 0x681e, 0x7838, 0x6822, 0x783c, 0x6826, 0x7803, 0x0000,
- 0x2069, 0x1a9b, 0x901e, 0x20a9, 0x0020, 0x7b26, 0x7828, 0x206a,
- 0x8d68, 0x8318, 0x1f04, 0x0e35, 0x2069, 0x1abb, 0x2019, 0x00b0,
- 0x20a9, 0x0020, 0x7b26, 0x7828, 0x206a, 0x8d68, 0x8318, 0x1f04,
- 0x0e42, 0x0005, 0x918c, 0x03ff, 0x2001, 0x0003, 0x2004, 0x9084,
- 0x0600, 0x1118, 0x918d, 0x6c00, 0x0010, 0x918d, 0x6400, 0x2001,
- 0x017f, 0x2102, 0x0005, 0x0026, 0x0126, 0x2011, 0x0080, 0x080c,
- 0x0efa, 0x20a9, 0x0900, 0x080c, 0x0f30, 0x2011, 0x0040, 0x080c,
- 0x0efa, 0x20a9, 0x0900, 0x080c, 0x0f30, 0x0c78, 0x0026, 0x080c,
- 0x0f08, 0x1188, 0x2011, 0x010e, 0x2214, 0x9294, 0x0007, 0x9296,
- 0x0007, 0x0118, 0x2011, 0x0947, 0x0010, 0x2011, 0x1b47, 0x080c,
- 0x0f1c, 0x002e, 0x0005, 0x2011, 0x010e, 0x2214, 0x9294, 0x0007,
- 0x9296, 0x0007, 0x0118, 0x2011, 0xa880, 0x0010, 0x2011, 0x6840,
- 0xd0e4, 0x70ef, 0x0000, 0x1128, 0x70ef, 0x0fa0, 0x080c, 0x0f0d,
- 0x002e, 0x0005, 0x0026, 0x080c, 0x0f08, 0x0148, 0xd0a4, 0x1138,
- 0x2011, 0xcdd5, 0x0010, 0x2011, 0x0080, 0x080c, 0x0f0d, 0x002e,
- 0x0005, 0x0026, 0x70ef, 0x0000, 0x080c, 0x0f08, 0x1130, 0x2011,
- 0x8040, 0x080c, 0x0f1c, 0x002e, 0x0005, 0x080c, 0x2850, 0x1118,
- 0x2011, 0xcdc5, 0x0010, 0x2011, 0xcac2, 0x080c, 0x0f0d, 0x002e,
- 0x0005, 0x00e6, 0x0016, 0x0006, 0x2071, 0x1800, 0xd0b4, 0x70e8,
- 0x71e4, 0x1118, 0xc0e4, 0xc1f4, 0x0050, 0x0006, 0x3b00, 0x9084,
- 0xff3e, 0x20d8, 0x000e, 0x70ef, 0x0000, 0xc0e5, 0xc1f5, 0x0099,
- 0x000e, 0x001e, 0x00ee, 0x0005, 0x00e6, 0x2071, 0x1800, 0xd0e4,
- 0x70e8, 0x1110, 0xc0dc, 0x0008, 0xc0dd, 0x0016, 0x71e4, 0x0019,
- 0x001e, 0x00ee, 0x0005, 0x70ea, 0x71e6, 0x7000, 0x9084, 0x0007,
- 0x000b, 0x0005, 0x0ec0, 0x0e9a, 0x0e9a, 0x0e6e, 0x0ea9, 0x0e9a,
- 0x0e9a, 0x0ea9, 0xc284, 0x0016, 0x3b08, 0x3a00, 0x9104, 0x918d,
- 0x00c1, 0x21d8, 0x9084, 0xff3e, 0x9205, 0x20d0, 0x001e, 0x0005,
- 0x2001, 0x183a, 0x2004, 0xd0dc, 0x0005, 0x9e86, 0x1800, 0x190c,
- 0x0d65, 0x70e8, 0xd0e4, 0x0108, 0xc2e5, 0x72ea, 0xd0e4, 0x1118,
- 0x9294, 0x00c1, 0x08f9, 0x0005, 0x9e86, 0x1800, 0x190c, 0x0d65,
- 0x70e4, 0xd0f4, 0x0108, 0xc2f5, 0x72e6, 0xd0f4, 0x1140, 0x9284,
- 0x8000, 0x8005, 0xc284, 0x9215, 0x9294, 0x00c1, 0x0861, 0x0005,
- 0x1d04, 0x0f30, 0x2091, 0x6000, 0x1f04, 0x0f30, 0x0005, 0x890e,
- 0x810e, 0x810f, 0x9194, 0x003f, 0x918c, 0xffc0, 0x0005, 0x0006,
- 0x2200, 0x914d, 0x894f, 0x894d, 0x894d, 0x000e, 0x0005, 0x01d6,
- 0x0146, 0x0036, 0x0096, 0x2061, 0x188b, 0x600b, 0x0000, 0x600f,
- 0x0000, 0x6003, 0x0000, 0x6007, 0x0000, 0x2009, 0xffc0, 0x2105,
- 0x0006, 0x2001, 0xaaaa, 0x200f, 0x2019, 0x5555, 0x9016, 0x2049,
- 0x0bff, 0xab02, 0xa001, 0xa001, 0xa800, 0x9306, 0x1138, 0x2105,
- 0x9306, 0x0120, 0x8210, 0x99c8, 0x0400, 0x0c98, 0x000e, 0x200f,
- 0x2001, 0x189b, 0x928a, 0x000e, 0x1638, 0x928a, 0x0006, 0x2011,
- 0x0006, 0x1210, 0x2011, 0x0000, 0x2202, 0x9006, 0x2008, 0x82ff,
- 0x01b0, 0x8200, 0x600a, 0x600f, 0xffff, 0x6003, 0x0002, 0x6007,
- 0x0000, 0x0026, 0x2019, 0x0010, 0x9280, 0x0001, 0x20e8, 0x21a0,
- 0x21a8, 0x4104, 0x8319, 0x1de0, 0x8211, 0x1da0, 0x002e, 0x009e,
- 0x003e, 0x014e, 0x01de, 0x0005, 0x2011, 0x000e, 0x08e8, 0x0016,
- 0x0026, 0x0096, 0x3348, 0x080c, 0x0f37, 0x2100, 0x9300, 0x2098,
- 0x22e0, 0x009e, 0x002e, 0x001e, 0x0036, 0x3518, 0x20a9, 0x0001,
- 0x4002, 0x8007, 0x4004, 0x8319, 0x1dd8, 0x003e, 0x0005, 0x20e9,
- 0x0001, 0x71b4, 0x81ff, 0x11c0, 0x9006, 0x2009, 0x0200, 0x20a9,
- 0x0002, 0x9298, 0x0018, 0x23a0, 0x4001, 0x2009, 0x0700, 0x20a9,
- 0x0002, 0x9298, 0x0008, 0x23a0, 0x4001, 0x7078, 0x8007, 0x717c,
- 0x810f, 0x20a9, 0x0002, 0x4001, 0x9298, 0x000c, 0x23a0, 0x900e,
- 0x080c, 0x0d45, 0x2001, 0x0000, 0x810f, 0x20a9, 0x0002, 0x4001,
- 0x0005, 0x89ff, 0x0140, 0xa804, 0xa807, 0x0000, 0x0006, 0x080c,
- 0x1061, 0x009e, 0x0cb0, 0x0005, 0x00e6, 0x2071, 0x1800, 0x080c,
- 0x10da, 0x090c, 0x0d65, 0x00ee, 0x0005, 0x0086, 0x00e6, 0x0006,
- 0x0026, 0x0036, 0x0126, 0x2091, 0x8000, 0x00c9, 0x2071, 0x1800,
- 0x73bc, 0x702c, 0x9016, 0x9045, 0x0158, 0x8210, 0x9906, 0x090c,
- 0x0d65, 0x2300, 0x9202, 0x0120, 0x1a0c, 0x0d65, 0xa000, 0x0c98,
- 0x012e, 0x003e, 0x002e, 0x000e, 0x00ee, 0x008e, 0x0005, 0x0086,
- 0x00e6, 0x0006, 0x0126, 0x2091, 0x8000, 0x2071, 0x190e, 0x7010,
- 0x9005, 0x0140, 0x7018, 0x9045, 0x0128, 0x9906, 0x090c, 0x0d65,
- 0xa000, 0x0cc8, 0x012e, 0x000e, 0x00ee, 0x008e, 0x0005, 0x00e6,
- 0x2071, 0x1800, 0x0126, 0x2091, 0x8000, 0x70bc, 0x8001, 0x0270,
- 0x70be, 0x702c, 0x2048, 0x9085, 0x0001, 0xa800, 0x702e, 0xa803,
- 0x0000, 0xa807, 0x0000, 0x012e, 0x00ee, 0x0005, 0x904e, 0x0cd8,
- 0x00e6, 0x0126, 0x2091, 0x8000, 0x2071, 0x1800, 0x70bc, 0x90ca,
- 0x0040, 0x0268, 0x8001, 0x70be, 0x702c, 0x2048, 0xa800, 0x702e,
- 0xa803, 0x0000, 0xa807, 0x0000, 0x012e, 0x00ee, 0x0005, 0x904e,
- 0x0cd8, 0x00e6, 0x0126, 0x2091, 0x8000, 0x0016, 0x890e, 0x810e,
- 0x810f, 0x9184, 0x003f, 0xa862, 0x9184, 0xffc0, 0xa85e, 0x001e,
- 0x0020, 0x00e6, 0x0126, 0x2091, 0x8000, 0x2071, 0x1800, 0x702c,
- 0xa802, 0x2900, 0x702e, 0x70bc, 0x8000, 0x70be, 0x080c, 0x8087,
- 0x012e, 0x00ee, 0x0005, 0x2071, 0x1800, 0x9026, 0x2009, 0x0000,
- 0x2049, 0x0400, 0x2900, 0x702e, 0x8940, 0x2800, 0xa802, 0xa95e,
- 0xa863, 0x0001, 0x8420, 0x9886, 0x0440, 0x0120, 0x2848, 0x9188,
- 0x0040, 0x0c90, 0x2071, 0x188b, 0x7000, 0x9005, 0x11a0, 0x2001,
- 0x049b, 0xa802, 0x2048, 0x2009, 0x26c0, 0x8940, 0x2800, 0xa802,
- 0xa95e, 0xa863, 0x0001, 0x8420, 0x9886, 0x0800, 0x0120, 0x2848,
- 0x9188, 0x0040, 0x0c90, 0x2071, 0x188b, 0x7104, 0x7200, 0x82ff,
- 0x01d0, 0x7308, 0x8318, 0x831f, 0x831b, 0x831b, 0x7312, 0x8319,
- 0x2001, 0x0800, 0xa802, 0x2048, 0x8900, 0xa802, 0x2040, 0xa95e,
- 0xaa62, 0x8420, 0x2300, 0x9906, 0x0130, 0x2848, 0x9188, 0x0040,
- 0x9291, 0x0000, 0x0c88, 0xa803, 0x0000, 0x2071, 0x1800, 0x74ba,
- 0x74be, 0x0005, 0x00e6, 0x0016, 0x9984, 0xfc00, 0x01e8, 0x908c,
- 0xf800, 0x1168, 0x9982, 0x0400, 0x02b8, 0x9982, 0x0440, 0x0278,
- 0x9982, 0x049b, 0x0288, 0x9982, 0x0800, 0x1270, 0x0040, 0x9982,
- 0x0800, 0x0250, 0x2071, 0x188b, 0x7010, 0x9902, 0x1228, 0x9085,
- 0x0001, 0x001e, 0x00ee, 0x0005, 0x9006, 0x0cd8, 0x00e6, 0x2071,
- 0x19f9, 0x7007, 0x0000, 0x9006, 0x701e, 0x7022, 0x7002, 0x2071,
- 0x0000, 0x7010, 0x9085, 0x8044, 0x7012, 0x2071, 0x0080, 0x9006,
- 0x702b, 0x0060, 0x20a9, 0x0040, 0x7022, 0x1f04, 0x1114, 0x702b,
- 0x0060, 0x702b, 0x0020, 0x20a9, 0x0040, 0x7022, 0x1f04, 0x111d,
- 0x702b, 0x0020, 0x00ee, 0x0005, 0x0126, 0x2091, 0x8000, 0x00e6,
- 0xa06f, 0x0000, 0x2071, 0x19f9, 0x701c, 0x9088, 0x1a03, 0x280a,
- 0x8000, 0x9084, 0x003f, 0x701e, 0x7120, 0x9106, 0x090c, 0x0d65,
- 0x7004, 0x9005, 0x1128, 0x00f6, 0x2079, 0x0080, 0x00a9, 0x00fe,
- 0x00ee, 0x012e, 0x0005, 0x0126, 0x2091, 0x8000, 0x00e6, 0x2071,
- 0x19f9, 0x7004, 0x9005, 0x1128, 0x00f6, 0x2079, 0x0080, 0x0021,
- 0x00fe, 0x00ee, 0x012e, 0x0005, 0x7004, 0x9086, 0x0000, 0x1110,
- 0x7007, 0x0006, 0x7000, 0x0002, 0x1166, 0x1164, 0x1164, 0x1164,
- 0x12dd, 0x12dd, 0x12dd, 0x12dd, 0x080c, 0x0d65, 0x701c, 0x7120,
- 0x9106, 0x1148, 0x792c, 0x9184, 0x0001, 0x1120, 0xd1fc, 0x1110,
- 0x7007, 0x0000, 0x0005, 0x0096, 0x9180, 0x1a03, 0x2004, 0x700a,
- 0x2048, 0x8108, 0x918c, 0x003f, 0x7122, 0x782b, 0x0026, 0xa88c,
- 0x7802, 0xa890, 0x7806, 0xa894, 0x780a, 0xa898, 0x780e, 0xa878,
- 0x700e, 0xa870, 0x7016, 0xa874, 0x701a, 0xa868, 0x009e, 0xd084,
- 0x0120, 0x7007, 0x0001, 0x0029, 0x0005, 0x7007, 0x0002, 0x00b1,
- 0x0005, 0x0016, 0x0026, 0x710c, 0x2011, 0x0040, 0x9182, 0x0040,
- 0x1210, 0x2110, 0x9006, 0x700e, 0x7212, 0x8203, 0x7812, 0x782b,
- 0x0020, 0x782b, 0x0041, 0x002e, 0x001e, 0x0005, 0x0016, 0x0026,
- 0x0136, 0x0146, 0x0156, 0x7014, 0x20e0, 0x7018, 0x2098, 0x20e9,
- 0x0000, 0x20a1, 0x0088, 0x782b, 0x0026, 0x710c, 0x2011, 0x0040,
- 0x9182, 0x0040, 0x1210, 0x2110, 0x9006, 0x700e, 0x22a8, 0x4006,
- 0x8203, 0x7812, 0x782b, 0x0020, 0x3300, 0x701a, 0x782b, 0x0001,
- 0x015e, 0x014e, 0x013e, 0x002e, 0x001e, 0x0005, 0x2009, 0x19f9,
- 0x2104, 0xc095, 0x200a, 0x080c, 0x1143, 0x0005, 0x0016, 0x00e6,
- 0x2071, 0x19f9, 0x00f6, 0x2079, 0x0080, 0x792c, 0xd1bc, 0x190c,
- 0x0d5e, 0x782b, 0x0002, 0xd1fc, 0x0120, 0x918c, 0x0700, 0x7004,
- 0x0023, 0x00fe, 0x00ee, 0x001e, 0x0005, 0x1154, 0x11fc, 0x1230,
- 0x0d65, 0x0d65, 0x12e9, 0x0d65, 0x918c, 0x0700, 0x1550, 0x0136,
- 0x0146, 0x0156, 0x7014, 0x20e8, 0x7018, 0x20a0, 0x20e1, 0x0000,
- 0x2099, 0x0088, 0x782b, 0x0040, 0x7010, 0x20a8, 0x4005, 0x3400,
- 0x701a, 0x015e, 0x014e, 0x013e, 0x700c, 0x9005, 0x0578, 0x7800,
- 0x7802, 0x7804, 0x7806, 0x080c, 0x1199, 0x0005, 0x7008, 0x0096,
- 0x2048, 0xa86f, 0x0100, 0x009e, 0x7007, 0x0000, 0x080c, 0x1154,
- 0x0005, 0x7008, 0x0096, 0x2048, 0xa86f, 0x0200, 0x009e, 0x0ca0,
- 0x918c, 0x0700, 0x1150, 0x700c, 0x9005, 0x0180, 0x7800, 0x7802,
- 0x7804, 0x7806, 0x080c, 0x11ae, 0x0005, 0x7008, 0x0096, 0x2048,
- 0xa86f, 0x0200, 0x009e, 0x7007, 0x0000, 0x0080, 0x0096, 0x7008,
- 0x2048, 0x7800, 0xa88e, 0x7804, 0xa892, 0x7808, 0xa896, 0x780c,
- 0xa89a, 0xa86f, 0x0100, 0x009e, 0x7007, 0x0000, 0x0096, 0x00d6,
- 0x7008, 0x2048, 0x2001, 0x18b7, 0x2004, 0x9906, 0x1128, 0xa89c,
- 0x080f, 0x00de, 0x009e, 0x00a0, 0x00de, 0x009e, 0x0096, 0x00d6,
- 0x7008, 0x2048, 0x0081, 0x0150, 0xa89c, 0x0086, 0x2940, 0x080f,
- 0x008e, 0x00de, 0x009e, 0x080c, 0x1143, 0x0005, 0x00de, 0x009e,
- 0x080c, 0x1143, 0x0005, 0xa8a8, 0xd08c, 0x0005, 0x0096, 0xa0a0,
- 0x904d, 0x090c, 0x0d65, 0xa06c, 0x908e, 0x0100, 0x0130, 0xa87b,
- 0x0030, 0xa883, 0x0000, 0xa897, 0x4002, 0x080c, 0x69a9, 0xa09f,
- 0x0000, 0xa0a3, 0x0000, 0x2848, 0x080c, 0x1061, 0x009e, 0x0005,
- 0x00a6, 0xa0a0, 0x904d, 0x090c, 0x0d65, 0xa06c, 0x908e, 0x0100,
- 0x0128, 0xa87b, 0x0001, 0xa883, 0x0000, 0x00c0, 0xa80c, 0x2050,
- 0xb004, 0x9005, 0x0198, 0xa80e, 0x2050, 0x8006, 0x8006, 0x8007,
- 0x908c, 0x003f, 0x9084, 0xffc0, 0x9080, 0x0002, 0xa076, 0xa172,
- 0xb000, 0xa07a, 0x2810, 0x080c, 0x1124, 0x00e8, 0xa97c, 0xa894,
- 0x0016, 0x0006, 0x080c, 0x69a9, 0x000e, 0x001e, 0xd1fc, 0x1138,
- 0xd1f4, 0x0128, 0x00c6, 0x2060, 0x080c, 0x9be6, 0x00ce, 0x7008,
- 0x2048, 0xa89f, 0x0000, 0xa8a3, 0x0000, 0x080c, 0x1061, 0x7007,
- 0x0000, 0x080c, 0x1143, 0x00ae, 0x0005, 0x0126, 0x2091, 0x8000,
- 0x782b, 0x1001, 0x7007, 0x0005, 0x7000, 0xc094, 0x7002, 0x012e,
- 0x0005, 0x7007, 0x0000, 0x080c, 0x1154, 0x0005, 0x0126, 0x2091,
- 0x2200, 0x2079, 0x0300, 0x2071, 0x1a43, 0x7003, 0x0000, 0x78bf,
- 0x00f6, 0x0041, 0x7807, 0x0007, 0x7803, 0x0000, 0x7803, 0x0001,
- 0x012e, 0x0005, 0x00c6, 0x7803, 0x0000, 0x2001, 0x0165, 0x2003,
- 0x4198, 0x7808, 0xd09c, 0x0110, 0x7820, 0x0cd8, 0x2001, 0x1a44,
- 0x2003, 0x0000, 0x78ab, 0x0004, 0x78ac, 0xd0ac, 0x1de8, 0x78ab,
- 0x0002, 0x7807, 0x0007, 0x7827, 0x0030, 0x782b, 0x0400, 0x7827,
- 0x0031, 0x782b, 0x1a51, 0x781f, 0xff00, 0x781b, 0xff00, 0x2001,
- 0x0200, 0x2004, 0xd0dc, 0x0110, 0x781f, 0x0303, 0x2061, 0x1a51,
- 0x602f, 0x1ddc, 0x2001, 0x1819, 0x2004, 0x9082, 0x1ddc, 0x6032,
- 0x603b, 0x1d1c, 0x602b, 0x1a91, 0x6007, 0x1a71, 0x2061, 0x1a71,
- 0x00ce, 0x0005, 0x0126, 0x2091, 0x2200, 0x7908, 0x9184, 0x0070,
- 0x190c, 0x0d5e, 0xd19c, 0x05a0, 0x7820, 0x908c, 0xf000, 0x0540,
- 0x2060, 0x6020, 0x9086, 0x0003, 0x1550, 0x6000, 0x9086, 0x0004,
- 0x1530, 0x6114, 0x2148, 0xa876, 0xa87a, 0xa867, 0x0103, 0x080c,
- 0x67cb, 0x00b6, 0x6010, 0x2058, 0xba3c, 0x8211, 0x0208, 0xba3e,
- 0xb8c0, 0x9005, 0x190c, 0x63ba, 0x00be, 0x6044, 0xd0fc, 0x190c,
- 0x98f0, 0x080c, 0x9c0e, 0x7808, 0xd09c, 0x19b0, 0x012e, 0x0005,
- 0x908a, 0x0024, 0x1a0c, 0x0d65, 0x002b, 0x012e, 0x0005, 0x04b0,
- 0x012e, 0x0005, 0x13a6, 0x13cc, 0x13fc, 0x1401, 0x1405, 0x140a,
- 0x1432, 0x1436, 0x1444, 0x1448, 0x13a6, 0x14d4, 0x14d8, 0x153b,
- 0x13a6, 0x13a6, 0x13a6, 0x13a6, 0x13a6, 0x13a6, 0x13a6, 0x13a6,
- 0x13a6, 0x13a6, 0x13a6, 0x13a6, 0x13a6, 0x140c, 0x13a6, 0x13d4,
- 0x13f9, 0x13c0, 0x13a6, 0x13e0, 0x13aa, 0x13a8, 0x080c, 0x0d65,
- 0x080c, 0x0d5e, 0x080c, 0x1542, 0x2009, 0x1a50, 0x2104, 0x8000,
- 0x200a, 0x080c, 0x7b25, 0x080c, 0x1989, 0x0005, 0x6044, 0xd0fc,
- 0x190c, 0x98f0, 0x2009, 0x0055, 0x080c, 0x9c82, 0x012e, 0x0005,
- 0x080c, 0x1542, 0x2060, 0x6044, 0xd0fc, 0x190c, 0x98f0, 0x2009,
- 0x0055, 0x080c, 0x9c82, 0x0005, 0x2009, 0x0048, 0x080c, 0x1542,
- 0x2060, 0x080c, 0x9c82, 0x0005, 0x2009, 0x0054, 0x080c, 0x1542,
- 0x2060, 0x6044, 0xd0fc, 0x190c, 0x98f0, 0x080c, 0x9c82, 0x0005,
- 0x080c, 0x1542, 0x2060, 0x0056, 0x0066, 0x080c, 0x1542, 0x2028,
- 0x080c, 0x1542, 0x2030, 0x0036, 0x0046, 0x2021, 0x0000, 0x2418,
- 0x2009, 0x0056, 0x080c, 0x9c82, 0x004e, 0x003e, 0x006e, 0x005e,
- 0x0005, 0x080c, 0x1542, 0x0005, 0x7004, 0xc085, 0xc0b5, 0x7006,
- 0x0005, 0x7004, 0xc085, 0x7006, 0x0005, 0x080c, 0x1542, 0x080c,
- 0x15ff, 0x0005, 0x080c, 0x0d65, 0x080c, 0x1542, 0x2060, 0x6014,
- 0x0096, 0x2048, 0xa83b, 0xffff, 0x009e, 0x2009, 0x0048, 0x080c,
- 0x9c82, 0x2001, 0x015d, 0x2003, 0x0000, 0x2009, 0x03e8, 0x8109,
- 0x0160, 0x2001, 0x0201, 0x2004, 0x9005, 0x0dc8, 0x2001, 0x0218,
- 0x2004, 0xd0ec, 0x1110, 0x080c, 0x1547, 0x2001, 0x0307, 0x2003,
- 0x8000, 0x0005, 0x7004, 0xc095, 0x7006, 0x0005, 0x080c, 0x1542,
- 0x2060, 0x6014, 0x0096, 0x2048, 0xa83b, 0xffff, 0x009e, 0x2009,
- 0x0048, 0x080c, 0x9c82, 0x0005, 0x080c, 0x1542, 0x080c, 0x0d65,
- 0x080c, 0x1542, 0x080c, 0x14bf, 0x7827, 0x0018, 0x79ac, 0xd1dc,
- 0x0540, 0x7827, 0x0015, 0x7828, 0x782b, 0x0000, 0x9065, 0x0138,
- 0x2001, 0x020d, 0x2003, 0x0050, 0x2003, 0x0020, 0x0400, 0x7004,
- 0x9005, 0x1180, 0x78ab, 0x0004, 0x7827, 0x0018, 0x782b, 0x0000,
- 0xd1bc, 0x090c, 0x0d65, 0x2001, 0x020d, 0x2003, 0x0050, 0x2003,
- 0x0020, 0x0490, 0x78ab, 0x0004, 0x7803, 0x0001, 0x080c, 0x14d8,
- 0x0005, 0x7828, 0x782b, 0x0000, 0x9065, 0x090c, 0x0d65, 0x6014,
- 0x2048, 0x78ab, 0x0004, 0x918c, 0x0700, 0x01a8, 0x080c, 0x7b25,
- 0x080c, 0x1989, 0x080c, 0xb870, 0x0158, 0xa9ac, 0xa936, 0xa9b0,
- 0xa93a, 0xa83f, 0xffff, 0xa843, 0xffff, 0xa880, 0xc0bd, 0xa882,
- 0x080c, 0xb45e, 0x0005, 0x6010, 0x00b6, 0x2058, 0xb800, 0x00be,
- 0xd0bc, 0x6024, 0x190c, 0xbc71, 0x2029, 0x00c8, 0x8529, 0x0128,
- 0x2001, 0x0201, 0x2004, 0x9005, 0x0dc8, 0x7dbc, 0x080c, 0xd61c,
- 0xd5a4, 0x1118, 0x080c, 0x1547, 0x0005, 0x080c, 0x7b25, 0x080c,
- 0x1989, 0x0005, 0x781f, 0x0300, 0x7803, 0x0001, 0x0005, 0x0016,
- 0x0066, 0x0076, 0x00f6, 0x2079, 0x0300, 0x7908, 0x918c, 0x0007,
- 0x9186, 0x0003, 0x0120, 0x2001, 0x0016, 0x080c, 0x15b8, 0x00fe,
- 0x007e, 0x006e, 0x001e, 0x0005, 0x7004, 0xc09d, 0x7006, 0x0005,
- 0x7104, 0x9184, 0x0004, 0x190c, 0x0d65, 0xd184, 0x1189, 0xd19c,
- 0x0158, 0xc19c, 0x7106, 0x2001, 0x020d, 0x2003, 0x0050, 0x2003,
- 0x0020, 0x080c, 0x1547, 0x0005, 0x81ff, 0x190c, 0x0d65, 0x0005,
- 0xc184, 0xd1b4, 0xc1b4, 0x7106, 0x0016, 0x00e6, 0x15e0, 0x2071,
- 0x0200, 0x080c, 0x15f3, 0x6014, 0x9005, 0x05a8, 0x0096, 0x2048,
- 0xa864, 0x009e, 0x9084, 0x00ff, 0x908e, 0x0029, 0x0160, 0x908e,
- 0x0048, 0x1548, 0x601c, 0xd084, 0x11d8, 0x00f6, 0x2c78, 0x080c,
- 0x1669, 0x00fe, 0x00a8, 0x00f6, 0x2c78, 0x080c, 0x17b1, 0x00fe,
- 0x2009, 0x01f4, 0x8109, 0x0160, 0x2001, 0x0201, 0x2004, 0x9005,
- 0x0dc8, 0x2001, 0x0218, 0x2004, 0xd0ec, 0x1110, 0x0401, 0x0040,
- 0x2001, 0x020d, 0x2003, 0x0020, 0x080c, 0x1302, 0x7803, 0x0001,
- 0x00ee, 0x001e, 0x0005, 0x2001, 0x020d, 0x2003, 0x0050, 0x2003,
- 0x0020, 0x0069, 0x0ca8, 0x0031, 0x2060, 0x2009, 0x0053, 0x080c,
- 0x9c82, 0x0005, 0x7808, 0xd09c, 0x0de8, 0x7820, 0x0005, 0x080c,
- 0x14bf, 0x00d6, 0x2069, 0x0200, 0x2009, 0x01f4, 0x8109, 0x0510,
- 0x6804, 0x9005, 0x0dd8, 0x2001, 0x015d, 0x2003, 0x0000, 0x79bc,
- 0xd1a4, 0x1528, 0x79b8, 0x918c, 0x0fff, 0x0180, 0x9182, 0x0841,
- 0x1268, 0x9188, 0x0007, 0x918c, 0x0ff8, 0x810c, 0x810c, 0x810c,
- 0x080c, 0x15aa, 0x6827, 0x0001, 0x8109, 0x1dd0, 0x04d9, 0x6827,
- 0x0002, 0x04c1, 0x6804, 0x9005, 0x1130, 0x682c, 0xd0e4, 0x1500,
- 0x6804, 0x9005, 0x0de8, 0x79b8, 0xd1ec, 0x1130, 0x08c0, 0x080c,
- 0x7b25, 0x080c, 0x1989, 0x0090, 0x7827, 0x0015, 0x782b, 0x0000,
- 0x7827, 0x0018, 0x782b, 0x0000, 0x2001, 0x020d, 0x2003, 0x0020,
- 0x2001, 0x0307, 0x2003, 0x0300, 0x7803, 0x0001, 0x00de, 0x0005,
- 0x682c, 0x9084, 0x5400, 0x9086, 0x5400, 0x0d30, 0x7827, 0x0015,
- 0x782b, 0x0000, 0x7803, 0x0001, 0x6800, 0x9085, 0x1800, 0x6802,
- 0x00de, 0x0005, 0x6824, 0x9084, 0x0003, 0x1de0, 0x0005, 0x2001,
- 0x0030, 0x2c08, 0x621c, 0x0021, 0x7830, 0x9086, 0x0041, 0x0005,
- 0x00f6, 0x2079, 0x0300, 0x0006, 0x7808, 0xd09c, 0x0140, 0x0016,
- 0x0026, 0x00c6, 0x080c, 0x1342, 0x00ce, 0x002e, 0x001e, 0x000e,
- 0x0006, 0x7832, 0x7936, 0x7a3a, 0x781b, 0x8080, 0x0059, 0x1118,
- 0x000e, 0x00fe, 0x0005, 0x000e, 0x792c, 0x3900, 0x8000, 0x2004,
- 0x080c, 0x0d65, 0x2009, 0xff00, 0x8109, 0x0120, 0x7818, 0xd0bc,
- 0x1dd8, 0x0005, 0x9085, 0x0001, 0x0005, 0x7832, 0x7936, 0x7a3a,
- 0x781b, 0x8080, 0x0c79, 0x1108, 0x0005, 0x792c, 0x3900, 0x8000,
- 0x2004, 0x080c, 0x0d65, 0x7037, 0x0001, 0x7150, 0x7037, 0x0002,
- 0x7050, 0x2060, 0xd1bc, 0x1110, 0x7054, 0x2060, 0x0005, 0x00e6,
- 0x0016, 0x2071, 0x0200, 0x0c79, 0x6124, 0xd1dc, 0x01f8, 0x701c,
- 0xd08c, 0x0904, 0x165e, 0x7017, 0x0000, 0x2001, 0x0264, 0x2004,
- 0xd0bc, 0x0904, 0x165e, 0x2001, 0x0268, 0x00c6, 0x2064, 0x6104,
- 0x6038, 0x00ce, 0x918e, 0x0039, 0x1904, 0x165e, 0x9c06, 0x15f0,
- 0x0126, 0x2091, 0x2600, 0x080c, 0x7a7d, 0x012e, 0x7358, 0x745c,
- 0x6014, 0x905d, 0x0598, 0x2b48, 0x6010, 0x00b6, 0x2058, 0xb800,
- 0x00be, 0xd0bc, 0x190c, 0xbc4c, 0xab42, 0xac3e, 0x2001, 0x187d,
- 0x2004, 0xd0b4, 0x1170, 0x601c, 0xd0e4, 0x1158, 0x6010, 0x00b6,
- 0x2058, 0xb800, 0x00be, 0xd0bc, 0x1120, 0xa83b, 0x7fff, 0xa837,
- 0xffff, 0x080c, 0x1d3c, 0x1190, 0x080c, 0x180c, 0x2a00, 0xa816,
- 0x0130, 0x2800, 0xa80e, 0x2c05, 0xa80a, 0x2c00, 0xa812, 0x7037,
- 0x0020, 0x781f, 0x0300, 0x001e, 0x00ee, 0x0005, 0x7037, 0x0050,
- 0x7037, 0x0020, 0x001e, 0x00ee, 0x080c, 0x1547, 0x0005, 0x080c,
- 0x0d65, 0x0016, 0x2009, 0x00a0, 0x8109, 0xa001, 0xa001, 0xa001,
- 0x1dd8, 0x001e, 0x2cf0, 0x0126, 0x2091, 0x2200, 0x00c6, 0x3e60,
- 0x6014, 0x2048, 0x2940, 0x903e, 0x2730, 0xa864, 0x2068, 0xa81a,
- 0x9d84, 0x000f, 0x9088, 0x1d1c, 0x2165, 0x0002, 0x169d, 0x16ea,
- 0x169d, 0x169d, 0x169d, 0x16cc, 0x169d, 0x16a1, 0x1696, 0x16e1,
- 0x169d, 0x169d, 0x169d, 0x17a6, 0x16b5, 0x16ab, 0xa964, 0x918c,
- 0x00ff, 0x918e, 0x0048, 0x0904, 0x16e1, 0x9085, 0x0001, 0x0804,
- 0x179d, 0xa87c, 0xd0bc, 0x0dc8, 0xa890, 0xa842, 0xa88c, 0xa83e,
- 0xa888, 0x0804, 0x16f1, 0xa87c, 0xd0bc, 0x0d78, 0xa890, 0xa842,
- 0xa88c, 0xa83e, 0xa888, 0x0804, 0x1740, 0xa87c, 0xd0bc, 0x0d28,
- 0xa890, 0xa842, 0xa88c, 0xa83e, 0xa804, 0x9045, 0x090c, 0x0d65,
- 0xa164, 0xa91a, 0x91ec, 0x000f, 0x9d80, 0x1d1c, 0x2065, 0xa888,
- 0xd19c, 0x1904, 0x1740, 0x0428, 0xa87c, 0xd0ac, 0x0970, 0xa804,
- 0x9045, 0x090c, 0x0d65, 0xa164, 0xa91a, 0x91ec, 0x000f, 0x9d80,
- 0x1d1c, 0x2065, 0x9006, 0xa842, 0xa83e, 0xd19c, 0x1904, 0x1740,
- 0x0080, 0xa87c, 0xd0ac, 0x0904, 0x169d, 0x9006, 0xa842, 0xa83e,
- 0x0804, 0x1740, 0xa87c, 0xd0ac, 0x0904, 0x169d, 0x9006, 0xa842,
- 0xa83e, 0x2c05, 0x908a, 0x0036, 0x1a0c, 0x0d65, 0x9082, 0x001b,
- 0x0002, 0x1714, 0x1714, 0x1716, 0x1714, 0x1714, 0x1714, 0x171c,
- 0x1714, 0x1714, 0x1714, 0x1722, 0x1714, 0x1714, 0x1714, 0x1728,
- 0x1714, 0x1714, 0x1714, 0x172e, 0x1714, 0x1714, 0x1714, 0x1734,
- 0x1714, 0x1714, 0x1714, 0x173a, 0x080c, 0x0d65, 0xa574, 0xa478,
- 0xa37c, 0xa280, 0x0804, 0x1785, 0xa584, 0xa488, 0xa38c, 0xa290,
- 0x0804, 0x1785, 0xa594, 0xa498, 0xa39c, 0xa2a0, 0x0804, 0x1785,
- 0xa5a4, 0xa4a8, 0xa3ac, 0xa2b0, 0x0804, 0x1785, 0xa5b4, 0xa4b8,
- 0xa3bc, 0xa2c0, 0x0804, 0x1785, 0xa5c4, 0xa4c8, 0xa3cc, 0xa2d0,
- 0x0804, 0x1785, 0xa5d4, 0xa4d8, 0xa3dc, 0xa2e0, 0x0804, 0x1785,
- 0x2c05, 0x908a, 0x0034, 0x1a0c, 0x0d65, 0x9082, 0x001b, 0x0002,
- 0x1763, 0x1761, 0x1761, 0x1761, 0x1761, 0x1761, 0x176a, 0x1761,
- 0x1761, 0x1761, 0x1761, 0x1761, 0x1771, 0x1761, 0x1761, 0x1761,
- 0x1761, 0x1761, 0x1778, 0x1761, 0x1761, 0x1761, 0x1761, 0x1761,
- 0x177f, 0x080c, 0x0d65, 0xa56c, 0xa470, 0xa774, 0xa678, 0xa37c,
- 0xa280, 0x00d8, 0xa584, 0xa488, 0xa78c, 0xa690, 0xa394, 0xa298,
- 0x00a0, 0xa59c, 0xa4a0, 0xa7a4, 0xa6a8, 0xa3ac, 0xa2b0, 0x0068,
- 0xa5b4, 0xa4b8, 0xa7bc, 0xa6c0, 0xa3c4, 0xa2c8, 0x0030, 0xa5cc,
- 0xa4d0, 0xa7d4, 0xa6d8, 0xa3dc, 0xa2e0, 0xab2e, 0xaa32, 0xad1e,
- 0xac22, 0xaf26, 0xae2a, 0xa988, 0x8c60, 0x2c1d, 0xa8ac, 0xaab0,
- 0xa836, 0xaa3a, 0x8109, 0xa916, 0x1158, 0x3e60, 0x601c, 0xc085,
- 0x601e, 0xa87c, 0xc0dd, 0xa87e, 0x9006, 0x00ce, 0x012e, 0x0005,
- 0x2800, 0xa80e, 0xab0a, 0x2c00, 0xa812, 0x0c78, 0x0804, 0x169d,
- 0x0016, 0x2009, 0x00a0, 0x8109, 0xa001, 0xa001, 0xa001, 0x1dd8,
- 0x001e, 0x2ff0, 0x0126, 0x2091, 0x2200, 0x00c6, 0x3e60, 0x6014,
- 0x2048, 0x2940, 0xa80e, 0x2061, 0x1d17, 0xa813, 0x1d17, 0x2c05,
- 0xa80a, 0xa964, 0xa91a, 0xa87c, 0xd0ac, 0x090c, 0x0d65, 0x9006,
- 0xa842, 0xa83e, 0x2c05, 0x908a, 0x0034, 0x1a0c, 0x0d65, 0xadcc,
- 0xacd0, 0xafd4, 0xaed8, 0xabdc, 0xaae0, 0xab2e, 0xaa32, 0xad1e,
- 0xac22, 0xaf26, 0xae2a, 0xa8ac, 0xaab0, 0xa836, 0xaa3a, 0xa988,
- 0xa864, 0x9084, 0x00ff, 0x9086, 0x0008, 0x1120, 0x8109, 0xa916,
- 0x0128, 0x0078, 0x918a, 0x0002, 0xa916, 0x1158, 0x3e60, 0x601c,
- 0xc085, 0x601e, 0xa87c, 0xc0dd, 0xa87e, 0x9006, 0x00ce, 0x012e,
- 0x0005, 0xa804, 0x9045, 0x090c, 0x0d65, 0xa80e, 0xa064, 0xa81a,
- 0x9084, 0x000f, 0x9080, 0x1d1c, 0x2015, 0x82ff, 0x090c, 0x0d65,
- 0xaa12, 0x2205, 0xa80a, 0x0c10, 0x903e, 0x2730, 0xa880, 0xd0fc,
- 0x1190, 0x2d00, 0x0002, 0x1901, 0x1863, 0x1863, 0x1901, 0x1901,
- 0x18fb, 0x1901, 0x1863, 0x18b2, 0x18b2, 0x18b2, 0x1901, 0x1901,
- 0x1901, 0x18f8, 0x18b2, 0xc0fc, 0xa882, 0xab2c, 0xaa30, 0xad1c,
- 0xac20, 0xdd9c, 0x0904, 0x1903, 0x2c05, 0x908a, 0x0034, 0x1a0c,
- 0x0d65, 0x9082, 0x001b, 0x0002, 0x184f, 0x184d, 0x184d, 0x184d,
- 0x184d, 0x184d, 0x1853, 0x184d, 0x184d, 0x184d, 0x184d, 0x184d,
- 0x1857, 0x184d, 0x184d, 0x184d, 0x184d, 0x184d, 0x185b, 0x184d,
- 0x184d, 0x184d, 0x184d, 0x184d, 0x185f, 0x080c, 0x0d65, 0xa774,
- 0xa678, 0x0804, 0x1903, 0xa78c, 0xa690, 0x0804, 0x1903, 0xa7a4,
- 0xa6a8, 0x0804, 0x1903, 0xa7bc, 0xa6c0, 0x0804, 0x1903, 0xa7d4,
- 0xa6d8, 0x0804, 0x1903, 0x2c05, 0x908a, 0x0036, 0x1a0c, 0x0d65,
- 0x9082, 0x001b, 0x0002, 0x1886, 0x1886, 0x1888, 0x1886, 0x1886,
- 0x1886, 0x188e, 0x1886, 0x1886, 0x1886, 0x1894, 0x1886, 0x1886,
- 0x1886, 0x189a, 0x1886, 0x1886, 0x1886, 0x18a0, 0x1886, 0x1886,
- 0x1886, 0x18a6, 0x1886, 0x1886, 0x1886, 0x18ac, 0x080c, 0x0d65,
- 0xa574, 0xa478, 0xa37c, 0xa280, 0x0804, 0x1903, 0xa584, 0xa488,
- 0xa38c, 0xa290, 0x0804, 0x1903, 0xa594, 0xa498, 0xa39c, 0xa2a0,
- 0x0804, 0x1903, 0xa5a4, 0xa4a8, 0xa3ac, 0xa2b0, 0x0804, 0x1903,
- 0xa5b4, 0xa4b8, 0xa3bc, 0xa2c0, 0x0804, 0x1903, 0xa5c4, 0xa4c8,
- 0xa3cc, 0xa2d0, 0x0804, 0x1903, 0xa5d4, 0xa4d8, 0xa3dc, 0xa2e0,
- 0x0804, 0x1903, 0x2c05, 0x908a, 0x0034, 0x1a0c, 0x0d65, 0x9082,
- 0x001b, 0x0002, 0x18d5, 0x18d3, 0x18d3, 0x18d3, 0x18d3, 0x18d3,
- 0x18dc, 0x18d3, 0x18d3, 0x18d3, 0x18d3, 0x18d3, 0x18e3, 0x18d3,
- 0x18d3, 0x18d3, 0x18d3, 0x18d3, 0x18ea, 0x18d3, 0x18d3, 0x18d3,
- 0x18d3, 0x18d3, 0x18f1, 0x080c, 0x0d65, 0xa56c, 0xa470, 0xa774,
- 0xa678, 0xa37c, 0xa280, 0x0438, 0xa584, 0xa488, 0xa78c, 0xa690,
- 0xa394, 0xa298, 0x0400, 0xa59c, 0xa4a0, 0xa7a4, 0xa6a8, 0xa3ac,
- 0xa2b0, 0x00c8, 0xa5b4, 0xa4b8, 0xa7bc, 0xa6c0, 0xa3c4, 0xa2c8,
- 0x0090, 0xa5cc, 0xa4d0, 0xa7d4, 0xa6d8, 0xa3dc, 0xa2e0, 0x0058,
- 0x9d86, 0x000e, 0x1130, 0x080c, 0x1cf2, 0x1904, 0x180c, 0x900e,
- 0x0050, 0x080c, 0x0d65, 0xab2e, 0xaa32, 0xad1e, 0xac22, 0xaf26,
- 0xae2a, 0x080c, 0x1cf2, 0x0005, 0x6014, 0x2048, 0x6118, 0x810c,
- 0x810c, 0x810c, 0x81ff, 0x1118, 0xa887, 0x0001, 0x0008, 0xa986,
- 0x601b, 0x0002, 0xa874, 0x9084, 0x00ff, 0x9084, 0x0008, 0x0150,
- 0x00e9, 0x6000, 0x9086, 0x0004, 0x1120, 0x2009, 0x0048, 0x080c,
- 0x9c82, 0x0005, 0xa974, 0xd1dc, 0x1108, 0x0005, 0xa934, 0xa88c,
- 0x9106, 0x1158, 0xa938, 0xa890, 0x9106, 0x1138, 0x601c, 0xc084,
- 0x601e, 0x2009, 0x0048, 0x0804, 0x9c82, 0x0005, 0x0126, 0x00c6,
- 0x2091, 0x2200, 0x00ce, 0x7908, 0x918c, 0x0007, 0x9186, 0x0000,
- 0x05b0, 0x9186, 0x0003, 0x0598, 0x6020, 0x6023, 0x0000, 0x0006,
- 0x2031, 0x0008, 0x00c6, 0x781f, 0x0808, 0x7808, 0xd09c, 0x0120,
- 0x080c, 0x1342, 0x8631, 0x1db8, 0x00ce, 0x781f, 0x0800, 0x2031,
- 0x0168, 0x00c6, 0x7808, 0xd09c, 0x190c, 0x1342, 0x00ce, 0x2001,
- 0x0038, 0x080c, 0x1a11, 0x7930, 0x9186, 0x0040, 0x0160, 0x9186,
- 0x0042, 0x190c, 0x0d65, 0x2001, 0x001e, 0x8001, 0x1df0, 0x8631,
- 0x1d40, 0x080c, 0x1a20, 0x000e, 0x6022, 0x012e, 0x0005, 0x080c,
- 0x1a0d, 0x7827, 0x0015, 0x7828, 0x9c06, 0x1db8, 0x782b, 0x0000,
- 0x0ca0, 0x00f6, 0x2079, 0x0300, 0x7803, 0x0000, 0x78ab, 0x0004,
- 0x00fe, 0x080c, 0x70ba, 0x1188, 0x2001, 0x0138, 0x2003, 0x0000,
- 0x2001, 0x0160, 0x2003, 0x0000, 0x2011, 0x012c, 0xa001, 0xa001,
- 0x8211, 0x1de0, 0x0059, 0x0804, 0x715f, 0x0479, 0x0039, 0x2001,
- 0x0160, 0x2502, 0x2001, 0x0138, 0x2202, 0x0005, 0x00e6, 0x2071,
- 0x0200, 0x080c, 0x2864, 0x2009, 0x003c, 0x080c, 0x207b, 0x2001,
- 0x015d, 0x2003, 0x0000, 0x7000, 0x9084, 0x003c, 0x1de0, 0x080c,
- 0x8087, 0x70a0, 0x70a2, 0x7098, 0x709a, 0x709c, 0x709e, 0x2001,
- 0x020d, 0x2003, 0x0020, 0x00f6, 0x2079, 0x0300, 0x080c, 0x1302,
- 0x7803, 0x0001, 0x00fe, 0x00ee, 0x0005, 0x2001, 0x0138, 0x2014,
- 0x2003, 0x0000, 0x2001, 0x0160, 0x202c, 0x2003, 0x0000, 0x080c,
- 0x70ba, 0x1108, 0x0005, 0x2021, 0x0260, 0x2001, 0x0141, 0x201c,
- 0xd3dc, 0x1168, 0x2001, 0x0109, 0x201c, 0x939c, 0x0048, 0x1160,
- 0x2001, 0x0111, 0x201c, 0x83ff, 0x1110, 0x8421, 0x1d70, 0x2001,
- 0x015d, 0x2003, 0x0000, 0x0005, 0x0046, 0x2021, 0x0019, 0x2003,
- 0x0048, 0xa001, 0xa001, 0x201c, 0x939c, 0x0048, 0x0120, 0x8421,
- 0x1db0, 0x004e, 0x0c60, 0x004e, 0x0c40, 0x601c, 0xc084, 0x601e,
- 0x0005, 0x2c08, 0x621c, 0x080c, 0x15b8, 0x7930, 0x0005, 0x2c08,
- 0x621c, 0x080c, 0x15e5, 0x7930, 0x0005, 0x8001, 0x1df0, 0x0005,
- 0x2031, 0x0005, 0x781c, 0x9084, 0x0007, 0x0170, 0x2001, 0x0038,
- 0x0c41, 0x9186, 0x0040, 0x0904, 0x1a7e, 0x2001, 0x001e, 0x0c69,
- 0x8631, 0x1d80, 0x080c, 0x0d65, 0x781f, 0x0202, 0x2001, 0x015d,
- 0x2003, 0x0000, 0x2001, 0x0b10, 0x0c01, 0x781c, 0xd084, 0x0110,
- 0x0861, 0x04e0, 0x2001, 0x0030, 0x0891, 0x9186, 0x0040, 0x0568,
- 0x781c, 0xd084, 0x1da8, 0x781f, 0x0101, 0x2001, 0x0014, 0x0869,
- 0x2001, 0x0037, 0x0821, 0x9186, 0x0040, 0x0140, 0x2001, 0x0030,
- 0x080c, 0x1a17, 0x9186, 0x0040, 0x190c, 0x0d65, 0x00d6, 0x2069,
- 0x0200, 0x692c, 0xd1f4, 0x1170, 0xd1c4, 0x0160, 0xd19c, 0x0130,
- 0x6800, 0x9085, 0x1800, 0x6802, 0x00de, 0x0080, 0x6908, 0x9184,
- 0x0007, 0x1db0, 0x00de, 0x781f, 0x0100, 0x791c, 0x9184, 0x0007,
- 0x090c, 0x0d65, 0xa001, 0xa001, 0x781f, 0x0200, 0x0005, 0x0126,
- 0x2091, 0x2400, 0x2079, 0x0380, 0x2001, 0x19bf, 0x2070, 0x012e,
- 0x0005, 0x2cf0, 0x0126, 0x2091, 0x2400, 0x3e60, 0x6014, 0x2048,
- 0xa964, 0xa91a, 0x918c, 0x00ff, 0x9184, 0x000f, 0x0002, 0x1ab3,
- 0x1ab3, 0x1ab3, 0x1ab3, 0x1ab3, 0x1ab3, 0x1ab3, 0x1ab3, 0x1aa7,
- 0x1ab5, 0x1ab3, 0x1ab3, 0x1ab3, 0x1ab3, 0x1ab3, 0x1ab3, 0x9086,
- 0x0008, 0x1148, 0xa87c, 0xd0b4, 0x0904, 0x1c25, 0x2011, 0x1d17,
- 0x2205, 0xab88, 0x0068, 0x080c, 0x0d65, 0xa87c, 0xd0b4, 0x0904,
- 0x1c25, 0x9184, 0x000f, 0x9080, 0x1d1c, 0x2015, 0x2205, 0xab88,
- 0x2908, 0xa80a, 0xa90e, 0xaa12, 0xab16, 0x9006, 0xa842, 0xa83e,
- 0x012e, 0x0005, 0x2cf0, 0x0126, 0x2091, 0x2400, 0x3e60, 0x6014,
- 0x2048, 0xa88c, 0xa990, 0xaaac, 0xabb0, 0xaa36, 0xab3a, 0xa83e,
- 0xa942, 0xa846, 0xa94a, 0xa964, 0x918c, 0x00ff, 0x9186, 0x001e,
- 0x0198, 0x2940, 0xa064, 0xa81a, 0x90ec, 0x000f, 0x9d80, 0x1d1c,
- 0x2065, 0x2c05, 0x2808, 0x2c10, 0xab88, 0xa80a, 0xa90e, 0xaa12,
- 0xab16, 0x012e, 0x3e60, 0x0005, 0xa804, 0x2040, 0x0c58, 0x2cf0,
- 0x0126, 0x2091, 0x2400, 0x3e60, 0x6014, 0x2048, 0xa97c, 0x2950,
- 0xd1dc, 0x1904, 0x1bef, 0xc1dd, 0xa97e, 0x9006, 0xa842, 0xa83e,
- 0xa988, 0x8109, 0xa916, 0xa964, 0xa91a, 0x9184, 0x000f, 0x9088,
- 0x1d1c, 0x2145, 0x0002, 0x1b23, 0x1b31, 0x1b23, 0x1b23, 0x1b23,
- 0x1b25, 0x1b23, 0x1b23, 0x1b86, 0x1b86, 0x1b23, 0x1b23, 0x1b23,
- 0x1b84, 0x1b23, 0x1b23, 0x080c, 0x0d65, 0xa804, 0x2050, 0xb164,
- 0xa91a, 0x9184, 0x000f, 0x9080, 0x1d1c, 0x2045, 0xd19c, 0x1904,
- 0x1b86, 0x9036, 0x2638, 0x2805, 0x908a, 0x0036, 0x1a0c, 0x0d65,
- 0x9082, 0x001b, 0x0002, 0x1b56, 0x1b56, 0x1b58, 0x1b56, 0x1b56,
- 0x1b56, 0x1b5e, 0x1b56, 0x1b56, 0x1b56, 0x1b64, 0x1b56, 0x1b56,
- 0x1b56, 0x1b6a, 0x1b56, 0x1b56, 0x1b56, 0x1b70, 0x1b56, 0x1b56,
- 0x1b56, 0x1b76, 0x1b56, 0x1b56, 0x1b56, 0x1b7c, 0x080c, 0x0d65,
- 0xb574, 0xb478, 0xb37c, 0xb280, 0x0804, 0x1bcb, 0xb584, 0xb488,
- 0xb38c, 0xb290, 0x0804, 0x1bcb, 0xb594, 0xb498, 0xb39c, 0xb2a0,
- 0x0804, 0x1bcb, 0xb5a4, 0xb4a8, 0xb3ac, 0xb2b0, 0x0804, 0x1bcb,
- 0xb5b4, 0xb4b8, 0xb3bc, 0xb2c0, 0x0804, 0x1bcb, 0xb5c4, 0xb4c8,
- 0xb3cc, 0xb2d0, 0x0804, 0x1bcb, 0xb5d4, 0xb4d8, 0xb3dc, 0xb2e0,
- 0x0804, 0x1bcb, 0x0804, 0x1bcb, 0x080c, 0x0d65, 0x2805, 0x908a,
- 0x0034, 0x1a0c, 0x0d65, 0x9082, 0x001b, 0x0002, 0x1ba9, 0x1ba7,
- 0x1ba7, 0x1ba7, 0x1ba7, 0x1ba7, 0x1bb0, 0x1ba7, 0x1ba7, 0x1ba7,
- 0x1ba7, 0x1ba7, 0x1bb7, 0x1ba7, 0x1ba7, 0x1ba7, 0x1ba7, 0x1ba7,
- 0x1bbe, 0x1ba7, 0x1ba7, 0x1ba7, 0x1ba7, 0x1ba7, 0x1bc5, 0x080c,
- 0x0d65, 0xb56c, 0xb470, 0xb774, 0xb678, 0xb37c, 0xb280, 0x00d8,
- 0xb584, 0xb488, 0xb78c, 0xb690, 0xb394, 0xb298, 0x00a0, 0xb59c,
- 0xb4a0, 0xb7a4, 0xb6a8, 0xb3ac, 0xb2b0, 0x0068, 0xb5b4, 0xb4b8,
- 0xb7bc, 0xb6c0, 0xb3c4, 0xb2c8, 0x0030, 0xb5cc, 0xb4d0, 0xb7d4,
- 0xb6d8, 0xb3dc, 0xb2e0, 0xab2e, 0xaa32, 0xad1e, 0xac22, 0xaf26,
- 0xae2a, 0xa988, 0x8109, 0xa916, 0x1118, 0x9006, 0x012e, 0x0005,
- 0x8840, 0x2805, 0x9005, 0x1168, 0xb004, 0x9005, 0x090c, 0x0d65,
- 0x2050, 0xb164, 0xa91a, 0x9184, 0x000f, 0x9080, 0x1d1c, 0x2045,
- 0x2805, 0x2810, 0x2a08, 0xa80a, 0xa90e, 0xaa12, 0x0c30, 0x3e60,
- 0x6344, 0xd3fc, 0x190c, 0x0d65, 0xa93c, 0xaa40, 0xa844, 0x9106,
- 0x1118, 0xa848, 0x9206, 0x0508, 0x2958, 0xab48, 0xac44, 0x2940,
- 0x080c, 0x1d3c, 0x1998, 0x2850, 0x2c40, 0xab14, 0xa880, 0xd0fc,
- 0x1140, 0xa810, 0x2005, 0xa80a, 0x2a00, 0xa80e, 0x2009, 0x8015,
- 0x0070, 0x00c6, 0x3e60, 0x6044, 0xc0a4, 0x9085, 0x8005, 0x6046,
- 0x00ce, 0x8319, 0xab16, 0x1904, 0x1bd8, 0x2009, 0x8005, 0x3e60,
- 0x6044, 0x9105, 0x6046, 0x0804, 0x1bd5, 0x080c, 0x0d65, 0x00f6,
- 0x00e6, 0x0096, 0x00c6, 0x0026, 0x704c, 0x9c06, 0x190c, 0x0d65,
- 0x2079, 0x0090, 0x2001, 0x0105, 0x2003, 0x0010, 0x782b, 0x0004,
- 0x7057, 0x0000, 0x6014, 0x2048, 0x080c, 0xb870, 0x0118, 0xa880,
- 0xc0bd, 0xa882, 0x6020, 0x9086, 0x0006, 0x1170, 0x2061, 0x0100,
- 0x62c8, 0x2001, 0x00fa, 0x8001, 0x1df0, 0x60c8, 0x9206, 0x1dc0,
- 0x60c4, 0xa89a, 0x60c8, 0xa896, 0x704c, 0x2060, 0x00c6, 0x080c,
- 0xb45e, 0x080c, 0x98c7, 0x00ce, 0x704c, 0x9c06, 0x1150, 0x2009,
- 0x0040, 0x080c, 0x207b, 0x080c, 0x94a4, 0x2011, 0x0000, 0x080c,
- 0x932e, 0x002e, 0x00ce, 0x009e, 0x00ee, 0x00fe, 0x0005, 0x00f6,
- 0x2079, 0x0090, 0x781c, 0x0006, 0x7818, 0x0006, 0x2079, 0x0100,
- 0x7a14, 0x9284, 0x1984, 0x9085, 0x0012, 0x7816, 0x2019, 0x1000,
- 0x8319, 0x090c, 0x0d65, 0x7820, 0xd0bc, 0x1dd0, 0x79c8, 0x000e,
- 0x9102, 0x001e, 0x0006, 0x0016, 0x79c4, 0x000e, 0x9103, 0x78c6,
- 0x000e, 0x78ca, 0x9284, 0x1984, 0x9085, 0x0012, 0x7816, 0x2079,
- 0x0090, 0x782b, 0x0008, 0x7057, 0x0000, 0x00fe, 0x0005, 0x00f6,
- 0x00e6, 0x2071, 0x19bf, 0x7054, 0x9086, 0x0000, 0x0904, 0x1ced,
- 0x2079, 0x0090, 0x2009, 0x0207, 0x210c, 0xd194, 0x01b8, 0x2009,
- 0x020c, 0x210c, 0x9184, 0x0003, 0x0188, 0x080c, 0xd665, 0x2001,
- 0x0133, 0x2004, 0x9005, 0x090c, 0x0d65, 0x0016, 0x2009, 0x0040,
- 0x080c, 0x207b, 0x001e, 0x2001, 0x020c, 0x2102, 0x2009, 0x0206,
- 0x2104, 0x2009, 0x0203, 0x210c, 0x9106, 0x1120, 0x2009, 0x0040,
- 0x080c, 0x207b, 0x782c, 0xd0fc, 0x09a8, 0x080c, 0x98e3, 0x782c,
- 0xd0fc, 0x1de8, 0x080c, 0x98c7, 0x7054, 0x9086, 0x0000, 0x1950,
- 0x782b, 0x0004, 0x782c, 0xd0ac, 0x1de8, 0x2009, 0x0040, 0x080c,
- 0x207b, 0x782b, 0x0002, 0x7057, 0x0000, 0x00ee, 0x00fe, 0x0005,
- 0x080c, 0x0d65, 0x8c60, 0x2c05, 0x9005, 0x0110, 0x8a51, 0x0005,
- 0xa004, 0x9005, 0x0168, 0xa85a, 0x2040, 0xa064, 0x9084, 0x000f,
- 0x9080, 0x1d1c, 0x2065, 0x8cff, 0x090c, 0x0d65, 0x8a51, 0x0005,
- 0x2050, 0x0005, 0x0000, 0x001d, 0x0021, 0x0025, 0x0029, 0x002d,
- 0x0031, 0x0035, 0x0000, 0x001b, 0x0021, 0x0027, 0x002d, 0x0033,
- 0x0000, 0x0000, 0x0023, 0x0000, 0x0000, 0x1d0f, 0x1d0b, 0x0000,
- 0x0000, 0x1d19, 0x0000, 0x1d0f, 0x1d16, 0x1d16, 0x1d13, 0x0000,
- 0x0000, 0x0000, 0x1d19, 0x1d16, 0x0000, 0x1d11, 0x1d11, 0x0000,
- 0x0000, 0x1d19, 0x0000, 0x1d11, 0x1d17, 0x1d17, 0x1d17, 0x0000,
- 0x0000, 0x0000, 0x1d19, 0x1d17, 0x00c6, 0x00d6, 0x0086, 0xab42,
- 0xac3e, 0xa888, 0x9055, 0x0904, 0x1f1b, 0x2940, 0xa064, 0x90ec,
- 0x000f, 0x9084, 0x00ff, 0x9086, 0x0008, 0x1118, 0x2061, 0x1d17,
- 0x00d0, 0x9de0, 0x1d1c, 0x9d86, 0x0007, 0x0130, 0x9d86, 0x000e,
- 0x0118, 0x9d86, 0x000f, 0x1120, 0xa08c, 0x9422, 0xa090, 0x931b,
- 0x2c05, 0x9065, 0x1140, 0x0310, 0x0804, 0x1f1b, 0xa004, 0x9045,
- 0x0904, 0x1f1b, 0x08d8, 0x2c05, 0x9005, 0x0904, 0x1e03, 0xdd9c,
- 0x1904, 0x1dbf, 0x908a, 0x0036, 0x1a0c, 0x0d65, 0x9082, 0x001b,
- 0x0002, 0x1d94, 0x1d94, 0x1d96, 0x1d94, 0x1d94, 0x1d94, 0x1d9c,
- 0x1d94, 0x1d94, 0x1d94, 0x1da2, 0x1d94, 0x1d94, 0x1d94, 0x1da8,
- 0x1d94, 0x1d94, 0x1d94, 0x1dae, 0x1d94, 0x1d94, 0x1d94, 0x1db4,
- 0x1d94, 0x1d94, 0x1d94, 0x1dba, 0x080c, 0x0d65, 0xa07c, 0x9422,
- 0xa080, 0x931b, 0x0804, 0x1df9, 0xa08c, 0x9422, 0xa090, 0x931b,
- 0x0804, 0x1df9, 0xa09c, 0x9422, 0xa0a0, 0x931b, 0x0804, 0x1df9,
- 0xa0ac, 0x9422, 0xa0b0, 0x931b, 0x0804, 0x1df9, 0xa0bc, 0x9422,
- 0xa0c0, 0x931b, 0x0804, 0x1df9, 0xa0cc, 0x9422, 0xa0d0, 0x931b,
- 0x0804, 0x1df9, 0xa0dc, 0x9422, 0xa0e0, 0x931b, 0x04d0, 0x908a,
- 0x0034, 0x1a0c, 0x0d65, 0x9082, 0x001b, 0x0002, 0x1de1, 0x1ddf,
- 0x1ddf, 0x1ddf, 0x1ddf, 0x1ddf, 0x1de6, 0x1ddf, 0x1ddf, 0x1ddf,
- 0x1ddf, 0x1ddf, 0x1deb, 0x1ddf, 0x1ddf, 0x1ddf, 0x1ddf, 0x1ddf,
- 0x1df0, 0x1ddf, 0x1ddf, 0x1ddf, 0x1ddf, 0x1ddf, 0x1df5, 0x080c,
- 0x0d65, 0xa07c, 0x9422, 0xa080, 0x931b, 0x0098, 0xa094, 0x9422,
- 0xa098, 0x931b, 0x0070, 0xa0ac, 0x9422, 0xa0b0, 0x931b, 0x0048,
- 0xa0c4, 0x9422, 0xa0c8, 0x931b, 0x0020, 0xa0dc, 0x9422, 0xa0e0,
- 0x931b, 0x0630, 0x2300, 0x9405, 0x0160, 0x8a51, 0x0904, 0x1f1b,
- 0x8c60, 0x0804, 0x1d6b, 0xa004, 0x9045, 0x0904, 0x1f1b, 0x0804,
- 0x1d46, 0x8a51, 0x0904, 0x1f1b, 0x8c60, 0x2c05, 0x9005, 0x1158,
- 0xa004, 0x9045, 0x0904, 0x1f1b, 0xa064, 0x90ec, 0x000f, 0x9de0,
- 0x1d1c, 0x2c05, 0x2060, 0xa880, 0xc0fc, 0xa882, 0x0804, 0x1f10,
- 0x2c05, 0x8422, 0x8420, 0x831a, 0x9399, 0x0000, 0xac2e, 0xab32,
- 0xdd9c, 0x1904, 0x1ead, 0x9082, 0x001b, 0x0002, 0x1e49, 0x1e49,
- 0x1e4b, 0x1e49, 0x1e49, 0x1e49, 0x1e59, 0x1e49, 0x1e49, 0x1e49,
- 0x1e67, 0x1e49, 0x1e49, 0x1e49, 0x1e75, 0x1e49, 0x1e49, 0x1e49,
- 0x1e83, 0x1e49, 0x1e49, 0x1e49, 0x1e91, 0x1e49, 0x1e49, 0x1e49,
- 0x1e9f, 0x080c, 0x0d65, 0xa17c, 0x2400, 0x9122, 0xa180, 0x2300,
- 0x911b, 0x0a0c, 0x0d65, 0xa074, 0x9420, 0xa078, 0x9319, 0x0804,
- 0x1f0b, 0xa18c, 0x2400, 0x9122, 0xa190, 0x2300, 0x911b, 0x0a0c,
- 0x0d65, 0xa084, 0x9420, 0xa088, 0x9319, 0x0804, 0x1f0b, 0xa19c,
- 0x2400, 0x9122, 0xa1a0, 0x2300, 0x911b, 0x0a0c, 0x0d65, 0xa094,
- 0x9420, 0xa098, 0x9319, 0x0804, 0x1f0b, 0xa1ac, 0x2400, 0x9122,
- 0xa1b0, 0x2300, 0x911b, 0x0a0c, 0x0d65, 0xa0a4, 0x9420, 0xa0a8,
- 0x9319, 0x0804, 0x1f0b, 0xa1bc, 0x2400, 0x9122, 0xa1c0, 0x2300,
- 0x911b, 0x0a0c, 0x0d65, 0xa0b4, 0x9420, 0xa0b8, 0x9319, 0x0804,
- 0x1f0b, 0xa1cc, 0x2400, 0x9122, 0xa1d0, 0x2300, 0x911b, 0x0a0c,
- 0x0d65, 0xa0c4, 0x9420, 0xa0c8, 0x9319, 0x0804, 0x1f0b, 0xa1dc,
- 0x2400, 0x9122, 0xa1e0, 0x2300, 0x911b, 0x0a0c, 0x0d65, 0xa0d4,
- 0x9420, 0xa0d8, 0x9319, 0x0804, 0x1f0b, 0x9082, 0x001b, 0x0002,
- 0x1ecb, 0x1ec9, 0x1ec9, 0x1ec9, 0x1ec9, 0x1ec9, 0x1ed8, 0x1ec9,
- 0x1ec9, 0x1ec9, 0x1ec9, 0x1ec9, 0x1ee5, 0x1ec9, 0x1ec9, 0x1ec9,
- 0x1ec9, 0x1ec9, 0x1ef2, 0x1ec9, 0x1ec9, 0x1ec9, 0x1ec9, 0x1ec9,
- 0x1eff, 0x080c, 0x0d65, 0xa17c, 0x2400, 0x9122, 0xa180, 0x2300,
- 0x911b, 0x0a0c, 0x0d65, 0xa06c, 0x9420, 0xa070, 0x9319, 0x0498,
- 0xa194, 0x2400, 0x9122, 0xa198, 0x2300, 0x911b, 0x0a0c, 0x0d65,
- 0xa084, 0x9420, 0xa088, 0x9319, 0x0430, 0xa1ac, 0x2400, 0x9122,
- 0xa1b0, 0x2300, 0x911b, 0x0a0c, 0x0d65, 0xa09c, 0x9420, 0xa0a0,
- 0x9319, 0x00c8, 0xa1c4, 0x2400, 0x9122, 0xa1c8, 0x2300, 0x911b,
- 0x0a0c, 0x0d65, 0xa0b4, 0x9420, 0xa0b8, 0x9319, 0x0060, 0xa1dc,
- 0x2400, 0x9122, 0xa1e0, 0x2300, 0x911b, 0x0a0c, 0x0d65, 0xa0cc,
- 0x9420, 0xa0d0, 0x9319, 0xac1e, 0xab22, 0xa880, 0xc0fd, 0xa882,
- 0x2800, 0xa85a, 0x2c00, 0xa812, 0x2a00, 0xa816, 0x000e, 0x000e,
- 0x000e, 0x9006, 0x0028, 0x008e, 0x00de, 0x00ce, 0x9085, 0x0001,
- 0x0005, 0x00c6, 0x610c, 0x0016, 0x9026, 0x2410, 0x6004, 0x9420,
- 0x9291, 0x0000, 0x2c04, 0x9210, 0x9ce0, 0x0002, 0x918a, 0x0002,
- 0x1da8, 0x9284, 0x000f, 0x9405, 0x001e, 0x00ce, 0x0005, 0x7803,
- 0x0003, 0x780f, 0x0000, 0x6004, 0x7812, 0x2c04, 0x7816, 0x9ce0,
- 0x0002, 0x918a, 0x0002, 0x1db8, 0x0005, 0x2001, 0x0005, 0x2004,
- 0xd0bc, 0x190c, 0x0d5e, 0xd094, 0x0110, 0x080c, 0x11de, 0x0005,
- 0x0126, 0x2091, 0x2600, 0x2079, 0x0200, 0x2071, 0x0260, 0x2069,
- 0x1800, 0x7817, 0x0000, 0x789b, 0x0814, 0x78a3, 0x0406, 0x789f,
- 0x0410, 0x2009, 0x013b, 0x200b, 0x0400, 0x781b, 0x0002, 0x783b,
- 0x001f, 0x7837, 0x0020, 0x7803, 0x1600, 0x012e, 0x0005, 0x2091,
- 0x2600, 0x781c, 0xd0a4, 0x190c, 0x2078, 0x7900, 0xd1dc, 0x1118,
- 0x9084, 0x0006, 0x001a, 0x9084, 0x000e, 0x0002, 0x1f96, 0x1f8e,
- 0x7a7d, 0x1f8e, 0x1f90, 0x1f90, 0x1f90, 0x1f90, 0x7a63, 0x1f8e,
- 0x1f92, 0x1f8e, 0x1f90, 0x1f8e, 0x1f90, 0x1f8e, 0x080c, 0x0d65,
- 0x0031, 0x0020, 0x080c, 0x7a63, 0x080c, 0x7a7d, 0x0005, 0x0006,
- 0x0016, 0x0026, 0x080c, 0xd665, 0x7930, 0x9184, 0x0003, 0x0510,
- 0x080c, 0x98c7, 0x2001, 0x19d2, 0x2004, 0x9005, 0x01a0, 0x2001,
- 0x0133, 0x2004, 0x9005, 0x090c, 0x0d65, 0x00c6, 0x2001, 0x19d2,
- 0x2064, 0x080c, 0x98e3, 0x080c, 0xb45e, 0x2009, 0x0040, 0x080c,
- 0x207b, 0x00ce, 0x0408, 0x2009, 0x0040, 0x080c, 0x207b, 0x080c,
- 0x98e3, 0x00d0, 0x9184, 0x0014, 0x01a0, 0x6a00, 0x9286, 0x0003,
- 0x0160, 0x080c, 0x70ba, 0x1138, 0x080c, 0x73b9, 0x080c, 0x5cf7,
- 0x080c, 0x6feb, 0x0010, 0x080c, 0x5bb2, 0x080c, 0x7b1b, 0x0041,
- 0x0018, 0x9184, 0x9540, 0x1dc8, 0x002e, 0x001e, 0x000e, 0x0005,
- 0x00e6, 0x0036, 0x0046, 0x0056, 0x2071, 0x1a43, 0x080c, 0x1989,
- 0x005e, 0x004e, 0x003e, 0x00ee, 0x0005, 0x0126, 0x2091, 0x2e00,
- 0x2071, 0x1800, 0x7128, 0x2001, 0x1947, 0x2102, 0x2001, 0x194f,
- 0x2102, 0x2001, 0x013b, 0x2102, 0x2079, 0x0200, 0x2001, 0x0201,
- 0x789e, 0x78a3, 0x0200, 0x9198, 0x0007, 0x831c, 0x831c, 0x831c,
- 0x9398, 0x0005, 0x2320, 0x9182, 0x0204, 0x1230, 0x2011, 0x0008,
- 0x8423, 0x8423, 0x8423, 0x0488, 0x9182, 0x024c, 0x1240, 0x2011,
- 0x0007, 0x8403, 0x8003, 0x9400, 0x9400, 0x9420, 0x0430, 0x9182,
- 0x02bc, 0x1238, 0x2011, 0x0006, 0x8403, 0x8003, 0x9400, 0x9420,
- 0x00e0, 0x9182, 0x034c, 0x1230, 0x2011, 0x0005, 0x8403, 0x8003,
- 0x9420, 0x0098, 0x9182, 0x042c, 0x1228, 0x2011, 0x0004, 0x8423,
- 0x8423, 0x0058, 0x9182, 0x059c, 0x1228, 0x2011, 0x0003, 0x8403,
- 0x9420, 0x0018, 0x2011, 0x0002, 0x8423, 0x9482, 0x0228, 0x8002,
- 0x8020, 0x8301, 0x9402, 0x0110, 0x0208, 0x8321, 0x8217, 0x8203,
- 0x9405, 0x789a, 0x012e, 0x0005, 0x0006, 0x00d6, 0x2069, 0x0200,
- 0x6814, 0x9084, 0xffc0, 0x910d, 0x6916, 0x00de, 0x000e, 0x0005,
- 0x00d6, 0x2069, 0x0200, 0x9005, 0x6810, 0x0110, 0xc0a5, 0x0008,
- 0xc0a4, 0x6812, 0x00de, 0x0005, 0x0006, 0x00d6, 0x2069, 0x0200,
- 0x6810, 0x9084, 0xfff8, 0x910d, 0x6912, 0x00de, 0x000e, 0x0005,
- 0x7938, 0x080c, 0x0d5e, 0x00f6, 0x2079, 0x0200, 0x7902, 0xa001,
- 0xa001, 0xa001, 0xa001, 0xa001, 0xa001, 0x7902, 0xa001, 0xa001,
- 0xa001, 0xa001, 0xa001, 0xa001, 0x00fe, 0x0005, 0x0126, 0x2091,
- 0x2800, 0x2061, 0x0100, 0x2071, 0x1800, 0x2009, 0x0000, 0x080c,
- 0x285e, 0x080c, 0x2774, 0x2001, 0x1975, 0x2003, 0x0700, 0x2001,
- 0x1976, 0x2003, 0x0700, 0x080c, 0x28cf, 0x9006, 0x080c, 0x27a3,
- 0x9006, 0x080c, 0x2786, 0x20a9, 0x0012, 0x1d04, 0x20ad, 0x2091,
- 0x6000, 0x1f04, 0x20ad, 0x602f, 0x0100, 0x602f, 0x0000, 0x6050,
- 0x9085, 0x0400, 0x9084, 0xdfff, 0x6052, 0x6224, 0x080c, 0x28ac,
- 0x080c, 0x2492, 0x2009, 0x00ef, 0x6132, 0x6136, 0x080c, 0x24a2,
- 0x60e7, 0x0000, 0x61ea, 0x60e3, 0x0002, 0x604b, 0xf7f7, 0x6043,
- 0x0000, 0x602f, 0x0080, 0x602f, 0x0000, 0x6007, 0x149f, 0x00c6,
- 0x2061, 0x0140, 0x608b, 0x000b, 0x608f, 0x10b8, 0x6093, 0x0000,
- 0x6097, 0x0198, 0x00ce, 0x6004, 0x9085, 0x8000, 0x6006, 0x60bb,
- 0x0000, 0x20a9, 0x0018, 0x60bf, 0x0000, 0x1f04, 0x20eb, 0x60bb,
- 0x0000, 0x60bf, 0x0108, 0x60bf, 0x0012, 0x60bf, 0x0320, 0x60bf,
- 0x0018, 0x601b, 0x00f0, 0x601f, 0x001e, 0x600f, 0x006b, 0x602b,
- 0x402c, 0x012e, 0x0005, 0x00f6, 0x2079, 0x0140, 0x78c3, 0x0080,
- 0x78c3, 0x0083, 0x78c3, 0x0000, 0x00fe, 0x0005, 0x2001, 0x1834,
- 0x2003, 0x0000, 0x2001, 0x1833, 0x2003, 0x0001, 0x0005, 0x0126,
- 0x2091, 0x2800, 0x0006, 0x0016, 0x0026, 0x6124, 0x6028, 0x910c,
- 0x9184, 0x5e2c, 0x1118, 0x9184, 0x0007, 0x002a, 0x9195, 0x0004,
- 0x9284, 0x0007, 0x0002, 0x2136, 0x2133, 0x2133, 0x2133, 0x2135,
- 0x2133, 0x2133, 0x2133, 0x080c, 0x0d65, 0x0029, 0x002e, 0x001e,
- 0x000e, 0x012e, 0x0005, 0x00a6, 0x6124, 0x6028, 0xd09c, 0x0118,
- 0xd19c, 0x1904, 0x2395, 0xd1f4, 0x190c, 0x0d5e, 0x080c, 0x70ba,
- 0x0904, 0x2193, 0x080c, 0xbf8f, 0x1120, 0x7000, 0x9086, 0x0003,
- 0x0580, 0x6024, 0x9084, 0x1800, 0x0560, 0x080c, 0x70dd, 0x0118,
- 0x080c, 0x70cb, 0x1530, 0x2011, 0x0020, 0x080c, 0x28ac, 0x6043,
- 0x0000, 0x080c, 0xbf8f, 0x0168, 0x080c, 0x70dd, 0x1150, 0x2001,
- 0x197f, 0x2003, 0x0001, 0x6027, 0x1800, 0x080c, 0x6f30, 0x0804,
- 0x2398, 0x70a0, 0x9005, 0x1150, 0x70a3, 0x0001, 0x00d6, 0x2069,
- 0x0140, 0x080c, 0x7111, 0x00de, 0x1904, 0x2398, 0x080c, 0x73c3,
- 0x0428, 0x080c, 0x70dd, 0x1590, 0x6024, 0x9084, 0x1800, 0x1108,
- 0x0468, 0x080c, 0x73c3, 0x080c, 0x73b9, 0x080c, 0x5cf7, 0x080c,
- 0x6feb, 0x0804, 0x2395, 0xd1ac, 0x1508, 0x6024, 0xd0dc, 0x1170,
- 0xd0e4, 0x1178, 0xd0d4, 0x1190, 0xd0cc, 0x0130, 0x7094, 0x9086,
- 0x0028, 0x1110, 0x080c, 0x729c, 0x0804, 0x2395, 0x080c, 0x73be,
- 0x0048, 0x2001, 0x1955, 0x2003, 0x0002, 0x0020, 0x080c, 0x71fa,
- 0x0804, 0x2395, 0x080c, 0x733e, 0x0804, 0x2395, 0xd1ac, 0x0904,
- 0x22af, 0x080c, 0x70ba, 0x11d0, 0x2011, 0x0020, 0x080c, 0x28ac,
- 0x0006, 0x0026, 0x0036, 0x080c, 0x70d4, 0x1158, 0x080c, 0x73b9,
- 0x080c, 0x5cf7, 0x080c, 0x6feb, 0x003e, 0x002e, 0x000e, 0x00ae,
- 0x0005, 0x003e, 0x002e, 0x000e, 0x080c, 0x708e, 0x0016, 0x0046,
- 0x00c6, 0x644c, 0x9486, 0xf0f0, 0x1138, 0x2061, 0x0100, 0x644a,
- 0x6043, 0x0090, 0x6043, 0x0010, 0x74d6, 0x948c, 0xff00, 0x7038,
- 0xd084, 0x0178, 0x9186, 0xf800, 0x1160, 0x7044, 0xd084, 0x1148,
- 0xc085, 0x7046, 0x0036, 0x2418, 0x2011, 0x8016, 0x080c, 0x48fa,
- 0x003e, 0x080c, 0xbf88, 0x1904, 0x2286, 0x9196, 0xff00, 0x05a8,
- 0x705c, 0x9084, 0x00ff, 0x810f, 0x81ff, 0x0110, 0x9116, 0x0568,
- 0x7130, 0xd184, 0x1550, 0x080c, 0x319a, 0x0128, 0xc18d, 0x7132,
- 0x080c, 0x6682, 0x1510, 0x6240, 0x9294, 0x0010, 0x0130, 0x6248,
- 0x9294, 0xff00, 0x9296, 0xff00, 0x01c0, 0x7030, 0xd08c, 0x0904,
- 0x2286, 0x7038, 0xd08c, 0x1140, 0x2001, 0x180c, 0x200c, 0xd1ac,
- 0x1904, 0x2286, 0xc1ad, 0x2102, 0x0036, 0x73d4, 0x2011, 0x8013,
- 0x080c, 0x48fa, 0x003e, 0x0804, 0x2286, 0x7038, 0xd08c, 0x1140,
- 0x2001, 0x180c, 0x200c, 0xd1ac, 0x1904, 0x2286, 0xc1ad, 0x2102,
- 0x0036, 0x73d4, 0x2011, 0x8013, 0x080c, 0x48fa, 0x003e, 0x7130,
- 0xc185, 0x7132, 0x2011, 0x185c, 0x220c, 0x00f0, 0x0016, 0x2009,
- 0x0001, 0x2011, 0x0100, 0x080c, 0x8401, 0x2019, 0x000e, 0x00c6,
- 0x2061, 0x0000, 0x080c, 0xd234, 0x00ce, 0x9484, 0x00ff, 0x9080,
- 0x319f, 0x200d, 0x918c, 0xff00, 0x810f, 0x2120, 0x9006, 0x2009,
- 0x000e, 0x080c, 0xd2bc, 0x001e, 0xd1ac, 0x1148, 0x0016, 0x2009,
- 0x0002, 0x2019, 0x0004, 0x080c, 0x2ff3, 0x001e, 0x0078, 0x0156,
- 0x00b6, 0x20a9, 0x007f, 0x900e, 0x080c, 0x628f, 0x1110, 0x080c,
- 0x5d11, 0x8108, 0x1f04, 0x227c, 0x00be, 0x015e, 0x00ce, 0x004e,
- 0x080c, 0x98c7, 0x080c, 0x9b6c, 0x080c, 0x98e3, 0x60e3, 0x0000,
- 0x001e, 0x2001, 0x1800, 0x2014, 0x9296, 0x0004, 0x1170, 0xd19c,
- 0x11b0, 0x2011, 0x180c, 0x2214, 0xd29c, 0x1120, 0x6204, 0x9295,
- 0x0002, 0x6206, 0x6228, 0xc29d, 0x622a, 0x2003, 0x0001, 0x2001,
- 0x1825, 0x2003, 0x0000, 0x2011, 0x0020, 0x080c, 0x28ac, 0xd194,
- 0x0904, 0x2395, 0x0016, 0x080c, 0x98c7, 0x6220, 0xd2b4, 0x0904,
- 0x233d, 0x080c, 0x821e, 0x080c, 0x8fd0, 0x2011, 0x0004, 0x080c,
- 0x28ac, 0x00f6, 0x2019, 0x19cb, 0x2304, 0x907d, 0x0904, 0x230a,
- 0x7804, 0x9086, 0x0032, 0x15f0, 0x00d6, 0x00c6, 0x00e6, 0x0096,
- 0x2069, 0x0140, 0x782c, 0x685e, 0x7808, 0x685a, 0x6043, 0x0002,
- 0x2001, 0x0003, 0x8001, 0x1df0, 0x6043, 0x0000, 0x2001, 0x003c,
- 0x8001, 0x1df0, 0x080c, 0x2882, 0x2001, 0x001e, 0x8001, 0x0240,
- 0x20a9, 0x0009, 0x080c, 0x2839, 0x6904, 0xd1dc, 0x1140, 0x0cb0,
- 0x2001, 0x0100, 0x080c, 0x2872, 0x9006, 0x080c, 0x2872, 0x080c,
- 0x8891, 0x080c, 0x98e3, 0x7814, 0x2048, 0xa867, 0x0103, 0x2f60,
- 0x080c, 0x9be6, 0x009e, 0x00ee, 0x00ce, 0x00de, 0x00fe, 0x001e,
- 0x00ae, 0x0005, 0x00fe, 0x00d6, 0x2069, 0x0140, 0x6804, 0x9084,
- 0x4000, 0x0110, 0x080c, 0x2882, 0x00de, 0x00c6, 0x2061, 0x19bf,
- 0x6034, 0x080c, 0xbf8f, 0x0120, 0x909a, 0x0003, 0x1258, 0x0018,
- 0x909a, 0x00c8, 0x1238, 0x8000, 0x6036, 0x00ce, 0x080c, 0x8fa8,
- 0x0804, 0x2392, 0x2061, 0x0100, 0x62c0, 0x080c, 0x97f8, 0x2019,
- 0x19cb, 0x2304, 0x9065, 0x0130, 0x6003, 0x0001, 0x2009, 0x0027,
- 0x080c, 0x9c82, 0x00ce, 0x0804, 0x2392, 0xd2bc, 0x05e0, 0x080c,
- 0x822b, 0x2011, 0x0004, 0x080c, 0x28ac, 0x00d6, 0x2069, 0x0140,
- 0x6804, 0x9084, 0x4000, 0x0110, 0x080c, 0x2882, 0x00de, 0x00c6,
- 0x2061, 0x19bf, 0x6050, 0x080c, 0xbf8f, 0x0120, 0x909a, 0x0003,
- 0x1638, 0x0018, 0x909a, 0x00c8, 0x1618, 0x8000, 0x6052, 0x604c,
- 0x00ce, 0x9005, 0x0578, 0x2009, 0x07d0, 0x080c, 0x8223, 0x9080,
- 0x0008, 0x2004, 0x9086, 0x0006, 0x1138, 0x2009, 0x1984, 0x2011,
- 0x0012, 0x080c, 0x28bb, 0x00f0, 0x2009, 0x1984, 0x2011, 0x0016,
- 0x080c, 0x28bb, 0x00b8, 0x2011, 0x0004, 0x080c, 0x28ac, 0x0090,
- 0x0036, 0x2019, 0x0001, 0x080c, 0x929d, 0x003e, 0x2019, 0x19d2,
- 0x2304, 0x9065, 0x0130, 0x2009, 0x004f, 0x6003, 0x0003, 0x080c,
- 0x9c82, 0x00ce, 0x080c, 0x98e3, 0x001e, 0xd19c, 0x0904, 0x23f7,
- 0x7038, 0xd0ac, 0x1558, 0x0016, 0x0156, 0x2011, 0x0008, 0x080c,
- 0x28ac, 0x080c, 0x28cf, 0x080c, 0x2902, 0x6050, 0xc0e5, 0x6052,
- 0x20a9, 0x0367, 0x1f04, 0x23c4, 0x1d04, 0x23ac, 0x080c, 0x8252,
- 0x6020, 0xd09c, 0x1db8, 0x00f6, 0x2079, 0x0100, 0x080c, 0x27e5,
- 0x00fe, 0x1d80, 0x6050, 0xc0e4, 0x6052, 0x2011, 0x0008, 0x080c,
- 0x28ac, 0x015e, 0x001e, 0x0498, 0x015e, 0x001e, 0x0016, 0x6028,
- 0xc09c, 0x602a, 0x080c, 0x98c7, 0x080c, 0x9b6c, 0x080c, 0x98e3,
- 0x60e3, 0x0000, 0x080c, 0xd644, 0x080c, 0xd65f, 0x080c, 0x53ac,
- 0xd0fc, 0x1138, 0x080c, 0xbf88, 0x1120, 0x9085, 0x0001, 0x080c,
- 0x7101, 0x9006, 0x080c, 0x2872, 0x2009, 0x0002, 0x080c, 0x285e,
- 0x00e6, 0x2071, 0x1800, 0x7003, 0x0004, 0x080c, 0x0ea9, 0x00ee,
- 0x2011, 0x0008, 0x080c, 0x28ac, 0x080c, 0x0bab, 0x001e, 0x918c,
- 0xffd0, 0x2110, 0x080c, 0x28ac, 0x00ae, 0x0005, 0x0006, 0x0016,
- 0x0026, 0x0036, 0x00e6, 0x00f6, 0x0126, 0x2091, 0x8000, 0x2071,
- 0x1800, 0x71cc, 0x70ce, 0x9116, 0x0904, 0x2451, 0x81ff, 0x01a0,
- 0x2009, 0x0000, 0x080c, 0x285e, 0x2011, 0x8011, 0x2019, 0x010e,
- 0x231c, 0x939e, 0x0007, 0x1118, 0x2019, 0x0001, 0x0010, 0x2019,
- 0x0000, 0x080c, 0x48fa, 0x0468, 0x2001, 0x1980, 0x200c, 0x81ff,
- 0x1140, 0x2001, 0x0109, 0x2004, 0xd0b4, 0x0118, 0x2019, 0x0003,
- 0x0008, 0x2118, 0x2011, 0x8012, 0x080c, 0x48fa, 0x080c, 0x0ea9,
- 0x080c, 0x53ac, 0xd0fc, 0x11a8, 0x080c, 0xbf88, 0x1190, 0x00c6,
- 0x080c, 0x24ed, 0x080c, 0x98c7, 0x080c, 0x91f8, 0x080c, 0x98e3,
- 0x2061, 0x0100, 0x2019, 0x0028, 0x2009, 0x0002, 0x080c, 0x2ff3,
- 0x00ce, 0x012e, 0x00fe, 0x00ee, 0x003e, 0x002e, 0x001e, 0x000e,
- 0x0005, 0x2028, 0x918c, 0x00ff, 0x2130, 0x9094, 0xff00, 0x11f0,
- 0x2011, 0x1836, 0x2214, 0xd2ac, 0x11c8, 0x81ff, 0x01e8, 0x2011,
- 0x181e, 0x2204, 0x9106, 0x1190, 0x2011, 0x181f, 0x2214, 0x9294,
- 0xff00, 0x9584, 0xff00, 0x9206, 0x1148, 0x2011, 0x181f, 0x2214,
- 0x9294, 0x00ff, 0x9584, 0x00ff, 0x9206, 0x1120, 0x2500, 0x080c,
- 0x7d73, 0x0048, 0x9584, 0x00ff, 0x9080, 0x319f, 0x200d, 0x918c,
- 0xff00, 0x810f, 0x9006, 0x0005, 0x9080, 0x319f, 0x200d, 0x918c,
- 0x00ff, 0x0005, 0x00d6, 0x2069, 0x0140, 0x2001, 0x1817, 0x2003,
- 0x00ef, 0x20a9, 0x0010, 0x9006, 0x6852, 0x6856, 0x1f04, 0x249d,
- 0x00de, 0x0005, 0x0006, 0x00d6, 0x0026, 0x2069, 0x0140, 0x2001,
- 0x1817, 0x2102, 0x8114, 0x8214, 0x8214, 0x8214, 0x20a9, 0x0010,
- 0x6853, 0x0000, 0x9006, 0x82ff, 0x1128, 0x9184, 0x000f, 0x9080,
- 0xd673, 0x2005, 0x6856, 0x8211, 0x1f04, 0x24b2, 0x002e, 0x00de,
- 0x000e, 0x0005, 0x00c6, 0x2061, 0x1800, 0x6030, 0x0110, 0xc09d,
- 0x0008, 0xc09c, 0x6032, 0x00ce, 0x0005, 0x0156, 0x00d6, 0x0026,
- 0x0016, 0x0006, 0x2069, 0x0140, 0x6980, 0x9116, 0x0180, 0x9112,
- 0x1230, 0x8212, 0x8210, 0x22a8, 0x2001, 0x0402, 0x0018, 0x22a8,
- 0x2001, 0x0404, 0x680e, 0x1f04, 0x24e2, 0x680f, 0x0000, 0x000e,
- 0x001e, 0x002e, 0x00de, 0x015e, 0x0005, 0x080c, 0x53a8, 0xd0c4,
- 0x0150, 0xd0a4, 0x0140, 0x9006, 0x0046, 0x2020, 0x2009, 0x002e,
- 0x080c, 0xd2bc, 0x004e, 0x0005, 0x00f6, 0x0016, 0x0026, 0x2079,
- 0x0140, 0x78c4, 0xd0dc, 0x0904, 0x2559, 0x080c, 0x27d5, 0x0660,
- 0x9084, 0x0700, 0x908e, 0x0600, 0x1120, 0x2011, 0x4000, 0x900e,
- 0x0458, 0x908e, 0x0500, 0x1120, 0x2011, 0x8000, 0x900e, 0x0420,
- 0x908e, 0x0400, 0x1120, 0x9016, 0x2009, 0x0001, 0x00e8, 0x908e,
- 0x0300, 0x1120, 0x9016, 0x2009, 0x0002, 0x00b0, 0x908e, 0x0200,
- 0x1120, 0x9016, 0x2009, 0x0004, 0x0078, 0x908e, 0x0100, 0x1548,
- 0x9016, 0x2009, 0x0008, 0x0040, 0x9084, 0x0700, 0x908e, 0x0300,
- 0x1500, 0x2011, 0x0030, 0x0058, 0x2300, 0x9080, 0x0020, 0x2018,
- 0x080c, 0x842f, 0x928c, 0xff00, 0x0110, 0x2011, 0x00ff, 0x2200,
- 0x8007, 0x9085, 0x004c, 0x78c2, 0x2009, 0x0138, 0x220a, 0x080c,
- 0x70ba, 0x1118, 0x2009, 0x1945, 0x220a, 0x002e, 0x001e, 0x00fe,
- 0x0005, 0x78c3, 0x0000, 0x0cc8, 0x0126, 0x2091, 0x2800, 0x0006,
- 0x0016, 0x0026, 0x2001, 0x0170, 0x200c, 0x8000, 0x2014, 0x9184,
- 0x0003, 0x0110, 0x080c, 0x0d5e, 0x002e, 0x001e, 0x000e, 0x012e,
- 0x0005, 0x2001, 0x0171, 0x2004, 0xd0dc, 0x0168, 0x2001, 0x0170,
- 0x200c, 0x918c, 0x00ff, 0x918e, 0x004c, 0x1128, 0x200c, 0x918c,
- 0xff00, 0x810f, 0x0005, 0x900e, 0x2001, 0x0227, 0x2004, 0x8007,
- 0x9084, 0x00ff, 0x8004, 0x9108, 0x2001, 0x0226, 0x2004, 0x8007,
- 0x9084, 0x00ff, 0x8004, 0x9108, 0x0005, 0x0018, 0x000c, 0x0018,
- 0x0020, 0x1000, 0x0800, 0x1000, 0x1800, 0x0156, 0x0006, 0x0016,
- 0x0026, 0x00e6, 0x2001, 0x1968, 0x2004, 0x908a, 0x0007, 0x1a0c,
- 0x0d65, 0x0033, 0x00ee, 0x002e, 0x001e, 0x000e, 0x015e, 0x0005,
- 0x25b7, 0x25d5, 0x25f9, 0x25fb, 0x2624, 0x2626, 0x2628, 0x2001,
- 0x0001, 0x080c, 0x23fe, 0x080c, 0x2823, 0x2001, 0x196a, 0x2003,
- 0x0000, 0x7828, 0x9084, 0xe1d7, 0x782a, 0x9006, 0x20a9, 0x0009,
- 0x080c, 0x27f1, 0x2001, 0x1968, 0x2003, 0x0006, 0x2009, 0x001e,
- 0x2011, 0x2629, 0x080c, 0x8230, 0x0005, 0x2009, 0x196d, 0x200b,
- 0x0000, 0x2001, 0x1972, 0x2003, 0x0036, 0x2001, 0x1971, 0x2003,
- 0x002a, 0x2001, 0x196a, 0x2003, 0x0001, 0x9006, 0x080c, 0x2786,
- 0x2001, 0xffff, 0x20a9, 0x0009, 0x080c, 0x27f1, 0x2001, 0x1968,
- 0x2003, 0x0006, 0x2009, 0x001e, 0x2011, 0x2629, 0x080c, 0x8230,
- 0x0005, 0x080c, 0x0d65, 0x2001, 0x1972, 0x2003, 0x0036, 0x2001,
- 0x196a, 0x2003, 0x0003, 0x7a38, 0x9294, 0x0005, 0x9296, 0x0004,
- 0x0110, 0x9006, 0x0010, 0x2001, 0x0001, 0x080c, 0x2786, 0x2001,
- 0x196e, 0x2003, 0x0000, 0x2001, 0xffff, 0x20a9, 0x0009, 0x080c,
- 0x27f1, 0x2001, 0x1968, 0x2003, 0x0006, 0x2009, 0x001e, 0x2011,
- 0x2629, 0x080c, 0x8230, 0x0005, 0x080c, 0x0d65, 0x080c, 0x0d65,
- 0x0005, 0x0006, 0x0016, 0x0026, 0x00e6, 0x00f6, 0x0156, 0x0126,
- 0x2091, 0x8000, 0x2079, 0x0100, 0x2001, 0x196a, 0x2004, 0x908a,
- 0x0007, 0x1a0c, 0x0d65, 0x0043, 0x012e, 0x015e, 0x00fe, 0x00ee,
- 0x002e, 0x001e, 0x000e, 0x0005, 0x264b, 0x266b, 0x26ab, 0x26db,
- 0x26ff, 0x270f, 0x2711, 0x080c, 0x27e5, 0x11b0, 0x7850, 0x9084,
- 0xefff, 0x7852, 0x2009, 0x1970, 0x2104, 0x7a38, 0x9294, 0x0005,
- 0x9296, 0x0004, 0x0110, 0xc08d, 0x0008, 0xc085, 0x200a, 0x2001,
- 0x1968, 0x2003, 0x0001, 0x0030, 0x080c, 0x2735, 0x2001, 0xffff,
- 0x080c, 0x25c6, 0x0005, 0x080c, 0x2713, 0x05e0, 0x2009, 0x1971,
- 0x2104, 0x8001, 0x200a, 0x080c, 0x27e5, 0x1178, 0x7850, 0x9084,
- 0xefff, 0x7852, 0x7a38, 0x9294, 0x0005, 0x9296, 0x0005, 0x0518,
- 0x2009, 0x1970, 0x2104, 0xc085, 0x200a, 0x2009, 0x196d, 0x2104,
- 0x8000, 0x200a, 0x9086, 0x0005, 0x0118, 0x080c, 0x271b, 0x00c0,
- 0x200b, 0x0000, 0x7a38, 0x9294, 0x0006, 0x9296, 0x0004, 0x0110,
- 0x9006, 0x0010, 0x2001, 0x0001, 0x080c, 0x27a3, 0x2001, 0x196a,
- 0x2003, 0x0002, 0x0028, 0x2001, 0x1968, 0x2003, 0x0003, 0x0010,
- 0x080c, 0x25e8, 0x0005, 0x080c, 0x2713, 0x0560, 0x2009, 0x1971,
- 0x2104, 0x8001, 0x200a, 0x080c, 0x27e5, 0x1168, 0x7850, 0x9084,
- 0xefff, 0x7852, 0x2001, 0x1968, 0x2003, 0x0003, 0x2001, 0x1969,
- 0x2003, 0x0000, 0x00b8, 0x2009, 0x1971, 0x2104, 0x9005, 0x1118,
- 0x080c, 0x2758, 0x0010, 0x080c, 0x2728, 0x080c, 0x271b, 0x2009,
- 0x196d, 0x200b, 0x0000, 0x2001, 0x196a, 0x2003, 0x0001, 0x080c,
- 0x25e8, 0x0000, 0x0005, 0x04b9, 0x0508, 0x080c, 0x27e5, 0x11b8,
- 0x7850, 0x9084, 0xefff, 0x7852, 0x2009, 0x196e, 0x2104, 0x8000,
- 0x200a, 0x9086, 0x0007, 0x0108, 0x0078, 0x2001, 0x1973, 0x2003,
- 0x000a, 0x2009, 0x1970, 0x2104, 0xc0fd, 0x200a, 0x0038, 0x0419,
- 0x2001, 0x196a, 0x2003, 0x0004, 0x080c, 0x2613, 0x0005, 0x0099,
- 0x0168, 0x080c, 0x27e5, 0x1138, 0x7850, 0x9084, 0xefff, 0x7852,
- 0x080c, 0x25ff, 0x0018, 0x0079, 0x080c, 0x2613, 0x0005, 0x080c,
- 0x0d65, 0x080c, 0x0d65, 0x2009, 0x1972, 0x2104, 0x8001, 0x200a,
- 0x090c, 0x2774, 0x0005, 0x7a38, 0x9294, 0x0005, 0x9296, 0x0005,
- 0x0110, 0x9006, 0x0010, 0x2001, 0x0001, 0x080c, 0x27a3, 0x0005,
- 0x7a38, 0x9294, 0x0006, 0x9296, 0x0006, 0x0110, 0x9006, 0x0010,
- 0x2001, 0x0001, 0x080c, 0x2786, 0x0005, 0x2009, 0x196d, 0x2104,
- 0x8000, 0x200a, 0x9086, 0x0005, 0x0108, 0x0068, 0x200b, 0x0000,
- 0x7a38, 0x9294, 0x0006, 0x9296, 0x0006, 0x0110, 0x9006, 0x0010,
- 0x2001, 0x0001, 0x04d9, 0x7a38, 0x9294, 0x0005, 0x9296, 0x0005,
- 0x0110, 0x9006, 0x0010, 0x2001, 0x0001, 0x080c, 0x27a3, 0x0005,
- 0x0086, 0x2001, 0x1970, 0x2004, 0x9084, 0x7fff, 0x090c, 0x0d65,
- 0x2009, 0x196f, 0x2144, 0x8846, 0x280a, 0x9844, 0x0dd8, 0xd08c,
- 0x1120, 0xd084, 0x1120, 0x080c, 0x0d65, 0x9006, 0x0010, 0x2001,
- 0x0001, 0x00a1, 0x008e, 0x0005, 0x0006, 0x0156, 0x2001, 0x1968,
- 0x20a9, 0x0009, 0x2003, 0x0000, 0x8000, 0x1f04, 0x277a, 0x2001,
- 0x196f, 0x2003, 0x8000, 0x015e, 0x000e, 0x0005, 0x00f6, 0x2079,
- 0x0100, 0x9085, 0x0000, 0x0158, 0x7838, 0x9084, 0xfff9, 0x9085,
- 0x0004, 0x783a, 0x2009, 0x1975, 0x210c, 0x795a, 0x0050, 0x7838,
- 0x9084, 0xfffb, 0x9085, 0x0006, 0x783a, 0x2009, 0x1976, 0x210c,
- 0x795a, 0x00fe, 0x0005, 0x00f6, 0x2079, 0x0100, 0x9085, 0x0000,
- 0x0158, 0x7838, 0x9084, 0xfffa, 0x9085, 0x0004, 0x783a, 0x7850,
- 0x9084, 0xfff0, 0x7852, 0x00f8, 0x7838, 0x9084, 0xfffb, 0x9085,
- 0x0005, 0x783a, 0x7850, 0x9084, 0xfff0, 0x0016, 0x2009, 0x017f,
- 0x210c, 0x918e, 0x0005, 0x0140, 0x2009, 0x0003, 0x210c, 0x918c,
- 0x0600, 0x918e, 0x0400, 0x0118, 0x9085, 0x000a, 0x0010, 0x9085,
- 0x0000, 0x001e, 0x7852, 0x00fe, 0x0005, 0x0006, 0x2001, 0x0100,
- 0x2004, 0x9082, 0x0007, 0x000e, 0x0005, 0x0006, 0x2001, 0x0100,
- 0x2004, 0x9082, 0x0009, 0x000e, 0x0005, 0x0156, 0x20a9, 0x0064,
- 0x7820, 0x080c, 0x2858, 0xd09c, 0x1110, 0x1f04, 0x27e8, 0x015e,
- 0x0005, 0x0126, 0x0016, 0x0006, 0x2091, 0x8000, 0x080c, 0x28cf,
- 0x080c, 0x2902, 0x000e, 0x2008, 0x9186, 0x0000, 0x1118, 0x783b,
- 0x0007, 0x0090, 0x9186, 0x0001, 0x1118, 0x783b, 0x0006, 0x0060,
- 0x9186, 0x0002, 0x1118, 0x783b, 0x0005, 0x0030, 0x9186, 0x0003,
- 0x1118, 0x783b, 0x0004, 0x0000, 0x0006, 0x1d04, 0x2815, 0x080c,
- 0x8252, 0x1f04, 0x2815, 0x7850, 0x9085, 0x1000, 0x7852, 0x000e,
- 0x001e, 0x012e, 0x0005, 0x080c, 0x2902, 0x0005, 0x0006, 0x0156,
- 0x00f6, 0x2079, 0x0100, 0x20a9, 0x000a, 0x7854, 0xd0ac, 0x1100,
- 0x7854, 0xd08c, 0x1110, 0x1f04, 0x2830, 0x00fe, 0x015e, 0x000e,
- 0x0005, 0x1d04, 0x2839, 0x080c, 0x8252, 0x1f04, 0x2839, 0x0005,
- 0x0006, 0x2001, 0x1974, 0x2004, 0x9086, 0x0000, 0x000e, 0x0005,
- 0x0006, 0x2001, 0x1974, 0x2004, 0x9086, 0x0001, 0x000e, 0x0005,
- 0x0006, 0x2001, 0x1974, 0x2004, 0x9086, 0x0002, 0x000e, 0x0005,
- 0xa001, 0xa001, 0xa001, 0xa001, 0xa001, 0x0005, 0x0006, 0x2001,
- 0x1980, 0x2102, 0x000e, 0x0005, 0x2009, 0x0171, 0x2104, 0xd0dc,
- 0x0140, 0x2009, 0x0170, 0x2104, 0x200b, 0x0080, 0xa001, 0xa001,
- 0x200a, 0x0005, 0x0016, 0x0026, 0x080c, 0x70d4, 0x0108, 0xc0bc,
- 0x2009, 0x0140, 0x2114, 0x9294, 0x0001, 0x9215, 0x220a, 0x002e,
- 0x001e, 0x0005, 0x0016, 0x0026, 0x2009, 0x0140, 0x2114, 0x9294,
- 0x0001, 0x9285, 0x1000, 0x200a, 0x220a, 0x002e, 0x001e, 0x0005,
- 0x0016, 0x0026, 0x2009, 0x0140, 0x2114, 0x9294, 0x0001, 0x9215,
- 0x220a, 0x002e, 0x001e, 0x0005, 0x0006, 0x0016, 0x2009, 0x0140,
- 0x2104, 0x1128, 0x080c, 0x70d4, 0x0110, 0xc0bc, 0x0008, 0xc0bd,
- 0x200a, 0x001e, 0x000e, 0x0005, 0x00f6, 0x2079, 0x0380, 0x7843,
- 0x0101, 0x7844, 0xd084, 0x1de8, 0x2001, 0x0109, 0x2202, 0x7843,
- 0x0100, 0x00fe, 0x0005, 0x00f6, 0x2079, 0x0380, 0x7843, 0x0202,
- 0x7844, 0xd08c, 0x1de8, 0x2079, 0x0100, 0x7814, 0x9104, 0x9205,
- 0x7a16, 0x2079, 0x0380, 0x7843, 0x0200, 0x00fe, 0x0005, 0x0016,
- 0x0026, 0x0036, 0x00c6, 0x2061, 0x0100, 0x6050, 0x9084, 0xfbff,
- 0x9085, 0x0040, 0x6052, 0x20a9, 0x0002, 0x080c, 0x2839, 0x6050,
- 0x9085, 0x0400, 0x9084, 0xff9f, 0x6052, 0x20a9, 0x0005, 0x080c,
- 0x2839, 0x6054, 0xd0bc, 0x090c, 0x0d65, 0x20a9, 0x0005, 0x080c,
- 0x2839, 0x6054, 0xd0ac, 0x090c, 0x0d65, 0x2009, 0x1987, 0x9084,
- 0x7e00, 0x8007, 0x8004, 0x8004, 0x200a, 0x00ce, 0x003e, 0x002e,
- 0x001e, 0x0005, 0x0006, 0x00c6, 0x2061, 0x0100, 0x6050, 0xc0cd,
- 0x6052, 0x00ce, 0x000e, 0x0005, 0x2e08, 0x2e08, 0x2a0c, 0x2a0c,
- 0x2a18, 0x2a18, 0x2a24, 0x2a24, 0x2a32, 0x2a32, 0x2a3e, 0x2a3e,
- 0x2a4c, 0x2a4c, 0x2a5a, 0x2a5a, 0x2a6c, 0x2a6c, 0x2a78, 0x2a78,
- 0x2a86, 0x2a86, 0x2aa4, 0x2aa4, 0x2ac4, 0x2ac4, 0x2a94, 0x2a94,
- 0x2ab4, 0x2ab4, 0x2ad2, 0x2ad2, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2ae4, 0x2ae4, 0x2af0, 0x2af0,
- 0x2afe, 0x2afe, 0x2b0c, 0x2b0c, 0x2b1c, 0x2b1c, 0x2b2a, 0x2b2a,
- 0x2b3a, 0x2b3a, 0x2b4a, 0x2b4a, 0x2b5c, 0x2b5c, 0x2b6a, 0x2b6a,
- 0x2b7a, 0x2b7a, 0x2b9c, 0x2b9c, 0x2bc0, 0x2bc0, 0x2b8a, 0x2b8a,
- 0x2bae, 0x2bae, 0x2bd0, 0x2bd0, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2be4, 0x2be4, 0x2bf0, 0x2bf0,
- 0x2bfe, 0x2bfe, 0x2c0c, 0x2c0c, 0x2c1c, 0x2c1c, 0x2c2a, 0x2c2a,
- 0x2c3a, 0x2c3a, 0x2c4a, 0x2c4a, 0x2c5c, 0x2c5c, 0x2c6a, 0x2c6a,
- 0x2c7a, 0x2c7a, 0x2c8a, 0x2c8a, 0x2c9c, 0x2c9c, 0x2cac, 0x2cac,
- 0x2cbe, 0x2cbe, 0x2cd0, 0x2cd0, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2ce4, 0x2ce4, 0x2cf2, 0x2cf2,
- 0x2d02, 0x2d02, 0x2d12, 0x2d12, 0x2d24, 0x2d24, 0x2d34, 0x2d34,
- 0x2d46, 0x2d46, 0x2d58, 0x2d58, 0x2d6c, 0x2d6c, 0x2d7c, 0x2d7c,
- 0x2d8e, 0x2d8e, 0x2da0, 0x2da0, 0x2db4, 0x2db4, 0x2dc5, 0x2dc5,
- 0x2dd8, 0x2dd8, 0x2deb, 0x2deb, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a,
- 0x2a6a, 0x2a6a, 0x2a6a, 0x2a6a, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x2117, 0x0804, 0x2e00,
- 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156,
- 0x080c, 0x1f45, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x1f45, 0x080c, 0x2117,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006,
- 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x2117,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x1f45, 0x080c, 0x1f6f,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x1f45, 0x080c, 0x2117, 0x080c, 0x1f6f,
- 0x0804, 0x2e00, 0xa001, 0x0cf0, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x1342, 0x0804, 0x2e00,
- 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156,
- 0x080c, 0x2117, 0x080c, 0x1342, 0x0804, 0x2e00, 0x0106, 0x0006,
- 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x1f45,
- 0x080c, 0x1342, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x2117, 0x080c, 0x1342,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x1f45, 0x080c, 0x2117,
- 0x080c, 0x1342, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x1f45, 0x080c, 0x1342,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x1342, 0x080c, 0x1f6f,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x1f45, 0x080c, 0x2117, 0x080c, 0x1342,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x0804, 0x2e00,
- 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156,
- 0x080c, 0x255c, 0x080c, 0x2117, 0x0804, 0x2e00, 0x0106, 0x0006,
- 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c,
- 0x080c, 0x1f45, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x1f45,
- 0x080c, 0x2117, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x1f6f,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x2117, 0x080c, 0x1f6f,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x1f45, 0x080c, 0x1f6f,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x1f45, 0x080c, 0x2117,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x1342,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x2117, 0x080c, 0x1342,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x1f45, 0x080c, 0x1342,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x2117, 0x080c, 0x1342,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x1f45,
- 0x080c, 0x2117, 0x080c, 0x1342, 0x0804, 0x2e00, 0x0106, 0x0006,
- 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c,
- 0x080c, 0x1f45, 0x080c, 0x1342, 0x080c, 0x1f6f, 0x0804, 0x2e00,
- 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156,
- 0x080c, 0x255c, 0x080c, 0x1342, 0x080c, 0x1f6f, 0x0804, 0x2e00,
- 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156,
- 0x080c, 0x255c, 0x080c, 0x1f45, 0x080c, 0x2117, 0x080c, 0x1342,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x992d, 0x0804, 0x2e00,
- 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156,
- 0x080c, 0x992d, 0x080c, 0x2117, 0x0804, 0x2e00, 0x0106, 0x0006,
- 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x1f45,
- 0x080c, 0x992d, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x1f45, 0x080c, 0x992d,
- 0x080c, 0x2117, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x992d, 0x080c, 0x1f6f,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x992d, 0x080c, 0x2117, 0x080c, 0x1f6f,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x1f45, 0x080c, 0x992d, 0x080c, 0x1f6f,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x1f45, 0x080c, 0x992d, 0x080c, 0x2117,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x992d, 0x080c, 0x1342,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x992d, 0x080c, 0x2117, 0x080c, 0x1342,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x1f45, 0x080c, 0x992d, 0x080c, 0x1342,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x1f45, 0x080c, 0x992d, 0x080c, 0x2117,
- 0x080c, 0x1342, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x992d, 0x080c, 0x1342,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x992d, 0x080c, 0x2117,
- 0x080c, 0x1342, 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006,
- 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x1f45,
- 0x080c, 0x992d, 0x080c, 0x1342, 0x080c, 0x1f6f, 0x0804, 0x2e00,
- 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156,
- 0x080c, 0x1f45, 0x080c, 0x992d, 0x080c, 0x2117, 0x080c, 0x1342,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x992d,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x992d, 0x080c, 0x2117,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x1f45, 0x080c, 0x992d,
- 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136,
- 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x1f45, 0x080c, 0x992d,
- 0x080c, 0x2117, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x992d,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x992d,
- 0x080c, 0x2117, 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006,
- 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c,
- 0x080c, 0x1f45, 0x080c, 0x992d, 0x080c, 0x1f6f, 0x0804, 0x2e00,
- 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156,
- 0x080c, 0x255c, 0x080c, 0x1f45, 0x080c, 0x992d, 0x080c, 0x2117,
- 0x080c, 0x1f6f, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x992d,
- 0x080c, 0x1342, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x992d,
- 0x080c, 0x2117, 0x080c, 0x1342, 0x0804, 0x2e00, 0x0106, 0x0006,
- 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c,
- 0x080c, 0x1f45, 0x080c, 0x992d, 0x080c, 0x1342, 0x0804, 0x2e00,
- 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156,
- 0x080c, 0x255c, 0x080c, 0x1f45, 0x080c, 0x992d, 0x080c, 0x2117,
- 0x080c, 0x1342, 0x0804, 0x2e00, 0x0106, 0x0006, 0x0126, 0x01c6,
- 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x992d,
- 0x080c, 0x1342, 0x080c, 0x1f6f, 0x04d8, 0x0106, 0x0006, 0x0126,
- 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c,
- 0x992d, 0x080c, 0x2117, 0x080c, 0x1342, 0x080c, 0x1f6f, 0x0440,
- 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x0156,
- 0x080c, 0x255c, 0x080c, 0x1f45, 0x080c, 0x1342, 0x080c, 0x992d,
- 0x080c, 0x1f6f, 0x00a8, 0x0106, 0x0006, 0x0126, 0x01c6, 0x01d6,
- 0x0136, 0x0146, 0x0156, 0x080c, 0x255c, 0x080c, 0x1f45, 0x080c,
- 0x992d, 0x080c, 0x2117, 0x080c, 0x1342, 0x080c, 0x1f6f, 0x0000,
- 0x015e, 0x014e, 0x013e, 0x01de, 0x01ce, 0x012e, 0x000e, 0x010e,
- 0x000d, 0x00b6, 0x00c6, 0x0026, 0x0046, 0x9026, 0x080c, 0x6648,
- 0x1904, 0x2f0f, 0x72d8, 0x2001, 0x1954, 0x2004, 0x9005, 0x1110,
- 0xd29c, 0x0148, 0xd284, 0x1138, 0xd2bc, 0x1904, 0x2f0f, 0x080c,
- 0x2f14, 0x0804, 0x2f0f, 0xd2cc, 0x1904, 0x2f0f, 0x080c, 0x70ba,
- 0x1120, 0x70ab, 0xffff, 0x0804, 0x2f0f, 0xd294, 0x0120, 0x70ab,
- 0xffff, 0x0804, 0x2f0f, 0x080c, 0x3195, 0x0160, 0x080c, 0xbf8f,
- 0x0128, 0x2001, 0x1817, 0x203c, 0x0804, 0x2ea1, 0x70ab, 0xffff,
- 0x0804, 0x2f0f, 0x2001, 0x1817, 0x203c, 0x7290, 0xd284, 0x0904,
- 0x2ea1, 0xd28c, 0x1904, 0x2ea1, 0x0036, 0x73a8, 0x938e, 0xffff,
- 0x1110, 0x2019, 0x0001, 0x8314, 0x92e0, 0x1d80, 0x2c04, 0x938c,
- 0x0001, 0x0120, 0x9084, 0xff00, 0x8007, 0x0010, 0x9084, 0x00ff,
- 0x970e, 0x05a8, 0x908e, 0x0000, 0x0590, 0x908e, 0x00ff, 0x1150,
- 0x7230, 0xd284, 0x1588, 0x7290, 0xc28d, 0x7292, 0x70ab, 0xffff,
- 0x003e, 0x0478, 0x0026, 0x2011, 0x0010, 0x080c, 0x66ae, 0x002e,
- 0x0118, 0x70ab, 0xffff, 0x0410, 0x900e, 0x080c, 0x2459, 0x080c,
- 0x622f, 0x11c0, 0x080c, 0x668a, 0x1168, 0x7030, 0xd08c, 0x0130,
- 0xb800, 0xd0bc, 0x0138, 0x080c, 0x6582, 0x0120, 0x080c, 0x2f2d,
- 0x0148, 0x0028, 0x080c, 0x3079, 0x080c, 0x2f59, 0x0118, 0x8318,
- 0x0804, 0x2e53, 0x73aa, 0x0010, 0x70ab, 0xffff, 0x003e, 0x0804,
- 0x2f0f, 0x9780, 0x319f, 0x203d, 0x97bc, 0xff00, 0x873f, 0x2041,
- 0x007e, 0x70a8, 0x9096, 0xffff, 0x1118, 0x900e, 0x28a8, 0x0050,
- 0x9812, 0x0220, 0x2008, 0x9802, 0x20a8, 0x0020, 0x70ab, 0xffff,
- 0x0804, 0x2f0f, 0x2700, 0x0156, 0x0016, 0x9106, 0x0904, 0x2f04,
- 0x0026, 0x2011, 0x0010, 0x080c, 0x66ae, 0x002e, 0x0120, 0x2009,
- 0xffff, 0x0804, 0x2f0c, 0xc484, 0x080c, 0x628f, 0x0138, 0x080c,
- 0xbf8f, 0x1590, 0x080c, 0x622f, 0x15b8, 0x0008, 0xc485, 0x080c,
- 0x668a, 0x1130, 0x7030, 0xd08c, 0x01f8, 0xb800, 0xd0bc, 0x11e0,
- 0x7290, 0xd28c, 0x0180, 0x080c, 0x668a, 0x9082, 0x0006, 0x02e0,
- 0xd484, 0x1118, 0x080c, 0x6253, 0x0028, 0x080c, 0x310b, 0x01a0,
- 0x080c, 0x3136, 0x0088, 0x080c, 0x3079, 0x080c, 0xbf8f, 0x1160,
- 0x080c, 0x2f59, 0x0188, 0x0040, 0x080c, 0xbf8f, 0x1118, 0x080c,
- 0x310b, 0x0110, 0x0451, 0x0140, 0x001e, 0x8108, 0x015e, 0x1f04,
- 0x2eba, 0x70ab, 0xffff, 0x0018, 0x001e, 0x015e, 0x71aa, 0x004e,
- 0x002e, 0x00ce, 0x00be, 0x0005, 0x00c6, 0x0016, 0x70ab, 0x0001,
- 0x2009, 0x007e, 0x080c, 0x622f, 0x1168, 0xb813, 0x00ff, 0xb817,
- 0xfffe, 0x080c, 0x3079, 0x04a9, 0x0128, 0x70d8, 0xc0bd, 0x70da,
- 0x080c, 0xbcdc, 0x001e, 0x00ce, 0x0005, 0x0016, 0x0076, 0x00d6,
- 0x00c6, 0x2001, 0x1860, 0x2004, 0x9084, 0x00ff, 0xb842, 0x080c,
- 0x9c55, 0x01d0, 0x2b00, 0x6012, 0x080c, 0xbd09, 0x6023, 0x0001,
- 0x9006, 0x080c, 0x61cc, 0x2001, 0x0000, 0x080c, 0x61e0, 0x0126,
- 0x2091, 0x8000, 0x70a4, 0x8000, 0x70a6, 0x012e, 0x2009, 0x0004,
- 0x080c, 0x9c82, 0x9085, 0x0001, 0x00ce, 0x00de, 0x007e, 0x001e,
- 0x0005, 0x0016, 0x0076, 0x00d6, 0x00c6, 0x2001, 0x1860, 0x2004,
- 0x9084, 0x00ff, 0xb842, 0x080c, 0x9c55, 0x0548, 0x2b00, 0x6012,
- 0xb800, 0xc0c4, 0xb802, 0xb8a0, 0x9086, 0x007e, 0x0140, 0xb804,
- 0x9084, 0x00ff, 0x9086, 0x0006, 0x1110, 0x080c, 0x302e, 0x080c,
- 0xbd09, 0x6023, 0x0001, 0x9006, 0x080c, 0x61cc, 0x2001, 0x0002,
- 0x080c, 0x61e0, 0x0126, 0x2091, 0x8000, 0x70a4, 0x8000, 0x70a6,
- 0x012e, 0x2009, 0x0002, 0x080c, 0x9c82, 0x9085, 0x0001, 0x00ce,
- 0x00de, 0x007e, 0x001e, 0x0005, 0x00b6, 0x00c6, 0x0026, 0x2009,
- 0x0080, 0x080c, 0x622f, 0x1140, 0xb813, 0x00ff, 0xb817, 0xfffc,
- 0x0039, 0x0110, 0x70df, 0xffff, 0x002e, 0x00ce, 0x00be, 0x0005,
- 0x0016, 0x0076, 0x00d6, 0x00c6, 0x080c, 0x9b90, 0x01d0, 0x2b00,
- 0x6012, 0x080c, 0xbd09, 0x6023, 0x0001, 0x9006, 0x080c, 0x61cc,
- 0x2001, 0x0002, 0x080c, 0x61e0, 0x0126, 0x2091, 0x8000, 0x70e0,
- 0x8000, 0x70e2, 0x012e, 0x2009, 0x0002, 0x080c, 0x9c82, 0x9085,
- 0x0001, 0x00ce, 0x00de, 0x007e, 0x001e, 0x0005, 0x00c6, 0x00d6,
- 0x0126, 0x2091, 0x8000, 0x2009, 0x007f, 0x080c, 0x622f, 0x11b8,
- 0xb813, 0x00ff, 0xb817, 0xfffd, 0xb8c7, 0x0004, 0x080c, 0x9b90,
- 0x0170, 0x2b00, 0x6012, 0x6316, 0x6023, 0x0001, 0x620a, 0x080c,
- 0xbd09, 0x2009, 0x0022, 0x080c, 0x9c82, 0x9085, 0x0001, 0x012e,
- 0x00de, 0x00ce, 0x0005, 0x00e6, 0x00c6, 0x0066, 0x0036, 0x0026,
- 0x00b6, 0x21f0, 0x080c, 0x98c7, 0x0106, 0x080c, 0x8663, 0x080c,
- 0x85de, 0x080c, 0x9818, 0x080c, 0xab55, 0x010e, 0x090c, 0x98e3,
- 0x3e08, 0x2130, 0x81ff, 0x0120, 0x20a9, 0x007e, 0x900e, 0x0018,
- 0x20a9, 0x007f, 0x900e, 0x0016, 0x080c, 0x628f, 0x1140, 0x9686,
- 0x0002, 0x1118, 0xb800, 0xd0bc, 0x1110, 0x080c, 0x5d11, 0x001e,
- 0x8108, 0x1f04, 0x3013, 0x9686, 0x0001, 0x190c, 0x3169, 0x00be,
- 0x002e, 0x003e, 0x006e, 0x00ce, 0x00ee, 0x0005, 0x00e6, 0x00c6,
- 0x0046, 0x0036, 0x0026, 0x0016, 0x00b6, 0x080c, 0x98c7, 0x0106,
- 0x6210, 0x2258, 0xbaa0, 0x0026, 0x2019, 0x0029, 0x080c, 0x8658,
- 0x0076, 0x2039, 0x0000, 0x080c, 0x853d, 0x2c08, 0x080c, 0xd011,
- 0x007e, 0x001e, 0x010e, 0x090c, 0x98e3, 0xba10, 0xbb14, 0xbc84,
- 0x080c, 0x5d11, 0xba12, 0xbb16, 0xbc86, 0x00be, 0x001e, 0x002e,
- 0x003e, 0x004e, 0x00ce, 0x00ee, 0x0005, 0x00e6, 0x0006, 0x00b6,
- 0x6010, 0x2058, 0xb8a0, 0x00be, 0x9086, 0x0080, 0x0150, 0x2071,
- 0x1800, 0x70a4, 0x9005, 0x0110, 0x8001, 0x70a6, 0x000e, 0x00ee,
- 0x0005, 0x2071, 0x1800, 0x70e0, 0x9005, 0x0dc0, 0x8001, 0x70e2,
- 0x0ca8, 0xb800, 0xc08c, 0xb802, 0x0005, 0x00f6, 0x00e6, 0x00c6,
- 0x00b6, 0x0046, 0x0036, 0x0026, 0x0016, 0x0156, 0x2178, 0x080c,
- 0x98c7, 0x0106, 0x81ff, 0x1118, 0x20a9, 0x0001, 0x0070, 0x080c,
- 0x53a8, 0xd0c4, 0x0138, 0x0030, 0x9006, 0x2020, 0x2009, 0x002d,
- 0x080c, 0xd2bc, 0x20a9, 0x0800, 0x9016, 0x0026, 0x928e, 0x007e,
- 0x0904, 0x30e7, 0x928e, 0x007f, 0x0904, 0x30e7, 0x928e, 0x0080,
- 0x05f0, 0x9288, 0x1000, 0x210c, 0x81ff, 0x05c8, 0x8fff, 0x1150,
- 0x2001, 0x1966, 0x0006, 0x2003, 0x0001, 0x080c, 0x30f8, 0x000e,
- 0x2003, 0x0000, 0x00b6, 0x00c6, 0x2158, 0x2001, 0x0001, 0x080c,
- 0x6654, 0x00ce, 0x00be, 0x2019, 0x0029, 0x080c, 0x8658, 0x0076,
- 0x2039, 0x0000, 0x080c, 0x853d, 0x00b6, 0x00c6, 0x0026, 0x2158,
- 0xba04, 0x9294, 0x00ff, 0x9286, 0x0006, 0x1118, 0xb807, 0x0404,
- 0x0028, 0x2001, 0x0004, 0x8007, 0x9215, 0xba06, 0x002e, 0x00ce,
- 0x00be, 0x0016, 0x2c08, 0x080c, 0xd011, 0x001e, 0x007e, 0x002e,
- 0x8210, 0x1f04, 0x309d, 0x010e, 0x090c, 0x98e3, 0x015e, 0x001e,
- 0x002e, 0x003e, 0x004e, 0x00be, 0x00ce, 0x00ee, 0x00fe, 0x0005,
- 0x0046, 0x0026, 0x0016, 0x080c, 0x53a8, 0xd0c4, 0x0140, 0xd0a4,
- 0x0130, 0x9006, 0x2220, 0x2009, 0x0029, 0x080c, 0xd2bc, 0x001e,
- 0x002e, 0x004e, 0x0005, 0x0016, 0x0026, 0x0036, 0x00c6, 0x7290,
- 0x82ff, 0x01e8, 0x080c, 0x6682, 0x11d0, 0x2100, 0x080c, 0x248c,
- 0x81ff, 0x01b8, 0x2019, 0x0001, 0x8314, 0x92e0, 0x1d80, 0x2c04,
- 0xd384, 0x0120, 0x9084, 0xff00, 0x8007, 0x0010, 0x9084, 0x00ff,
- 0x9116, 0x0138, 0x9096, 0x00ff, 0x0110, 0x8318, 0x0c68, 0x9085,
- 0x0001, 0x00ce, 0x003e, 0x002e, 0x001e, 0x0005, 0x0016, 0x00c6,
- 0x0126, 0x2091, 0x8000, 0x080c, 0x98c7, 0x0106, 0x0036, 0x2019,
- 0x0029, 0x00c1, 0x003e, 0x010e, 0x090c, 0x98e3, 0x9180, 0x1000,
- 0x2004, 0x9065, 0x0158, 0x0016, 0x00c6, 0x2061, 0x1b09, 0x001e,
- 0x6112, 0x080c, 0x302e, 0x001e, 0x080c, 0x6253, 0x012e, 0x00ce,
- 0x001e, 0x0005, 0x0016, 0x0026, 0x2110, 0x080c, 0x94e5, 0x080c,
- 0xd572, 0x002e, 0x001e, 0x0005, 0x2001, 0x1836, 0x2004, 0xd0cc,
- 0x0005, 0x00c6, 0x00b6, 0x080c, 0x70ba, 0x1118, 0x20a9, 0x0800,
- 0x0010, 0x20a9, 0x0782, 0x080c, 0x70ba, 0x1110, 0x900e, 0x0010,
- 0x2009, 0x007e, 0x9180, 0x1000, 0x2004, 0x905d, 0x0130, 0x86ff,
- 0x0110, 0xb800, 0xd0bc, 0x090c, 0x6253, 0x8108, 0x1f04, 0x317a,
- 0x2061, 0x1800, 0x607b, 0x0000, 0x607c, 0x9084, 0x00ff, 0x607e,
- 0x60af, 0x0000, 0x00be, 0x00ce, 0x0005, 0x2001, 0x187d, 0x2004,
- 0xd0bc, 0x0005, 0x2011, 0x185c, 0x2214, 0xd2ec, 0x0005, 0x7eef,
- 0x7de8, 0x7ce4, 0x80e2, 0x7be1, 0x80e0, 0x80dc, 0x80da, 0x7ad9,
- 0x80d6, 0x80d5, 0x80d4, 0x80d3, 0x80d2, 0x80d1, 0x79ce, 0x78cd,
- 0x80cc, 0x80cb, 0x80ca, 0x80c9, 0x80c7, 0x80c6, 0x77c5, 0x76c3,
- 0x80bc, 0x80ba, 0x75b9, 0x80b6, 0x74b5, 0x73b4, 0x72b3, 0x80b2,
- 0x80b1, 0x80ae, 0x71ad, 0x80ac, 0x70ab, 0x6faa, 0x6ea9, 0x80a7,
- 0x6da6, 0x6ca5, 0x6ba3, 0x6a9f, 0x699e, 0x689d, 0x809b, 0x8098,
- 0x6797, 0x6690, 0x658f, 0x6488, 0x6384, 0x6282, 0x8081, 0x8080,
- 0x617c, 0x607a, 0x8079, 0x5f76, 0x8075, 0x8074, 0x8073, 0x8072,
- 0x8071, 0x806e, 0x5e6d, 0x806c, 0x5d6b, 0x5c6a, 0x5b69, 0x8067,
- 0x5a66, 0x5965, 0x5863, 0x575c, 0x565a, 0x5559, 0x8056, 0x8055,
- 0x5454, 0x5353, 0x5252, 0x5151, 0x504e, 0x4f4d, 0x804c, 0x804b,
- 0x4e4a, 0x4d49, 0x8047, 0x4c46, 0x8045, 0x8043, 0x803c, 0x803a,
- 0x8039, 0x8036, 0x4b35, 0x8034, 0x4a33, 0x4932, 0x4831, 0x802e,
- 0x472d, 0x462c, 0x452b, 0x442a, 0x4329, 0x4227, 0x8026, 0x8025,
- 0x4123, 0x401f, 0x3f1e, 0x3e1d, 0x3d1b, 0x3c18, 0x8017, 0x8010,
- 0x3b0f, 0x3a08, 0x8004, 0x3902, 0x8001, 0x8000, 0x8000, 0x3800,
- 0x3700, 0x3600, 0x8000, 0x3500, 0x8000, 0x8000, 0x8000, 0x3400,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x3300, 0x3200,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x3100, 0x3000,
- 0x8000, 0x8000, 0x2f00, 0x8000, 0x2e00, 0x2d00, 0x2c00, 0x8000,
- 0x8000, 0x8000, 0x2b00, 0x8000, 0x2a00, 0x2900, 0x2800, 0x8000,
- 0x2700, 0x2600, 0x2500, 0x2400, 0x2300, 0x2200, 0x8000, 0x8000,
- 0x2100, 0x2000, 0x1f00, 0x1e00, 0x1d00, 0x1c00, 0x8000, 0x8000,
- 0x1b00, 0x1a00, 0x8000, 0x1900, 0x8000, 0x8000, 0x8000, 0x8000,
- 0x8000, 0x8000, 0x1800, 0x8000, 0x1700, 0x1600, 0x1500, 0x8000,
- 0x1400, 0x1300, 0x1200, 0x1100, 0x1000, 0x0f00, 0x8000, 0x8000,
- 0x0e00, 0x0d00, 0x0c00, 0x0b00, 0x0a00, 0x0900, 0x8000, 0x8000,
- 0x0800, 0x0700, 0x8000, 0x0600, 0x8000, 0x8000, 0x8000, 0x0500,
- 0x0400, 0x0300, 0x8000, 0x0200, 0x8000, 0x8000, 0x8000, 0x0100,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x0000, 0x8000,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x2071,
- 0x189c, 0x7003, 0x0002, 0x9006, 0x7016, 0x701a, 0x704a, 0x704e,
- 0x700e, 0x7042, 0x7046, 0x703b, 0x18b8, 0x703f, 0x18b8, 0x7007,
- 0x0001, 0x080c, 0x1048, 0x090c, 0x0d65, 0x2900, 0x706a, 0xa867,
- 0x0002, 0xa8ab, 0xdcb0, 0x080c, 0x1048, 0x090c, 0x0d65, 0x2900,
- 0x706e, 0xa867, 0x0002, 0xa8ab, 0xdcb0, 0x0005, 0x2071, 0x189c,
- 0x7004, 0x0002, 0x32ce, 0x32cf, 0x32e2, 0x32f6, 0x0005, 0x1004,
- 0x32df, 0x0e04, 0x32df, 0x2079, 0x0000, 0x0126, 0x2091, 0x8000,
- 0x700c, 0x9005, 0x1128, 0x700f, 0x0001, 0x012e, 0x0468, 0x0005,
- 0x012e, 0x0ce8, 0x2079, 0x0000, 0x2061, 0x18b6, 0x2c4c, 0xa86c,
- 0x908e, 0x0100, 0x0128, 0x9086, 0x0200, 0x0904, 0x33ca, 0x0005,
- 0x7018, 0x2048, 0x2061, 0x1800, 0x701c, 0x0807, 0x7014, 0x2048,
- 0xa864, 0x9094, 0x00ff, 0x9296, 0x0029, 0x1120, 0xaa78, 0xd2fc,
- 0x0128, 0x0005, 0x9086, 0x0103, 0x0108, 0x0005, 0x2079, 0x0000,
- 0x2061, 0x1800, 0x701c, 0x0807, 0x2061, 0x1800, 0x7880, 0x908a,
- 0x0040, 0x1210, 0x61cc, 0x0042, 0x2100, 0x908a, 0x003f, 0x1a04,
- 0x33c7, 0x61cc, 0x0804, 0x335c, 0x339e, 0x33d6, 0x33c7, 0x33e0,
- 0x33ea, 0x33f0, 0x33f4, 0x3404, 0x3408, 0x341e, 0x3424, 0x342a,
- 0x3435, 0x3440, 0x344f, 0x345e, 0x346c, 0x3483, 0x349e, 0x33c7,
- 0x3547, 0x3585, 0x362a, 0x363b, 0x365e, 0x33c7, 0x33c7, 0x33c7,
- 0x3696, 0x36b6, 0x36bf, 0x36eb, 0x36f1, 0x33c7, 0x3737, 0x33c7,
- 0x33c7, 0x33c7, 0x33c7, 0x33c7, 0x3742, 0x374b, 0x3753, 0x3755,
- 0x33c7, 0x33c7, 0x33c7, 0x33c7, 0x33c7, 0x33c7, 0x3785, 0x33c7,
- 0x33c7, 0x33c7, 0x33c7, 0x33c7, 0x37a2, 0x37fd, 0x33c7, 0x33c7,
- 0x33c7, 0x33c7, 0x33c7, 0x33c7, 0x0002, 0x3827, 0x382a, 0x3889,
- 0x38a2, 0x38d2, 0x3b74, 0x33c7, 0x4f79, 0x33c7, 0x33c7, 0x33c7,
- 0x33c7, 0x33c7, 0x33c7, 0x33c7, 0x33c7, 0x341e, 0x3424, 0x4073,
- 0x53cc, 0x4089, 0x5008, 0x5059, 0x515c, 0x33c7, 0x51be, 0x51fa,
- 0x522b, 0x5337, 0x5258, 0x52b7, 0x33c7, 0x408d, 0x421d, 0x4233,
- 0x4258, 0x42bd, 0x4331, 0x4351, 0x43c8, 0x4424, 0x4480, 0x4483,
- 0x44a8, 0x451b, 0x4585, 0x458d, 0x46bf, 0x4824, 0x4858, 0x4aa2,
- 0x33c7, 0x4ac0, 0x4b7c, 0x4c52, 0x33c7, 0x33c7, 0x33c7, 0x33c7,
- 0x4cb8, 0x4cd3, 0x458d, 0x4f19, 0x714c, 0x0000, 0x2021, 0x4000,
- 0x080c, 0x48d6, 0x0126, 0x2091, 0x8000, 0x0e04, 0x33a8, 0x0010,
- 0x012e, 0x0cc0, 0x7c36, 0x9486, 0x4000, 0x0118, 0x7833, 0x0011,
- 0x0010, 0x7833, 0x0010, 0x7c82, 0x7986, 0x7a8a, 0x7b8e, 0x2091,
- 0x4080, 0x2001, 0x0089, 0x2004, 0xd084, 0x190c, 0x11d6, 0x7007,
- 0x0001, 0x2091, 0x5000, 0x700f, 0x0000, 0x012e, 0x0005, 0x2021,
- 0x4001, 0x08b0, 0x2021, 0x4002, 0x0898, 0x2021, 0x4003, 0x0880,
- 0x2021, 0x4005, 0x0868, 0x2021, 0x4006, 0x0850, 0x2039, 0x0001,
- 0x902e, 0x2520, 0x7b88, 0x7a8c, 0x7884, 0x7990, 0x0804, 0x48e3,
- 0x2039, 0x0001, 0x902e, 0x2520, 0x7b88, 0x7a8c, 0x7884, 0x7990,
- 0x0804, 0x48e6, 0x7984, 0x7888, 0x2114, 0x200a, 0x0804, 0x339e,
- 0x7984, 0x2114, 0x0804, 0x339e, 0x20e1, 0x0000, 0x2099, 0x0021,
- 0x20e9, 0x0000, 0x20a1, 0x0021, 0x20a9, 0x001f, 0x4003, 0x7984,
- 0x7a88, 0x7b8c, 0x0804, 0x339e, 0x7884, 0x2060, 0x0804, 0x3451,
- 0x2009, 0x0003, 0x2011, 0x0003, 0x2019, 0x0002, 0x789b, 0x0317,
- 0x7893, 0xffff, 0x2001, 0x188d, 0x2004, 0x9005, 0x0118, 0x7896,
- 0x0804, 0x339e, 0x7897, 0x0001, 0x0804, 0x339e, 0x2039, 0x0001,
- 0x7d98, 0x7c9c, 0x0804, 0x33da, 0x2039, 0x0001, 0x7d98, 0x7c9c,
- 0x0804, 0x33e4, 0x79a0, 0x9182, 0x0040, 0x0210, 0x0804, 0x33d3,
- 0x2138, 0x7d98, 0x7c9c, 0x0804, 0x33da, 0x79a0, 0x9182, 0x0040,
- 0x0210, 0x0804, 0x33d3, 0x2138, 0x7d98, 0x7c9c, 0x0804, 0x33e4,
- 0x79a0, 0x9182, 0x0040, 0x0210, 0x0804, 0x33d3, 0x21e8, 0x7984,
- 0x7888, 0x20a9, 0x0001, 0x21a0, 0x4004, 0x0804, 0x339e, 0x2061,
- 0x0800, 0xe10c, 0x9006, 0x2c15, 0x9200, 0x8c60, 0x8109, 0x1dd8,
- 0x2010, 0x9005, 0x0904, 0x339e, 0x0804, 0x33cd, 0x79a0, 0x9182,
- 0x0040, 0x0210, 0x0804, 0x33d3, 0x21e0, 0x20a9, 0x0001, 0x7984,
- 0x2198, 0x4012, 0x0804, 0x339e, 0x2069, 0x185b, 0x7884, 0x7990,
- 0x911a, 0x1a04, 0x33d3, 0x8019, 0x0904, 0x33d3, 0x684a, 0x6942,
- 0x788c, 0x6852, 0x7888, 0x6856, 0x9006, 0x685a, 0x685e, 0x080c,
- 0x73ea, 0x0804, 0x339e, 0x2069, 0x185b, 0x7884, 0x7994, 0x911a,
- 0x1a04, 0x33d3, 0x8019, 0x0904, 0x33d3, 0x684e, 0x6946, 0x788c,
- 0x6862, 0x7888, 0x6866, 0x9006, 0x686a, 0x686e, 0x0126, 0x2091,
- 0x8000, 0x080c, 0x6788, 0x012e, 0x0804, 0x339e, 0x902e, 0x2520,
- 0x81ff, 0x0120, 0x2009, 0x0001, 0x0804, 0x33d0, 0x7984, 0x7b88,
- 0x7a8c, 0x20a9, 0x0005, 0x20e9, 0x0001, 0x20a1, 0x18a4, 0x4101,
- 0x080c, 0x489a, 0x1120, 0x2009, 0x0002, 0x0804, 0x33d0, 0x2009,
- 0x0020, 0xa85c, 0x9080, 0x0019, 0xaf60, 0x080c, 0x48e3, 0x701f,
- 0x34c2, 0x0005, 0xa864, 0x2008, 0x9084, 0x00ff, 0x9096, 0x0011,
- 0x0168, 0x9096, 0x0019, 0x0150, 0x9096, 0x0015, 0x0138, 0x9096,
- 0x0048, 0x0120, 0x9096, 0x0029, 0x1904, 0x33d0, 0x810f, 0x918c,
- 0x00ff, 0x0904, 0x33d0, 0x7112, 0x7010, 0x8001, 0x0560, 0x7012,
- 0x080c, 0x489a, 0x1120, 0x2009, 0x0002, 0x0804, 0x33d0, 0x2009,
- 0x0020, 0x7068, 0x2040, 0xa28c, 0xa390, 0xa494, 0xa598, 0x9290,
- 0x0040, 0x9399, 0x0000, 0x94a1, 0x0000, 0x95a9, 0x0000, 0xa85c,
- 0x9080, 0x0019, 0xaf60, 0x080c, 0x48e3, 0x701f, 0x3500, 0x0005,
- 0xa864, 0x9084, 0x00ff, 0x9096, 0x0002, 0x0120, 0x9096, 0x000a,
- 0x1904, 0x33d0, 0x0888, 0x7014, 0x2048, 0xa868, 0xc0fd, 0xa86a,
- 0xa864, 0x9084, 0x00ff, 0x9096, 0x0029, 0x1160, 0xc2fd, 0xaa7a,
- 0x080c, 0x5dff, 0x0150, 0x0126, 0x2091, 0x8000, 0xa87a, 0xa982,
- 0x012e, 0x0050, 0x080c, 0x611a, 0x1128, 0x7007, 0x0003, 0x701f,
- 0x352c, 0x0005, 0x080c, 0x6bc6, 0x0126, 0x2091, 0x8000, 0x20a9,
- 0x0005, 0x20e1, 0x0001, 0x2099, 0x18a4, 0x400a, 0x2100, 0x9210,
- 0x9399, 0x0000, 0x94a1, 0x0000, 0x95a9, 0x0000, 0xa85c, 0x9080,
- 0x0019, 0x2009, 0x0020, 0x012e, 0xaf60, 0x0804, 0x48e6, 0x2091,
- 0x8000, 0x7837, 0x4000, 0x7833, 0x0010, 0x7883, 0x4000, 0x7887,
- 0x4953, 0x788b, 0x5020, 0x788f, 0x2020, 0x2009, 0x017f, 0x2104,
- 0x7892, 0x3f00, 0x7896, 0x2061, 0x0100, 0x6200, 0x2061, 0x0200,
- 0x603c, 0x8007, 0x9205, 0x789a, 0x2009, 0x04fd, 0x2104, 0x789e,
- 0x2091, 0x5000, 0x2091, 0x4080, 0x2001, 0x0089, 0x2004, 0xd084,
- 0x0180, 0x2001, 0x19fa, 0x2004, 0x9005, 0x0128, 0x2001, 0x008b,
- 0x2004, 0xd0fc, 0x0dd8, 0x2001, 0x008a, 0x2003, 0x0002, 0x2003,
- 0x1001, 0x2071, 0x0080, 0x0804, 0x0427, 0x81ff, 0x1904, 0x33d0,
- 0x7984, 0x080c, 0x628f, 0x1904, 0x33d3, 0x7e98, 0x9684, 0x3fff,
- 0x9082, 0x4000, 0x1a04, 0x33d3, 0x7c88, 0x7d8c, 0x080c, 0x64c5,
- 0x080c, 0x6452, 0x1518, 0x2061, 0x1ddc, 0x0126, 0x2091, 0x8000,
- 0x6000, 0x9086, 0x0000, 0x0148, 0x6014, 0x904d, 0x0130, 0xa86c,
- 0x9406, 0x1118, 0xa870, 0x9506, 0x0150, 0x012e, 0x9ce0, 0x001c,
- 0x2001, 0x1819, 0x2004, 0x9c02, 0x1a04, 0x33d0, 0x0c30, 0x080c,
- 0xb45e, 0x012e, 0x0904, 0x33d0, 0x0804, 0x339e, 0x900e, 0x2001,
- 0x0005, 0x080c, 0x6bc6, 0x0126, 0x2091, 0x8000, 0x080c, 0xbb79,
- 0x080c, 0x69b5, 0x012e, 0x0804, 0x339e, 0x00a6, 0x2950, 0xb198,
- 0x080c, 0x628f, 0x1904, 0x3617, 0xb6a4, 0x9684, 0x3fff, 0x9082,
- 0x4000, 0x16e8, 0xb49c, 0xb5a0, 0x080c, 0x64c5, 0x080c, 0x646f,
- 0x1520, 0x2061, 0x1ddc, 0x0126, 0x2091, 0x8000, 0x6000, 0x9086,
- 0x0000, 0x0148, 0x6014, 0x904d, 0x0130, 0xa86c, 0x9406, 0x1118,
- 0xa870, 0x9506, 0x0158, 0x012e, 0x9ce0, 0x001c, 0x2001, 0x1819,
- 0x2004, 0x9c02, 0x2009, 0x000d, 0x12b0, 0x0c28, 0x080c, 0xb45e,
- 0x012e, 0x2009, 0x0003, 0x0178, 0x00e0, 0x900e, 0x2001, 0x0005,
- 0x080c, 0x6bc6, 0x0126, 0x2091, 0x8000, 0x080c, 0xbb79, 0x080c,
- 0x69a9, 0x012e, 0x0070, 0xb097, 0x4005, 0xb19a, 0x0010, 0xb097,
- 0x4006, 0x900e, 0x9085, 0x0001, 0x2001, 0x0030, 0x2a48, 0x00ae,
- 0x0005, 0xb097, 0x4000, 0x9006, 0x918d, 0x0001, 0x2008, 0x2a48,
- 0x00ae, 0x0005, 0x81ff, 0x1904, 0x33d0, 0x080c, 0x48b1, 0x0904,
- 0x33d3, 0x080c, 0x6356, 0x0904, 0x33d0, 0x080c, 0x64cb, 0x0904,
- 0x33d0, 0x0804, 0x4348, 0x81ff, 0x1904, 0x33d0, 0x080c, 0x48cd,
- 0x0904, 0x33d3, 0x080c, 0x6559, 0x0904, 0x33d0, 0x2019, 0x0005,
- 0x79a8, 0x080c, 0x64e6, 0x0904, 0x33d0, 0x7888, 0x908a, 0x1000,
- 0x1a04, 0x33d3, 0x8003, 0x800b, 0x810b, 0x9108, 0x080c, 0x817a,
- 0x7984, 0xd184, 0x1904, 0x339e, 0x0804, 0x4348, 0x0126, 0x2091,
- 0x8000, 0x81ff, 0x0118, 0x2009, 0x0001, 0x0450, 0x2029, 0x07ff,
- 0x6458, 0x2400, 0x9506, 0x01f8, 0x2508, 0x080c, 0x628f, 0x11d8,
- 0x080c, 0x6559, 0x1128, 0x2009, 0x0002, 0x62bc, 0x2518, 0x00c0,
- 0x2019, 0x0004, 0x900e, 0x080c, 0x64e6, 0x1118, 0x2009, 0x0006,
- 0x0078, 0x7884, 0x908a, 0x1000, 0x1270, 0x8003, 0x800b, 0x810b,
- 0x9108, 0x080c, 0x817a, 0x8529, 0x1ae0, 0x012e, 0x0804, 0x339e,
- 0x012e, 0x0804, 0x33d0, 0x012e, 0x0804, 0x33d3, 0x080c, 0x48b1,
- 0x0904, 0x33d3, 0x080c, 0x6356, 0x0904, 0x33d0, 0x080c, 0x98c7,
- 0xbaa0, 0x2019, 0x0005, 0x00c6, 0x9066, 0x080c, 0x8658, 0x0076,
- 0x903e, 0x080c, 0x853d, 0x900e, 0x080c, 0xd011, 0x007e, 0x00ce,
- 0x080c, 0x98e3, 0x080c, 0x64c5, 0x0804, 0x339e, 0x080c, 0x48b1,
- 0x0904, 0x33d3, 0x080c, 0x64c5, 0x2208, 0x0804, 0x339e, 0x0156,
- 0x00d6, 0x00e6, 0x00c6, 0x2069, 0x190e, 0x6810, 0x6914, 0x910a,
- 0x1208, 0x900e, 0x6816, 0x9016, 0x901e, 0x2071, 0x19bf, 0x7028,
- 0x9065, 0x0118, 0x8210, 0x600c, 0x0cd8, 0x2300, 0x9218, 0x00ce,
- 0x00ee, 0x00de, 0x015e, 0x0804, 0x339e, 0x00f6, 0x0016, 0x907d,
- 0x0138, 0x9006, 0x8000, 0x2f0c, 0x81ff, 0x0110, 0x2178, 0x0cd0,
- 0x001e, 0x00fe, 0x0005, 0x2069, 0x190e, 0x6910, 0x62b8, 0x0804,
- 0x339e, 0x81ff, 0x0120, 0x2009, 0x0001, 0x0804, 0x33d0, 0x0126,
- 0x2091, 0x8000, 0x080c, 0x53bc, 0x0128, 0x2009, 0x0007, 0x012e,
- 0x0804, 0x33d0, 0x012e, 0x6158, 0x9190, 0x319f, 0x2215, 0x9294,
- 0x00ff, 0x6378, 0x83ff, 0x0108, 0x627c, 0x67d8, 0x97c4, 0x000a,
- 0x98c6, 0x000a, 0x1118, 0x2031, 0x0001, 0x00e8, 0x97c4, 0x0022,
- 0x98c6, 0x0022, 0x1118, 0x2031, 0x0003, 0x00a8, 0x97c4, 0x0012,
- 0x98c6, 0x0012, 0x1118, 0x2031, 0x0002, 0x0068, 0x080c, 0x70ba,
- 0x1118, 0x2031, 0x0004, 0x0038, 0xd79c, 0x0120, 0x2009, 0x0005,
- 0x0804, 0x33d0, 0x9036, 0x7e9a, 0x7f9e, 0x0804, 0x339e, 0x6148,
- 0x624c, 0x2019, 0x195e, 0x231c, 0x2001, 0x195f, 0x2004, 0x789a,
- 0x0804, 0x339e, 0x0126, 0x2091, 0x8000, 0x6138, 0x623c, 0x6340,
- 0x012e, 0x0804, 0x339e, 0x080c, 0x48cd, 0x0904, 0x33d3, 0xba44,
- 0xbb38, 0x0804, 0x339e, 0x080c, 0x0d65, 0x080c, 0x48cd, 0x2110,
- 0x0904, 0x33d3, 0xb804, 0x908c, 0x00ff, 0x918e, 0x0006, 0x0140,
- 0x9084, 0xff00, 0x9086, 0x0600, 0x2009, 0x0009, 0x1904, 0x33d0,
- 0x0126, 0x2091, 0x8000, 0x2019, 0x0005, 0x00c6, 0x9066, 0x080c,
- 0x98c7, 0x080c, 0x94e5, 0x080c, 0x8658, 0x0076, 0x903e, 0x080c,
- 0x853d, 0x900e, 0x080c, 0xd011, 0x007e, 0x00ce, 0x080c, 0x98e3,
- 0xb807, 0x0407, 0x012e, 0x0804, 0x339e, 0x6148, 0x624c, 0x7884,
- 0x604a, 0x7b88, 0x634e, 0x2069, 0x185b, 0x831f, 0x9305, 0x6816,
- 0x788c, 0x2069, 0x195e, 0x2d1c, 0x206a, 0x7e98, 0x9682, 0x0014,
- 0x1210, 0x2031, 0x07d0, 0x2069, 0x195f, 0x2d04, 0x266a, 0x789a,
- 0x0804, 0x339e, 0x0126, 0x2091, 0x8000, 0x6138, 0x7884, 0x603a,
- 0x910e, 0xd1b4, 0x190c, 0x0ec1, 0xd0c4, 0x01a8, 0x00d6, 0x78a8,
- 0x2009, 0x1975, 0x200a, 0x78ac, 0x2011, 0x1976, 0x2012, 0x2069,
- 0x0100, 0x6838, 0x9086, 0x0007, 0x1118, 0x2214, 0x6a5a, 0x0010,
- 0x210c, 0x695a, 0x00de, 0x7888, 0x603e, 0x2011, 0x0116, 0x220c,
- 0x7888, 0xd08c, 0x0118, 0x918d, 0x0040, 0x0010, 0x918c, 0xff7f,
- 0x2112, 0x6140, 0x788c, 0x6042, 0x910e, 0xd1e4, 0x190c, 0x0edc,
- 0x6040, 0xd0cc, 0x0120, 0x78b0, 0x2011, 0x0114, 0x2012, 0x012e,
- 0x0804, 0x339e, 0x00f6, 0x2079, 0x1800, 0x7a38, 0xa898, 0x9084,
- 0xfebf, 0x9215, 0xa89c, 0x9084, 0xfebf, 0x8002, 0x9214, 0x7838,
- 0x9084, 0x0140, 0x9215, 0x7a3a, 0xa897, 0x4000, 0x900e, 0x9085,
- 0x0001, 0x2001, 0x0000, 0x00fe, 0x0005, 0x7898, 0x9005, 0x01a8,
- 0x7888, 0x9025, 0x0904, 0x33d3, 0x788c, 0x902d, 0x0904, 0x33d3,
- 0x900e, 0x080c, 0x628f, 0x1120, 0xba44, 0xbb38, 0xbc46, 0xbd3a,
- 0x9186, 0x07ff, 0x0190, 0x8108, 0x0ca0, 0x080c, 0x48cd, 0x0904,
- 0x33d3, 0x7888, 0x900d, 0x0904, 0x33d3, 0x788c, 0x9005, 0x0904,
- 0x33d3, 0xba44, 0xb946, 0xbb38, 0xb83a, 0x0804, 0x339e, 0x2011,
- 0xbc09, 0x0010, 0x2011, 0xbc05, 0x080c, 0x53bc, 0x1904, 0x33d0,
- 0x00c6, 0x2061, 0x0100, 0x7984, 0x9186, 0x00ff, 0x1130, 0x2001,
- 0x1817, 0x2004, 0x9085, 0xff00, 0x0088, 0x9182, 0x007f, 0x16e0,
- 0x9188, 0x319f, 0x210d, 0x918c, 0x00ff, 0x2001, 0x1817, 0x2004,
- 0x0026, 0x9116, 0x002e, 0x0580, 0x810f, 0x9105, 0x0126, 0x2091,
- 0x8000, 0x0006, 0x080c, 0x9b90, 0x000e, 0x0510, 0x602e, 0x620a,
- 0x7984, 0x00b6, 0x080c, 0x6235, 0x2b08, 0x00be, 0x1500, 0x6112,
- 0x6023, 0x0001, 0x080c, 0x489a, 0x01d0, 0x9006, 0xa866, 0x7007,
- 0x0003, 0xa832, 0xa868, 0xc0fd, 0xa86a, 0x701f, 0x3882, 0x2900,
- 0x6016, 0x2009, 0x0032, 0x080c, 0x9c82, 0x012e, 0x00ce, 0x0005,
- 0x012e, 0x00ce, 0x0804, 0x33d0, 0x00ce, 0x0804, 0x33d3, 0x080c,
- 0x9be6, 0x0cb0, 0xa830, 0x9086, 0x0100, 0x0904, 0x33d0, 0x0804,
- 0x339e, 0x2061, 0x1a46, 0x0126, 0x2091, 0x8000, 0x6000, 0xd084,
- 0x0170, 0x6104, 0x6208, 0x2061, 0x1800, 0x6350, 0x6070, 0x789a,
- 0x60bc, 0x789e, 0x60b8, 0x78aa, 0x012e, 0x0804, 0x339e, 0x900e,
- 0x2110, 0x0c88, 0x81ff, 0x1904, 0x33d0, 0x080c, 0x70ba, 0x0904,
- 0x33d0, 0x0126, 0x2091, 0x8000, 0x6250, 0x6070, 0x9202, 0x0248,
- 0x9085, 0x0001, 0x080c, 0x24c2, 0x080c, 0x55d6, 0x012e, 0x0804,
- 0x339e, 0x012e, 0x0804, 0x33d3, 0x0006, 0x0016, 0x00c6, 0x00e6,
- 0x2001, 0x1981, 0x2070, 0x2061, 0x185b, 0x6008, 0x2072, 0x900e,
- 0x2011, 0x1400, 0x080c, 0x842f, 0x7206, 0x00ee, 0x00ce, 0x001e,
- 0x000e, 0x0005, 0x0126, 0x2091, 0x8000, 0x81ff, 0x0128, 0x012e,
- 0x2021, 0x400b, 0x0804, 0x33a0, 0x7884, 0xd0fc, 0x0148, 0x2001,
- 0x002a, 0x2004, 0x9082, 0x00e1, 0x0288, 0x012e, 0x0804, 0x33d3,
- 0x2001, 0x002a, 0x2004, 0x2069, 0x185b, 0x6908, 0x9102, 0x1230,
- 0x012e, 0x0804, 0x33d3, 0x012e, 0x0804, 0x33d0, 0x080c, 0x9b65,
- 0x0dd0, 0x7884, 0xd0fc, 0x0904, 0x394d, 0x00c6, 0x080c, 0x489a,
- 0x00ce, 0x0d88, 0xa867, 0x0000, 0x7884, 0xa80a, 0x7898, 0xa80e,
- 0x789c, 0xa812, 0x2001, 0x002e, 0x2004, 0xa81a, 0x2001, 0x002f,
- 0x2004, 0xa81e, 0x2001, 0x0030, 0x2004, 0xa822, 0x2001, 0x0031,
- 0x2004, 0xa826, 0x2001, 0x0034, 0x2004, 0xa82a, 0x2001, 0x0035,
- 0x2004, 0xa82e, 0x2001, 0x002a, 0x2004, 0x9080, 0x0003, 0x9084,
- 0x00fc, 0x8004, 0xa816, 0x080c, 0x3ad7, 0x0928, 0x7014, 0x2048,
- 0xad2c, 0xac28, 0xab1c, 0xaa18, 0xa930, 0xa808, 0xd0b4, 0x1120,
- 0x2029, 0x0000, 0x2021, 0x0000, 0x8906, 0x8006, 0x8007, 0x90bc,
- 0x003f, 0x9084, 0xffc0, 0x9080, 0x001b, 0x080c, 0x48e3, 0x701f,
- 0x3a14, 0x7023, 0x0001, 0x012e, 0x0005, 0x080c, 0x98c7, 0x0046,
- 0x0086, 0x0096, 0x00a6, 0x00b6, 0x00c6, 0x00d6, 0x00e6, 0x00f6,
- 0x080c, 0x38bc, 0x2001, 0x1977, 0x2003, 0x0000, 0x2021, 0x000a,
- 0x2061, 0x0100, 0x6104, 0x0016, 0x60bb, 0x0000, 0x60bf, 0x32e1,
- 0x60bf, 0x0012, 0x080c, 0x3b46, 0x080c, 0x3b05, 0x00f6, 0x00e6,
- 0x0086, 0x2940, 0x2071, 0x19bf, 0x2079, 0x0090, 0x00d6, 0x2069,
- 0x0000, 0x6884, 0xd0b4, 0x0140, 0x2001, 0x0035, 0x2004, 0x780e,
- 0x2001, 0x0034, 0x2004, 0x780a, 0x00de, 0x2011, 0x0001, 0x080c,
- 0x3eb7, 0x008e, 0x00ee, 0x00fe, 0x080c, 0x3de4, 0x080c, 0x3d11,
- 0x05b8, 0x2001, 0x020b, 0x2004, 0x9084, 0x0140, 0x1db8, 0x080c,
- 0x3f2b, 0x00f6, 0x2079, 0x0300, 0x78bc, 0x00fe, 0x908c, 0x0070,
- 0x1560, 0x2071, 0x0200, 0x7037, 0x0000, 0x7050, 0x9084, 0xff00,
- 0x9086, 0x3200, 0x1510, 0x7037, 0x0001, 0x7050, 0x9084, 0xff00,
- 0x9086, 0xe100, 0x11d0, 0x7037, 0x0000, 0x7054, 0x7037, 0x0000,
- 0x715c, 0x9106, 0x1190, 0x2001, 0x181f, 0x2004, 0x9106, 0x1168,
- 0x00c6, 0x2061, 0x0100, 0x6024, 0x9084, 0x1e00, 0x00ce, 0x0138,
- 0x080c, 0x3d1b, 0x080c, 0x3b00, 0x0058, 0x080c, 0x3b00, 0x080c,
- 0x3e4f, 0x080c, 0x3dda, 0x2001, 0x020b, 0x2004, 0xd0e4, 0x0dd8,
- 0x2001, 0x032a, 0x2003, 0x0004, 0x2061, 0x0100, 0x6027, 0x0002,
- 0x001e, 0x6106, 0x2011, 0x020d, 0x2013, 0x0020, 0x60bb, 0x0000,
- 0x60bf, 0x0108, 0x60bf, 0x0012, 0x2001, 0x0004, 0x200c, 0x918c,
- 0xfffd, 0x2102, 0x080c, 0x12ee, 0x2009, 0x0028, 0x080c, 0x207b,
- 0x2001, 0x0227, 0x200c, 0x2102, 0x080c, 0x98e3, 0x00fe, 0x00ee,
- 0x00de, 0x00ce, 0x00be, 0x00ae, 0x009e, 0x008e, 0x004e, 0x2001,
- 0x1977, 0x2004, 0x9005, 0x1118, 0x012e, 0x0804, 0x339e, 0x012e,
- 0x2021, 0x400c, 0x0804, 0x33a0, 0x0016, 0x0026, 0x0036, 0x0046,
- 0x0056, 0x0076, 0x0086, 0x0096, 0x00d6, 0x0156, 0x7014, 0x2048,
- 0x7020, 0x20a8, 0x8000, 0x7022, 0xa804, 0x9005, 0x0904, 0x3a70,
- 0x2048, 0x1f04, 0x3a24, 0x7068, 0x2040, 0xa28c, 0xa390, 0xa494,
- 0xa598, 0xa930, 0xa808, 0xd0b4, 0x1120, 0x2029, 0x0000, 0x2021,
- 0x0000, 0x0096, 0x7014, 0x2048, 0xa864, 0x009e, 0x9086, 0x0103,
- 0x0170, 0x8906, 0x8006, 0x8007, 0x90bc, 0x003f, 0x9084, 0xffc0,
- 0x9080, 0x001b, 0x080c, 0x48e3, 0x701f, 0x3a14, 0x00b0, 0x8906,
- 0x8006, 0x8007, 0x90bc, 0x003f, 0x9084, 0xffc0, 0x9080, 0x001b,
- 0x21a8, 0x27e0, 0x2098, 0x27e8, 0x20a0, 0x0006, 0x080c, 0x0fac,
- 0x000e, 0x080c, 0x48e6, 0x701f, 0x3a14, 0x015e, 0x00de, 0x009e,
- 0x008e, 0x007e, 0x005e, 0x004e, 0x003e, 0x002e, 0x001e, 0x0005,
- 0x7014, 0x2048, 0xa864, 0x9086, 0x0103, 0x1118, 0x701f, 0x3ad5,
- 0x0450, 0x7014, 0x2048, 0xa868, 0xc0fd, 0xa86a, 0x2009, 0x007f,
- 0x080c, 0x622f, 0x0110, 0x9006, 0x0030, 0xb813, 0x00ff, 0xb817,
- 0xfffd, 0x080c, 0xbd58, 0x015e, 0x00de, 0x009e, 0x008e, 0x007e,
- 0x005e, 0x004e, 0x003e, 0x002e, 0x001e, 0x0904, 0x33d0, 0x0016,
- 0x0026, 0x0036, 0x0046, 0x0056, 0x0076, 0x0086, 0x0096, 0x00d6,
- 0x0156, 0x701f, 0x3aa7, 0x7007, 0x0003, 0x0804, 0x3a65, 0xa830,
- 0x9086, 0x0100, 0x2021, 0x400c, 0x0904, 0x33a0, 0x0076, 0xad10,
- 0xac0c, 0xab24, 0xaa20, 0xa930, 0xa808, 0xd0b4, 0x1120, 0x2029,
- 0x0000, 0x2021, 0x0000, 0x8906, 0x8006, 0x8007, 0x90bc, 0x003f,
- 0x9084, 0xffc0, 0x9080, 0x001b, 0x21a8, 0x27e0, 0x2098, 0x27e8,
- 0x20a0, 0x0006, 0x080c, 0x0fac, 0x000e, 0x080c, 0x48e6, 0x007e,
- 0x701f, 0x3a14, 0x7023, 0x0001, 0x0005, 0x0804, 0x339e, 0x0156,
- 0x00c6, 0xa814, 0x908a, 0x001e, 0x0218, 0xa833, 0x001e, 0x0010,
- 0xa832, 0x0078, 0x81ff, 0x0168, 0x0016, 0x080c, 0x489a, 0x001e,
- 0x0130, 0xa800, 0x2040, 0xa008, 0xa80a, 0x2100, 0x0c58, 0x9006,
- 0x0010, 0x9085, 0x0001, 0x00ce, 0x015e, 0x0005, 0x0006, 0x00f6,
- 0x2079, 0x0000, 0x7880, 0x9086, 0x0044, 0x00fe, 0x000e, 0x0005,
- 0x2001, 0x1977, 0x2003, 0x0001, 0x0005, 0x00f6, 0x00e6, 0x00c6,
- 0x2061, 0x0200, 0x2001, 0x1982, 0x2004, 0x601a, 0x2061, 0x0100,
- 0x2001, 0x1981, 0x2004, 0x60ce, 0x6104, 0xc1ac, 0x6106, 0x080c,
- 0x489a, 0xa813, 0x0019, 0xa817, 0x0001, 0x2900, 0xa85a, 0x2001,
- 0x002e, 0x2004, 0xa866, 0x2001, 0x002f, 0x2004, 0xa86a, 0x2061,
- 0x0090, 0x2079, 0x0100, 0x2001, 0x1981, 0x2004, 0x6036, 0x2009,
- 0x0040, 0x080c, 0x207b, 0x2001, 0x002a, 0x2004, 0x9084, 0xfff8,
- 0xa86e, 0x601a, 0xa873, 0x0000, 0x601f, 0x0000, 0x78ca, 0x9006,
- 0x600a, 0x600e, 0x00ce, 0x00ee, 0x00fe, 0x0005, 0x00e6, 0x080c,
- 0x489a, 0x2940, 0xa013, 0x0019, 0xa017, 0x0001, 0x2800, 0xa05a,
- 0x2001, 0x0030, 0x2004, 0xa866, 0x2001, 0x0031, 0x2004, 0xa86a,
- 0x2001, 0x002a, 0x2004, 0x9084, 0xfff8, 0xa86e, 0xa873, 0x0000,
- 0x2001, 0x032a, 0x2003, 0x0004, 0x2001, 0x0300, 0x2003, 0x0000,
- 0x2001, 0x020d, 0x2003, 0x0000, 0x2001, 0x0004, 0x200c, 0x918d,
- 0x0002, 0x2102, 0x00ee, 0x0005, 0x0126, 0x2091, 0x8000, 0x81ff,
- 0x0148, 0x080c, 0x2850, 0x1130, 0x9006, 0x080c, 0x27a3, 0x9006,
- 0x080c, 0x2786, 0x7884, 0x9084, 0x0007, 0x0002, 0x3b91, 0x3b9a,
- 0x3ba3, 0x3b8e, 0x3b8e, 0x3b8e, 0x3b8e, 0x3b8e, 0x012e, 0x0804,
- 0x33d3, 0x2009, 0x0114, 0x2104, 0x9085, 0x0800, 0x200a, 0x080c,
- 0x3d65, 0x00c0, 0x2009, 0x0114, 0x2104, 0x9085, 0x4000, 0x200a,
- 0x080c, 0x3d65, 0x0078, 0x080c, 0x70ba, 0x1128, 0x012e, 0x2009,
- 0x0016, 0x0804, 0x33d0, 0x81ff, 0x0128, 0x012e, 0x2021, 0x400b,
- 0x0804, 0x33a0, 0x080c, 0x98c7, 0x0086, 0x0096, 0x00a6, 0x00b6,
- 0x00c6, 0x00d6, 0x00e6, 0x00f6, 0x080c, 0x38bc, 0x2009, 0x0101,
- 0x210c, 0x0016, 0x7ec8, 0x7dcc, 0x9006, 0x2068, 0x2060, 0x2058,
- 0x080c, 0x4006, 0x080c, 0x3f56, 0x903e, 0x2720, 0x00f6, 0x00e6,
- 0x0086, 0x2940, 0x2071, 0x19bf, 0x2079, 0x0090, 0x00d6, 0x2069,
- 0x0000, 0x6884, 0xd0b4, 0x0120, 0x68d4, 0x780e, 0x68d0, 0x780a,
- 0x00de, 0x2011, 0x0001, 0x080c, 0x3eb7, 0x080c, 0x2858, 0x080c,
- 0x2858, 0x080c, 0x2858, 0x080c, 0x2858, 0x080c, 0x3eb7, 0x008e,
- 0x00ee, 0x00fe, 0x080c, 0x3de4, 0x2009, 0x9c40, 0x8109, 0x11b0,
- 0x080c, 0x3d1b, 0x2001, 0x0004, 0x200c, 0x918c, 0xfffd, 0x2102,
- 0x001e, 0x00fe, 0x00ee, 0x00de, 0x00ce, 0x00be, 0x00ae, 0x009e,
- 0x008e, 0x2009, 0x0017, 0x080c, 0x33d0, 0x0cf8, 0x2001, 0x020b,
- 0x2004, 0x9084, 0x0140, 0x1d10, 0x00f6, 0x2079, 0x0000, 0x7884,
- 0x00fe, 0xd0bc, 0x0178, 0x2001, 0x0201, 0x200c, 0x81ff, 0x0150,
- 0x080c, 0x3dc2, 0x2d00, 0x9c05, 0x9b05, 0x0120, 0x080c, 0x3d1b,
- 0x0804, 0x3cc4, 0x080c, 0x3f2b, 0x080c, 0x3e4f, 0x080c, 0x3da5,
- 0x080c, 0x3dda, 0x00f6, 0x2079, 0x0100, 0x7824, 0xd0ac, 0x0130,
- 0x8b58, 0x080c, 0x3d1b, 0x00fe, 0x0804, 0x3cc4, 0x00fe, 0x080c,
- 0x3d11, 0x1150, 0x8d68, 0x2001, 0x0032, 0x2602, 0x2001, 0x0033,
- 0x2502, 0x080c, 0x3d1b, 0x0080, 0x87ff, 0x0138, 0x2001, 0x0201,
- 0x2004, 0x9005, 0x1908, 0x8739, 0x0038, 0x2001, 0x1a43, 0x2004,
- 0x9086, 0x0000, 0x1904, 0x3c14, 0x2001, 0x032f, 0x2003, 0x00f6,
- 0x8631, 0x1208, 0x8529, 0x2500, 0x9605, 0x0904, 0x3cc4, 0x7884,
- 0xd0bc, 0x0128, 0x2d00, 0x9c05, 0x9b05, 0x1904, 0x3cc4, 0xa013,
- 0x0019, 0x2001, 0x032a, 0x2003, 0x0004, 0x7884, 0xd0ac, 0x1148,
- 0x2001, 0x1a43, 0x2003, 0x0003, 0x2001, 0x032a, 0x2003, 0x0009,
- 0x0030, 0xa017, 0x0001, 0x78b4, 0x9005, 0x0108, 0xa016, 0x2800,
- 0xa05a, 0x2009, 0x0040, 0x080c, 0x207b, 0x2900, 0xa85a, 0xa813,
- 0x0019, 0x7884, 0xd0a4, 0x1180, 0xa817, 0x0000, 0x00c6, 0x20a9,
- 0x0004, 0x2061, 0x0090, 0x602b, 0x0008, 0x2001, 0x0203, 0x2004,
- 0x1f04, 0x3c9b, 0x00ce, 0x0030, 0xa817, 0x0001, 0x78b0, 0x9005,
- 0x0108, 0xa816, 0x00f6, 0x00c6, 0x2079, 0x0100, 0x2061, 0x0090,
- 0x7827, 0x0002, 0x2001, 0x002a, 0x2004, 0x9084, 0xfff8, 0x601a,
- 0x0006, 0x2001, 0x002b, 0x2004, 0x601e, 0x78c6, 0x000e, 0x78ca,
- 0x00ce, 0x00fe, 0x0804, 0x3bce, 0x001e, 0x00c6, 0x2001, 0x032a,
- 0x2003, 0x0004, 0x2061, 0x0100, 0x6027, 0x0002, 0x6106, 0x2011,
- 0x020d, 0x2013, 0x0020, 0x2001, 0x0004, 0x200c, 0x918c, 0xfffd,
- 0x2102, 0x080c, 0x12ee, 0x7884, 0x9084, 0x0003, 0x9086, 0x0002,
- 0x01b0, 0x2009, 0x0028, 0x080c, 0x207b, 0x2001, 0x0227, 0x200c,
- 0x2102, 0x6050, 0x9084, 0xb7ff, 0x080c, 0x2902, 0x6052, 0x602f,
- 0x0000, 0x604b, 0xf7f7, 0x6043, 0x0090, 0x6043, 0x0010, 0x080c,
- 0x98e3, 0x00ce, 0x2d08, 0x2c10, 0x2b18, 0x2b00, 0x9c05, 0x9d05,
- 0x00fe, 0x00ee, 0x00de, 0x00ce, 0x00be, 0x00ae, 0x009e, 0x008e,
- 0x1118, 0x012e, 0x0804, 0x339e, 0x012e, 0x2021, 0x400c, 0x0804,
- 0x33a0, 0x9085, 0x0001, 0x1d04, 0x3d1a, 0x2091, 0x6000, 0x8420,
- 0x9486, 0x0064, 0x0005, 0x2001, 0x0105, 0x2003, 0x0010, 0x2001,
- 0x032a, 0x2003, 0x0004, 0x2001, 0x1a43, 0x2003, 0x0000, 0x0071,
- 0x2009, 0x0048, 0x080c, 0x207b, 0x2001, 0x0227, 0x2024, 0x2402,
- 0x2001, 0x0109, 0x2003, 0x4000, 0x9026, 0x0005, 0x00f6, 0x00e6,
- 0x2071, 0x19bf, 0x7054, 0x9086, 0x0000, 0x0520, 0x2079, 0x0090,
- 0x2009, 0x0206, 0x2104, 0x2009, 0x0203, 0x210c, 0x9106, 0x1120,
- 0x2009, 0x0040, 0x080c, 0x207b, 0x782c, 0xd0fc, 0x0d88, 0x080c,
- 0x3f2b, 0x7054, 0x9086, 0x0000, 0x1d58, 0x782b, 0x0004, 0x782c,
- 0xd0ac, 0x1de8, 0x2009, 0x0040, 0x080c, 0x207b, 0x782b, 0x0002,
- 0x7057, 0x0000, 0x00ee, 0x00fe, 0x0005, 0x00f6, 0x2079, 0x0100,
- 0x2001, 0x1817, 0x200c, 0x7932, 0x7936, 0x080c, 0x24a2, 0x080c,
- 0x28cf, 0x080c, 0x2902, 0x784b, 0xf7f7, 0x7843, 0x0090, 0x7843,
- 0x0010, 0x7850, 0xc0e5, 0x7852, 0x2019, 0x61a8, 0x7820, 0xd09c,
- 0x0110, 0x8319, 0x1dd8, 0x7850, 0xc0e4, 0x7852, 0x2011, 0x0048,
- 0x080c, 0x28ac, 0x7843, 0x0040, 0x2019, 0x01f4, 0xa001, 0xa001,
- 0x8319, 0x1de0, 0x2001, 0x0100, 0x080c, 0x2872, 0x2011, 0x0020,
- 0x080c, 0x28ac, 0x7843, 0x0000, 0x9006, 0x080c, 0x2872, 0x2011,
- 0x0048, 0x080c, 0x28ac, 0x00fe, 0x0005, 0x7884, 0xd0ac, 0x11c8,
- 0x00f6, 0x00e6, 0x2071, 0x1a43, 0x2079, 0x0320, 0x2001, 0x0201,
- 0x2004, 0x9005, 0x0160, 0x7000, 0x9086, 0x0000, 0x1140, 0x0051,
- 0xd0bc, 0x0108, 0x8738, 0x7003, 0x0003, 0x782b, 0x0019, 0x00ee,
- 0x00fe, 0x0005, 0x00f6, 0x2079, 0x0300, 0x78bc, 0x00fe, 0x908c,
- 0x0070, 0x0178, 0x2009, 0x0032, 0x260a, 0x2009, 0x0033, 0x250a,
- 0xd0b4, 0x0108, 0x8c60, 0xd0ac, 0x0108, 0x8d68, 0xd0a4, 0x0108,
- 0x8b58, 0x0005, 0x00f6, 0x2079, 0x0200, 0x781c, 0xd084, 0x0110,
- 0x7837, 0x0050, 0x00fe, 0x0005, 0x00e6, 0x2071, 0x0100, 0x2001,
- 0x1982, 0x2004, 0x70e2, 0x080c, 0x3af6, 0x1188, 0x2001, 0x181f,
- 0x2004, 0x2009, 0x181e, 0x210c, 0x918c, 0x00ff, 0x706e, 0x716a,
- 0x7066, 0x918d, 0x3200, 0x7162, 0x7073, 0xe109, 0x0080, 0x702c,
- 0x9085, 0x0002, 0x702e, 0x2009, 0x1817, 0x210c, 0x716e, 0x7063,
- 0x0100, 0x7166, 0x719e, 0x706b, 0x0000, 0x7073, 0x0809, 0x7077,
- 0x0008, 0x7078, 0x9080, 0x0100, 0x707a, 0x7080, 0x8000, 0x7082,
- 0x7087, 0xaaaa, 0x9006, 0x708a, 0x708e, 0x707e, 0x70d6, 0x70ab,
- 0x0036, 0x70af, 0x95d5, 0x7014, 0x9084, 0x1984, 0x9085, 0x0092,
- 0x7016, 0x080c, 0x3f2b, 0x00f6, 0x2071, 0x1a43, 0x2079, 0x0320,
- 0x00d6, 0x2069, 0x0000, 0x6884, 0xd0b4, 0x0120, 0x689c, 0x780e,
- 0x6898, 0x780a, 0x00de, 0x2009, 0x03e8, 0x8109, 0x1df0, 0x792c,
- 0xd1fc, 0x0110, 0x782b, 0x0004, 0x2011, 0x0011, 0x080c, 0x3eb7,
- 0x2011, 0x0001, 0x080c, 0x3eb7, 0x00fe, 0x00ee, 0x0005, 0x00f6,
- 0x00e6, 0x2071, 0x1a43, 0x2079, 0x0320, 0x792c, 0xd1fc, 0x0904,
- 0x3eb4, 0x782b, 0x0002, 0x9026, 0xd19c, 0x1904, 0x3eb0, 0x7000,
- 0x0002, 0x3eb4, 0x3e65, 0x3e95, 0x3eb0, 0xd1bc, 0x1170, 0xd1dc,
- 0x1190, 0x8001, 0x7002, 0x2011, 0x0001, 0x080c, 0x3eb7, 0x0904,
- 0x3eb4, 0x080c, 0x3eb7, 0x0804, 0x3eb4, 0x00f6, 0x2079, 0x0300,
- 0x78bf, 0x0000, 0x00fe, 0x7810, 0x7914, 0x782b, 0x0004, 0x7812,
- 0x7916, 0x2001, 0x0201, 0x200c, 0x81ff, 0x0de8, 0x080c, 0x3dc2,
- 0x2009, 0x0001, 0x00f6, 0x2079, 0x0300, 0x78b8, 0x00fe, 0xd0ec,
- 0x0110, 0x2009, 0x0011, 0x792a, 0x00f8, 0x8001, 0x7002, 0x9184,
- 0x0880, 0x1140, 0x782c, 0xd0fc, 0x1904, 0x3e59, 0x2011, 0x0001,
- 0x00b1, 0x0090, 0xa010, 0x9092, 0x0004, 0x9086, 0x0015, 0x1120,
- 0xa000, 0xa05a, 0x2011, 0x0031, 0xa212, 0xd1dc, 0x1960, 0x0828,
- 0x782b, 0x0004, 0x7003, 0x0000, 0x00ee, 0x00fe, 0x0005, 0xa014,
- 0x9005, 0x0550, 0x8001, 0x0036, 0x0096, 0xa016, 0xa058, 0x2048,
- 0xa010, 0x2009, 0x0031, 0x911a, 0x831c, 0x831c, 0x938a, 0x0007,
- 0x1a0c, 0x0d65, 0x9398, 0x3ee5, 0x231d, 0x083f, 0x9080, 0x0004,
- 0x7a2a, 0x7100, 0x8108, 0x7102, 0x009e, 0x003e, 0x908a, 0x0035,
- 0x1140, 0x0096, 0xa058, 0x2048, 0xa804, 0xa05a, 0x2001, 0x0019,
- 0x009e, 0xa012, 0x9085, 0x0001, 0x0005, 0x3f22, 0x3f19, 0x3f10,
- 0x3f07, 0x3efe, 0x3ef5, 0x3eec, 0xa964, 0x7902, 0xa968, 0x7906,
- 0xa96c, 0x7912, 0xa970, 0x7916, 0x0005, 0xa974, 0x7902, 0xa978,
- 0x7906, 0xa97c, 0x7912, 0xa980, 0x7916, 0x0005, 0xa984, 0x7902,
- 0xa988, 0x7906, 0xa98c, 0x7912, 0xa990, 0x7916, 0x0005, 0xa994,
- 0x7902, 0xa998, 0x7906, 0xa99c, 0x7912, 0xa9a0, 0x7916, 0x0005,
- 0xa9a4, 0x7902, 0xa9a8, 0x7906, 0xa9ac, 0x7912, 0xa9b0, 0x7916,
- 0x0005, 0xa9b4, 0x7902, 0xa9b8, 0x7906, 0xa9bc, 0x7912, 0xa9c0,
- 0x7916, 0x0005, 0xa9c4, 0x7902, 0xa9c8, 0x7906, 0xa9cc, 0x7912,
- 0xa9d0, 0x7916, 0x0005, 0x00f6, 0x00e6, 0x0086, 0x2071, 0x19bf,
- 0x2079, 0x0090, 0x792c, 0xd1fc, 0x01e8, 0x782b, 0x0002, 0x2940,
- 0x9026, 0x7054, 0x0002, 0x3f52, 0x3f3e, 0x3f49, 0x8001, 0x7056,
- 0xd19c, 0x1180, 0x2011, 0x0001, 0x080c, 0x3eb7, 0x190c, 0x3eb7,
- 0x0048, 0x8001, 0x7056, 0x782c, 0xd0fc, 0x1d38, 0x2011, 0x0001,
- 0x080c, 0x3eb7, 0x008e, 0x00ee, 0x00fe, 0x0005, 0x00f6, 0x00e6,
- 0x00c6, 0x0086, 0x2061, 0x0200, 0x2001, 0x1982, 0x2004, 0x601a,
- 0x2061, 0x0100, 0x2001, 0x1981, 0x2004, 0x60ce, 0x6104, 0xc1ac,
- 0x6106, 0x2001, 0x002c, 0x2004, 0x9005, 0x0520, 0x2038, 0x2001,
- 0x002e, 0x2024, 0x2001, 0x002f, 0x201c, 0x080c, 0x489a, 0xa813,
- 0x0019, 0xaf16, 0x2900, 0xa85a, 0x978a, 0x0007, 0x0220, 0x2138,
- 0x2009, 0x0007, 0x0010, 0x2708, 0x903e, 0x0096, 0xa858, 0x2048,
- 0xa85c, 0x9080, 0x0019, 0x009e, 0x080c, 0x3fce, 0x1d68, 0x2900,
- 0xa85a, 0x00d0, 0x080c, 0x489a, 0xa813, 0x0019, 0xa817, 0x0001,
- 0x2900, 0xa85a, 0x2001, 0x002e, 0x2004, 0xa866, 0x2001, 0x002f,
- 0x2004, 0xa86a, 0x2001, 0x002a, 0x2004, 0x9084, 0xfff8, 0xa86e,
- 0x2001, 0x002b, 0x2004, 0xa872, 0x2061, 0x0090, 0x2079, 0x0100,
- 0x2001, 0x1981, 0x2004, 0x6036, 0x2009, 0x0040, 0x080c, 0x207b,
- 0x2001, 0x002a, 0x2004, 0x9084, 0xfff8, 0x601a, 0x0006, 0x2001,
- 0x002b, 0x2004, 0x601e, 0x78c6, 0x000e, 0x78ca, 0x9006, 0x600a,
- 0x600e, 0x008e, 0x00ce, 0x00ee, 0x00fe, 0x0005, 0x00e6, 0x2071,
- 0x0080, 0xaa60, 0x22e8, 0x20a0, 0x20e1, 0x0000, 0x2099, 0x0088,
- 0x702b, 0x0026, 0x7402, 0x7306, 0x9006, 0x700a, 0x700e, 0x810b,
- 0x810b, 0x21a8, 0x810b, 0x7112, 0x702b, 0x0041, 0x702c, 0xd0fc,
- 0x0de8, 0x702b, 0x0002, 0x702b, 0x0040, 0x4005, 0x7400, 0x7304,
- 0x87ff, 0x0190, 0x0086, 0x0096, 0x2940, 0x0086, 0x080c, 0x489a,
- 0x008e, 0xa058, 0x00a6, 0x2050, 0x2900, 0xb006, 0xa05a, 0x00ae,
- 0x009e, 0x008e, 0x9085, 0x0001, 0x00ee, 0x0005, 0x00e6, 0x2001,
- 0x002d, 0x2004, 0x9005, 0x0528, 0x2038, 0x2001, 0x0030, 0x2024,
- 0x2001, 0x0031, 0x201c, 0x080c, 0x489a, 0x2940, 0xa813, 0x0019,
- 0xaf16, 0x2900, 0xa85a, 0x978a, 0x0007, 0x0220, 0x2138, 0x2009,
- 0x0007, 0x0010, 0x2708, 0x903e, 0x0096, 0xa858, 0x2048, 0xa85c,
- 0x9080, 0x0019, 0x009e, 0x080c, 0x3fce, 0x1d68, 0x2900, 0xa85a,
- 0x00d8, 0x080c, 0x489a, 0x2940, 0xa013, 0x0019, 0xa017, 0x0001,
- 0x2800, 0xa05a, 0x2001, 0x0030, 0x2004, 0xa066, 0x2001, 0x0031,
- 0x2004, 0xa06a, 0x2001, 0x002a, 0x2004, 0x9084, 0xfff8, 0xa06e,
- 0x2001, 0x002b, 0x2004, 0xa072, 0x2001, 0x032a, 0x2003, 0x0004,
- 0x7884, 0xd0ac, 0x1180, 0x2001, 0x0101, 0x200c, 0x918d, 0x0200,
- 0x2102, 0xa017, 0x0000, 0x2001, 0x1a43, 0x2003, 0x0003, 0x2001,
- 0x032a, 0x2003, 0x0009, 0x2001, 0x0300, 0x2003, 0x0000, 0x2001,
- 0x020d, 0x2003, 0x0000, 0x2001, 0x0004, 0x200c, 0x918d, 0x0002,
- 0x2102, 0x00ee, 0x0005, 0x0126, 0x2091, 0x8000, 0x20a9, 0x001b,
- 0x20a1, 0x1840, 0x20e9, 0x0001, 0x9006, 0x4004, 0x2009, 0x013c,
- 0x200a, 0x012e, 0x7880, 0x9086, 0x0052, 0x0108, 0x0005, 0x0804,
- 0x339e, 0x7d98, 0x7c9c, 0x0804, 0x34a0, 0x080c, 0x70ba, 0x190c,
- 0x5cbc, 0x2069, 0x185b, 0x2d00, 0x2009, 0x0030, 0x7a8c, 0x7b88,
- 0x7c9c, 0x7d98, 0x2039, 0x0001, 0x080c, 0x48e3, 0x701f, 0x40a1,
- 0x0005, 0x080c, 0x53b7, 0x1130, 0x3b00, 0x3a08, 0xc194, 0xc095,
- 0x20d8, 0x21d0, 0x2069, 0x185b, 0x6800, 0x9005, 0x0904, 0x33d3,
- 0x6804, 0xd094, 0x00c6, 0x2061, 0x0100, 0x6104, 0x0138, 0x6200,
- 0x9292, 0x0005, 0x0218, 0x918c, 0xffdf, 0x0010, 0x918d, 0x0020,
- 0x6106, 0x00ce, 0xd08c, 0x00c6, 0x2061, 0x0100, 0x6104, 0x0118,
- 0x918d, 0x0010, 0x0010, 0x918c, 0xffef, 0x6106, 0x00ce, 0xd084,
- 0x0158, 0x6a28, 0x928a, 0x007f, 0x1a04, 0x33d3, 0x9288, 0x319f,
- 0x210d, 0x918c, 0x00ff, 0x6162, 0xd0dc, 0x0130, 0x6828, 0x908a,
- 0x007f, 0x1a04, 0x33d3, 0x605a, 0x6888, 0x9084, 0x0030, 0x8004,
- 0x8004, 0x8004, 0x8004, 0x0006, 0x2009, 0x1989, 0x9080, 0x2595,
- 0x2005, 0x200a, 0x2008, 0x2001, 0x0018, 0x080c, 0x98b8, 0x2009,
- 0x0390, 0x200b, 0x0400, 0x000e, 0x2009, 0x198a, 0x9080, 0x2599,
- 0x2005, 0x200a, 0x6808, 0x908a, 0x0100, 0x0a04, 0x33d3, 0x908a,
- 0x0841, 0x1a04, 0x33d3, 0x9084, 0x0007, 0x1904, 0x33d3, 0x680c,
- 0x9005, 0x0904, 0x33d3, 0x6810, 0x9005, 0x0904, 0x33d3, 0x6848,
- 0x6940, 0x910a, 0x1a04, 0x33d3, 0x8001, 0x0904, 0x33d3, 0x684c,
- 0x6944, 0x910a, 0x1a04, 0x33d3, 0x8001, 0x0904, 0x33d3, 0x6814,
- 0x908c, 0x00ff, 0x614a, 0x8007, 0x9084, 0x00ff, 0x604e, 0x080c,
- 0x73ea, 0x080c, 0x6753, 0x080c, 0x6788, 0x6808, 0x602a, 0x080c,
- 0x1fed, 0x2009, 0x0170, 0x200b, 0x0080, 0xa001, 0xa001, 0x200b,
- 0x0000, 0x0036, 0x6b08, 0x080c, 0x24fc, 0x003e, 0x6000, 0x9086,
- 0x0000, 0x1904, 0x420d, 0x6818, 0x691c, 0x6a20, 0x6b24, 0x8007,
- 0x810f, 0x8217, 0x831f, 0x6016, 0x611a, 0x621e, 0x6322, 0x6c04,
- 0xd4f4, 0x0148, 0x6830, 0x6934, 0x6a38, 0x6b3c, 0x8007, 0x810f,
- 0x8217, 0x831f, 0x0010, 0x9084, 0xf0ff, 0x6006, 0x610a, 0x620e,
- 0x6312, 0x8007, 0x810f, 0x8217, 0x831f, 0x20a9, 0x0004, 0x20a1,
- 0x198b, 0x20e9, 0x0001, 0x4001, 0x20a9, 0x0004, 0x20a1, 0x19a5,
- 0x20e9, 0x0001, 0x4001, 0x080c, 0x82e3, 0x00c6, 0x900e, 0x20a9,
- 0x0001, 0x6b70, 0xd384, 0x01c8, 0x0020, 0x839d, 0x12b0, 0x3508,
- 0x8109, 0x080c, 0x79c1, 0x6878, 0x6016, 0x6874, 0x2008, 0x9084,
- 0xff00, 0x8007, 0x600a, 0x9184, 0x00ff, 0x6006, 0x8108, 0x1118,
- 0x6003, 0x0003, 0x0010, 0x6003, 0x0001, 0x1f04, 0x4185, 0x00ce,
- 0x00c6, 0x2061, 0x1974, 0x2063, 0x0001, 0x9006, 0x080c, 0x27a3,
- 0x9006, 0x080c, 0x2786, 0x0000, 0x00ce, 0x00e6, 0x2c70, 0x080c,
- 0x0ea9, 0x00ee, 0x6888, 0xd0ec, 0x0130, 0x2011, 0x0114, 0x2204,
- 0x9085, 0x0180, 0x2012, 0x6a80, 0x9284, 0x0030, 0x9086, 0x0030,
- 0x1128, 0x9294, 0xffcf, 0x9295, 0x0020, 0x6a82, 0x2001, 0x1954,
- 0x6a80, 0x9294, 0x0030, 0x928e, 0x0000, 0x0170, 0x928e, 0x0010,
- 0x0118, 0x928e, 0x0020, 0x0140, 0x2003, 0xaaaa, 0x080c, 0x2571,
- 0x2001, 0x1945, 0x2102, 0x0008, 0x2102, 0x00c6, 0x2061, 0x0100,
- 0x602f, 0x0040, 0x602f, 0x0000, 0x00ce, 0x080c, 0x70ba, 0x0128,
- 0x080c, 0x4cac, 0x0110, 0x080c, 0x24c2, 0x60d0, 0x9005, 0x01c0,
- 0x6003, 0x0001, 0x2009, 0x41f5, 0x00d0, 0x080c, 0x70ba, 0x1168,
- 0x2011, 0x6f30, 0x080c, 0x816c, 0x2011, 0x6f23, 0x080c, 0x8272,
- 0x080c, 0x73be, 0x080c, 0x6feb, 0x0040, 0x080c, 0x5bb2, 0x0028,
- 0x6003, 0x0004, 0x2009, 0x420d, 0x0010, 0x0804, 0x339e, 0x2001,
- 0x0170, 0x2004, 0x9084, 0x00ff, 0x9086, 0x004c, 0x1118, 0x2091,
- 0x31bd, 0x0817, 0x2091, 0x313d, 0x0817, 0x6000, 0x9086, 0x0000,
- 0x0904, 0x33d0, 0x2069, 0x185b, 0x7890, 0x6842, 0x7894, 0x6846,
- 0x2d00, 0x2009, 0x0030, 0x7a8c, 0x7b88, 0x7c9c, 0x7d98, 0x2039,
- 0x0001, 0x0804, 0x48e6, 0x9006, 0x080c, 0x24c2, 0x81ff, 0x1904,
- 0x33d0, 0x080c, 0x70ba, 0x11b0, 0x080c, 0x73b9, 0x080c, 0x5cf7,
- 0x080c, 0x319a, 0x0118, 0x6130, 0xc18d, 0x6132, 0x080c, 0xbf8f,
- 0x0130, 0x080c, 0x70dd, 0x1118, 0x080c, 0x708e, 0x0038, 0x080c,
- 0x6feb, 0x0020, 0x080c, 0x5cbc, 0x080c, 0x5bb2, 0x0804, 0x339e,
- 0x81ff, 0x1904, 0x33d0, 0x080c, 0x70ba, 0x1110, 0x0804, 0x33d0,
- 0x6190, 0x81ff, 0x01a8, 0x704f, 0x0000, 0x2001, 0x1d80, 0x2009,
- 0x0040, 0x7a8c, 0x7b88, 0x7c9c, 0x7d98, 0x0126, 0x2091, 0x8000,
- 0x2039, 0x0001, 0x080c, 0x48e6, 0x701f, 0x339c, 0x012e, 0x0005,
- 0x704f, 0x0001, 0x00d6, 0x2069, 0x1d80, 0x20a9, 0x0040, 0x20e9,
- 0x0001, 0x20a1, 0x1d80, 0x2019, 0xffff, 0x4304, 0x6558, 0x9588,
- 0x319f, 0x210d, 0x918c, 0x00ff, 0x216a, 0x900e, 0x2011, 0x0002,
- 0x2100, 0x9506, 0x01a8, 0x080c, 0x628f, 0x1190, 0xb814, 0x821c,
- 0x0238, 0x9398, 0x1d80, 0x9085, 0xff00, 0x8007, 0x201a, 0x0038,
- 0x9398, 0x1d80, 0x2324, 0x94a4, 0xff00, 0x9405, 0x201a, 0x8210,
- 0x8108, 0x9182, 0x0080, 0x1208, 0x0c18, 0x8201, 0x8007, 0x2d0c,
- 0x9105, 0x206a, 0x00de, 0x20a9, 0x0040, 0x20a1, 0x1d80, 0x2099,
- 0x1d80, 0x080c, 0x5c47, 0x0804, 0x4265, 0x080c, 0x48cd, 0x0904,
- 0x33d3, 0x080c, 0x489a, 0x1120, 0x2009, 0x0002, 0x0804, 0x33d0,
- 0x080c, 0x53a8, 0xd0b4, 0x0558, 0x7884, 0x908e, 0x007e, 0x0538,
- 0x908e, 0x007f, 0x0520, 0x908e, 0x0080, 0x0508, 0x080c, 0x3195,
- 0x1148, 0xb800, 0xd08c, 0x11d8, 0xb804, 0x9084, 0x00ff, 0x9086,
- 0x0006, 0x11a8, 0xa867, 0x0000, 0xa868, 0xc0fd, 0xa86a, 0x080c,
- 0xba3f, 0x1120, 0x2009, 0x0003, 0x0804, 0x33d0, 0x7007, 0x0003,
- 0x701f, 0x42f3, 0x0005, 0x080c, 0x48cd, 0x0904, 0x33d3, 0x20a9,
- 0x002b, 0xb8b4, 0x20e0, 0xb8b8, 0x2098, 0xa860, 0x20e8, 0xa85c,
- 0x9080, 0x0002, 0x20a0, 0x4003, 0x20a9, 0x0008, 0x9080, 0x0006,
- 0x20a0, 0xb8b4, 0x20e0, 0xb8b8, 0x9080, 0x0006, 0x2098, 0x080c,
- 0x0fac, 0x0070, 0x20a9, 0x0004, 0xa85c, 0x9080, 0x000a, 0x20a0,
- 0xb8b4, 0x20e0, 0xb8b8, 0x9080, 0x000a, 0x2098, 0x080c, 0x0fac,
- 0x8906, 0x8006, 0x8007, 0x90bc, 0x003f, 0x9084, 0xffc0, 0x9080,
- 0x0002, 0x2009, 0x002b, 0x7a8c, 0x7b88, 0x7c9c, 0x7d98, 0x0804,
- 0x48e6, 0x81ff, 0x1904, 0x33d0, 0x080c, 0x48b1, 0x0904, 0x33d3,
- 0x080c, 0x64d4, 0x0904, 0x33d0, 0x0058, 0xa878, 0x9005, 0x0120,
- 0x2009, 0x0004, 0x0804, 0x33d0, 0xa974, 0xaa94, 0x0804, 0x339e,
- 0x080c, 0x53b0, 0x0904, 0x339e, 0x701f, 0x433d, 0x7007, 0x0003,
- 0x0005, 0x81ff, 0x1904, 0x33d0, 0x7888, 0x908a, 0x1000, 0x1a04,
- 0x33d3, 0x080c, 0x48cd, 0x0904, 0x33d3, 0x080c, 0x668a, 0x0120,
- 0x080c, 0x6692, 0x1904, 0x33d3, 0x080c, 0x6559, 0x0904, 0x33d0,
- 0x2019, 0x0004, 0x900e, 0x080c, 0x64e6, 0x0904, 0x33d0, 0x7984,
- 0x7a88, 0x04c9, 0x08a8, 0xa89c, 0x908a, 0x1000, 0x12f8, 0x080c,
- 0x48cb, 0x01e0, 0x080c, 0x668a, 0x0118, 0x080c, 0x6692, 0x11b0,
- 0x080c, 0x6559, 0x2009, 0x0002, 0x0168, 0x2009, 0x0002, 0x2019,
- 0x0004, 0x080c, 0x64e6, 0x2009, 0x0003, 0x0120, 0xa998, 0xaa9c,
- 0x00d1, 0x0060, 0xa897, 0x4005, 0xa99a, 0x0010, 0xa897, 0x4006,
- 0x900e, 0x9085, 0x0001, 0x2001, 0x0030, 0x0005, 0xa897, 0x4000,
- 0x080c, 0x53b0, 0x0110, 0x9006, 0x0018, 0x900e, 0x9085, 0x0001,
- 0x2001, 0x0000, 0x0005, 0x9186, 0x00ff, 0x0110, 0x0071, 0x0060,
- 0x2029, 0x007e, 0x2061, 0x1800, 0x6458, 0x2400, 0x9506, 0x0110,
- 0x2508, 0x0019, 0x8529, 0x1ec8, 0x0005, 0x080c, 0x628f, 0x1138,
- 0x2200, 0x8003, 0x800b, 0x810b, 0x9108, 0x080c, 0x817a, 0x0005,
- 0x81ff, 0x1904, 0x33d0, 0x798c, 0x2001, 0x1958, 0x918c, 0x8000,
- 0x2102, 0x080c, 0x48b1, 0x0904, 0x33d3, 0x080c, 0x668a, 0x0120,
- 0x080c, 0x6692, 0x1904, 0x33d3, 0x080c, 0x6356, 0x0904, 0x33d0,
- 0x080c, 0x64dd, 0x0904, 0x33d0, 0x2001, 0x1958, 0x2004, 0xd0fc,
- 0x1904, 0x339e, 0x0804, 0x4348, 0xa9a0, 0x2001, 0x1958, 0x918c,
- 0x8000, 0xc18d, 0x2102, 0x080c, 0x48be, 0x01a0, 0x080c, 0x668a,
- 0x0118, 0x080c, 0x6692, 0x1170, 0x080c, 0x6356, 0x2009, 0x0002,
- 0x0128, 0x080c, 0x64dd, 0x1170, 0x2009, 0x0003, 0xa897, 0x4005,
- 0xa99a, 0x0010, 0xa897, 0x4006, 0x900e, 0x9085, 0x0001, 0x2001,
- 0x0030, 0x0005, 0xa897, 0x4000, 0x2001, 0x1958, 0x2004, 0xd0fc,
- 0x1128, 0x080c, 0x53b0, 0x0110, 0x9006, 0x0018, 0x900e, 0x9085,
- 0x0001, 0x2001, 0x0000, 0x0005, 0x81ff, 0x1904, 0x33d0, 0x798c,
- 0x2001, 0x1957, 0x918c, 0x8000, 0x2102, 0x080c, 0x48b1, 0x0904,
- 0x33d3, 0x080c, 0x668a, 0x0120, 0x080c, 0x6692, 0x1904, 0x33d3,
- 0x080c, 0x6356, 0x0904, 0x33d0, 0x080c, 0x64cb, 0x0904, 0x33d0,
- 0x2001, 0x1957, 0x2004, 0xd0fc, 0x1904, 0x339e, 0x0804, 0x4348,
- 0xa9a0, 0x2001, 0x1957, 0x918c, 0x8000, 0xc18d, 0x2102, 0x080c,
- 0x48be, 0x01a0, 0x080c, 0x668a, 0x0118, 0x080c, 0x6692, 0x1170,
- 0x080c, 0x6356, 0x2009, 0x0002, 0x0128, 0x080c, 0x64cb, 0x1170,
- 0x2009, 0x0003, 0xa897, 0x4005, 0xa99a, 0x0010, 0xa897, 0x4006,
- 0x900e, 0x9085, 0x0001, 0x2001, 0x0030, 0x0005, 0xa897, 0x4000,
- 0x2001, 0x1957, 0x2004, 0xd0fc, 0x1128, 0x080c, 0x53b0, 0x0110,
- 0x9006, 0x0018, 0x900e, 0x9085, 0x0001, 0x2001, 0x0000, 0x0005,
- 0x6100, 0x0804, 0x339e, 0x080c, 0x48cd, 0x0904, 0x33d3, 0x080c,
- 0x53bc, 0x1904, 0x33d0, 0x79a8, 0xd184, 0x1158, 0xb834, 0x8007,
- 0x789e, 0xb830, 0x8007, 0x789a, 0xbb2c, 0x831f, 0xba28, 0x8217,
- 0x0050, 0xb824, 0x8007, 0x789e, 0xb820, 0x8007, 0x789a, 0xbb1c,
- 0x831f, 0xba18, 0x8217, 0xb900, 0x918c, 0x0200, 0x0804, 0x339e,
- 0x78a8, 0x909c, 0x0003, 0xd0ac, 0x1150, 0xd0b4, 0x1140, 0x939a,
- 0x0003, 0x1a04, 0x33d0, 0x6258, 0x7884, 0x9206, 0x1550, 0x2031,
- 0x1848, 0x2009, 0x013c, 0x2136, 0x2001, 0x1840, 0x7a8c, 0x7b88,
- 0x7c9c, 0x7d98, 0x2039, 0x0001, 0x0006, 0x78a8, 0x9084, 0x0080,
- 0x1118, 0x000e, 0x0804, 0x48e6, 0x000e, 0x2031, 0x0000, 0x2061,
- 0x18b6, 0x2c44, 0xa66a, 0xa17a, 0xa772, 0xa076, 0xa28e, 0xa392,
- 0xa496, 0xa59a, 0x080c, 0x1124, 0x7007, 0x0002, 0x701f, 0x4501,
- 0x0005, 0x81ff, 0x1904, 0x33d0, 0x080c, 0x48cd, 0x0904, 0x33d3,
- 0x080c, 0x668a, 0x1904, 0x33d0, 0x00c6, 0x080c, 0x489a, 0x00ce,
- 0x0904, 0x33d0, 0xa867, 0x0000, 0xa868, 0xc0fd, 0xa86a, 0x7ea8,
- 0x080c, 0xb9e5, 0x0904, 0x33d0, 0x7007, 0x0003, 0x701f, 0x4505,
- 0x0005, 0x080c, 0x4073, 0x0804, 0x339e, 0xa830, 0x9086, 0x0100,
- 0x0904, 0x33d0, 0x8906, 0x8006, 0x8007, 0x90bc, 0x003f, 0x9084,
- 0xffc0, 0x9080, 0x001b, 0x2009, 0x000c, 0x7a8c, 0x7b88, 0x7c9c,
- 0x7d98, 0x0804, 0x48e6, 0x9006, 0x080c, 0x24c2, 0x78a8, 0x9084,
- 0x00ff, 0x9086, 0x00ff, 0x0118, 0x81ff, 0x1904, 0x33d0, 0x080c,
- 0x70ba, 0x0110, 0x080c, 0x5cbc, 0x7888, 0x908a, 0x1000, 0x1a04,
- 0x33d3, 0x7984, 0x9186, 0x00ff, 0x0138, 0x9182, 0x007f, 0x1a04,
- 0x33d3, 0x2100, 0x080c, 0x248c, 0x0026, 0x00c6, 0x0126, 0x2091,
- 0x8000, 0x2061, 0x19db, 0x601b, 0x0000, 0x601f, 0x0000, 0x6073,
- 0x0000, 0x6077, 0x0000, 0x080c, 0x70ba, 0x1158, 0x080c, 0x73b9,
- 0x080c, 0x5cf7, 0x9085, 0x0001, 0x080c, 0x7101, 0x080c, 0x6feb,
- 0x00f0, 0x080c, 0x98c7, 0x080c, 0x9b6c, 0x080c, 0x98e3, 0x2061,
- 0x0100, 0x2001, 0x1817, 0x2004, 0x9084, 0x00ff, 0x810f, 0x9105,
- 0x604a, 0x6043, 0x0090, 0x6043, 0x0010, 0x2009, 0x1971, 0x200b,
- 0x0000, 0x2009, 0x002d, 0x2011, 0x5be2, 0x080c, 0x8230, 0x7984,
- 0x080c, 0x70ba, 0x1110, 0x2009, 0x00ff, 0x7a88, 0x080c, 0x43ab,
- 0x012e, 0x00ce, 0x002e, 0x0804, 0x339e, 0x7984, 0x080c, 0x622f,
- 0x2b08, 0x1904, 0x33d3, 0x0804, 0x339e, 0x81ff, 0x0120, 0x2009,
- 0x0001, 0x0804, 0x33d0, 0x60d8, 0xd0ac, 0x1130, 0xd09c, 0x1120,
- 0x2009, 0x0005, 0x0804, 0x33d0, 0x080c, 0x489a, 0x1120, 0x2009,
- 0x0002, 0x0804, 0x33d0, 0x7984, 0x9192, 0x0021, 0x1a04, 0x33d3,
- 0x7a8c, 0x7b88, 0x7c9c, 0x7d98, 0xa85c, 0x9080, 0x0019, 0x702a,
- 0xaf60, 0x7736, 0x080c, 0x48e3, 0x701f, 0x45bd, 0x7880, 0x9086,
- 0x006e, 0x0110, 0x701f, 0x4e5e, 0x0005, 0x2009, 0x0080, 0x080c,
- 0x628f, 0x1118, 0x080c, 0x668a, 0x0120, 0x2021, 0x400a, 0x0804,
- 0x33a0, 0x00d6, 0x0096, 0xa964, 0xaa6c, 0xab70, 0xac74, 0xad78,
- 0xae7c, 0xa884, 0x90be, 0x0100, 0x0904, 0x4656, 0x90be, 0x0112,
- 0x0904, 0x4656, 0x90be, 0x0113, 0x0904, 0x4656, 0x90be, 0x0114,
- 0x0904, 0x4656, 0x90be, 0x0117, 0x0904, 0x4656, 0x90be, 0x011a,
- 0x0904, 0x4656, 0x90be, 0x011c, 0x0904, 0x4656, 0x90be, 0x0121,
- 0x0904, 0x463d, 0x90be, 0x0131, 0x0904, 0x463d, 0x90be, 0x0171,
- 0x0904, 0x4656, 0x90be, 0x0173, 0x0904, 0x4656, 0x90be, 0x01a1,
- 0x1128, 0xa894, 0x8007, 0xa896, 0x0804, 0x4661, 0x90be, 0x0212,
- 0x0904, 0x464a, 0x90be, 0x0213, 0x05e8, 0x90be, 0x0214, 0x0500,
- 0x90be, 0x0217, 0x0188, 0x90be, 0x021a, 0x1120, 0xa89c, 0x8007,
- 0xa89e, 0x04e0, 0x90be, 0x021f, 0x05c8, 0x90be, 0x0300, 0x05b0,
- 0x009e, 0x00de, 0x0804, 0x33d3, 0x7028, 0x9080, 0x0010, 0x2098,
- 0x20a0, 0x7034, 0x20e0, 0x20e8, 0x20a9, 0x0007, 0x080c, 0x469f,
- 0x7028, 0x9080, 0x000e, 0x2098, 0x20a0, 0x7034, 0x20e0, 0x20e8,
- 0x20a9, 0x0001, 0x080c, 0x469f, 0x00c8, 0x7028, 0x9080, 0x000c,
- 0x2098, 0x20a0, 0x7034, 0x20e0, 0x20e8, 0x20a9, 0x0001, 0x080c,
- 0x46ac, 0x00b8, 0x7028, 0x9080, 0x000e, 0x2098, 0x20a0, 0x7034,
- 0x20e0, 0x20e8, 0x20a9, 0x0001, 0x080c, 0x46ac, 0x7028, 0x9080,
- 0x000c, 0x2098, 0x20a0, 0x7034, 0x20e0, 0x20e8, 0x20a9, 0x0001,
- 0x04f1, 0x00c6, 0x080c, 0x489a, 0x0550, 0xa868, 0xc0fd, 0xa86a,
- 0xa867, 0x0119, 0x9006, 0xa882, 0xa87f, 0x0020, 0xa88b, 0x0001,
- 0x810b, 0xa9ae, 0xa8b2, 0xaab6, 0xabba, 0xacbe, 0xadc2, 0xa9c6,
- 0xa8ca, 0x00ce, 0x009e, 0x00de, 0xa866, 0xa822, 0xa868, 0xc0fd,
- 0xa86a, 0xa804, 0x2048, 0x080c, 0xba00, 0x1120, 0x2009, 0x0003,
- 0x0804, 0x33d0, 0x7007, 0x0003, 0x701f, 0x4696, 0x0005, 0x00ce,
- 0x009e, 0x00de, 0x2009, 0x0002, 0x0804, 0x33d0, 0xa820, 0x9086,
- 0x8001, 0x1904, 0x339e, 0x2009, 0x0004, 0x0804, 0x33d0, 0x0016,
- 0x0026, 0x3510, 0x20a9, 0x0002, 0x4002, 0x4104, 0x4004, 0x8211,
- 0x1dc8, 0x002e, 0x001e, 0x0005, 0x0016, 0x0026, 0x0036, 0x0046,
- 0x3520, 0x20a9, 0x0004, 0x4002, 0x4304, 0x4204, 0x4104, 0x4004,
- 0x8421, 0x1db8, 0x004e, 0x003e, 0x002e, 0x001e, 0x0005, 0x81ff,
- 0x0120, 0x2009, 0x0001, 0x0804, 0x33d0, 0x60d8, 0xd0ac, 0x1160,
- 0xd09c, 0x0120, 0x2009, 0x0016, 0x0804, 0x33d0, 0xd09c, 0x1120,
- 0x2009, 0x0005, 0x0804, 0x33d0, 0x7984, 0x78a8, 0x2040, 0x080c,
- 0x9b65, 0x1120, 0x9182, 0x007f, 0x0a04, 0x33d3, 0x9186, 0x00ff,
- 0x0904, 0x33d3, 0x9182, 0x0800, 0x1a04, 0x33d3, 0x7a8c, 0x7b88,
- 0x6078, 0x9306, 0x1158, 0x607c, 0x924e, 0x0904, 0x33d3, 0x080c,
- 0x9b65, 0x1120, 0x99cc, 0xff00, 0x0904, 0x33d3, 0x0126, 0x2091,
- 0x8000, 0x0026, 0x2011, 0x8008, 0x080c, 0x66ae, 0x002e, 0x0140,
- 0x918d, 0x8000, 0x080c, 0x66f8, 0x1118, 0x2001, 0x4009, 0x0458,
- 0x080c, 0x47b4, 0x0560, 0x90c6, 0x4000, 0x1170, 0x00c6, 0x0006,
- 0x900e, 0x080c, 0x6582, 0x1108, 0xc185, 0xb800, 0xd0bc, 0x0108,
- 0xc18d, 0x000e, 0x00ce, 0x00b8, 0x90c6, 0x4007, 0x1110, 0x2408,
- 0x0090, 0x90c6, 0x4008, 0x1118, 0x2708, 0x2610, 0x0060, 0x90c6,
- 0x4009, 0x1108, 0x0040, 0x90c6, 0x4006, 0x1108, 0x0020, 0x2001,
- 0x4005, 0x2009, 0x000a, 0x2020, 0x012e, 0x0804, 0x33a0, 0x2b00,
- 0x7026, 0x0016, 0x00b6, 0x00c6, 0x00e6, 0x2c70, 0x080c, 0x9c55,
- 0x0904, 0x4781, 0x2b00, 0x6012, 0x080c, 0xbd09, 0x2e58, 0x00ee,
- 0x00e6, 0x00c6, 0x080c, 0x489a, 0x00ce, 0x2b70, 0x1158, 0x080c,
- 0x9be6, 0x00ee, 0x00ce, 0x00be, 0x001e, 0x012e, 0x2009, 0x0002,
- 0x0804, 0x33d0, 0x900e, 0xa966, 0xa96a, 0x2900, 0x6016, 0xa932,
- 0xa868, 0xc0fd, 0xd88c, 0x0108, 0xc0f5, 0xa86a, 0x080c, 0x302e,
- 0x6023, 0x0001, 0x9006, 0x080c, 0x61cc, 0x2001, 0x0002, 0x080c,
- 0x61e0, 0x2009, 0x0002, 0x080c, 0x9c82, 0x78a8, 0xd094, 0x0138,
- 0x00ee, 0x7024, 0x00e6, 0x2058, 0xb8c4, 0xc08d, 0xb8c6, 0x9085,
- 0x0001, 0x00ee, 0x00ce, 0x00be, 0x001e, 0x012e, 0x1120, 0x2009,
- 0x0003, 0x0804, 0x33d0, 0x7007, 0x0003, 0x701f, 0x4790, 0x0005,
- 0xa830, 0x2008, 0x918e, 0xdead, 0x1120, 0x2021, 0x4009, 0x0804,
- 0x33a0, 0x9086, 0x0100, 0x7024, 0x2058, 0x1138, 0x2009, 0x0004,
- 0xba04, 0x9294, 0x00ff, 0x0804, 0x5305, 0x900e, 0xa868, 0xd0f4,
- 0x1904, 0x339e, 0x080c, 0x6582, 0x1108, 0xc185, 0xb800, 0xd0bc,
- 0x0108, 0xc18d, 0x0804, 0x339e, 0x00e6, 0x00d6, 0x0096, 0x83ff,
- 0x0904, 0x47fc, 0x902e, 0x080c, 0x9b65, 0x0130, 0x9026, 0x20a9,
- 0x0800, 0x2071, 0x1000, 0x0030, 0x2021, 0x007f, 0x20a9, 0x0781,
- 0x2071, 0x107f, 0x2e04, 0x9005, 0x11b0, 0x2100, 0x9406, 0x15e8,
- 0x2428, 0x94ce, 0x007f, 0x1120, 0x92ce, 0xfffd, 0x1528, 0x0030,
- 0x94ce, 0x0080, 0x1130, 0x92ce, 0xfffc, 0x11f0, 0x93ce, 0x00ff,
- 0x11d8, 0xc5fd, 0x0450, 0x2058, 0xbf10, 0x2700, 0x9306, 0x11b8,
- 0xbe14, 0x2600, 0x9206, 0x1198, 0x2400, 0x9106, 0x1150, 0xd884,
- 0x0568, 0xd894, 0x1558, 0x080c, 0x668a, 0x1540, 0x2001, 0x4000,
- 0x0430, 0x2001, 0x4007, 0x0418, 0x2001, 0x4006, 0x0400, 0x2400,
- 0x9106, 0x1158, 0xbe14, 0x87ff, 0x1128, 0x86ff, 0x0948, 0x080c,
- 0x9b65, 0x1930, 0x2001, 0x4008, 0x0090, 0x8420, 0x8e70, 0x1f04,
- 0x47ca, 0x85ff, 0x1130, 0x2001, 0x4009, 0x0048, 0x2001, 0x0001,
- 0x0030, 0x080c, 0x622f, 0x1dd0, 0xbb12, 0xba16, 0x9006, 0x9005,
- 0x009e, 0x00de, 0x00ee, 0x0005, 0x81ff, 0x0120, 0x2009, 0x0001,
- 0x0804, 0x33d0, 0x080c, 0x489a, 0x1120, 0x2009, 0x0002, 0x0804,
- 0x33d0, 0xa867, 0x0000, 0xa868, 0xc0fd, 0xa86a, 0x7884, 0x9005,
- 0x0904, 0x33d3, 0x9096, 0x00ff, 0x0120, 0x9092, 0x0004, 0x1a04,
- 0x33d3, 0x2010, 0x2918, 0x080c, 0x2fce, 0x1120, 0x2009, 0x0003,
- 0x0804, 0x33d0, 0x7007, 0x0003, 0x701f, 0x484f, 0x0005, 0xa830,
- 0x9086, 0x0100, 0x1904, 0x339e, 0x2009, 0x0004, 0x0804, 0x33d0,
- 0x7984, 0x080c, 0x9b65, 0x1120, 0x9182, 0x007f, 0x0a04, 0x33d3,
- 0x9186, 0x00ff, 0x0904, 0x33d3, 0x9182, 0x0800, 0x1a04, 0x33d3,
- 0x2001, 0x9000, 0x080c, 0x5360, 0x1904, 0x33d0, 0x0804, 0x339e,
- 0xa998, 0x080c, 0x9b65, 0x1118, 0x9182, 0x007f, 0x0280, 0x9186,
- 0x00ff, 0x0168, 0x9182, 0x0800, 0x1250, 0x2001, 0x9000, 0x080c,
- 0x5360, 0x11a8, 0x0060, 0xa897, 0x4005, 0xa99a, 0x0010, 0xa897,
- 0x4006, 0x900e, 0x9085, 0x0001, 0x2001, 0x0030, 0x0005, 0xa897,
- 0x4000, 0x900e, 0x9085, 0x0001, 0x2001, 0x0000, 0x0005, 0x2009,
- 0x000a, 0x0c48, 0x080c, 0x102f, 0x0198, 0x9006, 0xa802, 0x7014,
- 0x9005, 0x1120, 0x2900, 0x7016, 0x701a, 0x0040, 0x7018, 0xa802,
- 0x0086, 0x2040, 0x2900, 0xa006, 0x701a, 0x008e, 0x9085, 0x0001,
- 0x0005, 0x7984, 0x080c, 0x628f, 0x1130, 0x7e88, 0x9684, 0x3fff,
- 0x9082, 0x4000, 0x0208, 0x905e, 0x8bff, 0x0005, 0xa998, 0x080c,
- 0x628f, 0x1130, 0xae9c, 0x9684, 0x3fff, 0x9082, 0x4000, 0x0208,
- 0x905e, 0x8bff, 0x0005, 0xae98, 0x0008, 0x7e84, 0x2608, 0x080c,
- 0x628f, 0x1108, 0x0008, 0x905e, 0x8bff, 0x0005, 0x0016, 0x7114,
- 0x81ff, 0x0128, 0x2148, 0xa904, 0x080c, 0x1061, 0x0cc8, 0x7116,
- 0x711a, 0x001e, 0x0005, 0x2031, 0x0001, 0x0010, 0x2031, 0x0000,
- 0x2061, 0x18b6, 0x2c44, 0xa66a, 0xa17a, 0xa772, 0xa076, 0xa28e,
- 0xa392, 0xa496, 0xa59a, 0x080c, 0x1124, 0x7007, 0x0002, 0x701f,
- 0x339e, 0x0005, 0x00f6, 0x0126, 0x2091, 0x8000, 0x2079, 0x0000,
- 0x2001, 0x18ae, 0x2004, 0x9005, 0x1190, 0x0e04, 0x4917, 0x7a36,
- 0x7833, 0x0012, 0x7a82, 0x7b86, 0x7c8a, 0x2091, 0x4080, 0x2001,
- 0x0089, 0x2004, 0xd084, 0x190c, 0x11d6, 0x0804, 0x497d, 0x0016,
- 0x0086, 0x0096, 0x00c6, 0x00e6, 0x2071, 0x189c, 0x7044, 0x9005,
- 0x1540, 0x7148, 0x9182, 0x0010, 0x0288, 0x7038, 0x2060, 0x080c,
- 0x102f, 0x0904, 0x4975, 0xa84b, 0x0000, 0x2900, 0x7046, 0x2001,
- 0x0002, 0x9080, 0x1d1c, 0x2005, 0xa846, 0x0098, 0x7038, 0x90e0,
- 0x0004, 0x2001, 0x18b8, 0x9c82, 0x18f8, 0x0210, 0x2061, 0x18b8,
- 0x2c00, 0x703a, 0x7148, 0x81ff, 0x1108, 0x703e, 0x8108, 0x714a,
- 0x0460, 0x7148, 0x8108, 0x714a, 0x7044, 0x2040, 0xa144, 0x2105,
- 0x0016, 0x908a, 0x0036, 0x1a0c, 0x0d65, 0x2060, 0x001e, 0x8108,
- 0x2105, 0x9005, 0xa146, 0x1520, 0x080c, 0x102f, 0x1130, 0x8109,
- 0xa946, 0x7148, 0x8109, 0x714a, 0x00d8, 0x9006, 0xa806, 0xa84a,
- 0xa046, 0x2800, 0xa802, 0x2900, 0xa006, 0x7046, 0x2001, 0x0002,
- 0x9080, 0x1d1c, 0x2005, 0xa846, 0x0058, 0x2262, 0x6306, 0x640a,
- 0x00ee, 0x00ce, 0x009e, 0x008e, 0x001e, 0x012e, 0x00fe, 0x0005,
- 0x2c00, 0x9082, 0x001b, 0x0002, 0x499f, 0x499f, 0x49a1, 0x499f,
- 0x499f, 0x499f, 0x49a5, 0x499f, 0x499f, 0x499f, 0x49a9, 0x499f,
- 0x499f, 0x499f, 0x49ad, 0x499f, 0x499f, 0x499f, 0x49b1, 0x499f,
- 0x499f, 0x499f, 0x49b5, 0x499f, 0x499f, 0x499f, 0x49ba, 0x080c,
- 0x0d65, 0xa276, 0xa37a, 0xa47e, 0x0898, 0xa286, 0xa38a, 0xa48e,
- 0x0878, 0xa296, 0xa39a, 0xa49e, 0x0858, 0xa2a6, 0xa3aa, 0xa4ae,
- 0x0838, 0xa2b6, 0xa3ba, 0xa4be, 0x0818, 0xa2c6, 0xa3ca, 0xa4ce,
- 0x0804, 0x4978, 0xa2d6, 0xa3da, 0xa4de, 0x0804, 0x4978, 0x00e6,
- 0x2071, 0x189c, 0x7048, 0x9005, 0x0904, 0x4a51, 0x0126, 0x2091,
- 0x8000, 0x0e04, 0x4a50, 0x00f6, 0x2079, 0x0000, 0x00c6, 0x0096,
- 0x0086, 0x0076, 0x9006, 0x2038, 0x7040, 0x2048, 0x9005, 0x0500,
- 0xa948, 0x2105, 0x0016, 0x908a, 0x0036, 0x1a0c, 0x0d65, 0x2060,
- 0x001e, 0x8108, 0x2105, 0x9005, 0xa94a, 0x1904, 0x4a53, 0xa804,
- 0x9005, 0x090c, 0x0d65, 0x7042, 0x2938, 0x2040, 0xa003, 0x0000,
- 0x2001, 0x0002, 0x9080, 0x1d1c, 0x2005, 0xa04a, 0x0804, 0x4a53,
- 0x703c, 0x2060, 0x2c14, 0x6304, 0x6408, 0x650c, 0x2200, 0x7836,
- 0x7833, 0x0012, 0x7882, 0x2300, 0x7886, 0x2400, 0x788a, 0x2091,
- 0x4080, 0x2001, 0x0089, 0x2004, 0xd084, 0x190c, 0x11d6, 0x87ff,
- 0x0118, 0x2748, 0x080c, 0x1061, 0x7048, 0x8001, 0x704a, 0x9005,
- 0x1170, 0x7040, 0x2048, 0x9005, 0x0128, 0x080c, 0x1061, 0x9006,
- 0x7042, 0x7046, 0x703b, 0x18b8, 0x703f, 0x18b8, 0x0420, 0x7040,
- 0x9005, 0x1508, 0x7238, 0x2c00, 0x9206, 0x0148, 0x9c80, 0x0004,
- 0x90fa, 0x18f8, 0x0210, 0x2001, 0x18b8, 0x703e, 0x00a0, 0x9006,
- 0x703e, 0x703a, 0x7044, 0x9005, 0x090c, 0x0d65, 0x2048, 0xa800,
- 0x9005, 0x1de0, 0x2900, 0x7042, 0x2001, 0x0002, 0x9080, 0x1d1c,
- 0x2005, 0xa84a, 0x0000, 0x007e, 0x008e, 0x009e, 0x00ce, 0x00fe,
- 0x012e, 0x00ee, 0x0005, 0x2c00, 0x9082, 0x001b, 0x0002, 0x4a72,
- 0x4a72, 0x4a74, 0x4a72, 0x4a72, 0x4a72, 0x4a79, 0x4a72, 0x4a72,
- 0x4a72, 0x4a7e, 0x4a72, 0x4a72, 0x4a72, 0x4a83, 0x4a72, 0x4a72,
- 0x4a72, 0x4a88, 0x4a72, 0x4a72, 0x4a72, 0x4a8d, 0x4a72, 0x4a72,
- 0x4a72, 0x4a92, 0x080c, 0x0d65, 0xaa74, 0xab78, 0xac7c, 0x0804,
- 0x49fe, 0xaa84, 0xab88, 0xac8c, 0x0804, 0x49fe, 0xaa94, 0xab98,
- 0xac9c, 0x0804, 0x49fe, 0xaaa4, 0xaba8, 0xacac, 0x0804, 0x49fe,
- 0xaab4, 0xabb8, 0xacbc, 0x0804, 0x49fe, 0xaac4, 0xabc8, 0xaccc,
- 0x0804, 0x49fe, 0xaad4, 0xabd8, 0xacdc, 0x0804, 0x49fe, 0x0026,
- 0x080c, 0x53a8, 0xd0c4, 0x0120, 0x2011, 0x8014, 0x080c, 0x48fa,
- 0x002e, 0x0005, 0x81ff, 0x1904, 0x33d0, 0x0126, 0x2091, 0x8000,
- 0x6030, 0xc08d, 0xc085, 0xc0ac, 0x6032, 0x080c, 0x70ba, 0x1158,
- 0x080c, 0x73b9, 0x080c, 0x5cf7, 0x9085, 0x0001, 0x080c, 0x7101,
- 0x080c, 0x6feb, 0x0010, 0x080c, 0x5bb2, 0x012e, 0x0804, 0x339e,
- 0x81ff, 0x0120, 0x2009, 0x0001, 0x0804, 0x33d0, 0x080c, 0x53bc,
- 0x0120, 0x2009, 0x0007, 0x0804, 0x33d0, 0x080c, 0x6682, 0x0120,
- 0x2009, 0x0008, 0x0804, 0x33d0, 0x0026, 0x2011, 0x0010, 0x080c,
- 0x66ae, 0x002e, 0x0140, 0x7984, 0x080c, 0x66f8, 0x1120, 0x2009,
- 0x4009, 0x0804, 0x33d0, 0x7984, 0x080c, 0x622f, 0x1904, 0x33d3,
- 0x2b00, 0x7026, 0x080c, 0x668a, 0x7888, 0x1170, 0x9084, 0x0005,
- 0x1158, 0x900e, 0x080c, 0x6582, 0x1108, 0xc185, 0xb800, 0xd0bc,
- 0x0108, 0xc18d, 0x0804, 0x339e, 0x080c, 0x489a, 0x0904, 0x33d0,
- 0x9006, 0xa866, 0xa832, 0xa868, 0xc0fd, 0xa86a, 0x080c, 0xbaa7,
- 0x0904, 0x33d0, 0x7888, 0xd094, 0x0118, 0xb8c4, 0xc08d, 0xb8c6,
- 0x7007, 0x0003, 0x701f, 0x4b61, 0x0005, 0x2061, 0x1800, 0x080c,
- 0x53bc, 0x2009, 0x0007, 0x1578, 0x080c, 0x6682, 0x0118, 0x2009,
- 0x0008, 0x0448, 0x080c, 0x3195, 0x0120, 0xa998, 0x080c, 0x622f,
- 0x1530, 0x080c, 0x48cb, 0x0518, 0x080c, 0x668a, 0xa89c, 0x1168,
- 0x9084, 0x0005, 0x1150, 0x900e, 0x080c, 0x6582, 0x1108, 0xc185,
- 0xb800, 0xd0bc, 0x0108, 0xc18d, 0x00d0, 0xa868, 0xc0fc, 0xa86a,
- 0x080c, 0xbaa7, 0x11e0, 0xa89c, 0xd094, 0x0118, 0xb8c4, 0xc08d,
- 0xb8c6, 0x2009, 0x0003, 0xa897, 0x4005, 0xa99a, 0x0010, 0xa897,
- 0x4006, 0x900e, 0x9085, 0x0001, 0x2001, 0x0030, 0x0005, 0xa897,
- 0x4000, 0xa99a, 0x9006, 0x918d, 0x0001, 0x2008, 0x0005, 0x9006,
- 0x0005, 0xa830, 0x2008, 0x918e, 0xdead, 0x1120, 0x2021, 0x4009,
- 0x0804, 0x33a0, 0x9086, 0x0100, 0x7024, 0x2058, 0x1110, 0x0804,
- 0x5305, 0x900e, 0x080c, 0x6582, 0x1108, 0xc185, 0xb800, 0xd0bc,
- 0x0108, 0xc18d, 0x0804, 0x339e, 0x080c, 0x53bc, 0x0120, 0x2009,
- 0x0007, 0x0804, 0x33d0, 0x7f84, 0x7a8c, 0x7b88, 0x7c9c, 0x7d98,
- 0x080c, 0x489a, 0x1120, 0x2009, 0x0002, 0x0804, 0x33d0, 0x900e,
- 0x2130, 0x7126, 0x7132, 0xa860, 0x20e8, 0x7036, 0xa85c, 0x9080,
- 0x0005, 0x702a, 0x20a0, 0x080c, 0x628f, 0x1904, 0x4bff, 0x080c,
- 0x668a, 0x0120, 0x080c, 0x6692, 0x1904, 0x4bff, 0x080c, 0x6682,
- 0x1130, 0x080c, 0x6582, 0x1118, 0xd79c, 0x0904, 0x4bff, 0xd794,
- 0x1110, 0xd784, 0x01a8, 0xb8b4, 0x20e0, 0xb8b8, 0x9080, 0x0006,
- 0x2098, 0x3400, 0xd794, 0x0160, 0x20a9, 0x0008, 0x4003, 0x2098,
- 0x20a0, 0x3d00, 0x20e0, 0x20a9, 0x0002, 0x080c, 0x46ac, 0x0048,
- 0x20a9, 0x0004, 0x4003, 0x2098, 0x20a0, 0x3d00, 0x20e0, 0x080c,
- 0x46ac, 0x4104, 0xd794, 0x0528, 0xb8b4, 0x20e0, 0xb8b8, 0x2060,
- 0x9c80, 0x0000, 0x2098, 0x20a9, 0x0002, 0x4003, 0x9c80, 0x0003,
- 0x2098, 0x20a9, 0x0001, 0x4005, 0x9c80, 0x0004, 0x2098, 0x3400,
- 0x20a9, 0x0002, 0x4003, 0x2098, 0x20a0, 0x3d00, 0x20e0, 0x080c,
- 0x469f, 0x9c80, 0x0026, 0x2098, 0xb8b4, 0x20e0, 0x20a9, 0x0002,
- 0x4003, 0xd794, 0x0110, 0x96b0, 0x000b, 0x96b0, 0x0005, 0x8108,
- 0x080c, 0x9b65, 0x0118, 0x9186, 0x0800, 0x0040, 0xd78c, 0x0120,
- 0x9186, 0x0800, 0x0170, 0x0018, 0x9186, 0x007e, 0x0150, 0xd794,
- 0x0118, 0x9686, 0x0020, 0x0010, 0x9686, 0x0028, 0x0150, 0x0804,
- 0x4b9b, 0x86ff, 0x1120, 0x7124, 0x810b, 0x0804, 0x339e, 0x7033,
- 0x0001, 0x7122, 0x7024, 0x9600, 0x7026, 0x772e, 0x2061, 0x18b6,
- 0x2c44, 0xa06b, 0x0000, 0xa67a, 0x7034, 0xa072, 0x7028, 0xa076,
- 0xa28e, 0xa392, 0xa496, 0xa59a, 0x080c, 0x1124, 0x7007, 0x0002,
- 0x701f, 0x4c3b, 0x0005, 0x7030, 0x9005, 0x1180, 0x7120, 0x7028,
- 0x20a0, 0x772c, 0x9036, 0x7034, 0x20e8, 0x2061, 0x18b6, 0x2c44,
- 0xa28c, 0xa390, 0xa494, 0xa598, 0x0804, 0x4b9b, 0x7124, 0x810b,
- 0x0804, 0x339e, 0x2029, 0x007e, 0x7984, 0x7a88, 0x7b8c, 0x7c98,
- 0x9184, 0xff00, 0x8007, 0x90e2, 0x0020, 0x0a04, 0x33d3, 0x9502,
- 0x0a04, 0x33d3, 0x9184, 0x00ff, 0x90e2, 0x0020, 0x0a04, 0x33d3,
- 0x9502, 0x0a04, 0x33d3, 0x9284, 0xff00, 0x8007, 0x90e2, 0x0020,
- 0x0a04, 0x33d3, 0x9502, 0x0a04, 0x33d3, 0x9284, 0x00ff, 0x90e2,
- 0x0020, 0x0a04, 0x33d3, 0x9502, 0x0a04, 0x33d3, 0x9384, 0xff00,
- 0x8007, 0x90e2, 0x0020, 0x0a04, 0x33d3, 0x9502, 0x0a04, 0x33d3,
- 0x9384, 0x00ff, 0x90e2, 0x0020, 0x0a04, 0x33d3, 0x9502, 0x0a04,
- 0x33d3, 0x9484, 0xff00, 0x8007, 0x90e2, 0x0020, 0x0a04, 0x33d3,
- 0x9502, 0x0a04, 0x33d3, 0x9484, 0x00ff, 0x90e2, 0x0020, 0x0a04,
- 0x33d3, 0x9502, 0x0a04, 0x33d3, 0x2061, 0x1961, 0x6102, 0x6206,
- 0x630a, 0x640e, 0x0804, 0x339e, 0x0006, 0x080c, 0x53a8, 0xd0cc,
- 0x000e, 0x0005, 0x0006, 0x080c, 0x53ac, 0xd0bc, 0x000e, 0x0005,
- 0x6170, 0x7a84, 0x6300, 0x82ff, 0x1118, 0x7986, 0x0804, 0x339e,
- 0x83ff, 0x1904, 0x33d3, 0x2001, 0xfff0, 0x9200, 0x1a04, 0x33d3,
- 0x2019, 0xffff, 0x6074, 0x9302, 0x9200, 0x0a04, 0x33d3, 0x7986,
- 0x6272, 0x0804, 0x339e, 0x080c, 0x53bc, 0x1904, 0x33d0, 0x7c88,
- 0x7d84, 0x7e98, 0x7f8c, 0x080c, 0x489a, 0x0904, 0x33d0, 0x900e,
- 0x901e, 0x7326, 0x7332, 0xa860, 0x20e8, 0x7036, 0xa85c, 0x9080,
- 0x0003, 0x702a, 0x20a0, 0x91d8, 0x1000, 0x2b5c, 0x8bff, 0x0178,
- 0x080c, 0x668a, 0x0118, 0x080c, 0x6692, 0x1148, 0x20a9, 0x0001,
- 0xb814, 0x4004, 0xb810, 0x4004, 0x4104, 0x9398, 0x0003, 0x8108,
- 0x9182, 0x0800, 0x0120, 0x9386, 0x003c, 0x0170, 0x0c20, 0x83ff,
- 0x1148, 0x7224, 0x900e, 0x2001, 0x0003, 0x080c, 0x842f, 0x2208,
- 0x0804, 0x339e, 0x7033, 0x0001, 0x7122, 0x7024, 0x9300, 0x7026,
- 0x2061, 0x18b6, 0x2c44, 0xa06b, 0x0000, 0xa37a, 0x7028, 0xa076,
- 0x7034, 0xa072, 0xa48e, 0xa592, 0xa696, 0xa79a, 0x080c, 0x1124,
- 0x7007, 0x0002, 0x701f, 0x4d2d, 0x0005, 0x7030, 0x9005, 0x1178,
- 0x7120, 0x7028, 0x20a0, 0x901e, 0x7034, 0x20e8, 0x2061, 0x18b6,
- 0x2c44, 0xa48c, 0xa590, 0xa694, 0xa798, 0x0804, 0x4ceb, 0x7224,
- 0x900e, 0x2001, 0x0003, 0x080c, 0x842f, 0x2208, 0x0804, 0x339e,
- 0x00f6, 0x00e6, 0x080c, 0x53bc, 0x2009, 0x0007, 0x1904, 0x4dc0,
- 0x2071, 0x189c, 0x745c, 0x84ff, 0x2009, 0x000e, 0x1904, 0x4dc0,
- 0xac9c, 0xad98, 0xaea4, 0xafa0, 0x0096, 0x080c, 0x1048, 0x2009,
- 0x0002, 0x0904, 0x4dc0, 0x2900, 0x705e, 0x900e, 0x901e, 0x7356,
- 0x7362, 0xa860, 0x7066, 0xa85c, 0x9080, 0x0003, 0x705a, 0x20a0,
- 0x91d8, 0x1000, 0x2b5c, 0x8bff, 0x0178, 0x080c, 0x668a, 0x0118,
- 0x080c, 0x6692, 0x1148, 0xb814, 0x20a9, 0x0001, 0x4004, 0xb810,
- 0x4004, 0x4104, 0x9398, 0x0003, 0x8108, 0x9182, 0x0800, 0x0120,
- 0x9386, 0x003c, 0x01e8, 0x0c20, 0x83ff, 0x11c0, 0x7254, 0x900e,
- 0x2001, 0x0003, 0x080c, 0x842f, 0x2208, 0x009e, 0xa897, 0x4000,
- 0xa99a, 0x715c, 0x81ff, 0x090c, 0x0d65, 0x2148, 0x080c, 0x1061,
- 0x9006, 0x705e, 0x918d, 0x0001, 0x2008, 0x0418, 0x7063, 0x0001,
- 0x7152, 0x7054, 0x9300, 0x7056, 0x2061, 0x18b7, 0x2c44, 0xa37a,
- 0x7058, 0xa076, 0x7064, 0xa072, 0xa48e, 0xa592, 0xa696, 0xa79a,
- 0xa09f, 0x4dcc, 0x000e, 0xa0a2, 0x080c, 0x1124, 0x9006, 0x0048,
- 0x009e, 0xa897, 0x4005, 0xa99a, 0x900e, 0x9085, 0x0001, 0x2001,
- 0x0030, 0x00ee, 0x00fe, 0x0005, 0x00f6, 0xa0a0, 0x904d, 0x090c,
- 0x0d65, 0x00e6, 0x2071, 0x189c, 0xa06c, 0x908e, 0x0100, 0x0138,
- 0xa87b, 0x0030, 0xa883, 0x0000, 0xa897, 0x4002, 0x00d8, 0x7060,
- 0x9005, 0x1158, 0x7150, 0x7058, 0x20a0, 0x901e, 0x7064, 0x20e8,
- 0xa48c, 0xa590, 0xa694, 0xa798, 0x0428, 0xa87b, 0x0000, 0xa883,
- 0x0000, 0xa897, 0x4000, 0x7254, 0x900e, 0x2001, 0x0003, 0x080c,
- 0x842f, 0xaa9a, 0x715c, 0x81ff, 0x090c, 0x0d65, 0x2148, 0x080c,
- 0x1061, 0x705f, 0x0000, 0xa0a0, 0x2048, 0x0126, 0x2091, 0x8000,
- 0x080c, 0x69b5, 0x012e, 0xa09f, 0x0000, 0xa0a3, 0x0000, 0x00ee,
- 0x00fe, 0x0005, 0x91d8, 0x1000, 0x2b5c, 0x8bff, 0x0178, 0x080c,
- 0x668a, 0x0118, 0x080c, 0x6692, 0x1148, 0xb814, 0x20a9, 0x0001,
- 0x4004, 0xb810, 0x4004, 0x4104, 0x9398, 0x0003, 0x8108, 0x9182,
- 0x0800, 0x0120, 0x9386, 0x003c, 0x0518, 0x0c20, 0x83ff, 0x11f0,
- 0x7154, 0x810c, 0xa99a, 0xa897, 0x4000, 0x715c, 0x81ff, 0x090c,
- 0x0d65, 0x2148, 0x080c, 0x1061, 0x9006, 0x705e, 0x918d, 0x0001,
- 0x2008, 0xa0a0, 0x2048, 0x0126, 0x2091, 0x8000, 0x080c, 0x69b5,
- 0x012e, 0xa09f, 0x0000, 0xa0a3, 0x0000, 0x0070, 0x7063, 0x0001,
- 0x7152, 0x7054, 0x9300, 0x7056, 0xa37a, 0xa48e, 0xa592, 0xa696,
- 0xa79a, 0x080c, 0x1124, 0x9006, 0x00ee, 0x0005, 0x0096, 0xa88c,
- 0x90be, 0x7000, 0x0148, 0x90be, 0x7100, 0x0130, 0x90be, 0x7200,
- 0x0118, 0x009e, 0x0804, 0x33d3, 0xa884, 0xa988, 0x080c, 0x2459,
- 0x1518, 0x080c, 0x622f, 0x1500, 0x7126, 0xbe12, 0xbd16, 0xae7c,
- 0x080c, 0x489a, 0x01c8, 0x080c, 0x489a, 0x01b0, 0x009e, 0xa867,
- 0x0000, 0xa868, 0xc0fd, 0xa86a, 0xa823, 0x0000, 0xa804, 0x2048,
- 0x080c, 0xba20, 0x1120, 0x2009, 0x0003, 0x0804, 0x33d0, 0x7007,
- 0x0003, 0x701f, 0x4e99, 0x0005, 0x009e, 0x2009, 0x0002, 0x0804,
- 0x33d0, 0x7124, 0x080c, 0x3136, 0xa820, 0x9086, 0x8001, 0x1120,
- 0x2009, 0x0004, 0x0804, 0x33d0, 0x2900, 0x7022, 0xa804, 0x0096,
- 0x2048, 0x8906, 0x8006, 0x8007, 0x90bc, 0x003f, 0x9084, 0xffc0,
- 0x009e, 0x9080, 0x0002, 0x0076, 0x0006, 0x2098, 0x20a0, 0x27e0,
- 0x27e8, 0x20a9, 0x002a, 0x080c, 0x0fac, 0xaa6c, 0xab70, 0xac74,
- 0xad78, 0x2061, 0x18b6, 0x2c44, 0xa06b, 0x0000, 0xae64, 0xaf8c,
- 0x97c6, 0x7000, 0x0118, 0x97c6, 0x7100, 0x1148, 0x96c2, 0x0004,
- 0x0600, 0x2009, 0x0004, 0x000e, 0x007e, 0x0804, 0x48e6, 0x97c6,
- 0x7200, 0x11b8, 0x96c2, 0x0054, 0x02a0, 0x000e, 0x007e, 0x2061,
- 0x18b6, 0x2c44, 0xa076, 0xa772, 0xa07b, 0x002a, 0xa28e, 0xa392,
- 0xa496, 0xa59a, 0x080c, 0x1124, 0x7007, 0x0002, 0x701f, 0x4ef5,
- 0x0005, 0x000e, 0x007e, 0x0804, 0x33d3, 0x7020, 0x2048, 0xa804,
- 0x2048, 0xa804, 0x2048, 0x8906, 0x8006, 0x8007, 0x90bc, 0x003f,
- 0x9084, 0xffc0, 0x9080, 0x0002, 0x2098, 0x20a0, 0x27e0, 0x27e8,
- 0x20a9, 0x002a, 0x080c, 0x0fac, 0x2100, 0x2238, 0x2061, 0x18b6,
- 0x2c44, 0xa28c, 0xa390, 0xa494, 0xa598, 0x2009, 0x002a, 0x0804,
- 0x48e6, 0x81ff, 0x1904, 0x33d0, 0x798c, 0x2001, 0x1956, 0x918c,
- 0x8000, 0x2102, 0x080c, 0x48b1, 0x0904, 0x33d3, 0x080c, 0x668a,
- 0x0120, 0x080c, 0x6692, 0x1904, 0x33d3, 0x080c, 0x6356, 0x0904,
- 0x33d0, 0x0126, 0x2091, 0x8000, 0x080c, 0x64ef, 0x012e, 0x0904,
- 0x33d0, 0x2001, 0x1956, 0x2004, 0xd0fc, 0x1904, 0x339e, 0x0804,
- 0x4348, 0xa9a0, 0x2001, 0x1956, 0x918c, 0x8000, 0xc18d, 0x2102,
- 0x080c, 0x48be, 0x01a0, 0x080c, 0x668a, 0x0118, 0x080c, 0x6692,
- 0x1170, 0x080c, 0x6356, 0x2009, 0x0002, 0x0128, 0x080c, 0x64ef,
- 0x1170, 0x2009, 0x0003, 0xa897, 0x4005, 0xa99a, 0x0010, 0xa897,
- 0x4006, 0x900e, 0x9085, 0x0001, 0x2001, 0x0030, 0x0005, 0xa897,
- 0x4000, 0x2001, 0x1956, 0x2004, 0xd0fc, 0x1128, 0x080c, 0x53b0,
- 0x0110, 0x9006, 0x0018, 0x900e, 0x9085, 0x0001, 0x2001, 0x0000,
- 0x0005, 0x78a8, 0xd08c, 0x1118, 0xd084, 0x0904, 0x42bd, 0x080c,
- 0x48cd, 0x0904, 0x33d3, 0x080c, 0x489a, 0x1120, 0x2009, 0x0002,
- 0x0804, 0x33d0, 0x080c, 0x668a, 0x0130, 0x908e, 0x0004, 0x0118,
- 0x908e, 0x0005, 0x15a0, 0x78a8, 0xd08c, 0x0120, 0xb800, 0xc08c,
- 0xb802, 0x0028, 0x080c, 0x53a8, 0xd0b4, 0x0904, 0x42f7, 0x7884,
- 0x908e, 0x007e, 0x0904, 0x42f7, 0x908e, 0x007f, 0x0904, 0x42f7,
- 0x908e, 0x0080, 0x0904, 0x42f7, 0xb800, 0xd08c, 0x1904, 0x42f7,
- 0xa867, 0x0000, 0xa868, 0xc0fd, 0xa86a, 0x080c, 0xba3f, 0x1120,
- 0x2009, 0x0003, 0x0804, 0x33d0, 0x7007, 0x0003, 0x701f, 0x4fc1,
- 0x0005, 0x080c, 0x48cd, 0x0904, 0x33d3, 0x0804, 0x42f7, 0x080c,
- 0x3195, 0x0108, 0x0005, 0x2009, 0x1833, 0x210c, 0x81ff, 0x0120,
- 0x2009, 0x0001, 0x0804, 0x33d0, 0x080c, 0x53bc, 0x0120, 0x2009,
- 0x0007, 0x0804, 0x33d0, 0x080c, 0x6682, 0x0120, 0x2009, 0x0008,
- 0x0804, 0x33d0, 0xb89c, 0xd0a4, 0x1118, 0xd0ac, 0x1904, 0x42f7,
- 0x9006, 0xa866, 0xa832, 0xa868, 0xc0fd, 0xa86a, 0x080c, 0xbaa7,
- 0x1120, 0x2009, 0x0003, 0x0804, 0x33d0, 0x7007, 0x0003, 0x701f,
- 0x4ffa, 0x0005, 0xa830, 0x9086, 0x0100, 0x1120, 0x2009, 0x0004,
- 0x0804, 0x5305, 0x080c, 0x48cd, 0x0904, 0x33d3, 0x0804, 0x4f93,
- 0x81ff, 0x2009, 0x0001, 0x1904, 0x33d0, 0x080c, 0x53bc, 0x2009,
- 0x0007, 0x1904, 0x33d0, 0x080c, 0x6682, 0x0120, 0x2009, 0x0008,
- 0x0804, 0x33d0, 0x080c, 0x48cd, 0x0904, 0x33d3, 0x080c, 0x668a,
- 0x2009, 0x0009, 0x1904, 0x33d0, 0x080c, 0x489a, 0x2009, 0x0002,
- 0x0904, 0x33d0, 0x9006, 0xa866, 0xa832, 0xa868, 0xc0fd, 0xa86a,
- 0x7988, 0x9194, 0xff00, 0x918c, 0x00ff, 0x9006, 0x82ff, 0x1128,
- 0xc0ed, 0xa952, 0x798c, 0xa956, 0x0038, 0x928e, 0x0100, 0x1904,
- 0x33d3, 0xc0e5, 0xa952, 0xa956, 0xa83e, 0x080c, 0xbd0a, 0x2009,
- 0x0003, 0x0904, 0x33d0, 0x7007, 0x0003, 0x701f, 0x5050, 0x0005,
- 0xa830, 0x9086, 0x0100, 0x2009, 0x0004, 0x0904, 0x33d0, 0x0804,
- 0x339e, 0x7aa8, 0x9284, 0xc000, 0x0148, 0xd2ec, 0x01a0, 0x080c,
- 0x53bc, 0x1188, 0x2009, 0x0014, 0x0804, 0x33d0, 0xd2dc, 0x1568,
- 0x81ff, 0x2009, 0x0001, 0x1904, 0x33d0, 0x080c, 0x53bc, 0x2009,
- 0x0007, 0x1904, 0x33d0, 0xd2f4, 0x0130, 0x9284, 0x5000, 0x080c,
- 0x5383, 0x0804, 0x339e, 0xd2fc, 0x0158, 0x080c, 0x48cd, 0x0904,
- 0x33d3, 0x7984, 0x9284, 0x9000, 0x080c, 0x5360, 0x0804, 0x339e,
- 0x080c, 0x48cd, 0x0904, 0x33d3, 0xb804, 0x9084, 0x00ff, 0x9086,
- 0x0006, 0x2009, 0x0009, 0x1904, 0x5139, 0x080c, 0x489a, 0x2009,
- 0x0002, 0x0904, 0x5139, 0xa85c, 0x9080, 0x001b, 0xaf60, 0x2009,
- 0x0008, 0x7a8c, 0x7b88, 0x7c9c, 0x7d98, 0x080c, 0x48e3, 0x701f,
- 0x50aa, 0x0005, 0xa86c, 0x9086, 0x0500, 0x1138, 0xa870, 0x9005,
- 0x1120, 0xa874, 0x9084, 0xff00, 0x0110, 0x1904, 0x33d3, 0xa866,
- 0xa832, 0xa868, 0xc0fd, 0xa86a, 0x080c, 0x48cd, 0x1110, 0x0804,
- 0x33d3, 0x2009, 0x0043, 0x080c, 0xbd72, 0x2009, 0x0003, 0x0904,
- 0x5139, 0x7007, 0x0003, 0x701f, 0x50ce, 0x0005, 0xa830, 0x9086,
- 0x0100, 0x2009, 0x0004, 0x0904, 0x5139, 0x7984, 0x7aa8, 0x9284,
- 0x1000, 0x080c, 0x5360, 0x0804, 0x339e, 0x00c6, 0xaab0, 0x9284,
- 0xc000, 0x0140, 0xd2ec, 0x0168, 0x080c, 0x53bc, 0x1150, 0x2009,
- 0x0014, 0x04f0, 0x2061, 0x1800, 0x080c, 0x53bc, 0x2009, 0x0007,
- 0x15b8, 0xd2f4, 0x0128, 0x9284, 0x5000, 0x080c, 0x5383, 0x0050,
- 0xd2fc, 0x0178, 0x080c, 0x48cb, 0x0588, 0xa998, 0x9284, 0x9000,
- 0x080c, 0x5360, 0xa87b, 0x0000, 0xa883, 0x0000, 0xa897, 0x4000,
- 0x0438, 0x080c, 0x48cb, 0x0510, 0x080c, 0x668a, 0x2009, 0x0009,
- 0x11b8, 0xa8c4, 0x9086, 0x0500, 0x11c8, 0xa8c8, 0x9005, 0x11b0,
- 0xa8cc, 0x9084, 0xff00, 0x1190, 0x080c, 0x48cb, 0x1108, 0x0070,
- 0x2009, 0x004b, 0x080c, 0xbd72, 0x2009, 0x0003, 0x0108, 0x0078,
- 0x0429, 0x19c0, 0xa897, 0x4005, 0xa99a, 0x0010, 0xa897, 0x4006,
- 0x900e, 0x9085, 0x0001, 0x2001, 0x0030, 0x00ce, 0x0005, 0x9006,
- 0x0ce0, 0x7aa8, 0xd2dc, 0x0904, 0x33d0, 0x0016, 0x7984, 0x9284,
- 0x1000, 0xc0fd, 0x080c, 0x5360, 0x001e, 0x1904, 0x33d0, 0x0804,
- 0x339e, 0x00f6, 0x2d78, 0x0011, 0x00fe, 0x0005, 0xaab0, 0xd2dc,
- 0x0150, 0x0016, 0xa998, 0x9284, 0x1000, 0xc0fd, 0x080c, 0x5360,
- 0x001e, 0x9085, 0x0001, 0x0005, 0x81ff, 0x0120, 0x2009, 0x0001,
- 0x0804, 0x33d0, 0x080c, 0x53bc, 0x0120, 0x2009, 0x0007, 0x0804,
- 0x33d0, 0x7984, 0x7ea8, 0x96b4, 0x00ff, 0x080c, 0x628f, 0x1904,
- 0x33d3, 0x9186, 0x007f, 0x0138, 0x080c, 0x668a, 0x0120, 0x2009,
- 0x0009, 0x0804, 0x33d0, 0x080c, 0x489a, 0x1120, 0x2009, 0x0002,
- 0x0804, 0x33d0, 0xa867, 0x0000, 0xa868, 0xc0fd, 0xa86a, 0x2001,
- 0x0100, 0x8007, 0xa80a, 0x080c, 0xba59, 0x1120, 0x2009, 0x0003,
- 0x0804, 0x33d0, 0x7007, 0x0003, 0x701f, 0x5197, 0x0005, 0xa808,
- 0x8007, 0x9086, 0x0100, 0x1120, 0x2009, 0x0004, 0x0804, 0x33d0,
- 0xa8e0, 0xa866, 0xa810, 0x8007, 0x9084, 0x00ff, 0x800c, 0xa814,
- 0x8007, 0x9084, 0x00ff, 0x8004, 0x9080, 0x0002, 0x9108, 0x8906,
- 0x8006, 0x8007, 0x90bc, 0x003f, 0x9084, 0xffc0, 0x9080, 0x0004,
- 0x7a8c, 0x7b88, 0x7c9c, 0x7d98, 0x0804, 0x48e6, 0x080c, 0x489a,
- 0x1120, 0x2009, 0x0002, 0x0804, 0x33d0, 0x7984, 0x9194, 0xff00,
- 0x918c, 0x00ff, 0x8217, 0x82ff, 0x1118, 0x7023, 0x198b, 0x0040,
- 0x92c6, 0x0001, 0x1118, 0x7023, 0x19a5, 0x0010, 0x0804, 0x33d3,
- 0x2009, 0x001a, 0x7a8c, 0x7b88, 0x7c9c, 0x7d98, 0xa85c, 0x9080,
- 0x0019, 0xaf60, 0x080c, 0x48e3, 0x701f, 0x51e7, 0x0005, 0x2001,
- 0x182d, 0x2003, 0x0001, 0xa85c, 0x9080, 0x0019, 0x2098, 0xa860,
- 0x20e0, 0x20a9, 0x001a, 0x7020, 0x20a0, 0x20e9, 0x0001, 0x4003,
- 0x0804, 0x339e, 0x080c, 0x489a, 0x1120, 0x2009, 0x0002, 0x0804,
- 0x33d0, 0x7984, 0x9194, 0xff00, 0x918c, 0x00ff, 0x8217, 0x82ff,
- 0x1118, 0x2099, 0x198b, 0x0040, 0x92c6, 0x0001, 0x1118, 0x2099,
- 0x19a5, 0x0010, 0x0804, 0x33d3, 0xa85c, 0x9080, 0x0019, 0x20a0,
- 0xa860, 0x20e8, 0x20a9, 0x001a, 0x20e1, 0x0001, 0x4003, 0x2009,
- 0x001a, 0x7a8c, 0x7b88, 0x7c9c, 0x7d98, 0xa85c, 0x9080, 0x0019,
- 0xaf60, 0x0804, 0x48e6, 0x7884, 0x908a, 0x1000, 0x1a04, 0x33d3,
- 0x0126, 0x2091, 0x8000, 0x8003, 0x800b, 0x810b, 0x9108, 0x00c6,
- 0x2061, 0x19db, 0x6142, 0x00ce, 0x012e, 0x0804, 0x339e, 0x00c6,
- 0x080c, 0x70ba, 0x1160, 0x080c, 0x73b9, 0x080c, 0x5cf7, 0x9085,
- 0x0001, 0x080c, 0x7101, 0x080c, 0x6feb, 0x080c, 0x0d65, 0x2061,
- 0x1800, 0x6030, 0xc09d, 0x6032, 0x080c, 0x5bb2, 0x00ce, 0x0005,
- 0x00c6, 0x2001, 0x1800, 0x2004, 0x908e, 0x0000, 0x0904, 0x33d0,
- 0x7884, 0x9005, 0x0188, 0x7888, 0x2061, 0x1974, 0x2c0c, 0x2062,
- 0x080c, 0x2840, 0x01a0, 0x080c, 0x2848, 0x0188, 0x080c, 0x2850,
- 0x0170, 0x2162, 0x0804, 0x33d3, 0x2061, 0x0100, 0x6038, 0x9086,
- 0x0007, 0x1118, 0x2009, 0x0001, 0x0010, 0x2009, 0x0000, 0x7884,
- 0x9086, 0x0002, 0x1588, 0x2061, 0x0100, 0x6028, 0xc09c, 0x602a,
- 0x080c, 0x98c7, 0x0026, 0x2011, 0x0003, 0x080c, 0x9324, 0x2011,
- 0x0002, 0x080c, 0x932e, 0x002e, 0x080c, 0x921d, 0x0036, 0x901e,
- 0x080c, 0x929d, 0x003e, 0x080c, 0x98e3, 0x60e3, 0x0000, 0x080c,
- 0xd644, 0x080c, 0xd65f, 0x9085, 0x0001, 0x080c, 0x7101, 0x9006,
- 0x080c, 0x2872, 0x2001, 0x1800, 0x2003, 0x0004, 0x0026, 0x2011,
- 0x0008, 0x080c, 0x28ac, 0x002e, 0x00ce, 0x0804, 0x339e, 0x81ff,
- 0x0120, 0x2009, 0x0001, 0x0804, 0x33d0, 0x080c, 0x53bc, 0x0120,
- 0x2009, 0x0007, 0x0804, 0x33d0, 0x7984, 0x7ea8, 0x96b4, 0x00ff,
- 0x080c, 0x628f, 0x1904, 0x33d3, 0x9186, 0x007f, 0x0138, 0x080c,
- 0x668a, 0x0120, 0x2009, 0x0009, 0x0804, 0x33d0, 0x080c, 0x489a,
- 0x1120, 0x2009, 0x0002, 0x0804, 0x33d0, 0xa867, 0x0000, 0xa868,
- 0xc0fd, 0xa86a, 0x080c, 0xba5c, 0x1120, 0x2009, 0x0003, 0x0804,
- 0x33d0, 0x7007, 0x0003, 0x701f, 0x52ee, 0x0005, 0xa830, 0x9086,
- 0x0100, 0x1120, 0x2009, 0x0004, 0x0804, 0x33d0, 0xa8e0, 0xa866,
- 0xa834, 0x8007, 0x800c, 0xa85c, 0x9080, 0x000c, 0x7a8c, 0x7b88,
- 0x7c9c, 0x7d98, 0xaf60, 0x0804, 0x48e6, 0xa898, 0x9086, 0x000d,
- 0x1904, 0x33d0, 0x2021, 0x4005, 0x0126, 0x2091, 0x8000, 0x0e04,
- 0x5312, 0x0010, 0x012e, 0x0cc0, 0x7c36, 0x9486, 0x4000, 0x0118,
- 0x7833, 0x0011, 0x0010, 0x7833, 0x0010, 0x7883, 0x4005, 0xa998,
- 0x7986, 0xa9a4, 0x799a, 0xa9a8, 0x799e, 0x080c, 0x48d6, 0x2091,
- 0x4080, 0x2001, 0x0089, 0x2004, 0xd084, 0x190c, 0x11d6, 0x7007,
- 0x0001, 0x2091, 0x5000, 0x700f, 0x0000, 0x012e, 0x0005, 0x0126,
- 0x2091, 0x8000, 0x00c6, 0x2061, 0x19db, 0x7984, 0x6152, 0x614e,
- 0x6057, 0x0000, 0x604b, 0x0009, 0x7898, 0x606a, 0x789c, 0x6066,
- 0x7888, 0x6062, 0x788c, 0x605e, 0x2001, 0x19e9, 0x2044, 0x2001,
- 0x19f0, 0xa076, 0xa060, 0xa072, 0xa07b, 0x0001, 0xa07f, 0x0002,
- 0xa06b, 0x0000, 0xa09f, 0x0000, 0x00ce, 0x012e, 0x0804, 0x339e,
- 0x0126, 0x2091, 0x8000, 0x00b6, 0x00c6, 0x90e4, 0xc000, 0x0128,
- 0x0006, 0x080c, 0xb8bd, 0x000e, 0x1198, 0xd0e4, 0x0160, 0x9180,
- 0x1000, 0x2004, 0x905d, 0x0160, 0x080c, 0x5d11, 0x080c, 0x9b65,
- 0x0110, 0xb817, 0x0000, 0x9006, 0x00ce, 0x00be, 0x012e, 0x0005,
- 0x9085, 0x0001, 0x0cc8, 0x0126, 0x2091, 0x8000, 0x0156, 0x2010,
- 0x900e, 0x20a9, 0x0800, 0x0016, 0x9180, 0x1000, 0x2004, 0x9005,
- 0x0180, 0x9186, 0x007e, 0x0168, 0x9186, 0x007f, 0x0150, 0x9186,
- 0x0080, 0x0138, 0x9186, 0x00ff, 0x0120, 0x0026, 0x2200, 0x0801,
- 0x002e, 0x001e, 0x8108, 0x1f04, 0x538b, 0x015e, 0x012e, 0x0005,
- 0x2001, 0x185c, 0x2004, 0x0005, 0x2001, 0x187b, 0x2004, 0x0005,
- 0x0006, 0x2001, 0x1810, 0x2004, 0xd0d4, 0x000e, 0x0005, 0x2001,
- 0x180e, 0x2004, 0xd0b4, 0x0005, 0x2001, 0x1800, 0x2004, 0x9086,
- 0x0003, 0x0005, 0x0016, 0x00e6, 0x2071, 0x189c, 0x7108, 0x910d,
- 0x710a, 0x00ee, 0x001e, 0x0005, 0x79a4, 0x9182, 0x0081, 0x1a04,
- 0x33d3, 0x810c, 0x0016, 0x080c, 0x489a, 0x080c, 0x0f37, 0x2100,
- 0x2238, 0x7d84, 0x7c88, 0x7b8c, 0x7a90, 0x001e, 0x080c, 0x48e3,
- 0x701f, 0x53e3, 0x0005, 0x2079, 0x0000, 0x7d94, 0x7c98, 0x7ba8,
- 0x7aac, 0x79a4, 0x810c, 0x2061, 0x18b6, 0x2c44, 0xa770, 0xa074,
- 0x2071, 0x189c, 0x080c, 0x48e6, 0x701f, 0x53f7, 0x0005, 0x2061,
- 0x18b6, 0x2c44, 0x0016, 0x0026, 0xa270, 0xa174, 0x080c, 0x0f3f,
- 0x002e, 0x001e, 0x080c, 0x0fec, 0x9006, 0xa802, 0xa806, 0x0804,
- 0x339e, 0x0126, 0x0156, 0x0136, 0x0146, 0x01c6, 0x01d6, 0x00c6,
- 0x00d6, 0x00e6, 0x00f6, 0x2061, 0x0100, 0x2069, 0x0200, 0x2071,
- 0x1800, 0x6044, 0xd0a4, 0x11e8, 0xd084, 0x0118, 0x080c, 0x55b2,
- 0x0068, 0xd08c, 0x0118, 0x080c, 0x54bb, 0x0040, 0xd094, 0x0118,
- 0x080c, 0x548b, 0x0018, 0xd09c, 0x0108, 0x0099, 0x00fe, 0x00ee,
- 0x00de, 0x00ce, 0x01de, 0x01ce, 0x014e, 0x013e, 0x015e, 0x012e,
- 0x0005, 0x0016, 0x6128, 0xd19c, 0x1110, 0xc19d, 0x612a, 0x001e,
- 0x0c68, 0x0006, 0x7094, 0x9005, 0x000e, 0x0120, 0x7097, 0x0000,
- 0x708f, 0x0000, 0x624c, 0x9286, 0xf0f0, 0x1150, 0x6048, 0x9086,
- 0xf0f0, 0x0130, 0x624a, 0x6043, 0x0090, 0x6043, 0x0010, 0x0490,
- 0x9294, 0xff00, 0x9296, 0xf700, 0x0178, 0x7138, 0xd1a4, 0x1160,
- 0x6240, 0x9295, 0x0100, 0x6242, 0x9294, 0x0010, 0x0128, 0x2009,
- 0x00f7, 0x080c, 0x5c73, 0x00f0, 0x6040, 0x9084, 0x0010, 0x9085,
- 0x0140, 0x6042, 0x6043, 0x0000, 0x7083, 0x0000, 0x709f, 0x0001,
- 0x70c3, 0x0000, 0x70db, 0x0000, 0x2009, 0x1d80, 0x200b, 0x0000,
- 0x7093, 0x0000, 0x7087, 0x000f, 0x2009, 0x000f, 0x2011, 0x5b55,
- 0x080c, 0x8230, 0x0005, 0x2001, 0x187d, 0x2004, 0xd08c, 0x0110,
- 0x705b, 0xffff, 0x7084, 0x9005, 0x1528, 0x2011, 0x5b55, 0x080c,
- 0x816c, 0x6040, 0x9094, 0x0010, 0x9285, 0x0020, 0x6042, 0x20a9,
- 0x00c8, 0x6044, 0xd08c, 0x1168, 0x1f04, 0x54a1, 0x6242, 0x7097,
- 0x0000, 0x6040, 0x9094, 0x0010, 0x9285, 0x0080, 0x6042, 0x6242,
- 0x0048, 0x6242, 0x7097, 0x0000, 0x708b, 0x0000, 0x9006, 0x080c,
- 0x5cfc, 0x0000, 0x0005, 0x7088, 0x908a, 0x0003, 0x1a0c, 0x0d65,
- 0x000b, 0x0005, 0x54c5, 0x5516, 0x55b1, 0x00f6, 0x0016, 0x6900,
- 0x918c, 0x0800, 0x708b, 0x0001, 0x2001, 0x015d, 0x2003, 0x0000,
- 0x6803, 0x00fc, 0x20a9, 0x0004, 0x6800, 0x9084, 0x00fc, 0x0120,
- 0x1f04, 0x54d4, 0x080c, 0x0d65, 0x68a0, 0x68a2, 0x689c, 0x689e,
- 0x6898, 0x689a, 0xa001, 0x918d, 0x1600, 0x6902, 0x001e, 0x6837,
- 0x0020, 0x080c, 0x5cd8, 0x2079, 0x1d00, 0x7833, 0x1101, 0x7837,
- 0x0000, 0x20e1, 0x0001, 0x2099, 0x1805, 0x20e9, 0x0001, 0x20a1,
- 0x1d0e, 0x20a9, 0x0004, 0x4003, 0x080c, 0x97f4, 0x20e1, 0x0001,
- 0x2099, 0x1d00, 0x20e9, 0x0000, 0x20a1, 0x0240, 0x20a9, 0x0014,
- 0x4003, 0x60c3, 0x000c, 0x600f, 0x0000, 0x080c, 0x5b86, 0x00fe,
- 0x9006, 0x708e, 0x6043, 0x0008, 0x6042, 0x0005, 0x00f6, 0x708c,
- 0x708f, 0x0000, 0x9025, 0x0904, 0x558e, 0x6020, 0xd0b4, 0x1904,
- 0x558c, 0x719c, 0x81ff, 0x0904, 0x557a, 0x9486, 0x000c, 0x1904,
- 0x5587, 0x9480, 0x0018, 0x8004, 0x20a8, 0x080c, 0x5cd1, 0x2011,
- 0x0260, 0x2019, 0x1d00, 0x220c, 0x2304, 0x9106, 0x11e8, 0x8210,
- 0x8318, 0x1f04, 0x5533, 0x6043, 0x0004, 0x2061, 0x0140, 0x605b,
- 0xbc94, 0x605f, 0xf0f0, 0x2061, 0x0100, 0x6043, 0x0006, 0x708b,
- 0x0002, 0x7097, 0x0002, 0x2009, 0x07d0, 0x2011, 0x5b5c, 0x080c,
- 0x8230, 0x080c, 0x5cd8, 0x04c0, 0x080c, 0x5cd1, 0x2079, 0x0260,
- 0x7930, 0x918e, 0x1101, 0x1558, 0x7834, 0x9005, 0x1540, 0x7900,
- 0x918c, 0x00ff, 0x1118, 0x7804, 0x9005, 0x0190, 0x080c, 0x5cd1,
- 0x2011, 0x026e, 0x2019, 0x1805, 0x20a9, 0x0004, 0x220c, 0x2304,
- 0x9102, 0x0230, 0x11a0, 0x8210, 0x8318, 0x1f04, 0x556e, 0x0078,
- 0x709f, 0x0000, 0x080c, 0x5cd1, 0x20e1, 0x0000, 0x2099, 0x0260,
- 0x20e9, 0x0001, 0x20a1, 0x1d00, 0x20a9, 0x0014, 0x4003, 0x6043,
- 0x0008, 0x6043, 0x0000, 0x0010, 0x00fe, 0x0005, 0x6040, 0x9085,
- 0x0100, 0x6042, 0x6020, 0xd0b4, 0x1db8, 0x080c, 0x97f4, 0x20e1,
- 0x0001, 0x2099, 0x1d00, 0x20e9, 0x0000, 0x20a1, 0x0240, 0x20a9,
- 0x0014, 0x4003, 0x60c3, 0x000c, 0x2011, 0x19cc, 0x2013, 0x0000,
- 0x708f, 0x0000, 0x60a3, 0x0056, 0x60a7, 0x9575, 0x080c, 0x8fc3,
- 0x08d8, 0x0005, 0x7094, 0x908a, 0x001d, 0x1a0c, 0x0d65, 0x000b,
- 0x0005, 0x55e3, 0x55f6, 0x561f, 0x563f, 0x5665, 0x5694, 0x56ba,
- 0x56f2, 0x5718, 0x5746, 0x5781, 0x57b9, 0x57d7, 0x5802, 0x5824,
- 0x583f, 0x5849, 0x587d, 0x58a3, 0x58d2, 0x58f8, 0x5930, 0x5974,
- 0x59b1, 0x59d2, 0x5a2b, 0x5a4d, 0x5a7b, 0x5a7b, 0x00c6, 0x2061,
- 0x1800, 0x6003, 0x0007, 0x2061, 0x0100, 0x6004, 0x9084, 0xfff9,
- 0x6006, 0x00ce, 0x0005, 0x2061, 0x0140, 0x605b, 0xbc94, 0x605f,
- 0xf0f0, 0x2061, 0x0100, 0x6043, 0x0002, 0x7097, 0x0001, 0x2009,
- 0x07d0, 0x2011, 0x5b5c, 0x080c, 0x8230, 0x0005, 0x00f6, 0x708c,
- 0x9086, 0x0014, 0x1510, 0x6042, 0x6020, 0xd0b4, 0x11f0, 0x080c,
- 0x5cd1, 0x2079, 0x0260, 0x7a30, 0x9296, 0x1102, 0x11a0, 0x7834,
- 0x9005, 0x1188, 0x7a38, 0xd2fc, 0x0128, 0x70c0, 0x9005, 0x1110,
- 0x70c3, 0x0001, 0x2011, 0x5b5c, 0x080c, 0x816c, 0x7097, 0x0010,
- 0x080c, 0x5849, 0x0010, 0x708f, 0x0000, 0x00fe, 0x0005, 0x00f6,
- 0x7097, 0x0003, 0x6043, 0x0004, 0x2011, 0x5b5c, 0x080c, 0x816c,
- 0x080c, 0x5c55, 0x2079, 0x0240, 0x7833, 0x1102, 0x7837, 0x0000,
- 0x20a9, 0x0008, 0x9f88, 0x000e, 0x200b, 0x0000, 0x8108, 0x1f04,
- 0x5634, 0x60c3, 0x0014, 0x080c, 0x5b86, 0x00fe, 0x0005, 0x00f6,
- 0x708c, 0x9005, 0x0500, 0x2011, 0x5b5c, 0x080c, 0x816c, 0x9086,
- 0x0014, 0x11b8, 0x080c, 0x5cd1, 0x2079, 0x0260, 0x7a30, 0x9296,
- 0x1102, 0x1178, 0x7834, 0x9005, 0x1160, 0x7a38, 0xd2fc, 0x0128,
- 0x70c0, 0x9005, 0x1110, 0x70c3, 0x0001, 0x7097, 0x0004, 0x0029,
- 0x0010, 0x080c, 0x5cad, 0x00fe, 0x0005, 0x00f6, 0x7097, 0x0005,
- 0x080c, 0x5c55, 0x2079, 0x0240, 0x7833, 0x1103, 0x7837, 0x0000,
- 0x080c, 0x5cd1, 0x080c, 0x5cb4, 0x1170, 0x7080, 0x9005, 0x1158,
- 0x7158, 0x9186, 0xffff, 0x0138, 0x2011, 0x0008, 0x080c, 0x5b09,
- 0x0168, 0x080c, 0x5c8a, 0x20a9, 0x0008, 0x20e1, 0x0000, 0x2099,
- 0x026e, 0x20e9, 0x0000, 0x20a1, 0x024e, 0x4003, 0x60c3, 0x0014,
- 0x080c, 0x5b86, 0x00fe, 0x0005, 0x00f6, 0x708c, 0x9005, 0x0500,
- 0x2011, 0x5b5c, 0x080c, 0x816c, 0x9086, 0x0014, 0x11b8, 0x080c,
- 0x5cd1, 0x2079, 0x0260, 0x7a30, 0x9296, 0x1103, 0x1178, 0x7834,
- 0x9005, 0x1160, 0x7a38, 0xd2fc, 0x0128, 0x70c0, 0x9005, 0x1110,
- 0x70c3, 0x0001, 0x7097, 0x0006, 0x0029, 0x0010, 0x080c, 0x5cad,
- 0x00fe, 0x0005, 0x00f6, 0x7097, 0x0007, 0x080c, 0x5c55, 0x2079,
- 0x0240, 0x7833, 0x1104, 0x7837, 0x0000, 0x080c, 0x5cd1, 0x080c,
- 0x5cb4, 0x11b8, 0x7080, 0x9005, 0x11a0, 0x7160, 0x9186, 0xffff,
- 0x0180, 0x9180, 0x319f, 0x200d, 0x918c, 0xff00, 0x810f, 0x2011,
- 0x0008, 0x080c, 0x5b09, 0x0180, 0x080c, 0x4cb2, 0x0110, 0x080c,
- 0x24c2, 0x20a9, 0x0008, 0x20e1, 0x0000, 0x2099, 0x026e, 0x20e9,
- 0x0000, 0x20a1, 0x024e, 0x4003, 0x60c3, 0x0014, 0x080c, 0x5b86,
- 0x00fe, 0x0005, 0x00f6, 0x708c, 0x9005, 0x0500, 0x2011, 0x5b5c,
- 0x080c, 0x816c, 0x9086, 0x0014, 0x11b8, 0x080c, 0x5cd1, 0x2079,
- 0x0260, 0x7a30, 0x9296, 0x1104, 0x1178, 0x7834, 0x9005, 0x1160,
- 0x7a38, 0xd2fc, 0x0128, 0x70c0, 0x9005, 0x1110, 0x70c3, 0x0001,
- 0x7097, 0x0008, 0x0029, 0x0010, 0x080c, 0x5cad, 0x00fe, 0x0005,
- 0x00f6, 0x7097, 0x0009, 0x080c, 0x5c55, 0x2079, 0x0240, 0x7833,
- 0x1105, 0x7837, 0x0100, 0x080c, 0x5cb4, 0x1150, 0x7080, 0x9005,
- 0x1138, 0x080c, 0x5a7c, 0x1188, 0x9085, 0x0001, 0x080c, 0x24c2,
- 0x20a9, 0x0008, 0x080c, 0x5cd1, 0x20e1, 0x0000, 0x2099, 0x026e,
- 0x20e9, 0x0000, 0x20a1, 0x024e, 0x4003, 0x60c3, 0x0014, 0x080c,
- 0x5b86, 0x0010, 0x080c, 0x55d6, 0x00fe, 0x0005, 0x00f6, 0x708c,
- 0x9005, 0x05a8, 0x2011, 0x5b5c, 0x080c, 0x816c, 0x9086, 0x0014,
- 0x1560, 0x080c, 0x5cd1, 0x2079, 0x0260, 0x7a30, 0x9296, 0x1105,
- 0x1520, 0x7834, 0x9084, 0x0100, 0x2011, 0x0100, 0x921e, 0x1160,
- 0x7a38, 0xd2fc, 0x0128, 0x70c0, 0x9005, 0x1110, 0x70c3, 0x0001,
- 0x7097, 0x000a, 0x00b1, 0x0098, 0x9005, 0x1178, 0x7a38, 0xd2fc,
- 0x0128, 0x70c0, 0x9005, 0x1110, 0x70c3, 0x0001, 0x7093, 0x0000,
- 0x7097, 0x000e, 0x080c, 0x5824, 0x0010, 0x080c, 0x5cad, 0x00fe,
- 0x0005, 0x00f6, 0x7097, 0x000b, 0x2011, 0x1d0e, 0x20e9, 0x0001,
- 0x22a0, 0x20a9, 0x0040, 0x2019, 0xffff, 0x4304, 0x080c, 0x5c55,
- 0x2079, 0x0240, 0x7833, 0x1106, 0x7837, 0x0000, 0x080c, 0x5cb4,
- 0x0118, 0x2013, 0x0000, 0x0020, 0x705c, 0x9085, 0x0100, 0x2012,
- 0x20a9, 0x0040, 0x2009, 0x024e, 0x2011, 0x1d0e, 0x220e, 0x8210,
- 0x8108, 0x9186, 0x0260, 0x1128, 0x6810, 0x8000, 0x6812, 0x2009,
- 0x0240, 0x1f04, 0x57a6, 0x60c3, 0x0084, 0x080c, 0x5b86, 0x00fe,
- 0x0005, 0x00f6, 0x708c, 0x9005, 0x01c0, 0x2011, 0x5b5c, 0x080c,
- 0x816c, 0x9086, 0x0084, 0x1178, 0x080c, 0x5cd1, 0x2079, 0x0260,
- 0x7a30, 0x9296, 0x1106, 0x1138, 0x7834, 0x9005, 0x1120, 0x7097,
- 0x000c, 0x0029, 0x0010, 0x080c, 0x5cad, 0x00fe, 0x0005, 0x00f6,
- 0x7097, 0x000d, 0x080c, 0x5c55, 0x2079, 0x0240, 0x7833, 0x1107,
- 0x7837, 0x0000, 0x080c, 0x5cd1, 0x20a9, 0x0040, 0x2011, 0x026e,
- 0x2009, 0x024e, 0x220e, 0x8210, 0x8108, 0x9186, 0x0260, 0x1150,
- 0x6810, 0x8000, 0x6812, 0x2009, 0x0240, 0x6814, 0x8000, 0x6816,
- 0x2011, 0x0260, 0x1f04, 0x57ea, 0x60c3, 0x0084, 0x080c, 0x5b86,
- 0x00fe, 0x0005, 0x00f6, 0x708c, 0x9005, 0x01e0, 0x2011, 0x5b5c,
- 0x080c, 0x816c, 0x9086, 0x0084, 0x1198, 0x080c, 0x5cd1, 0x2079,
- 0x0260, 0x7a30, 0x9296, 0x1107, 0x1158, 0x7834, 0x9005, 0x1140,
- 0x7093, 0x0001, 0x080c, 0x5c27, 0x7097, 0x000e, 0x0029, 0x0010,
- 0x080c, 0x5cad, 0x00fe, 0x0005, 0x918d, 0x0001, 0x080c, 0x5cfc,
- 0x7097, 0x000f, 0x708f, 0x0000, 0x2061, 0x0140, 0x605b, 0xbc85,
- 0x605f, 0xb5b5, 0x2061, 0x0100, 0x6043, 0x0005, 0x6043, 0x0004,
- 0x2009, 0x07d0, 0x2011, 0x5b5c, 0x080c, 0x8160, 0x0005, 0x708c,
- 0x9005, 0x0130, 0x2011, 0x5b5c, 0x080c, 0x816c, 0x7097, 0x0000,
- 0x0005, 0x7097, 0x0011, 0x080c, 0x97f4, 0x080c, 0x5cd1, 0x20e1,
- 0x0000, 0x2099, 0x0260, 0x20e9, 0x0000, 0x20a1, 0x0240, 0x748c,
- 0x9480, 0x0018, 0x9080, 0x0007, 0x9084, 0x03f8, 0x8004, 0x20a8,
- 0x4003, 0x080c, 0x5cb4, 0x11a0, 0x7178, 0x81ff, 0x0188, 0x900e,
- 0x707c, 0x9084, 0x00ff, 0x0160, 0x080c, 0x2459, 0x9186, 0x007e,
- 0x0138, 0x9186, 0x0080, 0x0120, 0x2011, 0x0008, 0x080c, 0x5b09,
- 0x60c3, 0x0014, 0x080c, 0x5b86, 0x0005, 0x00f6, 0x708c, 0x9005,
- 0x0500, 0x2011, 0x5b5c, 0x080c, 0x816c, 0x9086, 0x0014, 0x11b8,
- 0x080c, 0x5cd1, 0x2079, 0x0260, 0x7a30, 0x9296, 0x1103, 0x1178,
- 0x7834, 0x9005, 0x1160, 0x7a38, 0xd2fc, 0x0128, 0x70c0, 0x9005,
- 0x1110, 0x70c3, 0x0001, 0x7097, 0x0012, 0x0029, 0x0010, 0x708f,
- 0x0000, 0x00fe, 0x0005, 0x00f6, 0x7097, 0x0013, 0x080c, 0x5c63,
- 0x2079, 0x0240, 0x7833, 0x1103, 0x7837, 0x0000, 0x080c, 0x5cd1,
- 0x080c, 0x5cb4, 0x1170, 0x7080, 0x9005, 0x1158, 0x7158, 0x9186,
- 0xffff, 0x0138, 0x2011, 0x0008, 0x080c, 0x5b09, 0x0168, 0x080c,
- 0x5c8a, 0x20a9, 0x0008, 0x20e1, 0x0000, 0x2099, 0x026e, 0x20e9,
- 0x0000, 0x20a1, 0x024e, 0x4003, 0x60c3, 0x0014, 0x080c, 0x5b86,
- 0x00fe, 0x0005, 0x00f6, 0x708c, 0x9005, 0x0500, 0x2011, 0x5b5c,
- 0x080c, 0x816c, 0x9086, 0x0014, 0x11b8, 0x080c, 0x5cd1, 0x2079,
- 0x0260, 0x7a30, 0x9296, 0x1104, 0x1178, 0x7834, 0x9005, 0x1160,
- 0x7a38, 0xd2fc, 0x0128, 0x70c0, 0x9005, 0x1110, 0x70c3, 0x0001,
- 0x7097, 0x0014, 0x0029, 0x0010, 0x708f, 0x0000, 0x00fe, 0x0005,
- 0x00f6, 0x7097, 0x0015, 0x080c, 0x5c63, 0x2079, 0x0240, 0x7833,
- 0x1104, 0x7837, 0x0000, 0x080c, 0x5cd1, 0x080c, 0x5cb4, 0x11b8,
- 0x7080, 0x9005, 0x11a0, 0x7160, 0x9186, 0xffff, 0x0180, 0x9180,
- 0x319f, 0x200d, 0x918c, 0xff00, 0x810f, 0x2011, 0x0008, 0x080c,
- 0x5b09, 0x0180, 0x080c, 0x4cb2, 0x0110, 0x080c, 0x24c2, 0x20a9,
- 0x0008, 0x20e1, 0x0000, 0x2099, 0x026e, 0x20e9, 0x0000, 0x20a1,
- 0x024e, 0x4003, 0x60c3, 0x0014, 0x080c, 0x5b86, 0x00fe, 0x0005,
- 0x00f6, 0x708c, 0x9005, 0x05f0, 0x2011, 0x5b5c, 0x080c, 0x816c,
- 0x9086, 0x0014, 0x15a8, 0x080c, 0x5cd1, 0x2079, 0x0260, 0x7a30,
- 0x9296, 0x1105, 0x1568, 0x7834, 0x9084, 0x0100, 0x2011, 0x0100,
- 0x921e, 0x1168, 0x9085, 0x0001, 0x080c, 0x5cfc, 0x7a38, 0xd2fc,
- 0x0128, 0x70c0, 0x9005, 0x1110, 0x70c3, 0x0001, 0x0080, 0x9005,
- 0x11b8, 0x7a38, 0xd2fc, 0x0128, 0x70c0, 0x9005, 0x1110, 0x70c3,
- 0x0001, 0x9085, 0x0001, 0x080c, 0x5cfc, 0x7093, 0x0000, 0x7a38,
- 0xd2f4, 0x0110, 0x70db, 0x0008, 0x7097, 0x0016, 0x0029, 0x0010,
- 0x708f, 0x0000, 0x00fe, 0x0005, 0x080c, 0x97f4, 0x080c, 0x5cd1,
- 0x20e1, 0x0000, 0x2099, 0x0260, 0x20e9, 0x0000, 0x20a1, 0x0240,
- 0x20a9, 0x000e, 0x4003, 0x2011, 0x026d, 0x2204, 0x9084, 0x0100,
- 0x2011, 0x024d, 0x2012, 0x2011, 0x026e, 0x7097, 0x0017, 0x080c,
- 0x5cb4, 0x1150, 0x7080, 0x9005, 0x1138, 0x080c, 0x5a7c, 0x1188,
- 0x9085, 0x0001, 0x080c, 0x24c2, 0x20a9, 0x0008, 0x080c, 0x5cd1,
- 0x20e1, 0x0000, 0x2099, 0x026e, 0x20e9, 0x0000, 0x20a1, 0x024e,
- 0x4003, 0x60c3, 0x0014, 0x080c, 0x5b86, 0x0010, 0x080c, 0x55d6,
- 0x0005, 0x00f6, 0x708c, 0x9005, 0x01d8, 0x2011, 0x5b5c, 0x080c,
- 0x816c, 0x9086, 0x0084, 0x1190, 0x080c, 0x5cd1, 0x2079, 0x0260,
- 0x7a30, 0x9296, 0x1106, 0x1150, 0x7834, 0x9005, 0x1138, 0x9006,
- 0x080c, 0x5cfc, 0x7097, 0x0018, 0x0029, 0x0010, 0x708f, 0x0000,
- 0x00fe, 0x0005, 0x00f6, 0x7097, 0x0019, 0x080c, 0x5c63, 0x2079,
- 0x0240, 0x7833, 0x1106, 0x7837, 0x0000, 0x080c, 0x5cd1, 0x2009,
- 0x026e, 0x2039, 0x1d0e, 0x20a9, 0x0040, 0x213e, 0x8738, 0x8108,
- 0x9186, 0x0280, 0x1128, 0x6814, 0x8000, 0x6816, 0x2009, 0x0260,
- 0x1f04, 0x59e5, 0x2039, 0x1d0e, 0x080c, 0x5cb4, 0x11e8, 0x2728,
- 0x2514, 0x8207, 0x9084, 0x00ff, 0x8000, 0x2018, 0x9294, 0x00ff,
- 0x8007, 0x9205, 0x202a, 0x705c, 0x2310, 0x8214, 0x92a0, 0x1d0e,
- 0x2414, 0x938c, 0x0001, 0x0118, 0x9294, 0xff00, 0x0018, 0x9294,
- 0x00ff, 0x8007, 0x9215, 0x2222, 0x20a9, 0x0040, 0x2009, 0x024e,
- 0x270e, 0x8738, 0x8108, 0x9186, 0x0260, 0x1128, 0x6810, 0x8000,
- 0x6812, 0x2009, 0x0240, 0x1f04, 0x5a18, 0x60c3, 0x0084, 0x080c,
- 0x5b86, 0x00fe, 0x0005, 0x00f6, 0x708c, 0x9005, 0x01e0, 0x2011,
- 0x5b5c, 0x080c, 0x816c, 0x9086, 0x0084, 0x1198, 0x080c, 0x5cd1,
- 0x2079, 0x0260, 0x7a30, 0x9296, 0x1107, 0x1158, 0x7834, 0x9005,
- 0x1140, 0x7093, 0x0001, 0x080c, 0x5c27, 0x7097, 0x001a, 0x0029,
- 0x0010, 0x708f, 0x0000, 0x00fe, 0x0005, 0x9085, 0x0001, 0x080c,
- 0x5cfc, 0x7097, 0x001b, 0x080c, 0x97f4, 0x080c, 0x5cd1, 0x2011,
- 0x0260, 0x2009, 0x0240, 0x748c, 0x9480, 0x0018, 0x9080, 0x0007,
- 0x9084, 0x03f8, 0x8004, 0x20a8, 0x220e, 0x8210, 0x8108, 0x9186,
- 0x0260, 0x1150, 0x6810, 0x8000, 0x6812, 0x2009, 0x0240, 0x6814,
- 0x8000, 0x6816, 0x2011, 0x0260, 0x1f04, 0x5a64, 0x60c3, 0x0084,
- 0x080c, 0x5b86, 0x0005, 0x0005, 0x0086, 0x0096, 0x2029, 0x185c,
- 0x252c, 0x20a9, 0x0008, 0x2041, 0x1d0e, 0x20e9, 0x0001, 0x28a0,
- 0x080c, 0x5cd1, 0x20e1, 0x0000, 0x2099, 0x026e, 0x4003, 0x20a9,
- 0x0008, 0x2011, 0x0007, 0xd5d4, 0x0108, 0x9016, 0x2800, 0x9200,
- 0x200c, 0x91a6, 0xffff, 0x1148, 0xd5d4, 0x0110, 0x8210, 0x0008,
- 0x8211, 0x1f04, 0x5a96, 0x0804, 0x5b05, 0x82ff, 0x1160, 0xd5d4,
- 0x0120, 0x91a6, 0x3fff, 0x0d90, 0x0020, 0x91a6, 0x3fff, 0x0904,
- 0x5b05, 0x918d, 0xc000, 0x20a9, 0x0010, 0x2019, 0x0001, 0xd5d4,
- 0x0110, 0x2019, 0x0010, 0x2120, 0xd5d4, 0x0110, 0x8423, 0x0008,
- 0x8424, 0x1240, 0xd5d4, 0x0110, 0x8319, 0x0008, 0x8318, 0x1f04,
- 0x5abc, 0x04d8, 0x23a8, 0x2021, 0x0001, 0x8426, 0x8425, 0x1f04,
- 0x5ace, 0x2328, 0x8529, 0x92be, 0x0007, 0x0158, 0x0006, 0x2039,
- 0x0007, 0x2200, 0x973a, 0x000e, 0x27a8, 0x95a8, 0x0010, 0x1f04,
- 0x5add, 0x755a, 0x95c8, 0x319f, 0x292d, 0x95ac, 0x00ff, 0x757e,
- 0x6532, 0x6536, 0x0016, 0x2508, 0x080c, 0x24a2, 0x001e, 0x60e7,
- 0x0000, 0x65ea, 0x2018, 0x2304, 0x9405, 0x201a, 0x7083, 0x0001,
- 0x20e9, 0x0000, 0x20a1, 0x024e, 0x20e1, 0x0001, 0x2898, 0x20a9,
- 0x0008, 0x4003, 0x9085, 0x0001, 0x0008, 0x9006, 0x009e, 0x008e,
- 0x0005, 0x0156, 0x01c6, 0x01d6, 0x0136, 0x0146, 0x22a8, 0x20e1,
- 0x0000, 0x2099, 0x026e, 0x20e9, 0x0000, 0x2011, 0x024e, 0x22a0,
- 0x4003, 0x014e, 0x013e, 0x01de, 0x01ce, 0x015e, 0x2118, 0x9026,
- 0x2001, 0x0007, 0x939a, 0x0010, 0x0218, 0x8420, 0x8001, 0x0cd0,
- 0x2118, 0x84ff, 0x0120, 0x939a, 0x0010, 0x8421, 0x1de0, 0x2021,
- 0x0001, 0x83ff, 0x0118, 0x8423, 0x8319, 0x1de8, 0x9238, 0x2029,
- 0x026e, 0x9528, 0x2504, 0x942c, 0x11b8, 0x9405, 0x203a, 0x715a,
- 0x91a0, 0x319f, 0x242d, 0x95ac, 0x00ff, 0x757e, 0x6532, 0x6536,
- 0x0016, 0x2508, 0x080c, 0x24a2, 0x001e, 0x60e7, 0x0000, 0x65ea,
- 0x7083, 0x0001, 0x9084, 0x0000, 0x0005, 0x00e6, 0x2071, 0x1800,
- 0x7087, 0x0000, 0x00ee, 0x0005, 0x00e6, 0x00f6, 0x2079, 0x0100,
- 0x2071, 0x0140, 0x080c, 0x5c16, 0x080c, 0x8fd0, 0x7004, 0x9084,
- 0x4000, 0x0110, 0x080c, 0x2882, 0x0126, 0x2091, 0x8000, 0x2071,
- 0x1825, 0x2073, 0x0000, 0x7840, 0x0026, 0x0016, 0x2009, 0x00f7,
- 0x080c, 0x5c73, 0x001e, 0x9094, 0x0010, 0x9285, 0x0080, 0x7842,
- 0x7a42, 0x002e, 0x012e, 0x00fe, 0x00ee, 0x0005, 0x0126, 0x2091,
- 0x8000, 0x080c, 0x27dd, 0x0228, 0x2011, 0x0101, 0x2204, 0xc0c5,
- 0x2012, 0x2011, 0x19cc, 0x2013, 0x0000, 0x708f, 0x0000, 0x012e,
- 0x60a3, 0x0056, 0x60a7, 0x9575, 0x080c, 0x8fc3, 0x6144, 0xd184,
- 0x0120, 0x7194, 0x918d, 0x2000, 0x0018, 0x7188, 0x918d, 0x1000,
- 0x2011, 0x1971, 0x2112, 0x2009, 0x07d0, 0x2011, 0x5b5c, 0x080c,
- 0x8230, 0x0005, 0x0016, 0x0026, 0x00c6, 0x0126, 0x2091, 0x8000,
- 0x080c, 0x98c7, 0x080c, 0x9b6c, 0x080c, 0x98e3, 0x2009, 0x00f7,
- 0x080c, 0x5c73, 0x2061, 0x19db, 0x900e, 0x611a, 0x611e, 0x6172,
- 0x6176, 0x2061, 0x1800, 0x6003, 0x0001, 0x2061, 0x0100, 0x6043,
- 0x0090, 0x6043, 0x0010, 0x2009, 0x1971, 0x200b, 0x0000, 0x2009,
- 0x002d, 0x2011, 0x5be2, 0x080c, 0x8160, 0x012e, 0x00ce, 0x002e,
- 0x001e, 0x0005, 0x00e6, 0x0006, 0x0126, 0x2091, 0x8000, 0x0471,
- 0x2071, 0x0100, 0x080c, 0x8fd0, 0x2071, 0x0140, 0x7004, 0x9084,
- 0x4000, 0x0110, 0x080c, 0x2882, 0x080c, 0x70c2, 0x0188, 0x080c,
- 0x70dd, 0x1170, 0x080c, 0x73c3, 0x0016, 0x080c, 0x2571, 0x2001,
- 0x1945, 0x2102, 0x001e, 0x080c, 0x73be, 0x080c, 0x6feb, 0x0050,
- 0x2009, 0x0001, 0x080c, 0x285e, 0x2001, 0x0001, 0x080c, 0x23fe,
- 0x080c, 0x5bb2, 0x012e, 0x000e, 0x00ee, 0x0005, 0x2001, 0x180e,
- 0x2004, 0xd0bc, 0x0158, 0x0026, 0x0036, 0x2011, 0x8017, 0x2001,
- 0x1971, 0x201c, 0x080c, 0x48fa, 0x003e, 0x002e, 0x0005, 0x20a9,
- 0x0012, 0x20e9, 0x0001, 0x20a1, 0x1d80, 0x080c, 0x5cd1, 0x20e9,
- 0x0000, 0x2099, 0x026e, 0x0099, 0x20a9, 0x0020, 0x080c, 0x5ccb,
- 0x2099, 0x0260, 0x20a1, 0x1d92, 0x0051, 0x20a9, 0x000e, 0x080c,
- 0x5cce, 0x2099, 0x0260, 0x20a1, 0x1db2, 0x0009, 0x0005, 0x0016,
- 0x0026, 0x3410, 0x3308, 0x2104, 0x8007, 0x2012, 0x8108, 0x8210,
- 0x1f04, 0x5c4b, 0x002e, 0x001e, 0x0005, 0x080c, 0x97f4, 0x20e1,
- 0x0001, 0x2099, 0x1d00, 0x20e9, 0x0000, 0x20a1, 0x0240, 0x20a9,
- 0x000c, 0x4003, 0x0005, 0x080c, 0x97f4, 0x080c, 0x5cd1, 0x20e1,
- 0x0000, 0x2099, 0x0260, 0x20e9, 0x0000, 0x20a1, 0x0240, 0x20a9,
- 0x000c, 0x4003, 0x0005, 0x00c6, 0x0006, 0x2061, 0x0100, 0x810f,
- 0x2001, 0x1833, 0x2004, 0x9005, 0x1138, 0x2001, 0x1817, 0x2004,
- 0x9084, 0x00ff, 0x9105, 0x0010, 0x9185, 0x00f7, 0x604a, 0x000e,
- 0x00ce, 0x0005, 0x0016, 0x0046, 0x080c, 0x6686, 0x0158, 0x9006,
- 0x2020, 0x2009, 0x002a, 0x080c, 0xd2bc, 0x2001, 0x180c, 0x200c,
- 0xc195, 0x2102, 0x2019, 0x002a, 0x900e, 0x080c, 0x2ff3, 0x080c,
- 0xbf8f, 0x0140, 0x0036, 0x2019, 0xffff, 0x2021, 0x0007, 0x080c,
- 0x4a97, 0x003e, 0x004e, 0x001e, 0x0005, 0x080c, 0x5bb2, 0x7097,
- 0x0000, 0x708f, 0x0000, 0x0005, 0x0006, 0x2001, 0x180c, 0x2004,
- 0xd09c, 0x0100, 0x000e, 0x0005, 0x0006, 0x0016, 0x0126, 0x2091,
- 0x8000, 0x2001, 0x0101, 0x200c, 0x918d, 0x0006, 0x2102, 0x012e,
- 0x001e, 0x000e, 0x0005, 0x2009, 0x0001, 0x0020, 0x2009, 0x0002,
- 0x0008, 0x900e, 0x6814, 0x9084, 0xffc0, 0x910d, 0x6916, 0x0005,
- 0x00f6, 0x0156, 0x0146, 0x01d6, 0x9006, 0x20a9, 0x0080, 0x20e9,
- 0x0001, 0x20a1, 0x1d00, 0x4004, 0x2079, 0x1d00, 0x7803, 0x2200,
- 0x7807, 0x00ef, 0x780f, 0x00ef, 0x7813, 0x0138, 0x7823, 0xffff,
- 0x7827, 0xffff, 0x01de, 0x014e, 0x015e, 0x00fe, 0x0005, 0x2001,
- 0x1800, 0x2003, 0x0001, 0x0005, 0x2001, 0x197e, 0x0118, 0x2003,
- 0x0001, 0x0010, 0x2003, 0x0000, 0x0005, 0x0156, 0x20a9, 0x0800,
- 0x2009, 0x1000, 0x9006, 0x200a, 0x8108, 0x1f04, 0x5d0b, 0x015e,
- 0x0005, 0x00d6, 0x0036, 0x0156, 0x0136, 0x0146, 0x2069, 0x185b,
- 0x9006, 0xb802, 0xb8c6, 0xb807, 0x0707, 0xb80a, 0xb80e, 0xb812,
- 0x9198, 0x319f, 0x231d, 0x939c, 0x00ff, 0xbb16, 0x0016, 0x0026,
- 0xb886, 0x080c, 0x9b65, 0x1120, 0x9192, 0x007e, 0x1208, 0xbb86,
- 0x20a9, 0x0004, 0xb8b4, 0x20e8, 0xb9b8, 0x9198, 0x0006, 0x9006,
- 0x23a0, 0x4004, 0x20a9, 0x0004, 0x9198, 0x000a, 0x23a0, 0x4004,
- 0x002e, 0x001e, 0xb83e, 0xb842, 0xb8be, 0xb8c2, 0xb85e, 0xb862,
- 0xb866, 0xb86a, 0xb86f, 0x0100, 0xb872, 0xb876, 0xb87a, 0xb88a,
- 0xb88e, 0xb893, 0x0008, 0xb896, 0xb89a, 0xb89e, 0xb8ae, 0xb9a2,
- 0x0096, 0xb8a4, 0x904d, 0x0110, 0x080c, 0x1061, 0xb8a7, 0x0000,
- 0x009e, 0x9006, 0xb84a, 0x6810, 0xb83a, 0x680c, 0xb846, 0x6814,
- 0x9084, 0x00ff, 0xb842, 0x014e, 0x013e, 0x015e, 0x003e, 0x00de,
- 0x0005, 0x0126, 0x2091, 0x8000, 0xa974, 0xae78, 0x9684, 0x3fff,
- 0x9082, 0x4000, 0x1a04, 0x5dcf, 0x9182, 0x0800, 0x1a04, 0x5dd3,
- 0x2001, 0x180c, 0x2004, 0x9084, 0x0003, 0x1904, 0x5dd9, 0x9188,
- 0x1000, 0x2104, 0x905d, 0x0198, 0xb804, 0x9084, 0x00ff, 0x908e,
- 0x0006, 0x1188, 0xb8a4, 0x900d, 0x1904, 0x5deb, 0x080c, 0x6149,
- 0x9006, 0x012e, 0x0005, 0x2001, 0x0005, 0x900e, 0x04b8, 0x2001,
- 0x0028, 0x900e, 0x0498, 0x9082, 0x0006, 0x1290, 0x080c, 0x9b65,
- 0x1160, 0xb8a0, 0x9084, 0xff80, 0x1140, 0xb900, 0xd1fc, 0x0d10,
- 0x2001, 0x0029, 0x2009, 0x1000, 0x0408, 0x2001, 0x0028, 0x00a8,
- 0x2009, 0x180c, 0x210c, 0xd18c, 0x0118, 0x2001, 0x0004, 0x0068,
- 0xd184, 0x0118, 0x2001, 0x0004, 0x0040, 0x2001, 0x0029, 0xb900,
- 0xd1fc, 0x0118, 0x2009, 0x1000, 0x0048, 0x900e, 0x0038, 0x2001,
- 0x0029, 0x900e, 0x0018, 0x2001, 0x0029, 0x900e, 0x9005, 0x012e,
- 0x0005, 0x2001, 0x180c, 0x2004, 0xd084, 0x19d0, 0x9188, 0x1000,
- 0x2104, 0x9065, 0x09a8, 0x080c, 0x668a, 0x1990, 0xb800, 0xd0bc,
- 0x0978, 0x0804, 0x5d92, 0x080c, 0x64fe, 0x0904, 0x5d9b, 0x0804,
- 0x5d96, 0x00e6, 0x2071, 0x19bf, 0x7004, 0x9086, 0x0002, 0x1128,
- 0x7030, 0x9080, 0x0004, 0x2004, 0x9b06, 0x00ee, 0x0005, 0x00b6,
- 0x00e6, 0x0126, 0x2091, 0x8000, 0xa974, 0x9182, 0x0800, 0x1a04,
- 0x5e7a, 0x9188, 0x1000, 0x2104, 0x905d, 0x0904, 0x5e52, 0xb8a0,
- 0x9086, 0x007f, 0x0178, 0x080c, 0x6692, 0x0160, 0xa994, 0x81ff,
- 0x0130, 0x908e, 0x0004, 0x0130, 0x908e, 0x0005, 0x0118, 0x080c,
- 0x668a, 0x1598, 0xa87c, 0xd0fc, 0x01e0, 0xa894, 0x9005, 0x01c8,
- 0x2060, 0x0026, 0x2010, 0x080c, 0xb85e, 0x002e, 0x1120, 0x2001,
- 0x0008, 0x0804, 0x5e7c, 0x6020, 0x9086, 0x000a, 0x0120, 0x2001,
- 0x0008, 0x0804, 0x5e7c, 0x601a, 0x6003, 0x0008, 0x2900, 0x6016,
- 0x0058, 0x080c, 0x9b90, 0x05e8, 0x2b00, 0x6012, 0x2900, 0x6016,
- 0x600b, 0xffff, 0x6023, 0x000a, 0x2009, 0x0003, 0x080c, 0x9c82,
- 0x9006, 0x0458, 0x2001, 0x0028, 0x0438, 0x9082, 0x0006, 0x1290,
- 0x080c, 0x9b65, 0x1160, 0xb8a0, 0x9084, 0xff80, 0x1140, 0xb900,
- 0xd1fc, 0x0900, 0x2001, 0x0029, 0x2009, 0x1000, 0x00a8, 0x2001,
- 0x0028, 0x0090, 0x2009, 0x180c, 0x210c, 0xd18c, 0x0118, 0x2001,
- 0x0004, 0x0050, 0xd184, 0x0118, 0x2001, 0x0004, 0x0028, 0x2001,
- 0x0029, 0x0010, 0x2001, 0x0029, 0x9005, 0x012e, 0x00ee, 0x00be,
- 0x0005, 0x2001, 0x002c, 0x0cc0, 0x00f6, 0x00b6, 0x0126, 0x2091,
- 0x8000, 0xa8e0, 0x9005, 0x1550, 0xa8dc, 0x9082, 0x0101, 0x1630,
- 0xa8c8, 0x9005, 0x1518, 0xa8c4, 0x9082, 0x0101, 0x12f8, 0xa974,
- 0x2079, 0x1800, 0x9182, 0x0800, 0x12e8, 0x7830, 0x9084, 0x0003,
- 0x1130, 0xaa98, 0xab94, 0xa878, 0x9084, 0x0007, 0x00ea, 0x7930,
- 0xd18c, 0x0118, 0x2001, 0x0004, 0x0038, 0xd184, 0x0118, 0x2001,
- 0x0004, 0x0010, 0x2001, 0x0029, 0x900e, 0x0038, 0x2001, 0x002c,
- 0x900e, 0x0018, 0x2001, 0x0029, 0x900e, 0x9006, 0x0008, 0x9005,
- 0x012e, 0x00be, 0x00fe, 0x0005, 0x5f11, 0x5ecc, 0x5ee3, 0x5f11,
- 0x5f11, 0x5f11, 0x5f11, 0x5f11, 0x2100, 0x9082, 0x007e, 0x1278,
- 0x080c, 0x622f, 0x0148, 0x9046, 0xb810, 0x9306, 0x1904, 0x5f19,
- 0xb814, 0x9206, 0x15f0, 0x0028, 0xbb12, 0xba16, 0x0010, 0x080c,
- 0x47b4, 0x0150, 0x04b0, 0x080c, 0x628f, 0x1598, 0xb810, 0x9306,
- 0x1580, 0xb814, 0x9206, 0x1568, 0x080c, 0x9b90, 0x0530, 0x2b00,
- 0x6012, 0x080c, 0xbd09, 0x2900, 0x6016, 0x600b, 0xffff, 0x6023,
- 0x000a, 0xa878, 0x9086, 0x0001, 0x1170, 0x080c, 0x302e, 0x9006,
- 0x080c, 0x61cc, 0x2001, 0x0002, 0x080c, 0x61e0, 0x2001, 0x0200,
- 0xb86e, 0xb893, 0x0002, 0x2009, 0x0003, 0x080c, 0x9c82, 0x9006,
- 0x0068, 0x2001, 0x0001, 0x900e, 0x0038, 0x2001, 0x002c, 0x900e,
- 0x0018, 0x2001, 0x0028, 0x900e, 0x9005, 0x0000, 0x012e, 0x00be,
- 0x00fe, 0x0005, 0x00b6, 0x00f6, 0x00e6, 0x0126, 0x2091, 0x8000,
- 0xa894, 0x90c6, 0x0015, 0x0904, 0x60f2, 0x90c6, 0x0056, 0x0904,
- 0x60f6, 0x90c6, 0x0066, 0x0904, 0x60fa, 0x90c6, 0x0067, 0x0904,
- 0x60fe, 0x90c6, 0x0068, 0x0904, 0x6102, 0x90c6, 0x0071, 0x0904,
- 0x6106, 0x90c6, 0x0074, 0x0904, 0x610a, 0x90c6, 0x007c, 0x0904,
- 0x610e, 0x90c6, 0x007e, 0x0904, 0x6112, 0x90c6, 0x0037, 0x0904,
- 0x6116, 0x9016, 0x2079, 0x1800, 0xa974, 0x9186, 0x00ff, 0x0904,
- 0x60ed, 0x9182, 0x0800, 0x1a04, 0x60ed, 0x080c, 0x628f, 0x1198,
- 0xb804, 0x9084, 0x00ff, 0x9082, 0x0006, 0x1268, 0xa894, 0x90c6,
- 0x006f, 0x0148, 0x080c, 0x9b65, 0x1904, 0x60d6, 0xb8a0, 0x9084,
- 0xff80, 0x1904, 0x60d6, 0xa894, 0x90c6, 0x006f, 0x0158, 0x90c6,
- 0x005e, 0x0904, 0x6036, 0x90c6, 0x0064, 0x0904, 0x605f, 0x2008,
- 0x0804, 0x5ff9, 0xa998, 0xa8b0, 0x2040, 0x080c, 0x9b65, 0x1120,
- 0x9182, 0x007f, 0x0a04, 0x5ff9, 0x9186, 0x00ff, 0x0904, 0x5ff9,
- 0x9182, 0x0800, 0x1a04, 0x5ff9, 0xaaa0, 0xab9c, 0x7878, 0x9306,
- 0x11a8, 0x787c, 0x0096, 0x924e, 0x1128, 0x2208, 0x2310, 0x009e,
- 0x0804, 0x5ff9, 0x080c, 0x9b65, 0x1140, 0x99cc, 0xff00, 0x009e,
- 0x1128, 0x2208, 0x2310, 0x0804, 0x5ff9, 0x009e, 0x080c, 0x47b4,
- 0x0904, 0x6002, 0x900e, 0x9016, 0x90c6, 0x4000, 0x1558, 0x0006,
- 0x080c, 0x6582, 0x1108, 0xc185, 0xb800, 0xd0bc, 0x0108, 0xc18d,
- 0x20a9, 0x0004, 0xa860, 0x20e8, 0xa85c, 0x9080, 0x0031, 0x20a0,
- 0xb8b4, 0x20e0, 0xb8b8, 0x9080, 0x0006, 0x2098, 0x080c, 0x0fac,
- 0x20a9, 0x0004, 0xa860, 0x20e8, 0xa85c, 0x9080, 0x0035, 0x20a0,
- 0xb8b4, 0x20e0, 0xb8b8, 0x9080, 0x000a, 0x2098, 0x080c, 0x0fac,
- 0x000e, 0x00c8, 0x90c6, 0x4007, 0x1110, 0x2408, 0x00a0, 0x90c6,
- 0x4008, 0x1118, 0x2708, 0x2610, 0x0070, 0x90c6, 0x4009, 0x1108,
- 0x0050, 0x90c6, 0x4006, 0x0138, 0x2001, 0x4005, 0x2009, 0x000a,
- 0x0010, 0x2001, 0x4006, 0xa896, 0xa99a, 0xaa9e, 0x2001, 0x0030,
- 0x900e, 0x0470, 0x080c, 0x9b90, 0x1130, 0x2001, 0x4005, 0x2009,
- 0x0003, 0x9016, 0x0c80, 0x2b00, 0x6012, 0x080c, 0xbd09, 0x2900,
- 0x6016, 0x6023, 0x0001, 0xa868, 0xd88c, 0x0108, 0xc0f5, 0xa86a,
- 0x0126, 0x2091, 0x8000, 0x080c, 0x302e, 0x012e, 0x9006, 0x080c,
- 0x61cc, 0x2001, 0x0002, 0x080c, 0x61e0, 0x2009, 0x0002, 0x080c,
- 0x9c82, 0xa8b0, 0xd094, 0x0118, 0xb8c4, 0xc08d, 0xb8c6, 0x9006,
- 0x9005, 0x012e, 0x00ee, 0x00fe, 0x00be, 0x0005, 0x080c, 0x53bc,
- 0x0118, 0x2009, 0x0007, 0x00f8, 0xa998, 0xaeb0, 0x080c, 0x628f,
- 0x1904, 0x5ff4, 0x9186, 0x007f, 0x0130, 0x080c, 0x668a, 0x0118,
- 0x2009, 0x0009, 0x0080, 0x0096, 0x080c, 0x102f, 0x1120, 0x009e,
- 0x2009, 0x0002, 0x0040, 0x2900, 0x009e, 0xa806, 0x080c, 0xba5c,
- 0x19b0, 0x2009, 0x0003, 0x2001, 0x4005, 0x0804, 0x5ffb, 0xa998,
- 0xaeb0, 0x080c, 0x628f, 0x1904, 0x5ff4, 0x0096, 0x080c, 0x102f,
- 0x1128, 0x009e, 0x2009, 0x0002, 0x0804, 0x60b3, 0x2900, 0x009e,
- 0xa806, 0x0096, 0x2048, 0x20a9, 0x002b, 0xb8b4, 0x20e0, 0xb8b8,
- 0x2098, 0xa860, 0x20e8, 0xa85c, 0x9080, 0x0002, 0x20a0, 0x4003,
- 0x20a9, 0x0008, 0x9080, 0x0006, 0x20a0, 0xbbb8, 0x9398, 0x0006,
- 0x2398, 0x080c, 0x0fac, 0x009e, 0xa87b, 0x0000, 0xa883, 0x0000,
- 0xa897, 0x4000, 0xd684, 0x1168, 0x080c, 0x53a8, 0xd0b4, 0x1118,
- 0xa89b, 0x000b, 0x00e0, 0xb800, 0xd08c, 0x0118, 0xa89b, 0x000c,
- 0x00b0, 0x080c, 0x668a, 0x0118, 0xa89b, 0x0009, 0x0080, 0x080c,
- 0x53bc, 0x0118, 0xa89b, 0x0007, 0x0050, 0x080c, 0xba3f, 0x1904,
- 0x602f, 0x2009, 0x0003, 0x2001, 0x4005, 0x0804, 0x5ffb, 0xa87b,
- 0x0030, 0xa897, 0x4005, 0xa804, 0x8006, 0x8006, 0x8007, 0x90bc,
- 0x003f, 0x9084, 0xffc0, 0x9080, 0x0002, 0x2009, 0x002b, 0xaaa0,
- 0xab9c, 0xaca8, 0xada4, 0x2031, 0x0000, 0x2041, 0x127e, 0x080c,
- 0xa0f3, 0x1904, 0x602f, 0x2009, 0x0002, 0x08e8, 0x2001, 0x0028,
- 0x900e, 0x0804, 0x6030, 0x2009, 0x180c, 0x210c, 0xd18c, 0x0118,
- 0x2001, 0x0004, 0x0038, 0xd184, 0x0118, 0x2001, 0x0004, 0x0010,
- 0x2001, 0x0029, 0x900e, 0x0804, 0x6030, 0x2001, 0x0029, 0x900e,
- 0x0804, 0x6030, 0x080c, 0x35cd, 0x0804, 0x6031, 0x080c, 0x50dd,
- 0x0804, 0x6031, 0x080c, 0x4373, 0x0804, 0x6031, 0x080c, 0x43ec,
- 0x0804, 0x6031, 0x080c, 0x4448, 0x0804, 0x6031, 0x080c, 0x4870,
- 0x0804, 0x6031, 0x080c, 0x4b15, 0x0804, 0x6031, 0x080c, 0x4d48,
- 0x0804, 0x6031, 0x080c, 0x4f41, 0x0804, 0x6031, 0x080c, 0x37e2,
- 0x0804, 0x6031, 0x00b6, 0xa974, 0xae78, 0x9684, 0x3fff, 0x9082,
- 0x4000, 0x1608, 0x9182, 0x0800, 0x1258, 0x9188, 0x1000, 0x2104,
- 0x905d, 0x0130, 0x080c, 0x668a, 0x1138, 0x00d9, 0x9006, 0x00b0,
- 0x2001, 0x0028, 0x900e, 0x0090, 0x9082, 0x0006, 0x1240, 0xb900,
- 0xd1fc, 0x0d98, 0x2001, 0x0029, 0x2009, 0x1000, 0x0038, 0x2001,
- 0x0029, 0x900e, 0x0018, 0x2001, 0x0029, 0x900e, 0x9005, 0x00be,
- 0x0005, 0xa877, 0x0000, 0xb8c0, 0x9005, 0x1904, 0x61c0, 0xb888,
- 0x9005, 0x1904, 0x61c0, 0xb838, 0xb93c, 0x9102, 0x1a04, 0x61c0,
- 0x2b10, 0x080c, 0x9bbd, 0x0904, 0x61bc, 0x8108, 0xb93e, 0x6212,
- 0x2900, 0x6016, 0x6023, 0x0003, 0x600b, 0xffff, 0x6007, 0x0040,
- 0xa878, 0x605e, 0xa880, 0x9084, 0x00ff, 0x6066, 0xa883, 0x0000,
- 0xa87c, 0xd0ac, 0x05c0, 0xc0dd, 0xa87e, 0xa888, 0x8001, 0x1568,
- 0x2001, 0x00f8, 0x8001, 0xa001, 0xa001, 0xa001, 0x1dd8, 0xa816,
- 0xa864, 0x9094, 0x00f7, 0x9296, 0x0011, 0x11f8, 0x9084, 0x00ff,
- 0xc0bd, 0x601e, 0xa8ac, 0xaab0, 0xa836, 0xaa3a, 0x2001, 0x000f,
- 0x8001, 0x1df0, 0x2001, 0x8004, 0x6003, 0x0004, 0x6046, 0x00f6,
- 0x2079, 0x0380, 0x7818, 0xd0bc, 0x1de8, 0x7833, 0x0010, 0x2c00,
- 0x7836, 0x781b, 0x8080, 0x00fe, 0x0005, 0x080c, 0x1669, 0x601c,
- 0xc0bd, 0x601e, 0x0c38, 0x0006, 0x2001, 0x00e8, 0x8001, 0xa001,
- 0xa001, 0xa001, 0x1dd8, 0x000e, 0xd0b4, 0x190c, 0x1af7, 0x2001,
- 0x8004, 0x6003, 0x0002, 0x08d0, 0x81ff, 0x1110, 0xb88b, 0x0001,
- 0x2908, 0xb8bc, 0xb9be, 0x9005, 0x1110, 0xb9c2, 0x0020, 0x0096,
- 0x2048, 0xa902, 0x009e, 0x0005, 0x00b6, 0x0126, 0x00c6, 0x0026,
- 0x2091, 0x8000, 0x6210, 0x2258, 0xba00, 0x9005, 0x0110, 0xc285,
- 0x0008, 0xc284, 0xba02, 0x002e, 0x00ce, 0x012e, 0x00be, 0x0005,
- 0x00b6, 0x0126, 0x00c6, 0x2091, 0x8000, 0x6210, 0x2258, 0xba04,
- 0x0006, 0x9086, 0x0006, 0x1170, 0xb89c, 0xd0ac, 0x0158, 0x080c,
- 0x6686, 0x0140, 0x9284, 0xff00, 0x8007, 0x9086, 0x0007, 0x1110,
- 0x2011, 0x0600, 0x000e, 0x9294, 0xff00, 0x9215, 0xba06, 0x0006,
- 0x9086, 0x0006, 0x1120, 0xba90, 0x82ff, 0x090c, 0x0d65, 0x000e,
- 0x00ce, 0x012e, 0x00be, 0x0005, 0x00b6, 0x0126, 0x00c6, 0x2091,
- 0x8000, 0x6210, 0x2258, 0xba04, 0x0006, 0x9086, 0x0006, 0x1168,
- 0xb89c, 0xd0a4, 0x0150, 0x080c, 0x6682, 0x1138, 0x9284, 0x00ff,
- 0x9086, 0x0007, 0x1110, 0x2011, 0x0006, 0x000e, 0x9294, 0x00ff,
- 0x8007, 0x9215, 0xba06, 0x00ce, 0x012e, 0x00be, 0x0005, 0x9182,
- 0x0800, 0x0218, 0x9085, 0x0001, 0x0005, 0x00d6, 0x0026, 0x9190,
- 0x1000, 0x2204, 0x905d, 0x1180, 0x0096, 0x080c, 0x102f, 0x2958,
- 0x009e, 0x0160, 0x2b00, 0x2012, 0xb85c, 0xb8ba, 0xb860, 0xb8b6,
- 0x9006, 0xb8a6, 0x080c, 0x5d11, 0x9006, 0x0010, 0x9085, 0x0001,
- 0x002e, 0x00de, 0x0005, 0x00b6, 0x0096, 0x0126, 0x2091, 0x8000,
- 0x0026, 0x9182, 0x0800, 0x0218, 0x9085, 0x0001, 0x0458, 0x00d6,
- 0x9190, 0x1000, 0x2204, 0x905d, 0x0518, 0x2013, 0x0000, 0xb8a4,
- 0x904d, 0x0110, 0x080c, 0x1061, 0x00d6, 0x00c6, 0xb8ac, 0x2060,
- 0x8cff, 0x0168, 0x600c, 0x0006, 0x6014, 0x2048, 0x080c, 0xb870,
- 0x0110, 0x080c, 0x0fe1, 0x080c, 0x9be6, 0x00ce, 0x0c88, 0x00ce,
- 0x00de, 0x2b48, 0xb8b8, 0xb85e, 0xb8b4, 0xb862, 0x080c, 0x1071,
- 0x00de, 0x9006, 0x002e, 0x012e, 0x009e, 0x00be, 0x0005, 0x0016,
- 0x9182, 0x0800, 0x0218, 0x9085, 0x0001, 0x0030, 0x9188, 0x1000,
- 0x2104, 0x905d, 0x0dc0, 0x9006, 0x001e, 0x0005, 0x00d6, 0x0156,
- 0x0136, 0x0146, 0x9006, 0xb80a, 0xb80e, 0xb800, 0xc08c, 0xb802,
- 0x080c, 0x70ba, 0x1510, 0xb8a0, 0x9086, 0x007e, 0x0120, 0x080c,
- 0x9b65, 0x11d8, 0x0078, 0x7040, 0xd0e4, 0x01b8, 0x00c6, 0x2061,
- 0x195a, 0x7048, 0x2062, 0x704c, 0x6006, 0x7050, 0x600a, 0x7054,
- 0x600e, 0x00ce, 0x703c, 0x2069, 0x0140, 0x9005, 0x1110, 0x2001,
- 0x0001, 0x6886, 0x2069, 0x1800, 0x68b2, 0x7040, 0xb85e, 0x7048,
- 0xb862, 0x704c, 0xb866, 0x20e1, 0x0000, 0x2099, 0x0276, 0xb8b4,
- 0x20e8, 0xb8b8, 0x9088, 0x000a, 0x21a0, 0x20a9, 0x0004, 0x4003,
- 0x2099, 0x027a, 0x9088, 0x0006, 0x21a0, 0x20a9, 0x0004, 0x4003,
- 0x2069, 0x0200, 0x6817, 0x0001, 0x7040, 0xb86a, 0x7144, 0xb96e,
- 0x7048, 0xb872, 0x7050, 0xb876, 0x2069, 0x0200, 0x6817, 0x0000,
- 0xb8a0, 0x9086, 0x007e, 0x1110, 0x7144, 0xb96e, 0x9182, 0x0211,
- 0x1218, 0x2009, 0x0008, 0x0400, 0x9182, 0x0259, 0x1218, 0x2009,
- 0x0007, 0x00d0, 0x9182, 0x02c1, 0x1218, 0x2009, 0x0006, 0x00a0,
- 0x9182, 0x0349, 0x1218, 0x2009, 0x0005, 0x0070, 0x9182, 0x0421,
- 0x1218, 0x2009, 0x0004, 0x0040, 0x9182, 0x0581, 0x1218, 0x2009,
- 0x0003, 0x0010, 0x2009, 0x0002, 0xb992, 0x014e, 0x013e, 0x015e,
- 0x00de, 0x0005, 0x0016, 0x0026, 0x00e6, 0x2071, 0x0260, 0x7034,
- 0xb896, 0x703c, 0xb89a, 0x7054, 0xb89e, 0x0036, 0xbbc4, 0xc384,
- 0xba00, 0x2009, 0x187b, 0x210c, 0xd0bc, 0x0120, 0xd1ec, 0x0110,
- 0xc2ad, 0x0008, 0xc2ac, 0xd0c4, 0x0148, 0xd1e4, 0x0138, 0xc2bd,
- 0xd0cc, 0x0128, 0xd38c, 0x1108, 0xc385, 0x0008, 0xc2bc, 0xba02,
- 0xbbc6, 0x003e, 0x00ee, 0x002e, 0x001e, 0x0005, 0x0096, 0x0126,
- 0x2091, 0x8000, 0xb8a4, 0x904d, 0x0578, 0xa900, 0x81ff, 0x15c0,
- 0xaa04, 0x9282, 0x0010, 0x16c8, 0x0136, 0x0146, 0x01c6, 0x01d6,
- 0x8906, 0x8006, 0x8007, 0x908c, 0x003f, 0x21e0, 0x9084, 0xffc0,
- 0x9080, 0x0004, 0x2098, 0x2009, 0x0010, 0x20a9, 0x0001, 0x4002,
- 0x9086, 0xffff, 0x0120, 0x8109, 0x1dd0, 0x080c, 0x0d65, 0x3c00,
- 0x20e8, 0x3300, 0x8001, 0x20a0, 0x4604, 0x8210, 0xaa06, 0x01de,
- 0x01ce, 0x014e, 0x013e, 0x0060, 0x080c, 0x102f, 0x0170, 0x2900,
- 0xb8a6, 0xa803, 0x0000, 0x080c, 0x651e, 0xa807, 0x0001, 0xae12,
- 0x9085, 0x0001, 0x012e, 0x009e, 0x0005, 0x9006, 0x0cd8, 0x0126,
- 0x2091, 0x8000, 0x0096, 0xb8a4, 0x904d, 0x0188, 0xa800, 0x9005,
- 0x1150, 0x080c, 0x652d, 0x1158, 0xa804, 0x908a, 0x0002, 0x0218,
- 0x8001, 0xa806, 0x0020, 0x080c, 0x1061, 0xb8a7, 0x0000, 0x009e,
- 0x012e, 0x0005, 0x0096, 0x00c6, 0xb888, 0x9005, 0x1904, 0x6413,
- 0xb8c0, 0x904d, 0x0904, 0x6413, 0x080c, 0x9bbd, 0x0904, 0x640f,
- 0x8210, 0xba3e, 0xa800, 0xb8c2, 0x9005, 0x1108, 0xb8be, 0x2b00,
- 0x6012, 0x2900, 0x6016, 0x6023, 0x0003, 0x600b, 0xffff, 0x6007,
- 0x0040, 0xa878, 0x605e, 0xa880, 0x9084, 0x00ff, 0x6066, 0xa883,
- 0x0000, 0xa87c, 0xd0ac, 0x01c8, 0xc0dd, 0xa87e, 0xa888, 0x8001,
- 0x1568, 0xa816, 0xa864, 0x9094, 0x00f7, 0x9296, 0x0011, 0x1530,
- 0x9084, 0x00ff, 0xc0bd, 0x601e, 0xa8ac, 0xaab0, 0xa836, 0xaa3a,
- 0x2001, 0x8004, 0x6003, 0x0004, 0x0030, 0x080c, 0x1af7, 0x2001,
- 0x8004, 0x6003, 0x0002, 0x6046, 0x2001, 0x0010, 0x2c08, 0x080c,
- 0x98b8, 0xb838, 0xba3c, 0x9202, 0x0a04, 0x63c0, 0x0020, 0x82ff,
- 0x1110, 0xb88b, 0x0001, 0x00ce, 0x009e, 0x0005, 0x080c, 0x1669,
- 0x601c, 0xc0bd, 0x601e, 0x08e0, 0x00b6, 0x0096, 0x0016, 0x20a9,
- 0x0800, 0x900e, 0x0016, 0x080c, 0x628f, 0x1158, 0xb8c0, 0x904d,
- 0x0140, 0x3e00, 0x9086, 0x0002, 0x1118, 0xb800, 0xd0bc, 0x1108,
- 0x0041, 0x001e, 0x8108, 0x1f04, 0x6422, 0x001e, 0x00be, 0x009e,
- 0x0005, 0x0096, 0x0016, 0xb8c0, 0x904d, 0x0188, 0xa800, 0xb8c2,
- 0x9005, 0x1108, 0xb8be, 0x9006, 0xa802, 0xa867, 0x0103, 0xab7a,
- 0xa877, 0x0000, 0x080c, 0xbb73, 0x080c, 0x69b5, 0x0c60, 0x001e,
- 0x009e, 0x0005, 0x0086, 0x9046, 0xb8c0, 0x904d, 0x01b0, 0xa86c,
- 0x9406, 0x1118, 0xa870, 0x9506, 0x0128, 0x2940, 0xa800, 0x904d,
- 0x0160, 0x0ca8, 0xa800, 0x88ff, 0x1128, 0xb8c2, 0x9005, 0x1118,
- 0xb8be, 0x0008, 0xa002, 0xa803, 0x0000, 0x008e, 0x0005, 0x901e,
- 0x0010, 0x2019, 0x0001, 0x0126, 0x2091, 0x8000, 0x00e6, 0x0096,
- 0x00c6, 0x0086, 0x0026, 0x2071, 0x19bf, 0x9046, 0x7028, 0x9065,
- 0x01e8, 0x6014, 0x2068, 0x83ff, 0x0120, 0x605c, 0x9606, 0x0158,
- 0x0030, 0xa86c, 0x9406, 0x1118, 0xa870, 0x9506, 0x0120, 0x2c40,
- 0x600c, 0x2060, 0x0c60, 0x600c, 0x0006, 0x0066, 0x2830, 0x080c,
- 0x9127, 0x006e, 0x000e, 0x83ff, 0x0508, 0x0c08, 0x9046, 0xb8c0,
- 0x904d, 0x01e0, 0x83ff, 0x0120, 0xa878, 0x9606, 0x0158, 0x0030,
- 0xa86c, 0x9406, 0x1118, 0xa870, 0x9506, 0x0120, 0x2940, 0xa800,
- 0x2048, 0x0c70, 0xb8c0, 0xaa00, 0x0026, 0x9906, 0x1110, 0xbac2,
- 0x0008, 0xa202, 0x000e, 0x83ff, 0x0108, 0x0c10, 0x002e, 0x008e,
- 0x00ce, 0x009e, 0x00ee, 0x012e, 0x0005, 0x9016, 0x0489, 0x1110,
- 0x2011, 0x0001, 0x0005, 0x080c, 0x6582, 0x0128, 0x080c, 0xb931,
- 0x0010, 0x9085, 0x0001, 0x0005, 0x080c, 0x6582, 0x0128, 0x080c,
- 0xb8d2, 0x0010, 0x9085, 0x0001, 0x0005, 0x080c, 0x6582, 0x0128,
- 0x080c, 0xb92e, 0x0010, 0x9085, 0x0001, 0x0005, 0x080c, 0x6582,
- 0x0128, 0x080c, 0xb8f1, 0x0010, 0x9085, 0x0001, 0x0005, 0x080c,
- 0x6582, 0x0128, 0x080c, 0xb972, 0x0010, 0x9085, 0x0001, 0x0005,
- 0xb8a4, 0x900d, 0x1118, 0x9085, 0x0001, 0x0005, 0x0136, 0x01c6,
- 0xa800, 0x9005, 0x11b8, 0x890e, 0x810e, 0x810f, 0x9184, 0x003f,
- 0x20e0, 0x9184, 0xffc0, 0x9080, 0x0004, 0x2098, 0x20a9, 0x0001,
- 0x2009, 0x0010, 0x4002, 0x9606, 0x0128, 0x8109, 0x1dd8, 0x9085,
- 0x0001, 0x0008, 0x9006, 0x01ce, 0x013e, 0x0005, 0x0146, 0x01d6,
- 0xa860, 0x20e8, 0xa85c, 0x9080, 0x0004, 0x20a0, 0x20a9, 0x0010,
- 0x2009, 0xffff, 0x4104, 0x01de, 0x014e, 0x0136, 0x01c6, 0xa800,
- 0x9005, 0x11b8, 0x890e, 0x810e, 0x810f, 0x9184, 0x003f, 0x20e0,
- 0x9184, 0xffc0, 0x9080, 0x0004, 0x2098, 0x20a9, 0x0001, 0x2009,
- 0x0010, 0x4002, 0x9606, 0x0128, 0x8109, 0x1dd8, 0x9085, 0x0001,
- 0x0068, 0x0146, 0x01d6, 0x3300, 0x8001, 0x20a0, 0x3c00, 0x20e8,
- 0x2001, 0xffff, 0x4004, 0x01de, 0x014e, 0x9006, 0x01ce, 0x013e,
- 0x0005, 0x0096, 0x0126, 0x2091, 0x8000, 0xb8a4, 0x904d, 0x1128,
- 0x080c, 0x102f, 0x0168, 0x2900, 0xb8a6, 0x080c, 0x651e, 0xa803,
- 0x0001, 0xa807, 0x0000, 0x9085, 0x0001, 0x012e, 0x009e, 0x0005,
- 0x9006, 0x0cd8, 0x0096, 0x0126, 0x2091, 0x8000, 0xb8a4, 0x904d,
- 0x0130, 0xb8a7, 0x0000, 0x080c, 0x1061, 0x9085, 0x0001, 0x012e,
- 0x009e, 0x0005, 0xb89c, 0xd0a4, 0x0005, 0x00b6, 0x00f6, 0x080c,
- 0x70ba, 0x01b0, 0x71c0, 0x81ff, 0x1198, 0x71d8, 0xd19c, 0x0180,
- 0x2001, 0x007e, 0x9080, 0x1000, 0x2004, 0x905d, 0x0148, 0xb804,
- 0x9084, 0x00ff, 0x9086, 0x0006, 0x1118, 0xb800, 0xc0ed, 0xb802,
- 0x2079, 0x185b, 0x7804, 0x00d0, 0x0156, 0x20a9, 0x007f, 0x900e,
- 0x0016, 0x080c, 0x628f, 0x1168, 0xb804, 0x9084, 0xff00, 0x8007,
- 0x9096, 0x0004, 0x0118, 0x9086, 0x0006, 0x1118, 0xb800, 0xc0ed,
- 0xb802, 0x001e, 0x8108, 0x1f04, 0x65a8, 0x015e, 0x080c, 0x6648,
- 0x0120, 0x2001, 0x195d, 0x200c, 0x0030, 0x2079, 0x185b, 0x7804,
- 0x0030, 0x2009, 0x07d0, 0x2011, 0x65d2, 0x080c, 0x8230, 0x00fe,
- 0x00be, 0x0005, 0x00b6, 0x2011, 0x65d2, 0x080c, 0x816c, 0x080c,
- 0x6648, 0x01d8, 0x2001, 0x107e, 0x2004, 0x2058, 0xb900, 0xc1ec,
- 0xb902, 0x080c, 0x6686, 0x0130, 0x2009, 0x07d0, 0x2011, 0x65d2,
- 0x080c, 0x8230, 0x00e6, 0x2071, 0x1800, 0x9006, 0x707a, 0x705c,
- 0x707e, 0x080c, 0x2e09, 0x00ee, 0x04d0, 0x0156, 0x00c6, 0x20a9,
- 0x007f, 0x900e, 0x0016, 0x080c, 0x628f, 0x1558, 0xb800, 0xd0ec,
- 0x0540, 0x0046, 0xbaa0, 0x2220, 0x9006, 0x2009, 0x0029, 0x080c,
- 0xd2bc, 0xb800, 0xc0e5, 0xc0ec, 0xb802, 0x080c, 0x6682, 0x2001,
- 0x0707, 0x1128, 0xb804, 0x9084, 0x00ff, 0x9085, 0x0700, 0xb806,
- 0x080c, 0x98c7, 0x2019, 0x0029, 0x080c, 0x8658, 0x0076, 0x903e,
- 0x080c, 0x853d, 0x900e, 0x080c, 0xd011, 0x007e, 0x004e, 0x080c,
- 0x98e3, 0x001e, 0x8108, 0x1f04, 0x65fa, 0x00ce, 0x015e, 0x00be,
- 0x0005, 0x00b6, 0x6010, 0x2058, 0xb800, 0xc0ec, 0xb802, 0x00be,
- 0x0005, 0x7810, 0x00b6, 0x2058, 0xb800, 0x00be, 0xd0ac, 0x0005,
- 0x6010, 0x00b6, 0x905d, 0x0108, 0xb800, 0x00be, 0xd0bc, 0x0005,
- 0x00b6, 0x00f6, 0x2001, 0x107e, 0x2004, 0x905d, 0x0110, 0xb800,
- 0xd0ec, 0x00fe, 0x00be, 0x0005, 0x0126, 0x0026, 0x2091, 0x8000,
- 0x0006, 0xbaa0, 0x9290, 0x1000, 0x2204, 0x9b06, 0x190c, 0x0d65,
- 0x000e, 0xba00, 0x9005, 0x0110, 0xc2fd, 0x0008, 0xc2fc, 0xba02,
- 0x002e, 0x012e, 0x0005, 0x2011, 0x1836, 0x2204, 0xd0cc, 0x0138,
- 0x2001, 0x195b, 0x200c, 0x2011, 0x6678, 0x080c, 0x8230, 0x0005,
- 0x2011, 0x6678, 0x080c, 0x816c, 0x2011, 0x1836, 0x2204, 0xc0cc,
- 0x2012, 0x0005, 0x080c, 0x53a8, 0xd0ac, 0x0005, 0x080c, 0x53a8,
- 0xd0a4, 0x0005, 0x0016, 0xb904, 0x9184, 0x00ff, 0x908e, 0x0006,
- 0x001e, 0x0005, 0x0016, 0xb904, 0x9184, 0xff00, 0x8007, 0x908e,
- 0x0006, 0x001e, 0x0005, 0x00b6, 0x00f6, 0x080c, 0xbf8f, 0x0158,
- 0x70d8, 0x9084, 0x0028, 0x0138, 0x2001, 0x107f, 0x2004, 0x905d,
- 0x0110, 0xb8c4, 0xd094, 0x00fe, 0x00be, 0x0005, 0x0006, 0x0016,
- 0x0036, 0x0046, 0x0076, 0x00b6, 0x2001, 0x1817, 0x203c, 0x9780,
- 0x319f, 0x203d, 0x97bc, 0xff00, 0x873f, 0x9006, 0x2018, 0x2008,
- 0x9284, 0x8000, 0x0110, 0x2019, 0x0001, 0x9294, 0x7fff, 0x2100,
- 0x9706, 0x0190, 0x91a0, 0x1000, 0x2404, 0x905d, 0x0168, 0xb804,
- 0x9084, 0x00ff, 0x9086, 0x0006, 0x1138, 0x83ff, 0x0118, 0xb89c,
- 0xd0a4, 0x0110, 0x8211, 0x0158, 0x8108, 0x83ff, 0x0120, 0x9182,
- 0x0800, 0x0e28, 0x0068, 0x9182, 0x007e, 0x0e08, 0x0048, 0x00be,
- 0x007e, 0x004e, 0x003e, 0x001e, 0x9085, 0x0001, 0x000e, 0x0005,
- 0x00be, 0x007e, 0x004e, 0x003e, 0x001e, 0x9006, 0x000e, 0x0005,
- 0x0046, 0x0056, 0x0076, 0x00b6, 0x2100, 0x9084, 0x7fff, 0x9080,
- 0x1000, 0x2004, 0x905d, 0x0130, 0xb804, 0x9084, 0x00ff, 0x9086,
- 0x0006, 0x0550, 0x9184, 0x8000, 0x0580, 0x2001, 0x1817, 0x203c,
- 0x9780, 0x319f, 0x203d, 0x97bc, 0xff00, 0x873f, 0x9006, 0x2020,
- 0x2400, 0x9706, 0x01a0, 0x94a8, 0x1000, 0x2504, 0x905d, 0x0178,
- 0xb804, 0x9084, 0x00ff, 0x9086, 0x0006, 0x1148, 0xb89c, 0xd0a4,
- 0x0130, 0xb814, 0x9206, 0x1118, 0xb810, 0x9306, 0x0128, 0x8420,
- 0x9482, 0x0800, 0x0e28, 0x0048, 0x918c, 0x7fff, 0x00be, 0x007e,
- 0x005e, 0x004e, 0x9085, 0x0001, 0x0005, 0x918c, 0x7fff, 0x00be,
- 0x007e, 0x005e, 0x004e, 0x9006, 0x0005, 0x2071, 0x190e, 0x7003,
- 0x0001, 0x7007, 0x0000, 0x9006, 0x7012, 0x7016, 0x701a, 0x701e,
- 0x700a, 0x7046, 0x0005, 0x0016, 0x00e6, 0x2071, 0x1921, 0x900e,
- 0x710a, 0x080c, 0x53a8, 0xd0fc, 0x1140, 0x080c, 0x53a8, 0x900e,
- 0xd09c, 0x0108, 0x8108, 0x7102, 0x0400, 0x2001, 0x187b, 0x200c,
- 0x9184, 0x0007, 0x9006, 0x0002, 0x675d, 0x675d, 0x675d, 0x675d,
- 0x675d, 0x6774, 0x6782, 0x675d, 0x7003, 0x0003, 0x2009, 0x187c,
- 0x210c, 0x9184, 0xff00, 0x8007, 0x9005, 0x1110, 0x2001, 0x0002,
- 0x7006, 0x0018, 0x7003, 0x0005, 0x0c88, 0x00ee, 0x001e, 0x0005,
- 0x00e6, 0x2071, 0x0050, 0x684c, 0x9005, 0x1150, 0x00e6, 0x2071,
- 0x190e, 0x7028, 0xc085, 0x702a, 0x00ee, 0x9085, 0x0001, 0x0488,
- 0x6844, 0x9005, 0x0158, 0x080c, 0x742b, 0x6a60, 0x9200, 0x7002,
- 0x6864, 0x9101, 0x7006, 0x9006, 0x7012, 0x7016, 0x6860, 0x7002,
- 0x6864, 0x7006, 0x6868, 0x700a, 0x686c, 0x700e, 0x6844, 0x9005,
- 0x1110, 0x7012, 0x7016, 0x684c, 0x701a, 0x701c, 0x9085, 0x0040,
- 0x701e, 0x7037, 0x0019, 0x702b, 0x0001, 0x00e6, 0x2071, 0x190e,
- 0x7028, 0xc084, 0x702a, 0x7007, 0x0001, 0x700b, 0x0000, 0x00ee,
- 0x9006, 0x00ee, 0x0005, 0xa868, 0xd0fc, 0x11d8, 0x00e6, 0x0026,
- 0x2001, 0x1921, 0x2004, 0x9005, 0x0904, 0x69ba, 0xa87c, 0xd0bc,
- 0x1904, 0x69ba, 0xa978, 0xa874, 0x9105, 0x1904, 0x69ba, 0x2001,
- 0x1921, 0x2004, 0x0002, 0x69ba, 0x680e, 0x684a, 0x684a, 0x69ba,
- 0x684a, 0x0005, 0xa868, 0xd0fc, 0x1500, 0x00e6, 0x0026, 0x2009,
- 0x1921, 0x210c, 0x81ff, 0x0904, 0x69ba, 0xa87c, 0xd0cc, 0x0904,
- 0x69ba, 0xa880, 0x9084, 0x00ff, 0x9086, 0x0001, 0x1904, 0x69ba,
- 0x9186, 0x0003, 0x0904, 0x684a, 0x9186, 0x0005, 0x0904, 0x684a,
- 0xa84f, 0x8021, 0xa853, 0x0017, 0x0028, 0x0005, 0xa84f, 0x8020,
- 0xa853, 0x0016, 0x2071, 0x190e, 0x701c, 0x9005, 0x1904, 0x6b51,
- 0x0e04, 0x6b9c, 0x2071, 0x0000, 0xa84c, 0x7082, 0xa850, 0x7032,
- 0xa86c, 0x7086, 0x7036, 0xa870, 0x708a, 0x2091, 0x4080, 0x2001,
- 0x0089, 0x2004, 0xd084, 0x190c, 0x11d6, 0x2071, 0x1800, 0x2011,
- 0x0001, 0xa804, 0x900d, 0x702c, 0x1158, 0xa802, 0x2900, 0x702e,
- 0x70bc, 0x9200, 0x70be, 0x080c, 0x8087, 0x002e, 0x00ee, 0x0005,
- 0x0096, 0x2148, 0xa904, 0xa802, 0x8210, 0x2900, 0x81ff, 0x1dc8,
- 0x009e, 0x0c58, 0xa84f, 0x0000, 0x00f6, 0x2079, 0x0050, 0x2071,
- 0x190e, 0xa803, 0x0000, 0x7010, 0x9005, 0x1904, 0x693f, 0x782c,
- 0x908c, 0x0780, 0x190c, 0x6cc3, 0x8004, 0x8004, 0x8004, 0x9084,
- 0x0003, 0x0002, 0x6868, 0x693f, 0x688d, 0x68da, 0x080c, 0x0d65,
- 0x2071, 0x1800, 0x2900, 0x7822, 0xa804, 0x900d, 0x1170, 0x2071,
- 0x19db, 0x703c, 0x9005, 0x1328, 0x2001, 0x1922, 0x2004, 0x8005,
- 0x703e, 0x00fe, 0x002e, 0x00ee, 0x0005, 0x9016, 0x702c, 0x2148,
- 0xa904, 0xa802, 0x8210, 0x2900, 0x81ff, 0x1dc8, 0x702e, 0x70bc,
- 0x9200, 0x70be, 0x080c, 0x8087, 0x0c10, 0x2071, 0x1800, 0x2900,
- 0x7822, 0xa804, 0x900d, 0x15a8, 0x7824, 0x00e6, 0x2071, 0x0040,
- 0x712c, 0xd19c, 0x1170, 0x2009, 0x182f, 0x210c, 0x918a, 0x0040,
- 0x0240, 0x7022, 0x2001, 0x1dc0, 0x200c, 0x8108, 0x2102, 0x00ee,
- 0x0058, 0x00ee, 0x2048, 0x702c, 0xa802, 0x2900, 0x702e, 0x70bc,
- 0x8000, 0x70be, 0x080c, 0x8087, 0x782c, 0x9094, 0x0780, 0x190c,
- 0x6cc3, 0xd0a4, 0x19c8, 0x2071, 0x19db, 0x703c, 0x9005, 0x1328,
- 0x2001, 0x1922, 0x2004, 0x8005, 0x703e, 0x00fe, 0x002e, 0x00ee,
- 0x0005, 0x9016, 0x702c, 0x2148, 0xa904, 0xa802, 0x8210, 0x2900,
- 0x81ff, 0x1dc8, 0x702e, 0x70bc, 0x9200, 0x70be, 0x080c, 0x8087,
- 0x0804, 0x6894, 0x0096, 0x00e6, 0x7824, 0x2048, 0x2071, 0x1800,
- 0x702c, 0xa802, 0x2900, 0x702e, 0x70bc, 0x8000, 0x70be, 0x080c,
- 0x8087, 0x782c, 0x9094, 0x0780, 0x190c, 0x6cc3, 0xd0a4, 0x1d60,
- 0x00ee, 0x782c, 0x9094, 0x0780, 0x190c, 0x6cc3, 0xd09c, 0x11a0,
- 0x009e, 0x2900, 0x7822, 0xa804, 0x900d, 0x1560, 0x2071, 0x19db,
- 0x703c, 0x9005, 0x1328, 0x2001, 0x1922, 0x2004, 0x8005, 0x703e,
- 0x00fe, 0x002e, 0x00ee, 0x0005, 0x009e, 0x2908, 0x7010, 0x8000,
- 0x7012, 0x7018, 0x904d, 0x711a, 0x0110, 0xa902, 0x0008, 0x711e,
- 0x2148, 0xa804, 0x900d, 0x1170, 0x2071, 0x19db, 0x703c, 0x9005,
- 0x1328, 0x2001, 0x1922, 0x2004, 0x8005, 0x703e, 0x00fe, 0x002e,
- 0x00ee, 0x0005, 0x2071, 0x1800, 0x9016, 0x702c, 0x2148, 0xa904,
- 0xa802, 0x8210, 0x2900, 0x81ff, 0x1dc8, 0x702e, 0x70bc, 0x9200,
- 0x70be, 0x080c, 0x8087, 0x00fe, 0x002e, 0x00ee, 0x0005, 0x2908,
- 0x7010, 0x8000, 0x7012, 0x7018, 0x904d, 0x711a, 0x0110, 0xa902,
- 0x0008, 0x711e, 0x2148, 0xa804, 0x900d, 0x1904, 0x6994, 0x782c,
- 0x9094, 0x0780, 0x190c, 0x6cc3, 0xd09c, 0x1198, 0x701c, 0x904d,
- 0x0180, 0x7010, 0x8001, 0x7012, 0x1108, 0x701a, 0xa800, 0x701e,
- 0x2900, 0x7822, 0x782c, 0x9094, 0x0780, 0x190c, 0x6cc3, 0xd09c,
- 0x0d68, 0x782c, 0x9094, 0x0780, 0x190c, 0x6cc3, 0xd0a4, 0x01b0,
- 0x00e6, 0x7824, 0x2048, 0x2071, 0x1800, 0x702c, 0xa802, 0x2900,
- 0x702e, 0x70bc, 0x8000, 0x70be, 0x080c, 0x8087, 0x782c, 0x9094,
- 0x0780, 0x190c, 0x6cc3, 0xd0a4, 0x1d60, 0x00ee, 0x2071, 0x19db,
- 0x703c, 0x9005, 0x1328, 0x2001, 0x1922, 0x2004, 0x8005, 0x703e,
- 0x00fe, 0x002e, 0x00ee, 0x0005, 0x00e6, 0x2071, 0x1800, 0x9016,
- 0x702c, 0x2148, 0xa904, 0xa802, 0x8210, 0x2900, 0x81ff, 0x1dc8,
- 0x702e, 0x70bc, 0x9200, 0x70be, 0x080c, 0x8087, 0x00ee, 0x0804,
- 0x694f, 0xa868, 0xd0fc, 0x1560, 0x0096, 0xa804, 0xa807, 0x0000,
- 0x904d, 0x190c, 0x0fe1, 0x009e, 0x0018, 0xa868, 0xd0fc, 0x1500,
- 0x00e6, 0x0026, 0xa84f, 0x0000, 0x00f6, 0x2079, 0x0050, 0x2071,
- 0x190e, 0xa803, 0x0000, 0x7010, 0x9005, 0x1904, 0x6acf, 0x782c,
- 0x908c, 0x0780, 0x190c, 0x6cc3, 0x8004, 0x8004, 0x8004, 0x9084,
- 0x0003, 0x0002, 0x69d9, 0x6acf, 0x69f4, 0x6a62, 0x080c, 0x0d65,
- 0x0005, 0x2071, 0x1800, 0x2900, 0x7822, 0xa804, 0x900d, 0x1120,
- 0x00fe, 0x002e, 0x00ee, 0x0005, 0x9016, 0x702c, 0x2148, 0xa904,
- 0xa802, 0x8210, 0x2900, 0x81ff, 0x1dc8, 0x702e, 0x70bc, 0x9200,
- 0x70be, 0x080c, 0x8087, 0x0c60, 0x2071, 0x1800, 0x2900, 0x7822,
- 0xa804, 0x900d, 0x1904, 0x6a51, 0x7830, 0xd0dc, 0x1120, 0x00fe,
- 0x002e, 0x00ee, 0x0005, 0x7824, 0x00e6, 0x2071, 0x0040, 0x712c,
- 0xd19c, 0x1170, 0x2009, 0x182f, 0x210c, 0x918a, 0x0040, 0x0240,
- 0x7022, 0x2001, 0x1dc0, 0x200c, 0x8108, 0x2102, 0x00ee, 0x0058,
- 0x00ee, 0x2048, 0x702c, 0xa802, 0x2900, 0x702e, 0x70bc, 0x8000,
- 0x70be, 0x080c, 0x8087, 0x782c, 0x9094, 0x0780, 0x190c, 0x6cc3,
- 0xd0a4, 0x19c8, 0x0e04, 0x6a48, 0x7838, 0x7938, 0x910e, 0x1de0,
- 0x00d6, 0x2069, 0x0000, 0x6836, 0x6833, 0x0013, 0x00de, 0x2001,
- 0x191f, 0x200c, 0xc184, 0x2102, 0x2091, 0x4080, 0x2001, 0x0089,
- 0x2004, 0xd084, 0x190c, 0x11d6, 0x00fe, 0x002e, 0x00ee, 0x0005,
- 0x2001, 0x191f, 0x200c, 0xc185, 0x2102, 0x00fe, 0x002e, 0x00ee,
- 0x0005, 0x9016, 0x702c, 0x2148, 0xa904, 0xa802, 0x8210, 0x2900,
- 0x81ff, 0x1dc8, 0x702e, 0x70bc, 0x9200, 0x70be, 0x080c, 0x8087,
- 0x0804, 0x6a03, 0x0096, 0x00e6, 0x7824, 0x2048, 0x2071, 0x1800,
- 0x702c, 0xa802, 0x2900, 0x702e, 0x70bc, 0x8000, 0x70be, 0x080c,
- 0x8087, 0x782c, 0x9094, 0x0780, 0x190c, 0x6cc3, 0xd0a4, 0x1d60,
- 0x00ee, 0x0e04, 0x6aa2, 0x7838, 0x7938, 0x910e, 0x1de0, 0x00d6,
- 0x2069, 0x0000, 0x6836, 0x6833, 0x0013, 0x00de, 0x7044, 0xc084,
- 0x7046, 0x2091, 0x4080, 0x2001, 0x0089, 0x2004, 0xd084, 0x190c,
- 0x11d6, 0x782c, 0x9094, 0x0780, 0x190c, 0x6cc3, 0xd09c, 0x1170,
- 0x009e, 0x2900, 0x7822, 0xa804, 0x900d, 0x11e0, 0x00fe, 0x002e,
- 0x00ee, 0x0005, 0x7044, 0xc085, 0x7046, 0x0c58, 0x009e, 0x2908,
- 0x7010, 0x8000, 0x7012, 0x7018, 0x904d, 0x711a, 0x0110, 0xa902,
- 0x0008, 0x711e, 0x2148, 0xa804, 0x900d, 0x1120, 0x00fe, 0x002e,
- 0x00ee, 0x0005, 0x2071, 0x1800, 0x9016, 0x702c, 0x2148, 0xa904,
- 0xa802, 0x8210, 0x2900, 0x81ff, 0x1dc8, 0x702e, 0x70bc, 0x9200,
- 0x70be, 0x080c, 0x8087, 0x00fe, 0x002e, 0x00ee, 0x0005, 0x2908,
- 0x7010, 0x8000, 0x7012, 0x7018, 0x904d, 0x711a, 0x0110, 0xa902,
- 0x0008, 0x711e, 0x2148, 0xa804, 0x900d, 0x1904, 0x6b3c, 0x782c,
- 0x9094, 0x0780, 0x190c, 0x6cc3, 0xd09c, 0x11b0, 0x701c, 0x904d,
- 0x0198, 0xa84c, 0x9005, 0x1180, 0x7010, 0x8001, 0x7012, 0x1108,
- 0x701a, 0xa800, 0x701e, 0x2900, 0x7822, 0x782c, 0x9094, 0x0780,
- 0x190c, 0x6cc3, 0xd09c, 0x0d50, 0x782c, 0x9094, 0x0780, 0x190c,
- 0x6cc3, 0xd0a4, 0x05a8, 0x00e6, 0x7824, 0x2048, 0x2071, 0x1800,
- 0x702c, 0xa802, 0x2900, 0x702e, 0x70bc, 0x8000, 0x70be, 0x080c,
- 0x8087, 0x782c, 0x9094, 0x0780, 0x190c, 0x6cc3, 0xd0a4, 0x1d60,
- 0x00ee, 0x0e04, 0x6b35, 0x7838, 0x7938, 0x910e, 0x1de0, 0x00d6,
- 0x2069, 0x0000, 0x6836, 0x6833, 0x0013, 0x00de, 0x7044, 0xc084,
- 0x7046, 0x2091, 0x4080, 0x2001, 0x0089, 0x2004, 0xd084, 0x190c,
- 0x11d6, 0x00fe, 0x002e, 0x00ee, 0x0005, 0x7044, 0xc085, 0x7046,
- 0x00fe, 0x002e, 0x00ee, 0x0005, 0x00e6, 0x2071, 0x1800, 0x9016,
- 0x702c, 0x2148, 0xa904, 0xa802, 0x8210, 0x2900, 0x81ff, 0x1dc8,
- 0x702e, 0x70bc, 0x9200, 0x70be, 0x080c, 0x8087, 0x00ee, 0x0804,
- 0x6adf, 0x2071, 0x190e, 0xa803, 0x0000, 0x2908, 0x7010, 0x8000,
- 0x7012, 0x7018, 0x904d, 0x711a, 0x0110, 0xa902, 0x0008, 0x711e,
- 0x2148, 0xa804, 0x900d, 0x1128, 0x1e04, 0x6b7c, 0x002e, 0x00ee,
- 0x0005, 0x2071, 0x1800, 0x9016, 0x702c, 0x2148, 0xa904, 0xa802,
- 0x8210, 0x2900, 0x81ff, 0x1dc8, 0x702e, 0x70bc, 0x9200, 0x70be,
- 0x080c, 0x8087, 0x0e04, 0x6b66, 0x2071, 0x190e, 0x701c, 0x2048,
- 0xa84c, 0x900d, 0x0d18, 0x2071, 0x0000, 0x7182, 0xa850, 0x7032,
- 0xa86c, 0x7086, 0x7036, 0xa870, 0x708a, 0x2091, 0x4080, 0x2001,
- 0x0089, 0x2004, 0xd084, 0x190c, 0x11d6, 0x2071, 0x190e, 0x080c,
- 0x6caf, 0x002e, 0x00ee, 0x0005, 0x2071, 0x190e, 0xa803, 0x0000,
- 0x2908, 0x7010, 0x8000, 0x7012, 0x7018, 0x904d, 0x711a, 0x0110,
- 0xa902, 0x0008, 0x711e, 0x2148, 0xa804, 0x900d, 0x1118, 0x002e,
- 0x00ee, 0x0005, 0x2071, 0x1800, 0x9016, 0x702c, 0x2148, 0xa904,
- 0xa802, 0x8210, 0x2900, 0x81ff, 0x1dc8, 0x702e, 0x70bc, 0x9200,
- 0x70be, 0x080c, 0x8087, 0x002e, 0x00ee, 0x0005, 0x0006, 0xa87c,
- 0x0006, 0xa867, 0x0103, 0x20a9, 0x001c, 0xa860, 0x20e8, 0xa85c,
- 0x9080, 0x001d, 0x20a0, 0x9006, 0x4004, 0x000e, 0x9084, 0x00ff,
- 0xa87e, 0x000e, 0xa87a, 0xa982, 0x0005, 0x2071, 0x190e, 0x7004,
- 0x0002, 0x6be7, 0x6be8, 0x6cae, 0x6be8, 0x0d65, 0x6cae, 0x0005,
- 0x2001, 0x1921, 0x2004, 0x0002, 0x6bf2, 0x6bf2, 0x6c47, 0x6c48,
- 0x6bf2, 0x6c48, 0x0126, 0x2091, 0x8000, 0x1e0c, 0x6cce, 0x701c,
- 0x904d, 0x01e0, 0xa84c, 0x9005, 0x01d8, 0x0e04, 0x6c16, 0xa94c,
- 0x2071, 0x0000, 0x7182, 0xa850, 0x7032, 0xa86c, 0x7086, 0x7036,
- 0xa870, 0x708a, 0x2091, 0x4080, 0x2001, 0x0089, 0x2004, 0xd084,
- 0x190c, 0x11d6, 0x2071, 0x190e, 0x080c, 0x6caf, 0x012e, 0x0470,
- 0x2001, 0x005b, 0x2004, 0x9094, 0x0780, 0x190c, 0x6cc3, 0xd09c,
- 0x2071, 0x190e, 0x1510, 0x2071, 0x190e, 0x700f, 0x0001, 0xa964,
- 0x9184, 0x00ff, 0x9086, 0x0003, 0x1130, 0x810f, 0x918c, 0x00ff,
- 0x8101, 0x0108, 0x710e, 0x2900, 0x00d6, 0x2069, 0x0050, 0x6822,
- 0x00de, 0x2071, 0x190e, 0x701c, 0x2048, 0x7010, 0x8001, 0x7012,
- 0xa800, 0x701e, 0x9005, 0x1108, 0x701a, 0x012e, 0x0005, 0x0005,
- 0x00d6, 0x2008, 0x2069, 0x19db, 0x683c, 0x9005, 0x0760, 0x0158,
- 0x9186, 0x0003, 0x0540, 0x2001, 0x1814, 0x2004, 0x2009, 0x1b25,
- 0x210c, 0x9102, 0x1500, 0x0126, 0x2091, 0x8000, 0x2069, 0x0050,
- 0x693c, 0x6838, 0x9106, 0x0190, 0x0e04, 0x6c7a, 0x2069, 0x0000,
- 0x6837, 0x8040, 0x6833, 0x0012, 0x6883, 0x8040, 0x2091, 0x4080,
- 0x2001, 0x0089, 0x2004, 0xd084, 0x190c, 0x11d6, 0x2069, 0x19db,
- 0x683f, 0xffff, 0x012e, 0x00de, 0x0126, 0x2091, 0x8000, 0x1e0c,
- 0x6d34, 0x701c, 0x904d, 0x0540, 0x2001, 0x005b, 0x2004, 0x9094,
- 0x0780, 0x15c9, 0xd09c, 0x1500, 0x2071, 0x190e, 0x700f, 0x0001,
- 0xa964, 0x9184, 0x00ff, 0x9086, 0x0003, 0x1130, 0x810f, 0x918c,
- 0x00ff, 0x8101, 0x0108, 0x710e, 0x2900, 0x00d6, 0x2069, 0x0050,
- 0x6822, 0x00de, 0x701c, 0x2048, 0x7010, 0x8001, 0x7012, 0xa800,
- 0x701e, 0x9005, 0x1108, 0x701a, 0x012e, 0x0005, 0x0005, 0x0126,
- 0x2091, 0x8000, 0x701c, 0x904d, 0x0160, 0x7010, 0x8001, 0x7012,
- 0xa800, 0x701e, 0x9005, 0x1108, 0x701a, 0x012e, 0x080c, 0x1061,
- 0x0005, 0x012e, 0x0005, 0x2091, 0x8000, 0x0e04, 0x6cc5, 0x0006,
- 0x0016, 0x2001, 0x8004, 0x0006, 0x0804, 0x0d6e, 0x0096, 0x00f6,
- 0x2079, 0x0050, 0x7044, 0xd084, 0x01c0, 0xc084, 0x7046, 0x7838,
- 0x7938, 0x910e, 0x1de0, 0x00d6, 0x2069, 0x0000, 0x6836, 0x6833,
- 0x0013, 0x00de, 0x2091, 0x4080, 0x2001, 0x0089, 0x2004, 0xd084,
- 0x190c, 0x11d6, 0x00fe, 0x009e, 0x0005, 0x782c, 0x9094, 0x0780,
- 0x1991, 0xd0a4, 0x0db8, 0x00e6, 0x2071, 0x1800, 0x7824, 0x00e6,
- 0x2071, 0x0040, 0x712c, 0xd19c, 0x1170, 0x2009, 0x182f, 0x210c,
- 0x918a, 0x0040, 0x0240, 0x7022, 0x2001, 0x1dc0, 0x200c, 0x8108,
- 0x2102, 0x00ee, 0x0058, 0x00ee, 0x2048, 0x702c, 0xa802, 0x2900,
- 0x702e, 0x70bc, 0x8000, 0x70be, 0x080c, 0x8087, 0x782c, 0x9094,
- 0x0780, 0x190c, 0x6cc3, 0xd0a4, 0x19c8, 0x7838, 0x7938, 0x910e,
- 0x1de0, 0x00d6, 0x2069, 0x0000, 0x6836, 0x6833, 0x0013, 0x00de,
- 0x2091, 0x4080, 0x2001, 0x0089, 0x2004, 0xd084, 0x190c, 0x11d6,
- 0x00ee, 0x00fe, 0x009e, 0x0005, 0x00f6, 0x2079, 0x0050, 0x7044,
- 0xd084, 0x01b8, 0xc084, 0x7046, 0x7838, 0x7938, 0x910e, 0x1de0,
- 0x00d6, 0x2069, 0x0000, 0x6836, 0x6833, 0x0013, 0x00de, 0x2091,
- 0x4080, 0x2001, 0x0089, 0x2004, 0xd084, 0x190c, 0x11d6, 0x00fe,
- 0x0005, 0x782c, 0x9094, 0x0780, 0x190c, 0x6cc3, 0xd0a4, 0x0db8,
- 0x00e6, 0x2071, 0x1800, 0x7824, 0x2048, 0x702c, 0xa802, 0x2900,
- 0x702e, 0x70bc, 0x8000, 0x70be, 0x080c, 0x8087, 0x782c, 0x9094,
- 0x0780, 0x190c, 0x6cc3, 0xd0a4, 0x1d70, 0x00d6, 0x2069, 0x0050,
- 0x693c, 0x2069, 0x1921, 0x6808, 0x690a, 0x2069, 0x19db, 0x9102,
- 0x1118, 0x683c, 0x9005, 0x1328, 0x2001, 0x1922, 0x200c, 0x810d,
- 0x693e, 0x00de, 0x00ee, 0x00fe, 0x0005, 0x7094, 0x908a, 0x0029,
- 0x1a0c, 0x0d65, 0x9082, 0x001d, 0x003b, 0x0026, 0x2011, 0x1e00,
- 0x080c, 0x28ac, 0x002e, 0x0005, 0x6e60, 0x6de6, 0x6e02, 0x6e2c,
- 0x6e4f, 0x6e8f, 0x6ea1, 0x6e02, 0x6e77, 0x6da1, 0x6dcf, 0x6da0,
- 0x0005, 0x00d6, 0x2069, 0x0200, 0x6804, 0x9005, 0x1180, 0x6808,
- 0x9005, 0x1518, 0x7097, 0x0028, 0x2069, 0x1967, 0x2d04, 0x7002,
- 0x080c, 0x71fa, 0x6028, 0x9085, 0x0600, 0x602a, 0x00b0, 0x7097,
- 0x0028, 0x2069, 0x1967, 0x2d04, 0x7002, 0x6028, 0x9085, 0x0600,
- 0x602a, 0x00e6, 0x0036, 0x0046, 0x0056, 0x2071, 0x1a43, 0x080c,
- 0x1989, 0x005e, 0x004e, 0x003e, 0x00ee, 0x00de, 0x0005, 0x00d6,
- 0x2069, 0x0200, 0x6804, 0x9005, 0x1178, 0x6808, 0x9005, 0x1160,
- 0x7097, 0x0028, 0x2069, 0x1967, 0x2d04, 0x7002, 0x080c, 0x729c,
- 0x6028, 0x9085, 0x0600, 0x602a, 0x00de, 0x0005, 0x0006, 0x2001,
- 0x0090, 0x080c, 0x2872, 0x000e, 0x6124, 0xd1e4, 0x1190, 0x080c,
- 0x6f12, 0xd1d4, 0x1160, 0xd1dc, 0x1138, 0xd1cc, 0x0150, 0x7097,
- 0x0020, 0x080c, 0x6f12, 0x0028, 0x7097, 0x001d, 0x0010, 0x7097,
- 0x001f, 0x0005, 0x2001, 0x0088, 0x080c, 0x2872, 0x6124, 0xd1cc,
- 0x11e8, 0xd1dc, 0x11c0, 0xd1e4, 0x1198, 0x9184, 0x1e00, 0x11d8,
- 0x080c, 0x19ae, 0x60e3, 0x0001, 0x600c, 0xc0b4, 0x600e, 0x080c,
- 0x70e6, 0x2001, 0x0080, 0x080c, 0x2872, 0x7097, 0x0028, 0x0058,
- 0x7097, 0x001e, 0x0040, 0x7097, 0x001d, 0x0028, 0x7097, 0x0020,
- 0x0010, 0x7097, 0x001f, 0x0005, 0x080c, 0x19ae, 0x60e3, 0x0001,
- 0x600c, 0xc0b4, 0x600e, 0x080c, 0x70e6, 0x2001, 0x0080, 0x080c,
- 0x2872, 0x6124, 0xd1d4, 0x1180, 0xd1dc, 0x1158, 0xd1e4, 0x1130,
- 0x9184, 0x1e00, 0x1158, 0x7097, 0x0028, 0x0040, 0x7097, 0x001e,
- 0x0028, 0x7097, 0x001d, 0x0010, 0x7097, 0x001f, 0x0005, 0x2001,
- 0x00a0, 0x080c, 0x2872, 0x6124, 0xd1dc, 0x1138, 0xd1e4, 0x0138,
- 0x080c, 0x19ae, 0x7097, 0x001e, 0x0010, 0x7097, 0x001d, 0x0005,
- 0x080c, 0x6f9b, 0x6124, 0xd1dc, 0x1188, 0x080c, 0x6f12, 0x0016,
- 0x080c, 0x19ae, 0x001e, 0xd1d4, 0x1128, 0xd1e4, 0x0138, 0x7097,
- 0x001e, 0x0020, 0x7097, 0x001f, 0x080c, 0x6f12, 0x0005, 0x0006,
- 0x2001, 0x00a0, 0x080c, 0x2872, 0x000e, 0x6124, 0xd1d4, 0x1160,
- 0xd1cc, 0x1150, 0xd1dc, 0x1128, 0xd1e4, 0x0140, 0x7097, 0x001e,
- 0x0028, 0x7097, 0x001d, 0x0010, 0x7097, 0x0021, 0x0005, 0x080c,
- 0x6f9b, 0x6124, 0xd1d4, 0x1150, 0xd1dc, 0x1128, 0xd1e4, 0x0140,
- 0x7097, 0x001e, 0x0028, 0x7097, 0x001d, 0x0010, 0x7097, 0x001f,
- 0x0005, 0x0006, 0x2001, 0x0090, 0x080c, 0x2872, 0x000e, 0x6124,
- 0xd1d4, 0x1178, 0xd1cc, 0x1150, 0xd1dc, 0x1128, 0xd1e4, 0x0158,
- 0x7097, 0x001e, 0x0040, 0x7097, 0x001d, 0x0028, 0x7097, 0x0020,
- 0x0010, 0x7097, 0x001f, 0x0005, 0x0016, 0x00c6, 0x00d6, 0x00e6,
- 0x0126, 0x2061, 0x0100, 0x2069, 0x0140, 0x2071, 0x1800, 0x2091,
- 0x8000, 0x080c, 0x70ba, 0x11f8, 0x2001, 0x180c, 0x200c, 0xd1b4,
- 0x01d0, 0xc1b4, 0x2102, 0x0026, 0x2011, 0x0200, 0x080c, 0x28ac,
- 0x002e, 0x080c, 0x2858, 0x6024, 0xd0cc, 0x0148, 0x2001, 0x00a0,
- 0x080c, 0x2872, 0x080c, 0x73b9, 0x080c, 0x5cf7, 0x0428, 0x6028,
- 0xc0cd, 0x602a, 0x0408, 0x080c, 0x70d4, 0x0150, 0x080c, 0x70cb,
- 0x1138, 0x2001, 0x0001, 0x080c, 0x23fe, 0x080c, 0x708e, 0x00a0,
- 0x080c, 0x6f98, 0x0178, 0x2001, 0x0001, 0x080c, 0x23fe, 0x7094,
- 0x9086, 0x001e, 0x0120, 0x7094, 0x9086, 0x0022, 0x1118, 0x7097,
- 0x0025, 0x0010, 0x7097, 0x0021, 0x012e, 0x00ee, 0x00de, 0x00ce,
- 0x001e, 0x0005, 0x0026, 0x2011, 0x6f23, 0x080c, 0x8272, 0x002e,
- 0x0016, 0x0026, 0x2009, 0x0064, 0x2011, 0x6f23, 0x080c, 0x8269,
- 0x002e, 0x001e, 0x0005, 0x00e6, 0x00f6, 0x0016, 0x080c, 0x8fd0,
- 0x2071, 0x1800, 0x080c, 0x6ebc, 0x001e, 0x00fe, 0x00ee, 0x0005,
- 0x0016, 0x0026, 0x0036, 0x00c6, 0x00d6, 0x00e6, 0x00f6, 0x0126,
- 0x080c, 0x8fd0, 0x2061, 0x0100, 0x2069, 0x0140, 0x2071, 0x1800,
- 0x2091, 0x8000, 0x6028, 0xc09c, 0x602a, 0x080c, 0x98c7, 0x2011,
- 0x0003, 0x080c, 0x9324, 0x2011, 0x0002, 0x080c, 0x932e, 0x080c,
- 0x921d, 0x080c, 0x821e, 0x0036, 0x901e, 0x080c, 0x929d, 0x003e,
- 0x080c, 0x98e3, 0x60e3, 0x0000, 0x080c, 0xd644, 0x080c, 0xd65f,
- 0x2009, 0x0004, 0x080c, 0x285e, 0x080c, 0x2774, 0x2001, 0x1800,
- 0x2003, 0x0004, 0x2011, 0x0008, 0x080c, 0x28ac, 0x2011, 0x6f23,
- 0x080c, 0x8272, 0x080c, 0x70d4, 0x0118, 0x9006, 0x080c, 0x2872,
- 0x080c, 0x0bab, 0x2001, 0x0001, 0x080c, 0x23fe, 0x012e, 0x00fe,
- 0x00ee, 0x00de, 0x00ce, 0x003e, 0x002e, 0x001e, 0x0005, 0x0026,
- 0x00e6, 0x2011, 0x6f30, 0x2071, 0x19db, 0x701c, 0x9206, 0x1118,
- 0x7018, 0x9005, 0x0110, 0x9085, 0x0001, 0x00ee, 0x002e, 0x0005,
- 0x6020, 0xd09c, 0x0005, 0x6800, 0x9084, 0xfffe, 0x9086, 0x00c0,
- 0x01b8, 0x2001, 0x00c0, 0x080c, 0x2872, 0x0156, 0x20a9, 0x002d,
- 0x1d04, 0x6fa8, 0x2091, 0x6000, 0x1f04, 0x6fa8, 0x015e, 0x00d6,
- 0x2069, 0x1800, 0x6898, 0x8001, 0x0220, 0x0118, 0x689a, 0x00de,
- 0x0005, 0x689b, 0x0014, 0x68e8, 0xd0dc, 0x0dc8, 0x6800, 0x9086,
- 0x0001, 0x1da8, 0x080c, 0x827e, 0x0c90, 0x00c6, 0x00d6, 0x00e6,
- 0x2061, 0x0100, 0x2069, 0x0140, 0x2071, 0x1800, 0x080c, 0x73c8,
- 0x2001, 0x1945, 0x2003, 0x0000, 0x9006, 0x7096, 0x60e2, 0x6886,
- 0x080c, 0x24cd, 0x9006, 0x080c, 0x2872, 0x080c, 0x5bb2, 0x0026,
- 0x2011, 0xffff, 0x080c, 0x28ac, 0x002e, 0x602b, 0x182c, 0x00ee,
- 0x00de, 0x00ce, 0x0005, 0x00c6, 0x00d6, 0x00e6, 0x2061, 0x0100,
- 0x2069, 0x0140, 0x2071, 0x1800, 0x2001, 0x1955, 0x200c, 0x9186,
- 0x0000, 0x0158, 0x9186, 0x0001, 0x0158, 0x9186, 0x0002, 0x0158,
- 0x9186, 0x0003, 0x0158, 0x0804, 0x707e, 0x7097, 0x0022, 0x0040,
- 0x7097, 0x0021, 0x0028, 0x7097, 0x0023, 0x0010, 0x7097, 0x0024,
- 0x60e3, 0x0000, 0x6887, 0x0001, 0x2001, 0x0001, 0x080c, 0x24cd,
- 0x080c, 0x98c7, 0x0026, 0x080c, 0x9b6c, 0x002e, 0x080c, 0x98e3,
- 0x7000, 0x908e, 0x0004, 0x0118, 0x602b, 0x0028, 0x0010, 0x602b,
- 0x0020, 0x0156, 0x0126, 0x2091, 0x8000, 0x20a9, 0x0005, 0x6024,
- 0xd0ac, 0x0150, 0x012e, 0x015e, 0x080c, 0xbf8f, 0x0118, 0x9006,
- 0x080c, 0x289c, 0x0804, 0x708a, 0x6800, 0x9084, 0x00a1, 0xc0bd,
- 0x6802, 0x080c, 0x2858, 0x6904, 0xd1d4, 0x1140, 0x2001, 0x0100,
- 0x080c, 0x2872, 0x1f04, 0x702f, 0x080c, 0x7111, 0x012e, 0x015e,
- 0x080c, 0x70cb, 0x0170, 0x6044, 0x9005, 0x0130, 0x080c, 0x7111,
- 0x9006, 0x8001, 0x1df0, 0x0028, 0x6804, 0xd0d4, 0x1110, 0x080c,
- 0x7111, 0x080c, 0xbf8f, 0x0118, 0x9006, 0x080c, 0x289c, 0x0016,
- 0x0026, 0x7000, 0x908e, 0x0004, 0x0130, 0x2009, 0x00c8, 0x2011,
- 0x6f30, 0x080c, 0x8230, 0x002e, 0x001e, 0x080c, 0x807e, 0x7034,
- 0xc085, 0x7036, 0x2001, 0x1955, 0x2003, 0x0004, 0x080c, 0x6d85,
- 0x080c, 0x70cb, 0x0138, 0x6804, 0xd0d4, 0x1120, 0xd0dc, 0x1100,
- 0x080c, 0x73be, 0x00ee, 0x00de, 0x00ce, 0x0005, 0x00c6, 0x00d6,
- 0x00e6, 0x2061, 0x0100, 0x2069, 0x0140, 0x2071, 0x1800, 0x080c,
- 0x8095, 0x080c, 0x8087, 0x080c, 0x73c8, 0x2001, 0x1945, 0x2003,
- 0x0000, 0x9006, 0x7096, 0x60e2, 0x6886, 0x080c, 0x24cd, 0x9006,
- 0x080c, 0x2872, 0x6043, 0x0090, 0x6043, 0x0010, 0x0026, 0x2011,
- 0xffff, 0x080c, 0x28ac, 0x002e, 0x602b, 0x182c, 0x00ee, 0x00de,
- 0x00ce, 0x0005, 0x0006, 0x2001, 0x1954, 0x2004, 0x9086, 0xaaaa,
- 0x000e, 0x0005, 0x0006, 0x080c, 0x53ac, 0x9084, 0x0030, 0x9086,
- 0x0000, 0x000e, 0x0005, 0x0006, 0x080c, 0x53ac, 0x9084, 0x0030,
- 0x9086, 0x0030, 0x000e, 0x0005, 0x0006, 0x080c, 0x53ac, 0x9084,
- 0x0030, 0x9086, 0x0010, 0x000e, 0x0005, 0x0006, 0x080c, 0x53ac,
- 0x9084, 0x0030, 0x9086, 0x0020, 0x000e, 0x0005, 0x0036, 0x0016,
- 0x2001, 0x180c, 0x2004, 0x908c, 0x0013, 0x0180, 0x0020, 0x080c,
- 0x24ed, 0x900e, 0x0028, 0x080c, 0x6682, 0x1dc8, 0x2009, 0x0002,
- 0x2019, 0x0028, 0x080c, 0x2ff3, 0x9006, 0x0019, 0x001e, 0x003e,
- 0x0005, 0x00e6, 0x2071, 0x180c, 0x2e04, 0x0130, 0x080c, 0xbf88,
- 0x1128, 0x9085, 0x0010, 0x0010, 0x9084, 0xffef, 0x2072, 0x00ee,
- 0x0005, 0x6050, 0x0006, 0x60ec, 0x0006, 0x600c, 0x0006, 0x6004,
- 0x0006, 0x6028, 0x0006, 0x080c, 0x28cf, 0x080c, 0x2902, 0x602f,
- 0x0100, 0x602f, 0x0000, 0x602f, 0x0040, 0x602f, 0x0000, 0x20a9,
- 0x0002, 0x080c, 0x2839, 0x0026, 0x2011, 0x0040, 0x080c, 0x28ac,
- 0x002e, 0x000e, 0x602a, 0x000e, 0x6006, 0x000e, 0x600e, 0x000e,
- 0x60ee, 0x60e3, 0x0000, 0x6887, 0x0001, 0x2001, 0x0001, 0x080c,
- 0x24cd, 0x2001, 0x00a0, 0x0006, 0x080c, 0xbf8f, 0x000e, 0x0130,
- 0x080c, 0x2890, 0x9006, 0x080c, 0x289c, 0x0010, 0x080c, 0x2872,
- 0x000e, 0x6052, 0x6050, 0x0006, 0xc0e5, 0x6052, 0x00f6, 0x2079,
- 0x0100, 0x080c, 0x27e5, 0x00fe, 0x000e, 0x6052, 0x0005, 0x0156,
- 0x0016, 0x0026, 0x0036, 0x00c6, 0x00d6, 0x00e6, 0x2061, 0x0100,
- 0x2069, 0x0140, 0x2071, 0x1800, 0x080c, 0x9925, 0x0158, 0x2001,
- 0x0386, 0x2004, 0xd0b4, 0x1130, 0x2001, 0x0016, 0x080c, 0x98b8,
- 0x0804, 0x71ec, 0x2001, 0x180c, 0x200c, 0xc1c4, 0x2102, 0x6028,
- 0x9084, 0xe1ff, 0x602a, 0x2011, 0x0200, 0x080c, 0x28ac, 0x2001,
- 0x0090, 0x080c, 0x2872, 0x20a9, 0x0366, 0x6024, 0xd0cc, 0x1558,
- 0x1d04, 0x718d, 0x2091, 0x6000, 0x1f04, 0x718d, 0x080c, 0x98c7,
- 0x2011, 0x0003, 0x080c, 0x9324, 0x2011, 0x0002, 0x080c, 0x932e,
- 0x080c, 0x921d, 0x901e, 0x080c, 0x929d, 0x2001, 0x0386, 0x2003,
- 0x7000, 0x080c, 0x98e3, 0x2001, 0x00a0, 0x080c, 0x2872, 0x080c,
- 0x73b9, 0x080c, 0x5cf7, 0x080c, 0xbf8f, 0x0110, 0x080c, 0x0cd1,
- 0x9085, 0x0001, 0x04b8, 0x080c, 0x19ae, 0x60e3, 0x0000, 0x2001,
- 0x0002, 0x080c, 0x24cd, 0x60e2, 0x2001, 0x0080, 0x080c, 0x2872,
- 0x20a9, 0x0366, 0x2011, 0x1e00, 0x080c, 0x28ac, 0x2009, 0x1e00,
- 0x080c, 0x2858, 0x6024, 0x910c, 0x0140, 0x1d04, 0x71ca, 0x2091,
- 0x6000, 0x1f04, 0x71ca, 0x0804, 0x7196, 0x2001, 0x0386, 0x2003,
- 0x7000, 0x6028, 0x9085, 0x1e00, 0x602a, 0x70b0, 0x9005, 0x1118,
- 0x6887, 0x0001, 0x0008, 0x6886, 0x080c, 0xbf8f, 0x0110, 0x080c,
- 0x0cd1, 0x9006, 0x00ee, 0x00de, 0x00ce, 0x003e, 0x002e, 0x001e,
- 0x015e, 0x0005, 0x0156, 0x0016, 0x0026, 0x0036, 0x00c6, 0x00d6,
- 0x00e6, 0x2061, 0x0100, 0x2071, 0x1800, 0x7000, 0x9086, 0x0003,
- 0x1168, 0x2001, 0x020b, 0x2004, 0x9084, 0x5540, 0x9086, 0x5540,
- 0x1128, 0x2069, 0x1a4e, 0x2d04, 0x8000, 0x206a, 0x2069, 0x0140,
- 0x6020, 0x9084, 0x00c0, 0x0120, 0x6884, 0x9005, 0x1904, 0x7263,
- 0x2001, 0x0088, 0x080c, 0x2872, 0x9006, 0x60e2, 0x6886, 0x080c,
- 0x24cd, 0x2069, 0x0200, 0x6804, 0x9005, 0x1118, 0x6808, 0x9005,
- 0x01d0, 0x6028, 0x9084, 0xfbff, 0x602a, 0x2011, 0x0400, 0x080c,
- 0x28ac, 0x2069, 0x1967, 0x7000, 0x206a, 0x7097, 0x0026, 0x7003,
- 0x0001, 0x20a9, 0x0002, 0x1d04, 0x7243, 0x2091, 0x6000, 0x1f04,
- 0x7243, 0x0804, 0x7294, 0x2069, 0x0140, 0x20a9, 0x0384, 0x2011,
- 0x1e00, 0x080c, 0x28ac, 0x2009, 0x1e00, 0x080c, 0x2858, 0x6024,
- 0x910c, 0x0528, 0x9084, 0x1a00, 0x1510, 0x1d04, 0x724f, 0x2091,
- 0x6000, 0x1f04, 0x724f, 0x080c, 0x98c7, 0x2011, 0x0003, 0x080c,
- 0x9324, 0x2011, 0x0002, 0x080c, 0x932e, 0x080c, 0x921d, 0x901e,
- 0x080c, 0x929d, 0x080c, 0x98e3, 0x2001, 0x00a0, 0x080c, 0x2872,
- 0x080c, 0x73b9, 0x080c, 0x5cf7, 0x9085, 0x0001, 0x00a8, 0x2001,
- 0x0080, 0x080c, 0x2872, 0x2069, 0x0140, 0x60e3, 0x0000, 0x70b0,
- 0x9005, 0x1118, 0x6887, 0x0001, 0x0008, 0x6886, 0x2001, 0x0002,
- 0x080c, 0x24cd, 0x60e2, 0x9006, 0x00ee, 0x00de, 0x00ce, 0x003e,
- 0x002e, 0x001e, 0x015e, 0x0005, 0x0156, 0x0016, 0x0026, 0x0036,
- 0x00c6, 0x00d6, 0x00e6, 0x2061, 0x0100, 0x2071, 0x1800, 0x6020,
- 0x9084, 0x00c0, 0x01e8, 0x080c, 0x98c7, 0x2011, 0x0003, 0x080c,
- 0x9324, 0x2011, 0x0002, 0x080c, 0x932e, 0x080c, 0x921d, 0x901e,
- 0x080c, 0x929d, 0x080c, 0x98e3, 0x2069, 0x0140, 0x2001, 0x00a0,
- 0x080c, 0x2872, 0x080c, 0x73b9, 0x080c, 0x5cf7, 0x0804, 0x7336,
- 0x2001, 0x180c, 0x200c, 0xd1b4, 0x1160, 0xc1b5, 0x2102, 0x080c,
- 0x6f18, 0x2069, 0x0140, 0x2001, 0x0080, 0x080c, 0x2872, 0x60e3,
- 0x0000, 0x2069, 0x0200, 0x6804, 0x9005, 0x1118, 0x6808, 0x9005,
- 0x0190, 0x6028, 0x9084, 0xfdff, 0x602a, 0x2011, 0x0200, 0x080c,
- 0x28ac, 0x2069, 0x1967, 0x7000, 0x206a, 0x7097, 0x0027, 0x7003,
- 0x0001, 0x0804, 0x7336, 0x2011, 0x1e00, 0x080c, 0x28ac, 0x2009,
- 0x1e00, 0x080c, 0x2858, 0x6024, 0x910c, 0x01c8, 0x9084, 0x1c00,
- 0x11b0, 0x1d04, 0x72f3, 0x0006, 0x0016, 0x00c6, 0x00d6, 0x00e6,
- 0x080c, 0x80c6, 0x00ee, 0x00de, 0x00ce, 0x001e, 0x000e, 0x00e6,
- 0x2071, 0x19db, 0x7070, 0x00ee, 0x9005, 0x19e8, 0x00f8, 0x0026,
- 0x2011, 0x6f30, 0x080c, 0x816c, 0x2011, 0x6f23, 0x080c, 0x8272,
- 0x002e, 0x2069, 0x0140, 0x60e3, 0x0000, 0x70b0, 0x9005, 0x1118,
- 0x6887, 0x0001, 0x0008, 0x6886, 0x2001, 0x0002, 0x080c, 0x24cd,
- 0x60e2, 0x2001, 0x180c, 0x200c, 0xc1b4, 0x2102, 0x00ee, 0x00de,
- 0x00ce, 0x003e, 0x002e, 0x001e, 0x015e, 0x0005, 0x0156, 0x0016,
- 0x0026, 0x0036, 0x0046, 0x00c6, 0x00e6, 0x2061, 0x0100, 0x2071,
- 0x1800, 0x080c, 0xbf88, 0x1904, 0x73a3, 0x7130, 0xd184, 0x1170,
- 0x080c, 0x319a, 0x0138, 0xc18d, 0x7132, 0x2011, 0x185c, 0x2214,
- 0xd2ac, 0x1120, 0x7030, 0xd08c, 0x0904, 0x73a3, 0x2011, 0x185c,
- 0x220c, 0x0438, 0x0016, 0x2019, 0x000e, 0x080c, 0xd234, 0x0156,
- 0x00b6, 0x20a9, 0x007f, 0x900e, 0x9186, 0x007e, 0x01a0, 0x9186,
- 0x0080, 0x0188, 0x080c, 0x628f, 0x1170, 0x2120, 0x9006, 0x0016,
- 0x2009, 0x000e, 0x080c, 0xd2bc, 0x2009, 0x0001, 0x2011, 0x0100,
- 0x080c, 0x8401, 0x001e, 0x8108, 0x1f04, 0x736c, 0x00be, 0x015e,
- 0x001e, 0xd1ac, 0x1148, 0x0016, 0x2009, 0x0002, 0x2019, 0x0004,
- 0x080c, 0x2ff3, 0x001e, 0x0078, 0x0156, 0x00b6, 0x20a9, 0x007f,
- 0x900e, 0x080c, 0x628f, 0x1110, 0x080c, 0x5d11, 0x8108, 0x1f04,
- 0x7399, 0x00be, 0x015e, 0x080c, 0x19ae, 0x080c, 0x98c7, 0x080c,
- 0x9b6c, 0x080c, 0x98e3, 0x60e3, 0x0000, 0x080c, 0x5cf7, 0x080c,
- 0x6feb, 0x00ee, 0x00ce, 0x004e, 0x003e, 0x002e, 0x001e, 0x015e,
- 0x0005, 0x2001, 0x1955, 0x2003, 0x0001, 0x0005, 0x2001, 0x1955,
- 0x2003, 0x0000, 0x0005, 0x2001, 0x1954, 0x2003, 0xaaaa, 0x0005,
- 0x2001, 0x1954, 0x2003, 0x0000, 0x0005, 0x2071, 0x18f8, 0x7003,
- 0x0000, 0x7007, 0x0000, 0x080c, 0x1048, 0x090c, 0x0d65, 0xa8ab,
- 0xdcb0, 0x2900, 0x704e, 0x080c, 0x1048, 0x090c, 0x0d65, 0xa8ab,
- 0xdcb0, 0x2900, 0x7052, 0xa867, 0x0000, 0xa86b, 0x0001, 0xa89f,
- 0x0000, 0x0005, 0x00e6, 0x2071, 0x0040, 0x6848, 0x9005, 0x1118,
- 0x9085, 0x0001, 0x04b0, 0x6840, 0x9005, 0x0150, 0x04a1, 0x6a50,
- 0x9200, 0x7002, 0x6854, 0x9101, 0x7006, 0x9006, 0x7012, 0x7016,
- 0x6850, 0x7002, 0x6854, 0x7006, 0x6858, 0x700a, 0x685c, 0x700e,
- 0x6840, 0x9005, 0x1110, 0x7012, 0x7016, 0x6848, 0x701a, 0x701c,
- 0x9085, 0x0040, 0x701e, 0x2001, 0x0019, 0x7036, 0x702b, 0x0001,
- 0x2001, 0x0004, 0x200c, 0x918c, 0xfff7, 0x918d, 0x8000, 0x2102,
- 0x00d6, 0x2069, 0x18f8, 0x6807, 0x0001, 0x00de, 0x080c, 0x79c6,
- 0x9006, 0x00ee, 0x0005, 0x900e, 0x0156, 0x20a9, 0x0006, 0x8003,
- 0x818d, 0x1f04, 0x742f, 0x015e, 0x0005, 0x2079, 0x0040, 0x2071,
- 0x18f8, 0x7004, 0x0002, 0x7445, 0x7446, 0x7492, 0x74ed, 0x762e,
- 0x7443, 0x7443, 0x7658, 0x080c, 0x0d65, 0x0005, 0x2079, 0x0040,
- 0x2001, 0x1dc0, 0x2003, 0x0000, 0x782c, 0x908c, 0x0780, 0x190c,
- 0x7a52, 0xd0a4, 0x0578, 0x2001, 0x1dc0, 0x2004, 0x9082, 0x0080,
- 0x1648, 0x1d04, 0x7463, 0x2001, 0x19de, 0x200c, 0x8109, 0x0510,
- 0x2091, 0x6000, 0x2102, 0x7824, 0x2048, 0x9006, 0xa802, 0xa806,
- 0xa864, 0x9084, 0x00ff, 0x908a, 0x0040, 0x0610, 0x00c0, 0x2001,
- 0x1800, 0x200c, 0x9186, 0x0003, 0x1168, 0x7004, 0x0002, 0x7482,
- 0x744c, 0x7482, 0x7480, 0x7482, 0x7482, 0x7482, 0x7482, 0x7482,
- 0x080c, 0x74ed, 0x782c, 0xd09c, 0x090c, 0x79c6, 0x0005, 0x9082,
- 0x005a, 0x1218, 0x2100, 0x003b, 0x0c10, 0x080c, 0x7523, 0x0c90,
- 0x00e3, 0x08e8, 0x0005, 0x7523, 0x7523, 0x7523, 0x7523, 0x7523,
- 0x7523, 0x7523, 0x7523, 0x7545, 0x7523, 0x7523, 0x7523, 0x7523,
- 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x7523,
- 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x752f,
- 0x7523, 0x772d, 0x7523, 0x7523, 0x7523, 0x7545, 0x7523, 0x752f,
- 0x776e, 0x77af, 0x77f6, 0x780a, 0x7523, 0x7523, 0x7545, 0x752f,
- 0x7523, 0x7523, 0x7602, 0x78b5, 0x78d0, 0x7523, 0x7545, 0x7523,
- 0x7523, 0x7523, 0x7523, 0x75f8, 0x78d0, 0x7523, 0x7523, 0x7523,
- 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x7559, 0x7523,
- 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x7523,
- 0x79f6, 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x756d, 0x7523,
- 0x7523, 0x7523, 0x7523, 0x7523, 0x7523, 0x2079, 0x0040, 0x7004,
- 0x9086, 0x0003, 0x1198, 0x782c, 0x080c, 0x79ef, 0xd0a4, 0x0170,
- 0x7824, 0x2048, 0x9006, 0xa802, 0xa806, 0xa864, 0x9084, 0x00ff,
- 0x908a, 0x001a, 0x1210, 0x002b, 0x0c50, 0x00e9, 0x080c, 0x79c6,
- 0x0005, 0x7523, 0x752f, 0x7719, 0x7523, 0x752f, 0x7523, 0x752f,
- 0x752f, 0x7523, 0x752f, 0x7719, 0x752f, 0x752f, 0x752f, 0x752f,
- 0x752f, 0x7523, 0x752f, 0x7719, 0x7523, 0x7523, 0x752f, 0x7523,
- 0x7523, 0x7523, 0x752f, 0x00e6, 0x2071, 0x18f8, 0x2009, 0x0400,
- 0x0071, 0x00ee, 0x0005, 0x2009, 0x1000, 0x0049, 0x0005, 0x2009,
- 0x2000, 0x0029, 0x0005, 0x2009, 0x0800, 0x0009, 0x0005, 0x7007,
- 0x0001, 0xa868, 0x9084, 0x00ff, 0x9105, 0xa86a, 0x0126, 0x2091,
- 0x8000, 0x080c, 0x69b5, 0x012e, 0x0005, 0xa864, 0x8007, 0x9084,
- 0x00ff, 0x0d08, 0x8001, 0x1120, 0x7007, 0x0001, 0x0804, 0x76d7,
- 0x7007, 0x0003, 0x7012, 0x2900, 0x7016, 0x701a, 0x704b, 0x76d7,
- 0x0005, 0xa864, 0x8007, 0x9084, 0x00ff, 0x0968, 0x8001, 0x1120,
- 0x7007, 0x0001, 0x0804, 0x76f2, 0x7007, 0x0003, 0x7012, 0x2900,
- 0x7016, 0x701a, 0x704b, 0x76f2, 0x0005, 0xa864, 0x8007, 0x9084,
- 0x00ff, 0x9086, 0x0001, 0x1904, 0x752b, 0x7007, 0x0001, 0x2009,
- 0x1833, 0x210c, 0x81ff, 0x1904, 0x75cf, 0xa994, 0x9186, 0x006f,
- 0x0188, 0x9186, 0x0074, 0x15b0, 0x0026, 0x2011, 0x0010, 0x080c,
- 0x66ae, 0x002e, 0x0578, 0x0016, 0xa998, 0x080c, 0x66f8, 0x001e,
- 0x1548, 0x0400, 0x080c, 0x70ba, 0x0140, 0xa897, 0x4005, 0xa89b,
- 0x0016, 0x2001, 0x0030, 0x900e, 0x0438, 0x0026, 0x2011, 0x8008,
- 0x080c, 0x66ae, 0x002e, 0x01b0, 0x0016, 0x0026, 0x0036, 0xa998,
- 0xaaa0, 0xab9c, 0x918d, 0x8000, 0x080c, 0x66f8, 0x003e, 0x002e,
- 0x001e, 0x1140, 0xa897, 0x4005, 0xa89b, 0x4009, 0x2001, 0x0030,
- 0x900e, 0x0050, 0xa868, 0x9084, 0x00ff, 0xa86a, 0xa883, 0x0000,
- 0x080c, 0x5f22, 0x1108, 0x0005, 0x0126, 0x2091, 0x8000, 0xa867,
- 0x0139, 0xa87a, 0xa982, 0x080c, 0x69b5, 0x012e, 0x0ca0, 0xa994,
- 0x9186, 0x0071, 0x0904, 0x757d, 0x9186, 0x0064, 0x0904, 0x757d,
- 0x9186, 0x007c, 0x0904, 0x757d, 0x9186, 0x0028, 0x0904, 0x757d,
- 0x9186, 0x0038, 0x0904, 0x757d, 0x9186, 0x0078, 0x0904, 0x757d,
- 0x9186, 0x005f, 0x0904, 0x757d, 0x9186, 0x0056, 0x0904, 0x757d,
- 0xa897, 0x4005, 0xa89b, 0x0001, 0x2001, 0x0030, 0x900e, 0x0860,
- 0xa87c, 0x9084, 0x00c0, 0x9086, 0x00c0, 0x1120, 0x7007, 0x0001,
- 0x0804, 0x78e7, 0x2900, 0x7016, 0x701a, 0x20a9, 0x0004, 0xa860,
- 0x20e0, 0xa85c, 0x9080, 0x0030, 0x2098, 0x7050, 0x2040, 0xa060,
- 0x20e8, 0xa05c, 0x9080, 0x0023, 0x20a0, 0x4003, 0xa888, 0x7012,
- 0x9082, 0x0401, 0x1a04, 0x7533, 0xaab4, 0x928a, 0x0002, 0x1a04,
- 0x7533, 0x82ff, 0x1138, 0xa8b8, 0xa9bc, 0x9105, 0x0118, 0x2001,
- 0x7695, 0x0018, 0x9280, 0x768b, 0x2005, 0x7056, 0x7010, 0x9015,
- 0x0904, 0x7676, 0x080c, 0x1048, 0x1118, 0x7007, 0x0004, 0x0005,
- 0x2900, 0x7022, 0x7054, 0x2060, 0xe000, 0xa866, 0x7050, 0x2040,
- 0xa95c, 0xe004, 0x9100, 0xa076, 0xa860, 0xa072, 0xe008, 0x920a,
- 0x1210, 0x900e, 0x2200, 0x7112, 0xe20c, 0x8003, 0x800b, 0x9296,
- 0x0004, 0x0108, 0x9108, 0xa17a, 0x810b, 0xa17e, 0x080c, 0x1124,
- 0xa06c, 0x908e, 0x0100, 0x0170, 0x9086, 0x0200, 0x0118, 0x7007,
- 0x0007, 0x0005, 0x7020, 0x2048, 0x080c, 0x1061, 0x7014, 0x2048,
- 0x0804, 0x7533, 0x7020, 0x2048, 0x7018, 0xa802, 0xa807, 0x0000,
- 0x2908, 0x2048, 0xa906, 0x711a, 0x0804, 0x762e, 0x7014, 0x2048,
- 0x7007, 0x0001, 0xa8b4, 0x9005, 0x1128, 0xa8b8, 0xa9bc, 0x9105,
- 0x0108, 0x00b9, 0xa864, 0x9084, 0x00ff, 0x9086, 0x001e, 0x0904,
- 0x78e7, 0x0804, 0x76d7, 0x768d, 0x7691, 0x0002, 0x001d, 0x0007,
- 0x0004, 0x000a, 0x001b, 0x0005, 0x0006, 0x000a, 0x001d, 0x0005,
- 0x0004, 0x0076, 0x0066, 0xafb8, 0xaebc, 0xa804, 0x2050, 0xb0c0,
- 0xb0e2, 0xb0bc, 0xb0de, 0xb0b8, 0xb0d2, 0xb0b4, 0xb0ce, 0xb6da,
- 0xb7d6, 0xb0b0, 0xb0ca, 0xb0ac, 0xb0c6, 0xb0a8, 0xb0ba, 0xb0a4,
- 0xb0b6, 0xb6c2, 0xb7be, 0xb0a0, 0xb0b2, 0xb09c, 0xb0ae, 0xb098,
- 0xb0a2, 0xb094, 0xb09e, 0xb6aa, 0xb7a6, 0xb090, 0xb09a, 0xb08c,
- 0xb096, 0xb088, 0xb08a, 0xb084, 0xb086, 0xb692, 0xb78e, 0xb080,
- 0xb082, 0xb07c, 0xb07e, 0xb078, 0xb072, 0xb074, 0xb06e, 0xb67a,
- 0xb776, 0xb004, 0x9055, 0x1958, 0x006e, 0x007e, 0x0005, 0x2009,
- 0x1833, 0x210c, 0x81ff, 0x1178, 0x080c, 0x5d71, 0x1108, 0x0005,
- 0x080c, 0x6bc6, 0x0126, 0x2091, 0x8000, 0x080c, 0xbb73, 0x080c,
- 0x69b5, 0x012e, 0x0ca0, 0x080c, 0xbf88, 0x1d70, 0x2001, 0x0028,
- 0x900e, 0x0c70, 0x2009, 0x1833, 0x210c, 0x81ff, 0x11d8, 0xa888,
- 0x9005, 0x01e0, 0xa883, 0x0000, 0xa87c, 0xd0f4, 0x0120, 0x080c,
- 0x5e84, 0x1138, 0x0005, 0x9006, 0xa87a, 0x080c, 0x5dff, 0x1108,
- 0x0005, 0x0126, 0x2091, 0x8000, 0xa87a, 0xa982, 0x080c, 0x69b5,
- 0x012e, 0x0cb0, 0x2001, 0x0028, 0x900e, 0x0c98, 0x2001, 0x0000,
- 0x0c80, 0x7018, 0xa802, 0x2908, 0x2048, 0xa906, 0x711a, 0x7010,
- 0x8001, 0x7012, 0x0118, 0x7007, 0x0003, 0x0030, 0x7014, 0x2048,
- 0x7007, 0x0001, 0x7048, 0x080f, 0x0005, 0x00b6, 0x7007, 0x0001,
- 0xa974, 0xa878, 0x9084, 0x00ff, 0x9096, 0x0004, 0x0540, 0x20a9,
- 0x0001, 0x9096, 0x0001, 0x0190, 0x900e, 0x20a9, 0x0800, 0x9096,
- 0x0002, 0x0160, 0x9005, 0x11d8, 0xa974, 0x080c, 0x628f, 0x11b8,
- 0x0066, 0xae80, 0x080c, 0x639f, 0x006e, 0x0088, 0x0046, 0x2011,
- 0x180c, 0x2224, 0xc484, 0x2412, 0x004e, 0x00c6, 0x080c, 0x628f,
- 0x1110, 0x080c, 0x6572, 0x8108, 0x1f04, 0x7756, 0x00ce, 0xa87c,
- 0xd084, 0x1120, 0x080c, 0x1061, 0x00be, 0x0005, 0x0126, 0x2091,
- 0x8000, 0x080c, 0x69b5, 0x012e, 0x00be, 0x0005, 0x0126, 0x2091,
- 0x8000, 0x7007, 0x0001, 0x080c, 0x6686, 0x0580, 0x2061, 0x1a46,
- 0x6100, 0xd184, 0x0178, 0xa888, 0x9084, 0x00ff, 0x1550, 0x6000,
- 0xd084, 0x0520, 0x6004, 0x9005, 0x1538, 0x6003, 0x0000, 0x600b,
- 0x0000, 0x00c8, 0x2011, 0x0001, 0xa890, 0x9005, 0x1110, 0x2001,
- 0x001e, 0x8000, 0x6016, 0xa888, 0x9084, 0x00ff, 0x0178, 0x6006,
- 0xa888, 0x8007, 0x9084, 0x00ff, 0x0148, 0x600a, 0xa888, 0x8000,
- 0x1108, 0xc28d, 0x6202, 0x012e, 0x0804, 0x79b0, 0x012e, 0x0804,
- 0x79aa, 0x012e, 0x0804, 0x79a4, 0x012e, 0x0804, 0x79a7, 0x0126,
- 0x2091, 0x8000, 0x7007, 0x0001, 0x080c, 0x6686, 0x05e0, 0x2061,
- 0x1a46, 0x6000, 0xd084, 0x05b8, 0x6204, 0x6308, 0xd08c, 0x1530,
- 0xac78, 0x9484, 0x0003, 0x0170, 0xa988, 0x918c, 0x00ff, 0x8001,
- 0x1120, 0x2100, 0x9210, 0x0620, 0x0028, 0x8001, 0x1508, 0x2100,
- 0x9212, 0x02f0, 0x9484, 0x000c, 0x0188, 0xa988, 0x810f, 0x918c,
- 0x00ff, 0x9082, 0x0004, 0x1120, 0x2100, 0x9318, 0x0288, 0x0030,
- 0x9082, 0x0004, 0x1168, 0x2100, 0x931a, 0x0250, 0xa890, 0x9005,
- 0x0110, 0x8000, 0x6016, 0x6206, 0x630a, 0x012e, 0x0804, 0x79b0,
- 0x012e, 0x0804, 0x79ad, 0x012e, 0x0804, 0x79aa, 0x0126, 0x2091,
- 0x8000, 0x7007, 0x0001, 0x2061, 0x1a46, 0x6300, 0xd38c, 0x1120,
- 0x6308, 0x8318, 0x0220, 0x630a, 0x012e, 0x0804, 0x79be, 0x012e,
- 0x0804, 0x79ad, 0x00b6, 0x0126, 0x00c6, 0x2091, 0x8000, 0x7007,
- 0x0001, 0xa87c, 0xd0ac, 0x0148, 0x00c6, 0x2061, 0x1a46, 0x6000,
- 0x9084, 0xfcff, 0x6002, 0x00ce, 0x0440, 0xa888, 0x9005, 0x05d8,
- 0xa88c, 0x9065, 0x0598, 0x2001, 0x1833, 0x2004, 0x9005, 0x0118,
- 0x080c, 0x9c20, 0x0068, 0x6017, 0xf400, 0x6063, 0x0000, 0xa97c,
- 0xd1a4, 0x0110, 0xa980, 0x6162, 0x2009, 0x0041, 0x080c, 0x9c82,
- 0xa988, 0x918c, 0xff00, 0x9186, 0x2000, 0x1138, 0x0026, 0x900e,
- 0x2011, 0xfdff, 0x080c, 0x8401, 0x002e, 0xa87c, 0xd0c4, 0x0148,
- 0x2061, 0x1a46, 0x6000, 0xd08c, 0x1120, 0x6008, 0x8000, 0x0208,
- 0x600a, 0x00ce, 0x012e, 0x00be, 0x0804, 0x79b0, 0x00ce, 0x012e,
- 0x00be, 0x0804, 0x79aa, 0xa984, 0x9186, 0x002e, 0x0d30, 0x9186,
- 0x002d, 0x0d18, 0x9186, 0x0045, 0x0510, 0x9186, 0x002a, 0x1130,
- 0x2001, 0x180c, 0x200c, 0xc194, 0x2102, 0x08b8, 0x9186, 0x0020,
- 0x0158, 0x9186, 0x0029, 0x1d10, 0xa974, 0x080c, 0x628f, 0x1968,
- 0xb800, 0xc0e4, 0xb802, 0x0848, 0xa88c, 0x9065, 0x09b8, 0x6007,
- 0x0024, 0x2001, 0x195e, 0x2004, 0x601a, 0x0804, 0x7845, 0xa88c,
- 0x9065, 0x0960, 0x00e6, 0xa890, 0x9075, 0x2001, 0x1833, 0x2004,
- 0x9005, 0x0150, 0x080c, 0x9c20, 0x8eff, 0x0118, 0x2e60, 0x080c,
- 0x9c20, 0x00ee, 0x0804, 0x7845, 0x6024, 0xc0dc, 0xc0d5, 0x6026,
- 0x2e60, 0x6007, 0x003a, 0xa8a0, 0x9005, 0x0130, 0x6007, 0x003b,
- 0xa8a4, 0x602e, 0xa8a8, 0x6016, 0x6003, 0x0001, 0x2009, 0x8020,
- 0x080c, 0x84e7, 0x00ee, 0x0804, 0x7845, 0x2061, 0x1a46, 0x6000,
- 0xd084, 0x0190, 0xd08c, 0x1904, 0x79be, 0x0126, 0x2091, 0x8000,
- 0x6204, 0x8210, 0x0220, 0x6206, 0x012e, 0x0804, 0x79be, 0x012e,
- 0xa883, 0x0016, 0x0804, 0x79b7, 0xa883, 0x0007, 0x0804, 0x79b7,
- 0xa864, 0x8007, 0x9084, 0x00ff, 0x0130, 0x8001, 0x1138, 0x7007,
- 0x0001, 0x0069, 0x0005, 0x080c, 0x752b, 0x0040, 0x7007, 0x0003,
- 0x7012, 0x2900, 0x7016, 0x701a, 0x704b, 0x78e7, 0x0005, 0x00b6,
- 0x00e6, 0x0126, 0x2091, 0x8000, 0x903e, 0x2061, 0x1800, 0x61cc,
- 0x81ff, 0x1904, 0x7969, 0x6130, 0xd194, 0x1904, 0x7993, 0xa878,
- 0x2070, 0x9e82, 0x1ddc, 0x0a04, 0x795d, 0x6064, 0x9e02, 0x1a04,
- 0x795d, 0x7120, 0x9186, 0x0006, 0x1904, 0x794f, 0x7010, 0x905d,
- 0x0904, 0x7969, 0xb800, 0xd0e4, 0x1904, 0x798d, 0x2061, 0x1a46,
- 0x6100, 0x9184, 0x0301, 0x9086, 0x0001, 0x15a0, 0x7024, 0xd0dc,
- 0x1904, 0x7996, 0xa883, 0x0000, 0xa803, 0x0000, 0x2908, 0x7014,
- 0x9005, 0x1198, 0x7116, 0xa87c, 0xd0f4, 0x1904, 0x7999, 0x080c,
- 0x53a8, 0xd09c, 0x1118, 0xa87c, 0xc0cc, 0xa87e, 0x2e60, 0x080c,
- 0x82f1, 0x012e, 0x00ee, 0x00be, 0x0005, 0x2048, 0xa800, 0x9005,
- 0x1de0, 0xa902, 0x2148, 0xa87c, 0xd0f4, 0x1904, 0x7999, 0x012e,
- 0x00ee, 0x00be, 0x0005, 0x012e, 0x00ee, 0xa883, 0x0006, 0x00be,
- 0x0804, 0x79b7, 0xd184, 0x0db8, 0xd1c4, 0x1190, 0x00a0, 0xa974,
- 0x080c, 0x628f, 0x15d0, 0xb800, 0xd0e4, 0x15b8, 0x7120, 0x9186,
- 0x0007, 0x1118, 0xa883, 0x0002, 0x0490, 0xa883, 0x0008, 0x0478,
- 0xa883, 0x000e, 0x0460, 0xa883, 0x0017, 0x0448, 0xa883, 0x0035,
- 0x0430, 0x080c, 0x53ac, 0xd0fc, 0x01e8, 0xa878, 0x2070, 0x9e82,
- 0x1ddc, 0x02c0, 0x6064, 0x9e02, 0x12a8, 0x7120, 0x9186, 0x0006,
- 0x1188, 0x7010, 0x905d, 0x0170, 0xb800, 0xd0bc, 0x0158, 0x2039,
- 0x0001, 0x7000, 0x9086, 0x0007, 0x1904, 0x78f3, 0x7003, 0x0002,
- 0x0804, 0x78f3, 0xa883, 0x0028, 0x0010, 0xa883, 0x0029, 0x012e,
- 0x00ee, 0x00be, 0x0420, 0xa883, 0x002a, 0x0cc8, 0xa883, 0x0045,
- 0x0cb0, 0x2e60, 0x2019, 0x0002, 0x601b, 0x0014, 0x080c, 0xce41,
- 0x012e, 0x00ee, 0x00be, 0x0005, 0x2009, 0x003e, 0x0058, 0x2009,
- 0x0004, 0x0040, 0x2009, 0x0006, 0x0028, 0x2009, 0x0016, 0x0010,
- 0x2009, 0x0001, 0xa884, 0x9084, 0xff00, 0x9105, 0xa886, 0x0126,
- 0x2091, 0x8000, 0x080c, 0x69b5, 0x012e, 0x0005, 0x080c, 0x1061,
- 0x0005, 0x00d6, 0x080c, 0x82e8, 0x00de, 0x0005, 0x00d6, 0x00e6,
- 0x0126, 0x2091, 0x8000, 0x2071, 0x0040, 0x702c, 0xd084, 0x01d8,
- 0x908c, 0x0780, 0x190c, 0x7a52, 0xd09c, 0x11a8, 0x2071, 0x1800,
- 0x70bc, 0x90ea, 0x0040, 0x0278, 0x8001, 0x70be, 0x702c, 0x2048,
- 0xa800, 0x702e, 0x9006, 0xa802, 0xa806, 0x2071, 0x0040, 0x2900,
- 0x7022, 0x702c, 0x0c28, 0x012e, 0x00ee, 0x00de, 0x0005, 0x0006,
- 0x9084, 0x0780, 0x190c, 0x7a52, 0x000e, 0x0005, 0x00d6, 0x00c6,
- 0x0036, 0x0026, 0x0016, 0x00b6, 0x7007, 0x0001, 0xaa74, 0x9282,
- 0x0004, 0x1a04, 0x7a43, 0xa97c, 0x9188, 0x1000, 0x2104, 0x905d,
- 0xb804, 0xd284, 0x0140, 0x05e8, 0x8007, 0x9084, 0x00ff, 0x9084,
- 0x0006, 0x1108, 0x04b0, 0x2b10, 0x080c, 0x9b90, 0x1118, 0x080c,
- 0x9c55, 0x05a8, 0x6212, 0xa874, 0x0002, 0x7a21, 0x7a26, 0x7a29,
- 0x7a2f, 0x2019, 0x0002, 0x080c, 0xd234, 0x0060, 0x080c, 0xd1c4,
- 0x0048, 0x2019, 0x0002, 0xa980, 0x080c, 0xd1e3, 0x0018, 0xa980,
- 0x080c, 0xd1c4, 0x080c, 0x9be6, 0xa887, 0x0000, 0x0126, 0x2091,
- 0x8000, 0x080c, 0x69b5, 0x012e, 0x00be, 0x001e, 0x002e, 0x003e,
- 0x00ce, 0x00de, 0x0005, 0xa887, 0x0006, 0x0c80, 0xa887, 0x0002,
- 0x0c68, 0xa887, 0x0005, 0x0c50, 0xa887, 0x0004, 0x0c38, 0xa887,
- 0x0007, 0x0c20, 0x2091, 0x8000, 0x0e04, 0x7a54, 0x0006, 0x0016,
- 0x2001, 0x8003, 0x0006, 0x0804, 0x0d6e, 0x2001, 0x1833, 0x2004,
- 0x9005, 0x0005, 0x0005, 0x00f6, 0x2079, 0x0300, 0x2001, 0x0200,
- 0x200c, 0xc1e5, 0xc1dc, 0x2102, 0x2009, 0x0218, 0x210c, 0xd1ec,
- 0x1120, 0x080c, 0x1547, 0x00fe, 0x0005, 0x2001, 0x020d, 0x2003,
- 0x0020, 0x781f, 0x0300, 0x00fe, 0x0005, 0x781c, 0xd08c, 0x0904,
- 0x7ad5, 0x68bc, 0x90aa, 0x0005, 0x0a04, 0x807e, 0x7d44, 0x7c40,
- 0xd59c, 0x190c, 0x0d65, 0x9584, 0x00f6, 0x1508, 0x9484, 0x7000,
- 0x0138, 0x908a, 0x2000, 0x1258, 0x9584, 0x0700, 0x8007, 0x04f0,
- 0x7000, 0x9084, 0xff00, 0x9086, 0x8100, 0x0db0, 0x00b0, 0x9484,
- 0x0fff, 0x1130, 0x7000, 0x9084, 0xff00, 0x9086, 0x8100, 0x11c0,
- 0x080c, 0xd61c, 0x080c, 0x7fb5, 0x7817, 0x0140, 0x00a8, 0x9584,
- 0x0076, 0x1118, 0x080c, 0x8011, 0x19c8, 0xd5a4, 0x0148, 0x0046,
- 0x0056, 0x080c, 0x7b25, 0x080c, 0x1fe0, 0x005e, 0x004e, 0x0020,
- 0x080c, 0xd61c, 0x7817, 0x0140, 0x080c, 0x70ba, 0x0168, 0x2001,
- 0x0111, 0x2004, 0xd08c, 0x0140, 0x688f, 0x0000, 0x2001, 0x0110,
- 0x2003, 0x0008, 0x2003, 0x0000, 0x0489, 0x0005, 0x0002, 0x7ae2,
- 0x7dd7, 0x7adf, 0x7adf, 0x7adf, 0x7adf, 0x7adf, 0x7adf, 0x7817,
- 0x0140, 0x0005, 0x7000, 0x908c, 0xff00, 0x9194, 0xf000, 0x810f,
- 0x9484, 0x0fff, 0x688e, 0x9286, 0x2000, 0x1150, 0x6800, 0x9086,
- 0x0001, 0x1118, 0x080c, 0x5409, 0x0070, 0x080c, 0x7b45, 0x0058,
- 0x9286, 0x3000, 0x1118, 0x080c, 0x7d14, 0x0028, 0x9286, 0x8000,
- 0x1110, 0x080c, 0x7eeb, 0x7817, 0x0140, 0x0005, 0x2001, 0x1810,
- 0x2004, 0xd08c, 0x0178, 0x2001, 0x1800, 0x2004, 0x9086, 0x0003,
- 0x1148, 0x0026, 0x0036, 0x2011, 0x8048, 0x2518, 0x080c, 0x48fa,
- 0x003e, 0x002e, 0x0005, 0x0036, 0x0046, 0x0056, 0x00f6, 0x2079,
- 0x0200, 0x2019, 0xfffe, 0x7c30, 0x0050, 0x0036, 0x0046, 0x0056,
- 0x00f6, 0x2079, 0x0200, 0x7d44, 0x7c40, 0x2019, 0xffff, 0x2001,
- 0x1810, 0x2004, 0xd08c, 0x0160, 0x2001, 0x1800, 0x2004, 0x9086,
- 0x0003, 0x1130, 0x0026, 0x2011, 0x8048, 0x080c, 0x48fa, 0x002e,
- 0x00fe, 0x005e, 0x004e, 0x003e, 0x0005, 0x00b6, 0x00c6, 0x7010,
- 0x9084, 0xff00, 0x8007, 0x9096, 0x0001, 0x0120, 0x9096, 0x0023,
- 0x1904, 0x7ce5, 0x9186, 0x0023, 0x15c0, 0x080c, 0x7f80, 0x0904,
- 0x7ce5, 0x6120, 0x9186, 0x0001, 0x0150, 0x9186, 0x0004, 0x0138,
- 0x9186, 0x0008, 0x0120, 0x9186, 0x000a, 0x1904, 0x7ce5, 0x7124,
- 0x610a, 0x7030, 0x908e, 0x0200, 0x1130, 0x2009, 0x0015, 0x080c,
- 0x9c82, 0x0804, 0x7ce5, 0x908e, 0x0214, 0x0118, 0x908e, 0x0210,
- 0x1130, 0x2009, 0x0015, 0x080c, 0x9c82, 0x0804, 0x7ce5, 0x908e,
- 0x0100, 0x1904, 0x7ce5, 0x7034, 0x9005, 0x1904, 0x7ce5, 0x2009,
- 0x0016, 0x080c, 0x9c82, 0x0804, 0x7ce5, 0x9186, 0x0022, 0x1904,
- 0x7ce5, 0x7030, 0x908e, 0x0300, 0x1580, 0x68d8, 0xd0a4, 0x0528,
- 0xc0b5, 0x68da, 0x7100, 0x918c, 0x00ff, 0x697a, 0x7004, 0x687e,
- 0x00f6, 0x2079, 0x0100, 0x79e6, 0x78ea, 0x0006, 0x9084, 0x00ff,
- 0x0016, 0x2008, 0x080c, 0x24a2, 0x7932, 0x7936, 0x001e, 0x000e,
- 0x00fe, 0x080c, 0x2459, 0x695a, 0x703c, 0x00e6, 0x2071, 0x0140,
- 0x7086, 0x2071, 0x1800, 0x70b2, 0x00ee, 0x7034, 0x9005, 0x1904,
- 0x7ce5, 0x2009, 0x0017, 0x0804, 0x7c95, 0x908e, 0x0400, 0x1190,
- 0x7034, 0x9005, 0x1904, 0x7ce5, 0x080c, 0x70ba, 0x0120, 0x2009,
- 0x001d, 0x0804, 0x7c95, 0x68d8, 0xc0a5, 0x68da, 0x2009, 0x0030,
- 0x0804, 0x7c95, 0x908e, 0x0500, 0x1140, 0x7034, 0x9005, 0x1904,
- 0x7ce5, 0x2009, 0x0018, 0x0804, 0x7c95, 0x908e, 0x2010, 0x1120,
- 0x2009, 0x0019, 0x0804, 0x7c95, 0x908e, 0x2110, 0x1120, 0x2009,
- 0x001a, 0x0804, 0x7c95, 0x908e, 0x5200, 0x1140, 0x7034, 0x9005,
- 0x1904, 0x7ce5, 0x2009, 0x001b, 0x0804, 0x7c95, 0x908e, 0x5000,
- 0x1140, 0x7034, 0x9005, 0x1904, 0x7ce5, 0x2009, 0x001c, 0x0804,
- 0x7c95, 0x908e, 0x1300, 0x1120, 0x2009, 0x0034, 0x0804, 0x7c95,
- 0x908e, 0x1200, 0x1140, 0x7034, 0x9005, 0x1904, 0x7ce5, 0x2009,
- 0x0024, 0x0804, 0x7c95, 0x908c, 0xff00, 0x918e, 0x2400, 0x1170,
- 0x2009, 0x002d, 0x2001, 0x1810, 0x2004, 0xd09c, 0x0904, 0x7c95,
- 0x080c, 0xc66b, 0x1904, 0x7ce5, 0x0804, 0x7c93, 0x908c, 0xff00,
- 0x918e, 0x5300, 0x1120, 0x2009, 0x002a, 0x0804, 0x7c95, 0x908e,
- 0x0f00, 0x1120, 0x2009, 0x0020, 0x0804, 0x7c95, 0x908e, 0x6104,
- 0x1528, 0x2029, 0x0205, 0x2011, 0x026d, 0x8208, 0x2204, 0x9082,
- 0x0004, 0x8004, 0x8004, 0x20a8, 0x2011, 0x8015, 0x211c, 0x8108,
- 0x0046, 0x2124, 0x080c, 0x48fa, 0x004e, 0x8108, 0x0f04, 0x7c61,
- 0x9186, 0x0280, 0x1d88, 0x2504, 0x8000, 0x202a, 0x2009, 0x0260,
- 0x0c58, 0x202b, 0x0000, 0x2009, 0x0023, 0x0478, 0x908e, 0x6000,
- 0x1118, 0x2009, 0x003f, 0x0448, 0x908e, 0x7800, 0x1118, 0x2009,
- 0x0045, 0x0418, 0x908e, 0x1000, 0x1118, 0x2009, 0x004e, 0x00e8,
- 0x908e, 0x6300, 0x1118, 0x2009, 0x004a, 0x00b8, 0x908c, 0xff00,
- 0x918e, 0x5600, 0x1118, 0x2009, 0x004f, 0x0078, 0x908c, 0xff00,
- 0x918e, 0x5700, 0x1118, 0x2009, 0x0050, 0x0038, 0x2009, 0x001d,
- 0x6838, 0xd0d4, 0x0110, 0x2009, 0x004c, 0x0016, 0x2011, 0x0263,
- 0x2204, 0x8211, 0x220c, 0x080c, 0x2459, 0x1904, 0x7ce8, 0x080c,
- 0x622f, 0x1904, 0x7ce8, 0xbe12, 0xbd16, 0x001e, 0x0016, 0x080c,
- 0x70ba, 0x01c0, 0x68d8, 0xd08c, 0x1148, 0x7000, 0x9084, 0x00ff,
- 0x1188, 0x7004, 0x9084, 0xff00, 0x1168, 0x0040, 0x6878, 0x9606,
- 0x1148, 0x687c, 0x9506, 0x9084, 0xff00, 0x1120, 0x9584, 0x00ff,
- 0xb886, 0x0080, 0xb884, 0x9005, 0x1168, 0x9186, 0x0046, 0x1150,
- 0x6878, 0x9606, 0x1138, 0x687c, 0x9506, 0x9084, 0xff00, 0x1110,
- 0x001e, 0x0098, 0x080c, 0x9b90, 0x01a8, 0x2b08, 0x6112, 0x6023,
- 0x0004, 0x7120, 0x610a, 0x001e, 0x9186, 0x004c, 0x1110, 0x6023,
- 0x000a, 0x0016, 0x001e, 0x080c, 0x9c82, 0x00ce, 0x00be, 0x0005,
- 0x001e, 0x0cd8, 0x2001, 0x180e, 0x2004, 0xd0ec, 0x0120, 0x2011,
- 0x8049, 0x080c, 0x48fa, 0x080c, 0x9c55, 0x0d90, 0x2b08, 0x6112,
- 0x6023, 0x0004, 0x7120, 0x610a, 0x001e, 0x0016, 0x9186, 0x0017,
- 0x0118, 0x9186, 0x0030, 0x1128, 0x6007, 0x0009, 0x6017, 0x2900,
- 0x0020, 0x6007, 0x0051, 0x6017, 0x0000, 0x602f, 0x0009, 0x6003,
- 0x0001, 0x080c, 0x84ee, 0x08a0, 0x080c, 0x3164, 0x1140, 0x7010,
- 0x9084, 0xff00, 0x8007, 0x908e, 0x0008, 0x1108, 0x0009, 0x0005,
- 0x00b6, 0x00c6, 0x0046, 0x7000, 0x908c, 0xff00, 0x810f, 0x9186,
- 0x0033, 0x11e8, 0x080c, 0x7f80, 0x0904, 0x7d6f, 0x7124, 0x610a,
- 0x7030, 0x908e, 0x0200, 0x1140, 0x7034, 0x9005, 0x15c0, 0x2009,
- 0x0015, 0x080c, 0x9c82, 0x0498, 0x908e, 0x0100, 0x1580, 0x7034,
- 0x9005, 0x1568, 0x2009, 0x0016, 0x080c, 0x9c82, 0x0440, 0x9186,
- 0x0032, 0x1528, 0x7030, 0x908e, 0x1400, 0x1508, 0x2009, 0x0038,
- 0x0016, 0x2011, 0x0263, 0x2204, 0x8211, 0x220c, 0x080c, 0x2459,
- 0x11a8, 0x080c, 0x622f, 0x1190, 0xbe12, 0xbd16, 0x080c, 0x9b90,
- 0x0168, 0x2b08, 0x6112, 0x080c, 0xbd09, 0x6023, 0x0004, 0x7120,
- 0x610a, 0x001e, 0x080c, 0x9c82, 0x0010, 0x00ce, 0x001e, 0x004e,
- 0x00ce, 0x00be, 0x0005, 0x00b6, 0x0046, 0x00e6, 0x00d6, 0x2028,
- 0x2130, 0x9696, 0x00ff, 0x11b8, 0x9592, 0xfffc, 0x02a0, 0x9596,
- 0xfffd, 0x1120, 0x2009, 0x007f, 0x0804, 0x7dd1, 0x9596, 0xfffe,
- 0x1120, 0x2009, 0x007e, 0x0804, 0x7dd1, 0x9596, 0xfffc, 0x1118,
- 0x2009, 0x0080, 0x04f0, 0x2011, 0x0000, 0x2019, 0x1836, 0x231c,
- 0xd3ac, 0x0130, 0x9026, 0x20a9, 0x0800, 0x2071, 0x1000, 0x0030,
- 0x2021, 0x0081, 0x20a9, 0x077f, 0x2071, 0x1081, 0x2e1c, 0x93dd,
- 0x0000, 0x1140, 0x82ff, 0x11d0, 0x9496, 0x00ff, 0x01b8, 0x2410,
- 0xc2fd, 0x00a0, 0xbf10, 0x2600, 0x9706, 0xb814, 0x1120, 0x9546,
- 0x1110, 0x2408, 0x00b0, 0x9745, 0x1148, 0x94c6, 0x007e, 0x0130,
- 0x94c6, 0x007f, 0x0118, 0x94c6, 0x0080, 0x1d20, 0x8420, 0x8e70,
- 0x1f04, 0x7da6, 0x82ff, 0x1118, 0x9085, 0x0001, 0x0018, 0xc2fc,
- 0x2208, 0x9006, 0x00de, 0x00ee, 0x004e, 0x00be, 0x0005, 0x7000,
- 0x908c, 0xff00, 0x810f, 0x9184, 0x000f, 0x0002, 0x7dee, 0x7dee,
- 0x7dee, 0x7f92, 0x7dee, 0x7df1, 0x7e16, 0x7e9f, 0x7dee, 0x7dee,
- 0x7dee, 0x7dee, 0x7dee, 0x7dee, 0x7dee, 0x7dee, 0x7817, 0x0140,
- 0x0005, 0x00b6, 0x7110, 0xd1bc, 0x01e8, 0x7120, 0x2160, 0x9c8c,
- 0x0003, 0x11c0, 0x9c8a, 0x1ddc, 0x02a8, 0x6864, 0x9c02, 0x1290,
- 0x7008, 0x9084, 0x00ff, 0x6110, 0x2158, 0xb910, 0x9106, 0x1150,
- 0x700c, 0xb914, 0x9106, 0x1130, 0x7124, 0x610a, 0x2009, 0x0046,
- 0x080c, 0x9c82, 0x7817, 0x0140, 0x00be, 0x0005, 0x00b6, 0x00c6,
- 0x9484, 0x0fff, 0x0904, 0x7e7b, 0x7110, 0xd1bc, 0x1904, 0x7e7b,
- 0x7108, 0x700c, 0x2028, 0x918c, 0x00ff, 0x2130, 0x9094, 0xff00,
- 0x15c8, 0x81ff, 0x15b8, 0x9080, 0x319f, 0x200d, 0x918c, 0xff00,
- 0x810f, 0x2001, 0x0080, 0x9106, 0x0904, 0x7e7b, 0x9182, 0x0801,
- 0x1a04, 0x7e7b, 0x9190, 0x1000, 0x2204, 0x905d, 0x05e0, 0xbe12,
- 0xbd16, 0xb800, 0xd0ec, 0x15b8, 0xba04, 0x9294, 0xff00, 0x9286,
- 0x0600, 0x1190, 0x080c, 0x9b90, 0x0598, 0x2b08, 0x7028, 0x6052,
- 0x702c, 0x604e, 0x6112, 0x6023, 0x0006, 0x7120, 0x610a, 0x7130,
- 0x615e, 0x080c, 0xc8d2, 0x00f8, 0x080c, 0x668a, 0x1138, 0xb807,
- 0x0606, 0x0c40, 0x190c, 0x7d73, 0x11b0, 0x0880, 0x080c, 0x9b90,
- 0x2b08, 0x0188, 0x6112, 0x6023, 0x0004, 0x7120, 0x610a, 0x9286,
- 0x0400, 0x1118, 0x6007, 0x0005, 0x0010, 0x6007, 0x0001, 0x6003,
- 0x0001, 0x080c, 0x84ee, 0x7817, 0x0140, 0x00ce, 0x00be, 0x0005,
- 0x2001, 0x180e, 0x2004, 0xd0ec, 0x0120, 0x2011, 0x8049, 0x080c,
- 0x48fa, 0x080c, 0x9c55, 0x0d78, 0x2b08, 0x6112, 0x6023, 0x0006,
- 0x7120, 0x610a, 0x7130, 0x615e, 0x6017, 0xf300, 0x6003, 0x0001,
- 0x6007, 0x0041, 0x2009, 0xa022, 0x080c, 0x84e7, 0x08e0, 0x00b6,
- 0x7110, 0xd1bc, 0x05d0, 0x7020, 0x2060, 0x9c84, 0x0003, 0x15a8,
- 0x9c82, 0x1ddc, 0x0690, 0x6864, 0x9c02, 0x1678, 0x9484, 0x0fff,
- 0x9082, 0x000c, 0x0650, 0x7008, 0x9084, 0x00ff, 0x6110, 0x2158,
- 0xb910, 0x9106, 0x1510, 0x700c, 0xb914, 0x9106, 0x11f0, 0x7124,
- 0x610a, 0x601c, 0xd0fc, 0x11c8, 0x2001, 0x0271, 0x2004, 0x9005,
- 0x1180, 0x9484, 0x0fff, 0x9082, 0x000c, 0x0158, 0x0066, 0x2031,
- 0x0100, 0xa001, 0xa001, 0x8631, 0x1de0, 0x006e, 0x601c, 0xd0fc,
- 0x1120, 0x2009, 0x0045, 0x080c, 0x9c82, 0x7817, 0x0140, 0x00be,
- 0x0005, 0x6120, 0x9186, 0x0002, 0x0128, 0x9186, 0x0005, 0x0110,
- 0x9085, 0x0001, 0x0005, 0x080c, 0x3164, 0x1168, 0x7010, 0x9084,
- 0xff00, 0x8007, 0x9086, 0x0000, 0x1130, 0x9184, 0x000f, 0x908a,
- 0x0006, 0x1208, 0x000b, 0x0005, 0x7f02, 0x7f03, 0x7f02, 0x7f02,
- 0x7f62, 0x7f71, 0x0005, 0x00b6, 0x7110, 0xd1bc, 0x0120, 0x702c,
- 0xd084, 0x0904, 0x7f60, 0x700c, 0x7108, 0x080c, 0x2459, 0x1904,
- 0x7f60, 0x080c, 0x622f, 0x1904, 0x7f60, 0xbe12, 0xbd16, 0x7110,
- 0xd1bc, 0x01d8, 0x080c, 0x668a, 0x0118, 0x9086, 0x0004, 0x1588,
- 0x00c6, 0x080c, 0x7f80, 0x00ce, 0x05d8, 0x080c, 0x9b90, 0x2b08,
- 0x05b8, 0x6112, 0x080c, 0xbd09, 0x6023, 0x0002, 0x7120, 0x610a,
- 0x2009, 0x0088, 0x080c, 0x9c82, 0x0458, 0x080c, 0x668a, 0x0148,
- 0x9086, 0x0004, 0x0130, 0x080c, 0x6692, 0x0118, 0x9086, 0x0004,
- 0x1180, 0x080c, 0x9b90, 0x2b08, 0x01d8, 0x6112, 0x080c, 0xbd09,
- 0x6023, 0x0005, 0x7120, 0x610a, 0x2009, 0x0088, 0x080c, 0x9c82,
- 0x0078, 0x080c, 0x9b90, 0x2b08, 0x0158, 0x6112, 0x080c, 0xbd09,
- 0x6023, 0x0004, 0x7120, 0x610a, 0x2009, 0x0001, 0x080c, 0x9c82,
- 0x00be, 0x0005, 0x7110, 0xd1bc, 0x0158, 0x00d1, 0x0148, 0x080c,
- 0x7ee1, 0x1130, 0x7124, 0x610a, 0x2009, 0x0089, 0x080c, 0x9c82,
- 0x0005, 0x7110, 0xd1bc, 0x0158, 0x0059, 0x0148, 0x080c, 0x7ee1,
- 0x1130, 0x7124, 0x610a, 0x2009, 0x008a, 0x080c, 0x9c82, 0x0005,
- 0x7020, 0x2060, 0x9c84, 0x0003, 0x1158, 0x9c82, 0x1ddc, 0x0240,
- 0x2001, 0x1819, 0x2004, 0x9c02, 0x1218, 0x9085, 0x0001, 0x0005,
- 0x9006, 0x0ce8, 0x00b6, 0x7110, 0xd1bc, 0x11d8, 0x7024, 0x2060,
- 0x9c84, 0x0003, 0x11b0, 0x9c82, 0x1ddc, 0x0298, 0x6864, 0x9c02,
- 0x1280, 0x7008, 0x9084, 0x00ff, 0x6110, 0x2158, 0xb910, 0x9106,
- 0x1140, 0x700c, 0xb914, 0x9106, 0x1120, 0x2009, 0x0051, 0x080c,
- 0x9c82, 0x7817, 0x0140, 0x00be, 0x0005, 0x2031, 0x0105, 0x0069,
- 0x0005, 0x2031, 0x0206, 0x0049, 0x0005, 0x2031, 0x0207, 0x0029,
- 0x0005, 0x2031, 0x0213, 0x0009, 0x0005, 0x00c6, 0x0096, 0x00f6,
- 0x7000, 0x9084, 0xf000, 0x9086, 0xc000, 0x05c0, 0x080c, 0x9b90,
- 0x05a8, 0x0066, 0x00c6, 0x0046, 0x2011, 0x0263, 0x2204, 0x8211,
- 0x220c, 0x080c, 0x2459, 0x1590, 0x080c, 0x622f, 0x1578, 0xbe12,
- 0xbd16, 0x2b00, 0x004e, 0x00ce, 0x6012, 0x080c, 0xbd09, 0x080c,
- 0x102f, 0x0500, 0x2900, 0x6062, 0x9006, 0xa802, 0xa866, 0xac6a,
- 0xa85c, 0x90f8, 0x001b, 0x20a9, 0x000e, 0xa860, 0x20e8, 0x20e1,
- 0x0000, 0x2fa0, 0x2e98, 0x4003, 0x006e, 0x6616, 0x6007, 0x003e,
- 0x6023, 0x0001, 0x6003, 0x0001, 0x080c, 0x84ee, 0x00fe, 0x009e,
- 0x00ce, 0x0005, 0x080c, 0x9be6, 0x006e, 0x0cc0, 0x004e, 0x00ce,
- 0x0cc8, 0x00c6, 0x7000, 0x908c, 0xff00, 0x9184, 0xf000, 0x810f,
- 0x9086, 0x2000, 0x1904, 0x8068, 0x9186, 0x0022, 0x15f0, 0x2001,
- 0x0111, 0x2004, 0x9005, 0x1904, 0x806a, 0x7030, 0x908e, 0x0400,
- 0x0904, 0x806a, 0x908e, 0x6000, 0x05e8, 0x908e, 0x5400, 0x05d0,
- 0x908e, 0x0300, 0x11d8, 0x2009, 0x1836, 0x210c, 0xd18c, 0x1590,
- 0xd1a4, 0x1580, 0x080c, 0x6648, 0x0588, 0x68ac, 0x9084, 0x00ff,
- 0x7100, 0x918c, 0x00ff, 0x9106, 0x1518, 0x687c, 0x69ac, 0x918c,
- 0xff00, 0x9105, 0x7104, 0x9106, 0x11d8, 0x00e0, 0x2009, 0x0103,
- 0x210c, 0xd1b4, 0x11a8, 0x908e, 0x5200, 0x09e8, 0x908e, 0x0500,
- 0x09d0, 0x908e, 0x5000, 0x09b8, 0x0058, 0x9186, 0x0023, 0x1140,
- 0x080c, 0x7f80, 0x0128, 0x6004, 0x9086, 0x0002, 0x0118, 0x0000,
- 0x9006, 0x0010, 0x9085, 0x0001, 0x00ce, 0x0005, 0x7030, 0x908e,
- 0x0300, 0x0118, 0x908e, 0x5200, 0x1d98, 0x2001, 0x1836, 0x2004,
- 0x9084, 0x0009, 0x9086, 0x0008, 0x0d68, 0x0c50, 0x00f6, 0x2079,
- 0x0200, 0x7800, 0xc0e5, 0xc0cc, 0x7802, 0x00fe, 0x0005, 0x00f6,
- 0x2079, 0x1800, 0x7834, 0xd084, 0x1130, 0x2079, 0x0200, 0x7800,
- 0x9085, 0x1200, 0x7802, 0x00fe, 0x0005, 0x00e6, 0x2071, 0x1800,
- 0x7034, 0xc084, 0x7036, 0x00ee, 0x0005, 0x2071, 0x19db, 0x7003,
- 0x0003, 0x700f, 0x0361, 0x9006, 0x701a, 0x7072, 0x7012, 0x7017,
- 0x1ddc, 0x7007, 0x0000, 0x7026, 0x702b, 0x8ff0, 0x7032, 0x7037,
- 0x906d, 0x703f, 0xffff, 0x7042, 0x7047, 0x523f, 0x704a, 0x705b,
- 0x8239, 0x080c, 0x1048, 0x090c, 0x0d65, 0x2900, 0x703a, 0xa867,
- 0x0003, 0xa86f, 0x0100, 0xa8ab, 0xdcb0, 0x0005, 0x2071, 0x19db,
- 0x1d04, 0x815b, 0x2091, 0x6000, 0x700c, 0x8001, 0x700e, 0x1560,
- 0x2001, 0x187d, 0x2004, 0xd0c4, 0x0158, 0x3a00, 0xd08c, 0x1140,
- 0x20d1, 0x0000, 0x20d1, 0x0001, 0x20d1, 0x0000, 0x080c, 0x0d65,
- 0x700f, 0x0361, 0x7007, 0x0001, 0x0126, 0x2091, 0x8000, 0x2069,
- 0x1800, 0x69e8, 0xd1e4, 0x1138, 0xd1dc, 0x1118, 0x080c, 0x82a7,
- 0x0010, 0x080c, 0x827e, 0x7040, 0x900d, 0x0148, 0x8109, 0x7142,
- 0x1130, 0x7044, 0x080f, 0x0018, 0x0126, 0x2091, 0x8000, 0x7024,
- 0x900d, 0x0188, 0x7020, 0x8001, 0x7022, 0x1168, 0x7023, 0x0009,
- 0x8109, 0x7126, 0x9186, 0x03e8, 0x1110, 0x7028, 0x080f, 0x81ff,
- 0x1110, 0x7028, 0x080f, 0x7030, 0x900d, 0x0180, 0x702c, 0x8001,
- 0x702e, 0x1160, 0x702f, 0x0009, 0x8109, 0x7132, 0x0128, 0x9184,
- 0x007f, 0x090c, 0x90f5, 0x0010, 0x7034, 0x080f, 0x703c, 0x9005,
- 0x0118, 0x0310, 0x8001, 0x703e, 0x704c, 0x900d, 0x0168, 0x7048,
- 0x8001, 0x704a, 0x1148, 0x704b, 0x0009, 0x8109, 0x714e, 0x1120,
- 0x7150, 0x714e, 0x7058, 0x080f, 0x7018, 0x900d, 0x01d8, 0x0016,
- 0x7070, 0x900d, 0x0158, 0x706c, 0x8001, 0x706e, 0x1138, 0x706f,
- 0x0009, 0x8109, 0x7172, 0x1110, 0x7074, 0x080f, 0x001e, 0x7008,
- 0x8001, 0x700a, 0x1138, 0x700b, 0x0009, 0x8109, 0x711a, 0x1110,
- 0x701c, 0x080f, 0x012e, 0x7004, 0x0002, 0x8183, 0x8184, 0x81ae,
- 0x00e6, 0x2071, 0x19db, 0x7018, 0x9005, 0x1120, 0x711a, 0x721e,
- 0x700b, 0x0009, 0x00ee, 0x0005, 0x00e6, 0x0006, 0x2071, 0x19db,
- 0x701c, 0x9206, 0x1120, 0x701a, 0x701e, 0x7072, 0x7076, 0x000e,
- 0x00ee, 0x0005, 0x00e6, 0x2071, 0x19db, 0xb888, 0x9102, 0x0208,
- 0xb98a, 0x00ee, 0x0005, 0x0005, 0x00b6, 0x2031, 0x0010, 0x7110,
- 0x080c, 0x628f, 0x11a8, 0xb888, 0x8001, 0x0290, 0xb88a, 0x1180,
- 0x0126, 0x2091, 0x8000, 0x0066, 0xb8c0, 0x9005, 0x0138, 0x0026,
- 0xba3c, 0x0016, 0x080c, 0x63ba, 0x001e, 0x002e, 0x006e, 0x012e,
- 0x8108, 0x9182, 0x0800, 0x1220, 0x8631, 0x0128, 0x7112, 0x0c00,
- 0x900e, 0x7007, 0x0002, 0x7112, 0x00be, 0x0005, 0x2031, 0x0010,
- 0x7014, 0x2060, 0x0126, 0x2091, 0x8000, 0x6048, 0x9005, 0x0128,
- 0x8001, 0x604a, 0x1110, 0x080c, 0xbb8a, 0x6018, 0x9005, 0x0904,
- 0x8200, 0x00f6, 0x2079, 0x0300, 0x7918, 0xd1b4, 0x1904, 0x8213,
- 0x781b, 0x2020, 0xa001, 0x7918, 0xd1b4, 0x0120, 0x781b, 0x2000,
- 0x0804, 0x8213, 0x8001, 0x601a, 0x0106, 0x781b, 0x2000, 0xa001,
- 0x7918, 0xd1ac, 0x1dd0, 0x010e, 0x00fe, 0x1510, 0x6120, 0x9186,
- 0x0003, 0x0118, 0x9186, 0x0006, 0x11c8, 0x080c, 0xb870, 0x01b0,
- 0x6014, 0x2048, 0xa884, 0x908a, 0x199a, 0x0280, 0x9082, 0x1999,
- 0xa886, 0x908a, 0x199a, 0x0210, 0x2001, 0x1999, 0x8003, 0x800b,
- 0x810b, 0x9108, 0x611a, 0x080c, 0xbfbb, 0x0110, 0x080c, 0xb551,
- 0x012e, 0x9c88, 0x001c, 0x7116, 0x2001, 0x1819, 0x2004, 0x9102,
- 0x1228, 0x8631, 0x0138, 0x2160, 0x0804, 0x81b2, 0x7017, 0x1ddc,
- 0x7007, 0x0000, 0x0005, 0x00fe, 0x0c58, 0x00e6, 0x2071, 0x19db,
- 0x7027, 0x07d0, 0x7023, 0x0009, 0x00ee, 0x0005, 0x2001, 0x19e4,
- 0x2003, 0x0000, 0x0005, 0x00e6, 0x2071, 0x19db, 0x7132, 0x702f,
- 0x0009, 0x00ee, 0x0005, 0x2011, 0x19e7, 0x2013, 0x0000, 0x0005,
- 0x00e6, 0x2071, 0x19db, 0x711a, 0x721e, 0x700b, 0x0009, 0x00ee,
- 0x0005, 0x0086, 0x0026, 0x7054, 0x8000, 0x7056, 0x2001, 0x19e9,
- 0x2044, 0xa06c, 0x9086, 0x0000, 0x0150, 0x7068, 0xa09a, 0x7064,
- 0xa096, 0x7060, 0xa092, 0x705c, 0xa08e, 0x080c, 0x1124, 0x002e,
- 0x008e, 0x0005, 0x0006, 0x0016, 0x0096, 0x00a6, 0x00b6, 0x00c6,
- 0x00d6, 0x00e6, 0x00f6, 0x0156, 0x080c, 0x80c6, 0x015e, 0x00fe,
- 0x00ee, 0x00de, 0x00ce, 0x00be, 0x00ae, 0x009e, 0x001e, 0x000e,
- 0x0005, 0x00e6, 0x2071, 0x19db, 0x7172, 0x7276, 0x706f, 0x0009,
- 0x00ee, 0x0005, 0x00e6, 0x0006, 0x2071, 0x19db, 0x7074, 0x9206,
- 0x1110, 0x7072, 0x7076, 0x000e, 0x00ee, 0x0005, 0x2069, 0x1800,
- 0x69e8, 0xd1e4, 0x1518, 0x0026, 0xd1ec, 0x0140, 0x6a50, 0x6870,
- 0x9202, 0x0288, 0x8117, 0x9294, 0x00c1, 0x0088, 0x9184, 0x0007,
- 0x01a0, 0x8109, 0x9184, 0x0007, 0x0110, 0x69ea, 0x0070, 0x8107,
- 0x9084, 0x0007, 0x910d, 0x8107, 0x9106, 0x9094, 0x00c1, 0x9184,
- 0xff3e, 0x9205, 0x68ea, 0x080c, 0x0efa, 0x002e, 0x0005, 0x69e4,
- 0x9184, 0x003f, 0x05b8, 0x8109, 0x9184, 0x003f, 0x01a8, 0x6a50,
- 0x6870, 0x9202, 0x0220, 0xd1bc, 0x0168, 0xc1bc, 0x0018, 0xd1bc,
- 0x1148, 0xc1bd, 0x2110, 0x00e6, 0x2071, 0x1800, 0x080c, 0x0f1c,
- 0x00ee, 0x0400, 0x69e6, 0x00f0, 0x0026, 0x8107, 0x9094, 0x0007,
- 0x0128, 0x8001, 0x8007, 0x9085, 0x0007, 0x0050, 0x2010, 0x8004,
- 0x8004, 0x8004, 0x9084, 0x0007, 0x9205, 0x8007, 0x9085, 0x0028,
- 0x9086, 0x0040, 0x2010, 0x00e6, 0x2071, 0x1800, 0x080c, 0x0f1c,
- 0x00ee, 0x002e, 0x0005, 0x00c6, 0x2061, 0x1a46, 0x00ce, 0x0005,
- 0x9184, 0x000f, 0x8003, 0x8003, 0x8003, 0x9080, 0x1a46, 0x2060,
- 0x0005, 0xa884, 0x908a, 0x199a, 0x1638, 0x9005, 0x1150, 0x00c6,
- 0x2061, 0x1a46, 0x6014, 0x00ce, 0x9005, 0x1130, 0x2001, 0x001e,
- 0x0018, 0x908e, 0xffff, 0x01b0, 0x8003, 0x800b, 0x810b, 0x9108,
- 0x611a, 0xa87c, 0x908c, 0x00c0, 0x918e, 0x00c0, 0x0904, 0x83ab,
- 0xd0b4, 0x1168, 0xd0bc, 0x1904, 0x8384, 0x2009, 0x0006, 0x080c,
- 0x83d8, 0x0005, 0x900e, 0x0c60, 0x2001, 0x1999, 0x08b0, 0xd0fc,
- 0x05e0, 0x908c, 0x2023, 0x1568, 0x87ff, 0x1558, 0xa9a8, 0x81ff,
- 0x1540, 0x6124, 0x918c, 0x0500, 0x1520, 0x6100, 0x918e, 0x0007,
- 0x1500, 0x2009, 0x187d, 0x210c, 0xd184, 0x11d8, 0x6003, 0x0003,
- 0x6007, 0x0043, 0x6047, 0xb035, 0x080c, 0x1aca, 0xa87c, 0xc0dd,
- 0xa87e, 0x600f, 0x0000, 0x00f6, 0x2079, 0x0380, 0x7818, 0xd0bc,
- 0x1de8, 0x7833, 0x0013, 0x2c00, 0x7836, 0x781b, 0x8080, 0x00fe,
- 0x0005, 0x908c, 0x0003, 0x0120, 0x918e, 0x0003, 0x1904, 0x83d2,
- 0x908c, 0x2020, 0x918e, 0x2020, 0x01a8, 0x6024, 0xd0d4, 0x11e8,
- 0x2009, 0x187d, 0x2104, 0xd084, 0x1138, 0x87ff, 0x1120, 0x2009,
- 0x0043, 0x0804, 0x9c82, 0x0005, 0x87ff, 0x1de8, 0x2009, 0x0042,
- 0x0804, 0x9c82, 0x6110, 0x00b6, 0x2158, 0xb900, 0x00be, 0xd1ac,
- 0x0d20, 0x6024, 0xc0cd, 0x6026, 0x0c00, 0xc0d4, 0x6026, 0xa890,
- 0x602e, 0xa88c, 0x6032, 0x08e0, 0xd0fc, 0x0160, 0x908c, 0x0003,
- 0x0120, 0x918e, 0x0003, 0x1904, 0x83d2, 0x908c, 0x2020, 0x918e,
- 0x2020, 0x0170, 0x0076, 0x00f6, 0x2c78, 0x080c, 0x1669, 0x00fe,
- 0x007e, 0x87ff, 0x1120, 0x2009, 0x0042, 0x080c, 0x9c82, 0x0005,
- 0x6110, 0x00b6, 0x2158, 0xb900, 0x00be, 0xd1ac, 0x0d58, 0x6124,
- 0xc1cd, 0x6126, 0x0c38, 0xd0fc, 0x0188, 0x908c, 0x2020, 0x918e,
- 0x2020, 0x01a8, 0x9084, 0x0003, 0x908e, 0x0002, 0x0148, 0x87ff,
- 0x1120, 0x2009, 0x0041, 0x080c, 0x9c82, 0x0005, 0x00b9, 0x0ce8,
- 0x87ff, 0x1dd8, 0x2009, 0x0043, 0x080c, 0x9c82, 0x0cb0, 0x6110,
- 0x00b6, 0x2158, 0xb900, 0x00be, 0xd1ac, 0x0d20, 0x6124, 0xc1cd,
- 0x6126, 0x0c00, 0x2009, 0x0004, 0x0019, 0x0005, 0x2009, 0x0001,
- 0x0096, 0x080c, 0xb870, 0x0518, 0x6014, 0x2048, 0xa982, 0xa800,
- 0x6016, 0x9186, 0x0001, 0x1188, 0xa97c, 0x918c, 0x8100, 0x918e,
- 0x8100, 0x1158, 0x00c6, 0x2061, 0x1a46, 0x6200, 0xd28c, 0x1120,
- 0x6204, 0x8210, 0x0208, 0x6206, 0x00ce, 0x080c, 0x67ea, 0x6014,
- 0x904d, 0x0076, 0x2039, 0x0000, 0x190c, 0x82f1, 0x007e, 0x009e,
- 0x0005, 0x0156, 0x00c6, 0x2061, 0x1a46, 0x6000, 0x81ff, 0x0110,
- 0x9205, 0x0008, 0x9204, 0x6002, 0x00ce, 0x015e, 0x0005, 0x6800,
- 0xd08c, 0x1138, 0x6808, 0x9005, 0x0120, 0x8001, 0x680a, 0x9085,
- 0x0001, 0x0005, 0x0126, 0x2091, 0x8000, 0x0036, 0x0046, 0x20a9,
- 0x0010, 0x9006, 0x8004, 0x8086, 0x818e, 0x1208, 0x9200, 0x1f04,
- 0x8423, 0x8086, 0x818e, 0x004e, 0x003e, 0x012e, 0x0005, 0x0126,
- 0x2091, 0x8000, 0x0076, 0x0156, 0x20a9, 0x0010, 0x9005, 0x01c8,
- 0x911a, 0x12b8, 0x8213, 0x818d, 0x0228, 0x911a, 0x1220, 0x1f04,
- 0x843a, 0x0028, 0x911a, 0x2308, 0x8210, 0x1f04, 0x843a, 0x0006,
- 0x3200, 0x9084, 0xefff, 0x2080, 0x000e, 0x015e, 0x007e, 0x012e,
- 0x0005, 0x0006, 0x3200, 0x9085, 0x1000, 0x0ca8, 0x0126, 0x2091,
- 0x2800, 0x2079, 0x19bf, 0x012e, 0x00d6, 0x2069, 0x19bf, 0x6803,
- 0x0005, 0x0156, 0x0146, 0x01d6, 0x20e9, 0x0000, 0x2069, 0x0200,
- 0x080c, 0x97f4, 0x04a9, 0x080c, 0x97df, 0x0491, 0x080c, 0x97e2,
- 0x0479, 0x080c, 0x97e5, 0x0461, 0x080c, 0x97e8, 0x0449, 0x080c,
- 0x97eb, 0x0431, 0x080c, 0x97ee, 0x0419, 0x080c, 0x97f1, 0x0401,
- 0x01de, 0x014e, 0x015e, 0x6857, 0x0000, 0x00f6, 0x2079, 0x0380,
- 0x00f9, 0x7807, 0x0003, 0x7803, 0x0000, 0x7803, 0x0001, 0x2069,
- 0x0004, 0x2d04, 0x9084, 0xfffe, 0x9085, 0x8000, 0x206a, 0x2069,
- 0x0100, 0x6828, 0x9084, 0xfffc, 0x682a, 0x00fe, 0x00de, 0x0005,
- 0x20a9, 0x0020, 0x20a1, 0x0240, 0x2001, 0x0000, 0x4004, 0x0005,
- 0x00c6, 0x7803, 0x0000, 0x9006, 0x7827, 0x0030, 0x782b, 0x0400,
- 0x7827, 0x0031, 0x782b, 0x1ac6, 0x781f, 0xff00, 0x781b, 0xff00,
- 0x2061, 0x1abb, 0x602f, 0x19bf, 0x6033, 0x1800, 0x6037, 0x19db,
- 0x603b, 0x1d1c, 0x603f, 0x1d2c, 0x6042, 0x6047, 0x1a91, 0x00ce,
- 0x0005, 0x2001, 0x0382, 0x2004, 0x9084, 0x0007, 0x9086, 0x0001,
- 0x01b0, 0x00c6, 0x6146, 0x600f, 0x0000, 0x2c08, 0x2061, 0x19bf,
- 0x602c, 0x8000, 0x602e, 0x601c, 0x9005, 0x0130, 0x9080, 0x0003,
- 0x2102, 0x611e, 0x00ce, 0x0005, 0x6122, 0x611e, 0x0cd8, 0x6146,
- 0x2c08, 0x2001, 0x0012, 0x080c, 0x98b8, 0x0005, 0x0016, 0x2009,
- 0x8020, 0x6146, 0x2c08, 0x2001, 0x0382, 0x2004, 0x9084, 0x0007,
- 0x9086, 0x0001, 0x1128, 0x2001, 0x0019, 0x080c, 0x98b8, 0x0088,
- 0x00c6, 0x2061, 0x19bf, 0x602c, 0x8000, 0x602e, 0x600c, 0x9005,
- 0x0128, 0x9080, 0x0003, 0x2102, 0x610e, 0x0010, 0x6112, 0x610e,
- 0x00ce, 0x001e, 0x0005, 0x2001, 0x0382, 0x2004, 0x9084, 0x0007,
- 0x9086, 0x0001, 0x0198, 0x00c6, 0x6146, 0x600f, 0x0000, 0x2c08,
- 0x2061, 0x19bf, 0x6044, 0x9005, 0x0130, 0x9080, 0x0003, 0x2102,
- 0x6146, 0x00ce, 0x0005, 0x614a, 0x6146, 0x0cd8, 0x6146, 0x600f,
- 0x0000, 0x2c08, 0x2001, 0x0013, 0x080c, 0x98b8, 0x0005, 0x6044,
- 0xd0dc, 0x0110, 0x080c, 0x948d, 0x0005, 0x00f6, 0x00e6, 0x00d6,
- 0x00c6, 0x00b6, 0x0096, 0x0076, 0x0066, 0x0056, 0x0036, 0x0026,
- 0x0016, 0x0006, 0x0126, 0x902e, 0x2071, 0x19bf, 0x7648, 0x2660,
- 0x2678, 0x2091, 0x8000, 0x8cff, 0x0904, 0x85ba, 0x6010, 0x2058,
- 0xb8a0, 0x9206, 0x1904, 0x85b5, 0x87ff, 0x0120, 0x605c, 0x9106,
- 0x1904, 0x85b5, 0x704c, 0x9c06, 0x1178, 0x0036, 0x2019, 0x0001,
- 0x080c, 0x929d, 0x703f, 0x0000, 0x9006, 0x704e, 0x706a, 0x7052,
- 0x706e, 0x003e, 0x2029, 0x0001, 0x0811, 0x7048, 0x9c36, 0x1110,
- 0x660c, 0x764a, 0x7044, 0x9c36, 0x1140, 0x2c00, 0x9f36, 0x0118,
- 0x2f00, 0x7046, 0x0010, 0x7047, 0x0000, 0x660c, 0x0066, 0x2c00,
- 0x9f06, 0x0110, 0x7e0e, 0x0008, 0x2678, 0x600f, 0x0000, 0x080c,
- 0xb870, 0x01f0, 0x6014, 0x2048, 0x6020, 0x9086, 0x0003, 0x1588,
- 0x6004, 0x9086, 0x0040, 0x090c, 0x948d, 0xa867, 0x0103, 0xab7a,
- 0xa877, 0x0000, 0x0016, 0x0036, 0x0076, 0x080c, 0xbb73, 0x080c,
- 0xd563, 0x080c, 0x69b5, 0x007e, 0x003e, 0x001e, 0x080c, 0xba5f,
- 0x080c, 0x9c20, 0x00ce, 0x0804, 0x8553, 0x2c78, 0x600c, 0x2060,
- 0x0804, 0x8553, 0x012e, 0x000e, 0x001e, 0x002e, 0x003e, 0x005e,
- 0x006e, 0x007e, 0x009e, 0x00be, 0x00ce, 0x00de, 0x00ee, 0x00fe,
- 0x0005, 0x6020, 0x9086, 0x0006, 0x1158, 0x0016, 0x0036, 0x0076,
- 0x080c, 0xd563, 0x080c, 0xd267, 0x007e, 0x003e, 0x001e, 0x08c0,
- 0x6020, 0x9086, 0x000a, 0x0918, 0x0804, 0x8598, 0x0006, 0x0066,
- 0x0096, 0x00c6, 0x00d6, 0x00f6, 0x9036, 0x0126, 0x2091, 0x8000,
- 0x2079, 0x19bf, 0x7848, 0x9065, 0x0904, 0x8642, 0x600c, 0x0006,
- 0x600f, 0x0000, 0x784c, 0x9c06, 0x11a0, 0x0036, 0x2019, 0x0001,
- 0x080c, 0x929d, 0x783f, 0x0000, 0x901e, 0x7b4e, 0x7b6a, 0x7b52,
- 0x7b6e, 0x003e, 0x000e, 0x9005, 0x1118, 0x600c, 0x600f, 0x0000,
- 0x0006, 0x00e6, 0x2f70, 0x080c, 0x8537, 0x00ee, 0x080c, 0xb870,
- 0x0548, 0x6014, 0x2048, 0x6020, 0x9086, 0x0003, 0x15a8, 0x3e08,
- 0x918e, 0x0002, 0x1188, 0x6010, 0x9005, 0x0170, 0x00b6, 0x2058,
- 0xb800, 0x00be, 0xd0bc, 0x0140, 0x6048, 0x9005, 0x11c0, 0x2001,
- 0x1960, 0x2004, 0x604a, 0x0098, 0x6004, 0x9086, 0x0040, 0x090c,
- 0x948d, 0xa867, 0x0103, 0xab7a, 0xa877, 0x0000, 0x080c, 0x69a9,
- 0x080c, 0xba5f, 0x6044, 0xc0fc, 0x6046, 0x080c, 0x9c20, 0x000e,
- 0x0804, 0x85eb, 0x7e4a, 0x7e46, 0x012e, 0x00fe, 0x00de, 0x00ce,
- 0x009e, 0x006e, 0x000e, 0x0005, 0x6020, 0x9086, 0x0006, 0x1118,
- 0x080c, 0xd267, 0x0c38, 0x6020, 0x9086, 0x000a, 0x09e0, 0x08a0,
- 0x0016, 0x0026, 0x0086, 0x9046, 0x00a9, 0x080c, 0x8749, 0x008e,
- 0x002e, 0x001e, 0x0005, 0x00f6, 0x0126, 0x2079, 0x19bf, 0x2091,
- 0x8000, 0x080c, 0x8792, 0x080c, 0x8826, 0x080c, 0x641c, 0x012e,
- 0x00fe, 0x0005, 0x00b6, 0x0096, 0x00f6, 0x00e6, 0x00d6, 0x00c6,
- 0x0066, 0x0016, 0x0006, 0x0126, 0x2091, 0x8000, 0x2071, 0x19bf,
- 0x7620, 0x2660, 0x2678, 0x8cff, 0x0904, 0x870e, 0x6010, 0x2058,
- 0xb8a0, 0x9206, 0x1904, 0x8709, 0x88ff, 0x0120, 0x605c, 0x9106,
- 0x1904, 0x8709, 0x7030, 0x9c06, 0x1570, 0x2069, 0x0100, 0x6820,
- 0xd0a4, 0x1508, 0x080c, 0x821e, 0x080c, 0x8fd0, 0x68c3, 0x0000,
- 0x080c, 0x948d, 0x7033, 0x0000, 0x0036, 0x2069, 0x0140, 0x6b04,
- 0x9384, 0x1000, 0x0138, 0x2001, 0x0100, 0x080c, 0x2872, 0x9006,
- 0x080c, 0x2872, 0x2069, 0x0100, 0x6824, 0xd084, 0x0110, 0x6827,
- 0x0001, 0x003e, 0x0040, 0x7008, 0xc0ad, 0x700a, 0x6003, 0x0009,
- 0x630a, 0x0804, 0x8709, 0x7020, 0x9c36, 0x1110, 0x660c, 0x7622,
- 0x701c, 0x9c36, 0x1140, 0x2c00, 0x9f36, 0x0118, 0x2f00, 0x701e,
- 0x0010, 0x701f, 0x0000, 0x660c, 0x0066, 0x2c00, 0x9f06, 0x0110,
- 0x7e0e, 0x0008, 0x2678, 0x600f, 0x0000, 0x6044, 0xc0fc, 0x6046,
- 0x6014, 0x2048, 0x080c, 0xb870, 0x01e8, 0x6020, 0x9086, 0x0003,
- 0x1580, 0x080c, 0xba85, 0x1118, 0x080c, 0xa59c, 0x0098, 0xa867,
- 0x0103, 0xab7a, 0xa877, 0x0000, 0x0016, 0x0036, 0x0086, 0x080c,
- 0xbb73, 0x080c, 0xd563, 0x080c, 0x69b5, 0x008e, 0x003e, 0x001e,
- 0x080c, 0xba5f, 0x080c, 0x9c20, 0x080c, 0x9363, 0x00ce, 0x0804,
- 0x8683, 0x2c78, 0x600c, 0x2060, 0x0804, 0x8683, 0x012e, 0x000e,
- 0x001e, 0x006e, 0x00ce, 0x00de, 0x00ee, 0x00fe, 0x009e, 0x00be,
- 0x0005, 0x6020, 0x9086, 0x0006, 0x1158, 0x0016, 0x0036, 0x0086,
- 0x080c, 0xd563, 0x080c, 0xd267, 0x008e, 0x003e, 0x001e, 0x08d0,
- 0x080c, 0xa59c, 0x6020, 0x9086, 0x0002, 0x1160, 0x6004, 0x0006,
- 0x9086, 0x0085, 0x000e, 0x0904, 0x86ef, 0x9086, 0x008b, 0x0904,
- 0x86ef, 0x0840, 0x6020, 0x9086, 0x0005, 0x1920, 0x6004, 0x0006,
- 0x9086, 0x0085, 0x000e, 0x09c8, 0x9086, 0x008b, 0x09b0, 0x0804,
- 0x8702, 0x0006, 0x00f6, 0x00e6, 0x0096, 0x00b6, 0x00c6, 0x0066,
- 0x0016, 0x0126, 0x2091, 0x8000, 0x9280, 0x1000, 0x2004, 0x905d,
- 0x2079, 0x19bf, 0x9036, 0x7828, 0x2060, 0x8cff, 0x0538, 0x6010,
- 0x9b06, 0x1500, 0x6043, 0xffff, 0x080c, 0x9a83, 0x01d8, 0x610c,
- 0x0016, 0x080c, 0x9127, 0x6014, 0x2048, 0xa867, 0x0103, 0xab7a,
- 0xa877, 0x0000, 0x0016, 0x0036, 0x0086, 0x080c, 0xbb73, 0x080c,
- 0xd563, 0x080c, 0x69b5, 0x008e, 0x003e, 0x001e, 0x080c, 0x9c20,
- 0x00ce, 0x08d8, 0x2c30, 0x600c, 0x2060, 0x08b8, 0x080c, 0x6439,
- 0x012e, 0x001e, 0x006e, 0x00ce, 0x00be, 0x009e, 0x00ee, 0x00fe,
- 0x000e, 0x0005, 0x0096, 0x0006, 0x0066, 0x00c6, 0x00d6, 0x9036,
- 0x7820, 0x9065, 0x0904, 0x87f9, 0x600c, 0x0006, 0x6044, 0xc0fc,
- 0x6046, 0x600f, 0x0000, 0x7830, 0x9c06, 0x1588, 0x2069, 0x0100,
- 0x6820, 0xd0a4, 0x1508, 0x080c, 0x821e, 0x080c, 0x8fd0, 0x68c3,
- 0x0000, 0x080c, 0x948d, 0x7833, 0x0000, 0x0036, 0x2069, 0x0140,
- 0x6b04, 0x9384, 0x1000, 0x0138, 0x2001, 0x0100, 0x080c, 0x2872,
- 0x9006, 0x080c, 0x2872, 0x2069, 0x0100, 0x6824, 0xd084, 0x0110,
- 0x6827, 0x0001, 0x003e, 0x0058, 0x080c, 0x6640, 0x1538, 0x6003,
- 0x0009, 0x630a, 0x7808, 0xc0ad, 0x780a, 0x2c30, 0x00f8, 0x6014,
- 0x2048, 0x080c, 0xb86e, 0x01b0, 0x6020, 0x9086, 0x0003, 0x1508,
- 0x080c, 0xba85, 0x1118, 0x080c, 0xa59c, 0x0060, 0x080c, 0x6640,
- 0x1168, 0xa867, 0x0103, 0xab7a, 0xa877, 0x0000, 0x080c, 0x69b5,
- 0x080c, 0xba5f, 0x080c, 0x9c20, 0x080c, 0x9363, 0x000e, 0x0804,
- 0x8799, 0x7e22, 0x7e1e, 0x00de, 0x00ce, 0x006e, 0x000e, 0x009e,
- 0x0005, 0x6020, 0x9086, 0x0006, 0x1118, 0x080c, 0xd267, 0x0c50,
- 0x080c, 0xa59c, 0x6020, 0x9086, 0x0002, 0x1150, 0x6004, 0x0006,
- 0x9086, 0x0085, 0x000e, 0x0990, 0x9086, 0x008b, 0x0978, 0x08d0,
- 0x6020, 0x9086, 0x0005, 0x19b0, 0x6004, 0x0006, 0x9086, 0x0085,
- 0x000e, 0x0d18, 0x9086, 0x008b, 0x0d00, 0x0860, 0x0006, 0x0096,
- 0x00b6, 0x00c6, 0x0066, 0x9036, 0x7828, 0x9065, 0x0510, 0x6010,
- 0x2058, 0x600c, 0x0006, 0x3e08, 0x918e, 0x0002, 0x1118, 0xb800,
- 0xd0bc, 0x11a8, 0x6043, 0xffff, 0x080c, 0x9a83, 0x0180, 0x610c,
- 0x080c, 0x9127, 0x6014, 0x2048, 0xa867, 0x0103, 0xab7a, 0xa877,
- 0x0000, 0x080c, 0x69b5, 0x080c, 0x9c20, 0x000e, 0x08f0, 0x2c30,
- 0x0ce0, 0x006e, 0x00ce, 0x00be, 0x009e, 0x000e, 0x0005, 0x00e6,
- 0x00d6, 0x0096, 0x0066, 0x080c, 0x5df1, 0x11b0, 0x2071, 0x19bf,
- 0x7030, 0x9080, 0x0005, 0x2004, 0x904d, 0x0170, 0xa878, 0x9606,
- 0x1158, 0x2071, 0x19bf, 0x7030, 0x9035, 0x0130, 0x9080, 0x0005,
- 0x2004, 0x9906, 0x1108, 0x0029, 0x006e, 0x009e, 0x00de, 0x00ee,
- 0x0005, 0x00c6, 0x2660, 0x6043, 0xffff, 0x080c, 0x9a83, 0x0178,
- 0x080c, 0x9127, 0x6014, 0x2048, 0xa867, 0x0103, 0xab7a, 0xa877,
- 0x0000, 0x080c, 0xbb73, 0x080c, 0x69b5, 0x080c, 0x9c20, 0x00ce,
- 0x0005, 0x00b6, 0x00e6, 0x00c6, 0x080c, 0x98c7, 0x0106, 0x2071,
- 0x0101, 0x2e04, 0xc0c4, 0x2072, 0x6044, 0xd0fc, 0x1138, 0x010e,
- 0x090c, 0x98e3, 0x00ce, 0x00ee, 0x00be, 0x0005, 0x2071, 0x19bf,
- 0x7030, 0x9005, 0x0da0, 0x9c06, 0x190c, 0x0d65, 0x7036, 0x080c,
- 0x821e, 0x7004, 0x9084, 0x0007, 0x0002, 0x88bf, 0x88c1, 0x88c8,
- 0x88d2, 0x88e0, 0x88bf, 0x88cd, 0x88bd, 0x080c, 0x0d65, 0x0428,
- 0x0005, 0x080c, 0x9a6e, 0x7007, 0x0000, 0x7033, 0x0000, 0x00e8,
- 0x0066, 0x9036, 0x080c, 0x9127, 0x006e, 0x7007, 0x0000, 0x7033,
- 0x0000, 0x0098, 0x080c, 0x9a59, 0x0140, 0x080c, 0x9a6e, 0x0128,
- 0x0066, 0x9036, 0x080c, 0x9127, 0x006e, 0x7033, 0x0000, 0x0028,
- 0x080c, 0x9a59, 0x080c, 0x948d, 0x0000, 0x010e, 0x190c, 0x98e3,
- 0x00ce, 0x00ee, 0x00be, 0x0005, 0x00d6, 0x00c6, 0x080c, 0x98c7,
- 0x0106, 0x6044, 0xd0fc, 0x1130, 0x010e, 0x090c, 0x98e3, 0x00ce,
- 0x00de, 0x0005, 0x2069, 0x19bf, 0x684c, 0x9005, 0x0da8, 0x9c06,
- 0x190c, 0x0d65, 0x6852, 0x00e6, 0x2d70, 0x080c, 0x8537, 0x00ee,
- 0x080c, 0x822b, 0x0016, 0x2009, 0x0040, 0x080c, 0x207b, 0x001e,
- 0x683c, 0x9084, 0x0003, 0x0002, 0x891a, 0x891b, 0x8939, 0x8918,
- 0x080c, 0x0d65, 0x0460, 0x6868, 0x9086, 0x0001, 0x0190, 0x600c,
- 0x9015, 0x0160, 0x6a4a, 0x600f, 0x0000, 0x6044, 0xc0fc, 0x6046,
- 0x9006, 0x7042, 0x684e, 0x683f, 0x0000, 0x00c8, 0x684a, 0x6846,
- 0x0ca0, 0x686b, 0x0000, 0x6848, 0x9065, 0x0d78, 0x6003, 0x0002,
- 0x0c60, 0x9006, 0x686a, 0x6852, 0x686e, 0x600c, 0x9015, 0x0120,
- 0x6a4a, 0x600f, 0x0000, 0x0018, 0x684e, 0x684a, 0x6846, 0x684f,
- 0x0000, 0x010e, 0x190c, 0x98e3, 0x00ce, 0x00de, 0x0005, 0x0005,
- 0x6020, 0x9084, 0x000f, 0x000b, 0x0005, 0x8965, 0x8968, 0x8dc1,
- 0x8e50, 0x8968, 0x8dc1, 0x8e50, 0x8965, 0x8968, 0x8965, 0x8965,
- 0x8965, 0x8965, 0x8965, 0x8965, 0x8965, 0x080c, 0x8891, 0x0005,
- 0x00b6, 0x0156, 0x0136, 0x0146, 0x01c6, 0x01d6, 0x00c6, 0x00d6,
- 0x00e6, 0x00f6, 0x2069, 0x0200, 0x2071, 0x0240, 0x6004, 0x908a,
- 0x0053, 0x1a0c, 0x0d65, 0x6110, 0x2158, 0xb984, 0x2c78, 0x2061,
- 0x0100, 0x619a, 0x908a, 0x0040, 0x1a04, 0x89d4, 0x005b, 0x00fe,
- 0x00ee, 0x00de, 0x00ce, 0x01de, 0x01ce, 0x014e, 0x013e, 0x015e,
- 0x00be, 0x0005, 0x8b4b, 0x8b86, 0x8baf, 0x8c52, 0x8c73, 0x8c79,
- 0x8c86, 0x8c8e, 0x8c9a, 0x8ca0, 0x8cb1, 0x8ca0, 0x8d08, 0x8c8e,
- 0x8d14, 0x8d1a, 0x8c9a, 0x8d1a, 0x8d26, 0x89d2, 0x89d2, 0x89d2,
- 0x89d2, 0x89d2, 0x89d2, 0x89d2, 0x89d2, 0x89d2, 0x89d2, 0x89d2,
- 0x9148, 0x916b, 0x917c, 0x919c, 0x91ce, 0x8c86, 0x89d2, 0x8c86,
- 0x8ca0, 0x89d2, 0x8baf, 0x8c52, 0x89d2, 0x958b, 0x8ca0, 0x89d2,
- 0x95a7, 0x8ca0, 0x89d2, 0x8c9a, 0x8b45, 0x89f5, 0x89d2, 0x95c3,
- 0x9630, 0x9714, 0x89d2, 0x9721, 0x8c83, 0x974c, 0x89d2, 0x91d8,
- 0x9758, 0x89d2, 0x080c, 0x0d65, 0x2100, 0x005b, 0x00fe, 0x00ee,
- 0x00de, 0x00ce, 0x01de, 0x01ce, 0x014e, 0x013e, 0x015e, 0x00be,
- 0x0005, 0x89f3, 0x89f3, 0x89f3, 0x8a1c, 0x8ac8, 0x8ad3, 0x89f3,
- 0x89f3, 0x89f3, 0x8b1a, 0x8b26, 0x8a37, 0x89f3, 0x8a52, 0x8a86,
- 0x9ad9, 0x9b1e, 0x8ca0, 0x080c, 0x0d65, 0x00d6, 0x0096, 0x080c,
- 0x8d39, 0x7003, 0x2414, 0x7007, 0x0018, 0x700b, 0x0800, 0x7814,
- 0x2048, 0xa83c, 0x700e, 0xa850, 0x7022, 0xa854, 0x7026, 0x60c3,
- 0x0018, 0x080c, 0x8fa0, 0x009e, 0x00de, 0x0005, 0x7810, 0x00b6,
- 0x2058, 0xb8a0, 0x00be, 0x080c, 0x9b65, 0x1118, 0x9084, 0xff80,
- 0x0110, 0x9085, 0x0001, 0x0005, 0x00d6, 0x0096, 0x080c, 0x8d39,
- 0x7003, 0x0500, 0x7814, 0x2048, 0xa874, 0x700a, 0xa878, 0x700e,
- 0xa87c, 0x7012, 0xa880, 0x7016, 0xa884, 0x701a, 0xa888, 0x701e,
- 0x60c3, 0x0010, 0x080c, 0x8fa0, 0x009e, 0x00de, 0x0005, 0x00d6,
- 0x0096, 0x080c, 0x8d39, 0x7003, 0x0500, 0x7814, 0x2048, 0xa8cc,
- 0x700a, 0xa8d0, 0x700e, 0xa8d4, 0x7012, 0xa8d8, 0x7016, 0xa8dc,
- 0x701a, 0xa8e0, 0x701e, 0x60c3, 0x0010, 0x080c, 0x8fa0, 0x009e,
- 0x00de, 0x0005, 0x00d6, 0x0096, 0x0126, 0x2091, 0x8000, 0x080c,
- 0x8d39, 0x20e9, 0x0000, 0x2001, 0x197b, 0x2003, 0x0000, 0x7814,
- 0x2048, 0xa814, 0x8003, 0x60c2, 0xa830, 0x20a8, 0xa860, 0x20e0,
- 0xa85c, 0x9080, 0x001b, 0x2098, 0x2001, 0x197b, 0x0016, 0x200c,
- 0x2001, 0x0001, 0x080c, 0x2060, 0x080c, 0xc5cd, 0x9006, 0x080c,
- 0x2060, 0x001e, 0xa804, 0x9005, 0x0110, 0x2048, 0x0c28, 0x04d9,
- 0x080c, 0x8fa0, 0x012e, 0x009e, 0x00de, 0x0005, 0x00d6, 0x0096,
- 0x0126, 0x2091, 0x8000, 0x080c, 0x8d84, 0x20e9, 0x0000, 0x2001,
- 0x197b, 0x2003, 0x0000, 0x7814, 0x2048, 0xa86f, 0x0200, 0xa873,
- 0x0000, 0xa814, 0x8003, 0x60c2, 0xa830, 0x20a8, 0xa860, 0x20e0,
- 0xa85c, 0x9080, 0x001b, 0x2098, 0x2001, 0x197b, 0x0016, 0x200c,
- 0x080c, 0xc5cd, 0x001e, 0xa804, 0x9005, 0x0110, 0x2048, 0x0c60,
- 0x0051, 0x7814, 0x2048, 0x080c, 0x0fe1, 0x080c, 0x8fa0, 0x012e,
- 0x009e, 0x00de, 0x0005, 0x60c0, 0x8004, 0x9084, 0x0003, 0x9005,
- 0x0130, 0x9082, 0x0004, 0x20a3, 0x0000, 0x8000, 0x1de0, 0x0005,
- 0x080c, 0x8d39, 0x7003, 0x7800, 0x7808, 0x8007, 0x700a, 0x60c3,
- 0x0008, 0x0804, 0x8fa0, 0x00d6, 0x00e6, 0x080c, 0x8d84, 0x7814,
- 0x9084, 0xff00, 0x2073, 0x0200, 0x8e70, 0x8e70, 0x9095, 0x0010,
- 0x2272, 0x8e70, 0x2073, 0x0034, 0x8e70, 0x2069, 0x1805, 0x20a9,
- 0x0004, 0x2d76, 0x8d68, 0x8e70, 0x1f04, 0x8ae9, 0x2069, 0x1801,
- 0x20a9, 0x0004, 0x2d76, 0x8d68, 0x8e70, 0x1f04, 0x8af2, 0x2069,
- 0x198b, 0x9086, 0xdf00, 0x0110, 0x2069, 0x19a5, 0x20a9, 0x001a,
- 0x9e86, 0x0260, 0x1148, 0x00c6, 0x2061, 0x0200, 0x6010, 0x8000,
- 0x6012, 0x00ce, 0x2071, 0x0240, 0x2d04, 0x8007, 0x2072, 0x8d68,
- 0x8e70, 0x1f04, 0x8b00, 0x60c3, 0x004c, 0x080c, 0x8fa0, 0x00ee,
- 0x00de, 0x0005, 0x080c, 0x8d39, 0x7003, 0x6300, 0x7007, 0x0028,
- 0x7808, 0x700e, 0x60c3, 0x0008, 0x0804, 0x8fa0, 0x00d6, 0x0026,
- 0x0016, 0x080c, 0x8d84, 0x7003, 0x0200, 0x7814, 0x700e, 0x00e6,
- 0x9ef0, 0x0004, 0x2009, 0x0001, 0x2011, 0x000c, 0x2073, 0x0800,
- 0x8e70, 0x2073, 0x0000, 0x00ee, 0x7206, 0x710a, 0x62c2, 0x080c,
- 0x8fa0, 0x001e, 0x002e, 0x00de, 0x0005, 0x2001, 0x1817, 0x2004,
- 0x609a, 0x0804, 0x8fa0, 0x080c, 0x8d39, 0x7003, 0x5200, 0x2069,
- 0x185b, 0x6804, 0xd084, 0x0130, 0x6828, 0x0016, 0x080c, 0x248c,
- 0x710e, 0x001e, 0x20a9, 0x0004, 0x20e1, 0x0001, 0x2099, 0x1805,
- 0x20e9, 0x0000, 0x20a1, 0x0250, 0x4003, 0x20a9, 0x0004, 0x2099,
- 0x1801, 0x20a1, 0x0254, 0x4003, 0x080c, 0x9b65, 0x1120, 0xb8a0,
- 0x9082, 0x007f, 0x0248, 0x2001, 0x181e, 0x2004, 0x7032, 0x2001,
- 0x181f, 0x2004, 0x7036, 0x0030, 0x2001, 0x1817, 0x2004, 0x9084,
- 0x00ff, 0x7036, 0x60c3, 0x001c, 0x0804, 0x8fa0, 0x080c, 0x8d39,
- 0x7003, 0x0500, 0x080c, 0x9b65, 0x1120, 0xb8a0, 0x9082, 0x007f,
- 0x0248, 0x2001, 0x181e, 0x2004, 0x700a, 0x2001, 0x181f, 0x2004,
- 0x700e, 0x0030, 0x2001, 0x1817, 0x2004, 0x9084, 0x00ff, 0x700e,
- 0x20a9, 0x0004, 0x20e1, 0x0001, 0x2099, 0x1805, 0x20e9, 0x0000,
- 0x20a1, 0x0250, 0x4003, 0x60c3, 0x0010, 0x0804, 0x8fa0, 0x080c,
- 0x8d39, 0x9006, 0x080c, 0x6654, 0xb8a0, 0x9086, 0x007e, 0x1130,
- 0x7003, 0x0400, 0x620c, 0xc2b4, 0x620e, 0x0058, 0x7814, 0x0096,
- 0x904d, 0x0120, 0x9006, 0xa89a, 0xa8a6, 0xa8aa, 0x009e, 0x7003,
- 0x0300, 0xb8a0, 0x9086, 0x007e, 0x1904, 0x8c1a, 0x00d6, 0x2069,
- 0x1944, 0x2001, 0x1836, 0x2004, 0xd0a4, 0x0178, 0x6800, 0x700a,
- 0x6808, 0x9084, 0x2000, 0x7012, 0x680c, 0x7016, 0x701f, 0x2710,
- 0x6818, 0x7022, 0x681c, 0x7026, 0x0080, 0x6800, 0x700a, 0x6804,
- 0x700e, 0x6808, 0x080c, 0x70ba, 0x1118, 0x9084, 0x37ff, 0x0010,
- 0x9084, 0x3fff, 0x7012, 0x680c, 0x7016, 0x00de, 0x20a9, 0x0004,
- 0x20e1, 0x0001, 0x2099, 0x1805, 0x20e9, 0x0000, 0x20a1, 0x0256,
- 0x4003, 0x20a9, 0x0004, 0x2099, 0x1801, 0x20a1, 0x025a, 0x4003,
- 0x00d6, 0x080c, 0x97df, 0x2069, 0x194c, 0x2071, 0x024e, 0x6800,
- 0xc0dd, 0x7002, 0x080c, 0x53ac, 0xd0e4, 0x0110, 0x680c, 0x700e,
- 0x00de, 0x04a0, 0x2001, 0x1836, 0x2004, 0xd0a4, 0x0168, 0x0016,
- 0x2009, 0x0002, 0x60e0, 0x9106, 0x0130, 0x2100, 0x60e3, 0x0000,
- 0x080c, 0x24cd, 0x61e2, 0x001e, 0x20e1, 0x0001, 0x2099, 0x1944,
- 0x20e9, 0x0000, 0x20a1, 0x024e, 0x20a9, 0x0008, 0x4003, 0x20a9,
- 0x0004, 0x2099, 0x1805, 0x20a1, 0x0256, 0x4003, 0x20a9, 0x0004,
- 0x2099, 0x1801, 0x20a1, 0x025a, 0x4003, 0x080c, 0x97df, 0x20a1,
- 0x024e, 0x20a9, 0x0008, 0x2099, 0x194c, 0x4003, 0x60c3, 0x0074,
- 0x0804, 0x8fa0, 0x080c, 0x8d39, 0x7003, 0x2010, 0x7007, 0x0014,
- 0x700b, 0x0800, 0x700f, 0x2000, 0x9006, 0x00f6, 0x2079, 0x185b,
- 0x7904, 0x00fe, 0xd1ac, 0x1110, 0x9085, 0x0020, 0x0010, 0x9085,
- 0x0010, 0x9085, 0x0002, 0x00d6, 0x0804, 0x8ce9, 0x7026, 0x60c3,
- 0x0014, 0x0804, 0x8fa0, 0x080c, 0x8d39, 0x7003, 0x5000, 0x0804,
- 0x8bc9, 0x080c, 0x8d39, 0x7003, 0x2110, 0x7007, 0x0014, 0x60c3,
- 0x0014, 0x0804, 0x8fa0, 0x080c, 0x8d7b, 0x0010, 0x080c, 0x8d84,
- 0x7003, 0x0200, 0x60c3, 0x0004, 0x0804, 0x8fa0, 0x080c, 0x8d84,
- 0x7003, 0x0100, 0x700b, 0x0003, 0x700f, 0x2a00, 0x60c3, 0x0008,
- 0x0804, 0x8fa0, 0x080c, 0x8d84, 0x7003, 0x0200, 0x0804, 0x8bc9,
- 0x080c, 0x8d84, 0x7003, 0x0100, 0x782c, 0x9005, 0x0110, 0x700a,
- 0x0010, 0x700b, 0x0003, 0x7814, 0x700e, 0x60c3, 0x0008, 0x0804,
- 0x8fa0, 0x00d6, 0x080c, 0x8d84, 0x7003, 0x0210, 0x7007, 0x0014,
- 0x700b, 0x0800, 0xb894, 0x9086, 0x0014, 0x1198, 0xb99c, 0x9184,
- 0x0030, 0x0190, 0xb998, 0x9184, 0xc000, 0x1140, 0xd1ec, 0x0118,
- 0x700f, 0x2100, 0x0058, 0x700f, 0x0100, 0x0040, 0x700f, 0x0400,
- 0x0028, 0x700f, 0x0700, 0x0010, 0x700f, 0x0800, 0x00f6, 0x2079,
- 0x185b, 0x7904, 0x00fe, 0xd1ac, 0x1110, 0x9085, 0x0020, 0x0010,
- 0x9085, 0x0010, 0x2009, 0x187d, 0x210c, 0xd184, 0x1110, 0x9085,
- 0x0002, 0x0026, 0x2009, 0x187b, 0x210c, 0xd1e4, 0x0150, 0xc0c5,
- 0xbac4, 0xd28c, 0x1108, 0xc0cd, 0x9094, 0x0030, 0x9296, 0x0010,
- 0x0140, 0xd1ec, 0x0130, 0x9094, 0x0030, 0x9296, 0x0010, 0x0108,
- 0xc0bd, 0x002e, 0x7026, 0x60c3, 0x0014, 0x00de, 0x0804, 0x8fa0,
- 0x080c, 0x8d84, 0x7003, 0x0210, 0x7007, 0x0014, 0x700f, 0x0100,
- 0x60c3, 0x0014, 0x0804, 0x8fa0, 0x080c, 0x8d84, 0x7003, 0x0200,
- 0x0804, 0x8b4f, 0x080c, 0x8d84, 0x7003, 0x0100, 0x700b, 0x0003,
- 0x700f, 0x2a00, 0x60c3, 0x0008, 0x0804, 0x8fa0, 0x080c, 0x8d84,
- 0x7003, 0x0100, 0x700b, 0x000b, 0x60c3, 0x0008, 0x0804, 0x8fa0,
- 0x0026, 0x00d6, 0x0036, 0x0046, 0x2019, 0x3200, 0x2021, 0x0800,
- 0x0040, 0x0026, 0x00d6, 0x0036, 0x0046, 0x2019, 0x2200, 0x2021,
- 0x0100, 0x080c, 0x97f4, 0xb810, 0x9305, 0x7002, 0xb814, 0x7006,
- 0x2069, 0x1800, 0x6878, 0x700a, 0x687c, 0x700e, 0x9485, 0x0029,
- 0x7012, 0x004e, 0x003e, 0x00de, 0x080c, 0x8f94, 0x721a, 0x9f95,
- 0x0000, 0x7222, 0x7027, 0xffff, 0x2071, 0x024c, 0x002e, 0x0005,
- 0x0026, 0x080c, 0x97f4, 0x7003, 0x02ff, 0x7007, 0xfffc, 0x00d6,
- 0x2069, 0x1800, 0x6878, 0x700a, 0x687c, 0x700e, 0x00de, 0x7013,
- 0x2029, 0x0c10, 0x7003, 0x0100, 0x7007, 0x0000, 0x700b, 0xfc02,
- 0x700f, 0x0000, 0x0005, 0x0026, 0x00d6, 0x0036, 0x0046, 0x2019,
- 0x3300, 0x2021, 0x0800, 0x0040, 0x0026, 0x00d6, 0x0036, 0x0046,
- 0x2019, 0x2300, 0x2021, 0x0100, 0x080c, 0x97f4, 0xb810, 0x9305,
- 0x7002, 0xb814, 0x7006, 0x2069, 0x1800, 0xb810, 0x9005, 0x1140,
- 0xb814, 0x9005, 0x1128, 0x700b, 0x00ff, 0x700f, 0xfffe, 0x0020,
- 0x6878, 0x700a, 0x687c, 0x700e, 0x0000, 0x9485, 0x0098, 0x7012,
- 0x004e, 0x003e, 0x00de, 0x080c, 0x8f94, 0x721a, 0x7a08, 0x7222,
- 0x2f10, 0x7226, 0x2071, 0x024c, 0x002e, 0x0005, 0x080c, 0x8f94,
- 0x721a, 0x7a08, 0x7222, 0x7814, 0x7026, 0x2071, 0x024c, 0x002e,
- 0x0005, 0x00b6, 0x00c6, 0x00d6, 0x00e6, 0x00f6, 0x2069, 0x0200,
- 0x2071, 0x0240, 0x6004, 0x908a, 0x0085, 0x0a0c, 0x0d65, 0x908a,
- 0x0092, 0x1a0c, 0x0d65, 0x6110, 0x2158, 0xb984, 0x2c78, 0x2061,
- 0x0100, 0x619a, 0x9082, 0x0085, 0x0033, 0x00fe, 0x00ee, 0x00de,
- 0x00ce, 0x00be, 0x0005, 0x8df2, 0x8e01, 0x8e0c, 0x8df0, 0x8df0,
- 0x8df0, 0x8df2, 0x8df0, 0x8df0, 0x8df0, 0x8df0, 0x8df0, 0x8df0,
- 0x080c, 0x0d65, 0x0411, 0x60c3, 0x0000, 0x0026, 0x080c, 0x27dd,
- 0x0228, 0x2011, 0x0101, 0x2204, 0xc0c5, 0x2012, 0x002e, 0x0804,
- 0x8fa0, 0x0431, 0x7808, 0x700a, 0x7814, 0x700e, 0x7017, 0xffff,
- 0x60c3, 0x000c, 0x0804, 0x8fa0, 0x0479, 0x7003, 0x0003, 0x7007,
- 0x0300, 0x60c3, 0x0004, 0x0804, 0x8fa0, 0x0026, 0x080c, 0x97f4,
- 0xb810, 0x9085, 0x8100, 0x7002, 0xb814, 0x7006, 0x2069, 0x1800,
- 0x6878, 0x700a, 0x687c, 0x700e, 0x7013, 0x0009, 0x0804, 0x8d54,
- 0x0026, 0x080c, 0x97f4, 0xb810, 0x9085, 0x8400, 0x7002, 0xb814,
- 0x7006, 0x2069, 0x1800, 0x6878, 0x700a, 0x687c, 0x700e, 0x2001,
- 0x0099, 0x7012, 0x0804, 0x8db6, 0x0026, 0x080c, 0x97f4, 0xb810,
- 0x9085, 0x8500, 0x7002, 0xb814, 0x7006, 0x2069, 0x1800, 0x6878,
- 0x700a, 0x687c, 0x700e, 0x2001, 0x0099, 0x7012, 0x0804, 0x8db6,
- 0x00b6, 0x00c6, 0x00d6, 0x00e6, 0x00f6, 0x2c78, 0x2069, 0x0200,
- 0x2071, 0x0240, 0x7804, 0x908a, 0x0040, 0x0a0c, 0x0d65, 0x908a,
- 0x0057, 0x1a0c, 0x0d65, 0x7910, 0x2158, 0xb984, 0x2061, 0x0100,
- 0x619a, 0x9082, 0x0040, 0x0033, 0x00fe, 0x00ee, 0x00de, 0x00ce,
- 0x00be, 0x0005, 0x8e85, 0x8e85, 0x8e85, 0x8eab, 0x8e85, 0x8e85,
- 0x8e85, 0x8e85, 0x8e85, 0x8e85, 0x8e85, 0x9340, 0x9348, 0x9350,
- 0x9358, 0x8e85, 0x8e85, 0x8e85, 0x9338, 0x080c, 0x0d65, 0x6813,
- 0x0008, 0xba8c, 0x8210, 0xb8c4, 0xd084, 0x0128, 0x7a4e, 0x7b14,
- 0x7b52, 0x722e, 0x732a, 0x9294, 0x00ff, 0xba8e, 0x8217, 0x721a,
- 0xba10, 0x9295, 0x0600, 0x7202, 0xba14, 0x7206, 0x2069, 0x1800,
- 0x6a78, 0x720a, 0x6a7c, 0x720e, 0x7013, 0x0829, 0x2f10, 0x7222,
- 0x7027, 0xffff, 0x0005, 0x0016, 0x7814, 0x9084, 0x0700, 0x8007,
- 0x0013, 0x001e, 0x0005, 0x8ebb, 0x8ebb, 0x8ebd, 0x8ebb, 0x8ebb,
- 0x8ebb, 0x8ed7, 0x8ebb, 0x080c, 0x0d65, 0x7914, 0x918c, 0x08ff,
- 0x918d, 0xf600, 0x7916, 0x2009, 0x0003, 0x00b9, 0x2069, 0x185b,
- 0x6804, 0xd0bc, 0x0130, 0x682c, 0x9084, 0x00ff, 0x8007, 0x7032,
- 0x0010, 0x7033, 0x3f00, 0x60c3, 0x0001, 0x0804, 0x8fa0, 0x2009,
- 0x0003, 0x0019, 0x7033, 0x7f00, 0x0cb0, 0x0016, 0x080c, 0x97f4,
- 0x001e, 0xb810, 0x9085, 0x0100, 0x7002, 0xb814, 0x7006, 0x2069,
- 0x1800, 0x6a78, 0x720a, 0x6a7c, 0x720e, 0x7013, 0x0888, 0x918d,
- 0x0008, 0x7116, 0x080c, 0x8f94, 0x721a, 0x7a08, 0x7222, 0x2f10,
- 0x7226, 0x0005, 0x00b6, 0x0096, 0x00e6, 0x00d6, 0x00c6, 0x0056,
- 0x0046, 0x0036, 0x2061, 0x0100, 0x2071, 0x1800, 0x7810, 0x2058,
- 0xb8a0, 0x2028, 0xb910, 0xba14, 0x7378, 0x747c, 0x7820, 0x0002,
- 0x8f1f, 0x8f1f, 0x8f1f, 0x8f1f, 0x8f1f, 0x8f1f, 0x8f1f, 0x8f1f,
- 0x8f1f, 0x8f1f, 0x8f21, 0x8f1f, 0x8f1f, 0x8f1f, 0x8f1f, 0x080c,
- 0x0d65, 0xb884, 0x609e, 0x7814, 0x2048, 0xa87c, 0xd0fc, 0x0558,
- 0xaf90, 0x9784, 0xff00, 0x9105, 0x6062, 0x873f, 0x9784, 0xff00,
- 0x0006, 0x7814, 0x2048, 0xa878, 0xc0fc, 0x9005, 0x000e, 0x1160,
- 0xaf94, 0x87ff, 0x0198, 0x2039, 0x0098, 0x9705, 0x6072, 0x7808,
- 0x6082, 0x2f00, 0x6086, 0x0038, 0x9185, 0x2200, 0x6062, 0x6073,
- 0x0129, 0x6077, 0x0000, 0xb884, 0x609e, 0x0050, 0x2039, 0x0029,
- 0x9705, 0x6072, 0x0cc0, 0x9185, 0x0200, 0x6062, 0x6073, 0x2029,
- 0xa87c, 0xd0fc, 0x0118, 0xaf94, 0x87ff, 0x1120, 0x2f00, 0x6082,
- 0x7808, 0x6086, 0x6266, 0x636a, 0x646e, 0x6077, 0x0000, 0xb88c,
- 0x8000, 0x9084, 0x00ff, 0xb88e, 0x8007, 0x607a, 0x607f, 0x0000,
- 0xa848, 0x608a, 0xa844, 0x608e, 0xa838, 0x60c6, 0xa834, 0x60ca,
- 0xb86c, 0x60ce, 0x60af, 0x95d5, 0x60d7, 0x0000, 0x080c, 0x97d4,
- 0x2009, 0x07d0, 0x60c4, 0x9084, 0xfff0, 0x9005, 0x0110, 0x2009,
- 0x1b58, 0x080c, 0x8223, 0x003e, 0x004e, 0x005e, 0x00ce, 0x00de,
- 0x00ee, 0x009e, 0x00be, 0x0005, 0x7a40, 0x9294, 0x00ff, 0x8217,
- 0x0005, 0x00d6, 0x2069, 0x19bf, 0x686b, 0x0001, 0x00de, 0x0005,
- 0x60a3, 0x0056, 0x60a7, 0x9575, 0x00f1, 0x080c, 0x8215, 0x0005,
- 0x0016, 0x2001, 0x180c, 0x200c, 0x9184, 0x0600, 0x9086, 0x0600,
- 0x0128, 0x0089, 0x080c, 0x8215, 0x001e, 0x0005, 0xc1e5, 0x2001,
- 0x180c, 0x2102, 0x2001, 0x19c0, 0x2003, 0x0000, 0x2001, 0x19cb,
- 0x2003, 0x0000, 0x0c88, 0x0006, 0x0016, 0x0026, 0x2009, 0x1804,
- 0x2011, 0x0009, 0x080c, 0x28bb, 0x002e, 0x001e, 0x000e, 0x0005,
- 0x0016, 0x00c6, 0x0006, 0x080c, 0x98c7, 0x0106, 0x2061, 0x0100,
- 0x61a4, 0x60a7, 0x95f5, 0x0016, 0x0026, 0x2009, 0x1804, 0x2011,
- 0x0008, 0x080c, 0x28bb, 0x002e, 0x001e, 0x010e, 0x090c, 0x98e3,
- 0x000e, 0xa001, 0xa001, 0xa001, 0x61a6, 0x00ce, 0x001e, 0x0005,
- 0x00c6, 0x00d6, 0x0016, 0x0026, 0x2061, 0x0100, 0x2069, 0x0140,
- 0x080c, 0x70ba, 0x1510, 0x2001, 0x19e4, 0x2004, 0x9005, 0x1904,
- 0x904f, 0x080c, 0x715f, 0x11a8, 0x2069, 0x0380, 0x6843, 0x0101,
- 0x6844, 0xd084, 0x1de8, 0x2061, 0x0100, 0x6020, 0xd0b4, 0x1120,
- 0x6024, 0xd084, 0x090c, 0x0d65, 0x6843, 0x0100, 0x080c, 0x8215,
- 0x04b0, 0x00c6, 0x2061, 0x19bf, 0x00f0, 0x6904, 0x9194, 0x4000,
- 0x0598, 0x080c, 0x8fd0, 0x080c, 0x2882, 0x00c6, 0x2061, 0x19bf,
- 0x6134, 0x9192, 0x0008, 0x1278, 0x8108, 0x6136, 0x080c, 0x98c7,
- 0x6130, 0x080c, 0x98e3, 0x00ce, 0x81ff, 0x01c8, 0x080c, 0x8215,
- 0x080c, 0x8fc3, 0x00a0, 0x080c, 0x98c7, 0x6130, 0x91e5, 0x0000,
- 0x0150, 0x080c, 0xd659, 0x080c, 0x821e, 0x6003, 0x0001, 0x2009,
- 0x0014, 0x080c, 0x9c82, 0x080c, 0x98e3, 0x00ce, 0x0000, 0x002e,
- 0x001e, 0x00de, 0x00ce, 0x0005, 0x2001, 0x19e4, 0x2004, 0x9005,
- 0x1db0, 0x00c6, 0x2061, 0x19bf, 0x6134, 0x9192, 0x0003, 0x1ad8,
- 0x8108, 0x6136, 0x00ce, 0x080c, 0x8215, 0x080c, 0x5bb2, 0x2009,
- 0x185a, 0x2114, 0x8210, 0x220a, 0x0c10, 0x0096, 0x00c6, 0x00d6,
- 0x00e6, 0x0016, 0x0026, 0x080c, 0x822b, 0x080c, 0x98c7, 0x2001,
- 0x0387, 0x2003, 0x0202, 0x2071, 0x19bf, 0x714c, 0x81ff, 0x0904,
- 0x90e3, 0x2061, 0x0100, 0x2069, 0x0140, 0x080c, 0x70ba, 0x11c0,
- 0x0036, 0x2019, 0x0002, 0x080c, 0x929d, 0x003e, 0x714c, 0x2160,
- 0x080c, 0xd659, 0x2009, 0x004a, 0x6003, 0x0003, 0x080c, 0x9c82,
- 0x2001, 0x0386, 0x2003, 0x5040, 0x080c, 0x715f, 0x0804, 0x90e3,
- 0x6904, 0xd1f4, 0x0904, 0x90f0, 0x080c, 0x2882, 0x00c6, 0x704c,
- 0x9065, 0x090c, 0x0d65, 0x6020, 0x00ce, 0x9086, 0x0006, 0x1518,
- 0x61c8, 0x60c4, 0x9105, 0x11f8, 0x2009, 0x180c, 0x2104, 0xd0d4,
- 0x01d0, 0x6214, 0x9294, 0x1800, 0x1128, 0x6224, 0x9294, 0x0002,
- 0x1510, 0x0010, 0xc0d4, 0x200a, 0x6014, 0x9084, 0xe7fd, 0x9085,
- 0x0010, 0x6016, 0x704c, 0x2060, 0x080c, 0x88ec, 0x2009, 0x0049,
- 0x080c, 0x9c82, 0x0080, 0x0036, 0x2019, 0x0001, 0x080c, 0x929d,
- 0x003e, 0x714c, 0x2160, 0x080c, 0xd659, 0x2009, 0x004a, 0x6003,
- 0x0003, 0x080c, 0x9c82, 0x2001, 0x0387, 0x2003, 0x0200, 0x080c,
- 0x98e3, 0x002e, 0x001e, 0x00ee, 0x00de, 0x00ce, 0x009e, 0x0005,
- 0xd1ec, 0x1904, 0x90a4, 0x0804, 0x90a6, 0x0026, 0x00e6, 0x2071,
- 0x19bf, 0x706c, 0xd084, 0x01d0, 0xc084, 0x706e, 0x714c, 0x81ff,
- 0x01a8, 0x2071, 0x0100, 0x9188, 0x0008, 0x2114, 0x928e, 0x0006,
- 0x1138, 0x2009, 0x1984, 0x2011, 0x0012, 0x080c, 0x28bb, 0x0030,
- 0x2009, 0x1984, 0x2011, 0x0016, 0x080c, 0x28bb, 0x00ee, 0x002e,
- 0x0005, 0x9036, 0x2001, 0x19c9, 0x2004, 0x9005, 0x0128, 0x9c06,
- 0x0128, 0x2c30, 0x600c, 0x0cc8, 0x9085, 0x0001, 0x0005, 0x00f6,
- 0x2079, 0x19bf, 0x610c, 0x9006, 0x600e, 0x6044, 0xc0fc, 0x6046,
- 0x86ff, 0x1140, 0x7824, 0x9c06, 0x1118, 0x7826, 0x782a, 0x0050,
- 0x792a, 0x0040, 0x00c6, 0x2660, 0x610e, 0x00ce, 0x7824, 0x9c06,
- 0x1108, 0x7e26, 0x080c, 0x9363, 0x080c, 0xba5f, 0x00fe, 0x0005,
- 0x080c, 0x8d39, 0x7003, 0x1200, 0x7838, 0x7012, 0x783c, 0x7016,
- 0x00c6, 0x7820, 0x9086, 0x0004, 0x1148, 0x7810, 0x9005, 0x0130,
- 0x00b6, 0x2058, 0xb810, 0xb914, 0x00be, 0x0020, 0x2061, 0x1800,
- 0x6078, 0x617c, 0x9084, 0x00ff, 0x700a, 0x710e, 0x00ce, 0x60c3,
- 0x002c, 0x0804, 0x8fa0, 0x080c, 0x8d39, 0x7003, 0x0f00, 0x7808,
- 0xd09c, 0x0128, 0xb810, 0x9084, 0x00ff, 0x700a, 0xb814, 0x700e,
- 0x60c3, 0x0008, 0x0804, 0x8fa0, 0x0156, 0x080c, 0x8d84, 0x7003,
- 0x0200, 0x2011, 0x1848, 0x63f0, 0x2312, 0x20a9, 0x0006, 0x2011,
- 0x1840, 0x2019, 0x1841, 0x9ef0, 0x0002, 0x2376, 0x8e70, 0x2276,
- 0x8e70, 0x9398, 0x0002, 0x9290, 0x0002, 0x1f04, 0x918d, 0x60c3,
- 0x001c, 0x015e, 0x0804, 0x8fa0, 0x0016, 0x0026, 0x080c, 0x8d60,
- 0x080c, 0x8d72, 0x9e80, 0x0004, 0x20e9, 0x0000, 0x20a0, 0x7814,
- 0x0096, 0x2048, 0xa800, 0x2048, 0xa860, 0x20e0, 0xa85c, 0x9080,
- 0x0021, 0x2098, 0x009e, 0x7808, 0x9088, 0x0002, 0x21a8, 0x9192,
- 0x0010, 0x1250, 0x4003, 0x9080, 0x0004, 0x8003, 0x60c2, 0x080c,
- 0x8fa0, 0x002e, 0x001e, 0x0005, 0x20a9, 0x0010, 0x4003, 0x080c,
- 0x97df, 0x20a1, 0x0240, 0x22a8, 0x4003, 0x0c68, 0x080c, 0x8d39,
- 0x7003, 0x6200, 0x7808, 0x700e, 0x60c3, 0x0008, 0x0804, 0x8fa0,
- 0x0016, 0x0026, 0x080c, 0x8d39, 0x20e9, 0x0000, 0x20a1, 0x024c,
- 0x7814, 0x0096, 0x2048, 0xa800, 0x2048, 0xa860, 0x20e0, 0xa85c,
- 0x9080, 0x0023, 0x2098, 0x009e, 0x7808, 0x9088, 0x0002, 0x21a8,
- 0x4003, 0x8003, 0x60c2, 0x080c, 0x8fa0, 0x002e, 0x001e, 0x0005,
- 0x00e6, 0x00c6, 0x0006, 0x0126, 0x2091, 0x8000, 0x2071, 0x19bf,
- 0x7010, 0x2060, 0x8cff, 0x0188, 0x080c, 0xba85, 0x1110, 0x080c,
- 0xa59c, 0x600c, 0x0006, 0x080c, 0xbd01, 0x600f, 0x0000, 0x080c,
- 0x9be6, 0x080c, 0x9363, 0x00ce, 0x0c68, 0x2c00, 0x7012, 0x700e,
- 0x012e, 0x000e, 0x00ce, 0x00ee, 0x0005, 0x0126, 0x0156, 0x00f6,
- 0x00e6, 0x00d6, 0x00c6, 0x0066, 0x0026, 0x0016, 0x0006, 0x2091,
- 0x8000, 0x2001, 0x180c, 0x200c, 0x918c, 0xe7ff, 0x2102, 0x2069,
- 0x0100, 0x2079, 0x0140, 0x2071, 0x19bf, 0x7030, 0x2060, 0x8cff,
- 0x0548, 0x080c, 0x8fd0, 0x6ac0, 0x68c3, 0x0000, 0x080c, 0x821e,
- 0x00c6, 0x2061, 0x0100, 0x080c, 0x97f8, 0x00ce, 0x20a9, 0x01f4,
- 0x04b1, 0x080c, 0x8891, 0x6044, 0xd0ac, 0x1128, 0x2001, 0x1960,
- 0x2004, 0x604a, 0x0020, 0x2009, 0x0013, 0x080c, 0x9c82, 0x000e,
- 0x001e, 0x002e, 0x006e, 0x00ce, 0x00de, 0x00ee, 0x00fe, 0x015e,
- 0x012e, 0x0005, 0x2001, 0x1800, 0x2004, 0x9096, 0x0001, 0x0d78,
- 0x9096, 0x0004, 0x0d60, 0x080c, 0x821e, 0x6814, 0x9084, 0x0001,
- 0x0110, 0x68a7, 0x95f5, 0x6817, 0x0008, 0x68c3, 0x0000, 0x2011,
- 0x5b5c, 0x080c, 0x816c, 0x20a9, 0x01f4, 0x0009, 0x08c0, 0x6824,
- 0xd094, 0x0140, 0x6827, 0x0004, 0x7804, 0x9084, 0x4000, 0x190c,
- 0x2882, 0x0090, 0xd084, 0x0118, 0x6827, 0x0001, 0x0010, 0x1f04,
- 0x927f, 0x7804, 0x9084, 0x1000, 0x0138, 0x2001, 0x0100, 0x080c,
- 0x2872, 0x9006, 0x080c, 0x2872, 0x0005, 0x0126, 0x0156, 0x00f6,
- 0x00e6, 0x00d6, 0x00c6, 0x0066, 0x0026, 0x0016, 0x0006, 0x2091,
- 0x8000, 0x2001, 0x180c, 0x200c, 0x918c, 0xdbff, 0x2102, 0x2069,
- 0x0100, 0x2079, 0x0140, 0x2071, 0x0380, 0x701c, 0x0006, 0x701f,
- 0x0202, 0x2071, 0x19bf, 0x704c, 0x2060, 0x8cff, 0x0904, 0x9312,
- 0x9386, 0x0002, 0x1128, 0x6814, 0x9084, 0x0002, 0x0904, 0x9312,
- 0x68af, 0x95f5, 0x6817, 0x0010, 0x2009, 0x00fa, 0x8109, 0x1df0,
- 0x69c6, 0x68cb, 0x0008, 0x080c, 0x822b, 0x080c, 0x1c9f, 0x2001,
- 0x0032, 0x6920, 0xd1bc, 0x0130, 0x8001, 0x1dd8, 0x692c, 0x918d,
- 0x0008, 0x692e, 0x20a9, 0x03e8, 0x6824, 0xd094, 0x0140, 0x6827,
- 0x0004, 0x7804, 0x9084, 0x4000, 0x190c, 0x2882, 0x0090, 0xd08c,
- 0x0118, 0x6827, 0x0002, 0x0010, 0x1f04, 0x92e4, 0x7804, 0x9084,
- 0x1000, 0x0138, 0x2001, 0x0100, 0x080c, 0x2872, 0x9006, 0x080c,
- 0x2872, 0x6827, 0x4000, 0x6824, 0x83ff, 0x1160, 0x2009, 0x0049,
- 0x080c, 0x88ec, 0x6044, 0xd0ac, 0x1118, 0x6003, 0x0002, 0x0010,
- 0x080c, 0x9c82, 0x000e, 0x2071, 0x0380, 0xd08c, 0x1110, 0x701f,
- 0x0200, 0x000e, 0x001e, 0x002e, 0x006e, 0x00ce, 0x00de, 0x00ee,
- 0x00fe, 0x015e, 0x012e, 0x0005, 0x00d6, 0x0126, 0x2091, 0x8000,
- 0x2069, 0x19bf, 0x6a06, 0x012e, 0x00de, 0x0005, 0x00d6, 0x0126,
- 0x2091, 0x8000, 0x2069, 0x19bf, 0x6a3e, 0x012e, 0x00de, 0x0005,
- 0x080c, 0x8e87, 0x785c, 0x7032, 0x7042, 0x7047, 0x1000, 0x00f8,
- 0x080c, 0x8e87, 0x785c, 0x7032, 0x7042, 0x7047, 0x4000, 0x00b8,
- 0x080c, 0x8e87, 0x785c, 0x7032, 0x7042, 0x7047, 0x2000, 0x0078,
- 0x080c, 0x8e87, 0x785c, 0x7032, 0x7042, 0x7047, 0x0400, 0x0038,
- 0x080c, 0x8e87, 0x785c, 0x7032, 0x7042, 0x7047, 0x0200, 0x60c3,
- 0x0020, 0x0804, 0x8fa0, 0x00e6, 0x2071, 0x19bf, 0x702c, 0x9005,
- 0x0110, 0x8001, 0x702e, 0x00ee, 0x0005, 0x00f6, 0x00e6, 0x00d6,
- 0x00c6, 0x0076, 0x0066, 0x0006, 0x0126, 0x2091, 0x8000, 0x2071,
- 0x19bf, 0x7620, 0x2660, 0x2678, 0x2039, 0x0001, 0x87ff, 0x0904,
- 0x9408, 0x8cff, 0x0904, 0x9408, 0x6020, 0x9086, 0x0006, 0x1904,
- 0x9403, 0x88ff, 0x0138, 0x2800, 0x9c06, 0x1904, 0x9403, 0x2039,
- 0x0000, 0x0050, 0x6010, 0x9b06, 0x1904, 0x9403, 0x85ff, 0x0120,
- 0x605c, 0x9106, 0x1904, 0x9403, 0x7030, 0x9c06, 0x15b0, 0x2069,
- 0x0100, 0x68c0, 0x9005, 0x1160, 0x6824, 0xd084, 0x0148, 0x6827,
- 0x0001, 0x080c, 0x821e, 0x080c, 0x948d, 0x7033, 0x0000, 0x0428,
- 0x080c, 0x821e, 0x6820, 0xd0b4, 0x0110, 0x68a7, 0x95f5, 0x6817,
- 0x0008, 0x68c3, 0x0000, 0x080c, 0x948d, 0x7033, 0x0000, 0x0036,
- 0x2069, 0x0140, 0x6b04, 0x9384, 0x1000, 0x0138, 0x2001, 0x0100,
- 0x080c, 0x2872, 0x9006, 0x080c, 0x2872, 0x2069, 0x0100, 0x6824,
- 0xd084, 0x0110, 0x6827, 0x0001, 0x003e, 0x7020, 0x9c36, 0x1110,
- 0x660c, 0x7622, 0x701c, 0x9c36, 0x1140, 0x2c00, 0x9f36, 0x0118,
- 0x2f00, 0x701e, 0x0010, 0x701f, 0x0000, 0x660c, 0x0066, 0x2c00,
- 0x9f06, 0x0110, 0x7e0e, 0x0008, 0x2678, 0x89ff, 0x1168, 0x600f,
- 0x0000, 0x6014, 0x0096, 0x2048, 0x080c, 0xb86e, 0x0110, 0x080c,
- 0xd267, 0x009e, 0x080c, 0x9c20, 0x080c, 0x9363, 0x88ff, 0x1190,
- 0x00ce, 0x0804, 0x937e, 0x2c78, 0x600c, 0x2060, 0x0804, 0x937e,
- 0x9006, 0x012e, 0x000e, 0x006e, 0x007e, 0x00ce, 0x00de, 0x00ee,
- 0x00fe, 0x0005, 0x601b, 0x0000, 0x00ce, 0x98c5, 0x0001, 0x0c88,
- 0x00f6, 0x00e6, 0x00d6, 0x0096, 0x00c6, 0x0066, 0x0026, 0x0006,
- 0x0126, 0x2091, 0x8000, 0x2071, 0x19bf, 0x7648, 0x2660, 0x2678,
- 0x8cff, 0x0904, 0x947c, 0x6020, 0x9086, 0x0006, 0x1904, 0x9477,
- 0x87ff, 0x0128, 0x2700, 0x9c06, 0x1904, 0x9477, 0x0040, 0x6010,
- 0x9b06, 0x15e8, 0x85ff, 0x0118, 0x605c, 0x9106, 0x15c0, 0x704c,
- 0x9c06, 0x1168, 0x0036, 0x2019, 0x0001, 0x080c, 0x929d, 0x703f,
- 0x0000, 0x9006, 0x704e, 0x706a, 0x7052, 0x706e, 0x003e, 0x7048,
- 0x9c36, 0x1110, 0x660c, 0x764a, 0x7044, 0x9c36, 0x1140, 0x2c00,
- 0x9f36, 0x0118, 0x2f00, 0x7046, 0x0010, 0x7047, 0x0000, 0x660c,
- 0x0066, 0x2c00, 0x9f06, 0x0110, 0x7e0e, 0x0008, 0x2678, 0x600f,
- 0x0000, 0x6014, 0x2048, 0x080c, 0xb86e, 0x0110, 0x080c, 0xd267,
- 0x080c, 0x9c20, 0x87ff, 0x1198, 0x00ce, 0x0804, 0x9428, 0x2c78,
- 0x600c, 0x2060, 0x0804, 0x9428, 0x9006, 0x012e, 0x000e, 0x002e,
- 0x006e, 0x00ce, 0x009e, 0x00de, 0x00ee, 0x00fe, 0x0005, 0x601b,
- 0x0000, 0x00ce, 0x97bd, 0x0001, 0x0c80, 0x00e6, 0x2071, 0x19bf,
- 0x9006, 0x7032, 0x700a, 0x7004, 0x9086, 0x0003, 0x0158, 0x2001,
- 0x1800, 0x2004, 0x9086, 0x0002, 0x1118, 0x7007, 0x0005, 0x0010,
- 0x7007, 0x0000, 0x00ee, 0x0005, 0x00f6, 0x00e6, 0x00c6, 0x0066,
- 0x0026, 0x0006, 0x0126, 0x2091, 0x8000, 0x2071, 0x19bf, 0x2c10,
- 0x7648, 0x2660, 0x2678, 0x8cff, 0x0540, 0x2200, 0x9c06, 0x1508,
- 0x7048, 0x9c36, 0x1110, 0x660c, 0x764a, 0x7044, 0x9c36, 0x1140,
- 0x2c00, 0x9f36, 0x0118, 0x2f00, 0x7046, 0x0010, 0x7047, 0x0000,
- 0x660c, 0x2c00, 0x9f06, 0x0110, 0x7e0e, 0x0008, 0x2678, 0x600f,
- 0x0000, 0x6004, 0x9086, 0x0040, 0x090c, 0x8891, 0x9085, 0x0001,
- 0x0020, 0x2c78, 0x600c, 0x2060, 0x08b0, 0x012e, 0x000e, 0x002e,
- 0x006e, 0x00ce, 0x00ee, 0x00fe, 0x0005, 0x0096, 0x00f6, 0x00e6,
- 0x00d6, 0x00c6, 0x0066, 0x0026, 0x0006, 0x0126, 0x2091, 0x8000,
- 0x2071, 0x19bf, 0x7610, 0x2660, 0x2678, 0x8cff, 0x0904, 0x957a,
- 0x6010, 0x00b6, 0x2058, 0xb8a0, 0x00be, 0x9206, 0x1904, 0x9575,
- 0x7030, 0x9c06, 0x1520, 0x2069, 0x0100, 0x68c0, 0x9005, 0x0904,
- 0x954c, 0x080c, 0x8fd0, 0x68c3, 0x0000, 0x080c, 0x948d, 0x7033,
- 0x0000, 0x0036, 0x2069, 0x0140, 0x6b04, 0x9384, 0x1000, 0x0138,
- 0x2001, 0x0100, 0x080c, 0x2872, 0x9006, 0x080c, 0x2872, 0x2069,
- 0x0100, 0x6824, 0xd084, 0x0110, 0x6827, 0x0001, 0x003e, 0x7010,
- 0x9c36, 0x1110, 0x660c, 0x7612, 0x700c, 0x9c36, 0x1140, 0x2c00,
- 0x9f36, 0x0118, 0x2f00, 0x700e, 0x0010, 0x700f, 0x0000, 0x660c,
- 0x0066, 0x2c00, 0x9f06, 0x0110, 0x7e0e, 0x0008, 0x2678, 0x600f,
- 0x0000, 0x080c, 0xba74, 0x1180, 0x080c, 0x305d, 0x080c, 0xba85,
- 0x1518, 0x080c, 0xa59c, 0x0400, 0x080c, 0x948d, 0x6824, 0xd084,
- 0x09b0, 0x6827, 0x0001, 0x0898, 0x080c, 0xba85, 0x1118, 0x080c,
- 0xa59c, 0x0090, 0x6014, 0x2048, 0x080c, 0xb86e, 0x0168, 0x6020,
- 0x9086, 0x0003, 0x1508, 0xa867, 0x0103, 0xab7a, 0xa877, 0x0000,
- 0x080c, 0x69a9, 0x080c, 0xba5f, 0x080c, 0xbd01, 0x080c, 0x9c20,
- 0x080c, 0x9363, 0x00ce, 0x0804, 0x94f5, 0x2c78, 0x600c, 0x2060,
- 0x0804, 0x94f5, 0x012e, 0x000e, 0x002e, 0x006e, 0x00ce, 0x00de,
- 0x00ee, 0x00fe, 0x009e, 0x0005, 0x6020, 0x9086, 0x0006, 0x1d20,
- 0x080c, 0xd267, 0x0c08, 0x00d6, 0x080c, 0x8d84, 0x7003, 0x0200,
- 0x7007, 0x0014, 0x60c3, 0x0014, 0x20e1, 0x0001, 0x2099, 0x1961,
- 0x20e9, 0x0000, 0x20a1, 0x0250, 0x20a9, 0x0004, 0x4003, 0x7023,
- 0x0004, 0x7027, 0x7878, 0x080c, 0x8fa0, 0x00de, 0x0005, 0x080c,
- 0x8d84, 0x700b, 0x0800, 0x7814, 0x9084, 0xff00, 0x700e, 0x7814,
- 0x9084, 0x00ff, 0x7022, 0x782c, 0x7026, 0x7860, 0x9084, 0x00ff,
- 0x9085, 0x0200, 0x7002, 0x7860, 0x9084, 0xff00, 0x8007, 0x7006,
- 0x60c2, 0x0804, 0x8fa0, 0x00b6, 0x00d6, 0x0016, 0x00d6, 0x2f68,
- 0x2009, 0x0035, 0x080c, 0xbf07, 0x00de, 0x1904, 0x9628, 0x080c,
- 0x8d39, 0x7003, 0x1300, 0x782c, 0x080c, 0x9737, 0x2068, 0x6820,
- 0x9086, 0x0003, 0x0560, 0x7810, 0x2058, 0xbaa0, 0x080c, 0x9b65,
- 0x11d8, 0x9286, 0x007e, 0x1128, 0x700b, 0x00ff, 0x700f, 0xfffe,
- 0x0498, 0x9286, 0x007f, 0x1128, 0x700b, 0x00ff, 0x700f, 0xfffd,
- 0x0458, 0x9284, 0xff80, 0x0180, 0x9286, 0x0080, 0x1128, 0x700b,
- 0x00ff, 0x700f, 0xfffc, 0x0400, 0x92d8, 0x1000, 0x2b5c, 0xb810,
- 0x700a, 0xb814, 0x700e, 0x00c0, 0xb884, 0x700e, 0x00a8, 0x080c,
- 0x9b65, 0x1130, 0x7810, 0x2058, 0xb8a0, 0x9082, 0x007e, 0x0250,
- 0x00d6, 0x2069, 0x181e, 0x2d04, 0x700a, 0x8d68, 0x2d04, 0x700e,
- 0x00de, 0x0010, 0x6034, 0x700e, 0x7838, 0x7012, 0x783c, 0x7016,
- 0x60c3, 0x000c, 0x001e, 0x00de, 0x080c, 0x8fa0, 0x00be, 0x0005,
- 0x781b, 0x0001, 0x7803, 0x0006, 0x001e, 0x00de, 0x00be, 0x0005,
- 0x792c, 0x9180, 0x0008, 0x200c, 0x9186, 0x0006, 0x01c0, 0x9186,
- 0x0003, 0x0904, 0x96a7, 0x9186, 0x0005, 0x0904, 0x968f, 0x9186,
- 0x0004, 0x05f0, 0x9186, 0x0008, 0x0904, 0x9698, 0x7807, 0x0037,
- 0x782f, 0x0003, 0x7817, 0x1700, 0x080c, 0x9714, 0x0005, 0x080c,
- 0x96d5, 0x00d6, 0x0026, 0x792c, 0x2168, 0x2009, 0x4000, 0x6800,
- 0x6a44, 0xd2fc, 0x11f8, 0x0002, 0x966f, 0x967a, 0x9671, 0x967a,
- 0x9676, 0x966f, 0x966f, 0x967a, 0x967a, 0x967a, 0x967a, 0x966f,
- 0x966f, 0x966f, 0x966f, 0x966f, 0x967a, 0x966f, 0x967a, 0x080c,
- 0x0d65, 0x6824, 0xd0e4, 0x0110, 0xd0cc, 0x0110, 0x900e, 0x0010,
- 0x2009, 0x2000, 0x682c, 0x7022, 0x6830, 0x7026, 0x0804, 0x96ce,
- 0x080c, 0x96d5, 0x00d6, 0x0026, 0x792c, 0x2168, 0x2009, 0x4000,
- 0x6a00, 0x9286, 0x0002, 0x1108, 0x900e, 0x0804, 0x96ce, 0x080c,
- 0x96d5, 0x00d6, 0x0026, 0x792c, 0x2168, 0x2009, 0x4000, 0x04b0,
- 0x04e1, 0x00d6, 0x0026, 0x792c, 0x2168, 0x2009, 0x4000, 0x9286,
- 0x0005, 0x0118, 0x9286, 0x0002, 0x1108, 0x900e, 0x0438, 0x0469,
- 0x00d6, 0x0026, 0x792c, 0x2168, 0x6814, 0x6924, 0xc185, 0x6926,
- 0x0096, 0x2048, 0xa9ac, 0xa834, 0x9112, 0xa9b0, 0xa838, 0x009e,
- 0x9103, 0x7022, 0x7226, 0x792c, 0x9180, 0x0011, 0x2004, 0xd0fc,
- 0x1148, 0x9180, 0x0000, 0x2004, 0x908e, 0x0002, 0x0130, 0x908e,
- 0x0004, 0x0118, 0x2009, 0x4000, 0x0008, 0x900e, 0x712a, 0x60c3,
- 0x0018, 0x002e, 0x00de, 0x0804, 0x8fa0, 0x00b6, 0x0036, 0x0046,
- 0x0056, 0x0066, 0x080c, 0x8d84, 0x9006, 0x7003, 0x0200, 0x7938,
- 0x710a, 0x793c, 0x710e, 0x7810, 0x2058, 0xb8a0, 0x080c, 0x9b65,
- 0x1118, 0x9092, 0x007e, 0x0268, 0x00d6, 0x2069, 0x181e, 0x2d2c,
- 0x8d68, 0x2d34, 0x90d8, 0x1000, 0x2b5c, 0xbb10, 0xbc14, 0x00de,
- 0x0028, 0x901e, 0xbc84, 0x2029, 0x0000, 0x6634, 0x782c, 0x9080,
- 0x0008, 0x2004, 0x9086, 0x0003, 0x1128, 0x7512, 0x7616, 0x731a,
- 0x741e, 0x0020, 0x7312, 0x7416, 0x751a, 0x761e, 0x006e, 0x005e,
- 0x004e, 0x003e, 0x00be, 0x0005, 0x080c, 0x8d84, 0x7003, 0x0100,
- 0x782c, 0x700a, 0x7814, 0x700e, 0x700e, 0x60c3, 0x0008, 0x0804,
- 0x8fa0, 0x080c, 0x8d30, 0x7003, 0x1400, 0x7838, 0x700a, 0x0079,
- 0x783c, 0x700e, 0x782c, 0x7012, 0x7830, 0x7016, 0x7834, 0x9084,
- 0x00ff, 0x8007, 0x701a, 0x60c3, 0x0010, 0x0804, 0x8fa0, 0x00e6,
- 0x2071, 0x0240, 0x0006, 0x00f6, 0x2078, 0x7810, 0x00b6, 0x2058,
- 0xb8c4, 0xd084, 0x0120, 0x7850, 0x702a, 0x784c, 0x702e, 0x00be,
- 0x00fe, 0x000e, 0x00ee, 0x0005, 0x080c, 0x8d7b, 0x7003, 0x0100,
- 0x782c, 0x700a, 0x7814, 0x700e, 0x60c3, 0x0008, 0x0804, 0x8fa0,
- 0x00a9, 0x7914, 0x712a, 0x60c3, 0x0000, 0x60a7, 0x9575, 0x0026,
- 0x080c, 0x27dd, 0x0228, 0x2011, 0x0101, 0x2204, 0xc0c5, 0x2012,
- 0x002e, 0x080c, 0x8fc3, 0x080c, 0x8215, 0x0005, 0x0036, 0x0096,
- 0x00d6, 0x00e6, 0x7860, 0x2048, 0xaa7c, 0x9296, 0x00c0, 0x9294,
- 0xfffd, 0xaa7e, 0xaa80, 0x9294, 0x0300, 0xaa82, 0xa96c, 0x9194,
- 0x00ff, 0xab74, 0x9384, 0x00ff, 0x908d, 0xc200, 0xa96e, 0x9384,
- 0xff00, 0x9215, 0xaa76, 0xa870, 0xaa78, 0xa87a, 0xaa72, 0x00d6,
- 0x2069, 0x0200, 0x080c, 0x97f4, 0x00de, 0x20e9, 0x0000, 0x20a1,
- 0x0240, 0x20a9, 0x000a, 0xa860, 0x20e0, 0xa85c, 0x9080, 0x001b,
- 0x2098, 0x4003, 0x60a3, 0x0035, 0xaa68, 0x9294, 0x7000, 0x9286,
- 0x3000, 0x0110, 0x60a3, 0x0037, 0x00ee, 0x00de, 0x009e, 0x003e,
- 0x0005, 0x900e, 0x7814, 0x0096, 0x2048, 0xa87c, 0xd0fc, 0x01c0,
- 0x9084, 0x0003, 0x11a8, 0x2001, 0x180c, 0x2004, 0xd0bc, 0x0180,
- 0x7824, 0xd0cc, 0x1168, 0xd0c4, 0x1158, 0xa8a8, 0x9005, 0x1140,
- 0x2001, 0x180c, 0x200c, 0xc1d5, 0x2102, 0x2009, 0x198a, 0x210c,
- 0x009e, 0x918d, 0x0092, 0x0010, 0x2009, 0x0096, 0x60ab, 0x0036,
- 0x0026, 0x2110, 0x900e, 0x080c, 0x28bb, 0x002e, 0x0005, 0x2009,
- 0x0009, 0x00a0, 0x2009, 0x000a, 0x0088, 0x2009, 0x000b, 0x0070,
- 0x2009, 0x000c, 0x0058, 0x2009, 0x000d, 0x0040, 0x2009, 0x000e,
- 0x0028, 0x2009, 0x000f, 0x0010, 0x2009, 0x0008, 0x6912, 0x0005,
- 0x00d6, 0x9290, 0x0018, 0x8214, 0x20e9, 0x0000, 0x2069, 0x0200,
- 0x6813, 0x0000, 0x22a8, 0x9284, 0x00e0, 0x0128, 0x20a9, 0x0020,
- 0x9292, 0x0020, 0x0008, 0x9016, 0x20a1, 0x0240, 0x9006, 0x4004,
- 0x82ff, 0x0120, 0x6810, 0x8000, 0x6812, 0x0c60, 0x00de, 0x0005,
- 0x00f6, 0x00e6, 0x00d6, 0x00c6, 0x00a6, 0x0096, 0x0066, 0x0126,
- 0x2091, 0x8000, 0x2071, 0x19bf, 0x7610, 0x2660, 0x2678, 0x8cff,
- 0x0904, 0x98a4, 0x7030, 0x9c06, 0x1520, 0x2069, 0x0100, 0x68c0,
- 0x9005, 0x0904, 0x9876, 0x080c, 0x8fd0, 0x68c3, 0x0000, 0x080c,
- 0x948d, 0x7033, 0x0000, 0x0036, 0x2069, 0x0140, 0x6b04, 0x9384,
- 0x1000, 0x0138, 0x2001, 0x0100, 0x080c, 0x2872, 0x9006, 0x080c,
- 0x2872, 0x2069, 0x0100, 0x6824, 0xd084, 0x0110, 0x6827, 0x0001,
- 0x003e, 0x7010, 0x9c36, 0x1110, 0x660c, 0x7612, 0x700c, 0x9c36,
- 0x1140, 0x2c00, 0x9f36, 0x0118, 0x2f00, 0x700e, 0x0010, 0x700f,
- 0x0000, 0x660c, 0x0066, 0x2c00, 0x9f06, 0x0110, 0x7e0e, 0x0008,
- 0x2678, 0x600f, 0x0000, 0x080c, 0xba74, 0x1180, 0x080c, 0x305d,
- 0x080c, 0xba85, 0x1518, 0x080c, 0xa59c, 0x0400, 0x080c, 0x948d,
- 0x6824, 0xd084, 0x09b0, 0x6827, 0x0001, 0x0898, 0x080c, 0xba85,
- 0x1118, 0x080c, 0xa59c, 0x0090, 0x6014, 0x2048, 0x080c, 0xb86e,
- 0x0168, 0x6020, 0x9086, 0x0003, 0x1520, 0xa867, 0x0103, 0xab7a,
- 0xa877, 0x0000, 0x080c, 0x69b5, 0x080c, 0xba5f, 0x080c, 0xbd01,
- 0x080c, 0x9c20, 0x080c, 0x9363, 0x00ce, 0x0804, 0x9827, 0x2c78,
- 0x600c, 0x2060, 0x0804, 0x9827, 0x7013, 0x0000, 0x700f, 0x0000,
- 0x012e, 0x006e, 0x009e, 0x00ae, 0x00ce, 0x00de, 0x00ee, 0x00fe,
- 0x0005, 0x6020, 0x9086, 0x0006, 0x1d08, 0x080c, 0xd267, 0x08f0,
- 0x00f6, 0x0036, 0x2079, 0x0380, 0x7b18, 0xd3bc, 0x1de8, 0x7832,
- 0x7936, 0x7a3a, 0x781b, 0x8080, 0x003e, 0x00fe, 0x0005, 0x0016,
- 0x2001, 0x0382, 0x2004, 0x9084, 0x0007, 0x9086, 0x0001, 0x1188,
- 0x2001, 0x0015, 0x0c29, 0x2009, 0x1000, 0x2001, 0x0382, 0x2004,
- 0x9084, 0x0007, 0x9086, 0x0003, 0x0120, 0x8109, 0x1db0, 0x080c,
- 0x0d65, 0x001e, 0x0005, 0x2001, 0x0382, 0x2004, 0x9084, 0x0007,
- 0x9086, 0x0003, 0x1120, 0x2001, 0x0380, 0x2003, 0x0001, 0x0005,
- 0x0156, 0x0016, 0x0026, 0x00e6, 0x900e, 0x2071, 0x19bf, 0x0469,
- 0x0106, 0x0190, 0x7004, 0x9086, 0x0003, 0x0148, 0x20a9, 0x1000,
- 0x6044, 0xd0fc, 0x01d8, 0x1f04, 0x9900, 0x080c, 0x0d65, 0x080c,
- 0x98c7, 0x6044, 0xd0fc, 0x0190, 0x7030, 0x9c06, 0x1148, 0x080c,
- 0x8891, 0x6044, 0xd0dc, 0x0150, 0xc0dc, 0x6046, 0x700a, 0x7042,
- 0x704c, 0x9c06, 0x190c, 0x0d65, 0x080c, 0x88ec, 0x010e, 0x1919,
- 0x00ee, 0x002e, 0x001e, 0x015e, 0x0005, 0x2001, 0x0382, 0x2004,
- 0x9084, 0x0007, 0x9086, 0x0003, 0x0005, 0x0126, 0x2091, 0x2400,
- 0x7808, 0xd0a4, 0x190c, 0x0d5e, 0xd09c, 0x0128, 0x7820, 0x908c,
- 0xf000, 0x11b8, 0x0012, 0x012e, 0x0005, 0x994d, 0x998b, 0x99b2,
- 0x99e2, 0x99f2, 0x9a03, 0x9a12, 0x9a20, 0x9a31, 0x9a35, 0x994d,
- 0x994d, 0x994d, 0x994d, 0x994d, 0x994d, 0x080c, 0x0d65, 0x012e,
- 0x0005, 0x2060, 0x6044, 0xd0bc, 0x0140, 0xc0bc, 0x6046, 0x6000,
- 0x908a, 0x0016, 0x1a0c, 0x0d65, 0x0012, 0x012e, 0x0005, 0x9972,
- 0x9974, 0x9972, 0x997a, 0x9972, 0x9972, 0x9972, 0x9972, 0x9972,
- 0x9974, 0x9972, 0x9974, 0x9972, 0x9974, 0x9972, 0x9972, 0x9972,
- 0x9974, 0x9972, 0x080c, 0x0d65, 0x2009, 0x0013, 0x080c, 0x9c82,
- 0x012e, 0x0005, 0x6014, 0x2048, 0xa87c, 0xd0dc, 0x0130, 0x080c,
- 0x83d6, 0x080c, 0x9be6, 0x012e, 0x0005, 0x2009, 0x0049, 0x080c,
- 0x9c82, 0x012e, 0x0005, 0x080c, 0x98c7, 0x2001, 0x19e4, 0x2003,
- 0x0000, 0x7030, 0x9065, 0x090c, 0x0d65, 0x7034, 0x9092, 0x00c8,
- 0x1258, 0x8000, 0x7036, 0x7004, 0x9086, 0x0003, 0x0110, 0x7007,
- 0x0000, 0x781f, 0x0808, 0x0040, 0x080c, 0xd659, 0x6003, 0x0001,
- 0x2009, 0x0014, 0x080c, 0x9c82, 0x781f, 0x0100, 0x080c, 0x98e3,
- 0x012e, 0x0005, 0x080c, 0x98c7, 0x714c, 0x81ff, 0x1128, 0x2011,
- 0x19e7, 0x2013, 0x0000, 0x0400, 0x2061, 0x0100, 0x7150, 0x9192,
- 0x7530, 0x12b8, 0x8108, 0x7152, 0x714c, 0x9188, 0x0008, 0x210c,
- 0x918e, 0x0006, 0x1138, 0x6014, 0x9084, 0x1984, 0x9085, 0x0012,
- 0x6016, 0x0050, 0x6014, 0x9084, 0x1984, 0x9085, 0x0016, 0x6016,
- 0x0018, 0x706c, 0xc085, 0x706e, 0x781f, 0x0200, 0x080c, 0x98e3,
- 0x012e, 0x0005, 0x080c, 0x98c7, 0x714c, 0x2160, 0x6003, 0x0003,
- 0x2009, 0x004a, 0x080c, 0x9c82, 0x781f, 0x0200, 0x080c, 0x98e3,
- 0x012e, 0x0005, 0x7808, 0xd09c, 0x0de8, 0x7820, 0x2060, 0x6003,
- 0x0003, 0x080c, 0x98c7, 0x080c, 0x1c27, 0x781f, 0x0400, 0x080c,
- 0x98e3, 0x012e, 0x0005, 0x7808, 0xd09c, 0x0de8, 0x7820, 0x2060,
- 0x080c, 0x98c7, 0x080c, 0x1c6f, 0x781f, 0x0400, 0x080c, 0x98e3,
- 0x012e, 0x0005, 0x7030, 0x9065, 0x0148, 0x6044, 0xc0bc, 0x6046,
- 0x7104, 0x9186, 0x0003, 0x0110, 0x080c, 0x8950, 0x012e, 0x0005,
- 0x00f6, 0x703c, 0x9086, 0x0002, 0x0148, 0x704c, 0x907d, 0x0130,
- 0x7844, 0xc0bc, 0x7846, 0x080c, 0x8efa, 0x0000, 0x00fe, 0x012e,
- 0x0005, 0x080c, 0x715f, 0x012e, 0x0005, 0x080c, 0x0d65, 0x0005,
- 0x00e6, 0x2071, 0x19bf, 0x6044, 0xc0bc, 0x6046, 0xd0fc, 0x01b8,
- 0x704c, 0x9c06, 0x1190, 0x2019, 0x0001, 0x080c, 0x929d, 0x704f,
- 0x0000, 0x2001, 0x0109, 0x2004, 0xd08c, 0x1138, 0x2001, 0x0108,
- 0x2004, 0xd0bc, 0x1110, 0x703f, 0x0000, 0x080c, 0x94a4, 0x00ee,
- 0x0005, 0x0026, 0x7010, 0x9c06, 0x1178, 0x080c, 0x9363, 0x6044,
- 0xc0fc, 0x6046, 0x600c, 0x9015, 0x0120, 0x7212, 0x600f, 0x0000,
- 0x0010, 0x7212, 0x720e, 0x9006, 0x002e, 0x0005, 0x0026, 0x7020,
- 0x9c06, 0x1178, 0x080c, 0x9363, 0x6044, 0xc0fc, 0x6046, 0x600c,
- 0x9015, 0x0120, 0x7222, 0x600f, 0x0000, 0x0010, 0x7222, 0x721e,
- 0x9006, 0x002e, 0x0005, 0x00d6, 0x0036, 0x7830, 0x9c06, 0x1558,
- 0x2069, 0x0100, 0x68c0, 0x9005, 0x01f8, 0x080c, 0x821e, 0x080c,
- 0x8fd0, 0x68c3, 0x0000, 0x080c, 0x948d, 0x2069, 0x0140, 0x6b04,
- 0x9384, 0x1000, 0x0138, 0x2001, 0x0100, 0x080c, 0x2872, 0x9006,
- 0x080c, 0x2872, 0x2069, 0x0100, 0x6824, 0xd084, 0x0110, 0x6827,
- 0x0001, 0x9085, 0x0001, 0x0038, 0x7808, 0xc0ad, 0x780a, 0x6003,
- 0x0009, 0x630a, 0x9006, 0x003e, 0x00de, 0x0005, 0x0016, 0x0026,
- 0x0036, 0x6100, 0x2019, 0x0100, 0x2001, 0x0382, 0x2004, 0xd09c,
- 0x0190, 0x00c6, 0x0126, 0x2091, 0x2800, 0x0016, 0x0036, 0x080c,
- 0x992d, 0x003e, 0x001e, 0x012e, 0x00ce, 0x6200, 0x2200, 0x9106,
- 0x0d58, 0x2200, 0x0010, 0x8319, 0x1d38, 0x003e, 0x002e, 0x001e,
- 0x0005, 0x00d6, 0x0156, 0x080c, 0x8d84, 0x7a14, 0x82ff, 0x0138,
- 0x7003, 0x0100, 0x700b, 0x0003, 0x60c3, 0x0008, 0x0490, 0x7003,
- 0x0200, 0x7007, 0x0000, 0x2069, 0x1800, 0x901e, 0x6800, 0x9086,
- 0x0004, 0x1110, 0xc38d, 0x0060, 0x080c, 0x70ba, 0x1110, 0xc3ad,
- 0x0008, 0xc3a5, 0x6ad8, 0xd29c, 0x1110, 0xd2ac, 0x0108, 0xc39d,
- 0x730e, 0x2011, 0x1848, 0x63f0, 0x2312, 0x20a9, 0x0006, 0x2011,
- 0x1840, 0x2019, 0x1841, 0x2071, 0x0250, 0x2376, 0x8e70, 0x2276,
- 0x8e70, 0x9398, 0x0002, 0x9290, 0x0002, 0x1f04, 0x9b0d, 0x60c3,
- 0x0020, 0x080c, 0x8fa0, 0x015e, 0x00de, 0x0005, 0x0156, 0x080c,
- 0x8d84, 0x7a14, 0x82ff, 0x0168, 0x9286, 0xffff, 0x0118, 0x9282,
- 0x000e, 0x1238, 0x7003, 0x0100, 0x700b, 0x0003, 0x60c3, 0x0008,
- 0x0488, 0x7003, 0x0200, 0x7007, 0x001c, 0x700f, 0x0001, 0x2011,
- 0x1995, 0x2204, 0x8007, 0x701a, 0x8210, 0x2204, 0x8007, 0x701e,
- 0x0421, 0x1120, 0xb8a0, 0x9082, 0x007f, 0x0248, 0x2001, 0x181e,
- 0x2004, 0x7022, 0x2001, 0x181f, 0x2004, 0x7026, 0x0030, 0x2001,
- 0x1817, 0x2004, 0x9084, 0x00ff, 0x7026, 0x20a9, 0x0004, 0x20e1,
- 0x0001, 0x2099, 0x1805, 0x20e9, 0x0000, 0x20a1, 0x0256, 0x4003,
- 0x60c3, 0x001c, 0x015e, 0x0804, 0x8fa0, 0x0006, 0x2001, 0x1836,
- 0x2004, 0xd0ac, 0x000e, 0x0005, 0x2011, 0x0003, 0x080c, 0x9324,
- 0x2011, 0x0002, 0x080c, 0x932e, 0x080c, 0x921d, 0x0036, 0x901e,
- 0x080c, 0x929d, 0x003e, 0x0005, 0x2071, 0x188b, 0x7000, 0x9005,
- 0x0140, 0x2001, 0x0812, 0x2071, 0x1800, 0x7072, 0x7076, 0x7067,
- 0xffd4, 0x2071, 0x1800, 0x7070, 0x7052, 0x7057, 0x1ddc, 0x0005,
- 0x00e6, 0x0126, 0x2071, 0x1800, 0x2091, 0x8000, 0x7550, 0x9582,
- 0x0010, 0x0608, 0x7054, 0x2060, 0x6000, 0x9086, 0x0000, 0x0148,
- 0x9ce0, 0x001c, 0x7064, 0x9c02, 0x1208, 0x0cb0, 0x2061, 0x1ddc,
- 0x0c98, 0x6003, 0x0008, 0x8529, 0x7552, 0x9ca8, 0x001c, 0x7064,
- 0x9502, 0x1230, 0x7556, 0x9085, 0x0001, 0x012e, 0x00ee, 0x0005,
- 0x7057, 0x1ddc, 0x0cc0, 0x9006, 0x0cc0, 0x00e6, 0x2071, 0x1800,
- 0x7550, 0x9582, 0x0010, 0x0600, 0x7054, 0x2060, 0x6000, 0x9086,
- 0x0000, 0x0148, 0x9ce0, 0x001c, 0x7064, 0x9c02, 0x1208, 0x0cb0,
- 0x2061, 0x1ddc, 0x0c98, 0x6003, 0x0008, 0x8529, 0x7552, 0x9ca8,
- 0x001c, 0x7064, 0x9502, 0x1228, 0x7556, 0x9085, 0x0001, 0x00ee,
- 0x0005, 0x7057, 0x1ddc, 0x0cc8, 0x9006, 0x0cc8, 0x9c82, 0x1ddc,
- 0x0a0c, 0x0d65, 0x2001, 0x1819, 0x2004, 0x9c02, 0x1a0c, 0x0d65,
- 0x9006, 0x6006, 0x600a, 0x600e, 0x6016, 0x601a, 0x6012, 0x6023,
- 0x0000, 0x6003, 0x0000, 0x601e, 0x605e, 0x6062, 0x6026, 0x602a,
- 0x602e, 0x6032, 0x6036, 0x603a, 0x603e, 0x604a, 0x6046, 0x6042,
- 0x2061, 0x1800, 0x6050, 0x8000, 0x6052, 0x0005, 0x9006, 0x600e,
- 0x6016, 0x601a, 0x6012, 0x6022, 0x6002, 0x601e, 0x605e, 0x6062,
- 0x604a, 0x6046, 0x2061, 0x1800, 0x6050, 0x8000, 0x6052, 0x0005,
- 0x0006, 0x6000, 0x9086, 0x0000, 0x01d0, 0x601c, 0xd084, 0x190c,
- 0x193e, 0x6023, 0x0007, 0x2001, 0x195e, 0x2004, 0x0006, 0x9082,
- 0x0051, 0x000e, 0x0208, 0x8004, 0x601a, 0x080c, 0xd517, 0x604b,
- 0x0000, 0x6044, 0xd0fc, 0x1129, 0x9006, 0x6046, 0x6016, 0x000e,
- 0x0005, 0x080c, 0x98c7, 0x0106, 0x2001, 0x19d2, 0x2004, 0x9c06,
- 0x1130, 0x0036, 0x2019, 0x0001, 0x080c, 0x929d, 0x003e, 0x080c,
- 0x94a4, 0x010e, 0x090c, 0x98e3, 0x0005, 0x00e6, 0x0126, 0x2071,
- 0x1800, 0x2091, 0x8000, 0x7550, 0x9582, 0x0001, 0x0608, 0x7054,
- 0x2060, 0x6000, 0x9086, 0x0000, 0x0148, 0x9ce0, 0x001c, 0x7064,
- 0x9c02, 0x1208, 0x0cb0, 0x2061, 0x1ddc, 0x0c98, 0x6003, 0x0008,
- 0x8529, 0x7552, 0x9ca8, 0x001c, 0x7064, 0x9502, 0x1230, 0x7556,
- 0x9085, 0x0001, 0x012e, 0x00ee, 0x0005, 0x7057, 0x1ddc, 0x0cc0,
- 0x9006, 0x0cc0, 0x6020, 0x9084, 0x000f, 0x0002, 0x9c96, 0x9ca0,
- 0x9cbb, 0x9cd6, 0xbfe2, 0xbfff, 0xc01a, 0x9c96, 0x9ca0, 0x9c96,
- 0x9cf2, 0x9c96, 0x9c96, 0x9c96, 0x9c96, 0x9c96, 0x9186, 0x0013,
- 0x1130, 0x6044, 0xd0fc, 0x0110, 0x080c, 0x8891, 0x0005, 0x0005,
- 0x0066, 0x6000, 0x90b2, 0x0016, 0x1a0c, 0x0d65, 0x0013, 0x006e,
- 0x0005, 0x9cb9, 0xa40f, 0xa5e3, 0x9cb9, 0xa671, 0x9fbb, 0x9cb9,
- 0x9cb9, 0xa391, 0xac18, 0x9cb9, 0x9cb9, 0x9cb9, 0x9cb9, 0x9cb9,
- 0x9cb9, 0x080c, 0x0d65, 0x0066, 0x6000, 0x90b2, 0x0016, 0x1a0c,
- 0x0d65, 0x0013, 0x006e, 0x0005, 0x9cd4, 0xb220, 0x9cd4, 0x9cd4,
- 0x9cd4, 0x9cd4, 0x9cd4, 0x9cd4, 0xb1c2, 0xb3a3, 0x9cd4, 0xb25d,
- 0xb2e1, 0xb25d, 0xb2e1, 0x9cd4, 0x080c, 0x0d65, 0x6000, 0x9082,
- 0x0016, 0x1a0c, 0x0d65, 0x6000, 0x0002, 0x9cf0, 0xac62, 0xacf9,
- 0xae79, 0xaee8, 0x9cf0, 0x9cf0, 0x9cf0, 0xac31, 0xb143, 0xb146,
- 0x9cf0, 0x9cf0, 0x9cf0, 0x9cf0, 0xb176, 0x9cf0, 0x9cf0, 0x9cf0,
- 0x080c, 0x0d65, 0x0066, 0x6000, 0x90b2, 0x0016, 0x1a0c, 0x0d65,
- 0x0013, 0x006e, 0x0005, 0x9d0b, 0x9d0b, 0x9d49, 0x9de8, 0x9e68,
- 0x9d0b, 0x9d0b, 0x9d0b, 0x9d0d, 0x9d0b, 0x9d0b, 0x9d0b, 0x9d0b,
- 0x9d0b, 0x9d0b, 0x9d0b, 0x080c, 0x0d65, 0x9186, 0x004c, 0x0560,
- 0x9186, 0x0003, 0x190c, 0x0d65, 0x0096, 0x601c, 0xc0ed, 0x601e,
- 0x6003, 0x0003, 0x6106, 0x6014, 0x2048, 0xa87c, 0x9084, 0xa000,
- 0xc0b5, 0xa87e, 0xa8ac, 0xa836, 0xa8b0, 0xa83a, 0x9006, 0xa846,
- 0xa84a, 0xa884, 0x9092, 0x199a, 0x0210, 0x2001, 0x1999, 0x8003,
- 0x8013, 0x8213, 0x9210, 0x621a, 0x009e, 0x080c, 0x1a89, 0x2009,
- 0x8030, 0x080c, 0x852e, 0x0005, 0x6010, 0x00b6, 0x2058, 0xbca0,
- 0x00be, 0x2c00, 0x080c, 0x9e8a, 0x080c, 0xbfa7, 0x6003, 0x0007,
- 0x0005, 0x00d6, 0x0096, 0x00f6, 0x2079, 0x1800, 0x7a8c, 0x6014,
- 0x2048, 0xa87c, 0xd0ec, 0x1110, 0x9290, 0x0018, 0xac78, 0xc4fc,
- 0x0046, 0xa8e0, 0x9005, 0x1140, 0xa8dc, 0x921a, 0x0140, 0x0220,
- 0xa87b, 0x0007, 0x2010, 0x0028, 0xa87b, 0x0015, 0x0010, 0xa87b,
- 0x0000, 0x8214, 0xa883, 0x0000, 0xaa02, 0x0006, 0x0016, 0x0026,
- 0x00c6, 0x00d6, 0x00e6, 0x00f6, 0x2400, 0x9005, 0x1108, 0x009a,
- 0x2100, 0x9086, 0x0015, 0x1118, 0x2001, 0x0001, 0x0038, 0x2100,
- 0x9086, 0x0016, 0x0118, 0x2001, 0x0001, 0x002a, 0x94a4, 0x0007,
- 0x8423, 0x9405, 0x0002, 0x9db0, 0x9db0, 0x9dab, 0x9dae, 0x9db0,
- 0x9da8, 0x9d9b, 0x9d9b, 0x9d9b, 0x9d9b, 0x9d9b, 0x9d9b, 0x9d9b,
- 0x9d9b, 0x9d9b, 0x9d9b, 0x00fe, 0x00ee, 0x00de, 0x00ce, 0x002e,
- 0x001e, 0x000e, 0x004e, 0x00fe, 0x009e, 0x00de, 0x080c, 0x0d65,
- 0x080c, 0xa854, 0x0028, 0x080c, 0xa977, 0x0010, 0x080c, 0xaa66,
- 0x00fe, 0x00ee, 0x00de, 0x00ce, 0x002e, 0x001e, 0x2c00, 0xa896,
- 0x000e, 0x080c, 0x9f48, 0x0530, 0xa804, 0xa80e, 0x00a6, 0x2050,
- 0xb100, 0x00ae, 0x8006, 0x8006, 0x8007, 0x90bc, 0x003f, 0x9084,
- 0xffc0, 0x9080, 0x0002, 0xaacc, 0xabd0, 0xacd4, 0xadd8, 0x2031,
- 0x0000, 0x2041, 0x1298, 0x080c, 0xa0f3, 0x0160, 0x000e, 0x9005,
- 0x0120, 0x00fe, 0x009e, 0x00de, 0x0005, 0x00fe, 0x009e, 0x00de,
- 0x0804, 0x9be6, 0x2001, 0x002c, 0x900e, 0x080c, 0x9fae, 0x0c70,
- 0x91b6, 0x0015, 0x0170, 0x91b6, 0x0016, 0x0158, 0x91b2, 0x0047,
- 0x0a0c, 0x0d65, 0x91b2, 0x0050, 0x1a0c, 0x0d65, 0x9182, 0x0047,
- 0x0042, 0x080c, 0x9ab6, 0x0120, 0x9086, 0x0002, 0x0904, 0x9d49,
- 0x0005, 0x9e0a, 0x9e0a, 0x9e0c, 0x9e3e, 0x9e0a, 0x9e0a, 0x9e0a,
- 0x9e0a, 0x9e51, 0x080c, 0x0d65, 0x00d6, 0x0016, 0x0096, 0x6003,
- 0x0004, 0x6114, 0x2148, 0xa87c, 0xd0fc, 0x01c0, 0xa878, 0xc0fc,
- 0x9005, 0x1158, 0xa894, 0x9005, 0x0140, 0x2001, 0x0000, 0x900e,
- 0x080c, 0x9fae, 0x080c, 0x9be6, 0x00a8, 0x6003, 0x0002, 0xa8a4,
- 0xa9a8, 0x9105, 0x1178, 0xa8ae, 0xa8b2, 0x0c78, 0xa87f, 0x0020,
- 0xa88c, 0xa88a, 0xa8a4, 0xa8ae, 0xa8a8, 0xa8b2, 0xa8c7, 0x0000,
- 0xa8cb, 0x0000, 0x009e, 0x001e, 0x00de, 0x0005, 0x080c, 0x88ec,
- 0x00d6, 0x0096, 0x6114, 0x2148, 0x080c, 0xb870, 0x0120, 0xa87b,
- 0x0006, 0x080c, 0x69b5, 0x009e, 0x00de, 0x080c, 0x9be6, 0x0804,
- 0x894f, 0x080c, 0x88ec, 0x080c, 0x302e, 0x080c, 0xbfa4, 0x00d6,
- 0x0096, 0x6114, 0x2148, 0x080c, 0xb870, 0x0120, 0xa87b, 0x0029,
- 0x080c, 0x69b5, 0x009e, 0x00de, 0x080c, 0x9be6, 0x0804, 0x894f,
- 0x9182, 0x0047, 0x0002, 0x9e78, 0x9e7a, 0x9e78, 0x9e78, 0x9e78,
- 0x9e78, 0x9e78, 0x9e78, 0x9e78, 0x9e78, 0x9e78, 0x9e78, 0x9e7a,
- 0x080c, 0x0d65, 0x00d6, 0x0096, 0x080c, 0x15af, 0x6114, 0x2148,
- 0xa87b, 0x0000, 0xa883, 0x0000, 0x080c, 0x69b5, 0x009e, 0x00de,
- 0x0804, 0x9be6, 0x0026, 0x0036, 0x0056, 0x0066, 0x0096, 0x00a6,
- 0x00f6, 0x0006, 0x080c, 0x102f, 0x000e, 0x090c, 0x0d65, 0xa960,
- 0x21e8, 0xa95c, 0x9188, 0x0019, 0x21a0, 0x900e, 0x20a9, 0x0020,
- 0x4104, 0xa87a, 0x2079, 0x1800, 0x798c, 0x9188, 0x0018, 0x918c,
- 0x0fff, 0xa972, 0xac76, 0x2950, 0x00a6, 0x2001, 0x0205, 0x2003,
- 0x0000, 0x901e, 0x2029, 0x0001, 0x9182, 0x0034, 0x1228, 0x2011,
- 0x001f, 0x080c, 0xb426, 0x04c0, 0x2130, 0x2009, 0x0034, 0x2011,
- 0x001f, 0x080c, 0xb426, 0x96b2, 0x0034, 0xb004, 0x904d, 0x0110,
- 0x080c, 0x0fe1, 0x080c, 0x102f, 0x01d0, 0x8528, 0xa867, 0x0110,
- 0xa86b, 0x0000, 0x2920, 0xb406, 0x968a, 0x003d, 0x1230, 0x2608,
- 0x2011, 0x001b, 0x080c, 0xb426, 0x00b8, 0x96b2, 0x003c, 0x2009,
- 0x003c, 0x2950, 0x2011, 0x001b, 0x080c, 0xb426, 0x0c18, 0x2001,
- 0x0205, 0x2003, 0x0000, 0x00ae, 0x852f, 0x95ad, 0x0050, 0xb566,
- 0xb070, 0xc0fd, 0xb072, 0x0048, 0x2001, 0x0205, 0x2003, 0x0000,
- 0x00ae, 0x852f, 0x95ad, 0x0050, 0xb566, 0x2a48, 0xa804, 0xa807,
- 0x0000, 0x0006, 0x080c, 0x69b5, 0x000e, 0x2048, 0x9005, 0x1db0,
- 0x00fe, 0x00ae, 0x009e, 0x006e, 0x005e, 0x003e, 0x002e, 0x0005,
- 0x00d6, 0x00f6, 0x0096, 0x0006, 0x080c, 0x102f, 0x000e, 0x090c,
- 0x0d65, 0xa960, 0x21e8, 0xa95c, 0x9188, 0x0019, 0x21a0, 0x900e,
- 0x20a9, 0x0020, 0x4104, 0xaa66, 0xa87a, 0x2079, 0x1800, 0x798c,
- 0x810c, 0x9188, 0x000c, 0x9182, 0x001a, 0x0210, 0x2009, 0x001a,
- 0x21a8, 0x810b, 0xa972, 0xac76, 0x2e98, 0xa85c, 0x9080, 0x001f,
- 0x20a0, 0x2001, 0x0205, 0x200c, 0x918d, 0x0080, 0x2102, 0x4003,
- 0x2003, 0x0000, 0x080c, 0x69b5, 0x009e, 0x00fe, 0x00de, 0x0005,
- 0x0016, 0x00d6, 0x00f6, 0x0096, 0x0016, 0x2001, 0x0205, 0x200c,
- 0x918d, 0x0080, 0x2102, 0x001e, 0x2079, 0x0200, 0x2e98, 0xa87c,
- 0xd0ec, 0x0118, 0x9e80, 0x000c, 0x2098, 0x2021, 0x003e, 0x901e,
- 0x9282, 0x0020, 0x0218, 0x2011, 0x0020, 0x2018, 0x9486, 0x003e,
- 0x1170, 0x0096, 0x080c, 0x102f, 0x2900, 0x009e, 0x05c0, 0xa806,
- 0x2048, 0xa860, 0x20e8, 0xa85c, 0x9080, 0x0002, 0x20a0, 0x3300,
- 0x908e, 0x0260, 0x0140, 0x2009, 0x0280, 0x9102, 0x920a, 0x0218,
- 0x2010, 0x2100, 0x9318, 0x2200, 0x9402, 0x1228, 0x2400, 0x9202,
- 0x2410, 0x9318, 0x9006, 0x2020, 0x22a8, 0xa800, 0x9200, 0xa802,
- 0x20e1, 0x0000, 0x4003, 0x83ff, 0x0180, 0x3300, 0x9086, 0x0280,
- 0x1130, 0x7814, 0x8000, 0x9085, 0x0080, 0x7816, 0x2e98, 0x2310,
- 0x84ff, 0x0904, 0x9f5d, 0x0804, 0x9f5f, 0x9085, 0x0001, 0x7817,
- 0x0000, 0x009e, 0x00fe, 0x00de, 0x001e, 0x0005, 0x00d6, 0x0036,
- 0x0096, 0x6314, 0x2348, 0xa87a, 0xa982, 0x080c, 0x69a9, 0x009e,
- 0x003e, 0x00de, 0x0005, 0x91b6, 0x0015, 0x1118, 0x080c, 0x9be6,
- 0x0030, 0x91b6, 0x0016, 0x190c, 0x0d65, 0x080c, 0x9be6, 0x0005,
- 0x20a9, 0x000e, 0x20e1, 0x0000, 0x2e98, 0x6014, 0x0096, 0x2048,
- 0xa860, 0x20e8, 0xa85c, 0x20a0, 0x009e, 0x4003, 0x0136, 0x9080,
- 0x001b, 0x20a0, 0x2011, 0x0006, 0x20a9, 0x0001, 0x3418, 0x8318,
- 0x23a0, 0x4003, 0x3318, 0x8318, 0x2398, 0x8211, 0x1db8, 0x2011,
- 0x0006, 0x013e, 0x20a0, 0x3318, 0x8318, 0x2398, 0x4003, 0x3418,
- 0x8318, 0x23a0, 0x8211, 0x1db8, 0x0096, 0x080c, 0xb870, 0x0130,
- 0x6014, 0x2048, 0xa807, 0x0000, 0xa867, 0x0103, 0x009e, 0x0804,
- 0x9be6, 0x0096, 0x00d6, 0x0036, 0x7330, 0x9386, 0x0200, 0x11a8,
- 0x6010, 0x00b6, 0x2058, 0xb8c7, 0x0000, 0x00be, 0x6014, 0x9005,
- 0x0130, 0x2048, 0xa807, 0x0000, 0xa867, 0x0103, 0xab32, 0x080c,
- 0x9be6, 0x003e, 0x00de, 0x009e, 0x0005, 0x0011, 0x1d48, 0x0cc8,
- 0x0006, 0x0016, 0x080c, 0xbf8f, 0x0188, 0x6014, 0x9005, 0x1170,
- 0x600b, 0x0003, 0x601b, 0x0000, 0x604b, 0x0000, 0x2009, 0x0022,
- 0x080c, 0xa3e7, 0x9006, 0x001e, 0x000e, 0x0005, 0x9085, 0x0001,
- 0x0cd0, 0x0096, 0x0016, 0x20a9, 0x0014, 0x9e80, 0x000c, 0x20e1,
- 0x0000, 0x2098, 0x6014, 0x2048, 0xa860, 0x20e8, 0xa85c, 0x9080,
- 0x0002, 0x20a0, 0x4003, 0x2001, 0x0205, 0x2003, 0x0001, 0x2099,
- 0x0260, 0x20a9, 0x0016, 0x4003, 0x20a9, 0x000a, 0xa804, 0x2048,
- 0xa860, 0x20e8, 0xa85c, 0x9080, 0x0002, 0x20a0, 0x4003, 0x2001,
- 0x0205, 0x2003, 0x0002, 0x2099, 0x0260, 0x20a9, 0x0020, 0x4003,
- 0x2003, 0x0000, 0x6014, 0x2048, 0xa800, 0x2048, 0xa867, 0x0103,
- 0x080c, 0x9be6, 0x001e, 0x009e, 0x0005, 0x0096, 0x0016, 0x900e,
- 0x7030, 0x9086, 0x0100, 0x0140, 0x7038, 0x9084, 0x00ff, 0x800c,
- 0x703c, 0x9084, 0x00ff, 0x8004, 0x9080, 0x0004, 0x9108, 0x810b,
- 0x2011, 0x0002, 0x2019, 0x000c, 0x6014, 0x2048, 0x080c, 0xb426,
- 0x080c, 0xb870, 0x0140, 0x6014, 0x2048, 0xa807, 0x0000, 0xa864,
- 0xa8e2, 0xa867, 0x0103, 0x080c, 0x9be6, 0x001e, 0x009e, 0x0005,
- 0x0016, 0x0096, 0x7030, 0x9086, 0x0100, 0x1118, 0x2009, 0x0004,
- 0x0010, 0x7034, 0x800c, 0x810b, 0x2011, 0x000c, 0x2019, 0x000c,
- 0x6014, 0x2048, 0xa804, 0x0096, 0x9005, 0x0108, 0x2048, 0x080c,
- 0xb426, 0x009e, 0x080c, 0xb870, 0x0148, 0xa804, 0x9005, 0x1158,
- 0xa807, 0x0000, 0xa864, 0xa8e2, 0xa867, 0x0103, 0x080c, 0x9be6,
- 0x009e, 0x001e, 0x0005, 0x0086, 0x2040, 0xa030, 0x8007, 0x9086,
- 0x0100, 0x1118, 0x080c, 0xa59c, 0x00e0, 0xa034, 0x8007, 0x800c,
- 0x8806, 0x8006, 0x8007, 0x90bc, 0x003f, 0x9084, 0xffc0, 0x9080,
- 0x000c, 0xa87b, 0x0000, 0xa883, 0x0000, 0xa897, 0x4000, 0xaaa0,
- 0xab9c, 0xaca8, 0xada4, 0x2031, 0x0000, 0x2041, 0x127e, 0x0019,
- 0x0d08, 0x008e, 0x0898, 0x0096, 0x0006, 0x080c, 0x102f, 0x000e,
- 0x01b0, 0xa8ab, 0x0dcb, 0xa876, 0x000e, 0xa8a2, 0x0006, 0xae6a,
- 0x2800, 0xa89e, 0xa97a, 0xaf72, 0xaa8e, 0xab92, 0xac96, 0xad9a,
- 0x0086, 0x2940, 0x080c, 0x1124, 0x008e, 0x9085, 0x0001, 0x009e,
- 0x0005, 0x00e6, 0x00d6, 0x0026, 0x7008, 0x9084, 0x00ff, 0x6210,
- 0x00b6, 0x2258, 0xba10, 0x00be, 0x9206, 0x1520, 0x700c, 0x6210,
- 0x00b6, 0x2258, 0xba14, 0x00be, 0x9206, 0x11e0, 0x604b, 0x0000,
- 0x2c68, 0x0016, 0x2009, 0x0035, 0x080c, 0xbf07, 0x001e, 0x1158,
- 0x622c, 0x2268, 0x2071, 0x026c, 0x6b20, 0x9386, 0x0003, 0x0130,
- 0x9386, 0x0006, 0x0128, 0x080c, 0x9be6, 0x0020, 0x0039, 0x0010,
- 0x080c, 0xa21c, 0x002e, 0x00de, 0x00ee, 0x0005, 0x0096, 0x6814,
- 0x2048, 0x9186, 0x0015, 0x0904, 0xa1fb, 0x918e, 0x0016, 0x1904,
- 0xa21a, 0x700c, 0x908c, 0xff00, 0x9186, 0x1700, 0x0120, 0x9186,
- 0x0300, 0x1904, 0xa1d5, 0x89ff, 0x1138, 0x6800, 0x9086, 0x000f,
- 0x0904, 0xa1b7, 0x0804, 0xa218, 0x6808, 0x9086, 0xffff, 0x1904,
- 0xa1fd, 0xa87c, 0x9084, 0x0060, 0x9086, 0x0020, 0x1128, 0xa83c,
- 0xa940, 0x9105, 0x1904, 0xa1fd, 0x6824, 0xd084, 0x1904, 0xa1fd,
- 0xd0b4, 0x0158, 0x0016, 0x2001, 0x195e, 0x200c, 0x6018, 0x9102,
- 0x9082, 0x0005, 0x001e, 0x1a04, 0xa1fd, 0x080c, 0xba5f, 0x6864,
- 0xa882, 0xa87c, 0xc0dc, 0xc0f4, 0xc0d4, 0xa87e, 0x0026, 0x900e,
- 0x6a18, 0x2001, 0x000a, 0x080c, 0x842f, 0xa884, 0x920a, 0x0208,
- 0x8011, 0xaa86, 0x82ff, 0x002e, 0x1138, 0x00c6, 0x2d60, 0x080c,
- 0xb579, 0x00ce, 0x0804, 0xa218, 0x00c6, 0xa868, 0xd0fc, 0x1118,
- 0x080c, 0x5d71, 0x0010, 0x080c, 0x611a, 0x00ce, 0x1904, 0xa1fd,
- 0x00c6, 0x2d60, 0x080c, 0x9be6, 0x00ce, 0x0804, 0xa218, 0x00c6,
- 0x080c, 0x9c55, 0x0198, 0x6017, 0x0000, 0x6810, 0x6012, 0x080c,
- 0xbd09, 0x6023, 0x0003, 0x6904, 0x00c6, 0x2d60, 0x080c, 0x9be6,
- 0x00ce, 0x080c, 0x9c82, 0x00ce, 0x0804, 0xa218, 0x2001, 0x1960,
- 0x2004, 0x684a, 0x00ce, 0x0804, 0xa218, 0x7008, 0x9086, 0x000b,
- 0x11c8, 0x6010, 0x00b6, 0x2058, 0xb900, 0xc1bc, 0xb902, 0x00be,
- 0x00c6, 0x2d60, 0xa87b, 0x0003, 0x080c, 0xbf49, 0x6007, 0x0085,
- 0x6003, 0x000b, 0x6023, 0x0002, 0x2009, 0x8020, 0x080c, 0x84e7,
- 0x00ce, 0x0430, 0x700c, 0x9086, 0x2a00, 0x1138, 0x2001, 0x1960,
- 0x2004, 0x684a, 0x00e8, 0x04c1, 0x00e8, 0x89ff, 0x090c, 0x0d65,
- 0x00c6, 0x00d6, 0x2d60, 0xa867, 0x0103, 0xa87b, 0x0003, 0x080c,
- 0x67cb, 0x080c, 0xba5f, 0x080c, 0x9c20, 0x0026, 0x6010, 0x00b6,
- 0x2058, 0xba3c, 0x080c, 0x63ba, 0x00be, 0x002e, 0x00de, 0x00ce,
- 0x080c, 0x9be6, 0x009e, 0x0005, 0x9186, 0x0015, 0x1128, 0x2001,
- 0x1960, 0x2004, 0x684a, 0x0068, 0x918e, 0x0016, 0x1160, 0x00c6,
- 0x2d00, 0x2060, 0x080c, 0xd517, 0x080c, 0x83d6, 0x080c, 0x9be6,
- 0x00ce, 0x080c, 0x9be6, 0x0005, 0x0026, 0x0036, 0x0046, 0x7228,
- 0xacb0, 0xabac, 0xd2f4, 0x0130, 0x2001, 0x1960, 0x2004, 0x684a,
- 0x0804, 0xa296, 0x00c6, 0x2d60, 0x080c, 0xb451, 0x00ce, 0x6804,
- 0x9086, 0x0050, 0x1168, 0x00c6, 0x2d00, 0x2060, 0x6003, 0x0001,
- 0x6007, 0x0050, 0x2009, 0x8023, 0x080c, 0x84e7, 0x00ce, 0x04f0,
- 0x6800, 0x9086, 0x000f, 0x01a8, 0x89ff, 0x090c, 0x0d65, 0x6800,
- 0x9086, 0x0004, 0x1190, 0xa87c, 0xd0ac, 0x0178, 0xa843, 0x0fff,
- 0xa83f, 0x0fff, 0xa880, 0xc0fc, 0xa882, 0x2001, 0x0001, 0x6832,
- 0x0400, 0x2001, 0x0007, 0x6832, 0x00e0, 0xa87c, 0xd0b4, 0x1150,
- 0xd0ac, 0x0db8, 0x6824, 0xd0f4, 0x1d48, 0xa838, 0xa934, 0x9105,
- 0x0d80, 0x0c20, 0xd2ec, 0x1d68, 0x7024, 0x9306, 0x1118, 0x7020,
- 0x9406, 0x0d38, 0x7020, 0x683e, 0x7024, 0x683a, 0x2001, 0x0005,
- 0x6832, 0x080c, 0xbbf3, 0x080c, 0x894f, 0x0010, 0x080c, 0x9be6,
- 0x004e, 0x003e, 0x002e, 0x0005, 0x00e6, 0x00d6, 0x0026, 0x7008,
- 0x9084, 0x00ff, 0x6210, 0x00b6, 0x2258, 0xba10, 0x00be, 0x9206,
- 0x1904, 0xa301, 0x700c, 0x6210, 0x00b6, 0x2258, 0xba14, 0x00be,
- 0x9206, 0x1904, 0xa301, 0x6038, 0x2068, 0x6824, 0xc0dc, 0x6826,
- 0x6a20, 0x9286, 0x0007, 0x0904, 0xa301, 0x9286, 0x0002, 0x0904,
- 0xa301, 0x9286, 0x0000, 0x05e8, 0x6808, 0x633c, 0x9306, 0x15c8,
- 0x2071, 0x026c, 0x9186, 0x0015, 0x0570, 0x918e, 0x0016, 0x1100,
- 0x00c6, 0x6038, 0x2060, 0x6104, 0x9186, 0x004b, 0x01c0, 0x9186,
- 0x004c, 0x01a8, 0x9186, 0x004d, 0x0190, 0x9186, 0x004e, 0x0178,
- 0x9186, 0x0052, 0x0160, 0x6014, 0x0096, 0x2048, 0x080c, 0xb870,
- 0x090c, 0x0d65, 0xa87b, 0x0003, 0x009e, 0x080c, 0xbf49, 0x6007,
- 0x0085, 0x6003, 0x000b, 0x6023, 0x0002, 0x2009, 0x8020, 0x080c,
- 0x84e7, 0x00ce, 0x0030, 0x6038, 0x2070, 0x2001, 0x1960, 0x2004,
- 0x704a, 0x080c, 0x9be6, 0x002e, 0x00de, 0x00ee, 0x0005, 0x00b6,
- 0x0096, 0x00f6, 0x6014, 0x2048, 0x6010, 0x2058, 0x91b6, 0x0015,
- 0x0130, 0xba08, 0xbb0c, 0xbc00, 0xc48c, 0xbc02, 0x0460, 0x0096,
- 0x0156, 0x0036, 0x0026, 0x2b48, 0x9e90, 0x0010, 0x2019, 0x000a,
- 0x20a9, 0x0004, 0x080c, 0xabee, 0x002e, 0x003e, 0x015e, 0x009e,
- 0x1904, 0xa370, 0x0096, 0x0156, 0x0036, 0x0026, 0x2b48, 0x9e90,
- 0x0014, 0x2019, 0x0006, 0x20a9, 0x0004, 0x080c, 0xabee, 0x002e,
- 0x003e, 0x015e, 0x009e, 0x15a0, 0x7238, 0xba0a, 0x733c, 0xbb0e,
- 0xbc00, 0xc48d, 0xbc02, 0xa804, 0x9005, 0x1128, 0x00fe, 0x009e,
- 0x00be, 0x0804, 0x9ff4, 0x0096, 0x2048, 0xaa12, 0xab16, 0xac0a,
- 0x009e, 0x8006, 0x8006, 0x8007, 0x90bc, 0x003f, 0x9084, 0xffc0,
- 0x9080, 0x0002, 0x2009, 0x002b, 0xaaa0, 0xab9c, 0xaca8, 0xada4,
- 0x2031, 0x0000, 0x2041, 0x127e, 0x080c, 0xa0f3, 0x0130, 0x00fe,
- 0x009e, 0x080c, 0x9be6, 0x00be, 0x0005, 0x080c, 0xa59c, 0x0cb8,
- 0x2b78, 0x00f6, 0x080c, 0x302e, 0x080c, 0xbfa4, 0x00fe, 0x00c6,
- 0x080c, 0x9b90, 0x2f00, 0x6012, 0x6017, 0x0000, 0x6023, 0x0001,
- 0x6007, 0x0001, 0x6003, 0x0001, 0x2001, 0x0007, 0x080c, 0x61e0,
- 0x080c, 0x620c, 0x080c, 0x84ee, 0x080c, 0x894f, 0x00ce, 0x0804,
- 0xa343, 0x2100, 0x91b2, 0x0053, 0x1a0c, 0x0d65, 0x91b2, 0x0040,
- 0x1a04, 0xa3f9, 0x0002, 0xa3e7, 0xa3e7, 0xa3dd, 0xa3e7, 0xa3e7,
- 0xa3e7, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db,
- 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db,
- 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db,
- 0xa3db, 0xa3db, 0xa3e7, 0xa3db, 0xa3e7, 0xa3e7, 0xa3db, 0xa3db,
- 0xa3db, 0xa3db, 0xa3db, 0xa3dd, 0xa3db, 0xa3db, 0xa3db, 0xa3db,
- 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3e7, 0xa3e7, 0xa3db,
- 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db, 0xa3db,
- 0xa3e7, 0xa3db, 0xa3db, 0x080c, 0x0d65, 0x0066, 0x00b6, 0x6610,
- 0x2658, 0xb8c4, 0xc08c, 0xb8c6, 0x00be, 0x006e, 0x0000, 0x6003,
- 0x0001, 0x6106, 0x9186, 0x0032, 0x0118, 0x080c, 0x84ee, 0x0010,
- 0x080c, 0x84e7, 0x0126, 0x2091, 0x8000, 0x080c, 0x894f, 0x012e,
- 0x0005, 0x2600, 0x0002, 0xa40d, 0xa40d, 0xa40d, 0xa3e7, 0xa3e7,
- 0xa40d, 0xa40d, 0xa40d, 0xa40d, 0xa3e7, 0xa40d, 0xa3e7, 0xa40d,
- 0xa3e7, 0xa40d, 0xa40d, 0xa40d, 0xa40d, 0x080c, 0x0d65, 0x6004,
- 0x90b2, 0x0053, 0x1a0c, 0x0d65, 0x91b6, 0x0013, 0x0904, 0xa4e4,
- 0x91b6, 0x0027, 0x1904, 0xa490, 0x080c, 0x8891, 0x6004, 0x080c,
- 0xba74, 0x01b0, 0x080c, 0xba85, 0x01a8, 0x908e, 0x0021, 0x0904,
- 0xa48d, 0x908e, 0x0022, 0x1130, 0x080c, 0xa020, 0x0904, 0xa489,
- 0x0804, 0xa48a, 0x908e, 0x003d, 0x0904, 0xa48d, 0x0804, 0xa483,
- 0x080c, 0x305d, 0x2001, 0x0007, 0x080c, 0x61e0, 0x6010, 0x00b6,
- 0x2058, 0xb9a0, 0x00be, 0x080c, 0xa59c, 0x9186, 0x007e, 0x1148,
- 0x2001, 0x1836, 0x2014, 0xc285, 0x080c, 0x70ba, 0x1108, 0xc2ad,
- 0x2202, 0x080c, 0x98c7, 0x0036, 0x0026, 0x2019, 0x0028, 0x2110,
- 0x080c, 0xd572, 0x002e, 0x003e, 0x0016, 0x0026, 0x0036, 0x2110,
- 0x2019, 0x0028, 0x080c, 0x8658, 0x0076, 0x903e, 0x080c, 0x853d,
- 0x6010, 0x00b6, 0x905d, 0x0100, 0x00be, 0x2c08, 0x080c, 0xd011,
- 0x007e, 0x003e, 0x002e, 0x001e, 0x080c, 0x98e3, 0x080c, 0xbfa4,
- 0x0016, 0x080c, 0xbd01, 0x080c, 0x9be6, 0x001e, 0x080c, 0x3136,
- 0x080c, 0x894f, 0x0030, 0x080c, 0xbd01, 0x080c, 0x9be6, 0x080c,
- 0x894f, 0x0005, 0x080c, 0xa59c, 0x0cb0, 0x080c, 0xa5d8, 0x0c98,
- 0x9186, 0x0015, 0x0118, 0x9186, 0x0016, 0x1140, 0x080c, 0x9ab6,
- 0x0d80, 0x9086, 0x0002, 0x0904, 0xa5e3, 0x0c58, 0x9186, 0x0014,
- 0x1d40, 0x080c, 0x8891, 0x6004, 0x908e, 0x0022, 0x1118, 0x080c,
- 0xa020, 0x09f8, 0x080c, 0x302e, 0x080c, 0xbfa4, 0x080c, 0xba74,
- 0x1190, 0x080c, 0x305d, 0x6010, 0x00b6, 0x2058, 0xb9a0, 0x00be,
- 0x080c, 0xa59c, 0x9186, 0x007e, 0x1128, 0x2001, 0x1836, 0x200c,
- 0xc185, 0x2102, 0x0800, 0x080c, 0xba85, 0x1120, 0x080c, 0xa59c,
- 0x0804, 0xa483, 0x6004, 0x908e, 0x0032, 0x1160, 0x00e6, 0x00f6,
- 0x2071, 0x189c, 0x2079, 0x0000, 0x080c, 0x33d0, 0x00fe, 0x00ee,
- 0x0804, 0xa483, 0x6004, 0x908e, 0x0021, 0x0d40, 0x908e, 0x0022,
- 0x090c, 0xa59c, 0x0804, 0xa483, 0x90b2, 0x0040, 0x1a04, 0xa585,
- 0x2008, 0x0002, 0xa52c, 0xa52d, 0xa530, 0xa533, 0xa536, 0xa539,
- 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a,
- 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a,
- 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa52a,
- 0xa53c, 0xa547, 0xa52a, 0xa548, 0xa547, 0xa52a, 0xa52a, 0xa52a,
- 0xa52a, 0xa52a, 0xa547, 0xa547, 0xa52a, 0xa52a, 0xa52a, 0xa52a,
- 0xa52a, 0xa52a, 0xa52a, 0xa52a, 0xa570, 0xa547, 0xa52a, 0xa543,
- 0xa52a, 0xa52a, 0xa52a, 0xa544, 0xa52a, 0xa52a, 0xa52a, 0xa547,
- 0xa56b, 0xa52a, 0x080c, 0x0d65, 0x00d0, 0x2001, 0x000b, 0x00f8,
- 0x2001, 0x0003, 0x00e0, 0x2001, 0x0005, 0x00c8, 0x2001, 0x0001,
- 0x00b0, 0x2001, 0x0009, 0x0098, 0x6003, 0x0005, 0x080c, 0xbfa7,
- 0x080c, 0x894f, 0x0058, 0x0018, 0x0010, 0x080c, 0x61e0, 0x04b8,
- 0x080c, 0xbfa7, 0x6003, 0x0004, 0x080c, 0x894f, 0x0005, 0x080c,
- 0x61e0, 0x6003, 0x0002, 0x0036, 0x2019, 0x1866, 0x2304, 0x9084,
- 0xff00, 0x1120, 0x2001, 0x195e, 0x201c, 0x0040, 0x8007, 0x909a,
- 0x0004, 0x0ec0, 0x8003, 0x801b, 0x831b, 0x9318, 0x631a, 0x003e,
- 0x080c, 0x894f, 0x0c18, 0x080c, 0xbd01, 0x080c, 0x9be6, 0x08f0,
- 0x00e6, 0x00f6, 0x2071, 0x189c, 0x2079, 0x0000, 0x080c, 0x33d0,
- 0x00fe, 0x00ee, 0x080c, 0x8891, 0x080c, 0x9be6, 0x0878, 0x6003,
- 0x0002, 0x080c, 0xbfa7, 0x0804, 0x894f, 0x2600, 0x2008, 0x0002,
- 0xa59a, 0xa59a, 0xa59a, 0xa57f, 0xa57f, 0xa59a, 0xa59a, 0xa59a,
- 0xa59a, 0xa57f, 0xa59a, 0xa57f, 0xa59a, 0xa57f, 0xa59a, 0xa59a,
- 0xa59a, 0xa59a, 0x080c, 0x0d65, 0x00e6, 0x0096, 0x0026, 0x0016,
- 0x080c, 0xb870, 0x0568, 0x6014, 0x2048, 0xa864, 0x9086, 0x0139,
- 0x11a8, 0xa894, 0x9086, 0x0056, 0x1148, 0x080c, 0x5149, 0x0130,
- 0x2001, 0x0000, 0x900e, 0x2011, 0x4000, 0x0028, 0x2001, 0x0030,
- 0x900e, 0x2011, 0x4005, 0x080c, 0xbe6e, 0x0090, 0xa868, 0xd0fc,
- 0x0178, 0xa807, 0x0000, 0x0016, 0x6004, 0x908e, 0x0021, 0x0168,
- 0x908e, 0x003d, 0x0150, 0x001e, 0xa867, 0x0103, 0xa833, 0x0100,
- 0x001e, 0x002e, 0x009e, 0x00ee, 0x0005, 0x001e, 0x0009, 0x0cc0,
- 0x0096, 0x6014, 0x2048, 0xa800, 0x2048, 0xa867, 0x0103, 0xa823,
- 0x8001, 0x009e, 0x0005, 0x00b6, 0x6610, 0x2658, 0xb804, 0x9084,
- 0x00ff, 0x90b2, 0x000c, 0x1a0c, 0x0d65, 0x6604, 0x96b6, 0x004d,
- 0x1120, 0x080c, 0xbd8d, 0x0804, 0xa660, 0x6604, 0x96b6, 0x0043,
- 0x1120, 0x080c, 0xbdd6, 0x0804, 0xa660, 0x6604, 0x96b6, 0x004b,
- 0x1120, 0x080c, 0xbe02, 0x0804, 0xa660, 0x6604, 0x96b6, 0x0033,
- 0x1120, 0x080c, 0xbd23, 0x0804, 0xa660, 0x6604, 0x96b6, 0x0028,
- 0x1120, 0x080c, 0xbac3, 0x0804, 0xa660, 0x6604, 0x96b6, 0x0029,
- 0x1120, 0x080c, 0xbb04, 0x0804, 0xa660, 0x6604, 0x96b6, 0x001f,
- 0x1118, 0x080c, 0x9fc8, 0x04e0, 0x6604, 0x96b6, 0x0000, 0x1118,
- 0x080c, 0xa307, 0x04a8, 0x6604, 0x96b6, 0x0022, 0x1118, 0x080c,
- 0xa001, 0x0470, 0x6604, 0x96b6, 0x0035, 0x1118, 0x080c, 0xa111,
- 0x0438, 0x6604, 0x96b6, 0x0039, 0x1118, 0x080c, 0xa29c, 0x0400,
- 0x6604, 0x96b6, 0x003d, 0x1118, 0x080c, 0xa039, 0x00c8, 0x6604,
- 0x96b6, 0x0044, 0x1118, 0x080c, 0xa075, 0x0090, 0x6604, 0x96b6,
- 0x0049, 0x1118, 0x080c, 0xa0a0, 0x0058, 0x91b6, 0x0015, 0x1110,
- 0x0063, 0x0030, 0x91b6, 0x0016, 0x1128, 0x00be, 0x0804, 0xa920,
- 0x00be, 0x0005, 0x080c, 0x9c9f, 0x0cd8, 0xa67d, 0xa680, 0xa67d,
- 0xa6c4, 0xa67d, 0xa854, 0xa92d, 0xa67d, 0xa67d, 0xa8fa, 0xa67d,
- 0xa90e, 0x0096, 0x080c, 0x15af, 0x6014, 0x2048, 0xa800, 0x2048,
- 0xa867, 0x0103, 0x009e, 0x0804, 0x9be6, 0xa001, 0xa001, 0x0005,
- 0x00e6, 0x2071, 0x1800, 0x708c, 0x9086, 0x0074, 0x1540, 0x080c,
- 0xcfe2, 0x11b0, 0x6010, 0x00b6, 0x2058, 0x7030, 0xd08c, 0x0128,
- 0xb800, 0xd0bc, 0x0110, 0xc0c5, 0xb802, 0x00e9, 0x00be, 0x2001,
- 0x0006, 0x080c, 0x61e0, 0x080c, 0x305d, 0x080c, 0x9be6, 0x0088,
- 0x2001, 0x000a, 0x080c, 0x61e0, 0x080c, 0x305d, 0x6003, 0x0001,
- 0x6007, 0x0001, 0x080c, 0x84ee, 0x080c, 0x894f, 0x0010, 0x080c,
- 0xa83f, 0x00ee, 0x0005, 0x00d6, 0xb800, 0xd084, 0x0158, 0x9006,
- 0x080c, 0x61cc, 0x2069, 0x185b, 0x6804, 0x0020, 0x2001, 0x0006,
- 0x080c, 0x620c, 0x00de, 0x0005, 0x00b6, 0x0096, 0x00d6, 0x2011,
- 0x1823, 0x2204, 0x9086, 0x0074, 0x1904, 0xa816, 0x6010, 0x2058,
- 0xbaa0, 0x9286, 0x007e, 0x1120, 0x080c, 0xaa71, 0x0804, 0xa77b,
- 0x00d6, 0x080c, 0x70ba, 0x0198, 0x0026, 0x2011, 0x0010, 0x080c,
- 0x66ae, 0x002e, 0x05c8, 0x080c, 0x53bc, 0x1540, 0x6014, 0x2048,
- 0xa807, 0x0000, 0xa867, 0x0103, 0xa833, 0xdead, 0x00f8, 0x0026,
- 0x2011, 0x8008, 0x080c, 0x66ae, 0x002e, 0x0530, 0x6014, 0x2048,
- 0xa864, 0x9084, 0x00ff, 0x9086, 0x0039, 0x1140, 0x2001, 0x0030,
- 0x900e, 0x2011, 0x4009, 0x080c, 0xbe6e, 0x0040, 0x6014, 0x2048,
- 0xa807, 0x0000, 0xa867, 0x0103, 0xa833, 0xdead, 0x6010, 0x2058,
- 0xb9a0, 0x0016, 0x080c, 0x305d, 0x080c, 0x9be6, 0x001e, 0x080c,
- 0x3136, 0x00de, 0x0804, 0xa819, 0x00de, 0x080c, 0xaa66, 0x6010,
- 0x2058, 0xbaa0, 0x9286, 0x0080, 0x1510, 0x6014, 0x9005, 0x01a8,
- 0x2048, 0xa864, 0x9084, 0x00ff, 0x9086, 0x0039, 0x1140, 0x2001,
- 0x0000, 0x900e, 0x2011, 0x4000, 0x080c, 0xbe6e, 0x0030, 0xa807,
- 0x0000, 0xa867, 0x0103, 0xa833, 0x0200, 0x2001, 0x0006, 0x080c,
- 0x61e0, 0x080c, 0x305d, 0x080c, 0x9be6, 0x0804, 0xa819, 0x080c,
- 0xa827, 0x6014, 0x9005, 0x0190, 0x2048, 0xa868, 0xd0f4, 0x01e8,
- 0xa864, 0x9084, 0x00ff, 0x9086, 0x0039, 0x1d08, 0x2001, 0x0000,
- 0x900e, 0x2011, 0x4000, 0x080c, 0xbe6e, 0x08f8, 0x080c, 0xa81d,
- 0x0160, 0x9006, 0x080c, 0x61cc, 0x2001, 0x0004, 0x080c, 0x620c,
- 0x2001, 0x0007, 0x080c, 0x61e0, 0x08a0, 0x2001, 0x0004, 0x080c,
- 0x61e0, 0x6003, 0x0001, 0x6007, 0x0003, 0x080c, 0x84ee, 0x080c,
- 0x894f, 0x0804, 0xa819, 0xb85c, 0xd0e4, 0x01d0, 0x080c, 0xbc9b,
- 0x080c, 0x70ba, 0x0118, 0xd0dc, 0x1904, 0xa73d, 0x2011, 0x1836,
- 0x2204, 0xc0ad, 0x2012, 0x2001, 0x0002, 0x00f6, 0x2079, 0x0100,
- 0x78e3, 0x0000, 0x080c, 0x24cd, 0x78e2, 0x00fe, 0x0804, 0xa73d,
- 0x080c, 0xbcdc, 0x2011, 0x1836, 0x2204, 0xc0a5, 0x2012, 0x0006,
- 0x080c, 0xd147, 0x000e, 0x1904, 0xa73d, 0xc0b5, 0x2012, 0x2001,
- 0x0006, 0x080c, 0x61e0, 0x9006, 0x080c, 0x61cc, 0x00c6, 0x2001,
- 0x180f, 0x2004, 0xd09c, 0x0520, 0x00f6, 0x2079, 0x0100, 0x00e6,
- 0x2071, 0x1800, 0x700c, 0x9084, 0x00ff, 0x78e6, 0x707a, 0x7010,
- 0x78ea, 0x707e, 0x908c, 0x00ff, 0x00ee, 0x780c, 0xc0b5, 0x780e,
- 0x00fe, 0x080c, 0x24a2, 0x00f6, 0x2100, 0x900e, 0x080c, 0x2459,
- 0x795a, 0x00fe, 0x9186, 0x0081, 0x01d8, 0x2009, 0x0081, 0x00c8,
- 0x2009, 0x00ef, 0x00f6, 0x2079, 0x0100, 0x79ea, 0x7932, 0x7936,
- 0x780c, 0xc0b5, 0x780e, 0x00fe, 0x080c, 0x24a2, 0x00f6, 0x2079,
- 0x1800, 0x797e, 0x2100, 0x900e, 0x080c, 0x2459, 0x795a, 0x00fe,
- 0x8108, 0x080c, 0x622f, 0x2b00, 0x00ce, 0x1904, 0xa73d, 0x6012,
- 0x2009, 0x180f, 0x210c, 0xd19c, 0x0150, 0x2009, 0x027c, 0x210c,
- 0x918c, 0x00ff, 0xb912, 0x2009, 0x027d, 0x210c, 0xb916, 0x2001,
- 0x0002, 0x080c, 0x61e0, 0x6023, 0x0001, 0x6003, 0x0001, 0x6007,
- 0x0002, 0x080c, 0x84ee, 0x080c, 0x894f, 0x0018, 0x080c, 0xa59c,
- 0x0431, 0x00de, 0x009e, 0x00be, 0x0005, 0x2001, 0x1810, 0x2004,
- 0xd0a4, 0x0120, 0x2001, 0x185c, 0x2004, 0xd0ac, 0x0005, 0x00e6,
- 0x080c, 0xd5cb, 0x0190, 0x2071, 0x0260, 0x7108, 0x720c, 0x918c,
- 0x00ff, 0x1118, 0x9284, 0xff00, 0x0140, 0x6010, 0x2058, 0xb8a0,
- 0x9084, 0xff80, 0x1110, 0xb912, 0xba16, 0x00ee, 0x0005, 0x2030,
- 0x2001, 0x0007, 0x080c, 0x61e0, 0x080c, 0x53bc, 0x1120, 0x2001,
- 0x0007, 0x080c, 0x620c, 0x080c, 0x305d, 0x6020, 0x9086, 0x000a,
- 0x1108, 0x0005, 0x0804, 0x9be6, 0x00b6, 0x00e6, 0x0026, 0x0016,
- 0x2071, 0x1800, 0x708c, 0x9086, 0x0014, 0x1904, 0xa8f1, 0x00d6,
- 0x080c, 0x70ba, 0x0198, 0x0026, 0x2011, 0x0010, 0x080c, 0x66ae,
- 0x002e, 0x05c8, 0x080c, 0x53bc, 0x1540, 0x6014, 0x2048, 0xa807,
- 0x0000, 0xa867, 0x0103, 0xa833, 0xdead, 0x00f8, 0x0026, 0x2011,
- 0x8008, 0x080c, 0x66ae, 0x002e, 0x0530, 0x6014, 0x2048, 0xa864,
- 0x9084, 0x00ff, 0x9086, 0x0039, 0x1140, 0x2001, 0x0030, 0x900e,
- 0x2011, 0x4009, 0x080c, 0xbe6e, 0x0040, 0x6014, 0x2048, 0xa807,
- 0x0000, 0xa867, 0x0103, 0xa833, 0xdead, 0x6010, 0x2058, 0xb9a0,
- 0x0016, 0x080c, 0x305d, 0x080c, 0x9be6, 0x001e, 0x080c, 0x3136,
- 0x00de, 0x0804, 0xa8f5, 0x00de, 0x080c, 0x53bc, 0x1170, 0x6014,
- 0x9005, 0x1158, 0x0036, 0x0046, 0x6010, 0x2058, 0xbba0, 0x2021,
- 0x0006, 0x080c, 0x4a97, 0x004e, 0x003e, 0x00d6, 0x6010, 0x2058,
- 0x080c, 0x632a, 0x080c, 0xa6b3, 0x00de, 0x080c, 0xab37, 0x1588,
- 0x6010, 0x2058, 0xb890, 0x9005, 0x0560, 0x2001, 0x0006, 0x080c,
- 0x61e0, 0x0096, 0x6014, 0x904d, 0x01d0, 0xa864, 0x9084, 0x00ff,
- 0x9086, 0x0039, 0x1140, 0x2001, 0x0000, 0x900e, 0x2011, 0x4000,
- 0x080c, 0xbe6e, 0x0060, 0xa864, 0x9084, 0x00ff, 0x9086, 0x0029,
- 0x0130, 0xa807, 0x0000, 0xa867, 0x0103, 0xa833, 0x0200, 0x009e,
- 0x080c, 0x305d, 0x6020, 0x9086, 0x000a, 0x0138, 0x080c, 0x9be6,
- 0x0020, 0x080c, 0xa59c, 0x080c, 0xa83f, 0x001e, 0x002e, 0x00ee,
- 0x00be, 0x0005, 0x2011, 0x1823, 0x2204, 0x9086, 0x0014, 0x1160,
- 0x2001, 0x0002, 0x080c, 0x61e0, 0x6003, 0x0001, 0x6007, 0x0001,
- 0x080c, 0x84ee, 0x0804, 0x894f, 0x0804, 0xa83f, 0x2030, 0x2011,
- 0x1823, 0x2204, 0x9086, 0x0004, 0x1148, 0x96b6, 0x000b, 0x1120,
- 0x2001, 0x0007, 0x080c, 0x61e0, 0x0804, 0x9be6, 0x0804, 0xa83f,
- 0x0002, 0xa67d, 0xa938, 0xa67d, 0xa977, 0xa67d, 0xaa22, 0xa92d,
- 0xa67d, 0xa67d, 0xaa35, 0xa67d, 0xaa45, 0x6604, 0x9686, 0x0003,
- 0x0904, 0xa854, 0x96b6, 0x001e, 0x1110, 0x080c, 0x9be6, 0x0005,
- 0x00b6, 0x00d6, 0x00c6, 0x080c, 0xaa55, 0x11a0, 0x9006, 0x080c,
- 0x61cc, 0x080c, 0x302e, 0x080c, 0xbfa4, 0x2001, 0x0002, 0x080c,
- 0x61e0, 0x6003, 0x0001, 0x6007, 0x0002, 0x080c, 0x84ee, 0x080c,
- 0x894f, 0x0408, 0x2009, 0x026e, 0x2104, 0x9086, 0x0009, 0x1160,
- 0x6010, 0x2058, 0xb840, 0x9084, 0x00ff, 0x9005, 0x0170, 0x8001,
- 0xb842, 0x601b, 0x000a, 0x0078, 0x2009, 0x026f, 0x2104, 0x9084,
- 0xff00, 0x9086, 0x1900, 0x1108, 0x08a0, 0x080c, 0x302e, 0x080c,
- 0xbfa4, 0x080c, 0xa83f, 0x00ce, 0x00de, 0x00be, 0x0005, 0x0096,
- 0x00b6, 0x0026, 0x9016, 0x080c, 0xaa63, 0x00d6, 0x2069, 0x1954,
- 0x2d04, 0x9005, 0x0168, 0x6010, 0x2058, 0xb8a0, 0x9086, 0x007e,
- 0x1138, 0x2069, 0x181f, 0x2d04, 0x8000, 0x206a, 0x00de, 0x0010,
- 0x00de, 0x0088, 0x9006, 0x080c, 0x61cc, 0x2001, 0x0002, 0x080c,
- 0x61e0, 0x6003, 0x0001, 0x6007, 0x0002, 0x080c, 0x84ee, 0x080c,
- 0x894f, 0x0804, 0xa9f2, 0x080c, 0xb870, 0x01b0, 0x6014, 0x2048,
- 0xa864, 0x2010, 0x9086, 0x0139, 0x1138, 0x6007, 0x0016, 0x2001,
- 0x0002, 0x080c, 0xbec8, 0x00b0, 0x6014, 0x2048, 0xa864, 0xd0fc,
- 0x0118, 0x2001, 0x0001, 0x0ca8, 0x2001, 0x180e, 0x2004, 0xd0dc,
- 0x0148, 0x6010, 0x2058, 0xb840, 0x9084, 0x00ff, 0x9005, 0x1110,
- 0x9006, 0x0c38, 0x080c, 0xa59c, 0x2009, 0x026e, 0x2134, 0x96b4,
- 0x00ff, 0x9686, 0x0005, 0x0510, 0x9686, 0x000b, 0x01c8, 0x2009,
- 0x026f, 0x2104, 0x9084, 0xff00, 0x1118, 0x9686, 0x0009, 0x01b0,
- 0x9086, 0x1900, 0x1168, 0x9686, 0x0009, 0x0180, 0x2001, 0x0004,
- 0x080c, 0x61e0, 0x2001, 0x0028, 0x601a, 0x6007, 0x0052, 0x0010,
- 0x080c, 0xa83f, 0x002e, 0x00be, 0x009e, 0x0005, 0x9286, 0x0139,
- 0x0160, 0x6014, 0x2048, 0x080c, 0xb870, 0x0140, 0xa864, 0x9086,
- 0x0139, 0x0118, 0xa868, 0xd0fc, 0x0108, 0x0c50, 0x6010, 0x2058,
- 0xb840, 0x9084, 0x00ff, 0x9005, 0x0138, 0x8001, 0xb842, 0x601b,
- 0x000a, 0x6007, 0x0016, 0x08f0, 0xb8a0, 0x9086, 0x007e, 0x1138,
- 0x00e6, 0x2071, 0x1800, 0x080c, 0x5c8a, 0x00ee, 0x0010, 0x080c,
- 0x302e, 0x0870, 0x080c, 0xaa63, 0x1160, 0x2001, 0x0004, 0x080c,
- 0x61e0, 0x6003, 0x0001, 0x6007, 0x0003, 0x080c, 0x84ee, 0x0804,
- 0x894f, 0x080c, 0xa59c, 0x0804, 0xa83f, 0x0469, 0x1160, 0x2001,
- 0x0008, 0x080c, 0x61e0, 0x6003, 0x0001, 0x6007, 0x0005, 0x080c,
- 0x84ee, 0x0804, 0x894f, 0x0804, 0xa83f, 0x00e9, 0x1160, 0x2001,
- 0x000a, 0x080c, 0x61e0, 0x6003, 0x0001, 0x6007, 0x0001, 0x080c,
- 0x84ee, 0x0804, 0x894f, 0x0804, 0xa83f, 0x2009, 0x026e, 0x2104,
- 0x9086, 0x0003, 0x1138, 0x2009, 0x026f, 0x2104, 0x9084, 0xff00,
- 0x9086, 0x2a00, 0x0005, 0x9085, 0x0001, 0x0005, 0x00b6, 0x00c6,
- 0x0016, 0x6110, 0x2158, 0x080c, 0x629e, 0x001e, 0x00ce, 0x00be,
- 0x0005, 0x00b6, 0x00f6, 0x00e6, 0x00d6, 0x0036, 0x0016, 0x6010,
- 0x2058, 0x2009, 0x1836, 0x2104, 0x9085, 0x0003, 0x200a, 0x080c,
- 0xab09, 0x0560, 0x2009, 0x1836, 0x2104, 0xc0cd, 0x200a, 0x080c,
- 0x6686, 0x0158, 0x9006, 0x2020, 0x2009, 0x002a, 0x080c, 0xd2bc,
- 0x2001, 0x180c, 0x200c, 0xc195, 0x2102, 0x2019, 0x002a, 0x2009,
- 0x0001, 0x080c, 0x2ff3, 0x00e6, 0x2071, 0x1800, 0x080c, 0x2e09,
- 0x00ee, 0x00c6, 0x0156, 0x20a9, 0x0781, 0x2009, 0x007f, 0x080c,
- 0x3136, 0x8108, 0x1f04, 0xaaa7, 0x015e, 0x00ce, 0x080c, 0xaa66,
- 0x2071, 0x0260, 0x2079, 0x0200, 0x7817, 0x0001, 0x2001, 0x1836,
- 0x200c, 0xc1c5, 0x7018, 0xd0fc, 0x0110, 0xd0dc, 0x0118, 0x7038,
- 0xd0dc, 0x1108, 0xc1c4, 0x7817, 0x0000, 0x2001, 0x1836, 0x2102,
- 0x2079, 0x0100, 0x2e04, 0x9084, 0x00ff, 0x2069, 0x181e, 0x206a,
- 0x78e6, 0x0006, 0x8e70, 0x2e04, 0x2069, 0x181f, 0x206a, 0x78ea,
- 0x7832, 0x7836, 0x2010, 0x9084, 0xff00, 0x001e, 0x9105, 0x2009,
- 0x182b, 0x200a, 0x2200, 0x9084, 0x00ff, 0x2008, 0x080c, 0x24a2,
- 0x080c, 0x70ba, 0x0170, 0x2071, 0x0260, 0x2069, 0x195a, 0x7048,
- 0x206a, 0x704c, 0x6806, 0x7050, 0x680a, 0x7054, 0x680e, 0x080c,
- 0xbc9b, 0x0040, 0x2001, 0x0006, 0x080c, 0x61e0, 0x080c, 0x305d,
- 0x080c, 0x9be6, 0x001e, 0x003e, 0x00de, 0x00ee, 0x00fe, 0x00be,
- 0x0005, 0x0096, 0x0026, 0x0036, 0x00e6, 0x0156, 0x2019, 0x182b,
- 0x231c, 0x83ff, 0x01f0, 0x2071, 0x0260, 0x7200, 0x9294, 0x00ff,
- 0x7004, 0x9084, 0xff00, 0x9205, 0x9306, 0x1198, 0x2011, 0x0276,
- 0x20a9, 0x0004, 0x2b48, 0x2019, 0x000a, 0x080c, 0xabee, 0x1148,
- 0x2011, 0x027a, 0x20a9, 0x0004, 0x2019, 0x0006, 0x080c, 0xabee,
- 0x1100, 0x015e, 0x00ee, 0x003e, 0x002e, 0x009e, 0x0005, 0x00e6,
- 0x2071, 0x0260, 0x7034, 0x9086, 0x0014, 0x11a8, 0x7038, 0x9086,
- 0x0800, 0x1188, 0x703c, 0xd0ec, 0x0160, 0x9084, 0x0f00, 0x9086,
- 0x0100, 0x1138, 0x7054, 0xd0a4, 0x1110, 0xd0ac, 0x0110, 0x9006,
- 0x0010, 0x9085, 0x0001, 0x00ee, 0x0005, 0x00e6, 0x0096, 0x00c6,
- 0x0076, 0x0056, 0x0046, 0x0026, 0x0006, 0x0126, 0x2091, 0x8000,
- 0x2029, 0x19cb, 0x252c, 0x2021, 0x19d2, 0x2424, 0x2061, 0x1ddc,
- 0x2071, 0x1800, 0x7250, 0x7070, 0x9202, 0x1a04, 0xabc6, 0x080c,
- 0xd2ed, 0x0904, 0xabbf, 0x6720, 0x9786, 0x0007, 0x0904, 0xabbf,
- 0x2500, 0x9c06, 0x0904, 0xabbf, 0x2400, 0x9c06, 0x0904, 0xabbf,
- 0x3e08, 0x9186, 0x0002, 0x1148, 0x6010, 0x9005, 0x0130, 0x00b6,
- 0x2058, 0xb800, 0x00be, 0xd0bc, 0x1590, 0x00c6, 0x6043, 0xffff,
- 0x6000, 0x9086, 0x0004, 0x1110, 0x080c, 0x193e, 0x9786, 0x000a,
- 0x0148, 0x080c, 0xba85, 0x1130, 0x00ce, 0x080c, 0xa59c, 0x080c,
- 0x9c20, 0x00e8, 0x6014, 0x2048, 0x080c, 0xb870, 0x01a8, 0x9786,
- 0x0003, 0x1530, 0xa867, 0x0103, 0xa87c, 0xd0cc, 0x0130, 0x0096,
- 0xa878, 0x2048, 0x080c, 0x0fe1, 0x009e, 0xab7a, 0xa877, 0x0000,
- 0x080c, 0x69a9, 0x080c, 0xba5f, 0x080c, 0x9c20, 0x00ce, 0x9ce0,
- 0x001c, 0x7064, 0x9c02, 0x1210, 0x0804, 0xab6a, 0x012e, 0x000e,
- 0x002e, 0x004e, 0x005e, 0x007e, 0x00ce, 0x009e, 0x00ee, 0x0005,
- 0x9786, 0x0006, 0x1118, 0x080c, 0xd267, 0x0c30, 0x9786, 0x000a,
- 0x0998, 0x0880, 0x220c, 0x2304, 0x9106, 0x1130, 0x8210, 0x8318,
- 0x1f04, 0xabda, 0x9006, 0x0005, 0x2304, 0x9102, 0x0218, 0x2001,
- 0x0001, 0x0008, 0x9006, 0x918d, 0x0001, 0x0005, 0x0136, 0x01c6,
- 0x0016, 0x8906, 0x8006, 0x8007, 0x908c, 0x003f, 0x21e0, 0x9084,
- 0xffc0, 0x9300, 0x2098, 0x3518, 0x20a9, 0x0001, 0x220c, 0x4002,
- 0x910e, 0x1140, 0x8210, 0x8319, 0x1dc8, 0x9006, 0x001e, 0x01ce,
- 0x013e, 0x0005, 0x220c, 0x9102, 0x0218, 0x2001, 0x0001, 0x0010,
- 0x2001, 0x0000, 0x918d, 0x0001, 0x001e, 0x01ce, 0x013e, 0x0005,
- 0x6004, 0x908a, 0x0053, 0x1a0c, 0x0d65, 0x080c, 0xba74, 0x0120,
- 0x080c, 0xba85, 0x0158, 0x0028, 0x080c, 0x305d, 0x080c, 0xba85,
- 0x0128, 0x080c, 0x8891, 0x080c, 0x9be6, 0x0005, 0x080c, 0xa59c,
- 0x0cc0, 0x9182, 0x0057, 0x1220, 0x9182, 0x0040, 0x0208, 0x000a,
- 0x0005, 0xac50, 0xac50, 0xac50, 0xac50, 0xac50, 0xac50, 0xac50,
- 0xac50, 0xac50, 0xac50, 0xac50, 0xac52, 0xac52, 0xac52, 0xac52,
- 0xac50, 0xac50, 0xac50, 0xac52, 0xac50, 0xac50, 0xac50, 0xac50,
- 0x080c, 0x0d65, 0x600b, 0xffff, 0x6003, 0x000f, 0x6106, 0x0126,
- 0x2091, 0x8000, 0x080c, 0xbfa7, 0x2009, 0x8000, 0x080c, 0x84e7,
- 0x012e, 0x0005, 0x9186, 0x0013, 0x1128, 0x6004, 0x9082, 0x0040,
- 0x0804, 0xacd7, 0x9186, 0x0027, 0x1520, 0x080c, 0x8891, 0x080c,
- 0x302e, 0x080c, 0xbfa4, 0x0096, 0x6114, 0x2148, 0x080c, 0xb870,
- 0x0198, 0x080c, 0xba85, 0x1118, 0x080c, 0xa59c, 0x0068, 0xa867,
- 0x0103, 0xa87b, 0x0029, 0xa877, 0x0000, 0xa97c, 0xc1c5, 0xa97e,
- 0x080c, 0x69b5, 0x080c, 0xba5f, 0x009e, 0x080c, 0x9be6, 0x0804,
- 0x894f, 0x9186, 0x0014, 0x1120, 0x6004, 0x9082, 0x0040, 0x0018,
- 0x080c, 0x0d65, 0x0005, 0x0002, 0xacb5, 0xacb3, 0xacb3, 0xacb3,
- 0xacb3, 0xacb3, 0xacb3, 0xacb3, 0xacb3, 0xacb3, 0xacb3, 0xacce,
- 0xacce, 0xacce, 0xacce, 0xacb3, 0xacce, 0xacb3, 0xacce, 0xacb3,
- 0xacb3, 0xacb3, 0xacb3, 0x080c, 0x0d65, 0x080c, 0x8891, 0x0096,
- 0x6114, 0x2148, 0x080c, 0xb870, 0x0168, 0xa867, 0x0103, 0xa87b,
- 0x0006, 0xa877, 0x0000, 0xa880, 0xc0ec, 0xa882, 0x080c, 0x69b5,
- 0x080c, 0xba5f, 0x009e, 0x080c, 0x9be6, 0x0005, 0x080c, 0x8891,
- 0x080c, 0xba85, 0x090c, 0xa59c, 0x080c, 0x9be6, 0x0005, 0x0002,
- 0xacf1, 0xacef, 0xacef, 0xacef, 0xacef, 0xacef, 0xacef, 0xacef,
- 0xacef, 0xacef, 0xacef, 0xacf3, 0xacf3, 0xacf3, 0xacf3, 0xacef,
- 0xacf5, 0xacef, 0xacf3, 0xacef, 0xacef, 0xacef, 0xacef, 0x080c,
- 0x0d65, 0x080c, 0x0d65, 0x080c, 0x0d65, 0x080c, 0x9be6, 0x0804,
- 0x894f, 0x9182, 0x0057, 0x1220, 0x9182, 0x0040, 0x0208, 0x000a,
- 0x0005, 0xad18, 0xad18, 0xad18, 0xad18, 0xad18, 0xad51, 0xae40,
- 0xad18, 0xae4c, 0xad18, 0xad18, 0xad18, 0xad18, 0xad18, 0xad18,
- 0xad18, 0xad18, 0xad18, 0xad18, 0xae4c, 0xad1a, 0xad18, 0xae4a,
- 0x080c, 0x0d65, 0x00b6, 0x0096, 0x6114, 0x2148, 0x6010, 0x2058,
- 0xb800, 0xd0bc, 0x1508, 0xa87b, 0x0000, 0xa867, 0x0103, 0xa877,
- 0x0000, 0xa87c, 0xd0ac, 0x0128, 0xa834, 0xa938, 0x9115, 0x190c,
- 0xaed1, 0x080c, 0x67cb, 0x6210, 0x2258, 0xba3c, 0x82ff, 0x0110,
- 0x8211, 0xba3e, 0xb8c0, 0x9005, 0x0110, 0x080c, 0x63ba, 0x080c,
- 0x9be6, 0x009e, 0x00be, 0x0005, 0xa87c, 0xd0ac, 0x09e0, 0xa838,
- 0xa934, 0x9105, 0x09c0, 0xa880, 0xd0bc, 0x19a8, 0x080c, 0xbbba,
- 0x0c80, 0x00b6, 0x0096, 0x6114, 0x2148, 0x601c, 0xd0fc, 0x1110,
- 0x7644, 0x0008, 0x9036, 0x96b4, 0x0fff, 0x86ff, 0x1590, 0x6010,
- 0x2058, 0xb800, 0xd0bc, 0x1904, 0xae2f, 0xa87b, 0x0000, 0xa867,
- 0x0103, 0xae76, 0xa87c, 0xd0ac, 0x0128, 0xa834, 0xa938, 0x9115,
- 0x190c, 0xaed1, 0x080c, 0x67cb, 0x6210, 0x2258, 0xba3c, 0x82ff,
- 0x0110, 0x8211, 0xba3e, 0xb8c0, 0x9005, 0x0110, 0x080c, 0x63ba,
- 0x601c, 0xd0fc, 0x1148, 0x7044, 0xd0e4, 0x1904, 0xae13, 0x080c,
- 0x9be6, 0x009e, 0x00be, 0x0005, 0x2009, 0x0211, 0x210c, 0x080c,
- 0x0d65, 0x968c, 0x0c00, 0x0150, 0x6010, 0x2058, 0xb800, 0xd0bc,
- 0x1904, 0xae17, 0x7348, 0xab92, 0x734c, 0xab8e, 0x968c, 0x00ff,
- 0x9186, 0x0002, 0x0508, 0x9186, 0x0028, 0x1118, 0xa87b, 0x001c,
- 0x00e8, 0xd6dc, 0x01a0, 0xa87b, 0x0015, 0xa87c, 0xd0ac, 0x0170,
- 0xa938, 0xaa34, 0x2100, 0x9205, 0x0148, 0x7048, 0x9106, 0x1118,
- 0x704c, 0x9206, 0x0118, 0xa992, 0xaa8e, 0xc6dc, 0x0038, 0xd6d4,
- 0x0118, 0xa87b, 0x0007, 0x0010, 0xa87b, 0x0000, 0xa867, 0x0103,
- 0xae76, 0x901e, 0xd6c4, 0x01d8, 0x9686, 0x0100, 0x1130, 0x7064,
- 0x9005, 0x1118, 0xc6c4, 0x0804, 0xad5d, 0x735c, 0xab86, 0x83ff,
- 0x0170, 0x938a, 0x0009, 0x0210, 0x2019, 0x0008, 0x0036, 0x2308,
- 0x2019, 0x0018, 0x2011, 0x0025, 0x080c, 0xb426, 0x003e, 0xd6cc,
- 0x0904, 0xad72, 0x7154, 0xa98a, 0x81ff, 0x0904, 0xad72, 0x9192,
- 0x0021, 0x1278, 0x8304, 0x9098, 0x0018, 0x2011, 0x0029, 0x080c,
- 0xb426, 0x2011, 0x0205, 0x2013, 0x0000, 0x080c, 0xbf34, 0x0804,
- 0xad72, 0xa868, 0xd0fc, 0x0120, 0x2009, 0x0020, 0xa98a, 0x0c50,
- 0x00a6, 0x2950, 0x080c, 0xb3c5, 0x00ae, 0x080c, 0xbf34, 0x080c,
- 0xb416, 0x0804, 0xad74, 0x080c, 0xbb7d, 0x0804, 0xad89, 0xa87c,
- 0xd0ac, 0x0904, 0xad9a, 0xa880, 0xd0bc, 0x1904, 0xad9a, 0x7348,
- 0xa838, 0x9306, 0x11c8, 0x734c, 0xa834, 0x931e, 0x0904, 0xad9a,
- 0xd6d4, 0x0190, 0xab38, 0x9305, 0x0904, 0xad9a, 0x0068, 0xa87c,
- 0xd0ac, 0x0904, 0xad65, 0xa838, 0xa934, 0x9105, 0x0904, 0xad65,
- 0xa880, 0xd0bc, 0x1904, 0xad65, 0x080c, 0xbbba, 0x0804, 0xad89,
- 0x00f6, 0x2079, 0x026c, 0x7c04, 0x7b00, 0x7e0c, 0x7d08, 0x00fe,
- 0x0021, 0x0005, 0x0011, 0x0005, 0x0005, 0x0096, 0x6003, 0x0002,
- 0x6007, 0x0043, 0x6014, 0x2048, 0xa87c, 0xd0ac, 0x0128, 0x009e,
- 0x0005, 0x2130, 0x2228, 0x0058, 0x2400, 0xa9ac, 0x910a, 0x2300,
- 0xaab0, 0x9213, 0x2600, 0x9102, 0x2500, 0x9203, 0x0e90, 0xac46,
- 0xab4a, 0xae36, 0xad3a, 0x6044, 0xd0fc, 0x190c, 0x98f0, 0x604b,
- 0x0000, 0x080c, 0x1af7, 0x1118, 0x6144, 0x080c, 0x8513, 0x009e,
- 0x0005, 0x9182, 0x0057, 0x1220, 0x9182, 0x0040, 0x0208, 0x000a,
- 0x0005, 0xae98, 0xae98, 0xae98, 0xae98, 0xae98, 0xae98, 0xae98,
- 0xae98, 0xae98, 0xae98, 0xae9a, 0xae98, 0xae98, 0xae98, 0xae98,
- 0xaeab, 0xae98, 0xae98, 0xae98, 0xae98, 0xaecf, 0xae98, 0xae98,
- 0x080c, 0x0d65, 0x6004, 0x9086, 0x0040, 0x1110, 0x080c, 0x8891,
- 0x2019, 0x0001, 0x080c, 0x929d, 0x6003, 0x0002, 0x080c, 0xbfac,
- 0x080c, 0x88ec, 0x0005, 0x6004, 0x9086, 0x0040, 0x1110, 0x080c,
- 0x8891, 0x2019, 0x0001, 0x080c, 0x929d, 0x080c, 0x88ec, 0x080c,
- 0x302e, 0x080c, 0xbfa4, 0x0096, 0x6114, 0x2148, 0x080c, 0xb870,
- 0x0150, 0xa867, 0x0103, 0xa87b, 0x0029, 0xa877, 0x0000, 0x080c,
- 0x69b5, 0x080c, 0xba5f, 0x009e, 0x080c, 0x9be6, 0x0005, 0x080c,
- 0x0d65, 0xa87b, 0x0015, 0xd1fc, 0x0180, 0xa87b, 0x0007, 0x8002,
- 0x8000, 0x810a, 0x9189, 0x0000, 0x0006, 0x0016, 0x2009, 0x1a4f,
- 0x2104, 0x8000, 0x200a, 0x001e, 0x000e, 0xa992, 0xa88e, 0x0005,
- 0x9182, 0x0057, 0x1220, 0x9182, 0x0040, 0x0208, 0x000a, 0x0005,
- 0xaf07, 0xaf07, 0xaf07, 0xaf07, 0xaf07, 0xaf09, 0xaf07, 0xaf07,
- 0xafc6, 0xaf07, 0xaf07, 0xaf07, 0xaf07, 0xaf07, 0xaf07, 0xaf07,
- 0xaf07, 0xaf07, 0xaf07, 0xb104, 0xaf07, 0xb10e, 0xaf07, 0x080c,
- 0x0d65, 0x601c, 0xd0bc, 0x0178, 0xd084, 0x0168, 0xd0f4, 0x0120,
- 0xc084, 0x601e, 0x0804, 0xacf9, 0x6114, 0x0096, 0x2148, 0xa87c,
- 0xc0e5, 0xa87e, 0x009e, 0x0076, 0x00a6, 0x00e6, 0x0096, 0x2071,
- 0x0260, 0x6114, 0x2150, 0x601c, 0xd0fc, 0x1110, 0x7644, 0x0008,
- 0x9036, 0xb676, 0x96b4, 0x0fff, 0xb77c, 0xc7e5, 0xb77e, 0x6210,
- 0x00b6, 0x2258, 0xba3c, 0x82ff, 0x0110, 0x8211, 0xba3e, 0x00be,
- 0x86ff, 0x0904, 0xafbf, 0x9694, 0xff00, 0x9284, 0x0c00, 0x0120,
- 0x7048, 0xb092, 0x704c, 0xb08e, 0x9284, 0x0300, 0x0904, 0xafbf,
- 0x9686, 0x0100, 0x1130, 0x7064, 0x9005, 0x1118, 0xc6c4, 0xb676,
- 0x0c38, 0x080c, 0x102f, 0x090c, 0x0d65, 0x2900, 0xb07a, 0xb77c,
- 0x97bd, 0x0200, 0xb77e, 0xa867, 0x0103, 0xb068, 0xa86a, 0xb06c,
- 0xa86e, 0xb070, 0xa872, 0x7044, 0x9084, 0xf000, 0x9635, 0xae76,
- 0x968c, 0x0c00, 0x0120, 0x7348, 0xab92, 0x734c, 0xab8e, 0x968c,
- 0x00ff, 0x9186, 0x0002, 0x0180, 0x9186, 0x0028, 0x1118, 0xa87b,
- 0x001c, 0x0060, 0xd6dc, 0x0118, 0xa87b, 0x0015, 0x0038, 0xd6d4,
- 0x0118, 0xa87b, 0x0007, 0x0010, 0xa87b, 0x0000, 0xaf7e, 0xb080,
- 0xa882, 0xb084, 0xa886, 0x901e, 0xd6c4, 0x0190, 0x735c, 0xab86,
- 0x83ff, 0x0170, 0x938a, 0x0009, 0x0210, 0x2019, 0x0008, 0x0036,
- 0x2308, 0x2019, 0x0018, 0x2011, 0x0025, 0x080c, 0xb426, 0x003e,
- 0xd6cc, 0x01e8, 0x7154, 0xa98a, 0x81ff, 0x01c8, 0x9192, 0x0021,
- 0x1260, 0x8304, 0x9098, 0x0018, 0x2011, 0x0029, 0x080c, 0xb426,
- 0x2011, 0x0205, 0x2013, 0x0000, 0x0050, 0xb068, 0xd0fc, 0x0120,
- 0x2009, 0x0020, 0xa98a, 0x0c68, 0x2950, 0x080c, 0xb3c5, 0x080c,
- 0x190c, 0x009e, 0x00ee, 0x00ae, 0x007e, 0x0005, 0x2001, 0x1960,
- 0x2004, 0x604a, 0x0096, 0x6114, 0x2148, 0xa83c, 0xa940, 0x9105,
- 0x1118, 0xa87c, 0xc0dc, 0xa87e, 0x6003, 0x0002, 0x080c, 0xbfb5,
- 0x0904, 0xb0ff, 0x604b, 0x0000, 0x6010, 0x00b6, 0x2058, 0xb800,
- 0x00be, 0xd0bc, 0x1500, 0xd1cc, 0x0904, 0xb0c4, 0xa978, 0xa868,
- 0xd0fc, 0x0904, 0xb085, 0x0016, 0xa87c, 0x0006, 0xa880, 0x0006,
- 0x00a6, 0x2150, 0xb174, 0x9184, 0x00ff, 0x90b6, 0x0002, 0x0904,
- 0xb053, 0x9086, 0x0028, 0x1904, 0xb03f, 0xa87b, 0x001c, 0xb07b,
- 0x001c, 0x0804, 0xb05b, 0x6024, 0xd0f4, 0x11d0, 0xa838, 0xaa34,
- 0x9205, 0x09c8, 0xa838, 0xaa90, 0x9206, 0x1120, 0xa88c, 0xaa34,
- 0x9206, 0x0988, 0x6024, 0xd0d4, 0x1148, 0xa9ac, 0xa834, 0x9102,
- 0x603a, 0xa9b0, 0xa838, 0x9103, 0x603e, 0x6024, 0xc0f5, 0x6026,
- 0x6010, 0x00b6, 0x2058, 0xb83c, 0x8000, 0xb83e, 0x00be, 0x601c,
- 0xc0fc, 0x601e, 0x9006, 0xa876, 0xa892, 0xa88e, 0xa87c, 0xc0e4,
- 0xa87e, 0xd0cc, 0x0140, 0xc0cc, 0xa87e, 0x0096, 0xa878, 0x2048,
- 0x080c, 0x0fe1, 0x009e, 0x080c, 0xbbba, 0x0804, 0xb0ff, 0xd1dc,
- 0x0158, 0xa87b, 0x0015, 0xb07b, 0x0015, 0x080c, 0xbe57, 0x0118,
- 0xb174, 0xc1dc, 0xb176, 0x0078, 0xd1d4, 0x0128, 0xa87b, 0x0007,
- 0xb07b, 0x0007, 0x0040, 0xa87c, 0xd0ac, 0x0128, 0xa834, 0xa938,
- 0x9115, 0x190c, 0xaed1, 0xa87c, 0xb07e, 0xa890, 0xb092, 0xa88c,
- 0xb08e, 0xa860, 0x20e8, 0xa85c, 0x9080, 0x0019, 0x20a0, 0x20a9,
- 0x0020, 0x8a06, 0x8006, 0x8007, 0x9094, 0x003f, 0x22e0, 0x9084,
- 0xffc0, 0x9080, 0x0019, 0x2098, 0x4003, 0x00ae, 0x000e, 0xa882,
- 0x000e, 0xa87e, 0x080c, 0xbf34, 0x001e, 0xa874, 0x0006, 0x2148,
- 0x080c, 0x0fe1, 0x001e, 0x0804, 0xb0f1, 0x0016, 0x00a6, 0x2150,
- 0xb174, 0x9184, 0x00ff, 0x90b6, 0x0002, 0x01e0, 0x9086, 0x0028,
- 0x1128, 0xa87b, 0x001c, 0xb07b, 0x001c, 0x00e0, 0xd1dc, 0x0158,
- 0xa87b, 0x0015, 0xb07b, 0x0015, 0x080c, 0xbe57, 0x0118, 0xb174,
- 0xc1dc, 0xb176, 0x0078, 0xd1d4, 0x0128, 0xa87b, 0x0007, 0xb07b,
- 0x0007, 0x0040, 0xa87c, 0xd0ac, 0x0128, 0xa834, 0xa938, 0x9115,
- 0x190c, 0xaed1, 0xa890, 0xb092, 0xa88c, 0xb08e, 0xa87c, 0xb07e,
- 0x00ae, 0x080c, 0x0fe1, 0x009e, 0x080c, 0xbf34, 0xa974, 0x0016,
- 0x080c, 0xb416, 0x001e, 0x0468, 0xa867, 0x0103, 0xa974, 0x9184,
- 0x00ff, 0x90b6, 0x0002, 0x01b0, 0x9086, 0x0028, 0x1118, 0xa87b,
- 0x001c, 0x00d0, 0xd1dc, 0x0148, 0xa87b, 0x0015, 0x080c, 0xbe57,
- 0x0118, 0xa974, 0xc1dc, 0xa976, 0x0078, 0xd1d4, 0x0118, 0xa87b,
- 0x0007, 0x0050, 0xa87b, 0x0000, 0xa87c, 0xd0ac, 0x0128, 0xa834,
- 0xa938, 0x9115, 0x190c, 0xaed1, 0xa974, 0x0016, 0x080c, 0x67cb,
- 0x001e, 0x6010, 0x00b6, 0x2058, 0xb8c0, 0x0016, 0x9005, 0x190c,
- 0x63ba, 0x001e, 0x00be, 0xd1e4, 0x1120, 0x080c, 0x9be6, 0x009e,
- 0x0005, 0x080c, 0xbb7d, 0x0cd8, 0x6114, 0x0096, 0x2148, 0xa97c,
- 0x080c, 0xbfb5, 0x190c, 0x192a, 0x009e, 0x0005, 0x0096, 0x6114,
- 0x2148, 0xa83c, 0xa940, 0x9105, 0x01e8, 0xa877, 0x0000, 0xa87b,
- 0x0000, 0xa867, 0x0103, 0x00b6, 0x6010, 0x2058, 0xa834, 0xa938,
- 0x9115, 0x11a0, 0x080c, 0x67cb, 0xba3c, 0x8211, 0x0208, 0xba3e,
- 0xb8c0, 0x9005, 0x0110, 0x080c, 0x63ba, 0x080c, 0x9be6, 0x00be,
- 0x009e, 0x0005, 0xa87c, 0xc0dc, 0xa87e, 0x08f8, 0xb800, 0xd0bc,
- 0x1120, 0xa834, 0x080c, 0xaed1, 0x0c28, 0xa880, 0xd0bc, 0x1dc8,
- 0x080c, 0xbbba, 0x0c60, 0x080c, 0x8891, 0x0010, 0x080c, 0x88ec,
- 0x601c, 0xd084, 0x0110, 0x080c, 0x193e, 0x080c, 0xb870, 0x01f0,
- 0x0096, 0x6114, 0x2148, 0x080c, 0xba85, 0x1118, 0x080c, 0xa59c,
- 0x00a0, 0xa867, 0x0103, 0x2009, 0x180c, 0x210c, 0xd18c, 0x1198,
- 0xd184, 0x1170, 0x6108, 0xa97a, 0x918e, 0x0029, 0x1110, 0x080c,
- 0xd563, 0xa877, 0x0000, 0x080c, 0x69b5, 0x009e, 0x0804, 0x9c20,
- 0xa87b, 0x0004, 0x0cb0, 0xa87b, 0x0004, 0x0c98, 0x9182, 0x0057,
- 0x1220, 0x9182, 0x0040, 0x0208, 0x000a, 0x0005, 0xb195, 0xb195,
- 0xb195, 0xb195, 0xb195, 0xb197, 0xb195, 0xb195, 0xb195, 0xb195,
- 0xb195, 0xb195, 0xb195, 0xb195, 0xb195, 0xb195, 0xb195, 0xb195,
- 0xb195, 0xb195, 0xb1bb, 0xb195, 0xb195, 0x080c, 0x0d65, 0x080c,
- 0x53b0, 0x01f8, 0x6014, 0x7144, 0x918c, 0x0fff, 0x9016, 0xd1c4,
- 0x0118, 0x7264, 0x9294, 0x00ff, 0x0096, 0x904d, 0x0188, 0xa87b,
- 0x0000, 0xa864, 0x9086, 0x0139, 0x0128, 0xa867, 0x0103, 0xa976,
- 0xaa96, 0x0030, 0xa897, 0x4000, 0xa99a, 0xaa9e, 0x080c, 0x69b5,
- 0x009e, 0x0804, 0x9be6, 0x080c, 0x53b0, 0x0dd8, 0x6014, 0x900e,
- 0x9016, 0x0c10, 0x9182, 0x0085, 0x0002, 0xb1d4, 0xb1d2, 0xb1d2,
- 0xb1e0, 0xb1d2, 0xb1d2, 0xb1d2, 0xb1d2, 0xb1d2, 0xb1d2, 0xb1d2,
- 0xb1d2, 0xb1d2, 0x080c, 0x0d65, 0x6003, 0x0001, 0x6106, 0x0126,
- 0x2091, 0x8000, 0x2009, 0x8020, 0x080c, 0x84e7, 0x012e, 0x0005,
- 0x0026, 0x0056, 0x00d6, 0x00e6, 0x2071, 0x0260, 0x7224, 0x6216,
- 0x7220, 0x080c, 0xb85e, 0x01a0, 0x2268, 0x6800, 0x9086, 0x0000,
- 0x0178, 0x6010, 0x6d10, 0x952e, 0x1158, 0x00c6, 0x2d60, 0x080c,
- 0xb451, 0x00ce, 0x0128, 0x6803, 0x0002, 0x6007, 0x0086, 0x0010,
- 0x6007, 0x0087, 0x6003, 0x0001, 0x2009, 0x8020, 0x080c, 0x84e7,
- 0x7220, 0x080c, 0xb85e, 0x0178, 0x6810, 0x00b6, 0x2058, 0xb800,
- 0x00be, 0xd0bc, 0x0140, 0x6824, 0xd0ec, 0x0128, 0x00c6, 0x2d60,
- 0x080c, 0xbbba, 0x00ce, 0x00ee, 0x00de, 0x005e, 0x002e, 0x0005,
- 0x9186, 0x0013, 0x1160, 0x6004, 0x908a, 0x0085, 0x0a0c, 0x0d65,
- 0x908a, 0x0092, 0x1a0c, 0x0d65, 0x9082, 0x0085, 0x00e2, 0x9186,
- 0x0027, 0x0120, 0x9186, 0x0014, 0x190c, 0x0d65, 0x080c, 0x8891,
- 0x0096, 0x6014, 0x2048, 0x080c, 0xb870, 0x0140, 0xa867, 0x0103,
- 0xa877, 0x0000, 0xa87b, 0x0029, 0x080c, 0x69b5, 0x009e, 0x080c,
- 0x9c20, 0x0804, 0x894f, 0xb258, 0xb25a, 0xb25a, 0xb258, 0xb258,
- 0xb258, 0xb258, 0xb258, 0xb258, 0xb258, 0xb258, 0xb258, 0xb258,
- 0x080c, 0x0d65, 0x080c, 0x9c20, 0x0005, 0x9186, 0x0013, 0x1130,
- 0x6004, 0x9082, 0x0085, 0x2008, 0x0804, 0xb2a9, 0x9186, 0x0027,
- 0x1558, 0x080c, 0x8891, 0x080c, 0x302e, 0x080c, 0xbfa4, 0x0096,
- 0x6014, 0x2048, 0x080c, 0xb870, 0x0150, 0xa867, 0x0103, 0xa877,
- 0x0000, 0xa87b, 0x0029, 0x080c, 0x69b5, 0x080c, 0xba5f, 0x009e,
- 0x080c, 0x9be6, 0x0005, 0x9186, 0x0089, 0x0118, 0x9186, 0x008a,
- 0x1140, 0x080c, 0x9ab6, 0x0128, 0x9086, 0x000c, 0x0904, 0xb2e1,
- 0x0000, 0x080c, 0x9c9f, 0x0c70, 0x9186, 0x0014, 0x1d60, 0x080c,
- 0x8891, 0x0096, 0x6014, 0x2048, 0x080c, 0xb870, 0x0d00, 0xa867,
- 0x0103, 0xa877, 0x0000, 0xa87b, 0x0006, 0xa880, 0xc0ec, 0xa882,
- 0x0890, 0x0002, 0xb2b9, 0xb2b7, 0xb2b7, 0xb2b7, 0xb2b7, 0xb2b7,
- 0xb2cd, 0xb2b7, 0xb2b7, 0xb2b7, 0xb2b7, 0xb2b7, 0xb2b7, 0x080c,
- 0x0d65, 0x6034, 0x908c, 0xff00, 0x810f, 0x9186, 0x0039, 0x0118,
- 0x9186, 0x0035, 0x1118, 0x2001, 0x195e, 0x0010, 0x2001, 0x195f,
- 0x2004, 0x601a, 0x6003, 0x000c, 0x0005, 0x6034, 0x908c, 0xff00,
- 0x810f, 0x9186, 0x0039, 0x0118, 0x9186, 0x0035, 0x1118, 0x2001,
- 0x195e, 0x0010, 0x2001, 0x195f, 0x2004, 0x601a, 0x6003, 0x000e,
- 0x0005, 0x9182, 0x0092, 0x1220, 0x9182, 0x0085, 0x0208, 0x0012,
- 0x0804, 0x9c9f, 0xb2f7, 0xb2f7, 0xb2f7, 0xb2f7, 0xb2f9, 0xb346,
- 0xb2f7, 0xb2f7, 0xb2f7, 0xb2f7, 0xb2f7, 0xb2f7, 0xb2f7, 0x080c,
- 0x0d65, 0x0096, 0x6010, 0x00b6, 0x2058, 0xb800, 0x00be, 0xd0bc,
- 0x0168, 0x6034, 0x908c, 0xff00, 0x810f, 0x9186, 0x0039, 0x0118,
- 0x9186, 0x0035, 0x1118, 0x009e, 0x0804, 0xb35a, 0x080c, 0xb870,
- 0x1118, 0x080c, 0xba5f, 0x0068, 0x6014, 0x2048, 0x080c, 0xbfbb,
- 0x1110, 0x080c, 0xba5f, 0xa867, 0x0103, 0x080c, 0xbf6f, 0x080c,
- 0x69b5, 0x00d6, 0x2c68, 0x080c, 0x9b90, 0x01d0, 0x6003, 0x0001,
- 0x6007, 0x001e, 0x600b, 0xffff, 0x2009, 0x026e, 0x210c, 0x613a,
- 0x2009, 0x026f, 0x210c, 0x613e, 0x6910, 0x6112, 0x080c, 0xbd09,
- 0x695c, 0x615e, 0x6023, 0x0001, 0x2009, 0x8020, 0x080c, 0x84e7,
- 0x2d60, 0x00de, 0x080c, 0x9be6, 0x009e, 0x0005, 0x6010, 0x00b6,
- 0x2058, 0xb800, 0x00be, 0xd0bc, 0x05a0, 0x6034, 0x908c, 0xff00,
- 0x810f, 0x9186, 0x0035, 0x0130, 0x9186, 0x001e, 0x0118, 0x9186,
- 0x0039, 0x1538, 0x00d6, 0x2c68, 0x080c, 0xbf07, 0x11f0, 0x080c,
- 0x9b90, 0x01d8, 0x6106, 0x6003, 0x0001, 0x6023, 0x0001, 0x6910,
- 0x6112, 0x692c, 0x612e, 0x6930, 0x6132, 0x6934, 0x918c, 0x00ff,
- 0x6136, 0x6938, 0x613a, 0x693c, 0x613e, 0x695c, 0x615e, 0x080c,
- 0xbd09, 0x2009, 0x8020, 0x080c, 0x84e7, 0x2d60, 0x00de, 0x0804,
- 0x9be6, 0x0096, 0x6014, 0x2048, 0x080c, 0xb870, 0x01c8, 0xa867,
- 0x0103, 0xa880, 0xd0b4, 0x0128, 0xc0ec, 0xa882, 0xa87b, 0x0006,
- 0x0048, 0xd0bc, 0x0118, 0xa87b, 0x0002, 0x0020, 0xa87b, 0x0005,
- 0x080c, 0xbb79, 0xa877, 0x0000, 0x080c, 0x69b5, 0x080c, 0xba5f,
- 0x009e, 0x0804, 0x9be6, 0x0016, 0x0096, 0x6014, 0x2048, 0x080c,
- 0xb870, 0x0140, 0xa867, 0x0103, 0xa87b, 0x0028, 0xa877, 0x0000,
- 0x080c, 0x69b5, 0x009e, 0x001e, 0x9186, 0x0013, 0x0158, 0x9186,
- 0x0014, 0x0130, 0x9186, 0x0027, 0x0118, 0x080c, 0x9c9f, 0x0020,
- 0x080c, 0x8891, 0x080c, 0x9c20, 0x0005, 0x0056, 0x0066, 0x0096,
- 0x00a6, 0x2029, 0x0001, 0x9182, 0x0101, 0x1208, 0x0010, 0x2009,
- 0x0100, 0x2130, 0x8304, 0x9098, 0x0018, 0x2009, 0x0020, 0x2011,
- 0x0029, 0x080c, 0xb426, 0x96b2, 0x0020, 0xb004, 0x904d, 0x0110,
- 0x080c, 0x0fe1, 0x080c, 0x102f, 0x0520, 0x8528, 0xa867, 0x0110,
- 0xa86b, 0x0000, 0x2920, 0xb406, 0x968a, 0x003d, 0x1228, 0x2608,
- 0x2011, 0x001b, 0x0499, 0x00a8, 0x96b2, 0x003c, 0x2009, 0x003c,
- 0x2950, 0x2011, 0x001b, 0x0451, 0x0c28, 0x2001, 0x0205, 0x2003,
- 0x0000, 0x00ae, 0x852f, 0x95ad, 0x0003, 0xb566, 0x95ac, 0x0000,
- 0x0048, 0x2001, 0x0205, 0x2003, 0x0000, 0x00ae, 0x852f, 0x95ad,
- 0x0003, 0xb566, 0x009e, 0x006e, 0x005e, 0x0005, 0x00a6, 0x89ff,
- 0x0158, 0xa804, 0x9055, 0x0130, 0xa807, 0x0000, 0x080c, 0x69b5,
- 0x2a48, 0x0cb8, 0x080c, 0x69b5, 0x00ae, 0x0005, 0x00f6, 0x2079,
- 0x0200, 0x7814, 0x9085, 0x0080, 0x7816, 0xd184, 0x0108, 0x8108,
- 0x810c, 0x20a9, 0x0001, 0xa860, 0x20e8, 0xa85c, 0x9200, 0x20a0,
- 0x20e1, 0x0000, 0x2300, 0x9e00, 0x2098, 0x4003, 0x8318, 0x9386,
- 0x0020, 0x1148, 0x2018, 0x2300, 0x9e00, 0x2098, 0x7814, 0x8000,
- 0x9085, 0x0080, 0x7816, 0x8109, 0x1d80, 0x7817, 0x0000, 0x00fe,
- 0x0005, 0x0066, 0x0126, 0x2091, 0x8000, 0x2031, 0x0001, 0x6020,
- 0x9084, 0x000f, 0x0083, 0x012e, 0x006e, 0x0005, 0x0126, 0x2091,
- 0x8000, 0x0066, 0x2031, 0x0000, 0x6020, 0x9084, 0x000f, 0x001b,
- 0x006e, 0x012e, 0x0005, 0xb4a3, 0xb4a3, 0xb49e, 0xb4c7, 0xb47b,
- 0xb49e, 0xb47d, 0xb49e, 0xb47b, 0xb47b, 0xb49e, 0xb49e, 0xb49e,
- 0xb47b, 0xb47b, 0xb47b, 0x080c, 0x0d65, 0x6010, 0x9080, 0x0000,
- 0x2004, 0xd0bc, 0x190c, 0xb4c7, 0x0036, 0x6014, 0x0096, 0x2048,
- 0xa880, 0x009e, 0xd0cc, 0x0118, 0x2019, 0x000c, 0x0038, 0xd094,
- 0x0118, 0x2019, 0x000d, 0x0010, 0x2019, 0x0010, 0x080c, 0xce41,
- 0x6023, 0x0006, 0x6003, 0x0007, 0x003e, 0x0005, 0x9006, 0x0005,
- 0x9085, 0x0001, 0x0005, 0x0096, 0x86ff, 0x11e8, 0x6014, 0x2048,
- 0x080c, 0xb870, 0x01d0, 0x6043, 0xffff, 0xa864, 0x9086, 0x0139,
- 0x1128, 0xa87b, 0x0005, 0xa883, 0x0000, 0x0028, 0x900e, 0x2001,
- 0x0005, 0x080c, 0x6bc6, 0x080c, 0xbb79, 0x080c, 0x69a9, 0x080c,
- 0x9c20, 0x9085, 0x0001, 0x009e, 0x0005, 0x9006, 0x0ce0, 0x080c,
- 0x98c7, 0x080c, 0xbfc9, 0x6000, 0x908a, 0x0016, 0x1a0c, 0x0d65,
- 0x002b, 0x0106, 0x080c, 0x98e3, 0x010e, 0x0005, 0xb4e6, 0xb514,
- 0xb4e8, 0xb53b, 0xb50f, 0xb4e6, 0xb49e, 0xb4a3, 0xb4a3, 0xb49e,
- 0xb49e, 0xb49e, 0xb49e, 0xb49e, 0xb49e, 0xb49e, 0x080c, 0x0d65,
- 0x86ff, 0x1510, 0x6020, 0x9086, 0x0006, 0x01f0, 0x0096, 0x6014,
- 0x2048, 0x080c, 0xb870, 0x0158, 0xa87c, 0xd0cc, 0x0130, 0x0096,
- 0xa878, 0x2048, 0x080c, 0x0fe1, 0x009e, 0x080c, 0xbb79, 0x009e,
- 0x080c, 0xbf49, 0x6007, 0x0085, 0x6003, 0x000b, 0x6023, 0x0002,
- 0x2009, 0x8020, 0x080c, 0x84c9, 0x9085, 0x0001, 0x0005, 0x0066,
- 0x080c, 0x193e, 0x006e, 0x08a0, 0x00e6, 0x2071, 0x19bf, 0x7030,
- 0x9c06, 0x1120, 0x080c, 0x921d, 0x00ee, 0x0850, 0x6020, 0x9084,
- 0x000f, 0x9086, 0x0006, 0x1150, 0x0086, 0x0096, 0x2049, 0x0001,
- 0x2c40, 0x080c, 0x936d, 0x009e, 0x008e, 0x0040, 0x0066, 0x080c,
- 0x9119, 0x190c, 0x0d65, 0x080c, 0x9127, 0x006e, 0x00ee, 0x1904,
- 0xb4e8, 0x0804, 0xb49e, 0x0036, 0x00e6, 0x2071, 0x19bf, 0x704c,
- 0x9c06, 0x1138, 0x901e, 0x080c, 0x929d, 0x00ee, 0x003e, 0x0804,
- 0xb4e8, 0x080c, 0x94a4, 0x00ee, 0x003e, 0x1904, 0xb4e8, 0x0804,
- 0xb49e, 0x00c6, 0x0066, 0x6020, 0x9084, 0x000f, 0x001b, 0x006e,
- 0x00ce, 0x0005, 0xb571, 0xb640, 0xb7aa, 0xb579, 0x9c20, 0xb571,
- 0xce33, 0xbfb1, 0xb640, 0xb56a, 0xb836, 0xb56a, 0xb56a, 0xb56a,
- 0xb56a, 0xb56a, 0x080c, 0x0d65, 0x080c, 0xba85, 0x1110, 0x080c,
- 0xa59c, 0x0005, 0x080c, 0x8891, 0x0804, 0x9be6, 0x601b, 0x0001,
- 0x0005, 0x080c, 0xb870, 0x0130, 0x6014, 0x0096, 0x2048, 0x2c00,
- 0xa896, 0x009e, 0x080c, 0x98c7, 0x080c, 0xbfc9, 0x6000, 0x908a,
- 0x0016, 0x1a0c, 0x0d65, 0x0013, 0x0804, 0x98e3, 0xb59e, 0xb5a0,
- 0xb5ca, 0xb5de, 0xb60b, 0xb59e, 0xb571, 0xb571, 0xb571, 0xb5e5,
- 0xb5e5, 0xb59e, 0xb59e, 0xb59e, 0xb59e, 0xb5ef, 0x080c, 0x0d65,
- 0x00e6, 0x6014, 0x0096, 0x2048, 0xa880, 0xc0b5, 0xa882, 0x009e,
- 0x2071, 0x19bf, 0x7030, 0x9c06, 0x01d0, 0x0066, 0x080c, 0x9119,
- 0x190c, 0x0d65, 0x080c, 0x9127, 0x006e, 0x080c, 0xbf49, 0x6007,
- 0x0085, 0x6003, 0x000b, 0x6023, 0x0002, 0x2001, 0x195f, 0x2004,
- 0x601a, 0x2009, 0x8020, 0x080c, 0x84c9, 0x00ee, 0x0005, 0x601b,
- 0x0001, 0x0cd8, 0x0096, 0x6014, 0x2048, 0xa880, 0xc0b5, 0xa882,
- 0x009e, 0x080c, 0xbf49, 0x6007, 0x0085, 0x6003, 0x000b, 0x6023,
- 0x0002, 0x2009, 0x8020, 0x080c, 0x84c9, 0x0005, 0x080c, 0x98c7,
- 0x080c, 0x9a38, 0x080c, 0x98e3, 0x0c28, 0x0096, 0x601b, 0x0001,
- 0x6014, 0x2048, 0xa880, 0xc0b5, 0xa882, 0x009e, 0x0005, 0x080c,
- 0x53b0, 0x01b8, 0x6014, 0x0096, 0x904d, 0x0190, 0xa864, 0xa867,
- 0x0103, 0xa87b, 0x0006, 0x9086, 0x0139, 0x1150, 0xa867, 0x0139,
- 0xa87b, 0x0030, 0xa897, 0x4005, 0xa89b, 0x0004, 0x080c, 0x69b5,
- 0x009e, 0x0804, 0x9be6, 0x6014, 0x0096, 0x904d, 0x0560, 0xa97c,
- 0xd1e4, 0x1158, 0x611c, 0xd1fc, 0x0530, 0x6110, 0x00b6, 0x2158,
- 0xb93c, 0x8109, 0x0208, 0xb93e, 0x00be, 0x080c, 0x98e3, 0x2001,
- 0x180f, 0x2004, 0xd0c4, 0x0110, 0x009e, 0x0005, 0xa884, 0x009e,
- 0x8003, 0x800b, 0x810b, 0x9108, 0x611a, 0x2001, 0x0037, 0x2c08,
- 0x080c, 0x15b8, 0x6000, 0x9086, 0x0004, 0x1120, 0x2009, 0x0048,
- 0x080c, 0x9c82, 0x0005, 0x009e, 0x080c, 0x193e, 0x0804, 0xb5ca,
- 0x6000, 0x908a, 0x0016, 0x1a0c, 0x0d65, 0x000b, 0x0005, 0xb657,
- 0xb576, 0xb659, 0xb657, 0xb659, 0xb659, 0xb572, 0xb657, 0xb56c,
- 0xb56c, 0xb657, 0xb657, 0xb657, 0xb657, 0xb657, 0xb657, 0x080c,
- 0x0d65, 0x6010, 0x00b6, 0x2058, 0xb804, 0x9084, 0x00ff, 0x00be,
- 0x908a, 0x000c, 0x1a0c, 0x0d65, 0x00b6, 0x0013, 0x00be, 0x0005,
- 0xb674, 0xb741, 0xb676, 0xb6b6, 0xb676, 0xb6b6, 0xb676, 0xb684,
- 0xb674, 0xb6b6, 0xb674, 0xb6a5, 0x080c, 0x0d65, 0x6004, 0x908e,
- 0x0016, 0x05c0, 0x908e, 0x0004, 0x05a8, 0x908e, 0x0002, 0x0590,
- 0x908e, 0x0052, 0x0904, 0xb73d, 0x6004, 0x080c, 0xba85, 0x0904,
- 0xb75a, 0x908e, 0x0004, 0x1110, 0x080c, 0x305d, 0x908e, 0x0021,
- 0x0904, 0xb75e, 0x908e, 0x0022, 0x0904, 0xb7a5, 0x908e, 0x003d,
- 0x0904, 0xb75e, 0x908e, 0x0039, 0x0904, 0xb762, 0x908e, 0x0035,
- 0x0904, 0xb762, 0x908e, 0x001e, 0x0178, 0x908e, 0x0001, 0x1140,
- 0x6010, 0x2058, 0xb804, 0x9084, 0x00ff, 0x9086, 0x0006, 0x0110,
- 0x080c, 0x302e, 0x080c, 0xa59c, 0x0804, 0x9c20, 0x00c6, 0x00d6,
- 0x6104, 0x9186, 0x0016, 0x0904, 0xb72e, 0x9186, 0x0002, 0x1904,
- 0xb703, 0x2001, 0x1836, 0x2004, 0xd08c, 0x11c8, 0x080c, 0x70ba,
- 0x11b0, 0x080c, 0xbf8f, 0x0138, 0x080c, 0x70dd, 0x1120, 0x080c,
- 0x6fc5, 0x0804, 0xb78e, 0x2001, 0x1955, 0x2003, 0x0001, 0x2001,
- 0x1800, 0x2003, 0x0001, 0x080c, 0x6feb, 0x0804, 0xb78e, 0x6010,
- 0x2058, 0x2001, 0x1836, 0x2004, 0xd0ac, 0x1904, 0xb78e, 0xb8a0,
- 0x9084, 0xff80, 0x1904, 0xb78e, 0xb840, 0x9084, 0x00ff, 0x9005,
- 0x0190, 0x8001, 0xb842, 0x6017, 0x0000, 0x6023, 0x0007, 0x601b,
- 0x0398, 0x604b, 0x0000, 0x080c, 0x9b90, 0x0128, 0x2b00, 0x6012,
- 0x6023, 0x0001, 0x0458, 0x00de, 0x00ce, 0x6004, 0x908e, 0x0002,
- 0x11a0, 0x6010, 0x2058, 0xb8a0, 0x9086, 0x007e, 0x1170, 0x2009,
- 0x1836, 0x2104, 0xc085, 0x200a, 0x00e6, 0x2071, 0x1800, 0x080c,
- 0x5c8a, 0x00ee, 0x080c, 0xa59c, 0x0030, 0x080c, 0xa59c, 0x080c,
- 0x302e, 0x080c, 0xbfa4, 0x00e6, 0x0126, 0x2091, 0x8000, 0x080c,
- 0x305d, 0x012e, 0x00ee, 0x080c, 0x9c20, 0x0005, 0x2001, 0x0002,
- 0x080c, 0x61e0, 0x6003, 0x0001, 0x6007, 0x0002, 0x080c, 0x84ee,
- 0x080c, 0x894f, 0x00de, 0x00ce, 0x0c80, 0x080c, 0x305d, 0x0804,
- 0xb6b2, 0x00c6, 0x00d6, 0x6104, 0x9186, 0x0016, 0x0d38, 0x6010,
- 0x2058, 0xb840, 0x9084, 0x00ff, 0x9005, 0x0904, 0xb703, 0x8001,
- 0xb842, 0x6003, 0x0001, 0x080c, 0x84ee, 0x080c, 0x894f, 0x00de,
- 0x00ce, 0x0898, 0x080c, 0xa59c, 0x0804, 0xb6b4, 0x080c, 0xa5d8,
- 0x0804, 0xb6b4, 0x00d6, 0x2c68, 0x6104, 0x080c, 0xbf07, 0x00de,
- 0x0118, 0x080c, 0x9be6, 0x0408, 0x6004, 0x8007, 0x6134, 0x918c,
- 0x00ff, 0x9105, 0x6036, 0x6007, 0x0085, 0x6003, 0x000b, 0x6023,
- 0x0002, 0x603c, 0x600a, 0x2001, 0x195f, 0x2004, 0x601a, 0x602c,
- 0x2c08, 0x2060, 0x6024, 0xd0b4, 0x0108, 0xc085, 0xc0b5, 0x6026,
- 0x2160, 0x2009, 0x8020, 0x080c, 0x84e7, 0x0005, 0x00de, 0x00ce,
- 0x080c, 0xa59c, 0x080c, 0x302e, 0x00e6, 0x0126, 0x2091, 0x8000,
- 0x080c, 0x305d, 0x6017, 0x0000, 0x6023, 0x0007, 0x601b, 0x0398,
- 0x604b, 0x0000, 0x012e, 0x00ee, 0x0005, 0x080c, 0xa020, 0x1904,
- 0xb75a, 0x0005, 0x6000, 0x908a, 0x0016, 0x1a0c, 0x0d65, 0x0096,
- 0x00d6, 0x001b, 0x00de, 0x009e, 0x0005, 0xb7c5, 0xb7c5, 0xb7c5,
- 0xb7c5, 0xb7c5, 0xb7c5, 0xb7c5, 0xb7c5, 0xb7c5, 0xb571, 0xb7c5,
- 0xb576, 0xb7c7, 0xb576, 0xb7e1, 0xb7c5, 0x080c, 0x0d65, 0x6004,
- 0x9086, 0x008b, 0x01b0, 0x6034, 0x908c, 0xff00, 0x810f, 0x9186,
- 0x0035, 0x1130, 0x602c, 0x9080, 0x0009, 0x200c, 0xc185, 0x2102,
- 0x6007, 0x008b, 0x6003, 0x000d, 0x2009, 0x8020, 0x080c, 0x84e7,
- 0x0005, 0x080c, 0xbf83, 0x0118, 0x080c, 0xbf96, 0x0010, 0x080c,
- 0xbfa4, 0x080c, 0xba5f, 0x080c, 0xb870, 0x0570, 0x080c, 0x302e,
- 0x080c, 0xb870, 0x0168, 0x6014, 0x2048, 0xa867, 0x0103, 0xa87b,
- 0x0006, 0xa877, 0x0000, 0xa880, 0xc0ed, 0xa882, 0x080c, 0x69b5,
- 0x2c68, 0x080c, 0x9b90, 0x0150, 0x6810, 0x6012, 0x080c, 0xbd09,
- 0x00c6, 0x2d60, 0x080c, 0x9c20, 0x00ce, 0x0008, 0x2d60, 0x6017,
- 0x0000, 0x6023, 0x0001, 0x6007, 0x0001, 0x6003, 0x0001, 0x080c,
- 0x84ee, 0x080c, 0x894f, 0x00c8, 0x080c, 0xbf83, 0x0138, 0x6034,
- 0x9086, 0x4000, 0x1118, 0x080c, 0x302e, 0x08d0, 0x6034, 0x908c,
- 0xff00, 0x810f, 0x9186, 0x0039, 0x0118, 0x9186, 0x0035, 0x1118,
- 0x080c, 0x302e, 0x0868, 0x080c, 0x9c20, 0x0005, 0x6000, 0x908a,
- 0x0016, 0x1a0c, 0x0d65, 0x0002, 0xb84c, 0xb84c, 0xb84e, 0xb84e,
- 0xb84e, 0xb84c, 0xb84c, 0x9c20, 0xb84c, 0xb84c, 0xb84c, 0xb84c,
- 0xb84c, 0xb84c, 0xb84c, 0xb84c, 0x080c, 0x0d65, 0x080c, 0x98c7,
- 0x080c, 0x9a38, 0x080c, 0x98e3, 0x6114, 0x0096, 0x2148, 0xa87b,
- 0x0006, 0x080c, 0x69b5, 0x009e, 0x0804, 0x9be6, 0x9284, 0x0003,
- 0x1158, 0x9282, 0x1ddc, 0x0240, 0x2001, 0x1819, 0x2004, 0x9202,
- 0x1218, 0x9085, 0x0001, 0x0005, 0x9006, 0x0ce8, 0x0096, 0x0028,
- 0x0096, 0x0006, 0x6014, 0x2048, 0x000e, 0x0006, 0x9984, 0xf000,
- 0x9086, 0xf000, 0x0110, 0x080c, 0x10da, 0x000e, 0x009e, 0x0005,
- 0x00e6, 0x00c6, 0x0036, 0x0006, 0x0126, 0x2091, 0x8000, 0x2061,
- 0x1ddc, 0x2071, 0x1800, 0x7350, 0x7070, 0x9302, 0x1640, 0x6020,
- 0x9206, 0x11f8, 0x080c, 0xbf8f, 0x0180, 0x9286, 0x0001, 0x1168,
- 0x6004, 0x9086, 0x0004, 0x1148, 0x080c, 0x302e, 0x080c, 0xbfa4,
- 0x00c6, 0x080c, 0x9c20, 0x00ce, 0x0060, 0x080c, 0xbc7b, 0x0148,
- 0x080c, 0xba85, 0x1110, 0x080c, 0xa59c, 0x00c6, 0x080c, 0x9be6,
- 0x00ce, 0x9ce0, 0x001c, 0x7064, 0x9c02, 0x1208, 0x08a0, 0x012e,
- 0x000e, 0x003e, 0x00ce, 0x00ee, 0x0005, 0x00e6, 0x00c6, 0x0016,
- 0x9188, 0x1000, 0x210c, 0x81ff, 0x0128, 0x2061, 0x1b09, 0x6112,
- 0x080c, 0x302e, 0x9006, 0x0010, 0x9085, 0x0001, 0x001e, 0x00ce,
- 0x00ee, 0x0005, 0x00c6, 0x0126, 0x2091, 0x8000, 0x080c, 0x9b90,
- 0x01b0, 0x665e, 0x2b00, 0x6012, 0x080c, 0x53b0, 0x0118, 0x080c,
- 0xb9a1, 0x0168, 0x080c, 0xbd09, 0x6023, 0x0003, 0x2009, 0x004b,
- 0x080c, 0x9c82, 0x9085, 0x0001, 0x012e, 0x00ce, 0x0005, 0x9006,
- 0x0cd8, 0x00c6, 0x0126, 0x2091, 0x8000, 0xbaa0, 0x080c, 0x9c55,
- 0x0580, 0x605f, 0x0000, 0x2b00, 0x6012, 0x080c, 0xbd09, 0x6023,
- 0x0003, 0x0016, 0x080c, 0x98c7, 0x080c, 0x8658, 0x0076, 0x903e,
- 0x080c, 0x853d, 0x2c08, 0x080c, 0xd011, 0x007e, 0x080c, 0x98e3,
- 0x001e, 0xd184, 0x0128, 0x080c, 0x9be6, 0x9085, 0x0001, 0x0070,
- 0x080c, 0x53b0, 0x0128, 0xd18c, 0x1170, 0x080c, 0xb9a1, 0x0148,
- 0x2009, 0x004c, 0x080c, 0x9c82, 0x9085, 0x0001, 0x012e, 0x00ce,
- 0x0005, 0x9006, 0x0cd8, 0x2900, 0x6016, 0x0c90, 0x2009, 0x004d,
- 0x0010, 0x2009, 0x004e, 0x00f6, 0x00c6, 0x0046, 0x0016, 0x080c,
- 0x9b90, 0x2c78, 0x0590, 0x7e5e, 0x2b00, 0x7812, 0x7823, 0x0003,
- 0x2021, 0x0005, 0x080c, 0xb9b3, 0x9186, 0x004d, 0x0118, 0x9186,
- 0x004e, 0x0148, 0x2001, 0x1958, 0x200c, 0xd1fc, 0x0168, 0x2f60,
- 0x080c, 0x9be6, 0x00d0, 0x2001, 0x1957, 0x200c, 0xd1fc, 0x0120,
- 0x2f60, 0x080c, 0x9be6, 0x0088, 0x2f60, 0x080c, 0x53b0, 0x0138,
- 0xd18c, 0x1118, 0x04f1, 0x0148, 0x0010, 0x2900, 0x7816, 0x001e,
- 0x0016, 0x080c, 0x9c82, 0x9085, 0x0001, 0x001e, 0x004e, 0x00ce,
- 0x00fe, 0x0005, 0x00f6, 0x00c6, 0x0046, 0x080c, 0x9b90, 0x2c78,
- 0x0508, 0x7e5e, 0x2b00, 0x7812, 0x7823, 0x0003, 0x0096, 0x2021,
- 0x0004, 0x0489, 0x009e, 0x2001, 0x1956, 0x200c, 0xd1fc, 0x0120,
- 0x2f60, 0x080c, 0x9be6, 0x0060, 0x2f60, 0x080c, 0x53b0, 0x0120,
- 0xd18c, 0x1160, 0x0071, 0x0130, 0x2009, 0x0052, 0x080c, 0x9c82,
- 0x9085, 0x0001, 0x004e, 0x00ce, 0x00fe, 0x0005, 0x2900, 0x7816,
- 0x0c98, 0x00c6, 0x080c, 0x489a, 0x00ce, 0x1120, 0x080c, 0x9be6,
- 0x9006, 0x0005, 0xa867, 0x0000, 0xa86b, 0x8000, 0x2900, 0x6016,
- 0x9085, 0x0001, 0x0005, 0x0096, 0x0076, 0x0126, 0x2091, 0x8000,
- 0x080c, 0x98c7, 0x080c, 0x6471, 0x0158, 0x2001, 0xb9ba, 0x0006,
- 0x900e, 0x2400, 0x080c, 0x6bc6, 0x080c, 0x69b5, 0x000e, 0x0807,
- 0x2418, 0x080c, 0x8857, 0xbaa0, 0x0086, 0x2041, 0x0001, 0x2039,
- 0x0001, 0x2608, 0x080c, 0x8672, 0x008e, 0x080c, 0x853d, 0x2f08,
- 0x2648, 0x080c, 0xd011, 0xb93c, 0x81ff, 0x090c, 0x8749, 0x080c,
- 0x98e3, 0x012e, 0x007e, 0x009e, 0x0005, 0x00c6, 0x0126, 0x2091,
- 0x8000, 0x080c, 0x9b90, 0x0190, 0x660a, 0x2b08, 0x6112, 0x080c,
- 0xbd09, 0x6023, 0x0001, 0x2900, 0x6016, 0x2009, 0x001f, 0x080c,
- 0x9c82, 0x9085, 0x0001, 0x012e, 0x00ce, 0x0005, 0x9006, 0x0cd8,
- 0x00c6, 0x0126, 0x2091, 0x8000, 0x080c, 0x9c55, 0x01b8, 0x660a,
- 0x2b08, 0x6112, 0x080c, 0xbd09, 0x6023, 0x0008, 0x2900, 0x6016,
- 0x00f6, 0x2c78, 0x080c, 0x1669, 0x00fe, 0x2009, 0x0021, 0x080c,
- 0x9c82, 0x9085, 0x0001, 0x012e, 0x00ce, 0x0005, 0x9006, 0x0cd8,
- 0x2009, 0x003d, 0x00c6, 0x0126, 0x0016, 0x2091, 0x8000, 0x080c,
- 0x9b90, 0x0198, 0x660a, 0x2b08, 0x6112, 0x080c, 0xbd09, 0x6023,
- 0x0001, 0x2900, 0x6016, 0x001e, 0x0016, 0x080c, 0x9c82, 0x9085,
- 0x0001, 0x001e, 0x012e, 0x00ce, 0x0005, 0x9006, 0x0cd0, 0x00c6,
- 0x0126, 0x2091, 0x8000, 0x080c, 0x9c55, 0x0188, 0x2b08, 0x6112,
- 0x080c, 0xbd09, 0x6023, 0x0001, 0x2900, 0x6016, 0x2009, 0x0000,
- 0x080c, 0x9c82, 0x9085, 0x0001, 0x012e, 0x00ce, 0x0005, 0x9006,
- 0x0cd8, 0x2009, 0x0044, 0x0830, 0x2009, 0x0049, 0x0818, 0x0026,
- 0x00b6, 0x6210, 0x2258, 0xba3c, 0x82ff, 0x0118, 0x8211, 0xba3e,
- 0x1140, 0xb8c0, 0x9005, 0x0128, 0xb888, 0x9005, 0x1110, 0xb88b,
- 0x0001, 0x00be, 0x002e, 0x0005, 0x0006, 0x0016, 0x6004, 0x908e,
- 0x0002, 0x0140, 0x908e, 0x0003, 0x0128, 0x908e, 0x0004, 0x0110,
- 0x9085, 0x0001, 0x001e, 0x000e, 0x0005, 0x0006, 0x0086, 0x0096,
- 0x6020, 0x9086, 0x0004, 0x01a8, 0x6014, 0x904d, 0x080c, 0xb870,
- 0x0180, 0xa864, 0x9086, 0x0139, 0x0170, 0x6020, 0x90c6, 0x0003,
- 0x0140, 0x90c6, 0x0002, 0x0128, 0xa868, 0xd0fc, 0x0110, 0x9006,
- 0x0010, 0x9085, 0x0001, 0x009e, 0x008e, 0x000e, 0x0005, 0x00c6,
- 0x0126, 0x2091, 0x8000, 0x080c, 0x9c55, 0x0198, 0x2b08, 0x6112,
- 0x080c, 0xbd09, 0x6023, 0x0001, 0x2900, 0x6016, 0x080c, 0x302e,
- 0x2009, 0x0028, 0x080c, 0x9c82, 0x9085, 0x0001, 0x012e, 0x00ce,
- 0x0005, 0x9006, 0x0cd8, 0x9186, 0x0015, 0x11a8, 0x2011, 0x1823,
- 0x2204, 0x9086, 0x0074, 0x1178, 0x00b6, 0x080c, 0xa827, 0x00be,
- 0x080c, 0xaa66, 0x6003, 0x0001, 0x6007, 0x0029, 0x080c, 0x84ee,
- 0x080c, 0x894f, 0x0078, 0x6014, 0x0096, 0x2048, 0xa868, 0x009e,
- 0xd0fc, 0x0148, 0x2001, 0x0001, 0x080c, 0xbec8, 0x080c, 0xa59c,
- 0x080c, 0x9be6, 0x0005, 0x0096, 0x6014, 0x904d, 0x090c, 0x0d65,
- 0xa87b, 0x0030, 0xa883, 0x0000, 0xa897, 0x4005, 0xa89b, 0x0004,
- 0xa867, 0x0139, 0x0126, 0x2091, 0x8000, 0x080c, 0x69b5, 0x012e,
- 0x009e, 0x080c, 0x9be6, 0x0c30, 0x0096, 0x9186, 0x0016, 0x1128,
- 0x2001, 0x0004, 0x080c, 0x61e0, 0x00e8, 0x9186, 0x0015, 0x1510,
- 0x2011, 0x1823, 0x2204, 0x9086, 0x0014, 0x11e0, 0x6010, 0x00b6,
- 0x2058, 0x080c, 0x632a, 0x00be, 0x080c, 0xab37, 0x1198, 0x6010,
- 0x00b6, 0x2058, 0xb890, 0x00be, 0x9005, 0x0160, 0x2001, 0x0006,
- 0x080c, 0x61e0, 0x6014, 0x2048, 0xa868, 0xd0fc, 0x0170, 0x080c,
- 0x9ff4, 0x0048, 0x6014, 0x2048, 0xa868, 0xd0fc, 0x0528, 0x080c,
- 0xa59c, 0x080c, 0x9be6, 0x009e, 0x0005, 0x6014, 0x6310, 0x2358,
- 0x904d, 0x090c, 0x0d65, 0xa87b, 0x0000, 0xa883, 0x0000, 0xa897,
- 0x4000, 0x900e, 0x080c, 0x6582, 0x1108, 0xc185, 0xb800, 0xd0bc,
- 0x0108, 0xc18d, 0xa99a, 0x0126, 0x2091, 0x8000, 0x080c, 0x69b5,
- 0x012e, 0x080c, 0x9be6, 0x08f8, 0x6014, 0x904d, 0x090c, 0x0d65,
- 0xa87b, 0x0030, 0xa883, 0x0000, 0xa897, 0x4005, 0xa89b, 0x0004,
- 0xa867, 0x0139, 0x0126, 0x2091, 0x8000, 0x080c, 0x69b5, 0x012e,
- 0x080c, 0x9be6, 0x0840, 0xa878, 0x9086, 0x0005, 0x1108, 0x0009,
- 0x0005, 0xa880, 0xc0ad, 0xa882, 0x0005, 0x604b, 0x0000, 0x6017,
- 0x0000, 0x6003, 0x0001, 0x6007, 0x0050, 0x2009, 0x8023, 0x080c,
- 0x84e7, 0x0005, 0x00c6, 0x6010, 0x00b6, 0x2058, 0xb800, 0x00be,
- 0xd0bc, 0x0130, 0x0066, 0x6020, 0x9084, 0x000f, 0x001b, 0x006e,
- 0x00ce, 0x0005, 0xb571, 0xbbac, 0xbbac, 0xbbaf, 0xd30b, 0xd326,
- 0xd329, 0xb571, 0xb571, 0xb571, 0xb571, 0xb571, 0xb571, 0xb571,
- 0xb571, 0xb571, 0x080c, 0x0d65, 0xa001, 0xa001, 0x0005, 0x0096,
- 0x6014, 0x904d, 0x0118, 0xa87c, 0xd0e4, 0x1110, 0x009e, 0x0010,
- 0x009e, 0x0005, 0x6010, 0x00b6, 0x2058, 0xb800, 0x00be, 0xd0bc,
- 0x0550, 0x2001, 0x1833, 0x2004, 0x9005, 0x1540, 0x00f6, 0x2c78,
- 0x080c, 0x9b90, 0x0508, 0x7810, 0x6012, 0x080c, 0xbd09, 0x7820,
- 0x9086, 0x0003, 0x0128, 0x7808, 0x603a, 0x2f00, 0x603e, 0x0020,
- 0x7808, 0x603e, 0x2f00, 0x603a, 0x602e, 0x6023, 0x0001, 0x6007,
- 0x0035, 0x6003, 0x0001, 0x795c, 0x615e, 0x2009, 0x8020, 0x080c,
- 0x84e7, 0x2f60, 0x00fe, 0x0005, 0x2f60, 0x00fe, 0x2001, 0x1960,
- 0x2004, 0x604a, 0x0005, 0x0016, 0x0096, 0x6814, 0x2048, 0x681c,
- 0xd0fc, 0xc0fc, 0x681e, 0xa87c, 0x1108, 0xd0e4, 0x0180, 0xc0e4,
- 0xa87e, 0xa877, 0x0000, 0xa893, 0x0000, 0xa88f, 0x0000, 0xd0cc,
- 0x0130, 0xc0cc, 0xa87e, 0xa878, 0x2048, 0x080c, 0x0fe1, 0x6830,
- 0x6036, 0x908e, 0x0001, 0x0148, 0x6803, 0x0002, 0x9086, 0x0005,
- 0x0170, 0x9006, 0x602e, 0x6032, 0x00d0, 0x681c, 0xc085, 0x681e,
- 0x6803, 0x0004, 0x6824, 0xc0f4, 0x9085, 0x0c00, 0x6826, 0x6814,
- 0x2048, 0xa8ac, 0x6938, 0x9102, 0xa8b0, 0x693c, 0x9103, 0x1e48,
- 0x683c, 0x602e, 0x6838, 0x9084, 0xfffc, 0x683a, 0x6032, 0x2d00,
- 0x603a, 0x6808, 0x603e, 0x6910, 0x6112, 0x695c, 0x615e, 0x6023,
- 0x0001, 0x6007, 0x0039, 0x6003, 0x0001, 0x2009, 0x8020, 0x080c,
- 0x84e7, 0x009e, 0x001e, 0x0005, 0x6024, 0xd0d4, 0x0510, 0xd0f4,
- 0x11f8, 0x6038, 0x940a, 0x603c, 0x9303, 0x0230, 0x9105, 0x0120,
- 0x6024, 0xc0d4, 0xc0f5, 0x0098, 0x643a, 0x633e, 0xac3e, 0xab42,
- 0x0046, 0x0036, 0x2400, 0xacac, 0x9402, 0xa836, 0x2300, 0xabb0,
- 0x9303, 0xa83a, 0x003e, 0x004e, 0x6024, 0xc0d4, 0x0000, 0x6026,
- 0x0005, 0xd0f4, 0x1138, 0xa83c, 0x603a, 0xa840, 0x603e, 0x6024,
- 0xc0f5, 0x6026, 0x0005, 0x0006, 0x0016, 0x6004, 0x908e, 0x0034,
- 0x01b8, 0x908e, 0x0035, 0x01a0, 0x908e, 0x0036, 0x0188, 0x908e,
- 0x0037, 0x0170, 0x908e, 0x0038, 0x0158, 0x908e, 0x0039, 0x0140,
- 0x908e, 0x003a, 0x0128, 0x908e, 0x003b, 0x0110, 0x9085, 0x0001,
- 0x001e, 0x000e, 0x0005, 0x0006, 0x0016, 0x0026, 0x0036, 0x00e6,
- 0x2001, 0x195a, 0x200c, 0x8000, 0x2014, 0x2001, 0x0032, 0x080c,
- 0x842f, 0x2001, 0x195e, 0x82ff, 0x1110, 0x2011, 0x0014, 0x2202,
- 0x2001, 0x195c, 0x200c, 0x8000, 0x2014, 0x2071, 0x1944, 0x711a,
- 0x721e, 0x2001, 0x0064, 0x080c, 0x842f, 0x2001, 0x195f, 0x82ff,
- 0x1110, 0x2011, 0x0014, 0x2202, 0x2001, 0x1960, 0x9288, 0x000a,
- 0x2102, 0x2001, 0x0017, 0x080c, 0x98b8, 0x2001, 0x1a60, 0x2102,
- 0x2001, 0x0032, 0x080c, 0x15b8, 0x080c, 0x666b, 0x00ee, 0x003e,
- 0x002e, 0x001e, 0x000e, 0x0005, 0x0006, 0x0016, 0x00e6, 0x2001,
- 0x195e, 0x2003, 0x0028, 0x2001, 0x195f, 0x2003, 0x0014, 0x2071,
- 0x1944, 0x701b, 0x0000, 0x701f, 0x07d0, 0x2001, 0x1960, 0x2009,
- 0x001e, 0x2102, 0x2001, 0x0017, 0x080c, 0x98b8, 0x2001, 0x1a60,
- 0x2102, 0x2001, 0x0032, 0x080c, 0x15b8, 0x00ee, 0x001e, 0x000e,
- 0x0005, 0x0096, 0x6060, 0x904d, 0x0110, 0x080c, 0x1061, 0x009e,
- 0x0005, 0x0005, 0x00c6, 0x0126, 0x2091, 0x8000, 0x080c, 0x9b90,
- 0x0180, 0x2b08, 0x6112, 0x0ca9, 0x6023, 0x0001, 0x2900, 0x6016,
- 0x2009, 0x0033, 0x080c, 0x9c82, 0x9085, 0x0001, 0x012e, 0x00ce,
- 0x0005, 0x9006, 0x0cd8, 0x0096, 0x00e6, 0x00f6, 0x2071, 0x1800,
- 0x9186, 0x0015, 0x1500, 0x708c, 0x9086, 0x0018, 0x11e0, 0x6014,
- 0x2048, 0xaa3c, 0xd2e4, 0x1160, 0x2c78, 0x080c, 0x8a0e, 0x01d8,
- 0x7078, 0xaa50, 0x9206, 0x1160, 0x707c, 0xaa54, 0x9206, 0x1140,
- 0x6210, 0x00b6, 0x2258, 0xbaa0, 0x00be, 0x900e, 0x080c, 0x307d,
- 0x080c, 0x9ff4, 0x0020, 0x080c, 0xa59c, 0x080c, 0x9be6, 0x00fe,
- 0x00ee, 0x009e, 0x0005, 0x705c, 0xaa54, 0x9206, 0x0d48, 0x0c80,
- 0x00c6, 0x0126, 0x2091, 0x8000, 0x080c, 0x9b90, 0x0188, 0x2b08,
- 0x6112, 0x080c, 0xbd09, 0x6023, 0x0001, 0x2900, 0x6016, 0x2009,
- 0x004d, 0x080c, 0x9c82, 0x9085, 0x0001, 0x012e, 0x00ce, 0x0005,
- 0x9006, 0x0cd8, 0x00c6, 0x0126, 0x2091, 0x8000, 0x0016, 0x080c,
- 0x9b90, 0x0180, 0x2b08, 0x6112, 0x080c, 0xbd09, 0x6023, 0x0001,
- 0x2900, 0x6016, 0x001e, 0x080c, 0x9c82, 0x9085, 0x0001, 0x012e,
- 0x00ce, 0x0005, 0x001e, 0x9006, 0x0cd0, 0x0016, 0x0026, 0x0036,
- 0x0046, 0x0056, 0x0066, 0x0096, 0x00e6, 0x00f6, 0x2071, 0x1800,
- 0x9186, 0x0015, 0x1568, 0x718c, 0x6014, 0x2048, 0xa814, 0x8003,
- 0x9106, 0x1530, 0x20e1, 0x0000, 0x2001, 0x1978, 0x2003, 0x0000,
- 0x6014, 0x2048, 0xa830, 0x20a8, 0x8906, 0x8006, 0x8007, 0x9094,
- 0x003f, 0x22e8, 0x9084, 0xffc0, 0x9080, 0x001b, 0x20a0, 0x2001,
- 0x1978, 0x0016, 0x200c, 0x080c, 0xc581, 0x001e, 0xa804, 0x9005,
- 0x0110, 0x2048, 0x0c38, 0x6014, 0x2048, 0xa867, 0x0103, 0x0010,
- 0x080c, 0xa59c, 0x080c, 0x9be6, 0x00fe, 0x00ee, 0x009e, 0x006e,
- 0x005e, 0x004e, 0x003e, 0x002e, 0x001e, 0x0005, 0x0096, 0x00e6,
- 0x00f6, 0x2071, 0x1800, 0x9186, 0x0015, 0x11b8, 0x708c, 0x9086,
- 0x0004, 0x1198, 0x6014, 0x2048, 0x2c78, 0x080c, 0x8a0e, 0x01a8,
- 0x7078, 0xaa74, 0x9206, 0x1130, 0x707c, 0xaa78, 0x9206, 0x1110,
- 0x080c, 0x302e, 0x080c, 0x9ff4, 0x0020, 0x080c, 0xa59c, 0x080c,
- 0x9be6, 0x00fe, 0x00ee, 0x009e, 0x0005, 0x705c, 0xaa78, 0x9206,
- 0x0d78, 0x0c80, 0x0096, 0x00e6, 0x00f6, 0x2071, 0x1800, 0x9186,
- 0x0015, 0x1550, 0x708c, 0x9086, 0x0004, 0x1530, 0x6014, 0x2048,
- 0x2c78, 0x080c, 0x8a0e, 0x05f0, 0x7078, 0xaacc, 0x9206, 0x1180,
- 0x707c, 0xaad0, 0x9206, 0x1160, 0x080c, 0x302e, 0x0016, 0xa998,
- 0xaab0, 0x9284, 0x1000, 0xc0fd, 0x080c, 0x5360, 0x001e, 0x0010,
- 0x080c, 0x5149, 0x080c, 0xb870, 0x0508, 0xa87b, 0x0000, 0xa883,
- 0x0000, 0xa897, 0x4000, 0x0080, 0x080c, 0xb870, 0x01b8, 0x6014,
- 0x2048, 0x080c, 0x5149, 0x1d70, 0xa87b, 0x0030, 0xa883, 0x0000,
- 0xa897, 0x4005, 0xa89b, 0x0004, 0x0126, 0x2091, 0x8000, 0xa867,
- 0x0139, 0x080c, 0x69b5, 0x012e, 0x080c, 0x9be6, 0x00fe, 0x00ee,
- 0x009e, 0x0005, 0x705c, 0xaad0, 0x9206, 0x0930, 0x0888, 0x0016,
- 0x0026, 0xa87c, 0xd0ac, 0x0178, 0xa938, 0xaa34, 0x2100, 0x9205,
- 0x0150, 0xa890, 0x9106, 0x1118, 0xa88c, 0x9206, 0x0120, 0xa992,
- 0xaa8e, 0x9085, 0x0001, 0x002e, 0x001e, 0x0005, 0x00b6, 0x00d6,
- 0x0036, 0x080c, 0xb870, 0x0904, 0xbec4, 0x0096, 0x6314, 0x2348,
- 0xa87a, 0xa982, 0x929e, 0x4000, 0x1580, 0x6310, 0x00c6, 0x2358,
- 0x2009, 0x0000, 0xa868, 0xd0f4, 0x1140, 0x080c, 0x6582, 0x1108,
- 0xc185, 0xb800, 0xd0bc, 0x0108, 0xc18d, 0xaa96, 0xa99a, 0x20a9,
- 0x0004, 0xa860, 0x20e8, 0xa85c, 0x9080, 0x0031, 0x20a0, 0xb8b4,
- 0x20e0, 0xb8b8, 0x9080, 0x0006, 0x2098, 0x080c, 0x0fac, 0x20a9,
- 0x0004, 0xa85c, 0x9080, 0x0035, 0x20a0, 0xb8b8, 0x9080, 0x000a,
- 0x2098, 0x080c, 0x0fac, 0x00ce, 0x0090, 0xaa96, 0x3918, 0x9398,
- 0x0007, 0x231c, 0x6004, 0x9086, 0x0016, 0x0110, 0xa89b, 0x0004,
- 0xaba2, 0x6310, 0x2358, 0xb804, 0x9084, 0x00ff, 0xa89e, 0x080c,
- 0x69a9, 0x6017, 0x0000, 0x009e, 0x003e, 0x00de, 0x00be, 0x0005,
- 0x0026, 0x0036, 0x0046, 0x00b6, 0x0096, 0x00f6, 0x6214, 0x2248,
- 0x6210, 0x2258, 0x2079, 0x0260, 0x9096, 0x0000, 0x11a0, 0xb814,
- 0x9084, 0x00ff, 0x900e, 0x080c, 0x2459, 0x2118, 0x831f, 0x939c,
- 0xff00, 0x7838, 0x9084, 0x00ff, 0x931d, 0x7c3c, 0x2011, 0x8018,
- 0x080c, 0x48fa, 0x00a8, 0x9096, 0x0001, 0x1148, 0x89ff, 0x0180,
- 0xa89b, 0x000d, 0x7838, 0xa8a6, 0x783c, 0xa8aa, 0x0048, 0x9096,
- 0x0002, 0x1130, 0xa89b, 0x000d, 0x7838, 0xa8a6, 0x783c, 0xa8aa,
- 0x00fe, 0x009e, 0x00be, 0x004e, 0x003e, 0x002e, 0x0005, 0x00c6,
- 0x0026, 0x0016, 0x9186, 0x0035, 0x0110, 0x6a38, 0x0008, 0x6a2c,
- 0x080c, 0xb85e, 0x01f0, 0x2260, 0x6120, 0x9186, 0x0003, 0x0118,
- 0x9186, 0x0006, 0x1190, 0x6838, 0x9206, 0x0140, 0x683c, 0x9206,
- 0x1160, 0x6108, 0x6838, 0x9106, 0x1140, 0x0020, 0x6008, 0x693c,
- 0x9106, 0x1118, 0x6010, 0x6910, 0x9106, 0x001e, 0x002e, 0x00ce,
- 0x0005, 0x9085, 0x0001, 0x0cc8, 0xa974, 0xd1cc, 0x0188, 0x918c,
- 0x00ff, 0x918e, 0x0002, 0x1160, 0xa9a8, 0x918c, 0x0f00, 0x810f,
- 0x918e, 0x0001, 0x1128, 0xa834, 0xa938, 0x9115, 0x190c, 0xaed1,
- 0x0005, 0x0036, 0x2019, 0x0001, 0x0010, 0x0036, 0x901e, 0x0499,
- 0x01e0, 0x080c, 0xb870, 0x01c8, 0x080c, 0xba5f, 0x6037, 0x4000,
- 0x6014, 0x6017, 0x0000, 0x0096, 0x2048, 0xa87c, 0x080c, 0xba85,
- 0x1118, 0x080c, 0xa59c, 0x0040, 0xa867, 0x0103, 0xa877, 0x0000,
- 0x83ff, 0x1129, 0x080c, 0x69b5, 0x009e, 0x003e, 0x0005, 0xa880,
- 0xd0b4, 0x0128, 0xa87b, 0x0006, 0xc0ec, 0xa882, 0x0048, 0xd0bc,
- 0x0118, 0xa87b, 0x0002, 0x0020, 0xa87b, 0x0005, 0x080c, 0xbb79,
- 0xa877, 0x0000, 0x0005, 0x2001, 0x1810, 0x2004, 0xd0ec, 0x0005,
- 0x0006, 0x2001, 0x1810, 0x2004, 0xd0f4, 0x000e, 0x0005, 0x0006,
- 0x2001, 0x1810, 0x2004, 0xd0e4, 0x000e, 0x0005, 0x0036, 0x0046,
- 0x6010, 0x00b6, 0x2058, 0xbba0, 0x00be, 0x2021, 0x0007, 0x080c,
- 0x4a97, 0x004e, 0x003e, 0x0005, 0x0c51, 0x1d81, 0x0005, 0x2001,
- 0x195e, 0x2004, 0x601a, 0x0005, 0x2001, 0x1960, 0x2004, 0x604a,
- 0x0005, 0x080c, 0x9be6, 0x0804, 0x894f, 0x611c, 0xd1fc, 0xa97c,
- 0x1108, 0xd1e4, 0x0005, 0x601c, 0xd0fc, 0xa87c, 0x1108, 0xd0e4,
- 0x0005, 0x601c, 0xd0fc, 0xc0fc, 0x601e, 0xa87c, 0x1108, 0xd0e4,
- 0x0005, 0x6044, 0xd0fc, 0x1138, 0xd0bc, 0x0198, 0xc0bc, 0x6046,
- 0x6003, 0x0002, 0x0070, 0xd0ac, 0x1160, 0xd0dc, 0x1128, 0x908c,
- 0x000f, 0x9186, 0x0005, 0x1118, 0x6003, 0x0003, 0x0010, 0x6003,
- 0x0001, 0x0005, 0x00b6, 0x0066, 0x6000, 0x90b2, 0x0016, 0x1a0c,
- 0x0d65, 0x001b, 0x006e, 0x00be, 0x0005, 0xbffd, 0xc6dc, 0xc82b,
- 0xbffd, 0xbffd, 0xbffd, 0xbffd, 0xbffd, 0xc034, 0xc8af, 0xbffd,
- 0xbffd, 0xbffd, 0xbffd, 0xbffd, 0xbffd, 0x080c, 0x0d65, 0x0066,
- 0x6000, 0x90b2, 0x0016, 0x1a0c, 0x0d65, 0x0013, 0x006e, 0x0005,
- 0xc018, 0xcdd0, 0xc018, 0xc018, 0xc018, 0xc018, 0xc018, 0xc018,
- 0xcd7f, 0xce22, 0xc018, 0xd446, 0xd47a, 0xd446, 0xd47a, 0xc018,
- 0x080c, 0x0d65, 0x6000, 0x9082, 0x0016, 0x1a0c, 0x0d65, 0x6000,
- 0x000a, 0x0005, 0xc032, 0xca8c, 0xcb57, 0xcb7a, 0xcbf6, 0xc032,
- 0xccf1, 0xcc7e, 0xc8b9, 0xcd57, 0xcd6c, 0xc032, 0xc032, 0xc032,
- 0xc032, 0xc032, 0x080c, 0x0d65, 0x91b2, 0x0053, 0x1a0c, 0x0d65,
- 0x2100, 0x91b2, 0x0040, 0x1a04, 0xc47f, 0x0002, 0xc07e, 0xc270,
- 0xc07e, 0xc07e, 0xc07e, 0xc279, 0xc07e, 0xc07e, 0xc07e, 0xc07e,
- 0xc07e, 0xc07e, 0xc07e, 0xc07e, 0xc07e, 0xc07e, 0xc07e, 0xc07e,
- 0xc07e, 0xc07e, 0xc07e, 0xc07e, 0xc07e, 0xc080, 0xc0e7, 0xc0f6,
- 0xc15a, 0xc185, 0xc1fd, 0xc25b, 0xc07e, 0xc07e, 0xc27c, 0xc07e,
- 0xc07e, 0xc291, 0xc29e, 0xc07e, 0xc07e, 0xc07e, 0xc07e, 0xc07e,
- 0xc321, 0xc07e, 0xc07e, 0xc335, 0xc07e, 0xc07e, 0xc2f0, 0xc07e,
- 0xc07e, 0xc07e, 0xc34d, 0xc07e, 0xc07e, 0xc07e, 0xc3ca, 0xc07e,
- 0xc07e, 0xc07e, 0xc07e, 0xc07e, 0xc07e, 0xc447, 0x080c, 0x0d65,
- 0x080c, 0x6648, 0x1150, 0x2001, 0x1836, 0x2004, 0xd0cc, 0x1128,
- 0x9084, 0x0009, 0x9086, 0x0008, 0x1140, 0x6007, 0x0009, 0x602f,
- 0x0009, 0x6017, 0x0000, 0x0804, 0xc269, 0x080c, 0x6631, 0x00e6,
- 0x00c6, 0x0036, 0x0026, 0x0016, 0x6210, 0x2258, 0xbaa0, 0x0026,
- 0x2019, 0x0029, 0x080c, 0x98c7, 0x080c, 0x8658, 0x0076, 0x903e,
- 0x080c, 0x853d, 0x2c08, 0x080c, 0xd011, 0x007e, 0x001e, 0x080c,
- 0x98e3, 0x001e, 0x002e, 0x003e, 0x00ce, 0x00ee, 0x6610, 0x2658,
- 0x080c, 0x629e, 0xbe04, 0x9684, 0x00ff, 0x9082, 0x0006, 0x1268,
- 0x0016, 0x0026, 0x6210, 0x00b6, 0x2258, 0xbaa0, 0x00be, 0x2c08,
- 0x080c, 0xd5f2, 0x002e, 0x001e, 0x1178, 0x080c, 0xcf40, 0x1904,
- 0xc152, 0x080c, 0xcedc, 0x1120, 0x6007, 0x0008, 0x0804, 0xc269,
- 0x6007, 0x0009, 0x0804, 0xc269, 0x080c, 0xd147, 0x0128, 0x080c,
- 0xcf40, 0x0d78, 0x0804, 0xc152, 0x6017, 0x1900, 0x0c88, 0x080c,
- 0x3164, 0x1904, 0xc47c, 0x6106, 0x080c, 0xce8d, 0x6007, 0x0006,
- 0x0804, 0xc269, 0x6007, 0x0007, 0x0804, 0xc269, 0x080c, 0xd4b6,
- 0x1904, 0xc47c, 0x080c, 0x3164, 0x1904, 0xc47c, 0x00d6, 0x6610,
- 0x2658, 0xbe04, 0x9684, 0x00ff, 0x9082, 0x0006, 0x1220, 0x2001,
- 0x0001, 0x080c, 0x61cc, 0x96b4, 0xff00, 0x8637, 0x9686, 0x0006,
- 0x0188, 0x9686, 0x0004, 0x0170, 0xbe04, 0x96b4, 0x00ff, 0x9686,
- 0x0006, 0x0140, 0x9686, 0x0004, 0x0128, 0x9686, 0x0005, 0x0110,
- 0x00de, 0x0480, 0x00e6, 0x2071, 0x0260, 0x7034, 0x9084, 0x0003,
- 0x1140, 0x7034, 0x9082, 0x0014, 0x0220, 0x7030, 0x9084, 0x0003,
- 0x0130, 0x00ee, 0x6017, 0x0000, 0x602f, 0x0007, 0x00b0, 0x00ee,
- 0x080c, 0xcfa7, 0x1190, 0x9686, 0x0006, 0x1140, 0x0026, 0x6210,
- 0x2258, 0xbaa0, 0x900e, 0x080c, 0x307d, 0x002e, 0x080c, 0x632a,
- 0x6007, 0x000a, 0x00de, 0x0804, 0xc269, 0x6007, 0x000b, 0x00de,
- 0x0804, 0xc269, 0x080c, 0x302e, 0x080c, 0xbfa4, 0x6007, 0x0001,
- 0x0804, 0xc269, 0x080c, 0xd4b6, 0x1904, 0xc47c, 0x080c, 0x3164,
- 0x1904, 0xc47c, 0x2071, 0x0260, 0x7034, 0x90b4, 0x0003, 0x1948,
- 0x90b2, 0x0014, 0x0a30, 0x7030, 0x9084, 0x0003, 0x1910, 0x6610,
- 0x2658, 0xbe04, 0x9686, 0x0707, 0x09e8, 0x0026, 0x6210, 0x2258,
- 0xbaa0, 0x900e, 0x080c, 0x307d, 0x002e, 0x6007, 0x000c, 0x2001,
- 0x0001, 0x080c, 0xd5d2, 0x0804, 0xc269, 0x080c, 0x6648, 0x1140,
- 0x2001, 0x1836, 0x2004, 0x9084, 0x0009, 0x9086, 0x0008, 0x1110,
- 0x0804, 0xc08d, 0x080c, 0x6631, 0x6610, 0x2658, 0xbe04, 0x9684,
- 0x00ff, 0x9082, 0x0006, 0x06c0, 0x1138, 0x0026, 0x2001, 0x0006,
- 0x080c, 0x620c, 0x002e, 0x0050, 0x96b4, 0xff00, 0x8637, 0x9686,
- 0x0004, 0x0120, 0x9686, 0x0006, 0x1904, 0xc152, 0x080c, 0xcfb4,
- 0x1120, 0x6007, 0x000e, 0x0804, 0xc269, 0x0046, 0x6410, 0x2458,
- 0xbca0, 0x0046, 0x080c, 0x302e, 0x080c, 0xbfa4, 0x004e, 0x0016,
- 0x9006, 0x2009, 0x185c, 0x210c, 0x0048, 0x2009, 0x0029, 0x080c,
- 0xd2bc, 0x6010, 0x2058, 0xb800, 0xc0e5, 0xb802, 0x001e, 0x004e,
- 0x6007, 0x0001, 0x0804, 0xc269, 0x2001, 0x0001, 0x080c, 0x61cc,
- 0x0156, 0x0016, 0x0026, 0x0036, 0x20a9, 0x0004, 0x2019, 0x1805,
- 0x2011, 0x0270, 0x080c, 0xabda, 0x003e, 0x002e, 0x001e, 0x015e,
- 0x9005, 0x0168, 0x96b4, 0xff00, 0x8637, 0x9682, 0x0004, 0x0a04,
- 0xc152, 0x9682, 0x0007, 0x0a04, 0xc1ae, 0x0804, 0xc152, 0x6017,
- 0x1900, 0x6007, 0x0009, 0x0804, 0xc269, 0x080c, 0x6648, 0x1140,
- 0x2001, 0x1836, 0x2004, 0x9084, 0x0009, 0x9086, 0x0008, 0x1110,
- 0x0804, 0xc08d, 0x080c, 0x6631, 0x6610, 0x2658, 0xbe04, 0x9684,
- 0x00ff, 0x0006, 0x9086, 0x0001, 0x000e, 0x0170, 0x9082, 0x0006,
- 0x0690, 0x0150, 0x96b4, 0xff00, 0x8637, 0x9686, 0x0004, 0x0120,
- 0x9686, 0x0006, 0x1904, 0xc152, 0x080c, 0xcfe2, 0x1130, 0x080c,
- 0xcedc, 0x1118, 0x6007, 0x0010, 0x04e0, 0x0046, 0x6410, 0x2458,
- 0xbca0, 0x0046, 0x080c, 0x302e, 0x080c, 0xbfa4, 0x004e, 0x0016,
- 0x9006, 0x2009, 0x185c, 0x210c, 0x0048, 0x2009, 0x0029, 0x080c,
- 0xd2bc, 0x6010, 0x2058, 0xb800, 0xc0e5, 0xb802, 0x001e, 0x004e,
- 0x6007, 0x0001, 0x00f0, 0x080c, 0xd147, 0x0140, 0x96b4, 0xff00,
- 0x8637, 0x9686, 0x0006, 0x0980, 0x0804, 0xc152, 0x6017, 0x1900,
- 0x6007, 0x0009, 0x0070, 0x080c, 0x3164, 0x1904, 0xc47c, 0x080c,
- 0xd4b6, 0x1904, 0xc47c, 0x080c, 0xc61c, 0x1904, 0xc152, 0x6007,
- 0x0012, 0x6003, 0x0001, 0x080c, 0x84ee, 0x080c, 0x894f, 0x0005,
- 0x6007, 0x0001, 0x6003, 0x0001, 0x080c, 0x84ee, 0x080c, 0x894f,
- 0x0cb0, 0x6007, 0x0005, 0x0c68, 0x080c, 0xd4b6, 0x1904, 0xc47c,
- 0x080c, 0x3164, 0x1904, 0xc47c, 0x080c, 0xc61c, 0x1904, 0xc152,
- 0x6007, 0x0020, 0x6003, 0x0001, 0x080c, 0x84ee, 0x080c, 0x894f,
- 0x0005, 0x080c, 0x3164, 0x1904, 0xc47c, 0x6007, 0x0023, 0x6003,
- 0x0001, 0x080c, 0x84ee, 0x080c, 0x894f, 0x0005, 0x080c, 0xd4b6,
- 0x1904, 0xc47c, 0x080c, 0x3164, 0x1904, 0xc47c, 0x080c, 0xc61c,
- 0x1904, 0xc152, 0x0016, 0x0026, 0x00e6, 0x2071, 0x0260, 0x7244,
- 0x9286, 0xffff, 0x0180, 0x2c08, 0x080c, 0xb85e, 0x01b0, 0x2260,
- 0x7240, 0x6008, 0x9206, 0x1188, 0x6010, 0x9190, 0x0004, 0x2214,
- 0x9206, 0x01b8, 0x0050, 0x7240, 0x2c08, 0x9006, 0x080c, 0xd28e,
- 0x1180, 0x7244, 0x9286, 0xffff, 0x01b0, 0x2160, 0x6007, 0x0026,
- 0x6017, 0x1700, 0x7214, 0x9296, 0xffff, 0x1180, 0x6007, 0x0025,
- 0x0068, 0x6020, 0x9086, 0x0007, 0x1d80, 0x6004, 0x9086, 0x0024,
- 0x1110, 0x080c, 0x9be6, 0x2160, 0x6007, 0x0025, 0x6003, 0x0001,
- 0x080c, 0x84ee, 0x080c, 0x894f, 0x00ee, 0x002e, 0x001e, 0x0005,
- 0x2001, 0x0001, 0x080c, 0x61cc, 0x0156, 0x0016, 0x0026, 0x0036,
- 0x20a9, 0x0004, 0x2019, 0x1805, 0x2011, 0x0276, 0x080c, 0xabda,
- 0x003e, 0x002e, 0x001e, 0x015e, 0x0120, 0x6007, 0x0031, 0x0804,
- 0xc269, 0x080c, 0xa83f, 0x080c, 0x70ba, 0x1190, 0x0006, 0x0026,
- 0x0036, 0x080c, 0x70d4, 0x1138, 0x080c, 0x73b9, 0x080c, 0x5cf7,
- 0x080c, 0x6feb, 0x0010, 0x080c, 0x708e, 0x003e, 0x002e, 0x000e,
- 0x0005, 0x080c, 0x3164, 0x1904, 0xc47c, 0x080c, 0xc61c, 0x1904,
- 0xc152, 0x6106, 0x080c, 0xc638, 0x1120, 0x6007, 0x002b, 0x0804,
- 0xc269, 0x6007, 0x002c, 0x0804, 0xc269, 0x080c, 0xd4b6, 0x1904,
- 0xc47c, 0x080c, 0x3164, 0x1904, 0xc47c, 0x080c, 0xc61c, 0x1904,
- 0xc152, 0x6106, 0x080c, 0xc63d, 0x1120, 0x6007, 0x002e, 0x0804,
- 0xc269, 0x6007, 0x002f, 0x0804, 0xc269, 0x080c, 0x3164, 0x1904,
- 0xc47c, 0x00e6, 0x00d6, 0x00c6, 0x6010, 0x2058, 0xb904, 0x9184,
- 0x00ff, 0x9086, 0x0006, 0x0158, 0x9184, 0xff00, 0x8007, 0x9086,
- 0x0006, 0x0128, 0x00ce, 0x00de, 0x00ee, 0x0804, 0xc270, 0x080c,
- 0x53ac, 0xd0e4, 0x0904, 0xc3c7, 0x2071, 0x026c, 0x7010, 0x603a,
- 0x7014, 0x603e, 0x7108, 0x720c, 0x080c, 0x6686, 0x0140, 0x6010,
- 0x2058, 0xb810, 0x9106, 0x1118, 0xb814, 0x9206, 0x0510, 0x080c,
- 0x6682, 0x15b8, 0x2069, 0x1800, 0x687c, 0x9206, 0x1590, 0x6878,
- 0x9106, 0x1578, 0x7210, 0x080c, 0xb85e, 0x0590, 0x080c, 0xc507,
- 0x0578, 0x080c, 0xd338, 0x0560, 0x622e, 0x6007, 0x0036, 0x6003,
- 0x0001, 0x2009, 0x8020, 0x080c, 0x84e7, 0x00ce, 0x00de, 0x00ee,
- 0x0005, 0x7214, 0x9286, 0xffff, 0x0150, 0x080c, 0xb85e, 0x01c0,
- 0x9280, 0x0002, 0x2004, 0x7110, 0x9106, 0x1190, 0x08e0, 0x7210,
- 0x2c08, 0x9085, 0x0001, 0x080c, 0xd28e, 0x2c10, 0x2160, 0x0140,
- 0x0890, 0x6007, 0x0037, 0x602f, 0x0009, 0x6017, 0x1500, 0x08b8,
- 0x6007, 0x0037, 0x602f, 0x0003, 0x6017, 0x1700, 0x0880, 0x6007,
- 0x0012, 0x0868, 0x080c, 0x3164, 0x1904, 0xc47c, 0x6010, 0x2058,
- 0xb804, 0x9084, 0xff00, 0x8007, 0x9086, 0x0006, 0x1904, 0xc270,
- 0x00e6, 0x00d6, 0x00c6, 0x080c, 0x53ac, 0xd0e4, 0x0904, 0xc43f,
- 0x2069, 0x1800, 0x2071, 0x026c, 0x7008, 0x603a, 0x720c, 0x623e,
- 0x9286, 0xffff, 0x1150, 0x7208, 0x00c6, 0x2c08, 0x9085, 0x0001,
- 0x080c, 0xd28e, 0x2c10, 0x00ce, 0x05e8, 0x080c, 0xb85e, 0x05d0,
- 0x7108, 0x9280, 0x0002, 0x2004, 0x9106, 0x15a0, 0x00c6, 0x0026,
- 0x2260, 0x080c, 0xb451, 0x002e, 0x00ce, 0x7118, 0x918c, 0xff00,
- 0x810f, 0x9186, 0x0001, 0x0178, 0x9186, 0x0005, 0x0118, 0x9186,
- 0x0007, 0x1198, 0x9280, 0x0005, 0x2004, 0x9005, 0x0170, 0x080c,
- 0xc507, 0x0904, 0xc3c0, 0x0056, 0x7510, 0x7614, 0x080c, 0xd351,
- 0x005e, 0x00ce, 0x00de, 0x00ee, 0x0005, 0x6007, 0x003b, 0x602f,
- 0x0009, 0x6017, 0x2a00, 0x6003, 0x0001, 0x2009, 0x8020, 0x080c,
- 0x84e7, 0x0c78, 0x6007, 0x003b, 0x602f, 0x0003, 0x6017, 0x0300,
- 0x6003, 0x0001, 0x2009, 0x8020, 0x080c, 0x84e7, 0x0c10, 0x6007,
- 0x003b, 0x602f, 0x000b, 0x6017, 0x0000, 0x0804, 0xc397, 0x00e6,
- 0x0026, 0x080c, 0x6648, 0x0550, 0x080c, 0x6631, 0x080c, 0xd528,
- 0x1518, 0x2071, 0x1800, 0x70d8, 0x9085, 0x0003, 0x70da, 0x00f6,
- 0x2079, 0x0100, 0x72ac, 0x9284, 0x00ff, 0x707a, 0x78e6, 0x9284,
- 0xff00, 0x727c, 0x9205, 0x707e, 0x78ea, 0x00fe, 0x70e3, 0x0000,
- 0x080c, 0x6686, 0x0120, 0x2011, 0x19e1, 0x2013, 0x07d0, 0xd0ac,
- 0x1128, 0x080c, 0x2e09, 0x0010, 0x080c, 0xd55a, 0x002e, 0x00ee,
- 0x080c, 0x9be6, 0x0804, 0xc26f, 0x080c, 0x9be6, 0x0005, 0x2600,
- 0x0002, 0xc493, 0xc493, 0xc493, 0xc493, 0xc493, 0xc495, 0xc493,
- 0xc493, 0xc493, 0xc493, 0xc4b2, 0xc493, 0xc493, 0xc493, 0xc4c4,
- 0xc4d1, 0xc502, 0xc493, 0x080c, 0x0d65, 0x080c, 0xd4b6, 0x1d20,
- 0x080c, 0x3164, 0x1d08, 0x080c, 0xc61c, 0x1148, 0x7038, 0x6016,
- 0x6007, 0x0045, 0x6003, 0x0001, 0x080c, 0x84ee, 0x0005, 0x080c,
- 0x302e, 0x080c, 0xbfa4, 0x6007, 0x0001, 0x6003, 0x0001, 0x080c,
- 0x84ee, 0x0005, 0x080c, 0xd4b6, 0x1938, 0x080c, 0x3164, 0x1920,
- 0x080c, 0xc61c, 0x1d60, 0x703c, 0x6016, 0x6007, 0x004a, 0x6003,
- 0x0001, 0x080c, 0x84ee, 0x0005, 0x080c, 0xc524, 0x0904, 0xc47c,
- 0x6007, 0x004e, 0x6003, 0x0001, 0x080c, 0x84ee, 0x080c, 0x894f,
- 0x0005, 0x6007, 0x004f, 0x6017, 0x0000, 0x7134, 0x918c, 0x00ff,
- 0x81ff, 0x0508, 0x9186, 0x0001, 0x1160, 0x7140, 0x2001, 0x1995,
- 0x2004, 0x9106, 0x11b0, 0x7144, 0x2001, 0x1996, 0x2004, 0x9106,
- 0x0190, 0x9186, 0x0002, 0x1168, 0x2011, 0x0276, 0x20a9, 0x0004,
- 0x6010, 0x0096, 0x2048, 0x2019, 0x000a, 0x080c, 0xabee, 0x009e,
- 0x0110, 0x6017, 0x0001, 0x6003, 0x0001, 0x080c, 0x84ee, 0x080c,
- 0x894f, 0x0005, 0x6007, 0x0050, 0x703c, 0x6016, 0x0ca0, 0x0016,
- 0x00e6, 0x2071, 0x0260, 0x00b6, 0x00c6, 0x2260, 0x6010, 0x2058,
- 0xb8c4, 0xd084, 0x0150, 0x7128, 0x6050, 0x9106, 0x1120, 0x712c,
- 0x604c, 0x9106, 0x0110, 0x9006, 0x0010, 0x9085, 0x0001, 0x00ce,
- 0x00be, 0x00ee, 0x001e, 0x0005, 0x0016, 0x0096, 0x0086, 0x00e6,
- 0x01c6, 0x01d6, 0x0126, 0x2091, 0x8000, 0x2071, 0x1800, 0x708c,
- 0x908a, 0x00f9, 0x16e8, 0x20e1, 0x0000, 0x2001, 0x1978, 0x2003,
- 0x0000, 0x080c, 0x1048, 0x05a0, 0x2900, 0x6016, 0x708c, 0x8004,
- 0xa816, 0x908a, 0x001e, 0x02d0, 0xa833, 0x001e, 0x20a9, 0x001e,
- 0xa860, 0x20e8, 0xa85c, 0x9080, 0x001b, 0x20a0, 0x2001, 0x1978,
- 0x0016, 0x200c, 0x0471, 0x001e, 0x2940, 0x080c, 0x1048, 0x01c0,
- 0x2900, 0xa006, 0x2100, 0x81ff, 0x0180, 0x0c18, 0xa832, 0x20a8,
- 0xa860, 0x20e8, 0xa85c, 0x9080, 0x001b, 0x20a0, 0x2001, 0x1978,
- 0x0016, 0x200c, 0x00b1, 0x001e, 0x0000, 0x9085, 0x0001, 0x0048,
- 0x2071, 0x1800, 0x708f, 0x0000, 0x6014, 0x2048, 0x080c, 0x0fe1,
- 0x9006, 0x012e, 0x01de, 0x01ce, 0x00ee, 0x008e, 0x009e, 0x001e,
- 0x0005, 0x0006, 0x0016, 0x0026, 0x0036, 0x00c6, 0x918c, 0xffff,
- 0x11a8, 0x080c, 0x2054, 0x2099, 0x026c, 0x2001, 0x0014, 0x3518,
- 0x9312, 0x1218, 0x23a8, 0x4003, 0x00f8, 0x20a8, 0x4003, 0x22a8,
- 0x8108, 0x080c, 0x2054, 0x2099, 0x0260, 0x0ca8, 0x080c, 0x2054,
- 0x2061, 0x1978, 0x6004, 0x2098, 0x6008, 0x3518, 0x9312, 0x1218,
- 0x23a8, 0x4003, 0x0048, 0x20a8, 0x4003, 0x22a8, 0x8108, 0x080c,
- 0x2054, 0x2099, 0x0260, 0x0ca8, 0x2061, 0x1978, 0x2019, 0x0280,
- 0x3300, 0x931e, 0x0110, 0x6006, 0x0020, 0x2001, 0x0260, 0x6006,
- 0x8108, 0x2162, 0x9292, 0x0021, 0x9296, 0xffff, 0x620a, 0x00ce,
- 0x003e, 0x002e, 0x001e, 0x000e, 0x0005, 0x0006, 0x0016, 0x0026,
- 0x0036, 0x00c6, 0x81ff, 0x11b8, 0x080c, 0x206c, 0x20a1, 0x024c,
- 0x2001, 0x0014, 0x3518, 0x9312, 0x1218, 0x23a8, 0x4003, 0x0418,
- 0x20a8, 0x4003, 0x82ff, 0x01f8, 0x22a8, 0x8108, 0x080c, 0x206c,
- 0x20a1, 0x0240, 0x0c98, 0x080c, 0x206c, 0x2061, 0x197b, 0x6004,
- 0x20a0, 0x6008, 0x3518, 0x9312, 0x1218, 0x23a8, 0x4003, 0x0058,
- 0x20a8, 0x4003, 0x82ff, 0x0138, 0x22a8, 0x8108, 0x080c, 0x206c,
- 0x20a1, 0x0240, 0x0c98, 0x2061, 0x197b, 0x2019, 0x0260, 0x3400,
- 0x931e, 0x0110, 0x6006, 0x0020, 0x2001, 0x0240, 0x6006, 0x8108,
- 0x2162, 0x9292, 0x0021, 0x9296, 0xffff, 0x620a, 0x00ce, 0x003e,
- 0x002e, 0x001e, 0x000e, 0x0005, 0x00b6, 0x0066, 0x6610, 0x2658,
- 0xbe04, 0x96b4, 0xff00, 0x8637, 0x9686, 0x0006, 0x0170, 0x9686,
- 0x0004, 0x0158, 0xbe04, 0x96b4, 0x00ff, 0x9686, 0x0006, 0x0128,
- 0x9686, 0x0004, 0x0110, 0x9085, 0x0001, 0x006e, 0x00be, 0x0005,
- 0x00d6, 0x080c, 0xc6b2, 0x00de, 0x0005, 0x00d6, 0x080c, 0xc6bf,
- 0x1520, 0x680c, 0x908c, 0xff00, 0x6820, 0x9084, 0x00ff, 0x9115,
- 0x6216, 0x6824, 0x602e, 0xd1e4, 0x0130, 0x9006, 0x080c, 0xd5d2,
- 0x2009, 0x0001, 0x0078, 0xd1ec, 0x0180, 0x6920, 0x918c, 0x00ff,
- 0x6824, 0x080c, 0x2459, 0x1148, 0x2001, 0x0001, 0x080c, 0xd5d2,
- 0x2110, 0x900e, 0x080c, 0x307d, 0x0018, 0x9085, 0x0001, 0x0008,
- 0x9006, 0x00de, 0x0005, 0x00b6, 0x00c6, 0x080c, 0x9c55, 0x0598,
- 0x0016, 0x0026, 0x00c6, 0x2011, 0x0263, 0x2204, 0x8211, 0x220c,
- 0x080c, 0x2459, 0x1568, 0x080c, 0x622f, 0x1550, 0xbe12, 0xbd16,
- 0x00ce, 0x002e, 0x001e, 0x2b00, 0x6012, 0x080c, 0xd4b6, 0x11c8,
- 0x080c, 0x3164, 0x11b0, 0x080c, 0xc61c, 0x0500, 0x2001, 0x0007,
- 0x080c, 0x61e0, 0x2001, 0x0007, 0x080c, 0x620c, 0x6017, 0x0000,
- 0x6023, 0x0001, 0x6007, 0x0001, 0x6003, 0x0001, 0x080c, 0x84ee,
- 0x0010, 0x080c, 0x9be6, 0x9085, 0x0001, 0x00ce, 0x00be, 0x0005,
- 0x080c, 0x9be6, 0x00ce, 0x002e, 0x001e, 0x0ca8, 0x080c, 0x9be6,
- 0x9006, 0x0c98, 0x2069, 0x026d, 0x6800, 0x9082, 0x0010, 0x1228,
- 0x6017, 0x0000, 0x9085, 0x0001, 0x0008, 0x9006, 0x0005, 0x6017,
- 0x0000, 0x2069, 0x026c, 0x6808, 0x9084, 0xff00, 0x9086, 0x0800,
- 0x1190, 0x6904, 0x9186, 0x0018, 0x0118, 0x9186, 0x0014, 0x1158,
- 0x810f, 0x6800, 0x9084, 0x00ff, 0x910d, 0x6162, 0x908e, 0x0014,
- 0x0110, 0x908e, 0x0010, 0x0005, 0x6004, 0x90b2, 0x0053, 0x1a0c,
- 0x0d65, 0x91b6, 0x0013, 0x1130, 0x2008, 0x91b2, 0x0040, 0x1a04,
- 0xc7ff, 0x0092, 0x91b6, 0x0027, 0x0120, 0x91b6, 0x0014, 0x190c,
- 0x0d65, 0x2001, 0x0007, 0x080c, 0x620c, 0x080c, 0x8891, 0x080c,
- 0x9c20, 0x080c, 0x894f, 0x0005, 0xc73c, 0xc73e, 0xc73c, 0xc73c,
- 0xc73c, 0xc73e, 0xc74b, 0xc7fc, 0xc79b, 0xc7fc, 0xc7ad, 0xc7fc,
- 0xc74b, 0xc7fc, 0xc7f4, 0xc7fc, 0xc7f4, 0xc7fc, 0xc7fc, 0xc73c,
- 0xc73c, 0xc73c, 0xc73c, 0xc73c, 0xc73c, 0xc73c, 0xc73c, 0xc73c,
- 0xc73c, 0xc73c, 0xc73e, 0xc73c, 0xc7fc, 0xc73c, 0xc73c, 0xc7fc,
- 0xc73c, 0xc7f9, 0xc7fc, 0xc73c, 0xc73c, 0xc73c, 0xc73c, 0xc7fc,
- 0xc7fc, 0xc73c, 0xc7fc, 0xc7fc, 0xc73c, 0xc746, 0xc73c, 0xc73c,
- 0xc73c, 0xc73c, 0xc7f8, 0xc7fc, 0xc73c, 0xc73c, 0xc7fc, 0xc7fc,
- 0xc73c, 0xc73c, 0xc73c, 0xc73c, 0x080c, 0x0d65, 0x080c, 0xbfa7,
- 0x6003, 0x0002, 0x080c, 0x894f, 0x0804, 0xc7fe, 0x9006, 0x080c,
- 0x61cc, 0x0804, 0xc7fc, 0x080c, 0x6682, 0x1904, 0xc7fc, 0x9006,
- 0x080c, 0x61cc, 0x6010, 0x2058, 0xb810, 0x9086, 0x00ff, 0x1140,
- 0x00f6, 0x2079, 0x1800, 0x78a4, 0x8000, 0x78a6, 0x00fe, 0x0428,
- 0x6010, 0x2058, 0xb884, 0x9005, 0x1178, 0x080c, 0xbf8f, 0x1904,
- 0xc7fc, 0x0036, 0x0046, 0xbba0, 0x2021, 0x0007, 0x080c, 0x4a97,
- 0x004e, 0x003e, 0x0804, 0xc7fc, 0x080c, 0x3195, 0x1904, 0xc7fc,
- 0x2001, 0x1800, 0x2004, 0x9086, 0x0002, 0x1138, 0x00f6, 0x2079,
- 0x1800, 0x78a4, 0x8000, 0x78a6, 0x00fe, 0x2001, 0x0002, 0x080c,
- 0x61e0, 0x6023, 0x0001, 0x6003, 0x0001, 0x6007, 0x0002, 0x080c,
- 0x84ee, 0x080c, 0x894f, 0x6110, 0x2158, 0x2009, 0x0001, 0x080c,
- 0x817a, 0x0804, 0xc7fe, 0x6610, 0x2658, 0xbe04, 0x96b4, 0xff00,
- 0x8637, 0x9686, 0x0006, 0x0904, 0xc7fc, 0x9686, 0x0004, 0x0904,
- 0xc7fc, 0x2001, 0x0004, 0x0804, 0xc7fa, 0x2001, 0x1800, 0x2004,
- 0x9086, 0x0003, 0x1158, 0x0036, 0x0046, 0x6010, 0x2058, 0xbba0,
- 0x2021, 0x0006, 0x080c, 0x4a97, 0x004e, 0x003e, 0x2001, 0x0006,
- 0x080c, 0xc818, 0x6610, 0x2658, 0xbe04, 0x0066, 0x96b4, 0xff00,
- 0x8637, 0x9686, 0x0006, 0x006e, 0x0168, 0x2001, 0x0006, 0x080c,
- 0x620c, 0x9284, 0x00ff, 0x908e, 0x0007, 0x1120, 0x2001, 0x0006,
- 0x080c, 0x61e0, 0x080c, 0x6682, 0x11f8, 0x2001, 0x1836, 0x2004,
- 0xd0a4, 0x01d0, 0xbe04, 0x96b4, 0x00ff, 0x9686, 0x0006, 0x01a0,
- 0x00f6, 0x2079, 0x1800, 0x78a4, 0x8000, 0x78a6, 0x00fe, 0x0804,
- 0xc785, 0x2001, 0x0004, 0x0030, 0x2001, 0x0006, 0x0409, 0x0020,
- 0x0018, 0x0010, 0x080c, 0x620c, 0x080c, 0x9be6, 0x0005, 0x2600,
- 0x0002, 0xc813, 0xc813, 0xc813, 0xc813, 0xc813, 0xc815, 0xc813,
- 0xc813, 0xc813, 0xc813, 0xc815, 0xc813, 0xc813, 0xc813, 0xc815,
- 0xc815, 0xc815, 0xc815, 0x080c, 0x0d65, 0x080c, 0x9be6, 0x0005,
- 0x0016, 0x00b6, 0x00d6, 0x6110, 0x2158, 0xb900, 0xd184, 0x0138,
- 0x080c, 0x61e0, 0x9006, 0x080c, 0x61cc, 0x080c, 0x305d, 0x00de,
- 0x00be, 0x001e, 0x0005, 0x6610, 0x2658, 0xb804, 0x9084, 0xff00,
- 0x8007, 0x90b2, 0x000c, 0x1a0c, 0x0d65, 0x91b6, 0x0015, 0x1110,
- 0x003b, 0x0028, 0x91b6, 0x0016, 0x190c, 0x0d65, 0x006b, 0x0005,
- 0xa67d, 0xa67d, 0xa67d, 0xa67d, 0xc8ad, 0xa67d, 0xc897, 0xc858,
- 0xa67d, 0xa67d, 0xa67d, 0xa67d, 0xa67d, 0xa67d, 0xa67d, 0xa67d,
- 0xc8ad, 0xa67d, 0xc897, 0xc89e, 0xa67d, 0xa67d, 0xa67d, 0xa67d,
- 0x00f6, 0x080c, 0x6682, 0x11d8, 0x080c, 0xbf8f, 0x11c0, 0x6010,
- 0x905d, 0x01a8, 0xb884, 0x9005, 0x0190, 0x9006, 0x080c, 0x61cc,
- 0x2001, 0x0002, 0x080c, 0x61e0, 0x6023, 0x0001, 0x6003, 0x0001,
- 0x6007, 0x0002, 0x080c, 0x84ee, 0x080c, 0x894f, 0x00f0, 0x2011,
- 0x0263, 0x2204, 0x8211, 0x220c, 0x080c, 0x2459, 0x11b0, 0x080c,
- 0x628f, 0x0118, 0x080c, 0x9be6, 0x0080, 0xb810, 0x0006, 0xb814,
- 0x0006, 0xb884, 0x0006, 0x080c, 0x5d11, 0x000e, 0xb886, 0x000e,
- 0xb816, 0x000e, 0xb812, 0x080c, 0x9be6, 0x00fe, 0x0005, 0x6604,
- 0x96b6, 0x001e, 0x1110, 0x080c, 0x9be6, 0x0005, 0x080c, 0xaa63,
- 0x1148, 0x6003, 0x0001, 0x6007, 0x0001, 0x080c, 0x84ee, 0x080c,
- 0x894f, 0x0010, 0x080c, 0x9be6, 0x0005, 0x0804, 0x9be6, 0x6004,
- 0x908a, 0x0053, 0x1a0c, 0x0d65, 0x080c, 0x8891, 0x080c, 0x9c20,
- 0x0005, 0x9182, 0x0040, 0x0002, 0xc8d0, 0xc8d0, 0xc8d0, 0xc8d0,
- 0xc8d2, 0xc8d0, 0xc8d0, 0xc8d0, 0xc8d0, 0xc8d0, 0xc8d0, 0xc8d0,
- 0xc8d0, 0xc8d0, 0xc8d0, 0xc8d0, 0xc8d0, 0xc8d0, 0xc8d0, 0xc8d0,
- 0x080c, 0x0d65, 0x0096, 0x00b6, 0x00d6, 0x00e6, 0x00f6, 0x0046,
- 0x0026, 0x6210, 0x2258, 0xb8ac, 0x9005, 0x11b0, 0x6007, 0x0044,
- 0x2071, 0x0260, 0x7444, 0x94a4, 0xff00, 0x0904, 0xc939, 0x080c,
- 0xd5c6, 0x1170, 0x9486, 0x2000, 0x1158, 0x2009, 0x0001, 0x2011,
- 0x0200, 0x080c, 0x8401, 0x0020, 0x9026, 0x080c, 0xd4fb, 0x0c30,
- 0x080c, 0x102f, 0x090c, 0x0d65, 0x6003, 0x0007, 0xa867, 0x010d,
- 0x9006, 0xa802, 0xa86a, 0xac8a, 0x2c00, 0xa88e, 0x6008, 0xa8e2,
- 0x6010, 0x2058, 0xb8a0, 0x7130, 0xa97a, 0x0016, 0xa876, 0xa87f,
- 0x0000, 0xa883, 0x0000, 0xa887, 0x0036, 0x080c, 0x69b5, 0x001e,
- 0x080c, 0xd5c6, 0x1904, 0xc999, 0x9486, 0x2000, 0x1130, 0x2019,
- 0x0017, 0x080c, 0xd234, 0x0804, 0xc999, 0x9486, 0x0200, 0x1120,
- 0x080c, 0xd1c4, 0x0804, 0xc999, 0x9486, 0x0400, 0x0120, 0x9486,
- 0x1000, 0x1904, 0xc999, 0x2019, 0x0002, 0x080c, 0xd1e3, 0x0804,
- 0xc999, 0x2069, 0x1a46, 0x6a00, 0xd284, 0x0904, 0xca03, 0x9284,
- 0x0300, 0x1904, 0xc9fc, 0x6804, 0x9005, 0x0904, 0xc9e4, 0x2d78,
- 0x6003, 0x0007, 0x080c, 0x1048, 0x0904, 0xc9a5, 0x7800, 0xd08c,
- 0x1118, 0x7804, 0x8001, 0x7806, 0x6017, 0x0000, 0x2001, 0x180f,
- 0x2004, 0xd084, 0x1904, 0xca07, 0x9006, 0xa802, 0xa867, 0x0116,
- 0xa86a, 0x6008, 0xa8e2, 0x2c00, 0xa87a, 0x6010, 0x2058, 0xb8a0,
- 0x7130, 0xa9b6, 0xa876, 0xb928, 0xa9ba, 0xb92c, 0xa9be, 0xb930,
- 0xa9c2, 0xb934, 0xa9c6, 0xa883, 0x003d, 0x7044, 0x9084, 0x0003,
- 0x9080, 0xc9a1, 0x2005, 0xa87e, 0x20a9, 0x000a, 0x2001, 0x0270,
- 0xaa5c, 0x9290, 0x0021, 0x2009, 0x0205, 0x200b, 0x0080, 0x20e1,
- 0x0000, 0xab60, 0x23e8, 0x2098, 0x22a0, 0x4003, 0x200b, 0x0000,
- 0x2001, 0x027a, 0x200c, 0xa9b2, 0x8000, 0x200c, 0xa9ae, 0x080c,
- 0x69b8, 0x002e, 0x004e, 0x00fe, 0x00ee, 0x00de, 0x00be, 0x009e,
- 0x0005, 0x0000, 0x0080, 0x0040, 0x0000, 0x2001, 0x1810, 0x2004,
- 0xd084, 0x0120, 0x080c, 0x102f, 0x1904, 0xc94e, 0x6017, 0xf100,
- 0x6003, 0x0001, 0x6007, 0x0041, 0x2009, 0xa022, 0x080c, 0x84e7,
- 0x0c00, 0x2069, 0x0260, 0x6848, 0x9084, 0xff00, 0x9086, 0x1200,
- 0x1198, 0x686c, 0x9084, 0x00ff, 0x0016, 0x6114, 0x918c, 0xf700,
- 0x910d, 0x6116, 0x001e, 0x6003, 0x0001, 0x6007, 0x0043, 0x2009,
- 0xa025, 0x080c, 0x84e7, 0x0828, 0x6868, 0x602e, 0x686c, 0x6032,
- 0x6017, 0xf200, 0x6003, 0x0001, 0x6007, 0x0041, 0x2009, 0xa022,
- 0x080c, 0x84e7, 0x0804, 0xc999, 0x2001, 0x180e, 0x2004, 0xd0ec,
- 0x0120, 0x2011, 0x8049, 0x080c, 0x48fa, 0x6017, 0xf300, 0x0010,
- 0x6017, 0xf100, 0x6003, 0x0001, 0x6007, 0x0041, 0x2009, 0xa022,
- 0x080c, 0x84e7, 0x0804, 0xc999, 0x6017, 0xf500, 0x0c98, 0x6017,
- 0xf600, 0x0804, 0xc9b9, 0x6017, 0xf200, 0x0804, 0xc9b9, 0xa867,
- 0x0146, 0xa86b, 0x0000, 0x6008, 0xa886, 0x2c00, 0xa87a, 0x7044,
- 0x9084, 0x0003, 0x9080, 0xc9a1, 0x2005, 0xa87e, 0x2928, 0x6010,
- 0x2058, 0xb8a0, 0xa876, 0xb828, 0xa88a, 0xb82c, 0xa88e, 0xb830,
- 0xa892, 0xb834, 0xa896, 0xa883, 0x003d, 0x2009, 0x0205, 0x2104,
- 0x9085, 0x0080, 0x200a, 0x20e1, 0x0000, 0x2011, 0x0210, 0x2214,
- 0x9294, 0x0fff, 0xaaa2, 0x9282, 0x0111, 0x1a0c, 0x0d65, 0x8210,
- 0x821c, 0x2001, 0x026c, 0x2098, 0xa860, 0x20e8, 0xa85c, 0x9080,
- 0x0029, 0x20a0, 0x2011, 0xca83, 0x2041, 0x0001, 0x223d, 0x9784,
- 0x00ff, 0x9322, 0x1208, 0x2300, 0x20a8, 0x4003, 0x931a, 0x0530,
- 0x8210, 0xd7fc, 0x1130, 0x8d68, 0x2d0a, 0x2001, 0x0260, 0x2098,
- 0x0c68, 0x2950, 0x080c, 0x1048, 0x0170, 0x2900, 0xb002, 0xa867,
- 0x0147, 0xa86b, 0x0000, 0xa860, 0x20e8, 0xa85c, 0x9080, 0x001b,
- 0x20a0, 0x8840, 0x08d8, 0x2548, 0xa800, 0x902d, 0x0118, 0x080c,
- 0x1061, 0x0cc8, 0x080c, 0x1061, 0x0804, 0xc9a5, 0x2548, 0x8847,
- 0x9885, 0x0046, 0xa866, 0x2009, 0x0205, 0x200b, 0x0000, 0x080c,
- 0xd267, 0x0804, 0xc999, 0x8010, 0x0004, 0x801a, 0x0006, 0x8018,
- 0x0008, 0x8016, 0x000a, 0x8014, 0x9186, 0x0013, 0x1160, 0x6004,
- 0x908a, 0x0057, 0x1a0c, 0x0d65, 0x9082, 0x0040, 0x0a0c, 0x0d65,
- 0x2008, 0x0804, 0xcb0f, 0x9186, 0x0051, 0x0108, 0x0040, 0x080c,
- 0x9ab6, 0x01e8, 0x9086, 0x0002, 0x0904, 0xcb57, 0x00c0, 0x9186,
- 0x0027, 0x0180, 0x9186, 0x0048, 0x0128, 0x9186, 0x0014, 0x0150,
- 0x190c, 0x0d65, 0x080c, 0x9ab6, 0x0150, 0x9086, 0x0004, 0x0904,
- 0xcbf6, 0x0028, 0x6004, 0x9082, 0x0040, 0x2008, 0x001a, 0x080c,
- 0x9c9f, 0x0005, 0xcad6, 0xcad8, 0xcad8, 0xcaff, 0xcad6, 0xcad6,
- 0xcad6, 0xcad6, 0xcad6, 0xcad6, 0xcad6, 0xcad6, 0xcad6, 0xcad6,
- 0xcad6, 0xcad6, 0xcad6, 0xcad6, 0xcad6, 0xcad6, 0x080c, 0x0d65,
- 0x080c, 0x8891, 0x080c, 0x894f, 0x0036, 0x0096, 0x6014, 0x904d,
- 0x01d8, 0x080c, 0xb870, 0x01c0, 0x6003, 0x0002, 0x6010, 0x00b6,
- 0x2058, 0xb800, 0x00be, 0xd0bc, 0x1178, 0x2019, 0x0004, 0x080c,
- 0xd267, 0x6017, 0x0000, 0x6018, 0x9005, 0x1120, 0x2001, 0x195f,
- 0x2004, 0x601a, 0x6003, 0x0007, 0x009e, 0x003e, 0x0005, 0x0096,
- 0x080c, 0x8891, 0x080c, 0x894f, 0x080c, 0xb870, 0x0120, 0x6014,
- 0x2048, 0x080c, 0x1061, 0x080c, 0x9c20, 0x009e, 0x0005, 0x0002,
- 0xcb24, 0xcb39, 0xcb26, 0xcb4e, 0xcb24, 0xcb24, 0xcb24, 0xcb24,
- 0xcb24, 0xcb24, 0xcb24, 0xcb24, 0xcb24, 0xcb24, 0xcb24, 0xcb24,
- 0xcb24, 0xcb24, 0xcb24, 0xcb24, 0x080c, 0x0d65, 0x0096, 0x6014,
- 0x2048, 0xa87c, 0xd0b4, 0x0138, 0x6003, 0x0007, 0x2009, 0x0043,
- 0x080c, 0x9c82, 0x0010, 0x6003, 0x0004, 0x080c, 0x894f, 0x009e,
- 0x0005, 0x080c, 0xb870, 0x0138, 0x6114, 0x0096, 0x2148, 0xa97c,
- 0x009e, 0xd1ec, 0x1138, 0x080c, 0x83d6, 0x080c, 0x9be6, 0x080c,
- 0x894f, 0x0005, 0x080c, 0xd4bf, 0x0db0, 0x0cc8, 0x6003, 0x0001,
- 0x6007, 0x0041, 0x2009, 0xa022, 0x080c, 0x84e7, 0x0005, 0x9182,
- 0x0040, 0x0002, 0xcb6e, 0xcb70, 0xcb6e, 0xcb6e, 0xcb6e, 0xcb6e,
- 0xcb6e, 0xcb6e, 0xcb6e, 0xcb6e, 0xcb6e, 0xcb6e, 0xcb6e, 0xcb6e,
- 0xcb6e, 0xcb6e, 0xcb6e, 0xcb71, 0xcb6e, 0xcb6e, 0x080c, 0x0d65,
- 0x0005, 0x00d6, 0x080c, 0x83d6, 0x00de, 0x080c, 0xd517, 0x080c,
- 0x9be6, 0x0005, 0x9182, 0x0040, 0x0002, 0xcb91, 0xcb91, 0xcb91,
- 0xcb91, 0xcb91, 0xcb91, 0xcb91, 0xcb91, 0xcb91, 0xcb93, 0xcbbe,
- 0xcb91, 0xcb91, 0xcb91, 0xcb91, 0xcbbe, 0xcb91, 0xcb91, 0xcb91,
- 0xcb91, 0x080c, 0x0d65, 0x6014, 0x0096, 0x2048, 0xa87c, 0xd0fc,
- 0x0168, 0x908c, 0x0003, 0x918e, 0x0002, 0x0180, 0x6144, 0xd1e4,
- 0x1168, 0x2009, 0x0041, 0x009e, 0x0804, 0xcc7e, 0x6003, 0x0007,
- 0x601b, 0x0000, 0x080c, 0x83d6, 0x009e, 0x0005, 0x6014, 0x2048,
- 0xa97c, 0xd1ec, 0x1130, 0x080c, 0x83d6, 0x080c, 0x9be6, 0x009e,
- 0x0005, 0x080c, 0xd4bf, 0x0db8, 0x009e, 0x0005, 0x2001, 0x180c,
- 0x200c, 0xc1d4, 0x2102, 0x0036, 0x080c, 0x88ec, 0x080c, 0x894f,
- 0x6014, 0x0096, 0x2048, 0x6010, 0x00b6, 0x2058, 0xb800, 0x00be,
- 0xd0bc, 0x0188, 0xa87c, 0x9084, 0x0003, 0x9086, 0x0002, 0x0140,
- 0xa8ac, 0x6330, 0x931a, 0x6332, 0xa8b0, 0x632c, 0x931b, 0x632e,
- 0x6003, 0x0002, 0x0080, 0x2019, 0x0004, 0x080c, 0xd267, 0x6018,
- 0x9005, 0x1128, 0x2001, 0x195f, 0x2004, 0x8003, 0x601a, 0x6017,
- 0x0000, 0x6003, 0x0007, 0x009e, 0x003e, 0x0005, 0x9182, 0x0040,
- 0x0002, 0xcc0d, 0xcc0d, 0xcc0d, 0xcc0d, 0xcc0d, 0xcc0d, 0xcc0d,
- 0xcc0d, 0xcc0f, 0xcc0d, 0xcc0d, 0xcc0d, 0xcc0d, 0xcc0d, 0xcc0d,
- 0xcc0d, 0xcc0d, 0xcc0d, 0xcc0d, 0xcc5a, 0x080c, 0x0d65, 0x6014,
- 0x0096, 0x2048, 0xa834, 0xaa38, 0x6110, 0x00b6, 0x2158, 0xb900,
- 0x00be, 0xd1bc, 0x1190, 0x920d, 0x1518, 0xa87c, 0xd0fc, 0x0128,
- 0x2009, 0x0041, 0x009e, 0x0804, 0xcc7e, 0x6003, 0x0007, 0x601b,
- 0x0000, 0x080c, 0x83d6, 0x009e, 0x0005, 0x6124, 0xd1f4, 0x1d58,
- 0x0006, 0x0046, 0xacac, 0x9422, 0xa9b0, 0x2200, 0x910b, 0x6030,
- 0x9420, 0x6432, 0x602c, 0x9109, 0x612e, 0x004e, 0x000e, 0x08d8,
- 0x6110, 0x00b6, 0x2158, 0xb900, 0x00be, 0xd1bc, 0x1178, 0x2009,
- 0x180e, 0x210c, 0xd19c, 0x0118, 0x6003, 0x0007, 0x0010, 0x6003,
- 0x0006, 0x00e9, 0x080c, 0x83d8, 0x009e, 0x0005, 0x6003, 0x0002,
- 0x009e, 0x0005, 0x6024, 0xd0f4, 0x0128, 0x080c, 0x15af, 0x1904,
- 0xcc0f, 0x0005, 0x6014, 0x0096, 0x2048, 0xa834, 0xa938, 0x009e,
- 0x9105, 0x1120, 0x080c, 0x15af, 0x1904, 0xcc0f, 0x0005, 0xd2fc,
- 0x0140, 0x8002, 0x8000, 0x8212, 0x9291, 0x0000, 0x2009, 0x0009,
- 0x0010, 0x2009, 0x0015, 0xaa9a, 0xa896, 0x0005, 0x9182, 0x0040,
- 0x0208, 0x0062, 0x9186, 0x0013, 0x0120, 0x9186, 0x0014, 0x190c,
- 0x0d65, 0x6024, 0xd0dc, 0x090c, 0x0d65, 0x0005, 0xcca2, 0xccae,
- 0xccba, 0xccc6, 0xcca2, 0xcca2, 0xcca2, 0xcca2, 0xcca9, 0xcca4,
- 0xcca4, 0xcca2, 0xcca2, 0xcca2, 0xcca2, 0xcca4, 0xcca2, 0xcca4,
- 0xcca2, 0xcca9, 0x080c, 0x0d65, 0x6024, 0xd0dc, 0x090c, 0x0d65,
- 0x0005, 0x6014, 0x9005, 0x190c, 0x0d65, 0x0005, 0x6003, 0x0001,
- 0x6106, 0x0126, 0x2091, 0x8000, 0x2009, 0xa022, 0x080c, 0x84c9,
- 0x012e, 0x0005, 0x6003, 0x0004, 0x6106, 0x0126, 0x2091, 0x8000,
- 0x2009, 0xa001, 0x080c, 0x84e7, 0x012e, 0x0005, 0x6003, 0x0003,
- 0x6106, 0x080c, 0x1aca, 0x0126, 0x2091, 0x8000, 0x6014, 0x0096,
- 0x2048, 0xa87c, 0xd0fc, 0x0188, 0x9084, 0x0003, 0x9086, 0x0002,
- 0x01a0, 0x6024, 0xd0cc, 0x1148, 0xd0c4, 0x1138, 0xa8a8, 0x9005,
- 0x1120, 0x6144, 0x918d, 0xb035, 0x0018, 0x6144, 0x918d, 0xa035,
- 0x009e, 0x080c, 0x852e, 0x012e, 0x0005, 0x6144, 0x918d, 0xa032,
- 0x0cb8, 0x0126, 0x2091, 0x8000, 0x0036, 0x0096, 0x9182, 0x0040,
- 0x0023, 0x009e, 0x003e, 0x012e, 0x0005, 0xcd11, 0xcd13, 0xcd28,
- 0xcd42, 0xcd11, 0xcd11, 0xcd11, 0xcd11, 0xcd11, 0xcd11, 0xcd11,
- 0xcd11, 0xcd11, 0xcd11, 0xcd11, 0xcd11, 0xcd11, 0xcd11, 0xcd11,
- 0xcd11, 0x080c, 0x0d65, 0x6014, 0x2048, 0xa87c, 0xd0fc, 0x0510,
- 0x909c, 0x0003, 0x939e, 0x0003, 0x01e8, 0x6003, 0x0001, 0x6106,
- 0x0126, 0x2091, 0x8000, 0x2009, 0xa022, 0x080c, 0x84e7, 0x0470,
- 0x6014, 0x2048, 0xa87c, 0xd0fc, 0x0168, 0x909c, 0x0003, 0x939e,
- 0x0003, 0x0140, 0x6003, 0x0001, 0x6106, 0x2009, 0xa001, 0x080c,
- 0x84e7, 0x00e0, 0x901e, 0x6316, 0x631a, 0x2019, 0x0004, 0x080c,
- 0xd267, 0x00a0, 0x6014, 0x2048, 0xa87c, 0xd0fc, 0x0d98, 0x909c,
- 0x0003, 0x939e, 0x0003, 0x0d70, 0x6003, 0x0003, 0x6106, 0x080c,
- 0x1aca, 0x6144, 0x918d, 0xa035, 0x080c, 0x852e, 0x0005, 0x080c,
- 0x8891, 0x6114, 0x81ff, 0x0158, 0x0096, 0x2148, 0x080c, 0xd563,
- 0x0036, 0x2019, 0x0029, 0x080c, 0xd267, 0x003e, 0x009e, 0x080c,
- 0x9c20, 0x080c, 0x894f, 0x0005, 0x080c, 0x88ec, 0x6114, 0x81ff,
- 0x0158, 0x0096, 0x2148, 0x080c, 0xd563, 0x0036, 0x2019, 0x0029,
- 0x080c, 0xd267, 0x003e, 0x009e, 0x080c, 0x9c20, 0x0005, 0x9182,
- 0x0085, 0x0002, 0xcd91, 0xcd8f, 0xcd8f, 0xcd9d, 0xcd8f, 0xcd8f,
- 0xcd8f, 0xcd8f, 0xcd8f, 0xcd8f, 0xcd8f, 0xcd8f, 0xcd8f, 0x080c,
- 0x0d65, 0x6003, 0x000b, 0x6106, 0x0126, 0x2091, 0x8000, 0x2009,
- 0x8020, 0x080c, 0x84e7, 0x012e, 0x0005, 0x0026, 0x00e6, 0x080c,
- 0xd4b6, 0x0118, 0x080c, 0x9be6, 0x0440, 0x2071, 0x0260, 0x7224,
- 0x6216, 0x2001, 0x180e, 0x2004, 0xd0e4, 0x0150, 0x6010, 0x00b6,
- 0x2058, 0xbca0, 0x00be, 0x2c00, 0x2011, 0x014e, 0x080c, 0x9f10,
- 0x7220, 0x080c, 0xd0fd, 0x0118, 0x6007, 0x0086, 0x0040, 0x6007,
- 0x0087, 0x7224, 0x9296, 0xffff, 0x1110, 0x6007, 0x0086, 0x6003,
- 0x0001, 0x2009, 0x8020, 0x080c, 0x84e7, 0x00ee, 0x002e, 0x0005,
- 0x9186, 0x0013, 0x1160, 0x6004, 0x908a, 0x0085, 0x0a0c, 0x0d65,
- 0x908a, 0x0092, 0x1a0c, 0x0d65, 0x9082, 0x0085, 0x00a2, 0x9186,
- 0x0027, 0x0130, 0x9186, 0x0014, 0x0118, 0x080c, 0x9c9f, 0x0050,
- 0x2001, 0x0007, 0x080c, 0x620c, 0x080c, 0x8891, 0x080c, 0x9c20,
- 0x080c, 0x894f, 0x0005, 0xce00, 0xce02, 0xce02, 0xce00, 0xce00,
- 0xce00, 0xce00, 0xce00, 0xce00, 0xce00, 0xce00, 0xce00, 0xce00,
- 0x080c, 0x0d65, 0x080c, 0x9c20, 0x080c, 0x894f, 0x0005, 0x9182,
- 0x0085, 0x0a0c, 0x0d65, 0x9182, 0x0092, 0x1a0c, 0x0d65, 0x9182,
- 0x0085, 0x0002, 0xce1f, 0xce1f, 0xce1f, 0xce21, 0xce1f, 0xce1f,
- 0xce1f, 0xce1f, 0xce1f, 0xce1f, 0xce1f, 0xce1f, 0xce1f, 0x080c,
- 0x0d65, 0x0005, 0x9186, 0x0013, 0x0148, 0x9186, 0x0014, 0x0130,
- 0x9186, 0x0027, 0x0118, 0x080c, 0x9c9f, 0x0020, 0x080c, 0x8891,
- 0x080c, 0x9c20, 0x0005, 0x0036, 0x080c, 0xd517, 0x604b, 0x0000,
- 0x2019, 0x000b, 0x0031, 0x6023, 0x0006, 0x6003, 0x0007, 0x003e,
- 0x0005, 0x0126, 0x0036, 0x2091, 0x8000, 0x2001, 0x0382, 0x2004,
- 0x9084, 0x0007, 0x0006, 0x9086, 0x0003, 0x0110, 0x080c, 0x98c7,
- 0x0086, 0x2c40, 0x0096, 0x904e, 0x080c, 0x936d, 0x009e, 0x008e,
- 0x1558, 0x0076, 0x2c38, 0x080c, 0x9418, 0x007e, 0x1528, 0x6000,
- 0x9086, 0x0000, 0x0508, 0x6020, 0x9086, 0x0007, 0x01e8, 0x0096,
- 0x601c, 0xd084, 0x0140, 0x080c, 0xd517, 0x080c, 0xbfa7, 0x080c,
- 0x193e, 0x6023, 0x0007, 0x6014, 0x2048, 0x080c, 0xb870, 0x0110,
- 0x080c, 0xd267, 0x009e, 0x9006, 0x6046, 0x6016, 0x080c, 0xd517,
- 0x6023, 0x0007, 0x080c, 0xbfa7, 0x000e, 0x9086, 0x0003, 0x0110,
- 0x080c, 0x98e3, 0x003e, 0x012e, 0x0005, 0x00f6, 0x00c6, 0x00b6,
- 0x0036, 0x0156, 0x2079, 0x0260, 0x7938, 0x783c, 0x080c, 0x2459,
- 0x15e8, 0x0016, 0x00c6, 0x080c, 0x628f, 0x15b0, 0x001e, 0x00c6,
- 0x2160, 0x080c, 0xbfa4, 0x00ce, 0x002e, 0x0026, 0x0016, 0x080c,
- 0x98c7, 0x2019, 0x0029, 0x080c, 0x94e5, 0x080c, 0x8658, 0x0076,
- 0x903e, 0x080c, 0x853d, 0x007e, 0x001e, 0x0076, 0x903e, 0x080c,
- 0xd011, 0x007e, 0x080c, 0x98e3, 0x0026, 0xba04, 0x9294, 0xff00,
- 0x8217, 0x9286, 0x0006, 0x0118, 0x9286, 0x0004, 0x1118, 0xbaa0,
- 0x080c, 0x30f8, 0x002e, 0xbc84, 0x001e, 0x080c, 0x5d11, 0xbe12,
- 0xbd16, 0xbc86, 0x9006, 0x0010, 0x00ce, 0x001e, 0x015e, 0x003e,
- 0x00be, 0x00ce, 0x00fe, 0x0005, 0x00c6, 0x00d6, 0x00b6, 0x0016,
- 0x2009, 0x1823, 0x2104, 0x9086, 0x0074, 0x1904, 0xcf35, 0x2069,
- 0x0260, 0x6944, 0x9182, 0x0100, 0x06e0, 0x6940, 0x9184, 0x8000,
- 0x0904, 0xcf32, 0x2001, 0x1954, 0x2004, 0x9005, 0x1140, 0x6010,
- 0x2058, 0xb884, 0x9005, 0x0118, 0x9184, 0x0800, 0x0598, 0x6948,
- 0x918a, 0x0001, 0x0648, 0x080c, 0xd5cb, 0x0118, 0x6978, 0xd1fc,
- 0x11b8, 0x2009, 0x0205, 0x200b, 0x0001, 0x693c, 0x81ff, 0x1198,
- 0x6944, 0x9182, 0x0100, 0x02a8, 0x6940, 0x81ff, 0x1178, 0x6948,
- 0x918a, 0x0001, 0x0288, 0x6950, 0x918a, 0x0001, 0x0298, 0x00d0,
- 0x6017, 0x0100, 0x00a0, 0x6017, 0x0300, 0x0088, 0x6017, 0x0500,
- 0x0070, 0x6017, 0x0700, 0x0058, 0x6017, 0x0900, 0x0040, 0x6017,
- 0x0b00, 0x0028, 0x6017, 0x0f00, 0x0010, 0x6017, 0x2d00, 0x9085,
- 0x0001, 0x0008, 0x9006, 0x001e, 0x00be, 0x00de, 0x00ce, 0x0005,
- 0x00c6, 0x00b6, 0x0026, 0x0036, 0x0156, 0x6210, 0x2258, 0xbb04,
- 0x9394, 0x00ff, 0x9286, 0x0006, 0x0180, 0x9286, 0x0004, 0x0168,
- 0x9394, 0xff00, 0x8217, 0x9286, 0x0006, 0x0138, 0x9286, 0x0004,
- 0x0120, 0x080c, 0x629e, 0x0804, 0xcfa0, 0x2011, 0x0276, 0x20a9,
- 0x0004, 0x0096, 0x2b48, 0x2019, 0x000a, 0x080c, 0xabee, 0x009e,
- 0x15c0, 0x2011, 0x027a, 0x20a9, 0x0004, 0x0096, 0x2b48, 0x2019,
- 0x0006, 0x080c, 0xabee, 0x009e, 0x1560, 0x0046, 0x0016, 0xbaa0,
- 0x2220, 0x9006, 0x2009, 0x185c, 0x210c, 0x0038, 0x2009, 0x0029,
- 0x080c, 0xd2bc, 0xb800, 0xc0e5, 0xb802, 0x080c, 0x98c7, 0x2019,
- 0x0029, 0x080c, 0x8658, 0x0076, 0x2039, 0x0000, 0x080c, 0x853d,
- 0x2c08, 0x080c, 0xd011, 0x007e, 0x080c, 0x98e3, 0x2001, 0x0007,
- 0x080c, 0x620c, 0x2001, 0x0007, 0x080c, 0x61e0, 0x001e, 0x004e,
- 0x9006, 0x015e, 0x003e, 0x002e, 0x00be, 0x00ce, 0x0005, 0x00d6,
- 0x2069, 0x026e, 0x6800, 0x9086, 0x0800, 0x0118, 0x6017, 0x0000,
- 0x0008, 0x9006, 0x00de, 0x0005, 0x00b6, 0x00f6, 0x0016, 0x0026,
- 0x0036, 0x0156, 0x2079, 0x026c, 0x7930, 0x7834, 0x080c, 0x2459,
- 0x11d0, 0x080c, 0x628f, 0x11b8, 0x2011, 0x0270, 0x20a9, 0x0004,
- 0x0096, 0x2b48, 0x2019, 0x000a, 0x080c, 0xabee, 0x009e, 0x1158,
- 0x2011, 0x0274, 0x20a9, 0x0004, 0x0096, 0x2b48, 0x2019, 0x0006,
- 0x080c, 0xabee, 0x009e, 0x015e, 0x003e, 0x002e, 0x001e, 0x00fe,
- 0x00be, 0x0005, 0x00b6, 0x0006, 0x0016, 0x0026, 0x0036, 0x0156,
- 0x2011, 0x0263, 0x2204, 0x8211, 0x220c, 0x080c, 0x2459, 0x11d0,
- 0x080c, 0x628f, 0x11b8, 0x2011, 0x0276, 0x20a9, 0x0004, 0x0096,
- 0x2b48, 0x2019, 0x000a, 0x080c, 0xabee, 0x009e, 0x1158, 0x2011,
- 0x027a, 0x20a9, 0x0004, 0x0096, 0x2b48, 0x2019, 0x0006, 0x080c,
- 0xabee, 0x009e, 0x015e, 0x003e, 0x002e, 0x001e, 0x000e, 0x00be,
- 0x0005, 0x00e6, 0x00c6, 0x0086, 0x0076, 0x0066, 0x0056, 0x0046,
- 0x0026, 0x0126, 0x2091, 0x8000, 0x080c, 0x9925, 0x0106, 0x190c,
- 0x98c7, 0x2740, 0x2029, 0x19cb, 0x252c, 0x2021, 0x19d2, 0x2424,
- 0x2061, 0x1ddc, 0x2071, 0x1800, 0x7650, 0x7070, 0x81ff, 0x0150,
- 0x0006, 0x9186, 0x1b09, 0x000e, 0x0128, 0x8001, 0x9602, 0x1a04,
- 0xd0b2, 0x0018, 0x9606, 0x0904, 0xd0b2, 0x2100, 0x9c06, 0x0904,
- 0xd0a9, 0x080c, 0xd2fd, 0x1904, 0xd0a9, 0x080c, 0xd5e8, 0x0904,
- 0xd0a9, 0x080c, 0xd2ed, 0x0904, 0xd0a9, 0x6720, 0x9786, 0x0001,
- 0x1148, 0x080c, 0x3195, 0x0904, 0xd0d1, 0x6004, 0x9086, 0x0000,
- 0x1904, 0xd0d1, 0x9786, 0x0004, 0x0904, 0xd0d1, 0x9786, 0x0007,
- 0x0904, 0xd0a9, 0x2500, 0x9c06, 0x0904, 0xd0a9, 0x2400, 0x9c06,
- 0x0904, 0xd0a9, 0x88ff, 0x0118, 0x605c, 0x9906, 0x15d0, 0x0096,
- 0x6043, 0xffff, 0x6000, 0x9086, 0x0004, 0x1120, 0x0016, 0x080c,
- 0x193e, 0x001e, 0x9786, 0x000a, 0x0148, 0x080c, 0xba85, 0x1130,
- 0x080c, 0xa59c, 0x009e, 0x080c, 0x9c20, 0x0418, 0x6014, 0x2048,
- 0x080c, 0xb870, 0x01d8, 0x9786, 0x0003, 0x1588, 0xa867, 0x0103,
- 0xa87c, 0xd0cc, 0x0130, 0x0096, 0xa878, 0x2048, 0x080c, 0x0fe1,
- 0x009e, 0xab7a, 0xa877, 0x0000, 0x080c, 0xd563, 0x0016, 0x080c,
- 0xbb73, 0x080c, 0x69a9, 0x001e, 0x080c, 0xba5f, 0x009e, 0x080c,
- 0x9c20, 0x9ce0, 0x001c, 0x2001, 0x1819, 0x2004, 0x9c02, 0x1210,
- 0x0804, 0xd02a, 0x010e, 0x190c, 0x98e3, 0x012e, 0x002e, 0x004e,
- 0x005e, 0x006e, 0x007e, 0x008e, 0x00ce, 0x00ee, 0x0005, 0x9786,
- 0x0006, 0x1150, 0x9386, 0x0005, 0x0128, 0x080c, 0xd563, 0x080c,
- 0xd267, 0x08e0, 0x009e, 0x08e8, 0x9786, 0x000a, 0x0908, 0x0804,
- 0xd08e, 0x81ff, 0x09b0, 0x9180, 0x0001, 0x2004, 0x9086, 0x0018,
- 0x0130, 0x9180, 0x0001, 0x2004, 0x9086, 0x002d, 0x1950, 0x6000,
- 0x9086, 0x0002, 0x1930, 0x080c, 0xba74, 0x0130, 0x080c, 0xba85,
- 0x1900, 0x080c, 0xa59c, 0x0038, 0x080c, 0x305d, 0x080c, 0xba85,
- 0x1110, 0x080c, 0xa59c, 0x080c, 0x9c20, 0x0804, 0xd0a9, 0xa864,
- 0x9084, 0x00ff, 0x9086, 0x0039, 0x0005, 0x00c6, 0x00e6, 0x0016,
- 0x2c08, 0x2170, 0x9006, 0x080c, 0xd28e, 0x001e, 0x0120, 0x6020,
- 0x9084, 0x000f, 0x001b, 0x00ee, 0x00ce, 0x0005, 0xd11c, 0xd11c,
- 0xd11c, 0xd11c, 0xd11c, 0xd11c, 0xd11e, 0xd11c, 0xd11c, 0xd11c,
- 0xd11c, 0x9c20, 0x9c20, 0xd11c, 0x9006, 0x0005, 0x0036, 0x0046,
- 0x0016, 0x7010, 0x00b6, 0x2058, 0xbca0, 0x00be, 0x2c00, 0x2009,
- 0x0020, 0x080c, 0xd2bc, 0x001e, 0x004e, 0x2019, 0x0002, 0x080c,
- 0xce41, 0x003e, 0x9085, 0x0001, 0x0005, 0x0096, 0x080c, 0xb870,
- 0x0140, 0x6014, 0x904d, 0x080c, 0xb45e, 0x687b, 0x0005, 0x080c,
- 0x69b5, 0x009e, 0x080c, 0x9c20, 0x9085, 0x0001, 0x0005, 0x2001,
- 0x0001, 0x080c, 0x61cc, 0x0156, 0x0016, 0x0026, 0x0036, 0x20a9,
- 0x0004, 0x2019, 0x1805, 0x2011, 0x0276, 0x080c, 0xabda, 0x003e,
- 0x002e, 0x001e, 0x015e, 0x9005, 0x0005, 0x00f6, 0x00e6, 0x00c6,
- 0x0086, 0x0076, 0x0066, 0x00b6, 0x0126, 0x2091, 0x8000, 0x2740,
- 0x2061, 0x1ddc, 0x2079, 0x0001, 0x8fff, 0x0904, 0xd1b7, 0x2071,
- 0x1800, 0x7650, 0x7070, 0x8001, 0x9602, 0x1a04, 0xd1b7, 0x88ff,
- 0x0120, 0x2800, 0x9c06, 0x1590, 0x2078, 0x080c, 0xd2ed, 0x0570,
- 0x2400, 0x9c06, 0x0558, 0x6720, 0x9786, 0x0006, 0x1538, 0x9786,
- 0x0007, 0x0520, 0x88ff, 0x1140, 0x6010, 0x9b06, 0x11f8, 0x85ff,
- 0x0118, 0x605c, 0x9106, 0x11d0, 0x0096, 0x601c, 0xd084, 0x0140,
- 0x080c, 0xd517, 0x080c, 0xbfa7, 0x080c, 0x193e, 0x6023, 0x0007,
- 0x6014, 0x2048, 0x080c, 0xb870, 0x0120, 0x0046, 0x080c, 0xd267,
- 0x004e, 0x009e, 0x080c, 0x9c20, 0x88ff, 0x1198, 0x9ce0, 0x001c,
- 0x2001, 0x1819, 0x2004, 0x9c02, 0x1210, 0x0804, 0xd16c, 0x9006,
- 0x012e, 0x00be, 0x006e, 0x007e, 0x008e, 0x00ce, 0x00ee, 0x00fe,
- 0x0005, 0x98c5, 0x0001, 0x0ca0, 0x080c, 0x98c7, 0x00b6, 0x0076,
- 0x0056, 0x0086, 0x9046, 0x2029, 0x0001, 0x2c20, 0x2019, 0x0002,
- 0x6210, 0x2258, 0x0096, 0x904e, 0x080c, 0x936d, 0x009e, 0x008e,
- 0x903e, 0x080c, 0x9418, 0x080c, 0xd15d, 0x005e, 0x007e, 0x00be,
- 0x080c, 0x98e3, 0x0005, 0x080c, 0x98c7, 0x00b6, 0x0046, 0x0056,
- 0x0076, 0x00c6, 0x0156, 0x2c20, 0x2128, 0x20a9, 0x007f, 0x900e,
- 0x0016, 0x0036, 0x080c, 0x628f, 0x1190, 0x0056, 0x0086, 0x9046,
- 0x2508, 0x2029, 0x0001, 0x0096, 0x904e, 0x080c, 0x936d, 0x009e,
- 0x008e, 0x903e, 0x080c, 0x9418, 0x080c, 0xd15d, 0x005e, 0x003e,
- 0x001e, 0x8108, 0x1f04, 0xd1f0, 0x015e, 0x00ce, 0x007e, 0x005e,
- 0x004e, 0x00be, 0x080c, 0x98e3, 0x0005, 0x080c, 0x98c7, 0x00b6,
- 0x0076, 0x0056, 0x6210, 0x2258, 0x0086, 0x9046, 0x2029, 0x0001,
- 0x2019, 0x0048, 0x0096, 0x904e, 0x080c, 0x936d, 0x009e, 0x008e,
- 0x903e, 0x080c, 0x9418, 0x2c20, 0x080c, 0xd15d, 0x005e, 0x007e,
- 0x00be, 0x080c, 0x98e3, 0x0005, 0x080c, 0x98c7, 0x00b6, 0x0046,
- 0x0056, 0x0076, 0x00c6, 0x0156, 0x2c20, 0x20a9, 0x0800, 0x900e,
- 0x0016, 0x0036, 0x080c, 0x628f, 0x11a0, 0x0086, 0x9046, 0x2828,
- 0x0046, 0x2021, 0x0001, 0x080c, 0xd4fb, 0x004e, 0x0096, 0x904e,
- 0x080c, 0x936d, 0x009e, 0x008e, 0x903e, 0x080c, 0x9418, 0x080c,
- 0xd15d, 0x003e, 0x001e, 0x8108, 0x1f04, 0xd240, 0x015e, 0x00ce,
- 0x007e, 0x005e, 0x004e, 0x00be, 0x080c, 0x98e3, 0x0005, 0x0016,
- 0x00f6, 0x080c, 0xb86e, 0x0198, 0xa864, 0x9084, 0x00ff, 0x9086,
- 0x0046, 0x0180, 0xa800, 0x907d, 0x0138, 0xa803, 0x0000, 0xab82,
- 0x080c, 0x69b5, 0x2f48, 0x0cb0, 0xab82, 0x080c, 0x69b5, 0x00fe,
- 0x001e, 0x0005, 0xa800, 0x907d, 0x0130, 0xa803, 0x0000, 0x080c,
- 0x69b5, 0x2f48, 0x0cb8, 0x080c, 0x69b5, 0x0c88, 0x00e6, 0x0046,
- 0x0036, 0x2061, 0x1ddc, 0x9005, 0x1138, 0x2071, 0x1800, 0x7450,
- 0x7070, 0x8001, 0x9402, 0x12d8, 0x2100, 0x9c06, 0x0168, 0x6000,
- 0x9086, 0x0000, 0x0148, 0x6008, 0x9206, 0x1130, 0x6010, 0x91a0,
- 0x0004, 0x2424, 0x9406, 0x0140, 0x9ce0, 0x001c, 0x2001, 0x1819,
- 0x2004, 0x9c02, 0x1220, 0x0c40, 0x9085, 0x0001, 0x0008, 0x9006,
- 0x003e, 0x004e, 0x00ee, 0x0005, 0x0096, 0x0006, 0x080c, 0x102f,
- 0x000e, 0x090c, 0x0d65, 0xaae2, 0xa867, 0x010d, 0xa88e, 0x0026,
- 0x2010, 0x080c, 0xb85e, 0x2001, 0x0000, 0x0120, 0x2200, 0x9080,
- 0x0017, 0x2004, 0x002e, 0xa87a, 0x9186, 0x0020, 0x0110, 0xa8e3,
- 0xffff, 0xa986, 0xac76, 0xa87f, 0x0000, 0x2001, 0x1966, 0x2004,
- 0xa882, 0x9006, 0xa802, 0xa86a, 0xa88a, 0x0126, 0x2091, 0x8000,
- 0x080c, 0x69b5, 0x012e, 0x009e, 0x0005, 0x6700, 0x9786, 0x0000,
- 0x0158, 0x9786, 0x0001, 0x0140, 0x9786, 0x000a, 0x0128, 0x9786,
- 0x0009, 0x0110, 0x9085, 0x0001, 0x0005, 0x00e6, 0x6010, 0x9075,
- 0x0138, 0x00b6, 0x2058, 0xb8a0, 0x00be, 0x9206, 0x00ee, 0x0005,
- 0x9085, 0x0001, 0x0cd8, 0x0016, 0x6004, 0x908e, 0x001e, 0x11a0,
- 0x8007, 0x6134, 0x918c, 0x00ff, 0x9105, 0x6036, 0x6007, 0x0085,
- 0x6003, 0x000b, 0x6023, 0x0005, 0x2001, 0x195f, 0x2004, 0x601a,
- 0x2009, 0x8020, 0x080c, 0x84e7, 0x001e, 0x0005, 0xa001, 0xa001,
- 0x0005, 0x6024, 0xd0e4, 0x0158, 0xd0cc, 0x0118, 0x080c, 0xbbba,
- 0x0030, 0x080c, 0xd517, 0x080c, 0x83d6, 0x080c, 0x9be6, 0x0005,
- 0x9280, 0x0008, 0x2004, 0x9084, 0x000f, 0x0002, 0xd34c, 0xd34c,
- 0xd34c, 0xd34e, 0xd34c, 0xd34e, 0xd34e, 0xd34c, 0xd34e, 0xd34c,
- 0xd34c, 0xd34c, 0xd34c, 0xd34c, 0x9006, 0x0005, 0x9085, 0x0001,
- 0x0005, 0x9280, 0x0008, 0x2004, 0x9084, 0x000f, 0x0002, 0xd365,
- 0xd365, 0xd365, 0xd365, 0xd365, 0xd365, 0xd372, 0xd365, 0xd365,
- 0xd365, 0xd365, 0xd365, 0xd365, 0xd365, 0x6007, 0x003b, 0x602f,
- 0x0009, 0x6017, 0x2a00, 0x6003, 0x0001, 0x2009, 0x8020, 0x080c,
- 0x84e7, 0x0005, 0x0096, 0x00c6, 0x2260, 0x080c, 0xd517, 0x604b,
- 0x0000, 0x6024, 0xc0f4, 0xc0e4, 0x6026, 0x603b, 0x0000, 0x00ce,
- 0x00d6, 0x2268, 0x9186, 0x0007, 0x1904, 0xd3cb, 0x6814, 0x9005,
- 0x0138, 0x2048, 0xa87c, 0xd0fc, 0x1118, 0x00de, 0x009e, 0x08a8,
- 0x6007, 0x003a, 0x6003, 0x0001, 0x2009, 0x8020, 0x080c, 0x84e7,
- 0x00c6, 0x2d60, 0x6100, 0x9186, 0x0002, 0x1904, 0xd442, 0x6014,
- 0x9005, 0x1138, 0x6000, 0x9086, 0x0007, 0x190c, 0x0d65, 0x0804,
- 0xd442, 0x2048, 0x080c, 0xb870, 0x1130, 0x0028, 0x2048, 0xa800,
- 0x9005, 0x1de0, 0x2900, 0x2048, 0xa87c, 0x9084, 0x0003, 0x9086,
- 0x0002, 0x1168, 0xa87c, 0xc0dc, 0xc0f4, 0xa87e, 0xa880, 0xc0fc,
- 0xa882, 0x2009, 0x0043, 0x080c, 0xcc7e, 0x0804, 0xd442, 0x2009,
- 0x0041, 0x0804, 0xd43c, 0x9186, 0x0005, 0x15a0, 0x6814, 0x2048,
- 0xa87c, 0xd0bc, 0x1120, 0x00de, 0x009e, 0x0804, 0xd365, 0xd0b4,
- 0x0128, 0xd0fc, 0x090c, 0x0d65, 0x0804, 0xd386, 0x6007, 0x003a,
- 0x6003, 0x0001, 0x2009, 0x8020, 0x080c, 0x84e7, 0x00c6, 0x2d60,
- 0x6100, 0x9186, 0x0002, 0x0120, 0x9186, 0x0004, 0x1904, 0xd442,
- 0x6814, 0x2048, 0xa97c, 0xc1f4, 0xc1dc, 0xa97e, 0xa980, 0xc1fc,
- 0xc1bc, 0xa982, 0x00f6, 0x2c78, 0x080c, 0x1669, 0x00fe, 0x2009,
- 0x0042, 0x04d0, 0x0036, 0x080c, 0x102f, 0x090c, 0x0d65, 0xa867,
- 0x010d, 0x9006, 0xa802, 0xa86a, 0xa88a, 0x2d18, 0xab8e, 0xa887,
- 0x0045, 0x2c00, 0xa892, 0x6038, 0xa8a2, 0x2360, 0x6024, 0xc0dd,
- 0x6026, 0x6010, 0x00b6, 0x2058, 0xb8a0, 0x00be, 0x2004, 0x635c,
- 0xab7a, 0xa876, 0x9006, 0xa87e, 0xa882, 0xad9a, 0xae96, 0xa89f,
- 0x0001, 0x080c, 0x69b5, 0x2019, 0x0045, 0x6008, 0x2068, 0x080c,
- 0xce41, 0x2d00, 0x600a, 0x6023, 0x0006, 0x6003, 0x0007, 0x901e,
- 0x631a, 0x634a, 0x003e, 0x0038, 0x604b, 0x0000, 0x6003, 0x0007,
- 0x080c, 0xcc7e, 0x00ce, 0x00de, 0x009e, 0x0005, 0x9186, 0x0013,
- 0x1128, 0x6004, 0x9082, 0x0085, 0x2008, 0x00c2, 0x9186, 0x0027,
- 0x1178, 0x080c, 0x8891, 0x0036, 0x0096, 0x6014, 0x2048, 0x2019,
- 0x0004, 0x080c, 0xd267, 0x009e, 0x003e, 0x080c, 0x894f, 0x0005,
- 0x9186, 0x0014, 0x0d70, 0x080c, 0x9c9f, 0x0005, 0xd475, 0xd473,
- 0xd473, 0xd473, 0xd473, 0xd473, 0xd475, 0xd473, 0xd473, 0xd473,
- 0xd473, 0xd473, 0xd473, 0x080c, 0x0d65, 0x6003, 0x000c, 0x080c,
- 0x894f, 0x0005, 0x9182, 0x0092, 0x1220, 0x9182, 0x0085, 0x0208,
- 0x001a, 0x080c, 0x9c9f, 0x0005, 0xd491, 0xd491, 0xd491, 0xd491,
- 0xd493, 0xd4b3, 0xd491, 0xd491, 0xd491, 0xd491, 0xd491, 0xd491,
- 0xd491, 0x080c, 0x0d65, 0x00d6, 0x2c68, 0x080c, 0x9b90, 0x01b0,
- 0x6003, 0x0001, 0x6007, 0x001e, 0x2009, 0x026e, 0x210c, 0x613a,
- 0x2009, 0x026f, 0x210c, 0x613e, 0x600b, 0xffff, 0x6910, 0x6112,
- 0x6023, 0x0004, 0x2009, 0x8020, 0x080c, 0x84e7, 0x2d60, 0x080c,
- 0x9be6, 0x00de, 0x0005, 0x080c, 0x9be6, 0x0005, 0x00e6, 0x6010,
- 0x00b6, 0x2058, 0xb800, 0x00be, 0xd0ec, 0x00ee, 0x0005, 0x2009,
- 0x187b, 0x210c, 0xd1ec, 0x05b0, 0x6003, 0x0002, 0x6024, 0xc0e5,
- 0x6026, 0xd0cc, 0x0150, 0x2001, 0x1960, 0x2004, 0x604a, 0x2009,
- 0x187b, 0x210c, 0xd1f4, 0x1520, 0x00a0, 0x2009, 0x187b, 0x210c,
- 0xd1f4, 0x0128, 0x6024, 0xc0e4, 0x6026, 0x9006, 0x00d8, 0x2001,
- 0x1960, 0x200c, 0x2001, 0x195e, 0x2004, 0x9100, 0x9080, 0x000a,
- 0x604a, 0x6010, 0x00b6, 0x2058, 0xb8ac, 0x00be, 0x0008, 0x2104,
- 0x9005, 0x0118, 0x9088, 0x0003, 0x0cd0, 0x2c0a, 0x600f, 0x0000,
- 0x9085, 0x0001, 0x0005, 0x0016, 0x00c6, 0x00e6, 0x615c, 0xb8ac,
- 0x2060, 0x8cff, 0x0180, 0x84ff, 0x1118, 0x605c, 0x9106, 0x1138,
- 0x600c, 0x2072, 0x080c, 0x83d6, 0x080c, 0x9be6, 0x0010, 0x9cf0,
- 0x0003, 0x2e64, 0x0c70, 0x00ee, 0x00ce, 0x001e, 0x0005, 0x00d6,
- 0x00b6, 0x6010, 0x2058, 0xb8ac, 0x2068, 0x9005, 0x0130, 0x9c06,
- 0x0110, 0x680c, 0x0cd0, 0x600c, 0x680e, 0x00be, 0x00de, 0x0005,
- 0x0026, 0x0036, 0x0156, 0x2011, 0x182b, 0x2204, 0x9084, 0x00ff,
- 0x2019, 0x026e, 0x2334, 0x9636, 0x1508, 0x8318, 0x2334, 0x2204,
- 0x9084, 0xff00, 0x9636, 0x11d0, 0x2011, 0x0270, 0x20a9, 0x0004,
- 0x6010, 0x0096, 0x2048, 0x2019, 0x000a, 0x080c, 0xabee, 0x009e,
- 0x1168, 0x2011, 0x0274, 0x20a9, 0x0004, 0x6010, 0x0096, 0x2048,
- 0x2019, 0x0006, 0x080c, 0xabee, 0x009e, 0x1100, 0x015e, 0x003e,
- 0x002e, 0x0005, 0x00e6, 0x2071, 0x1800, 0x080c, 0x5c8a, 0x080c,
- 0x2e09, 0x00ee, 0x0005, 0x00e6, 0x6010, 0x00b6, 0x2058, 0xb800,
- 0x00be, 0xd0fc, 0x0108, 0x0011, 0x00ee, 0x0005, 0xa880, 0xc0e5,
- 0xa882, 0x0005, 0x00e6, 0x00d6, 0x00c6, 0x0076, 0x0066, 0x0056,
- 0x0046, 0x0026, 0x0016, 0x0126, 0x2091, 0x8000, 0x2029, 0x19cb,
- 0x252c, 0x2021, 0x19d2, 0x2424, 0x2061, 0x1ddc, 0x2071, 0x1800,
- 0x7650, 0x7070, 0x9606, 0x0578, 0x6720, 0x9786, 0x0001, 0x0118,
- 0x9786, 0x0008, 0x1500, 0x2500, 0x9c06, 0x01e8, 0x2400, 0x9c06,
- 0x01d0, 0x080c, 0xd2ed, 0x01b8, 0x080c, 0xd2fd, 0x11a0, 0x6000,
- 0x9086, 0x0004, 0x1120, 0x0016, 0x080c, 0x193e, 0x001e, 0x080c,
- 0xba74, 0x1110, 0x080c, 0x305d, 0x080c, 0xba85, 0x1110, 0x080c,
- 0xa59c, 0x080c, 0x9c20, 0x9ce0, 0x001c, 0x2001, 0x1819, 0x2004,
- 0x9c02, 0x1208, 0x0858, 0x012e, 0x001e, 0x002e, 0x004e, 0x005e,
- 0x006e, 0x007e, 0x00ce, 0x00de, 0x00ee, 0x0005, 0x2001, 0x1810,
- 0x2004, 0xd0dc, 0x0005, 0x0006, 0x2001, 0x1836, 0x2004, 0xd09c,
- 0x000e, 0x0005, 0x0006, 0x0036, 0x0046, 0x080c, 0xbf8f, 0x0168,
- 0x2019, 0xffff, 0x9005, 0x0128, 0x6010, 0x00b6, 0x2058, 0xbba0,
- 0x00be, 0x2021, 0x0004, 0x080c, 0x4a97, 0x004e, 0x003e, 0x000e,
- 0x6004, 0x9086, 0x0001, 0x1128, 0x080c, 0x94e5, 0x080c, 0x9c20,
- 0x9006, 0x0005, 0x00e6, 0x00c6, 0x00b6, 0x0046, 0x2061, 0x1ddc,
- 0x2071, 0x1800, 0x7450, 0x7070, 0x8001, 0x9402, 0x12b8, 0x2100,
- 0x9c06, 0x0148, 0x6000, 0x9086, 0x0000, 0x0128, 0x6010, 0x2058,
- 0xb8a0, 0x9206, 0x0140, 0x9ce0, 0x001c, 0x2001, 0x1819, 0x2004,
- 0x9c02, 0x1220, 0x0c60, 0x9085, 0x0001, 0x0008, 0x9006, 0x004e,
- 0x00be, 0x00ce, 0x00ee, 0x0005, 0x0126, 0x0006, 0x00e6, 0x0016,
- 0x2091, 0x8000, 0x2071, 0x1840, 0xd5a4, 0x0118, 0x7054, 0x8000,
- 0x7056, 0xd5b4, 0x0118, 0x7050, 0x8000, 0x7052, 0xd5ac, 0x0178,
- 0x2500, 0x9084, 0x0007, 0x908e, 0x0003, 0x0148, 0x908e, 0x0004,
- 0x0130, 0x908e, 0x0005, 0x0118, 0x2071, 0x184a, 0x0089, 0x001e,
- 0x00ee, 0x000e, 0x012e, 0x0005, 0x0126, 0x0006, 0x00e6, 0x2091,
- 0x8000, 0x2071, 0x1842, 0x0021, 0x00ee, 0x000e, 0x012e, 0x0005,
- 0x2e04, 0x8000, 0x2072, 0x1220, 0x8e70, 0x2e04, 0x8000, 0x2072,
- 0x0005, 0x00e6, 0x2071, 0x1840, 0x0c99, 0x00ee, 0x0005, 0x00e6,
- 0x2071, 0x1844, 0x0c69, 0x00ee, 0x0005, 0x0126, 0x0006, 0x00e6,
- 0x2091, 0x8000, 0x2071, 0x1840, 0x7064, 0x8000, 0x7066, 0x00ee,
- 0x000e, 0x012e, 0x0005, 0x0001, 0x0002, 0x0004, 0x0008, 0x0010,
- 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000,
- 0x2000, 0x4000, 0x8000, 0x8c0a
-};
-#ifdef UNIQUE_FW_NAME
-unsigned short fw2322flx_length01 = 0xce84;
-#else
-unsigned short risc_code_length01 = 0xce84;
-#endif
-
-/*
- *
- */
-
-unsigned long rseqflx_code_addr01 = 0x0001c000 ;
-unsigned short rseqflx_code01[] = {
-0x000b, 0x0003, 0x0000, 0x072a, 0x0001, 0xc000, 0x0008, 0x8064,
- 0x0000, 0x0010, 0x0000, 0x8066, 0x0008, 0x0101, 0x0003, 0xc007,
- 0x0008, 0x80e0, 0x0008, 0xff00, 0x0000, 0x80e2, 0x0008, 0xff00,
- 0x0008, 0x0162, 0x0000, 0x8066, 0x0008, 0xa101, 0x000b, 0xc00f,
- 0x0008, 0x0d02, 0x0000, 0x8060, 0x0000, 0x0400, 0x000b, 0x60af,
- 0x0003, 0x5817, 0x0003, 0x7ac9, 0x0003, 0x5209, 0x000b, 0xc813,
- 0x0009, 0xbac0, 0x0000, 0x008a, 0x0003, 0x8813, 0x0000, 0x15fc,
- 0x000b, 0xb013, 0x0009, 0xc4c0, 0x0000, 0x7000, 0x0001, 0xffa0,
- 0x0000, 0x2000, 0x0003, 0x936d, 0x0008, 0x808c, 0x0000, 0x0001,
- 0x0007, 0x0000, 0x0007, 0x0000, 0x000a, 0x4047, 0x0008, 0x808c,
- 0x0000, 0x0002, 0x0007, 0x0000, 0x0003, 0x082d, 0x0000, 0x4022,
- 0x000b, 0x002e, 0x0008, 0x4122, 0x0002, 0x4447, 0x0003, 0x8b91,
- 0x0008, 0x0bfe, 0x0001, 0x11a0, 0x000b, 0x1373, 0x0001, 0x0ca0,
- 0x000b, 0x1373, 0x0001, 0x9180, 0x0000, 0x0004, 0x0000, 0x8060,
- 0x0000, 0x0400, 0x0008, 0x7f62, 0x0000, 0x8066, 0x0008, 0x0009,
- 0x000b, 0xc03c, 0x0008, 0x808c, 0x0008, 0x0000, 0x0008, 0x0060,
- 0x0008, 0x8062, 0x0000, 0x0004, 0x0000, 0x8066, 0x0000, 0x0411,
- 0x000b, 0xc044, 0x0000, 0x03fe, 0x0001, 0x43e0, 0x0003, 0x8b70,
- 0x0009, 0xc2c0, 0x0008, 0x00ff, 0x0001, 0x02e0, 0x0003, 0x8b70,
- 0x0001, 0x9180, 0x0008, 0x0005, 0x0000, 0x8060, 0x0000, 0x0400,
- 0x0008, 0x7f62, 0x0000, 0x8066, 0x0000, 0x0019, 0x000b, 0xc053,
- 0x0002, 0x0240, 0x000b, 0x0b6d, 0x0008, 0x00fc, 0x0003, 0x3370,
- 0x000a, 0x0244, 0x0003, 0x0865, 0x000c, 0x01e2, 0x0001, 0x9180,
- 0x0000, 0x0007, 0x0008, 0x7f62, 0x0000, 0x8060, 0x0000, 0x0400,
- 0x0002, 0x0234, 0x0008, 0x7f04, 0x0000, 0x8066, 0x0000, 0x040a,
- 0x0003, 0xc064, 0x0000, 0x112a, 0x0008, 0x002e, 0x0008, 0x022c,
- 0x0002, 0x3a44, 0x0003, 0x8813, 0x0008, 0x808c, 0x0000, 0x0002,
- 0x0008, 0x1760, 0x0008, 0x8062, 0x0008, 0x000f, 0x0000, 0x8066,
- 0x0008, 0x0011, 0x000b, 0xc071, 0x0008, 0x01fe, 0x0009, 0x42e0,
- 0x0003, 0x8b62, 0x0000, 0x00fe, 0x0001, 0x43e0, 0x0003, 0x8b62,
- 0x0000, 0x1734, 0x0000, 0x1530, 0x0008, 0x1632, 0x0008, 0x0d2a,
- 0x0001, 0x9880, 0x0008, 0x0012, 0x0000, 0x8060, 0x0000, 0x0400,
- 0x0008, 0x7f62, 0x0000, 0x8066, 0x0008, 0x1e0a, 0x0003, 0xc083,
- 0x0008, 0x808a, 0x0008, 0x0003, 0x0000, 0x1a60, 0x0008, 0x8062,
- 0x0000, 0x0002, 0x000b, 0x5889, 0x0000, 0x8066, 0x0000, 0x3679,
- 0x0003, 0xc08c, 0x0003, 0x588d, 0x0008, 0x8054, 0x0008, 0x0011,
- 0x0000, 0x8074, 0x0008, 0x1010, 0x0008, 0x1efc, 0x0003, 0x3013,
- 0x0004, 0x0096, 0x0003, 0x0013, 0x0000, 0x1c60, 0x0000, 0x1b62,
- 0x0000, 0x8066, 0x0008, 0x0231, 0x000b, 0xc09a, 0x000b, 0x589b,
- 0x0008, 0x0140, 0x0000, 0x0242, 0x0002, 0x1f43, 0x000b, 0x88a5,
- 0x0000, 0x0d44, 0x0008, 0x0d46, 0x0008, 0x0348, 0x0008, 0x044a,
- 0x000b, 0x00a9, 0x0008, 0x0344, 0x0008, 0x0446, 0x0008, 0x0548,
- 0x0000, 0x064a, 0x0003, 0x58a9, 0x0008, 0x8054, 0x0000, 0x0001,
- 0x0000, 0x8074, 0x0008, 0x2020, 0x000f, 0x4000, 0x0000, 0x4820,
- 0x0008, 0x0bfe, 0x0009, 0x10a0, 0x0003, 0x1110, 0x0001, 0x0ca0,
- 0x0003, 0x1110, 0x0000, 0x8060, 0x0000, 0x0400, 0x0009, 0x9080,
- 0x0000, 0x0008, 0x0008, 0x7f62, 0x0000, 0x8066, 0x0008, 0x0009,
- 0x0003, 0xc0bc, 0x0001, 0x80e0, 0x0008, 0x0003, 0x000b, 0x8910,
- 0x0000, 0x49b4, 0x0002, 0x4b4e, 0x000b, 0x8919, 0x0008, 0x808a,
- 0x0000, 0x0004, 0x0000, 0x18fe, 0x0001, 0x10e0, 0x000b, 0x88ca,
- 0x0002, 0x192f, 0x0008, 0x7f32, 0x0008, 0x15fe, 0x0001, 0x10e0,
- 0x000b, 0x88cf, 0x0002, 0x162f, 0x0008, 0x7f2c, 0x0000, 0x8060,
- 0x0000, 0x0400, 0x0009, 0x9080, 0x0000, 0x0007, 0x0008, 0x7f62,
- 0x0000, 0x8066, 0x0008, 0x0009, 0x0003, 0xc0d6, 0x000a, 0x004f,
- 0x000b, 0x8907, 0x000a, 0x0040, 0x000b, 0x08f1, 0x0002, 0x004e,
- 0x000b, 0x08f1, 0x0002, 0x0030, 0x0002, 0x7f2f, 0x0000, 0x7f00,
- 0x0000, 0x8066, 0x0008, 0x000a, 0x000b, 0xc0e2, 0x0008, 0x1010,
- 0x000c, 0x01c9, 0x000b, 0xb0ea, 0x0004, 0x0336, 0x0004, 0x01b3,
- 0x000b, 0x7814, 0x0003, 0x0013, 0x0000, 0x0806, 0x0008, 0x8010,
- 0x0000, 0x001f, 0x0004, 0x0336, 0x0000, 0x0310, 0x0004, 0x0336,
- 0x000b, 0x00e8, 0x000a, 0x002f, 0x0000, 0x7f00, 0x0000, 0x8066,
- 0x0008, 0x000a, 0x000b, 0xc0f5, 0x0004, 0x018c, 0x000a, 0x0040,
- 0x000b, 0x090a, 0x000c, 0x01f9, 0x0000, 0x8000, 0x0000, 0x0002,
- 0x0000, 0x8060, 0x0000, 0x0400, 0x0009, 0x9080, 0x0008, 0x0006,
- 0x0008, 0x7f62, 0x0000, 0x8066, 0x0008, 0x000a, 0x0003, 0xc103,
- 0x0000, 0x8072, 0x0000, 0x4000, 0x000b, 0x00e8, 0x0008, 0x8010,
- 0x0008, 0x001e, 0x0003, 0x010c, 0x0008, 0x8010, 0x0008, 0x001d,
- 0x0004, 0x0336, 0x0008, 0x1010, 0x0004, 0x0336, 0x000b, 0x0014,
- 0x0002, 0x4b4e, 0x0003, 0x0916, 0x0008, 0x808a, 0x0000, 0x0004,
- 0x000b, 0x6116, 0x000f, 0x8000, 0x0008, 0x808a, 0x0000, 0x0004,
- 0x000b, 0x0014, 0x0000, 0x8060, 0x0000, 0x0400, 0x0009, 0x9080,
- 0x0008, 0x0011, 0x0008, 0x7f62, 0x0000, 0x8066, 0x0008, 0x0009,
- 0x000b, 0xc120, 0x000a, 0x004f, 0x0003, 0x897d, 0x0000, 0x8060,
- 0x0000, 0x0400, 0x0009, 0x9080, 0x0008, 0x0005, 0x0008, 0x7f62,
- 0x0000, 0x8066, 0x0008, 0x0009, 0x000b, 0xc12a, 0x0008, 0x0060,
- 0x0008, 0x8062, 0x0000, 0x001f, 0x0000, 0x8066, 0x0000, 0x0209,
- 0x0003, 0xc130, 0x000a, 0x014b, 0x000b, 0x097d, 0x0008, 0x8062,
- 0x0008, 0x000f, 0x0000, 0x8066, 0x0000, 0x0211, 0x000b, 0xc137,
- 0x0008, 0x01fe, 0x0001, 0x02d0, 0x0003, 0x897d, 0x000c, 0x0195,
- 0x000b, 0x097d, 0x0008, 0x03a0, 0x0008, 0x8004, 0x0000, 0x0002,
- 0x0000, 0x8006, 0x0000, 0x0043, 0x0008, 0x4908, 0x0008, 0x808a,
- 0x0000, 0x0004, 0x0000, 0x8060, 0x0000, 0x0400, 0x0009, 0x9080,
- 0x0008, 0x0000, 0x0008, 0x7f62, 0x0000, 0x8066, 0x0008, 0x041a,
- 0x000b, 0xc14c, 0x000b, 0xe14d, 0x0008, 0x4908, 0x0008, 0x480a,
- 0x0008, 0x808a, 0x0000, 0x0004, 0x0008, 0x0060, 0x0008, 0x8062,
- 0x0008, 0x002b, 0x0000, 0x8066, 0x0000, 0x0411, 0x000b, 0xc157,
- 0x0008, 0x04fe, 0x0009, 0x02a0, 0x000b, 0x915e, 0x0002, 0x0500,
- 0x0003, 0x097a, 0x0003, 0x015f, 0x0000, 0x05fe, 0x0001, 0x03a0,
- 0x0003, 0x117a, 0x0000, 0x0d0c, 0x0008, 0x0d0e, 0x0008, 0x0d10,
- 0x0000, 0x0d12, 0x0008, 0x0060, 0x0008, 0x8062, 0x0000, 0x000d,
- 0x0000, 0x8066, 0x0008, 0x0832, 0x0003, 0xc16a, 0x0000, 0x800a,
- 0x0000, 0x8005, 0x0000, 0x8060, 0x0000, 0x0400, 0x0009, 0x9080,
- 0x0008, 0x0011, 0x0008, 0x7f62, 0x0000, 0x8066, 0x0008, 0x0a12,
- 0x0003, 0xc174, 0x0008, 0x5006, 0x0008, 0x100e, 0x000c, 0x01a0,
- 0x000b, 0x7814, 0x0003, 0x0013, 0x0008, 0x0208, 0x0008, 0x030a,
- 0x000b, 0x0161, 0x0004, 0x018c, 0x0008, 0x808a, 0x0000, 0x0004,
- 0x0008, 0x8010, 0x0008, 0x0021, 0x0004, 0x0336, 0x0008, 0x1010,
- 0x0004, 0x0336, 0x0000, 0x4810, 0x0004, 0x0336, 0x0008, 0x4910,
- 0x0004, 0x0336, 0x0008, 0x808a, 0x0000, 0x0004, 0x000b, 0x0014,
- 0x0000, 0x8060, 0x0000, 0x0400, 0x0009, 0x9080, 0x0000, 0x0002,
- 0x0008, 0x7f62, 0x0000, 0x8066, 0x0008, 0xb40a, 0x0003, 0xc193,
- 0x000f, 0x4000, 0x0000, 0x8060, 0x0000, 0x0400, 0x0000, 0x0a62,
- 0x0000, 0x8066, 0x0000, 0x0411, 0x0003, 0xc19a, 0x0002, 0x0210,
- 0x0001, 0xffc0, 0x0000, 0x0007, 0x0009, 0x03e0, 0x000f, 0x4000,
- 0x0000, 0x8060, 0x0000, 0x0400, 0x0001, 0x8380, 0x0000, 0x0002,
- 0x0009, 0x0a80, 0x0008, 0x7f62, 0x0000, 0x8066, 0x0000, 0x0e0a,
- 0x000b, 0xc1a8, 0x0002, 0x0300, 0x0001, 0xffc0, 0x0000, 0x0007,
- 0x0000, 0x7f06, 0x0002, 0x0a00, 0x0008, 0x7f62, 0x0000, 0x8066,
- 0x0008, 0x060a, 0x0003, 0xc1b1, 0x000f, 0x4000, 0x0000, 0x0da0,
- 0x0008, 0x0da2, 0x0008, 0x0da4, 0x0009, 0x8880, 0x0000, 0x0001,
- 0x0008, 0x7f62, 0x0000, 0x8060, 0x0000, 0x0400, 0x0000, 0x8066,
- 0x0008, 0xa012, 0x0000, 0x0da6, 0x0008, 0x0da8, 0x0000, 0x0daa,
- 0x0000, 0x0dac, 0x000b, 0xc1c1, 0x0009, 0x8880, 0x0008, 0x0009,
- 0x0008, 0x7f62, 0x0000, 0x8066, 0x0008, 0xa03a, 0x000b, 0xc1c7,
- 0x000f, 0x4000, 0x0009, 0x8880, 0x0008, 0x0005, 0x0000, 0x8060,
- 0x0000, 0x0400, 0x0008, 0x7f62, 0x0000, 0x8066, 0x0008, 0x0009,
- 0x000b, 0xc1d0, 0x0008, 0x0060, 0x0008, 0x8062, 0x0000, 0x000d,
- 0x0000, 0x8066, 0x0008, 0x0021, 0x000b, 0xc1d6, 0x0000, 0x00fe,
- 0x0001, 0x01d0, 0x000b, 0x89df, 0x0008, 0x02fe, 0x0009, 0x03d0,
- 0x0003, 0x09df, 0x0000, 0x0d06, 0x000f, 0x4000, 0x0000, 0x8006,
- 0x0000, 0x0001, 0x000f, 0x4000, 0x0008, 0x0060, 0x0008, 0x8062,
- 0x0008, 0x002b, 0x0000, 0x8066, 0x0008, 0xa041, 0x0003, 0xc1e7,
- 0x0002, 0x0243, 0x0003, 0x89ee, 0x0000, 0x54ac, 0x0000, 0x55ae,
- 0x0008, 0x0da8, 0x0000, 0x0daa, 0x0000, 0x50b0, 0x0000, 0x51b2,
- 0x0000, 0x0db4, 0x0008, 0x0db6, 0x0008, 0x0060, 0x0008, 0x8062,
- 0x0000, 0x0007, 0x0000, 0x8066, 0x0008, 0xa452, 0x000b, 0xc1f7,
- 0x000f, 0x4000, 0x000a, 0x3945, 0x0003, 0x8a03, 0x0000, 0x8072,
- 0x0008, 0x4040, 0x0007, 0x0000, 0x000a, 0x3945, 0x000b, 0x8a01,
- 0x000f, 0x4000, 0x0000, 0x8072, 0x0000, 0x4000, 0x0007, 0x0000,
- 0x0007, 0x0000, 0x0007, 0x0000, 0x000a, 0x3945, 0x0003, 0x09fb,
- 0x0003, 0x0203, 0x000a, 0x3a40, 0x000b, 0x8817, 0x0001, 0xabd0,
- 0x0008, 0x0000, 0x0000, 0x7f24, 0x0003, 0x5a0e, 0x0008, 0x8054,
- 0x0000, 0x0002, 0x0002, 0x1242, 0x0003, 0x0a54, 0x000a, 0x3a45,
- 0x0003, 0x0a43, 0x000a, 0x1e10, 0x0000, 0x7f3c, 0x0003, 0x0a40,
- 0x0002, 0x1d00, 0x0000, 0x7f3a, 0x0000, 0x0d60, 0x0008, 0x7f62,
- 0x0000, 0x8066, 0x0008, 0x0009, 0x0003, 0xc21e, 0x0008, 0x00fc,
- 0x0003, 0xb23d, 0x0000, 0x1c60, 0x0008, 0x8062, 0x0000, 0x0001,
- 0x0000, 0x8066, 0x0008, 0x0009, 0x000b, 0xc226, 0x0008, 0x00fc,
- 0x000b, 0x334b, 0x0000, 0x0038, 0x0008, 0x0060, 0x0008, 0x8062,
- 0x0000, 0x0019, 0x0000, 0x8066, 0x0008, 0x0009, 0x000b, 0xc22f,
- 0x0009, 0x80c0, 0x0008, 0x00ff, 0x0008, 0x7f3e, 0x0000, 0x0d60,
- 0x0008, 0x0efe, 0x0001, 0x1f80, 0x0008, 0x7f62, 0x0000, 0x8066,
- 0x0008, 0x0009, 0x0003, 0xc239, 0x0008, 0x003a, 0x0000, 0x1dfe,
- 0x000b, 0x021a, 0x0008, 0x0036, 0x0004, 0x0096, 0x000b, 0x0254,
- 0x0000, 0x8074, 0x0000, 0x2000, 0x000b, 0x0254, 0x0002, 0x3a44,
- 0x000b, 0x0b76, 0x0000, 0x8074, 0x0000, 0x1000, 0x0001, 0xadd0,
- 0x0008, 0x0000, 0x0008, 0x7f0e, 0x0003, 0xb348, 0x0001, 0xa7d0,
- 0x0008, 0x0000, 0x0000, 0x7f00, 0x0009, 0xa6d0, 0x0008, 0x0000,
- 0x0009, 0x00d0, 0x000b, 0x8a64, 0x0000, 0x8074, 0x0008, 0x4040,
- 0x0003, 0x5a54, 0x0003, 0x5209, 0x000a, 0x3a46, 0x000b, 0x8a64,
- 0x0002, 0x3a47, 0x000b, 0x0a5f, 0x0008, 0x8054, 0x0000, 0x0004,
- 0x0000, 0x8074, 0x0000, 0x8000, 0x0003, 0x02bd, 0x0009, 0x92c0,
- 0x0000, 0x0fc8, 0x000b, 0x0813, 0x000a, 0x1246, 0x000b, 0x8b42,
- 0x0000, 0x1a60, 0x0008, 0x8062, 0x0000, 0x0002, 0x0000, 0x8066,
- 0x0000, 0x367a, 0x0003, 0xc269, 0x0009, 0x92c0, 0x0008, 0x0780,
- 0x000b, 0x8b5c, 0x0002, 0x124b, 0x000b, 0x0a72, 0x0002, 0x2e4d,
- 0x0002, 0x2e4d, 0x0003, 0x0b48, 0x000a, 0x3a46, 0x000b, 0x8a7f,
- 0x000b, 0x5a74, 0x0008, 0x8054, 0x0000, 0x0004, 0x000a, 0x1243,
- 0x000b, 0x0abb, 0x0008, 0x8010, 0x0000, 0x000d, 0x0004, 0x0336,
- 0x0000, 0x1810, 0x0004, 0x0336, 0x0003, 0x02bb, 0x000a, 0x194d,
- 0x0003, 0x0a83, 0x000a, 0x1243, 0x000b, 0x0b52, 0x0003, 0x5a83,
- 0x0008, 0x8054, 0x0000, 0x0004, 0x000a, 0x192e, 0x0008, 0x7f32,
- 0x000a, 0x1947, 0x0003, 0x0ab5, 0x0002, 0x194f, 0x000b, 0x0a93,
- 0x0004, 0x032b, 0x0000, 0x1810, 0x000c, 0x01c9, 0x0003, 0xb2ae,
- 0x0004, 0x0336, 0x0004, 0x01b3, 0x0003, 0x02bb, 0x0000, 0x1a60,
- 0x0008, 0x8062, 0x0000, 0x001f, 0x0000, 0x8066, 0x0008, 0x0009,
- 0x000b, 0xc298, 0x000a, 0x004c, 0x000b, 0x8ab5, 0x0000, 0x8060,
- 0x0000, 0x0400, 0x0001, 0x9880, 0x0000, 0x0007, 0x0008, 0x7f62,
- 0x0000, 0x8066, 0x0000, 0x320a, 0x000b, 0xc2a2, 0x0000, 0x8060,
- 0x0000, 0x0400, 0x0001, 0x9880, 0x0008, 0x0012, 0x0008, 0x7f62,
- 0x0000, 0x8066, 0x0008, 0x1e0a, 0x0003, 0xc2aa, 0x0000, 0x1826,
- 0x0000, 0x1928, 0x0003, 0x02bb, 0x0000, 0x0806, 0x0008, 0x8010,
- 0x0000, 0x001f, 0x0004, 0x0336, 0x0000, 0x0310, 0x0004, 0x0336,
- 0x0003, 0x02bb, 0x0004, 0x032b, 0x0008, 0x8010, 0x0000, 0x0001,
- 0x0004, 0x0336, 0x0000, 0x1810, 0x0004, 0x0336, 0x0000, 0x8074,
- 0x0008, 0xf000, 0x0000, 0x0d30, 0x0002, 0x3a42, 0x0003, 0x8ac3,
- 0x0000, 0x15fc, 0x0003, 0xb06a, 0x0003, 0x0013, 0x0000, 0x8074,
- 0x0000, 0x0501, 0x0008, 0x8010, 0x0008, 0x000c, 0x0004, 0x0336,
- 0x0003, 0x0013, 0x0009, 0xbbe0, 0x0008, 0x0030, 0x000b, 0x8adf,
- 0x0000, 0x18fe, 0x0009, 0x3ce0, 0x0003, 0x0adc, 0x0008, 0x15fe,
- 0x0009, 0x3ce0, 0x0003, 0x0adc, 0x0008, 0x13fe, 0x0009, 0x3ce0,
- 0x0003, 0x8ad8, 0x0004, 0x0324, 0x0008, 0x0d26, 0x000b, 0x02d9,
- 0x000c, 0x0326, 0x0008, 0x8076, 0x0000, 0x0040, 0x000b, 0x0321,
- 0x0008, 0x8076, 0x0008, 0x0041, 0x000b, 0x0321, 0x0009, 0xbbe0,
- 0x0000, 0x0032, 0x0003, 0x8ae4, 0x0008, 0x3c1e, 0x000b, 0x0321,
- 0x0009, 0xbbe0, 0x0000, 0x0037, 0x000b, 0x8b06, 0x0000, 0x18fe,
- 0x0009, 0x3ce0, 0x000b, 0x8adc, 0x0008, 0x8076, 0x0000, 0x0040,
- 0x0000, 0x1a60, 0x0008, 0x8062, 0x0000, 0x000d, 0x0009, 0xa6d0,
- 0x0008, 0x0000, 0x0008, 0x7f04, 0x0001, 0xa7d0, 0x0008, 0x0000,
- 0x0000, 0x7f06, 0x0001, 0xa8d0, 0x0008, 0x0000, 0x0008, 0x7f08,
- 0x0009, 0xa9d0, 0x0008, 0x0000, 0x0000, 0x7f0a, 0x0000, 0x8066,
- 0x0000, 0x0422, 0x000b, 0xc2fd, 0x0004, 0x032b, 0x0008, 0x8054,
- 0x0000, 0x0004, 0x0000, 0x8074, 0x0008, 0xf000, 0x0000, 0x8072,
- 0x0000, 0x8000, 0x0003, 0x02bd, 0x0009, 0xbbe0, 0x0000, 0x0038,
- 0x000b, 0x8b18, 0x0000, 0x18fe, 0x0009, 0x3ce0, 0x000b, 0x0b15,
- 0x0008, 0x15fe, 0x0009, 0x3ce0, 0x0003, 0x8ad2, 0x000c, 0x0326,
- 0x0008, 0x8076, 0x0000, 0x0040, 0x0000, 0x8072, 0x0000, 0x8000,
- 0x0003, 0x036d, 0x0008, 0x8076, 0x0008, 0x0042, 0x000b, 0x0321,
- 0x0009, 0xbbe0, 0x0000, 0x0016, 0x000b, 0x8b21, 0x0002, 0x3a44,
- 0x0003, 0x8816, 0x0000, 0x8072, 0x0000, 0x8000, 0x000f, 0x8000,
- 0x0003, 0x0013, 0x0000, 0x8072, 0x0000, 0x8000, 0x0003, 0x0013,
- 0x0002, 0x1430, 0x000b, 0x0327, 0x000a, 0x3d30, 0x0000, 0x7f00,
- 0x0001, 0xbc80, 0x0000, 0x0007, 0x0003, 0x032f, 0x000a, 0x1930,
- 0x0000, 0x7f00, 0x0001, 0x9880, 0x0000, 0x0007, 0x0000, 0x8060,
- 0x0000, 0x0400, 0x0008, 0x7f62, 0x0000, 0x8066, 0x0008, 0x000a,
- 0x0003, 0xc334, 0x000f, 0x4000, 0x0003, 0x2336, 0x0008, 0x0870,
- 0x000f, 0x4000, 0x0009, 0xbac0, 0x0008, 0x0090, 0x0003, 0x0b3f,
- 0x0000, 0x8074, 0x0000, 0x0706, 0x000b, 0x0341, 0x0000, 0x8074,
- 0x0000, 0x0703, 0x000f, 0x4000, 0x0008, 0x8010, 0x0000, 0x0023,
- 0x000b, 0x037b, 0x0008, 0x8010, 0x0000, 0x0008, 0x000b, 0x037b,
- 0x0008, 0x8010, 0x0008, 0x0022, 0x000b, 0x037b, 0x0004, 0x032b,
- 0x0008, 0x8010, 0x0000, 0x0007, 0x0004, 0x0336, 0x0000, 0x1810,
- 0x0004, 0x0336, 0x0003, 0x0385, 0x0004, 0x032b, 0x0008, 0x8010,
- 0x0008, 0x001b, 0x0004, 0x0336, 0x0000, 0x1810, 0x0004, 0x0336,
- 0x0000, 0x8074, 0x0000, 0xf080, 0x0000, 0x0d30, 0x0003, 0x0013,
- 0x0008, 0x8010, 0x0008, 0x0009, 0x000b, 0x037b, 0x0008, 0x8010,
- 0x0008, 0x0005, 0x000b, 0x037b, 0x0008, 0x808c, 0x0000, 0x0001,
- 0x0007, 0x0000, 0x0008, 0x8010, 0x0000, 0x0004, 0x000a, 0x4143,
- 0x0003, 0x0878, 0x0002, 0x3a44, 0x0003, 0x8813, 0x0008, 0x0d2a,
- 0x000b, 0x037b, 0x0008, 0x8010, 0x0008, 0x0003, 0x000b, 0x037d,
- 0x0008, 0x8010, 0x0000, 0x000b, 0x000b, 0x037d, 0x0008, 0x8010,
- 0x0000, 0x0002, 0x000b, 0x037d, 0x0002, 0x3a47, 0x000b, 0x8a54,
- 0x0008, 0x8010, 0x0008, 0x0006, 0x000b, 0x037d, 0x0000, 0x8074,
- 0x0008, 0xf000, 0x0004, 0x0336, 0x0004, 0x0339, 0x000a, 0x3a40,
- 0x000b, 0x0813, 0x0008, 0x8010, 0x0008, 0x000c, 0x0004, 0x0336,
- 0x0003, 0x0013, 0x0000, 0x8074, 0x0000, 0xf080, 0x0000, 0x0d30,
- 0x0002, 0x2e4d, 0x0002, 0x2e4d, 0x0003, 0x0b8e, 0x0008, 0x8054,
- 0x0000, 0x0019, 0x0003, 0x0013, 0x0008, 0x8054, 0x0008, 0x0009,
- 0x0003, 0x0013, 0x0002, 0x3a44, 0x0003, 0x8813, 0x0003, 0x0370,
- 0xed0b, 0x60bf
-};
-unsigned short rseqflx_code_length01 = 0x072a;
-/*
- *
- */
-
-unsigned long xseqflx_code_addr01 = 0x0001e000 ;
-unsigned short xseqflx_code01[] = {
-0x0013, 0x0003, 0x0000, 0x1036, 0x0001, 0xe000, 0x0005, 0x0032,
- 0x0000, 0x0010, 0x0015, 0x0033, 0x0010, 0xbb39, 0x000b, 0x8007,
- 0x0004, 0x0107, 0x0004, 0x0119, 0x0010, 0xc000, 0x0000, 0xc001,
- 0x0000, 0xc0b0, 0x0010, 0xc0b1, 0x0010, 0xc0b2, 0x0000, 0xc0b3,
- 0x0010, 0xc0b4, 0x0000, 0xc0b5, 0x0000, 0xc0b6, 0x0010, 0xc0b7,
- 0x0010, 0xc0b8, 0x0000, 0xc0b9, 0x0000, 0xc0ba, 0x0000, 0xc0c2,
- 0x0010, 0xc0c3, 0x0000, 0xc0c4, 0x0010, 0xc0c5, 0x0010, 0xc0c6,
- 0x0000, 0xc0c7, 0x0000, 0xc0c8, 0x0010, 0xc0c9, 0x0010, 0xc0ca,
- 0x0000, 0xc0cb, 0x0010, 0xc0cc, 0x0000, 0xc0cd, 0x0000, 0xc0ce,
- 0x0010, 0xc0cf, 0x0015, 0x0039, 0x0010, 0xff00, 0x0015, 0x003a,
- 0x0010, 0xff00, 0x0005, 0x00d0, 0x0010, 0xff00, 0x0015, 0x00d1,
- 0x0010, 0xff00, 0x0012, 0x3a40, 0x000b, 0x1031, 0x0002, 0x7940,
- 0x000b, 0x112b, 0x0002, 0x3a42, 0x001b, 0x1035, 0x0003, 0xb035,
- 0x0003, 0xa1d1, 0x0002, 0x3a41, 0x001b, 0x1039, 0x0012, 0x7941,
- 0x001b, 0x1306, 0x0013, 0xe051, 0x0012, 0xd042, 0x0003, 0x103f,
- 0x0000, 0x75ff, 0x0002, 0xff41, 0x000b, 0x1051, 0x0000, 0x0cfe,
- 0x0013, 0x6047, 0x0011, 0x02e8, 0x0010, 0x0000, 0x0003, 0x1390,
- 0x0011, 0x02e8, 0x0010, 0x0005, 0x0013, 0x141d, 0x0012, 0xd042,
- 0x0013, 0x104c, 0x0000, 0x75ff, 0x0012, 0xff40, 0x000b, 0x1051,
- 0x0000, 0x12fe, 0x0003, 0x6051, 0x0001, 0x0fe8, 0x0010, 0x0000,
- 0x0013, 0x160e, 0x0015, 0x0030, 0x0000, 0x0400, 0x0010, 0xc131,
- 0x0015, 0x0033, 0x0010, 0xb211, 0x001b, 0x8056, 0x0010, 0xb2ff,
- 0x0001, 0xb3e0, 0x000c, 0x10c9, 0x000b, 0xf02d, 0x0011, 0x3be8,
- 0x0000, 0x0010, 0x000b, 0x106e, 0x0000, 0x0afe, 0x001b, 0x6062,
- 0x0000, 0x3c0b, 0x0013, 0x006a, 0x0015, 0x0030, 0x0000, 0x0400,
- 0x0001, 0x0a88, 0x0010, 0x0003, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0010, 0x3c0a, 0x001b, 0x8069, 0x0010, 0x3c0a, 0x0002, 0x0c00,
- 0x0010, 0xff0c, 0x0013, 0x00c6, 0x0011, 0x3be8, 0x0010, 0x0012,
- 0x001b, 0x1081, 0x0010, 0x08fe, 0x001b, 0x6075, 0x0010, 0x3c09,
- 0x0013, 0x007d, 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0888,
- 0x0010, 0x0003, 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0x3c0a,
- 0x000b, 0x807c, 0x0000, 0x3c08, 0x0002, 0x0c00, 0x0010, 0xff0c,
- 0x0013, 0x00c6, 0x0011, 0x3be8, 0x0000, 0x0013, 0x001b, 0x1087,
- 0x0000, 0x3cb0, 0x0014, 0x00d9, 0x0013, 0x00c6, 0x0011, 0x3be8,
- 0x0000, 0x0019, 0x001b, 0x109a, 0x0010, 0x04fe, 0x000b, 0x608e,
- 0x0010, 0x3c05, 0x0013, 0x0096, 0x0015, 0x0030, 0x0000, 0x0400,
- 0x0011, 0x0488, 0x0010, 0x0003, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0010, 0x3c0a, 0x001b, 0x8095, 0x0000, 0x3c04, 0x0002, 0x0c00,
- 0x0010, 0xff0c, 0x0013, 0x00c6, 0x0011, 0x3be8, 0x0000, 0x0015,
- 0x001b, 0x10a6, 0x0004, 0x0110, 0x0014, 0x0122, 0x0015, 0x0039,
- 0x0000, 0x8000, 0x0017, 0x8000, 0x0004, 0x0107, 0x0004, 0x0119,
- 0x0014, 0x00f2, 0x0013, 0x002d, 0x0011, 0x3be8, 0x0000, 0x0016,
- 0x001b, 0x10b8, 0x0001, 0x0fe8, 0x0010, 0x0000, 0x0003, 0x10b2,
- 0x0001, 0x0fe8, 0x0000, 0x0002, 0x0003, 0x10b2, 0x0015, 0x0039,
- 0x0010, 0x1010, 0x0013, 0x00c6, 0x0015, 0x0039, 0x0000, 0x5040,
- 0x0015, 0x00b8, 0x0000, 0x0008, 0x0014, 0x0817, 0x0013, 0x00c6,
- 0x0011, 0x3be8, 0x0010, 0x0017, 0x001b, 0x10bd, 0x0010, 0x3cc3,
- 0x0013, 0x00c6, 0x0011, 0x3be8, 0x0010, 0x0018, 0x000b, 0x10c2,
- 0x0000, 0x3cc2, 0x0013, 0x00c6, 0x0005, 0x00ce, 0x0000, 0x0001,
- 0x0000, 0x3bcf, 0x0004, 0x07d9, 0x0015, 0x0039, 0x0000, 0x8000,
- 0x0013, 0x002d, 0x0001, 0xb288, 0x0000, 0x0002, 0x0001, 0xc180,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x80cf,
- 0x0002, 0xb200, 0x0011, 0xffc8, 0x0000, 0x0007, 0x0010, 0xffb2,
- 0x0010, 0xc131, 0x0015, 0x0033, 0x0010, 0xb20a, 0x0001, 0xb0d0,
- 0x001b, 0x80d8, 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0xb088,
- 0x0000, 0x0010, 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0xb109,
- 0x000b, 0x80e0, 0x0001, 0xb1e8, 0x0010, 0xffff, 0x0013, 0x10f1,
- 0x0000, 0x11fe, 0x000b, 0x60e8, 0x0000, 0xb012, 0x0013, 0x00f0,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0001, 0x1188, 0x0010, 0x0003,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb00a, 0x000b, 0x80ef,
- 0x0000, 0xb011, 0x0017, 0x4000, 0x0015, 0x0030, 0x0000, 0x0400,
- 0x0011, 0xbc88, 0x0010, 0x001e, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0000, 0xc411, 0x001b, 0x80f9, 0x0011, 0xbc88, 0x0010, 0x0017,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0xc609, 0x001b, 0x80ff,
- 0x0011, 0xbc88, 0x0010, 0x0036, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0000, 0xc709, 0x000b, 0x8105, 0x0017, 0x4000, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0001, 0xbb88, 0x0000, 0x0001, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0000, 0x0269, 0x001b, 0x810e, 0x0017, 0x4000,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0001, 0xbb88, 0x0000, 0x0001,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0x026a, 0x000b, 0x8117,
- 0x0017, 0x4000, 0x0015, 0x0030, 0x0000, 0x0400, 0x0001, 0xbb88,
- 0x0010, 0x000f, 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0x0f59,
- 0x001b, 0x8120, 0x0017, 0x4000, 0x0015, 0x0030, 0x0000, 0x0400,
- 0x0001, 0xbb88, 0x0010, 0x000f, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0010, 0x0f5a, 0x001b, 0x8129, 0x0017, 0x4000, 0x0000, 0xd0ff,
- 0x0012, 0xff40, 0x000b, 0x1031, 0x0015, 0x00d1, 0x0010, 0x0101,
- 0x0003, 0x9130, 0x0005, 0x0079, 0x0000, 0x0001, 0x0003, 0x9133,
- 0x0015, 0x00d1, 0x0000, 0x0100, 0x0011, 0x02e8, 0x0000, 0x0002,
- 0x0013, 0x1156, 0x0011, 0x02e8, 0x0000, 0x0001, 0x0003, 0x116e,
- 0x0011, 0x02e8, 0x0000, 0x0004, 0x0003, 0x118c, 0x0011, 0x02e8,
- 0x0010, 0x0003, 0x0013, 0x11bd, 0x0005, 0x0002, 0x0010, 0x0000,
- 0x0000, 0xc00e, 0x0000, 0xc00d, 0x0010, 0xc003, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0001, 0xbd88, 0x0010, 0x0009, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0010, 0xc00a, 0x000b, 0x814e, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0010, 0xc00a, 0x001b, 0x8152, 0x0012, 0xd042,
- 0x0013, 0x1031, 0x0003, 0x004c, 0x0012, 0x7849, 0x0003, 0x11cb,
- 0x0010, 0x0dfe, 0x0003, 0x6144, 0x0012, 0x0c10, 0x0010, 0xff0c,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0010, 0x0003,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb309, 0x000b, 0x8163,
- 0x0010, 0xb3fe, 0x0013, 0x616b, 0x0010, 0xb30b, 0x0015, 0x0033,
- 0x0010, 0xc00a, 0x000b, 0x8169, 0x0003, 0x01c0, 0x0000, 0xc00b,
- 0x0010, 0xc00a, 0x0003, 0x01c0, 0x0000, 0x78b0, 0x0012, 0xb044,
- 0x0003, 0x11cb, 0x0002, 0xb049, 0x0003, 0x11cb, 0x0010, 0x71ff,
- 0x0012, 0xff38, 0x0010, 0xff71, 0x0010, 0x0dfe, 0x0003, 0x6142,
- 0x0012, 0x0c10, 0x0010, 0xff0c, 0x0015, 0x0030, 0x0000, 0x0400,
- 0x0011, 0x0d88, 0x0010, 0x0003, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0000, 0xb309, 0x000b, 0x8181, 0x0010, 0xb3fe, 0x0013, 0x6189,
- 0x0000, 0xb309, 0x0015, 0x0033, 0x0010, 0xc00a, 0x000b, 0x8187,
- 0x0003, 0x01c0, 0x0010, 0xc009, 0x0000, 0xc008, 0x0003, 0x01c0,
- 0x0000, 0x78b0, 0x0012, 0xb044, 0x0003, 0x11cb, 0x0002, 0xb049,
- 0x0003, 0x11cb, 0x0010, 0x71ff, 0x0012, 0xff38, 0x0010, 0xff71,
- 0x0010, 0x0dfe, 0x0003, 0x6142, 0x0012, 0x0c10, 0x0010, 0xff0c,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0010, 0x0003,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb309, 0x000b, 0x819f,
- 0x0010, 0xb3fe, 0x0013, 0x61a7, 0x0000, 0xb305, 0x0015, 0x0033,
- 0x0010, 0xc00a, 0x000b, 0x81a5, 0x0003, 0x01a9, 0x0010, 0xc005,
- 0x0000, 0xc004, 0x0002, 0x033f, 0x0002, 0xff27, 0x0000, 0x0db8,
- 0x0014, 0x0385, 0x0000, 0x0db8, 0x0014, 0x0817, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0011, 0xbc88, 0x0010, 0x0000, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0000, 0xb309, 0x001b, 0x81b6, 0x0011, 0xb3e8,
- 0x0000, 0x0002, 0x000b, 0x1142, 0x0005, 0x0002, 0x0010, 0x0005,
- 0x0003, 0x0144, 0x0012, 0x7849, 0x0003, 0x11cb, 0x0003, 0x0144,
- 0x0000, 0x0db8, 0x0012, 0x0345, 0x000b, 0x11c6, 0x0002, 0x033f,
- 0x0014, 0x0385, 0x0003, 0x0142, 0x0002, 0x033f, 0x0002, 0xff27,
- 0x0014, 0x0385, 0x0014, 0x0817, 0x0003, 0x0142, 0x0015, 0x00b8,
- 0x0000, 0x0001, 0x0015, 0x003a, 0x0010, 0x0101, 0x0014, 0x0817,
- 0x0003, 0x0153, 0x0001, 0x2bd8, 0x0010, 0x0000, 0x0000, 0xffba,
- 0x0013, 0xb1d4, 0x0005, 0x002a, 0x0000, 0x0002, 0x0001, 0xbac8,
- 0x0000, 0x0700, 0x001b, 0x12c1, 0x0011, 0x15e8, 0x0000, 0x0002,
- 0x0003, 0x1237, 0x0011, 0x15e8, 0x0000, 0x0001, 0x0003, 0x11e3,
- 0x0005, 0x0015, 0x0010, 0x0000, 0x0013, 0x021a, 0x0005, 0x0015,
- 0x0010, 0x0000, 0x0002, 0xba43, 0x0013, 0x121b, 0x0013, 0xb1e7,
- 0x0005, 0x002a, 0x0000, 0x0004, 0x0012, 0xba42, 0x0013, 0x1221,
- 0x0012, 0x104b, 0x001b, 0x121a, 0x0000, 0x1a30, 0x0005, 0x0031,
- 0x0000, 0x0002, 0x0015, 0x0033, 0x0000, 0x1b2a, 0x000b, 0x81f3,
- 0x0011, 0x20d8, 0x0010, 0x0000, 0x0000, 0xffb0, 0x0001, 0x21d8,
- 0x0010, 0x0000, 0x0010, 0xffb1, 0x0001, 0x22d8, 0x0010, 0x0000,
- 0x0010, 0xffb2, 0x0011, 0x23d8, 0x0010, 0x0000, 0x0000, 0xffb3,
- 0x0001, 0x24d8, 0x0010, 0x0000, 0x0010, 0xffb4, 0x0011, 0x25d8,
- 0x0010, 0x0000, 0x0000, 0xffb5, 0x0001, 0x28d8, 0x0010, 0x0000,
- 0x0010, 0xffb8, 0x0011, 0x29d8, 0x0010, 0x0000, 0x0000, 0xffb9,
- 0x0000, 0x1a30, 0x0005, 0x0031, 0x0000, 0x0007, 0x0015, 0x0033,
- 0x0010, 0xb032, 0x000b, 0x8211, 0x0000, 0x1a30, 0x0005, 0x0031,
- 0x0010, 0x000f, 0x0015, 0x0033, 0x0010, 0xb812, 0x000b, 0x8217,
- 0x0005, 0x0015, 0x0010, 0x0000, 0x0013, 0x0035, 0x0000, 0x1efe,
- 0x0013, 0x622f, 0x0014, 0x0266, 0x0000, 0x1efe, 0x000c, 0x6266,
- 0x0013, 0x021a, 0x0000, 0x1a30, 0x0005, 0x0031, 0x0000, 0x0020,
- 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x8226, 0x0002, 0xb02f,
- 0x0000, 0xffb0, 0x0005, 0x0031, 0x0000, 0x0020, 0x0015, 0x0033,
- 0x0000, 0xb00a, 0x000b, 0x822d, 0x0003, 0x01ee, 0x0015, 0x00b8,
- 0x0010, 0x0005, 0x0014, 0x0817, 0x0000, 0x13b8, 0x0015, 0x003a,
- 0x0010, 0x0404, 0x0014, 0x0817, 0x0013, 0x021a, 0x0005, 0x0015,
- 0x0000, 0x0001, 0x0012, 0xba42, 0x0003, 0x1245, 0x0003, 0xb23b,
- 0x0001, 0x2bd8, 0x0010, 0x0000, 0x0012, 0xff4f, 0x000b, 0x11d1,
- 0x0002, 0xba43, 0x000b, 0x1221, 0x0000, 0x1efe, 0x000c, 0x6266,
- 0x0013, 0x021a, 0x0001, 0x28d8, 0x0010, 0x0000, 0x0010, 0xffb8,
- 0x0011, 0x29d8, 0x0010, 0x0000, 0x0000, 0xffb9, 0x0014, 0x02d7,
- 0x0002, 0x3a42, 0x001b, 0x121a, 0x0000, 0x1c30, 0x0015, 0x00ff,
- 0x0000, 0x0002, 0x0002, 0x1f43, 0x000b, 0x1256, 0x0001, 0xff88,
- 0x0000, 0x0002, 0x0013, 0x0258, 0x0001, 0xff88, 0x0000, 0x0004,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb011, 0x001b, 0x825b,
- 0x0000, 0xb0ff, 0x0011, 0x16a0, 0x0000, 0xff16, 0x001b, 0x2262,
- 0x0002, 0xb100, 0x0003, 0x0263, 0x0010, 0xb1ff, 0x0001, 0x17a0,
- 0x0010, 0xff17, 0x0003, 0x0221, 0x0000, 0x16ff, 0x0001, 0x18a0,
- 0x0010, 0xff00, 0x001b, 0x226d, 0x0002, 0x1700, 0x0013, 0x12c0,
- 0x0013, 0x026e, 0x0010, 0x17ff, 0x0011, 0x19a0, 0x0013, 0x22c0,
- 0x0011, 0x00d0, 0x0013, 0x12c0, 0x0000, 0x1c30, 0x0000, 0x1b31,
- 0x0015, 0x0033, 0x0000, 0xb131, 0x001b, 0x8276, 0x0013, 0xb277,
- 0x0000, 0xb120, 0x0010, 0xb221, 0x0002, 0x1f43, 0x001b, 0x1283,
- 0x0010, 0xc022, 0x0000, 0xc023, 0x0000, 0xb324, 0x0000, 0xb425,
- 0x0010, 0xb3b5, 0x0000, 0xb4b6, 0x0003, 0x0287, 0x0000, 0xb322,
- 0x0000, 0xb423, 0x0000, 0xb524, 0x0010, 0xb625, 0x0013, 0xb287,
- 0x0005, 0x002a, 0x0000, 0x0001, 0x0012, 0x1500, 0x0000, 0xff15,
- 0x0000, 0x16ff, 0x0001, 0xb580, 0x0000, 0xff16, 0x001b, 0x2292,
- 0x0002, 0x1700, 0x0003, 0x0293, 0x0010, 0x17ff, 0x0001, 0xb680,
- 0x0010, 0xff17, 0x0012, 0x1e10, 0x0010, 0xff1e, 0x0003, 0x62c0,
- 0x0002, 0x1d00, 0x0010, 0xff1d, 0x0010, 0xc030, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x829e, 0x0010, 0xb0fe,
- 0x000b, 0x62bf, 0x0000, 0x1c30, 0x0005, 0x0031, 0x0000, 0x0001,
- 0x0015, 0x0033, 0x0000, 0xb009, 0x000b, 0x82a6, 0x0010, 0xb0fe,
- 0x001b, 0x62ac, 0x0005, 0x00ce, 0x0010, 0x0005, 0x0013, 0x07d9,
- 0x0010, 0xb01c, 0x0000, 0x1c30, 0x0005, 0x0031, 0x0000, 0x0019,
- 0x0015, 0x0033, 0x0000, 0xb009, 0x000b, 0x82b2, 0x0001, 0xb0c8,
- 0x0010, 0x00ff, 0x0000, 0xff1f, 0x0010, 0xc030, 0x0011, 0xbe80,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb009, 0x000b, 0x82bb,
- 0x0000, 0xb01d, 0x0010, 0x1dff, 0x0003, 0x029a, 0x0000, 0xb01b,
- 0x0017, 0x4000, 0x0002, 0x3a41, 0x0013, 0x12c9, 0x0013, 0xb2c3,
- 0x0005, 0x002a, 0x0000, 0x0004, 0x0005, 0x0015, 0x0010, 0x0000,
- 0x0013, 0x021a, 0x0000, 0x1a30, 0x0005, 0x0031, 0x0000, 0x0002,
- 0x0015, 0x0033, 0x0000, 0x1b2a, 0x001b, 0x82ce, 0x0015, 0x00b8,
- 0x0000, 0x0004, 0x0014, 0x0817, 0x0000, 0x13b8, 0x0015, 0x003a,
- 0x0010, 0x0404, 0x0014, 0x0817, 0x0013, 0x0039, 0x0002, 0x1e00,
- 0x0010, 0xff1e, 0x0012, 0x1d10, 0x0010, 0xff1d, 0x0010, 0xc030,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x82df,
- 0x0010, 0xb0fe, 0x001b, 0x6304, 0x0000, 0x1cff, 0x0001, 0x1ae0,
- 0x0013, 0x12ee, 0x0000, 0x1c30, 0x0005, 0x0031, 0x0010, 0x0000,
- 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x82ea, 0x0010, 0xb0fe,
- 0x001b, 0x62ee, 0x0000, 0x1aff, 0x0000, 0xff1c, 0x0000, 0x1c30,
- 0x0005, 0x0031, 0x0000, 0x0019, 0x0015, 0x0033, 0x0000, 0xb009,
- 0x001b, 0x82f4, 0x0001, 0xb0c8, 0x0010, 0x000f, 0x0000, 0xff1f,
- 0x0001, 0xbf80, 0x0010, 0xff1d, 0x0010, 0xc030, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x82fe, 0x0010, 0xb0fe,
- 0x001b, 0x6304, 0x0005, 0x00ce, 0x0010, 0x0006, 0x0013, 0x07d9,
- 0x0000, 0xb01b, 0x0017, 0x4000, 0x0010, 0x79b0, 0x0000, 0xd0ff,
- 0x0012, 0xff40, 0x001b, 0x1039, 0x0015, 0x00d1, 0x0010, 0x0101,
- 0x0013, 0x930c, 0x0005, 0x0079, 0x0000, 0x0002, 0x0013, 0x930f,
- 0x0015, 0x00d1, 0x0000, 0x0100, 0x0010, 0x13fe, 0x0013, 0x6344,
- 0x0012, 0xb04e, 0x000b, 0x135d, 0x0012, 0x784a, 0x0003, 0x1363,
- 0x0000, 0x75ff, 0x0011, 0xffc8, 0x0010, 0x1800, 0x001b, 0x1363,
- 0x0001, 0x0fe8, 0x0000, 0x0001, 0x001b, 0x1328, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0011, 0x1388, 0x0000, 0x000e, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0000, 0x8f0a, 0x000b, 0x8326, 0x0013, 0x0369,
- 0x0001, 0x0fe8, 0x0000, 0x0002, 0x001b, 0x1333, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0005, 0x0031, 0x0000, 0x001a, 0x0015, 0x0033,
- 0x0010, 0xc00a, 0x000b, 0x8331, 0x0013, 0x0369, 0x0001, 0x0fe8,
- 0x0010, 0x0000, 0x0003, 0x133a, 0x0005, 0x00ce, 0x0000, 0x0007,
- 0x0010, 0x0fcf, 0x0013, 0x07d3, 0x0000, 0x13b8, 0x0002, 0x1045,
- 0x0003, 0x1342, 0x0012, 0x103f, 0x0002, 0xff27, 0x0014, 0x0385,
- 0x0014, 0x0817, 0x0013, 0x0344, 0x0012, 0x103f, 0x0014, 0x0385,
- 0x0015, 0x000f, 0x0010, 0x0000, 0x0002, 0x3944, 0x0003, 0x134d,
- 0x0015, 0x0039, 0x0000, 0x5040, 0x0015, 0x00b8, 0x0000, 0x0008,
- 0x0014, 0x0817, 0x0015, 0x0030, 0x0000, 0x0400, 0x0001, 0xbd88,
- 0x0010, 0x000c, 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0xc00a,
- 0x000b, 0x8354, 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0xc00a,
- 0x000b, 0x8358, 0x0010, 0xc014, 0x0000, 0xc013, 0x0000, 0xc010,
- 0x0013, 0x0039, 0x0015, 0x00b8, 0x0010, 0x0003, 0x0015, 0x003a,
- 0x0010, 0x0202, 0x0014, 0x0817, 0x0013, 0x035c, 0x0015, 0x00b8,
- 0x0000, 0x0002, 0x0015, 0x003a, 0x0010, 0x0202, 0x0014, 0x0817,
- 0x0013, 0x035c, 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x1388,
- 0x0010, 0x0003, 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb009,
- 0x000b, 0x8370, 0x0011, 0x1388, 0x0010, 0x0003, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0010, 0xc00a, 0x000b, 0x8376, 0x0010, 0xb0fe,
- 0x0013, 0x637b, 0x0000, 0xb012, 0x0013, 0x037d, 0x0010, 0xc012,
- 0x0010, 0xc011, 0x0012, 0x104b, 0x0003, 0x133a, 0x0002, 0x103b,
- 0x0010, 0xff03, 0x0005, 0x0002, 0x0010, 0x0000, 0x0000, 0xc00d,
- 0x0013, 0x033a, 0x0000, 0xffb0, 0x0010, 0xc3b1, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0001, 0xb888, 0x0010, 0x0011, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0000, 0xb012, 0x001b, 0x838e, 0x0017, 0x4000,
- 0x0012, 0x3a43, 0x0003, 0x139f, 0x0015, 0x003a, 0x0000, 0x0800,
- 0x0010, 0x0db0, 0x0013, 0x639f, 0x0000, 0x0bff, 0x0001, 0xb0e0,
- 0x0003, 0x13c5, 0x0010, 0x09ff, 0x0001, 0xb0e0, 0x0003, 0x13a9,
- 0x0010, 0x05ff, 0x0001, 0xb0e0, 0x0003, 0x13a3, 0x0000, 0xc00e,
- 0x0000, 0x05fe, 0x0013, 0x63a6, 0x0000, 0x050d, 0x0005, 0x0002,
- 0x0000, 0x0004, 0x0013, 0x03c0, 0x0000, 0x09fe, 0x0003, 0x63c2,
- 0x0000, 0x090d, 0x0005, 0x0002, 0x0000, 0x0001, 0x0014, 0x0424,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0000, 0x0004,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xba09, 0x000b, 0x83b3,
- 0x0011, 0x03c8, 0x0010, 0x000f, 0x0000, 0xffb6, 0x0011, 0xb6e8,
- 0x0000, 0x0001, 0x0013, 0x14bb, 0x0011, 0xb6e8, 0x0000, 0x0002,
- 0x0013, 0x14dd, 0x0011, 0xb6e8, 0x0010, 0x0003, 0x0003, 0x15cc,
- 0x0014, 0x07de, 0x0013, 0x0423, 0x0010, 0x0bfe, 0x0013, 0x6423,
- 0x0010, 0x0b0d, 0x0005, 0x0002, 0x0000, 0x0002, 0x0014, 0x0424,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0000, 0x0004,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xba09, 0x001b, 0x83cf,
- 0x0000, 0xb930, 0x0005, 0x0031, 0x0010, 0x0021, 0x0015, 0x0033,
- 0x0000, 0xb009, 0x000b, 0x83d5, 0x0001, 0xb0a8, 0x0000, 0x199a,
- 0x0003, 0x23db, 0x0005, 0x00b0, 0x0000, 0x1999, 0x0012, 0xb050,
- 0x0000, 0xffb0, 0x0002, 0xff50, 0x0002, 0xff50, 0x0001, 0xb080,
- 0x0000, 0xffb0, 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88,
- 0x0010, 0x0006, 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb00a,
- 0x001b, 0x83e8, 0x0000, 0xb930, 0x0005, 0x0031, 0x0000, 0x0019,
- 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x83ee, 0x0001, 0xb0c8,
- 0x0010, 0x00ff, 0x0001, 0xffe8, 0x0010, 0x0048, 0x000b, 0x1433,
- 0x0005, 0x0002, 0x0010, 0x0006, 0x0012, 0x0c10, 0x0010, 0xff0c,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0010, 0x0003,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0xb109, 0x001b, 0x83ff,
- 0x0000, 0xb10b, 0x001b, 0x6403, 0x0010, 0xb10a, 0x0015, 0x0033,
- 0x0010, 0xc00a, 0x000b, 0x8405, 0x0002, 0x032b, 0x0010, 0xff03,
- 0x0011, 0x0d88, 0x0010, 0x0011, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0010, 0x030a, 0x001b, 0x840d, 0x0000, 0x11fe, 0x001b, 0x6412,
- 0x0000, 0x0d12, 0x0003, 0x041b, 0x0015, 0x0030, 0x0000, 0x0400,
- 0x0001, 0x1188, 0x0010, 0x0003, 0x0000, 0xff31, 0x0010, 0x0db0,
- 0x0015, 0x0033, 0x0000, 0xb00a, 0x001b, 0x841a, 0x0000, 0x0d11,
- 0x0013, 0x0423, 0x0000, 0x05fe, 0x0013, 0x6423, 0x0005, 0x0002,
- 0x0000, 0x0004, 0x0000, 0x050d, 0x0014, 0x07de, 0x0013, 0x0047,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0010, 0x0011,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0x0309, 0x000b, 0x842b,
- 0x0011, 0x0d88, 0x0010, 0x0005, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0000, 0xb909, 0x001b, 0x8431, 0x0017, 0x4000, 0x0005, 0x00b6,
- 0x0010, 0x0600, 0x0004, 0x05fc, 0x0014, 0x04a5, 0x0000, 0xb05a,
- 0x0000, 0xb15b, 0x0005, 0x0054, 0x0010, 0x0829, 0x0010, 0x0d58,
- 0x0015, 0x0059, 0x0010, 0xffff, 0x0000, 0xb930, 0x0005, 0x0031,
- 0x0010, 0x001e, 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x8443,
- 0x0000, 0xb05c, 0x0005, 0x0031, 0x0000, 0x001f, 0x0015, 0x0033,
- 0x0000, 0xb009, 0x001b, 0x8449, 0x0001, 0xb0c8, 0x0010, 0x000f,
- 0x000b, 0x1450, 0x0015, 0x00ff, 0x0010, 0x0005, 0x0013, 0x0458,
- 0x0002, 0xb040, 0x0013, 0x1455, 0x0015, 0x00ff, 0x0000, 0x0004,
- 0x0013, 0x0458, 0x0001, 0xb0c8, 0x0010, 0x0006, 0x0002, 0xff60,
- 0x0010, 0xffb2, 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88,
- 0x0000, 0x0019, 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0xb109,
- 0x000b, 0x8460, 0x0012, 0xb170, 0x0011, 0xffc8, 0x0010, 0xff00,
- 0x0011, 0xb2d0, 0x0010, 0xff60, 0x0002, 0xb045, 0x0003, 0x146b,
- 0x0015, 0x00b2, 0x0000, 0x0002, 0x0013, 0x0475, 0x0002, 0xb046,
- 0x0003, 0x1470, 0x0015, 0x00b2, 0x0000, 0x0001, 0x0013, 0x0475,
- 0x0015, 0x00b2, 0x0010, 0x0000, 0x0000, 0xc0b0, 0x0010, 0xc0b1,
- 0x0003, 0x047b, 0x0000, 0xb930, 0x0005, 0x0031, 0x0010, 0x002b,
- 0x0015, 0x0033, 0x0000, 0xb011, 0x001b, 0x847a, 0x0010, 0xb16a,
- 0x0010, 0xb06b, 0x0000, 0xb261, 0x0015, 0x0044, 0x0010, 0x0018,
- 0x0000, 0xb930, 0x0005, 0x0031, 0x0000, 0x0023, 0x0015, 0x0033,
- 0x0000, 0x6241, 0x001b, 0x8485, 0x0013, 0x9486, 0x0015, 0x00a0,
- 0x0000, 0x0020, 0x0012, 0xd041, 0x001b, 0x1489, 0x0015, 0x00d1,
- 0x0010, 0x0202, 0x0003, 0x948d, 0x0000, 0x75ff, 0x0011, 0xffc8,
- 0x0000, 0x1804, 0x0001, 0xffd8, 0x0010, 0x0009, 0x0003, 0x9493,
- 0x0000, 0xff75, 0x0003, 0x9495, 0x0015, 0x00d1, 0x0000, 0x0200,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0001, 0xbd88, 0x0000, 0x0008,
- 0x0000, 0xff31, 0x0015, 0x00b1, 0x0010, 0x07d0, 0x0005, 0x00b0,
- 0x0010, 0x0009, 0x0015, 0x0033, 0x0000, 0xb012, 0x000b, 0x84a3,
- 0x0013, 0x0423, 0x0000, 0xba30, 0x0005, 0x0031, 0x0000, 0x0031,
- 0x0015, 0x0033, 0x0000, 0xb009, 0x000b, 0x84aa, 0x0002, 0xb040,
- 0x0013, 0x14b8, 0x0000, 0xb7b0, 0x0000, 0xb9b1, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0011, 0x0d88, 0x0000, 0x0013, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0000, 0xb012, 0x001b, 0x84b6, 0x0013, 0x04ba,
- 0x0010, 0xc0b1, 0x0000, 0xc0b0, 0x0017, 0x4000, 0x0005, 0x00b6,
- 0x0010, 0x0500, 0x0004, 0x05fc, 0x0005, 0x0054, 0x0010, 0x0889,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0000, 0x0002,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x84c7,
- 0x0010, 0xb058, 0x0000, 0x0d59, 0x0000, 0xb930, 0x0005, 0x0031,
- 0x0000, 0x0023, 0x0015, 0x0033, 0x0000, 0xb011, 0x000b, 0x84cf,
- 0x0010, 0xb15c, 0x0010, 0xb05d, 0x0005, 0x0031, 0x0010, 0x002b,
- 0x0015, 0x0033, 0x0000, 0xb011, 0x001b, 0x84d6, 0x0000, 0xb15e,
- 0x0000, 0xb05f, 0x0013, 0x94d9, 0x0015, 0x00a0, 0x0010, 0x000c,
- 0x0013, 0x05e1, 0x0005, 0x00b6, 0x0000, 0x0700, 0x0004, 0x05fc,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0010, 0x0009,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0xb709, 0x000b, 0x84e7,
- 0x0012, 0xb749, 0x0013, 0x14ed, 0x0005, 0x0054, 0x0010, 0x0889,
- 0x0013, 0x04ef, 0x0005, 0x0054, 0x0010, 0x0898, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0011, 0x0d88, 0x0000, 0x0002, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0000, 0xb009, 0x000b, 0x84f6, 0x0010, 0xb058,
- 0x0000, 0x0d59, 0x0001, 0xb9a8, 0x0010, 0x00f0, 0x001b, 0x251d,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0010, 0x0005,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x8503,
- 0x0001, 0xb0c8, 0x0000, 0xf700, 0x0000, 0xffb0, 0x0011, 0xb0e8,
- 0x0000, 0xf100, 0x0013, 0x1564, 0x0011, 0xb0e8, 0x0000, 0xf200,
- 0x0003, 0x1569, 0x0011, 0xb0e8, 0x0010, 0xf300, 0x0003, 0x158e,
- 0x0011, 0xb0e8, 0x0000, 0xf400, 0x0003, 0x1593, 0x0011, 0xb0e8,
- 0x0010, 0xf500, 0x0013, 0x1564, 0x0011, 0xb0e8, 0x0010, 0xf600,
- 0x0013, 0x15a4, 0x0005, 0x00ce, 0x0010, 0x0009, 0x0000, 0xb0cf,
- 0x0013, 0x07d3, 0x0000, 0xb930, 0x0005, 0x0031, 0x0000, 0x0025,
- 0x0015, 0x0033, 0x0000, 0xb039, 0x001b, 0x8522, 0x0012, 0xb749,
- 0x0003, 0x1527, 0x0002, 0xb52c, 0x0000, 0xffb5, 0x0000, 0xb162,
- 0x0000, 0xb063, 0x0005, 0x0031, 0x0000, 0x001f, 0x0015, 0x0033,
- 0x0000, 0xb309, 0x001b, 0x852d, 0x0001, 0xb3c8, 0x0010, 0x0003,
- 0x0003, 0x1535, 0x0010, 0xffb2, 0x0001, 0xffe8, 0x0010, 0x0003,
- 0x000b, 0x1537, 0x0000, 0xc2b7, 0x0013, 0x05c0, 0x0001, 0xb2e8,
- 0x0000, 0x0001, 0x0013, 0x153e, 0x0005, 0x00ce, 0x0010, 0x000a,
- 0x0010, 0xb2cf, 0x0013, 0x07d3, 0x0010, 0xb465, 0x0010, 0xb667,
- 0x0015, 0x00b7, 0x0010, 0x0018, 0x0001, 0xb5c8, 0x0010, 0x0300,
- 0x0003, 0x1563, 0x0012, 0xb548, 0x0013, 0x154a, 0x0000, 0xb6ff,
- 0x0011, 0xb780, 0x0010, 0xffb7, 0x0002, 0xb549, 0x0013, 0x154f,
- 0x0010, 0xb4ff, 0x0011, 0xb780, 0x0010, 0xffb7, 0x0015, 0x0044,
- 0x0010, 0x0018, 0x0005, 0x0031, 0x0000, 0x002c, 0x0015, 0x0033,
- 0x0000, 0x6841, 0x001b, 0x8555, 0x0015, 0x0044, 0x0000, 0x0019,
- 0x0005, 0x0031, 0x0000, 0x0034, 0x0015, 0x0033, 0x0000, 0x5029,
- 0x001b, 0x855c, 0x0015, 0x0044, 0x0000, 0x0008, 0x0011, 0xb7c8,
- 0x0010, 0x0003, 0x0003, 0x1563, 0x0010, 0xff55, 0x0013, 0x05c0,
- 0x0005, 0x00b5, 0x0000, 0x0008, 0x0015, 0x00b7, 0x0010, 0x0018,
- 0x0013, 0x05c0, 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88,
- 0x0000, 0x000b, 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb011,
- 0x000b, 0x8570, 0x0010, 0xb1ff, 0x0001, 0xb0d0, 0x0013, 0x1579,
- 0x0005, 0x00b5, 0x0010, 0x0b02, 0x0010, 0xb062, 0x0010, 0xb163,
- 0x0013, 0x057b, 0x0005, 0x00b5, 0x0000, 0x0302, 0x0015, 0x0065,
- 0x0010, 0x0012, 0x0005, 0x0067, 0x0000, 0x0008, 0x0015, 0x006c,
- 0x0000, 0x7000, 0x0005, 0x006d, 0x0010, 0x0500, 0x0015, 0x006f,
- 0x0010, 0x000a, 0x0015, 0x0044, 0x0000, 0x0001, 0x0005, 0x0052,
- 0x0000, 0x2500, 0x0015, 0x0044, 0x0000, 0x0008, 0x0015, 0x00b7,
- 0x0000, 0x0032, 0x0013, 0x05c0, 0x0005, 0x00b5, 0x0010, 0x0028,
- 0x0015, 0x00b7, 0x0010, 0x0018, 0x0013, 0x05c0, 0x0005, 0x00b5,
- 0x0000, 0x0100, 0x0005, 0x0067, 0x0000, 0x0008, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0011, 0x0d88, 0x0010, 0x0018, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0000, 0xb009, 0x000b, 0x859e, 0x0001, 0xb0c8,
- 0x0010, 0x00ff, 0x0015, 0x00b7, 0x0000, 0x0020, 0x0013, 0x05c0,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0010, 0x0005,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb609, 0x000b, 0x85ab,
- 0x0001, 0xb6c8, 0x0010, 0xff00, 0x0000, 0xffb0, 0x0015, 0x0033,
- 0x0000, 0xb00a, 0x001b, 0x85b1, 0x0001, 0xb6c8, 0x0010, 0x00ff,
- 0x0012, 0xff10, 0x000b, 0x15ba, 0x0000, 0xffb5, 0x0015, 0x00b7,
- 0x0010, 0x0018, 0x0013, 0x05c0, 0x0010, 0xff63, 0x0005, 0x00b5,
- 0x0000, 0x0800, 0x0015, 0x00b7, 0x0010, 0x0018, 0x0013, 0x05c0,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0010, 0x0009,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb009, 0x000b, 0x85c7,
- 0x0010, 0xb561, 0x0013, 0x95c9, 0x0010, 0xb7a0, 0x0013, 0x05e1,
- 0x0005, 0x00b6, 0x0010, 0x0300, 0x0004, 0x05fc, 0x0005, 0x0054,
- 0x0010, 0x0819, 0x0010, 0x0d58, 0x0015, 0x0030, 0x0000, 0x0400,
- 0x0011, 0x0d88, 0x0000, 0x0002, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0000, 0xb009, 0x000b, 0x85d9, 0x0000, 0xb059, 0x0013, 0x95db,
- 0x0010, 0xc0a0, 0x0010, 0x71ff, 0x0002, 0xff28, 0x0010, 0xff71,
- 0x0013, 0x05e1, 0x0012, 0xd041, 0x001b, 0x15e1, 0x0015, 0x00d1,
- 0x0010, 0x0202, 0x0000, 0x75ff, 0x0011, 0xffc8, 0x0000, 0x1804,
- 0x0001, 0xffd8, 0x0010, 0x0009, 0x0003, 0x95ea, 0x0000, 0xff75,
- 0x0003, 0x95ec, 0x0015, 0x00d1, 0x0000, 0x0200, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0001, 0xbd88, 0x0000, 0x0008, 0x0000, 0xff31,
- 0x0005, 0x00b0, 0x0010, 0x0009, 0x0015, 0x00b1, 0x0010, 0x07d0,
- 0x0015, 0x0033, 0x0000, 0xb012, 0x001b, 0x85fa, 0x0013, 0x0423,
- 0x0015, 0x0044, 0x0000, 0x0008, 0x0005, 0x0098, 0x0010, 0x0056,
- 0x0015, 0x0099, 0x0000, 0x9575, 0x0014, 0x079a, 0x0000, 0xb096,
- 0x0012, 0xb270, 0x0010, 0xff56, 0x0004, 0x07bc, 0x0010, 0xb052,
- 0x0010, 0xb153, 0x0000, 0xb6ff, 0x0011, 0xb2d0, 0x0010, 0xff50,
- 0x0010, 0xb351, 0x0017, 0x4000, 0x0015, 0x0030, 0x0000, 0x0400,
- 0x0001, 0x1288, 0x0010, 0x0011, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0000, 0x1009, 0x000b, 0x8615, 0x0015, 0x000f, 0x0000, 0x0001,
- 0x0010, 0xc014, 0x0000, 0x1213, 0x0015, 0x0030, 0x0000, 0x0400,
- 0x0011, 0x1388, 0x0000, 0x0004, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0000, 0xba09, 0x001b, 0x8621, 0x0015, 0x0030, 0x0000, 0x0400,
- 0x0011, 0x1388, 0x0010, 0x0005, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0000, 0x1a09, 0x000b, 0x8629, 0x0012, 0x104b, 0x000b, 0x1632,
- 0x0000, 0x1a30, 0x0005, 0x0031, 0x0000, 0x000b, 0x0015, 0x0033,
- 0x0000, 0x1621, 0x000b, 0x8631, 0x0010, 0x15fe, 0x001b, 0x663b,
- 0x0004, 0x0659, 0x0002, 0x3a42, 0x000b, 0x1658, 0x0001, 0x10c8,
- 0x0010, 0x000f, 0x001b, 0x16bb, 0x0003, 0x0657, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0011, 0x1388, 0x0010, 0x0003, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x8642, 0x0015, 0x0033,
- 0x0010, 0xc00a, 0x000b, 0x8645, 0x0010, 0xb0fe, 0x0003, 0x664a,
- 0x0000, 0xb012, 0x0003, 0x064c, 0x0010, 0xc012, 0x0010, 0xc011,
- 0x0015, 0x000f, 0x0010, 0x0000, 0x0002, 0x3944, 0x0003, 0x1655,
- 0x0015, 0x0039, 0x0000, 0x5040, 0x0015, 0x00b8, 0x0000, 0x0008,
- 0x0014, 0x0817, 0x0000, 0xc013, 0x0003, 0x0658, 0x0014, 0x0803,
- 0x0003, 0x0051, 0x0003, 0xb659, 0x0005, 0x002a, 0x0000, 0x0004,
- 0x0000, 0xba30, 0x0005, 0x0031, 0x0010, 0x001b, 0x0015, 0x0033,
- 0x0000, 0xb009, 0x000b, 0x8661, 0x0000, 0xc02c, 0x0000, 0xb02d,
- 0x0012, 0x104b, 0x0013, 0x167c, 0x0000, 0x1a30, 0x0005, 0x0031,
- 0x0000, 0x0023, 0x0015, 0x0033, 0x0000, 0xb129, 0x000b, 0x866b,
- 0x0000, 0xb120, 0x0010, 0xb221, 0x0000, 0xb322, 0x0000, 0xb423,
- 0x0000, 0xb524, 0x0000, 0xc025, 0x0010, 0xb526, 0x0010, 0xc027,
- 0x0010, 0xb516, 0x0010, 0xc017, 0x0000, 0xb518, 0x0000, 0xc019,
- 0x0010, 0xc028, 0x0000, 0xc029, 0x0010, 0xc01e, 0x0013, 0x06b2,
- 0x0012, 0x1044, 0x0003, 0x16ac, 0x0002, 0x1034, 0x0000, 0xff10,
- 0x0000, 0x1a30, 0x0005, 0x0031, 0x0000, 0x0002, 0x0015, 0x0033,
- 0x0000, 0x1b29, 0x000b, 0x8685, 0x0000, 0x1c30, 0x0000, 0x1b31,
- 0x0015, 0x0033, 0x0000, 0xb131, 0x000b, 0x868a, 0x0002, 0x1f43,
- 0x000b, 0x1691, 0x0010, 0xb3b5, 0x0000, 0xb4b6, 0x0000, 0xc0b3,
- 0x0010, 0xc0b4, 0x0000, 0xb120, 0x0010, 0xb221, 0x0000, 0xb322,
- 0x0000, 0xb423, 0x0000, 0xb524, 0x0010, 0xb625, 0x0010, 0xb516,
- 0x0000, 0xb617, 0x0000, 0x1826, 0x0000, 0x1927, 0x0000, 0x1a30,
- 0x0005, 0x0031, 0x0010, 0x000f, 0x0015, 0x0033, 0x0000, 0xb011,
- 0x001b, 0x86a0, 0x0000, 0xb028, 0x0000, 0xb129, 0x0012, 0x1e10,
- 0x0010, 0xff1e, 0x0013, 0x66b2, 0x0002, 0x1d00, 0x0010, 0xff1d,
- 0x0014, 0x029a, 0x0002, 0x3a42, 0x0003, 0x16b2, 0x0003, 0x06ba,
- 0x0000, 0x1a30, 0x0005, 0x0031, 0x0000, 0x0002, 0x0015, 0x0033,
- 0x0000, 0x1b79, 0x001b, 0x86b1, 0x0003, 0xb6b2, 0x0005, 0x002a,
- 0x0000, 0x0001, 0x0005, 0x0015, 0x0000, 0x0001, 0x0000, 0x1efe,
- 0x0003, 0x66ba, 0x0003, 0x0266, 0x0017, 0x4000, 0x0000, 0xba30,
- 0x0005, 0x0031, 0x0010, 0x001b, 0x0015, 0x0033, 0x0010, 0xb051,
- 0x001b, 0x86c0, 0x0000, 0xb0a3, 0x0010, 0xb697, 0x0010, 0xb946,
- 0x0015, 0x00a5, 0x0000, 0x0010, 0x0015, 0x0030, 0x0000, 0x0400,
- 0x0011, 0x1388, 0x0000, 0x0002, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0000, 0xb509, 0x000b, 0x86cd, 0x0004, 0x07bc, 0x0004, 0x07ab,
- 0x0012, 0xb470, 0x0010, 0xffb4, 0x0010, 0xb48e, 0x0010, 0xb08a,
- 0x0010, 0xb18b, 0x0012, 0x104d, 0x0003, 0x16d8, 0x0003, 0x0705,
- 0x0012, 0x104b, 0x0003, 0x16eb, 0x0005, 0x008c, 0x0010, 0x0829,
- 0x0010, 0xc08d, 0x0001, 0xb2d8, 0x0010, 0x0600, 0x0010, 0xff88,
- 0x0010, 0xb389, 0x0000, 0x1390, 0x0010, 0xb591, 0x0000, 0xc08f,
- 0x0010, 0x1ab9, 0x0014, 0x04a5, 0x0003, 0x96e6, 0x0010, 0xb092,
- 0x0010, 0xb193, 0x0003, 0x96e9, 0x0003, 0x0700, 0x0005, 0x008c,
- 0x0000, 0x0809, 0x0015, 0x008d, 0x0000, 0x0008, 0x0001, 0xb2d8,
- 0x0000, 0x0100, 0x0010, 0xff88, 0x0010, 0xb389, 0x0000, 0x1390,
- 0x0010, 0xb591, 0x0000, 0xc08f, 0x0000, 0x1a30, 0x0005, 0x0031,
- 0x0010, 0x000f, 0x0015, 0x0033, 0x0000, 0xb011, 0x000b, 0x86fb,
- 0x0013, 0x96fc, 0x0000, 0xb192, 0x0000, 0xb093, 0x0013, 0x96ff,
- 0x0010, 0x19a1, 0x0000, 0x18a2, 0x0015, 0x00b1, 0x0010, 0x0096,
- 0x0013, 0x0776, 0x0000, 0xb590, 0x0010, 0x1391, 0x0001, 0x10c8,
- 0x0010, 0x000f, 0x0001, 0xffe8, 0x0010, 0x0005, 0x0003, 0x172c,
- 0x0001, 0xb2d8, 0x0000, 0x0700, 0x0010, 0xff88, 0x0010, 0xb389,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x1388, 0x0010, 0x0009,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb009, 0x000b, 0x8717,
- 0x0002, 0xb049, 0x0003, 0x171f, 0x0005, 0x008c, 0x0010, 0x0889,
- 0x0015, 0x00b1, 0x0010, 0x0096, 0x0013, 0x0723, 0x0005, 0x008c,
- 0x0010, 0x0898, 0x0015, 0x00b1, 0x0000, 0x0092, 0x0010, 0xc08d,
- 0x0000, 0xc08f, 0x0013, 0x9725, 0x0000, 0xc092, 0x0010, 0xc093,
- 0x0003, 0x9728, 0x0010, 0x19a1, 0x0000, 0x18a2, 0x0013, 0x0776,
- 0x0001, 0xb2d8, 0x0000, 0x0100, 0x0010, 0xff88, 0x0010, 0xb389,
- 0x0005, 0x008c, 0x0010, 0x0880, 0x0015, 0x008d, 0x0000, 0x0008,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x1388, 0x0000, 0x000e,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb009, 0x001b, 0x873b,
- 0x0010, 0xb08f, 0x0000, 0xb590, 0x0010, 0x1391, 0x0000, 0x1a30,
- 0x0005, 0x0031, 0x0000, 0x000d, 0x0015, 0x0033, 0x0000, 0xb021,
- 0x000b, 0x8744, 0x0013, 0x9745, 0x0010, 0xb392, 0x0010, 0xb293,
- 0x0003, 0x9748, 0x0000, 0xb1a1, 0x0010, 0xb0a2, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0011, 0x1388, 0x0000, 0x000b, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0010, 0xb211, 0x001b, 0x8752, 0x0000, 0xb3ff,
- 0x0001, 0xb080, 0x0000, 0xffb3, 0x000b, 0x2759, 0x0002, 0xb200,
- 0x0003, 0x075a, 0x0010, 0xb2ff, 0x0011, 0xb180, 0x0010, 0xffb2,
- 0x0011, 0x1388, 0x0000, 0x000b, 0x0000, 0xff31, 0x0015, 0x0033,
- 0x0010, 0xb212, 0x001b, 0x8761, 0x0015, 0x00b1, 0x0000, 0x0092,
- 0x0002, 0x104c, 0x0013, 0x1774, 0x0011, 0xc2e8, 0x0010, 0x000c,
- 0x000b, 0x176c, 0x0015, 0x00ff, 0x0000, 0x0800, 0x0003, 0x0774,
- 0x0011, 0xc2e8, 0x0000, 0x0020, 0x000b, 0x1772, 0x0015, 0x00ff,
- 0x0010, 0x1800, 0x0003, 0x0774, 0x0015, 0x00ff, 0x0000, 0x1000,
- 0x0011, 0xb1d0, 0x0010, 0xffb1, 0x0015, 0x009a, 0x0010, 0x0036,
- 0x0005, 0x009b, 0x0000, 0x95d5, 0x0012, 0xd041, 0x001b, 0x177a,
- 0x0015, 0x00d1, 0x0010, 0x0202, 0x0003, 0x977e, 0x0012, 0x104e,
- 0x0003, 0x1783, 0x0012, 0xb12f, 0x0010, 0xffb1, 0x0000, 0xb175,
- 0x0003, 0x9784, 0x0015, 0x00d1, 0x0000, 0x0200, 0x0001, 0x19c8,
- 0x0010, 0xfff0, 0x000b, 0x178d, 0x0015, 0x00b1, 0x0010, 0x07d0,
- 0x0013, 0x078f, 0x0015, 0x00b1, 0x0000, 0x1b58, 0x0005, 0x00b0,
- 0x0010, 0x0009, 0x0015, 0x0030, 0x0000, 0x0400, 0x0001, 0xbd88,
- 0x0000, 0x000b, 0x0000, 0xff31, 0x0015, 0x0033, 0x0000, 0xb012,
- 0x001b, 0x8798, 0x0003, 0x0658, 0x0000, 0xba30, 0x0005, 0x0031,
- 0x0010, 0x0021, 0x0015, 0x0033, 0x0010, 0xb019, 0x000b, 0x879f,
- 0x0002, 0xb200, 0x0011, 0xffc8, 0x0010, 0x00ff, 0x0010, 0xffb2,
- 0x0010, 0xb2b7, 0x0005, 0x0031, 0x0000, 0x0023, 0x0015, 0x0033,
- 0x0010, 0xb20a, 0x000b, 0x87a9, 0x0017, 0x4000, 0x0000, 0xba30,
- 0x0005, 0x0031, 0x0000, 0x0023, 0x0015, 0x0033, 0x0010, 0xb409,
- 0x001b, 0x87b0, 0x0002, 0xb400, 0x0011, 0xffc8, 0x0010, 0x00ff,
- 0x0010, 0xffb4, 0x0010, 0xb4b7, 0x0005, 0x0031, 0x0000, 0x0023,
- 0x0015, 0x0033, 0x0010, 0xb40a, 0x001b, 0x87ba, 0x0017, 0x4000,
- 0x0000, 0xba30, 0x0001, 0xc7c8, 0x0000, 0x0020, 0x001b, 0x17c8,
- 0x0005, 0x0031, 0x0010, 0x0028, 0x0015, 0x0033, 0x0010, 0xb209,
- 0x001b, 0x87c4, 0x0011, 0xb2c8, 0x0000, 0xff80, 0x0003, 0x17cb,
- 0x0010, 0xc4b0, 0x0010, 0xc5b1, 0x0013, 0x07cd, 0x0010, 0xc6b1,
- 0x0000, 0xc0b0, 0x0005, 0x0031, 0x0000, 0x0004, 0x0015, 0x0033,
- 0x0010, 0xb211, 0x000b, 0x87d1, 0x0017, 0x4000, 0x0015, 0x00b8,
- 0x0010, 0x0009, 0x0015, 0x003a, 0x0010, 0x0707, 0x0014, 0x0817,
- 0x0013, 0x002d, 0x0015, 0x00b8, 0x0010, 0x0009, 0x0015, 0x003a,
- 0x0010, 0x0707, 0x0003, 0x0817, 0x0004, 0x0110, 0x0015, 0x0030,
- 0x0000, 0x0400, 0x0011, 0x0d88, 0x0000, 0x0004, 0x0000, 0xff31,
- 0x0015, 0x0033, 0x0000, 0xba09, 0x001b, 0x87e6, 0x0014, 0x079a,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0000, 0x0010,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0xb20a, 0x001b, 0x87ef,
- 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x0d88, 0x0010, 0x0011,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0x0309, 0x001b, 0x87f7,
- 0x0002, 0x0327, 0x0010, 0xffb2, 0x0011, 0x0d88, 0x0010, 0x0011,
- 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0xb20a, 0x000b, 0x87ff,
- 0x0015, 0x00b8, 0x0010, 0x0006, 0x0003, 0x0817, 0x0014, 0x0122,
- 0x0014, 0x079a, 0x0015, 0x0030, 0x0000, 0x0400, 0x0011, 0x1388,
- 0x0000, 0x0010, 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0xb20a,
- 0x000b, 0x880c, 0x0012, 0x1027, 0x0010, 0xffb2, 0x0011, 0x1388,
- 0x0010, 0x0011, 0x0000, 0xff31, 0x0015, 0x0033, 0x0010, 0xb20a,
- 0x000b, 0x8814, 0x0015, 0x00b8, 0x0000, 0x0007, 0x0013, 0x4817,
- 0x0000, 0xb838, 0x0017, 0x4000, 0xa595, 0x1d35
-};
-unsigned short xseqflx_code_length01 = 0x1036;
+++ /dev/null
-/******************************************************************************
- * QLOGIC LINUX SOFTWARE
- *
- * QLogic ISP2x00 device driver for Linux 2.6.x
- * Copyright (C) 2003-2004 QLogic Corporation
- * (www.qlogic.com)
- *
- * Portions (C) Arjan van de Ven <arjanv@redhat.com> for Red Hat, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2, or (at your option) any
- * later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- ******************************************************************************/
-
-#ifndef __QLA_OS_H
-#define __QLA_OS_H
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/version.h>
-#include <linux/init.h>
-#include <linux/string.h>
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/ioport.h>
-#include <linux/delay.h>
-#include <linux/timer.h>
-#include <linux/sched.h>
-#include <linux/pci.h>
-#include <linux/proc_fs.h>
-#include <linux/blkdev.h>
-#include <linux/interrupt.h>
-#include <linux/stat.h>
-#include <linux/slab.h>
-#include <linux/mempool.h>
-#include <linux/vmalloc.h>
-#include <linux/smp_lock.h>
-#include <linux/bio.h>
-#include <linux/moduleparam.h>
-#include <linux/capability.h>
-#include <linux/list.h>
-
-#include <asm/system.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/segment.h>
-#include <asm/byteorder.h>
-#include <asm/pgtable.h>
-
-#include <linux/ioctl.h>
-#include <asm/uaccess.h>
-
-#include "scsi.h"
-#include "hosts.h"
-
-#include <scsi/scsicam.h>
-#include <scsi/scsi_ioctl.h>
-#include <scsi/scsi_transport.h>
-#include <scsi/scsi_transport_fc.h>
-
-//TODO Fix this!!!
-/*
-* String arrays
-*/
-#define LINESIZE 256
-#define MAXARGS 26
-
-/***********************************************************************
-* We use the struct scsi_pointer structure that's included with each
-* command SCSI_Cmnd as a scratchpad.
-*
-* SCp is defined as follows:
-* - SCp.ptr -- > pointer to the SRB
-* - SCp.this_residual -- > HBA completion status for ioctl code.
-*
-* Cmnd->host_scribble --> Used to hold the hba actived handle (1..255).
-***********************************************************************/
-#define CMD_SP(Cmnd) ((Cmnd)->SCp.ptr)
-#define CMD_COMPL_STATUS(Cmnd) ((Cmnd)->SCp.this_residual)
-/* Additional fields used by ioctl passthru */
-#define CMD_RESID_LEN(Cmnd) ((Cmnd)->SCp.buffers_residual)
-#define CMD_SCSI_STATUS(Cmnd) ((Cmnd)->SCp.Status)
-#define CMD_ACTUAL_SNSLEN(Cmnd) ((Cmnd)->SCp.Message)
-#define CMD_ENTRY_STATUS(Cmnd) ((Cmnd)->SCp.have_data_in)
-
-#endif
+++ /dev/null
-/* to be used by qlogicfas and qlogic_cs */
-#ifndef __QLOGICFAS_H
-#define __QLOGICFAS_H
-
-/*----------------------------------------------------------------*/
-/* Configuration */
-
-/* Set the following to 2 to use normal interrupt (active high/totempole-
- tristate), otherwise use 0 (REQUIRED FOR PCMCIA) for active low, open
- drain */
-
-#define QL_INT_ACTIVE_HIGH 2
-
-/* Set the following to max out the speed of the PIO PseudoDMA transfers,
- again, 0 tends to be slower, but more stable. */
-
-#define QL_TURBO_PDMA 1
-
-/* This should be 1 to enable parity detection */
-
-#define QL_ENABLE_PARITY 1
-
-/* This will reset all devices when the driver is initialized (during bootup).
- The other linux drivers don't do this, but the DOS drivers do, and after
- using DOS or some kind of crash or lockup this will bring things back
- without requiring a cold boot. It does take some time to recover from a
- reset, so it is slower, and I have seen timeouts so that devices weren't
- recognized when this was set. */
-
-#define QL_RESET_AT_START 0
-
-/* crystal frequency in megahertz (for offset 5 and 9)
- Please set this for your card. Most Qlogic cards are 40 Mhz. The
- Control Concepts ISA (not VLB) is 24 Mhz */
-
-#define XTALFREQ 40
-
-/**********/
-/* DANGER! modify these at your own risk */
-/* SLOWCABLE can usually be reset to zero if you have a clean setup and
- proper termination. The rest are for synchronous transfers and other
- advanced features if your device can transfer faster than 5Mb/sec.
- If you are really curious, email me for a quick howto until I have
- something official */
-/**********/
-
-/*****/
-/* config register 1 (offset 8) options */
-/* This needs to be set to 1 if your cabling is long or noisy */
-#define SLOWCABLE 1
-
-/*****/
-/* offset 0xc */
-/* This will set fast (10Mhz) synchronous timing when set to 1
- For this to have an effect, FASTCLK must also be 1 */
-#define FASTSCSI 0
-
-/* This when set to 1 will set a faster sync transfer rate */
-#define FASTCLK 0 /*(XTALFREQ>25?1:0)*/
-
-/*****/
-/* offset 6 */
-/* This is the sync transfer divisor, XTALFREQ/X will be the maximum
- achievable data rate (assuming the rest of the system is capable
- and set properly) */
-#define SYNCXFRPD 5 /*(XTALFREQ/5)*/
-
-/*****/
-/* offset 7 */
-/* This is the count of how many synchronous transfers can take place
- i.e. how many reqs can occur before an ack is given.
- The maximum value for this is 15, the upper bits can modify
- REQ/ACK assertion and deassertion during synchronous transfers
- If this is 0, the bus will only transfer asynchronously */
-#define SYNCOFFST 0
-/* for the curious, bits 7&6 control the deassertion delay in 1/2 cycles
- of the 40Mhz clock. If FASTCLK is 1, specifying 01 (1/2) will
- cause the deassertion to be early by 1/2 clock. Bits 5&4 control
- the assertion delay, also in 1/2 clocks (FASTCLK is ignored here). */
-
-/*----------------------------------------------------------------*/
-#ifdef PCMCIA
-#undef QL_INT_ACTIVE_HIGH
-#define QL_INT_ACTIVE_HIGH 0
-#endif
-
-struct qlogicfas_priv;
-typedef struct qlogicfas_priv *qlogicfas_priv_t;
-struct qlogicfas_priv {
- int qbase; /* Port */
- int qinitid; /* initiator ID */
- int qabort; /* Flag to cause an abort */
- int qlirq; /* IRQ being used */
- char qinfo[80]; /* description */
- Scsi_Cmnd *qlcmd; /* current command being processed */
- struct Scsi_Host *shost; /* pointer back to host */
- qlogicfas_priv_t next; /* next private struct */
-};
-
-extern int qlcfg5;
-extern int qlcfg6;
-extern int qlcfg7;
-extern int qlcfg8;
-extern int qlcfg9;
-extern int qlcfgc;
-
-/* The qlogic card uses two register maps - These macros select which one */
-#define REG0 ( outb( inb( qbase + 0xd ) & 0x7f , qbase + 0xd ), outb( 4 , qbase + 0xd ))
-#define REG1 ( outb( inb( qbase + 0xd ) | 0x80 , qbase + 0xd ), outb( 0xb4 | QL_INT_ACTIVE_HIGH , qbase + 0xd ))
-
-/* following is watchdog timeout in microseconds */
-#define WATCHDOG 5000000
-
-/*----------------------------------------------------------------*/
-/* the following will set the monitor border color (useful to find
- where something crashed or gets stuck at and as a simple profiler) */
-
-#if 0
-#define rtrc(i) {inb(0x3da);outb(0x31,0x3c0);outb((i),0x3c0);}
-#else
-#define rtrc(i) {}
-#endif
-#endif /* __QLOGICFAS_H */
-
+++ /dev/null
-/*
- * Copyright (C) 2003 Osamu Tomita <tomita@cinet.co.jp>
- *
- * PC9801 BIOS geometry handling.
- */
-
-#include <linux/module.h>
-#include <linux/fs.h>
-#include <linux/kernel.h>
-#include <linux/genhd.h>
-#include <linux/blkdev.h>
-#include <asm/pc9800.h>
-
-#include "scsi.h"
-#include "hosts.h"
-
-
-static int pc98_first_bios_param(struct scsi_device *sdev, int *ip)
-{
- const u8 *p = (&__PC9800SCA(u8, PC9800SCA_SCSI_PARAMS) + sdev->id * 4);
-
- ip[0] = p[1]; /* # of heads */
- ip[1] = p[0]; /* # of sectors/track */
- ip[2] = *(u16 *)&p[2] & 0x0fff; /* # of cylinders */
- if (p[3] & (1 << 6)) { /* #-of-cylinders is 16-bit */
- ip[2] |= (ip[0] & 0xf0) << 8;
- ip[0] &= 0x0f;
- }
-
- return 0;
-}
-
-int pc98_bios_param(struct scsi_device *sdev, struct block_device *bdev,
- sector_t capacity, int *ip)
-{
- struct Scsi_Host *first_real = first_real_host();
-
- /*
- * XXX
- * XXX This needs to become a sysfs attribute that's set
- * XXX by code that knows which host is the first one.
- * XXX
- * XXX Currently we support only one host on with a
- * XXX PC98ish HBA.
- * XXX
- */
- if (1 || sdev->host == first_real && sdev->id < 7 &&
- __PC9800SCA_TEST_BIT(PC9800SCA_DISK_EQUIPS, sdev->id))
- return pc98_first_bios_param(sdev, ip);
-
- /* Assume PC-9801-92 compatible parameters for HAs without BIOS. */
- ip[0] = 8;
- ip[1] = 32;
- ip[2] = capacity / (8 * 32);
- if (ip[2] > 65535) { /* if capacity >= 8GB */
- /* Recent on-board adapters seem to use this parameter. */
- ip[1] = 128;
- ip[2] = capacity / (8 * 128);
- if (ip[2] > 65535) { /* if capacity >= 32GB */
- /* Clip the number of cylinders. Currently
- this is the limit that we deal with. */
- ip[2] = 65535;
- }
- }
-
- return 0;
-}
-
-EXPORT_SYMBOL(pc98_bios_param);
+++ /dev/null
-/*
- * We should not even be trying to compile this if we are not doing
- * a module.
- */
-#include <linux/config.h>
-#include <linux/module.h>
-
-#include <scsi/scsi.h>
-#include <scsi/scsi_dbg.h>
-#include <scsi/scsi_device.h>
-#include <scsi/scsi_driver.h>
-#include <scsi/scsi_eh.h>
-#include <scsi/scsi_host.h>
-#include <scsi/scsi_ioctl.h>
-#include <scsi/scsi_request.h>
-#include <scsi/scsicam.h>
-
-#include "scsi_logging.h"
-
-
-/*
- * This source file contains the symbol table used by scsi loadable
- * modules.
- */
-EXPORT_SYMBOL(scsi_register_driver);
-EXPORT_SYMBOL(scsi_register_interface);
-EXPORT_SYMBOL(scsi_host_alloc);
-EXPORT_SYMBOL(scsi_add_host);
-EXPORT_SYMBOL(scsi_scan_host);
-EXPORT_SYMBOL(scsi_remove_host);
-EXPORT_SYMBOL(scsi_host_get);
-EXPORT_SYMBOL(scsi_host_put);
-EXPORT_SYMBOL(scsi_host_lookup);
-EXPORT_SYMBOL(scsi_register);
-EXPORT_SYMBOL(scsi_unregister);
-EXPORT_SYMBOL(scsicam_bios_param);
-EXPORT_SYMBOL(scsi_partsize);
-EXPORT_SYMBOL(scsi_bios_ptable);
-EXPORT_SYMBOL(scsi_ioctl);
-EXPORT_SYMBOL(scsi_print_command);
-EXPORT_SYMBOL(__scsi_print_command);
-EXPORT_SYMBOL(scsi_print_sense);
-EXPORT_SYMBOL(scsi_print_req_sense);
-EXPORT_SYMBOL(scsi_print_msg);
-EXPORT_SYMBOL(scsi_print_status);
-EXPORT_SYMBOL(scsi_sense_key_string);
-EXPORT_SYMBOL(scsi_extd_sense_format);
-EXPORT_SYMBOL(scsi_block_when_processing_errors);
-EXPORT_SYMBOL(scsi_ioctl_send_command);
-EXPORT_SYMBOL(scsi_set_medium_removal);
-#if defined(CONFIG_SCSI_LOGGING) /* { */
-EXPORT_SYMBOL(scsi_logging_level);
-#endif
-
-EXPORT_SYMBOL(scsi_allocate_request);
-EXPORT_SYMBOL(scsi_release_request);
-EXPORT_SYMBOL(scsi_wait_req);
-EXPORT_SYMBOL(scsi_do_req);
-EXPORT_SYMBOL(scsi_get_command);
-EXPORT_SYMBOL(scsi_put_command);
-
-EXPORT_SYMBOL(scsi_report_bus_reset);
-EXPORT_SYMBOL(scsi_report_device_reset);
-EXPORT_SYMBOL(scsi_block_requests);
-EXPORT_SYMBOL(scsi_unblock_requests);
-EXPORT_SYMBOL(scsi_adjust_queue_depth);
-EXPORT_SYMBOL(scsi_track_queue_full);
-
-EXPORT_SYMBOL(scsi_get_host_dev);
-EXPORT_SYMBOL(scsi_free_host_dev);
-
-EXPORT_SYMBOL(scsi_io_completion);
-
-EXPORT_SYMBOL(__scsi_add_device);
-EXPORT_SYMBOL(scsi_remove_device);
-EXPORT_SYMBOL(scsi_device_cancel);
-
-EXPORT_SYMBOL(__scsi_mode_sense);
-EXPORT_SYMBOL(scsi_mode_sense);
-
-/*
- * This symbol is for the highlevel drivers (e.g. sg) only.
- */
-EXPORT_SYMBOL(scsi_reset_provider);
-
-EXPORT_SYMBOL(scsi_device_types);
-
-/*
- * This is for st to find the bounce limit
- */
-EXPORT_SYMBOL(scsi_calculate_bounce_limit);
-
-/*
- * Externalize timers so that HBAs can safely start/restart commands.
- */
-EXPORT_SYMBOL(scsi_add_timer);
-EXPORT_SYMBOL(scsi_delete_timer);
+++ /dev/null
-/***********************************************************************
- * FILE NAME : SCSIIOM.C *
- * BY : C.L. Huang, ching@tekram.com.tw *
- * Description: Device Driver for Tekram DC-390 (T) PCI SCSI *
- * Bus Master Host Adapter *
- ***********************************************************************/
-/* $Id: scsiiom.c,v 2.55.2.17 2000/12/20 00:39:37 garloff Exp $ */
-static void __inline__
-dc390_freetag (struct dc390_dcb* pDCB, struct dc390_srb* pSRB)
-{
- if (pSRB->TagNumber < 255) {
- pDCB->TagMask &= ~(1 << pSRB->TagNumber); /* free tag mask */
- pSRB->TagNumber = 255;
- }
-}
-
-
-static u8
-dc390_StartSCSI( struct dc390_acb* pACB, struct dc390_dcb* pDCB, struct dc390_srb* pSRB )
-{
- u8 cmd; u8 disc_allowed, try_sync_nego;
-
- pSRB->ScsiPhase = SCSI_NOP0;
-
- if (pACB->Connected)
- {
- // Should not happen normally
- printk (KERN_WARNING "DC390: Can't select when connected! (%08x,%02x)\n",
- pSRB->SRBState, pSRB->SRBFlag);
- pSRB->SRBState = SRB_READY;
- pACB->SelConn++;
- return 1;
- }
- if (time_before (jiffies, pACB->pScsiHost->last_reset))
- {
- DEBUG0(printk ("DC390: We were just reset and don't accept commands yet!\n"));
- return 1;
- }
- /* KG: Moved pci mapping here */
- dc390_pci_map(pSRB);
- /* TODO: error handling */
- DC390_write8 (Scsi_Dest_ID, pDCB->TargetID);
- DC390_write8 (Sync_Period, pDCB->SyncPeriod);
- DC390_write8 (Sync_Offset, pDCB->SyncOffset);
- DC390_write8 (CtrlReg1, pDCB->CtrlR1);
- DC390_write8 (CtrlReg3, pDCB->CtrlR3);
- DC390_write8 (CtrlReg4, pDCB->CtrlR4);
- DC390_write8 (ScsiCmd, CLEAR_FIFO_CMD); /* Flush FIFO */
- DEBUG1(printk (KERN_INFO "DC390: Start SCSI command: %02x (Sync:%02x)\n",\
- pSRB->pcmd->cmnd[0], pDCB->SyncMode));
- disc_allowed = pDCB->DevMode & EN_DISCONNECT_;
- try_sync_nego = 0;
- /* Don't disconnect on AUTO_REQSENSE, cause it might be an
- * Contingent Allegiance Condition (6.6), where no tags should be used.
- * All other have to be allowed to disconnect to prevent Incorrect
- * Initiator Connection (6.8.2/6.5.2) */
- /* Changed KG, 99/06/06 */
- if( /*(((pSRB->pcmd->cmnd[0] == INQUIRY) || (pSRB->pcmd->cmnd[0] == REQUEST_SENSE) ||
- * (pSRB->pcmd->cmnd[0] == TEST_UNIT_READY)) && pACB->scan_devices)
- ||*/ (pSRB->SRBFlag & AUTO_REQSENSE) )
- disc_allowed = 0;
- if ( (pDCB->SyncMode & SYNC_ENABLE) && (pDCB->TargetLUN == 0) && (pDCB->Inquiry7 & 0x10) &&
- ( ( ( (pSRB->pcmd->cmnd[0] == REQUEST_SENSE) || (pSRB->SRBFlag & AUTO_REQSENSE) )
- && !(pDCB->SyncMode & SYNC_NEGO_DONE) ) || (pSRB->pcmd->cmnd[0] == INQUIRY) ) )
- try_sync_nego = 1;
-
- pSRB->MsgCnt = 0; cmd = SEL_W_ATN;
- DC390_write8 (ScsiFifo, IDENTIFY(disc_allowed, pDCB->TargetLUN));
- /* Change 99/05/31: Don't use tags when not disconnecting (BUSY) */
- if ((pDCB->SyncMode & EN_TAG_QUEUEING) && disc_allowed)
- {
- u8 tag_no = 0;
- while ((1 << tag_no) & pDCB->TagMask) tag_no++;
- if (tag_no >= sizeof (pDCB->TagMask)*8 || tag_no >= pDCB->MaxCommand) {
- printk (KERN_WARNING "DC390: Out of tags for Dev. %02x %02x\n", pDCB->TargetID, pDCB->TargetLUN);
- return 1;
- //goto no_tag;
- }
- DC390_write8 (ScsiFifo, SIMPLE_QUEUE_TAG);
- pDCB->TagMask |= (1 << tag_no); pSRB->TagNumber = tag_no;
- DC390_write8 (ScsiFifo, tag_no);
- DEBUG1(printk (KERN_DEBUG "DC390: Select w/DisCn for Cmd %li (SRB %p), Using Tag %02x\n", pSRB->pcmd->pid, pSRB, tag_no));
- cmd = SEL_W_ATN3;
- }
- else /* No TagQ */
- {
-// no_tag:
- DEBUG1(printk (KERN_DEBUG "DC390: Select w%s/DisCn for Cmd %li (SRB %p), No TagQ\n", (disc_allowed?"":"o"), pSRB->pcmd->pid, pSRB));
- }
-
- pSRB->SRBState = SRB_START_;
-
- if (try_sync_nego)
- {
- u8 Sync_Off = pDCB->SyncOffset;
- DEBUG0(printk (KERN_INFO "DC390: NEW Sync Nego code triggered (%i %i)\n", pDCB->TargetID, pDCB->TargetLUN));
- pSRB->MsgOutBuf[0] = EXTENDED_MESSAGE;
- pSRB->MsgOutBuf[1] = 3;
- pSRB->MsgOutBuf[2] = EXTENDED_SDTR;
- pSRB->MsgOutBuf[3] = pDCB->NegoPeriod;
- if (!(Sync_Off & 0x0f)) Sync_Off = SYNC_NEGO_OFFSET;
- pSRB->MsgOutBuf[4] = Sync_Off;
- pSRB->MsgCnt = 5;
- //pSRB->SRBState = SRB_MSGOUT_;
- pSRB->SRBState |= DO_SYNC_NEGO;
- cmd = SEL_W_ATN_STOP;
- }
-
- /* Command is written in CommandPhase, if SEL_W_ATN_STOP ... */
- if (cmd != SEL_W_ATN_STOP)
- {
- if( pSRB->SRBFlag & AUTO_REQSENSE )
- {
- DC390_write8 (ScsiFifo, REQUEST_SENSE);
- DC390_write8 (ScsiFifo, pDCB->TargetLUN << 5);
- DC390_write8 (ScsiFifo, 0);
- DC390_write8 (ScsiFifo, 0);
- DC390_write8 (ScsiFifo, sizeof(pSRB->pcmd->sense_buffer));
- DC390_write8 (ScsiFifo, 0);
- DEBUG1(printk (KERN_DEBUG "DC390: AutoReqSense !\n"));
- }
- else /* write cmnd to bus */
- {
- u8 *ptr; u8 i;
- ptr = (u8 *) pSRB->pcmd->cmnd;
- for (i=0; i<pSRB->pcmd->cmd_len; i++)
- DC390_write8 (ScsiFifo, *(ptr++));
- }
- }
- DEBUG0(if (pACB->pActiveDCB) \
- printk (KERN_WARNING "DC390: ActiveDCB != 0\n"));
- DEBUG0(if (pDCB->pActiveSRB) \
- printk (KERN_WARNING "DC390: ActiveSRB != 0\n"));
- //DC390_write8 (DMA_Cmd, DMA_IDLE_CMD);
- if (DC390_read8 (Scsi_Status) & INTERRUPT)
- {
- dc390_freetag (pDCB, pSRB);
- DEBUG0(printk ("DC390: Interrupt during Start SCSI (pid %li, target %02i-%02i)\n",
- pSRB->pcmd->pid, pSRB->pcmd->device->id, pSRB->pcmd->device->lun));
- pSRB->SRBState = SRB_READY;
- //DC390_write8 (ScsiCmd, CLEAR_FIFO_CMD);
- pACB->SelLost++;
- return 1;
- }
- DC390_write8 (ScsiCmd, cmd);
- pACB->pActiveDCB = pDCB; pDCB->pActiveSRB = pSRB;
- pACB->Connected = 1;
- pSRB->ScsiPhase = SCSI_NOP1;
- return 0;
-}
-
-//#define DMA_INT EN_DMA_INT /*| EN_PAGE_INT*/
-#define DMA_INT 0
-
-#if DMA_INT
-/* This is similar to AM53C974.c ... */
-static u8
-dc390_dma_intr (struct dc390_acb* pACB)
-{
- struct dc390_srb* pSRB;
- u8 dstate;
- DEBUG0(u16 pstate; struct pci_dev *pdev = pACB->pdev);
-
- DEBUG0(pci_read_config_word(pdev, PCI_STATUS, &pstate));
- DEBUG0(if (pstate & (PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY))\
- { printk(KERN_WARNING "DC390: PCI state = %04x!\n", pstate); \
- pci_write_config_word(pdev, PCI_STATUS, (PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY));});
-
- dstate = DC390_read8 (DMA_Status);
-
- if (! pACB->pActiveDCB || ! pACB->pActiveDCB->pActiveSRB) return dstate;
- else pSRB = pACB->pActiveDCB->pActiveSRB;
-
- if (dstate & (DMA_XFER_ABORT | DMA_XFER_ERROR | POWER_DOWN | PCI_MS_ABORT))
- {
- printk (KERN_ERR "DC390: DMA error (%02x)!\n", dstate);
- return dstate;
- }
- if (dstate & DMA_XFER_DONE)
- {
- u32 residual, xferCnt; int ctr = 6000000;
- if (! (DC390_read8 (DMA_Cmd) & READ_DIRECTION))
- {
- do
- {
- DEBUG1(printk (KERN_DEBUG "DC390: read residual bytes ... \n"));
- dstate = DC390_read8 (DMA_Status);
- residual = DC390_read8 (CtcReg_Low) | DC390_read8 (CtcReg_Mid) << 8 |
- DC390_read8 (CtcReg_High) << 16;
- residual += DC390_read8 (Current_Fifo) & 0x1f;
- } while (residual && ! (dstate & SCSI_INTERRUPT) && --ctr);
- if (!ctr) printk (KERN_CRIT "DC390: dma_intr: DMA aborted unfinished: %06x bytes remain!!\n", DC390_read32 (DMA_Wk_ByteCntr));
- /* residual = ... */
- }
- else
- residual = 0;
-
- /* ??? */
-
- xferCnt = pSRB->SGToBeXferLen - residual;
- pSRB->SGBusAddr += xferCnt;
- pSRB->TotalXferredLen += xferCnt;
- pSRB->SGToBeXferLen = residual;
-# ifdef DC390_DEBUG0
- printk (KERN_INFO "DC390: DMA: residual = %i, xfer = %i\n",
- (unsigned int)residual, (unsigned int)xferCnt);
-# endif
-
- DC390_write8 (DMA_Cmd, DMA_IDLE_CMD);
- }
- dc390_laststatus &= ~0xff000000; dc390_laststatus |= dstate << 24;
- return dstate;
-}
-#endif
-
-
-static void __inline__
-dc390_InvalidCmd(struct dc390_acb* pACB)
-{
- if (pACB->pActiveDCB->pActiveSRB->SRBState & (SRB_START_ | SRB_MSGOUT))
- DC390_write8(ScsiCmd, CLEAR_FIFO_CMD);
-}
-
-
-static irqreturn_t __inline__
-DC390_Interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- struct dc390_acb *pACB, *pACB2;
- struct dc390_dcb *pDCB;
- struct dc390_srb *pSRB;
- u8 sstatus=0;
- u8 phase;
- void (*stateV)( struct dc390_acb*, struct dc390_srb*, u8 *);
- u8 istate, istatus;
-#if DMA_INT
- u8 dstatus;
-#endif
-
- pACB = (struct dc390_acb*)dev_id;
- for (pACB2 = dc390_pACB_start; (pACB2 && pACB2 != pACB); pACB2 = pACB2->pNextACB);
- if (!pACB2)
- {
- printk ("DC390: IRQ called with foreign dev_id %p!\n", pACB);
- return IRQ_NONE;
- }
-
- sstatus = DC390_read8 (Scsi_Status);
- if( !(sstatus & INTERRUPT) )
- return IRQ_NONE;
-
- DEBUG1(printk (KERN_DEBUG "sstatus=%02x,", sstatus));
-
-#if DMA_INT
- spin_lock_irq(pACB->pScsiHost->host_lock);
- dstatus = dc390_dma_intr (pACB);
- spin_unlock_irq(pACB->pScsiHost->host_lock);
-
- DEBUG1(printk (KERN_DEBUG "dstatus=%02x,", dstatus));
- if (! (dstatus & SCSI_INTERRUPT))
- {
- DEBUG0(printk (KERN_WARNING "DC390 Int w/o SCSI actions (only DMA?)\n"));
- return IRQ_NONE;
- }
-#else
- //DC390_write32 (DMA_ScsiBusCtrl, WRT_ERASE_DMA_STAT | EN_INT_ON_PCI_ABORT);
- //dstatus = DC390_read8 (DMA_Status);
- //DC390_write32 (DMA_ScsiBusCtrl, EN_INT_ON_PCI_ABORT);
-#endif
-
- spin_lock_irq(pACB->pScsiHost->host_lock);
-
- istate = DC390_read8 (Intern_State);
- istatus = DC390_read8 (INT_Status); /* This clears Scsi_Status, Intern_State and INT_Status ! */
-
- DEBUG1(printk (KERN_INFO "Istatus(Res,Inv,Dis,Serv,Succ,ReS,SelA,Sel)=%02x,",istatus));
- dc390_laststatus &= ~0x00ffffff;
- dc390_laststatus |= /* dstatus<<24 | */ sstatus<<16 | istate<<8 | istatus;
-
- if (sstatus & ILLEGAL_OP_ERR)
- {
- printk ("DC390: Illegal Operation detected (%08x)!\n", dc390_laststatus);
- dc390_dumpinfo (pACB, pACB->pActiveDCB, pACB->pActiveDCB->pActiveSRB);
- }
-
- else if (istatus & INVALID_CMD)
- {
- printk ("DC390: Invalid Command detected (%08x)!\n", dc390_laststatus);
- dc390_InvalidCmd( pACB );
- goto unlock;
- }
-
- if (istatus & SCSI_RESET)
- {
- dc390_ScsiRstDetect( pACB );
- goto unlock;
- }
-
- if (istatus & DISCONNECTED)
- {
- dc390_Disconnect( pACB );
- goto unlock;
- }
-
- if (istatus & RESELECTED)
- {
- dc390_Reselect( pACB );
- goto unlock;
- }
-
- else if (istatus & (SELECTED | SEL_ATTENTION))
- {
- printk (KERN_ERR "DC390: Target mode not supported!\n");
- goto unlock;
- }
-
- if (istatus & (SUCCESSFUL_OP|SERVICE_REQUEST) )
- {
- pDCB = pACB->pActiveDCB;
- if (!pDCB)
- {
- printk (KERN_ERR "DC390: Suc. op/ Serv. req: pActiveDCB = 0!\n");
- goto unlock;
- }
- pSRB = pDCB->pActiveSRB;
- if( pDCB->DCBFlag & ABORT_DEV_ )
- dc390_EnableMsgOut_Abort (pACB, pSRB);
-
- phase = pSRB->ScsiPhase;
- DEBUG1(printk (KERN_INFO "DC390: [%i]%s(0) (%02x)\n", phase, dc390_p0_str[phase], sstatus));
- stateV = (void *) dc390_phase0[phase];
- ( *stateV )( pACB, pSRB, &sstatus );
-
- pSRB->ScsiPhase = sstatus & 7;
- phase = (u8) sstatus & 7;
- DEBUG1(printk (KERN_INFO "DC390: [%i]%s(1) (%02x)\n", phase, dc390_p1_str[phase], sstatus));
- stateV = (void *) dc390_phase1[phase];
- ( *stateV )( pACB, pSRB, &sstatus );
- }
-
- unlock:
- spin_unlock_irq(pACB->pScsiHost->host_lock);
- return IRQ_HANDLED;
-}
-
-static irqreturn_t do_DC390_Interrupt( int irq, void *dev_id, struct pt_regs *regs)
-{
- irqreturn_t ret;
- DEBUG1(printk (KERN_INFO "DC390: Irq (%i) caught: ", irq));
- /* Locking is done in DC390_Interrupt */
- ret = DC390_Interrupt(irq, dev_id, regs);
- DEBUG1(printk (".. IRQ returned\n"));
- return ret;
-}
-
-static void
-dc390_DataOut_0( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
- u8 sstatus;
- struct scatterlist *psgl;
- u32 ResidCnt, xferCnt;
- u8 dstate = 0;
-
- sstatus = *psstatus;
-
- if( !(pSRB->SRBState & SRB_XFERPAD) )
- {
- if( sstatus & (PARITY_ERR | ILLEGAL_OP_ERR) )
- pSRB->SRBStatus |= PARITY_ERROR;
-
- if( sstatus & COUNT_2_ZERO )
- {
- unsigned long timeout = jiffies + HZ;
-
- /* Function called from the ISR with the host_lock held and interrupts disabled */
- if (pSRB->SGToBeXferLen)
- while (time_before(jiffies, timeout) && !((dstate = DC390_read8 (DMA_Status)) & DMA_XFER_DONE)) {
- spin_unlock_irq(pACB->pScsiHost->host_lock);
- udelay(50);
- spin_lock_irq(pACB->pScsiHost->host_lock);
- }
- if (!time_before(jiffies, timeout))
- printk (KERN_CRIT "DC390: Deadlock in DataOut_0: DMA aborted unfinished: %06x bytes remain!!\n",
- DC390_read32 (DMA_Wk_ByteCntr));
- dc390_laststatus &= ~0xff000000;
- dc390_laststatus |= dstate << 24;
- pSRB->TotalXferredLen += pSRB->SGToBeXferLen;
- pSRB->SGIndex++;
- if( pSRB->SGIndex < pSRB->SGcount )
- {
- pSRB->pSegmentList++;
- psgl = pSRB->pSegmentList;
-
- pSRB->SGBusAddr = cpu_to_le32(pci_dma_lo32(sg_dma_address(psgl)));
- pSRB->SGToBeXferLen = cpu_to_le32(sg_dma_len(psgl));
- }
- else
- pSRB->SGToBeXferLen = 0;
- }
- else
- {
- ResidCnt = (u32) DC390_read8 (Current_Fifo) & 0x1f;
- ResidCnt |= (u32) DC390_read8 (CtcReg_High) << 16;
- ResidCnt |= (u32) DC390_read8 (CtcReg_Mid) << 8;
- ResidCnt += (u32) DC390_read8 (CtcReg_Low);
-
- xferCnt = pSRB->SGToBeXferLen - ResidCnt;
- pSRB->SGBusAddr += xferCnt;
- pSRB->TotalXferredLen += xferCnt;
- pSRB->SGToBeXferLen = ResidCnt;
- }
- }
- if ((*psstatus & 7) != SCSI_DATA_OUT)
- {
- DC390_write8 (DMA_Cmd, WRITE_DIRECTION+DMA_IDLE_CMD); /* | DMA_INT */
- DC390_write8 (ScsiCmd, CLEAR_FIFO_CMD);
- }
-}
-
-static void
-dc390_DataIn_0( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
- u8 sstatus, residual, bval;
- struct scatterlist *psgl;
- u32 ResidCnt, i;
- unsigned long xferCnt;
- u8 *ptr;
-
- sstatus = *psstatus;
-
- if( !(pSRB->SRBState & SRB_XFERPAD) )
- {
- if( sstatus & (PARITY_ERR | ILLEGAL_OP_ERR))
- pSRB->SRBStatus |= PARITY_ERROR;
-
- if( sstatus & COUNT_2_ZERO )
- {
- int dstate = 0;
- unsigned long timeout = jiffies + HZ;
-
- /* Function called from the ISR with the host_lock held and interrupts disabled */
- if (pSRB->SGToBeXferLen)
- while (time_before(jiffies, timeout) && !((dstate = DC390_read8 (DMA_Status)) & DMA_XFER_DONE)) {
- spin_unlock_irq(pACB->pScsiHost->host_lock);
- udelay(50);
- spin_lock_irq(pACB->pScsiHost->host_lock);
- }
- if (!time_before(jiffies, timeout)) {
- printk (KERN_CRIT "DC390: Deadlock in DataIn_0: DMA aborted unfinished: %06x bytes remain!!\n",
- DC390_read32 (DMA_Wk_ByteCntr));
- printk (KERN_CRIT "DC390: DataIn_0: DMA State: %i\n", dstate);
- }
- dc390_laststatus &= ~0xff000000;
- dc390_laststatus |= dstate << 24;
- DEBUG1(ResidCnt = ((unsigned long) DC390_read8 (CtcReg_High) << 16) \
- + ((unsigned long) DC390_read8 (CtcReg_Mid) << 8) \
- + ((unsigned long) DC390_read8 (CtcReg_Low)));
- DEBUG1(printk (KERN_DEBUG "Count_2_Zero (ResidCnt=%i,ToBeXfer=%li),", ResidCnt, pSRB->SGToBeXferLen));
-
- DC390_write8 (DMA_Cmd, READ_DIRECTION+DMA_IDLE_CMD); /* | DMA_INT */
-
- pSRB->TotalXferredLen += pSRB->SGToBeXferLen;
- pSRB->SGIndex++;
- if( pSRB->SGIndex < pSRB->SGcount )
- {
- pSRB->pSegmentList++;
- psgl = pSRB->pSegmentList;
-
- pSRB->SGBusAddr = cpu_to_le32(pci_dma_lo32(sg_dma_address(psgl)));
- pSRB->SGToBeXferLen = cpu_to_le32(sg_dma_len(psgl));
- }
- else
- pSRB->SGToBeXferLen = 0;
- }
- else /* phase changed */
- {
- residual = 0;
- bval = DC390_read8 (Current_Fifo);
- while( bval & 0x1f )
- {
- DEBUG1(printk (KERN_DEBUG "Check for residuals,"));
- if( (bval & 0x1f) == 1 )
- {
- for(i=0; i < 0x100; i++)
- {
- bval = DC390_read8 (Current_Fifo);
- if( !(bval & 0x1f) )
- goto din_1;
- else if( i == 0x0ff )
- {
- residual = 1; /* ;1 residual byte */
- goto din_1;
- }
- }
- }
- else
- bval = DC390_read8 (Current_Fifo);
- }
-din_1:
- DC390_write8 (DMA_Cmd, READ_DIRECTION+DMA_BLAST_CMD);
- for (i = 0xa000; i; i--)
- {
- bval = DC390_read8 (DMA_Status);
- if (bval & BLAST_COMPLETE)
- break;
- }
- /* It seems a DMA Blast abort isn't that bad ... */
- if (!i) printk (KERN_ERR "DC390: DMA Blast aborted unfinished!\n");
- //DC390_write8 (DMA_Cmd, READ_DIRECTION+DMA_IDLE_CMD); /* | DMA_INT */
- dc390_laststatus &= ~0xff000000; dc390_laststatus |= bval << 24;
-
- DEBUG1(printk (KERN_DEBUG "Blast: Read %i times DMA_Status %02x", 0xa000-i, bval));
- ResidCnt = (u32) DC390_read8 (CtcReg_High);
- ResidCnt <<= 8;
- ResidCnt |= (u32) DC390_read8 (CtcReg_Mid);
- ResidCnt <<= 8;
- ResidCnt |= (u32) DC390_read8 (CtcReg_Low);
-
- xferCnt = pSRB->SGToBeXferLen - ResidCnt;
- pSRB->SGBusAddr += xferCnt;
- pSRB->TotalXferredLen += xferCnt;
- pSRB->SGToBeXferLen = ResidCnt;
-
- if( residual )
- {
- bval = DC390_read8 (ScsiFifo); /* get one residual byte */
- ptr = (u8 *) bus_to_virt( pSRB->SGBusAddr );
- *ptr = bval;
- pSRB->SGBusAddr++; xferCnt++;
- pSRB->TotalXferredLen++;
- pSRB->SGToBeXferLen--;
- }
- DEBUG1(printk (KERN_DEBUG "Xfered: %li, Total: %li, Remaining: %li\n", xferCnt,\
- pSRB->TotalXferredLen, pSRB->SGToBeXferLen));
-
- }
- }
- if ((*psstatus & 7) != SCSI_DATA_IN)
- {
- DC390_write8 (ScsiCmd, CLEAR_FIFO_CMD);
- DC390_write8 (DMA_Cmd, READ_DIRECTION+DMA_IDLE_CMD); /* | DMA_INT */
- }
-}
-
-static void
-dc390_Command_0( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
-}
-
-static void
-dc390_Status_0( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
-
- pSRB->TargetStatus = DC390_read8 (ScsiFifo);
- //udelay (1);
- pSRB->EndMessage = DC390_read8 (ScsiFifo); /* get message */
-
- *psstatus = SCSI_NOP0;
- pSRB->SRBState = SRB_COMPLETED;
- DC390_write8 (ScsiCmd, MSG_ACCEPTED_CMD);
-}
-
-static void
-dc390_MsgOut_0( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
- if( pSRB->SRBState & (SRB_UNEXPECT_RESEL+SRB_ABORT_SENT) )
- *psstatus = SCSI_NOP0;
- //DC390_write8 (DMA_Cmd, DMA_IDLE_CMD);
-}
-
-
-static void __inline__
-dc390_reprog (struct dc390_acb* pACB, struct dc390_dcb* pDCB)
-{
- DC390_write8 (Sync_Period, pDCB->SyncPeriod);
- DC390_write8 (Sync_Offset, pDCB->SyncOffset);
- DC390_write8 (CtrlReg3, pDCB->CtrlR3);
- DC390_write8 (CtrlReg4, pDCB->CtrlR4);
- dc390_SetXferRate (pACB, pDCB);
-}
-
-
-#ifdef DC390_DEBUG0
-static void
-dc390_printMsg (u8 *MsgBuf, u8 len)
-{
- int i;
- printk (" %02x", MsgBuf[0]);
- for (i = 1; i < len; i++)
- printk (" %02x", MsgBuf[i]);
- printk ("\n");
-}
-#endif
-
-#define DC390_ENABLE_MSGOUT DC390_write8 (ScsiCmd, SET_ATN_CMD)
-
-/* reject_msg */
-static void __inline__
-dc390_MsgIn_reject (struct dc390_acb* pACB, struct dc390_srb* pSRB)
-{
- pSRB->MsgOutBuf[0] = MESSAGE_REJECT;
- pSRB->MsgCnt = 1; DC390_ENABLE_MSGOUT;
- DEBUG0 (printk (KERN_INFO "DC390: Reject message\n"));
-}
-
-/* abort command */
-static void
-dc390_EnableMsgOut_Abort ( struct dc390_acb* pACB, struct dc390_srb* pSRB )
-{
- pSRB->MsgOutBuf[0] = ABORT;
- pSRB->MsgCnt = 1; DC390_ENABLE_MSGOUT;
- pSRB->pSRBDCB->DCBFlag &= ~ABORT_DEV_;
-}
-
-static struct dc390_srb*
-dc390_MsgIn_QTag (struct dc390_acb* pACB, struct dc390_dcb* pDCB, u8 tag)
-{
- struct dc390_srb* lastSRB = pDCB->pGoingLast;
- struct dc390_srb* pSRB = pDCB->pGoingSRB;
-
- if (pSRB)
- {
- for( ;pSRB ; )
- {
- if (pSRB->TagNumber == tag) break;
- if (pSRB == lastSRB) goto mingx0;
- pSRB = pSRB->pNextSRB;
- }
-
- if( pDCB->DCBFlag & ABORT_DEV_ )
- {
- pSRB->SRBState = SRB_ABORT_SENT;
- dc390_EnableMsgOut_Abort( pACB, pSRB );
- }
-
- if( !(pSRB->SRBState & SRB_DISCONNECT) )
- goto mingx0;
-
- pDCB->pActiveSRB = pSRB;
- pSRB->SRBState = SRB_DATA_XFER;
- }
- else
- {
- mingx0:
- pSRB = pACB->pTmpSRB;
- pSRB->SRBState = SRB_UNEXPECT_RESEL;
- pDCB->pActiveSRB = pSRB;
- pSRB->MsgOutBuf[0] = ABORT_TAG;
- pSRB->MsgCnt = 1; DC390_ENABLE_MSGOUT;
- }
- return pSRB;
-}
-
-
-/* set async transfer mode */
-static void
-dc390_MsgIn_set_async (struct dc390_acb* pACB, struct dc390_srb* pSRB)
-{
- struct dc390_dcb* pDCB = pSRB->pSRBDCB;
- if (!(pSRB->SRBState & DO_SYNC_NEGO))
- printk (KERN_INFO "DC390: Target %i initiates Non-Sync?\n", pDCB->TargetID);
- pSRB->SRBState &= ~DO_SYNC_NEGO;
- pDCB->SyncMode &= ~(SYNC_ENABLE+SYNC_NEGO_DONE);
- pDCB->SyncPeriod = 0;
- pDCB->SyncOffset = 0;
- //pDCB->NegoPeriod = 50; /* 200ns <=> 5 MHz */
- pDCB->CtrlR3 = FAST_CLK; /* fast clock / normal scsi */
- pDCB->CtrlR4 &= 0x3f;
- pDCB->CtrlR4 |= pACB->glitch_cfg; /* glitch eater */
- dc390_reprog (pACB, pDCB);
-}
-
-/* set sync transfer mode */
-static void
-dc390_MsgIn_set_sync (struct dc390_acb* pACB, struct dc390_srb* pSRB)
-{
- u8 bval;
- u16 wval, wval1;
- struct dc390_dcb* pDCB = pSRB->pSRBDCB;
- u8 oldsyncperiod = pDCB->SyncPeriod;
- u8 oldsyncoffset = pDCB->SyncOffset;
-
- if (!(pSRB->SRBState & DO_SYNC_NEGO))
- {
- printk (KERN_INFO "DC390: Target %i initiates Sync: %ins %i ... answer ...\n",
- pDCB->TargetID, pSRB->MsgInBuf[3]<<2, pSRB->MsgInBuf[4]);
-
- /* reject */
- //dc390_MsgIn_reject (pACB, pSRB);
- //return dc390_MsgIn_set_async (pACB, pSRB);
-
- /* Reply with corrected SDTR Message */
- if (pSRB->MsgInBuf[4] > 15)
- {
- printk (KERN_INFO "DC390: Lower Sync Offset to 15\n");
- pSRB->MsgInBuf[4] = 15;
- }
- if (pSRB->MsgInBuf[3] < pDCB->NegoPeriod)
- {
- printk (KERN_INFO "DC390: Set sync nego period to %ins\n", pDCB->NegoPeriod << 2);
- pSRB->MsgInBuf[3] = pDCB->NegoPeriod;
- }
- memcpy (pSRB->MsgOutBuf, pSRB->MsgInBuf, 5);
- pSRB->MsgCnt = 5;
- DC390_ENABLE_MSGOUT;
- }
-
- pSRB->SRBState &= ~DO_SYNC_NEGO;
- pDCB->SyncMode |= SYNC_ENABLE+SYNC_NEGO_DONE;
- pDCB->SyncOffset &= 0x0f0;
- pDCB->SyncOffset |= pSRB->MsgInBuf[4];
- pDCB->NegoPeriod = pSRB->MsgInBuf[3];
-
- wval = (u16) pSRB->MsgInBuf[3];
- wval = wval << 2; wval -= 3; wval1 = wval / 25; /* compute speed */
- if( (wval1 * 25) != wval) wval1++;
- bval = FAST_CLK+FAST_SCSI; /* fast clock / fast scsi */
-
- pDCB->CtrlR4 &= 0x3f; /* Glitch eater: 12ns less than normal */
- if (pACB->glitch_cfg != NS_TO_GLITCH(0))
- pDCB->CtrlR4 |= NS_TO_GLITCH(((GLITCH_TO_NS(pACB->glitch_cfg)) - 1));
- else
- pDCB->CtrlR4 |= NS_TO_GLITCH(0);
- if (wval1 < 4) pDCB->CtrlR4 |= NS_TO_GLITCH(0); /* Ultra */
-
- if (wval1 >= 8)
- {
- wval1--; /* Timing computation differs by 1 from FAST_SCSI */
- bval = FAST_CLK; /* fast clock / normal scsi */
- pDCB->CtrlR4 |= pACB->glitch_cfg; /* glitch eater */
- }
-
- pDCB->CtrlR3 = bval;
- pDCB->SyncPeriod = (u8)wval1;
-
- if ((oldsyncperiod != wval1 || oldsyncoffset != pDCB->SyncOffset) && pDCB->TargetLUN == 0)
- {
- if (! (bval & FAST_SCSI)) wval1++;
- printk (KERN_INFO "DC390: Target %i: Sync transfer %i.%1i MHz, Offset %i\n", pDCB->TargetID,
- 40/wval1, ((40%wval1)*10+wval1/2)/wval1, pDCB->SyncOffset & 0x0f);
- }
-
- dc390_reprog (pACB, pDCB);
-}
-
-
-/* handle RESTORE_PTR */
-/* I presume, this command is already mapped, so, have to remap. */
-static void
-dc390_restore_ptr (struct dc390_acb* pACB, struct dc390_srb* pSRB)
-{
- struct scsi_cmnd *pcmd = pSRB->pcmd;
- struct scatterlist *psgl;
- pSRB->TotalXferredLen = 0;
- pSRB->SGIndex = 0;
- if (pcmd->use_sg) {
- pSRB->pSegmentList = (struct scatterlist *)pcmd->request_buffer;
- psgl = pSRB->pSegmentList;
- //dc390_pci_sync(pSRB);
-
- while (pSRB->TotalXferredLen + (unsigned long) sg_dma_len(psgl) < pSRB->Saved_Ptr)
- {
- pSRB->TotalXferredLen += (unsigned long) sg_dma_len(psgl);
- pSRB->SGIndex++;
- if( pSRB->SGIndex < pSRB->SGcount )
- {
- pSRB->pSegmentList++;
- psgl = pSRB->pSegmentList;
- pSRB->SGBusAddr = cpu_to_le32(pci_dma_lo32(sg_dma_address(psgl)));
- pSRB->SGToBeXferLen = cpu_to_le32(sg_dma_len(psgl));
- }
- else
- pSRB->SGToBeXferLen = 0;
- }
- pSRB->SGToBeXferLen -= (pSRB->Saved_Ptr - pSRB->TotalXferredLen);
- pSRB->SGBusAddr += (pSRB->Saved_Ptr - pSRB->TotalXferredLen);
- printk (KERN_INFO "DC390: Pointer restored. Segment %i, Total %li, Bus %08lx\n",
- pSRB->SGIndex, pSRB->Saved_Ptr, pSRB->SGBusAddr);
-
- } else if(pcmd->request_buffer) {
- //dc390_pci_sync(pSRB);
-
- sg_dma_len(&pSRB->Segmentx) = pcmd->request_bufflen - pSRB->Saved_Ptr;
- pSRB->SGcount = 1;
- pSRB->pSegmentList = (struct scatterlist *) &pSRB->Segmentx;
- } else {
- pSRB->SGcount = 0;
- printk (KERN_INFO "DC390: RESTORE_PTR message for Transfer without Scatter-Gather ??\n");
- }
-
- pSRB->TotalXferredLen = pSRB->Saved_Ptr;
-}
-
-
-/* According to the docs, the AM53C974 reads the message and
- * generates a Successful Operation IRQ before asserting ACK for
- * the last byte (how does it know whether it's the last ?) */
-/* The old code handled it in another way, indicating, that on
- * every message byte an IRQ is generated and every byte has to
- * be manually ACKed. Hmmm ? (KG, 98/11/28) */
-/* The old implementation was correct. Sigh! */
-
-/* Check if the message is complete */
-static u8 __inline__
-dc390_MsgIn_complete (u8 *msgbuf, u32 len)
-{
- if (*msgbuf == EXTENDED_MESSAGE)
- {
- if (len < 2) return 0;
- if (len < msgbuf[1] + 2) return 0;
- }
- else if (*msgbuf >= 0x20 && *msgbuf <= 0x2f) // two byte messages
- if (len < 2) return 0;
- return 1;
-}
-
-
-
-/* read and eval received messages */
-static void
-dc390_MsgIn_0( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
- struct dc390_dcb* pDCB = pACB->pActiveDCB;
-
- /* Read the msg */
-
- pSRB->MsgInBuf[pACB->MsgLen++] = DC390_read8 (ScsiFifo);
- //pSRB->SRBState = 0;
-
- /* Msg complete ? */
- if (dc390_MsgIn_complete (pSRB->MsgInBuf, pACB->MsgLen))
- {
- DEBUG0 (printk (KERN_INFO "DC390: MsgIn:"); dc390_printMsg (pSRB->MsgInBuf, pACB->MsgLen));
- /* Now eval the msg */
- switch (pSRB->MsgInBuf[0])
- {
- case DISCONNECT:
- pSRB->SRBState = SRB_DISCONNECT; break;
-
- case SIMPLE_QUEUE_TAG:
- case HEAD_OF_QUEUE_TAG:
- case ORDERED_QUEUE_TAG:
- pSRB = dc390_MsgIn_QTag (pACB, pDCB, pSRB->MsgInBuf[1]);
- break;
-
- case MESSAGE_REJECT:
- DC390_write8 (ScsiCmd, RESET_ATN_CMD);
- pDCB->NegoPeriod = 50; /* 200ns <=> 5 MHz */
- if( pSRB->SRBState & DO_SYNC_NEGO)
- dc390_MsgIn_set_async (pACB, pSRB);
- break;
-
- case EXTENDED_MESSAGE:
- /* reject every extended msg but SDTR */
- if (pSRB->MsgInBuf[1] != 3 || pSRB->MsgInBuf[2] != EXTENDED_SDTR)
- dc390_MsgIn_reject (pACB, pSRB);
- else
- {
- if (pSRB->MsgInBuf[3] == 0 || pSRB->MsgInBuf[4] == 0)
- dc390_MsgIn_set_async (pACB, pSRB);
- else
- dc390_MsgIn_set_sync (pACB, pSRB);
- }
-
- // nothing has to be done
- case COMMAND_COMPLETE: break;
-
- // SAVE POINTER may be ignored as we have the struct dc390_srb* associated with the
- // scsi command. Thanks, Gerard, for pointing it out.
- case SAVE_POINTERS:
- pSRB->Saved_Ptr = pSRB->TotalXferredLen;
- break;
- // The device might want to restart transfer with a RESTORE
- case RESTORE_POINTERS:
- DEBUG0(printk ("DC390: RESTORE POINTER message received ... try to handle\n"));
- dc390_restore_ptr (pACB, pSRB);
- break;
-
- // reject unknown messages
- default: dc390_MsgIn_reject (pACB, pSRB);
- }
-
- /* Clear counter and MsgIn state */
- pSRB->SRBState &= ~SRB_MSGIN;
- pACB->MsgLen = 0;
- }
-
- *psstatus = SCSI_NOP0;
- DC390_write8 (ScsiCmd, MSG_ACCEPTED_CMD);
- //DC390_write8 (DMA_Cmd, DMA_IDLE_CMD);
-}
-
-
-static void
-dc390_DataIO_Comm( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 ioDir)
-{
- struct scatterlist *psgl;
- unsigned long lval;
- struct dc390_dcb* pDCB = pACB->pActiveDCB;
-
- if (pSRB == pACB->pTmpSRB)
- {
- if (pDCB)
- printk(KERN_ERR "DC390: pSRB == pTmpSRB! (TagQ Error?) (%02i-%i)\n", pDCB->TargetID, pDCB->TargetLUN);
- else
- printk(KERN_ERR "DC390: pSRB == pTmpSRB! (TagQ Error?) (DCB 0!)\n");
-
- /* Try to recover - some broken disks react badly to tagged INQUIRY */
- if (pDCB && pACB->scan_devices && pDCB->GoingSRBCnt == 1) {
- pSRB = pDCB->pGoingSRB;
- pDCB->pActiveSRB = pSRB;
- } else {
- pSRB->pSRBDCB = pDCB;
- dc390_EnableMsgOut_Abort(pACB, pSRB);
- if (pDCB)
- pDCB->DCBFlag |= ABORT_DEV;
- return;
- }
- }
-
- if( pSRB->SGIndex < pSRB->SGcount )
- {
- DC390_write8 (DMA_Cmd, DMA_IDLE_CMD | ioDir /* | DMA_INT */);
- if( !pSRB->SGToBeXferLen )
- {
- psgl = pSRB->pSegmentList;
- pSRB->SGBusAddr = cpu_to_le32(pci_dma_lo32(sg_dma_address(psgl)));
- pSRB->SGToBeXferLen = cpu_to_le32(sg_dma_len(psgl));
- DEBUG1(printk (KERN_DEBUG " DC390: Next SG segment."));
- }
- lval = pSRB->SGToBeXferLen;
- DEBUG1(printk (KERN_DEBUG " DC390: Start transfer: %li bytes (address %08lx)\n", lval, pSRB->SGBusAddr));
- DC390_write8 (CtcReg_Low, (u8) lval);
- lval >>= 8;
- DC390_write8 (CtcReg_Mid, (u8) lval);
- lval >>= 8;
- DC390_write8 (CtcReg_High, (u8) lval);
-
- DC390_write32 (DMA_XferCnt, pSRB->SGToBeXferLen);
- DC390_write32 (DMA_XferAddr, pSRB->SGBusAddr);
-
- //DC390_write8 (DMA_Cmd, DMA_IDLE_CMD | ioDir); /* | DMA_INT; */
- pSRB->SRBState = SRB_DATA_XFER;
-
- DC390_write8 (ScsiCmd, DMA_COMMAND+INFO_XFER_CMD);
-
- DC390_write8 (DMA_Cmd, DMA_START_CMD | ioDir | DMA_INT);
- //DEBUG1(DC390_write32 (DMA_ScsiBusCtrl, WRT_ERASE_DMA_STAT | EN_INT_ON_PCI_ABORT));
- //DEBUG1(printk (KERN_DEBUG "DC390: DMA_Status: %02x\n", DC390_read8 (DMA_Status)));
- //DEBUG1(DC390_write32 (DMA_ScsiBusCtrl, EN_INT_ON_PCI_ABORT));
- }
- else /* xfer pad */
- {
- if( pSRB->SGcount )
- {
- pSRB->AdaptStatus = H_OVER_UNDER_RUN;
- pSRB->SRBStatus |= OVER_RUN;
- DEBUG0(printk (KERN_WARNING " DC390: Overrun -"));
- }
- DEBUG0(printk (KERN_WARNING " Clear transfer pad \n"));
- DC390_write8 (CtcReg_Low, 0);
- DC390_write8 (CtcReg_Mid, 0);
- DC390_write8 (CtcReg_High, 0);
-
- pSRB->SRBState |= SRB_XFERPAD;
- DC390_write8 (ScsiCmd, DMA_COMMAND+XFER_PAD_BYTE);
-/*
- DC390_write8 (DMA_Cmd, DMA_IDLE_CMD | ioDir); // | DMA_INT;
- DC390_write8 (DMA_Cmd, DMA_START_CMD | ioDir | DMA_INT);
-*/
- }
-}
-
-
-static void
-dc390_DataOutPhase( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
- dc390_DataIO_Comm (pACB, pSRB, WRITE_DIRECTION);
-}
-
-static void
-dc390_DataInPhase( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
- dc390_DataIO_Comm (pACB, pSRB, READ_DIRECTION);
-}
-
-static void
-dc390_CommandPhase( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
- struct dc390_dcb* pDCB;
- u8 i, cnt;
- u8 *ptr;
-
- DC390_write8 (ScsiCmd, RESET_ATN_CMD);
- DC390_write8 (ScsiCmd, CLEAR_FIFO_CMD);
- if( !(pSRB->SRBFlag & AUTO_REQSENSE) )
- {
- cnt = (u8) pSRB->pcmd->cmd_len;
- ptr = (u8 *) pSRB->pcmd->cmnd;
- for(i=0; i < cnt; i++)
- DC390_write8 (ScsiFifo, *(ptr++));
- }
- else
- {
- u8 bval = 0;
- DC390_write8 (ScsiFifo, REQUEST_SENSE);
- pDCB = pACB->pActiveDCB;
- DC390_write8 (ScsiFifo, pDCB->TargetLUN << 5);
- DC390_write8 (ScsiFifo, bval);
- DC390_write8 (ScsiFifo, bval);
- DC390_write8 (ScsiFifo, sizeof(pSRB->pcmd->sense_buffer));
- DC390_write8 (ScsiFifo, bval);
- DEBUG0(printk(KERN_DEBUG "DC390: AutoReqSense (CmndPhase)!\n"));
- }
- pSRB->SRBState = SRB_COMMAND;
- DC390_write8 (ScsiCmd, INFO_XFER_CMD);
-}
-
-static void
-dc390_StatusPhase( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
- DC390_write8 (ScsiCmd, CLEAR_FIFO_CMD);
- pSRB->SRBState = SRB_STATUS;
- DC390_write8 (ScsiCmd, INITIATOR_CMD_CMPLTE);
- //DC390_write8 (DMA_Cmd, DMA_IDLE_CMD);
-}
-
-static void
-dc390_MsgOutPhase( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
- u8 bval, i, cnt;
- u8 *ptr;
- struct dc390_dcb* pDCB;
-
- DC390_write8 (ScsiCmd, CLEAR_FIFO_CMD);
- pDCB = pACB->pActiveDCB;
- if( !(pSRB->SRBState & SRB_MSGOUT) )
- {
- cnt = pSRB->MsgCnt;
- if( cnt )
- {
- ptr = (u8 *) pSRB->MsgOutBuf;
- for(i=0; i < cnt; i++)
- DC390_write8 (ScsiFifo, *(ptr++));
- pSRB->MsgCnt = 0;
- if( (pDCB->DCBFlag & ABORT_DEV_) &&
- (pSRB->MsgOutBuf[0] == ABORT) )
- pSRB->SRBState = SRB_ABORT_SENT;
- }
- else
- {
- bval = ABORT; /* ??? MSG_NOP */
- if( (pSRB->pcmd->cmnd[0] == INQUIRY ) ||
- (pSRB->pcmd->cmnd[0] == REQUEST_SENSE) ||
- (pSRB->SRBFlag & AUTO_REQSENSE) )
- {
- if( pDCB->SyncMode & SYNC_ENABLE )
- goto mop1;
- }
- DC390_write8 (ScsiFifo, bval);
- }
- DC390_write8 (ScsiCmd, INFO_XFER_CMD);
- }
- else
- {
-mop1:
- printk (KERN_ERR "DC390: OLD Sync Nego code triggered! (%i %i)\n", pDCB->TargetID, pDCB->TargetLUN);
- DC390_write8 (ScsiFifo, EXTENDED_MESSAGE);
- DC390_write8 (ScsiFifo, 3); /* ;length of extended msg */
- DC390_write8 (ScsiFifo, EXTENDED_SDTR); /* ; sync nego */
- DC390_write8 (ScsiFifo, pDCB->NegoPeriod);
- if (pDCB->SyncOffset & 0x0f)
- DC390_write8 (ScsiFifo, pDCB->SyncOffset);
- else
- DC390_write8 (ScsiFifo, SYNC_NEGO_OFFSET);
- pSRB->SRBState |= DO_SYNC_NEGO;
- DC390_write8 (ScsiCmd, INFO_XFER_CMD);
- }
-}
-
-static void
-dc390_MsgInPhase( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
- DC390_write8 (ScsiCmd, CLEAR_FIFO_CMD);
- if( !(pSRB->SRBState & SRB_MSGIN) )
- {
- pSRB->SRBState &= ~SRB_DISCONNECT;
- pSRB->SRBState |= SRB_MSGIN;
- }
- DC390_write8 (ScsiCmd, INFO_XFER_CMD);
- //DC390_write8 (DMA_Cmd, DMA_IDLE_CMD);
-}
-
-static void
-dc390_Nop_0( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
-}
-
-static void
-dc390_Nop_1( struct dc390_acb* pACB, struct dc390_srb* pSRB, u8 *psstatus)
-{
-}
-
-
-static void
-dc390_SetXferRate( struct dc390_acb* pACB, struct dc390_dcb* pDCB )
-{
- u8 bval, i, cnt;
- struct dc390_dcb* ptr;
-
- if( !(pDCB->TargetLUN) )
- {
- if( !pACB->scan_devices )
- {
- ptr = pACB->pLinkDCB;
- cnt = pACB->DCBCnt;
- bval = pDCB->TargetID;
- for(i=0; i<cnt; i++)
- {
- if( ptr->TargetID == bval )
- {
- ptr->SyncPeriod = pDCB->SyncPeriod;
- ptr->SyncOffset = pDCB->SyncOffset;
- ptr->CtrlR3 = pDCB->CtrlR3;
- ptr->CtrlR4 = pDCB->CtrlR4;
- ptr->SyncMode = pDCB->SyncMode;
- }
- ptr = ptr->pNextDCB;
- }
- }
- }
- return;
-}
-
-
-static void
-dc390_Disconnect( struct dc390_acb* pACB )
-{
- struct dc390_dcb *pDCB;
- struct dc390_srb *pSRB, *psrb;
- u8 i, cnt;
-
- DEBUG0(printk(KERN_INFO "DISC,"));
-
- if (!pACB->Connected) printk(KERN_ERR "DC390: Disconnect not-connected bus?\n");
- pACB->Connected = 0;
- pDCB = pACB->pActiveDCB;
- if (!pDCB)
- {
- DEBUG0(printk(KERN_ERR "ACB:%p->ActiveDCB:%p IOPort:%04x IRQ:%02x !\n",\
- pACB, pDCB, pACB->IOPortBase, pACB->IRQLevel));
- mdelay(400);
- DC390_read8 (INT_Status); /* Reset Pending INT */
- DC390_write8 (ScsiCmd, EN_SEL_RESEL);
- return;
- }
- DC390_write8 (ScsiCmd, EN_SEL_RESEL);
- pSRB = pDCB->pActiveSRB;
- pACB->pActiveDCB = NULL;
- pSRB->ScsiPhase = SCSI_NOP0;
- if( pSRB->SRBState & SRB_UNEXPECT_RESEL )
- {
- pSRB->SRBState = 0;
- dc390_Waiting_process ( pACB );
- }
- else if( pSRB->SRBState & SRB_ABORT_SENT )
- {
- pDCB->TagMask = 0;
- pDCB->DCBFlag = 0;
- cnt = pDCB->GoingSRBCnt;
- pDCB->GoingSRBCnt = 0;
- pSRB = pDCB->pGoingSRB;
- for( i=0; i < cnt; i++)
- {
- psrb = pSRB->pNextSRB;
- dc390_Free_insert (pACB, pSRB);
- pSRB = psrb;
- }
- pDCB->pGoingSRB = NULL;
- dc390_Waiting_process (pACB);
- }
- else
- {
- if( (pSRB->SRBState & (SRB_START_+SRB_MSGOUT)) ||
- !(pSRB->SRBState & (SRB_DISCONNECT+SRB_COMPLETED)) )
- { /* Selection time out */
- if( !(1/*pACB->scan_devices*/) )
- {
- pSRB->SRBState = SRB_READY;
- dc390_freetag (pDCB, pSRB);
- dc390_Going_to_Waiting (pDCB, pSRB);
- dc390_waiting_timer (pACB, HZ/5);
- }
- else
- {
- pSRB->TargetStatus = SCSI_STAT_SEL_TIMEOUT;
- goto disc1;
- }
- }
- else if( pSRB->SRBState & SRB_DISCONNECT )
- {
- dc390_Waiting_process ( pACB );
- }
- else if( pSRB->SRBState & SRB_COMPLETED )
- {
-disc1:
- dc390_freetag (pDCB, pSRB);
- pDCB->pActiveSRB = NULL;
- pSRB->SRBState = SRB_FREE;
- dc390_SRBdone( pACB, pDCB, pSRB);
- }
- }
- pACB->MsgLen = 0;
-}
-
-
-static void
-dc390_Reselect( struct dc390_acb* pACB )
-{
- struct dc390_dcb* pDCB;
- struct dc390_srb* pSRB;
- u8 id, lun;
-
- DEBUG0(printk(KERN_INFO "RSEL,"));
- pACB->Connected = 1;
- pDCB = pACB->pActiveDCB;
- if( pDCB )
- { /* Arbitration lost but Reselection won */
- DEBUG0(printk ("DC390: (ActiveDCB != 0: Arb. lost but resel. won)!\n"));
- pSRB = pDCB->pActiveSRB;
- if( !( pACB->scan_devices ) )
- {
- pSRB->SRBState = SRB_READY;
- dc390_freetag (pDCB, pSRB);
- dc390_Going_to_Waiting ( pDCB, pSRB);
- dc390_waiting_timer (pACB, HZ/5);
- }
- }
- /* Get ID */
- lun = DC390_read8 (ScsiFifo);
- DEBUG0(printk ("Dev %02x,", lun));
- if (!(lun & (1 << pACB->pScsiHost->this_id)))
- printk (KERN_ERR "DC390: Reselection must select host adapter: %02x!\n", lun);
- else
- lun ^= 1 << pACB->pScsiHost->this_id; /* Mask AdapterID */
- id = 0; while (lun >>= 1) id++;
- /* Get LUN */
- lun = DC390_read8 (ScsiFifo);
- if (!(lun & IDENTIFY_BASE)) printk (KERN_ERR "DC390: Resel: Expect identify message!\n");
- lun &= 7;
- DEBUG0(printk ("(%02i-%i),", id, lun));
- pDCB = dc390_findDCB (pACB, id, lun);
- if (!pDCB)
- {
- printk (KERN_ERR "DC390: Reselect from non existing device (%02i-%i)\n",
- id, lun);
- return;
- }
- pACB->pActiveDCB = pDCB;
- /* TagQ: We expect a message soon, so never mind the exact SRB */
- if( pDCB->SyncMode & EN_TAG_QUEUEING )
- {
- pSRB = pACB->pTmpSRB;
- pDCB->pActiveSRB = pSRB;
- }
- else
- {
- pSRB = pDCB->pActiveSRB;
- if( !pSRB || !(pSRB->SRBState & SRB_DISCONNECT) )
- {
- pSRB= pACB->pTmpSRB;
- pSRB->SRBState = SRB_UNEXPECT_RESEL;
- printk (KERN_ERR "DC390: Reselect without outstanding cmnd (%02i-%i)\n",
- id, lun);
- pDCB->pActiveSRB = pSRB;
- dc390_EnableMsgOut_Abort ( pACB, pSRB );
- }
- else
- {
- if( pDCB->DCBFlag & ABORT_DEV_ )
- {
- pSRB->SRBState = SRB_ABORT_SENT;
- printk (KERN_INFO "DC390: Reselect: Abort (%02i-%i)\n",
- id, lun);
- dc390_EnableMsgOut_Abort( pACB, pSRB );
- }
- else
- pSRB->SRBState = SRB_DATA_XFER;
- }
- }
-
- DEBUG1(printk (KERN_DEBUG "Resel SRB(%p): TagNum (%02x)\n", pSRB, pSRB->TagNumber));
- pSRB->ScsiPhase = SCSI_NOP0;
- DC390_write8 (Scsi_Dest_ID, pDCB->TargetID);
- DC390_write8 (Sync_Period, pDCB->SyncPeriod);
- DC390_write8 (Sync_Offset, pDCB->SyncOffset);
- DC390_write8 (CtrlReg1, pDCB->CtrlR1);
- DC390_write8 (CtrlReg3, pDCB->CtrlR3);
- DC390_write8 (CtrlReg4, pDCB->CtrlR4); /* ; Glitch eater */
- DC390_write8 (ScsiCmd, MSG_ACCEPTED_CMD); /* ;to release the /ACK signal */
-}
-
-static u8 __inline__
-dc390_tagq_blacklist (char* name)
-{
- u8 i;
- for(i=0; i<BADDEVCNT; i++)
- if (memcmp (name, dc390_baddevname1[i], 28) == 0)
- return 1;
- return 0;
-}
-
-
-static void
-dc390_disc_tagq_set (struct dc390_dcb* pDCB, PSCSI_INQDATA ptr)
-{
- /* Check for SCSI format (ANSI and Response data format) */
- if ( (ptr->Vers & 0x07) >= 2 || (ptr->RDF & 0x0F) == 2 )
- {
- if ( (ptr->Flags & SCSI_INQ_CMDQUEUE) &&
- (pDCB->DevMode & TAG_QUEUEING_) &&
- /* ((pDCB->DevType == TYPE_DISK)
- || (pDCB->DevType == TYPE_MOD)) &&*/
- !dc390_tagq_blacklist (((char*)ptr)+8) )
- {
- if (pDCB->MaxCommand ==1) pDCB->MaxCommand = pDCB->pDCBACB->TagMaxNum;
- pDCB->SyncMode |= EN_TAG_QUEUEING /* | EN_ATN_STOP */;
- //pDCB->TagMask = 0;
- }
- else
- pDCB->MaxCommand = 1;
- }
-}
-
-
-static void
-dc390_add_dev (struct dc390_acb* pACB, struct dc390_dcb* pDCB, PSCSI_INQDATA ptr)
-{
- u8 bval1 = ptr->DevType & SCSI_DEVTYPE;
- pDCB->DevType = bval1;
- /* if (bval1 == TYPE_DISK || bval1 == TYPE_MOD) */
- dc390_disc_tagq_set (pDCB, ptr);
-}
-
-
-static void __inline__
-dc390_RequestSense(struct dc390_acb* pACB, struct dc390_dcb* pDCB, struct dc390_srb* pSRB)
-{
- struct scsi_cmnd *pcmd;
-
- pcmd = pSRB->pcmd;
-
- REMOVABLEDEBUG(printk(KERN_INFO "DC390: RequestSense(Cmd %02x, Id %02x, LUN %02x)\n",\
- pcmd->cmnd[0], pDCB->TargetID, pDCB->TargetLUN));
-
- pSRB->SRBFlag |= AUTO_REQSENSE;
- pSRB->SavedSGCount = pcmd->use_sg;
- pSRB->SavedTotXLen = pSRB->TotalXferredLen;
- pSRB->AdaptStatus = 0;
- pSRB->TargetStatus = 0; /* CHECK_CONDITION<<1; */
-
- /* We are called from SRBdone, original PCI mapping has been removed
- * already, new one is set up from StartSCSI */
- pSRB->SGIndex = 0;
-
- pSRB->TotalXferredLen = 0;
- pSRB->SGToBeXferLen = 0;
- if (dc390_StartSCSI(pACB, pDCB, pSRB)) {
- dc390_Going_to_Waiting(pDCB, pSRB);
- dc390_waiting_timer(pACB, HZ/5);
- }
-}
-
-
-static void
-dc390_SRBdone( struct dc390_acb* pACB, struct dc390_dcb* pDCB, struct dc390_srb* pSRB )
-{
- u8 bval, status, i;
- struct scsi_cmnd *pcmd;
- PSCSI_INQDATA ptr;
- struct scatterlist *ptr2;
- unsigned long swlval;
-
- pcmd = pSRB->pcmd;
- /* KG: Moved pci_unmap here */
- dc390_pci_unmap(pSRB);
-
- status = pSRB->TargetStatus;
- if (pcmd->use_sg) {
- ptr2 = (struct scatterlist *) (pcmd->request_buffer);
- ptr = (PSCSI_INQDATA) (page_address(ptr2->page) + ptr2->offset);
- } else
- ptr = (PSCSI_INQDATA) (pcmd->request_buffer);
-
- DEBUG0(printk (" SRBdone (%02x,%08x), SRB %p, pid %li\n", status, pcmd->result,\
- pSRB, pcmd->pid));
- if(pSRB->SRBFlag & AUTO_REQSENSE)
- { /* Last command was a Request Sense */
- pSRB->SRBFlag &= ~AUTO_REQSENSE;
- pSRB->AdaptStatus = 0;
- pSRB->TargetStatus = CHECK_CONDITION << 1;
-
- //pcmd->result = MK_RES(DRIVER_SENSE,DID_OK,0,status);
- if (status == (CHECK_CONDITION << 1))
- {
- pcmd->result = MK_RES_LNX(0,DID_BAD_TARGET,0,/*CHECK_CONDITION*/0);
- goto ckc_e;
- }
- if(pSRB->RetryCnt == 0)
- {
- //(u32)(pSRB->pcmd->cmnd[0]) = pSRB->Segment0[0];
- pSRB->TotalXferredLen = pSRB->SavedTotXLen;
- if( (pSRB->TotalXferredLen) &&
- (pSRB->TotalXferredLen >= pcmd->underflow) )
- SET_RES_DID(pcmd->result,DID_OK)
- else
- pcmd->result = MK_RES_LNX(DRIVER_SENSE,DID_OK,0,CHECK_CONDITION);
- REMOVABLEDEBUG(printk(KERN_INFO "Cmd=%02x,Result=%08x,XferL=%08x\n",pSRB->pcmd->cmnd[0],\
- (u32) pcmd->result, (u32) pSRB->TotalXferredLen));
- goto ckc_e;
- }
- else /* Retry */
- {
- pSRB->RetryCnt--;
- pSRB->AdaptStatus = 0;
- pSRB->TargetStatus = 0;
- /* Don't retry on TEST_UNIT_READY */
- if( pSRB->pcmd->cmnd[0] == TEST_UNIT_READY /* || pSRB->pcmd->cmnd[0] == START_STOP */)
- {
- pcmd->result = MK_RES_LNX(DRIVER_SENSE,DID_OK,0,CHECK_CONDITION);
- REMOVABLEDEBUG(printk(KERN_INFO "Cmd=%02x, Result=%08x, XferL=%08x\n",pSRB->pcmd->cmnd[0],\
- (u32) pcmd->result, (u32) pSRB->TotalXferredLen));
- goto ckc_e;
- }
- SET_RES_DRV(pcmd->result,DRIVER_SENSE);
- pcmd->use_sg = pSRB->SavedSGCount;
- //pSRB->ScsiCmdLen = (u8) (pSRB->Segment1[0] >> 8);
- DEBUG0 (printk ("DC390: RETRY pid %li (%02x), target %02i-%02i\n", pcmd->pid, pcmd->cmnd[0], pcmd->device->id, pcmd->device->lun));
- pSRB->SGIndex = 0;
- pSRB->TotalXferredLen = 0;
- pSRB->SGToBeXferLen = 0;
-
- if( dc390_StartSCSI( pACB, pDCB, pSRB ) ) {
- dc390_Going_to_Waiting ( pDCB, pSRB );
- dc390_waiting_timer (pACB, HZ/5);
- }
- return;
- }
- }
- if( status )
- {
- if( status_byte(status) == CHECK_CONDITION )
- {
- REMOVABLEDEBUG(printk (KERN_INFO "DC390: Check_Condition (Cmd %02x, Id %02x, LUN %02x)\n",\
- pcmd->cmnd[0], pDCB->TargetID, pDCB->TargetLUN));
- if( (pSRB->SGIndex < pSRB->SGcount) && (pSRB->SGcount) && (pSRB->SGToBeXferLen) )
- {
- bval = pSRB->SGcount;
- swlval = 0;
- ptr2 = pSRB->pSegmentList;
- for( i=pSRB->SGIndex; i < bval; i++)
- {
- swlval += sg_dma_len(ptr2);
- ptr2++;
- }
- REMOVABLEDEBUG(printk(KERN_INFO "XferredLen=%08x,NotXferLen=%08x\n",\
- (u32) pSRB->TotalXferredLen, (u32) swlval));
- }
- dc390_RequestSense( pACB, pDCB, pSRB );
- return;
- }
- else if( status_byte(status) == QUEUE_FULL )
- {
- bval = (u8) pDCB->GoingSRBCnt;
- bval--;
- pDCB->MaxCommand = bval;
- dc390_freetag (pDCB, pSRB);
- dc390_Going_to_Waiting ( pDCB, pSRB );
- dc390_waiting_timer (pACB, HZ/5);
- pSRB->AdaptStatus = 0;
- pSRB->TargetStatus = 0;
- return;
- }
- else if(status == SCSI_STAT_SEL_TIMEOUT)
- {
- pSRB->AdaptStatus = H_SEL_TIMEOUT;
- pSRB->TargetStatus = 0;
- pcmd->result = MK_RES(0,DID_NO_CONNECT,0,0);
- /* Devices are removed below ... */
- }
- else if (status_byte(status) == BUSY &&
- (pcmd->cmnd[0] == TEST_UNIT_READY || pcmd->cmnd[0] == INQUIRY) &&
- pACB->scan_devices)
- {
- pSRB->AdaptStatus = 0;
- pSRB->TargetStatus = status;
- pcmd->result = MK_RES(0,0,pSRB->EndMessage,/*status*/0);
- }
- else
- { /* Another error */
- pSRB->AdaptStatus = 0;
- if( pSRB->RetryCnt )
- { /* Retry */
- //printk ("DC390: retry\n");
- pSRB->RetryCnt--;
- pSRB->TargetStatus = 0;
- pSRB->SGIndex = 0;
- pSRB->TotalXferredLen = 0;
- pSRB->SGToBeXferLen = 0;
- if( dc390_StartSCSI( pACB, pDCB, pSRB ) ) {
- dc390_Going_to_Waiting ( pDCB, pSRB );
- dc390_waiting_timer (pACB, HZ/5);
- }
- return;
- }
- else
- { /* Report error */
- //pcmd->result = MK_RES(0, DID_ERROR, pSRB->EndMessage, status);
- SET_RES_DID(pcmd->result,DID_ERROR);
- SET_RES_MSG(pcmd->result,pSRB->EndMessage);
- SET_RES_TARGET(pcmd->result,status);
- }
- }
- }
- else
- { /* Target status == 0 */
- status = pSRB->AdaptStatus;
- if(status & H_OVER_UNDER_RUN)
- {
- pSRB->TargetStatus = 0;
- SET_RES_DID(pcmd->result,DID_OK);
- SET_RES_MSG(pcmd->result,pSRB->EndMessage);
- }
- else if( pSRB->SRBStatus & PARITY_ERROR)
- {
- //pcmd->result = MK_RES(0,DID_PARITY,pSRB->EndMessage,0);
- SET_RES_DID(pcmd->result,DID_PARITY);
- SET_RES_MSG(pcmd->result,pSRB->EndMessage);
- }
- else /* No error */
- {
- pSRB->AdaptStatus = 0;
- pSRB->TargetStatus = 0;
- SET_RES_DID(pcmd->result,DID_OK);
- }
- }
- if ((pcmd->result & RES_DID) == 0 &&
- pcmd->cmnd[0] == INQUIRY &&
- pcmd->cmnd[2] == 0 &&
- pcmd->request_bufflen >= 8 &&
- ptr &&
- (ptr->Vers & 0x07) >= 2)
- pDCB->Inquiry7 = ptr->Flags;
-
-ckc_e:
- if( pcmd->cmnd[0] == INQUIRY &&
- (pcmd->result == (DID_OK << 16) || status_byte(pcmd->result) & CHECK_CONDITION) )
- {
- if ((ptr->DevType & SCSI_DEVTYPE) != TYPE_NODEV)
- {
- /* device found: add */
- dc390_add_dev (pACB, pDCB, ptr);
- }
- }
-
- pcmd->resid = pcmd->request_bufflen - pSRB->TotalXferredLen;
-
- dc390_Going_remove (pDCB, pSRB);
- /* Add to free list */
- dc390_Free_insert (pACB, pSRB);
-
- DEBUG0(printk (KERN_DEBUG "DC390: SRBdone: done pid %li\n", pcmd->pid));
- pcmd->scsi_done (pcmd);
-
- dc390_Waiting_process (pACB);
- return;
-}
-
-
-/* Remove all SRBs from Going list and inform midlevel */
-static void
-dc390_DoingSRB_Done(struct dc390_acb* pACB, struct scsi_cmnd *cmd)
-{
- struct dc390_dcb *pDCB, *pdcb;
- struct dc390_srb *psrb, *psrb2;
- u8 i;
- struct scsi_cmnd *pcmd;
-
- pDCB = pACB->pLinkDCB;
- pdcb = pDCB;
- if (! pdcb) return;
- do
- {
- psrb = pdcb->pGoingSRB;
- for( i=0; i<pdcb->GoingSRBCnt; i++)
- {
- psrb2 = psrb->pNextSRB;
- pcmd = psrb->pcmd;
- dc390_Free_insert (pACB, psrb);
- psrb = psrb2;
- }
- pdcb->GoingSRBCnt = 0;
- pdcb->pGoingSRB = NULL;
- pdcb->TagMask = 0;
- pdcb = pdcb->pNextDCB;
- } while( pdcb != pDCB );
-}
-
-
-static void
-dc390_ResetSCSIBus( struct dc390_acb* pACB )
-{
- //DC390_write8 (ScsiCmd, RST_DEVICE_CMD);
- //udelay (250);
- //DC390_write8 (ScsiCmd, NOP_CMD);
-
- DC390_write8 (ScsiCmd, CLEAR_FIFO_CMD);
- DC390_write8 (DMA_Cmd, DMA_IDLE_CMD);
- DC390_write8 (ScsiCmd, RST_SCSI_BUS_CMD);
- pACB->Connected = 0;
-
- return;
-}
-
-static void
-dc390_ScsiRstDetect( struct dc390_acb* pACB )
-{
- printk ("DC390: Rst_Detect: laststat = %08x\n", dc390_laststatus);
- //DEBUG0(printk(KERN_INFO "RST_DETECT,"));
-
- if (timer_pending (&pACB->Waiting_Timer)) del_timer (&pACB->Waiting_Timer);
- DC390_write8 (DMA_Cmd, DMA_IDLE_CMD);
- /* Unlock before ? */
- /* delay half a second */
- udelay (1000);
- DC390_write8 (ScsiCmd, CLEAR_FIFO_CMD);
- pACB->pScsiHost->last_reset = jiffies + 5*HZ/2
- + HZ * dc390_eepromBuf[pACB->AdapterIndex][EE_DELAY];
- pACB->Connected = 0;
-
- if( pACB->ACBFlag & RESET_DEV )
- pACB->ACBFlag |= RESET_DONE;
- else
- { /* Reset was issued by sb else */
- pACB->ACBFlag |= RESET_DETECT;
-
- dc390_ResetDevParam( pACB );
- dc390_DoingSRB_Done( pACB, NULL );
- //dc390_RecoverSRB( pACB );
- pACB->pActiveDCB = NULL;
- pACB->ACBFlag = 0;
- dc390_Waiting_process( pACB );
- }
- return;
-}
+++ /dev/null
-/*
- * linux/drivers/char/hcdp_serial.c
- *
- * Copyright (C) 2002 Hewlett-Packard Co.
- * Khalid Aziz <khalid_aziz@hp.com>
- *
- * Parse the EFI HCDP table to locate serial console and debug ports and
- * initialize them.
- *
- * 2002/08/29 davidm Adjust it to new 2.5 serial driver infrastructure.
- */
-
-#include <linux/config.h>
-#include <linux/console.h>
-#include <linux/kernel.h>
-#include <linux/efi.h>
-#include <linux/init.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/types.h>
-#include <linux/acpi.h>
-
-#include <asm/io.h>
-#include <asm/serial.h>
-#include <asm/acpi.h>
-
-#include "8250_hcdp.h"
-
-#undef SERIAL_DEBUG_HCDP
-
-/*
- * Parse the HCDP table to find descriptions for headless console and debug
- * serial ports and add them to rs_table[]. A pointer to HCDP table is
- * passed as parameter. This function should be called before
- * serial_console_init() is called to make sure the HCDP serial console will
- * be available for use. IA-64 kernel calls this function from setup_arch()
- * after the EFI and ACPI tables have been parsed.
- */
-void __init
-setup_serial_hcdp(void *tablep)
-{
- hcdp_dev_t *hcdp_dev;
- struct uart_port port;
- unsigned long iobase;
- hcdp_t hcdp;
- int gsi, nr;
- static char options[16];
-#if 0
- static int shift_once = 1;
-#endif
-
-#ifdef SERIAL_DEBUG_HCDP
- printk("Entering setup_serial_hcdp()\n");
-#endif
-
- /* Verify we have a valid table pointer */
- if (!tablep)
- return;
-
- memset(&port, 0, sizeof(port));
-
- /*
- * Don't trust firmware to give us a table starting at an aligned
- * address. Make a local copy of the HCDP table with aligned
- * structures.
- */
- memcpy(&hcdp, tablep, sizeof(hcdp));
-
- /*
- * Perform a sanity check on the table. Table should have a signature
- * of "HCDP" and it should be atleast 82 bytes long to have any
- * useful information.
- */
- if ((strncmp(hcdp.signature, HCDP_SIGNATURE, HCDP_SIG_LEN) != 0))
- return;
- if (hcdp.len < 82)
- return;
-
-#ifdef SERIAL_DEBUG_HCDP
- printk("setup_serial_hcdp(): table pointer = 0x%p, sig = '%.4s'\n",
- tablep, hcdp.signature);
- printk(" length = %d, rev = %d, ", hcdp.len, hcdp.rev);
- printk("OEM ID = %.6s, # of entries = %d\n", hcdp.oemid,
- hcdp.num_entries);
-#endif
-
- /*
- * Parse each device entry
- */
- for (nr = 0; nr < hcdp.num_entries; nr++) {
- hcdp_dev = hcdp.hcdp_dev + nr;
- /*
- * We will parse only the primary console device which is
- * the first entry for these devices. We will ignore rest
- * of the entries for the same type device that has already
- * been parsed and initialized
- */
- if (hcdp_dev->type != HCDP_DEV_CONSOLE)
- continue;
-
- iobase = ((u64) hcdp_dev->base_addr.addrhi << 32) |
- hcdp_dev->base_addr.addrlo;
- gsi = hcdp_dev->global_int;
-
- /* See PCI spec v2.2, Appendix D (Class Codes): */
- switch (hcdp_dev->pci_prog_intfc) {
- case 0x00:
- port.type = PORT_8250;
- break;
- case 0x01:
- port.type = PORT_16450;
- break;
- case 0x02:
- port.type = PORT_16550;
- break;
- case 0x03:
- port.type = PORT_16650;
- break;
- case 0x04:
- port.type = PORT_16750;
- break;
- case 0x05:
- port.type = PORT_16850;
- break;
- case 0x06:
- port.type = PORT_16C950;
- break;
- default:
- printk(KERN_WARNING "warning: EFI HCDP table reports "
- "unknown serial programming interface 0x%02x; "
- "will autoprobe.\n", hcdp_dev->pci_prog_intfc);
- port.type = PORT_UNKNOWN;
- break;
- }
-
-#ifdef SERIAL_DEBUG_HCDP
- printk(" type = %s, uart = %d\n",
- ((hcdp_dev->type == HCDP_DEV_CONSOLE) ?
- "Headless Console" :
- ((hcdp_dev->type == HCDP_DEV_DEBUG) ?
- "Debug port" : "Huh????")), port.type);
- printk(" base address space = %s, base address = 0x%lx\n",
- ((hcdp_dev->base_addr.space_id == ACPI_MEM_SPACE) ?
- "Memory Space" :
- ((hcdp_dev->base_addr.space_id == ACPI_IO_SPACE) ?
- "I/O space" : "PCI space")),
- iobase);
- printk(" gsi = %d, baud rate = %lu, bits = %d, clock = %d\n",
- gsi, (unsigned long) hcdp_dev->baud, hcdp_dev->bits,
- hcdp_dev->clock_rate);
- if (HCDP_PCI_UART(hcdp_dev))
- printk(" PCI id: %02x:%02x:%02x, vendor ID=0x%x, "
- "dev ID=0x%x\n", hcdp_dev->pci_seg,
- hcdp_dev->pci_bus, hcdp_dev->pci_dev,
- hcdp_dev->pci_vendor_id, hcdp_dev->pci_dev_id);
-#endif
- /*
- * Now fill in a port structure to update the 8250 port table..
- */
- if (hcdp_dev->clock_rate)
- port.uartclk = hcdp_dev->clock_rate;
- else
- port.uartclk = BASE_BAUD * 16;
-
- /*
- * Check if this is an I/O mapped address or a memory mapped
- * address
- */
- if (hcdp_dev->base_addr.space_id == ACPI_MEM_SPACE) {
- port.iobase = 0;
- port.mapbase = iobase;
- port.membase = ioremap(iobase, 64);
- port.iotype = SERIAL_IO_MEM;
- } else if (hcdp_dev->base_addr.space_id == ACPI_IO_SPACE) {
- port.iobase = iobase;
- port.mapbase = 0;
- port.membase = NULL;
- port.iotype = SERIAL_IO_PORT;
- } else if (hcdp_dev->base_addr.space_id == ACPI_PCICONF_SPACE) {
- printk(KERN_WARNING"warning: No support for PCI serial console\n");
- return;
- }
-
- if (HCDP_IRQ_SUPPORTED(hcdp_dev)) {
-#ifdef CONFIG_IA64
- if (HCDP_PCI_UART(hcdp_dev))
- port.irq = acpi_register_irq(gsi,
- ACPI_ACTIVE_LOW, ACPI_LEVEL_SENSITIVE);
- else
- port.irq = acpi_register_irq(gsi,
- ACPI_ACTIVE_HIGH, ACPI_EDGE_SENSITIVE);
-#else
- port.irq = gsi;
-#endif
- port.flags |= UPF_AUTO_IRQ;
-
- if (HCDP_PCI_UART(hcdp_dev))
- port.flags |= UPF_SHARE_IRQ;
- }
-
- port.flags |= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_RESOURCES;
-
- /*
- * Note: the above memset() initializes port.line to 0,
- * so we register this port as ttyS0.
- */
- if (early_serial_setup(&port) < 0) {
- printk("setup_serial_hcdp(): early_serial_setup() "
- "for HCDP serial console port failed. "
- "Will try any additional consoles in HCDP.\n");
- memset(&port, 0, sizeof(port));
- continue;
- }
-
- if (efi_uart_console_only()) {
- snprintf(options, sizeof(options), "%lun%d",
- hcdp_dev->baud, hcdp_dev->bits);
- add_preferred_console("ttyS", port.line, options);
- }
- break;
- }
-
-#ifdef SERIAL_DEBUG_HCDP
- printk("Leaving setup_serial_hcdp()\n");
-#endif
-}
-
-#ifdef CONFIG_IA64_EARLY_PRINTK_UART
-unsigned long
-hcdp_early_uart (void)
-{
- efi_system_table_t *systab;
- efi_config_table_t *config_tables;
- unsigned long addr = 0;
- hcdp_t *hcdp = 0;
- hcdp_dev_t *dev;
- int i;
-
- systab = (efi_system_table_t *) ia64_boot_param->efi_systab;
- if (!systab)
- return 0;
- systab = __va(systab);
-
- config_tables = (efi_config_table_t *) systab->tables;
- if (!config_tables)
- return 0;
- config_tables = __va(config_tables);
-
- for (i = 0; i < systab->nr_tables; i++) {
- if (efi_guidcmp(config_tables[i].guid, HCDP_TABLE_GUID) == 0) {
- hcdp = (hcdp_t *) config_tables[i].table;
- break;
- }
- }
- if (!hcdp)
- return 0;
- hcdp = __va(hcdp);
-
- for (i = 0, dev = hcdp->hcdp_dev; i < hcdp->num_entries; i++, dev++) {
- if (dev->type == HCDP_DEV_CONSOLE) {
- addr = (u64) dev->base_addr.addrhi << 32 | dev->base_addr.addrlo;
- break;
- }
- }
- return addr;
-}
-#endif /* CONFIG_IA64_EARLY_PRINTK_UART */
+++ /dev/null
-/*
- * drivers/serial/8250_hcdp.h
- *
- * Copyright (C) 2002 Hewlett-Packard Co.
- * Khalid Aziz <khalid_aziz@hp.com>
- *
- * Definitions for HCDP defined serial ports (Serial console and debug
- * ports)
- */
-
-/* ACPI table signatures */
-#define HCDP_SIG_LEN 4
-#define HCDP_SIGNATURE "HCDP"
-
-/* Space ID as defined in ACPI generic address structure */
-#define ACPI_MEM_SPACE 0
-#define ACPI_IO_SPACE 1
-#define ACPI_PCICONF_SPACE 2
-
-/*
- * Maximum number of HCDP devices we want to read in
- */
-#define MAX_HCDP_DEVICES 6
-
-/*
- * Default UART clock rate if clock rate is 0 in HCDP table.
- */
-#define DEFAULT_UARTCLK 115200
-
-/*
- * ACPI Generic Address Structure
- */
-typedef struct {
- u8 space_id;
- u8 bit_width;
- u8 bit_offset;
- u8 resv;
- u32 addrlo;
- u32 addrhi;
-} acpi_gen_addr;
-
-/* HCDP Device descriptor entry types */
-#define HCDP_DEV_CONSOLE 0
-#define HCDP_DEV_DEBUG 1
-
-/* HCDP Device descriptor type */
-typedef struct {
- u8 type;
- u8 bits;
- u8 parity;
- u8 stop_bits;
- u8 pci_seg;
- u8 pci_bus;
- u8 pci_dev;
- u8 pci_func;
- u64 baud;
- acpi_gen_addr base_addr;
- u16 pci_dev_id;
- u16 pci_vendor_id;
- u32 global_int;
- u32 clock_rate;
- u8 pci_prog_intfc;
- u8 resv;
-} hcdp_dev_t;
-
-/* HCDP Table format */
-typedef struct {
- u8 signature[4];
- u32 len;
- u8 rev;
- u8 chksum;
- u8 oemid[6];
- u8 oem_tabid[8];
- u32 oem_rev;
- u8 creator_id[4];
- u32 creator_rev;
- u32 num_entries;
- hcdp_dev_t hcdp_dev[MAX_HCDP_DEVICES];
-} hcdp_t;
-
-#define HCDP_PCI_UART(x) (x->pci_func & 1UL<<7)
-#define HCDP_IRQ_SUPPORTED(x) (x->pci_func & 1UL<<6)
+++ /dev/null
-/*
- * linux/drivers/serial/serial98.c
- *
- * Driver for NEC PC-9801/PC-9821 standard serial ports
- *
- * Based on drivers/serial/8250.c, by Russell King.
- * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
- *
- * Copyright (C) 2002 Osamu Tomita <tomita@cinet.co.jp>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/tty.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/serial.h>
-#include <linux/console.h>
-#include <linux/sysrq.h>
-#include <linux/serial_reg.h>
-#include <linux/delay.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/pc9800.h>
-#include <asm/pc9800_sca.h>
-
-#if defined(CONFIG_SERIAL98_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
-#define SUPPORT_SYSRQ
-#endif
-
-#include <linux/serial_core.h>
-
-#define SERIAL98_NR 1
-#define SERIAL98_ISR_PASS_LIMIT 256
-#define SERIAL98_EXT 0x434
-
-//#define RX_8251F 0x130 /* In: Receive buffer */
-//#define TX_8251F 0x130 /* Out: Transmit buffer */
-//#define LSR_8251F 0x132 /* In: Line Status Register */
-//#define MSR_8251F 0x134 /* In: Modem Status Register */
-#define IIR_8251F 0x136 /* In: Interrupt ID Register */
-#define FCR_8251F 0x138 /* I/O: FIFO Control Register */
-#define VFAST_8251F 0x13a /* I/O: VFAST mode Register */
-
-#define CMD_8251F 0x32 /* Out: 8251 Command Resister */
-#define IER2_8251F 0x34 /* I/O: Interrupt Enable Register */
-#define IER1_8251F 0x35 /* I/O: Interrupt Enable Register */
-#define IER1_CTL 0x37 /* Out: Interrupt Enable Register */
-#define DIS_RXR_INT 0x00 /* disable RxRDY Interrupt */
-#define ENA_RXR_INT 0x01 /* enable RxRDY Interrupt */
-#define DIS_TXE_INT 0x02 /* disable TxEMPTY Interrupt */
-#define ENA_TXE_INT 0x03 /* enable TxEMPTY Interrupt */
-#define DIS_TXR_INT 0x04 /* disable TxRDY Interrupt */
-#define ENA_TXR_INT 0x05 /* enable TxRDY Interrupt */
-
-#define CMD_RESET 0x40 /* Reset Command */
-#define CMD_RTS 0x20 /* Set RTS line */
-#define CMD_CLR_ERR 0x10 /* Clear error flag */
-#define CMD_BREAK 0x08 /* Send Break */
-#define CMD_RXE 0x04 /* Enable receive */
-#define CMD_DTR 0x02 /* Set DTR line */
-#define CMD_TXE 0x01 /* Enable send */
-#define CMD_DUMMY 0x00 /* Dummy Command */
-
-#define VFAST_ENABLE 0x80 /* V.Fast mode Enable */
-
-/* Interrupt masks */
-#define INTR_8251_TXRE 0x04
-#define INTR_8251_TXEE 0x02
-#define INTR_8251_RXRE 0x01
-/* I/O Port */
-//#define PORT_8251_DATA 0
-//#define PORT_8251_CMD 2
-//#define PORT_8251_MOD 2
-//#define PORT_8251_STS 2
-/* status read */
-#define STAT_8251_TXRDY 0x01
-#define STAT_8251_RXRDY 0x02
-#define STAT_8251_TXEMP 0x04
-#define STAT_8251_PER 0x08
-#define STAT_8251_OER 0x10
-#define STAT_8251_FER 0x20
-#define STAT_8251_BRK 0x40
-#define STAT_8251_DSR 0x80
-#if 1
-#define STAT_8251F_TXEMP 0x01
-#define STAT_8251F_TXRDY 0x02
-#define STAT_8251F_RXRDY 0x04
-#define STAT_8251F_DSR 0x08
-#define STAT_8251F_OER 0x10
-#define STAT_8251F_PER 0x20
-#define STAT_8251F_FER 0x40
-#define STAT_8251F_BRK 0x80
-#else
-#define STAT_8251F_TXEMP 0x01
-#define STAT_8251F_TEMT 0x01
-#define STAT_8251F_TXRDY 0x02
-#define STAT_8251F_THRE 0x02
-#define STAT_8251F_RXRDY 0x04
-#define STAT_8251F_DSR 0x04
-#define STAT_8251F_PER 0x08
-#define STAT_8251F_OER 0x10
-#define STAT_8251F_FER 0x20
-#define STAT_8251F_BRK 0x40
-#endif
-
-/*
- * We wrap our port structure around the generic uart_port.
- */
-struct serial98_port {
- struct uart_port port;
- unsigned int type;
- unsigned int ext;
- unsigned int lsr_break_flag;
- unsigned char cmd;
- unsigned char mode;
- unsigned char msr;
- unsigned char ier;
- unsigned char rxchk;
- unsigned char txemp;
- unsigned char txrdy;
- unsigned char rxrdy;
- unsigned char brk;
- unsigned char fe;
- unsigned char oe;
- unsigned char pe;
- unsigned char dr;
-};
-
-#ifdef CONFIG_SERIAL98_CONSOLE
-static void
-serial98_console_write(struct console *co, const char *s, unsigned int count);
-static int __init serial98_console_setup(struct console *co, char *options);
-
-extern struct uart_driver serial98_reg;
-static struct console serial98_console = {
- .name = "ttyS",
- .write = serial98_console_write,
- .device = uart_console_device,
- .setup = serial98_console_setup,
- .flags = CON_PRINTBUFFER,
- .index = -1,
- .data = &serial98_reg,
-};
-
-#define SERIAL98_CONSOLE &serial98_console
-#else
-#define SERIAL98_CONSOLE NULL
-#endif
-
-static struct uart_driver serial98_reg = {
- .owner = THIS_MODULE,
- .driver_name = "serial98",
- .dev_name = "ttyS",
- .major = TTY_MAJOR,
- .minor = 64,
- .nr = SERIAL98_NR,
- .cons = SERIAL98_CONSOLE,
-};
-
-static int serial98_clk;
-static char type_str[48];
-
-#define PORT98 ((struct serial98_port *)port)
-#define PORT (PORT98->port)
-
-static void serial98_fifo_enable(struct uart_port *port, int enable)
-{
- unsigned char fcr;
-
- if (PORT.type == PORT_FIFO_PC98 || PORT.type == PORT_VFAST_PC98) {
- fcr = inb(FCR_8251F);
- if (enable)
- fcr |= UART_FCR_ENABLE_FIFO;
- else
- fcr &= ~UART_FCR_ENABLE_FIFO;
- outb(fcr, FCR_8251F);
- }
-
- if (!enable)
- return;
-
- outb(0, 0x5f); /* wait */
- outb(0, 0x5f);
- outb(0, 0x5f);
- outb(0, 0x5f);
-}
-
-static void serial98_cmd_out(struct uart_port *port, unsigned char cmd)
-{
- serial98_fifo_enable(port, 0);
- outb(cmd, CMD_8251F);
- serial98_fifo_enable(port, 1);
-}
-
-static void serial98_mode_set(struct uart_port *port)
-{
- serial98_cmd_out(port, CMD_DUMMY);
- serial98_cmd_out(port, CMD_DUMMY);
- serial98_cmd_out(port, CMD_DUMMY);
- serial98_cmd_out(port, CMD_RESET);
- serial98_cmd_out(port, PORT98->mode);
-}
-
-static unsigned char serial98_msr_in(struct uart_port *port)
-{
- unsigned long flags;
- unsigned int ms, st;
- unsigned int tmp;
-
- spin_lock_irqsave(&PORT.lock, flags);
- if (PORT.type == PORT_FIFO_PC98 || PORT.type == PORT_VFAST_PC98) {
- PORT98->msr = inb(PORT.iobase + 4);
- } else {
- ms = inb(0x33);
- st = inb(0x32);
- tmp = 0;
- if(!(ms & 0x20))
- tmp |= UART_MSR_DCD;
- if(!(ms & 0x80)) {
- tmp |= UART_MSR_RI;
- PORT98->msr |= UART_MSR_RI;
- }
- if(!(ms & 0x40))
- tmp |= UART_MSR_CTS;
- if(st & 0x80)
- tmp |= UART_MSR_DSR;
- PORT98->msr = ((PORT98->msr ^ tmp) >> 4) | tmp;
- }
-
- spin_unlock_irqrestore(&PORT.lock, flags);
- return PORT98->msr;
-}
-
-static void serial98_stop_tx(struct uart_port *port, unsigned int tty_stop)
-{
- unsigned int ier = inb(IER1_8251F);
-
- ier &= ~(INTR_8251_TXRE | INTR_8251_TXEE);
- outb(ier, IER1_8251F);
-}
-
-static void serial98_start_tx(struct uart_port *port, unsigned int tty_start)
-{
- unsigned int ier = inb(IER1_8251F);
-
- ier |= INTR_8251_TXRE | INTR_8251_TXEE;
- outb(ier, IER1_8251F);
-}
-
-static void serial98_stop_rx(struct uart_port *port)
-{
- PORT.read_status_mask &= ~PORT98->dr;
- outb(DIS_RXR_INT, IER1_CTL);
-}
-
-static void serial98_enable_ms(struct uart_port *port)
-{
- outb(PORT98->ier | 0x80, IER2_8251F);
-}
-
-static void serial98_rx_chars(struct uart_port *port, int *status,
- struct pt_regs *regs)
-{
- struct tty_struct *tty = PORT.info->tty;
- unsigned char ch;
- int max_count = 256;
-
- do {
- if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
- tty->flip.work.func((void *)tty);
- if (tty->flip.count >= TTY_FLIPBUF_SIZE)
- return; // if TTY_DONT_FLIP is set
- }
- ch = inb(PORT.iobase);
- *tty->flip.char_buf_ptr = ch;
- *tty->flip.flag_buf_ptr = TTY_NORMAL;
- PORT.icount.rx++;
-
- if (unlikely(*status & (PORT98->brk | PORT98->pe |
- PORT98->fe | PORT98->oe))) {
- /*
- * For statistics only
- */
- if (*status & PORT98->brk) {
- *status &= ~(PORT98->fe | PORT98->pe);
- PORT.icount.brk++;
- /*
- * We do the SysRQ and SAK checking
- * here because otherwise the break
- * may get masked by ignore_status_mask
- * or read_status_mask.
- */
- if (uart_handle_break(&PORT))
- goto ignore_char;
- } else if (*status & PORT98->pe)
- PORT.icount.parity++;
- else if (*status & PORT98->fe)
- PORT.icount.frame++;
- if (*status & PORT98->oe)
- PORT.icount.overrun++;
-
- /*
- * Mask off conditions which should be ingored.
- */
- *status &= PORT.read_status_mask;
-
-#ifdef CONFIG_SERIAL98_CONSOLE
- if (PORT.line == PORT.cons->index) {
- /* Recover the break flag from console xmit */
- *status |= PORT98->lsr_break_flag;
- PORT98->lsr_break_flag = 0;
- }
-#endif
- if (*status & PORT98->brk) {
- *tty->flip.flag_buf_ptr = TTY_BREAK;
- } else if (*status & PORT98->pe)
- *tty->flip.flag_buf_ptr = TTY_PARITY;
- else if (*status & PORT98->fe)
- *tty->flip.flag_buf_ptr = TTY_FRAME;
- }
- if (uart_handle_sysrq_char(&PORT, ch, regs))
- goto ignore_char;
- if ((*status & PORT.ignore_status_mask) == 0) {
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- tty->flip.count++;
- }
- if ((*status & PORT98->oe) &&
- tty->flip.count < TTY_FLIPBUF_SIZE) {
- /*
- * Overrun is special, since it's reported
- * immediately, and doesn't affect the current
- * character.
- */
- *tty->flip.flag_buf_ptr = TTY_OVERRUN;
- tty->flip.flag_buf_ptr++;
- tty->flip.char_buf_ptr++;
- tty->flip.count++;
- }
- ignore_char:
- *status = inb(PORT.iobase + 2);
- } while ((*status & PORT98->rxchk) && (max_count-- > 0));
- tty_flip_buffer_push(tty);
-}
-
-static void serial98_tx_chars(struct uart_port *port)
-{
- struct circ_buf *xmit = &PORT.info->xmit;
- int count;
-
- if (PORT.x_char) {
- outb(PORT.x_char, PORT.iobase);
- PORT.icount.tx++;
- PORT.x_char = 0;
- return;
- }
- if (uart_circ_empty(xmit) || uart_tx_stopped(&PORT)) {
- serial98_stop_tx(port, 0);
- return;
- }
-
- count = PORT.fifosize;
- do {
- outb(xmit->buf[xmit->tail], PORT.iobase);
- xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
- PORT.icount.tx++;
- if (uart_circ_empty(xmit))
- break;
- } while (--count > 0);
-
- if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
- uart_write_wakeup(&PORT);
-
- if (uart_circ_empty(xmit))
- serial98_stop_tx(&PORT, 0);
-}
-
-static void serial98_modem_status(struct uart_port *port)
-{
- int status;
-
- status = serial98_msr_in(port);
-
- if ((status & UART_MSR_ANY_DELTA) == 0)
- return;
-
- if (status & UART_MSR_TERI)
- PORT.icount.rng++;
- if (status & UART_MSR_DDSR)
- PORT.icount.dsr++;
- if (status & UART_MSR_DDCD)
- uart_handle_dcd_change(&PORT, status & UART_MSR_DCD);
- if (status & UART_MSR_DCTS)
- uart_handle_cts_change(&PORT, status & UART_MSR_CTS);
-
- wake_up_interruptible(&PORT.info->delta_msr_wait);
-}
-
-static void serial98_int(int irq, void *port, struct pt_regs *regs)
-{
- unsigned int status;
-
- spin_lock(&PORT.lock);
- status = inb(PORT.iobase + 2);
- if (status & PORT98->rxrdy) {
- serial98_rx_chars(port, &status, regs);
- }
- serial98_modem_status(port);
- if (status & PORT98->txrdy) {
- serial98_tx_chars(port);
- }
- spin_unlock(&PORT.lock);
-}
-
-static unsigned int serial98_tx_empty(struct uart_port *port)
-{
- unsigned long flags;
- unsigned int ret = 0;
-
- spin_lock_irqsave(&PORT.lock, flags);
- if (inb(PORT.iobase + 2) & PORT98->txemp)
- ret = TIOCSER_TEMT;
-
- spin_unlock_irqrestore(&PORT.lock, flags);
- return ret;
-}
-
-static unsigned int serial98_get_mctrl(struct uart_port *port)
-{
- unsigned char status;
- unsigned int ret = 0;
-
- status = serial98_msr_in(port);
- if (status & UART_MSR_DCD)
- ret |= TIOCM_CAR;
- if (status & UART_MSR_RI)
- ret |= TIOCM_RNG;
- if (status & UART_MSR_DSR)
- ret |= TIOCM_DSR;
- if (status & UART_MSR_CTS)
- ret |= TIOCM_CTS;
- return ret;
-}
-
-static void serial98_set_mctrl(struct uart_port *port, unsigned int mctrl)
-{
- PORT98->cmd &= 0xdd;
- if (mctrl & TIOCM_RTS)
- PORT98->cmd |= CMD_RTS;
-
- if (mctrl & TIOCM_DTR)
- PORT98->cmd |= CMD_DTR;
-
- serial98_cmd_out(port, PORT98->cmd);
-}
-
-static void serial98_break_ctl(struct uart_port *port, int break_state)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&PORT.lock, flags);
- if (break_state == -1)
- PORT98->cmd |= CMD_BREAK;
- else
- PORT98->cmd &= ~CMD_BREAK;
-
- serial98_cmd_out(port, PORT98->cmd);
- spin_unlock_irqrestore(&PORT.lock, flags);
-}
-
-static int serial98_startup(struct uart_port *port)
-{
- int retval;
-
- if (PORT.type == PORT_8251_PC98) {
- /* Wake up UART */
- PORT98->mode = 0xfc;
- serial98_mode_set(port);
- outb(DIS_RXR_INT, IER1_CTL);
- outb(DIS_TXE_INT, IER1_CTL);
- outb(DIS_TXR_INT, IER1_CTL);
- PORT98->mode = 0;
- serial98_mode_set(port);
- }
-
- /*
- * Clear the FIFO buffers and disable them.
- * (they will be reeanbled in set_termios())
- */
- if (PORT.type == PORT_FIFO_PC98 || PORT.type == PORT_VFAST_PC98) {
- outb(UART_FCR_ENABLE_FIFO, FCR_8251F);
- outb((UART_FCR_ENABLE_FIFO
- | UART_FCR_CLEAR_RCVR
- | UART_FCR_CLEAR_XMIT), FCR_8251F);
- outb(0, FCR_8251F);
- }
-
- /* Clear the interrupt registers. */
- inb(0x30);
- inb(0x32);
- if (PORT.type == PORT_FIFO_PC98 || PORT.type == PORT_VFAST_PC98) {
- inb(PORT.iobase);
- inb(PORT.iobase + 2);
- inb(PORT.iobase + 4);
- inb(PORT.iobase + 6);
- }
-
- /* Allocate the IRQ */
- retval = request_irq(PORT.irq, serial98_int, 0,
- serial98_reg.driver_name, port);
- if (retval)
- return retval;
-
- /*
- * Now, initialize the UART
- */
- PORT98->mode = 0x4e;
- serial98_mode_set(port);
- PORT98->cmd = 0x15;
- serial98_cmd_out(port, PORT98->cmd);
- PORT98->cmd = 0x05;
-
- /*
- * Finally, enable interrupts
- */
- outb(0x00, IER2_8251F);
- outb(ENA_RXR_INT, IER1_CTL);
-
- /*
- * And clear the interrupt registers again for luck.
- */
- inb(0x30);
- inb(0x32);
- if (PORT.type == PORT_FIFO_PC98 || PORT.type == PORT_VFAST_PC98) {
- inb(PORT.iobase);
- inb(PORT.iobase + 2);
- inb(PORT.iobase + 4);
- inb(PORT.iobase + 6);
- }
-
- return 0;
-}
-
-static void serial98_shutdown(struct uart_port *port)
-{
- unsigned long flags;
-
- /*
- * disable all interrupts
- */
- spin_lock_irqsave(&PORT.lock, flags);
- if (PORT.type == PORT_VFAST_PC98)
- outb(0, VFAST_8251F); /* V.FAST mode off */
-
- /* disnable all modem status interrupt */
- outb(0x80, IER2_8251F);
-
- /* disnable TX/RX interrupt */
- outb(0x00, IER2_8251F);
- outb(DIS_RXR_INT, IER1_CTL);
- outb(DIS_TXE_INT, IER1_CTL);
- outb(DIS_TXR_INT, IER1_CTL);
- PORT98->ier = 0;
-
- spin_unlock_irqrestore(&PORT.lock, flags);
-
- /*
- * Free the interrupt
- */
- free_irq(PORT.irq, port);
-
- /* disable break condition and disable the port */
- serial98_mode_set(port);
-
- /* disable FIFO's */
- if (PORT.type == PORT_FIFO_PC98 || PORT.type == PORT_VFAST_PC98) {
- outb((UART_FCR_ENABLE_FIFO
- | UART_FCR_CLEAR_RCVR
- | UART_FCR_CLEAR_XMIT), FCR_8251F);
- outb(0, FCR_8251F);
- }
-
- inb(PORT.iobase);
-}
-
-static void
-serial98_set_termios(struct uart_port *port, struct termios *termios,
- struct termios *old)
-{
- unsigned char stopbit, cval, fcr = 0, ier = 0;
- unsigned long flags;
- unsigned int baud, quot;
-
- stopbit = 0x80;
- switch (termios->c_cflag & CSIZE) {
- case CS5:
- cval = 0x42;
- stopbit = 0xc0;
- break;
- case CS6:
- cval = 0x46;
- break;
- case CS7:
- cval = 0x4a;
- break;
- default:
- case CS8:
- cval = 0x4e;
- break;
- }
-
- if (termios->c_cflag & CSTOPB)
- cval ^= stopbit;
- if (termios->c_cflag & PARENB)
- cval |= 0x10;
- if (!(termios->c_cflag & PARODD))
- cval |= 0x20;
-
- /*
- * Ask the core to calculate the divisor for us.
- */
- baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
- quot = uart_get_divisor(port, baud);
-
- if (PORT.type == PORT_FIFO_PC98 || PORT.type == PORT_VFAST_PC98) {
- if ((PORT.uartclk / quot) < (2400 * 16))
- fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
- else
- fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
- }
-
- /*
- * Ok, we're now changing the port state. Do it with
- * interrupts disabled.
- */
- spin_lock_irqsave(&PORT.lock, flags);
-
- /*
- * Update the per-port timeout.
- */
- uart_update_timeout(port, termios->c_cflag, baud);
-
- PORT.read_status_mask = PORT98->oe | PORT98->txemp | PORT98->dr;
- if (termios->c_iflag & INPCK)
- PORT.read_status_mask |= PORT98->fe | PORT98->pe;
-
- if (termios->c_iflag & (BRKINT | PARMRK))
- PORT.read_status_mask |= PORT98->brk;
- /*
- * Characters to ignore
- */
- PORT.ignore_status_mask = 0;
- if (termios->c_iflag & IGNPAR)
- PORT.ignore_status_mask |= PORT98->fe | PORT98->pe;
-
- if (termios->c_iflag & IGNBRK) {
- PORT.ignore_status_mask |= PORT98->brk;
- /*
- * If we're ignoring parity and break indicators,
- * ignore overruns too (for real raw support).
- */
- if (termios->c_iflag & IGNPAR)
- PORT.ignore_status_mask |= PORT98->oe;
- }
-
- /*
- * ignore all characters if CREAD is not set
- */
- if ((termios->c_cflag & CREAD) == 0)
- PORT.ignore_status_mask |= PORT98->dr;
-
- /*
- * CTS flow control flag and modem status interrupts
- */
- if (PORT.flags & UPF_HARDPPS_CD)
- ier |= 0x80; /* enable modem status interrupt */
- if (termios->c_cflag & CRTSCTS) {
- ier |= 0x08; /* enable CTS interrupt */
- ier |= 0x80; /* enable modem status interrupt */
- }
- if (!(termios->c_cflag & CLOCAL)) {
- ier |= 0x20; /* enable CD interrupt */
- ier |= 0x80; /* enable modem status interrupt */
- }
- PORT98->ier = ier;
-
- PORT98->mode = cval;
- serial98_mode_set(port);
- if (PORT.type == PORT_VFAST_PC98 && quot <= 48) {
- quot /= 4;
- if (quot < 1)
- quot = 1;
- outb(quot | VFAST_ENABLE, VFAST_8251F);
- } else {
- quot /= 3;
- if (quot < 1)
- quot = 1;
- if (PORT.type == PORT_VFAST_PC98)
- outb(0, VFAST_8251F); /* V.FAST mode off */
- outb(0xb6, 0x77);
- outb(quot & 0xff, 0x75); /* LS of divisor */
- outb(quot >> 8, 0x75); /* MS of divisor */
- }
-
- if (fcr & UART_FCR_ENABLE_FIFO) {
- outb(UART_FCR_ENABLE_FIFO, FCR_8251F);
- outb(fcr, FCR_8251F);
- }
-
- /* enable RX/TX */
- PORT98->cmd = 0x15;
- serial98_cmd_out(port, PORT98->cmd);
- PORT98->cmd = 0x05;
- /* enable interrupts */
- outb(0x00, IER2_8251F);
- outb(ENA_RXR_INT, IER1_CTL);
- spin_unlock_irqrestore(&PORT.lock, flags);
-}
-
-static const char *serial98_type(struct uart_port *port)
-{
- char *p;
-
- switch (PORT.type) {
- case PORT_8251_PC98:
- p = "PC98 onboard legacy 8251";
- break;
- case PORT_19K_PC98:
- p = "PC98 onboard max 19200bps";
- break;
- case PORT_FIFO_PC98:
- p = "PC98 onboard with FIFO";
- break;
- case PORT_VFAST_PC98:
- p = "PC98 onboard V.FAST";
- break;
- case PORT_PC9861:
- p = "PC-9861K RS-232C ext. board";
- break;
- case PORT_PC9801_101:
- p = "PC-9801-101 RS-232C ext. board";
- break;
- default:
- return NULL;
- }
-
- sprintf(type_str, "%s Clock %dMHz", p, serial98_clk);
- return type_str;
-}
-
-/* Release the region(s) being used by 'port' */
-static void serial98_release_port(struct uart_port *port)
-{
- switch (PORT.type) {
- case PORT_VFAST_PC98:
- release_region(PORT.iobase + 0xa, 1);
- case PORT_FIFO_PC98:
- release_region(PORT.iobase + 8, 1);
- release_region(PORT.iobase + 6, 1);
- release_region(PORT.iobase + 4, 1);
- release_region(PORT.iobase + 2, 1);
- release_region(PORT.iobase, 1);
- case PORT_19K_PC98:
- release_region(SERIAL98_EXT, 1);
- release_region(0x34, 1);
- case PORT_8251_PC98:
- release_region(0x32, 1);
- release_region(0x30, 1);
- }
-}
-
-/* Request the region(s) being used by 'port' */
-#define REQ_REGION98(base) (request_region((base), 1, serial98_reg.driver_name))
-static int serial98_request_region(unsigned int type)
-{
- if (!REQ_REGION98(0x30))
- return -EBUSY;
- if (REQ_REGION98(0x32)) {
- if (type == PORT_8251_PC98)
- return 0;
- if (REQ_REGION98(0x34)) {
- if (REQ_REGION98(SERIAL98_EXT)) {
- unsigned long base;
-
- if (type == PORT_19K_PC98)
- return 0;
- for (base = 0x130; base <= 0x138; base += 2) {
- if (!REQ_REGION98(base)) {
- base -= 2;
- goto err;
- }
- }
- if (type == PORT_FIFO_PC98)
- return 0;
- if (type == PORT_VFAST_PC98) {
- if (REQ_REGION98(0x13a))
- return 0;
- }
- err:
- while (base >= 0x130) {
- release_region(base, 1);
- base -= 2;
- }
- release_region(SERIAL98_EXT, 1);
- }
- release_region(0x34, 1);
- }
- release_region(0x32, 1);
- }
- release_region(0x30, 1);
- return -EBUSY;
-}
-
-static int serial98_request_port(struct uart_port *port)
-{
- return serial98_request_region(PORT.type);
-}
-
-/*
- * Configure/autoconfigure the port.
- */
-static void serial98_config_port(struct uart_port *port, int flags)
-{
- if (flags & UART_CONFIG_TYPE)
- PORT.type = PORT98->type;
-}
-
-/*
- * verify the new serial_struct (for TIOCSSERIAL).
- */
-static int serial98_verify_port(struct uart_port *port, struct serial_struct *ser)
-{
- switch (ser->type) {
- case PORT_VFAST_PC98:
- case PORT_FIFO_PC98:
- case PORT_19K_PC98:
- case PORT_8251_PC98:
- /* not implemented yet
- case PORT_PC9861:
- case PORT_PC9801_101:
- */
- case PORT_UNKNOWN:
- break;
- default:
- return -EINVAL;
- }
- if (ser->irq < 0 || ser->irq >= NR_IRQS)
- return -EINVAL;
- if (ser->baud_base < 9600)
- return -EINVAL;
- return 0;
-}
-
-static struct uart_ops serial98_ops = {
- .tx_empty = serial98_tx_empty,
- .set_mctrl = serial98_set_mctrl,
- .get_mctrl = serial98_get_mctrl,
- .stop_tx = serial98_stop_tx,
- .start_tx = serial98_start_tx,
- .stop_rx = serial98_stop_rx,
- .enable_ms = serial98_enable_ms,
- .break_ctl = serial98_break_ctl,
- .startup = serial98_startup,
- .shutdown = serial98_shutdown,
- .set_termios = serial98_set_termios,
- .type = serial98_type,
- .release_port = serial98_release_port,
- .request_port = serial98_request_port,
- .config_port = serial98_config_port,
- .verify_port = serial98_verify_port,
-};
-
-static struct serial98_port serial98_ports[SERIAL98_NR] = {
- {
- .port = {
- .iobase = 0x30,
- .iotype = SERIAL_IO_PORT,
- .irq = 4,
- .fifosize = 1,
- .ops = &serial98_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
- .line = 0,
- },
- .rxchk = STAT_8251_RXRDY,
- .txemp = STAT_8251_TXEMP,
- .txrdy = STAT_8251_TXRDY,
- .rxrdy = STAT_8251_RXRDY,
- .brk = STAT_8251_BRK,
- .fe = STAT_8251_FER,
- .oe = STAT_8251_OER,
- .pe = STAT_8251_PER,
- .dr = STAT_8251_DSR,
- },
-};
-
-#ifdef CONFIG_SERIAL98_CONSOLE
-
-#define BOTH_EMPTY (PORT98->txemp | PORT98->txrdy)
-
-/*
- * Wait for transmitter & holding register to empty
- */
-static inline void wait_for_xmitr(struct uart_port *port)
-{
- unsigned int status, tmout = 10000;
-
- /* Wait up to 10ms for the character(s) to be sent. */
- do {
- status = inb(PORT.iobase + 2);
-
- if (status & PORT98->brk)
- PORT98->lsr_break_flag = PORT98->brk;
-
- if (--tmout == 0)
- break;
- udelay(1);
- } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
-
- /* Wait up to 1s for flow control if necessary */
- if (PORT.flags & UPF_CONS_FLOW) {
- tmout = 1000000;
- while (--tmout &&
- ((serial98_msr_in(port) & UART_MSR_CTS) == 0))
- udelay(1);
- }
-}
-
-/*
- * Print a string to the serial port trying not to disturb
- * any possible real use of the port...
- *
- * The console_lock must be held when we get here.
- */
-static void
-serial98_console_write(struct console *co, const char *s, unsigned int count)
-{
- struct uart_port *port = (struct uart_port *)&serial98_ports[co->index];
- unsigned int ier1, ier2;
- int i;
-
- /*
- * First save the UER then disable the interrupts
- */
- ier1 = inb(IER1_8251F);
- ier2 = inb(IER2_8251F);
- /* disnable all modem status interrupt */
- outb(0x80, IER2_8251F);
-
- /* disnable TX/RX interrupt */
- outb(0x00, IER2_8251F);
- outb(DIS_RXR_INT, IER1_CTL);
- outb(DIS_TXE_INT, IER1_CTL);
- outb(DIS_TXR_INT, IER1_CTL);
-
- /*
- * Now, do each character
- */
- for (i = 0; i < count; i++, s++) {
- wait_for_xmitr(port);
-
- /*
- * Send the character out.
- * If a LF, also do CR...
- */
- outb(*s, PORT.iobase);
- if (*s == 10) {
- wait_for_xmitr(port);
- outb(13, PORT.iobase);
- }
- }
-
- /*
- * Finally, wait for transmitter to become empty
- * and restore the IER
- */
- wait_for_xmitr(port);
-
- /* restore TX/RX interrupt */
- outb(0x00, IER2_8251F);
- if (ier1 & 0x01)
- outb(ENA_RXR_INT, IER1_CTL);
- if (ier1 & 0x02)
- outb(ENA_TXE_INT, IER1_CTL);
- if (ier1 & 0x04)
- outb(ENA_TXR_INT, IER1_CTL);
-
- /* restore modem status interrupt */
- outb(ier2, IER2_8251F);
-}
-
-static int __init serial98_console_setup(struct console *co, char *options)
-{
- struct uart_port *port;
- int baud = 9600;
- int bits = 8;
- int parity = 'n';
- int flow = 'n';
-
- /*
- * Check whether an invalid uart number has been specified, and
- * if so, search for the first available port that does have
- * console support.
- */
- if (co->index >= SERIAL98_NR)
- co->index = 0;
- port = &serial98_ports[co->index].port;
-
- /*
- * Temporary fix.
- */
- spin_lock_init(&port->lock);
-
- if (options)
- uart_parse_options(options, &baud, &parity, &bits, &flow);
-
- return uart_set_options(port, co, baud, parity, bits, flow);
-}
-
-void __init serial98_console_init(void)
-{
- register_console(&serial98_console);
-}
-
-#endif /* CONFIG_SERIAL98_CONSOLE */
-
-
-static int __init serial98_init(void)
-{
- int ret;
- unsigned char iir1, iir2;
-
- if (PC9800_8MHz_P()) {
- serial98_clk = 8;
- serial98_ports[0].port.uartclk = 374400 * 16;
- } else {
- serial98_clk = 5;
- serial98_ports[0].port.uartclk = 460800 * 16;
- }
-
- printk(KERN_INFO "serial98: PC-9801 standard serial port driver Version 0.1alpha\n");
- serial98_ports[0].type = PORT_8251_PC98;
- /* Check FIFO exist */
- iir1 = inb(IIR_8251F);
- iir2 = inb(IIR_8251F);
- if ((iir1 & 0x40) != (iir2 & 0x40) && (iir1 & 0x20) == (iir2 & 0x20)) {
- serial98_ports[0].port.iobase = 0x130;
- serial98_ports[0].port.fifosize = 16;
- serial98_ports[0].rxchk = STAT_8251F_DSR;
- serial98_ports[0].txemp = STAT_8251F_TXEMP;
- serial98_ports[0].txrdy = STAT_8251F_TXRDY;
- serial98_ports[0].rxrdy = STAT_8251F_RXRDY;
- serial98_ports[0].brk = STAT_8251F_BRK;
- serial98_ports[0].fe = STAT_8251F_FER;
- serial98_ports[0].oe = STAT_8251F_OER;
- serial98_ports[0].pe = STAT_8251F_PER;
- serial98_ports[0].dr = STAT_8251F_DSR;
-
- if (*(unsigned char*)__va(PC9821SCA_RSFLAGS) & 0x10)
- serial98_ports[0].type = PORT_VFAST_PC98;
- else {
- outb(serial98_ports[0].ext | 0x40, SERIAL98_EXT);
- serial98_ports[0].port.uartclk *= 4;
- serial98_ports[0].type = PORT_FIFO_PC98;
- }
- } else if ((serial98_ports[0].ext = inb(SERIAL98_EXT)) != 0xff) {
- outb(serial98_ports[0].ext | 0x40, SERIAL98_EXT);
- if (inb(SERIAL98_EXT) == (serial98_ports[0].ext | 0x40)) {
- serial98_ports[0].port.uartclk *= 4;
- serial98_ports[0].type = PORT_19K_PC98;
- } else {
- serial98_ops.enable_ms = NULL;
- outb(serial98_ports[0].ext, SERIAL98_EXT);
- }
- }
-
- if (serial98_request_region(serial98_ports[0].type))
- return -EBUSY;
-
- ret = uart_register_driver(&serial98_reg);
- if (ret == 0) {
- int i;
-
- for (i = 0; i < SERIAL98_NR; i++) {
- uart_add_one_port(&serial98_reg,
- (struct uart_port *)&serial98_ports[i]);
- }
- }
-
- return ret;
-}
-
-static void __exit serial98_exit(void)
-{
- int i;
-
- if (serial98_ports[0].type == PORT_19K_PC98
- || serial98_ports[0].type == PORT_FIFO_PC98)
- outb(serial98_ports[0].ext, SERIAL98_EXT);
-
- for (i = 0; i < SERIAL98_NR; i++) {
- uart_remove_one_port(&serial98_reg,
- (struct uart_port *)&serial98_ports[i]);
- }
-
- uart_unregister_driver(&serial98_reg);
-}
-
-module_init(serial98_init);
-module_exit(serial98_exit);
-
-MODULE_AUTHOR("Osamu Tomita <tomita@cinet.co.jp>");
-MODULE_DESCRIPTION("PC-9801 standard serial port driver Version 0.1alpha");
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * drivers/usb/core/driverfs.c
- *
- * (C) Copyright 2002 David Brownell
- * (C) Copyright 2002 Greg Kroah-Hartman
- * (C) Copyright 2002 IBM Corp.
- *
- * All of the driverfs file attributes for usb devices and interfaces.
- *
- */
-
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-
-#ifdef CONFIG_USB_DEBUG
- #define DEBUG
-#else
- #undef DEBUG
-#endif
-#include <linux/usb.h>
-
-#include "usb.h"
-
-/* Active configuration fields */
-#define usb_actconfig_show(field, multiplier, format_string) \
-static ssize_t show_##field (struct device *dev, char *buf) \
-{ \
- struct usb_device *udev; \
- \
- udev = to_usb_device (dev); \
- if (udev->actconfig) \
- return sprintf (buf, format_string, \
- udev->actconfig->desc.field * multiplier); \
- else \
- return 0; \
-} \
-
-#define usb_actconfig_attr(field, multiplier, format_string) \
-usb_actconfig_show(field, multiplier, format_string) \
-static DEVICE_ATTR(field, S_IRUGO, show_##field, NULL);
-
-usb_actconfig_attr (bNumInterfaces, 1, "%2d\n")
-usb_actconfig_attr (bmAttributes, 1, "%2x\n")
-usb_actconfig_attr (bMaxPower, 2, "%3dmA\n")
-
-/* configuration value is always present, and r/w */
-usb_actconfig_show(bConfigurationValue, 1, "%u\n");
-
-static ssize_t
-set_bConfigurationValue (struct device *dev, const char *buf, size_t count)
-{
- struct usb_device *udev = udev = to_usb_device (dev);
- int config, value;
-
- if (sscanf (buf, "%u", &config) != 1 || config > 255)
- return -EINVAL;
- down(&udev->serialize);
- value = usb_set_configuration (udev, config);
- up(&udev->serialize);
- return (value < 0) ? value : count;
-}
-
-static DEVICE_ATTR(bConfigurationValue, S_IRUGO | S_IWUSR,
- show_bConfigurationValue, set_bConfigurationValue);
-
-/* String fields */
-#define usb_string_attr(name, field) \
-static ssize_t show_##name(struct device *dev, char *buf) \
-{ \
- struct usb_device *udev; \
- int len; \
- \
- udev = to_usb_device (dev); \
- len = usb_string(udev, udev->descriptor.field, buf, PAGE_SIZE); \
- if (len < 0) \
- return 0; \
- buf[len] = '\n'; \
- buf[len+1] = 0; \
- return len+1; \
-} \
-static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL);
-
-usb_string_attr(product, iProduct);
-usb_string_attr(manufacturer, iManufacturer);
-usb_string_attr(serial, iSerialNumber);
-
-static ssize_t
-show_speed (struct device *dev, char *buf)
-{
- struct usb_device *udev;
- char *speed;
-
- udev = to_usb_device (dev);
-
- switch (udev->speed) {
- case USB_SPEED_LOW:
- speed = "1.5";
- break;
- case USB_SPEED_UNKNOWN:
- case USB_SPEED_FULL:
- speed = "12";
- break;
- case USB_SPEED_HIGH:
- speed = "480";
- break;
- default:
- speed = "unknown";
- }
- return sprintf (buf, "%s\n", speed);
-}
-static DEVICE_ATTR(speed, S_IRUGO, show_speed, NULL);
-
-static ssize_t
-show_devnum (struct device *dev, char *buf)
-{
- struct usb_device *udev;
-
- udev = to_usb_device (dev);
- return sprintf (buf, "%d\n", udev->devnum);
-}
-static DEVICE_ATTR(devnum, S_IRUGO, show_devnum, NULL);
-
-static ssize_t
-show_version (struct device *dev, char *buf)
-{
- struct usb_device *udev;
-
- udev = to_usb_device (dev);
- return sprintf (buf, "%2x.%02x\n", udev->descriptor.bcdUSB >> 8,
- udev->descriptor.bcdUSB & 0xff);
-}
-static DEVICE_ATTR(version, S_IRUGO, show_version, NULL);
-
-static ssize_t
-show_maxchild (struct device *dev, char *buf)
-{
- struct usb_device *udev;
-
- udev = to_usb_device (dev);
- return sprintf (buf, "%d\n", udev->maxchild);
-}
-static DEVICE_ATTR(maxchild, S_IRUGO, show_maxchild, NULL);
-
-/* Descriptor fields */
-#define usb_descriptor_attr(field, format_string) \
-static ssize_t \
-show_##field (struct device *dev, char *buf) \
-{ \
- struct usb_device *udev; \
- \
- udev = to_usb_device (dev); \
- return sprintf (buf, format_string, udev->descriptor.field); \
-} \
-static DEVICE_ATTR(field, S_IRUGO, show_##field, NULL);
-
-usb_descriptor_attr (idVendor, "%04x\n")
-usb_descriptor_attr (idProduct, "%04x\n")
-usb_descriptor_attr (bcdDevice, "%04x\n")
-usb_descriptor_attr (bDeviceClass, "%02x\n")
-usb_descriptor_attr (bDeviceSubClass, "%02x\n")
-usb_descriptor_attr (bDeviceProtocol, "%02x\n")
-usb_descriptor_attr (bNumConfigurations, "%d\n")
-
-
-void usb_create_driverfs_dev_files (struct usb_device *udev)
-{
- struct device *dev = &udev->dev;
-
- /* current configuration's attributes */
- device_create_file (dev, &dev_attr_bNumInterfaces);
- device_create_file (dev, &dev_attr_bConfigurationValue);
- device_create_file (dev, &dev_attr_bmAttributes);
- device_create_file (dev, &dev_attr_bMaxPower);
-
- /* device attributes */
- device_create_file (dev, &dev_attr_idVendor);
- device_create_file (dev, &dev_attr_idProduct);
- device_create_file (dev, &dev_attr_bcdDevice);
- device_create_file (dev, &dev_attr_bDeviceClass);
- device_create_file (dev, &dev_attr_bDeviceSubClass);
- device_create_file (dev, &dev_attr_bDeviceProtocol);
- device_create_file (dev, &dev_attr_bNumConfigurations);
-
- /* speed varies depending on how you connect the device */
- device_create_file (dev, &dev_attr_speed);
- // FIXME iff there are other speed configs, show how many
-
- if (udev->descriptor.iManufacturer)
- device_create_file (dev, &dev_attr_manufacturer);
- if (udev->descriptor.iProduct)
- device_create_file (dev, &dev_attr_product);
- if (udev->descriptor.iSerialNumber)
- device_create_file (dev, &dev_attr_serial);
-
- device_create_file (dev, &dev_attr_devnum);
- device_create_file (dev, &dev_attr_version);
- device_create_file (dev, &dev_attr_maxchild);
-}
-
-/* Interface fields */
-#define usb_intf_attr(field, format_string) \
-static ssize_t \
-show_##field (struct device *dev, char *buf) \
-{ \
- struct usb_interface *intf = to_usb_interface (dev); \
- \
- return sprintf (buf, format_string, intf->cur_altsetting->desc.field); \
-} \
-static DEVICE_ATTR(field, S_IRUGO, show_##field, NULL);
-
-usb_intf_attr (bInterfaceNumber, "%02x\n")
-usb_intf_attr (bAlternateSetting, "%2d\n")
-usb_intf_attr (bNumEndpoints, "%02x\n")
-usb_intf_attr (bInterfaceClass, "%02x\n")
-usb_intf_attr (bInterfaceSubClass, "%02x\n")
-usb_intf_attr (bInterfaceProtocol, "%02x\n")
-usb_intf_attr (iInterface, "%02x\n")
-
-void usb_create_driverfs_intf_files (struct usb_interface *intf)
-{
- device_create_file (&intf->dev, &dev_attr_bInterfaceNumber);
- device_create_file (&intf->dev, &dev_attr_bAlternateSetting);
- device_create_file (&intf->dev, &dev_attr_bNumEndpoints);
- device_create_file (&intf->dev, &dev_attr_bInterfaceClass);
- device_create_file (&intf->dev, &dev_attr_bInterfaceSubClass);
- device_create_file (&intf->dev, &dev_attr_bInterfaceProtocol);
- device_create_file (&intf->dev, &dev_attr_iInterface);
-}
+++ /dev/null
-/*-------------------------------------------------------------------------*/
-/*-------------------------------------------------------------------------*
- * simple generic USB HCD frontend Version 0.9.5 (10/28/2001)
- * for embedded HCs (SL811HS)
- *
- * USB URB handling, hci_ hcs_
- * URB queueing, qu_
- * Transfer scheduling, sh_
- *
- *
- *-------------------------------------------------------------------------*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- *-------------------------------------------------------------------------*/
-
-/* main lock for urb access */
-static spinlock_t usb_urb_lock = SPIN_LOCK_UNLOCKED;
-
-/*-------------------------------------------------------------------------*/
-/*-------------------------------------------------------------------------*/
-/* URB HCD API function layer
- * * * */
-
-/***************************************************************************
- * Function Name : hcs_urb_queue
- *
- * This function initializes the urb status and length before queueing the
- * urb.
- *
- * Input: hci = data structure for the host controller
- * urb = USB request block data structure
- *
- * Return: 0
- **************************************************************************/
-static inline int hcs_urb_queue (hci_t * hci, struct urb * urb)
-{
- int i;
-
- DBGFUNC ("enter hcs_urb_queue\n");
- if (usb_pipeisoc (urb->pipe)) {
- DBGVERBOSE ("hcs_urb_queue: isoc pipe\n");
- for (i = 0; i < urb->number_of_packets; i++) {
- urb->iso_frame_desc[i].actual_length = 0;
- urb->iso_frame_desc[i].status = -EXDEV;
- }
-
- /* urb->next hack : 1 .. resub, 0 .. single shot */
- /* urb->interval = urb->next ? 1 : 0; */
- }
-
- urb->status = -EINPROGRESS;
- urb->actual_length = 0;
- urb->error_count = 0;
-
- if (usb_pipecontrol (urb->pipe))
- hc_flush_data_cache (hci, urb->setup_packet, 8);
- if (usb_pipeout (urb->pipe))
- hc_flush_data_cache (hci, urb->transfer_buffer,
- urb->transfer_buffer_length);
-
- qu_queue_urb (hci, urb);
-
- return 0;
-}
-
-/***************************************************************************
- * Function Name : hcs_return_urb
- *
- * This function the return path of URB back to the USB core. It calls the
- * the urb complete function if exist, and also handles the resubmition of
- * interrupt URBs.
- *
- * Input: hci = data structure for the host controller
- * urb = USB request block data structure
- * resub_ok = resubmit flag: 1 = submit urb again, 0 = not submit
- *
- * Return: 0
- **************************************************************************/
-static int hcs_return_urb (hci_t * hci, struct urb * urb, int resub_ok)
-{
- struct usb_device *dev = urb->dev;
- int resubmit = 0;
-
- DBGFUNC ("enter hcs_return_urb, urb pointer = 0x%x, "
- "transferbuffer point = 0x%x, "
- " setup packet pointer = 0x%x, context pointer = 0x%x \n",
- (__u32 *) urb, (__u32 *) urb->transfer_buffer,
- (__u32 *) urb->setup_packet, (__u32 *) urb->context);
- if (urb_debug)
- urb_print (urb, "RET", usb_pipeout (urb->pipe));
-
- resubmit = urb->interval && resub_ok;
-
- urb->dev = urb->hcpriv = NULL;
-
- if (urb->complete) {
- urb->complete (urb, NULL); /* call complete */
- }
-
- if (resubmit) {
- /* requeue the URB */
- urb->dev = dev;
- hcs_urb_queue (hci, urb);
- } else {
- usb_put_urb(urb);
- }
-
- return 0;
-}
-
-/***************************************************************************
- * Function Name : hci_submit_urb
- *
- * This function is called by the USB core API when an URB is available to
- * process. This function does the following
- *
- * 1) Check the validity of the URB
- * 2) Parse the device number from the URB
- * 3) Pass the URB to the root hub routine if its intended for the hub, else
- * queue the urb for the attached device.
- *
- * Input: urb = USB request block data structure
- *
- * Return: 0 if success or error code
- **************************************************************************/
-static int hci_submit_urb (struct urb * urb, int mem_flags)
-{
- hci_t *hci;
- unsigned int pipe = urb->pipe;
- unsigned long flags;
- int ret;
-
- DBGFUNC ("enter hci_submit_urb, pipe = 0x%x\n", urb->pipe);
- if (!urb->dev || !urb->dev->bus || urb->hcpriv)
- return -EINVAL;
-
- hci = (hci_t *) urb->dev->bus->hcpriv;
-
- /* a request to the virtual root hub */
- if (usb_pipedevice (pipe) == hci->rh.devnum) {
- if (urb_debug > 1)
- urb_print (urb, "SUB-RH", usb_pipein (pipe));
-
- return rh_submit_urb (urb);
- }
-
- /* increment urb's reference count, we now control it. */
- urb = usb_get_urb (urb);
-
- /* queue the URB to its endpoint-queue */
- spin_lock_irqsave (&usb_urb_lock, flags);
- ret = hcs_urb_queue (hci, urb);
- if (ret != 0) {
- /* error on return */
- DBGERR ("hci_submit_urb: return err, ret = 0x%x, urb->status = 0x%x\n",
- ret, urb->status);
- usb_put_urb (urb);
- }
-
- spin_unlock_irqrestore (&usb_urb_lock, flags);
-
- return ret;
-
-}
-
-/***************************************************************************
- * Function Name : hci_unlink_urb
- *
- * This function mark the URB to unlink
- *
- * Input: urb = USB request block data structure
- *
- * Return: 0 if success or error code
- **************************************************************************/
-static int hci_unlink_urb (struct urb * urb, int status)
-{
- unsigned long flags;
- hci_t *hci;
- DECLARE_WAITQUEUE (wait, current);
- void *comp = NULL;
-
- DBGFUNC ("enter hci_unlink_urb\n");
-
- if (!urb) /* just to be sure */
- return -EINVAL;
-
- if (!urb->dev || !urb->dev->bus)
- return -ENODEV;
-
- hci = (hci_t *) urb->dev->bus->hcpriv;
-
- /* a request to the virtual root hub */
- if (usb_pipedevice (urb->pipe) == hci->rh.devnum) {
- return rh_unlink_urb (urb);
- }
-
- if (urb_debug)
- urb_print (urb, "UNLINK", 1);
-
- spin_lock_irqsave (&usb_urb_lock, flags);
-
- if (!list_empty (&urb->urb_list) && urb->status == -EINPROGRESS) {
- /* URB active? */
-
- /* asynchronous with callback */
- /* relink the urb to the del list */
- list_move (&urb->urb_list, &hci->del_list);
- urb->status = status;
- spin_unlock_irqrestore (&usb_urb_lock, flags);
- } else {
- /* hcd does not own URB but we keep the driver happy anyway */
- spin_unlock_irqrestore (&usb_urb_lock, flags);
-
- if (urb->complete) {
- urb->status = status;
- urb->actual_length = 0;
- urb->complete (urb, NULL);
- if (urb->reject)
- wake_up (&usb_kill_urb_queue);
- }
- }
-
- return 0;
-}
-
-/***************************************************************************
- * Function Name : hci_alloc_dev
- *
- * This function allocates private data space for the usb device and
- * initialize the endpoint descriptor heads.
- *
- * Input: usb_dev = pointer to the usb device
- *
- * Return: 0 if success or error code
- **************************************************************************/
-static int hci_alloc_dev (struct usb_device *usb_dev)
-{
- struct hci_device *dev;
- int i;
-
- DBGFUNC ("enter hci_alloc_dev\n");
- dev = kmalloc (sizeof (*dev), GFP_KERNEL);
- if (!dev)
- return -ENOMEM;
-
- memset (dev, 0, sizeof (*dev));
-
- for (i = 0; i < 32; i++) {
- INIT_LIST_HEAD (&(dev->ed[i].urb_queue));
- dev->ed[i].pipe_head = NULL;
- }
-
- usb_dev->hcpriv = dev;
-
- DBGVERBOSE ("USB HC dev alloc %d bytes\n", sizeof (*dev));
-
- return 0;
-
-}
-
-/***************************************************************************
- * Function Name : hci_free_dev
- *
- * This function de-allocates private data space for the usb devic
- *
- * Input: usb_dev = pointer to the usb device
- *
- * Return: 0
- **************************************************************************/
-static int hci_free_dev (struct usb_device *usb_dev)
-{
- DBGFUNC ("enter hci_free_dev\n");
-
- if (usb_dev->hcpriv)
- kfree (usb_dev->hcpriv);
-
- usb_dev->hcpriv = NULL;
-
- return 0;
-}
-
-/***************************************************************************
- * Function Name : hci_get_current_frame_number
- *
- * This function get the current USB frame number
- *
- * Input: usb_dev = pointer to the usb device
- *
- * Return: frame number
- **************************************************************************/
-static int hci_get_current_frame_number (struct usb_device *usb_dev)
-{
- hci_t *hci = usb_dev->bus->hcpriv;
- DBGFUNC ("enter hci_get_current_frame_number, frame = 0x%x \r\n",
- hci->frame_number);
-
- return (hci->frame_number);
-}
-
-/***************************************************************************
- * List of all io-functions
- **************************************************************************/
-
-static struct usb_operations hci_device_operations = {
- .allocate = hci_alloc_dev,
- .deallocate = hci_free_dev,
- .get_frame_number = hci_get_current_frame_number,
- .submit_urb = hci_submit_urb,
- .unlink_urb = hci_unlink_urb,
-};
-
-/***************************************************************************
- * URB queueing:
- *
- * For each type of transfer (INTR, BULK, ISO, CTRL) there is a list of
- * active URBs.
- * (hci->intr_list, hci->bulk_list, hci->iso_list, hci->ctrl_list)
- * For every endpoint the head URB of the queued URBs is linked to one of
- * those lists.
- *
- * The rest of the queued URBs of an endpoint are linked into a
- * private URB list for each endpoint. (hci_dev->ed [endpoint_io].urb_queue)
- * hci_dev->ed [endpoint_io].pipe_head .. points to the head URB which is
- * in one of the active URB lists.
- *
- * The index of an endpoint consists of its number and its direction.
- *
- * The state of an intr and iso URB is 0.
- * For ctrl URBs the states are US_CTRL_SETUP, US_CTRL_DATA, US_CTRL_ACK
- * Bulk URBs states are US_BULK and US_BULK0 (with 0-len packet)
- *
- **************************************************************************/
-
-/***************************************************************************
- * Function Name : qu_urb_timeout
- *
- * This function is called when the URB timeout. The function unlinks the
- * URB.
- *
- * Input: lurb: URB
- *
- * Return: none
- **************************************************************************/
-#ifdef HC_URB_TIMEOUT
-static void qu_urb_timeout (unsigned long lurb)
-{
- struct urb *urb = (struct urb *) lurb;
-
- DBGFUNC ("enter qu_urb_timeout\n");
- hci_unlink_urb (urb);
-}
-#endif
-
-/***************************************************************************
- * Function Name : qu_pipeindex
- *
- * This function gets the index of the pipe.
- *
- * Input: pipe: the urb pipe
- *
- * Return: index
- **************************************************************************/
-static inline int qu_pipeindex (__u32 pipe)
-{
- DBGFUNC ("enter qu_pipeindex\n");
- return (usb_pipeendpoint (pipe) << 1) | (usb_pipecontrol (pipe) ? 0 : usb_pipeout (pipe));
-}
-
-/***************************************************************************
- * Function Name : qu_seturbstate
- *
- * This function set the state of the URB.
- *
- * control pipe: 3 states -- Setup, data, status
- * interrupt and bulk pipe: 1 state -- data
- *
- * Input: urb = USB request block data structure
- * state = the urb state
- *
- * Return: none
- **************************************************************************/
-static inline void qu_seturbstate (struct urb * urb, int state)
-{
- DBGFUNC ("enter qu_seturbstate\n");
- urb->pipe &= ~0x1f;
- urb->pipe |= state & 0x1f;
-}
-
-/***************************************************************************
- * Function Name : qu_urbstate
- *
- * This function get the current state of the URB.
- *
- * Input: urb = USB request block data structure
- *
- * Return: none
- **************************************************************************/
-static inline int qu_urbstate (struct urb * urb)
-{
-
- DBGFUNC ("enter qu_urbstate\n");
-
- return urb->pipe & 0x1f;
-}
-
-/***************************************************************************
- * Function Name : qu_queue_active_urb
- *
- * This function adds the urb to the appropriate active urb list and set
- * the urb state.
- *
- * There are four active lists: isochoronous list, interrupt list,
- * control list, and bulk list.
- *
- * Input: hci = data structure for the host controller
- * urb = USB request block data structure
- * ed = endpoint descriptor
- *
- * Return: none
- **************************************************************************/
-static inline void qu_queue_active_urb (hci_t * hci, struct urb * urb, epd_t * ed)
-{
- int urb_state = 0;
- DBGFUNC ("enter qu_queue_active_urb\n");
- switch (usb_pipetype (urb->pipe)) {
- case PIPE_CONTROL:
- list_add (&urb->urb_list, &hci->ctrl_list);
- urb_state = US_CTRL_SETUP;
- break;
-
- case PIPE_BULK:
- list_add (&urb->urb_list, &hci->bulk_list);
- if ((urb->transfer_flags & URB_ZERO_PACKET)
- && urb->transfer_buffer_length > 0
- &&
- ((urb->transfer_buffer_length %
- usb_maxpacket (urb->dev, urb->pipe,
- usb_pipeout (urb->pipe))) == 0)) {
- urb_state = US_BULK0;
- }
- break;
-
- case PIPE_INTERRUPT:
- urb->start_frame = hci->frame_number;
- list_add (&urb->urb_list, &hci->intr_list);
- break;
-
- case PIPE_ISOCHRONOUS:
- list_add (&urb->urb_list, &hci->iso_list);
- break;
- }
-
-#ifdef HC_URB_TIMEOUT
- if (urb->timeout) {
- ed->timeout.data = (unsigned long) urb;
- ed->timeout.expires = urb->timeout + jiffies;
- ed->timeout.function = qu_urb_timeout;
- add_timer (&ed->timeout);
- }
-#endif
-
- qu_seturbstate (urb, urb_state);
-}
-
-/***************************************************************************
- * Function Name : qu_queue_urb
- *
- * This function adds the urb to the endpoint descriptor list
- *
- * Input: hci = data structure for the host controller
- * urb = USB request block data structure
- *
- * Return: none
- **************************************************************************/
-static int qu_queue_urb (hci_t * hci, struct urb * urb)
-{
- struct hci_device *hci_dev = usb_to_hci (urb->dev);
- epd_t *ed = &hci_dev->ed[qu_pipeindex (urb->pipe)];
-
- DBGFUNC ("Enter qu_queue_urb\n");
-
- /* for ISOC transfers calculate start frame index */
-
- if (usb_pipeisoc (urb->pipe) && urb->transfer_flags & URB_ISO_ASAP) {
- urb->start_frame = ((ed->pipe_head) ? (ed->last_iso + 1) : hci_get_current_frame_number (urb-> dev) + 1) & 0xffff;
- }
-
- if (ed->pipe_head) {
- __list_add (&urb->urb_list, ed->urb_queue.prev,
- &(ed->urb_queue));
- } else {
- ed->pipe_head = urb;
- qu_queue_active_urb (hci, urb, ed);
- if (++hci->active_urbs == 1)
- hc_start_int (hci);
- }
-
- return 0;
-}
-
-/***************************************************************************
- * Function Name : qu_next_urb
- *
- * This function removes the URB from the queue and add the next URB to
- * active list.
- *
- * Input: hci = data structure for the host controller
- * urb = USB request block data structure
- * resub_ok = resubmit flag
- *
- * Return: pointer to the next urb
- **************************************************************************/
-static struct urb *qu_next_urb (hci_t * hci, struct urb * urb, int resub_ok)
-{
- struct hci_device *hci_dev = usb_to_hci (urb->dev);
- epd_t *ed = &hci_dev->ed[qu_pipeindex (urb->pipe)];
-
- DBGFUNC ("enter qu_next_urb\n");
- list_del_init(&urb->urb_list);
-
- if (ed->pipe_head == urb) {
-#ifdef HC_URB_TIMEOUT
- if (urb->timeout)
- del_timer (&ed->timeout);
-#endif
-
- if (!--hci->active_urbs)
- hc_stop_int (hci);
-
- if (!list_empty (&ed->urb_queue)) {
- urb = list_entry (ed->urb_queue.next, struct urb, urb_list);
- list_del_init (&urb->urb_list);
- ed->pipe_head = urb;
- qu_queue_active_urb (hci, urb, ed);
- } else {
- ed->pipe_head = NULL;
- urb = NULL;
- }
- }
- return urb;
-}
-
-/***************************************************************************
- * Function Name : qu_return_urb
- *
- * This function is part of the return path.
- *
- * Input: hci = data structure for the host controller
- * urb = USB request block data structure
- * resub_ok = resubmit flag
- *
- * Return: pointer to the next urb
- **************************************************************************/
-static struct urb *qu_return_urb (hci_t * hci, struct urb * urb, int resub_ok)
-{
- struct urb *next_urb;
-
- DBGFUNC ("enter qu_return_rub\n");
- next_urb = qu_next_urb (hci, urb, resub_ok);
- hcs_return_urb (hci, urb, resub_ok);
- return next_urb;
-}
-
-/***************************************************************************
- * Function Name : sh_scan_iso_urb_list
- *
- * This function goes through the isochronous urb list and schedule the
- * the transfer.
- *
- * Note: This function has not tested yet
- *
- * Input: hci = data structure for the host controller
- * list_lh = pointer to the isochronous list
- * frame_number = the frame number
- *
- * Return: 0 = unsuccessful; 1 = successful
- **************************************************************************/
-static int sh_scan_iso_urb_list (hci_t * hci, struct list_head *list_lh,
- int frame_number)
-{
- struct list_head *lh = list_lh->next;
- struct urb *urb;
-
- DBGFUNC ("enter sh_scan_iso_urb_list\n");
- hci->td_array->len = 0;
-
- while (lh != list_lh) {
- urb = list_entry (lh, struct urb, urb_list);
- lh = lh->next;
- if (((frame_number - urb->start_frame) & 0x7ff) <
- urb->number_of_packets) {
- if (!sh_add_packet (hci, urb)) {
- return 0;
- } else {
- if (((frame_number -
- urb->start_frame) & 0x7ff) > 0x400) {
- if (qu_urbstate (urb) > 0)
- urb = qu_return_urb (hci, urb, 1);
- else
- urb = qu_next_urb (hci, urb, 1);
-
- if (lh == list_lh && urb)
- lh = &urb->urb_list;
- }
- }
- }
- }
- return 1;
-}
-
-/***************************************************************************
- * Function Name : sh_scan_urb_list
- *
- * This function goes through the urb list and schedule the
- * the transaction.
- *
- * Input: hci = data structure for the host controller
- * list_lh = pointer to the isochronous list
- *
- * Return: 0 = unsuccessful; 1 = successful
- **************************************************************************/
-static int sh_scan_urb_list (hci_t * hci, struct list_head *list_lh)
-{
- struct list_head *lh = NULL;
- struct urb *urb;
-
- if (list_lh == NULL) {
- DBGERR ("sh_scan_urb_list: error, list_lh == NULL\n");
- }
-
- DBGFUNC ("enter sh_scan_urb_list: frame# \n");
-
- list_for_each (lh, list_lh) {
- urb = list_entry (lh, struct urb, urb_list);
- if (urb == NULL)
- return 1;
- if (!usb_pipeint (urb->pipe)
- || (((hci->frame_number - urb->start_frame)
- & 0x7ff) >= urb->interval)) {
- DBGVERBOSE ("sh_scan_urb_list !INT: %d fr_no: %d int: %d pint: %d\n",
- urb->start_frame, hci->frame_number, urb->interval,
- usb_pipeint (urb->pipe));
- if (!sh_add_packet (hci, urb)) {
- return 0;
- } else {
- DBGVERBOSE ("INT: start: %d fr_no: %d int: %d pint: %d\n",
- urb->start_frame, hci->frame_number,
- urb->interval, usb_pipeint (urb->pipe));
- urb->start_frame = hci->frame_number;
- return 0;
-
- }
- }
- }
- return 1;
-}
-
-/***************************************************************************
- * Function Name : sh_shedule_trans
- *
- * This function schedule the USB transaction.
- * This function will process the endpoint in the following order:
- * interrupt, control, and bulk.
- *
- * Input: hci = data structure for the host controller
- * isSOF = flag indicate if Start Of Frame has occurred
- *
- * Return: 0
- **************************************************************************/
-static int sh_schedule_trans (hci_t * hci, int isSOF)
-{
- int units_left = 1;
- struct list_head *lh;
-
- if (hci == NULL) {
- DBGERR ("sh_schedule_trans: hci == NULL\n");
- return 0;
- }
- if (hci->td_array == NULL) {
- DBGERR ("sh_schedule_trans: hci->td_array == NULL\n");
- return 0;
- }
-
- if (hci->td_array->len != 0) {
- DBGERR ("ERROR: schedule, hci->td_array->len = 0x%x, s/b: 0\n",
- hci->td_array->len);
- }
-
- /* schedule the next available interrupt transfer or the next
- * stage of the interrupt transfer */
-
- if (hci->td_array->len == 0 && !list_empty (&hci->intr_list)) {
- units_left = sh_scan_urb_list (hci, &hci->intr_list);
- }
-
- /* schedule the next available control transfer or the next
- * stage of the control transfer */
-
- if (hci->td_array->len == 0 && !list_empty (&hci->ctrl_list) && units_left > 0) {
- units_left = sh_scan_urb_list (hci, &hci->ctrl_list);
- }
-
- /* schedule the next available bulk transfer or the next
- * stage of the bulk transfer */
-
- if (hci->td_array->len == 0 && !list_empty (&hci->bulk_list) && units_left > 0) {
- sh_scan_urb_list (hci, &hci->bulk_list);
-
- /* be fair to each BULK URB (move list head around)
- * only when the new SOF happens */
-
- lh = hci->bulk_list.next;
- list_move (&hci->bulk_list, lh);
- }
- return 0;
-}
-
-/***************************************************************************
- * Function Name : sh_add_packet
- *
- * This function forms the packet and transmit the packet. This function
- * will handle all endpoint type: isochoronus, interrupt, control, and
- * bulk.
- *
- * Input: hci = data structure for the host controller
- * urb = USB request block data structure
- *
- * Return: 0 = unsucessful; 1 = successful
- **************************************************************************/
-static int sh_add_packet (hci_t * hci, struct urb * urb)
-{
- __u8 *data = NULL;
- int len = 0;
- int toggle = 0;
- int maxps = usb_maxpacket (urb->dev, urb->pipe, usb_pipeout (urb->pipe));
- int endpoint = usb_pipeendpoint (urb->pipe);
- int address = usb_pipedevice (urb->pipe);
- int slow = (((urb->pipe) >> 26) & 1);
- int out = usb_pipeout (urb->pipe);
- int pid = 0;
- int ret;
- int i = 0;
- int iso = 0;
-
- DBGFUNC ("enter sh_add_packet\n");
- if (maxps == 0)
- maxps = 8;
-
- /* calculate len, toggle bit and add the transaction */
- switch (usb_pipetype (urb->pipe)) {
- case PIPE_ISOCHRONOUS:
- pid = out ? PID_OUT : PID_IN;
- iso = 1;
- i = hci->frame_number - urb->start_frame;
- data = urb->transfer_buffer + urb->iso_frame_desc[i].offset;
- len = urb->iso_frame_desc[i].length;
- break;
-
- case PIPE_BULK: /* BULK and BULK0 */
- case PIPE_INTERRUPT:
- pid = out ? PID_OUT : PID_IN;
- len = urb->transfer_buffer_length - urb->actual_length;
- data = urb->transfer_buffer + urb->actual_length;
- toggle = usb_gettoggle (urb->dev, endpoint, out);
- break;
-
- case PIPE_CONTROL:
- switch (qu_urbstate (urb)) {
- case US_CTRL_SETUP:
- len = 8;
- pid = PID_SETUP;
- data = urb->setup_packet;
- toggle = 0;
- break;
-
- case US_CTRL_DATA:
- if (!hci->last_packet_nak) {
- /* The last packet received is not a nak:
- * reset the nak count
- */
-
- hci->nakCnt = 0;
- }
- if (urb->transfer_buffer_length != 0) {
- pid = out ? PID_OUT : PID_IN;
- len = urb->transfer_buffer_length - urb->actual_length;
- data = urb->transfer_buffer + urb->actual_length;
- toggle = (urb->actual_length & maxps) ? 0 : 1;
- usb_settoggle (urb->dev,
- usb_pipeendpoint (urb->pipe),
- usb_pipeout (urb->pipe), toggle);
- break;
- } else {
- /* correct state and fall through */
- qu_seturbstate (urb, US_CTRL_ACK);
- }
-
- case US_CTRL_ACK:
- len = 0;
-
- /* reply in opposite direction */
- pid = !out ? PID_OUT : PID_IN;
- toggle = 1;
- usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe),
- usb_pipeout (urb->pipe), toggle);
- break;
- }
- }
-
- ret =
- hc_add_trans (hci, len, data, toggle, maxps, slow, endpoint,
- address, pid, iso, qu_urbstate (urb));
-
- DBGVERBOSE ("transfer_pa: addr:%d ep:%d pid:%x tog:%x iso:%x sl:%x "
- "max:%d\n len:%d ret:%d data:%p left:%d\n",
- address, endpoint, pid, toggle, iso, slow,
- maxps, len, ret, data, hci->hp.units_left);
-
- if (ret >= 0) {
- hci->td_array->td[hci->td_array->len].urb = urb;
- hci->td_array->td[hci->td_array->len].len = ret;
- hci->td_array->td[hci->td_array->len].iso_index = i;
- hci->td_array->len++;
- hci->active_trans = 1;
- return 1;
- }
- return 0;
-}
-
-/***************************************************************************
- * Function Name : cc_to_error
- *
- * This function maps the SL811HS hardware error code to the linux USB error
- * code.
- *
- * Input: cc = hardware error code
- *
- * Return: USB error code
- **************************************************************************/
-static int cc_to_error (int cc)
-{
- int errCode = 0;
- if (cc & SL11H_STATMASK_ERROR) {
- errCode |= -EILSEQ;
- } else if (cc & SL11H_STATMASK_OVF) {
- errCode |= -EOVERFLOW;
- } else if (cc & SL11H_STATMASK_STALL) {
- errCode |= -EPIPE;
- }
- return errCode;
-}
-
-/***************************************************************************
- * Function Name : sh_done_list
- *
- * This function process the packet when it has done finish transfer.
- *
- * 1) It handles hardware error
- * 2) It updates the URB state
- * 3) If the USB transaction is complete, it start the return stack path.
- *
- * Input: hci = data structure for the host controller
- * isExcessNak = flag tells if there excess NAK condition occurred
- *
- * Return: urb_state or -1 if the transaction has complete
- **************************************************************************/
-static int sh_done_list (hci_t * hci, int *isExcessNak)
-{
- int actbytes = 0;
- int active = 0;
- void *data = NULL;
- int cc;
- int maxps;
- int toggle;
- struct urb *urb;
- int urb_state = 0;
- int ret = 1; /* -1 parse abbort, 1 parse ok, 0 last element */
- int trans = 0;
- int len;
- int iso_index = 0;
- int out;
- int pid = 0;
- int debugLen = 0;
-
- *isExcessNak = 0;
-
- DBGFUNC ("enter sh_done_list: td_array->len = 0x%x\n",
- hci->td_array->len);
-
- debugLen = hci->td_array->len;
- if (debugLen > 1)
- DBGERR ("sh_done_list: td_array->len = 0x%x > 1\n",
- hci->td_array->len);
-
- for (trans = 0; ret && trans < hci->td_array->len && trans < MAX_TRANS;
- trans++) {
- urb = hci->td_array->td[trans].urb;
- len = hci->td_array->td[trans].len;
- out = usb_pipeout (urb->pipe);
-
- if (usb_pipeisoc (urb->pipe)) {
- iso_index = hci->td_array->td[trans].iso_index;
- data = urb->transfer_buffer + urb->iso_frame_desc[iso_index].offset;
- toggle = 0;
- } else {
- data = urb->transfer_buffer + urb->actual_length;
- toggle = usb_gettoggle (urb->dev,
- usb_pipeendpoint (urb->pipe),
- usb_pipeout (urb->pipe));
-
- }
- urb_state = qu_urbstate (urb);
- pid = out ? PID_OUT : PID_IN;
- ret = hc_parse_trans (hci, &actbytes, data, &cc, &toggle, len,
- pid, urb_state);
- maxps = usb_maxpacket (urb->dev, urb->pipe, usb_pipeout (urb->pipe));
-
- if (maxps == 0)
- maxps = 8;
-
- active = (urb_state != US_CTRL_SETUP) && (actbytes && !(actbytes & (maxps - 1)));
-
- /* If the transfer is not bulk in, then it is necessary to get all
- * data specify by the urb->transfer_len.
- */
-
- if (!(usb_pipebulk (urb->pipe) && usb_pipein (urb->pipe)))
- active = active && (urb->transfer_buffer_length != urb->actual_length + actbytes);
-
- if (urb->transfer_buffer_length == urb->actual_length + actbytes)
- active = 0;
-
- if ((cc &
- (SL11H_STATMASK_ERROR | SL11H_STATMASK_TMOUT |
- SL11H_STATMASK_OVF | SL11H_STATMASK_STALL))
- && !(cc & SL11H_STATMASK_NAK)) {
- if (++urb->error_count > 3) {
- DBGERR ("done_list: excessive error: errcount = 0x%x, cc = 0x%x\n",
- urb->error_count, cc);
- urb_state = 0;
- active = 0;
- } else {
- DBGERR ("done_list: packet err, cc = 0x%x, "
- " urb->length = 0x%x, actual_len = 0x%x,"
- " urb_state =0x%x\n",
- cc, urb->transfer_buffer_length,
- urb->actual_length, urb_state);
-// if (cc & SL11H_STATMASK_STALL) {
- /* The USB function is STALLED on a control pipe (0),
- * then it needs to send the SETUP command again to
- * clear the STALL condition
- */
-
-// if (usb_pipeendpoint (urb->pipe) == 0) {
-// urb_state = 2;
-// active = 0;
-// }
-// } else
- active = 1;
- }
- } else {
- if (cc & SL11H_STATMASK_NAK) {
- if (hci->nakCnt < 0x10000) {
- hci->nakCnt++;
- hci->last_packet_nak = 1;
- active = 1;
- *isExcessNak = 0;
- } else {
- DBGERR ("done_list: nak count exceed limit\n");
- active = 0;
- *isExcessNak = 1;
- hci->nakCnt = 0;
- }
- } else {
- hci->nakCnt = 0;
- hci->last_packet_nak = 0;
- }
-
- if (urb_state != US_CTRL_SETUP) {
- /* no error */
- urb->actual_length += actbytes;
- usb_settoggle (urb->dev,
- usb_pipeendpoint (urb->pipe),
- usb_pipeout (urb->pipe), toggle);
- }
- if (usb_pipeisoc (urb->pipe)) {
- urb->iso_frame_desc[iso_index].actual_length = actbytes;
- urb->iso_frame_desc[iso_index].status = cc_to_error (cc);
- active = (iso_index < urb->number_of_packets);
- }
- }
- if (!active) {
- if (!urb_state) {
- urb->status = cc_to_error (cc);
- if (urb->status) {
- DBGERR ("error on received packet: urb->status = 0x%x\n",
- urb->status);
- }
- hci->td_array->len = 0;
- qu_return_urb (hci, urb, 1);
- return -1;
- } else {
- /* We do not want to decrement the urb_state if exceeded nak,
- * because we need to finish the data stage of the control
- * packet
- */
-
- if (!(*isExcessNak))
- urb_state--;
- qu_seturbstate (urb, urb_state);
- }
- }
- }
-
- if (urb_state < 0)
- DBGERR ("ERROR: done_list, urb_state = %d, suppose > 0\n",
- urb_state);
- if (debugLen != hci->td_array->len) {
- DBGERR ("ERROR: done_list, debugLen!= td_array->len,"
- "debugLen = 0x%x, hci->td_array->len = 0x%x\n",
- debugLen, hci->td_array->len);
- }
-
- hci->td_array->len = 0;
-
- return urb_state;
-}
+++ /dev/null
-/*-------------------------------------------------------------------------*/
-/* list of all controllers using this driver
- * */
-
-static LIST_HEAD (hci_hcd_list);
-
-/* URB states (urb_state) */
-/* isoc, interrupt single state */
-
-/* bulk transfer main state and 0-length packet */
-#define US_BULK 0
-#define US_BULK0 1
-/* three setup states */
-#define US_CTRL_SETUP 2
-#define US_CTRL_DATA 1
-#define US_CTRL_ACK 0
-
-/*-------------------------------------------------------------------------*/
-/* HC private part of a device descriptor
- * */
-
-#define NUM_EDS 32
-
-typedef struct epd {
- struct urb *pipe_head;
- struct list_head urb_queue;
-// int urb_state;
- struct timer_list timeout;
- int last_iso; /* timestamp of last queued ISOC transfer */
-
-} epd_t;
-
-struct hci_device {
- epd_t ed[NUM_EDS];
-};
-
-/*-------------------------------------------------------------------------*/
-/* Virtual Root HUB
- */
-
-#define usb_to_hci(usb) ((struct hci_device *)(usb)->hcpriv)
-
-struct virt_root_hub {
- int devnum; /* Address of Root Hub endpoint */
- void *urb; /* interrupt URB of root hub */
- int send; /* active flag */
- int interval; /* interval of roothub interrupt transfers */
- struct timer_list rh_int_timer; /* interval timer for rh interrupt EP */
-};
-
-#if 1
-/* USB HUB CONSTANTS (not OHCI-specific; see hub.h and USB spec) */
-
-/* destination of request */
-#define RH_INTERFACE 0x01
-#define RH_ENDPOINT 0x02
-#define RH_OTHER 0x03
-
-#define RH_CLASS 0x20
-#define RH_VENDOR 0x40
-
-/* Requests: bRequest << 8 | bmRequestType */
-#define RH_GET_STATUS 0x0080
-#define RH_CLEAR_FEATURE 0x0100
-#define RH_SET_FEATURE 0x0300
-#define RH_SET_ADDRESS 0x0500
-#define RH_GET_DESCRIPTOR 0x0680
-#define RH_SET_DESCRIPTOR 0x0700
-#define RH_GET_CONFIGURATION 0x0880
-#define RH_SET_CONFIGURATION 0x0900
-#define RH_GET_STATE 0x0280
-#define RH_GET_INTERFACE 0x0A80
-#define RH_SET_INTERFACE 0x0B00
-#define RH_SYNC_FRAME 0x0C80
-/* Our Vendor Specific Request */
-#define RH_SET_EP 0x2000
-
-/* Hub port features */
-#define RH_PORT_CONNECTION 0x00
-#define RH_PORT_ENABLE 0x01
-#define RH_PORT_SUSPEND 0x02
-#define RH_PORT_OVER_CURRENT 0x03
-#define RH_PORT_RESET 0x04
-#define RH_PORT_POWER 0x08
-#define RH_PORT_LOW_SPEED 0x09
-
-#define RH_C_PORT_CONNECTION 0x10
-#define RH_C_PORT_ENABLE 0x11
-#define RH_C_PORT_SUSPEND 0x12
-#define RH_C_PORT_OVER_CURRENT 0x13
-#define RH_C_PORT_RESET 0x14
-
-/* Hub features */
-#define RH_C_HUB_LOCAL_POWER 0x00
-#define RH_C_HUB_OVER_CURRENT 0x01
-
-#define RH_DEVICE_REMOTE_WAKEUP 0x00
-#define RH_ENDPOINT_STALL 0x01
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* struct for each HC
- */
-
-#define MAX_TRANS 32
-
-typedef struct td {
- struct urb *urb;
- __u16 len;
- __u16 iso_index;
-} td_t;
-
-typedef struct td_array {
- int len;
- td_t td[MAX_TRANS];
-} td_array_t;
-
-typedef struct hci {
- struct virt_root_hub rh; /* roothub */
- wait_queue_head_t waitq; /* deletion of URBs and devices needs a waitqueue */
- int active; /* HC is operating */
-
- struct list_head ctrl_list; /* set of ctrl endpoints */
- struct list_head bulk_list; /* set of bulk endpoints */
- struct list_head iso_list; /* set of isoc endpoints */
- struct list_head intr_list; /* ordered (tree) set of int endpoints */
- struct list_head del_list; /* set of entpoints to be deleted */
-
- td_array_t *td_array;
- td_array_t a_td_array;
- td_array_t i_td_array[2];
-
- struct list_head hci_hcd_list; /* list of all hci_hcd */
- struct usb_bus *bus; /* our bus */
-
-// int trans; /* number of transactions pending */
- int active_urbs;
- int active_trans;
- int frame_number; /* frame number */
- hcipriv_t hp; /* individual part of hc type */
- int nakCnt;
- int last_packet_nak;
-
-} hci_t;
-
-/*-------------------------------------------------------------------------*/
-/* condition (error) CC codes and mapping OHCI like
- */
-
-#define TD_CC_NOERROR 0x00
-#define TD_CC_CRC 0x01
-#define TD_CC_BITSTUFFING 0x02
-#define TD_CC_DATATOGGLEM 0x03
-#define TD_CC_STALL 0x04
-#define TD_DEVNOTRESP 0x05
-#define TD_PIDCHECKFAIL 0x06
-#define TD_UNEXPECTEDPID 0x07
-#define TD_DATAOVERRUN 0x08
-#define TD_DATAUNDERRUN 0x09
-#define TD_BUFFEROVERRUN 0x0C
-#define TD_BUFFERUNDERRUN 0x0D
-#define TD_NOTACCESSED 0x0F
-
-
-/* urb interface functions */
-static int hci_get_current_frame_number (struct usb_device *usb_dev);
-static int hci_unlink_urb (struct urb * urb);
-
-static int qu_queue_urb (hci_t * hci, struct urb * urb);
-
-/* root hub */
-static int rh_init_int_timer (struct urb * urb);
-static int rh_submit_urb (struct urb * urb);
-static int rh_unlink_urb (struct urb * urb);
-
-/* schedule functions */
-static int sh_add_packet (hci_t * hci, struct urb * urb);
-
-/* hc specific functions */
-static inline void hc_flush_data_cache (hci_t * hci, void *data, int len);
-static inline int hc_parse_trans (hci_t * hci, int *actbytes, __u8 * data,
- int *cc, int *toggle, int length, int pid,
- int urb_state);
-static inline int hc_add_trans (hci_t * hci, int len, void *data, int toggle,
- int maxps, int slow, int endpoint, int address,
- int pid, int format, int urb_state);
-
-static void hc_start_int (hci_t * hci);
-static void hc_stop_int (hci_t * hci);
-static void SL811Write (hci_t * hci, char offset, char data);
-
-/* debug| print the main components of an URB
- * small: 0) header + data packets 1) just header */
-
-static void urb_print (struct urb * urb, char *str, int small)
-{
- unsigned int pipe = urb->pipe;
- int i, len;
-
- if (!urb->dev || !urb->dev->bus) {
- dbg ("%s URB: no dev", str);
- return;
- }
-
- printk ("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,flags:%4x,len:%d/%d,stat:%d(%x)\n",
- str, hci_get_current_frame_number (urb->dev),
- usb_pipedevice (pipe), usb_pipeendpoint (pipe),
- usb_pipeout (pipe) ? 'O' : 'I',
- usb_pipetype (pipe) < 2 ? (usb_pipeint (pipe) ? "INTR" : "ISOC")
- : (usb_pipecontrol (pipe) ? "CTRL" : "BULK"), urb->transfer_flags,
- urb->actual_length, urb->transfer_buffer_length, urb->status,
- urb->status);
- if (!small) {
- if (usb_pipecontrol (pipe)) {
- printk (__FILE__ ": cmd(8):");
- for (i = 0; i < 8; i++)
- printk (" %02x", ((__u8 *) urb->setup_packet)[i]);
- printk ("\n");
- }
- if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) {
- printk (__FILE__ ": data(%d/%d):", urb->actual_length,
- urb->transfer_buffer_length);
- len = usb_pipeout (pipe) ? urb-> transfer_buffer_length : urb->actual_length;
- for (i = 0; i < 2096 && i < len; i++)
- printk (" %02x", ((__u8 *) urb->transfer_buffer)[i]);
- printk ("%s stat:%d\n", i < len ? "..." : "",
- urb->status);
- }
- }
-}
+++ /dev/null
-/*-------------------------------------------------------------------------*/
-/*-------------------------------------------------------------------------*
- * SL811HS USB HCD for Linux Version 0.1 (10/28/2001)
- *
- * requires (includes) hc_simple.[hc] simple generic HCD frontend
- *
- * COPYRIGHT(C) 2001 by CYPRESS SEMICONDUCTOR INC.
- *
- *-------------------------------------------------------------------------*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- *-------------------------------------------------------------------------*/
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/smp_lock.h>
-#include <linux/list.h>
-#include <linux/ioport.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-
-#include <linux/usb.h>
-#include "../core/hcd.h"
-
-#undef HC_URB_TIMEOUT
-#undef HC_SWITCH_INT
-#undef HC_ENABLE_ISOC
-
-#define SL811_DEBUG_ERR
-
-#ifdef SL811_DEBUG_ERR
-#define DBGERR(fmt, args...) printk(fmt,## args)
-#else
-#define DBGERR(fmt, args...)
-#endif
-
-#ifdef SL811_DEBUG
-#define DBG(fmt, args...) printk(fmt,## args)
-#else
-#define DBG(fmt, args...)
-#endif
-
-#ifdef SL811_DEBUG_FUNC
-#define DBGFUNC(fmt, args...) printk(fmt,## args)
-#else
-#define DBGFUNC(fmt, args...)
-#endif
-
-#ifdef SL811_DEBUG_DATA
-#define DBGDATAR(fmt, args...) printk(fmt,## args)
-#define DBGDATAW(fmt, args...) printk(fmt,## args)
-#else
-#define DBGDATAR(fmt, args...)
-#define DBGDATAW(fmt, args...)
-#endif
-
-#ifdef SL811_DEBUG_VERBOSE
-#define DBGVERBOSE(fmt, args...) printk(fmt,## args)
-#else
-#define DBGVERBOSE(fmt, args...)
-#endif
-
-#define TRUE 1
-#define FALSE 0
-
-#define HC_SWITCH_INT
-#include "hc_sl811.h"
-#include "hc_simple.h"
-
-static int urb_debug = 0;
-
-#include "hc_simple.c"
-#include "hc_sl811_rh.c"
-
-/* The base_addr, data_reg_addr, and irq number are board specific.
- * The current values are design to run on the Accelent SA1110 IDP
- * NOTE: values need to modify for different development boards
- */
-
-static int base_addr = 0xd3800000;
-static int data_reg_addr = 0xd3810000;
-static int irq = 34;
-
-/* forware declaration */
-
-int SL11StartXaction (hci_t * hci, __u8 addr, __u8 epaddr, int pid, int len,
- int toggle, int slow, int urb_state);
-
-static int sofWaitCnt = 0;
-
-module_param(urb_debug, int, 0);
-MODULE_PARM_DESC (urb_debug, "debug urb messages, default is 0 (no)");
-
-module_param(base_addr, int, 0);
-MODULE_PARM_DESC (base_addr, "sl811 base address 0xd3800000");
-module_param(data_reg_addr, int, 0);
-MODULE_PARM_DESC (data_reg_addr, "sl811 data register address 0xd3810000");
-module_param(irq, int, 0);
-MODULE_PARM_DESC (irq, "IRQ 34 (default)");
-
-static int hc_reset (hci_t * hci);
-
-/***************************************************************************
- * Function Name : SL811Read
- *
- * Read a byte of data from the SL811H/SL11H
- *
- * Input: hci = data structure for the host controller
- * offset = address of SL811/SL11H register or memory
- *
- * Return: data
- **************************************************************************/
-char SL811Read (hci_t * hci, char offset)
-{
- hcipriv_t *hp = &hci->hp;
- char data;
- writeb (offset, hp->hcport);
- wmb ();
- data = readb (hp->hcport2);
- rmb ();
- return (data);
-}
-
-/***************************************************************************
- * Function Name : SL811Write
- *
- * Write a byte of data to the SL811H/SL11H
- *
- * Input: hci = data structure for the host controller
- * offset = address of SL811/SL11H register or memory
- * data = the data going to write to SL811H
- *
- * Return: none
- **************************************************************************/
-void SL811Write (hci_t * hci, char offset, char data)
-{
- hcipriv_t *hp = &hci->hp;
- writeb (offset, hp->hcport);
- writeb (data, hp->hcport2);
- wmb ();
-}
-
-/***************************************************************************
- * Function Name : SL811BufRead
- *
- * Read consecutive bytes of data from the SL811H/SL11H buffer
- *
- * Input: hci = data structure for the host controller
- * offset = SL811/SL11H register offset
- * buf = the buffer where the data will store
- * size = number of bytes to read
- *
- * Return: none
- **************************************************************************/
-void SL811BufRead (hci_t * hci, short offset, char *buf, short size)
-{
- hcipriv_t *hp = &hci->hp;
- if (size <= 0)
- return;
- writeb ((char) offset, hp->hcport);
- wmb ();
- DBGDATAR ("SL811BufRead: offset = 0x%x, data = ", offset);
- while (size--) {
- *buf++ = (char) readb (hp->hcport2);
- DBGDATAR ("0x%x ", *(buf - 1));
- rmb ();
- }
- DBGDATAR ("\n");
-}
-
-/***************************************************************************
- * Function Name : SL811BufWrite
- *
- * Write consecutive bytes of data to the SL811H/SL11H buffer
- *
- * Input: hci = data structure for the host controller
- * offset = SL811/SL11H register offset
- * buf = the data buffer
- * size = number of bytes to write
- *
- * Return: none
- **************************************************************************/
-void SL811BufWrite (hci_t * hci, short offset, char *buf, short size)
-{
- hcipriv_t *hp = &hci->hp;
- if (size <= 0)
- return;
- writeb ((char) offset, hp->hcport);
- wmb ();
- DBGDATAW ("SL811BufWrite: offset = 0x%x, data = ", offset);
- while (size--) {
- DBGDATAW ("0x%x ", *buf);
- writeb (*buf, hp->hcport2);
- wmb ();
- buf++;
- }
- DBGDATAW ("\n");
-}
-
-/***************************************************************************
- * Function Name : regTest
- *
- * This routine test the Read/Write functionality of SL811HS registers
- *
- * 1) Store original register value into a buffer
- * 2) Write to registers with a RAMP pattern. (10, 11, 12, ..., 255)
- * 3) Read from register
- * 4) Compare the written value with the read value and make sure they are
- * equivalent
- * 5) Restore the original register value
- *
- * Input: hci = data structure for the host controller
- *
- *
- * Return: TRUE = passed; FALSE = failed
- **************************************************************************/
-int regTest (hci_t * hci)
-{
- int i, data, result = TRUE;
- char buf[256];
-
- DBGFUNC ("Enter regTest\n");
- for (i = 0x10; i < 256; i++) {
- /* save the original buffer */
- buf[i] = (char) SL811Read (hci, i);
-
- /* Write the new data to the buffer */
- SL811Write (hci, i, i);
- }
-
- /* compare the written data */
- for (i = 0x10; i < 256; i++) {
- data = SL811Read (hci, i);
- if (data != i) {
- DBGERR ("Pattern test failed!! value = 0x%x, s/b 0x%x\n",
- data, i);
- result = FALSE;
- }
- }
-
- /* restore the data */
- for (i = 0x10; i < 256; i++) {
- SL811Write (hci, i, buf[i]);
- }
-
- return (result);
-}
-
-/***************************************************************************
- * Function Name : regShow
- *
- * Display all SL811HS register values
- *
- * Input: hci = data structure for the host controller
- *
- * Return: none
- **************************************************************************/
-void regShow (hci_t * hci)
-{
- int i;
- for (i = 0; i < 256; i++) {
- printk ("offset %d: 0x%x\n", i, SL811Read (hci, i));
- }
-}
-
-/************************************************************************
- * Function Name : USBReset
- *
- * This function resets SL811HS controller and detects the speed of
- * the connecting device
- *
- * Input: hci = data structure for the host controller
- *
- * Return: 0 = no device attached; 1 = USB device attached
- *
- ***********************************************************************/
-static int USBReset (hci_t * hci)
-{
- int status;
- hcipriv_t *hp = &hci->hp;
-
- DBGFUNC ("enter USBReset\n");
-
- SL811Write (hci, SL11H_CTLREG2, 0xae);
-
- // setup master and full speed
-
- SL811Write (hci, SL11H_CTLREG1, 0x08); // reset USB
- mdelay (20); // 20ms
- SL811Write (hci, SL11H_CTLREG1, 0); // remove SE0
-
- for (status = 0; status < 100; status++)
- SL811Write (hci, SL11H_INTSTATREG, 0xff); // clear all interrupt bits
-
- status = SL811Read (hci, SL11H_INTSTATREG);
-
- if (status & 0x40) // Check if device is removed
- {
- DBG ("USBReset: Device removed\n");
- SL811Write (hci, SL11H_INTENBLREG,
- SL11H_INTMASK_XFERDONE | SL11H_INTMASK_SOFINTR |
- SL11H_INTMASK_INSRMV);
- hp->RHportStatus->portStatus &=
- ~(PORT_CONNECT_STAT | PORT_ENABLE_STAT);
-
- return 0;
- }
-
- SL811Write (hci, SL11H_BUFLNTHREG_B, 0); //zero lenth
- SL811Write (hci, SL11H_PIDEPREG_B, 0x50); //send SOF to EP0
- SL811Write (hci, SL11H_DEVADDRREG_B, 0x01); //address0
- SL811Write (hci, SL11H_SOFLOWREG, 0xe0);
-
- if (!(status & 0x80)) {
- /* slow speed device connect directly to root-hub */
-
- DBG ("USBReset: low speed Device attached\n");
- SL811Write (hci, SL11H_CTLREG1, 0x8);
- mdelay (20);
- SL811Write (hci, SL11H_SOFTMRREG, 0xee);
- SL811Write (hci, SL11H_CTLREG1, 0x21);
-
- /* start the SOF or EOP */
-
- SL811Write (hci, SL11H_HOSTCTLREG_B, 0x01);
- hp->RHportStatus->portStatus |=
- (PORT_CONNECT_STAT | PORT_LOW_SPEED_DEV_ATTACH_STAT);
-
- /* clear all interrupt bits */
-
- for (status = 0; status < 20; status++)
- SL811Write (hci, SL11H_INTSTATREG, 0xff);
- } else {
- /* full speed device connect directly to root hub */
-
- DBG ("USBReset: full speed Device attached\n");
- SL811Write (hci, SL11H_CTLREG1, 0x8);
- mdelay (20);
- SL811Write (hci, SL11H_SOFTMRREG, 0xae);
- SL811Write (hci, SL11H_CTLREG1, 0x01);
-
- /* start the SOF or EOP */
-
- SL811Write (hci, SL11H_HOSTCTLREG_B, 0x01);
- hp->RHportStatus->portStatus |= (PORT_CONNECT_STAT);
- hp->RHportStatus->portStatus &= ~PORT_LOW_SPEED_DEV_ATTACH_STAT;
-
- /* clear all interrupt bits */
-
- SL811Write (hci, SL11H_INTSTATREG, 0xff);
-
- }
-
- /* enable all interrupts */
- SL811Write (hci, SL11H_INTENBLREG,
- SL11H_INTMASK_XFERDONE | SL11H_INTMASK_SOFINTR |
- SL11H_INTMASK_INSRMV);
-
- return 1;
-}
-
-/*-------------------------------------------------------------------------*/
-/* tl functions */
-static inline void hc_mark_last_trans (hci_t * hci)
-{
- hcipriv_t *hp = &hci->hp;
- __u8 *ptd = hp->tl;
-
- dbg ("enter hc_mark_last_trans\n");
- if (ptd == NULL) {
- printk ("hc_mark_last_trans: ptd = null\n");
- return;
- }
- if (hp->xferPktLen > 0)
- *(ptd + hp->tl_last) |= (1 << 3);
-}
-
-static inline void hc_flush_data_cache (hci_t * hci, void *data, int len)
-{
-}
-
-/************************************************************************
- * Function Name : hc_add_trans
- *
- * This function sets up the SL811HS register and transmit the USB packets.
- *
- * 1) Determine if enough time within the current frame to send the packet
- * 2) Load the data into the SL811HS register
- * 3) Set the appropriate command to the register and trigger the transmit
- *
- * Input: hci = data structure for the host controller
- * len = data length
- * data = transmitting data
- * toggle = USB toggle bit, either 0 or 1
- * maxps = maximum packet size for this endpoint
- * slow = speed of the device
- * endpoint = endpoint number
- * address = USB address of the device
- * pid = packet ID
- * format =
- * urb_state = the current stage of USB transaction
- *
- * Return: 0 = no time left to schedule the transfer
- * 1 = success
- *
- ***********************************************************************/
-static inline int hc_add_trans (hci_t * hci, int len, void *data, int toggle,
- int maxps, int slow, int endpoint, int address,
- int pid, int format, int urb_state)
-{
- hcipriv_t *hp = &hci->hp;
- __u16 speed;
- int ii, jj, kk;
-
- DBGFUNC ("enter hc_addr_trans: len =0x%x, toggle:0x%x, endpoing:0x%x,"
- " addr:0x%x, pid:0x%x,format:0x%x\n", len, toggle, endpoint,
- i address, pid, format);
-
- if (len > maxps) {
- len = maxps;
- }
-
- speed = hp->RHportStatus->portStatus;
- if (speed & PORT_LOW_SPEED_DEV_ATTACH_STAT) {
-// ii = (8*7*8 + 6*3) * len + 800;
- ii = 8 * 8 * len + 1024;
- } else {
- if (slow) {
-// ii = (8*7*8 + 6*3) * len + 800;
- ii = 8 * 8 * len + 2048;
- } else
-// ii = (8*7 + 6*3)*len + 110;
- ii = 8 * len + 256;
- }
-
- ii += 2 * 10 * len;
-
- jj = SL811Read (hci, SL11H_SOFTMRREG);
- kk = (jj & 0xFF) * 64 - ii;
-
- if (kk < 0) {
- DBGVERBOSE
- ("hc_add_trans: no bandwidth for schedule, ii = 0x%x,"
- "jj = 0x%x, len =0x%x, active_trans = 0x%x\n", ii, jj, len,
- hci->active_trans);
- return (-1);
- }
-
- if (pid != PID_IN) {
- /* Load data into hc */
-
- SL811BufWrite (hci, SL11H_DATA_START, (__u8 *) data, len);
- }
-
- /* transmit */
-
- SL11StartXaction (hci, (__u8) address, (__u8) endpoint, (__u8) pid, len,
- toggle, slow, urb_state);
-
- return len;
-}
-
-/************************************************************************
- * Function Name : hc_parse_trans
- *
- * This function checks the status of the transmitted or received packet
- * and copy the data from the SL811HS register into a buffer.
- *
- * 1) Check the status of the packet
- * 2) If successful, and IN packet then copy the data from the SL811HS register
- * into a buffer
- *
- * Input: hci = data structure for the host controller
- * actbytes = pointer to actual number of bytes
- * data = data buffer
- * cc = packet status
- * length = the urb transmit length
- * pid = packet ID
- * urb_state = the current stage of USB transaction
- *
- * Return: 0
- ***********************************************************************/
-static inline int hc_parse_trans (hci_t * hci, int *actbytes, __u8 * data,
- int *cc, int *toggle, int length, int pid,
- int urb_state)
-{
- __u8 addr;
- __u8 len;
-
- DBGFUNC ("enter hc_parse_trans\n");
-
- /* get packet status; convert ack rcvd to ack-not-rcvd */
-
- *cc = (int) SL811Read (hci, SL11H_PKTSTATREG);
-
- if (*cc &
- (SL11H_STATMASK_ERROR | SL11H_STATMASK_TMOUT | SL11H_STATMASK_OVF |
- SL11H_STATMASK_NAK | SL11H_STATMASK_STALL)) {
- if (*cc & SL11H_STATMASK_OVF)
- DBGERR ("parse trans: error recv ack, cc = 0x%x, TX_BASE_Len = "
- "0x%x, TX_count=0x%x\n", *cc,
- SL811Read (hci, SL11H_BUFLNTHREG),
- SL811Read (hci, SL11H_XFERCNTREG));
-
- } else {
- DBGVERBOSE ("parse trans: recv ack, cc = 0x%x, len = 0x%x, \n",
- *cc, length);
-
- /* Successful data */
- if ((pid == PID_IN) && (urb_state != US_CTRL_SETUP)) {
-
- /* Find the base address */
- addr = SL811Read (hci, SL11H_BUFADDRREG);
-
- /* Find the Transmit Length */
- len = SL811Read (hci, SL11H_BUFLNTHREG);
-
- /* The actual data length = xmit length reg - xfer count reg */
- *actbytes = len - SL811Read (hci, SL11H_XFERCNTREG);
-
- if ((data != NULL) && (*actbytes > 0)) {
- SL811BufRead (hci, addr, data, *actbytes);
-
- } else if ((data == NULL) && (*actbytes <= 0)) {
- DBGERR ("hc_parse_trans: data = NULL or actbyte = 0x%x\n",
- *actbytes);
- return 0;
- }
- } else if (pid == PID_OUT) {
- *actbytes = length;
- } else {
- // printk ("ERR:parse_trans, pid != IN or OUT, pid = 0x%x\n", pid);
- }
- *toggle = !*toggle;
- }
-
- return 0;
-}
-
-/************************************************************************
- * Function Name : hc_start_int
- *
- * This function enables SL811HS interrupts
- *
- * Input: hci = data structure for the host controller
- *
- * Return: none
- ***********************************************************************/
-static void hc_start_int (hci_t * hci)
-{
-#ifdef HC_SWITCH_INT
- int mask =
- SL11H_INTMASK_XFERDONE | SL11H_INTMASK_SOFINTR |
- SL11H_INTMASK_INSRMV | SL11H_INTMASK_USBRESET;
- SL811Write (hci, IntEna, mask);
-#endif
-}
-
-/************************************************************************
- * Function Name : hc_stop_int
- *
- * This function disables SL811HS interrupts
- *
- * Input: hci = data structure for the host controller
- *
- * Return: none
- ***********************************************************************/
-static void hc_stop_int (hci_t * hci)
-{
-#ifdef HC_SWITCH_INT
- SL811Write (hci, SL11H_INTSTATREG, 0xff);
-// SL811Write(hci, SL11H_INTENBLREG, SL11H_INTMASK_INSRMV);
-
-#endif
-}
-
-/************************************************************************
- * Function Name : handleInsRmvIntr
- *
- * This function handles the insertion or removal of device on SL811HS.
- * It resets the controller and updates the port status
- *
- * Input: hci = data structure for the host controller
- *
- * Return: none
- ***********************************************************************/
-void handleInsRmvIntr (hci_t * hci)
-{
- hcipriv_t *hp = &hci->hp;
-
- USBReset (hci);
-
- /* Changes in connection status */
-
- hp->RHportStatus->portChange |= PORT_CONNECT_CHANGE;
-
- /* Port Enable or Disable */
-
- if (hp->RHportStatus->portStatus & PORT_CONNECT_STAT) {
- /* device is connected to the port:
- * 1) Enable port
- * 2) Resume ??
- */
-// hp->RHportStatus->portChange |= PORT_ENABLE_CHANGE;
-
- /* Over Current is not supported by the SL811 HW ?? */
-
- /* How about the Port Power ?? */
-
- } else {
- /* Device has disconnect:
- * 1) Disable port
- */
-
- hp->RHportStatus->portStatus &= ~(PORT_ENABLE_STAT);
- hp->RHportStatus->portChange |= PORT_ENABLE_CHANGE;
-
- }
-}
-
-/*****************************************************************
- *
- * Function Name: SL11StartXaction
- *
- * This functions load the registers with appropriate value and
- * transmit the packet.
- *
- * Input: hci = data structure for the host controller
- * addr = USB address of the device
- * epaddr = endpoint number
- * pid = packet ID
- * len = data length
- * toggle = USB toggle bit, either 0 or 1
- * slow = speed of the device
- * urb_state = the current stage of USB transaction
- *
- * Return: 0 = error; 1 = successful
- *
- *****************************************************************/
-int SL11StartXaction (hci_t * hci, __u8 addr, __u8 epaddr, int pid, int len,
- int toggle, int slow, int urb_state)
-{
-
- hcipriv_t *hp = &hci->hp;
- __u8 cmd = 0;
- __u8 setup_data[4];
- __u16 speed;
-
- speed = hp->RHportStatus->portStatus;
- if (!(speed & PORT_LOW_SPEED_DEV_ATTACH_STAT) && slow) {
- cmd |= SL11H_HCTLMASK_PREAMBLE;
- }
- switch (pid) {
- case PID_SETUP:
- cmd &= SL11H_HCTLMASK_PREAMBLE;
- cmd |=
- (SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENBLEP |
- SL11H_HCTLMASK_WRITE);
- break;
-
- case PID_OUT:
- cmd &= (SL11H_HCTLMASK_SEQ | SL11H_HCTLMASK_PREAMBLE);
- cmd |=
- (SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENBLEP |
- SL11H_HCTLMASK_WRITE);
- if (toggle) {
- cmd |= SL11H_HCTLMASK_SEQ;
- }
- break;
-
- case PID_IN:
- cmd &= (SL11H_HCTLMASK_SEQ | SL11H_HCTLMASK_PREAMBLE);
- cmd |= (SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENBLEP);
- break;
-
- default:
- DBGERR ("ERR: SL11StartXaction: unknow pid = 0x%x\n", pid);
- return 0;
- }
- setup_data[0] = SL11H_DATA_START;
- setup_data[1] = len;
- setup_data[2] = (((pid & 0x0F) << 4) | (epaddr & 0xF));
- setup_data[3] = addr & 0x7F;
-
- SL811BufWrite (hci, SL11H_BUFADDRREG, (__u8 *) & setup_data[0], 4);
-
- SL811Write (hci, SL11H_HOSTCTLREG, cmd);
-
-#if 0
- /* The SL811 has a hardware flaw when hub devices sends out
- * SE0 between packets. It has been found in a TI chipset and
- * cypress hub chipset. It causes the SL811 to hang
- * The workaround is to re-issue the preample again.
- */
-
- if ((cmd & SL11H_HCTLMASK_PREAMBLE)) {
- SL811Write (hci, SL11H_PIDEPREG_B, 0xc0);
- SL811Write (hci, SL11H_HOSTCTLREG_B, 0x1); // send the premable
- }
-#endif
- return 1;
-}
-
-/*****************************************************************
- *
- * Function Name: hc_interrupt
- *
- * Interrupt service routine.
- *
- * 1) determine the causes of interrupt
- * 2) clears all interrupts
- * 3) calls appropriate function to service the interrupt
- *
- * Input: irq = interrupt line associated with the controller
- * hci = data structure for the host controller
- * r = holds the snapshot of the processor's context before
- * the processor entered interrupt code. (not used here)
- *
- * Return value : None.
- *
- *****************************************************************/
-static void hc_interrupt (int irq, void *__hci, struct pt_regs *r)
-{
- char ii;
- hci_t *hci = __hci;
- int isExcessNak = 0;
- int urb_state = 0;
- char tmpIrq = 0;
-
- /* Get value from interrupt status register */
-
- ii = SL811Read (hci, SL11H_INTSTATREG);
-
- if (ii & SL11H_INTMASK_INSRMV) {
- /* Device insertion or removal detected for the USB port */
-
- SL811Write (hci, SL11H_INTENBLREG, 0);
- SL811Write (hci, SL11H_CTLREG1, 0);
- mdelay (100); // wait for device stable
- handleInsRmvIntr (hci);
- return;
- }
-
- /* Clear all interrupts */
-
- SL811Write (hci, SL11H_INTSTATREG, 0xff);
-
- if (ii & SL11H_INTMASK_XFERDONE) {
- /* USB Done interrupt occurred */
-
- urb_state = sh_done_list (hci, &isExcessNak);
-#ifdef WARNING
- if (hci->td_array->len > 0)
- printk ("WARNING: IRQ, td_array->len = 0x%x, s/b:0\n",
- hci->td_array->len);
-#endif
- if (hci->td_array->len == 0 && !isExcessNak
- && !(ii & SL11H_INTMASK_SOFINTR) && (urb_state == 0)) {
- if (urb_state == 0) {
- /* All urb_state has not been finished yet!
- * continue with the current urb transaction
- */
-
- if (hci->last_packet_nak == 0) {
- if (!usb_pipecontrol
- (hci->td_array->td[0].urb->pipe))
- sh_add_packet (hci, hci->td_array-> td[0].urb);
- }
- } else {
- /* The last transaction has completed:
- * schedule the next transaction
- */
-
- sh_schedule_trans (hci, 0);
- }
- }
- SL811Write (hci, SL11H_INTSTATREG, 0xff);
- return;
- }
-
- if (ii & SL11H_INTMASK_SOFINTR) {
- hci->frame_number = (hci->frame_number + 1) % 2048;
- if (hci->td_array->len == 0)
- sh_schedule_trans (hci, 1);
- else {
- if (sofWaitCnt++ > 100) {
- /* The last transaction has not completed.
- * Need to retire the current td, and let
- * it transmit again later on.
- * (THIS NEEDS TO BE WORK ON MORE, IT SHOULD NEVER
- * GET TO THIS POINT)
- */
-
- DBGERR ("SOF interrupt: td_array->len = 0x%x, s/b: 0\n",
- hci->td_array->len);
- urb_print (hci->td_array->td[hci->td_array->len - 1].urb,
- "INTERRUPT", 0);
- sh_done_list (hci, &isExcessNak);
- SL811Write (hci, SL11H_INTSTATREG, 0xff);
- hci->td_array->len = 0;
- sofWaitCnt = 0;
- }
- }
- tmpIrq = SL811Read (hci, SL11H_INTSTATREG) & SL811Read (hci, SL11H_INTENBLREG);
- if (tmpIrq) {
- DBG ("IRQ occurred while service SOF: irq = 0x%x\n",
- tmpIrq);
-
- /* If we receive a DONE IRQ after schedule, need to
- * handle DONE IRQ again
- */
-
- if (tmpIrq & SL11H_INTMASK_XFERDONE) {
- DBGERR ("IRQ occurred while service SOF: irq = 0x%x\n",
- tmpIrq);
- urb_state = sh_done_list (hci, &isExcessNak);
- }
- SL811Write (hci, SL11H_INTSTATREG, 0xff);
- }
- } else {
- DBG ("SL811 ISR: unknown, int = 0x%x \n", ii);
- }
-
- SL811Write (hci, SL11H_INTSTATREG, 0xff);
- return;
-}
-
-/*****************************************************************
- *
- * Function Name: hc_reset
- *
- * This function does register test and resets the SL811HS
- * controller.
- *
- * Input: hci = data structure for the host controller
- *
- * Return value : 0
- *
- *****************************************************************/
-static int hc_reset (hci_t * hci)
-{
- int attachFlag = 0;
-
- DBGFUNC ("Enter hc_reset\n");
- regTest (hci);
- attachFlag = USBReset (hci);
- if (attachFlag) {
- setPortChange (hci, PORT_CONNECT_CHANGE);
- }
- return (0);
-}
-
-/*****************************************************************
- *
- * Function Name: hc_alloc_trans_buffer
- *
- * This function allocates all transfer buffer
- *
- * Input: hci = data structure for the host controller
- *
- * Return value : 0
- *
- *****************************************************************/
-static int hc_alloc_trans_buffer (hci_t * hci)
-{
- hcipriv_t *hp = &hci->hp;
- int maxlen;
-
- hp->itl0_len = 0;
- hp->itl1_len = 0;
- hp->atl_len = 0;
-
- hp->itl_buffer_len = 1024;
- hp->atl_buffer_len = 4096 - 2 * hp->itl_buffer_len; /* 2048 */
-
- maxlen = (hp->itl_buffer_len > hp->atl_buffer_len) ? hp->itl_buffer_len : hp->atl_buffer_len;
-
- hp->tl = kmalloc (maxlen, GFP_KERNEL);
-
- if (!hp->tl)
- return -ENOMEM;
-
- memset (hp->tl, 0, maxlen);
- return 0;
-}
-
-/*****************************************************************
- *
- * Function Name: getPortStatusAndChange
- *
- * This function gets the ports status from SL811 and format it
- * to a USB request format
- *
- * Input: hci = data structure for the host controller
- *
- * Return value : port status and change
- *
- *****************************************************************/
-static __u32 getPortStatusAndChange (hci_t * hci)
-{
- hcipriv_t *hp = &hci->hp;
- __u32 portstatus;
-
- DBGFUNC ("enter getPorStatusAndChange\n");
-
- portstatus = hp->RHportStatus->portChange << 16 | hp->RHportStatus->portStatus;
-
- return (portstatus);
-}
-
-/*****************************************************************
- *
- * Function Name: setPortChange
- *
- * This function set the bit position of portChange.
- *
- * Input: hci = data structure for the host controller
- * bitPos = the bit position
- *
- * Return value : none
- *
- *****************************************************************/
-static void setPortChange (hci_t * hci, __u16 bitPos)
-{
- hcipriv_t *hp = &hci->hp;
-
- switch (bitPos) {
- case PORT_CONNECT_STAT:
- hp->RHportStatus->portChange |= bitPos;
- break;
-
- case PORT_ENABLE_STAT:
- hp->RHportStatus->portChange |= bitPos;
- break;
-
- case PORT_RESET_STAT:
- hp->RHportStatus->portChange |= bitPos;
- break;
-
- case PORT_POWER_STAT:
- hp->RHportStatus->portChange |= bitPos;
- break;
-
- case PORT_SUSPEND_STAT:
- hp->RHportStatus->portChange |= bitPos;
- break;
-
- case PORT_OVER_CURRENT_STAT:
- hp->RHportStatus->portChange |= bitPos;
- break;
- }
-}
-
-/*****************************************************************
- *
- * Function Name: clrPortChange
- *
- * This function clear the bit position of portChange.
- *
- * Input: hci = data structure for the host controller
- * bitPos = the bit position
- *
- * Return value : none
- *
- *****************************************************************/
-static void clrPortChange (hci_t * hci, __u16 bitPos)
-{
- hcipriv_t *hp = &hci->hp;
- switch (bitPos) {
- case PORT_CONNECT_CHANGE:
- hp->RHportStatus->portChange &= ~bitPos;
- break;
-
- case PORT_ENABLE_CHANGE:
- hp->RHportStatus->portChange &= ~bitPos;
- break;
-
- case PORT_RESET_CHANGE:
- hp->RHportStatus->portChange &= ~bitPos;
- break;
-
- case PORT_SUSPEND_CHANGE:
- hp->RHportStatus->portChange &= ~bitPos;
- break;
-
- case PORT_OVER_CURRENT_CHANGE:
- hp->RHportStatus->portChange &= ~bitPos;
- break;
- }
-}
-
-/*****************************************************************
- *
- * Function Name: clrPortStatus
- *
- * This function clear the bit position of portStatus.
- *
- * Input: hci = data structure for the host controller
- * bitPos = the bit position
- *
- * Return value : none
- *
- *****************************************************************/
-static void clrPortStatus (hci_t * hci, __u16 bitPos)
-{
- hcipriv_t *hp = &hci->hp;
- switch (bitPos) {
- case PORT_ENABLE_STAT:
- hp->RHportStatus->portStatus &= ~bitPos;
- break;
-
- case PORT_RESET_STAT:
- hp->RHportStatus->portStatus &= ~bitPos;
- break;
-
- case PORT_POWER_STAT:
- hp->RHportStatus->portStatus &= ~bitPos;
- break;
-
- case PORT_SUSPEND_STAT:
- hp->RHportStatus->portStatus &= ~bitPos;
- break;
- }
-}
-
-/*****************************************************************
- *
- * Function Name: setPortStatus
- *
- * This function set the bit position of portStatus.
- *
- * Input: hci = data structure for the host controller
- * bitPos = the bit position
- *
- * Return value : none
- *
- *****************************************************************/
-static void setPortStatus (hci_t * hci, __u16 bitPos)
-{
- hcipriv_t *hp = &hci->hp;
- switch (bitPos) {
- case PORT_ENABLE_STAT:
- hp->RHportStatus->portStatus |= bitPos;
- break;
-
- case PORT_RESET_STAT:
- hp->RHportStatus->portStatus |= bitPos;
- break;
-
- case PORT_POWER_STAT:
- hp->RHportStatus->portStatus |= bitPos;
- break;
-
- case PORT_SUSPEND_STAT:
- hp->RHportStatus->portStatus |= bitPos;
- break;
- }
-}
-
-/*****************************************************************
- *
- * Function Name: hc_start
- *
- * This function starts the root hub functionality.
- *
- * Input: hci = data structure for the host controller
- *
- * Return value : 0
- *
- *****************************************************************/
-static int hc_start (hci_t * hci)
-{
- DBGFUNC ("Enter hc_start\n");
-
- rh_connect_rh (hci);
-
- return 0;
-}
-
-/*****************************************************************
- *
- * Function Name: hc_alloc_hci
- *
- * This function allocates all data structure and store in the
- * private data structure.
- *
- * Input: hci = data structure for the host controller
- *
- * Return value : 0
- *
- *****************************************************************/
-static hci_t *__devinit hc_alloc_hci (void)
-{
- hci_t *hci;
- hcipriv_t *hp;
- portstat_t *ps;
- struct usb_bus *bus;
-
- DBGFUNC ("Enter hc_alloc_hci\n");
- hci = (hci_t *) kmalloc (sizeof (hci_t), GFP_KERNEL);
- if (!hci)
- return NULL;
-
- memset (hci, 0, sizeof (hci_t));
-
- hp = &hci->hp;
-
- hp->irq = -1;
- hp->hcport = -1;
-
- /* setup root hub port status */
-
- ps = (portstat_t *) kmalloc (sizeof (portstat_t), GFP_KERNEL);
-
- if (!ps)
- return NULL;
- ps->portStatus = PORT_STAT_DEFAULT;
- ps->portChange = PORT_CHANGE_DEFAULT;
- hp->RHportStatus = ps;
-
- hci->nakCnt = 0;
- hci->last_packet_nak = 0;
-
- hci->a_td_array.len = 0;
- hci->i_td_array[0].len = 0;
- hci->i_td_array[1].len = 0;
- hci->td_array = &hci->a_td_array;
- hci->active_urbs = 0;
- hci->active_trans = 0;
- INIT_LIST_HEAD (&hci->hci_hcd_list);
- list_add (&hci->hci_hcd_list, &hci_hcd_list);
- init_waitqueue_head (&hci->waitq);
-
- INIT_LIST_HEAD (&hci->ctrl_list);
- INIT_LIST_HEAD (&hci->bulk_list);
- INIT_LIST_HEAD (&hci->iso_list);
- INIT_LIST_HEAD (&hci->intr_list);
- INIT_LIST_HEAD (&hci->del_list);
-
- bus = usb_alloc_bus (&hci_device_operations);
- if (!bus) {
- kfree (hci);
- kfree (ps);
- return NULL;
- }
-
- hci->bus = bus;
- bus->hcpriv = (void *) hci;
-
- return hci;
-}
-
-/*****************************************************************
- *
- * Function Name: hc_release_hci
- *
- * This function De-allocate all resources
- *
- * Input: hci = data structure for the host controller
- *
- * Return value : 0
- *
- *****************************************************************/
-static void hc_release_hci (hci_t * hci)
-{
- hcipriv_t *hp = &hci->hp;
-
- DBGFUNC ("Enter hc_release_hci\n");
-
- /* disconnect all devices */
- if (hci->bus->root_hub)
- usb_disconnect (&hci->bus->root_hub);
-
- hc_reset (hci);
-
- if (hp->tl)
- kfree (hp->tl);
-
- if (hp->hcport > 0) {
- release_region (hp->hcport, 2);
- hp->hcport = 0;
- }
-
- if (hp->irq >= 0) {
- free_irq (hp->irq, hci);
- hp->irq = -1;
- }
-
- usb_deregister_bus (hci->bus);
- usb_put_bus (hci->bus);
-
- list_del_init (&hci->hci_hcd_list);
-
- kfree (hci);
-}
-
-/*****************************************************************
- *
- * Function Name: init_irq
- *
- * This function is board specific. It sets up the interrupt to
- * be an edge trigger and trigger on the rising edge
- *
- * Input: none
- *
- * Return value : none
- *
- *****************************************************************/
-void init_irq (void)
-{
- GPDR &= ~(1 << 13);
- set_GPIO_IRQ_edge (1 << 13, GPIO_RISING_EDGE);
-}
-
-/*****************************************************************
- *
- * Function Name: hc_found_hci
- *
- * This function request IO memory regions, request IRQ, and
- * allocate all other resources.
- *
- * Input: addr = first IO address
- * addr2 = second IO address
- * irq = interrupt number
- *
- * Return: 0 = success or error condition
- *
- *****************************************************************/
-static int __devinit hc_found_hci (int addr, int addr2, int irq)
-{
- hci_t *hci;
- hcipriv_t *hp;
-
- DBGFUNC ("Enter hc_found_hci\n");
- hci = hc_alloc_hci ();
- if (!hci) {
- return -ENOMEM;
- }
-
- init_irq ();
- hp = &hci->hp;
-
- if (!request_region (addr, 256, "SL811 USB HOST")) {
- DBGERR ("request address %d failed", addr);
- hc_release_hci (hci);
- return -EBUSY;
- }
- hp->hcport = addr;
- if (!hp->hcport) {
- DBGERR ("Error mapping SL811 Memory 0x%x", hp->hcport);
- }
-
- if (!request_region (addr2, 256, "SL811 USB HOST")) {
- DBGERR ("request address %d failed", addr2);
- hc_release_hci (hci);
- return -EBUSY;
- }
- hp->hcport2 = addr2;
- if (!hp->hcport2) {
- DBGERR ("Error mapping SL811 Memory 0x%x", hp->hcport2);
- }
-
- if (hc_alloc_trans_buffer (hci)) {
- hc_release_hci (hci);
- return -ENOMEM;
- }
-
- usb_register_bus (hci->bus);
-
- if (request_irq (irq, hc_interrupt, 0, "SL811", hci) != 0) {
- DBGERR ("request interrupt %d failed", irq);
- hc_release_hci (hci);
- return -EBUSY;
- }
- hp->irq = irq;
-
- printk (KERN_INFO __FILE__ ": USB SL811 at %x, addr2 = %x, IRQ %d\n",
- addr, addr2, irq);
- hc_reset (hci);
-
- if (hc_start (hci) < 0) {
- DBGERR ("can't start usb-%x", addr);
- hc_release_hci (hci);
- return -EBUSY;
- }
-
- return 0;
-}
-
-/*****************************************************************
- *
- * Function Name: hci_hcd_init
- *
- * This is an init function, and it is the first function being called
- *
- * Input: none
- *
- * Return: 0 = success or error condition
- *
- *****************************************************************/
-static int __init hci_hcd_init (void)
-{
- int ret;
-
- DBGFUNC ("Enter hci_hcd_init\n");
- if (usb_disabled())
- return -ENODEV;
-
- ret = hc_found_hci (base_addr, data_reg_addr, irq);
-
- return ret;
-}
-
-/*****************************************************************
- *
- * Function Name: hci_hcd_cleanup
- *
- * This is a cleanup function, and it is called when module is
- * unloaded.
- *
- * Input: none
- *
- * Return: none
- *
- *****************************************************************/
-static void __exit hci_hcd_cleanup (void)
-{
- struct list_head *hci_l;
- hci_t *hci;
-
- DBGFUNC ("Enter hci_hcd_cleanup\n");
- for (hci_l = hci_hcd_list.next; hci_l != &hci_hcd_list;) {
- hci = list_entry (hci_l, hci_t, hci_hcd_list);
- hci_l = hci_l->next;
- hc_release_hci (hci);
- }
-}
-
-module_init (hci_hcd_init);
-module_exit (hci_hcd_cleanup);
-
-MODULE_AUTHOR ("Pei Liu <pbl@cypress.com>");
-MODULE_DESCRIPTION ("USB SL811HS Host Controller Driver");
+++ /dev/null
-/*
- * SL811HS HCD (Host Controller Driver) for USB.
- *
- * COPYRIGHT (C) by CYPRESS SEMICONDUCTOR INC
- *
- *
- */
-
-#define GET_FRAME_NUMBER(hci) READ_REG32 (hci, HcFmNumber)
-
-/*
- * Maximum number of root hub ports
- */
-#define MAX_ROOT_PORTS 15 /* maximum OHCI root hub ports */
-
-/* control and status registers */
-#define HcRevision 0x00
-#define HcControl 0x01
-#define HcCommandStatus 0x02
-#define HcInterruptStatus 0x03
-#define HcInterruptEnable 0x04
-#define HcInterruptDisable 0x05
-#define HcFmInterval 0x0D
-#define HcFmRemaining 0x0E
-#define HcFmNumber 0x0F
-#define HcLSThreshold 0x11
-#define HcRhDescriptorA 0x12
-#define HcRhDescriptorB 0x13
-#define HcRhStatus 0x14
-#define HcRhPortStatus 0x15
-
-#define HcHardwareConfiguration 0x20
-#define HcDMAConfiguration 0x21
-#define HcTransferCounter 0x22
-#define HcuPInterrupt 0x24
-#define HcuPInterruptEnable 0x25
-#define HcChipID 0x27
-#define HcScratch 0x28
-#define HcSoftwareReset 0x29
-#define HcITLBufferLength 0x2A
-#define HcATLBufferLength 0x2B
-#define HcBufferStatus 0x2C
-#define HcReadBackITL0Length 0x2D
-#define HcReadBackITL1Length 0x2E
-#define HcITLBufferPort 0x40
-#define HcATLBufferPort 0x41
-
-/* OHCI CONTROL AND STATUS REGISTER MASKS */
-
-/*
- * HcControl (control) register masks
- */
-#define OHCI_CTRL_HCFS (3 << 6) /* BUS state mask */
-#define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */
-#define OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */
-
-/* pre-shifted values for HCFS */
-#define OHCI_USB_RESET (0 << 6)
-#define OHCI_USB_RESUME (1 << 6)
-#define OHCI_USB_OPER (2 << 6)
-#define OHCI_USB_SUSPEND (3 << 6)
-
-/*
- * HcCommandStatus (cmdstatus) register masks
- */
-#define OHCI_HCR (1 << 0) /* host controller reset */
-#define OHCI_SO (3 << 16) /* scheduling overrun count */
-
-/*
- * masks used with interrupt registers:
- * HcInterruptStatus (intrstatus)
- * HcInterruptEnable (intrenable)
- * HcInterruptDisable (intrdisable)
- */
-#define OHCI_INTR_SO (1 << 0) /* scheduling overrun */
-
-#define OHCI_INTR_SF (1 << 2) /* start frame */
-#define OHCI_INTR_RD (1 << 3) /* resume detect */
-#define OHCI_INTR_UE (1 << 4) /* unrecoverable error */
-#define OHCI_INTR_FNO (1 << 5) /* frame number overflow */
-#define OHCI_INTR_RHSC (1 << 6) /* root hub status change */
-#define OHCI_INTR_ATD (1 << 7) /* scheduling overrun */
-
-#define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */
-
-/*
- * HcHardwareConfiguration
- */
-#define InterruptPinEnable (1 << 0)
-#define InterruptPinTrigger (1 << 1)
-#define InterruptOutputPolarity (1 << 2)
-#define DataBusWidth16 (1 << 3)
-#define DREQOutputPolarity (1 << 5)
-#define DACKInputPolarity (1 << 6)
-#define EOTInputPolarity (1 << 7)
-#define DACKMode (1 << 8)
-#define AnalogOCEnable (1 << 10)
-#define SuspendClkNotStop (1 << 11)
-#define DownstreamPort15KRSel (1 << 12)
-
-/*
- * HcDMAConfiguration
- */
-#define DMAReadWriteSelect (1 << 0)
-#define ITL_ATL_DataSelect (1 << 1)
-#define DMACounterSelect (1 << 2)
-#define DMAEnable (1 << 4)
-#define BurstLen_1 0
-#define BurstLen_4 (1 << 5)
-#define BurstLen_8 (2 << 5)
-
-/*
- * HcuPInterrupt
- */
-#define SOFITLInt (1 << 0)
-#define ATLInt (1 << 1)
-#define AllEOTInterrupt (1 << 2)
-#define OPR_Reg (1 << 4)
-#define HCSuspended (1 << 5)
-#define ClkReady (1 << 6)
-
-/*
- * HcBufferStatus
- */
-#define ITL0BufferFull (1 << 0)
-#define ITL1BufferFull (1 << 1)
-#define ATLBufferFull (1 << 2)
-#define ITL0BufferDone (1 << 3)
-#define ITL1BufferDone (1 << 4)
-#define ATLBufferDone (1 << 5)
-
-/* OHCI ROOT HUB REGISTER MASKS */
-
-/* roothub.portstatus [i] bits */
-#define RH_PS_CCS 0x00000001 /* current connect status */
-#define RH_PS_PES 0x00000002 /* port enable status */
-#define RH_PS_PSS 0x00000004 /* port suspend status */
-#define RH_PS_POCI 0x00000008 /* port over current indicator */
-#define RH_PS_PRS 0x00000010 /* port reset status */
-#define RH_PS_PPS 0x00000100 /* port power status */
-#define RH_PS_LSDA 0x00000200 /* low speed device attached */
-#define RH_PS_CSC 0x00010000 /* connect status change */
-#define RH_PS_PESC 0x00020000 /* port enable status change */
-#define RH_PS_PSSC 0x00040000 /* port suspend status change */
-#define RH_PS_OCIC 0x00080000 /* over current indicator change */
-#define RH_PS_PRSC 0x00100000 /* port reset status change */
-
-/* roothub.status bits */
-#define RH_HS_LPS 0x00000001 /* local power status */
-#define RH_HS_OCI 0x00000002 /* over current indicator */
-#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */
-#define RH_HS_LPSC 0x00010000 /* local power status change */
-#define RH_HS_OCIC 0x00020000 /* over current indicator change */
-#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */
-
-/* roothub.b masks */
-#define RH_B_DR 0x0000ffff /* device removable flags */
-#define RH_B_PPCM 0xffff0000 /* port power control mask */
-
-/* roothub.a masks */
-#define RH_A_NDP (0xff << 0) /* number of downstream ports */
-#define RH_A_PSM (1 << 8) /* power switching mode */
-#define RH_A_NPS (1 << 9) /* no power switching */
-#define RH_A_DT (1 << 10) /* device type (mbz) */
-#define RH_A_OCPM (1 << 11) /* over current protection mode */
-#define RH_A_NOCP (1 << 12) /* no over current protection */
-#define RH_A_POTPGT (0xff << 24) /* power on to power good time */
-
-#define URB_DEL 1
-
-#define PORT_STAT_DEFAULT 0x0100
-#define PORT_CONNECT_STAT 0x1
-#define PORT_ENABLE_STAT 0x2
-#define PORT_SUSPEND_STAT 0x4
-#define PORT_OVER_CURRENT_STAT 0x8
-#define PORT_RESET_STAT 0x10
-#define PORT_POWER_STAT 0x100
-#define PORT_LOW_SPEED_DEV_ATTACH_STAT 0x200
-
-#define PORT_CHANGE_DEFAULT 0x0
-#define PORT_CONNECT_CHANGE 0x1
-#define PORT_ENABLE_CHANGE 0x2
-#define PORT_SUSPEND_CHANGE 0x4
-#define PORT_OVER_CURRENT_CHANGE 0x8
-#define PORT_RESET_CHANGE 0x10
-
-/* Port Status Request info */
-
-typedef struct portstat {
- __u16 portChange;
- __u16 portStatus;
-} portstat_t;
-
-typedef struct hcipriv {
- int irq;
- int disabled; /* e.g. got a UE, we're hung */
- atomic_t resume_count; /* defending against multiple resumes */
- struct ohci_regs *regs; /* OHCI controller's memory */
- int hcport; /* I/O base address */
- int hcport2; /* I/O data reg addr */
-
- struct portstat *RHportStatus; /* root hub port status */
-
- int intrstatus;
- __u32 hc_control; /* copy of the hc control reg */
-
- int frame;
-
- __u8 *tl;
- int xferPktLen;
- int atl_len;
- int atl_buffer_len;
- int itl0_len;
- int itl1_len;
- int itl_buffer_len;
- int itl_index;
- int tl_last;
- int units_left;
-
-} hcipriv_t;
-struct hci;
-
-#define cClt 0 // Control
-#define cISO 1 // ISO
-#define cBULK 2 // BULK
-#define cInt 3 // Interrupt
-#define ISO_BIT 0x10
-
-/*-------------------------------------------------------------------------
- * EP0 use for configuration and Vendor Specific command interface
- *------------------------------------------------------------------------*/
-#define cMemStart 0x10
-#define EP0Buf 0x40 /* SL11H/SL811H memory start at 0x40 */
-#define EP0Len 0x40 /* Length of config buffer EP0Buf */
-#define EP1Buf 0x60
-#define EP1Len 0x40
-
-/*-------------------------------------------------------------------------
- * SL11H/SL811H memory from 80h-ffh use as ping-pong buffer.
- *------------------------------------------------------------------------*/
-#define uBufA 0x80 /* buffer A address for DATA0 */
-#define uBufB 0xc0 /* buffer B address for DATA1 */
-#define uXferLen 0x40 /* xfer length */
-#define sMemSize 0xc0 /* Total SL11 memory size */
-#define cMemEnd 256
-
-/*-------------------------------------------------------------------------
- * SL811H Register Control memory map
- * --Note:
- * --SL11H only has one control register set from 0x00-0x04
- * --SL811H has two control register set from 0x00-0x04 and 0x08-0x0c
- *------------------------------------------------------------------------*/
-
-#define EP0Control 0x00
-#define EP0Address 0x01
-#define EP0XferLen 0x02
-#define EP0Status 0x03
-#define EP0Counter 0x04
-
-#define EP1Control 0x08
-#define EP1Address 0x09
-#define EP1XferLen 0x0a
-#define EP1Status 0x0b
-#define EP1Counter 0x0c
-
-#define CtrlReg 0x05
-#define IntEna 0x06
- // 0x07 is reserved
-#define IntStatus 0x0d
-#define cDATASet 0x0e
-#define cSOFcnt 0x0f
-#define IntMask 0x57 /* Reset|DMA|EP0|EP2|EP1 for IntEna */
-#define HostMask 0x47 /* Host request command for IntStatus */
-#define ReadMask 0xd7 /* Read mask interrupt for IntStatus */
-
-/*-------------------------------------------------------------------------
- * Standard Chapter 9 definition
- *-------------------------------------------------------------------------
- */
-#define GET_STATUS 0x00
-#define CLEAR_FEATURE 0x01
-#define SET_FEATURE 0x03
-#define SET_ADDRESS 0x05
-#define GET_DESCRIPTOR 0x06
-#define SET_DESCRIPTOR 0x07
-#define GET_CONFIG 0x08
-#define SET_CONFIG 0x09
-#define GET_INTERFACE 0x0a
-#define SET_INTERFACE 0x0b
-#define SYNCH_FRAME 0x0c
-
-#define DEVICE 0x01
-#define CONFIGURATION 0x02
-#define STRING 0x03
-#define INTERFACE 0x04
-#define ENDPOINT 0x05
-
-/*-------------------------------------------------------------------------
- * SL11H/SL811H definition
- *-------------------------------------------------------------------------
- */
-#define DATA0_WR 0x07 // (Arm+Enable+tranmist to Host+DATA0)
-#define DATA1_WR 0x47 // (Arm+Enable+tranmist to Host on DATA1)
-#define ZDATA0_WR 0x05 // (Arm+Transaction Ignored+tranmist to Host+DATA0)
-#define ZDATA1_WR 0x45 // (Arm+Transaction Ignored+tranmist to Host+DATA1)
-#define DATA0_RD 0x03 // (Arm+Enable+received from Host+DATA0)
-#define DATA1_RD 0x43 // (Arm+Enable+received from Host+DATA1)
-
-#define PID_SETUP 0x2d // USB Specification 1.1 Standard Definition
-#define PID_SOF 0xA5
-#define PID_IN 0x69
-#define PID_OUT 0xe1
-
-#define MAX_RETRY 0xffff
-#define TIMEOUT 5 /* 2 mseconds */
-
-#define SL11H_HOSTCTLREG 0
-#define SL11H_BUFADDRREG 1
-#define SL11H_BUFLNTHREG 2
-#define SL11H_PKTSTATREG 3 /* read */
-#define SL11H_PIDEPREG 3 /* write */
-#define SL11H_XFERCNTREG 4 /* read */
-#define SL11H_DEVADDRREG 4 /* write */
-#define SL11H_CTLREG1 5
-#define SL11H_INTENBLREG 6
-
-#define SL11H_HOSTCTLREG_B 8
-#define SL11H_BUFADDRREG_B 9
-#define SL11H_BUFLNTHREG_B 0x0A
-#define SL11H_PKTSTATREG_B 0x0B /* read */
-#define SL11H_PIDEPREG_B 0x0B /* write */
-#define SL11H_XFERCNTREG_B 0x0C /* read */
-#define SL11H_DEVADDRREG_B 0x0C /* write */
-
-#define SL11H_INTSTATREG 0x0D /* write clears bitwise */
-#define SL11H_HWREVREG 0x0E /* read */
-#define SL11H_SOFLOWREG 0x0E /* write */
-#define SL11H_SOFTMRREG 0x0F /* read */
-#define SL11H_CTLREG2 0x0F /* write */
-#define SL11H_DATA_START 0x10
-
-/* Host control register bits (addr 0) */
-#define SL11H_HCTLMASK_ARM 1
-#define SL11H_HCTLMASK_ENBLEP 2
-#define SL11H_HCTLMASK_WRITE 4
-#define SL11H_HCTLMASK_ISOCH 0x10
-#define SL11H_HCTLMASK_AFTERSOF 0x20
-#define SL11H_HCTLMASK_SEQ 0x40
-#define SL11H_HCTLMASK_PREAMBLE 0x80
-
-/* Packet status register bits (addr 3) */
-#define SL11H_STATMASK_ACK 1
-#define SL11H_STATMASK_ERROR 2
-#define SL11H_STATMASK_TMOUT 4
-#define SL11H_STATMASK_SEQ 8
-#define SL11H_STATMASK_SETUP 0x10
-#define SL11H_STATMASK_OVF 0x20
-#define SL11H_STATMASK_NAK 0x40
-#define SL11H_STATMASK_STALL 0x80
-
-/* Control register 1 bits (addr 5) */
-#define SL11H_CTL1MASK_DSBLSOF 1
-#define SL11H_CTL1MASK_NOTXEOF2 4
-#define SL11H_CTL1MASK_DSTATE 0x18
-#define SL11H_CTL1MASK_NSPD 0x20
-#define SL11H_CTL1MASK_SUSPEND 0x40
-#define SL11H_CTL1MASK_CLK12 0x80
-
-#define SL11H_CTL1VAL_RESET 8
-
-/* Interrupt enable (addr 6) and interrupt status register bits (addr 0xD) */
-#define SL11H_INTMASK_XFERDONE 1
-#define SL11H_INTMASK_SOFINTR 0x10
-#define SL11H_INTMASK_INSRMV 0x20
-#define SL11H_INTMASK_USBRESET 0x40
-#define SL11H_INTMASK_DSTATE 0x80 /* only in status reg */
-
-/* HW rev and SOF lo register bits (addr 0xE) */
-#define SL11H_HWRMASK_HWREV 0xF0
-
-/* SOF counter and control reg 2 (addr 0xF) */
-#define SL11H_CTL2MASK_SOFHI 0x3F
-#define SL11H_CTL2MASK_DSWAP 0x40
-#define SL11H_CTL2MASK_HOSTMODE 0xae
-
+++ /dev/null
-
-/*-------------------------------------------------------------------------*/
-/*-------------------------------------------------------------------------*
- * SL811HS virtual root hub
- *
- * based on usb-ohci.c by R. Weissgaerber et al.
- *-------------------------------------------------------------------------*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- *-------------------------------------------------------------------------*/
-
-/* FIXME: reuse the root hub framework in usbcore, shrinking this code. */
-
-#ifdef DEBUG
-#undef DEBUG
-#endif
-static __u32 getPortStatusAndChange (hci_t * hci);
-static void setPortStatus (hci_t * hci, __u16 bitPos);
-static void setPortChange (hci_t * hci, __u16 bitPos);
-static void clrPortStatus (hci_t * hci, __u16 bitPos);
-static void clrPortChange (hci_t * hci, __u16 bitPos);
-static int USBReset (hci_t * hci);
-static int cc_to_error (int cc);
-
-/*-------------------------------------------------------------------------*
- * Virtual Root Hub
- *-------------------------------------------------------------------------*/
-
-/* Device descriptor */
-static __u8 root_hub_dev_des[] = {
- 0x12, /* __u8 bLength; */
- 0x01, /* __u8 bDescriptorType; Device */
- 0x10, /* __u16 bcdUSB; v1.1 */
- 0x01,
- 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
- 0x00, /* __u8 bDeviceSubClass; */
- 0x00, /* __u8 bDeviceProtocol; */
- 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
- 0x00, /* __u16 idVendor; */
- 0x00,
- 0x00, /* __u16 idProduct; */
- 0x00,
- 0x00, /* __u16 bcdDevice; */
- 0x00,
- 0x00, /* __u8 iManufacturer; */
- 0x02, /* __u8 iProduct; */
- 0x01, /* __u8 iSerialNumber; */
- 0x01 /* __u8 bNumConfigurations; */
-};
-
-/* Configuration descriptor */
-static __u8 root_hub_config_des[] = {
- 0x09, /* __u8 bLength; */
- 0x02, /* __u8 bDescriptorType; Configuration */
- 0x19, /* __u16 wTotalLength; */
- 0x00,
- 0x01, /* __u8 bNumInterfaces; */
- 0x01, /* __u8 bConfigurationValue; */
- 0x00, /* __u8 iConfiguration; */
- 0x40, /* __u8 bmAttributes;
- Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup,
- 4..0: resvd */
- 0x00, /* __u8 MaxPower; */
-
- /* interface */
- 0x09, /* __u8 if_bLength; */
- 0x04, /* __u8 if_bDescriptorType; Interface */
- 0x00, /* __u8 if_bInterfaceNumber; */
- 0x00, /* __u8 if_bAlternateSetting; */
- 0x01, /* __u8 if_bNumEndpoints; */
- 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
- 0x00, /* __u8 if_bInterfaceSubClass; */
- 0x00, /* __u8 if_bInterfaceProtocol; */
- 0x00, /* __u8 if_iInterface; */
-
- /* endpoint */
- 0x07, /* __u8 ep_bLength; */
- 0x05, /* __u8 ep_bDescriptorType; Endpoint */
- 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
- 0x03, /* __u8 ep_bmAttributes; Interrupt */
- 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
- 0x00,
- 0xff /* __u8 ep_bInterval; 255 ms */
-};
-
-/* Hub class-specific descriptor is constructed dynamically */
-
-/***************************************************************************
- * Function Name : rh_send_irq
- *
- * This function examine the port change in the virtual root hub.
- *
- * Note: This function assumes only one port exist in the root hub.
- *
- * Input: hci = data structure for the host controller
- * rh_data = The pointer to port change data
- * rh_len = length of the data in bytes
- *
- * Return: length of data
- **************************************************************************/
-static int rh_send_irq (hci_t * hci, void *rh_data, int rh_len)
-{
- int num_ports;
- int i;
- int ret;
- int len;
- __u8 data[8];
-
- DBGFUNC ("enter rh_send_irq: \n");
-
- /* Assuming the root hub has one port. This value need to change if
- * there are more than one port for the root hub
- */
-
- num_ports = 1;
-
- /* The root hub status is not implemented, it basically has two fields:
- * -- Local Power Status
- * -- Over Current Indicator
- * -- Local Power Change
- * -- Over Current Indicator
- *
- * Right now, It is assume the power is good and no changes
- */
-
- *(__u8 *) data = 0;
-
- ret = *(__u8 *) data;
-
- /* Has the port status change within the root hub: It checks for
- * -- Port Connect Status change
- * -- Port Enable Change
- */
-
- for (i = 0; i < num_ports; i++) {
- *(__u8 *) (data + (i + 1) / 8) |=
- (((getPortStatusAndChange (hci) >> 16) & (PORT_CONNECT_STAT | PORT_ENABLE_STAT)) ? 1 : 0) << ((i + 1) % 8);
- ret += *(__u8 *) (data + (i + 1) / 8);
-
- /* After the port change is read, it should be reset so the next time
- * is it doesn't trigger a change again */
-
- }
- len = i / 8 + 1;
-
- if (ret > 0) {
- memcpy (rh_data, data, min (len, min (rh_len, (int)sizeof (data))));
- return len;
- }
- return 0;
-}
-
-/***************************************************************************
- * Function Name : rh_int_timer_do
- *
- * This function is called when the timer expires. It gets the the port
- * change data and pass along to the upper protocol.
- *
- * Note: The virtual root hub interrupt pipe are polled by the timer
- * every "interval" ms
- *
- * Input: ptr = ptr to the urb
- *
- * Return: none
- **************************************************************************/
-static void rh_int_timer_do (unsigned long ptr)
-{
- int len;
- struct urb *urb = (struct urb *) ptr;
- hci_t *hci = urb->dev->bus->hcpriv;
-
- DBGFUNC ("enter rh_int_timer_do\n");
-
- if (hci->rh.send) {
- len = rh_send_irq (hci, urb->transfer_buffer,
- urb->transfer_buffer_length);
- if (len > 0) {
- urb->actual_length = len;
- if (urb_debug == 2)
- urb_print (urb, "RET-t(rh)",
- usb_pipeout (urb->pipe));
-
- if (urb->complete) {
- urb->complete (urb, NULL);
- }
- }
- }
-
- /* re-activate the timer */
- rh_init_int_timer (urb);
-}
-
-/***************************************************************************
- * Function Name : rh_init_int_timer
- *
- * This function creates a timer that act as interrupt pipe in the
- * virtual hub.
- *
- * Note: The virtual root hub's interrupt pipe are polled by the timer
- * every "interval" ms
- *
- * Input: urb = USB request block
- *
- * Return: 0
- **************************************************************************/
-static int rh_init_int_timer (struct urb * urb)
-{
- hci_t *hci = urb->dev->bus->hcpriv;
- hci->rh.interval = urb->interval;
-
- init_timer (&hci->rh.rh_int_timer);
- hci->rh.rh_int_timer.function = rh_int_timer_do;
- hci->rh.rh_int_timer.data = (unsigned long) urb;
- hci->rh.rh_int_timer.expires = jiffies + (HZ * (urb->interval < 30 ? 30 : urb->interval)) / 1000;
- add_timer (&hci->rh.rh_int_timer);
-
- return 0;
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* for returning string descriptors in UTF-16LE */
-static int ascii2utf (char *ascii, __u8 *utf, int utfmax)
-{
- int retval;
-
- for (retval = 0; *ascii && utfmax > 1; utfmax -= 2, retval += 2) {
- *utf++ = *ascii++ & 0x7f;
- *utf++ = 0;
- }
- return retval;
-}
-
-static int root_hub_string (int id, int serial, char *type, __u8 *data, int len)
-{
- char buf [30];
-
- // assert (len > (2 * (sizeof (buf) + 1)));
- // assert (strlen (type) <= 8);
-
- // language ids
- if (id == 0) {
- *data++ = 4; *data++ = 3; /* 4 bytes data */
- *data++ = 0; *data++ = 0; /* some language id */
- return 4;
-
- // serial number
- } else if (id == 1) {
- sprintf (buf, "%x", serial);
-
- // product description
- } else if (id == 2) {
- sprintf (buf, "USB %s Root Hub", type);
-
- // id 3 == vendor description
-
- // unsupported IDs --> "stall"
- } else
- return 0;
-
- data [0] = 2 + ascii2utf (buf, data + 2, len - 2);
- data [1] = 3;
- return data [0];
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* helper macro */
-#define OK(x) len = (x); break
-
-/***************************************************************************
- * Function Name : rh_submit_urb
- *
- * This function handles all USB request to the the virtual root hub
- *
- * Input: urb = USB request block
- *
- * Return: 0
- **************************************************************************/
-static int rh_submit_urb (struct urb * urb)
-{
- struct usb_device *usb_dev = urb->dev;
- hci_t *hci = usb_dev->bus->hcpriv;
- unsigned int pipe = urb->pipe;
- struct usb_ctrlrequest *cmd = (struct usb_ctrlrequest *) urb->setup_packet;
- void *data = urb->transfer_buffer;
- int leni = urb->transfer_buffer_length;
- int len = 0;
- int status = TD_CC_NOERROR;
- __u32 datab[4];
- __u8 *data_buf = (__u8 *) datab;
-
- __u16 bmRType_bReq;
- __u16 wValue;
- __u16 wIndex;
- __u16 wLength;
-
- DBGFUNC ("enter rh_submit_urb\n");
- if (usb_pipeint (pipe)) {
- hci->rh.urb = urb;
- hci->rh.send = 1;
- hci->rh.interval = urb->interval;
- rh_init_int_timer (urb);
- urb->status = cc_to_error (TD_CC_NOERROR);
-
- return 0;
- }
-
- bmRType_bReq = cmd->bRequestType | (cmd->bRequest << 8);
- wValue = le16_to_cpu (cmd->wValue);
- wIndex = le16_to_cpu (cmd->wIndex);
- wLength = le16_to_cpu (cmd->wLength);
-
- DBG ("rh_submit_urb, req = %d(%x) len=%d",
- bmRType_bReq, bmRType_bReq, wLength);
-
- switch (bmRType_bReq) {
- /* Request Destination:
- without flags: Device,
- RH_INTERFACE: interface,
- RH_ENDPOINT: endpoint,
- RH_CLASS means HUB here,
- RH_OTHER | RH_CLASS almost ever means HUB_PORT here
- */
-
- case RH_GET_STATUS:
- *(__u16 *) data_buf = cpu_to_le16 (1);
- OK (2);
-
- case RH_GET_STATUS | RH_INTERFACE:
- *(__u16 *) data_buf = cpu_to_le16 (0);
- OK (2);
-
- case RH_GET_STATUS | RH_ENDPOINT:
- *(__u16 *) data_buf = cpu_to_le16 (0);
- OK (2);
-
- case RH_GET_STATUS | RH_CLASS:
- *(__u32 *) data_buf = cpu_to_le32 (0);
- OK (4);
-
- case RH_GET_STATUS | RH_OTHER | RH_CLASS:
- *(__u32 *) data_buf =
- cpu_to_le32 (getPortStatusAndChange (hci));
- OK (4);
-
- case RH_CLEAR_FEATURE | RH_ENDPOINT:
- switch (wValue) {
- case (RH_ENDPOINT_STALL):
- OK (0);
- }
- break;
-
- case RH_CLEAR_FEATURE | RH_CLASS:
- switch (wValue) {
- case RH_C_HUB_LOCAL_POWER:
- OK (0);
-
- case (RH_C_HUB_OVER_CURRENT):
- /* Over Current Not Implemented */
- OK (0);
- }
- break;
-
- case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
- switch (wValue) {
- case (RH_PORT_ENABLE):
- clrPortStatus (hci, PORT_ENABLE_STAT);
- OK (0);
-
- case (RH_PORT_SUSPEND):
- clrPortStatus (hci, PORT_SUSPEND_STAT);
- OK (0);
-
- case (RH_PORT_POWER):
- clrPortStatus (hci, PORT_POWER_STAT);
- OK (0);
-
- case (RH_C_PORT_CONNECTION):
- clrPortChange (hci, PORT_CONNECT_STAT);
- OK (0);
-
- case (RH_C_PORT_ENABLE):
- clrPortChange (hci, PORT_ENABLE_STAT);
- OK (0);
-
- case (RH_C_PORT_SUSPEND):
- clrPortChange (hci, PORT_SUSPEND_STAT);
- OK (0);
-
- case (RH_C_PORT_OVER_CURRENT):
- clrPortChange (hci, PORT_OVER_CURRENT_STAT);
- OK (0);
-
- case (RH_C_PORT_RESET):
- clrPortChange (hci, PORT_RESET_STAT);
- OK (0);
- }
- break;
-
- case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
- switch (wValue) {
- case (RH_PORT_SUSPEND):
- setPortStatus (hci, PORT_SUSPEND_STAT);
- OK (0);
-
- case (RH_PORT_RESET):
- setPortStatus (hci, PORT_RESET_STAT);
- // USBReset(hci);
- clrPortChange (hci,
- PORT_CONNECT_CHANGE | PORT_ENABLE_CHANGE
- | PORT_SUSPEND_CHANGE |
- PORT_OVER_CURRENT_CHANGE);
- setPortChange (hci, PORT_RESET_CHANGE);
- clrPortStatus (hci, PORT_RESET_STAT);
- setPortStatus (hci, PORT_ENABLE_STAT);
-
- OK (0);
-
- case (RH_PORT_POWER):
- setPortStatus (hci, PORT_POWER_STAT);
- OK (0);
-
- case (RH_PORT_ENABLE):
- setPortStatus (hci, PORT_ENABLE_STAT);
- OK (0);
- }
- break;
-
- case RH_SET_ADDRESS:
- hci->rh.devnum = wValue;
- OK (0);
-
- case RH_GET_DESCRIPTOR:
- DBGVERBOSE ("rh_submit_urb: RH_GET_DESCRIPTOR, wValue = 0x%x\n", wValue);
- switch ((wValue & 0xff00) >> 8) {
- case (0x01): /* device descriptor */
- len = min (leni, min ((__u16)sizeof (root_hub_dev_des), wLength));
- data_buf = root_hub_dev_des;
- OK (len);
-
- case (0x02): /* configuration descriptor */
- len = min (leni, min ((__u16)sizeof (root_hub_config_des), wLength));
- data_buf = root_hub_config_des;
- OK (len);
-
- case (0x03): /* string descriptors */
- len = root_hub_string (wValue & 0xff, (int) (long) 0,
- "SL811HS", data, wLength);
- if (len > 0) {
- data_buf = data;
- OK (min (leni, len));
- }
-
- default:
- status = SL11H_STATMASK_STALL;
- }
- break;
-
- case RH_GET_DESCRIPTOR | RH_CLASS:
- data_buf[0] = 9; // min length;
- data_buf[1] = 0x29;
- data_buf[2] = 1; // # of downstream port
- data_buf[3] = 0;
- datab[1] = 0;
- data_buf[5] = 50; // 100 ms for port reset
- data_buf[7] = 0xfc; // which port is attachable
- if (data_buf[2] < 7) {
- data_buf[8] = 0xff;
- } else {
- }
-
- len = min (leni, min ((__u16)data_buf[0], wLength));
- OK (len);
-
- case RH_GET_CONFIGURATION:
- *(__u8 *) data_buf = 0x01;
- OK (1);
-
- case RH_SET_CONFIGURATION:
- OK (0);
-
- default:
- DBGERR ("unsupported root hub command");
- status = SL11H_STATMASK_STALL;
- }
-
- len = min (len, leni);
- if (data != data_buf)
- memcpy (data, data_buf, len);
- urb->actual_length = len;
- urb->status = cc_to_error (status);
-
- urb->hcpriv = NULL;
- urb->dev = NULL;
- if (urb->complete) {
- urb->complete (urb, NULL);
- }
-
- return 0;
-}
-
-/***************************************************************************
- * Function Name : rh_unlink_urb
- *
- * This function unlinks the URB
- *
- * Input: urb = USB request block
- *
- * Return: 0
- **************************************************************************/
-static int rh_unlink_urb (struct urb * urb)
-{
- hci_t *hci = urb->dev->bus->hcpriv;
-
- DBGFUNC ("enter rh_unlink_urb\n");
- if (hci->rh.urb == urb) {
- hci->rh.send = 0;
- del_timer (&hci->rh.rh_int_timer);
- hci->rh.urb = NULL;
-
- urb->hcpriv = NULL;
- usb_put_dev (urb->dev);
- urb->dev = NULL;
- if (urb->transfer_flags & URB_ASYNC_UNLINK) {
- urb->status = -ECONNRESET;
- if (urb->complete) {
- urb->complete (urb, NULL);
- }
- } else
- urb->status = -ENOENT;
- }
- return 0;
-}
-
-/***************************************************************************
- * Function Name : rh_connect_rh
- *
- * This function connect the virtual root hub to the USB stack
- *
- * Input: urb = USB request block
- *
- * Return: 0
- **************************************************************************/
-static int rh_connect_rh (hci_t * hci)
-{
- struct usb_device *usb_dev;
- int retval;
-
- hci->rh.devnum = 0;
- usb_dev = usb_alloc_dev (NULL, hci->bus, 0);
- if (!usb_dev)
- return -ENOMEM;
-
- usb_dev->devnum = 1;
- usb_dev->bus->devnum_next = usb_dev->devnum + 1;
- set_bit (usb_dev->devnum, usb_dev->bus->devmap.devicemap);
-
- down (&usb_bus_list_lock);
- hci->bus->root_hub = usb_dev;
- retval = usb_new_device (usb_dev);
- if (retval != 0)
- hci->bus->root_hub = NULL;
- up (&usb_bus_list_lock);
- if (retval != 0) {
- usb_put_dev (usb_dev);
- return -ENODEV;
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * linux/drivers/usb/host/ohci-omap.h
- *
- * OMAP OHCI USB controller specific defines
- */
-
-/* OMAP USB OHCI common defines */
-#define OMAP_OHCI_NAME "omap-ohci"
-#define OMAP_OHCI_BASE 0xfffba000
-#define OMAP_OHCI_SIZE 4096
-
-#define HMC_CLEAR (0x3f << 1)
-#define APLL_NDPLL_SWITCH 0x0001
-#define DPLL_PLL_ENABLE 0x0010
-#define DPLL_LOCK 0x0001
-#define SOFT_REQ_REG_REQ 0x0001
-#define USB_MCLK_EN 0x0010
-#define USB_HOST_HHC_UHOST_EN 0x00000200
-#define SOFT_USB_OTG_REQ (1 << 8)
-#define SOFT_USB_REQ (1 << 3)
-#define STATUS_REQ_REG 0xfffe0840
-#define USB_HOST_DPLL_REQ (1 << 8)
-#define SOFT_DPLL_REQ (1 << 0)
-
-/* OMAP-1510 USB OHCI defines */
-#define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */
-#define OMAP1510_LB_CLOCK_DIV 0xfffec10c
-#define OMAP1510_LB_MMU_CTL 0xfffec208
-#define OMAP1510_LB_MMU_LCK 0xfffec224
-#define OMAP1510_LB_MMU_LD_TLB 0xfffec228
-#define OMAP1510_LB_MMU_CAM_H 0xfffec22c
-#define OMAP1510_LB_MMU_CAM_L 0xfffec230
-#define OMAP1510_LB_MMU_RAM_H 0xfffec234
-#define OMAP1510_LB_MMU_RAM_L 0xfffec238
-
-/* OMAP-1610 USB OHCI defines */
-#define USB_TRANSCEIVER_CTRL 0xfffe1064
-#define OTG_REV 0xfffb0400
-
-#define OTG_SYSCON_1 0xfffb0404
-#define OTG_IDLE_EN (1 << 15)
-#define DEV_IDLE_EN (1 << 13)
-
-#define OTG_SYSCON_2 0xfffb0408
-#define OTG_CTRL 0xfffb040c
-#define OTG_IRQ_EN 0xfffb0410
-#define OTG_IRQ_SRC 0xfffb0414
-
-#define OTG_EN (1 << 31)
-#define USBX_SYNCHRO (1 << 30)
-#define SRP_VBUS (1 << 12)
-#define OTG_PADEN (1 << 10)
-#define HMC_PADEN (1 << 9)
-#define UHOST_EN (1 << 8)
-
-/* Hardware specific defines */
-#define OMAP1510_FPGA_HOST_CTRL 0xe800020c
+++ /dev/null
-/* Driver for Philips webcam
- Functions that send various control messages to the webcam, including
- video modes.
- (C) 1999-2003 Nemosoft Unv. (webcam@smcc.demon.nl)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-/*
- Changes
- 2001/08/03 Alvarado Added methods for changing white balance and
- red/green gains
- */
-
-/* Control functions for the cam; brightness, contrast, video mode, etc. */
-
-#ifdef __KERNEL__
-#include <asm/uaccess.h>
-#endif
-#include <asm/errno.h>
-#include <linux/version.h>
-
-#include "pwc.h"
-#include "pwc-ioctl.h"
-#include "pwc-uncompress.h"
-
-/* Request types: video */
-#define SET_LUM_CTL 0x01
-#define GET_LUM_CTL 0x02
-#define SET_CHROM_CTL 0x03
-#define GET_CHROM_CTL 0x04
-#define SET_STATUS_CTL 0x05
-#define GET_STATUS_CTL 0x06
-#define SET_EP_STREAM_CTL 0x07
-#define GET_EP_STREAM_CTL 0x08
-#define SET_MPT_CTL 0x0D
-#define GET_MPT_CTL 0x0E
-
-/* Selectors for the Luminance controls [GS]ET_LUM_CTL */
-#define AGC_MODE_FORMATTER 0x2000
-#define PRESET_AGC_FORMATTER 0x2100
-#define SHUTTER_MODE_FORMATTER 0x2200
-#define PRESET_SHUTTER_FORMATTER 0x2300
-#define PRESET_CONTOUR_FORMATTER 0x2400
-#define AUTO_CONTOUR_FORMATTER 0x2500
-#define BACK_LIGHT_COMPENSATION_FORMATTER 0x2600
-#define CONTRAST_FORMATTER 0x2700
-#define DYNAMIC_NOISE_CONTROL_FORMATTER 0x2800
-#define FLICKERLESS_MODE_FORMATTER 0x2900
-#define AE_CONTROL_SPEED 0x2A00
-#define BRIGHTNESS_FORMATTER 0x2B00
-#define GAMMA_FORMATTER 0x2C00
-
-/* Selectors for the Chrominance controls [GS]ET_CHROM_CTL */
-#define WB_MODE_FORMATTER 0x1000
-#define AWB_CONTROL_SPEED_FORMATTER 0x1100
-#define AWB_CONTROL_DELAY_FORMATTER 0x1200
-#define PRESET_MANUAL_RED_GAIN_FORMATTER 0x1300
-#define PRESET_MANUAL_BLUE_GAIN_FORMATTER 0x1400
-#define COLOUR_MODE_FORMATTER 0x1500
-#define SATURATION_MODE_FORMATTER1 0x1600
-#define SATURATION_MODE_FORMATTER2 0x1700
-
-/* Selectors for the Status controls [GS]ET_STATUS_CTL */
-#define SAVE_USER_DEFAULTS_FORMATTER 0x0200
-#define RESTORE_USER_DEFAULTS_FORMATTER 0x0300
-#define RESTORE_FACTORY_DEFAULTS_FORMATTER 0x0400
-#define READ_AGC_FORMATTER 0x0500
-#define READ_SHUTTER_FORMATTER 0x0600
-#define READ_RED_GAIN_FORMATTER 0x0700
-#define READ_BLUE_GAIN_FORMATTER 0x0800
-#define SENSOR_TYPE_FORMATTER1 0x0C00
-#define READ_RAW_Y_MEAN_FORMATTER 0x3100
-#define SET_POWER_SAVE_MODE_FORMATTER 0x3200
-#define MIRROR_IMAGE_FORMATTER 0x3300
-#define LED_FORMATTER 0x3400
-#define SENSOR_TYPE_FORMATTER2 0x3700
-
-/* Formatters for the Video Endpoint controls [GS]ET_EP_STREAM_CTL */
-#define VIDEO_OUTPUT_CONTROL_FORMATTER 0x0100
-
-/* Formatters for the motorized pan & tilt [GS]ET_MPT_CTL */
-#define PT_RELATIVE_CONTROL_FORMATTER 0x01
-#define PT_RESET_CONTROL_FORMATTER 0x02
-#define PT_STATUS_FORMATTER 0x03
-
-static char *size2name[PSZ_MAX] =
-{
- "subQCIF",
- "QSIF",
- "QCIF",
- "SIF",
- "CIF",
- "VGA",
-};
-
-/********/
-
-/* Entries for the Nala (645/646) camera; the Nala doesn't have compression
- preferences, so you either get compressed or non-compressed streams.
-
- An alternate value of 0 means this mode is not available at all.
- */
-
-struct Nala_table_entry {
- char alternate; /* USB alternate setting */
- int compressed; /* Compressed yes/no */
-
- unsigned char mode[3]; /* precomputed mode table */
-};
-
-static struct Nala_table_entry Nala_table[PSZ_MAX][8] =
-{
-#include "pwc_nala.h"
-};
-
-/* This tables contains entries for the 675/680/690 (Timon) camera, with
- 4 different qualities (no compression, low, medium, high).
- It lists the bandwidth requirements for said mode by its alternate interface
- number. An alternate of 0 means that the mode is unavailable.
-
- There are 6 * 4 * 4 entries:
- 6 different resolutions subqcif, qsif, qcif, sif, cif, vga
- 6 framerates: 5, 10, 15, 20, 25, 30
- 4 compression modi: none, low, medium, high
-
- When an uncompressed mode is not available, the next available compressed mode
- will be chosen (unless the decompressor is absent). Sometimes there are only
- 1 or 2 compressed modes available; in that case entries are duplicated.
-*/
-struct Timon_table_entry
-{
- char alternate; /* USB alternate interface */
- unsigned short packetsize; /* Normal packet size */
- unsigned short bandlength; /* Bandlength when decompressing */
- unsigned char mode[13]; /* precomputed mode settings for cam */
-};
-
-static struct Timon_table_entry Timon_table[PSZ_MAX][6][4] =
-{
-#include "pwc_timon.h"
-};
-
-/* Entries for the Kiara (730/740/750) camera */
-
-struct Kiara_table_entry
-{
- char alternate; /* USB alternate interface */
- unsigned short packetsize; /* Normal packet size */
- unsigned short bandlength; /* Bandlength when decompressing */
- unsigned char mode[12]; /* precomputed mode settings for cam */
-};
-
-static struct Kiara_table_entry Kiara_table[PSZ_MAX][6][4] =
-{
-#include "pwc_kiara.h"
-};
-
-
-/****************************************************************************/
-
-
-#define SendControlMsg(request, value, buflen) \
- usb_control_msg(pdev->udev, usb_sndctrlpipe(pdev->udev, 0), \
- request, \
- USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, \
- value, \
- pdev->vcinterface, \
- &buf, buflen, HZ / 2)
-
-#define RecvControlMsg(request, value, buflen) \
- usb_control_msg(pdev->udev, usb_rcvctrlpipe(pdev->udev, 0), \
- request, \
- USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, \
- value, \
- pdev->vcinterface, \
- &buf, buflen, HZ / 2)
-
-
-#if PWC_DEBUG
-void pwc_hexdump(void *p, int len)
-{
- int i;
- unsigned char *s;
- char buf[100], *d;
-
- s = (unsigned char *)p;
- d = buf;
- *d = '\0';
- Debug("Doing hexdump @ %p, %d bytes.\n", p, len);
- for (i = 0; i < len; i++) {
- d += sprintf(d, "%02X ", *s++);
- if ((i & 0xF) == 0xF) {
- Debug("%s\n", buf);
- d = buf;
- *d = '\0';
- }
- }
- if ((i & 0xF) != 0)
- Debug("%s\n", buf);
-}
-#endif
-
-static inline int send_video_command(struct usb_device *udev, int index, void *buf, int buflen)
-{
- return usb_control_msg(udev,
- usb_sndctrlpipe(udev, 0),
- SET_EP_STREAM_CTL,
- USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
- VIDEO_OUTPUT_CONTROL_FORMATTER,
- index,
- buf, buflen, HZ);
-}
-
-
-
-static inline int set_video_mode_Nala(struct pwc_device *pdev, int size, int frames)
-{
- unsigned char buf[3];
- int ret, fps;
- struct Nala_table_entry *pEntry;
- int frames2frames[31] =
- { /* closest match of framerate */
- 0, 0, 0, 0, 4, /* 0-4 */
- 5, 5, 7, 7, 10, /* 5-9 */
- 10, 10, 12, 12, 15, /* 10-14 */
- 15, 15, 15, 20, 20, /* 15-19 */
- 20, 20, 20, 24, 24, /* 20-24 */
- 24, 24, 24, 24, 24, /* 25-29 */
- 24 /* 30 */
- };
- int frames2table[31] =
- { 0, 0, 0, 0, 0, /* 0-4 */
- 1, 1, 1, 2, 2, /* 5-9 */
- 3, 3, 4, 4, 4, /* 10-14 */
- 5, 5, 5, 5, 5, /* 15-19 */
- 6, 6, 6, 6, 7, /* 20-24 */
- 7, 7, 7, 7, 7, /* 25-29 */
- 7 /* 30 */
- };
-
- if (size < 0 || size > PSZ_CIF || frames < 4 || frames > 25)
- return -EINVAL;
- frames = frames2frames[frames];
- fps = frames2table[frames];
- pEntry = &Nala_table[size][fps];
- if (pEntry->alternate == 0)
- return -EINVAL;
-
- if (pEntry->compressed && pdev->decompressor == NULL)
- return -ENOENT; /* Not supported. */
-
- memcpy(buf, pEntry->mode, 3);
- ret = send_video_command(pdev->udev, pdev->vendpoint, buf, 3);
- if (ret < 0) {
- Debug("Failed to send video command... %d\n", ret);
- return ret;
- }
- if (pEntry->compressed && pdev->decompressor != 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
- pdev->decompressor->init(pdev->type, pdev->release, buf, pdev->decompress_data);
-
- pdev->cmd_len = 3;
- memcpy(pdev->cmd_buf, buf, 3);
-
- /* Set various parameters */
- pdev->vframes = frames;
- pdev->vsize = size;
- pdev->valternate = pEntry->alternate;
- pdev->image = pwc_image_sizes[size];
- pdev->frame_size = (pdev->image.x * pdev->image.y * 3) / 2;
- if (pEntry->compressed) {
- if (pdev->release < 5) { /* 4 fold compression */
- pdev->vbandlength = 528;
- pdev->frame_size /= 4;
- }
- else {
- pdev->vbandlength = 704;
- pdev->frame_size /= 3;
- }
- }
- else
- pdev->vbandlength = 0;
- return 0;
-}
-
-
-static inline int set_video_mode_Timon(struct pwc_device *pdev, int size, int frames, int compression, int snapshot)
-{
- unsigned char buf[13];
- struct Timon_table_entry *pChoose;
- int ret, fps;
-
- if (size >= PSZ_MAX || frames < 5 || frames > 30 || compression < 0 || compression > 3)
- return -EINVAL;
- if (size == PSZ_VGA && frames > 15)
- return -EINVAL;
- fps = (frames / 5) - 1;
-
- /* Find a supported framerate with progressively higher compression ratios
- if the preferred ratio is not available.
- */
- pChoose = NULL;
- if (pdev->decompressor == NULL) {
-#if PWC_DEBUG
- Debug("Trying to find uncompressed mode.\n");
-#endif
- pChoose = &Timon_table[size][fps][0];
- }
- else {
- while (compression <= 3) {
- pChoose = &Timon_table[size][fps][compression];
- if (pChoose->alternate != 0)
- break;
- compression++;
- }
- }
- if (pChoose == NULL || pChoose->alternate == 0)
- return -ENOENT; /* Not supported. */
-
- memcpy(buf, pChoose->mode, 13);
- if (snapshot)
- buf[0] |= 0x80;
- ret = send_video_command(pdev->udev, pdev->vendpoint, buf, 13);
- if (ret < 0)
- return ret;
-
- if (pChoose->bandlength > 0 && pdev->decompressor != 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
- pdev->decompressor->init(pdev->type, pdev->release, buf, pdev->decompress_data);
-
- pdev->cmd_len = 13;
- memcpy(pdev->cmd_buf, buf, 13);
-
- /* Set various parameters */
- pdev->vframes = frames;
- pdev->vsize = size;
- pdev->vsnapshot = snapshot;
- pdev->valternate = pChoose->alternate;
- pdev->image = pwc_image_sizes[size];
- pdev->vbandlength = pChoose->bandlength;
- if (pChoose->bandlength > 0)
- pdev->frame_size = (pChoose->bandlength * pdev->image.y) / 4;
- else
- pdev->frame_size = (pdev->image.x * pdev->image.y * 12) / 8;
- return 0;
-}
-
-
-static inline int set_video_mode_Kiara(struct pwc_device *pdev, int size, int frames, int compression, int snapshot)
-{
- struct Kiara_table_entry *pChoose = NULL;
- int fps, ret;
- unsigned char buf[12];
- struct Kiara_table_entry RawEntry = {6, 773, 1272, {0xAD, 0xF4, 0x10, 0x27, 0xB6, 0x24, 0x96, 0x02, 0x30, 0x05, 0x03, 0x80}};
-
- if (size >= PSZ_MAX || frames < 5 || frames > 30 || compression < 0 || compression > 3)
- return -EINVAL;
- if (size == PSZ_VGA && frames > 15)
- return -EINVAL;
- fps = (frames / 5) - 1;
-
- /* special case: VGA @ 5 fps and snapshot is raw bayer mode */
- if (size == PSZ_VGA && frames == 5 && snapshot)
- {
- /* Only available in case the raw palette is selected or
- we have the decompressor available. This mode is
- only available in compressed form
- */
- if (pdev->vpalette == VIDEO_PALETTE_RAW || pdev->decompressor != NULL)
- {
- Info("Choosing VGA/5 BAYER mode (%d).\n", pdev->vpalette);
- pChoose = &RawEntry;
- }
- else
- {
- Info("VGA/5 BAYER mode _must_ have a decompressor available, or use RAW palette.\n");
- }
- }
- else
- {
- /* Find a supported framerate with progressively higher compression ratios
- if the preferred ratio is not available.
- Skip this step when using RAW modes.
- */
- if (pdev->decompressor == NULL && pdev->vpalette != VIDEO_PALETTE_RAW) {
-#if PWC_DEBUG
- Debug("Trying to find uncompressed mode.\n");
-#endif
- pChoose = &Kiara_table[size][fps][0];
- }
- else {
- while (compression <= 3) {
- pChoose = &Kiara_table[size][fps][compression];
- if (pChoose->alternate != 0)
- break;
- compression++;
- }
- }
- }
- if (pChoose == NULL || pChoose->alternate == 0)
- return -ENOENT; /* Not supported. */
-
- /* usb_control_msg won't take staticly allocated arrays as argument?? */
- memcpy(buf, pChoose->mode, 12);
- if (snapshot)
- buf[0] |= 0x80;
-
- /* Firmware bug: video endpoint is 5, but commands are sent to endpoint 4 */
- ret = send_video_command(pdev->udev, 4 /* pdev->vendpoint */, buf, 12);
- if (ret < 0)
- return ret;
-
- if (pChoose->bandlength > 0 && pdev->decompressor != 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
- pdev->decompressor->init(pdev->type, pdev->release, buf, pdev->decompress_data);
-
- pdev->cmd_len = 12;
- memcpy(pdev->cmd_buf, buf, 12);
- /* All set and go */
- pdev->vframes = frames;
- pdev->vsize = size;
- pdev->vsnapshot = snapshot;
- pdev->valternate = pChoose->alternate;
- pdev->image = pwc_image_sizes[size];
- pdev->vbandlength = pChoose->bandlength;
- if (pdev->vbandlength > 0)
- pdev->frame_size = (pdev->vbandlength * pdev->image.y) / 4;
- else
- pdev->frame_size = (pdev->image.x * pdev->image.y * 12) / 8;
- return 0;
-}
-
-
-
-/**
- @pdev: device structure
- @width: viewport width
- @height: viewport height
- @frame: framerate, in fps
- @compression: preferred compression ratio
- @snapshot: snapshot mode or streaming
- */
-int pwc_set_video_mode(struct pwc_device *pdev, int width, int height, int frames, int compression, int snapshot)
-{
- int ret, size;
-
- Trace(TRACE_FLOW, "set_video_mode(%dx%d @ %d, palette %d).\n", width, height, frames, pdev->vpalette);
- size = pwc_decode_size(pdev, width, height);
- if (size < 0) {
- Debug("Could not find suitable size.\n");
- return -ERANGE;
- }
- Debug("decode_size = %d.\n", size);
-
- ret = -EINVAL;
- switch(pdev->type) {
- case 645:
- case 646:
- ret = set_video_mode_Nala(pdev, size, frames);
- break;
-
- case 675:
- case 680:
- case 690:
- ret = set_video_mode_Timon(pdev, size, frames, compression, snapshot);
- break;
-
- case 720:
- case 730:
- case 740:
- case 750:
- ret = set_video_mode_Kiara(pdev, size, frames, compression, snapshot);
- break;
- }
- if (ret < 0) {
- if (ret == -ENOENT)
- Info("Video mode %s@%d fps is only supported with the decompressor module (pwcx).\n", size2name[size], frames);
- else {
- Err("Failed to set video mode %s@%d fps; return code = %d\n", size2name[size], frames, ret);
- }
- return ret;
- }
- pdev->view.x = width;
- pdev->view.y = height;
- pdev->frame_total_size = pdev->frame_size + pdev->frame_header_size + pdev->frame_trailer_size;
- pwc_set_image_buffer_size(pdev);
- Trace(TRACE_SIZE, "Set viewport to %dx%d, image size is %dx%d.\n", width, height, pwc_image_sizes[size].x, pwc_image_sizes[size].y);
- return 0;
-}
-
-
-void pwc_set_image_buffer_size(struct pwc_device *pdev)
-{
- int i, factor = 0, filler = 0;
-
- /* for PALETTE_YUV420P */
- switch(pdev->vpalette)
- {
- case VIDEO_PALETTE_YUV420P:
- factor = 6;
- filler = 128;
- break;
- case VIDEO_PALETTE_RAW:
- factor = 6; /* can be uncompressed YUV420P */
- filler = 0;
- break;
- }
-
- /* Set sizes in bytes */
- pdev->image.size = pdev->image.x * pdev->image.y * factor / 4;
- pdev->view.size = pdev->view.x * pdev->view.y * factor / 4;
-
- /* Align offset, or you'll get some very weird results in
- YUV420 mode... x must be multiple of 4 (to get the Y's in
- place), and y even (or you'll mixup U & V). This is less of a
- problem for YUV420P.
- */
- pdev->offset.x = ((pdev->view.x - pdev->image.x) / 2) & 0xFFFC;
- pdev->offset.y = ((pdev->view.y - pdev->image.y) / 2) & 0xFFFE;
-
- /* Fill buffers with gray or black */
- for (i = 0; i < MAX_IMAGES; i++) {
- if (pdev->image_ptr[i] != NULL)
- memset(pdev->image_ptr[i], filler, pdev->view.size);
- }
-}
-
-
-
-/* BRIGHTNESS */
-
-int pwc_get_brightness(struct pwc_device *pdev)
-{
- char buf;
- int ret;
-
- ret = RecvControlMsg(GET_LUM_CTL, BRIGHTNESS_FORMATTER, 1);
- if (ret < 0)
- return ret;
- return buf << 9;
-}
-
-int pwc_set_brightness(struct pwc_device *pdev, int value)
-{
- char buf;
-
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- buf = (value >> 9) & 0x7f;
- return SendControlMsg(SET_LUM_CTL, BRIGHTNESS_FORMATTER, 1);
-}
-
-/* CONTRAST */
-
-int pwc_get_contrast(struct pwc_device *pdev)
-{
- char buf;
- int ret;
-
- ret = RecvControlMsg(GET_LUM_CTL, CONTRAST_FORMATTER, 1);
- if (ret < 0)
- return ret;
- return buf << 10;
-}
-
-int pwc_set_contrast(struct pwc_device *pdev, int value)
-{
- char buf;
-
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- buf = (value >> 10) & 0x3f;
- return SendControlMsg(SET_LUM_CTL, CONTRAST_FORMATTER, 1);
-}
-
-/* GAMMA */
-
-int pwc_get_gamma(struct pwc_device *pdev)
-{
- char buf;
- int ret;
-
- ret = RecvControlMsg(GET_LUM_CTL, GAMMA_FORMATTER, 1);
- if (ret < 0)
- return ret;
- return buf << 11;
-}
-
-int pwc_set_gamma(struct pwc_device *pdev, int value)
-{
- char buf;
-
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- buf = (value >> 11) & 0x1f;
- return SendControlMsg(SET_LUM_CTL, GAMMA_FORMATTER, 1);
-}
-
-
-/* SATURATION */
-
-int pwc_get_saturation(struct pwc_device *pdev)
-{
- char buf;
- int ret;
-
- if (pdev->type < 675)
- return -1;
- ret = RecvControlMsg(GET_CHROM_CTL, pdev->type < 730 ? SATURATION_MODE_FORMATTER2 : SATURATION_MODE_FORMATTER1, 1);
- if (ret < 0)
- return ret;
- return 32768 + buf * 327;
-}
-
-int pwc_set_saturation(struct pwc_device *pdev, int value)
-{
- char buf;
-
- if (pdev->type < 675)
- return -EINVAL;
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- /* saturation ranges from -100 to +100 */
- buf = (value - 32768) / 327;
- return SendControlMsg(SET_CHROM_CTL, pdev->type < 730 ? SATURATION_MODE_FORMATTER2 : SATURATION_MODE_FORMATTER1, 1);
-}
-
-/* AGC */
-
-static inline int pwc_set_agc(struct pwc_device *pdev, int mode, int value)
-{
- char buf;
- int ret;
-
- if (mode)
- buf = 0x0; /* auto */
- else
- buf = 0xff; /* fixed */
-
- ret = SendControlMsg(SET_LUM_CTL, AGC_MODE_FORMATTER, 1);
-
- if (!mode && ret >= 0) {
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- buf = (value >> 10) & 0x3F;
- ret = SendControlMsg(SET_LUM_CTL, PRESET_AGC_FORMATTER, 1);
- }
- if (ret < 0)
- return ret;
- return 0;
-}
-
-static inline int pwc_get_agc(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_LUM_CTL, AGC_MODE_FORMATTER, 1);
- if (ret < 0)
- return ret;
-
- if (buf != 0) { /* fixed */
- ret = RecvControlMsg(GET_LUM_CTL, PRESET_AGC_FORMATTER, 1);
- if (ret < 0)
- return ret;
- if (buf > 0x3F)
- buf = 0x3F;
- *value = (buf << 10);
- }
- else { /* auto */
- ret = RecvControlMsg(GET_STATUS_CTL, READ_AGC_FORMATTER, 1);
- if (ret < 0)
- return ret;
- /* Gah... this value ranges from 0x00 ... 0x9F */
- if (buf > 0x9F)
- buf = 0x9F;
- *value = -(48 + buf * 409);
- }
-
- return 0;
-}
-
-static inline int pwc_set_shutter_speed(struct pwc_device *pdev, int mode, int value)
-{
- char buf[2];
- int speed, ret;
-
-
- if (mode)
- buf[0] = 0x0; /* auto */
- else
- buf[0] = 0xff; /* fixed */
-
- ret = SendControlMsg(SET_LUM_CTL, SHUTTER_MODE_FORMATTER, 1);
-
- if (!mode && ret >= 0) {
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- switch(pdev->type) {
- case 675:
- case 680:
- case 690:
- /* speed ranges from 0x0 to 0x290 (656) */
- speed = (value / 100);
- buf[1] = speed >> 8;
- buf[0] = speed & 0xff;
- break;
- case 720:
- case 730:
- case 740:
- case 750:
- /* speed seems to range from 0x0 to 0xff */
- buf[1] = 0;
- buf[0] = value >> 8;
- break;
- }
-
- ret = SendControlMsg(SET_LUM_CTL, PRESET_SHUTTER_FORMATTER, 2);
- }
- return ret;
-}
-
-
-/* POWER */
-
-int pwc_camera_power(struct pwc_device *pdev, int power)
-{
- char buf;
-
- if (pdev->type < 675 || (pdev->type < 730 && pdev->release < 6))
- return 0; /* Not supported by Nala or Timon < release 6 */
-
- if (power)
- buf = 0x00; /* active */
- else
- buf = 0xFF; /* power save */
- return SendControlMsg(SET_STATUS_CTL, SET_POWER_SAVE_MODE_FORMATTER, 1);
-}
-
-
-
-/* private calls */
-
-static inline int pwc_restore_user(struct pwc_device *pdev)
-{
- char buf; /* dummy */
- return SendControlMsg(SET_STATUS_CTL, RESTORE_USER_DEFAULTS_FORMATTER, 0);
-}
-
-static inline int pwc_save_user(struct pwc_device *pdev)
-{
- char buf; /* dummy */
- return SendControlMsg(SET_STATUS_CTL, SAVE_USER_DEFAULTS_FORMATTER, 0);
-}
-
-static inline int pwc_restore_factory(struct pwc_device *pdev)
-{
- char buf; /* dummy */
- return SendControlMsg(SET_STATUS_CTL, RESTORE_FACTORY_DEFAULTS_FORMATTER, 0);
-}
-
- /* ************************************************* */
- /* Patch by Alvarado: (not in the original version */
-
- /*
- * the camera recognizes modes from 0 to 4:
- *
- * 00: indoor (incandescant lighting)
- * 01: outdoor (sunlight)
- * 02: fluorescent lighting
- * 03: manual
- * 04: auto
- */
-static inline int pwc_set_awb(struct pwc_device *pdev, int mode)
-{
- char buf;
- int ret;
-
- if (mode < 0)
- mode = 0;
-
- if (mode > 4)
- mode = 4;
-
- buf = mode & 0x07; /* just the lowest three bits */
-
- ret = SendControlMsg(SET_CHROM_CTL, WB_MODE_FORMATTER, 1);
-
- if (ret < 0)
- return ret;
- return 0;
-}
-
-static inline int pwc_get_awb(struct pwc_device *pdev)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_CHROM_CTL, WB_MODE_FORMATTER, 1);
-
- if (ret < 0)
- return ret;
- return buf;
-}
-
-static inline int pwc_set_red_gain(struct pwc_device *pdev, int value)
-{
- unsigned char buf;
-
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- /* only the msb is considered */
- buf = value >> 8;
- return SendControlMsg(SET_CHROM_CTL, PRESET_MANUAL_RED_GAIN_FORMATTER, 1);
-}
-
-static inline int pwc_get_red_gain(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_CHROM_CTL, PRESET_MANUAL_RED_GAIN_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf << 8;
- return 0;
-}
-
-
-static inline int pwc_set_blue_gain(struct pwc_device *pdev, int value)
-{
- unsigned char buf;
-
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- /* only the msb is considered */
- buf = value >> 8;
- return SendControlMsg(SET_CHROM_CTL, PRESET_MANUAL_BLUE_GAIN_FORMATTER, 1);
-}
-
-static inline int pwc_get_blue_gain(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_CHROM_CTL, PRESET_MANUAL_BLUE_GAIN_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf << 8;
- return 0;
-}
-
-
-/* The following two functions are different, since they only read the
- internal red/blue gains, which may be different from the manual
- gains set or read above.
- */
-static inline int pwc_read_red_gain(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_STATUS_CTL, READ_RED_GAIN_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf << 8;
- return 0;
-}
-
-static inline int pwc_read_blue_gain(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_STATUS_CTL, READ_BLUE_GAIN_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf << 8;
- return 0;
-}
-
-
-static inline int pwc_set_wb_speed(struct pwc_device *pdev, int speed)
-{
- unsigned char buf;
-
- /* useful range is 0x01..0x20 */
- buf = speed / 0x7f0;
- return SendControlMsg(SET_CHROM_CTL, AWB_CONTROL_SPEED_FORMATTER, 1);
-}
-
-static inline int pwc_get_wb_speed(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_CHROM_CTL, AWB_CONTROL_SPEED_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf * 0x7f0;
- return 0;
-}
-
-
-static inline int pwc_set_wb_delay(struct pwc_device *pdev, int delay)
-{
- unsigned char buf;
-
- /* useful range is 0x01..0x3F */
- buf = (delay >> 10);
- return SendControlMsg(SET_CHROM_CTL, AWB_CONTROL_DELAY_FORMATTER, 1);
-}
-
-static inline int pwc_get_wb_delay(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_CHROM_CTL, AWB_CONTROL_DELAY_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf << 10;
- return 0;
-}
-
-
-int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value)
-{
- unsigned char buf[2];
-
- if (pdev->type < 730)
- return 0;
- on_value /= 100;
- off_value /= 100;
- if (on_value < 0)
- on_value = 0;
- if (on_value > 0xff)
- on_value = 0xff;
- if (off_value < 0)
- off_value = 0;
- if (off_value > 0xff)
- off_value = 0xff;
-
- buf[0] = on_value;
- buf[1] = off_value;
-
- return SendControlMsg(SET_STATUS_CTL, LED_FORMATTER, 2);
-}
-
-int pwc_get_leds(struct pwc_device *pdev, int *on_value, int *off_value)
-{
- unsigned char buf[2];
- int ret;
-
- if (pdev->type < 730) {
- *on_value = -1;
- *off_value = -1;
- return 0;
- }
-
- ret = RecvControlMsg(GET_STATUS_CTL, LED_FORMATTER, 2);
- if (ret < 0)
- return ret;
- *on_value = buf[0] * 100;
- *off_value = buf[1] * 100;
- return 0;
-}
-
-static inline int pwc_set_contour(struct pwc_device *pdev, int contour)
-{
- unsigned char buf;
- int ret;
-
- if (contour < 0)
- buf = 0xff; /* auto contour on */
- else
- buf = 0x0; /* auto contour off */
- ret = SendControlMsg(SET_LUM_CTL, AUTO_CONTOUR_FORMATTER, 1);
- if (ret < 0)
- return ret;
-
- if (contour < 0)
- return 0;
- if (contour > 0xffff)
- contour = 0xffff;
-
- buf = (contour >> 10); /* contour preset is [0..3f] */
- ret = SendControlMsg(SET_LUM_CTL, PRESET_CONTOUR_FORMATTER, 1);
- if (ret < 0)
- return ret;
- return 0;
-}
-
-static inline int pwc_get_contour(struct pwc_device *pdev, int *contour)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_LUM_CTL, AUTO_CONTOUR_FORMATTER, 1);
- if (ret < 0)
- return ret;
-
- if (buf == 0) {
- /* auto mode off, query current preset value */
- ret = RecvControlMsg(GET_LUM_CTL, PRESET_CONTOUR_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *contour = buf << 10;
- }
- else
- *contour = -1;
- return 0;
-}
-
-
-static inline int pwc_set_backlight(struct pwc_device *pdev, int backlight)
-{
- unsigned char buf;
-
- if (backlight)
- buf = 0xff;
- else
- buf = 0x0;
- return SendControlMsg(SET_LUM_CTL, BACK_LIGHT_COMPENSATION_FORMATTER, 1);
-}
-
-static inline int pwc_get_backlight(struct pwc_device *pdev, int *backlight)
-{
- int ret;
- unsigned char buf;
-
- ret = RecvControlMsg(GET_LUM_CTL, BACK_LIGHT_COMPENSATION_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *backlight = buf;
- return 0;
-}
-
-
-static inline int pwc_set_flicker(struct pwc_device *pdev, int flicker)
-{
- unsigned char buf;
-
- if (flicker)
- buf = 0xff;
- else
- buf = 0x0;
- return SendControlMsg(SET_LUM_CTL, FLICKERLESS_MODE_FORMATTER, 1);
-}
-
-static inline int pwc_get_flicker(struct pwc_device *pdev, int *flicker)
-{
- int ret;
- unsigned char buf;
-
- ret = RecvControlMsg(GET_LUM_CTL, FLICKERLESS_MODE_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *flicker = buf;
- return 0;
-}
-
-
-static inline int pwc_set_dynamic_noise(struct pwc_device *pdev, int noise)
-{
- unsigned char buf;
-
- if (noise < 0)
- noise = 0;
- if (noise > 3)
- noise = 3;
- buf = noise;
- return SendControlMsg(SET_LUM_CTL, DYNAMIC_NOISE_CONTROL_FORMATTER, 1);
-}
-
-static inline int pwc_get_dynamic_noise(struct pwc_device *pdev, int *noise)
-{
- int ret;
- unsigned char buf;
-
- ret = RecvControlMsg(GET_LUM_CTL, DYNAMIC_NOISE_CONTROL_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *noise = buf;
- return 0;
-}
-
-int pwc_mpt_reset(struct pwc_device *pdev, int flags)
-{
- unsigned char buf;
-
- buf = flags & 0x03; // only lower two bits are currently used
- return SendControlMsg(SET_MPT_CTL, PT_RESET_CONTROL_FORMATTER, 1);
-}
-
-static inline int pwc_mpt_set_angle(struct pwc_device *pdev, int pan, int tilt)
-{
- unsigned char buf[4];
-
- /* set new relative angle; angles are expressed in degrees * 100,
- but cam as .5 degree resolution, hence devide by 200. Also
- the angle must be multiplied by 64 before it's send to
- the cam (??)
- */
- pan = 64 * pan / 100;
- tilt = -64 * tilt / 100; /* positive tilt is down, which is not what the user would expect */
- buf[0] = pan & 0xFF;
- buf[1] = (pan >> 8) & 0xFF;
- buf[2] = tilt & 0xFF;
- buf[3] = (tilt >> 8) & 0xFF;
- return SendControlMsg(SET_MPT_CTL, PT_RELATIVE_CONTROL_FORMATTER, 4);
-}
-
-static inline int pwc_mpt_get_status(struct pwc_device *pdev, struct pwc_mpt_status *status)
-{
- int ret;
- unsigned char buf[5];
-
- ret = RecvControlMsg(GET_MPT_CTL, PT_STATUS_FORMATTER, 5);
- if (ret < 0)
- return ret;
- status->status = buf[0] & 0x7; // 3 bits are used for reporting
- status->time_pan = (buf[1] << 8) + buf[2];
- status->time_tilt = (buf[3] << 8) + buf[4];
- return 0;
-}
-
-
-int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor)
-{
- unsigned char buf;
- int ret = -1, request;
-
- if (pdev->type < 675)
- request = SENSOR_TYPE_FORMATTER1;
- else if (pdev->type < 730)
- return -1; /* The Vesta series doesn't have this call */
- else
- request = SENSOR_TYPE_FORMATTER2;
-
- ret = RecvControlMsg(GET_STATUS_CTL, request, 1);
- if (ret < 0)
- return ret;
- if (pdev->type < 675)
- *sensor = buf | 0x100;
- else
- *sensor = buf;
- return 0;
-}
-
-
- /* End of Add-Ons */
- /* ************************************************* */
-
-/* Linux 2.5.something and 2.6 pass direct pointers to arguments of
- ioctl() calls. With 2.4, you have to do tedious copy_from_user()
- and copy_to_user() calls. With these macros we circumvent this,
- and let me maintain only one source file. The functionality is
- exactly the same otherwise.
- */
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
-
-/* define local variable for arg */
-#define ARG_DEF(ARG_type, ARG_name)\
- ARG_type *ARG_name = arg;
-/* copy arg to local variable */
-#define ARG_IN(ARG_name) /* nothing */
-/* argument itself (referenced) */
-#define ARGR(ARG_name) (*ARG_name)
-/* argument address */
-#define ARGA(ARG_name) ARG_name
-/* copy local variable to arg */
-#define ARG_OUT(ARG_name) /* nothing */
-
-#else
-
-#define ARG_DEF(ARG_type, ARG_name)\
- ARG_type ARG_name;
-#define ARG_IN(ARG_name)\
- if (copy_from_user(&ARG_name, arg, sizeof(ARG_name))) {\
- ret = -EFAULT;\
- break;\
- }
-#define ARGR(ARG_name) ARG_name
-#define ARGA(ARG_name) &ARG_name
-#define ARG_OUT(ARG_name)\
- if (copy_to_user(arg, &ARG_name, sizeof(ARG_name))) {\
- ret = -EFAULT;\
- break;\
- }
-
-#endif
-
-int pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg)
-{
- int ret = 0;
-
- switch(cmd) {
- case VIDIOCPWCRUSER:
- {
- if (pwc_restore_user(pdev))
- ret = -EINVAL;
- break;
- }
-
- case VIDIOCPWCSUSER:
- {
- if (pwc_save_user(pdev))
- ret = -EINVAL;
- break;
- }
-
- case VIDIOCPWCFACTORY:
- {
- if (pwc_restore_factory(pdev))
- ret = -EINVAL;
- break;
- }
-
- case VIDIOCPWCSCQUAL:
- {
- ARG_DEF(int, qual)
-
- ARG_IN(qual)
- if (ARGR(qual) < 0 || ARGR(qual) > 3)
- ret = -EINVAL;
- else
- ret = pwc_try_video_mode(pdev, pdev->view.x, pdev->view.y, pdev->vframes, ARGR(qual), pdev->vsnapshot);
- if (ret >= 0)
- pdev->vcompression = ARGR(qual);
- break;
- }
-
- case VIDIOCPWCGCQUAL:
- {
- ARG_DEF(int, qual)
-
- ARGR(qual) = pdev->vcompression;
- ARG_OUT(qual)
- break;
- }
-
- case VIDIOCPWCPROBE:
- {
- ARG_DEF(struct pwc_probe, probe)
-
- strcpy(ARGR(probe).name, pdev->vdev->name);
- ARGR(probe).type = pdev->type;
- ARG_OUT(probe)
- break;
- }
-
- case VIDIOCPWCGSERIAL:
- {
- ARG_DEF(struct pwc_serial, serial)
-
- strcpy(ARGR(serial).serial, pdev->serial);
- ARG_OUT(serial)
- break;
- }
-
- case VIDIOCPWCSAGC:
- {
- ARG_DEF(int, agc)
-
- ARG_IN(agc)
- if (pwc_set_agc(pdev, ARGR(agc) < 0 ? 1 : 0, ARGR(agc)))
- ret = -EINVAL;
- break;
- }
-
- case VIDIOCPWCGAGC:
- {
- ARG_DEF(int, agc)
-
- if (pwc_get_agc(pdev, ARGA(agc)))
- ret = -EINVAL;
- ARG_OUT(agc)
- break;
- }
-
- case VIDIOCPWCSSHUTTER:
- {
- ARG_DEF(int, shutter_speed)
-
- ARG_IN(shutter_speed)
- ret = pwc_set_shutter_speed(pdev, ARGR(shutter_speed) < 0 ? 1 : 0, ARGR(shutter_speed));
- break;
- }
-
- case VIDIOCPWCSAWB:
- {
- ARG_DEF(struct pwc_whitebalance, wb)
-
- ARG_IN(wb)
- ret = pwc_set_awb(pdev, ARGR(wb).mode);
- if (ret >= 0 && ARGR(wb).mode == PWC_WB_MANUAL) {
- pwc_set_red_gain(pdev, ARGR(wb).manual_red);
- pwc_set_blue_gain(pdev, ARGR(wb).manual_blue);
- }
- break;
- }
-
- case VIDIOCPWCGAWB:
- {
- ARG_DEF(struct pwc_whitebalance, wb)
-
- memset(ARGA(wb), 0, sizeof(struct pwc_whitebalance));
- ARGR(wb).mode = pwc_get_awb(pdev);
- if (ARGR(wb).mode < 0)
- ret = -EINVAL;
- else {
- if (ARGR(wb).mode == PWC_WB_MANUAL) {
- ret = pwc_get_red_gain(pdev, &ARGR(wb).manual_red);
- if (ret < 0)
- break;
- ret = pwc_get_blue_gain(pdev, &ARGR(wb).manual_blue);
- if (ret < 0)
- break;
- }
- if (ARGR(wb).mode == PWC_WB_AUTO) {
- ret = pwc_read_red_gain(pdev, &ARGR(wb).read_red);
- if (ret < 0)
- break;
- ret =pwc_read_blue_gain(pdev, &ARGR(wb).read_blue);
- if (ret < 0)
- break;
- }
- }
- ARG_OUT(wb)
- break;
- }
-
- case VIDIOCPWCSAWBSPEED:
- {
- ARG_DEF(struct pwc_wb_speed, wbs)
-
- if (ARGR(wbs).control_speed > 0) {
- ret = pwc_set_wb_speed(pdev, ARGR(wbs).control_speed);
- }
- if (ARGR(wbs).control_delay > 0) {
- ret = pwc_set_wb_delay(pdev, ARGR(wbs).control_delay);
- }
- break;
- }
-
- case VIDIOCPWCGAWBSPEED:
- {
- ARG_DEF(struct pwc_wb_speed, wbs)
-
- ret = pwc_get_wb_speed(pdev, &ARGR(wbs).control_speed);
- if (ret < 0)
- break;
- ret = pwc_get_wb_delay(pdev, &ARGR(wbs).control_delay);
- if (ret < 0)
- break;
- ARG_OUT(wbs)
- break;
- }
-
- case VIDIOCPWCSLED:
- {
- ARG_DEF(struct pwc_leds, leds)
-
- ARG_IN(leds)
- ret = pwc_set_leds(pdev, ARGR(leds).led_on, ARGR(leds).led_off);
- break;
- }
-
-
- case VIDIOCPWCGLED:
- {
- ARG_DEF(struct pwc_leds, leds)
-
- ret = pwc_get_leds(pdev, &ARGR(leds).led_on, &ARGR(leds).led_off);
- ARG_OUT(leds)
- break;
- }
-
- case VIDIOCPWCSCONTOUR:
- {
- ARG_DEF(int, contour)
-
- ARG_IN(contour)
- ret = pwc_set_contour(pdev, ARGR(contour));
- break;
- }
-
- case VIDIOCPWCGCONTOUR:
- {
- ARG_DEF(int, contour)
-
- ret = pwc_get_contour(pdev, ARGA(contour));
- ARG_OUT(contour)
- break;
- }
-
- case VIDIOCPWCSBACKLIGHT:
- {
- ARG_DEF(int, backlight)
-
- ARG_IN(backlight)
- ret = pwc_set_backlight(pdev, ARGR(backlight));
- break;
- }
-
- case VIDIOCPWCGBACKLIGHT:
- {
- ARG_DEF(int, backlight)
-
- ret = pwc_get_backlight(pdev, ARGA(backlight));
- ARG_OUT(backlight)
- break;
- }
-
- case VIDIOCPWCSFLICKER:
- {
- ARG_DEF(int, flicker)
-
- ARG_IN(flicker)
- ret = pwc_set_flicker(pdev, ARGR(flicker));
- break;
- }
-
- case VIDIOCPWCGFLICKER:
- {
- ARG_DEF(int, flicker)
-
- ret = pwc_get_flicker(pdev, ARGA(flicker));
- ARG_OUT(flicker)
- break;
- }
-
- case VIDIOCPWCSDYNNOISE:
- {
- ARG_DEF(int, dynnoise)
-
- ARG_IN(dynnoise)
- ret = pwc_set_dynamic_noise(pdev, ARGR(dynnoise));
- break;
- }
-
- case VIDIOCPWCGDYNNOISE:
- {
- ARG_DEF(int, dynnoise)
-
- ret = pwc_get_dynamic_noise(pdev, ARGA(dynnoise));
- ARG_OUT(dynnoise);
- break;
- }
-
- case VIDIOCPWCGREALSIZE:
- {
- ARG_DEF(struct pwc_imagesize, size)
-
- ARGR(size).width = pdev->image.x;
- ARGR(size).height = pdev->image.y;
- ARG_OUT(size)
- break;
- }
-
- case VIDIOCPWCMPTRESET:
- {
- if (pdev->features & FEATURE_MOTOR_PANTILT)
- {
- ARG_DEF(int, flags)
-
- ARG_IN(flags)
- ret = pwc_mpt_reset(pdev, ARGR(flags));
- if (ret >= 0)
- {
- pdev->pan_angle = 0;
- pdev->tilt_angle = 0;
- }
- }
- else
- {
- ret = -ENXIO;
- }
- break;
- }
-
- case VIDIOCPWCMPTGRANGE:
- {
- if (pdev->features & FEATURE_MOTOR_PANTILT)
- {
- ARG_DEF(struct pwc_mpt_range, range)
-
- ARGR(range) = pdev->angle_range;
- ARG_OUT(range)
- }
- else
- {
- ret = -ENXIO;
- }
- break;
- }
-
- case VIDIOCPWCMPTSANGLE:
- {
- int new_pan, new_tilt;
-
- if (pdev->features & FEATURE_MOTOR_PANTILT)
- {
- ARG_DEF(struct pwc_mpt_angles, angles)
-
- ARG_IN(angles)
- /* The camera can only set relative angles, so
- do some calculations when getting an absolute angle .
- */
- if (ARGR(angles).absolute)
- {
- new_pan = ARGR(angles).pan;
- new_tilt = ARGR(angles).tilt;
- }
- else
- {
- new_pan = pdev->pan_angle + ARGR(angles).pan;
- new_tilt = pdev->tilt_angle + ARGR(angles).tilt;
- }
- /* check absolute ranges */
- if (new_pan < pdev->angle_range.pan_min ||
- new_pan > pdev->angle_range.pan_max ||
- new_tilt < pdev->angle_range.tilt_min ||
- new_tilt > pdev->angle_range.tilt_max)
- {
- ret = -ERANGE;
- }
- else
- {
- /* go to relative range, check again */
- new_pan -= pdev->pan_angle;
- new_tilt -= pdev->tilt_angle;
- /* angles are specified in degrees * 100, thus the limit = 36000 */
- if (new_pan < -36000 || new_pan > 36000 || new_tilt < -36000 || new_tilt > 36000)
- ret = -ERANGE;
- }
- if (ret == 0) /* no errors so far */
- {
- ret = pwc_mpt_set_angle(pdev, new_pan, new_tilt);
- if (ret >= 0)
- {
- pdev->pan_angle += new_pan;
- pdev->tilt_angle += new_tilt;
- }
- if (ret == -EPIPE) /* stall -> out of range */
- ret = -ERANGE;
- }
- }
- else
- {
- ret = -ENXIO;
- }
- break;
- }
-
- case VIDIOCPWCMPTGANGLE:
- {
-
- if (pdev->features & FEATURE_MOTOR_PANTILT)
- {
- ARG_DEF(struct pwc_mpt_angles, angles)
-
- ARGR(angles).absolute = 1;
- ARGR(angles).pan = pdev->pan_angle;
- ARGR(angles).tilt = pdev->tilt_angle;
- ARG_OUT(angles)
- }
- else
- {
- ret = -ENXIO;
- }
- break;
- }
-
- case VIDIOCPWCMPTSTATUS:
- {
- if (pdev->features & FEATURE_MOTOR_PANTILT)
- {
- ARG_DEF(struct pwc_mpt_status, status)
-
- ret = pwc_mpt_get_status(pdev, ARGA(status));
- ARG_OUT(status)
- }
- else
- {
- ret = -ENXIO;
- }
- break;
- }
-
- case VIDIOCPWCGVIDCMD:
- {
- ARG_DEF(struct pwc_video_command, cmd);
-
- ARGR(cmd).type = pdev->type;
- ARGR(cmd).release = pdev->release;
- ARGR(cmd).command_len = pdev->cmd_len;
- memcpy(&ARGR(cmd).command_buf, pdev->cmd_buf, pdev->cmd_len);
- ARGR(cmd).bandlength = pdev->vbandlength;
- ARGR(cmd).frame_size = pdev->frame_size;
- ARG_OUT(cmd)
- break;
- }
-
- default:
- ret = -ENOIOCTLCMD;
- break;
- }
-
- if (ret > 0)
- return 0;
- return ret;
-}
-
-
-
+++ /dev/null
-/* Linux driver for Philips webcam
- USB and Video4Linux interface part.
- (C) 1999-2004 Nemosoft Unv.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-
-*/
-
-/*
- This code forms the interface between the USB layers and the Philips
- specific stuff. Some adanved stuff of the driver falls under an
- NDA, signed between me and Philips B.V., Eindhoven, the Netherlands, and
- is thus not distributed in source form. The binary pwcx.o module
- contains the code that falls under the NDA.
-
- In case you're wondering: 'pwc' stands for "Philips WebCam", but
- I really didn't want to type 'philips_web_cam' every time (I'm lazy as
- any Linux kernel hacker, but I don't like uncomprehensible abbreviations
- without explanation).
-
- Oh yes, convention: to disctinguish between all the various pointers to
- device-structures, I use these names for the pointer variables:
- udev: struct usb_device *
- vdev: struct video_device *
- pdev: struct pwc_devive *
-*/
-
-/* Contributors:
- - Alvarado: adding whitebalance code
- - Alistar Moire: QuickCam 3000 Pro device/product ID
- - Tony Hoyle: Creative Labs Webcam 5 device/product ID
- - Mark Burazin: solving hang in VIDIOCSYNC when camera gets unplugged
- - Jk Fang: Sotec Afina Eye ID
- - Xavier Roche: QuickCam Pro 4000 ID
- - Jens Knudsen: QuickCam Zoom ID
- - J. Debert: QuickCam for Notebooks ID
-*/
-
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/poll.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <asm/io.h>
-
-#include "pwc.h"
-#include "pwc-ioctl.h"
-#include "pwc-uncompress.h"
-
-/* Function prototypes and driver templates */
-
-/* hotplug device table support */
-static struct usb_device_id pwc_device_table [] = {
- { USB_DEVICE(0x0471, 0x0302) }, /* Philips models */
- { USB_DEVICE(0x0471, 0x0303) },
- { USB_DEVICE(0x0471, 0x0304) },
- { USB_DEVICE(0x0471, 0x0307) },
- { USB_DEVICE(0x0471, 0x0308) },
- { USB_DEVICE(0x0471, 0x030C) },
- { USB_DEVICE(0x0471, 0x0310) },
- { USB_DEVICE(0x0471, 0x0311) },
- { USB_DEVICE(0x0471, 0x0312) },
- { USB_DEVICE(0x0471, 0x0313) }, /* the 'new' 720K */
- { USB_DEVICE(0x069A, 0x0001) }, /* Askey */
- { USB_DEVICE(0x046D, 0x08B0) }, /* Logitech QuickCam Pro 3000 */
- { USB_DEVICE(0x046D, 0x08B1) }, /* Logitech QuickCam Notebook Pro */
- { USB_DEVICE(0x046D, 0x08B2) }, /* Logitech QuickCam Pro 4000 */
- { USB_DEVICE(0x046D, 0x08B3) }, /* Logitech QuickCam Zoom (old model) */
- { USB_DEVICE(0x046D, 0x08B4) }, /* Logitech QuickCam Zoom (new model) */
- { USB_DEVICE(0x046D, 0x08B5) }, /* Logitech QuickCam Orbit/Sphere */
- { USB_DEVICE(0x046D, 0x08B6) }, /* Logitech (reserved) */
- { USB_DEVICE(0x046D, 0x08B7) }, /* Logitech (reserved) */
- { USB_DEVICE(0x046D, 0x08B8) }, /* Logitech (reserved) */
- { USB_DEVICE(0x055D, 0x9000) }, /* Samsung */
- { USB_DEVICE(0x055D, 0x9001) },
- { USB_DEVICE(0x041E, 0x400C) }, /* Creative Webcam 5 */
- { USB_DEVICE(0x041E, 0x4011) }, /* Creative Webcam Pro Ex */
- { USB_DEVICE(0x04CC, 0x8116) }, /* Afina Eye */
- { USB_DEVICE(0x06BE, 0x8116) }, /* new Afina Eye */
- { USB_DEVICE(0x0d81, 0x1910) }, /* Visionite */
- { USB_DEVICE(0x0d81, 0x1900) },
- { }
-};
-MODULE_DEVICE_TABLE(usb, pwc_device_table);
-
-static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id *id);
-static void usb_pwc_disconnect(struct usb_interface *intf);
-
-static struct usb_driver pwc_driver = {
- .owner = THIS_MODULE,
- .name = "Philips webcam", /* name */
- .id_table = pwc_device_table,
- .probe = usb_pwc_probe, /* probe() */
- .disconnect = usb_pwc_disconnect, /* disconnect() */
-};
-
-#define MAX_DEV_HINTS 20
-#define MAX_ISOC_ERRORS 20
-
-static int default_size = PSZ_QCIF;
-static int default_fps = 10;
-static int default_fbufs = 3; /* Default number of frame buffers */
-static int default_mbufs = 2; /* Default number of mmap() buffers */
- int pwc_trace = TRACE_MODULE | TRACE_FLOW | TRACE_PWCX;
-static int power_save = 0;
-static int led_on = 100, led_off = 0; /* defaults to LED that is on while in use */
- int pwc_preferred_compression = 2; /* 0..3 = uncompressed..high */
-static struct {
- int type;
- char serial_number[30];
- int device_node;
- struct pwc_device *pdev;
-} device_hint[MAX_DEV_HINTS];
-
-/***/
-
-static int pwc_video_open(struct inode *inode, struct file *file);
-static int pwc_video_close(struct inode *inode, struct file *file);
-static ssize_t pwc_video_read(struct file *file, char __user *buf,
- size_t count, loff_t *ppos);
-static unsigned int pwc_video_poll(struct file *file, poll_table *wait);
-static int pwc_video_ioctl(struct inode *inode, struct file *file,
- unsigned int ioctlnr, unsigned long arg);
-static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma);
-
-static struct file_operations pwc_fops = {
- .owner = THIS_MODULE,
- .open = pwc_video_open,
- .release = pwc_video_close,
- .read = pwc_video_read,
- .poll = pwc_video_poll,
- .mmap = pwc_video_mmap,
- .ioctl = pwc_video_ioctl,
- .llseek = no_llseek,
-};
-static struct video_device pwc_template = {
- .owner = THIS_MODULE,
- .name = "Philips Webcam", /* Filled in later */
- .type = VID_TYPE_CAPTURE,
- .hardware = VID_HARDWARE_PWC,
- .release = video_device_release,
- .fops = &pwc_fops,
- .minor = -1,
-};
-
-/***************************************************************************/
-
-/* Okay, this is some magic that I worked out and the reasoning behind it...
-
- The biggest problem with any USB device is of course: "what to do
- when the user unplugs the device while it is in use by an application?"
- We have several options:
- 1) Curse them with the 7 plagues when they do (requires divine intervention)
- 2) Tell them not to (won't work: they'll do it anyway)
- 3) Oops the kernel (this will have a negative effect on a user's uptime)
- 4) Do something sensible.
-
- Of course, we go for option 4.
-
- It happens that this device will be linked to two times, once from
- usb_device and once from the video_device in their respective 'private'
- pointers. This is done when the device is probed() and all initialization
- succeeded. The pwc_device struct links back to both structures.
-
- When a device is unplugged while in use it will be removed from the
- list of known USB devices; I also de-register it as a V4L device, but
- unfortunately I can't free the memory since the struct is still in use
- by the file descriptor. This free-ing is then deferend until the first
- opportunity. Crude, but it works.
-
- A small 'advantage' is that if a user unplugs the cam and plugs it back
- in, it should get assigned the same video device minor, but unfortunately
- it's non-trivial to re-link the cam back to the video device... (that
- would surely be magic! :))
-*/
-
-/***************************************************************************/
-/* Private functions */
-
-/* Here we want the physical address of the memory.
- * This is used when initializing the contents of the area.
- */
-static inline unsigned long kvirt_to_pa(unsigned long adr)
-{
- unsigned long kva, ret;
-
- kva = (unsigned long) page_address(vmalloc_to_page((void *)adr));
- kva |= adr & (PAGE_SIZE-1); /* restore the offset */
- ret = __pa(kva);
- return ret;
-}
-
-static void * rvmalloc(unsigned long size)
-{
- void * mem;
- unsigned long adr;
-
- size=PAGE_ALIGN(size);
- mem=vmalloc_32(size);
- if (mem)
- {
- memset(mem, 0, size); /* Clear the ram out, no junk to the user */
- adr=(unsigned long) mem;
- while (size > 0)
- {
- SetPageReserved(vmalloc_to_page((void *)adr));
- adr+=PAGE_SIZE;
- size-=PAGE_SIZE;
- }
- }
- return mem;
-}
-
-static void rvfree(void * mem, unsigned long size)
-{
- unsigned long adr;
-
- if (mem)
- {
- adr=(unsigned long) mem;
- while ((long) size > 0)
- {
- ClearPageReserved(vmalloc_to_page((void *)adr));
- adr+=PAGE_SIZE;
- size-=PAGE_SIZE;
- }
- vfree(mem);
- }
-}
-
-
-
-
-static int pwc_allocate_buffers(struct pwc_device *pdev)
-{
- int i;
- void *kbuf;
-
- Trace(TRACE_MEMORY, ">> pwc_allocate_buffers(pdev = 0x%p)\n", pdev);
-
- if (pdev == NULL)
- return -ENXIO;
-
-#ifdef PWC_MAGIC
- if (pdev->magic != PWC_MAGIC) {
- Err("allocate_buffers(): magic failed.\n");
- return -ENXIO;
- }
-#endif
- /* Allocate Isochronuous pipe buffers */
- for (i = 0; i < MAX_ISO_BUFS; i++) {
- if (pdev->sbuf[i].data == NULL) {
- kbuf = kmalloc(ISO_BUFFER_SIZE, GFP_KERNEL);
- if (kbuf == NULL) {
- Err("Failed to allocate iso buffer %d.\n", i);
- return -ENOMEM;
- }
- Trace(TRACE_MEMORY, "Allocated iso buffer at %p.\n", kbuf);
- pdev->sbuf[i].data = kbuf;
- memset(kbuf, 0, ISO_BUFFER_SIZE);
- }
- }
-
- /* Allocate frame buffer structure */
- if (pdev->fbuf == NULL) {
- kbuf = kmalloc(default_fbufs * sizeof(struct pwc_frame_buf), GFP_KERNEL);
- if (kbuf == NULL) {
- Err("Failed to allocate frame buffer structure.\n");
- return -ENOMEM;
- }
- Trace(TRACE_MEMORY, "Allocated frame buffer structure at %p.\n", kbuf);
- pdev->fbuf = kbuf;
- memset(kbuf, 0, default_fbufs * sizeof(struct pwc_frame_buf));
- }
- /* create frame buffers, and make circular ring */
- for (i = 0; i < default_fbufs; i++) {
- if (pdev->fbuf[i].data == NULL) {
- kbuf = vmalloc(PWC_FRAME_SIZE); /* need vmalloc since frame buffer > 128K */
- if (kbuf == NULL) {
- Err("Failed to allocate frame buffer %d.\n", i);
- return -ENOMEM;
- }
- Trace(TRACE_MEMORY, "Allocated frame buffer %d at %p.\n", i, kbuf);
- pdev->fbuf[i].data = kbuf;
- memset(kbuf, 128, PWC_FRAME_SIZE);
- }
- }
-
- /* Allocate decompressor table space */
- kbuf = NULL;
- if (pdev->decompressor != NULL) {
- kbuf = kmalloc(pdev->decompressor->table_size, GFP_KERNEL);
- if (kbuf == NULL) {
- Err("Failed to allocate decompress table.\n");
- return -ENOMEM;
- }
- Trace(TRACE_MEMORY, "Allocated decompress table %p.\n", kbuf);
- }
- pdev->decompress_data = kbuf;
-
- /* Allocate image buffer; double buffer for mmap() */
- kbuf = rvmalloc(default_mbufs * pdev->len_per_image);
- if (kbuf == NULL) {
- Err("Failed to allocate image buffer(s).\n");
- return -ENOMEM;
- }
- Trace(TRACE_MEMORY, "Allocated image buffer at %p.\n", kbuf);
- pdev->image_data = kbuf;
- for (i = 0; i < default_mbufs; i++)
- pdev->image_ptr[i] = kbuf + i * pdev->len_per_image;
- for (; i < MAX_IMAGES; i++)
- pdev->image_ptr[i] = NULL;
-
- kbuf = NULL;
-
- Trace(TRACE_MEMORY, "<< pwc_allocate_buffers()\n");
- return 0;
-}
-
-static void pwc_free_buffers(struct pwc_device *pdev)
-{
- int i;
-
- Trace(TRACE_MEMORY, "Entering free_buffers(%p).\n", pdev);
-
- if (pdev == NULL)
- return;
-#ifdef PWC_MAGIC
- if (pdev->magic != PWC_MAGIC) {
- Err("free_buffers(): magic failed.\n");
- return;
- }
-#endif
-
- /* Release Iso-pipe buffers */
- for (i = 0; i < MAX_ISO_BUFS; i++)
- if (pdev->sbuf[i].data != NULL) {
- Trace(TRACE_MEMORY, "Freeing ISO buffer at %p.\n", pdev->sbuf[i].data);
- kfree(pdev->sbuf[i].data);
- pdev->sbuf[i].data = NULL;
- }
-
- /* The same for frame buffers */
- if (pdev->fbuf != NULL) {
- for (i = 0; i < default_fbufs; i++) {
- if (pdev->fbuf[i].data != NULL) {
- Trace(TRACE_MEMORY, "Freeing frame buffer %d at %p.\n", i, pdev->fbuf[i].data);
- vfree(pdev->fbuf[i].data);
- pdev->fbuf[i].data = NULL;
- }
- }
- kfree(pdev->fbuf);
- pdev->fbuf = NULL;
- }
-
- /* Intermediate decompression buffer & tables */
- if (pdev->decompress_data != NULL) {
- Trace(TRACE_MEMORY, "Freeing decompression buffer at %p.\n", pdev->decompress_data);
- kfree(pdev->decompress_data);
- pdev->decompress_data = NULL;
- }
- pdev->decompressor = NULL;
-
- /* Release image buffers */
- if (pdev->image_data != NULL) {
- Trace(TRACE_MEMORY, "Freeing image buffer at %p.\n", pdev->image_data);
- rvfree(pdev->image_data, default_mbufs * pdev->len_per_image);
- }
- pdev->image_data = NULL;
-
- Trace(TRACE_MEMORY, "Leaving free_buffers().\n");
-}
-
-/* The frame & image buffer mess.
-
- Yes, this is a mess. Well, it used to be simple, but alas... In this
- module, 3 buffers schemes are used to get the data from the USB bus to
- the user program. The first scheme involves the ISO buffers (called thus
- since they transport ISO data from the USB controller), and not really
- interesting. Suffices to say the data from this buffer is quickly
- gathered in an interrupt handler (pwc_isoc_handler) and placed into the
- frame buffer.
-
- The frame buffer is the second scheme, and is the central element here.
- It collects the data from a single frame from the camera (hence, the
- name). Frames are delimited by the USB camera with a short USB packet,
- so that's easy to detect. The frame buffers form a list that is filled
- by the camera+USB controller and drained by the user process through
- either read() or mmap().
-
- The image buffer is the third scheme, in which frames are decompressed
- and converted into planar format. For mmap() there is more than
- one image buffer available.
-
- The frame buffers provide the image buffering. In case the user process
- is a bit slow, this introduces lag and some undesired side-effects.
- The problem arises when the frame buffer is full. I used to drop the last
- frame, which makes the data in the queue stale very quickly. But dropping
- the frame at the head of the queue proved to be a litte bit more difficult.
- I tried a circular linked scheme, but this introduced more problems than
- it solved.
-
- Because filling and draining are completely asynchronous processes, this
- requires some fiddling with pointers and mutexes.
-
- Eventually, I came up with a system with 2 lists: an 'empty' frame list
- and a 'full' frame list:
- * Initially, all frame buffers but one are on the 'empty' list; the one
- remaining buffer is our initial fill frame.
- * If a frame is needed for filling, we try to take it from the 'empty'
- list, unless that list is empty, in which case we take the buffer at
- the head of the 'full' list.
- * When our fill buffer has been filled, it is appended to the 'full'
- list.
- * If a frame is needed by read() or mmap(), it is taken from the head of
- the 'full' list, handled, and then appended to the 'empty' list. If no
- buffer is present on the 'full' list, we wait.
- The advantage is that the buffer that is currently being decompressed/
- converted, is on neither list, and thus not in our way (any other scheme
- I tried had the problem of old data lingering in the queue).
-
- Whatever strategy you choose, it always remains a tradeoff: with more
- frame buffers the chances of a missed frame are reduced. On the other
- hand, on slower machines it introduces lag because the queue will
- always be full.
- */
-
-/**
- \brief Find next frame buffer to fill. Take from empty or full list, whichever comes first.
- */
-static inline int pwc_next_fill_frame(struct pwc_device *pdev)
-{
- int ret;
- unsigned long flags;
-
- ret = 0;
- spin_lock_irqsave(&pdev->ptrlock, flags);
- if (pdev->fill_frame != NULL) {
- /* append to 'full' list */
- if (pdev->full_frames == NULL) {
- pdev->full_frames = pdev->fill_frame;
- pdev->full_frames_tail = pdev->full_frames;
- }
- else {
- pdev->full_frames_tail->next = pdev->fill_frame;
- pdev->full_frames_tail = pdev->fill_frame;
- }
- }
- if (pdev->empty_frames != NULL) {
- /* We have empty frames available. That's easy */
- pdev->fill_frame = pdev->empty_frames;
- pdev->empty_frames = pdev->empty_frames->next;
- }
- else {
- /* Hmm. Take it from the full list */
-#if PWC_DEBUG
- /* sanity check */
- if (pdev->full_frames == NULL) {
- Err("Neither empty or full frames available!\n");
- spin_unlock_irqrestore(&pdev->ptrlock, flags);
- return -EINVAL;
- }
-#endif
- pdev->fill_frame = pdev->full_frames;
- pdev->full_frames = pdev->full_frames->next;
- ret = 1;
- }
- pdev->fill_frame->next = NULL;
-#if PWC_DEBUG
- Trace(TRACE_SEQUENCE, "Assigning sequence number %d.\n", pdev->sequence);
- pdev->fill_frame->sequence = pdev->sequence++;
-#endif
- spin_unlock_irqrestore(&pdev->ptrlock, flags);
- return ret;
-}
-
-
-/**
- \brief Reset all buffers, pointers and lists, except for the image_used[] buffer.
-
- If the image_used[] buffer is cleared too, mmap()/VIDIOCSYNC will run into trouble.
- */
-static void pwc_reset_buffers(struct pwc_device *pdev)
-{
- int i;
- unsigned long flags;
-
- spin_lock_irqsave(&pdev->ptrlock, flags);
- pdev->full_frames = NULL;
- pdev->full_frames_tail = NULL;
- for (i = 0; i < default_fbufs; i++) {
- pdev->fbuf[i].filled = 0;
- if (i > 0)
- pdev->fbuf[i].next = &pdev->fbuf[i - 1];
- else
- pdev->fbuf->next = NULL;
- }
- pdev->empty_frames = &pdev->fbuf[default_fbufs - 1];
- pdev->empty_frames_tail = pdev->fbuf;
- pdev->read_frame = NULL;
- pdev->fill_frame = pdev->empty_frames;
- pdev->empty_frames = pdev->empty_frames->next;
-
- pdev->image_read_pos = 0;
- pdev->fill_image = 0;
- spin_unlock_irqrestore(&pdev->ptrlock, flags);
-}
-
-
-/**
- \brief Do all the handling for getting one frame: get pointer, decompress, advance pointers.
- */
-static int pwc_handle_frame(struct pwc_device *pdev)
-{
- int ret = 0;
- unsigned long flags;
-
- spin_lock_irqsave(&pdev->ptrlock, flags);
- /* First grab our read_frame; this is removed from all lists, so
- we can release the lock after this without problems */
- if (pdev->read_frame != NULL) {
- /* This can't theoretically happen */
- Err("Huh? Read frame still in use?\n");
- }
- else {
- if (pdev->full_frames == NULL) {
- Err("Woops. No frames ready.\n");
- }
- else {
- pdev->read_frame = pdev->full_frames;
- pdev->full_frames = pdev->full_frames->next;
- pdev->read_frame->next = NULL;
- }
-
- if (pdev->read_frame != NULL) {
-#if PWC_DEBUG
- Trace(TRACE_SEQUENCE, "Decompressing frame %d\n", pdev->read_frame->sequence);
-#endif
- /* Decompression is a lenghty process, so it's outside of the lock.
- This gives the isoc_handler the opportunity to fill more frames
- in the mean time.
- */
- spin_unlock_irqrestore(&pdev->ptrlock, flags);
- ret = pwc_decompress(pdev);
- spin_lock_irqsave(&pdev->ptrlock, flags);
-
- /* We're done with read_buffer, tack it to the end of the empty buffer list */
- if (pdev->empty_frames == NULL) {
- pdev->empty_frames = pdev->read_frame;
- pdev->empty_frames_tail = pdev->empty_frames;
- }
- else {
- pdev->empty_frames_tail->next = pdev->read_frame;
- pdev->empty_frames_tail = pdev->read_frame;
- }
- pdev->read_frame = NULL;
- }
- }
- spin_unlock_irqrestore(&pdev->ptrlock, flags);
- return ret;
-}
-
-/**
- \brief Advance pointers of image buffer (after each user request)
-*/
-static inline void pwc_next_image(struct pwc_device *pdev)
-{
- pdev->image_used[pdev->fill_image] = 0;
- pdev->fill_image = (pdev->fill_image + 1) % default_mbufs;
-}
-
-
-/* This gets called for the Isochronous pipe (video). This is done in
- * interrupt time, so it has to be fast, not crash, and not stall. Neat.
- */
-static void pwc_isoc_handler(struct urb *urb, struct pt_regs *regs)
-{
- struct pwc_device *pdev;
- int i, fst, flen;
- int awake;
- struct pwc_frame_buf *fbuf;
- unsigned char *fillptr = NULL;
- unsigned char *iso_buf = NULL;
-
- awake = 0;
- pdev = (struct pwc_device *)urb->context;
- if (pdev == NULL) {
- Err("isoc_handler() called with NULL device?!\n");
- return;
- }
-#ifdef PWC_MAGIC
- if (pdev->magic != PWC_MAGIC) {
- Err("isoc_handler() called with bad magic!\n");
- return;
- }
-#endif
- if (urb->status == -ENOENT || urb->status == -ECONNRESET) {
- Trace(TRACE_OPEN, "pwc_isoc_handler(): URB (%p) unlinked %ssynchronuously.\n", urb, urb->status == -ENOENT ? "" : "a");
- return;
- }
- if (urb->status != -EINPROGRESS && urb->status != 0) {
- const char *errmsg;
-
- errmsg = "Unknown";
- switch(urb->status) {
- case -ENOSR: errmsg = "Buffer error (overrun)"; break;
- case -EPIPE: errmsg = "Stalled (device not responding)"; break;
- case -EOVERFLOW: errmsg = "Babble (bad cable?)"; break;
- case -EPROTO: errmsg = "Bit-stuff error (bad cable?)"; break;
- case -EILSEQ: errmsg = "CRC/Timeout (could be anything)"; break;
- case -ETIMEDOUT: errmsg = "NAK (device does not respond)"; break;
- }
- Trace(TRACE_FLOW, "pwc_isoc_handler() called with status %d [%s].\n", urb->status, errmsg);
- /* Give up after a number of contiguous errors on the USB bus.
- Appearantly something is wrong so we simulate an unplug event.
- */
- if (++pdev->visoc_errors > MAX_ISOC_ERRORS)
- {
- Info("Too many ISOC errors, bailing out.\n");
- pdev->error_status = EIO;
- awake = 1;
- wake_up_interruptible(&pdev->frameq);
- }
- goto handler_end; // ugly, but practical
- }
-
- fbuf = pdev->fill_frame;
- if (fbuf == NULL) {
- Err("pwc_isoc_handler without valid fill frame.\n");
- awake = 1;
- goto handler_end;
- }
- else {
- fillptr = fbuf->data + fbuf->filled;
- }
-
- /* Reset ISOC error counter. We did get here, after all. */
- pdev->visoc_errors = 0;
-
- /* vsync: 0 = don't copy data
- 1 = sync-hunt
- 2 = synched
- */
- /* Compact data */
- for (i = 0; i < urb->number_of_packets; i++) {
- fst = urb->iso_frame_desc[i].status;
- flen = urb->iso_frame_desc[i].actual_length;
- iso_buf = urb->transfer_buffer + urb->iso_frame_desc[i].offset;
- if (fst == 0) {
- if (flen > 0) { /* if valid data... */
- if (pdev->vsync > 0) { /* ...and we are not sync-hunting... */
- pdev->vsync = 2;
-
- /* ...copy data to frame buffer, if possible */
- if (flen + fbuf->filled > pdev->frame_total_size) {
- Trace(TRACE_FLOW, "Frame buffer overflow (flen = %d, frame_total_size = %d).\n", flen, pdev->frame_total_size);
- pdev->vsync = 0; /* Hmm, let's wait for an EOF (end-of-frame) */
- pdev->vframes_error++;
- }
- else {
- memmove(fillptr, iso_buf, flen);
- fillptr += flen;
- }
- }
- fbuf->filled += flen;
- } /* ..flen > 0 */
-
- if (flen < pdev->vlast_packet_size) {
- /* Shorter packet... We probably have the end of an image-frame;
- wake up read() process and let select()/poll() do something.
- Decompression is done in user time over there.
- */
- if (pdev->vsync == 2) {
- /* The ToUCam Fun CMOS sensor causes the firmware to send 2 or 3 bogus
- frames on the USB wire after an exposure change. This conditition is
- however detected in the cam and a bit is set in the header.
- */
- if (pdev->type == 730) {
- unsigned char *ptr = (unsigned char *)fbuf->data;
-
- if (ptr[1] == 1 && ptr[0] & 0x10) {
-#if PWC_DEBUG
- Debug("Hyundai CMOS sensor bug. Dropping frame %d.\n", fbuf->sequence);
-#endif
- pdev->drop_frames += 2;
- pdev->vframes_error++;
- }
- if ((ptr[0] ^ pdev->vmirror) & 0x01) {
- if (ptr[0] & 0x01)
- Info("Snapshot button pressed.\n");
- else
- Info("Snapshot button released.\n");
- }
- if ((ptr[0] ^ pdev->vmirror) & 0x02) {
- if (ptr[0] & 0x02)
- Info("Image is mirrored.\n");
- else
- Info("Image is normal.\n");
- }
- pdev->vmirror = ptr[0] & 0x03;
- /* Sometimes the trailer of the 730 is still sent as a 4 byte packet
- after a short frame; this condition is filtered out specifically. A 4 byte
- frame doesn't make sense anyway.
- So we get either this sequence:
- drop_bit set -> 4 byte frame -> short frame -> good frame
- Or this one:
- drop_bit set -> short frame -> good frame
- So we drop either 3 or 2 frames in all!
- */
- if (fbuf->filled == 4)
- pdev->drop_frames++;
- }
-
- /* In case we were instructed to drop the frame, do so silently.
- The buffer pointers are not updated either (but the counters are reset below).
- */
- if (pdev->drop_frames > 0)
- pdev->drop_frames--;
- else {
- /* Check for underflow first */
- if (fbuf->filled < pdev->frame_total_size) {
- Trace(TRACE_FLOW, "Frame buffer underflow (%d bytes); discarded.\n", fbuf->filled);
- pdev->vframes_error++;
- }
- else {
- /* Send only once per EOF */
- awake = 1; /* delay wake_ups */
-
- /* Find our next frame to fill. This will always succeed, since we
- * nick a frame from either empty or full list, but if we had to
- * take it from the full list, it means a frame got dropped.
- */
- if (pwc_next_fill_frame(pdev)) {
- pdev->vframes_dumped++;
- if ((pdev->vframe_count > FRAME_LOWMARK) && (pwc_trace & TRACE_FLOW)) {
- if (pdev->vframes_dumped < 20)
- Trace(TRACE_FLOW, "Dumping frame %d.\n", pdev->vframe_count);
- if (pdev->vframes_dumped == 20)
- Trace(TRACE_FLOW, "Dumping frame %d (last message).\n", pdev->vframe_count);
- }
- }
- fbuf = pdev->fill_frame;
- }
- } /* !drop_frames */
- pdev->vframe_count++;
- }
- fbuf->filled = 0;
- fillptr = fbuf->data;
- pdev->vsync = 1;
- } /* .. flen < last_packet_size */
- pdev->vlast_packet_size = flen;
- } /* ..status == 0 */
-#if PWC_DEBUG
- /* This is normally not interesting to the user, unless you are really debugging something */
- else {
- static int iso_error = 0;
- iso_error++;
- if (iso_error < 20)
- Trace(TRACE_FLOW, "Iso frame %d of USB has error %d\n", i, fst);
- }
-#endif
- }
-
-handler_end:
- if (awake)
- wake_up_interruptible(&pdev->frameq);
-
- urb->dev = pdev->udev;
- i = usb_submit_urb(urb, GFP_ATOMIC);
- if (i != 0)
- Err("Error (%d) re-submitting urb in pwc_isoc_handler.\n", i);
-}
-
-
-static int pwc_isoc_init(struct pwc_device *pdev)
-{
- struct usb_device *udev;
- struct urb *urb;
- int i, j, ret;
-
- struct usb_interface *intf;
- struct usb_host_interface *idesc = NULL;
-
- if (pdev == NULL)
- return -EFAULT;
- if (pdev->iso_init)
- return 0;
- pdev->vsync = 0;
- udev = pdev->udev;
-
- /* Get the current alternate interface, adjust packet size */
- if (!udev->actconfig)
- return -EFAULT;
- intf = usb_ifnum_to_if(udev, 0);
- if (intf)
- idesc = usb_altnum_to_altsetting(intf, pdev->valternate);
- if (!idesc)
- return -EFAULT;
-
- /* Search video endpoint */
- pdev->vmax_packet_size = -1;
- for (i = 0; i < idesc->desc.bNumEndpoints; i++)
- if ((idesc->endpoint[i].desc.bEndpointAddress & 0xF) == pdev->vendpoint) {
- pdev->vmax_packet_size = idesc->endpoint[i].desc.wMaxPacketSize;
- break;
- }
-
- if (pdev->vmax_packet_size < 0 || pdev->vmax_packet_size > ISO_MAX_FRAME_SIZE) {
- Err("Failed to find packet size for video endpoint in current alternate setting.\n");
- return -ENFILE; /* Odd error, that should be noticable */
- }
-
- /* Set alternate interface */
- ret = 0;
- Trace(TRACE_OPEN, "Setting alternate interface %d\n", pdev->valternate);
- ret = usb_set_interface(pdev->udev, 0, pdev->valternate);
- if (ret < 0)
- return ret;
-
- for (i = 0; i < MAX_ISO_BUFS; i++) {
- urb = usb_alloc_urb(ISO_FRAMES_PER_DESC, GFP_KERNEL);
- if (urb == NULL) {
- Err("Failed to allocate urb %d\n", i);
- ret = -ENOMEM;
- break;
- }
- pdev->sbuf[i].urb = urb;
- Trace(TRACE_MEMORY, "Allocated URB at 0x%p\n", urb);
- }
- if (ret) {
- /* De-allocate in reverse order */
- while (i >= 0) {
- if (pdev->sbuf[i].urb != NULL)
- usb_free_urb(pdev->sbuf[i].urb);
- pdev->sbuf[i].urb = NULL;
- i--;
- }
- return ret;
- }
-
- /* init URB structure */
- for (i = 0; i < MAX_ISO_BUFS; i++) {
- urb = pdev->sbuf[i].urb;
-
- urb->interval = 1; // devik
- urb->dev = udev;
- urb->pipe = usb_rcvisocpipe(udev, pdev->vendpoint);
- urb->transfer_flags = URB_ISO_ASAP;
- urb->transfer_buffer = pdev->sbuf[i].data;
- urb->transfer_buffer_length = ISO_BUFFER_SIZE;
- urb->complete = pwc_isoc_handler;
- urb->context = pdev;
- urb->start_frame = 0;
- urb->number_of_packets = ISO_FRAMES_PER_DESC;
- for (j = 0; j < ISO_FRAMES_PER_DESC; j++) {
- urb->iso_frame_desc[j].offset = j * ISO_MAX_FRAME_SIZE;
- urb->iso_frame_desc[j].length = pdev->vmax_packet_size;
- }
- }
-
- /* link */
- for (i = 0; i < MAX_ISO_BUFS; i++) {
- ret = usb_submit_urb(pdev->sbuf[i].urb, GFP_KERNEL);
- if (ret)
- Err("isoc_init() submit_urb %d failed with error %d\n", i, ret);
- else
- Trace(TRACE_MEMORY, "URB 0x%p submitted.\n", pdev->sbuf[i].urb);
- }
-
- /* All is done... */
- pdev->iso_init = 1;
- Trace(TRACE_OPEN, "<< pwc_isoc_init()\n");
- return 0;
-}
-
-static void pwc_isoc_cleanup(struct pwc_device *pdev)
-{
- int i;
-
- Trace(TRACE_OPEN, ">> pwc_isoc_cleanup()\n");
- if (pdev == NULL)
- return;
-
- /* Unlinking ISOC buffers one by one */
- for (i = 0; i < MAX_ISO_BUFS; i++) {
- struct urb *urb;
-
- urb = pdev->sbuf[i].urb;
- if (urb != 0) {
- if (pdev->iso_init) {
- Trace(TRACE_MEMORY, "Unlinking URB %p\n", urb);
- usb_unlink_urb(urb);
- }
- Trace(TRACE_MEMORY, "Freeing URB\n");
- usb_free_urb(urb);
- pdev->sbuf[i].urb = NULL;
- }
- }
-
- /* Stop camera, but only if we are sure the camera is still there (unplug
- is signalled by EPIPE)
- */
- if (pdev->error_status && pdev->error_status != EPIPE) {
- Trace(TRACE_OPEN, "Setting alternate interface 0.\n");
- usb_set_interface(pdev->udev, 0, 0);
- }
-
- pdev->iso_init = 0;
- Trace(TRACE_OPEN, "<< pwc_isoc_cleanup()\n");
-}
-
-int pwc_try_video_mode(struct pwc_device *pdev, int width, int height, int new_fps, int new_compression, int new_snapshot)
-{
- int ret, start;
-
- /* Stop isoc stuff */
- pwc_isoc_cleanup(pdev);
- /* Reset parameters */
- pwc_reset_buffers(pdev);
- /* Try to set video mode... */
- start = ret = pwc_set_video_mode(pdev, width, height, new_fps, new_compression, new_snapshot);
- if (ret) {
- Trace(TRACE_FLOW, "pwc_set_video_mode attempt 1 failed.\n");
- /* That failed... restore old mode (we know that worked) */
- start = pwc_set_video_mode(pdev, pdev->view.x, pdev->view.y, pdev->vframes, pdev->vcompression, pdev->vsnapshot);
- if (start) {
- Trace(TRACE_FLOW, "pwc_set_video_mode attempt 2 failed.\n");
- }
- }
- if (start == 0)
- {
- if (pwc_isoc_init(pdev) < 0)
- {
- Info("Failed to restart ISOC transfers in pwc_try_video_mode.\n");
- ret = -EAGAIN; /* let's try again, who knows if it works a second time */
- }
- }
- pdev->drop_frames++; /* try to avoid garbage during switch */
- return ret; /* Return original error code */
-}
-
-
-/***************************************************************************/
-/* Video4Linux functions */
-
-static int pwc_video_open(struct inode *inode, struct file *file)
-{
- int i;
- struct video_device *vdev = video_devdata(file);
- struct pwc_device *pdev;
-
- Trace(TRACE_OPEN, ">> video_open called(vdev = 0x%p).\n", vdev);
-
- pdev = (struct pwc_device *)vdev->priv;
- if (pdev == NULL)
- BUG();
- if (pdev->vopen)
- return -EBUSY;
-
- down(&pdev->modlock);
- if (!pdev->usb_init) {
- Trace(TRACE_OPEN, "Doing first time initialization.\n");
- pdev->usb_init = 1;
-
- if (pwc_trace & TRACE_OPEN)
- {
- /* Query sensor type */
- const char *sensor_type = NULL;
- int ret;
-
- ret = pwc_get_cmos_sensor(pdev, &i);
- if (ret >= 0)
- {
- switch(i) {
- case 0x00: sensor_type = "Hyundai CMOS sensor"; break;
- case 0x20: sensor_type = "Sony CCD sensor + TDA8787"; break;
- case 0x2E: sensor_type = "Sony CCD sensor + Exas 98L59"; break;
- case 0x2F: sensor_type = "Sony CCD sensor + ADI 9804"; break;
- case 0x30: sensor_type = "Sharp CCD sensor + TDA8787"; break;
- case 0x3E: sensor_type = "Sharp CCD sensor + Exas 98L59"; break;
- case 0x3F: sensor_type = "Sharp CCD sensor + ADI 9804"; break;
- case 0x40: sensor_type = "UPA 1021 sensor"; break;
- case 0x100: sensor_type = "VGA sensor"; break;
- case 0x101: sensor_type = "PAL MR sensor"; break;
- default: sensor_type = "unknown type of sensor"; break;
- }
- }
- if (sensor_type != NULL)
- Info("This %s camera is equipped with a %s (%d).\n", pdev->vdev->name, sensor_type, i);
- }
- }
-
- /* Turn on camera */
- if (power_save) {
- i = pwc_camera_power(pdev, 1);
- if (i < 0)
- Info("Failed to restore power to the camera! (%d)\n", i);
- }
- /* Set LED on/off time */
- if (pwc_set_leds(pdev, led_on, led_off) < 0)
- Info("Failed to set LED on/off time.\n");
-
- /* Find our decompressor, if any */
- pdev->decompressor = pwc_find_decompressor(pdev->type);
-#if PWC_DEBUG
- Debug("Found decompressor for %d at 0x%p\n", pdev->type, pdev->decompressor);
-#endif
- pwc_construct(pdev); /* set min/max sizes correct */
-
- /* So far, so good. Allocate memory. */
- i = pwc_allocate_buffers(pdev);
- if (i < 0) {
- Trace(TRACE_OPEN, "Failed to allocate buffer memory.\n");
- up(&pdev->modlock);
- return i;
- }
-
- /* Reset buffers & parameters */
- pwc_reset_buffers(pdev);
- for (i = 0; i < default_mbufs; i++)
- pdev->image_used[i] = 0;
- pdev->vframe_count = 0;
- pdev->vframes_dumped = 0;
- pdev->vframes_error = 0;
- pdev->visoc_errors = 0;
- pdev->error_status = 0;
-#if PWC_DEBUG
- pdev->sequence = 0;
-#endif
- pwc_construct(pdev); /* set min/max sizes correct */
-
- /* Set some defaults */
- pdev->vsnapshot = 0;
-
- /* Start iso pipe for video; first try the last used video size
- (or the default one); if that fails try QCIF/10 or QSIF/10;
- it that fails too, give up.
- */
- i = pwc_set_video_mode(pdev, pwc_image_sizes[pdev->vsize].x, pwc_image_sizes[pdev->vsize].y, pdev->vframes, pdev->vcompression, 0);
- if (i) {
- Trace(TRACE_OPEN, "First attempt at set_video_mode failed.\n");
- if (pdev->type == 730 || pdev->type == 740 || pdev->type == 750)
- i = pwc_set_video_mode(pdev, pwc_image_sizes[PSZ_QSIF].x, pwc_image_sizes[PSZ_QSIF].y, 10, pdev->vcompression, 0);
- else
- i = pwc_set_video_mode(pdev, pwc_image_sizes[PSZ_QCIF].x, pwc_image_sizes[PSZ_QCIF].y, 10, pdev->vcompression, 0);
- }
- if (i) {
- Trace(TRACE_OPEN, "Second attempt at set_video_mode failed.\n");
- up(&pdev->modlock);
- return i;
- }
-
- i = pwc_isoc_init(pdev);
- if (i) {
- Trace(TRACE_OPEN, "Failed to init ISOC stuff = %d.\n", i);
- up(&pdev->modlock);
- return i;
- }
-
- pdev->vopen++;
- file->private_data = vdev;
- /* lock decompressor; this has a small race condition, since we
- could in theory unload pwcx.o between pwc_find_decompressor()
- above and this call. I doubt it's ever going to be a problem.
- */
- if (pdev->decompressor != NULL)
- pdev->decompressor->lock();
- up(&pdev->modlock);
- Trace(TRACE_OPEN, "<< video_open() returns 0.\n");
- return 0;
-}
-
-/* Note that all cleanup is done in the reverse order as in _open */
-static int pwc_video_close(struct inode *inode, struct file *file)
-{
- struct video_device *vdev = file->private_data;
- struct pwc_device *pdev;
- int i;
-
- Trace(TRACE_OPEN, ">> video_close called(vdev = 0x%p).\n", vdev);
-
- pdev = (struct pwc_device *)vdev->priv;
- if (pdev->vopen == 0)
- Info("video_close() called on closed device?\n");
-
- /* Dump statistics, but only if a reasonable amount of frames were
- processed (to prevent endless log-entries in case of snap-shot
- programs)
- */
- if (pdev->vframe_count > 20)
- Info("Closing video device: %d frames received, dumped %d frames, %d frames with errors.\n", pdev->vframe_count, pdev->vframes_dumped, pdev->vframes_error);
-
- if (pdev->decompressor != NULL) {
- pdev->decompressor->exit();
- pdev->decompressor->unlock();
- pdev->decompressor = NULL;
- }
-
- pwc_isoc_cleanup(pdev);
- pwc_free_buffers(pdev);
-
- /* Turn off LEDS and power down camera, but only when not unplugged */
- if (pdev->error_status != EPIPE) {
- /* Turn LEDs off */
- if (pwc_set_leds(pdev, 0, 0) < 0)
- Info("Failed to set LED on/off time.\n");
- if (power_save) {
- i = pwc_camera_power(pdev, 0);
- if (i < 0)
- Err("Failed to power down camera (%d)\n", i);
- }
- }
- pdev->vopen = 0;
- Trace(TRACE_OPEN, "<< video_close()\n");
- return 0;
-}
-
-/*
- * FIXME: what about two parallel reads ????
- * ANSWER: Not supported. You can't open the device more than once,
- despite what the V4L1 interface says. First, I don't see
- the need, second there's no mechanism of alerting the
- 2nd/3rd/... process of events like changing image size.
- And I don't see the point of blocking that for the
- 2nd/3rd/... process.
- In multi-threaded environments reading parallel from any
- device is tricky anyhow.
- */
-
-static ssize_t pwc_video_read(struct file *file, char __user *buf,
- size_t count, loff_t *ppos)
-{
- struct video_device *vdev = file->private_data;
- struct pwc_device *pdev;
- int noblock = file->f_flags & O_NONBLOCK;
- DECLARE_WAITQUEUE(wait, current);
- int bytes_to_read;
-
- Trace(TRACE_READ, "video_read(0x%p, %p, %zd) called.\n", vdev, buf, count);
- if (vdev == NULL)
- return -EFAULT;
- pdev = vdev->priv;
- if (pdev == NULL)
- return -EFAULT;
- if (pdev->error_status)
- return -pdev->error_status; /* Something happened, report what. */
-
- /* In case we're doing partial reads, we don't have to wait for a frame */
- if (pdev->image_read_pos == 0) {
- /* Do wait queueing according to the (doc)book */
- add_wait_queue(&pdev->frameq, &wait);
- while (pdev->full_frames == NULL) {
- /* Check for unplugged/etc. here */
- if (pdev->error_status) {
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
- return -pdev->error_status ;
- }
- if (noblock) {
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
- return -EWOULDBLOCK;
- }
- if (signal_pending(current)) {
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
- return -ERESTARTSYS;
- }
- schedule();
- set_current_state(TASK_INTERRUPTIBLE);
- }
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
-
- /* Decompress and release frame */
- if (pwc_handle_frame(pdev))
- return -EFAULT;
- }
-
- Trace(TRACE_READ, "Copying data to user space.\n");
- if (pdev->vpalette == VIDEO_PALETTE_RAW)
- bytes_to_read = pdev->frame_size;
- else
- bytes_to_read = pdev->view.size;
-
- /* copy bytes to user space; we allow for partial reads */
- if (count + pdev->image_read_pos > bytes_to_read)
- count = bytes_to_read - pdev->image_read_pos;
- if (copy_to_user(buf, pdev->image_ptr[pdev->fill_image] + pdev->image_read_pos, count))
- return -EFAULT;
- pdev->image_read_pos += count;
- if (pdev->image_read_pos >= bytes_to_read) { /* All data has been read */
- pdev->image_read_pos = 0;
- pwc_next_image(pdev);
- }
- return count;
-}
-
-static unsigned int pwc_video_poll(struct file *file, poll_table *wait)
-{
- struct video_device *vdev = file->private_data;
- struct pwc_device *pdev;
-
- if (vdev == NULL)
- return -EFAULT;
- pdev = vdev->priv;
- if (pdev == NULL)
- return -EFAULT;
-
- poll_wait(file, &pdev->frameq, wait);
- if (pdev->error_status)
- return POLLERR;
- if (pdev->full_frames != NULL) /* we have frames waiting */
- return (POLLIN | POLLRDNORM);
-
- return 0;
-}
-
-static int pwc_video_do_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, void *arg)
-{
- struct video_device *vdev = file->private_data;
- struct pwc_device *pdev;
- DECLARE_WAITQUEUE(wait, current);
-
- if (vdev == NULL)
- return -EFAULT;
- pdev = vdev->priv;
- if (pdev == NULL)
- return -EFAULT;
-
- switch (cmd) {
- /* Query cabapilities */
- case VIDIOCGCAP:
- {
- struct video_capability *caps = arg;
-
- strcpy(caps->name, vdev->name);
- caps->type = VID_TYPE_CAPTURE;
- caps->channels = 1;
- caps->audios = 1;
- caps->minwidth = pdev->view_min.x;
- caps->minheight = pdev->view_min.y;
- caps->maxwidth = pdev->view_max.x;
- caps->maxheight = pdev->view_max.y;
- break;
- }
-
- /* Channel functions (simulate 1 channel) */
- case VIDIOCGCHAN:
- {
- struct video_channel *v = arg;
-
- if (v->channel != 0)
- return -EINVAL;
- v->flags = 0;
- v->tuners = 0;
- v->type = VIDEO_TYPE_CAMERA;
- strcpy(v->name, "Webcam");
- return 0;
- }
-
- case VIDIOCSCHAN:
- {
- /* The spec says the argument is an integer, but
- the bttv driver uses a video_channel arg, which
- makes sense becasue it also has the norm flag.
- */
- struct video_channel *v = arg;
- if (v->channel != 0)
- return -EINVAL;
- return 0;
- }
-
-
- /* Picture functions; contrast etc. */
- case VIDIOCGPICT:
- {
- struct video_picture *p = arg;
- int val;
-
- val = pwc_get_brightness(pdev);
- if (val >= 0)
- p->brightness = val;
- else
- p->brightness = 0xffff;
- val = pwc_get_contrast(pdev);
- if (val >= 0)
- p->contrast = val;
- else
- p->contrast = 0xffff;
- /* Gamma, Whiteness, what's the difference? :) */
- val = pwc_get_gamma(pdev);
- if (val >= 0)
- p->whiteness = val;
- else
- p->whiteness = 0xffff;
- val = pwc_get_saturation(pdev);
- if (val >= 0)
- p->colour = val;
- else
- p->colour = 0xffff;
- p->depth = 24;
- p->palette = pdev->vpalette;
- p->hue = 0xFFFF; /* N/A */
- break;
- }
-
- case VIDIOCSPICT:
- {
- struct video_picture *p = arg;
- /*
- * FIXME: Suppose we are mid read
- ANSWER: No problem: the firmware of the camera
- can handle brightness/contrast/etc
- changes at _any_ time, and the palette
- is used exactly once in the uncompress
- routine.
- */
- pwc_set_brightness(pdev, p->brightness);
- pwc_set_contrast(pdev, p->contrast);
- pwc_set_gamma(pdev, p->whiteness);
- pwc_set_saturation(pdev, p->colour);
- if (p->palette && p->palette != pdev->vpalette) {
- switch (p->palette) {
- case VIDEO_PALETTE_YUV420P:
- case VIDEO_PALETTE_RAW:
- pdev->vpalette = p->palette;
- return pwc_try_video_mode(pdev, pdev->image.x, pdev->image.y, pdev->vframes, pdev->vcompression, pdev->vsnapshot);
- break;
- default:
- return -EINVAL;
- break;
- }
- }
- break;
- }
-
- /* Window/size parameters */
- case VIDIOCGWIN:
- {
- struct video_window *vw = arg;
-
- vw->x = 0;
- vw->y = 0;
- vw->width = pdev->view.x;
- vw->height = pdev->view.y;
- vw->chromakey = 0;
- vw->flags = (pdev->vframes << PWC_FPS_SHIFT) |
- (pdev->vsnapshot ? PWC_FPS_SNAPSHOT : 0);
- break;
- }
-
- case VIDIOCSWIN:
- {
- struct video_window *vw = arg;
- int fps, snapshot, ret;
-
- fps = (vw->flags & PWC_FPS_FRMASK) >> PWC_FPS_SHIFT;
- snapshot = vw->flags & PWC_FPS_SNAPSHOT;
- if (fps == 0)
- fps = pdev->vframes;
- if (pdev->view.x == vw->width && pdev->view.y && fps == pdev->vframes && snapshot == pdev->vsnapshot)
- return 0;
- ret = pwc_try_video_mode(pdev, vw->width, vw->height, fps, pdev->vcompression, snapshot);
- if (ret)
- return ret;
- break;
- }
-
- /* We don't have overlay support (yet) */
- case VIDIOCGFBUF:
- {
- struct video_buffer *vb = arg;
-
- memset(vb,0,sizeof(*vb));
- break;
- }
-
- /* mmap() functions */
- case VIDIOCGMBUF:
- {
- /* Tell the user program how much memory is needed for a mmap() */
- struct video_mbuf *vm = arg;
- int i;
-
- memset(vm, 0, sizeof(*vm));
- vm->size = default_mbufs * pdev->len_per_image;
- vm->frames = default_mbufs; /* double buffering should be enough for most applications */
- for (i = 0; i < default_mbufs; i++)
- vm->offsets[i] = i * pdev->len_per_image;
- break;
- }
-
- case VIDIOCMCAPTURE:
- {
- /* Start capture into a given image buffer (called 'frame' in video_mmap structure) */
- struct video_mmap *vm = arg;
-
- Trace(TRACE_READ, "VIDIOCMCAPTURE: %dx%d, frame %d, format %d\n", vm->width, vm->height, vm->frame, vm->format);
- if (vm->frame < 0 || vm->frame >= default_mbufs)
- return -EINVAL;
-
- /* xawtv is nasty. It probes the available palettes
- by setting a very small image size and trying
- various palettes... The driver doesn't support
- such small images, so I'm working around it.
- */
- if (vm->format)
- {
- switch (vm->format)
- {
- case VIDEO_PALETTE_YUV420P:
- case VIDEO_PALETTE_RAW:
- break;
- default:
- return -EINVAL;
- break;
- }
- }
-
- if ((vm->width != pdev->view.x || vm->height != pdev->view.y) &&
- (vm->width >= pdev->view_min.x && vm->height >= pdev->view_min.y)) {
- int ret;
-
- Trace(TRACE_OPEN, "VIDIOCMCAPTURE: changing size to please xawtv :-(.\n");
- ret = pwc_try_video_mode(pdev, vm->width, vm->height, pdev->vframes, pdev->vcompression, pdev->vsnapshot);
- if (ret)
- return ret;
- } /* ... size mismatch */
-
- /* FIXME: should we lock here? */
- if (pdev->image_used[vm->frame])
- return -EBUSY; /* buffer wasn't available. Bummer */
- pdev->image_used[vm->frame] = 1;
-
- /* Okay, we're done here. In the SYNC call we wait until a
- frame comes available, then expand image into the given
- buffer.
- In contrast to the CPiA cam the Philips cams deliver a
- constant stream, almost like a grabber card. Also,
- we have separate buffers for the rawdata and the image,
- meaning we can nearly always expand into the requested buffer.
- */
- Trace(TRACE_READ, "VIDIOCMCAPTURE done.\n");
- break;
- }
-
- case VIDIOCSYNC:
- {
- /* The doc says: "Whenever a buffer is used it should
- call VIDIOCSYNC to free this frame up and continue."
-
- The only odd thing about this whole procedure is
- that MCAPTURE flags the buffer as "in use", and
- SYNC immediately unmarks it, while it isn't
- after SYNC that you know that the buffer actually
- got filled! So you better not start a CAPTURE in
- the same frame immediately (use double buffering).
- This is not a problem for this cam, since it has
- extra intermediate buffers, but a hardware
- grabber card will then overwrite the buffer
- you're working on.
- */
- int *mbuf = arg;
- int ret;
-
- Trace(TRACE_READ, "VIDIOCSYNC called (%d).\n", *mbuf);
-
- /* bounds check */
- if (*mbuf < 0 || *mbuf >= default_mbufs)
- return -EINVAL;
- /* check if this buffer was requested anyway */
- if (pdev->image_used[*mbuf] == 0)
- return -EINVAL;
-
- /* Add ourselves to the frame wait-queue.
-
- FIXME: needs auditing for safety.
- QUESTION: In what respect? I think that using the
- frameq is safe now.
- */
- add_wait_queue(&pdev->frameq, &wait);
- while (pdev->full_frames == NULL) {
- if (pdev->error_status) {
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
- return -pdev->error_status;
- }
-
- if (signal_pending(current)) {
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
- return -ERESTARTSYS;
- }
- schedule();
- set_current_state(TASK_INTERRUPTIBLE);
- }
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
-
- /* The frame is ready. Expand in the image buffer
- requested by the user. I don't care if you
- mmap() 5 buffers and request data in this order:
- buffer 4 2 3 0 1 2 3 0 4 3 1 . . .
- Grabber hardware may not be so forgiving.
- */
- Trace(TRACE_READ, "VIDIOCSYNC: frame ready.\n");
- pdev->fill_image = *mbuf; /* tell in which buffer we want the image to be expanded */
- /* Decompress, etc */
- ret = pwc_handle_frame(pdev);
- pdev->image_used[*mbuf] = 0;
- if (ret)
- return -EFAULT;
- break;
- }
-
- case VIDIOCGAUDIO:
- {
- struct video_audio *v = arg;
-
- strcpy(v->name, "Microphone");
- v->audio = -1; /* unknown audio minor */
- v->flags = 0;
- v->mode = VIDEO_SOUND_MONO;
- v->volume = 0;
- v->bass = 0;
- v->treble = 0;
- v->balance = 0x8000;
- v->step = 1;
- break;
- }
-
- case VIDIOCSAUDIO:
- {
- /* Dummy: nothing can be set */
- break;
- }
-
- case VIDIOCGUNIT:
- {
- struct video_unit *vu = arg;
-
- vu->video = pdev->vdev->minor & 0x3F;
- vu->audio = -1; /* not known yet */
- vu->vbi = -1;
- vu->radio = -1;
- vu->teletext = -1;
- break;
- }
- default:
- return pwc_ioctl(pdev, cmd, arg);
- } /* ..switch */
- return 0;
-}
-
-static int pwc_video_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- return video_usercopy(inode, file, cmd, arg, pwc_video_do_ioctl);
-}
-
-
-static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma)
-{
- struct video_device *vdev = file->private_data;
- struct pwc_device *pdev;
- unsigned long start = vma->vm_start;
- unsigned long size = vma->vm_end-vma->vm_start;
- unsigned long page, pos;
-
- Trace(TRACE_MEMORY, "mmap(0x%p, 0x%lx, %lu) called.\n", vdev, start, size);
- pdev = vdev->priv;
-
- pos = (unsigned long)pdev->image_data;
- while (size > 0) {
- page = kvirt_to_pa(pos);
- if (remap_page_range(vma, start, page, PAGE_SIZE, PAGE_SHARED))
- return -EAGAIN;
-
- start += PAGE_SIZE;
- pos += PAGE_SIZE;
- if (size > PAGE_SIZE)
- size -= PAGE_SIZE;
- else
- size = 0;
- }
-
- return 0;
-}
-
-/***************************************************************************/
-/* USB functions */
-
-/* This function gets called when a new device is plugged in or the usb core
- * is loaded.
- */
-
-static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id *id)
-{
- struct usb_device *udev = interface_to_usbdev(intf);
- struct pwc_device *pdev = NULL;
- int vendor_id, product_id, type_id;
- int i, hint;
- int features = 0;
- int video_nr = -1; /* default: use next available device */
- char serial_number[30], *name;
-
- /* Check if we can handle this device */
- Trace(TRACE_PROBE, "probe() called [%04X %04X], if %d\n",
- udev->descriptor.idVendor, udev->descriptor.idProduct,
- intf->altsetting->desc.bInterfaceNumber);
-
- /* the interfaces are probed one by one. We are only interested in the
- video interface (0) now.
- Interface 1 is the Audio Control, and interface 2 Audio itself.
- */
- if (intf->altsetting->desc.bInterfaceNumber > 0)
- return -ENODEV;
-
- vendor_id = udev->descriptor.idVendor;
- product_id = udev->descriptor.idProduct;
-
- if (vendor_id == 0x0471) {
- switch (product_id) {
- case 0x0302:
- Info("Philips PCA645VC USB webcam detected.\n");
- name = "Philips 645 webcam";
- type_id = 645;
- break;
- case 0x0303:
- Info("Philips PCA646VC USB webcam detected.\n");
- name = "Philips 646 webcam";
- type_id = 646;
- break;
- case 0x0304:
- Info("Askey VC010 type 2 USB webcam detected.\n");
- name = "Askey VC010 webcam";
- type_id = 646;
- break;
- case 0x0307:
- Info("Philips PCVC675K (Vesta) USB webcam detected.\n");
- name = "Philips 675 webcam";
- type_id = 675;
- break;
- case 0x0308:
- Info("Philips PCVC680K (Vesta Pro) USB webcam detected.\n");
- name = "Philips 680 webcam";
- type_id = 680;
- break;
- case 0x030C:
- Info("Philips PCVC690K (Vesta Pro Scan) USB webcam detected.\n");
- name = "Philips 690 webcam";
- type_id = 690;
- break;
- case 0x0310:
- Info("Philips PCVC730K (ToUCam Fun)/PCVC830 (ToUCam II) USB webcam detected.\n");
- name = "Philips 730 webcam";
- type_id = 730;
- break;
- case 0x0311:
- Info("Philips PCVC740K (ToUCam Pro)/PCVC840 (ToUCam II) USB webcam detected.\n");
- name = "Philips 740 webcam";
- type_id = 740;
- break;
- case 0x0312:
- Info("Philips PCVC750K (ToUCam Pro Scan) USB webcam detected.\n");
- name = "Philips 750 webcam";
- type_id = 750;
- break;
- case 0x0313:
- Info("Philips PCVC720K/40 (ToUCam XS) USB webcam detected.\n");
- name = "Philips 720K/40 webcam";
- type_id = 720;
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x069A) {
- switch(product_id) {
- case 0x0001:
- Info("Askey VC010 type 1 USB webcam detected.\n");
- name = "Askey VC010 webcam";
- type_id = 645;
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x046d) {
- switch(product_id) {
- case 0x08b0:
- Info("Logitech QuickCam Pro 3000 USB webcam detected.\n");
- name = "Logitech QuickCam Pro 3000";
- type_id = 740; /* CCD sensor */
- break;
- case 0x08b1:
- Info("Logitech QuickCam Notebook Pro USB webcam detected.\n");
- name = "Logitech QuickCam Notebook Pro";
- type_id = 740; /* CCD sensor */
- break;
- case 0x08b2:
- Info("Logitech QuickCam 4000 Pro USB webcam detected.\n");
- name = "Logitech QuickCam Pro 4000";
- type_id = 740; /* CCD sensor */
- break;
- case 0x08b3:
- Info("Logitech QuickCam Zoom USB webcam detected.\n");
- name = "Logitech QuickCam Zoom";
- type_id = 740; /* CCD sensor */
- break;
- case 0x08B4:
- Info("Logitech QuickCam Zoom (new model) USB webcam detected.\n");
- name = "Logitech QuickCam Zoom";
- type_id = 740; /* CCD sensor */
- break;
- case 0x08b5:
- Info("Logitech QuickCam Orbit/Sphere USB webcam detected.\n");
- name = "Logitech QuickCam Orbit";
- type_id = 740; /* CCD sensor */
- features |= FEATURE_MOTOR_PANTILT;
- break;
- case 0x08b6:
- case 0x08b7:
- case 0x08b8:
- Info("Logitech QuickCam detected (reserved ID).\n");
- name = "Logitech QuickCam (res.)";
- type_id = 730; /* Assuming CMOS */
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x055d) {
- /* I don't know the difference between the C10 and the C30;
- I suppose the difference is the sensor, but both cameras
- work equally well with a type_id of 675
- */
- switch(product_id) {
- case 0x9000:
- Info("Samsung MPC-C10 USB webcam detected.\n");
- name = "Samsung MPC-C10";
- type_id = 675;
- break;
- case 0x9001:
- Info("Samsung MPC-C30 USB webcam detected.\n");
- name = "Samsung MPC-C30";
- type_id = 675;
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x041e) {
- switch(product_id) {
- case 0x400c:
- Info("Creative Labs Webcam 5 detected.\n");
- name = "Creative Labs Webcam 5";
- type_id = 730;
- break;
- case 0x4011:
- Info("Creative Labs Webcam Pro Ex detected.\n");
- name = "Creative Labs Webcam Pro Ex";
- type_id = 740;
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x04cc) {
- switch(product_id) {
- case 0x8116:
- Info("Sotec Afina Eye USB webcam detected.\n");
- name = "Sotec Afina Eye";
- type_id = 730;
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x06be) {
- switch(product_id) {
- case 0x8116:
- /* Basicly the same as the Sotec Afina Eye */
- Info("AME CU-001 USB webcam detected.\n");
- name = "AME CU-001";
- type_id = 730;
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x06be) {
- switch(product_id) {
- case 0x8116:
- /* This is essentially the same cam as the Sotec Afina Eye */
- Info("AME Co. Afina Eye USB webcam detected.\n");
- name = "AME Co. Afina Eye";
- type_id = 750;
- break;
- default:
- return -ENODEV;
- break;
- }
-
- }
- else if (vendor_id == 0x0d81) {
- switch(product_id) {
- case 0x1900:
- Info("Visionite VCS-UC300 USB webcam detected.\n");
- name = "Visionite VCS-UC300";
- type_id = 740; /* CCD sensor */
- break;
- case 0x1910:
- Info("Visionite VCS-UM100 USB webcam detected.\n");
- name = "Visionite VCS-UM100";
- type_id = 730; /* CMOS sensor */
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else
- return -ENODEV; /* Not any of the know types; but the list keeps growing. */
-
- memset(serial_number, 0, 30);
- usb_string(udev, udev->descriptor.iSerialNumber, serial_number, 29);
- Trace(TRACE_PROBE, "Device serial number is %s\n", serial_number);
-
- if (udev->descriptor.bNumConfigurations > 1)
- Info("Warning: more than 1 configuration available.\n");
-
- /* Allocate structure, initialize pointers, mutexes, etc. and link it to the usb_device */
- pdev = kmalloc(sizeof(struct pwc_device), GFP_KERNEL);
- if (pdev == NULL) {
- Err("Oops, could not allocate memory for pwc_device.\n");
- return -ENOMEM;
- }
- memset(pdev, 0, sizeof(struct pwc_device));
- pdev->type = type_id;
- pdev->vsize = default_size;
- pdev->vframes = default_fps;
- strcpy(pdev->serial, serial_number);
- pdev->features = features;
- if (vendor_id == 0x046D && product_id == 0x08B5)
- {
- /* Logitech QuickCam Orbit
- The ranges have been determined experimentally; they may differ from cam to cam.
- Also, the exact ranges left-right and up-down are different for my cam
- */
- pdev->angle_range.pan_min = -7000;
- pdev->angle_range.pan_max = 7000;
- pdev->angle_range.tilt_min = -3000;
- pdev->angle_range.tilt_max = 2500;
- }
-
- init_MUTEX(&pdev->modlock);
- pdev->ptrlock = SPIN_LOCK_UNLOCKED;
-
- pdev->udev = udev;
- init_waitqueue_head(&pdev->frameq);
- pdev->vcompression = pwc_preferred_compression;
-
- /* Allocate video_device structure */
- pdev->vdev = video_device_alloc();
- if (pdev->vdev == 0)
- {
- Err("Err, cannot allocate video_device struture. Failing probe.");
- kfree(pdev);
- return -ENOMEM;
- }
- memcpy(pdev->vdev, &pwc_template, sizeof(pwc_template));
- strcpy(pdev->vdev->name, name);
- pdev->vdev->owner = THIS_MODULE;
- video_set_drvdata(pdev->vdev, pdev);
-
- pdev->release = udev->descriptor.bcdDevice;
- Trace(TRACE_PROBE, "Release: %04x\n", pdev->release);
-
- /* Now search device_hint[] table for a match, so we can hint a node number. */
- for (hint = 0; hint < MAX_DEV_HINTS; hint++) {
- if (((device_hint[hint].type == -1) || (device_hint[hint].type == pdev->type)) &&
- (device_hint[hint].pdev == NULL)) {
- /* so far, so good... try serial number */
- if ((device_hint[hint].serial_number[0] == '*') || !strcmp(device_hint[hint].serial_number, serial_number)) {
- /* match! */
- video_nr = device_hint[hint].device_node;
- Trace(TRACE_PROBE, "Found hint, will try to register as /dev/video%d\n", video_nr);
- break;
- }
- }
- }
-
- pdev->vdev->release = video_device_release;
- i = video_register_device(pdev->vdev, VFL_TYPE_GRABBER, video_nr);
- if (i < 0) {
- Err("Failed to register as video device (%d).\n", i);
- video_device_release(pdev->vdev); /* Drip... drip... drip... */
- kfree(pdev); /* Oops, no memory leaks please */
- return -EIO;
- }
- else {
- Info("Registered as /dev/video%d.\n", pdev->vdev->minor & 0x3F);
- }
-
- /* occupy slot */
- if (hint < MAX_DEV_HINTS)
- device_hint[hint].pdev = pdev;
-
- Trace(TRACE_PROBE, "probe() function returning struct at 0x%p.\n", pdev);
- usb_set_intfdata (intf, pdev);
- return 0;
-}
-
-/* The user janked out the cable... */
-static void usb_pwc_disconnect(struct usb_interface *intf)
-{
- struct pwc_device *pdev;
- int hint;
-
- lock_kernel();
- pdev = usb_get_intfdata (intf);
- usb_set_intfdata (intf, NULL);
- if (pdev == NULL) {
- Err("pwc_disconnect() Called without private pointer.\n");
- goto disconnect_out;
- }
- if (pdev->udev == NULL) {
- Err("pwc_disconnect() already called for %p\n", pdev);
- goto disconnect_out;
- }
- if (pdev->udev != interface_to_usbdev(intf)) {
- Err("pwc_disconnect() Woops: pointer mismatch udev/pdev.\n");
- goto disconnect_out;
- }
-#ifdef PWC_MAGIC
- if (pdev->magic != PWC_MAGIC) {
- Err("pwc_disconnect() Magic number failed. Consult your scrolls and try again.\n");
- goto disconnect_out;
- }
-#endif
-
- /* We got unplugged; this is signalled by an EPIPE error code */
- if (pdev->vopen) {
- Info("Disconnected while webcam is in use!\n");
- pdev->error_status = EPIPE;
- }
-
- /* Alert waiting processes */
- wake_up_interruptible(&pdev->frameq);
- /* Wait until device is closed */
- while (pdev->vopen)
- schedule();
- /* Device is now closed, so we can safely unregister it */
- Trace(TRACE_PROBE, "Unregistering video device in disconnect().\n");
- video_unregister_device(pdev->vdev);
-
- /* Free memory (don't set pdev to 0 just yet) */
- kfree(pdev);
-
-disconnect_out:
- /* search device_hint[] table if we occupy a slot, by any chance */
- for (hint = 0; hint < MAX_DEV_HINTS; hint++)
- if (device_hint[hint].pdev == pdev)
- device_hint[hint].pdev = NULL;
-
- unlock_kernel();
-}
-
-
-/* *grunt* We have to do atoi ourselves :-( */
-static int pwc_atoi(const char *s)
-{
- int k = 0;
-
- k = 0;
- while (*s != '\0' && *s >= '0' && *s <= '9') {
- k = 10 * k + (*s - '0');
- s++;
- }
- return k;
-}
-
-
-/*
- * Initialization code & module stuff
- */
-
-static char *size = NULL;
-static int fps = 0;
-static int fbufs = 0;
-static int mbufs = 0;
-static int trace = -1;
-static int compression = -1;
-static int leds[2] = { -1, -1 };
-static char *dev_hint[MAX_DEV_HINTS] = { };
-
-MODULE_PARM(size, "s");
-MODULE_PARM_DESC(size, "Initial image size. One of sqcif, qsif, qcif, sif, cif, vga");
-MODULE_PARM(fps, "i");
-MODULE_PARM_DESC(fps, "Initial frames per second. Varies with model, useful range 5-30");
-MODULE_PARM(fbufs, "i");
-MODULE_PARM_DESC(fbufs, "Number of internal frame buffers to reserve");
-MODULE_PARM(mbufs, "i");
-MODULE_PARM_DESC(mbufs, "Number of external (mmap()ed) image buffers");
-MODULE_PARM(trace, "i");
-MODULE_PARM_DESC(trace, "For debugging purposes");
-MODULE_PARM(power_save, "i");
-MODULE_PARM_DESC(power_save, "Turn power save feature in camera on or off");
-MODULE_PARM(compression, "i");
-MODULE_PARM_DESC(compression, "Preferred compression quality. Range 0 (uncompressed) to 3 (high compression)");
-MODULE_PARM(leds, "2i");
-MODULE_PARM_DESC(leds, "LED on,off time in milliseconds");
-MODULE_PARM(dev_hint, "0-20s");
-MODULE_PARM_DESC(dev_hint, "Device node hints");
-
-MODULE_DESCRIPTION("Philips & OEM USB webcam driver");
-MODULE_AUTHOR("Nemosoft Unv. <webcam@smcc.demon.nl>");
-MODULE_LICENSE("GPL");
-
-static int __init usb_pwc_init(void)
-{
- int i, sz;
- char *sizenames[PSZ_MAX] = { "sqcif", "qsif", "qcif", "sif", "cif", "vga" };
-
- Info("Philips webcam module version " PWC_VERSION " loaded.\n");
- Info("Supports Philips PCA645/646, PCVC675/680/690, PCVC720[40]/730/740/750 & PCVC830/840.\n");
- Info("Also supports the Askey VC010, various Logitech Quickcams, Samsung MPC-C10 and MPC-C30,\n");
- Info("the Creative WebCam 5 & Pro Ex, SOTEC Afina Eye and Visionite VCS-UC300 and VCS-UM100.\n");
-
- if (fps) {
- if (fps < 4 || fps > 30) {
- Err("Framerate out of bounds (4-30).\n");
- return -EINVAL;
- }
- default_fps = fps;
- Info("Default framerate set to %d.\n", default_fps);
- }
-
- if (size) {
- /* string; try matching with array */
- for (sz = 0; sz < PSZ_MAX; sz++) {
- if (!strcmp(sizenames[sz], size)) { /* Found! */
- default_size = sz;
- break;
- }
- }
- if (sz == PSZ_MAX) {
- Err("Size not recognized; try size=[sqcif | qsif | qcif | sif | cif | vga].\n");
- return -EINVAL;
- }
- Info("Default image size set to %s [%dx%d].\n", sizenames[default_size], pwc_image_sizes[default_size].x, pwc_image_sizes[default_size].y);
- }
- if (mbufs) {
- if (mbufs < 1 || mbufs > MAX_IMAGES) {
- Err("Illegal number of mmap() buffers; use a number between 1 and %d.\n", MAX_IMAGES);
- return -EINVAL;
- }
- default_mbufs = mbufs;
- Info("Number of image buffers set to %d.\n", default_mbufs);
- }
- if (fbufs) {
- if (fbufs < 2 || fbufs > MAX_FRAMES) {
- Err("Illegal number of frame buffers; use a number between 2 and %d.\n", MAX_FRAMES);
- return -EINVAL;
- }
- default_fbufs = fbufs;
- Info("Number of frame buffers set to %d.\n", default_fbufs);
- }
- if (trace >= 0) {
- Info("Trace options: 0x%04x\n", trace);
- pwc_trace = trace;
- }
- if (compression >= 0) {
- if (compression > 3) {
- Err("Invalid compression setting; use a number between 0 (uncompressed) and 3 (high).\n");
- return -EINVAL;
- }
- pwc_preferred_compression = compression;
- Info("Preferred compression set to %d.\n", pwc_preferred_compression);
- }
- if (power_save)
- Info("Enabling power save on open/close.\n");
- if (leds[0] >= 0)
- led_on = leds[0];
- if (leds[1] >= 0)
- led_off = leds[1];
-
- /* Big device node whoopla. Basicly, it allows you to assign a
- device node (/dev/videoX) to a camera, based on its type
- & serial number. The format is [type[.serialnumber]:]node.
-
- Any camera that isn't matched by these rules gets the next
- available free device node.
- */
- for (i = 0; i < MAX_DEV_HINTS; i++) {
- char *s, *colon, *dot;
-
- /* This loop also initializes the array */
- device_hint[i].pdev = NULL;
- s = dev_hint[i];
- if (s != NULL && *s != '\0') {
- device_hint[i].type = -1; /* wildcard */
- strcpy(device_hint[i].serial_number, "*");
-
- /* parse string: chop at ':' & '/' */
- colon = dot = s;
- while (*colon != '\0' && *colon != ':')
- colon++;
- while (*dot != '\0' && *dot != '.')
- dot++;
- /* Few sanity checks */
- if (*dot != '\0' && dot > colon) {
- Err("Malformed camera hint: the colon must be after the dot.\n");
- return -EINVAL;
- }
-
- if (*colon == '\0') {
- /* No colon */
- if (*dot != '\0') {
- Err("Malformed camera hint: no colon + device node given.\n");
- return -EINVAL;
- }
- else {
- /* No type or serial number specified, just a number. */
- device_hint[i].device_node = pwc_atoi(s);
- }
- }
- else {
- /* There's a colon, so we have at least a type and a device node */
- device_hint[i].type = pwc_atoi(s);
- device_hint[i].device_node = pwc_atoi(colon + 1);
- if (*dot != '\0') {
- /* There's a serial number as well */
- int k;
-
- dot++;
- k = 0;
- while (*dot != ':' && k < 29) {
- device_hint[i].serial_number[k++] = *dot;
- dot++;
- }
- device_hint[i].serial_number[k] = '\0';
- }
- }
-#if PWC_DEBUG
- Debug("device_hint[%d]:\n", i);
- Debug(" type : %d\n", device_hint[i].type);
- Debug(" serial# : %s\n", device_hint[i].serial_number);
- Debug(" node : %d\n", device_hint[i].device_node);
-#endif
- }
- else
- device_hint[i].type = 0; /* not filled */
- } /* ..for MAX_DEV_HINTS */
-
- Trace(TRACE_PROBE, "Registering driver at address 0x%p.\n", &pwc_driver);
- return usb_register(&pwc_driver);
-}
-
-static void __exit usb_pwc_exit(void)
-{
- Trace(TRACE_MODULE, "Deregistering driver.\n");
- usb_deregister(&pwc_driver);
- Info("Philips webcam module removed.\n");
-}
-
-module_init(usb_pwc_init);
-module_exit(usb_pwc_exit);
-
+++ /dev/null
-#ifndef PWC_IOCTL_H
-#define PWC_IOCTL_H
-
-/* (C) 2001-2004 Nemosoft Unv. webcam@smcc.demon.nl
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-/* This is pwc-ioctl.h belonging to PWC 8.12.1
- It contains structures and defines to communicate from user space
- directly to the driver.
- */
-
-/*
- Changes
- 2001/08/03 Alvarado Added ioctl constants to access methods for
- changing white balance and red/blue gains
- 2002/12/15 G. H. Fernandez-Toribio VIDIOCGREALSIZE
- 2003/12/13 Nemosft Unv. Some modifications to make interfacing to
- PWCX easier
- */
-
-/* These are private ioctl() commands, specific for the Philips webcams.
- They contain functions not found in other webcams, and settings not
- specified in the Video4Linux API.
-
- The #define names are built up like follows:
- VIDIOC VIDeo IOCtl prefix
- PWC Philps WebCam
- G optional: Get
- S optional: Set
- ... the function
- */
-
-
- /* Enumeration of image sizes */
-#define PSZ_SQCIF 0x00
-#define PSZ_QSIF 0x01
-#define PSZ_QCIF 0x02
-#define PSZ_SIF 0x03
-#define PSZ_CIF 0x04
-#define PSZ_VGA 0x05
-#define PSZ_MAX 6
-
-
-/* The frame rate is encoded in the video_window.flags parameter using
- the upper 16 bits, since some flags are defined nowadays. The following
- defines provide a mask and shift to filter out this value.
-
- In 'Snapshot' mode the camera freezes its automatic exposure and colour
- balance controls.
- */
-#define PWC_FPS_SHIFT 16
-#define PWC_FPS_MASK 0x00FF0000
-#define PWC_FPS_FRMASK 0x003F0000
-#define PWC_FPS_SNAPSHOT 0x00400000
-
-
-/* structure for transfering x & y coordinates */
-struct pwc_coord
-{
- int x, y; /* guess what */
- int size; /* size, or offset */
-};
-
-
-/* Used with VIDIOCPWCPROBE */
-struct pwc_probe
-{
- char name[32];
- int type;
-};
-
-struct pwc_serial
-{
- char serial[30]; /* String with serial number. Contains terminating 0 */
-};
-
-/* pwc_whitebalance.mode values */
-#define PWC_WB_INDOOR 0
-#define PWC_WB_OUTDOOR 1
-#define PWC_WB_FL 2
-#define PWC_WB_MANUAL 3
-#define PWC_WB_AUTO 4
-
-/* Used with VIDIOCPWC[SG]AWB (Auto White Balance).
- Set mode to one of the PWC_WB_* values above.
- *red and *blue are the respective gains of these colour components inside
- the camera; range 0..65535
- When 'mode' == PWC_WB_MANUAL, 'manual_red' and 'manual_blue' are set or read;
- otherwise undefined.
- 'read_red' and 'read_blue' are read-only.
-*/
-struct pwc_whitebalance
-{
- int mode;
- int manual_red, manual_blue; /* R/W */
- int read_red, read_blue; /* R/O */
-};
-
-/*
- 'control_speed' and 'control_delay' are used in automatic whitebalance mode,
- and tell the camera how fast it should react to changes in lighting, and
- with how much delay. Valid values are 0..65535.
-*/
-struct pwc_wb_speed
-{
- int control_speed;
- int control_delay;
-
-};
-
-/* Used with VIDIOCPWC[SG]LED */
-struct pwc_leds
-{
- int led_on; /* Led on-time; range = 0..25000 */
- int led_off; /* Led off-time; range = 0..25000 */
-};
-
-/* Image size (used with GREALSIZE) */
-struct pwc_imagesize
-{
- int width;
- int height;
-};
-
-/* Defines and structures for Motorized Pan & Tilt */
-#define PWC_MPT_PAN 0x01
-#define PWC_MPT_TILT 0x02
-#define PWC_MPT_TIMEOUT 0x04 /* for status */
-
-/* Set angles; when absolute != 0, the angle is absolute and the
- driver calculates the relative offset for you. This can only
- be used with VIDIOCPWCSANGLE; VIDIOCPWCGANGLE always returns
- absolute angles.
- */
-struct pwc_mpt_angles
-{
- int absolute; /* write-only */
- int pan; /* degrees * 100 */
- int tilt; /* degress * 100 */
-};
-
-/* Range of angles of the camera, both horizontally and vertically.
- */
-struct pwc_mpt_range
-{
- int pan_min, pan_max; /* degrees * 100 */
- int tilt_min, tilt_max;
-};
-
-struct pwc_mpt_status
-{
- int status;
- int time_pan;
- int time_tilt;
-};
-
-
-/* This is used for out-of-kernel decompression. With it, you can get
- all the necessary information to initialize and use the decompressor
- routines in standalone applications.
- */
-struct pwc_video_command
-{
- int type; /* camera type (645, 675, 730, etc.) */
- int release; /* release number */
-
- int size; /* one of PSZ_* */
- int alternate;
- int command_len; /* length of USB video command */
- unsigned char command_buf[13]; /* Actual USB video command */
- int bandlength; /* >0 = compressed */
- int frame_size; /* Size of one (un)compressed frame */
-};
-
-/* Flags for PWCX subroutines. Not all modules honour all flags. */
-#define PWCX_FLAG_PLANAR 0x0001
-#define PWCX_FLAG_BAYER 0x0008
-
-
-/* IOCTL definitions */
-
- /* Restore user settings */
-#define VIDIOCPWCRUSER _IO('v', 192)
- /* Save user settings */
-#define VIDIOCPWCSUSER _IO('v', 193)
- /* Restore factory settings */
-#define VIDIOCPWCFACTORY _IO('v', 194)
-
- /* You can manipulate the compression factor. A compression preference of 0
- means use uncompressed modes when available; 1 is low compression, 2 is
- medium and 3 is high compression preferred. Of course, the higher the
- compression, the lower the bandwidth used but more chance of artefacts
- in the image. The driver automatically chooses a higher compression when
- the preferred mode is not available.
- */
- /* Set preferred compression quality (0 = uncompressed, 3 = highest compression) */
-#define VIDIOCPWCSCQUAL _IOW('v', 195, int)
- /* Get preferred compression quality */
-#define VIDIOCPWCGCQUAL _IOR('v', 195, int)
-
-
-/* Retrieve serial number of camera */
-#define VIDIOCPWCGSERIAL _IOR('v', 198, struct pwc_serial)
-
- /* This is a probe function; since so many devices are supported, it
- becomes difficult to include all the names in programs that want to
- check for the enhanced Philips stuff. So in stead, try this PROBE;
- it returns a structure with the original name, and the corresponding
- Philips type.
- To use, fill the structure with zeroes, call PROBE and if that succeeds,
- compare the name with that returned from VIDIOCGCAP; they should be the
- same. If so, you can be assured it is a Philips (OEM) cam and the type
- is valid.
- */
-#define VIDIOCPWCPROBE _IOR('v', 199, struct pwc_probe)
-
- /* Set AGC (Automatic Gain Control); int < 0 = auto, 0..65535 = fixed */
-#define VIDIOCPWCSAGC _IOW('v', 200, int)
- /* Get AGC; int < 0 = auto; >= 0 = fixed, range 0..65535 */
-#define VIDIOCPWCGAGC _IOR('v', 200, int)
- /* Set shutter speed; int < 0 = auto; >= 0 = fixed, range 0..65535 */
-#define VIDIOCPWCSSHUTTER _IOW('v', 201, int)
-
- /* Color compensation (Auto White Balance) */
-#define VIDIOCPWCSAWB _IOW('v', 202, struct pwc_whitebalance)
-#define VIDIOCPWCGAWB _IOR('v', 202, struct pwc_whitebalance)
-
- /* Auto WB speed */
-#define VIDIOCPWCSAWBSPEED _IOW('v', 203, struct pwc_wb_speed)
-#define VIDIOCPWCGAWBSPEED _IOR('v', 203, struct pwc_wb_speed)
-
- /* LEDs on/off/blink; int range 0..65535 */
-#define VIDIOCPWCSLED _IOW('v', 205, struct pwc_leds)
-#define VIDIOCPWCGLED _IOR('v', 205, struct pwc_leds)
-
- /* Contour (sharpness); int < 0 = auto, 0..65536 = fixed */
-#define VIDIOCPWCSCONTOUR _IOW('v', 206, int)
-#define VIDIOCPWCGCONTOUR _IOR('v', 206, int)
-
- /* Backlight compensation; 0 = off, otherwise on */
-#define VIDIOCPWCSBACKLIGHT _IOW('v', 207, int)
-#define VIDIOCPWCGBACKLIGHT _IOR('v', 207, int)
-
- /* Flickerless mode; = 0 off, otherwise on */
-#define VIDIOCPWCSFLICKER _IOW('v', 208, int)
-#define VIDIOCPWCGFLICKER _IOR('v', 208, int)
-
- /* Dynamic noise reduction; 0 off, 3 = high noise reduction */
-#define VIDIOCPWCSDYNNOISE _IOW('v', 209, int)
-#define VIDIOCPWCGDYNNOISE _IOR('v', 209, int)
-
- /* Real image size as used by the camera; tells you whether or not there's a gray border around the image */
-#define VIDIOCPWCGREALSIZE _IOR('v', 210, struct pwc_imagesize)
-
- /* Motorized pan & tilt functions */
-#define VIDIOCPWCMPTRESET _IOW('v', 211, int)
-#define VIDIOCPWCMPTGRANGE _IOR('v', 211, struct pwc_mpt_range)
-#define VIDIOCPWCMPTSANGLE _IOW('v', 212, struct pwc_mpt_angles)
-#define VIDIOCPWCMPTGANGLE _IOR('v', 212, struct pwc_mpt_angles)
-#define VIDIOCPWCMPTSTATUS _IOR('v', 213, struct pwc_mpt_status)
-
- /* Get the USB set-video command; needed for initializing libpwcx */
-#define VIDIOCPWCGVIDCMD _IOR('v', 215, struct pwc_video_command)
-
-#endif
+++ /dev/null
-/* Linux driver for Philips webcam
- Various miscellaneous functions and tables.
- (C) 1999-2003 Nemosoft Unv. (webcam@smcc.demon.nl)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#include <linux/slab.h>
-
-#include "pwc.h"
-
-struct pwc_coord pwc_image_sizes[PSZ_MAX] =
-{
- { 128, 96, 0 },
- { 160, 120, 0 },
- { 176, 144, 0 },
- { 320, 240, 0 },
- { 352, 288, 0 },
- { 640, 480, 0 },
-};
-
-/* x,y -> PSZ_ */
-int pwc_decode_size(struct pwc_device *pdev, int width, int height)
-{
- int i, find;
-
- /* Make sure we don't go beyond our max size.
- NB: we have different limits for RAW and normal modes. In case
- you don't have the decompressor loaded or use RAW mode,
- the maximum viewable size is smaller.
- */
- if (pdev->vpalette == VIDEO_PALETTE_RAW)
- {
- if (width > pdev->abs_max.x || height > pdev->abs_max.y)
- {
- Debug("VIDEO_PALETTE_RAW: going beyond abs_max.\n");
- return -1;
- }
- }
- else
- {
- if (width > pdev->view_max.x || height > pdev->view_max.y)
- {
- Debug("VIDEO_PALETTE_ not RAW: going beyond view_max.\n");
- return -1;
- }
- }
-
- /* Find the largest size supported by the camera that fits into the
- requested size.
- */
- find = -1;
- for (i = 0; i < PSZ_MAX; i++) {
- if (pdev->image_mask & (1 << i)) {
- if (pwc_image_sizes[i].x <= width && pwc_image_sizes[i].y <= height)
- find = i;
- }
- }
- return find;
-}
-
-/* initialize variables depending on type and decompressor*/
-void pwc_construct(struct pwc_device *pdev)
-{
- switch(pdev->type) {
- case 645:
- case 646:
- pdev->view_min.x = 128;
- pdev->view_min.y = 96;
- pdev->view_max.x = 352;
- pdev->view_max.y = 288;
- pdev->abs_max.x = 352;
- pdev->abs_max.y = 288;
- pdev->image_mask = 1 << PSZ_SQCIF | 1 << PSZ_QCIF | 1 << PSZ_CIF;
- pdev->vcinterface = 2;
- pdev->vendpoint = 4;
- pdev->frame_header_size = 0;
- pdev->frame_trailer_size = 0;
- break;
- case 675:
- case 680:
- case 690:
- pdev->view_min.x = 128;
- pdev->view_min.y = 96;
- /* Anthill bug #38: PWC always reports max size, even without PWCX */
- if (pdev->decompressor != NULL) {
- pdev->view_max.x = 640;
- pdev->view_max.y = 480;
- }
- else {
- pdev->view_max.x = 352;
- pdev->view_max.y = 288;
- }
- pdev->image_mask = 1 << PSZ_SQCIF | 1 << PSZ_QSIF | 1 << PSZ_QCIF | 1 << PSZ_SIF | 1 << PSZ_CIF | 1 << PSZ_VGA;
- pdev->abs_max.x = 640;
- pdev->abs_max.y = 480;
- pdev->vcinterface = 3;
- pdev->vendpoint = 4;
- pdev->frame_header_size = 0;
- pdev->frame_trailer_size = 0;
- break;
- case 720:
- case 730:
- case 740:
- case 750:
- pdev->view_min.x = 160;
- pdev->view_min.y = 120;
- /* Anthill bug #38: PWC always reports max size, even without PWCX */
- if (pdev->decompressor != NULL) {
- pdev->view_max.x = 640;
- pdev->view_max.y = 480;
- }
- else {
- /* We use CIF, not SIF since some tools really need CIF. So we cheat a bit. */
- pdev->view_max.x = 352;
- pdev->view_max.y = 288;
- }
- pdev->image_mask = 1 << PSZ_QSIF | 1 << PSZ_SIF | 1 << PSZ_VGA;
- pdev->abs_max.x = 640;
- pdev->abs_max.y = 480;
- pdev->vcinterface = 3;
- pdev->vendpoint = 5;
- pdev->frame_header_size = TOUCAM_HEADER_SIZE;
- pdev->frame_trailer_size = TOUCAM_TRAILER_SIZE;
- break;
- }
- pdev->vpalette = VIDEO_PALETTE_YUV420P; /* default */
- pdev->view_min.size = pdev->view_min.x * pdev->view_min.y;
- pdev->view_max.size = pdev->view_max.x * pdev->view_max.y;
- /* length of image, in YUV format; always allocate enough memory. */
- pdev->len_per_image = (pdev->abs_max.x * pdev->abs_max.y * 3) / 2;
-}
-
-
+++ /dev/null
-/* Linux driver for Philips webcam
- Decompression frontend.
- (C) 1999-2003 Nemosoft Unv. (webcam@smcc.demon.nl)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-/*
- This is where the decompression routines register and unregister
- themselves. It also has a decompressor wrapper function.
-*/
-
-#include <asm/current.h>
-#include <asm/types.h>
-// #include <linux/sched.h>
-
-#include "pwc.h"
-#include "pwc-uncompress.h"
-
-
-/* This contains a list of all registered decompressors */
-static LIST_HEAD(pwc_decompressor_list);
-
-/* Should the pwc_decompress structure ever change, we increase the
- version number so that we don't get nasty surprises, or can
- dynamically adjust our structure.
- */
-const int pwc_decompressor_version = PWC_MAJOR;
-
-/* Add decompressor to list, ignoring duplicates */
-void pwc_register_decompressor(struct pwc_decompressor *pwcd)
-{
- if (pwc_find_decompressor(pwcd->type) == NULL) {
- Trace(TRACE_PWCX, "Adding decompressor for model %d.\n", pwcd->type);
- list_add_tail(&pwcd->pwcd_list, &pwc_decompressor_list);
- }
-}
-
-/* Remove decompressor from list */
-void pwc_unregister_decompressor(int type)
-{
- struct pwc_decompressor *find;
-
- find = pwc_find_decompressor(type);
- if (find != NULL) {
- Trace(TRACE_PWCX, "Removing decompressor for model %d.\n", type);
- list_del(&find->pwcd_list);
- }
-}
-
-/* Find decompressor in list */
-struct pwc_decompressor *pwc_find_decompressor(int type)
-{
- struct list_head *tmp;
- struct pwc_decompressor *pwcd;
-
- list_for_each(tmp, &pwc_decompressor_list) {
- pwcd = list_entry(tmp, struct pwc_decompressor, pwcd_list);
- if (pwcd->type == type)
- return pwcd;
- }
- return NULL;
-}
-
-
-
-int pwc_decompress(struct pwc_device *pdev)
-{
- struct pwc_frame_buf *fbuf;
- int n, line, col, stride;
- void *yuv, *image;
- u16 *src;
- u16 *dsty, *dstu, *dstv;
-
- if (pdev == NULL)
- return -EFAULT;
-#if defined(__KERNEL__) && defined(PWC_MAGIC)
- if (pdev->magic != PWC_MAGIC) {
- Err("pwc_decompress(): magic failed.\n");
- return -EFAULT;
- }
-#endif
-
- fbuf = pdev->read_frame;
- if (fbuf == NULL)
- return -EFAULT;
- image = pdev->image_ptr[pdev->fill_image];
- if (!image)
- return -EFAULT;
-
- yuv = fbuf->data + pdev->frame_header_size; /* Skip header */
-
- /* Raw format; that's easy... */
- if (pdev->vpalette == VIDEO_PALETTE_RAW)
- {
- memcpy(image, yuv, pdev->frame_size);
- return 0;
- }
-
- if (pdev->vbandlength == 0) {
- /* Uncompressed mode. We copy the data into the output buffer,
- using the viewport size (which may be larger than the image
- size). Unfortunately we have to do a bit of byte stuffing
- to get the desired output format/size.
- */
- /*
- * We do some byte shuffling here to go from the
- * native format to YUV420P.
- */
- src = (u16 *)yuv;
- n = pdev->view.x * pdev->view.y;
-
- /* offset in Y plane */
- stride = pdev->view.x * pdev->offset.y + pdev->offset.x;
- dsty = (u16 *)(image + stride);
-
- /* offsets in U/V planes */
- stride = pdev->view.x * pdev->offset.y / 4 + pdev->offset.x / 2;
- dstu = (u16 *)(image + n + stride);
- dstv = (u16 *)(image + n + n / 4 + stride);
-
- /* increment after each line */
- stride = (pdev->view.x - pdev->image.x) / 2; /* u16 is 2 bytes */
-
- for (line = 0; line < pdev->image.y; line++) {
- for (col = 0; col < pdev->image.x; col += 4) {
- *dsty++ = *src++;
- *dsty++ = *src++;
- if (line & 1)
- *dstv++ = *src++;
- else
- *dstu++ = *src++;
- }
- dsty += stride;
- if (line & 1)
- dstv += (stride >> 1);
- else
- dstu += (stride >> 1);
- }
- }
- else {
- /* Compressed; the decompressor routines will write the data
- in planar format immediately.
- */
- int flags;
-
- flags = PWCX_FLAG_PLANAR;
- if (pdev->vsize == PSZ_VGA && pdev->vframes == 5 && pdev->vsnapshot)
- flags |= PWCX_FLAG_BAYER;
-
- if (pdev->decompressor)
- pdev->decompressor->decompress(
- &pdev->image, &pdev->view, &pdev->offset,
- yuv, image,
- flags,
- pdev->decompress_data, pdev->vbandlength);
- else
- return -ENXIO; /* No such device or address: missing decompressor */
- }
- return 0;
-}
-
-/* Make sure these functions are available for the decompressor plugin
- both when this code is compiled into the kernel or as as module.
- */
-
-EXPORT_SYMBOL_NOVERS(pwc_decompressor_version);
-EXPORT_SYMBOL(pwc_register_decompressor);
-EXPORT_SYMBOL(pwc_unregister_decompressor);
+++ /dev/null
-/* (C) 1999-2003 Nemosoft Unv. (webcam@smcc.demon.nl)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-/* This file is the bridge between the kernel module and the plugin; it
- describes the structures and datatypes used in both modules. Any
- significant change should be reflected by increasing the
- pwc_decompressor_version major number.
- */
-#ifndef PWC_UNCOMPRESS_H
-#define PWC_UNCOMPRESS_H
-
-#include <linux/config.h>
-#include <linux/linkage.h>
-#include <linux/list.h>
-
-#include "pwc-ioctl.h"
-
-/* from pwc-dec.h */
-#define PWCX_FLAG_PLANAR 0x0001
-/* */
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* The decompressor structure.
- Every type of decompressor registers itself with the main module.
- When a device is opened, it looks up the correct compressor, and
- uses that when a compressed video mode is requested.
- */
-struct pwc_decompressor
-{
- int type; /* type of camera (645, 680, etc) */
- int table_size; /* memory needed */
-
- void (* init)(int type, int release, void *buffer, void *table); /* Initialization routine; should be called after each set_video_mode */
- void (* exit)(void); /* Cleanup routine */
- void (* decompress)(struct pwc_coord *image, struct pwc_coord *view,
- struct pwc_coord *offset,
- void *src, void *dst, int flags,
- void *table, int bandlength);
- void (* lock)(void); /* make sure module cannot be unloaded */
- void (* unlock)(void); /* release lock on module */
-
- struct list_head pwcd_list;
-};
-
-
-/* Our structure version number. Is set to the version number major */
-extern const int pwc_decompressor_version;
-
-/* Adds decompressor to list, based on its 'type' field (which matches the 'type' field in pwc_device; ignores any double requests */
-extern void pwc_register_decompressor(struct pwc_decompressor *pwcd);
-/* Removes decompressor, based on the type number */
-extern void pwc_unregister_decompressor(int type);
-/* Returns pointer to decompressor struct, or NULL if it doesn't exist */
-extern struct pwc_decompressor *pwc_find_decompressor(int type);
-
-#ifdef CONFIG_USB_PWCX
-/* If the decompressor is compiled in, we must call these manually */
-extern int usb_pwcx_init(void);
-extern void usb_pwcx_exit(void);
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
+++ /dev/null
-/* (C) 1999-2003 Nemosoft Unv. (webcam@smcc.demon.nl)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#ifndef PWC_H
-#define PWC_H
-
-#include <linux/version.h>
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/usb.h>
-#include <linux/spinlock.h>
-#include <linux/videodev.h>
-#include <linux/wait.h>
-#include <linux/smp_lock.h>
-#include <asm/semaphore.h>
-#include <asm/errno.h>
-
-#include "pwc-uncompress.h"
-#include "pwc-ioctl.h"
-
-/* Defines and structures for the Philips webcam */
-/* Used for checking memory corruption/pointer validation */
-#define PWC_MAGIC 0x89DC10ABUL
-#undef PWC_MAGIC
-
-/* Turn some debugging options on/off */
-#define PWC_DEBUG 0
-
-/* Trace certain actions in the driver */
-#define TRACE_MODULE 0x0001
-#define TRACE_PROBE 0x0002
-#define TRACE_OPEN 0x0004
-#define TRACE_READ 0x0008
-#define TRACE_MEMORY 0x0010
-#define TRACE_FLOW 0x0020
-#define TRACE_SIZE 0x0040
-#define TRACE_PWCX 0x0080
-#define TRACE_SEQUENCE 0x1000
-
-#define Trace(R, A...) if (pwc_trace & R) printk(KERN_DEBUG PWC_NAME " " A)
-#define Debug(A...) printk(KERN_DEBUG PWC_NAME " " A)
-#define Info(A...) printk(KERN_INFO PWC_NAME " " A)
-#define Err(A...) printk(KERN_ERR PWC_NAME " " A)
-
-
-/* Defines for ToUCam cameras */
-#define TOUCAM_HEADER_SIZE 8
-#define TOUCAM_TRAILER_SIZE 4
-
-#define FEATURE_MOTOR_PANTILT 0x0001
-
-/* Version block */
-#define PWC_MAJOR 9
-#define PWC_MINOR 0
-#define PWC_VERSION "9.0.1"
-#define PWC_NAME "pwc"
-
-/* Turn certain features on/off */
-#define PWC_INT_PIPE 0
-
-/* Ignore errors in the first N frames, to allow for startup delays */
-#define FRAME_LOWMARK 5
-
-/* Size and number of buffers for the ISO pipe. */
-#define MAX_ISO_BUFS 2
-#define ISO_FRAMES_PER_DESC 10
-#define ISO_MAX_FRAME_SIZE 960
-#define ISO_BUFFER_SIZE (ISO_FRAMES_PER_DESC * ISO_MAX_FRAME_SIZE)
-
-/* Frame buffers: contains compressed or uncompressed video data. */
-#define MAX_FRAMES 5
-/* Maximum size after decompression is 640x480 YUV data, 1.5 * 640 * 480 */
-#define PWC_FRAME_SIZE (460800 + TOUCAM_HEADER_SIZE + TOUCAM_TRAILER_SIZE)
-
-/* Absolute maximum number of buffers available for mmap() */
-#define MAX_IMAGES 10
-
-/* The following structures were based on cpia.h. Why reinvent the wheel? :-) */
-struct pwc_iso_buf
-{
- void *data;
- int length;
- int read;
- struct urb *urb;
-};
-
-/* intermediate buffers with raw data from the USB cam */
-struct pwc_frame_buf
-{
- void *data;
- volatile int filled; /* number of bytes filled */
- struct pwc_frame_buf *next; /* list */
-#if PWC_DEBUG
- int sequence; /* Sequence number */
-#endif
-};
-
-struct pwc_device
-{
- struct video_device *vdev;
-#ifdef PWC_MAGIC
- int magic;
-#endif
- /* Pointer to our usb_device */
- struct usb_device *udev;
-
- int type; /* type of cam (645, 646, 675, 680, 690, 720, 730, 740, 750) */
- int release; /* release number */
- int features; /* feature bits */
- char serial[30]; /* serial number (string) */
- int error_status; /* set when something goes wrong with the cam (unplugged, USB errors) */
- int usb_init; /* set when the cam has been initialized over USB */
-
- /*** Video data ***/
- int vopen; /* flag */
- int vendpoint; /* video isoc endpoint */
- int vcinterface; /* video control interface */
- int valternate; /* alternate interface needed */
- int vframes, vsize; /* frames-per-second & size (see PSZ_*) */
- int vpalette; /* palette: 420P, RAW or RGBBAYER */
- int vframe_count; /* received frames */
- int vframes_dumped; /* counter for dumped frames */
- int vframes_error; /* frames received in error */
- int vmax_packet_size; /* USB maxpacket size */
- int vlast_packet_size; /* for frame synchronisation */
- int visoc_errors; /* number of contiguous ISOC errors */
- int vcompression; /* desired compression factor */
- int vbandlength; /* compressed band length; 0 is uncompressed */
- char vsnapshot; /* snapshot mode */
- char vsync; /* used by isoc handler */
- char vmirror; /* for ToUCaM series */
-
- int cmd_len;
- unsigned char cmd_buf[13];
-
- /* The image acquisition requires 3 to 4 steps:
- 1. data is gathered in short packets from the USB controller
- 2. data is synchronized and packed into a frame buffer
- 3a. in case data is compressed, decompress it directly into image buffer
- 3b. in case data is uncompressed, copy into image buffer with viewport
- 4. data is transferred to the user process
-
- Note that MAX_ISO_BUFS != MAX_FRAMES != MAX_IMAGES....
- We have in effect a back-to-back-double-buffer system.
- */
- /* 1: isoc */
- struct pwc_iso_buf sbuf[MAX_ISO_BUFS];
- char iso_init;
-
- /* 2: frame */
- struct pwc_frame_buf *fbuf; /* all frames */
- struct pwc_frame_buf *empty_frames, *empty_frames_tail; /* all empty frames */
- struct pwc_frame_buf *full_frames, *full_frames_tail; /* all filled frames */
- struct pwc_frame_buf *fill_frame; /* frame currently being filled */
- struct pwc_frame_buf *read_frame; /* frame currently read by user process */
- int frame_header_size, frame_trailer_size;
- int frame_size;
- int frame_total_size; /* including header & trailer */
- int drop_frames;
-#if PWC_DEBUG
- int sequence; /* Debugging aid */
-#endif
-
- /* 3: decompression */
- struct pwc_decompressor *decompressor; /* function block with decompression routines */
- void *decompress_data; /* private data for decompression engine */
-
- /* 4: image */
- /* We have an 'image' and a 'view', where 'image' is the fixed-size image
- as delivered by the camera, and 'view' is the size requested by the
- program. The camera image is centered in this viewport, laced with
- a gray or black border. view_min <= image <= view <= view_max;
- */
- int image_mask; /* bitmask of supported sizes */
- struct pwc_coord view_min, view_max; /* minimum and maximum viewable sizes */
- struct pwc_coord abs_max; /* maximum supported size with compression */
- struct pwc_coord image, view; /* image and viewport size */
- struct pwc_coord offset; /* offset within the viewport */
-
- void *image_data; /* total buffer, which is subdivided into ... */
- void *image_ptr[MAX_IMAGES]; /* ...several images... */
- int fill_image; /* ...which are rotated. */
- int len_per_image; /* length per image */
- int image_read_pos; /* In case we read data in pieces, keep track of were we are in the imagebuffer */
- int image_used[MAX_IMAGES]; /* For MCAPTURE and SYNC */
-
- struct semaphore modlock; /* to prevent races in video_open(), etc */
- spinlock_t ptrlock; /* for manipulating the buffer pointers */
-
- /*** motorized pan/tilt feature */
- struct pwc_mpt_range angle_range;
- int pan_angle; /* in degrees * 100 */
- int tilt_angle; /* absolute angle; 0,0 is home position */
-
- /*** Misc. data ***/
- wait_queue_head_t frameq; /* When waiting for a frame to finish... */
-#if PWC_INT_PIPE
- void *usb_int_handler; /* for the interrupt endpoint */
-#endif
-};
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Global variables */
-extern int pwc_trace;
-extern int pwc_preferred_compression;
-
-/** functions in pwc-if.c */
-int pwc_try_video_mode(struct pwc_device *pdev, int width, int height, int new_fps, int new_compression, int new_snapshot);
-
-/** Functions in pwc-misc.c */
-/* sizes in pixels */
-extern struct pwc_coord pwc_image_sizes[PSZ_MAX];
-
-int pwc_decode_size(struct pwc_device *pdev, int width, int height);
-void pwc_construct(struct pwc_device *pdev);
-
-/** Functions in pwc-ctrl.c */
-/* Request a certain video mode. Returns < 0 if not possible */
-extern int pwc_set_video_mode(struct pwc_device *pdev, int width, int height, int frames, int compression, int snapshot);
-/* Calculate the number of bytes per image (not frame) */
-extern void pwc_set_image_buffer_size(struct pwc_device *pdev);
-
-/* Various controls; should be obvious. Value 0..65535, or < 0 on error */
-extern int pwc_get_brightness(struct pwc_device *pdev);
-extern int pwc_set_brightness(struct pwc_device *pdev, int value);
-extern int pwc_get_contrast(struct pwc_device *pdev);
-extern int pwc_set_contrast(struct pwc_device *pdev, int value);
-extern int pwc_get_gamma(struct pwc_device *pdev);
-extern int pwc_set_gamma(struct pwc_device *pdev, int value);
-extern int pwc_get_saturation(struct pwc_device *pdev);
-extern int pwc_set_saturation(struct pwc_device *pdev, int value);
-extern int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value);
-extern int pwc_get_leds(struct pwc_device *pdev, int *on_value, int *off_value);
-extern int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor);
-
-/* Power down or up the camera; not supported by all models */
-extern int pwc_camera_power(struct pwc_device *pdev, int power);
-
-/* Private ioctl()s; see pwc-ioctl.h */
-extern int pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg);
-
-
-/** pwc-uncompress.c */
-/* Expand frame to image, possibly including decompression. Uses read_frame and fill_image */
-extern int pwc_decompress(struct pwc_device *pdev);
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif
+++ /dev/null
-ifneq ($(KERNELRELEASE),)
-
-pwc-objs := pwc-if.o pwc-misc.o pwc-ctrl.o pwc-uncompress.o pwc-dec1.o pwc-dec23.o pwc-kiara.o pwc-timon.o
-
-obj-m += pwc.o
-
-else
-
-KDIR := /lib/modules/$(shell uname -r)/build
-PWD := $(shell pwd)
-
-default:
- $(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules
-
-endif
-
-clean:
- rm -f *.[oas] .*.flags *.ko .*.cmd .*.d .*.tmp *.mod.c
- rm -rf .tmp_versions
-
+++ /dev/null
-/* Driver for Philips webcam
- Functions that send various control messages to the webcam, including
- video modes.
- (C) 1999-2003 Nemosoft Unv.
- (C) 2004 Luc Saillard (luc@saillard.org)
-
- NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
- driver and thus may have bugs that are not present in the original version.
- Please send bug reports and support requests to <luc@saillard.org>.
-
- NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
- driver and thus may have bugs that are not present in the original version.
- Please send bug reports and support requests to <luc@saillard.org>.
- The decompression routines have been implemented by reverse-engineering the
- Nemosoft binary pwcx module. Caveat emptor.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-/*
- Changes
- 2001/08/03 Alvarado Added methods for changing white balance and
- red/green gains
- */
-
-/* Control functions for the cam; brightness, contrast, video mode, etc. */
-
-#ifdef __KERNEL__
-#include <asm/uaccess.h>
-#endif
-#include <asm/errno.h>
-#include <linux/version.h>
-
-#include "pwc.h"
-#include "pwc-ioctl.h"
-#include "pwc-uncompress.h"
-#include "pwc-kiara.h"
-#include "pwc-timon.h"
-#include "pwc-dec1.h"
-#include "pwc-dec23.h"
-
-/* Request types: video */
-#define SET_LUM_CTL 0x01
-#define GET_LUM_CTL 0x02
-#define SET_CHROM_CTL 0x03
-#define GET_CHROM_CTL 0x04
-#define SET_STATUS_CTL 0x05
-#define GET_STATUS_CTL 0x06
-#define SET_EP_STREAM_CTL 0x07
-#define GET_EP_STREAM_CTL 0x08
-#define SET_MPT_CTL 0x0D
-#define GET_MPT_CTL 0x0E
-
-/* Selectors for the Luminance controls [GS]ET_LUM_CTL */
-#define AGC_MODE_FORMATTER 0x2000
-#define PRESET_AGC_FORMATTER 0x2100
-#define SHUTTER_MODE_FORMATTER 0x2200
-#define PRESET_SHUTTER_FORMATTER 0x2300
-#define PRESET_CONTOUR_FORMATTER 0x2400
-#define AUTO_CONTOUR_FORMATTER 0x2500
-#define BACK_LIGHT_COMPENSATION_FORMATTER 0x2600
-#define CONTRAST_FORMATTER 0x2700
-#define DYNAMIC_NOISE_CONTROL_FORMATTER 0x2800
-#define FLICKERLESS_MODE_FORMATTER 0x2900
-#define AE_CONTROL_SPEED 0x2A00
-#define BRIGHTNESS_FORMATTER 0x2B00
-#define GAMMA_FORMATTER 0x2C00
-
-/* Selectors for the Chrominance controls [GS]ET_CHROM_CTL */
-#define WB_MODE_FORMATTER 0x1000
-#define AWB_CONTROL_SPEED_FORMATTER 0x1100
-#define AWB_CONTROL_DELAY_FORMATTER 0x1200
-#define PRESET_MANUAL_RED_GAIN_FORMATTER 0x1300
-#define PRESET_MANUAL_BLUE_GAIN_FORMATTER 0x1400
-#define COLOUR_MODE_FORMATTER 0x1500
-#define SATURATION_MODE_FORMATTER1 0x1600
-#define SATURATION_MODE_FORMATTER2 0x1700
-
-/* Selectors for the Status controls [GS]ET_STATUS_CTL */
-#define SAVE_USER_DEFAULTS_FORMATTER 0x0200
-#define RESTORE_USER_DEFAULTS_FORMATTER 0x0300
-#define RESTORE_FACTORY_DEFAULTS_FORMATTER 0x0400
-#define READ_AGC_FORMATTER 0x0500
-#define READ_SHUTTER_FORMATTER 0x0600
-#define READ_RED_GAIN_FORMATTER 0x0700
-#define READ_BLUE_GAIN_FORMATTER 0x0800
-#define SENSOR_TYPE_FORMATTER1 0x0C00
-#define READ_RAW_Y_MEAN_FORMATTER 0x3100
-#define SET_POWER_SAVE_MODE_FORMATTER 0x3200
-#define MIRROR_IMAGE_FORMATTER 0x3300
-#define LED_FORMATTER 0x3400
-#define SENSOR_TYPE_FORMATTER2 0x3700
-
-/* Formatters for the Video Endpoint controls [GS]ET_EP_STREAM_CTL */
-#define VIDEO_OUTPUT_CONTROL_FORMATTER 0x0100
-
-/* Formatters for the motorized pan & tilt [GS]ET_MPT_CTL */
-#define PT_RELATIVE_CONTROL_FORMATTER 0x01
-#define PT_RESET_CONTROL_FORMATTER 0x02
-#define PT_STATUS_FORMATTER 0x03
-
-static char *size2name[PSZ_MAX] =
-{
- "subQCIF",
- "QSIF",
- "QCIF",
- "SIF",
- "CIF",
- "VGA",
-};
-
-/********/
-
-/* Entries for the Nala (645/646) camera; the Nala doesn't have compression
- preferences, so you either get compressed or non-compressed streams.
-
- An alternate value of 0 means this mode is not available at all.
- */
-
-struct Nala_table_entry {
- char alternate; /* USB alternate setting */
- int compressed; /* Compressed yes/no */
-
- unsigned char mode[3]; /* precomputed mode table */
-};
-
-static struct Nala_table_entry Nala_table[PSZ_MAX][8] =
-{
-#include "pwc-nala.h"
-};
-
-
-/****************************************************************************/
-
-
-#define SendControlMsg(request, value, buflen) \
- usb_control_msg(pdev->udev, usb_sndctrlpipe(pdev->udev, 0), \
- request, \
- USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, \
- value, \
- pdev->vcinterface, \
- &buf, buflen, HZ / 2)
-
-#define RecvControlMsg(request, value, buflen) \
- usb_control_msg(pdev->udev, usb_rcvctrlpipe(pdev->udev, 0), \
- request, \
- USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, \
- value, \
- pdev->vcinterface, \
- &buf, buflen, HZ / 2)
-
-
-#if PWC_DEBUG
-void pwc_hexdump(void *p, int len)
-{
- int i;
- unsigned char *s;
- char buf[100], *d;
-
- s = (unsigned char *)p;
- d = buf;
- *d = '\0';
- Debug("Doing hexdump @ %p, %d bytes.\n", p, len);
- for (i = 0; i < len; i++) {
- d += sprintf(d, "%02X ", *s++);
- if ((i & 0xF) == 0xF) {
- Debug("%s\n", buf);
- d = buf;
- *d = '\0';
- }
- }
- if ((i & 0xF) != 0)
- Debug("%s\n", buf);
-}
-#endif
-
-static inline int send_video_command(struct usb_device *udev, int index, void *buf, int buflen)
-{
- return usb_control_msg(udev,
- usb_sndctrlpipe(udev, 0),
- SET_EP_STREAM_CTL,
- USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
- VIDEO_OUTPUT_CONTROL_FORMATTER,
- index,
- buf, buflen, HZ);
-}
-
-
-
-static inline int set_video_mode_Nala(struct pwc_device *pdev, int size, int frames)
-{
- unsigned char buf[3];
- int ret, fps;
- struct Nala_table_entry *pEntry;
- int frames2frames[31] =
- { /* closest match of framerate */
- 0, 0, 0, 0, 4, /* 0-4 */
- 5, 5, 7, 7, 10, /* 5-9 */
- 10, 10, 12, 12, 15, /* 10-14 */
- 15, 15, 15, 20, 20, /* 15-19 */
- 20, 20, 20, 24, 24, /* 20-24 */
- 24, 24, 24, 24, 24, /* 25-29 */
- 24 /* 30 */
- };
- int frames2table[31] =
- { 0, 0, 0, 0, 0, /* 0-4 */
- 1, 1, 1, 2, 2, /* 5-9 */
- 3, 3, 4, 4, 4, /* 10-14 */
- 5, 5, 5, 5, 5, /* 15-19 */
- 6, 6, 6, 6, 7, /* 20-24 */
- 7, 7, 7, 7, 7, /* 25-29 */
- 7 /* 30 */
- };
-
- if (size < 0 || size > PSZ_CIF || frames < 4 || frames > 25)
- return -EINVAL;
- frames = frames2frames[frames];
- fps = frames2table[frames];
- pEntry = &Nala_table[size][fps];
- if (pEntry->alternate == 0)
- return -EINVAL;
-
- if (pEntry->compressed)
- return -ENOENT; /* Not supported. */
-
- memcpy(buf, pEntry->mode, 3);
- ret = send_video_command(pdev->udev, pdev->vendpoint, buf, 3);
- if (ret < 0) {
- Debug("Failed to send video command... %d\n", ret);
- return ret;
- }
- if (pEntry->compressed && pdev->vpalette != VIDEO_PALETTE_RAW)
- {
- switch(pdev->type) {
- case 645:
- case 646:
- pwc_dec1_init(pdev->type, pdev->release, buf, pdev->decompress_data);
- break;
-
- case 675:
- case 680:
- case 690:
- case 720:
- case 730:
- case 740:
- case 750:
- pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data);
- break;
- }
- }
-
- pdev->cmd_len = 3;
- memcpy(pdev->cmd_buf, buf, 3);
-
- /* Set various parameters */
- pdev->vframes = frames;
- pdev->vsize = size;
- pdev->valternate = pEntry->alternate;
- pdev->image = pwc_image_sizes[size];
- pdev->frame_size = (pdev->image.x * pdev->image.y * 3) / 2;
- if (pEntry->compressed) {
- if (pdev->release < 5) { /* 4 fold compression */
- pdev->vbandlength = 528;
- pdev->frame_size /= 4;
- }
- else {
- pdev->vbandlength = 704;
- pdev->frame_size /= 3;
- }
- }
- else
- pdev->vbandlength = 0;
- return 0;
-}
-
-
-static inline int set_video_mode_Timon(struct pwc_device *pdev, int size, int frames, int compression, int snapshot)
-{
- unsigned char buf[13];
- const struct Timon_table_entry *pChoose;
- int ret, fps;
-
- if (size >= PSZ_MAX || frames < 5 || frames > 30 || compression < 0 || compression > 3)
- return -EINVAL;
- if (size == PSZ_VGA && frames > 15)
- return -EINVAL;
- fps = (frames / 5) - 1;
-
- /* Find a supported framerate with progressively higher compression ratios
- if the preferred ratio is not available.
- */
- pChoose = NULL;
- while (compression <= 3) {
- pChoose = &Timon_table[size][fps][compression];
- if (pChoose->alternate != 0)
- break;
- compression++;
- }
- if (pChoose == NULL || pChoose->alternate == 0)
- return -ENOENT; /* Not supported. */
-
- memcpy(buf, pChoose->mode, 13);
- if (snapshot)
- buf[0] |= 0x80;
- ret = send_video_command(pdev->udev, pdev->vendpoint, buf, 13);
- if (ret < 0)
- return ret;
-
- if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
- pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data);
-
- pdev->cmd_len = 13;
- memcpy(pdev->cmd_buf, buf, 13);
-
- /* Set various parameters */
- pdev->vframes = frames;
- pdev->vsize = size;
- pdev->vsnapshot = snapshot;
- pdev->valternate = pChoose->alternate;
- pdev->image = pwc_image_sizes[size];
- pdev->vbandlength = pChoose->bandlength;
- if (pChoose->bandlength > 0)
- pdev->frame_size = (pChoose->bandlength * pdev->image.y) / 4;
- else
- pdev->frame_size = (pdev->image.x * pdev->image.y * 12) / 8;
- return 0;
-}
-
-
-static inline int set_video_mode_Kiara(struct pwc_device *pdev, int size, int frames, int compression, int snapshot)
-{
- const struct Kiara_table_entry *pChoose = 0;
- int fps, ret;
- unsigned char buf[12];
- struct Kiara_table_entry RawEntry = {6, 773, 1272, {0xAD, 0xF4, 0x10, 0x27, 0xB6, 0x24, 0x96, 0x02, 0x30, 0x05, 0x03, 0x80}};
-
- if (size >= PSZ_MAX || frames < 5 || frames > 30 || compression < 0 || compression > 3)
- return -EINVAL;
- if (size == PSZ_VGA && frames > 15)
- return -EINVAL;
- fps = (frames / 5) - 1;
-
- /* special case: VGA @ 5 fps and snapshot is raw bayer mode */
- if (size == PSZ_VGA && frames == 5 && snapshot)
- {
- /* Only available in case the raw palette is selected or
- we have the decompressor available. This mode is
- only available in compressed form
- */
- if (pdev->vpalette == VIDEO_PALETTE_RAW)
- {
- Info("Choosing VGA/5 BAYER mode (%d).\n", pdev->vpalette);
- pChoose = &RawEntry;
- }
- else
- {
- Info("VGA/5 BAYER mode _must_ have a decompressor available, or use RAW palette.\n");
- }
- }
- else
- {
- /* Find a supported framerate with progressively higher compression ratios
- if the preferred ratio is not available.
- Skip this step when using RAW modes.
- */
- while (compression <= 3) {
- pChoose = &Kiara_table[size][fps][compression];
- if (pChoose->alternate != 0)
- break;
- compression++;
- }
- }
- if (pChoose == NULL || pChoose->alternate == 0)
- return -ENOENT; /* Not supported. */
-
- Debug("Using alternate setting %d.\n", pChoose->alternate);
-
- /* usb_control_msg won't take staticly allocated arrays as argument?? */
- memcpy(buf, pChoose->mode, 12);
- if (snapshot)
- buf[0] |= 0x80;
-
- /* Firmware bug: video endpoint is 5, but commands are sent to endpoint 4 */
- ret = send_video_command(pdev->udev, 4 /* pdev->vendpoint */, buf, 12);
- if (ret < 0)
- return ret;
-
- if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
- pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data);
-
- pdev->cmd_len = 12;
- memcpy(pdev->cmd_buf, buf, 12);
- /* All set and go */
- pdev->vframes = frames;
- pdev->vsize = size;
- pdev->vsnapshot = snapshot;
- pdev->valternate = pChoose->alternate;
- pdev->image = pwc_image_sizes[size];
- pdev->vbandlength = pChoose->bandlength;
- if (pdev->vbandlength > 0)
- pdev->frame_size = (pdev->vbandlength * pdev->image.y) / 4;
- else
- pdev->frame_size = (pdev->image.x * pdev->image.y * 12) / 8;
- return 0;
-}
-
-
-
-/**
- @pdev: device structure
- @width: viewport width
- @height: viewport height
- @frame: framerate, in fps
- @compression: preferred compression ratio
- @snapshot: snapshot mode or streaming
- */
-int pwc_set_video_mode(struct pwc_device *pdev, int width, int height, int frames, int compression, int snapshot)
-{
- int ret, size;
-
- Trace(TRACE_FLOW, "set_video_mode(%dx%d @ %d, palette %d).\n", width, height, frames, pdev->vpalette);
- size = pwc_decode_size(pdev, width, height);
- if (size < 0) {
- Debug("Could not find suitable size.\n");
- return -ERANGE;
- }
- Debug("decode_size = %d.\n", size);
-
- ret = -EINVAL;
- switch(pdev->type) {
- case 645:
- case 646:
- ret = set_video_mode_Nala(pdev, size, frames);
- break;
-
- case 675:
- case 680:
- case 690:
- ret = set_video_mode_Timon(pdev, size, frames, compression, snapshot);
- break;
-
- case 720:
- case 730:
- case 740:
- case 750:
- ret = set_video_mode_Kiara(pdev, size, frames, compression, snapshot);
- break;
- }
- if (ret < 0) {
- if (ret == -ENOENT)
- Info("Video mode %s@%d fps is only supported with the decompressor module (pwcx).\n", size2name[size], frames);
- else {
- Err("Failed to set video mode %s@%d fps; return code = %d\n", size2name[size], frames, ret);
- }
- return ret;
- }
- pdev->view.x = width;
- pdev->view.y = height;
- pdev->frame_total_size = pdev->frame_size + pdev->frame_header_size + pdev->frame_trailer_size;
- pwc_set_image_buffer_size(pdev);
- Trace(TRACE_SIZE, "Set viewport to %dx%d, image size is %dx%d.\n", width, height, pwc_image_sizes[size].x, pwc_image_sizes[size].y);
- return 0;
-}
-
-
-void pwc_set_image_buffer_size(struct pwc_device *pdev)
-{
- int i, factor = 0, filler = 0;
-
- /* for PALETTE_YUV420P */
- switch(pdev->vpalette)
- {
- case VIDEO_PALETTE_YUV420P:
- factor = 6;
- filler = 128;
- break;
- case VIDEO_PALETTE_RAW:
- factor = 6; /* can be uncompressed YUV420P */
- filler = 0;
- break;
- }
-
- /* Set sizes in bytes */
- pdev->image.size = pdev->image.x * pdev->image.y * factor / 4;
- pdev->view.size = pdev->view.x * pdev->view.y * factor / 4;
-
- /* Align offset, or you'll get some very weird results in
- YUV420 mode... x must be multiple of 4 (to get the Y's in
- place), and y even (or you'll mixup U & V). This is less of a
- problem for YUV420P.
- */
- pdev->offset.x = ((pdev->view.x - pdev->image.x) / 2) & 0xFFFC;
- pdev->offset.y = ((pdev->view.y - pdev->image.y) / 2) & 0xFFFE;
-
- /* Fill buffers with gray or black */
- for (i = 0; i < MAX_IMAGES; i++) {
- if (pdev->image_ptr[i] != NULL)
- memset(pdev->image_ptr[i], filler, pdev->view.size);
- }
-}
-
-
-
-/* BRIGHTNESS */
-
-int pwc_get_brightness(struct pwc_device *pdev)
-{
- char buf;
- int ret;
-
- ret = RecvControlMsg(GET_LUM_CTL, BRIGHTNESS_FORMATTER, 1);
- if (ret < 0)
- return ret;
- return buf << 9;
-}
-
-int pwc_set_brightness(struct pwc_device *pdev, int value)
-{
- char buf;
-
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- buf = (value >> 9) & 0x7f;
- return SendControlMsg(SET_LUM_CTL, BRIGHTNESS_FORMATTER, 1);
-}
-
-/* CONTRAST */
-
-int pwc_get_contrast(struct pwc_device *pdev)
-{
- char buf;
- int ret;
-
- ret = RecvControlMsg(GET_LUM_CTL, CONTRAST_FORMATTER, 1);
- if (ret < 0)
- return ret;
- return buf << 10;
-}
-
-int pwc_set_contrast(struct pwc_device *pdev, int value)
-{
- char buf;
-
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- buf = (value >> 10) & 0x3f;
- return SendControlMsg(SET_LUM_CTL, CONTRAST_FORMATTER, 1);
-}
-
-/* GAMMA */
-
-int pwc_get_gamma(struct pwc_device *pdev)
-{
- char buf;
- int ret;
-
- ret = RecvControlMsg(GET_LUM_CTL, GAMMA_FORMATTER, 1);
- if (ret < 0)
- return ret;
- return buf << 11;
-}
-
-int pwc_set_gamma(struct pwc_device *pdev, int value)
-{
- char buf;
-
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- buf = (value >> 11) & 0x1f;
- return SendControlMsg(SET_LUM_CTL, GAMMA_FORMATTER, 1);
-}
-
-
-/* SATURATION */
-
-int pwc_get_saturation(struct pwc_device *pdev)
-{
- char buf;
- int ret;
-
- if (pdev->type < 675)
- return -1;
- ret = RecvControlMsg(GET_CHROM_CTL, pdev->type < 730 ? SATURATION_MODE_FORMATTER2 : SATURATION_MODE_FORMATTER1, 1);
- if (ret < 0)
- return ret;
- return 32768 + buf * 327;
-}
-
-int pwc_set_saturation(struct pwc_device *pdev, int value)
-{
- char buf;
-
- if (pdev->type < 675)
- return -EINVAL;
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- /* saturation ranges from -100 to +100 */
- buf = (value - 32768) / 327;
- return SendControlMsg(SET_CHROM_CTL, pdev->type < 730 ? SATURATION_MODE_FORMATTER2 : SATURATION_MODE_FORMATTER1, 1);
-}
-
-/* AGC */
-
-static inline int pwc_set_agc(struct pwc_device *pdev, int mode, int value)
-{
- char buf;
- int ret;
-
- if (mode)
- buf = 0x0; /* auto */
- else
- buf = 0xff; /* fixed */
-
- ret = SendControlMsg(SET_LUM_CTL, AGC_MODE_FORMATTER, 1);
-
- if (!mode && ret >= 0) {
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- buf = (value >> 10) & 0x3F;
- ret = SendControlMsg(SET_LUM_CTL, PRESET_AGC_FORMATTER, 1);
- }
- if (ret < 0)
- return ret;
- return 0;
-}
-
-static inline int pwc_get_agc(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_LUM_CTL, AGC_MODE_FORMATTER, 1);
- if (ret < 0)
- return ret;
-
- if (buf != 0) { /* fixed */
- ret = RecvControlMsg(GET_LUM_CTL, PRESET_AGC_FORMATTER, 1);
- if (ret < 0)
- return ret;
- if (buf > 0x3F)
- buf = 0x3F;
- *value = (buf << 10);
- }
- else { /* auto */
- ret = RecvControlMsg(GET_STATUS_CTL, READ_AGC_FORMATTER, 1);
- if (ret < 0)
- return ret;
- /* Gah... this value ranges from 0x00 ... 0x9F */
- if (buf > 0x9F)
- buf = 0x9F;
- *value = -(48 + buf * 409);
- }
-
- return 0;
-}
-
-static inline int pwc_set_shutter_speed(struct pwc_device *pdev, int mode, int value)
-{
- char buf[2];
- int speed, ret;
-
-
- if (mode)
- buf[0] = 0x0; /* auto */
- else
- buf[0] = 0xff; /* fixed */
-
- ret = SendControlMsg(SET_LUM_CTL, SHUTTER_MODE_FORMATTER, 1);
-
- if (!mode && ret >= 0) {
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- switch(pdev->type) {
- case 675:
- case 680:
- case 690:
- /* speed ranges from 0x0 to 0x290 (656) */
- speed = (value / 100);
- buf[1] = speed >> 8;
- buf[0] = speed & 0xff;
- break;
- case 720:
- case 730:
- case 740:
- case 750:
- /* speed seems to range from 0x0 to 0xff */
- buf[1] = 0;
- buf[0] = value >> 8;
- break;
- }
-
- ret = SendControlMsg(SET_LUM_CTL, PRESET_SHUTTER_FORMATTER, 2);
- }
- return ret;
-}
-
-
-/* POWER */
-
-int pwc_camera_power(struct pwc_device *pdev, int power)
-{
- char buf;
-
- if (pdev->type < 675 || (pdev->type < 730 && pdev->release < 6))
- return 0; /* Not supported by Nala or Timon < release 6 */
-
- if (power)
- buf = 0x00; /* active */
- else
- buf = 0xFF; /* power save */
- return SendControlMsg(SET_STATUS_CTL, SET_POWER_SAVE_MODE_FORMATTER, 1);
-}
-
-
-
-/* private calls */
-
-static inline int pwc_restore_user(struct pwc_device *pdev)
-{
- char buf; /* dummy */
- return SendControlMsg(SET_STATUS_CTL, RESTORE_USER_DEFAULTS_FORMATTER, 0);
-}
-
-static inline int pwc_save_user(struct pwc_device *pdev)
-{
- char buf; /* dummy */
- return SendControlMsg(SET_STATUS_CTL, SAVE_USER_DEFAULTS_FORMATTER, 0);
-}
-
-static inline int pwc_restore_factory(struct pwc_device *pdev)
-{
- char buf; /* dummy */
- return SendControlMsg(SET_STATUS_CTL, RESTORE_FACTORY_DEFAULTS_FORMATTER, 0);
-}
-
- /* ************************************************* */
- /* Patch by Alvarado: (not in the original version */
-
- /*
- * the camera recognizes modes from 0 to 4:
- *
- * 00: indoor (incandescant lighting)
- * 01: outdoor (sunlight)
- * 02: fluorescent lighting
- * 03: manual
- * 04: auto
- */
-static inline int pwc_set_awb(struct pwc_device *pdev, int mode)
-{
- char buf;
- int ret;
-
- if (mode < 0)
- mode = 0;
-
- if (mode > 4)
- mode = 4;
-
- buf = mode & 0x07; /* just the lowest three bits */
-
- ret = SendControlMsg(SET_CHROM_CTL, WB_MODE_FORMATTER, 1);
-
- if (ret < 0)
- return ret;
- return 0;
-}
-
-static inline int pwc_get_awb(struct pwc_device *pdev)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_CHROM_CTL, WB_MODE_FORMATTER, 1);
-
- if (ret < 0)
- return ret;
- return buf;
-}
-
-static inline int pwc_set_red_gain(struct pwc_device *pdev, int value)
-{
- unsigned char buf;
-
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- /* only the msb is considered */
- buf = value >> 8;
- return SendControlMsg(SET_CHROM_CTL, PRESET_MANUAL_RED_GAIN_FORMATTER, 1);
-}
-
-static inline int pwc_get_red_gain(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_CHROM_CTL, PRESET_MANUAL_RED_GAIN_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf << 8;
- return 0;
-}
-
-
-static inline int pwc_set_blue_gain(struct pwc_device *pdev, int value)
-{
- unsigned char buf;
-
- if (value < 0)
- value = 0;
- if (value > 0xffff)
- value = 0xffff;
- /* only the msb is considered */
- buf = value >> 8;
- return SendControlMsg(SET_CHROM_CTL, PRESET_MANUAL_BLUE_GAIN_FORMATTER, 1);
-}
-
-static inline int pwc_get_blue_gain(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_CHROM_CTL, PRESET_MANUAL_BLUE_GAIN_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf << 8;
- return 0;
-}
-
-
-/* The following two functions are different, since they only read the
- internal red/blue gains, which may be different from the manual
- gains set or read above.
- */
-static inline int pwc_read_red_gain(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_STATUS_CTL, READ_RED_GAIN_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf << 8;
- return 0;
-}
-
-static inline int pwc_read_blue_gain(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_STATUS_CTL, READ_BLUE_GAIN_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf << 8;
- return 0;
-}
-
-
-static inline int pwc_set_wb_speed(struct pwc_device *pdev, int speed)
-{
- unsigned char buf;
-
- /* useful range is 0x01..0x20 */
- buf = speed / 0x7f0;
- return SendControlMsg(SET_CHROM_CTL, AWB_CONTROL_SPEED_FORMATTER, 1);
-}
-
-static inline int pwc_get_wb_speed(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_CHROM_CTL, AWB_CONTROL_SPEED_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf * 0x7f0;
- return 0;
-}
-
-
-static inline int pwc_set_wb_delay(struct pwc_device *pdev, int delay)
-{
- unsigned char buf;
-
- /* useful range is 0x01..0x3F */
- buf = (delay >> 10);
- return SendControlMsg(SET_CHROM_CTL, AWB_CONTROL_DELAY_FORMATTER, 1);
-}
-
-static inline int pwc_get_wb_delay(struct pwc_device *pdev, int *value)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_CHROM_CTL, AWB_CONTROL_DELAY_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *value = buf << 10;
- return 0;
-}
-
-
-int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value)
-{
- unsigned char buf[2];
-
- if (pdev->type < 730)
- return 0;
- on_value /= 100;
- off_value /= 100;
- if (on_value < 0)
- on_value = 0;
- if (on_value > 0xff)
- on_value = 0xff;
- if (off_value < 0)
- off_value = 0;
- if (off_value > 0xff)
- off_value = 0xff;
-
- buf[0] = on_value;
- buf[1] = off_value;
-
- return SendControlMsg(SET_STATUS_CTL, LED_FORMATTER, 2);
-}
-
-int pwc_get_leds(struct pwc_device *pdev, int *on_value, int *off_value)
-{
- unsigned char buf[2];
- int ret;
-
- if (pdev->type < 730) {
- *on_value = -1;
- *off_value = -1;
- return 0;
- }
-
- ret = RecvControlMsg(GET_STATUS_CTL, LED_FORMATTER, 2);
- if (ret < 0)
- return ret;
- *on_value = buf[0] * 100;
- *off_value = buf[1] * 100;
- return 0;
-}
-
-static inline int pwc_set_contour(struct pwc_device *pdev, int contour)
-{
- unsigned char buf;
- int ret;
-
- if (contour < 0)
- buf = 0xff; /* auto contour on */
- else
- buf = 0x0; /* auto contour off */
- ret = SendControlMsg(SET_LUM_CTL, AUTO_CONTOUR_FORMATTER, 1);
- if (ret < 0)
- return ret;
-
- if (contour < 0)
- return 0;
- if (contour > 0xffff)
- contour = 0xffff;
-
- buf = (contour >> 10); /* contour preset is [0..3f] */
- ret = SendControlMsg(SET_LUM_CTL, PRESET_CONTOUR_FORMATTER, 1);
- if (ret < 0)
- return ret;
- return 0;
-}
-
-static inline int pwc_get_contour(struct pwc_device *pdev, int *contour)
-{
- unsigned char buf;
- int ret;
-
- ret = RecvControlMsg(GET_LUM_CTL, AUTO_CONTOUR_FORMATTER, 1);
- if (ret < 0)
- return ret;
-
- if (buf == 0) {
- /* auto mode off, query current preset value */
- ret = RecvControlMsg(GET_LUM_CTL, PRESET_CONTOUR_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *contour = buf << 10;
- }
- else
- *contour = -1;
- return 0;
-}
-
-
-static inline int pwc_set_backlight(struct pwc_device *pdev, int backlight)
-{
- unsigned char buf;
-
- if (backlight)
- buf = 0xff;
- else
- buf = 0x0;
- return SendControlMsg(SET_LUM_CTL, BACK_LIGHT_COMPENSATION_FORMATTER, 1);
-}
-
-static inline int pwc_get_backlight(struct pwc_device *pdev, int *backlight)
-{
- int ret;
- unsigned char buf;
-
- ret = RecvControlMsg(GET_LUM_CTL, BACK_LIGHT_COMPENSATION_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *backlight = buf;
- return 0;
-}
-
-
-static inline int pwc_set_flicker(struct pwc_device *pdev, int flicker)
-{
- unsigned char buf;
-
- if (flicker)
- buf = 0xff;
- else
- buf = 0x0;
- return SendControlMsg(SET_LUM_CTL, FLICKERLESS_MODE_FORMATTER, 1);
-}
-
-static inline int pwc_get_flicker(struct pwc_device *pdev, int *flicker)
-{
- int ret;
- unsigned char buf;
-
- ret = RecvControlMsg(GET_LUM_CTL, FLICKERLESS_MODE_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *flicker = buf;
- return 0;
-}
-
-
-static inline int pwc_set_dynamic_noise(struct pwc_device *pdev, int noise)
-{
- unsigned char buf;
-
- if (noise < 0)
- noise = 0;
- if (noise > 3)
- noise = 3;
- buf = noise;
- return SendControlMsg(SET_LUM_CTL, DYNAMIC_NOISE_CONTROL_FORMATTER, 1);
-}
-
-static inline int pwc_get_dynamic_noise(struct pwc_device *pdev, int *noise)
-{
- int ret;
- unsigned char buf;
-
- ret = RecvControlMsg(GET_LUM_CTL, DYNAMIC_NOISE_CONTROL_FORMATTER, 1);
- if (ret < 0)
- return ret;
- *noise = buf;
- return 0;
-}
-
-int pwc_mpt_reset(struct pwc_device *pdev, int flags)
-{
- unsigned char buf;
-
- buf = flags & 0x03; // only lower two bits are currently used
- return SendControlMsg(SET_MPT_CTL, PT_RESET_CONTROL_FORMATTER, 1);
-}
-
-static inline int pwc_mpt_set_angle(struct pwc_device *pdev, int pan, int tilt)
-{
- unsigned char buf[4];
-
- /* set new relative angle; angles are expressed in degrees * 100,
- but cam as .5 degree resolution, hence devide by 200. Also
- the angle must be multiplied by 64 before it's send to
- the cam (??)
- */
- pan = 64 * pan / 100;
- tilt = -64 * tilt / 100; /* positive tilt is down, which is not what the user would expect */
- buf[0] = pan & 0xFF;
- buf[1] = (pan >> 8) & 0xFF;
- buf[2] = tilt & 0xFF;
- buf[3] = (tilt >> 8) & 0xFF;
- return SendControlMsg(SET_MPT_CTL, PT_RELATIVE_CONTROL_FORMATTER, 4);
-}
-
-static inline int pwc_mpt_get_status(struct pwc_device *pdev, struct pwc_mpt_status *status)
-{
- int ret;
- unsigned char buf[5];
-
- ret = RecvControlMsg(GET_MPT_CTL, PT_STATUS_FORMATTER, 5);
- if (ret < 0)
- return ret;
- status->status = buf[0] & 0x7; // 3 bits are used for reporting
- status->time_pan = (buf[1] << 8) + buf[2];
- status->time_tilt = (buf[3] << 8) + buf[4];
- return 0;
-}
-
-
-int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor)
-{
- unsigned char buf;
- int ret = -1, request;
-
- if (pdev->type < 675)
- request = SENSOR_TYPE_FORMATTER1;
- else if (pdev->type < 730)
- return -1; /* The Vesta series doesn't have this call */
- else
- request = SENSOR_TYPE_FORMATTER2;
-
- ret = RecvControlMsg(GET_STATUS_CTL, request, 1);
- if (ret < 0)
- return ret;
- if (pdev->type < 675)
- *sensor = buf | 0x100;
- else
- *sensor = buf;
- return 0;
-}
-
-
- /* End of Add-Ons */
- /* ************************************************* */
-
-/* Linux 2.5.something and 2.6 pass direct pointers to arguments of
- ioctl() calls. With 2.4, you have to do tedious copy_from_user()
- and copy_to_user() calls. With these macros we circumvent this,
- and let me maintain only one source file. The functionality is
- exactly the same otherwise.
- */
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
-
-/* define local variable for arg */
-#define ARG_DEF(ARG_type, ARG_name)\
- ARG_type *ARG_name = arg;
-/* copy arg to local variable */
-#define ARG_IN(ARG_name) /* nothing */
-/* argument itself (referenced) */
-#define ARGR(ARG_name) (*ARG_name)
-/* argument address */
-#define ARGA(ARG_name) ARG_name
-/* copy local variable to arg */
-#define ARG_OUT(ARG_name) /* nothing */
-
-#else
-
-#define ARG_DEF(ARG_type, ARG_name)\
- ARG_type ARG_name;
-#define ARG_IN(ARG_name)\
- if (copy_from_user(&ARG_name, arg, sizeof(ARG_name))) {\
- ret = -EFAULT;\
- break;\
- }
-#define ARGR(ARG_name) ARG_name
-#define ARGA(ARG_name) &ARG_name
-#define ARG_OUT(ARG_name)\
- if (copy_to_user(arg, &ARG_name, sizeof(ARG_name))) {\
- ret = -EFAULT;\
- break;\
- }
-
-#endif
-
-int pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg)
-{
- int ret = 0;
-
- switch(cmd) {
- case VIDIOCPWCRUSER:
- {
- if (pwc_restore_user(pdev))
- ret = -EINVAL;
- break;
- }
-
- case VIDIOCPWCSUSER:
- {
- if (pwc_save_user(pdev))
- ret = -EINVAL;
- break;
- }
-
- case VIDIOCPWCFACTORY:
- {
- if (pwc_restore_factory(pdev))
- ret = -EINVAL;
- break;
- }
-
- case VIDIOCPWCSCQUAL:
- {
- ARG_DEF(int, qual)
-
- ARG_IN(qual)
- if (ARGR(qual) < 0 || ARGR(qual) > 3)
- ret = -EINVAL;
- else
- ret = pwc_try_video_mode(pdev, pdev->view.x, pdev->view.y, pdev->vframes, ARGR(qual), pdev->vsnapshot);
- if (ret >= 0)
- pdev->vcompression = ARGR(qual);
- break;
- }
-
- case VIDIOCPWCGCQUAL:
- {
- ARG_DEF(int, qual)
-
- ARGR(qual) = pdev->vcompression;
- ARG_OUT(qual)
- break;
- }
-
- case VIDIOCPWCPROBE:
- {
- ARG_DEF(struct pwc_probe, probe)
-
- strcpy(ARGR(probe).name, pdev->vdev->name);
- ARGR(probe).type = pdev->type;
- ARG_OUT(probe)
- break;
- }
-
- case VIDIOCPWCGSERIAL:
- {
- ARG_DEF(struct pwc_serial, serial)
-
- strcpy(ARGR(serial).serial, pdev->serial);
- ARG_OUT(serial)
- break;
- }
-
- case VIDIOCPWCSAGC:
- {
- ARG_DEF(int, agc)
-
- ARG_IN(agc)
- if (pwc_set_agc(pdev, ARGR(agc) < 0 ? 1 : 0, ARGR(agc)))
- ret = -EINVAL;
- break;
- }
-
- case VIDIOCPWCGAGC:
- {
- ARG_DEF(int, agc)
-
- if (pwc_get_agc(pdev, ARGA(agc)))
- ret = -EINVAL;
- ARG_OUT(agc)
- break;
- }
-
- case VIDIOCPWCSSHUTTER:
- {
- ARG_DEF(int, shutter_speed)
-
- ARG_IN(shutter_speed)
- ret = pwc_set_shutter_speed(pdev, ARGR(shutter_speed) < 0 ? 1 : 0, ARGR(shutter_speed));
- break;
- }
-
- case VIDIOCPWCSAWB:
- {
- ARG_DEF(struct pwc_whitebalance, wb)
-
- ARG_IN(wb)
- ret = pwc_set_awb(pdev, ARGR(wb).mode);
- if (ret >= 0 && ARGR(wb).mode == PWC_WB_MANUAL) {
- pwc_set_red_gain(pdev, ARGR(wb).manual_red);
- pwc_set_blue_gain(pdev, ARGR(wb).manual_blue);
- }
- break;
- }
-
- case VIDIOCPWCGAWB:
- {
- ARG_DEF(struct pwc_whitebalance, wb)
-
- memset(ARGA(wb), 0, sizeof(struct pwc_whitebalance));
- ARGR(wb).mode = pwc_get_awb(pdev);
- if (ARGR(wb).mode < 0)
- ret = -EINVAL;
- else {
- if (ARGR(wb).mode == PWC_WB_MANUAL) {
- ret = pwc_get_red_gain(pdev, &ARGR(wb).manual_red);
- if (ret < 0)
- break;
- ret = pwc_get_blue_gain(pdev, &ARGR(wb).manual_blue);
- if (ret < 0)
- break;
- }
- if (ARGR(wb).mode == PWC_WB_AUTO) {
- ret = pwc_read_red_gain(pdev, &ARGR(wb).read_red);
- if (ret < 0)
- break;
- ret =pwc_read_blue_gain(pdev, &ARGR(wb).read_blue);
- if (ret < 0)
- break;
- }
- }
- ARG_OUT(wb)
- break;
- }
-
- case VIDIOCPWCSAWBSPEED:
- {
- ARG_DEF(struct pwc_wb_speed, wbs)
-
- if (ARGR(wbs).control_speed > 0) {
- ret = pwc_set_wb_speed(pdev, ARGR(wbs).control_speed);
- }
- if (ARGR(wbs).control_delay > 0) {
- ret = pwc_set_wb_delay(pdev, ARGR(wbs).control_delay);
- }
- break;
- }
-
- case VIDIOCPWCGAWBSPEED:
- {
- ARG_DEF(struct pwc_wb_speed, wbs)
-
- ret = pwc_get_wb_speed(pdev, &ARGR(wbs).control_speed);
- if (ret < 0)
- break;
- ret = pwc_get_wb_delay(pdev, &ARGR(wbs).control_delay);
- if (ret < 0)
- break;
- ARG_OUT(wbs)
- break;
- }
-
- case VIDIOCPWCSLED:
- {
- ARG_DEF(struct pwc_leds, leds)
-
- ARG_IN(leds)
- ret = pwc_set_leds(pdev, ARGR(leds).led_on, ARGR(leds).led_off);
- break;
- }
-
-
- case VIDIOCPWCGLED:
- {
- ARG_DEF(struct pwc_leds, leds)
-
- ret = pwc_get_leds(pdev, &ARGR(leds).led_on, &ARGR(leds).led_off);
- ARG_OUT(leds)
- break;
- }
-
- case VIDIOCPWCSCONTOUR:
- {
- ARG_DEF(int, contour)
-
- ARG_IN(contour)
- ret = pwc_set_contour(pdev, ARGR(contour));
- break;
- }
-
- case VIDIOCPWCGCONTOUR:
- {
- ARG_DEF(int, contour)
-
- ret = pwc_get_contour(pdev, ARGA(contour));
- ARG_OUT(contour)
- break;
- }
-
- case VIDIOCPWCSBACKLIGHT:
- {
- ARG_DEF(int, backlight)
-
- ARG_IN(backlight)
- ret = pwc_set_backlight(pdev, ARGR(backlight));
- break;
- }
-
- case VIDIOCPWCGBACKLIGHT:
- {
- ARG_DEF(int, backlight)
-
- ret = pwc_get_backlight(pdev, ARGA(backlight));
- ARG_OUT(backlight)
- break;
- }
-
- case VIDIOCPWCSFLICKER:
- {
- ARG_DEF(int, flicker)
-
- ARG_IN(flicker)
- ret = pwc_set_flicker(pdev, ARGR(flicker));
- break;
- }
-
- case VIDIOCPWCGFLICKER:
- {
- ARG_DEF(int, flicker)
-
- ret = pwc_get_flicker(pdev, ARGA(flicker));
- ARG_OUT(flicker)
- break;
- }
-
- case VIDIOCPWCSDYNNOISE:
- {
- ARG_DEF(int, dynnoise)
-
- ARG_IN(dynnoise)
- ret = pwc_set_dynamic_noise(pdev, ARGR(dynnoise));
- break;
- }
-
- case VIDIOCPWCGDYNNOISE:
- {
- ARG_DEF(int, dynnoise)
-
- ret = pwc_get_dynamic_noise(pdev, ARGA(dynnoise));
- ARG_OUT(dynnoise);
- break;
- }
-
- case VIDIOCPWCGREALSIZE:
- {
- ARG_DEF(struct pwc_imagesize, size)
-
- ARGR(size).width = pdev->image.x;
- ARGR(size).height = pdev->image.y;
- ARG_OUT(size)
- break;
- }
-
- case VIDIOCPWCMPTRESET:
- {
- if (pdev->features & FEATURE_MOTOR_PANTILT)
- {
- ARG_DEF(int, flags)
-
- ARG_IN(flags)
- ret = pwc_mpt_reset(pdev, ARGR(flags));
- if (ret >= 0)
- {
- pdev->pan_angle = 0;
- pdev->tilt_angle = 0;
- }
- }
- else
- {
- ret = -ENXIO;
- }
- break;
- }
-
- case VIDIOCPWCMPTGRANGE:
- {
- if (pdev->features & FEATURE_MOTOR_PANTILT)
- {
- ARG_DEF(struct pwc_mpt_range, range)
-
- ARGR(range) = pdev->angle_range;
- ARG_OUT(range)
- }
- else
- {
- ret = -ENXIO;
- }
- break;
- }
-
- case VIDIOCPWCMPTSANGLE:
- {
- int new_pan, new_tilt;
-
- if (pdev->features & FEATURE_MOTOR_PANTILT)
- {
- ARG_DEF(struct pwc_mpt_angles, angles)
-
- ARG_IN(angles)
- /* The camera can only set relative angles, so
- do some calculations when getting an absolute angle .
- */
- if (ARGR(angles).absolute)
- {
- new_pan = ARGR(angles).pan;
- new_tilt = ARGR(angles).tilt;
- }
- else
- {
- new_pan = pdev->pan_angle + ARGR(angles).pan;
- new_tilt = pdev->tilt_angle + ARGR(angles).tilt;
- }
- /* check absolute ranges */
- if (new_pan < pdev->angle_range.pan_min ||
- new_pan > pdev->angle_range.pan_max ||
- new_tilt < pdev->angle_range.tilt_min ||
- new_tilt > pdev->angle_range.tilt_max)
- {
- ret = -ERANGE;
- }
- else
- {
- /* go to relative range, check again */
- new_pan -= pdev->pan_angle;
- new_tilt -= pdev->tilt_angle;
- /* angles are specified in degrees * 100, thus the limit = 36000 */
- if (new_pan < -36000 || new_pan > 36000 || new_tilt < -36000 || new_tilt > 36000)
- ret = -ERANGE;
- }
- if (ret == 0) /* no errors so far */
- {
- ret = pwc_mpt_set_angle(pdev, new_pan, new_tilt);
- if (ret >= 0)
- {
- pdev->pan_angle += new_pan;
- pdev->tilt_angle += new_tilt;
- }
- if (ret == -EPIPE) /* stall -> out of range */
- ret = -ERANGE;
- }
- }
- else
- {
- ret = -ENXIO;
- }
- break;
- }
-
- case VIDIOCPWCMPTGANGLE:
- {
-
- if (pdev->features & FEATURE_MOTOR_PANTILT)
- {
- ARG_DEF(struct pwc_mpt_angles, angles)
-
- ARGR(angles).absolute = 1;
- ARGR(angles).pan = pdev->pan_angle;
- ARGR(angles).tilt = pdev->tilt_angle;
- ARG_OUT(angles)
- }
- else
- {
- ret = -ENXIO;
- }
- break;
- }
-
- case VIDIOCPWCMPTSTATUS:
- {
- if (pdev->features & FEATURE_MOTOR_PANTILT)
- {
- ARG_DEF(struct pwc_mpt_status, status)
-
- ret = pwc_mpt_get_status(pdev, ARGA(status));
- ARG_OUT(status)
- }
- else
- {
- ret = -ENXIO;
- }
- break;
- }
-
- case VIDIOCPWCGVIDCMD:
- {
- ARG_DEF(struct pwc_video_command, cmd);
-
- ARGR(cmd).type = pdev->type;
- ARGR(cmd).release = pdev->release;
- ARGR(cmd).command_len = pdev->cmd_len;
- memcpy(&ARGR(cmd).command_buf, pdev->cmd_buf, pdev->cmd_len);
- ARGR(cmd).bandlength = pdev->vbandlength;
- ARGR(cmd).frame_size = pdev->frame_size;
- ARG_OUT(cmd)
- break;
- }
- /*
- case VIDIOCPWCGVIDTABLE:
- {
- ARG_DEF(struct pwc_table_init_buffer, table);
- ARGR(table).len = pdev->cmd_len;
- memcpy(&ARGR(table).buffer, pdev->decompress_data, pdev->decompressor->table_size);
- ARG_OUT(table)
- break;
- }
- */
-
- default:
- ret = -ENOIOCTLCMD;
- break;
- }
-
- if (ret > 0)
- return 0;
- return ret;
-}
-
-
-
+++ /dev/null
-/* Linux driver for Philips webcam
- USB and Video4Linux interface part.
- (C) 1999-2004 Nemosoft Unv.
- (C) 2004 Luc Saillard (luc@saillard.org)
-
- NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
- driver and thus may have bugs that are not present in the original version.
- Please send bug reports and support requests to <luc@saillard.org>.
- The decompression routines have been implemented by reverse-engineering the
- Nemosoft binary pwcx module. Caveat emptor.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-
-*/
-
-/*
- This code forms the interface between the USB layers and the Philips
- specific stuff. Some adanved stuff of the driver falls under an
- NDA, signed between me and Philips B.V., Eindhoven, the Netherlands, and
- is thus not distributed in source form. The binary pwcx.o module
- contains the code that falls under the NDA.
-
- In case you're wondering: 'pwc' stands for "Philips WebCam", but
- I really didn't want to type 'philips_web_cam' every time (I'm lazy as
- any Linux kernel hacker, but I don't like uncomprehensible abbreviations
- without explanation).
-
- Oh yes, convention: to disctinguish between all the various pointers to
- device-structures, I use these names for the pointer variables:
- udev: struct usb_device *
- vdev: struct video_device *
- pdev: struct pwc_devive *
-*/
-
-/* Contributors:
- - Alvarado: adding whitebalance code
- - Alistar Moire: QuickCam 3000 Pro device/product ID
- - Tony Hoyle: Creative Labs Webcam 5 device/product ID
- - Mark Burazin: solving hang in VIDIOCSYNC when camera gets unplugged
- - Jk Fang: Sotec Afina Eye ID
- - Xavier Roche: QuickCam Pro 4000 ID
- - Jens Knudsen: QuickCam Zoom ID
- - J. Debert: QuickCam for Notebooks ID
-*/
-
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/poll.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <asm/io.h>
-
-#include "pwc.h"
-#include "pwc-ioctl.h"
-#include "pwc-kiara.h"
-#include "pwc-timon.h"
-#include "pwc-dec23.h"
-#include "pwc-dec1.h"
-#include "pwc-uncompress.h"
-
-/* Function prototypes and driver templates */
-
-/* hotplug device table support */
-static struct usb_device_id pwc_device_table [] = {
- { USB_DEVICE(0x0471, 0x0302) }, /* Philips models */
- { USB_DEVICE(0x0471, 0x0303) },
- { USB_DEVICE(0x0471, 0x0304) },
- { USB_DEVICE(0x0471, 0x0307) },
- { USB_DEVICE(0x0471, 0x0308) },
- { USB_DEVICE(0x0471, 0x030C) },
- { USB_DEVICE(0x0471, 0x0310) },
- { USB_DEVICE(0x0471, 0x0311) },
- { USB_DEVICE(0x0471, 0x0312) },
- { USB_DEVICE(0x0471, 0x0313) }, /* the 'new' 720K */
- { USB_DEVICE(0x069A, 0x0001) }, /* Askey */
- { USB_DEVICE(0x046D, 0x08B0) }, /* Logitech QuickCam Pro 3000 */
- { USB_DEVICE(0x046D, 0x08B1) }, /* Logitech QuickCam Notebook Pro */
- { USB_DEVICE(0x046D, 0x08B2) }, /* Logitech QuickCam Pro 4000 */
- { USB_DEVICE(0x046D, 0x08B3) }, /* Logitech QuickCam Zoom (old model) */
- { USB_DEVICE(0x046D, 0x08B4) }, /* Logitech QuickCam Zoom (new model) */
- { USB_DEVICE(0x046D, 0x08B5) }, /* Logitech QuickCam Orbit/Sphere */
- { USB_DEVICE(0x046D, 0x08B6) }, /* Logitech (reserved) */
- { USB_DEVICE(0x046D, 0x08B7) }, /* Logitech (reserved) */
- { USB_DEVICE(0x046D, 0x08B8) }, /* Logitech (reserved) */
- { USB_DEVICE(0x055D, 0x9000) }, /* Samsung */
- { USB_DEVICE(0x055D, 0x9001) },
- { USB_DEVICE(0x041E, 0x400C) }, /* Creative Webcam 5 */
- { USB_DEVICE(0x041E, 0x4011) }, /* Creative Webcam Pro Ex */
- { USB_DEVICE(0x04CC, 0x8116) }, /* Afina Eye */
- { USB_DEVICE(0x06BE, 0x8116) }, /* new Afina Eye */
- { USB_DEVICE(0x0d81, 0x1910) }, /* Visionite */
- { USB_DEVICE(0x0d81, 0x1900) },
- { }
-};
-MODULE_DEVICE_TABLE(usb, pwc_device_table);
-
-static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id *id);
-static void usb_pwc_disconnect(struct usb_interface *intf);
-
-static struct usb_driver pwc_driver = {
- .owner = THIS_MODULE,
- .name = "Philips webcam", /* name */
- .id_table = pwc_device_table,
- .probe = usb_pwc_probe, /* probe() */
- .disconnect = usb_pwc_disconnect, /* disconnect() */
-};
-
-#define MAX_DEV_HINTS 20
-#define MAX_ISOC_ERRORS 20
-
-static int default_size = PSZ_QCIF;
-static int default_fps = 10;
-static int default_fbufs = 3; /* Default number of frame buffers */
-static int default_mbufs = 2; /* Default number of mmap() buffers */
- int pwc_trace = TRACE_MODULE | TRACE_FLOW | TRACE_PWCX;
-static int power_save = 0;
-static int led_on = 100, led_off = 0; /* defaults to LED that is on while in use */
- int pwc_preferred_compression = 2; /* 0..3 = uncompressed..high */
-static struct {
- int type;
- char serial_number[30];
- int device_node;
- struct pwc_device *pdev;
-} device_hint[MAX_DEV_HINTS];
-
-/***/
-
-static int pwc_video_open(struct inode *inode, struct file *file);
-static int pwc_video_close(struct inode *inode, struct file *file);
-static ssize_t pwc_video_read(struct file *file, char *buf,
- size_t count, loff_t *ppos);
-static unsigned int pwc_video_poll(struct file *file, poll_table *wait);
-static int pwc_video_ioctl(struct inode *inode, struct file *file,
- unsigned int ioctlnr, unsigned long arg);
-static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma);
-
-static struct file_operations pwc_fops = {
- .owner = THIS_MODULE,
- .open = pwc_video_open,
- .release = pwc_video_close,
- .read = pwc_video_read,
- .poll = pwc_video_poll,
- .mmap = pwc_video_mmap,
- .ioctl = pwc_video_ioctl,
- .llseek = no_llseek,
-};
-static struct video_device pwc_template = {
- .owner = THIS_MODULE,
- .name = "Philips Webcam", /* Filled in later */
- .type = VID_TYPE_CAPTURE,
- .hardware = VID_HARDWARE_PWC,
- .release = video_device_release,
- .fops = &pwc_fops,
- .minor = -1,
-};
-
-/***************************************************************************/
-
-/* Okay, this is some magic that I worked out and the reasoning behind it...
-
- The biggest problem with any USB device is of course: "what to do
- when the user unplugs the device while it is in use by an application?"
- We have several options:
- 1) Curse them with the 7 plagues when they do (requires divine intervention)
- 2) Tell them not to (won't work: they'll do it anyway)
- 3) Oops the kernel (this will have a negative effect on a user's uptime)
- 4) Do something sensible.
-
- Of course, we go for option 4.
-
- It happens that this device will be linked to two times, once from
- usb_device and once from the video_device in their respective 'private'
- pointers. This is done when the device is probed() and all initialization
- succeeded. The pwc_device struct links back to both structures.
-
- When a device is unplugged while in use it will be removed from the
- list of known USB devices; I also de-register it as a V4L device, but
- unfortunately I can't free the memory since the struct is still in use
- by the file descriptor. This free-ing is then deferend until the first
- opportunity. Crude, but it works.
-
- A small 'advantage' is that if a user unplugs the cam and plugs it back
- in, it should get assigned the same video device minor, but unfortunately
- it's non-trivial to re-link the cam back to the video device... (that
- would surely be magic! :))
-*/
-
-/***************************************************************************/
-/* Private functions */
-
-/* Here we want the physical address of the memory.
- * This is used when initializing the contents of the area.
- */
-static inline unsigned long kvirt_to_pa(unsigned long adr)
-{
- unsigned long kva, ret;
-
- kva = (unsigned long) page_address(vmalloc_to_page((void *)adr));
- kva |= adr & (PAGE_SIZE-1); /* restore the offset */
- ret = __pa(kva);
- return ret;
-}
-
-static void * rvmalloc(unsigned long size)
-{
- void * mem;
- unsigned long adr;
-
- size=PAGE_ALIGN(size);
- mem=vmalloc_32(size);
- if (mem)
- {
- memset(mem, 0, size); /* Clear the ram out, no junk to the user */
- adr=(unsigned long) mem;
- while (size > 0)
- {
- SetPageReserved(vmalloc_to_page((void *)adr));
- adr+=PAGE_SIZE;
- size-=PAGE_SIZE;
- }
- }
- return mem;
-}
-
-static void rvfree(void * mem, unsigned long size)
-{
- unsigned long adr;
-
- if (mem)
- {
- adr=(unsigned long) mem;
- while ((long) size > 0)
- {
- ClearPageReserved(vmalloc_to_page((void *)adr));
- adr+=PAGE_SIZE;
- size-=PAGE_SIZE;
- }
- vfree(mem);
- }
-}
-
-
-
-
-static int pwc_allocate_buffers(struct pwc_device *pdev)
-{
- int i;
- void *kbuf;
-
- Trace(TRACE_MEMORY, ">> pwc_allocate_buffers(pdev = 0x%p)\n", pdev);
-
- if (pdev == NULL)
- return -ENXIO;
-
-#ifdef PWC_MAGIC
- if (pdev->magic != PWC_MAGIC) {
- Err("allocate_buffers(): magic failed.\n");
- return -ENXIO;
- }
-#endif
- /* Allocate Isochronuous pipe buffers */
- for (i = 0; i < MAX_ISO_BUFS; i++) {
- if (pdev->sbuf[i].data == NULL) {
- kbuf = kmalloc(ISO_BUFFER_SIZE, GFP_KERNEL);
- if (kbuf == NULL) {
- Err("Failed to allocate iso buffer %d.\n", i);
- return -ENOMEM;
- }
- Trace(TRACE_MEMORY, "Allocated iso buffer at %p.\n", kbuf);
- pdev->sbuf[i].data = kbuf;
- memset(kbuf, 0, ISO_BUFFER_SIZE);
- }
- }
-
- /* Allocate frame buffer structure */
- if (pdev->fbuf == NULL) {
- kbuf = kmalloc(default_fbufs * sizeof(struct pwc_frame_buf), GFP_KERNEL);
- if (kbuf == NULL) {
- Err("Failed to allocate frame buffer structure.\n");
- return -ENOMEM;
- }
- Trace(TRACE_MEMORY, "Allocated frame buffer structure at %p.\n", kbuf);
- pdev->fbuf = kbuf;
- memset(kbuf, 0, default_fbufs * sizeof(struct pwc_frame_buf));
- }
- /* create frame buffers, and make circular ring */
- for (i = 0; i < default_fbufs; i++) {
- if (pdev->fbuf[i].data == NULL) {
- kbuf = vmalloc(PWC_FRAME_SIZE); /* need vmalloc since frame buffer > 128K */
- if (kbuf == NULL) {
- Err("Failed to allocate frame buffer %d.\n", i);
- return -ENOMEM;
- }
- Trace(TRACE_MEMORY, "Allocated frame buffer %d at %p.\n", i, kbuf);
- pdev->fbuf[i].data = kbuf;
- memset(kbuf, 128, PWC_FRAME_SIZE);
- }
- }
-
- /* Allocate decompressor table space */
- kbuf = NULL;
- switch (pdev->type)
- {
- case 675:
- case 680:
- case 690:
- case 720:
- case 730:
- case 740:
- case 750:
- Trace(TRACE_MEMORY,"private_data(%d)\n",sizeof(struct pwc_dec23_private));
- kbuf = kmalloc(sizeof(struct pwc_dec23_private), GFP_KERNEL); /* Timon & Kiara */
- break;
- case 645:
- case 646:
- /* TODO & FIXME */
- kbuf = kmalloc(sizeof(struct pwc_dec23_private), GFP_KERNEL);
- break;
- }
- if (kbuf == NULL) {
- Err("Failed to allocate decompress table.\n");
- return -ENOMEM;
- }
- pdev->decompress_data = kbuf;
-
- /* Allocate image buffer; double buffer for mmap() */
- kbuf = rvmalloc(default_mbufs * pdev->len_per_image);
- if (kbuf == NULL) {
- Err("Failed to allocate image buffer(s). needed (%d)\n",default_mbufs * pdev->len_per_image);
- return -ENOMEM;
- }
- Trace(TRACE_MEMORY, "Allocated image buffer at %p.\n", kbuf);
- pdev->image_data = kbuf;
- for (i = 0; i < default_mbufs; i++)
- pdev->image_ptr[i] = kbuf + i * pdev->len_per_image;
- for (; i < MAX_IMAGES; i++)
- pdev->image_ptr[i] = NULL;
-
- kbuf = NULL;
-
- Trace(TRACE_MEMORY, "<< pwc_allocate_buffers()\n");
- return 0;
-}
-
-static void pwc_free_buffers(struct pwc_device *pdev)
-{
- int i;
-
- Trace(TRACE_MEMORY, "Entering free_buffers(%p).\n", pdev);
-
- if (pdev == NULL)
- return;
-#ifdef PWC_MAGIC
- if (pdev->magic != PWC_MAGIC) {
- Err("free_buffers(): magic failed.\n");
- return;
- }
-#endif
-
- /* Release Iso-pipe buffers */
- for (i = 0; i < MAX_ISO_BUFS; i++)
- if (pdev->sbuf[i].data != NULL) {
- Trace(TRACE_MEMORY, "Freeing ISO buffer at %p.\n", pdev->sbuf[i].data);
- kfree(pdev->sbuf[i].data);
- pdev->sbuf[i].data = NULL;
- }
-
- /* The same for frame buffers */
- if (pdev->fbuf != NULL) {
- for (i = 0; i < default_fbufs; i++) {
- if (pdev->fbuf[i].data != NULL) {
- Trace(TRACE_MEMORY, "Freeing frame buffer %d at %p.\n", i, pdev->fbuf[i].data);
- vfree(pdev->fbuf[i].data);
- pdev->fbuf[i].data = NULL;
- }
- }
- kfree(pdev->fbuf);
- pdev->fbuf = NULL;
- }
-
- /* Intermediate decompression buffer & tables */
- if (pdev->decompress_data != NULL) {
- Trace(TRACE_MEMORY, "Freeing decompression buffer at %p.\n", pdev->decompress_data);
- kfree(pdev->decompress_data);
- pdev->decompress_data = NULL;
- }
- pdev->decompressor = NULL;
-
- /* Release image buffers */
- if (pdev->image_data != NULL) {
- Trace(TRACE_MEMORY, "Freeing image buffer at %p.\n", pdev->image_data);
- rvfree(pdev->image_data, default_mbufs * pdev->len_per_image);
- }
- pdev->image_data = NULL;
-
- Trace(TRACE_MEMORY, "Leaving free_buffers().\n");
-}
-
-/* The frame & image buffer mess.
-
- Yes, this is a mess. Well, it used to be simple, but alas... In this
- module, 3 buffers schemes are used to get the data from the USB bus to
- the user program. The first scheme involves the ISO buffers (called thus
- since they transport ISO data from the USB controller), and not really
- interesting. Suffices to say the data from this buffer is quickly
- gathered in an interrupt handler (pwc_isoc_handler) and placed into the
- frame buffer.
-
- The frame buffer is the second scheme, and is the central element here.
- It collects the data from a single frame from the camera (hence, the
- name). Frames are delimited by the USB camera with a short USB packet,
- so that's easy to detect. The frame buffers form a list that is filled
- by the camera+USB controller and drained by the user process through
- either read() or mmap().
-
- The image buffer is the third scheme, in which frames are decompressed
- and converted into planar format. For mmap() there is more than
- one image buffer available.
-
- The frame buffers provide the image buffering. In case the user process
- is a bit slow, this introduces lag and some undesired side-effects.
- The problem arises when the frame buffer is full. I used to drop the last
- frame, which makes the data in the queue stale very quickly. But dropping
- the frame at the head of the queue proved to be a litte bit more difficult.
- I tried a circular linked scheme, but this introduced more problems than
- it solved.
-
- Because filling and draining are completely asynchronous processes, this
- requires some fiddling with pointers and mutexes.
-
- Eventually, I came up with a system with 2 lists: an 'empty' frame list
- and a 'full' frame list:
- * Initially, all frame buffers but one are on the 'empty' list; the one
- remaining buffer is our initial fill frame.
- * If a frame is needed for filling, we try to take it from the 'empty'
- list, unless that list is empty, in which case we take the buffer at
- the head of the 'full' list.
- * When our fill buffer has been filled, it is appended to the 'full'
- list.
- * If a frame is needed by read() or mmap(), it is taken from the head of
- the 'full' list, handled, and then appended to the 'empty' list. If no
- buffer is present on the 'full' list, we wait.
- The advantage is that the buffer that is currently being decompressed/
- converted, is on neither list, and thus not in our way (any other scheme
- I tried had the problem of old data lingering in the queue).
-
- Whatever strategy you choose, it always remains a tradeoff: with more
- frame buffers the chances of a missed frame are reduced. On the other
- hand, on slower machines it introduces lag because the queue will
- always be full.
- */
-
-/**
- \brief Find next frame buffer to fill. Take from empty or full list, whichever comes first.
- */
-static inline int pwc_next_fill_frame(struct pwc_device *pdev)
-{
- int ret;
- unsigned long flags;
-
- ret = 0;
- spin_lock_irqsave(&pdev->ptrlock, flags);
- if (pdev->fill_frame != NULL) {
- /* append to 'full' list */
- if (pdev->full_frames == NULL) {
- pdev->full_frames = pdev->fill_frame;
- pdev->full_frames_tail = pdev->full_frames;
- }
- else {
- pdev->full_frames_tail->next = pdev->fill_frame;
- pdev->full_frames_tail = pdev->fill_frame;
- }
- }
- if (pdev->empty_frames != NULL) {
- /* We have empty frames available. That's easy */
- pdev->fill_frame = pdev->empty_frames;
- pdev->empty_frames = pdev->empty_frames->next;
- }
- else {
- /* Hmm. Take it from the full list */
-#if PWC_DEBUG
- /* sanity check */
- if (pdev->full_frames == NULL) {
- Err("Neither empty or full frames available!\n");
- spin_unlock_irqrestore(&pdev->ptrlock, flags);
- return -EINVAL;
- }
-#endif
- pdev->fill_frame = pdev->full_frames;
- pdev->full_frames = pdev->full_frames->next;
- ret = 1;
- }
- pdev->fill_frame->next = NULL;
-#if PWC_DEBUG
- Trace(TRACE_SEQUENCE, "Assigning sequence number %d.\n", pdev->sequence);
- pdev->fill_frame->sequence = pdev->sequence++;
-#endif
- spin_unlock_irqrestore(&pdev->ptrlock, flags);
- return ret;
-}
-
-
-/**
- \brief Reset all buffers, pointers and lists, except for the image_used[] buffer.
-
- If the image_used[] buffer is cleared too, mmap()/VIDIOCSYNC will run into trouble.
- */
-static void pwc_reset_buffers(struct pwc_device *pdev)
-{
- int i;
- unsigned long flags;
-
- spin_lock_irqsave(&pdev->ptrlock, flags);
- pdev->full_frames = NULL;
- pdev->full_frames_tail = NULL;
- for (i = 0; i < default_fbufs; i++) {
- pdev->fbuf[i].filled = 0;
- if (i > 0)
- pdev->fbuf[i].next = &pdev->fbuf[i - 1];
- else
- pdev->fbuf->next = NULL;
- }
- pdev->empty_frames = &pdev->fbuf[default_fbufs - 1];
- pdev->empty_frames_tail = pdev->fbuf;
- pdev->read_frame = NULL;
- pdev->fill_frame = pdev->empty_frames;
- pdev->empty_frames = pdev->empty_frames->next;
-
- pdev->image_read_pos = 0;
- pdev->fill_image = 0;
- spin_unlock_irqrestore(&pdev->ptrlock, flags);
-}
-
-
-/**
- \brief Do all the handling for getting one frame: get pointer, decompress, advance pointers.
- */
-static int pwc_handle_frame(struct pwc_device *pdev)
-{
- int ret = 0;
- unsigned long flags;
-
- spin_lock_irqsave(&pdev->ptrlock, flags);
- /* First grab our read_frame; this is removed from all lists, so
- we can release the lock after this without problems */
- if (pdev->read_frame != NULL) {
- /* This can't theoretically happen */
- Err("Huh? Read frame still in use?\n");
- }
- else {
- if (pdev->full_frames == NULL) {
- Err("Woops. No frames ready.\n");
- }
- else {
- pdev->read_frame = pdev->full_frames;
- pdev->full_frames = pdev->full_frames->next;
- pdev->read_frame->next = NULL;
- }
-
- if (pdev->read_frame != NULL) {
-#if PWC_DEBUG
- Trace(TRACE_SEQUENCE, "Decompressing frame %d\n", pdev->read_frame->sequence);
-#endif
- /* Decompression is a lenghty process, so it's outside of the lock.
- This gives the isoc_handler the opportunity to fill more frames
- in the mean time.
- */
- spin_unlock_irqrestore(&pdev->ptrlock, flags);
- ret = pwc_decompress(pdev);
- spin_lock_irqsave(&pdev->ptrlock, flags);
-
- /* We're done with read_buffer, tack it to the end of the empty buffer list */
- if (pdev->empty_frames == NULL) {
- pdev->empty_frames = pdev->read_frame;
- pdev->empty_frames_tail = pdev->empty_frames;
- }
- else {
- pdev->empty_frames_tail->next = pdev->read_frame;
- pdev->empty_frames_tail = pdev->read_frame;
- }
- pdev->read_frame = NULL;
- }
- }
- spin_unlock_irqrestore(&pdev->ptrlock, flags);
- return ret;
-}
-
-/**
- \brief Advance pointers of image buffer (after each user request)
-*/
-static inline void pwc_next_image(struct pwc_device *pdev)
-{
- pdev->image_used[pdev->fill_image] = 0;
- pdev->fill_image = (pdev->fill_image + 1) % default_mbufs;
-}
-
-
-/* This gets called for the Isochronous pipe (video). This is done in
- * interrupt time, so it has to be fast, not crash, and not stall. Neat.
- */
-static void pwc_isoc_handler(struct urb *urb, struct pt_regs *regs)
-{
- struct pwc_device *pdev;
- int i, fst, flen;
- int awake;
- struct pwc_frame_buf *fbuf;
- unsigned char *fillptr = 0, *iso_buf = 0;
-
- awake = 0;
- pdev = (struct pwc_device *)urb->context;
- if (pdev == NULL) {
- Err("isoc_handler() called with NULL device?!\n");
- return;
- }
-#ifdef PWC_MAGIC
- if (pdev->magic != PWC_MAGIC) {
- Err("isoc_handler() called with bad magic!\n");
- return;
- }
-#endif
- if (urb->status == -ENOENT || urb->status == -ECONNRESET) {
- Trace(TRACE_OPEN, "pwc_isoc_handler(): URB (%p) unlinked %ssynchronuously.\n", urb, urb->status == -ENOENT ? "" : "a");
- return;
- }
- if (urb->status != -EINPROGRESS && urb->status != 0) {
- const char *errmsg;
-
- errmsg = "Unknown";
- switch(urb->status) {
- case -ENOSR: errmsg = "Buffer error (overrun)"; break;
- case -EPIPE: errmsg = "Stalled (device not responding)"; break;
- case -EOVERFLOW: errmsg = "Babble (bad cable?)"; break;
- case -EPROTO: errmsg = "Bit-stuff error (bad cable?)"; break;
- case -EILSEQ: errmsg = "CRC/Timeout (could be anything)"; break;
- case -ETIMEDOUT: errmsg = "NAK (device does not respond)"; break;
- }
- Trace(TRACE_FLOW, "pwc_isoc_handler() called with status %d [%s].\n", urb->status, errmsg);
- /* Give up after a number of contiguous errors on the USB bus.
- Appearantly something is wrong so we simulate an unplug event.
- */
- if (++pdev->visoc_errors > MAX_ISOC_ERRORS)
- {
- Info("Too many ISOC errors, bailing out.\n");
- pdev->error_status = EIO;
- awake = 1;
- wake_up_interruptible(&pdev->frameq);
- }
- goto handler_end; // ugly, but practical
- }
-
- fbuf = pdev->fill_frame;
- if (fbuf == NULL) {
- Err("pwc_isoc_handler without valid fill frame.\n");
- awake = 1;
- goto handler_end;
- }
- else {
- fillptr = fbuf->data + fbuf->filled;
- }
-
- /* Reset ISOC error counter. We did get here, after all. */
- pdev->visoc_errors = 0;
-
- /* vsync: 0 = don't copy data
- 1 = sync-hunt
- 2 = synched
- */
- /* Compact data */
- for (i = 0; i < urb->number_of_packets; i++) {
- fst = urb->iso_frame_desc[i].status;
- flen = urb->iso_frame_desc[i].actual_length;
- iso_buf = urb->transfer_buffer + urb->iso_frame_desc[i].offset;
- if (fst == 0) {
- if (flen > 0) { /* if valid data... */
- if (pdev->vsync > 0) { /* ...and we are not sync-hunting... */
- pdev->vsync = 2;
-
- /* ...copy data to frame buffer, if possible */
- if (flen + fbuf->filled > pdev->frame_total_size) {
- Trace(TRACE_FLOW, "Frame buffer overflow (flen = %d, frame_total_size = %d).\n", flen, pdev->frame_total_size);
- pdev->vsync = 0; /* Hmm, let's wait for an EOF (end-of-frame) */
- pdev->vframes_error++;
- }
- else {
- memmove(fillptr, iso_buf, flen);
- fillptr += flen;
- }
- }
- fbuf->filled += flen;
- } /* ..flen > 0 */
-
- if (flen < pdev->vlast_packet_size) {
- /* Shorter packet... We probably have the end of an image-frame;
- wake up read() process and let select()/poll() do something.
- Decompression is done in user time over there.
- */
- if (pdev->vsync == 2) {
- /* The ToUCam Fun CMOS sensor causes the firmware to send 2 or 3 bogus
- frames on the USB wire after an exposure change. This conditition is
- however detected in the cam and a bit is set in the header.
- */
- if (pdev->type == 730) {
- unsigned char *ptr = (unsigned char *)fbuf->data;
-
- if (ptr[1] == 1 && ptr[0] & 0x10) {
-#if PWC_DEBUG
- Debug("Hyundai CMOS sensor bug. Dropping frame %d.\n", fbuf->sequence);
-#endif
- pdev->drop_frames += 2;
- pdev->vframes_error++;
- }
- if ((ptr[0] ^ pdev->vmirror) & 0x01) {
- if (ptr[0] & 0x01)
- Info("Snapshot button pressed.\n");
- else
- Info("Snapshot button released.\n");
- }
- if ((ptr[0] ^ pdev->vmirror) & 0x02) {
- if (ptr[0] & 0x02)
- Info("Image is mirrored.\n");
- else
- Info("Image is normal.\n");
- }
- pdev->vmirror = ptr[0] & 0x03;
- /* Sometimes the trailer of the 730 is still sent as a 4 byte packet
- after a short frame; this condition is filtered out specifically. A 4 byte
- frame doesn't make sense anyway.
- So we get either this sequence:
- drop_bit set -> 4 byte frame -> short frame -> good frame
- Or this one:
- drop_bit set -> short frame -> good frame
- So we drop either 3 or 2 frames in all!
- */
- if (fbuf->filled == 4)
- pdev->drop_frames++;
- }
-
- /* In case we were instructed to drop the frame, do so silently.
- The buffer pointers are not updated either (but the counters are reset below).
- */
- if (pdev->drop_frames > 0)
- pdev->drop_frames--;
- else {
- /* Check for underflow first */
- if (fbuf->filled < pdev->frame_total_size) {
- Trace(TRACE_FLOW, "Frame buffer underflow (%d bytes); discarded.\n", fbuf->filled);
- pdev->vframes_error++;
- }
- else {
- /* Send only once per EOF */
- awake = 1; /* delay wake_ups */
-
- /* Find our next frame to fill. This will always succeed, since we
- * nick a frame from either empty or full list, but if we had to
- * take it from the full list, it means a frame got dropped.
- */
- if (pwc_next_fill_frame(pdev)) {
- pdev->vframes_dumped++;
- if ((pdev->vframe_count > FRAME_LOWMARK) && (pwc_trace & TRACE_FLOW)) {
- if (pdev->vframes_dumped < 20)
- Trace(TRACE_FLOW, "Dumping frame %d.\n", pdev->vframe_count);
- if (pdev->vframes_dumped == 20)
- Trace(TRACE_FLOW, "Dumping frame %d (last message).\n", pdev->vframe_count);
- }
- }
- fbuf = pdev->fill_frame;
- }
- } /* !drop_frames */
- pdev->vframe_count++;
- }
- fbuf->filled = 0;
- fillptr = fbuf->data;
- pdev->vsync = 1;
- } /* .. flen < last_packet_size */
- pdev->vlast_packet_size = flen;
- } /* ..status == 0 */
-#if PWC_DEBUG
- /* This is normally not interesting to the user, unless you are really debugging something */
- else {
- static int iso_error = 0;
- iso_error++;
- if (iso_error < 20)
- Trace(TRACE_FLOW, "Iso frame %d of USB has error %d\n", i, fst);
- }
-#endif
- }
-
-handler_end:
- if (awake)
- wake_up_interruptible(&pdev->frameq);
-
- urb->dev = pdev->udev;
- i = usb_submit_urb(urb, GFP_ATOMIC);
- if (i != 0)
- Err("Error (%d) re-submitting urb in pwc_isoc_handler.\n", i);
-}
-
-
-static int pwc_isoc_init(struct pwc_device *pdev)
-{
- struct usb_device *udev;
- struct urb *urb;
- int i, j, ret;
-
- struct usb_interface *intf;
- struct usb_host_interface *idesc = NULL;
-
- if (pdev == NULL)
- return -EFAULT;
- if (pdev->iso_init)
- return 0;
- pdev->vsync = 0;
- udev = pdev->udev;
-
- /* Get the current alternate interface, adjust packet size */
- if (!udev->actconfig)
- return -EFAULT;
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5)
- idesc = &udev->actconfig->interface[0]->altsetting[pdev->valternate];
-#else
- intf = usb_ifnum_to_if(udev, 0);
- if (intf)
- idesc = usb_altnum_to_altsetting(intf, pdev->valternate);
-#endif
-
- if (!idesc)
- return -EFAULT;
-
- /* Search video endpoint */
- pdev->vmax_packet_size = -1;
- for (i = 0; i < idesc->desc.bNumEndpoints; i++)
- if ((idesc->endpoint[i].desc.bEndpointAddress & 0xF) == pdev->vendpoint) {
- pdev->vmax_packet_size = idesc->endpoint[i].desc.wMaxPacketSize;
- break;
- }
-
- if (pdev->vmax_packet_size < 0 || pdev->vmax_packet_size > ISO_MAX_FRAME_SIZE) {
- Err("Failed to find packet size for video endpoint in current alternate setting.\n");
- return -ENFILE; /* Odd error, that should be noticable */
- }
-
- /* Set alternate interface */
- ret = 0;
- Trace(TRACE_OPEN, "Setting alternate interface %d\n", pdev->valternate);
- ret = usb_set_interface(pdev->udev, 0, pdev->valternate);
- if (ret < 0)
- return ret;
-
- for (i = 0; i < MAX_ISO_BUFS; i++) {
- urb = usb_alloc_urb(ISO_FRAMES_PER_DESC, GFP_KERNEL);
- if (urb == NULL) {
- Err("Failed to allocate urb %d\n", i);
- ret = -ENOMEM;
- break;
- }
- pdev->sbuf[i].urb = urb;
- Trace(TRACE_MEMORY, "Allocated URB at 0x%p\n", urb);
- }
- if (ret) {
- /* De-allocate in reverse order */
- while (i >= 0) {
- if (pdev->sbuf[i].urb != NULL)
- usb_free_urb(pdev->sbuf[i].urb);
- pdev->sbuf[i].urb = NULL;
- i--;
- }
- return ret;
- }
-
- /* init URB structure */
- for (i = 0; i < MAX_ISO_BUFS; i++) {
- urb = pdev->sbuf[i].urb;
-
- urb->interval = 1; // devik
- urb->dev = udev;
- urb->pipe = usb_rcvisocpipe(udev, pdev->vendpoint);
- urb->transfer_flags = URB_ISO_ASAP;
- urb->transfer_buffer = pdev->sbuf[i].data;
- urb->transfer_buffer_length = ISO_BUFFER_SIZE;
- urb->complete = pwc_isoc_handler;
- urb->context = pdev;
- urb->start_frame = 0;
- urb->number_of_packets = ISO_FRAMES_PER_DESC;
- for (j = 0; j < ISO_FRAMES_PER_DESC; j++) {
- urb->iso_frame_desc[j].offset = j * ISO_MAX_FRAME_SIZE;
- urb->iso_frame_desc[j].length = pdev->vmax_packet_size;
- }
- }
-
- /* link */
- for (i = 0; i < MAX_ISO_BUFS; i++) {
- ret = usb_submit_urb(pdev->sbuf[i].urb, GFP_KERNEL);
- if (ret)
- Err("isoc_init() submit_urb %d failed with error %d\n", i, ret);
- else
- Trace(TRACE_MEMORY, "URB 0x%p submitted.\n", pdev->sbuf[i].urb);
- }
-
- /* All is done... */
- pdev->iso_init = 1;
- Trace(TRACE_OPEN, "<< pwc_isoc_init()\n");
- return 0;
-}
-
-static void pwc_isoc_cleanup(struct pwc_device *pdev)
-{
- int i;
-
- Trace(TRACE_OPEN, ">> pwc_isoc_cleanup()\n");
- if (pdev == NULL)
- return;
-
- /* Unlinking ISOC buffers one by one */
- for (i = 0; i < MAX_ISO_BUFS; i++) {
- struct urb *urb;
-
- urb = pdev->sbuf[i].urb;
- if (urb != 0) {
- if (pdev->iso_init) {
- Trace(TRACE_MEMORY, "Unlinking URB %p\n", urb);
- usb_unlink_urb(urb);
- }
- Trace(TRACE_MEMORY, "Freeing URB\n");
- usb_free_urb(urb);
- pdev->sbuf[i].urb = NULL;
- }
- }
-
- /* Stop camera, but only if we are sure the camera is still there (unplug
- is signalled by EPIPE)
- */
- if (pdev->error_status && pdev->error_status != EPIPE) {
- Trace(TRACE_OPEN, "Setting alternate interface 0.\n");
- usb_set_interface(pdev->udev, 0, 0);
- }
-
- pdev->iso_init = 0;
- Trace(TRACE_OPEN, "<< pwc_isoc_cleanup()\n");
-}
-
-int pwc_try_video_mode(struct pwc_device *pdev, int width, int height, int new_fps, int new_compression, int new_snapshot)
-{
- int ret, start;
-
- /* Stop isoc stuff */
- pwc_isoc_cleanup(pdev);
- /* Reset parameters */
- pwc_reset_buffers(pdev);
- /* Try to set video mode... */
- start = ret = pwc_set_video_mode(pdev, width, height, new_fps, new_compression, new_snapshot);
- if (ret) {
- Trace(TRACE_FLOW, "pwc_set_video_mode attempt 1 failed.\n");
- /* That failed... restore old mode (we know that worked) */
- start = pwc_set_video_mode(pdev, pdev->view.x, pdev->view.y, pdev->vframes, pdev->vcompression, pdev->vsnapshot);
- if (start) {
- Trace(TRACE_FLOW, "pwc_set_video_mode attempt 2 failed.\n");
- }
- }
- if (start == 0)
- {
- if (pwc_isoc_init(pdev) < 0)
- {
- Info("Failed to restart ISOC transfers in pwc_try_video_mode.\n");
- ret = -EAGAIN; /* let's try again, who knows if it works a second time */
- }
- }
- pdev->drop_frames++; /* try to avoid garbage during switch */
- return ret; /* Return original error code */
-}
-
-
-/***************************************************************************/
-/* Video4Linux functions */
-
-static int pwc_video_open(struct inode *inode, struct file *file)
-{
- int i;
- struct video_device *vdev = video_devdata(file);
- struct pwc_device *pdev;
-
- Trace(TRACE_OPEN, ">> video_open called(vdev = 0x%p).\n", vdev);
-
- pdev = (struct pwc_device *)vdev->priv;
- if (pdev == NULL)
- BUG();
- if (pdev->vopen)
- return -EBUSY;
-
- down(&pdev->modlock);
- if (!pdev->usb_init) {
- Trace(TRACE_OPEN, "Doing first time initialization.\n");
- pdev->usb_init = 1;
-
- if (pwc_trace & TRACE_OPEN)
- {
- /* Query sensor type */
- const char *sensor_type = NULL;
- int ret;
-
- ret = pwc_get_cmos_sensor(pdev, &i);
- if (ret >= 0)
- {
- switch(i) {
- case 0x00: sensor_type = "Hyundai CMOS sensor"; break;
- case 0x20: sensor_type = "Sony CCD sensor + TDA8787"; break;
- case 0x2E: sensor_type = "Sony CCD sensor + Exas 98L59"; break;
- case 0x2F: sensor_type = "Sony CCD sensor + ADI 9804"; break;
- case 0x30: sensor_type = "Sharp CCD sensor + TDA8787"; break;
- case 0x3E: sensor_type = "Sharp CCD sensor + Exas 98L59"; break;
- case 0x3F: sensor_type = "Sharp CCD sensor + ADI 9804"; break;
- case 0x40: sensor_type = "UPA 1021 sensor"; break;
- case 0x100: sensor_type = "VGA sensor"; break;
- case 0x101: sensor_type = "PAL MR sensor"; break;
- default: sensor_type = "unknown type of sensor"; break;
- }
- }
- if (sensor_type != NULL)
- Info("This %s camera is equipped with a %s (%d).\n", pdev->vdev->name, sensor_type, i);
- }
- }
-
- /* Turn on camera */
- if (power_save) {
- i = pwc_camera_power(pdev, 1);
- if (i < 0)
- Info("Failed to restore power to the camera! (%d)\n", i);
- }
- /* Set LED on/off time */
- if (pwc_set_leds(pdev, led_on, led_off) < 0)
- Info("Failed to set LED on/off time.\n");
-
- pwc_construct(pdev); /* set min/max sizes correct */
-
- /* So far, so good. Allocate memory. */
- i = pwc_allocate_buffers(pdev);
- if (i < 0) {
- Trace(TRACE_OPEN, "Failed to allocate buffer memory.\n");
- up(&pdev->modlock);
- return i;
- }
-
- /* Reset buffers & parameters */
- pwc_reset_buffers(pdev);
- for (i = 0; i < default_mbufs; i++)
- pdev->image_used[i] = 0;
- pdev->vframe_count = 0;
- pdev->vframes_dumped = 0;
- pdev->vframes_error = 0;
- pdev->visoc_errors = 0;
- pdev->error_status = 0;
-#if PWC_DEBUG
- pdev->sequence = 0;
-#endif
- pwc_construct(pdev); /* set min/max sizes correct */
-
- /* Set some defaults */
- pdev->vsnapshot = 0;
-
- /* Start iso pipe for video; first try the last used video size
- (or the default one); if that fails try QCIF/10 or QSIF/10;
- it that fails too, give up.
- */
- i = pwc_set_video_mode(pdev, pwc_image_sizes[pdev->vsize].x, pwc_image_sizes[pdev->vsize].y, pdev->vframes, pdev->vcompression, 0);
- if (i) {
- Trace(TRACE_OPEN, "First attempt at set_video_mode failed.\n");
- if (pdev->type == 730 || pdev->type == 740 || pdev->type == 750)
- i = pwc_set_video_mode(pdev, pwc_image_sizes[PSZ_QSIF].x, pwc_image_sizes[PSZ_QSIF].y, 10, pdev->vcompression, 0);
- else
- i = pwc_set_video_mode(pdev, pwc_image_sizes[PSZ_QCIF].x, pwc_image_sizes[PSZ_QCIF].y, 10, pdev->vcompression, 0);
- }
- if (i) {
- Trace(TRACE_OPEN, "Second attempt at set_video_mode failed.\n");
- up(&pdev->modlock);
- return i;
- }
-
- i = pwc_isoc_init(pdev);
- if (i) {
- Trace(TRACE_OPEN, "Failed to init ISOC stuff = %d.\n", i);
- up(&pdev->modlock);
- return i;
- }
-
- pdev->vopen++;
- file->private_data = vdev;
- up(&pdev->modlock);
- Trace(TRACE_OPEN, "<< video_open() returns 0.\n");
- return 0;
-}
-
-/* Note that all cleanup is done in the reverse order as in _open */
-static int pwc_video_close(struct inode *inode, struct file *file)
-{
- struct video_device *vdev = file->private_data;
- struct pwc_device *pdev;
- int i;
-
- Trace(TRACE_OPEN, ">> video_close called(vdev = 0x%p).\n", vdev);
-
- pdev = (struct pwc_device *)vdev->priv;
- if (pdev->vopen == 0)
- Info("video_close() called on closed device?\n");
-
- /* Dump statistics, but only if a reasonable amount of frames were
- processed (to prevent endless log-entries in case of snap-shot
- programs)
- */
- if (pdev->vframe_count > 20)
- Info("Closing video device: %d frames received, dumped %d frames, %d frames with errors.\n", pdev->vframe_count, pdev->vframes_dumped, pdev->vframes_error);
-
- switch (pdev->type)
- {
- case 675:
- case 680:
- case 690:
- case 720:
- case 730:
- case 740:
- case 750:
- pwc_dec23_exit(); /* Timon & Kiara */
- break;
- case 645:
- case 646:
- pwc_dec1_exit();
- break;
- }
-
- pwc_isoc_cleanup(pdev);
- pwc_free_buffers(pdev);
-
- /* Turn off LEDS and power down camera, but only when not unplugged */
- if (pdev->error_status != EPIPE) {
- /* Turn LEDs off */
- if (pwc_set_leds(pdev, 0, 0) < 0)
- Info("Failed to set LED on/off time.\n");
- if (power_save) {
- i = pwc_camera_power(pdev, 0);
- if (i < 0)
- Err("Failed to power down camera (%d)\n", i);
- }
- }
- pdev->vopen = 0;
- Trace(TRACE_OPEN, "<< video_close()\n");
- return 0;
-}
-
-/*
- * FIXME: what about two parallel reads ????
- * ANSWER: Not supported. You can't open the device more than once,
- despite what the V4L1 interface says. First, I don't see
- the need, second there's no mechanism of alerting the
- 2nd/3rd/... process of events like changing image size.
- And I don't see the point of blocking that for the
- 2nd/3rd/... process.
- In multi-threaded environments reading parallel from any
- device is tricky anyhow.
- */
-
-static ssize_t pwc_video_read(struct file *file, char *buf,
- size_t count, loff_t *ppos)
-{
- struct video_device *vdev = file->private_data;
- struct pwc_device *pdev;
- int noblock = file->f_flags & O_NONBLOCK;
- DECLARE_WAITQUEUE(wait, current);
- int bytes_to_read;
-
- Trace(TRACE_READ, "video_read(0x%p, %p, %d) called.\n", vdev, buf, count);
- if (vdev == NULL)
- return -EFAULT;
- pdev = vdev->priv;
- if (pdev == NULL)
- return -EFAULT;
- if (pdev->error_status)
- return -pdev->error_status; /* Something happened, report what. */
-
- /* In case we're doing partial reads, we don't have to wait for a frame */
- if (pdev->image_read_pos == 0) {
- /* Do wait queueing according to the (doc)book */
- add_wait_queue(&pdev->frameq, &wait);
- while (pdev->full_frames == NULL) {
- /* Check for unplugged/etc. here */
- if (pdev->error_status) {
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
- return -pdev->error_status ;
- }
- if (noblock) {
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
- return -EWOULDBLOCK;
- }
- if (signal_pending(current)) {
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
- return -ERESTARTSYS;
- }
- schedule();
- set_current_state(TASK_INTERRUPTIBLE);
- }
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
-
- /* Decompress and release frame */
- if (pwc_handle_frame(pdev))
- return -EFAULT;
- }
-
- Trace(TRACE_READ, "Copying data to user space.\n");
- if (pdev->vpalette == VIDEO_PALETTE_RAW)
- bytes_to_read = pdev->frame_size;
- else
- bytes_to_read = pdev->view.size;
-
- /* copy bytes to user space; we allow for partial reads */
- if (count + pdev->image_read_pos > bytes_to_read)
- count = bytes_to_read - pdev->image_read_pos;
- if (copy_to_user(buf, pdev->image_ptr[pdev->fill_image] + pdev->image_read_pos, count))
- return -EFAULT;
- pdev->image_read_pos += count;
- if (pdev->image_read_pos >= bytes_to_read) { /* All data has been read */
- pdev->image_read_pos = 0;
- pwc_next_image(pdev);
- }
- return count;
-}
-
-static unsigned int pwc_video_poll(struct file *file, poll_table *wait)
-{
- struct video_device *vdev = file->private_data;
- struct pwc_device *pdev;
-
- if (vdev == NULL)
- return -EFAULT;
- pdev = vdev->priv;
- if (pdev == NULL)
- return -EFAULT;
-
- poll_wait(file, &pdev->frameq, wait);
- if (pdev->error_status)
- return POLLERR;
- if (pdev->full_frames != NULL) /* we have frames waiting */
- return (POLLIN | POLLRDNORM);
-
- return 0;
-}
-
-static int pwc_video_do_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, void *arg)
-{
- struct video_device *vdev = file->private_data;
- struct pwc_device *pdev;
- DECLARE_WAITQUEUE(wait, current);
-
- if (vdev == NULL)
- return -EFAULT;
- pdev = vdev->priv;
- if (pdev == NULL)
- return -EFAULT;
-
- switch (cmd) {
- /* Query cabapilities */
- case VIDIOCGCAP:
- {
- struct video_capability *caps = arg;
-
- strcpy(caps->name, vdev->name);
- caps->type = VID_TYPE_CAPTURE;
- caps->channels = 1;
- caps->audios = 1;
- caps->minwidth = pdev->view_min.x;
- caps->minheight = pdev->view_min.y;
- caps->maxwidth = pdev->view_max.x;
- caps->maxheight = pdev->view_max.y;
- break;
- }
-
- /* Channel functions (simulate 1 channel) */
- case VIDIOCGCHAN:
- {
- struct video_channel *v = arg;
-
- if (v->channel != 0)
- return -EINVAL;
- v->flags = 0;
- v->tuners = 0;
- v->type = VIDEO_TYPE_CAMERA;
- strcpy(v->name, "Webcam");
- return 0;
- }
-
- case VIDIOCSCHAN:
- {
- /* The spec says the argument is an integer, but
- the bttv driver uses a video_channel arg, which
- makes sense becasue it also has the norm flag.
- */
- struct video_channel *v = arg;
- if (v->channel != 0)
- return -EINVAL;
- return 0;
- }
-
-
- /* Picture functions; contrast etc. */
- case VIDIOCGPICT:
- {
- struct video_picture *p = arg;
- int val;
-
- val = pwc_get_brightness(pdev);
- if (val >= 0)
- p->brightness = val;
- else
- p->brightness = 0xffff;
- val = pwc_get_contrast(pdev);
- if (val >= 0)
- p->contrast = val;
- else
- p->contrast = 0xffff;
- /* Gamma, Whiteness, what's the difference? :) */
- val = pwc_get_gamma(pdev);
- if (val >= 0)
- p->whiteness = val;
- else
- p->whiteness = 0xffff;
- val = pwc_get_saturation(pdev);
- if (val >= 0)
- p->colour = val;
- else
- p->colour = 0xffff;
- p->depth = 24;
- p->palette = pdev->vpalette;
- p->hue = 0xFFFF; /* N/A */
- break;
- }
-
- case VIDIOCSPICT:
- {
- struct video_picture *p = arg;
- /*
- * FIXME: Suppose we are mid read
- ANSWER: No problem: the firmware of the camera
- can handle brightness/contrast/etc
- changes at _any_ time, and the palette
- is used exactly once in the uncompress
- routine.
- */
- pwc_set_brightness(pdev, p->brightness);
- pwc_set_contrast(pdev, p->contrast);
- pwc_set_gamma(pdev, p->whiteness);
- pwc_set_saturation(pdev, p->colour);
- if (p->palette && p->palette != pdev->vpalette) {
- switch (p->palette) {
- case VIDEO_PALETTE_YUV420P:
- case VIDEO_PALETTE_RAW:
- pdev->vpalette = p->palette;
- return pwc_try_video_mode(pdev, pdev->image.x, pdev->image.y, pdev->vframes, pdev->vcompression, pdev->vsnapshot);
- break;
- default:
- return -EINVAL;
- break;
- }
- }
- break;
- }
-
- /* Window/size parameters */
- case VIDIOCGWIN:
- {
- struct video_window *vw = arg;
-
- vw->x = 0;
- vw->y = 0;
- vw->width = pdev->view.x;
- vw->height = pdev->view.y;
- vw->chromakey = 0;
- vw->flags = (pdev->vframes << PWC_FPS_SHIFT) |
- (pdev->vsnapshot ? PWC_FPS_SNAPSHOT : 0);
- break;
- }
-
- case VIDIOCSWIN:
- {
- struct video_window *vw = arg;
- int fps, snapshot, ret;
-
- fps = (vw->flags & PWC_FPS_FRMASK) >> PWC_FPS_SHIFT;
- snapshot = vw->flags & PWC_FPS_SNAPSHOT;
- if (fps == 0)
- fps = pdev->vframes;
- if (pdev->view.x == vw->width && pdev->view.y && fps == pdev->vframes && snapshot == pdev->vsnapshot)
- return 0;
- ret = pwc_try_video_mode(pdev, vw->width, vw->height, fps, pdev->vcompression, snapshot);
- if (ret)
- return ret;
- break;
- }
-
- /* We don't have overlay support (yet) */
- case VIDIOCGFBUF:
- {
- struct video_buffer *vb = arg;
-
- memset(vb,0,sizeof(*vb));
- break;
- }
-
- /* mmap() functions */
- case VIDIOCGMBUF:
- {
- /* Tell the user program how much memory is needed for a mmap() */
- struct video_mbuf *vm = arg;
- int i;
-
- memset(vm, 0, sizeof(*vm));
- vm->size = default_mbufs * pdev->len_per_image;
- vm->frames = default_mbufs; /* double buffering should be enough for most applications */
- for (i = 0; i < default_mbufs; i++)
- vm->offsets[i] = i * pdev->len_per_image;
- break;
- }
-
- case VIDIOCMCAPTURE:
- {
- /* Start capture into a given image buffer (called 'frame' in video_mmap structure) */
- struct video_mmap *vm = arg;
-
- Trace(TRACE_READ, "VIDIOCMCAPTURE: %dx%d, frame %d, format %d\n", vm->width, vm->height, vm->frame, vm->format);
- if (vm->frame < 0 || vm->frame >= default_mbufs)
- return -EINVAL;
-
- /* xawtv is nasty. It probes the available palettes
- by setting a very small image size and trying
- various palettes... The driver doesn't support
- such small images, so I'm working around it.
- */
- if (vm->format)
- {
- switch (vm->format)
- {
- case VIDEO_PALETTE_YUV420P:
- case VIDEO_PALETTE_RAW:
- break;
- default:
- return -EINVAL;
- break;
- }
- }
-
- if ((vm->width != pdev->view.x || vm->height != pdev->view.y) &&
- (vm->width >= pdev->view_min.x && vm->height >= pdev->view_min.y)) {
- int ret;
-
- Trace(TRACE_OPEN, "VIDIOCMCAPTURE: changing size to please xawtv :-(.\n");
- ret = pwc_try_video_mode(pdev, vm->width, vm->height, pdev->vframes, pdev->vcompression, pdev->vsnapshot);
- if (ret)
- return ret;
- } /* ... size mismatch */
-
- /* FIXME: should we lock here? */
- if (pdev->image_used[vm->frame])
- return -EBUSY; /* buffer wasn't available. Bummer */
- pdev->image_used[vm->frame] = 1;
-
- /* Okay, we're done here. In the SYNC call we wait until a
- frame comes available, then expand image into the given
- buffer.
- In contrast to the CPiA cam the Philips cams deliver a
- constant stream, almost like a grabber card. Also,
- we have separate buffers for the rawdata and the image,
- meaning we can nearly always expand into the requested buffer.
- */
- Trace(TRACE_READ, "VIDIOCMCAPTURE done.\n");
- break;
- }
-
- case VIDIOCSYNC:
- {
- /* The doc says: "Whenever a buffer is used it should
- call VIDIOCSYNC to free this frame up and continue."
-
- The only odd thing about this whole procedure is
- that MCAPTURE flags the buffer as "in use", and
- SYNC immediately unmarks it, while it isn't
- after SYNC that you know that the buffer actually
- got filled! So you better not start a CAPTURE in
- the same frame immediately (use double buffering).
- This is not a problem for this cam, since it has
- extra intermediate buffers, but a hardware
- grabber card will then overwrite the buffer
- you're working on.
- */
- int *mbuf = arg;
- int ret;
-
- Trace(TRACE_READ, "VIDIOCSYNC called (%d).\n", *mbuf);
-
- /* bounds check */
- if (*mbuf < 0 || *mbuf >= default_mbufs)
- return -EINVAL;
- /* check if this buffer was requested anyway */
- if (pdev->image_used[*mbuf] == 0)
- return -EINVAL;
-
- /* Add ourselves to the frame wait-queue.
-
- FIXME: needs auditing for safety.
- QUESTION: In what respect? I think that using the
- frameq is safe now.
- */
- add_wait_queue(&pdev->frameq, &wait);
- while (pdev->full_frames == NULL) {
- if (pdev->error_status) {
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
- return -pdev->error_status;
- }
-
- if (signal_pending(current)) {
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
- return -ERESTARTSYS;
- }
- schedule();
- set_current_state(TASK_INTERRUPTIBLE);
- }
- remove_wait_queue(&pdev->frameq, &wait);
- set_current_state(TASK_RUNNING);
-
- /* The frame is ready. Expand in the image buffer
- requested by the user. I don't care if you
- mmap() 5 buffers and request data in this order:
- buffer 4 2 3 0 1 2 3 0 4 3 1 . . .
- Grabber hardware may not be so forgiving.
- */
- Trace(TRACE_READ, "VIDIOCSYNC: frame ready.\n");
- pdev->fill_image = *mbuf; /* tell in which buffer we want the image to be expanded */
- /* Decompress, etc */
- ret = pwc_handle_frame(pdev);
- pdev->image_used[*mbuf] = 0;
- if (ret)
- return -EFAULT;
- break;
- }
-
- case VIDIOCGAUDIO:
- {
- struct video_audio *v = arg;
-
- strcpy(v->name, "Microphone");
- v->audio = -1; /* unknown audio minor */
- v->flags = 0;
- v->mode = VIDEO_SOUND_MONO;
- v->volume = 0;
- v->bass = 0;
- v->treble = 0;
- v->balance = 0x8000;
- v->step = 1;
- break;
- }
-
- case VIDIOCSAUDIO:
- {
- /* Dummy: nothing can be set */
- break;
- }
-
- case VIDIOCGUNIT:
- {
- struct video_unit *vu = arg;
-
- vu->video = pdev->vdev->minor & 0x3F;
- vu->audio = -1; /* not known yet */
- vu->vbi = -1;
- vu->radio = -1;
- vu->teletext = -1;
- break;
- }
- default:
- return pwc_ioctl(pdev, cmd, arg);
- } /* ..switch */
- return 0;
-}
-
-static int pwc_video_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- return video_usercopy(inode, file, cmd, arg, pwc_video_do_ioctl);
-}
-
-
-static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma)
-{
- struct video_device *vdev = file->private_data;
- struct pwc_device *pdev;
- unsigned long start = vma->vm_start;
- unsigned long size = vma->vm_end-vma->vm_start;
- unsigned long page, pos;
-
- Trace(TRACE_MEMORY, "mmap(0x%p, 0x%lx, %lu) called.\n", vdev, start, size);
- pdev = vdev->priv;
-
- vma->vm_flags |= VM_IO;
-
- pos = (unsigned long)pdev->image_data;
- while (size > 0) {
- page = kvirt_to_pa(pos);
- if (remap_page_range(vma, start, page, PAGE_SIZE, PAGE_SHARED))
- return -EAGAIN;
-
- start += PAGE_SIZE;
- pos += PAGE_SIZE;
- if (size > PAGE_SIZE)
- size -= PAGE_SIZE;
- else
- size = 0;
- }
-
- return 0;
-}
-
-/***************************************************************************/
-/* USB functions */
-
-/* This function gets called when a new device is plugged in or the usb core
- * is loaded.
- */
-
-static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id *id)
-{
- struct usb_device *udev = interface_to_usbdev(intf);
- struct pwc_device *pdev = NULL;
- int vendor_id, product_id, type_id;
- int i, hint;
- int features = 0;
- int video_nr = -1; /* default: use next available device */
- char serial_number[30], *name;
-
- /* Check if we can handle this device */
- Trace(TRACE_PROBE, "probe() called [%04X %04X], if %d\n",
- udev->descriptor.idVendor, udev->descriptor.idProduct,
- intf->altsetting->desc.bInterfaceNumber);
-
- /* the interfaces are probed one by one. We are only interested in the
- video interface (0) now.
- Interface 1 is the Audio Control, and interface 2 Audio itself.
- */
- if (intf->altsetting->desc.bInterfaceNumber > 0)
- return -ENODEV;
-
- vendor_id = udev->descriptor.idVendor;
- product_id = udev->descriptor.idProduct;
-
- if (vendor_id == 0x0471) {
- switch (product_id) {
- case 0x0302:
- Info("Philips PCA645VC USB webcam detected.\n");
- name = "Philips 645 webcam";
- type_id = 645;
- break;
- case 0x0303:
- Info("Philips PCA646VC USB webcam detected.\n");
- name = "Philips 646 webcam";
- type_id = 646;
- break;
- case 0x0304:
- Info("Askey VC010 type 2 USB webcam detected.\n");
- name = "Askey VC010 webcam";
- type_id = 646;
- break;
- case 0x0307:
- Info("Philips PCVC675K (Vesta) USB webcam detected.\n");
- name = "Philips 675 webcam";
- type_id = 675;
- break;
- case 0x0308:
- Info("Philips PCVC680K (Vesta Pro) USB webcam detected.\n");
- name = "Philips 680 webcam";
- type_id = 680;
- break;
- case 0x030C:
- Info("Philips PCVC690K (Vesta Pro Scan) USB webcam detected.\n");
- name = "Philips 690 webcam";
- type_id = 690;
- break;
- case 0x0310:
- Info("Philips PCVC730K (ToUCam Fun)/PCVC830 (ToUCam II) USB webcam detected.\n");
- name = "Philips 730 webcam";
- type_id = 730;
- break;
- case 0x0311:
- Info("Philips PCVC740K (ToUCam Pro)/PCVC840 (ToUCam II) USB webcam detected.\n");
- name = "Philips 740 webcam";
- type_id = 740;
- break;
- case 0x0312:
- Info("Philips PCVC750K (ToUCam Pro Scan) USB webcam detected.\n");
- name = "Philips 750 webcam";
- type_id = 750;
- break;
- case 0x0313:
- Info("Philips PCVC720K/40 (ToUCam XS) USB webcam detected.\n");
- name = "Philips 720K/40 webcam";
- type_id = 720;
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x069A) {
- switch(product_id) {
- case 0x0001:
- Info("Askey VC010 type 1 USB webcam detected.\n");
- name = "Askey VC010 webcam";
- type_id = 645;
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x046d) {
- switch(product_id) {
- case 0x08b0:
- Info("Logitech QuickCam Pro 3000 USB webcam detected.\n");
- name = "Logitech QuickCam Pro 3000";
- type_id = 740; /* CCD sensor */
- break;
- case 0x08b1:
- Info("Logitech QuickCam Notebook Pro USB webcam detected.\n");
- name = "Logitech QuickCam Notebook Pro";
- type_id = 740; /* CCD sensor */
- break;
- case 0x08b2:
- Info("Logitech QuickCam 4000 Pro USB webcam detected.\n");
- name = "Logitech QuickCam Pro 4000";
- type_id = 740; /* CCD sensor */
- break;
- case 0x08b3:
- Info("Logitech QuickCam Zoom USB webcam detected.\n");
- name = "Logitech QuickCam Zoom";
- type_id = 740; /* CCD sensor */
- break;
- case 0x08B4:
- Info("Logitech QuickCam Zoom (new model) USB webcam detected.\n");
- name = "Logitech QuickCam Zoom";
- type_id = 740; /* CCD sensor */
- break;
- case 0x08b5:
- Info("Logitech QuickCam Orbit/Sphere USB webcam detected.\n");
- name = "Logitech QuickCam Orbit";
- type_id = 740; /* CCD sensor */
- features |= FEATURE_MOTOR_PANTILT;
- break;
- case 0x08b6:
- case 0x08b7:
- case 0x08b8:
- Info("Logitech QuickCam detected (reserved ID).\n");
- name = "Logitech QuickCam (res.)";
- type_id = 730; /* Assuming CMOS */
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x055d) {
- /* I don't know the difference between the C10 and the C30;
- I suppose the difference is the sensor, but both cameras
- work equally well with a type_id of 675
- */
- switch(product_id) {
- case 0x9000:
- Info("Samsung MPC-C10 USB webcam detected.\n");
- name = "Samsung MPC-C10";
- type_id = 675;
- break;
- case 0x9001:
- Info("Samsung MPC-C30 USB webcam detected.\n");
- name = "Samsung MPC-C30";
- type_id = 675;
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x041e) {
- switch(product_id) {
- case 0x400c:
- Info("Creative Labs Webcam 5 detected.\n");
- name = "Creative Labs Webcam 5";
- type_id = 730;
- break;
- case 0x4011:
- Info("Creative Labs Webcam Pro Ex detected.\n");
- name = "Creative Labs Webcam Pro Ex";
- type_id = 740;
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x04cc) {
- switch(product_id) {
- case 0x8116:
- Info("Sotec Afina Eye USB webcam detected.\n");
- name = "Sotec Afina Eye";
- type_id = 730;
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else if (vendor_id == 0x06be) {
- switch(product_id) {
- case 0x8116:
- /* This is essentially the same cam as the Sotec Afina Eye */
- Info("AME Co. Afina Eye USB webcam detected.\n");
- name = "AME Co. Afina Eye";
- type_id = 750;
- break;
- default:
- return -ENODEV;
- break;
- }
-
- }
- else if (vendor_id == 0x0d81) {
- switch(product_id) {
- case 0x1900:
- Info("Visionite VCS-UC300 USB webcam detected.\n");
- name = "Visionite VCS-UC300";
- type_id = 740; /* CCD sensor */
- break;
- case 0x1910:
- Info("Visionite VCS-UM100 USB webcam detected.\n");
- name = "Visionite VCS-UM100";
- type_id = 730; /* CMOS sensor */
- break;
- default:
- return -ENODEV;
- break;
- }
- }
- else
- return -ENODEV; /* Not any of the know types; but the list keeps growing. */
-
- memset(serial_number, 0, 30);
- usb_string(udev, udev->descriptor.iSerialNumber, serial_number, 29);
- Trace(TRACE_PROBE, "Device serial number is %s\n", serial_number);
-
- if (udev->descriptor.bNumConfigurations > 1)
- Info("Warning: more than 1 configuration available.\n");
-
- /* Allocate structure, initialize pointers, mutexes, etc. and link it to the usb_device */
- pdev = kmalloc(sizeof(struct pwc_device), GFP_KERNEL);
- if (pdev == NULL) {
- Err("Oops, could not allocate memory for pwc_device.\n");
- return -ENOMEM;
- }
- memset(pdev, 0, sizeof(struct pwc_device));
- pdev->type = type_id;
- pdev->vsize = default_size;
- pdev->vframes = default_fps;
- strcpy(pdev->serial, serial_number);
- pdev->features = features;
- if (vendor_id == 0x046D && product_id == 0x08B5)
- {
- /* Logitech QuickCam Orbit
- The ranges have been determined experimentally; they may differ from cam to cam.
- Also, the exact ranges left-right and up-down are different for my cam
- */
- pdev->angle_range.pan_min = -7000;
- pdev->angle_range.pan_max = 7000;
- pdev->angle_range.tilt_min = -3000;
- pdev->angle_range.tilt_max = 2500;
- }
-
- init_MUTEX(&pdev->modlock);
- pdev->ptrlock = SPIN_LOCK_UNLOCKED;
-
- pdev->udev = udev;
- init_waitqueue_head(&pdev->frameq);
- pdev->vcompression = pwc_preferred_compression;
-
- /* Allocate video_device structure */
- pdev->vdev = video_device_alloc();
- if (pdev->vdev == 0)
- {
- Err("Err, cannot allocate video_device struture. Failing probe.");
- kfree(pdev);
- return -ENOMEM;
- }
- memcpy(pdev->vdev, &pwc_template, sizeof(pwc_template));
- strcpy(pdev->vdev->name, name);
- pdev->vdev->owner = THIS_MODULE;
- video_set_drvdata(pdev->vdev, pdev);
-
- pdev->release = udev->descriptor.bcdDevice;
- Trace(TRACE_PROBE, "Release: %04x\n", pdev->release);
-
- /* Now search device_hint[] table for a match, so we can hint a node number. */
- for (hint = 0; hint < MAX_DEV_HINTS; hint++) {
- if (((device_hint[hint].type == -1) || (device_hint[hint].type == pdev->type)) &&
- (device_hint[hint].pdev == NULL)) {
- /* so far, so good... try serial number */
- if ((device_hint[hint].serial_number[0] == '*') || !strcmp(device_hint[hint].serial_number, serial_number)) {
- /* match! */
- video_nr = device_hint[hint].device_node;
- Trace(TRACE_PROBE, "Found hint, will try to register as /dev/video%d\n", video_nr);
- break;
- }
- }
- }
-
- pdev->vdev->release = video_device_release;
- i = video_register_device(pdev->vdev, VFL_TYPE_GRABBER, video_nr);
- if (i < 0) {
- Err("Failed to register as video device (%d).\n", i);
- video_device_release(pdev->vdev); /* Drip... drip... drip... */
- kfree(pdev); /* Oops, no memory leaks please */
- return -EIO;
- }
- else {
- Info("Registered as /dev/video%d.\n", pdev->vdev->minor & 0x3F);
- }
-
- /* occupy slot */
- if (hint < MAX_DEV_HINTS)
- device_hint[hint].pdev = pdev;
-
- Trace(TRACE_PROBE, "probe() function returning struct at 0x%p.\n", pdev);
- usb_set_intfdata (intf, pdev);
- return 0;
-}
-
-/* The user janked out the cable... */
-static void usb_pwc_disconnect(struct usb_interface *intf)
-{
- struct pwc_device *pdev;
- int hint;
-
- lock_kernel();
- pdev = usb_get_intfdata (intf);
- usb_set_intfdata (intf, NULL);
- if (pdev == NULL) {
- Err("pwc_disconnect() Called without private pointer.\n");
- goto disconnect_out;
- }
- if (pdev->udev == NULL) {
- Err("pwc_disconnect() already called for %p\n", pdev);
- goto disconnect_out;
- }
- if (pdev->udev != interface_to_usbdev(intf)) {
- Err("pwc_disconnect() Woops: pointer mismatch udev/pdev.\n");
- goto disconnect_out;
- }
-#ifdef PWC_MAGIC
- if (pdev->magic != PWC_MAGIC) {
- Err("pwc_disconnect() Magic number failed. Consult your scrolls and try again.\n");
- goto disconnect_out;
- }
-#endif
-
- /* We got unplugged; this is signalled by an EPIPE error code */
- if (pdev->vopen) {
- Info("Disconnected while webcam is in use!\n");
- pdev->error_status = EPIPE;
- }
-
- /* Alert waiting processes */
- wake_up_interruptible(&pdev->frameq);
- /* Wait until device is closed */
- while (pdev->vopen)
- schedule();
- /* Device is now closed, so we can safely unregister it */
- Trace(TRACE_PROBE, "Unregistering video device in disconnect().\n");
- video_unregister_device(pdev->vdev);
-
- /* Free memory (don't set pdev to 0 just yet) */
- kfree(pdev);
-
-disconnect_out:
- /* search device_hint[] table if we occupy a slot, by any chance */
- for (hint = 0; hint < MAX_DEV_HINTS; hint++)
- if (device_hint[hint].pdev == pdev)
- device_hint[hint].pdev = NULL;
-
- unlock_kernel();
-}
-
-
-/* *grunt* We have to do atoi ourselves :-( */
-static int pwc_atoi(const char *s)
-{
- int k = 0;
-
- k = 0;
- while (*s != '\0' && *s >= '0' && *s <= '9') {
- k = 10 * k + (*s - '0');
- s++;
- }
- return k;
-}
-
-
-/*
- * Initialization code & module stuff
- */
-
-static char *size = NULL;
-static int fps = 0;
-static int fbufs = 0;
-static int mbufs = 0;
-static int trace = -1;
-static int compression = -1;
-static int leds[2] = { -1, -1 };
-static char *dev_hint[MAX_DEV_HINTS] = { };
-
-MODULE_PARM(size, "s");
-MODULE_PARM_DESC(size, "Initial image size. One of sqcif, qsif, qcif, sif, cif, vga");
-MODULE_PARM(fps, "i");
-MODULE_PARM_DESC(fps, "Initial frames per second. Varies with model, useful range 5-30");
-MODULE_PARM(fbufs, "i");
-MODULE_PARM_DESC(fbufs, "Number of internal frame buffers to reserve");
-MODULE_PARM(mbufs, "i");
-MODULE_PARM_DESC(mbufs, "Number of external (mmap()ed) image buffers");
-MODULE_PARM(trace, "i");
-MODULE_PARM_DESC(trace, "For debugging purposes");
-MODULE_PARM(power_save, "i");
-MODULE_PARM_DESC(power_save, "Turn power save feature in camera on or off");
-MODULE_PARM(compression, "i");
-MODULE_PARM_DESC(compression, "Preferred compression quality. Range 0 (uncompressed) to 3 (high compression)");
-MODULE_PARM(leds, "2i");
-MODULE_PARM_DESC(leds, "LED on,off time in milliseconds");
-MODULE_PARM(dev_hint, "0-20s");
-MODULE_PARM_DESC(dev_hint, "Device node hints");
-
-MODULE_DESCRIPTION("Philips & OEM USB webcam driver");
-MODULE_AUTHOR("Luc Saillard <luc@saillard.org>");
-MODULE_LICENSE("GPL");
-
-static int __init usb_pwc_init(void)
-{
- int i, sz;
- char *sizenames[PSZ_MAX] = { "sqcif", "qsif", "qcif", "sif", "cif", "vga" };
-
- Info("Philips webcam module version " PWC_VERSION " loaded.\n");
- Info("Supports Philips PCA645/646, PCVC675/680/690, PCVC720[40]/730/740/750 & PCVC830/840.\n");
- Info("Also supports the Askey VC010, various Logitech Quickcams, Samsung MPC-C10 and MPC-C30,\n");
- Info("the Creative WebCam 5 & Pro Ex, SOTEC Afina Eye and Visionite VCS-UC300 and VCS-UM100.\n");
-
- if (fps) {
- if (fps < 4 || fps > 30) {
- Err("Framerate out of bounds (4-30).\n");
- return -EINVAL;
- }
- default_fps = fps;
- Info("Default framerate set to %d.\n", default_fps);
- }
-
- if (size) {
- /* string; try matching with array */
- for (sz = 0; sz < PSZ_MAX; sz++) {
- if (!strcmp(sizenames[sz], size)) { /* Found! */
- default_size = sz;
- break;
- }
- }
- if (sz == PSZ_MAX) {
- Err("Size not recognized; try size=[sqcif | qsif | qcif | sif | cif | vga].\n");
- return -EINVAL;
- }
- Info("Default image size set to %s [%dx%d].\n", sizenames[default_size], pwc_image_sizes[default_size].x, pwc_image_sizes[default_size].y);
- }
- if (mbufs) {
- if (mbufs < 1 || mbufs > MAX_IMAGES) {
- Err("Illegal number of mmap() buffers; use a number between 1 and %d.\n", MAX_IMAGES);
- return -EINVAL;
- }
- default_mbufs = mbufs;
- Info("Number of image buffers set to %d.\n", default_mbufs);
- }
- if (fbufs) {
- if (fbufs < 2 || fbufs > MAX_FRAMES) {
- Err("Illegal number of frame buffers; use a number between 2 and %d.\n", MAX_FRAMES);
- return -EINVAL;
- }
- default_fbufs = fbufs;
- Info("Number of frame buffers set to %d.\n", default_fbufs);
- }
- if (trace >= 0) {
- Info("Trace options: 0x%04x\n", trace);
- pwc_trace = trace;
- }
- if (compression >= 0) {
- if (compression > 3) {
- Err("Invalid compression setting; use a number between 0 (uncompressed) and 3 (high).\n");
- return -EINVAL;
- }
- pwc_preferred_compression = compression;
- Info("Preferred compression set to %d.\n", pwc_preferred_compression);
- }
- if (power_save)
- Info("Enabling power save on open/close.\n");
- if (leds[0] >= 0)
- led_on = leds[0];
- if (leds[1] >= 0)
- led_off = leds[1];
-
- /* Big device node whoopla. Basicly, it allows you to assign a
- device node (/dev/videoX) to a camera, based on its type
- & serial number. The format is [type[.serialnumber]:]node.
-
- Any camera that isn't matched by these rules gets the next
- available free device node.
- */
- for (i = 0; i < MAX_DEV_HINTS; i++) {
- char *s, *colon, *dot;
-
- /* This loop also initializes the array */
- device_hint[i].pdev = NULL;
- s = dev_hint[i];
- if (s != NULL && *s != '\0') {
- device_hint[i].type = -1; /* wildcard */
- strcpy(device_hint[i].serial_number, "*");
-
- /* parse string: chop at ':' & '/' */
- colon = dot = s;
- while (*colon != '\0' && *colon != ':')
- colon++;
- while (*dot != '\0' && *dot != '.')
- dot++;
- /* Few sanity checks */
- if (*dot != '\0' && dot > colon) {
- Err("Malformed camera hint: the colon must be after the dot.\n");
- return -EINVAL;
- }
-
- if (*colon == '\0') {
- /* No colon */
- if (*dot != '\0') {
- Err("Malformed camera hint: no colon + device node given.\n");
- return -EINVAL;
- }
- else {
- /* No type or serial number specified, just a number. */
- device_hint[i].device_node = pwc_atoi(s);
- }
- }
- else {
- /* There's a colon, so we have at least a type and a device node */
- device_hint[i].type = pwc_atoi(s);
- device_hint[i].device_node = pwc_atoi(colon + 1);
- if (*dot != '\0') {
- /* There's a serial number as well */
- int k;
-
- dot++;
- k = 0;
- while (*dot != ':' && k < 29) {
- device_hint[i].serial_number[k++] = *dot;
- dot++;
- }
- device_hint[i].serial_number[k] = '\0';
- }
- }
-#if PWC_DEBUG
- Debug("device_hint[%d]:\n", i);
- Debug(" type : %d\n", device_hint[i].type);
- Debug(" serial# : %s\n", device_hint[i].serial_number);
- Debug(" node : %d\n", device_hint[i].device_node);
-#endif
- }
- else
- device_hint[i].type = 0; /* not filled */
- } /* ..for MAX_DEV_HINTS */
-
- Trace(TRACE_PROBE, "Registering driver at address 0x%p.\n", &pwc_driver);
- return usb_register(&pwc_driver);
-}
-
-static void __exit usb_pwc_exit(void)
-{
- Trace(TRACE_MODULE, "Deregistering driver.\n");
- usb_deregister(&pwc_driver);
- Info("Philips webcam module removed.\n");
-}
-
-module_init(usb_pwc_init);
-module_exit(usb_pwc_exit);
-
+++ /dev/null
-#ifndef PWC_IOCTL_H
-#define PWC_IOCTL_H
-
-/* (C) 2001-2004 Nemosoft Unv.
- (C) 2004 Luc Saillard (luc@saillard.org)
-
- NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
- driver and thus may have bugs that are not present in the original version.
- Please send bug reports and support requests to <luc@saillard.org>.
- The decompression routines have been implemented by reverse-engineering the
- Nemosoft binary pwcx module. Caveat emptor.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-/* This is pwc-ioctl.h belonging to PWC 8.12.1
- It contains structures and defines to communicate from user space
- directly to the driver.
- */
-
-/*
- Changes
- 2001/08/03 Alvarado Added ioctl constants to access methods for
- changing white balance and red/blue gains
- 2002/12/15 G. H. Fernandez-Toribio VIDIOCGREALSIZE
- 2003/12/13 Nemosft Unv. Some modifications to make interfacing to
- PWCX easier
- */
-
-/* These are private ioctl() commands, specific for the Philips webcams.
- They contain functions not found in other webcams, and settings not
- specified in the Video4Linux API.
-
- The #define names are built up like follows:
- VIDIOC VIDeo IOCtl prefix
- PWC Philps WebCam
- G optional: Get
- S optional: Set
- ... the function
- */
-
-
- /* Enumeration of image sizes */
-#define PSZ_SQCIF 0x00
-#define PSZ_QSIF 0x01
-#define PSZ_QCIF 0x02
-#define PSZ_SIF 0x03
-#define PSZ_CIF 0x04
-#define PSZ_VGA 0x05
-#define PSZ_MAX 6
-
-
-/* The frame rate is encoded in the video_window.flags parameter using
- the upper 16 bits, since some flags are defined nowadays. The following
- defines provide a mask and shift to filter out this value.
-
- In 'Snapshot' mode the camera freezes its automatic exposure and colour
- balance controls.
- */
-#define PWC_FPS_SHIFT 16
-#define PWC_FPS_MASK 0x00FF0000
-#define PWC_FPS_FRMASK 0x003F0000
-#define PWC_FPS_SNAPSHOT 0x00400000
-
-
-/* structure for transfering x & y coordinates */
-struct pwc_coord
-{
- int x, y; /* guess what */
- int size; /* size, or offset */
-};
-
-
-/* Used with VIDIOCPWCPROBE */
-struct pwc_probe
-{
- char name[32];
- int type;
-};
-
-struct pwc_serial
-{
- char serial[30]; /* String with serial number. Contains terminating 0 */
-};
-
-/* pwc_whitebalance.mode values */
-#define PWC_WB_INDOOR 0
-#define PWC_WB_OUTDOOR 1
-#define PWC_WB_FL 2
-#define PWC_WB_MANUAL 3
-#define PWC_WB_AUTO 4
-
-/* Used with VIDIOCPWC[SG]AWB (Auto White Balance).
- Set mode to one of the PWC_WB_* values above.
- *red and *blue are the respective gains of these colour components inside
- the camera; range 0..65535
- When 'mode' == PWC_WB_MANUAL, 'manual_red' and 'manual_blue' are set or read;
- otherwise undefined.
- 'read_red' and 'read_blue' are read-only.
-*/
-struct pwc_whitebalance
-{
- int mode;
- int manual_red, manual_blue; /* R/W */
- int read_red, read_blue; /* R/O */
-};
-
-/*
- 'control_speed' and 'control_delay' are used in automatic whitebalance mode,
- and tell the camera how fast it should react to changes in lighting, and
- with how much delay. Valid values are 0..65535.
-*/
-struct pwc_wb_speed
-{
- int control_speed;
- int control_delay;
-
-};
-
-/* Used with VIDIOCPWC[SG]LED */
-struct pwc_leds
-{
- int led_on; /* Led on-time; range = 0..25000 */
- int led_off; /* Led off-time; range = 0..25000 */
-};
-
-/* Image size (used with GREALSIZE) */
-struct pwc_imagesize
-{
- int width;
- int height;
-};
-
-/* Defines and structures for Motorized Pan & Tilt */
-#define PWC_MPT_PAN 0x01
-#define PWC_MPT_TILT 0x02
-#define PWC_MPT_TIMEOUT 0x04 /* for status */
-
-/* Set angles; when absolute != 0, the angle is absolute and the
- driver calculates the relative offset for you. This can only
- be used with VIDIOCPWCSANGLE; VIDIOCPWCGANGLE always returns
- absolute angles.
- */
-struct pwc_mpt_angles
-{
- int absolute; /* write-only */
- int pan; /* degrees * 100 */
- int tilt; /* degress * 100 */
-};
-
-/* Range of angles of the camera, both horizontally and vertically.
- */
-struct pwc_mpt_range
-{
- int pan_min, pan_max; /* degrees * 100 */
- int tilt_min, tilt_max;
-};
-
-struct pwc_mpt_status
-{
- int status;
- int time_pan;
- int time_tilt;
-};
-
-
-/* This is used for out-of-kernel decompression. With it, you can get
- all the necessary information to initialize and use the decompressor
- routines in standalone applications.
- */
-struct pwc_video_command
-{
- int type; /* camera type (645, 675, 730, etc.) */
- int release; /* release number */
-
- int size; /* one of PSZ_* */
- int alternate;
- int command_len; /* length of USB video command */
- unsigned char command_buf[13]; /* Actual USB video command */
- int bandlength; /* >0 = compressed */
- int frame_size; /* Size of one (un)compressed frame */
-};
-
-/* Flags for PWCX subroutines. Not all modules honour all flags. */
-#define PWCX_FLAG_PLANAR 0x0001
-#define PWCX_FLAG_BAYER 0x0008
-
-
-/* IOCTL definitions */
-
- /* Restore user settings */
-#define VIDIOCPWCRUSER _IO('v', 192)
- /* Save user settings */
-#define VIDIOCPWCSUSER _IO('v', 193)
- /* Restore factory settings */
-#define VIDIOCPWCFACTORY _IO('v', 194)
-
- /* You can manipulate the compression factor. A compression preference of 0
- means use uncompressed modes when available; 1 is low compression, 2 is
- medium and 3 is high compression preferred. Of course, the higher the
- compression, the lower the bandwidth used but more chance of artefacts
- in the image. The driver automatically chooses a higher compression when
- the preferred mode is not available.
- */
- /* Set preferred compression quality (0 = uncompressed, 3 = highest compression) */
-#define VIDIOCPWCSCQUAL _IOW('v', 195, int)
- /* Get preferred compression quality */
-#define VIDIOCPWCGCQUAL _IOR('v', 195, int)
-
-
-/* Retrieve serial number of camera */
-#define VIDIOCPWCGSERIAL _IOR('v', 198, struct pwc_serial)
-
- /* This is a probe function; since so many devices are supported, it
- becomes difficult to include all the names in programs that want to
- check for the enhanced Philips stuff. So in stead, try this PROBE;
- it returns a structure with the original name, and the corresponding
- Philips type.
- To use, fill the structure with zeroes, call PROBE and if that succeeds,
- compare the name with that returned from VIDIOCGCAP; they should be the
- same. If so, you can be assured it is a Philips (OEM) cam and the type
- is valid.
- */
-#define VIDIOCPWCPROBE _IOR('v', 199, struct pwc_probe)
-
- /* Set AGC (Automatic Gain Control); int < 0 = auto, 0..65535 = fixed */
-#define VIDIOCPWCSAGC _IOW('v', 200, int)
- /* Get AGC; int < 0 = auto; >= 0 = fixed, range 0..65535 */
-#define VIDIOCPWCGAGC _IOR('v', 200, int)
- /* Set shutter speed; int < 0 = auto; >= 0 = fixed, range 0..65535 */
-#define VIDIOCPWCSSHUTTER _IOW('v', 201, int)
-
- /* Color compensation (Auto White Balance) */
-#define VIDIOCPWCSAWB _IOW('v', 202, struct pwc_whitebalance)
-#define VIDIOCPWCGAWB _IOR('v', 202, struct pwc_whitebalance)
-
- /* Auto WB speed */
-#define VIDIOCPWCSAWBSPEED _IOW('v', 203, struct pwc_wb_speed)
-#define VIDIOCPWCGAWBSPEED _IOR('v', 203, struct pwc_wb_speed)
-
- /* LEDs on/off/blink; int range 0..65535 */
-#define VIDIOCPWCSLED _IOW('v', 205, struct pwc_leds)
-#define VIDIOCPWCGLED _IOR('v', 205, struct pwc_leds)
-
- /* Contour (sharpness); int < 0 = auto, 0..65536 = fixed */
-#define VIDIOCPWCSCONTOUR _IOW('v', 206, int)
-#define VIDIOCPWCGCONTOUR _IOR('v', 206, int)
-
- /* Backlight compensation; 0 = off, otherwise on */
-#define VIDIOCPWCSBACKLIGHT _IOW('v', 207, int)
-#define VIDIOCPWCGBACKLIGHT _IOR('v', 207, int)
-
- /* Flickerless mode; = 0 off, otherwise on */
-#define VIDIOCPWCSFLICKER _IOW('v', 208, int)
-#define VIDIOCPWCGFLICKER _IOR('v', 208, int)
-
- /* Dynamic noise reduction; 0 off, 3 = high noise reduction */
-#define VIDIOCPWCSDYNNOISE _IOW('v', 209, int)
-#define VIDIOCPWCGDYNNOISE _IOR('v', 209, int)
-
- /* Real image size as used by the camera; tells you whether or not there's a gray border around the image */
-#define VIDIOCPWCGREALSIZE _IOR('v', 210, struct pwc_imagesize)
-
- /* Motorized pan & tilt functions */
-#define VIDIOCPWCMPTRESET _IOW('v', 211, int)
-#define VIDIOCPWCMPTGRANGE _IOR('v', 211, struct pwc_mpt_range)
-#define VIDIOCPWCMPTSANGLE _IOW('v', 212, struct pwc_mpt_angles)
-#define VIDIOCPWCMPTGANGLE _IOR('v', 212, struct pwc_mpt_angles)
-#define VIDIOCPWCMPTSTATUS _IOR('v', 213, struct pwc_mpt_status)
-
- /* Get the USB set-video command; needed for initializing libpwcx */
-#define VIDIOCPWCGVIDCMD _IOR('v', 215, struct pwc_video_command)
-struct pwc_table_init_buffer {
- int len;
- char *buffer;
-
-};
-#define VIDIOCPWCGVIDTABLE _IOR('v', 216, struct pwc_table_init_buffer)
-
-#endif
+++ /dev/null
-/* Linux driver for Philips webcam
- (C) 2004 Luc Saillard (luc@saillard.org)
-
- NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
- driver and thus may have bugs that are not present in the original version.
- Please send bug reports and support requests to <luc@saillard.org>.
- The decompression routines have been implemented by reverse-engineering the
- Nemosoft binary pwcx module. Caveat emptor.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-
-/* This tables contains entries for the 730/740/750 (Kiara) camera, with
- 4 different qualities (no compression, low, medium, high).
- It lists the bandwidth requirements for said mode by its alternate interface
- number. An alternate of 0 means that the mode is unavailable.
-
- There are 6 * 4 * 4 entries:
- 6 different resolutions subqcif, qsif, qcif, sif, cif, vga
- 6 framerates: 5, 10, 15, 20, 25, 30
- 4 compression modi: none, low, medium, high
-
- When an uncompressed mode is not available, the next available compressed mode
- will be chosen (unless the decompressor is absent). Sometimes there are only
- 1 or 2 compressed modes available; in that case entries are duplicated.
-*/
-
-
-#include "pwc-kiara.h"
-#include "pwc-uncompress.h"
-
-const struct Kiara_table_entry Kiara_table[PSZ_MAX][6][4] =
-{
- /* SQCIF */
- {
- /* 5 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 10 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 15 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 20 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 25 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 30 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- },
- /* QSIF */
- {
- /* 5 fps */
- {
- {1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
- {1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
- {1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
- {1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
- },
- /* 10 fps */
- {
- {2, 291, 0, {0x1C, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x23, 0x01, 0x80}},
- {1, 192, 630, {0x14, 0xF4, 0x30, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xC0, 0x00, 0x80}},
- {1, 192, 630, {0x14, 0xF4, 0x30, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xC0, 0x00, 0x80}},
- {1, 192, 630, {0x14, 0xF4, 0x30, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xC0, 0x00, 0x80}},
- },
- /* 15 fps */
- {
- {3, 437, 0, {0x1B, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xB5, 0x01, 0x80}},
- {2, 292, 640, {0x13, 0xF4, 0x30, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x20, 0x24, 0x01, 0x80}},
- {2, 292, 640, {0x13, 0xF4, 0x30, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x20, 0x24, 0x01, 0x80}},
- {1, 192, 420, {0x13, 0xF4, 0x30, 0x0D, 0x1B, 0x0C, 0x53, 0x1E, 0x18, 0xC0, 0x00, 0x80}},
- },
- /* 20 fps */
- {
- {4, 589, 0, {0x1A, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x4D, 0x02, 0x80}},
- {3, 448, 730, {0x12, 0xF4, 0x30, 0x16, 0xC9, 0x16, 0x01, 0x0E, 0x18, 0xC0, 0x01, 0x80}},
- {2, 292, 476, {0x12, 0xF4, 0x30, 0x0E, 0xD8, 0x0E, 0x10, 0x19, 0x18, 0x24, 0x01, 0x80}},
- {1, 192, 312, {0x12, 0xF4, 0x50, 0x09, 0xB3, 0x08, 0xEB, 0x1E, 0x18, 0xC0, 0x00, 0x80}},
- },
- /* 25 fps */
- {
- {5, 703, 0, {0x19, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xBF, 0x02, 0x80}},
- {3, 447, 610, {0x11, 0xF4, 0x30, 0x13, 0x0B, 0x12, 0x43, 0x14, 0x28, 0xBF, 0x01, 0x80}},
- {2, 292, 398, {0x11, 0xF4, 0x50, 0x0C, 0x6C, 0x0B, 0xA4, 0x1E, 0x28, 0x24, 0x01, 0x80}},
- {1, 193, 262, {0x11, 0xF4, 0x50, 0x08, 0x23, 0x07, 0x5B, 0x1E, 0x28, 0xC1, 0x00, 0x80}},
- },
- /* 30 fps */
- {
- {8, 874, 0, {0x18, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x6A, 0x03, 0x80}},
- {5, 704, 730, {0x10, 0xF4, 0x30, 0x16, 0xC9, 0x16, 0x01, 0x0E, 0x28, 0xC0, 0x02, 0x80}},
- {3, 448, 492, {0x10, 0xF4, 0x30, 0x0F, 0x5D, 0x0E, 0x95, 0x15, 0x28, 0xC0, 0x01, 0x80}},
- {2, 292, 320, {0x10, 0xF4, 0x50, 0x09, 0xFB, 0x09, 0x33, 0x1E, 0x28, 0x24, 0x01, 0x80}},
- },
- },
- /* QCIF */
- {
- /* 5 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 10 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 15 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 20 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 25 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 30 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- },
- /* SIF */
- {
- /* 5 fps */
- {
- {4, 582, 0, {0x0D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x46, 0x02, 0x80}},
- {3, 387, 1276, {0x05, 0xF4, 0x30, 0x27, 0xD8, 0x26, 0x48, 0x03, 0x10, 0x83, 0x01, 0x80}},
- {2, 291, 960, {0x05, 0xF4, 0x30, 0x1D, 0xF2, 0x1C, 0x62, 0x04, 0x10, 0x23, 0x01, 0x80}},
- {1, 191, 630, {0x05, 0xF4, 0x50, 0x13, 0xA9, 0x12, 0x19, 0x05, 0x18, 0xBF, 0x00, 0x80}},
- },
- /* 10 fps */
- {
- {0, },
- {6, 775, 1278, {0x04, 0xF4, 0x30, 0x27, 0xE8, 0x26, 0x58, 0x05, 0x30, 0x07, 0x03, 0x80}},
- {3, 447, 736, {0x04, 0xF4, 0x30, 0x16, 0xFB, 0x15, 0x6B, 0x05, 0x28, 0xBF, 0x01, 0x80}},
- {2, 292, 480, {0x04, 0xF4, 0x70, 0x0E, 0xF9, 0x0D, 0x69, 0x09, 0x28, 0x24, 0x01, 0x80}},
- },
- /* 15 fps */
- {
- {0, },
- {9, 955, 1050, {0x03, 0xF4, 0x30, 0x20, 0xCF, 0x1F, 0x3F, 0x06, 0x48, 0xBB, 0x03, 0x80}},
- {4, 592, 650, {0x03, 0xF4, 0x30, 0x14, 0x44, 0x12, 0xB4, 0x08, 0x30, 0x50, 0x02, 0x80}},
- {3, 448, 492, {0x03, 0xF4, 0x50, 0x0F, 0x52, 0x0D, 0xC2, 0x09, 0x38, 0xC0, 0x01, 0x80}},
- },
- /* 20 fps */
- {
- {0, },
- {9, 958, 782, {0x02, 0xF4, 0x30, 0x18, 0x6A, 0x16, 0xDA, 0x0B, 0x58, 0xBE, 0x03, 0x80}},
- {5, 703, 574, {0x02, 0xF4, 0x50, 0x11, 0xE7, 0x10, 0x57, 0x0B, 0x40, 0xBF, 0x02, 0x80}},
- {3, 446, 364, {0x02, 0xF4, 0x90, 0x0B, 0x5C, 0x09, 0xCC, 0x0E, 0x38, 0xBE, 0x01, 0x80}},
- },
- /* 25 fps */
- {
- {0, },
- {9, 958, 654, {0x01, 0xF4, 0x30, 0x14, 0x66, 0x12, 0xD6, 0x0B, 0x50, 0xBE, 0x03, 0x80}},
- {6, 776, 530, {0x01, 0xF4, 0x50, 0x10, 0x8C, 0x0E, 0xFC, 0x0C, 0x48, 0x08, 0x03, 0x80}},
- {4, 592, 404, {0x01, 0xF4, 0x70, 0x0C, 0x96, 0x0B, 0x06, 0x0B, 0x48, 0x50, 0x02, 0x80}},
- },
- /* 30 fps */
- {
- {0, },
- {9, 957, 526, {0x00, 0xF4, 0x50, 0x10, 0x68, 0x0E, 0xD8, 0x0D, 0x58, 0xBD, 0x03, 0x80}},
- {6, 775, 426, {0x00, 0xF4, 0x70, 0x0D, 0x48, 0x0B, 0xB8, 0x0F, 0x50, 0x07, 0x03, 0x80}},
- {4, 590, 324, {0x00, 0x7A, 0x88, 0x0A, 0x1C, 0x08, 0xB4, 0x0E, 0x50, 0x4E, 0x02, 0x80}},
- },
- },
- /* CIF */
- {
- /* 5 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 10 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 15 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 20 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 25 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 30 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- },
- /* VGA */
- {
- /* 5 fps */
- {
- {0, },
- {6, 773, 1272, {0x25, 0xF4, 0x30, 0x27, 0xB6, 0x24, 0x96, 0x02, 0x30, 0x05, 0x03, 0x80}},
- {4, 592, 976, {0x25, 0xF4, 0x50, 0x1E, 0x78, 0x1B, 0x58, 0x03, 0x30, 0x50, 0x02, 0x80}},
- {3, 448, 738, {0x25, 0xF4, 0x90, 0x17, 0x0C, 0x13, 0xEC, 0x04, 0x30, 0xC0, 0x01, 0x80}},
- },
- /* 10 fps */
- {
- {0, },
- {9, 956, 788, {0x24, 0xF4, 0x70, 0x18, 0x9C, 0x15, 0x7C, 0x03, 0x48, 0xBC, 0x03, 0x80}},
- {6, 776, 640, {0x24, 0xF4, 0xB0, 0x13, 0xFC, 0x11, 0x2C, 0x04, 0x48, 0x08, 0x03, 0x80}},
- {4, 592, 488, {0x24, 0x7A, 0xE8, 0x0F, 0x3C, 0x0C, 0x6C, 0x06, 0x48, 0x50, 0x02, 0x80}},
- },
- /* 15 fps */
- {
- {0, },
- {9, 957, 526, {0x23, 0x7A, 0xE8, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x03, 0x80}},
- {9, 957, 526, {0x23, 0x7A, 0xE8, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x03, 0x80}},
- {8, 895, 492, {0x23, 0x7A, 0xE8, 0x0F, 0x5D, 0x0C, 0x8D, 0x06, 0x58, 0x7F, 0x03, 0x80}},
- },
- /* 20 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 25 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 30 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- },
-};
-
-
-/*
- * Rom table for kiara chips
- *
- * 32 roms tables (one for each resolution ?)
- * 2 tables per roms (one for each passes) (Y, and U&V)
- * 128 bytes per passes
- */
-
-const unsigned int KiaraRomTable [8][2][16][8] =
-{
- { /* version 0 */
- { /* version 0, passes 0 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000001,0x00000001},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000009,0x00000009,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00000009,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000249,0x0000024a,0x00000049},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000249,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000249,
- 0x00000249,0x0000124a,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000249,
- 0x0000124a,0x00009252,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00009252,0x00009292,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009292,0x00009292,0x00009493,0x000124db},
- {0x00000000,0x00000000,0x00000249,0x0000924a,
- 0x00009492,0x0000a49b,0x0000a49b,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x0000a493,0x000124db,0x000124db,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x000124db,0x000126dc,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000124db,0x000136e4,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b925,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 0, passes 1 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000},
- {0x00000000,0x00000000,0x00000001,0x00000009,
- 0x00000009,0x00000009,0x00000009,0x00000001},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000249,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00001252},
- {0x00000000,0x00000000,0x00000049,0x00001249,
- 0x0000124a,0x0000124a,0x00001252,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009252,0x00009252,0x00009292,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x0000924a,
- 0x00009292,0x00009292,0x00009292,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x00009292,
- 0x00009492,0x00009493,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x0000a493,0x000124db,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00009252,0x00009493,
- 0x000126dc,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000136e4,0x000136e4,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 1 */
- { /* version 1, passes 0 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000001},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000009,0x00000009,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00001252},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x0000124a,0x00009252,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009252,0x00009292,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009252,0x00009292,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x0000924a,
- 0x00009252,0x00009493,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x0000924a,
- 0x00009292,0x00009493,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x00009252,
- 0x00009492,0x00009493,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x000124db,0x000124db,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000126dc,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 1, passes 1 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000},
- {0x00000000,0x00000000,0x00000049,0x00000009,
- 0x00000049,0x00000009,0x00000001,0x00000000},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000000},
- {0x00000000,0x00000000,0x00000249,0x00000049,
- 0x00000249,0x00000049,0x0000024a,0x00000001},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00000001},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00000001},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x0000024a,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x0000024a,0x00000009},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x00009252,0x00001252,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x00009292,0x00001252,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x00009292,0x00001252,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009292,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x0000924a,0x0000924a,
- 0x00009492,0x00009493,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 2 */
- { /* version 2, passes 0 */
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x0000124a,0x00001252,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x00009252,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x0000124a,0x00009292,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009252,0x00009493,0x00009493,0x0000a49b},
- {0x00000000,0x00000000,0x00000249,0x0000924a,
- 0x00009292,0x00009493,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009292,0x00009493,0x0000a49b,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x00009492,0x0000a49b,0x0000a49b,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x000124db,0x000124db,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x0000a493,0x000124db,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x000136e4},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0001249b,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000136e4,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x00009252,0x000124db,
- 0x000126dc,0x0001b724,0x0001b725,0x0001b925},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 2, passes 1 */
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00000249,
- 0x0000124a,0x0000124a,0x00001252,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x00009292,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009292,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x0000a49b,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009493,0x0000a49b,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009493,0x0000a49b,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x0000a49b,0x0000a49b,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x00009252,0x0000a49b,
- 0x0001249b,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 3 */
- { /* version 3, passes 0 */
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009493,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x0000a49b,0x0000a49b,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x000124db,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000126dc,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0001249b,0x000126dc,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000136e4,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000136e4,0x0001b725,0x0001b925},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x000136e4,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x000136e4,0x0001b925,0x00025bb6,0x00024b77},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 3, passes 1 */
- {0x00000000,0x00000000,0x00001249,0x00000249,
- 0x0000124a,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x00009493,0x0000a49b,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x0000a49b,0x000126dc,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x000126dc,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x000126dc,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x000124db,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00009492,0x0000a49b,
- 0x000136e4,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x0001b724,0x0001b724,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 4 */
- { /* version 4, passes 0 */
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000249,0x00000049,
- 0x00000249,0x00000249,0x0000024a,0x00000049},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x00009252,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009493,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009292,0x00009493,0x00009493,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000124db,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0001249b,0x000126dc,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00009252,0x00009493,
- 0x000124db,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009252,0x0000a49b,
- 0x000124db,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00009492,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 4, passes 1 */
- {0x00000000,0x00000000,0x00000249,0x00000049,
- 0x00000009,0x00000009,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000049,0x00000049,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x00000249,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x0000124a,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009252,0x0000124a,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x00009252,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x00009292,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x00009292,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x00009493,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000124db,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009252,0x000124db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 5 */
- { /* version 5, passes 0 */
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x0000a49b,0x000124db,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b725,0x000136e4},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
- {0x00000000,0x00000000,0x00009492,0x0000a49b,
- 0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b925,0x0001c96e,0x0001b925},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001c924,0x0002496d,0x00025bb6,0x00024b77},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 5, passes 1 */
- {0x00000000,0x00000000,0x00001249,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009252,0x00009252,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x0000a49b,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000124db,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000124db,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x000126dc,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009292,0x000124db,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 6 */
- { /* version 6, passes 0 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b725,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000136e4,0x0001b724,0x0001b92d,0x000136e4},
- {0x00000000,0x00000000,0x00009492,0x0000a49b,
- 0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x0001b724,0x0001c92d,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x0001b724,0x0001c92d,0x00024b76,0x0002496e},
- {0x00000000,0x00000000,0x00012492,0x000126db,
- 0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 6, passes 1 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x00009252,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x00009292,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x0000a49b,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000124db,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x000126dc,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001c924,0x0001b724,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 7 */
- { /* version 7, passes 0 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x0000a49b,
- 0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000136e4,0x0001b725,0x000124db},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000136e4,0x0001b724,0x0001b725,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x000124db,
- 0x000136e4,0x0001b724,0x0001b725,0x000126dc},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b724,0x0001c96e,0x000136e4},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x0001b724,0x0001c92d,0x0001c96e,0x0001b925},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001b924,0x0001c92d,0x00024b76,0x0002496e},
- {0x00000000,0x00000000,0x00012492,0x000136db,
- 0x00024924,0x00024b6d,0x0002ddb6,0x00025bbf},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 7, passes 1 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x00009492,0x00009292,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x0000a49b,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x000124db,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000136db,
- 0x0001b724,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000136db,
- 0x0001b724,0x000126dc,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00009292,0x000136db,
- 0x0001b724,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009492,0x000136db,
- 0x0001b724,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00012492,0x0001b6db,
- 0x0001c924,0x0001b724,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- }
-};
-
+++ /dev/null
-/* Linux driver for Philips webcam
- (C) 2004 Luc Saillard (luc@saillard.org)
-
- NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
- driver and thus may have bugs that are not present in the original version.
- Please send bug reports and support requests to <luc@saillard.org>.
- The decompression routines have been implemented by reverse-engineering the
- Nemosoft binary pwcx module. Caveat emptor.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-
-/* This tables contains entries for the 675/680/690 (Timon) camera, with
- 4 different qualities (no compression, low, medium, high).
- It lists the bandwidth requirements for said mode by its alternate interface
- number. An alternate of 0 means that the mode is unavailable.
-
- There are 6 * 4 * 4 entries:
- 6 different resolutions subqcif, qsif, qcif, sif, cif, vga
- 6 framerates: 5, 10, 15, 20, 25, 30
- 4 compression modi: none, low, medium, high
-
- When an uncompressed mode is not available, the next available compressed mode
- will be chosen (unless the decompressor is absent). Sometimes there are only
- 1 or 2 compressed modes available; in that case entries are duplicated.
-*/
-
-#include "pwc-timon.h"
-
-const struct Timon_table_entry Timon_table[PSZ_MAX][6][4] =
-{
- /* SQCIF */
- {
- /* 5 fps */
- {
- {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
- {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
- {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
- {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
- },
- /* 10 fps */
- {
- {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
- {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
- {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
- {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
- },
- /* 15 fps */
- {
- {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
- {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
- {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
- {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
- },
- /* 20 fps */
- {
- {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
- {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
- {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
- {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
- },
- /* 25 fps */
- {
- {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
- {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
- {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
- {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
- },
- /* 30 fps */
- {
- {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
- {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
- {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
- {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
- },
- },
- /* QSIF */
- {
- /* 5 fps */
- {
- {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
- {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
- {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
- {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
- },
- /* 10 fps */
- {
- {2, 291, 0, {0x2C, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x23, 0xA1, 0xC0, 0x02}},
- {1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
- {1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
- {1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
- },
- /* 15 fps */
- {
- {3, 437, 0, {0x2B, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xB5, 0x6D, 0xC0, 0x02}},
- {2, 291, 640, {0x2B, 0xF4, 0x05, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
- {2, 291, 640, {0x2B, 0xF4, 0x05, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
- {1, 191, 420, {0x2B, 0xF4, 0x0D, 0x0D, 0x1B, 0x0C, 0x53, 0x1E, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
- },
- /* 20 fps */
- {
- {4, 588, 0, {0x2A, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x4C, 0x52, 0xC0, 0x02}},
- {3, 447, 730, {0x2A, 0xF4, 0x05, 0x16, 0xC9, 0x16, 0x01, 0x0E, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
- {2, 292, 476, {0x2A, 0xF4, 0x0D, 0x0E, 0xD8, 0x0E, 0x10, 0x19, 0x18, 0x24, 0xA1, 0xC0, 0x02}},
- {1, 192, 312, {0x2A, 0xF4, 0x1D, 0x09, 0xB3, 0x08, 0xEB, 0x1E, 0x18, 0xC0, 0xF4, 0xC0, 0x02}},
- },
- /* 25 fps */
- {
- {5, 703, 0, {0x29, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xBF, 0x42, 0xC0, 0x02}},
- {3, 447, 610, {0x29, 0xF4, 0x05, 0x13, 0x0B, 0x12, 0x43, 0x14, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
- {2, 292, 398, {0x29, 0xF4, 0x0D, 0x0C, 0x6C, 0x0B, 0xA4, 0x1E, 0x18, 0x24, 0xA1, 0xC0, 0x02}},
- {1, 192, 262, {0x29, 0xF4, 0x25, 0x08, 0x23, 0x07, 0x5B, 0x1E, 0x18, 0xC0, 0xF4, 0xC0, 0x02}},
- },
- /* 30 fps */
- {
- {8, 873, 0, {0x28, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x69, 0x37, 0xC0, 0x02}},
- {5, 704, 774, {0x28, 0xF4, 0x05, 0x18, 0x21, 0x17, 0x59, 0x0F, 0x18, 0xC0, 0x42, 0xC0, 0x02}},
- {3, 448, 492, {0x28, 0xF4, 0x05, 0x0F, 0x5D, 0x0E, 0x95, 0x15, 0x18, 0xC0, 0x69, 0xC0, 0x02}},
- {2, 291, 320, {0x28, 0xF4, 0x1D, 0x09, 0xFB, 0x09, 0x33, 0x1E, 0x18, 0x23, 0xA1, 0xC0, 0x02}},
- },
- },
- /* QCIF */
- {
- /* 5 fps */
- {
- {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
- {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
- {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
- {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
- },
- /* 10 fps */
- {
- {3, 385, 0, {0x0C, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x81, 0x79, 0xC0, 0x02}},
- {2, 291, 800, {0x0C, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x11, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
- {2, 291, 800, {0x0C, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x11, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
- {1, 194, 532, {0x0C, 0xF4, 0x05, 0x10, 0x9A, 0x0F, 0xBE, 0x1B, 0x08, 0xC2, 0xF0, 0xC0, 0x02}},
- },
- /* 15 fps */
- {
- {4, 577, 0, {0x0B, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x41, 0x52, 0xC0, 0x02}},
- {3, 447, 818, {0x0B, 0xF4, 0x05, 0x19, 0x89, 0x18, 0xAD, 0x0F, 0x10, 0xBF, 0x69, 0xC0, 0x02}},
- {2, 292, 534, {0x0B, 0xF4, 0x05, 0x10, 0xA3, 0x0F, 0xC7, 0x19, 0x10, 0x24, 0xA1, 0xC0, 0x02}},
- {1, 195, 356, {0x0B, 0xF4, 0x15, 0x0B, 0x11, 0x0A, 0x35, 0x1E, 0x10, 0xC3, 0xF0, 0xC0, 0x02}},
- },
- /* 20 fps */
- {
- {6, 776, 0, {0x0A, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x08, 0x3F, 0xC0, 0x02}},
- {4, 591, 804, {0x0A, 0xF4, 0x05, 0x19, 0x1E, 0x18, 0x42, 0x0F, 0x18, 0x4F, 0x4E, 0xC0, 0x02}},
- {3, 447, 608, {0x0A, 0xF4, 0x05, 0x12, 0xFD, 0x12, 0x21, 0x15, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
- {2, 291, 396, {0x0A, 0xF4, 0x15, 0x0C, 0x5E, 0x0B, 0x82, 0x1E, 0x18, 0x23, 0xA1, 0xC0, 0x02}},
- },
- /* 25 fps */
- {
- {9, 928, 0, {0x09, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xA0, 0x33, 0xC0, 0x02}},
- {5, 703, 800, {0x09, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x10, 0x18, 0xBF, 0x42, 0xC0, 0x02}},
- {3, 447, 508, {0x09, 0xF4, 0x0D, 0x0F, 0xD2, 0x0E, 0xF6, 0x1B, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
- {2, 292, 332, {0x09, 0xF4, 0x1D, 0x0A, 0x5A, 0x09, 0x7E, 0x1E, 0x18, 0x24, 0xA1, 0xC0, 0x02}},
- },
- /* 30 fps */
- {
- {0, },
- {9, 956, 876, {0x08, 0xF4, 0x05, 0x1B, 0x58, 0x1A, 0x7C, 0x0E, 0x20, 0xBC, 0x33, 0x10, 0x02}},
- {4, 592, 542, {0x08, 0xF4, 0x05, 0x10, 0xE4, 0x10, 0x08, 0x17, 0x20, 0x50, 0x4E, 0x10, 0x02}},
- {2, 291, 266, {0x08, 0xF4, 0x25, 0x08, 0x48, 0x07, 0x6C, 0x1E, 0x20, 0x23, 0xA1, 0x10, 0x02}},
- },
- },
- /* SIF */
- {
- /* 5 fps */
- {
- {4, 582, 0, {0x35, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x46, 0x52, 0x60, 0x02}},
- {3, 387, 1276, {0x35, 0xF4, 0x05, 0x27, 0xD8, 0x26, 0x48, 0x03, 0x10, 0x83, 0x79, 0x60, 0x02}},
- {2, 291, 960, {0x35, 0xF4, 0x0D, 0x1D, 0xF2, 0x1C, 0x62, 0x04, 0x10, 0x23, 0xA1, 0x60, 0x02}},
- {1, 191, 630, {0x35, 0xF4, 0x1D, 0x13, 0xA9, 0x12, 0x19, 0x05, 0x08, 0xBF, 0xF4, 0x60, 0x02}},
- },
- /* 10 fps */
- {
- {0, },
- {6, 775, 1278, {0x34, 0xF4, 0x05, 0x27, 0xE8, 0x26, 0x58, 0x05, 0x30, 0x07, 0x3F, 0x10, 0x02}},
- {3, 447, 736, {0x34, 0xF4, 0x15, 0x16, 0xFB, 0x15, 0x6B, 0x05, 0x18, 0xBF, 0x69, 0x10, 0x02}},
- {2, 291, 480, {0x34, 0xF4, 0x2D, 0x0E, 0xF9, 0x0D, 0x69, 0x09, 0x18, 0x23, 0xA1, 0x10, 0x02}},
- },
- /* 15 fps */
- {
- {0, },
- {9, 955, 1050, {0x33, 0xF4, 0x05, 0x20, 0xCF, 0x1F, 0x3F, 0x06, 0x48, 0xBB, 0x33, 0x10, 0x02}},
- {4, 591, 650, {0x33, 0xF4, 0x15, 0x14, 0x44, 0x12, 0xB4, 0x08, 0x30, 0x4F, 0x4E, 0x10, 0x02}},
- {3, 448, 492, {0x33, 0xF4, 0x25, 0x0F, 0x52, 0x0D, 0xC2, 0x09, 0x28, 0xC0, 0x69, 0x10, 0x02}},
- },
- /* 20 fps */
- {
- {0, },
- {9, 958, 782, {0x32, 0xF4, 0x0D, 0x18, 0x6A, 0x16, 0xDA, 0x0B, 0x58, 0xBE, 0x33, 0xD0, 0x02}},
- {5, 703, 574, {0x32, 0xF4, 0x1D, 0x11, 0xE7, 0x10, 0x57, 0x0B, 0x40, 0xBF, 0x42, 0xD0, 0x02}},
- {3, 446, 364, {0x32, 0xF4, 0x3D, 0x0B, 0x5C, 0x09, 0xCC, 0x0E, 0x30, 0xBE, 0x69, 0xD0, 0x02}},
- },
- /* 25 fps */
- {
- {0, },
- {9, 958, 654, {0x31, 0xF4, 0x15, 0x14, 0x66, 0x12, 0xD6, 0x0B, 0x50, 0xBE, 0x33, 0x90, 0x02}},
- {6, 776, 530, {0x31, 0xF4, 0x25, 0x10, 0x8C, 0x0E, 0xFC, 0x0C, 0x48, 0x08, 0x3F, 0x90, 0x02}},
- {4, 592, 404, {0x31, 0xF4, 0x35, 0x0C, 0x96, 0x0B, 0x06, 0x0B, 0x38, 0x50, 0x4E, 0x90, 0x02}},
- },
- /* 30 fps */
- {
- {0, },
- {9, 957, 526, {0x30, 0xF4, 0x25, 0x10, 0x68, 0x0E, 0xD8, 0x0D, 0x58, 0xBD, 0x33, 0x60, 0x02}},
- {6, 775, 426, {0x30, 0xF4, 0x35, 0x0D, 0x48, 0x0B, 0xB8, 0x0F, 0x50, 0x07, 0x3F, 0x60, 0x02}},
- {4, 590, 324, {0x30, 0x7A, 0x4B, 0x0A, 0x1C, 0x08, 0xB4, 0x0E, 0x40, 0x4E, 0x52, 0x60, 0x02}},
- },
- },
- /* CIF */
- {
- /* 5 fps */
- {
- {6, 771, 0, {0x15, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x03, 0x3F, 0x80, 0x02}},
- {4, 465, 1278, {0x15, 0xF4, 0x05, 0x27, 0xEE, 0x26, 0x36, 0x03, 0x18, 0xD1, 0x65, 0x80, 0x02}},
- {2, 291, 800, {0x15, 0xF4, 0x15, 0x18, 0xF4, 0x17, 0x3C, 0x05, 0x18, 0x23, 0xA1, 0x80, 0x02}},
- {1, 193, 528, {0x15, 0xF4, 0x2D, 0x10, 0x7E, 0x0E, 0xC6, 0x0A, 0x18, 0xC1, 0xF4, 0x80, 0x02}},
- },
- /* 10 fps */
- {
- {0, },
- {9, 932, 1278, {0x14, 0xF4, 0x05, 0x27, 0xEE, 0x26, 0x36, 0x04, 0x30, 0xA4, 0x33, 0x10, 0x02}},
- {4, 591, 812, {0x14, 0xF4, 0x15, 0x19, 0x56, 0x17, 0x9E, 0x06, 0x28, 0x4F, 0x4E, 0x10, 0x02}},
- {2, 291, 400, {0x14, 0xF4, 0x3D, 0x0C, 0x7A, 0x0A, 0xC2, 0x0E, 0x28, 0x23, 0xA1, 0x10, 0x02}},
- },
- /* 15 fps */
- {
- {0, },
- {9, 956, 876, {0x13, 0xF4, 0x0D, 0x1B, 0x58, 0x19, 0xA0, 0x05, 0x38, 0xBC, 0x33, 0x60, 0x02}},
- {5, 703, 644, {0x13, 0xF4, 0x1D, 0x14, 0x1C, 0x12, 0x64, 0x08, 0x38, 0xBF, 0x42, 0x60, 0x02}},
- {3, 448, 410, {0x13, 0xF4, 0x3D, 0x0C, 0xC4, 0x0B, 0x0C, 0x0E, 0x38, 0xC0, 0x69, 0x60, 0x02}},
- },
- /* 20 fps */
- {
- {0, },
- {9, 956, 650, {0x12, 0xF4, 0x1D, 0x14, 0x4A, 0x12, 0x92, 0x09, 0x48, 0xBC, 0x33, 0x10, 0x03}},
- {6, 776, 528, {0x12, 0xF4, 0x2D, 0x10, 0x7E, 0x0E, 0xC6, 0x0A, 0x40, 0x08, 0x3F, 0x10, 0x03}},
- {4, 591, 402, {0x12, 0xF4, 0x3D, 0x0C, 0x8F, 0x0A, 0xD7, 0x0E, 0x40, 0x4F, 0x4E, 0x10, 0x03}},
- },
- /* 25 fps */
- {
- {0, },
- {9, 956, 544, {0x11, 0xF4, 0x25, 0x10, 0xF4, 0x0F, 0x3C, 0x0A, 0x48, 0xBC, 0x33, 0xC0, 0x02}},
- {7, 840, 478, {0x11, 0xF4, 0x2D, 0x0E, 0xEB, 0x0D, 0x33, 0x0B, 0x48, 0x48, 0x3B, 0xC0, 0x02}},
- {5, 703, 400, {0x11, 0xF4, 0x3D, 0x0C, 0x7A, 0x0A, 0xC2, 0x0E, 0x48, 0xBF, 0x42, 0xC0, 0x02}},
- },
- /* 30 fps */
- {
- {0, },
- {9, 956, 438, {0x10, 0xF4, 0x35, 0x0D, 0xAC, 0x0B, 0xF4, 0x0D, 0x50, 0xBC, 0x33, 0x10, 0x02}},
- {7, 838, 384, {0x10, 0xF4, 0x45, 0x0B, 0xFD, 0x0A, 0x45, 0x0F, 0x50, 0x46, 0x3B, 0x10, 0x02}},
- {6, 773, 354, {0x10, 0x7A, 0x4B, 0x0B, 0x0C, 0x09, 0x80, 0x10, 0x50, 0x05, 0x3F, 0x10, 0x02}},
- },
- },
- /* VGA */
- {
- /* 5 fps */
- {
- {0, },
- {6, 773, 1272, {0x1D, 0xF4, 0x15, 0x27, 0xB6, 0x24, 0x96, 0x02, 0x30, 0x05, 0x3F, 0x10, 0x02}},
- {4, 592, 976, {0x1D, 0xF4, 0x25, 0x1E, 0x78, 0x1B, 0x58, 0x03, 0x30, 0x50, 0x4E, 0x10, 0x02}},
- {3, 448, 738, {0x1D, 0xF4, 0x3D, 0x17, 0x0C, 0x13, 0xEC, 0x04, 0x30, 0xC0, 0x69, 0x10, 0x02}},
- },
- /* 10 fps */
- {
- {0, },
- {9, 956, 788, {0x1C, 0xF4, 0x35, 0x18, 0x9C, 0x15, 0x7C, 0x03, 0x48, 0xBC, 0x33, 0x10, 0x02}},
- {6, 776, 640, {0x1C, 0x7A, 0x53, 0x13, 0xFC, 0x11, 0x2C, 0x04, 0x48, 0x08, 0x3F, 0x10, 0x02}},
- {4, 592, 488, {0x1C, 0x7A, 0x6B, 0x0F, 0x3C, 0x0C, 0x6C, 0x06, 0x48, 0x50, 0x4E, 0x10, 0x02}},
- },
- /* 15 fps */
- {
- {0, },
- {9, 957, 526, {0x1B, 0x7A, 0x63, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x33, 0x80, 0x02}},
- {9, 957, 526, {0x1B, 0x7A, 0x63, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x33, 0x80, 0x02}},
- {8, 895, 492, {0x1B, 0x7A, 0x6B, 0x0F, 0x5D, 0x0C, 0x8D, 0x06, 0x58, 0x7F, 0x37, 0x80, 0x02}},
- },
- /* 20 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 25 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 30 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- },
-};
-
-/*
- * 16 versions:
- * 2 tables (one for Y, and one for U&V)
- * 16 levels of details per tables
- * 8 blocs
- */
-
-const unsigned int TimonRomTable [16][2][16][8] =
-{
- { /* version 0 */
- { /* version 0, passes 0 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000001},
- {0x00000000,0x00000000,0x00000001,0x00000001,
- 0x00000001,0x00000001,0x00000001,0x00000001},
- {0x00000000,0x00000000,0x00000001,0x00000001,
- 0x00000001,0x00000009,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00000009,0x00000001,
- 0x00000009,0x00000009,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000009,0x00000009,0x00000049,0x00000009},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000009,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000009,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000249,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000249,0x00000249,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000249,0x0000124a,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000249,
- 0x00000249,0x0000124a,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x0000124a,0x00009252,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 0, passes 1 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000},
- {0x00000000,0x00000000,0x00000001,0x00000001,
- 0x00000001,0x00000001,0x00000000,0x00000000},
- {0x00000000,0x00000000,0x00000009,0x00000001,
- 0x00000001,0x00000009,0x00000000,0x00000000},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000009,0x00000009,0x00000000,0x00000000},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000009,0x00000009,0x00000001,0x00000000},
- {0x00000000,0x00000000,0x00000049,0x00000009,
- 0x00000009,0x00000049,0x00000001,0x00000001},
- {0x00000000,0x00000000,0x00000049,0x00000009,
- 0x00000009,0x00000049,0x00000001,0x00000001},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000009,0x00000001},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000009,0x00000001},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000009,0x00000001},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000249,0x00000049,0x00000009},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000249,0x00000049,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00000049,
- 0x00000249,0x00000249,0x00000049,0x00000009},
- {0x00000000,0x00000000,0x00001249,0x00000249,
- 0x0000124a,0x0000124a,0x0000024a,0x00000049},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 1 */
- { /* version 1, passes 0 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000001},
- {0x00000000,0x00000000,0x00000001,0x00000001,
- 0x00000001,0x00000009,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000009,0x00000009,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000009,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000009,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000249,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00001252},
- {0x00000000,0x00000000,0x00000049,0x00000249,
- 0x00000249,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00000049,0x00000249,
- 0x0000124a,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x0000124a,0x00009252,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009252,0x00009252,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x0000924a,
- 0x00009292,0x00009493,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x00009492,0x0000a49b,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 1, passes 1 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000009,0x00000001,0x00000001,0x00000000},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000009,0x00000009,0x00000001,0x00000000},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000009,0x00000001,0x00000000},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000001,0x00000001},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000009,0x00000001},
- {0x00000000,0x00000000,0x00000249,0x00000049,
- 0x00000049,0x00000249,0x00000009,0x00000001},
- {0x00000000,0x00000000,0x00000249,0x00000049,
- 0x00000249,0x00000249,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x00000049,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x0000124a,0x00000049,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x0000124a,0x00000049,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x0000124a,0x0000024a,0x00000049},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x0000024a,0x00000049},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x0000024a,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009252,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 2 */
- { /* version 2, passes 0 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000001},
- {0x00000000,0x00000000,0x00000009,0x00000009,
- 0x00000009,0x00000009,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000049,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00001252},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x0000124a,0x00009252,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009252,0x00009292,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009252,0x00009292,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x0000924a,
- 0x00009252,0x00009493,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x0000924a,
- 0x00009292,0x00009493,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x00009252,
- 0x00009492,0x00009493,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x000124db,0x000124db,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000126dc,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 2, passes 1 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000},
- {0x00000000,0x00000000,0x00000049,0x00000009,
- 0x00000049,0x00000009,0x00000001,0x00000000},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000000},
- {0x00000000,0x00000000,0x00000249,0x00000049,
- 0x00000249,0x00000049,0x0000024a,0x00000001},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00000001},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00000001},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x0000024a,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x0000024a,0x00000009},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x00009252,0x00001252,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x00009292,0x00001252,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x00009292,0x00001252,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009292,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x0000924a,0x0000924a,
- 0x00009492,0x00009493,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 3 */
- { /* version 3, passes 0 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000001},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000049,0x00000249,
- 0x00000249,0x00000249,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x00009252,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x0000124a,0x00009292,0x00009292,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009252,0x00009292,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009292,0x00009493,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x00009252,
- 0x00009292,0x00009493,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x00009292,0x0000a49b,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x00009492,0x0000a49b,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x0000a49b,0x000124db,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x0000a493,0x0000a49b,0x000124db,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0001249b,0x000126dc,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000136e4,0x0001b725,0x000136e4},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 3, passes 1 */
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000},
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000001,0x00000000},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x00000049,0x00000001},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x0000124a,0x00001252,0x00000001},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x00001252,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x0000124a,0x00009252,0x00009292,0x00000009},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x00009252,0x00009292,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009252,0x00009292,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009493,0x00009292,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009493,0x00009292,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009493,0x00009493,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009292,0x00009493,0x00009493,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x00009493,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x00009492,0x0000a49b,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x00009292,
- 0x0000a493,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 4 */
- { /* version 4, passes 0 */
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x0000124a,0x00001252,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x00009252,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x0000124a,0x00009292,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009252,0x00009493,0x00009493,0x0000a49b},
- {0x00000000,0x00000000,0x00000249,0x0000924a,
- 0x00009292,0x00009493,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009292,0x00009493,0x0000a49b,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x00009492,0x0000a49b,0x0000a49b,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x000124db,0x000124db,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x0000a493,0x000124db,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x000136e4},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0001249b,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000136e4,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x00009252,0x000124db,
- 0x000126dc,0x0001b724,0x0001b725,0x0001b925},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 4, passes 1 */
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00000249,
- 0x0000124a,0x0000124a,0x00001252,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x00009292,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009292,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x0000a49b,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009493,0x0000a49b,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009493,0x0000a49b,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x0000a49b,0x0000a49b,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x00009252,0x0000a49b,
- 0x0001249b,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 5 */
- { /* version 5, passes 0 */
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x0000124a,0x00001252,0x00009292},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x0000124a,0x00009292,0x00009292,0x00009493},
- {0x00000000,0x00000000,0x00000249,0x0000924a,
- 0x00009292,0x00009493,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009292,0x00009493,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x0000a49b,0x0000a49b,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x0000a49b,0x000124db,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x0000a493,0x000124db,0x000124db,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0001249b,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0001249b,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0001249b,0x000126dc,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000126dc,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x000136e4,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b724,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 5, passes 1 */
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009493,0x00009493,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009493,0x00009493,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009493,0x0000a49b,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x00009493,0x000124db,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x00009493,0x000124db,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x0000a49b,0x000124db,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x0000a49b,0x000124db,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000124db,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000124db,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000124db,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009252,0x000124db,
- 0x000126dc,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 6 */
- { /* version 6, passes 0 */
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x0000124a,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009493,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x0000a49b,0x0000a49b,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x000124db,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000126dc,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0001249b,0x000126dc,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000136e4,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000136e4,0x0001b725,0x0001b925},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x000136e4,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x000136e4,0x0001b925,0x00025bb6,0x00024b77},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 6, passes 1 */
- {0x00000000,0x00000000,0x00001249,0x00000249,
- 0x0000124a,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x00009493,0x0000a49b,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x0000a49b,0x000126dc,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x000126dc,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x000126dc,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x000124db,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00009492,0x0000a49b,
- 0x000136e4,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x0001b724,0x0001b724,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 7 */
- { /* version 7, passes 0 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009493,0x0000a49b,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x0000a493,0x0000a49b,0x000124db,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x000136e4},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0001249b,0x000126dc,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00001249,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000136e4,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000136e4,0x0001b725,0x0001b925},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x00009292,0x000124db,
- 0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b724,0x0001c96e,0x0002496e},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x000136e4,0x0001b925,0x0001c96e,0x0002496e},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b724,0x0002496d,0x00025bb6,0x00025bbf},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 7, passes 1 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x00009493,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x000124db,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000124db,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x000124db,0x000136e4,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x000124db,0x000136e4,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000124db,0x000136e4,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x000136e4,0x0001b724,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00012492,0x000126db,
- 0x0001b724,0x0001b925,0x0001b725,0x000136e4},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 8 */
- { /* version 8, passes 0 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009292,0x00009493,0x0000a49b,0x000124db},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x0000a493,0x000124db,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x000136e4},
- {0x00000000,0x00000000,0x00001249,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000136e4,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000136e4,0x0001b725,0x0001b925},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
- {0x00000000,0x00000000,0x00009252,0x000124db,
- 0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
- {0x00000000,0x00000000,0x00009292,0x000124db,
- 0x000126dc,0x0001b925,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b925,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b925,0x00024b76,0x00024b77},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x000136e4,0x0001b925,0x00024b76,0x00025bbf},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x000136e4,0x0001c92d,0x00024b76,0x00025bbf},
- {0x00000000,0x00000000,0x00012492,0x000136db,
- 0x0001b724,0x00024b6d,0x0002ddb6,0x0002efff},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 8, passes 1 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009493,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x000124db,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x000124db,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x000124db,0x000136e4,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000126dc,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x000136e4,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00009292,0x000124db,
- 0x000136e4,0x0001b724,0x0001b725,0x000136e4},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x000136e4,0x0001b925,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x000136e4,0x0001b925,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b724,0x0002496d,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 9 */
- { /* version 9, passes 0 */
- {0x00000000,0x00000000,0x00000049,0x00000049,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00000249,0x00000049,
- 0x00000249,0x00000249,0x0000024a,0x00000049},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x0000124a,0x00009252,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009493,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009292,0x00009493,0x00009493,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000124db,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0001249b,0x000126dc,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00009252,0x00009493,
- 0x000124db,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009252,0x0000a49b,
- 0x000124db,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00009492,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 9, passes 1 */
- {0x00000000,0x00000000,0x00000249,0x00000049,
- 0x00000009,0x00000009,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000049,0x00000049,0x00000009,0x00000009},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x00000249,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x0000124a,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009252,0x0000124a,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x00009252,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x00009292,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x00009292,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x00009493,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000124db,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009252,0x000124db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 10 */
- { /* version 10, passes 0 */
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00000249,0x00001249,
- 0x00009252,0x00009292,0x00009292,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x00009493,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x000124db,0x000124db,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000124db,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0001249b,0x000126dc,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000126dc,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009252,0x0000a49b,
- 0x000124db,0x000136e4,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x00009492,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b92d,0x0001b724},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000126dc,0x0001b925,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x000136e4,0x0002496d,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 10, passes 1 */
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000049,0x00000049,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x00000249,0x00000049,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x00009252,0x0000024a,0x00000049},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009493,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00009252,
- 0x00009492,0x00009493,0x00001252,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x00009493,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x00009492,0x00009493,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x00009493,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009252,0x000126db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 11 */
- { /* version 11, passes 0 */
- {0x00000000,0x00000000,0x00000249,0x00000249,
- 0x00000249,0x00000249,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009492,0x0000a49b,0x0000a49b,0x00009292},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x0000a49b,0x000124db,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b725,0x000136e4},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
- {0x00000000,0x00000000,0x00009492,0x0000a49b,
- 0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b925,0x0001c96e,0x0001b925},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001c924,0x0002496d,0x00025bb6,0x00024b77},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 11, passes 1 */
- {0x00000000,0x00000000,0x00001249,0x00000249,
- 0x00000249,0x00000249,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009252,0x00009252,0x0000024a,0x0000024a},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x0000a49b,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x0000a49b,0x00009292,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000124db,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000124db,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x000126dc,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009292,0x000124db,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 12 */
- { /* version 12, passes 0 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000136e4,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b725,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000136e4,0x0001b724,0x0001b92d,0x000136e4},
- {0x00000000,0x00000000,0x00009492,0x0000a49b,
- 0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x0001b724,0x0001c92d,0x0001c96e,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x0001b724,0x0001c92d,0x00024b76,0x0002496e},
- {0x00000000,0x00000000,0x00012492,0x000126db,
- 0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 12, passes 1 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x00001249,0x00009292,
- 0x00009492,0x00009252,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x00009292,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x0000a49b,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000124db,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000124db,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x000126dc,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x000136e4,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00009492,0x000126db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001c924,0x0001b724,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 13 */
- { /* version 13, passes 0 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x00009252,0x00009292,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x000124db,0x000126dc,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x0000a49b,
- 0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x000136e4,0x0001b725,0x000124db},
- {0x00000000,0x00000000,0x00009292,0x0000a49b,
- 0x000136e4,0x0001b724,0x0001b725,0x000126dc},
- {0x00000000,0x00000000,0x00009292,0x000124db,
- 0x000136e4,0x0001b724,0x0001b725,0x000126dc},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b724,0x0001c96e,0x000136e4},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x0001b724,0x0001c92d,0x0001c96e,0x0001b925},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001b924,0x0001c92d,0x00024b76,0x0002496e},
- {0x00000000,0x00000000,0x00012492,0x000136db,
- 0x00024924,0x00024b6d,0x0002ddb6,0x00025bbf},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 13, passes 1 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x00009492,0x00009292,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x0000a49b,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x000124db,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000136db,
- 0x0001b724,0x000124db,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000136db,
- 0x0001b724,0x000126dc,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00009292,0x000136db,
- 0x0001b724,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x00009492,0x000136db,
- 0x0001b724,0x000126dc,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00012492,0x0001b6db,
- 0x0001c924,0x0001b724,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 14 */
- { /* version 14, passes 0 */
- {0x00000000,0x00000000,0x00001249,0x0000924a,
- 0x00009292,0x00009493,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00001249,0x0000a49b,
- 0x0000a493,0x000124db,0x000126dc,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x000136e4,0x0001b725,0x000124db},
- {0x00000000,0x00000000,0x00009292,0x000124db,
- 0x000126dc,0x0001b724,0x0001b92d,0x000126dc},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b724,0x0001b92d,0x000126dc},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001c92d,0x0001c96e,0x000136e4},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x0001b724,0x0001c92d,0x0001c96e,0x0001b724},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x0001b724,0x0001c92d,0x00024b76,0x0001b925},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b724,0x0001c92d,0x00024b76,0x0002496e},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b924,0x0002496d,0x00024b76,0x00024b77},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b924,0x00024b6d,0x0002ddb6,0x00025bbf},
- {0x00000000,0x00000000,0x00012492,0x0001b6db,
- 0x00024924,0x0002db6d,0x00036db6,0x0002efff},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 14, passes 1 */
- {0x00000000,0x00000000,0x00001249,0x00001249,
- 0x0000124a,0x0000124a,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x00009493,
- 0x0000a493,0x00009292,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x0000a49b,0x00001252,0x00001252},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000136e4,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000136e4,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x000136e4,0x00009493,0x00009292},
- {0x00000000,0x00000000,0x00009492,0x000136db,
- 0x0001b724,0x000136e4,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x00009492,0x000136db,
- 0x0001b724,0x000136e4,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x00009492,0x000136db,
- 0x0001b724,0x000136e4,0x0000a49b,0x00009493},
- {0x00000000,0x00000000,0x00009492,0x000136db,
- 0x0001b724,0x000136e4,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b724,0x000136e4,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b724,0x000136e4,0x000124db,0x0000a49b},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b724,0x000136e4,0x000126dc,0x000124db},
- {0x00000000,0x00000000,0x00012492,0x0001b6db,
- 0x0001c924,0x0001b724,0x000136e4,0x000126dc},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- },
- { /* version 15 */
- { /* version 15, passes 0 */
- {0x00000000,0x00000000,0x00001249,0x00009493,
- 0x0000a493,0x0000a49b,0x000124db,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0001249b,0x000126dc,0x000136e4,0x000124db},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x000126dc,0x0001b724,0x0001b725,0x000126dc},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x0001b724,0x0001b92d,0x000126dc},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x000136e4,0x0001b925,0x0001c96e,0x000136e4},
- {0x00000000,0x00000000,0x00009492,0x000124db,
- 0x0001b724,0x0001c92d,0x0001c96e,0x0001b724},
- {0x00000000,0x00000000,0x0000a492,0x000124db,
- 0x0001b724,0x0001c92d,0x0001c96e,0x0001b724},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001b724,0x0001c92d,0x0001c96e,0x0001b925},
- {0x00000000,0x00000000,0x0000a492,0x000126db,
- 0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001b924,0x0002496d,0x00024b76,0x0002496e},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001c924,0x0002496d,0x00025bb6,0x00024b77},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001c924,0x00024b6d,0x00025bb6,0x00024b77},
- {0x00000000,0x00000000,0x00012492,0x000136db,
- 0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf},
- {0x00000000,0x00000000,0x00012492,0x0001b6db,
- 0x00024924,0x0002db6d,0x00036db6,0x0002efff},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- },
- { /* version 15, passes 1 */
- {0x00000000,0x00000000,0x0000924a,0x0000924a,
- 0x00009292,0x00009292,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x0000a49b,
- 0x0000a493,0x000124db,0x00009292,0x00009292},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000124db,0x0001b724,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000126dc,0x0001b724,0x00009493,0x00009493},
- {0x00000000,0x00000000,0x0000924a,0x000124db,
- 0x000136e4,0x0001b724,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00009292,0x000136db,
- 0x0001b724,0x0001b724,0x0000a49b,0x0000a49b},
- {0x00000000,0x00000000,0x00009492,0x000136db,
- 0x0001c924,0x0001b724,0x000124db,0x000124db},
- {0x00000000,0x00000000,0x00009492,0x000136db,
- 0x0001c924,0x0001b724,0x000124db,0x000124db},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001c924,0x0001b724,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001c924,0x0001b925,0x000126dc,0x000126dc},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001c924,0x0001b925,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001c924,0x0001b925,0x000136e4,0x000136e4},
- {0x00000000,0x00000000,0x0000a492,0x000136db,
- 0x0001c924,0x0001b925,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x00012492,0x000136db,
- 0x0001c924,0x0001b925,0x0001b725,0x0001b724},
- {0x00000000,0x00000000,0x00012492,0x0001b6db,
- 0x00024924,0x0002496d,0x0001b92d,0x0001b925},
- {0x00000000,0x00000000,0x00000000,0x00000000,
- 0x00000000,0x00000000,0x00000000,0x00000000}
- }
- }
-};
+++ /dev/null
-/* Linux driver for Philips webcam
- Decompression frontend.
- (C) 1999-2003 Nemosoft Unv.
- (C) 2004 Luc Saillard (luc@saillard.org)
-
- NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
- driver and thus may have bugs that are not present in the original version.
- Please send bug reports and support requests to <luc@saillard.org>.
- The decompression routines have been implemented by reverse-engineering the
- Nemosoft binary pwcx module. Caveat emptor.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#include <asm/current.h>
-#include <asm/types.h>
-
-#include "pwc.h"
-#include "pwc-uncompress.h"
-#include "pwc-dec1.h"
-#include "pwc-dec23.h"
-
-int pwc_decompress(struct pwc_device *pdev)
-{
- struct pwc_frame_buf *fbuf;
- int n, line, col, stride;
- void *yuv, *image;
- u16 *src;
- u16 *dsty, *dstu, *dstv;
-
- if (pdev == NULL)
- return -EFAULT;
-#if defined(__KERNEL__) && defined(PWC_MAGIC)
- if (pdev->magic != PWC_MAGIC) {
- Err("pwc_decompress(): magic failed.\n");
- return -EFAULT;
- }
-#endif
-
- fbuf = pdev->read_frame;
- if (fbuf == NULL)
- return -EFAULT;
- image = pdev->image_ptr[pdev->fill_image];
- if (!image)
- return -EFAULT;
-
- yuv = fbuf->data + pdev->frame_header_size; /* Skip header */
-
- /* Raw format; that's easy... */
- if (pdev->vpalette == VIDEO_PALETTE_RAW)
- {
- memcpy(image, yuv, pdev->frame_size);
- return 0;
- }
-
- if (pdev->vbandlength == 0) {
- /* Uncompressed mode. We copy the data into the output buffer,
- using the viewport size (which may be larger than the image
- size). Unfortunately we have to do a bit of byte stuffing
- to get the desired output format/size.
- */
- /*
- * We do some byte shuffling here to go from the
- * native format to YUV420P.
- */
- src = (u16 *)yuv;
- n = pdev->view.x * pdev->view.y;
-
- /* offset in Y plane */
- stride = pdev->view.x * pdev->offset.y + pdev->offset.x;
- dsty = (u16 *)(image + stride);
-
- /* offsets in U/V planes */
- stride = pdev->view.x * pdev->offset.y / 4 + pdev->offset.x / 2;
- dstu = (u16 *)(image + n + stride);
- dstv = (u16 *)(image + n + n / 4 + stride);
-
- /* increment after each line */
- stride = (pdev->view.x - pdev->image.x) / 2; /* u16 is 2 bytes */
-
- for (line = 0; line < pdev->image.y; line++) {
- for (col = 0; col < pdev->image.x; col += 4) {
- *dsty++ = *src++;
- *dsty++ = *src++;
- if (line & 1)
- *dstv++ = *src++;
- else
- *dstu++ = *src++;
- }
- dsty += stride;
- if (line & 1)
- dstv += (stride >> 1);
- else
- dstu += (stride >> 1);
- }
- }
- else {
- /* Compressed; the decompressor routines will write the data
- in planar format immediately.
- */
- int flags;
-
- flags = PWCX_FLAG_PLANAR;
- if (pdev->vsize == PSZ_VGA && pdev->vframes == 5 && pdev->vsnapshot)
- {
- printk(KERN_ERR "pwc: Mode Bayer is not supported for now\n");
- flags |= PWCX_FLAG_BAYER;
- return -ENXIO; /* No such device or address: missing decompressor */
- }
-
- switch (pdev->type)
- {
- case 675:
- case 680:
- case 690:
- case 720:
- case 730:
- case 740:
- case 750:
- pwc_dec23_decompress(&pdev->image, &pdev->view, &pdev->offset,
- yuv, image,
- flags,
- pdev->decompress_data, pdev->vbandlength);
- break;
- case 645:
- case 646:
- /* TODO & FIXME */
- return -ENXIO; /* No such device or address: missing decompressor */
- break;
- }
- }
- return 0;
-}
-
-
+++ /dev/null
-/* (C) 1999-2003 Nemosoft Unv.
- (C) 2004 Luc Saillard (luc@saillard.org)
-
- NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
- driver and thus may have bugs that are not present in the original version.
- Please send bug reports and support requests to <luc@saillard.org>.
- The decompression routines have been implemented by reverse-engineering the
- Nemosoft binary pwcx module. Caveat emptor.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#ifndef PWC_H
-#define PWC_H
-
-#include <linux/version.h>
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/usb.h>
-#include <linux/spinlock.h>
-#include <linux/videodev.h>
-#include <linux/wait.h>
-#include <linux/smp_lock.h>
-#include <asm/semaphore.h>
-#include <asm/errno.h>
-
-#include "pwc-uncompress.h"
-#include "pwc-ioctl.h"
-
-/* Defines and structures for the Philips webcam */
-/* Used for checking memory corruption/pointer validation */
-#define PWC_MAGIC 0x89DC10ABUL
-#undef PWC_MAGIC
-
-/* Turn some debugging options on/off */
-#define PWC_DEBUG 0
-
-/* Trace certain actions in the driver */
-#define TRACE_MODULE 0x0001
-#define TRACE_PROBE 0x0002
-#define TRACE_OPEN 0x0004
-#define TRACE_READ 0x0008
-#define TRACE_MEMORY 0x0010
-#define TRACE_FLOW 0x0020
-#define TRACE_SIZE 0x0040
-#define TRACE_PWCX 0x0080
-#define TRACE_SEQUENCE 0x1000
-
-#define Trace(R, A...) if (pwc_trace & R) printk(KERN_DEBUG PWC_NAME " " A)
-#define Debug(A...) printk(KERN_DEBUG PWC_NAME " " A)
-#define Info(A...) printk(KERN_INFO PWC_NAME " " A)
-#define Err(A...) printk(KERN_ERR PWC_NAME " " A)
-
-
-/* Defines for ToUCam cameras */
-#define TOUCAM_HEADER_SIZE 8
-#define TOUCAM_TRAILER_SIZE 4
-
-#define FEATURE_MOTOR_PANTILT 0x0001
-
-/* Version block */
-#define PWC_MAJOR 9
-#define PWC_MINOR 0
-#define PWC_VERSION "9.0.2-unofficial"
-#define PWC_NAME "pwc"
-
-/* Turn certain features on/off */
-#define PWC_INT_PIPE 0
-
-/* Ignore errors in the first N frames, to allow for startup delays */
-#define FRAME_LOWMARK 5
-
-/* Size and number of buffers for the ISO pipe. */
-#define MAX_ISO_BUFS 2
-#define ISO_FRAMES_PER_DESC 10
-#define ISO_MAX_FRAME_SIZE 960
-#define ISO_BUFFER_SIZE (ISO_FRAMES_PER_DESC * ISO_MAX_FRAME_SIZE)
-
-/* Frame buffers: contains compressed or uncompressed video data. */
-#define MAX_FRAMES 5
-/* Maximum size after decompression is 640x480 YUV data, 1.5 * 640 * 480 */
-#define PWC_FRAME_SIZE (460800 + TOUCAM_HEADER_SIZE + TOUCAM_TRAILER_SIZE)
-
-/* Absolute maximum number of buffers available for mmap() */
-#define MAX_IMAGES 10
-
-/* The following structures were based on cpia.h. Why reinvent the wheel? :-) */
-struct pwc_iso_buf
-{
- void *data;
- int length;
- int read;
- struct urb *urb;
-};
-
-/* intermediate buffers with raw data from the USB cam */
-struct pwc_frame_buf
-{
- void *data;
- volatile int filled; /* number of bytes filled */
- struct pwc_frame_buf *next; /* list */
-#if PWC_DEBUG
- int sequence; /* Sequence number */
-#endif
-};
-
-struct pwc_device
-{
- struct video_device *vdev;
-#ifdef PWC_MAGIC
- int magic;
-#endif
- /* Pointer to our usb_device */
- struct usb_device *udev;
-
- int type; /* type of cam (645, 646, 675, 680, 690, 720, 730, 740, 750) */
- int release; /* release number */
- int features; /* feature bits */
- char serial[30]; /* serial number (string) */
- int error_status; /* set when something goes wrong with the cam (unplugged, USB errors) */
- int usb_init; /* set when the cam has been initialized over USB */
-
- /*** Video data ***/
- int vopen; /* flag */
- int vendpoint; /* video isoc endpoint */
- int vcinterface; /* video control interface */
- int valternate; /* alternate interface needed */
- int vframes, vsize; /* frames-per-second & size (see PSZ_*) */
- int vpalette; /* palette: 420P, RAW or RGBBAYER */
- int vframe_count; /* received frames */
- int vframes_dumped; /* counter for dumped frames */
- int vframes_error; /* frames received in error */
- int vmax_packet_size; /* USB maxpacket size */
- int vlast_packet_size; /* for frame synchronisation */
- int visoc_errors; /* number of contiguous ISOC errors */
- int vcompression; /* desired compression factor */
- int vbandlength; /* compressed band length; 0 is uncompressed */
- char vsnapshot; /* snapshot mode */
- char vsync; /* used by isoc handler */
- char vmirror; /* for ToUCaM series */
-
- int cmd_len;
- unsigned char cmd_buf[13];
-
- /* The image acquisition requires 3 to 4 steps:
- 1. data is gathered in short packets from the USB controller
- 2. data is synchronized and packed into a frame buffer
- 3a. in case data is compressed, decompress it directly into image buffer
- 3b. in case data is uncompressed, copy into image buffer with viewport
- 4. data is transferred to the user process
-
- Note that MAX_ISO_BUFS != MAX_FRAMES != MAX_IMAGES....
- We have in effect a back-to-back-double-buffer system.
- */
- /* 1: isoc */
- struct pwc_iso_buf sbuf[MAX_ISO_BUFS];
- char iso_init;
-
- /* 2: frame */
- struct pwc_frame_buf *fbuf; /* all frames */
- struct pwc_frame_buf *empty_frames, *empty_frames_tail; /* all empty frames */
- struct pwc_frame_buf *full_frames, *full_frames_tail; /* all filled frames */
- struct pwc_frame_buf *fill_frame; /* frame currently being filled */
- struct pwc_frame_buf *read_frame; /* frame currently read by user process */
- int frame_header_size, frame_trailer_size;
- int frame_size;
- int frame_total_size; /* including header & trailer */
- int drop_frames;
-#if PWC_DEBUG
- int sequence; /* Debugging aid */
-#endif
-
- /* 3: decompression */
- struct pwc_decompressor *decompressor; /* function block with decompression routines */
- void *decompress_data; /* private data for decompression engine */
-
- /* 4: image */
- /* We have an 'image' and a 'view', where 'image' is the fixed-size image
- as delivered by the camera, and 'view' is the size requested by the
- program. The camera image is centered in this viewport, laced with
- a gray or black border. view_min <= image <= view <= view_max;
- */
- int image_mask; /* bitmask of supported sizes */
- struct pwc_coord view_min, view_max; /* minimum and maximum viewable sizes */
- struct pwc_coord abs_max; /* maximum supported size with compression */
- struct pwc_coord image, view; /* image and viewport size */
- struct pwc_coord offset; /* offset within the viewport */
-
- void *image_data; /* total buffer, which is subdivided into ... */
- void *image_ptr[MAX_IMAGES]; /* ...several images... */
- int fill_image; /* ...which are rotated. */
- int len_per_image; /* length per image */
- int image_read_pos; /* In case we read data in pieces, keep track of were we are in the imagebuffer */
- int image_used[MAX_IMAGES]; /* For MCAPTURE and SYNC */
-
- struct semaphore modlock; /* to prevent races in video_open(), etc */
- spinlock_t ptrlock; /* for manipulating the buffer pointers */
-
- /*** motorized pan/tilt feature */
- struct pwc_mpt_range angle_range;
- int pan_angle; /* in degrees * 100 */
- int tilt_angle; /* absolute angle; 0,0 is home position */
-
- /*** Misc. data ***/
- wait_queue_head_t frameq; /* When waiting for a frame to finish... */
-#if PWC_INT_PIPE
- void *usb_int_handler; /* for the interrupt endpoint */
-#endif
-};
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Global variables */
-extern int pwc_trace;
-extern int pwc_preferred_compression;
-
-/** functions in pwc-if.c */
-int pwc_try_video_mode(struct pwc_device *pdev, int width, int height, int new_fps, int new_compression, int new_snapshot);
-
-/** Functions in pwc-misc.c */
-/* sizes in pixels */
-extern struct pwc_coord pwc_image_sizes[PSZ_MAX];
-
-int pwc_decode_size(struct pwc_device *pdev, int width, int height);
-void pwc_construct(struct pwc_device *pdev);
-
-/** Functions in pwc-ctrl.c */
-/* Request a certain video mode. Returns < 0 if not possible */
-extern int pwc_set_video_mode(struct pwc_device *pdev, int width, int height, int frames, int compression, int snapshot);
-/* Calculate the number of bytes per image (not frame) */
-extern void pwc_set_image_buffer_size(struct pwc_device *pdev);
-
-/* Various controls; should be obvious. Value 0..65535, or < 0 on error */
-extern int pwc_get_brightness(struct pwc_device *pdev);
-extern int pwc_set_brightness(struct pwc_device *pdev, int value);
-extern int pwc_get_contrast(struct pwc_device *pdev);
-extern int pwc_set_contrast(struct pwc_device *pdev, int value);
-extern int pwc_get_gamma(struct pwc_device *pdev);
-extern int pwc_set_gamma(struct pwc_device *pdev, int value);
-extern int pwc_get_saturation(struct pwc_device *pdev);
-extern int pwc_set_saturation(struct pwc_device *pdev, int value);
-extern int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value);
-extern int pwc_get_leds(struct pwc_device *pdev, int *on_value, int *off_value);
-extern int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor);
-
-/* Power down or up the camera; not supported by all models */
-extern int pwc_camera_power(struct pwc_device *pdev, int power);
-
-/* Private ioctl()s; see pwc-ioctl.h */
-extern int pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg);
-
-
-/** pwc-uncompress.c */
-/* Expand frame to image, possibly including decompression. Uses read_frame and fill_image */
-extern int pwc_decompress(struct pwc_device *pdev);
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif
+++ /dev/null
- /* SQCIF */
- {
- /* 5 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 10 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 15 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 20 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 25 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 30 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- },
- /* QSIF */
- {
- /* 5 fps */
- {
- {1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
- {1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
- {1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
- {1, 146, 0, {0x1D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0x00, 0x80}},
- },
- /* 10 fps */
- {
- {2, 291, 0, {0x1C, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x23, 0x01, 0x80}},
- {1, 192, 630, {0x14, 0xF4, 0x30, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xC0, 0x00, 0x80}},
- {1, 192, 630, {0x14, 0xF4, 0x30, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xC0, 0x00, 0x80}},
- {1, 192, 630, {0x14, 0xF4, 0x30, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xC0, 0x00, 0x80}},
- },
- /* 15 fps */
- {
- {3, 437, 0, {0x1B, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xB5, 0x01, 0x80}},
- {2, 292, 640, {0x13, 0xF4, 0x30, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x20, 0x24, 0x01, 0x80}},
- {2, 292, 640, {0x13, 0xF4, 0x30, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x20, 0x24, 0x01, 0x80}},
- {1, 192, 420, {0x13, 0xF4, 0x30, 0x0D, 0x1B, 0x0C, 0x53, 0x1E, 0x18, 0xC0, 0x00, 0x80}},
- },
- /* 20 fps */
- {
- {4, 589, 0, {0x1A, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x4D, 0x02, 0x80}},
- {3, 448, 730, {0x12, 0xF4, 0x30, 0x16, 0xC9, 0x16, 0x01, 0x0E, 0x18, 0xC0, 0x01, 0x80}},
- {2, 292, 476, {0x12, 0xF4, 0x30, 0x0E, 0xD8, 0x0E, 0x10, 0x19, 0x18, 0x24, 0x01, 0x80}},
- {1, 192, 312, {0x12, 0xF4, 0x50, 0x09, 0xB3, 0x08, 0xEB, 0x1E, 0x18, 0xC0, 0x00, 0x80}},
- },
- /* 25 fps */
- {
- {5, 703, 0, {0x19, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xBF, 0x02, 0x80}},
- {3, 447, 610, {0x11, 0xF4, 0x30, 0x13, 0x0B, 0x12, 0x43, 0x14, 0x28, 0xBF, 0x01, 0x80}},
- {2, 292, 398, {0x11, 0xF4, 0x50, 0x0C, 0x6C, 0x0B, 0xA4, 0x1E, 0x28, 0x24, 0x01, 0x80}},
- {1, 193, 262, {0x11, 0xF4, 0x50, 0x08, 0x23, 0x07, 0x5B, 0x1E, 0x28, 0xC1, 0x00, 0x80}},
- },
- /* 30 fps */
- {
- {8, 874, 0, {0x18, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x6A, 0x03, 0x80}},
- {5, 704, 730, {0x10, 0xF4, 0x30, 0x16, 0xC9, 0x16, 0x01, 0x0E, 0x28, 0xC0, 0x02, 0x80}},
- {3, 448, 492, {0x10, 0xF4, 0x30, 0x0F, 0x5D, 0x0E, 0x95, 0x15, 0x28, 0xC0, 0x01, 0x80}},
- {2, 292, 320, {0x10, 0xF4, 0x50, 0x09, 0xFB, 0x09, 0x33, 0x1E, 0x28, 0x24, 0x01, 0x80}},
- },
- },
- /* QCIF */
- {
- /* 5 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 10 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 15 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 20 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 25 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 30 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- },
- /* SIF */
- {
- /* 5 fps */
- {
- {4, 582, 0, {0x0D, 0xF4, 0x30, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x46, 0x02, 0x80}},
- {3, 387, 1276, {0x05, 0xF4, 0x30, 0x27, 0xD8, 0x26, 0x48, 0x03, 0x10, 0x83, 0x01, 0x80}},
- {2, 291, 960, {0x05, 0xF4, 0x30, 0x1D, 0xF2, 0x1C, 0x62, 0x04, 0x10, 0x23, 0x01, 0x80}},
- {1, 191, 630, {0x05, 0xF4, 0x50, 0x13, 0xA9, 0x12, 0x19, 0x05, 0x18, 0xBF, 0x00, 0x80}},
- },
- /* 10 fps */
- {
- {0, },
- {6, 775, 1278, {0x04, 0xF4, 0x30, 0x27, 0xE8, 0x26, 0x58, 0x05, 0x30, 0x07, 0x03, 0x80}},
- {3, 447, 736, {0x04, 0xF4, 0x30, 0x16, 0xFB, 0x15, 0x6B, 0x05, 0x28, 0xBF, 0x01, 0x80}},
- {2, 292, 480, {0x04, 0xF4, 0x70, 0x0E, 0xF9, 0x0D, 0x69, 0x09, 0x28, 0x24, 0x01, 0x80}},
- },
- /* 15 fps */
- {
- {0, },
- {9, 955, 1050, {0x03, 0xF4, 0x30, 0x20, 0xCF, 0x1F, 0x3F, 0x06, 0x48, 0xBB, 0x03, 0x80}},
- {4, 592, 650, {0x03, 0xF4, 0x30, 0x14, 0x44, 0x12, 0xB4, 0x08, 0x30, 0x50, 0x02, 0x80}},
- {3, 448, 492, {0x03, 0xF4, 0x50, 0x0F, 0x52, 0x0D, 0xC2, 0x09, 0x38, 0xC0, 0x01, 0x80}},
- },
- /* 20 fps */
- {
- {0, },
- {9, 958, 782, {0x02, 0xF4, 0x30, 0x18, 0x6A, 0x16, 0xDA, 0x0B, 0x58, 0xBE, 0x03, 0x80}},
- {5, 703, 574, {0x02, 0xF4, 0x50, 0x11, 0xE7, 0x10, 0x57, 0x0B, 0x40, 0xBF, 0x02, 0x80}},
- {3, 446, 364, {0x02, 0xF4, 0x90, 0x0B, 0x5C, 0x09, 0xCC, 0x0E, 0x38, 0xBE, 0x01, 0x80}},
- },
- /* 25 fps */
- {
- {0, },
- {9, 958, 654, {0x01, 0xF4, 0x30, 0x14, 0x66, 0x12, 0xD6, 0x0B, 0x50, 0xBE, 0x03, 0x80}},
- {6, 776, 530, {0x01, 0xF4, 0x50, 0x10, 0x8C, 0x0E, 0xFC, 0x0C, 0x48, 0x08, 0x03, 0x80}},
- {4, 592, 404, {0x01, 0xF4, 0x70, 0x0C, 0x96, 0x0B, 0x06, 0x0B, 0x48, 0x50, 0x02, 0x80}},
- },
- /* 30 fps */
- {
- {0, },
- {9, 957, 526, {0x00, 0xF4, 0x50, 0x10, 0x68, 0x0E, 0xD8, 0x0D, 0x58, 0xBD, 0x03, 0x80}},
- {6, 775, 426, {0x00, 0xF4, 0x70, 0x0D, 0x48, 0x0B, 0xB8, 0x0F, 0x50, 0x07, 0x03, 0x80}},
- {4, 590, 324, {0x00, 0x7A, 0x88, 0x0A, 0x1C, 0x08, 0xB4, 0x0E, 0x50, 0x4E, 0x02, 0x80}},
- },
- },
- /* CIF */
- {
- /* 5 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 10 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 15 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 20 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 25 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 30 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- },
- /* VGA */
- {
- /* 5 fps */
- {
- {0, },
- {6, 773, 1272, {0x25, 0xF4, 0x30, 0x27, 0xB6, 0x24, 0x96, 0x02, 0x30, 0x05, 0x03, 0x80}},
- {4, 592, 976, {0x25, 0xF4, 0x50, 0x1E, 0x78, 0x1B, 0x58, 0x03, 0x30, 0x50, 0x02, 0x80}},
- {3, 448, 738, {0x25, 0xF4, 0x90, 0x17, 0x0C, 0x13, 0xEC, 0x04, 0x30, 0xC0, 0x01, 0x80}},
- },
- /* 10 fps */
- {
- {0, },
- {9, 956, 788, {0x24, 0xF4, 0x70, 0x18, 0x9C, 0x15, 0x7C, 0x03, 0x48, 0xBC, 0x03, 0x80}},
- {6, 776, 640, {0x24, 0xF4, 0xB0, 0x13, 0xFC, 0x11, 0x2C, 0x04, 0x48, 0x08, 0x03, 0x80}},
- {4, 592, 488, {0x24, 0x7A, 0xE8, 0x0F, 0x3C, 0x0C, 0x6C, 0x06, 0x48, 0x50, 0x02, 0x80}},
- },
- /* 15 fps */
- {
- {0, },
- {9, 957, 526, {0x23, 0x7A, 0xE8, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x03, 0x80}},
- {9, 957, 526, {0x23, 0x7A, 0xE8, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x03, 0x80}},
- {8, 895, 492, {0x23, 0x7A, 0xE8, 0x0F, 0x5D, 0x0C, 0x8D, 0x06, 0x58, 0x7F, 0x03, 0x80}},
- },
- /* 20 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 25 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 30 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- },
+++ /dev/null
- /* SQCIF */
- {
- {0, 0, {0x04, 0x01, 0x03}},
- {8, 0, {0x05, 0x01, 0x03}},
- {7, 0, {0x08, 0x01, 0x03}},
- {7, 0, {0x0A, 0x01, 0x03}},
- {6, 0, {0x0C, 0x01, 0x03}},
- {5, 0, {0x0F, 0x01, 0x03}},
- {4, 0, {0x14, 0x01, 0x03}},
- {3, 0, {0x18, 0x01, 0x03}},
- },
- /* QSIF */
- {
- {0},
- {0},
- {0},
- {0},
- {0},
- {0},
- {0},
- {0},
- },
- /* QCIF */
- {
- {0, 0, {0x04, 0x01, 0x02}},
- {8, 0, {0x05, 0x01, 0x02}},
- {7, 0, {0x08, 0x01, 0x02}},
- {6, 0, {0x0A, 0x01, 0x02}},
- {5, 0, {0x0C, 0x01, 0x02}},
- {4, 0, {0x0F, 0x01, 0x02}},
- {1, 0, {0x14, 0x01, 0x02}},
- {1, 0, {0x18, 0x01, 0x02}},
- },
- /* SIF */
- {
- {0},
- {0},
- {0},
- {0},
- {0},
- {0},
- {0},
- {0},
- },
- /* CIF */
- {
- {4, 0, {0x04, 0x01, 0x01}},
- {7, 1, {0x05, 0x03, 0x01}},
- {6, 1, {0x08, 0x03, 0x01}},
- {4, 1, {0x0A, 0x03, 0x01}},
- {3, 1, {0x0C, 0x03, 0x01}},
- {2, 1, {0x0F, 0x03, 0x01}},
- {0},
- {0},
- },
- /* VGA */
- {
- {0},
- {0},
- {0},
- {0},
- {0},
- {0},
- {0},
- {0},
- },
+++ /dev/null
- /* SQCIF */
- {
- /* 5 fps */
- {
- {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
- {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
- {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
- {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}},
- },
- /* 10 fps */
- {
- {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
- {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
- {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
- {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}},
- },
- /* 15 fps */
- {
- {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
- {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
- {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
- {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}},
- },
- /* 20 fps */
- {
- {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
- {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
- {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
- {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}},
- },
- /* 25 fps */
- {
- {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
- {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
- {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
- {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}},
- },
- /* 30 fps */
- {
- {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
- {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
- {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
- {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}},
- },
- },
- /* QSIF */
- {
- /* 5 fps */
- {
- {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
- {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
- {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
- {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}},
- },
- /* 10 fps */
- {
- {2, 291, 0, {0x2C, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x23, 0xA1, 0xC0, 0x02}},
- {1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
- {1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
- {1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
- },
- /* 15 fps */
- {
- {3, 437, 0, {0x2B, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xB5, 0x6D, 0xC0, 0x02}},
- {2, 291, 640, {0x2B, 0xF4, 0x05, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
- {2, 291, 640, {0x2B, 0xF4, 0x05, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
- {1, 191, 420, {0x2B, 0xF4, 0x0D, 0x0D, 0x1B, 0x0C, 0x53, 0x1E, 0x08, 0xBF, 0xF4, 0xC0, 0x02}},
- },
- /* 20 fps */
- {
- {4, 588, 0, {0x2A, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x4C, 0x52, 0xC0, 0x02}},
- {3, 447, 730, {0x2A, 0xF4, 0x05, 0x16, 0xC9, 0x16, 0x01, 0x0E, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
- {2, 292, 476, {0x2A, 0xF4, 0x0D, 0x0E, 0xD8, 0x0E, 0x10, 0x19, 0x18, 0x24, 0xA1, 0xC0, 0x02}},
- {1, 192, 312, {0x2A, 0xF4, 0x1D, 0x09, 0xB3, 0x08, 0xEB, 0x1E, 0x18, 0xC0, 0xF4, 0xC0, 0x02}},
- },
- /* 25 fps */
- {
- {5, 703, 0, {0x29, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xBF, 0x42, 0xC0, 0x02}},
- {3, 447, 610, {0x29, 0xF4, 0x05, 0x13, 0x0B, 0x12, 0x43, 0x14, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
- {2, 292, 398, {0x29, 0xF4, 0x0D, 0x0C, 0x6C, 0x0B, 0xA4, 0x1E, 0x18, 0x24, 0xA1, 0xC0, 0x02}},
- {1, 192, 262, {0x29, 0xF4, 0x25, 0x08, 0x23, 0x07, 0x5B, 0x1E, 0x18, 0xC0, 0xF4, 0xC0, 0x02}},
- },
- /* 30 fps */
- {
- {8, 873, 0, {0x28, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x69, 0x37, 0xC0, 0x02}},
- {5, 704, 774, {0x28, 0xF4, 0x05, 0x18, 0x21, 0x17, 0x59, 0x0F, 0x18, 0xC0, 0x42, 0xC0, 0x02}},
- {3, 448, 492, {0x28, 0xF4, 0x05, 0x0F, 0x5D, 0x0E, 0x95, 0x15, 0x18, 0xC0, 0x69, 0xC0, 0x02}},
- {2, 291, 320, {0x28, 0xF4, 0x1D, 0x09, 0xFB, 0x09, 0x33, 0x1E, 0x18, 0x23, 0xA1, 0xC0, 0x02}},
- },
- },
- /* QCIF */
- {
- /* 5 fps */
- {
- {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
- {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
- {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
- {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}},
- },
- /* 10 fps */
- {
- {3, 385, 0, {0x0C, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x81, 0x79, 0xC0, 0x02}},
- {2, 291, 800, {0x0C, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x11, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
- {2, 291, 800, {0x0C, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x11, 0x08, 0x23, 0xA1, 0xC0, 0x02}},
- {1, 194, 532, {0x0C, 0xF4, 0x05, 0x10, 0x9A, 0x0F, 0xBE, 0x1B, 0x08, 0xC2, 0xF0, 0xC0, 0x02}},
- },
- /* 15 fps */
- {
- {4, 577, 0, {0x0B, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x41, 0x52, 0xC0, 0x02}},
- {3, 447, 818, {0x0B, 0xF4, 0x05, 0x19, 0x89, 0x18, 0xAD, 0x0F, 0x10, 0xBF, 0x69, 0xC0, 0x02}},
- {2, 292, 534, {0x0B, 0xF4, 0x05, 0x10, 0xA3, 0x0F, 0xC7, 0x19, 0x10, 0x24, 0xA1, 0xC0, 0x02}},
- {1, 195, 356, {0x0B, 0xF4, 0x15, 0x0B, 0x11, 0x0A, 0x35, 0x1E, 0x10, 0xC3, 0xF0, 0xC0, 0x02}},
- },
- /* 20 fps */
- {
- {6, 776, 0, {0x0A, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x08, 0x3F, 0xC0, 0x02}},
- {4, 591, 804, {0x0A, 0xF4, 0x05, 0x19, 0x1E, 0x18, 0x42, 0x0F, 0x18, 0x4F, 0x4E, 0xC0, 0x02}},
- {3, 447, 608, {0x0A, 0xF4, 0x05, 0x12, 0xFD, 0x12, 0x21, 0x15, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
- {2, 291, 396, {0x0A, 0xF4, 0x15, 0x0C, 0x5E, 0x0B, 0x82, 0x1E, 0x18, 0x23, 0xA1, 0xC0, 0x02}},
- },
- /* 25 fps */
- {
- {9, 928, 0, {0x09, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xA0, 0x33, 0xC0, 0x02}},
- {5, 703, 800, {0x09, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x10, 0x18, 0xBF, 0x42, 0xC0, 0x02}},
- {3, 447, 508, {0x09, 0xF4, 0x0D, 0x0F, 0xD2, 0x0E, 0xF6, 0x1B, 0x18, 0xBF, 0x69, 0xC0, 0x02}},
- {2, 292, 332, {0x09, 0xF4, 0x1D, 0x0A, 0x5A, 0x09, 0x7E, 0x1E, 0x18, 0x24, 0xA1, 0xC0, 0x02}},
- },
- /* 30 fps */
- {
- {0, },
- {9, 956, 876, {0x08, 0xF4, 0x05, 0x1B, 0x58, 0x1A, 0x7C, 0x0E, 0x20, 0xBC, 0x33, 0x10, 0x02}},
- {4, 592, 542, {0x08, 0xF4, 0x05, 0x10, 0xE4, 0x10, 0x08, 0x17, 0x20, 0x50, 0x4E, 0x10, 0x02}},
- {2, 291, 266, {0x08, 0xF4, 0x25, 0x08, 0x48, 0x07, 0x6C, 0x1E, 0x20, 0x23, 0xA1, 0x10, 0x02}},
- },
- },
- /* SIF */
- {
- /* 5 fps */
- {
- {4, 582, 0, {0x35, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x46, 0x52, 0x60, 0x02}},
- {3, 387, 1276, {0x35, 0xF4, 0x05, 0x27, 0xD8, 0x26, 0x48, 0x03, 0x10, 0x83, 0x79, 0x60, 0x02}},
- {2, 291, 960, {0x35, 0xF4, 0x0D, 0x1D, 0xF2, 0x1C, 0x62, 0x04, 0x10, 0x23, 0xA1, 0x60, 0x02}},
- {1, 191, 630, {0x35, 0xF4, 0x1D, 0x13, 0xA9, 0x12, 0x19, 0x05, 0x08, 0xBF, 0xF4, 0x60, 0x02}},
- },
- /* 10 fps */
- {
- {0, },
- {6, 775, 1278, {0x34, 0xF4, 0x05, 0x27, 0xE8, 0x26, 0x58, 0x05, 0x30, 0x07, 0x3F, 0x10, 0x02}},
- {3, 447, 736, {0x34, 0xF4, 0x15, 0x16, 0xFB, 0x15, 0x6B, 0x05, 0x18, 0xBF, 0x69, 0x10, 0x02}},
- {2, 291, 480, {0x34, 0xF4, 0x2D, 0x0E, 0xF9, 0x0D, 0x69, 0x09, 0x18, 0x23, 0xA1, 0x10, 0x02}},
- },
- /* 15 fps */
- {
- {0, },
- {9, 955, 1050, {0x33, 0xF4, 0x05, 0x20, 0xCF, 0x1F, 0x3F, 0x06, 0x48, 0xBB, 0x33, 0x10, 0x02}},
- {4, 591, 650, {0x33, 0xF4, 0x15, 0x14, 0x44, 0x12, 0xB4, 0x08, 0x30, 0x4F, 0x4E, 0x10, 0x02}},
- {3, 448, 492, {0x33, 0xF4, 0x25, 0x0F, 0x52, 0x0D, 0xC2, 0x09, 0x28, 0xC0, 0x69, 0x10, 0x02}},
- },
- /* 20 fps */
- {
- {0, },
- {9, 958, 782, {0x32, 0xF4, 0x0D, 0x18, 0x6A, 0x16, 0xDA, 0x0B, 0x58, 0xBE, 0x33, 0xD0, 0x02}},
- {5, 703, 574, {0x32, 0xF4, 0x1D, 0x11, 0xE7, 0x10, 0x57, 0x0B, 0x40, 0xBF, 0x42, 0xD0, 0x02}},
- {3, 446, 364, {0x32, 0xF4, 0x3D, 0x0B, 0x5C, 0x09, 0xCC, 0x0E, 0x30, 0xBE, 0x69, 0xD0, 0x02}},
- },
- /* 25 fps */
- {
- {0, },
- {9, 958, 654, {0x31, 0xF4, 0x15, 0x14, 0x66, 0x12, 0xD6, 0x0B, 0x50, 0xBE, 0x33, 0x90, 0x02}},
- {6, 776, 530, {0x31, 0xF4, 0x25, 0x10, 0x8C, 0x0E, 0xFC, 0x0C, 0x48, 0x08, 0x3F, 0x90, 0x02}},
- {4, 592, 404, {0x31, 0xF4, 0x35, 0x0C, 0x96, 0x0B, 0x06, 0x0B, 0x38, 0x50, 0x4E, 0x90, 0x02}},
- },
- /* 30 fps */
- {
- {0, },
- {9, 957, 526, {0x30, 0xF4, 0x25, 0x10, 0x68, 0x0E, 0xD8, 0x0D, 0x58, 0xBD, 0x33, 0x60, 0x02}},
- {6, 775, 426, {0x30, 0xF4, 0x35, 0x0D, 0x48, 0x0B, 0xB8, 0x0F, 0x50, 0x07, 0x3F, 0x60, 0x02}},
- {4, 590, 324, {0x30, 0x7A, 0x4B, 0x0A, 0x1C, 0x08, 0xB4, 0x0E, 0x40, 0x4E, 0x52, 0x60, 0x02}},
- },
- },
- /* CIF */
- {
- /* 5 fps */
- {
- {6, 771, 0, {0x15, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x03, 0x3F, 0x80, 0x02}},
- {4, 465, 1278, {0x15, 0xF4, 0x05, 0x27, 0xEE, 0x26, 0x36, 0x03, 0x18, 0xD1, 0x65, 0x80, 0x02}},
- {2, 291, 800, {0x15, 0xF4, 0x15, 0x18, 0xF4, 0x17, 0x3C, 0x05, 0x18, 0x23, 0xA1, 0x80, 0x02}},
- {1, 193, 528, {0x15, 0xF4, 0x2D, 0x10, 0x7E, 0x0E, 0xC6, 0x0A, 0x18, 0xC1, 0xF4, 0x80, 0x02}},
- },
- /* 10 fps */
- {
- {0, },
- {9, 932, 1278, {0x14, 0xF4, 0x05, 0x27, 0xEE, 0x26, 0x36, 0x04, 0x30, 0xA4, 0x33, 0x10, 0x02}},
- {4, 591, 812, {0x14, 0xF4, 0x15, 0x19, 0x56, 0x17, 0x9E, 0x06, 0x28, 0x4F, 0x4E, 0x10, 0x02}},
- {2, 291, 400, {0x14, 0xF4, 0x3D, 0x0C, 0x7A, 0x0A, 0xC2, 0x0E, 0x28, 0x23, 0xA1, 0x10, 0x02}},
- },
- /* 15 fps */
- {
- {0, },
- {9, 956, 876, {0x13, 0xF4, 0x0D, 0x1B, 0x58, 0x19, 0xA0, 0x05, 0x38, 0xBC, 0x33, 0x60, 0x02}},
- {5, 703, 644, {0x13, 0xF4, 0x1D, 0x14, 0x1C, 0x12, 0x64, 0x08, 0x38, 0xBF, 0x42, 0x60, 0x02}},
- {3, 448, 410, {0x13, 0xF4, 0x3D, 0x0C, 0xC4, 0x0B, 0x0C, 0x0E, 0x38, 0xC0, 0x69, 0x60, 0x02}},
- },
- /* 20 fps */
- {
- {0, },
- {9, 956, 650, {0x12, 0xF4, 0x1D, 0x14, 0x4A, 0x12, 0x92, 0x09, 0x48, 0xBC, 0x33, 0x10, 0x03}},
- {6, 776, 528, {0x12, 0xF4, 0x2D, 0x10, 0x7E, 0x0E, 0xC6, 0x0A, 0x40, 0x08, 0x3F, 0x10, 0x03}},
- {4, 591, 402, {0x12, 0xF4, 0x3D, 0x0C, 0x8F, 0x0A, 0xD7, 0x0E, 0x40, 0x4F, 0x4E, 0x10, 0x03}},
- },
- /* 25 fps */
- {
- {0, },
- {9, 956, 544, {0x11, 0xF4, 0x25, 0x10, 0xF4, 0x0F, 0x3C, 0x0A, 0x48, 0xBC, 0x33, 0xC0, 0x02}},
- {7, 840, 478, {0x11, 0xF4, 0x2D, 0x0E, 0xEB, 0x0D, 0x33, 0x0B, 0x48, 0x48, 0x3B, 0xC0, 0x02}},
- {5, 703, 400, {0x11, 0xF4, 0x3D, 0x0C, 0x7A, 0x0A, 0xC2, 0x0E, 0x48, 0xBF, 0x42, 0xC0, 0x02}},
- },
- /* 30 fps */
- {
- {0, },
- {9, 956, 438, {0x10, 0xF4, 0x35, 0x0D, 0xAC, 0x0B, 0xF4, 0x0D, 0x50, 0xBC, 0x33, 0x10, 0x02}},
- {7, 838, 384, {0x10, 0xF4, 0x45, 0x0B, 0xFD, 0x0A, 0x45, 0x0F, 0x50, 0x46, 0x3B, 0x10, 0x02}},
- {6, 773, 354, {0x10, 0x7A, 0x4B, 0x0B, 0x0C, 0x09, 0x80, 0x10, 0x50, 0x05, 0x3F, 0x10, 0x02}},
- },
- },
- /* VGA */
- {
- /* 5 fps */
- {
- {0, },
- {6, 773, 1272, {0x1D, 0xF4, 0x15, 0x27, 0xB6, 0x24, 0x96, 0x02, 0x30, 0x05, 0x3F, 0x10, 0x02}},
- {4, 592, 976, {0x1D, 0xF4, 0x25, 0x1E, 0x78, 0x1B, 0x58, 0x03, 0x30, 0x50, 0x4E, 0x10, 0x02}},
- {3, 448, 738, {0x1D, 0xF4, 0x3D, 0x17, 0x0C, 0x13, 0xEC, 0x04, 0x30, 0xC0, 0x69, 0x10, 0x02}},
- },
- /* 10 fps */
- {
- {0, },
- {9, 956, 788, {0x1C, 0xF4, 0x35, 0x18, 0x9C, 0x15, 0x7C, 0x03, 0x48, 0xBC, 0x33, 0x10, 0x02}},
- {6, 776, 640, {0x1C, 0x7A, 0x53, 0x13, 0xFC, 0x11, 0x2C, 0x04, 0x48, 0x08, 0x3F, 0x10, 0x02}},
- {4, 592, 488, {0x1C, 0x7A, 0x6B, 0x0F, 0x3C, 0x0C, 0x6C, 0x06, 0x48, 0x50, 0x4E, 0x10, 0x02}},
- },
- /* 15 fps */
- {
- {0, },
- {9, 957, 526, {0x1B, 0x7A, 0x63, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x33, 0x80, 0x02}},
- {9, 957, 526, {0x1B, 0x7A, 0x63, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x33, 0x80, 0x02}},
- {8, 895, 492, {0x1B, 0x7A, 0x6B, 0x0F, 0x5D, 0x0C, 0x8D, 0x06, 0x58, 0x7F, 0x37, 0x80, 0x02}},
- },
- /* 20 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 25 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- /* 30 fps */
- {
- {0, },
- {0, },
- {0, },
- {0, },
- },
- },
+++ /dev/null
-/***************************************************************************
- * Various definitions for compatibility with OVCAMCHIP external module. *
- * This file is part of the W996[87]CF driver for Linux. *
- * *
- * The definitions have been taken from the OVCAMCHIP module written by *
- * Mark McClelland. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the Free Software *
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
- ***************************************************************************/
-
-#ifndef _W9968CF_EXTERNALDEF_H_
-#define _W9968CF_EXTERNALDEF_H_
-
-#include <linux/videodev.h>
-#include <linux/i2c.h>
-#include <asm/ioctl.h>
-#include <asm/types.h>
-
-#ifndef I2C_DRIVERID_OVCAMCHIP
-# define I2C_DRIVERID_OVCAMCHIP 0xf00f
-#endif
-
-/* Controls */
-enum {
- OVCAMCHIP_CID_CONT, /* Contrast */
- OVCAMCHIP_CID_BRIGHT, /* Brightness */
- OVCAMCHIP_CID_SAT, /* Saturation */
- OVCAMCHIP_CID_HUE, /* Hue */
- OVCAMCHIP_CID_EXP, /* Exposure */
- OVCAMCHIP_CID_FREQ, /* Light frequency */
- OVCAMCHIP_CID_BANDFILT, /* Banding filter */
- OVCAMCHIP_CID_AUTOBRIGHT, /* Auto brightness */
- OVCAMCHIP_CID_AUTOEXP, /* Auto exposure */
- OVCAMCHIP_CID_BACKLIGHT, /* Back light compensation */
- OVCAMCHIP_CID_MIRROR, /* Mirror horizontally */
-};
-
-/* I2C addresses */
-#define OV7xx0_SID (0x42 >> 1)
-#define OV6xx0_SID (0xC0 >> 1)
-
-/* Sensor types */
-enum {
- CC_UNKNOWN,
- CC_OV76BE,
- CC_OV7610,
- CC_OV7620,
- CC_OV7620AE,
- CC_OV6620,
- CC_OV6630,
- CC_OV6630AE,
- CC_OV6630AF,
-};
-
-/* API */
-struct ovcamchip_control {
- __u32 id;
- __s32 value;
-};
-
-struct ovcamchip_window {
- int x;
- int y;
- int width;
- int height;
- int format;
- int quarter; /* Scale width and height down 2x */
-
- /* This stuff will be removed eventually */
- int clockdiv; /* Clock divisor setting */
-};
-
-/* Commands.
- You must call OVCAMCHIP_CMD_INITIALIZE before any of other commands */
-#define OVCAMCHIP_CMD_Q_SUBTYPE _IOR (0x88, 0x00, int)
-#define OVCAMCHIP_CMD_INITIALIZE _IOW (0x88, 0x01, int)
-#define OVCAMCHIP_CMD_S_CTRL _IOW (0x88, 0x02, struct ovcamchip_control)
-#define OVCAMCHIP_CMD_G_CTRL _IOWR (0x88, 0x03, struct ovcamchip_control)
-#define OVCAMCHIP_CMD_S_MODE _IOW (0x88, 0x04, struct ovcamchip_window)
-#define OVCAMCHIP_MAX_CMD _IO (0x88, 0x3f)
-
-#endif /* _W9968CF_EXTERNALDEF_H_ */
+++ /dev/null
-/******************************************************************************
- * speedtouch.c - Alcatel SpeedTouch USB xDSL modem driver
- *
- * Copyright (C) 2001, Alcatel
- * Copyright (C) 2003, Duncan Sands
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- *
- ******************************************************************************/
-
-/*
- * Written by Johan Verrept, maintained by Duncan Sands (duncan.sands@free.fr)
- *
- * 1.7+: - See the check-in logs
- *
- * 1.6: - No longer opens a connection if the firmware is not loaded
- * - Added support for the speedtouch 330
- * - Removed the limit on the number of devices
- * - Module now autoloads on device plugin
- * - Merged relevant parts of sarlib
- * - Replaced the kernel thread with a tasklet
- * - New packet transmission code
- * - Changed proc file contents
- * - Fixed all known SMP races
- * - Many fixes and cleanups
- * - Various fixes by Oliver Neukum (oliver@neukum.name)
- *
- * 1.5A: - Version for inclusion in 2.5 series kernel
- * - Modifications by Richard Purdie (rpurdie@rpsys.net)
- * - made compatible with kernel 2.5.6 onwards by changing
- * udsl_usb_send_data_context->urb to a pointer and adding code
- * to alloc and free it
- * - remove_wait_queue() added to udsl_atm_processqueue_thread()
- *
- * 1.5: - fixed memory leak when atmsar_decode_aal5 returned NULL.
- * (reported by stephen.robinson@zen.co.uk)
- *
- * 1.4: - changed the spin_lock() under interrupt to spin_lock_irqsave()
- * - unlink all active send urbs of a vcc that is being closed.
- *
- * 1.3.1: - added the version number
- *
- * 1.3: - Added multiple send urb support
- * - fixed memory leak and vcc->tx_inuse starvation bug
- * when not enough memory left in vcc.
- *
- * 1.2: - Fixed race condition in udsl_usb_send_data()
- * 1.1: - Turned off packet debugging
- *
- */
-
-#include <asm/semaphore.h>
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/timer.h>
-#include <linux/errno.h>
-#include <linux/proc_fs.h>
-#include <linux/slab.h>
-#include <linux/list.h>
-#include <asm/uaccess.h>
-#include <linux/smp_lock.h>
-#include <linux/interrupt.h>
-#include <linux/atm.h>
-#include <linux/atmdev.h>
-#include <linux/crc32.h>
-#include <linux/init.h>
-
-/*
-#define DEBUG
-#define VERBOSE_DEBUG
-*/
-
-#if !defined (DEBUG) && defined (CONFIG_USB_DEBUG)
-# define DEBUG
-#endif
-
-#include <linux/usb.h>
-
-#ifdef DEBUG
-#define DEBUG_ON(x) BUG_ON(x)
-#else
-#define DEBUG_ON(x) do { if (x); } while (0)
-#endif
-
-#ifdef VERBOSE_DEBUG
-static int udsl_print_packet (const unsigned char *data, int len);
-#define PACKETDEBUG(arg...) udsl_print_packet (arg)
-#define vdbg(arg...) dbg (arg)
-#else
-#define PACKETDEBUG(arg...)
-#define vdbg(arg...)
-#endif
-
-#define DRIVER_AUTHOR "Johan Verrept, Duncan Sands <duncan.sands@free.fr>"
-#define DRIVER_VERSION "1.8"
-#define DRIVER_DESC "Alcatel SpeedTouch USB driver version " DRIVER_VERSION
-
-static const char udsl_driver_name [] = "speedtch";
-
-#define SPEEDTOUCH_VENDORID 0x06b9
-#define SPEEDTOUCH_PRODUCTID 0x4061
-
-#define UDSL_MAX_RCV_URBS 4
-#define UDSL_MAX_SND_URBS 4
-#define UDSL_MAX_RCV_BUFS 8
-#define UDSL_MAX_SND_BUFS 8
-#define UDSL_MAX_RCV_BUF_SIZE 1024 /* ATM cells */
-#define UDSL_MAX_SND_BUF_SIZE 1024 /* ATM cells */
-#define UDSL_DEFAULT_RCV_URBS 2
-#define UDSL_DEFAULT_SND_URBS 2
-#define UDSL_DEFAULT_RCV_BUFS 4
-#define UDSL_DEFAULT_SND_BUFS 4
-#define UDSL_DEFAULT_RCV_BUF_SIZE 64 /* ATM cells */
-#define UDSL_DEFAULT_SND_BUF_SIZE 64 /* ATM cells */
-
-static unsigned int num_rcv_urbs = UDSL_DEFAULT_RCV_URBS;
-static unsigned int num_snd_urbs = UDSL_DEFAULT_SND_URBS;
-static unsigned int num_rcv_bufs = UDSL_DEFAULT_RCV_BUFS;
-static unsigned int num_snd_bufs = UDSL_DEFAULT_SND_BUFS;
-static unsigned int rcv_buf_size = UDSL_DEFAULT_RCV_BUF_SIZE;
-static unsigned int snd_buf_size = UDSL_DEFAULT_SND_BUF_SIZE;
-
-module_param (num_rcv_urbs, uint, 0444);
-MODULE_PARM_DESC (num_rcv_urbs, "Number of urbs used for reception (range: 0-" __MODULE_STRING (UDSL_MAX_RCV_URBS) ", default: " __MODULE_STRING (UDSL_DEFAULT_RCV_URBS) ")");
-
-module_param (num_snd_urbs, uint, 0444);
-MODULE_PARM_DESC (num_snd_urbs, "Number of urbs used for transmission (range: 0-" __MODULE_STRING (UDSL_MAX_SND_URBS) ", default: " __MODULE_STRING (UDSL_DEFAULT_SND_URBS) ")");
-
-module_param (num_rcv_bufs, uint, 0444);
-MODULE_PARM_DESC (num_rcv_bufs, "Number of buffers used for reception (range: 0-" __MODULE_STRING (UDSL_MAX_RCV_BUFS) ", default: " __MODULE_STRING (UDSL_DEFAULT_RCV_BUFS) ")");
-
-module_param (num_snd_bufs, uint, 0444);
-MODULE_PARM_DESC (num_snd_bufs, "Number of buffers used for transmission (range: 0-" __MODULE_STRING (UDSL_MAX_SND_BUFS) ", default: " __MODULE_STRING (UDSL_DEFAULT_SND_BUFS) ")");
-
-module_param (rcv_buf_size, uint, 0444);
-MODULE_PARM_DESC (rcv_buf_size, "Size of the buffers used for reception (range: 0-" __MODULE_STRING (UDSL_MAX_RCV_BUF_SIZE) ", default: " __MODULE_STRING (UDSL_DEFAULT_RCV_BUF_SIZE) ")");
-
-module_param (snd_buf_size, uint, 0444);
-MODULE_PARM_DESC (snd_buf_size, "Size of the buffers used for transmission (range: 0-" __MODULE_STRING (UDSL_MAX_SND_BUF_SIZE) ", default: " __MODULE_STRING (UDSL_DEFAULT_SND_BUF_SIZE) ")");
-
-#define UDSL_IOCTL_LINE_UP 1
-#define UDSL_IOCTL_LINE_DOWN 2
-
-#define UDSL_ENDPOINT_DATA_OUT 0x07
-#define UDSL_ENDPOINT_DATA_IN 0x87
-
-#define ATM_CELL_HEADER (ATM_CELL_SIZE - ATM_CELL_PAYLOAD)
-#define UDSL_NUM_CELLS(x) (((x) + ATM_AAL5_TRAILER + ATM_CELL_PAYLOAD - 1) / ATM_CELL_PAYLOAD)
-
-#define hex2int(c) ( (c >= '0') && (c <= '9') ? (c - '0') : ((c & 0xf) + 9) )
-
-static struct usb_device_id udsl_usb_ids [] = {
- { USB_DEVICE (SPEEDTOUCH_VENDORID, SPEEDTOUCH_PRODUCTID) },
- { }
-};
-
-MODULE_DEVICE_TABLE (usb, udsl_usb_ids);
-
-/* receive */
-
-struct udsl_receive_buffer {
- struct list_head list;
- unsigned char *base;
- unsigned int filled_cells;
-};
-
-struct udsl_receiver {
- struct list_head list;
- struct udsl_receive_buffer *buffer;
- struct urb *urb;
- struct udsl_instance_data *instance;
-};
-
-struct udsl_vcc_data {
- /* vpi/vci lookup */
- struct list_head list;
- short vpi;
- int vci;
- struct atm_vcc *vcc;
-
- /* raw cell reassembly */
- struct sk_buff *sarb;
-};
-
-/* send */
-
-struct udsl_send_buffer {
- struct list_head list;
- unsigned char *base;
- unsigned char *free_start;
- unsigned int free_cells;
-};
-
-struct udsl_sender {
- struct list_head list;
- struct udsl_send_buffer *buffer;
- struct urb *urb;
- struct udsl_instance_data *instance;
-};
-
-struct udsl_control {
- struct atm_skb_data atm_data;
- unsigned int num_cells;
- unsigned int num_entire;
- unsigned int pdu_padding;
- unsigned char cell_header [ATM_CELL_HEADER];
- unsigned char aal5_trailer [ATM_AAL5_TRAILER];
-};
-
-#define UDSL_SKB(x) ((struct udsl_control *)(x)->cb)
-
-/* main driver data */
-
-struct udsl_instance_data {
- struct semaphore serialize;
-
- /* USB device part */
- struct usb_device *usb_dev;
- char description [64];
- int firmware_loaded;
-
- /* ATM device part */
- struct atm_dev *atm_dev;
- struct list_head vcc_list;
-
- /* receive */
- struct udsl_receiver receivers [UDSL_MAX_RCV_URBS];
- struct udsl_receive_buffer receive_buffers [UDSL_MAX_RCV_BUFS];
-
- spinlock_t receive_lock;
- struct list_head spare_receivers;
- struct list_head filled_receive_buffers;
-
- struct tasklet_struct receive_tasklet;
- struct list_head spare_receive_buffers;
-
- /* send */
- struct udsl_sender senders [UDSL_MAX_SND_URBS];
- struct udsl_send_buffer send_buffers [UDSL_MAX_SND_BUFS];
-
- struct sk_buff_head sndqueue;
-
- spinlock_t send_lock;
- struct list_head spare_senders;
- struct list_head spare_send_buffers;
-
- struct tasklet_struct send_tasklet;
- struct sk_buff *current_skb; /* being emptied */
- struct udsl_send_buffer *current_buffer; /* being filled */
- struct list_head filled_send_buffers;
-};
-
-/* ATM */
-
-static void udsl_atm_dev_close (struct atm_dev *dev);
-static int udsl_atm_open (struct atm_vcc *vcc);
-static void udsl_atm_close (struct atm_vcc *vcc);
-static int udsl_atm_ioctl (struct atm_dev *dev, unsigned int cmd, void __user *arg);
-static int udsl_atm_send (struct atm_vcc *vcc, struct sk_buff *skb);
-static int udsl_atm_proc_read (struct atm_dev *atm_dev, loff_t *pos, char *page);
-
-static struct atmdev_ops udsl_atm_devops = {
- .dev_close = udsl_atm_dev_close,
- .open = udsl_atm_open,
- .close = udsl_atm_close,
- .ioctl = udsl_atm_ioctl,
- .send = udsl_atm_send,
- .proc_read = udsl_atm_proc_read,
- .owner = THIS_MODULE,
-};
-
-/* USB */
-
-static int udsl_usb_probe (struct usb_interface *intf, const struct usb_device_id *id);
-static void udsl_usb_disconnect (struct usb_interface *intf);
-static int udsl_usb_ioctl (struct usb_interface *intf, unsigned int code, void *user_data);
-
-static struct usb_driver udsl_usb_driver = {
- .owner = THIS_MODULE,
- .name = udsl_driver_name,
- .probe = udsl_usb_probe,
- .disconnect = udsl_usb_disconnect,
- .ioctl = udsl_usb_ioctl,
- .id_table = udsl_usb_ids,
-};
-
-
-/***********
-** misc **
-***********/
-
-static inline void udsl_pop (struct atm_vcc *vcc, struct sk_buff *skb)
-{
- if (vcc->pop)
- vcc->pop (vcc, skb);
- else
- dev_kfree_skb (skb);
-}
-
-
-/*************
-** decode **
-*************/
-
-static inline struct udsl_vcc_data *udsl_find_vcc (struct udsl_instance_data *instance, short vpi, int vci)
-{
- struct udsl_vcc_data *vcc;
-
- list_for_each_entry (vcc, &instance->vcc_list, list)
- if ((vcc->vci == vci) && (vcc->vpi == vpi))
- return vcc;
- return NULL;
-}
-
-static void udsl_extract_cells (struct udsl_instance_data *instance, unsigned char *source, unsigned int howmany)
-{
- struct udsl_vcc_data *cached_vcc = NULL;
- struct atm_vcc *vcc;
- struct sk_buff *sarb;
- struct udsl_vcc_data *vcc_data;
- int cached_vci = 0;
- unsigned int i;
- int pti;
- int vci;
- short cached_vpi = 0;
- short vpi;
-
- for (i = 0; i < howmany; i++, source += ATM_CELL_SIZE) {
- vpi = ((source [0] & 0x0f) << 4) | (source [1] >> 4);
- vci = ((source [1] & 0x0f) << 12) | (source [2] << 4) | (source [3] >> 4);
- pti = (source [3] & 0x2) != 0;
-
- vdbg ("udsl_extract_cells: vpi %hd, vci %d, pti %d", vpi, vci, pti);
-
- if (cached_vcc && (vci == cached_vci) && (vpi == cached_vpi))
- vcc_data = cached_vcc;
- else if ((vcc_data = udsl_find_vcc (instance, vpi, vci))) {
- cached_vcc = vcc_data;
- cached_vpi = vpi;
- cached_vci = vci;
- } else {
- dbg ("udsl_extract_cells: unknown vpi/vci (%hd/%d)!", vpi, vci);
- continue;
- }
-
- vcc = vcc_data->vcc;
- sarb = vcc_data->sarb;
-
- if (sarb->tail + ATM_CELL_PAYLOAD > sarb->end) {
- dbg ("udsl_extract_cells: buffer overrun (sarb->len %u, vcc: 0x%p)!", sarb->len, vcc);
- /* discard cells already received */
- skb_trim (sarb, 0);
- }
-
- memcpy (sarb->tail, source + ATM_CELL_HEADER, ATM_CELL_PAYLOAD);
- __skb_put (sarb, ATM_CELL_PAYLOAD);
-
- if (pti) {
- struct sk_buff *skb;
- unsigned int length;
- unsigned int pdu_length;
-
- length = (source [ATM_CELL_SIZE - 6] << 8) + source [ATM_CELL_SIZE - 5];
-
- /* guard against overflow */
- if (length > ATM_MAX_AAL5_PDU) {
- dbg ("udsl_extract_cells: bogus length %u (vcc: 0x%p)!", length, vcc);
- atomic_inc (&vcc->stats->rx_err);
- goto out;
- }
-
- pdu_length = UDSL_NUM_CELLS (length) * ATM_CELL_PAYLOAD;
-
- if (sarb->len < pdu_length) {
- dbg ("udsl_extract_cells: bogus pdu_length %u (sarb->len: %u, vcc: 0x%p)!", pdu_length, sarb->len, vcc);
- atomic_inc (&vcc->stats->rx_err);
- goto out;
- }
-
- if (crc32_be (~0, sarb->tail - pdu_length, pdu_length) != 0xc704dd7b) {
- dbg ("udsl_extract_cells: packet failed crc check (vcc: 0x%p)!", vcc);
- atomic_inc (&vcc->stats->rx_err);
- goto out;
- }
-
- vdbg ("udsl_extract_cells: got packet (length: %u, pdu_length: %u, vcc: 0x%p)", length, pdu_length, vcc);
-
- if (!(skb = dev_alloc_skb (length))) {
- dbg ("udsl_extract_cells: no memory for skb (length: %u)!", length);
- atomic_inc (&vcc->stats->rx_drop);
- goto out;
- }
-
- vdbg ("udsl_extract_cells: allocated new sk_buff (skb: 0x%p, skb->truesize: %u)", skb, skb->truesize);
-
- if (!atm_charge (vcc, skb->truesize)) {
- dbg ("udsl_extract_cells: failed atm_charge (skb->truesize: %u)!", skb->truesize);
- dev_kfree_skb (skb);
- goto out; /* atm_charge increments rx_drop */
- }
-
- memcpy (skb->data, sarb->tail - pdu_length, length);
- __skb_put (skb, length);
-
- vdbg ("udsl_extract_cells: sending skb 0x%p, skb->len %u, skb->truesize %u", skb, skb->len, skb->truesize);
-
- PACKETDEBUG (skb->data, skb->len);
-
- vcc->push (vcc, skb);
-
- atomic_inc (&vcc->stats->rx);
-out:
- skb_trim (sarb, 0);
- }
- }
-}
-
-
-/*************
-** encode **
-*************/
-
-static const unsigned char zeros [ATM_CELL_PAYLOAD];
-
-static void udsl_groom_skb (struct atm_vcc *vcc, struct sk_buff *skb)
-{
- struct udsl_control *ctrl = UDSL_SKB (skb);
- unsigned int zero_padding;
- u32 crc;
-
- ctrl->atm_data.vcc = vcc;
- ctrl->cell_header [0] = vcc->vpi >> 4;
- ctrl->cell_header [1] = (vcc->vpi << 4) | (vcc->vci >> 12);
- ctrl->cell_header [2] = vcc->vci >> 4;
- ctrl->cell_header [3] = vcc->vci << 4;
- ctrl->cell_header [4] = 0xec;
-
- ctrl->num_cells = UDSL_NUM_CELLS (skb->len);
- ctrl->num_entire = skb->len / ATM_CELL_PAYLOAD;
-
- zero_padding = ctrl->num_cells * ATM_CELL_PAYLOAD - skb->len - ATM_AAL5_TRAILER;
-
- if (ctrl->num_entire + 1 < ctrl->num_cells)
- ctrl->pdu_padding = zero_padding - (ATM_CELL_PAYLOAD - ATM_AAL5_TRAILER);
- else
- ctrl->pdu_padding = zero_padding;
-
- ctrl->aal5_trailer [0] = 0; /* UU = 0 */
- ctrl->aal5_trailer [1] = 0; /* CPI = 0 */
- ctrl->aal5_trailer [2] = skb->len >> 8;
- ctrl->aal5_trailer [3] = skb->len;
-
- crc = crc32_be (~0, skb->data, skb->len);
- crc = crc32_be (crc, zeros, zero_padding);
- crc = crc32_be (crc, ctrl->aal5_trailer, 4);
- crc = ~crc;
-
- ctrl->aal5_trailer [4] = crc >> 24;
- ctrl->aal5_trailer [5] = crc >> 16;
- ctrl->aal5_trailer [6] = crc >> 8;
- ctrl->aal5_trailer [7] = crc;
-}
-
-static unsigned int udsl_write_cells (unsigned int howmany, struct sk_buff *skb, unsigned char **target_p)
-{
- struct udsl_control *ctrl = UDSL_SKB (skb);
- unsigned char *target = *target_p;
- unsigned int nc, ne, i;
-
- vdbg ("udsl_write_cells: howmany=%u, skb->len=%d, num_cells=%u, num_entire=%u, pdu_padding=%u", howmany, skb->len, ctrl->num_cells, ctrl->num_entire, ctrl->pdu_padding);
-
- nc = ctrl->num_cells;
- ne = min (howmany, ctrl->num_entire);
-
- for (i = 0; i < ne; i++) {
- memcpy (target, ctrl->cell_header, ATM_CELL_HEADER);
- target += ATM_CELL_HEADER;
- memcpy (target, skb->data, ATM_CELL_PAYLOAD);
- target += ATM_CELL_PAYLOAD;
- __skb_pull (skb, ATM_CELL_PAYLOAD);
- }
-
- ctrl->num_entire -= ne;
-
- if (!(ctrl->num_cells -= ne) || !(howmany -= ne))
- goto out;
-
- memcpy (target, ctrl->cell_header, ATM_CELL_HEADER);
- target += ATM_CELL_HEADER;
- memcpy (target, skb->data, skb->len);
- target += skb->len;
- __skb_pull (skb, skb->len);
- memset (target, 0, ctrl->pdu_padding);
- target += ctrl->pdu_padding;
-
- if (--ctrl->num_cells) {
- if (!--howmany) {
- ctrl->pdu_padding = ATM_CELL_PAYLOAD - ATM_AAL5_TRAILER;
- goto out;
- }
-
- memcpy (target, ctrl->cell_header, ATM_CELL_HEADER);
- target += ATM_CELL_HEADER;
- memset (target, 0, ATM_CELL_PAYLOAD - ATM_AAL5_TRAILER);
- target += ATM_CELL_PAYLOAD - ATM_AAL5_TRAILER;
-
- DEBUG_ON (--ctrl->num_cells);
- }
-
- memcpy (target, ctrl->aal5_trailer, ATM_AAL5_TRAILER);
- target += ATM_AAL5_TRAILER;
- /* set pti bit in last cell */
- *(target + 3 - ATM_CELL_SIZE) |= 0x2;
-
-out:
- *target_p = target;
- return nc - ctrl->num_cells;
-}
-
-
-/**************
-** receive **
-**************/
-
-static void udsl_complete_receive (struct urb *urb, struct pt_regs *regs)
-{
- struct udsl_receive_buffer *buf;
- struct udsl_instance_data *instance;
- struct udsl_receiver *rcv;
- unsigned long flags;
-
- if (!urb || !(rcv = urb->context)) {
- dbg ("udsl_complete_receive: bad urb!");
- return;
- }
-
- instance = rcv->instance;
- buf = rcv->buffer;
-
- buf->filled_cells = urb->actual_length / ATM_CELL_SIZE;
-
- vdbg ("udsl_complete_receive: urb 0x%p, status %d, actual_length %d, filled_cells %u, rcv 0x%p, buf 0x%p", urb, urb->status, urb->actual_length, buf->filled_cells, rcv, buf);
-
- DEBUG_ON (buf->filled_cells > rcv_buf_size);
-
- /* may not be in_interrupt() */
- spin_lock_irqsave (&instance->receive_lock, flags);
- list_add (&rcv->list, &instance->spare_receivers);
- list_add_tail (&buf->list, &instance->filled_receive_buffers);
- if (likely (!urb->status))
- tasklet_schedule (&instance->receive_tasklet);
- spin_unlock_irqrestore (&instance->receive_lock, flags);
-}
-
-static void udsl_process_receive (unsigned long data)
-{
- struct udsl_receive_buffer *buf;
- struct udsl_instance_data *instance = (struct udsl_instance_data *) data;
- struct udsl_receiver *rcv;
- int err;
-
-made_progress:
- while (!list_empty (&instance->spare_receive_buffers)) {
- spin_lock_irq (&instance->receive_lock);
- if (list_empty (&instance->spare_receivers)) {
- spin_unlock_irq (&instance->receive_lock);
- break;
- }
- rcv = list_entry (instance->spare_receivers.next, struct udsl_receiver, list);
- list_del (&rcv->list);
- spin_unlock_irq (&instance->receive_lock);
-
- buf = list_entry (instance->spare_receive_buffers.next, struct udsl_receive_buffer, list);
- list_del (&buf->list);
-
- rcv->buffer = buf;
-
- usb_fill_bulk_urb (rcv->urb,
- instance->usb_dev,
- usb_rcvbulkpipe (instance->usb_dev, UDSL_ENDPOINT_DATA_IN),
- buf->base,
- rcv_buf_size * ATM_CELL_SIZE,
- udsl_complete_receive,
- rcv);
-
- vdbg ("udsl_process_receive: sending urb 0x%p, rcv 0x%p, buf 0x%p", rcv->urb, rcv, buf);
-
- if ((err = usb_submit_urb(rcv->urb, GFP_ATOMIC)) < 0) {
- dbg ("udsl_process_receive: urb submission failed (%d)!", err);
- list_add (&buf->list, &instance->spare_receive_buffers);
- spin_lock_irq (&instance->receive_lock);
- list_add (&rcv->list, &instance->spare_receivers);
- spin_unlock_irq (&instance->receive_lock);
- break;
- }
- }
-
- spin_lock_irq (&instance->receive_lock);
- if (list_empty (&instance->filled_receive_buffers)) {
- spin_unlock_irq (&instance->receive_lock);
- return; /* done - no more buffers */
- }
- buf = list_entry (instance->filled_receive_buffers.next, struct udsl_receive_buffer, list);
- list_del (&buf->list);
- spin_unlock_irq (&instance->receive_lock);
- vdbg ("udsl_process_receive: processing buf 0x%p", buf);
- udsl_extract_cells (instance, buf->base, buf->filled_cells);
- list_add (&buf->list, &instance->spare_receive_buffers);
- goto made_progress;
-}
-
-
-/***********
-** send **
-***********/
-
-static void udsl_complete_send (struct urb *urb, struct pt_regs *regs)
-{
- struct udsl_instance_data *instance;
- struct udsl_sender *snd;
- unsigned long flags;
-
- if (!urb || !(snd = urb->context) || !(instance = snd->instance)) {
- dbg ("udsl_complete_send: bad urb!");
- return;
- }
-
- vdbg ("udsl_complete_send: urb 0x%p, status %d, snd 0x%p, buf 0x%p", urb, urb->status, snd, snd->buffer);
-
- /* may not be in_interrupt() */
- spin_lock_irqsave (&instance->send_lock, flags);
- list_add (&snd->list, &instance->spare_senders);
- list_add (&snd->buffer->list, &instance->spare_send_buffers);
- tasklet_schedule (&instance->send_tasklet);
- spin_unlock_irqrestore (&instance->send_lock, flags);
-}
-
-static void udsl_process_send (unsigned long data)
-{
- struct udsl_send_buffer *buf;
- struct udsl_instance_data *instance = (struct udsl_instance_data *) data;
- struct sk_buff *skb;
- struct udsl_sender *snd;
- int err;
- unsigned int num_written;
-
-made_progress:
- spin_lock_irq (&instance->send_lock);
- while (!list_empty (&instance->spare_senders)) {
- if (!list_empty (&instance->filled_send_buffers)) {
- buf = list_entry (instance->filled_send_buffers.next, struct udsl_send_buffer, list);
- list_del (&buf->list);
- } else if ((buf = instance->current_buffer)) {
- instance->current_buffer = NULL;
- } else /* all buffers empty */
- break;
-
- snd = list_entry (instance->spare_senders.next, struct udsl_sender, list);
- list_del (&snd->list);
- spin_unlock_irq (&instance->send_lock);
-
- snd->buffer = buf;
- usb_fill_bulk_urb (snd->urb,
- instance->usb_dev,
- usb_sndbulkpipe (instance->usb_dev, UDSL_ENDPOINT_DATA_OUT),
- buf->base,
- (snd_buf_size - buf->free_cells) * ATM_CELL_SIZE,
- udsl_complete_send,
- snd);
-
- vdbg ("udsl_process_send: submitting urb 0x%p (%d cells), snd 0x%p, buf 0x%p", snd->urb, snd_buf_size - buf->free_cells, snd, buf);
-
- if ((err = usb_submit_urb(snd->urb, GFP_ATOMIC)) < 0) {
- dbg ("udsl_process_send: urb submission failed (%d)!", err);
- spin_lock_irq (&instance->send_lock);
- list_add (&snd->list, &instance->spare_senders);
- spin_unlock_irq (&instance->send_lock);
- list_add (&buf->list, &instance->filled_send_buffers);
- return; /* bail out */
- }
-
- spin_lock_irq (&instance->send_lock);
- } /* while */
- spin_unlock_irq (&instance->send_lock);
-
- if (!instance->current_skb && !(instance->current_skb = skb_dequeue (&instance->sndqueue)))
- return; /* done - no more skbs */
-
- skb = instance->current_skb;
-
- if (!(buf = instance->current_buffer)) {
- spin_lock_irq (&instance->send_lock);
- if (list_empty (&instance->spare_send_buffers)) {
- instance->current_buffer = NULL;
- spin_unlock_irq (&instance->send_lock);
- return; /* done - no more buffers */
- }
- buf = list_entry (instance->spare_send_buffers.next, struct udsl_send_buffer, list);
- list_del (&buf->list);
- spin_unlock_irq (&instance->send_lock);
-
- buf->free_start = buf->base;
- buf->free_cells = snd_buf_size;
-
- instance->current_buffer = buf;
- }
-
- num_written = udsl_write_cells (buf->free_cells, skb, &buf->free_start);
-
- vdbg ("udsl_process_send: wrote %u cells from skb 0x%p to buffer 0x%p", num_written, skb, buf);
-
- if (!(buf->free_cells -= num_written)) {
- list_add_tail (&buf->list, &instance->filled_send_buffers);
- instance->current_buffer = NULL;
- }
-
- vdbg ("udsl_process_send: buffer contains %d cells, %d left", snd_buf_size - buf->free_cells, buf->free_cells);
-
- if (!UDSL_SKB (skb)->num_cells) {
- struct atm_vcc *vcc = UDSL_SKB (skb)->atm_data.vcc;
-
- udsl_pop (vcc, skb);
- instance->current_skb = NULL;
-
- atomic_inc (&vcc->stats->tx);
- }
-
- goto made_progress;
-}
-
-static void udsl_cancel_send (struct udsl_instance_data *instance, struct atm_vcc *vcc)
-{
- struct sk_buff *skb, *n;
-
- dbg ("udsl_cancel_send entered");
- spin_lock_irq (&instance->sndqueue.lock);
- for (skb = instance->sndqueue.next, n = skb->next; skb != (struct sk_buff *)&instance->sndqueue; skb = n, n = skb->next)
- if (UDSL_SKB (skb)->atm_data.vcc == vcc) {
- dbg ("udsl_cancel_send: popping skb 0x%p", skb);
- __skb_unlink (skb, &instance->sndqueue);
- udsl_pop (vcc, skb);
- }
- spin_unlock_irq (&instance->sndqueue.lock);
-
- tasklet_disable (&instance->send_tasklet);
- if ((skb = instance->current_skb) && (UDSL_SKB (skb)->atm_data.vcc == vcc)) {
- dbg ("udsl_cancel_send: popping current skb (0x%p)", skb);
- instance->current_skb = NULL;
- udsl_pop (vcc, skb);
- }
- tasklet_enable (&instance->send_tasklet);
- dbg ("udsl_cancel_send done");
-}
-
-static int udsl_atm_send (struct atm_vcc *vcc, struct sk_buff *skb)
-{
- struct udsl_instance_data *instance = vcc->dev->dev_data;
- int err;
-
- vdbg ("udsl_atm_send called (skb 0x%p, len %u)", skb, skb->len);
-
- if (!instance || !instance->usb_dev) {
- dbg ("udsl_atm_send: NULL data!");
- err = -ENODEV;
- goto fail;
- }
-
- if (vcc->qos.aal != ATM_AAL5) {
- dbg ("udsl_atm_send: unsupported ATM type %d!", vcc->qos.aal);
- err = -EINVAL;
- goto fail;
- }
-
- if (skb->len > ATM_MAX_AAL5_PDU) {
- dbg ("udsl_atm_send: packet too long (%d vs %d)!", skb->len, ATM_MAX_AAL5_PDU);
- err = -EINVAL;
- goto fail;
- }
-
- PACKETDEBUG (skb->data, skb->len);
-
- udsl_groom_skb (vcc, skb);
- skb_queue_tail (&instance->sndqueue, skb);
- tasklet_schedule (&instance->send_tasklet);
-
- return 0;
-
-fail:
- udsl_pop (vcc, skb);
- return err;
-}
-
-
-/**********
-** ATM **
-**********/
-
-static void udsl_atm_dev_close (struct atm_dev *dev)
-{
- struct udsl_instance_data *instance = dev->dev_data;
-
- if (!instance) {
- dbg ("udsl_atm_dev_close: NULL instance!");
- return;
- }
-
- dbg ("udsl_atm_dev_close: queue has %u elements", instance->sndqueue.qlen);
-
- tasklet_kill (&instance->receive_tasklet);
- tasklet_kill (&instance->send_tasklet);
- kfree (instance);
- dev->dev_data = NULL;
-}
-
-static int udsl_atm_proc_read (struct atm_dev *atm_dev, loff_t *pos, char *page)
-{
- struct udsl_instance_data *instance = atm_dev->dev_data;
- int left = *pos;
-
- if (!instance) {
- dbg ("udsl_atm_proc_read: NULL instance!");
- return -ENODEV;
- }
-
- if (!left--)
- return sprintf (page, "%s\n", instance->description);
-
- if (!left--)
- return sprintf (page, "MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
- atm_dev->esi [0], atm_dev->esi [1], atm_dev->esi [2],
- atm_dev->esi [3], atm_dev->esi [4], atm_dev->esi [5]);
-
- if (!left--)
- return sprintf (page, "AAL5: tx %d ( %d err ), rx %d ( %d err, %d drop )\n",
- atomic_read (&atm_dev->stats.aal5.tx),
- atomic_read (&atm_dev->stats.aal5.tx_err),
- atomic_read (&atm_dev->stats.aal5.rx),
- atomic_read (&atm_dev->stats.aal5.rx_err),
- atomic_read (&atm_dev->stats.aal5.rx_drop));
-
- if (!left--) {
- switch (atm_dev->signal) {
- case ATM_PHY_SIG_FOUND:
- sprintf (page, "Line up");
- break;
- case ATM_PHY_SIG_LOST:
- sprintf (page, "Line down");
- break;
- default:
- sprintf (page, "Line state unknown");
- break;
- }
-
- if (instance->usb_dev) {
- if (!instance->firmware_loaded)
- strcat (page, ", no firmware\n");
- else
- strcat (page, ", firmware loaded\n");
- } else
- strcat (page, ", disconnected\n");
-
- return strlen (page);
- }
-
- return 0;
-}
-
-static int udsl_atm_open (struct atm_vcc *vcc)
-{
- struct udsl_instance_data *instance = vcc->dev->dev_data;
- struct udsl_vcc_data *new;
- unsigned int max_pdu;
- int vci = vcc->vci;
- short vpi = vcc->vpi;
-
- dbg ("udsl_atm_open: vpi %hd, vci %d", vpi, vci);
-
- if (!instance || !instance->usb_dev) {
- dbg ("udsl_atm_open: NULL data!");
- return -ENODEV;
- }
-
- /* only support AAL5 */
- if ((vcc->qos.aal != ATM_AAL5) || (vcc->qos.rxtp.max_sdu < 0) || (vcc->qos.rxtp.max_sdu > ATM_MAX_AAL5_PDU)) {
- dbg ("udsl_atm_open: unsupported ATM type %d!", vcc->qos.aal);
- return -EINVAL;
- }
-
- if (!instance->firmware_loaded) {
- dbg ("udsl_atm_open: firmware not loaded!");
- return -EAGAIN;
- }
-
- down (&instance->serialize); /* vs self, udsl_atm_close */
-
- if (udsl_find_vcc (instance, vpi, vci)) {
- dbg ("udsl_atm_open: %hd/%d already in use!", vpi, vci);
- up (&instance->serialize);
- return -EADDRINUSE;
- }
-
- if (!(new = kmalloc (sizeof (struct udsl_vcc_data), GFP_KERNEL))) {
- dbg ("udsl_atm_open: no memory for vcc_data!");
- up (&instance->serialize);
- return -ENOMEM;
- }
-
- memset (new, 0, sizeof (struct udsl_vcc_data));
- new->vcc = vcc;
- new->vpi = vpi;
- new->vci = vci;
-
- /* udsl_extract_cells requires at least one cell */
- max_pdu = max (1, UDSL_NUM_CELLS (vcc->qos.rxtp.max_sdu)) * ATM_CELL_PAYLOAD;
- if (!(new->sarb = alloc_skb (max_pdu, GFP_KERNEL))) {
- dbg ("udsl_atm_open: no memory for SAR buffer!");
- kfree (new);
- up (&instance->serialize);
- return -ENOMEM;
- }
-
- vcc->dev_data = new;
-
- tasklet_disable (&instance->receive_tasklet);
- list_add (&new->list, &instance->vcc_list);
- tasklet_enable (&instance->receive_tasklet);
-
- set_bit (ATM_VF_ADDR, &vcc->flags);
- set_bit (ATM_VF_PARTIAL, &vcc->flags);
- set_bit (ATM_VF_READY, &vcc->flags);
-
- up (&instance->serialize);
-
- tasklet_schedule (&instance->receive_tasklet);
-
- dbg ("udsl_atm_open: allocated vcc data 0x%p (max_pdu: %u)", new, max_pdu);
-
- return 0;
-}
-
-static void udsl_atm_close (struct atm_vcc *vcc)
-{
- struct udsl_instance_data *instance = vcc->dev->dev_data;
- struct udsl_vcc_data *vcc_data = vcc->dev_data;
-
- dbg ("udsl_atm_close called");
-
- if (!instance || !vcc_data) {
- dbg ("udsl_atm_close: NULL data!");
- return;
- }
-
- dbg ("udsl_atm_close: deallocating vcc 0x%p with vpi %d vci %d", vcc_data, vcc_data->vpi, vcc_data->vci);
-
- udsl_cancel_send (instance, vcc);
-
- down (&instance->serialize); /* vs self, udsl_atm_open */
-
- tasklet_disable (&instance->receive_tasklet);
- list_del (&vcc_data->list);
- tasklet_enable (&instance->receive_tasklet);
-
- kfree_skb (vcc_data->sarb);
- vcc_data->sarb = NULL;
-
- kfree (vcc_data);
- vcc->dev_data = NULL;
-
- vcc->vpi = ATM_VPI_UNSPEC;
- vcc->vci = ATM_VCI_UNSPEC;
- clear_bit (ATM_VF_READY, &vcc->flags);
- clear_bit (ATM_VF_PARTIAL, &vcc->flags);
- clear_bit (ATM_VF_ADDR, &vcc->flags);
-
- up (&instance->serialize);
-
- dbg ("udsl_atm_close successful");
-}
-
-static int udsl_atm_ioctl (struct atm_dev *dev, unsigned int cmd, void __user *arg)
-{
- switch (cmd) {
- case ATM_QUERYLOOP:
- return put_user (ATM_LM_NONE, (int __user *)arg) ? -EFAULT : 0;
- default:
- return -ENOIOCTLCMD;
- }
-}
-
-
-/**********
-** USB **
-**********/
-
-static int udsl_set_alternate (struct udsl_instance_data *instance)
-{
- down (&instance->serialize); /* vs self */
- if (!instance->firmware_loaded) {
- int ret;
-
- if ((ret = usb_set_interface (instance->usb_dev, 1, 1)) < 0) {
- dbg ("udsl_set_alternate: usb_set_interface returned %d!", ret);
- up (&instance->serialize);
- return ret;
- }
- instance->firmware_loaded = 1;
- }
- up (&instance->serialize);
-
- tasklet_schedule (&instance->receive_tasklet);
-
- return 0;
-}
-
-static int udsl_usb_ioctl (struct usb_interface *intf, unsigned int code, void *user_data)
-{
- struct udsl_instance_data *instance = usb_get_intfdata (intf);
-
- dbg ("udsl_usb_ioctl entered");
-
- if (!instance) {
- dbg ("udsl_usb_ioctl: NULL instance!");
- return -ENODEV;
- }
-
- switch (code) {
- case UDSL_IOCTL_LINE_UP:
- instance->atm_dev->signal = ATM_PHY_SIG_FOUND;
- return udsl_set_alternate (instance);
- case UDSL_IOCTL_LINE_DOWN:
- instance->atm_dev->signal = ATM_PHY_SIG_LOST;
- return 0;
- default:
- return -ENOTTY;
- }
-}
-
-static int udsl_usb_probe (struct usb_interface *intf, const struct usb_device_id *id)
-{
- struct usb_device *dev = interface_to_usbdev(intf);
- int ifnum = intf->altsetting->desc.bInterfaceNumber;
- struct udsl_instance_data *instance;
- unsigned char mac_str [13];
- int i, length;
- char *buf;
-
- dbg ("udsl_usb_probe: trying device with vendor=0x%x, product=0x%x, ifnum %d",
- dev->descriptor.idVendor, dev->descriptor.idProduct, ifnum);
-
- if ((dev->descriptor.bDeviceClass != USB_CLASS_VENDOR_SPEC) ||
- (dev->descriptor.idVendor != SPEEDTOUCH_VENDORID) ||
- (dev->descriptor.idProduct != SPEEDTOUCH_PRODUCTID) || (ifnum != 1))
- return -ENODEV;
-
- dbg ("udsl_usb_probe: device accepted");
-
- /* instance init */
- if (!(instance = kmalloc (sizeof (struct udsl_instance_data), GFP_KERNEL))) {
- dbg ("udsl_usb_probe: no memory for instance data!");
- return -ENOMEM;
- }
-
- memset (instance, 0, sizeof (struct udsl_instance_data));
-
- init_MUTEX (&instance->serialize);
-
- instance->usb_dev = dev;
-
- INIT_LIST_HEAD (&instance->vcc_list);
-
- spin_lock_init (&instance->receive_lock);
- INIT_LIST_HEAD (&instance->spare_receivers);
- INIT_LIST_HEAD (&instance->filled_receive_buffers);
-
- tasklet_init (&instance->receive_tasklet, udsl_process_receive, (unsigned long) instance);
- INIT_LIST_HEAD (&instance->spare_receive_buffers);
-
- skb_queue_head_init (&instance->sndqueue);
-
- spin_lock_init (&instance->send_lock);
- INIT_LIST_HEAD (&instance->spare_senders);
- INIT_LIST_HEAD (&instance->spare_send_buffers);
-
- tasklet_init (&instance->send_tasklet, udsl_process_send, (unsigned long) instance);
- INIT_LIST_HEAD (&instance->filled_send_buffers);
-
- /* receive init */
- for (i = 0; i < num_rcv_urbs; i++) {
- struct udsl_receiver *rcv = &(instance->receivers [i]);
-
- if (!(rcv->urb = usb_alloc_urb (0, GFP_KERNEL))) {
- dbg ("udsl_usb_probe: no memory for receive urb %d!", i);
- goto fail;
- }
-
- rcv->instance = instance;
-
- list_add (&rcv->list, &instance->spare_receivers);
- }
-
- for (i = 0; i < num_rcv_bufs; i++) {
- struct udsl_receive_buffer *buf = &(instance->receive_buffers [i]);
-
- if (!(buf->base = kmalloc (rcv_buf_size * ATM_CELL_SIZE, GFP_KERNEL))) {
- dbg ("udsl_usb_probe: no memory for receive buffer %d!", i);
- goto fail;
- }
-
- list_add (&buf->list, &instance->spare_receive_buffers);
- }
-
- /* send init */
- for (i = 0; i < num_snd_urbs; i++) {
- struct udsl_sender *snd = &(instance->senders [i]);
-
- if (!(snd->urb = usb_alloc_urb (0, GFP_KERNEL))) {
- dbg ("udsl_usb_probe: no memory for send urb %d!", i);
- goto fail;
- }
-
- snd->instance = instance;
-
- list_add (&snd->list, &instance->spare_senders);
- }
-
- for (i = 0; i < num_snd_bufs; i++) {
- struct udsl_send_buffer *buf = &(instance->send_buffers [i]);
-
- if (!(buf->base = kmalloc (snd_buf_size * ATM_CELL_SIZE, GFP_KERNEL))) {
- dbg ("udsl_usb_probe: no memory for send buffer %d!", i);
- goto fail;
- }
-
- list_add (&buf->list, &instance->spare_send_buffers);
- }
-
- /* ATM init */
- if (!(instance->atm_dev = atm_dev_register (udsl_driver_name, &udsl_atm_devops, -1, NULL))) {
- dbg ("udsl_usb_probe: failed to register ATM device!");
- goto fail;
- }
-
- instance->atm_dev->ci_range.vpi_bits = ATM_CI_MAX;
- instance->atm_dev->ci_range.vci_bits = ATM_CI_MAX;
- instance->atm_dev->signal = ATM_PHY_SIG_UNKNOWN;
-
- /* temp init ATM device, set to 128kbit */
- instance->atm_dev->link_rate = 128 * 1000 / 424;
-
- /* set MAC address, it is stored in the serial number */
- memset (instance->atm_dev->esi, 0, sizeof (instance->atm_dev->esi));
- if (usb_string (dev, dev->descriptor.iSerialNumber, mac_str, sizeof (mac_str)) == 12)
- for (i = 0; i < 6; i++)
- instance->atm_dev->esi [i] = (hex2int (mac_str [i * 2]) * 16) + (hex2int (mac_str [i * 2 + 1]));
-
- /* device description */
- buf = instance->description;
- length = sizeof (instance->description);
-
- if ((i = usb_string (dev, dev->descriptor.iProduct, buf, length)) < 0)
- goto finish;
-
- buf += i;
- length -= i;
-
- i = scnprintf (buf, length, " (");
- buf += i;
- length -= i;
-
- if (length <= 0 || (i = usb_make_path (dev, buf, length)) < 0)
- goto finish;
-
- buf += i;
- length -= i;
-
- snprintf (buf, length, ")");
-
-finish:
- /* ready for ATM callbacks */
- wmb ();
- instance->atm_dev->dev_data = instance;
-
- usb_set_intfdata (intf, instance);
-
- return 0;
-
-fail:
- for (i = 0; i < num_snd_bufs; i++)
- kfree (instance->send_buffers [i].base);
-
- for (i = 0; i < num_snd_urbs; i++)
- usb_free_urb (instance->senders [i].urb);
-
- for (i = 0; i < num_rcv_bufs; i++)
- kfree (instance->receive_buffers [i].base);
-
- for (i = 0; i < num_rcv_urbs; i++)
- usb_free_urb (instance->receivers [i].urb);
-
- kfree (instance);
-
- return -ENOMEM;
-}
-
-static void udsl_usb_disconnect (struct usb_interface *intf)
-{
- struct udsl_instance_data *instance = usb_get_intfdata (intf);
- struct list_head *pos;
- unsigned int count;
- int result, i;
-
- dbg ("udsl_usb_disconnect entered");
-
- usb_set_intfdata (intf, NULL);
-
- if (!instance) {
- dbg ("udsl_usb_disconnect: NULL instance!");
- return;
- }
-
- /* receive finalize */
- tasklet_disable (&instance->receive_tasklet);
-
- for (i = 0; i < num_rcv_urbs; i++)
- if ((result = usb_unlink_urb (instance->receivers [i].urb)) < 0)
- dbg ("udsl_usb_disconnect: usb_unlink_urb on receive urb %d returned %d!", i, result);
-
- /* wait for completion handlers to finish */
- do {
- count = 0;
- spin_lock_irq (&instance->receive_lock);
- list_for_each (pos, &instance->spare_receivers)
- DEBUG_ON (++count > num_rcv_urbs);
- spin_unlock_irq (&instance->receive_lock);
-
- dbg ("udsl_usb_disconnect: found %u spare receivers", count);
-
- if (count == num_rcv_urbs)
- break;
-
- set_current_state (TASK_RUNNING);
- schedule ();
- } while (1);
-
- /* no need to take the spinlock */
- INIT_LIST_HEAD (&instance->filled_receive_buffers);
- INIT_LIST_HEAD (&instance->spare_receive_buffers);
-
- tasklet_enable (&instance->receive_tasklet);
-
- for (i = 0; i < num_rcv_urbs; i++)
- usb_free_urb (instance->receivers [i].urb);
-
- for (i = 0; i < num_rcv_bufs; i++)
- kfree (instance->receive_buffers [i].base);
-
- /* send finalize */
- tasklet_disable (&instance->send_tasklet);
-
- for (i = 0; i < num_snd_urbs; i++)
- if ((result = usb_unlink_urb (instance->senders [i].urb)) < 0)
- dbg ("udsl_usb_disconnect: usb_unlink_urb on send urb %d returned %d!", i, result);
-
- /* wait for completion handlers to finish */
- do {
- count = 0;
- spin_lock_irq (&instance->send_lock);
- list_for_each (pos, &instance->spare_senders)
- DEBUG_ON (++count > num_snd_urbs);
- spin_unlock_irq (&instance->send_lock);
-
- dbg ("udsl_usb_disconnect: found %u spare senders", count);
-
- if (count == num_snd_urbs)
- break;
-
- set_current_state (TASK_RUNNING);
- schedule ();
- } while (1);
-
- /* no need to take the spinlock */
- INIT_LIST_HEAD (&instance->spare_senders);
- INIT_LIST_HEAD (&instance->spare_send_buffers);
- instance->current_buffer = NULL;
-
- tasklet_enable (&instance->send_tasklet);
-
- for (i = 0; i < num_snd_urbs; i++)
- usb_free_urb (instance->senders [i].urb);
-
- for (i = 0; i < num_snd_bufs; i++)
- kfree (instance->send_buffers [i].base);
-
- wmb ();
- instance->usb_dev = NULL;
-
- /* ATM finalize */
- shutdown_atm_dev (instance->atm_dev); /* frees instance, kills tasklets */
-}
-
-
-/***********
-** init **
-***********/
-
-static int __init udsl_usb_init (void)
-{
- dbg ("udsl_usb_init: driver version " DRIVER_VERSION);
-
- if (sizeof (struct udsl_control) > sizeof (((struct sk_buff *)0)->cb)) {
- printk (KERN_ERR __FILE__ ": unusable with this kernel!\n");
- return -EIO;
- }
-
- if ((num_rcv_urbs > UDSL_MAX_RCV_URBS) || (num_snd_urbs > UDSL_MAX_SND_URBS) ||
- (num_rcv_bufs > UDSL_MAX_RCV_BUFS) || (num_snd_bufs > UDSL_MAX_SND_BUFS) ||
- (rcv_buf_size > UDSL_MAX_RCV_BUF_SIZE) || (snd_buf_size > UDSL_MAX_SND_BUF_SIZE))
- return -EINVAL;
-
- return usb_register (&udsl_usb_driver);
-}
-
-static void __exit udsl_usb_cleanup (void)
-{
- dbg ("udsl_usb_cleanup entered");
-
- usb_deregister (&udsl_usb_driver);
-}
-
-module_init (udsl_usb_init);
-module_exit (udsl_usb_cleanup);
-
-MODULE_AUTHOR (DRIVER_AUTHOR);
-MODULE_DESCRIPTION (DRIVER_DESC);
-MODULE_LICENSE ("GPL");
-MODULE_VERSION (DRIVER_VERSION);
-
-
-/************
-** debug **
-************/
-
-#ifdef VERBOSE_DEBUG
-static int udsl_print_packet (const unsigned char *data, int len)
-{
- unsigned char buffer [256];
- int i = 0, j = 0;
-
- for (i = 0; i < len;) {
- buffer [0] = '\0';
- sprintf (buffer, "%.3d :", i);
- for (j = 0; (j < 16) && (i < len); j++, i++) {
- sprintf (buffer, "%s %2.2x", buffer, data [i]);
- }
- dbg ("%s", buffer);
- }
- return i;
-}
-#endif
+++ /dev/null
-/* Hey EMACS -*- linux-c -*-
- *
- * tiglusb -- Texas Instruments' USB GraphLink (aka SilverLink) driver.
- * Target: Texas Instruments graphing calculators (http://lpg.ticalc.org).
- *
- * Copyright (C) 2001-2004:
- * Romain Lievin <roms@tilp.info>
- * Julien BLACHE <jb@technologeek.org>
- * under the terms of the GNU General Public License.
- *
- * Based on dabusb.c, printer.c & scanner.c
- *
- * Please see the file: Documentation/usb/silverlink.txt
- * and the website at: http://lpg.ticalc.org/prj_usb/
- * for more info.
- *
- * History:
- * 1.0x, Romain & Julien: initial submit.
- * 1.03, Greg Kroah: modifications.
- * 1.04, Julien: clean-up & fixes; Romain: 2.4 backport.
- * 1.05, Randy Dunlap: bug fix with the timeout parameter (divide-by-zero).
- * 1.06, Romain: synched with 2.5, version/firmware changed (confusing).
- * 1.07, Romain: fixed bad use of usb_clear_halt (invalid argument);
- * timeout argument checked in ioctl + clean-up.
- * 1.08, Romain: added support of USB port embedded on some TI's handhelds.
- */
-
-#include <linux/module.h>
-#include <linux/socket.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <asm/uaccess.h>
-#include <linux/delay.h>
-#include <linux/usb.h>
-#include <linux/smp_lock.h>
-#include <linux/devfs_fs_kernel.h>
-#include <linux/device.h>
-
-#include <linux/ticable.h>
-#include "tiglusb.h"
-
-/*
- * Version Information
- */
-#define DRIVER_VERSION "1.08"
-#define DRIVER_AUTHOR "Romain Lievin <roms@tilp.info> & Julien Blache <jb@jblache.org>"
-#define DRIVER_DESC "TI-GRAPH LINK USB (aka SilverLink) driver"
-#define DRIVER_LICENSE "GPL"
-
-/* ----- global variables --------------------------------------------- */
-
-static tiglusb_t tiglusb[MAXTIGL];
-static int timeout = TIMAXTIME; /* timeout in tenth of seconds */
-static struct class_simple *tiglusb_class;
-
-/*---------- misc functions ------------------------------------------- */
-
-/*
- * Re-initialize device
- */
-static inline int
-clear_device (struct usb_device *dev)
-{
- if (usb_reset_configuration (dev) < 0) {
- err ("clear_device failed");
- return -1;
- }
-
- return 0;
-}
-
-/*
- * Clear input & output pipes (endpoints)
- */
-static inline int
-clear_pipes (struct usb_device *dev)
-{
- unsigned int pipe;
-
- pipe = usb_sndbulkpipe (dev, 2);
- if (usb_clear_halt (dev, pipe)) {
- err ("clear_pipe (w), request failed");
- return -1;
- }
-
- pipe = usb_rcvbulkpipe (dev, 1);
- if (usb_clear_halt (dev, pipe)) {
- err ("clear_pipe (r), request failed");
- return -1;
- }
-
- return 0;
-}
-
-/* ----- file operations functions--------------------------------------- */
-
-static int
-tiglusb_open (struct inode *inode, struct file *filp)
-{
- int devnum = iminor(inode);
- ptiglusb_t s;
-
- if (devnum < TIUSB_MINOR || devnum >= (TIUSB_MINOR + MAXTIGL))
- return -EIO;
-
- s = &tiglusb[devnum - TIUSB_MINOR];
-
- if (down_interruptible (&s->mutex)) {
- return -ERESTARTSYS;
- }
-
- while (!s->dev || s->opened) {
- up (&s->mutex);
-
- if (filp->f_flags & O_NONBLOCK) {
- return -EBUSY;
- }
-
- msleep_interruptible(500);
-
- if (signal_pending (current)) {
- return -EAGAIN;
- }
-
- if (down_interruptible (&s->mutex)) {
- return -ERESTARTSYS;
- }
- }
-
- s->opened = 1;
- up (&s->mutex);
-
- filp->f_pos = 0;
- filp->private_data = s;
-
- return nonseekable_open(inode, filp);
-}
-
-static int
-tiglusb_release (struct inode *inode, struct file *filp)
-{
- ptiglusb_t s = (ptiglusb_t) filp->private_data;
-
- if (down_interruptible (&s->mutex)) {
- return -ERESTARTSYS;
- }
-
- s->state = _stopped;
- up (&s->mutex);
-
- if (!s->remove_pending)
- clear_device (s->dev);
- else
- wake_up (&s->remove_ok);
-
- s->opened = 0;
-
- return 0;
-}
-
-static ssize_t
-tiglusb_read (struct file *filp, char __user *buf, size_t count, loff_t * f_pos)
-{
- ptiglusb_t s = (ptiglusb_t) filp->private_data;
- ssize_t ret = 0;
- int bytes_to_read = 0;
- int bytes_read = 0;
- int result = 0;
- char *buffer;
- unsigned int pipe;
-
- if (*f_pos)
- return -ESPIPE;
-
- if (s->remove_pending)
- return -EIO;
-
- if (!s->dev)
- return -EIO;
-
- buffer = kmalloc (s->max_ps, GFP_KERNEL);
- if (!buffer)
- return -ENOMEM;
-
- bytes_to_read = (count >= s->max_ps) ? s->max_ps : count;
-
- pipe = usb_rcvbulkpipe (s->dev, 1);
- result = usb_bulk_msg (s->dev, pipe, buffer, bytes_to_read,
- &bytes_read, (HZ * timeout) / 10);
- if (result == -ETIMEDOUT) { /* NAK */
- if (!bytes_read)
- dbg ("quirk !");
- warn ("tiglusb_read, NAK received.");
- ret = result;
- goto out;
- } else if (result == -EPIPE) { /* STALL -- shouldn't happen */
- warn ("clear_halt request to remove STALL condition.");
- if (usb_clear_halt (s->dev, pipe))
- err ("clear_halt, request failed");
- clear_device (s->dev);
- ret = result;
- goto out;
- } else if (result < 0) { /* We should not get any I/O errors */
- err ("funky result: %d. Please notify maintainer.", result);
- ret = -EIO;
- goto out;
- }
-
- if (copy_to_user (buf, buffer, bytes_read)) {
- ret = -EFAULT;
- }
-
- out:
- kfree(buffer);
- return ret ? ret : bytes_read;
-}
-
-static ssize_t
-tiglusb_write (struct file *filp, const char __user *buf, size_t count, loff_t * f_pos)
-{
- ptiglusb_t s = (ptiglusb_t) filp->private_data;
- ssize_t ret = 0;
- int bytes_to_write = 0;
- int bytes_written = 0;
- int result = 0;
- char *buffer;
- unsigned int pipe;
-
- if (*f_pos)
- return -ESPIPE;
-
- if (s->remove_pending)
- return -EIO;
-
- if (!s->dev)
- return -EIO;
-
- buffer = kmalloc (s->max_ps, GFP_KERNEL);
- if (!buffer)
- return -ENOMEM;
-
- bytes_to_write = (count >= s->max_ps) ? s->max_ps : count;
- if (copy_from_user (buffer, buf, bytes_to_write)) {
- ret = -EFAULT;
- goto out;
- }
-
- pipe = usb_sndbulkpipe (s->dev, 2);
- result = usb_bulk_msg (s->dev, pipe, buffer, bytes_to_write,
- &bytes_written, (HZ * timeout) / 10);
-
- if (result == -ETIMEDOUT) { /* NAK */
- warn ("tiglusb_write, NAK received.");
- ret = result;
- goto out;
- } else if (result == -EPIPE) { /* STALL -- shouldn't happen */
- warn ("clear_halt request to remove STALL condition.");
- if (usb_clear_halt (s->dev, pipe))
- err ("clear_halt, request failed");
- clear_device (s->dev);
- ret = result;
- goto out;
- } else if (result < 0) { /* We should not get any I/O errors */
- warn ("funky result: %d. Please notify maintainer.", result);
- ret = -EIO;
- goto out;
- }
-
- if (bytes_written != bytes_to_write) {
- ret = -EIO;
- }
-
- out:
- kfree(buffer);
- return ret ? ret : bytes_written;
-}
-
-static int
-tiglusb_ioctl (struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- ptiglusb_t s = (ptiglusb_t) filp->private_data;
- int ret = 0;
-
- if (s->remove_pending)
- return -EIO;
-
- if (down_interruptible (&s->mutex)) {
- return -ERESTARTSYS;
- }
-
- if (!s->dev) {
- up (&s->mutex);
- return -EIO;
- }
-
- switch (cmd) {
- case IOCTL_TIUSB_TIMEOUT:
- if (arg > 0)
- timeout = arg;
- else
- ret = -EINVAL;
- break;
- case IOCTL_TIUSB_RESET_DEVICE:
- if (clear_device (s->dev))
- ret = -EIO;
- break;
- case IOCTL_TIUSB_RESET_PIPES:
- if (clear_pipes (s->dev))
- ret = -EIO;
- break;
- case IOCTL_TIUSB_GET_MAXPS:
- if (copy_to_user((int __user *) arg, &s->max_ps, sizeof(int)))
- return -EFAULT;
- break;
- case IOCTL_TIUSB_GET_DEVID:
- if (copy_to_user((int __user *) arg, &s->dev->descriptor.idProduct,
- sizeof(int)))
- return -EFAULT;
- break;
- default:
- ret = -ENOTTY;
- break;
- }
-
- up (&s->mutex);
-
- return ret;
-}
-
-/* ----- kernel module registering ------------------------------------ */
-
-static struct file_operations tiglusb_fops = {
- .owner = THIS_MODULE,
- .llseek = no_llseek,
- .read = tiglusb_read,
- .write = tiglusb_write,
- .ioctl = tiglusb_ioctl,
- .open = tiglusb_open,
- .release = tiglusb_release,
-};
-
-/* --- initialisation code ------------------------------------- */
-
-static int
-tiglusb_probe (struct usb_interface *intf,
- const struct usb_device_id *id)
-{
- struct usb_device *dev = interface_to_usbdev(intf);
- int minor = -1;
- int i, err = 0;
- ptiglusb_t s;
- struct usb_host_config *conf;
- struct usb_host_interface *ifdata = NULL;
- int max_ps;
-
- dbg ("probing vendor id 0x%x, device id 0x%x",
- dev->descriptor.idVendor, dev->descriptor.idProduct);
-
- /*
- * We don't handle multiple configurations. As of version 0x0103 of
- * the TIGL hardware, there's only 1 configuration.
- */
-
- if (dev->descriptor.bNumConfigurations != 1) {
- err = -ENODEV;
- goto out;
- }
-
- if (dev->descriptor.idVendor != 0x451) {
- err = -ENODEV;
- goto out;
- }
-
- if ((dev->descriptor.idProduct != 0xe001) &&
- (dev->descriptor.idProduct != 0xe004) &&
- (dev->descriptor.idProduct != 0xe008)) {
- err = -ENODEV;
- goto out;
- }
-
- /*
- * TI introduced some new handhelds with embedded USB port.
- * Port advertises same config as SilverLink cable but with a
- * different maximum packet size (64 rather than 32).
- */
-
- conf = dev->actconfig;
- ifdata = conf->interface[0]->cur_altsetting;
- max_ps = ifdata->endpoint[0].desc.wMaxPacketSize;
-
- info("max packet size of %d/%d bytes\n",
- ifdata->endpoint[0].desc.wMaxPacketSize,
- ifdata->endpoint[1].desc.wMaxPacketSize);
-
- /*
- * Find a tiglusb struct
- */
- for (i = 0; i < MAXTIGL; i++) {
- ptiglusb_t s = &tiglusb[i];
- if (!s->dev) {
- minor = i;
- break;
- }
- }
-
- if (minor == -1) {
- err = -ENODEV;
- goto out;
- }
-
- s = &tiglusb[minor];
-
- down (&s->mutex);
- s->remove_pending = 0;
- s->dev = dev;
- s->max_ps = max_ps;
- up (&s->mutex);
- dbg ("bound to interface");
-
- class_simple_device_add(tiglusb_class, MKDEV(TIUSB_MAJOR, TIUSB_MINOR + s->minor),
- NULL, "usb%d", s->minor);
- err = devfs_mk_cdev(MKDEV(TIUSB_MAJOR, TIUSB_MINOR) + s->minor,
- S_IFCHR | S_IRUGO | S_IWUGO,
- "ticables/usb/%d", s->minor);
-
- if (err)
- goto out_class;
-
- /* Display firmware version */
- info ("firmware revision %i.%02x",
- dev->descriptor.bcdDevice >> 8,
- dev->descriptor.bcdDevice & 0xff);
-
- usb_set_intfdata (intf, s);
- err = 0;
- goto out;
-
-out_class:
- class_simple_device_remove(MKDEV(TIUSB_MAJOR, TIUSB_MINOR + s->minor));
-out:
- return err;
-}
-
-static void
-tiglusb_disconnect (struct usb_interface *intf)
-{
- wait_queue_t __wait;
- ptiglusb_t s = usb_get_intfdata (intf);
-
- init_waitqueue_entry(&__wait, current);
-
-
- usb_set_intfdata (intf, NULL);
- if (!s || !s->dev) {
- info ("bogus disconnect");
- return;
- }
-
- s->remove_pending = 1;
- wake_up (&s->wait);
- add_wait_queue(&s->wait, &__wait);
- set_current_state(TASK_UNINTERRUPTIBLE);
- if (s->state == _started)
- schedule();
- current->state = TASK_RUNNING;
- remove_wait_queue(&s->wait, &__wait);
- down (&s->mutex);
- s->dev = NULL;
- s->opened = 0;
-
- class_simple_device_remove(MKDEV(TIUSB_MAJOR, TIUSB_MINOR + s->minor));
- devfs_remove("ticables/usb/%d", s->minor);
-
- info ("device %d removed", s->minor);
-
- up (&s->mutex);
-}
-
-static struct usb_device_id tiglusb_ids[] = {
- {USB_DEVICE (0x0451, 0xe001)},
- {}
-};
-
-MODULE_DEVICE_TABLE (usb, tiglusb_ids);
-
-static struct usb_driver tiglusb_driver = {
- .owner = THIS_MODULE,
- .name = "tiglusb",
- .probe = tiglusb_probe,
- .disconnect = tiglusb_disconnect,
- .id_table = tiglusb_ids,
-};
-
-/* --- initialisation code ------------------------------------- */
-
-#ifndef MODULE
-/*
- * You can use 'tiusb=timeout' to set timeout.
- */
-static int __init
-tiglusb_setup (char *str)
-{
- int ints[2];
-
- str = get_options (str, ARRAY_SIZE (ints), ints);
-
- if (ints[0] > 0) {
- if (ints[1] > 0)
- timeout = ints[1];
- else
- info ("tiglusb: wrong timeout value (0), using default value.");
- }
-
- return 1;
-}
-#endif
-
-static int __init
-tiglusb_init (void)
-{
- unsigned u;
- int result, err = 0;
-
- /* initialize struct */
- for (u = 0; u < MAXTIGL; u++) {
- ptiglusb_t s = &tiglusb[u];
- memset (s, 0, sizeof (tiglusb_t));
- init_MUTEX (&s->mutex);
- s->dev = NULL;
- s->minor = u;
- s->opened = 0;
- init_waitqueue_head (&s->wait);
- init_waitqueue_head (&s->remove_ok);
- }
-
- /* register device */
- if (register_chrdev (TIUSB_MAJOR, "tiglusb", &tiglusb_fops)) {
- err ("unable to get major %d", TIUSB_MAJOR);
- err = -EIO;
- goto out;
- }
-
- /* Use devfs, tree: /dev/ticables/usb/[0..3] */
- devfs_mk_dir ("ticables/usb");
-
- tiglusb_class = class_simple_create(THIS_MODULE, "tiglusb");
- if (IS_ERR(tiglusb_class)) {
- err = PTR_ERR(tiglusb_class);
- goto out_chrdev;
- }
- /* register USB module */
- result = usb_register (&tiglusb_driver);
- if (result < 0) {
- err = -1;
- goto out_chrdev;
- }
-
- info (DRIVER_DESC ", version " DRIVER_VERSION);
-
- err = 0;
- goto out;
-
-out_chrdev:
- unregister_chrdev (TIUSB_MAJOR, "tiglusb");
-out:
- return err;
-}
-
-static void __exit
-tiglusb_cleanup (void)
-{
- usb_deregister (&tiglusb_driver);
- class_simple_destroy(tiglusb_class);
- devfs_remove("ticables/usb");
- unregister_chrdev (TIUSB_MAJOR, "tiglusb");
-}
-
-/* --------------------------------------------------------------------- */
-
-__setup ("tiusb=", tiglusb_setup);
-module_init (tiglusb_init);
-module_exit (tiglusb_cleanup);
-
-MODULE_AUTHOR (DRIVER_AUTHOR);
-MODULE_DESCRIPTION (DRIVER_DESC);
-MODULE_LICENSE (DRIVER_LICENSE);
-
-module_param(timeout, int, 0);
-MODULE_PARM_DESC (timeout, "Timeout in tenths of seconds (default=1.5 seconds)");
-
-/* --------------------------------------------------------------------- */
+++ /dev/null
-/* Hey EMACS -*- linux-c -*-
- *
- * tiglusb - low level driver for SilverLink cable
- *
- * Copyright (C) 2000-2002, Romain Lievin <roms@lpg.ticalc.org>
- * under the terms of the GNU General Public License.
- *
- * Redistribution of this file is permitted under the terms of the GNU
- * Public License (GPL)
- */
-
-#ifndef _TIGLUSB_H
-#define _TIGLUSB_H
-
-/*
- * Max. number of devices supported
- */
-#define MAXTIGL 16
-
-/*
- * The driver context...
- */
-
-typedef enum { _stopped=0, _started } driver_state_t;
-
-typedef struct
-{
- struct usb_device *dev; /* USB device handle */
- struct semaphore mutex; /* locks this struct */
-
- wait_queue_head_t wait; /* for timed waits */
- wait_queue_head_t remove_ok;
-
- int minor; /* which minor dev #? */
-
- driver_state_t state; /* started/stopped */
- int opened; /* tru if open */
- int remove_pending;
-
- int max_ps; /* max packet size */
-} tiglusb_t, *ptiglusb_t;
-
-#endif
+++ /dev/null
-/*
- File: fs/devpts/xattr.c
-
- Derived from fs/ext3/xattr.c, changed in the following ways:
- drop everything related to persistent storage of EAs
- pass dentry rather than inode to internal methods
- only presently define a handler for security modules
-*/
-
-#include <linux/init.h>
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <asm/semaphore.h>
-#include "xattr.h"
-
-static struct devpts_xattr_handler *devpts_xattr_handlers[DEVPTS_XATTR_INDEX_MAX];
-static rwlock_t devpts_handler_lock = RW_LOCK_UNLOCKED;
-
-int
-devpts_xattr_register(int name_index, struct devpts_xattr_handler *handler)
-{
- int error = -EINVAL;
-
- if (name_index > 0 && name_index <= DEVPTS_XATTR_INDEX_MAX) {
- write_lock(&devpts_handler_lock);
- if (!devpts_xattr_handlers[name_index-1]) {
- devpts_xattr_handlers[name_index-1] = handler;
- error = 0;
- }
- write_unlock(&devpts_handler_lock);
- }
- return error;
-}
-
-void
-devpts_xattr_unregister(int name_index, struct devpts_xattr_handler *handler)
-{
- if (name_index > 0 || name_index <= DEVPTS_XATTR_INDEX_MAX) {
- write_lock(&devpts_handler_lock);
- devpts_xattr_handlers[name_index-1] = NULL;
- write_unlock(&devpts_handler_lock);
- }
-}
-
-static inline const char *
-strcmp_prefix(const char *a, const char *a_prefix)
-{
- while (*a_prefix && *a == *a_prefix) {
- a++;
- a_prefix++;
- }
- return *a_prefix ? NULL : a;
-}
-
-/*
- * Decode the extended attribute name, and translate it into
- * the name_index and name suffix.
- */
-static inline struct devpts_xattr_handler *
-devpts_xattr_resolve_name(const char **name)
-{
- struct devpts_xattr_handler *handler = NULL;
- int i;
-
- if (!*name)
- return NULL;
- read_lock(&devpts_handler_lock);
- for (i=0; i<DEVPTS_XATTR_INDEX_MAX; i++) {
- if (devpts_xattr_handlers[i]) {
- const char *n = strcmp_prefix(*name,
- devpts_xattr_handlers[i]->prefix);
- if (n) {
- handler = devpts_xattr_handlers[i];
- *name = n;
- break;
- }
- }
- }
- read_unlock(&devpts_handler_lock);
- return handler;
-}
-
-static inline struct devpts_xattr_handler *
-devpts_xattr_handler(int name_index)
-{
- struct devpts_xattr_handler *handler = NULL;
- if (name_index > 0 && name_index <= DEVPTS_XATTR_INDEX_MAX) {
- read_lock(&devpts_handler_lock);
- handler = devpts_xattr_handlers[name_index-1];
- read_unlock(&devpts_handler_lock);
- }
- return handler;
-}
-
-/*
- * Inode operation getxattr()
- *
- * dentry->d_inode->i_sem down
- */
-ssize_t
-devpts_getxattr(struct dentry *dentry, const char *name,
- void *buffer, size_t size)
-{
- struct devpts_xattr_handler *handler;
-
- handler = devpts_xattr_resolve_name(&name);
- if (!handler)
- return -EOPNOTSUPP;
- return handler->get(dentry, name, buffer, size);
-}
-
-/*
- * Inode operation listxattr()
- *
- * dentry->d_inode->i_sem down
- */
-ssize_t
-devpts_listxattr(struct dentry *dentry, char *buffer, size_t buffer_size)
-{
- struct devpts_xattr_handler *handler = NULL;
- int i, error = 0;
- unsigned int size = 0;
- char *buf;
-
- read_lock(&devpts_handler_lock);
-
- for (i=0; i<DEVPTS_XATTR_INDEX_MAX; i++) {
- handler = devpts_xattr_handlers[i];
- if (handler)
- size += handler->list(dentry, NULL);
- }
-
- if (!buffer) {
- error = size;
- goto out;
- } else {
- error = -ERANGE;
- if (size > buffer_size)
- goto out;
- }
-
- buf = buffer;
- for (i=0; i<DEVPTS_XATTR_INDEX_MAX; i++) {
- handler = devpts_xattr_handlers[i];
- if (handler)
- buf += handler->list(dentry, buf);
- }
- error = size;
-
-out:
- read_unlock(&devpts_handler_lock);
- return size;
-}
-
-/*
- * Inode operation setxattr()
- *
- * dentry->d_inode->i_sem down
- */
-int
-devpts_setxattr(struct dentry *dentry, const char *name,
- const void *value, size_t size, int flags)
-{
- struct devpts_xattr_handler *handler;
-
- if (size == 0)
- value = ""; /* empty EA, do not remove */
- handler = devpts_xattr_resolve_name(&name);
- if (!handler)
- return -EOPNOTSUPP;
- return handler->set(dentry, name, value, size, flags);
-}
-
-/*
- * Inode operation removexattr()
- *
- * dentry->d_inode->i_sem down
- */
-int
-devpts_removexattr(struct dentry *dentry, const char *name)
-{
- struct devpts_xattr_handler *handler;
-
- handler = devpts_xattr_resolve_name(&name);
- if (!handler)
- return -EOPNOTSUPP;
- return handler->set(dentry, name, NULL, 0, XATTR_REPLACE);
-}
-
-int __init
-init_devpts_xattr(void)
-{
-#ifdef CONFIG_DEVPTS_FS_SECURITY
- int err;
-
- err = devpts_xattr_register(DEVPTS_XATTR_INDEX_SECURITY,
- &devpts_xattr_security_handler);
- if (err)
- return err;
-#endif
-
- return 0;
-}
-
-void
-exit_devpts_xattr(void)
-{
-#ifdef CONFIG_DEVPTS_FS_SECURITY
- devpts_xattr_unregister(DEVPTS_XATTR_INDEX_SECURITY,
- &devpts_xattr_security_handler);
-#endif
-
-}
+++ /dev/null
-/*
- File: fs/devpts/xattr.h
-
- Derived from fs/ext3/xattr.h, changed in the following ways:
- drop everything related to persistent storage of EAs
- pass dentry rather than inode to internal methods
- only presently define a handler for security modules
-*/
-
-#include <linux/config.h>
-#include <linux/xattr.h>
-
-/* Name indexes */
-#define DEVPTS_XATTR_INDEX_MAX 10
-#define DEVPTS_XATTR_INDEX_SECURITY 1
-
-# ifdef CONFIG_DEVPTS_FS_XATTR
-
-struct devpts_xattr_handler {
- char *prefix;
- size_t (*list)(struct dentry *dentry, char *buffer);
- int (*get)(struct dentry *dentry, const char *name, void *buffer,
- size_t size);
- int (*set)(struct dentry *dentry, const char *name, const void *buffer,
- size_t size, int flags);
-};
-
-extern int devpts_xattr_register(int, struct devpts_xattr_handler *);
-extern void devpts_xattr_unregister(int, struct devpts_xattr_handler *);
-
-extern int devpts_setxattr(struct dentry *, const char *, const void *, size_t, int);
-extern ssize_t devpts_getxattr(struct dentry *, const char *, void *, size_t);
-extern ssize_t devpts_listxattr(struct dentry *, char *, size_t);
-extern int devpts_removexattr(struct dentry *, const char *);
-
-extern int init_devpts_xattr(void);
-extern void exit_devpts_xattr(void);
-
-# else /* CONFIG_DEVPTS_FS_XATTR */
-# define devpts_setxattr NULL
-# define devpts_getxattr NULL
-# define devpts_listxattr NULL
-# define devpts_removexattr NULL
-
-static inline int
-init_devpts_xattr(void)
-{
- return 0;
-}
-
-static inline void
-exit_devpts_xattr(void)
-{
-}
-
-# endif /* CONFIG_DEVPTS_FS_XATTR */
-
-extern struct devpts_xattr_handler devpts_xattr_security_handler;
-
+++ /dev/null
-/*
- * linux/fs/fat/fatfs_syms.c
- *
- * Exported kernel symbols for the low-level FAT-based fs support.
- *
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-
-#include <linux/mm.h>
-#include <linux/msdos_fs.h>
-
-EXPORT_SYMBOL(fat_new_dir);
-EXPORT_SYMBOL(fat_date_unix2dos);
-EXPORT_SYMBOL(fat__get_entry);
-EXPORT_SYMBOL(fat_notify_change);
-EXPORT_SYMBOL(fat_attach);
-EXPORT_SYMBOL(fat_detach);
-EXPORT_SYMBOL(fat_build_inode);
-EXPORT_SYMBOL(fat_fill_super);
-EXPORT_SYMBOL(fat_search_long);
-EXPORT_SYMBOL(fat_scan);
-EXPORT_SYMBOL(fat_add_entries);
-EXPORT_SYMBOL(fat_dir_empty);
-
-int __init fat_cache_init(void);
-void __exit fat_cache_destroy(void);
-int __init fat_init_inodecache(void);
-void __exit fat_destroy_inodecache(void);
-static int __init init_fat_fs(void)
-{
- int ret;
-
- ret = fat_cache_init();
- if (ret < 0)
- return ret;
- return fat_init_inodecache();
-}
-
-static void __exit exit_fat_fs(void)
-{
- fat_cache_destroy();
- fat_destroy_inodecache();
-}
-
-module_init(init_fat_fs)
-module_exit(exit_fat_fs)
+++ /dev/null
-#
-# Makefile 1.00 Peter Braam <braam@clusterfs.com>
-#
-
-obj-$(CONFIG_INTERMEZZO_FS) += intermezzo.o
-
-intermezzo-objs := cache.o dcache.o dir.o ext_attr.o file.o fileset.o \
- inode.o journal.o journal_ext2.o journal_ext3.o \
- journal_obdfs.o journal_reiserfs.o journal_tmpfs.o journal_xfs.o \
- kml_reint.o kml_unpack.o methods.o presto.o psdev.o replicator.o \
- super.o sysctl.o upcall.o vfs.o
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2000 Stelias Computing, Inc.
- * Copyright (C) 2000 Red Hat, Inc.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/module.h>
-#include <asm/bitops.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/ext2_fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/sched.h>
-#include <linux/stat.h>
-#include <linux/string.h>
-#include <linux/blkdev.h>
-#include <linux/init.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-/*
- This file contains the routines associated with managing a
- cache of files for InterMezzo. These caches have two reqs:
- - need to be found fast so they are hashed by the device,
- with an attempt to have collision chains of length 1.
- The methods for the cache are set up in methods.
-*/
-
-extern kmem_cache_t * presto_dentry_slab;
-
-/* the intent of this hash is to have collision chains of length 1 */
-#define CACHES_BITS 8
-#define CACHES_SIZE (1 << CACHES_BITS)
-#define CACHES_MASK CACHES_SIZE - 1
-static struct list_head presto_caches[CACHES_SIZE];
-
-static inline int presto_cache_hash(struct super_block *s)
-{
- return (CACHES_MASK) & ((unsigned long)s >> L1_CACHE_SHIFT);
-}
-
-inline void presto_cache_add(struct presto_cache *cache)
-{
- list_add(&cache->cache_chain,
- &presto_caches[presto_cache_hash(cache->cache_sb)]);
-}
-
-inline void presto_cache_init_hash(void)
-{
- int i;
- for ( i = 0; i < CACHES_SIZE; i++ ) {
- INIT_LIST_HEAD(&presto_caches[i]);
- }
-}
-
-int izo_ioctl_packlen(struct izo_ioctl_data *data)
-{
- int len = sizeof(struct izo_ioctl_data);
- len += size_round(data->ioc_inllen1);
- len += size_round(data->ioc_inllen2);
- return len;
-}
-
-/* map a device to a cache */
-struct presto_cache *presto_cache_find(struct super_block *s)
-{
- struct presto_cache *cache;
- struct list_head *lh, *tmp;
-
- lh = tmp = &(presto_caches[presto_cache_hash(s)]);
- while ( (tmp = lh->next) != lh ) {
- cache = list_entry(tmp, struct presto_cache, cache_chain);
- if (cache->cache_sb == s)
- return cache;
- }
- return NULL;
-}
-
-
-/* map an inode to a cache */
-struct presto_cache *presto_get_cache(struct inode *inode)
-{
- struct presto_cache *cache;
- ENTRY;
- /* find the correct presto_cache here, based on the device */
- cache = presto_cache_find(inode->i_sb);
- if ( !cache ) {
- CERROR("WARNING: no presto cache for %s, ino %ld\n",
- inode->i_sb->s_id, inode->i_ino);
- EXIT;
- return NULL;
- }
- EXIT;
- return cache;
-}
-
-/* another debugging routine: check fs is InterMezzo fs */
-int presto_ispresto(struct inode *inode)
-{
- struct presto_cache *cache;
-
- if ( !inode )
- return 0;
- cache = presto_get_cache(inode);
- if ( !cache )
- return 0;
- return inode->i_sb == cache->cache_sb;
-}
-
-/* setup a cache structure when we need one */
-struct presto_cache *presto_cache_init(void)
-{
- struct presto_cache *cache;
-
- PRESTO_ALLOC(cache, sizeof(struct presto_cache));
- if ( cache ) {
- memset(cache, 0, sizeof(struct presto_cache));
- INIT_LIST_HEAD(&cache->cache_chain);
- INIT_LIST_HEAD(&cache->cache_fset_list);
- cache->cache_lock = SPIN_LOCK_UNLOCKED;
- cache->cache_reserved = 0;
- }
- return cache;
-}
-
-/* free a cache structure and all of the memory it is pointing to */
-inline void presto_free_cache(struct presto_cache *cache)
-{
- if (!cache)
- return;
-
- list_del(&cache->cache_chain);
- if (cache->cache_sb && cache->cache_sb->s_root &&
- presto_d2d(cache->cache_sb->s_root)) {
- kmem_cache_free(presto_dentry_slab,
- presto_d2d(cache->cache_sb->s_root));
- cache->cache_sb->s_root->d_fsdata = NULL;
- }
-
- PRESTO_FREE(cache, sizeof(struct presto_cache));
-}
-
-int presto_reserve_space(struct presto_cache *cache, loff_t req)
-{
- struct filter_fs *filter;
- loff_t avail;
- struct super_block *sb = cache->cache_sb;
- filter = cache->cache_filter;
- if (!filter ) {
- EXIT;
- return 0;
- }
- if (!filter->o_trops ) {
- EXIT;
- return 0;
- }
- if (!filter->o_trops->tr_avail ) {
- EXIT;
- return 0;
- }
-
- spin_lock(&cache->cache_lock);
- avail = filter->o_trops->tr_avail(cache, sb);
- CDEBUG(D_SUPER, "ESC::%ld +++> %ld \n", (long) cache->cache_reserved,
- (long) (cache->cache_reserved + req));
- CDEBUG(D_SUPER, "ESC::Avail::%ld \n", (long) avail);
- if (req + cache->cache_reserved > avail) {
- spin_unlock(&cache->cache_lock);
- EXIT;
- return -ENOSPC;
- }
- cache->cache_reserved += req;
- spin_unlock(&cache->cache_lock);
-
- EXIT;
- return 0;
-}
-
-void presto_release_space(struct presto_cache *cache, loff_t req)
-{
- CDEBUG(D_SUPER, "ESC::%ld ---> %ld \n", (long) cache->cache_reserved,
- (long) (cache->cache_reserved - req));
- spin_lock(&cache->cache_lock);
- cache->cache_reserved -= req;
- spin_unlock(&cache->cache_lock);
-}
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Original version: Copyright (C) 1996 P. Braam and M. Callahan
- * Rewritten for Linux 2.1. Copyright (C) 1997 Carnegie Mellon University
- * d_fsdata and NFS compatiblity fixes Copyright (C) 2001 Tacit Networks, Inc.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Directory operations for InterMezzo filesystem
- */
-
-/* inode dentry alias list walking code adapted from linux/fs/dcache.c
- *
- * fs/dcache.c
- *
- * (C) 1997 Thomas Schoebel-Theuer,
- * with heavy changes by Linus Torvalds
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <linux/slab.h>
-#include <asm/segment.h>
-#include <asm/uaccess.h>
-#include <linux/string.h>
-#include <linux/vmalloc.h>
-
-#include "intermezzo_fs.h"
-
-kmem_cache_t * presto_dentry_slab;
-
-/* called when a cache lookup succeeds */
-static int presto_d_revalidate(struct dentry *de, struct nameidata *nd)
-{
- struct inode *inode = de->d_inode;
- struct presto_file_set * root_fset;
-
- ENTRY;
- if (!inode) {
- EXIT;
- return 0;
- }
-
- if (is_bad_inode(inode)) {
- EXIT;
- return 0;
- }
-
- if (!presto_d2d(de)) {
- presto_set_dd(de);
- }
-
- if (!presto_d2d(de)) {
- EXIT;
- return 0;
- }
-
- root_fset = presto_d2d(de->d_inode->i_sb->s_root)->dd_fset;
- if (root_fset->fset_flags & FSET_FLAT_BRANCH &&
- (presto_d2d(de)->dd_fset != root_fset )) {
- presto_d2d(de)->dd_fset = root_fset;
- }
-
- EXIT;
- return 1;
-
-#if 0
- /* The following is needed for metadata on demand. */
- if ( S_ISDIR(inode->i_mode) ) {
- EXIT;
- return (presto_chk(de, PRESTO_DATA) &&
- (presto_chk(de, PRESTO_ATTR)));
- } else {
- EXIT;
- return presto_chk(de, PRESTO_ATTR);
- }
-#endif
-}
-
-static void presto_d_release(struct dentry *dentry)
-{
- if (!presto_d2d(dentry)) {
- /* This can happen for dentries from NFSd */
- return;
- }
- presto_d2d(dentry)->dd_count--;
-
- if (!presto_d2d(dentry)->dd_count) {
- kmem_cache_free(presto_dentry_slab, presto_d2d(dentry));
- dentry->d_fsdata = NULL;
- }
-}
-
-struct dentry_operations presto_dentry_ops =
-{
- .d_revalidate = presto_d_revalidate,
- .d_release = presto_d_release
-};
-
-static inline int presto_is_dentry_ROOT (struct dentry *dentry)
-{
- return(dentry_name_cmp(dentry,"ROOT") &&
- !dentry_name_cmp(dentry->d_parent,".intermezzo"));
-}
-
-static struct presto_file_set* presto_try_find_fset(struct dentry* dentry,
- int *is_under_d_intermezzo)
-{
- struct dentry* temp_dentry;
- struct presto_dentry_data *d_data;
- int found_root=0;
-
- ENTRY;
- CDEBUG(D_FSDATA, "finding fileset for %p:%s\n", dentry,
- dentry->d_name.name);
-
- *is_under_d_intermezzo = 0;
-
- /* walk up through the branch to get the fileset */
- /* The dentry we are passed presumably does not have the correct
- * fset information. However, we still want to start walking up
- * the branch from this dentry to get our found_root and
- * is_under_d_intermezzo decisions correct
- */
- for (temp_dentry = dentry ; ; temp_dentry = temp_dentry->d_parent) {
- CDEBUG(D_FSDATA, "--->dentry %p:%*s\n", temp_dentry,
- temp_dentry->d_name.len,temp_dentry->d_name.name);
- if (presto_is_dentry_ROOT(temp_dentry))
- found_root = 1;
- if (!found_root &&
- dentry_name_cmp(temp_dentry, ".intermezzo")) {
- *is_under_d_intermezzo = 1;
- }
- d_data = presto_d2d(temp_dentry);
- if (d_data) {
- /* If we found a "ROOT" dentry while walking up the
- * branch, we will journal regardless of whether
- * we are under .intermezzo or not.
- * If we are already under d_intermezzo don't reverse
- * the decision here...even if we found a "ROOT"
- * dentry above .intermezzo (if we were ever to
- * modify the directory structure).
- */
- if (!*is_under_d_intermezzo)
- *is_under_d_intermezzo = !found_root &&
- (d_data->dd_flags & PRESTO_DONT_JOURNAL);
- EXIT;
- return d_data->dd_fset;
- }
- if (temp_dentry->d_parent == temp_dentry) {
- break;
- }
- }
- EXIT;
- return NULL;
-}
-
-/* Only call this function on positive dentries */
-static struct presto_dentry_data* presto_try_find_alias_with_dd (
- struct dentry* dentry)
-{
- struct inode *inode=dentry->d_inode;
- struct list_head *head, *next, *tmp;
- struct dentry *tmp_dentry;
-
- /* Search through the alias list for dentries with d_fsdata */
- spin_lock(&dcache_lock);
- head = &inode->i_dentry;
- next = inode->i_dentry.next;
- while (next != head) {
- tmp = next;
- next = tmp->next;
- tmp_dentry = list_entry(tmp, struct dentry, d_alias);
- if (!presto_d2d(tmp_dentry)) {
- spin_unlock(&dcache_lock);
- return presto_d2d(tmp_dentry);
- }
- }
- spin_unlock(&dcache_lock);
- return NULL;
-}
-
-/* Only call this function on positive dentries */
-static void presto_set_alias_dd (struct dentry *dentry,
- struct presto_dentry_data* dd)
-{
- struct inode *inode=dentry->d_inode;
- struct list_head *head, *next, *tmp;
- struct dentry *tmp_dentry;
-
- /* Set d_fsdata for this dentry */
- dd->dd_count++;
- dentry->d_fsdata = dd;
-
- /* Now set d_fsdata for all dentries in the alias list. */
- spin_lock(&dcache_lock);
- head = &inode->i_dentry;
- next = inode->i_dentry.next;
- while (next != head) {
- tmp = next;
- next = tmp->next;
- tmp_dentry = list_entry(tmp, struct dentry, d_alias);
- if (!presto_d2d(tmp_dentry)) {
- dd->dd_count++;
- tmp_dentry->d_fsdata = dd;
- }
- }
- spin_unlock(&dcache_lock);
- return;
-}
-
-inline struct presto_dentry_data *izo_alloc_ddata(void)
-{
- struct presto_dentry_data *dd;
-
- dd = kmem_cache_alloc(presto_dentry_slab, SLAB_KERNEL);
- if (dd == NULL) {
- CERROR("IZO: out of memory trying to allocate presto_dentry_data\n");
- return NULL;
- }
- memset(dd, 0, sizeof(*dd));
- dd->dd_count = 1;
-
- return dd;
-}
-
-/* This uses the BKL! */
-int presto_set_dd(struct dentry * dentry)
-{
- struct presto_file_set *fset;
- struct presto_dentry_data *dd;
- int is_under_d_izo;
- int error=0;
-
- ENTRY;
-
- if (!dentry)
- BUG();
-
- lock_kernel();
-
- /* Did we lose a race? */
- if (dentry->d_fsdata) {
- CERROR("dentry %p already has d_fsdata set\n", dentry);
- if (dentry->d_inode)
- CERROR(" inode: %ld\n", dentry->d_inode->i_ino);
- EXIT;
- goto out_unlock;
- }
-
- if (dentry->d_inode != NULL) {
- /* NFSd runs find_fh_dentry which instantiates disconnected
- * dentries which are then connected without a lookup().
- * So it is possible to have connected dentries that do not
- * have d_fsdata set. So we walk the list trying to find
- * an alias which has its d_fsdata set and then use that
- * for all the other dentries as well.
- * - SHP,Vinny.
- */
-
- /* If there is an alias with d_fsdata use it. */
- if ((dd = presto_try_find_alias_with_dd (dentry))) {
- presto_set_alias_dd (dentry, dd);
- EXIT;
- goto out_unlock;
- }
- } else {
- /* Negative dentry */
- CDEBUG(D_FSDATA,"negative dentry %p: %*s\n", dentry,
- dentry->d_name.len, dentry->d_name.name);
- }
-
- /* No pre-existing d_fsdata, we need to construct one.
- * First, we must walk up the tree to find the fileset
- * If a fileset can't be found, we leave a null fsdata
- * and return EROFS to indicate that we can't journal
- * updates.
- */
- fset = presto_try_find_fset (dentry, &is_under_d_izo);
- if (!fset) {
-#ifdef PRESTO_NO_NFS
- CERROR("No fileset for dentry %p: %*s\n", dentry,
- dentry->d_name.len, dentry->d_name.name);
-#endif
- error = -EROFS;
- EXIT;
- goto out_unlock;
- }
-
- dentry->d_fsdata = izo_alloc_ddata();
- if (!presto_d2d(dentry)) {
- CERROR ("InterMezzo: out of memory allocating d_fsdata\n");
- error = -ENOMEM;
- goto out_unlock;
- }
- presto_d2d(dentry)->dd_fset = fset;
- if (is_under_d_izo)
- presto_d2d(dentry)->dd_flags |= PRESTO_DONT_JOURNAL;
- EXIT;
-
-out_unlock:
- CDEBUG(D_FSDATA,"presto_set_dd dentry %p: %*s, d_fsdata %p\n",
- dentry, dentry->d_name.len, dentry->d_name.name,
- dentry->d_fsdata);
- unlock_kernel();
- return error;
-}
-
-int presto_init_ddata_cache(void)
-{
- ENTRY;
- presto_dentry_slab =
- kmem_cache_create("presto_cache",
- sizeof(struct presto_dentry_data), 0,
- SLAB_HWCACHE_ALIGN, NULL,
- NULL);
- EXIT;
- return (presto_dentry_slab != NULL);
-}
-
-void presto_cleanup_ddata_cache(void)
-{
- kmem_cache_destroy(presto_dentry_slab);
-}
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2000 Stelias Computing, Inc.
- * Copyright (C) 2000 Red Hat, Inc.
- * Copyright (C) 2000 Tacitus Systems
- * Copyright (C) 2000 Peter J. Braam
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <asm/bitops.h>
-#include <asm/termios.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/namei.h>
-#include <linux/ext2_fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/sched.h>
-#include <linux/stat.h>
-#include <linux/string.h>
-#include <linux/blkdev.h>
-#include <linux/init.h>
-#include <linux/module.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-static inline void presto_relock_sem(struct inode *dir)
-{
- /* the lock from sys_mkdir / lookup_create */
- down(&dir->i_sem);
- /* the rest is done by the do_{create,mkdir, ...} */
-}
-
-static inline void presto_relock_other(struct inode *dir)
-{
- /* vfs_mkdir locks */
- // down(&dir->i_zombie);
- //lock_kernel();
-}
-
-static inline void presto_fulllock(struct inode *dir)
-{
- /* the lock from sys_mkdir / lookup_create */
- down(&dir->i_sem);
- /* vfs_mkdir locks */
- // down(&dir->i_zombie);
- //lock_kernel();
-}
-
-static inline void presto_unlock(struct inode *dir)
-{
- /* vfs_mkdir locks */
- //unlock_kernel();
- // up(&dir->i_zombie);
- /* the lock from sys_mkdir / lookup_create */
- up(&dir->i_sem);
-}
-
-
-/*
- * these are initialized in super.c
- */
-extern int presto_permission(struct inode *inode, int mask, struct nameidata *nd);
-static int izo_authorized_uid;
-
-int izo_dentry_is_ilookup(struct dentry *dentry, ino_t *id,
- unsigned int *generation)
-{
- char tmpname[64];
- char *next;
-
- ENTRY;
- /* prefix is 7 characters: '...ino:' */
- if ( dentry->d_name.len < 7 || dentry->d_name.len > 64 ||
- memcmp(dentry->d_name.name, PRESTO_ILOOKUP_MAGIC, 7) != 0 ) {
- EXIT;
- return 0;
- }
-
- memcpy(tmpname, dentry->d_name.name + 7, dentry->d_name.len - 7);
- *(tmpname + dentry->d_name.len - 7) = '\0';
-
- /* name is of the form ...ino:<inode number>:<generation> */
- *id = simple_strtoul(tmpname, &next, 16);
- if ( *next == PRESTO_ILOOKUP_SEP ) {
- *generation = simple_strtoul(next + 1, 0, 16);
- CDEBUG(D_INODE, "ino string: %s, Id = %lx (%lu), "
- "generation %x (%d)\n",
- tmpname, *id, *id, *generation, *generation);
- EXIT;
- return 1;
- } else {
- EXIT;
- return 0;
- }
-}
-
-struct dentry *presto_tmpfs_ilookup(struct inode *dir,
- struct dentry *dentry,
- ino_t ino,
- unsigned int generation)
-{
- return dentry;
-}
-
-
-inline int presto_can_ilookup(void)
-{
- return (current->euid == izo_authorized_uid ||
- capable(CAP_DAC_READ_SEARCH));
-}
-
-struct dentry *presto_iget_ilookup(struct inode *dir,
- struct dentry *dentry,
- ino_t ino,
- unsigned int generation)
-{
- struct inode *inode;
- int error;
-
- ENTRY;
-
- if ( !presto_can_ilookup() ) {
- CERROR("ilookup denied: euid %u, authorized_uid %u\n",
- current->euid, izo_authorized_uid);
- return ERR_PTR(-EPERM);
- }
- error = -ENOENT;
- inode = iget(dir->i_sb, ino);
- if (!inode) {
- CERROR("fatal: NULL inode ino %lu\n", ino);
- goto cleanup_iput;
- }
- if (is_bad_inode(inode) || inode->i_nlink == 0) {
- CERROR("fatal: bad inode ino %lu, links %d\n", ino, inode->i_nlink);
- goto cleanup_iput;
- }
- if (inode->i_generation != generation) {
- CERROR("fatal: bad generation %u (want %u)\n",
- inode->i_generation, generation);
- goto cleanup_iput;
- }
-
- d_instantiate(dentry, inode);
- dentry->d_flags |= DCACHE_DISCONNECTED; /* NFS hack */
-
- EXIT;
- return NULL;
-
-cleanup_iput:
- if (inode)
- iput(inode);
- return ERR_PTR(error);
-}
-
-struct dentry *presto_add_ilookup_dentry(struct dentry *parent,
- struct dentry *real)
-{
- struct inode *inode = real->d_inode;
- struct dentry *de;
- char buf[32];
- char *ptr = buf;
- struct dentry *inodir;
- struct presto_dentry_data *dd;
-
- inodir = lookup_one_len("..iopen..", parent, strlen("..iopen.."));
- if (!inodir || IS_ERR(inodir) || !inodir->d_inode ) {
- CERROR("%s: bad ..iopen.. lookup\n", __FUNCTION__);
- return NULL;
- }
- inodir->d_inode->i_op = &presto_dir_iops;
-
- snprintf(ptr, 32, "...ino:%lx:%x", inode->i_ino, inode->i_generation);
-
- de = lookup_one_len(ptr, inodir, strlen(ptr));
- if (!de || IS_ERR(de)) {
- CERROR("%s: bad ...ino lookup %ld\n",
- __FUNCTION__, PTR_ERR(de));
- dput(inodir);
- return NULL;
- }
-
- dd = presto_d2d(real);
- if (!dd)
- BUG();
-
- /* already exists */
- if (de->d_inode)
- BUG();
-#if 0
- if (de->d_inode != inode ) {
- CERROR("XX de->d_inode %ld, inode %ld\n",
- de->d_inode->i_ino, inode->i_ino);
- BUG();
- }
- if (dd->dd_inodentry) {
- CERROR("inodentry exists %ld \n", inode->i_ino);
- BUG();
- }
- dput(inodir);
- return de;
- }
-#endif
-
- if (presto_d2d(de))
- BUG();
-
- atomic_inc(&inode->i_count);
- de->d_op = &presto_dentry_ops;
- d_add(de, inode);
- if (!de->d_op)
- CERROR("DD: no ops dentry %p, dd %p\n", de, dd);
- dd->dd_inodentry = de;
- dd->dd_count++;
- de->d_fsdata = dd;
-
- dput(inodir);
- return de;
-}
-
-struct dentry *presto_lookup(struct inode * dir, struct dentry *dentry, struct nameidata *nd)
-{
- int rc = 0;
- struct dentry *de;
- struct presto_cache *cache;
- int minor;
- ino_t ino;
- unsigned int generation;
- struct inode_operations *iops;
- int is_ilookup = 0;
-
- ENTRY;
- cache = presto_get_cache(dir);
- if (cache == NULL) {
- CERROR("InterMezzo BUG: no cache in presto_lookup "
- "(dir ino: %ld)!\n", dir->i_ino);
- EXIT;
- return NULL;
- }
- minor = presto_c2m(cache);
-
- iops = filter_c2cdiops(cache->cache_filter);
- if (!iops || !iops->lookup) {
- CERROR("InterMezzo BUG: filesystem has no lookup\n");
- EXIT;
- return NULL;
- }
-
-
- CDEBUG(D_CACHE, "dentry %p, dir ino: %ld, name: %*s, islento: %d\n",
- dentry, dir->i_ino, dentry->d_name.len, dentry->d_name.name,
- ISLENTO(minor));
-
- if (dentry->d_fsdata)
- CERROR("DD -- BAD dentry %p has data\n", dentry);
-
- dentry->d_fsdata = NULL;
-#if 0
- if (ext2_check_for_iopen(dir, dentry))
- de = NULL;
- else {
-#endif
- if ( izo_dentry_is_ilookup(dentry, &ino, &generation) ) {
- de = cache->cache_filter->o_trops->tr_ilookup
- (dir, dentry, ino, generation);
- is_ilookup = 1;
- } else
- de = iops->lookup(dir, dentry, nd);
-#if 0
- }
-#endif
-
- if ( IS_ERR(de) ) {
- CERROR("dentry lookup error %ld\n", PTR_ERR(de));
- return de;
- }
-
- /* some file systems have no read_inode: set methods here */
- if (dentry->d_inode)
- presto_set_ops(dentry->d_inode, cache->cache_filter);
-
- filter_setup_dentry_ops(cache->cache_filter,
- dentry->d_op, &presto_dentry_ops);
- dentry->d_op = filter_c2udops(cache->cache_filter);
-
- /* In lookup we will tolerate EROFS return codes from presto_set_dd
- * to placate NFS. EROFS indicates that a fileset was not found but
- * we should still be able to continue through a lookup.
- * Anything else is a hard error and must be returned to VFS. */
- if (!is_ilookup)
- rc = presto_set_dd(dentry);
- if (rc && rc != -EROFS) {
- CERROR("presto_set_dd failed (dir %ld, name %*s): %d\n",
- dir->i_ino, dentry->d_name.len, dentry->d_name.name, rc);
- return ERR_PTR(rc);
- }
-
- EXIT;
- return NULL;
-}
-
-static inline int presto_check_set_fsdata (struct dentry *de)
-{
- if (presto_d2d(de) == NULL) {
-#ifdef PRESTO_NO_NFS
- CERROR("dentry without fsdata: %p: %*s\n", de,
- de->d_name.len, de->d_name.name);
- BUG();
-#endif
- return presto_set_dd (de);
- }
-
- return 0;
-}
-
-int presto_setattr(struct dentry *de, struct iattr *iattr)
-{
- int error;
- struct presto_cache *cache;
- struct presto_file_set *fset;
- struct lento_vfs_context info = { 0, {0}, 0 };
-
- ENTRY;
-
- error = presto_prep(de, &cache, &fset);
- if ( error ) {
- EXIT;
- return error;
- }
-
- if (!iattr->ia_valid)
- CDEBUG(D_INODE, "presto_setattr: iattr is not valid\n");
-
- CDEBUG(D_INODE, "valid %#x, mode %#o, uid %u, gid %u, size %Lu, "
- "atime %lu mtime %lu ctime %lu flags %d\n",
- iattr->ia_valid, iattr->ia_mode, iattr->ia_uid, iattr->ia_gid,
- iattr->ia_size, iattr->ia_atime.tv_sec, iattr->ia_mtime.tv_sec,
- iattr->ia_ctime.tv_sec, iattr->ia_attr_flags);
-
- if ( presto_get_permit(de->d_inode) < 0 ) {
- EXIT;
- return -EROFS;
- }
-
- if (!ISLENTO(presto_c2m(cache)))
- info.flags = LENTO_FL_KML;
- info.flags |= LENTO_FL_IGNORE_TIME;
- error = presto_do_setattr(fset, de, iattr, &info);
- presto_put_permit(de->d_inode);
- return error;
-}
-
-/*
- * Now the meat: the fs operations that require journaling
- *
- *
- * XXX: some of these need modifications for hierarchical filesets
- */
-
-int presto_prep(struct dentry *dentry, struct presto_cache **cache,
- struct presto_file_set **fset)
-{
- int rc;
-
- /* NFS might pass us dentries which have not gone through lookup.
- * Test and set d_fsdata for such dentries
- */
- rc = presto_check_set_fsdata (dentry);
- if (rc) return rc;
-
- *fset = presto_fset(dentry);
- if ( *fset == NULL ) {
- CERROR("No file set for dentry at %p: %*s\n", dentry,
- dentry->d_name.len, dentry->d_name.name);
- return -EROFS;
- }
-
- *cache = (*fset)->fset_cache;
- if ( *cache == NULL ) {
- CERROR("PRESTO: BAD, BAD: cannot find cache\n");
- return -EBADF;
- }
-
- CDEBUG(D_PIOCTL, "---> cache flags %x, fset flags %x\n",
- (*cache)->cache_flags, (*fset)->fset_flags);
- if( presto_is_read_only(*fset) ) {
- CERROR("PRESTO: cannot modify read-only fileset, minor %d.\n",
- presto_c2m(*cache));
- return -EROFS;
- }
- return 0;
-}
-
-static int presto_create(struct inode * dir, struct dentry * dentry, int mode,
- struct nameidata *nd)
-{
- int error;
- struct presto_cache *cache;
- struct dentry *parent = dentry->d_parent;
- struct lento_vfs_context info;
- struct presto_file_set *fset;
-
- ENTRY;
- error = presto_check_set_fsdata(dentry);
- if ( error ) {
- EXIT;
- return error;
- }
-
- error = presto_prep(dentry->d_parent, &cache, &fset);
- if ( error ) {
- EXIT;
- return error;
- }
- presto_unlock(dir);
-
- /* Does blocking and non-blocking behavious need to be
- checked for. Without blocking (return 1), the permit
- was acquired without reintegration
- */
- if ( presto_get_permit(dir) < 0 ) {
- EXIT;
- presto_fulllock(dir);
- return -EROFS;
- }
-
- presto_relock_sem(dir);
- parent = dentry->d_parent;
- memset(&info, 0, sizeof(info));
- if (!ISLENTO(presto_c2m(cache)))
- info.flags = LENTO_FL_KML;
- info.flags |= LENTO_FL_IGNORE_TIME;
- error = presto_do_create(fset, parent, dentry, mode, &info);
-
- presto_relock_other(dir);
- presto_put_permit(dir);
- EXIT;
- return error;
-}
-
-static int presto_link(struct dentry *old_dentry, struct inode *dir,
- struct dentry *new_dentry)
-{
- int error;
- struct presto_cache *cache, *new_cache;
- struct presto_file_set *fset, *new_fset;
- struct dentry *parent = new_dentry->d_parent;
- struct lento_vfs_context info;
-
- ENTRY;
- error = presto_prep(old_dentry, &cache, &fset);
- if ( error ) {
- EXIT;
- return error;
- }
-
- error = presto_check_set_fsdata(new_dentry);
- if ( error ) {
- EXIT;
- return error;
- }
-
- error = presto_prep(new_dentry->d_parent, &new_cache, &new_fset);
- if ( error ) {
- EXIT;
- return error;
- }
-
- if (fset != new_fset) {
- EXIT;
- return -EXDEV;
- }
-
- presto_unlock(dir);
- if ( presto_get_permit(old_dentry->d_inode) < 0 ) {
- EXIT;
- presto_fulllock(dir);
- return -EROFS;
- }
-
- if ( presto_get_permit(dir) < 0 ) {
- EXIT;
- presto_fulllock(dir);
- return -EROFS;
- }
-
- presto_relock_sem(dir);
- parent = new_dentry->d_parent;
-
- memset(&info, 0, sizeof(info));
- if (!ISLENTO(presto_c2m(cache)))
- info.flags = LENTO_FL_KML;
- info.flags |= LENTO_FL_IGNORE_TIME;
- error = presto_do_link(fset, old_dentry, parent,
- new_dentry, &info);
-
-#if 0
- /* XXX for links this is not right */
- if (cache->cache_filter->o_trops->tr_add_ilookup ) {
- struct dentry *d;
- d = cache->cache_filter->o_trops->tr_add_ilookup
- (dir->i_sb->s_root, new_dentry, 1);
- }
-#endif
-
- presto_relock_other(dir);
- presto_put_permit(dir);
- presto_put_permit(old_dentry->d_inode);
- return error;
-}
-
-static int presto_mkdir(struct inode * dir, struct dentry * dentry, int mode)
-{
- int error;
- struct presto_file_set *fset;
- struct presto_cache *cache;
- struct dentry *parent = dentry->d_parent;
- struct lento_vfs_context info;
-
- ENTRY;
-
- error = presto_check_set_fsdata(dentry);
- if ( error ) {
- EXIT;
- return error;
- }
-
- error = presto_prep(dentry->d_parent, &cache, &fset);
- if ( error ) {
- EXIT;
- return error;
- }
-
- presto_unlock(dir);
-
- if ( presto_get_permit(dir) < 0 ) {
- EXIT;
- presto_fulllock(dir);
- return -EROFS;
- }
-
- memset(&info, 0, sizeof(info));
- if (!ISLENTO(presto_c2m(cache)))
- info.flags = LENTO_FL_KML;
- info.flags |= LENTO_FL_IGNORE_TIME;
-
- presto_relock_sem(dir);
- parent = dentry->d_parent;
- error = presto_do_mkdir(fset, parent, dentry, mode, &info);
- presto_relock_other(dir);
- presto_put_permit(dir);
- return error;
-}
-
-
-
-static int presto_symlink(struct inode *dir, struct dentry *dentry,
- const char *name)
-{
- int error;
- struct presto_cache *cache;
- struct presto_file_set *fset;
- struct dentry *parent = dentry->d_parent;
- struct lento_vfs_context info;
-
- ENTRY;
- error = presto_check_set_fsdata(dentry);
- if ( error ) {
- EXIT;
- return error;
- }
-
- error = presto_prep(dentry->d_parent, &cache, &fset);
- if ( error ) {
- EXIT;
- return error;
- }
-
- presto_unlock(dir);
- if ( presto_get_permit(dir) < 0 ) {
- EXIT;
- presto_fulllock(dir);
- return -EROFS;
- }
-
- presto_relock_sem(dir);
- parent = dentry->d_parent;
- memset(&info, 0, sizeof(info));
- if (!ISLENTO(presto_c2m(cache)))
- info.flags = LENTO_FL_KML;
- info.flags |= LENTO_FL_IGNORE_TIME;
- error = presto_do_symlink(fset, parent, dentry, name, &info);
- presto_relock_other(dir);
- presto_put_permit(dir);
- return error;
-}
-
-int presto_unlink(struct inode *dir, struct dentry *dentry)
-{
- int error;
- struct presto_cache *cache;
- struct presto_file_set *fset;
- struct dentry *parent = dentry->d_parent;
- struct lento_vfs_context info;
-
- ENTRY;
- error = presto_check_set_fsdata(dentry);
- if ( error ) {
- EXIT;
- return error;
- }
-
- error = presto_prep(dentry->d_parent, &cache, &fset);
- if ( error ) {
- EXIT;
- return error;
- }
-
- presto_unlock(dir);
- if ( presto_get_permit(dir) < 0 ) {
- EXIT;
- presto_fulllock(dir);
- return -EROFS;
- }
-
- presto_relock_sem(dir);
- parent = dentry->d_parent;
- memset(&info, 0, sizeof(info));
- if (!ISLENTO(presto_c2m(cache)))
- info.flags = LENTO_FL_KML;
- info.flags |= LENTO_FL_IGNORE_TIME;
-
- error = presto_do_unlink(fset, parent, dentry, &info);
-
- presto_relock_other(dir);
- presto_put_permit(dir);
- return error;
-}
-
-static int presto_rmdir(struct inode *dir, struct dentry *dentry)
-{
- int error;
- struct presto_cache *cache;
- struct presto_file_set *fset;
- struct dentry *parent = dentry->d_parent;
- struct lento_vfs_context info;
-
- ENTRY;
- CDEBUG(D_FILE, "prepping presto\n");
- error = presto_check_set_fsdata(dentry);
-
- if ( error ) {
- EXIT;
- return error;
- }
-
- error = presto_prep(dentry->d_parent, &cache, &fset);
- if ( error ) {
- EXIT;
- return error;
- }
-
- CDEBUG(D_FILE, "unlocking\n");
- /* We need to dget() before the dput in double_unlock, to ensure we
- * still have dentry references. double_lock doesn't do dget for us.
- */
- if (d_unhashed(dentry))
- d_rehash(dentry);
- // double_up(&dir->i_zombie, &dentry->d_inode->i_zombie);
- up(&dentry->d_inode->i_sem);
- up(&dir->i_sem);
-
- CDEBUG(D_FILE, "getting permit\n");
- if ( presto_get_permit(parent->d_inode) < 0 ) {
- EXIT;
- down(&dir->i_sem);
- down(&dentry->d_inode->i_sem);
- // double_down(&dir->i_sem, &dentry->d_inode->i_sem);
- // double_down(&dir->i_zombie, &dentry->d_inode->i_zombie);
-
- lock_kernel();
- return -EROFS;
- }
- CDEBUG(D_FILE, "locking\n");
-
- down(&dir->i_sem);
- down(&dentry->d_inode->i_sem);
- parent = dentry->d_parent;
- memset(&info, 0, sizeof(info));
- if (!ISLENTO(presto_c2m(cache)))
- info.flags = LENTO_FL_KML;
- info.flags |= LENTO_FL_IGNORE_TIME;
- error = presto_do_rmdir(fset, parent, dentry, &info);
- presto_put_permit(parent->d_inode);
- lock_kernel();
- EXIT;
- return error;
-}
-
-static int presto_mknod(struct inode * dir, struct dentry * dentry, int mode, dev_t rdev)
-{
- int error;
- struct presto_cache *cache;
- struct presto_file_set *fset;
- struct dentry *parent = dentry->d_parent;
- struct lento_vfs_context info;
-
- if (!old_valid_dev(rdev))
- return -EINVAL;
-
- ENTRY;
- error = presto_check_set_fsdata(dentry);
- if ( error ) {
- EXIT;
- return error;
- }
-
- error = presto_prep(dentry->d_parent, &cache, &fset);
- if ( error ) {
- EXIT;
- return error;
- }
-
- presto_unlock(dir);
- if ( presto_get_permit(dir) < 0 ) {
- EXIT;
- presto_fulllock(dir);
- return -EROFS;
- }
-
- presto_relock_sem(dir);
- parent = dentry->d_parent;
- memset(&info, 0, sizeof(info));
- if (!ISLENTO(presto_c2m(cache)))
- info.flags = LENTO_FL_KML;
- info.flags |= LENTO_FL_IGNORE_TIME;
- error = presto_do_mknod(fset, parent, dentry, mode, rdev, &info);
- presto_relock_other(dir);
- presto_put_permit(dir);
- EXIT;
- return error;
-}
-
-
-
-// XXX this can be optimized: renamtes across filesets only require
-// multiple KML records, but can locally be executed normally.
-int presto_rename(struct inode *old_dir, struct dentry *old_dentry,
- struct inode *new_dir, struct dentry *new_dentry)
-{
- int error;
- struct presto_cache *cache, *new_cache;
- struct presto_file_set *fset, *new_fset;
- struct lento_vfs_context info;
- struct dentry *old_parent = old_dentry->d_parent;
- struct dentry *new_parent = new_dentry->d_parent;
- int triple;
-
- ENTRY;
- error = presto_prep(old_dentry, &cache, &fset);
- if ( error ) {
- EXIT;
- return error;
- }
- error = presto_prep(new_parent, &new_cache, &new_fset);
- if ( error ) {
- EXIT;
- return error;
- }
-
- if ( fset != new_fset ) {
- EXIT;
- return -EXDEV;
- }
-
- /* We need to do dget before the dput in double_unlock, to ensure we
- * still have dentry references. double_lock doesn't do dget for us.
- */
-
- triple = (S_ISDIR(old_dentry->d_inode->i_mode) && new_dentry->d_inode)?
- 1:0;
-
- unlock_rename(new_dentry->d_parent, old_dentry->d_parent);
-
- if ( presto_get_permit(old_dir) < 0 ) {
- EXIT;
- return -EROFS;
- }
- if ( presto_get_permit(new_dir) < 0 ) {
- EXIT;
- return -EROFS;
- }
-
- lock_rename(new_dentry->d_parent, old_dentry->d_parent);
- memset(&info, 0, sizeof(info));
- if (!ISLENTO(presto_c2m(cache)))
- info.flags = LENTO_FL_KML;
- info.flags |= LENTO_FL_IGNORE_TIME;
- error = do_rename(fset, old_parent, old_dentry, new_parent,
- new_dentry, &info);
-
- presto_put_permit(new_dir);
- presto_put_permit(old_dir);
- return error;
-}
-
-/* basically this allows the ilookup processes access to all files for
- * reading, while not making ilookup totally insecure. This could all
- * go away if we could set the CAP_DAC_READ_SEARCH capability for the client.
- */
-/* If posix acls are available, the underlying cache fs will export the
- * appropriate permission function. Thus we do not worry here about ACLs
- * or EAs. -SHP
- */
-int presto_permission(struct inode *inode, int mask, struct nameidata *nd)
-{
- unsigned short mode = inode->i_mode;
- struct presto_cache *cache;
- int rc;
-
- ENTRY;
- if ( presto_can_ilookup() && !(mask & S_IWOTH)) {
- CDEBUG(D_CACHE, "ilookup on %ld OK\n", inode->i_ino);
- EXIT;
- return 0;
- }
-
- cache = presto_get_cache(inode);
-
- if ( cache ) {
- /* we only override the file/dir permission operations */
- struct inode_operations *fiops = filter_c2cfiops(cache->cache_filter);
- struct inode_operations *diops = filter_c2cdiops(cache->cache_filter);
-
- if ( S_ISREG(mode) && fiops && fiops->permission ) {
- EXIT;
- return fiops->permission(inode, mask, nd);
- }
- if ( S_ISDIR(mode) && diops && diops->permission ) {
- EXIT;
- return diops->permission(inode, mask, nd);
- }
- }
-
- /* The cache filesystem doesn't have its own permission function,
- * so we call the default one.
- */
- rc = vfs_permission(inode, mask);
-
- EXIT;
- return rc;
-}
-
-
-int presto_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- char buf[1024];
- struct izo_ioctl_data *data = NULL;
- struct presto_dentry_data *dd;
- int rc;
-
- ENTRY;
-
- /* Try the filesystem's ioctl first, and return if it succeeded. */
- dd = presto_d2d(file->f_dentry);
- if (dd && dd->dd_fset) {
- int (*cache_ioctl)(struct inode *, struct file *, unsigned int, unsigned long ) = filter_c2cdfops(dd->dd_fset->fset_cache->cache_filter)->ioctl;
- rc = -ENOTTY;
- if (cache_ioctl)
- rc = cache_ioctl(inode, file, cmd, arg);
- if (rc != -ENOTTY) {
- EXIT;
- return rc;
- }
- }
-
- if (current->euid != 0 && current->euid != izo_authorized_uid) {
- EXIT;
- return -EPERM;
- }
-
- memset(buf, 0, sizeof(buf));
-
- if (izo_ioctl_getdata(buf, buf + 1024, (void *)arg)) {
- CERROR("intermezzo ioctl: data error\n");
- return -EINVAL;
- }
- data = (struct izo_ioctl_data *)buf;
-
- switch(cmd) {
- case IZO_IOC_REINTKML: {
- int rc;
- int cperr;
- rc = kml_reint_rec(file, data);
-
- EXIT;
- cperr = copy_to_user((char *)arg, data, sizeof(*data));
- if (cperr) {
- CERROR("WARNING: cperr %d\n", cperr);
- rc = -EFAULT;
- }
- return rc;
- }
-
- case IZO_IOC_GET_RCVD: {
- struct izo_rcvd_rec rec;
- struct presto_file_set *fset;
- int rc;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
- rc = izo_rcvd_get(&rec, fset, data->ioc_uuid);
- if (rc < 0) {
- EXIT;
- return rc;
- }
-
- EXIT;
- return copy_to_user((char *)arg, &rec, sizeof(rec))? -EFAULT : 0;
- }
-
- case IZO_IOC_REPSTATUS: {
- __u64 client_kmlsize;
- struct izo_rcvd_rec *lr_client;
- struct izo_rcvd_rec rec;
- struct presto_file_set *fset;
- int minor;
- int rc;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
- minor = presto_f2m(fset);
-
- client_kmlsize = data->ioc_kmlsize;
- lr_client = (struct izo_rcvd_rec *) data->ioc_pbuf1;
-
- rc = izo_repstatus(fset, client_kmlsize,
- lr_client, &rec);
- if (rc < 0) {
- EXIT;
- return rc;
- }
-
- EXIT;
- return copy_to_user((char *)arg, &rec, sizeof(rec))? -EFAULT : 0;
- }
-
- case IZO_IOC_GET_CHANNEL: {
- struct presto_file_set *fset;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
-
- data->ioc_dev = fset->fset_cache->cache_psdev->uc_minor;
- CDEBUG(D_PSDEV, "CHANNEL %d\n", data->ioc_dev);
- EXIT;
- return copy_to_user((char *)arg, data, sizeof(*data))? -EFAULT : 0;
- }
-
- case IZO_IOC_SET_IOCTL_UID:
- izo_authorized_uid = data->ioc_uid;
- EXIT;
- return 0;
-
- case IZO_IOC_SET_PID:
- rc = izo_psdev_setpid(data->ioc_dev);
- EXIT;
- return rc;
-
- case IZO_IOC_SET_CHANNEL:
- rc = izo_psdev_setchannel(file, data->ioc_dev);
- EXIT;
- return rc;
-
- case IZO_IOC_GET_KML_SIZE: {
- struct presto_file_set *fset;
- __u64 kmlsize;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
-
- kmlsize = presto_kml_offset(fset) + fset->fset_kml_logical_off;
-
- EXIT;
- return copy_to_user((char *)arg, &kmlsize, sizeof(kmlsize))?-EFAULT : 0;
- }
-
- case IZO_IOC_PURGE_FILE_DATA: {
- struct presto_file_set *fset;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
-
- rc = izo_purge_file(fset, data->ioc_inlbuf1);
- EXIT;
- return rc;
- }
-
- case IZO_IOC_GET_FILEID: {
- rc = izo_get_fileid(file, data);
- EXIT;
- if (rc)
- return rc;
- return copy_to_user((char *)arg, data, sizeof(*data))? -EFAULT : 0;
- }
-
- case IZO_IOC_SET_FILEID: {
- rc = izo_set_fileid(file, data);
- EXIT;
- if (rc)
- return rc;
- return copy_to_user((char *)arg, data, sizeof(*data))? -EFAULT : 0;
- }
-
- case IZO_IOC_ADJUST_LML: {
- struct lento_vfs_context *info;
- info = (struct lento_vfs_context *)data->ioc_inlbuf1;
- rc = presto_adjust_lml(file, info);
- EXIT;
- return rc;
- }
-
- case IZO_IOC_CONNECT: {
- struct presto_file_set *fset;
- int minor;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
- minor = presto_f2m(fset);
-
- rc = izo_upc_connect(minor, data->ioc_ino,
- data->ioc_generation, data->ioc_uuid,
- data->ioc_flags);
- EXIT;
- return rc;
- }
-
- case IZO_IOC_GO_FETCH_KML: {
- struct presto_file_set *fset;
- int minor;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
- minor = presto_f2m(fset);
-
- rc = izo_upc_go_fetch_kml(minor, fset->fset_name,
- data->ioc_uuid, data->ioc_kmlsize);
- EXIT;
- return rc;
- }
-
- case IZO_IOC_REVOKE_PERMIT:
- if (data->ioc_flags)
- rc = izo_revoke_permit(file->f_dentry, data->ioc_uuid);
- else
- rc = izo_revoke_permit(file->f_dentry, NULL);
- EXIT;
- return rc;
-
- case IZO_IOC_CLEAR_FSET:
- rc = izo_clear_fsetroot(file->f_dentry);
- EXIT;
- return rc;
-
- case IZO_IOC_CLEAR_ALL_FSETS: {
- struct presto_file_set *fset;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
-
- rc = izo_clear_all_fsetroots(fset->fset_cache);
- EXIT;
- return rc;
- }
-
- case IZO_IOC_SET_FSET:
- /*
- * Mark this dentry as being a fileset root.
- */
- rc = presto_set_fsetroot_from_ioc(file->f_dentry,
- data->ioc_inlbuf1,
- data->ioc_flags);
- EXIT;
- return rc;
-
-
- case IZO_IOC_MARK: {
- int res = 0; /* resulting flags - returned to user */
- int error;
-
- CDEBUG(D_DOWNCALL, "mark inode: %ld, and: %x, or: %x, what %d\n",
- file->f_dentry->d_inode->i_ino, data->ioc_and_flag,
- data->ioc_or_flag, data->ioc_mark_what);
-
- switch (data->ioc_mark_what) {
- case MARK_DENTRY:
- error = izo_mark_dentry(file->f_dentry,
- data->ioc_and_flag,
- data->ioc_or_flag, &res);
- break;
- case MARK_FSET:
- error = izo_mark_fset(file->f_dentry,
- data->ioc_and_flag,
- data->ioc_or_flag, &res);
- break;
- case MARK_CACHE:
- error = izo_mark_cache(file->f_dentry,
- data->ioc_and_flag,
- data->ioc_or_flag, &res);
- break;
- case MARK_GETFL: {
- int fflags, cflags;
- data->ioc_and_flag = 0xffffffff;
- data->ioc_or_flag = 0;
- error = izo_mark_dentry(file->f_dentry,
- data->ioc_and_flag,
- data->ioc_or_flag, &res);
- if (error)
- break;
- error = izo_mark_fset(file->f_dentry,
- data->ioc_and_flag,
- data->ioc_or_flag, &fflags);
- if (error)
- break;
- error = izo_mark_cache(file->f_dentry,
- data->ioc_and_flag,
- data->ioc_or_flag,
- &cflags);
-
- if (error)
- break;
- data->ioc_and_flag = fflags;
- data->ioc_or_flag = cflags;
- break;
- }
- default:
- error = -EINVAL;
- }
-
- if (error) {
- EXIT;
- return error;
- }
- data->ioc_mark_what = res;
- CDEBUG(D_DOWNCALL, "mark inode: %ld, and: %x, or: %x, what %x\n",
- file->f_dentry->d_inode->i_ino, data->ioc_and_flag,
- data->ioc_or_flag, data->ioc_mark_what);
-
- EXIT;
- return copy_to_user((char *)arg, data, sizeof(*data))? -EFAULT : 0;
- }
-#if 0
- case IZO_IOC_CLIENT_MAKE_BRANCH: {
- struct presto_file_set *fset;
- int minor;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
- minor = presto_f2m(fset);
-
- rc = izo_upc_client_make_branch(minor, fset->fset_name,
- data->ioc_inlbuf1,
- data->ioc_inlbuf2);
- EXIT;
- return rc;
- }
-#endif
- case IZO_IOC_SERVER_MAKE_BRANCH: {
- struct presto_file_set *fset;
- int minor;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
- minor = presto_f2m(fset);
-
- izo_upc_server_make_branch(minor, data->ioc_inlbuf1);
- EXIT;
- return 0;
- }
- case IZO_IOC_SET_KMLSIZE: {
- struct presto_file_set *fset;
- int minor;
- struct izo_rcvd_rec rec;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
- minor = presto_f2m(fset);
-
- rc = izo_upc_set_kmlsize(minor, fset->fset_name, data->ioc_uuid,
- data->ioc_kmlsize);
-
- if (rc != 0) {
- EXIT;
- return rc;
- }
-
- rc = izo_rcvd_get(&rec, fset, data->ioc_uuid);
- if (rc == -EINVAL) {
- /* We don't know anything about this uuid yet; no
- * worries. */
- memset(&rec, 0, sizeof(rec));
- } else if (rc <= 0) {
- CERROR("InterMezzo: error reading last_rcvd: %d\n", rc);
- EXIT;
- return rc;
- }
- rec.lr_remote_offset = data->ioc_kmlsize;
- rc = izo_rcvd_write(fset, &rec);
- if (rc <= 0) {
- CERROR("InterMezzo: error writing last_rcvd: %d\n", rc);
- EXIT;
- return rc;
- }
- EXIT;
- return rc;
- }
- case IZO_IOC_BRANCH_UNDO: {
- struct presto_file_set *fset;
- int minor;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
- minor = presto_f2m(fset);
-
- rc = izo_upc_branch_undo(minor, fset->fset_name,
- data->ioc_inlbuf1);
- EXIT;
- return rc;
- }
- case IZO_IOC_BRANCH_REDO: {
- struct presto_file_set *fset;
- int minor;
-
- fset = presto_fset(file->f_dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
- minor = presto_f2m(fset);
-
- rc = izo_upc_branch_redo(minor, fset->fset_name,
- data->ioc_inlbuf1);
- EXIT;
- return rc;
- }
-
- default:
- EXIT;
- return -ENOTTY;
-
- }
- EXIT;
- return 0;
-}
-
-struct file_operations presto_dir_fops = {
- .ioctl = presto_ioctl
-};
-
-struct inode_operations presto_dir_iops = {
- .create = presto_create,
- .lookup = presto_lookup,
- .link = presto_link,
- .unlink = presto_unlink,
- .symlink = presto_symlink,
- .mkdir = presto_mkdir,
- .rmdir = presto_rmdir,
- .mknod = presto_mknod,
- .rename = presto_rename,
- .permission = presto_permission,
- .setattr = presto_setattr,
-#ifdef CONFIG_FS_EXT_ATTR
- .set_ext_attr = presto_set_ext_attr,
-#endif
-};
-
-
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2001 Tacit Networks, Inc.
- * Author: Shirish H. Phatak <shirish@tacitnetworks.com>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Extended attribute handling for presto.
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/string.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <linux/unistd.h>
-
-#include <asm/system.h>
-#include <asm/uaccess.h>
-
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <asm/segment.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-#ifdef CONFIG_FS_EXT_ATTR
-#include <linux/ext_attr.h>
-
-extern inline void presto_debug_fail_blkdev(struct presto_file_set *fset,
- unsigned long value);
-
-
-/* VFS interface */
-/* XXX! Fixme test for user defined attributes */
-int presto_set_ext_attr(struct inode *inode,
- const char *name, void *buffer,
- size_t buffer_len, int flags)
-{
- int error;
- struct presto_cache *cache;
- struct presto_file_set *fset;
- struct lento_vfs_context info;
- struct dentry *dentry;
- int minor = presto_i2m(inode);
- char *buf = NULL;
-
- ENTRY;
- if (minor < 0) {
- EXIT;
- return -1;
- }
-
- if ( ISLENTO(minor) ) {
- EXIT;
- return -EINVAL;
- }
-
- /* BAD...vfs should really pass down the dentry to use, especially
- * since every other operation in iops does. But for now
- * we do a reverse mapping from inode to the first dentry
- */
- if (list_empty(&inode->i_dentry)) {
- CERROR("No alias for inode %d\n", (int) inode->i_ino);
- EXIT;
- return -EINVAL;
- }
-
- dentry = list_entry(inode->i_dentry.next, struct dentry, d_alias);
-
- error = presto_prep(dentry, &cache, &fset);
- if ( error ) {
- EXIT;
- return error;
- }
-
- if ((buffer != NULL) && (buffer_len != 0)) {
- /* If buffer is a user space pointer copy it to kernel space
- * and reset the flag. We do this since the journal functions need
- * access to the contents of the buffer, and the file system
- * does not care. When we actually invoke the function, we remove
- * the EXT_ATTR_FLAG_USER flag.
- *
- * XXX:Check if the "fs does not care" assertion is always true -SHP
- * (works for ext3)
- */
- if (flags & EXT_ATTR_FLAG_USER) {
- PRESTO_ALLOC(buf, buffer_len);
- if (!buf) {
- CERROR("InterMezzo: out of memory!!!\n");
- return -ENOMEM;
- }
- error = copy_from_user(buf, buffer, buffer_len);
- if (error)
- return -EFAULT;
- } else
- buf = buffer;
- } else
- buf = buffer;
-
- if ( presto_get_permit(inode) < 0 ) {
- EXIT;
- if (buffer_len && (flags & EXT_ATTR_FLAG_USER))
- PRESTO_FREE(buf, buffer_len);
- return -EROFS;
- }
-
- /* Simulate presto_setup_info */
- memset(&info, 0, sizeof(info));
- /* For now redundant..but we keep it around just in case */
- info.flags = LENTO_FL_IGNORE_TIME;
- if (!ISLENTO(cache->cache_psdev->uc_minor))
- info.flags |= LENTO_FL_KML;
-
- /* We pass in the kernel space pointer and reset the
- * EXT_ATTR_FLAG_USER flag.
- * See comments above.
- */
- /* Note that mode is already set by VFS so we send in a NULL */
- error = presto_do_set_ext_attr(fset, dentry, name, buf,
- buffer_len, flags & ~EXT_ATTR_FLAG_USER,
- NULL, &info);
- presto_put_permit(inode);
-
- if (buffer_len && (flags & EXT_ATTR_FLAG_USER))
- PRESTO_FREE(buf, buffer_len);
- EXIT;
- return error;
-}
-
-/* Lento Interface */
-/* XXX: ignore flags? We should be forcing these operations through? -SHP*/
-int lento_set_ext_attr(const char *path, const char *name,
- void *buffer, size_t buffer_len, int flags, mode_t mode,
- struct lento_vfs_context *info)
-{
- int error;
- char * pathname;
- struct nameidata nd;
- struct dentry *dentry;
- struct presto_file_set *fset;
-
- ENTRY;
- lock_kernel();
-
- pathname=getname(path);
- error = PTR_ERR(pathname);
- if (IS_ERR(pathname)) {
- EXIT;
- goto exit;
- }
-
- /* Note that ext_attrs apply to both files and directories..*/
- error=presto_walk(pathname,&nd);
- if (error)
- goto exit;
- dentry = nd.dentry;
-
- fset = presto_fset(dentry);
- error = -EINVAL;
- if ( !fset ) {
- CERROR("No fileset!\n");
- EXIT;
- goto exit_dentry;
- }
-
- if (buffer==NULL) buffer_len=0;
-
- error = presto_do_set_ext_attr(fset, dentry, name, buffer,
- buffer_len, flags, &mode, info);
-exit_dentry:
- path_release(&nd);
-exit_path:
- putname(pathname);
-exit:
- unlock_kernel();
- return error;
-}
-
-#endif /*CONFIG_FS_EXT_ATTR*/
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2000 Stelias Computing, Inc.
- * Copyright (C) 2000 Red Hat, Inc.
- * Copyright (C) 2000 TurboLinux, Inc.
- * Copyright (C) 2000 Los Alamos National Laboratory.
- * Copyright (C) 2000, 2001 Tacit Networks, Inc.
- * Copyright (C) 2000 Peter J. Braam
- * Copyright (C) 2001 Mountain View Data, Inc.
- * Copyright (C) 2001 Cluster File Systems, Inc.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * This file manages file I/O
- *
- */
-
-#include <asm/bitops.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/ext2_fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/sched.h>
-#include <linux/stat.h>
-#include <linux/string.h>
-#include <linux/blkdev.h>
-#include <linux/init.h>
-#include <linux/module.h>
-
-#include <linux/fsfilter.h>
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-/*
- * these are initialized in super.c
- */
-extern int presto_permission(struct inode *inode, int mask, struct nameidata *nd);
-
-
-static int presto_open_upcall(int minor, struct dentry *de)
-{
- int rc = 0;
- char *path, *buffer;
- struct presto_file_set *fset;
- int pathlen;
- struct lento_vfs_context info;
- struct presto_dentry_data *dd = presto_d2d(de);
-
- PRESTO_ALLOC(buffer, PAGE_SIZE);
- if ( !buffer ) {
- CERROR("PRESTO: out of memory!\n");
- return -ENOMEM;
- }
- fset = presto_fset(de);
- path = presto_path(de, fset->fset_dentry, buffer, PAGE_SIZE);
- pathlen = MYPATHLEN(buffer, path);
-
- CDEBUG(D_FILE, "de %p, dd %p\n", de, dd);
- if (dd->remote_ino == 0) {
- rc = presto_get_fileid(minor, fset, de);
- }
- memset (&info, 0, sizeof(info));
- if (dd->remote_ino > 0) {
- info.remote_ino = dd->remote_ino;
- info.remote_generation = dd->remote_generation;
- } else
- CERROR("get_fileid failed %d, ino: %Lx, fetching by name\n", rc,
- (unsigned long long) dd->remote_ino);
-
- rc = izo_upc_open(minor, pathlen, path, fset->fset_name, &info);
- PRESTO_FREE(buffer, PAGE_SIZE);
- return rc;
-}
-
-static inline int open_check_dod(struct file *file,
- struct presto_file_set *fset)
-{
- int gen, is_iopen = 0, minor;
- struct presto_cache *cache = fset->fset_cache;
- ino_t inum;
-
- minor = presto_c2m(cache);
-
- if ( ISLENTO(minor) ) {
- CDEBUG(D_CACHE, "is lento, not doing DOD.\n");
- return 0;
- }
-
- /* Files are only ever opened by inode during backfetches, when by
- * definition we have the authoritative copy of the data. No DOD. */
- is_iopen = izo_dentry_is_ilookup(file->f_dentry, &inum, &gen);
-
- if (is_iopen) {
- CDEBUG(D_CACHE, "doing iopen, not doing DOD.\n");
- return 0;
- }
-
- if (!(fset->fset_flags & FSET_DATA_ON_DEMAND)) {
- CDEBUG(D_CACHE, "fileset not on demand.\n");
- return 0;
- }
-
- if (file->f_flags & O_TRUNC) {
- CDEBUG(D_CACHE, "fileset dod: O_TRUNC.\n");
- return 0;
- }
-
- if (presto_chk(file->f_dentry, PRESTO_DONT_JOURNAL)) {
- CDEBUG(D_CACHE, "file under .intermezzo, not doing DOD\n");
- return 0;
- }
-
- if (presto_chk(file->f_dentry, PRESTO_DATA)) {
- CDEBUG(D_CACHE, "PRESTO_DATA is set, not doing DOD.\n");
- return 0;
- }
-
- if (cache->cache_filter->o_trops->tr_all_data(file->f_dentry->d_inode)) {
- CDEBUG(D_CACHE, "file not sparse, not doing DOD.\n");
- return 0;
- }
-
- return 1;
-}
-
-static int presto_file_open(struct inode *inode, struct file *file)
-{
- int rc = 0;
- struct file_operations *fops;
- struct presto_cache *cache;
- struct presto_file_set *fset;
- struct presto_file_data *fdata;
- int writable = (file->f_flags & (O_RDWR | O_WRONLY));
- int minor, i;
-
- ENTRY;
-
- if (presto_prep(file->f_dentry, &cache, &fset) < 0) {
- EXIT;
- return -EBADF;
- }
-
- minor = presto_c2m(cache);
-
- CDEBUG(D_CACHE, "DATA_OK: %d, ino: %ld, islento: %d\n",
- presto_chk(file->f_dentry, PRESTO_DATA), inode->i_ino,
- ISLENTO(minor));
-
- if ( !ISLENTO(minor) && (file->f_flags & O_RDWR ||
- file->f_flags & O_WRONLY)) {
- CDEBUG(D_CACHE, "calling presto_get_permit\n");
- if ( presto_get_permit(inode) < 0 ) {
- EXIT;
- return -EROFS;
- }
- presto_put_permit(inode);
- }
-
- if (open_check_dod(file, fset)) {
- CDEBUG(D_CACHE, "presto_open_upcall\n");
- CDEBUG(D_CACHE, "dentry: %p setting DATA, ATTR\n", file->f_dentry);
- presto_set(file->f_dentry, PRESTO_ATTR | PRESTO_DATA);
- rc = presto_open_upcall(minor, file->f_dentry);
- if (rc) {
- EXIT;
- CERROR("%s: returning error %d\n", __FUNCTION__, rc);
- return rc;
- }
-
- }
-
- /* file was truncated upon open: do not refetch */
- if (file->f_flags & O_TRUNC) {
- CDEBUG(D_CACHE, "setting DATA, ATTR\n");
- presto_set(file->f_dentry, PRESTO_ATTR | PRESTO_DATA);
- }
-
- fops = filter_c2cffops(cache->cache_filter);
- if ( fops->open ) {
- CDEBUG(D_CACHE, "calling fs open\n");
- rc = fops->open(inode, file);
-
- if (rc) {
- EXIT;
- return rc;
- }
- }
-
- if (writable) {
- PRESTO_ALLOC(fdata, sizeof(*fdata));
- if (!fdata) {
- EXIT;
- return -ENOMEM;
- }
- /* LOCK: XXX check that the kernel lock protects this alloc */
- fdata->fd_do_lml = 0;
- fdata->fd_bytes_written = 0;
- fdata->fd_fsuid = current->fsuid;
- fdata->fd_fsgid = current->fsgid;
- fdata->fd_mode = file->f_dentry->d_inode->i_mode;
- fdata->fd_uid = file->f_dentry->d_inode->i_uid;
- fdata->fd_gid = file->f_dentry->d_inode->i_gid;
- fdata->fd_ngroups = current->group_info->ngroups;
- for (i=0 ; i < current->group_info->ngroups ; i++)
- fdata->fd_groups[i] = GROUP_AT(current->group_info,i);
- if (!ISLENTO(minor))
- fdata->fd_info.flags = LENTO_FL_KML;
- else {
- /* this is for the case of DOD,
- reint_close will adjust flags if needed */
- fdata->fd_info.flags = 0;
- }
-
- presto_getversion(&fdata->fd_version, inode);
- file->private_data = fdata;
- } else {
- file->private_data = NULL;
- }
-
- EXIT;
- return 0;
-}
-
-int presto_adjust_lml(struct file *file, struct lento_vfs_context *info)
-{
- struct presto_file_data *fdata =
- (struct presto_file_data *) file->private_data;
-
- if (!fdata) {
- EXIT;
- return -EINVAL;
- }
-
- memcpy(&fdata->fd_info, info, sizeof(*info));
- EXIT;
- return 0;
-}
-
-
-static int presto_file_release(struct inode *inode, struct file *file)
-{
- int rc;
- struct file_operations *fops;
- struct presto_cache *cache;
- struct presto_file_set *fset;
- struct presto_file_data *fdata =
- (struct presto_file_data *)file->private_data;
- ENTRY;
-
- rc = presto_prep(file->f_dentry, &cache, &fset);
- if ( rc ) {
- EXIT;
- return rc;
- }
-
- fops = filter_c2cffops(cache->cache_filter);
- if (fops && fops->release)
- rc = fops->release(inode, file);
-
- CDEBUG(D_CACHE, "islento = %d (minor %d), rc %d, data %p\n",
- ISLENTO(cache->cache_psdev->uc_minor),
- cache->cache_psdev->uc_minor, rc, fdata);
-
- /* this file was modified: ignore close errors, write KML */
- if (fdata && fdata->fd_do_lml) {
- /* XXX: remove when lento gets file granularity cd */
- if ( presto_get_permit(inode) < 0 ) {
- EXIT;
- return -EROFS;
- }
-
- fdata->fd_info.updated_time = file->f_dentry->d_inode->i_mtime;
- rc = presto_do_close(fset, file);
- presto_put_permit(inode);
- }
-
- if (!rc && fdata) {
- PRESTO_FREE(fdata, sizeof(*fdata));
- file->private_data = NULL;
- }
-
- EXIT;
- return rc;
-}
-
-static void presto_apply_write_policy(struct file *file,
- struct presto_file_set *fset, loff_t res)
-{
- struct presto_file_data *fdata =
- (struct presto_file_data *)file->private_data;
- struct presto_cache *cache = fset->fset_cache;
- struct presto_version new_file_ver;
- int error;
- struct rec_info rec;
-
- /* Here we do a journal close after a fixed or a specified
- amount of KBytes, currently a global parameter set with
- sysctl. If files are open for a long time, this gives added
- protection. (XXX todo: per cache, add ioctl, handle
- journaling in a thread, add more options etc.)
- */
-
- if ((fset->fset_flags & FSET_JCLOSE_ON_WRITE) &&
- (!ISLENTO(cache->cache_psdev->uc_minor))) {
- fdata->fd_bytes_written += res;
-
- if (fdata->fd_bytes_written >= fset->fset_file_maxio) {
- presto_getversion(&new_file_ver,
- file->f_dentry->d_inode);
- /* This is really heavy weight and should be fixed
- ASAP. At most we should be recording the number
- of bytes written and not locking the kernel,
- wait for permits, etc, on the write path. SHP
- */
- lock_kernel();
- if ( presto_get_permit(file->f_dentry->d_inode) < 0 ) {
- EXIT;
- /* we must be disconnected, not to worry */
- unlock_kernel();
- return;
- }
- error = presto_journal_close(&rec, fset, fdata,
- file->f_dentry,
- &fdata->fd_version,
- &new_file_ver);
- presto_put_permit(file->f_dentry->d_inode);
- unlock_kernel();
- if ( error ) {
- CERROR("presto_close: cannot journal close\n");
- /* XXX these errors are really bad */
- /* panic(); */
- return;
- }
- fdata->fd_bytes_written = 0;
- }
- }
-}
-
-static ssize_t presto_file_write(struct file *file, const char *buf,
- size_t size, loff_t *off)
-{
- struct rec_info rec;
- int error;
- struct presto_cache *cache;
- struct presto_file_set *fset;
- struct file_operations *fops;
- ssize_t res;
- int do_lml_here;
- void *handle = NULL;
- unsigned long blocks;
- struct presto_file_data *fdata;
- loff_t res_size;
-
- error = presto_prep(file->f_dentry, &cache, &fset);
- if ( error ) {
- EXIT;
- return error;
- }
-
- blocks = (size >> file->f_dentry->d_inode->i_sb->s_blocksize_bits) + 1;
- /* XXX 3 is for ext2 indirect blocks ... */
- res_size = 2 * PRESTO_REQHIGH + ((blocks+3)
- << file->f_dentry->d_inode->i_sb->s_blocksize_bits);
-
- error = presto_reserve_space(fset->fset_cache, res_size);
- CDEBUG(D_INODE, "Reserved %Ld for %Zd\n", res_size, size);
- if ( error ) {
- EXIT;
- return -ENOSPC;
- }
-
- CDEBUG(D_INODE, "islento %d, minor: %d\n",
- ISLENTO(cache->cache_psdev->uc_minor),
- cache->cache_psdev->uc_minor);
-
- /*
- * XXX this lock should become a per inode lock when
- * Vinny's changes are in; we could just use i_sem.
- */
- read_lock(&fset->fset_lml.fd_lock);
- fdata = (struct presto_file_data *)file->private_data;
- do_lml_here = size && (fdata->fd_do_lml == 0) &&
- !presto_chk(file->f_dentry, PRESTO_DONT_JOURNAL);
-
- if (do_lml_here)
- fdata->fd_do_lml = 1;
- read_unlock(&fset->fset_lml.fd_lock);
-
- /* XXX
- There might be a bug here. We need to make
- absolutely sure that the ext3_file_write commits
- after our transaction that writes the LML record.
- Nesting the file write helps if new blocks are allocated.
- */
- res = 0;
- if (do_lml_here) {
- struct presto_version file_version;
- /* handle different space reqs from file system below! */
- handle = presto_trans_start(fset, file->f_dentry->d_inode,
- KML_OPCODE_WRITE);
- if ( IS_ERR(handle) ) {
- presto_release_space(fset->fset_cache, res_size);
- CERROR("presto_write: no space for transaction\n");
- return -ENOSPC;
- }
-
- presto_getversion(&file_version, file->f_dentry->d_inode);
- res = presto_write_lml_close(&rec, fset, file,
- fdata->fd_info.remote_ino,
- fdata->fd_info.remote_generation,
- &fdata->fd_info.remote_version,
- &file_version);
- fdata->fd_lml_offset = rec.offset;
- if ( res ) {
- CERROR("intermezzo: PANIC failed to write LML\n");
- *(int *)0 = 1;
- EXIT;
- goto exit_write;
- }
- presto_trans_commit(fset, handle);
- }
-
- fops = filter_c2cffops(cache->cache_filter);
- res = fops->write(file, buf, size, off);
- if ( res != size ) {
- CDEBUG(D_FILE, "file write returns short write: size %Zd, res %Zd\n", size, res);
- }
-
- if ( (res > 0) && fdata )
- presto_apply_write_policy(file, fset, res);
-
- exit_write:
- presto_release_space(fset->fset_cache, res_size);
- return res;
-}
-
-struct file_operations presto_file_fops = {
- .write = presto_file_write,
- .open = presto_file_open,
- .release = presto_file_release,
- .ioctl = presto_ioctl
-};
-
-struct inode_operations presto_file_iops = {
- .permission = presto_permission,
- .setattr = presto_setattr,
-#ifdef CONFIG_FS_EXT_ATTR
- .set_ext_attr = presto_set_ext_attr,
-#endif
-};
-
-/* FIXME: I bet we want to add a lock here and in presto_file_open. */
-int izo_purge_file(struct presto_file_set *fset, char *file)
-{
-#if 0
- void *handle = NULL;
- char *path = NULL;
- struct nameidata nd;
- struct dentry *dentry;
- int rc = 0, len;
- loff_t oldsize;
-
- /* FIXME: not mtpt it's gone */
- len = strlen(fset->fset_cache->cache_mtpt) + strlen(file) + 1;
- PRESTO_ALLOC(path, len + 1);
- if (path == NULL)
- return -1;
-
- sprintf(path, "%s/%s", fset->fset_cache->cache_mtpt, file);
- rc = izo_lookup_file(fset, path, &nd);
- if (rc)
- goto error;
- dentry = nd.dentry;
-
- /* FIXME: take a lock here */
-
- if (dentry->d_inode->i_atime.tv_sec > get_seconds() - 5) {
- /* We lost the race; this file was accessed while we were doing
- * ioctls and lookups and whatnot. */
- rc = -EBUSY;
- goto error_unlock;
- }
-
- /* FIXME: Check if this file is open. */
-
- handle = presto_trans_start(fset, dentry->d_inode, KML_OPCODE_TRUNC);
- if (IS_ERR(handle)) {
- rc = -ENOMEM;
- goto error_unlock;
- }
-
- /* FIXME: Write LML record */
-
- oldsize = dentry->d_inode->i_size;
- rc = izo_do_truncate(fset, dentry, 0, oldsize);
- if (rc != 0)
- goto error_clear;
- rc = izo_do_truncate(fset, dentry, oldsize, 0);
- if (rc != 0)
- goto error_clear;
-
- error_clear:
- /* FIXME: clear LML record */
-
- error_unlock:
- /* FIXME: release the lock here */
-
- error:
- if (handle != NULL && !IS_ERR(handle))
- presto_trans_commit(fset, handle);
- if (path != NULL)
- PRESTO_FREE(path, len + 1);
- return rc;
-#else
- return 0;
-#endif
-}
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2001 Cluster File Systems, Inc. <braam@clusterfs.com>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Managing filesets
- *
- */
-
-#include <asm/bitops.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/namei.h>
-#include <linux/ext2_fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/sched.h>
-#include <linux/stat.h>
-#include <linux/string.h>
-#include <linux/blkdev.h>
-#include <linux/init.h>
-#include <linux/module.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-static inline struct presto_file_set *presto_dentry2fset(struct dentry *dentry)
-{
- if (presto_d2d(dentry) == NULL) {
- EXIT;
- return NULL;
- }
- return presto_d2d(dentry)->dd_fset;
-}
-
-/* find the fileset dentry for this dentry */
-struct presto_file_set *presto_fset(struct dentry *de)
-{
- struct dentry *fsde;
- ENTRY;
- if ( !de->d_inode ) {
- /* FIXME: is this ok to be NULL? */
- CDEBUG(D_INODE,"presto_fset: warning %*s has NULL inode.\n",
- de->d_name.len, de->d_name.name);
- }
- for (fsde = de;; fsde = fsde->d_parent) {
- if ( presto_dentry2fset(fsde) ) {
- EXIT;
- return presto_dentry2fset(fsde);
- }
- if (fsde->d_parent == fsde)
- break;
- }
- EXIT;
- return NULL;
-}
-
-int presto_get_lastrecno(char *path, off_t *recno)
-{
- struct nameidata nd;
- struct presto_file_set *fset;
- struct dentry *dentry;
- int error;
- ENTRY;
-
- error = presto_walk(path, &nd);
- if (error) {
- EXIT;
- return error;
- }
-
- dentry = nd.dentry;
-
- error = -ENXIO;
- if ( !presto_ispresto(dentry->d_inode) ) {
- EXIT;
- goto kml_out;
- }
-
- error = -EINVAL;
- if ( ! presto_dentry2fset(dentry)) {
- EXIT;
- goto kml_out;
- }
-
- fset = presto_dentry2fset(dentry);
- if (!fset) {
- EXIT;
- goto kml_out;
- }
- error = 0;
- *recno = fset->fset_kml.fd_recno;
-
- kml_out:
- path_release(&nd);
- return error;
-}
-
-static char * _izo_make_path(char *fsetname, char *name)
-{
- char *path = NULL;
- int len;
-
- len = strlen("/.intermezzo/") + strlen(fsetname)
- + 1 + strlen(name) + 1;
-
- PRESTO_ALLOC(path, len);
- if (path == NULL)
- return NULL;
-
- sprintf(path, "/.intermezzo/%s/%s", fsetname, name);
-
- return path;
-}
-
-char * izo_make_path(struct presto_file_set *fset, char *name)
-{
- return _izo_make_path(fset->fset_name, name);
-}
-
-static struct file *_izo_fset_open(char *fsetname, char *name, int flags, int mode)
-{
- char *path;
- struct file *f;
- int error;
- ENTRY;
-
- path = _izo_make_path(fsetname, name);
- if (path == NULL) {
- EXIT;
- return ERR_PTR(-ENOMEM);
- }
-
- CDEBUG(D_INODE, "opening file %s\n", path);
- f = filp_open(path, flags, mode);
- error = PTR_ERR(f);
- if (IS_ERR(f)) {
- CDEBUG(D_INODE, "Error %d\n", error);
- }
-
- PRESTO_FREE(path, strlen(path));
-
- EXIT;
- return f;
-
-}
-
-struct file *izo_fset_open(struct presto_file_set *fset, char *name, int flags, int mode)
-{
- return _izo_fset_open(fset->fset_name, name, flags, mode);
-}
-
-
-
-/*
- * note: this routine "pins" a dentry for a fileset root
- */
-int presto_set_fsetroot(struct dentry *ioctl_dentry, char *fsetname,
- unsigned int flags)
-{
- struct presto_file_set *fset = NULL;
- struct presto_cache *cache;
- int error;
- struct file *fset_root;
- struct dentry *dentry;
-
- ENTRY;
-
- fset_root = _izo_fset_open(fsetname, "ROOT", O_RDONLY, 000);
- if (IS_ERR(fset_root)) {
- CERROR("Can't open %s/ROOT\n", fsetname);
- EXIT;
- error = PTR_ERR(fset_root);
- goto out;
- }
- dentry = dget(fset_root->f_dentry);
- filp_close(fset_root, NULL);
-
- dentry->d_inode->i_op = ioctl_dentry->d_inode->i_op;
- dentry->d_inode->i_fop = ioctl_dentry->d_inode->i_fop;
- dentry->d_op = ioctl_dentry->d_op;
- fset = presto_dentry2fset(dentry);
- if (fset && (fset->fset_dentry == dentry) ) {
- CERROR("Fsetroot already set (inode %ld)\n",
- dentry->d_inode->i_ino);
- /* XXX: ignore because clear_fsetroot is broken */
-#if 0
- dput(dentry);
- EXIT;
- error = -EEXIST;
- goto out;
-#endif
- }
-
- cache = presto_get_cache(dentry->d_inode);
- if (!cache) {
- CERROR("No cache found for inode %ld\n",
- dentry->d_inode->i_ino);
- EXIT;
- error = -ENODEV;
- goto out_free;
- }
-
- PRESTO_ALLOC(fset, sizeof(*fset));
- if ( !fset ) {
- CERROR("No memory allocating fset for %s\n", fsetname);
- EXIT;
- error = -ENOMEM;
- goto out_free;
- }
- CDEBUG(D_INODE, "fset at %p\n", fset);
-
- CDEBUG(D_INODE, "InterMezzo: fsetroot: inode %ld, fileset name %s\n",
- dentry->d_inode->i_ino, fsetname);
-
- fset->fset_mnt = mntget(current->fs->pwdmnt);
- fset->fset_cache = cache;
- fset->fset_dentry = dentry;
- fset->fset_name = strdup(fsetname);
- fset->fset_chunkbits = CHUNK_BITS;
- fset->fset_flags = flags;
- fset->fset_file_maxio = FSET_DEFAULT_MAX_FILEIO;
- fset->fset_permit_lock = SPIN_LOCK_UNLOCKED;
- PRESTO_ALLOC(fset->fset_reint_buf, 64 * 1024);
- if (fset->fset_reint_buf == NULL) {
- EXIT;
- error = -ENOMEM;
- goto out_free;
- }
- init_waitqueue_head(&fset->fset_permit_queue);
-
- if (presto_d2d(dentry) == NULL) {
- dentry->d_fsdata = izo_alloc_ddata();
- }
- if (presto_d2d(dentry) == NULL) {
- CERROR("InterMezzo: %s: no memory\n", __FUNCTION__);
- EXIT;
- error = -ENOMEM;
- goto out_free;
- }
- presto_d2d(dentry)->dd_fset = fset;
- list_add(&fset->fset_list, &cache->cache_fset_list);
-
- error = izo_init_kml_file(fset, &fset->fset_kml);
- if ( error ) {
- EXIT;
- CDEBUG(D_JOURNAL, "Error init_kml %d\n", error);
- goto out_list_del;
- }
-
- error = izo_init_lml_file(fset, &fset->fset_lml);
- if ( error ) {
- int rc;
- EXIT;
- rc = izo_log_close(&fset->fset_kml);
- CDEBUG(D_JOURNAL, "Error init_lml %d, cleanup %d\n", error, rc);
- goto out_list_del;
- }
-
- /* init_last_rcvd_file could trigger a presto_file_write(), which
- * requires that the lml structure be initialized. -phil */
- error = izo_init_last_rcvd_file(fset, &fset->fset_rcvd);
- if ( error ) {
- int rc;
- EXIT;
- rc = izo_log_close(&fset->fset_kml);
- rc = izo_log_close(&fset->fset_lml);
- CDEBUG(D_JOURNAL, "Error init_lastrcvd %d, cleanup %d\n", error, rc);
- goto out_list_del;
- }
-
- CDEBUG(D_PIOCTL, "-------> fset at %p, dentry at %p, mtpt %p,"
- "fset %s, cache %p, presto_d2d(dentry)->dd_fset %p\n",
- fset, dentry, fset->fset_dentry, fset->fset_name, cache,
- presto_d2d(dentry)->dd_fset);
-
- EXIT;
- return 0;
-
- out_list_del:
- list_del(&fset->fset_list);
- presto_d2d(dentry)->dd_fset = NULL;
- out_free:
- if (fset) {
- mntput(fset->fset_mnt);
- if (fset->fset_reint_buf != NULL)
- PRESTO_FREE(fset->fset_reint_buf, 64 * 1024);
- PRESTO_FREE(fset, sizeof(*fset));
- }
- dput(dentry);
- out:
- return error;
-}
-
-static int izo_cleanup_fset(struct presto_file_set *fset)
-{
- int error;
- struct presto_cache *cache;
-
- ENTRY;
-
- CERROR("Cleaning up fset %s\n", fset->fset_name);
-
- error = izo_log_close(&fset->fset_kml);
- if (error)
- CERROR("InterMezzo: Closing kml for fset %s: %d\n",
- fset->fset_name, error);
- error = izo_log_close(&fset->fset_lml);
- if (error)
- CERROR("InterMezzo: Closing lml for fset %s: %d\n",
- fset->fset_name, error);
- error = izo_log_close(&fset->fset_rcvd);
- if (error)
- CERROR("InterMezzo: Closing last_rcvd for fset %s: %d\n",
- fset->fset_name, error);
-
- cache = fset->fset_cache;
-
- list_del(&fset->fset_list);
-
- presto_d2d(fset->fset_dentry)->dd_fset = NULL;
- dput(fset->fset_dentry);
- mntput(fset->fset_mnt);
-
- PRESTO_FREE(fset->fset_name, strlen(fset->fset_name) + 1);
- PRESTO_FREE(fset->fset_reint_buf, 64 * 1024);
- PRESTO_FREE(fset, sizeof(*fset));
- EXIT;
- return error;
-}
-
-int izo_clear_fsetroot(struct dentry *dentry)
-{
- struct presto_file_set *fset;
-
- ENTRY;
-
- fset = presto_dentry2fset(dentry);
- if (!fset) {
- EXIT;
- return -EINVAL;
- }
-
- izo_cleanup_fset(fset);
- EXIT;
- return 0;
-}
-
-int izo_clear_all_fsetroots(struct presto_cache *cache)
-{
- struct presto_file_set *fset;
- struct list_head *tmp,*tmpnext;
- int error;
-
- error = 0;
- tmp = &cache->cache_fset_list;
- tmpnext = tmp->next;
- while ( tmpnext != &cache->cache_fset_list) {
- tmp = tmpnext;
- tmpnext = tmp->next;
- fset = list_entry(tmp, struct presto_file_set, fset_list);
-
- error = izo_cleanup_fset(fset);
- if (error)
- break;
- }
- return error;
-}
-
-static struct vfsmount *izo_alloc_vfsmnt(void)
-{
- struct vfsmount *mnt;
- PRESTO_ALLOC(mnt, sizeof(*mnt));
- if (mnt) {
- memset(mnt, 0, sizeof(struct vfsmount));
- atomic_set(&mnt->mnt_count,1);
- INIT_LIST_HEAD(&mnt->mnt_hash);
- INIT_LIST_HEAD(&mnt->mnt_child);
- INIT_LIST_HEAD(&mnt->mnt_mounts);
- INIT_LIST_HEAD(&mnt->mnt_list);
- }
- return mnt;
-}
-
-
-static void izo_setup_ctxt(struct dentry *root, struct vfsmount *mnt,
- struct run_ctxt *save)
-{
- struct run_ctxt new;
-
- mnt->mnt_root = root;
- mnt->mnt_sb = root->d_inode->i_sb;
- unlock_super(mnt->mnt_sb);
-
- new.rootmnt = mnt;
- new.root = root;
- new.pwdmnt = mnt;
- new.pwd = root;
- new.fsuid = 0;
- new.fsgid = 0;
- new.fs = get_fs();
- /* XXX where can we get the groups from? */
- new.group_info = groups_alloc(0);
-
- push_ctxt(save, &new);
-}
-
-static void izo_cleanup_ctxt(struct vfsmount *mnt, struct run_ctxt *save)
-{
- lock_super(mnt->mnt_sb);
- pop_ctxt(save);
-}
-
-static int izo_simple_mkdir(struct dentry *dir, char *name, int mode)
-{
- struct dentry *dchild;
- int err;
- ENTRY;
-
- dchild = lookup_one_len(name, dir, strlen(name));
- if (IS_ERR(dchild)) {
- EXIT;
- return PTR_ERR(dchild);
- }
-
- if (dchild->d_inode) {
- dput(dchild);
- EXIT;
- return -EEXIST;
- }
-
- err = vfs_mkdir(dir->d_inode, dchild, mode);
- dput(dchild);
-
- EXIT;
- return err;
-}
-
-static int izo_simple_symlink(struct dentry *dir, char *name, char *tgt)
-{
- struct dentry *dchild;
- int err;
- ENTRY;
-
- dchild = lookup_one_len(name, dir, strlen(name));
- if (IS_ERR(dchild)) {
- EXIT;
- return PTR_ERR(dchild);
- }
-
- if (dchild->d_inode) {
- dput(dchild);
- EXIT;
- return -EEXIST;
- }
-
- err = vfs_symlink(dir->d_inode, dchild, tgt);
- dput(dchild);
-
- EXIT;
- return err;
-}
-
-/*
- * run set_fsetroot in chroot environment
- */
-int presto_set_fsetroot_from_ioc(struct dentry *root, char *fsetname,
- unsigned int flags)
-{
- int rc;
- struct presto_cache *cache;
- struct vfsmount *mnt;
- struct run_ctxt save;
-
- if (root != root->d_inode->i_sb->s_root) {
- CERROR ("IOC_SET_FSET must be called on mount point\n");
- return -ENODEV;
- }
-
- cache = presto_get_cache(root->d_inode);
- mnt = cache->cache_vfsmount;
- if (!mnt) {
- EXIT;
- return -ENOMEM;
- }
-
- izo_setup_ctxt(root, mnt, &save);
- rc = presto_set_fsetroot(root, fsetname, flags);
- izo_cleanup_ctxt(mnt, &save);
- return rc;
-}
-
-/* XXX: this function should detect if fsetname is already in use for
- the cache under root
-*/
-int izo_prepare_fileset(struct dentry *root, char *fsetname)
-{
- int err;
- struct dentry *dotizo = NULL, *fsetdir = NULL, *dotiopen = NULL;
- struct presto_cache *cache;
- struct vfsmount *mnt;
- struct run_ctxt save;
-
- cache = presto_get_cache(root->d_inode);
- mnt = cache->cache_vfsmount = izo_alloc_vfsmnt();
- if (!mnt) {
- EXIT;
- return -ENOMEM;
- }
-
- if (!fsetname)
- fsetname = "rootfset";
-
- izo_setup_ctxt(root, mnt, &save);
-
- err = izo_simple_mkdir(root, ".intermezzo", 0755);
- CDEBUG(D_CACHE, "mkdir on .intermezzo err %d\n", err);
-
- err = izo_simple_mkdir(root, "..iopen..", 0755);
- CDEBUG(D_CACHE, "mkdir on ..iopen.. err %d\n", err);
-
- dotiopen = lookup_one_len("..iopen..", root, strlen("..iopen.."));
- if (IS_ERR(dotiopen)) {
- EXIT;
- goto out;
- }
- dotiopen->d_inode->i_op = &presto_dir_iops;
- dput(dotiopen);
-
-
- dotizo = lookup_one_len(".intermezzo", root, strlen(".intermezzo"));
- if (IS_ERR(dotizo)) {
- EXIT;
- goto out;
- }
-
-
- err = izo_simple_mkdir(dotizo, fsetname, 0755);
- CDEBUG(D_CACHE, "mkdir err %d\n", err);
-
- /* XXX find the dentry of the root of the fileset (root for now) */
- fsetdir = lookup_one_len(fsetname, dotizo, strlen(fsetname));
- if (IS_ERR(fsetdir)) {
- EXIT;
- goto out;
- }
-
- err = izo_simple_symlink(fsetdir, "ROOT", "../..");
-
- /* XXX read flags from flags file */
- err = presto_set_fsetroot(root, fsetname, 0);
- CDEBUG(D_CACHE, "set_fsetroot err %d\n", err);
-
- out:
- if (dotizo && !IS_ERR(dotizo))
- dput(dotizo);
- if (fsetdir && !IS_ERR(fsetdir))
- dput(fsetdir);
- izo_cleanup_ctxt(mnt, &save);
- return err;
-}
-
-int izo_set_fileid(struct file *dir, struct izo_ioctl_data *data)
-{
- int rc = 0;
- struct presto_cache *cache;
- struct vfsmount *mnt;
- struct run_ctxt save;
- struct nameidata nd;
- struct dentry *dentry;
- struct presto_dentry_data *dd;
- struct dentry *root;
- char *buf = NULL;
-
- ENTRY;
-
-
- root = dir->f_dentry;
-
- /* actually, needs to be called on ROOT of fset, not mount point
- if (root != root->d_inode->i_sb->s_root) {
- CERROR ("IOC_SET_FSET must be called on mount point\n");
- return -ENODEV;
- }
- */
-
- cache = presto_get_cache(root->d_inode);
- mnt = cache->cache_vfsmount;
- if (!mnt) {
- EXIT;
- return -ENOMEM;
- }
-
- izo_setup_ctxt(root, mnt, &save);
-
- PRESTO_ALLOC(buf, data->ioc_plen1);
- if (!buf) {
- rc = -ENOMEM;
- EXIT;
- goto out;
- }
- if (copy_from_user(buf, data->ioc_pbuf1, data->ioc_plen1)) {
- rc = -EFAULT;
- EXIT;
- goto out;
- }
-
- rc = presto_walk(buf, &nd);
- if (rc) {
- CERROR("Unable to open: %s\n", buf);
- EXIT;
- goto out;
- }
- dentry = nd.dentry;
- if (!dentry) {
- CERROR("no dentry!\n");
- rc = -EINVAL;
- EXIT;
- goto out_close;
- }
- dd = presto_d2d(dentry);
- if (!dd) {
- CERROR("no dentry_data!\n");
- rc = -EINVAL;
- EXIT;
- goto out_close;
- }
-
- CDEBUG(D_FILE,"de:%p dd:%p\n", dentry, dd);
-
- if (dd->remote_ino != 0) {
- CERROR("remote_ino already set? %Lx:%Lx\n",
- (unsigned long long) dd->remote_ino,
- (unsigned long long) dd->remote_generation);
- rc = 0;
- EXIT;
- goto out_close;
- }
-
-
- CDEBUG(D_FILE,"setting %p %p, %s to %Lx:%Lx\n", dentry, dd,
- buf,
- (unsigned long long) data->ioc_ino,
- (unsigned long long) data->ioc_generation);
- dd->remote_ino = data->ioc_ino;
- dd->remote_generation = data->ioc_generation;
-
- EXIT;
- out_close:
- path_release(&nd);
- out:
- if (buf)
- PRESTO_FREE(buf, data->ioc_plen1);
- izo_cleanup_ctxt(mnt, &save);
- return rc;
-}
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 1996 Peter J. Braam <braam@maths.ox.ac.uk> and
- * Michael Callahan <callahan@maths.ox.ac.uk>
- * Copyright (C) 1999 Carnegie Mellon University
- * Rewritten for Linux 2.1. Peter Braam <braam@cs.cmu.edu>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Super block/filesystem wide operations
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/string.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <linux/unistd.h>
-
-#include <asm/system.h>
-#include <asm/uaccess.h>
-
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <asm/segment.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-extern void presto_free_cache(struct presto_cache *);
-
-void presto_set_ops(struct inode *inode, struct filter_fs *filter)
-{
- ENTRY;
-
- if (!inode || is_bad_inode(inode))
- return;
-
- if (S_ISREG(inode->i_mode)) {
- if ( !filter_c2cfiops(filter) ) {
- filter_setup_file_ops(filter,
- inode, &presto_file_iops,
- &presto_file_fops);
- }
- inode->i_op = filter_c2ufiops(filter);
- inode->i_fop = filter_c2uffops(filter);
- CDEBUG(D_INODE, "set file methods for %ld to %p\n",
- inode->i_ino, inode->i_op);
- } else if (S_ISDIR(inode->i_mode)) {
- inode->i_op = filter_c2udiops(filter);
- inode->i_fop = filter_c2udfops(filter);
- CDEBUG(D_INODE, "set dir methods for %ld to %p ioctl %p\n",
- inode->i_ino, inode->i_op, inode->i_fop->ioctl);
- } else if (S_ISLNK(inode->i_mode)) {
- if ( !filter_c2csiops(filter)) {
- filter_setup_symlink_ops(filter,
- inode,
- &presto_sym_iops,
- &presto_sym_fops);
- }
- inode->i_op = filter_c2usiops(filter);
- inode->i_fop = filter_c2usfops(filter);
- CDEBUG(D_INODE, "set link methods for %ld to %p\n",
- inode->i_ino, inode->i_op);
- }
- EXIT;
-}
-
-void presto_read_inode(struct inode *inode)
-{
- struct presto_cache *cache;
-
- cache = presto_get_cache(inode);
- if ( !cache ) {
- CERROR("PRESTO: BAD, BAD: cannot find cache\n");
- make_bad_inode(inode);
- return ;
- }
-
- filter_c2csops(cache->cache_filter)->read_inode(inode);
-
- CDEBUG(D_INODE, "presto_read_inode: ino %ld, gid %d\n",
- inode->i_ino, inode->i_gid);
-
- presto_set_ops(inode, cache->cache_filter);
- /* XXX handle special inodes here or not - probably not? */
-}
-
-static void presto_put_super(struct super_block *sb)
-{
- struct presto_cache *cache;
- struct upc_channel *channel;
- struct super_operations *sops;
- struct list_head *lh;
- int err;
-
- ENTRY;
- cache = presto_cache_find(sb);
- if (!cache) {
- EXIT;
- goto exit;
- }
- channel = &izo_channels[presto_c2m(cache)];
- sops = filter_c2csops(cache->cache_filter);
- err = izo_clear_all_fsetroots(cache);
- if (err) {
- CERROR("%s: err %d\n", __FUNCTION__, err);
- }
- PRESTO_FREE(cache->cache_vfsmount, sizeof(struct vfsmount));
-
- /* look at kill_super - fsync_super is not exported GRRR but
- probably not needed */
- unlock_super(sb);
- shrink_dcache_parent(cache->cache_root);
- dput(cache->cache_root);
- //fsync_super(sb);
- lock_super(sb);
-
- if (sops->write_super)
- sops->write_super(sb);
-
- if (sops->put_super)
- sops->put_super(sb);
-
- /* free any remaining async upcalls when the filesystem is unmounted */
- spin_lock(&channel->uc_lock);
- lh = channel->uc_pending.next;
- while ( lh != &channel->uc_pending) {
- struct upc_req *req;
- req = list_entry(lh, struct upc_req, rq_chain);
-
- /* assignment must be here: we are about to free &lh */
- lh = lh->next;
- if ( ! (req->rq_flags & REQ_ASYNC) )
- continue;
- list_del(&(req->rq_chain));
- PRESTO_FREE(req->rq_data, req->rq_bufsize);
- PRESTO_FREE(req, sizeof(struct upc_req));
- }
- list_del(&cache->cache_channel_list);
- spin_unlock(&channel->uc_lock);
-
- presto_free_cache(cache);
-
-exit:
- CDEBUG(D_MALLOC, "after umount: kmem %ld, vmem %ld\n",
- presto_kmemory, presto_vmemory);
- return ;
-}
-
-struct super_operations presto_super_ops = {
- .read_inode = presto_read_inode,
- .put_super = presto_put_super,
-};
-
-
-/* symlinks can be chowned */
-struct inode_operations presto_sym_iops = {
- .setattr = presto_setattr
-};
-
-/* NULL for now */
-struct file_operations presto_sym_fops;
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2001, 2002 Cluster File Systems, Inc.
- * Copyright (C) 2001 Tacitus Systems, Inc.
- * Copyright (C) 2000 Stelias Computing, Inc.
- * Copyright (C) 2000 Red Hat, Inc.
- * Copyright (C) 2000 TurboLinux, Inc.
- * Copyright (C) 2000 Los Alamos National Laboratory.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __INTERMEZZO_FS_H_
-#define __INTERMEZZO_FS_H_ 1
-
-#include "intermezzo_lib.h"
-#include "intermezzo_idl.h"
-
-
-#ifdef __KERNEL__
-typedef __u8 uuid_t[16];
-#else
-# include <uuid/uuid.h>
-#endif
-
-struct lento_vfs_context {
- __u64 kml_offset;
- struct timespec updated_time;
- __u64 remote_ino;
- __u64 remote_generation;
- __u32 slot_offset;
- __u32 recno;
- __u32 flags;
- uuid_t uuid;
- struct presto_version remote_version;
-};
-
-#ifdef __KERNEL__
-# include <linux/smp.h>
-# include <linux/fsfilter.h>
-# include <linux/mount.h>
-# include <linux/slab.h>
-# include <linux/vmalloc.h>
-# include <linux/smp_lock.h>
-
-/* fixups for fs.h */
-# ifndef fs_down
-# define fs_down(sem) down(sem)
-# endif
-
-# ifndef fs_up
-# define fs_up(sem) up(sem)
-# endif
-
-# define KML_IDLE 0
-# define KML_DECODE 1
-# define KML_OPTIMIZE 2
-# define KML_REINT 3
-
-# define KML_OPEN_REINT 0x0100
-# define KML_REINT_BEGIN 0x0200
-# define KML_BACKFETCH 0x0400
-# define KML_REINT_END 0x0800
-# define KML_CLOSE_REINT 0x1000
-# define KML_REINT_MAXBUF (64 * 1024)
-
-# define CACHE_CLIENT_RO 0x4
-# define CACHE_LENTO_RO 0x8
-
-/* global variables */
-extern int presto_debug;
-extern int presto_print_entry;
-extern long presto_kmemory;
-extern long presto_vmemory;
-
-# define PRESTO_DEBUG
-# ifdef PRESTO_DEBUG
-/* debugging masks */
-# define D_SUPER 1
-# define D_INODE 2
-# define D_FILE 4
-# define D_CACHE 8 /* cache debugging */
-# define D_MALLOC 16 /* print malloc, de-alloc information */
-# define D_JOURNAL 32
-# define D_UPCALL 64 /* up and downcall debugging */
-# define D_PSDEV 128
-# define D_PIOCTL 256
-# define D_SPECIAL 512
-# define D_TIMING 1024
-# define D_DOWNCALL 2048
-# define D_KML 4096
-# define D_FSDATA 8192
-
-# define CDEBUG(mask, format, a...) \
- do { \
- if (presto_debug & mask) { \
- printk("(%s:%s,l. %d %d): " format, __FILE__, \
- __FUNCTION__, __LINE__, current->pid \
- , ## a); \
- } \
- } while (0)
-
-#define CERROR(format, a...) \
-do { \
- printk("(%s:%s,l. %d %d): " format, __FILE__, __FUNCTION__, \
- __LINE__, current->pid , ## a); \
-} while (0)
-
-# define ENTRY \
- if (presto_print_entry) \
- printk("Process %d entered %s\n", current->pid, __FUNCTION__)
-
-# define EXIT \
- if (presto_print_entry) \
- printk("Process %d leaving %s at %d\n", current->pid, \
- __FUNCTION__, __LINE__)
-
-# define presto_kmem_inc(ptr, size) presto_kmemory += (size)
-# define presto_kmem_dec(ptr, size) presto_kmemory -= (size)
-# define presto_vmem_inc(ptr, size) presto_vmemory += (size)
-# define presto_vmem_dec(ptr, size) presto_vmemory -= (size)
-# else /* !PRESTO_DEBUG */
-# define CDEBUG(mask, format, a...) do {} while (0)
-# define ENTRY do {} while (0)
-# define EXIT do {} while (0)
-# define presto_kmem_inc(ptr, size) do {} while (0)
-# define presto_kmem_dec(ptr, size) do {} while (0)
-# define presto_vmem_inc(ptr, size) do {} while (0)
-# define presto_vmem_dec(ptr, size) do {} while (0)
-# endif /* PRESTO_DEBUG */
-
-
-struct run_ctxt {
- struct vfsmount *pwdmnt;
- struct dentry *pwd;
- struct vfsmount *rootmnt;
- struct dentry *root;
- uid_t fsuid;
- gid_t fsgid;
- mm_segment_t fs;
- struct group_info * group_info;
-/* int ngroups;
- gid_t groups[NGROUPS];*/
-
-};
-
-static inline void push_ctxt(struct run_ctxt *save, struct run_ctxt *new)
-{
- save->fs = get_fs();
- save->pwd = dget(current->fs->pwd);
- save->pwdmnt = mntget(current->fs->pwdmnt);
- save->fsgid = current->fsgid;
- save->fsuid = current->fsuid;
- save->root = current->fs->root;
- save->rootmnt = current->fs->rootmnt;
- save->group_info = current->group_info;
-/* save->ngroups = current->ngroups;
- for (i = 0; i< current->ngroups; i++)
- save->groups[i] = current->groups[i];*/
-
- set_fs(new->fs);
- lock_kernel();
- set_fs_pwd(current->fs, new->pwdmnt, new->pwd);
- if (new->root)
- set_fs_root(current->fs, new->rootmnt, new->root);
- unlock_kernel();
- current->fsuid = new->fsuid;
- current->fsgid = new->fsgid;
- /*if (new->ngroups > 0) {
- current->ngroups = new->ngroups;
- for (i = 0; i< new->ngroups; i++)
- current->groups[i] = new->groups[i];
- }*/
- current->group_info = new->group_info;
-
-}
-
-static inline void pop_ctxt(struct run_ctxt *saved)
-{
- set_fs(saved->fs);
- lock_kernel();
- set_fs_pwd(current->fs, saved->pwdmnt, saved->pwd);
- if (saved->root)
- set_fs_root(current->fs, saved->rootmnt, saved->root);
- unlock_kernel();
- current->fsuid = saved->fsuid;
- current->fsgid = saved->fsgid;
- current->group_info = saved->group_info;
-/*
- current->ngroups = saved->ngroups;
- for (i = 0; i< saved->ngroups; i++)
- current->groups[i] = saved->groups[i];
-*/
- mntput(saved->pwdmnt);
- dput(saved->pwd);
-}
-
-static inline struct presto_dentry_data *presto_d2d(struct dentry *dentry)
-{
- return (struct presto_dentry_data *)(dentry->d_fsdata);
-}
-
-struct presto_cache {
- spinlock_t cache_lock;
- loff_t cache_reserved;
- struct vfsmount *cache_vfsmount;
- struct super_block *cache_sb;
- struct dentry *cache_root;
- struct list_head cache_chain; /* for the dev/cache hash */
-
- int cache_flags;
-
- char *cache_type; /* filesystem type of cache */
- struct filter_fs *cache_filter;
-
- struct upc_channel *cache_psdev; /* points to channel used */
- struct list_head cache_channel_list;
- struct list_head cache_fset_list; /* filesets mounted in cache */
-};
-
-struct presto_log_fd {
- rwlock_t fd_lock;
- loff_t fd_offset; /* offset where next record should go */
- struct file *fd_file;
- int fd_truncating;
- unsigned int fd_recno; /* last recno written */
- struct list_head fd_reservations;
-};
-
-/* file sets */
-# define CHUNK_BITS 16
-
-struct presto_file_set {
- struct list_head fset_list;
- struct presto_log_fd fset_kml;
- struct presto_log_fd fset_lml;
- struct presto_log_fd fset_rcvd;
- struct list_head *fset_clients; /* cache of clients */
- struct dentry *fset_dentry;
- struct vfsmount *fset_mnt;
- struct presto_cache *fset_cache;
-
- unsigned int fset_lento_recno; /* last recno mentioned to lento */
- loff_t fset_lento_off; /* last offset mentioned to lento */
- loff_t fset_kml_logical_off; /* logical offset of kml file byte 0 */
- char * fset_name;
-
- int fset_flags;
- int fset_chunkbits;
- char *fset_reint_buf; /* temporary buffer holds kml during reint */
-
- spinlock_t fset_permit_lock;
- int fset_permit_count;
- int fset_permit_upcall_count;
- /* This queue is used both for processes waiting for the kernel to give
- * up the permit as well as processes waiting for the kernel to be given
- * the permit, depending on the state of FSET_HASPERMIT. */
- wait_queue_head_t fset_permit_queue;
-
- loff_t fset_file_maxio; /* writing more than this causes a close */
- unsigned long int kml_truncate_size;
-};
-
-/* This is the default number of bytes written before a close is recorded*/
-#define FSET_DEFAULT_MAX_FILEIO (1024<<10)
-
-struct dentry *presto_tmpfs_ilookup(struct inode *dir, struct dentry *dentry,
- ino_t ino, unsigned int generation);
-struct dentry *presto_iget_ilookup(struct inode *dir, struct dentry *dentry,
- ino_t ino, unsigned int generation);
-struct dentry *presto_add_ilookup_dentry(struct dentry *parent,
- struct dentry *real);
-
-struct journal_ops {
- int (*tr_all_data)(struct inode *);
- loff_t (*tr_avail)(struct presto_cache *fset, struct super_block *);
- void *(*tr_start)(struct presto_file_set *, struct inode *, int op);
- void (*tr_commit)(struct presto_file_set *, void *handle);
- void (*tr_journal_data)(struct inode *);
- struct dentry *(*tr_ilookup)(struct inode *dir, struct dentry *dentry, ino_t ino, unsigned int generation);
- struct dentry *(*tr_add_ilookup)(struct dentry *parent, struct dentry *real);
-};
-
-extern struct journal_ops presto_ext2_journal_ops;
-extern struct journal_ops presto_ext3_journal_ops;
-extern struct journal_ops presto_tmpfs_journal_ops;
-extern struct journal_ops presto_xfs_journal_ops;
-extern struct journal_ops presto_reiserfs_journal_ops;
-extern struct journal_ops presto_obdfs_journal_ops;
-
-# define LENTO_FL_KML 0x0001
-# define LENTO_FL_EXPECT 0x0002
-# define LENTO_FL_VFSCHECK 0x0004
-# define LENTO_FL_JUSTLOG 0x0008
-# define LENTO_FL_WRITE_KML 0x0010
-# define LENTO_FL_CANCEL_LML 0x0020
-# define LENTO_FL_WRITE_EXPECT 0x0040
-# define LENTO_FL_IGNORE_TIME 0x0080
-# define LENTO_FL_TOUCH_PARENT 0x0100
-# define LENTO_FL_TOUCH_NEWOBJ 0x0200
-# define LENTO_FL_SET_DDFILEID 0x0400
-
-struct presto_cache *presto_get_cache(struct inode *inode);
-int presto_sprint_mounts(char *buf, int buflen, int minor);
-struct presto_file_set *presto_fset(struct dentry *de);
-int presto_journal(struct dentry *dentry, char *buf, size_t size);
-int presto_fwrite(struct file *file, const char *str, int len, loff_t *off);
-int presto_ispresto(struct inode *);
-
-/* super.c */
-extern struct file_system_type presto_fs_type;
-extern int init_intermezzo_fs(void);
-
-/* fileset.c */
-extern int izo_prepare_fileset(struct dentry *root, char *fsetname);
-char * izo_make_path(struct presto_file_set *fset, char *name);
-struct file *izo_fset_open(struct presto_file_set *fset, char *name, int flags, int mode);
-
-/* psdev.c */
-int izo_psdev_get_free_channel(void);
-int presto_psdev_init(void);
-int izo_psdev_setpid(int minor);
-extern void presto_psdev_cleanup(void);
-int presto_lento_up(int minor);
-int izo_psdev_setchannel(struct file *file, int fd);
-
-/* inode.c */
-extern struct super_operations presto_super_ops;
-void presto_set_ops(struct inode *inode, struct filter_fs *filter);
-
-/* dcache.c */
-void presto_frob_dop(struct dentry *de);
-char *presto_path(struct dentry *dentry, struct dentry *root,
- char *buffer, int buflen);
-struct presto_dentry_data *izo_alloc_ddata(void);
-int presto_set_dd(struct dentry *);
-int presto_init_ddata_cache(void);
-void presto_cleanup_ddata_cache(void);
-extern struct dentry_operations presto_dentry_ops;
-
-/* dir.c */
-extern struct inode_operations presto_dir_iops;
-extern struct inode_operations presto_file_iops;
-extern struct inode_operations presto_sym_iops;
-extern struct file_operations presto_dir_fops;
-extern struct file_operations presto_file_fops;
-extern struct file_operations presto_sym_fops;
-int presto_setattr(struct dentry *de, struct iattr *iattr);
-int presto_settime(struct presto_file_set *fset, struct dentry *newobj,
- struct dentry *parent, struct dentry *target,
- struct lento_vfs_context *ctx, int valid);
-int presto_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg);
-
-extern int presto_ilookup_uid;
-# define PRESTO_ILOOKUP_MAGIC "...ino:"
-# define PRESTO_ILOOKUP_SEP ':'
-int izo_dentry_is_ilookup(struct dentry *, ino_t *id, unsigned int *generation);
-struct dentry *presto_lookup(struct inode * dir, struct dentry *dentry, struct nameidata *nd);
-
-struct presto_dentry_data {
- int dd_count; /* how mnay dentries are using this dentry */
- struct presto_file_set *dd_fset;
- struct dentry *dd_inodentry;
- loff_t dd_kml_offset;
- int dd_flags;
- __u64 remote_ino;
- __u64 remote_generation;
-};
-
-struct presto_file_data {
- int fd_do_lml;
- loff_t fd_lml_offset;
- size_t fd_bytes_written;
- /* authorization related data of file at open time */
- uid_t fd_uid;
- gid_t fd_gid;
- mode_t fd_mode;
- /* identification data of calling process */
- uid_t fd_fsuid;
- gid_t fd_fsgid;
- int fd_ngroups;
- gid_t fd_groups[NGROUPS_SMALL];
- /* information how to complete the close operation */
- struct lento_vfs_context fd_info;
- struct presto_version fd_version;
-};
-
-/* presto.c and Lento::Downcall */
-
-int presto_walk(const char *name, struct nameidata *nd);
-int izo_clear_fsetroot(struct dentry *dentry);
-int izo_clear_all_fsetroots(struct presto_cache *cache);
-int presto_get_kmlsize(char *path, __u64 *size);
-int presto_get_lastrecno(char *path, off_t *size);
-int presto_set_fsetroot(struct dentry *dentry, char *fsetname,
- unsigned int flags);
-int presto_set_fsetroot_from_ioc(struct dentry *dentry, char *fsetname,
- unsigned int flags);
-int presto_is_read_only(struct presto_file_set *);
-int presto_truncate_lml(struct presto_file_set *fset);
-int lento_write_lml(char *path,
- __u64 remote_ino,
- __u32 remote_generation,
- __u32 remote_version,
- struct presto_version *remote_file_version);
-int lento_complete_closes(char *path);
-int presto_f2m(struct presto_file_set *fset);
-int presto_prep(struct dentry *, struct presto_cache **,
- struct presto_file_set **);
-/* cache.c */
-extern struct presto_cache *presto_cache_init(void);
-extern void presto_cache_add(struct presto_cache *cache);
-extern void presto_cache_init_hash(void);
-
-struct presto_cache *presto_cache_find(struct super_block *sb);
-
-#define PRESTO_REQLOW (3 * 4096)
-#define PRESTO_REQHIGH (6 * 4096)
-void presto_release_space(struct presto_cache *cache, loff_t req);
-int presto_reserve_space(struct presto_cache *cache, loff_t req);
-
-#define PRESTO_DATA 0x00000002 /* cached data is valid */
-#define PRESTO_ATTR 0x00000004 /* attributes cached */
-#define PRESTO_DONT_JOURNAL 0x00000008 /* things like .intermezzo/ */
-
-struct presto_file_set *presto_path2fileset(const char *name);
-int izo_revoke_permit(struct dentry *, uuid_t uuid);
-int presto_chk(struct dentry *dentry, int flag);
-void presto_set(struct dentry *dentry, int flag);
-int presto_get_permit(struct inode *inode);
-int presto_put_permit(struct inode *inode);
-int presto_set_max_kml_size(const char *path, unsigned long max_size);
-int izo_mark_dentry(struct dentry *dentry, int and, int or, int *res);
-int izo_mark_cache(struct dentry *dentry, int and_bits, int or_bits, int *);
-int izo_mark_fset(struct dentry *dentry, int and_bits, int or_bits, int *);
-void presto_getversion(struct presto_version *pv, struct inode *inode);
-int presto_i2m(struct inode *inode);
-int presto_c2m(struct presto_cache *cache);
-
-
-/* file.c */
-int izo_purge_file(struct presto_file_set *fset, char *file);
-int presto_adjust_lml(struct file *file, struct lento_vfs_context *info);
-
-/* journal.c */
-struct rec_info {
- loff_t offset;
- int size;
- int recno;
- int is_kml;
-};
-
-void presto_trans_commit(struct presto_file_set *fset, void *handle);
-void *presto_trans_start(struct presto_file_set *fset, struct inode *inode,
- int op);
-int presto_fread(struct file *file, char *str, int len, loff_t *off);
-int presto_clear_lml_close(struct presto_file_set *fset,
- loff_t lml_offset);
-int presto_complete_lml(struct presto_file_set *fset);
-int presto_read_kml_logical_offset(struct rec_info *recinfo,
- struct presto_file_set *fset);
-int presto_write_kml_logical_offset(struct presto_file_set *fset);
-struct file *presto_copy_kml_tail(struct presto_file_set *fset,
- unsigned long int start);
-int presto_finish_kml_truncate(struct presto_file_set *fset,
- unsigned long int offset);
-int izo_lookup_file(struct presto_file_set *fset, char *path,
- struct nameidata *nd);
-int izo_do_truncate(struct presto_file_set *fset, struct dentry *dentry,
- loff_t length, loff_t size_check);
-int izo_log_close(struct presto_log_fd *logfd);
-struct file *izo_log_open(struct presto_file_set *fset, char *name, int flags);
-int izo_init_kml_file(struct presto_file_set *, struct presto_log_fd *);
-int izo_init_lml_file(struct presto_file_set *, struct presto_log_fd *);
-int izo_init_last_rcvd_file(struct presto_file_set *, struct presto_log_fd *);
-
-/* vfs.c */
-
-/* Extra data needed in the KML for rollback operations; this structure is
- * passed around during the KML-writing process. */
-struct izo_rollback_data {
- __u32 rb_mode;
- __u32 rb_rdev;
- __u64 rb_uid;
- __u64 rb_gid;
-};
-
-int presto_write_last_rcvd(struct rec_info *recinfo,
- struct presto_file_set *fset,
- struct lento_vfs_context *info);
-void izo_get_rollback_data(struct inode *inode, struct izo_rollback_data *rb);
-int presto_do_close(struct presto_file_set *fset, struct file *file);
-int presto_do_setattr(struct presto_file_set *fset, struct dentry *dentry,
- struct iattr *iattr, struct lento_vfs_context *info);
-int presto_do_create(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, int mode,
- struct lento_vfs_context *info);
-int presto_do_link(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *old_dentry, struct dentry *new_dentry,
- struct lento_vfs_context *info);
-int presto_do_unlink(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, struct lento_vfs_context *info);
-int presto_do_symlink(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, const char *name,
- struct lento_vfs_context *info);
-int presto_do_mkdir(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, int mode,
- struct lento_vfs_context *info);
-int presto_do_rmdir(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, struct lento_vfs_context *info);
-int presto_do_mknod(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, int mode, dev_t dev,
- struct lento_vfs_context *info);
-int do_rename(struct presto_file_set *fset, struct dentry *old_dir,
- struct dentry *old_dentry, struct dentry *new_dir,
- struct dentry *new_dentry, struct lento_vfs_context *info);
-int presto_do_statfs (struct presto_file_set *fset,
- struct kstatfs * buf);
-
-int lento_setattr(const char *name, struct iattr *iattr,
- struct lento_vfs_context *info);
-int lento_create(const char *name, int mode, struct lento_vfs_context *info);
-int lento_link(const char *oldname, const char *newname,
- struct lento_vfs_context *info);
-int lento_unlink(const char *name, struct lento_vfs_context *info);
-int lento_symlink(const char *oldname,const char *newname,
- struct lento_vfs_context *info);
-int lento_mkdir(const char *name, int mode, struct lento_vfs_context *info);
-int lento_rmdir(const char *name, struct lento_vfs_context *info);
-int lento_mknod(const char *name, int mode, dev_t dev,
- struct lento_vfs_context *info);
-int lento_rename(const char *oldname, const char *newname,
- struct lento_vfs_context *info);
-int lento_iopen(const char *name, ino_t ino, unsigned int generation,int flags);
-
-/* journal.c */
-
-#define JOURNAL_PAGE_SZ PAGE_SIZE
-
-int presto_no_journal(struct presto_file_set *fset);
-int journal_fetch(int minor);
-int presto_log(struct presto_file_set *fset, struct rec_info *rec,
- const char *buf, size_t size,
- const char *string1, int len1,
- const char *string2, int len2,
- const char *string3, int len3);
-int presto_get_fileid(int minor, struct presto_file_set *fset,
- struct dentry *dentry);
-int presto_journal_setattr(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dentry, struct presto_version *old_ver,
- struct izo_rollback_data *, struct iattr *iattr);
-int presto_journal_create(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dentry,
- struct presto_version *tgt_dir_ver,
- struct presto_version *new_file_ver, int mode);
-int presto_journal_link(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *src, struct dentry *tgt,
- struct presto_version *tgt_dir_ver,
- struct presto_version *new_link_ver);
-int presto_journal_unlink(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dir,
- struct presto_version *tgt_dir_ver,
- struct presto_version *old_file_ver,
- struct izo_rollback_data *, struct dentry *dentry,
- char *old_target, int old_targetlen);
-int presto_journal_symlink(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dentry, const char *target,
- struct presto_version *tgt_dir_ver,
- struct presto_version *new_link_ver);
-int presto_journal_mkdir(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dentry,
- struct presto_version *tgt_dir_ver,
- struct presto_version *new_dir_ver, int mode);
-int presto_journal_rmdir(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dentry,
- struct presto_version *tgt_dir_ver,
- struct presto_version *old_dir_ver,
- struct izo_rollback_data *, int len, const char *name);
-int presto_journal_mknod(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dentry,
- struct presto_version *tgt_dir_ver,
- struct presto_version *new_node_ver, int mode,
- int dmajor, int dminor);
-int presto_journal_rename(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *src, struct dentry *tgt,
- struct presto_version *src_dir_ver,
- struct presto_version *tgt_dir_ver);
-int presto_journal_open(struct rec_info *, struct presto_file_set *,
- struct dentry *, struct presto_version *old_ver);
-int presto_journal_close(struct rec_info *rec, struct presto_file_set *,
- struct presto_file_data *, struct dentry *,
- struct presto_version *old_file_ver,
- struct presto_version *new_file_ver);
-int presto_write_lml_close(struct rec_info *rec,
- struct presto_file_set *fset,
- struct file *file,
- __u64 remote_ino,
- __u64 remote_generation,
- struct presto_version *remote_version,
- struct presto_version *new_file_ver);
-void presto_log_op(void *data, int len);
-loff_t presto_kml_offset(struct presto_file_set *fset);
-
-/* upcall.c */
-#define SYNCHRONOUS 0
-#define ASYNCHRONOUS 1
-/* asynchronous calls */
-int izo_upc_kml(int minor, __u64 offset, __u32 first_recno, __u64 length,
- __u32 last_recno, char *fsetname);
-int izo_upc_kml_truncate(int minor, __u64 length, __u32 last_recno,
- char *fsetname);
-int izo_upc_go_fetch_kml(int minor, char *fsetname, uuid_t uuid, __u64 kmlsize);
-int izo_upc_backfetch(int minor, char *path, char *fileset,
- struct lento_vfs_context *);
-
-/* synchronous calls */
-int izo_upc_get_fileid(int minor, __u32 reclen, char *rec,
- __u32 pathlen, char *path, char *fsetname);
-int izo_upc_permit(int minor, struct dentry *, __u32 pathlen, char *path,
- char *fset);
-int izo_upc_open(int minor, __u32 pathlen, char *path, char *fsetname,
- struct lento_vfs_context *info);
-int izo_upc_connect(int minor, __u64 ip_address, __u64 port, __u8 uuid[16],
- int client_flag);
-int izo_upc_revoke_permit(int minor, char *fsetname, uuid_t uuid);
-int izo_upc_set_kmlsize(int minor, char *fsetname, uuid_t uuid, __u64 kmlsize);
-int izo_upc_client_make_branch(int minor, char *fsetname);
-int izo_upc_server_make_branch(int minor, char *fsetname);
-int izo_upc_branch_undo(int minor, char *fsetname, char *branchname);
-int izo_upc_branch_redo(int minor, char *fsetname, char *branchname);
-int izo_upc_repstatus(int minor, char * fsetname, struct izo_rcvd_rec *lr_server);
-
-/* general mechanism */
-int izo_upc_upcall(int minor, int *size, struct izo_upcall_hdr *, int async);
-
-/* replicator.c */
-int izo_repstatus(struct presto_file_set *fset, __u64 client_kmlsize,
- struct izo_rcvd_rec *lr_client, struct izo_rcvd_rec *lr_server);
-int izo_rep_cache_init(struct presto_file_set *);
-loff_t izo_rcvd_get(struct izo_rcvd_rec *, struct presto_file_set *, char *uuid);
-loff_t izo_rcvd_write(struct presto_file_set *, struct izo_rcvd_rec *);
-loff_t izo_rcvd_upd_remote(struct presto_file_set *fset, char * uuid, __u64 remote_recno,
- __u64 remote_offset);
-
-int izo_ioctl_packlen(struct izo_ioctl_data *data);
-
-/* sysctl.c */
-int init_intermezzo_sysctl(void);
-void cleanup_intermezzo_sysctl(void);
-
-/* ext_attr.c */
-/* We will be more tolerant than the default ea patch with attr name sizes and
- * the size of value. If these come via VFS from the default ea patches, the
- * corresponding character strings will be truncated anyway. During journalling- * we journal length for both name and value. See journal_set_ext_attr.
- */
-#define PRESTO_EXT_ATTR_NAME_MAX 128
-#define PRESTO_EXT_ATTR_VALUE_MAX 8192
-
-#define PRESTO_ALLOC(ptr, size) \
-do { \
- long s = (size); \
- (ptr) = kmalloc(s, GFP_KERNEL); \
- if ((ptr) == NULL) \
- CERROR("IZO: out of memory at %s:%d (trying to " \
- "allocate %ld)\n", __FILE__, __LINE__, s); \
- else { \
- presto_kmem_inc((ptr), s); \
- memset((ptr), 0, s); \
- } \
- CDEBUG(D_MALLOC, "kmalloced: %ld at %p (tot %ld).\n", \
- s, (ptr), presto_kmemory); \
-} while (0)
-
-#define PRESTO_FREE(ptr, size) \
-do { \
- long s = (size); \
- if ((ptr) == NULL) { \
- CERROR("IZO: free NULL pointer (%ld bytes) at " \
- "%s:%d\n", s, __FILE__, __LINE__); \
- break; \
- } \
- kfree(ptr); \
- CDEBUG(D_MALLOC, "kfreed: %ld at %p (tot %ld).\n", \
- s, (ptr), presto_kmemory); \
- presto_kmem_dec((ptr), s); \
-} while (0)
-
-static inline int dentry_name_cmp(struct dentry *dentry, char *name)
-{
- return (strlen(name) == dentry->d_name.len &&
- memcmp(name, dentry->d_name.name, dentry->d_name.len) == 0);
-}
-
-static inline char *strdup(char *str)
-{
- char *tmp;
- tmp = kmalloc(strlen(str) + 1, GFP_KERNEL);
- if (tmp)
- memcpy(tmp, str, strlen(str) + 1);
-
- return tmp;
-}
-
-static inline int izo_ioctl_is_invalid(struct izo_ioctl_data *data)
-{
- if (data->ioc_len > (1<<30)) {
- CERROR("IZO ioctl: ioc_len larger than 1<<30\n");
- return 1;
- }
- if (data->ioc_inllen1 > (1<<30)) {
- CERROR("IZO ioctl: ioc_inllen1 larger than 1<<30\n");
- return 1;
- }
- if (data->ioc_inllen2 > (1<<30)) {
- CERROR("IZO ioctl: ioc_inllen2 larger than 1<<30\n");
- return 1;
- }
- if (data->ioc_inlbuf1 && !data->ioc_inllen1) {
- CERROR("IZO ioctl: inlbuf1 pointer but 0 length\n");
- return 1;
- }
- if (data->ioc_inlbuf2 && !data->ioc_inllen2) {
- CERROR("IZO ioctl: inlbuf2 pointer but 0 length\n");
- return 1;
- }
- if (data->ioc_pbuf1 && !data->ioc_plen1) {
- CERROR("IZO ioctl: pbuf1 pointer but 0 length\n");
- return 1;
- }
- if (data->ioc_pbuf2 && !data->ioc_plen2) {
- CERROR("IZO ioctl: pbuf2 pointer but 0 length\n");
- return 1;
- }
- if (izo_ioctl_packlen(data) != data->ioc_len ) {
- CERROR("IZO ioctl: packlen exceeds ioc_len\n");
- return 1;
- }
- if (data->ioc_inllen1 &&
- data->ioc_bulk[data->ioc_inllen1 - 1] != '\0') {
- CERROR("IZO ioctl: inlbuf1 not 0 terminated\n");
- return 1;
- }
- if (data->ioc_inllen2 &&
- data->ioc_bulk[size_round(data->ioc_inllen1) + data->ioc_inllen2
- - 1] != '\0') {
- CERROR("IZO ioctl: inlbuf2 not 0 terminated\n");
- return 1;
- }
- return 0;
-}
-
-/* buffer MUST be at least the size of izo_ioctl_hdr */
-static inline int izo_ioctl_getdata(char *buf, char *end, void *arg)
-{
- struct izo_ioctl_hdr *hdr;
- struct izo_ioctl_data *data;
- int err;
- ENTRY;
-
- hdr = (struct izo_ioctl_hdr *)buf;
- data = (struct izo_ioctl_data *)buf;
-
- err = copy_from_user(buf, (void *)arg, sizeof(*hdr));
- if ( err ) {
- EXIT;
- return err;
- }
-
- if (hdr->ioc_version != IZO_IOCTL_VERSION) {
- CERROR("IZO: version mismatch kernel vs application\n");
- return -EINVAL;
- }
-
- if (hdr->ioc_len + buf >= end) {
- CERROR("IZO: user buffer exceeds kernel buffer\n");
- return -EINVAL;
- }
-
- if (hdr->ioc_len < sizeof(struct izo_ioctl_data)) {
- CERROR("IZO: user buffer too small for ioctl\n");
- return -EINVAL;
- }
-
- err = copy_from_user(buf, (void *)arg, hdr->ioc_len);
- if ( err ) {
- EXIT;
- return err;
- }
-
- if (izo_ioctl_is_invalid(data)) {
- CERROR("IZO: ioctl not correctly formatted\n");
- return -EINVAL;
- }
-
- if (data->ioc_inllen1) {
- data->ioc_inlbuf1 = &data->ioc_bulk[0];
- }
-
- if (data->ioc_inllen2) {
- data->ioc_inlbuf2 = &data->ioc_bulk[0] +
- size_round(data->ioc_inllen1);
- }
-
- EXIT;
- return 0;
-}
-
-# define MYPATHLEN(buffer, path) ((buffer) + PAGE_SIZE - (path))
-
-# define free kfree
-# define malloc(a) kmalloc(a, GFP_KERNEL)
-# define printf printk
-int kml_reint_rec(struct file *dir, struct izo_ioctl_data *data);
-int izo_get_fileid(struct file *dir, struct izo_ioctl_data *data);
-int izo_set_fileid(struct file *dir, struct izo_ioctl_data *data);
-
-#else /* __KERNEL__ */
-# include <stdlib.h>
-# include <stdio.h>
-# include <sys/types.h>
-# include <sys/ioctl.h>
-# include <string.h>
-
-# define printk printf
-# ifndef CERROR
-# define CERROR printf
-# endif
-# define kmalloc(a,b) malloc(a)
-
-void init_fsreintdata (void);
-int kml_fsreint(struct kml_rec *rec, char *basedir);
-int kml_iocreint(__u32 size, char *ptr, __u32 offset, int dird,
- uuid_t uuid, __u32 generate_kml);
-
-static inline void izo_ioctl_init(struct izo_ioctl_data *data)
-{
- memset(data, 0, sizeof(*data));
- data->ioc_len = sizeof(*data);
- data->ioc_version = IZO_IOCTL_VERSION;
-}
-
-static inline int
-izo_ioctl_pack(struct izo_ioctl_data *data, char **pbuf, int max)
-{
- char *ptr;
- struct izo_ioctl_data *overlay;
- data->ioc_len = izo_ioctl_packlen(data);
- data->ioc_version = IZO_IOCTL_VERSION;
-
- if (*pbuf && izo_ioctl_packlen(data) > max)
- return 1;
- if (*pbuf == NULL)
- *pbuf = malloc(data->ioc_len);
- if (*pbuf == NULL)
- return 1;
- overlay = (struct izo_ioctl_data *)*pbuf;
- memcpy(*pbuf, data, sizeof(*data));
-
- ptr = overlay->ioc_bulk;
- if (data->ioc_inlbuf1)
- LOGL(data->ioc_inlbuf1, data->ioc_inllen1, ptr);
- if (data->ioc_inlbuf2)
- LOGL(data->ioc_inlbuf2, data->ioc_inllen2, ptr);
- if (izo_ioctl_is_invalid(overlay))
- return 1;
-
- return 0;
-}
-
-#endif /* __KERNEL__*/
-
-#define IZO_ERROR_NAME 1
-#define IZO_ERROR_UPDATE 2
-#define IZO_ERROR_DELETE 3
-#define IZO_ERROR_RENAME 4
-
-static inline char *izo_error(int err)
-{
-#ifndef __KERNEL__
- if (err <= 0)
- return strerror(-err);
-#endif
- switch (err) {
- case IZO_ERROR_NAME:
- return "InterMezzo name/name conflict";
- case IZO_ERROR_UPDATE:
- return "InterMezzo update/update conflict";
- case IZO_ERROR_DELETE:
- return "InterMezzo update/delete conflict";
- case IZO_ERROR_RENAME:
- return "InterMezzo rename/rename conflict";
- }
- return "Unknown InterMezzo error";
-}
-
-/* kml_unpack.c */
-char *kml_print_rec(struct kml_rec *rec, int brief);
-int kml_unpack(struct kml_rec *rec, char **buf, char *end);
-
-/* fs 2.5 compat */
-
-/* is_read_only() is replaced by bdev_read_only which takes struct
- block_device *. Since this is only needed for debugging, it can be
- safely ignored now.
-*/
-#define is_read_only(dev) 0
-
-#endif
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2001, 2002 Cluster File Systems, Inc.
- * Copyright (C) 2001 Tacit Networks, Inc.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __INTERMEZZO_IDL_H__
-#define __INTERMEZZO_IDL_H__
-
-#include <linux/ioctl.h>
-#include <linux/types.h>
-
-/* this file contains all data structures used in InterMezzo's interfaces:
- * - upcalls
- * - ioctl's
- * - KML records
- * - RCVD records
- * - rpc's
- */
-
-/* UPCALL */
-#define INTERMEZZO_MINOR 248
-
-
-#define IZO_UPC_VERSION 0x00010002
-#define IZO_UPC_PERMIT 1
-#define IZO_UPC_CONNECT 2
-#define IZO_UPC_GO_FETCH_KML 3
-#define IZO_UPC_OPEN 4
-#define IZO_UPC_REVOKE_PERMIT 5
-#define IZO_UPC_KML 6
-#define IZO_UPC_BACKFETCH 7
-#define IZO_UPC_KML_TRUNC 8
-#define IZO_UPC_SET_KMLSIZE 9
-#define IZO_UPC_BRANCH_UNDO 10
-#define IZO_UPC_BRANCH_REDO 11
-#define IZO_UPC_GET_FILEID 12
-#define IZO_UPC_CLIENT_MAKE_BRANCH 13
-#define IZO_UPC_SERVER_MAKE_BRANCH 14
-#define IZO_UPC_REPSTATUS 15
-
-#define IZO_UPC_LARGEST_OPCODE 15
-
-struct izo_upcall_hdr {
- __u32 u_len;
- __u32 u_version;
- __u32 u_opc;
- __u32 u_uniq;
- __u32 u_pid;
- __u32 u_uid;
- __u32 u_pathlen;
- __u32 u_fsetlen;
- __u64 u_offset;
- __u64 u_length;
- __u32 u_first_recno;
- __u32 u_last_recno;
- __u32 u_async;
- __u32 u_reclen;
- __u8 u_uuid[16];
-};
-
-/* This structure _must_ sit at the beginning of the buffer */
-struct izo_upcall_resp {
- __u32 opcode;
- __u32 unique;
- __u32 result;
-};
-
-
-/* IOCTL */
-
-#define IZO_IOCTL_VERSION 0x00010003
-
-/* maximum size supported for ioc_pbuf1 */
-#define KML_MAX_BUF (64*1024)
-
-struct izo_ioctl_hdr {
- __u32 ioc_len;
- __u32 ioc_version;
-};
-
-struct izo_ioctl_data {
- __u32 ioc_len;
- __u32 ioc_version;
- __u32 ioc_izodev;
- __u32 ioc_kmlrecno;
- __u64 ioc_kmlsize;
- __u32 ioc_flags;
- __s32 ioc_inofd;
- __u64 ioc_ino;
- __u64 ioc_generation;
- __u32 ioc_mark_what;
- __u32 ioc_and_flag;
- __u32 ioc_or_flag;
- __u32 ioc_dev;
- __u32 ioc_offset;
- __u32 ioc_slot;
- __u64 ioc_uid;
- __u8 ioc_uuid[16];
-
- __u32 ioc_inllen1; /* path */
- char *ioc_inlbuf1;
- __u32 ioc_inllen2; /* fileset */
- char *ioc_inlbuf2;
-
- __u32 ioc_plen1; /* buffers in user space (KML) */
- char *ioc_pbuf1;
- __u32 ioc_plen2; /* buffers in user space (KML) */
- char *ioc_pbuf2;
-
- char ioc_bulk[0];
-};
-
-#define IZO_IOC_DEVICE _IOW ('p',0x50, void *)
-#define IZO_IOC_REINTKML _IOW ('p',0x51, void *)
-#define IZO_IOC_GET_RCVD _IOW ('p',0x52, void *)
-#define IZO_IOC_SET_IOCTL_UID _IOW ('p',0x53, void *)
-#define IZO_IOC_GET_KML_SIZE _IOW ('p',0x54, void *)
-#define IZO_IOC_PURGE_FILE_DATA _IOW ('p',0x55, void *)
-#define IZO_IOC_CONNECT _IOW ('p',0x56, void *)
-#define IZO_IOC_GO_FETCH_KML _IOW ('p',0x57, void *)
-#define IZO_IOC_MARK _IOW ('p',0x58, void *)
-#define IZO_IOC_CLEAR_FSET _IOW ('p',0x59, void *)
-#define IZO_IOC_CLEAR_ALL_FSETS _IOW ('p',0x60, void *)
-#define IZO_IOC_SET_FSET _IOW ('p',0x61, void *)
-#define IZO_IOC_REVOKE_PERMIT _IOW ('p',0x62, void *)
-#define IZO_IOC_SET_KMLSIZE _IOW ('p',0x63, void *)
-#define IZO_IOC_CLIENT_MAKE_BRANCH _IOW ('p',0x64, void *)
-#define IZO_IOC_SERVER_MAKE_BRANCH _IOW ('p',0x65, void *)
-#define IZO_IOC_BRANCH_UNDO _IOW ('p',0x66, void *)
-#define IZO_IOC_BRANCH_REDO _IOW ('p',0x67, void *)
-#define IZO_IOC_SET_PID _IOW ('p',0x68, void *)
-#define IZO_IOC_SET_CHANNEL _IOW ('p',0x69, void *)
-#define IZO_IOC_GET_CHANNEL _IOW ('p',0x70, void *)
-#define IZO_IOC_GET_FILEID _IOW ('p',0x71, void *)
-#define IZO_IOC_ADJUST_LML _IOW ('p',0x72, void *)
-#define IZO_IOC_SET_FILEID _IOW ('p',0x73, void *)
-#define IZO_IOC_REPSTATUS _IOW ('p',0x74, void *)
-
-/* marking flags for fsets */
-#define FSET_CLIENT_RO 0x00000001
-#define FSET_LENTO_RO 0x00000002
-#define FSET_HASPERMIT 0x00000004 /* we have a permit to WB */
-#define FSET_INSYNC 0x00000008 /* this fileset is in sync */
-#define FSET_PERMIT_WAITING 0x00000010 /* Lento is waiting for permit */
-#define FSET_STEAL_PERMIT 0x00000020 /* take permit if Lento is dead */
-#define FSET_JCLOSE_ON_WRITE 0x00000040 /* Journal closes on writes */
-#define FSET_DATA_ON_DEMAND 0x00000080 /* update data on file_open() */
-#define FSET_PERMIT_EXCLUSIVE 0x00000100 /* only one permitholder allowed */
-#define FSET_HAS_BRANCHES 0x00000200 /* this fileset contains branches */
-#define FSET_IS_BRANCH 0x00000400 /* this fileset is a branch */
-#define FSET_FLAT_BRANCH 0x00000800 /* this fileset is ROOT with branches */
-
-/* what to mark indicator (ioctl parameter) */
-#define MARK_DENTRY 101
-#define MARK_FSET 102
-#define MARK_CACHE 103
-#define MARK_GETFL 104
-
-/* KML */
-
-#define KML_MAJOR_VERSION 0x00010000
-#define KML_MINOR_VERSION 0x00000002
-#define KML_OPCODE_NOOP 0
-#define KML_OPCODE_CREATE 1
-#define KML_OPCODE_MKDIR 2
-#define KML_OPCODE_UNLINK 3
-#define KML_OPCODE_RMDIR 4
-#define KML_OPCODE_CLOSE 5
-#define KML_OPCODE_SYMLINK 6
-#define KML_OPCODE_RENAME 7
-#define KML_OPCODE_SETATTR 8
-#define KML_OPCODE_LINK 9
-#define KML_OPCODE_OPEN 10
-#define KML_OPCODE_MKNOD 11
-#define KML_OPCODE_WRITE 12
-#define KML_OPCODE_RELEASE 13
-#define KML_OPCODE_TRUNC 14
-#define KML_OPCODE_SETEXTATTR 15
-#define KML_OPCODE_DELEXTATTR 16
-#define KML_OPCODE_KML_TRUNC 17
-#define KML_OPCODE_GET_FILEID 18
-#define KML_OPCODE_NUM 19
-/* new stuff */
-struct presto_version {
- __u32 pv_mtime_sec;
- __u32 pv_mtime_nsec;
- __u32 pv_ctime_sec;
- __u32 pv_ctime_nsec;
- __u64 pv_size;
-};
-
-struct kml_prefix_hdr {
- __u32 len;
- __u32 version;
- __u32 pid;
- __u32 auid;
- __u32 fsuid;
- __u32 fsgid;
- __u32 opcode;
- __u32 ngroups;
-};
-
-struct kml_prefix {
- struct kml_prefix_hdr *hdr;
- __u32 *groups;
-};
-
-struct kml_suffix {
- __u32 prevrec;
- __u32 recno;
- __u32 time;
- __u32 len;
-};
-
-struct kml_rec {
- char *buf;
- struct kml_prefix prefix;
- __u64 offset;
- char *path;
- int pathlen;
- char *name;
- int namelen;
- char *target;
- int targetlen;
- struct presto_version *old_objectv;
- struct presto_version *new_objectv;
- struct presto_version *old_parentv;
- struct presto_version *new_parentv;
- struct presto_version *old_targetv;
- struct presto_version *new_targetv;
- __u32 valid;
- __u32 mode;
- __u32 uid;
- __u32 gid;
- __u64 size;
- __u32 mtime_sec;
- __u32 mtime_nsec;
- __u32 ctime_sec;
- __u32 ctime_nsec;
- __u32 flags;
- __u32 ino;
- __u32 rdev;
- __u32 major;
- __u32 minor;
- __u32 generation;
- __u32 old_mode;
- __u32 old_rdev;
- __u64 old_uid;
- __u64 old_gid;
- char *old_target;
- int old_targetlen;
- struct kml_suffix *suffix;
-};
-
-
-/* RCVD */
-
-/* izo_rcvd_rec fills the .intermezzo/fset/last_rcvd file and provides data about
- * our view of reintegration offsets for a given peer.
- *
- * The only exception is the last_rcvd record which has a UUID consisting of all
- * zeroes; this record's lr_local_offset field is the logical byte offset of our
- * KML, which is updated when KML truncation takes place. All other fields are
- * reserved. */
-
-/* XXX - document how clean shutdowns are recorded */
-
-struct izo_rcvd_rec {
- __u8 lr_uuid[16]; /* which peer? */
- __u64 lr_remote_recno; /* last confirmed remote recno */
- __u64 lr_remote_offset; /* last confirmed remote offset */
- __u64 lr_local_recno; /* last locally reinted recno */
- __u64 lr_local_offset; /* last locally reinted offset */
- __u64 lr_last_ctime; /* the largest ctime that has reintegrated */
-};
-
-/* Cache purge database
- *
- * Each DB entry is this structure followed by the path name, no trailing NUL. */
-struct izo_purge_entry {
- __u64 p_atime;
- __u32 p_pathlen;
-};
-
-/* RPC */
-
-#endif
+++ /dev/null
-#ifndef __PRESTO_JOURNAL_H
-#define __PRESTO_JOURNAL_H
-
-
-struct journal_prefix {
- int len;
- u32 version;
- int pid;
- int uid;
- int fsuid;
- int fsgid;
- int opcode;
- u32 ngroups;
- u32 groups[0];
-};
-
-struct journal_suffix {
- unsigned long prevrec; /* offset of previous record for dentry */
- int recno;
- int time;
- int len;
-};
-
-#endif
+++ /dev/null
-#ifndef __INTERMEZZO_KML_H
-#define __INTERMEZZO_KML_H
-
-#include "intermezzo_psdev.h"
-#include <linux/fs.h>
-#include "intermezzo_journal.h"
-
-#define PRESTO_KML_MAJOR_VERSION 0x00010000
-#define PRESTO_KML_MINOR_VERSION 0x00002001
-#define PRESTO_OP_NOOP 0
-#define PRESTO_OP_CREATE 1
-#define PRESTO_OP_MKDIR 2
-#define PRESTO_OP_UNLINK 3
-#define PRESTO_OP_RMDIR 4
-#define PRESTO_OP_CLOSE 5
-#define PRESTO_OP_SYMLINK 6
-#define PRESTO_OP_RENAME 7
-#define PRESTO_OP_SETATTR 8
-#define PRESTO_OP_LINK 9
-#define PRESTO_OP_OPEN 10
-#define PRESTO_OP_MKNOD 11
-#define PRESTO_OP_WRITE 12
-#define PRESTO_OP_RELEASE 13
-#define PRESTO_OP_TRUNC 14
-#define PRESTO_OP_SETEXTATTR 15
-#define PRESTO_OP_DELEXTATTR 16
-
-#define PRESTO_LML_DONE 1 /* flag to get first write to do LML */
-#define KML_KOP_MARK 0xffff
-
-struct presto_lml_data {
- loff_t rec_offset;
-};
-
-struct big_journal_prefix {
- u32 len;
- u32 version;
- u32 pid;
- u32 uid;
- u32 fsuid;
- u32 fsgid;
- u32 opcode;
- u32 ngroups;
- u32 groups[NGROUPS_SMALL];
-};
-
-enum kml_opcode {
- KML_CREATE = 1,
- KML_MKDIR,
- KML_UNLINK,
- KML_RMDIR,
- KML_CLOSE,
- KML_SYMLINK,
- KML_RENAME,
- KML_SETATTR,
- KML_LINK,
- KML_OPEN,
- KML_MKNOD,
- KML_ENDMARK = 0xff
-};
-
-struct kml_create {
- char *path;
- struct presto_version new_objectv,
- old_parentv,
- new_parentv;
- int mode;
- int uid;
- int gid;
-};
-
-struct kml_open {
-};
-
-struct kml_mkdir {
- char *path;
- struct presto_version new_objectv,
- old_parentv,
- new_parentv;
- int mode;
- int uid;
- int gid;
-};
-
-struct kml_unlink {
- char *path,
- *name;
- struct presto_version old_tgtv,
- old_parentv,
- new_parentv;
-};
-
-struct kml_rmdir {
- char *path,
- *name;
- struct presto_version old_tgtv,
- old_parentv,
- new_parentv;
-};
-
-struct kml_close {
- int open_mode,
- open_uid,
- open_gid;
- char *path;
- struct presto_version new_objectv;
- __u64 ino;
- int generation;
-};
-
-struct kml_symlink {
- char *sourcepath,
- *targetpath;
- struct presto_version new_objectv,
- old_parentv,
- new_parentv;
- int uid;
- int gid;
-};
-
-struct kml_rename {
- char *sourcepath,
- *targetpath;
- struct presto_version old_objectv,
- new_objectv,
- old_tgtv,
- new_tgtv;
-};
-
-struct kml_setattr {
- char *path;
- struct presto_version old_objectv;
- struct iattr iattr;
-};
-
-struct kml_link {
- char *sourcepath,
- *targetpath;
- struct presto_version new_objectv,
- old_parentv,
- new_parentv;
-};
-
-struct kml_mknod {
- char *path;
- struct presto_version new_objectv,
- old_parentv,
- new_parentv;
- int mode;
- int uid;
- int gid;
- int major;
- int minor;
-};
-
-/* kml record items for optimizing */
-struct kml_kop_node
-{
- u32 kml_recno;
- u32 kml_flag;
- u32 kml_op;
- nlink_t i_nlink;
- u32 i_ino;
-};
-
-struct kml_kop_lnode
-{
- struct list_head chains;
- struct kml_kop_node node;
-};
-
-struct kml_endmark {
- u32 total;
- struct kml_kop_node *kop;
-};
-
-/* kml_flag */
-#define KML_REC_DELETE 1
-#define KML_REC_EXIST 0
-
-struct kml_optimize {
- struct list_head kml_chains;
- u32 kml_flag;
- u32 kml_op;
- nlink_t i_nlink;
- u32 i_ino;
-};
-
-struct kml_rec {
- /* attribute of this record */
- int rec_size;
- int rec_kml_offset;
-
- struct big_journal_prefix rec_head;
- union {
- struct kml_create create;
- struct kml_open open;
- struct kml_mkdir mkdir;
- struct kml_unlink unlink;
- struct kml_rmdir rmdir;
- struct kml_close close;
- struct kml_symlink symlink;
- struct kml_rename rename;
- struct kml_setattr setattr;
- struct kml_mknod mknod;
- struct kml_link link;
- struct kml_endmark endmark;
- } rec_kml;
- struct journal_suffix rec_tail;
-
- /* for kml optimize only */
- struct kml_optimize kml_optimize;
-};
-
-/* kml record items for optimizing */
-extern void kml_kop_init (struct presto_file_set *fset);
-extern void kml_kop_addrec (struct presto_file_set *fset,
- struct inode *ino, u32 op, u32 flag);
-extern int kml_kop_flush (struct presto_file_set *fset);
-
-/* defined in kml_setup.c */
-extern int kml_init (struct presto_file_set *fset);
-extern int kml_cleanup (struct presto_file_set *fset);
-
-/* defined in kml.c */
-extern int begin_kml_reint (struct file *file, unsigned long arg);
-extern int do_kml_reint (struct file *file, unsigned long arg);
-extern int end_kml_reint (struct file *file, unsigned long arg);
-
-/* kml_utils.c */
-extern char *dlogit (void *tbuf, const void *sbuf, int size);
-extern char * bdup_printf (char *format, ...);
-
-/* defined in kml_decode.c */
-/* printop */
-#define PRINT_KML_PREFIX 0x1
-#define PRINT_KML_SUFFIX 0x2
-#define PRINT_KML_REC 0x4
-#define PRINT_KML_OPTIMIZE 0x8
-#define PRINT_KML_EXIST 0x10
-#define PRINT_KML_DELETE 0x20
-extern void kml_printrec (struct kml_rec *rec, int printop);
-extern int print_allkmlrec (struct list_head *head, int printop);
-extern int delete_kmlrec (struct list_head *head);
-extern int kml_decoderec (char *buf, int pos, int buflen, int *size,
- struct kml_rec **newrec);
-extern int decode_kmlrec (struct list_head *head, char *kml_buf, int buflen);
-extern void kml_freerec (struct kml_rec *rec);
-
-/* defined in kml_reint.c */
-#define KML_CLOSE_BACKFETCH 1
-extern int kml_reintbuf (struct kml_fsdata *kml_fsdata,
- char *mtpt, struct kml_rec **rec);
-
-/* defined in kml_setup.c */
-extern int kml_init (struct presto_file_set *fset);
-extern int kml_cleanup (struct presto_file_set *fset);
-
-#endif
-
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2001 Cluster File Systems, Inc. <braam@clusterfs.com>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Data structures unpacking/packing macros & inlines
- *
- */
-
-#ifndef _INTERMEZZO_LIB_H
-#define _INTERMEZZO_LIB_H
-
-#ifdef __KERNEL__
-# include <linux/types.h>
-#else
-# include <string.h>
-# include <sys/types.h>
-#endif
-
-static inline int size_round (int val)
-{
- return (val + 3) & (~0x3);
-}
-
-static inline int size_round0(int val)
-{
- if (!val)
- return 0;
- return (val + 1 + 3) & (~0x3);
-}
-
-static inline size_t round_strlen(char *fset)
-{
- return size_round(strlen(fset) + 1);
-}
-
-#ifdef __KERNEL__
-# define NTOH__u32(var) le32_to_cpu(var)
-# define NTOH__u64(var) le64_to_cpu(var)
-# define HTON__u32(var) cpu_to_le32(var)
-# define HTON__u64(var) cpu_to_le64(var)
-#else
-# include <glib.h>
-# define NTOH__u32(var) GUINT32_FROM_LE(var)
-# define NTOH__u64(var) GUINT64_FROM_LE(var)
-# define HTON__u32(var) GUINT32_TO_LE(var)
-# define HTON__u64(var) GUINT64_TO_LE(var)
-#endif
-
-/*
- * copy sizeof(type) bytes from pointer to var and move ptr forward.
- * return EFAULT if pointer goes beyond end
- */
-#define UNLOGV(var,type,ptr,end) \
-do { \
- var = *(type *)ptr; \
- ptr += sizeof(type); \
- if (ptr > end ) \
- return -EFAULT; \
-} while (0)
-
-/* the following two macros convert to little endian */
-/* type MUST be __u32 or __u64 */
-#define LUNLOGV(var,type,ptr,end) \
-do { \
- var = NTOH##type(*(type *)ptr); \
- ptr += sizeof(type); \
- if (ptr > end ) \
- return -EFAULT; \
-} while (0)
-
-/* now log values */
-#define LOGV(var,type,ptr) \
-do { \
- *((type *)ptr) = var; \
- ptr += sizeof(type); \
-} while (0)
-
-/* and in network order */
-#define LLOGV(var,type,ptr) \
-do { \
- *((type *)ptr) = HTON##type(var); \
- ptr += sizeof(type); \
-} while (0)
-
-
-/*
- * set var to point at (type *)ptr, move ptr forward with sizeof(type)
- * return from function with EFAULT if ptr goes beyond end
- */
-#define UNLOGP(var,type,ptr,end) \
-do { \
- var = (type *)ptr; \
- ptr += sizeof(type); \
- if (ptr > end ) \
- return -EFAULT; \
-} while (0)
-
-#define LOGP(var,type,ptr) \
-do { \
- memcpy(ptr, var, sizeof(type)); \
- ptr += sizeof(type); \
-} while (0)
-
-/*
- * set var to point at (char *)ptr, move ptr forward by size_round(len);
- * return from function with EFAULT if ptr goes beyond end
- */
-#define UNLOGL(var,type,len,ptr,end) \
-do { \
- if (len == 0) \
- var = (type *)0; \
- else { \
- var = (type *)ptr; \
- ptr += size_round(len * sizeof(type)); \
- } \
- if (ptr > end ) \
- return -EFAULT; \
-} while (0)
-
-#define UNLOGL0(var,type,len,ptr,end) \
-do { \
- UNLOGL(var,type,len+1,ptr,end); \
- if ( *((char *)ptr - size_round(len+1) + len) != '\0') \
- return -EFAULT; \
-} while (0)
-
-#define LOGL(var,len,ptr) \
-do { \
- size_t __fill = size_round(len); \
- /* Prevent data leakage. */ \
- if (__fill > 0) \
- memset((char *)ptr, 0, __fill); \
- memcpy((char *)ptr, (const char *)var, len); \
- ptr += __fill; \
-} while (0)
-
-#define LOGL0(var,len,ptr) \
-do { \
- if (!len) break; \
- memcpy((char *)ptr, (const char *)var, len); \
- *((char *)(ptr) + len) = 0; \
- ptr += size_round(len + 1); \
-} while (0)
-
-#endif /* _INTERMEZZO_LIB_H */
-
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- */
-
-#ifndef __PRESTO_PSDEV_H
-#define __PRESTO_PSDEV_H
-
-#define MAX_CHANNEL 16
-#define PROCNAME_SIZE 32
-#include <linux/smp_lock.h>
-
-/* represents state of an instance reached with /dev/intermezzo */
-/* communication pending & processing queues */
-struct upc_channel {
- unsigned int uc_seq;
- wait_queue_head_t uc_waitq; /* Lento wait queue */
- struct list_head uc_pending;
- struct list_head uc_processing;
- spinlock_t uc_lock;
- int uc_pid; /* Lento's pid */
- int uc_hard; /* allows signals during upcalls */
- int uc_no_filter;
- int uc_no_journal;
- int uc_no_upcall;
- int uc_timeout; /* . sec: signals will dequeue upc */
- long uc_errorval; /* for testing I/O failures */
- struct list_head uc_cache_list;
- int uc_minor;
-};
-
-#define ISLENTO(minor) (current->pid == izo_channels[minor].uc_pid \
- || current->real_parent->pid == izo_channels[minor].uc_pid \
- || current->real_parent->real_parent->pid == izo_channels[minor].uc_pid)
-
-extern struct upc_channel izo_channels[MAX_CHANNEL];
-
-/* message types between presto filesystem in kernel */
-#define REQ_READ 1
-#define REQ_WRITE 2
-#define REQ_ASYNC 4
-#define REQ_DEAD 8
-
-struct upc_req {
- struct list_head rq_chain;
- caddr_t rq_data;
- int rq_flags;
- int rq_bufsize;
- int rq_rep_size;
- int rq_opcode; /* copied from data to save lookup */
- int rq_unique;
- wait_queue_head_t rq_sleep; /* process' wait queue */
- unsigned long rq_posttime;
-};
-
-#endif
+++ /dev/null
-/*
- * Based on cfs.h from Coda, but revamped for increased simplicity.
- * Linux modifications by Peter Braam, Aug 1996
- * Rewritten for InterMezzo
- */
-
-#ifndef _PRESTO_HEADER_
-#define _PRESTO_HEADER_
-
-
-/* upcall.c */
-#define SYNCHRONOUS 0
-#define ASYNCHRONOUS 1
-
-int lento_permit(int minor, int pathlen, int fsetnamelen, char *path, char *fset);
-int lento_opendir(int minor, int pathlen, char *path, int async);
-int lento_kml(int minor, unsigned int offset, unsigned int first_recno,
- unsigned int length, unsigned int last_recno, int namelen,
- char *fsetname);
-int lento_open(int minor, int pathlen, char *path);
-int lento_journal(int minor, char *page, int async);
-int lento_release_permit(int minor, int cookie);
-
-/*
- * Kernel <--> Lento communications.
- */
-/* upcalls */
-#define LENTO_PERMIT 1
-#define LENTO_JOURNAL 2
-#define LENTO_OPENDIR 3
-#define LENTO_OPEN 4
-#define LENTO_SIGNAL 5
-#define LENTO_KML 6
-#define LENTO_COOKIE 7
-
-/* Lento <-> Presto RPC arguments */
-struct lento_up_hdr {
- unsigned int opcode;
- unsigned int unique; /* Keep multiple outstanding msgs distinct */
- u_short pid; /* Common to all */
- u_short uid;
-};
-
-/* This structure _must_ sit at the beginning of the buffer */
-struct lento_down_hdr {
- unsigned int opcode;
- unsigned int unique;
- unsigned int result;
-};
-
-/* lento_permit: */
-struct lento_permit_in {
- struct lento_up_hdr uh;
- int pathlen;
- int fsetnamelen;
- char path[0];
-};
-struct lento_permit_out {
- struct lento_down_hdr dh;
-};
-
-
-/* lento_opendir: */
-struct lento_opendir_in {
- struct lento_up_hdr uh;
- int async;
- int pathlen;
- char path[0];
-};
-struct lento_opendir_out {
- struct lento_down_hdr dh;
-};
-
-
-/* lento_kml: */
-struct lento_kml_in {
- struct lento_up_hdr uh;
- unsigned int offset;
- unsigned int first_recno;
- unsigned int length;
- unsigned int last_recno;
- int namelen;
- char fsetname[0];
-};
-
-struct lento_kml_out {
- struct lento_down_hdr dh;
-};
-
-
-/* lento_open: */
-struct lento_open_in {
- struct lento_up_hdr uh;
- int pathlen;
- char path[0];
-};
-struct lento_open_out {
- struct lento_down_hdr dh;
-};
-
-/* lento_response_cookie */
-struct lento_response_cookie_in {
- struct lento_up_hdr uh;
- int cookie;
-};
-
-struct lento_response_cookie_out {
- struct lento_down_hdr dh;
-};
-
-
-struct lento_mknod {
- struct lento_down_hdr dh;
- int major;
- int minor;
- int mode;
- char path[0];
-};
-
-
-/* NB: every struct below begins with an up_hdr */
-union up_args {
- struct lento_up_hdr uh;
- struct lento_permit_in lento_permit;
- struct lento_open_in lento_open;
- struct lento_opendir_in lento_opendir;
- struct lento_kml_in lento_kml;
- struct lento_response_cookie_in lento_response_cookie;
-};
-
-union down_args {
- struct lento_down_hdr dh;
- struct lento_permit_out lento_permit;
- struct lento_open_out lento_open;
- struct lento_opendir_out lento_opendir;
- struct lento_kml_out lento_kml;
- struct lento_response_cookie_out lento_response_cookie;
-};
-
-#include "intermezzo_psdev.h"
-
-int lento_upcall(int minor, int read_size, int *rep_size,
- union up_args *buffer, int async,
- struct upc_req *rq );
-#endif
-
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 1998 Peter J. Braam
- * Copyright (C) 2001 Cluster File Systems, Inc.
- * Copyright (C) 2001 Tacit Networks, Inc. <phil@off.net>
- *
- * Support for journalling extended attributes
- * Copyright (C) 2001 Shirish H. Phatak, Tacit Networks, Inc.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/namei.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/time.h>
-#include <linux/errno.h>
-#include <asm/segment.h>
-#include <asm/uaccess.h>
-#include <linux/string.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-struct presto_reservation_data {
- unsigned int ri_recno;
- loff_t ri_offset;
- loff_t ri_size;
- struct list_head ri_list;
-};
-
-/*
- * Locking Semantics
- *
- * write lock in struct presto_log_fd:
- * - name: fd_lock
- * - required for: accessing any field in a presto_log_fd
- * - may not be held across I/O
- * -
- *
- */
-
-/*
- * reserve record space and/or atomically request state of the log
- * rec will hold the location reserved record upon return
- * this reservation will be placed in the queue
- */
-static void presto_reserve_record(struct presto_file_set *fset,
- struct presto_log_fd *fd,
- struct rec_info *rec,
- struct presto_reservation_data *rd)
-{
- int chunked_record = 0;
- ENTRY;
-
- write_lock(&fd->fd_lock);
- if ( rec->is_kml ) {
- int chunk = 1 << fset->fset_chunkbits;
- int chunk_mask = ~(chunk -1);
- loff_t boundary;
-
- boundary = (fd->fd_offset + chunk - 1) & chunk_mask;
- if ( fd->fd_offset + rec->size >= boundary ) {
- chunked_record = 1;
- fd->fd_offset = boundary;
- }
- }
-
- fd->fd_recno++;
-
- /* this moves the fd_offset back after truncation */
- if ( list_empty(&fd->fd_reservations) &&
- !chunked_record) {
- fd->fd_offset = fd->fd_file->f_dentry->d_inode->i_size;
- }
-
- rec->offset = fd->fd_offset;
- if (rec->is_kml)
- rec->offset += fset->fset_kml_logical_off;
-
- rec->recno = fd->fd_recno;
-
- /* add the reservation data to the end of the list */
- rd->ri_offset = fd->fd_offset;
- rd->ri_size = rec->size;
- rd->ri_recno = rec->recno;
- list_add(&rd->ri_list, fd->fd_reservations.prev);
-
- fd->fd_offset += rec->size;
-
- write_unlock(&fd->fd_lock);
-
- EXIT;
-}
-
-static inline void presto_release_record(struct presto_log_fd *fd,
- struct presto_reservation_data *rd)
-{
- write_lock(&fd->fd_lock);
- list_del(&rd->ri_list);
- write_unlock(&fd->fd_lock);
-}
-
-/* XXX should we ask for do_truncate to be exported? */
-int izo_do_truncate(struct presto_file_set *fset, struct dentry *dentry,
- loff_t length, loff_t size_check)
-{
- struct inode *inode = dentry->d_inode;
- int error;
- struct iattr newattrs;
-
- ENTRY;
-
- if (length < 0) {
- EXIT;
- return -EINVAL;
- }
-
- down(&inode->i_sem);
- lock_kernel();
-
- if (size_check != inode->i_size) {
- unlock_kernel();
- up(&inode->i_sem);
- EXIT;
- return -EALREADY;
- }
-
- newattrs.ia_size = length;
- newattrs.ia_valid = ATTR_SIZE | ATTR_CTIME;
-
- if (inode->i_op && inode->i_op->setattr)
- error = inode->i_op->setattr(dentry, &newattrs);
- else {
- inode_setattr(dentry->d_inode, &newattrs);
- error = 0;
- }
-
- unlock_kernel();
- up(&inode->i_sem);
- EXIT;
- return error;
-}
-
-static void presto_kml_truncate(struct presto_file_set *fset)
-{
- int rc;
- ENTRY;
-
- write_lock(&fset->fset_kml.fd_lock);
- if (fset->fset_kml.fd_truncating == 1 ) {
- write_unlock(&fset->fset_kml.fd_lock);
- EXIT;
- return;
- }
-
- fset->fset_kml.fd_truncating = 1;
- write_unlock(&fset->fset_kml.fd_lock);
-
- CERROR("islento: %d, count: %d\n",
- ISLENTO(presto_i2m(fset->fset_dentry->d_inode)),
- fset->fset_permit_count);
-
- rc = izo_upc_kml_truncate(fset->fset_cache->cache_psdev->uc_minor,
- fset->fset_lento_off, fset->fset_lento_recno,
- fset->fset_name);
-
- /* Userspace is the only permitholder now, and will retain an exclusive
- * hold on the permit until KML truncation completes. */
- /* FIXME: double check this code path now that the precise semantics of
- * fset->fset_permit_count have changed. */
-
- if (rc != 0) {
- write_lock(&fset->fset_kml.fd_lock);
- fset->fset_kml.fd_truncating = 0;
- write_unlock(&fset->fset_kml.fd_lock);
- }
-
- EXIT;
-}
-
-void *presto_trans_start(struct presto_file_set *fset, struct inode *inode,
- int op)
-{
- ENTRY;
- if ( !fset->fset_cache->cache_filter->o_trops ) {
- EXIT;
- return NULL;
- }
- EXIT;
- return fset->fset_cache->cache_filter->o_trops->tr_start
- (fset, inode, op);
-}
-
-void presto_trans_commit(struct presto_file_set *fset, void *handle)
-{
- ENTRY;
- if (!fset->fset_cache->cache_filter->o_trops ) {
- EXIT;
- return;
- }
-
- fset->fset_cache->cache_filter->o_trops->tr_commit(fset, handle);
-
- /* Check to see if the KML needs truncated. */
- if (fset->kml_truncate_size > 0 &&
- !fset->fset_kml.fd_truncating &&
- fset->fset_kml.fd_offset > fset->kml_truncate_size) {
- CDEBUG(D_JOURNAL, "kml size: %lu; truncating\n",
- (unsigned long)fset->fset_kml.fd_offset);
- presto_kml_truncate(fset);
- }
- EXIT;
-}
-
-inline int presto_no_journal(struct presto_file_set *fset)
-{
- int minor = fset->fset_cache->cache_psdev->uc_minor;
- return izo_channels[minor].uc_no_journal;
-}
-
-#define size_round(x) (((x)+3) & ~0x3)
-
-#define BUFF_FREE(buf) PRESTO_FREE(buf, PAGE_SIZE)
-#define BUFF_ALLOC(newbuf, oldbuf) \
- PRESTO_ALLOC(newbuf, PAGE_SIZE); \
- if ( !newbuf ) { \
- if (oldbuf) \
- BUFF_FREE(oldbuf); \
- return -ENOMEM; \
- }
-
-/*
- * "buflen" should be PAGE_SIZE or more.
- * Give relative path wrt to a fsetroot
- */
-char * presto_path(struct dentry *dentry, struct dentry *root,
- char *buffer, int buflen)
-{
- char * end = buffer+buflen;
- char * retval;
-
- *--end = '\0';
- buflen--;
- if (dentry->d_parent != dentry && d_unhashed(dentry)) {
- buflen -= 10;
- end -= 10;
- memcpy(end, " (deleted)", 10);
- }
-
- /* Get '/' right */
- retval = end-1;
- *retval = '/';
-
- for (;;) {
- struct dentry * parent;
- int namelen;
-
- if (dentry == root)
- break;
- parent = dentry->d_parent;
- if (dentry == parent)
- break;
- namelen = dentry->d_name.len;
- buflen -= namelen + 1;
- if (buflen < 0)
- break;
- end -= namelen;
- memcpy(end, dentry->d_name.name, namelen);
- *--end = '/';
- retval = end;
- dentry = parent;
- }
- return retval;
-}
-
-static inline char *logit(char *buf, const void *value, int size)
-{
- char *ptr = (char *)value;
-
- memcpy(buf, ptr, size);
- buf += size;
- return buf;
-}
-
-
-static inline char *
-journal_log_prefix_with_groups_and_ids(char *buf, int opcode,
- struct rec_info *rec,
- __u32 ngroups, gid_t *groups,
- __u32 fsuid, __u32 fsgid)
-{
- struct kml_prefix_hdr p;
- u32 loggroups[NGROUPS_SMALL];
-
- int i;
-
- p.len = cpu_to_le32(rec->size);
- p.version = KML_MAJOR_VERSION | KML_MINOR_VERSION;
- p.pid = cpu_to_le32(current->pid);
- p.auid = cpu_to_le32(current->uid);
- p.fsuid = cpu_to_le32(fsuid);
- p.fsgid = cpu_to_le32(fsgid);
- p.ngroups = cpu_to_le32(ngroups);
- p.opcode = cpu_to_le32(opcode);
- for (i=0 ; i < ngroups ; i++)
- loggroups[i] = cpu_to_le32((__u32) groups[i]);
-
- buf = logit(buf, &p, sizeof(struct kml_prefix_hdr));
- buf = logit(buf, &loggroups, sizeof(__u32) * ngroups);
- return buf;
-}
-
-static inline char *
-journal_log_prefix(char *buf, int opcode, struct rec_info *rec)
-{
- __u32 groups[NGROUPS_SMALL];
- int i;
-
- /* convert 16 bit gid's to 32 bit gid's */
- for (i=0; i<current->group_info->ngroups; i++)
- groups[i] = GROUP_AT(current->group_info,i);
-
- return journal_log_prefix_with_groups_and_ids(buf, opcode, rec,
- (__u32)current->group_info->ngroups,
- groups,
- (__u32)current->fsuid,
- (__u32)current->fsgid);
-}
-
-static inline char *
-journal_log_prefix_with_groups(char *buf, int opcode, struct rec_info *rec,
- __u32 ngroups, gid_t *groups)
-{
- return journal_log_prefix_with_groups_and_ids(buf, opcode, rec,
- ngroups, groups,
- (__u32)current->fsuid,
- (__u32)current->fsgid);
-}
-
-static inline char *log_dentry_version(char *buf, struct dentry *dentry)
-{
- struct presto_version version;
-
- presto_getversion(&version, dentry->d_inode);
-
- version.pv_mtime_sec = HTON__u32(version.pv_mtime_sec);
- version.pv_ctime_sec = HTON__u32(version.pv_ctime_sec);
- version.pv_mtime_nsec = HTON__u32(version.pv_mtime_nsec);
- version.pv_ctime_nsec = HTON__u32(version.pv_ctime_nsec);
- version.pv_size = HTON__u64(version.pv_size);
-
- return logit(buf, &version, sizeof(version));
-}
-
-static inline char *log_version(char *buf, struct presto_version *pv)
-{
- struct presto_version version;
-
- memcpy(&version, pv, sizeof(version));
-
- version.pv_mtime_sec = HTON__u32(version.pv_mtime_sec);
- version.pv_mtime_nsec = HTON__u32(version.pv_mtime_nsec);
- version.pv_ctime_sec = HTON__u32(version.pv_ctime_sec);
- version.pv_ctime_nsec = HTON__u32(version.pv_ctime_nsec);
- version.pv_size = HTON__u64(version.pv_size);
-
- return logit(buf, &version, sizeof(version));
-}
-
-static inline char *log_rollback(char *buf, struct izo_rollback_data *rb)
-{
- struct izo_rollback_data rollback;
-
- rollback.rb_mode = HTON__u32(rb->rb_mode);
- rollback.rb_rdev = HTON__u32(rb->rb_rdev);
- rollback.rb_uid = HTON__u64(rb->rb_uid);
- rollback.rb_gid = HTON__u64(rb->rb_gid);
-
- return logit(buf, &rollback, sizeof(rollback));
-}
-
-static inline char *journal_log_suffix(char *buf, char *log,
- struct presto_file_set *fset,
- struct dentry *dentry,
- struct rec_info *rec)
-{
- struct kml_suffix s;
- struct kml_prefix_hdr *p = (struct kml_prefix_hdr *)log;
-
-#if 0
- /* XXX needs to be done after reservation,
- disable ths until version 1.2 */
- if ( dentry ) {
- s.prevrec = cpu_to_le32(rec->offset -
- presto_d2d(dentry)->dd_kml_offset);
- presto_d2d(dentry)->dd_kml_offset = rec->offset;
- } else {
- s.prevrec = -1;
- }
-#endif
- s.prevrec = 0;
-
- /* record number needs to be filled in after reservation
- s.recno = cpu_to_le32(rec->recno); */
- s.time = cpu_to_le32(get_seconds());
- s.len = p->len;
- return logit(buf, &s, sizeof(s));
-}
-
-int izo_log_close(struct presto_log_fd *logfd)
-{
- int rc = 0;
-
- if (logfd->fd_file) {
- rc = filp_close(logfd->fd_file, 0);
- logfd->fd_file = NULL;
- } else
- CERROR("InterMezzo: %s: no filp\n", __FUNCTION__);
- if (rc != 0)
- CERROR("InterMezzo: close files: filp won't close: %d\n", rc);
-
- return rc;
-}
-
-int presto_fwrite(struct file *file, const char *str, int len, loff_t *off)
-{
- int rc;
- mm_segment_t old_fs;
- ENTRY;
-
- rc = -EINVAL;
- if ( !off ) {
- EXIT;
- return rc;
- }
-
- if ( ! file ) {
- EXIT;
- return rc;
- }
-
- if ( ! file->f_op ) {
- EXIT;
- return rc;
- }
-
- if ( ! file->f_op->write ) {
- EXIT;
- return rc;
- }
-
- old_fs = get_fs();
- set_fs(get_ds());
- rc = file->f_op->write(file, str, len, off);
- if (rc != len) {
- CERROR("presto_fwrite: wrote %d bytes instead of "
- "%d at %ld\n", rc, len, (long)*off);
- rc = -EIO;
- }
- set_fs(old_fs);
- EXIT;
- return rc;
-}
-
-int presto_fread(struct file *file, char *str, int len, loff_t *off)
-{
- int rc;
- mm_segment_t old_fs;
- ENTRY;
-
- if (len > 512)
- CERROR("presto_fread: read at %Ld for %d bytes, ino %ld\n",
- *off, len, file->f_dentry->d_inode->i_ino);
-
- rc = -EINVAL;
- if ( !off ) {
- EXIT;
- return rc;
- }
-
- if ( ! file ) {
- EXIT;
- return rc;
- }
-
- if ( ! file->f_op ) {
- EXIT;
- return rc;
- }
-
- if ( ! file->f_op->read ) {
- EXIT;
- return rc;
- }
-
- old_fs = get_fs();
- set_fs(get_ds());
- rc = file->f_op->read(file, str, len, off);
- if (rc != len) {
- CDEBUG(D_FILE, "presto_fread: read %d bytes instead of "
- "%d at %Ld\n", rc, len, *off);
- rc = -EIO;
- }
- set_fs(old_fs);
- EXIT;
- return rc;
-}
-
-loff_t presto_kml_offset(struct presto_file_set *fset)
-{
- unsigned int kml_recno;
- struct presto_log_fd *fd = &fset->fset_kml;
- loff_t offset;
- ENTRY;
-
- write_lock(&fd->fd_lock);
-
- /* Determine the largest valid offset, i.e. up until the first
- * reservation held on the file. */
- if ( !list_empty(&fd->fd_reservations) ) {
- struct presto_reservation_data *rd;
- rd = list_entry(fd->fd_reservations.next,
- struct presto_reservation_data,
- ri_list);
- offset = rd->ri_offset;
- kml_recno = rd->ri_recno;
- } else {
- offset = fd->fd_file->f_dentry->d_inode->i_size;
- kml_recno = fset->fset_kml.fd_recno;
- }
- write_unlock(&fd->fd_lock);
- return offset;
-}
-
-static int presto_kml_dispatch(struct presto_file_set *fset)
-{
- int rc = 0;
- unsigned int kml_recno;
- struct presto_log_fd *fd = &fset->fset_kml;
- loff_t offset;
- ENTRY;
-
- write_lock(&fd->fd_lock);
-
- /* Determine the largest valid offset, i.e. up until the first
- * reservation held on the file. */
- if ( !list_empty(&fd->fd_reservations) ) {
- struct presto_reservation_data *rd;
- rd = list_entry(fd->fd_reservations.next,
- struct presto_reservation_data,
- ri_list);
- offset = rd->ri_offset;
- kml_recno = rd->ri_recno;
- } else {
- offset = fd->fd_file->f_dentry->d_inode->i_size;
- kml_recno = fset->fset_kml.fd_recno;
- }
-
- if ( kml_recno < fset->fset_lento_recno ) {
- CERROR("presto_kml_dispatch: smoke is coming\n");
- write_unlock(&fd->fd_lock);
- EXIT;
- return 0;
- } else if ( kml_recno == fset->fset_lento_recno ) {
- write_unlock(&fd->fd_lock);
- EXIT;
- return 0;
- /* XXX add a further "if" here to delay the KML upcall */
-#if 0
- } else if ( kml_recno < fset->fset_lento_recno + 100) {
- write_unlock(&fd->fd_lock);
- EXIT;
- return 0;
-#endif
- }
- CDEBUG(D_PIOCTL, "fset: %s\n", fset->fset_name);
-
- rc = izo_upc_kml(fset->fset_cache->cache_psdev->uc_minor,
- fset->fset_lento_off, fset->fset_lento_recno,
- offset + fset->fset_kml_logical_off, kml_recno,
- fset->fset_name);
-
- if ( rc ) {
- write_unlock(&fd->fd_lock);
- EXIT;
- return rc;
- }
-
- fset->fset_lento_off = offset;
- fset->fset_lento_recno = kml_recno;
- write_unlock(&fd->fd_lock);
- EXIT;
- return 0;
-}
-
-int izo_lookup_file(struct presto_file_set *fset, char *path,
- struct nameidata *nd)
-{
- int error = 0;
-
- CDEBUG(D_CACHE, "looking up: %s\n", path);
-
- error = path_lookup(path, LOOKUP_PARENT, nd);
- if (error) {
- EXIT;
- return error;
- }
-
- return 0;
-}
-
-/* FIXME: this function is a mess of locking and error handling. There's got to
- * be a better way. */
-static int do_truncate_rename(struct presto_file_set *fset, char *oldname,
- char *newname)
-{
- struct dentry *old_dentry, *new_dentry;
- struct nameidata oldnd, newnd;
- char *oldpath, *newpath;
- int error;
-
- ENTRY;
-
- oldpath = izo_make_path(fset, oldname);
- if (oldpath == NULL) {
- EXIT;
- return -ENOENT;
- }
-
- newpath = izo_make_path(fset, newname);
- if (newpath == NULL) {
- error = -ENOENT;
- EXIT;
- goto exit;
- }
-
- if ((error = izo_lookup_file(fset, oldpath, &oldnd)) != 0) {
- EXIT;
- goto exit1;
- }
-
- if ((error = izo_lookup_file(fset, newpath, &newnd)) != 0) {
- EXIT;
- goto exit2;
- }
-
- lock_rename(newnd.dentry, oldnd.dentry);
- old_dentry = lookup_hash(&oldnd.last, oldnd.dentry);
- error = PTR_ERR(old_dentry);
- if (IS_ERR(old_dentry)) {
- EXIT;
- goto exit3;
- }
- error = -ENOENT;
- if (!old_dentry->d_inode) {
- EXIT;
- goto exit4;
- }
- new_dentry = lookup_hash(&newnd.last, newnd.dentry);
- error = PTR_ERR(new_dentry);
- if (IS_ERR(new_dentry)) {
- EXIT;
- goto exit4;
- }
-
- {
- extern int presto_rename(struct inode *old_dir,struct dentry *old_dentry,
- struct inode *new_dir,struct dentry *new_dentry);
- error = presto_rename(old_dentry->d_parent->d_inode, old_dentry,
- new_dentry->d_parent->d_inode, new_dentry);
- }
-
- dput(new_dentry);
- EXIT;
- exit4:
- dput(old_dentry);
- exit3:
- unlock_rename(newnd.dentry, oldnd.dentry);
- path_release(&newnd);
- exit2:
- path_release(&oldnd);
- exit1:
- PRESTO_FREE(newpath, strlen(newpath) + 1);
- exit:
- PRESTO_FREE(oldpath, strlen(oldpath) + 1);
- return error;
-}
-
-/* This function is called with the fset->fset_kml.fd_lock held */
-int presto_finish_kml_truncate(struct presto_file_set *fset,
- unsigned long int offset)
-{
- struct lento_vfs_context info;
- void *handle;
- struct file *f;
- struct dentry *dentry;
- int error = 0, len;
- struct nameidata nd;
- char *kmlpath = NULL, *smlpath = NULL;
- ENTRY;
-
- if (offset == 0) {
- /* Lento couldn't do what it needed to; abort the truncation. */
- fset->fset_kml.fd_truncating = 0;
- EXIT;
- return 0;
- }
-
- /* someone is about to write to the end of the KML; try again later. */
- if ( !list_empty(&fset->fset_kml.fd_reservations) ) {
- EXIT;
- return -EAGAIN;
- }
-
- f = presto_copy_kml_tail(fset, offset);
- if (IS_ERR(f)) {
- EXIT;
- return PTR_ERR(f);
- }
-
- /* In a single transaction:
- *
- * - unlink 'kml'
- * - rename 'kml_tmp' to 'kml'
- * - unlink 'sml'
- * - rename 'sml_tmp' to 'sml'
- * - rewrite the first record of last_rcvd with the new kml
- * offset.
- */
- handle = presto_trans_start(fset, fset->fset_dentry->d_inode,
- KML_OPCODE_KML_TRUNC);
- if (IS_ERR(handle)) {
- presto_release_space(fset->fset_cache, PRESTO_REQLOW);
- CERROR("ERROR: presto_finish_kml_truncate: no space for transaction\n");
- EXIT;
- return -ENOMEM;
- }
-
- memset(&info, 0, sizeof(info));
- info.flags = LENTO_FL_IGNORE_TIME;
-
- kmlpath = izo_make_path(fset, "kml");
- if (kmlpath == NULL) {
- error = -ENOMEM;
- CERROR("make_path failed: ENOMEM\n");
- EXIT;
- goto exit_commit;
- }
-
- if ((error = izo_lookup_file(fset, kmlpath, &nd)) != 0) {
- CERROR("izo_lookup_file(kml) failed: %d.\n", error);
- EXIT;
- goto exit_commit;
- }
- down(&nd.dentry->d_inode->i_sem);
- dentry = lookup_hash(&nd.last, nd.dentry);
- error = PTR_ERR(dentry);
- if (IS_ERR(dentry)) {
- up(&nd.dentry->d_inode->i_sem);
- path_release(&nd);
- CERROR("lookup_hash failed\n");
- EXIT;
- goto exit_commit;
- }
- error = presto_do_unlink(fset, dentry->d_parent, dentry, &info);
- dput(dentry);
- up(&nd.dentry->d_inode->i_sem);
- path_release(&nd);
-
- if (error != 0) {
- CERROR("presto_do_unlink(kml) failed: %d.\n", error);
- EXIT;
- goto exit_commit;
- }
-
- smlpath = izo_make_path(fset, "sml");
- if (smlpath == NULL) {
- error = -ENOMEM;
- CERROR("make_path() failed: ENOMEM\n");
- EXIT;
- goto exit_commit;
- }
-
- if ((error = izo_lookup_file(fset, smlpath, &nd)) != 0) {
- CERROR("izo_lookup_file(sml) failed: %d.\n", error);
- EXIT;
- goto exit_commit;
- }
- down(&nd.dentry->d_inode->i_sem);
- dentry = lookup_hash(&nd.last, nd.dentry);
- error = PTR_ERR(dentry);
- if (IS_ERR(dentry)) {
- up(&nd.dentry->d_inode->i_sem);
- path_release(&nd);
- CERROR("lookup_hash failed\n");
- EXIT;
- goto exit_commit;
- }
- error = presto_do_unlink(fset, dentry->d_parent, dentry, &info);
- dput(dentry);
- up(&nd.dentry->d_inode->i_sem);
- path_release(&nd);
-
- if (error != 0) {
- CERROR("presto_do_unlink(sml) failed: %d.\n", error);
- EXIT;
- goto exit_commit;
- }
-
- error = do_truncate_rename(fset, "kml_tmp", "kml");
- if (error != 0)
- CERROR("do_truncate_rename(kml_tmp, kml) failed: %d\n", error);
- error = do_truncate_rename(fset, "sml_tmp", "sml");
- if (error != 0)
- CERROR("do_truncate_rename(sml_tmp, sml) failed: %d\n", error);
-
- /* Write a new 'last_rcvd' record with the new KML offset */
- fset->fset_kml_logical_off += offset;
- CDEBUG(D_CACHE, "new kml_logical_offset: %Lu\n",
- fset->fset_kml_logical_off);
- if (presto_write_kml_logical_offset(fset) != 0) {
- CERROR("presto_write_kml_logical_offset failed\n");
- }
-
- presto_trans_commit(fset, handle);
-
- /* Everything was successful, so swap the KML file descriptors */
- filp_close(fset->fset_kml.fd_file, NULL);
- fset->fset_kml.fd_file = f;
- fset->fset_kml.fd_offset -= offset;
- fset->fset_kml.fd_truncating = 0;
-
- EXIT;
- return 0;
-
- exit_commit:
- presto_trans_commit(fset, handle);
- len = strlen("/.intermezzo/") + strlen(fset->fset_name) +strlen("sml");
- if (kmlpath != NULL)
- PRESTO_FREE(kmlpath, len);
- if (smlpath != NULL)
- PRESTO_FREE(smlpath, len);
- return error;
-}
-
-/* structure of an extended log record:
-
- buf-prefix buf-body [string1 [string2 [string3]]] buf-suffix
-
- note: moves offset forward
-*/
-static inline int presto_write_record(struct file *f, loff_t *off,
- const char *buf, size_t size,
- const char *string1, int len1,
- const char *string2, int len2,
- const char *string3, int len3)
-{
- size_t prefix_size;
- int rc;
-
- prefix_size = size - sizeof(struct kml_suffix);
- rc = presto_fwrite(f, buf, prefix_size, off);
- if ( rc != prefix_size ) {
- CERROR("Write error!\n");
- EXIT;
- return -EIO;
- }
-
- if ( string1 && len1 ) {
- rc = presto_fwrite(f, string1, len1, off);
- if ( rc != len1 ) {
- CERROR("Write error!\n");
- EXIT;
- return -EIO;
- }
- }
-
- if ( string2 && len2 ) {
- rc = presto_fwrite(f, string2, len2, off);
- if ( rc != len2 ) {
- CERROR("Write error!\n");
- EXIT;
- return -EIO;
- }
- }
-
- if ( string3 && len3 ) {
- rc = presto_fwrite(f, string3, len3, off);
- if ( rc != len3 ) {
- CERROR("Write error!\n");
- EXIT;
- return -EIO;
- }
- }
-
- rc = presto_fwrite(f, buf + prefix_size,
- sizeof(struct kml_suffix), off);
- if ( rc != sizeof(struct kml_suffix) ) {
- CERROR("Write error!\n");
- EXIT;
- return -EIO;
- }
- return 0;
-}
-
-
-/*
- * rec->size must be valid prior to calling this function.
- *
- * had to export this for branch_reinter in kml_reint.c
- */
-int presto_log(struct presto_file_set *fset, struct rec_info *rec,
- const char *buf, size_t size,
- const char *string1, int len1,
- const char *string2, int len2,
- const char *string3, int len3)
-{
- int rc;
- struct presto_reservation_data rd;
- loff_t offset;
- struct presto_log_fd *fd;
- struct kml_suffix *s;
- int prefix_size;
-
- ENTRY;
-
- /* buf is NULL when no_journal is in effect */
- if (!buf) {
- EXIT;
- return -EINVAL;
- }
-
- if (rec->is_kml) {
- fd = &fset->fset_kml;
- } else {
- fd = &fset->fset_lml;
- }
-
- presto_reserve_record(fset, fd, rec, &rd);
-
- if (rec->is_kml) {
- if (rec->offset < fset->fset_kml_logical_off) {
- CERROR("record with pre-trunc offset. tell phil.\n");
- BUG();
- }
- offset = rec->offset - fset->fset_kml_logical_off;
- } else {
- offset = rec->offset;
- }
-
- /* now we know the record number */
- prefix_size = size - sizeof(struct kml_suffix);
- s = (struct kml_suffix *) (buf + prefix_size);
- s->recno = cpu_to_le32(rec->recno);
-
- rc = presto_write_record(fd->fd_file, &offset, buf, size,
- string1, len1, string2, len2, string3, len3);
- if (rc) {
- CERROR("presto: error writing record to %s\n",
- rec->is_kml ? "KML" : "LML");
- return rc;
- }
- presto_release_record(fd, &rd);
-
- rc = presto_kml_dispatch(fset);
-
- EXIT;
- return rc;
-}
-
-/* read from the record at tail */
-static int presto_last_record(struct presto_log_fd *fd, loff_t *size,
- loff_t *tail_offset, __u32 *recno, loff_t tail)
-{
- struct kml_suffix suffix;
- int rc;
- loff_t zeroes;
-
- *recno = 0;
- *tail_offset = 0;
- *size = 0;
-
- if (tail < sizeof(struct kml_prefix_hdr) + sizeof(suffix)) {
- EXIT;
- return 0;
- }
-
- zeroes = tail - sizeof(int);
- while ( zeroes >= 0 ) {
- int data;
- rc = presto_fread(fd->fd_file, (char *)&data, sizeof(data),
- &zeroes);
- if ( rc != sizeof(data) ) {
- rc = -EIO;
- return rc;
- }
- if (data)
- break;
- zeroes -= 2 * sizeof(data);
- }
-
- /* zeroes at the begining of file. this is needed to prevent
- presto_fread errors -SHP
- */
- if (zeroes <= 0) return 0;
-
- zeroes -= sizeof(suffix) + sizeof(int);
- rc = presto_fread(fd->fd_file, (char *)&suffix, sizeof(suffix), &zeroes);
- if ( rc != sizeof(suffix) ) {
- EXIT;
- return rc;
- }
- if ( suffix.len > 500 ) {
- CERROR("InterMezzo: Warning long record tail at %ld, rec tail_offset at %ld (size %d)\n",
- (long) zeroes, (long)*tail_offset, suffix.len);
- }
-
- *recno = suffix.recno;
- *size = suffix.len;
- *tail_offset = zeroes;
- return 0;
-}
-
-static int izo_kml_last_recno(struct presto_log_fd *logfd)
-{
- int rc;
- loff_t size;
- loff_t tail_offset;
- int recno;
- loff_t tail = logfd->fd_file->f_dentry->d_inode->i_size;
-
- rc = presto_last_record(logfd, &size, &tail_offset, &recno, tail);
- if (rc != 0) {
- EXIT;
- return rc;
- }
-
- logfd->fd_offset = tail_offset;
- logfd->fd_recno = recno;
- CDEBUG(D_JOURNAL, "setting fset_kml->fd_recno to %d, offset %Ld\n",
- recno, tail_offset);
- EXIT;
- return 0;
-}
-
-struct file *izo_log_open(struct presto_file_set *fset, char *name, int flags)
-{
- struct presto_cache *cache = fset->fset_cache;
- struct file *f;
- int error;
- ENTRY;
-
- f = izo_fset_open(fset, name, flags, 0644);
- error = PTR_ERR(f);
- if (IS_ERR(f)) {
- EXIT;
- return f;
- }
-
- error = -EINVAL;
- if ( cache != presto_get_cache(f->f_dentry->d_inode) ) {
- CERROR("InterMezzo: %s cache does not match fset cache!\n",name);
- fset->fset_kml.fd_file = NULL;
- filp_close(f, NULL);
- f = NULL;
- EXIT;
- return f;
- }
-
- if (cache->cache_filter && cache->cache_filter->o_trops &&
- cache->cache_filter->o_trops->tr_journal_data) {
- cache->cache_filter->o_trops->tr_journal_data
- (f->f_dentry->d_inode);
- } else {
- CERROR("InterMezzo WARNING: no file data logging!\n");
- }
-
- EXIT;
-
- return f;
-}
-
-int izo_init_kml_file(struct presto_file_set *fset, struct presto_log_fd *logfd)
-{
- int error = 0;
- struct file *f;
-
- ENTRY;
- if (logfd->fd_file) {
- CDEBUG(D_INODE, "fset already has KML open\n");
- EXIT;
- return 0;
- }
-
- logfd->fd_lock = RW_LOCK_UNLOCKED;
- INIT_LIST_HEAD(&logfd->fd_reservations);
- f = izo_log_open(fset, "kml", O_RDWR | O_CREAT);
- if (IS_ERR(f)) {
- error = PTR_ERR(f);
- return error;
- }
-
- logfd->fd_file = f;
- error = izo_kml_last_recno(logfd);
-
- if (error) {
- logfd->fd_file = NULL;
- filp_close(f, NULL);
- CERROR("InterMezzo: IO error in KML of fset %s\n",
- fset->fset_name);
- EXIT;
- return error;
- }
- fset->fset_lento_off = logfd->fd_offset;
- fset->fset_lento_recno = logfd->fd_recno;
-
- EXIT;
- return error;
-}
-
-int izo_init_last_rcvd_file(struct presto_file_set *fset, struct presto_log_fd *logfd)
-{
- int error = 0;
- struct file *f;
- struct rec_info recinfo;
-
- ENTRY;
- if (logfd->fd_file != NULL) {
- CDEBUG(D_INODE, "fset already has last_rcvd open\n");
- EXIT;
- return 0;
- }
-
- logfd->fd_lock = RW_LOCK_UNLOCKED;
- INIT_LIST_HEAD(&logfd->fd_reservations);
- f = izo_log_open(fset, "last_rcvd", O_RDWR | O_CREAT);
- if (IS_ERR(f)) {
- error = PTR_ERR(f);
- return error;
- }
-
- logfd->fd_file = f;
- logfd->fd_offset = f->f_dentry->d_inode->i_size;
-
- error = izo_rep_cache_init(fset);
-
- if (presto_read_kml_logical_offset(&recinfo, fset) == 0) {
- fset->fset_kml_logical_off = recinfo.offset;
- } else {
- /* The 'last_rcvd' file doesn't contain a kml offset record,
- * probably because we just created 'last_rcvd'. Write one. */
- fset->fset_kml_logical_off = 0;
- presto_write_kml_logical_offset(fset);
- }
-
- EXIT;
- return error;
-}
-
-int izo_init_lml_file(struct presto_file_set *fset, struct presto_log_fd *logfd)
-{
- int error = 0;
- struct file *f;
-
- ENTRY;
- if (logfd->fd_file) {
- CDEBUG(D_INODE, "fset already has lml open\n");
- EXIT;
- return 0;
- }
-
- logfd->fd_lock = RW_LOCK_UNLOCKED;
- INIT_LIST_HEAD(&logfd->fd_reservations);
- f = izo_log_open(fset, "lml", O_RDWR | O_CREAT);
- if (IS_ERR(f)) {
- error = PTR_ERR(f);
- return error;
- }
-
- logfd->fd_file = f;
- logfd->fd_offset = f->f_dentry->d_inode->i_size;
-
- EXIT;
- return error;
-}
-
-/* Get the KML-offset record from the last_rcvd file */
-int presto_read_kml_logical_offset(struct rec_info *recinfo,
- struct presto_file_set *fset)
-{
- loff_t off;
- struct izo_rcvd_rec rec;
- char uuid[16] = {0};
-
- off = izo_rcvd_get(&rec, fset, uuid);
- if (off < 0)
- return -1;
-
- recinfo->offset = rec.lr_local_offset;
- return 0;
-}
-
-int presto_write_kml_logical_offset(struct presto_file_set *fset)
-{
- loff_t rc;
- struct izo_rcvd_rec rec;
- char uuid[16] = {0};
-
- rc = izo_rcvd_get(&rec, fset, uuid);
- if (rc < 0)
- memset(&rec, 0, sizeof(rec));
-
- rec.lr_local_offset =
- cpu_to_le64(fset->fset_kml_logical_off);
-
- return izo_rcvd_write(fset, &rec);
-}
-
-struct file * presto_copy_kml_tail(struct presto_file_set *fset,
- unsigned long int start)
-{
- struct file *f;
- int len;
- loff_t read_off, write_off, bytes;
-
- ENTRY;
-
- /* Copy the tail of 'kml' to 'kml_tmp' */
- f = izo_log_open(fset, "kml_tmp", O_RDWR);
- if (IS_ERR(f)) {
- EXIT;
- return f;
- }
-
- write_off = 0;
- read_off = start;
- bytes = fset->fset_kml.fd_offset - start;
- while (bytes > 0) {
- char buf[4096];
- int toread;
-
- if (bytes > sizeof(buf))
- toread = sizeof(buf);
- else
- toread = bytes;
-
- len = presto_fread(fset->fset_kml.fd_file, buf, toread,
- &read_off);
- if (len <= 0)
- break;
-
- if (presto_fwrite(f, buf, len, &write_off) != len) {
- filp_close(f, NULL);
- EXIT;
- return ERR_PTR(-EIO);
- }
-
- bytes -= len;
- }
-
- EXIT;
- return f;
-}
-
-
-/* LML records here */
-/* this writes an LML record to the LML file (rec->is_kml =0) */
-int presto_write_lml_close(struct rec_info *rec,
- struct presto_file_set *fset,
- struct file *file,
- __u64 remote_ino,
- __u64 remote_generation,
- struct presto_version *remote_version,
- struct presto_version *new_file_ver)
-{
- int opcode = KML_OPCODE_CLOSE;
- char *buffer;
- struct dentry *dentry = file->f_dentry;
- __u64 ino;
- __u32 pathlen;
- char *path;
- __u32 generation;
- int size;
- char *logrecord;
- char record[292];
- struct dentry *root;
- int error;
-
- ENTRY;
-
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
- root = fset->fset_dentry;
-
- BUFF_ALLOC(buffer, NULL);
- path = presto_path(dentry, root, buffer, PAGE_SIZE);
- CDEBUG(D_INODE, "Path: %s\n", path);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- ino = cpu_to_le64(dentry->d_inode->i_ino);
- generation = cpu_to_le32(dentry->d_inode->i_generation);
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) + sizeof(*new_file_ver) +
- sizeof(ino) + sizeof(generation) + sizeof(pathlen) +
- sizeof(remote_ino) + sizeof(remote_generation) +
- sizeof(remote_version) + sizeof(rec->offset) +
- sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- rec->is_kml = 0;
- rec->size = size + size_round(le32_to_cpu(pathlen));
-
- logrecord = journal_log_prefix(record, opcode, rec);
- logrecord = log_version(logrecord, new_file_ver);
- logrecord = logit(logrecord, &ino, sizeof(ino));
- logrecord = logit(logrecord, &generation, sizeof(generation));
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = logit(logrecord, &remote_ino, sizeof(remote_ino));
- logrecord = logit(logrecord, &remote_generation,
- sizeof(remote_generation));
- logrecord = log_version(logrecord, remote_version);
- logrecord = logit(logrecord, &rec->offset, sizeof(rec->offset));
- logrecord = journal_log_suffix(logrecord, record, fset, dentry, rec);
-
- error = presto_log(fset, rec, record, size,
- path, size_round(le32_to_cpu(pathlen)),
- NULL, 0, NULL, 0);
-
- BUFF_FREE(buffer);
-
- EXIT;
- return error;
-}
-
-/*
- * Check if the given record is at the end of the file. If it is, truncate
- * the lml to the record's offset, removing it. Repeat on prior record,
- * until we reach an active record or a reserved record (as defined by the
- * reservations list).
- */
-static int presto_truncate_lml_tail(struct presto_file_set *fset)
-{
- loff_t lml_tail;
- loff_t lml_last_rec;
- loff_t lml_last_recsize;
- loff_t local_offset;
- int recno;
- struct kml_prefix_hdr prefix;
- struct inode *inode = fset->fset_lml.fd_file->f_dentry->d_inode;
- void *handle;
- int rc;
-
- ENTRY;
- /* If someone else is already truncating the LML, return. */
- write_lock(&fset->fset_lml.fd_lock);
- if (fset->fset_lml.fd_truncating == 1 ) {
- write_unlock(&fset->fset_lml.fd_lock);
- EXIT;
- return 0;
- }
- /* someone is about to write to the end of the LML */
- if ( !list_empty(&fset->fset_lml.fd_reservations) ) {
- write_unlock(&fset->fset_lml.fd_lock);
- EXIT;
- return 0;
- }
- lml_tail = fset->fset_lml.fd_file->f_dentry->d_inode->i_size;
- /* Nothing to truncate?*/
- if (lml_tail == 0) {
- write_unlock(&fset->fset_lml.fd_lock);
- EXIT;
- return 0;
- }
- fset->fset_lml.fd_truncating = 1;
- write_unlock(&fset->fset_lml.fd_lock);
-
- presto_last_record(&fset->fset_lml, &lml_last_recsize,
- &lml_last_rec, &recno, lml_tail);
- /* Do we have a record to check? If not we have zeroes at the
- beginning of the file. -SHP
- */
- if (lml_last_recsize != 0) {
- local_offset = lml_last_rec - lml_last_recsize;
- rc = presto_fread(fset->fset_lml.fd_file, (char *)&prefix,
- sizeof(prefix), &local_offset);
- if (rc != sizeof(prefix)) {
- EXIT;
- goto tr_out;
- }
-
- if ( prefix.opcode != KML_OPCODE_NOOP ) {
- EXIT;
- rc = 0;
- /* We may have zeroes at the end of the file, should
- we clear them out? -SHP
- */
- goto tr_out;
- }
- } else
- lml_last_rec=0;
-
- handle = presto_trans_start(fset, inode, KML_OPCODE_TRUNC);
- if ( IS_ERR(handle) ) {
- EXIT;
- rc = -ENOMEM;
- goto tr_out;
- }
-
- rc = izo_do_truncate(fset, fset->fset_lml.fd_file->f_dentry,
- lml_last_rec - lml_last_recsize, lml_tail);
- presto_trans_commit(fset, handle);
- if ( rc == 0 ) {
- rc = 1;
- }
- EXIT;
-
- tr_out:
- CDEBUG(D_JOURNAL, "rc = %d\n", rc);
- write_lock(&fset->fset_lml.fd_lock);
- fset->fset_lml.fd_truncating = 0;
- write_unlock(&fset->fset_lml.fd_lock);
- return rc;
-}
-
-int presto_truncate_lml(struct presto_file_set *fset)
-{
- int rc;
- ENTRY;
-
- while ( (rc = presto_truncate_lml_tail(fset)) > 0);
- if ( rc < 0 && rc != -EALREADY) {
- CERROR("truncate_lml error %d\n", rc);
- }
- EXIT;
- return rc;
-}
-
-int presto_clear_lml_close(struct presto_file_set *fset, loff_t lml_offset)
-{
- int rc;
- struct kml_prefix_hdr record;
- loff_t offset = lml_offset;
-
- ENTRY;
-
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- CDEBUG(D_JOURNAL, "reading prefix: off %ld, size %Zd\n",
- (long)lml_offset, sizeof(record));
- rc = presto_fread(fset->fset_lml.fd_file, (char *)&record,
- sizeof(record), &offset);
-
- if ( rc != sizeof(record) ) {
- CERROR("presto: clear_lml io error %d\n", rc);
- EXIT;
- return -EIO;
- }
-
- /* overwrite the prefix */
- CDEBUG(D_JOURNAL, "overwriting prefix: off %ld\n", (long)lml_offset);
- record.opcode = KML_OPCODE_NOOP;
- offset = lml_offset;
- /* note: this does just a single transaction in the cache */
- rc = presto_fwrite(fset->fset_lml.fd_file, (char *)(&record),
- sizeof(record), &offset);
- if ( rc != sizeof(record) ) {
- EXIT;
- return -EIO;
- }
-
- EXIT;
- return 0;
-}
-
-
-
-/* now a journal function for every operation */
-
-int presto_journal_setattr(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dentry, struct presto_version *old_ver,
- struct izo_rollback_data *rb, struct iattr *iattr)
-{
- int opcode = KML_OPCODE_SETATTR;
- char *buffer, *path, *logrecord, record[316];
- struct dentry *root;
- __u32 uid, gid, mode, valid, flags, pathlen;
- __u64 fsize, mtime, ctime;
- int error, size;
-
- ENTRY;
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- if (!dentry->d_inode || (dentry->d_inode->i_nlink == 0)
- || ((dentry->d_parent != dentry) && d_unhashed(dentry))) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- BUFF_ALLOC(buffer, NULL);
- path = presto_path(dentry, root, buffer, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) + sizeof(*old_ver) +
- sizeof(valid) + sizeof(mode) + sizeof(uid) + sizeof(gid) +
- sizeof(fsize) + sizeof(mtime) + sizeof(ctime) + sizeof(flags) +
- sizeof(pathlen) + sizeof(*rb) + sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- /* Only journal one kind of mtime, and not atime at all. Also don't
- * journal bogus data in iattr, to make the journal more compressible.
- */
- if (iattr->ia_valid & ATTR_MTIME_SET)
- iattr->ia_valid = iattr->ia_valid | ATTR_MTIME;
- valid = cpu_to_le32(iattr->ia_valid & ~(ATTR_ATIME | ATTR_MTIME_SET |
- ATTR_ATIME_SET));
- mode = iattr->ia_valid & ATTR_MODE ? cpu_to_le32(iattr->ia_mode): 0;
- uid = iattr->ia_valid & ATTR_UID ? cpu_to_le32(iattr->ia_uid): 0;
- gid = iattr->ia_valid & ATTR_GID ? cpu_to_le32(iattr->ia_gid): 0;
- fsize = iattr->ia_valid & ATTR_SIZE ? cpu_to_le64(iattr->ia_size): 0;
- mtime = iattr->ia_valid & ATTR_MTIME ? cpu_to_le64(iattr->ia_mtime.tv_sec): 0;
- ctime = iattr->ia_valid & ATTR_CTIME ? cpu_to_le64(iattr->ia_ctime.tv_sec): 0;
- flags = iattr->ia_valid & ATTR_ATTR_FLAG ?
- cpu_to_le32(iattr->ia_attr_flags): 0;
-
- rec->is_kml = 1;
- rec->size = size + size_round(le32_to_cpu(pathlen));
-
- logrecord = journal_log_prefix(record, opcode, rec);
- logrecord = log_version(logrecord, old_ver);
- logrecord = logit(logrecord, &valid, sizeof(valid));
- logrecord = logit(logrecord, &mode, sizeof(mode));
- logrecord = logit(logrecord, &uid, sizeof(uid));
- logrecord = logit(logrecord, &gid, sizeof(gid));
- logrecord = logit(logrecord, &fsize, sizeof(fsize));
- logrecord = logit(logrecord, &mtime, sizeof(mtime));
- logrecord = logit(logrecord, &ctime, sizeof(ctime));
- logrecord = logit(logrecord, &flags, sizeof(flags));
- logrecord = log_rollback(logrecord, rb);
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = journal_log_suffix(logrecord, record, fset, dentry, rec);
-
- error = presto_log(fset, rec, record, size,
- path, size_round(le32_to_cpu(pathlen)),
- NULL, 0, NULL, 0);
-
- BUFF_FREE(buffer);
- EXIT;
- return error;
-}
-
-int presto_get_fileid(int minor, struct presto_file_set *fset,
- struct dentry *dentry)
-{
- int opcode = KML_OPCODE_GET_FILEID;
- struct rec_info rec;
- char *buffer, *path, *logrecord, record[4096]; /*include path*/
- struct dentry *root;
- __u32 uid, gid, pathlen;
- int error, size;
- struct kml_suffix *suffix;
-
- ENTRY;
-
- root = fset->fset_dentry;
-
- uid = cpu_to_le32(dentry->d_inode->i_uid);
- gid = cpu_to_le32(dentry->d_inode->i_gid);
- BUFF_ALLOC(buffer, NULL);
- path = presto_path(dentry, root, buffer, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) + sizeof(pathlen) +
- size_round(le32_to_cpu(pathlen)) +
- sizeof(struct kml_suffix);
-
- CDEBUG(D_FILE, "kml size: %d\n", size);
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- memset(&rec, 0, sizeof(rec));
- rec.is_kml = 1;
- rec.size = size;
-
- logrecord = journal_log_prefix(record, opcode, &rec);
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = logit(logrecord, path, size_round(le32_to_cpu(pathlen)));
- suffix = (struct kml_suffix *)logrecord;
- logrecord = journal_log_suffix(logrecord, record, fset, dentry, &rec);
- /* journal_log_suffix expects journal_log to set this */
- suffix->recno = 0;
-
- CDEBUG(D_FILE, "actual kml size: %Zd\n", logrecord - record);
- CDEBUG(D_FILE, "get fileid: uid %d, gid %d, path: %s\n", uid, gid,path);
-
- error = izo_upc_get_fileid(minor, size, record,
- size_round(le32_to_cpu(pathlen)), path,
- fset->fset_name);
-
- BUFF_FREE(buffer);
- EXIT;
- return error;
-}
-
-int presto_journal_create(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dentry,
- struct presto_version *tgt_dir_ver,
- struct presto_version *new_file_ver, int mode)
-{
- int opcode = KML_OPCODE_CREATE;
- char *buffer, *path, *logrecord, record[292];
- struct dentry *root;
- __u32 uid, gid, lmode, pathlen;
- int error, size;
-
- ENTRY;
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- uid = cpu_to_le32(dentry->d_inode->i_uid);
- gid = cpu_to_le32(dentry->d_inode->i_gid);
- lmode = cpu_to_le32(mode);
-
- BUFF_ALLOC(buffer, NULL);
- path = presto_path(dentry, root, buffer, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) + 3 * sizeof(*tgt_dir_ver) +
- sizeof(lmode) + sizeof(uid) + sizeof(gid) + sizeof(pathlen) +
- sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- rec->is_kml = 1;
- rec->size = size + size_round(le32_to_cpu(pathlen));
-
- logrecord = journal_log_prefix(record, opcode, rec);
- logrecord = log_version(logrecord, tgt_dir_ver);
- logrecord = log_dentry_version(logrecord, dentry->d_parent);
- logrecord = log_version(logrecord, new_file_ver);
- logrecord = logit(logrecord, &lmode, sizeof(lmode));
- logrecord = logit(logrecord, &uid, sizeof(uid));
- logrecord = logit(logrecord, &gid, sizeof(gid));
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = journal_log_suffix(logrecord, record, fset, dentry, rec);
-
- error = presto_log(fset, rec, record, size,
- path, size_round(le32_to_cpu(pathlen)),
- NULL, 0, NULL, 0);
-
- BUFF_FREE(buffer);
- EXIT;
- return error;
-}
-
-int presto_journal_symlink(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dentry, const char *target,
- struct presto_version *tgt_dir_ver,
- struct presto_version *new_link_ver)
-{
- int opcode = KML_OPCODE_SYMLINK;
- char *buffer, *path, *logrecord, record[292];
- struct dentry *root;
- __u32 uid, gid, pathlen;
- __u32 targetlen = cpu_to_le32(strlen(target));
- int error, size;
-
- ENTRY;
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- uid = cpu_to_le32(dentry->d_inode->i_uid);
- gid = cpu_to_le32(dentry->d_inode->i_gid);
-
- BUFF_ALLOC(buffer, NULL);
- path = presto_path(dentry, root, buffer, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) + 3 * sizeof(*tgt_dir_ver) +
- sizeof(uid) + sizeof(gid) + sizeof(pathlen) +
- sizeof(targetlen) + sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- rec->is_kml = 1;
- rec->size = size + size_round(le32_to_cpu(pathlen)) +
- size_round(le32_to_cpu(targetlen));
-
- logrecord = journal_log_prefix(record, opcode, rec);
- logrecord = log_version(logrecord, tgt_dir_ver);
- logrecord = log_dentry_version(logrecord, dentry->d_parent);
- logrecord = log_version(logrecord, new_link_ver);
- logrecord = logit(logrecord, &uid, sizeof(uid));
- logrecord = logit(logrecord, &gid, sizeof(gid));
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = logit(logrecord, &targetlen, sizeof(targetlen));
- logrecord = journal_log_suffix(logrecord, record, fset, dentry, rec);
-
- error = presto_log(fset, rec, record, size,
- path, size_round(le32_to_cpu(pathlen)),
- target, size_round(le32_to_cpu(targetlen)),
- NULL, 0);
-
- BUFF_FREE(buffer);
- EXIT;
- return error;
-}
-
-int presto_journal_mkdir(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dentry,
- struct presto_version *tgt_dir_ver,
- struct presto_version *new_dir_ver, int mode)
-{
- int opcode = KML_OPCODE_MKDIR;
- char *buffer, *path, *logrecord, record[292];
- struct dentry *root;
- __u32 uid, gid, lmode, pathlen;
- int error, size;
-
- ENTRY;
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- uid = cpu_to_le32(dentry->d_inode->i_uid);
- gid = cpu_to_le32(dentry->d_inode->i_gid);
- lmode = cpu_to_le32(mode);
-
- BUFF_ALLOC(buffer, NULL);
- path = presto_path(dentry, root, buffer, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) + 3 * sizeof(*tgt_dir_ver) +
- sizeof(lmode) + sizeof(uid) + sizeof(gid) + sizeof(pathlen) +
- sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- rec->is_kml = 1;
- rec->size = size + size_round(le32_to_cpu(pathlen));
- logrecord = journal_log_prefix(record, opcode, rec);
-
- logrecord = log_version(logrecord, tgt_dir_ver);
- logrecord = log_dentry_version(logrecord, dentry->d_parent);
- logrecord = log_version(logrecord, new_dir_ver);
- logrecord = logit(logrecord, &lmode, sizeof(lmode));
- logrecord = logit(logrecord, &uid, sizeof(uid));
- logrecord = logit(logrecord, &gid, sizeof(gid));
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = journal_log_suffix(logrecord, record, fset, dentry, rec);
-
- error = presto_log(fset, rec, record, size,
- path, size_round(le32_to_cpu(pathlen)),
- NULL, 0, NULL, 0);
-
- BUFF_FREE(buffer);
- EXIT;
- return error;
-}
-
-
-int
-presto_journal_rmdir(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dir, struct presto_version *tgt_dir_ver,
- struct presto_version *old_dir_ver,
- struct izo_rollback_data *rb, int len, const char *name)
-{
- int opcode = KML_OPCODE_RMDIR;
- char *buffer, *path, *logrecord, record[316];
- __u32 pathlen, llen;
- struct dentry *root;
- int error, size;
-
- ENTRY;
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- llen = cpu_to_le32(len);
- BUFF_ALLOC(buffer, NULL);
- path = presto_path(dir, root, buffer, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) + 3 * sizeof(*tgt_dir_ver) +
- sizeof(pathlen) + sizeof(llen) + sizeof(*rb) +
- sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- CDEBUG(D_JOURNAL, "path: %s (%d), name: %s (%d), size %d\n",
- path, pathlen, name, len, size);
-
- rec->is_kml = 1;
- rec->size = size + size_round(le32_to_cpu(pathlen)) +
- size_round(len);
-
- logrecord = journal_log_prefix(record, opcode, rec);
- logrecord = log_version(logrecord, tgt_dir_ver);
- logrecord = log_dentry_version(logrecord, dir);
- logrecord = log_version(logrecord, old_dir_ver);
- logrecord = logit(logrecord, rb, sizeof(*rb));
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = logit(logrecord, &llen, sizeof(llen));
- logrecord = journal_log_suffix(logrecord, record, fset, dir, rec);
- error = presto_log(fset, rec, record, size,
- path, size_round(le32_to_cpu(pathlen)),
- name, size_round(len),
- NULL, 0);
-
- BUFF_FREE(buffer);
- EXIT;
- return error;
-}
-
-
-int
-presto_journal_mknod(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dentry, struct presto_version *tgt_dir_ver,
- struct presto_version *new_node_ver, int mode,
- int dmajor, int dminor )
-{
- int opcode = KML_OPCODE_MKNOD;
- char *buffer, *path, *logrecord, record[292];
- struct dentry *root;
- __u32 uid, gid, lmode, lmajor, lminor, pathlen;
- int error, size;
-
- ENTRY;
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- uid = cpu_to_le32(dentry->d_inode->i_uid);
- gid = cpu_to_le32(dentry->d_inode->i_gid);
- lmode = cpu_to_le32(mode);
- lmajor = cpu_to_le32(dmajor);
- lminor = cpu_to_le32(dminor);
-
- BUFF_ALLOC(buffer, NULL);
- path = presto_path(dentry, root, buffer, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) + 3 * sizeof(*tgt_dir_ver) +
- sizeof(lmode) + sizeof(uid) + sizeof(gid) + sizeof(lmajor) +
- sizeof(lminor) + sizeof(pathlen) +
- sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- rec->is_kml = 1;
- rec->size = size + size_round(le32_to_cpu(pathlen));
-
- logrecord = journal_log_prefix(record, opcode, rec);
- logrecord = log_version(logrecord, tgt_dir_ver);
- logrecord = log_dentry_version(logrecord, dentry->d_parent);
- logrecord = log_version(logrecord, new_node_ver);
- logrecord = logit(logrecord, &lmode, sizeof(lmode));
- logrecord = logit(logrecord, &uid, sizeof(uid));
- logrecord = logit(logrecord, &gid, sizeof(gid));
- logrecord = logit(logrecord, &lmajor, sizeof(lmajor));
- logrecord = logit(logrecord, &lminor, sizeof(lminor));
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = journal_log_suffix(logrecord, record, fset, dentry, rec);
-
- error = presto_log(fset, rec, record, size,
- path, size_round(le32_to_cpu(pathlen)),
- NULL, 0, NULL, 0);
-
- BUFF_FREE(buffer);
- EXIT;
- return error;
-}
-
-int
-presto_journal_link(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *src, struct dentry *tgt,
- struct presto_version *tgt_dir_ver,
- struct presto_version *new_link_ver)
-{
- int opcode = KML_OPCODE_LINK;
- char *buffer, *srcbuffer, *path, *srcpath, *logrecord, record[292];
- __u32 pathlen, srcpathlen;
- struct dentry *root;
- int error, size;
-
- ENTRY;
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- BUFF_ALLOC(srcbuffer, NULL);
- srcpath = presto_path(src, root, srcbuffer, PAGE_SIZE);
- srcpathlen = cpu_to_le32(MYPATHLEN(srcbuffer, srcpath));
-
- BUFF_ALLOC(buffer, srcbuffer);
- path = presto_path(tgt, root, buffer, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) + 3 * sizeof(*tgt_dir_ver) +
- sizeof(srcpathlen) + sizeof(pathlen) +
- sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- rec->is_kml = 1;
- rec->size = size + size_round(le32_to_cpu(pathlen)) +
- size_round(le32_to_cpu(srcpathlen));
-
- logrecord = journal_log_prefix(record, opcode, rec);
- logrecord = log_version(logrecord, tgt_dir_ver);
- logrecord = log_dentry_version(logrecord, tgt->d_parent);
- logrecord = log_version(logrecord, new_link_ver);
- logrecord = logit(logrecord, &srcpathlen, sizeof(srcpathlen));
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = journal_log_suffix(logrecord, record, fset, tgt, rec);
-
- error = presto_log(fset, rec, record, size,
- srcpath, size_round(le32_to_cpu(srcpathlen)),
- path, size_round(le32_to_cpu(pathlen)),
- NULL, 0);
-
- BUFF_FREE(srcbuffer);
- BUFF_FREE(buffer);
- EXIT;
- return error;
-}
-
-
-int presto_journal_rename(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *src, struct dentry *tgt,
- struct presto_version *src_dir_ver,
- struct presto_version *tgt_dir_ver)
-{
- int opcode = KML_OPCODE_RENAME;
- char *buffer, *srcbuffer, *path, *srcpath, *logrecord, record[292];
- __u32 pathlen, srcpathlen;
- struct dentry *root;
- int error, size;
-
- ENTRY;
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- BUFF_ALLOC(srcbuffer, NULL);
- srcpath = presto_path(src, root, srcbuffer, PAGE_SIZE);
- srcpathlen = cpu_to_le32(MYPATHLEN(srcbuffer, srcpath));
-
- BUFF_ALLOC(buffer, srcbuffer);
- path = presto_path(tgt, root, buffer, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) + 4 * sizeof(*src_dir_ver) +
- sizeof(srcpathlen) + sizeof(pathlen) +
- sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- rec->is_kml = 1;
- rec->size = size + size_round(le32_to_cpu(pathlen)) +
- size_round(le32_to_cpu(srcpathlen));
-
- logrecord = journal_log_prefix(record, opcode, rec);
- logrecord = log_version(logrecord, src_dir_ver);
- logrecord = log_dentry_version(logrecord, src->d_parent);
- logrecord = log_version(logrecord, tgt_dir_ver);
- logrecord = log_dentry_version(logrecord, tgt->d_parent);
- logrecord = logit(logrecord, &srcpathlen, sizeof(srcpathlen));
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = journal_log_suffix(logrecord, record, fset, tgt, rec);
-
- error = presto_log(fset, rec, record, size,
- srcpath, size_round(le32_to_cpu(srcpathlen)),
- path, size_round(le32_to_cpu(pathlen)),
- NULL, 0);
-
- BUFF_FREE(buffer);
- BUFF_FREE(srcbuffer);
- EXIT;
- return error;
-}
-
-int presto_journal_unlink(struct rec_info *rec, struct presto_file_set *fset,
- struct dentry *dir, struct presto_version *tgt_dir_ver,
- struct presto_version *old_file_ver,
- struct izo_rollback_data *rb, struct dentry *dentry,
- char *old_target, int old_targetlen)
-{
- int opcode = KML_OPCODE_UNLINK;
- char *buffer, *path, *logrecord, record[316];
- const char *name;
- __u32 pathlen, llen;
- struct dentry *root;
- int error, size, len;
-
- ENTRY;
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- name = dentry->d_name.name;
- len = dentry->d_name.len;
-
- llen = cpu_to_le32(len);
- BUFF_ALLOC(buffer, NULL);
- path = presto_path(dir, root, buffer, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) + 3 * sizeof(*tgt_dir_ver) +
- sizeof(pathlen) + sizeof(llen) + sizeof(*rb) +
- sizeof(old_targetlen) + sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- rec->is_kml = 1;
- rec->size = size + size_round(le32_to_cpu(pathlen)) + size_round(len) +
- size_round(old_targetlen);
-
- logrecord = journal_log_prefix(record, opcode, rec);
- logrecord = log_version(logrecord, tgt_dir_ver);
- logrecord = log_dentry_version(logrecord, dir);
- logrecord = log_version(logrecord, old_file_ver);
- logrecord = log_rollback(logrecord, rb);
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = logit(logrecord, &llen, sizeof(llen));
- logrecord = logit(logrecord, &old_targetlen, sizeof(old_targetlen));
- logrecord = journal_log_suffix(logrecord, record, fset, dir, rec);
-
- error = presto_log(fset, rec, record, size,
- path, size_round(le32_to_cpu(pathlen)),
- name, size_round(len),
- old_target, size_round(old_targetlen));
-
- BUFF_FREE(buffer);
- EXIT;
- return error;
-}
-
-int
-presto_journal_close(struct rec_info *rec, struct presto_file_set *fset,
- struct presto_file_data *fd, struct dentry *dentry,
- struct presto_version *old_file_ver,
- struct presto_version *new_file_ver)
-{
- int opcode = KML_OPCODE_CLOSE;
- char *buffer, *path, *logrecord, record[316];
- struct dentry *root;
- int error, size, i;
- __u32 pathlen, generation;
- __u64 ino;
- __u32 open_fsuid;
- __u32 open_fsgid;
- __u32 open_ngroups;
- __u32 open_groups[NGROUPS_SMALL];
- __u32 open_mode;
- __u32 open_uid;
- __u32 open_gid;
-
- ENTRY;
-
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- if (!dentry->d_inode || (dentry->d_inode->i_nlink == 0)
- || ((dentry->d_parent != dentry) && d_unhashed(dentry))) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- if (fd) {
- open_ngroups = fd->fd_ngroups;
- for (i = 0; i < fd->fd_ngroups; i++)
- open_groups[i] = (__u32) fd->fd_groups[i];
- open_mode = fd->fd_mode;
- open_uid = fd->fd_uid;
- open_gid = fd->fd_gid;
- open_fsuid = fd->fd_fsuid;
- open_fsgid = fd->fd_fsgid;
- } else {
- open_ngroups = current->group_info->ngroups;
- for (i=0; i<current->group_info->ngroups; i++)
- open_groups[i] = (__u32) GROUP_AT(current->group_info,i);
- open_mode = dentry->d_inode->i_mode;
- open_uid = dentry->d_inode->i_uid;
- open_gid = dentry->d_inode->i_gid;
- open_fsuid = current->fsuid;
- open_fsgid = current->fsgid;
- }
- BUFF_ALLOC(buffer, NULL);
- path = presto_path(dentry, root, buffer, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(buffer, path));
- ino = cpu_to_le64(dentry->d_inode->i_ino);
- generation = cpu_to_le32(dentry->d_inode->i_generation);
- size = sizeof(__u32) * open_ngroups +
- sizeof(open_mode) + sizeof(open_uid) + sizeof(open_gid) +
- sizeof(struct kml_prefix_hdr) + sizeof(*old_file_ver) +
- sizeof(*new_file_ver) + sizeof(ino) + sizeof(generation) +
- sizeof(pathlen) + sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- rec->is_kml = 1;
- rec->size = size + size_round(le32_to_cpu(pathlen));
-
- logrecord = journal_log_prefix_with_groups_and_ids(
- record, opcode, rec, open_ngroups, open_groups,
- open_fsuid, open_fsgid);
- logrecord = logit(logrecord, &open_mode, sizeof(open_mode));
- logrecord = logit(logrecord, &open_uid, sizeof(open_uid));
- logrecord = logit(logrecord, &open_gid, sizeof(open_gid));
- logrecord = log_version(logrecord, old_file_ver);
- logrecord = log_version(logrecord, new_file_ver);
- logrecord = logit(logrecord, &ino, sizeof(ino));
- logrecord = logit(logrecord, &generation, sizeof(generation));
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = journal_log_suffix(logrecord, record, fset, dentry, rec);
-
- error = presto_log(fset, rec, record, size,
- path, size_round(le32_to_cpu(pathlen)),
- NULL, 0, NULL, 0);
- BUFF_FREE(buffer);
-
- EXIT;
- return error;
-}
-
-int presto_rewrite_close(struct rec_info *rec, struct presto_file_set *fset,
- char *path, __u32 pathlen,
- int ngroups, __u32 *groups,
- __u64 ino, __u32 generation,
- struct presto_version *new_file_ver)
-{
- int opcode = KML_OPCODE_CLOSE;
- char *logrecord, record[292];
- struct dentry *root;
- int error, size;
-
- ENTRY;
-
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- size = sizeof(__u32) * ngroups +
- sizeof(struct kml_prefix_hdr) + sizeof(*new_file_ver) +
- sizeof(ino) + sizeof(generation) +
- sizeof(le32_to_cpu(pathlen)) +
- sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- rec->is_kml = 1;
- rec->size = size + size_round(le32_to_cpu(pathlen));
-
- logrecord = journal_log_prefix_with_groups(record, opcode, rec,
- ngroups, groups);
- logrecord = log_version(logrecord, new_file_ver);
- logrecord = logit(logrecord, &ino, sizeof(ino));
- logrecord = logit(logrecord, &generation, sizeof(generation));
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = journal_log_suffix(logrecord, record, fset, NULL, rec);
-
- error = presto_log(fset, rec, record, size,
- path, size_round(le32_to_cpu(pathlen)),
- NULL, 0, NULL, 0);
-
- EXIT;
- return error;
-}
-
-
-/* write closes for the local close records in the LML */
-int presto_complete_lml(struct presto_file_set *fset)
-{
- __u32 groups[NGROUPS_SMALL];
- loff_t lml_offset;
- loff_t read_offset;
- char *buffer;
- void *handle;
- struct rec_info rec;
- struct close_rec {
- struct presto_version new_file_ver;
- __u64 ino;
- __u32 generation;
- __u32 pathlen;
- __u64 remote_ino;
- __u32 remote_generation;
- __u32 remote_version;
- __u64 lml_offset;
- } close_rec;
- struct file *file = fset->fset_lml.fd_file;
- struct kml_prefix_hdr prefix;
- int rc = 0;
- ENTRY;
-
- lml_offset = 0;
- again:
- if (lml_offset >= file->f_dentry->d_inode->i_size) {
- EXIT;
- return rc;
- }
-
- read_offset = lml_offset;
- rc = presto_fread(file, (char *)&prefix,
- sizeof(prefix), &read_offset);
- if ( rc != sizeof(prefix) ) {
- EXIT;
- CERROR("presto_complete_lml: ioerror - 1, tell Peter\n");
- return -EIO;
- }
-
- if ( prefix.opcode == KML_OPCODE_NOOP ) {
- lml_offset += prefix.len;
- goto again;
- }
-
- rc = presto_fread(file, (char *)groups,
- prefix.ngroups * sizeof(__u32), &read_offset);
- if ( rc != prefix.ngroups * sizeof(__u32) ) {
- EXIT;
- CERROR("presto_complete_lml: ioerror - 2, tell Peter\n");
- return -EIO;
- }
-
- rc = presto_fread(file, (char *)&close_rec,
- sizeof(close_rec), &read_offset);
- if ( rc != sizeof(close_rec) ) {
- EXIT;
- CERROR("presto_complete_lml: ioerror - 3, tell Peter\n");
- return -EIO;
- }
-
- /* is this a backfetch or a close record? */
- if ( le64_to_cpu(close_rec.remote_ino) != 0 ) {
- lml_offset += prefix.len;
- goto again;
- }
-
- BUFF_ALLOC(buffer, NULL);
- rc = presto_fread(file, (char *)buffer,
- le32_to_cpu(close_rec.pathlen), &read_offset);
- if ( rc != le32_to_cpu(close_rec.pathlen) ) {
- EXIT;
- CERROR("presto_complete_lml: ioerror - 4, tell Peter\n");
- return -EIO;
- }
-
- handle = presto_trans_start(fset, file->f_dentry->d_inode,
- KML_OPCODE_RELEASE);
- if ( IS_ERR(handle) ) {
- EXIT;
- return -ENOMEM;
- }
-
- rc = presto_clear_lml_close(fset, lml_offset);
- if ( rc ) {
- CERROR("error during clearing: %d\n", rc);
- presto_trans_commit(fset, handle);
- EXIT;
- return rc;
- }
-
- rc = presto_rewrite_close(&rec, fset, buffer, close_rec.pathlen,
- prefix.ngroups, groups,
- close_rec.ino, close_rec.generation,
- &close_rec.new_file_ver);
- if ( rc ) {
- CERROR("error during rewrite close: %d\n", rc);
- presto_trans_commit(fset, handle);
- EXIT;
- return rc;
- }
-
- presto_trans_commit(fset, handle);
- if ( rc ) {
- CERROR("error during truncation: %d\n", rc);
- EXIT;
- return rc;
- }
-
- lml_offset += prefix.len;
- CDEBUG(D_JOURNAL, "next LML record at: %ld\n", (long)lml_offset);
- goto again;
-
- EXIT;
- return -EINVAL;
-}
-
-
-#ifdef CONFIG_FS_EXT_ATTR
-/* Journal an ea operation. A NULL buffer implies the attribute is
- * getting deleted. In this case we simply change the opcode, but nothing
- * else is affected.
- */
-int presto_journal_set_ext_attr (struct rec_info *rec,
- struct presto_file_set *fset,
- struct dentry *dentry,
- struct presto_version *ver, const char *name,
- const char *buffer, int buffer_len,
- int flags)
-{
- int opcode = (buffer == NULL) ?
- KML_OPCODE_DELEXTATTR :
- KML_OPCODE_SETEXTATTR ;
- char *temp, *path, *logrecord, record[292];
- struct dentry *root;
- int error, size;
- __u32 namelen=cpu_to_le32(strnlen(name,PRESTO_EXT_ATTR_NAME_MAX));
- __u32 buflen=(buffer != NULL)? cpu_to_le32(buffer_len): cpu_to_le32(0);
- __u32 mode, pathlen;
-
- ENTRY;
- if ( presto_no_journal(fset) ) {
- EXIT;
- return 0;
- }
-
- if (!dentry->d_inode || (dentry->d_inode->i_nlink == 0)
- || ((dentry->d_parent != dentry) && d_unhashed(dentry))) {
- EXIT;
- return 0;
- }
-
- root = fset->fset_dentry;
-
- BUFF_ALLOC(temp, NULL);
- path = presto_path(dentry, root, temp, PAGE_SIZE);
- pathlen = cpu_to_le32(MYPATHLEN(temp, path));
-
- flags=cpu_to_le32(flags);
- /* Ugly, but needed. posix ACLs change the mode without using
- * setattr, we need to record these changes. The EA code per se
- * is not really affected.
- */
- mode=cpu_to_le32(dentry->d_inode->i_mode);
-
- size = sizeof(__u32) * current->group_info->ngroups +
- sizeof(struct kml_prefix_hdr) +
- 2 * sizeof(struct presto_version) +
- sizeof(flags) + sizeof(mode) + sizeof(namelen) +
- sizeof(buflen) + sizeof(pathlen) +
- sizeof(struct kml_suffix);
-
- if ( size > sizeof(record) )
- CERROR("InterMezzo: BUFFER OVERFLOW in %s!\n", __FUNCTION__);
-
- rec->is_kml = 1;
- /* Make space for a path, a attr name and value*/
- /* We use the buflen instead of buffer_len to make sure that we
- * journal the right length. This may be a little paranoid, but
- * with 64 bits round the corner, I would rather be safe than sorry!
- * Also this handles deletes with non-zero buffer_lengths correctly.
- * SHP
- */
- rec->size = size + size_round(le32_to_cpu(pathlen)) +
- size_round(le32_to_cpu(namelen)) +
- size_round(le32_to_cpu(buflen));
-
- logrecord = journal_log_prefix(record, opcode, rec);
- logrecord = log_version(logrecord, ver);
- logrecord = log_dentry_version(logrecord, dentry);
- logrecord = logit(logrecord, &flags, sizeof(flags));
- logrecord = logit(logrecord, &mode, sizeof(flags));
- logrecord = logit(logrecord, &pathlen, sizeof(pathlen));
- logrecord = logit(logrecord, &namelen, sizeof(namelen));
- logrecord = logit(logrecord, &buflen, sizeof(buflen));
- logrecord = journal_log_suffix(logrecord, record, fset, dentry, rec);
-
- error = presto_log(fset, rec, record, size,
- path, size_round(le32_to_cpu(pathlen)),
- name, size_round(le32_to_cpu(namelen)),
- buffer, size_round(le32_to_cpu(buflen)));
-
- BUFF_FREE(temp);
- EXIT;
- return error;
-}
-#endif
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 1998 Peter J. Braam <braam@clusterfs.com>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <asm/segment.h>
-#include <asm/uaccess.h>
-#include <linux/string.h>
-#include <linux/ext2_fs.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-#if defined(CONFIG_EXT2_FS)
-
-/* EXT2 has no journalling, so these functions do nothing */
-static loff_t presto_e2_freespace(struct presto_cache *cache,
- struct super_block *sb)
-{
- unsigned long freebl = le32_to_cpu(EXT2_SB(sb)->s_es->s_free_blocks_count);
- unsigned long avail = freebl - le32_to_cpu(EXT2_SB(sb)->s_es->s_r_blocks_count);
- return (avail << EXT2_BLOCK_SIZE_BITS(sb));
-}
-
-/* start the filesystem journal operations */
-static void *presto_e2_trans_start(struct presto_file_set *fset, struct inode *inode, int op)
-{
- __u32 avail_kmlblocks;
-
- if ( presto_no_journal(fset) ||
- strcmp(fset->fset_cache->cache_type, "ext2"))
- return NULL;
-
- avail_kmlblocks = EXT2_SB(inode->i_sb)->s_es->s_free_blocks_count;
-
- if ( avail_kmlblocks < 3 ) {
- return ERR_PTR(-ENOSPC);
- }
-
- if ( (op != KML_OPCODE_UNLINK && op != KML_OPCODE_RMDIR)
- && avail_kmlblocks < 6 ) {
- return ERR_PTR(-ENOSPC);
- }
- return (void *) 1;
-}
-
-static void presto_e2_trans_commit(struct presto_file_set *fset, void *handle)
-{
- do {} while (0);
-}
-
-static int presto_e2_has_all_data(struct inode *inode)
-{
- BUG();
- return 0;
-}
-
-struct journal_ops presto_ext2_journal_ops = {
- .tr_all_data = presto_e2_has_all_data,
- .tr_avail = presto_e2_freespace,
- .tr_start = presto_e2_trans_start,
- .tr_commit = presto_e2_trans_commit,
- .tr_journal_data = NULL
-};
-
-#endif /* CONFIG_EXT2_FS */
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 1998 Peter J. Braam <braam@clusterfs.com>
- * Copyright (C) 2000 Red Hat, Inc.
- * Copyright (C) 2000 Los Alamos National Laboratory
- * Copyright (C) 2000 TurboLinux, Inc.
- * Copyright (C) 2001 Mountain View Data, Inc.
- * Copyright (C) 2001 Tacit Networks, Inc. <phil@off.net>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/types.h>
-#include <linux/param.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <asm/segment.h>
-#include <asm/uaccess.h>
-#include <linux/string.h>
-#if defined(CONFIG_EXT3_FS) || defined (CONFIG_EXT3_FS_MODULE)
-#include <linux/jbd.h>
-#include <linux/ext3_fs.h>
-#include <linux/ext3_jbd.h>
-#endif
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-#if defined(CONFIG_EXT3_FS) || defined (CONFIG_EXT3_FS_MODULE)
-
-#define MAX_PATH_BLOCKS(inode) (PATH_MAX >> EXT3_BLOCK_SIZE_BITS((inode)->i_sb))
-#define MAX_NAME_BLOCKS(inode) (NAME_MAX >> EXT3_BLOCK_SIZE_BITS((inode)->i_sb))
-
-/* space requirements:
- presto_do_truncate:
- used to truncate the KML forward to next fset->chunksize boundary
- - zero partial block
- - update inode
- presto_write_record:
- write header (< one block)
- write one path (< MAX_PATHLEN)
- possibly write another path (< MAX_PATHLEN)
- write suffix (< one block)
- presto_update_last_rcvd
- write one block
-*/
-
-static loff_t presto_e3_freespace(struct presto_cache *cache,
- struct super_block *sb)
-{
- loff_t freebl = le32_to_cpu(EXT3_SB(sb)->s_es->s_free_blocks_count);
- loff_t avail = freebl -
- le32_to_cpu(EXT3_SB(sb)->s_es->s_r_blocks_count);
- return (avail << EXT3_BLOCK_SIZE_BITS(sb));
-}
-
-/* start the filesystem journal operations */
-static void *presto_e3_trans_start(struct presto_file_set *fset,
- struct inode *inode,
- int op)
-{
- int jblocks;
- int trunc_blks, one_path_blks, extra_path_blks,
- extra_name_blks, lml_blks;
- __u32 avail_kmlblocks;
- handle_t *handle;
-
- if ( presto_no_journal(fset) ||
- strcmp(fset->fset_cache->cache_type, "ext3"))
- {
- CDEBUG(D_JOURNAL, "got cache_type \"%s\"\n",
- fset->fset_cache->cache_type);
- return NULL;
- }
-
- avail_kmlblocks = EXT3_SB(inode->i_sb)->s_es->s_free_blocks_count;
-
- if ( avail_kmlblocks < 3 ) {
- return ERR_PTR(-ENOSPC);
- }
-
- if ( (op != KML_OPCODE_UNLINK && op != KML_OPCODE_RMDIR)
- && avail_kmlblocks < 6 ) {
- return ERR_PTR(-ENOSPC);
- }
-
- /* Need journal space for:
- at least three writes to KML (two one block writes, one a path)
- possibly a second name (unlink, rmdir)
- possibly a second path (symlink, rename)
- a one block write to the last rcvd file
- */
-
- trunc_blks = EXT3_DATA_TRANS_BLOCKS + 1;
- one_path_blks = 4*EXT3_DATA_TRANS_BLOCKS + MAX_PATH_BLOCKS(inode) + 3;
- lml_blks = 4*EXT3_DATA_TRANS_BLOCKS + MAX_PATH_BLOCKS(inode) + 2;
- extra_path_blks = EXT3_DATA_TRANS_BLOCKS + MAX_PATH_BLOCKS(inode);
- extra_name_blks = EXT3_DATA_TRANS_BLOCKS + MAX_NAME_BLOCKS(inode);
-
- /* additional blocks appear for "two pathname" operations
- and operations involving the LML records
- */
- switch (op) {
- case KML_OPCODE_TRUNC:
- jblocks = one_path_blks + extra_name_blks + trunc_blks
- + EXT3_DELETE_TRANS_BLOCKS;
- break;
- case KML_OPCODE_KML_TRUNC:
- /* Hopefully this is a little better, but I'm still mostly
- * guessing here. */
- /* unlink 1 */
- jblocks = extra_name_blks + trunc_blks +
- EXT3_DELETE_TRANS_BLOCKS + 2;
-
- /* unlink 2 */
- jblocks += extra_name_blks + trunc_blks +
- EXT3_DELETE_TRANS_BLOCKS + 2;
-
- /* rename 1 */
- jblocks += 2 * extra_path_blks + trunc_blks +
- 2 * EXT3_DATA_TRANS_BLOCKS + 2 + 3;
-
- /* rename 2 */
- jblocks += 2 * extra_path_blks + trunc_blks +
- 2 * EXT3_DATA_TRANS_BLOCKS + 2 + 3;
- break;
- case KML_OPCODE_RELEASE:
- /*
- jblocks = one_path_blks + lml_blks + 2*trunc_blks;
- */
- jblocks = one_path_blks;
- break;
- case KML_OPCODE_SETATTR:
- jblocks = one_path_blks + trunc_blks + 1 ;
- break;
- case KML_OPCODE_CREATE:
- jblocks = one_path_blks + trunc_blks
- + EXT3_DATA_TRANS_BLOCKS + 3 + 2;
- break;
- case KML_OPCODE_LINK:
- jblocks = one_path_blks + trunc_blks
- + EXT3_DATA_TRANS_BLOCKS + 2;
- break;
- case KML_OPCODE_UNLINK:
- jblocks = one_path_blks + extra_name_blks + trunc_blks
- + EXT3_DELETE_TRANS_BLOCKS + 2;
- break;
- case KML_OPCODE_SYMLINK:
- jblocks = one_path_blks + extra_path_blks + trunc_blks
- + EXT3_DATA_TRANS_BLOCKS + 5;
- break;
- case KML_OPCODE_MKDIR:
- jblocks = one_path_blks + trunc_blks
- + EXT3_DATA_TRANS_BLOCKS + 4 + 2;
- break;
- case KML_OPCODE_RMDIR:
- jblocks = one_path_blks + extra_name_blks + trunc_blks
- + EXT3_DELETE_TRANS_BLOCKS + 1;
- break;
- case KML_OPCODE_MKNOD:
- jblocks = one_path_blks + trunc_blks +
- EXT3_DATA_TRANS_BLOCKS + 3 + 2;
- break;
- case KML_OPCODE_RENAME:
- jblocks = one_path_blks + extra_path_blks + trunc_blks +
- 2 * EXT3_DATA_TRANS_BLOCKS + 2 + 3;
- break;
- case KML_OPCODE_WRITE:
- jblocks = one_path_blks;
- /* add this when we can wrap our transaction with
- that of ext3_file_write (ordered writes)
- + EXT3_DATA_TRANS_BLOCKS;
- */
- break;
- default:
- CDEBUG(D_JOURNAL, "invalid operation %d for journal\n", op);
- return NULL;
- }
-
- CDEBUG(D_JOURNAL, "creating journal handle (%d blocks) for op %d\n",
- jblocks, op);
- /* journal_start/stop does not do its own locking while updating
- * the handle/transaction information. Hence we create our own
- * critical section to protect these calls. -SHP
- */
- lock_kernel();
- handle = journal_start(EXT3_JOURNAL(inode), jblocks);
- unlock_kernel();
- return handle;
-}
-
-static void presto_e3_trans_commit(struct presto_file_set *fset, void *handle)
-{
- if ( presto_no_journal(fset) || !handle)
- return;
-
- /* See comments before journal_start above. -SHP */
- lock_kernel();
- journal_stop(handle);
- unlock_kernel();
-}
-
-static void presto_e3_journal_file_data(struct inode *inode)
-{
-#ifdef EXT3_JOURNAL_DATA_FL
- EXT3_I(inode)->i_flags |= EXT3_JOURNAL_DATA_FL;
-#else
-#warning You must have a facility to enable journaled writes for recovery!
-#endif
-}
-
-/* The logic here is a slightly modified version of ext3/inode.c:block_to_path
- */
-static int presto_e3_has_all_data(struct inode *inode)
-{
- int ptrs = EXT3_ADDR_PER_BLOCK(inode->i_sb);
- int ptrs_bits = EXT3_ADDR_PER_BLOCK_BITS(inode->i_sb);
- const long direct_blocks = EXT3_NDIR_BLOCKS,
- indirect_blocks = ptrs,
- double_blocks = (1 << (ptrs_bits * 2));
- long block = (inode->i_size + inode->i_sb->s_blocksize - 1) >>
- inode->i_sb->s_blocksize_bits;
-
- ENTRY;
-
- if (inode->i_size == 0) {
- EXIT;
- return 1;
- }
-
- if (block < direct_blocks) {
- /* No indirect blocks, no problem. */
- } else if (block < indirect_blocks + direct_blocks) {
- block++;
- } else if (block < double_blocks + indirect_blocks + direct_blocks) {
- block += 2;
- } else if (((block - double_blocks - indirect_blocks - direct_blocks)
- >> (ptrs_bits * 2)) < ptrs) {
- block += 3;
- }
-
- block *= (inode->i_sb->s_blocksize / 512);
-
- CDEBUG(D_CACHE, "Need %ld blocks, have %ld.\n", block, inode->i_blocks);
-
- if (block > inode->i_blocks) {
- EXIT;
- return 0;
- }
-
- EXIT;
- return 1;
-}
-
-struct journal_ops presto_ext3_journal_ops = {
- .tr_all_data = presto_e3_has_all_data,
- .tr_avail = presto_e3_freespace,
- .tr_start = presto_e3_trans_start,
- .tr_commit = presto_e3_trans_commit,
- .tr_journal_data = presto_e3_journal_file_data,
- .tr_ilookup = presto_iget_ilookup
-};
-
-#endif /* CONFIG_EXT3_FS */
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 1998 Peter J. Braam <braam@clusterfs.com>
- * Copyright (C) 2000 Red Hat, Inc.
- * Copyright (C) 2000 Los Alamos National Laboratory
- * Copyright (C) 2000 TurboLinux, Inc.
- * Copyright (C) 2001 Mountain View Data, Inc.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/types.h>
-#include <linux/param.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <asm/segment.h>
-#include <asm/uaccess.h>
-#include <linux/string.h>
-#ifdef CONFIG_OBDFS_FS
-#include /usr/src/obd/include/linux/obdfs.h
-#endif
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-#ifdef CONFIG_OBDFS_FS
-
-
-static unsigned long presto_obdfs_freespace(struct presto_file_set *fset,
- struct super_block *sb)
-{
- return 0x0fffff;
-}
-
-/* start the filesystem journal operations */
-static void *presto_obdfs_trans_start(struct presto_file_set *fset,
- struct inode *inode,
- int op)
-{
-
- return (void *) 1;
-}
-
-#if 0
- int jblocks;
- int trunc_blks, one_path_blks, extra_path_blks,
- extra_name_blks, lml_blks;
- __u32 avail_kmlblocks;
-
- if ( presto_no_journal(fset) ||
- strcmp(fset->fset_cache->cache_type, "ext3"))
- {
- CDEBUG(D_JOURNAL, "got cache_type \"%s\"\n",
- fset->fset_cache->cache_type);
- return NULL;
- }
-
- avail_kmlblocks = inode->i_sb->u.ext3_sb.s_es->s_free_blocks_count;
-
- if ( avail_kmlblocks < 3 ) {
- return ERR_PTR(-ENOSPC);
- }
-
- if ( (op != PRESTO_OP_UNLINK && op != PRESTO_OP_RMDIR)
- && avail_kmlblocks < 6 ) {
- return ERR_PTR(-ENOSPC);
- }
-
- /* Need journal space for:
- at least three writes to KML (two one block writes, one a path)
- possibly a second name (unlink, rmdir)
- possibly a second path (symlink, rename)
- a one block write to the last rcvd file
- */
-
- trunc_blks = EXT3_DATA_TRANS_BLOCKS + 1;
- one_path_blks = 4*EXT3_DATA_TRANS_BLOCKS + MAX_PATH_BLOCKS(inode) + 3;
- lml_blks = 4*EXT3_DATA_TRANS_BLOCKS + MAX_PATH_BLOCKS(inode) + 2;
- extra_path_blks = EXT3_DATA_TRANS_BLOCKS + MAX_PATH_BLOCKS(inode);
- extra_name_blks = EXT3_DATA_TRANS_BLOCKS + MAX_NAME_BLOCKS(inode);
-
- /* additional blocks appear for "two pathname" operations
- and operations involving the LML records
- */
- switch (op) {
- case PRESTO_OP_TRUNC:
- jblocks = one_path_blks + extra_name_blks + trunc_blks
- + EXT3_DELETE_TRANS_BLOCKS;
- break;
- case PRESTO_OP_RELEASE:
- /*
- jblocks = one_path_blks + lml_blks + 2*trunc_blks;
- */
- jblocks = one_path_blks;
- break;
- case PRESTO_OP_SETATTR:
- jblocks = one_path_blks + trunc_blks + 1 ;
- break;
- case PRESTO_OP_CREATE:
- jblocks = one_path_blks + trunc_blks
- + EXT3_DATA_TRANS_BLOCKS + 3;
- break;
- case PRESTO_OP_LINK:
- jblocks = one_path_blks + trunc_blks
- + EXT3_DATA_TRANS_BLOCKS;
- break;
- case PRESTO_OP_UNLINK:
- jblocks = one_path_blks + extra_name_blks + trunc_blks
- + EXT3_DELETE_TRANS_BLOCKS;
- break;
- case PRESTO_OP_SYMLINK:
- jblocks = one_path_blks + extra_path_blks + trunc_blks
- + EXT3_DATA_TRANS_BLOCKS + 5;
- break;
- case PRESTO_OP_MKDIR:
- jblocks = one_path_blks + trunc_blks
- + EXT3_DATA_TRANS_BLOCKS + 4;
- break;
- case PRESTO_OP_RMDIR:
- jblocks = one_path_blks + extra_name_blks + trunc_blks
- + EXT3_DELETE_TRANS_BLOCKS;
- break;
- case PRESTO_OP_MKNOD:
- jblocks = one_path_blks + trunc_blks +
- EXT3_DATA_TRANS_BLOCKS + 3;
- break;
- case PRESTO_OP_RENAME:
- jblocks = one_path_blks + extra_path_blks + trunc_blks +
- 2 * EXT3_DATA_TRANS_BLOCKS + 2;
- break;
- case PRESTO_OP_WRITE:
- jblocks = one_path_blks;
- /* add this when we can wrap our transaction with
- that of ext3_file_write (ordered writes)
- + EXT3_DATA_TRANS_BLOCKS;
- */
- break;
- default:
- CDEBUG(D_JOURNAL, "invalid operation %d for journal\n", op);
- return NULL;
- }
-
- CDEBUG(D_JOURNAL, "creating journal handle (%d blocks)\n", jblocks);
- return journal_start(EXT3_JOURNAL(inode), jblocks);
-}
-#endif
-
-void presto_obdfs_trans_commit(struct presto_file_set *fset, void *handle)
-{
-#if 0
- if ( presto_no_journal(fset) || !handle)
- return;
-
- journal_stop(handle);
-#endif
-}
-
-void presto_obdfs_journal_file_data(struct inode *inode)
-{
-#ifdef EXT3_JOURNAL_DATA_FL
- inode->u.ext3_i.i_flags |= EXT3_JOURNAL_DATA_FL;
-#else
-#warning You must have a facility to enable journaled writes for recovery!
-#endif
-}
-
-struct journal_ops presto_obdfs_journal_ops = {
- .tr_avail = presto_obdfs_freespace,
- .tr_start = presto_obdfs_trans_start,
- .tr_commit = presto_obdfs_trans_commit,
- .tr_journal_data = presto_obdfs_journal_file_data
-};
-
-#endif
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 1998 Peter J. Braam <braam@clusterfs.com>
- * Copyright (C) 2000 Red Hat, Inc.
- * Copyright (C) 2000 Los Alamos National Laboratory
- * Copyright (C) 2000 TurboLinux, Inc.
- * Copyright (C) 2001 Mountain View Data, Inc.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/types.h>
-#include <linux/param.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <asm/segment.h>
-#include <asm/uaccess.h>
-#include <linux/string.h>
-#if 0
-#if defined(CONFIG_REISERFS_FS) || defined(CONFIG_REISERFS_FS_MODULE)
-#include <linux/reiserfs_fs.h>
-#include <linux/reiserfs_fs_sb.h>
-#include <linux/reiserfs_fs_i.h>
-#endif
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-#if defined(CONFIG_REISERFS_FS) || defined(CONFIG_REISERFS_FS_MODULE)
-
-
-static loff_t presto_reiserfs_freespace(struct presto_cache *cache,
- struct super_block *sb)
-{
- struct reiserfs_super_block * rs = SB_DISK_SUPER_BLOCK (sb);
- loff_t avail;
-
- avail = le32_to_cpu(rs->s_free_blocks) *
- le16_to_cpu(rs->s_blocksize);
- return avail;
-}
-
-/* start the filesystem journal operations */
-static void *presto_reiserfs_trans_start(struct presto_file_set *fset,
- struct inode *inode,
- int op)
-{
- int jblocks;
- __u32 avail_kmlblocks;
- struct reiserfs_transaction_handle *th ;
-
- PRESTO_ALLOC(th, sizeof(*th));
- if (!th) {
- CERROR("presto: No memory for trans handle\n");
- return NULL;
- }
-
- avail_kmlblocks = presto_reiserfs_freespace(fset->fset_cache,
- inode->i_sb);
- if ( presto_no_journal(fset) ||
- strcmp(fset->fset_cache->cache_type, "reiserfs"))
- {
- CDEBUG(D_JOURNAL, "got cache_type \"%s\"\n",
- fset->fset_cache->cache_type);
- return NULL;
- }
-
- if ( avail_kmlblocks < 3 ) {
- return ERR_PTR(-ENOSPC);
- }
-
- if ( (op != PRESTO_OP_UNLINK && op != PRESTO_OP_RMDIR)
- && avail_kmlblocks < 6 ) {
- return ERR_PTR(-ENOSPC);
- }
-
- jblocks = 3 + JOURNAL_PER_BALANCE_CNT * 4;
- CDEBUG(D_JOURNAL, "creating journal handle (%d blocks)\n", jblocks);
-
- lock_kernel();
- journal_begin(th, inode->i_sb, jblocks);
- unlock_kernel();
- return th;
-}
-
-static void presto_reiserfs_trans_commit(struct presto_file_set *fset,
- void *handle)
-{
- int jblocks;
- jblocks = 3 + JOURNAL_PER_BALANCE_CNT * 4;
-
- lock_kernel();
- journal_end(handle, fset->fset_cache->cache_sb, jblocks);
- unlock_kernel();
- PRESTO_FREE(handle, sizeof(struct reiserfs_transaction_handle));
-}
-
-static void presto_reiserfs_journal_file_data(struct inode *inode)
-{
-#ifdef EXT3_JOURNAL_DATA_FL
- inode->u.ext3_i.i_flags |= EXT3_JOURNAL_DATA_FL;
-#else
-#warning You must have a facility to enable journaled writes for recovery!
-#endif
-}
-
-static int presto_reiserfs_has_all_data(struct inode *inode)
-{
- BUG();
- return 0;
-}
-
-struct journal_ops presto_reiserfs_journal_ops = {
- .tr_all_data = presto_reiserfs_has_all_data,
- .tr_avail = presto_reiserfs_freespace,
- .tr_start = presto_reiserfs_trans_start,
- .tr_commit = presto_reiserfs_trans_commit,
- .tr_journal_data = presto_reiserfs_journal_file_data
-};
-
-#endif
-#endif
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 1998 Peter J. Braam <braam@clusterfs.com>
- * Copyright (C) 2000 Red Hat, Inc.
- * Copyright (C) 2000 Los Alamos National Laboratory
- * Copyright (C) 2000 TurboLinux, Inc.
- * Copyright (C) 2001 Mountain View Data, Inc.
- * Copyright (C) 2001 Tacit Networks, Inc. <phil@off.net>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/types.h>
-#include <linux/param.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <asm/segment.h>
-#include <asm/uaccess.h>
-#include <linux/string.h>
-#if defined(CONFIG_TMPFS)
-#include <linux/jbd.h>
-#if defined(CONFIG_EXT3)
-#include <linux/ext3_fs.h>
-#include <linux/ext3_jbd.h>
-#endif
-#endif
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-#if defined(CONFIG_TMPFS)
-
-/* space requirements:
- presto_do_truncate:
- used to truncate the KML forward to next fset->chunksize boundary
- - zero partial block
- - update inode
- presto_write_record:
- write header (< one block)
- write one path (< MAX_PATHLEN)
- possibly write another path (< MAX_PATHLEN)
- write suffix (< one block)
- presto_update_last_rcvd
- write one block
-*/
-
-static loff_t presto_tmpfs_freespace(struct presto_cache *cache,
- struct super_block *sb)
-{
- return (1<<30);
-}
-
-/* start the filesystem journal operations */
-static void *presto_tmpfs_trans_start(struct presto_file_set *fset,
- struct inode *inode,
- int op)
-{
- return (void *)1;
-}
-
-static void presto_tmpfs_trans_commit(struct presto_file_set *fset, void *handle)
-{
- return;
-}
-
-static void presto_tmpfs_journal_file_data(struct inode *inode)
-{
- return;
-}
-
-/* The logic here is a slightly modified version of ext3/inode.c:block_to_path
- */
-static int presto_tmpfs_has_all_data(struct inode *inode)
-{
- return 0;
-}
-
-struct journal_ops presto_tmpfs_journal_ops = {
- .tr_all_data = presto_tmpfs_has_all_data,
- .tr_avail = presto_tmpfs_freespace,
- .tr_start = presto_tmpfs_trans_start,
- .tr_commit = presto_tmpfs_trans_commit,
- .tr_journal_data = presto_tmpfs_journal_file_data,
- .tr_ilookup = presto_tmpfs_ilookup,
- .tr_add_ilookup = presto_add_ilookup_dentry
-};
-
-#endif /* CONFIG_EXT3_FS */
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 1998 Peter J. Braam <braam@clusterfs.com>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <asm/segment.h>
-#include <asm/uaccess.h>
-#include <linux/string.h>
-#if 0
-/* XFS Support not there yet */
-#ifdef CONFIG_FS_XFS
-#include <linux/xfs_fs.h>
-#endif
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-#include "intermezzo_journal.h"
-
-#if 0
-
-/* XFS has journalling, but these functions do nothing yet... */
-
-static unsigned long presto_xfs_freespace(struct presto_file_set *fset,
- struct super_block *sb)
-{
-
-#if 0
- vfs_t *vfsp = LINVFS_GET_VFS(sb);
- struct statvfs_t stat;
- bhv_desc_t *bdp;
- unsigned long avail;
- int rc;
-
- VFS_STATVFS(vfsp, &stat, NULL, rc);
- avail = statp.f_bfree;
-
- return sbp->sb_fdblocks;
-#endif
- return 0x0fffffff;
-}
-
-
-/* start the filesystem journal operations */
-static void *
-presto_xfs_trans_start(struct presto_file_set *fset,
- struct inode *inode, int op)
-{
- int xfs_op;
- /* do a free blocks check as in journal_ext3? does anything protect
- * the space in that case or can it disappear out from under us
- * anyway? */
-
-/* copied from xfs_trans.h, skipping header maze for now */
-#define XFS_TRANS_SETATTR_NOT_SIZE 1
-#define XFS_TRANS_SETATTR_SIZE 2
-#define XFS_TRANS_INACTIVE 3
-#define XFS_TRANS_CREATE 4
-#define XFS_TRANS_CREATE_TRUNC 5
-#define XFS_TRANS_TRUNCATE_FILE 6
-#define XFS_TRANS_REMOVE 7
-#define XFS_TRANS_LINK 8
-#define XFS_TRANS_RENAME 9
-#define XFS_TRANS_MKDIR 10
-#define XFS_TRANS_RMDIR 11
-#define XFS_TRANS_SYMLINK 12
-
- /* map the op onto the values for XFS so it can do reservation. if
- * we don't have enough info to differentiate between e.g. setattr
- * with or without size, what do we do? will it adjust? */
- switch (op) {
- case PRESTO_OP_SETATTR:
- /* or XFS_TRANS_SETATTR_NOT_SIZE? */
- xfs_op = XFS_TRANS_SETATTR_SIZE;
- break;
- case PRESTO_OP_CREATE:
- /* or CREATE_TRUNC? */
- xfs_op = XFS_TRANS_CREATE;
- break;
- case PRESTO_OP_LINK:
- xfs_op = XFS_TRANS_LINK;
- break;
- case PRESTO_OP_UNLINK:
- xfs_op = XFS_TRANS_REMOVE;
- break;
- case PRESTO_OP_SYMLINK:
- xfs_op = XFS_TRANS_SYMLINK;
- break;
- case PRESTO_OP_MKDIR:
- xfs_op = XFS_TRANS_MKDIR;
- break;
- case PRESTO_OP_RMDIR:
- xfs_op = XFS_TRANS_RMDIR;
- break;
- case PRESTO_OP_MKNOD:
- /* XXX can't find an analog for mknod? */
- xfs_op = XFS_TRANS_CREATE;
- break;
- case PRESTO_OP_RENAME:
- xfs_op = XFS_TRANS_RENAME;
- break;
- default:
- CDEBUG(D_JOURNAL, "invalid operation %d for journal\n", op);
- return NULL;
- }
-
- return xfs_trans_start(inode, xfs_op);
-}
-
-static void presto_xfs_trans_commit(struct presto_file_set *fset, void *handle)
-{
- /* assert (handle == current->j_handle) */
- xfs_trans_stop(handle);
-}
-
-static void presto_xfs_journal_file_data(struct inode *inode)
-{
- return;
-}
-
-static int presto_xfs_has_all_data(struct inode *inode)
-{
- BUG();
- return 0;
-}
-
-struct journal_ops presto_xfs_journal_ops = {
- .tr_all_data = presto_xfs_has_all_data,
- .tr_avail = presto_xfs_freespace,
- .tr_start = presto_xfs_trans_start,
- .tr_commit = presto_xfs_trans_commit,
- .tr_journal_data = presto_xfs_journal_file_data
-};
-
-#endif
-
-
-#endif /* CONFIG_XFS_FS */
-
+++ /dev/null
-#include <linux/errno.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/module.h>
-#include <asm/uaccess.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_upcall.h"
-#include "intermezzo_psdev.h"
-#include "intermezzo_kml.h"
-
-static struct presto_file_set * kml_getfset (char *path)
-{
- return presto_path2fileset(path);
-}
-
-/* Send the KML buffer and related volume info into kernel */
-int begin_kml_reint (struct file *file, unsigned long arg)
-{
- struct {
- char *volname;
- int namelen;
- char *recbuf;
- int reclen; /* int newpos; */
- } input;
- struct kml_fsdata *kml_fsdata = NULL;
- struct presto_file_set *fset = NULL;
- char *path;
- int error;
-
- ENTRY;
- /* allocate buffer & copy it to kernel space */
- if (copy_from_user(&input, (char *)arg, sizeof(input))) {
- EXIT;
- return -EFAULT;
- }
-
- if (input.reclen > kml_fsdata->kml_maxsize)
- return -ENOMEM; /* we'll find solution to this in the future */
-
- PRESTO_ALLOC(path, char *, input.namelen + 1);
- if ( !path ) {
- EXIT;
- return -ENOMEM;
- }
- if (copy_from_user(path, input.volname, input.namelen)) {
- PRESTO_FREE(path, input.namelen + 1);
- EXIT;
- return -EFAULT;
- }
- path[input.namelen] = '\0';
- fset = kml_getfset (path);
- PRESTO_FREE(path, input.namelen + 1);
-
- kml_fsdata = FSET_GET_KMLDATA(fset);
- /* read the buf from user memory here */
- if (copy_from_user(kml_fsdata->kml_buf, input.recbuf, input.reclen)) {
- EXIT;
- return -EFAULT;
- }
- kml_fsdata->kml_len = input.reclen;
-
- decode_kmlrec (&kml_fsdata->kml_reint_cache,
- kml_fsdata->kml_buf, kml_fsdata->kml_len);
-
- kml_fsdata->kml_reint_current = kml_fsdata->kml_reint_cache.next;
- kml_fsdata->kml_reintpos = 0;
- kml_fsdata->kml_count = 0;
- return 0;
-}
-
-/* DO_KML_REINT */
-int do_kml_reint (struct file *file, unsigned long arg)
-{
- struct {
- char *volname;
- int namelen;
- char *path;
- int pathlen;
- int recno;
- int offset;
- int len;
- int generation;
- __u64 ino;
- } input;
- int error;
- char *path;
- struct kml_rec *close_rec;
- struct kml_fsdata *kml_fsdata;
- struct presto_file_set *fset;
-
- ENTRY;
- if (copy_from_user(&input, (char *)arg, sizeof(input))) {
- EXIT;
- return -EFAULT;
- }
- PRESTO_ALLOC(path, char *, input.namelen + 1);
- if ( !path ) {
- EXIT;
- return -ENOMEM;
- }
- if (copy_from_user(path, input.volname, input.namelen)) {
- PRESTO_FREE(path, input.namelen + 1);
- EXIT;
- return -EFAULT;
- }
- path[input.namelen] = '\0';
- fset = kml_getfset (path);
- PRESTO_FREE(path, input.namelen + 1);
-
- kml_fsdata = FSET_GET_KMLDATA(fset);
-
- error = kml_reintbuf(kml_fsdata,
- fset->fset_mtpt->d_name.name,
- &close_rec);
-
- if (error == KML_CLOSE_BACKFETCH && close_rec != NULL) {
- struct kml_close *close = &close_rec->rec_kml.close;
- input.ino = close->ino;
- input.generation = close->generation;
- if (strlen (close->path) + 1 < input.pathlen) {
- strcpy (input.path, close->path);
- input.pathlen = strlen (close->path) + 1;
- input.recno = close_rec->rec_tail.recno;
- input.offset = close_rec->rec_kml_offset;
- input.len = close_rec->rec_size;
- input.generation = close->generation;
- input.ino = close->ino;
- }
- else {
- CDEBUG(D_KML, "KML_DO_REINT::no space to save:%d < %d",
- strlen (close->path) + 1, input.pathlen);
- error = -ENOMEM;
- }
- if (copy_to_user((char *)arg, &input, sizeof (input)))
- return -EFAULT;
- }
- return error;
-}
-
-/* END_KML_REINT */
-int end_kml_reint (struct file *file, unsigned long arg)
-{
- /* Free KML buffer and related volume info */
- struct {
- char *volname;
- int namelen;
-#if 0
- int count;
- int newpos;
-#endif
- } input;
- struct presto_file_set *fset = NULL;
- struct kml_fsdata *kml_fsdata = NULL;
- int error;
- char *path;
-
- ENTRY;
- if (copy_from_user(&input, (char *)arg, sizeof(input))) {
- EXIT;
- return -EFAULT;
- }
-
- PRESTO_ALLOC(path, char *, input.namelen + 1);
- if ( !path ) {
- EXIT;
- return -ENOMEM;
- }
- if (copy_from_user(path, input.volname, input.namelen)) {
- if ( error ) {
- PRESTO_FREE(path, input.namelen + 1);
- EXIT;
- return -EFAULT;
- }
- path[input.namelen] = '\0';
- fset = kml_getfset (path);
- PRESTO_FREE(path, input.namelen + 1);
-
- kml_fsdata = FSET_GET_KMLDATA(fset);
- delete_kmlrec (&kml_fsdata->kml_reint_cache);
-
- /* kml reint support */
- kml_fsdata->kml_reint_current = NULL;
- kml_fsdata->kml_len = 0;
- kml_fsdata->kml_reintpos = 0;
- kml_fsdata->kml_count = 0;
-#if 0
- input.newpos = kml_upc->newpos;
- input.count = kml_upc->count;
- if (copy_to_user((char *)arg, &input, sizeof (input)))
- return -EFAULT;
-#endif
- return error;
-}
+++ /dev/null
-/*
- * KML Decoding
- *
- * Copryright (C) 1996 Arthur Ma <arthur.ma@mountainviewdata.com>
- *
- * Copyright (C) 2001 Mountainview Data, Inc.
- */
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/major.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/mm.h>
-#include "intermezzo_fs.h"
-#include "intermezzo_kml.h"
-
-static int size_round (int val);
-static int unpack_create (struct kml_create *rec, char *buf,
- int pos, int *rec_offs);
-static int unpack_open (struct kml_open *rec, char *buf,
- int pos, int *rec_offs);
-static int unpack_symlink (struct kml_symlink *rec, char *buf,
- int pos, int *rec_offs);
-static int unpack_mknod (struct kml_mknod *rec, char *buf,
- int pos, int *rec_offs);
-static int unpack_link (struct kml_link *rec, char *buf,
- int pos, int *rec_offs);
-static int unpack_rename (struct kml_rename *rec, char *buf,
- int pos, int *rec_offs);
-static int unpack_unlink (struct kml_unlink *rec, char *buf,
- int pos, int *rec_offs);
-static int unpack_rmdir (struct kml_rmdir *rec, char *buf,
- int pos, int *rec_offs);
-static int unpack_setattr (struct kml_setattr *rec, char *buf,
- int pos, int *rec_offs);
-static int unpack_close (struct kml_close *rec, char *buf,
- int pos, int *rec_offs);
-static int unpack_mkdir (struct kml_mkdir *rec, char *buf,
- int pos, int *rec_offs);
-
-#if 0
-static int unpack_endmark (struct kml_endmark *rec, char *buf,
- int pos, int *rec_offs);
-static void print_kml_endmark (struct kml_endmark *rec);
-#endif
-
-static int kml_unpack (char *kml_buf, int rec_size, int kml_offset,
- struct kml_rec **newrec);
-static char *kml_version (struct presto_version *ver);
-static void print_kml_prefix (struct big_journal_prefix *head);
-static void print_kml_create (struct kml_create *rec);
-static void print_kml_mkdir (struct kml_mkdir *rec);
-static void print_kml_unlink (struct kml_unlink *rec);
-static void print_kml_rmdir (struct kml_rmdir *rec);
-static void print_kml_close (struct kml_close *rec);
-static void print_kml_symlink (struct kml_symlink *rec);
-static void print_kml_rename (struct kml_rename *rec);
-static void print_kml_setattr (struct kml_setattr *rec);
-static void print_kml_link (struct kml_link *rec);
-static void print_kml_mknod (struct kml_mknod *rec);
-static void print_kml_open (struct kml_open *rec);
-static void print_kml_suffix (struct journal_suffix *tail);
-static char *readrec (char *recbuf, int reclen, int pos, int *size);
-
-#define KML_PREFIX_WORDS 8
-static int kml_unpack (char *kml_buf, int rec_size, int kml_offset,
- struct kml_rec **newrec)
-{
- struct kml_rec *rec;
- char *p;
- int pos, rec_offs;
- int error;
-
- ENTRY;
- if (rec_size < sizeof (struct journal_prefix) +
- sizeof (struct journal_suffix))
- return -EBADF;
-
- PRESTO_ALLOC(rec, struct kml_rec *, sizeof (struct kml_rec));
- if (rec == NULL) {
- EXIT;
- return -ENOMEM;
- }
- rec->rec_kml_offset = kml_offset;
- rec->rec_size = rec_size;
- p = kml_buf;
- p = dlogit (&rec->rec_head, p, KML_PREFIX_WORDS * sizeof (int));
- p = dlogit (&rec->rec_head.groups, p,
- sizeof (int) * rec->rec_head.ngroups);
-
- pos = sizeof (struct journal_prefix) +
- sizeof (int) * rec->rec_head.ngroups;
- switch (rec->rec_head.opcode)
- {
- case KML_CREATE:
- error = unpack_create (&rec->rec_kml.create,
- kml_buf, pos, &rec_offs);
- break;
- case KML_MKDIR:
- error = unpack_mkdir (&rec->rec_kml.mkdir,
- kml_buf, pos, &rec_offs);
- break;
- case KML_UNLINK:
- error = unpack_unlink (&rec->rec_kml.unlink,
- kml_buf, pos, &rec_offs);
- break;
- case KML_RMDIR:
- error = unpack_rmdir (&rec->rec_kml.rmdir,
- kml_buf, pos, &rec_offs);
- break;
- case KML_CLOSE:
- error = unpack_close (&rec->rec_kml.close,
- kml_buf, pos, &rec_offs);
- break;
- case KML_SYMLINK:
- error = unpack_symlink (&rec->rec_kml.symlink,
- kml_buf, pos, &rec_offs);
- break;
- case KML_RENAME:
- error = unpack_rename (&rec->rec_kml.rename,
- kml_buf, pos, &rec_offs);
- break;
- case KML_SETATTR:
- error = unpack_setattr (&rec->rec_kml.setattr,
- kml_buf, pos, &rec_offs);
- break;
- case KML_LINK:
- error = unpack_link (&rec->rec_kml.link,
- kml_buf, pos, &rec_offs);
- break;
- case KML_OPEN:
- error = unpack_open (&rec->rec_kml.open,
- kml_buf, pos, &rec_offs);
- break;
- case KML_MKNOD:
- error = unpack_mknod (&rec->rec_kml.mknod,
- kml_buf, pos, &rec_offs);
- break;
-#if 0
- case KML_ENDMARK:
- error = unpack_endmark (&rec->rec_kml.endmark,
- kml_buf, pos, &rec_offs);
- break;
-#endif
- default:
- CDEBUG (D_KML, "wrong opcode::%u\n",
- rec->rec_head.opcode);
- EXIT;
- return -EINVAL;
- }
- if (error) {
- PRESTO_FREE (rec, sizeof (struct kml_rec));
- return -EINVAL;
- }
- p = kml_buf + rec_offs;
- p = dlogit (&rec->rec_tail, p, sizeof (struct journal_suffix));
- memset (&rec->kml_optimize, 0, sizeof (struct kml_optimize));
- *newrec = rec;
- EXIT;
- return 0;
-}
-
-static int size_round (int val)
-{
- return (val + 3) & (~0x3);
-}
-
-static int unpack_create (struct kml_create *rec, char *buf,
- int pos, int *rec_offs)
-{
- char *p, *q;
- int unpack_size = 88;
- int pathlen;
-
- ENTRY;
- p = buf + pos;
- p = dlogit (&rec->old_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_objectv, p, sizeof (struct presto_version));
- p = dlogit (&rec->mode, p, sizeof (int));
- p = dlogit (&rec->uid, p, sizeof (int));
- p = dlogit (&rec->gid, p, sizeof (int));
- p = dlogit (&pathlen, p, sizeof (int));
-
- PRESTO_ALLOC(q, char *, pathlen + 1);
- if (q == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, pathlen);
- q[pathlen] = '\0';
- rec->path = q;
-
- *rec_offs = pos + unpack_size + size_round(pathlen);
- EXIT;
- return 0;
-}
-
-static int unpack_open (struct kml_open *rec, char *buf,
- int pos, int *rec_offs)
-{
- *rec_offs = pos;
- return 0;
-}
-
-static int unpack_symlink (struct kml_symlink *rec, char *buf,
- int pos, int *rec_offs)
-{
- char *p, *q;
- int unpack_size = 88;
- int pathlen, targetlen;
-
- ENTRY;
- p = buf + pos;
- p = dlogit (&rec->old_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_objectv, p, sizeof (struct presto_version));
- p = dlogit (&rec->uid, p, sizeof (int));
- p = dlogit (&rec->gid, p, sizeof (int));
- p = dlogit (&pathlen, p, sizeof (int));
- p = dlogit (&targetlen, p, sizeof (int));
-
- PRESTO_ALLOC(q, char *, pathlen + 1);
- if (q == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, pathlen);
- q[pathlen] = '\0';
- rec->sourcepath = q;
-
- PRESTO_ALLOC(q, char *, targetlen + 1);
- if (q == NULL) {
- PRESTO_FREE (rec->sourcepath, pathlen + 1);
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, targetlen);
- q[targetlen] = '\0';
- rec->targetpath = q;
-
- *rec_offs = pos + unpack_size + size_round(pathlen) +
- size_round(targetlen);
- EXIT;
- return 0;
-}
-
-static int unpack_mknod (struct kml_mknod *rec, char *buf,
- int pos, int *rec_offs)
-{
- char *p, *q;
- int unpack_size = 96;
- int pathlen;
-
- ENTRY;
- p = buf + pos;
- p = dlogit (&rec->old_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_objectv, p, sizeof (struct presto_version));
- p = dlogit (&rec->mode, p, sizeof (int));
- p = dlogit (&rec->uid, p, sizeof (int));
- p = dlogit (&rec->gid, p, sizeof (int));
- p = dlogit (&rec->major, p, sizeof (int));
- p = dlogit (&rec->minor, p, sizeof (int));
- p = dlogit (&pathlen, p, sizeof (int));
-
- PRESTO_ALLOC(q, char *, pathlen + 1);
- if (q == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, pathlen);
- q[pathlen] = '\0';
- rec->path = q;
-
- *rec_offs = pos + unpack_size + size_round(pathlen);
- EXIT;
- return 0;
-}
-
-static int unpack_link (struct kml_link *rec, char *buf,
- int pos, int *rec_offs)
-{
- char *p, *q;
- int unpack_size = 80;
- int pathlen, targetlen;
-
- ENTRY;
- p = buf + pos;
- p = dlogit (&rec->old_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_objectv, p, sizeof (struct presto_version));
- p = dlogit (&pathlen, p, sizeof (int));
- p = dlogit (&targetlen, p, sizeof (int));
-
- PRESTO_ALLOC(q, char *, pathlen + 1);
- if (q == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, pathlen);
- q[pathlen] = '\0';
- rec->sourcepath = q;
- p += size_round (pathlen);
-
- PRESTO_ALLOC(q, char *, targetlen + 1);
- if (q == NULL) {
- PRESTO_FREE (rec->sourcepath, pathlen + 1);
- EXIT;
- return -ENOMEM;
- }
- memcpy (q, p, targetlen);
- q[targetlen] = '\0';
- rec->targetpath = q;
-
- *rec_offs = pos + unpack_size + size_round(pathlen) +
- size_round(targetlen);
- EXIT;
- return 0;
-}
-
-static int unpack_rename (struct kml_rename *rec, char *buf,
- int pos, int *rec_offs)
-{
- char *p, *q;
- int unpack_size = 104;
- int pathlen, targetlen;
-
- ENTRY;
- p = buf + pos;
- p = dlogit (&rec->old_objectv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_objectv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_tgtv, p, sizeof (struct presto_version));
- p = dlogit (&rec->old_tgtv, p, sizeof (struct presto_version));
- p = dlogit (&pathlen, p, sizeof (int));
- p = dlogit (&targetlen, p, sizeof (int));
-
- PRESTO_ALLOC(q, char *, pathlen + 1);
- if (q == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, pathlen);
- q[pathlen] = '\0';
- rec->sourcepath = q;
- p += size_round (pathlen);
-
- PRESTO_ALLOC(q, char *, targetlen + 1);
- if (q == NULL) {
- PRESTO_FREE (rec->sourcepath, pathlen + 1);
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, targetlen);
- q[targetlen] = '\0';
- rec->targetpath = q;
-
- *rec_offs = pos + unpack_size + size_round(pathlen) +
- size_round(targetlen);
- EXIT;
- return 0;
-}
-
-static int unpack_unlink (struct kml_unlink *rec, char *buf,
- int pos, int *rec_offs)
-{
- char *p, *q;
- int unpack_size = 80;
- int pathlen, targetlen;
-
- ENTRY;
- p = buf + pos;
- p = dlogit (&rec->old_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->old_tgtv, p, sizeof (struct presto_version));
- p = dlogit (&pathlen, p, sizeof (int));
- p = dlogit (&targetlen, p, sizeof (int));
-
- PRESTO_ALLOC(q, char *, pathlen + 1);
- if (q == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, pathlen);
- q[pathlen] = '\0';
- rec->path = q;
- p += size_round (pathlen);
-
- PRESTO_ALLOC(q, char *, targetlen + 1);
- if (q == NULL) {
- PRESTO_FREE (rec->path, pathlen + 1);
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, targetlen);
- q[targetlen] = '\0';
- rec->name = q;
-
- /* fix the presto_journal_unlink problem */
- *rec_offs = pos + unpack_size + size_round(pathlen) +
- size_round(targetlen);
- EXIT;
- return 0;
-}
-
-static int unpack_rmdir (struct kml_rmdir *rec, char *buf,
- int pos, int *rec_offs)
-{
- char *p, *q;
- int unpack_size = 80;
- int pathlen, targetlen;
-
- ENTRY;
- p = buf + pos;
- p = dlogit (&rec->old_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->old_tgtv, p, sizeof (struct presto_version));
- p = dlogit (&pathlen, p, sizeof (int));
- p = dlogit (&targetlen, p, sizeof (int));
-
- PRESTO_ALLOC(q, char *, pathlen + 1);
- if (q == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, pathlen);
- q[pathlen] = '\0';
- rec->path = q;
- p += size_round (pathlen);
-
- PRESTO_ALLOC(q, char *, targetlen + 1);
- if (q == NULL) {
- PRESTO_FREE (rec->path, pathlen + 1);
- EXIT;
- return -ENOMEM;
- }
- memcpy (q, p, targetlen);
- q[targetlen] = '\0';
- rec->name = q;
-
- *rec_offs = pos + unpack_size + size_round(pathlen) +
- size_round(targetlen);
- EXIT;
- return 0;
-}
-
-static int unpack_setattr (struct kml_setattr *rec, char *buf,
- int pos, int *rec_offs)
-{
- char *p, *q;
- int unpack_size = 72;
- struct kml_attr {
- __u64 size, mtime, ctime;
- } objattr;
- int valid, mode, uid, gid, flags;
- int pathlen;
-
- ENTRY;
- p = buf + pos;
- p = dlogit (&rec->old_objectv, p, sizeof (struct presto_version));
- p = dlogit (&valid, p, sizeof (int));
- p = dlogit (&mode, p, sizeof (int));
- p = dlogit (&uid, p, sizeof (int));
- p = dlogit (&gid, p, sizeof (int));
- p = dlogit (&objattr, p, sizeof (struct kml_attr));
- p = dlogit (&flags, p, sizeof (int));
- p = dlogit (&pathlen, p, sizeof (int));
-
- rec->iattr.ia_valid = valid;
- rec->iattr.ia_mode = mode;
- rec->iattr.ia_uid = uid;
- rec->iattr.ia_gid = gid;
- rec->iattr.ia_size = objattr.size;
- rec->iattr.ia_mtime = objattr.mtime;
- rec->iattr.ia_ctime = objattr.ctime;
- rec->iattr.ia_atime = 0;
- rec->iattr.ia_attr_flags = flags;
-
- PRESTO_ALLOC(q, char *, pathlen + 1);
- if (q == NULL) {
- EXIT;
- return -ENOMEM;
- }
- memcpy (q, p, pathlen);
- q[pathlen] = '\0';
- rec->path = q;
- p += pathlen;
-
- *rec_offs = pos + unpack_size + size_round(pathlen);
- EXIT;
- return 0;
-}
-
-static int unpack_close (struct kml_close *rec, char *buf,
- int pos, int *rec_offs)
-{
- char *p, *q;
- int unpack_size = 52;
- int pathlen;
-
- ENTRY;
- p = buf + pos;
- p = dlogit (&rec->open_mode, p, sizeof (int));
- p = dlogit (&rec->open_uid, p, sizeof (int));
- p = dlogit (&rec->open_gid, p, sizeof (int));
- p = dlogit (&rec->new_objectv, p, sizeof (struct presto_version));
- p = dlogit (&rec->ino, p, sizeof (__u64));
- p = dlogit (&rec->generation, p, sizeof (int));
- p = dlogit (&pathlen, p, sizeof (int));
-
- PRESTO_ALLOC(q, char *, pathlen + 1);
- if (q == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, pathlen);
- q[pathlen] = '\0';
- rec->path = q;
- p += pathlen;
-
- *rec_offs = pos + unpack_size + size_round(pathlen);
- EXIT;
- return 0;
-}
-
-static int unpack_mkdir (struct kml_mkdir *rec, char *buf,
- int pos, int *rec_offs)
-{
- char *p, *q;
- int unpack_size = 88;
- int pathlen;
-
- ENTRY;
- p = buf + pos;
- p = dlogit (&rec->old_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_parentv, p, sizeof (struct presto_version));
- p = dlogit (&rec->new_objectv, p, sizeof (struct presto_version));
- p = dlogit (&rec->mode, p, sizeof (int));
- p = dlogit (&rec->uid, p, sizeof (int));
- p = dlogit (&rec->gid, p, sizeof (int));
- p = dlogit (&pathlen, p, sizeof (int));
-
- PRESTO_ALLOC(q, char *, pathlen + 1);
- if (q == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- memcpy (q, p, pathlen);
- q[pathlen] = '\0';
- rec->path = q;
- p += pathlen;
-
- *rec_offs = pos + unpack_size + size_round(pathlen);
- EXIT;
- return 0;
-}
-
-#if 0
-static int unpack_endmark (struct kml_endmark *rec, char *buf,
- int pos, int *rec_offs)
-{
- char *p;
- p = buf + pos;
- p = dlogit (&rec->total, p, sizeof (int));
-
- PRESTO_ALLOC (rec->kop, struct kml_kop_node *,
- sizeof (struct kml_kop_node) * rec->total);
- if (rec->kop == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- p = dlogit (rec->kop, p, sizeof (struct kml_kop_node) * rec->total);
-
- *rec_offs = pos + sizeof (int) + sizeof (struct kml_kop_node) * rec->total;
- return 0;
-}
-#endif
-
-static char *kml_version (struct presto_version *ver)
-{
- static char buf[256];
- sprintf (buf, "mt::%lld, ct::%lld, size::%lld",
- ver->pv_mtime, ver->pv_ctime, ver->pv_size);
- return buf;
-}
-
-static void print_kml_prefix (struct big_journal_prefix *head)
-{
- int i;
-
- CDEBUG (D_KML, " === KML PREFIX\n");
- CDEBUG (D_KML, " len = %u\n", head->len);
- CDEBUG (D_KML, " version = %u\n", head->version);
- CDEBUG (D_KML, " pid = %u\n", head->pid);
- CDEBUG (D_KML, " uid = %u\n", head->uid);
- CDEBUG (D_KML, " fsuid = %u\n", head->fsuid);
- CDEBUG (D_KML, " fsgid = %u\n", head->fsgid);
- CDEBUG (D_KML, " opcode = %u\n", head->opcode);
- CDEBUG (D_KML, " ngroup = %u", head->ngroups);
- for (i = 0; i < head->ngroups; i++)
- CDEBUG (D_KML, "%u ", head->groups[i]);
- CDEBUG (D_KML, "\n");
-}
-
-static void print_kml_create (struct kml_create *rec)
-{
- CDEBUG (D_KML, " === CREATE\n");
- CDEBUG (D_KML, " path::%s\n", rec->path);
- CDEBUG (D_KML, " new_objv::%s\n", kml_version (&rec->new_objectv));
- CDEBUG (D_KML, " old_parv::%s\n", kml_version (&rec->old_parentv));
- CDEBUG (D_KML, " new_parv::%s\n", kml_version (&rec->new_parentv));
- CDEBUG (D_KML, " mode::%o\n", rec->mode);
- CDEBUG (D_KML, " uid::%d\n", rec->uid);
- CDEBUG (D_KML, " gid::%d\n", rec->gid);
-}
-
-static void print_kml_mkdir (struct kml_mkdir *rec)
-{
- CDEBUG (D_KML, " === MKDIR\n");
- CDEBUG (D_KML, " path::%s\n", rec->path);
- CDEBUG (D_KML, " new_objv::%s\n", kml_version (&rec->new_objectv));
- CDEBUG (D_KML, " old_parv::%s\n", kml_version (&rec->old_parentv));
- CDEBUG (D_KML, " new_parv::%s\n", kml_version (&rec->new_parentv));
- CDEBUG (D_KML, " mode::%o\n", rec->mode);
- CDEBUG (D_KML, " uid::%d\n", rec->uid);
- CDEBUG (D_KML, " gid::%d\n", rec->gid);
-}
-
-static void print_kml_unlink (struct kml_unlink *rec)
-{
- CDEBUG (D_KML, " === UNLINK\n");
- CDEBUG (D_KML, " path::%s/%s\n", rec->path, rec->name);
- CDEBUG (D_KML, " old_tgtv::%s\n", kml_version (&rec->old_tgtv));
- CDEBUG (D_KML, " old_parv::%s\n", kml_version (&rec->old_parentv));
- CDEBUG (D_KML, " new_parv::%s\n", kml_version (&rec->new_parentv));
-}
-
-static void print_kml_rmdir (struct kml_rmdir *rec)
-{
- CDEBUG (D_KML, " === RMDIR\n");
- CDEBUG (D_KML, " path::%s/%s\n", rec->path, rec->name);
- CDEBUG (D_KML, " old_tgtv::%s\n", kml_version (&rec->old_tgtv));
- CDEBUG (D_KML, " old_parv::%s\n", kml_version (&rec->old_parentv));
- CDEBUG (D_KML, " new_parv::%s\n", kml_version (&rec->new_parentv));
-}
-
-static void print_kml_close (struct kml_close *rec)
-{
- CDEBUG (D_KML, " === CLOSE\n");
- CDEBUG (D_KML, " mode::%o\n", rec->open_mode);
- CDEBUG (D_KML, " uid::%d\n", rec->open_uid);
- CDEBUG (D_KML, " gid::%d\n", rec->open_gid);
- CDEBUG (D_KML, " path::%s\n", rec->path);
- CDEBUG (D_KML, " new_objv::%s\n", kml_version (&rec->new_objectv));
- CDEBUG (D_KML, " ino::%lld\n", rec->ino);
- CDEBUG (D_KML, " gen::%u\n", rec->generation);
-}
-
-static void print_kml_symlink (struct kml_symlink *rec)
-{
- CDEBUG (D_KML, " === SYMLINK\n");
- CDEBUG (D_KML, " s-path::%s\n", rec->sourcepath);
- CDEBUG (D_KML, " t-path::%s\n", rec->targetpath);
- CDEBUG (D_KML, " old_parv::%s\n", kml_version (&rec->old_parentv));
- CDEBUG (D_KML, " new_parv::%s\n", kml_version (&rec->new_parentv));
- CDEBUG (D_KML, " new_objv::%s\n", kml_version (&rec->new_objectv));
- CDEBUG (D_KML, " uid::%d\n", rec->uid);
- CDEBUG (D_KML, " gid::%d\n", rec->gid);
-}
-
-static void print_kml_rename (struct kml_rename *rec)
-{
- CDEBUG (D_KML, " === RENAME\n");
- CDEBUG (D_KML, " s-path::%s\n", rec->sourcepath);
- CDEBUG (D_KML, " t-path::%s\n", rec->targetpath);
- CDEBUG (D_KML, " old_tgtv::%s\n", kml_version (&rec->old_tgtv));
- CDEBUG (D_KML, " new_tgtv::%s\n", kml_version (&rec->new_tgtv));
- CDEBUG (D_KML, " new_objv::%s\n", kml_version (&rec->new_objectv));
- CDEBUG (D_KML, " old_objv::%s\n", kml_version (&rec->old_objectv));
-}
-
-static void print_kml_setattr (struct kml_setattr *rec)
-{
- CDEBUG (D_KML, " === SETATTR\n");
- CDEBUG (D_KML, " path::%s\n", rec->path);
- CDEBUG (D_KML, " old_objv::%s\n", kml_version (&rec->old_objectv));
- CDEBUG (D_KML, " valid::0x%x\n", rec->iattr.ia_valid);
- CDEBUG (D_KML, " mode::%o\n", rec->iattr.ia_mode);
- CDEBUG (D_KML, " uid::%d\n", rec->iattr.ia_uid);
- CDEBUG (D_KML, " gid::%d\n", rec->iattr.ia_gid);
- CDEBUG (D_KML, " size::%u\n", (u32) rec->iattr.ia_size);
- CDEBUG (D_KML, " mtime::%u\n", (u32) rec->iattr.ia_mtime);
- CDEBUG (D_KML, " ctime::%u\n", (u32) rec->iattr.ia_ctime);
- CDEBUG (D_KML, " flags::%u\n", (u32) rec->iattr.ia_attr_flags);
-}
-
-static void print_kml_link (struct kml_link *rec)
-{
- CDEBUG (D_KML, " === LINK\n");
- CDEBUG (D_KML, " path::%s ==> %s\n", rec->sourcepath, rec->targetpath);
- CDEBUG (D_KML, " old_parv::%s\n", kml_version (&rec->old_parentv));
- CDEBUG (D_KML, " new_obj::%s\n", kml_version (&rec->new_objectv));
- CDEBUG (D_KML, " new_parv::%s\n", kml_version (&rec->new_parentv));
-}
-
-static void print_kml_mknod (struct kml_mknod *rec)
-{
- CDEBUG (D_KML, " === MKNOD\n");
- CDEBUG (D_KML, " path::%s\n", rec->path);
- CDEBUG (D_KML, " new_obj::%s\n", kml_version (&rec->new_objectv));
- CDEBUG (D_KML, " old_parv::%s\n", kml_version (&rec->old_parentv));
- CDEBUG (D_KML, " new_parv::%s\n", kml_version (&rec->new_parentv));
- CDEBUG (D_KML, " mode::%o\n", rec->mode);
- CDEBUG (D_KML, " uid::%d\n", rec->uid);
- CDEBUG (D_KML, " gid::%d\n", rec->gid);
- CDEBUG (D_KML, " major::%d\n", rec->major);
- CDEBUG (D_KML, " minor::%d\n", rec->minor);
-}
-
-static void print_kml_open (struct kml_open *rec)
-{
- CDEBUG (D_KML, " === OPEN\n");
-}
-
-#if 0
-static void print_kml_endmark (struct kml_endmark *rec)
-{
- int i;
- CDEBUG (D_KML, " === ENDMARK\n");
- CDEBUG (D_KML, " total::%u\n", rec->total);
- for (i = 0; i < rec->total; i++)
- {
- CDEBUG (D_KML, " recno=%ld::flag=%ld,op=%ld, i_ino=%ld, \
- i_nlink=%ld\n", (long) rec->kop[i].kml_recno,
- (long) rec->kop[i].kml_flag, (long) rec->kop[i].kml_op,
- (long) rec->kop[i].i_ino, (long) rec->kop[i].i_nlink);
- }
-}
-#endif
-
-static void print_kml_optimize (struct kml_optimize *rec)
-{
- CDEBUG (D_KML, " === OPTIMIZE\n");
- if (rec->kml_flag == KML_REC_DELETE)
- CDEBUG (D_KML, " kml_flag::deleted\n");
- else
- CDEBUG (D_KML, " kml_flag::exist\n");
- CDEBUG (D_KML, " kml_op::%u\n", rec->kml_op);
- CDEBUG (D_KML, " i_nlink::%d\n", rec->i_nlink);
- CDEBUG (D_KML, " i_ino::%u\n", rec->i_ino);
-}
-
-static void print_kml_suffix (struct journal_suffix *tail)
-{
- CDEBUG (D_KML, " === KML SUFFIX\n");
- CDEBUG (D_KML, " prevrec::%ld\n", tail->prevrec);
- CDEBUG (D_KML, " recno::%ld\n", (long) tail->recno);
- CDEBUG (D_KML, " time::%d\n", tail->time);
- CDEBUG (D_KML, " len::%d\n", tail->len);
-}
-
-void kml_printrec (struct kml_rec *rec, int kml_printop)
-{
- if (kml_printop & PRINT_KML_PREFIX)
- print_kml_prefix (&rec->rec_head);
- if (kml_printop & PRINT_KML_REC)
- {
- switch (rec->rec_head.opcode)
- {
- case KML_CREATE:
- print_kml_create (&rec->rec_kml.create);
- break;
- case KML_MKDIR:
- print_kml_mkdir (&rec->rec_kml.mkdir);
- break;
- case KML_UNLINK:
- print_kml_unlink (&rec->rec_kml.unlink);
- break;
- case KML_RMDIR:
- print_kml_rmdir (&rec->rec_kml.rmdir);
- break;
- case KML_CLOSE:
- print_kml_close (&rec->rec_kml.close);
- break;
- case KML_SYMLINK:
- print_kml_symlink (&rec->rec_kml.symlink);
- break;
- case KML_RENAME:
- print_kml_rename (&rec->rec_kml.rename);
- break;
- case KML_SETATTR:
- print_kml_setattr (&rec->rec_kml.setattr);
- break;
- case KML_LINK:
- print_kml_link (&rec->rec_kml.link);
- break;
- case KML_OPEN:
- print_kml_open (&rec->rec_kml.open);
- break;
- case KML_MKNOD:
- print_kml_mknod (&rec->rec_kml.mknod);
- break;
-#if 0
- case KML_ENDMARK:
- print_kml_endmark (&rec->rec_kml.endmark);
-#endif
- break;
- default:
- CDEBUG (D_KML, " === BAD RECORD, opcode=%u\n",
- rec->rec_head.opcode);
- break;
- }
- }
- if (kml_printop & PRINT_KML_SUFFIX)
- print_kml_suffix (&rec->rec_tail);
- if (kml_printop & PRINT_KML_OPTIMIZE)
- print_kml_optimize (&rec->kml_optimize);
-}
-
-void kml_freerec (struct kml_rec *rec)
-{
- char *sourcepath = NULL,
- *targetpath = NULL;
- switch (rec->rec_head.opcode)
- {
- case KML_CREATE:
- sourcepath = rec->rec_kml.create.path;
- break;
- case KML_MKDIR:
- sourcepath = rec->rec_kml.create.path;
- break;
- case KML_UNLINK:
- sourcepath = rec->rec_kml.unlink.path;
- targetpath = rec->rec_kml.unlink.name;
- break;
- case KML_RMDIR:
- sourcepath = rec->rec_kml.rmdir.path;
- targetpath = rec->rec_kml.rmdir.name;
- break;
- case KML_CLOSE:
- sourcepath = rec->rec_kml.close.path;
- break;
- case KML_SYMLINK:
- sourcepath = rec->rec_kml.symlink.sourcepath;
- targetpath = rec->rec_kml.symlink.targetpath;
- break;
- case KML_RENAME:
- sourcepath = rec->rec_kml.rename.sourcepath;
- targetpath = rec->rec_kml.rename.targetpath;
- break;
- case KML_SETATTR:
- sourcepath = rec->rec_kml.setattr.path;
- break;
- case KML_LINK:
- sourcepath = rec->rec_kml.link.sourcepath;
- targetpath = rec->rec_kml.link.targetpath;
- break;
- case KML_OPEN:
- break;
- case KML_MKNOD:
- sourcepath = rec->rec_kml.mknod.path;
- break;
-#if 0
- case KML_ENDMARK:
- PRESTO_FREE (rec->rec_kml.endmark.kop, sizeof (int) +
- sizeof (struct kml_kop_node) *
- rec->rec_kml.endmark.total);
-#endif
- break;
- default:
- break;
- }
- if (sourcepath != NULL)
- PRESTO_FREE (sourcepath, strlen (sourcepath) + 1);
- if (targetpath != NULL)
- PRESTO_FREE (targetpath, strlen (targetpath) + 1);
-}
-
-char *readrec (char *recbuf, int reclen, int pos, int *size)
-{
- char *p = recbuf + pos;
- *size = *((int *) p);
- if (*size > (reclen - pos))
- return NULL;
- return p;
-}
-
-int kml_decoderec (char *buf, int pos, int buflen, int *size,
- struct kml_rec **newrec)
-{
- char *tmp;
- int error;
- tmp = readrec (buf, buflen, pos, size);
- if (tmp == NULL)
- return -EBADF;
- error = kml_unpack (tmp, *size, pos, newrec);
- return error;
-}
-
-#if 0
-static void fill_kmlrec_optimize (struct list_head *head,
- struct kml_rec *optrec)
-{
- struct kml_rec *kmlrec;
- struct list_head *tmp;
- struct kml_endmark *km;
- struct kml_optimize *ko;
- int n;
-
- if (optrec->rec_kml.endmark.total == 0)
- return;
- n = optrec->rec_kml.endmark.total - 1;
- tmp = head->prev;
- km = &optrec->rec_kml.endmark;
- while ( n >= 0 && tmp != head )
- {
- kmlrec = list_entry(tmp, struct kml_rec,
- kml_optimize.kml_chains);
- tmp = tmp->prev;
- if (kmlrec->rec_tail.recno == km->kop[n].kml_recno)
- {
- ko = &kmlrec->kml_optimize;
- ko->kml_flag = km->kop[n].kml_flag;
- ko->kml_op = km->kop[n].kml_op;
- ko->i_nlink = km->kop[n].i_nlink;
- ko->i_ino = km->kop[n].i_ino;
- n --;
- }
- }
- if (n != -1)
- CDEBUG (D_KML, "Yeah!!!, KML optimize error, recno=%d, n=%d\n",
- optrec->rec_tail.recno, n);
-}
-#endif
-
-int decode_kmlrec (struct list_head *head, char *kml_buf, int buflen)
-{
- struct kml_rec *rec;
- int pos = 0, size;
- int err;
- while (pos < buflen) {
- err = kml_decoderec (kml_buf, pos, buflen, &size, &rec);
- if (err != 0)
- break;
-#if 0
- if (rec->rec_head.opcode == KML_ENDMARK) {
- fill_kmlrec_optimize (head, rec);
- mark_rec_deleted (rec);
- }
-#endif
- list_add_tail (&rec->kml_optimize.kml_chains, head);
- pos += size;
- }
- return err;
-}
-
-int delete_kmlrec (struct list_head *head)
-{
- struct kml_rec *rec;
- struct list_head *tmp;
-
- if (list_empty(head))
- return 0;
- tmp = head->next;
- while ( tmp != head ) {
- rec = list_entry(tmp, struct kml_rec,
- kml_optimize.kml_chains);
- tmp = tmp->next;
- kml_freerec (rec);
- }
- INIT_LIST_HEAD(head);
- return 0;
-}
-
-int print_allkmlrec (struct list_head *head, int printop)
-{
- struct kml_rec *rec;
- struct list_head *tmp;
-
- if (list_empty(head))
- return 0;
- tmp = head->next;
- while ( tmp != head ) {
- rec = list_entry(tmp, struct kml_rec,
- kml_optimize.kml_chains);
- tmp = tmp->next;
-#if 0
- if (printop & PRINT_KML_EXIST) {
- if (is_deleted_node (rec))
- continue;
- }
- else if (printop & PRINT_KML_DELETE) {
- if (! is_deleted_node (rec))
- continue;
- }
-#endif
- kml_printrec (rec, printop);
- }
- INIT_LIST_HEAD(head);
- return 0;
-}
-
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2001 Cluster File Systems, Inc. <braam@clusterfs.com>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Reintegration of KML records
- *
- */
-
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/kernel.h>
-#include <linux/major.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/mm.h>
-#include <asm/uaccess.h>
-#include <asm/pgtable.h>
-#include <asm/mmu_context.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-static void kmlreint_pre_secure(struct kml_rec *rec, struct file *dir,
- struct run_ctxt *saved)
-{
- struct run_ctxt ctxt;
- struct presto_dentry_data *dd = presto_d2d(dir->f_dentry);
- int i;
-
- ctxt.fsuid = rec->prefix.hdr->fsuid;
- ctxt.fsgid = rec->prefix.hdr->fsgid;
- ctxt.fs = KERNEL_DS;
- ctxt.pwd = dd->dd_fset->fset_dentry;
- ctxt.pwdmnt = dd->dd_fset->fset_mnt;
-
- ctxt.root = ctxt.pwd;
- ctxt.rootmnt = ctxt.pwdmnt;
- if (rec->prefix.hdr->ngroups > 0) {
- ctxt.group_info = groups_alloc(rec->prefix.hdr->ngroups);
- for (i = 0; i< ctxt.group_info->ngroups; i++)
- GROUP_AT(ctxt.group_info,i)= rec->prefix.groups[i];
- } else
- ctxt.group_info = groups_alloc(0);
-
- push_ctxt(saved, &ctxt);
-}
-
-
-/* Append two strings in a less-retarded fashion. */
-static char * path_join(char *p1, int p1len, char *p2, int p2len)
-{
- int size = p1len + p2len + 2; /* possibly one extra /, one NULL */
- char *path;
-
- path = kmalloc(size, GFP_KERNEL);
- if (path == NULL)
- return NULL;
-
- memcpy(path, p1, p1len);
- if (path[p1len - 1] != '/') {
- path[p1len] = '/';
- p1len++;
- }
- memcpy(path + p1len, p2, p2len);
- path[p1len + p2len] = '\0';
-
- return path;
-}
-
-static inline int kml_recno_equal(struct kml_rec *rec,
- struct presto_file_set *fset)
-{
- return (rec->suffix->recno == fset->fset_lento_recno + 1);
-}
-
-static inline int version_equal(struct presto_version *a, struct inode *inode)
-{
- if (a == NULL)
- return 1;
-
- if (inode == NULL) {
- CERROR("InterMezzo: NULL inode in version_equal()\n");
- return 0;
- }
-
- if (inode->i_mtime.tv_sec == a->pv_mtime_sec &&
- inode->i_mtime.tv_nsec == a->pv_mtime_nsec &&
- (S_ISDIR(inode->i_mode) || inode->i_size == a->pv_size))
- return 1;
-
- return 0;
-}
-
-static int reint_close(struct kml_rec *rec, struct file *file,
- struct lento_vfs_context *given_info)
-{
- struct run_ctxt saved_ctxt;
- int error;
- struct presto_file_set *fset;
- struct lento_vfs_context info;
- ENTRY;
-
- memcpy(&info, given_info, sizeof(*given_info));
-
-
- CDEBUG (D_KML, "=====REINT_CLOSE::%s\n", rec->path);
-
- fset = presto_fset(file->f_dentry);
- if (fset->fset_flags & FSET_DATA_ON_DEMAND) {
- struct iattr iattr;
-
- iattr.ia_valid = ATTR_CTIME | ATTR_MTIME | ATTR_SIZE;
- iattr.ia_mtime.tv_sec = (time_t)rec->new_objectv->pv_mtime_sec;
- iattr.ia_mtime.tv_nsec = (time_t)rec->new_objectv->pv_mtime_nsec;
- iattr.ia_ctime.tv_sec = (time_t)rec->new_objectv->pv_ctime_sec;
- iattr.ia_ctime.tv_nsec = (time_t)rec->new_objectv->pv_ctime_nsec;
- iattr.ia_size = (time_t)rec->new_objectv->pv_size;
-
- /* no kml record, but update last rcvd */
- /* save fileid in dentry for later backfetch */
- info.flags |= LENTO_FL_EXPECT | LENTO_FL_SET_DDFILEID;
- info.remote_ino = rec->ino;
- info.remote_generation = rec->generation;
- info.flags &= ~LENTO_FL_KML;
- kmlreint_pre_secure(rec, file, &saved_ctxt);
- error = lento_setattr(rec->path, &iattr, &info);
- pop_ctxt(&saved_ctxt);
-
- presto_d2d(file->f_dentry)->dd_flags &= ~PRESTO_DATA;
- } else {
- int minor = presto_f2m(fset);
-
- info.updated_time.tv_sec = rec->new_objectv->pv_mtime_sec;
- info.updated_time.tv_nsec = rec->new_objectv->pv_mtime_nsec;
- memcpy(&info.remote_version, rec->old_objectv,
- sizeof(*rec->old_objectv));
- info.remote_ino = rec->ino;
- info.remote_generation = rec->generation;
- error = izo_upc_backfetch(minor, rec->path, fset->fset_name,
- &info);
- if (error) {
- CERROR("backfetch error %d\n", error);
- /* if file doesn't exist anymore, then ignore the CLOSE
- * and just update the last_rcvd.
- */
- if (error == ENOENT) {
- CDEBUG(D_KML, "manually updating remote offset uuid %s"
- "recno %d offset %Lu\n", info.uuid, info.recno,
- (unsigned long long) info.kml_offset);
- error = izo_rcvd_upd_remote(fset, info.uuid, info.recno, info.kml_offset);
- if(error)
- CERROR("izo_rcvd_upd_remote error %d\n", error);
-
- }
- }
-
- /* propagate error to avoid further reint */
- }
-
- EXIT;
- return error;
-}
-
-static int reint_create(struct kml_rec *rec, struct file *dir,
- struct lento_vfs_context *info)
-{
- struct run_ctxt saved_ctxt;
- int error; ENTRY;
-
- CDEBUG (D_KML, "=====REINT_CREATE::%s\n", rec->path);
- info->updated_time.tv_sec = rec->new_objectv->pv_ctime_sec;
- info->updated_time.tv_nsec = rec->new_objectv->pv_ctime_nsec;
- kmlreint_pre_secure(rec, dir, &saved_ctxt);
- error = lento_create(rec->path, rec->mode, info);
- pop_ctxt(&saved_ctxt);
-
- EXIT;
- return error;
-}
-
-static int reint_link(struct kml_rec *rec, struct file *dir,
- struct lento_vfs_context *info)
-{
- struct run_ctxt saved_ctxt;
- int error;
-
- ENTRY;
-
- CDEBUG (D_KML, "=====REINT_LINK::%s -> %s\n", rec->path, rec->target);
- info->updated_time.tv_sec = rec->new_objectv->pv_mtime_sec;
- info->updated_time.tv_nsec = rec->new_objectv->pv_mtime_nsec;
- kmlreint_pre_secure(rec, dir, &saved_ctxt);
- error = lento_link(rec->path, rec->target, info);
- pop_ctxt(&saved_ctxt);
-
- EXIT;
- return error;
-}
-
-static int reint_mkdir(struct kml_rec *rec, struct file *dir,
- struct lento_vfs_context *info)
-{
- struct run_ctxt saved_ctxt;
- int error;
-
- ENTRY;
-
- CDEBUG (D_KML, "=====REINT_MKDIR::%s\n", rec->path);
- info->updated_time.tv_sec = rec->new_objectv->pv_ctime_sec;
- info->updated_time.tv_nsec = rec->new_objectv->pv_ctime_nsec;
- kmlreint_pre_secure(rec, dir, &saved_ctxt);
- error = lento_mkdir(rec->path, rec->mode, info);
- pop_ctxt(&saved_ctxt);
-
- EXIT;
- return error;
-}
-
-static int reint_mknod(struct kml_rec *rec, struct file *dir,
- struct lento_vfs_context *info)
-{
- struct run_ctxt saved_ctxt;
- int error;
- dev_t dev;
-
- ENTRY;
-
- CDEBUG (D_KML, "=====REINT_MKNOD::%s\n", rec->path);
- info->updated_time.tv_sec = rec->new_objectv->pv_ctime_sec;
- info->updated_time.tv_nsec = rec->new_objectv->pv_ctime_nsec;
- kmlreint_pre_secure(rec, dir, &saved_ctxt);
-
- dev = rec->rdev ? old_decode_dev(rec->rdev) : MKDEV(rec->major, rec->minor);
-
- error = lento_mknod(rec->path, rec->mode, dev, info);
- pop_ctxt(&saved_ctxt);
-
- EXIT;
- return error;
-}
-
-
-static int reint_noop(struct kml_rec *rec, struct file *dir,
- struct lento_vfs_context *info)
-{
- return 0;
-}
-
-static int reint_rename(struct kml_rec *rec, struct file *dir,
- struct lento_vfs_context *info)
-{
- struct run_ctxt saved_ctxt;
- int error;
-
- ENTRY;
-
- CDEBUG (D_KML, "=====REINT_RENAME::%s -> %s\n", rec->path, rec->target);
- info->updated_time.tv_sec = rec->new_objectv->pv_mtime_sec;
- info->updated_time.tv_nsec = rec->new_objectv->pv_mtime_nsec;
- kmlreint_pre_secure(rec, dir, &saved_ctxt);
- error = lento_rename(rec->path, rec->target, info);
- pop_ctxt(&saved_ctxt);
-
- EXIT;
- return error;
-}
-
-static int reint_rmdir(struct kml_rec *rec, struct file *dir,
- struct lento_vfs_context *info)
-{
- struct run_ctxt saved_ctxt;
- int error;
- char *path;
-
- ENTRY;
-
- path = path_join(rec->path, rec->pathlen - 1, rec->target, rec->targetlen);
- if (path == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- CDEBUG (D_KML, "=====REINT_RMDIR::%s\n", path);
- info->updated_time.tv_sec = rec->new_parentv->pv_mtime_sec;
- info->updated_time.tv_nsec = rec->new_parentv->pv_mtime_nsec;
- kmlreint_pre_secure(rec, dir, &saved_ctxt);
- error = lento_rmdir(path, info);
- pop_ctxt(&saved_ctxt);
-
- kfree(path);
- EXIT;
- return error;
-}
-
-static int reint_setattr(struct kml_rec *rec, struct file *dir,
- struct lento_vfs_context *info)
-{
- struct run_ctxt saved_ctxt;
- struct iattr iattr;
- int error;
-
- ENTRY;
-
- iattr.ia_valid = rec->valid;
- iattr.ia_mode = (umode_t)rec->mode;
- iattr.ia_uid = (uid_t)rec->uid;
- iattr.ia_gid = (gid_t)rec->gid;
- iattr.ia_size = (off_t)rec->size;
- iattr.ia_ctime.tv_sec = rec->ctime_sec;
- iattr.ia_ctime.tv_nsec = rec->ctime_nsec;
- iattr.ia_mtime.tv_sec = rec->mtime_sec;
- iattr.ia_mtime.tv_nsec = rec->mtime_nsec;
- iattr.ia_atime = iattr.ia_mtime; /* We don't track atimes. */
- iattr.ia_attr_flags = rec->flags;
-
- CDEBUG (D_KML, "=====REINT_SETATTR::%s (%d)\n", rec->path, rec->valid);
- kmlreint_pre_secure(rec, dir, &saved_ctxt);
- error = lento_setattr(rec->path, &iattr, info);
- pop_ctxt(&saved_ctxt);
-
- EXIT;
- return error;
-}
-
-static int reint_symlink(struct kml_rec *rec, struct file *dir,
- struct lento_vfs_context *info)
-{
- struct run_ctxt saved_ctxt;
- int error;
-
- ENTRY;
-
- CDEBUG (D_KML, "=====REINT_SYMLINK::%s -> %s\n", rec->path, rec->target);
- info->updated_time.tv_sec = rec->new_objectv->pv_ctime_sec;
- info->updated_time.tv_nsec = rec->new_objectv->pv_ctime_nsec;
- kmlreint_pre_secure(rec, dir, &saved_ctxt);
- error = lento_symlink(rec->target, rec->path, info);
- pop_ctxt(&saved_ctxt);
-
- EXIT;
- return error;
-}
-
-static int reint_unlink(struct kml_rec *rec, struct file *dir,
- struct lento_vfs_context *info)
-{
- struct run_ctxt saved_ctxt;
- int error;
- char *path;
-
- ENTRY;
-
- path = path_join(rec->path, rec->pathlen - 1, rec->target, rec->targetlen);
- if (path == NULL) {
- EXIT;
- return -ENOMEM;
- }
-
- CDEBUG (D_KML, "=====REINT_UNLINK::%s\n", path);
- info->updated_time.tv_sec = rec->new_parentv->pv_mtime_sec;
- info->updated_time.tv_nsec = rec->new_parentv->pv_mtime_nsec;
- kmlreint_pre_secure(rec, dir, &saved_ctxt);
- error = lento_unlink(path, info);
- pop_ctxt(&saved_ctxt);
-
- kfree(path);
- EXIT;
- return error;
-}
-
-static int branch_reint_rename(struct presto_file_set *fset, struct kml_rec *rec,
- struct file *dir, struct lento_vfs_context *info,
- char * kml_data, __u64 kml_size)
-{
- int error;
-
- ENTRY;
-
- error = reint_rename(rec, dir, info);
- if (error == -ENOENT) {
- /* normal reint failed because path was not found */
- struct rec_info rec;
-
- CDEBUG(D_KML, "saving branch rename kml\n");
- rec.is_kml = 1;
- rec.size = kml_size;
- error = presto_log(fset, &rec, kml_data, kml_size,
- NULL, 0, NULL, 0, NULL, 0);
- if (error == 0)
- error = presto_write_last_rcvd(&rec, fset, info);
- }
-
- EXIT;
- return error;
-}
-
-int branch_reinter(struct presto_file_set *fset, struct kml_rec *rec,
- struct file *dir, struct lento_vfs_context *info,
- char * kml_data, __u64 kml_size)
-{
- int error = 0;
- int op = rec->prefix.hdr->opcode;
-
- if (op == KML_OPCODE_CLOSE) {
- /* regular close and backfetch */
- error = reint_close(rec, dir, info);
- } else if (op == KML_OPCODE_RENAME) {
- /* rename only if name already exists */
- error = branch_reint_rename(fset, rec, dir, info,
- kml_data, kml_size);
- } else {
- /* just rewrite kml into branch/kml and update last_rcvd */
- struct rec_info rec;
-
- CDEBUG(D_KML, "Saving branch kml\n");
- rec.is_kml = 1;
- rec.size = kml_size;
- error = presto_log(fset, &rec, kml_data, kml_size,
- NULL, 0, NULL, 0, NULL, 0);
- if (error == 0)
- error = presto_write_last_rcvd(&rec, fset, info);
- }
-
- return error;
-}
-
-typedef int (*reinter_t)(struct kml_rec *rec, struct file *basedir,
- struct lento_vfs_context *info);
-
-static reinter_t presto_reinters[KML_OPCODE_NUM] =
-{
- [KML_OPCODE_CLOSE] = reint_close,
- [KML_OPCODE_CREATE] = reint_create,
- [KML_OPCODE_LINK] = reint_link,
- [KML_OPCODE_MKDIR] = reint_mkdir,
- [KML_OPCODE_MKNOD] = reint_mknod,
- [KML_OPCODE_NOOP] = reint_noop,
- [KML_OPCODE_RENAME] = reint_rename,
- [KML_OPCODE_RMDIR] = reint_rmdir,
- [KML_OPCODE_SETATTR] = reint_setattr,
- [KML_OPCODE_SYMLINK] = reint_symlink,
- [KML_OPCODE_UNLINK] = reint_unlink,
-};
-
-static inline reinter_t get_reinter(int op)
-{
- if (op < 0 || op >= sizeof(presto_reinters) / sizeof(reinter_t))
- return NULL;
- else
- return presto_reinters[op];
-}
-
-int kml_reint_rec(struct file *dir, struct izo_ioctl_data *data)
-{
- char *ptr;
- char *end;
- struct kml_rec rec;
- int error = 0;
- struct lento_vfs_context info;
- struct presto_cache *cache;
- struct presto_file_set *fset;
- struct presto_dentry_data *dd = presto_d2d(dir->f_dentry);
- int op;
- reinter_t reinter;
-
- struct izo_rcvd_rec lr_rec;
- int off;
-
- ENTRY;
-
- error = presto_prep(dir->f_dentry, &cache, &fset);
- if ( error ) {
- CERROR("intermezzo: Reintegration on invalid file\n");
- return error;
- }
-
- if (!dd || !dd->dd_fset || dd->dd_fset->fset_dentry != dir->f_dentry) {
- CERROR("intermezzo: reintegration on non-fset root (ino %ld)\n",
- dir->f_dentry->d_inode->i_ino);
-
- return -EINVAL;
- }
-
- if (data->ioc_plen1 > 64 * 1024) {
- EXIT;
- return -ENOSPC;
- }
-
- ptr = fset->fset_reint_buf;
- end = ptr + data->ioc_plen1;
-
- if (copy_from_user(ptr, data->ioc_pbuf1, data->ioc_plen1)) {
- EXIT;
- error = -EFAULT;
- goto out;
- }
-
- error = kml_unpack(&rec, &ptr, end);
- if (error) {
- EXIT;
- error = -EFAULT;
- goto out;
- }
-
- off = izo_rcvd_get(&lr_rec, fset, data->ioc_uuid);
- if (off < 0) {
- CERROR("No last_rcvd record, setting to 0\n");
- memset(&lr_rec, 0, sizeof(lr_rec));
- }
-
- data->ioc_kmlsize = ptr - fset->fset_reint_buf;
-
- if (rec.suffix->recno != lr_rec.lr_remote_recno + 1) {
- CERROR("KML record number %Lu expected, not %d\n",
- (unsigned long long) (lr_rec.lr_remote_recno + 1),
- rec.suffix->recno);
-
-#if 0
- if (!version_check(&rec, dd->dd_fset, &info)) {
- /* FIXME: do an upcall to resolve conflicts */
- CERROR("intermezzo: would be a conflict!\n");
- error = -EINVAL;
- EXIT;
- goto out;
- }
-#endif
- }
-
- op = rec.prefix.hdr->opcode;
-
- reinter = get_reinter(op);
- if (!reinter) {
- CERROR("%s: Unrecognized KML opcode %d\n", __FUNCTION__, op);
- error = -EINVAL;
- EXIT;
- goto out;
- }
-
- info.kml_offset = data->ioc_offset + data->ioc_kmlsize;
- info.recno = rec.suffix->recno;
- info.flags = LENTO_FL_EXPECT;
- if (data->ioc_flags)
- info.flags |= LENTO_FL_KML;
-
- memcpy(info.uuid, data->ioc_uuid, sizeof(info.uuid));
-
- if (fset->fset_flags & FSET_IS_BRANCH && data->ioc_flags)
- error = branch_reinter(fset, &rec, dir, &info, fset->fset_reint_buf,
- data->ioc_kmlsize);
- else
- error = reinter(&rec, dir, &info);
- out:
- EXIT;
- return error;
-}
-
-int izo_get_fileid(struct file *dir, struct izo_ioctl_data *data)
-{
- char *buf = NULL;
- char *ptr;
- char *end;
- struct kml_rec rec;
- struct file *file;
- struct presto_cache *cache;
- struct presto_file_set *fset;
- struct presto_dentry_data *dd = presto_d2d(dir->f_dentry);
- struct run_ctxt saved_ctxt;
- int error;
-
- ENTRY;
-
- error = presto_prep(dir->f_dentry, &cache, &fset);
- if ( error ) {
- CERROR("intermezzo: Reintegration on invalid file\n");
- return error;
- }
-
- if (!dd || !dd->dd_fset || dd->dd_fset->fset_dentry != dir->f_dentry) {
- CERROR("intermezzo: reintegration on non-fset root (ino %ld)\n",
- dir->f_dentry->d_inode->i_ino);
-
- return -EINVAL;
- }
-
-
- PRESTO_ALLOC(buf, data->ioc_plen1);
- if (!buf) {
- EXIT;
- return -ENOMEM;
- }
- ptr = buf;
- end = buf + data->ioc_plen1;
-
- if (copy_from_user(buf, data->ioc_pbuf1, data->ioc_plen1)) {
- EXIT;
- PRESTO_FREE(buf, data->ioc_plen1);
- return -EFAULT;
- }
-
- error = kml_unpack(&rec, &ptr, end);
- if (error) {
- EXIT;
- PRESTO_FREE(buf, data->ioc_plen1);
- return -EFAULT;
- }
-
- kmlreint_pre_secure(&rec, dir, &saved_ctxt);
-
- file = filp_open(rec.path, O_RDONLY, 0);
- if (!file || IS_ERR(file)) {
- error = PTR_ERR(file);
- goto out;
- }
- data->ioc_ino = file->f_dentry->d_inode->i_ino;
- data->ioc_generation = file->f_dentry->d_inode->i_generation;
- filp_close(file, 0);
-
- CDEBUG(D_FILE, "%s ino %Lx, gen %Lx\n", rec.path,
- (unsigned long long) data->ioc_ino,
- (unsigned long long) data->ioc_generation);
-
- out:
- if (buf)
- PRESTO_FREE(buf, data->ioc_plen1);
- pop_ctxt(&saved_ctxt);
- EXIT;
- return error;
-}
-
-
+++ /dev/null
-#include <linux/errno.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/module.h>
-#include <asm/uaccess.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_upcall.h"
-#include "intermezzo_psdev.h"
-#include "intermezzo_kml.h"
-
-int kml_init (struct presto_file_set *fset)
-{
- struct kml_fsdata *data;
-
- ENTRY;
- PRESTO_ALLOC (data, struct kml_fsdata *, sizeof (struct kml_fsdata));
- if (data == NULL) {
- EXIT;
- return -ENOMEM;
- }
- INIT_LIST_HEAD (&data->kml_reint_cache);
- INIT_LIST_HEAD (&data->kml_kop_cache);
-
- PRESTO_ALLOC (data->kml_buf, char *, KML_REINT_MAXBUF);
- if (data->kml_buf == NULL) {
- PRESTO_FREE (data, sizeof (struct kml_fsdata));
- EXIT;
- return -ENOMEM;
- }
-
- data->kml_maxsize = KML_REINT_MAXBUF;
- data->kml_len = 0;
- data->kml_reintpos = 0;
- data->kml_count = 0;
- fset->fset_kmldata = data;
- EXIT;
- return 0;
-}
-
-int kml_cleanup (struct presto_file_set *fset)
-{
- struct kml_fsdata *data = fset->fset_kmldata;
-
- if (data == NULL)
- return 0;
-
- fset->fset_kmldata = NULL;
-#if 0
- kml_sop_cleanup (&data->kml_reint_cache);
- kml_kop_cleanup (&data->kml_kop_cache);
-#endif
- PRESTO_FREE (data->kml_buf, KML_REINT_MAXBUF);
- PRESTO_FREE (data, sizeof (struct kml_fsdata));
- return 0;
-}
-
-
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2001 Cluster File Systems, Inc. <braam@clusterfs.com>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Unpacking of KML records
- *
- */
-
-#ifdef __KERNEL__
-# include <linux/module.h>
-# include <linux/errno.h>
-# include <linux/kernel.h>
-# include <linux/major.h>
-# include <linux/sched.h>
-# include <linux/lp.h>
-# include <linux/slab.h>
-# include <linux/ioport.h>
-# include <linux/fcntl.h>
-# include <linux/delay.h>
-# include <linux/skbuff.h>
-# include <linux/proc_fs.h>
-# include <linux/vmalloc.h>
-# include <linux/fs.h>
-# include <linux/poll.h>
-# include <linux/init.h>
-# include <linux/list.h>
-# include <linux/stat.h>
-# include <asm/io.h>
-# include <asm/segment.h>
-# include <asm/system.h>
-# include <asm/poll.h>
-# include <asm/uaccess.h>
-#else
-# include <time.h>
-# include <stdio.h>
-# include <string.h>
-# include <stdlib.h>
-# include <errno.h>
-# include <sys/stat.h>
-# include <glib.h>
-#endif
-
-#include "intermezzo_lib.h"
-#include "intermezzo_idl.h"
-#include "intermezzo_fs.h"
-
-int kml_unpack_version(struct presto_version **ver, char **buf, char *end)
-{
- char *ptr = *buf;
- struct presto_version *pv;
-
- UNLOGP(*ver, struct presto_version, ptr, end);
- pv = *ver;
- pv->pv_mtime_sec = NTOH__u32(pv->pv_mtime_sec);
- pv->pv_mtime_nsec = NTOH__u32(pv->pv_mtime_nsec);
- pv->pv_ctime_sec = NTOH__u32(pv->pv_ctime_sec);
- pv->pv_ctime_nsec = NTOH__u32(pv->pv_ctime_nsec);
- pv->pv_size = NTOH__u64(pv->pv_size);
-
- *buf = ptr;
-
- return 0;
-}
-
-
-static int kml_unpack_noop(struct kml_rec *rec, char **buf, char *end)
-{
- return 0;
-}
-
-
-static int kml_unpack_get_fileid(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
-
- *buf = ptr;
- return 0;
-}
-
-static int kml_unpack_create(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- kml_unpack_version(&rec->old_parentv, &ptr, end);
- kml_unpack_version(&rec->new_parentv, &ptr, end);
- kml_unpack_version(&rec->new_objectv, &ptr, end);
- LUNLOGV(rec->mode, __u32, ptr, end);
- LUNLOGV(rec->uid, __u32, ptr, end);
- LUNLOGV(rec->gid, __u32, ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-
-static int kml_unpack_mkdir(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- kml_unpack_version(&rec->old_parentv, &ptr, end);
- kml_unpack_version(&rec->new_parentv, &ptr, end);
- kml_unpack_version(&rec->new_objectv, &ptr, end);
- LUNLOGV(rec->mode, __u32, ptr, end);
- LUNLOGV(rec->uid, __u32, ptr, end);
- LUNLOGV(rec->gid, __u32, ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-
-static int kml_unpack_unlink(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- kml_unpack_version(&rec->old_parentv, &ptr, end);
- kml_unpack_version(&rec->new_parentv, &ptr, end);
- kml_unpack_version(&rec->old_objectv, &ptr, end);
- LUNLOGV(rec->old_mode, __u32, ptr, end);
- LUNLOGV(rec->old_rdev, __u32, ptr, end);
- LUNLOGV(rec->old_uid, __u64, ptr, end);
- LUNLOGV(rec->old_gid, __u64, ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- LUNLOGV(rec->targetlen, __u32, ptr, end);
- LUNLOGV(rec->old_targetlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
- UNLOGL(rec->target, char, rec->targetlen, ptr, end);
- UNLOGL(rec->old_target, char, rec->old_targetlen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-
-static int kml_unpack_rmdir(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- kml_unpack_version(&rec->old_parentv, &ptr, end);
- kml_unpack_version(&rec->new_parentv, &ptr, end);
- kml_unpack_version(&rec->old_objectv, &ptr, end);
- LUNLOGV(rec->old_mode, __u32, ptr, end);
- LUNLOGV(rec->old_rdev, __u32, ptr, end);
- LUNLOGV(rec->old_uid, __u64, ptr, end);
- LUNLOGV(rec->old_gid, __u64, ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- LUNLOGV(rec->targetlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
- UNLOGL(rec->target, char, rec->targetlen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-
-static int kml_unpack_close(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- LUNLOGV(rec->mode, __u32, ptr, end); // used for open_mode
- LUNLOGV(rec->uid, __u32, ptr, end); // used for open_uid
- LUNLOGV(rec->gid, __u32, ptr, end); // used for open_gid
- kml_unpack_version(&rec->old_objectv, &ptr, end);
- kml_unpack_version(&rec->new_objectv, &ptr, end);
- LUNLOGV(rec->ino, __u64, ptr, end);
- LUNLOGV(rec->generation, __u32, ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-
-static int kml_unpack_symlink(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- kml_unpack_version(&rec->old_parentv, &ptr, end);
- kml_unpack_version(&rec->new_parentv, &ptr, end);
- kml_unpack_version(&rec->new_objectv, &ptr, end);
- LUNLOGV(rec->uid, __u32, ptr, end);
- LUNLOGV(rec->gid, __u32, ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- LUNLOGV(rec->targetlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
- UNLOGL(rec->target, char, rec->targetlen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-
-static int kml_unpack_rename(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- kml_unpack_version(&rec->old_objectv, &ptr, end);
- kml_unpack_version(&rec->new_objectv, &ptr, end);
- kml_unpack_version(&rec->old_parentv, &ptr, end);
- kml_unpack_version(&rec->new_parentv, &ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- LUNLOGV(rec->targetlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
- UNLOGL(rec->target, char, rec->targetlen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-
-static int kml_unpack_setattr(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- kml_unpack_version(&rec->old_objectv, &ptr, end);
- LUNLOGV(rec->valid, __u32, ptr, end);
- LUNLOGV(rec->mode, __u32, ptr, end);
- LUNLOGV(rec->uid, __u32, ptr, end);
- LUNLOGV(rec->gid, __u32, ptr, end);
- LUNLOGV(rec->size, __u64, ptr, end);
- LUNLOGV(rec->mtime_sec, __u32, ptr, end);
- LUNLOGV(rec->mtime_nsec, __u32, ptr, end);
- LUNLOGV(rec->ctime_sec, __u32, ptr, end);
- LUNLOGV(rec->ctime_nsec, __u32, ptr, end);
- LUNLOGV(rec->flags, __u32, ptr, end);
- LUNLOGV(rec->old_mode, __u32, ptr, end);
- LUNLOGV(rec->old_rdev, __u32, ptr, end);
- LUNLOGV(rec->old_uid, __u64, ptr, end);
- LUNLOGV(rec->old_gid, __u64, ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-
-static int kml_unpack_link(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- kml_unpack_version(&rec->old_parentv, &ptr, end);
- kml_unpack_version(&rec->new_parentv, &ptr, end);
- kml_unpack_version(&rec->new_objectv, &ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- LUNLOGV(rec->targetlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
- UNLOGL(rec->target, char, rec->targetlen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-static int kml_unpack_mknod(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- kml_unpack_version(&rec->old_parentv, &ptr, end);
- kml_unpack_version(&rec->new_parentv, &ptr, end);
- kml_unpack_version(&rec->new_objectv, &ptr, end);
- LUNLOGV(rec->mode, __u32, ptr, end);
- LUNLOGV(rec->uid, __u32, ptr, end);
- LUNLOGV(rec->gid, __u32, ptr, end);
- LUNLOGV(rec->major, __u32, ptr, end);
- LUNLOGV(rec->minor, __u32, ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-
-static int kml_unpack_write(struct kml_rec *rec, char **buf, char *end)
-{
- printf("NOT IMPLEMENTED");
- return 0;
-}
-
-
-static int kml_unpack_release(struct kml_rec *rec, char **buf, char *end)
-{
- printf("NOT IMPLEMENTED");
- return 0;
-}
-
-
-static int kml_unpack_trunc(struct kml_rec *rec, char **buf, char *end)
-{
- printf("NOT IMPLEMENTED");
- return 0;
-}
-
-
-static int kml_unpack_setextattr(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- kml_unpack_version(&rec->old_objectv, &ptr, end);
- kml_unpack_version(&rec->new_objectv, &ptr, end);
- LUNLOGV(rec->flags, __u32, ptr, end);
- LUNLOGV(rec->mode, __u32, ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- LUNLOGV(rec->namelen, __u32, ptr, end);
- LUNLOGV(rec->targetlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
- UNLOGL(rec->name, char, rec->namelen, ptr, end);
- UNLOGL(rec->target, char, rec->targetlen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-
-static int kml_unpack_delextattr(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- kml_unpack_version(&rec->old_objectv, &ptr, end);
- kml_unpack_version(&rec->new_objectv, &ptr, end);
- LUNLOGV(rec->flags, __u32, ptr, end);
- LUNLOGV(rec->mode, __u32, ptr, end);
- LUNLOGV(rec->pathlen, __u32, ptr, end);
- LUNLOGV(rec->namelen, __u32, ptr, end);
- LUNLOGV(rec->targetlen, __u32, ptr, end);
- UNLOGL(rec->path, char, rec->pathlen, ptr, end);
- UNLOGL(rec->name, char, rec->namelen, ptr, end);
-
- *buf = ptr;
-
- return 0;
-}
-
-static int kml_unpack_open(struct kml_rec *rec, char **buf, char *end)
-{
- printf("NOT IMPLEMENTED");
- return 0;
-}
-
-static int kml_unpack_kml_trunc(struct kml_rec *rec, char **buf, char *end)
-{
-
- printf("NOT IMPLEMENTED");
- return 0;
-}
-
-
-typedef int (*unpacker)(struct kml_rec *rec, char **buf, char *end);
-
-static unpacker unpackers[KML_OPCODE_NUM] =
-{
- [KML_OPCODE_NOOP] = kml_unpack_noop,
- [KML_OPCODE_CREATE] = kml_unpack_create,
- [KML_OPCODE_MKDIR] = kml_unpack_mkdir,
- [KML_OPCODE_UNLINK] = kml_unpack_unlink,
- [KML_OPCODE_RMDIR] = kml_unpack_rmdir,
- [KML_OPCODE_CLOSE] = kml_unpack_close,
- [KML_OPCODE_SYMLINK] = kml_unpack_symlink,
- [KML_OPCODE_RENAME] = kml_unpack_rename,
- [KML_OPCODE_SETATTR] = kml_unpack_setattr,
- [KML_OPCODE_LINK] = kml_unpack_link,
- [KML_OPCODE_OPEN] = kml_unpack_open,
- [KML_OPCODE_MKNOD] = kml_unpack_mknod,
- [KML_OPCODE_WRITE] = kml_unpack_write,
- [KML_OPCODE_RELEASE] = kml_unpack_release,
- [KML_OPCODE_TRUNC] = kml_unpack_trunc,
- [KML_OPCODE_SETEXTATTR] = kml_unpack_setextattr,
- [KML_OPCODE_DELEXTATTR] = kml_unpack_delextattr,
- [KML_OPCODE_KML_TRUNC] = kml_unpack_kml_trunc,
- [KML_OPCODE_GET_FILEID] = kml_unpack_get_fileid
-};
-
-int kml_unpack_prefix(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
- int n;
-
- UNLOGP(rec->prefix.hdr, struct kml_prefix_hdr, ptr, end);
- rec->prefix.hdr->len = NTOH__u32(rec->prefix.hdr->len);
- rec->prefix.hdr->version = NTOH__u32(rec->prefix.hdr->version);
- rec->prefix.hdr->pid = NTOH__u32(rec->prefix.hdr->pid);
- rec->prefix.hdr->auid = NTOH__u32(rec->prefix.hdr->auid);
- rec->prefix.hdr->fsuid = NTOH__u32(rec->prefix.hdr->fsuid);
- rec->prefix.hdr->fsgid = NTOH__u32(rec->prefix.hdr->fsgid);
- rec->prefix.hdr->opcode = NTOH__u32(rec->prefix.hdr->opcode);
- rec->prefix.hdr->ngroups = NTOH__u32(rec->prefix.hdr->ngroups);
-
- UNLOGL(rec->prefix.groups, __u32, rec->prefix.hdr->ngroups, ptr, end);
- for (n = 0; n < rec->prefix.hdr->ngroups; n++) {
- rec->prefix.groups[n] = NTOH__u32(rec->prefix.groups[n]);
- }
-
- *buf = ptr;
-
- return 0;
-}
-
-int kml_unpack_suffix(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
-
- UNLOGP(rec->suffix, struct kml_suffix, ptr, end);
- rec->suffix->prevrec = NTOH__u32(rec->suffix->prevrec);
- rec->suffix->recno = NTOH__u32(rec->suffix->recno);
- rec->suffix->time = NTOH__u32(rec->suffix->time);
- rec->suffix->len = NTOH__u32(rec->suffix->len);
-
- *buf = ptr;
-
- return 0;
-}
-
-int kml_unpack(struct kml_rec *rec, char **buf, char *end)
-{
- char *ptr = *buf;
- int err;
-
- if (((unsigned long)ptr % 4) != 0) {
- printf("InterMezzo: %s: record misaligned.\n", __FUNCTION__);
- return -EINVAL;
- }
-
- while (ptr < end) {
- __u32 *i = (__u32 *)ptr;
- if (*i)
- break;
- ptr += sizeof(*i);
- }
- *buf = ptr;
-
- memset(rec, 0, sizeof(*rec));
-
- err = kml_unpack_prefix(rec, &ptr, end);
- if (err) {
- printf("InterMezzo: %s: unpack_prefix failed: %d\n",
- __FUNCTION__, err);
- return err;
- }
-
- if (rec->prefix.hdr->opcode < 0 ||
- rec->prefix.hdr->opcode >= KML_OPCODE_NUM) {
- printf("InterMezzo: %s: invalid opcode (%d)\n",
- __FUNCTION__, rec->prefix.hdr->opcode);
- return -EINVAL;
- }
- err = unpackers[rec->prefix.hdr->opcode](rec, &ptr, end);
- if (err) {
- printf("InterMezzo: %s: unpacker failed: %d\n",
- __FUNCTION__, err);
- return err;
- }
-
- err = kml_unpack_suffix(rec, &ptr, end);
- if (err) {
- printf("InterMezzo: %s: unpack_suffix failed: %d\n",
- __FUNCTION__, err);
- return err;
- }
-
-
- if (rec->prefix.hdr->len != rec->suffix->len) {
- printf("InterMezzo: %s: lengths don't match\n",
- __FUNCTION__);
- return -EINVAL;
- }
- if ((rec->prefix.hdr->len % 4) != 0) {
- printf("InterMezzo: %s: record length not a "
- "multiple of 4.\n", __FUNCTION__);
- return -EINVAL;
- }
- if (ptr - *buf != rec->prefix.hdr->len) {
- printf("InterMezzo: %s: unpacking error\n",
- __FUNCTION__);
- return -EINVAL;
- }
- while (ptr < end) {
- __u32 *i = (__u32 *)ptr;
- if (*i)
- break;
- ptr += sizeof(*i);
- }
- *buf = ptr;
- return 0;
-}
-
-
-#ifndef __KERNEL__
-#define STR(ptr) ((ptr))? (ptr) : ""
-
-#define OPNAME(n) [KML_OPCODE_##n] = #n
-static char *opnames[KML_OPCODE_NUM] = {
- OPNAME(NOOP),
- OPNAME(CREATE),
- OPNAME(MKDIR),
- OPNAME(UNLINK),
- OPNAME(RMDIR),
- OPNAME(CLOSE),
- OPNAME(SYMLINK),
- OPNAME(RENAME),
- OPNAME(SETATTR),
- OPNAME(LINK),
- OPNAME(OPEN),
- OPNAME(MKNOD),
- OPNAME(WRITE),
- OPNAME(RELEASE),
- OPNAME(TRUNC),
- OPNAME(SETEXTATTR),
- OPNAME(DELEXTATTR),
- OPNAME(KML_TRUNC),
- OPNAME(GET_FILEID)
-};
-#undef OPNAME
-
-static char *print_opname(int op)
-{
- if (op < 0 || op >= sizeof (opnames) / sizeof (*opnames))
- return NULL;
- return opnames[op];
-}
-
-
-static char *print_time(__u64 i)
-{
- char buf[128];
-
- memset(buf, 0, 128);
-
-#ifndef __KERNEL__
- strftime(buf, 128, "%Y/%m/%d %H:%M:%S", gmtime((time_t *)&i));
-#else
- sprintf(buf, "%Ld\n", i);
-#endif
-
- return strdup(buf);
-}
-
-static char *print_version(struct presto_version *ver)
-{
- char ver_buf[128];
- char *mtime;
- char *ctime;
-
- if (!ver || ver->pv_ctime == 0) {
- return strdup("");
- }
- mtime = print_time(ver->pv_mtime);
- ctime = print_time(ver->pv_ctime);
- sprintf(ver_buf, "mtime %s, ctime %s, len %lld",
- mtime, ctime, ver->pv_size);
- free(mtime);
- free(ctime);
- return strdup(ver_buf);
-}
-
-
-char *kml_print_rec(struct kml_rec *rec, int brief)
-{
- char *str;
- char *nov, *oov, *ntv, *otv, *npv, *opv;
- char *rectime, *mtime, *ctime;
-
- if (brief) {
- str = g_strdup_printf(" %08d %7s %*s %*s",
- rec->suffix->recno,
- print_opname (rec->prefix.hdr->opcode),
- rec->pathlen, STR(rec->path),
- rec->targetlen, STR(rec->target));
-
- return str;
- }
-
- rectime = print_time(rec->suffix->time);
- mtime = print_time(rec->mtime);
- ctime = print_time(rec->ctime);
-
- nov = print_version(rec->new_objectv);
- oov = print_version(rec->old_objectv);
- ntv = print_version(rec->new_targetv);
- otv = print_version(rec->old_targetv);
- npv = print_version(rec->new_parentv);
- opv = print_version(rec->old_parentv);
-
- str = g_strdup_printf("\n -- Record:\n"
- " Recno %d\n"
- " KML off %lld\n"
- " Version %d\n"
- " Len %d\n"
- " Suf len %d\n"
- " Time %s\n"
- " Opcode %d\n"
- " Op %s\n"
- " Pid %d\n"
- " AUid %d\n"
- " Fsuid %d\n"
- " Fsgid %d\n"
- " Prevrec %d\n"
- " Ngroups %d\n"
- //" Groups @{$self->{groups}}\n"
- " -- Path:\n"
- " Inode %d\n"
- " Gen num %u\n"
- " Old mode %o\n"
- " Old rdev %x\n"
- " Old uid %llu\n"
- " Old gid %llu\n"
- " Path %*s\n"
- //" Open_mode %o\n",
- " Pathlen %d\n"
- " Tgt %*s\n"
- " Tgtlen %d\n"
- " Old Tgt %*s\n"
- " Old Tgtln %d\n"
- " -- Attr:\n"
- " Valid %x\n"
- " mode %o, uid %d, gid %d, size %lld, mtime %s, ctime %s rdev %x (%d:%d)\n"
- " -- Versions:\n"
- " New object %s\n"
- " Old object %s\n"
- " New target %s\n"
- " Old target %s\n"
- " New parent %s\n"
- " Old parent %s\n",
-
- rec->suffix->recno,
- rec->offset,
- rec->prefix.hdr->version,
- rec->prefix.hdr->len,
- rec->suffix->len,
- rectime,
- rec->prefix.hdr->opcode,
- print_opname (rec->prefix.hdr->opcode),
- rec->prefix.hdr->pid,
- rec->prefix.hdr->auid,
- rec->prefix.hdr->fsuid,
- rec->prefix.hdr->fsgid,
- rec->suffix->prevrec,
- rec->prefix.hdr->ngroups,
- rec->ino,
- rec->generation,
- rec->old_mode,
- rec->old_rdev,
- rec->old_uid,
- rec->old_gid,
- rec->pathlen,
- STR(rec->path),
- rec->pathlen,
- rec->targetlen,
- STR(rec->target),
- rec->targetlen,
- rec->old_targetlen,
- STR(rec->old_target),
- rec->old_targetlen,
-
- rec->valid,
- rec->mode,
- rec->uid,
- rec->gid,
- rec->size,
- mtime,
- ctime,
- rec->rdev, rec->major, rec->minor,
- nov, oov, ntv, otv, npv, opv);
-
- free(nov);
- free(oov);
- free(ntv);
- free(otv);
- free(npv);
- free(opv);
-
- free(rectime);
- free(ctime);
- free(mtime);
-
- return str;
-}
-#endif
+++ /dev/null
-#include <linux/list.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_kml.h"
-
-
-// dlogit -- oppsite to logit ()
-// return the sbuf + size;
-char *dlogit (void *tbuf, const void *sbuf, int size)
-{
- char *ptr = (char *)sbuf;
- memcpy(tbuf, ptr, size);
- ptr += size;
- return ptr;
-}
-
-static spinlock_t kml_lock = SPIN_LOCK_UNLOCKED;
-static char buf[1024];
-char * bdup_printf (char *format, ...)
-{
- va_list args;
- int i;
- char *path;
- unsigned long flags;
-
- spin_lock_irqsave(&kml_lock, flags);
- va_start(args, format);
- i = vsprintf(buf, format, args); /* hopefully i < sizeof(buf) */
- va_end(args);
-
- PRESTO_ALLOC (path, char *, i + 1);
- if (path == NULL)
- return NULL;
- strcpy (path, buf);
-
- spin_unlock_irqrestore(&kml_lock, flags);
- return path;
-}
-
-
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2000 Stelias Computing, Inc.
- * Copyright (C) 2000 Red Hat, Inc.
- * Copyright (C) 2000 Mountain View Data, Inc.
- *
- * Extended Attribute Support
- * Copyright (C) 2001 Shirish H. Phatak, Tacit Networks, Inc.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <asm/bitops.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/ext2_fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/sched.h>
-#include <linux/stat.h>
-#include <linux/string.h>
-#include <linux/blkdev.h>
-#include <linux/init.h>
-#include <linux/module.h>
-
-#include <linux/fsfilter.h>
-#include "intermezzo_fs.h"
-
-
-int filter_print_entry = 0;
-int filter_debug = 0xfffffff;
-/*
- * The function in this file are responsible for setting up the
- * correct methods layered file systems like InterMezzo and snapfs
- */
-
-
-static struct filter_fs filter_oppar[FILTER_FS_TYPES];
-
-/* get to the upper methods (intermezzo, snapfs) */
-inline struct super_operations *filter_c2usops(struct filter_fs *cache)
-{
- return &cache->o_fops.filter_sops;
-}
-
-inline struct inode_operations *filter_c2udiops(struct filter_fs *cache)
-{
- return &cache->o_fops.filter_dir_iops;
-}
-
-
-inline struct inode_operations *filter_c2ufiops(struct filter_fs *cache)
-{
- return &cache->o_fops.filter_file_iops;
-}
-
-inline struct inode_operations *filter_c2usiops(struct filter_fs *cache)
-{
- return &cache->o_fops.filter_sym_iops;
-}
-
-
-inline struct file_operations *filter_c2udfops(struct filter_fs *cache)
-{
- return &cache->o_fops.filter_dir_fops;
-}
-
-inline struct file_operations *filter_c2uffops(struct filter_fs *cache)
-{
- return &cache->o_fops.filter_file_fops;
-}
-
-inline struct file_operations *filter_c2usfops(struct filter_fs *cache)
-{
- return &cache->o_fops.filter_sym_fops;
-}
-
-inline struct dentry_operations *filter_c2udops(struct filter_fs *cache)
-{
- return &cache->o_fops.filter_dentry_ops;
-}
-
-/* get to the cache (lower) methods */
-inline struct super_operations *filter_c2csops(struct filter_fs *cache)
-{
- return cache->o_caops.cache_sops;
-}
-
-inline struct inode_operations *filter_c2cdiops(struct filter_fs *cache)
-{
- return cache->o_caops.cache_dir_iops;
-}
-
-inline struct inode_operations *filter_c2cfiops(struct filter_fs *cache)
-{
- return cache->o_caops.cache_file_iops;
-}
-
-inline struct inode_operations *filter_c2csiops(struct filter_fs *cache)
-{
- return cache->o_caops.cache_sym_iops;
-}
-
-inline struct file_operations *filter_c2cdfops(struct filter_fs *cache)
-{
- return cache->o_caops.cache_dir_fops;
-}
-
-inline struct file_operations *filter_c2cffops(struct filter_fs *cache)
-{
- return cache->o_caops.cache_file_fops;
-}
-
-inline struct file_operations *filter_c2csfops(struct filter_fs *cache)
-{
- return cache->o_caops.cache_sym_fops;
-}
-
-inline struct dentry_operations *filter_c2cdops(struct filter_fs *cache)
-{
- return cache->o_caops.cache_dentry_ops;
-}
-
-
-void filter_setup_journal_ops(struct filter_fs *ops, char *cache_type)
-{
- if ( strlen(cache_type) == strlen("ext2") &&
- memcmp(cache_type, "ext2", strlen("ext2")) == 0 ) {
-#ifdef CONFIG_EXT2_FS
- ops->o_trops = &presto_ext2_journal_ops;
-#else
- ops->o_trops = NULL;
-#endif
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
-
- if ( strlen(cache_type) == strlen("ext3") &&
- memcmp(cache_type, "ext3", strlen("ext3")) == 0 ) {
-#if defined(CONFIG_EXT3_FS) || defined (CONFIG_EXT3_FS_MODULE)
- ops->o_trops = &presto_ext3_journal_ops;
-#else
- ops->o_trops = NULL;
-#endif
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
-
- if ( strlen(cache_type) == strlen("tmpfs") &&
- memcmp(cache_type, "tmpfs", strlen("tmpfs")) == 0 ) {
-#if defined(CONFIG_TMPFS)
- ops->o_trops = &presto_tmpfs_journal_ops;
-#else
- ops->o_trops = NULL;
-#endif
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
-
- if ( strlen(cache_type) == strlen("reiserfs") &&
- memcmp(cache_type, "reiserfs", strlen("reiserfs")) == 0 ) {
-#if 0
- /* #if defined(CONFIG_REISERFS_FS) || defined(CONFIG_REISERFS_FS_MODULE) */
- ops->o_trops = &presto_reiserfs_journal_ops;
-#else
- ops->o_trops = NULL;
-#endif
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
-
- if ( strlen(cache_type) == strlen("xfs") &&
- memcmp(cache_type, "xfs", strlen("xfs")) == 0 ) {
-#if 0
-/*#if defined(CONFIG_XFS_FS) || defined (CONFIG_XFS_FS_MODULE) */
- ops->o_trops = &presto_xfs_journal_ops;
-#else
- ops->o_trops = NULL;
-#endif
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
-
- if ( strlen(cache_type) == strlen("obdfs") &&
- memcmp(cache_type, "obdfs", strlen("obdfs")) == 0 ) {
-#if defined(CONFIG_OBDFS_FS) || defined (CONFIG_OBDFS_FS_MODULE)
- ops->o_trops = presto_obdfs_journal_ops;
-#else
- ops->o_trops = NULL;
-#endif
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
-}
-
-
-/* find the cache for this FS */
-struct filter_fs *filter_get_filter_fs(const char *cache_type)
-{
- struct filter_fs *ops = NULL;
- FENTRY;
-
- if ( strlen(cache_type) == strlen("ext2") &&
- memcmp(cache_type, "ext2", strlen("ext2")) == 0 ) {
- ops = &filter_oppar[FILTER_FS_EXT2];
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
-
- if ( strlen(cache_type) == strlen("xfs") &&
- memcmp(cache_type, "xfs", strlen("xfs")) == 0 ) {
- ops = &filter_oppar[FILTER_FS_XFS];
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
-
- if ( strlen(cache_type) == strlen("ext3") &&
- memcmp(cache_type, "ext3", strlen("ext3")) == 0 ) {
- ops = &filter_oppar[FILTER_FS_EXT3];
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
-
- if ( strlen(cache_type) == strlen("tmpfs") &&
- memcmp(cache_type, "tmpfs", strlen("tmpfs")) == 0 ) {
- ops = &filter_oppar[FILTER_FS_TMPFS];
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
-
- if ( strlen(cache_type) == strlen("reiserfs") &&
- memcmp(cache_type, "reiserfs", strlen("reiserfs")) == 0 ) {
- ops = &filter_oppar[FILTER_FS_REISERFS];
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
- if ( strlen(cache_type) == strlen("obdfs") &&
- memcmp(cache_type, "obdfs", strlen("obdfs")) == 0 ) {
- ops = &filter_oppar[FILTER_FS_OBDFS];
- FDEBUG(D_SUPER, "ops at %p\n", ops);
- }
-
- if (ops == NULL) {
- CERROR("prepare to die: unrecognized cache type for Filter\n");
- }
- FEXIT;
- return ops;
-}
-
-
-/*
- * Frobnicate the InterMezzo operations
- * this establishes the link between the InterMezzo file system
- * and the underlying file system used for the cache.
- */
-
-void filter_setup_super_ops(struct filter_fs *cache, struct super_operations *cache_sops, struct super_operations *filter_sops)
-{
- /* Get ptr to the shared struct snapfs_ops structure. */
- struct filter_ops *props = &cache->o_fops;
- /* Get ptr to the shared struct cache_ops structure. */
- struct cache_ops *caops = &cache->o_caops;
-
- FENTRY;
-
- if ( cache->o_flags & FILTER_DID_SUPER_OPS ) {
- FEXIT;
- return;
- }
- cache->o_flags |= FILTER_DID_SUPER_OPS;
-
- /* Set the cache superblock operations to point to the
- superblock operations of the underlying file system. */
- caops->cache_sops = cache_sops;
-
- /*
- * Copy the cache (real fs) superblock ops to the "filter"
- * superblock ops as defaults. Some will be changed below
- */
- memcpy(&props->filter_sops, cache_sops, sizeof(*cache_sops));
-
- /* 'put_super' unconditionally is that of filter */
- if (filter_sops->put_super) {
- props->filter_sops.put_super = filter_sops->put_super;
- }
-
- if (cache_sops->read_inode) {
- props->filter_sops.read_inode = filter_sops->read_inode;
- FDEBUG(D_INODE, "setting filter_read_inode, cache_ops %p, cache %p, ri at %p\n",
- cache, cache, props->filter_sops.read_inode);
- }
-
- if (cache_sops->remount_fs)
- props->filter_sops.remount_fs = filter_sops->remount_fs;
- FEXIT;
-}
-
-
-void filter_setup_dir_ops(struct filter_fs *cache, struct inode *inode, struct inode_operations *filter_iops, struct file_operations *filter_fops)
-{
- struct inode_operations *cache_filter_iops;
- struct inode_operations *cache_iops = inode->i_op;
- struct file_operations *cache_fops = inode->i_fop;
- FENTRY;
-
- if ( cache->o_flags & FILTER_DID_DIR_OPS ) {
- FEXIT;
- return;
- }
- cache->o_flags |= FILTER_DID_DIR_OPS;
-
- /* former ops become cache_ops */
- cache->o_caops.cache_dir_iops = cache_iops;
- cache->o_caops.cache_dir_fops = cache_fops;
- FDEBUG(D_SUPER, "filter at %p, cache iops %p, iops %p\n",
- cache, cache_iops, filter_c2udiops(cache));
-
- /* setup our dir iops: copy and modify */
- memcpy(filter_c2udiops(cache), cache_iops, sizeof(*cache_iops));
-
- /* abbreviate */
- cache_filter_iops = filter_c2udiops(cache);
-
- /* methods that filter if cache filesystem has these ops */
- if (cache_iops->lookup && filter_iops->lookup)
- cache_filter_iops->lookup = filter_iops->lookup;
- if (cache_iops->create && filter_iops->create)
- cache_filter_iops->create = filter_iops->create;
- if (cache_iops->link && filter_iops->link)
- cache_filter_iops->link = filter_iops->link;
- if (cache_iops->unlink && filter_iops->unlink)
- cache_filter_iops->unlink = filter_iops->unlink;
- if (cache_iops->mkdir && filter_iops->mkdir)
- cache_filter_iops->mkdir = filter_iops->mkdir;
- if (cache_iops->rmdir && filter_iops->rmdir)
- cache_filter_iops->rmdir = filter_iops->rmdir;
- if (cache_iops->symlink && filter_iops->symlink)
- cache_filter_iops->symlink = filter_iops->symlink;
- if (cache_iops->rename && filter_iops->rename)
- cache_filter_iops->rename = filter_iops->rename;
- if (cache_iops->mknod && filter_iops->mknod)
- cache_filter_iops->mknod = filter_iops->mknod;
- if (cache_iops->permission && filter_iops->permission)
- cache_filter_iops->permission = filter_iops->permission;
- if (cache_iops->getattr)
- cache_filter_iops->getattr = filter_iops->getattr;
- /* Some filesystems do not use a setattr method of their own
- instead relying on inode_setattr/write_inode. We still need to
- journal these so we make setattr an unconditional operation.
- XXX: we should probably check for write_inode. SHP
- */
- /*if (cache_iops->setattr)*/
- cache_filter_iops->setattr = filter_iops->setattr;
-#ifdef CONFIG_FS_EXT_ATTR
- /* For now we assume that posix acls are handled through extended
- * attributes. If this is not the case, we must explicitly trap
- * posix_set_acl. SHP
- */
- if (cache_iops->set_ext_attr && filter_iops->set_ext_attr)
- cache_filter_iops->set_ext_attr = filter_iops->set_ext_attr;
-#endif
-
-
- /* copy dir fops */
- memcpy(filter_c2udfops(cache), cache_fops, sizeof(*cache_fops));
-
- /* unconditional filtering operations */
- filter_c2udfops(cache)->ioctl = filter_fops->ioctl;
-
- FEXIT;
-}
-
-
-void filter_setup_file_ops(struct filter_fs *cache, struct inode *inode, struct inode_operations *filter_iops, struct file_operations *filter_fops)
-{
- struct inode_operations *pr_iops;
- struct inode_operations *cache_iops = inode->i_op;
- struct file_operations *cache_fops = inode->i_fop;
- FENTRY;
-
- if ( cache->o_flags & FILTER_DID_FILE_OPS ) {
- FEXIT;
- return;
- }
- cache->o_flags |= FILTER_DID_FILE_OPS;
-
- /* steal the old ops */
- /* former ops become cache_ops */
- cache->o_caops.cache_file_iops = cache_iops;
- cache->o_caops.cache_file_fops = cache_fops;
-
- /* abbreviate */
- pr_iops = filter_c2ufiops(cache);
-
- /* setup our dir iops: copy and modify */
- memcpy(pr_iops, cache_iops, sizeof(*cache_iops));
-
- /* copy dir fops */
- CERROR("*** cache file ops at %p\n", cache_fops);
- memcpy(filter_c2uffops(cache), cache_fops, sizeof(*cache_fops));
-
- /* assign */
- /* See comments above in filter_setup_dir_ops. SHP */
- /*if (cache_iops->setattr)*/
- pr_iops->setattr = filter_iops->setattr;
- if (cache_iops->getattr)
- pr_iops->getattr = filter_iops->getattr;
- /* XXX Should this be conditional rmr ? */
- pr_iops->permission = filter_iops->permission;
-#ifdef CONFIG_FS_EXT_ATTR
- /* For now we assume that posix acls are handled through extended
- * attributes. If this is not the case, we must explicitly trap and
- * posix_set_acl
- */
- if (cache_iops->set_ext_attr && filter_iops->set_ext_attr)
- pr_iops->set_ext_attr = filter_iops->set_ext_attr;
-#endif
-
-
- /* unconditional filtering operations */
- filter_c2uffops(cache)->open = filter_fops->open;
- filter_c2uffops(cache)->release = filter_fops->release;
- filter_c2uffops(cache)->write = filter_fops->write;
- filter_c2uffops(cache)->ioctl = filter_fops->ioctl;
-
- FEXIT;
-}
-
-/* XXX in 2.3 there are "fast" and "slow" symlink ops for ext2 XXX */
-void filter_setup_symlink_ops(struct filter_fs *cache, struct inode *inode, struct inode_operations *filter_iops, struct file_operations *filter_fops)
-{
- struct inode_operations *pr_iops;
- struct inode_operations *cache_iops = inode->i_op;
- struct file_operations *cache_fops = inode->i_fop;
- FENTRY;
-
- if ( cache->o_flags & FILTER_DID_SYMLINK_OPS ) {
- FEXIT;
- return;
- }
- cache->o_flags |= FILTER_DID_SYMLINK_OPS;
-
- /* steal the old ops */
- cache->o_caops.cache_sym_iops = cache_iops;
- cache->o_caops.cache_sym_fops = cache_fops;
-
- /* abbreviate */
- pr_iops = filter_c2usiops(cache);
-
- /* setup our dir iops: copy and modify */
- memcpy(pr_iops, cache_iops, sizeof(*cache_iops));
-
- /* See comments above in filter_setup_dir_ops. SHP */
- /* if (cache_iops->setattr) */
- pr_iops->setattr = filter_iops->setattr;
- if (cache_iops->getattr)
- pr_iops->getattr = filter_iops->getattr;
-
- /* assign */
- /* copy fops - careful for symlinks they might be NULL */
- if ( cache_fops ) {
- memcpy(filter_c2usfops(cache), cache_fops, sizeof(*cache_fops));
- }
-
- FEXIT;
-}
-
-void filter_setup_dentry_ops(struct filter_fs *cache,
- struct dentry_operations *cache_dop,
- struct dentry_operations *filter_dop)
-{
- if ( cache->o_flags & FILTER_DID_DENTRY_OPS ) {
- FEXIT;
- return;
- }
- cache->o_flags |= FILTER_DID_DENTRY_OPS;
-
- cache->o_caops.cache_dentry_ops = cache_dop;
- memcpy(&cache->o_fops.filter_dentry_ops,
- filter_dop, sizeof(*filter_dop));
-
- if (cache_dop && cache_dop != filter_dop && cache_dop->d_revalidate){
- CERROR("WARNING: filter overriding revalidation!\n");
- }
- return;
-}
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Author: Peter J. Braam <braam@clusterfs.com>
- * Copyright (C) 1998 Stelias Computing Inc
- * Copyright (C) 1999 Red Hat Inc.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * This file implements basic routines supporting the semantics
- */
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/namei.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <linux/vmalloc.h>
-#include <linux/slab.h>
-#include <asm/segment.h>
-#include <asm/uaccess.h>
-#include <linux/string.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-int presto_walk(const char *name, struct nameidata *nd)
-{
- int err;
- /* we do not follow symlinks to support symlink operations
- correctly. The vfs should always hand us resolved dentries
- so we should not be required to use LOOKUP_FOLLOW. At the
- reintegrating end, lento again should be working with the
- resolved pathname and not the symlink. SHP
- XXX: This code implies that direct symlinks do not work. SHP
- */
- unsigned int flags = 0; //LOOKUP_POSITIVE;
-
- ENTRY;
- err = path_lookup(name, flags, nd);
- return err;
-}
-
-
-/* find the presto minor device for this inode */
-int presto_i2m(struct inode *inode)
-{
- struct presto_cache *cache;
- ENTRY;
- cache = presto_get_cache(inode);
- CDEBUG(D_PSDEV, "\n");
- if ( !cache ) {
- CERROR("PRESTO: BAD: cannot find cache for dev %s, ino %ld\n",
- inode->i_sb->s_id, inode->i_ino);
- EXIT;
- return -1;
- }
- EXIT;
- return cache->cache_psdev->uc_minor;
-}
-
-inline int presto_f2m(struct presto_file_set *fset)
-{
- return fset->fset_cache->cache_psdev->uc_minor;
-
-}
-
-inline int presto_c2m(struct presto_cache *cache)
-{
- return cache->cache_psdev->uc_minor;
-
-}
-
-/* XXX check this out */
-struct presto_file_set *presto_path2fileset(const char *name)
-{
- struct nameidata nd;
- struct presto_file_set *fileset;
- int error;
- ENTRY;
-
- error = presto_walk(name, &nd);
- if (!error) {
-#if 0
- error = do_revalidate(nd.dentry);
-#endif
- if (!error)
- fileset = presto_fset(nd.dentry);
- path_release(&nd);
- EXIT;
- } else
- fileset = ERR_PTR(error);
-
- EXIT;
- return fileset;
-}
-
-/* check a flag on this dentry or fset root. Semantics:
- - most flags: test if it is set
- - PRESTO_ATTR, PRESTO_DATA return 1 if PRESTO_FSETINSYNC is set
-*/
-int presto_chk(struct dentry *dentry, int flag)
-{
- int minor;
- struct presto_file_set *fset = presto_fset(dentry);
-
- ENTRY;
- minor = presto_i2m(dentry->d_inode);
- if ( izo_channels[minor].uc_no_filter ) {
- EXIT;
- return ~0;
- }
-
- /* if the fileset is in sync DATA and ATTR are OK */
- if ( fset &&
- (flag == PRESTO_ATTR || flag == PRESTO_DATA) &&
- (fset->fset_flags & FSET_INSYNC) ) {
- CDEBUG(D_INODE, "fset in sync (ino %ld)!\n",
- fset->fset_dentry->d_inode->i_ino);
- EXIT;
- return 1;
- }
-
- EXIT;
- return (presto_d2d(dentry)->dd_flags & flag);
-}
-
-/* set a bit in the dentry flags */
-void presto_set(struct dentry *dentry, int flag)
-{
- ENTRY;
- if ( dentry->d_inode ) {
- CDEBUG(D_INODE, "SET ino %ld, flag %x\n",
- dentry->d_inode->i_ino, flag);
- }
- if ( presto_d2d(dentry) == NULL) {
- CERROR("dentry without d_fsdata in presto_set: %p: %*s", dentry,
- dentry->d_name.len, dentry->d_name.name);
- BUG();
- }
- presto_d2d(dentry)->dd_flags |= flag;
- EXIT;
-}
-
-/* given a path: complete the closes on the fset */
-int lento_complete_closes(char *path)
-{
- struct nameidata nd;
- struct dentry *dentry;
- int error;
- struct presto_file_set *fset;
- ENTRY;
-
- error = presto_walk(path, &nd);
- if (error) {
- EXIT;
- return error;
- }
-
- dentry = nd.dentry;
-
- error = -ENXIO;
- if ( !presto_ispresto(dentry->d_inode) ) {
- EXIT;
- goto out_complete;
- }
-
- fset = presto_fset(dentry);
- error = -EINVAL;
- if ( !fset ) {
- CERROR("No fileset!\n");
- EXIT;
- goto out_complete;
- }
-
- /* transactions and locking are internal to this function */
- error = presto_complete_lml(fset);
-
- EXIT;
- out_complete:
- path_release(&nd);
- return error;
-}
-
-#if 0
-/* given a path: write a close record and cancel an LML record, finally
- call truncate LML. Lento is doing this so it goes in with uid/gid's
- root.
-*/
-int lento_cancel_lml(char *path,
- __u64 lml_offset,
- __u64 remote_ino,
- __u32 remote_generation,
- __u32 remote_version,
- struct lento_vfs_context *info)
-{
- struct nameidata nd;
- struct rec_info rec;
- struct dentry *dentry;
- int error;
- struct presto_file_set *fset;
- void *handle;
- struct presto_version new_ver;
- ENTRY;
-
-
- error = presto_walk(path, &nd);
- if (error) {
- EXIT;
- return error;
- }
- dentry = nd.dentry;
-
- error = -ENXIO;
- if ( !presto_ispresto(dentry->d_inode) ) {
- EXIT;
- goto out_cancel_lml;
- }
-
- fset = presto_fset(dentry);
-
- error=-EINVAL;
- if (fset==NULL) {
- CERROR("No fileset!\n");
- EXIT;
- goto out_cancel_lml;
- }
-
- /* this only requires a transaction below which is automatic */
- handle = presto_trans_start(fset, dentry->d_inode, PRESTO_OP_RELEASE);
- if ( IS_ERR(handle) ) {
- error = -ENOMEM;
- EXIT;
- goto out_cancel_lml;
- }
-
- if (info->flags & LENTO_FL_CANCEL_LML) {
- error = presto_clear_lml_close(fset, lml_offset);
- if ( error ) {
- presto_trans_commit(fset, handle);
- EXIT;
- goto out_cancel_lml;
- }
- }
-
-
- if (info->flags & LENTO_FL_WRITE_KML) {
- presto_getversion(&new_ver, dentry->d_inode);
- error = presto_journal_close(&rec, fset, NULL, dentry,
- &new_ver);
- if ( error ) {
- EXIT;
- presto_trans_commit(fset, handle);
- goto out_cancel_lml;
- }
- }
-
- if (info->flags & LENTO_FL_WRITE_EXPECT) {
- error = presto_write_last_rcvd(&rec, fset, info);
- if ( error < 0 ) {
- EXIT;
- presto_trans_commit(fset, handle);
- goto out_cancel_lml;
- }
- }
-
- presto_trans_commit(fset, handle);
-
- if (info->flags & LENTO_FL_CANCEL_LML) {
- presto_truncate_lml(fset);
- }
-
-
- out_cancel_lml:
- EXIT;
- path_release(&nd);
- return error;
-}
-#endif
-
-/* given a dentry, operate on the flags in its dentry. Used by downcalls */
-int izo_mark_dentry(struct dentry *dentry, int and_flag, int or_flag,
- int *res)
-{
- int error = 0;
-
- if (presto_d2d(dentry) == NULL) {
- CERROR("InterMezzo: no ddata for inode %ld in %s\n",
- dentry->d_inode->i_ino, __FUNCTION__);
- return -EINVAL;
- }
-
- CDEBUG(D_INODE, "inode: %ld, and flag %x, or flag %x, dd_flags %x\n",
- dentry->d_inode->i_ino, and_flag, or_flag,
- presto_d2d(dentry)->dd_flags);
-
- presto_d2d(dentry)->dd_flags &= and_flag;
- presto_d2d(dentry)->dd_flags |= or_flag;
- if (res)
- *res = presto_d2d(dentry)->dd_flags;
-
- return error;
-}
-
-/* given a path, operate on the flags in its cache. Used by mark_ioctl */
-int izo_mark_cache(struct dentry *dentry, int and_flag, int or_flag,
- int *res)
-{
- struct presto_cache *cache;
-
- if (presto_d2d(dentry) == NULL) {
- CERROR("InterMezzo: no ddata for inode %ld in %s\n",
- dentry->d_inode->i_ino, __FUNCTION__);
- return -EINVAL;
- }
-
- CDEBUG(D_INODE, "inode: %ld, and flag %x, or flag %x, dd_flags %x\n",
- dentry->d_inode->i_ino, and_flag, or_flag,
- presto_d2d(dentry)->dd_flags);
-
- cache = presto_get_cache(dentry->d_inode);
- if ( !cache ) {
- CERROR("PRESTO: BAD: cannot find cache in izo_mark_cache\n");
- return -EBADF;
- }
-
- cache->cache_flags &= and_flag;
- cache->cache_flags |= or_flag;
- if (res)
- *res = (int)cache->cache_flags;
-
- return 0;
-}
-
-int presto_set_max_kml_size(const char *path, unsigned long max_size)
-{
- struct presto_file_set *fset;
-
- ENTRY;
-
- fset = presto_path2fileset(path);
- if (IS_ERR(fset)) {
- EXIT;
- return PTR_ERR(fset);
- }
-
- fset->kml_truncate_size = max_size;
- CDEBUG(D_CACHE, "KML truncate size set to %lu bytes for fset %s.\n",
- max_size, path);
-
- EXIT;
- return 0;
-}
-
-int izo_mark_fset(struct dentry *dentry, int and_flag, int or_flag,
- int * res)
-{
- struct presto_file_set *fset;
-
- fset = presto_fset(dentry);
- if ( !fset ) {
- CERROR("PRESTO: BAD: cannot find cache in izo_mark_cache\n");
- make_bad_inode(dentry->d_inode);
- return -EBADF;
- }
- fset->fset_flags &= and_flag;
- fset->fset_flags |= or_flag;
- if (res)
- *res = (int)fset->fset_flags;
-
- return 0;
-}
-
-/* talk to Lento about the permit */
-static int presto_permit_upcall(struct dentry *dentry)
-{
- int rc;
- char *path, *buffer;
- int pathlen;
- int minor;
- int fsetnamelen;
- struct presto_file_set *fset = NULL;
-
- ENTRY;
-
- if ( (minor = presto_i2m(dentry->d_inode)) < 0) {
- EXIT;
- return -EINVAL;
- }
-
- fset = presto_fset(dentry);
- if (!fset) {
- EXIT;
- return -ENOTCONN;
- }
-
- if ( !presto_lento_up(minor) ) {
- if ( fset->fset_flags & FSET_STEAL_PERMIT ) {
- EXIT;
- return 0;
- } else {
- EXIT;
- return -ENOTCONN;
- }
- }
-
- PRESTO_ALLOC(buffer, PAGE_SIZE);
- if ( !buffer ) {
- CERROR("PRESTO: out of memory!\n");
- EXIT;
- return -ENOMEM;
- }
- path = presto_path(dentry, fset->fset_dentry, buffer, PAGE_SIZE);
- pathlen = MYPATHLEN(buffer, path);
- fsetnamelen = strlen(fset->fset_name);
- rc = izo_upc_permit(minor, dentry, pathlen, path, fset->fset_name);
- PRESTO_FREE(buffer, PAGE_SIZE);
- EXIT;
- return rc;
-}
-
-/* get a write permit for the fileset of this inode
- * - if this returns a negative value there was an error
- * - if 0 is returned the permit was already in the kernel -- or --
- * Lento gave us the permit without reintegration
- * - lento returns the number of records it reintegrated
- *
- * Note that if this fileset has branches, a permit will -never- to a normal
- * process for writing in the data area (ie, outside of .intermezzo)
- */
-int presto_get_permit(struct inode * inode)
-{
- struct dentry *de;
- struct presto_file_set *fset;
- int minor = presto_i2m(inode);
- int rc = 0;
-
- ENTRY;
- if (minor < 0) {
- EXIT;
- return -1;
- }
-
- if ( ISLENTO(minor) ) {
- EXIT;
- return 0;
- }
-
- if (list_empty(&inode->i_dentry)) {
- CERROR("No alias for inode %d\n", (int) inode->i_ino);
- EXIT;
- return -EINVAL;
- }
-
- de = list_entry(inode->i_dentry.next, struct dentry, d_alias);
-
- if (presto_chk(de, PRESTO_DONT_JOURNAL)) {
- EXIT;
- return 0;
- }
-
- fset = presto_fset(de);
- if ( !fset ) {
- CERROR("Presto: no fileset in presto_get_permit!\n");
- EXIT;
- return -EINVAL;
- }
-
- if (fset->fset_flags & FSET_HAS_BRANCHES) {
- EXIT;
- return -EROFS;
- }
-
- spin_lock(&fset->fset_permit_lock);
- if (fset->fset_flags & FSET_HASPERMIT) {
- fset->fset_permit_count++;
- CDEBUG(D_INODE, "permit count now %d, inode %lx\n",
- fset->fset_permit_count, inode->i_ino);
- spin_unlock(&fset->fset_permit_lock);
- EXIT;
- return 0;
- }
-
- /* Allow reintegration to proceed without locks -SHP */
- fset->fset_permit_upcall_count++;
- if (fset->fset_permit_upcall_count == 1) {
- spin_unlock(&fset->fset_permit_lock);
- rc = presto_permit_upcall(fset->fset_dentry);
- spin_lock(&fset->fset_permit_lock);
- fset->fset_permit_upcall_count--;
- if (rc == 0) {
- izo_mark_fset(fset->fset_dentry, ~0, FSET_HASPERMIT,
- NULL);
- fset->fset_permit_count++;
- } else if (rc == ENOTCONN) {
- CERROR("InterMezzo: disconnected operation. stealing permit.\n");
- izo_mark_fset(fset->fset_dentry, ~0, FSET_HASPERMIT,
- NULL);
- fset->fset_permit_count++;
- /* set a disconnected flag here to stop upcalls */
- rc = 0;
- } else {
- CERROR("InterMezzo: presto_permit_upcall failed: %d\n", rc);
- rc = -EROFS;
- /* go to sleep here and try again? */
- }
- wake_up_interruptible(&fset->fset_permit_queue);
- } else {
- /* Someone is already doing an upcall; go to sleep. */
- DECLARE_WAITQUEUE(wait, current);
-
- spin_unlock(&fset->fset_permit_lock);
- add_wait_queue(&fset->fset_permit_queue, &wait);
- while (1) {
- set_current_state(TASK_INTERRUPTIBLE);
-
- spin_lock(&fset->fset_permit_lock);
- if (fset->fset_permit_upcall_count == 0)
- break;
- spin_unlock(&fset->fset_permit_lock);
-
- if (signal_pending(current)) {
- remove_wait_queue(&fset->fset_permit_queue,
- &wait);
- return -ERESTARTSYS;
- }
- schedule();
- }
- remove_wait_queue(&fset->fset_permit_queue, &wait);
- /* We've been woken up: do we have the permit? */
- if (fset->fset_flags & FSET_HASPERMIT)
- /* FIXME: Is this the right thing? */
- rc = -EAGAIN;
- }
-
- CDEBUG(D_INODE, "permit count now %d, ino %ld (likely 1), "
- "rc %d\n", fset->fset_permit_count, inode->i_ino, rc);
- spin_unlock(&fset->fset_permit_lock);
- EXIT;
- return rc;
-}
-
-int presto_put_permit(struct inode * inode)
-{
- struct dentry *de;
- struct presto_file_set *fset;
- int minor = presto_i2m(inode);
-
- ENTRY;
- if (minor < 0) {
- EXIT;
- return -1;
- }
-
- if ( ISLENTO(minor) ) {
- EXIT;
- return 0;
- }
-
- if (list_empty(&inode->i_dentry)) {
- CERROR("No alias for inode %d\n", (int) inode->i_ino);
- EXIT;
- return -1;
- }
-
- de = list_entry(inode->i_dentry.next, struct dentry, d_alias);
-
- fset = presto_fset(de);
- if ( !fset ) {
- CERROR("InterMezzo: no fileset in %s!\n", __FUNCTION__);
- EXIT;
- return -1;
- }
-
- if (presto_chk(de, PRESTO_DONT_JOURNAL)) {
- EXIT;
- return 0;
- }
-
- spin_lock(&fset->fset_permit_lock);
- if (fset->fset_flags & FSET_HASPERMIT) {
- if (fset->fset_permit_count > 0)
- fset->fset_permit_count--;
- else
- CERROR("Put permit while permit count is 0, "
- "inode %ld!\n", inode->i_ino);
- } else {
- fset->fset_permit_count = 0;
- CERROR("InterMezzo: put permit while no permit, inode %ld, "
- "flags %x!\n", inode->i_ino, fset->fset_flags);
- }
-
- CDEBUG(D_INODE, "permit count now %d, inode %ld\n",
- fset->fset_permit_count, inode->i_ino);
-
- if (fset->fset_flags & FSET_PERMIT_WAITING &&
- fset->fset_permit_count == 0) {
- CDEBUG(D_INODE, "permit count now 0, ino %ld, wake sleepers\n",
- inode->i_ino);
- wake_up_interruptible(&fset->fset_permit_queue);
- }
- spin_unlock(&fset->fset_permit_lock);
-
- EXIT;
- return 0;
-}
-
-void presto_getversion(struct presto_version * presto_version,
- struct inode * inode)
-{
- presto_version->pv_mtime_sec = inode->i_mtime.tv_sec;
- presto_version->pv_mtime_nsec = inode->i_mtime.tv_nsec;
- presto_version->pv_ctime_sec = inode->i_ctime.tv_sec;
- presto_version->pv_ctime_nsec = inode->i_ctime.tv_nsec;
- presto_version->pv_size = (__u64)inode->i_size;
-}
-
-
-/* If uuid is non-null, it is the uuid of the peer that's making the revocation
- * request. If it is null, this request was made locally, without external
- * pressure to give up the permit. This most often occurs when a client
- * starts up.
- *
- * FIXME: this function needs to be refactored slightly once we start handling
- * multiple clients.
- */
-int izo_revoke_permit(struct dentry *dentry, __u8 uuid[16])
-{
- struct presto_file_set *fset;
- DECLARE_WAITQUEUE(wait, current);
- int minor, rc;
-
- ENTRY;
-
- minor = presto_i2m(dentry->d_inode);
- if (minor < 0) {
- EXIT;
- return -ENODEV;
- }
-
- fset = presto_fset(dentry);
- if (fset == NULL) {
- EXIT;
- return -ENODEV;
- }
-
- spin_lock(&fset->fset_permit_lock);
- if (fset->fset_flags & FSET_PERMIT_WAITING) {
- CERROR("InterMezzo: Two processes are waiting on the same permit--this not yet supported! Aborting this particular permit request...\n");
- EXIT;
- spin_unlock(&fset->fset_permit_lock);
- return -EINVAL;
- }
-
- if (fset->fset_permit_count == 0)
- goto got_permit;
-
- /* Something is still using this permit. Mark that we're waiting for it
- * and go to sleep. */
- rc = izo_mark_fset(dentry, ~0, FSET_PERMIT_WAITING, NULL);
- spin_unlock(&fset->fset_permit_lock);
- if (rc < 0) {
- EXIT;
- return rc;
- }
-
- add_wait_queue(&fset->fset_permit_queue, &wait);
- while (1) {
- set_current_state(TASK_INTERRUPTIBLE);
-
- spin_lock(&fset->fset_permit_lock);
- if (fset->fset_permit_count == 0)
- break;
- spin_unlock(&fset->fset_permit_lock);
-
- if (signal_pending(current)) {
- /* FIXME: there must be a better thing to return... */
- remove_wait_queue(&fset->fset_permit_queue, &wait);
- EXIT;
- return -ERESTARTSYS;
- }
-
- /* FIXME: maybe there should be a timeout here. */
-
- schedule();
- }
-
- remove_wait_queue(&fset->fset_permit_queue, &wait);
- got_permit:
- /* By this point fset->fset_permit_count is zero and we're holding the
- * lock. */
- CDEBUG(D_CACHE, "InterMezzo: releasing permit inode %ld\n",
- dentry->d_inode->i_ino);
-
- if (uuid != NULL) {
- rc = izo_upc_revoke_permit(minor, fset->fset_name, uuid);
- if (rc < 0) {
- spin_unlock(&fset->fset_permit_lock);
- EXIT;
- return rc;
- }
- }
-
- izo_mark_fset(fset->fset_dentry, ~FSET_PERMIT_WAITING, 0, NULL);
- izo_mark_fset(fset->fset_dentry, ~FSET_HASPERMIT, 0, NULL);
- spin_unlock(&fset->fset_permit_lock);
- EXIT;
- return 0;
-}
-
-inline int presto_is_read_only(struct presto_file_set * fset)
-{
- int minor, mask;
- struct presto_cache *cache = fset->fset_cache;
-
- minor= cache->cache_psdev->uc_minor;
- mask= (ISLENTO(minor)? FSET_LENTO_RO : FSET_CLIENT_RO);
- if ( fset->fset_flags & mask )
- return 1;
- mask= (ISLENTO(minor)? CACHE_LENTO_RO : CACHE_CLIENT_RO);
- return ((cache->cache_flags & mask)? 1 : 0);
-}
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * An implementation of a loadable kernel mode driver providing
- * multiple kernel/user space bidirectional communications links.
- *
- * Author: Alan Cox <alan@cymru.net>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * Adapted to become the Linux 2.0 Coda pseudo device
- * Peter Braam <braam@maths.ox.ac.uk>
- * Michael Callahan <mjc@emmy.smith.edu>
- *
- * Changes for Linux 2.1
- * Copyright (c) 1997 Carnegie-Mellon University
- *
- * Redone again for InterMezzo
- * Copyright (c) 1998 Peter J. Braam
- * Copyright (c) 2000 Mountain View Data, Inc.
- * Copyright (c) 2000 Tacitus Systems, Inc.
- * Copyright (c) 2001 Cluster File Systems, Inc.
- *
- */
-
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/major.h>
-#include <linux/sched.h>
-#include <linux/lp.h>
-#include <linux/slab.h>
-#include <linux/ioport.h>
-#include <linux/fcntl.h>
-#include <linux/delay.h>
-#include <linux/skbuff.h>
-#include <linux/proc_fs.h>
-#include <linux/vmalloc.h>
-#include <linux/fs.h>
-#include <linux/file.h>
-#include <linux/poll.h>
-#include <linux/init.h>
-#include <linux/list.h>
-#include <linux/devfs_fs_kernel.h>
-#include <asm/io.h>
-#include <asm/segment.h>
-#include <asm/system.h>
-#include <asm/poll.h>
-#include <asm/uaccess.h>
-#include <linux/miscdevice.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-
-#ifdef PRESTO_DEVEL
-int presto_print_entry = 1;
-int presto_debug = 4095;
-#else
-int presto_print_entry = 0;
-int presto_debug = 0;
-#endif
-
-/* Like inode.c (presto_sym_iops), the initializer is just to prevent
- izo_channels from appearing as a COMMON symbol (and therefore
- interfering with other modules that use the same variable name). */
-struct upc_channel izo_channels[MAX_CHANNEL] = {{0}};
-
-int izo_psdev_get_free_channel(void)
-{
- int i, result = -1;
-
- for (i = 0 ; i < MAX_CHANNEL ; i++ ) {
- if (list_empty(&(izo_channels[i].uc_cache_list))) {
- result = i;
- break;
- }
- }
- return result;
-}
-
-
-int izo_psdev_setpid(int minor)
-{
- struct upc_channel *channel;
- if (minor < 0 || minor >= MAX_CHANNEL) {
- return -EINVAL;
- }
-
- channel = &(izo_channels[minor]);
- /*
- * This ioctl is performed by each Lento that starts up
- * and wants to do further communication with presto.
- */
- CDEBUG(D_PSDEV, "Setting current pid to %d channel %d\n",
- current->pid, minor);
- channel->uc_pid = current->pid;
- spin_lock(&channel->uc_lock);
- if ( !list_empty(&channel->uc_processing) ) {
- struct list_head *lh;
- struct upc_req *req;
- CERROR("WARNING: setpid & processing not empty!\n");
- list_for_each(lh, &channel->uc_processing) {
- req = list_entry(lh, struct upc_req, rq_chain);
- /* freeing of req and data is done by the sleeper */
- wake_up(&req->rq_sleep);
- }
- }
- if ( !list_empty(&channel->uc_processing) ) {
- CERROR("BAD: FAILDED TO CLEAN PROCESSING LIST!\n");
- }
- spin_unlock(&channel->uc_lock);
- EXIT;
- return 0;
-}
-
-int izo_psdev_setchannel(struct file *file, int fd)
-{
-
- struct file *psdev_file = fget(fd);
- struct presto_cache *cache = presto_get_cache(file->f_dentry->d_inode);
-
- if (!psdev_file) {
- CERROR("%s: no psdev_file!\n", __FUNCTION__);
- return -EINVAL;
- }
-
- if (!cache) {
- CERROR("%s: no cache!\n", __FUNCTION__);
- fput(psdev_file);
- return -EINVAL;
- }
-
- if (psdev_file->private_data) {
- CERROR("%s: channel already set!\n", __FUNCTION__);
- fput(psdev_file);
- return -EINVAL;
- }
-
- psdev_file->private_data = cache->cache_psdev;
- fput(psdev_file);
- EXIT;
- return 0;
-}
-
-inline int presto_lento_up(int minor)
-{
- return izo_channels[minor].uc_pid;
-}
-
-static unsigned int presto_psdev_poll(struct file *file, poll_table * wait)
- {
- struct upc_channel *channel = (struct upc_channel *)file->private_data;
- unsigned int mask = POLLOUT | POLLWRNORM;
-
- /* ENTRY; this will flood you */
- if ( ! channel ) {
- CERROR("%s: bad psdev file\n", __FUNCTION__);
- return -EBADF;
- }
-
- poll_wait(file, &(channel->uc_waitq), wait);
-
- spin_lock(&channel->uc_lock);
- if (!list_empty(&channel->uc_pending)) {
- CDEBUG(D_PSDEV, "Non-empty pending list.\n");
- mask |= POLLIN | POLLRDNORM;
- }
- spin_unlock(&channel->uc_lock);
-
- /* EXIT; will flood you */
- return mask;
-}
-
-/*
- * Receive a message written by Lento to the psdev
- */
-static ssize_t presto_psdev_write(struct file *file, const char *buf,
- size_t count, loff_t *off)
-{
- struct upc_channel *channel = (struct upc_channel *)file->private_data;
- struct upc_req *req = NULL;
- struct upc_req *tmp;
- struct list_head *lh;
- struct izo_upcall_resp hdr;
- int error;
-
- if ( ! channel ) {
- CERROR("%s: bad psdev file\n", __FUNCTION__);
- return -EBADF;
- }
-
- /* Peek at the opcode, uniquefier */
- if ( count < sizeof(hdr) ) {
- CERROR("presto_psdev_write: Lento didn't write full hdr.\n");
- return -EINVAL;
- }
-
- error = copy_from_user(&hdr, buf, sizeof(hdr));
- if ( error )
- return -EFAULT;
-
- CDEBUG(D_PSDEV, "(process,opc,uniq)=(%d,%d,%d)\n",
- current->pid, hdr.opcode, hdr.unique);
-
- spin_lock(&channel->uc_lock);
- /* Look for the message on the processing queue. */
- list_for_each(lh, &channel->uc_processing) {
- tmp = list_entry(lh, struct upc_req , rq_chain);
- if (tmp->rq_unique == hdr.unique) {
- req = tmp;
- /* unlink here: keeps search length minimal */
- list_del_init(&req->rq_chain);
- CDEBUG(D_PSDEV,"Eureka opc %d uniq %d!\n",
- hdr.opcode, hdr.unique);
- break;
- }
- }
- spin_unlock(&channel->uc_lock);
- if (!req) {
- CERROR("psdev_write: msg (%d, %d) not found\n",
- hdr.opcode, hdr.unique);
- return(-ESRCH);
- }
-
- /* move data into response buffer. */
- if (req->rq_bufsize < count) {
- CERROR("psdev_write: too much cnt: %d, cnt: %Zd, "
- "opc: %d, uniq: %d.\n",
- req->rq_bufsize, count, hdr.opcode, hdr.unique);
- count = req->rq_bufsize; /* don't have more space! */
- }
- error = copy_from_user(req->rq_data, buf, count);
- if ( error )
- return -EFAULT;
-
- /* adjust outsize: good upcalls can be aware of this */
- req->rq_rep_size = count;
- req->rq_flags |= REQ_WRITE;
-
- wake_up(&req->rq_sleep);
- return(count);
-}
-
-/*
- * Read a message from the kernel to Lento
- */
-static ssize_t presto_psdev_read(struct file * file, char * buf,
- size_t count, loff_t *off)
-{
- struct upc_channel *channel = (struct upc_channel *)file->private_data;
- struct upc_req *req;
- int result = count;
-
- if ( ! channel ) {
- CERROR("%s: bad psdev file\n", __FUNCTION__);
- return -EBADF;
- }
-
- spin_lock(&channel->uc_lock);
- if (list_empty(&(channel->uc_pending))) {
- CDEBUG(D_UPCALL, "Empty pending list in read, not good\n");
- spin_unlock(&channel->uc_lock);
- return -EINVAL;
- }
- req = list_entry((channel->uc_pending.next), struct upc_req, rq_chain);
- list_del(&(req->rq_chain));
- if (! (req->rq_flags & REQ_ASYNC) ) {
- list_add(&(req->rq_chain), channel->uc_processing.prev);
- }
- spin_unlock(&channel->uc_lock);
-
- req->rq_flags |= REQ_READ;
-
- /* Move the input args into userspace */
- CDEBUG(D_PSDEV, "\n");
- if (req->rq_bufsize <= count) {
- result = req->rq_bufsize;
- }
-
- if (count < req->rq_bufsize) {
- CERROR ("psdev_read: buffer too small, read %Zd of %d bytes\n",
- count, req->rq_bufsize);
- }
-
- if ( copy_to_user(buf, req->rq_data, result) ) {
- BUG();
- return -EFAULT;
- }
-
- /* If request was asynchronous don't enqueue, but free */
- if (req->rq_flags & REQ_ASYNC) {
- CDEBUG(D_PSDEV, "psdev_read: async msg (%d, %d), result %d\n",
- req->rq_opcode, req->rq_unique, result);
- PRESTO_FREE(req->rq_data, req->rq_bufsize);
- PRESTO_FREE(req, sizeof(*req));
- return result;
- }
-
- return result;
-}
-
-
-static int presto_psdev_open(struct inode * inode, struct file * file)
-{
- ENTRY;
-
- file->private_data = NULL;
-
- CDEBUG(D_PSDEV, "Psdev_open: caller: %d, flags: %d\n", current->pid, file->f_flags);
-
- EXIT;
- return 0;
-}
-
-
-
-static int presto_psdev_release(struct inode * inode, struct file * file)
-{
- struct upc_channel *channel = (struct upc_channel *)file->private_data;
- struct upc_req *req;
- struct list_head *lh;
- ENTRY;
-
- if ( ! channel ) {
- CERROR("%s: bad psdev file\n", __FUNCTION__);
- return -EBADF;
- }
-
- CDEBUG(D_PSDEV, "Lento: pid %d\n", current->pid);
- channel->uc_pid = 0;
-
- /* Wake up clients so they can return. */
- CDEBUG(D_PSDEV, "Wake up clients sleeping for pending.\n");
- spin_lock(&channel->uc_lock);
- list_for_each(lh, &channel->uc_pending) {
- req = list_entry(lh, struct upc_req, rq_chain);
-
- /* Async requests stay around for a new lento */
- if (req->rq_flags & REQ_ASYNC) {
- continue;
- }
- /* the sleeper will free the req and data */
- req->rq_flags |= REQ_DEAD;
- wake_up(&req->rq_sleep);
- }
-
- CDEBUG(D_PSDEV, "Wake up clients sleeping for processing\n");
- list_for_each(lh, &channel->uc_processing) {
- req = list_entry(lh, struct upc_req, rq_chain);
- /* freeing of req and data is done by the sleeper */
- req->rq_flags |= REQ_DEAD;
- wake_up(&req->rq_sleep);
- }
- spin_unlock(&channel->uc_lock);
- CDEBUG(D_PSDEV, "Done.\n");
-
- EXIT;
- return 0;
-}
-
-static struct file_operations presto_psdev_fops = {
- .owner = THIS_MODULE,
- .read = presto_psdev_read,
- .write = presto_psdev_write,
- .poll = presto_psdev_poll,
- .open = presto_psdev_open,
- .release = presto_psdev_release
-};
-
-/* modules setup */
-static struct miscdevice intermezzo_psdev = {
- INTERMEZZO_MINOR,
- "intermezzo",
- &presto_psdev_fops
-};
-
-int presto_psdev_init(void)
-{
- int i;
- int err;
-
- if ( (err = misc_register(&intermezzo_psdev)) ) {
- CERROR("%s: cannot register %d err %d\n",
- __FUNCTION__, INTERMEZZO_MINOR, err);
- return -EIO;
- }
-
- memset(&izo_channels, 0, sizeof(izo_channels));
- for ( i = 0 ; i < MAX_CHANNEL ; i++ ) {
- struct upc_channel *channel = &(izo_channels[i]);
- INIT_LIST_HEAD(&channel->uc_pending);
- INIT_LIST_HEAD(&channel->uc_processing);
- INIT_LIST_HEAD(&channel->uc_cache_list);
- init_waitqueue_head(&channel->uc_waitq);
- channel->uc_lock = SPIN_LOCK_UNLOCKED;
- channel->uc_hard = 0;
- channel->uc_no_filter = 0;
- channel->uc_no_journal = 0;
- channel->uc_no_upcall = 0;
- channel->uc_timeout = 30;
- channel->uc_errorval = 0;
- channel->uc_minor = i;
- }
- return 0;
-}
-
-void presto_psdev_cleanup(void)
-{
- int i;
-
- misc_deregister(&intermezzo_psdev);
-
- for ( i = 0 ; i < MAX_CHANNEL ; i++ ) {
- struct upc_channel *channel = &(izo_channels[i]);
- struct list_head *lh, *next;
-
- spin_lock(&channel->uc_lock);
- if ( ! list_empty(&channel->uc_pending)) {
- CERROR("Weird, tell Peter: module cleanup and pending list not empty dev %d\n", i);
- }
- if ( ! list_empty(&channel->uc_processing)) {
- CERROR("Weird, tell Peter: module cleanup and processing list not empty dev %d\n", i);
- }
- if ( ! list_empty(&channel->uc_cache_list)) {
- CERROR("Weird, tell Peter: module cleanup and cache listnot empty dev %d\n", i);
- }
- list_for_each_safe(lh, next, &channel->uc_pending) {
- struct upc_req *req;
-
- req = list_entry(lh, struct upc_req, rq_chain);
- if ( req->rq_flags & REQ_ASYNC ) {
- list_del(&(req->rq_chain));
- CDEBUG(D_UPCALL, "free pending upcall type %d\n",
- req->rq_opcode);
- PRESTO_FREE(req->rq_data, req->rq_bufsize);
- PRESTO_FREE(req, sizeof(struct upc_req));
- } else {
- req->rq_flags |= REQ_DEAD;
- wake_up(&req->rq_sleep);
- }
- }
- list_for_each(lh, &channel->uc_processing) {
- struct upc_req *req;
- req = list_entry(lh, struct upc_req, rq_chain);
- list_del(&(req->rq_chain));
- req->rq_flags |= REQ_DEAD;
- wake_up(&req->rq_sleep);
- }
- spin_unlock(&channel->uc_lock);
- }
-}
-
-/*
- * lento_upcall and lento_downcall routines
- */
-static inline unsigned long lento_waitfor_upcall
- (struct upc_channel *channel, struct upc_req *req, int minor)
-{
- DECLARE_WAITQUEUE(wait, current);
- unsigned long posttime;
-
- req->rq_posttime = posttime = jiffies;
-
- add_wait_queue(&req->rq_sleep, &wait);
- for (;;) {
- if ( izo_channels[minor].uc_hard == 0 )
- set_current_state(TASK_INTERRUPTIBLE);
- else
- set_current_state(TASK_UNINTERRUPTIBLE);
-
- /* got a reply */
- if ( req->rq_flags & (REQ_WRITE | REQ_DEAD) )
- break;
-
- /* these cases only apply when TASK_INTERRUPTIBLE */
- if ( !izo_channels[minor].uc_hard && signal_pending(current) ) {
- /* if this process really wants to die, let it go */
- if (sigismember(&(current->pending.signal), SIGKILL)||
- sigismember(&(current->pending.signal), SIGINT) )
- break;
- /* signal is present: after timeout always return
- really smart idea, probably useless ... */
- if ( time_after(jiffies, req->rq_posttime +
- izo_channels[minor].uc_timeout * HZ) )
- break;
- }
- schedule();
- }
-
- spin_lock(&channel->uc_lock);
- list_del_init(&req->rq_chain);
- spin_unlock(&channel->uc_lock);
- remove_wait_queue(&req->rq_sleep, &wait);
- set_current_state(TASK_RUNNING);
-
- CDEBUG(D_SPECIAL, "posttime: %ld, returned: %ld\n",
- posttime, jiffies-posttime);
- return (jiffies - posttime);
-}
-
-/*
- * lento_upcall will return an error in the case of
- * failed communication with Lento _or_ will peek at Lento
- * reply and return Lento's error.
- *
- * As lento has 2 types of errors, normal errors (positive) and internal
- * errors (negative), normal errors are negated, while internal errors
- * are all mapped to -EINTR, while showing a nice warning message. (jh)
- *
- * lento_upcall will always free buffer, either directly, when an upcall
- * is read (in presto_psdev_read), when the filesystem is unmounted, or
- * when the module is unloaded.
- */
-int izo_upc_upcall(int minor, int *size, struct izo_upcall_hdr *buffer,
- int async)
-{
- unsigned long runtime;
- struct upc_channel *channel;
- struct izo_upcall_resp *out;
- struct upc_req *req;
- int error = 0;
-
- ENTRY;
- channel = &(izo_channels[minor]);
-
- if (channel->uc_no_upcall) {
- EXIT;
- goto exit_buf;
- }
- if (!channel->uc_pid && !async) {
- EXIT;
- error = -ENXIO;
- goto exit_buf;
- }
-
- /* Format the request message. */
- PRESTO_ALLOC(req, sizeof(struct upc_req));
- if ( !req ) {
- EXIT;
- error = -ENOMEM;
- goto exit_buf;
- }
- req->rq_data = (void *)buffer;
- req->rq_flags = 0;
- req->rq_bufsize = *size;
- req->rq_rep_size = 0;
- req->rq_opcode = buffer->u_opc;
- req->rq_unique = ++channel->uc_seq;
- init_waitqueue_head(&req->rq_sleep);
-
- /* Fill in the common input args. */
- buffer->u_uniq = req->rq_unique;
- buffer->u_async = async;
-
- /* Remove potential datarace possibility*/
- if ( async )
- req->rq_flags = REQ_ASYNC;
-
- spin_lock(&channel->uc_lock);
- /* Append msg to pending queue and poke Lento. */
- list_add(&req->rq_chain, channel->uc_pending.prev);
- spin_unlock(&channel->uc_lock);
- CDEBUG(D_UPCALL,
- "Proc %d waking Lento %d for(opc,uniq) =(%d,%d) msg at %p.\n",
- current->pid, channel->uc_pid, req->rq_opcode,
- req->rq_unique, req);
- wake_up_interruptible(&channel->uc_waitq);
-
- if ( async ) {
- /* req, rq_data are freed in presto_psdev_read for async */
- /* req->rq_flags = REQ_ASYNC;*/
- EXIT;
- return 0;
- }
-
- /* We can be interrupted while we wait for Lento to process
- * our request. If the interrupt occurs before Lento has read
- * the request, we dequeue and return. If it occurs after the
- * read but before the reply, we dequeue, send a signal
- * message, and return. If it occurs after the reply we ignore
- * it. In no case do we want to restart the syscall. If it
- * was interrupted by a lento shutdown (psdev_close), return
- * ENODEV. */
-
- /* Go to sleep. Wake up on signals only after the timeout. */
- runtime = lento_waitfor_upcall(channel, req, minor);
-
- CDEBUG(D_TIMING, "opc: %d time: %ld uniq: %d size: %d\n",
- req->rq_opcode, jiffies - req->rq_posttime,
- req->rq_unique, req->rq_rep_size);
- CDEBUG(D_UPCALL,
- "..process %d woken up by Lento for req at 0x%p, data at %p\n",
- current->pid, req, req->rq_data);
-
- if (channel->uc_pid) { /* i.e. Lento is still alive */
- /* Op went through, interrupt or not we go on */
- if (req->rq_flags & REQ_WRITE) {
- out = (struct izo_upcall_resp *)req->rq_data;
- /* here we map positive Lento errors to kernel errors */
- if ( out->result < 0 ) {
- CERROR("Tell Peter: Lento returns negative error %d, for oc %d!\n",
- out->result, out->opcode);
- out->result = EINVAL;
- }
- error = -out->result;
- CDEBUG(D_UPCALL, "upcall: (u,o,r) (%d, %d, %d) out at %p\n",
- out->unique, out->opcode, out->result, out);
- *size = req->rq_rep_size;
- EXIT;
- goto exit_req;
- }
- /* Interrupted before lento read it. */
- if ( !(req->rq_flags & REQ_READ) && signal_pending(current)) {
- CDEBUG(D_UPCALL,
- "Interrupt before read: (op,un)=(%d,%d), flags %x\n",
- req->rq_opcode, req->rq_unique, req->rq_flags);
- /* perhaps the best way to convince the app to give up? */
- error = -EINTR;
- EXIT;
- goto exit_req;
- }
-
- /* interrupted after Lento did its read, send signal */
- if ( (req->rq_flags & REQ_READ) && signal_pending(current) ) {
- CDEBUG(D_UPCALL,"Interrupt after read: op = %d.%d, flags = %x\n",
- req->rq_opcode, req->rq_unique, req->rq_flags);
-
- error = -EINTR;
- } else {
- CERROR("Lento: Strange interruption - tell Peter.\n");
- error = -EINTR;
- }
- } else { /* If lento died i.e. !UC_OPEN(channel) */
- CERROR("lento_upcall: Lento dead on (op,un) (%d.%d) flags %d\n",
- req->rq_opcode, req->rq_unique, req->rq_flags);
- error = -ENODEV;
- }
-
-exit_req:
- PRESTO_FREE(req, sizeof(struct upc_req));
-exit_buf:
- PRESTO_FREE(buffer,*size);
- return error;
-}
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2001 Cluster File Systems, Inc. <braam@clusterfs.com>
- * Copyright (C) 2001 Tacit Networks, Inc. <phil@off.net>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Manage RCVD records for clients in the kernel
- *
- */
-
-#include <linux/module.h>
-#include <asm/uaccess.h>
-
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/fsfilter.h>
-
-#include "intermezzo_fs.h"
-
-/*
- * this file contains a hash table of replicators/clients for a
- * fileset. It allows fast lookup and update of reintegration status
- */
-
-struct izo_offset_rec {
- struct list_head or_list;
- char or_uuid[16];
- loff_t or_offset;
-};
-
-#define RCACHE_BITS 8
-#define RCACHE_SIZE (1 << RCACHE_BITS)
-#define RCACHE_MASK (RCACHE_SIZE - 1)
-
-static struct list_head *
-izo_rep_cache(void)
-{
- int i;
- struct list_head *cache;
- PRESTO_ALLOC(cache, sizeof(struct list_head) * RCACHE_SIZE);
- if (cache == NULL) {
- CERROR("intermezzo-fatal: no memory for replicator cache\n");
- return NULL;
- }
- memset(cache, 0, sizeof(struct list_head) * RCACHE_SIZE);
- for (i = 0; i < RCACHE_SIZE; i++)
- INIT_LIST_HEAD(&cache[i]);
-
- return cache;
-}
-
-static struct list_head *
-izo_rep_hash(struct list_head *cache, char *uuid)
-{
- return &cache[(RCACHE_MASK & uuid[1])];
-}
-
-static void
-izo_rep_cache_clean(struct presto_file_set *fset)
-{
- int i;
- struct list_head *bucket;
- struct list_head *tmp;
-
- if (fset->fset_clients == NULL)
- return;
- for (i = 0; i < RCACHE_SIZE; i++) {
- tmp = bucket = &fset->fset_clients[i];
-
- tmp = tmp->next;
- while (tmp != bucket) {
- struct izo_offset_rec *offrec;
- tmp = tmp->next;
- list_del(tmp);
- offrec = list_entry(tmp, struct izo_offset_rec,
- or_list);
- PRESTO_FREE(offrec, sizeof(struct izo_offset_rec));
- }
- }
-}
-
-struct izo_offset_rec *
-izo_rep_cache_find(struct presto_file_set *fset, char *uuid)
-{
- struct list_head *tmp, *buck = izo_rep_hash(fset->fset_clients, uuid);
- struct izo_offset_rec *rec = NULL;
-
- list_for_each(tmp, buck) {
- rec = list_entry(tmp, struct izo_offset_rec, or_list);
- if ( memcmp(rec->or_uuid, uuid, sizeof(rec->or_uuid)) == 0 )
- return rec;
- }
-
- return NULL;
-}
-
-static int
-izo_rep_cache_add(struct presto_file_set *fset, struct izo_rcvd_rec *rec,
- loff_t offset)
-{
- struct izo_offset_rec *offrec;
-
- if (izo_rep_cache_find(fset, rec->lr_uuid)) {
- CERROR("izo: duplicate client entry %s off %Ld\n",
- fset->fset_name, offset);
- return -EINVAL;
- }
-
- PRESTO_ALLOC(offrec, sizeof(*offrec));
- if (offrec == NULL) {
- CERROR("izo: cannot allocate offrec\n");
- return -ENOMEM;
- }
-
- memcpy(offrec->or_uuid, rec->lr_uuid, sizeof(rec->lr_uuid));
- offrec->or_offset = offset;
-
- list_add(&offrec->or_list,
- izo_rep_hash(fset->fset_clients, rec->lr_uuid));
- return 0;
-}
-
-int
-izo_rep_cache_init(struct presto_file_set *fset)
-{
- struct izo_rcvd_rec rec;
- loff_t offset = 0, last_offset = 0;
-
- fset->fset_clients = izo_rep_cache();
- if (fset->fset_clients == NULL) {
- CERROR("Error initializing client cache\n");
- return -ENOMEM;
- }
-
- while ( presto_fread(fset->fset_rcvd.fd_file, (char *)&rec,
- sizeof(rec), &offset) == sizeof(rec) ) {
- int rc;
-
- if ((rc = izo_rep_cache_add(fset, &rec, last_offset)) < 0) {
- izo_rep_cache_clean(fset);
- return rc;
- }
-
- last_offset = offset;
- }
-
- return 0;
-}
-
-/*
- * Return local last_rcvd record for the client. Update or create
- * if necessary.
- *
- * XXX: After this call, any -EINVAL from izo_rcvd_get is a real error.
- */
-int
-izo_repstatus(struct presto_file_set *fset, __u64 client_kmlsize,
- struct izo_rcvd_rec *lr_client, struct izo_rcvd_rec *lr_server)
-{
- int rc;
- rc = izo_rcvd_get(lr_server, fset, lr_client->lr_uuid);
- if (rc < 0 && rc != -EINVAL) {
- return rc;
- }
-
- /* client is new or has been reset. */
- if (rc < 0 || (client_kmlsize == 0 && lr_client->lr_remote_offset == 0)) {
- memset(lr_server, 0, sizeof(*lr_server));
- memcpy(lr_server->lr_uuid, lr_client->lr_uuid, sizeof(lr_server->lr_uuid));
- rc = izo_rcvd_write(fset, lr_server);
- if (rc < 0)
- return rc;
- }
-
- /* update intersync */
- rc = izo_upc_repstatus(presto_f2m(fset), fset->fset_name, lr_server);
- return rc;
-}
-
-loff_t
-izo_rcvd_get(struct izo_rcvd_rec *rec, struct presto_file_set *fset, char *uuid)
-{
- struct izo_offset_rec *offrec;
- struct izo_rcvd_rec tmprec;
- loff_t offset;
-
- offrec = izo_rep_cache_find(fset, uuid);
- if (offrec == NULL) {
- CDEBUG(D_SPECIAL, "izo_get_rcvd: uuid not in hash.\n");
- return -EINVAL;
- }
- offset = offrec->or_offset;
-
- if (rec == NULL)
- return offset;
-
- if (presto_fread(fset->fset_rcvd.fd_file, (char *)&tmprec,
- sizeof(tmprec), &offset) != sizeof(tmprec)) {
- CERROR("izo_get_rcvd: Unable to read from last_rcvd file offset "
- "%Lu\n", offset);
- return -EIO;
- }
-
- memcpy(rec->lr_uuid, tmprec.lr_uuid, sizeof(tmprec.lr_uuid));
- rec->lr_remote_recno = le64_to_cpu(tmprec.lr_remote_recno);
- rec->lr_remote_offset = le64_to_cpu(tmprec.lr_remote_offset);
- rec->lr_local_recno = le64_to_cpu(tmprec.lr_local_recno);
- rec->lr_local_offset = le64_to_cpu(tmprec.lr_local_offset);
- rec->lr_last_ctime = le64_to_cpu(tmprec.lr_last_ctime);
-
- return offrec->or_offset;
-}
-
-/* Try to lookup the UUID in the hash. Insert it if it isn't found. Write the
- * data to the file.
- *
- * Returns the offset of the beginning of the record in the last_rcvd file. */
-loff_t
-izo_rcvd_write(struct presto_file_set *fset, struct izo_rcvd_rec *rec)
-{
- struct izo_offset_rec *offrec;
- loff_t offset, rc;
-
- ENTRY;
-
- offrec = izo_rep_cache_find(fset, rec->lr_uuid);
- if (offrec == NULL) {
- /* I don't think it should be possible for an entry to be not in
- * the hash table without also having an invalid offset, but we
- * handle it gracefully regardless. */
- write_lock(&fset->fset_rcvd.fd_lock);
- offset = fset->fset_rcvd.fd_offset;
- fset->fset_rcvd.fd_offset += sizeof(*rec);
- write_unlock(&fset->fset_rcvd.fd_lock);
-
- rc = izo_rep_cache_add(fset, rec, offset);
- if (rc < 0) {
- EXIT;
- return rc;
- }
- } else
- offset = offrec->or_offset;
-
-
- rc = presto_fwrite(fset->fset_rcvd.fd_file, (char *)rec, sizeof(*rec),
- &offset);
- if (rc == sizeof(*rec))
- /* presto_fwrite() advances 'offset' */
- rc = offset - sizeof(*rec);
-
- EXIT;
- return rc;
-}
-
-loff_t
-izo_rcvd_upd_remote(struct presto_file_set *fset, char * uuid, __u64 remote_recno,
- __u64 remote_offset)
-{
- struct izo_rcvd_rec rec;
-
- loff_t rc;
-
- ENTRY;
- rc = izo_rcvd_get(&rec, fset, uuid);
- if (rc < 0)
- return rc;
- rec.lr_remote_recno = remote_recno;
- rec.lr_remote_offset = remote_offset;
-
- rc = izo_rcvd_write(fset, &rec);
- EXIT;
- if (rc < 0)
- return rc;
- return 0;
-}
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 1998 Peter J. Braam <braam@clusterfs.com>
- * Copyright (C) 2000 Stelias Computing, Inc.
- * Copyright (C) 2000 Red Hat, Inc.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * presto's super.c
- */
-
-static char rcsid[] __attribute ((unused)) = "$Id: super.c,v 1.4 2002/10/12 02:16:19 rread Exp $";
-#define INTERMEZZO_VERSION "$Revision: 1.4 $"
-
-#include <asm/bitops.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/ext2_fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/sched.h>
-#include <linux/stat.h>
-#include <linux/string.h>
-#include <linux/blkdev.h>
-#include <linux/init.h>
-#include <linux/devfs_fs_kernel.h>
-#include <linux/module.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-#ifdef PRESTO_DEBUG
-long presto_vmemory = 0;
-long presto_kmemory = 0;
-#endif
-
-/* returns an allocated string, copied out from data if opt is found */
-static char *opt_read(const char *opt, char *data)
-{
- char *value;
- char *retval;
-
- CDEBUG(D_SUPER, "option: %s, data %s\n", opt, data);
- if ( strncmp(opt, data, strlen(opt)) )
- return NULL;
-
- if ( (value = strchr(data, '=')) == NULL )
- return NULL;
-
- value++;
- PRESTO_ALLOC(retval, strlen(value) + 1);
- if ( !retval ) {
- CERROR("InterMezzo: Out of memory!\n");
- return NULL;
- }
-
- strcpy(retval, value);
- CDEBUG(D_SUPER, "Assigned option: %s, value %s\n", opt, retval);
- return retval;
-}
-
-static void opt_store(char **dst, char *opt)
-{
- if (!dst)
- CERROR("intermezzo: store_opt, error dst == NULL\n");
-
- if (*dst)
- PRESTO_FREE(*dst, strlen(*dst) + 1);
- *dst = opt;
-}
-
-static void opt_set_default(char **dst, char *defval)
-{
- if (!dst)
- CERROR("intermezzo: store_opt, error dst == NULL\n");
-
- if (*dst)
- PRESTO_FREE(*dst, strlen(*dst) + 1);
- if (defval) {
- char *def_alloced;
- PRESTO_ALLOC(def_alloced, strlen(defval)+1);
- if (!def_alloced) {
- CERROR("InterMezzo: Out of memory!\n");
- return ;
- }
- strcpy(def_alloced, defval);
- *dst = def_alloced;
- }
-}
-
-
-/* Find the options for InterMezzo in "options", saving them into the
- * passed pointers. If the pointer is null, the option is discarded.
- * Copy out all non-InterMezzo options into cache_data (to be passed
- * to the read_super operation of the cache). The return value will
- * be a pointer to the end of the cache_data.
- */
-static char *presto_options(struct file_system_type *fstype,
- char *options, char *cache_data,
- char **cache_type, char **fileset,
- char **channel)
-{
- char *this_char;
- char *opt_ptr = options;
- char *cache_data_end = cache_data;
-
- /* set the defaults */
- if (strcmp(fstype->name, "intermezzo") == 0)
- opt_set_default(cache_type, "ext3");
- else
- opt_set_default(cache_type, "tmpfs");
-
- if (!options || !cache_data)
- return cache_data_end;
-
-
- CDEBUG(D_SUPER, "parsing options\n");
- while ((this_char = strsep (&opt_ptr, ",")) != NULL) {
- char *opt;
- if (!*this_char)
- continue;
- CDEBUG(D_SUPER, "this_char %s\n", this_char);
-
- if ( (opt = opt_read("fileset", this_char)) ) {
- opt_store(fileset, opt);
- continue;
- }
- if ( (opt = opt_read("cache_type", this_char)) ) {
- opt_store(cache_type, opt);
- continue;
- }
- if ( (opt = opt_read("channel", this_char)) ) {
- opt_store(channel, opt);
- continue;
- }
-
- cache_data_end +=
- sprintf(cache_data_end, "%s%s",
- cache_data_end != cache_data ? ",":"",
- this_char);
- }
-
- return cache_data_end;
-}
-
-static int presto_set_channel(struct presto_cache *cache, char *channel)
-{
- int minor;
-
- ENTRY;
- if (!channel) {
- minor = izo_psdev_get_free_channel();
- } else {
- minor = simple_strtoul(channel, NULL, 0);
- }
- if (minor < 0 || minor >= MAX_CHANNEL) {
- CERROR("all channels in use or channel too large %d\n",
- minor);
- return -EINVAL;
- }
-
- cache->cache_psdev = &(izo_channels[minor]);
- list_add(&cache->cache_channel_list,
- &cache->cache_psdev->uc_cache_list);
-
- EXIT;
- return minor;
-}
-
-/* We always need to remove the presto options before passing
- mount options to cache FS */
-struct super_block *
-presto_get_sb(struct file_system_type *izo_type, int flags,
- const char *devname, void *data)
-{
- struct file_system_type *fstype;
- struct presto_cache *cache = NULL;
- char *cache_data = NULL;
- char *cache_data_end;
- char *cache_type = NULL;
- char *fileset = NULL;
- char *channel = NULL;
- struct super_block *sb;
- int err;
- unsigned int minor;
-
- ENTRY;
-
- /* reserve space for the cache's data */
- PRESTO_ALLOC(cache_data, PAGE_SIZE);
- if ( !cache_data ) {
- CERROR("presto_read_super: Cannot allocate data page.\n");
- EXIT;
- goto out_err;
- }
-
- /* read and validate options */
- cache_data_end = presto_options(izo_type, data, cache_data, &cache_type,
- &fileset, &channel);
-
- /* was there anything for the cache filesystem in the data? */
- if (cache_data_end == cache_data) {
- PRESTO_FREE(cache_data, PAGE_SIZE);
- cache_data_end = cache_data = NULL;
- } else {
- CDEBUG(D_SUPER, "cache_data at %p is: %s\n", cache_data,
- cache_data);
- }
-
- /* set up the cache */
- cache = presto_cache_init();
- if ( !cache ) {
- CERROR("presto_read_super: failure allocating cache.\n");
- EXIT;
- goto out_err;
- }
- cache->cache_type = cache_type;
-
- /* link cache to channel */
- minor = presto_set_channel(cache, channel);
- if (minor < 0) {
- EXIT;
- goto out_err;
- }
-
- CDEBUG(D_SUPER, "Presto: type=%s, fset=%s, dev= %d, flags %x\n",
- cache_type, fileset?fileset:"NULL", minor, cache->cache_flags);
-
- /* get the filter for the cache */
- fstype = get_fs_type(cache_type);
- cache->cache_filter = filter_get_filter_fs((const char *)cache_type);
- if ( !fstype || !cache->cache_filter) {
- CERROR("Presto: unrecognized fs type or cache type\n");
- EXIT;
- goto out_err;
- }
-
- sb = fstype->get_sb(fstype, flags, devname, cache_data);
-
- if ( !sb || IS_ERR(sb)) {
- CERROR("InterMezzo: cache mount failure.\n");
- EXIT;
- goto out_err;
- }
-
- /* can we in fact mount the cache */
- if (sb->s_bdev && (strcmp(fstype->name, "vintermezzo") == 0)) {
- CERROR("vintermezzo must not be used with a block device\n");
- EXIT;
- goto out_err;
- }
-
- /* this might have been freed above */
- if (cache_data) {
- PRESTO_FREE(cache_data, PAGE_SIZE);
- cache_data = NULL;
- }
-
- cache->cache_sb = sb;
- cache->cache_root = dget(sb->s_root);
-
- /* we now know the dev of the cache: hash the cache */
- presto_cache_add(cache);
- err = izo_prepare_fileset(sb->s_root, fileset);
-
- filter_setup_journal_ops(cache->cache_filter, cache->cache_type);
-
- /* make sure we have our own super operations: sb
- still contains the cache operations */
- filter_setup_super_ops(cache->cache_filter, sb->s_op,
- &presto_super_ops);
- sb->s_op = filter_c2usops(cache->cache_filter);
-
- /* get izo directory operations: sb->s_root->d_inode exists now */
- filter_setup_dir_ops(cache->cache_filter, sb->s_root->d_inode,
- &presto_dir_iops, &presto_dir_fops);
- filter_setup_dentry_ops(cache->cache_filter, sb->s_root->d_op,
- &presto_dentry_ops);
- sb->s_root->d_inode->i_op = filter_c2udiops(cache->cache_filter);
- sb->s_root->d_inode->i_fop = filter_c2udfops(cache->cache_filter);
- sb->s_root->d_op = filter_c2udops(cache->cache_filter);
-
- EXIT;
- return sb;
-
- out_err:
- CDEBUG(D_SUPER, "out_err called\n");
- if (cache)
- PRESTO_FREE(cache, sizeof(struct presto_cache));
- if (cache_data)
- PRESTO_FREE(cache_data, PAGE_SIZE);
- if (fileset)
- PRESTO_FREE(fileset, strlen(fileset) + 1);
- if (channel)
- PRESTO_FREE(channel, strlen(channel) + 1);
- if (cache_type)
- PRESTO_FREE(cache_type, strlen(cache_type) + 1);
-
- CDEBUG(D_MALLOC, "mount error exit: kmem %ld, vmem %ld\n",
- presto_kmemory, presto_vmemory);
- return ERR_PTR(-EINVAL);
-}
-
-
-
-
-#ifdef PRESTO_DEVEL
-static DECLARE_FSTYPE(presto_fs_type, "izo", presto_read_super, FS_REQUIRES_DEV);
-static DECLARE_FSTYPE(vpresto_fs_type, "vintermezzo", presto_read_super, FS_LITTER);
-#else
-static struct file_system_type vpresto_fs_type = {
- .owner = THIS_MODULE,
- .name = "vintermezzo",
- .get_sb = presto_get_sb,
- .kill_sb = kill_litter_super,
-};
-static struct file_system_type presto_fs_type = {
- .owner = THIS_MODULE,
- .name = "intermezzo",
- .get_sb = presto_get_sb,
- .kill_sb = kill_block_super,
- .fs_flags = FS_REQUIRES_DEV,
-};
-#endif
-
-
-
-int __init init_intermezzo_fs(void)
-{
- int status;
-
- printk(KERN_INFO "InterMezzo Kernel/Intersync communications " INTERMEZZO_VERSION
- " info@clusterfs.com\n");
-
- status = presto_psdev_init();
- if ( status ) {
- CERROR("Problem (%d) in init_intermezzo_psdev\n", status);
- return status;
- }
-
- status = init_intermezzo_sysctl();
- if (status) {
- CERROR("presto: failed in init_intermezzo_sysctl!\n");
- }
-
- presto_cache_init_hash();
-
- if (!presto_init_ddata_cache()) {
- CERROR("presto out of memory!\n");
- return -ENOMEM;
- }
-
- status = register_filesystem(&presto_fs_type);
- if (status) {
- CERROR("presto: failed in register_filesystem!\n");
- }
- status = register_filesystem(&vpresto_fs_type);
- if (status) {
- CERROR("vpresto: failed in register_filesystem!\n");
- }
- return status;
-}
-
-void __exit exit_intermezzo_fs(void)
-{
- int err;
-
- ENTRY;
-
- if ( (err = unregister_filesystem(&presto_fs_type)) != 0 ) {
- CERROR("presto: failed to unregister filesystem\n");
- }
- if ( (err = unregister_filesystem(&vpresto_fs_type)) != 0 ) {
- CERROR("vpresto: failed to unregister filesystem\n");
- }
-
- presto_psdev_cleanup();
- cleanup_intermezzo_sysctl();
- presto_cleanup_ddata_cache();
- CERROR("after cleanup: kmem %ld, vmem %ld\n",
- presto_kmemory, presto_vmemory);
-}
-
-
-MODULE_AUTHOR("Cluster Filesystems Inc. <info@clusterfs.com>");
-MODULE_DESCRIPTION("InterMezzo Kernel/Intersync communications " INTERMEZZO_VERSION);
-MODULE_LICENSE("GPL");
-
-module_init(init_intermezzo_fs)
-module_exit(exit_intermezzo_fs)
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 1999 Peter J. Braam <braam@clusterfs.com>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Sysctrl entries for Intermezzo!
- */
-
-#include <linux/config.h> /* for CONFIG_PROC_FS */
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/sysctl.h>
-#include <linux/proc_fs.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/stat.h>
-#include <linux/ctype.h>
-#include <linux/init.h>
-#include <asm/bitops.h>
-#include <asm/segment.h>
-#include <asm/uaccess.h>
-#include <linux/utsname.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-/* /proc entries */
-
-#ifdef CONFIG_PROC_FS
-struct proc_dir_entry *proc_fs_intermezzo;
-int intermezzo_mount_get_info( char * buffer, char ** start, off_t offset,
- int length)
-{
- int len=0;
-
- /* this works as long as we are below 1024 characters! */
- *start = buffer + offset;
- len -= offset;
-
- if ( len < 0 )
- return -EINVAL;
-
- return len;
-}
-
-#endif
-
-
-/* SYSCTL below */
-
-static struct ctl_table_header *intermezzo_table_header = NULL;
-/* 0x100 to avoid any chance of collisions at any point in the tree with
- * non-directories
- */
-#define PSDEV_INTERMEZZO (0x100)
-
-#define PSDEV_DEBUG 1 /* control debugging */
-#define PSDEV_TRACE 2 /* control enter/leave pattern */
-#define PSDEV_TIMEOUT 3 /* timeout on upcalls to become intrble */
-#define PSDEV_HARD 4 /* mount type "hard" or "soft" */
-#define PSDEV_NO_FILTER 5 /* controls presto_chk */
-#define PSDEV_NO_JOURNAL 6 /* controls presto_chk */
-#define PSDEV_NO_UPCALL 7 /* controls lento_upcall */
-#define PSDEV_ERRORVAL 8 /* controls presto_debug_fail_blkdev */
-#define PSDEV_EXCL_GID 9 /* which GID is ignored by presto */
-#define PSDEV_BYTES_TO_CLOSE 11 /* bytes to write before close */
-
-/* These are global presto control options */
-#define PRESTO_PRIMARY_CTLCNT 2
-static struct ctl_table presto_table[ PRESTO_PRIMARY_CTLCNT + MAX_CHANNEL + 1] =
-{
- {PSDEV_DEBUG, "debug", &presto_debug, sizeof(int), 0644, NULL, &proc_dointvec},
- {PSDEV_TRACE, "trace", &presto_print_entry, sizeof(int), 0644, NULL, &proc_dointvec},
-};
-
-/*
- * Intalling the sysctl entries: strategy
- * - have templates for each /proc/sys/intermezzo/ entry
- * such an entry exists for each /dev/presto
- * (proto_channel_entry)
- * - have a template for the contents of such directories
- * (proto_psdev_table)
- * - have the master table (presto_table)
- *
- * When installing, malloc, memcpy and fix up the pointers to point to
- * the appropriate constants in izo_channels[your_minor]
- */
-
-static ctl_table proto_psdev_table[] = {
- {PSDEV_HARD, "hard", 0, sizeof(int), 0644, NULL, &proc_dointvec},
- {PSDEV_NO_FILTER, "no_filter", 0, sizeof(int), 0644, NULL, &proc_dointvec},
- {PSDEV_NO_JOURNAL, "no_journal", NULL, sizeof(int), 0644, NULL, &proc_dointvec},
- {PSDEV_NO_UPCALL, "no_upcall", NULL, sizeof(int), 0644, NULL, &proc_dointvec},
- {PSDEV_TIMEOUT, "timeout", NULL, sizeof(int), 0644, NULL, &proc_dointvec},
-#ifdef PRESTO_DEBUG
- {PSDEV_ERRORVAL, "errorval", NULL, sizeof(int), 0644, NULL, &proc_dointvec},
-#endif
- { 0 }
-};
-
-static ctl_table proto_channel_entry = {
- PSDEV_INTERMEZZO, 0, NULL, 0, 0555, 0,
-};
-
-static ctl_table intermezzo_table[2] = {
- {PSDEV_INTERMEZZO, "intermezzo", NULL, 0, 0555, presto_table},
- {0}
-};
-
-/* support for external setting and getting of opts. */
-/* particularly via ioctl. The Right way to do this is via sysctl,
- * but that will have to wait until intermezzo gets its own nice set of
- * sysctl IDs
- */
-/* we made these separate as setting may in future be more restricted
- * than getting
- */
-#ifdef RON_MINNICH
-int dosetopt(int minor, struct psdev_opt *opt)
-{
- int retval = 0;
- int newval = opt->optval;
-
- ENTRY;
-
- switch(opt->optname) {
-
- case PSDEV_TIMEOUT:
- izo_channels[minor].uc_timeout = newval;
- break;
-
- case PSDEV_HARD:
- izo_channels[minor].uc_hard = newval;
- break;
-
- case PSDEV_NO_FILTER:
- izo_channels[minor].uc_no_filter = newval;
- break;
-
- case PSDEV_NO_JOURNAL:
- izo_channels[minor].uc_no_journal = newval;
- break;
-
- case PSDEV_NO_UPCALL:
- izo_channels[minor].uc_no_upcall = newval;
- break;
-
-#ifdef PRESTO_DEBUG
- case PSDEV_ERRORVAL: {
- /* If we have a positive arg, set a breakpoint for that
- * value. If we have a negative arg, make that device
- * read-only. FIXME It would be much better to only
- * allow setting the underlying device read-only for the
- * current presto cache.
- */
- int errorval = izo_channels[minor].uc_errorval;
- if (errorval < 0) {
- if (newval == 0)
- set_device_ro(-errorval, 0);
- else
- CERROR("device %s already read only\n",
- kdevname(-errorval));
- } else {
- if (newval < 0)
- set_device_ro(-newval, 1);
- izo_channels[minor].uc_errorval = newval;
- CDEBUG(D_PSDEV, "setting errorval to %d\n", newval);
- }
-
- break;
- }
-#endif
-
- case PSDEV_TRACE:
- case PSDEV_DEBUG:
- case PSDEV_BYTES_TO_CLOSE:
- default:
- CDEBUG(D_PSDEV,
- "ioctl: dosetopt: minor %d, bad optname 0x%x, \n",
- minor, opt->optname);
-
- retval = -EINVAL;
- }
-
- EXIT;
- return retval;
-}
-
-int dogetopt(int minor, struct psdev_opt *opt)
-{
- int retval = 0;
-
- ENTRY;
-
- switch(opt->optname) {
-
- case PSDEV_TIMEOUT:
- opt->optval = izo_channels[minor].uc_timeout;
- break;
-
- case PSDEV_HARD:
- opt->optval = izo_channels[minor].uc_hard;
- break;
-
- case PSDEV_NO_FILTER:
- opt->optval = izo_channels[minor].uc_no_filter;
- break;
-
- case PSDEV_NO_JOURNAL:
- opt->optval = izo_channels[minor].uc_no_journal;
- break;
-
- case PSDEV_NO_UPCALL:
- opt->optval = izo_channels[minor].uc_no_upcall;
- break;
-
-#ifdef PSDEV_DEBUG
- case PSDEV_ERRORVAL: {
- int errorval = izo_channels[minor].uc_errorval;
- if (errorval < 0 && is_read_only(-errorval))
- CERROR("device %s has been set read-only\n",
- kdevname(-errorval));
- opt->optval = izo_channels[minor].uc_errorval;
- break;
- }
-#endif
-
- case PSDEV_TRACE:
- case PSDEV_DEBUG:
- case PSDEV_BYTES_TO_CLOSE:
- default:
- CDEBUG(D_PSDEV,
- "ioctl: dogetopt: minor %d, bad optval 0x%x, \n",
- minor, opt->optname);
-
- retval = -EINVAL;
- }
-
- EXIT;
- return retval;
-}
-#endif
-
-
-/* allocate the tables for the presto devices. We need
- * sizeof(proto_channel_table)/sizeof(proto_channel_table[0])
- * entries for each dev
- */
-int /* __init */ init_intermezzo_sysctl(void)
-{
- int i;
- int total_dev = MAX_CHANNEL;
- int entries_per_dev = sizeof(proto_psdev_table) /
- sizeof(proto_psdev_table[0]);
- int total_entries = entries_per_dev * total_dev;
- ctl_table *dev_ctl_table;
-
- PRESTO_ALLOC(dev_ctl_table, sizeof(ctl_table) * total_entries);
-
- if (! dev_ctl_table) {
- CERROR("WARNING: presto couldn't allocate dev_ctl_table\n");
- EXIT;
- return -ENOMEM;
- }
-
- /* now fill in the entries ... we put the individual presto<x>
- * entries at the end of the table, and the per-presto stuff
- * starting at the front. We assume that the compiler makes
- * this code more efficient, but really, who cares ... it
- * happens once per reboot.
- */
- for(i = 0; i < total_dev; i++) {
- void *p;
-
- /* entry for this /proc/sys/intermezzo/intermezzo"i" */
- ctl_table *psdev = &presto_table[i + PRESTO_PRIMARY_CTLCNT];
- /* entries for the individual "files" in this "directory" */
- ctl_table *psdev_entries = &dev_ctl_table[i * entries_per_dev];
- /* init the psdev and psdev_entries with the prototypes */
- *psdev = proto_channel_entry;
- memcpy(psdev_entries, proto_psdev_table,
- sizeof(proto_psdev_table));
- /* now specialize them ... */
- /* the psdev has to point to psdev_entries, and fix the number */
- psdev->ctl_name = psdev->ctl_name + i + 1; /* sorry */
-
- PRESTO_ALLOC(p, PROCNAME_SIZE);
- psdev->procname = p;
- if (!psdev->procname) {
- PRESTO_FREE(dev_ctl_table,
- sizeof(ctl_table) * total_entries);
- return -ENOMEM;
- }
- sprintf((char *) psdev->procname, "intermezzo%d", i);
- /* hook presto into */
- psdev->child = psdev_entries;
-
- /* now for each psdev entry ... */
- psdev_entries[0].data = &(izo_channels[i].uc_hard);
- psdev_entries[1].data = &(izo_channels[i].uc_no_filter);
- psdev_entries[2].data = &(izo_channels[i].uc_no_journal);
- psdev_entries[3].data = &(izo_channels[i].uc_no_upcall);
- psdev_entries[4].data = &(izo_channels[i].uc_timeout);
-#ifdef PRESTO_DEBUG
- psdev_entries[5].data = &(izo_channels[i].uc_errorval);
-#endif
- }
-
-
-#ifdef CONFIG_SYSCTL
- if ( !intermezzo_table_header )
- intermezzo_table_header =
- register_sysctl_table(intermezzo_table, 0);
-#endif
-#ifdef CONFIG_PROC_FS
- proc_fs_intermezzo = proc_mkdir("intermezzo", proc_root_fs);
- proc_fs_intermezzo->owner = THIS_MODULE;
- create_proc_info_entry("mounts", 0, proc_fs_intermezzo,
- intermezzo_mount_get_info);
-#endif
- return 0;
-}
-
-void cleanup_intermezzo_sysctl(void)
-{
- int total_dev = MAX_CHANNEL;
- int entries_per_dev = sizeof(proto_psdev_table) /
- sizeof(proto_psdev_table[0]);
- int total_entries = entries_per_dev * total_dev;
- int i;
-
-#ifdef CONFIG_SYSCTL
- if ( intermezzo_table_header )
- unregister_sysctl_table(intermezzo_table_header);
- intermezzo_table_header = NULL;
-#endif
- for(i = 0; i < total_dev; i++) {
- /* entry for this /proc/sys/intermezzo/intermezzo"i" */
- ctl_table *psdev = &presto_table[i + PRESTO_PRIMARY_CTLCNT];
- PRESTO_FREE(psdev->procname, PROCNAME_SIZE);
- }
- /* presto_table[PRESTO_PRIMARY_CTLCNT].child points to the
- * dev_ctl_table previously allocated in init_intermezzo_psdev()
- */
- PRESTO_FREE(presto_table[PRESTO_PRIMARY_CTLCNT].child, sizeof(ctl_table) * total_entries);
-
-#ifdef CONFIG_PROC_FS
- remove_proc_entry("mounts", proc_fs_intermezzo);
- remove_proc_entry("intermezzo", proc_root_fs);
-#endif
-}
-
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2001, 2002 Cluster File Systems, Inc. <braam@clusterfs.com>
- * Copyright (C) 2001 Tacit Networks, Inc. <phil@off.net>
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Mostly platform independent upcall operations to a cache manager:
- * -- upcalls
- * -- upcall routines
- *
- */
-
-#include <asm/system.h>
-#include <asm/segment.h>
-#include <asm/signal.h>
-#include <linux/signal.h>
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/vmalloc.h>
-#include <linux/slab.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <asm/uaccess.h>
-
-#include "intermezzo_lib.h"
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-#include "intermezzo_idl.h"
-
-/*
- At present:
- -- Asynchronous calls:
- - kml: give a "more" kml indication to userland
- - kml_truncate: initiate KML truncation
- - release_permit: kernel is done with permit
- -- Synchronous
- - open: fetch file
- - permit: get a permit
-
- Errors returned by user level code are positive
-
- */
-
-static struct izo_upcall_hdr *upc_pack(__u32 opcode, int pathlen, char *path,
- char *fsetname, int reclen, char *rec,
- int *size)
-{
- struct izo_upcall_hdr *hdr;
- char *ptr;
- ENTRY;
-
- *size = sizeof(struct izo_upcall_hdr);
- if ( fsetname ) {
- *size += round_strlen(fsetname);
- }
- if ( path ) {
- *size += round_strlen(path);
- }
- if ( rec ) {
- *size += size_round(reclen);
- }
- PRESTO_ALLOC(hdr, *size);
- if (!hdr) {
- CERROR("intermezzo upcall: out of memory (opc %d)\n", opcode);
- EXIT;
- return NULL;
- }
- memset(hdr, 0, *size);
-
- ptr = (char *)hdr + sizeof(*hdr);
-
- /* XXX do we need fsuid ? */
- hdr->u_len = *size;
- hdr->u_version = IZO_UPC_VERSION;
- hdr->u_opc = opcode;
- hdr->u_pid = current->pid;
- hdr->u_uid = current->fsuid;
-
- if (path) {
- /*XXX Robert: please review what len to pass in for
- NUL terminated strings */
- hdr->u_pathlen = strlen(path);
- LOGL0(path, hdr->u_pathlen, ptr);
- }
- if (fsetname) {
- hdr->u_fsetlen = strlen(fsetname);
- LOGL0(fsetname, strlen(fsetname), ptr);
- }
- if (rec) {
- hdr->u_reclen = reclen;
- LOGL(rec, reclen, ptr);
- }
-
- EXIT;
- return hdr;
-}
-
-/* the upcalls */
-int izo_upc_kml(int minor, __u64 offset, __u32 first_recno, __u64 length, __u32 last_recno, char *fsetname)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
-
- ENTRY;
- if (!presto_lento_up(minor)) {
- EXIT;
- return 0;
- }
-
- hdr = upc_pack(IZO_UPC_KML, 0, NULL, fsetname, 0, NULL, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- hdr->u_offset = offset;
- hdr->u_first_recno = first_recno;
- hdr->u_length = length;
- hdr->u_last_recno = last_recno;
-
- CDEBUG(D_UPCALL, "KML: fileset %s, offset %Lu, length %Lu, "
- "first %u, last %d; minor %d\n",
- fsetname,
- (unsigned long long) hdr->u_offset,
- (unsigned long long) hdr->u_length,
- hdr->u_first_recno,
- hdr->u_last_recno, minor);
-
- error = izo_upc_upcall(minor, &size, hdr, ASYNCHRONOUS);
-
- EXIT;
- return -error;
-}
-
-int izo_upc_kml_truncate(int minor, __u64 length, __u32 last_recno, char *fsetname)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
-
- ENTRY;
- if (!presto_lento_up(minor)) {
- EXIT;
- return 0;
- }
-
- hdr = upc_pack(IZO_UPC_KML_TRUNC, 0, NULL, fsetname, 0, NULL, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- hdr->u_length = length;
- hdr->u_last_recno = last_recno;
-
- CDEBUG(D_UPCALL, "KML TRUNCATE: fileset %s, length %Lu, "
- "last recno %d, minor %d\n",
- fsetname,
- (unsigned long long) hdr->u_length,
- hdr->u_last_recno, minor);
-
- error = izo_upc_upcall(minor, &size, hdr, ASYNCHRONOUS);
-
- EXIT;
- return error;
-}
-
-int izo_upc_open(int minor, __u32 pathlen, char *path, char *fsetname, struct lento_vfs_context *info)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
- ENTRY;
-
- if (!presto_lento_up(minor)) {
- EXIT;
- return -EIO;
- }
-
- hdr = upc_pack(IZO_UPC_OPEN, pathlen, path, fsetname,
- sizeof(*info), (char*)info, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- CDEBUG(D_UPCALL, "path %s\n", path);
-
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
- if (error)
- CERROR("InterMezzo: %s: error %d\n", __FUNCTION__, error);
-
- EXIT;
- return -error;
-}
-
-int izo_upc_get_fileid(int minor, __u32 reclen, char *rec,
- __u32 pathlen, char *path, char *fsetname)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
- ENTRY;
-
- if (!presto_lento_up(minor)) {
- EXIT;
- return -EIO;
- }
-
- hdr = upc_pack(IZO_UPC_GET_FILEID, pathlen, path, fsetname, reclen, rec, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- CDEBUG(D_UPCALL, "path %s\n", path);
-
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
- if (error)
- CERROR("InterMezzo: %s: error %d\n", __FUNCTION__, error);
-
- EXIT;
- return -error;
-}
-
-int izo_upc_backfetch(int minor, char *path, char *fsetname, struct lento_vfs_context *info)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
- ENTRY;
-
- if (!presto_lento_up(minor)) {
- EXIT;
- return -EIO;
- }
-
- hdr = upc_pack(IZO_UPC_BACKFETCH, strlen(path), path, fsetname,
- sizeof(*info), (char *)info, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- /* This is currently synchronous, kml_reint_record blocks */
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
- if (error)
- CERROR("InterMezzo: %s: error %d\n", __FUNCTION__, error);
-
- EXIT;
- return -error;
-}
-
-int izo_upc_permit(int minor, struct dentry *dentry, __u32 pathlen, char *path,
- char *fsetname)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
-
- ENTRY;
-
- hdr = upc_pack(IZO_UPC_PERMIT, pathlen, path, fsetname, 0, NULL, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- CDEBUG(D_UPCALL, "Permit minor %d path %s\n", minor, path);
-
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
-
- if (error == -EROFS) {
- int err;
- CERROR("InterMezzo: ERROR - requested permit for read-only "
- "fileset.\n Setting \"%s\" read-only!\n", path);
- err = izo_mark_cache(dentry, 0xFFFFFFFF, CACHE_CLIENT_RO, NULL);
- if (err)
- CERROR("InterMezzo ERROR: mark_cache %d\n", err);
- } else if (error) {
- CERROR("InterMezzo: %s: error %d\n", __FUNCTION__, error);
- }
-
- EXIT;
- return error;
-}
-
-/* This is a ping-pong upcall handled on the server when a client (uuid)
- * requests the permit for itself. */
-int izo_upc_revoke_permit(int minor, char *fsetname, __u8 uuid[16])
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
-
- ENTRY;
-
- hdr = upc_pack(IZO_UPC_REVOKE_PERMIT, 0, NULL, fsetname, 0, NULL, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- memcpy(hdr->u_uuid, uuid, sizeof(hdr->u_uuid));
-
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
-
- if (error)
- CERROR("InterMezzo: %s: error %d\n", __FUNCTION__, error);
-
- EXIT;
- return -error;
-}
-
-int izo_upc_go_fetch_kml(int minor, char *fsetname, __u8 uuid[16],
- __u64 kmlsize)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
- ENTRY;
-
- if (!presto_lento_up(minor)) {
- EXIT;
- return -EIO;
- }
-
- hdr = upc_pack(IZO_UPC_GO_FETCH_KML, 0, NULL, fsetname, 0, NULL, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- hdr->u_offset = kmlsize;
- memcpy(hdr->u_uuid, uuid, sizeof(hdr->u_uuid));
-
- error = izo_upc_upcall(minor, &size, hdr, ASYNCHRONOUS);
- if (error)
- CERROR("%s: error %d\n", __FUNCTION__, error);
-
- EXIT;
- return -error;
-}
-
-int izo_upc_connect(int minor, __u64 ip_address, __u64 port, __u8 uuid[16],
- int client_flag)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
- ENTRY;
-
- if (!presto_lento_up(minor)) {
- EXIT;
- return -EIO;
- }
-
- hdr = upc_pack(IZO_UPC_CONNECT, 0, NULL, NULL, 0, NULL, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- hdr->u_offset = ip_address;
- hdr->u_length = port;
- memcpy(hdr->u_uuid, uuid, sizeof(hdr->u_uuid));
- hdr->u_first_recno = client_flag;
-
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
- if (error) {
- CERROR("%s: error %d\n", __FUNCTION__, error);
- }
-
- EXIT;
- return -error;
-}
-
-int izo_upc_set_kmlsize(int minor, char *fsetname, __u8 uuid[16], __u64 kmlsize)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
- ENTRY;
-
- if (!presto_lento_up(minor)) {
- EXIT;
- return -EIO;
- }
-
- hdr = upc_pack(IZO_UPC_SET_KMLSIZE, 0, NULL, fsetname, 0, NULL, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- memcpy(hdr->u_uuid, uuid, sizeof(hdr->u_uuid));
- hdr->u_length = kmlsize;
-
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
- if (error)
- CERROR("%s: error %d\n", __FUNCTION__, error);
-
- EXIT;
- return -error;
-}
-
-int izo_upc_repstatus(int minor, char * fsetname, struct izo_rcvd_rec *lr_server)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
- ENTRY;
-
- if (!presto_lento_up(minor)) {
- EXIT;
- return -EIO;
- }
-
- hdr = upc_pack(IZO_UPC_REPSTATUS, 0, NULL, fsetname,
- sizeof(*lr_server), (char*)lr_server,
- &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
- if (error)
- CERROR("%s: error %d\n", __FUNCTION__, error);
-
- EXIT;
- return -error;
-}
-
-
-#if 0
-int izo_upc_client_make_branch(int minor, char *fsetname, char *tagname,
- char *branchname)
-{
- int size, error;
- struct izo_upcall_hdr *hdr;
- int pathlen;
- char *path;
- ENTRY;
-
- hdr = upc_pack(IZO_UPC_CLIENT_MAKE_BRANCH, strlen(tagname), tagname,
- fsetname, strlen(branchname) + 1, branchname, &size);
- if (!hdr || IS_ERR(hdr)) {
- error = -PTR_ERR(hdr);
- goto error;
- }
-
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
- if (error)
- CERROR("InterMezzo: error %d\n", error);
-
- error:
- PRESTO_FREE(path, pathlen);
- EXIT;
- return error;
-}
-#endif
-
-int izo_upc_server_make_branch(int minor, char *fsetname)
-{
- int size, error;
- struct izo_upcall_hdr *hdr;
- ENTRY;
-
- hdr = upc_pack(IZO_UPC_SERVER_MAKE_BRANCH, 0, NULL, fsetname, 0, NULL, &size);
- if (!hdr || IS_ERR(hdr)) {
- error = -PTR_ERR(hdr);
- goto error;
- }
-
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
- if (error)
- CERROR("InterMezzo: error %d\n", error);
-
- error:
- EXIT;
- return -error;
-}
-
-int izo_upc_branch_undo(int minor, char *fsetname, char *branchname)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
- ENTRY;
-
- if (!presto_lento_up(minor)) {
- EXIT;
- return -EIO;
- }
-
- hdr = upc_pack(IZO_UPC_BRANCH_UNDO, strlen(branchname), branchname,
- fsetname, 0, NULL, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
- if (error)
- CERROR("InterMezzo: %s: error %d\n", __FUNCTION__, error);
-
- EXIT;
- return -error;
-}
-
-int izo_upc_branch_redo(int minor, char *fsetname, char *branchname)
-{
- int size;
- int error;
- struct izo_upcall_hdr *hdr;
- ENTRY;
-
- if (!presto_lento_up(minor)) {
- EXIT;
- return -EIO;
- }
-
- hdr = upc_pack(IZO_UPC_BRANCH_REDO, strlen(branchname) + 1, branchname,
- fsetname, 0, NULL, &size);
- if (!hdr || IS_ERR(hdr)) {
- EXIT;
- return -PTR_ERR(hdr);
- }
-
- error = izo_upc_upcall(minor, &size, hdr, SYNCHRONOUS);
- if (error)
- CERROR("InterMezzo: %s: error %d\n", __FUNCTION__, error);
-
- EXIT;
- return -error;
-}
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- *
- * Copyright (C) 2001, 2002 Cluster File Systems, Inc.
- * Copyright (C) 2000 Stelias Computing, Inc.
- * Copyright (C) 2000 Red Hat, Inc.
- *
- * This file is part of InterMezzo, http://www.inter-mezzo.org.
- *
- * InterMezzo is free software; you can redistribute it and/or
- * modify it under the terms of version 2 of the GNU General Public
- * License as published by the Free Software Foundation.
- *
- * InterMezzo is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with InterMezzo; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * vfs.c
- *
- * This file implements kernel downcalls from lento.
- *
- * Author: Rob Simmonds <simmonds@stelias.com>
- * Andreas Dilger <adilger@stelias.com>
- * Copyright (C) 2000 Stelias Computing Inc
- * Copyright (C) 2000 Red Hat Inc.
- *
- * Extended attribute support
- * Copyright (C) 2001 Shirish H. Phatak, Tacit Networks, Inc.
- *
- * This code is based on code from namei.c in the linux file system;
- * see copyright notice below.
- */
-
-/** namei.c copyright **/
-
-/*
- * linux/fs/namei.c
- *
- * Copyright (C) 1991, 1992 Linus Torvalds
- */
-/*
- * Some corrections by tytso.
- */
-
-/* [Feb 1997 T. Schoebel-Theuer] Complete rewrite of the pathname
- * lookup logic.
- */
-
-/** end of namei.c copyright **/
-
-#include <linux/mm.h>
-#include <linux/proc_fs.h>
-#include <linux/quotaops.h>
-
-#include <asm/uaccess.h>
-#include <asm/unaligned.h>
-#include <asm/semaphore.h>
-#include <asm/pgtable.h>
-
-#include <linux/file.h>
-#include <linux/fs.h>
-#include <linux/namei.h>
-#include <linux/genhd.h>
-
-#include "intermezzo_fs.h"
-#include "intermezzo_psdev.h"
-
-#ifdef CONFIG_FS_EXT_ATTR
-# include <linux/ext_attr.h>
-
-# if 0 /* was a broken check for Posix ACLs */
-# include <linux/posix_acl.h>
-# endif
-#endif
-
-extern struct inode_operations presto_sym_iops;
-
-/* Write the last_rcvd values to the last_rcvd file. We don't know what the
- * UUID or last_ctime values are, so we have to read from the file first
- * (sigh).
- * exported for branch_reinter in kml_reint.c*/
-int presto_write_last_rcvd(struct rec_info *recinfo,
- struct presto_file_set *fset,
- struct lento_vfs_context *info)
-{
- int rc;
- struct izo_rcvd_rec rcvd_rec;
-
- ENTRY;
-
- memset(&rcvd_rec, 0, sizeof(rcvd_rec));
- memcpy(rcvd_rec.lr_uuid, info->uuid, sizeof(rcvd_rec.lr_uuid));
- rcvd_rec.lr_remote_recno = HTON__u64(info->recno);
- rcvd_rec.lr_remote_offset = HTON__u64(info->kml_offset);
- rcvd_rec.lr_local_recno = HTON__u64(recinfo->recno);
- rcvd_rec.lr_local_offset = HTON__u64(recinfo->offset + recinfo->size);
-
- rc = izo_rcvd_write(fset, &rcvd_rec);
- if (rc < 0) {
- /* izo_rcvd_write returns negative errors and non-negative
- * offsets */
- CERROR("InterMezzo: izo_rcvd_write failed: %d\n", rc);
- EXIT;
- return rc;
- }
- EXIT;
- return 0;
-}
-
-/*
- * It's inline, so penalty for filesystems that don't use sticky bit is
- * minimal.
- */
-static inline int check_sticky(struct inode *dir, struct inode *inode)
-{
- if (!(dir->i_mode & S_ISVTX))
- return 0;
- if (inode->i_uid == current->fsuid)
- return 0;
- if (dir->i_uid == current->fsuid)
- return 0;
- return !capable(CAP_FOWNER);
-}
-
-/* from linux/fs/namei.c */
-static inline int may_delete(struct inode *dir,struct dentry *victim, int isdir)
-{
- int error;
- if (!victim->d_inode || victim->d_parent->d_inode != dir)
- return -ENOENT;
- error = permission(dir,MAY_WRITE | MAY_EXEC, NULL);
- if (error)
- return error;
- if (IS_APPEND(dir))
- return -EPERM;
- if (check_sticky(dir, victim->d_inode)||IS_APPEND(victim->d_inode)||
- IS_IMMUTABLE(victim->d_inode))
- return -EPERM;
- if (isdir) {
- if (!S_ISDIR(victim->d_inode->i_mode))
- return -ENOTDIR;
- if (IS_ROOT(victim))
- return -EBUSY;
- } else if (S_ISDIR(victim->d_inode->i_mode))
- return -EISDIR;
- return 0;
-}
-
-/* from linux/fs/namei.c */
-static inline int may_create(struct inode *dir, struct dentry *child) {
- if (child->d_inode)
- return -EEXIST;
- if (IS_DEADDIR(dir))
- return -ENOENT;
- return permission(dir,MAY_WRITE | MAY_EXEC, NULL);
-}
-
-#ifdef PRESTO_DEBUG
-/* The loop_discard_io() function is available via a kernel patch to the
- * loop block device. It "works" by accepting writes, but throwing them
- * away, rather than trying to write them to disk. The old method worked
- * by setting the underlying device read-only, but that has the problem
- * that dirty buffers are kept in memory, and ext3 didn't like that at all.
- */
-#ifdef CONFIG_LOOP_DISCARD
-#define BLKDEV_FAIL(dev,fail) loop_discard_io(dev,fail)
-#else
-#define BLKDEV_FAIL(dev,fail) set_device_ro(dev, 1)
-#endif
-
-/* If a breakpoint has been set via /proc/sys/intermezzo/intermezzoX/errorval,
- * that is the same as "value", the underlying device will "fail" now.
- */
-inline void presto_debug_fail_blkdev(struct presto_file_set *fset,
- unsigned long value)
-{
- int minor = presto_f2m(fset);
- int errorval = izo_channels[minor].uc_errorval;
- struct block_device *bdev = fset->fset_dentry->d_inode->i_sb->s_bdev;
- char b[BDEVNAME_SIZE];
-
- if (errorval && errorval == (long)value && !bdev_read_only(bdev)) {
- CDEBUG(D_SUPER, "setting device %s read only\n",
- bdevname(bdev, b));
- BLKDEV_FAIL(bdev, 1);
- izo_channels[minor].uc_errorval = -bdev->bd_dev;
- }
-}
-#else
-#define presto_debug_fail_blkdev(dev,value) do {} while (0)
-#endif
-
-
-static inline int presto_do_kml(struct lento_vfs_context *info,
- struct dentry *dentry)
-{
- if ( ! (info->flags & LENTO_FL_KML) )
- return 0;
- if ( presto_chk(dentry, PRESTO_DONT_JOURNAL) )
- return 0;
- return 1;
-}
-
-static inline int presto_do_rcvd(struct lento_vfs_context *info,
- struct dentry *dentry)
-{
- if ( ! (info->flags & LENTO_FL_EXPECT) )
- return 0;
- if ( presto_chk(dentry, PRESTO_DONT_JOURNAL) )
- return 0;
- return 1;
-}
-
-
-/* XXX fixme: this should not fail, all these dentries are in memory
- when _we_ call this */
-int presto_settime(struct presto_file_set *fset,
- struct dentry *newobj,
- struct dentry *parent,
- struct dentry *target,
- struct lento_vfs_context *ctx,
- int valid)
-{
- int error = 0;
- struct dentry *dentry;
- struct inode *inode;
- struct inode_operations *iops;
- struct iattr iattr;
-
- ENTRY;
- if (ctx->flags & LENTO_FL_IGNORE_TIME ) {
- EXIT;
- return 0;
- }
-
- iattr.ia_ctime = ctx->updated_time;
- iattr.ia_mtime = ctx->updated_time;
- iattr.ia_valid = valid;
-
- while (1) {
- if (parent && ctx->flags & LENTO_FL_TOUCH_PARENT) {
- dentry = parent;
- parent = NULL;
- } else if (newobj && ctx->flags & LENTO_FL_TOUCH_NEWOBJ) {
- dentry = newobj;
- newobj = NULL;
- } else if (target) {
- dentry = target;
- target = NULL;
- } else
- break;
-
- inode = dentry->d_inode;
-
- error = -EROFS;
- if (IS_RDONLY(inode)) {
- EXIT;
- return -EROFS;
- }
-
- if (IS_IMMUTABLE(inode) || IS_APPEND(inode)) {
- EXIT;
- return -EPERM;
- }
-
- error = -EPERM;
- iops = filter_c2cdiops(fset->fset_cache->cache_filter);
- if (!iops) {
- EXIT;
- return error;
- }
-
- if (iops->setattr != NULL)
- error = iops->setattr(dentry, &iattr);
- else {
- error = 0;
- inode_setattr(dentry->d_inode, &iattr);
- }
- }
- EXIT;
- return error;
-}
-
-void izo_get_rollback_data(struct inode *inode, struct izo_rollback_data *rb)
-{
- rb->rb_mode = (__u32)inode->i_mode;
- rb->rb_rdev = (__u32)old_encode_dev(inode->i_rdev);
- rb->rb_uid = (__u64)inode->i_uid;
- rb->rb_gid = (__u64)inode->i_gid;
-}
-
-
-int presto_do_close(struct presto_file_set *fset, struct file *file)
-{
- struct rec_info rec;
- int rc = -ENOSPC;
- void *handle;
- struct inode *inode = file->f_dentry->d_inode;
- struct presto_file_data *fdata =
- (struct presto_file_data *)file->private_data;
-
- ENTRY;
- presto_getversion(&fdata->fd_info.remote_version, inode);
-
- rc = presto_reserve_space(fset->fset_cache, PRESTO_REQHIGH);
- if (rc) {
- EXIT;
- return rc;
- }
-
- handle = presto_trans_start(fset, file->f_dentry->d_inode,
- KML_OPCODE_RELEASE);
- if ( IS_ERR(handle) ) {
- CERROR("presto_release: no space for transaction\n");
- return rc;
- }
-
- if (fdata->fd_info.flags & LENTO_FL_KML)
- rc = presto_journal_close(&rec, fset, fdata, file->f_dentry,
- &fdata->fd_version,
- &fdata->fd_info.remote_version);
- if (rc) {
- CERROR("presto_close: cannot journal close\n");
- goto out;
- }
-
- if (fdata->fd_info.flags & LENTO_FL_EXPECT)
- rc = presto_write_last_rcvd(&rec, fset, &fdata->fd_info);
-
- if (rc) {
- CERROR("presto_close: cannot journal last_rcvd\n");
- goto out;
- }
- presto_trans_commit(fset, handle);
-
- /* cancel the LML record */
- handle = presto_trans_start(fset, inode, KML_OPCODE_WRITE);
- if ( IS_ERR(handle) ) {
- CERROR("presto_release: no space for clear\n");
- return -ENOSPC;
- }
-
- rc = presto_clear_lml_close(fset, fdata->fd_lml_offset);
- if (rc < 0 ) {
- CERROR("presto_close: cannot journal close\n");
- goto out;
- }
- presto_truncate_lml(fset);
-
- out:
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH);
- presto_trans_commit(fset, handle);
- EXIT;
- return rc;
-}
-
-int presto_do_setattr(struct presto_file_set *fset, struct dentry *dentry,
- struct iattr *iattr, struct lento_vfs_context *info)
-{
- struct rec_info rec;
- struct inode *inode = dentry->d_inode;
- struct inode_operations *iops;
- int error;
- struct presto_version old_ver, new_ver;
- struct izo_rollback_data rb;
- void *handle;
- loff_t old_size=inode->i_size;
-
- ENTRY;
- error = -EROFS;
- if (IS_RDONLY(inode)) {
- EXIT;
- return -EROFS;
- }
-
- if (IS_IMMUTABLE(inode) || IS_APPEND(inode)) {
- EXIT;
- return -EPERM;
- }
-
- presto_getversion(&old_ver, dentry->d_inode);
- izo_get_rollback_data(dentry->d_inode, &rb);
- error = -EPERM;
- iops = filter_c2cdiops(fset->fset_cache->cache_filter);
-
- error = presto_reserve_space(fset->fset_cache, 2*PRESTO_REQHIGH);
- if (error) {
- EXIT;
- return error;
- }
-
- if (iattr->ia_valid & ATTR_SIZE) {
- if (izo_mark_dentry(dentry, ~PRESTO_DATA, 0, NULL) != 0)
- CERROR("izo_mark_dentry(inode %ld, ~PRESTO_DATA) "
- "failed\n", dentry->d_inode->i_ino);
- handle = presto_trans_start(fset, dentry->d_inode,
- KML_OPCODE_TRUNC);
- } else {
- handle = presto_trans_start(fset, dentry->d_inode,
- KML_OPCODE_SETATTR);
- }
-
- if ( IS_ERR(handle) ) {
- CERROR("presto_do_setattr: no space for transaction\n");
- presto_release_space(fset->fset_cache, 2*PRESTO_REQHIGH);
- return -ENOSPC;
- }
-
- if (dentry->d_inode && iops && iops->setattr) {
- error = iops->setattr(dentry, iattr);
- } else {
- error = inode_change_ok(dentry->d_inode, iattr);
- if (!error)
- inode_setattr(inode, iattr);
- }
-
- if (!error && (iattr->ia_valid & ATTR_SIZE))
- vmtruncate(inode, iattr->ia_size);
-
- if (error) {
- EXIT;
- goto exit;
- }
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_SETATTR | 0x10);
-
- if ( presto_do_kml(info, dentry) ) {
- if ((iattr->ia_valid & ATTR_SIZE) && (old_size != inode->i_size)) {
- /* Journal a close whenever we see a potential truncate
- * At the receiving end, lento should explicitly remove
- * ATTR_SIZE from the list of valid attributes */
- presto_getversion(&new_ver, inode);
- error = presto_journal_close(&rec, fset, NULL, dentry,
- &old_ver, &new_ver);
- }
-
- if (!error)
- error = presto_journal_setattr(&rec, fset, dentry,
- &old_ver, &rb, iattr);
- }
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_SETATTR | 0x20);
- if ( presto_do_rcvd(info, dentry) )
- error = presto_write_last_rcvd(&rec, fset, info);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_SETATTR | 0x30);
-
- EXIT;
-exit:
- presto_release_space(fset->fset_cache, 2*PRESTO_REQHIGH);
- presto_trans_commit(fset, handle);
- return error;
-}
-
-int lento_setattr(const char *name, struct iattr *iattr,
- struct lento_vfs_context *info)
-{
- struct nameidata nd;
- struct dentry *dentry;
- struct presto_file_set *fset;
- int error;
-#if 0 /* was a broken check for Posix ACLs */
- int (*set_posix_acl)(struct inode *, int type, posix_acl_t *)=NULL;
-#endif
-
- ENTRY;
- CDEBUG(D_PIOCTL,"name %s, valid %#x, mode %#o, uid %d, gid %d, size %Ld\n",
- name, iattr->ia_valid, iattr->ia_mode, iattr->ia_uid,
- iattr->ia_gid, iattr->ia_size);
- CDEBUG(D_PIOCTL, "atime %#lx, mtime %#lx, ctime %#lx, attr_flags %#x\n",
- iattr->ia_atime.tv_sec, iattr->ia_mtime.tv_sec, iattr->ia_ctime.tv_sec,
- iattr->ia_attr_flags);
- CDEBUG(D_PIOCTL, "offset %d, recno %d, flags %#x\n",
- info->slot_offset, info->recno, info->flags);
-
- lock_kernel();
- error = presto_walk(name, &nd);
- if (error) {
- EXIT;
- goto exit;
- }
- dentry = nd.dentry;
-
- fset = presto_fset(dentry);
- error = -EINVAL;
- if ( !fset ) {
- CERROR("No fileset!\n");
- EXIT;
- goto exit_lock;
- }
-
- /* NOTE: this prevents us from changing the filetype on setattr,
- * as we normally only want to change permission bits.
- * If this is not correct, then we need to fix the perl code
- * to always send the file type OR'ed with the permission.
- */
- if (iattr->ia_valid & ATTR_MODE) {
- int set_mode = iattr->ia_mode;
- iattr->ia_mode = (iattr->ia_mode & S_IALLUGO) |
- (dentry->d_inode->i_mode & ~S_IALLUGO);
- CDEBUG(D_PIOCTL, "chmod: orig %#o, set %#o, result %#o\n",
- dentry->d_inode->i_mode, set_mode, iattr->ia_mode);
-#if 0 /* was a broken check for Posix ACLs */
- /* ACl code interacts badly with setattr
- * since it tries to modify the ACL using
- * set_ext_attr which recurses back into presto.
- * This only happens if ATTR_MODE is set.
- * Here we are doing a "forced" mode set
- * (initiated by lento), so we disable the
- * set_posix_acl operation which
- * prevents such recursion. -SHP
- *
- * This will probably still be required when native
- * acl journalling is in place.
- */
- set_posix_acl=dentry->d_inode->i_op->set_posix_acl;
- dentry->d_inode->i_op->set_posix_acl=NULL;
-#endif
- }
-
- error = presto_do_setattr(fset, dentry, iattr, info);
-
- if (info->flags & LENTO_FL_SET_DDFILEID) {
- struct presto_dentry_data *dd = presto_d2d(dentry);
- if (dd) {
- dd->remote_ino = info->remote_ino;
- dd->remote_generation = info->remote_generation;
- }
- }
-
-#if 0 /* was a broken check for Posix ACLs */
- /* restore the inode_operations if we changed them*/
- if (iattr->ia_valid & ATTR_MODE)
- dentry->d_inode->i_op->set_posix_acl=set_posix_acl;
-#endif
-
-
- EXIT;
-exit_lock:
- path_release(&nd);
-exit:
- unlock_kernel();
- return error;
-}
-
-int presto_do_create(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, int mode,
- struct lento_vfs_context *info)
-{
- struct rec_info rec;
- int error;
- struct presto_version tgt_dir_ver, new_file_ver;
- struct inode_operations *iops;
- void *handle;
-
- ENTRY;
- mode &= S_IALLUGO;
- mode |= S_IFREG;
-
- // down(&dir->d_inode->i_zombie);
- error = presto_reserve_space(fset->fset_cache, PRESTO_REQHIGH);
- if (error) {
- EXIT;
- // up(&dir->d_inode->i_zombie);
- return error;
- }
-
- error = may_create(dir->d_inode, dentry);
- if (error) {
- EXIT;
- goto exit_pre_lock;
- }
-
- error = -EPERM;
- iops = filter_c2cdiops(fset->fset_cache->cache_filter);
- if (!iops->create) {
- EXIT;
- goto exit_pre_lock;
- }
-
- presto_getversion(&tgt_dir_ver, dir->d_inode);
- handle = presto_trans_start(fset, dir->d_inode, KML_OPCODE_CREATE);
- if ( IS_ERR(handle) ) {
- EXIT;
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH);
- CERROR("presto_do_create: no space for transaction\n");
- error=-ENOSPC;
- goto exit_pre_lock;
- }
- DQUOT_INIT(dir->d_inode);
- lock_kernel();
- error = iops->create(dir->d_inode, dentry, mode, NULL);
- if (error) {
- EXIT;
- goto exit_lock;
- }
-
- if (dentry->d_inode) {
- struct presto_cache *cache = fset->fset_cache;
- /* was this already done? */
- presto_set_ops(dentry->d_inode, cache->cache_filter);
-
- filter_setup_dentry_ops(cache->cache_filter,
- dentry->d_op,
- &presto_dentry_ops);
- dentry->d_op = filter_c2udops(cache->cache_filter);
-
- /* if Lento creates this file, we won't have data */
- if ( ISLENTO(presto_c2m(cache)) ) {
- presto_set(dentry, PRESTO_ATTR);
- } else {
- presto_set(dentry, PRESTO_ATTR | PRESTO_DATA);
- }
- }
-
- info->flags |= LENTO_FL_TOUCH_PARENT;
- error = presto_settime(fset, NULL, dir, dentry,
- info, ATTR_CTIME | ATTR_MTIME);
- if (error) {
- EXIT;
- goto exit_lock;
- }
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_CREATE | 0x10);
-
- if ( presto_do_kml(info, dentry) ) {
- presto_getversion(&new_file_ver, dentry->d_inode);
- error = presto_journal_create(&rec, fset, dentry, &tgt_dir_ver,
- &new_file_ver,
- dentry->d_inode->i_mode);
- }
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_CREATE | 0x20);
-
- if ( presto_do_rcvd(info, dentry) )
- error = presto_write_last_rcvd(&rec, fset, info);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_CREATE | 0x30);
-
- /* add inode dentry */
- if (fset->fset_cache->cache_filter->o_trops->tr_add_ilookup ) {
- struct dentry *d;
- d = fset->fset_cache->cache_filter->o_trops->tr_add_ilookup
- (dir->d_inode->i_sb->s_root, dentry);
- }
-
- EXIT;
-
- exit_lock:
- unlock_kernel();
- presto_trans_commit(fset, handle);
- exit_pre_lock:
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH);
- // up(&dir->d_inode->i_zombie);
- return error;
-}
-
-int lento_create(const char *name, int mode, struct lento_vfs_context *info)
-{
- int error;
- struct nameidata nd;
- char * pathname;
- struct dentry *dentry;
- struct presto_file_set *fset;
-
- ENTRY;
- pathname = getname(name);
- error = PTR_ERR(pathname);
- if (IS_ERR(pathname)) {
- EXIT;
- goto exit;
- }
-
- /* this looks up the parent */
- error = path_lookup(pathname, LOOKUP_PARENT, &nd);
- if (error) {
- EXIT;
- goto exit;
- }
- dentry = lookup_create(&nd, 0);
- error = PTR_ERR(dentry);
- if (IS_ERR(dentry)) {
- EXIT;
- goto exit_lock;
- }
-
- fset = presto_fset(dentry);
- error = -EINVAL;
- if ( !fset ) {
- CERROR("No fileset!\n");
- EXIT;
- goto exit_lock;
- }
- error = presto_do_create(fset, dentry->d_parent, dentry, (mode&S_IALLUGO)|S_IFREG,
- info);
-
- EXIT;
-
- exit_lock:
- path_release (&nd);
- dput(dentry);
- up(&dentry->d_parent->d_inode->i_sem);
- putname(pathname);
-exit:
- return error;
-}
-
-int presto_do_link(struct presto_file_set *fset, struct dentry *old_dentry,
- struct dentry *dir, struct dentry *new_dentry,
- struct lento_vfs_context *info)
-{
- struct rec_info rec;
- struct inode *inode;
- int error;
- struct inode_operations *iops;
- struct presto_version tgt_dir_ver;
- struct presto_version new_link_ver;
- void *handle;
-
- // down(&dir->d_inode->i_zombie);
- error = presto_reserve_space(fset->fset_cache, PRESTO_REQHIGH);
- if (error) {
- EXIT;
- // up(&dir->d_inode->i_zombie);
- return error;
- }
- error = -ENOENT;
- inode = old_dentry->d_inode;
- if (!inode)
- goto exit_lock;
-
- error = may_create(dir->d_inode, new_dentry);
- if (error)
- goto exit_lock;
-
- error = -EXDEV;
- if (dir->d_inode->i_sb != inode->i_sb)
- goto exit_lock;
-
- /*
- * A link to an append-only or immutable file cannot be created.
- */
- error = -EPERM;
- if (IS_APPEND(inode) || IS_IMMUTABLE(inode)) {
- EXIT;
- goto exit_lock;
- }
-
- iops = filter_c2cdiops(fset->fset_cache->cache_filter);
- if (!iops->link) {
- EXIT;
- goto exit_lock;
- }
-
-
- presto_getversion(&tgt_dir_ver, dir->d_inode);
- handle = presto_trans_start(fset, dir->d_inode, KML_OPCODE_LINK);
- if ( IS_ERR(handle) ) {
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH);
- CERROR("presto_do_link: no space for transaction\n");
- return -ENOSPC;
- }
-
- DQUOT_INIT(dir->d_inode);
- lock_kernel();
- error = iops->link(old_dentry, dir->d_inode, new_dentry);
- unlock_kernel();
- if (error) {
- EXIT;
- goto exit_lock;
- }
-
- /* link dd data to that of existing dentry */
- old_dentry->d_op->d_release(new_dentry);
- if (!presto_d2d(old_dentry))
- BUG();
- presto_d2d(old_dentry)->dd_count++;
-
- new_dentry->d_fsdata = presto_d2d(old_dentry);
-
- info->flags |= LENTO_FL_TOUCH_PARENT;
- error = presto_settime(fset, NULL, dir, new_dentry,
- info, ATTR_CTIME);
- if (error) {
- EXIT;
- goto exit_lock;
- }
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_LINK | 0x10);
- presto_getversion(&new_link_ver, new_dentry->d_inode);
- if ( presto_do_kml(info, old_dentry) )
- error = presto_journal_link(&rec, fset, old_dentry, new_dentry,
- &tgt_dir_ver, &new_link_ver);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_LINK | 0x20);
- if ( presto_do_rcvd(info, old_dentry) )
- error = presto_write_last_rcvd(&rec, fset, info);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_LINK | 0x30);
- EXIT;
- presto_trans_commit(fset, handle);
-exit_lock:
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH);
- // up(&dir->d_inode->i_zombie);
- return error;
-}
-
-
-int lento_link(const char * oldname, const char * newname,
- struct lento_vfs_context *info)
-{
- int error;
- char * to;
- struct presto_file_set *fset;
-
- to = getname(newname);
- error = PTR_ERR(to);
- if (!IS_ERR(to)) {
- struct dentry *new_dentry;
- struct nameidata nd, old_nd;
-
- error = __user_walk(oldname, 0, &old_nd);
- if (error)
- goto exit;
- error = path_lookup(to, LOOKUP_PARENT, &nd);
- if (error)
- goto out;
- error = -EXDEV;
- if (old_nd.mnt != nd.mnt)
- goto out;
- new_dentry = lookup_create(&nd, 0);
- error = PTR_ERR(new_dentry);
-
- if (!IS_ERR(new_dentry)) {
- fset = presto_fset(new_dentry);
- error = -EINVAL;
- if ( !fset ) {
- CERROR("No fileset!\n");
- EXIT;
- goto out2;
- }
- error = presto_do_link(fset, old_nd.dentry,
- nd.dentry,
- new_dentry, info);
- dput(new_dentry);
- }
- out2:
- up(&nd.dentry->d_inode->i_sem);
- path_release(&nd);
- out:
- path_release(&old_nd);
- exit:
- putname(to);
- }
- return error;
-}
-
-int presto_do_unlink(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, struct lento_vfs_context *info)
-{
- struct rec_info rec;
- struct inode_operations *iops;
- struct presto_version tgt_dir_ver, old_file_ver;
- struct izo_rollback_data rb;
- void *handle;
- int do_kml = 0, do_rcvd = 0, linkno = 0, error, old_targetlen = 0;
- char *old_target = NULL;
-
- ENTRY;
- // down(&dir->d_inode->i_zombie);
- error = may_delete(dir->d_inode, dentry, 0);
- if (error) {
- EXIT;
- // up(&dir->d_inode->i_zombie);
- return error;
- }
-
- error = -EPERM;
- iops = filter_c2cdiops(fset->fset_cache->cache_filter);
- if (!iops->unlink) {
- EXIT;
- // up(&dir->d_inode->i_zombie);
- return error;
- }
-
- error = presto_reserve_space(fset->fset_cache, PRESTO_REQLOW);
- if (error) {
- EXIT;
- // up(&dir->d_inode->i_zombie);
- return error;
- }
-
-
- if (presto_d2d(dentry)) {
- struct presto_dentry_data *dd = presto_d2d(dentry);
- struct dentry *de = dd->dd_inodentry;
- if (de && dentry->d_inode->i_nlink == 1) {
- dd->dd_count--;
- dd->dd_inodentry = NULL;
- de->d_fsdata = NULL;
- atomic_dec(&de->d_inode->i_count);
- de->d_inode = NULL;
- dput(de);
- }
- }
-
- presto_getversion(&tgt_dir_ver, dir->d_inode);
- presto_getversion(&old_file_ver, dentry->d_inode);
- izo_get_rollback_data(dentry->d_inode, &rb);
- handle = presto_trans_start(fset, dir->d_inode, KML_OPCODE_UNLINK);
- if ( IS_ERR(handle) ) {
- presto_release_space(fset->fset_cache, PRESTO_REQLOW);
- CERROR("ERROR: presto_do_unlink: no space for transaction. Tell Peter.\n");
- // up(&dir->d_inode->i_zombie);
- return -ENOSPC;
- }
- DQUOT_INIT(dir->d_inode);
- if (d_mountpoint(dentry))
- error = -EBUSY;
- else {
- lock_kernel();
- linkno = dentry->d_inode->i_nlink;
- if (linkno > 1) {
- dget(dentry);
- }
-
- if (S_ISLNK(dentry->d_inode->i_mode)) {
- mm_segment_t old_fs;
- struct inode_operations *riops;
- riops = filter_c2csiops(fset->fset_cache->cache_filter);
-
- PRESTO_ALLOC(old_target, PATH_MAX);
- if (old_target == NULL) {
- error = -ENOMEM;
- EXIT;
- goto exit;
- }
-
- old_fs = get_fs();
- set_fs(get_ds());
-
- if (riops->readlink == NULL)
- CERROR("InterMezzo %s: no readlink iops.\n",
- __FUNCTION__);
- else
- old_targetlen =
- riops->readlink(dentry, old_target,
- PATH_MAX);
- if (old_targetlen < 0) {
- CERROR("InterMezzo: readlink failed: %ld\n",
- PTR_ERR(old_target));
- PRESTO_FREE(old_target, PATH_MAX);
- old_target = NULL;
- old_targetlen = 0;
- }
- set_fs(old_fs);
- }
-
- do_kml = presto_do_kml(info, dir);
- do_rcvd = presto_do_rcvd(info, dir);
- error = iops->unlink(dir->d_inode, dentry);
- unlock_kernel();
- }
-
- if (linkno > 1) {
- /* FIXME: Combine this with the next call? */
- error = presto_settime(fset, NULL, NULL, dentry,
- info, ATTR_CTIME);
- dput(dentry);
- if (error) {
- EXIT;
- goto exit;
- }
- }
-
- error = presto_settime(fset, NULL, NULL, dir,
- info, ATTR_CTIME | ATTR_MTIME);
- if (error) {
- EXIT;
- goto exit;
- }
-
- // up(&dir->d_inode->i_zombie);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_UNLINK | 0x10);
- if ( do_kml )
- error = presto_journal_unlink(&rec, fset, dir, &tgt_dir_ver,
- &old_file_ver, &rb, dentry,
- old_target, old_targetlen);
- presto_debug_fail_blkdev(fset, KML_OPCODE_UNLINK | 0x20);
- if ( do_rcvd ) {
- error = presto_write_last_rcvd(&rec, fset, info);
- }
- presto_debug_fail_blkdev(fset, KML_OPCODE_UNLINK | 0x30);
- EXIT;
-exit:
- presto_release_space(fset->fset_cache, PRESTO_REQLOW);
- presto_trans_commit(fset, handle);
- if (old_target != NULL)
- PRESTO_FREE(old_target, PATH_MAX);
- return error;
-}
-
-
-int lento_unlink(const char *pathname, struct lento_vfs_context *info)
-{
- int error = 0;
- char * name;
- struct dentry *dentry;
- struct nameidata nd;
- struct presto_file_set *fset;
-
- ENTRY;
-
- name = getname(pathname);
- if(IS_ERR(name))
- return PTR_ERR(name);
-
- error = path_lookup(name, LOOKUP_PARENT, &nd);
- if (error)
- goto exit;
- error = -EISDIR;
- if (nd.last_type != LAST_NORM)
- goto exit1;
- down(&nd.dentry->d_inode->i_sem);
- dentry = lookup_hash(&nd.last, nd.dentry);
- error = PTR_ERR(dentry);
- if (!IS_ERR(dentry)) {
- fset = presto_fset(dentry);
- error = -EINVAL;
- if ( !fset ) {
- CERROR("No fileset!\n");
- EXIT;
- goto exit2;
- }
- /* Why not before? Because we want correct error value */
- if (nd.last.name[nd.last.len])
- goto slashes;
- error = presto_do_unlink(fset, nd.dentry, dentry, info);
- if (!error)
- d_delete(dentry);
- exit2:
- EXIT;
- dput(dentry);
- }
- up(&nd.dentry->d_inode->i_sem);
-exit1:
- path_release(&nd);
-exit:
- putname(name);
-
- return error;
-
-slashes:
- error = !dentry->d_inode ? -ENOENT :
- S_ISDIR(dentry->d_inode->i_mode) ? -EISDIR : -ENOTDIR;
- goto exit2;
-}
-
-int presto_do_symlink(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, const char *oldname,
- struct lento_vfs_context *info)
-{
- struct rec_info rec;
- int error;
- struct presto_version tgt_dir_ver, new_link_ver;
- struct inode_operations *iops;
- void *handle;
-
- ENTRY;
- // down(&dir->d_inode->i_zombie);
- /* record + max path len + space to free */
- error = presto_reserve_space(fset->fset_cache, PRESTO_REQHIGH + 4096);
- if (error) {
- EXIT;
- // up(&dir->d_inode->i_zombie);
- return error;
- }
-
- error = may_create(dir->d_inode, dentry);
- if (error) {
- EXIT;
- goto exit_lock;
- }
-
- error = -EPERM;
- iops = filter_c2cdiops(fset->fset_cache->cache_filter);
- if (!iops->symlink) {
- EXIT;
- goto exit_lock;
- }
-
- presto_getversion(&tgt_dir_ver, dir->d_inode);
- handle = presto_trans_start(fset, dir->d_inode, KML_OPCODE_SYMLINK);
- if ( IS_ERR(handle) ) {
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH + 4096);
- CERROR("ERROR: presto_do_symlink: no space for transaction. Tell Peter.\n");
- EXIT;
- // up(&dir->d_inode->i_zombie);
- return -ENOSPC;
- }
- DQUOT_INIT(dir->d_inode);
- lock_kernel();
- error = iops->symlink(dir->d_inode, dentry, oldname);
- if (error) {
- EXIT;
- goto exit;
- }
-
- if (dentry->d_inode) {
- struct presto_cache *cache = fset->fset_cache;
-
- presto_set_ops(dentry->d_inode, cache->cache_filter);
-
- filter_setup_dentry_ops(cache->cache_filter, dentry->d_op,
- &presto_dentry_ops);
- dentry->d_op = filter_c2udops(cache->cache_filter);
- /* XXX ? Cache state ? if Lento creates a symlink */
- if ( ISLENTO(presto_c2m(cache)) ) {
- presto_set(dentry, PRESTO_ATTR);
- } else {
- presto_set(dentry, PRESTO_ATTR | PRESTO_DATA);
- }
- }
-
- info->flags |= LENTO_FL_TOUCH_PARENT;
- error = presto_settime(fset, NULL, dir, dentry,
- info, ATTR_CTIME | ATTR_MTIME);
- if (error) {
- EXIT;
- goto exit;
- }
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_SYMLINK | 0x10);
- presto_getversion(&new_link_ver, dentry->d_inode);
- if ( presto_do_kml(info, dentry) )
- error = presto_journal_symlink(&rec, fset, dentry, oldname,
- &tgt_dir_ver, &new_link_ver);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_SYMLINK | 0x20);
- if ( presto_do_rcvd(info, dentry) )
- error = presto_write_last_rcvd(&rec, fset, info);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_SYMLINK | 0x30);
- EXIT;
-exit:
- unlock_kernel();
- presto_trans_commit(fset, handle);
- exit_lock:
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH + 4096);
- // up(&dir->d_inode->i_zombie);
- return error;
-}
-
-int lento_symlink(const char *oldname, const char *newname,
- struct lento_vfs_context *info)
-{
- int error;
- char *from;
- char *to;
- struct dentry *dentry;
- struct presto_file_set *fset;
- struct nameidata nd;
-
- ENTRY;
- lock_kernel();
- from = getname(oldname);
- error = PTR_ERR(from);
- if (IS_ERR(from)) {
- EXIT;
- goto exit;
- }
-
- to = getname(newname);
- error = PTR_ERR(to);
- if (IS_ERR(to)) {
- EXIT;
- goto exit_from;
- }
-
- error = path_lookup(to, LOOKUP_PARENT, &nd);
- if (error) {
- EXIT;
- goto exit_to;
- }
-
- dentry = lookup_create(&nd, 0);
- error = PTR_ERR(dentry);
- if (IS_ERR(dentry)) {
- path_release(&nd);
- EXIT;
- goto exit_to;
- }
-
- fset = presto_fset(dentry);
- error = -EINVAL;
- if ( !fset ) {
- CERROR("No fileset!\n");
- path_release(&nd);
- EXIT;
- goto exit_lock;
- }
- error = presto_do_symlink(fset, nd.dentry,
- dentry, from, info);
- path_release(&nd);
- EXIT;
- exit_lock:
- up(&nd.dentry->d_inode->i_sem);
- dput(dentry);
- exit_to:
- putname(to);
- exit_from:
- putname(from);
- exit:
- unlock_kernel();
- return error;
-}
-
-int presto_do_mkdir(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, int mode,
- struct lento_vfs_context *info)
-{
- struct rec_info rec;
- int error;
- struct presto_version tgt_dir_ver, new_dir_ver;
- void *handle;
-
- ENTRY;
- // down(&dir->d_inode->i_zombie);
-
- /* one journal record + directory block + room for removals*/
- error = presto_reserve_space(fset->fset_cache, PRESTO_REQHIGH + 4096);
- if (error) {
- EXIT;
- // up(&dir->d_inode->i_zombie);
- return error;
- }
-
- error = may_create(dir->d_inode, dentry);
- if (error) {
- EXIT;
- goto exit_lock;
- }
-
- error = -EPERM;
- if (!filter_c2cdiops(fset->fset_cache->cache_filter)->mkdir) {
- EXIT;
- goto exit_lock;
- }
-
- error = -ENOSPC;
- presto_getversion(&tgt_dir_ver, dir->d_inode);
- handle = presto_trans_start(fset, dir->d_inode, KML_OPCODE_MKDIR);
- if ( IS_ERR(handle) ) {
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH + 4096);
- CERROR("presto_do_mkdir: no space for transaction\n");
- goto exit_lock;
- }
-
- DQUOT_INIT(dir->d_inode);
- mode &= (S_IRWXUGO|S_ISVTX);
- lock_kernel();
- error = filter_c2cdiops(fset->fset_cache->cache_filter)->mkdir(dir->d_inode, dentry, mode);
- if (error) {
- EXIT;
- goto exit;
- }
-
- if ( dentry->d_inode && !error) {
- struct presto_cache *cache = fset->fset_cache;
-
- presto_set_ops(dentry->d_inode, cache->cache_filter);
-
- filter_setup_dentry_ops(cache->cache_filter,
- dentry->d_op,
- &presto_dentry_ops);
- dentry->d_op = filter_c2udops(cache->cache_filter);
- /* if Lento does this, we won't have data */
- if ( ISLENTO(presto_c2m(cache)) ) {
- presto_set(dentry, PRESTO_ATTR);
- } else {
- presto_set(dentry, PRESTO_ATTR | PRESTO_DATA);
- }
- }
-
- info->flags |= LENTO_FL_TOUCH_PARENT;
- error = presto_settime(fset, NULL, dir, dentry,
- info, ATTR_CTIME | ATTR_MTIME);
- if (error) {
- EXIT;
- goto exit;
- }
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_MKDIR | 0x10);
- presto_getversion(&new_dir_ver, dentry->d_inode);
- if ( presto_do_kml(info, dir) )
- error = presto_journal_mkdir(&rec, fset, dentry, &tgt_dir_ver,
- &new_dir_ver,
- dentry->d_inode->i_mode);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_MKDIR | 0x20);
- if ( presto_do_rcvd(info, dentry) )
- error = presto_write_last_rcvd(&rec, fset, info);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_MKDIR | 0x30);
- EXIT;
-exit:
- unlock_kernel();
- presto_trans_commit(fset, handle);
- exit_lock:
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH + 4096);
- // up(&dir->d_inode->i_zombie);
- return error;
-}
-
-/*
- * Look out: this function may change a normal dentry
- * into a directory dentry (different size)..
- */
-int lento_mkdir(const char *name, int mode, struct lento_vfs_context *info)
-{
- int error;
- char *pathname;
- struct dentry *dentry;
- struct presto_file_set *fset;
- struct nameidata nd;
-
- ENTRY;
- CDEBUG(D_PIOCTL, "name: %s, mode %o, offset %d, recno %d, flags %x\n",
- name, mode, info->slot_offset, info->recno, info->flags);
- pathname = getname(name);
- error = PTR_ERR(pathname);
- if (IS_ERR(pathname)) {
- EXIT;
- return error;
- }
-
- error = path_lookup(pathname, LOOKUP_PARENT, &nd);
- if (error)
- goto out_name;
-
- dentry = lookup_create(&nd, 1);
- error = PTR_ERR(dentry);
- if (!IS_ERR(dentry)) {
- fset = presto_fset(dentry);
- error = -EINVAL;
- if (!fset) {
- CERROR("No fileset!\n");
- EXIT;
- goto out_dput;
- }
-
- error = presto_do_mkdir(fset, nd.dentry, dentry,
- mode & S_IALLUGO, info);
-out_dput:
- dput(dentry);
- }
- up(&nd.dentry->d_inode->i_sem);
- path_release(&nd);
-out_name:
- EXIT;
- putname(pathname);
- CDEBUG(D_PIOCTL, "error: %d\n", error);
- return error;
-}
-
-static void d_unhash(struct dentry *dentry)
-{
- dget(dentry);
- switch (atomic_read(&dentry->d_count)) {
- default:
- shrink_dcache_parent(dentry);
- if (atomic_read(&dentry->d_count) != 2)
- break;
- case 2:
- d_drop(dentry);
- }
-}
-
-int presto_do_rmdir(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, struct lento_vfs_context *info)
-{
- struct rec_info rec;
- int error;
- struct presto_version tgt_dir_ver, old_dir_ver;
- struct izo_rollback_data rb;
- struct inode_operations *iops;
- void *handle;
- int do_kml, do_rcvd;
- int size;
-
- ENTRY;
- error = may_delete(dir->d_inode, dentry, 1);
- if (error)
- return error;
-
- error = -EPERM;
- iops = filter_c2cdiops(fset->fset_cache->cache_filter);
- if (!iops->rmdir) {
- EXIT;
- return error;
- }
-
- size = PRESTO_REQHIGH - dentry->d_inode->i_size;
- error = presto_reserve_space(fset->fset_cache, size);
- if (error) {
- EXIT;
- return error;
- }
-
- presto_getversion(&tgt_dir_ver, dir->d_inode);
- presto_getversion(&old_dir_ver, dentry->d_inode);
- izo_get_rollback_data(dentry->d_inode, &rb);
- handle = presto_trans_start(fset, dir->d_inode, KML_OPCODE_RMDIR);
- if ( IS_ERR(handle) ) {
- presto_release_space(fset->fset_cache, size);
- CERROR("ERROR: presto_do_rmdir: no space for transaction. Tell Peter.\n");
- return -ENOSPC;
- }
-
- DQUOT_INIT(dir->d_inode);
-
- do_kml = presto_do_kml(info, dir);
- do_rcvd = presto_do_rcvd(info, dir);
-
- // double_down(&dir->d_inode->i_zombie, &dentry->d_inode->i_zombie);
- d_unhash(dentry);
- if (IS_DEADDIR(dir->d_inode))
- error = -ENOENT;
- else if (d_mountpoint(dentry)) {
- CERROR("foo: d_mountpoint(dentry): ino %ld\n",
- dentry->d_inode->i_ino);
- error = -EBUSY;
- } else {
- lock_kernel();
- error = iops->rmdir(dir->d_inode, dentry);
- unlock_kernel();
- if (!error) {
- dentry->d_inode->i_flags |= S_DEAD;
- error = presto_settime(fset, NULL, NULL, dir, info,
- ATTR_CTIME | ATTR_MTIME);
- }
- }
- // double_up(&dir->d_inode->i_zombie, &dentry->d_inode->i_zombie);
- if (!error)
- d_delete(dentry);
- dput(dentry);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_RMDIR | 0x10);
- if ( !error && do_kml )
- error = presto_journal_rmdir(&rec, fset, dir, &tgt_dir_ver,
- &old_dir_ver, &rb,
- dentry->d_name.len,
- dentry->d_name.name);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_RMDIR | 0x20);
- if ( !error && do_rcvd )
- error = presto_write_last_rcvd(&rec, fset, info);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_RMDIR | 0x30);
- EXIT;
-
- presto_trans_commit(fset, handle);
- presto_release_space(fset->fset_cache, size);
- return error;
-}
-
-int lento_rmdir(const char *pathname, struct lento_vfs_context *info)
-{
- int error = 0;
- char * name;
- struct dentry *dentry;
- struct presto_file_set *fset;
- struct nameidata nd;
-
- ENTRY;
- name = getname(pathname);
- if(IS_ERR(name)) {
- EXIT;
- return PTR_ERR(name);
- }
-
- error = path_lookup(name, LOOKUP_PARENT, &nd);
- if (error) {
- EXIT;
- goto exit;
- }
- switch(nd.last_type) {
- case LAST_DOTDOT:
- error = -ENOTEMPTY;
- EXIT;
- goto exit1;
- case LAST_ROOT:
- case LAST_DOT:
- error = -EBUSY;
- EXIT;
- goto exit1;
- }
- down(&nd.dentry->d_inode->i_sem);
- dentry = lookup_hash(&nd.last, nd.dentry);
- error = PTR_ERR(dentry);
- if (!IS_ERR(dentry)) {
- fset = presto_fset(dentry);
- error = -EINVAL;
- if ( !fset ) {
- CERROR("No fileset!\n");
- EXIT;
- goto exit_put;
- }
- error = presto_do_rmdir(fset, nd.dentry, dentry, info);
- exit_put:
- dput(dentry);
- }
- up(&nd.dentry->d_inode->i_sem);
-exit1:
- path_release(&nd);
-exit:
- putname(name);
- EXIT;
- return error;
-}
-
-int presto_do_mknod(struct presto_file_set *fset, struct dentry *dir,
- struct dentry *dentry, int mode, dev_t dev,
- struct lento_vfs_context *info)
-{
- struct rec_info rec;
- int error = -EPERM;
- struct presto_version tgt_dir_ver, new_node_ver;
- struct inode_operations *iops;
- void *handle;
-
- ENTRY;
-
- // down(&dir->d_inode->i_zombie);
- /* one KML entry */
- error = presto_reserve_space(fset->fset_cache, PRESTO_REQHIGH);
- if (error) {
- EXIT;
- // up(&dir->d_inode->i_zombie);
- return error;
- }
-
- if ((S_ISCHR(mode) || S_ISBLK(mode)) && !capable(CAP_MKNOD)) {
- EXIT;
- goto exit_lock;
- }
-
- error = may_create(dir->d_inode, dentry);
- if (error) {
- EXIT;
- goto exit_lock;
- }
-
- error = -EPERM;
- iops = filter_c2cdiops(fset->fset_cache->cache_filter);
- if (!iops->mknod) {
- EXIT;
- goto exit_lock;
- }
-
- DQUOT_INIT(dir->d_inode);
- lock_kernel();
-
- error = -ENOSPC;
- presto_getversion(&tgt_dir_ver, dir->d_inode);
- handle = presto_trans_start(fset, dir->d_inode, KML_OPCODE_MKNOD);
- if ( IS_ERR(handle) ) {
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH);
- CERROR("presto_do_mknod: no space for transaction\n");
- goto exit_lock2;
- }
-
- error = iops->mknod(dir->d_inode, dentry, mode, dev);
- if (error) {
- EXIT;
- goto exit_commit;
- }
- if ( dentry->d_inode) {
- struct presto_cache *cache = fset->fset_cache;
-
- presto_set_ops(dentry->d_inode, cache->cache_filter);
-
- filter_setup_dentry_ops(cache->cache_filter, dentry->d_op,
- &presto_dentry_ops);
- dentry->d_op = filter_c2udops(cache->cache_filter);
-
- /* if Lento does this, we won't have data */
- if ( ISLENTO(presto_c2m(cache)) ) {
- presto_set(dentry, PRESTO_ATTR);
- } else {
- presto_set(dentry, PRESTO_ATTR | PRESTO_DATA);
- }
- }
-
- error = presto_settime(fset, NULL, NULL, dir,
- info, ATTR_MTIME);
- if (error) {
- EXIT;
- }
- error = presto_settime(fset, NULL, NULL, dentry,
- info, ATTR_CTIME | ATTR_MTIME);
- if (error) {
- EXIT;
- }
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_MKNOD | 0x10);
- presto_getversion(&new_node_ver, dentry->d_inode);
- if ( presto_do_kml(info, dentry) )
- error = presto_journal_mknod(&rec, fset, dentry, &tgt_dir_ver,
- &new_node_ver,
- dentry->d_inode->i_mode,
- MAJOR(dev), MINOR(dev) );
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_MKNOD | 0x20);
- if ( presto_do_rcvd(info, dentry) )
- error = presto_write_last_rcvd(&rec, fset, info);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_MKNOD | 0x30);
- EXIT;
- exit_commit:
- presto_trans_commit(fset, handle);
- exit_lock2:
- unlock_kernel();
- exit_lock:
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH);
- // up(&dir->d_inode->i_zombie);
- return error;
-}
-
-int lento_mknod(const char *filename, int mode, dev_t dev,
- struct lento_vfs_context *info)
-{
- int error = 0;
- char * tmp;
- struct dentry * dentry;
- struct nameidata nd;
- struct presto_file_set *fset;
-
- ENTRY;
-
- if (S_ISDIR(mode))
- return -EPERM;
- tmp = getname(filename);
- if (IS_ERR(tmp))
- return PTR_ERR(tmp);
-
- error = path_lookup(tmp, LOOKUP_PARENT, &nd);
- if (error)
- goto out;
- dentry = lookup_create(&nd, 0);
- error = PTR_ERR(dentry);
- if (!IS_ERR(dentry)) {
- fset = presto_fset(dentry);
- error = -EINVAL;
- if ( !fset ) {
- CERROR("No fileset!\n");
- EXIT;
- goto exit_put;
- }
- switch (mode & S_IFMT) {
- case 0: case S_IFREG:
- error = -EOPNOTSUPP;
- break;
- case S_IFCHR: case S_IFBLK: case S_IFIFO: case S_IFSOCK:
- error = presto_do_mknod(fset, nd.dentry, dentry,
- mode, dev, info);
- break;
- case S_IFDIR:
- error = -EPERM;
- break;
- default:
- error = -EINVAL;
- }
- exit_put:
- dput(dentry);
- }
- up(&nd.dentry->d_inode->i_sem);
- path_release(&nd);
-out:
- putname(tmp);
-
- return error;
-}
-
-int do_rename(struct presto_file_set *fset,
- struct dentry *old_parent, struct dentry *old_dentry,
- struct dentry *new_parent, struct dentry *new_dentry,
- struct lento_vfs_context *info)
-{
- struct rec_info rec;
- int error;
- struct inode_operations *iops;
- struct presto_version src_dir_ver, tgt_dir_ver;
- void *handle;
- int new_inode_unlink = 0;
- struct inode *old_dir = old_parent->d_inode;
- struct inode *new_dir = new_parent->d_inode;
-
- ENTRY;
- presto_getversion(&src_dir_ver, old_dir);
- presto_getversion(&tgt_dir_ver, new_dir);
-
- error = -EPERM;
- iops = filter_c2cdiops(fset->fset_cache->cache_filter);
- if (!iops || !iops->rename) {
- EXIT;
- return error;
- }
-
- error = presto_reserve_space(fset->fset_cache, PRESTO_REQHIGH);
- if (error) {
- EXIT;
- return error;
- }
- handle = presto_trans_start(fset, old_dir, KML_OPCODE_RENAME);
- if ( IS_ERR(handle) ) {
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH);
- CERROR("presto_do_rename: no space for transaction\n");
- return -ENOSPC;
- }
- if (new_dentry->d_inode && new_dentry->d_inode->i_nlink > 1) {
- dget(new_dentry);
- new_inode_unlink = 1;
- }
-
- error = iops->rename(old_dir, old_dentry, new_dir, new_dentry);
-
- if (error) {
- EXIT;
- goto exit;
- }
-
- if (new_inode_unlink) {
- error = presto_settime(fset, NULL, NULL, old_dentry,
- info, ATTR_CTIME);
- dput(old_dentry);
- if (error) {
- EXIT;
- goto exit;
- }
- }
- info->flags |= LENTO_FL_TOUCH_PARENT;
- error = presto_settime(fset, NULL, new_parent, old_parent,
- info, ATTR_CTIME | ATTR_MTIME);
- if (error) {
- EXIT;
- goto exit;
- }
-
- /* XXX make a distinction between cross file set
- * and intra file set renames here
- */
- presto_debug_fail_blkdev(fset, KML_OPCODE_RENAME | 0x10);
- if ( presto_do_kml(info, old_dentry) )
- error = presto_journal_rename(&rec, fset, old_dentry,
- new_dentry,
- &src_dir_ver, &tgt_dir_ver);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_RENAME | 0x20);
-
- if ( presto_do_rcvd(info, old_dentry) )
- error = presto_write_last_rcvd(&rec, fset, info);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_RENAME | 0x30);
- EXIT;
-exit:
- presto_trans_commit(fset, handle);
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH);
- return error;
-}
-
-static
-int presto_rename_dir(struct presto_file_set *fset, struct dentry *old_parent,
- struct dentry *old_dentry, struct dentry *new_parent,
- struct dentry *new_dentry, struct lento_vfs_context *info)
-{
- int error;
- struct inode *target;
- struct inode *old_dir = old_parent->d_inode;
- struct inode *new_dir = new_parent->d_inode;
-
- if (old_dentry->d_inode == new_dentry->d_inode)
- return 0;
-
- error = may_delete(old_dir, old_dentry, 1);
- if (error)
- return error;
-
- if (new_dir->i_sb != old_dir->i_sb)
- return -EXDEV;
-
- if (!new_dentry->d_inode)
- error = may_create(new_dir, new_dentry);
- else
- error = may_delete(new_dir, new_dentry, 1);
- if (error)
- return error;
-
- if (!old_dir->i_op || !old_dir->i_op->rename)
- return -EPERM;
-
- /*
- * If we are going to change the parent - check write permissions,
- * we'll need to flip '..'.
- */
- if (new_dir != old_dir) {
- error = permission(old_dentry->d_inode, MAY_WRITE, NULL);
- }
- if (error)
- return error;
-
- DQUOT_INIT(old_dir);
- DQUOT_INIT(new_dir);
- down(&old_dir->i_sb->s_vfs_rename_sem);
- error = -EINVAL;
- if (is_subdir(new_dentry, old_dentry))
- goto out_unlock;
- target = new_dentry->d_inode;
- if (target) { /* Hastur! Hastur! Hastur! */
- // triple_down(&old_dir->i_zombie,
- // &new_dir->i_zombie,
- // &target->i_zombie);
- d_unhash(new_dentry);
- } else
- // double_down(&old_dir->i_zombie,
- // &new_dir->i_zombie);
- if (IS_DEADDIR(old_dir)||IS_DEADDIR(new_dir))
- error = -ENOENT;
- else if (d_mountpoint(old_dentry)||d_mountpoint(new_dentry))
- error = -EBUSY;
- else
- error = do_rename(fset, old_parent, old_dentry,
- new_parent, new_dentry, info);
- if (target) {
- if (!error)
- target->i_flags |= S_DEAD;
- // triple_up(&old_dir->i_zombie,
- // &new_dir->i_zombie,
- // &target->i_zombie);
- if (d_unhashed(new_dentry))
- d_rehash(new_dentry);
- dput(new_dentry);
- } else
- // double_up(&old_dir->i_zombie,
- // &new_dir->i_zombie);
-
- if (!error)
- d_move(old_dentry,new_dentry);
-out_unlock:
- up(&old_dir->i_sb->s_vfs_rename_sem);
- return error;
-}
-
-static
-int presto_rename_other(struct presto_file_set *fset, struct dentry *old_parent,
- struct dentry *old_dentry, struct dentry *new_parent,
- struct dentry *new_dentry, struct lento_vfs_context *info)
-{
- struct inode *old_dir = old_parent->d_inode;
- struct inode *new_dir = new_parent->d_inode;
- int error;
-
- if (old_dentry->d_inode == new_dentry->d_inode)
- return 0;
-
- error = may_delete(old_dir, old_dentry, 0);
- if (error)
- return error;
-
- if (new_dir->i_sb != old_dir->i_sb)
- return -EXDEV;
-
- if (!new_dentry->d_inode)
- error = may_create(new_dir, new_dentry);
- else
- error = may_delete(new_dir, new_dentry, 0);
- if (error)
- return error;
-
- if (!old_dir->i_op || !old_dir->i_op->rename)
- return -EPERM;
-
- DQUOT_INIT(old_dir);
- DQUOT_INIT(new_dir);
- // double_down(&old_dir->i_zombie, &new_dir->i_zombie);
- if (d_mountpoint(old_dentry)||d_mountpoint(new_dentry))
- error = -EBUSY;
- else
- error = do_rename(fset, old_parent, old_dentry,
- new_parent, new_dentry, info);
- // double_up(&old_dir->i_zombie, &new_dir->i_zombie);
- if (error)
- return error;
- /* The following d_move() should become unconditional */
- if (!(old_dir->i_sb->s_type->fs_flags & FS_ODD_RENAME)) {
- d_move(old_dentry, new_dentry);
- }
- return 0;
-}
-
-int presto_do_rename(struct presto_file_set *fset,
- struct dentry *old_parent, struct dentry *old_dentry,
- struct dentry *new_parent, struct dentry *new_dentry,
- struct lento_vfs_context *info)
-{
- if (S_ISDIR(old_dentry->d_inode->i_mode))
- return presto_rename_dir(fset, old_parent,old_dentry,new_parent,
- new_dentry, info);
- else
- return presto_rename_other(fset, old_parent, old_dentry,
- new_parent,new_dentry, info);
-}
-
-
-int lento_do_rename(const char *oldname, const char *newname,
- struct lento_vfs_context *info)
-{
- int error = 0;
- struct dentry * old_dir, * new_dir;
- struct dentry * old_dentry, *new_dentry;
- struct nameidata oldnd, newnd;
- struct presto_file_set *fset;
-
- ENTRY;
-
- error = path_lookup(oldname, LOOKUP_PARENT, &oldnd);
- if (error)
- goto exit;
-
- error = path_lookup(newname, LOOKUP_PARENT, &newnd);
- if (error)
- goto exit1;
-
- error = -EXDEV;
- if (oldnd.mnt != newnd.mnt)
- goto exit2;
-
- old_dir = oldnd.dentry;
- error = -EBUSY;
- if (oldnd.last_type != LAST_NORM)
- goto exit2;
-
- new_dir = newnd.dentry;
- if (newnd.last_type != LAST_NORM)
- goto exit2;
-
- lock_rename(new_dir, old_dir);
-
- old_dentry = lookup_hash(&oldnd.last, old_dir);
- error = PTR_ERR(old_dentry);
- if (IS_ERR(old_dentry))
- goto exit3;
- /* source must exist */
- error = -ENOENT;
- if (!old_dentry->d_inode)
- goto exit4;
- fset = presto_fset(old_dentry);
- error = -EINVAL;
- if ( !fset ) {
- CERROR("No fileset!\n");
- EXIT;
- goto exit4;
- }
- /* unless the source is a directory trailing slashes give -ENOTDIR */
- if (!S_ISDIR(old_dentry->d_inode->i_mode)) {
- error = -ENOTDIR;
- if (oldnd.last.name[oldnd.last.len])
- goto exit4;
- if (newnd.last.name[newnd.last.len])
- goto exit4;
- }
- new_dentry = lookup_hash(&newnd.last, new_dir);
- error = PTR_ERR(new_dentry);
- if (IS_ERR(new_dentry))
- goto exit4;
-
- lock_kernel();
- error = presto_do_rename(fset, old_dir, old_dentry,
- new_dir, new_dentry, info);
- unlock_kernel();
-
- dput(new_dentry);
-exit4:
- dput(old_dentry);
-exit3:
- unlock_rename(new_dir, old_dir);
-exit2:
- path_release(&newnd);
-exit1:
- path_release(&oldnd);
-exit:
- return error;
-}
-
-int lento_rename(const char * oldname, const char * newname,
- struct lento_vfs_context *info)
-{
- int error;
- char * from;
- char * to;
-
- from = getname(oldname);
- if(IS_ERR(from))
- return PTR_ERR(from);
- to = getname(newname);
- error = PTR_ERR(to);
- if (!IS_ERR(to)) {
- error = lento_do_rename(from,to, info);
- putname(to);
- }
- putname(from);
- return error;
-}
-
-struct dentry *presto_iopen(struct dentry *dentry,
- ino_t ino, unsigned int generation)
-{
- struct presto_file_set *fset;
- char name[48];
- int error;
-
- ENTRY;
- /* see if we already have the dentry we want */
- if (dentry->d_inode && dentry->d_inode->i_ino == ino &&
- dentry->d_inode->i_generation == generation) {
- EXIT;
- return dentry;
- }
-
- /* Make sure we have a cache beneath us. We should always find at
- * least one dentry inside the cache (if it exists), otherwise not
- * even the cache root exists, or we passed in a bad name.
- */
- fset = presto_fset(dentry);
- error = -EINVAL;
- if (!fset) {
- CERROR("No fileset for %*s!\n",
- dentry->d_name.len, dentry->d_name.name);
- EXIT;
- dput(dentry);
- return ERR_PTR(error);
- }
- dput(dentry);
-
- sprintf(name, "%s%#lx%c%#x",
- PRESTO_ILOOKUP_MAGIC, ino, PRESTO_ILOOKUP_SEP, generation);
- CDEBUG(D_PIOCTL, "opening %ld by number (as %s)\n", ino, name);
- return lookup_one_len(name, fset->fset_dentry, strlen(name));
-}
-
-static struct file *presto_filp_dopen(struct dentry *dentry, int flags)
-{
- struct file *f;
- struct inode *inode;
- int flag, error;
-
- ENTRY;
- error = -ENFILE;
- f = get_empty_filp();
- if (!f) {
- CDEBUG(D_PIOCTL, "error getting file pointer\n");
- EXIT;
- goto out;
- }
- f->f_flags = flag = flags;
- f->f_mode = (flag+1) & O_ACCMODE;
- inode = dentry->d_inode;
- if (f->f_mode & FMODE_WRITE) {
- error = get_write_access(inode);
- if (error) {
- CDEBUG(D_PIOCTL, "error getting write access\n");
- EXIT; goto cleanup_file;
- }
- }
-
- /* XXX: where the fuck is ->f_vfsmnt? */
- f->f_dentry = dentry;
- f->f_mapping = dentry->d_inode->i_mapping;
- f->f_pos = 0;
- //f->f_reada = 0;
- f->f_op = NULL;
- if (inode->i_op)
- /* XXX should we set to presto ops, or leave at cache ops? */
- f->f_op = inode->i_fop;
- if (f->f_op && f->f_op->open) {
- error = f->f_op->open(inode, f);
- if (error) {
- CDEBUG(D_PIOCTL, "error calling cache 'open'\n");
- EXIT;
- goto cleanup_all;
- }
- }
- f->f_flags &= ~(O_CREAT | O_EXCL | O_NOCTTY | O_TRUNC);
-
- return f;
-
-cleanup_all:
- if (f->f_mode & FMODE_WRITE)
- put_write_access(inode);
-cleanup_file:
- put_filp(f);
-out:
- return ERR_PTR(error);
-}
-
-
-/* Open an inode by number. We pass in the cache root name (or a subdirectory
- * from the cache that is guaranteed to exist) to be able to access the cache.
- */
-int lento_iopen(const char *name, ino_t ino, unsigned int generation,
- int flags)
-{
- char * tmp;
- struct dentry *dentry;
- struct nameidata nd;
- int fd;
- int error;
-
- ENTRY;
- CDEBUG(D_PIOCTL,
- "open %s:inode %#lx (%ld), generation %x (%d), flags %d \n",
- name, ino, ino, generation, generation, flags);
- /* We don't allow creation of files by number only, as it would
- * lead to a dangling files not in any directory. We could also
- * just turn off the flag and ignore it.
- */
- if (flags & O_CREAT) {
- CERROR("%s: create file by inode number (%ld) not allowed\n",
- __FUNCTION__, ino);
- EXIT;
- return -EACCES;
- }
-
- tmp = getname(name);
- if (IS_ERR(tmp)) {
- EXIT;
- return PTR_ERR(tmp);
- }
-
- lock_kernel();
-again: /* look the named file or a parent directory so we can get the cache */
- error = presto_walk(tmp, &nd);
- if ( error && error != -ENOENT ) {
- EXIT;
- unlock_kernel();
- putname(tmp);
- return error;
- }
- if (error == -ENOENT)
- dentry = NULL;
- else
- dentry = nd.dentry;
-
- /* we didn't find the named file, so see if a parent exists */
- if (!dentry) {
- char *slash;
-
- slash = strrchr(tmp, '/');
- if (slash && slash != tmp) {
- *slash = '\0';
- path_release(&nd);
- goto again;
- }
- /* we should never get here... */
- CDEBUG(D_PIOCTL, "no more path components to try!\n");
- fd = -ENOENT;
- goto exit;
- }
- CDEBUG(D_PIOCTL, "returned dentry %p\n", dentry);
-
- dentry = presto_iopen(dentry, ino, generation);
- fd = PTR_ERR(dentry);
- if (IS_ERR(dentry)) {
- EXIT;
- goto exit;
- }
-
- /* XXX start of code that might be replaced by something like:
- * if (flags & (O_WRONLY | O_RDWR)) {
- * error = get_write_access(dentry->d_inode);
- * if (error) {
- * EXIT;
- * goto cleanup_dput;
- * }
- * }
- * fd = open_dentry(dentry, flags);
- *
- * including the presto_filp_dopen() function (check dget counts!)
- */
- fd = get_unused_fd();
- if (fd < 0) {
- EXIT;
- goto exit;
- }
-
- {
- int error;
- struct file * f = presto_filp_dopen(dentry, flags);
- error = PTR_ERR(f);
- if (IS_ERR(f)) {
- put_unused_fd(fd);
- fd = error;
- } else {
- fd_install(fd, f);
- }
- }
- /* end of code that might be replaced by open_dentry */
-
- EXIT;
-exit:
- unlock_kernel();
- path_release(&nd);
- putname(tmp);
- return fd;
-}
-
-#ifdef CONFIG_FS_EXT_ATTR
-
-#if 0 /* was a broken check for Posix ACLs */
-/* Posix ACL code changes i_mode without using a notify_change (or
- * a mark_inode_dirty!). We need to duplicate this at the reintegrator
- * which is done by this function. This function also takes care of
- * resetting the cached posix acls in this inode. If we don't reset these
- * VFS continues using the old acl information, which by now may be out of
- * date.
- */
-int presto_setmode(struct presto_file_set *fset, struct dentry *dentry,
- mode_t mode)
-{
- struct inode *inode = dentry->d_inode;
-
- ENTRY;
- /* The extended attributes for this inode were modified.
- * At this point we can not be sure if any of the ACL
- * information for this inode was updated. So we will
- * force VFS to reread the acls. Note that we do this
- * only when called from the SETEXTATTR ioctl, which is why we
- * do this while setting the mode of the file. Also note
- * that mark_inode_dirty is not be needed for i_*acl only
- * to force i_mode info to disk, and should be removed once
- * we use notify_change to update the mode.
- * XXX: is mode setting really needed? Just setting acl's should
- * be enough! VFS should change the i_mode as needed? SHP
- */
- if (inode->i_acl &&
- inode->i_acl != POSIX_ACL_NOT_CACHED)
- posix_acl_release(inode->i_acl);
- if (inode->i_default_acl &&
- inode->i_default_acl != POSIX_ACL_NOT_CACHED)
- posix_acl_release(inode->i_default_acl);
- inode->i_acl = POSIX_ACL_NOT_CACHED;
- inode->i_default_acl = POSIX_ACL_NOT_CACHED;
- inode->i_mode = mode;
- /* inode should already be dirty...but just in case */
- mark_inode_dirty(inode);
- return 0;
-
-#if 0
- /* XXX: The following code is the preferred way to set mode,
- * however, I need to carefully go through possible recursion
- * paths back into presto. See comments in presto_do_setattr.
- */
- {
- int error=0;
- struct super_operations *sops;
- struct iattr iattr;
-
- iattr.ia_mode = mode;
- iattr.ia_valid = ATTR_MODE|ATTR_FORCE;
-
- error = -EPERM;
- sops = filter_c2csops(fset->fset_cache->cache_filter);
- if (!sops &&
- !sops->notify_change) {
- EXIT;
- return error;
- }
-
- error = sops->notify_change(dentry, &iattr);
-
- EXIT;
- return error;
- }
-#endif
-}
-#endif
-
-/* setextattr Interface to cache filesystem */
-int presto_do_set_ext_attr(struct presto_file_set *fset,
- struct dentry *dentry,
- const char *name, void *buffer,
- size_t buffer_len, int flags, mode_t *mode,
- struct lento_vfs_context *info)
-{
- struct rec_info rec;
- struct inode *inode = dentry->d_inode;
- struct inode_operations *iops;
- int error;
- struct presto_version ver;
- void *handle;
- char temp[PRESTO_EXT_ATTR_NAME_MAX+1];
-
- ENTRY;
- error = -EROFS;
- if (IS_RDONLY(inode)) {
- EXIT;
- return -EROFS;
- }
-
- if (IS_IMMUTABLE(inode) || IS_APPEND(inode)) {
- EXIT;
- return -EPERM;
- }
-
- presto_getversion(&ver, inode);
- error = -EPERM;
- /* We need to invoke different filters based on whether
- * this dentry is a regular file, directory or symlink.
- */
- switch (inode->i_mode & S_IFMT) {
- case S_IFLNK: /* symlink */
- iops = filter_c2csiops(fset->fset_cache->cache_filter);
- break;
- case S_IFDIR: /* directory */
- iops = filter_c2cdiops(fset->fset_cache->cache_filter);
- break;
- case S_IFREG:
- default: /* everything else including regular files */
- iops = filter_c2cfiops(fset->fset_cache->cache_filter);
- }
-
- if (!iops && !iops->set_ext_attr) {
- EXIT;
- return error;
- }
-
- error = presto_reserve_space(fset->fset_cache, PRESTO_REQHIGH);
- if (error) {
- EXIT;
- return error;
- }
-
-
- handle = presto_trans_start(fset,dentry->d_inode,KML_OPCODE_SETEXTATTR);
- if ( IS_ERR(handle) ) {
- CERROR("presto_do_set_ext_attr: no space for transaction\n");
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH);
- return -ENOSPC;
- }
-
- /* We first "truncate" name to the maximum allowable in presto */
- /* This simulates the strncpy_from_use code in fs/ext_attr.c */
- strlcpy(temp,name,sizeof(temp));
-
- /* Pass down to cache*/
- error = iops->set_ext_attr(inode,temp,buffer,buffer_len,flags);
- if (error) {
- EXIT;
- goto exit;
- }
-
-#if 0 /* was a broken check for Posix ACLs */
- /* Reset mode if specified*/
- /* XXX: when we do native acl support, move this code out! */
- if (mode != NULL) {
- error = presto_setmode(fset, dentry, *mode);
- if (error) {
- EXIT;
- goto exit;
- }
- }
-#endif
-
- /* Reset ctime. Only inode change time (ctime) is affected */
- error = presto_settime(fset, NULL, NULL, dentry, info, ATTR_CTIME);
- if (error) {
- EXIT;
- goto exit;
- }
-
- if (flags & EXT_ATTR_FLAG_USER) {
- CERROR(" USER flag passed to presto_do_set_ext_attr!\n");
- BUG();
- }
-
- /* We are here, so set_ext_attr succeeded. We no longer need to keep
- * track of EXT_ATTR_FLAG_{EXISTS,CREATE}, instead, we will force
- * the attribute value during log replay. -SHP
- */
- flags &= ~(EXT_ATTR_FLAG_EXISTS | EXT_ATTR_FLAG_CREATE);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_SETEXTATTR | 0x10);
- if ( presto_do_kml(info, dentry) )
- error = presto_journal_set_ext_attr
- (&rec, fset, dentry, &ver, name, buffer,
- buffer_len, flags);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_SETEXTATTR | 0x20);
- if ( presto_do_rcvd(info, dentry) )
- error = presto_write_last_rcvd(&rec, fset, info);
-
- presto_debug_fail_blkdev(fset, KML_OPCODE_SETEXTATTR | 0x30);
- EXIT;
-exit:
- presto_release_space(fset->fset_cache, PRESTO_REQHIGH);
- presto_trans_commit(fset, handle);
-
- return error;
-}
-#endif
+++ /dev/null
-/*
- * Copyright (c) International Business Machines Corp., 2000-2001
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
- * the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef _H_JFS_DEFRAGFS
-#define _H_JFS_DEFRAGFS
-
-/*
- * defragfs parameter list
- */
-struct defragfs {
- uint flag; /* 4: */
- u8 dev; /* 1: */
- u8 pad[3]; /* 3: */
- s32 fileset; /* 4: */
- u32 inostamp; /* 4: */
- u32 ino; /* 4: */
- u32 gen; /* 4: */
- s64 xoff; /* 8: */
- s64 old_xaddr; /* 8: */
- s64 new_xaddr; /* 8: */
- s32 xlen; /* 4: */
-};
-
-/* plist flag */
-#define DEFRAGFS_SYNC 0x80000000
-#define DEFRAGFS_COMMIT 0x40000000
-#define DEFRAGFS_RELOCATE 0x10000000
-
-#define INODE_TYPE 0x0000F000 /* IFREG or IFDIR */
-
-#define EXTENT_TYPE 0x000000ff
-#define DTPAGE 0x00000001
-#define XTPAGE 0x00000002
-#define DATAEXT 0x00000004
-#define EAEXT 0x00000008
-
-#endif /* _H_JFS_DEFRAGFS */
+++ /dev/null
-/*
- * linux/fs/lockd/lockd_syms.c
- *
- * Symbols exported by the lockd module.
- *
- * Authors: Olaf Kirch (okir@monad.swb.de)
- *
- * Copyright (C) 1997 Olaf Kirch <okir@monad.swb.de>
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-
-#ifdef CONFIG_MODULES
-
-#include <linux/types.h>
-#include <linux/socket.h>
-#include <linux/time.h>
-#include <linux/uio.h>
-#include <linux/unistd.h>
-
-#include <linux/sunrpc/clnt.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/lockd/lockd.h>
-
-/* Start/stop the daemon */
-EXPORT_SYMBOL(lockd_up);
-EXPORT_SYMBOL(lockd_down);
-
-/* NFS client entry */
-EXPORT_SYMBOL(nlmclnt_proc);
-
-/* NFS server entry points/hooks */
-EXPORT_SYMBOL(nlmsvc_ops);
-
-#endif /* CONFIG_MODULES */
+++ /dev/null
-/*
- * NEC PC-9800 series partition supports
- *
- * Copyright (C) 1999 Kyoto University Microcomputer Club
- */
-
-#include <linux/config.h>
-#include <linux/fs.h>
-#include <linux/genhd.h>
-#include <linux/kernel.h>
-#include <linux/hdreg.h>
-
-#include "check.h"
-#include "nec98.h"
-
-struct nec98_partition {
- __u8 mid; /* 0x80 - active */
- __u8 sid; /* 0x80 - bootable */
- __u16 pad1; /* dummy for padding */
- __u8 ipl_sector; /* IPL sector */
- __u8 ipl_head; /* IPL head */
- __u16 ipl_cyl; /* IPL cylinder */
- __u8 sector; /* starting sector */
- __u8 head; /* starting head */
- __u16 cyl; /* starting cylinder */
- __u8 end_sector; /* end sector */
- __u8 end_head; /* end head */
- __u16 end_cyl; /* end cylinder */
- unsigned char name[16];
-} __attribute__((__packed__));
-
-#define NEC98_BSD_PARTITION_MID 0x14
-#define NEC98_BSD_PARTITION_SID 0x44
-#define MID_SID_16(mid, sid) (((mid) & 0xFF) | (((sid) & 0xFF) << 8))
-#define NEC98_BSD_PARTITION_MID_SID \
- MID_SID_16(NEC98_BSD_PARTITION_MID, NEC98_BSD_PARTITION_SID)
-#define NEC98_VALID_PTABLE_ENTRY(P) \
- (!(P)->pad1 && (P)->cyl <= (P)->end_cyl)
-
-extern int pc98_bios_param(struct block_device *bdev, int *ip);
-
-static inline int
-is_valid_nec98_partition_table(const struct nec98_partition *ptable,
- __u8 nsectors, __u8 nheads)
-{
- int i;
- int valid = 0;
-
- for (i = 0; i < 16; i++) {
- if (!*(__u16 *)&ptable[i])
- continue; /* empty slot */
- if (ptable[i].pad1 /* `pad1' contains junk */
- || ptable[i].ipl_sector >= nsectors
- || ptable[i].sector >= nsectors
- || ptable[i].end_sector >= nsectors
- || ptable[i].ipl_head >= nheads
- || ptable[i].head >= nheads
- || ptable[i].end_head >= nheads
- || ptable[i].cyl > ptable[i].end_cyl)
- return 0;
- valid = 1; /* We have a valid partition. */
- }
- /* If no valid PC-9800-style partitions found,
- the disk may have other type of partition table. */
- return valid;
-}
-
-int nec98_partition(struct parsed_partitions *state, struct block_device *bdev)
-{
- unsigned int nr;
- struct hd_geometry geo;
- Sector sect;
- const struct nec98_partition *part;
- unsigned char *data;
- int sector_size = bdev_hardsect_size(bdev);
-
- if (ioctl_by_bdev(bdev, HDIO_GETGEO, (unsigned long)&geo) != 0) {
- printk(" unsupported disk (%s)\n", bdev->bd_disk->disk_name);
- return 0;
- }
-
-#ifdef NEC98_PARTITION_DEBUG
- printk("ioctl_by_bdev head=%d sect=%d\n", geo.heads, geo.sectors);
-#endif
- data = read_dev_sector(bdev, 0, §);
- if (!data) {
- if (warn_no_part)
- printk(" unable to read partition table\n");
- return -1;
- }
-
- /* magic(?) check */
- if (*(__u16 *)(data + sector_size - 2) != NEC98_PTABLE_MAGIC) {
- put_dev_sector(sect);
- return 0;
- }
-
- put_dev_sector(sect);
- data = read_dev_sector(bdev, 1, §);
- if (!data) {
- if (warn_no_part)
- printk(" unable to read partition table\n");
- return -1;
- }
-
- if (!is_valid_nec98_partition_table((struct nec98_partition *)data,
- geo.sectors, geo.heads)) {
-#ifdef NEC98_PARTITION_DEBUG
- if (warn_no_part)
- printk(" partition table consistency check failed"
- " (not PC-9800 disk?)\n");
-#endif
- put_dev_sector(sect);
- return 0;
- }
-
- part = (const struct nec98_partition *)data;
- for (nr = 0; nr < 16; nr++, part++) {
- unsigned int start_sect, end_sect;
-
- if (part->mid == 0 || part->sid == 0)
- continue;
-
- if (nr)
- printk(" ");
-
- { /* Print partition name. Fdisk98 might put NUL
- characters in partition name... */
-
- int j;
- unsigned char *p;
- unsigned char buf[sizeof (part->name) * 2 + 1];
-
- for (p = buf, j = 0; j < sizeof (part->name); j++, p++)
- if ((*p = part->name[j]) < ' ') {
- *p++ = '^';
- *p = part->name[j] + '@';
- }
-
- *p = 0;
- printk(" <%s>", buf);
- }
- start_sect = (part->cyl * geo.heads + part->head) * geo.sectors
- + part->sector;
- end_sect = (part->end_cyl + 1) * geo.heads * geo.sectors;
- if (end_sect <= start_sect) {
- printk(" (invalid partition info)\n");
- continue;
- }
-
- put_partition(state, nr + 1, start_sect, end_sect - start_sect);
-#ifdef CONFIG_BSD_DISKLABEL
- if ((*(__u16 *)&part->mid & 0x7F7F)
- == NEC98_BSD_PARTITION_MID_SID) {
- printk("!");
- /* NEC98_BSD_PARTITION_MID_SID is not valid SYSIND for
- IBM PC's MS-DOS partition table, so we simply pass
- it to bsd_disklabel_partition;
- it will just print `<bsd: ... >'. */
- parse_bsd(state, bdev, start_sect,
- end_sect - start_sect, nr + 1,
- "bsd98", BSD_MAXPARTITIONS);
- }
-#endif
- { /* Pretty size printing. */
- /* XXX sector size? */
- unsigned int psize = (end_sect - start_sect) / 2;
- int unit_char = 'K';
-
- if (psize > 99999) {
- psize >>= 10;
- unit_char = 'M';
- }
- printk(" %5d%cB (%5d-%5d)\n",
- psize, unit_char, part->cyl, part->end_cyl);
- }
- }
-
- put_dev_sector(sect);
-
- return nr ? 1 : 0;
-}
-\f
-/*
- * Local variables:
- * c-basic-offset: 8
- * End:
- */
+++ /dev/null
-/*
- * NEC PC-9800 series partition supports
- *
- * Copyright (C) 1998-2000 Kyoto University Microcomputer Club
- */
-
-#define NEC98_PTABLE_MAGIC 0xAA55
-
-extern int nec98_partition(struct parsed_partitions *state,
- struct block_device *bdev);
+++ /dev/null
-ChangeLog for smbfs.
-
-2002-04-19 John Newbigin <jn@it.swin.edu.au>
-
- * Implementation of CIFS Extensions for UNIX systems, including soft
- and hard links.
-
-2001-08-03 Urban Widmark <urban@teststation.com>
-
- * *.c: Unicode support
-
-2001-08-23 Jochen Dolze <dolze@epcnet.de>
-
- * proc.c: Correct rsize/wsize computation for readX/writeX
-
-2001-0?-?? Urban Widmark <urban@teststation.com>
-
- * *.c: Add LFS
- * *.c: Move to a "driver" style handling of different servertypes.
- (Not all operations are done this way. yet.)
-2001-12-31 René Scharfe <l.s.r@web.de>
-
- * inode.c: added smb_show_options to show mount options in /proc/mounts
- * inode.c, getopt.c, getopt.h: merged flag and has_arg in struct option
- * inode.c: use S_IRWXUGO where appropriate
-
-2001-12-22 Urban Widmark <urban@teststation.com>
-
- * file.c, proc.c: Fix problems triggered by the "fsx test"
-
-2001-09-17 Urban Widmark <urban@teststation.com>
-
- * proc.c: Use 4096 (was 512) as the blocksize for better write
- performance (patch originally by Jan Kratochvil)
- * proc.c: Skip disconnect smb, allows umount on unreachable servers.
- * proc.c: Go back to the interruptible sleep as reconnects seem to
- handle it now.
- * *.c: use autogenerated and private proto.h
-
-2000-11-22 Igor Zhbanov <bsg@uniyar.ac.ru>
-
- * proc.c: fixed date_unix2dos for dates earlier than 01/01/1980
- and date_dos2unix for date==0 (from 2.2)
-
-2001-07-13 Rob Radez <rob@osinvestor.com>
-
- * proc.c: make smb_errno return negative error values
-
-2001-07-09 Jochen Dolze <dolze@epcnet.de>
-
- * inode.c: smb_statfs always returned success.
- * proc.c, ioctl.c: Allow smbmount to signal failure to reconnect with
- a NULL argument to SMB_IOC_NEWCONN (speeds up error detection).
- * proc.c: Add some of the missing error codes to smb_errno
-
-2001-06-12 Urban Widmark <urban@teststation.com>
-
- * proc.c: replace the win95-flush fix with smb_seek, when needed.
- * proc.c: readdir 'lastname' bug (NetApp dir listing fix)
-
-2001-05-08 Urban Widmark <urban@teststation.com>
-
- * inode.c: Fix for changes on the server side not being detected
- properly. Must always drop cached pages when updating an inode with
- new size.
-
-2001-05-05 Urban Widmark <urban@teststation.com>
-
- * file.c, proc.c: Drop SMB_F_LOCALWRITE to detect changes made on
- both server and client, using flush with to force win9x to remember
- the right filesize.
-
-2001-04-25 René Scharfe <l.s.r@web.de>
-
- * inode.c: Don't clear s_flags and allow ro mounts
-
-2001-04-21 Urban Widmark <urban@teststation.com>
-
- * dir.c, proc.c: replace tests on conn_pid with tests on state to
- fix smbmount reconnect on smb_retry timeout and up the timeout to 30s.
- * proc.c: smb_newconn must have the server locked while updating it.
- * inode.c, proc.c: need flush after truncate on some servers (win9x)
- * file.c: add call to send SMBflush on fsync
- (as suggested by Jochen Dolze <dolze@epcnet.de>)
-
-2001-03-06 Urban Widmark <urban@teststation.com>
-
- * cache.c: d_add on hashed dentries corrupts d_hash list and
- causes loops in d_lookup. Inherited bug. :)
- * inode.c: tail -f fix for non-readonly opened files
- (related to the smb_proc_open change).
- * inode.c: tail -f fix for fast size changes with the same mtime.
-
-2001-03-02 Michael Kockelkorn <m.kockelkorn@biodata.com>
-
- * proc.c: fix smb_proc_open to allow open being called more than once
- with different modes (O_RDONLY -> O_WRONLY) without closing.
-
-2001-02-10 Urban Widmark <urban@teststation.com>
-
- * dir.c, cache.c: replace non-bigmem safe cache with cache code
- from ncpfs and fix some other bigmem bugs in smbfs.
- * inode.c: root dentry not properly initialized
- * proc.c, sock.c: adjust max parameters & max data to follow max_xmit
- lots of servers were having find_next trouble with this.
- * proc.c: use documented write method of truncating (NetApp fix)
-
-2000-08-14 Urban Widmark <urban@svenskatest.se>
-
- * dir.c: support case sensitive shares
- * inode.c: ascii mount options
- * proc.c: check length of paths to avoid buffer overflow
- * proc.c: don't do interruptable_sleep in smb_retry to avoid signal
- problem/race.
- * proc.c: O_RDONLY & smb_revalidate_inode fix (tail -f)
- * proc.c: add nls support
- * sock.c: attempt to fix smb_data_callback (avoid infinite loop)
-
-2000-07-25 Urban Widmark <urban@svenskatest.se>
-
- * proc.c: fix 3 places where bad server responses could cause an Oops.
-
-2000-07-15 Urban Widmark <urban@svenskatest.se>
-
- * *.c: more debug (%.*s) & indent fixes
-
-2000-06-24: Matt Maynard <matthewm@corel.com>
-
- * dir.c: dentry->d_inode->i_mtime isn't updated for all servers
- (NT?) and all operations (mv oldfile.txt newfile.txt) Removed for
- less efficient but better working directory cache.
- * proc.c: included aDIR smbclient fix for renaming directories on
- OS/2 servers (win95/98?) (orig by John Janosik)
-
-2000-07-01 Urban Widmark <urban@svenskatest.se>
-
- * *.c: replace ugly #ifdef's with less ugly debug macros.
-
-2000-01-03 Christian Groessler <cpg@aladdin.de>
-
- * proc.c: added posix semantics for unlink
-
-1999-11-16 Andrew Tridgell
-
- * proc.c: use level 260 for most conns, or level 1 for <NT1
- * proc.c: don't sleep every time with win95 on a FINDNEXT
- * proc.c: fixed loop_count bug
- * proc.c: got rid of resume_key
-
-[there are a few missing here :) ]
-
-1997-09-28 Riccardo Facchetti
-
- * proc.c: Fixed smb_d_path [now smb_build_path()] to be non-recursive
-
-1996-06-28 Yuri Per
-
- * proc.c: Fixed long file name support (smb_proc_readdir_long)
-
-You are in the wrong end for adding new entries. New entries at the top.
+++ /dev/null
-#
-# Makefile for the umsdos Unix-like filesystem routines.
-#
-
-obj-$(CONFIG_UMSDOS) += umsdos.o
-
-umsdos-objs := dir.o inode.o ioctl.o mangle.o namei.o rdir.o emd.o
-
-p:
- proto *.c >/usr/include/linux/umsdos_fs.p
-
-doc:
- nadoc -i -p umsdos.doc - /tmp/umsdos.mpg
+++ /dev/null
-Changes by Matija Nalis (mnalis@jagor.srce.hr) on umsdos dentry fixing
-(started by Peter T. Waltenberg <peterw@karaka.chch.cri.nz>)
-(Final conversion to dentries Bill Hawes <whawes@star.net>)
-
-There is no warning any more.
-Both read-only and read-write stuff is fixed, both in
-msdos-compatibile mode, and in umsdos EMD mode, and it seems stable.
-
-Userland NOTE: new umsdos_progs (umssync, umssetup, udosctl & friends) that
-will compile and work on 2.2.x+ kernels and glibc based systems, as well as
-kernel patches and other umsdos related information may be found at
-http://linux.voyager.hr/umsdos/
-
-Information below is getting outdated slowly -- I'll fix it one day when I
-get enough time - there are more important things to fix right now.
-
-Legend: those lines marked with '+' on the beggining of line indicates it
-passed all of my tests, and performed perfect in all of them.
-
-Current status (010125) - UMSDOS 0.86j:
-
-(1) pure MSDOS (no --linux-.--- EMD file):
-
-READ:
-+ readdir - works
-+ lookup - works
-+ read file - works
-
-WRITE:
-+ creat file - works
-+ unlink file - works
-+ write file - works
-+ rename file (same dir) - works
-+ rename file (dif. dir) - works
-+ rename dir (same dir) - works
-+ rename dir (dif. dir) - works
-+ mkdir - works
-+ rmdir - works
-
-
-(2) umsdos (with --linux-.--- EMD file):
-
-READ:
-+ readdir - works
-+ lookup - works
-+ permissions/owners stuff - works
-+ long file names - works
-+ read file - works
-+ switching MSDOS/UMSDOS - works
-+ switching UMSDOS/MSDOS - works
-- pseudo root things - works mostly. See notes below.
-+ resolve symlink - works
-+ dereference symlink - works
-+ dangling symlink - works
-+ hard links - works
-+ special files (block/char devices, FIFOs, sockets...) - works
-+ various umsdos ioctls - works
-
-
-WRITE:
-+ create symlink - works
-+ create hardlink - works
-+ create file - works
-+ create special file - works
-+ write to file - works
-+ rename file (same dir) - works
-+ rename file (dif. dir) - works
-+ rename hardlink (same dir) - works
-- rename hardlink (dif. dir) - works, but see notes below.
-+ rename symlink (same dir) - works
-+ rename symlink (dif. dir) - works
-+ rename dir (same dir) - works
-+ rename dir (dif. dir) - works
-+ unlink file - works
-+ notify_change (chown,perms) - works
-+ notify_change for hardlinks - works
-+ unlink hardlink - works
-+ mkdir - works
-+ rmdir - works
-+ umssyncing (many ioctls) - works
-
-
-- CVF-FAT stuff (compressed DOS filesystem) - there is some support from Frank
- Gockel <gockel@sent13.uni-duisburg.de> to use it even under umsdosfs, but I
- have no way of testing it -- please let me know if there are problems specific
- to umsdos (for instance, it works under msdosfs, but not under umsdosfs).
-
-
-Some current notes:
-
-Note: creating and using pseudo-hardlinks is always non-perfect, especially
-in filesystems that might be externally modified like umsdos. There is
-example is specs file about it. Specifically, moving directory which
-contains hardlinks will break them.
-
-Note: (about creating hardlinks in pseudoroot mode) - hardlinks created in
-pseudoroot mode are now again compatibile with 'normal' hardlinks, and vice
-versa. Thanks to Sorin Iordachescu <sorin@rodae.ro> for providing fix.
-See http://linux.voyager.hr/umsdos/hlbug.html for more info and upgrade
-procedure if you used broken versions...
-
-------------------------------------------------------------------------------
-
-Some general notes:
-
-Good idea when running development kernels is to have SysRq support compiled
-in kernel, and use Sync/Emergency-remount-RO if you bump into problems (like
-not being able to umount(2) umsdosfs, and because of it root partition also,
-or panics which force you to reboot etc.)
-
-I'm unfortunately somewhat out of time to read linux-kernel@vger, but I do
-check for messages having "UMSDOS" in the subject, and read them. I might
-miss some in all that volume, though. I should reply to any direct e-mail
-in few days. If I don't, probably I never got your message.
+++ /dev/null
-/*
- * linux/fs/umsdos/dir.c
- *
- * Written 1993 by Jacques Gelinas
- * Inspired from linux/fs/msdos/... : Werner Almesberger
- *
- * Extended MS-DOS directory handling functions
- */
-
-#include <linux/time.h>
-#include <linux/string.h>
-#include <linux/fs.h>
-#include <linux/msdos_fs.h>
-#include <linux/errno.h>
-#include <linux/stat.h>
-#include <linux/limits.h>
-#include <linux/umsdos_fs.h>
-#include <linux/slab.h>
-#include <linux/pagemap.h>
-#include <linux/smp_lock.h>
-
-#define UMSDOS_SPECIAL_DIRFPOS 3
-extern struct dentry *saved_root;
-extern struct inode *pseudo_root;
-
-/* #define UMSDOS_DEBUG_VERBOSE 1 */
-
-/*
- * Dentry operations routines
- */
-
-/* nothing for now ... */
-static int umsdos_dentry_validate(struct dentry *dentry, struct nameidata *nd)
-{
- return 1;
-}
-
-/* for now, drop everything to force lookups ... */
-/* ITYM s/everything/& positive/... */
-static int umsdos_dentry_dput(struct dentry *dentry)
-{
- struct inode *inode = dentry->d_inode;
- if (inode) {
- return 1;
- }
- return 0;
-}
-
-struct dentry_operations umsdos_dentry_operations =
-{
- .d_revalidate = umsdos_dentry_validate,
- .d_delete = umsdos_dentry_dput,
-};
-
-struct UMSDOS_DIR_ONCE {
- void *dirbuf;
- filldir_t filldir;
- int count;
- int stop;
-};
-
-/*
- * Record a single entry the first call.
- * Return -EINVAL the next one.
- * NOTE: filldir DOES NOT use a dentry
- */
-
-static int umsdos_dir_once ( void *buf,
- const char *name,
- int len,
- loff_t offset,
- ino_t ino,
- unsigned type)
-{
- int ret = -EINVAL;
- struct UMSDOS_DIR_ONCE *d = (struct UMSDOS_DIR_ONCE *) buf;
-
- if (d->count == 0) {
- PRINTK ((KERN_DEBUG "dir_once :%.*s: offset %Ld\n",
- len, name, offset));
- ret = d->filldir (d->dirbuf, name, len, offset, ino, DT_UNKNOWN);
- d->stop = ret < 0;
- d->count = 1;
- }
- return ret;
-}
-
-
-/*
- * Read count directory entries from directory filp
- * Return a negative value from linux/errno.h.
- * Return > 0 if success (the number of bytes written by filldir).
- *
- * This function is used by the normal readdir VFS entry point,
- * and in order to get the directory entry from a file's dentry.
- * See umsdos_dentry_to_entry() below.
- */
-
-static int umsdos_readdir_x (struct inode *dir, struct file *filp,
- void *dirbuf, struct umsdos_dirent *u_entry,
- filldir_t filldir)
-{
- struct dentry *demd;
- off_t start_fpos;
- int ret = 0;
- loff_t pos;
-
- umsdos_startlookup (dir);
-
- if (filp->f_pos == UMSDOS_SPECIAL_DIRFPOS && dir == pseudo_root) {
-
- /*
- * We don't need to simulate this pseudo directory
- * when umsdos_readdir_x is called for internal operation
- * of umsdos. This is why dirent_in_fs is tested
- */
- /* #Specification: pseudo root / directory /DOS
- * When umsdos operates in pseudo root mode (C:\linux is the
- * linux root), it simulate a directory /DOS which points to
- * the real root of the file system.
- */
-
- Printk ((KERN_WARNING "umsdos_readdir_x: pseudo_root thing UMSDOS_SPECIAL_DIRFPOS\n"));
- if (filldir (dirbuf, "DOS", 3,
- UMSDOS_SPECIAL_DIRFPOS, UMSDOS_ROOT_INO, DT_DIR) == 0) {
- filp->f_pos++;
- }
- goto out_end;
- }
-
- if (filp->f_pos < 2 ||
- (dir->i_ino != UMSDOS_ROOT_INO && filp->f_pos == 32)) {
-
- int last_f_pos = filp->f_pos;
- struct UMSDOS_DIR_ONCE bufk;
-
- Printk (("umsdos_readdir_x: . or .. /mn/?\n"));
-
- bufk.dirbuf = dirbuf;
- bufk.filldir = filldir;
- bufk.count = 0;
-
- ret = fat_readdir (filp, &bufk, umsdos_dir_once);
- if (last_f_pos > 0 && filp->f_pos > last_f_pos)
- filp->f_pos = UMSDOS_SPECIAL_DIRFPOS;
- if (u_entry != NULL)
- u_entry->flags = 0;
- goto out_end;
- }
-
- Printk (("umsdos_readdir_x: normal file /mn/?\n"));
-
- /* get the EMD dentry */
- demd = umsdos_get_emd_dentry(filp->f_dentry);
- ret = PTR_ERR(demd);
- if (IS_ERR(demd))
- goto out_end;
- ret = -EIO;
- if (!demd->d_inode) {
- printk(KERN_WARNING
- "umsdos_readir_x: EMD file %s/%s not found\n",
- demd->d_parent->d_name.name, demd->d_name.name);
- goto out_dput;
- }
-
- pos = filp->f_pos;
- start_fpos = filp->f_pos;
-
- if (pos <= UMSDOS_SPECIAL_DIRFPOS + 1)
- pos = 0;
- ret = 0;
- while (pos < demd->d_inode->i_size) {
- off_t cur_f_pos = pos;
- struct dentry *dret;
- struct inode *inode;
- struct umsdos_dirent entry;
- struct umsdos_info info;
-
- ret = -EIO;
- if (umsdos_emd_dir_readentry (demd, &pos, &entry) != 0)
- break;
- if (entry.name_len == 0)
- continue;
-#ifdef UMSDOS_DEBUG_VERBOSE
-if (entry.flags & UMSDOS_HLINK)
-printk("umsdos_readdir_x: %s/%s is hardlink\n",
-filp->f_dentry->d_name.name, entry.name);
-#endif
-
- umsdos_parse (entry.name, entry.name_len, &info);
- info.f_pos = cur_f_pos;
- umsdos_manglename (&info);
- /*
- * Do a real lookup on the short name.
- */
- dret = umsdos_covered(filp->f_dentry, info.fake.fname,
- info.fake.len);
- ret = PTR_ERR(dret);
- if (IS_ERR(dret))
- break;
- /*
- * If the file wasn't found, remove it from the EMD.
- */
- inode = dret->d_inode;
- if (!inode)
- goto remove_name;
-#ifdef UMSDOS_DEBUG_VERBOSE
-if (UMSDOS_I(inode)->i_is_hlink)
-printk("umsdos_readdir_x: %s/%s already resolved, ino=%ld\n",
-dret->d_parent->d_name.name, dret->d_name.name, inode->i_ino);
-#endif
-
-Printk (("Found %s/%s, ino=%ld, flags=%x\n",
-dret->d_parent->d_name.name, info.fake.fname, dret->d_inode->i_ino,
-entry.flags));
- /* check whether to resolve a hard-link */
- if ((entry.flags & UMSDOS_HLINK) &&
- !UMSDOS_I(inode)->i_is_hlink) {
- dret = umsdos_solve_hlink (dret);
- ret = PTR_ERR(dret);
- if (IS_ERR(dret))
- break;
- inode = dret->d_inode;
- if (!inode) {
-printk("umsdos_readdir_x: %s/%s negative after link\n",
-dret->d_parent->d_name.name, dret->d_name.name);
- goto clean_up;
- }
- }
-
- /* #Specification: pseudo root / reading real root
- * The pseudo root (/linux) is logically
- * erased from the real root. This means that
- * ls /DOS, won't show "linux". This avoids
- * infinite recursion (/DOS/linux/DOS/linux/...) while
- * walking the file system.
- */
- if (inode != pseudo_root && !(entry.flags & UMSDOS_HIDDEN)) {
- if (filldir (dirbuf, entry.name, entry.name_len,
- cur_f_pos, inode->i_ino, DT_UNKNOWN) < 0) {
- pos = cur_f_pos;
- }
-Printk(("umsdos_readdir_x: got %s/%s, ino=%ld\n",
-dret->d_parent->d_name.name, dret->d_name.name, inode->i_ino));
- if (u_entry != NULL)
- *u_entry = entry;
- dput(dret);
- ret = 0;
- break;
- }
- clean_up:
- dput(dret);
- continue;
-
- remove_name:
- /* #Specification: umsdos / readdir / not in MSDOS
- * During a readdir operation, if the file is not
- * in the MS-DOS directory any more, the entry is
- * removed from the EMD file silently.
- */
-#ifdef UMSDOS_PARANOIA
-printk("umsdos_readdir_x: %s/%s out of sync, erasing\n",
-filp->f_dentry->d_name.name, info.entry.name);
-#endif
- ret = umsdos_delentry(filp->f_dentry, &info,
- S_ISDIR(info.entry.mode));
- if (ret)
- printk(KERN_WARNING
- "umsdos_readdir_x: delentry %s, err=%d\n",
- info.entry.name, ret);
- goto clean_up;
- }
- /*
- * If the fillbuf has failed, f_pos is back to 0.
- * To avoid getting back into the . and .. state
- * (see comments at the beginning), we put back
- * the special offset.
- */
- filp->f_pos = pos;
- if (filp->f_pos == 0)
- filp->f_pos = start_fpos;
-out_dput:
- dput(demd);
-
-out_end:
- umsdos_endlookup (dir);
-
- Printk ((KERN_DEBUG "read dir %p pos %Ld ret %d\n",
- dir, filp->f_pos, ret));
- return ret;
-}
-
-
-/*
- * Read count directory entries from directory filp.
- * Return a negative value from linux/errno.h.
- * Return 0 or positive if successful.
- */
-
-static int UMSDOS_readdir (struct file *filp, void *dirbuf, filldir_t filldir)
-{
- struct inode *dir = filp->f_dentry->d_inode;
- int ret = 0, count = 0;
- struct UMSDOS_DIR_ONCE bufk;
-
- lock_kernel();
-
- bufk.dirbuf = dirbuf;
- bufk.filldir = filldir;
- bufk.stop = 0;
-
- Printk (("UMSDOS_readdir in\n"));
- while (ret == 0 && bufk.stop == 0) {
- struct umsdos_dirent entry;
-
- bufk.count = 0;
- ret = umsdos_readdir_x (dir, filp, &bufk, &entry,
- umsdos_dir_once);
- if (bufk.count == 0)
- break;
- count += bufk.count;
- }
- unlock_kernel();
- Printk (("UMSDOS_readdir out %d count %d pos %Ld\n",
- ret, count, filp->f_pos));
- return count ? : ret;
-}
-
-
-/*
- * Complete the inode content with info from the EMD file.
- *
- * This function modifies the state of a dir inode. It decides
- * whether the dir is a UMSDOS or DOS directory. This is done
- * deeper in umsdos_patch_inode() called at the end of this function.
- *
- * Because it is does disk access, umsdos_patch_inode() may block.
- * At the same time, another process may get here to initialise
- * the same directory inode. There are three cases.
- *
- * 1) The inode is already initialised. We do nothing.
- * 2) The inode is not initialised. We lock access and do it.
- * 3) Like 2 but another process has locked the inode, so we try
- * to lock it and check right afterward check whether
- * initialisation is still needed.
- *
- *
- * Thanks to the "mem" option of the kernel command line, it was
- * possible to consistently reproduce this problem by limiting
- * my memory to 4 MB and running X.
- *
- * Do this only if the inode is freshly read, because we will lose
- * the current (updated) content.
- *
- * A lookup of a mount point directory yield the inode into
- * the other fs, so we don't care about initialising it. iget()
- * does this automatically.
- */
-
-void umsdos_lookup_patch_new(struct dentry *dentry, struct umsdos_info *info)
-{
- struct inode *inode = dentry->d_inode;
- struct umsdos_dirent *entry = &info->entry;
-
- /*
- * This part of the initialization depends only on i_patched.
- */
- if (UMSDOS_I(inode)->i_patched)
- goto out;
- UMSDOS_I(inode)->i_patched = 1;
- if (S_ISREG (entry->mode))
- entry->mtime = inode->i_mtime;
- inode->i_mode = entry->mode;
- inode->i_rdev = to_kdev_t (entry->rdev);
- inode->i_atime = entry->atime;
- inode->i_ctime = entry->ctime;
- inode->i_mtime = entry->mtime;
- inode->i_uid = entry->uid;
- inode->i_gid = entry->gid;
-
- /* #Specification: umsdos / i_nlink
- * The nlink field of an inode is maintained by the MSDOS file system
- * for directory and by UMSDOS for other files. The logic is that
- * MSDOS is already figuring out what to do for directories and
- * does nothing for other files. For MSDOS, there are no hard links
- * so all file carry nlink==1. UMSDOS use some info in the
- * EMD file to plug the correct value.
- */
- if (!S_ISDIR (entry->mode)) {
- if (entry->nlink > 0) {
- inode->i_nlink = entry->nlink;
- } else {
- printk (KERN_ERR
- "UMSDOS: lookup_patch entry->nlink < 1 ???\n");
- }
- }
- /*
- * The mode may have changed, so patch the inode again.
- */
- umsdos_patch_dentry_inode(dentry, info->f_pos);
- umsdos_set_dirinfo_new(dentry, info->f_pos);
-
-out:
- return;
-}
-
-
-/*
- * Return != 0 if an entry is the pseudo DOS entry in the pseudo root.
- */
-
-int umsdos_is_pseudodos (struct inode *dir, struct dentry *dentry)
-{
- /* #Specification: pseudo root / DOS hard coded
- * The pseudo sub-directory DOS in the pseudo root is hard coded.
- * The name is DOS. This is done this way to help standardised
- * the umsdos layout. The idea is that from now on /DOS is
- * a reserved path and nobody will think of using such a path
- * for a package.
- */
- return dir == pseudo_root
- && dentry->d_name.len == 3
- && dentry->d_name.name[0] == 'D'
- && dentry->d_name.name[1] == 'O'
- && dentry->d_name.name[2] == 'S';
-}
-
-
-/*
- * Check whether a file exists in the current directory.
- * Return 0 if OK, negative error code if not (ex: -ENOENT).
- *
- * fills dentry->d_inode with found inode, and increments its count.
- * if not found, return -ENOENT.
- */
-/* #Specification: umsdos / lookup
- * A lookup for a file is done in two steps. First, we
- * locate the file in the EMD file. If not present, we
- * return an error code (-ENOENT). If it is there, we
- * repeat the operation on the msdos file system. If
- * this fails, it means that the file system is not in
- * sync with the EMD file. We silently remove this
- * entry from the EMD file, and return ENOENT.
- */
-
-struct dentry *umsdos_lookup_x (struct inode *dir, struct dentry *dentry, int nopseudo)
-{
- struct dentry *dret = NULL;
- struct inode *inode;
- int ret = -ENOENT;
- struct umsdos_info info;
-
-#ifdef UMSDOS_DEBUG_VERBOSE
-printk("umsdos_lookup_x: looking for %s/%s\n",
-dentry->d_parent->d_name.name, dentry->d_name.name);
-#endif
-
- umsdos_startlookup (dir);
- if (umsdos_is_pseudodos (dir, dentry)) {
- /* #Specification: pseudo root / lookup(DOS)
- * A lookup of DOS in the pseudo root will always succeed
- * and return the inode of the real root.
- */
- Printk ((KERN_DEBUG "umsdos_lookup_x: following /DOS\n"));
- inode = saved_root->d_inode;
- goto out_add;
- }
-
- ret = umsdos_parse (dentry->d_name.name, dentry->d_name.len, &info);
- if (ret) {
-printk("umsdos_lookup_x: %s/%s parse failed, ret=%d\n",
-dentry->d_parent->d_name.name, dentry->d_name.name, ret);
- goto out;
- }
-
- ret = umsdos_findentry (dentry->d_parent, &info, 0);
- if (ret) {
-if (ret != -ENOENT)
-printk("umsdos_lookup_x: %s/%s findentry failed, ret=%d\n",
-dentry->d_parent->d_name.name, dentry->d_name.name, ret);
- goto out;
- }
-Printk (("lookup %.*s pos %lu ret %d len %d ",
-info.fake.len, info.fake.fname, info.f_pos, ret, info.fake.len));
-
- /* do a real lookup to get the short name ... */
- dret = umsdos_covered(dentry->d_parent, info.fake.fname, info.fake.len);
- ret = PTR_ERR(dret);
- if (IS_ERR(dret)) {
-printk("umsdos_lookup_x: %s/%s real lookup failed, ret=%d\n",
-dentry->d_parent->d_name.name, dentry->d_name.name, ret);
- goto out;
- }
- inode = dret->d_inode;
- if (!inode)
- goto out_remove;
- umsdos_lookup_patch_new(dret, &info);
-#ifdef UMSDOS_DEBUG_VERBOSE
-printk("umsdos_lookup_x: found %s/%s, ino=%ld\n",
-dret->d_parent->d_name.name, dret->d_name.name, dret->d_inode->i_ino);
-#endif
-
- /* Check for a hard link */
- if ((info.entry.flags & UMSDOS_HLINK) &&
- !UMSDOS_I(inode)->i_is_hlink) {
- dret = umsdos_solve_hlink (dret);
- ret = PTR_ERR(dret);
- if (IS_ERR(dret))
- goto out;
- ret = -ENOENT;
- inode = dret->d_inode;
- if (!inode) {
-printk("umsdos_lookup_x: %s/%s negative after link\n",
-dret->d_parent->d_name.name, dret->d_name.name);
- goto out_dput;
- }
- }
-
- if (inode == pseudo_root && !nopseudo) {
- /* #Specification: pseudo root / dir lookup
- * For the same reason as readdir, a lookup in /DOS for
- * the pseudo root directory (linux) will fail.
- */
- /*
- * This has to be allowed for resolving hard links
- * which are recorded independently of the pseudo-root
- * mode.
- */
-printk("umsdos_lookup_x: skipping DOS/linux\n");
- ret = -ENOENT;
- goto out_dput;
- }
-
- /*
- * We've found it OK. Now hash the dentry with the inode.
- */
-out_add:
- atomic_inc(&inode->i_count);
- d_add (dentry, inode);
- dentry->d_op = &umsdos_dentry_operations;
- ret = 0;
-
-out_dput:
- if (dret && dret != dentry)
- d_drop(dret);
- dput(dret);
-out:
- umsdos_endlookup (dir);
- return ERR_PTR(ret);
-
-out_remove:
- printk(KERN_WARNING "UMSDOS: entry %s/%s out of sync, erased\n",
- dentry->d_parent->d_name.name, dentry->d_name.name);
- umsdos_delentry (dentry->d_parent, &info, S_ISDIR (info.entry.mode));
- ret = -ENOENT;
- goto out_dput;
-}
-
-
-/*
- * Check whether a file exists in the current directory.
- * Return 0 if OK, negative error code if not (ex: -ENOENT).
- *
- * Called by VFS; should fill dentry->d_inode via d_add.
- */
-
-struct dentry *UMSDOS_lookup (struct inode *dir, struct dentry *dentry, struct nameidata *nd)
-{
- struct dentry *ret;
-
- ret = umsdos_lookup_x (dir, dentry, 0);
-
- /* Create negative dentry if not found. */
- if (ret == ERR_PTR(-ENOENT)) {
- Printk ((KERN_DEBUG
- "UMSDOS_lookup: converting -ENOENT to negative\n"));
- d_add (dentry, NULL);
- dentry->d_op = &umsdos_dentry_operations;
- ret = NULL;
- }
- return ret;
-}
-
-struct dentry *umsdos_covered(struct dentry *parent, char *name, int len)
-{
- struct dentry *result, *dentry;
- struct qstr qstr;
-
- qstr.name = name;
- qstr.len = len;
- qstr.hash = full_name_hash(name, len);
- result = ERR_PTR(-ENOMEM);
- dentry = d_alloc(parent, &qstr);
- if (dentry) {
- /* XXXXXXXXXXXXXXXXXXX Race alert! */
- result = UMSDOS_rlookup(parent->d_inode, dentry);
- d_drop(dentry);
- if (result)
- goto out_fail;
- return dentry;
- }
-out:
- return result;
-
-out_fail:
- dput(dentry);
- goto out;
-}
-
-/*
- * Lookup or create a dentry from within the filesystem.
- *
- * We need to use this instead of lookup_dentry, as the
- * directory semaphore lock is already held.
- */
-struct dentry *umsdos_lookup_dentry(struct dentry *parent, char *name, int len,
- int real)
-{
- struct dentry *result, *dentry;
- struct qstr qstr;
-
- qstr.name = name;
- qstr.len = len;
- qstr.hash = full_name_hash(name, len);
- result = d_lookup(parent, &qstr);
- if (!result) {
- result = ERR_PTR(-ENOMEM);
- dentry = d_alloc(parent, &qstr);
- if (dentry) {
- result = real ?
- UMSDOS_rlookup(parent->d_inode, dentry) :
- UMSDOS_lookup(parent->d_inode, dentry);
- if (result)
- goto out_fail;
- return dentry;
- }
- }
-out:
- return result;
-
-out_fail:
- dput(dentry);
- goto out;
-}
-
-/*
- * Return a path relative to our root.
- */
-char * umsdos_d_path(struct dentry *dentry, char * buffer, int len)
-{
- struct dentry * old_root;
- char * path;
-
- read_lock(¤t->fs->lock);
- old_root = dget(current->fs->root);
- read_unlock(¤t->fs->lock);
- spin_lock(&dcache_lock);
- path = __d_path(dentry, current->fs->rootmnt, dentry->d_sb->s_root, current->fs->rootmnt, buffer, len); /* FIXME: current->fs->rootmnt */
- spin_unlock(&dcache_lock);
-
- if (*path == '/')
- path++; /* skip leading '/' */
-
- if (current->fs->root->d_inode == pseudo_root)
- {
- *(path-1) = '/';
- path -= (UMSDOS_PSDROOT_LEN+1);
- memcpy(path, UMSDOS_PSDROOT_NAME, UMSDOS_PSDROOT_LEN);
- }
- dput(old_root);
-
- return path;
-}
-
-/*
- * Return the dentry which points to a pseudo-hardlink.
- *
- * it should try to find file it points to
- * if file is found, return new dentry/inode
- * The resolved inode will have i_is_hlink set.
- *
- * Note: the original dentry is always dput(), even if an error occurs.
- */
-
-struct dentry *umsdos_solve_hlink (struct dentry *hlink)
-{
- /* root is our root for resolving pseudo-hardlink */
- struct dentry *base = hlink->d_sb->s_root;
- struct dentry *dentry_dst;
- char *path, *pt;
- int len;
- struct address_space *mapping = hlink->d_inode->i_mapping;
- struct page *page;
-
- page=read_cache_page(mapping,0,(filler_t *)mapping->a_ops->readpage,NULL);
- dentry_dst=(struct dentry *)page;
- if (IS_ERR(page))
- goto out;
- wait_on_page_locked(page);
- if (!PageUptodate(page))
- goto async_fail;
-
- dentry_dst = ERR_PTR(-ENOMEM);
- path = (char *) kmalloc (PATH_MAX, GFP_KERNEL);
- if (path == NULL)
- goto out_release;
- memcpy(path, kmap(page), hlink->d_inode->i_size);
- kunmap(page);
- page_cache_release(page);
-
- len = hlink->d_inode->i_size;
-
- /* start at root dentry */
- dentry_dst = dget(base);
- path[len] = '\0';
-
- pt = path;
- if (*path == '/')
- pt++; /* skip leading '/' */
-
- if (base->d_inode == pseudo_root)
- pt += (UMSDOS_PSDROOT_LEN + 1);
-
- while (1) {
- struct dentry *dir = dentry_dst, *demd;
- char *start = pt;
- int real;
-
- while (*pt != '\0' && *pt != '/') pt++;
- len = (int) (pt - start);
- if (*pt == '/') *pt++ = '\0';
-
- real = 1;
- demd = umsdos_get_emd_dentry(dir);
- if (!IS_ERR(demd)) {
- if (demd->d_inode)
- real = 0;
- dput(demd);
- }
-
-#ifdef UMSDOS_DEBUG_VERBOSE
-printk ("umsdos_solve_hlink: dir %s/%s, name=%s, real=%d\n",
-dir->d_parent->d_name.name, dir->d_name.name, start, real);
-#endif
- dentry_dst = umsdos_lookup_dentry(dir, start, len, real);
-/* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
- if (real)
- d_drop(dir);
- dput (dir);
- if (IS_ERR(dentry_dst))
- break;
- /* not found? stop search ... */
- if (!dentry_dst->d_inode) {
- break;
- }
- if (*pt == '\0') /* we're finished! */
- break;
- } /* end while */
-
- if (!IS_ERR(dentry_dst)) {
- struct inode *inode = dentry_dst->d_inode;
- if (inode) {
- UMSDOS_I(inode)->i_is_hlink = 1;
-#ifdef UMSDOS_DEBUG_VERBOSE
-printk ("umsdos_solve_hlink: resolved link %s/%s, ino=%ld\n",
-dentry_dst->d_parent->d_name.name, dentry_dst->d_name.name, inode->i_ino);
-#endif
- } else {
-#ifdef UMSDOS_DEBUG_VERBOSE
-printk ("umsdos_solve_hlink: resolved link %s/%s negative!\n",
-dentry_dst->d_parent->d_name.name, dentry_dst->d_name.name);
-#endif
- }
- } else
- printk(KERN_WARNING
- "umsdos_solve_hlink: err=%ld\n", PTR_ERR(dentry_dst));
- kfree (path);
-
-out:
- dput(hlink); /* original hlink no longer needed */
- return dentry_dst;
-
-async_fail:
- dentry_dst = ERR_PTR(-EIO);
-out_release:
- page_cache_release(page);
- goto out;
-}
-
-
-struct file_operations umsdos_dir_operations =
-{
- .read = generic_read_dir,
- .readdir = UMSDOS_readdir,
- .ioctl = UMSDOS_ioctl_dir,
-};
-
-struct inode_operations umsdos_dir_inode_operations =
-{
- .create = UMSDOS_create,
- .lookup = UMSDOS_lookup,
- .link = UMSDOS_link,
- .unlink = UMSDOS_unlink,
- .symlink = UMSDOS_symlink,
- .mkdir = UMSDOS_mkdir,
- .rmdir = UMSDOS_rmdir,
- .mknod = UMSDOS_mknod,
- .rename = UMSDOS_rename,
- .setattr = UMSDOS_notify_change,
-};
+++ /dev/null
-/*
- * linux/fs/umsdos/emd.c
- *
- * Written 1993 by Jacques Gelinas
- *
- * Extended MS-DOS directory handling functions
- */
-
-#include <linux/types.h>
-#include <linux/fcntl.h>
-#include <linux/kernel.h>
-#include <linux/time.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/msdos_fs.h>
-#include <linux/umsdos_fs.h>
-#include <linux/dcache.h>
-#include <linux/pagemap.h>
-#include <linux/delay.h>
-
-void put_entry (struct umsdos_dirent *p, struct umsdos_dirent *q)
-{
- p->name_len = q->name_len;
- p->flags = q->flags;
- p->nlink = cpu_to_le16(q->nlink);
- p->uid = cpu_to_le16(q->uid);
- p->gid = cpu_to_le16(q->gid);
- p->atime = cpu_to_le32(q->atime);
- p->mtime = cpu_to_le32(q->mtime);
- p->ctime = cpu_to_le32(q->ctime);
- p->rdev = cpu_to_le16(q->rdev);
- p->mode = cpu_to_le16(q->mode);
-}
-
-static void get_entry(struct umsdos_dirent *p, struct umsdos_dirent *q)
-{
- p->name_len = q->name_len;
- p->name[p->name_len]='\0';
- p->flags = q->flags;
- p->nlink = le16_to_cpu (q->nlink);
- /* FIXME -- 32bit UID/GID issues */
- p->uid = le16_to_cpu (q->uid);
- p->gid = le16_to_cpu (q->gid);
- p->atime = le32_to_cpu (q->atime);
- p->mtime = le32_to_cpu (q->mtime);
- p->ctime = le32_to_cpu (q->ctime);
- p->rdev = le16_to_cpu (q->rdev);
- p->mode = le16_to_cpu (q->mode);
-}
-
-/*
- * Lookup the EMD dentry for a directory.
- *
- * Note: the caller must hold a lock on the parent directory.
- */
-struct dentry *umsdos_get_emd_dentry(struct dentry *parent)
-{
- struct dentry *demd;
-
- demd = umsdos_lookup_dentry(parent, UMSDOS_EMD_FILE,
- UMSDOS_EMD_NAMELEN, 1);
- return demd;
-}
-
-/*
- * Check whether a directory has an EMD file.
- *
- * Note: the caller must hold a lock on the parent directory.
- */
-int umsdos_have_emd(struct dentry *dir)
-{
- struct dentry *demd = umsdos_get_emd_dentry (dir);
- int found = 0;
-
- if (!IS_ERR(demd)) {
- if (demd->d_inode)
- found = 1;
- dput(demd);
- }
- return found;
-}
-
-/*
- * Create the EMD file for a directory if it doesn't
- * already exist. Returns 0 or an error code.
- *
- * Note: the caller must hold a lock on the parent directory.
- */
-int umsdos_make_emd(struct dentry *parent)
-{
- struct dentry *demd = umsdos_get_emd_dentry(parent);
- int err = PTR_ERR(demd);
-
- if (IS_ERR(demd)) {
- printk("umsdos_make_emd: can't get dentry in %s, err=%d\n",
- parent->d_name.name, err);
- goto out;
- }
-
- /* already created? */
- err = 0;
- if (demd->d_inode)
- goto out_set;
-
-Printk(("umsdos_make_emd: creating EMD %s/%s\n",
-parent->d_name.name, demd->d_name.name));
-
- err = msdos_create(parent->d_inode, demd, S_IFREG | 0777, NULL);
- if (err) {
- printk (KERN_WARNING
- "umsdos_make_emd: create %s/%s failed, err=%d\n",
- parent->d_name.name, demd->d_name.name, err);
- }
-out_set:
- dput(demd);
-out:
- return err;
-}
-
-
-/*
- * Read an entry from the EMD file.
- * Support variable length record.
- * Return -EIO if error, 0 if OK.
- *
- * does not change {d,i}_count
- */
-
-int umsdos_emd_dir_readentry (struct dentry *demd, loff_t *pos, struct umsdos_dirent *entry)
-{
- struct address_space *mapping = demd->d_inode->i_mapping;
- struct page *page;
- struct umsdos_dirent *p;
- int offs = *pos & ~PAGE_CACHE_MASK;
- int recsize;
- int ret = 0;
-
- page = read_cache_page(mapping, *pos>>PAGE_CACHE_SHIFT,
- (filler_t*)mapping->a_ops->readpage, NULL);
- if (IS_ERR(page))
- goto sync_fail;
- wait_on_page_locked(page);
- if (!PageUptodate(page))
- goto async_fail;
- p = (struct umsdos_dirent*)(kmap(page)+offs);
-
- /* if this is an invalid entry (invalid name length), ignore it */
- if( p->name_len > UMSDOS_MAXNAME )
- {
- printk (KERN_WARNING "Ignoring invalid EMD entry with size %d\n", entry->name_len);
- p->name_len = 0;
- ret = -ENAMETOOLONG; /* notify umssync(8) code that something is wrong */
- /* FIXME: does not work if we did 'ls -l' before 'udosctl uls' ?! */
- }
-
- recsize = umsdos_evalrecsize(p->name_len);
- if (offs + recsize > PAGE_CACHE_SIZE) {
- struct page *page2;
- int part = (char *)(page_address(page) + PAGE_CACHE_SIZE) - p->spare;
- page2 = read_cache_page(mapping, 1+(*pos>>PAGE_CACHE_SHIFT),
- (filler_t*)mapping->a_ops->readpage, NULL);
- if (IS_ERR(page2)) {
- kunmap(page);
- page_cache_release(page);
- page = page2;
- goto sync_fail;
- }
- wait_on_page_locked(page2);
- if (!PageUptodate(page2)) {
- kunmap(page);
- page_cache_release(page2);
- goto async_fail;
- }
- memcpy(entry->spare,p->spare,part);
- memcpy(entry->spare+part,kmap(page2),
- recsize+offs-PAGE_CACHE_SIZE);
- kunmap(page2);
- page_cache_release(page2);
- } else
- memcpy(entry->spare,p->spare,((char*)p+recsize)-p->spare);
- get_entry(entry, p);
- kunmap(page);
- page_cache_release(page);
- *pos += recsize;
- return ret;
-async_fail:
- page_cache_release(page);
- page = ERR_PTR(-EIO);
-sync_fail:
- return PTR_ERR(page);
-}
-
-
-/*
- * Write an entry in the EMD file.
- * Return 0 if OK, -EIO if some error.
- *
- * Note: the caller must hold a lock on the parent directory.
- */
-int umsdos_writeentry (struct dentry *parent, struct umsdos_info *info,
- int free_entry)
-{
- struct inode *dir = parent->d_inode;
- struct umsdos_dirent *entry = &info->entry;
- struct dentry *emd_dentry;
- int ret;
- struct umsdos_dirent entry0,*p;
- struct address_space *mapping;
- struct page *page, *page2 = NULL;
- int offs;
-
- emd_dentry = umsdos_get_emd_dentry(parent);
- ret = PTR_ERR(emd_dentry);
- if (IS_ERR(emd_dentry))
- goto out;
- /* make sure there's an EMD file */
- ret = -EIO;
- if (!emd_dentry->d_inode) {
- printk(KERN_WARNING
- "umsdos_writeentry: no EMD file in %s/%s\n",
- parent->d_parent->d_name.name, parent->d_name.name);
- goto out_dput;
- }
-
- if (free_entry) {
- /* #Specification: EMD file / empty entries
- * Unused entries in the EMD file are identified
- * by the name_len field equal to 0. However to
- * help future extension (or bug correction :-( ),
- * empty entries are filled with 0.
- */
- memset (&entry0, 0, sizeof (entry0));
- entry = &entry0;
- } else if (entry->name_len > 0) {
- memset (entry->name + entry->name_len, '\0',
- sizeof (entry->name) - entry->name_len);
- /* #Specification: EMD file / spare bytes
- * 10 bytes are unused in each record of the EMD. They
- * are set to 0 all the time, so it will be possible
- * to do new stuff and rely on the state of those
- * bytes in old EMD files.
- */
- memset (entry->spare, 0, sizeof (entry->spare));
- }
-
- /* write the entry and update the parent timestamps */
- mapping = emd_dentry->d_inode->i_mapping;
- offs = info->f_pos & ~PAGE_CACHE_MASK;
- ret = -ENOMEM;
- page = grab_cache_page(mapping, info->f_pos>>PAGE_CACHE_SHIFT);
- if (!page)
- goto out_dput;
- p = (struct umsdos_dirent *) (page_address(page) + offs);
- if (offs + info->recsize > PAGE_CACHE_SIZE) {
- ret = mapping->a_ops->prepare_write(NULL,page,offs,
- PAGE_CACHE_SIZE);
- if (ret)
- goto out_unlock;
- page2 = grab_cache_page(mapping,
- (info->f_pos>>PAGE_CACHE_SHIFT)+1);
- if (!page2)
- goto out_unlock2;
- ret = mapping->a_ops->prepare_write(NULL,page2,0,
- offs+info->recsize-PAGE_CACHE_SIZE);
- if (ret)
- goto out_unlock3;
- put_entry (p, entry);
- memcpy(p->spare,entry->spare,
- (char *)(page_address(page) + PAGE_CACHE_SIZE) - p->spare);
- memcpy(page_address(page2),
- ((char*)entry)+PAGE_CACHE_SIZE-offs,
- offs+info->recsize-PAGE_CACHE_SIZE);
- ret = mapping->a_ops->commit_write(NULL,page2,0,
- offs+info->recsize-PAGE_CACHE_SIZE);
- if (ret)
- goto out_unlock3;
- ret = mapping->a_ops->commit_write(NULL,page,offs,
- PAGE_CACHE_SIZE);
- unlock_page(page2);
- page_cache_release(page2);
- if (ret)
- goto out_unlock;
- } else {
- ret = mapping->a_ops->prepare_write(NULL,page,offs,
- offs + info->recsize);
- if (ret)
- goto out_unlock;
- put_entry (p, entry);
- memcpy(p->spare,entry->spare,((char*)p+info->recsize)-p->spare);
- ret = mapping->a_ops->commit_write(NULL,page,offs,
- offs + info->recsize);
- if (ret)
- goto out_unlock;
- }
- unlock_page(page);
- page_cache_release(page);
-
- dir->i_ctime = dir->i_mtime = CURRENT_TIME;
- mark_inode_dirty(dir);
-
-out_dput:
- dput(emd_dentry);
-out:
- Printk (("umsdos_writeentry /mn/: returning %d...\n", ret));
- return ret;
-out_unlock3:
- unlock_page(page2);
- page_cache_release(page2);
-out_unlock2:
- ClearPageUptodate(page);
- kunmap(page);
-out_unlock:
- unlock_page(page);
- page_cache_release(page);
- printk ("UMSDOS: problem with EMD file: can't write\n");
- goto out_dput;
-}
-
-/*
- * General search, locate a name in the EMD file or an empty slot to
- * store it. if info->entry.name_len == 0, search the first empty
- * slot (of the proper size).
- *
- * Return 0 if found, -ENOENT if not found, another error code if
- * other problem.
- *
- * So this routine is used to either find an existing entry or to
- * create a new one, while making sure it is a new one. After you
- * get -ENOENT, you make sure the entry is stuffed correctly and
- * call umsdos_writeentry().
- *
- * To delete an entry, you find it, zero out the entry (memset)
- * and call umsdos_writeentry().
- *
- * All this to say that umsdos_writeentry must be called after this
- * function since it relies on the f_pos field of info.
- *
- * Note: the caller must hold a lock on the parent directory.
- */
-/* #Specification: EMD file structure
- * The EMD file uses a fairly simple layout. It is made of records
- * (UMSDOS_REC_SIZE == 64). When a name can't be written in a single
- * record, multiple contiguous records are allocated.
- */
-
-static int umsdos_find (struct dentry *demd, struct umsdos_info *info)
-{
- struct umsdos_dirent *entry = &info->entry;
- int recsize = info->recsize;
- struct inode *emd_dir;
- int ret = -ENOENT;
- struct {
- off_t posok; /* Position available to store the entry */
- off_t one; /* One empty position -> maybe <- large enough */
- } empty;
- int found = 0;
- int empty_size = 0;
- struct address_space *mapping;
- filler_t *readpage;
- struct page *page = NULL;
- int index = -1;
- int offs = PAGE_CACHE_SIZE,max_offs = PAGE_CACHE_SIZE;
- char *p = NULL;
- loff_t pos = 0;
-
- /* make sure there's an EMD file ... */
- ret = -ENOENT;
- emd_dir = demd->d_inode;
- if (!emd_dir)
- goto out_dput;
- mapping = emd_dir->i_mapping;
- readpage = (filler_t*)mapping->a_ops->readpage;
-
- empty.posok = emd_dir->i_size;
- while (1) {
- struct umsdos_dirent *rentry;
- int entry_size;
-
- if (offs >= max_offs) {
- if (page) {
- kunmap(page);
- page_cache_release(page);
- page = NULL;
- }
- if (pos >= emd_dir->i_size) {
- info->f_pos = empty.posok;
- break;
- }
- if (++index == (emd_dir->i_size>>PAGE_CACHE_SHIFT))
- max_offs = emd_dir->i_size & ~PAGE_CACHE_MASK;
- offs -= PAGE_CACHE_SIZE;
- page = read_cache_page(mapping,index,readpage,NULL);
- if (IS_ERR(page))
- goto sync_fail;
- wait_on_page_locked(page);
- if (!PageUptodate(page))
- goto async_fail;
- p = kmap(page);
- }
-
- rentry = (struct umsdos_dirent *)(p+offs);
-
- if (rentry->name_len == 0) {
- /* We are looking for an empty section at least */
- /* as large as recsize. */
- if (entry->name_len == 0) {
- info->f_pos = pos;
- ret = 0;
- break;
- }
- offs += UMSDOS_REC_SIZE;
- pos += UMSDOS_REC_SIZE;
- if (found)
- continue;
- if (!empty_size)
- empty.one = pos-UMSDOS_REC_SIZE;
- empty_size += UMSDOS_REC_SIZE;
- if (empty_size == recsize) {
- /* Here is a large enough section. */
- empty.posok = empty.one;
- found = 1;
- }
- continue;
- }
-
- entry_size = umsdos_evalrecsize(rentry->name_len);
- if (entry_size > PAGE_CACHE_SIZE)
- goto async_fail;
- empty_size = 0;
- if (entry->name_len != rentry->name_len)
- goto skip_it;
-
- if (entry_size + offs > PAGE_CACHE_SIZE) {
- /* Sucker spans the page boundary */
- int len = (p+PAGE_CACHE_SIZE)-rentry->name;
- struct page *next_page;
- char *q;
- next_page = read_cache_page(mapping,index+1,readpage,NULL);
- if (IS_ERR(next_page)) {
- page_cache_release(page);
- page = next_page;
- goto sync_fail;
- }
- wait_on_page_locked(next_page);
- if (!PageUptodate(next_page)) {
- page_cache_release(page);
- page = next_page;
- goto async_fail;
- }
- q = kmap(next_page);
- if (memcmp(entry->name, rentry->name, len) ||
- memcmp(entry->name+len, q, entry->name_len-len)) {
- kunmap(next_page);
- page_cache_release(next_page);
- goto skip_it;
- }
- kunmap(next_page);
- page_cache_release(next_page);
- } else if (memcmp (entry->name, rentry->name, entry->name_len))
- goto skip_it;
-
- info->f_pos = pos;
- get_entry(entry, rentry);
- ret = 0;
- break;
-skip_it:
- offs+=entry_size;
- pos+=entry_size;
- }
- if (page) {
- kunmap(page);
- page_cache_release(page);
- }
- umsdos_manglename (info);
-
-out_dput:
- dput(demd);
- return ret;
-
-async_fail:
- page_cache_release(page);
- page = ERR_PTR(-EIO);
-sync_fail:
- return PTR_ERR(page);
-}
-
-
-/*
- * Add a new entry in the EMD file.
- * Return 0 if OK or a negative error code.
- * Return -EEXIST if the entry already exists.
- *
- * Complete the information missing in info.
- *
- * N.B. What if the EMD file doesn't exist?
- */
-
-int umsdos_newentry (struct dentry *parent, struct umsdos_info *info)
-{
- int err, ret = -EEXIST;
- struct dentry *demd = umsdos_get_emd_dentry(parent);
-
- ret = PTR_ERR(demd);
- if (IS_ERR(demd))
- goto out;
- err = umsdos_find (demd, info);
- if (err && err == -ENOENT) {
- ret = umsdos_writeentry (parent, info, 0);
- Printk (("umsdos_writeentry EMD ret = %d\n", ret));
- }
-out:
- return ret;
-}
-
-
-/*
- * Create a new hidden link.
- * Return 0 if OK, an error code if not.
- */
-
-/* #Specification: hard link / hidden name
- * When a hard link is created, the original file is renamed
- * to a hidden name. The name is "..LINKNNN" where NNN is a
- * number define from the entry offset in the EMD file.
- */
-int umsdos_newhidden (struct dentry *parent, struct umsdos_info *info)
-{
- int ret;
- struct dentry *demd = umsdos_get_emd_dentry(parent);
- ret = PTR_ERR(demd);
- if (IS_ERR(demd))
- goto out;
-
- umsdos_parse ("..LINK", 6, info);
- info->entry.name_len = 0;
- ret = umsdos_find (demd, info);
- if (ret == -ENOENT || ret == 0) {
- info->entry.name_len = sprintf (info->entry.name,
- "..LINK%ld", info->f_pos);
- ret = 0;
- }
-out:
- return ret;
-}
-
-
-/*
- * Remove an entry from the EMD file.
- * Return 0 if OK, a negative error code otherwise.
- *
- * Complete the information missing in info.
- */
-
-int umsdos_delentry (struct dentry *parent, struct umsdos_info *info, int isdir)
-{
- int ret;
- struct dentry *demd = umsdos_get_emd_dentry(parent);
-
- ret = PTR_ERR(demd);
- if (IS_ERR(demd))
- goto out;
- ret = umsdos_find (demd, info);
- if (ret)
- goto out;
- if (info->entry.name_len == 0)
- goto out;
-
- if ((isdir != 0) != (S_ISDIR (info->entry.mode) != 0)) {
- if (S_ISDIR (info->entry.mode)) {
- ret = -EISDIR;
- } else {
- ret = -ENOTDIR;
- }
- goto out;
- }
- ret = umsdos_writeentry (parent, info, 1);
-
-out:
- return ret;
-}
-
-
-/*
- * Verify that an EMD directory is empty.
- * Return:
- * 0 if not empty,
- * 1 if empty (except for EMD file),
- * 2 if empty or no EMD file.
- */
-
-int umsdos_isempty (struct dentry *dentry)
-{
- struct dentry *demd;
- int ret = 2;
- loff_t pos = 0;
-
- demd = umsdos_get_emd_dentry(dentry);
- if (IS_ERR(demd))
- goto out;
- /* If the EMD file does not exist, it is certainly empty. :-) */
- if (!demd->d_inode)
- goto out_dput;
-
- ret = 1;
- while (pos < demd->d_inode->i_size) {
- struct umsdos_dirent entry;
-
- if (umsdos_emd_dir_readentry (demd, &pos, &entry) != 0) {
- ret = 0;
- break;
- }
- if (entry.name_len != 0) {
- ret = 0;
- break;
- }
- }
-
-out_dput:
- dput(demd);
-out:
- return ret;
-}
-
-/*
- * Locate an entry in a EMD directory.
- * Return 0 if OK, error code if not, generally -ENOENT.
- *
- * expect argument:
- * 0: anything
- * 1: file
- * 2: directory
- */
-
-int umsdos_findentry (struct dentry *parent, struct umsdos_info *info,
- int expect)
-{
- int ret;
- struct dentry *demd = umsdos_get_emd_dentry(parent);
-
- ret = PTR_ERR(demd);
- if (IS_ERR(demd))
- goto out;
- ret = umsdos_find (demd, info);
- if (ret)
- goto out;
-
- switch (expect) {
- case 1:
- if (S_ISDIR (info->entry.mode))
- ret = -EISDIR;
- break;
- case 2:
- if (!S_ISDIR (info->entry.mode))
- ret = -ENOTDIR;
- }
-
-out:
- Printk (("umsdos_findentry: returning %d\n", ret));
- return ret;
-}
+++ /dev/null
-/*
- * linux/fs/umsdos/inode.c
- *
- * Written 1993 by Jacques Gelinas
- * Inspired from linux/fs/msdos/... by Werner Almesberger
- */
-
-#include <linux/module.h>
-
-#include <linux/init.h>
-#include <linux/fs.h>
-#include <linux/msdos_fs.h>
-#include <linux/kernel.h>
-#include <linux/time.h>
-#include <linux/errno.h>
-#include <asm/uaccess.h>
-#include <linux/string.h>
-#include <linux/stat.h>
-#include <linux/umsdos_fs.h>
-#include <linux/list.h>
-#include <linux/pagemap.h>
-
-extern struct dentry_operations umsdos_dentry_operations;
-
-struct dentry *saved_root; /* Original root if changed */
-struct inode *pseudo_root; /* Useful to simulate the pseudo DOS */
- /* directory. See UMSDOS_readdir_x() */
-
-static struct dentry *check_pseudo_root(struct super_block *);
-
-
-void UMSDOS_put_inode (struct inode *inode)
-{
- PRINTK ((KERN_DEBUG
- "put inode %p (%lu) pos %lu count=%d\n"
- ,inode, inode->i_ino
- ,UMSDOS_I(inode)->pos
- ,atomic_read(&inode->i_count)));
-
- if (inode == pseudo_root) {
- Printk ((KERN_ERR "Umsdos: debug: releasing pseudo_root - ino=%lu count=%d\n", inode->i_ino, atomic_read(&inode->i_count)));
- }
-
- if (atomic_read(&inode->i_count) == 1)
- UMSDOS_I(inode)->i_patched = 0;
-}
-
-
-void UMSDOS_put_super (struct super_block *sb)
-{
- Printk ((KERN_DEBUG "UMSDOS_put_super: entering\n"));
- if (saved_root && pseudo_root && kdev_same(sb->s_dev, ROOT_DEV)) {
- shrink_dcache_parent(saved_root);
- dput(saved_root);
- saved_root = NULL;
- pseudo_root = NULL;
- }
- fat_put_super (sb);
-}
-
-
-/*
- * Complete the setup of a directory dentry based on its
- * EMD/non-EMD status. If it has an EMD, then plug the
- * umsdos function table. If not, use the msdos one.
- */
-void umsdos_setup_dir(struct dentry *dir)
-{
- struct inode *inode = dir->d_inode;
- struct umsdos_inode_info *ui = UMSDOS_I(inode);
-
- if (!S_ISDIR(inode->i_mode))
- printk(KERN_ERR "umsdos_setup_dir: %s/%s not a dir!\n",
- dir->d_parent->d_name.name, dir->d_name.name);
-
- init_waitqueue_head (&ui->dir_info.p);
- ui->dir_info.looking = 0;
- ui->dir_info.creating = 0;
- ui->dir_info.pid = 0;
-
- inode->i_op = &umsdos_rdir_inode_operations;
- inode->i_fop = &umsdos_rdir_operations;
- if (umsdos_have_emd(dir)) {
-Printk((KERN_DEBUG "umsdos_setup_dir: %s/%s using EMD\n",
-dir->d_parent->d_name.name, dir->d_name.name));
- inode->i_op = &umsdos_dir_inode_operations;
- inode->i_fop = &umsdos_dir_operations;
- }
-}
-
-
-/*
- * Add some info into an inode so it can find its owner quickly
- */
-void umsdos_set_dirinfo_new (struct dentry *dentry, off_t f_pos)
-{
- struct inode *inode = dentry->d_inode;
- struct dentry *demd;
-
- UMSDOS_I(inode)->pos = f_pos;
-
- /* now check the EMD file */
- demd = umsdos_get_emd_dentry(dentry->d_parent);
- if (!IS_ERR(demd)) {
- dput(demd);
- }
- return;
-}
-
-static struct inode_operations umsdos_file_inode_operations = {
- .truncate = fat_truncate,
- .setattr = UMSDOS_notify_change,
-};
-
-static struct inode_operations umsdos_symlink_inode_operations = {
- .readlink = page_readlink,
- .follow_link = page_follow_link,
- .setattr = UMSDOS_notify_change,
-};
-
-/*
- * Connect the proper tables in the inode and add some info.
- */
-/* #Specification: inode / umsdos info
- * The first time an inode is seen (inode->i_count == 1),
- * the inode number of the EMD file which controls this inode
- * is tagged to this inode. It allows operations such as
- * notify_change to be handled.
- */
-void umsdos_patch_dentry_inode(struct dentry *dentry, off_t f_pos)
-{
- struct inode *inode = dentry->d_inode;
-
-PRINTK (("umsdos_patch_dentry_inode: inode=%lu\n", inode->i_ino));
-
- /*
- * Classify the inode based on EMD/non-EMD status.
- */
-PRINTK (("umsdos_patch_inode: call umsdos_set_dirinfo_new(%p,%lu)\n",
-dentry, f_pos));
- umsdos_set_dirinfo_new(dentry, f_pos);
-
- inode->i_op = &umsdos_file_inode_operations;
- if (S_ISREG (inode->i_mode)) {
- /* address_space operations already set */
- } else if (S_ISDIR (inode->i_mode)) {
- umsdos_setup_dir(dentry);
- } else if (S_ISLNK (inode->i_mode)) {
- /* address_space operations already set */
- inode->i_op = &umsdos_symlink_inode_operations;
- } else
- init_special_inode(inode, inode->i_mode,
- kdev_t_to_nr(inode->i_rdev));
-}
-
-
-/*
- * lock the parent dir before starting ...
- * also handles hardlink converting
- */
-int UMSDOS_notify_change (struct dentry *dentry, struct iattr *attr)
-{
- struct inode *dir, *inode;
- struct umsdos_info info;
- struct dentry *temp, *old_dentry = NULL;
- int ret;
-
- lock_kernel();
-
- ret = umsdos_parse (dentry->d_name.name, dentry->d_name.len,
- &info);
- if (ret)
- goto out;
- ret = umsdos_findentry (dentry->d_parent, &info, 0);
- if (ret) {
-printk("UMSDOS_notify_change: %s/%s not in EMD, ret=%d\n",
-dentry->d_parent->d_name.name, dentry->d_name.name, ret);
- goto out;
- }
-
- if (info.entry.flags & UMSDOS_HLINK) {
- /*
- * In order to get the correct (real) inode, we just drop
- * the original dentry.
- */
- d_drop(dentry);
-Printk(("UMSDOS_notify_change: hard link %s/%s, fake=%s\n",
-dentry->d_parent->d_name.name, dentry->d_name.name, info.fake.fname));
-
- /* Do a real lookup to get the short name dentry */
- temp = umsdos_covered(dentry->d_parent, info.fake.fname,
- info.fake.len);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp))
- goto out;
-
- /* now resolve the link ... */
- temp = umsdos_solve_hlink(temp);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp))
- goto out;
- old_dentry = dentry;
- dentry = temp; /* so umsdos_notify_change_locked will operate on that */
- }
-
- dir = dentry->d_parent->d_inode;
- inode = dentry->d_inode;
-
- ret = inode_change_ok (inode, attr);
- if (ret)
- goto out;
-
- ret = umsdos_notify_change_locked(dentry, attr);
- if (ret == 0)
- ret = inode_setattr (inode, attr);
-out:
- if (old_dentry)
- dput (dentry); /* if we had to use fake dentry for hardlinks, dput() it now */
- unlock_kernel();
- return ret;
-}
-
-
-/*
- * Must be called with the parent lock held.
- */
-int umsdos_notify_change_locked(struct dentry *dentry, struct iattr *attr)
-{
- struct inode *inode = dentry->d_inode;
- struct dentry *demd;
- struct address_space *mapping;
- struct page *page;
- int ret = 0;
- struct umsdos_dirent *entry;
- int offs;
-
-Printk(("UMSDOS_notify_change: entering for %s/%s (%d)\n",
-dentry->d_parent->d_name.name, dentry->d_name.name, UMSDOS_I(inode)->i_patched));
-
- if (inode->i_nlink == 0)
- goto out;
- if (inode->i_ino == UMSDOS_ROOT_INO)
- goto out;
-
- /* get the EMD file dentry */
- demd = umsdos_get_emd_dentry(dentry->d_parent);
- ret = PTR_ERR(demd);
- if (IS_ERR(demd))
- goto out;
- ret = 0;
- /* don't do anything if directory is not promoted to umsdos yet */
- if (!demd->d_inode) {
- Printk((KERN_DEBUG
- "UMSDOS_notify_change: no EMD file %s/%s\n",
- demd->d_parent->d_name.name, demd->d_name.name));
- goto out_dput;
- }
-
- /* don't do anything if this is the EMD itself */
- if (inode == demd->d_inode)
- goto out_dput;
-
- /* This inode is not a EMD file nor an inode used internally
- * by MSDOS, so we can update its status.
- * See emd.c
- */
-
- /* Read only the start of the entry since we don't touch the name */
- mapping = demd->d_inode->i_mapping;
- offs = UMSDOS_I(inode)->pos & ~PAGE_CACHE_MASK;
- ret = -ENOMEM;
- page=grab_cache_page(mapping,UMSDOS_I(inode)->pos>>PAGE_CACHE_SHIFT);
- if (!page)
- goto out_dput;
- ret=mapping->a_ops->prepare_write(NULL,page,offs,offs+UMSDOS_REC_SIZE);
- if (ret)
- goto out_unlock;
- entry = (struct umsdos_dirent *) (page_address(page) + offs);
- if (attr->ia_valid & ATTR_UID)
- entry->uid = cpu_to_le16(attr->ia_uid);
- if (attr->ia_valid & ATTR_GID)
- entry->gid = cpu_to_le16(attr->ia_gid);
- if (attr->ia_valid & ATTR_MODE)
- entry->mode = cpu_to_le16(attr->ia_mode);
- if (attr->ia_valid & ATTR_ATIME)
- entry->atime = cpu_to_le32(attr->ia_atime);
- if (attr->ia_valid & ATTR_MTIME)
- entry->mtime = cpu_to_le32(attr->ia_mtime);
- if (attr->ia_valid & ATTR_CTIME)
- entry->ctime = cpu_to_le32(attr->ia_ctime);
- entry->nlink = cpu_to_le16(inode->i_nlink);
- ret=mapping->a_ops->commit_write(NULL,page,offs,offs+UMSDOS_REC_SIZE);
- if (ret)
- printk(KERN_WARNING
- "umsdos_notify_change: %s/%s EMD write error, ret=%d\n",
- dentry->d_parent->d_name.name, dentry->d_name.name,ret);
-
- /* #Specification: notify_change / msdos fs
- * notify_change operation are done only on the
- * EMD file. The msdos fs is not even called.
- */
-out_unlock:
- unlock_page(page);
- page_cache_release(page);
-out_dput:
- dput(demd);
-out:
- return ret;
-}
-
-
-/*
- * Update the disk with the inode content
- */
-int UMSDOS_write_inode (struct inode *inode, int wait)
-{
- struct iattr newattrs;
- int ret;
-
- ret = fat_write_inode (inode, wait);
- newattrs.ia_mtime = inode->i_mtime;
- newattrs.ia_atime = inode->i_atime;
- newattrs.ia_ctime = inode->i_ctime;
- newattrs.ia_valid = ATTR_MTIME | ATTR_ATIME | ATTR_CTIME;
- /*
- * UMSDOS_notify_change is convenient to call here
- * to update the EMD entry associated with this inode.
- * But it has the side effect to re"dirt" the inode.
- */
-/*
- * UMSDOS_notify_change (inode, &newattrs);
-
- * inode->i_state &= ~I_DIRTY; / * FIXME: this doesn't work. We need to remove ourselves from list on dirty inodes. /mn/ */
- return ret;
-}
-
-
-static struct super_operations umsdos_sops =
-{
- .write_inode = UMSDOS_write_inode,
- .put_inode = UMSDOS_put_inode,
- .delete_inode = fat_delete_inode,
- .put_super = UMSDOS_put_super,
- .statfs = UMSDOS_statfs,
- .clear_inode = fat_clear_inode,
-};
-
-int UMSDOS_statfs(struct super_block *sb,struct statfs *buf)
-{
- int ret;
- ret = fat_statfs (sb, buf);
- if (!ret)
- buf->f_namelen = UMSDOS_MAXNAME;
- return ret;
-}
-
-/*
- * Read the super block of an Extended MS-DOS FS.
- */
-struct super_block *UMSDOS_read_super (struct super_block *sb, void *data,
- int silent)
-{
- struct super_block *res;
- struct dentry *new_root;
-
- /*
- * Call msdos-fs to mount the disk.
- * Note: this returns res == sb or NULL
- */
- MSDOS_SB(sb)->options.isvfat = 0;
- res = fat_read_super(sb, data, silent, &umsdos_rdir_inode_operations);
-
- if (IS_ERR(res))
- return NULL;
- if (res == NULL) {
- if (!silent)
- printk(KERN_INFO "VFS: Can't find a valid "
- "UMSDOS filesystem on dev %s.\n", sb->s_id);
- return NULL;
- }
-
- printk (KERN_INFO "UMSDOS 0.86k "
- "(compatibility level %d.%d, fast msdos)\n",
- UMSDOS_VERSION, UMSDOS_RELEASE);
-
- sb->s_op = &umsdos_sops;
- MSDOS_SB(sb)->options.dotsOK = 0; /* disable hidden==dotfile */
-
- /* install our dentry operations ... */
- sb->s_root->d_op = &umsdos_dentry_operations;
-
- umsdos_patch_dentry_inode(sb->s_root, 0);
-
- /* Check whether to change to the /linux root */
- new_root = check_pseudo_root(sb);
-
- if (new_root) {
- /* sanity check */
- if (new_root->d_op != &umsdos_dentry_operations)
- printk("umsdos_read_super: pseudo-root wrong ops!\n");
-
- pseudo_root = new_root->d_inode;
- saved_root = sb->s_root;
- printk(KERN_INFO "UMSDOS: changed to alternate root\n");
- dget (sb->s_root); sb->s_root = dget(new_root);
- }
- return sb;
-}
-
-/*
- * Check for an alternate root if we're the root device.
- */
-
-extern kdev_t ROOT_DEV;
-static struct dentry *check_pseudo_root(struct super_block *sb)
-{
- struct dentry *root, *sbin, *init;
-
- /*
- * Check whether we're mounted as the root device.
- * must check like this, because we can be used with initrd
- */
-
- if (!kdev_same(sb->s_dev, ROOT_DEV))
- goto out_noroot;
-
- /*
- * lookup_dentry needs a (so far non-existent) root.
- */
- printk(KERN_INFO "check_pseudo_root: mounted as root\n");
- root = lookup_one_len(UMSDOS_PSDROOT_NAME, sb->s_root,UMSDOS_PSDROOT_LEN);
- if (IS_ERR(root))
- goto out_noroot;
-
- if (!root->d_inode || !S_ISDIR(root->d_inode->i_mode))
- goto out_dput;
-
-printk(KERN_INFO "check_pseudo_root: found %s/%s\n",
-root->d_parent->d_name.name, root->d_name.name);
-
- /* look for /sbin/init */
- sbin = lookup_one_len("sbin", root, 4);
- if (IS_ERR(sbin))
- goto out_dput;
- if (!sbin->d_inode || !S_ISDIR(sbin->d_inode->i_mode))
- goto out_dput_sbin;
- init = lookup_one_len("init", sbin, 4);
- if (IS_ERR(init))
- goto out_dput_sbin;
- if (!init->d_inode)
- goto out_dput_init;
- printk(KERN_INFO "check_pseudo_root: found %s/%s, enabling pseudo-root\n", init->d_parent->d_name.name, init->d_name.name);
- dput(sbin);
- dput(init);
- return root;
-
- /* Alternate root not found ... */
-out_dput_init:
- dput(init);
-out_dput_sbin:
- dput(sbin);
-out_dput:
- dput(root);
-out_noroot:
- return NULL;
-}
-
-
-static DECLARE_FSTYPE_DEV(umsdos_fs_type, "umsdos", UMSDOS_read_super);
-
-static int __init init_umsdos_fs (void)
-{
- return register_filesystem (&umsdos_fs_type);
-}
-
-static void __exit exit_umsdos_fs (void)
-{
- unregister_filesystem (&umsdos_fs_type);
-}
-
-module_init(init_umsdos_fs)
-module_exit(exit_umsdos_fs)
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * linux/fs/umsdos/ioctl.c
- *
- * Written 1993 by Jacques Gelinas
- *
- * Extended MS-DOS ioctl directory handling functions
- *
- * Changes:
- * 11/07/2003 Daniele Bellucci <bellucda@tiscali.it>
- * - audit copy_to_user/put_user in umsdos_ioctl_fill.
- */
-
-#include <asm/uaccess.h>
-#include <linux/errno.h>
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/time.h>
-#include <linux/fs.h>
-#include <linux/msdos_fs.h>
-#include <linux/umsdos_fs.h>
-
-struct UMSDOS_DIR_ONCE {
- struct dirent *ent;
- int count;
-};
-
-/*
- * Record a single entry the first call.
- * Return -EINVAL the next one.
- */
-static int umsdos_ioctl_fill (
- void *buf,
- const char *name,
- int name_len,
- loff_t offset,
- ino_t ino,
- unsigned type)
-{
- int ret = -EINVAL;
- struct UMSDOS_DIR_ONCE *d = (struct UMSDOS_DIR_ONCE *) buf;
-
- if (d->count == 0) {
- if (copy_to_user (d->ent->d_name, name, name_len) ||
- put_user ('\0', d->ent->d_name + name_len) ||
- put_user (name_len, &d->ent->d_reclen) ||
- put_user (ino, &d->ent->d_ino) ||
- put_user (offset, &d->ent->d_off))
- return -EFAULT;
- d->count = 1;
- ret = 0;
- }
- return ret;
-}
-
-
-/*
- * Perform special function on a directory
- */
-/* #Specification: ioctl / prototypes
- * The official prototype for the umsdos ioctl on directory
- * is:
- *
- * int ioctl (
- * int fd, // File handle of the directory
- * int cmd, // command
- * struct umsdos_ioctl *data)
- *
- * The struct and the commands are defined in linux/umsdos_fs.h.
- *
- * umsdos_progs/umsdosio.c provide an interface in C++ to all
- * these ioctl. umsdos_progs/udosctl is a small utility showing
- * all this.
- *
- * These ioctl generally allow one to work on the EMD or the
- * DOS directory independently. These are essential to implement
- * the synchronise.
- */
-int UMSDOS_ioctl_dir(struct inode *dir, struct file *filp, unsigned int cmd,
- unsigned long data_ptr)
-{
- struct dentry *dentry = filp->f_dentry;
- struct umsdos_ioctl *idata = (struct umsdos_ioctl *) data_ptr;
- int ret;
- struct umsdos_ioctl data;
-
-Printk(("UMSDOS_ioctl_dir: %s/%s, cmd=%d, data=%08lx\n",
-dentry->d_parent->d_name.name, dentry->d_name.name, cmd, data_ptr));
-
- /* forward non-umsdos ioctls - this hopefully doesn't cause conflicts */
- if (cmd != UMSDOS_GETVERSION
- && cmd != UMSDOS_READDIR_DOS
- && cmd != UMSDOS_READDIR_EMD
- && cmd != UMSDOS_INIT_EMD
- && cmd != UMSDOS_CREAT_EMD
- && cmd != UMSDOS_RENAME_DOS
- && cmd != UMSDOS_UNLINK_EMD
- && cmd != UMSDOS_UNLINK_DOS
- && cmd != UMSDOS_RMDIR_DOS
- && cmd != UMSDOS_STAT_DOS
- && cmd != UMSDOS_DOS_SETUP)
- return fat_dir_ioctl (dir, filp, cmd, data_ptr);
-
- /* #Specification: ioctl / access
- * Only root (effective id) is allowed to do IOCTL on directory
- * in UMSDOS. EPERM is returned for other user.
- */
- /*
- * Well, not all cases require write access, but it simplifies
- * the code, and let's face it, there is only one client (umssync)
- * for all this.
- */
- ret = verify_area (VERIFY_WRITE, (void *) data_ptr,
- sizeof (struct umsdos_ioctl));
- if (ret < 0)
- goto out;
-
- ret = -EPERM;
- if (current->euid != 0 && cmd != UMSDOS_GETVERSION)
- goto out;
-
- ret = -EINVAL;
- if (cmd == UMSDOS_GETVERSION) {
- /* #Specification: ioctl / UMSDOS_GETVERSION
- * The field version and release of the structure
- * umsdos_ioctl are filled with the version and release
- * number of the fs code in the kernel. This will allow
- * some form of checking. Users won't be able to run
- * incompatible utility such as the synchroniser (umssync).
- * umsdos_progs/umsdosio.c enforce this checking.
- *
- * Return always 0.
- */
- put_user (UMSDOS_VERSION, &idata->version);
- put_user (UMSDOS_RELEASE, &idata->release);
- ret = 0;
- goto out;
- }
- if (cmd == UMSDOS_READDIR_DOS) {
- /* #Specification: ioctl / UMSDOS_READDIR_DOS
- * One entry is read from the DOS directory at the current
- * file position. The entry is put as is in the dos_dirent
- * field of struct umsdos_ioctl.
- *
- * Return > 0 if success.
- */
- struct UMSDOS_DIR_ONCE bufk;
-
- bufk.count = 0;
- bufk.ent = &idata->dos_dirent;
-
- fat_readdir (filp, &bufk, umsdos_ioctl_fill);
-
- ret = bufk.count == 1 ? 1 : 0;
- goto out;
- }
- if (cmd == UMSDOS_READDIR_EMD) {
- /* #Specification: ioctl / UMSDOS_READDIR_EMD
- * One entry is read from the EMD at the current
- * file position. The entry is put as is in the umsdos_dirent
- * field of struct umsdos_ioctl. The corresponding mangled
- * DOS entry name is put in the dos_dirent field.
- *
- * All entries are read including hidden links. Blank
- * entries are skipped.
- *
- * Return > 0 if success.
- */
- struct dentry *demd;
- loff_t pos = filp->f_pos;
-
- /* The absence of the EMD is simply seen as an EOF */
- demd = umsdos_get_emd_dentry(dentry);
- ret = PTR_ERR(demd);
- if (IS_ERR(demd))
- goto out;
- ret = 0;
- if (!demd->d_inode)
- goto read_dput;
-
- while (pos < demd->d_inode->i_size) {
- off_t f_pos = pos;
- struct umsdos_dirent entry;
- struct umsdos_info info;
-
- ret = umsdos_emd_dir_readentry (demd, &pos, &entry);
-
- if (ret == -ENAMETOOLONG) {
- printk (KERN_INFO "Fixing EMD entry with invalid size -- zeroing out\n");
- memset (&info, 0, sizeof (info));
- info.f_pos = f_pos;
- info.recsize = UMSDOS_REC_SIZE;
- ret = umsdos_writeentry (dentry, &info, 1);
- continue;
- }
-
- if (ret)
- break;
- if (entry.name_len <= 0)
- continue;
-
- umsdos_parse (entry.name, entry.name_len, &info);
- info.f_pos = f_pos;
- umsdos_manglename (&info);
- ret = -EFAULT;
- if (copy_to_user (&idata->umsdos_dirent, &entry,
- sizeof (entry)))
- break;
- if (copy_to_user (&idata->dos_dirent.d_name,
- info.fake.fname,
- info.fake.len + 1))
- break;
- ret = entry.name_len;
- break;
- }
- /* update the original f_pos */
- filp->f_pos = pos;
- read_dput:
- d_drop(demd);
- dput(demd);
- goto out;
- }
- if (cmd == UMSDOS_INIT_EMD) {
- /* #Specification: ioctl / UMSDOS_INIT_EMD
- * The UMSDOS_INIT_EMD command makes sure the EMD
- * exists for a directory. If it does not, it is
- * created. Also, it makes sure the directory function
- * table (struct inode_operations) is set to the UMSDOS
- * semantic. This mean that umssync may be applied to
- * an "opened" msdos directory, and it will change behavior
- * on the fly.
- *
- * Return 0 if success.
- */
-
- ret = umsdos_make_emd(dentry);
-Printk(("UMSDOS_ioctl_dir: INIT_EMD %s/%s, ret=%d\n",
-dentry->d_parent->d_name.name, dentry->d_name.name, ret));
- umsdos_setup_dir (dentry);
- goto out;
- }
-
- ret = -EFAULT;
- if (copy_from_user (&data, idata, sizeof (data)))
- goto out;
-
- if (cmd == UMSDOS_CREAT_EMD) {
- /* #Specification: ioctl / UMSDOS_CREAT_EMD
- * The umsdos_dirent field of the struct umsdos_ioctl is used
- * as is to create a new entry in the EMD of the directory.
- * The DOS directory is not modified.
- * No validation is done (yet).
- *
- * Return 0 if success.
- */
- struct umsdos_info info;
-
- /* This makes sure info.entry and info in general
- * is correctly initialised
- */
- memcpy (&info.entry, &data.umsdos_dirent,
- sizeof (data.umsdos_dirent));
- umsdos_parse (data.umsdos_dirent.name
- ,data.umsdos_dirent.name_len, &info);
- ret = umsdos_newentry (dentry, &info);
- goto out;
- }
- else if (cmd == UMSDOS_RENAME_DOS) {
- struct dentry *old_dentry, *new_dentry; /* FIXME */
-
- /* #Specification: ioctl / UMSDOS_RENAME_DOS
- * A file or directory is renamed in a DOS directory
- * (not moved across directory). The source name
- * is in the dos_dirent.name field and the destination
- * is in umsdos_dirent.name field.
- *
- * This ioctl allows umssync to rename a mangled file
- * name before syncing it back in the EMD.
- */
- old_dentry = umsdos_lookup_dentry (dentry,
- data.dos_dirent.d_name,
- data.dos_dirent.d_reclen ,1);
- ret = PTR_ERR(old_dentry);
- if (IS_ERR(old_dentry))
- goto out;
- new_dentry = umsdos_lookup_dentry (dentry,
- data.umsdos_dirent.name,
- data.umsdos_dirent.name_len, 1);
- ret = PTR_ERR(new_dentry);
- if (!IS_ERR(new_dentry)) {
-printk("umsdos_ioctl: renaming %s/%s to %s/%s\n",
-old_dentry->d_parent->d_name.name, old_dentry->d_name.name,
-new_dentry->d_parent->d_name.name, new_dentry->d_name.name);
- ret = msdos_rename (dir, old_dentry, dir, new_dentry);
- d_drop(new_dentry);
- d_drop(old_dentry);
- dput(new_dentry);
- }
- dput(old_dentry);
- goto out;
- }
- else if (cmd == UMSDOS_UNLINK_EMD) {
- /* #Specification: ioctl / UMSDOS_UNLINK_EMD
- * The umsdos_dirent field of the struct umsdos_ioctl is used
- * as is to remove an entry from the EMD of the directory.
- * No validation is done (yet). The mode field is used
- * to validate S_ISDIR or S_ISREG.
- *
- * Return 0 if success.
- */
- struct umsdos_info info;
-
- /* This makes sure info.entry and info in general
- * is correctly initialised
- */
- memcpy (&info.entry, &data.umsdos_dirent,
- sizeof (data.umsdos_dirent));
- umsdos_parse (data.umsdos_dirent.name,
- data.umsdos_dirent.name_len, &info);
- ret = umsdos_delentry (dentry, &info,
- S_ISDIR (data.umsdos_dirent.mode));
- if (ret) {
- printk(KERN_WARNING
- "umsdos_ioctl: delentry %s/%s failed, ret=%d\n",
- dentry->d_name.name, info.entry.name, ret);
- }
- goto out;
- }
- else if (cmd == UMSDOS_UNLINK_DOS) {
- struct dentry *temp;
-
- /* #Specification: ioctl / UMSDOS_UNLINK_DOS
- * The dos_dirent field of the struct umsdos_ioctl is used to
- * execute a msdos_unlink operation. The d_name and d_reclen
- * fields are used.
- *
- * Return 0 if success.
- */
- temp = umsdos_lookup_dentry(dentry, data.dos_dirent.d_name,
- data.dos_dirent.d_reclen, 1);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp))
- goto out;
- ret = -ENOENT;
- if (temp->d_inode) {
- ret = -EISDIR;
- if (!S_ISDIR(temp->d_inode->i_mode))
- ret = msdos_unlink (dir, temp);
- if (!ret)
- d_delete(temp);
- }
- dput (temp);
- goto out;
- }
- else if (cmd == UMSDOS_RMDIR_DOS) {
- struct dentry *temp;
-
- /* #Specification: ioctl / UMSDOS_RMDIR_DOS
- * The dos_dirent field of the struct umsdos_ioctl is used to
- * execute a msdos_rmdir operation. The d_name and d_reclen
- * fields are used.
- *
- * Return 0 if success.
- */
- temp = umsdos_lookup_dentry(dentry, data.dos_dirent.d_name,
- data.dos_dirent.d_reclen, 1);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp))
- goto out;
- ret = -ENOENT;
- if (temp->d_inode) {
- ret = -ENOTDIR;
- if (S_ISDIR(temp->d_inode->i_mode))
- ret = msdos_rmdir (dir, temp);
- if (!ret)
- d_delete(temp);
- }
- dput (temp);
- goto out;
-
- } else if (cmd == UMSDOS_STAT_DOS) {
- /* #Specification: ioctl / UMSDOS_STAT_DOS
- * The dos_dirent field of the struct umsdos_ioctl is
- * used to execute a stat operation in the DOS directory.
- * The d_name and d_reclen fields are used.
- *
- * The following field of umsdos_ioctl.stat are filled.
- *
- * st_ino,st_mode,st_size,st_atime,st_mtime,st_ctime,
- * Return 0 if success.
- */
- struct dentry *dret;
- struct inode *inode;
-
- dret = umsdos_lookup_dentry(dentry, data.dos_dirent.d_name,
- data.dos_dirent.d_reclen, 1);
- ret = PTR_ERR(dret);
- if (IS_ERR(dret))
- goto out;
- ret = -ENOENT;
- inode = dret->d_inode;
- if (inode) {
- data.stat.st_ino = inode->i_ino;
- data.stat.st_mode = inode->i_mode;
- data.stat.st_size = inode->i_size;
- data.stat.st_atime = inode->i_atime;
- data.stat.st_ctime = inode->i_ctime;
- data.stat.st_mtime = inode->i_mtime;
- ret = -EFAULT;
- if (!copy_to_user (&idata->stat, &data.stat,
- sizeof (data.stat)))
- ret = 0;
- }
- dput(dret);
- goto out;
- }
- else if (cmd == UMSDOS_DOS_SETUP) {
- /* #Specification: ioctl / UMSDOS_DOS_SETUP
- * The UMSDOS_DOS_SETUP ioctl allow changing the
- * default permission of the MS-DOS filesystem driver
- * on the fly. The MS-DOS driver applies global permissions
- * to every file and directory. Normally these permissions
- * are controlled by a mount option. This is not
- * available for root partition, so a special utility
- * (umssetup) is provided to do this, normally in
- * /etc/rc.local.
- *
- * Be aware that this applies ONLY to MS-DOS directories
- * (those without EMD --linux-.---). Umsdos directory
- * have independent (standard) permission for each
- * and every file.
- *
- * The field umsdos_dirent provide the information needed.
- * umsdos_dirent.uid and gid sets the owner and group.
- * umsdos_dirent.mode set the permissions flags.
- */
- dir->i_sb->u.msdos_sb.options.fs_uid = data.umsdos_dirent.uid;
- dir->i_sb->u.msdos_sb.options.fs_gid = data.umsdos_dirent.gid;
- dir->i_sb->u.msdos_sb.options.fs_fmask =
- dir->i_sb->u.msdos_sb.options.fs_dmask =
- data.umsdos_dirent.mode;
- ret = 0;
- }
-out:
- Printk (("ioctl %d, returning %d\n", cmd, ret));
- return ret;
-}
+++ /dev/null
-/*
- * linux/fs/umsdos/mangle.c
- *
- * Written 1993 by Jacques Gelinas
- *
- * Control the mangling of file name to fit msdos name space.
- * Many optimisations by GLU == dglaude@is1.vub.ac.be (Glaude David)
- */
-
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-#include <linux/umsdos_fs.h>
-
-/* (This file is used outside of the kernel) */
-#ifndef __KERNEL__
-#define KERN_WARNING
-#endif
-
-/*
- * Complete the mangling of the MSDOS fake name
- * based on the position of the entry in the EMD file.
- *
- * Simply complete the job of umsdos_parse; fill the extension.
- *
- * Beware that info->f_pos must be set.
- */
-void umsdos_manglename (struct umsdos_info *info)
-{
- if (info->msdos_reject) {
- /* #Specification: file name / non MSDOS conforming / mangling
- * Each non MSDOS conforming file has a special extension
- * build from the entry position in the EMD file.
- *
- * This number is then transform in a base 32 number, where
- * each digit is expressed like hexadecimal number, using
- * digit and letter, except it uses 22 letters from 'a' to 'v'.
- * The number 32 comes from 2**5. It is faster to split a binary
- * number using a base which is a power of two. And I was 32
- * when I started this project. Pick your answer :-) .
- *
- * If the result is '0', it is replace with '_', simply
- * to make it odd.
- *
- * This is true for the first two character of the extension.
- * The last one is taken from a list of odd character, which
- * are:
- *
- * { } ( ) ! ` ^ & @
- *
- * With this scheme, we can produce 9216 ( 9* 32 * 32)
- * different extensions which should not clash with any useful
- * extension already popular or meaningful. Since most directory
- * have much less than 32 * 32 files in it, the first character
- * of the extension of any mangled name will be {.
- *
- * Here are the reason to do this (this kind of mangling).
- *
- * -The mangling is deterministic. Just by the extension, we
- * are able to locate the entry in the EMD file.
- *
- * -By keeping to beginning of the file name almost unchanged,
- * we are helping the MSDOS user.
- *
- * -The mangling produces names not too ugly, so an msdos user
- * may live with it (remember it, type it, etc...).
- *
- * -The mangling produces names ugly enough so no one will
- * ever think of using such a name in real life. This is not
- * fool proof. I don't think there is a total solution to this.
- */
- int entry_num;
- char *pt = info->fake.fname + info->fake.len;
- /* lookup for encoding the last character of the extension
- * It contains valid character after the ugly one to make sure
- * even if someone overflows the 32 * 32 * 9 limit, it still
- * does something
- */
-#define SPECIAL_MANGLING '{','}','(',')','!','`','^','&','@'
- static char lookup3[] =
- {
- SPECIAL_MANGLING,
- /* This is the start of lookup12 */
- '_', '1', '2', '3', '4', '5', '6', '7', '8', '9',
- 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm', 'n', 'o',
- 'p', 'q', 'r', 's', 't', 'u', 'v'
- };
-
-#define lookup12 (lookup3+9)
- entry_num = info->f_pos / UMSDOS_REC_SIZE;
- if (entry_num > (9* 32 * 32)){
- printk (KERN_WARNING "UMSDOS: more than 9216 files in a directory.\n"
- "This may break the mangling strategy.\n"
- "Not a killer problem. See doc.\n");
- }
- *pt++ = '.';
- *pt++ = lookup3 [(entry_num >> 10) & 31];
- *pt++ = lookup12[(entry_num >> 5) & 31];
- *pt++ = lookup12[entry_num & 31];
- *pt = '\0'; /* help doing printk */
- info->fake.len += 4;
- info->msdos_reject = 0; /* Avoid mangling twice */
- }
-}
-
-/*
- * Evaluate the record size needed to store of name of len character.
- * The value returned is a multiple of UMSDOS_REC_SIZE.
- */
-int umsdos_evalrecsize (int len)
-{
- struct umsdos_dirent dirent;
- int nbrec = 1 + ((len - 1 + (dirent.name - (char *) &dirent))
- / UMSDOS_REC_SIZE);
-
- return nbrec * UMSDOS_REC_SIZE;
- /*
- * GLU This should be inlined or something to speed it up to the max.
- * GLU nbrec is absolutely not needed to return the value.
- */
-}
-#ifdef TEST
-int umsdos_evalrecsize_old (int len)
-{
- struct umsdos_dirent dirent;
- int size = len + (dirent.name - (char *) &dirent);
- int nbrec = size / UMSDOS_REC_SIZE;
- int extra = size % UMSDOS_REC_SIZE;
-
- if (extra > 0)
- nbrec++;
- return nbrec * UMSDOS_REC_SIZE;
-}
-#endif
-
-
-/*
- * Fill the struct info with the full and msdos name of a file
- * Return 0 if all is OK, a negative error code otherwise.
- */
-int umsdos_parse (
- const char *fname,
- int len,
- struct umsdos_info *info)
-{
- int ret = -ENAMETOOLONG;
-
- /* #Specification: file name / too long
- * If a file name exceed UMSDOS maxima, the file name is silently
- * truncated. This makes it conformant with the other file system
- * of Linux (minix and ext2 at least).
- */
- if (len > UMSDOS_MAXNAME)
- len = UMSDOS_MAXNAME;
- {
- const char *firstpt = NULL; /* First place we saw a "." in fname */
-
- /* #Specification: file name / non MSDOS conforming / base length 0
- * file names beginning with a period '.' are invalid for MS-DOS.
- * It needs absolutely a base name. So the file name is mangled
- */
- int ivldchar = fname[0] == '.'; /* At least one invalid character */
- int msdos_len = len;
- int base_len;
-
- /*
- * cardinal_per_size tells if there exists at least one
- * DOS pseudo device on length n. See the test below.
- */
- static const char cardinal_per_size[9] =
- {
- 0, 0, 0, 1, 1, 0, 1, 0, 1
- };
-
- /*
- * lkp translate all character to acceptable character (for DOS).
- * When lkp[n] == n, it means also it is an acceptable one.
- * So it serves both as a flag and as a translator.
- */
- static char lkp[256];
- static char is_init;
-
- if (!is_init) {
- /*
- * Initialisation of the array is easier and less error
- * prone like this.
- */
- int i;
- static const char *spc = "\"*+,/:;<=>?[\\]|~";
-
- is_init = 1;
- for (i = 0; i <= 32; i++)
- lkp[i] = '#';
- for (i = 33; i < 'A'; i++)
- lkp[i] = (char) i;
- for (i = 'A'; i <= 'Z'; i++)
- lkp[i] = (char) (i + ('a' - 'A'));
- for (i = 'Z' + 1; i < 127; i++)
- lkp[i] = (char) i;
- for (i = 128; i < 256; i++)
- lkp[i] = '#';
-
- lkp['.'] = '_';
- while (*spc != '\0')
- lkp[(unsigned char) (*spc++)] = '#';
- }
- /* GLU
- * File names longer than 8+'.'+3 are invalid for MS-DOS,
- * so the file name is to be mangled--no further test is needed.
- * This speeds up handling of long names.
- * The position of the last point is no more necessary anyway.
- */
- if (len <= (8 + 1 + 3)) {
- const char *pt = fname;
- const char *endpt = fname + len;
-
- while (pt < endpt) {
- if (*pt == '.') {
- if (firstpt != NULL) {
- /* 2 . in a file name. Reject */
- ivldchar = 1;
- break;
- } else {
- int extlen = (int) (endpt - pt);
-
- firstpt = pt;
- if (firstpt - fname > 8) {
- /* base name longer than 8: reject */
- ivldchar = 1;
- break;
- } else if (extlen > 4) {
- /* Extension longer than 4 (including .): reject */
- ivldchar = 1;
- break;
- } else if (extlen == 1) {
- /* #Specification: file name / non MSDOS conforming / last char == .
- * If the last character of a file name is
- * a period, mangling is applied. MS-DOS does
- * not support those file names.
- */
- ivldchar = 1;
- break;
- } else if (extlen == 4) {
- /* #Specification: file name / non MSDOS conforming / mangling clash
- * To avoid clash with the umsdos mangling, any file
- * with a special character as the first character
- * of the extension will be mangled. This solves the
- * following problem:
- *
- * #
- * touch FILE
- * # FILE is invalid for DOS, so mangling is applied
- * # file.{_1 is created in the DOS directory
- * touch file.{_1
- * # To UMSDOS file point to a single DOS entry.
- * # So file.{_1 has to be mangled.
- * #
- */
- static char special[] =
- {
- SPECIAL_MANGLING, '\0'
- };
-
- if (strchr (special, firstpt[1]) != NULL) {
- ivldchar = 1;
- break;
- }
- }
- }
- } else if (lkp[(unsigned char) (*pt)] != *pt) {
- ivldchar = 1;
- break;
- }
- pt++;
- }
- } else {
- ivldchar = 1;
- }
- if (ivldchar
- || (firstpt == NULL && len > 8)
- || (len == UMSDOS_EMD_NAMELEN
- && memcmp (fname, UMSDOS_EMD_FILE, UMSDOS_EMD_NAMELEN) == 0)) {
- /* #Specification: file name / --linux-.---
- * The name of the EMD file --linux-.--- is map to a mangled
- * name. So UMSDOS does not restrict its use.
- */
- /* #Specification: file name / non MSDOS conforming / mangling
- * Non MSDOS conforming file names must use some alias to fit
- * in the MSDOS name space.
- *
- * The strategy is simple. The name is simply truncated to
- * 8 char. points are replace with underscore and a
- * number is given as an extension. This number correspond
- * to the entry number in the EMD file. The EMD file
- * only need to carry the real name.
- *
- * Upper case is also converted to lower case.
- * Control character are converted to #.
- * Spaces are converted to #.
- * The following characters are also converted to #.
- * #
- * " * + , / : ; < = > ? [ \ ] | ~
- * #
- *
- * Sometimes the problem is not in MS-DOS itself but in
- * command.com.
- */
- int i;
- char *pt = info->fake.fname;
-
- base_len = msdos_len = (msdos_len > 8) ? 8 : msdos_len;
- /*
- * There is no '.' any more so we know for a fact that
- * the base length is the length.
- */
- memcpy (info->fake.fname, fname, msdos_len);
- for (i = 0; i < msdos_len; i++, pt++)
- *pt = lkp[(unsigned char) (*pt)];
- *pt = '\0'; /* GLU We force null termination. */
- info->msdos_reject = 1;
- /*
- * The numeric extension is added only when we know
- * the position in the EMD file, in umsdos_newentry(),
- * umsdos_delentry(), and umsdos_findentry().
- * See umsdos_manglename().
- */
- } else {
- /* Conforming MSDOS file name */
- strncpy (info->fake.fname, fname, len);
- info->msdos_reject = 0;
- base_len = firstpt != NULL ? (int) (firstpt - fname) : len;
- }
- if (cardinal_per_size[base_len]) {
- /* #Specification: file name / MSDOS devices / mangling
- * To avoid unreachable file from MS-DOS, any MS-DOS conforming
- * file with a basename equal to one of the MS-DOS pseudo
- * devices will be mangled.
- *
- * If a file such as "prn" was created, it would be unreachable
- * under MS-DOS because "prn" is assumed to be the printer, even
- * if the file does have an extension.
- *
- * Since the extension is unimportant to MS-DOS, we must patch
- * the basename also. We simply insert a minus '-'. To avoid
- * conflict with valid file with a minus in front (such as
- * "-prn"), we add an mangled extension like any other
- * mangled file name.
- *
- * Here is the list of DOS pseudo devices:
- *
- * #
- * "prn","con","aux","nul",
- * "lpt1","lpt2","lpt3","lpt4",
- * "com1","com2","com3","com4",
- * "clock$"
- * #
- *
- * and some standard ones for common DOS programs
- *
- * "emmxxxx0","xmsxxxx0","setverxx"
- *
- * (Thanks to Chris Hall <cah17@phoenix.cambridge.ac.uk>
- * for pointing these out to me).
- *
- * Is there one missing?
- */
- /* This table must be ordered by length */
- static const char *tbdev[] =
- {
- "prn", "con", "aux", "nul",
- "lpt1", "lpt2", "lpt3", "lpt4",
- "com1", "com2", "com3", "com4",
- "clock$",
- "emmxxxx0", "xmsxxxx0", "setverxx"
- };
-
- /* Tell where to find in tbdev[], the first name of */
- /* a certain length */
- static const char start_ind_dev[9] =
- {
- 0, 0, 0, 4, 12, 12, 13, 13, 16
- };
- char basen[9];
- int i;
-
- for (i = start_ind_dev[base_len - 1]; i < start_ind_dev[base_len]; i++) {
- if (memcmp (info->fake.fname, tbdev[i], base_len) == 0) {
- memcpy (basen, info->fake.fname, base_len);
- basen[base_len] = '\0'; /* GLU We force null termination. */
- /*
- * GLU We do that only if necessary; we try to do the
- * GLU simple thing in the usual circumstance.
- */
- info->fake.fname[0] = '-';
- strcpy (info->fake.fname + 1, basen); /* GLU We already guaranteed a null would be at the end. */
- msdos_len = (base_len == 8) ? 8 : base_len + 1;
- info->msdos_reject = 1;
- break;
- }
- }
- }
- info->fake.fname[msdos_len] = '\0'; /* Help doing printk */
- /* GLU This zero should (always?) be there already. */
- info->fake.len = msdos_len;
- /* Why not use info->fake.len everywhere? Is it longer?
- */
- memcpy (info->entry.name, fname, len);
- info->entry.name[len] = '\0'; /* for printk */
- info->entry.name_len = len;
- ret = 0;
- }
- /*
- * Evaluate how many records are needed to store this entry.
- */
- info->recsize = umsdos_evalrecsize (len);
- return ret;
-}
-
-#ifdef TEST
-
-struct MANG_TEST {
- char *fname; /* Name to validate */
- int msdos_reject; /* Expected msdos_reject flag */
- char *msname; /* Expected msdos name */
-};
-
-struct MANG_TEST tb[] =
-{
- "hello", 0, "hello",
- "hello.1", 0, "hello.1",
- "hello.1_", 0, "hello.1_",
- "prm", 0, "prm",
-
-#ifdef PROPOSITION
- "HELLO", 1, "hello",
- "Hello.1", 1, "hello.1",
- "Hello.c", 1, "hello.c",
-#else
-/*
- * I find the three examples below very unfortunate. I propose to
- * convert them to lower case in a quick preliminary pass, then test
- * whether there are other troublesome characters. I have not made
- * this change, because it is not easy, but I wanted to mention the
- * principle. Obviously something like that would increase the chance
- * of collisions, for example between "HELLO" and "Hello", but these
- * can be treated elsewhere along with the other collisions.
- */
-
- "HELLO", 1, "hello",
- "Hello.1", 1, "hello_1",
- "Hello.c", 1, "hello_c",
-#endif
-
- "hello.{_1", 1, "hello_{_",
- "hello\t", 1, "hello#",
- "hello.1.1", 1, "hello_1_",
- "hel,lo", 1, "hel#lo",
- "Salut.Tu.vas.bien?", 1, "salut_tu",
- ".profile", 1, "_profile",
- ".xv", 1, "_xv",
- "toto.", 1, "toto_",
- "clock$.x", 1, "-clock$",
- "emmxxxx0", 1, "-emmxxxx",
- "emmxxxx0.abcd", 1, "-emmxxxx",
- "aux", 1, "-aux",
- "prn", 1, "-prn",
- "prn.abc", 1, "-prn",
- "PRN", 1, "-prn",
- /*
- * GLU WARNING: the results of these are different with my version
- * GLU of mangling compared to the original one.
- * GLU CAUSE: the manner of calculating the baselen variable.
- * GLU For you they are always 3.
- * GLU For me they are respectively 7, 8, and 8.
-
- */
- "PRN.abc", 1, "prn_abc",
- "Prn.abcd", 1, "prn_abcd",
- "prn.abcd", 1, "prn_abcd",
- "Prn.abcdefghij", 1, "prn_abcd"
-};
-
-int main (int argc, char *argv[])
-{
- int i, rold, rnew;
-
- printf ("Testing the umsdos_parse.\n");
- for (i = 0; i < sizeof (tb) / sizeof (tb[0]); i++) {
- struct MANG_TEST *pttb = tb + i;
- struct umsdos_info info;
- int ok = umsdos_parse (pttb->fname, strlen (pttb->fname), &info);
-
- if (strcmp (info.fake.fname, pttb->msname) != 0) {
- printf ("**** %s -> ", pttb->fname);
- printf ("%s <> %s\n", info.fake.fname, pttb->msname);
- } else if (info.msdos_reject != pttb->msdos_reject) {
- printf ("**** %s -> %s ", pttb->fname, pttb->msname);
- printf ("%d <> %d\n", info.msdos_reject, pttb->msdos_reject);
- } else {
- printf (" %s -> %s %d\n", pttb->fname, pttb->msname
- ,pttb->msdos_reject);
- }
- }
- printf ("Testing the new umsdos_evalrecsize.");
- for (i = 0; i < UMSDOS_MAXNAME; i++) {
- rnew = umsdos_evalrecsize (i);
- rold = umsdos_evalrecsize_old (i);
- if (!(i % UMSDOS_REC_SIZE)) {
- printf ("\n%d:\t", i);
- }
- if (rnew != rold) {
- printf ("**** %d newres: %d != %d \n", i, rnew, rold);
- } else {
- printf (".");
- }
- }
- printf ("\nEnd of Testing.\n");
-
- return 0;
-}
-
-#endif
+++ /dev/null
-/*
- * linux/fs/umsdos/namei.c
- *
- * Written 1993 by Jacques Gelinas
- * Inspired from linux/fs/msdos/... by Werner Almesberger
- *
- * Maintain and access the --linux alternate directory file.
- */
- /*
- * You are in the maze of twisted functions - half of them shouldn't
- * be here...
- */
-
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/time.h>
-#include <linux/types.h>
-#include <linux/fcntl.h>
-#include <linux/stat.h>
-#include <linux/string.h>
-#include <linux/msdos_fs.h>
-#include <linux/umsdos_fs.h>
-#include <linux/slab.h>
-
-#define UMSDOS_DIR_LOCK
-
-#ifdef UMSDOS_DIR_LOCK
-
-static inline void u_sleep_on (struct inode *dir)
-{
- sleep_on (&UMSDOS_I(dir)->dir_info.p);
-}
-
-static inline void u_wake_up (struct inode *dir)
-{
- wake_up (&UMSDOS_I(dir)->dir_info.p);
-}
-
-/*
- * Wait for creation exclusivity.
- * Return 0 if the dir was already available.
- * Return 1 if a wait was necessary.
- * When 1 is return, it means a wait was done. It does not
- * mean the directory is available.
- */
-static int umsdos_waitcreate (struct inode *dir)
-{
- int ret = 0;
-
- if (UMSDOS_I(dir)->dir_info.creating
- && UMSDOS_I(dir)->dir_info.pid != current->pid) {
- PRINTK (("creating && dir_info.pid=%lu, current->pid=%u\n", UMSDOS_I(dir)->dir_info.pid, current->pid));
- u_sleep_on (dir);
- ret = 1;
- }
- return ret;
-}
-
-/*
- * Wait for any lookup process to finish
- */
-static void umsdos_waitlookup (struct inode *dir)
-{
- while (UMSDOS_I(dir)->dir_info.looking) {
- u_sleep_on (dir);
- }
-}
-
-/*
- * Lock all other process out of this directory.
- */
-/* #Specification: file creation / not atomic
- * File creation is a two step process. First we create (allocate)
- * an entry in the EMD file and then (using the entry offset) we
- * build a unique name for MSDOS. We create this name in the msdos
- * space.
- *
- * We have to use semaphore (sleep_on/wake_up) to prevent lookup
- * into a directory when we create a file or directory and to
- * prevent creation while a lookup is going on. Since many lookup
- * may happen at the same time, the semaphore is a counter.
- *
- * Only one creation is allowed at the same time. This protection
- * may not be necessary. The problem arise mainly when a lookup
- * or a readdir is done while a file is partially created. The
- * lookup process see that as a "normal" problem and silently
- * erase the file from the EMD file. Normal because a file
- * may be erased during a MSDOS session, but not removed from
- * the EMD file.
- *
- * The locking is done on a directory per directory basis. Each
- * directory inode has its wait_queue.
- *
- * For some operation like hard link, things even get worse. Many
- * creation must occur at once (atomic). To simplify the design
- * a process is allowed to recursively lock the directory for
- * creation. The pid of the locking process is kept along with
- * a counter so a second level of locking is granted or not.
- */
-void umsdos_lockcreate (struct inode *dir)
-{
- /*
- * Wait for any creation process to finish except
- * if we (the process) own the lock
- */
- while (umsdos_waitcreate (dir) != 0);
- UMSDOS_I(dir)->dir_info.creating++;
- UMSDOS_I(dir)->dir_info.pid = current->pid;
- umsdos_waitlookup (dir);
-}
-
-/*
- * Lock all other process out of those two directories.
- */
-static void umsdos_lockcreate2 (struct inode *dir1, struct inode *dir2)
-{
- /*
- * We must check that both directory are available before
- * locking anyone of them. This is to avoid some deadlock.
- * Thanks to dglaude@is1.vub.ac.be (GLAUDE DAVID) for pointing
- * this to me.
- */
- while (1) {
- if (umsdos_waitcreate (dir1) == 0
- && umsdos_waitcreate (dir2) == 0) {
- /* We own both now */
- UMSDOS_I(dir1)->dir_info.creating++;
- UMSDOS_I(dir1)->dir_info.pid = current->pid;
- UMSDOS_I(dir2)->dir_info.creating++;
- UMSDOS_I(dir2)->dir_info.pid = current->pid;
- break;
- }
- }
- umsdos_waitlookup (dir1);
- umsdos_waitlookup (dir2);
-}
-
-/*
- * Wait until creation is finish in this directory.
- */
-void umsdos_startlookup (struct inode *dir)
-{
- while (umsdos_waitcreate (dir) != 0);
- UMSDOS_I(dir)->dir_info.looking++;
-}
-
-/*
- * Unlock the directory.
- */
-void umsdos_unlockcreate (struct inode *dir)
-{
- UMSDOS_I(dir)->dir_info.creating--;
- if (UMSDOS_I(dir)->dir_info.creating < 0) {
- printk ("UMSDOS: UMSDOS_I(dir)->dir_info.creating < 0: %d"
- ,UMSDOS_I(dir)->dir_info.creating);
- }
- u_wake_up (dir);
-}
-
-/*
- * Tell directory lookup is over.
- */
-void umsdos_endlookup (struct inode *dir)
-{
- UMSDOS_I(dir)->dir_info.looking--;
- if (UMSDOS_I(dir)->dir_info.looking < 0) {
- printk ("UMSDOS: UMSDOS_I(dir)->dir_info.looking < 0: %d"
- ,UMSDOS_I(dir)->dir_info.looking);
- }
- u_wake_up (dir);
-}
-
-#else
-static void umsdos_lockcreate (struct inode *dir)
-{
-}
-static void umsdos_lockcreate2 (struct inode *dir1, struct inode *dir2)
-{
-}
-void umsdos_startlookup (struct inode *dir)
-{
-}
-static void umsdos_unlockcreate (struct inode *dir)
-{
-}
-void umsdos_endlookup (struct inode *dir)
-{
-}
-
-#endif
-
-static int umsdos_nevercreat (struct inode *dir, struct dentry *dentry,
- int errcod)
-{
- int ret = 0;
-
- if (umsdos_is_pseudodos (dir, dentry)) {
- /* #Specification: pseudo root / any file creation /DOS
- * The pseudo sub-directory /DOS can't be created!
- * EEXIST is returned.
- *
- * The pseudo sub-directory /DOS can't be removed!
- * EPERM is returned.
- */
- ret = errcod;
- }
- return ret;
-}
-
-/*
- * Add a new file (ordinary or special) into the alternate directory.
- * The file is added to the real MSDOS directory. If successful, it
- * is then added to the EMD file.
- *
- * Return the status of the operation. 0 mean success.
- *
- * #Specification: create / file exists in DOS
- * Here is a situation: we are trying to create a file with
- * UMSDOS. The file is unknown to UMSDOS but already
- * exists in the DOS directory.
- *
- * Here is what we are NOT doing:
- *
- * We could silently assume that everything is fine
- * and allows the creation to succeed.
- *
- * It is possible not all files in the partition
- * are meant to be visible from linux. By trying to create
- * those file in some directory, one user may get access
- * to those file without proper permissions. Looks like
- * a security hole to me. Off course sharing a file system
- * with DOS is some kind of security hole :-)
- *
- * So ?
- *
- * We return EEXIST in this case.
- * The same is true for directory creation.
- */
-static int umsdos_create_any (struct inode *dir, struct dentry *dentry,
- int mode, dev_t rdev, char flags)
-{
- struct dentry *fake;
- struct inode *inode;
- int ret;
- struct umsdos_info info;
-
- ret = umsdos_nevercreat (dir, dentry, -EEXIST);
- if (ret)
- goto out;
-
- ret = umsdos_parse (dentry->d_name.name, dentry->d_name.len, &info);
- if (ret)
- goto out;
-
- info.entry.mode = mode;
- info.entry.rdev = rdev;
- info.entry.flags = flags;
- info.entry.uid = current->fsuid;
- info.entry.gid = (dir->i_mode & S_ISGID) ? dir->i_gid : current->fsgid;
- info.entry.ctime = info.entry.atime = info.entry.mtime = get_seconds();
- info.entry.nlink = 1;
- ret = umsdos_newentry (dentry->d_parent, &info);
- if (ret)
- goto out;
-
- /* do a real lookup to get the short name dentry */
- fake = umsdos_covered(dentry->d_parent, info.fake.fname, info.fake.len);
- ret = PTR_ERR(fake);
- if (IS_ERR(fake))
- goto out_remove;
-
- /* should not exist yet ... */
- ret = -EEXIST;
- if (fake->d_inode)
- goto out_remove_dput;
-
- ret = msdos_create (dir, fake, S_IFREG | 0777, NULL);
- if (ret)
- goto out_remove_dput;
-
- inode = fake->d_inode;
- atomic_inc(&inode->i_count);
- d_instantiate (dentry, inode);
- dput(fake);
- if (atomic_read(&inode->i_count) > 1) {
- printk(KERN_WARNING
- "umsdos_create_any: %s/%s, ino=%ld, icount=%d??\n",
- dentry->d_parent->d_name.name, dentry->d_name.name,
- inode->i_ino, atomic_read(&inode->i_count));
- }
- umsdos_lookup_patch_new(dentry, &info);
-
-out:
- return ret;
-
- /* Creation failed ... remove the EMD entry */
-out_remove_dput:
- dput(fake);
-out_remove:
- if (ret == -EEXIST)
- printk(KERN_WARNING "UMSDOS: out of sync, deleting %s/%s\n",
- dentry->d_parent->d_name.name, info.fake.fname);
- umsdos_delentry (dentry->d_parent, &info, S_ISDIR (info.entry.mode));
- goto out;
-}
-
-/*
- * Add a new file into the alternate directory.
- * The file is added to the real MSDOS directory. If successful, it
- * is then added to the EMD file.
- *
- * Return the status of the operation. 0 mean success.
- */
-int UMSDOS_create (struct inode *dir, struct dentry *dentry, int mode, struct nameidata *nd)
-{
- return umsdos_create_any (dir, dentry, mode, 0, 0);
-}
-
-
-/*
- * Initialise the new_entry from the old for a rename operation.
- * (Only useful for umsdos_rename_f() below).
- */
-static void umsdos_ren_init (struct umsdos_info *new_info,
- struct umsdos_info *old_info)
-{
- new_info->entry.mode = old_info->entry.mode;
- new_info->entry.rdev = old_info->entry.rdev;
- new_info->entry.uid = old_info->entry.uid;
- new_info->entry.gid = old_info->entry.gid;
- new_info->entry.ctime = old_info->entry.ctime;
- new_info->entry.atime = old_info->entry.atime;
- new_info->entry.mtime = old_info->entry.mtime;
- new_info->entry.flags = old_info->entry.flags;
- new_info->entry.nlink = old_info->entry.nlink;
-}
-
-/*
- * Rename a file (move) in the file system.
- */
-
-static int umsdos_rename_f (struct inode *old_dir, struct dentry *old_dentry,
- struct inode *new_dir, struct dentry *new_dentry,
- int flags)
-{
- struct inode *old_inode = old_dentry->d_inode;
- struct dentry *old, *new, *old_emd;
- int err, ret;
- struct umsdos_info old_info;
- struct umsdos_info new_info;
-
- ret = -EPERM;
- err = umsdos_parse (old_dentry->d_name.name,
- old_dentry->d_name.len, &old_info);
- if (err)
- goto out;
- err = umsdos_parse (new_dentry->d_name.name,
- new_dentry->d_name.len, &new_info);
- if (err)
- goto out;
-
- /* Get the EMD dentry for the old parent */
- old_emd = umsdos_get_emd_dentry(old_dentry->d_parent);
- ret = PTR_ERR(old_emd);
- if (IS_ERR(old_emd))
- goto out;
-
- umsdos_lockcreate2 (old_dir, new_dir);
-
- ret = umsdos_findentry(old_emd->d_parent, &old_info, 0);
- if (ret)
- goto out_unlock;
-
- err = umsdos_findentry(new_dentry->d_parent, &new_info, 0);
- if (err == 0) {
- /* check whether it _really_ exists ... */
- ret = -EEXIST;
- if (new_dentry->d_inode)
- goto out_unlock;
-
- /* bogus lookup? complain and fix up the EMD ... */
- printk(KERN_WARNING
- "umsdos_rename_f: entry %s/%s exists, inode NULL??\n",
- new_dentry->d_parent->d_name.name, new_info.entry.name);
- err = umsdos_delentry(new_dentry->d_parent, &new_info,
- S_ISDIR(new_info.entry.mode));
- }
-
- umsdos_ren_init (&new_info, &old_info);
- if (flags)
- new_info.entry.flags = flags;
- ret = umsdos_newentry (new_dentry->d_parent, &new_info);
- if (ret)
- goto out_unlock;
-
- /* If we're moving a hardlink, drop it first */
- if (old_info.entry.flags & UMSDOS_HLINK) {
- d_drop(old_dentry);
- }
-
- old = umsdos_covered(old_dentry->d_parent, old_info.fake.fname,
- old_info.fake.len);
- ret = PTR_ERR(old);
- if (IS_ERR(old))
- goto out_unlock;
- /* make sure it's the same inode! */
- ret = -ENOENT;
- /*
- * note: for hardlinks they will be different!
- * old_inode will contain inode of .LINKxxx file containing data, and
- * old->d_inode will contain inode of file containing path to .LINKxxx file
- */
- if (!(old_info.entry.flags & UMSDOS_HLINK)) {
- if (old->d_inode != old_inode)
- goto out_dput;
- }
-
- new = umsdos_covered(new_dentry->d_parent, new_info.fake.fname,
- new_info.fake.len);
- ret = PTR_ERR(new);
- if (IS_ERR(new))
- goto out_dput;
-
- /* Do the msdos-level rename */
- ret = msdos_rename (old_dir, old, new_dir, new);
-
- dput(new);
-
- /* If the rename failed, remove the new EMD entry */
- if (ret != 0) {
- umsdos_delentry (new_dentry->d_parent, &new_info,
- S_ISDIR (new_info.entry.mode));
- goto out_dput;
- }
-
- /*
- * Rename successful ... remove the old name from the EMD.
- * Note that we use the EMD parent here, as the old dentry
- * may have moved to a new parent ...
- */
- err = umsdos_delentry (old_emd->d_parent, &old_info,
- S_ISDIR (old_info.entry.mode));
- if (err) {
- /* Failed? Complain a bit, but don't fail the operation */
- printk(KERN_WARNING
- "umsdos_rename_f: delentry %s/%s failed, error=%d\n",
- old_emd->d_parent->d_name.name, old_info.entry.name,
- err);
- }
-
- /*
- * Update f_pos so notify_change will succeed
- * if the file was already in use.
- */
- umsdos_set_dirinfo_new(old_dentry, new_info.f_pos);
-
- /* dput() the dentry if we haven't already */
-out_dput:
- dput(old);
-
-out_unlock:
- dput(old_emd);
- umsdos_unlockcreate (old_dir);
- umsdos_unlockcreate (new_dir);
-
-out:
- Printk ((" _ret=%d\n", ret));
- return ret;
-}
-
-/*
- * Setup a Symbolic link or a (pseudo) hard link
- * Return a negative error code or 0 if OK.
- */
-/* #Specification: symbolic links / strategy
- * A symbolic link is simply a file which holds a path. It is
- * implemented as a normal MSDOS file (not very space efficient :-()
- *
- * I see two different ways to do this: One is to place the link data
- * in unused entries of the EMD file; the other is to have a separate
- * file dedicated to hold all symbolic links data.
- *
- * Let's go for simplicity...
- */
-
-/*
- * AV. Should be called with dir->i_sem down.
- */
-static int umsdos_symlink_x (struct inode *dir, struct dentry *dentry,
- const char *symname, int mode, char flags)
-{
- int ret, len;
-
- ret = umsdos_create_any (dir, dentry, mode, 0, flags);
- if (ret) {
- printk(KERN_WARNING
- "umsdos_symlink: create failed, ret=%d\n", ret);
- goto out;
- }
-
- len = strlen (symname) + 1;
- ret = page_symlink(dentry->d_inode, symname, len);
- if (ret < 0)
- goto out_unlink;
-out:
- return ret;
-
-out_unlink:
- printk(KERN_WARNING "umsdos_symlink: write failed, unlinking\n");
- UMSDOS_unlink (dir, dentry);
- d_drop(dentry);
- goto out;
-}
-
-/*
- * Setup a Symbolic link.
- * Return a negative error code or 0 if OK.
- */
-int UMSDOS_symlink ( struct inode *dir, struct dentry *dentry,
- const char *symname)
-{
- return umsdos_symlink_x (dir, dentry, symname, S_IFLNK | 0777, 0);
-}
-
-/*
- * Add a link to an inode in a directory
- */
-int UMSDOS_link (struct dentry *olddentry, struct inode *dir,
- struct dentry *dentry)
-{
- struct inode *oldinode = olddentry->d_inode;
- struct inode *olddir = olddentry->d_parent->d_inode;
- struct dentry *temp;
- char *path;
- unsigned long buffer;
- int ret;
- struct umsdos_info old_info;
- struct umsdos_info hid_info;
-
-#ifdef UMSDOS_DEBUG_VERBOSE
-printk("umsdos_link: new %s/%s -> %s/%s\n",
-dentry->d_parent->d_name.name, dentry->d_name.name,
-olddentry->d_parent->d_name.name, olddentry->d_name.name);
-#endif
-
- ret = -EPERM;
- if (S_ISDIR (oldinode->i_mode))
- goto out;
-
- ret = umsdos_nevercreat (dir, dentry, -EPERM);
- if (ret)
- goto out;
-
- ret = -ENOMEM;
- buffer = get_zeroed_page(GFP_KERNEL);
- if (!buffer)
- goto out;
-
- /*
- * Lock the link parent if it's not the same directory.
- */
- ret = -EDEADLOCK;
- if (olddir != dir) {
- if (atomic_read(&olddir->i_sem.count) < 1)
- goto out_free;
- down(&olddir->i_sem);
- }
-
- /*
- * Parse the name and get the visible directory entry.
- */
- ret = umsdos_parse (olddentry->d_name.name, olddentry->d_name.len,
- &old_info);
- if (ret)
- goto out_unlock;
- ret = umsdos_findentry (olddentry->d_parent, &old_info, 1);
- if (ret) {
-printk("UMSDOS_link: %s/%s not in EMD, ret=%d\n",
-olddentry->d_parent->d_name.name, olddentry->d_name.name, ret);
- goto out_unlock;
- }
-
- /*
- * If the visible dentry is a pseudo-hardlink, the original
- * file must be already hidden.
- */
- if (!(old_info.entry.flags & UMSDOS_HLINK)) {
- int err;
-
- /* create a hidden link name */
- ret = umsdos_newhidden (olddentry->d_parent, &hid_info);
- if (ret) {
-printk("umsdos_link: can't make hidden %s/%s, ret=%d\n",
-olddentry->d_parent->d_name.name, hid_info.entry.name, ret);
- goto out_unlock;
- }
-
- /*
- * Make a dentry and rename the original file ...
- */
- temp = umsdos_lookup_dentry(olddentry->d_parent,
- hid_info.entry.name,
- hid_info.entry.name_len, 0);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp)) {
-printk("umsdos_link: lookup %s/%s failed, ret=%d\n",
-dentry->d_parent->d_name.name, hid_info.entry.name, ret);
- goto cleanup;
- }
- /* rename the link to the hidden location ... */
- ret = umsdos_rename_f(olddir, olddentry, olddir, temp,
- UMSDOS_HIDDEN);
- d_move(olddentry, temp);
- dput(temp);
- if (ret) {
-printk("umsdos_link: rename to %s/%s failed, ret=%d\n",
-temp->d_parent->d_name.name, temp->d_name.name, ret);
- goto cleanup;
- }
- /* mark the inode as a hardlink */
- UMSDOS_I(oldinode)->i_is_hlink = 1;
-
- /*
- * Capture the path to the hidden link.
- */
- path = umsdos_d_path(olddentry, (char *) buffer, PAGE_SIZE);
-Printk(("umsdos_link: hidden link path=%s\n", path));
-
- /*
- * Recreate a dentry for the original name and symlink it,
- * then symlink the new dentry. Don't give up if one fails,
- * or we'll lose the file completely!
- *
- * Note: this counts as the "original" reference, so we
- * don't increment i_nlink for this one.
- */
- temp = umsdos_lookup_dentry(olddentry->d_parent,
- old_info.entry.name,
- old_info.entry.name_len, 0);
- ret = PTR_ERR(temp);
- if (!IS_ERR(temp)) {
- ret = umsdos_symlink_x (olddir, temp, path,
- S_IFREG | 0777, UMSDOS_HLINK);
- dput(temp);
- }
-
- /* This symlink increments i_nlink (see below.) */
- err = umsdos_symlink_x (dir, dentry, path,
- S_IFREG | 0777, UMSDOS_HLINK);
- /* fold the two errors */
- if (!ret)
- ret = err;
- goto out_unlock;
-
- /* creation failed ... remove the link entry */
- cleanup:
-printk("umsdos_link: link failed, ret=%d, removing %s/%s\n",
-ret, olddentry->d_parent->d_name.name, hid_info.entry.name);
- err = umsdos_delentry(olddentry->d_parent, &hid_info, 0);
- goto out_unlock;
- }
-
-Printk(("UMSDOS_link: %s/%s already hidden\n",
-olddentry->d_parent->d_name.name, olddentry->d_name.name));
- /*
- * The original file is already hidden, and we need to get
- * the dentry for its real name, not the visible name.
- * N.B. make sure it's the hidden inode ...
- */
- if (!UMSDOS_I(oldinode)->i_is_hlink)
- printk("UMSDOS_link: %s/%s hidden, ino=%ld not hlink??\n",
- olddentry->d_parent->d_name.name,
- olddentry->d_name.name, oldinode->i_ino);
-
- /*
- * In order to get the correct (real) inode, we just drop
- * the original dentry.
- */
- d_drop(olddentry);
-Printk(("UMSDOS_link: hard link %s/%s, fake=%s\n",
-olddentry->d_parent->d_name.name, olddentry->d_name.name, old_info.fake.fname));
-
- /* Do a real lookup to get the short name dentry */
- temp = umsdos_covered(olddentry->d_parent, old_info.fake.fname,
- old_info.fake.len);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp))
- goto out_unlock;
-
- /* now resolve the link ... */
- temp = umsdos_solve_hlink(temp);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp))
- goto out_unlock;
- path = umsdos_d_path(temp, (char *) buffer, PAGE_SIZE);
- dput(temp);
-Printk(("umsdos_link: %s/%s already hidden, path=%s\n",
-olddentry->d_parent->d_name.name, olddentry->d_name.name, path));
-
- /* finally we can symlink it ... */
- ret = umsdos_symlink_x (dir, dentry, path, S_IFREG | 0777,UMSDOS_HLINK);
-
-out_unlock:
- /* remain locked for the call to notify_change ... */
- if (ret == 0) {
- struct iattr newattrs;
-
- /* Do a real lookup to get the short name dentry */
- temp = umsdos_covered(olddentry->d_parent,
- old_info.fake.fname,
- old_info.fake.len);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp))
- goto out_unlock2;
-
- /* now resolve the link ... */
- temp = umsdos_solve_hlink(temp);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp))
- goto out_unlock2;
-
-
-#ifdef UMSDOS_PARANOIA
-if (!UMSDOS_I(oldinode)->i_is_hlink)
-printk("UMSDOS_link: %s/%s, ino=%ld, not marked as hlink!\n",
-olddentry->d_parent->d_name.name, olddentry->d_name.name, oldinode->i_ino);
-#endif
- temp->d_inode->i_nlink++;
-Printk(("UMSDOS_link: linked %s/%s, ino=%ld, nlink=%d\n",
-olddentry->d_parent->d_name.name, olddentry->d_name.name,
-oldinode->i_ino, oldinode->i_nlink));
- newattrs.ia_valid = 0;
- ret = umsdos_notify_change_locked(temp, &newattrs);
- if (ret == 0)
- mark_inode_dirty(temp->d_inode);
- dput(temp);
-out_unlock2:
- if (ret == 0)
- mark_inode_dirty(olddentry->d_inode);
- }
- if (olddir != dir)
- up(&olddir->i_sem);
-
-out_free:
- free_page(buffer);
-out:
- Printk (("umsdos_link %d\n", ret));
- return ret;
-}
-
-
-/*
- * Add a sub-directory in a directory
- */
-/* #Specification: mkdir / Directory already exist in DOS
- * We do the same thing as for file creation.
- * For all user it is an error.
- */
-/* #Specification: mkdir / umsdos directory / create EMD
- * When we created a new sub-directory in a UMSDOS
- * directory (one with full UMSDOS semantics), we
- * create immediately an EMD file in the new
- * sub-directory so it inherits UMSDOS semantics.
- */
-int UMSDOS_mkdir (struct inode *dir, struct dentry *dentry, int mode)
-{
- struct dentry *temp;
- struct inode *inode;
- int ret, err;
- struct umsdos_info info;
-
- ret = umsdos_nevercreat (dir, dentry, -EEXIST);
- if (ret)
- goto out;
-
- ret = umsdos_parse (dentry->d_name.name, dentry->d_name.len, &info);
- if (ret)
- goto out;
-
- info.entry.mode = mode | S_IFDIR;
- info.entry.rdev = 0;
- info.entry.uid = current->fsuid;
- info.entry.gid = (dir->i_mode & S_ISGID) ? dir->i_gid : current->fsgid;
- info.entry.ctime = info.entry.atime = info.entry.mtime = get_seconds();
- info.entry.flags = 0;
- info.entry.nlink = 1;
- ret = umsdos_newentry (dentry->d_parent, &info);
- if (ret)
- goto out;
-
- /* lookup the short name dentry */
- temp = umsdos_covered(dentry->d_parent, info.fake.fname, info.fake.len);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp))
- goto out_remove;
-
- /* Make sure the short name doesn't exist */
- ret = -EEXIST;
- if (temp->d_inode) {
-printk("umsdos_mkdir: short name %s/%s exists\n",
-dentry->d_parent->d_name.name, info.fake.fname);
- goto out_remove_dput;
- }
-
- ret = msdos_mkdir (dir, temp, mode);
- if (ret)
- goto out_remove_dput;
-
- /*
- * Lock the inode to protect the EMD creation ...
- */
- inode = temp->d_inode;
- down(&inode->i_sem);
-
- atomic_inc(&inode->i_count);
- d_instantiate(dentry, inode);
-
- /* N.B. this should have an option to create the EMD ... */
- umsdos_lookup_patch_new(dentry, &info);
-
- /*
- * Create the EMD file, and set up the dir so it is
- * promoted to EMD with the EMD file invisible.
- *
- * N.B. error return if EMD fails?
- */
- err = umsdos_make_emd(dentry);
- umsdos_setup_dir(dentry);
-
- up(&inode->i_sem);
- dput(temp);
-
-out:
- Printk(("umsdos_mkdir: %s/%s, ret=%d\n",
- dentry->d_parent->d_name.name, dentry->d_name.name, ret));
- return ret;
-
- /* an error occurred ... remove EMD entry. */
-out_remove_dput:
- dput(temp);
-out_remove:
- umsdos_delentry (dentry->d_parent, &info, 1);
- goto out;
-}
-
-/*
- * Add a new device special file into a directory.
- *
- * #Specification: Special files / strategy
- * Device special file, pipes, etc ... are created like normal
- * file in the msdos file system. Of course they remain empty.
- *
- * One strategy was to create those files only in the EMD file
- * since they were not important for MSDOS. The problem with
- * that, is that there were not getting inode number allocated.
- * The MSDOS filesystems is playing a nice game to fake inode
- * number, so why not use it.
- *
- * The absence of inode number compatible with those allocated
- * for ordinary files was causing major trouble with hard link
- * in particular and other parts of the kernel I guess.
- */
-int UMSDOS_mknod (struct inode *dir, struct dentry *dentry,
- int mode, dev_t rdev)
-{
- return umsdos_create_any (dir, dentry, mode, rdev, 0);
-}
-
-/*
- * Remove a sub-directory.
- */
-int UMSDOS_rmdir (struct inode *dir, struct dentry *dentry)
-{
- struct dentry *temp;
- int ret, err, empty;
- struct umsdos_info info;
-
- ret = umsdos_nevercreat (dir, dentry, -EPERM);
- if (ret)
- goto out;
-
- ret = -EBUSY;
- if (!d_unhashed(dentry))
- goto out;
-
- /* check whether the EMD is empty */
- ret = -ENOTEMPTY;
- empty = umsdos_isempty (dentry);
-
- /* Have to remove the EMD file? */
- if (empty == 1) {
- struct dentry *demd;
-
- demd = umsdos_get_emd_dentry(dentry);
- if (!IS_ERR(demd)) {
- err = -ENOENT;
- if (demd->d_inode)
- err = msdos_unlink (dentry->d_inode, demd);
-Printk (("UMSDOS_rmdir: unlinking empty EMD err=%d", err));
-#ifdef UMSDOS_PARANOIA
-if (err)
-printk("umsdos_rmdir: EMD %s/%s unlink failed, err=%d\n",
-demd->d_parent->d_name.name, demd->d_name.name, err);
-#endif
- if (!err) {
- d_delete(demd);
- ret = 0;
- }
- dput(demd);
- }
- } else if (empty == 2)
- ret = 0;
- if (ret)
- goto out;
-
- umsdos_parse (dentry->d_name.name, dentry->d_name.len, &info);
- /* Call findentry to complete the mangling */
- umsdos_findentry (dentry->d_parent, &info, 2);
- temp = umsdos_covered(dentry->d_parent, info.fake.fname, info.fake.len);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp))
- goto out;
- /*
- * Attempt to remove the msdos name.
- */
- ret = msdos_rmdir (dir, temp);
- if (ret && ret != -ENOENT)
- goto out_dput;
-
- d_delete(temp);
- /* OK so far ... remove the name from the EMD */
- ret = umsdos_delentry (dentry->d_parent, &info, 1);
-#ifdef UMSDOS_PARANOIA
-if (ret)
-printk("umsdos_rmdir: delentry %s failed, ret=%d\n", info.entry.name, ret);
-#endif
-
- /* dput() temp if we didn't do it above */
-out_dput:
- dput(temp);
-
-out:
- Printk (("umsdos_rmdir %d\n", ret));
- return ret;
-}
-
-
-/*
- * Remove a file from the directory.
- *
- * #Specification: hard link / deleting a link
- * When we delete a file and this file is a link,
- * we must subtract 1 from the nlink field of the
- * hidden link.
- *
- * If the count goes to 0, we delete this hidden
- * link too.
- */
-int UMSDOS_unlink (struct inode *dir, struct dentry *dentry)
-{
- struct dentry *temp, *link = NULL;
- struct inode *inode;
- int ret;
- struct umsdos_info info;
-
-Printk(("UMSDOS_unlink: entering %s/%s\n",
-dentry->d_parent->d_name.name, dentry->d_name.name));
-
- ret = umsdos_nevercreat (dir, dentry, -EPERM);
- if (ret)
- goto out;
-
- ret = umsdos_parse (dentry->d_name.name, dentry->d_name.len, &info);
- if (ret)
- goto out;
-
- umsdos_lockcreate (dir);
- ret = umsdos_findentry (dentry->d_parent, &info, 1);
- if (ret) {
-printk("UMSDOS_unlink: %s/%s not in EMD, ret=%d\n",
-dentry->d_parent->d_name.name, dentry->d_name.name, ret);
- goto out_unlock;
- }
-
-Printk (("UMSDOS_unlink %.*s ", info.fake.len, info.fake.fname));
-
- /*
- * Note! If this is a hardlink and the names are aliased,
- * the short-name lookup will return the hardlink dentry.
- * In order to get the correct (real) inode, we just drop
- * the original dentry.
- */
- if (info.entry.flags & UMSDOS_HLINK) {
- d_drop(dentry);
- }
-
- /* Do a real lookup to get the short name dentry */
- temp = umsdos_covered(dentry->d_parent, info.fake.fname, info.fake.len);
- ret = PTR_ERR(temp);
- if (IS_ERR(temp))
- goto out_unlock;
-
- /*
- * Resolve hardlinks now, but defer processing until later.
- */
- if (info.entry.flags & UMSDOS_HLINK) {
- link = umsdos_solve_hlink(dget(temp));
- }
-
- /* Delete the EMD entry */
- ret = umsdos_delentry (dentry->d_parent, &info, 0);
- if (ret && ret != -ENOENT) {
- printk(KERN_WARNING "UMSDOS_unlink: delentry %s, error=%d\n",
- info.entry.name, ret);
- goto out_dput;
- }
-
- ret = msdos_unlink(dir, temp);
- if (!ret)
- d_delete(temp);
-#ifdef UMSDOS_PARANOIA
-if (ret)
-printk("umsdos_unlink: %s/%s unlink failed, ret=%d\n",
-temp->d_parent->d_name.name, temp->d_name.name, ret);
-#endif
-
- /* dput() temp if we didn't do it above */
-out_dput:
- dput(temp);
-
-out_unlock:
- umsdos_unlockcreate (dir);
-
- /*
- * Now check for deferred handling of a hardlink.
- */
- if (!link)
- goto out;
-
- if (IS_ERR(link)) {
-printk("umsdos_unlink: failed to resolve %s/%s\n",
-dentry->d_parent->d_name.name, dentry->d_name.name);
- if (!ret)
- ret = PTR_ERR(link);
- goto out;
- }
-
-Printk(("umsdos_unlink: link %s/%s deferred, pending ret=%d\n",
-link->d_parent->d_name.name, link->d_name.name, ret));
-
- /* already have an error? */
- if (ret)
- goto out_cleanup;
-
- /* make sure the link exists ... */
- inode = link->d_inode;
- if (!inode) {
- printk(KERN_WARNING "umsdos_unlink: hard link not found\n");
- goto out_cleanup;
- }
-
- /*
- * If this was the last linked reference, delete it now.
- *
- * N.B. Deadlock problem? We should be holding the lock
- * for the hardlink's parent, but another process might
- * be holding that lock waiting for us to finish ...
- */
- if (inode->i_nlink <= 1) {
- ret = UMSDOS_unlink (link->d_parent->d_inode, link);
- if (ret) {
- printk(KERN_WARNING
- "umsdos_unlink: link removal failed, ret=%d\n",
- ret);
- } else
- d_delete(link);
- } else {
- struct iattr newattrs;
- inode->i_nlink--;
- newattrs.ia_valid = 0;
- ret = umsdos_notify_change_locked(link, &newattrs);
- if (!ret)
- mark_inode_dirty(link->d_inode);
- }
-
-out_cleanup:
- d_drop(link);
- dput(link);
-
-out:
- Printk (("umsdos_unlink %d\n", ret));
- return ret;
-}
-
-/*
- * Rename (move) a file.
- */
-int UMSDOS_rename (struct inode *old_dir, struct dentry *old_dentry,
- struct inode *new_dir, struct dentry *new_dentry)
-{
- int ret;
-
- ret = umsdos_nevercreat (new_dir, new_dentry, -EEXIST);
- if (ret)
- return ret;
-
- /*
- * If the target already exists, delete it first.
- */
- if (new_dentry->d_inode) {
- dget(new_dentry);
- if (S_ISDIR(old_dentry->d_inode->i_mode))
- ret = UMSDOS_rmdir (new_dir, new_dentry);
- else
- ret = UMSDOS_unlink (new_dir, new_dentry);
- if (!ret)
- d_drop(new_dentry);
- dput(new_dentry);
- if (ret)
- return ret;
- }
- ret = umsdos_rename_f(old_dir, old_dentry, new_dir, new_dentry, 0);
- return ret;
-}
+++ /dev/null
-/*
- * linux/fs/umsdos/rdir.c
- *
- * Written 1994 by Jacques Gelinas
- *
- * Extended MS-DOS directory pure MS-DOS handling functions
- * (For directory without EMD file).
- */
-
-#include <linux/time.h>
-#include <linux/fs.h>
-#include <linux/msdos_fs.h>
-#include <linux/errno.h>
-#include <linux/stat.h>
-#include <linux/limits.h>
-#include <linux/umsdos_fs.h>
-#include <linux/slab.h>
-#include <linux/smp_lock.h>
-
-#include <asm/uaccess.h>
-
-
-extern struct dentry *saved_root;
-extern struct inode *pseudo_root;
-extern struct dentry_operations umsdos_dentry_operations;
-
-struct RDIR_FILLDIR {
- void *dirbuf;
- filldir_t filldir;
- int real_root;
-};
-
-static int rdir_filldir ( void *buf,
- const char *name,
- int name_len,
- loff_t offset,
- ino_t ino,
- unsigned int d_type)
-{
- int ret = 0;
- struct RDIR_FILLDIR *d = (struct RDIR_FILLDIR *) buf;
-
- if (d->real_root) {
- PRINTK ((KERN_DEBUG "rdir_filldir /mn/: real root!\n"));
- /* real root of a pseudo_rooted partition */
- if (name_len != UMSDOS_PSDROOT_LEN
- || memcmp (name, UMSDOS_PSDROOT_NAME, UMSDOS_PSDROOT_LEN) != 0) {
- /* So it is not the /linux directory */
- if (name_len == 2 && name[0] == '.' && name[1] == '.') {
- /* Make sure the .. entry points back to the pseudo_root */
- ino = pseudo_root->i_ino;
- }
- ret = d->filldir (d->dirbuf, name, name_len, offset, ino, DT_UNKNOWN);
- }
- } else {
- /* Any DOS directory */
- ret = d->filldir (d->dirbuf, name, name_len, offset, ino, DT_UNKNOWN);
- }
- return ret;
-}
-
-
-static int UMSDOS_rreaddir (struct file *filp, void *dirbuf, filldir_t filldir)
-{
- struct inode *dir = filp->f_dentry->d_inode;
- struct RDIR_FILLDIR bufk;
- int ret;
-
- lock_kernel();
- bufk.filldir = filldir;
- bufk.dirbuf = dirbuf;
- bufk.real_root = pseudo_root && (dir == saved_root->d_inode);
- ret = fat_readdir (filp, &bufk, rdir_filldir);
- unlock_kernel();
- return ret;
-}
-
-
-/*
- * Lookup into a non promoted directory.
- * If the result is a directory, make sure we find out if it is
- * a promoted one or not (calling umsdos_setup_dir_inode(inode)).
- */
-/* #Specification: pseudo root / DOS/..
- * In the real root directory (c:\), the directory ..
- * is the pseudo root (c:\linux).
- */
-struct dentry *umsdos_rlookup_x ( struct inode *dir, struct dentry *dentry, int nopseudo)
-{
- struct dentry *ret;
-
- if (saved_root && dir == saved_root->d_inode && !nopseudo &&
- dentry->d_name.len == UMSDOS_PSDROOT_LEN &&
- memcmp (dentry->d_name.name, UMSDOS_PSDROOT_NAME, UMSDOS_PSDROOT_LEN) == 0) {
- /* #Specification: pseudo root / DOS/linux
- * Even in the real root directory (c:\), the directory
- * /linux won't show
- */
-
- ret = ERR_PTR(-ENOENT);
- goto out;
- }
-
- ret = msdos_lookup (dir, dentry, NULL);
- if (ret) {
- printk(KERN_WARNING
- "umsdos_rlookup_x: %s/%s failed, ret=%ld\n",
- dentry->d_parent->d_name.name, dentry->d_name.name,
- PTR_ERR(ret));
- goto out;
- }
- if (dentry->d_inode) {
- /* We must install the proper function table
- * depending on whether this is an MS-DOS or
- * a UMSDOS directory
- */
-Printk ((KERN_DEBUG "umsdos_rlookup_x: patch_dentry_inode %s/%s\n",
-dentry->d_parent->d_name.name, dentry->d_name.name));
-/* only patch if needed (because we get called even for lookup
- (not only rlookup) stuff sometimes, like in umsdos_covered() */
- if (UMSDOS_I(dentry->d_inode)->i_patched == 0)
- umsdos_patch_dentry_inode(dentry, 0);
-
- }
-out:
- /* always install our dentry ops ... */
- dentry->d_op = &umsdos_dentry_operations;
- return ret;
-}
-
-
-struct dentry *UMSDOS_rlookup ( struct inode *dir, struct dentry *dentry, struct nameidata *nd)
-{
- return umsdos_rlookup_x (dir, dentry, 0);
-}
-
-
-/* #Specification: dual mode / rmdir in a DOS directory
- * In a DOS (not EMD in it) directory, we use a reverse strategy
- * compared with a UMSDOS directory. We assume that a subdirectory
- * of a DOS directory is also a DOS directory. This is not always
- * true (umssync may be used anywhere), but makes sense.
- *
- * So we call msdos_rmdir() directly. If it failed with a -ENOTEMPTY
- * then we check if it is a Umsdos directory. We check if it is
- * really empty (only . .. and --linux-.--- in it). If it is true
- * we remove the EMD and do a msdos_rmdir() again.
- *
- * In a Umsdos directory, we assume all subdirectories are also
- * Umsdos directories, so we check the EMD file first.
- */
-/* #Specification: pseudo root / rmdir /DOS
- * The pseudo sub-directory /DOS can't be removed!
- * This is done even if the pseudo root is not a Umsdos
- * directory anymore (very unlikely), but an accident (under
- * MS-DOS) is always possible.
- *
- * EPERM is returned.
- */
-static int UMSDOS_rrmdir ( struct inode *dir, struct dentry *dentry)
-{
- int ret, empty;
-
- ret = -EPERM;
- if (umsdos_is_pseudodos (dir, dentry))
- goto out;
-
- ret = -EBUSY;
- if (!d_unhashed(dentry))
- goto out;
-
- ret = msdos_rmdir (dir, dentry);
- if (ret != -ENOTEMPTY)
- goto out;
-
- empty = umsdos_isempty (dentry);
- if (empty == 1) {
- struct dentry *demd;
- /* We have to remove the EMD file. */
- demd = umsdos_get_emd_dentry(dentry);
- ret = PTR_ERR(demd);
- if (!IS_ERR(demd)) {
- ret = 0;
- if (demd->d_inode)
- ret = msdos_unlink (dentry->d_inode, demd);
- if (!ret)
- d_delete(demd);
- dput(demd);
- }
- }
- if (ret)
- goto out;
-
- /* now retry the original ... */
- ret = msdos_rmdir (dir, dentry);
-
-out:
- return ret;
-}
-
-/* #Specification: dual mode / introduction
- * One goal of UMSDOS is to allow a practical and simple coexistence
- * between MS-DOS and Linux in a single partition. Using the EMD file
- * in each directory, UMSDOS adds Unix semantics and capabilities to
- * a normal DOS filesystem. To help and simplify coexistence, here is
- * the logic related to the EMD file.
- *
- * If it is missing, then the directory is managed by the MS-DOS driver.
- * The names are limited to DOS limits (8.3). No links, no device special
- * and pipe and so on.
- *
- * If it is there, it is the directory. If it is there but empty, then
- * the directory looks empty. The utility umssync allows synchronisation
- * of the real DOS directory and the EMD.
- *
- * Whenever umssync is applied to a directory without EMD, one is
- * created on the fly. The directory is promoted to full Unix semantics.
- * Of course, the ls command will show exactly the same content as before
- * the umssync session.
- *
- * It is believed that the user/admin will promote directories to Unix
- * semantics as needed.
- *
- * The strategy to implement this is to use two function table (struct
- * inode_operations). One for true UMSDOS directory and one for directory
- * with missing EMD.
- *
- * Functions related to the DOS semantic (but aware of UMSDOS) generally
- * have a "r" prefix (r for real) such as UMSDOS_rlookup, to differentiate
- * from the one with full UMSDOS semantics.
- */
-struct file_operations umsdos_rdir_operations =
-{
- .read = generic_read_dir,
- .readdir = UMSDOS_rreaddir,
- .ioctl = UMSDOS_ioctl_dir,
-};
-
-struct inode_operations umsdos_rdir_inode_operations =
-{
- .create = msdos_create,
- .lookup = UMSDOS_rlookup,
- .unlink = msdos_unlink,
- .mkdir = msdos_mkdir,
- .rmdir = UMSDOS_rrmdir,
- .rename = msdos_rename,
- .setattr = UMSDOS_notify_change,
-};
+++ /dev/null
-/* #Specification: umsdos / readdir
- * umsdos_readdir() should fill a struct dirent with
- * an inode number. The cheap way to get it is to
- * do a lookup in the MSDOS directory for each
- * entry processed by the readdir() function.
- * This is not very efficient, but very simple. The
- * other way around is to maintain a copy of the inode
- * number in the EMD file. This is a problem because
- * this has to be maintained in sync using tricks.
- * Remember that MSDOS (the OS) does not update the
- * modification time (mtime) of a directory. There is
- * no easy way to tell that a directory was modified
- * during a DOS session and synchronise the EMD file.
- */
- /* #Specification: readdir / . and ..
- * The msdos filesystem manages the . and .. entry properly
- * so the EMD file won't hold any info about it.
- *
- * In readdir, we assume that for the root directory
- * the read position will be 0 for ".", 1 for "..". For
- * a non root directory, the read position will be 0 for "."
- * and 32 for "..".
- */
- /*
- * This is a trick used by the msdos file system (fs/msdos/dir.c)
- * to manage . and .. for the root directory of a file system.
- * Since there is no such entry in the root, fs/msdos/dir.c
- * use the following:
- *
- * if f_pos == 0, return ".".
- * if f_pos == 1, return "..".
- *
- * So let msdos handle it
- *
- * Since umsdos entries are much larger, we share the same f_pos.
- * if f_pos is 0 or 1 or 32, we are clearly looking at . and
- * ..
- *
- * As soon as we get f_pos == 2 or f_pos == 64, then back to
- * 0, but this time we are reading the EMD file.
- *
- * Well, not so true. The problem, is that UMSDOS_REC_SIZE is
- * also 64, so as soon as we read the first record in the
- * EMD, we are back at offset 64. So we set the offset
- * to UMSDOS_SPECIAL_DIRFPOS(3) as soon as we have read the
- * .. entry from msdos.
- *
- * Now (linux 1.3), umsdos_readdir can read more than one
- * entry even if we limit (umsdos_dir_once) to only one:
- * It skips over hidden file. So we switch to
- * UMSDOS_SPECIAL_DIRFPOS as soon as we have read successfully
- * the .. entry.
- */
- /* #Specification: umsdos / lookup / inode info
- * After successfully reading an inode from the MSDOS
- * filesystem, we use the EMD file to complete it.
- * We update the following field.
- *
- * uid, gid, atime, ctime, mtime, mode.
- *
- * We rely on MSDOS for mtime. If the file
- * was modified during an MSDOS session, at least
- * mtime will be meaningful. We do this only for regular
- * file.
- *
- * We don't rely on MS-DOS for mtime for directories
- * because the MS-DOS date on a directory is its
- * creation time (strange MSDOS behavior) which
- * corresponds to none of the three Unix time stamps.
- */
- /* #Specification: umsdos / conversion mode
- * The msdos filesystem can do some inline conversion
- * of the data of a file. It can translate silently
- * from the MS-DOS text file format to the Unix one
- * (CRLF -> LF) while reading, and the reverse
- * while writing. This is activated using the mount
- * option conv=....
- *
- * This is not useful for Linux files in a promoted
- * directory. It can even be harmful. For this
- * reason, the binary (no conversion) mode is
- * always activated.
- */
- /* #Specification: umsdos / conversion mode / todo
- * A flag could be added to file and directories
- * forcing an automatic conversion mode (as
- * done with the msdos filesystem).
- *
- * This flag could be setup on a directory basis
- * (instead of file) and all files in it would
- * logically inherit it. If the conversion mode
- * is active (conv=) then the i_binary flag would
- * be left untouched in those directories.
- *
- * It was proposed that the sticky bit be used to set
- * this. A problem with that is that new files would
- * be written incorrectly. The other problem is that
- * the sticky bit has a meaning for directories. So
- * another bit should be used (there is some space
- * in the EMD file for it) and a special utility
- * would be used to assign the flag to a directory).
- * I don't think it is useful to assign this flag
- * on a single file.
- */
- * #Specification: weakness / rename
- * There is a case where UMSDOS rename has a different behavior
- * than a normal Unix file system. Renaming an open file across
- * directory boundary does not work. Renaming an open file within
- * a directory does work, however.
- *
- * The problem may is in Linux VFS driver for msdos.
- * I believe this is not a bug but a design feature, because
- * an inode number represents some sort of directory address
- * in the MSDOS directory structure, so moving the file into
- * another directory does not preserve the inode number.
- */
-/* #Specification: rename / new name exist
- * If the destination name already exists, it will
- * silently be removed. EXT2 does it this way
- * and this is the spec of SunOS. So does UMSDOS.
- *
- * If the destination is an empty directory it will
- * also be removed.
- */
-/* #Specification: rename / new name exist / possible flaw
- * The code to handle the deletion of the target (file
- * and directory) use to be in umsdos_rename_f, surrounded
- * by proper directory locking. This was ensuring that only
- * one process could achieve a rename (modification) operation
- * in the source and destination directory. This was also
- * ensuring the operation was "atomic".
- *
- * This has been changed because this was creating a
- * stack overflow (the stack is only 4 kB) in the kernel. To avoid
- * the code doing the deletion of the target (if exist) has
- * been moved to a upper layer. umsdos_rename_f is tried
- * once and if it fails with EEXIST, the target is removed
- * and umsdos_rename_f is done again.
- *
- * This makes the code cleaner and may solve a
- * deadlock problem one tester was experiencing.
- *
- * The point is to mention that possibly, the semantic of
- * "rename" may be wrong. Anyone dare to check that :-)
- * Be aware that IF it is wrong, to produce the problem you
- * will need two process trying to rename a file to the
- * same target at the same time. Again, I am not sure it
- * is a problem at all.
- */
-
-/* #Specification: hard link / strategy
- * Hard links are difficult to implement on top of an MS-DOS FAT file
- * system. Unlike Unix file systems, there are no inodes. A directory
- * entry holds the functionality of the inode and the entry.
- *
- * We will used the same strategy as a normal Unix file system
- * (with inodes) except we will do it symbolically (using paths).
- *
- * Because anything can happen during a DOS session (defragment,
- * directory sorting, etc.), we can't rely on an MS-DOS pseudo
- * inode number to record the link. For this reason, the link
- * will be done using hidden symbolic links. The following
- * scenario illustrates how it works.
- *
- * Given a file /foo/file
- *
- * #
- * ln /foo/file /tmp/file2
- *
- * become internally
- *
- * mv /foo/file /foo/-LINK1
- * ln -s /foo/-LINK1 /foo/file
- * ln -s /foo/-LINK1 /tmp/file2
- * #
- *
- * Using this strategy, we can operate on /foo/file or /foo/file2.
- * We can remove one and keep the other, like a normal Unix hard link.
- * We can rename /foo/file or /tmp/file2 independently.
- *
- * The entry -LINK1 will be hidden. It will hold a link count.
- * When all link are erased, the hidden file is erased too.
- */
-
-/* #Specification: weakness / hard link
- * The strategy for hard link introduces a side effect that
- * may or may not be acceptable. Here is the sequence
- *
- * #
- * mkdir subdir1
- * touch subdir1/file
- * mkdir subdir2
- * ln subdir1/file subdir2/file
- * rm subdir1/file
- * rmdir subdir1
- * rmdir: subdir1: Directory not empty
- * #
- *
- * This happen because there is an invisible file (--link) in
- * subdir1 which is referenced by subdir2/file.
- *
- * Any idea ?
- */
-/* #Specification: weakness / hard link / rename directory
- * Another weakness of hard link come from the fact that
- * it is based on hidden symbolic links. Here is an example.
- *
- * #
- * mkdir /subdir1
- * touch /subdir1/file
- * mkdir /subdir2
- * ln /subdir1/file subdir2/file
- * mv /subdir1 subdir3
- * ls -l /subdir2/file
- * #
- *
- * Since /subdir2/file is a hidden symbolic link
- * to /subdir1/..hlinkNNN, accessing it will fail since
- * /subdir1 does not exist anymore (has been renamed).
- */
-/* #Specification: hard link / directory
- * A hard link can't be made on a directory. EPERM is returned
- * in this case.
- */
-/* #Specification: hard link / first hard link
- * The first time a hard link is done on a file, this
- * file must be renamed and hidden. Then an internal
- * symbolic link must be done on the hidden file.
- *
- * The second link is done after on this hidden file.
- *
- * It is expected that the Linux MSDOS file system
- * keeps the same pseudo inode when a rename operation
- * is done on a file in the same directory.
- */
-/* #Specification: function name / convention
- * A simple convention for function names has been used in
- * the UMSDOS filesystem. First, all functions use the prefix
- * umsdos_ to avoid name clashes with other parts of the kernel.
- *
- * Standard VFS entry points use the prefix UMSDOS (upper case)
- * so it's easier to tell them apart.
- * N.B. (FIXME) PTW, the order and contents of this struct changed.
- */
-
-/* #Specification: mount / options
- * Umsdos run on top of msdos. Currently, it supports no
- * mount option, but happily pass all option received to
- * the msdos driver. I am not sure if all msdos mount option
- * make sense with Umsdos. Here are at least those who
- * are useful.
- * uid=
- * gid=
- *
- * These options affect the operation of umsdos in directories
- * which do not have an EMD file. They behave like normal
- * msdos directory, with all limitation of msdos.
- */
-
-/* #Specification: pseudo root / mount
- * When a umsdos fs is mounted, a special handling is done
- * if it is the root partition. We check for the presence
- * of the file /linux/etc/init or /linux/etc/rc or
- * /linux/sbin/init. If one is there, we do a chroot("/linux").
- *
- * We check both because (see init/main.c) the kernel
- * try to exec init at different place and if it fails
- * it tries /bin/sh /etc/rc. To be consistent with
- * init/main.c, many more test would have to be done
- * to locate init. Any complain ?
- *
- * The chroot is done manually in init/main.c but the
- * info (the inode) is located at mount time and store
- * in a global variable (pseudo_root) which is used at
- * different place in the umsdos driver. There is no
- * need to store this variable elsewhere because it
- * will always be one, not one per mount.
- *
- * This feature allows the installation
- * of a linux system within a DOS system in a subdirectory.
- *
- * A user may install its linux stuff in c:\linux
- * avoiding any clash with existing DOS file and subdirectory.
- * When linux boots, it hides this fact, showing a normal
- * root directory with /etc /bin /tmp ...
- *
- * The word "linux" is hardcoded in /usr/include/linux/umsdos_fs.h
- * in the macro UMSDOS_PSDROOT_NAME.
- */
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_SUPPORT_KMEM_H__
-#define __XFS_SUPPORT_KMEM_H__
-
-#include <linux/mm.h>
-#include <linux/highmem.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-
-/*
- * Cutoff point to use vmalloc instead of kmalloc.
- */
-#define MAX_SLAB_SIZE 0x10000
-
-/*
- * XFS uses slightly different names for these due to the
- * IRIX heritage.
- */
-#define kmem_zone kmem_cache_s
-#define kmem_zone_t kmem_cache_t
-
-#define KM_SLEEP 0x0001
-#define KM_NOSLEEP 0x0002
-#define KM_NOFS 0x0004
-
-typedef unsigned long xfs_pflags_t;
-
-#define PFLAGS_TEST_FSTRANS() (current->flags & PF_FSTRANS)
-
-/* these could be nested, so we save state */
-#define PFLAGS_SET_FSTRANS(STATEP) do { \
- *(STATEP) = current->flags; \
- current->flags |= PF_FSTRANS; \
-} while (0)
-
-#define PFLAGS_CLEAR_FSTRANS(STATEP) do { \
- *(STATEP) = current->flags; \
- current->flags &= ~PF_FSTRANS; \
-} while (0)
-
-/* Restore the PF_FSTRANS state to what was saved in STATEP */
-#define PFLAGS_RESTORE_FSTRANS(STATEP) do { \
- current->flags = ((current->flags & ~PF_FSTRANS) | \
- (*(STATEP) & PF_FSTRANS)); \
-} while (0)
-
-#define PFLAGS_DUP(OSTATEP, NSTATEP) do { \
- *(NSTATEP) = *(OSTATEP); \
-} while (0)
-
-/*
- * XXX get rid of the unconditional __GFP_NOFAIL by adding
- * a KM_FAIL flag and using it where we're allowed to fail.
- */
-static __inline unsigned int
-kmem_flags_convert(int flags)
-{
- int lflags;
-
-#if DEBUG
- if (unlikely(flags & ~(KM_SLEEP|KM_NOSLEEP|KM_NOFS))) {
- printk(KERN_WARNING
- "XFS: memory allocation with wrong flags (%x)\n", flags);
- BUG();
- }
-#endif
-
- lflags = (flags & KM_NOSLEEP) ? GFP_ATOMIC : (GFP_KERNEL|__GFP_NOFAIL);
-
- /* avoid recusive callbacks to filesystem during transactions */
- if (PFLAGS_TEST_FSTRANS() || (flags & KM_NOFS))
- lflags &= ~__GFP_FS;
-
- return lflags;
-}
-
-static __inline void *
-kmem_alloc(size_t size, int flags)
-{
- if (unlikely(MAX_SLAB_SIZE < size))
- /* Avoid doing filesystem sensitive stuff to get this */
- return __vmalloc(size, kmem_flags_convert(flags), PAGE_KERNEL);
- return kmalloc(size, kmem_flags_convert(flags));
-}
-
-static __inline void *
-kmem_zalloc(size_t size, int flags)
-{
- void *ptr = kmem_alloc(size, flags);
- if (likely(ptr != NULL))
- memset(ptr, 0, size);
- return ptr;
-}
-
-static __inline void
-kmem_free(void *ptr, size_t size)
-{
- if (unlikely((unsigned long)ptr < VMALLOC_START ||
- (unsigned long)ptr >= VMALLOC_END))
- kfree(ptr);
- else
- vfree(ptr);
-}
-
-static __inline void *
-kmem_realloc(void *ptr, size_t newsize, size_t oldsize, int flags)
-{
- void *new = kmem_alloc(newsize, flags);
-
- if (likely(ptr != NULL)) {
- if (likely(new != NULL))
- memcpy(new, ptr, min(oldsize, newsize));
- kmem_free(ptr, oldsize);
- }
-
- return new;
-}
-
-static __inline kmem_zone_t *
-kmem_zone_init(int size, char *zone_name)
-{
- return kmem_cache_create(zone_name, size, 0, 0, NULL, NULL);
-}
-
-static __inline void *
-kmem_zone_alloc(kmem_zone_t *zone, int flags)
-{
- return kmem_cache_alloc(zone, kmem_flags_convert(flags));
-}
-
-static __inline void *
-kmem_zone_zalloc(kmem_zone_t *zone, int flags)
-{
- void *ptr = kmem_zone_alloc(zone, flags);
- if (likely(ptr != NULL))
- memset(ptr, 0, kmem_cache_size(zone));
- return ptr;
-}
-
-static __inline void
-kmem_zone_free(kmem_zone_t *zone, void *ptr)
-{
- kmem_cache_free(zone, ptr);
-}
-
-typedef struct shrinker *kmem_shaker_t;
-typedef int (*kmem_shake_func_t)(int, unsigned int);
-
-static __inline kmem_shaker_t
-kmem_shake_register(kmem_shake_func_t sfunc)
-{
- return set_shrinker(DEFAULT_SEEKS, sfunc);
-}
-
-static __inline void
-kmem_shake_deregister(kmem_shaker_t shrinker)
-{
- remove_shrinker(shrinker);
-}
-
-static __inline int
-kmem_shake_allow(unsigned int gfp_mask)
-{
- return (gfp_mask & __GFP_WAIT);
-}
-
-#endif /* __XFS_SUPPORT_KMEM_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_SUPPORT_MRLOCK_H__
-#define __XFS_SUPPORT_MRLOCK_H__
-
-#include <linux/rwsem.h>
-
-enum { MR_NONE, MR_ACCESS, MR_UPDATE };
-
-typedef struct {
- struct rw_semaphore mr_lock;
- int mr_writer;
-} mrlock_t;
-
-#define mrinit(mrp, name) \
- ( (mrp)->mr_writer = 0, init_rwsem(&(mrp)->mr_lock) )
-#define mrlock_init(mrp, t,n,s) mrinit(mrp, n)
-#define mrfree(mrp) do { } while (0)
-#define mraccess(mrp) mraccessf(mrp, 0)
-#define mrupdate(mrp) mrupdatef(mrp, 0)
-
-static inline void mraccessf(mrlock_t *mrp, int flags)
-{
- down_read(&mrp->mr_lock);
-}
-
-static inline void mrupdatef(mrlock_t *mrp, int flags)
-{
- down_write(&mrp->mr_lock);
- mrp->mr_writer = 1;
-}
-
-static inline int mrtryaccess(mrlock_t *mrp)
-{
- return down_read_trylock(&mrp->mr_lock);
-}
-
-static inline int mrtryupdate(mrlock_t *mrp)
-{
- if (!down_write_trylock(&mrp->mr_lock))
- return 0;
- mrp->mr_writer = 1;
- return 1;
-}
-
-static inline void mrunlock(mrlock_t *mrp)
-{
- if (mrp->mr_writer) {
- mrp->mr_writer = 0;
- up_write(&mrp->mr_lock);
- } else {
- up_read(&mrp->mr_lock);
- }
-}
-
-static inline void mrdemote(mrlock_t *mrp)
-{
- mrp->mr_writer = 0;
- downgrade_write(&mrp->mr_lock);
-}
-
-#ifdef DEBUG
-/*
- * Debug-only routine, without some platform-specific asm code, we can
- * now only answer requests regarding whether we hold the lock for write
- * (reader state is outside our visibility, we only track writer state).
- * Note: means !ismrlocked would give false positivies, so don't do that.
- */
-static inline int ismrlocked(mrlock_t *mrp, int type)
-{
- if (mrp && type == MR_UPDATE)
- return mrp->mr_writer;
- return 1;
-}
-#endif
-
-#endif /* __XFS_SUPPORT_MRLOCK_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_SUPPORT_MUTEX_H__
-#define __XFS_SUPPORT_MUTEX_H__
-
-#include <linux/spinlock.h>
-#include <asm/semaphore.h>
-
-/*
- * Map the mutex'es from IRIX to Linux semaphores.
- *
- * Destroy just simply initializes to -99 which should block all other
- * callers.
- */
-#define MUTEX_DEFAULT 0x0
-typedef struct semaphore mutex_t;
-
-#define mutex_init(lock, type, name) sema_init(lock, 1)
-#define mutex_destroy(lock) sema_init(lock, -99)
-#define mutex_lock(lock, num) down(lock)
-#define mutex_trylock(lock) (down_trylock(lock) ? 0 : 1)
-#define mutex_unlock(lock) up(lock)
-
-#endif /* __XFS_SUPPORT_MUTEX_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_SUPPORT_SEMA_H__
-#define __XFS_SUPPORT_SEMA_H__
-
-#include <linux/time.h>
-#include <linux/wait.h>
-#include <asm/atomic.h>
-#include <asm/semaphore.h>
-
-/*
- * sema_t structure just maps to struct semaphore in Linux kernel.
- */
-
-typedef struct semaphore sema_t;
-
-#define init_sema(sp, val, c, d) sema_init(sp, val)
-#define initsema(sp, val) sema_init(sp, val)
-#define initnsema(sp, val, name) sema_init(sp, val)
-#define psema(sp, b) down(sp)
-#define vsema(sp) up(sp)
-#define valusema(sp) (atomic_read(&(sp)->count))
-#define freesema(sema)
-
-/*
- * Map cpsema (try to get the sema) to down_trylock. We need to switch
- * the return values since cpsema returns 1 (acquired) 0 (failed) and
- * down_trylock returns the reverse 0 (acquired) 1 (failed).
- */
-
-#define cpsema(sp) (down_trylock(sp) ? 0 : 1)
-
-/*
- * Didn't do cvsema(sp). Not sure how to map this to up/down/...
- * It does a vsema if the values is < 0 other wise nothing.
- */
-
-#endif /* __XFS_SUPPORT_SEMA_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_SUPPORT_SPIN_H__
-#define __XFS_SUPPORT_SPIN_H__
-
-#include <linux/sched.h> /* preempt needs this */
-#include <linux/spinlock.h>
-
-/*
- * Map lock_t from IRIX to Linux spinlocks.
- *
- * Note that linux turns on/off spinlocks depending on CONFIG_SMP.
- * We don't need to worry about SMP or not here.
- */
-
-#define SPLDECL(s) unsigned long s
-
-typedef spinlock_t lock_t;
-
-#define spinlock_init(lock, name) spin_lock_init(lock)
-#define spinlock_destroy(lock)
-
-static inline unsigned long mutex_spinlock(lock_t *lock)
-{
- spin_lock(lock);
- return 0;
-}
-
-/*ARGSUSED*/
-static inline void mutex_spinunlock(lock_t *lock, unsigned long s)
-{
- spin_unlock(lock);
-}
-
-static inline void nested_spinlock(lock_t *lock)
-{
- spin_lock(lock);
-}
-
-static inline void nested_spinunlock(lock_t *lock)
-{
- spin_unlock(lock);
-}
-
-#endif /* __XFS_SUPPORT_SPIN_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_SUPPORT_SV_H__
-#define __XFS_SUPPORT_SV_H__
-
-#include <linux/wait.h>
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-
-/*
- * Synchronisation variables.
- *
- * (Parameters "pri", "svf" and "rts" are not implemented)
- */
-
-typedef struct sv_s {
- wait_queue_head_t waiters;
-} sv_t;
-
-#define SV_FIFO 0x0 /* sv_t is FIFO type */
-#define SV_LIFO 0x2 /* sv_t is LIFO type */
-#define SV_PRIO 0x4 /* sv_t is PRIO type */
-#define SV_KEYED 0x6 /* sv_t is KEYED type */
-#define SV_DEFAULT SV_FIFO
-
-
-static inline void _sv_wait(sv_t *sv, spinlock_t *lock, int state,
- unsigned long timeout)
-{
- DECLARE_WAITQUEUE(wait, current);
-
- add_wait_queue_exclusive(&sv->waiters, &wait);
- __set_current_state(state);
- spin_unlock(lock);
-
- schedule_timeout(timeout);
-
- remove_wait_queue(&sv->waiters, &wait);
-}
-
-#define init_sv(sv,type,name,flag) \
- init_waitqueue_head(&(sv)->waiters)
-#define sv_init(sv,flag,name) \
- init_waitqueue_head(&(sv)->waiters)
-#define sv_destroy(sv) \
- /*NOTHING*/
-#define sv_wait(sv, pri, lock, s) \
- _sv_wait(sv, lock, TASK_UNINTERRUPTIBLE, MAX_SCHEDULE_TIMEOUT)
-#define sv_wait_sig(sv, pri, lock, s) \
- _sv_wait(sv, lock, TASK_INTERRUPTIBLE, MAX_SCHEDULE_TIMEOUT)
-#define sv_timedwait(sv, pri, lock, s, svf, ts, rts) \
- _sv_wait(sv, lock, TASK_UNINTERRUPTIBLE, timespec_to_jiffies(ts))
-#define sv_timedwait_sig(sv, pri, lock, s, svf, ts, rts) \
- _sv_wait(sv, lock, TASK_INTERRUPTIBLE, timespec_to_jiffies(ts))
-#define sv_signal(sv) \
- wake_up(&(sv)->waiters)
-#define sv_broadcast(sv) \
- wake_up_all(&(sv)->waiters)
-
-#endif /* __XFS_SUPPORT_SV_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_SUPPORT_TIME_H__
-#define __XFS_SUPPORT_TIME_H__
-
-#include <linux/sched.h>
-#include <linux/time.h>
-
-typedef struct timespec timespec_t;
-
-static inline void delay(long ticks)
-{
- current->state = TASK_UNINTERRUPTIBLE;
- schedule_timeout(ticks);
-}
-
-static inline void nanotime(struct timespec *tvp)
-{
- *tvp = CURRENT_TIME;
-}
-
-#endif /* __XFS_SUPPORT_TIME_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-#include "xfs_inum.h"
-#include "xfs_log.h"
-#include "xfs_sb.h"
-#include "xfs_dir.h"
-#include "xfs_dir2.h"
-#include "xfs_trans.h"
-#include "xfs_dmapi.h"
-#include "xfs_mount.h"
-#include "xfs_bmap_btree.h"
-#include "xfs_alloc_btree.h"
-#include "xfs_ialloc_btree.h"
-#include "xfs_alloc.h"
-#include "xfs_btree.h"
-#include "xfs_attr_sf.h"
-#include "xfs_dir_sf.h"
-#include "xfs_dir2_sf.h"
-#include "xfs_dinode.h"
-#include "xfs_inode.h"
-#include "xfs_error.h"
-#include "xfs_rw.h"
-#include "xfs_iomap.h"
-#include <linux/mpage.h>
-
-STATIC void xfs_count_page_state(struct page *, int *, int *, int *);
-STATIC void xfs_convert_page(struct inode *, struct page *,
- xfs_iomap_t *, void *, int, int);
-
-#if defined(XFS_RW_TRACE)
-void
-xfs_page_trace(
- int tag,
- struct inode *inode,
- struct page *page,
- int mask)
-{
- xfs_inode_t *ip;
- bhv_desc_t *bdp;
- vnode_t *vp = LINVFS_GET_VP(inode);
- loff_t isize = i_size_read(inode);
- loff_t offset = page->index << PAGE_CACHE_SHIFT;
- int delalloc = -1, unmapped = -1, unwritten = -1;
-
- if (page_has_buffers(page))
- xfs_count_page_state(page, &delalloc, &unmapped, &unwritten);
-
- bdp = vn_bhv_lookup(VN_BHV_HEAD(vp), &xfs_vnodeops);
- ip = XFS_BHVTOI(bdp);
- if (!ip->i_rwtrace)
- return;
-
- ktrace_enter(ip->i_rwtrace,
- (void *)((unsigned long)tag),
- (void *)ip,
- (void *)inode,
- (void *)page,
- (void *)((unsigned long)mask),
- (void *)((unsigned long)((ip->i_d.di_size >> 32) & 0xffffffff)),
- (void *)((unsigned long)(ip->i_d.di_size & 0xffffffff)),
- (void *)((unsigned long)((isize >> 32) & 0xffffffff)),
- (void *)((unsigned long)(isize & 0xffffffff)),
- (void *)((unsigned long)((offset >> 32) & 0xffffffff)),
- (void *)((unsigned long)(offset & 0xffffffff)),
- (void *)((unsigned long)delalloc),
- (void *)((unsigned long)unmapped),
- (void *)((unsigned long)unwritten),
- (void *)NULL,
- (void *)NULL);
-}
-#else
-#define xfs_page_trace(tag, inode, page, mask)
-#endif
-
-void
-linvfs_unwritten_done(
- struct buffer_head *bh,
- int uptodate)
-{
- xfs_buf_t *pb = (xfs_buf_t *)bh->b_private;
-
- ASSERT(buffer_unwritten(bh));
- bh->b_end_io = NULL;
- clear_buffer_unwritten(bh);
- if (!uptodate)
- pagebuf_ioerror(pb, EIO);
- if (atomic_dec_and_test(&pb->pb_io_remaining) == 1) {
- pagebuf_iodone(pb, 1, 1);
- }
- end_buffer_async_write(bh, uptodate);
-}
-
-/*
- * Issue transactions to convert a buffer range from unwritten
- * to written extents (buffered IO).
- */
-STATIC void
-linvfs_unwritten_convert(
- xfs_buf_t *bp)
-{
- vnode_t *vp = XFS_BUF_FSPRIVATE(bp, vnode_t *);
- int error;
-
- BUG_ON(atomic_read(&bp->pb_hold) < 1);
- VOP_BMAP(vp, XFS_BUF_OFFSET(bp), XFS_BUF_SIZE(bp),
- BMAPI_UNWRITTEN, NULL, NULL, error);
- XFS_BUF_SET_FSPRIVATE(bp, NULL);
- XFS_BUF_CLR_IODONE_FUNC(bp);
- XFS_BUF_UNDATAIO(bp);
- iput(LINVFS_GET_IP(vp));
- pagebuf_iodone(bp, 0, 0);
-}
-
-/*
- * Issue transactions to convert a buffer range from unwritten
- * to written extents (direct IO).
- */
-STATIC void
-linvfs_unwritten_convert_direct(
- struct inode *inode,
- loff_t offset,
- ssize_t size,
- void *private)
-{
- ASSERT(!private || inode == (struct inode *)private);
-
- /* private indicates an unwritten extent lay beneath this IO,
- * see linvfs_get_block_core.
- */
- if (private && size > 0) {
- vnode_t *vp = LINVFS_GET_VP(inode);
- int error;
-
- VOP_BMAP(vp, offset, size, BMAPI_UNWRITTEN, NULL, NULL, error);
- }
-}
-
-STATIC int
-xfs_map_blocks(
- struct inode *inode,
- loff_t offset,
- ssize_t count,
- xfs_iomap_t *iomapp,
- int flags)
-{
- vnode_t *vp = LINVFS_GET_VP(inode);
- int error, niomaps = 1;
-
- if (((flags & (BMAPI_DIRECT|BMAPI_SYNC)) == BMAPI_DIRECT) &&
- (offset >= i_size_read(inode)))
- count = max_t(ssize_t, count, XFS_WRITE_IO_LOG);
-retry:
- VOP_BMAP(vp, offset, count, flags, iomapp, &niomaps, error);
- if ((error == EAGAIN) || (error == EIO))
- return -error;
- if (unlikely((flags & (BMAPI_WRITE|BMAPI_DIRECT)) ==
- (BMAPI_WRITE|BMAPI_DIRECT) && niomaps &&
- (iomapp->iomap_flags & IOMAP_DELAY))) {
- flags = BMAPI_ALLOCATE;
- goto retry;
- }
- if (flags & (BMAPI_WRITE|BMAPI_ALLOCATE)) {
- VMODIFY(vp);
- }
- return -error;
-}
-
-/*
- * Finds the corresponding mapping in block @map array of the
- * given @offset within a @page.
- */
-STATIC xfs_iomap_t *
-xfs_offset_to_map(
- struct page *page,
- xfs_iomap_t *iomapp,
- unsigned long offset)
-{
- loff_t full_offset; /* offset from start of file */
-
- ASSERT(offset < PAGE_CACHE_SIZE);
-
- full_offset = page->index; /* NB: using 64bit number */
- full_offset <<= PAGE_CACHE_SHIFT; /* offset from file start */
- full_offset += offset; /* offset from page start */
-
- if (full_offset < iomapp->iomap_offset)
- return NULL;
- if (iomapp->iomap_offset + iomapp->iomap_bsize > full_offset)
- return iomapp;
- return NULL;
-}
-
-STATIC void
-xfs_map_at_offset(
- struct page *page,
- struct buffer_head *bh,
- unsigned long offset,
- int block_bits,
- xfs_iomap_t *iomapp)
-{
- xfs_daddr_t bn;
- loff_t delta;
- int sector_shift;
-
- ASSERT(!(iomapp->iomap_flags & IOMAP_HOLE));
- ASSERT(!(iomapp->iomap_flags & IOMAP_DELAY));
- ASSERT(iomapp->iomap_bn != IOMAP_DADDR_NULL);
-
- delta = page->index;
- delta <<= PAGE_CACHE_SHIFT;
- delta += offset;
- delta -= iomapp->iomap_offset;
- delta >>= block_bits;
-
- sector_shift = block_bits - BBSHIFT;
- bn = iomapp->iomap_bn >> sector_shift;
- bn += delta;
- ASSERT((bn << sector_shift) >= iomapp->iomap_bn);
-
- lock_buffer(bh);
- bh->b_blocknr = bn;
- bh->b_bdev = iomapp->iomap_target->pbr_bdev;
- set_buffer_mapped(bh);
- clear_buffer_delay(bh);
-}
-
-/*
- * Look for a page at index which is unlocked and contains our
- * unwritten extent flagged buffers at its head. Returns page
- * locked and with an extra reference count, and length of the
- * unwritten extent component on this page that we can write,
- * in units of filesystem blocks.
- */
-STATIC struct page *
-xfs_probe_unwritten_page(
- struct address_space *mapping,
- pgoff_t index,
- xfs_iomap_t *iomapp,
- xfs_buf_t *pb,
- unsigned long max_offset,
- unsigned long *fsbs,
- unsigned int bbits)
-{
- struct page *page;
-
- page = find_trylock_page(mapping, index);
- if (!page)
- return 0;
- if (PageWriteback(page))
- goto out;
-
- if (page->mapping && page_has_buffers(page)) {
- struct buffer_head *bh, *head;
- unsigned long p_offset = 0;
-
- *fsbs = 0;
- bh = head = page_buffers(page);
- do {
- if (!buffer_unwritten(bh))
- break;
- if (!xfs_offset_to_map(page, iomapp, p_offset))
- break;
- if (p_offset >= max_offset)
- break;
- xfs_map_at_offset(page, bh, p_offset, bbits, iomapp);
- set_buffer_unwritten_io(bh);
- bh->b_private = pb;
- p_offset += bh->b_size;
- (*fsbs)++;
- } while ((bh = bh->b_this_page) != head);
-
- if (p_offset)
- return page;
- }
-
-out:
- unlock_page(page);
- return NULL;
-}
-
-/*
- * Look for a page at index which is unlocked and not mapped
- * yet - clustering for mmap write case.
- */
-STATIC unsigned int
-xfs_probe_unmapped_page(
- struct address_space *mapping,
- pgoff_t index,
- unsigned int pg_offset)
-{
- struct page *page;
- int ret = 0;
-
- page = find_trylock_page(mapping, index);
- if (!page)
- return 0;
- if (PageWriteback(page))
- goto out;
-
- if (page->mapping && PageDirty(page)) {
- if (page_has_buffers(page)) {
- struct buffer_head *bh, *head;
-
- bh = head = page_buffers(page);
- do {
- if (buffer_mapped(bh) || !buffer_uptodate(bh))
- break;
- ret += bh->b_size;
- if (ret >= pg_offset)
- break;
- } while ((bh = bh->b_this_page) != head);
- } else
- ret = PAGE_CACHE_SIZE;
- }
-
-out:
- unlock_page(page);
- return ret;
-}
-
-STATIC unsigned int
-xfs_probe_unmapped_cluster(
- struct inode *inode,
- struct page *startpage,
- struct buffer_head *bh,
- struct buffer_head *head)
-{
- pgoff_t tindex, tlast, tloff;
- unsigned int pg_offset, len, total = 0;
- struct address_space *mapping = inode->i_mapping;
-
- /* First sum forwards in this page */
- do {
- if (buffer_mapped(bh))
- break;
- total += bh->b_size;
- } while ((bh = bh->b_this_page) != head);
-
- /* If we reached the end of the page, sum forwards in
- * following pages.
- */
- if (bh == head) {
- tlast = i_size_read(inode) >> PAGE_CACHE_SHIFT;
- /* Prune this back to avoid pathological behavior */
- tloff = min(tlast, startpage->index + 64);
- for (tindex = startpage->index + 1; tindex < tloff; tindex++) {
- len = xfs_probe_unmapped_page(mapping, tindex,
- PAGE_CACHE_SIZE);
- if (!len)
- return total;
- total += len;
- }
- if (tindex == tlast &&
- (pg_offset = i_size_read(inode) & (PAGE_CACHE_SIZE - 1))) {
- total += xfs_probe_unmapped_page(mapping,
- tindex, pg_offset);
- }
- }
- return total;
-}
-
-/*
- * Probe for a given page (index) in the inode and test if it is delayed
- * and without unwritten buffers. Returns page locked and with an extra
- * reference count.
- */
-STATIC struct page *
-xfs_probe_delalloc_page(
- struct inode *inode,
- pgoff_t index)
-{
- struct page *page;
-
- page = find_trylock_page(inode->i_mapping, index);
- if (!page)
- return NULL;
- if (PageWriteback(page))
- goto out;
-
- if (page->mapping && page_has_buffers(page)) {
- struct buffer_head *bh, *head;
- int acceptable = 0;
-
- bh = head = page_buffers(page);
- do {
- if (buffer_unwritten(bh)) {
- acceptable = 0;
- break;
- } else if (buffer_delay(bh)) {
- acceptable = 1;
- }
- } while ((bh = bh->b_this_page) != head);
-
- if (acceptable)
- return page;
- }
-
-out:
- unlock_page(page);
- return NULL;
-}
-
-STATIC int
-xfs_map_unwritten(
- struct inode *inode,
- struct page *start_page,
- struct buffer_head *head,
- struct buffer_head *curr,
- unsigned long p_offset,
- int block_bits,
- xfs_iomap_t *iomapp,
- int startio,
- int all_bh)
-{
- struct buffer_head *bh = curr;
- xfs_iomap_t *tmp;
- xfs_buf_t *pb;
- loff_t offset, size;
- unsigned long nblocks = 0;
-
- offset = start_page->index;
- offset <<= PAGE_CACHE_SHIFT;
- offset += p_offset;
-
- /* get an "empty" pagebuf to manage IO completion
- * Proper values will be set before returning */
- pb = pagebuf_lookup(iomapp->iomap_target, 0, 0, 0);
- if (!pb)
- return -EAGAIN;
-
- /* Take a reference to the inode to prevent it from
- * being reclaimed while we have outstanding unwritten
- * extent IO on it.
- */
- if ((igrab(inode)) != inode) {
- pagebuf_free(pb);
- return -EAGAIN;
- }
-
- /* Set the count to 1 initially, this will stop an I/O
- * completion callout which happens before we have started
- * all the I/O from calling pagebuf_iodone too early.
- */
- atomic_set(&pb->pb_io_remaining, 1);
-
- /* First map forwards in the page consecutive buffers
- * covering this unwritten extent
- */
- do {
- if (!buffer_unwritten(bh))
- break;
- tmp = xfs_offset_to_map(start_page, iomapp, p_offset);
- if (!tmp)
- break;
- xfs_map_at_offset(start_page, bh, p_offset, block_bits, iomapp);
- set_buffer_unwritten_io(bh);
- bh->b_private = pb;
- p_offset += bh->b_size;
- nblocks++;
- } while ((bh = bh->b_this_page) != head);
-
- atomic_add(nblocks, &pb->pb_io_remaining);
-
- /* If we reached the end of the page, map forwards in any
- * following pages which are also covered by this extent.
- */
- if (bh == head) {
- struct address_space *mapping = inode->i_mapping;
- pgoff_t tindex, tloff, tlast;
- unsigned long bs;
- unsigned int pg_offset, bbits = inode->i_blkbits;
- struct page *page;
-
- tlast = i_size_read(inode) >> PAGE_CACHE_SHIFT;
- tloff = (iomapp->iomap_offset + iomapp->iomap_bsize) >> PAGE_CACHE_SHIFT;
- tloff = min(tlast, tloff);
- for (tindex = start_page->index + 1; tindex < tloff; tindex++) {
- page = xfs_probe_unwritten_page(mapping,
- tindex, iomapp, pb,
- PAGE_CACHE_SIZE, &bs, bbits);
- if (!page)
- break;
- nblocks += bs;
- atomic_add(bs, &pb->pb_io_remaining);
- xfs_convert_page(inode, page, iomapp, pb,
- startio, all_bh);
- /* stop if converting the next page might add
- * enough blocks that the corresponding byte
- * count won't fit in our ulong page buf length */
- if (nblocks >= ((ULONG_MAX - PAGE_SIZE) >> block_bits))
- goto enough;
- }
-
- if (tindex == tlast &&
- (pg_offset = (i_size_read(inode) & (PAGE_CACHE_SIZE - 1)))) {
- page = xfs_probe_unwritten_page(mapping,
- tindex, iomapp, pb,
- pg_offset, &bs, bbits);
- if (page) {
- nblocks += bs;
- atomic_add(bs, &pb->pb_io_remaining);
- xfs_convert_page(inode, page, iomapp, pb,
- startio, all_bh);
- if (nblocks >= ((ULONG_MAX - PAGE_SIZE) >> block_bits))
- goto enough;
- }
- }
- }
-
-enough:
- size = nblocks; /* NB: using 64bit number here */
- size <<= block_bits; /* convert fsb's to byte range */
-
- XFS_BUF_DATAIO(pb);
- XFS_BUF_ASYNC(pb);
- XFS_BUF_SET_SIZE(pb, size);
- XFS_BUF_SET_COUNT(pb, size);
- XFS_BUF_SET_OFFSET(pb, offset);
- XFS_BUF_SET_FSPRIVATE(pb, LINVFS_GET_VP(inode));
- XFS_BUF_SET_IODONE_FUNC(pb, linvfs_unwritten_convert);
-
- if (atomic_dec_and_test(&pb->pb_io_remaining) == 1) {
- pagebuf_iodone(pb, 1, 1);
- }
-
- return 0;
-}
-
-STATIC void
-xfs_submit_page(
- struct page *page,
- struct buffer_head *bh_arr[],
- int cnt)
-{
- struct buffer_head *bh;
- int i;
-
- BUG_ON(PageWriteback(page));
- set_page_writeback(page);
- clear_page_dirty(page);
- unlock_page(page);
-
- if (cnt) {
- for (i = 0; i < cnt; i++) {
- bh = bh_arr[i];
- mark_buffer_async_write(bh);
- if (buffer_unwritten(bh))
- set_buffer_unwritten_io(bh);
- set_buffer_uptodate(bh);
- clear_buffer_dirty(bh);
- }
-
- for (i = 0; i < cnt; i++)
- submit_bh(WRITE, bh_arr[i]);
- } else
- end_page_writeback(page);
-}
-
-/*
- * Allocate & map buffers for page given the extent map. Write it out.
- * except for the original page of a writepage, this is called on
- * delalloc/unwritten pages only, for the original page it is possible
- * that the page has no mapping at all.
- */
-STATIC void
-xfs_convert_page(
- struct inode *inode,
- struct page *page,
- xfs_iomap_t *iomapp,
- void *private,
- int startio,
- int all_bh)
-{
- struct buffer_head *bh_arr[MAX_BUF_PER_PAGE], *bh, *head;
- xfs_iomap_t *mp = iomapp, *tmp;
- unsigned long end, offset;
- pgoff_t end_index;
- int i = 0, index = 0;
- int bbits = inode->i_blkbits;
-
- end_index = i_size_read(inode) >> PAGE_CACHE_SHIFT;
- if (page->index < end_index) {
- end = PAGE_CACHE_SIZE;
- } else {
- end = i_size_read(inode) & (PAGE_CACHE_SIZE-1);
- }
- bh = head = page_buffers(page);
- do {
- offset = i << bbits;
- if (!(PageUptodate(page) || buffer_uptodate(bh)))
- continue;
- if (buffer_mapped(bh) && all_bh &&
- !buffer_unwritten(bh) && !buffer_delay(bh)) {
- if (startio && (offset < end)) {
- lock_buffer(bh);
- bh_arr[index++] = bh;
- }
- continue;
- }
- tmp = xfs_offset_to_map(page, mp, offset);
- if (!tmp)
- continue;
- ASSERT(!(tmp->iomap_flags & IOMAP_HOLE));
- ASSERT(!(tmp->iomap_flags & IOMAP_DELAY));
-
- /* If this is a new unwritten extent buffer (i.e. one
- * that we haven't passed in private data for, we must
- * now map this buffer too.
- */
- if (buffer_unwritten(bh) && !bh->b_end_io) {
- ASSERT(tmp->iomap_flags & IOMAP_UNWRITTEN);
- xfs_map_unwritten(inode, page, head, bh,
- offset, bbits, tmp, startio, all_bh);
- } else if (! (buffer_unwritten(bh) && buffer_locked(bh))) {
- xfs_map_at_offset(page, bh, offset, bbits, tmp);
- if (buffer_unwritten(bh)) {
- set_buffer_unwritten_io(bh);
- bh->b_private = private;
- ASSERT(private);
- }
- }
- if (startio && (offset < end)) {
- bh_arr[index++] = bh;
- } else {
- set_buffer_dirty(bh);
- unlock_buffer(bh);
- mark_buffer_dirty(bh);
- }
- } while (i++, (bh = bh->b_this_page) != head);
-
- if (startio) {
- xfs_submit_page(page, bh_arr, index);
- } else {
- unlock_page(page);
- }
-}
-
-/*
- * Convert & write out a cluster of pages in the same extent as defined
- * by mp and following the start page.
- */
-STATIC void
-xfs_cluster_write(
- struct inode *inode,
- pgoff_t tindex,
- xfs_iomap_t *iomapp,
- int startio,
- int all_bh)
-{
- pgoff_t tlast;
- struct page *page;
-
- tlast = (iomapp->iomap_offset + iomapp->iomap_bsize) >> PAGE_CACHE_SHIFT;
- for (; tindex < tlast; tindex++) {
- page = xfs_probe_delalloc_page(inode, tindex);
- if (!page)
- break;
- xfs_convert_page(inode, page, iomapp, NULL, startio, all_bh);
- }
-}
-
-/*
- * Calling this without startio set means we are being asked to make a dirty
- * page ready for freeing it's buffers. When called with startio set then
- * we are coming from writepage.
- *
- * When called with startio set it is important that we write the WHOLE
- * page if possible.
- * The bh->b_state's cannot know if any of the blocks or which block for
- * that matter are dirty due to mmap writes, and therefore bh uptodate is
- * only vaild if the page itself isn't completely uptodate. Some layers
- * may clear the page dirty flag prior to calling write page, under the
- * assumption the entire page will be written out; by not writing out the
- * whole page the page can be reused before all valid dirty data is
- * written out. Note: in the case of a page that has been dirty'd by
- * mapwrite and but partially setup by block_prepare_write the
- * bh->b_states's will not agree and only ones setup by BPW/BCW will have
- * valid state, thus the whole page must be written out thing.
- */
-
-STATIC int
-xfs_page_state_convert(
- struct inode *inode,
- struct page *page,
- int startio,
- int unmapped) /* also implies page uptodate */
-{
- struct buffer_head *bh_arr[MAX_BUF_PER_PAGE], *bh, *head;
- xfs_iomap_t *iomp, iomap;
- unsigned long p_offset = 0;
- pgoff_t end_index;
- loff_t offset;
- unsigned long long end_offset;
- int len, err, i, cnt = 0, uptodate = 1;
- int flags = startio ? 0 : BMAPI_TRYLOCK;
- int page_dirty = 1;
-
-
- /* Are we off the end of the file ? */
- end_index = i_size_read(inode) >> PAGE_CACHE_SHIFT;
- if (page->index >= end_index) {
- if ((page->index >= end_index + 1) ||
- !(i_size_read(inode) & (PAGE_CACHE_SIZE - 1))) {
- err = -EIO;
- goto error;
- }
- }
-
- offset = (loff_t)page->index << PAGE_CACHE_SHIFT;
- end_offset = min_t(unsigned long long,
- offset + PAGE_CACHE_SIZE, i_size_read(inode));
-
- bh = head = page_buffers(page);
- iomp = NULL;
-
- len = bh->b_size;
- do {
- if (offset >= end_offset)
- break;
- if (!buffer_uptodate(bh))
- uptodate = 0;
- if (!(PageUptodate(page) || buffer_uptodate(bh)) && !startio)
- continue;
-
- if (iomp) {
- iomp = xfs_offset_to_map(page, &iomap, p_offset);
- }
-
- /*
- * First case, map an unwritten extent and prepare for
- * extent state conversion transaction on completion.
- */
- if (buffer_unwritten(bh)) {
- if (!iomp) {
- err = xfs_map_blocks(inode, offset, len, &iomap,
- BMAPI_READ|BMAPI_IGNSTATE);
- if (err) {
- goto error;
- }
- iomp = xfs_offset_to_map(page, &iomap,
- p_offset);
- }
- if (iomp && startio) {
- if (!bh->b_end_io) {
- err = xfs_map_unwritten(inode, page,
- head, bh, p_offset,
- inode->i_blkbits, iomp,
- startio, unmapped);
- if (err) {
- goto error;
- }
- }
- bh_arr[cnt++] = bh;
- page_dirty = 0;
- }
- /*
- * Second case, allocate space for a delalloc buffer.
- * We can return EAGAIN here in the release page case.
- */
- } else if (buffer_delay(bh)) {
- if (!iomp) {
- err = xfs_map_blocks(inode, offset, len, &iomap,
- BMAPI_ALLOCATE | flags);
- if (err) {
- goto error;
- }
- iomp = xfs_offset_to_map(page, &iomap,
- p_offset);
- }
- if (iomp) {
- xfs_map_at_offset(page, bh, p_offset,
- inode->i_blkbits, iomp);
- if (startio) {
- bh_arr[cnt++] = bh;
- } else {
- set_buffer_dirty(bh);
- unlock_buffer(bh);
- mark_buffer_dirty(bh);
- }
- page_dirty = 0;
- }
- } else if ((buffer_uptodate(bh) || PageUptodate(page)) &&
- (unmapped || startio)) {
-
- if (!buffer_mapped(bh)) {
- int size;
-
- /*
- * Getting here implies an unmapped buffer
- * was found, and we are in a path where we
- * need to write the whole page out.
- */
- if (!iomp) {
- size = xfs_probe_unmapped_cluster(
- inode, page, bh, head);
- err = xfs_map_blocks(inode, offset,
- size, &iomap,
- BMAPI_WRITE|BMAPI_MMAP);
- if (err) {
- goto error;
- }
- iomp = xfs_offset_to_map(page, &iomap,
- p_offset);
- }
- if (iomp) {
- xfs_map_at_offset(page,
- bh, p_offset,
- inode->i_blkbits, iomp);
- if (startio) {
- bh_arr[cnt++] = bh;
- } else {
- set_buffer_dirty(bh);
- unlock_buffer(bh);
- mark_buffer_dirty(bh);
- }
- page_dirty = 0;
- }
- } else if (startio) {
- if (buffer_uptodate(bh) &&
- !test_and_set_bit(BH_Lock, &bh->b_state)) {
- bh_arr[cnt++] = bh;
- page_dirty = 0;
- }
- }
- }
- } while (offset += len, p_offset += len,
- ((bh = bh->b_this_page) != head));
-
- if (uptodate && bh == head)
- SetPageUptodate(page);
-
- if (startio)
- xfs_submit_page(page, bh_arr, cnt);
-
- if (iomp)
- xfs_cluster_write(inode, page->index + 1, iomp, startio, unmapped);
-
- return page_dirty;
-
-error:
- for (i = 0; i < cnt; i++) {
- unlock_buffer(bh_arr[i]);
- }
-
- /*
- * If it's delalloc and we have nowhere to put it,
- * throw it away, unless the lower layers told
- * us to try again.
- */
- if (err != -EAGAIN) {
- if (!unmapped) {
- block_invalidatepage(page, 0);
- }
- ClearPageUptodate(page);
- }
- return err;
-}
-
-STATIC int
-linvfs_get_block_core(
- struct inode *inode,
- sector_t iblock,
- unsigned long blocks,
- struct buffer_head *bh_result,
- int create,
- int direct,
- bmapi_flags_t flags)
-{
- vnode_t *vp = LINVFS_GET_VP(inode);
- xfs_iomap_t iomap;
- int retpbbm = 1;
- int error;
- ssize_t size;
- loff_t offset = (loff_t)iblock << inode->i_blkbits;
-
- /* If we are doing writes at the end of the file,
- * allocate in chunks
- */
- if (blocks)
- size = blocks << inode->i_blkbits;
- else if (create && (offset >= i_size_read(inode)))
- size = 1 << XFS_WRITE_IO_LOG;
- else
- size = 1 << inode->i_blkbits;
-
- VOP_BMAP(vp, offset, size,
- create ? flags : BMAPI_READ, &iomap, &retpbbm, error);
- if (error)
- return -error;
-
- if (retpbbm == 0)
- return 0;
-
- if (iomap.iomap_bn != IOMAP_DADDR_NULL) {
- xfs_daddr_t bn;
- loff_t delta;
-
- /* For unwritten extents do not report a disk address on
- * the read case (treat as if we're reading into a hole).
- */
- if (create || !(iomap.iomap_flags & IOMAP_UNWRITTEN)) {
- delta = offset - iomap.iomap_offset;
- delta >>= inode->i_blkbits;
-
- bn = iomap.iomap_bn >> (inode->i_blkbits - BBSHIFT);
- bn += delta;
-
- bh_result->b_blocknr = bn;
- bh_result->b_bdev = iomap.iomap_target->pbr_bdev;
- set_buffer_mapped(bh_result);
- }
- if (create && (iomap.iomap_flags & IOMAP_UNWRITTEN)) {
- if (direct)
- bh_result->b_private = inode;
- set_buffer_unwritten(bh_result);
- set_buffer_delay(bh_result);
- }
- }
-
- /* If this is a realtime file, data might be on a new device */
- bh_result->b_bdev = iomap.iomap_target->pbr_bdev;
-
- /* If we previously allocated a block out beyond eof and
- * we are now coming back to use it then we will need to
- * flag it as new even if it has a disk address.
- */
- if (create &&
- ((!buffer_mapped(bh_result) && !buffer_uptodate(bh_result)) ||
- (offset >= i_size_read(inode)) || (iomap.iomap_flags & IOMAP_NEW))) {
- set_buffer_new(bh_result);
- }
-
- if (iomap.iomap_flags & IOMAP_DELAY) {
- if (unlikely(direct))
- BUG();
- if (create) {
- set_buffer_mapped(bh_result);
- set_buffer_uptodate(bh_result);
- }
- bh_result->b_bdev = iomap.iomap_target->pbr_bdev;
- set_buffer_delay(bh_result);
- }
-
- if (blocks) {
- loff_t iosize;
- iosize = (iomap.iomap_bsize - iomap.iomap_delta);
- bh_result->b_size =
- (ssize_t)min(iosize, (loff_t)(blocks << inode->i_blkbits));
- }
-
- return 0;
-}
-
-int
-linvfs_get_block(
- struct inode *inode,
- sector_t iblock,
- struct buffer_head *bh_result,
- int create)
-{
- return linvfs_get_block_core(inode, iblock, 0, bh_result,
- create, 0, BMAPI_WRITE);
-}
-
-STATIC int
-linvfs_get_block_sync(
- struct inode *inode,
- sector_t iblock,
- struct buffer_head *bh_result,
- int create)
-{
- return linvfs_get_block_core(inode, iblock, 0, bh_result,
- create, 0, BMAPI_SYNC|BMAPI_WRITE);
-}
-
-STATIC int
-linvfs_get_blocks_direct(
- struct inode *inode,
- sector_t iblock,
- unsigned long max_blocks,
- struct buffer_head *bh_result,
- int create)
-{
- return linvfs_get_block_core(inode, iblock, max_blocks, bh_result,
- create, 1, BMAPI_WRITE|BMAPI_DIRECT);
-}
-
-STATIC ssize_t
-linvfs_direct_IO(
- int rw,
- struct kiocb *iocb,
- const struct iovec *iov,
- loff_t offset,
- unsigned long nr_segs)
-{
- struct file *file = iocb->ki_filp;
- struct inode *inode = file->f_mapping->host;
- vnode_t *vp = LINVFS_GET_VP(inode);
- xfs_iomap_t iomap;
- int maps = 1;
- int error;
-
- VOP_BMAP(vp, offset, 0, BMAPI_DEVICE, &iomap, &maps, error);
- if (error)
- return -error;
-
- return blockdev_direct_IO_no_locking(rw, iocb, inode,
- iomap.iomap_target->pbr_bdev,
- iov, offset, nr_segs,
- linvfs_get_blocks_direct,
- linvfs_unwritten_convert_direct);
-}
-
-
-STATIC sector_t
-linvfs_bmap(
- struct address_space *mapping,
- sector_t block)
-{
- struct inode *inode = (struct inode *)mapping->host;
- vnode_t *vp = LINVFS_GET_VP(inode);
- int error;
-
- vn_trace_entry(vp, "linvfs_bmap", (inst_t *)__return_address);
-
- VOP_RWLOCK(vp, VRWLOCK_READ);
- VOP_FLUSH_PAGES(vp, (xfs_off_t)0, -1, 0, FI_REMAPF, error);
- VOP_RWUNLOCK(vp, VRWLOCK_READ);
- return generic_block_bmap(mapping, block, linvfs_get_block);
-}
-
-STATIC int
-linvfs_readpage(
- struct file *unused,
- struct page *page)
-{
- return mpage_readpage(page, linvfs_get_block);
-}
-
-STATIC int
-linvfs_readpages(
- struct file *unused,
- struct address_space *mapping,
- struct list_head *pages,
- unsigned nr_pages)
-{
- return mpage_readpages(mapping, pages, nr_pages, linvfs_get_block);
-}
-
-STATIC void
-xfs_count_page_state(
- struct page *page,
- int *delalloc,
- int *unmapped,
- int *unwritten)
-{
- struct buffer_head *bh, *head;
-
- *delalloc = *unmapped = *unwritten = 0;
-
- bh = head = page_buffers(page);
- do {
- if (buffer_uptodate(bh) && !buffer_mapped(bh))
- (*unmapped) = 1;
- else if (buffer_unwritten(bh) && !buffer_delay(bh))
- clear_buffer_unwritten(bh);
- else if (buffer_unwritten(bh))
- (*unwritten) = 1;
- else if (buffer_delay(bh))
- (*delalloc) = 1;
- } while ((bh = bh->b_this_page) != head);
-}
-
-
-/*
- * writepage: Called from one of two places:
- *
- * 1. we are flushing a delalloc buffer head.
- *
- * 2. we are writing out a dirty page. Typically the page dirty
- * state is cleared before we get here. In this case is it
- * conceivable we have no buffer heads.
- *
- * For delalloc space on the page we need to allocate space and
- * flush it. For unmapped buffer heads on the page we should
- * allocate space if the page is uptodate. For any other dirty
- * buffer heads on the page we should flush them.
- *
- * If we detect that a transaction would be required to flush
- * the page, we have to check the process flags first, if we
- * are already in a transaction or disk I/O during allocations
- * is off, we need to fail the writepage and redirty the page.
- */
-
-STATIC int
-linvfs_writepage(
- struct page *page,
- struct writeback_control *wbc)
-{
- int error;
- int need_trans;
- int delalloc, unmapped, unwritten;
- struct inode *inode = page->mapping->host;
-
- xfs_page_trace(XFS_WRITEPAGE_ENTER, inode, page, 0);
-
- /*
- * We need a transaction if:
- * 1. There are delalloc buffers on the page
- * 2. The page is uptodate and we have unmapped buffers
- * 3. The page is uptodate and we have no buffers
- * 4. There are unwritten buffers on the page
- */
-
- if (!page_has_buffers(page)) {
- unmapped = 1;
- need_trans = 1;
- } else {
- xfs_count_page_state(page, &delalloc, &unmapped, &unwritten);
- if (!PageUptodate(page))
- unmapped = 0;
- need_trans = delalloc + unmapped + unwritten;
- }
-
- /*
- * If we need a transaction and the process flags say
- * we are already in a transaction, or no IO is allowed
- * then mark the page dirty again and leave the page
- * as is.
- */
- if (PFLAGS_TEST_FSTRANS() && need_trans)
- goto out_fail;
-
- /*
- * Delay hooking up buffer heads until we have
- * made our go/no-go decision.
- */
- if (!page_has_buffers(page))
- create_empty_buffers(page, 1 << inode->i_blkbits, 0);
-
- /*
- * Convert delayed allocate, unwritten or unmapped space
- * to real space and flush out to disk.
- */
- error = xfs_page_state_convert(inode, page, 1, unmapped);
- if (error == -EAGAIN)
- goto out_fail;
- if (unlikely(error < 0))
- goto out_unlock;
-
- return 0;
-
-out_fail:
- set_page_dirty(page);
- unlock_page(page);
- return 0;
-out_unlock:
- unlock_page(page);
- return error;
-}
-
-/*
- * Called to move a page into cleanable state - and from there
- * to be released. Possibly the page is already clean. We always
- * have buffer heads in this call.
- *
- * Returns 0 if the page is ok to release, 1 otherwise.
- *
- * Possible scenarios are:
- *
- * 1. We are being called to release a page which has been written
- * to via regular I/O. buffer heads will be dirty and possibly
- * delalloc. If no delalloc buffer heads in this case then we
- * can just return zero.
- *
- * 2. We are called to release a page which has been written via
- * mmap, all we need to do is ensure there is no delalloc
- * state in the buffer heads, if not we can let the caller
- * free them and we should come back later via writepage.
- */
-STATIC int
-linvfs_release_page(
- struct page *page,
- int gfp_mask)
-{
- struct inode *inode = page->mapping->host;
- int dirty, delalloc, unmapped, unwritten;
-
- xfs_page_trace(XFS_RELEASEPAGE_ENTER, inode, page, gfp_mask);
-
- xfs_count_page_state(page, &delalloc, &unmapped, &unwritten);
- if (!delalloc && !unwritten)
- goto free_buffers;
-
- if (!(gfp_mask & __GFP_FS))
- return 0;
-
- /* If we are already inside a transaction or the thread cannot
- * do I/O, we cannot release this page.
- */
- if (PFLAGS_TEST_FSTRANS())
- return 0;
-
- /*
- * Convert delalloc space to real space, do not flush the
- * data out to disk, that will be done by the caller.
- * Never need to allocate space here - we will always
- * come back to writepage in that case.
- */
- dirty = xfs_page_state_convert(inode, page, 0, 0);
- if (dirty == 0 && !unwritten)
- goto free_buffers;
- return 0;
-
-free_buffers:
- return try_to_free_buffers(page);
-}
-
-STATIC int
-linvfs_prepare_write(
- struct file *file,
- struct page *page,
- unsigned int from,
- unsigned int to)
-{
- if (file && (file->f_flags & O_SYNC)) {
- return block_prepare_write(page, from, to,
- linvfs_get_block_sync);
- } else {
- return block_prepare_write(page, from, to,
- linvfs_get_block);
- }
-}
-
-struct address_space_operations linvfs_aops = {
- .readpage = linvfs_readpage,
- .readpages = linvfs_readpages,
- .writepage = linvfs_writepage,
- .sync_page = block_sync_page,
- .releasepage = linvfs_release_page,
- .prepare_write = linvfs_prepare_write,
- .commit_write = generic_commit_write,
- .bmap = linvfs_bmap,
- .direct_IO = linvfs_direct_IO,
-};
+++ /dev/null
-/*
- * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-/*
- * The xfs_buf.c code provides an abstract buffer cache model on top
- * of the Linux page cache. Cached metadata blocks for a file system
- * are hashed to the inode for the block device. xfs_buf.c assembles
- * buffers (xfs_buf_t) on demand to aggregate such cached pages for I/O.
- *
- * Written by Steve Lord, Jim Mostek, Russell Cattelan
- * and Rajagopal Ananthanarayanan ("ananth") at SGI.
- *
- */
-
-#include <linux/stddef.h>
-#include <linux/errno.h>
-#include <linux/slab.h>
-#include <linux/pagemap.h>
-#include <linux/init.h>
-#include <linux/vmalloc.h>
-#include <linux/bio.h>
-#include <linux/sysctl.h>
-#include <linux/proc_fs.h>
-#include <linux/workqueue.h>
-#include <linux/suspend.h>
-#include <linux/percpu.h>
-
-#include "xfs_linux.h"
-
-#ifndef GFP_READAHEAD
-#define GFP_READAHEAD (__GFP_NOWARN|__GFP_NORETRY)
-#endif
-
-/*
- * File wide globals
- */
-
-STATIC kmem_cache_t *pagebuf_cache;
-STATIC void pagebuf_daemon_wakeup(void);
-STATIC void pagebuf_delwri_queue(xfs_buf_t *, int);
-STATIC struct workqueue_struct *pagebuf_logio_workqueue;
-STATIC struct workqueue_struct *pagebuf_dataio_workqueue;
-
-/*
- * Pagebuf debugging
- */
-
-#ifdef PAGEBUF_TRACE
-void
-pagebuf_trace(
- xfs_buf_t *pb,
- char *id,
- void *data,
- void *ra)
-{
- ktrace_enter(pagebuf_trace_buf,
- pb, id,
- (void *)(unsigned long)pb->pb_flags,
- (void *)(unsigned long)pb->pb_hold.counter,
- (void *)(unsigned long)pb->pb_sema.count.counter,
- (void *)current,
- data, ra,
- (void *)(unsigned long)((pb->pb_file_offset>>32) & 0xffffffff),
- (void *)(unsigned long)(pb->pb_file_offset & 0xffffffff),
- (void *)(unsigned long)pb->pb_buffer_length,
- NULL, NULL, NULL, NULL, NULL);
-}
-ktrace_t *pagebuf_trace_buf;
-#define PAGEBUF_TRACE_SIZE 4096
-#define PB_TRACE(pb, id, data) \
- pagebuf_trace(pb, id, (void *)data, (void *)__builtin_return_address(0))
-#else
-#define PB_TRACE(pb, id, data) do { } while (0)
-#endif
-
-#ifdef PAGEBUF_LOCK_TRACKING
-# define PB_SET_OWNER(pb) ((pb)->pb_last_holder = current->pid)
-# define PB_CLEAR_OWNER(pb) ((pb)->pb_last_holder = -1)
-# define PB_GET_OWNER(pb) ((pb)->pb_last_holder)
-#else
-# define PB_SET_OWNER(pb) do { } while (0)
-# define PB_CLEAR_OWNER(pb) do { } while (0)
-# define PB_GET_OWNER(pb) do { } while (0)
-#endif
-
-/*
- * Pagebuf allocation / freeing.
- */
-
-#define pb_to_gfp(flags) \
- (((flags) & PBF_READ_AHEAD) ? GFP_READAHEAD : \
- ((flags) & PBF_DONT_BLOCK) ? GFP_NOFS : GFP_KERNEL)
-
-#define pb_to_km(flags) \
- (((flags) & PBF_DONT_BLOCK) ? KM_NOFS : KM_SLEEP)
-
-
-#define pagebuf_allocate(flags) \
- kmem_zone_alloc(pagebuf_cache, pb_to_km(flags))
-#define pagebuf_deallocate(pb) \
- kmem_zone_free(pagebuf_cache, (pb));
-
-/*
- * Pagebuf hashing
- */
-
-#define NBITS 8
-#define NHASH (1<<NBITS)
-
-typedef struct {
- struct list_head pb_hash;
- spinlock_t pb_hash_lock;
-} pb_hash_t;
-
-STATIC pb_hash_t pbhash[NHASH];
-#define pb_hash(pb) &pbhash[pb->pb_hash_index]
-
-STATIC int
-_bhash(
- struct block_device *bdev,
- loff_t base)
-{
- int bit, hval;
-
- base >>= 9;
- base ^= (unsigned long)bdev / L1_CACHE_BYTES;
- for (bit = hval = 0; base && bit < sizeof(base) * 8; bit += NBITS) {
- hval ^= (int)base & (NHASH-1);
- base >>= NBITS;
- }
- return hval;
-}
-
-/*
- * Mapping of multi-page buffers into contiguous virtual space
- */
-
-typedef struct a_list {
- void *vm_addr;
- struct a_list *next;
-} a_list_t;
-
-STATIC a_list_t *as_free_head;
-STATIC int as_list_len;
-STATIC spinlock_t as_lock = SPIN_LOCK_UNLOCKED;
-
-/*
- * Try to batch vunmaps because they are costly.
- */
-STATIC void
-free_address(
- void *addr)
-{
- a_list_t *aentry;
-
- aentry = kmalloc(sizeof(a_list_t), GFP_ATOMIC);
- if (aentry) {
- spin_lock(&as_lock);
- aentry->next = as_free_head;
- aentry->vm_addr = addr;
- as_free_head = aentry;
- as_list_len++;
- spin_unlock(&as_lock);
- } else {
- vunmap(addr);
- }
-}
-
-STATIC void
-purge_addresses(void)
-{
- a_list_t *aentry, *old;
-
- if (as_free_head == NULL)
- return;
-
- spin_lock(&as_lock);
- aentry = as_free_head;
- as_free_head = NULL;
- as_list_len = 0;
- spin_unlock(&as_lock);
-
- while ((old = aentry) != NULL) {
- vunmap(aentry->vm_addr);
- aentry = aentry->next;
- kfree(old);
- }
-}
-
-/*
- * Internal pagebuf object manipulation
- */
-
-STATIC void
-_pagebuf_initialize(
- xfs_buf_t *pb,
- xfs_buftarg_t *target,
- loff_t range_base,
- size_t range_length,
- page_buf_flags_t flags)
-{
- /*
- * We don't want certain flags to appear in pb->pb_flags.
- */
- flags &= ~(PBF_LOCK|PBF_MAPPED|PBF_DONT_BLOCK|PBF_READ_AHEAD);
-
- memset(pb, 0, sizeof(xfs_buf_t));
- atomic_set(&pb->pb_hold, 1);
- init_MUTEX_LOCKED(&pb->pb_iodonesema);
- INIT_LIST_HEAD(&pb->pb_list);
- INIT_LIST_HEAD(&pb->pb_hash_list);
- init_MUTEX_LOCKED(&pb->pb_sema); /* held, no waiters */
- PB_SET_OWNER(pb);
- pb->pb_target = target;
- pb->pb_file_offset = range_base;
- /*
- * Set buffer_length and count_desired to the same value initially.
- * I/O routines should use count_desired, which will be the same in
- * most cases but may be reset (e.g. XFS recovery).
- */
- pb->pb_buffer_length = pb->pb_count_desired = range_length;
- pb->pb_flags = flags | PBF_NONE;
- pb->pb_bn = XFS_BUF_DADDR_NULL;
- atomic_set(&pb->pb_pin_count, 0);
- init_waitqueue_head(&pb->pb_waiters);
-
- XFS_STATS_INC(pb_create);
- PB_TRACE(pb, "initialize", target);
-}
-
-/*
- * Allocate a page array capable of holding a specified number
- * of pages, and point the page buf at it.
- */
-STATIC int
-_pagebuf_get_pages(
- xfs_buf_t *pb,
- int page_count,
- page_buf_flags_t flags)
-{
- /* Make sure that we have a page list */
- if (pb->pb_pages == NULL) {
- pb->pb_offset = page_buf_poff(pb->pb_file_offset);
- pb->pb_page_count = page_count;
- if (page_count <= PB_PAGES) {
- pb->pb_pages = pb->pb_page_array;
- } else {
- pb->pb_pages = kmem_alloc(sizeof(struct page *) *
- page_count, pb_to_km(flags));
- if (pb->pb_pages == NULL)
- return -ENOMEM;
- }
- memset(pb->pb_pages, 0, sizeof(struct page *) * page_count);
- }
- return 0;
-}
-
-/*
- * Frees pb_pages if it was malloced.
- */
-STATIC void
-_pagebuf_free_pages(
- xfs_buf_t *bp)
-{
- if (bp->pb_pages != bp->pb_page_array) {
- kmem_free(bp->pb_pages,
- bp->pb_page_count * sizeof(struct page *));
- }
-}
-
-/*
- * Releases the specified buffer.
- *
- * The modification state of any associated pages is left unchanged.
- * The buffer most not be on any hash - use pagebuf_rele instead for
- * hashed and refcounted buffers
- */
-void
-pagebuf_free(
- xfs_buf_t *bp)
-{
- PB_TRACE(bp, "free", 0);
-
- ASSERT(list_empty(&bp->pb_hash_list));
-
- if (bp->pb_flags & _PBF_PAGE_CACHE) {
- uint i;
-
- if ((bp->pb_flags & PBF_MAPPED) && (bp->pb_page_count > 1))
- free_address(bp->pb_addr - bp->pb_offset);
-
- for (i = 0; i < bp->pb_page_count; i++)
- page_cache_release(bp->pb_pages[i]);
- _pagebuf_free_pages(bp);
- } else if (bp->pb_flags & _PBF_KMEM_ALLOC) {
- /*
- * XXX(hch): bp->pb_count_desired might be incorrect (see
- * pagebuf_associate_memory for details), but fortunately
- * the Linux version of kmem_free ignores the len argument..
- */
- kmem_free(bp->pb_addr, bp->pb_count_desired);
- _pagebuf_free_pages(bp);
- }
-
- pagebuf_deallocate(bp);
-}
-
-/*
- * Finds all pages for buffer in question and builds it's page list.
- */
-STATIC int
-_pagebuf_lookup_pages(
- xfs_buf_t *bp,
- uint flags)
-{
- struct address_space *mapping = bp->pb_target->pbr_mapping;
- unsigned int sectorshift = bp->pb_target->pbr_sshift;
- size_t blocksize = bp->pb_target->pbr_bsize;
- size_t size = bp->pb_count_desired;
- size_t nbytes, offset;
- int gfp_mask = pb_to_gfp(flags);
- unsigned short page_count, i;
- pgoff_t first;
- loff_t end;
- int error;
-
- end = bp->pb_file_offset + bp->pb_buffer_length;
- page_count = page_buf_btoc(end) - page_buf_btoct(bp->pb_file_offset);
-
- error = _pagebuf_get_pages(bp, page_count, flags);
- if (unlikely(error))
- return error;
-
- offset = bp->pb_offset;
- first = bp->pb_file_offset >> PAGE_CACHE_SHIFT;
-
- for (i = 0; i < bp->pb_page_count; i++) {
- struct page *page;
- uint retries = 0;
-
- retry:
- page = find_or_create_page(mapping, first + i, gfp_mask);
- if (unlikely(page == NULL)) {
- if (flags & PBF_READ_AHEAD)
- return -ENOMEM;
-
- /*
- * This could deadlock.
- *
- * But until all the XFS lowlevel code is revamped to
- * handle buffer allocation failures we can't do much.
- */
- if (!(++retries % 100)) {
- printk(KERN_ERR "possibly deadlocking in %s\n",
- __FUNCTION__);
- }
-
- XFS_STATS_INC(pb_page_retries);
- pagebuf_daemon_wakeup();
- current->state = TASK_UNINTERRUPTIBLE;
- schedule_timeout(10);
- goto retry;
- }
-
- XFS_STATS_INC(pb_page_found);
-
- nbytes = min_t(size_t, size, PAGE_CACHE_SIZE - offset);
- size -= nbytes;
-
- if (!PageUptodate(page)) {
- page_count--;
- if (blocksize == PAGE_CACHE_SIZE) {
- if (flags & PBF_READ)
- bp->pb_locked = 1;
- } else if (!PagePrivate(page)) {
- unsigned long j, range;
-
- /*
- * In this case page->private holds a bitmap
- * of uptodate sectors within the page
- */
- ASSERT(blocksize < PAGE_CACHE_SIZE);
- range = (offset + nbytes) >> sectorshift;
- for (j = offset >> sectorshift; j < range; j++)
- if (!test_bit(j, &page->private))
- break;
- if (j == range)
- page_count++;
- }
- }
-
- bp->pb_pages[i] = page;
- offset = 0;
- }
-
- if (!bp->pb_locked) {
- for (i = 0; i < bp->pb_page_count; i++)
- unlock_page(bp->pb_pages[i]);
- }
-
- bp->pb_flags |= _PBF_PAGE_CACHE;
-
- if (page_count) {
- /* if we have any uptodate pages, mark that in the buffer */
- bp->pb_flags &= ~PBF_NONE;
-
- /* if some pages aren't uptodate, mark that in the buffer */
- if (page_count != bp->pb_page_count)
- bp->pb_flags |= PBF_PARTIAL;
- }
-
- PB_TRACE(bp, "lookup_pages", (long)page_count);
- return error;
-}
-
-/*
- * Map buffer into kernel address-space if nessecary.
- */
-STATIC int
-_pagebuf_map_pages(
- xfs_buf_t *bp,
- uint flags)
-{
- /* A single page buffer is always mappable */
- if (bp->pb_page_count == 1) {
- bp->pb_addr = page_address(bp->pb_pages[0]) + bp->pb_offset;
- bp->pb_flags |= PBF_MAPPED;
- } else if (flags & PBF_MAPPED) {
- if (as_list_len > 64)
- purge_addresses();
- bp->pb_addr = vmap(bp->pb_pages, bp->pb_page_count,
- VM_MAP, PAGE_KERNEL);
- if (unlikely(bp->pb_addr == NULL))
- return -ENOMEM;
- bp->pb_addr += bp->pb_offset;
- bp->pb_flags |= PBF_MAPPED;
- }
-
- return 0;
-}
-
-/*
- * Finding and Reading Buffers
- */
-
-/*
- * _pagebuf_find
- *
- * Looks up, and creates if absent, a lockable buffer for
- * a given range of an inode. The buffer is returned
- * locked. If other overlapping buffers exist, they are
- * released before the new buffer is created and locked,
- * which may imply that this call will block until those buffers
- * are unlocked. No I/O is implied by this call.
- */
-STATIC xfs_buf_t *
-_pagebuf_find( /* find buffer for block */
- xfs_buftarg_t *target,/* target for block */
- loff_t ioff, /* starting offset of range */
- size_t isize, /* length of range */
- page_buf_flags_t flags, /* PBF_TRYLOCK */
- xfs_buf_t *new_pb)/* newly allocated buffer */
-{
- loff_t range_base;
- size_t range_length;
- int hval;
- pb_hash_t *h;
- xfs_buf_t *pb, *n;
- int not_locked;
-
- range_base = (ioff << BBSHIFT);
- range_length = (isize << BBSHIFT);
-
- /* Ensure we never do IOs smaller than the sector size */
- BUG_ON(range_length < (1 << target->pbr_sshift));
-
- /* Ensure we never do IOs that are not sector aligned */
- BUG_ON(range_base & (loff_t)target->pbr_smask);
-
- hval = _bhash(target->pbr_bdev, range_base);
- h = &pbhash[hval];
-
- spin_lock(&h->pb_hash_lock);
- list_for_each_entry_safe(pb, n, &h->pb_hash, pb_hash_list) {
- if (pb->pb_target == target &&
- pb->pb_file_offset == range_base &&
- pb->pb_buffer_length == range_length) {
- /* If we look at something bring it to the
- * front of the list for next time
- */
- atomic_inc(&pb->pb_hold);
- list_move(&pb->pb_hash_list, &h->pb_hash);
- goto found;
- }
- }
-
- /* No match found */
- if (new_pb) {
- _pagebuf_initialize(new_pb, target, range_base,
- range_length, flags);
- new_pb->pb_hash_index = hval;
- list_add(&new_pb->pb_hash_list, &h->pb_hash);
- } else {
- XFS_STATS_INC(pb_miss_locked);
- }
-
- spin_unlock(&h->pb_hash_lock);
- return (new_pb);
-
-found:
- spin_unlock(&h->pb_hash_lock);
-
- /* Attempt to get the semaphore without sleeping,
- * if this does not work then we need to drop the
- * spinlock and do a hard attempt on the semaphore.
- */
- not_locked = down_trylock(&pb->pb_sema);
- if (not_locked) {
- if (!(flags & PBF_TRYLOCK)) {
- /* wait for buffer ownership */
- PB_TRACE(pb, "get_lock", 0);
- pagebuf_lock(pb);
- XFS_STATS_INC(pb_get_locked_waited);
- } else {
- /* We asked for a trylock and failed, no need
- * to look at file offset and length here, we
- * know that this pagebuf at least overlaps our
- * pagebuf and is locked, therefore our buffer
- * either does not exist, or is this buffer
- */
-
- pagebuf_rele(pb);
- XFS_STATS_INC(pb_busy_locked);
- return (NULL);
- }
- } else {
- /* trylock worked */
- PB_SET_OWNER(pb);
- }
-
- if (pb->pb_flags & PBF_STALE)
- pb->pb_flags &= PBF_MAPPED;
- PB_TRACE(pb, "got_lock", 0);
- XFS_STATS_INC(pb_get_locked);
- return (pb);
-}
-
-
-/*
- * pagebuf_find
- *
- * pagebuf_find returns a buffer matching the specified range of
- * data for the specified target, if any of the relevant blocks
- * are in memory. The buffer may have unallocated holes, if
- * some, but not all, of the blocks are in memory. Even where
- * pages are present in the buffer, not all of every page may be
- * valid.
- */
-xfs_buf_t *
-pagebuf_find( /* find buffer for block */
- /* if the block is in memory */
- xfs_buftarg_t *target,/* target for block */
- loff_t ioff, /* starting offset of range */
- size_t isize, /* length of range */
- page_buf_flags_t flags) /* PBF_TRYLOCK */
-{
- return _pagebuf_find(target, ioff, isize, flags, NULL);
-}
-
-/*
- * pagebuf_get
- *
- * pagebuf_get assembles a buffer covering the specified range.
- * Some or all of the blocks in the range may be valid. Storage
- * in memory for all portions of the buffer will be allocated,
- * although backing storage may not be. If PBF_READ is set in
- * flags, pagebuf_iostart is called also.
- */
-xfs_buf_t *
-pagebuf_get( /* allocate a buffer */
- xfs_buftarg_t *target,/* target for buffer */
- loff_t ioff, /* starting offset of range */
- size_t isize, /* length of range */
- page_buf_flags_t flags) /* PBF_TRYLOCK */
-{
- xfs_buf_t *pb, *new_pb;
- int error = 0, i;
-
- new_pb = pagebuf_allocate(flags);
- if (unlikely(!new_pb))
- return NULL;
-
- pb = _pagebuf_find(target, ioff, isize, flags, new_pb);
- if (pb == new_pb) {
- error = _pagebuf_lookup_pages(pb, flags);
- if (unlikely(error)) {
- printk(KERN_WARNING
- "pagebuf_get: failed to lookup pages\n");
- goto no_buffer;
- }
- } else {
- pagebuf_deallocate(new_pb);
- if (unlikely(pb == NULL))
- return NULL;
- }
-
- for (i = 0; i < pb->pb_page_count; i++)
- mark_page_accessed(pb->pb_pages[i]);
-
- if (!(pb->pb_flags & PBF_MAPPED)) {
- error = _pagebuf_map_pages(pb, flags);
- if (unlikely(error)) {
- printk(KERN_WARNING
- "pagebuf_get: failed to map pages\n");
- goto no_buffer;
- }
- }
-
- XFS_STATS_INC(pb_get);
-
- /*
- * Always fill in the block number now, the mapped cases can do
- * their own overlay of this later.
- */
- pb->pb_bn = ioff;
- pb->pb_count_desired = pb->pb_buffer_length;
-
- if (flags & PBF_READ) {
- if (PBF_NOT_DONE(pb)) {
- PB_TRACE(pb, "get_read", (unsigned long)flags);
- XFS_STATS_INC(pb_get_read);
- pagebuf_iostart(pb, flags);
- } else if (flags & PBF_ASYNC) {
- PB_TRACE(pb, "get_read_async", (unsigned long)flags);
- /*
- * Read ahead call which is already satisfied,
- * drop the buffer
- */
- goto no_buffer;
- } else {
- PB_TRACE(pb, "get_read_done", (unsigned long)flags);
- /* We do not want read in the flags */
- pb->pb_flags &= ~PBF_READ;
- }
- } else {
- PB_TRACE(pb, "get_write", (unsigned long)flags);
- }
-
- return pb;
-
-no_buffer:
- if (flags & (PBF_LOCK | PBF_TRYLOCK))
- pagebuf_unlock(pb);
- pagebuf_rele(pb);
- return NULL;
-}
-
-/*
- * Create a skeletal pagebuf (no pages associated with it).
- */
-xfs_buf_t *
-pagebuf_lookup(
- xfs_buftarg_t *target,
- loff_t ioff,
- size_t isize,
- page_buf_flags_t flags)
-{
- xfs_buf_t *pb;
-
- pb = pagebuf_allocate(flags);
- if (pb) {
- _pagebuf_initialize(pb, target, ioff, isize, flags);
- }
- return pb;
-}
-
-/*
- * If we are not low on memory then do the readahead in a deadlock
- * safe manner.
- */
-void
-pagebuf_readahead(
- xfs_buftarg_t *target,
- loff_t ioff,
- size_t isize,
- page_buf_flags_t flags)
-{
- struct backing_dev_info *bdi;
-
- bdi = target->pbr_mapping->backing_dev_info;
- if (bdi_read_congested(bdi))
- return;
- if (bdi_write_congested(bdi))
- return;
-
- flags |= (PBF_TRYLOCK|PBF_READ|PBF_ASYNC|PBF_READ_AHEAD);
- pagebuf_get(target, ioff, isize, flags);
-}
-
-xfs_buf_t *
-pagebuf_get_empty(
- size_t len,
- xfs_buftarg_t *target)
-{
- xfs_buf_t *pb;
-
- pb = pagebuf_allocate(0);
- if (pb)
- _pagebuf_initialize(pb, target, 0, len, 0);
- return pb;
-}
-
-static inline struct page *
-mem_to_page(
- void *addr)
-{
- if (((unsigned long)addr < VMALLOC_START) ||
- ((unsigned long)addr >= VMALLOC_END)) {
- return virt_to_page(addr);
- } else {
- return vmalloc_to_page(addr);
- }
-}
-
-int
-pagebuf_associate_memory(
- xfs_buf_t *pb,
- void *mem,
- size_t len)
-{
- int rval;
- int i = 0;
- size_t ptr;
- size_t end, end_cur;
- off_t offset;
- int page_count;
-
- page_count = PAGE_CACHE_ALIGN(len) >> PAGE_CACHE_SHIFT;
- offset = (off_t) mem - ((off_t)mem & PAGE_CACHE_MASK);
- if (offset && (len > PAGE_CACHE_SIZE))
- page_count++;
-
- /* Free any previous set of page pointers */
- if (pb->pb_pages)
- _pagebuf_free_pages(pb);
-
- pb->pb_pages = NULL;
- pb->pb_addr = mem;
-
- rval = _pagebuf_get_pages(pb, page_count, 0);
- if (rval)
- return rval;
-
- pb->pb_offset = offset;
- ptr = (size_t) mem & PAGE_CACHE_MASK;
- end = PAGE_CACHE_ALIGN((size_t) mem + len);
- end_cur = end;
- /* set up first page */
- pb->pb_pages[0] = mem_to_page(mem);
-
- ptr += PAGE_CACHE_SIZE;
- pb->pb_page_count = ++i;
- while (ptr < end) {
- pb->pb_pages[i] = mem_to_page((void *)ptr);
- pb->pb_page_count = ++i;
- ptr += PAGE_CACHE_SIZE;
- }
- pb->pb_locked = 0;
-
- pb->pb_count_desired = pb->pb_buffer_length = len;
- pb->pb_flags |= PBF_MAPPED;
-
- return 0;
-}
-
-xfs_buf_t *
-pagebuf_get_no_daddr(
- size_t len,
- xfs_buftarg_t *target)
-{
- size_t malloc_len = len;
- xfs_buf_t *bp;
- void *data;
- int error;
-
- if (unlikely(len > 0x20000))
- goto fail;
-
- bp = pagebuf_allocate(0);
- if (unlikely(bp == NULL))
- goto fail;
- _pagebuf_initialize(bp, target, 0, len, PBF_FORCEIO);
-
- try_again:
- data = kmem_alloc(malloc_len, KM_SLEEP);
- if (unlikely(data == NULL))
- goto fail_free_buf;
-
- /* check whether alignment matches.. */
- if ((__psunsigned_t)data !=
- ((__psunsigned_t)data & ~target->pbr_smask)) {
- /* .. else double the size and try again */
- kmem_free(data, malloc_len);
- malloc_len <<= 1;
- goto try_again;
- }
-
- error = pagebuf_associate_memory(bp, data, len);
- if (error)
- goto fail_free_mem;
- bp->pb_flags |= _PBF_KMEM_ALLOC;
-
- pagebuf_unlock(bp);
-
- PB_TRACE(bp, "no_daddr", data);
- return bp;
- fail_free_mem:
- kmem_free(data, malloc_len);
- fail_free_buf:
- pagebuf_free(bp);
- fail:
- return NULL;
-}
-
-/*
- * pagebuf_hold
- *
- * Increment reference count on buffer, to hold the buffer concurrently
- * with another thread which may release (free) the buffer asynchronously.
- *
- * Must hold the buffer already to call this function.
- */
-void
-pagebuf_hold(
- xfs_buf_t *pb)
-{
- atomic_inc(&pb->pb_hold);
- PB_TRACE(pb, "hold", 0);
-}
-
-/*
- * pagebuf_rele
- *
- * pagebuf_rele releases a hold on the specified buffer. If the
- * the hold count is 1, pagebuf_rele calls pagebuf_free.
- */
-void
-pagebuf_rele(
- xfs_buf_t *pb)
-{
- pb_hash_t *hash = pb_hash(pb);
-
- PB_TRACE(pb, "rele", pb->pb_relse);
-
- if (atomic_dec_and_lock(&pb->pb_hold, &hash->pb_hash_lock)) {
- int do_free = 1;
-
- if (pb->pb_relse) {
- atomic_inc(&pb->pb_hold);
- spin_unlock(&hash->pb_hash_lock);
- (*(pb->pb_relse)) (pb);
- spin_lock(&hash->pb_hash_lock);
- do_free = 0;
- }
-
- if (pb->pb_flags & PBF_DELWRI) {
- pb->pb_flags |= PBF_ASYNC;
- atomic_inc(&pb->pb_hold);
- pagebuf_delwri_queue(pb, 0);
- do_free = 0;
- } else if (pb->pb_flags & PBF_FS_MANAGED) {
- do_free = 0;
- }
-
- if (do_free) {
- list_del_init(&pb->pb_hash_list);
- spin_unlock(&hash->pb_hash_lock);
- pagebuf_free(pb);
- } else {
- spin_unlock(&hash->pb_hash_lock);
- }
- }
-}
-
-
-/*
- * Mutual exclusion on buffers. Locking model:
- *
- * Buffers associated with inodes for which buffer locking
- * is not enabled are not protected by semaphores, and are
- * assumed to be exclusively owned by the caller. There is a
- * spinlock in the buffer, used by the caller when concurrent
- * access is possible.
- */
-
-/*
- * pagebuf_cond_lock
- *
- * pagebuf_cond_lock locks a buffer object, if it is not already locked.
- * Note that this in no way
- * locks the underlying pages, so it is only useful for synchronizing
- * concurrent use of page buffer objects, not for synchronizing independent
- * access to the underlying pages.
- */
-int
-pagebuf_cond_lock( /* lock buffer, if not locked */
- /* returns -EBUSY if locked) */
- xfs_buf_t *pb)
-{
- int locked;
-
- locked = down_trylock(&pb->pb_sema) == 0;
- if (locked) {
- PB_SET_OWNER(pb);
- }
- PB_TRACE(pb, "cond_lock", (long)locked);
- return(locked ? 0 : -EBUSY);
-}
-
-/*
- * pagebuf_lock_value
- *
- * Return lock value for a pagebuf
- */
-int
-pagebuf_lock_value(
- xfs_buf_t *pb)
-{
- return(atomic_read(&pb->pb_sema.count));
-}
-
-/*
- * pagebuf_lock
- *
- * pagebuf_lock locks a buffer object. Note that this in no way
- * locks the underlying pages, so it is only useful for synchronizing
- * concurrent use of page buffer objects, not for synchronizing independent
- * access to the underlying pages.
- */
-int
-pagebuf_lock(
- xfs_buf_t *pb)
-{
- PB_TRACE(pb, "lock", 0);
- if (atomic_read(&pb->pb_io_remaining))
- blk_run_address_space(pb->pb_target->pbr_mapping);
- down(&pb->pb_sema);
- PB_SET_OWNER(pb);
- PB_TRACE(pb, "locked", 0);
- return 0;
-}
-
-/*
- * pagebuf_unlock
- *
- * pagebuf_unlock releases the lock on the buffer object created by
- * pagebuf_lock or pagebuf_cond_lock (not any
- * pinning of underlying pages created by pagebuf_pin).
- */
-void
-pagebuf_unlock( /* unlock buffer */
- xfs_buf_t *pb) /* buffer to unlock */
-{
- PB_CLEAR_OWNER(pb);
- up(&pb->pb_sema);
- PB_TRACE(pb, "unlock", 0);
-}
-
-
-/*
- * Pinning Buffer Storage in Memory
- */
-
-/*
- * pagebuf_pin
- *
- * pagebuf_pin locks all of the memory represented by a buffer in
- * memory. Multiple calls to pagebuf_pin and pagebuf_unpin, for
- * the same or different buffers affecting a given page, will
- * properly count the number of outstanding "pin" requests. The
- * buffer may be released after the pagebuf_pin and a different
- * buffer used when calling pagebuf_unpin, if desired.
- * pagebuf_pin should be used by the file system when it wants be
- * assured that no attempt will be made to force the affected
- * memory to disk. It does not assure that a given logical page
- * will not be moved to a different physical page.
- */
-void
-pagebuf_pin(
- xfs_buf_t *pb)
-{
- atomic_inc(&pb->pb_pin_count);
- PB_TRACE(pb, "pin", (long)pb->pb_pin_count.counter);
-}
-
-/*
- * pagebuf_unpin
- *
- * pagebuf_unpin reverses the locking of memory performed by
- * pagebuf_pin. Note that both functions affected the logical
- * pages associated with the buffer, not the buffer itself.
- */
-void
-pagebuf_unpin(
- xfs_buf_t *pb)
-{
- if (atomic_dec_and_test(&pb->pb_pin_count)) {
- wake_up_all(&pb->pb_waiters);
- }
- PB_TRACE(pb, "unpin", (long)pb->pb_pin_count.counter);
-}
-
-int
-pagebuf_ispin(
- xfs_buf_t *pb)
-{
- return atomic_read(&pb->pb_pin_count);
-}
-
-/*
- * pagebuf_wait_unpin
- *
- * pagebuf_wait_unpin waits until all of the memory associated
- * with the buffer is not longer locked in memory. It returns
- * immediately if none of the affected pages are locked.
- */
-static inline void
-_pagebuf_wait_unpin(
- xfs_buf_t *pb)
-{
- DECLARE_WAITQUEUE (wait, current);
-
- if (atomic_read(&pb->pb_pin_count) == 0)
- return;
-
- add_wait_queue(&pb->pb_waiters, &wait);
- for (;;) {
- current->state = TASK_UNINTERRUPTIBLE;
- if (atomic_read(&pb->pb_pin_count) == 0)
- break;
- if (atomic_read(&pb->pb_io_remaining))
- blk_run_address_space(pb->pb_target->pbr_mapping);
- schedule();
- }
- remove_wait_queue(&pb->pb_waiters, &wait);
- current->state = TASK_RUNNING;
-}
-
-/*
- * Buffer Utility Routines
- */
-
-/*
- * pagebuf_iodone
- *
- * pagebuf_iodone marks a buffer for which I/O is in progress
- * done with respect to that I/O. The pb_iodone routine, if
- * present, will be called as a side-effect.
- */
-void
-pagebuf_iodone_work(
- void *v)
-{
- xfs_buf_t *bp = (xfs_buf_t *)v;
-
- if (bp->pb_iodone)
- (*(bp->pb_iodone))(bp);
- else if (bp->pb_flags & PBF_ASYNC)
- xfs_buf_relse(bp);
-}
-
-void
-pagebuf_iodone(
- xfs_buf_t *pb,
- int dataio,
- int schedule)
-{
- pb->pb_flags &= ~(PBF_READ | PBF_WRITE);
- if (pb->pb_error == 0) {
- pb->pb_flags &= ~(PBF_PARTIAL | PBF_NONE);
- }
-
- PB_TRACE(pb, "iodone", pb->pb_iodone);
-
- if ((pb->pb_iodone) || (pb->pb_flags & PBF_ASYNC)) {
- if (schedule) {
- INIT_WORK(&pb->pb_iodone_work, pagebuf_iodone_work, pb);
- queue_work(dataio ? pagebuf_dataio_workqueue :
- pagebuf_logio_workqueue, &pb->pb_iodone_work);
- } else {
- pagebuf_iodone_work(pb);
- }
- } else {
- up(&pb->pb_iodonesema);
- }
-}
-
-/*
- * pagebuf_ioerror
- *
- * pagebuf_ioerror sets the error code for a buffer.
- */
-void
-pagebuf_ioerror( /* mark/clear buffer error flag */
- xfs_buf_t *pb, /* buffer to mark */
- int error) /* error to store (0 if none) */
-{
- ASSERT(error >= 0 && error <= 0xffff);
- pb->pb_error = (unsigned short)error;
- PB_TRACE(pb, "ioerror", (unsigned long)error);
-}
-
-/*
- * pagebuf_iostart
- *
- * pagebuf_iostart initiates I/O on a buffer, based on the flags supplied.
- * If necessary, it will arrange for any disk space allocation required,
- * and it will break up the request if the block mappings require it.
- * The pb_iodone routine in the buffer supplied will only be called
- * when all of the subsidiary I/O requests, if any, have been completed.
- * pagebuf_iostart calls the pagebuf_ioinitiate routine or
- * pagebuf_iorequest, if the former routine is not defined, to start
- * the I/O on a given low-level request.
- */
-int
-pagebuf_iostart( /* start I/O on a buffer */
- xfs_buf_t *pb, /* buffer to start */
- page_buf_flags_t flags) /* PBF_LOCK, PBF_ASYNC, PBF_READ, */
- /* PBF_WRITE, PBF_DELWRI, */
- /* PBF_DONT_BLOCK */
-{
- int status = 0;
-
- PB_TRACE(pb, "iostart", (unsigned long)flags);
-
- if (flags & PBF_DELWRI) {
- pb->pb_flags &= ~(PBF_READ | PBF_WRITE | PBF_ASYNC);
- pb->pb_flags |= flags & (PBF_DELWRI | PBF_ASYNC);
- pagebuf_delwri_queue(pb, 1);
- return status;
- }
-
- pb->pb_flags &= ~(PBF_READ | PBF_WRITE | PBF_ASYNC | PBF_DELWRI | \
- PBF_READ_AHEAD | _PBF_RUN_QUEUES);
- pb->pb_flags |= flags & (PBF_READ | PBF_WRITE | PBF_ASYNC | \
- PBF_READ_AHEAD | _PBF_RUN_QUEUES);
-
- BUG_ON(pb->pb_bn == XFS_BUF_DADDR_NULL);
-
- /* For writes allow an alternate strategy routine to precede
- * the actual I/O request (which may not be issued at all in
- * a shutdown situation, for example).
- */
- status = (flags & PBF_WRITE) ?
- pagebuf_iostrategy(pb) : pagebuf_iorequest(pb);
-
- /* Wait for I/O if we are not an async request.
- * Note: async I/O request completion will release the buffer,
- * and that can already be done by this point. So using the
- * buffer pointer from here on, after async I/O, is invalid.
- */
- if (!status && !(flags & PBF_ASYNC))
- status = pagebuf_iowait(pb);
-
- return status;
-}
-
-/*
- * Helper routine for pagebuf_iorequest
- */
-
-STATIC __inline__ int
-_pagebuf_iolocked(
- xfs_buf_t *pb)
-{
- ASSERT(pb->pb_flags & (PBF_READ|PBF_WRITE));
- if (pb->pb_flags & PBF_READ)
- return pb->pb_locked;
- return 0;
-}
-
-STATIC __inline__ void
-_pagebuf_iodone(
- xfs_buf_t *pb,
- int schedule)
-{
- if (atomic_dec_and_test(&pb->pb_io_remaining) == 1) {
- pb->pb_locked = 0;
- pagebuf_iodone(pb, (pb->pb_flags & PBF_FS_DATAIOD), schedule);
- }
-}
-
-STATIC int
-bio_end_io_pagebuf(
- struct bio *bio,
- unsigned int bytes_done,
- int error)
-{
- xfs_buf_t *pb = (xfs_buf_t *)bio->bi_private;
- unsigned int i, blocksize = pb->pb_target->pbr_bsize;
- unsigned int sectorshift = pb->pb_target->pbr_sshift;
- struct bio_vec *bvec = bio->bi_io_vec;
-
- if (bio->bi_size)
- return 1;
-
- if (!test_bit(BIO_UPTODATE, &bio->bi_flags))
- pb->pb_error = EIO;
-
- for (i = 0; i < bio->bi_vcnt; i++, bvec++) {
- struct page *page = bvec->bv_page;
-
- if (pb->pb_error) {
- SetPageError(page);
- } else if (blocksize == PAGE_CACHE_SIZE) {
- SetPageUptodate(page);
- } else if (!PagePrivate(page) &&
- (pb->pb_flags & _PBF_PAGE_CACHE)) {
- unsigned long j, range;
-
- ASSERT(blocksize < PAGE_CACHE_SIZE);
- range = (bvec->bv_offset + bvec->bv_len) >> sectorshift;
- for (j = bvec->bv_offset >> sectorshift; j < range; j++)
- set_bit(j, &page->private);
- if (page->private == (unsigned long)(PAGE_CACHE_SIZE-1))
- SetPageUptodate(page);
- }
-
- if (_pagebuf_iolocked(pb)) {
- unlock_page(page);
- }
- }
-
- _pagebuf_iodone(pb, 1);
- bio_put(bio);
- return 0;
-}
-
-void
-_pagebuf_ioapply(
- xfs_buf_t *pb)
-{
- int i, map_i, total_nr_pages, nr_pages;
- struct bio *bio;
- int offset = pb->pb_offset;
- int size = pb->pb_count_desired;
- sector_t sector = pb->pb_bn;
- unsigned int blocksize = pb->pb_target->pbr_bsize;
- int locking = _pagebuf_iolocked(pb);
-
- total_nr_pages = pb->pb_page_count;
- map_i = 0;
-
- /* Special code path for reading a sub page size pagebuf in --
- * we populate up the whole page, and hence the other metadata
- * in the same page. This optimization is only valid when the
- * filesystem block size and the page size are equal.
- */
- if ((pb->pb_buffer_length < PAGE_CACHE_SIZE) &&
- (pb->pb_flags & PBF_READ) && locking &&
- (blocksize == PAGE_CACHE_SIZE)) {
- bio = bio_alloc(GFP_NOIO, 1);
-
- bio->bi_bdev = pb->pb_target->pbr_bdev;
- bio->bi_sector = sector - (offset >> BBSHIFT);
- bio->bi_end_io = bio_end_io_pagebuf;
- bio->bi_private = pb;
-
- bio_add_page(bio, pb->pb_pages[0], PAGE_CACHE_SIZE, 0);
- size = 0;
-
- atomic_inc(&pb->pb_io_remaining);
-
- goto submit_io;
- }
-
- /* Lock down the pages which we need to for the request */
- if (locking && (pb->pb_flags & PBF_WRITE) && (pb->pb_locked == 0)) {
- for (i = 0; size; i++) {
- int nbytes = PAGE_CACHE_SIZE - offset;
- struct page *page = pb->pb_pages[i];
-
- if (nbytes > size)
- nbytes = size;
-
- lock_page(page);
-
- size -= nbytes;
- offset = 0;
- }
- offset = pb->pb_offset;
- size = pb->pb_count_desired;
- }
-
-next_chunk:
- atomic_inc(&pb->pb_io_remaining);
- nr_pages = BIO_MAX_SECTORS >> (PAGE_SHIFT - BBSHIFT);
- if (nr_pages > total_nr_pages)
- nr_pages = total_nr_pages;
-
- bio = bio_alloc(GFP_NOIO, nr_pages);
- bio->bi_bdev = pb->pb_target->pbr_bdev;
- bio->bi_sector = sector;
- bio->bi_end_io = bio_end_io_pagebuf;
- bio->bi_private = pb;
-
- for (; size && nr_pages; nr_pages--, map_i++) {
- int nbytes = PAGE_CACHE_SIZE - offset;
-
- if (nbytes > size)
- nbytes = size;
-
- if (bio_add_page(bio, pb->pb_pages[map_i],
- nbytes, offset) < nbytes)
- break;
-
- offset = 0;
- sector += nbytes >> BBSHIFT;
- size -= nbytes;
- total_nr_pages--;
- }
-
-submit_io:
- if (likely(bio->bi_size)) {
- submit_bio((pb->pb_flags & PBF_READ) ? READ : WRITE, bio);
- if (size)
- goto next_chunk;
- } else {
- bio_put(bio);
- pagebuf_ioerror(pb, EIO);
- }
-
- if (pb->pb_flags & _PBF_RUN_QUEUES) {
- pb->pb_flags &= ~_PBF_RUN_QUEUES;
- if (atomic_read(&pb->pb_io_remaining) > 1)
- blk_run_address_space(pb->pb_target->pbr_mapping);
- }
-}
-
-/*
- * pagebuf_iorequest -- the core I/O request routine.
- */
-int
-pagebuf_iorequest( /* start real I/O */
- xfs_buf_t *pb) /* buffer to convey to device */
-{
- PB_TRACE(pb, "iorequest", 0);
-
- if (pb->pb_flags & PBF_DELWRI) {
- pagebuf_delwri_queue(pb, 1);
- return 0;
- }
-
- if (pb->pb_flags & PBF_WRITE) {
- _pagebuf_wait_unpin(pb);
- }
-
- pagebuf_hold(pb);
-
- /* Set the count to 1 initially, this will stop an I/O
- * completion callout which happens before we have started
- * all the I/O from calling pagebuf_iodone too early.
- */
- atomic_set(&pb->pb_io_remaining, 1);
- _pagebuf_ioapply(pb);
- _pagebuf_iodone(pb, 0);
-
- pagebuf_rele(pb);
- return 0;
-}
-
-/*
- * pagebuf_iowait
- *
- * pagebuf_iowait waits for I/O to complete on the buffer supplied.
- * It returns immediately if no I/O is pending. In any case, it returns
- * the error code, if any, or 0 if there is no error.
- */
-int
-pagebuf_iowait(
- xfs_buf_t *pb)
-{
- PB_TRACE(pb, "iowait", 0);
- if (atomic_read(&pb->pb_io_remaining))
- blk_run_address_space(pb->pb_target->pbr_mapping);
- down(&pb->pb_iodonesema);
- PB_TRACE(pb, "iowaited", (long)pb->pb_error);
- return pb->pb_error;
-}
-
-caddr_t
-pagebuf_offset(
- xfs_buf_t *pb,
- size_t offset)
-{
- struct page *page;
-
- offset += pb->pb_offset;
-
- page = pb->pb_pages[offset >> PAGE_CACHE_SHIFT];
- return (caddr_t) page_address(page) + (offset & (PAGE_CACHE_SIZE - 1));
-}
-
-/*
- * pagebuf_iomove
- *
- * Move data into or out of a buffer.
- */
-void
-pagebuf_iomove(
- xfs_buf_t *pb, /* buffer to process */
- size_t boff, /* starting buffer offset */
- size_t bsize, /* length to copy */
- caddr_t data, /* data address */
- page_buf_rw_t mode) /* read/write flag */
-{
- size_t bend, cpoff, csize;
- struct page *page;
-
- bend = boff + bsize;
- while (boff < bend) {
- page = pb->pb_pages[page_buf_btoct(boff + pb->pb_offset)];
- cpoff = page_buf_poff(boff + pb->pb_offset);
- csize = min_t(size_t,
- PAGE_CACHE_SIZE-cpoff, pb->pb_count_desired-boff);
-
- ASSERT(((csize + cpoff) <= PAGE_CACHE_SIZE));
-
- switch (mode) {
- case PBRW_ZERO:
- memset(page_address(page) + cpoff, 0, csize);
- break;
- case PBRW_READ:
- memcpy(data, page_address(page) + cpoff, csize);
- break;
- case PBRW_WRITE:
- memcpy(page_address(page) + cpoff, data, csize);
- }
-
- boff += csize;
- data += csize;
- }
-}
-
-/*
- * Handling of buftargs.
- */
-
-void
-xfs_free_buftarg(
- xfs_buftarg_t *btp,
- int external)
-{
- xfs_flush_buftarg(btp, 1);
- if (external)
- xfs_blkdev_put(btp->pbr_bdev);
- kmem_free(btp, sizeof(*btp));
-}
-
-void
-xfs_incore_relse(
- xfs_buftarg_t *btp,
- int delwri_only,
- int wait)
-{
- invalidate_bdev(btp->pbr_bdev, 1);
- truncate_inode_pages(btp->pbr_mapping, 0LL);
-}
-
-void
-xfs_setsize_buftarg(
- xfs_buftarg_t *btp,
- unsigned int blocksize,
- unsigned int sectorsize)
-{
- btp->pbr_bsize = blocksize;
- btp->pbr_sshift = ffs(sectorsize) - 1;
- btp->pbr_smask = sectorsize - 1;
-
- if (set_blocksize(btp->pbr_bdev, sectorsize)) {
- printk(KERN_WARNING
- "XFS: Cannot set_blocksize to %u on device %s\n",
- sectorsize, XFS_BUFTARG_NAME(btp));
- }
-}
-
-xfs_buftarg_t *
-xfs_alloc_buftarg(
- struct block_device *bdev)
-{
- xfs_buftarg_t *btp;
-
- btp = kmem_zalloc(sizeof(*btp), KM_SLEEP);
-
- btp->pbr_dev = bdev->bd_dev;
- btp->pbr_bdev = bdev;
- btp->pbr_mapping = bdev->bd_inode->i_mapping;
- xfs_setsize_buftarg(btp, PAGE_CACHE_SIZE, bdev_hardsect_size(bdev));
-
- return btp;
-}
-
-
-/*
- * Pagebuf delayed write buffer handling
- */
-
-STATIC LIST_HEAD(pbd_delwrite_queue);
-STATIC spinlock_t pbd_delwrite_lock = SPIN_LOCK_UNLOCKED;
-
-STATIC void
-pagebuf_delwri_queue(
- xfs_buf_t *pb,
- int unlock)
-{
- PB_TRACE(pb, "delwri_q", (long)unlock);
- ASSERT(pb->pb_flags & PBF_DELWRI);
-
- spin_lock(&pbd_delwrite_lock);
- /* If already in the queue, dequeue and place at tail */
- if (!list_empty(&pb->pb_list)) {
- if (unlock) {
- atomic_dec(&pb->pb_hold);
- }
- list_del(&pb->pb_list);
- }
-
- list_add_tail(&pb->pb_list, &pbd_delwrite_queue);
- pb->pb_queuetime = jiffies;
- spin_unlock(&pbd_delwrite_lock);
-
- if (unlock)
- pagebuf_unlock(pb);
-}
-
-void
-pagebuf_delwri_dequeue(
- xfs_buf_t *pb)
-{
- PB_TRACE(pb, "delwri_uq", 0);
- spin_lock(&pbd_delwrite_lock);
- list_del_init(&pb->pb_list);
- pb->pb_flags &= ~PBF_DELWRI;
- spin_unlock(&pbd_delwrite_lock);
-}
-
-STATIC void
-pagebuf_runall_queues(
- struct workqueue_struct *queue)
-{
- flush_workqueue(queue);
-}
-
-/* Defines for pagebuf daemon */
-STATIC DECLARE_COMPLETION(pagebuf_daemon_done);
-STATIC struct task_struct *pagebuf_daemon_task;
-STATIC int pagebuf_daemon_active;
-STATIC int force_flush;
-
-STATIC void
-pagebuf_daemon_wakeup(void)
-{
- force_flush = 1;
- barrier();
- wake_up_process(pagebuf_daemon_task);
-}
-
-STATIC int
-pagebuf_daemon(
- void *data)
-{
- struct list_head tmp;
- xfs_buf_t *pb, *n;
-
- /* Set up the thread */
- daemonize("xfsbufd");
- current->flags |= PF_MEMALLOC;
-
- pagebuf_daemon_task = current;
- pagebuf_daemon_active = 1;
- barrier();
-
- INIT_LIST_HEAD(&tmp);
- do {
- /* swsusp */
- if (current->flags & PF_FREEZE)
- refrigerator(PF_FREEZE);
-
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(xfs_flush_interval);
-
- spin_lock(&pbd_delwrite_lock);
- list_for_each_entry_safe(pb, n, &pbd_delwrite_queue, pb_list) {
- PB_TRACE(pb, "walkq1", (long)pagebuf_ispin(pb));
- ASSERT(pb->pb_flags & PBF_DELWRI);
-
- if (!pagebuf_ispin(pb) && !pagebuf_cond_lock(pb)) {
- if (!force_flush &&
- time_before(jiffies,
- pb->pb_queuetime +
- xfs_age_buffer)) {
- pagebuf_unlock(pb);
- break;
- }
-
- pb->pb_flags &= ~PBF_DELWRI;
- pb->pb_flags |= PBF_WRITE;
- list_move(&pb->pb_list, &tmp);
- }
- }
- spin_unlock(&pbd_delwrite_lock);
-
- while (!list_empty(&tmp)) {
- pb = list_entry(tmp.next, xfs_buf_t, pb_list);
- list_del_init(&pb->pb_list);
- pagebuf_iostrategy(pb);
- blk_run_address_space(pb->pb_target->pbr_mapping);
- }
-
- if (as_list_len > 0)
- purge_addresses();
-
- force_flush = 0;
- } while (pagebuf_daemon_active);
-
- complete_and_exit(&pagebuf_daemon_done, 0);
-}
-
-/*
- * Go through all incore buffers, and release buffers if they belong to
- * the given device. This is used in filesystem error handling to
- * preserve the consistency of its metadata.
- */
-int
-xfs_flush_buftarg(
- xfs_buftarg_t *target,
- int wait)
-{
- struct list_head tmp;
- xfs_buf_t *pb, *n;
- int pincount = 0;
-
- pagebuf_runall_queues(pagebuf_dataio_workqueue);
- pagebuf_runall_queues(pagebuf_logio_workqueue);
-
- INIT_LIST_HEAD(&tmp);
- spin_lock(&pbd_delwrite_lock);
- list_for_each_entry_safe(pb, n, &pbd_delwrite_queue, pb_list) {
-
- if (pb->pb_target != target)
- continue;
-
- ASSERT(pb->pb_flags & PBF_DELWRI);
- PB_TRACE(pb, "walkq2", (long)pagebuf_ispin(pb));
- if (pagebuf_ispin(pb)) {
- pincount++;
- continue;
- }
-
- pb->pb_flags &= ~PBF_DELWRI;
- pb->pb_flags |= PBF_WRITE;
- list_move(&pb->pb_list, &tmp);
- }
- spin_unlock(&pbd_delwrite_lock);
-
- /*
- * Dropped the delayed write list lock, now walk the temporary list
- */
- list_for_each_entry_safe(pb, n, &tmp, pb_list) {
- if (wait)
- pb->pb_flags &= ~PBF_ASYNC;
- else
- list_del_init(&pb->pb_list);
-
- pagebuf_lock(pb);
- pagebuf_iostrategy(pb);
- }
-
- /*
- * Remaining list items must be flushed before returning
- */
- while (!list_empty(&tmp)) {
- pb = list_entry(tmp.next, xfs_buf_t, pb_list);
-
- list_del_init(&pb->pb_list);
- xfs_iowait(pb);
- xfs_buf_relse(pb);
- }
-
- if (wait)
- blk_run_address_space(target->pbr_mapping);
-
- return pincount;
-}
-
-STATIC int
-pagebuf_daemon_start(void)
-{
- int rval;
-
- pagebuf_logio_workqueue = create_workqueue("xfslogd");
- if (!pagebuf_logio_workqueue)
- return -ENOMEM;
-
- pagebuf_dataio_workqueue = create_workqueue("xfsdatad");
- if (!pagebuf_dataio_workqueue) {
- destroy_workqueue(pagebuf_logio_workqueue);
- return -ENOMEM;
- }
-
- rval = kernel_thread(pagebuf_daemon, NULL, CLONE_FS|CLONE_FILES);
- if (rval < 0) {
- destroy_workqueue(pagebuf_logio_workqueue);
- destroy_workqueue(pagebuf_dataio_workqueue);
- }
-
- return rval;
-}
-
-/*
- * pagebuf_daemon_stop
- *
- * Note: do not mark as __exit, it is called from pagebuf_terminate.
- */
-STATIC void
-pagebuf_daemon_stop(void)
-{
- pagebuf_daemon_active = 0;
- barrier();
- wait_for_completion(&pagebuf_daemon_done);
-
- destroy_workqueue(pagebuf_logio_workqueue);
- destroy_workqueue(pagebuf_dataio_workqueue);
-}
-
-/*
- * Initialization and Termination
- */
-
-int __init
-pagebuf_init(void)
-{
- int i;
-
- pagebuf_cache = kmem_cache_create("xfs_buf_t", sizeof(xfs_buf_t), 0,
- SLAB_HWCACHE_ALIGN, NULL, NULL);
- if (pagebuf_cache == NULL) {
- printk("pagebuf: couldn't init pagebuf cache\n");
- pagebuf_terminate();
- return -ENOMEM;
- }
-
- for (i = 0; i < NHASH; i++) {
- spin_lock_init(&pbhash[i].pb_hash_lock);
- INIT_LIST_HEAD(&pbhash[i].pb_hash);
- }
-
-#ifdef PAGEBUF_TRACE
- pagebuf_trace_buf = ktrace_alloc(PAGEBUF_TRACE_SIZE, KM_SLEEP);
-#endif
-
- pagebuf_daemon_start();
- return 0;
-}
-
-
-/*
- * pagebuf_terminate.
- *
- * Note: do not mark as __exit, this is also called from the __init code.
- */
-void
-pagebuf_terminate(void)
-{
- pagebuf_daemon_stop();
-
-#ifdef PAGEBUF_TRACE
- ktrace_free(pagebuf_trace_buf);
-#endif
-
- kmem_cache_destroy(pagebuf_cache);
-}
+++ /dev/null
-/*
- * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-/*
- * Written by Steve Lord, Jim Mostek, Russell Cattelan at SGI
- */
-
-#ifndef __XFS_BUF_H__
-#define __XFS_BUF_H__
-
-#include <linux/config.h>
-#include <linux/list.h>
-#include <linux/types.h>
-#include <linux/spinlock.h>
-#include <asm/system.h>
-#include <linux/mm.h>
-#include <linux/fs.h>
-#include <linux/buffer_head.h>
-#include <linux/uio.h>
-
-/*
- * Base types
- */
-
-#define XFS_BUF_DADDR_NULL ((xfs_daddr_t) (-1LL))
-
-#define page_buf_ctob(pp) ((pp) * PAGE_CACHE_SIZE)
-#define page_buf_btoc(dd) (((dd) + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT)
-#define page_buf_btoct(dd) ((dd) >> PAGE_CACHE_SHIFT)
-#define page_buf_poff(aa) ((aa) & ~PAGE_CACHE_MASK)
-
-typedef enum page_buf_rw_e {
- PBRW_READ = 1, /* transfer into target memory */
- PBRW_WRITE = 2, /* transfer from target memory */
- PBRW_ZERO = 3 /* Zero target memory */
-} page_buf_rw_t;
-
-
-typedef enum page_buf_flags_e { /* pb_flags values */
- PBF_READ = (1 << 0), /* buffer intended for reading from device */
- PBF_WRITE = (1 << 1), /* buffer intended for writing to device */
- PBF_MAPPED = (1 << 2), /* buffer mapped (pb_addr valid) */
- PBF_PARTIAL = (1 << 3), /* buffer partially read */
- PBF_ASYNC = (1 << 4), /* initiator will not wait for completion */
- PBF_NONE = (1 << 5), /* buffer not read at all */
- PBF_DELWRI = (1 << 6), /* buffer has dirty pages */
- PBF_STALE = (1 << 7), /* buffer has been staled, do not find it */
- PBF_FS_MANAGED = (1 << 8), /* filesystem controls freeing memory */
- PBF_FS_DATAIOD = (1 << 9), /* schedule IO completion on fs datad */
- PBF_FORCEIO = (1 << 10), /* ignore any cache state */
- PBF_FLUSH = (1 << 11), /* flush disk write cache */
- PBF_READ_AHEAD = (1 << 12), /* asynchronous read-ahead */
-
- /* flags used only as arguments to access routines */
- PBF_LOCK = (1 << 14), /* lock requested */
- PBF_TRYLOCK = (1 << 15), /* lock requested, but do not wait */
- PBF_DONT_BLOCK = (1 << 16), /* do not block in current thread */
-
- /* flags used only internally */
- _PBF_PAGE_CACHE = (1 << 17),/* backed by pagecache */
- _PBF_KMEM_ALLOC = (1 << 18),/* backed by kmem_alloc() */
- _PBF_RUN_QUEUES = (1 << 19),/* run block device task queue */
-} page_buf_flags_t;
-
-#define PBF_UPDATE (PBF_READ | PBF_WRITE)
-#define PBF_NOT_DONE(pb) (((pb)->pb_flags & (PBF_PARTIAL|PBF_NONE)) != 0)
-#define PBF_DONE(pb) (((pb)->pb_flags & (PBF_PARTIAL|PBF_NONE)) == 0)
-
-typedef struct xfs_buftarg {
- dev_t pbr_dev;
- struct block_device *pbr_bdev;
- struct address_space *pbr_mapping;
- unsigned int pbr_bsize;
- unsigned int pbr_sshift;
- size_t pbr_smask;
-} xfs_buftarg_t;
-
-/*
- * xfs_buf_t: Buffer structure for page cache-based buffers
- *
- * This buffer structure is used by the page cache buffer management routines
- * to refer to an assembly of pages forming a logical buffer. The actual
- * I/O is performed with buffer_head or bio structures, as required by drivers,
- * for drivers which do not understand this structure. The buffer structure is
- * used on temporary basis only, and discarded when released.
- *
- * The real data storage is recorded in the page cache. Metadata is
- * hashed to the inode for the block device on which the file system resides.
- * File data is hashed to the inode for the file. Pages which are only
- * partially filled with data have bits set in their block_map entry
- * to indicate which disk blocks in the page are not valid.
- */
-
-struct xfs_buf;
-typedef void (*page_buf_iodone_t)(struct xfs_buf *);
- /* call-back function on I/O completion */
-typedef void (*page_buf_relse_t)(struct xfs_buf *);
- /* call-back function on I/O completion */
-typedef int (*page_buf_bdstrat_t)(struct xfs_buf *);
-
-#define PB_PAGES 4
-
-typedef struct xfs_buf {
- struct semaphore pb_sema; /* semaphore for lockables */
- unsigned long pb_queuetime; /* time buffer was queued */
- atomic_t pb_pin_count; /* pin count */
- wait_queue_head_t pb_waiters; /* unpin waiters */
- struct list_head pb_list;
- page_buf_flags_t pb_flags; /* status flags */
- struct list_head pb_hash_list;
- xfs_buftarg_t *pb_target; /* logical object */
- atomic_t pb_hold; /* reference count */
- xfs_daddr_t pb_bn; /* block number for I/O */
- loff_t pb_file_offset; /* offset in file */
- size_t pb_buffer_length; /* size of buffer in bytes */
- size_t pb_count_desired; /* desired transfer size */
- void *pb_addr; /* virtual address of buffer */
- struct work_struct pb_iodone_work;
- atomic_t pb_io_remaining;/* #outstanding I/O requests */
- page_buf_iodone_t pb_iodone; /* I/O completion function */
- page_buf_relse_t pb_relse; /* releasing function */
- page_buf_bdstrat_t pb_strat; /* pre-write function */
- struct semaphore pb_iodonesema; /* Semaphore for I/O waiters */
- void *pb_fspriv;
- void *pb_fspriv2;
- void *pb_fspriv3;
- unsigned short pb_error; /* error code on I/O */
- unsigned short pb_page_count; /* size of page array */
- unsigned short pb_offset; /* page offset in first page */
- unsigned char pb_locked; /* page array is locked */
- unsigned char pb_hash_index; /* hash table index */
- struct page **pb_pages; /* array of page pointers */
- struct page *pb_page_array[PB_PAGES]; /* inline pages */
-#ifdef PAGEBUF_LOCK_TRACKING
- int pb_last_holder;
-#endif
-} xfs_buf_t;
-
-
-/* Finding and Reading Buffers */
-
-extern xfs_buf_t *pagebuf_find( /* find buffer for block if */
- /* the block is in memory */
- xfs_buftarg_t *, /* inode for block */
- loff_t, /* starting offset of range */
- size_t, /* length of range */
- page_buf_flags_t); /* PBF_LOCK */
-
-extern xfs_buf_t *pagebuf_get( /* allocate a buffer */
- xfs_buftarg_t *, /* inode for buffer */
- loff_t, /* starting offset of range */
- size_t, /* length of range */
- page_buf_flags_t); /* PBF_LOCK, PBF_READ, */
- /* PBF_ASYNC */
-
-extern xfs_buf_t *pagebuf_lookup(
- xfs_buftarg_t *,
- loff_t, /* starting offset of range */
- size_t, /* length of range */
- page_buf_flags_t); /* PBF_READ, PBF_WRITE, */
- /* PBF_FORCEIO, */
-
-extern xfs_buf_t *pagebuf_get_empty( /* allocate pagebuf struct with */
- /* no memory or disk address */
- size_t len,
- xfs_buftarg_t *); /* mount point "fake" inode */
-
-extern xfs_buf_t *pagebuf_get_no_daddr(/* allocate pagebuf struct */
- /* without disk address */
- size_t len,
- xfs_buftarg_t *); /* mount point "fake" inode */
-
-extern int pagebuf_associate_memory(
- xfs_buf_t *,
- void *,
- size_t);
-
-extern void pagebuf_hold( /* increment reference count */
- xfs_buf_t *); /* buffer to hold */
-
-extern void pagebuf_readahead( /* read ahead into cache */
- xfs_buftarg_t *, /* target for buffer (or NULL) */
- loff_t, /* starting offset of range */
- size_t, /* length of range */
- page_buf_flags_t); /* additional read flags */
-
-/* Releasing Buffers */
-
-extern void pagebuf_free( /* deallocate a buffer */
- xfs_buf_t *); /* buffer to deallocate */
-
-extern void pagebuf_rele( /* release hold on a buffer */
- xfs_buf_t *); /* buffer to release */
-
-/* Locking and Unlocking Buffers */
-
-extern int pagebuf_cond_lock( /* lock buffer, if not locked */
- /* (returns -EBUSY if locked) */
- xfs_buf_t *); /* buffer to lock */
-
-extern int pagebuf_lock_value( /* return count on lock */
- xfs_buf_t *); /* buffer to check */
-
-extern int pagebuf_lock( /* lock buffer */
- xfs_buf_t *); /* buffer to lock */
-
-extern void pagebuf_unlock( /* unlock buffer */
- xfs_buf_t *); /* buffer to unlock */
-
-/* Buffer Read and Write Routines */
-
-extern void pagebuf_iodone( /* mark buffer I/O complete */
- xfs_buf_t *, /* buffer to mark */
- int, /* use data/log helper thread. */
- int); /* run completion locally, or in
- * a helper thread. */
-
-extern void pagebuf_ioerror( /* mark buffer in error (or not) */
- xfs_buf_t *, /* buffer to mark */
- int); /* error to store (0 if none) */
-
-extern int pagebuf_iostart( /* start I/O on a buffer */
- xfs_buf_t *, /* buffer to start */
- page_buf_flags_t); /* PBF_LOCK, PBF_ASYNC, */
- /* PBF_READ, PBF_WRITE, */
- /* PBF_DELWRI */
-
-extern int pagebuf_iorequest( /* start real I/O */
- xfs_buf_t *); /* buffer to convey to device */
-
-extern int pagebuf_iowait( /* wait for buffer I/O done */
- xfs_buf_t *); /* buffer to wait on */
-
-extern void pagebuf_iomove( /* move data in/out of pagebuf */
- xfs_buf_t *, /* buffer to manipulate */
- size_t, /* starting buffer offset */
- size_t, /* length in buffer */
- caddr_t, /* data pointer */
- page_buf_rw_t); /* direction */
-
-static inline int pagebuf_iostrategy(xfs_buf_t *pb)
-{
- return pb->pb_strat ? pb->pb_strat(pb) : pagebuf_iorequest(pb);
-}
-
-static inline int pagebuf_geterror(xfs_buf_t *pb)
-{
- return pb ? pb->pb_error : ENOMEM;
-}
-
-/* Buffer Utility Routines */
-
-extern caddr_t pagebuf_offset( /* pointer at offset in buffer */
- xfs_buf_t *, /* buffer to offset into */
- size_t); /* offset */
-
-/* Pinning Buffer Storage in Memory */
-
-extern void pagebuf_pin( /* pin buffer in memory */
- xfs_buf_t *); /* buffer to pin */
-
-extern void pagebuf_unpin( /* unpin buffered data */
- xfs_buf_t *); /* buffer to unpin */
-
-extern int pagebuf_ispin( /* check if buffer is pinned */
- xfs_buf_t *); /* buffer to check */
-
-/* Delayed Write Buffer Routines */
-
-extern void pagebuf_delwri_dequeue(xfs_buf_t *);
-
-/* Buffer Daemon Setup Routines */
-
-extern int pagebuf_init(void);
-extern void pagebuf_terminate(void);
-
-
-#ifdef PAGEBUF_TRACE
-extern ktrace_t *pagebuf_trace_buf;
-extern void pagebuf_trace(
- xfs_buf_t *, /* buffer being traced */
- char *, /* description of operation */
- void *, /* arbitrary diagnostic value */
- void *); /* return address */
-#else
-# define pagebuf_trace(pb, id, ptr, ra) do { } while (0)
-#endif
-
-#define pagebuf_target_name(target) \
- ({ char __b[BDEVNAME_SIZE]; bdevname((target)->pbr_bdev, __b); __b; })
-
-
-
-
-
-/* These are just for xfs_syncsub... it sets an internal variable
- * then passes it to VOP_FLUSH_PAGES or adds the flags to a newly gotten buf_t
- */
-#define XFS_B_ASYNC PBF_ASYNC
-#define XFS_B_DELWRI PBF_DELWRI
-#define XFS_B_READ PBF_READ
-#define XFS_B_WRITE PBF_WRITE
-#define XFS_B_STALE PBF_STALE
-
-#define XFS_BUF_TRYLOCK PBF_TRYLOCK
-#define XFS_INCORE_TRYLOCK PBF_TRYLOCK
-#define XFS_BUF_LOCK PBF_LOCK
-#define XFS_BUF_MAPPED PBF_MAPPED
-
-#define BUF_BUSY PBF_DONT_BLOCK
-
-#define XFS_BUF_BFLAGS(x) ((x)->pb_flags)
-#define XFS_BUF_ZEROFLAGS(x) \
- ((x)->pb_flags &= ~(PBF_READ|PBF_WRITE|PBF_ASYNC|PBF_DELWRI))
-
-#define XFS_BUF_STALE(x) ((x)->pb_flags |= XFS_B_STALE)
-#define XFS_BUF_UNSTALE(x) ((x)->pb_flags &= ~XFS_B_STALE)
-#define XFS_BUF_ISSTALE(x) ((x)->pb_flags & XFS_B_STALE)
-#define XFS_BUF_SUPER_STALE(x) do { \
- XFS_BUF_STALE(x); \
- xfs_buf_undelay(x); \
- XFS_BUF_DONE(x); \
- } while (0)
-
-#define XFS_BUF_MANAGE PBF_FS_MANAGED
-#define XFS_BUF_UNMANAGE(x) ((x)->pb_flags &= ~PBF_FS_MANAGED)
-
-static inline void xfs_buf_undelay(xfs_buf_t *pb)
-{
- if (pb->pb_flags & PBF_DELWRI) {
- if (pb->pb_list.next != &pb->pb_list) {
- pagebuf_delwri_dequeue(pb);
- pagebuf_rele(pb);
- } else {
- pb->pb_flags &= ~PBF_DELWRI;
- }
- }
-}
-
-#define XFS_BUF_DELAYWRITE(x) ((x)->pb_flags |= PBF_DELWRI)
-#define XFS_BUF_UNDELAYWRITE(x) xfs_buf_undelay(x)
-#define XFS_BUF_ISDELAYWRITE(x) ((x)->pb_flags & PBF_DELWRI)
-
-#define XFS_BUF_ERROR(x,no) pagebuf_ioerror(x,no)
-#define XFS_BUF_GETERROR(x) pagebuf_geterror(x)
-#define XFS_BUF_ISERROR(x) (pagebuf_geterror(x)?1:0)
-
-#define XFS_BUF_DONE(x) ((x)->pb_flags &= ~(PBF_PARTIAL|PBF_NONE))
-#define XFS_BUF_UNDONE(x) ((x)->pb_flags |= PBF_PARTIAL|PBF_NONE)
-#define XFS_BUF_ISDONE(x) (!(PBF_NOT_DONE(x)))
-
-#define XFS_BUF_BUSY(x) ((x)->pb_flags |= PBF_FORCEIO)
-#define XFS_BUF_UNBUSY(x) ((x)->pb_flags &= ~PBF_FORCEIO)
-#define XFS_BUF_ISBUSY(x) (1)
-
-#define XFS_BUF_ASYNC(x) ((x)->pb_flags |= PBF_ASYNC)
-#define XFS_BUF_UNASYNC(x) ((x)->pb_flags &= ~PBF_ASYNC)
-#define XFS_BUF_ISASYNC(x) ((x)->pb_flags & PBF_ASYNC)
-
-#define XFS_BUF_FLUSH(x) ((x)->pb_flags |= PBF_FLUSH)
-#define XFS_BUF_UNFLUSH(x) ((x)->pb_flags &= ~PBF_FLUSH)
-#define XFS_BUF_ISFLUSH(x) ((x)->pb_flags & PBF_FLUSH)
-
-#define XFS_BUF_SHUT(x) printk("XFS_BUF_SHUT not implemented yet\n")
-#define XFS_BUF_UNSHUT(x) printk("XFS_BUF_UNSHUT not implemented yet\n")
-#define XFS_BUF_ISSHUT(x) (0)
-
-#define XFS_BUF_HOLD(x) pagebuf_hold(x)
-#define XFS_BUF_READ(x) ((x)->pb_flags |= PBF_READ)
-#define XFS_BUF_UNREAD(x) ((x)->pb_flags &= ~PBF_READ)
-#define XFS_BUF_ISREAD(x) ((x)->pb_flags & PBF_READ)
-
-#define XFS_BUF_WRITE(x) ((x)->pb_flags |= PBF_WRITE)
-#define XFS_BUF_UNWRITE(x) ((x)->pb_flags &= ~PBF_WRITE)
-#define XFS_BUF_ISWRITE(x) ((x)->pb_flags & PBF_WRITE)
-
-#define XFS_BUF_ISUNINITIAL(x) (0)
-#define XFS_BUF_UNUNINITIAL(x) (0)
-
-#define XFS_BUF_BP_ISMAPPED(bp) 1
-
-#define XFS_BUF_DATAIO(x) ((x)->pb_flags |= PBF_FS_DATAIOD)
-#define XFS_BUF_UNDATAIO(x) ((x)->pb_flags &= ~PBF_FS_DATAIOD)
-
-#define XFS_BUF_IODONE_FUNC(buf) (buf)->pb_iodone
-#define XFS_BUF_SET_IODONE_FUNC(buf, func) \
- (buf)->pb_iodone = (func)
-#define XFS_BUF_CLR_IODONE_FUNC(buf) \
- (buf)->pb_iodone = NULL
-#define XFS_BUF_SET_BDSTRAT_FUNC(buf, func) \
- (buf)->pb_strat = (func)
-#define XFS_BUF_CLR_BDSTRAT_FUNC(buf) \
- (buf)->pb_strat = NULL
-
-#define XFS_BUF_FSPRIVATE(buf, type) \
- ((type)(buf)->pb_fspriv)
-#define XFS_BUF_SET_FSPRIVATE(buf, value) \
- (buf)->pb_fspriv = (void *)(value)
-#define XFS_BUF_FSPRIVATE2(buf, type) \
- ((type)(buf)->pb_fspriv2)
-#define XFS_BUF_SET_FSPRIVATE2(buf, value) \
- (buf)->pb_fspriv2 = (void *)(value)
-#define XFS_BUF_FSPRIVATE3(buf, type) \
- ((type)(buf)->pb_fspriv3)
-#define XFS_BUF_SET_FSPRIVATE3(buf, value) \
- (buf)->pb_fspriv3 = (void *)(value)
-#define XFS_BUF_SET_START(buf)
-
-#define XFS_BUF_SET_BRELSE_FUNC(buf, value) \
- (buf)->pb_relse = (value)
-
-#define XFS_BUF_PTR(bp) (xfs_caddr_t)((bp)->pb_addr)
-
-extern inline xfs_caddr_t xfs_buf_offset(xfs_buf_t *bp, size_t offset)
-{
- if (bp->pb_flags & PBF_MAPPED)
- return XFS_BUF_PTR(bp) + offset;
- return (xfs_caddr_t) pagebuf_offset(bp, offset);
-}
-
-#define XFS_BUF_SET_PTR(bp, val, count) \
- pagebuf_associate_memory(bp, val, count)
-#define XFS_BUF_ADDR(bp) ((bp)->pb_bn)
-#define XFS_BUF_SET_ADDR(bp, blk) \
- ((bp)->pb_bn = (blk))
-#define XFS_BUF_OFFSET(bp) ((bp)->pb_file_offset)
-#define XFS_BUF_SET_OFFSET(bp, off) \
- ((bp)->pb_file_offset = (off))
-#define XFS_BUF_COUNT(bp) ((bp)->pb_count_desired)
-#define XFS_BUF_SET_COUNT(bp, cnt) \
- ((bp)->pb_count_desired = (cnt))
-#define XFS_BUF_SIZE(bp) ((bp)->pb_buffer_length)
-#define XFS_BUF_SET_SIZE(bp, cnt) \
- ((bp)->pb_buffer_length = (cnt))
-#define XFS_BUF_SET_VTYPE_REF(bp, type, ref)
-#define XFS_BUF_SET_VTYPE(bp, type)
-#define XFS_BUF_SET_REF(bp, ref)
-
-#define XFS_BUF_ISPINNED(bp) pagebuf_ispin(bp)
-
-#define XFS_BUF_VALUSEMA(bp) pagebuf_lock_value(bp)
-#define XFS_BUF_CPSEMA(bp) (pagebuf_cond_lock(bp) == 0)
-#define XFS_BUF_VSEMA(bp) pagebuf_unlock(bp)
-#define XFS_BUF_PSEMA(bp,x) pagebuf_lock(bp)
-#define XFS_BUF_V_IODONESEMA(bp) up(&bp->pb_iodonesema);
-
-/* setup the buffer target from a buftarg structure */
-#define XFS_BUF_SET_TARGET(bp, target) \
- (bp)->pb_target = (target)
-#define XFS_BUF_TARGET(bp) ((bp)->pb_target)
-#define XFS_BUFTARG_NAME(target) \
- pagebuf_target_name(target)
-
-#define XFS_BUF_SET_VTYPE_REF(bp, type, ref)
-#define XFS_BUF_SET_VTYPE(bp, type)
-#define XFS_BUF_SET_REF(bp, ref)
-
-#define xfs_buf_read(target, blkno, len, flags) \
- pagebuf_get((target), (blkno), (len), \
- PBF_LOCK | PBF_READ | PBF_MAPPED)
-#define xfs_buf_get(target, blkno, len, flags) \
- pagebuf_get((target), (blkno), (len), \
- PBF_LOCK | PBF_MAPPED)
-
-#define xfs_buf_read_flags(target, blkno, len, flags) \
- pagebuf_get((target), (blkno), (len), PBF_READ | (flags))
-#define xfs_buf_get_flags(target, blkno, len, flags) \
- pagebuf_get((target), (blkno), (len), (flags))
-
-static inline int xfs_bawrite(void *mp, xfs_buf_t *bp)
-{
- bp->pb_fspriv3 = mp;
- bp->pb_strat = xfs_bdstrat_cb;
- xfs_buf_undelay(bp);
- return pagebuf_iostart(bp, PBF_WRITE | PBF_ASYNC | _PBF_RUN_QUEUES);
-}
-
-static inline void xfs_buf_relse(xfs_buf_t *bp)
-{
- if (!bp->pb_relse)
- pagebuf_unlock(bp);
- pagebuf_rele(bp);
-}
-
-#define xfs_bpin(bp) pagebuf_pin(bp)
-#define xfs_bunpin(bp) pagebuf_unpin(bp)
-
-#define xfs_buftrace(id, bp) \
- pagebuf_trace(bp, id, NULL, (void *)__builtin_return_address(0))
-
-#define xfs_biodone(pb) \
- pagebuf_iodone(pb, (pb->pb_flags & PBF_FS_DATAIOD), 0)
-
-#define xfs_incore(buftarg,blkno,len,lockit) \
- pagebuf_find(buftarg, blkno ,len, lockit)
-
-
-#define xfs_biomove(pb, off, len, data, rw) \
- pagebuf_iomove((pb), (off), (len), (data), \
- ((rw) == XFS_B_WRITE) ? PBRW_WRITE : PBRW_READ)
-
-#define xfs_biozero(pb, off, len) \
- pagebuf_iomove((pb), (off), (len), NULL, PBRW_ZERO)
-
-
-static inline int XFS_bwrite(xfs_buf_t *pb)
-{
- int iowait = (pb->pb_flags & PBF_ASYNC) == 0;
- int error = 0;
-
- if (!iowait)
- pb->pb_flags |= _PBF_RUN_QUEUES;
-
- xfs_buf_undelay(pb);
- pagebuf_iostrategy(pb);
- if (iowait) {
- error = pagebuf_iowait(pb);
- xfs_buf_relse(pb);
- }
- return error;
-}
-
-#define XFS_bdwrite(pb) \
- pagebuf_iostart(pb, PBF_DELWRI | PBF_ASYNC)
-
-static inline int xfs_bdwrite(void *mp, xfs_buf_t *bp)
-{
- bp->pb_strat = xfs_bdstrat_cb;
- bp->pb_fspriv3 = mp;
-
- return pagebuf_iostart(bp, PBF_DELWRI | PBF_ASYNC);
-}
-
-#define XFS_bdstrat(bp) pagebuf_iorequest(bp)
-
-#define xfs_iowait(pb) pagebuf_iowait(pb)
-
-#define xfs_baread(target, rablkno, ralen) \
- pagebuf_readahead((target), (rablkno), (ralen), PBF_DONT_BLOCK)
-
-#define xfs_buf_get_empty(len, target) pagebuf_get_empty((len), (target))
-#define xfs_buf_get_noaddr(len, target) pagebuf_get_no_daddr((len), (target))
-#define xfs_buf_free(bp) pagebuf_free(bp)
-
-
-/*
- * Handling of buftargs.
- */
-
-extern xfs_buftarg_t *xfs_alloc_buftarg(struct block_device *);
-extern void xfs_free_buftarg(xfs_buftarg_t *, int);
-extern void xfs_setsize_buftarg(xfs_buftarg_t *, unsigned int, unsigned int);
-extern void xfs_incore_relse(xfs_buftarg_t *, int, int);
-extern int xfs_flush_buftarg(xfs_buftarg_t *, int);
-
-#define xfs_getsize_buftarg(buftarg) \
- block_size((buftarg)->pbr_bdev)
-#define xfs_readonly_buftarg(buftarg) \
- bdev_read_only((buftarg)->pbr_bdev)
-#define xfs_binval(buftarg) \
- xfs_flush_buftarg(buftarg, 1)
-#define XFS_bflush(buftarg) \
- xfs_flush_buftarg(buftarg, 1)
-
-#endif /* __XFS_BUF_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_CRED_H__
-#define __XFS_CRED_H__
-
-/*
- * Credentials
- */
-typedef struct cred {
- /* EMPTY */
-} cred_t;
-
-extern struct cred *sys_cred;
-
-/* this is a hack.. (assums sys_cred is the only cred_t in the system) */
-static __inline int capable_cred(cred_t *cr, int cid)
-{
- return (cr == sys_cred) ? 1 : capable(cid);
-}
-
-#endif /* __XFS_CRED_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-#include "xfs_inum.h"
-#include "xfs_log.h"
-#include "xfs_sb.h"
-#include "xfs_dir.h"
-#include "xfs_dir2.h"
-#include "xfs_trans.h"
-#include "xfs_dmapi.h"
-#include "xfs_mount.h"
-#include "xfs_bmap_btree.h"
-#include "xfs_alloc_btree.h"
-#include "xfs_ialloc_btree.h"
-#include "xfs_alloc.h"
-#include "xfs_btree.h"
-#include "xfs_attr_sf.h"
-#include "xfs_dir_sf.h"
-#include "xfs_dir2_sf.h"
-#include "xfs_dinode.h"
-#include "xfs_inode.h"
-#include "xfs_error.h"
-#include "xfs_rw.h"
-
-#include <linux/dcache.h>
-
-static struct vm_operations_struct linvfs_file_vm_ops;
-
-
-STATIC inline ssize_t
-__linvfs_read(
- struct kiocb *iocb,
- char __user *buf,
- int ioflags,
- size_t count,
- loff_t pos)
-{
- struct iovec iov = {buf, count};
- struct file *file = iocb->ki_filp;
- vnode_t *vp = LINVFS_GET_VP(file->f_dentry->d_inode);
- ssize_t rval;
-
- BUG_ON(iocb->ki_pos != pos);
-
- if (unlikely(file->f_flags & O_DIRECT))
- ioflags |= IO_ISDIRECT;
- VOP_READ(vp, iocb, &iov, 1, &iocb->ki_pos, ioflags, NULL, rval);
- return rval;
-}
-
-
-STATIC ssize_t
-linvfs_read(
- struct kiocb *iocb,
- char __user *buf,
- size_t count,
- loff_t pos)
-{
- return __linvfs_read(iocb, buf, 0, count, pos);
-}
-
-STATIC ssize_t
-linvfs_read_invis(
- struct kiocb *iocb,
- char __user *buf,
- size_t count,
- loff_t pos)
-{
- return __linvfs_read(iocb, buf, IO_INVIS, count, pos);
-}
-
-
-STATIC inline ssize_t
-__linvfs_write(
- struct kiocb *iocb,
- const char *buf,
- int ioflags,
- size_t count,
- loff_t pos)
-{
- struct iovec iov = {(void *)buf, count};
- struct file *file = iocb->ki_filp;
- struct inode *inode = file->f_mapping->host;
- vnode_t *vp = LINVFS_GET_VP(inode);
- ssize_t rval;
-
- BUG_ON(iocb->ki_pos != pos);
- if (unlikely(file->f_flags & O_DIRECT)) {
- ioflags |= IO_ISDIRECT;
- VOP_WRITE(vp, iocb, &iov, 1, &iocb->ki_pos,
- ioflags, NULL, rval);
- } else {
- down(&inode->i_sem);
- VOP_WRITE(vp, iocb, &iov, 1, &iocb->ki_pos,
- ioflags, NULL, rval);
- up(&inode->i_sem);
- }
-
- return rval;
-}
-
-
-STATIC ssize_t
-linvfs_write(
- struct kiocb *iocb,
- const char __user *buf,
- size_t count,
- loff_t pos)
-{
- return __linvfs_write(iocb, buf, 0, count, pos);
-}
-
-STATIC ssize_t
-linvfs_write_invis(
- struct kiocb *iocb,
- const char __user *buf,
- size_t count,
- loff_t pos)
-{
- return __linvfs_write(iocb, buf, IO_INVIS, count, pos);
-}
-
-
-STATIC inline ssize_t
-__linvfs_readv(
- struct file *file,
- const struct iovec *iov,
- int ioflags,
- unsigned long nr_segs,
- loff_t *ppos)
-{
- struct inode *inode = file->f_mapping->host;
- vnode_t *vp = LINVFS_GET_VP(inode);
- struct kiocb kiocb;
- ssize_t rval;
-
- init_sync_kiocb(&kiocb, file);
- kiocb.ki_pos = *ppos;
-
- if (unlikely(file->f_flags & O_DIRECT))
- ioflags |= IO_ISDIRECT;
- VOP_READ(vp, &kiocb, iov, nr_segs, &kiocb.ki_pos, ioflags, NULL, rval);
- if (rval == -EIOCBQUEUED)
- rval = wait_on_sync_kiocb(&kiocb);
-
- *ppos = kiocb.ki_pos;
- return rval;
-}
-
-STATIC ssize_t
-linvfs_readv(
- struct file *file,
- const struct iovec *iov,
- unsigned long nr_segs,
- loff_t *ppos)
-{
- return __linvfs_readv(file, iov, 0, nr_segs, ppos);
-}
-
-STATIC ssize_t
-linvfs_readv_invis(
- struct file *file,
- const struct iovec *iov,
- unsigned long nr_segs,
- loff_t *ppos)
-{
- return __linvfs_readv(file, iov, IO_INVIS, nr_segs, ppos);
-}
-
-
-STATIC inline ssize_t
-__linvfs_writev(
- struct file *file,
- const struct iovec *iov,
- int ioflags,
- unsigned long nr_segs,
- loff_t *ppos)
-{
- struct inode *inode = file->f_mapping->host;
- vnode_t *vp = LINVFS_GET_VP(inode);
- struct kiocb kiocb;
- ssize_t rval;
-
- init_sync_kiocb(&kiocb, file);
- kiocb.ki_pos = *ppos;
- if (unlikely(file->f_flags & O_DIRECT)) {
- ioflags |= IO_ISDIRECT;
- VOP_WRITE(vp, &kiocb, iov, nr_segs, &kiocb.ki_pos,
- ioflags, NULL, rval);
- } else {
- down(&inode->i_sem);
- VOP_WRITE(vp, &kiocb, iov, nr_segs, &kiocb.ki_pos,
- ioflags, NULL, rval);
- up(&inode->i_sem);
- }
-
- if (rval == -EIOCBQUEUED)
- rval = wait_on_sync_kiocb(&kiocb);
-
- *ppos = kiocb.ki_pos;
- return rval;
-}
-
-
-STATIC ssize_t
-linvfs_writev(
- struct file *file,
- const struct iovec *iov,
- unsigned long nr_segs,
- loff_t *ppos)
-{
- return __linvfs_writev(file, iov, 0, nr_segs, ppos);
-}
-
-STATIC ssize_t
-linvfs_writev_invis(
- struct file *file,
- const struct iovec *iov,
- unsigned long nr_segs,
- loff_t *ppos)
-{
- return __linvfs_writev(file, iov, IO_INVIS, nr_segs, ppos);
-}
-
-STATIC ssize_t
-linvfs_sendfile(
- struct file *filp,
- loff_t *ppos,
- size_t count,
- read_actor_t actor,
- void *target)
-{
- vnode_t *vp = LINVFS_GET_VP(filp->f_dentry->d_inode);
- int error;
-
- VOP_SENDFILE(vp, filp, ppos, 0, count, actor, target, NULL, error);
- return error;
-}
-
-
-STATIC int
-linvfs_open(
- struct inode *inode,
- struct file *filp)
-{
- vnode_t *vp = LINVFS_GET_VP(inode);
- int error;
-
- if (!(filp->f_flags & O_LARGEFILE) && i_size_read(inode) > MAX_NON_LFS)
- return -EFBIG;
-
- ASSERT(vp);
- VOP_OPEN(vp, NULL, error);
- return -error;
-}
-
-
-STATIC int
-linvfs_release(
- struct inode *inode,
- struct file *filp)
-{
- vnode_t *vp = LINVFS_GET_VP(inode);
- int error = 0;
-
- if (vp)
- VOP_RELEASE(vp, error);
- return -error;
-}
-
-
-STATIC int
-linvfs_fsync(
- struct file *filp,
- struct dentry *dentry,
- int datasync)
-{
- struct inode *inode = dentry->d_inode;
- vnode_t *vp = LINVFS_GET_VP(inode);
- int error;
- int flags = FSYNC_WAIT;
-
- if (datasync)
- flags |= FSYNC_DATA;
-
- ASSERT(vp);
- VOP_FSYNC(vp, flags, NULL, (xfs_off_t)0, (xfs_off_t)-1, error);
- return -error;
-}
-
-/*
- * linvfs_readdir maps to VOP_READDIR().
- * We need to build a uio, cred, ...
- */
-
-#define nextdp(dp) ((struct xfs_dirent *)((char *)(dp) + (dp)->d_reclen))
-
-STATIC int
-linvfs_readdir(
- struct file *filp,
- void *dirent,
- filldir_t filldir)
-{
- int error = 0;
- vnode_t *vp;
- uio_t uio;
- iovec_t iov;
- int eof = 0;
- caddr_t read_buf;
- int namelen, size = 0;
- size_t rlen = PAGE_CACHE_SIZE;
- xfs_off_t start_offset, curr_offset;
- xfs_dirent_t *dbp = NULL;
-
- vp = LINVFS_GET_VP(filp->f_dentry->d_inode);
- ASSERT(vp);
-
- /* Try fairly hard to get memory */
- do {
- if ((read_buf = (caddr_t)kmalloc(rlen, GFP_KERNEL)))
- break;
- rlen >>= 1;
- } while (rlen >= 1024);
-
- if (read_buf == NULL)
- return -ENOMEM;
-
- uio.uio_iov = &iov;
- uio.uio_segflg = UIO_SYSSPACE;
- curr_offset = filp->f_pos;
- if (filp->f_pos != 0x7fffffff)
- uio.uio_offset = filp->f_pos;
- else
- uio.uio_offset = 0xffffffff;
-
- while (!eof) {
- uio.uio_resid = iov.iov_len = rlen;
- iov.iov_base = read_buf;
- uio.uio_iovcnt = 1;
-
- start_offset = uio.uio_offset;
-
- VOP_READDIR(vp, &uio, NULL, &eof, error);
- if ((uio.uio_offset == start_offset) || error) {
- size = 0;
- break;
- }
-
- size = rlen - uio.uio_resid;
- dbp = (xfs_dirent_t *)read_buf;
- while (size > 0) {
- namelen = strlen(dbp->d_name);
-
- if (filldir(dirent, dbp->d_name, namelen,
- (loff_t) curr_offset & 0x7fffffff,
- (ino_t) dbp->d_ino,
- DT_UNKNOWN)) {
- goto done;
- }
- size -= dbp->d_reclen;
- curr_offset = (loff_t)dbp->d_off /* & 0x7fffffff */;
- dbp = nextdp(dbp);
- }
- }
-done:
- if (!error) {
- if (size == 0)
- filp->f_pos = uio.uio_offset & 0x7fffffff;
- else if (dbp)
- filp->f_pos = curr_offset;
- }
-
- kfree(read_buf);
- return -error;
-}
-
-
-STATIC int
-linvfs_file_mmap(
- struct file *filp,
- struct vm_area_struct *vma)
-{
- struct inode *ip = filp->f_dentry->d_inode;
- vnode_t *vp = LINVFS_GET_VP(ip);
- vattr_t va = { .va_mask = XFS_AT_UPDATIME };
- int error;
-
- if ((vp->v_type == VREG) && (vp->v_vfsp->vfs_flag & VFS_DMI)) {
- xfs_mount_t *mp = XFS_VFSTOM(vp->v_vfsp);
-
- error = -XFS_SEND_MMAP(mp, vma, 0);
- if (error)
- return error;
- }
-
- vma->vm_ops = &linvfs_file_vm_ops;
-
- VOP_SETATTR(vp, &va, XFS_AT_UPDATIME, NULL, error);
- return 0;
-}
-
-
-STATIC int
-linvfs_ioctl(
- struct inode *inode,
- struct file *filp,
- unsigned int cmd,
- unsigned long arg)
-{
- int error;
- vnode_t *vp = LINVFS_GET_VP(inode);
-
- ASSERT(vp);
- VOP_IOCTL(vp, inode, filp, 0, cmd, arg, error);
- VMODIFY(vp);
-
- /* NOTE: some of the ioctl's return positive #'s as a
- * byte count indicating success, such as
- * readlink_by_handle. So we don't "sign flip"
- * like most other routines. This means true
- * errors need to be returned as a negative value.
- */
- return error;
-}
-
-STATIC int
-linvfs_ioctl_invis(
- struct inode *inode,
- struct file *filp,
- unsigned int cmd,
- unsigned long arg)
-{
- int error;
- vnode_t *vp = LINVFS_GET_VP(inode);
-
- ASSERT(vp);
- VOP_IOCTL(vp, inode, filp, IO_INVIS, cmd, arg, error);
- VMODIFY(vp);
-
- /* NOTE: some of the ioctl's return positive #'s as a
- * byte count indicating success, such as
- * readlink_by_handle. So we don't "sign flip"
- * like most other routines. This means true
- * errors need to be returned as a negative value.
- */
- return error;
-}
-
-#ifdef HAVE_VMOP_MPROTECT
-STATIC int
-linvfs_mprotect(
- struct vm_area_struct *vma,
- unsigned int newflags)
-{
- vnode_t *vp = LINVFS_GET_VP(vma->vm_file->f_dentry->d_inode);
- int error = 0;
-
- if ((vp->v_type == VREG) && (vp->v_vfsp->vfs_flag & VFS_DMI)) {
- if ((vma->vm_flags & VM_MAYSHARE) &&
- (newflags & VM_WRITE) && !(vma->vm_flags & VM_WRITE)) {
- xfs_mount_t *mp = XFS_VFSTOM(vp->v_vfsp);
-
- error = XFS_SEND_MMAP(mp, vma, VM_WRITE);
- }
- }
- return error;
-}
-#endif /* HAVE_VMOP_MPROTECT */
-
-
-struct file_operations linvfs_file_operations = {
- .llseek = generic_file_llseek,
- .read = do_sync_read,
- .write = do_sync_write,
- .readv = linvfs_readv,
- .writev = linvfs_writev,
- .aio_read = linvfs_read,
- .aio_write = linvfs_write,
- .sendfile = linvfs_sendfile,
- .ioctl = linvfs_ioctl,
- .mmap = linvfs_file_mmap,
- .open = linvfs_open,
- .release = linvfs_release,
- .fsync = linvfs_fsync,
-};
-
-struct file_operations linvfs_invis_file_operations = {
- .llseek = generic_file_llseek,
- .read = do_sync_read,
- .write = do_sync_write,
- .readv = linvfs_readv_invis,
- .writev = linvfs_writev_invis,
- .aio_read = linvfs_read_invis,
- .aio_write = linvfs_write_invis,
- .sendfile = linvfs_sendfile,
- .ioctl = linvfs_ioctl_invis,
- .mmap = linvfs_file_mmap,
- .open = linvfs_open,
- .release = linvfs_release,
- .fsync = linvfs_fsync,
-};
-
-
-struct file_operations linvfs_dir_operations = {
- .read = generic_read_dir,
- .readdir = linvfs_readdir,
- .ioctl = linvfs_ioctl,
- .fsync = linvfs_fsync,
-};
-
-static struct vm_operations_struct linvfs_file_vm_ops = {
- .nopage = filemap_nopage,
-#ifdef HAVE_VMOP_MPROTECT
- .mprotect = linvfs_mprotect,
-#endif
-};
+++ /dev/null
-/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-
-/*
- * Stub for no-op vnode operations that return error status.
- */
-int
-fs_noerr()
-{
- return 0;
-}
-
-/*
- * Operation unsupported under this file system.
- */
-int
-fs_nosys()
-{
- return ENOSYS;
-}
-
-/*
- * Stub for inactive, strategy, and read/write lock/unlock. Does nothing.
- */
-/* ARGSUSED */
-void
-fs_noval()
-{
-}
-
-/*
- * vnode pcache layer for vnode_tosspages.
- * 'last' parameter unused but left in for IRIX compatibility
- */
-void
-fs_tosspages(
- bhv_desc_t *bdp,
- xfs_off_t first,
- xfs_off_t last,
- int fiopt)
-{
- vnode_t *vp = BHV_TO_VNODE(bdp);
- struct inode *ip = LINVFS_GET_IP(vp);
-
- if (VN_CACHED(vp))
- truncate_inode_pages(ip->i_mapping, first);
-}
-
-
-/*
- * vnode pcache layer for vnode_flushinval_pages.
- * 'last' parameter unused but left in for IRIX compatibility
- */
-void
-fs_flushinval_pages(
- bhv_desc_t *bdp,
- xfs_off_t first,
- xfs_off_t last,
- int fiopt)
-{
- vnode_t *vp = BHV_TO_VNODE(bdp);
- struct inode *ip = LINVFS_GET_IP(vp);
-
- if (VN_CACHED(vp)) {
- filemap_fdatawrite(ip->i_mapping);
- filemap_fdatawait(ip->i_mapping);
-
- truncate_inode_pages(ip->i_mapping, first);
- }
-}
-
-/*
- * vnode pcache layer for vnode_flush_pages.
- * 'last' parameter unused but left in for IRIX compatibility
- */
-int
-fs_flush_pages(
- bhv_desc_t *bdp,
- xfs_off_t first,
- xfs_off_t last,
- uint64_t flags,
- int fiopt)
-{
- vnode_t *vp = BHV_TO_VNODE(bdp);
- struct inode *ip = LINVFS_GET_IP(vp);
-
- if (VN_CACHED(vp)) {
- filemap_fdatawrite(ip->i_mapping);
- filemap_fdatawait(ip->i_mapping);
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * Copyright (c) 2000, 2002 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_SUBR_H__
-#define __XFS_SUBR_H__
-
-/*
- * Utilities shared among file system implementations.
- */
-
-struct cred;
-
-extern int fs_noerr(void);
-extern int fs_nosys(void);
-extern int fs_nodev(void);
-extern void fs_noval(void);
-extern void fs_tosspages(bhv_desc_t *, xfs_off_t, xfs_off_t, int);
-extern void fs_flushinval_pages(bhv_desc_t *, xfs_off_t, xfs_off_t, int);
-extern int fs_flush_pages(bhv_desc_t *, xfs_off_t, xfs_off_t, uint64_t, int);
-
-#endif /* __XFS_FS_SUBR_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-/*
- * This file contains globals needed by XFS that were normally defined
- * somewhere else in IRIX.
- */
-
-#include "xfs.h"
-#include "xfs_cred.h"
-#include "xfs_sysctl.h"
-
-/*
- * System memory size - used to scale certain data structures in XFS.
- */
-unsigned long xfs_physmem;
-
-/*
- * Tunable XFS parameters. xfs_params is required even when CONFIG_SYSCTL=n,
- * other XFS code uses these values.
- */
-
-xfs_param_t xfs_params = {
- /* MIN DFLT MAX */
- .restrict_chown = { 0, 1, 1 },
- .sgid_inherit = { 0, 0, 1 },
- .symlink_mode = { 0, 0, 1 },
- .panic_mask = { 0, 0, 127 },
- .error_level = { 0, 3, 11 },
- .sync_interval = { USER_HZ, 30*USER_HZ, 7200*USER_HZ },
- .stats_clear = { 0, 0, 1 },
- .inherit_sync = { 0, 1, 1 },
- .inherit_nodump = { 0, 1, 1 },
- .inherit_noatim = { 0, 1, 1 },
- .flush_interval = { USER_HZ/2, USER_HZ, 30*USER_HZ },
- .age_buffer = { 1*USER_HZ, 15*USER_HZ, 7200*USER_HZ },
-};
-
-/*
- * Global system credential structure.
- */
-cred_t sys_cred_val, *sys_cred = &sys_cred_val;
-
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_GLOBALS_H__
-#define __XFS_GLOBALS_H__
-
-/*
- * This file declares globals needed by XFS that were normally defined
- * somewhere else in IRIX.
- */
-
-extern uint64_t xfs_panic_mask; /* set to cause more panics */
-extern unsigned long xfs_physmem;
-extern struct cred *sys_cred;
-
-#endif /* __XFS_GLOBALS_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-
-#include "xfs_fs.h"
-#include "xfs_inum.h"
-#include "xfs_log.h"
-#include "xfs_trans.h"
-#include "xfs_sb.h"
-#include "xfs_dir.h"
-#include "xfs_dir2.h"
-#include "xfs_alloc.h"
-#include "xfs_dmapi.h"
-#include "xfs_mount.h"
-#include "xfs_alloc_btree.h"
-#include "xfs_bmap_btree.h"
-#include "xfs_ialloc_btree.h"
-#include "xfs_btree.h"
-#include "xfs_ialloc.h"
-#include "xfs_attr_sf.h"
-#include "xfs_dir_sf.h"
-#include "xfs_dir2_sf.h"
-#include "xfs_dinode.h"
-#include "xfs_inode.h"
-#include "xfs_bmap.h"
-#include "xfs_bit.h"
-#include "xfs_rtalloc.h"
-#include "xfs_error.h"
-#include "xfs_itable.h"
-#include "xfs_rw.h"
-#include "xfs_acl.h"
-#include "xfs_cap.h"
-#include "xfs_mac.h"
-#include "xfs_attr.h"
-#include "xfs_buf_item.h"
-#include "xfs_utils.h"
-#include "xfs_dfrag.h"
-#include "xfs_fsops.h"
-
-#include <linux/dcache.h>
-#include <linux/mount.h>
-#include <linux/namei.h>
-#include <linux/pagemap.h>
-
-/*
- * ioctl commands that are used by Linux filesystems
- */
-#define XFS_IOC_GETXFLAGS _IOR('f', 1, long)
-#define XFS_IOC_SETXFLAGS _IOW('f', 2, long)
-#define XFS_IOC_GETVERSION _IOR('v', 1, long)
-
-
-/*
- * xfs_find_handle maps from userspace xfs_fsop_handlereq structure to
- * a file or fs handle.
- *
- * XFS_IOC_PATH_TO_FSHANDLE
- * returns fs handle for a mount point or path within that mount point
- * XFS_IOC_FD_TO_HANDLE
- * returns full handle for a FD opened in user space
- * XFS_IOC_PATH_TO_HANDLE
- * returns full handle for a path
- */
-STATIC int
-xfs_find_handle(
- unsigned int cmd,
- unsigned long arg)
-{
- int hsize;
- xfs_handle_t handle;
- xfs_fsop_handlereq_t hreq;
- struct inode *inode;
- struct vnode *vp;
-
- if (copy_from_user(&hreq, (xfs_fsop_handlereq_t *)arg, sizeof(hreq)))
- return -XFS_ERROR(EFAULT);
-
- memset((char *)&handle, 0, sizeof(handle));
-
- switch (cmd) {
- case XFS_IOC_PATH_TO_FSHANDLE:
- case XFS_IOC_PATH_TO_HANDLE: {
- struct nameidata nd;
- int error;
-
- error = user_path_walk_link(hreq.path, &nd);
- if (error)
- return error;
-
- ASSERT(nd.dentry);
- ASSERT(nd.dentry->d_inode);
- inode = igrab(nd.dentry->d_inode);
- path_release(&nd);
- break;
- }
-
- case XFS_IOC_FD_TO_HANDLE: {
- struct file *file;
-
- file = fget(hreq.fd);
- if (!file)
- return -EBADF;
-
- ASSERT(file->f_dentry);
- ASSERT(file->f_dentry->d_inode);
- inode = igrab(file->f_dentry->d_inode);
- fput(file);
- break;
- }
-
- default:
- ASSERT(0);
- return -XFS_ERROR(EINVAL);
- }
-
- if (inode->i_sb->s_magic != XFS_SB_MAGIC) {
- /* we're not in XFS anymore, Toto */
- iput(inode);
- return -XFS_ERROR(EINVAL);
- }
-
- /* we need the vnode */
- vp = LINVFS_GET_VP(inode);
- if (vp->v_type != VREG && vp->v_type != VDIR && vp->v_type != VLNK) {
- iput(inode);
- return -XFS_ERROR(EBADF);
- }
-
- /* now we can grab the fsid */
- memcpy(&handle.ha_fsid, vp->v_vfsp->vfs_altfsid, sizeof(xfs_fsid_t));
- hsize = sizeof(xfs_fsid_t);
-
- if (cmd != XFS_IOC_PATH_TO_FSHANDLE) {
- xfs_inode_t *ip;
- bhv_desc_t *bhv;
- int lock_mode;
-
- /* need to get access to the xfs_inode to read the generation */
- bhv = vn_bhv_lookup_unlocked(VN_BHV_HEAD(vp), &xfs_vnodeops);
- ASSERT(bhv);
- ip = XFS_BHVTOI(bhv);
- ASSERT(ip);
- lock_mode = xfs_ilock_map_shared(ip);
-
- /* fill in fid section of handle from inode */
- handle.ha_fid.xfs_fid_len = sizeof(xfs_fid_t) -
- sizeof(handle.ha_fid.xfs_fid_len);
- handle.ha_fid.xfs_fid_pad = 0;
- handle.ha_fid.xfs_fid_gen = ip->i_d.di_gen;
- handle.ha_fid.xfs_fid_ino = ip->i_ino;
-
- xfs_iunlock_map_shared(ip, lock_mode);
-
- hsize = XFS_HSIZE(handle);
- }
-
- /* now copy our handle into the user buffer & write out the size */
- if (copy_to_user((xfs_handle_t *)hreq.ohandle, &handle, hsize) ||
- copy_to_user(hreq.ohandlen, &hsize, sizeof(__s32))) {
- iput(inode);
- return -XFS_ERROR(EFAULT);
- }
-
- iput(inode);
- return 0;
-}
-
-
-/*
- * Convert userspace handle data into vnode (and inode).
- * We [ab]use the fact that all the fsop_handlereq ioctl calls
- * have a data structure argument whose first component is always
- * a xfs_fsop_handlereq_t, so we can cast to and from this type.
- * This allows us to optimise the copy_from_user calls and gives
- * a handy, shared routine.
- *
- * If no error, caller must always VN_RELE the returned vp.
- */
-STATIC int
-xfs_vget_fsop_handlereq(
- xfs_mount_t *mp,
- struct inode *parinode, /* parent inode pointer */
- int cap, /* capability level for op */
- unsigned long arg, /* userspace data pointer */
- unsigned long size, /* size of expected struct */
- /* output arguments */
- xfs_fsop_handlereq_t *hreq,
- vnode_t **vp,
- struct inode **inode)
-{
- void *hanp;
- size_t hlen;
- xfs_fid_t *xfid;
- xfs_handle_t *handlep;
- xfs_handle_t handle;
- xfs_inode_t *ip;
- struct inode *inodep;
- vnode_t *vpp;
- xfs_ino_t ino;
- __u32 igen;
- int error;
-
- if (!capable(cap))
- return XFS_ERROR(EPERM);
-
- /*
- * Only allow handle opens under a directory.
- */
- if (!S_ISDIR(parinode->i_mode))
- return XFS_ERROR(ENOTDIR);
-
- /*
- * Copy the handle down from the user and validate
- * that it looks to be in the correct format.
- */
- if (copy_from_user(hreq, (struct xfs_fsop_handlereq *)arg, size))
- return XFS_ERROR(EFAULT);
-
- hanp = hreq->ihandle;
- hlen = hreq->ihandlen;
- handlep = &handle;
-
- if (hlen < sizeof(handlep->ha_fsid) || hlen > sizeof(*handlep))
- return XFS_ERROR(EINVAL);
- if (copy_from_user(handlep, hanp, hlen))
- return XFS_ERROR(EFAULT);
- if (hlen < sizeof(*handlep))
- memset(((char *)handlep) + hlen, 0, sizeof(*handlep) - hlen);
- if (hlen > sizeof(handlep->ha_fsid)) {
- if (handlep->ha_fid.xfs_fid_len !=
- (hlen - sizeof(handlep->ha_fsid)
- - sizeof(handlep->ha_fid.xfs_fid_len))
- || handlep->ha_fid.xfs_fid_pad)
- return XFS_ERROR(EINVAL);
- }
-
- /*
- * Crack the handle, obtain the inode # & generation #
- */
- xfid = (struct xfs_fid *)&handlep->ha_fid;
- if (xfid->xfs_fid_len == sizeof(*xfid) - sizeof(xfid->xfs_fid_len)) {
- ino = xfid->xfs_fid_ino;
- igen = xfid->xfs_fid_gen;
- } else {
- return XFS_ERROR(EINVAL);
- }
-
- /*
- * Get the XFS inode, building a vnode to go with it.
- */
- error = xfs_iget(mp, NULL, ino, XFS_ILOCK_SHARED, &ip, 0);
- if (error)
- return error;
- if (ip == NULL)
- return XFS_ERROR(EIO);
- if (ip->i_d.di_mode == 0 || ip->i_d.di_gen != igen) {
- xfs_iput_new(ip, XFS_ILOCK_SHARED);
- return XFS_ERROR(ENOENT);
- }
-
- vpp = XFS_ITOV(ip);
- inodep = LINVFS_GET_IP(vpp);
- xfs_iunlock(ip, XFS_ILOCK_SHARED);
-
- *vp = vpp;
- *inode = inodep;
- return 0;
-}
-
-STATIC int
-xfs_open_by_handle(
- xfs_mount_t *mp,
- unsigned long arg,
- struct file *parfilp,
- struct inode *parinode)
-{
- int error;
- int new_fd;
- int permflag;
- struct file *filp;
- struct inode *inode;
- struct dentry *dentry;
- vnode_t *vp;
- xfs_fsop_handlereq_t hreq;
-
- error = xfs_vget_fsop_handlereq(mp, parinode, CAP_SYS_ADMIN, arg,
- sizeof(xfs_fsop_handlereq_t),
- &hreq, &vp, &inode);
- if (error)
- return -error;
-
- /* Restrict xfs_open_by_handle to directories & regular files. */
- if (!(S_ISREG(inode->i_mode) || S_ISDIR(inode->i_mode))) {
- iput(inode);
- return -XFS_ERROR(EINVAL);
- }
-
-#if BITS_PER_LONG != 32
- hreq.oflags |= O_LARGEFILE;
-#endif
- /* Put open permission in namei format. */
- permflag = hreq.oflags;
- if ((permflag+1) & O_ACCMODE)
- permflag++;
- if (permflag & O_TRUNC)
- permflag |= 2;
-
- if ((!(permflag & O_APPEND) || (permflag & O_TRUNC)) &&
- (permflag & FMODE_WRITE) && IS_APPEND(inode)) {
- iput(inode);
- return -XFS_ERROR(EPERM);
- }
-
- if ((permflag & FMODE_WRITE) && IS_IMMUTABLE(inode)) {
- iput(inode);
- return -XFS_ERROR(EACCES);
- }
-
- /* Can't write directories. */
- if ( S_ISDIR(inode->i_mode) && (permflag & FMODE_WRITE)) {
- iput(inode);
- return -XFS_ERROR(EISDIR);
- }
-
- if ((new_fd = get_unused_fd()) < 0) {
- iput(inode);
- return new_fd;
- }
-
- dentry = d_alloc_anon(inode);
- if (dentry == NULL) {
- iput(inode);
- put_unused_fd(new_fd);
- return -XFS_ERROR(ENOMEM);
- }
-
- /* Ensure umount returns EBUSY on umounts while this file is open. */
- mntget(parfilp->f_vfsmnt);
-
- /* Create file pointer. */
- filp = dentry_open(dentry, parfilp->f_vfsmnt, hreq.oflags);
- if (IS_ERR(filp)) {
- put_unused_fd(new_fd);
- return -XFS_ERROR(-PTR_ERR(filp));
- }
- if (inode->i_mode & S_IFREG)
- filp->f_op = &linvfs_invis_file_operations;
-
- fd_install(new_fd, filp);
- return new_fd;
-}
-
-STATIC int
-xfs_readlink_by_handle(
- xfs_mount_t *mp,
- unsigned long arg,
- struct file *parfilp,
- struct inode *parinode)
-{
- int error;
- struct iovec aiov;
- struct uio auio;
- struct inode *inode;
- xfs_fsop_handlereq_t hreq;
- vnode_t *vp;
- __u32 olen;
-
- error = xfs_vget_fsop_handlereq(mp, parinode, CAP_SYS_ADMIN, arg,
- sizeof(xfs_fsop_handlereq_t),
- &hreq, &vp, &inode);
- if (error)
- return -error;
-
- /* Restrict this handle operation to symlinks only. */
- if (vp->v_type != VLNK) {
- VN_RELE(vp);
- return -XFS_ERROR(EINVAL);
- }
-
- if (copy_from_user(&olen, hreq.ohandlen, sizeof(__u32))) {
- VN_RELE(vp);
- return -XFS_ERROR(EFAULT);
- }
- aiov.iov_len = olen;
- aiov.iov_base = hreq.ohandle;
-
- auio.uio_iov = &aiov;
- auio.uio_iovcnt = 1;
- auio.uio_offset = 0;
- auio.uio_segflg = UIO_USERSPACE;
- auio.uio_resid = olen;
-
- VOP_READLINK(vp, &auio, IO_INVIS, NULL, error);
-
- VN_RELE(vp);
- return (olen - auio.uio_resid);
-}
-
-STATIC int
-xfs_fssetdm_by_handle(
- xfs_mount_t *mp,
- unsigned long arg,
- struct file *parfilp,
- struct inode *parinode)
-{
- int error;
- struct fsdmidata fsd;
- xfs_fsop_setdm_handlereq_t dmhreq;
- struct inode *inode;
- bhv_desc_t *bdp;
- vnode_t *vp;
-
- error = xfs_vget_fsop_handlereq(mp, parinode, CAP_MKNOD, arg,
- sizeof(xfs_fsop_setdm_handlereq_t),
- (xfs_fsop_handlereq_t *)&dmhreq,
- &vp, &inode);
- if (error)
- return -error;
-
- if (IS_IMMUTABLE(inode) || IS_APPEND(inode)) {
- VN_RELE(vp);
- return -XFS_ERROR(EPERM);
- }
-
- if (copy_from_user(&fsd, dmhreq.data, sizeof(fsd))) {
- VN_RELE(vp);
- return -XFS_ERROR(EFAULT);
- }
-
- bdp = bhv_base_unlocked(VN_BHV_HEAD(vp));
- error = xfs_set_dmattrs(bdp, fsd.fsd_dmevmask, fsd.fsd_dmstate, NULL);
-
- VN_RELE(vp);
- if (error)
- return -error;
- return 0;
-}
-
-STATIC int
-xfs_attrlist_by_handle(
- xfs_mount_t *mp,
- unsigned long arg,
- struct file *parfilp,
- struct inode *parinode)
-{
- int error;
- attrlist_cursor_kern_t *cursor;
- xfs_fsop_attrlist_handlereq_t al_hreq;
- struct inode *inode;
- vnode_t *vp;
-
- error = xfs_vget_fsop_handlereq(mp, parinode, CAP_SYS_ADMIN, arg,
- sizeof(xfs_fsop_attrlist_handlereq_t),
- (xfs_fsop_handlereq_t *)&al_hreq,
- &vp, &inode);
- if (error)
- return -error;
-
- cursor = (attrlist_cursor_kern_t *)&al_hreq.pos;
- VOP_ATTR_LIST(vp, al_hreq.buffer, al_hreq.buflen, al_hreq.flags,
- cursor, NULL, error);
- VN_RELE(vp);
- if (error)
- return -error;
- return 0;
-}
-
-STATIC int
-xfs_attrmulti_by_handle(
- xfs_mount_t *mp,
- unsigned long arg,
- struct file *parfilp,
- struct inode *parinode)
-{
- int error;
- xfs_attr_multiop_t *ops;
- xfs_fsop_attrmulti_handlereq_t am_hreq;
- struct inode *inode;
- vnode_t *vp;
- int i, size;
-
- error = xfs_vget_fsop_handlereq(mp, parinode, CAP_SYS_ADMIN, arg,
- sizeof(xfs_fsop_attrmulti_handlereq_t),
- (xfs_fsop_handlereq_t *)&am_hreq,
- &vp, &inode);
- if (error)
- return -error;
-
- size = am_hreq.opcount * sizeof(attr_multiop_t);
- ops = (xfs_attr_multiop_t *)kmalloc(size, GFP_KERNEL);
- if (!ops) {
- VN_RELE(vp);
- return -XFS_ERROR(ENOMEM);
- }
-
- if (copy_from_user(ops, am_hreq.ops, size)) {
- kfree(ops);
- VN_RELE(vp);
- return -XFS_ERROR(EFAULT);
- }
-
- for (i = 0; i < am_hreq.opcount; i++) {
- switch(ops[i].am_opcode) {
- case ATTR_OP_GET:
- VOP_ATTR_GET(vp,ops[i].am_attrname, ops[i].am_attrvalue,
- &ops[i].am_length, ops[i].am_flags,
- NULL, ops[i].am_error);
- break;
- case ATTR_OP_SET:
- if (IS_IMMUTABLE(inode) || IS_APPEND(inode)) {
- ops[i].am_error = EPERM;
- break;
- }
- VOP_ATTR_SET(vp,ops[i].am_attrname, ops[i].am_attrvalue,
- ops[i].am_length, ops[i].am_flags,
- NULL, ops[i].am_error);
- break;
- case ATTR_OP_REMOVE:
- if (IS_IMMUTABLE(inode) || IS_APPEND(inode)) {
- ops[i].am_error = EPERM;
- break;
- }
- VOP_ATTR_REMOVE(vp, ops[i].am_attrname, ops[i].am_flags,
- NULL, ops[i].am_error);
- break;
- default:
- ops[i].am_error = EINVAL;
- }
- }
-
- if (copy_to_user(am_hreq.ops, ops, size))
- error = -XFS_ERROR(EFAULT);
-
- kfree(ops);
- VN_RELE(vp);
- return error;
-}
-
-/* prototypes for a few of the stack-hungry cases that have
- * their own functions. Functions are defined after their use
- * so gcc doesn't get fancy and inline them with -03 */
-
-STATIC int
-xfs_ioc_space(
- bhv_desc_t *bdp,
- vnode_t *vp,
- struct file *filp,
- int flags,
- unsigned int cmd,
- unsigned long arg);
-
-STATIC int
-xfs_ioc_bulkstat(
- xfs_mount_t *mp,
- unsigned int cmd,
- unsigned long arg);
-
-STATIC int
-xfs_ioc_fsgeometry_v1(
- xfs_mount_t *mp,
- unsigned long arg);
-
-STATIC int
-xfs_ioc_fsgeometry(
- xfs_mount_t *mp,
- unsigned long arg);
-
-STATIC int
-xfs_ioc_xattr(
- vnode_t *vp,
- xfs_inode_t *ip,
- struct file *filp,
- unsigned int cmd,
- unsigned long arg);
-
-STATIC int
-xfs_ioc_getbmap(
- bhv_desc_t *bdp,
- struct file *filp,
- int flags,
- unsigned int cmd,
- unsigned long arg);
-
-STATIC int
-xfs_ioc_getbmapx(
- bhv_desc_t *bdp,
- unsigned long arg);
-
-int
-xfs_ioctl(
- bhv_desc_t *bdp,
- struct inode *inode,
- struct file *filp,
- int ioflags,
- unsigned int cmd,
- unsigned long arg)
-{
- int error;
- vnode_t *vp;
- xfs_inode_t *ip;
- xfs_mount_t *mp;
-
- vp = LINVFS_GET_VP(inode);
-
- vn_trace_entry(vp, "xfs_ioctl", (inst_t *)__return_address);
-
- ip = XFS_BHVTOI(bdp);
- mp = ip->i_mount;
-
- switch (cmd) {
-
- case XFS_IOC_ALLOCSP:
- case XFS_IOC_FREESP:
- case XFS_IOC_RESVSP:
- case XFS_IOC_UNRESVSP:
- case XFS_IOC_ALLOCSP64:
- case XFS_IOC_FREESP64:
- case XFS_IOC_RESVSP64:
- case XFS_IOC_UNRESVSP64:
- /*
- * Only allow the sys admin to reserve space unless
- * unwritten extents are enabled.
- */
- if (!XFS_SB_VERSION_HASEXTFLGBIT(&mp->m_sb) &&
- !capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- return xfs_ioc_space(bdp, vp, filp, ioflags, cmd, arg);
-
- case XFS_IOC_DIOINFO: {
- struct dioattr da;
- xfs_buftarg_t *target =
- (ip->i_d.di_flags & XFS_DIFLAG_REALTIME) ?
- mp->m_rtdev_targp : mp->m_ddev_targp;
-
- da.d_mem = da.d_miniosz = 1 << target->pbr_sshift;
- /* The size dio will do in one go */
- da.d_maxiosz = 64 * PAGE_CACHE_SIZE;
-
- if (copy_to_user((struct dioattr *)arg, &da, sizeof(da)))
- return -XFS_ERROR(EFAULT);
- return 0;
- }
-
- case XFS_IOC_FSBULKSTAT_SINGLE:
- case XFS_IOC_FSBULKSTAT:
- case XFS_IOC_FSINUMBERS:
- return xfs_ioc_bulkstat(mp, cmd, arg);
-
- case XFS_IOC_FSGEOMETRY_V1:
- return xfs_ioc_fsgeometry_v1(mp, arg);
-
- case XFS_IOC_FSGEOMETRY:
- return xfs_ioc_fsgeometry(mp, arg);
-
- case XFS_IOC_GETVERSION:
- case XFS_IOC_GETXFLAGS:
- case XFS_IOC_SETXFLAGS:
- case XFS_IOC_FSGETXATTR:
- case XFS_IOC_FSSETXATTR:
- case XFS_IOC_FSGETXATTRA:
- return xfs_ioc_xattr(vp, ip, filp, cmd, arg);
-
- case XFS_IOC_FSSETDM: {
- struct fsdmidata dmi;
-
- if (copy_from_user(&dmi, (struct fsdmidata *)arg, sizeof(dmi)))
- return -XFS_ERROR(EFAULT);
-
- error = xfs_set_dmattrs(bdp, dmi.fsd_dmevmask, dmi.fsd_dmstate,
- NULL);
- return -error;
- }
-
- case XFS_IOC_GETBMAP:
- case XFS_IOC_GETBMAPA:
- return xfs_ioc_getbmap(bdp, filp, ioflags, cmd, arg);
-
- case XFS_IOC_GETBMAPX:
- return xfs_ioc_getbmapx(bdp, arg);
-
- case XFS_IOC_FD_TO_HANDLE:
- case XFS_IOC_PATH_TO_HANDLE:
- case XFS_IOC_PATH_TO_FSHANDLE:
- return xfs_find_handle(cmd, arg);
-
- case XFS_IOC_OPEN_BY_HANDLE:
- return xfs_open_by_handle(mp, arg, filp, inode);
-
- case XFS_IOC_FSSETDM_BY_HANDLE:
- return xfs_fssetdm_by_handle(mp, arg, filp, inode);
-
- case XFS_IOC_READLINK_BY_HANDLE:
- return xfs_readlink_by_handle(mp, arg, filp, inode);
-
- case XFS_IOC_ATTRLIST_BY_HANDLE:
- return xfs_attrlist_by_handle(mp, arg, filp, inode);
-
- case XFS_IOC_ATTRMULTI_BY_HANDLE:
- return xfs_attrmulti_by_handle(mp, arg, filp, inode);
-
- case XFS_IOC_SWAPEXT: {
- error = xfs_swapext((struct xfs_swapext *)arg);
- return -error;
- }
-
- case XFS_IOC_FSCOUNTS: {
- xfs_fsop_counts_t out;
-
- error = xfs_fs_counts(mp, &out);
- if (error)
- return -error;
-
- if (copy_to_user((char *)arg, &out, sizeof(out)))
- return -XFS_ERROR(EFAULT);
- return 0;
- }
-
- case XFS_IOC_SET_RESBLKS: {
- xfs_fsop_resblks_t inout;
- __uint64_t in;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- if (copy_from_user(&inout, (char *)arg, sizeof(inout)))
- return -XFS_ERROR(EFAULT);
-
- /* input parameter is passed in resblks field of structure */
- in = inout.resblks;
- error = xfs_reserve_blocks(mp, &in, &inout);
- if (error)
- return -error;
-
- if (copy_to_user((char *)arg, &inout, sizeof(inout)))
- return -XFS_ERROR(EFAULT);
- return 0;
- }
-
- case XFS_IOC_GET_RESBLKS: {
- xfs_fsop_resblks_t out;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- error = xfs_reserve_blocks(mp, NULL, &out);
- if (error)
- return -error;
-
- if (copy_to_user((char *)arg, &out, sizeof(out)))
- return -XFS_ERROR(EFAULT);
-
- return 0;
- }
-
- case XFS_IOC_FSGROWFSDATA: {
- xfs_growfs_data_t in;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- if (copy_from_user(&in, (char *)arg, sizeof(in)))
- return -XFS_ERROR(EFAULT);
-
- error = xfs_growfs_data(mp, &in);
- return -error;
- }
-
- case XFS_IOC_FSGROWFSLOG: {
- xfs_growfs_log_t in;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- if (copy_from_user(&in, (char *)arg, sizeof(in)))
- return -XFS_ERROR(EFAULT);
-
- error = xfs_growfs_log(mp, &in);
- return -error;
- }
-
- case XFS_IOC_FSGROWFSRT: {
- xfs_growfs_rt_t in;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- if (copy_from_user(&in, (char *)arg, sizeof(in)))
- return -XFS_ERROR(EFAULT);
-
- error = xfs_growfs_rt(mp, &in);
- return -error;
- }
-
- case XFS_IOC_FREEZE:
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- freeze_bdev(inode->i_sb->s_bdev);
- return 0;
-
- case XFS_IOC_THAW:
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
- thaw_bdev(inode->i_sb->s_bdev, inode->i_sb);
- return 0;
-
- case XFS_IOC_GOINGDOWN: {
- __uint32_t in;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- if (get_user(in, (__uint32_t *)arg))
- return -XFS_ERROR(EFAULT);
-
- error = xfs_fs_goingdown(mp, in);
- return -error;
- }
-
- case XFS_IOC_ERROR_INJECTION: {
- xfs_error_injection_t in;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- if (copy_from_user(&in, (char *)arg, sizeof(in)))
- return -XFS_ERROR(EFAULT);
-
- error = xfs_errortag_add(in.errtag, mp);
- return -error;
- }
-
- case XFS_IOC_ERROR_CLEARALL:
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- error = xfs_errortag_clearall(mp);
- return -error;
-
- default:
- return -ENOTTY;
- }
-}
-
-STATIC int
-xfs_ioc_space(
- bhv_desc_t *bdp,
- vnode_t *vp,
- struct file *filp,
- int ioflags,
- unsigned int cmd,
- unsigned long arg)
-{
- xfs_flock64_t bf;
- int attr_flags = 0;
- int error;
-
- if (vp->v_inode.i_flags & (S_IMMUTABLE|S_APPEND))
- return -XFS_ERROR(EPERM);
-
- if (!(filp->f_flags & FMODE_WRITE))
- return -XFS_ERROR(EBADF);
-
- if (vp->v_type != VREG)
- return -XFS_ERROR(EINVAL);
-
- if (copy_from_user(&bf, (xfs_flock64_t *)arg, sizeof(bf)))
- return -XFS_ERROR(EFAULT);
-
- if (filp->f_flags & (O_NDELAY|O_NONBLOCK))
- attr_flags |= ATTR_NONBLOCK;
- if (ioflags & IO_INVIS)
- attr_flags |= ATTR_DMI;
-
- error = xfs_change_file_space(bdp, cmd, &bf, filp->f_pos,
- NULL, attr_flags);
- return -error;
-}
-
-STATIC int
-xfs_ioc_bulkstat(
- xfs_mount_t *mp,
- unsigned int cmd,
- unsigned long arg)
-{
- xfs_fsop_bulkreq_t bulkreq;
- int count; /* # of records returned */
- xfs_ino_t inlast; /* last inode number */
- int done;
- int error;
-
- /* done = 1 if there are more stats to get and if bulkstat */
- /* should be called again (unused here, but used in dmapi) */
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- if (XFS_FORCED_SHUTDOWN(mp))
- return -XFS_ERROR(EIO);
-
- if (copy_from_user(&bulkreq, (xfs_fsop_bulkreq_t *)arg,
- sizeof(xfs_fsop_bulkreq_t)))
- return -XFS_ERROR(EFAULT);
-
- if (copy_from_user(&inlast, (__s64 *)bulkreq.lastip,
- sizeof(__s64)))
- return -XFS_ERROR(EFAULT);
-
- if ((count = bulkreq.icount) <= 0)
- return -XFS_ERROR(EINVAL);
-
- if (cmd == XFS_IOC_FSINUMBERS)
- error = xfs_inumbers(mp, NULL, &inlast, &count,
- bulkreq.ubuffer);
- else if (cmd == XFS_IOC_FSBULKSTAT_SINGLE)
- error = xfs_bulkstat_single(mp, &inlast,
- bulkreq.ubuffer, &done);
- else { /* XFS_IOC_FSBULKSTAT */
- if (count == 1 && inlast != 0) {
- inlast++;
- error = xfs_bulkstat_single(mp, &inlast,
- bulkreq.ubuffer, &done);
- } else {
- error = xfs_bulkstat(mp, NULL, &inlast, &count,
- (bulkstat_one_pf)xfs_bulkstat_one, NULL,
- sizeof(xfs_bstat_t), bulkreq.ubuffer,
- BULKSTAT_FG_QUICK, &done);
- }
- }
-
- if (error)
- return -error;
-
- if (bulkreq.ocount != NULL) {
- if (copy_to_user((xfs_ino_t *)bulkreq.lastip, &inlast,
- sizeof(xfs_ino_t)))
- return -XFS_ERROR(EFAULT);
-
- if (copy_to_user((__s32 *)bulkreq.ocount, &count,
- sizeof(count)))
- return -XFS_ERROR(EFAULT);
- }
-
- return 0;
-}
-
-STATIC int
-xfs_ioc_fsgeometry_v1(
- xfs_mount_t *mp,
- unsigned long arg)
-{
- xfs_fsop_geom_v1_t fsgeo;
- int error;
-
- error = xfs_fs_geometry(mp, (xfs_fsop_geom_t *)&fsgeo, 3);
- if (error)
- return -error;
-
- if (copy_to_user((xfs_fsop_geom_t *)arg, &fsgeo, sizeof(fsgeo)))
- return -XFS_ERROR(EFAULT);
- return 0;
-}
-
-STATIC int
-xfs_ioc_fsgeometry(
- xfs_mount_t *mp,
- unsigned long arg)
-{
- xfs_fsop_geom_t fsgeo;
- int error;
-
- error = xfs_fs_geometry(mp, &fsgeo, 4);
- if (error)
- return -error;
-
- if (copy_to_user((xfs_fsop_geom_t *)arg, &fsgeo, sizeof(fsgeo)))
- return -XFS_ERROR(EFAULT);
- return 0;
-}
-
-/*
- * Linux extended inode flags interface.
- */
-#define LINUX_XFLAG_SYNC 0x00000008 /* Synchronous updates */
-#define LINUX_XFLAG_IMMUTABLE 0x00000010 /* Immutable file */
-#define LINUX_XFLAG_APPEND 0x00000020 /* writes to file may only append */
-#define LINUX_XFLAG_NODUMP 0x00000040 /* do not dump file */
-#define LINUX_XFLAG_NOATIME 0x00000080 /* do not update atime */
-
-STATIC unsigned int
-xfs_merge_ioc_xflags(
- unsigned int flags,
- unsigned int start)
-{
- unsigned int xflags = start;
-
- if (flags & LINUX_XFLAG_IMMUTABLE)
- xflags |= XFS_XFLAG_IMMUTABLE;
- else
- xflags &= ~XFS_XFLAG_IMMUTABLE;
- if (flags & LINUX_XFLAG_APPEND)
- xflags |= XFS_XFLAG_APPEND;
- else
- xflags &= ~XFS_XFLAG_APPEND;
- if (flags & LINUX_XFLAG_SYNC)
- xflags |= XFS_XFLAG_SYNC;
- else
- xflags &= ~XFS_XFLAG_SYNC;
- if (flags & LINUX_XFLAG_NOATIME)
- xflags |= XFS_XFLAG_NOATIME;
- else
- xflags &= ~XFS_XFLAG_NOATIME;
- if (flags & LINUX_XFLAG_NODUMP)
- xflags |= XFS_XFLAG_NODUMP;
- else
- xflags &= ~XFS_XFLAG_NODUMP;
-
- return xflags;
-}
-
-STATIC int
-xfs_ioc_xattr(
- vnode_t *vp,
- xfs_inode_t *ip,
- struct file *filp,
- unsigned int cmd,
- unsigned long arg)
-{
- struct fsxattr fa;
- vattr_t va;
- int error;
- int attr_flags;
- unsigned int flags;
-
- switch (cmd) {
- case XFS_IOC_FSGETXATTR: {
- va.va_mask = XFS_AT_XFLAGS|XFS_AT_EXTSIZE|XFS_AT_NEXTENTS;
- VOP_GETATTR(vp, &va, 0, NULL, error);
- if (error)
- return -error;
-
- fa.fsx_xflags = va.va_xflags;
- fa.fsx_extsize = va.va_extsize;
- fa.fsx_nextents = va.va_nextents;
-
- if (copy_to_user((struct fsxattr *)arg, &fa, sizeof(fa)))
- return -XFS_ERROR(EFAULT);
- return 0;
- }
-
- case XFS_IOC_FSSETXATTR: {
- if (copy_from_user(&fa, (struct fsxattr *)arg, sizeof(fa)))
- return -XFS_ERROR(EFAULT);
-
- attr_flags = 0;
- if (filp->f_flags & (O_NDELAY|O_NONBLOCK))
- attr_flags |= ATTR_NONBLOCK;
-
- va.va_mask = XFS_AT_XFLAGS | XFS_AT_EXTSIZE;
- va.va_xflags = fa.fsx_xflags;
- va.va_extsize = fa.fsx_extsize;
-
- VOP_SETATTR(vp, &va, attr_flags, NULL, error);
- if (!error)
- vn_revalidate(vp); /* update Linux inode flags */
- return -error;
- }
-
- case XFS_IOC_FSGETXATTRA: {
- va.va_mask = XFS_AT_XFLAGS|XFS_AT_EXTSIZE|XFS_AT_ANEXTENTS;
- VOP_GETATTR(vp, &va, 0, NULL, error);
- if (error)
- return -error;
-
- fa.fsx_xflags = va.va_xflags;
- fa.fsx_extsize = va.va_extsize;
- fa.fsx_nextents = va.va_anextents;
-
- if (copy_to_user((struct fsxattr *)arg, &fa, sizeof(fa)))
- return -XFS_ERROR(EFAULT);
- return 0;
- }
-
- case XFS_IOC_GETXFLAGS: {
- flags = 0;
- if (ip->i_d.di_flags & XFS_XFLAG_IMMUTABLE)
- flags |= LINUX_XFLAG_IMMUTABLE;
- if (ip->i_d.di_flags & XFS_XFLAG_APPEND)
- flags |= LINUX_XFLAG_APPEND;
- if (ip->i_d.di_flags & XFS_XFLAG_SYNC)
- flags |= LINUX_XFLAG_SYNC;
- if (ip->i_d.di_flags & XFS_XFLAG_NOATIME)
- flags |= LINUX_XFLAG_NOATIME;
- if (ip->i_d.di_flags & XFS_XFLAG_NODUMP)
- flags |= LINUX_XFLAG_NODUMP;
- if (copy_to_user((unsigned int *)arg, &flags, sizeof(flags)))
- return -XFS_ERROR(EFAULT);
- return 0;
- }
-
- case XFS_IOC_SETXFLAGS: {
- if (copy_from_user(&flags, (unsigned int *)arg, sizeof(flags)))
- return -XFS_ERROR(EFAULT);
-
- if (flags & ~(LINUX_XFLAG_IMMUTABLE | LINUX_XFLAG_APPEND | \
- LINUX_XFLAG_NOATIME | LINUX_XFLAG_NODUMP | \
- LINUX_XFLAG_SYNC))
- return -XFS_ERROR(EOPNOTSUPP);
-
- attr_flags = 0;
- if (filp->f_flags & (O_NDELAY|O_NONBLOCK))
- attr_flags |= ATTR_NONBLOCK;
-
- va.va_mask = XFS_AT_XFLAGS;
- va.va_xflags = xfs_merge_ioc_xflags(flags, ip->i_d.di_flags);
-
- VOP_SETATTR(vp, &va, attr_flags, NULL, error);
- if (!error)
- vn_revalidate(vp); /* update Linux inode flags */
- return -error;
- }
-
- case XFS_IOC_GETVERSION: {
- flags = LINVFS_GET_IP(vp)->i_generation;
- if (copy_to_user((unsigned int *)arg, &flags, sizeof(flags)))
- return -XFS_ERROR(EFAULT);
- return 0;
- }
-
- default:
- return -ENOTTY;
- }
-}
-
-STATIC int
-xfs_ioc_getbmap(
- bhv_desc_t *bdp,
- struct file *filp,
- int ioflags,
- unsigned int cmd,
- unsigned long arg)
-{
- struct getbmap bm;
- int iflags;
- int error;
-
- if (copy_from_user(&bm, (struct getbmap *)arg, sizeof(bm)))
- return -XFS_ERROR(EFAULT);
-
- if (bm.bmv_count < 2)
- return -XFS_ERROR(EINVAL);
-
- iflags = (cmd == XFS_IOC_GETBMAPA ? BMV_IF_ATTRFORK : 0);
- if (ioflags & IO_INVIS)
- iflags |= BMV_IF_NO_DMAPI_READ;
-
- error = xfs_getbmap(bdp, &bm, (struct getbmap *)arg+1, iflags);
- if (error)
- return -error;
-
- if (copy_to_user((struct getbmap *)arg, &bm, sizeof(bm)))
- return -XFS_ERROR(EFAULT);
- return 0;
-}
-
-STATIC int
-xfs_ioc_getbmapx(
- bhv_desc_t *bdp,
- unsigned long arg)
-{
- struct getbmapx bmx;
- struct getbmap bm;
- int iflags;
- int error;
-
- if (copy_from_user(&bmx, (struct getbmapx *)arg, sizeof(bmx)))
- return -XFS_ERROR(EFAULT);
-
- if (bmx.bmv_count < 2)
- return -XFS_ERROR(EINVAL);
-
- /*
- * Map input getbmapx structure to a getbmap
- * structure for xfs_getbmap.
- */
- GETBMAP_CONVERT(bmx, bm);
-
- iflags = bmx.bmv_iflags;
-
- if (iflags & (~BMV_IF_VALID))
- return -XFS_ERROR(EINVAL);
-
- iflags |= BMV_IF_EXTENDED;
-
- error = xfs_getbmap(bdp, &bm, (struct getbmapx *)arg+1, iflags);
- if (error)
- return -error;
-
- GETBMAP_CONVERT(bm, bmx);
-
- if (copy_to_user((struct getbmapx *)arg, &bmx, sizeof(bmx)))
- return -XFS_ERROR(EFAULT);
-
- return 0;
-}
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-#include "xfs_fs.h"
-#include "xfs_inum.h"
-#include "xfs_log.h"
-#include "xfs_trans.h"
-#include "xfs_sb.h"
-#include "xfs_ag.h"
-#include "xfs_dir.h"
-#include "xfs_dir2.h"
-#include "xfs_alloc.h"
-#include "xfs_dmapi.h"
-#include "xfs_quota.h"
-#include "xfs_mount.h"
-#include "xfs_alloc_btree.h"
-#include "xfs_bmap_btree.h"
-#include "xfs_ialloc_btree.h"
-#include "xfs_btree.h"
-#include "xfs_ialloc.h"
-#include "xfs_attr_sf.h"
-#include "xfs_dir_sf.h"
-#include "xfs_dir2_sf.h"
-#include "xfs_dinode.h"
-#include "xfs_inode.h"
-#include "xfs_bmap.h"
-#include "xfs_bit.h"
-#include "xfs_rtalloc.h"
-#include "xfs_error.h"
-#include "xfs_itable.h"
-#include "xfs_rw.h"
-#include "xfs_acl.h"
-#include "xfs_cap.h"
-#include "xfs_mac.h"
-#include "xfs_attr.h"
-#include "xfs_buf_item.h"
-#include "xfs_utils.h"
-
-#include <linux/xattr.h>
-
-
-/*
- * Pull the link count and size up from the xfs inode to the linux inode
- */
-STATIC void
-validate_fields(
- struct inode *ip)
-{
- vnode_t *vp = LINVFS_GET_VP(ip);
- vattr_t va;
- int error;
-
- va.va_mask = XFS_AT_NLINK|XFS_AT_SIZE|XFS_AT_NBLOCKS;
- VOP_GETATTR(vp, &va, ATTR_LAZY, NULL, error);
- if (likely(!error)) {
- ip->i_nlink = va.va_nlink;
- ip->i_blocks = va.va_nblocks;
-
- /* we're under i_sem so i_size can't change under us */
- if (i_size_read(ip) != va.va_size)
- i_size_write(ip, va.va_size);
- }
-}
-
-/*
- * Determine whether a process has a valid fs_struct (kernel daemons
- * like knfsd don't have an fs_struct).
- *
- * XXX(hch): nfsd is broken, better fix it instead.
- */
-STATIC inline int
-has_fs_struct(struct task_struct *task)
-{
- return (task->fs != init_task.fs);
-}
-
-STATIC int
-linvfs_mknod(
- struct inode *dir,
- struct dentry *dentry,
- int mode,
- dev_t rdev)
-{
- struct inode *ip;
- vattr_t va;
- vnode_t *vp = NULL, *dvp = LINVFS_GET_VP(dir);
- xfs_acl_t *default_acl = NULL;
- attrexists_t test_default_acl = _ACL_DEFAULT_EXISTS;
- int error;
-
- /*
- * Irix uses Missed'em'V split, but doesn't want to see
- * the upper 5 bits of (14bit) major.
- */
- if (!sysv_valid_dev(rdev) || MAJOR(rdev) & ~0x1ff)
- return -EINVAL;
-
- if (test_default_acl && test_default_acl(dvp)) {
- if (!_ACL_ALLOC(default_acl))
- return -ENOMEM;
- if (!_ACL_GET_DEFAULT(dvp, default_acl)) {
- _ACL_FREE(default_acl);
- default_acl = NULL;
- }
- }
-
- if (IS_POSIXACL(dir) && !default_acl && has_fs_struct(current))
- mode &= ~current->fs->umask;
-
- memset(&va, 0, sizeof(va));
- va.va_mask = XFS_AT_TYPE|XFS_AT_MODE;
- va.va_type = IFTOVT(mode);
- va.va_mode = mode;
-
- switch (mode & S_IFMT) {
- case S_IFCHR: case S_IFBLK: case S_IFIFO: case S_IFSOCK:
- va.va_rdev = sysv_encode_dev(rdev);
- va.va_mask |= XFS_AT_RDEV;
- /*FALLTHROUGH*/
- case S_IFREG:
- VOP_CREATE(dvp, dentry, &va, &vp, NULL, error);
- break;
- case S_IFDIR:
- VOP_MKDIR(dvp, dentry, &va, &vp, NULL, error);
- break;
- default:
- error = EINVAL;
- break;
- }
-
- if (default_acl) {
- if (!error) {
- error = _ACL_INHERIT(vp, &va, default_acl);
- if (!error) {
- VMODIFY(vp);
- } else {
- struct dentry teardown = {};
- int err2;
-
- /* Oh, the horror.
- * If we can't add the ACL we must back out.
- * ENOSPC can hit here, among other things.
- */
- teardown.d_inode = ip = LINVFS_GET_IP(vp);
- teardown.d_name = dentry->d_name;
- remove_inode_hash(ip);
- make_bad_inode(ip);
- if (S_ISDIR(mode))
- VOP_RMDIR(dvp, &teardown, NULL, err2);
- else
- VOP_REMOVE(dvp, &teardown, NULL, err2);
- VN_RELE(vp);
- }
- }
- _ACL_FREE(default_acl);
- }
-
- if (!error) {
- ASSERT(vp);
- ip = LINVFS_GET_IP(vp);
-
- if (S_ISCHR(mode) || S_ISBLK(mode))
- ip->i_rdev = rdev;
- else if (S_ISDIR(mode))
- validate_fields(ip);
- d_instantiate(dentry, ip);
- validate_fields(dir);
- }
- return -error;
-}
-
-STATIC int
-linvfs_create(
- struct inode *dir,
- struct dentry *dentry,
- int mode,
- struct nameidata *nd)
-{
- return linvfs_mknod(dir, dentry, mode, 0);
-}
-
-STATIC int
-linvfs_mkdir(
- struct inode *dir,
- struct dentry *dentry,
- int mode)
-{
- return linvfs_mknod(dir, dentry, mode|S_IFDIR, 0);
-}
-
-STATIC struct dentry *
-linvfs_lookup(
- struct inode *dir,
- struct dentry *dentry,
- struct nameidata *nd)
-{
- struct inode *ip = NULL;
- vnode_t *vp, *cvp = NULL;
- int error;
-
- if (dentry->d_name.len >= MAXNAMELEN)
- return ERR_PTR(-ENAMETOOLONG);
-
- vp = LINVFS_GET_VP(dir);
- VOP_LOOKUP(vp, dentry, &cvp, 0, NULL, NULL, error);
- if (!error) {
- ASSERT(cvp);
- ip = LINVFS_GET_IP(cvp);
- if (!ip) {
- VN_RELE(cvp);
- return ERR_PTR(-EACCES);
- }
- }
- if (error && (error != ENOENT))
- return ERR_PTR(-error);
- return d_splice_alias(ip, dentry);
-}
-
-STATIC int
-linvfs_link(
- struct dentry *old_dentry,
- struct inode *dir,
- struct dentry *dentry)
-{
- struct inode *ip; /* inode of guy being linked to */
- vnode_t *tdvp; /* target directory for new name/link */
- vnode_t *vp; /* vp of name being linked */
- int error;
-
- ip = old_dentry->d_inode; /* inode being linked to */
- if (S_ISDIR(ip->i_mode))
- return -EPERM;
-
- tdvp = LINVFS_GET_VP(dir);
- vp = LINVFS_GET_VP(ip);
-
- VOP_LINK(tdvp, vp, dentry, NULL, error);
- if (!error) {
- VMODIFY(tdvp);
- VN_HOLD(vp);
- validate_fields(ip);
- d_instantiate(dentry, ip);
- }
- return -error;
-}
-
-STATIC int
-linvfs_unlink(
- struct inode *dir,
- struct dentry *dentry)
-{
- struct inode *inode;
- vnode_t *dvp; /* directory containing name to remove */
- int error;
-
- inode = dentry->d_inode;
- dvp = LINVFS_GET_VP(dir);
-
- VOP_REMOVE(dvp, dentry, NULL, error);
- if (!error) {
- validate_fields(dir); /* For size only */
- validate_fields(inode);
- }
-
- return -error;
-}
-
-STATIC int
-linvfs_symlink(
- struct inode *dir,
- struct dentry *dentry,
- const char *symname)
-{
- struct inode *ip;
- vattr_t va;
- vnode_t *dvp; /* directory containing name to remove */
- vnode_t *cvp; /* used to lookup symlink to put in dentry */
- int error;
-
- dvp = LINVFS_GET_VP(dir);
- cvp = NULL;
-
- memset(&va, 0, sizeof(va));
- va.va_type = VLNK;
- va.va_mode = irix_symlink_mode ? 0777 & ~current->fs->umask : S_IRWXUGO;
- va.va_mask = XFS_AT_TYPE|XFS_AT_MODE;
-
- error = 0;
- VOP_SYMLINK(dvp, dentry, &va, (char *)symname, &cvp, NULL, error);
- if (!error && cvp) {
- ASSERT(cvp->v_type == VLNK);
- ip = LINVFS_GET_IP(cvp);
- d_instantiate(dentry, ip);
- validate_fields(dir);
- validate_fields(ip); /* size needs update */
- }
- return -error;
-}
-
-STATIC int
-linvfs_rmdir(
- struct inode *dir,
- struct dentry *dentry)
-{
- struct inode *inode = dentry->d_inode;
- vnode_t *dvp = LINVFS_GET_VP(dir);
- int error;
-
- VOP_RMDIR(dvp, dentry, NULL, error);
- if (!error) {
- validate_fields(inode);
- validate_fields(dir);
- }
- return -error;
-}
-
-STATIC int
-linvfs_rename(
- struct inode *odir,
- struct dentry *odentry,
- struct inode *ndir,
- struct dentry *ndentry)
-{
- struct inode *new_inode = ndentry->d_inode;
- vnode_t *fvp; /* from directory */
- vnode_t *tvp; /* target directory */
- int error;
-
- fvp = LINVFS_GET_VP(odir);
- tvp = LINVFS_GET_VP(ndir);
-
- VOP_RENAME(fvp, odentry, tvp, ndentry, NULL, error);
- if (error)
- return -error;
-
- if (new_inode)
- validate_fields(new_inode);
-
- validate_fields(odir);
- if (ndir != odir)
- validate_fields(ndir);
- return 0;
-}
-
-STATIC int
-linvfs_readlink(
- struct dentry *dentry,
- char *buf,
- int size)
-{
- vnode_t *vp = LINVFS_GET_VP(dentry->d_inode);
- uio_t uio;
- iovec_t iov;
- int error;
-
- iov.iov_base = buf;
- iov.iov_len = size;
-
- uio.uio_iov = &iov;
- uio.uio_offset = 0;
- uio.uio_segflg = UIO_USERSPACE;
- uio.uio_resid = size;
- uio.uio_iovcnt = 1;
-
- VOP_READLINK(vp, &uio, 0, NULL, error);
- if (error)
- return -error;
-
- return (size - uio.uio_resid);
-}
-
-/*
- * careful here - this function can get called recursively, so
- * we need to be very careful about how much stack we use.
- * uio is kmalloced for this reason...
- */
-STATIC int
-linvfs_follow_link(
- struct dentry *dentry,
- struct nameidata *nd)
-{
- vnode_t *vp;
- uio_t *uio;
- iovec_t iov;
- int error;
- char *link;
-
- ASSERT(dentry);
- ASSERT(nd);
-
- link = (char *)kmalloc(MAXNAMELEN+1, GFP_KERNEL);
- if (!link)
- return -ENOMEM;
-
- uio = (uio_t *)kmalloc(sizeof(uio_t), GFP_KERNEL);
- if (!uio) {
- kfree(link);
- return -ENOMEM;
- }
-
- vp = LINVFS_GET_VP(dentry->d_inode);
-
- iov.iov_base = link;
- iov.iov_len = MAXNAMELEN;
-
- uio->uio_iov = &iov;
- uio->uio_offset = 0;
- uio->uio_segflg = UIO_SYSSPACE;
- uio->uio_resid = MAXNAMELEN;
- uio->uio_iovcnt = 1;
-
- VOP_READLINK(vp, uio, 0, NULL, error);
- if (error) {
- kfree(uio);
- kfree(link);
- return -error;
- }
-
- link[MAXNAMELEN - uio->uio_resid] = '\0';
- kfree(uio);
-
- /* vfs_follow_link returns (-) errors */
- error = vfs_follow_link(nd, link);
- kfree(link);
- return error;
-}
-
-#ifdef CONFIG_XFS_POSIX_ACL
-STATIC int
-linvfs_permission(
- struct inode *inode,
- int mode,
- struct nameidata *nd)
-{
- vnode_t *vp = LINVFS_GET_VP(inode);
- int error;
-
- mode <<= 6; /* convert from linux to vnode access bits */
- VOP_ACCESS(vp, mode, NULL, error);
- return -error;
-}
-#else
-#define linvfs_permission NULL
-#endif
-
-STATIC int
-linvfs_getattr(
- struct vfsmount *mnt,
- struct dentry *dentry,
- struct kstat *stat)
-{
- struct inode *inode = dentry->d_inode;
- vnode_t *vp = LINVFS_GET_VP(inode);
- int error = 0;
-
- if (unlikely(vp->v_flag & VMODIFIED))
- error = vn_revalidate(vp);
- if (!error)
- generic_fillattr(inode, stat);
- return 0;
-}
-
-STATIC int
-linvfs_setattr(
- struct dentry *dentry,
- struct iattr *attr)
-{
- struct inode *inode = dentry->d_inode;
- unsigned int ia_valid = attr->ia_valid;
- vnode_t *vp = LINVFS_GET_VP(inode);
- vattr_t vattr;
- int flags = 0;
- int error;
-
- memset(&vattr, 0, sizeof(vattr_t));
- if (ia_valid & ATTR_UID) {
- vattr.va_mask |= XFS_AT_UID;
- vattr.va_uid = attr->ia_uid;
- }
- if (ia_valid & ATTR_GID) {
- vattr.va_mask |= XFS_AT_GID;
- vattr.va_gid = attr->ia_gid;
- }
- if (ia_valid & ATTR_SIZE) {
- vattr.va_mask |= XFS_AT_SIZE;
- vattr.va_size = attr->ia_size;
- }
- if (ia_valid & ATTR_ATIME) {
- vattr.va_mask |= XFS_AT_ATIME;
- vattr.va_atime = attr->ia_atime;
- }
- if (ia_valid & ATTR_MTIME) {
- vattr.va_mask |= XFS_AT_MTIME;
- vattr.va_mtime = attr->ia_mtime;
- }
- if (ia_valid & ATTR_CTIME) {
- vattr.va_mask |= XFS_AT_CTIME;
- vattr.va_ctime = attr->ia_ctime;
- }
- if (ia_valid & ATTR_MODE) {
- vattr.va_mask |= XFS_AT_MODE;
- vattr.va_mode = attr->ia_mode;
- if (!in_group_p(inode->i_gid) && !capable(CAP_FSETID))
- inode->i_mode &= ~S_ISGID;
- }
-
- if (ia_valid & (ATTR_MTIME_SET | ATTR_ATIME_SET))
- flags = ATTR_UTIME;
-#ifdef ATTR_NO_BLOCK
- if ((ia_valid & ATTR_NO_BLOCK))
- flags |= ATTR_NONBLOCK;
-#endif
-
- VOP_SETATTR(vp, &vattr, flags, NULL, error);
- if (error)
- return(-error); /* Positive error up from XFS */
- if (ia_valid & ATTR_SIZE) {
- error = vmtruncate(inode, attr->ia_size);
- }
-
- if (!error) {
- vn_revalidate(vp);
- }
- return error;
-}
-
-STATIC void
-linvfs_truncate(
- struct inode *inode)
-{
- block_truncate_page(inode->i_mapping, inode->i_size, linvfs_get_block);
-}
-
-STATIC int
-linvfs_setxattr(
- struct dentry *dentry,
- const char *name,
- const void *data,
- size_t size,
- int flags)
-{
- vnode_t *vp = LINVFS_GET_VP(dentry->d_inode);
- char *attr = (char *)name;
- attrnames_t *namesp;
- int xflags = 0;
- int error;
-
- namesp = attr_lookup_namespace(attr, attr_namespaces, ATTR_NAMECOUNT);
- if (!namesp)
- return -EOPNOTSUPP;
- attr += namesp->attr_namelen;
- error = namesp->attr_capable(vp, NULL);
- if (error)
- return error;
-
- /* Convert Linux syscall to XFS internal ATTR flags */
- if (flags & XATTR_CREATE)
- xflags |= ATTR_CREATE;
- if (flags & XATTR_REPLACE)
- xflags |= ATTR_REPLACE;
- xflags |= namesp->attr_flag;
- return namesp->attr_set(vp, attr, (void *)data, size, xflags);
-}
-
-STATIC ssize_t
-linvfs_getxattr(
- struct dentry *dentry,
- const char *name,
- void *data,
- size_t size)
-{
- vnode_t *vp = LINVFS_GET_VP(dentry->d_inode);
- char *attr = (char *)name;
- attrnames_t *namesp;
- int xflags = 0;
- ssize_t error;
-
- namesp = attr_lookup_namespace(attr, attr_namespaces, ATTR_NAMECOUNT);
- if (!namesp)
- return -EOPNOTSUPP;
- attr += namesp->attr_namelen;
- error = namesp->attr_capable(vp, NULL);
- if (error)
- return error;
-
- /* Convert Linux syscall to XFS internal ATTR flags */
- if (!size) {
- xflags |= ATTR_KERNOVAL;
- data = NULL;
- }
- xflags |= namesp->attr_flag;
- return namesp->attr_get(vp, attr, (void *)data, size, xflags);
-}
-
-STATIC ssize_t
-linvfs_listxattr(
- struct dentry *dentry,
- char *data,
- size_t size)
-{
- vnode_t *vp = LINVFS_GET_VP(dentry->d_inode);
- int error, xflags = ATTR_KERNAMELS;
- ssize_t result;
-
- if (!size)
- xflags |= ATTR_KERNOVAL;
- xflags |= capable(CAP_SYS_ADMIN) ? ATTR_KERNFULLS : ATTR_KERNORMALS;
-
- error = attr_generic_list(vp, data, size, xflags, &result);
- if (error < 0)
- return error;
- return result;
-}
-
-STATIC int
-linvfs_removexattr(
- struct dentry *dentry,
- const char *name)
-{
- vnode_t *vp = LINVFS_GET_VP(dentry->d_inode);
- char *attr = (char *)name;
- attrnames_t *namesp;
- int xflags = 0;
- int error;
-
- namesp = attr_lookup_namespace(attr, attr_namespaces, ATTR_NAMECOUNT);
- if (!namesp)
- return -EOPNOTSUPP;
- attr += namesp->attr_namelen;
- error = namesp->attr_capable(vp, NULL);
- if (error)
- return error;
- xflags |= namesp->attr_flag;
- return namesp->attr_remove(vp, attr, xflags);
-}
-
-
-struct inode_operations linvfs_file_inode_operations = {
- .permission = linvfs_permission,
- .truncate = linvfs_truncate,
- .getattr = linvfs_getattr,
- .setattr = linvfs_setattr,
- .setxattr = linvfs_setxattr,
- .getxattr = linvfs_getxattr,
- .listxattr = linvfs_listxattr,
- .removexattr = linvfs_removexattr,
-};
-
-struct inode_operations linvfs_dir_inode_operations = {
- .create = linvfs_create,
- .lookup = linvfs_lookup,
- .link = linvfs_link,
- .unlink = linvfs_unlink,
- .symlink = linvfs_symlink,
- .mkdir = linvfs_mkdir,
- .rmdir = linvfs_rmdir,
- .mknod = linvfs_mknod,
- .rename = linvfs_rename,
- .permission = linvfs_permission,
- .getattr = linvfs_getattr,
- .setattr = linvfs_setattr,
- .setxattr = linvfs_setxattr,
- .getxattr = linvfs_getxattr,
- .listxattr = linvfs_listxattr,
- .removexattr = linvfs_removexattr,
-};
-
-struct inode_operations linvfs_symlink_inode_operations = {
- .readlink = linvfs_readlink,
- .follow_link = linvfs_follow_link,
- .permission = linvfs_permission,
- .getattr = linvfs_getattr,
- .setattr = linvfs_setattr,
- .setxattr = linvfs_setxattr,
- .getxattr = linvfs_getxattr,
- .listxattr = linvfs_listxattr,
- .removexattr = linvfs_removexattr,
-};
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_IOPS_H__
-#define __XFS_IOPS_H__
-
-extern struct inode_operations linvfs_file_inode_operations;
-extern struct inode_operations linvfs_dir_inode_operations;
-extern struct inode_operations linvfs_symlink_inode_operations;
-
-extern struct file_operations linvfs_file_operations;
-extern struct file_operations linvfs_invis_file_operations;
-extern struct file_operations linvfs_dir_operations;
-
-extern struct address_space_operations linvfs_aops;
-
-extern int linvfs_get_block(struct inode *, sector_t, struct buffer_head *, int);
-extern void linvfs_unwritten_done(struct buffer_head *, int);
-
-extern int xfs_ioctl(struct bhv_desc *, struct inode *, struct file *,
- int, unsigned int, unsigned long);
-
-#endif /* __XFS_IOPS_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_LINUX__
-#define __XFS_LINUX__
-
-#include <linux/types.h>
-#include <linux/config.h>
-
-/*
- * Some types are conditional depending on the target system.
- * XFS_BIG_BLKNOS needs block layer disk addresses to be 64 bits.
- * XFS_BIG_INUMS needs the VFS inode number to be 64 bits, as well
- * as requiring XFS_BIG_BLKNOS to be set.
- */
-#if defined(CONFIG_LBD) || (BITS_PER_LONG == 64)
-# define XFS_BIG_BLKNOS 1
-# if BITS_PER_LONG == 64
-# define XFS_BIG_INUMS 1
-# else
-# define XFS_BIG_INUMS 0
-# endif
-#else
-# define XFS_BIG_BLKNOS 0
-# define XFS_BIG_INUMS 0
-#endif
-
-#include <xfs_types.h>
-#include <xfs_arch.h>
-
-#include <kmem.h>
-#include <mrlock.h>
-#include <spin.h>
-#include <sv.h>
-#include <mutex.h>
-#include <sema.h>
-#include <time.h>
-
-#include <support/qsort.h>
-#include <support/ktrace.h>
-#include <support/debug.h>
-#include <support/move.h>
-#include <support/uuid.h>
-
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/blkdev.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/file.h>
-#include <linux/swap.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/bitops.h>
-#include <linux/major.h>
-#include <linux/pagemap.h>
-#include <linux/vfs.h>
-#include <linux/seq_file.h>
-#include <linux/init.h>
-#include <linux/proc_fs.h>
-#include <linux/version.h>
-
-#include <asm/page.h>
-#include <asm/div64.h>
-#include <asm/param.h>
-#include <asm/uaccess.h>
-#include <asm/byteorder.h>
-#include <asm/unaligned.h>
-
-#include <xfs_behavior.h>
-#include <xfs_vfs.h>
-#include <xfs_cred.h>
-#include <xfs_vnode.h>
-#include <xfs_stats.h>
-#include <xfs_sysctl.h>
-#include <xfs_iops.h>
-#include <xfs_super.h>
-#include <xfs_globals.h>
-#include <xfs_fs_subr.h>
-#include <xfs_lrw.h>
-#include <xfs_buf.h>
-
-/*
- * Feature macros (disable/enable)
- */
-#undef HAVE_REFCACHE /* reference cache not needed for NFS in 2.6 */
-#define HAVE_SENDFILE /* sendfile(2) exists in 2.6, but not in 2.4 */
-
-/*
- * State flag for unwritten extent buffers.
- *
- * We need to be able to distinguish between these and delayed
- * allocate buffers within XFS. The generic IO path code does
- * not need to distinguish - we use the BH_Delay flag for both
- * delalloc and these ondisk-uninitialised buffers.
- */
-BUFFER_FNS(PrivateStart, unwritten);
-static inline void set_buffer_unwritten_io(struct buffer_head *bh)
-{
- bh->b_end_io = linvfs_unwritten_done;
-}
-
-#define xfs_refcache_size xfs_params.refcache_size.val
-#define xfs_refcache_purge_count xfs_params.refcache_purge.val
-#define restricted_chown xfs_params.restrict_chown.val
-#define irix_sgid_inherit xfs_params.sgid_inherit.val
-#define irix_symlink_mode xfs_params.symlink_mode.val
-#define xfs_panic_mask xfs_params.panic_mask.val
-#define xfs_error_level xfs_params.error_level.val
-#define xfs_syncd_interval (xfs_params.sync_interval.val * HZ / USER_HZ)
-#define xfs_stats_clear xfs_params.stats_clear.val
-#define xfs_inherit_sync xfs_params.inherit_sync.val
-#define xfs_inherit_nodump xfs_params.inherit_nodump.val
-#define xfs_inherit_noatime xfs_params.inherit_noatim.val
-#define xfs_flush_interval (xfs_params.flush_interval.val * HZ / USER_HZ)
-#define xfs_age_buffer (xfs_params.age_buffer.val * HZ / USER_HZ)
-
-#define current_cpu() smp_processor_id()
-#define current_pid() (current->pid)
-#define current_fsuid(cred) (current->fsuid)
-#define current_fsgid(cred) (current->fsgid)
-
-#define NBPP PAGE_SIZE
-#define DPPSHFT (PAGE_SHIFT - 9)
-#define NDPP (1 << (PAGE_SHIFT - 9))
-#define dtop(DD) (((DD) + NDPP - 1) >> DPPSHFT)
-#define dtopt(DD) ((DD) >> DPPSHFT)
-#define dpoff(DD) ((DD) & (NDPP-1))
-
-#define NBBY 8 /* number of bits per byte */
-#define NBPC PAGE_SIZE /* Number of bytes per click */
-#define BPCSHIFT PAGE_SHIFT /* LOG2(NBPC) if exact */
-
-/*
- * Size of block device i/o is parameterized here.
- * Currently the system supports page-sized i/o.
- */
-#define BLKDEV_IOSHIFT BPCSHIFT
-#define BLKDEV_IOSIZE (1<<BLKDEV_IOSHIFT)
-/* number of BB's per block device block */
-#define BLKDEV_BB BTOBB(BLKDEV_IOSIZE)
-
-/* bytes to clicks */
-#define btoc(x) (((__psunsigned_t)(x)+(NBPC-1))>>BPCSHIFT)
-#define btoct(x) ((__psunsigned_t)(x)>>BPCSHIFT)
-#define btoc64(x) (((__uint64_t)(x)+(NBPC-1))>>BPCSHIFT)
-#define btoct64(x) ((__uint64_t)(x)>>BPCSHIFT)
-#define io_btoc(x) (((__psunsigned_t)(x)+(IO_NBPC-1))>>IO_BPCSHIFT)
-#define io_btoct(x) ((__psunsigned_t)(x)>>IO_BPCSHIFT)
-
-/* off_t bytes to clicks */
-#define offtoc(x) (((__uint64_t)(x)+(NBPC-1))>>BPCSHIFT)
-#define offtoct(x) ((xfs_off_t)(x)>>BPCSHIFT)
-
-/* clicks to off_t bytes */
-#define ctooff(x) ((xfs_off_t)(x)<<BPCSHIFT)
-
-/* clicks to bytes */
-#define ctob(x) ((__psunsigned_t)(x)<<BPCSHIFT)
-#define btoct(x) ((__psunsigned_t)(x)>>BPCSHIFT)
-#define ctob64(x) ((__uint64_t)(x)<<BPCSHIFT)
-#define io_ctob(x) ((__psunsigned_t)(x)<<IO_BPCSHIFT)
-
-/* bytes to clicks */
-#define btoc(x) (((__psunsigned_t)(x)+(NBPC-1))>>BPCSHIFT)
-
-#ifndef CELL_CAPABLE
-#define FSC_NOTIFY_NAME_CHANGED(vp)
-#endif
-
-#ifndef ENOATTR
-#define ENOATTR ENODATA /* Attribute not found */
-#endif
-
-/* Note: EWRONGFS never visible outside the kernel */
-#define EWRONGFS EINVAL /* Mount with wrong filesystem type */
-
-/*
- * XXX EFSCORRUPTED needs a real value in errno.h. asm-i386/errno.h won't
- * return codes out of its known range in errno.
- * XXX Also note: needs to be < 1000 and fairly unique on Linux (mustn't
- * conflict with any code we use already or any code a driver may use)
- * XXX Some options (currently we do #2):
- * 1/ New error code ["Filesystem is corrupted", _after_ glibc updated]
- * 2/ 990 ["Unknown error 990"]
- * 3/ EUCLEAN ["Structure needs cleaning"]
- * 4/ Convert EFSCORRUPTED to EIO [just prior to return into userspace]
- */
-#define EFSCORRUPTED 990 /* Filesystem is corrupted */
-
-#define SYNCHRONIZE() barrier()
-#define __return_address __builtin_return_address(0)
-
-/*
- * IRIX (BSD) quotactl makes use of separate commands for user/group,
- * whereas on Linux the syscall encodes this information into the cmd
- * field (see the QCMD macro in quota.h). These macros help keep the
- * code portable - they are not visible from the syscall interface.
- */
-#define Q_XSETGQLIM XQM_CMD(0x8) /* set groups disk limits */
-#define Q_XGETGQUOTA XQM_CMD(0x9) /* get groups disk limits */
-
-/* IRIX uses a dynamic sizing algorithm (ndquot = 200 + numprocs*2) */
-/* we may well need to fine-tune this if it ever becomes an issue. */
-#define DQUOT_MAX_HEURISTIC 1024 /* NR_DQUOTS */
-#define ndquot DQUOT_MAX_HEURISTIC
-
-/* IRIX uses the current size of the name cache to guess a good value */
-/* - this isn't the same but is a good enough starting point for now. */
-#define DQUOT_HASH_HEURISTIC files_stat.nr_files
-
-/* IRIX inodes maintain the project ID also, zero this field on Linux */
-#define DEFAULT_PROJID 0
-#define dfltprid DEFAULT_PROJID
-
-#define MAXPATHLEN 1024
-
-#define MIN(a,b) (min(a,b))
-#define MAX(a,b) (max(a,b))
-#define howmany(x, y) (((x)+((y)-1))/(y))
-#define roundup(x, y) ((((x)+((y)-1))/(y))*(y))
-
-#define xfs_stack_trace() dump_stack()
-
-#define xfs_itruncate_data(ip, off) \
- (-vmtruncate(LINVFS_GET_IP(XFS_ITOV(ip)), (off)))
-
-
-/* Move the kernel do_div definition off to one side */
-
-#if defined __i386__
-/* For ia32 we need to pull some tricks to get past various versions
- * of the compiler which do not like us using do_div in the middle
- * of large functions.
- */
-static inline __u32 xfs_do_div(void *a, __u32 b, int n)
-{
- __u32 mod;
-
- switch (n) {
- case 4:
- mod = *(__u32 *)a % b;
- *(__u32 *)a = *(__u32 *)a / b;
- return mod;
- case 8:
- {
- unsigned long __upper, __low, __high, __mod;
- __u64 c = *(__u64 *)a;
- __upper = __high = c >> 32;
- __low = c;
- if (__high) {
- __upper = __high % (b);
- __high = __high / (b);
- }
- asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (b), "0" (__low), "1" (__upper));
- asm("":"=A" (c):"a" (__low),"d" (__high));
- *(__u64 *)a = c;
- return __mod;
- }
- }
-
- /* NOTREACHED */
- return 0;
-}
-
-/* Side effect free 64 bit mod operation */
-static inline __u32 xfs_do_mod(void *a, __u32 b, int n)
-{
- switch (n) {
- case 4:
- return *(__u32 *)a % b;
- case 8:
- {
- unsigned long __upper, __low, __high, __mod;
- __u64 c = *(__u64 *)a;
- __upper = __high = c >> 32;
- __low = c;
- if (__high) {
- __upper = __high % (b);
- __high = __high / (b);
- }
- asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (b), "0" (__low), "1" (__upper));
- asm("":"=A" (c):"a" (__low),"d" (__high));
- return __mod;
- }
- }
-
- /* NOTREACHED */
- return 0;
-}
-#else
-static inline __u32 xfs_do_div(void *a, __u32 b, int n)
-{
- __u32 mod;
-
- switch (n) {
- case 4:
- mod = *(__u32 *)a % b;
- *(__u32 *)a = *(__u32 *)a / b;
- return mod;
- case 8:
- mod = do_div(*(__u64 *)a, b);
- return mod;
- }
-
- /* NOTREACHED */
- return 0;
-}
-
-/* Side effect free 64 bit mod operation */
-static inline __u32 xfs_do_mod(void *a, __u32 b, int n)
-{
- switch (n) {
- case 4:
- return *(__u32 *)a % b;
- case 8:
- {
- __u64 c = *(__u64 *)a;
- return do_div(c, b);
- }
- }
-
- /* NOTREACHED */
- return 0;
-}
-#endif
-
-#undef do_div
-#define do_div(a, b) xfs_do_div(&(a), (b), sizeof(a))
-#define do_mod(a, b) xfs_do_mod(&(a), (b), sizeof(a))
-
-static inline __uint64_t roundup_64(__uint64_t x, __uint32_t y)
-{
- x += y - 1;
- do_div(x, y);
- return(x * y);
-}
-
-#endif /* __XFS_LINUX__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-/*
- * fs/xfs/linux/xfs_lrw.c (Linux Read Write stuff)
- *
- */
-
-#include "xfs.h"
-
-#include "xfs_fs.h"
-#include "xfs_inum.h"
-#include "xfs_log.h"
-#include "xfs_trans.h"
-#include "xfs_sb.h"
-#include "xfs_ag.h"
-#include "xfs_dir.h"
-#include "xfs_dir2.h"
-#include "xfs_alloc.h"
-#include "xfs_dmapi.h"
-#include "xfs_quota.h"
-#include "xfs_mount.h"
-#include "xfs_alloc_btree.h"
-#include "xfs_bmap_btree.h"
-#include "xfs_ialloc_btree.h"
-#include "xfs_btree.h"
-#include "xfs_ialloc.h"
-#include "xfs_attr_sf.h"
-#include "xfs_dir_sf.h"
-#include "xfs_dir2_sf.h"
-#include "xfs_dinode.h"
-#include "xfs_inode.h"
-#include "xfs_bmap.h"
-#include "xfs_bit.h"
-#include "xfs_rtalloc.h"
-#include "xfs_error.h"
-#include "xfs_itable.h"
-#include "xfs_rw.h"
-#include "xfs_acl.h"
-#include "xfs_cap.h"
-#include "xfs_mac.h"
-#include "xfs_attr.h"
-#include "xfs_inode_item.h"
-#include "xfs_buf_item.h"
-#include "xfs_utils.h"
-#include "xfs_iomap.h"
-
-#include <linux/capability.h>
-
-
-#if defined(XFS_RW_TRACE)
-void
-xfs_rw_enter_trace(
- int tag,
- xfs_iocore_t *io,
- const struct iovec *iovp,
- size_t segs,
- loff_t offset,
- int ioflags)
-{
- xfs_inode_t *ip = XFS_IO_INODE(io);
-
- if (ip->i_rwtrace == NULL)
- return;
- ktrace_enter(ip->i_rwtrace,
- (void *)(unsigned long)tag,
- (void *)ip,
- (void *)((unsigned long)((ip->i_d.di_size >> 32) & 0xffffffff)),
- (void *)((unsigned long)(ip->i_d.di_size & 0xffffffff)),
- (void *)(__psint_t)iovp,
- (void *)((unsigned long)segs),
- (void *)((unsigned long)((offset >> 32) & 0xffffffff)),
- (void *)((unsigned long)(offset & 0xffffffff)),
- (void *)((unsigned long)ioflags),
- (void *)((unsigned long)((io->io_new_size >> 32) & 0xffffffff)),
- (void *)((unsigned long)(io->io_new_size & 0xffffffff)),
- (void *)NULL,
- (void *)NULL,
- (void *)NULL,
- (void *)NULL,
- (void *)NULL);
-}
-
-void
-xfs_inval_cached_trace(
- xfs_iocore_t *io,
- xfs_off_t offset,
- xfs_off_t len,
- xfs_off_t first,
- xfs_off_t last)
-{
- xfs_inode_t *ip = XFS_IO_INODE(io);
-
- if (ip->i_rwtrace == NULL)
- return;
- ktrace_enter(ip->i_rwtrace,
- (void *)(__psint_t)XFS_INVAL_CACHED,
- (void *)ip,
- (void *)((unsigned long)((offset >> 32) & 0xffffffff)),
- (void *)((unsigned long)(offset & 0xffffffff)),
- (void *)((unsigned long)((len >> 32) & 0xffffffff)),
- (void *)((unsigned long)(len & 0xffffffff)),
- (void *)((unsigned long)((first >> 32) & 0xffffffff)),
- (void *)((unsigned long)(first & 0xffffffff)),
- (void *)((unsigned long)((last >> 32) & 0xffffffff)),
- (void *)((unsigned long)(last & 0xffffffff)),
- (void *)NULL,
- (void *)NULL,
- (void *)NULL,
- (void *)NULL,
- (void *)NULL,
- (void *)NULL);
-}
-#endif
-
-/*
- * xfs_iozero
- *
- * xfs_iozero clears the specified range of buffer supplied,
- * and marks all the affected blocks as valid and modified. If
- * an affected block is not allocated, it will be allocated. If
- * an affected block is not completely overwritten, and is not
- * valid before the operation, it will be read from disk before
- * being partially zeroed.
- */
-STATIC int
-xfs_iozero(
- struct inode *ip, /* inode */
- loff_t pos, /* offset in file */
- size_t count, /* size of data to zero */
- loff_t end_size) /* max file size to set */
-{
- unsigned bytes;
- struct page *page;
- struct address_space *mapping;
- char *kaddr;
- int status;
-
- mapping = ip->i_mapping;
- do {
- unsigned long index, offset;
-
- offset = (pos & (PAGE_CACHE_SIZE -1)); /* Within page */
- index = pos >> PAGE_CACHE_SHIFT;
- bytes = PAGE_CACHE_SIZE - offset;
- if (bytes > count)
- bytes = count;
-
- status = -ENOMEM;
- page = grab_cache_page(mapping, index);
- if (!page)
- break;
-
- kaddr = kmap(page);
- status = mapping->a_ops->prepare_write(NULL, page, offset,
- offset + bytes);
- if (status) {
- goto unlock;
- }
-
- memset((void *) (kaddr + offset), 0, bytes);
- flush_dcache_page(page);
- status = mapping->a_ops->commit_write(NULL, page, offset,
- offset + bytes);
- if (!status) {
- pos += bytes;
- count -= bytes;
- if (pos > i_size_read(ip))
- i_size_write(ip, pos < end_size ? pos : end_size);
- }
-
-unlock:
- kunmap(page);
- unlock_page(page);
- page_cache_release(page);
- if (status)
- break;
- } while (count);
-
- return (-status);
-}
-
-/*
- * xfs_inval_cached_pages
- *
- * This routine is responsible for keeping direct I/O and buffered I/O
- * somewhat coherent. From here we make sure that we're at least
- * temporarily holding the inode I/O lock exclusively and then call
- * the page cache to flush and invalidate any cached pages. If there
- * are no cached pages this routine will be very quick.
- */
-void
-xfs_inval_cached_pages(
- vnode_t *vp,
- xfs_iocore_t *io,
- xfs_off_t offset,
- int write,
- int relock)
-{
- xfs_mount_t *mp;
-
- if (!VN_CACHED(vp)) {
- return;
- }
-
- mp = io->io_mount;
-
- /*
- * We need to get the I/O lock exclusively in order
- * to safely invalidate pages and mappings.
- */
- if (relock) {
- XFS_IUNLOCK(mp, io, XFS_IOLOCK_SHARED);
- XFS_ILOCK(mp, io, XFS_IOLOCK_EXCL);
- }
-
- /* Writing beyond EOF creates a hole that must be zeroed */
- if (write && (offset > XFS_SIZE(mp, io))) {
- xfs_fsize_t isize;
-
- XFS_ILOCK(mp, io, XFS_ILOCK_EXCL|XFS_EXTSIZE_RD);
- isize = XFS_SIZE(mp, io);
- if (offset > isize) {
- xfs_zero_eof(vp, io, offset, isize, offset);
- }
- XFS_IUNLOCK(mp, io, XFS_ILOCK_EXCL|XFS_EXTSIZE_RD);
- }
-
- xfs_inval_cached_trace(io, offset, -1, ctooff(offtoct(offset)), -1);
- VOP_FLUSHINVAL_PAGES(vp, ctooff(offtoct(offset)), -1, FI_REMAPF_LOCKED);
- if (relock) {
- XFS_ILOCK_DEMOTE(mp, io, XFS_IOLOCK_EXCL);
- }
-}
-
-ssize_t /* bytes read, or (-) error */
-xfs_read(
- bhv_desc_t *bdp,
- struct kiocb *iocb,
- const struct iovec *iovp,
- unsigned int segs,
- loff_t *offset,
- int ioflags,
- cred_t *credp)
-{
- struct file *file = iocb->ki_filp;
- size_t size = 0;
- ssize_t ret;
- xfs_fsize_t n;
- xfs_inode_t *ip;
- xfs_mount_t *mp;
- vnode_t *vp;
- unsigned long seg;
-
- ip = XFS_BHVTOI(bdp);
- vp = BHV_TO_VNODE(bdp);
- mp = ip->i_mount;
-
- XFS_STATS_INC(xs_read_calls);
-
- /* START copy & waste from filemap.c */
- for (seg = 0; seg < segs; seg++) {
- const struct iovec *iv = &iovp[seg];
-
- /*
- * If any segment has a negative length, or the cumulative
- * length ever wraps negative then return -EINVAL.
- */
- size += iv->iov_len;
- if (unlikely((ssize_t)(size|iv->iov_len) < 0))
- return XFS_ERROR(-EINVAL);
- }
- /* END copy & waste from filemap.c */
-
- if (ioflags & IO_ISDIRECT) {
- xfs_buftarg_t *target =
- (ip->i_d.di_flags & XFS_DIFLAG_REALTIME) ?
- mp->m_rtdev_targp : mp->m_ddev_targp;
- if ((*offset & target->pbr_smask) ||
- (size & target->pbr_smask)) {
- if (*offset == ip->i_d.di_size) {
- return (0);
- }
- return -XFS_ERROR(EINVAL);
- }
- }
-
- n = XFS_MAXIOFFSET(mp) - *offset;
- if ((n <= 0) || (size == 0))
- return 0;
-
- if (n < size)
- size = n;
-
- if (XFS_FORCED_SHUTDOWN(mp)) {
- return -EIO;
- }
-
- /* OK so we are holding the I/O lock for the duration
- * of the submission, then what happens if the I/O
- * does not really happen here, but is scheduled
- * later?
- */
- xfs_ilock(ip, XFS_IOLOCK_SHARED);
-
- if (DM_EVENT_ENABLED(vp->v_vfsp, ip, DM_EVENT_READ) &&
- !(ioflags & IO_INVIS)) {
- vrwlock_t locktype = VRWLOCK_READ;
-
- ret = XFS_SEND_DATA(mp, DM_EVENT_READ,
- BHV_TO_VNODE(bdp), *offset, size,
- FILP_DELAY_FLAG(file), &locktype);
- if (ret) {
- xfs_iunlock(ip, XFS_IOLOCK_SHARED);
- return -ret;
- }
- }
-
- xfs_rw_enter_trace(XFS_READ_ENTER, &ip->i_iocore,
- iovp, segs, *offset, ioflags);
- ret = __generic_file_aio_read(iocb, iovp, segs, offset);
- xfs_iunlock(ip, XFS_IOLOCK_SHARED);
-
- if (ret > 0)
- XFS_STATS_ADD(xs_read_bytes, ret);
-
- if (likely(!(ioflags & IO_INVIS)))
- xfs_ichgtime(ip, XFS_ICHGTIME_ACC);
-
- return ret;
-}
-
-ssize_t
-xfs_sendfile(
- bhv_desc_t *bdp,
- struct file *filp,
- loff_t *offset,
- int ioflags,
- size_t count,
- read_actor_t actor,
- void *target,
- cred_t *credp)
-{
- ssize_t ret;
- xfs_fsize_t n;
- xfs_inode_t *ip;
- xfs_mount_t *mp;
- vnode_t *vp;
-
- ip = XFS_BHVTOI(bdp);
- vp = BHV_TO_VNODE(bdp);
- mp = ip->i_mount;
-
- XFS_STATS_INC(xs_read_calls);
-
- n = XFS_MAXIOFFSET(mp) - *offset;
- if ((n <= 0) || (count == 0))
- return 0;
-
- if (n < count)
- count = n;
-
- if (XFS_FORCED_SHUTDOWN(ip->i_mount))
- return -EIO;
-
- xfs_ilock(ip, XFS_IOLOCK_SHARED);
-
- if (DM_EVENT_ENABLED(vp->v_vfsp, ip, DM_EVENT_READ) &&
- (!(ioflags & IO_INVIS))) {
- vrwlock_t locktype = VRWLOCK_READ;
- int error;
-
- error = XFS_SEND_DATA(mp, DM_EVENT_READ, BHV_TO_VNODE(bdp), *offset, count,
- FILP_DELAY_FLAG(filp), &locktype);
- if (error) {
- xfs_iunlock(ip, XFS_IOLOCK_SHARED);
- return -error;
- }
- }
- xfs_rw_enter_trace(XFS_SENDFILE_ENTER, &ip->i_iocore,
- target, count, *offset, ioflags);
- ret = generic_file_sendfile(filp, offset, count, actor, target);
- xfs_iunlock(ip, XFS_IOLOCK_SHARED);
-
- XFS_STATS_ADD(xs_read_bytes, ret);
- xfs_ichgtime(ip, XFS_ICHGTIME_ACC);
- return ret;
-}
-
-/*
- * This routine is called to handle zeroing any space in the last
- * block of the file that is beyond the EOF. We do this since the
- * size is being increased without writing anything to that block
- * and we don't want anyone to read the garbage on the disk.
- */
-STATIC int /* error (positive) */
-xfs_zero_last_block(
- struct inode *ip,
- xfs_iocore_t *io,
- xfs_off_t offset,
- xfs_fsize_t isize,
- xfs_fsize_t end_size)
-{
- xfs_fileoff_t last_fsb;
- xfs_mount_t *mp;
- int nimaps;
- int zero_offset;
- int zero_len;
- int isize_fsb_offset;
- int error = 0;
- xfs_bmbt_irec_t imap;
- loff_t loff;
- size_t lsize;
-
- ASSERT(ismrlocked(io->io_lock, MR_UPDATE) != 0);
- ASSERT(offset > isize);
-
- mp = io->io_mount;
-
- isize_fsb_offset = XFS_B_FSB_OFFSET(mp, isize);
- if (isize_fsb_offset == 0) {
- /*
- * There are no extra bytes in the last block on disk to
- * zero, so return.
- */
- return 0;
- }
-
- last_fsb = XFS_B_TO_FSBT(mp, isize);
- nimaps = 1;
- error = XFS_BMAPI(mp, NULL, io, last_fsb, 1, 0, NULL, 0, &imap,
- &nimaps, NULL);
- if (error) {
- return error;
- }
- ASSERT(nimaps > 0);
- /*
- * If the block underlying isize is just a hole, then there
- * is nothing to zero.
- */
- if (imap.br_startblock == HOLESTARTBLOCK) {
- return 0;
- }
- /*
- * Zero the part of the last block beyond the EOF, and write it
- * out sync. We need to drop the ilock while we do this so we
- * don't deadlock when the buffer cache calls back to us.
- */
- XFS_IUNLOCK(mp, io, XFS_ILOCK_EXCL| XFS_EXTSIZE_RD);
- loff = XFS_FSB_TO_B(mp, last_fsb);
- lsize = XFS_FSB_TO_B(mp, 1);
-
- zero_offset = isize_fsb_offset;
- zero_len = mp->m_sb.sb_blocksize - isize_fsb_offset;
-
- error = xfs_iozero(ip, loff + zero_offset, zero_len, end_size);
-
- XFS_ILOCK(mp, io, XFS_ILOCK_EXCL|XFS_EXTSIZE_RD);
- ASSERT(error >= 0);
- return error;
-}
-
-/*
- * Zero any on disk space between the current EOF and the new,
- * larger EOF. This handles the normal case of zeroing the remainder
- * of the last block in the file and the unusual case of zeroing blocks
- * out beyond the size of the file. This second case only happens
- * with fixed size extents and when the system crashes before the inode
- * size was updated but after blocks were allocated. If fill is set,
- * then any holes in the range are filled and zeroed. If not, the holes
- * are left alone as holes.
- */
-
-int /* error (positive) */
-xfs_zero_eof(
- vnode_t *vp,
- xfs_iocore_t *io,
- xfs_off_t offset, /* starting I/O offset */
- xfs_fsize_t isize, /* current inode size */
- xfs_fsize_t end_size) /* terminal inode size */
-{
- struct inode *ip = LINVFS_GET_IP(vp);
- xfs_fileoff_t start_zero_fsb;
- xfs_fileoff_t end_zero_fsb;
- xfs_fileoff_t prev_zero_fsb;
- xfs_fileoff_t zero_count_fsb;
- xfs_fileoff_t last_fsb;
- xfs_extlen_t buf_len_fsb;
- xfs_extlen_t prev_zero_count;
- xfs_mount_t *mp;
- int nimaps;
- int error = 0;
- xfs_bmbt_irec_t imap;
- loff_t loff;
- size_t lsize;
-
- ASSERT(ismrlocked(io->io_lock, MR_UPDATE));
- ASSERT(ismrlocked(io->io_iolock, MR_UPDATE));
-
- mp = io->io_mount;
-
- /*
- * First handle zeroing the block on which isize resides.
- * We only zero a part of that block so it is handled specially.
- */
- error = xfs_zero_last_block(ip, io, offset, isize, end_size);
- if (error) {
- ASSERT(ismrlocked(io->io_lock, MR_UPDATE));
- ASSERT(ismrlocked(io->io_iolock, MR_UPDATE));
- return error;
- }
-
- /*
- * Calculate the range between the new size and the old
- * where blocks needing to be zeroed may exist. To get the
- * block where the last byte in the file currently resides,
- * we need to subtract one from the size and truncate back
- * to a block boundary. We subtract 1 in case the size is
- * exactly on a block boundary.
- */
- last_fsb = isize ? XFS_B_TO_FSBT(mp, isize - 1) : (xfs_fileoff_t)-1;
- start_zero_fsb = XFS_B_TO_FSB(mp, (xfs_ufsize_t)isize);
- end_zero_fsb = XFS_B_TO_FSBT(mp, offset - 1);
- ASSERT((xfs_sfiloff_t)last_fsb < (xfs_sfiloff_t)start_zero_fsb);
- if (last_fsb == end_zero_fsb) {
- /*
- * The size was only incremented on its last block.
- * We took care of that above, so just return.
- */
- return 0;
- }
-
- ASSERT(start_zero_fsb <= end_zero_fsb);
- prev_zero_fsb = NULLFILEOFF;
- prev_zero_count = 0;
- while (start_zero_fsb <= end_zero_fsb) {
- nimaps = 1;
- zero_count_fsb = end_zero_fsb - start_zero_fsb + 1;
- error = XFS_BMAPI(mp, NULL, io, start_zero_fsb, zero_count_fsb,
- 0, NULL, 0, &imap, &nimaps, NULL);
- if (error) {
- ASSERT(ismrlocked(io->io_lock, MR_UPDATE));
- ASSERT(ismrlocked(io->io_iolock, MR_UPDATE));
- return error;
- }
- ASSERT(nimaps > 0);
-
- if (imap.br_state == XFS_EXT_UNWRITTEN ||
- imap.br_startblock == HOLESTARTBLOCK) {
- /*
- * This loop handles initializing pages that were
- * partially initialized by the code below this
- * loop. It basically zeroes the part of the page
- * that sits on a hole and sets the page as P_HOLE
- * and calls remapf if it is a mapped file.
- */
- prev_zero_fsb = NULLFILEOFF;
- prev_zero_count = 0;
- start_zero_fsb = imap.br_startoff +
- imap.br_blockcount;
- ASSERT(start_zero_fsb <= (end_zero_fsb + 1));
- continue;
- }
-
- /*
- * There are blocks in the range requested.
- * Zero them a single write at a time. We actually
- * don't zero the entire range returned if it is
- * too big and simply loop around to get the rest.
- * That is not the most efficient thing to do, but it
- * is simple and this path should not be exercised often.
- */
- buf_len_fsb = XFS_FILBLKS_MIN(imap.br_blockcount,
- mp->m_writeio_blocks << 8);
- /*
- * Drop the inode lock while we're doing the I/O.
- * We'll still have the iolock to protect us.
- */
- XFS_IUNLOCK(mp, io, XFS_ILOCK_EXCL|XFS_EXTSIZE_RD);
-
- loff = XFS_FSB_TO_B(mp, start_zero_fsb);
- lsize = XFS_FSB_TO_B(mp, buf_len_fsb);
-
- error = xfs_iozero(ip, loff, lsize, end_size);
-
- if (error) {
- goto out_lock;
- }
-
- prev_zero_fsb = start_zero_fsb;
- prev_zero_count = buf_len_fsb;
- start_zero_fsb = imap.br_startoff + buf_len_fsb;
- ASSERT(start_zero_fsb <= (end_zero_fsb + 1));
-
- XFS_ILOCK(mp, io, XFS_ILOCK_EXCL|XFS_EXTSIZE_RD);
- }
-
- return 0;
-
-out_lock:
-
- XFS_ILOCK(mp, io, XFS_ILOCK_EXCL|XFS_EXTSIZE_RD);
- ASSERT(error >= 0);
- return error;
-}
-
-ssize_t /* bytes written, or (-) error */
-xfs_write(
- bhv_desc_t *bdp,
- struct kiocb *iocb,
- const struct iovec *iovp,
- unsigned int segs,
- loff_t *offset,
- int ioflags,
- cred_t *credp)
-{
- struct file *file = iocb->ki_filp;
- size_t size = 0;
- xfs_inode_t *xip;
- xfs_mount_t *mp;
- ssize_t ret;
- int error = 0;
- xfs_fsize_t isize, new_size;
- xfs_fsize_t n, limit;
- xfs_iocore_t *io;
- vnode_t *vp;
- unsigned long seg;
- int iolock;
- int eventsent = 0;
- vrwlock_t locktype;
-
- XFS_STATS_INC(xs_write_calls);
-
- vp = BHV_TO_VNODE(bdp);
- xip = XFS_BHVTOI(bdp);
-
- /* START copy & waste from filemap.c */
- for (seg = 0; seg < segs; seg++) {
- const struct iovec *iv = &iovp[seg];
-
- /*
- * If any segment has a negative length, or the cumulative
- * length ever wraps negative then return -EINVAL.
- */
- size += iv->iov_len;
- if (unlikely((ssize_t)(size|iv->iov_len) < 0))
- return XFS_ERROR(-EINVAL);
- }
- /* END copy & waste from filemap.c */
-
- if (size == 0)
- return 0;
-
- io = &xip->i_iocore;
- mp = io->io_mount;
-
- if (XFS_FORCED_SHUTDOWN(mp)) {
- return -EIO;
- }
-
- if (ioflags & IO_ISDIRECT) {
- xfs_buftarg_t *target =
- (xip->i_d.di_flags & XFS_DIFLAG_REALTIME) ?
- mp->m_rtdev_targp : mp->m_ddev_targp;
-
- if ((*offset & target->pbr_smask) ||
- (size & target->pbr_smask)) {
- return XFS_ERROR(-EINVAL);
- }
- iolock = XFS_IOLOCK_SHARED;
- locktype = VRWLOCK_WRITE_DIRECT;
- } else {
- iolock = XFS_IOLOCK_EXCL;
- locktype = VRWLOCK_WRITE;
- }
-
- xfs_ilock(xip, XFS_ILOCK_EXCL|iolock);
-
- isize = xip->i_d.di_size;
- limit = XFS_MAXIOFFSET(mp);
-
- if (file->f_flags & O_APPEND)
- *offset = isize;
-
-start:
- n = limit - *offset;
- if (n <= 0) {
- xfs_iunlock(xip, XFS_ILOCK_EXCL|iolock);
- return -EFBIG;
- }
-
- if (n < size)
- size = n;
-
- new_size = *offset + size;
- if (new_size > isize) {
- io->io_new_size = new_size;
- }
-
- if ((DM_EVENT_ENABLED(vp->v_vfsp, xip, DM_EVENT_WRITE) &&
- !(ioflags & IO_INVIS) && !eventsent)) {
- loff_t savedsize = *offset;
- int dmflags = FILP_DELAY_FLAG(file) | DM_SEM_FLAG_RD(ioflags);
-
- xfs_iunlock(xip, XFS_ILOCK_EXCL);
- error = XFS_SEND_DATA(xip->i_mount, DM_EVENT_WRITE, vp,
- *offset, size,
- dmflags, &locktype);
- if (error) {
- xfs_iunlock(xip, iolock);
- return -error;
- }
- xfs_ilock(xip, XFS_ILOCK_EXCL);
- eventsent = 1;
-
- /*
- * The iolock was dropped and reaquired in XFS_SEND_DATA
- * so we have to recheck the size when appending.
- * We will only "goto start;" once, since having sent the
- * event prevents another call to XFS_SEND_DATA, which is
- * what allows the size to change in the first place.
- */
- if ((file->f_flags & O_APPEND) &&
- savedsize != xip->i_d.di_size) {
- *offset = isize = xip->i_d.di_size;
- goto start;
- }
- }
-
- /*
- * On Linux, generic_file_write updates the times even if
- * no data is copied in so long as the write had a size.
- *
- * We must update xfs' times since revalidate will overcopy xfs.
- */
- if (size && !(ioflags & IO_INVIS))
- xfs_ichgtime(xip, XFS_ICHGTIME_MOD | XFS_ICHGTIME_CHG);
-
- /*
- * If the offset is beyond the size of the file, we have a couple
- * of things to do. First, if there is already space allocated
- * we need to either create holes or zero the disk or ...
- *
- * If there is a page where the previous size lands, we need
- * to zero it out up to the new size.
- */
-
- if (!(ioflags & IO_ISDIRECT) && (*offset > isize && isize)) {
- error = xfs_zero_eof(BHV_TO_VNODE(bdp), io, *offset,
- isize, *offset + size);
- if (error) {
- xfs_iunlock(xip, XFS_ILOCK_EXCL|iolock);
- return(-error);
- }
- }
- xfs_iunlock(xip, XFS_ILOCK_EXCL);
-
- /*
- * If we're writing the file then make sure to clear the
- * setuid and setgid bits if the process is not being run
- * by root. This keeps people from modifying setuid and
- * setgid binaries.
- */
-
- if (((xip->i_d.di_mode & S_ISUID) ||
- ((xip->i_d.di_mode & (S_ISGID | S_IXGRP)) ==
- (S_ISGID | S_IXGRP))) &&
- !capable(CAP_FSETID)) {
- error = xfs_write_clear_setuid(xip);
- if (error) {
- xfs_iunlock(xip, iolock);
- return -error;
- }
- }
-
-retry:
- if (ioflags & IO_ISDIRECT) {
- xfs_inval_cached_pages(vp, io, *offset, 1, 1);
- xfs_rw_enter_trace(XFS_DIOWR_ENTER,
- io, iovp, segs, *offset, ioflags);
- } else {
- xfs_rw_enter_trace(XFS_WRITE_ENTER,
- io, iovp, segs, *offset, ioflags);
- }
- ret = generic_file_aio_write_nolock(iocb, iovp, segs, offset);
-
- if ((ret == -ENOSPC) &&
- DM_EVENT_ENABLED(vp->v_vfsp, xip, DM_EVENT_NOSPACE) &&
- !(ioflags & IO_INVIS)) {
-
- xfs_rwunlock(bdp, locktype);
- error = XFS_SEND_NAMESP(xip->i_mount, DM_EVENT_NOSPACE, vp,
- DM_RIGHT_NULL, vp, DM_RIGHT_NULL, NULL, NULL,
- 0, 0, 0); /* Delay flag intentionally unused */
- if (error)
- return -error;
- xfs_rwlock(bdp, locktype);
- *offset = xip->i_d.di_size;
- goto retry;
- }
-
- if (*offset > xip->i_d.di_size) {
- xfs_ilock(xip, XFS_ILOCK_EXCL);
- if (*offset > xip->i_d.di_size) {
- struct inode *inode = LINVFS_GET_IP(vp);
-
- xip->i_d.di_size = *offset;
- i_size_write(inode, *offset);
- xip->i_update_core = 1;
- xip->i_update_size = 1;
- }
- xfs_iunlock(xip, XFS_ILOCK_EXCL);
- }
-
- if (ret <= 0) {
- xfs_rwunlock(bdp, locktype);
- return ret;
- }
-
- XFS_STATS_ADD(xs_write_bytes, ret);
-
- /* Handle various SYNC-type writes */
- if ((file->f_flags & O_SYNC) || IS_SYNC(file->f_dentry->d_inode)) {
-
- /*
- * If we're treating this as O_DSYNC and we have not updated the
- * size, force the log.
- */
-
- if (!(mp->m_flags & XFS_MOUNT_OSYNCISOSYNC)
- && !(xip->i_update_size)) {
- /*
- * If an allocation transaction occurred
- * without extending the size, then we have to force
- * the log up the proper point to ensure that the
- * allocation is permanent. We can't count on
- * the fact that buffered writes lock out direct I/O
- * writes - the direct I/O write could have extended
- * the size nontransactionally, then finished before
- * we started. xfs_write_file will think that the file
- * didn't grow but the update isn't safe unless the
- * size change is logged.
- *
- * Force the log if we've committed a transaction
- * against the inode or if someone else has and
- * the commit record hasn't gone to disk (e.g.
- * the inode is pinned). This guarantees that
- * all changes affecting the inode are permanent
- * when we return.
- */
-
- xfs_inode_log_item_t *iip;
- xfs_lsn_t lsn;
-
- iip = xip->i_itemp;
- if (iip && iip->ili_last_lsn) {
- lsn = iip->ili_last_lsn;
- xfs_log_force(mp, lsn,
- XFS_LOG_FORCE | XFS_LOG_SYNC);
- } else if (xfs_ipincount(xip) > 0) {
- xfs_log_force(mp, (xfs_lsn_t)0,
- XFS_LOG_FORCE | XFS_LOG_SYNC);
- }
-
- } else {
- xfs_trans_t *tp;
-
- /*
- * O_SYNC or O_DSYNC _with_ a size update are handled
- * the same way.
- *
- * If the write was synchronous then we need to make
- * sure that the inode modification time is permanent.
- * We'll have updated the timestamp above, so here
- * we use a synchronous transaction to log the inode.
- * It's not fast, but it's necessary.
- *
- * If this a dsync write and the size got changed
- * non-transactionally, then we need to ensure that
- * the size change gets logged in a synchronous
- * transaction.
- */
-
- tp = xfs_trans_alloc(mp, XFS_TRANS_WRITE_SYNC);
- if ((error = xfs_trans_reserve(tp, 0,
- XFS_SWRITE_LOG_RES(mp),
- 0, 0, 0))) {
- /* Transaction reserve failed */
- xfs_trans_cancel(tp, 0);
- } else {
- /* Transaction reserve successful */
- xfs_ilock(xip, XFS_ILOCK_EXCL);
- xfs_trans_ijoin(tp, xip, XFS_ILOCK_EXCL);
- xfs_trans_ihold(tp, xip);
- xfs_trans_log_inode(tp, xip, XFS_ILOG_CORE);
- xfs_trans_set_sync(tp);
- error = xfs_trans_commit(tp, 0, (xfs_lsn_t)0);
- xfs_iunlock(xip, XFS_ILOCK_EXCL);
- }
- }
- } /* (ioflags & O_SYNC) */
-
- xfs_rwunlock(bdp, locktype);
- return(ret);
-}
-
-/*
- * All xfs metadata buffers except log state machine buffers
- * get this attached as their b_bdstrat callback function.
- * This is so that we can catch a buffer
- * after prematurely unpinning it to forcibly shutdown the filesystem.
- */
-int
-xfs_bdstrat_cb(struct xfs_buf *bp)
-{
- xfs_mount_t *mp;
-
- mp = XFS_BUF_FSPRIVATE3(bp, xfs_mount_t *);
- if (!XFS_FORCED_SHUTDOWN(mp)) {
- pagebuf_iorequest(bp);
- return 0;
- } else {
- xfs_buftrace("XFS__BDSTRAT IOERROR", bp);
- /*
- * Metadata write that didn't get logged but
- * written delayed anyway. These aren't associated
- * with a transaction, and can be ignored.
- */
- if (XFS_BUF_IODONE_FUNC(bp) == NULL &&
- (XFS_BUF_ISREAD(bp)) == 0)
- return (xfs_bioerror_relse(bp));
- else
- return (xfs_bioerror(bp));
- }
-}
-
-
-int
-xfs_bmap(bhv_desc_t *bdp,
- xfs_off_t offset,
- ssize_t count,
- int flags,
- xfs_iomap_t *iomapp,
- int *niomaps)
-{
- xfs_inode_t *ip = XFS_BHVTOI(bdp);
- xfs_iocore_t *io = &ip->i_iocore;
-
- ASSERT((ip->i_d.di_mode & S_IFMT) == S_IFREG);
- ASSERT(((ip->i_d.di_flags & XFS_DIFLAG_REALTIME) != 0) ==
- ((ip->i_iocore.io_flags & XFS_IOCORE_RT) != 0));
-
- return xfs_iomap(io, offset, count, flags, iomapp, niomaps);
-}
-
-/*
- * Wrapper around bdstrat so that we can stop data
- * from going to disk in case we are shutting down the filesystem.
- * Typically user data goes thru this path; one of the exceptions
- * is the superblock.
- */
-int
-xfsbdstrat(
- struct xfs_mount *mp,
- struct xfs_buf *bp)
-{
- ASSERT(mp);
- if (!XFS_FORCED_SHUTDOWN(mp)) {
- /* Grio redirection would go here
- * if (XFS_BUF_IS_GRIO(bp)) {
- */
-
- pagebuf_iorequest(bp);
- return 0;
- }
-
- xfs_buftrace("XFSBDSTRAT IOERROR", bp);
- return (xfs_bioerror_relse(bp));
-}
-
-/*
- * If the underlying (data/log/rt) device is readonly, there are some
- * operations that cannot proceed.
- */
-int
-xfs_dev_is_read_only(
- xfs_mount_t *mp,
- char *message)
-{
- if (xfs_readonly_buftarg(mp->m_ddev_targp) ||
- xfs_readonly_buftarg(mp->m_logdev_targp) ||
- (mp->m_rtdev_targp && xfs_readonly_buftarg(mp->m_rtdev_targp))) {
- cmn_err(CE_NOTE,
- "XFS: %s required on read-only device.", message);
- cmn_err(CE_NOTE,
- "XFS: write access unavailable, cannot proceed.");
- return EROFS;
- }
- return 0;
-}
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_LRW_H__
-#define __XFS_LRW_H__
-
-struct vnode;
-struct bhv_desc;
-struct xfs_mount;
-struct xfs_iocore;
-struct xfs_inode;
-struct xfs_bmbt_irec;
-struct xfs_buf;
-struct xfs_iomap;
-
-#if defined(XFS_RW_TRACE)
-/*
- * Defines for the trace mechanisms in xfs_lrw.c.
- */
-#define XFS_RW_KTRACE_SIZE 128
-
-#define XFS_READ_ENTER 1
-#define XFS_WRITE_ENTER 2
-#define XFS_IOMAP_READ_ENTER 3
-#define XFS_IOMAP_WRITE_ENTER 4
-#define XFS_IOMAP_READ_MAP 5
-#define XFS_IOMAP_WRITE_MAP 6
-#define XFS_IOMAP_WRITE_NOSPACE 7
-#define XFS_ITRUNC_START 8
-#define XFS_ITRUNC_FINISH1 9
-#define XFS_ITRUNC_FINISH2 10
-#define XFS_CTRUNC1 11
-#define XFS_CTRUNC2 12
-#define XFS_CTRUNC3 13
-#define XFS_CTRUNC4 14
-#define XFS_CTRUNC5 15
-#define XFS_CTRUNC6 16
-#define XFS_BUNMAPI 17
-#define XFS_INVAL_CACHED 18
-#define XFS_DIORD_ENTER 19
-#define XFS_DIOWR_ENTER 20
-#define XFS_SENDFILE_ENTER 21
-#define XFS_WRITEPAGE_ENTER 22
-#define XFS_RELEASEPAGE_ENTER 23
-#define XFS_IOMAP_ALLOC_ENTER 24
-#define XFS_IOMAP_ALLOC_MAP 25
-#define XFS_IOMAP_UNWRITTEN 26
-extern void xfs_rw_enter_trace(int, struct xfs_iocore *,
- const struct iovec *, size_t, loff_t, int);
-extern void xfs_inval_cached_trace(struct xfs_iocore *,
- xfs_off_t, xfs_off_t, xfs_off_t, xfs_off_t);
-#else
-#define xfs_rw_enter_trace(tag, io, iovec, segs, offset, ioflags)
-#define xfs_inval_cached_trace(io, offset, len, first, last)
-#endif
-
-/*
- * Maximum count of bmaps used by read and write paths.
- */
-#define XFS_MAX_RW_NBMAPS 4
-
-extern int xfs_bmap(struct bhv_desc *, xfs_off_t, ssize_t, int,
- struct xfs_iomap *, int *);
-extern int xfsbdstrat(struct xfs_mount *, struct xfs_buf *);
-extern int xfs_bdstrat_cb(struct xfs_buf *);
-
-extern int xfs_zero_eof(struct vnode *, struct xfs_iocore *, xfs_off_t,
- xfs_fsize_t, xfs_fsize_t);
-extern void xfs_inval_cached_pages(struct vnode *, struct xfs_iocore *,
- xfs_off_t, int, int);
-extern ssize_t xfs_read(struct bhv_desc *, struct kiocb *,
- const struct iovec *, unsigned int,
- loff_t *, int, struct cred *);
-extern ssize_t xfs_write(struct bhv_desc *, struct kiocb *,
- const struct iovec *, unsigned int,
- loff_t *, int, struct cred *);
-extern ssize_t xfs_sendfile(struct bhv_desc *, struct file *,
- loff_t *, int, size_t, read_actor_t,
- void *, struct cred *);
-
-extern int xfs_dev_is_read_only(struct xfs_mount *, char *);
-
-#define XFS_FSB_TO_DB_IO(io,fsb) \
- (((io)->io_flags & XFS_IOCORE_RT) ? \
- XFS_FSB_TO_BB((io)->io_mount, (fsb)) : \
- XFS_FSB_TO_DADDR((io)->io_mount, (fsb)))
-
-#endif /* __XFS_LRW_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-#include <linux/proc_fs.h>
-
-DEFINE_PER_CPU(struct xfsstats, xfsstats);
-
-STATIC int
-xfs_read_xfsstats(
- char *buffer,
- char **start,
- off_t offset,
- int count,
- int *eof,
- void *data)
-{
- int c, i, j, len, val;
- __uint64_t xs_xstrat_bytes = 0;
- __uint64_t xs_write_bytes = 0;
- __uint64_t xs_read_bytes = 0;
-
- static struct xstats_entry {
- char *desc;
- int endpoint;
- } xstats[] = {
- { "extent_alloc", XFSSTAT_END_EXTENT_ALLOC },
- { "abt", XFSSTAT_END_ALLOC_BTREE },
- { "blk_map", XFSSTAT_END_BLOCK_MAPPING },
- { "bmbt", XFSSTAT_END_BLOCK_MAP_BTREE },
- { "dir", XFSSTAT_END_DIRECTORY_OPS },
- { "trans", XFSSTAT_END_TRANSACTIONS },
- { "ig", XFSSTAT_END_INODE_OPS },
- { "log", XFSSTAT_END_LOG_OPS },
- { "push_ail", XFSSTAT_END_TAIL_PUSHING },
- { "xstrat", XFSSTAT_END_WRITE_CONVERT },
- { "rw", XFSSTAT_END_READ_WRITE_OPS },
- { "attr", XFSSTAT_END_ATTRIBUTE_OPS },
- { "icluster", XFSSTAT_END_INODE_CLUSTER },
- { "vnodes", XFSSTAT_END_VNODE_OPS },
- { "buf", XFSSTAT_END_BUF },
- };
-
- /* Loop over all stats groups */
- for (i=j=len = 0; i < sizeof(xstats)/sizeof(struct xstats_entry); i++) {
- len += sprintf(buffer + len, xstats[i].desc);
- /* inner loop does each group */
- while (j < xstats[i].endpoint) {
- val = 0;
- /* sum over all cpus */
- for (c = 0; c < NR_CPUS; c++) {
- if (!cpu_possible(c)) continue;
- val += *(((__u32*)&per_cpu(xfsstats, c) + j));
- }
- len += sprintf(buffer + len, " %u", val);
- j++;
- }
- buffer[len++] = '\n';
- }
- /* extra precision counters */
- for (i = 0; i < NR_CPUS; i++) {
- if (!cpu_possible(i)) continue;
- xs_xstrat_bytes += per_cpu(xfsstats, i).xs_xstrat_bytes;
- xs_write_bytes += per_cpu(xfsstats, i).xs_write_bytes;
- xs_read_bytes += per_cpu(xfsstats, i).xs_read_bytes;
- }
-
- len += sprintf(buffer + len, "xpc %Lu %Lu %Lu\n",
- xs_xstrat_bytes, xs_write_bytes, xs_read_bytes);
- len += sprintf(buffer + len, "debug %u\n",
-#if defined(XFSDEBUG)
- 1);
-#else
- 0);
-#endif
-
- if (offset >= len) {
- *start = buffer;
- *eof = 1;
- return 0;
- }
- *start = buffer + offset;
- if ((len -= offset) > count)
- return count;
- *eof = 1;
-
- return len;
-}
-
-void
-xfs_init_procfs(void)
-{
- if (!proc_mkdir("fs/xfs", 0))
- return;
- create_proc_read_entry("fs/xfs/stat", 0, 0, xfs_read_xfsstats, NULL);
-}
-
-void
-xfs_cleanup_procfs(void)
-{
- remove_proc_entry("fs/xfs/stat", NULL);
- remove_proc_entry("fs/xfs", NULL);
-}
+++ /dev/null
-/*
- * Copyright (c) 2000 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_STATS_H__
-#define __XFS_STATS_H__
-
-
-#if defined(CONFIG_PROC_FS) && !defined(XFS_STATS_OFF)
-
-#include <linux/percpu.h>
-
-/*
- * XFS global statistics
- */
-struct xfsstats {
-# define XFSSTAT_END_EXTENT_ALLOC 4
- __uint32_t xs_allocx;
- __uint32_t xs_allocb;
- __uint32_t xs_freex;
- __uint32_t xs_freeb;
-# define XFSSTAT_END_ALLOC_BTREE (XFSSTAT_END_EXTENT_ALLOC+4)
- __uint32_t xs_abt_lookup;
- __uint32_t xs_abt_compare;
- __uint32_t xs_abt_insrec;
- __uint32_t xs_abt_delrec;
-# define XFSSTAT_END_BLOCK_MAPPING (XFSSTAT_END_ALLOC_BTREE+7)
- __uint32_t xs_blk_mapr;
- __uint32_t xs_blk_mapw;
- __uint32_t xs_blk_unmap;
- __uint32_t xs_add_exlist;
- __uint32_t xs_del_exlist;
- __uint32_t xs_look_exlist;
- __uint32_t xs_cmp_exlist;
-# define XFSSTAT_END_BLOCK_MAP_BTREE (XFSSTAT_END_BLOCK_MAPPING+4)
- __uint32_t xs_bmbt_lookup;
- __uint32_t xs_bmbt_compare;
- __uint32_t xs_bmbt_insrec;
- __uint32_t xs_bmbt_delrec;
-# define XFSSTAT_END_DIRECTORY_OPS (XFSSTAT_END_BLOCK_MAP_BTREE+4)
- __uint32_t xs_dir_lookup;
- __uint32_t xs_dir_create;
- __uint32_t xs_dir_remove;
- __uint32_t xs_dir_getdents;
-# define XFSSTAT_END_TRANSACTIONS (XFSSTAT_END_DIRECTORY_OPS+3)
- __uint32_t xs_trans_sync;
- __uint32_t xs_trans_async;
- __uint32_t xs_trans_empty;
-# define XFSSTAT_END_INODE_OPS (XFSSTAT_END_TRANSACTIONS+7)
- __uint32_t xs_ig_attempts;
- __uint32_t xs_ig_found;
- __uint32_t xs_ig_frecycle;
- __uint32_t xs_ig_missed;
- __uint32_t xs_ig_dup;
- __uint32_t xs_ig_reclaims;
- __uint32_t xs_ig_attrchg;
-# define XFSSTAT_END_LOG_OPS (XFSSTAT_END_INODE_OPS+5)
- __uint32_t xs_log_writes;
- __uint32_t xs_log_blocks;
- __uint32_t xs_log_noiclogs;
- __uint32_t xs_log_force;
- __uint32_t xs_log_force_sleep;
-# define XFSSTAT_END_TAIL_PUSHING (XFSSTAT_END_LOG_OPS+10)
- __uint32_t xs_try_logspace;
- __uint32_t xs_sleep_logspace;
- __uint32_t xs_push_ail;
- __uint32_t xs_push_ail_success;
- __uint32_t xs_push_ail_pushbuf;
- __uint32_t xs_push_ail_pinned;
- __uint32_t xs_push_ail_locked;
- __uint32_t xs_push_ail_flushing;
- __uint32_t xs_push_ail_restarts;
- __uint32_t xs_push_ail_flush;
-# define XFSSTAT_END_WRITE_CONVERT (XFSSTAT_END_TAIL_PUSHING+2)
- __uint32_t xs_xstrat_quick;
- __uint32_t xs_xstrat_split;
-# define XFSSTAT_END_READ_WRITE_OPS (XFSSTAT_END_WRITE_CONVERT+2)
- __uint32_t xs_write_calls;
- __uint32_t xs_read_calls;
-# define XFSSTAT_END_ATTRIBUTE_OPS (XFSSTAT_END_READ_WRITE_OPS+4)
- __uint32_t xs_attr_get;
- __uint32_t xs_attr_set;
- __uint32_t xs_attr_remove;
- __uint32_t xs_attr_list;
-# define XFSSTAT_END_INODE_CLUSTER (XFSSTAT_END_ATTRIBUTE_OPS+3)
- __uint32_t xs_iflush_count;
- __uint32_t xs_icluster_flushcnt;
- __uint32_t xs_icluster_flushinode;
-# define XFSSTAT_END_VNODE_OPS (XFSSTAT_END_INODE_CLUSTER+8)
- __uint32_t vn_active; /* # vnodes not on free lists */
- __uint32_t vn_alloc; /* # times vn_alloc called */
- __uint32_t vn_get; /* # times vn_get called */
- __uint32_t vn_hold; /* # times vn_hold called */
- __uint32_t vn_rele; /* # times vn_rele called */
- __uint32_t vn_reclaim; /* # times vn_reclaim called */
- __uint32_t vn_remove; /* # times vn_remove called */
- __uint32_t vn_free; /* # times vn_free called */
-#define XFSSTAT_END_BUF (XFSSTAT_END_VNODE_OPS+9)
- __uint32_t pb_get;
- __uint32_t pb_create;
- __uint32_t pb_get_locked;
- __uint32_t pb_get_locked_waited;
- __uint32_t pb_busy_locked;
- __uint32_t pb_miss_locked;
- __uint32_t pb_page_retries;
- __uint32_t pb_page_found;
- __uint32_t pb_get_read;
-/* Extra precision counters */
- __uint64_t xs_xstrat_bytes;
- __uint64_t xs_write_bytes;
- __uint64_t xs_read_bytes;
-};
-
-DECLARE_PER_CPU(struct xfsstats, xfsstats);
-
-/* We don't disable preempt, not too worried about poking the
- * wrong cpu's stat for now */
-#define XFS_STATS_INC(count) (__get_cpu_var(xfsstats).count++)
-#define XFS_STATS_DEC(count) (__get_cpu_var(xfsstats).count--)
-#define XFS_STATS_ADD(count, inc) (__get_cpu_var(xfsstats).count += (inc))
-
-extern void xfs_init_procfs(void);
-extern void xfs_cleanup_procfs(void);
-
-
-#else /* !CONFIG_PROC_FS */
-
-# define XFS_STATS_INC(count)
-# define XFS_STATS_DEC(count)
-# define XFS_STATS_ADD(count, inc)
-
-static __inline void xfs_init_procfs(void) { };
-static __inline void xfs_cleanup_procfs(void) { };
-
-#endif /* !CONFIG_PROC_FS */
-
-#endif /* __XFS_STATS_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-
-#include "xfs_inum.h"
-#include "xfs_log.h"
-#include "xfs_clnt.h"
-#include "xfs_trans.h"
-#include "xfs_sb.h"
-#include "xfs_dir.h"
-#include "xfs_dir2.h"
-#include "xfs_alloc.h"
-#include "xfs_dmapi.h"
-#include "xfs_quota.h"
-#include "xfs_mount.h"
-#include "xfs_alloc_btree.h"
-#include "xfs_bmap_btree.h"
-#include "xfs_ialloc_btree.h"
-#include "xfs_btree.h"
-#include "xfs_ialloc.h"
-#include "xfs_attr_sf.h"
-#include "xfs_dir_sf.h"
-#include "xfs_dir2_sf.h"
-#include "xfs_dinode.h"
-#include "xfs_inode.h"
-#include "xfs_bmap.h"
-#include "xfs_bit.h"
-#include "xfs_rtalloc.h"
-#include "xfs_error.h"
-#include "xfs_itable.h"
-#include "xfs_rw.h"
-#include "xfs_acl.h"
-#include "xfs_cap.h"
-#include "xfs_mac.h"
-#include "xfs_attr.h"
-#include "xfs_buf_item.h"
-#include "xfs_utils.h"
-#include "xfs_version.h"
-
-#include <linux/namei.h>
-#include <linux/init.h>
-#include <linux/mount.h>
-#include <linux/suspend.h>
-
-STATIC struct quotactl_ops linvfs_qops;
-STATIC struct super_operations linvfs_sops;
-STATIC struct export_operations linvfs_export_ops;
-STATIC kmem_cache_t * linvfs_inode_cachep;
-
-STATIC struct xfs_mount_args *
-xfs_args_allocate(
- struct super_block *sb)
-{
- struct xfs_mount_args *args;
-
- args = kmem_zalloc(sizeof(struct xfs_mount_args), KM_SLEEP);
- args->logbufs = args->logbufsize = -1;
- strncpy(args->fsname, sb->s_id, MAXNAMELEN);
-
- /* Copy the already-parsed mount(2) flags we're interested in */
- if (sb->s_flags & MS_NOATIME)
- args->flags |= XFSMNT_NOATIME;
-
- /* Default to 32 bit inodes on Linux all the time */
- args->flags |= XFSMNT_32BITINODES;
-
- return args;
-}
-
-__uint64_t
-xfs_max_file_offset(
- unsigned int blockshift)
-{
- unsigned int pagefactor = 1;
- unsigned int bitshift = BITS_PER_LONG - 1;
-
- /* Figure out maximum filesize, on Linux this can depend on
- * the filesystem blocksize (on 32 bit platforms).
- * __block_prepare_write does this in an [unsigned] long...
- * page->index << (PAGE_CACHE_SHIFT - bbits)
- * So, for page sized blocks (4K on 32 bit platforms),
- * this wraps at around 8Tb (hence MAX_LFS_FILESIZE which is
- * (((u64)PAGE_CACHE_SIZE << (BITS_PER_LONG-1))-1)
- * but for smaller blocksizes it is less (bbits = log2 bsize).
- * Note1: get_block_t takes a long (implicit cast from above)
- * Note2: The Large Block Device (LBD and HAVE_SECTOR_T) patch
- * can optionally convert the [unsigned] long from above into
- * an [unsigned] long long.
- */
-
-#if BITS_PER_LONG == 32
-# if defined(CONFIG_LBD)
- ASSERT(sizeof(sector_t) == 8);
- pagefactor = PAGE_CACHE_SIZE;
- bitshift = BITS_PER_LONG;
-# else
- pagefactor = PAGE_CACHE_SIZE >> (PAGE_CACHE_SHIFT - blockshift);
-# endif
-#endif
-
- return (((__uint64_t)pagefactor) << bitshift) - 1;
-}
-
-STATIC __inline__ void
-xfs_set_inodeops(
- struct inode *inode)
-{
- vnode_t *vp = LINVFS_GET_VP(inode);
-
- if (vp->v_type == VNON) {
- make_bad_inode(inode);
- } else if (S_ISREG(inode->i_mode)) {
- inode->i_op = &linvfs_file_inode_operations;
- inode->i_fop = &linvfs_file_operations;
- inode->i_mapping->a_ops = &linvfs_aops;
- } else if (S_ISDIR(inode->i_mode)) {
- inode->i_op = &linvfs_dir_inode_operations;
- inode->i_fop = &linvfs_dir_operations;
- } else if (S_ISLNK(inode->i_mode)) {
- inode->i_op = &linvfs_symlink_inode_operations;
- if (inode->i_blocks)
- inode->i_mapping->a_ops = &linvfs_aops;
- } else {
- inode->i_op = &linvfs_file_inode_operations;
- init_special_inode(inode, inode->i_mode, inode->i_rdev);
- }
-}
-
-STATIC __inline__ void
-xfs_revalidate_inode(
- xfs_mount_t *mp,
- vnode_t *vp,
- xfs_inode_t *ip)
-{
- struct inode *inode = LINVFS_GET_IP(vp);
-
- inode->i_mode = (ip->i_d.di_mode & MODEMASK) | VTTOIF(vp->v_type);
- inode->i_nlink = ip->i_d.di_nlink;
- inode->i_uid = ip->i_d.di_uid;
- inode->i_gid = ip->i_d.di_gid;
- if (((1 << vp->v_type) & ((1<<VBLK) | (1<<VCHR))) == 0) {
- inode->i_rdev = 0;
- } else {
- xfs_dev_t dev = ip->i_df.if_u2.if_rdev;
- inode->i_rdev = MKDEV(sysv_major(dev) & 0x1ff, sysv_minor(dev));
- }
- inode->i_blksize = PAGE_CACHE_SIZE;
- inode->i_generation = ip->i_d.di_gen;
- i_size_write(inode, ip->i_d.di_size);
- inode->i_blocks =
- XFS_FSB_TO_BB(mp, ip->i_d.di_nblocks + ip->i_delayed_blks);
- inode->i_atime.tv_sec = ip->i_d.di_atime.t_sec;
- inode->i_atime.tv_nsec = ip->i_d.di_atime.t_nsec;
- inode->i_mtime.tv_sec = ip->i_d.di_mtime.t_sec;
- inode->i_mtime.tv_nsec = ip->i_d.di_mtime.t_nsec;
- inode->i_ctime.tv_sec = ip->i_d.di_ctime.t_sec;
- inode->i_ctime.tv_nsec = ip->i_d.di_ctime.t_nsec;
- if (ip->i_d.di_flags & XFS_DIFLAG_IMMUTABLE)
- inode->i_flags |= S_IMMUTABLE;
- else
- inode->i_flags &= ~S_IMMUTABLE;
- if (ip->i_d.di_flags & XFS_DIFLAG_APPEND)
- inode->i_flags |= S_APPEND;
- else
- inode->i_flags &= ~S_APPEND;
- if (ip->i_d.di_flags & XFS_DIFLAG_SYNC)
- inode->i_flags |= S_SYNC;
- else
- inode->i_flags &= ~S_SYNC;
- if (ip->i_d.di_flags & XFS_DIFLAG_NOATIME)
- inode->i_flags |= S_NOATIME;
- else
- inode->i_flags &= ~S_NOATIME;
- vp->v_flag &= ~VMODIFIED;
-}
-
-void
-xfs_initialize_vnode(
- bhv_desc_t *bdp,
- vnode_t *vp,
- bhv_desc_t *inode_bhv,
- int unlock)
-{
- xfs_inode_t *ip = XFS_BHVTOI(inode_bhv);
- struct inode *inode = LINVFS_GET_IP(vp);
-
- if (!inode_bhv->bd_vobj) {
- vp->v_vfsp = bhvtovfs(bdp);
- bhv_desc_init(inode_bhv, ip, vp, &xfs_vnodeops);
- bhv_insert(VN_BHV_HEAD(vp), inode_bhv);
- }
-
- vp->v_type = IFTOVT(ip->i_d.di_mode);
-
- /* Have we been called during the new inode create process,
- * in which case we are too early to fill in the Linux inode.
- */
- if (vp->v_type == VNON)
- return;
-
- xfs_revalidate_inode(XFS_BHVTOM(bdp), vp, ip);
-
- /* For new inodes we need to set the ops vectors,
- * and unlock the inode.
- */
- if (unlock && (inode->i_state & I_NEW)) {
- xfs_set_inodeops(inode);
- unlock_new_inode(inode);
- }
-}
-
-void
-xfs_flush_inode(
- xfs_inode_t *ip)
-{
- struct inode *inode = LINVFS_GET_IP(XFS_ITOV(ip));
-
- filemap_flush(inode->i_mapping);
-}
-
-void
-xfs_flush_device(
- xfs_inode_t *ip)
-{
- sync_blockdev(XFS_ITOV(ip)->v_vfsp->vfs_super->s_bdev);
- xfs_log_force(ip->i_mount, (xfs_lsn_t)0, XFS_LOG_FORCE|XFS_LOG_SYNC);
-}
-
-int
-xfs_blkdev_get(
- xfs_mount_t *mp,
- const char *name,
- struct block_device **bdevp)
-{
- int error = 0;
-
- *bdevp = open_bdev_excl(name, 0, mp);
- if (IS_ERR(*bdevp)) {
- error = PTR_ERR(*bdevp);
- printk("XFS: Invalid device [%s], error=%d\n", name, error);
- }
-
- return -error;
-}
-
-void
-xfs_blkdev_put(
- struct block_device *bdev)
-{
- if (bdev)
- close_bdev_excl(bdev);
-}
-
-
-STATIC struct inode *
-linvfs_alloc_inode(
- struct super_block *sb)
-{
- vnode_t *vp;
-
- vp = (vnode_t *)kmem_cache_alloc(linvfs_inode_cachep,
- kmem_flags_convert(KM_SLEEP));
- if (!vp)
- return NULL;
- return LINVFS_GET_IP(vp);
-}
-
-STATIC void
-linvfs_destroy_inode(
- struct inode *inode)
-{
- kmem_cache_free(linvfs_inode_cachep, LINVFS_GET_VP(inode));
-}
-
-STATIC void
-init_once(
- void *data,
- kmem_cache_t *cachep,
- unsigned long flags)
-{
- vnode_t *vp = (vnode_t *)data;
-
- if ((flags & (SLAB_CTOR_VERIFY|SLAB_CTOR_CONSTRUCTOR)) ==
- SLAB_CTOR_CONSTRUCTOR)
- inode_init_once(LINVFS_GET_IP(vp));
-}
-
-STATIC int
-init_inodecache( void )
-{
- linvfs_inode_cachep = kmem_cache_create("linvfs_icache",
- sizeof(vnode_t), 0,
- SLAB_HWCACHE_ALIGN|SLAB_RECLAIM_ACCOUNT,
- init_once, NULL);
-
- if (linvfs_inode_cachep == NULL)
- return -ENOMEM;
- return 0;
-}
-
-STATIC void
-destroy_inodecache( void )
-{
- if (kmem_cache_destroy(linvfs_inode_cachep))
- printk(KERN_WARNING "%s: cache still in use!\n", __FUNCTION__);
-}
-
-/*
- * Attempt to flush the inode, this will actually fail
- * if the inode is pinned, but we dirty the inode again
- * at the point when it is unpinned after a log write,
- * since this is when the inode itself becomes flushable.
- */
-STATIC void
-linvfs_write_inode(
- struct inode *inode,
- int sync)
-{
- vnode_t *vp = LINVFS_GET_VP(inode);
- int error, flags = FLUSH_INODE;
-
- if (vp) {
- vn_trace_entry(vp, __FUNCTION__, (inst_t *)__return_address);
- if (sync)
- flags |= FLUSH_SYNC;
- VOP_IFLUSH(vp, flags, error);
- }
-}
-
-STATIC void
-linvfs_clear_inode(
- struct inode *inode)
-{
- vnode_t *vp = LINVFS_GET_VP(inode);
-
- if (vp) {
- vn_rele(vp);
- vn_trace_entry(vp, __FUNCTION__, (inst_t *)__return_address);
- /*
- * Do all our cleanup, and remove this vnode.
- */
- vn_remove(vp);
- }
-}
-
-
-#define SYNCD_FLAGS (SYNC_FSDATA|SYNC_BDFLUSH|SYNC_ATTR)
-
-STATIC int
-xfssyncd(
- void *arg)
-{
- vfs_t *vfsp = (vfs_t *) arg;
- int error;
-
- daemonize("xfssyncd");
-
- vfsp->vfs_sync_task = current;
- wmb();
- wake_up(&vfsp->vfs_wait_sync_task);
-
- for (;;) {
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(xfs_syncd_interval);
- /* swsusp */
- if (current->flags & PF_FREEZE)
- refrigerator(PF_FREEZE);
- if (vfsp->vfs_flag & VFS_UMOUNT)
- break;
- if (vfsp->vfs_flag & VFS_RDONLY)
- continue;
- VFS_SYNC(vfsp, SYNCD_FLAGS, NULL, error);
- }
-
- vfsp->vfs_sync_task = NULL;
- wmb();
- wake_up(&vfsp->vfs_wait_sync_task);
-
- return 0;
-}
-
-STATIC int
-linvfs_start_syncd(
- vfs_t *vfsp)
-{
- int pid;
-
- pid = kernel_thread(xfssyncd, (void *) vfsp,
- CLONE_VM | CLONE_FS | CLONE_FILES);
- if (pid < 0)
- return -pid;
- wait_event(vfsp->vfs_wait_sync_task, vfsp->vfs_sync_task);
- return 0;
-}
-
-STATIC void
-linvfs_stop_syncd(
- vfs_t *vfsp)
-{
- vfsp->vfs_flag |= VFS_UMOUNT;
- wmb();
-
- wake_up_process(vfsp->vfs_sync_task);
- wait_event(vfsp->vfs_wait_sync_task, !vfsp->vfs_sync_task);
-}
-
-STATIC void
-linvfs_put_super(
- struct super_block *sb)
-{
- vfs_t *vfsp = LINVFS_GET_VFS(sb);
- int error;
-
- linvfs_stop_syncd(vfsp);
- VFS_SYNC(vfsp, SYNC_ATTR|SYNC_DELWRI, NULL, error);
- if (!error)
- VFS_UNMOUNT(vfsp, 0, NULL, error);
- if (error) {
- printk("XFS unmount got error %d\n", error);
- printk("%s: vfsp/0x%p left dangling!\n", __FUNCTION__, vfsp);
- return;
- }
-
- vfs_deallocate(vfsp);
-}
-
-STATIC void
-linvfs_write_super(
- struct super_block *sb)
-{
- vfs_t *vfsp = LINVFS_GET_VFS(sb);
- int error;
-
- if (sb->s_flags & MS_RDONLY) {
- sb->s_dirt = 0; /* paranoia */
- return;
- }
- /* Push the log and superblock a little */
- VFS_SYNC(vfsp, SYNC_FSDATA, NULL, error);
- sb->s_dirt = 0;
-}
-
-STATIC int
-linvfs_sync_super(
- struct super_block *sb,
- int wait)
-{
- vfs_t *vfsp = LINVFS_GET_VFS(sb);
- int error;
- int flags = SYNC_FSDATA;
-
- if (wait)
- flags |= SYNC_WAIT;
-
- VFS_SYNC(vfsp, flags, NULL, error);
- sb->s_dirt = 0;
-
- return -error;
-}
-
-STATIC int
-linvfs_statfs(
- struct super_block *sb,
- struct kstatfs *statp)
-{
- vfs_t *vfsp = LINVFS_GET_VFS(sb);
- int error;
-
- VFS_STATVFS(vfsp, statp, NULL, error);
- return -error;
-}
-
-STATIC int
-linvfs_remount(
- struct super_block *sb,
- int *flags,
- char *options)
-{
- vfs_t *vfsp = LINVFS_GET_VFS(sb);
- struct xfs_mount_args *args = xfs_args_allocate(sb);
- int error;
-
- VFS_PARSEARGS(vfsp, options, args, 1, error);
- if (!error)
- VFS_MNTUPDATE(vfsp, flags, args, error);
- kmem_free(args, sizeof(*args));
- return -error;
-}
-
-STATIC void
-linvfs_freeze_fs(
- struct super_block *sb)
-{
- VFS_FREEZE(LINVFS_GET_VFS(sb));
-}
-
-STATIC struct dentry *
-linvfs_get_parent(
- struct dentry *child)
-{
- int error;
- vnode_t *vp, *cvp;
- struct dentry *parent;
- struct inode *ip = NULL;
- struct dentry dotdot;
-
- dotdot.d_name.name = "..";
- dotdot.d_name.len = 2;
- dotdot.d_inode = 0;
-
- cvp = NULL;
- vp = LINVFS_GET_VP(child->d_inode);
- VOP_LOOKUP(vp, &dotdot, &cvp, 0, NULL, NULL, error);
-
- if (!error) {
- ASSERT(cvp);
- ip = LINVFS_GET_IP(cvp);
- if (!ip) {
- VN_RELE(cvp);
- return ERR_PTR(-EACCES);
- }
- }
- if (error)
- return ERR_PTR(-error);
- parent = d_alloc_anon(ip);
- if (!parent) {
- VN_RELE(cvp);
- parent = ERR_PTR(-ENOMEM);
- }
- return parent;
-}
-
-STATIC struct dentry *
-linvfs_get_dentry(
- struct super_block *sb,
- void *data)
-{
- vnode_t *vp;
- struct inode *inode;
- struct dentry *result;
- xfs_fid2_t xfid;
- vfs_t *vfsp = LINVFS_GET_VFS(sb);
- int error;
-
- xfid.fid_len = sizeof(xfs_fid2_t) - sizeof(xfid.fid_len);
- xfid.fid_pad = 0;
- xfid.fid_gen = ((__u32 *)data)[1];
- xfid.fid_ino = ((__u32 *)data)[0];
-
- VFS_VGET(vfsp, &vp, (fid_t *)&xfid, error);
- if (error || vp == NULL)
- return ERR_PTR(-ESTALE) ;
-
- inode = LINVFS_GET_IP(vp);
- result = d_alloc_anon(inode);
- if (!result) {
- iput(inode);
- return ERR_PTR(-ENOMEM);
- }
- return result;
-}
-
-STATIC int
-linvfs_show_options(
- struct seq_file *m,
- struct vfsmount *mnt)
-{
- struct vfs *vfsp = LINVFS_GET_VFS(mnt->mnt_sb);
- int error;
-
- VFS_SHOWARGS(vfsp, m, error);
- return error;
-}
-
-STATIC int
-linvfs_getxstate(
- struct super_block *sb,
- struct fs_quota_stat *fqs)
-{
- struct vfs *vfsp = LINVFS_GET_VFS(sb);
- int error;
-
- VFS_QUOTACTL(vfsp, Q_XGETQSTAT, 0, (caddr_t)fqs, error);
- return -error;
-}
-
-STATIC int
-linvfs_setxstate(
- struct super_block *sb,
- unsigned int flags,
- int op)
-{
- struct vfs *vfsp = LINVFS_GET_VFS(sb);
- int error;
-
- VFS_QUOTACTL(vfsp, op, 0, (caddr_t)&flags, error);
- return -error;
-}
-
-STATIC int
-linvfs_getxquota(
- struct super_block *sb,
- int type,
- qid_t id,
- struct fs_disk_quota *fdq)
-{
- struct vfs *vfsp = LINVFS_GET_VFS(sb);
- int error, getmode;
-
- getmode = (type == GRPQUOTA) ? Q_XGETGQUOTA : Q_XGETQUOTA;
- VFS_QUOTACTL(vfsp, getmode, id, (caddr_t)fdq, error);
- return -error;
-}
-
-STATIC int
-linvfs_setxquota(
- struct super_block *sb,
- int type,
- qid_t id,
- struct fs_disk_quota *fdq)
-{
- struct vfs *vfsp = LINVFS_GET_VFS(sb);
- int error, setmode;
-
- setmode = (type == GRPQUOTA) ? Q_XSETGQLIM : Q_XSETQLIM;
- VFS_QUOTACTL(vfsp, setmode, id, (caddr_t)fdq, error);
- return -error;
-}
-
-STATIC int
-linvfs_fill_super(
- struct super_block *sb,
- void *data,
- int silent)
-{
- vnode_t *rootvp;
- struct vfs *vfsp = vfs_allocate();
- struct xfs_mount_args *args = xfs_args_allocate(sb);
- struct kstatfs statvfs;
- int error, error2;
-
- vfsp->vfs_super = sb;
- LINVFS_SET_VFS(sb, vfsp);
- if (sb->s_flags & MS_RDONLY)
- vfsp->vfs_flag |= VFS_RDONLY;
- bhv_insert_all_vfsops(vfsp);
-
- VFS_PARSEARGS(vfsp, (char *)data, args, 0, error);
- if (error) {
- bhv_remove_all_vfsops(vfsp, 1);
- goto fail_vfsop;
- }
-
- sb_min_blocksize(sb, BBSIZE);
- sb->s_export_op = &linvfs_export_ops;
- sb->s_qcop = &linvfs_qops;
- sb->s_op = &linvfs_sops;
-
- VFS_MOUNT(vfsp, args, NULL, error);
- if (error) {
- bhv_remove_all_vfsops(vfsp, 1);
- goto fail_vfsop;
- }
-
- VFS_STATVFS(vfsp, &statvfs, NULL, error);
- if (error)
- goto fail_unmount;
-
- sb->s_dirt = 1;
- sb->s_magic = statvfs.f_type;
- sb->s_blocksize = statvfs.f_bsize;
- sb->s_blocksize_bits = ffs(statvfs.f_bsize) - 1;
- sb->s_maxbytes = xfs_max_file_offset(sb->s_blocksize_bits);
- set_posix_acl_flag(sb);
-
- VFS_ROOT(vfsp, &rootvp, error);
- if (error)
- goto fail_unmount;
-
- sb->s_root = d_alloc_root(LINVFS_GET_IP(rootvp));
- if (!sb->s_root) {
- error = ENOMEM;
- goto fail_vnrele;
- }
- if (is_bad_inode(sb->s_root->d_inode)) {
- error = EINVAL;
- goto fail_vnrele;
- }
- if ((error = linvfs_start_syncd(vfsp)))
- goto fail_vnrele;
- vn_trace_exit(rootvp, __FUNCTION__, (inst_t *)__return_address);
-
- kmem_free(args, sizeof(*args));
- return 0;
-
-fail_vnrele:
- if (sb->s_root) {
- dput(sb->s_root);
- sb->s_root = NULL;
- } else {
- VN_RELE(rootvp);
- }
-
-fail_unmount:
- VFS_UNMOUNT(vfsp, 0, NULL, error2);
-
-fail_vfsop:
- vfs_deallocate(vfsp);
- kmem_free(args, sizeof(*args));
- return -error;
-}
-
-STATIC struct super_block *
-linvfs_get_sb(
- struct file_system_type *fs_type,
- int flags,
- const char *dev_name,
- void *data)
-{
- return get_sb_bdev(fs_type, flags, dev_name, data, linvfs_fill_super);
-}
-
-
-STATIC struct export_operations linvfs_export_ops = {
- .get_parent = linvfs_get_parent,
- .get_dentry = linvfs_get_dentry,
-};
-
-STATIC struct super_operations linvfs_sops = {
- .alloc_inode = linvfs_alloc_inode,
- .destroy_inode = linvfs_destroy_inode,
- .write_inode = linvfs_write_inode,
- .clear_inode = linvfs_clear_inode,
- .put_super = linvfs_put_super,
- .write_super = linvfs_write_super,
- .sync_fs = linvfs_sync_super,
- .write_super_lockfs = linvfs_freeze_fs,
- .statfs = linvfs_statfs,
- .remount_fs = linvfs_remount,
- .show_options = linvfs_show_options,
-};
-
-STATIC struct quotactl_ops linvfs_qops = {
- .get_xstate = linvfs_getxstate,
- .set_xstate = linvfs_setxstate,
- .get_xquota = linvfs_getxquota,
- .set_xquota = linvfs_setxquota,
-};
-
-STATIC struct file_system_type xfs_fs_type = {
- .owner = THIS_MODULE,
- .name = "xfs",
- .get_sb = linvfs_get_sb,
- .kill_sb = kill_block_super,
- .fs_flags = FS_REQUIRES_DEV,
-};
-
-
-STATIC int __init
-init_xfs_fs( void )
-{
- int error;
- struct sysinfo si;
- static char message[] __initdata = KERN_INFO \
- XFS_VERSION_STRING " with " XFS_BUILD_OPTIONS " enabled\n";
-
- printk(message);
-
- si_meminfo(&si);
- xfs_physmem = si.totalram;
-
- ktrace_init(64);
-
- error = init_inodecache();
- if (error < 0)
- goto undo_inodecache;
-
- error = pagebuf_init();
- if (error < 0)
- goto undo_pagebuf;
-
- vn_init();
- xfs_init();
- uuid_init();
- vfs_initdmapi();
- vfs_initquota();
-
- error = register_filesystem(&xfs_fs_type);
- if (error)
- goto undo_register;
- return 0;
-
-undo_register:
- pagebuf_terminate();
-
-undo_pagebuf:
- destroy_inodecache();
-
-undo_inodecache:
- return error;
-}
-
-STATIC void __exit
-exit_xfs_fs( void )
-{
- vfs_exitquota();
- vfs_exitdmapi();
- unregister_filesystem(&xfs_fs_type);
- xfs_cleanup();
- pagebuf_terminate();
- destroy_inodecache();
- ktrace_uninit();
-}
-
-module_init(init_xfs_fs);
-module_exit(exit_xfs_fs);
-
-MODULE_AUTHOR("Silicon Graphics, Inc.");
-MODULE_DESCRIPTION(XFS_VERSION_STRING " with " XFS_BUILD_OPTIONS " enabled");
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_SUPER_H__
-#define __XFS_SUPER_H__
-
-#ifdef CONFIG_XFS_DMAPI
-# define vfs_insertdmapi(vfs) vfs_insertops(vfsp, &xfs_dmops)
-# define vfs_initdmapi() dmapi_init()
-# define vfs_exitdmapi() dmapi_uninit()
-#else
-# define vfs_insertdmapi(vfs) do { } while (0)
-# define vfs_initdmapi() do { } while (0)
-# define vfs_exitdmapi() do { } while (0)
-#endif
-
-#ifdef CONFIG_XFS_QUOTA
-# define vfs_insertquota(vfs) vfs_insertops(vfsp, &xfs_qmops)
-extern void xfs_qm_init(void);
-extern void xfs_qm_exit(void);
-# define vfs_initquota() xfs_qm_init()
-# define vfs_exitquota() xfs_qm_exit()
-#else
-# define vfs_insertquota(vfs) do { } while (0)
-# define vfs_initquota() do { } while (0)
-# define vfs_exitquota() do { } while (0)
-#endif
-
-#ifdef CONFIG_XFS_POSIX_ACL
-# define XFS_ACL_STRING "ACLs, "
-# define set_posix_acl_flag(sb) ((sb)->s_flags |= MS_POSIXACL)
-#else
-# define XFS_ACL_STRING
-# define set_posix_acl_flag(sb) do { } while (0)
-#endif
-
-#ifdef CONFIG_XFS_SECURITY
-# define XFS_SECURITY_STRING "security attributes, "
-# define ENOSECURITY 0
-#else
-# define XFS_SECURITY_STRING
-# define ENOSECURITY EOPNOTSUPP
-#endif
-
-#ifdef CONFIG_XFS_RT
-# define XFS_REALTIME_STRING "realtime, "
-#else
-# define XFS_REALTIME_STRING
-#endif
-
-#if XFS_BIG_BLKNOS
-# if XFS_BIG_INUMS
-# define XFS_BIGFS_STRING "large block/inode numbers, "
-# else
-# define XFS_BIGFS_STRING "large block numbers, "
-# endif
-#else
-# define XFS_BIGFS_STRING
-#endif
-
-#ifdef CONFIG_XFS_TRACE
-# define XFS_TRACE_STRING "tracing, "
-#else
-# define XFS_TRACE_STRING
-#endif
-
-#ifdef XFSDEBUG
-# define XFS_DBG_STRING "debug"
-#else
-# define XFS_DBG_STRING "no debug"
-#endif
-
-#define XFS_BUILD_OPTIONS XFS_ACL_STRING \
- XFS_SECURITY_STRING \
- XFS_REALTIME_STRING \
- XFS_BIGFS_STRING \
- XFS_TRACE_STRING \
- XFS_DBG_STRING /* DBG must be last */
-
-#define LINVFS_GET_VFS(s) \
- (vfs_t *)((s)->s_fs_info)
-#define LINVFS_SET_VFS(s, vfsp) \
- ((s)->s_fs_info = vfsp)
-
-struct xfs_inode;
-struct xfs_mount;
-struct xfs_buftarg;
-struct block_device;
-
-extern __uint64_t xfs_max_file_offset(unsigned int);
-
-extern void xfs_initialize_vnode(bhv_desc_t *, vnode_t *, bhv_desc_t *, int);
-
-extern void xfs_flush_inode(struct xfs_inode *);
-extern void xfs_flush_device(struct xfs_inode *);
-
-extern int xfs_blkdev_get(struct xfs_mount *, const char *,
- struct block_device **);
-extern void xfs_blkdev_put(struct block_device *);
-
-#endif /* __XFS_SUPER_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2001-2002 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-#include "xfs_rw.h"
-#include <linux/sysctl.h>
-#include <linux/proc_fs.h>
-
-
-static struct ctl_table_header *xfs_table_header;
-
-
-#ifdef CONFIG_PROC_FS
-STATIC int
-xfs_stats_clear_proc_handler(
- ctl_table *ctl,
- int write,
- struct file *filp,
- void *buffer,
- size_t *lenp)
-{
- int c, ret, *valp = ctl->data;
- __uint32_t vn_active;
-
- ret = proc_dointvec_minmax(ctl, write, filp, buffer, lenp);
-
- if (!ret && write && *valp) {
- printk("XFS Clearing xfsstats\n");
- for (c = 0; c < NR_CPUS; c++) {
- if (!cpu_possible(c)) continue;
- preempt_disable();
- /* save vn_active, it's a universal truth! */
- vn_active = per_cpu(xfsstats, c).vn_active;
- memset(&per_cpu(xfsstats, c), 0,
- sizeof(struct xfsstats));
- per_cpu(xfsstats, c).vn_active = vn_active;
- preempt_enable();
- }
- xfs_stats_clear = 0;
- }
-
- return ret;
-}
-#endif /* CONFIG_PROC_FS */
-
-STATIC ctl_table xfs_table[] = {
- {XFS_RESTRICT_CHOWN, "restrict_chown", &xfs_params.restrict_chown.val,
- sizeof(int), 0644, NULL, &proc_dointvec_minmax,
- &sysctl_intvec, NULL,
- &xfs_params.restrict_chown.min, &xfs_params.restrict_chown.max},
-
- {XFS_SGID_INHERIT, "irix_sgid_inherit", &xfs_params.sgid_inherit.val,
- sizeof(int), 0644, NULL, &proc_dointvec_minmax,
- &sysctl_intvec, NULL,
- &xfs_params.sgid_inherit.min, &xfs_params.sgid_inherit.max},
-
- {XFS_SYMLINK_MODE, "irix_symlink_mode", &xfs_params.symlink_mode.val,
- sizeof(int), 0644, NULL, &proc_dointvec_minmax,
- &sysctl_intvec, NULL,
- &xfs_params.symlink_mode.min, &xfs_params.symlink_mode.max},
-
- {XFS_PANIC_MASK, "panic_mask", &xfs_params.panic_mask.val,
- sizeof(int), 0644, NULL, &proc_dointvec_minmax,
- &sysctl_intvec, NULL,
- &xfs_params.panic_mask.min, &xfs_params.panic_mask.max},
-
- {XFS_ERRLEVEL, "error_level", &xfs_params.error_level.val,
- sizeof(int), 0644, NULL, &proc_dointvec_minmax,
- &sysctl_intvec, NULL,
- &xfs_params.error_level.min, &xfs_params.error_level.max},
-
- {XFS_SYNC_INTERVAL, "sync_interval", &xfs_params.sync_interval.val,
- sizeof(int), 0644, NULL, &proc_dointvec_minmax,
- &sysctl_intvec, NULL,
- &xfs_params.sync_interval.min, &xfs_params.sync_interval.max},
-
- {XFS_INHERIT_SYNC, "inherit_sync", &xfs_params.inherit_sync.val,
- sizeof(int), 0644, NULL, &proc_dointvec_minmax,
- &sysctl_intvec, NULL,
- &xfs_params.inherit_sync.min, &xfs_params.inherit_sync.max},
-
- {XFS_INHERIT_NODUMP, "inherit_nodump", &xfs_params.inherit_nodump.val,
- sizeof(int), 0644, NULL, &proc_dointvec_minmax,
- &sysctl_intvec, NULL,
- &xfs_params.inherit_nodump.min, &xfs_params.inherit_nodump.max},
-
- {XFS_INHERIT_NOATIME, "inherit_noatime", &xfs_params.inherit_noatim.val,
- sizeof(int), 0644, NULL, &proc_dointvec_minmax,
- &sysctl_intvec, NULL,
- &xfs_params.inherit_noatim.min, &xfs_params.inherit_noatim.max},
-
- {XFS_FLUSH_INTERVAL, "flush_interval", &xfs_params.flush_interval.val,
- sizeof(int), 0644, NULL, &proc_dointvec_minmax,
- &sysctl_intvec, NULL,
- &xfs_params.flush_interval.min, &xfs_params.flush_interval.max},
-
- {XFS_AGE_BUFFER, "age_buffer", &xfs_params.age_buffer.val,
- sizeof(int), 0644, NULL, &proc_dointvec_minmax,
- &sysctl_intvec, NULL,
- &xfs_params.age_buffer.min, &xfs_params.age_buffer.max},
-
- /* please keep this the last entry */
-#ifdef CONFIG_PROC_FS
- {XFS_STATS_CLEAR, "stats_clear", &xfs_params.stats_clear.val,
- sizeof(int), 0644, NULL, &xfs_stats_clear_proc_handler,
- &sysctl_intvec, NULL,
- &xfs_params.stats_clear.min, &xfs_params.stats_clear.max},
-#endif /* CONFIG_PROC_FS */
-
- {0}
-};
-
-STATIC ctl_table xfs_dir_table[] = {
- {FS_XFS, "xfs", NULL, 0, 0555, xfs_table},
- {0}
-};
-
-STATIC ctl_table xfs_root_table[] = {
- {CTL_FS, "fs", NULL, 0, 0555, xfs_dir_table},
- {0}
-};
-
-void
-xfs_sysctl_register(void)
-{
- xfs_table_header = register_sysctl_table(xfs_root_table, 1);
-}
-
-void
-xfs_sysctl_unregister(void)
-{
- if (xfs_table_header)
- unregister_sysctl_table(xfs_table_header);
-}
+++ /dev/null
-/*
- * Copyright (c) 2001-2002 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#ifndef __XFS_SYSCTL_H__
-#define __XFS_SYSCTL_H__
-
-#include <linux/sysctl.h>
-
-/*
- * Tunable xfs parameters
- */
-
-typedef struct xfs_sysctl_val {
- int min;
- int val;
- int max;
-} xfs_sysctl_val_t;
-
-typedef struct xfs_param {
- xfs_sysctl_val_t restrict_chown;/* Root/non-root can give away files.*/
- xfs_sysctl_val_t sgid_inherit; /* Inherit S_ISGID bit if process' GID
- * is not a member of the parent dir
- * GID */
- xfs_sysctl_val_t symlink_mode; /* Link creat mode affected by umask */
- xfs_sysctl_val_t panic_mask; /* bitmask to cause panic on errors. */
- xfs_sysctl_val_t error_level; /* Degree of reporting for problems */
- xfs_sysctl_val_t sync_interval; /* time between sync calls */
- xfs_sysctl_val_t stats_clear; /* Reset all XFS statistics to zero. */
- xfs_sysctl_val_t inherit_sync; /* Inherit the "sync" inode flag. */
- xfs_sysctl_val_t inherit_nodump;/* Inherit the "nodump" inode flag. */
- xfs_sysctl_val_t inherit_noatim;/* Inherit the "noatime" inode flag. */
- xfs_sysctl_val_t flush_interval;/* interval between runs of the
- * delwri flush daemon. */
- xfs_sysctl_val_t age_buffer; /* time for buffer to age before
- * we flush it. */
-} xfs_param_t;
-
-/*
- * xfs_error_level:
- *
- * How much error reporting will be done when internal problems are
- * encountered. These problems normally return an EFSCORRUPTED to their
- * caller, with no other information reported.
- *
- * 0 No error reports
- * 1 Report EFSCORRUPTED errors that will cause a filesystem shutdown
- * 5 Report all EFSCORRUPTED errors (all of the above errors, plus any
- * additional errors that are known to not cause shutdowns)
- *
- * xfs_panic_mask bit 0x8 turns the error reports into panics
- */
-
-enum {
- XFS_RESTRICT_CHOWN = 3,
- XFS_SGID_INHERIT = 4,
- XFS_SYMLINK_MODE = 5,
- XFS_PANIC_MASK = 6,
- XFS_ERRLEVEL = 7,
- XFS_SYNC_INTERVAL = 8,
- XFS_STATS_CLEAR = 12,
- XFS_INHERIT_SYNC = 13,
- XFS_INHERIT_NODUMP = 14,
- XFS_INHERIT_NOATIME = 15,
- XFS_FLUSH_INTERVAL = 16,
- XFS_AGE_BUFFER = 17,
-};
-
-extern xfs_param_t xfs_params;
-
-#ifdef CONFIG_SYSCTL
-extern void xfs_sysctl_register(void);
-extern void xfs_sysctl_unregister(void);
-#else
-# define xfs_sysctl_register() do { } while (0)
-# define xfs_sysctl_unregister() do { } while (0)
-#endif /* CONFIG_SYSCTL */
-
-#endif /* __XFS_SYSCTL_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2001-2002 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-/*
- * Dummy file that can contain a timestamp to put into the
- * XFS init string, to help users keep track of what they're
- * running
- */
-
-#ifndef __XFS_VERSION_H__
-#define __XFS_VERSION_H__
-
-#define XFS_VERSION_STRING "SGI XFS"
-
-#endif /* __XFS_VERSION_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-#include "xfs_fs.h"
-#include "xfs_macros.h"
-#include "xfs_inum.h"
-#include "xfs_log.h"
-#include "xfs_clnt.h"
-#include "xfs_trans.h"
-#include "xfs_sb.h"
-#include "xfs_ag.h"
-#include "xfs_dir.h"
-#include "xfs_dir2.h"
-#include "xfs_imap.h"
-#include "xfs_alloc.h"
-#include "xfs_dmapi.h"
-#include "xfs_mount.h"
-#include "xfs_quota.h"
-
-int
-vfs_mount(
- struct bhv_desc *bdp,
- struct xfs_mount_args *args,
- struct cred *cr)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_mount)
- next = BHV_NEXT(next);
- return ((*bhvtovfsops(next)->vfs_mount)(next, args, cr));
-}
-
-int
-vfs_parseargs(
- struct bhv_desc *bdp,
- char *s,
- struct xfs_mount_args *args,
- int f)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_parseargs)
- next = BHV_NEXT(next);
- return ((*bhvtovfsops(next)->vfs_parseargs)(next, s, args, f));
-}
-
-int
-vfs_showargs(
- struct bhv_desc *bdp,
- struct seq_file *m)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_showargs)
- next = BHV_NEXT(next);
- return ((*bhvtovfsops(next)->vfs_showargs)(next, m));
-}
-
-int
-vfs_unmount(
- struct bhv_desc *bdp,
- int fl,
- struct cred *cr)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_unmount)
- next = BHV_NEXT(next);
- return ((*bhvtovfsops(next)->vfs_unmount)(next, fl, cr));
-}
-
-int
-vfs_mntupdate(
- struct bhv_desc *bdp,
- int *fl,
- struct xfs_mount_args *args)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_mntupdate)
- next = BHV_NEXT(next);
- return ((*bhvtovfsops(next)->vfs_mntupdate)(next, fl, args));
-}
-
-int
-vfs_root(
- struct bhv_desc *bdp,
- struct vnode **vpp)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_root)
- next = BHV_NEXT(next);
- return ((*bhvtovfsops(next)->vfs_root)(next, vpp));
-}
-
-int
-vfs_statvfs(
- struct bhv_desc *bdp,
- xfs_statfs_t *sp,
- struct vnode *vp)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_statvfs)
- next = BHV_NEXT(next);
- return ((*bhvtovfsops(next)->vfs_statvfs)(next, sp, vp));
-}
-
-int
-vfs_sync(
- struct bhv_desc *bdp,
- int fl,
- struct cred *cr)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_sync)
- next = BHV_NEXT(next);
- return ((*bhvtovfsops(next)->vfs_sync)(next, fl, cr));
-}
-
-int
-vfs_vget(
- struct bhv_desc *bdp,
- struct vnode **vpp,
- struct fid *fidp)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_vget)
- next = BHV_NEXT(next);
- return ((*bhvtovfsops(next)->vfs_vget)(next, vpp, fidp));
-}
-
-int
-vfs_dmapiops(
- struct bhv_desc *bdp,
- caddr_t addr)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_dmapiops)
- next = BHV_NEXT(next);
- return ((*bhvtovfsops(next)->vfs_dmapiops)(next, addr));
-}
-
-int
-vfs_quotactl(
- struct bhv_desc *bdp,
- int cmd,
- int id,
- caddr_t addr)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_quotactl)
- next = BHV_NEXT(next);
- return ((*bhvtovfsops(next)->vfs_quotactl)(next, cmd, id, addr));
-}
-
-void
-vfs_init_vnode(
- struct bhv_desc *bdp,
- struct vnode *vp,
- struct bhv_desc *bp,
- int unlock)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_init_vnode)
- next = BHV_NEXT(next);
- ((*bhvtovfsops(next)->vfs_init_vnode)(next, vp, bp, unlock));
-}
-
-void
-vfs_force_shutdown(
- struct bhv_desc *bdp,
- int fl,
- char *file,
- int line)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_force_shutdown)
- next = BHV_NEXT(next);
- ((*bhvtovfsops(next)->vfs_force_shutdown)(next, fl, file, line));
-}
-
-void
-vfs_freeze(
- struct bhv_desc *bdp)
-{
- struct bhv_desc *next = bdp;
-
- ASSERT(next);
- while (! (bhvtovfsops(next))->vfs_freeze)
- next = BHV_NEXT(next);
- ((*bhvtovfsops(next)->vfs_freeze)(next));
-}
-
-vfs_t *
-vfs_allocate( void )
-{
- struct vfs *vfsp;
-
- vfsp = kmem_zalloc(sizeof(vfs_t), KM_SLEEP);
- bhv_head_init(VFS_BHVHEAD(vfsp), "vfs");
- init_waitqueue_head(&vfsp->vfs_wait_sync_task);
- return vfsp;
-}
-
-void
-vfs_deallocate(
- struct vfs *vfsp)
-{
- bhv_head_destroy(VFS_BHVHEAD(vfsp));
- kmem_free(vfsp, sizeof(vfs_t));
-}
-
-void
-vfs_insertops(
- struct vfs *vfsp,
- struct bhv_vfsops *vfsops)
-{
- struct bhv_desc *bdp;
-
- bdp = kmem_alloc(sizeof(struct bhv_desc), KM_SLEEP);
- bhv_desc_init(bdp, NULL, vfsp, vfsops);
- bhv_insert(&vfsp->vfs_bh, bdp);
-}
-
-void
-vfs_insertbhv(
- struct vfs *vfsp,
- struct bhv_desc *bdp,
- struct vfsops *vfsops,
- void *mount)
-{
- bhv_desc_init(bdp, mount, vfsp, vfsops);
- bhv_insert_initial(&vfsp->vfs_bh, bdp);
-}
-
-void
-bhv_remove_vfsops(
- struct vfs *vfsp,
- int pos)
-{
- struct bhv_desc *bhv;
-
- bhv = bhv_lookup_range(&vfsp->vfs_bh, pos, pos);
- if (!bhv)
- return;
- bhv_remove(&vfsp->vfs_bh, bhv);
- kmem_free(bhv, sizeof(*bhv));
-}
-
-void
-bhv_remove_all_vfsops(
- struct vfs *vfsp,
- int freebase)
-{
- struct xfs_mount *mp;
-
- bhv_remove_vfsops(vfsp, VFS_POSITION_QM);
- bhv_remove_vfsops(vfsp, VFS_POSITION_DM);
- if (!freebase)
- return;
- mp = XFS_BHVTOM(bhv_lookup(VFS_BHVHEAD(vfsp), &xfs_vfsops));
- VFS_REMOVEBHV(vfsp, &mp->m_bhv);
- xfs_mount_free(mp, 0);
-}
-
-void
-bhv_insert_all_vfsops(
- struct vfs *vfsp)
-{
- struct xfs_mount *mp;
-
- mp = xfs_mount_init();
- vfs_insertbhv(vfsp, &mp->m_bhv, &xfs_vfsops, mp);
- vfs_insertdmapi(vfsp);
- vfs_insertquota(vfsp);
-}
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-#ifndef __XFS_VFS_H__
-#define __XFS_VFS_H__
-
-#include <linux/vfs.h>
-#include "xfs_fs.h"
-
-struct fid;
-struct cred;
-struct vnode;
-struct kstatfs;
-struct seq_file;
-struct super_block;
-struct xfs_mount_args;
-
-typedef struct kstatfs xfs_statfs_t;
-
-typedef struct vfs {
- u_int vfs_flag; /* flags */
- xfs_fsid_t vfs_fsid; /* file system ID */
- xfs_fsid_t *vfs_altfsid; /* An ID fixed for life of FS */
- bhv_head_t vfs_bh; /* head of vfs behavior chain */
- struct super_block *vfs_super; /* Linux superblock structure */
- struct task_struct *vfs_sync_task;
- wait_queue_head_t vfs_wait_sync_task;
-} vfs_t;
-
-#define vfs_fbhv vfs_bh.bh_first /* 1st on vfs behavior chain */
-
-#define bhvtovfs(bdp) ( (struct vfs *)BHV_VOBJ(bdp) )
-#define bhvtovfsops(bdp) ( (struct vfsops *)BHV_OPS(bdp) )
-#define VFS_BHVHEAD(vfs) ( &(vfs)->vfs_bh )
-#define VFS_REMOVEBHV(vfs, bdp) ( bhv_remove(VFS_BHVHEAD(vfs), bdp) )
-
-#define VFS_POSITION_BASE BHV_POSITION_BASE /* chain bottom */
-#define VFS_POSITION_TOP BHV_POSITION_TOP /* chain top */
-#define VFS_POSITION_INVALID BHV_POSITION_INVALID /* invalid pos. num */
-
-typedef enum {
- VFS_BHV_UNKNOWN, /* not specified */
- VFS_BHV_XFS, /* xfs */
- VFS_BHV_DM, /* data migration */
- VFS_BHV_QM, /* quota manager */
- VFS_BHV_IO, /* IO path */
- VFS_BHV_END /* housekeeping end-of-range */
-} vfs_bhv_t;
-
-#define VFS_POSITION_XFS (BHV_POSITION_BASE)
-#define VFS_POSITION_DM (VFS_POSITION_BASE+10)
-#define VFS_POSITION_QM (VFS_POSITION_BASE+20)
-#define VFS_POSITION_IO (VFS_POSITION_BASE+30)
-
-#define VFS_RDONLY 0x0001 /* read-only vfs */
-#define VFS_GRPID 0x0002 /* group-ID assigned from directory */
-#define VFS_DMI 0x0004 /* filesystem has the DMI enabled */
-#define VFS_UMOUNT 0x0008 /* unmount in progress */
-#define VFS_END 0x0008 /* max flag */
-
-#define SYNC_ATTR 0x0001 /* sync attributes */
-#define SYNC_CLOSE 0x0002 /* close file system down */
-#define SYNC_DELWRI 0x0004 /* look at delayed writes */
-#define SYNC_WAIT 0x0008 /* wait for i/o to complete */
-#define SYNC_BDFLUSH 0x0010 /* BDFLUSH is calling -- don't block */
-#define SYNC_FSDATA 0x0020 /* flush fs data (e.g. superblocks) */
-#define SYNC_REFCACHE 0x0040 /* prune some of the nfs ref cache */
-#define SYNC_REMOUNT 0x0080 /* remount readonly, no dummy LRs */
-
-typedef int (*vfs_mount_t)(bhv_desc_t *,
- struct xfs_mount_args *, struct cred *);
-typedef int (*vfs_parseargs_t)(bhv_desc_t *, char *,
- struct xfs_mount_args *, int);
-typedef int (*vfs_showargs_t)(bhv_desc_t *, struct seq_file *);
-typedef int (*vfs_unmount_t)(bhv_desc_t *, int, struct cred *);
-typedef int (*vfs_mntupdate_t)(bhv_desc_t *, int *,
- struct xfs_mount_args *);
-typedef int (*vfs_root_t)(bhv_desc_t *, struct vnode **);
-typedef int (*vfs_statvfs_t)(bhv_desc_t *, xfs_statfs_t *, struct vnode *);
-typedef int (*vfs_sync_t)(bhv_desc_t *, int, struct cred *);
-typedef int (*vfs_vget_t)(bhv_desc_t *, struct vnode **, struct fid *);
-typedef int (*vfs_dmapiops_t)(bhv_desc_t *, caddr_t);
-typedef int (*vfs_quotactl_t)(bhv_desc_t *, int, int, caddr_t);
-typedef void (*vfs_init_vnode_t)(bhv_desc_t *,
- struct vnode *, bhv_desc_t *, int);
-typedef void (*vfs_force_shutdown_t)(bhv_desc_t *, int, char *, int);
-typedef void (*vfs_freeze_t)(bhv_desc_t *);
-
-typedef struct vfsops {
- bhv_position_t vf_position; /* behavior chain position */
- vfs_mount_t vfs_mount; /* mount file system */
- vfs_parseargs_t vfs_parseargs; /* parse mount options */
- vfs_showargs_t vfs_showargs; /* unparse mount options */
- vfs_unmount_t vfs_unmount; /* unmount file system */
- vfs_mntupdate_t vfs_mntupdate; /* update file system options */
- vfs_root_t vfs_root; /* get root vnode */
- vfs_statvfs_t vfs_statvfs; /* file system statistics */
- vfs_sync_t vfs_sync; /* flush files */
- vfs_vget_t vfs_vget; /* get vnode from fid */
- vfs_dmapiops_t vfs_dmapiops; /* data migration */
- vfs_quotactl_t vfs_quotactl; /* disk quota */
- vfs_init_vnode_t vfs_init_vnode; /* initialize a new vnode */
- vfs_force_shutdown_t vfs_force_shutdown; /* crash and burn */
- vfs_freeze_t vfs_freeze; /* freeze fs for snapshot */
-} vfsops_t;
-
-/*
- * VFS's. Operates on vfs structure pointers (starts at bhv head).
- */
-#define VHEAD(v) ((v)->vfs_fbhv)
-#define VFS_MOUNT(v, ma,cr, rv) ((rv) = vfs_mount(VHEAD(v), ma,cr))
-#define VFS_PARSEARGS(v, o,ma,f, rv) ((rv) = vfs_parseargs(VHEAD(v), o,ma,f))
-#define VFS_SHOWARGS(v, m, rv) ((rv) = vfs_showargs(VHEAD(v), m))
-#define VFS_UNMOUNT(v, f, cr, rv) ((rv) = vfs_unmount(VHEAD(v), f,cr))
-#define VFS_MNTUPDATE(v, fl, args, rv) ((rv) = vfs_mntupdate(VHEAD(v), fl, args))
-#define VFS_ROOT(v, vpp, rv) ((rv) = vfs_root(VHEAD(v), vpp))
-#define VFS_STATVFS(v, sp,vp, rv) ((rv) = vfs_statvfs(VHEAD(v), sp,vp))
-#define VFS_SYNC(v, flag,cr, rv) ((rv) = vfs_sync(VHEAD(v), flag,cr))
-#define VFS_VGET(v, vpp,fidp, rv) ((rv) = vfs_vget(VHEAD(v), vpp,fidp))
-#define VFS_DMAPIOPS(v, p, rv) ((rv) = vfs_dmapiops(VHEAD(v), p))
-#define VFS_QUOTACTL(v, c,id,p, rv) ((rv) = vfs_quotactl(VHEAD(v), c,id,p))
-#define VFS_INIT_VNODE(v, vp,b,ul) ( vfs_init_vnode(VHEAD(v), vp,b,ul) )
-#define VFS_FORCE_SHUTDOWN(v, fl,f,l) ( vfs_force_shutdown(VHEAD(v), fl,f,l) )
-#define VFS_FREEZE(v) ( vfs_freeze(VHEAD(v)) )
-
-/*
- * PVFS's. Operates on behavior descriptor pointers.
- */
-#define PVFS_MOUNT(b, ma,cr, rv) ((rv) = vfs_mount(b, ma,cr))
-#define PVFS_PARSEARGS(b, o,ma,f, rv) ((rv) = vfs_parseargs(b, o,ma,f))
-#define PVFS_SHOWARGS(b, m, rv) ((rv) = vfs_showargs(b, m))
-#define PVFS_UNMOUNT(b, f,cr, rv) ((rv) = vfs_unmount(b, f,cr))
-#define PVFS_MNTUPDATE(b, fl, args, rv) ((rv) = vfs_mntupdate(b, fl, args))
-#define PVFS_ROOT(b, vpp, rv) ((rv) = vfs_root(b, vpp))
-#define PVFS_STATVFS(b, sp,vp, rv) ((rv) = vfs_statvfs(b, sp,vp))
-#define PVFS_SYNC(b, flag,cr, rv) ((rv) = vfs_sync(b, flag,cr))
-#define PVFS_VGET(b, vpp,fidp, rv) ((rv) = vfs_vget(b, vpp,fidp))
-#define PVFS_DMAPIOPS(b, p, rv) ((rv) = vfs_dmapiops(b, p))
-#define PVFS_QUOTACTL(b, c,id,p, rv) ((rv) = vfs_quotactl(b, c,id,p))
-#define PVFS_INIT_VNODE(b, vp,b2,ul) ( vfs_init_vnode(b, vp,b2,ul) )
-#define PVFS_FORCE_SHUTDOWN(b, fl,f,l) ( vfs_force_shutdown(b, fl,f,l) )
-#define PVFS_FREEZE(b) ( vfs_freeze(b) )
-
-extern int vfs_mount(bhv_desc_t *, struct xfs_mount_args *, struct cred *);
-extern int vfs_parseargs(bhv_desc_t *, char *, struct xfs_mount_args *, int);
-extern int vfs_showargs(bhv_desc_t *, struct seq_file *);
-extern int vfs_unmount(bhv_desc_t *, int, struct cred *);
-extern int vfs_mntupdate(bhv_desc_t *, int *, struct xfs_mount_args *);
-extern int vfs_root(bhv_desc_t *, struct vnode **);
-extern int vfs_statvfs(bhv_desc_t *, xfs_statfs_t *, struct vnode *);
-extern int vfs_sync(bhv_desc_t *, int, struct cred *);
-extern int vfs_vget(bhv_desc_t *, struct vnode **, struct fid *);
-extern int vfs_dmapiops(bhv_desc_t *, caddr_t);
-extern int vfs_quotactl(bhv_desc_t *, int, int, caddr_t);
-extern void vfs_init_vnode(bhv_desc_t *, struct vnode *, bhv_desc_t *, int);
-extern void vfs_force_shutdown(bhv_desc_t *, int, char *, int);
-extern void vfs_freeze(bhv_desc_t *);
-
-typedef struct bhv_vfsops {
- struct vfsops bhv_common;
- void * bhv_custom;
-} bhv_vfsops_t;
-
-#define vfs_bhv_lookup(v, id) ( bhv_lookup_range(&(v)->vfs_bh, (id), (id)) )
-#define vfs_bhv_custom(b) ( ((bhv_vfsops_t *)BHV_OPS(b))->bhv_custom )
-#define vfs_bhv_set_custom(b,o) ( (b)->bhv_custom = (void *)(o))
-#define vfs_bhv_clr_custom(b) ( (b)->bhv_custom = NULL )
-
-extern vfs_t *vfs_allocate(void);
-extern void vfs_deallocate(vfs_t *);
-extern void vfs_insertops(vfs_t *, bhv_vfsops_t *);
-extern void vfs_insertbhv(vfs_t *, bhv_desc_t *, vfsops_t *, void *);
-
-extern void bhv_insert_all_vfsops(struct vfs *);
-extern void bhv_remove_all_vfsops(struct vfs *, int);
-extern void bhv_remove_vfsops(struct vfs *, int);
-
-#endif /* __XFS_VFS_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-
-
-uint64_t vn_generation; /* vnode generation number */
-spinlock_t vnumber_lock = SPIN_LOCK_UNLOCKED;
-
-/*
- * Dedicated vnode inactive/reclaim sync semaphores.
- * Prime number of hash buckets since address is used as the key.
- */
-#define NVSYNC 37
-#define vptosync(v) (&vsync[((unsigned long)v) % NVSYNC])
-sv_t vsync[NVSYNC];
-
-/*
- * Translate stat(2) file types to vnode types and vice versa.
- * Aware of numeric order of S_IFMT and vnode type values.
- */
-enum vtype iftovt_tab[] = {
- VNON, VFIFO, VCHR, VNON, VDIR, VNON, VBLK, VNON,
- VREG, VNON, VLNK, VNON, VSOCK, VNON, VNON, VNON
-};
-
-u_short vttoif_tab[] = {
- 0, S_IFREG, S_IFDIR, S_IFBLK, S_IFCHR, S_IFLNK, S_IFIFO, 0, S_IFSOCK
-};
-
-
-void
-vn_init(void)
-{
- register sv_t *svp;
- register int i;
-
- for (svp = vsync, i = 0; i < NVSYNC; i++, svp++)
- init_sv(svp, SV_DEFAULT, "vsy", i);
-}
-
-/*
- * Clean a vnode of filesystem-specific data and prepare it for reuse.
- */
-STATIC int
-vn_reclaim(
- struct vnode *vp)
-{
- int error;
-
- XFS_STATS_INC(vn_reclaim);
- vn_trace_entry(vp, "vn_reclaim", (inst_t *)__return_address);
-
- /*
- * Only make the VOP_RECLAIM call if there are behaviors
- * to call.
- */
- if (vp->v_fbhv) {
- VOP_RECLAIM(vp, error);
- if (error)
- return -error;
- }
- ASSERT(vp->v_fbhv == NULL);
-
- VN_LOCK(vp);
- vp->v_flag &= (VRECLM|VWAIT);
- VN_UNLOCK(vp, 0);
-
- vp->v_type = VNON;
- vp->v_fbhv = NULL;
-
-#ifdef XFS_VNODE_TRACE
- ktrace_free(vp->v_trace);
- vp->v_trace = NULL;
-#endif
-
- return 0;
-}
-
-STATIC void
-vn_wakeup(
- struct vnode *vp)
-{
- VN_LOCK(vp);
- if (vp->v_flag & VWAIT)
- sv_broadcast(vptosync(vp));
- vp->v_flag &= ~(VRECLM|VWAIT|VMODIFIED);
- VN_UNLOCK(vp, 0);
-}
-
-int
-vn_wait(
- struct vnode *vp)
-{
- VN_LOCK(vp);
- if (vp->v_flag & (VINACT | VRECLM)) {
- vp->v_flag |= VWAIT;
- sv_wait(vptosync(vp), PINOD, &vp->v_lock, 0);
- return 1;
- }
- VN_UNLOCK(vp, 0);
- return 0;
-}
-
-struct vnode *
-vn_initialize(
- struct inode *inode)
-{
- struct vnode *vp = LINVFS_GET_VP(inode);
-
- XFS_STATS_INC(vn_active);
- XFS_STATS_INC(vn_alloc);
-
- vp->v_flag = VMODIFIED;
- spinlock_init(&vp->v_lock, "v_lock");
-
- spin_lock(&vnumber_lock);
- if (!++vn_generation) /* v_number shouldn't be zero */
- vn_generation++;
- vp->v_number = vn_generation;
- spin_unlock(&vnumber_lock);
-
- ASSERT(VN_CACHED(vp) == 0);
-
- /* Initialize the first behavior and the behavior chain head. */
- vn_bhv_head_init(VN_BHV_HEAD(vp), "vnode");
-
-#ifdef XFS_VNODE_TRACE
- vp->v_trace = ktrace_alloc(VNODE_TRACE_SIZE, KM_SLEEP);
- printk("Allocated VNODE_TRACE at 0x%p\n", vp->v_trace);
-#endif /* XFS_VNODE_TRACE */
-
- vn_trace_exit(vp, "vn_initialize", (inst_t *)__return_address);
- return vp;
-}
-
-/*
- * Get a reference on a vnode.
- */
-vnode_t *
-vn_get(
- struct vnode *vp,
- vmap_t *vmap)
-{
- struct inode *inode;
-
- XFS_STATS_INC(vn_get);
- inode = LINVFS_GET_IP(vp);
- if (inode->i_state & I_FREEING)
- return NULL;
-
- inode = ilookup(vmap->v_vfsp->vfs_super, vmap->v_ino);
- if (!inode) /* Inode not present */
- return NULL;
-
- vn_trace_exit(vp, "vn_get", (inst_t *)__return_address);
-
- return vp;
-}
-
-/*
- * Revalidate the Linux inode from the vnode.
- */
-int
-vn_revalidate(
- struct vnode *vp)
-{
- struct inode *inode;
- vattr_t va;
- int error;
-
- vn_trace_entry(vp, "vn_revalidate", (inst_t *)__return_address);
- ASSERT(vp->v_fbhv != NULL);
-
- va.va_mask = XFS_AT_STAT|XFS_AT_XFLAGS;
- VOP_GETATTR(vp, &va, 0, NULL, error);
- if (!error) {
- inode = LINVFS_GET_IP(vp);
- inode->i_mode = VTTOIF(va.va_type) | va.va_mode;
- inode->i_nlink = va.va_nlink;
- inode->i_uid = va.va_uid;
- inode->i_gid = va.va_gid;
- inode->i_blocks = va.va_nblocks;
- inode->i_mtime = va.va_mtime;
- inode->i_ctime = va.va_ctime;
- inode->i_atime = va.va_atime;
- if (va.va_xflags & XFS_XFLAG_IMMUTABLE)
- inode->i_flags |= S_IMMUTABLE;
- else
- inode->i_flags &= ~S_IMMUTABLE;
- if (va.va_xflags & XFS_XFLAG_APPEND)
- inode->i_flags |= S_APPEND;
- else
- inode->i_flags &= ~S_APPEND;
- if (va.va_xflags & XFS_XFLAG_SYNC)
- inode->i_flags |= S_SYNC;
- else
- inode->i_flags &= ~S_SYNC;
- if (va.va_xflags & XFS_XFLAG_NOATIME)
- inode->i_flags |= S_NOATIME;
- else
- inode->i_flags &= ~S_NOATIME;
- VUNMODIFY(vp);
- }
- return -error;
-}
-
-/*
- * purge a vnode from the cache
- * At this point the vnode is guaranteed to have no references (vn_count == 0)
- * The caller has to make sure that there are no ways someone could
- * get a handle (via vn_get) on the vnode (usually done via a mount/vfs lock).
- */
-void
-vn_purge(
- struct vnode *vp,
- vmap_t *vmap)
-{
- vn_trace_entry(vp, "vn_purge", (inst_t *)__return_address);
-
-again:
- /*
- * Check whether vp has already been reclaimed since our caller
- * sampled its version while holding a filesystem cache lock that
- * its VOP_RECLAIM function acquires.
- */
- VN_LOCK(vp);
- if (vp->v_number != vmap->v_number) {
- VN_UNLOCK(vp, 0);
- return;
- }
-
- /*
- * If vp is being reclaimed or inactivated, wait until it is inert,
- * then proceed. Can't assume that vnode is actually reclaimed
- * just because the reclaimed flag is asserted -- a vn_alloc
- * reclaim can fail.
- */
- if (vp->v_flag & (VINACT | VRECLM)) {
- ASSERT(vn_count(vp) == 0);
- vp->v_flag |= VWAIT;
- sv_wait(vptosync(vp), PINOD, &vp->v_lock, 0);
- goto again;
- }
-
- /*
- * Another process could have raced in and gotten this vnode...
- */
- if (vn_count(vp) > 0) {
- VN_UNLOCK(vp, 0);
- return;
- }
-
- XFS_STATS_DEC(vn_active);
- vp->v_flag |= VRECLM;
- VN_UNLOCK(vp, 0);
-
- /*
- * Call VOP_RECLAIM and clean vp. The FSYNC_INVAL flag tells
- * vp's filesystem to flush and invalidate all cached resources.
- * When vn_reclaim returns, vp should have no private data,
- * either in a system cache or attached to v_data.
- */
- if (vn_reclaim(vp) != 0)
- panic("vn_purge: cannot reclaim");
-
- /*
- * Wakeup anyone waiting for vp to be reclaimed.
- */
- vn_wakeup(vp);
-}
-
-/*
- * Add a reference to a referenced vnode.
- */
-struct vnode *
-vn_hold(
- struct vnode *vp)
-{
- struct inode *inode;
-
- XFS_STATS_INC(vn_hold);
-
- VN_LOCK(vp);
- inode = igrab(LINVFS_GET_IP(vp));
- ASSERT(inode);
- VN_UNLOCK(vp, 0);
-
- return vp;
-}
-
-/*
- * Call VOP_INACTIVE on last reference.
- */
-void
-vn_rele(
- struct vnode *vp)
-{
- int vcnt;
- int cache;
-
- XFS_STATS_INC(vn_rele);
-
- VN_LOCK(vp);
-
- vn_trace_entry(vp, "vn_rele", (inst_t *)__return_address);
- vcnt = vn_count(vp);
-
- /*
- * Since we always get called from put_inode we know
- * that i_count won't be decremented after we
- * return.
- */
- if (!vcnt) {
- /*
- * As soon as we turn this on, noone can find us in vn_get
- * until we turn off VINACT or VRECLM
- */
- vp->v_flag |= VINACT;
- VN_UNLOCK(vp, 0);
-
- /*
- * Do not make the VOP_INACTIVE call if there
- * are no behaviors attached to the vnode to call.
- */
- if (vp->v_fbhv)
- VOP_INACTIVE(vp, NULL, cache);
-
- VN_LOCK(vp);
- if (vp->v_flag & VWAIT)
- sv_broadcast(vptosync(vp));
-
- vp->v_flag &= ~(VINACT|VWAIT|VRECLM|VMODIFIED);
- }
-
- VN_UNLOCK(vp, 0);
-
- vn_trace_exit(vp, "vn_rele", (inst_t *)__return_address);
-}
-
-/*
- * Finish the removal of a vnode.
- */
-void
-vn_remove(
- struct vnode *vp)
-{
- vmap_t vmap;
-
- /* Make sure we don't do this to the same vnode twice */
- if (!(vp->v_fbhv))
- return;
-
- XFS_STATS_INC(vn_remove);
- vn_trace_exit(vp, "vn_remove", (inst_t *)__return_address);
-
- /*
- * After the following purge the vnode
- * will no longer exist.
- */
- VMAP(vp, vmap);
- vn_purge(vp, &vmap);
-}
-
-
-#ifdef XFS_VNODE_TRACE
-
-#define KTRACE_ENTER(vp, vk, s, line, ra) \
- ktrace_enter( (vp)->v_trace, \
-/* 0 */ (void *)(__psint_t)(vk), \
-/* 1 */ (void *)(s), \
-/* 2 */ (void *)(__psint_t) line, \
-/* 3 */ (void *)(vn_count(vp)), \
-/* 4 */ (void *)(ra), \
-/* 5 */ (void *)(__psunsigned_t)(vp)->v_flag, \
-/* 6 */ (void *)(__psint_t)smp_processor_id(), \
-/* 7 */ (void *)(__psint_t)(current->pid), \
-/* 8 */ (void *)__return_address, \
-/* 9 */ 0, 0, 0, 0, 0, 0, 0)
-
-/*
- * Vnode tracing code.
- */
-void
-vn_trace_entry(vnode_t *vp, char *func, inst_t *ra)
-{
- KTRACE_ENTER(vp, VNODE_KTRACE_ENTRY, func, 0, ra);
-}
-
-void
-vn_trace_exit(vnode_t *vp, char *func, inst_t *ra)
-{
- KTRACE_ENTER(vp, VNODE_KTRACE_EXIT, func, 0, ra);
-}
-
-void
-vn_trace_hold(vnode_t *vp, char *file, int line, inst_t *ra)
-{
- KTRACE_ENTER(vp, VNODE_KTRACE_HOLD, file, line, ra);
-}
-
-void
-vn_trace_ref(vnode_t *vp, char *file, int line, inst_t *ra)
-{
- KTRACE_ENTER(vp, VNODE_KTRACE_REF, file, line, ra);
-}
-
-void
-vn_trace_rele(vnode_t *vp, char *file, int line, inst_t *ra)
-{
- KTRACE_ENTER(vp, VNODE_KTRACE_RELE, file, line, ra);
-}
-#endif /* XFS_VNODE_TRACE */
+++ /dev/null
-/*
- * Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- *
- * Portions Copyright (c) 1989, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-#ifndef __XFS_VNODE_H__
-#define __XFS_VNODE_H__
-
-struct uio;
-struct file;
-struct vattr;
-struct xfs_iomap;
-struct attrlist_cursor_kern;
-
-/*
- * Vnode types. VNON means no type.
- */
-enum vtype { VNON, VREG, VDIR, VBLK, VCHR, VLNK, VFIFO, VBAD, VSOCK };
-
-typedef xfs_ino_t vnumber_t;
-typedef struct dentry vname_t;
-typedef bhv_head_t vn_bhv_head_t;
-
-/*
- * MP locking protocols:
- * v_flag, v_vfsp VN_LOCK/VN_UNLOCK
- * v_type read-only or fs-dependent
- */
-typedef struct vnode {
- __u32 v_flag; /* vnode flags (see below) */
- enum vtype v_type; /* vnode type */
- struct vfs *v_vfsp; /* ptr to containing VFS */
- vnumber_t v_number; /* in-core vnode number */
- vn_bhv_head_t v_bh; /* behavior head */
- spinlock_t v_lock; /* VN_LOCK/VN_UNLOCK */
- struct inode v_inode; /* Linux inode */
-#ifdef XFS_VNODE_TRACE
- struct ktrace *v_trace; /* trace header structure */
-#endif
-} vnode_t;
-
-#define v_fbhv v_bh.bh_first /* first behavior */
-#define v_fops v_bh.bh_first->bd_ops /* first behavior ops */
-
-#define VNODE_POSITION_BASE BHV_POSITION_BASE /* chain bottom */
-#define VNODE_POSITION_TOP BHV_POSITION_TOP /* chain top */
-#define VNODE_POSITION_INVALID BHV_POSITION_INVALID /* invalid pos. num */
-
-typedef enum {
- VN_BHV_UNKNOWN, /* not specified */
- VN_BHV_XFS, /* xfs */
- VN_BHV_DM, /* data migration */
- VN_BHV_QM, /* quota manager */
- VN_BHV_IO, /* IO path */
- VN_BHV_END /* housekeeping end-of-range */
-} vn_bhv_t;
-
-#define VNODE_POSITION_XFS (VNODE_POSITION_BASE)
-#define VNODE_POSITION_DM (VNODE_POSITION_BASE+10)
-#define VNODE_POSITION_QM (VNODE_POSITION_BASE+20)
-#define VNODE_POSITION_IO (VNODE_POSITION_BASE+30)
-
-/*
- * Macros for dealing with the behavior descriptor inside of the vnode.
- */
-#define BHV_TO_VNODE(bdp) ((vnode_t *)BHV_VOBJ(bdp))
-#define BHV_TO_VNODE_NULL(bdp) ((vnode_t *)BHV_VOBJNULL(bdp))
-
-#define VN_BHV_HEAD(vp) ((bhv_head_t *)(&((vp)->v_bh)))
-#define vn_bhv_head_init(bhp,name) bhv_head_init(bhp,name)
-#define vn_bhv_remove(bhp,bdp) bhv_remove(bhp,bdp)
-#define vn_bhv_lookup(bhp,ops) bhv_lookup(bhp,ops)
-#define vn_bhv_lookup_unlocked(bhp,ops) bhv_lookup_unlocked(bhp,ops)
-
-/*
- * Vnode to Linux inode mapping.
- */
-#define LINVFS_GET_VP(inode) ((vnode_t *)list_entry(inode, vnode_t, v_inode))
-#define LINVFS_GET_IP(vp) (&(vp)->v_inode)
-
-/*
- * Convert between vnode types and inode formats (since POSIX.1
- * defines mode word of stat structure in terms of inode formats).
- */
-extern enum vtype iftovt_tab[];
-extern u_short vttoif_tab[];
-#define IFTOVT(mode) (iftovt_tab[((mode) & S_IFMT) >> 12])
-#define VTTOIF(indx) (vttoif_tab[(int)(indx)])
-#define MAKEIMODE(indx, mode) (int)(VTTOIF(indx) | (mode))
-
-
-/*
- * Vnode flags.
- */
-#define VINACT 0x1 /* vnode is being inactivated */
-#define VRECLM 0x2 /* vnode is being reclaimed */
-#define VWAIT 0x4 /* waiting for VINACT/VRECLM to end */
-#define VMODIFIED 0x8 /* XFS inode state possibly differs */
- /* to the Linux inode state. */
-
-/*
- * Values for the VOP_RWLOCK and VOP_RWUNLOCK flags parameter.
- */
-typedef enum vrwlock {
- VRWLOCK_NONE,
- VRWLOCK_READ,
- VRWLOCK_WRITE,
- VRWLOCK_WRITE_DIRECT,
- VRWLOCK_TRY_READ,
- VRWLOCK_TRY_WRITE
-} vrwlock_t;
-
-/*
- * Return values for VOP_INACTIVE. A return value of
- * VN_INACTIVE_NOCACHE implies that the file system behavior
- * has disassociated its state and bhv_desc_t from the vnode.
- */
-#define VN_INACTIVE_CACHE 0
-#define VN_INACTIVE_NOCACHE 1
-
-/*
- * Values for the cmd code given to VOP_VNODE_CHANGE.
- */
-typedef enum vchange {
- VCHANGE_FLAGS_FRLOCKS = 0,
- VCHANGE_FLAGS_ENF_LOCKING = 1,
- VCHANGE_FLAGS_TRUNCATED = 2,
- VCHANGE_FLAGS_PAGE_DIRTY = 3,
- VCHANGE_FLAGS_IOEXCL_COUNT = 4
-} vchange_t;
-
-
-typedef int (*vop_open_t)(bhv_desc_t *, struct cred *);
-typedef ssize_t (*vop_read_t)(bhv_desc_t *, struct kiocb *,
- const struct iovec *, unsigned int,
- loff_t *, int, struct cred *);
-typedef ssize_t (*vop_write_t)(bhv_desc_t *, struct kiocb *,
- const struct iovec *, unsigned int,
- loff_t *, int, struct cred *);
-typedef ssize_t (*vop_sendfile_t)(bhv_desc_t *, struct file *,
- loff_t *, int, size_t, read_actor_t,
- void *, struct cred *);
-typedef int (*vop_ioctl_t)(bhv_desc_t *, struct inode *, struct file *,
- int, unsigned int, unsigned long);
-typedef int (*vop_getattr_t)(bhv_desc_t *, struct vattr *, int,
- struct cred *);
-typedef int (*vop_setattr_t)(bhv_desc_t *, struct vattr *, int,
- struct cred *);
-typedef int (*vop_access_t)(bhv_desc_t *, int, struct cred *);
-typedef int (*vop_lookup_t)(bhv_desc_t *, vname_t *, vnode_t **,
- int, vnode_t *, struct cred *);
-typedef int (*vop_create_t)(bhv_desc_t *, vname_t *, struct vattr *,
- vnode_t **, struct cred *);
-typedef int (*vop_remove_t)(bhv_desc_t *, vname_t *, struct cred *);
-typedef int (*vop_link_t)(bhv_desc_t *, vnode_t *, vname_t *,
- struct cred *);
-typedef int (*vop_rename_t)(bhv_desc_t *, vname_t *, vnode_t *, vname_t *,
- struct cred *);
-typedef int (*vop_mkdir_t)(bhv_desc_t *, vname_t *, struct vattr *,
- vnode_t **, struct cred *);
-typedef int (*vop_rmdir_t)(bhv_desc_t *, vname_t *, struct cred *);
-typedef int (*vop_readdir_t)(bhv_desc_t *, struct uio *, struct cred *,
- int *);
-typedef int (*vop_symlink_t)(bhv_desc_t *, vname_t *, struct vattr *,
- char *, vnode_t **, struct cred *);
-typedef int (*vop_readlink_t)(bhv_desc_t *, struct uio *, int,
- struct cred *);
-typedef int (*vop_fsync_t)(bhv_desc_t *, int, struct cred *,
- xfs_off_t, xfs_off_t);
-typedef int (*vop_inactive_t)(bhv_desc_t *, struct cred *);
-typedef int (*vop_fid2_t)(bhv_desc_t *, struct fid *);
-typedef int (*vop_release_t)(bhv_desc_t *);
-typedef int (*vop_rwlock_t)(bhv_desc_t *, vrwlock_t);
-typedef void (*vop_rwunlock_t)(bhv_desc_t *, vrwlock_t);
-typedef int (*vop_bmap_t)(bhv_desc_t *, xfs_off_t, ssize_t, int,
- struct xfs_iomap *, int *);
-typedef int (*vop_reclaim_t)(bhv_desc_t *);
-typedef int (*vop_attr_get_t)(bhv_desc_t *, char *, char *, int *, int,
- struct cred *);
-typedef int (*vop_attr_set_t)(bhv_desc_t *, char *, char *, int, int,
- struct cred *);
-typedef int (*vop_attr_remove_t)(bhv_desc_t *, char *, int, struct cred *);
-typedef int (*vop_attr_list_t)(bhv_desc_t *, char *, int, int,
- struct attrlist_cursor_kern *, struct cred *);
-typedef void (*vop_link_removed_t)(bhv_desc_t *, vnode_t *, int);
-typedef void (*vop_vnode_change_t)(bhv_desc_t *, vchange_t, __psint_t);
-typedef void (*vop_ptossvp_t)(bhv_desc_t *, xfs_off_t, xfs_off_t, int);
-typedef void (*vop_pflushinvalvp_t)(bhv_desc_t *, xfs_off_t, xfs_off_t, int);
-typedef int (*vop_pflushvp_t)(bhv_desc_t *, xfs_off_t, xfs_off_t,
- uint64_t, int);
-typedef int (*vop_iflush_t)(bhv_desc_t *, int);
-
-
-typedef struct vnodeops {
- bhv_position_t vn_position; /* position within behavior chain */
- vop_open_t vop_open;
- vop_read_t vop_read;
- vop_write_t vop_write;
- vop_sendfile_t vop_sendfile;
- vop_ioctl_t vop_ioctl;
- vop_getattr_t vop_getattr;
- vop_setattr_t vop_setattr;
- vop_access_t vop_access;
- vop_lookup_t vop_lookup;
- vop_create_t vop_create;
- vop_remove_t vop_remove;
- vop_link_t vop_link;
- vop_rename_t vop_rename;
- vop_mkdir_t vop_mkdir;
- vop_rmdir_t vop_rmdir;
- vop_readdir_t vop_readdir;
- vop_symlink_t vop_symlink;
- vop_readlink_t vop_readlink;
- vop_fsync_t vop_fsync;
- vop_inactive_t vop_inactive;
- vop_fid2_t vop_fid2;
- vop_rwlock_t vop_rwlock;
- vop_rwunlock_t vop_rwunlock;
- vop_bmap_t vop_bmap;
- vop_reclaim_t vop_reclaim;
- vop_attr_get_t vop_attr_get;
- vop_attr_set_t vop_attr_set;
- vop_attr_remove_t vop_attr_remove;
- vop_attr_list_t vop_attr_list;
- vop_link_removed_t vop_link_removed;
- vop_vnode_change_t vop_vnode_change;
- vop_ptossvp_t vop_tosspages;
- vop_pflushinvalvp_t vop_flushinval_pages;
- vop_pflushvp_t vop_flush_pages;
- vop_release_t vop_release;
- vop_iflush_t vop_iflush;
-} vnodeops_t;
-
-/*
- * VOP's.
- */
-#define _VOP_(op, vp) (*((vnodeops_t *)(vp)->v_fops)->op)
-
-#define VOP_READ(vp,file,iov,segs,offset,ioflags,cr,rv) \
- rv = _VOP_(vop_read, vp)((vp)->v_fbhv,file,iov,segs,offset,ioflags,cr)
-#define VOP_WRITE(vp,file,iov,segs,offset,ioflags,cr,rv) \
- rv = _VOP_(vop_write, vp)((vp)->v_fbhv,file,iov,segs,offset,ioflags,cr)
-#define VOP_SENDFILE(vp,f,off,ioflags,cnt,act,targ,cr,rv) \
- rv = _VOP_(vop_sendfile, vp)((vp)->v_fbhv,f,off,ioflags,cnt,act,targ,cr)
-#define VOP_BMAP(vp,of,sz,rw,b,n,rv) \
- rv = _VOP_(vop_bmap, vp)((vp)->v_fbhv,of,sz,rw,b,n)
-#define VOP_OPEN(vp, cr, rv) \
- rv = _VOP_(vop_open, vp)((vp)->v_fbhv, cr)
-#define VOP_GETATTR(vp, vap, f, cr, rv) \
- rv = _VOP_(vop_getattr, vp)((vp)->v_fbhv, vap, f, cr)
-#define VOP_SETATTR(vp, vap, f, cr, rv) \
- rv = _VOP_(vop_setattr, vp)((vp)->v_fbhv, vap, f, cr)
-#define VOP_ACCESS(vp, mode, cr, rv) \
- rv = _VOP_(vop_access, vp)((vp)->v_fbhv, mode, cr)
-#define VOP_LOOKUP(vp,d,vpp,f,rdir,cr,rv) \
- rv = _VOP_(vop_lookup, vp)((vp)->v_fbhv,d,vpp,f,rdir,cr)
-#define VOP_CREATE(dvp,d,vap,vpp,cr,rv) \
- rv = _VOP_(vop_create, dvp)((dvp)->v_fbhv,d,vap,vpp,cr)
-#define VOP_REMOVE(dvp,d,cr,rv) \
- rv = _VOP_(vop_remove, dvp)((dvp)->v_fbhv,d,cr)
-#define VOP_LINK(tdvp,fvp,d,cr,rv) \
- rv = _VOP_(vop_link, tdvp)((tdvp)->v_fbhv,fvp,d,cr)
-#define VOP_RENAME(fvp,fnm,tdvp,tnm,cr,rv) \
- rv = _VOP_(vop_rename, fvp)((fvp)->v_fbhv,fnm,tdvp,tnm,cr)
-#define VOP_MKDIR(dp,d,vap,vpp,cr,rv) \
- rv = _VOP_(vop_mkdir, dp)((dp)->v_fbhv,d,vap,vpp,cr)
-#define VOP_RMDIR(dp,d,cr,rv) \
- rv = _VOP_(vop_rmdir, dp)((dp)->v_fbhv,d,cr)
-#define VOP_READDIR(vp,uiop,cr,eofp,rv) \
- rv = _VOP_(vop_readdir, vp)((vp)->v_fbhv,uiop,cr,eofp)
-#define VOP_SYMLINK(dvp,d,vap,tnm,vpp,cr,rv) \
- rv = _VOP_(vop_symlink, dvp) ((dvp)->v_fbhv,d,vap,tnm,vpp,cr)
-#define VOP_READLINK(vp,uiop,fl,cr,rv) \
- rv = _VOP_(vop_readlink, vp)((vp)->v_fbhv,uiop,fl,cr)
-#define VOP_FSYNC(vp,f,cr,b,e,rv) \
- rv = _VOP_(vop_fsync, vp)((vp)->v_fbhv,f,cr,b,e)
-#define VOP_INACTIVE(vp, cr, rv) \
- rv = _VOP_(vop_inactive, vp)((vp)->v_fbhv, cr)
-#define VOP_RELEASE(vp, rv) \
- rv = _VOP_(vop_release, vp)((vp)->v_fbhv)
-#define VOP_FID2(vp, fidp, rv) \
- rv = _VOP_(vop_fid2, vp)((vp)->v_fbhv, fidp)
-#define VOP_RWLOCK(vp,i) \
- (void)_VOP_(vop_rwlock, vp)((vp)->v_fbhv, i)
-#define VOP_RWLOCK_TRY(vp,i) \
- _VOP_(vop_rwlock, vp)((vp)->v_fbhv, i)
-#define VOP_RWUNLOCK(vp,i) \
- (void)_VOP_(vop_rwunlock, vp)((vp)->v_fbhv, i)
-#define VOP_FRLOCK(vp,c,fl,flags,offset,fr,rv) \
- rv = _VOP_(vop_frlock, vp)((vp)->v_fbhv,c,fl,flags,offset,fr)
-#define VOP_RECLAIM(vp, rv) \
- rv = _VOP_(vop_reclaim, vp)((vp)->v_fbhv)
-#define VOP_ATTR_GET(vp, name, val, vallenp, fl, cred, rv) \
- rv = _VOP_(vop_attr_get, vp)((vp)->v_fbhv,name,val,vallenp,fl,cred)
-#define VOP_ATTR_SET(vp, name, val, vallen, fl, cred, rv) \
- rv = _VOP_(vop_attr_set, vp)((vp)->v_fbhv,name,val,vallen,fl,cred)
-#define VOP_ATTR_REMOVE(vp, name, flags, cred, rv) \
- rv = _VOP_(vop_attr_remove, vp)((vp)->v_fbhv,name,flags,cred)
-#define VOP_ATTR_LIST(vp, buf, buflen, fl, cursor, cred, rv) \
- rv = _VOP_(vop_attr_list, vp)((vp)->v_fbhv,buf,buflen,fl,cursor,cred)
-#define VOP_LINK_REMOVED(vp, dvp, linkzero) \
- (void)_VOP_(vop_link_removed, vp)((vp)->v_fbhv, dvp, linkzero)
-#define VOP_VNODE_CHANGE(vp, cmd, val) \
- (void)_VOP_(vop_vnode_change, vp)((vp)->v_fbhv,cmd,val)
-/*
- * These are page cache functions that now go thru VOPs.
- * 'last' parameter is unused and left in for IRIX compatibility
- */
-#define VOP_TOSS_PAGES(vp, first, last, fiopt) \
- _VOP_(vop_tosspages, vp)((vp)->v_fbhv,first, last, fiopt)
-/*
- * 'last' parameter is unused and left in for IRIX compatibility
- */
-#define VOP_FLUSHINVAL_PAGES(vp, first, last, fiopt) \
- _VOP_(vop_flushinval_pages, vp)((vp)->v_fbhv,first,last,fiopt)
-/*
- * 'last' parameter is unused and left in for IRIX compatibility
- */
-#define VOP_FLUSH_PAGES(vp, first, last, flags, fiopt, rv) \
- rv = _VOP_(vop_flush_pages, vp)((vp)->v_fbhv,first,last,flags,fiopt)
-#define VOP_IOCTL(vp, inode, filp, fl, cmd, arg, rv) \
- rv = _VOP_(vop_ioctl, vp)((vp)->v_fbhv,inode,filp,fl,cmd,arg)
-#define VOP_IFLUSH(vp, flags, rv) \
- rv = _VOP_(vop_iflush, vp)((vp)->v_fbhv, flags)
-
-/*
- * Flags for read/write calls - same values as IRIX
- */
-#define IO_ISDIRECT 0x00004 /* bypass page cache */
-#define IO_INVIS 0x00020 /* don't update inode timestamps */
-
-/*
- * Flags for VOP_IFLUSH call
- */
-#define FLUSH_SYNC 1 /* wait for flush to complete */
-#define FLUSH_INODE 2 /* flush the inode itself */
-#define FLUSH_LOG 4 /* force the last log entry for
- * this inode out to disk */
-
-/*
- * Flush/Invalidate options for VOP_TOSS_PAGES, VOP_FLUSHINVAL_PAGES and
- * VOP_FLUSH_PAGES.
- */
-#define FI_NONE 0 /* none */
-#define FI_REMAPF 1 /* Do a remapf prior to the operation */
-#define FI_REMAPF_LOCKED 2 /* Do a remapf prior to the operation.
- Prevent VM access to the pages until
- the operation completes. */
-
-/*
- * Vnode attributes. va_mask indicates those attributes the caller
- * wants to set or extract.
- */
-typedef struct vattr {
- int va_mask; /* bit-mask of attributes present */
- enum vtype va_type; /* vnode type (for create) */
- mode_t va_mode; /* file access mode and type */
- nlink_t va_nlink; /* number of references to file */
- uid_t va_uid; /* owner user id */
- gid_t va_gid; /* owner group id */
- xfs_ino_t va_nodeid; /* file id */
- xfs_off_t va_size; /* file size in bytes */
- u_long va_blocksize; /* blocksize preferred for i/o */
- struct timespec va_atime; /* time of last access */
- struct timespec va_mtime; /* time of last modification */
- struct timespec va_ctime; /* time file changed */
- u_int va_gen; /* generation number of file */
- xfs_dev_t va_rdev; /* device the special file represents */
- __int64_t va_nblocks; /* number of blocks allocated */
- u_long va_xflags; /* random extended file flags */
- u_long va_extsize; /* file extent size */
- u_long va_nextents; /* number of extents in file */
- u_long va_anextents; /* number of attr extents in file */
- int va_projid; /* project id */
-} vattr_t;
-
-/*
- * setattr or getattr attributes
- */
-#define XFS_AT_TYPE 0x00000001
-#define XFS_AT_MODE 0x00000002
-#define XFS_AT_UID 0x00000004
-#define XFS_AT_GID 0x00000008
-#define XFS_AT_FSID 0x00000010
-#define XFS_AT_NODEID 0x00000020
-#define XFS_AT_NLINK 0x00000040
-#define XFS_AT_SIZE 0x00000080
-#define XFS_AT_ATIME 0x00000100
-#define XFS_AT_MTIME 0x00000200
-#define XFS_AT_CTIME 0x00000400
-#define XFS_AT_RDEV 0x00000800
-#define XFS_AT_BLKSIZE 0x00001000
-#define XFS_AT_NBLOCKS 0x00002000
-#define XFS_AT_VCODE 0x00004000
-#define XFS_AT_MAC 0x00008000
-#define XFS_AT_UPDATIME 0x00010000
-#define XFS_AT_UPDMTIME 0x00020000
-#define XFS_AT_UPDCTIME 0x00040000
-#define XFS_AT_ACL 0x00080000
-#define XFS_AT_CAP 0x00100000
-#define XFS_AT_INF 0x00200000
-#define XFS_AT_XFLAGS 0x00400000
-#define XFS_AT_EXTSIZE 0x00800000
-#define XFS_AT_NEXTENTS 0x01000000
-#define XFS_AT_ANEXTENTS 0x02000000
-#define XFS_AT_PROJID 0x04000000
-#define XFS_AT_SIZE_NOPERM 0x08000000
-#define XFS_AT_GENCOUNT 0x10000000
-
-#define XFS_AT_ALL (XFS_AT_TYPE|XFS_AT_MODE|XFS_AT_UID|XFS_AT_GID|\
- XFS_AT_FSID|XFS_AT_NODEID|XFS_AT_NLINK|XFS_AT_SIZE|\
- XFS_AT_ATIME|XFS_AT_MTIME|XFS_AT_CTIME|XFS_AT_RDEV|\
- XFS_AT_BLKSIZE|XFS_AT_NBLOCKS|XFS_AT_VCODE|XFS_AT_MAC|\
- XFS_AT_ACL|XFS_AT_CAP|XFS_AT_INF|XFS_AT_XFLAGS|XFS_AT_EXTSIZE|\
- XFS_AT_NEXTENTS|XFS_AT_ANEXTENTS|XFS_AT_PROJID|XFS_AT_GENCOUNT)
-
-#define XFS_AT_STAT (XFS_AT_TYPE|XFS_AT_MODE|XFS_AT_UID|XFS_AT_GID|\
- XFS_AT_FSID|XFS_AT_NODEID|XFS_AT_NLINK|XFS_AT_SIZE|\
- XFS_AT_ATIME|XFS_AT_MTIME|XFS_AT_CTIME|XFS_AT_RDEV|\
- XFS_AT_BLKSIZE|XFS_AT_NBLOCKS|XFS_AT_PROJID)
-
-#define XFS_AT_TIMES (XFS_AT_ATIME|XFS_AT_MTIME|XFS_AT_CTIME)
-
-#define XFS_AT_UPDTIMES (XFS_AT_UPDATIME|XFS_AT_UPDMTIME|XFS_AT_UPDCTIME)
-
-#define XFS_AT_NOSET (XFS_AT_NLINK|XFS_AT_RDEV|XFS_AT_FSID|XFS_AT_NODEID|\
- XFS_AT_TYPE|XFS_AT_BLKSIZE|XFS_AT_NBLOCKS|XFS_AT_VCODE|\
- XFS_AT_NEXTENTS|XFS_AT_ANEXTENTS|XFS_AT_GENCOUNT)
-
-/*
- * Modes.
- */
-#define VSUID S_ISUID /* set user id on execution */
-#define VSGID S_ISGID /* set group id on execution */
-#define VSVTX S_ISVTX /* save swapped text even after use */
-#define VREAD S_IRUSR /* read, write, execute permissions */
-#define VWRITE S_IWUSR
-#define VEXEC S_IXUSR
-
-#define MODEMASK S_IALLUGO /* mode bits plus permission bits */
-
-/*
- * Check whether mandatory file locking is enabled.
- */
-#define MANDLOCK(vp, mode) \
- ((vp)->v_type == VREG && ((mode) & (VSGID|(VEXEC>>3))) == VSGID)
-
-extern void vn_init(void);
-extern int vn_wait(struct vnode *);
-extern vnode_t *vn_initialize(struct inode *);
-
-/*
- * Acquiring and invalidating vnodes:
- *
- * if (vn_get(vp, version, 0))
- * ...;
- * vn_purge(vp, version);
- *
- * vn_get and vn_purge must be called with vmap_t arguments, sampled
- * while a lock that the vnode's VOP_RECLAIM function acquires is
- * held, to ensure that the vnode sampled with the lock held isn't
- * recycled (VOP_RECLAIMed) or deallocated between the release of the lock
- * and the subsequent vn_get or vn_purge.
- */
-
-/*
- * vnode_map structures _must_ match vn_epoch and vnode structure sizes.
- */
-typedef struct vnode_map {
- vfs_t *v_vfsp;
- vnumber_t v_number; /* in-core vnode number */
- xfs_ino_t v_ino; /* inode # */
-} vmap_t;
-
-#define VMAP(vp, vmap) {(vmap).v_vfsp = (vp)->v_vfsp, \
- (vmap).v_number = (vp)->v_number, \
- (vmap).v_ino = (vp)->v_inode.i_ino; }
-
-extern void vn_purge(struct vnode *, vmap_t *);
-extern vnode_t *vn_get(struct vnode *, vmap_t *);
-extern int vn_revalidate(struct vnode *);
-extern void vn_remove(struct vnode *);
-
-static inline int vn_count(struct vnode *vp)
-{
- return atomic_read(&LINVFS_GET_IP(vp)->i_count);
-}
-
-/*
- * Vnode reference counting functions (and macros for compatibility).
- */
-extern vnode_t *vn_hold(struct vnode *);
-extern void vn_rele(struct vnode *);
-
-#if defined(XFS_VNODE_TRACE)
-#define VN_HOLD(vp) \
- ((void)vn_hold(vp), \
- vn_trace_hold(vp, __FILE__, __LINE__, (inst_t *)__return_address))
-#define VN_RELE(vp) \
- (vn_trace_rele(vp, __FILE__, __LINE__, (inst_t *)__return_address), \
- iput(LINVFS_GET_IP(vp)))
-#else
-#define VN_HOLD(vp) ((void)vn_hold(vp))
-#define VN_RELE(vp) (iput(LINVFS_GET_IP(vp)))
-#endif
-
-/*
- * Vname handling macros.
- */
-#define VNAME(dentry) ((char *) (dentry)->d_name.name)
-#define VNAMELEN(dentry) ((dentry)->d_name.len)
-#define VNAME_TO_VNODE(dentry) (LINVFS_GET_VP((dentry)->d_inode))
-
-/*
- * Vnode spinlock manipulation.
- */
-#define VN_LOCK(vp) mutex_spinlock(&(vp)->v_lock)
-#define VN_UNLOCK(vp, s) mutex_spinunlock(&(vp)->v_lock, s)
-#define VN_FLAGSET(vp,b) vn_flagset(vp,b)
-#define VN_FLAGCLR(vp,b) vn_flagclr(vp,b)
-
-static __inline__ void vn_flagset(struct vnode *vp, uint flag)
-{
- spin_lock(&vp->v_lock);
- vp->v_flag |= flag;
- spin_unlock(&vp->v_lock);
-}
-
-static __inline__ void vn_flagclr(struct vnode *vp, uint flag)
-{
- spin_lock(&vp->v_lock);
- vp->v_flag &= ~flag;
- spin_unlock(&vp->v_lock);
-}
-
-/*
- * Update modify/access/change times on the vnode
- */
-#define VN_MTIMESET(vp, tvp) (LINVFS_GET_IP(vp)->i_mtime = *(tvp))
-#define VN_ATIMESET(vp, tvp) (LINVFS_GET_IP(vp)->i_atime = *(tvp))
-#define VN_CTIMESET(vp, tvp) (LINVFS_GET_IP(vp)->i_ctime = *(tvp))
-
-/*
- * Some useful predicates.
- */
-#define VN_MAPPED(vp) mapping_mapped(LINVFS_GET_IP(vp)->i_mapping)
-#define VN_CACHED(vp) (LINVFS_GET_IP(vp)->i_mapping->nrpages)
-#define VN_DIRTY(vp) mapping_tagged(LINVFS_GET_IP(vp)->i_mapping, \
- PAGECACHE_TAG_DIRTY)
-#define VMODIFY(vp) VN_FLAGSET(vp, VMODIFIED)
-#define VUNMODIFY(vp) VN_FLAGCLR(vp, VMODIFIED)
-
-/*
- * Flags to VOP_SETATTR/VOP_GETATTR.
- */
-#define ATTR_UTIME 0x01 /* non-default utime(2) request */
-#define ATTR_DMI 0x08 /* invocation from a DMI function */
-#define ATTR_LAZY 0x80 /* set/get attributes lazily */
-#define ATTR_NONBLOCK 0x100 /* return EAGAIN if operation would block */
-
-/*
- * Flags to VOP_FSYNC and VOP_RECLAIM.
- */
-#define FSYNC_NOWAIT 0 /* asynchronous flush */
-#define FSYNC_WAIT 0x1 /* synchronous fsync or forced reclaim */
-#define FSYNC_INVAL 0x2 /* flush and invalidate cached data */
-#define FSYNC_DATA 0x4 /* synchronous fsync of data only */
-
-/*
- * Tracking vnode activity.
- */
-#if defined(XFS_VNODE_TRACE)
-
-#define VNODE_TRACE_SIZE 16 /* number of trace entries */
-#define VNODE_KTRACE_ENTRY 1
-#define VNODE_KTRACE_EXIT 2
-#define VNODE_KTRACE_HOLD 3
-#define VNODE_KTRACE_REF 4
-#define VNODE_KTRACE_RELE 5
-
-extern void vn_trace_entry(struct vnode *, char *, inst_t *);
-extern void vn_trace_exit(struct vnode *, char *, inst_t *);
-extern void vn_trace_hold(struct vnode *, char *, int, inst_t *);
-extern void vn_trace_ref(struct vnode *, char *, int, inst_t *);
-extern void vn_trace_rele(struct vnode *, char *, int, inst_t *);
-
-#define VN_TRACE(vp) \
- vn_trace_ref(vp, __FILE__, __LINE__, (inst_t *)__return_address)
-#else
-#define vn_trace_entry(a,b,c)
-#define vn_trace_exit(a,b,c)
-#define vn_trace_hold(a,b,c,d)
-#define vn_trace_ref(a,b,c,d)
-#define vn_trace_rele(a,b,c,d)
-#define VN_TRACE(vp)
-#endif
-
-#endif /* __XFS_VNODE_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2002 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-
-STATIC int xfs_cap_allow_set(vnode_t *);
-
-
-/*
- * Test for existence of capability attribute as efficiently as possible.
- */
-int
-xfs_cap_vhascap(
- vnode_t *vp)
-{
- int error;
- int len = sizeof(xfs_cap_set_t);
- int flags = ATTR_KERNOVAL|ATTR_ROOT;
-
- VOP_ATTR_GET(vp, SGI_CAP_LINUX, NULL, &len, flags, sys_cred, error);
- return (error == 0);
-}
-
-/*
- * Convert from extended attribute representation to in-memory for XFS.
- */
-STATIC int
-posix_cap_xattr_to_xfs(
- posix_cap_xattr *src,
- size_t size,
- xfs_cap_set_t *dest)
-{
- if (!src || !dest)
- return EINVAL;
-
- if (src->c_version != cpu_to_le32(POSIX_CAP_XATTR_VERSION))
- return EINVAL;
- if (src->c_abiversion != cpu_to_le32(_LINUX_CAPABILITY_VERSION))
- return EINVAL;
-
- if (size < sizeof(posix_cap_xattr))
- return EINVAL;
-
- ASSERT(sizeof(dest->cap_effective) == sizeof(src->c_effective));
-
- dest->cap_effective = src->c_effective;
- dest->cap_permitted = src->c_permitted;
- dest->cap_inheritable = src->c_inheritable;
-
- return 0;
-}
-
-/*
- * Convert from in-memory XFS to extended attribute representation.
- */
-STATIC int
-posix_cap_xfs_to_xattr(
- xfs_cap_set_t *src,
- posix_cap_xattr *xattr_cap,
- size_t size)
-{
- size_t new_size = posix_cap_xattr_size();
-
- if (size < new_size)
- return -ERANGE;
-
- ASSERT(sizeof(xattr_cap->c_effective) == sizeof(src->cap_effective));
-
- xattr_cap->c_version = cpu_to_le32(POSIX_CAP_XATTR_VERSION);
- xattr_cap->c_abiversion = cpu_to_le32(_LINUX_CAPABILITY_VERSION);
- xattr_cap->c_effective = src->cap_effective;
- xattr_cap->c_permitted = src->cap_permitted;
- xattr_cap->c_inheritable= src->cap_inheritable;
-
- return new_size;
-}
-
-int
-xfs_cap_vget(
- vnode_t *vp,
- void *cap,
- size_t size)
-{
- int error;
- int len = sizeof(xfs_cap_set_t);
- int flags = ATTR_ROOT;
- xfs_cap_set_t xfs_cap = { 0 };
- posix_cap_xattr *xattr_cap = cap;
- char *data = (char *)&xfs_cap;
-
- VN_HOLD(vp);
- if ((error = _MAC_VACCESS(vp, NULL, VREAD)))
- goto out;
-
- if (!size) {
- flags |= ATTR_KERNOVAL;
- data = NULL;
- }
- VOP_ATTR_GET(vp, SGI_CAP_LINUX, data, &len, flags, sys_cred, error);
- if (error)
- goto out;
- ASSERT(len == sizeof(xfs_cap_set_t));
-
- error = (size)? -posix_cap_xattr_size() :
- -posix_cap_xfs_to_xattr(&xfs_cap, xattr_cap, size);
-out:
- VN_RELE(vp);
- return -error;
-}
-
-int
-xfs_cap_vremove(
- vnode_t *vp)
-{
- int error;
-
- VN_HOLD(vp);
- error = xfs_cap_allow_set(vp);
- if (!error) {
- VOP_ATTR_REMOVE(vp, SGI_CAP_LINUX, ATTR_ROOT, sys_cred, error);
- if (error == ENOATTR)
- error = 0; /* 'scool */
- }
- VN_RELE(vp);
- return -error;
-}
-
-int
-xfs_cap_vset(
- vnode_t *vp,
- void *cap,
- size_t size)
-{
- posix_cap_xattr *xattr_cap = cap;
- xfs_cap_set_t xfs_cap;
- int error;
-
- if (!cap)
- return -EINVAL;
-
- error = posix_cap_xattr_to_xfs(xattr_cap, size, &xfs_cap);
- if (error)
- return -error;
-
- VN_HOLD(vp);
- error = xfs_cap_allow_set(vp);
- if (error)
- goto out;
-
- VOP_ATTR_SET(vp, SGI_CAP_LINUX, (char *)&xfs_cap,
- sizeof(xfs_cap_set_t), ATTR_ROOT, sys_cred, error);
-out:
- VN_RELE(vp);
- return -error;
-}
-
-STATIC int
-xfs_cap_allow_set(
- vnode_t *vp)
-{
- vattr_t va;
- int error;
-
- if (vp->v_vfsp->vfs_flag & VFS_RDONLY)
- return EROFS;
- if (vp->v_inode.i_flags & (S_IMMUTABLE|S_APPEND))
- return EPERM;
- if ((error = _MAC_VACCESS(vp, NULL, VWRITE)))
- return error;
- va.va_mask = XFS_AT_UID;
- VOP_GETATTR(vp, &va, 0, NULL, error);
- if (error)
- return error;
- if (va.va_uid != current->fsuid && !capable(CAP_FOWNER))
- return EPERM;
- return error;
-}
+++ /dev/null
-/*
- * Copyright (c) 2000-2002 Silicon Graphics, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Further, this software is distributed without any warranty that it is
- * free of the rightful claim of any third person regarding infringement
- * or the like. Any license provided herein, whether implied or
- * otherwise, applies only to this software file. Patent licenses, if
- * any, provided herein do not apply to combinations of this program with
- * other software, or any other product whatsoever.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
- * Mountain View, CA 94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
- */
-
-#include "xfs.h"
-
-static xfs_mac_label_t *mac_low_high_lp;
-static xfs_mac_label_t *mac_high_low_lp;
-static xfs_mac_label_t *mac_admin_high_lp;
-static xfs_mac_label_t *mac_equal_equal_lp;
-
-/*
- * Test for the existence of a MAC label as efficiently as possible.
- */
-int
-xfs_mac_vhaslabel(
- vnode_t *vp)
-{
- int error;
- int len = sizeof(xfs_mac_label_t);
- int flags = ATTR_KERNOVAL|ATTR_ROOT;
-
- VOP_ATTR_GET(vp, SGI_MAC_FILE, NULL, &len, flags, sys_cred, error);
- return (error == 0);
-}
-
-int
-xfs_mac_iaccess(xfs_inode_t *ip, mode_t mode, struct cred *cr)
-{
- xfs_mac_label_t mac;
- xfs_mac_label_t *mp = mac_high_low_lp;
-
- if (cr == NULL || sys_cred == NULL ) {
- return EACCES;
- }
-
- if (xfs_attr_fetch(ip, SGI_MAC_FILE, (char *)&mac, sizeof(mac)) == 0) {
- if ((mp = mac_add_label(&mac)) == NULL) {
- return mac_access(mac_high_low_lp, cr, mode);
- }
- }
-
- return mac_access(mp, cr, mode);
-}
+++ /dev/null
-#ifndef _ASM_ALPHA_CPUMASK_H
-#define _ASM_ALPHA_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_ALPHA_CPUMASK_H */
+++ /dev/null
-#error "<asm/init.h> should never be used - use <linux/init.h> instead"
+++ /dev/null
-#ifndef _ALPHA_RMAP_H
-#define _ALPHA_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm/arch-80200fcc/adi_evb.h
- *
- * ADI 80200FCC evaluation board definitions
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#define ADI_EVB__RAMBASE 0xa0000000
-#define ADI_EVB__UART 0x00400000 /* UART */
-#define ADI_EVB_7SEG_1 0x00500000 /* 7-Segment */
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-80200fcc/dma.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS 0xffffffff
-
-/* No DMA */
-#define MAX_DMA_CHANNELS 0
-
-#endif /* _ASM_ARCH_DMA_H */
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-adifcc/hardware.h
- *
- * Hardware definitions for ADI based systems
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright (C) 2000-2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-#include <linux/config.h>
-
-#define PCIO_BASE 0
-
-#if defined(CONFIG_ARCH_ADI_EVB)
-#include "adi_evb.h"
-#endif
-
-#endif /* _ASM_ARCH_HARDWARE_H */
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-adifcc/io.h
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a) (PCIO_BASE + (a))
-#define __mem_pci(a) ((unsigned long)(a))
-#define __mem_isa(a) ((unsigned long)(a))
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-80200fcc/irqs.h
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- * Copyright: (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#define IRQ_XS80200_BCU 0 /* Bus Control Unit */
-#define IRQ_XS80200_PMU 1 /* Performance Monitoring Unit */
-#define IRQ_XS80200_EXTIRQ 2 /* external IRQ signal */
-#define IRQ_XS80200_EXTFIQ 3 /* external IRQ signal */
-
-#define NR_XS80200_IRQS 4
-#define NR_IRQS NR_XS80200_IRQS
-
-#define IRQ_XSCALE_PMU IRQ_XS80200_PMU
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-adifcc/memory.h
- *
- * Copyright (c) 2001 MontaVista Software, Inc.
- */
-
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-
-/*
- * Physical DRAM offset.
- */
-#define PHYS_OFFSET (0xC0000000UL)
-
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- * address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- * to an address that the kernel can use.
- *
- * These are dummies for now.
- */
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-adifcc/param.h
- */
+++ /dev/null
-/*
- * include/asm-arm/arch-adifcc/serial.h
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright (c) 2001 MontaVista Software, Inc.
- */
-#include <linux/config.h>
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD ( 1852000 / 16 )
-
-/* Standard COM flags */
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-#ifdef CONFIG_ARCH_ADI_EVB
-
-/*
- * One serial port, int goes to FIQ, so we run in polled mode
- */
-#define STD_SERIAL_PORT_DEFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0xff400000, 0, STD_COM_FLAGS } /* ttyS0 */
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-adifcc/system.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-static inline void arch_idle(void)
-{
-#if 0
- cpu_do_idle();
-#endif
-}
-
-
-static inline void arch_reset(char mode)
-{
- if ( 1 && mode == 's') {
- /* Jump into ROM at address 0 */
- cpu_reset(0);
- } else {
- /* Use on-chip reset capability */
- }
-}
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-adifcc/time.h
- *
- */
-
-/*
- * No on board timer, implementation @ arch/arm/kernel/xscale-time.c
- */
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-adifcc/timex.h
- *
- * XScale architecture timex specifications
- */
-
-/* This is for a timer based on the XS80200's PMU counter */
-
-#define CLOCK_TICK_RATE 600000000 /* Underlying HZ */
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-adifcc/uncompress.h
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright (c) 2001 MontaVista Software, Inc.
- *
- */
-
-#define UART_BASE ((volatile unsigned char *)0x00400000)
-
-static __inline__ void putc(char c)
-{
- while ((UART_BASE[5] & 0x60) != 0x60);
- UART_BASE[0] = c;
-}
-
-/*
- * This does not append a newline
- */
-static void puts(const char *s)
-{
- while (*s) {
- putc(*s);
- if (*s == '\n')
- putc('\r');
- s++;
- }
-}
-
-/*
- * nothing to do
- */
-#define arch_decomp_setup()
-#define arch_decomp_wdog()
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-adifcc/vmalloc.h
- */
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_END (0xe8000000)
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-cl7500/ide.h
- *
- * Copyright (c) 1997 Russell King
- *
- * Modifications:
- * 29-07-1998 RMK Major re-work of IDE architecture specific code
- */
-#include <asm/irq.h>
-#include <asm/arch/hardware.h>
-
-/*
- * Set up a hw structure for a specified data port, control port and IRQ.
- * This should follow whatever the default interface uses.
- */
-static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
- unsigned long ctrl_port, int *irq)
-{
- unsigned long reg = data_port;
- int i;
-
- memset(hw, 0, sizeof(*hw));
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- if (ctrl_port) {
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- } else {
- hw->io_ports[IDE_CONTROL_OFFSET] = data_port + 0x206;
- }
- if (irq != NULL)
- *irq = 0;
- hw->io_ports[IDE_IRQ_OFFSET] = 0;
-}
-
-/*
- * This registers the standard ports for this architecture with the IDE
- * driver.
- */
-static __inline__ void
-ide_init_default_hwifs(void)
-{
- hw_regs_t hw;
-
- ide_init_hwif_ports(&hw, ISASLOT_IO + 0x1f0, ISASLOT_IO + 0x3f6, NULL);
- hw.irq = IRQ_ISA_14;
- ide_register_hw(&hw);
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-cl7500/keyboard.h
- * from linux/include/asm-arm/arch-rpc/keyboard.h
- *
- * Keyboard driver definitions for CL7500 architecture
- *
- * Copyright (C) 1998-2001 Russell King
- */
-#include <asm/irq.h>
-#define NR_SCANCODES 128
-
-extern int ps2kbd_init_hw(void);
-
-#define kbd_disable_irq() disable_irq(IRQ_KEYBOARDRX)
-#define kbd_enable_irq() enable_irq(IRQ_KEYBOARDRX)
-#define kbd_init_hw() ps2kbd_init_hw()
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-cl7500/serial.h
- *
- * Copyright (c) 1996 Russell King.
- * Copyright (C) 1999 Nexus Electronics Ltd.
- *
- * Changelog:
- * 15-10-1996 RMK Created
- * 10-08-1999 PJB Added COM3/COM4 for CL7500
- */
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-#include <asm/arch/hardware.h>
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD (1843200 / 16)
-
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
- /* UART CLK PORT IRQ FLAGS */
-#define STD_SERIAL_PORT_DEFNS \
- { 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x2F8, 0, STD_COM_FLAGS }, /* ttyS1 */ \
- /* ISA Slot Serial ports */ \
- { 0, BASE_BAUD, ISASLOT_IO + 0x2e8, 41, STD_COM_FLAGS }, /* ttyS2 */ \
- { 0, BASE_BAUD, ISASLOT_IO + 0x3e8, 40, STD_COM_FLAGS }, /* ttyS3 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS4 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS5 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS6 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS7 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS8 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS9 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS10 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS11 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS12 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS13 */
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-cl7500/time.h
- *
- * Copyright (c) 1996-2000 Russell King.
- *
- * Changelog:
- * 24-Sep-1996 RMK Created
- * 10-Oct-1996 RMK Brought up to date with arch-sa110eval
- * 04-Dec-1997 RMK Updated for new arch/arm/time.c
- */
-
-extern void ioctime_init(void);
-
-static irqreturn_t
-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- do_timer(regs);
- do_set_rtc();
- do_profile(regs);
-
- {
- /* Twinkle the lights. */
- static int count, state = 0xff00;
- if (count-- == 0) {
- state ^= 0x100;
- count = 25;
- *((volatile unsigned int *)LED_ADDRESS) = state;
- }
- }
- return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt.
- */
-void __init time_init(void)
-{
- ioctime_init();
-
- timer_irq.handler = timer_interrupt;
-
- setup_irq(IRQ_TIMER, &timer_irq);
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-clps711x/keyboard.h
- *
- * Copyright (C) 1998-2001 Russell King
- */
-#include <asm/mach-types.h>
-
-#define NR_SCANCODES 128
-
-#define kbd_disable_irq() do { } while (0)
-#define kbd_enable_irq() do { } while (0)
-
-/*
- * EDB7211 keyboard driver
- */
-extern void edb7211_kbd_init_hw(void);
-extern void clps711x_kbd_init_hw(void);
-
-static inline void kbd_init_hw(void)
-{
- if (machine_is_edb7211())
- edb7211_kbd_init_hw();
-
- if (machine_is_autcpu12())
- clps711x_kbd_init_hw();
-}
+++ /dev/null
-/* no ide */
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-ebsa110/serial.h
- *
- * Copyright (C) 1996,1997,1998 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 15-10-1996 RMK Created
- */
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD (1843200 / 16)
-
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
- /* UART CLK PORT IRQ FLAGS */
-#define STD_SERIAL_PORT_DEFNS \
- { 0, BASE_BAUD, 0x3F8, 1, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x2F8, 2, STD_COM_FLAGS } /* ttyS1 */
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-ebsa110/time.h
- *
- * Copyright (C) 1996,1997,1998 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * No real time clock on the evalulation board!
- *
- * Changelog:
- * 10-Oct-1996 RMK Created
- * 04-Dec-1997 RMK Updated for new arch/arm/kernel/time.c
- * 07-Aug-1998 RMK Updated for arch/arm/kernel/leds.c
- * 28-Dec-1998 APH Made leds code optional
- */
-
-#include <asm/leds.h>
-#include <asm/io.h>
-
-extern unsigned long (*gettimeoffset)(void);
-
-#define PIT_CTRL (PIT_BASE + 0x0d)
-#define PIT_T2 (PIT_BASE + 0x09)
-#define PIT_T1 (PIT_BASE + 0x05)
-#define PIT_T0 (PIT_BASE + 0x01)
-
-/*
- * This is the rate at which your MCLK signal toggles (in Hz)
- * This was measured on a 10 digit frequency counter sampling
- * over 1 second.
- */
-#define MCLK 47894000
-
-/*
- * This is the rate at which the PIT timers get clocked
- */
-#define CLKBY7 (MCLK / 7)
-
-/*
- * This is the counter value. We tick at 200Hz on this platform.
- */
-#define COUNT ((CLKBY7 + (HZ / 2)) / HZ)
-
-/*
- * Get the time offset from the system PIT. Note that if we have missed an
- * interrupt, then the PIT counter will roll over (ie, be negative).
- * This actually works out to be convenient.
- */
-static unsigned long ebsa110_gettimeoffset(void)
-{
- unsigned long offset, count;
-
- __raw_writeb(0x40, PIT_CTRL);
- count = __raw_readb(PIT_T1);
- count |= __raw_readb(PIT_T1) << 8;
-
- /*
- * If count > COUNT, make the number negative.
- */
- if (count > COUNT)
- count |= 0xffff0000;
-
- offset = COUNT;
- offset -= count;
-
- /*
- * `offset' is in units of timer counts. Convert
- * offset to units of microseconds.
- */
- offset = offset * (1000000 / HZ) / COUNT;
-
- return offset;
-}
-
-static irqreturn_t
-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- u32 count;
-
- /* latch and read timer 1 */
- __raw_writeb(0x40, PIT_CTRL);
- count = __raw_readb(PIT_T1);
- count |= __raw_readb(PIT_T1) << 8;
-
- count += COUNT;
-
- __raw_writeb(count & 0xff, PIT_T1);
- __raw_writeb(count >> 8, PIT_T1);
-
- do_leds();
- do_timer(regs);
- do_profile(regs);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt.
- */
-void __init time_init(void)
-{
- /*
- * Timer 1, mode 2, LSB/MSB
- */
- __raw_writeb(0x70, PIT_CTRL);
- __raw_writeb(COUNT & 0xff, PIT_T1);
- __raw_writeb(COUNT >> 8, PIT_T1);
-
- gettimeoffset = ebsa110_gettimeoffset;
-
- timer_irq.handler = timer_interrupt;
-
- setup_irq(IRQ_EBSA110_TIMER0, &timer_irq);
-}
-
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-ebsa285/ide.h
- *
- * Copyright (C) 1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Modifications:
- * 29-07-1998 RMK Major re-work of IDE architecture specific code
- */
-#include <asm/irq.h>
-
-/*
- * Set up a hw structure for a specified data port, control port and IRQ.
- * This should follow whatever the default interface uses.
- */
-static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
- unsigned long ctrl_port, int *irq)
-{
- unsigned long reg = data_port;
- int i;
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- if (irq)
- *irq = 0;
-}
-
-/*
- * This registers the standard ports for this architecture with the IDE
- * driver.
- */
-static __inline__ void ide_init_default_hwifs(void)
-{
-#if 0
- hw_regs_t hw;
-
- memset(hw, 0, sizeof(*hw));
-
- ide_init_hwif_ports(&hw, 0x1f0, 0x3f6, NULL);
- hw.irq = IRQ_HARDDISK;
- ide_register_hw(&hw);
-#endif
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-ebsa285/serial.h
- *
- * Copyright (C) 1996,1997,1998 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 15-10-1996 RMK Created
- * 25-05-1998 PJB CATS support
- */
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-#include <asm/irq.h>
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD (1843200 / 16)
-
-#define _SER_IRQ0 IRQ_ISA_UART
-#define _SER_IRQ1 IRQ_ISA_UART2
-
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
- /* UART CLK PORT IRQ FLAGS */
-#define STD_SERIAL_PORT_DEFNS \
- { 0, BASE_BAUD, 0x3F8, _SER_IRQ0, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x2F8, _SER_IRQ1, STD_COM_FLAGS }, /* ttyS1 */
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-ebsa285/time.h
- *
- * Copyright (C) 1998 Russell King.
- * Copyright (C) 1998 Phil Blundell
- *
- * CATS has a real-time clock, though the evaluation board doesn't.
- *
- * Changelog:
- * 21-Mar-1998 RMK Created
- * 27-Aug-1998 PJB CATS support
- * 28-Dec-1998 APH Made leds optional
- * 20-Jan-1999 RMK Started merge of EBSA285, CATS and NetWinder
- * 16-Mar-1999 RMK More support for EBSA285-like machines with RTCs in
- */
-
-#define RTC_PORT(x) (rtc_base+(x))
-#define RTC_ALWAYS_BCD 0
-
-#include <linux/mc146818rtc.h>
-#include <linux/bcd.h>
-
-#include <asm/hardware/dec21285.h>
-#include <asm/leds.h>
-#include <asm/mach-types.h>
-
-static int rtc_base;
-
-#define mSEC_10_from_14 ((14318180 + 100) / 200)
-
-static unsigned long isa_gettimeoffset(void)
-{
- int count;
-
- static int count_p = (mSEC_10_from_14/6); /* for the first call after boot */
- static unsigned long jiffies_p = 0;
-
- /*
- * cache volatile jiffies temporarily; we have IRQs turned off.
- */
- unsigned long jiffies_t;
-
- /* timer count may underflow right here */
- outb_p(0x00, 0x43); /* latch the count ASAP */
-
- count = inb_p(0x40); /* read the latched count */
-
- /*
- * We do this guaranteed double memory access instead of a _p
- * postfix in the previous port access. Wheee, hackady hack
- */
- jiffies_t = jiffies;
-
- count |= inb_p(0x40) << 8;
-
- /* Detect timer underflows. If we haven't had a timer tick since
- the last time we were called, and time is apparently going
- backwards, the counter must have wrapped during this routine. */
- if ((jiffies_t == jiffies_p) && (count > count_p))
- count -= (mSEC_10_from_14/6);
- else
- jiffies_p = jiffies_t;
-
- count_p = count;
-
- count = (((mSEC_10_from_14/6)-1) - count) * (tick_nsec / 1000);
- count = (count + (mSEC_10_from_14/6)/2) / (mSEC_10_from_14/6);
-
- return count;
-}
-
-static irqreturn_t
-isa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- if (machine_is_netwinder())
- do_leds();
-
- do_timer(regs);
- do_set_rtc();
- do_profile(regs);
-
- return IRQ_HANDLED;
-}
-
-static unsigned long __init get_isa_cmos_time(void)
-{
- unsigned int year, mon, day, hour, min, sec;
- int i;
-
- // check to see if the RTC makes sense.....
- if ((CMOS_READ(RTC_VALID) & RTC_VRT) == 0)
- return mktime(1970, 1, 1, 0, 0, 0);
-
- /* The Linux interpretation of the CMOS clock register contents:
- * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
- * RTC registers show the second which has precisely just started.
- * Let's hope other operating systems interpret the RTC the same way.
- */
- /* read RTC exactly on falling edge of update flag */
- for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
- if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
- break;
-
- for (i = 0 ; i < 1000000 ; i++) /* must try at least 2.228 ms */
- if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
- break;
-
- do { /* Isn't this overkill ? UIP above should guarantee consistency */
- sec = CMOS_READ(RTC_SECONDS);
- min = CMOS_READ(RTC_MINUTES);
- hour = CMOS_READ(RTC_HOURS);
- day = CMOS_READ(RTC_DAY_OF_MONTH);
- mon = CMOS_READ(RTC_MONTH);
- year = CMOS_READ(RTC_YEAR);
- } while (sec != CMOS_READ(RTC_SECONDS));
-
- if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
- BCD_TO_BIN(sec);
- BCD_TO_BIN(min);
- BCD_TO_BIN(hour);
- BCD_TO_BIN(day);
- BCD_TO_BIN(mon);
- BCD_TO_BIN(year);
- }
- if ((year += 1900) < 1970)
- year += 100;
- return mktime(year, mon, day, hour, min, sec);
-}
-
-static int
-set_isa_cmos_time(void)
-{
- int retval = 0;
- int real_seconds, real_minutes, cmos_minutes;
- unsigned char save_control, save_freq_select;
- unsigned long nowtime = xtime.tv_sec;
-
- save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
- CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
-
- save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
- CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
-
- cmos_minutes = CMOS_READ(RTC_MINUTES);
- if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
- BCD_TO_BIN(cmos_minutes);
-
- /*
- * since we're only adjusting minutes and seconds,
- * don't interfere with hour overflow. This avoids
- * messing with unknown time zones but requires your
- * RTC not to be off by more than 15 minutes
- */
- real_seconds = nowtime % 60;
- real_minutes = nowtime / 60;
- if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
- real_minutes += 30; /* correct for half hour time zone */
- real_minutes %= 60;
-
- if (abs(real_minutes - cmos_minutes) < 30) {
- if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
- BIN_TO_BCD(real_seconds);
- BIN_TO_BCD(real_minutes);
- }
- CMOS_WRITE(real_seconds,RTC_SECONDS);
- CMOS_WRITE(real_minutes,RTC_MINUTES);
- } else
- retval = -1;
-
- /* The following flags have to be released exactly in this order,
- * otherwise the DS12887 (popular MC146818A clone with integrated
- * battery and quartz) will not reset the oscillator and will not
- * update precisely 500 ms later. You won't find this mentioned in
- * the Dallas Semiconductor data sheets, but who believes data
- * sheets anyway ... -- Markus Kuhn
- */
- CMOS_WRITE(save_control, RTC_CONTROL);
- CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
-
- return retval;
-}
-
-
-static unsigned long timer1_latch;
-
-static unsigned long timer1_gettimeoffset (void)
-{
- unsigned long value = timer1_latch - *CSR_TIMER1_VALUE;
-
- return ((tick_nsec / 1000) * value) / timer1_latch;
-}
-
-static irqreturn_t
-timer1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- *CSR_TIMER1_CLR = 0;
-
- /* Do the LEDs things */
- do_leds();
- do_timer(regs);
- do_set_rtc();
- do_profile(regs);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt.
- */
-void __init time_init(void)
-{
- int irq;
-
- if (machine_is_co285() ||
- machine_is_personal_server())
- /*
- * Add-in 21285s shouldn't access the RTC
- */
- rtc_base = 0;
- else
- rtc_base = 0x70;
-
- if (rtc_base) {
- int reg_d, reg_b;
-
- /*
- * Probe for the RTC.
- */
- reg_d = CMOS_READ(RTC_REG_D);
-
- /*
- * make sure the divider is set
- */
- CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A);
-
- /*
- * Set control reg B
- * (24 hour mode, update enabled)
- */
- reg_b = CMOS_READ(RTC_REG_B) & 0x7f;
- reg_b |= 2;
- CMOS_WRITE(reg_b, RTC_REG_B);
-
- if ((CMOS_READ(RTC_REG_A) & 0x7f) == RTC_REF_CLCK_32KHZ &&
- CMOS_READ(RTC_REG_B) == reg_b) {
- struct timespec tv;
-
- /*
- * We have a RTC. Check the battery
- */
- if ((reg_d & 0x80) == 0)
- printk(KERN_WARNING "RTC: *** warning: CMOS battery bad\n");
-
- tv.tv_nsec = 0;
- tv.tv_sec = get_isa_cmos_time();
- do_settimeofday(&tv);
- set_rtc = set_isa_cmos_time;
- } else
- rtc_base = 0;
- }
-
- if (machine_is_ebsa285() ||
- machine_is_co285() ||
- machine_is_personal_server()) {
- gettimeoffset = timer1_gettimeoffset;
-
- timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
-
- *CSR_TIMER1_CLR = 0;
- *CSR_TIMER1_LOAD = timer1_latch;
- *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16;
-
- timer_irq.handler = timer1_interrupt;
- irq = IRQ_TIMER1;
- } else {
- /* enable PIT timer */
- /* set for periodic (4) and LSB/MSB write (0x30) */
- outb(0x34, 0x43);
- outb((mSEC_10_from_14/6) & 0xFF, 0x40);
- outb((mSEC_10_from_14/6) >> 8, 0x40);
-
- gettimeoffset = isa_gettimeoffset;
- timer_irq.handler = isa_timer_interrupt;
- irq = IRQ_ISA_TIMER;
- }
- setup_irq(irq, &timer_irq);
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-epxa10db/serial.h
- *
- * Copyright (C) 1999 ARM Limited
- * Copyright (C) 2001 Altera Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-#include <asm/arch/platform.h>
-#include <asm/irq.h>
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD (1 / 16)
-
-#define _SER_IRQ0 IRQ_UARTINT0
-#define _SER_IRQ1 IRQ_UARTINT1
-
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
- /* UART CLK PORT IRQ FLAGS */
-#define STD_SERIAL_PORT_DEFNS \
- { 0, BASE_BAUD, 0x3F8, _SER_IRQ0, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x2F8, _SER_IRQ1, STD_COM_FLAGS }, /* ttyS1 */
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-epxa10db/time.h
- *
- * Copyright (C) 2001 Altera Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <asm/system.h>
-#include <asm/leds.h>
-#include <asm/arch/hardware.h>
-#define TIMER00_TYPE (volatile unsigned int*)
-#include <asm/arch/timer00.h>
-
-
-/*
- * IRQ handler for the timer
- */
-static irqreturn_t
-excalibur_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-
- // ...clear the interrupt
- *TIMER0_CR(IO_ADDRESS(EXC_TIMER00_BASE))|=TIMER0_CR_CI_MSK;
-
- do_leds();
- do_timer(regs);
- do_profile(regs);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-void __init time_init(void)
-{
- timer_irq.handler = excalibur_timer_interrupt;
-
- /*
- * Make irqs happen for the system timer
- */
- setup_irq(IRQ_TIMER0, &timer_irq);
-
- /* Start the timer */
- *TIMER0_LIMIT(IO_ADDRESS(EXC_TIMER00_BASE))=(unsigned int)(EXC_AHB2_CLK_FREQUENCY/200);
- *TIMER0_PRESCALE(IO_ADDRESS(EXC_TIMER00_BASE))=1;
- *TIMER0_CR(IO_ADDRESS(EXC_TIMER00_BASE))=TIMER0_CR_IE_MSK | TIMER0_CR_S_MSK;
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-h72x/serial.h
- *
- * Copyright (C) 2003 Thomas Gleixner <tglx@linutronix.de>
- * 2003 Robert Schwebel <r.schwebel@pengutronix.de>
- *
- * Serial port setup for Hynix boards
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-#include <asm/arch/irqs.h>
-
-/*
- * Standard COM flags
- */
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-#define RS_TABLE_SIZE
-
-/* Base clock is 3.6864 MHz */
-#define BASE_BAUD (115200*2)
-#define EXTRA_SERIAL_PORT_DEFNS
-
-/*
- * Board dependend defines
- */
-#if defined (CONFIG_CPU_H7201)
-#define BASE_BAUD_P3C (115200)
-
-#define STD_SERIAL_PORT_DEFNS \
- { \
- .baud_base = BASE_BAUD, \
- .port = SERIAL0_BASE, \
- .iomem_base = (u8*)SERIAL0_BASE, \
- .io_type = UPIO_MEM, \
- .irq = IRQ_UART0, \
- .flags = STD_COM_FLAGS, \
- .iomem_reg_shift = 2,\
- }, \
- { \
- .baud_base = BASE_BAUD, \
- .port = SERIAL1_BASE, \
- .iomem_base = (u8*)SERIAL1_BASE, \
- .io_type = UPIO_MEM, \
- .irq = IRQ_UART1, \
- .flags = STD_COM_FLAGS, \
- .iomem_reg_shift = 2,\
- }
-
-#elif defined (CONFIG_CPU_H7202)
-
-#define STD_SERIAL_PORT_DEFNS \
- { \
- .baud_base = BASE_BAUD, \
- .port = SERIAL0_BASE, \
- .iomem_base = (u8*)SERIAL0_BASE, \
- .io_type = UPIO_MEM, \
- .irq = IRQ_UART0, \
- .flags = STD_COM_FLAGS, \
- .iomem_reg_shift = 2,\
- }, \
- { \
- .baud_base = BASE_BAUD, \
- .port = SERIAL1_BASE, \
- .iomem_base = (u8*)SERIAL1_BASE, \
- .io_type = UPIO_MEM, \
- .irq = IRQ_UART1, \
- .flags = STD_COM_FLAGS, \
- .iomem_reg_shift = 2,\
- }, \
- { \
- .baud_base = BASE_BAUD, \
- .port = SERIAL2_BASE, \
- .iomem_base = (u8*)SERIAL2_BASE, \
- .io_type = UPIO_MEM, \
- .irq = IRQ_UART2, \
- .flags = STD_COM_FLAGS, \
- .iomem_reg_shift = 2,\
- }, \
- { \
- .baud_base = BASE_BAUD, \
- .port = SERIAL3_BASE, \
- .iomem_base = (u8*)SERIAL3_BASE, \
- .io_type = UPIO_MEM, \
- .irq = IRQ_UART3, \
- .flags = STD_COM_FLAGS, \
- .iomem_reg_shift = 2,\
- }
-
-#else
-#error machine definition mismatch
-#endif
-
-/* __ASM_ARCH_SERIAL_H */
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-imx/serial.h
- *
- * Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-#define STD_SERIAL_PORT_DEFNS
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif /* __ASM_ARCH_SERIAL_H */
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-integrator/serial.h
- *
- * Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-#include <asm/arch/platform.h>
-#include <asm/irq.h>
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD (1843200 / 16)
-
-#define _SER_IRQ0 IRQ_UARTINT0
-#define _SER_IRQ1 IRQ_UARTINT1
-
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
- /* UART CLK PORT IRQ FLAGS */
-#define STD_SERIAL_PORT_DEFNS \
- { 0, BASE_BAUD, 0x3F8, _SER_IRQ0, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x2F8, _SER_IRQ1, STD_COM_FLAGS }, /* ttyS1 */
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-integrator/time.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <asm/system.h>
-#include <asm/leds.h>
-#include <asm/mach-types.h>
-
-/*
- * Where is the timer (VA)?
- */
-#define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000)
-#define TIMER1_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000100)
-#define TIMER2_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000200)
-#define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE)
-
-/*
- * How long is the timer interval?
- */
-#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
-#if TIMER_INTERVAL >= 0x100000
-#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
-#elif TIMER_INTERVAL >= 0x10000
-#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
-#else
-#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
-#endif
-
-#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable */
-
-/*
- * What does it look like?
- */
-typedef struct TimerStruct {
- unsigned long TimerLoad;
- unsigned long TimerValue;
- unsigned long TimerControl;
- unsigned long TimerClear;
-} TimerStruct_t;
-
-extern unsigned long (*gettimeoffset)(void);
-
-static unsigned long timer_reload;
-
-/*
- * Returns number of ms since last clock interrupt. Note that interrupts
- * will have been disabled by do_gettimeoffset()
- */
-static unsigned long integrator_gettimeoffset(void)
-{
- volatile TimerStruct_t *timer1 = (TimerStruct_t *)TIMER1_VA_BASE;
- unsigned long ticks1, ticks2, status;
-
- /*
- * Get the current number of ticks. Note that there is a race
- * condition between us reading the timer and checking for
- * an interrupt. We get around this by ensuring that the
- * counter has not reloaded between our two reads.
- */
- ticks2 = timer1->TimerValue & 0xffff;
- do {
- ticks1 = ticks2;
- status = __raw_readl(VA_IC_BASE + IRQ_RAW_STATUS);
- ticks2 = timer1->TimerValue & 0xffff;
- } while (ticks2 > ticks1);
-
- /*
- * Number of ticks since last interrupt.
- */
- ticks1 = timer_reload - ticks2;
-
- /*
- * Interrupt pending? If so, we've reloaded once already.
- */
- if (status & (1 << IRQ_TIMERINT1))
- ticks1 += timer_reload;
-
- /*
- * Convert the ticks to usecs
- */
- return TICKS2USECS(ticks1);
-}
-
-/*
- * IRQ handler for the timer
- */
-static irqreturn_t
-integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE;
-
- // ...clear the interrupt
- timer1->TimerClear = 1;
-
- do_leds();
- do_timer(regs);
- do_profile(regs);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-void __init time_init(void)
-{
- volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE;
- volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE;
- volatile TimerStruct_t *timer2 = (volatile TimerStruct_t *)TIMER2_VA_BASE;
- unsigned int timer_ctrl = 0x80 | 0x40; /* periodic */
-
- if (machine_is_integrator()) {
- timer_reload = 1000000 * TICKS_PER_uSEC / HZ;
- } else if (machine_is_cintegrator()) {
- timer_reload = 1000000 / HZ;
- timer_ctrl |= TIMER_CTRL_IE;
- }
- if (timer_reload > 0x100000) {
- timer_reload >>= 8;
- timer_ctrl |= 0x08; /* /256 */
- } else if (timer_reload > 0x010000) {
- timer_reload >>= 4;
- timer_ctrl |= 0x04; /* /16 */
- }
-
- /*
- * Initialise to a known state (all timers off)
- */
- timer0->TimerControl = 0;
- timer1->TimerControl = 0;
- timer2->TimerControl = 0;
-
- timer1->TimerLoad = timer_reload;
- timer1->TimerValue = timer_reload;
- timer1->TimerControl = timer_ctrl;
-
- /*
- * Make irqs happen for the system timer
- */
- timer_irq.handler = integrator_timer_interrupt;
- setup_irq(IRQ_TIMERINT1, &timer_irq);
- gettimeoffset = integrator_gettimeoffset;
-}
+++ /dev/null
-/*
- * include/asm-arm/arch-iop3xx/ide.h
- *
- * Generic IDE functions for IOP310 systems
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * 09/26/2001 - Sharon Baartmans
- * Fixed so it actually works.
- */
-
-#ifndef _ASM_ARCH_IDE_H_
-#define _ASM_ARCH_IDE_H_
-
-/*
- * Set up a hw structure for a specified data port, control port and IRQ.
- * This should follow whatever the default interface uses.
- */
-static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
- unsigned long ctrl_port, int *irq)
-{
- unsigned long reg = data_port;
- int i;
- int regincr = 1;
-
- memset(hw, 0, sizeof(*hw));
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += regincr;
- }
-
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
-
- if (irq) *irq = 0;
-}
-
-/*
- * This registers the standard ports for this architecture with the IDE
- * driver.
- */
-static __inline__ void ide_init_default_hwifs(void)
-{
- /* There are no standard ports */
-}
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-iop310/irqs.h
- *
- * Author: Nicolas Pitre
- * Copyright: (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * 06/13/01: Added 80310 on-chip interrupt sources <dsaxena@mvista.com>
- *
- */
-#include <linux/config.h>
-
-/*
- * XS80200 specific IRQs
- */
-#define IRQ_XS80200_BCU 0 /* Bus Control Unit */
-#define IRQ_XS80200_PMU 1 /* Performance Monitoring Unit */
-#define IRQ_XS80200_EXTIRQ 2 /* external IRQ signal */
-#define IRQ_XS80200_EXTFIQ 3 /* external IRQ signal */
-
-#define NR_XS80200_IRQS 4
-
-#define XSCALE_PMU_IRQ IRQ_XS80200_PMU
-
-/*
- * IOP80310 chipset interrupts
- */
-#define IOP310_IRQ_OFS NR_XS80200_IRQS
-#define IOP310_IRQ(x) (IOP310_IRQ_OFS + (x))
-
-/*
- * On FIQ1ISR register
- */
-#define IRQ_IOP310_DMA0 IOP310_IRQ(0) /* DMA Channel 0 */
-#define IRQ_IOP310_DMA1 IOP310_IRQ(1) /* DMA Channel 1 */
-#define IRQ_IOP310_DMA2 IOP310_IRQ(2) /* DMA Channel 2 */
-#define IRQ_IOP310_PMON IOP310_IRQ(3) /* Bus performance Unit */
-#define IRQ_IOP310_AAU IOP310_IRQ(4) /* Application Accelator Unit */
-
-/*
- * On FIQ2ISR register
- */
-#define IRQ_IOP310_I2C IOP310_IRQ(5) /* I2C unit */
-#define IRQ_IOP310_MU IOP310_IRQ(6) /* messaging unit */
-
-#define NR_IOP310_IRQS (IOP310_IRQ(6) + 1)
-
-#define NR_IRQS NR_IOP310_IRQS
-
-
-/*
- * Interrupts available on the Cyclone IQ80310 board
- */
-#ifdef CONFIG_ARCH_IQ80310
-
-#define IQ80310_IRQ_OFS NR_IOP310_IRQS
-#define IQ80310_IRQ(y) ((IQ80310_IRQ_OFS) + (y))
-
-#define IRQ_IQ80310_TIMER IQ80310_IRQ(0) /* Timer Interrupt */
-#define IRQ_IQ80310_I82559 IQ80310_IRQ(1) /* I82559 Ethernet Interrupt */
-#define IRQ_IQ80310_UART1 IQ80310_IRQ(2) /* UART1 Interrupt */
-#define IRQ_IQ80310_UART2 IQ80310_IRQ(3) /* UART2 Interrupt */
-#define IRQ_IQ80310_INTD IQ80310_IRQ(4) /* PCI INTD */
-
-
-/*
- * ONLY AVAILABLE ON REV F OR NEWER BOARDS!
- */
-#define IRQ_IQ80310_INTA IQ80310_IRQ(5) /* PCI INTA */
-#define IRQ_IQ80310_INTB IQ80310_IRQ(6) /* PCI INTB */
-#define IRQ_IQ80310_INTC IQ80310_IRQ(7) /* PCI INTC */
-
-#undef NR_IRQS
-#define NR_IRQS (IQ80310_IRQ(7) + 1)
-
-#endif // CONFIG_ARCH_IQ80310
-
+++ /dev/null
-/*
- * linux/include/asm/arch-iop3xx/iop310.h
- *
- * Intel IOP310 Companion Chip definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _IOP310_HW_H_
-#define _IOP310_HW_H_
-
-/*
- * This is needed for mixed drivers that need to work on all
- * IOP3xx variants but behave slightly differently on each.
- */
-#ifndef __ASSEMBLY__
-#define iop_is_310() ((processor_id & 0xffffe3f0) == 0x69052000)
-#endif
-
-/*
- * IOP310 I/O and Mem space regions for PCI autoconfiguration
- */
-#define IOP310_PCISEC_LOWER_IO 0x90010000
-#define IOP310_PCISEC_UPPER_IO 0x9001ffff
-#define IOP310_PCISEC_LOWER_MEM 0x88000000
-#define IOP310_PCISEC_UPPER_MEM 0x8bffffff
-
-#define IOP310_PCIPRI_LOWER_IO 0x90000000
-#define IOP310_PCIPRI_UPPER_IO 0x9000ffff
-#define IOP310_PCIPRI_LOWER_MEM 0x80000000
-#define IOP310_PCIPRI_UPPER_MEM 0x83ffffff
-
-#define IOP310_PCI_WINDOW_SIZE 64 * 0x100000
-
-/*
- * IOP310 chipset registers
- */
-#define IOP310_VIRT_MEM_BASE 0xe8001000 /* chip virtual mem address*/
-#define IOP310_PHY_MEM_BASE 0x00001000 /* chip physical memory address */
-#define IOP310_REG_ADDR(reg) (IOP310_VIRT_MEM_BASE | IOP310_PHY_MEM_BASE | (reg))
-
-/* PCI-to-PCI Bridge Unit 0x00001000 through 0x000010FF */
-#define IOP310_VIDR (volatile u16 *)IOP310_REG_ADDR(0x00001000)
-#define IOP310_DIDR (volatile u16 *)IOP310_REG_ADDR(0x00001002)
-#define IOP310_PCR (volatile u16 *)IOP310_REG_ADDR(0x00001004)
-#define IOP310_PSR (volatile u16 *)IOP310_REG_ADDR(0x00001006)
-#define IOP310_RIDR (volatile u8 *)IOP310_REG_ADDR(0x00001008)
-#define IOP310_CCR (volatile u32 *)IOP310_REG_ADDR(0x00001009)
-#define IOP310_CLSR (volatile u8 *)IOP310_REG_ADDR(0x0000100C)
-#define IOP310_PLTR (volatile u8 *)IOP310_REG_ADDR(0x0000100D)
-#define IOP310_HTR (volatile u8 *)IOP310_REG_ADDR(0x0000100E)
-/* Reserved 0x0000100F through 0x00001017 */
-#define IOP310_PBNR (volatile u8 *)IOP310_REG_ADDR(0x00001018)
-#define IOP310_SBNR (volatile u8 *)IOP310_REG_ADDR(0x00001019)
-#define IOP310_SUBBNR (volatile u8 *)IOP310_REG_ADDR(0x0000101A)
-#define IOP310_SLTR (volatile u8 *)IOP310_REG_ADDR(0x0000101B)
-#define IOP310_IOBR (volatile u8 *)IOP310_REG_ADDR(0x0000101C)
-#define IOP310_IOLR (volatile u8 *)IOP310_REG_ADDR(0x0000101D)
-#define IOP310_SSR (volatile u16 *)IOP310_REG_ADDR(0x0000101E)
-#define IOP310_MBR (volatile u16 *)IOP310_REG_ADDR(0x00001020)
-#define IOP310_MLR (volatile u16 *)IOP310_REG_ADDR(0x00001022)
-#define IOP310_PMBR (volatile u16 *)IOP310_REG_ADDR(0x00001024)
-#define IOP310_PMLR (volatile u16 *)IOP310_REG_ADDR(0x00001026)
-/* Reserved 0x00001028 through 0x00001033 */
-#define IOP310_CAPR (volatile u8 *)IOP310_REG_ADDR(0x00001034)
-/* Reserved 0x00001035 through 0x0000103D */
-#define IOP310_BCR (volatile u16 *)IOP310_REG_ADDR(0x0000103E)
-#define IOP310_EBCR (volatile u16 *)IOP310_REG_ADDR(0x00001040)
-#define IOP310_SISR (volatile u16 *)IOP310_REG_ADDR(0x00001042)
-#define IOP310_PBISR (volatile u32 *)IOP310_REG_ADDR(0x00001044)
-#define IOP310_SBISR (volatile u32 *)IOP310_REG_ADDR(0x00001048)
-#define IOP310_SACR (volatile u32 *)IOP310_REG_ADDR(0x0000104C)
-#define IOP310_PIRSR (volatile u32 *)IOP310_REG_ADDR(0x00001050)
-#define IOP310_SIOBR (volatile u8 *)IOP310_REG_ADDR(0x00001054)
-#define IOP310_SIOLR (volatile u8 *)IOP310_REG_ADDR(0x00001055)
-#define IOP310_SCDR (volatile u8 *)IOP310_REG_ADDR(0x00001056)
-
-#define IOP310_SMBR (volatile u16 *)IOP310_REG_ADDR(0x00001058)
-#define IOP310_SMLR (volatile u16 *)IOP310_REG_ADDR(0x0000105A)
-#define IOP310_SDER (volatile u16 *)IOP310_REG_ADDR(0x0000105C)
-#define IOP310_QCR (volatile u16 *)IOP310_REG_ADDR(0x0000105E)
-#define IOP310_CAPID (volatile u8 *)IOP310_REG_ADDR(0x00001068)
-#define IOP310_NIPTR (volatile u8 *)IOP310_REG_ADDR(0x00001069)
-#define IOP310_PMCR (volatile u16 *)IOP310_REG_ADDR(0x0000106A)
-#define IOP310_PMCSR (volatile u16 *)IOP310_REG_ADDR(0x0000106C)
-#define IOP310_PMCSRBSE (volatile u8 *)IOP310_REG_ADDR(0x0000106E)
-/* Reserved 0x00001064 through 0x000010FFH */
-
-/* Performance monitoring unit 0x00001100 through 0x000011FF*/
-#define IOP310_PMONGTMR (volatile u32 *)IOP310_REG_ADDR(0x00001100)
-#define IOP310_PMONESR (volatile u32 *)IOP310_REG_ADDR(0x00001104)
-#define IOP310_PMONEMISR (volatile u32 *)IOP310_REG_ADDR(0x00001108)
-#define IOP310_PMONGTSR (volatile u32 *)IOP310_REG_ADDR(0x00001110)
-#define IOP310_PMONPECR1 (volatile u32 *)IOP310_REG_ADDR(0x00001114)
-#define IOP310_PMONPECR2 (volatile u32 *)IOP310_REG_ADDR(0x00001118)
-#define IOP310_PMONPECR3 (volatile u32 *)IOP310_REG_ADDR(0x0000111C)
-#define IOP310_PMONPECR4 (volatile u32 *)IOP310_REG_ADDR(0x00001120)
-#define IOP310_PMONPECR5 (volatile u32 *)IOP310_REG_ADDR(0x00001124)
-#define IOP310_PMONPECR6 (volatile u32 *)IOP310_REG_ADDR(0x00001128)
-#define IOP310_PMONPECR7 (volatile u32 *)IOP310_REG_ADDR(0x0000112C)
-#define IOP310_PMONPECR8 (volatile u32 *)IOP310_REG_ADDR(0x00001130)
-#define IOP310_PMONPECR9 (volatile u32 *)IOP310_REG_ADDR(0x00001134)
-#define IOP310_PMONPECR10 (volatile u32 *)IOP310_REG_ADDR(0x00001138)
-#define IOP310_PMONPECR11 (volatile u32 *)IOP310_REG_ADDR(0x0000113C)
-#define IOP310_PMONPECR12 (volatile u32 *)IOP310_REG_ADDR(0x00001140)
-#define IOP310_PMONPECR13 (volatile u32 *)IOP310_REG_ADDR(0x00001144)
-#define IOP310_PMONPECR14 (volatile u32 *)IOP310_REG_ADDR(0x00001148)
-
-/* Address Translation Unit 0x00001200 through 0x000012FF */
-#define IOP310_ATUVID (volatile u16 *)IOP310_REG_ADDR(0x00001200)
-#define IOP310_ATUDID (volatile u16 *)IOP310_REG_ADDR(0x00001202)
-#define IOP310_PATUCMD (volatile u16 *)IOP310_REG_ADDR(0x00001204)
-#define IOP310_PATUSR (volatile u16 *)IOP310_REG_ADDR(0x00001206)
-#define IOP310_ATURID (volatile u8 *)IOP310_REG_ADDR(0x00001208)
-#define IOP310_ATUCCR (volatile u32 *)IOP310_REG_ADDR(0x00001209)
-#define IOP310_ATUCLSR (volatile u8 *)IOP310_REG_ADDR(0x0000120C)
-#define IOP310_ATULT (volatile u8 *)IOP310_REG_ADDR(0x0000120D)
-#define IOP310_ATUHTR (volatile u8 *)IOP310_REG_ADDR(0x0000120E)
-
-#define IOP310_PIABAR (volatile u32 *)IOP310_REG_ADDR(0x00001210)
-/* Reserved 0x00001214 through 0x0000122B */
-#define IOP310_ASVIR (volatile u16 *)IOP310_REG_ADDR(0x0000122C)
-#define IOP310_ASIR (volatile u16 *)IOP310_REG_ADDR(0x0000122E)
-#define IOP310_ERBAR (volatile u32 *)IOP310_REG_ADDR(0x00001230)
-#define IOP310_ATUCAPPTR (volatile u8 *)IOP310_REG_ADDR(0x00001234)
-/* Reserved 0x00001235 through 0x0000123B */
-#define IOP310_ATUILR (volatile u8 *)IOP310_REG_ADDR(0x0000123C)
-#define IOP310_ATUIPR (volatile u8 *)IOP310_REG_ADDR(0x0000123D)
-#define IOP310_ATUMGNT (volatile u8 *)IOP310_REG_ADDR(0x0000123E)
-#define IOP310_ATUMLAT (volatile u8 *)IOP310_REG_ADDR(0x0000123F)
-#define IOP310_PIALR (volatile u32 *)IOP310_REG_ADDR(0x00001240)
-#define IOP310_PIATVR (volatile u32 *)IOP310_REG_ADDR(0x00001244)
-#define IOP310_SIABAR (volatile u32 *)IOP310_REG_ADDR(0x00001248)
-#define IOP310_SIALR (volatile u32 *)IOP310_REG_ADDR(0x0000124C)
-#define IOP310_SIATVR (volatile u32 *)IOP310_REG_ADDR(0x00001250)
-#define IOP310_POMWVR (volatile u32 *)IOP310_REG_ADDR(0x00001254)
-/* Reserved 0x00001258 through 0x0000125B */
-#define IOP310_POIOWVR (volatile u32 *)IOP310_REG_ADDR(0x0000125C)
-#define IOP310_PODWVR (volatile u32 *)IOP310_REG_ADDR(0x00001260)
-#define IOP310_POUDR (volatile u32 *)IOP310_REG_ADDR(0x00001264)
-#define IOP310_SOMWVR (volatile u32 *)IOP310_REG_ADDR(0x00001268)
-#define IOP310_SOIOWVR (volatile u32 *)IOP310_REG_ADDR(0x0000126C)
-/* Reserved 0x00001270 through 0x00001273*/
-#define IOP310_ERLR (volatile u32 *)IOP310_REG_ADDR(0x00001274)
-#define IOP310_ERTVR (volatile u32 *)IOP310_REG_ADDR(0x00001278)
-/* Reserved 0x00001279 through 0x0000127C*/
-#define IOP310_ATUCAPID (volatile u8 *)IOP310_REG_ADDR(0x00001280)
-#define IOP310_ATUNIPTR (volatile u8 *)IOP310_REG_ADDR(0x00001281)
-#define IOP310_APMCR (volatile u16 *)IOP310_REG_ADDR(0x00001282)
-#define IOP310_APMCSR (volatile u16 *)IOP310_REG_ADDR(0x00001284)
-/* Reserved 0x00001286 through 0x00001287 */
-#define IOP310_ATUCR (volatile u32 *)IOP310_REG_ADDR(0x00001288)
-/* Reserved 0x00001289 through 0x0000128C*/
-#define IOP310_PATUISR (volatile u32 *)IOP310_REG_ADDR(0x00001290)
-#define IOP310_SATUISR (volatile u32 *)IOP310_REG_ADDR(0x00001294)
-#define IOP310_SATUCMD (volatile u16 *)IOP310_REG_ADDR(0x00001298)
-#define IOP310_SATUSR (volatile u16 *)IOP310_REG_ADDR(0x0000129A)
-#define IOP310_SODWVR (volatile u32 *)IOP310_REG_ADDR(0x0000129C)
-#define IOP310_SOUDR (volatile u32 *)IOP310_REG_ADDR(0x000012A0)
-#define IOP310_POCCAR (volatile u32 *)IOP310_REG_ADDR(0x000012A4)
-#define IOP310_SOCCAR (volatile u32 *)IOP310_REG_ADDR(0x000012A8)
-#define IOP310_POCCDR (volatile u32 *)IOP310_REG_ADDR(0x000012AC)
-#define IOP310_SOCCDR (volatile u32 *)IOP310_REG_ADDR(0x000012B0)
-#define IOP310_PAQCR (volatile u32 *)IOP310_REG_ADDR(0x000012B4)
-#define IOP310_SAQCR (volatile u32 *)IOP310_REG_ADDR(0x000012B8)
-#define IOP310_PATUIMR (volatile u32 *)IOP310_REG_ADDR(0x000012BC)
-#define IOP310_SATUIMR (volatile u32 *)IOP310_REG_ADDR(0x000012C0)
-/* Reserved 0x000012C4 through 0x000012FF */
-/* Messaging Unit 0x00001300 through 0x000013FF */
-#define IOP310_MUIMR0 (volatile u32 *)IOP310_REG_ADDR(0x00001310)
-#define IOP310_MUIMR1 (volatile u32 *)IOP310_REG_ADDR(0x00001314)
-#define IOP310_MUOMR0 (volatile u32 *)IOP310_REG_ADDR(0x00001318)
-#define IOP310_MUOMR1 (volatile u32 *)IOP310_REG_ADDR(0x0000131C)
-#define IOP310_MUIDR (volatile u32 *)IOP310_REG_ADDR(0x00001320)
-#define IOP310_MUIISR (volatile u32 *)IOP310_REG_ADDR(0x00001324)
-#define IOP310_MUIIMR (volatile u32 *)IOP310_REG_ADDR(0x00001328)
-#define IOP310_MUODR (volatile u32 *)IOP310_REG_ADDR(0x0000132C)
-#define IOP310_MUOISR (volatile u32 *)IOP310_REG_ADDR(0x00001330)
-#define IOP310_MUOIMR (volatile u32 *)IOP310_REG_ADDR(0x00001334)
-#define IOP310_MUMUCR (volatile u32 *)IOP310_REG_ADDR(0x00001350)
-#define IOP310_MUQBAR (volatile u32 *)IOP310_REG_ADDR(0x00001354)
-#define IOP310_MUIFHPR (volatile u32 *)IOP310_REG_ADDR(0x00001360)
-#define IOP310_MUIFTPR (volatile u32 *)IOP310_REG_ADDR(0x00001364)
-#define IOP310_MUIPHPR (volatile u32 *)IOP310_REG_ADDR(0x00001368)
-#define IOP310_MUIPTPR (volatile u32 *)IOP310_REG_ADDR(0x0000136C)
-#define IOP310_MUOFHPR (volatile u32 *)IOP310_REG_ADDR(0x00001370)
-#define IOP310_MUOFTPR (volatile u32 *)IOP310_REG_ADDR(0x00001374)
-#define IOP310_MUOPHPR (volatile u32 *)IOP310_REG_ADDR(0x00001378)
-#define IOP310_MUOPTPR (volatile u32 *)IOP310_REG_ADDR(0x0000137C)
-#define IOP310_MUIAR (volatile u32 *)IOP310_REG_ADDR(0x00001380)
-/* DMA Controller 0x00001400 through 0x000014FF */
-#define IOP310_DMA0CCR (volatile u32 *)IOP310_REG_ADDR(0x00001400)
-#define IOP310_DMA0CSR (volatile u32 *)IOP310_REG_ADDR(0x00001404)
-/* Reserved 0x001408 through 0x00140B */
-#define IOP310_DMA0DAR (volatile u32 *)IOP310_REG_ADDR(0x0000140C)
-#define IOP310_DMA0NDAR (volatile u32 *)IOP310_REG_ADDR(0x00001410)
-#define IOP310_DMA0PADR (volatile u32 *)IOP310_REG_ADDR(0x00001414)
-#define IOP310_DMA0PUADR (volatile u32 *)IOP310_REG_ADDR(0x00001418)
-#define IOP310_DMA0LADR (volatile u32 *)IOP310_REG_ADDR(0x0000141C)
-#define IOP310_DMA0BCR (volatile u32 *)IOP310_REG_ADDR(0x00001420)
-#define IOP310_DMA0DCR (volatile u32 *)IOP310_REG_ADDR(0x00001424)
-/* Reserved 0x00001428 through 0x0000143F */
-#define IOP310_DMA1CCR (volatile u32 *)IOP310_REG_ADDR(0x00001440)
-#define IOP310_DMA1CSR (volatile u32 *)IOP310_REG_ADDR(0x00001444)
-/* Reserved 0x00001448 through 0x0000144B */
-#define IOP310_DMA1DAR (volatile u32 *)IOP310_REG_ADDR(0x0000144C)
-#define IOP310_DMA1NDAR (volatile u32 *)IOP310_REG_ADDR(0x00001450)
-#define IOP310_DMA1PADR (volatile u32 *)IOP310_REG_ADDR(0x00001454)
-#define IOP310_DMA1PUADR (volatile u32 *)IOP310_REG_ADDR(0x00001458)
-#define IOP310_DMA1LADR (volatile u32 *)IOP310_REG_ADDR(0x0000145C)
-#define IOP310_DMA1BCR (volatile u32 *)IOP310_REG_ADDR(0x00001460)
-#define IOP310_DMA1DCR (volatile u32 *)IOP310_REG_ADDR(0x00001464)
-/* Reserved 0x00001468 through 0x0000147F */
-#define IOP310_DMA2CCR (volatile u32 *)IOP310_REG_ADDR(0x00001480)
-#define IOP310_DMA2CSR (volatile u32 *)IOP310_REG_ADDR(0x00001484)
-/* Reserved 0x00001488 through 0x0000148B */
-#define IOP310_DMA2DAR (volatile u32 *)IOP310_REG_ADDR(0x0000148C)
-#define IOP310_DMA2NDAR (volatile u32 *)IOP310_REG_ADDR(0x00001490)
-#define IOP310_DMA2PADR (volatile u32 *)IOP310_REG_ADDR(0x00001494)
-#define IOP310_DMA2PUADR (volatile u32 *)IOP310_REG_ADDR(0x00001498)
-#define IOP310_DMA2LADR (volatile u32 *)IOP310_REG_ADDR(0x0000149C)
-#define IOP310_DMA2BCR (volatile u32 *)IOP310_REG_ADDR(0x000014A0)
-#define IOP310_DMA2DCR (volatile u32 *)IOP310_REG_ADDR(0x000014A4)
-
-/* Memory controller 0x00001500 through 0x0015FF */
-
-/* core interface unit 0x00001640 - 0x0000167F */
-#define IOP310_CIUISR (volatile u32 *)IOP310_REG_ADDR(0x00001644)
-
-/* PCI and Peripheral Interrupt Controller 0x00001700 - 0x0000171B */
-#define IOP310_IRQISR (volatile u32 *)IOP310_REG_ADDR(0x00001700)
-#define IOP310_FIQ2ISR (volatile u32 *)IOP310_REG_ADDR(0x00001704)
-#define IOP310_FIQ1ISR (volatile u32 *)IOP310_REG_ADDR(0x00001708)
-#define IOP310_PDIDR (volatile u32 *)IOP310_REG_ADDR(0x00001710)
-
-/* AAU registers. DJ 0x00001800 - 0x00001838 */
-#define IOP310_AAUACR (volatile u32 *)IOP310_REG_ADDR(0x00001800)
-#define IOP310_AAUASR (volatile u32 *)IOP310_REG_ADDR(0x00001804)
-#define IOP310_AAUADAR (volatile u32 *)IOP310_REG_ADDR(0x00001808)
-#define IOP310_AAUANDAR (volatile u32 *)IOP310_REG_ADDR(0x0000180C)
-#define IOP310_AAUSAR1 (volatile u32 *)IOP310_REG_ADDR(0x00001810)
-#define IOP310_AAUSAR2 (volatile u32 *)IOP310_REG_ADDR(0x00001814)
-#define IOP310_AAUSAR3 (volatile u32 *)IOP310_REG_ADDR(0x00001818)
-#define IOP310_AAUSAR4 (volatile u32 *)IOP310_REG_ADDR(0x0000181C)
-#define IOP310_AAUDAR (volatile u32 *)IOP310_REG_ADDR(0x00001820)
-#define IOP310_AAUABCR (volatile u32 *)IOP310_REG_ADDR(0x00001824)
-#define IOP310_AAUADCR (volatile u32 *)IOP310_REG_ADDR(0x00001828)
-#define IOP310_AAUSAR5 (volatile u32 *)IOP310_REG_ADDR(0x0000182C)
-#define IOP310_AAUSAR6 (volatile u32 *)IOP310_REG_ADDR(0x00001830)
-#define IOP310_AAUSAR7 (volatile u32 *)IOP310_REG_ADDR(0x00001834)
-#define IOP310_AAUSAR8 (volatile u32 *)IOP310_REG_ADDR(0x00001838)
-
-#endif // _IOP310_HW_H_
+++ /dev/null
-/*
- * linux/include/asm/arch-iop80310/iq80310.h
- *
- * Intel IQ-80310 evaluation board registers
- */
-
-#ifndef _IQ80310_H_
-#define _IQ80310_H_
-
-#define IQ80310_RAMBASE 0xa0000000
-#define IQ80310_UART1 0xfe800000 /* UART #1 */
-#define IQ80310_UART2 0xfe810000 /* UART #2 */
-#define IQ80310_INT_STAT 0xfe820000 /* Interrupt (XINT3#) Status */
-#define IQ80310_BOARD_REV 0xfe830000 /* Board revision register */
-#define IQ80310_CPLD_REV 0xfe840000 /* CPLD revision register */
-#define IQ80310_7SEG_1 0xfe840000 /* 7-Segment MSB */
-#define IQ80310_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */
-#define IQ80310_PCI_INT_STAT 0xfe850000 /* PCI Interrupt Status */
-#define IQ80310_INT_MASK 0xfe860000 /* Interrupt (XINT3#) Mask */
-#define IQ80310_BACKPLANE 0xfe870000 /* Backplane Detect */
-#define IQ80310_TIMER_LA0 0xfe880000 /* Timer LA0 */
-#define IQ80310_TIMER_LA1 0xfe890000 /* Timer LA1 */
-#define IQ80310_TIMER_LA2 0xfe8a0000 /* Timer LA2 */
-#define IQ80310_TIMER_LA3 0xfe8b0000 /* Timer LA3 */
-#define IQ80310_TIMER_EN 0xfe8c0000 /* Timer Enable */
-#define IQ80310_ROTARY_SW 0xfe8d0000 /* Rotary Switch */
-#define IQ80310_JTAG 0xfe8e0000 /* JTAG Port Access */
-#define IQ80310_BATT_STAT 0xfe8f0000 /* Battery Status */
-
-#endif // _IQ80310_H_
+++ /dev/null
-/*
- * Definitions for XScale 80312 PMON
- * (C) 2001 Intel Corporation
- * Author: Chen Chen(chen.chen@intel.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _IOP310_PMON_H_
-#define _IOP310_PMON_H_
-
-/*
- * Different modes for Event Select Register for intel 80312
- */
-
-#define IOP310_PMON_MODE0 0x00000000
-#define IOP310_PMON_MODE1 0x00000001
-#define IOP310_PMON_MODE2 0x00000002
-#define IOP310_PMON_MODE3 0x00000003
-#define IOP310_PMON_MODE4 0x00000004
-#define IOP310_PMON_MODE5 0x00000005
-#define IOP310_PMON_MODE6 0x00000006
-#define IOP310_PMON_MODE7 0x00000007
-
-typedef struct _iop310_pmon_result
-{
- u32 timestamp; /* Global Time Stamp Register */
- u32 timestamp_overflow; /* Time Stamp overflow count */
- u32 event_count[14]; /* Programmable Event Counter
- Registers 1-14 */
- u32 event_overflow[14]; /* Overflow counter for PECR1-14 */
-} iop310_pmon_res_t;
-
-/* function prototypes */
-
-/* Claim IQ80312 PMON for usage */
-int iop310_pmon_claim(void);
-
-/* Start IQ80312 PMON */
-int iop310_pmon_start(int, int);
-
-/* Stop Performance Monitor Unit */
-int iop310_pmon_stop(iop310_pmon_res_t *);
-
-/* Release IQ80312 PMON */
-int iop310_pmon_release(int);
-
-#endif
+++ /dev/null
-/*
- * include/asm-arm/arch-iop3xx/serial.h
- */
-#include <linux/config.h>
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD ( 1843200 / 16 )
-
-/* Standard COM flags */
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-#ifdef CONFIG_ARCH_IQ80321
-
-#define IRQ_UART1 IRQ_IQ80321_UART
-
-#define RS_TABLE_SIZE 1
-
-#define STD_SERIAL_PORT_DEFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0xfe800000, IRQ_UART1, STD_COM_FLAGS }, /* ttyS0 */
-#endif // CONFIG_ARCH_IQ80321
-
-#ifdef CONFIG_ARCH_IQ31244
-
-#define IRQ_UART1 IRQ_IQ31244_UART
-
-#define RS_TABLE_SIZE 1
-
-#define STD_SERIAL_PORT_DEFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0xfe800000, IRQ_UART1, STD_COM_FLAGS }, /* ttyS0 */
-#endif // CONFIG_ARCH_IQ31244
-
-#ifdef CONFIG_ARCH_IQ80331
-
-#undef BASE_BAUD
-
-#define BASE_BAUD ( 33334000 / 16 )
-
-#define IRQ_UART0 IRQ_IQ80331_UART0
-#define IRQ_UART1 IRQ_IQ80331_UART1
-
-#define RS_TABLE_SIZE 2
-
-#define STD_SERIAL_PORT_DEFNS \
- { \
- /*type: PORT_XSCALE,*/ \
- /*xmit_fifo_size: 32,*/ \
- baud_base: BASE_BAUD, \
- irq: IRQ_UART0, \
- flags: STD_COM_FLAGS, \
- iomem_base: IQ80331_UART0_VIRT, \
- io_type: SERIAL_IO_MEM, \
- iomem_reg_shift: 2 \
- }, /* ttyS0 */ \
- { \
- /*type: PORT_XSCALE,*/ \
- /*xmit_fifo_size: 32,*/ \
- baud_base: BASE_BAUD, \
- irq: IRQ_UART1, \
- flags: STD_COM_FLAGS, \
- iomem_base: IQ80331_UART1_VIRT, \
- io_type: SERIAL_IO_MEM, \
- iomem_reg_shift: 2 \
- } /* ttyS1 */
-#endif // CONFIG_ARCH_IQ80331
-
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-iop80310/time.h
- *
- * Author: Nicolas Pitre
- * Copyright: (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
+++ /dev/null
-/*
- * include/asm-arm/arch-ixp2000/serial.h
- *
- * Serial port defn for ixp2000 based systems.
- *
- * Author: Deepak Saxena <dsaxena@plexity.net>
- *
- * Copyright (c) 2002-2004 MontaVista Software, Inc.
- *
- * We do not register serial ports staticly b/c there is no easy way
- * to autodetect an XScale port. Instead we register them at runtime
- * via early_serial_init().
- */
-
-#ifndef _ARCH_SERIAL_H_
-#define _ARCH_SERIAL_H_
-
-#define BASE_BAUD (50000000/ 16)
-
-/*
- * Currently no IXP2000 systems with > 3 serial ports.
- * If you add a system that does, just up this.
- */
-#define STD_SERIAL_PORT_DEFNS
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif // __ARCH_SERIAL_H_
+++ /dev/null
-/*
- * include/asm-arm/arch-ixp4xx/serial.h
- *
- * Author: Deepak Saxena <dsaxena@plexity.net>
- *
- * Copyright (C) 2002-2004 MontaVista Software, Inc.
- *
- */
-
-#ifndef _ARCH_SERIAL_H_
-#define _ARCH_SERIAL_H_
-
-/*
- * We don't hardcode our serial port information but instead
- * fill it in dynamically based on our platform in arch->map_io.
- * This allows for per-board serial ports w/o a bunch of
- * #ifdefs in this file.
- */
-#define STD_SERIAL_PORT_DEFNS
-#define EXTRA_SERIAL_PORT_DEFNS
-
-/*
- * IXP4XX uses 15.6MHz clock for uart
- */
-#define BASE_BAUD ( IXP4XX_UART_XTAL / 16 )
-
-#endif // _ARCH_SERIAL_H_
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-ixp4xx/time.h
- *
- * We implement timer code in arch/arm/mach-ixp4xx/time.c
- *
- */
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-l7200/ide.h
- *
- * Copyright (c) 2000 Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- * 03-29-2000 SJH Created file placeholder
- */
-#include <asm/irq.h>
-
-/*
- * Set up a hw structure for a specified data port, control port and IRQ.
- * This should follow whatever the default interface uses.
- */
-static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
- unsigned long ctrl_port, int *irq)
-{
-}
-
-/*
- * This registers the standard ports for this architecture with the IDE
- * driver.
- */
-static __inline__ void
-ide_init_default_hwifs(void)
-{
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-l7200/keyboard.h
- *
- * Keyboard driver definitions for LinkUp Systems L7200 architecture
- *
- * Copyright (C) 2000 Scott A McConnell (samcconn@cotw.com)
- * Steve Hill (sjhill@cotw.com)
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive for
- * more details.
- *
- * Changelog:
- * 07-18-2000 SAM Created file
- * 07-28-2000 SJH Complete rewrite
- */
-
-#include <asm/irq.h>
-
-#error This needs fixing --rmk
-
-/*
- * Layout of L7200 keyboard registers
- */
-struct KBD_Port {
- unsigned int KBDR;
- unsigned int KBDMR;
- unsigned int KBSBSR;
- unsigned int Reserved;
- unsigned int KBKSR;
-};
-
-#define KBD_BASE IO_BASE_2 + 0x4000
-#define l7200kbd_hwregs ((volatile struct KBD_Port *) (KBD_BASE))
-
-extern void l7200kbd_init_hw(void);
-extern int l7200kbd_translate(unsigned char scancode, unsigned char *keycode,
- char raw_mode);
-
-#define kbd_setkeycode(sc,kc) (-EINVAL)
-#define kbd_getkeycode(sc) (-EINVAL)
-
-#define kbd_translate(sc, kcp, rm) ({ *(kcp) = (sc); 1; })
-#define kbd_unexpected_up(kc) (0200)
-#define kbd_leds(leds) do {} while (0)
-#define kbd_init_hw() l7200kbd_init_hw()
-#define kbd_sysrq_xlate ((unsigned char *)NULL)
-#define kbd_disable_irq() disable_irq(IRQ_GCTC2)
-#define kbd_enable_irq() enable_irq(IRQ_GCTC2)
-
-#define SYSRQ_KEY 13
+++ /dev/null
-/* include/asm-arm/arch-lh7a40x/ide.h
- *
- * Copyright (C) 2004 Logic Product Development
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- */
-
-#ifndef __ASM_ARCH_IDE_H
-#define __ASM_ARCH_IDE_H
-
-#if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404)
-
-/* This implementation of ide.h only applies to the LPD CardEngines.
- * Thankfully, there is less to do for the KEV.
- */
-
-#include <linux/config.h>
-#include <asm/irq.h>
-#include <asm/hardware.h>
-#include <asm/arch/registers.h>
-
-#define IDE_REG_LINE (1<<12) /* A12 drives !REG */
-#define IDE_ALT_LINE (1<<11) /* Unused A11 allows non-overlapping regions */
-#define IDE_CONTROLREG_OFFSET (0xe)
-
-void lpd7a40x_hwif_ioops (struct hwif_s* hwif);
-
-static __inline__ void ide_init_hwif_ports (hw_regs_t *hw, int data_port,
- int ctrl_port, int *irq)
-{
- ide_ioreg_t reg;
- int i;
- int regincr = 1;
-
- memset (hw, 0, sizeof (*hw));
-
- reg = (ide_ioreg_t) data_port;
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += regincr;
- }
-
- hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
-
- if (irq)
- *irq = IDE_NO_IRQ;
-}
-
-static __inline__ void ide_init_default_hwifs (void)
-{
- hw_regs_t hw;
- struct hwif_s* hwif;
-
- ide_init_hwif_ports (&hw,
- CF_VIRT + IDE_REG_LINE,
- CF_VIRT + IDE_REG_LINE + IDE_ALT_LINE
- + IDE_CONTROLREG_OFFSET,
- NULL);
-
- ide_register_hw (&hw, &hwif);
- lpd7a40x_hwif_ioops (hwif); /* Override IO routines */
-}
-#endif
-
-#endif
+++ /dev/null
-/* include/asm-arm/arch-lh7a40x/serial.h
- *
- * Copyright (C) 2004 Coastal Environmental Systems
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- */
-
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-#include <asm/arch/registers.h>
-
-#define UART_R_DATA (0x00)
-#define UART_R_FCON (0x04)
-#define UART_R_BRCON (0x08)
-#define UART_R_CON (0x0c)
-#define UART_R_STATUS (0x10)
-#define UART_R_RAWISR (0x14)
-#define UART_R_INTEN (0x18)
-#define UART_R_ISR (0x1c)
-
-#endif /* _ASM_ARCH_SERIAL_H */
+++ /dev/null
-/* include/asm-arm/arch-lh7a40x/time.h
- *
- * Copyright (C) 2004 Logic Product Development
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- */
-
-#if HZ < 100
-# define TIMER_CONTROL TIMER_CONTROL1
-# define TIMER_LOAD TIMER_LOAD1
-# define TIMER_CONSTANT (508469/HZ)
-# define TIMER_MODE (TIMER_C_ENABLE | TIMER_C_PERIODIC | TIMER_C_508KHZ)
-# define TIMER_EOI TIMER_EOI1
-# define TIMER_IRQ IRQ_T1UI
-#else
-# define TIMER_CONTROL TIMER_CONTROL3
-# define TIMER_LOAD TIMER_LOAD3
-# define TIMER_CONSTANT (3686400/HZ)
-# define TIMER_MODE (TIMER_C_ENABLE | TIMER_C_PERIODIC)
-# define TIMER_EOI TIMER_EOI3
-# define TIMER_IRQ IRQ_T3UI
-#endif
-
-static irqreturn_t
-lh7a40x_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- TIMER_EOI = 0;
- do_profile (regs);
- do_leds();
- do_set_rtc();
- do_timer (regs);
-
- return IRQ_HANDLED;
-}
-
-void __init time_init(void)
-{
- /* Stop/disable all timers */
- TIMER_CONTROL1 = 0;
- TIMER_CONTROL2 = 0;
- TIMER_CONTROL3 = 0;
-
- timer_irq.handler = lh7a40x_timer_interrupt;
- timer_irq.flags |= SA_INTERRUPT;
- setup_irq (TIMER_IRQ, &timer_irq);
-
- TIMER_LOAD = TIMER_CONSTANT;
- TIMER_CONTROL = TIMER_MODE;
-}
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/dma.h
- *
- * Architecture DMA routines
- *
- * Copyright (C) 1998, 1999 Philip Blundell
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-/*
- * This is the maximum DMA address that can be DMAd to.
- */
-#define MAX_DMA_ADDRESS 0xffffffff
-#define MAX_DMA_CHANNELS 0
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/hardware.h
- *
- * Copyright (C) 1998, 1999, 2000 FutureTV Labs Ltd.
- *
- * This file contains the hardware definitions of the FTV PCI card.
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-/* Logical Physical
- * 0xffe00000 0x20000000 INTCONT
- * 0xffd00000 0x30000000 Status
- * 0xffc00000 0x60000000 PLX registers
- * 0xfe000000 0xC0000000 PCI I/O
- * 0xfd000000 0x70000000 cache flush
- * 0xfc000000 0x80000000 PCI/ISA memory
- * 0xe0000000 0x10000000 SCC2691 DUART
- */
-
-/*
- * Mapping areas
- */
-#define INTCONT_BASE 0xffe00000
-#define STATUS_BASE 0xffd00000
-#define PLX_BASE 0xffc00000
-#define PCIO_BASE 0xfe000000
-#define FLUSH_BASE 0xfd000000
-#define DUART_BASE 0xe0000000
-#define PCIMEM_BASE 0xfc000000
-
-#define PLX_IO_START 0xC0000000
-#define PLX_MEM_START 0x80000000
-#define PLX_START 0x60000000
-#define STATUS_START 0x30000000
-#define INTCONT_START 0x20000000
-#define DUART_START 0x10000000
-
-/*
- * RAM definitions
- */
-#define RAM_BASE 0x40000000
-#define FLUSH_BASE_PHYS 0x70000000
-
-/*
- * Miscellaneous INTCONT bits
- */
-#define INTCONT_FIQ_PLX 0x00
-#define INTCONT_FIQ_D 0x02
-#define INTCONT_FIQ_C 0x04
-#define INTCONT_FIQ_B 0x06
-#define INTCONT_FIQ_A 0x08
-#define INTCONT_FIQ_SYSERR 0x0a
-#define INTCONT_IRQ_DUART 0x0c
-#define INTCONT_IRQ_PLX 0x0e
-#define INTCONT_IRQ_D 0x10
-#define INTCONT_IRQ_C 0x12
-#define INTCONT_IRQ_B 0x14
-#define INTCONT_IRQ_A 0x16
-#define INTCONT_IRQ_SYSERR 0x1e
-
-#define INTCONT_WATCHDOG 0x18
-#define INTCONT_LED 0x1a
-#define INTCONT_PCI_RESET 0x1c
-
-#define UNCACHEABLE_ADDR STATUS_BASE
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/ide.h
- *
- * Copyright (c) 1998 Russell King
- *
- * Modifications:
- * 29-07-1998 RMK Major re-work of IDE architecture specific code
- */
-#include <asm/irq.h>
-
-/*
- * Set up a hw structure for a specified data port, control port and IRQ.
- * This should follow whatever the default interface uses.
- */
-static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
- unsigned long ctrl_port, int *irq)
-{
- unsigned long reg = data_port;
- int i;
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- if (irq)
- *irq = 0;
-}
-
-/*
- * This registers the standard ports for this architecture with the IDE
- * driver.
- */
-static __inline__ void ide_init_default_hwifs(void)
-{
- /* There are no standard ports */
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/io.h
- *
- * Copyright (C) 1997-1999 Russell King
- * Copyright (C) 2000 FutureTV Labs Ltd.
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffff
-
-/*
- * Translation of various region addresses to virtual addresses
- */
-#define __io(a) (PCIO_BASE + (a))
-#if 1
-#define __mem_pci(a) ((unsigned long)(a))
-#define __mem_isa(a) (PCIMEM_BASE + (unsigned long)(a))
-#else
-
-static inline unsigned long ___mem_pci(unsigned long a)
-{
- /* PCI addresses must have been ioremapped */
- if (a <= 0xc0000000 || a >= 0xe0000000)
- *((int *)0) = 0;
- return a;
-}
-
-static inline unsigned long ___mem_isa(unsigned long a)
-{
- BUG_ON(a >= 16*1048576);
- return PCIMEM_BASE + a;
-}
-#define __mem_pci(a) ___mem_pci((unsigned long)(a))
-#define __mem_isa(a) ___mem_isa((unsigned long)(a))
-#endif
-
-/*
- * ioremap support - validate a PCI memory address,
- * and convert a PCI memory address to a physical
- * address for the page tables.
- */
-#define iomem_valid_addr(iomem,sz) \
- ((iomem) < 0x80000000 && (iomem) + (sz) <= 0x80000000)
-#define iomem_to_phys(iomem) ((iomem) + PLX_MEM_START)
-
-#define __arch_ioremap(off,sz,nocache) \
- ({ \
- unsigned long _off = (off), _size = (sz); \
- void *_ret = (void *)0; \
- if (iomem_valid_addr(_off, _size)) \
- _ret = __ioremap(iomem_to_phys(_off),_size,0); \
- _ret; \
- })
-
-#define __arch_iounmap __iounmap
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/irqs.h
- *
- * Copyright (C) 1997, 1998, 2000 Philip Blundell
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-/*
- * The hardware is capable of routing any interrupt source (except the
- * DUART) to either IRQ or FIQ. We ignore FIQ and use IRQ exclusively
- * for simplicity.
- */
-
-#define IRQ_DUART 0
-#define IRQ_PLX 1
-#define IRQ_PCI_D 2
-#define IRQ_PCI_C 3
-#define IRQ_PCI_B 4
-#define IRQ_PCI_A 5
-#define IRQ_SYSERR 6 /* only from IOSLAVE rev B */
-
-#define FIRST_IRQ IRQ_DUART
-#define LAST_IRQ IRQ_SYSERR
-
-/* timer is part of the DUART */
-#define IRQ_TIMER IRQ_DUART
-
-#define irq_canonicalize(i) (i)
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/memory.h
- *
- * Copyright (c) 1997, 1998, 2000 FutureTV Labs Ltd.
- * Copyright (c) 1999 Russell King
- *
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-
-/*
- * Physical DRAM offset.
- */
-#define PHYS_OFFSET (0x40000000UL)
-#define BUS_OFFSET (0xe0000000UL)
-
-/*
- * On the PCI bus the DRAM appears at address 0xe0000000
- */
-#define __virt_to_bus(x) ((unsigned long)(x) - PAGE_OFFSET + BUS_OFFSET)
-#define __bus_to_virt(x) ((unsigned long)(x) + PAGE_OFFSET - BUS_OFFSET)
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/param.h
- */
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/system.h
- *
- * Copyright (c) 1996, 97, 98, 99, 2000 FutureTV Labs Ltd.
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
- cpu_do_idle();
-}
-
-#define arch_reset(mode) do { } while (0)
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/time.h
- *
- * Copyright (c) 1997, 1998, 1999, 2000 FutureTV Labs Ltd.
- *
- * The FTV PCI card has no real-time clock. We get timer ticks from the
- * SCC chip.
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-static irqreturn_t
-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- static int count = 25;
- unsigned char stat = __raw_readb(DUART_BASE + 0x14);
- if (!(stat & 0x10))
- return; /* Not for us */
-
- /* Reset counter */
- __raw_writeb(0x90, DUART_BASE + 8);
-
- if (--count == 0) {
- static int state = 1;
- state ^= 1;
- __raw_writeb(0x1a + state, INTCONT_BASE);
- __raw_writeb(0x18 + state, INTCONT_BASE);
- count = 50;
- }
-
- /* Wait for slow rise time */
- __raw_readb(DUART_BASE + 0x14);
- __raw_readb(DUART_BASE + 0x14);
- __raw_readb(DUART_BASE + 0x14);
- __raw_readb(DUART_BASE + 0x14);
- __raw_readb(DUART_BASE + 0x14);
- __raw_readb(DUART_BASE + 0x14);
-
- do_timer(regs);
-
- return IRQ_HANDLED;
-}
-
-void __init time_init(void)
-{
- int tick = 3686400 / 16 / 2 / 100;
-
- __raw_writeb(tick & 0xff, DUART_BASE + 0x1c);
- __raw_writeb(tick >> 8, DUART_BASE + 0x18);
- __raw_writeb(0x80, DUART_BASE + 8);
- __raw_writeb(0x10, DUART_BASE + 0x14);
-
- timer_irq.handler = timer_interrupt;
- timer_irq.flags = SA_SHIRQ;
-
- setup_irq(IRQ_TIMER, &timer_irq);
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/timex.h
- *
- * NexusPCI StrongARM card timex specifications
- *
- * Copyright (C) 1998 Philip Blundell
- */
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/uncompress.h
- *
- * Copyright (C) 1998, 1999, 2000 Philip Blundell
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <asm/hardware.h>
-#include <asm/io.h>
-
-/*
- * Write a character to the UART
- */
-void _ll_write_char(char c)
-{
- while (!(__raw_readb(DUART_START + 0x4) & 0x4))
- ;
- __raw_writeb(c, DUART_START + 0xc);
-}
-
-/*
- * This does not append a newline
- */
-static void puts(const char *s)
-{
- while (*s) {
- if (*s == '\n')
- _ll_write_char('\r');
- _ll_write_char(*(s++));
- }
-}
-
-/*
- * Set up for decompression
- */
-static void arch_decomp_setup(void)
-{
- /* LED off */
- __raw_writel(INTCONT_LED, INTCONT_START);
-
- /* Set up SCC */
- __raw_writeb(42, DUART_START + 8);
- __raw_writeb(48, DUART_START + 8);
- __raw_writeb(16, DUART_START + 8);
- __raw_writeb(0x93, DUART_START);
- __raw_writeb(0x17, DUART_START);
- __raw_writeb(0xbb, DUART_START + 4);
- __raw_writeb(0x78, DUART_START + 16);
- __raw_writeb(0xa0, DUART_START + 8);
- __raw_writeb(5, DUART_START + 8);
-}
-
-/*
- * Stroke the watchdog so we don't get reset during decompression.
- */
-static inline void arch_decomp_wdog(void)
-{
- __raw_writel(INTCONT_WATCHDOG, INTCONT_START);
- __raw_writel(INTCONT_WATCHDOG | 1, INTCONT_START);
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/vmalloc.h
- */
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_END (PAGE_OFFSET + 0x20000000)
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-omap/bus.h
- *
- * Virtual bus for OMAP. Allows better power management, such as managing
- * shared clocks, and mapping of bus addresses to Local Bus addresses.
- *
- * See drivers/usb/host/ohci-omap.c or drivers/video/omap/omapfb.c for
- * examples on how to register drivers to this bus.
- *
- * Copyright (C) 2003 - 2004 Nokia Corporation
- * Written by Tony Lindgren <tony@atomide.com>
- * Portions of code based on sa1111.c.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef __ASM_ARM_ARCH_OMAP_BUS_H
-#define __ASM_ARM_ARCH_OMAP_BUS_H
-
-extern struct bus_type omap_bus_types[];
-
-/*
- * Description for physical device
- */
-struct omap_dev {
- struct device dev; /* Standard device description */
- char *name;
- unsigned int devid; /* OMAP device id */
- unsigned int busid; /* OMAP virtual busid */
- struct resource res; /* Standard resource description */
- void *mapbase; /* OMAP physical address */
- unsigned int irq[6]; /* OMAP interrupts */
- u64 *dma_mask; /* Used by USB OHCI only */
- u64 coherent_dma_mask; /* Used by USB OHCI only */
-};
-
-#define OMAP_DEV(_d) container_of((_d), struct omap_dev, dev)
-
-#define omap_get_drvdata(d) dev_get_drvdata(&(d)->dev)
-#define omap_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, p)
-
-/*
- * Description for device driver
- */
-struct omap_driver {
- struct device_driver drv; /* Standard driver description */
- unsigned int devid; /* OMAP device id for bus */
- unsigned int busid; /* OMAP virtual busid */
- unsigned int clocks; /* OMAP shared clocks */
- int (*probe)(struct omap_dev *);
- int (*remove)(struct omap_dev *);
- int (*suspend)(struct omap_dev *, u32);
- int (*resume)(struct omap_dev *);
-};
-
-#define OMAP_DRV(_d) container_of((_d), struct omap_driver, drv)
-#define OMAP_DRIVER_NAME(_omapdev) ((_omapdev)->dev.driver->name)
-
-/*
- * Device ID numbers for bus types
- */
-#define OMAP_OCP_DEVID_USB 0
-
-#define OMAP_TIPB_DEVID_OHCI 0
-#define OMAP_TIPB_DEVID_LCD 1
-#define OMAP_TIPB_DEVID_MMC 2
-#define OMAP_TIPB_DEVID_OTG 3
-#define OMAP_TIPB_DEVID_UDC 4
-
-/*
- * Virtual bus definitions for OMAP
- */
-#define OMAP_NR_BUSES 2
-
-#define OMAP_BUS_NAME_TIPB "tipb"
-#define OMAP_BUS_NAME_LBUS "lbus"
-
-enum {
- OMAP_BUS_TIPB = 0,
- OMAP_BUS_LBUS,
-};
-
-/* See arch/arm/mach-omap/bus.c for the rest of the bus definitions. */
-
-extern int omap_driver_register(struct omap_driver *driver);
-extern void omap_driver_unregister(struct omap_driver *driver);
-extern int omap_device_register(struct omap_dev *odev);
-extern void omap_device_unregister(struct omap_dev *odev);
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-omap/omap-h2.h
- *
- * Hardware definitions for TI OMAP1610 H2 board.
- *
- * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OMAP_H2_H
-#define __ASM_ARCH_OMAP_H2_H
-
-/* Placeholder for H2 specific defines */
-
-#endif /* __ASM_ARCH_OMAP_H2_H */
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-omap/omap-innovator.h
- *
- * Copyright (C) 2001 RidgeRun, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_ARCH_OMAP_INNOVATOR_H
-#define __ASM_ARCH_OMAP_INNOVATOR_H
-
-#if defined (CONFIG_ARCH_OMAP1510)
-
-/*
- * ---------------------------------------------------------------------------
- * OMAP-1510 FPGA
- * ---------------------------------------------------------------------------
- */
-#define OMAP1510P1_FPGA_BASE 0xE8000000 /* Virtual */
-#define OMAP1510P1_FPGA_SIZE SZ_4K
-#define OMAP1510P1_FPGA_START 0x08000000 /* Physical */
-
-/* Revision */
-#define OMAP1510P1_FPGA_REV_LOW (OMAP1510P1_FPGA_BASE + 0x0)
-#define OMAP1510P1_FPGA_REV_HIGH (OMAP1510P1_FPGA_BASE + 0x1)
-
-#define OMAP1510P1_FPGA_LCD_PANEL_CONTROL (OMAP1510P1_FPGA_BASE + 0x2)
-#define OMAP1510P1_FPGA_LED_DIGIT (OMAP1510P1_FPGA_BASE + 0x3)
-#define INNOVATOR_FPGA_HID_SPI (OMAP1510P1_FPGA_BASE + 0x4)
-#define OMAP1510P1_FPGA_POWER (OMAP1510P1_FPGA_BASE + 0x5)
-
-/* Interrupt status */
-#define OMAP1510P1_FPGA_ISR_LO (OMAP1510P1_FPGA_BASE + 0x6)
-#define OMAP1510P1_FPGA_ISR_HI (OMAP1510P1_FPGA_BASE + 0x7)
-
-/* Interrupt mask */
-#define OMAP1510P1_FPGA_IMR_LO (OMAP1510P1_FPGA_BASE + 0x8)
-#define OMAP1510P1_FPGA_IMR_HI (OMAP1510P1_FPGA_BASE + 0x9)
-
-/* Reset registers */
-#define OMAP1510P1_FPGA_HOST_RESET (OMAP1510P1_FPGA_BASE + 0xa)
-#define OMAP1510P1_FPGA_RST (OMAP1510P1_FPGA_BASE + 0xb)
-
-#define OMAP1510P1_FPGA_AUDIO (OMAP1510P1_FPGA_BASE + 0xc)
-#define OMAP1510P1_FPGA_DIP (OMAP1510P1_FPGA_BASE + 0xe)
-#define OMAP1510P1_FPGA_FPGA_IO (OMAP1510P1_FPGA_BASE + 0xf)
-#define OMAP1510P1_FPGA_UART1 (OMAP1510P1_FPGA_BASE + 0x14)
-#define OMAP1510P1_FPGA_UART2 (OMAP1510P1_FPGA_BASE + 0x15)
-#define OMAP1510P1_FPGA_OMAP1510_STATUS (OMAP1510P1_FPGA_BASE + 0x16)
-#define OMAP1510P1_FPGA_BOARD_REV (OMAP1510P1_FPGA_BASE + 0x18)
-#define OMAP1510P1_PPT_DATA (OMAP1510P1_FPGA_BASE + 0x100)
-#define OMAP1510P1_PPT_STATUS (OMAP1510P1_FPGA_BASE + 0x101)
-#define OMAP1510P1_PPT_CONTROL (OMAP1510P1_FPGA_BASE + 0x102)
-
-#define OMAP1510P1_FPGA_TOUCHSCREEN (OMAP1510P1_FPGA_BASE + 0x204)
-
-#define INNOVATOR_FPGA_INFO (OMAP1510P1_FPGA_BASE + 0x205)
-#define INNOVATOR_FPGA_LCD_BRIGHT_LO (OMAP1510P1_FPGA_BASE + 0x206)
-#define INNOVATOR_FPGA_LCD_BRIGHT_HI (OMAP1510P1_FPGA_BASE + 0x207)
-#define INNOVATOR_FPGA_LED_GRN_LO (OMAP1510P1_FPGA_BASE + 0x208)
-#define INNOVATOR_FPGA_LED_GRN_HI (OMAP1510P1_FPGA_BASE + 0x209)
-#define INNOVATOR_FPGA_LED_RED_LO (OMAP1510P1_FPGA_BASE + 0x20a)
-#define INNOVATOR_FPGA_LED_RED_HI (OMAP1510P1_FPGA_BASE + 0x20b)
-#define INNOVATOR_FPGA_CAM_USB_CONTROL (OMAP1510P1_FPGA_BASE + 0x20c)
-#define INNOVATOR_FPGA_EXP_CONTROL (OMAP1510P1_FPGA_BASE + 0x20d)
-#define INNOVATOR_FPGA_ISR2 (OMAP1510P1_FPGA_BASE + 0x20e)
-#define INNOVATOR_FPGA_IMR2 (OMAP1510P1_FPGA_BASE + 0x210)
-
-#define OMAP1510P1_FPGA_ETHR_START (OMAP1510P1_FPGA_START + 0x300)
-#define OMAP1510P1_FPGA_ETHR_BASE (OMAP1510P1_FPGA_BASE + 0x300)
-
-/*
- * Power up Giga UART driver, turn on HID clock.
- * Turn off BT power, since we're not using it and it
- * draws power.
- */
-#define OMAP1510P1_FPGA_RESET_VALUE 0x42
-
-#define OMAP1510P1_FPGA_PCR_IF_PD0 (1 << 7)
-#define OMAP1510P1_FPGA_PCR_COM2_EN (1 << 6)
-#define OMAP1510P1_FPGA_PCR_COM1_EN (1 << 5)
-#define OMAP1510P1_FPGA_PCR_EXP_PD0 (1 << 4)
-#define OMAP1510P1_FPGA_PCR_EXP_PD1 (1 << 3)
-#define OMAP1510P1_FPGA_PCR_48MHZ_CLK (1 << 2)
-#define OMAP1510P1_FPGA_PCR_4MHZ_CLK (1 << 1)
-#define OMAP1510P1_FPGA_PCR_RSRVD_BIT0 (1 << 0)
-
-/*
- * Innovator/OMAP1510 FPGA HID register bit definitions
- */
-#define FPGA_HID_SCLK (1<<0) /* output */
-#define FPGA_HID_MOSI (1<<1) /* output */
-#define FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */
-#define FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */
-#define FPGA_HID_MISO (1<<4) /* input */
-#define FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */
-#define FPGA_HID_rsrvd (1<<6)
-#define FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */
-
-#ifndef OMAP_SDRAM_DEVICE
-#define OMAP_SDRAM_DEVICE D256M_1X16_4B
-#endif
-
-#define OMAP1510P1_IMIF_PRI_VALUE 0x00
-#define OMAP1510P1_EMIFS_PRI_VALUE 0x00
-#define OMAP1510P1_EMIFF_PRI_VALUE 0x00
-
-/*
- * These definitions define an area of FLASH set aside
- * for the use of MTD/JFFS2. This is the area of flash
- * that a JFFS2 filesystem will reside which is mounted
- * at boot with the "root=/dev/mtdblock/0 rw"
- * command line option. The flash address used here must
- * fall within the legal range defined by rrload for storing
- * the filesystem component. This address will be sufficiently
- * deep into the overall flash range to avoid the other
- * components also stored in flash such as the bootloader,
- * the bootloader params, and the kernel.
- * The SW2 settings for the map below are:
- * 1 off, 2 off, 3 on, 4 off.
- */
-
-/* Intel flash_0, partitioned as expected by rrload */
-#define OMAP_FLASH_0_BASE 0xD8000000
-#define OMAP_FLASH_0_START 0x00000000
-#define OMAP_FLASH_0_SIZE SZ_16M
-
-/* Intel flash_1, used for cramfs or other flash file systems */
-#define OMAP_FLASH_1_BASE 0xD9000000
-#define OMAP_FLASH_1_START 0x01000000
-#define OMAP_FLASH_1_SIZE SZ_16M
-
-/* The FPGA IRQ is cascaded through GPIO_13 */
-#define INT_FPGA (IH_GPIO_BASE + 13)
-
-/* IRQ Numbers for interrupts muxed through the FPGA */
-#define IH_FPGA_BASE IH_BOARD_BASE
-#define INT_FPGA_ATN (IH_FPGA_BASE + 0)
-#define INT_FPGA_ACK (IH_FPGA_BASE + 1)
-#define INT_FPGA2 (IH_FPGA_BASE + 2)
-#define INT_FPGA3 (IH_FPGA_BASE + 3)
-#define INT_FPGA4 (IH_FPGA_BASE + 4)
-#define INT_FPGA5 (IH_FPGA_BASE + 5)
-#define INT_FPGA6 (IH_FPGA_BASE + 6)
-#define INT_FPGA7 (IH_FPGA_BASE + 7)
-#define INT_FPGA8 (IH_FPGA_BASE + 8)
-#define INT_FPGA9 (IH_FPGA_BASE + 9)
-#define INT_FPGA10 (IH_FPGA_BASE + 10)
-#define INT_FPGA11 (IH_FPGA_BASE + 11)
-#define INT_FPGA12 (IH_FPGA_BASE + 12)
-#define INT_ETHER (IH_FPGA_BASE + 13)
-#define INT_FPGAUART1 (IH_FPGA_BASE + 14)
-#define INT_FPGAUART2 (IH_FPGA_BASE + 15)
-#define INT_FPGA_TS (IH_FPGA_BASE + 16)
-#define INT_FPGA17 (IH_FPGA_BASE + 17)
-#define INT_FPGA_CAM (IH_FPGA_BASE + 18)
-#define INT_FPGA_RTC_A (IH_FPGA_BASE + 19)
-#define INT_FPGA_RTC_B (IH_FPGA_BASE + 20)
-#define INT_FPGA_CD (IH_FPGA_BASE + 21)
-#define INT_FPGA22 (IH_FPGA_BASE + 22)
-#define INT_FPGA23 (IH_FPGA_BASE + 23)
-
-#define NR_FPGA_IRQS 24
-
-#define MAXIRQNUM (IH_FPGA_BASE + NR_FPGA_IRQS - 1)
-#define MAXFIQNUM MAXIRQNUM
-#define MAXSWINUM MAXIRQNUM
-
-#define NR_IRQS 256
-
-#ifndef __ASSEMBLY__
-void fpga_write(unsigned char val, int reg);
-unsigned char fpga_read(int reg);
-#endif
-
-#elif defined (CONFIG_ARCH_OMAP1610)
-
-/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
-#define OMAP1610_ETHR_BASE 0xE8000000
-#define OMAP1610_ETHR_SIZE SZ_4K
-#define OMAP1610_ETHR_START 0x04000000
-
-/* Intel STRATA NOR flash at CS3 */
-#define OMAP1610_NOR_FLASH_BASE 0xD8000000
-#define OMAP1610_NOR_FLASH_SIZE SZ_32M
-#define OMAP1610_NOR_FLASH_START 0x0C000000
-
-#define MAXIRQNUM (IH_BOARD_BASE)
-#define MAXFIQNUM MAXIRQNUM
-#define MAXSWINUM MAXIRQNUM
-
-#define NR_IRQS (MAXIRQNUM + 1)
-
-#else
-#error "Only OMAP1510 and OMAP1610 Innovator supported!"
-#endif
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-omap/omap-perseus2.h
- *
- * Copyright 2003 by Texas Instruments Incorporated
- * OMAP730 / P2-sample additions
- * Author: Jean Pihet
- *
- * Copyright (C) 2001 RidgeRun, Inc. (http://www.ridgerun.com)
- * Author: RidgeRun, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_ARCH_OMAP_P2SAMPLE_H
-#define __ASM_ARCH_OMAP_P2SAMPLE_H
-
-#if defined(CONFIG_ARCH_OMAP730) && defined (CONFIG_MACH_OMAP_PERSEUS2)
-
-/*
- * NOTE: ALL DEFINITIONS IN THIS FILE NEED TO BE PREFIXED BY IDENTIFIER
- * P2SAMPLE_ since they are specific to the EVM and not the chip.
- */
-
-/* ---------------------------------------------------------------------------
- * OMAP730 Debug Board FPGA
- * ---------------------------------------------------------------------------
- *
- */
-
-/* maps in the FPGA registers and the ETHR registers */
-#define OMAP730_FPGA_BASE 0xE8000000 /* VA */
-#define OMAP730_FPGA_SIZE SZ_4K /* SIZE */
-#define OMAP730_FPGA_START 0x04000000 /* PA */
-
-#define OMAP730_FPGA_ETHR_START OMAP730_FPGA_START
-#define OMAP730_FPGA_ETHR_BASE OMAP730_FPGA_BASE
-#define OMAP730_FPGA_FPGA_REV (OMAP730_FPGA_BASE + 0x10) /* FPGA Revision */
-#define OMAP730_FPGA_BOARD_REV (OMAP730_FPGA_BASE + 0x12) /* Board Revision */
-#define OMAP730_FPGA_GPIO (OMAP730_FPGA_BASE + 0x14) /* GPIO outputs */
-#define OMAP730_FPGA_LEDS (OMAP730_FPGA_BASE + 0x16) /* LEDs outputs */
-#define OMAP730_FPGA_MISC_INPUTS (OMAP730_FPGA_BASE + 0x18) /* Misc inputs */
-#define OMAP730_FPGA_LAN_STATUS (OMAP730_FPGA_BASE + 0x1A) /* LAN Status line */
-#define OMAP730_FPGA_LAN_RESET (OMAP730_FPGA_BASE + 0x1C) /* LAN Reset line */
-
-// LEDs definition on debug board (16 LEDs)
-#define OMAP730_FPGA_LED_CLAIMRELEASE (1 << 15)
-#define OMAP730_FPGA_LED_STARTSTOP (1 << 14)
-#define OMAP730_FPGA_LED_HALTED (1 << 13)
-#define OMAP730_FPGA_LED_IDLE (1 << 12)
-#define OMAP730_FPGA_LED_TIMER (1 << 11)
-// cpu0 load-meter LEDs
-#define OMAP730_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ...
-#define OMAP730_FPGA_LOAD_METER_SIZE 11
-#define OMAP730_FPGA_LOAD_METER_MASK ((1 << OMAP730_FPGA_LOAD_METER_SIZE) - 1)
-
-#ifndef OMAP_SDRAM_DEVICE
-#define OMAP_SDRAM_DEVICE D256M_1X16_4B
-#endif
-
-
-/*
- * These definitions define an area of FLASH set aside
- * for the use of MTD/JFFS2. This is the area of flash
- * that a JFFS2 filesystem will reside which is mounted
- * at boot with the "root=/dev/mtdblock/0 rw"
- * command line option.
- */
-
-/* Intel flash_0, partitioned as expected by rrload */
-#define OMAP_FLASH_0_BASE 0xD8000000 /* VA */
-#define OMAP_FLASH_0_START 0x00000000 /* PA */
-#define OMAP_FLASH_0_SIZE SZ_32M
-
-/* 2.9.6 Traffic Controller Memory Interface Registers */
-#define OMAP_FLASH_CFG_0 0xfffecc10
-#define OMAP_FLASH_ACFG_0 0xfffecc50
-
-#define OMAP_FLASH_CFG_1 0xfffecc14
-#define OMAP_FLASH_ACFG_1 0xfffecc54
-
-/*
- * Configuration Registers
- */
-#define PERSEUS2_CONFIG_BASE 0xfffe1000
-#define PERSEUS2_IO_CONF_0 0xfffe1070
-#define PERSEUS2_IO_CONF_1 0xfffe1074
-#define PERSEUS2_IO_CONF_2 0xfffe1078
-#define PERSEUS2_IO_CONF_3 0xfffe107c
-#define PERSEUS2_IO_CONF_4 0xfffe1080
-#define PERSEUS2_IO_CONF_5 0xfffe1084
-#define PERSEUS2_IO_CONF_6 0xfffe1088
-#define PERSEUS2_IO_CONF_7 0xfffe108c
-#define PERSEUS2_IO_CONF_8 0xfffe1090
-#define PERSEUS2_IO_CONF_9 0xfffe1094
-#define PERSEUS2_IO_CONF_10 0xfffe1098
-#define PERSEUS2_IO_CONF_11 0xfffe109c
-#define PERSEUS2_IO_CONF_12 0xfffe10a0
-#define PERSEUS2_IO_CONF_13 0xfffe10a4
-
-#define PERSEUS2_MODE_1 0xfffe1010
-#define PERSEUS2_MODE_2 0xfffe1014
-
-/* CSMI specials: in terms of base + offset */
-#define PERSEUS2_MODE2_OFFSET 0x14
-
-/* DSP control: ICR registers */
-#define ICR_BASE 0xfffbb800
-/* M_CTL */
-#define DSP_M_CTL ((volatile __u16 *)0xfffbb804)
-/* DSP control: MMU registers */
-#define DSP_MMU_BASE ((volatile __u16 *)0xfffed200)
-
-/* The Ethernet Controller IRQ is cascaded to MPU_EXT_nIRQ througb the FPGA */
-#define INT_ETHER INT_730_MPU_EXT_NIRQ
-
-#define MAXIRQNUM IH_BOARD_BASE
-#define MAXFIQNUM MAXIRQNUM
-#define MAXSWINUM MAXIRQNUM
-
-#define NR_IRQS (MAXIRQNUM + 1)
-
-#ifndef __ASSEMBLY__
-void fpga_write(unsigned char val, int reg);
-unsigned char fpga_read(int reg);
-#endif
-
-/* PCC_UPLD control register: OMAP730 */
-#define PCC_UPLD_CTRL_REG_BASE (0xfffe0900)
-#define PCC_UPLD_CTRL_REG (volatile __u16 *)(PCC_UPLD_CTRL_REG_BASE + 0x00)
-
-#else
-#error "Only OMAP730 Perseus2 supported!"
-#endif
-
-#endif
+++ /dev/null
-/* linux/include/asm-arm/arch-omap/omap1610.h
- *
- * Hardware definitions for TI OMAP1610 processor.
- *
- * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OMAP1610_H
-#define __ASM_ARCH_OMAP1610_H
-
-/*
- * ----------------------------------------------------------------------------
- * Base addresses
- * ----------------------------------------------------------------------------
- */
-
-/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
-
-#define OMAP1610_SRAM_BASE 0xD0000000
-#define OMAP1610_SRAM_SIZE (SZ_16K)
-#define OMAP1610_SRAM_START 0x20000000
-
-#define OMAP1610_DSP_BASE 0xE0000000
-#define OMAP1610_DSP_SIZE 0x28000
-#define OMAP1610_DSP_START 0xE0000000
-
-#define OMAP1610_DSPREG_BASE 0xE1000000
-#define OMAP1610_DSPREG_SIZE SZ_128K
-#define OMAP1610_DSPREG_START 0xE1000000
-
-/*
- * ----------------------------------------------------------------------------
- * Memory used by power management
- * ----------------------------------------------------------------------------
- */
-
-#define OMAP1610_SRAM_IDLE_SUSPEND (OMAP1610_SRAM_BASE + OMAP1610_SRAM_SIZE - 0x200)
-#define OMAP1610_SRAM_API_SUSPEND (OMAP1610_SRAM_IDLE_SUSPEND + 0x100)
-
-/*
- * ---------------------------------------------------------------------------
- * Interrupts
- * ---------------------------------------------------------------------------
- */
-#define OMAP_IH2_0_BASE (0xfffe0000)
-#define OMAP_IH2_1_BASE (0xfffe0100)
-#define OMAP_IH2_2_BASE (0xfffe0200)
-#define OMAP_IH2_3_BASE (0xfffe0300)
-
-#define OMAP_IH2_0_ITR (OMAP_IH2_0_BASE + 0x00)
-#define OMAP_IH2_0_MIR (OMAP_IH2_0_BASE + 0x04)
-#define OMAP_IH2_0_SIR_IRQ (OMAP_IH2_0_BASE + 0x10)
-#define OMAP_IH2_0_SIR_FIQ (OMAP_IH2_0_BASE + 0x14)
-#define OMAP_IH2_0_CONTROL (OMAP_IH2_0_BASE + 0x18)
-#define OMAP_IH2_0_ILR0 (OMAP_IH2_0_BASE + 0x1c)
-#define OMAP_IH2_0_ISR (OMAP_IH2_0_BASE + 0x9c)
-
-#define OMAP_IH2_1_ITR (OMAP_IH2_1_BASE + 0x00)
-#define OMAP_IH2_1_MIR (OMAP_IH2_1_BASE + 0x04)
-#define OMAP_IH2_1_SIR_IRQ (OMAP_IH2_1_BASE + 0x10)
-#define OMAP_IH2_1_SIR_FIQ (OMAP_IH2_1_BASE + 0x14)
-#define OMAP_IH2_1_CONTROL (OMAP_IH2_1_BASE + 0x18)
-#define OMAP_IH2_1_ILR1 (OMAP_IH2_1_BASE + 0x1c)
-#define OMAP_IH2_1_ISR (OMAP_IH2_1_BASE + 0x9c)
-
-#define OMAP_IH2_2_ITR (OMAP_IH2_2_BASE + 0x00)
-#define OMAP_IH2_2_MIR (OMAP_IH2_2_BASE + 0x04)
-#define OMAP_IH2_2_SIR_IRQ (OMAP_IH2_2_BASE + 0x10)
-#define OMAP_IH2_2_SIR_FIQ (OMAP_IH2_2_BASE + 0x14)
-#define OMAP_IH2_2_CONTROL (OMAP_IH2_2_BASE + 0x18)
-#define OMAP_IH2_2_ILR2 (OMAP_IH2_2_BASE + 0x1c)
-#define OMAP_IH2_2_ISR (OMAP_IH2_2_BASE + 0x9c)
-
-#define OMAP_IH2_3_ITR (OMAP_IH2_3_BASE + 0x00)
-#define OMAP_IH2_3_MIR (OMAP_IH2_3_BASE + 0x04)
-#define OMAP_IH2_3_SIR_IRQ (OMAP_IH2_3_BASE + 0x10)
-#define OMAP_IH2_3_SIR_FIQ (OMAP_IH2_3_BASE + 0x14)
-#define OMAP_IH2_3_CONTROL (OMAP_IH2_3_BASE + 0x18)
-#define OMAP_IH2_3_ILR3 (OMAP_IH2_3_BASE + 0x1c)
-#define OMAP_IH2_3_ISR (OMAP_IH2_3_BASE + 0x9c)
-
-/*
- * ----------------------------------------------------------------------------
- * Clocks
- * ----------------------------------------------------------------------------
- */
-#define OMAP1610_ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
-
-/*
- * ----------------------------------------------------------------------------
- * Pin configuration registers
- * ----------------------------------------------------------------------------
- */
-#define OMAP1610_CONF_VOLTAGE_VDDSHV6 (1 << 8)
-#define OMAP1610_CONF_VOLTAGE_VDDSHV7 (1 << 9)
-#define OMAP1610_CONF_VOLTAGE_VDDSHV8 (1 << 10)
-#define OMAP1610_CONF_VOLTAGE_VDDSHV9 (1 << 11)
-#define OMAP1610_SUBLVDS_CONF_VALID (1 << 13)
-
-/*
- * ---------------------------------------------------------------------------
- * TIPB bus interface
- * ---------------------------------------------------------------------------
- */
-#define TIPB_SWITCH_BASE (0xfffbc800)
-#define OMAP1610_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160)
-
-#endif /* __ASM_ARCH_OMAP1610_H */
-
+++ /dev/null
-/* linux/include/asm-arm/arch-omap/omap5912.h
- *
- * Hardware definitions for TI OMAP5912 processor.
- *
- * Written by Dirk Behme <dirk.behme@de.bosch.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OMAP5912_H
-#define __ASM_ARCH_OMAP5912_H
-
-/*
- * ----------------------------------------------------------------------------
- * Base addresses
- * ----------------------------------------------------------------------------
- */
-
-/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
-
-/* OMAP5912 internal SRAM size is 250kByte */
-#define OMAP5912_SRAM_BASE 0xD0000000
-#define OMAP5912_SRAM_SIZE 0x3E800
-#define OMAP5912_SRAM_START 0x20000000
-
-#define OMAP5912_DSP_BASE 0xE0000000
-#define OMAP5912_DSP_SIZE 0x50000
-#define OMAP5912_DSP_START 0xE0000000
-
-#define OMAP5912_DSPREG_BASE 0xE1000000
-#define OMAP5912_DSPREG_SIZE SZ_128K
-#define OMAP5912_DSPREG_START 0xE1000000
-
-/*
- * ----------------------------------------------------------------------------
- * Memory used by power management
- * ----------------------------------------------------------------------------
- */
-
-#define OMAP5912_SRAM_IDLE_SUSPEND (OMAP5912_SRAM_BASE + OMAP5912_SRAM_SIZE - 0x200)
-#define OMAP5912_SRAM_API_SUSPEND (OMAP5912_SRAM_IDLE_SUSPEND + 0x100)
-
-/*
- * ---------------------------------------------------------------------------
- * Interrupts
- * ---------------------------------------------------------------------------
- */
-#define OMAP_IH2_0_BASE (0xfffe0000)
-#define OMAP_IH2_1_BASE (0xfffe0100)
-#define OMAP_IH2_2_BASE (0xfffe0200)
-#define OMAP_IH2_3_BASE (0xfffe0300)
-
-#define OMAP_IH2_0_ITR (OMAP_IH2_0_BASE + 0x00)
-#define OMAP_IH2_0_MIR (OMAP_IH2_0_BASE + 0x04)
-#define OMAP_IH2_0_SIR_IRQ (OMAP_IH2_0_BASE + 0x10)
-#define OMAP_IH2_0_SIR_FIQ (OMAP_IH2_0_BASE + 0x14)
-#define OMAP_IH2_0_CONTROL (OMAP_IH2_0_BASE + 0x18)
-#define OMAP_IH2_0_ILR0 (OMAP_IH2_0_BASE + 0x1c)
-#define OMAP_IH2_0_ISR (OMAP_IH2_0_BASE + 0x9c)
-
-#define OMAP_IH2_1_ITR (OMAP_IH2_1_BASE + 0x00)
-#define OMAP_IH2_1_MIR (OMAP_IH2_1_BASE + 0x04)
-#define OMAP_IH2_1_SIR_IRQ (OMAP_IH2_1_BASE + 0x10)
-#define OMAP_IH2_1_SIR_FIQ (OMAP_IH2_1_BASE + 0x14)
-#define OMAP_IH2_1_CONTROL (OMAP_IH2_1_BASE + 0x18)
-#define OMAP_IH2_1_ILR1 (OMAP_IH2_1_BASE + 0x1c)
-#define OMAP_IH2_1_ISR (OMAP_IH2_1_BASE + 0x9c)
-
-#define OMAP_IH2_2_ITR (OMAP_IH2_2_BASE + 0x00)
-#define OMAP_IH2_2_MIR (OMAP_IH2_2_BASE + 0x04)
-#define OMAP_IH2_2_SIR_IRQ (OMAP_IH2_2_BASE + 0x10)
-#define OMAP_IH2_2_SIR_FIQ (OMAP_IH2_2_BASE + 0x14)
-#define OMAP_IH2_2_CONTROL (OMAP_IH2_2_BASE + 0x18)
-#define OMAP_IH2_2_ILR2 (OMAP_IH2_2_BASE + 0x1c)
-#define OMAP_IH2_2_ISR (OMAP_IH2_2_BASE + 0x9c)
-
-#define OMAP_IH2_3_ITR (OMAP_IH2_3_BASE + 0x00)
-#define OMAP_IH2_3_MIR (OMAP_IH2_3_BASE + 0x04)
-#define OMAP_IH2_3_SIR_IRQ (OMAP_IH2_3_BASE + 0x10)
-#define OMAP_IH2_3_SIR_FIQ (OMAP_IH2_3_BASE + 0x14)
-#define OMAP_IH2_3_CONTROL (OMAP_IH2_3_BASE + 0x18)
-#define OMAP_IH2_3_ILR3 (OMAP_IH2_3_BASE + 0x1c)
-#define OMAP_IH2_3_ISR (OMAP_IH2_3_BASE + 0x9c)
-
-/*
- * ----------------------------------------------------------------------------
- * System control registers
- * ----------------------------------------------------------------------------
- */
-
-#define OMAP5912_ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
-
-#endif /* __ASM_ARCH_OMAP5912_H */
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-omap/serial.h
- *
- * BRIEF MODULE DESCRIPTION
- * serial definitions
- *
- */
-
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-#define OMAP_UART1_BASE (unsigned char *)0xfffb0000
-#define OMAP_UART2_BASE (unsigned char *)0xfffb0800
-#define OMAP_UART3_BASE (unsigned char *)0xfffb9800
-
-#ifndef __ASSEMBLY__
-
-#include <asm/arch/hardware.h>
-#include <asm/irq.h>
-
-#define OMAP1510_BASE_BAUD (12000000/16)
-#define OMAP1610_BASE_BAUD (48000000/16)
-
-/* OMAP FCR trigger redefinitions */
-#define UART_FCR_R_TRIGGER_8 0x00 /* Mask for receive trigger set at 8 */
-#define UART_FCR_R_TRIGGER_16 0x40 /* Mask for receive trigger set at 16 */
-#define UART_FCR_R_TRIGGER_56 0x80 /* Mask for receive trigger set at 56 */
-#define UART_FCR_R_TRIGGER_60 0xC0 /* Mask for receive trigger set at 60 */
-
-/* There is an error in the description of the transmit trigger levels of
- OMAP5910 TRM from January 2003. The transmit trigger level 56 is not
- 56 but 32, the transmit trigger level 60 is not 60 but 56!
- Additionally, the descritption of these trigger levels is
- a little bit unclear. The trigger level define the number of EMPTY
- entries in the FIFO. Thus, if TRIGGER_8 is used, an interrupt is requested
- if 8 FIFO entries are empty (and 56 entries are still filled [the FIFO
- size is 64]). Or: If TRIGGER_56 is selected, everytime there are less than
- 8 characters in the FIFO, an interrrupt is spawned. In other words: The
- trigger number is equal the number of characters which can be
- written without FIFO overrun */
-
-#define UART_FCR_T_TRIGGER_8 0x00 /* Mask for transmit trigger set at 8 */
-#define UART_FCR_T_TRIGGER_16 0x10 /* Mask for transmit trigger set at 16 */
-#define UART_FCR_T_TRIGGER_32 0x20 /* Mask for transmit trigger set at 32 */
-#define UART_FCR_T_TRIGGER_56 0x30 /* Mask for transmit trigger set at 56 */
-
-#define STD_SERIAL_PORT_DEFNS
-#define EXTRA_SERIAL_PORT_DEFNS
-#define BASE_BAUD 0
-
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_ARCH_SERIAL_H */
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-omap/time.h
- *
- * 32kHz timer definition
- *
- * Copyright (C) 2000 RidgeRun, Inc.
- * Author: Greg Lonnon <glonnon@ridgerun.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#if !defined(__ASM_ARCH_OMAP_TIME_H)
-#define __ASM_ARCH_OMAP_TIME_H
-
-#include <linux/config.h>
-#include <linux/delay.h>
-#include <asm/system.h>
-#include <asm/hardware.h>
-#include <asm/io.h>
-#include <asm/leds.h>
-#include <asm/irq.h>
-#include <asm/mach/irq.h>
-#include <asm/arch/clocks.h>
-
-#ifndef __instrument
-#define __instrument
-#define __noinstrument __attribute__ ((no_instrument_function))
-#endif
-
-typedef struct {
- u32 cntl; /* CNTL_TIMER, R/W */
- u32 load_tim; /* LOAD_TIM, W */
- u32 read_tim; /* READ_TIM, R */
-} mputimer_regs_t;
-
-#define mputimer_base(n) \
- ((volatile mputimer_regs_t*)IO_ADDRESS(OMAP_MPUTIMER_BASE + \
- (n)*OMAP_MPUTIMER_OFFSET))
-
-static inline unsigned long timer32k_read(int reg) {
- unsigned long val;
- val = omap_readw(reg + OMAP_32kHz_TIMER_BASE);
- return val;
-}
-static inline void timer32k_write(int reg,int val) {
- omap_writew(val, reg + OMAP_32kHz_TIMER_BASE);
-}
-
-/*
- * How long is the timer interval? 100 HZ, right...
- * IRQ rate = (TVR + 1) / 32768 seconds
- * TVR = 32768 * IRQ_RATE -1
- * IRQ_RATE = 1/100
- * TVR = 326
- */
-#define TIMER32k_PERIOD 326
-//#define TIMER32k_PERIOD 0x7ff
-
-static inline void start_timer32k(void) {
- timer32k_write(TIMER32k_CR,
- TIMER32k_TSS | TIMER32k_TRB |
- TIMER32k_INT | TIMER32k_ARL);
-}
-
-#ifdef CONFIG_MACH_OMAP_PERSEUS2
-/*
- * After programming PTV with 0 and setting the MPUTIM_CLOCK_ENABLE
- * (external clock enable) bit, the timer count rate is 6.5 MHz (13
- * MHZ input/2). !! The divider by 2 is undocumented !!
- */
-#define MPUTICKS_PER_SEC (13000000/2)
-#else
-/*
- * After programming PTV with 0, the timer count rate is 6 MHz.
- * WARNING! this must be an even number, or machinecycles_to_usecs
- * below will break.
- */
-#define MPUTICKS_PER_SEC (12000000/2)
-#endif
-
-static int mputimer_started[3] = {0,0,0};
-
-static inline void __noinstrument start_mputimer(int n,
- unsigned long load_val)
-{
- volatile mputimer_regs_t* timer = mputimer_base(n);
-
- mputimer_started[n] = 0;
- timer->cntl = MPUTIM_CLOCK_ENABLE;
- udelay(1);
-
- timer->load_tim = load_val;
- udelay(1);
- timer->cntl = (MPUTIM_CLOCK_ENABLE | MPUTIM_AR | MPUTIM_ST);
- mputimer_started[n] = 1;
-}
-
-static inline unsigned long __noinstrument
-read_mputimer(int n)
-{
- volatile mputimer_regs_t* timer = mputimer_base(n);
- return (mputimer_started[n] ? timer->read_tim : 0);
-}
-
-void __noinstrument start_mputimer1(unsigned long load_val)
-{
- start_mputimer(0, load_val);
-}
-void __noinstrument start_mputimer2(unsigned long load_val)
-{
- start_mputimer(1, load_val);
-}
-void __noinstrument start_mputimer3(unsigned long load_val)
-{
- start_mputimer(2, load_val);
-}
-
-unsigned long __noinstrument read_mputimer1(void)
-{
- return read_mputimer(0);
-}
-unsigned long __noinstrument read_mputimer2(void)
-{
- return read_mputimer(1);
-}
-unsigned long __noinstrument read_mputimer3(void)
-{
- return read_mputimer(2);
-}
-
-unsigned long __noinstrument do_getmachinecycles(void)
-{
- return 0 - read_mputimer(0);
-}
-
-unsigned long __noinstrument machinecycles_to_usecs(unsigned long mputicks)
-{
- /* Round up to nearest usec */
- return ((mputicks * 1000) / (MPUTICKS_PER_SEC / 2 / 1000) + 1) >> 1;
-}
-
-/*
- * This marks the time of the last system timer interrupt
- * that was *processed by the ISR* (timer 2).
- */
-static unsigned long systimer_mark;
-
-static unsigned long omap1510_gettimeoffset(void)
-{
- /* Return elapsed usecs since last system timer ISR */
- return machinecycles_to_usecs(do_getmachinecycles() - systimer_mark);
-}
-
-static irqreturn_t
-omap1510_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- unsigned long now, ilatency;
-
- /*
- * Mark the time at which the timer interrupt ocurred using
- * timer1. We need to remove interrupt latency, which we can
- * retrieve from the current system timer2 counter. Both the
- * offset timer1 and the system timer2 are counting at 6MHz,
- * so we're ok.
- */
- now = 0 - read_mputimer1();
- ilatency = MPUTICKS_PER_SEC / 100 - read_mputimer2();
- systimer_mark = now - ilatency;
-
- do_leds();
- do_timer(regs);
- do_profile(regs);
-
- return IRQ_HANDLED;
-}
-
-void __init time_init(void)
-{
- /* Since we don't call request_irq, we must init the structure */
- gettimeoffset = omap1510_gettimeoffset;
-
- timer_irq.handler = omap1510_timer_interrupt;
- timer_irq.flags = SA_INTERRUPT;
-#ifdef OMAP1510_USE_32KHZ_TIMER
- timer32k_write(TIMER32k_CR, 0x0);
- timer32k_write(TIMER32k_TVR,TIMER32k_PERIOD);
- setup_irq(INT_OS_32kHz_TIMER, &timer_irq);
- start_timer32k();
-#else
- setup_irq(INT_TIMER2, &timer_irq);
- start_mputimer2(MPUTICKS_PER_SEC / 100 - 1);
-#endif
-}
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-pxa/ide.h
- *
- * Author: George Davis
- * Created: Jan 10, 2002
- * Copyright: MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *
- * Originally based upon linux/include/asm-arm/arch-sa1100/ide.h
- *
- */
-
-#include <asm/irq.h>
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
-
-
-/*
- * Set up a hw structure for a specified data port, control port and IRQ.
- * This should follow whatever the default interface uses.
- */
-static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
- unsigned long ctrl_port, int *irq)
-{
- unsigned long reg = data_port;
- int i;
- int regincr = 1;
-
- memset(hw, 0, sizeof(*hw));
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += regincr;
- }
-
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
-
- if (irq)
- *irq = 0;
-}
-
-
-/*
- * Register the standard ports for this architecture with the IDE driver.
- */
-static __inline__ void
-ide_init_default_hwifs(void)
-{
- /* Nothing to declare... */
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-pxa/keyboard.h
- *
- * This file contains the architecture specific keyboard definitions
- */
-
-#ifndef _PXA_KEYBOARD_H
-#define _PXA_KEYBOARD_H
-
-#include <asm/mach-types.h>
-#include <asm/hardware.h>
-
-extern struct kbd_ops_struct *kbd_ops;
-
-#define kbd_disable_irq() do { } while(0);
-#define kbd_enable_irq() do { } while(0);
-
-extern int sa1111_kbd_init_hw(void);
-
-static inline void kbd_init_hw(void)
-{
- if (machine_is_lubbock())
- sa1111_kbd_init_hw();
-}
-
-
-#endif /* _PXA_KEYBOARD_H */
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-pxa/serial.h
- *
- * Author: Nicolas Pitre
- * Copyright: (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <asm/arch/pxa-regs.h>
-
-#define BAUD_BASE 921600
-
-/* Standard COM flags */
-#define STD_COM_FLAGS (ASYNC_SKIP_TEST)
-
-#define STD_SERIAL_PORT_DEFNS \
- { \
- type: PORT_PXA, \
- xmit_fifo_size: 64, \
- baud_base: BAUD_BASE, \
- iomem_base: &FFUART, \
- iomem_reg_shift: 2, \
- io_type: SERIAL_IO_MEM, \
- irq: IRQ_FFUART, \
- flags: STD_COM_FLAGS, \
- }, { \
- type: PORT_PXA, \
- xmit_fifo_size: 64, \
- baud_base: BAUD_BASE, \
- iomem_base: &STUART, \
- iomem_reg_shift: 2, \
- io_type: SERIAL_IO_MEM, \
- irq: IRQ_STUART, \
- flags: STD_COM_FLAGS, \
- }, { \
- type: PORT_PXA, \
- xmit_fifo_size: 64, \
- baud_base: BAUD_BASE, \
- iomem_base: &BTUART, \
- iomem_reg_shift: 2, \
- io_type: SERIAL_IO_MEM, \
- irq: IRQ_BTUART, \
- flags: STD_COM_FLAGS, \
- }
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-pxa/time.h
- *
- * Author: Nicolas Pitre
- * Created: Jun 15, 2001
- * Copyright: MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-
-static inline unsigned long pxa_get_rtc_time(void)
-{
- return RCNR;
-}
-
-static int pxa_set_rtc(void)
-{
- unsigned long current_time = xtime.tv_sec;
-
- if (RTSR & RTSR_ALE) {
- /* make sure not to forward the clock over an alarm */
- unsigned long alarm = RTAR;
- if (current_time >= alarm && alarm >= RCNR)
- return -ERESTARTSYS;
- }
- RCNR = current_time;
- return 0;
-}
-
-/* IRQs are disabled before entering here from do_gettimeofday() */
-static unsigned long pxa_gettimeoffset (void)
-{
- long ticks_to_match, elapsed, usec;
-
- /* Get ticks before next timer match */
- ticks_to_match = OSMR0 - OSCR;
-
- /* We need elapsed ticks since last match */
- elapsed = LATCH - ticks_to_match;
-
- /* don't get fooled by the workaround in pxa_timer_interrupt() */
- if (elapsed <= 0)
- return 0;
-
- /* Now convert them to usec */
- usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
-
- return usec;
-}
-
-static irqreturn_t
-pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- int next_match;
-
- do_profile(regs);
-
- /* Loop until we get ahead of the free running timer.
- * This ensures an exact clock tick count and time accuracy.
- * IRQs are disabled inside the loop to ensure coherence between
- * lost_ticks (updated in do_timer()) and the match reg value, so we
- * can use do_gettimeofday() from interrupt handlers.
- *
- * HACK ALERT: it seems that the PXA timer regs aren't updated right
- * away in all cases when a write occurs. We therefore compare with
- * 8 instead of 0 in the while() condition below to avoid missing a
- * match if OSCR has already reached the next OSMR value.
- * Experience has shown that up to 6 ticks are needed to work around
- * this problem, but let's use 8 to be conservative. Note that this
- * affect things only when the timer IRQ has been delayed by nearly
- * exactly one tick period which should be a pretty rare event.
- */
- do {
- do_leds();
- do_set_rtc();
- do_timer(regs);
- OSSR = OSSR_M0; /* Clear match on timer 0 */
- next_match = (OSMR0 += LATCH);
- } while( (signed long)(next_match - OSCR) <= 8 );
-
- return IRQ_HANDLED;
-}
-
-void __init time_init(void)
-{
- struct timespec tv;
-
- gettimeoffset = pxa_gettimeoffset;
- set_rtc = pxa_set_rtc;
-
- tv.tv_nsec = 0;
- tv.tv_sec = pxa_get_rtc_time();
- do_settimeofday(&tv);
-
- timer_irq.handler = pxa_timer_interrupt;
- OSMR0 = 0; /* set initial match at 0 */
- OSSR = 0xf; /* clear status on all timers */
- setup_irq(IRQ_OST0, &timer_irq);
- OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */
- OSCR = 0; /* initialize free-running timer, force first match */
-}
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-rpc/ide.h
- *
- * Copyright (C) 1997 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Modifications:
- * 29-07-1998 RMK Major re-work of IDE architecture specific code
- */
-#include <asm/irq.h>
-
-/*
- * Set up a hw structure for a specified data port, control port and IRQ.
- * This should follow whatever the default interface uses.
- */
-static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
- unsigned long ctrl_port, int *irq)
-{
- unsigned long reg = data_port;
- int i;
-
- memset(hw, 0, sizeof(*hw));
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- if (irq)
- *irq = 0;
-}
-
-/*
- * This registers the standard ports for this architecture with the IDE
- * driver.
- */
-static __inline__ void
-ide_init_default_hwifs(void)
-{
- hw_regs_t hw;
-
- ide_init_hwif_ports(&hw, 0x1f0, 0x3f6, NULL);
- hw.irq = IRQ_HARDDISK;
- ide_register_hw(&hw, NULL);
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-rpc/serial.h
- *
- * Copyright (C) 1996 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 15-10-1996 RMK Created
- */
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD (1843200 / 16)
-
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
- /* UART CLK PORT IRQ FLAGS */
-#define STD_SERIAL_PORT_DEFNS \
- { 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS1 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS2 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS3 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS4 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS5 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS6 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS7 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS8 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS9 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS10 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS11 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS12 */ \
- { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS } /* ttyS13 */
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-rpc/time.h
- *
- * Copyright (C) 1996-2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 24-Sep-1996 RMK Created
- * 10-Oct-1996 RMK Brought up to date with arch-sa110eval
- * 04-Dec-1997 RMK Updated for new arch/arm/time.c
- */
-extern void ioctime_init(void);
-
-static irqreturn_t
-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- do_timer(regs);
- do_set_rtc();
- do_profile(regs);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt.
- */
-void __init time_init(void)
-{
- ioctime_init();
-
- timer_irq.handler = timer_interrupt;
-
- setup_irq(IRQ_TIMER, &timer_irq);
-}
+++ /dev/null
-/* linux/include/asm-arm/arch-s3c2410/ide.h
- *
- * Copyright (C) 1997 Russell King
- * Copyright (C) 2003 Simtec Electronics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Modifications:
- * 29-07-1998 RMK Major re-work of IDE architecture specific code
- * 16-05-2003 BJD Changed to work with BAST IDE ports
- * 04-09-2003 BJD Modifications for V2.6
- */
-
-#ifndef __ASM_ARCH_IDE_H
-#define __ASM_ARCH_IDE_H
-
-#include <asm/irq.h>
-
-/*
- * Set up a hw structure for a specified data port, control port and IRQ.
- * This should follow whatever the default interface uses.
- */
-
-static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
- unsigned long ctrl_port, int *irq)
-{
- unsigned long reg = data_port;
- int i;
-
- memset(hw, 0, sizeof(*hw));
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- if (irq)
- *irq = 0;
-}
-
-/* we initialise our ide devices from the main ide core, due to problems
- * with doing it in this function
-*/
-
-#define ide_init_default_hwifs() do { } while(0)
-
-#endif /* __ASM_ARCH_IDE_H */
+++ /dev/null
-/* linux/include/asm-arm/arch-s3c2410/serial.h
- *
- * (c) 2003 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2410 - serial port definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- * 03-Sep-2003 BJD Created file
- * 19-Mar-2004 BJD Removed serial port definitions, inserted elsewhere
-*/
-
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-/* Standard COM flags */
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-#define BASE_BAUD ( 1843200 / 16 )
-
-#define STD_SERIAL_PORT_DEFNS
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif /* __ASM_ARCH_SERIAL_H */
+++ /dev/null
-/* linux/include/asm-arm/arch-s3c2410/time.h
- *
- * Copyright (C) 2003 Simtec Electronics <linux@simtec.co.uk>
- * Ben Dooks, <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <asm/system.h>
-#include <asm/leds.h>
-#include <asm/mach-types.h>
-
-#include <asm/io.h>
-#include <asm/arch/map.h>
-#include <asm/arch/regs-timer.h>
-
-extern unsigned long (*gettimeoffset)(void);
-
-static unsigned long timer_startval;
-static unsigned long timer_ticks_usec;
-
-#ifdef CONFIG_S3C2410_RTC
-extern void s3c2410_rtc_check();
-#endif
-
-/* with an 12MHz clock, we get 12 ticks per-usec
- */
-
-
-/***
- * Returns microsecond since last clock interrupt. Note that interrupts
- * will have been disabled by do_gettimeoffset()
- * IRQs are disabled before entering here from do_gettimeofday()
- */
-static unsigned long s3c2410_gettimeoffset (void)
-{
- unsigned long tdone;
- unsigned long usec;
-
- /* work out how many ticks have gone since last timer interrupt */
-
- tdone = timer_startval - __raw_readl(S3C2410_TCNTO(4));
-
- /* currently, tcnt is in 12MHz units, but this may change
- * for non-bast machines...
- */
-
- usec = tdone / timer_ticks_usec;
-
- return usec;
-}
-
-
-/*
- * IRQ handler for the timer
- */
-static irqreturn_t
-s3c2410_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- do_leds();
- do_timer(regs);
-
- do_set_rtc();
- //s3c2410_rtc_check();
- do_profile(regs);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-
-/* currently we only use timer4, as it is the only timer which has no
- * other function that can be exploited externally
-*/
-
-void __init time_init (void)
-{
- unsigned long tcon;
- unsigned long tcnt;
- unsigned long tcfg1;
- unsigned long tcfg0;
-
- gettimeoffset = s3c2410_gettimeoffset;
- timer_irq.handler = s3c2410_timer_interrupt;
-
- tcnt = 0xffff; /* default value for tcnt */
-
- /* read the current timer configuration bits */
-
- tcon = __raw_readl(S3C2410_TCON);
- tcfg1 = __raw_readl(S3C2410_TCFG1);
- tcfg0 = __raw_readl(S3C2410_TCFG0);
-
- /* configure the system for whichever machine is in use */
-
- if (machine_is_bast() || machine_is_vr1000()) {
- timer_ticks_usec = 12; /* timer is at 12MHz */
- tcnt = (timer_ticks_usec * (1000*1000)) / HZ;
- }
-
- /* for the h1940, we use the pclk from the core to generate
- * the timer values. since 67.5MHz is not a value we can directly
- * generate the timer value from, we need to pre-scale and
- * divied before using it.
- *
- * overall divsior to get 200Hz is 337500
- * we can fit tcnt if we pre-scale by 6, producing a tick rate
- * of 11.25MHz, and a tcnt of 56250.
- */
-
- if (machine_is_h1940() || machine_is_smdk2410() ) {
- timer_ticks_usec = s3c2410_pclk / (1000*1000);
- timer_ticks_usec /= 6;
-
- tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
- tcfg1 |= S3C2410_TCFG1_MUX4_DIV2;
-
- tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
- tcfg0 |= ((6 - 1) / 2) << S3C2410_TCFG_PRESCALER1_SHIFT;
-
- tcnt = (s3c2410_pclk / 6) / HZ;
- }
-
-
- printk("setup_timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx\n",
- tcon, tcnt, tcfg0, tcfg1);
-
- /* check to see if timer is within 16bit range... */
- if (tcnt > 0xffff) {
- panic("setup_timer: HZ is too small, cannot configure timer!");
- return;
- }
-
- __raw_writel(tcfg1, S3C2410_TCFG1);
- __raw_writel(tcfg0, S3C2410_TCFG0);
-
- timer_startval = tcnt;
- __raw_writel(tcnt, S3C2410_TCNTB(4));
-
- /* ensure timer is stopped... */
-
- tcon &= ~(7<<20);
- tcon |= S3C2410_TCON_T4RELOAD;
- tcon |= S3C2410_TCON_T4MANUALUPD;
-
- __raw_writel(tcon, S3C2410_TCON);
- __raw_writel(tcnt, S3C2410_TCNTB(4));
- __raw_writel(tcnt, S3C2410_TCMPB(4));
-
- setup_irq(IRQ_TIMER4, &timer_irq);
-
- /* start the timer running */
- tcon |= S3C2410_TCON_T4START;
- tcon &= ~S3C2410_TCON_T4MANUALUPD;
- __raw_writel(tcon, S3C2410_TCON);
-}
-
-
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-sa1100/adsbitsy.h
- *
- * Created 7/3/01 by Woojung <whuh@applieddata.net>
- *
- * This file contains the hardware specific definitions for the
- * ADS Bitsy Board
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <asm/hardware.h> instead"
-#endif
-
-#define SA1111_BASE (0x18000000)
+++ /dev/null
-/*
- * include/asm-arm/arch-sa1100/flexanet.h
- *
- * Created 2001/05/04 by Jordi Colomer <jco@ict.es>
- *
- * This file contains the hardware specific definitions for FlexaNet
- *
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <asm/hardware.h> instead"
-#endif
-
-/* Board Control Register (virtual address) */
-#define FHH_BCR_PHYS 0x10000000
-#define FHH_BCR_VIRT 0xf0000000
-#define FHH_BCR (*(volatile unsigned int *)(FHH_BCR_VIRT))
-
-/* Power-up value */
-#define FHH_BCR_POWERUP 0x00000000
-
-/* Mandatory bits */
-#define FHH_BCR_LED_GREEN (1<<0) /* General-purpose green LED (1 = on) */
-#define FHH_BCR_SPARE_1 (1<<1) /* Not defined */
-#define FHH_BCR_CF1_RST (1<<2) /* Compact Flash Slot #1 Reset (1 = reset) */
-#define FHH_BCR_CF2_RST (1<<3) /* Compact Flash Slot #2 Reset (1 = reset) */
-#define FHH_BCR_GUI_NRST (1<<4) /* GUI board reset (0 = reset) */
-#define FHH_BCR_RTS1 (1<<5) /* RS232 RTS for UART-1 */
-#define FHH_BCR_RTS3 (1<<6) /* RS232 RTS for UART-3 */
-#define FHH_BCR_XCDBG0 (1<<7) /* Not defined. Wired to XPLA3 for debug */
-
-/* BCR extension, only required by L3-bus in some audio codecs */
-#define FHH_BCR_L3MOD (1<<8) /* L3-bus MODE signal */
-#define FHH_BCR_L3DAT (1<<9) /* L3-bus DATA signal */
-#define FHH_BCR_L3CLK (1<<10) /* L3-bus CLK signal */
-#define FHH_BCR_SPARE_11 (1<<11) /* Not defined */
-#define FHH_BCR_SPARE_12 (1<<12) /* Not defined */
-#define FHH_BCR_SPARE_13 (1<<13) /* Not defined */
-#define FHH_BCR_SPARE_14 (1<<14) /* Not defined */
-#define FHH_BCR_SPARE_15 (1<<15) /* Not defined */
-
- /* Board Status Register (virtual address) */
-#define FHH_BSR_BASE FHH_BCR_VIRT
-#define FHH_BSR (*(volatile unsigned int *)(FHH_BSR_BASE))
-
-#define FHH_BSR_CTS1 (1<<0) /* RS232 CTS for UART-1 */
-#define FHH_BSR_CTS3 (1<<1) /* RS232 CTS for UART-3 */
-#define FHH_BSR_DSR1 (1<<2) /* RS232 DSR for UART-1 */
-#define FHH_BSR_DSR3 (1<<3) /* RS232 DSR for UART-3 */
-#define FHH_BSR_ID0 (1<<4) /* Board identification */
-#define FHH_BSR_ID1 (1<<5)
-#define FHH_BSR_CFG0 (1<<6) /* Board configuration options */
-#define FHH_BSR_CFG1 (1<<7)
-
-#ifndef __ASSEMBLY__
-extern unsigned long flexanet_BCR; /* Image of the BCR */
-#define FLEXANET_BCR_set( x ) FHH_BCR = (flexanet_BCR |= (x))
-#define FLEXANET_BCR_clear( x ) FHH_BCR = (flexanet_BCR &= ~(x))
-#endif
-
-/* GPIOs for which the generic definition doesn't say much */
-#define GPIO_CF1_NCD GPIO_GPIO (14) /* Card Detect from CF slot #1 */
-#define GPIO_CF2_NCD GPIO_GPIO (15) /* Card Detect from CF slot #2 */
-#define GPIO_CF1_IRQ GPIO_GPIO (16) /* IRQ from CF slot #1 */
-#define GPIO_CF2_IRQ GPIO_GPIO (17) /* IRQ from CF slot #2 */
-#define GPIO_APP_IRQ GPIO_GPIO (18) /* Extra IRQ from application bus */
-#define GPIO_RADIO_REF GPIO_GPIO (20) /* Ref. clock for UART3 (Radio) */
-#define GPIO_CF1_BVD1 GPIO_GPIO (21) /* BVD1 from CF slot #1 */
-#define GPIO_CF2_BVD1 GPIO_GPIO (22) /* BVD1 from CF slot #2 */
-#define GPIO_GUI_IRQ GPIO_GPIO (23) /* IRQ from GUI board (i.e., UCB1300) */
-#define GPIO_ETH_IRQ GPIO_GPIO (24) /* IRQ from Ethernet controller */
-#define GPIO_INTIP_IRQ GPIO_GPIO (25) /* Measurement IRQ (INTIP) */
-#define GPIO_LED_RED GPIO_GPIO (26) /* General-purpose red LED */
-
-/* IRQ sources from GPIOs */
-#define IRQ_GPIO_CF1_CD IRQ_GPIO14
-#define IRQ_GPIO_CF2_CD IRQ_GPIO15
-#define IRQ_GPIO_CF1_IRQ IRQ_GPIO16
-#define IRQ_GPIO_CF2_IRQ IRQ_GPIO17
-#define IRQ_GPIO_APP IRQ_GPIO18
-#define IRQ_GPIO_CF1_BVD1 IRQ_GPIO21
-#define IRQ_GPIO_CF2_BVD1 IRQ_GPIO22
-#define IRQ_GPIO_GUI IRQ_GPIO23
-#define IRQ_GPIO_ETH IRQ_GPIO24
-#define IRQ_GPIO_INTIP IRQ_GPIO25
-
-
-/* On-Board Ethernet */
-#define _FHH_ETH_IOBASE 0x18000000 /* I/O base (physical addr) */
-#define _FHH_ETH_MMBASE 0x18800000 /* Attribute-memory base */
-#define FHH_ETH_SIZE 0x01000000 /* total size */
-#define FHH_ETH_VIRT 0xF1000000 /* Ethernet virtual address */
-
-#define FHH_ETH_p2v( x ) ((x) - _FHH_ETH_IOBASE + FHH_ETH_VIRT)
-#define FHH_ETH_v2p( x ) ((x) - FHH_ETH_VIRT + _FHH_ETH_IOBASE)
-
-#define FHH_ETH_IOBASE FHH_ETH_p2v(_FHH_ETH_IOBASE) /* Virtual base addr */
-#define FHH_ETH_MMBASE FHH_ETH_p2v(_FHH_ETH_MMBASE)
-
-
+++ /dev/null
-/*
- *
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <asm/hardware.h> instead"
-#endif
-
-
-/* Board Control Register */
-
-#define BCR_BASE 0xf0000000
-#define BCR (*(volatile unsigned int *)(BCR_BASE))
-
-#define BCR_DB1110 (0x00A07410)
-
-
-#define BCR_FREEBIRD_AUDIO_PWR (1<<0) /* Audio Power (1 = on, 0 = off) */
-#define BCR_FREEBIRD_LCD_PWR (1<<1) /* LCD Power (1 = on) */
-#define BCR_FREEBIRD_CODEC_RST (1<<2) /* 0 = Holds UCB1300, ADI7171, and UDA1341 in reset */
-#define BCR_FREEBIRD_IRDA_FSEL (1<<3) /* IRDA Frequency select (0 = SIR, 1 = MIR/ FIR) */
-#define BCR_FREEBIRD_IRDA_MD0 (1<<4) /* Range/Power select */
-#define BCR_FREEBIRD_IRDA_MD1 (1<<5) /* Range/Power select */
-#define BCR_FREEBIRD_LCD_DISP (1<<7) /* LCD display (1 = on, 0 = off */
-#define BCR_FREEBIRD_LCD_BACKLIGHT (1<<16) /* LCD backlight ,1=on */
-#define BCR_FREEBIRD_LCD_LIGHT_INC (1<<17) /* LCD backlight brightness */
-#define BCR_FREEBIRD_LCD_LIGHT_DU (1<<18) /* LCD backlight brightness */
-#define BCR_FREEBIRD_LCD_INC (1<<19) /* LCD contrast */
-#define BCR_FREEBIRD_LCD_DU (1<<20) /* LCD contrast */
-#define BCR_FREEBIRD_QMUTE (1<<21) /* Quick Mute */
-#define BCR_FREEBIRD_ALARM_LED (1<<22) /* ALARM LED control */
-#define BCR_FREEBIRD_SPK_OFF (1<<23) /* 1 = Speaker amplifier power off */
-
-#ifndef __ASSEMBLY__
-extern unsigned long BCR_value;
-#define BCR_set( x ) BCR = (BCR_value |= (x))
-#define BCR_clear( x ) BCR = (BCR_value &= ~(x))
-#endif
-
-
-/* GPIOs for which the generic definition doesn't say much */
-#define GPIO_FREEBIRD_NPOWER_BUTTON GPIO_GPIO(0)
-#define GPIO_FREEBIRD_APP1_BUTTON GPIO_GPIO(1)
-#define GPIO_FREEBIRD_APP2_BUTTON GPIO_GPIO(2)
-#define GPIO_FREEBIRD_APP3_BUTTOM GPIO_GPIO(3)
-#define GPIO_FREEBIRD_UCB1300 GPIO_GPIO(4)
-
-#define GPIO_FREEBIRD_EXPWR GPIO_GPIO(8)
-#define GPIO_FREEBIRD_CHARGING GPIO_GPIO(9)
-#define GPIO_FREEBIRD_RAMD GPIO_GPIO(14)
-#define GPIO_FREEBIRD_L3_DATA GPIO_GPIO(15)
-#define GPIO_FREEBIRD_L3_MODE GPIO_GPIO(17)
-#define GPIO_FREEBIRD_L3_CLOCK GPIO_GPIO(18)
-#define GPIO_FREEBIRD_STEREO_64FS_CLK GPIO_GPIO(10)
-
-#define GPIO_FREEBIRD_CF_CD GPIO_GPIO(22)
-#define GPIO_FREEBIRD_CF_IRQ GPIO_GPIO(21)
-#define GPIO_FREEBIRD_CF_BVD GPIO_GPIO(25)
-
-#define IRQ_GPIO_FREEBIRD_NPOWER_BUTTON IRQ_GPIO0
-#define IRQ_GPIO_FREEBIRD_APP1_BUTTON IRQ_GPIO1
-#define IRQ_GPIO_FREEBIRD_APP2_BUTTON IRQ_GPIO2
-#define IRQ_GPIO_FREEBIRD_APP3_BUTTON IRQ_GPIO3
-#define IRQ_GPIO_FREEBIRD_UCB1300_IRQ IRQ_GPIO4
-
-#define IRQ_GPIO_FREEBIRD_CF_IRQ IRQ_GPIO21
-#define IRQ_GPIO_FREEBIRD_CF_CD IRQ_GPIO22
-#define IRQ_GPIO_FREEBIRD_CF_BVD IRQ_GPIO25
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-sa1100/graphicsclient.h
- *
- * Created 2000/06/11 by Nicolas Pitre <nico@cam.org>
- * Modified 7/27/00 by Woojung <whuh@applieddata.net>
- *
- * This file contains the hardware specific definitions for the
- * ADS GraphicsClient/ThinClient boards.
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <asm/hardware.h> instead"
-#endif
-
-
-#define ADS_CPLD_BASE (0x10000000)
-#define ADS_p2v( x ) ((x) - ADS_CPLD_BASE + 0xf0000000)
-#define ADS_v2p( x ) ((x) - 0xf0000000 + ADS_CPLD_BASE)
-
-
-/* Parallel Port */
-
-#define _ADS_PPDR 0x10020000 /* parallel port data reg */
-#define _ADS_PPSR 0x10020004 /* parallel port status reg */
-
-
-/* PCMCIA */
-
-#define _ADS_CS_STATUS 0x10040000 /* PCMCIA status reg */
-#define ADS_CS_ST_A_READY (1 << 0) /* Socket A Card Ready */
-#define ADS_CS_ST_A_CD (1 << 2) /* Socket A Card Detect */
-#define ADS_CS_ST_A_BUSY (1 << 4) /* Socket A Card Busy */
-#define ADS_CS_ST_A_STS (1 << 6) /* Socket A Card STS */
-
-#define _ADS_CS_PR 0x10040004 /* PCMCIA Power/Reset */
-#define ADS_CS_PR_A_5V_POWER (1 << 0) /* Socket A Enable 5V Power */
-#define ADS_CS_PR_A_3V_POWER (1 << 0) /* Socket A Enable 3.3V Power */
-#define ADS_CS_PR_A_RESET (1 << 2) /* Socket A Reset */
-
-
-#define _ADS_SW_SWITCHES 0x10060000 /* Software Switches */
-
-
-/* Extra IRQ Controller */
-
-#define _ADS_INT_ST1 0x10080000 /* IRQ Status #1 */
-#define _ADS_INT_ST2 0x10080004 /* IRQ Status #2 */
-#define _ADS_INT_EN1 0x10080008 /* IRQ Enable #1 */
-#define _ADS_INT_EN2 0x1008000c /* IRQ Enable #2 */
-
-/* Discrete Controller (AVR:Atmel AT90LS8535) */
-#define _ADS_AVR_REG 0x10080018
-
-/* On-Board Ethernet */
-
-#define _ADS_ETHERNET 0x100e0000 /* Ethernet */
-
-
-/* Extra UARTs */
-
-#define _ADS_UARTA 0x10100000 /* UART A */
-#define _ADS_UARTB 0x10120000 /* UART B */
-#define _ADS_UARTC 0x10140000 /* UART C */
-#define _ADS_UARTD 0x10160000 /* UART D */
-
-/* UART control lines GPIOs */
-#define GPIO_GC_UART0_RTS GPIO_GPIO15
-#define GPIO_GC_UART1_RTS GPIO_GPIO17
-#define GPIO_GC_UART2_RTS GPIO_GPIO19
-#define GPIO_GC_UART0_CTS GPIO_GPIO14
-#define GPIO_GC_UART1_CTS GPIO_GPIO16
-#define GPIO_GC_UART2_CTS GPIO_GPIO17
-
-/* UART control lines IRQs */
-#define IRQ_GC_UART0_CTS IRQ_GPIO14
-#define IRQ_GC_UART1_CTS IRQ_GPIO16
-#define IRQ_GC_UART2_CTS IRQ_GPIO17
-
-/* LEDs */
-
-#define ADS_LED0 GPIO_GPIO20 /* on-board D22 */
-#define ADS_LED1 GPIO_GPIO21 /* on-board D21 */
-#define ADS_LED2 GPIO_GPIO22 /* on-board D20 */
-#define ADS_LED3 GPIO_GPIO23 /* external */
-#define ADS_LED4 GPIO_GPIO24 /* external */
-#define ADS_LED5 GPIO_GPIO25 /* external */
-#define ADS_LED6 GPIO_GPIO26 /* external */
-#define ADS_LED7 GPIO_GPIO27 /* external */
-
-
-/* Virtual register addresses */
-
-#ifndef __ASSEMBLY__
-#define ADS_INT_ST1 (*((volatile u_char *) ADS_p2v(_ADS_INT_ST1)))
-#define ADS_INT_ST2 (*((volatile u_char *) ADS_p2v(_ADS_INT_ST2)))
-#define ADS_INT_EN1 (*((volatile u_char *) ADS_p2v(_ADS_INT_EN1)))
-#define ADS_INT_EN2 (*((volatile u_char *) ADS_p2v(_ADS_INT_EN2)))
-#define ADS_ETHERNET ((int) ADS_p2v(_ADS_ETHERNET))
-#define ADS_AVR_REG (*((volatile u_char *) ADS_p2v(_ADS_AVR_REG)))
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-sa1100/graphicsmaster.h
- *
- * Created 2000/12/18 by Woojung Huh <whuh@applieddata.net>
- *
- * This file comes from graphicsclient.h of Nicolas Pitre <nico@cam.org>
- *
- * This file contains the hardware specific definitions for the
- * ADS GraphicsMaster
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <asm/hardware.h> instead"
-#endif
-
-#define ADS_CPLD_BASE (0x10000000)
-#define ADS_p2v( x ) ((x) - ADS_CPLD_BASE + 0xf0000000)
-#define ADS_v2p( x ) ((x) - 0xf0000000 + ADS_CPLD_BASE)
-
-
-#define _ADS_SW_SWITCHES 0x10060000 /* Software Switches */
-
-/* Extra IRQ Controller */
-#define _ADS_INT_ST1 0x10080000 /* IRQ Status #1 */
-#define _ADS_INT_ST2 0x10080004 /* IRQ Status #2 */
-#define _ADS_INT_EN1 0x10080008 /* IRQ Enable #1 */
-#define _ADS_INT_EN2 0x1008000c /* IRQ Enable #2 */
-#define _ADS_DCR 0x10080018 /* Discrete Control Reg */
-
-/* Discrete Controller (AVR:Atmel AT90LS8535) */
-#define _ADS_AVR_REG 0x10080018
-
-/* On-Board Ethernet */
-#define _ADS_ETHERNET 0x100e0000 /* Ethernet */
-
-/* On-Board Quad UART 16C554 */
-#define ADS_QUAD_UART1 0x10100000
-#define ADS_QUAD_UART2 0x10120000
-#define ADS_QUAD_UART3 0x10140000
-#define ADS_QUAD_UART4 0x10160000
-
-/* LEDs */
-#define ADS_LED0 GPIO_GPIO20 /* on-board Green */
-#define ADS_LED1 GPIO_GPIO25 /* on-board Yellow */
-#define ADS_LED2 GPIO_GPIO26 /* on-board Red */
-
-/* DCR */
-#define DCR_AVR_RESET 0x01
-#define DCR_SA1111_RESET 0x02
-#define DCR_BACKLITE_ON 0x04
-
-/* Virtual register addresses */
-
-#ifndef __ASSEMBLY__
-#define ADS_INT_ST1 (*((volatile u_char *) ADS_p2v(_ADS_INT_ST1)))
-#define ADS_INT_ST2 (*((volatile u_char *) ADS_p2v(_ADS_INT_ST2)))
-#define ADS_INT_EN1 (*((volatile u_char *) ADS_p2v(_ADS_INT_EN1)))
-#define ADS_INT_EN2 (*((volatile u_char *) ADS_p2v(_ADS_INT_EN2)))
-#define ADS_ETHERNET ((int) ADS_p2v(_ADS_ETHERNET))
-#define ADS_AVR_REG (*((volatile u_char *) ADS_p2v(_ADS_AVR_REG)))
-#define ADS_DCR (*((volatile u_char *) ADS_p2v(_ADS_DCR)))
-#endif
-
-#define SA1111_BASE (0x18000000)
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-sa1100/huw_webpanel.h
- *
- * based of assabet.h
- *
- * This file contains the hardware specific definitions for HUW_Webpanel
- *
- * 2000/11/13 Roman Jordan <jor@hoeft-wessel.de>
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <asm/hardware.h> instead"
-#endif
-
-/* System Configuration Register flags */
-
-#define SCR_SDRAM_LOW (1<<2) /* SDRAM size (low bit) */
-#define SCR_SDRAM_HIGH (1<<3) /* SDRAM size (high bit) */
-#define SCR_FLASH_LOW (1<<4) /* Flash size (low bit) */
-#define SCR_FLASH_HIGH (1<<5) /* Flash size (high bit) */
-#define SCR_GFX (1<<8) /* Graphics Accelerator (0 = present) */
-#define SCR_SA1111 (1<<9) /* Neponset (0 = present) */
-
-#define SCR_INIT -1
-
-
-/* Board Control Register */
-
-#define BCR_BASE 0xf1000000
-#define BCR (*(volatile unsigned int *)(BCR_BASE))
-
-#define BCR_PSIO_DTR1 (1<<29)
-#define BCR_TFT_NPWR (1<<28)
-#define BCR_PSIO_DTR3 (1<<27)
-#define BCR_TFT_ENA (1<<26)
-#define BCR_CCFL_POW (1<<25)
-#define BCR_PSIO_RTS1 (1<<24)
-#define BCR_PWM_BACKLIGHT (1<<23)
-
-
-#ifndef __ASSEMBLY__
-extern unsigned long SCR_value;
-extern unsigned long BCR_value;
-#define BCR_set( x ) BCR = (BCR_value |= (x))
-#define BCR_clear( x ) BCR = (BCR_value &= ~(x))
-#endif
-
-
-
+++ /dev/null
-#ifndef _INCLUDE_ITSY_H_
-#define _INCLUDE_ITSY_H_
-
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-sa1100/keyboard.h
- * Created 16 Dec 1999 by Nicolas Pitre <nico@cam.org>
- * This file contains the SA1100 architecture specific keyboard definitions
- */
-#ifndef _SA1100_KEYBOARD_H
-#define _SA1100_KEYBOARD_H
-
-#include <linux/config.h>
-#include <asm/mach-types.h>
-
-extern void gc_kbd_init_hw(void);
-extern void smartio_kbd_init_hw(void);
-
-static inline void kbd_init_hw(void)
-{
- if (machine_is_graphicsclient())
- gc_kbd_init_hw();
- if (machine_is_adsbitsy())
- smartio_kbd_init_hw();
-}
-
-#endif /* _SA1100_KEYBOARD_H */
+++ /dev/null
-#ifndef _ARCH_ARM_MFTB2_h_
-#define _ARCH_ARM_MFTB2_h_
-
-// Defines for arch/arm/mm/mm-sa1100.h
-#define TRIZEPS_PHYS_VIRT_MAP_SIZE 0x00800000l
-
-// physical address (only for mm-sa1100.h)
-#define TRIZEPS_PHYS_IO_BASE 0x30000000l
-#define TRIZEPS_PHYS_MEM_BASE 0x38000000l
-
-// virtual
-#define TRIZEPS_IO_BASE 0xF0000000l
-#define TRIZEPS_MEM_BASE 0xF2000000l
-
-// Offsets for phys and virtual
-#define TRIZEPS_OFFSET_REG0 0x00300000l
-#define TRIZEPS_OFFSET_REG1 0x00380000l
-#define TRIZEPS_OFFSET_IDE_CS0 0x00000000l
-#define TRIZEPS_OFFSET_IDE_CS1 0x00080000l
-#define TRIZEPS_OFFSET_UART5 0x00100000l
-#define TRIZEPS_OFFSET_UART6 0x00180000l
-#define TRIZEPS_PHYS_REG0 (TRIZEPS_PHYS_IO_BASE + TRIZEPS_OFFSET_REG0)
-#define TRIZEPS_PHYS_REG1 (TRIZEPS_PHYS_IO_BASE + TRIZEPS_OFFSET_REG1)
-#define TRIZEPS_PHYS_IDE_CS0 (TRIZEPS_PHYS_IO_BASE + TRIZEPS_OFFSET_IDE_CS0)
-#define TRIZEPS_PHYS_IDE_CS1 (TRIZEPS_PHYS_IO_BASE + TRIZEPS_OFFSET_IDE_CS1)
-#define TRIZEPS_PHYS_UART5 (TRIZEPS_PHYS_IO_BASE + TRIZEPS_OFFSET_UART5)
-#define TRIZEPS_PHYS_UART6 (TRIZEPS_PHYS_IO_BASE + TRIZEPS_OFFSET_UART6)
-
-// Use follow defines in devices
-// virtual address
-#define TRIZEPS_REG0 (TRIZEPS_IO_BASE + TRIZEPS_OFFSET_REG0)
-#define TRIZEPS_REG1 (TRIZEPS_IO_BASE + TRIZEPS_OFFSET_REG1)
-#define TRIZEPS_IDE_CS0 (TRIZEPS_IO_BASE + TRIZEPS_OFFSET_IDE_CS0)
-#define TRIZEPS_IDE_CS1 (TRIZEPS_IO_BASE + TRIZEPS_OFFSET_IDE_CS1)
-#define TRIZEPS_UART5 (TRIZEPS_IO_BASE + TRIZEPS_OFFSET_UART5)
-#define TRIZEPS_UART6 (TRIZEPS_IO_BASE + TRIZEPS_OFFSET_UART6)
-
-#define TRIZEPS_BAUD_BASE 1500000
-
-//#if 0 //temporarily disabled
-#ifndef __ASSEMBLY__
-struct tri_uart_cts_data_t {
- int cts_gpio;
- int cts_prev_state;
- struct uart_info *info;
- struct uart_port *port;
- const char *name;
-};
-#endif /* __ASSEMBLY__ */
-
-/* Defines for MFTB2 serial_sa1100.c hardware handshaking lines */
-#define SERIAL_FULL
-#define NOT_CONNECTED 0
-#ifdef SERIAL_FULL
-#define TRIZEPS_GPIO_UART1_RTS GPIO_GPIO14
-#define TRIZEPS_GPIO_UART1_DTR NOT_CONNECTED //GPIO_GPIO9
-#define TRIZEPS_GPIO_UART1_CTS GPIO_GPIO15
-#define TRIZEPS_GPIO_UART1_DCD NOT_CONNECTED //GPIO_GPIO2
-#define TRIZEPS_GPIO_UART1_DSR NOT_CONNECTED //GPIO_GPIO3
-#define TRIZEPS_GPIO_UART3_RTS NOT_CONNECTED //GPIO_GPIO7
-#define TRIZEPS_GPIO_UART3_DTR NOT_CONNECTED //GPIO_GPIO8
-#define TRIZEPS_GPIO_UART3_CTS NOT_CONNECTED //GPIO_GPIO4
-#define TRIZEPS_GPIO_UART3_DCD NOT_CONNECTED //GPIO_GPIO5
-#define TRIZEPS_GPIO_UART3_DSR NOT_CONNECTED //GPIO_GPIO6
-
-#define TRIZEPS_GPIO_UART2_RTS NOT_CONNECTED //GPIO_GPIO7
-#define TRIZEPS_GPIO_UART2_DTR NOT_CONNECTED //GPIO_GPIO8
-#define TRIZEPS_GPIO_UART2_CTS NOT_CONNECTED //GPIO_GPIO4
-#define TRIZEPS_GPIO_UART2_DCD NOT_CONNECTED //GPIO_GPIO5
-#define TRIZEPS_GPIO_UART2_DSR NOT_CONNECTED //GPIO_GPIO6
-
-#define TRIZEPS_IRQ_UART1_CTS IRQ_GPIO15
-#define TRIZEPS_IRQ_UART1_DCD NO_IRQ //IRQ_GPIO2
-#define TRIZEPS_IRQ_UART1_DSR NO_IRQ //IRQ_GPIO3
-#define TRIZEPS_IRQ_UART3_CTS NO_IRQ //IRQ_GPIO4
-#define TRIZEPS_IRQ_UART3_DCD NO_IRQ //IRQ_GPIO5
-#define TRIZEPS_IRQ_UART3_DSR NO_IRQ //IRQ_GPIO6
-
-#define TRIZEPS_IRQ_UART2_CTS NO_IRQ //IRQ_GPIO4
-#define TRIZEPS_IRQ_UART2_DCD NO_IRQ //IRQ_GPIO5
-#define TRIZEPS_IRQ_UART2_DSR NO_IRQ //IRQ_GPIO6
-
-#endif /* SERIAL_FULL */
-//#endif //0
-
-/*
- * This section contains the defines for the MFTB2 implementation
- * of drivers/ide/hd.c. HD_IOBASE_0 and HD_IOBASE_1 have to be
- * adjusted if hardware changes.
- */
-#define TRIZEPS_IRQ_IDE 10 /* MFTB2 specific */
-
-/*--- ROOT ---*/
-#define TRIZEPS_GPIO_ROOT_NFS 0
-#define TRIZEPS_GPIO_ROOT_HD 21
-/*--- PCMCIA ---*/
-#define TRIZEPS_GPIO_PCMCIA_IRQ0 1
-#define TRIZEPS_GPIO_PCMCIA_CD0 24
-#define TRIZEPS_IRQ_PCMCIA_IRQ0 TRIZEPS_GPIO_PCMCIA_IRQ0
-#define TRIZEPS_IRQ_PCMCIA_CD0 TRIZEPS_GPIO_PCMCIA_CD0 + 32 - 11
-
-// REGISTER 0 -> 0x0XXXX (16bit access)
-// read only
-#define TRIZEPS_A_STAT 0x8000l
-#define TRIZEPS_F_STAT 0x4000l
-#define TRIZEPS_BATT_FAULT_EN 0x2000l
-#define TRIZEPS_nDQ 0x1000l
-#define TRIZEPS_MFT_OFF 0x0800l
-#define TRIZEPS_D_APWOFF 0x0400l
-#define TRIZEPS_F_CTRL 0x0200l
-#define TRIZEPS_F_STOP 0x0100l
-
-// read / write
-#define TRIZEPS_KP_IR_EN 0x0080l
-#define TRIZEPS_FIR 0x0040l
-#define TRIZEPS_BAR_ON 0x0020l
-#define TRIZEPS_VCI_ON 0x0010l
-#define TRIZEPS_LED4 0x0008l
-#define TRIZEPS_LED3 0x0004l
-#define TRIZEPS_LED2 0x0002l
-#define TRIZEPS_LED1 0x0001l
-
-// REGISTER 1 -> 0x1XXXX (16bit access)
-// read only
-#define TRIZEPS_nVCI2 0x8000l
-#define TRIZEPS_nAB_LOW 0x4000l
-#define TRIZEPS_nMB_DEAD 0x2000l
-#define TRIZEPS_nMB_LOW 0x1000l
-#define TRIZEPS_nPCM_VS2 0x0800l
-#define TRIZEPS_nPCM_VS1 0x0400l
-#define TRIZEPS_PCM_BVD2 0x0200l
-#define TRIZEPS_PCM_BVD1 0x0100l
-
-// read / write
-#define TRIZEPS_nROOT_NFS 0x0080l
-#define TRIZEPS_nROOT_HD 0x0040l
-#define TRIZEPS_nPCM_ENA_REG 0x0020l
-#define TRIZEPS_nPCM_RESET_DISABLE 0x0010l
-#define TRIZEPS_PCM_EN0_REG 0x0008l
-#define TRIZEPS_PCM_EN1_REG 0x0004l
-#define TRIZEPS_PCM_V3_EN_REG 0x0002l
-#define TRIZEPS_PCM_V5_EN_REG 0x0001l
-
-/* Access to Board Control Register */
-#define TRIZEPS_BCR0 (*(volatile unsigned short *)(TRIZEPS_REG0))
-#define TRIZEPS_BCR1 (*(volatile unsigned short *)(TRIZEPS_REG1))
-
-#define TRIZEPS_BCR_set( reg, x ) do { \
- unsigned long flags; \
- local_irq_save(flags); \
- (reg) |= (x); \
- local_irq_restore(flags); \
-} while (0)
-
-#define TRIZEPS_BCR_clear( reg, x ) do { \
- unsigned long flags; \
- local_irq_save(flags); \
- (reg) &= ~(x); \
- local_irq_restore(flags); \
-} while (0)
-
-#define TRIZEPS_OFFSET_KP_REG 0x00200000l
-#define TRIZEPS_OFFSET_VCI2 0x00280000l
-#define TRIZEPS_OFFSET_VCI4 0x00400000l
-
-#define TRIZEPS_OFFSET_VCI2_1_DPR (TRIZEPS_OFFSET_VCI2 + 0x00010000l)
-#define TRIZEPS_OFFSET_VCI2_2_DPR (TRIZEPS_OFFSET_VCI2 + 0x00018000l)
-#define TRIZEPS_OFFSET_VCI2_1_SEMA (TRIZEPS_OFFSET_VCI2 + 0x00020000l)
-#define TRIZEPS_OFFSET_VCI2_2_SEMA (TRIZEPS_OFFSET_VCI2 + 0x00028000l)
-
-#define TRIZEPS_OFFSET_VCI4_1_DPR (TRIZEPS_OFFSET_VCI4 + 0x00000000l)
-#define TRIZEPS_OFFSET_VCI4_2_DPR (TRIZEPS_OFFSET_VCI4 + 0x00008000l)
-#define TRIZEPS_OFFSET_VCI4_1_SEMA (TRIZEPS_OFFSET_VCI4 + 0x00000380l)
-#define TRIZEPS_OFFSET_VCI4_2_SEMA (TRIZEPS_OFFSET_VCI4 + 0x00000388l)
-#define TRIZEPS_OFFSET_VCI4_1_CNTR (TRIZEPS_OFFSET_VCI4 + 0x00000390l)
-#define TRIZEPS_OFFSET_VCI4_2_CNTR (TRIZEPS_OFFSET_VCI4 + 0x00000392l)
-
-#define TRIZEPS_PHYS_KP_REG (PHYS_TRIZEPS_IO_BASE + TRIZEPS_OFFSET_KP_REG)
-
-// VCI address
-#define TRIZEPS_PHYS_VCI2_1_DPR (TRIZEPS_PHYS_MEM_BASE + TRIZEPS_OFFSET_VCI2_1_DPR)
-#define TRIZEPS_PHYS_VCI2_2_DPR (TRIZEPS_PHYS_MEM_BASE + TRIZEPS_OFFSET_VCI2_2_DPR)
-#define TRIZEPS_PHYS_VCI2_1_SEMA (TRIZEPS_PHYS_MEM_BASE + TRIZEPS_OFFSET_VCI2_1_SEMA)
-#define TRIZEPS_PHYS_VCI2_2_SEMA (TRIZEPS_PHYS_MEM_BASE + TRIZEPS_OFFSET_VCI2_2_SEMA)
-
-// VCI4 address
-#define TRIZEPS_PHYS_VCI4_1_DPR (TRIZEPS_PHYS_MEM_BASE + TRIZEPS_OFFSET_VCI4_1_DPR)
-#define TRIZEPS_PHYS_VCI4_2_DPR (TRIZEPS_PHYS_MEM_BASE + TRIZEPS_OFFSET_VCI4_2_DPR)
-#define TRIZEPS_PHYS_VCI4_1_SEMA (TRIZEPS_PHYS_IO_BASE + TRIZEPS_OFFSET_VCI4_1_SEMA)
-#define TRIZEPS_PHYS_VCI4_2_SEMA (TRIZEPS_PHYS_IO_BASE + TRIZEPS_OFFSET_VCI4_2_SEMA)
-#define TRIZEPS_PHYS_VCI4_1_CNTR (TRIZEPS_PHYS_IO_BASE + TRIZEPS_OFFSET_VCI4_1_CNTR)
-#define TRIZEPS_PHYS_VCI4_2_CNTR (TRIZEPS_PHYS_IO_BASE + TRIZEPS_OFFSET_VCI4_2_CNTR)
-
-#define TRIZEPS_KP_REG (TRIZEPS_IO_BASE + TRIZEPS_OFFSET_KP_REG)
-
-// VCI address
-#define TRIZEPS_VCI2_1_DPR (TRIZEPS_MEM_BASE + TRIZEPS_OFFSET_VCI2_1_DPR)
-#define TRIZEPS_VCI2_2_DPR (TRIZEPS_MEM_BASE + TRIZEPS_OFFSET_VCI2_2_DPR)
-#define TRIZEPS_VCI2_1_SEMA (TRIZEPS_MEM_BASE + TRIZEPS_OFFSET_VCI2_1_SEMA)
-#define TRIZEPS_VCI2_2_SEMA (TRIZEPS_MEM_BASE + TRIZEPS_OFFSET_VCI2_2_SEMA)
-
-// VCI4 address
-#define TRIZEPS_VCI4_1_DPR (TRIZEPS_MEM_BASE + TRIZEPS_OFFSET_VCI4_1_DPR)
-#define TRIZEPS_VCI4_2_DPR (TRIZEPS_MEM_BASE + TRIZEPS_OFFSET_VCI4_2_DPR)
-#define TRIZEPS_VCI4_1_SEMA (TRIZEPS_IO_BASE + TRIZEPS_OFFSET_VCI4_1_SEMA)
-#define TRIZEPS_VCI4_2_SEMA (TRIZEPS_IO_BASE + TRIZEPS_OFFSET_VCI4_2_SEMA)
-#define TRIZEPS_VCI4_1_CNTR (TRIZEPS_IO_BASE + TRIZEPS_OFFSET_VCI4_1_CNTR)
-#define TRIZEPS_VCI4_2_CNTR (TRIZEPS_IO_BASE + TRIZEPS_OFFSET_VCI4_2_CNTR)
-
-#endif
+++ /dev/null
-/* -*- Mode: c++ -*-
- *
- * Copyright 2000 Massachusetts Institute of Technology
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of M.I.T. not be used in advertising or
- * publicity pertaining to distribution of the software without specific,
- * written prior permission. M.I.T. makes no representations about the
- * suitability of this software for any purpose. It is provided "as is"
- * without express or implied warranty.
- *
- */
-
-#ifndef OMNIMETER_H
-#define OMNIMETER_H
-// use the address of the second socket for both sockets
-// (divide address space in half and use offsets to wrap second card accesses back to start of address space)
-// Following values for programming Cirrus Logic chip
-#define Socket1Base 0x40
-
-#define SocketMemoryWindowLen (0x00400000)
-#define Socket0MemoryWindowStart (0x00800000)
-#define Socket1MemoryWindowStart (Socket0MemoryWindowStart + SocketMemoryWindowLen)
-
-#define SocketIOWindowLen (0x00008000)
-#define Socket1IOWindowStart (SocketIOWindowLen)
-#define Socket1IOWindowOffset (0x00010000 - Socket1IOWindowStart)
-
-// Following values for run-time access
-
-//#define PCCardBase (0xe4000000) //jca (0x30000000)
-//#define PCCardBase (0x30000000)
-#define PCCardBase (0xe0000000) //jag
-
-#define PCCard0IOBase (PCCardBase)
-//#define PCCard0AttrBase (0xec000000) //jca (PCCardBase + 0x08000000)
-#define PCCard0AttrBase (0xe8000000)
-//#define PCCard0AttrBase (PCCardBase + 0x08000000)
-//#define PCCard0MemBase (0xf4000000) //jca (PCCardBase + 0x0C000000)
-//#define PCCard0MemBase (PCCardBase + 0x0C000000)
-#define PCCard0MemBase (0xf0000000)
-
-//#define PCCard1IOBase (PCCardBase + SocketIOWindowLen) //jag
-#define PCCard1IOBase (0xe4000000)
-//#define PCCard1AttrBase (0xec000000 + SocketMemoryWindowLen) //jag
-#define PCCard1AttrBase (0xec000000)
-//#define PCCard1MemBase (0xf4000000 + SocketMemoryWindowLen) //jag
-#define PCCard1MemBase (0xf4000000)
-
-#define PCCardIndexRegister (PCCard0IOBase + 0x000003E0) //altered
-#define PCCardDataRegister (PCCardIndexRegister + 1)
-
-/* interrupts */
-#define PIN_cardInt2 13
-#define PIN_cardInt1 5
-
-void SMBOn(unsigned char SMBaddress);
-void SetSMB(unsigned char SMBaddress, unsigned int dacValue);
-
-#define GPIO_key6 0x00040000
-#define GPIO_scl 0x01000000 // output, SMB clock
-#define GPIO_sda 0x02000000 // bidirect, SMB data
-#define SMB_LCDVEE 0x2C
-#define DefaultLCDContrast 16
-
-#define LEDBacklightOn() ClearGPIOpin(GPIO_key6)
-#define LEDBacklightOff() SetGPIOpin(GPIO_key6)
-#define LCDPowerOn() SMBOn(SMB_LCDVEE)
-#define LCDPowerOff() SMBOff(SMB_LCDVEE)
-#define SetLCDContrast(d) SetSMB(SMB_LCDVEE, d)
-#define WritePort32(port,value) (port = (value))
-#define ReadPort32(port) (port)
-#define SetGPIOpin(pin) WritePort32(GPSR,pin)
-#define ClearGPIOpin(pin) WritePort32(GPCR,pin)
-
-void jcaoutb(long p, unsigned char data);
-unsigned char jcainb(long p);
-void jcaoutw(long p, unsigned short data);
-unsigned short jcainw_p(long p);
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-sa1100/pangolin.h
- *
- * Created 2000/08/25 by Murphy Chen <murphy@mail.dialogue.com.tw>
- *
- * This file contains the hardware specific definitions for Pangolin
- *
- */
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <asm/hardware.h> instead"
-#endif
-
-#include <linux/config.h>
-
-#ifndef CONFIG_SA1100_PANGOLIN_PCMCIA_IDE
-
-/* GPIOs for which the generic definition doesn't say much */
-#define GPIO_CF_BUS_ON GPIO_GPIO (3)
-#define GPIO_CF_RESET GPIO_GPIO (2)
-#define GPIO_CF_CD GPIO_GPIO (22)
-#define GPIO_CF_IRQ GPIO_GPIO (21)
-
-#define IRQ_GPIO_CF_IRQ IRQ_GPIO21
-#define IRQ_GPIO_CF_CD IRQ_GPIO22
-
-#else
-/*
- * These definitions are for PCMCIA/IDE card
- *
- * PSKTSEL = 0 ---> PCMCIA
- * PCMCIA_RESET = GPIO_7 ( output )( 0: normal 1: reset )
- * PCMCIA_IRQ = GPIO_24 ( input )
- * PCMCIA_CD = GPIO_25 ( input )
- *
- * PSKTSEL = 1 ---> IDE port
- * IDE_IRQ = GPIO_23 ( input )
- *
- * !!WARNING!!
- * When the PCMCIA/IDE card is inserted, the CF slot
- * should not have any card inserted!!
- *
- */
-
-#define GPIO_PCMCIA_RESET GPIO_GPIO (7)
-#define GPIO_PCMCIA_IRQ GPIO_GPIO (24)
-#define GPIO_PCMCIA_CD GPIO_GPIO (25)
-#define GPIO_IDE_IRQ GPIO_GPIO (8)
-
-#define IRQ_PCMCIA_IRQ IRQ_GPIO24
-#define IRQ_PCMCIA_CD IRQ_GPIO25
-#define IRQ_IDE_IRQ IRQ_GPIO8
-
-#endif
-
-/*
- * On board LAN chip
- */
-#define PANGOLIN_LAN_ADDR 0x32000000
-#define PANGOLIN_LAN_RESET GPIO_GPIO (8)
-#define PANGOLIN_LAN_IRQ GPIO_GPIO (26)
-#define PANGOLIN_IRQ_LAN_IRQ IRQ_GPIO26
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-sa1100/pfs168.h
- *
- * Created 2000/06/05 by Nicolas Pitre <nico@cam.org>
- *
- * This file contains the hardware specific definitions for PFS-168
- *
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <asm/hardware.h> instead"
-#endif
-
-
-/* GPIOs for which the generic definition doesn't say much */
-#define GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */
-#define GPIO_L3_I2C_SDA GPIO_GPIO (15) /* L3 and SMB control ports */
-#define GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */
-#define GPIO_L3_MODE GPIO_GPIO (17) /* L3 mode signal with LED */
-#define GPIO_L3_I2C_SCL GPIO_GPIO (18) /* L3 and I2C control ports */
-#define GPIO_STEREO_64FS_CLK GPIO_GPIO (19) /* SSP UDA1341 clock input */
-#define GPIO_CF_IRQ GPIO_GPIO (21) /* CF IRQ */
-#define GPIO_MBGNT GPIO_GPIO (21) /* 1111 MBGNT */
-#define GPIO_CF_CD GPIO_GPIO (22) /* CF CD */
-#define GPIO_MBREQ GPIO_GPIO (22) /* 1111 MBREQ */
-#define GPIO_UCB1300_IRQ GPIO_GPIO (23) /* UCB GPIO and touchscreen */
-#define GPIO_CF_BVD2 GPIO_GPIO (24) /* CF BVD */
-#define GPIO_GFX_IRQ GPIO_GPIO (24) /* Graphics IRQ */
-#define GPIO_CF_BVD1 GPIO_GPIO (25) /* CF BVD */
-#define GPIO_NEP_IRQ GPIO_GPIO (25) /* Neponset IRQ */
-#define GPIO_BATT_LOW GPIO_GPIO (26) /* Low battery */
-#define GPIO_RCLK GPIO_GPIO (26) /* CCLK/2 */
-
-#define IRQ_GPIO_CF_IRQ IRQ_GPIO21
-#define IRQ_GPIO_CF_CD IRQ_GPIO22
-#define IRQ_GPIO_MBREQ IRQ_GPIO22
-#define IRQ_GPIO_UCB1300_IRQ IRQ_GPIO23
-#define IRQ_GPIO_CF_BVD2 IRQ_GPIO24
-#define IRQ_GPIO_CF_BVD1 IRQ_GPIO25
-#define IRQ_GPIO_NEP_IRQ IRQ_GPIO25
-
-
-/*
- * PFS-168 definitions:
- */
-
-#define SA1111_BASE (0x40000000)
-
-#ifndef __ASSEMBLY__
-#define PFS168_COM5_VBASE (*((volatile unsigned char *)(0xf0000000UL)))
-#define PFS168_COM6_VBASE (*((volatile unsigned char *)(0xf0001000UL)))
-#define PFS168_SYSC1RTS (*((volatile unsigned char *)(0xf0002000UL)))
-#define PFS168_SYSLED (*((volatile unsigned char *)(0xf0003000UL)))
-#define PFS168_SYSDTMF (*((volatile unsigned char *)(0xf0004000UL)))
-#define PFS168_SYSLCDDE (*((volatile unsigned char *)(0xf0005000UL)))
-#define PFS168_SYSC1DSR (*((volatile unsigned char *)(0xf0006000UL)))
-#define PFS168_SYSC3TEN (*((volatile unsigned char *)(0xf0007000UL)))
-#define PFS168_SYSCTLA (*((volatile unsigned char *)(0xf0008000UL)))
-#define PFS168_SYSCTLB (*((volatile unsigned char *)(0xf0009000UL)))
-#define PFS168_ETH_VBASE (*((volatile unsigned char *)(0xf000a000UL)))
-#endif
-
-#define PFS168_SYSLCDDE_STNDE (1<<0) /* CSTN display enable/disable (1/0) */
-#define PFS168_SYSLCDDE_DESEL (1<<0) /* Active/Passive (1/0) display enable mode */
-
-#define PFS168_SYSCTLA_BKLT (1<<0) /* LCD backlight invert on/off (1/0) */
-#define PFS168_SYSCTLA_RLY (1<<1) /* Relay on/off (1/0) */
-#define PFS168_SYSCTLA_PXON (1<<2) /* Opto relay connect/disconnect 1/0) */
-#define PFS168_SYSCTLA_IRDA_FSEL (1<<3) /* IRDA Frequency select (0 = SIR, 1 = MIR/ FIR) */
-
-#define PFS168_SYSCTLB_MG1 (1<<0) /* Motion detector gain select */
-#define PFS168_SYSCTLB_MG0 (1<<1) /* Motion detector gain select */
-#define PFS168_SYSCTLB_IRDA_MD1 (1<<2) /* Range/Power select */
-#define PFS168_SYSCTLB_IRDA_MD0 (1<<3) /* Range/Power select */
-#define PFS168_SYSCTLB_IRDA_MD_MASK (PFS168_SYSCTLB_IRDA_MD1|PFS168_SYSCTLB_IRDA_MD0)
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-sa1100/pleb.h
- *
- * Created 2000/12/08 by Daniel Potts <danielp@cse.unsw.edu.au>
- *
- * This file contains the hardware specific definitions for the
- * PLEB board. http://www.cse.unsw.edu.au/~pleb
- */
-
-#ifndef _INCLUDE_PLEB_H_
-#define _INCLUDE_PLEB_H_
-
-#define PLEB_ETH0_P (0x20000300) /* Ethernet 0 in PCMCIA0 IO */
-#define PLEB_ETH0_V (0xf6000300)
-
-#define GPIO_ETH0_IRQ GPIO_GPIO (21)
-#define GPIO_ETH0_EN GPIO_GPIO (26)
-
-#define IRQ_GPIO_ETH0_IRQ IRQ_GPIO21
-
-#endif
+++ /dev/null
-/*
- * include/asm-arm/arch-sa1100/serial.h
- * (C) 1999 Nicolas Pitre <nico@cam.org>
- *
- * All this is intended to be used with a 16550-like UART on the SA1100's
- * PCMCIA bus. It has nothing to do with the SA1100's internal serial ports.
- * This is included by serial.c -- serial_sa1100.c makes no use of it.
- */
-
-#include <linux/config.h>
-
-/* Standard COM flags */
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-/*
- * Rather empty table...
- * Hardwired serial ports should be defined here.
- * PCMCIA will fill it dynamically.
- */
-#ifdef CONFIG_SA1100_TRIZEPS
-
-#define STD_SERIAL_PORT_DEFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, 1500000, TRIZEPS_UART5, IRQ_GPIO16, STD_COM_FLAGS }, \
- { 0, 1500000, TRIZEPS_UART6, IRQ_GPIO17, STD_COM_FLAGS }
-
-#else
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD ( 1843200 / 16 )
-
-#define STD_SERIAL_PORT_DEFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0, 0, STD_COM_FLAGS }, \
- { 0, BASE_BAUD, 0, 0, STD_COM_FLAGS }, \
- { 0, BASE_BAUD, 0, 0, STD_COM_FLAGS }, \
- { 0, BASE_BAUD, 0, 0, STD_COM_FLAGS }
-
-#endif
-
-#define EXTRA_SERIAL_PORT_DEFNS
+++ /dev/null
-/*
- stork.h
-
-*/
-
-#ifndef STORK_SA1100_H
-#define STORK_SA1100_H
-
-/* ugly - this will make sure we build sa1100fb for the Nec display not the Kyocera */
-#define STORK_TFT 1
-
-
-#define GPIO_STORK_SWITCH_1 (1 << 0) /* Switch 1 - input */
-#define GPIO_STORK_SWITCH_2 (1 << 1) /* Switch 2 - input */
-#define GPIO_STORK_TOUCH_SCREEN_BUSY (1 << 10) /* TOUCH_SCREEN_BUSY - input */
-#define GPIO_STORK_TOUCH_SCREEN_DATA (1 << 11) /* TOUCH_SCREEN_DATA - input */
-#define GPIO_STORK_CODEC_AGCSTAT (1 << 12) /* CODEC_AGCSTAT -input */
-#define GPIO_STORK_RS232_ON (1 << 13) /* enable RS232 (UART1) */
-#define GPIO_STORK_TEST_POINT (1 << 14) /* to test point */
-#define GPIO_STORK_L3_I2C_SDA (1 << 15) /* L3_I2C_SDA - bidirectional */
-#define GPIO_STORK_PSU_SYNC_MODE (1 << 16) /* PSU_SYNC_MODE - output */
-#define GPIO_STORK_L3_MODE (1 << 17) /* L3 mode - output (??) */
-#define GPIO_STORK_L3_I2C_SCL (1 << 18) /* L3_I2C_SCL - bidirectional */
-#define GPIO_STORK_AUDIO_CLK (1 << 19) /* SSP external clock (Audio clock) - input */
-#define GPIO_STORK_PCMCIA_A_CARD_DETECT (1 << 20) /* PCMCIA_A_CARD_DETECT - input */
-#define GPIO_STORK_PCMCIA_B_CARD_DETECT (1 << 21) /* PCMCIA_B_CARD_DETECT - input */
-#define GPIO_STORK_PCMCIA_A_RDY (1 << 22) /* PCMCIA_A_RDY - input */
-#define GPIO_STORK_PCMCIA_B_RDY (1 << 23) /* PCMCIA_B_RDY - input */
-#define GPIO_STORK_SWITCH_EXTRA_IRQ (1 << 24) /* Extra IRQ from switch detect logic - input */
-#define GPIO_STORK_SWITCH_IRQ (1 << 25) /* Sitch irq - input */
-#define GPIO_STORK_BATTERY_LOW_IRQ (1 << 26) /* BATTERY_LOW_IRQ - input */
-#define GPIO_STORK_TOUCH_SCREEN_PEN_IRQ (1 << 27) /* TOUCH_SCREEN_PEN_IRQ -input */
-
-#define IRQ_GPIO_STORK_PCMCIA_A_CARD_DETECT IRQ_GPIO20 /* PCMCIA_A_CARD_DETECT - input */
-#define IRQ_GPIO_STORK_PCMCIA_B_CARD_DETECT IRQ_GPIO21 /* PCMCIA_B_CARD_DETECT - input */
-
-#define IRQ_GPIO_STORK_SWITCH_1 IRQ_GPIO0 /* Switch 1 - input - active low */
-#define IRQ_GPIO_STORK_SWITCH_2 IRQ_GPIO1 /* Switch 2 - input - active low */
-#define IRQ_GPIO_STORK_SWITCH_EXTRA_IRQ IRQ_GPIO24 /* Extra IRQ from switch detect logic - input - active low */
-#define IRQ_GPIO_STORK_SWITCH_IRQ IRQ_GPIO25 /* Switch irq - input- active low */
-#define IRQ_GPIO_STORK_BATTERY_LOW_IRQ IRQ_GPIO26 /* BATTERY_LOW_IRQ - input - active low */
-#define IRQ_GPIO_STORK_TOUCH_SCREEN_PEN_IRQ IRQ_GPIO27 /* TOUCH_SCREEN_PEN_IRQ -input - goes low when it happens */
-
-/* this may be bogus - no it's not the RDY line becomes the IRQ line when we're up as an IO device */
-#define IRQ_GPIO_STORK_PCMCIA_A_RDY IRQ_GPIO22 /* PCMCIA_A_RDY - input */
-#define IRQ_GPIO_STORK_PCMCIA_B_RDY IRQ_GPIO23 /* PCMCIA_B_RDY - input */
-
-/* the default outputs, others are optional - I'll set these in the bootldr for now */
-#define GPIO_STORK_OUTPUT_BITS (GPIO_STORK_RS232_ON | GPIO_STORK_PSU_SYNC_MODE | GPIO_STORK_L3_MODE)
-
-#define STORK_LATCH_A_ADDR 0x08000000 /* cs1 A5 = 0 */
-#define STORK_LATCH_B_ADDR 0x08000020 /* cs1 A5 = 1 */
-
-#define STORK_LCDCPLD_BASE_ADDR 0x10000000 /* cs2 A5 = 0 */
-
-/* bit defs for latch A - these are write only and will need to be mirrored! */
-
-#define STORK_TEMP_IC_POWER_ON (1 << 0)
-#define STORK_SED1386_POWER_ON (1 << 1)
-#define STORK_LCD_3V3_POWER_ON (1 << 2)
-#define STORK_LCD_5V_POWER_ON (1 << 3)
-#define STORK_LCD_BACKLIGHT_INVERTER_ON (1 << 4)
-#define STORK_PCMCIA_PULL_UPS_POWER_ON (1 << 5)
-#define STORK_PCMCIA_A_POWER_ON (1 << 6)
-#define STORK_PCMCIA_B_POWER_ON (1 << 7)
-#define STORK_AUDIO_POWER_ON (1 << 8)
-#define STORK_AUDIO_AMP_ON (1 << 9)
-#define STORK_BAR_CODE_POWER_ON (1 << 10)
-#define STORK_BATTERY_CHARGER_ON (1 << 11)
-#define STORK_SED1386_RESET (1 << 12)
-#define STORK_IRDA_FREQUENCY_SELECT (1 << 13)
-#define STORK_IRDA_MODE_0 (1 << 14)
-#define STORK_IRDA_MODE_1 (1 << 15)
-
-/* and for B */
-
-#define STORK_AUX_AD_SEL_0 (1 << 0)
-#define STORK_AUX_AD_SEL_1 (1 << 1)
-#define STORK_TOUCH_SCREEN_DCLK (1 << 2)
-#define STORK_TOUCH_SCREEN_DIN (1 << 3)
-#define STORK_TOUCH_SCREEN_CS (1 << 4)
-#define STORK_DA_CS (1 << 5)
-#define STORK_DA_LD (1 << 6)
-#define STORK_RED_LED (1 << 7) /* active LOW */
-#define STORK_GREEN_LED (1 << 8) /* active LOW */
-#define STORK_YELLOW_LED (1 << 9) /* active LOW */
-#define STORK_PCMCIA_B_RESET (1 << 10)
-#define STORK_PCMCIA_A_RESET (1 << 11)
-#define STORK_AUDIO_CODEC_RESET (1 << 12)
-#define STORK_CODEC_QMUTE (1 << 13)
-#define STORK_AUDIO_CLOCK_SEL0 (1 << 14)
-#define STORK_AUDIO_CLOCK_SEL1 (1 << 15)
-
-
-/*
-
- There are 8 control bits in the touch screen controller (AD7873)
-
- S A2 A1 A0 MODE SER/DFR# PD1 PD0
-
- S Start bit, always one.
- A2 - A0 Channel select bits
- MODE 0 => 12 bit resolution, 1 => 8 bit
- SER/DFR# Single ender/Differential Reference Select bit
- PD1, PD0 Power management bits (usually 10)
-
-
-From Table 1.
-
- A2-A0
-
- 0 Temp0 (SER must be 1)
- 1 X+ (is this a typo? - is this X- really?)
- 2 VBAT,
- 3 read X+ (Z1),
- 4 read Y- (Z2), 5 => read Y+,
-
-*/
-
-#define AD7873_START 0x80 /* all commands need this to be set */
-#define AD7873_ADDR_BITS 4 /* ie shift by this */
-#define AD7873_8BITMODE 0x08 /* 0 => 12 bit convertions */
-#define AD7873_SER_DFR 0x04
-#define AD7873_PD1 0x02
-#define AD7873_PD0 0x01
-
-#define AD7873_TEMP0 AD7873_SER_DFR
-#define AD7873_X (1 << AD7873_ADDR_BITS)
-#define AD7873_VBAT ((2 << AD7873_ADDR_BITS) | AD7873_SER_DFR)
-#define AD7873_X_Z1 (3 << AD7873_ADDR_BITS)
-#define AD7873_Y_Z2 (4 << AD7873_ADDR_BITS)
-#define AD7873_Y (5 << AD7873_ADDR_BITS)
-#define AD7873_AUX ((6 << AD7873_ADDR_BITS) | AD7873_SER_DFR)
-#define AD7873_TEMP1 ((7 << AD7873_ADDR_BITS) | AD7873_SER_DFR)
-
-#ifndef __ASSEMBLY__
-
-extern int storkSetLatchA(int bits);
-extern int storkClearLatchA(int bits);
-
-extern int storkSetLatchB(int bits);
-extern int storkClearLatchB(int bits);
-
-extern int storkSetLCDCPLD(int which, int bits);
-extern int storkClearLCDCPLD(int which, int bits);
-
-extern void storkSetGPIO(int bits);
-extern void storkClearGPIO(int bits);
-
-extern int storkGetGPIO(void);
-
-extern void storkClockShortToDtoA(int word);
-extern int storkClockByteToTS(int byte);
-
-
-/* this will return the current state of the hardware ANDED with the given bits
- so NE => at least one bit was set, but maybe not all of them! */
-
-extern int storkTestGPIO(int bits);
-
-
-#endif
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-sa1100/system3.h
- *
- * Copyright (C) 2001 Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
- *
- * $Id: system3.h,v 1.2.4.2 2001/12/04 14:58:50 seletz Exp $
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * $Log: system3.h,v $
- * Revision 1.2.4.2 2001/12/04 14:58:50 seletz
- * - removed neponset hack
- * - removed irq definitions (now in irqs.h)
- *
- * Revision 1.2.4.1 2001/12/04 12:51:18 seletz
- * - re-added from linux_2_4_8_ac12_rmk1_np1_pt1
- *
- * Revision 1.2.2.2 2001/11/16 13:58:43 seletz
- * - simplified cpld register access
- *
- * Revision 1.2.2.1 2001/10/15 16:17:20 seletz
- * - first revision
- *
- *
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#error "include <asm/hardware.h> instead"
-#endif
-
-/* System 3 LCD */
-#define SYS3LCD SKPEN0
-#define SYS3LCDBACKL SKPEN1
-#define SYS3LCDBRIGHT SKPWM0
-#define SYS3LCDCONTR SKPWM1
-
-#define PT_CPLD_BASE (0x10000000)
-#define PT_SMC_BASE (0x18000000)
-#define PT_SA1111_BASE (0x40000000)
-
-#define SA1111_BASE PT_SA1111_BASE
-
-#define Ptcpld_p2v( x ) ((x) - PT_CPLD_BASE + 0xf3000000)
-#define Ptcpld_v2p( x ) ((x) - 0xf3000000 + PT_CPLD_BASE)
-
-#define _PT_SYSID ( PT_CPLD_BASE + 0x00 )
-#define _PT_IRQSR ( PT_CPLD_BASE + 0x24 )
-#define _PT_CTRL0 ( PT_CPLD_BASE + 0x90 )
-#define _PT_CTRL1 ( PT_CPLD_BASE + 0xA0 )
-#define _PT_CTRL2 ( PT_CPLD_BASE + 0xB0 )
-
-#define PT_SYSID (*((volatile u_char *)Ptcpld_p2v( _PT_SYSID )))
-#define PT_IRQSR (*((volatile u_char *)Ptcpld_p2v( _PT_IRQSR )))
-#define PT_CTRL0 (*((volatile u_char *)Ptcpld_p2v( _PT_CTRL0 )))
-#define PT_CTRL1 (*((volatile u_char *)Ptcpld_p2v( _PT_CTRL1 )))
-#define PT_CTRL2 (*((volatile u_char *)Ptcpld_p2v( _PT_CTRL2 )))
-
-#define PTCTRL0_set( x ) PT_CTRL0 |= (x)
-#define PTCTRL1_set( x ) PT_CTRL1 |= (x)
-#define PTCTRL2_set( x ) PT_CTRL2 |= (x)
-#define PTCTRL0_clear( x ) PT_CTRL0 &= ~(x)
-#define PTCTRL1_clear( x ) PT_CTRL1 &= ~(x)
-#define PTCTRL2_clear( x ) PT_CTRL2 &= ~(x)
-
-/* System ID register */
-
-/* IRQ Source Register */
-#define PT_IRR_LAN ( 1<<0 )
-#define PT_IRR_X ( 1<<1 )
-#define PT_IRR_SA1111 ( 1<<2 )
-#define PT_IRR_RS1 ( 1<<3 )
-#define PT_IRR_RS1_RING ( 1<<4 )
-#define PT_IRR_RS1_DCD ( 1<<5 )
-#define PT_IRR_RS1_DSR ( 1<<6 )
-#define PT_IRR_RS2 ( 1<<7 )
-
-/* FIXME */
-#define PT_IRR_USAR ( 1<<1 )
-
-/* CTRL 0 */
-#define PT_CTRL0_USBSLAVE ( 1<<0 )
-#define PT_CTRL0_USBHOST ( 1<<1 )
-#define PT_CTRL0_LCD_BL ( 1<<2 )
-#define PT_CTRL0_LAN_EN ( 1<<3 ) /* active low */
-#define PT_CTRL0_IRDA_M(x) ( (((u_char)x)&0x03)<<4 )
-#define PT_CTRL0_IRDA_M0 ( 1<<4 )
-#define PT_CTRL0_IRDA_M1 ( 1<<5 )
-#define PT_CTRL0_IRDA_FSEL ( 1<<6 )
-#define PT_CTRL0_LCD_EN ( 1<<7 )
-
-#define PT_CTRL0_INIT ( PT_CTRL0_USBSLAVE | PT_CTRL0_USBHOST | \
- PT_CTRL0_LCD_BL | PT_CTRL0_LAN_EN | PT_CTRL0_LCD_EN )
-
-/* CTRL 1 */
-#define PT_CTRL1_RS3_MUX(x) ( (((u_char)x)&0x03)<<0 )
-#define PT_CTRL1_RS3_MUX0 ( 1<<0 )
-#define PT_CTRL1_RS3_MUX1 ( 1<<1 )
-#define PT_CTRL1_RS3_RST ( 1<<2 )
-#define PT_CTRL1_RS3_RS485_TERM ( 1<<4 )
-#define PT_CTRL1_X ( 1<<4 )
-#define PT_CTRL1_PCMCIA_A0VPP ( 1<<6 )
-#define PT_CTRL1_PCMCIA_A1VPP ( 1<<7 )
-
-#define PT_RS3_MUX_ALIRS ( 0 )
-#define PT_RS3_MUX_IDATA ( 1 )
-#define PT_RS3_MUX_RADIO ( 2 )
-#define PT_RS3_MUX_RS485 ( 3 )
-
-/* CTRL 2 */
-#define PT_CTRL2_RS1_RTS ( 1<<0 )
-#define PT_CTRL2_RS1_DTR ( 1<<1 )
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-sa1100/time.h
- *
- * Copyright (C) 1998 Deborah Wallach.
- * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com>
- *
- * 2000/03/29 (C) Nicolas Pitre <nico@cam.org>
- * Rewritten: big cleanup, much simpler, better HZ accuracy.
- *
- */
-
-
-#define RTC_DEF_DIVIDER (32768 - 1)
-#define RTC_DEF_TRIM 0
-
-static unsigned long __init sa1100_get_rtc_time(void)
-{
- /*
- * According to the manual we should be able to let RTTR be zero
- * and then a default diviser for a 32.768KHz clock is used.
- * Apparently this doesn't work, at least for my SA1110 rev 5.
- * If the clock divider is uninitialized then reset it to the
- * default value to get the 1Hz clock.
- */
- if (RTTR == 0) {
- RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
- printk(KERN_WARNING "Warning: uninitialized Real Time Clock\n");
- /* The current RTC value probably doesn't make sense either */
- RCNR = 0;
- return 0;
- }
- return RCNR;
-}
-
-static int sa1100_set_rtc(void)
-{
- unsigned long current_time = xtime.tv_sec;
-
- if (RTSR & RTSR_ALE) {
- /* make sure not to forward the clock over an alarm */
- unsigned long alarm = RTAR;
- if (current_time >= alarm && alarm >= RCNR)
- return -ERESTARTSYS;
- }
- RCNR = current_time;
- return 0;
-}
-
-/* IRQs are disabled before entering here from do_gettimeofday() */
-static unsigned long sa1100_gettimeoffset (void)
-{
- unsigned long ticks_to_match, elapsed, usec;
-
- /* Get ticks before next timer match */
- ticks_to_match = OSMR0 - OSCR;
-
- /* We need elapsed ticks since last match */
- elapsed = LATCH - ticks_to_match;
-
- /* Now convert them to usec */
- usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
-
- return usec;
-}
-
-/*
- * We will be entered with IRQs enabled.
- *
- * Loop until we get ahead of the free running timer.
- * This ensures an exact clock tick count and time accuracy.
- * IRQs are disabled inside the loop to ensure coherence between
- * lost_ticks (updated in do_timer()) and the match reg value, so we
- * can use do_gettimeofday() from interrupt handlers.
- */
-static irqreturn_t
-sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- unsigned int next_match;
-
- do {
- do_leds();
- do_timer(regs);
- OSSR = OSSR_M0; /* Clear match on timer 0 */
- next_match = (OSMR0 += LATCH);
- do_set_rtc();
- } while ((signed long)(next_match - OSCR) <= 0);
-
- do_profile(regs);
-
- return IRQ_HANDLED;
-}
-
-void __init time_init(void)
-{
- struct timespec tv;
-
- gettimeoffset = sa1100_gettimeoffset;
- set_rtc = sa1100_set_rtc;
-
- tv.tv_nsec = 0;
- tv.tv_sec = sa1100_get_rtc_time();
- do_settimeofday(&tv);
-
- timer_irq.handler = sa1100_timer_interrupt;
- OSMR0 = 0; /* set initial match at 0 */
- OSSR = 0xf; /* clear status on all timers */
- setup_irq(IRQ_OST0, &timer_irq);
- OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */
- OSCR = 0; /* initialize free-running timer, force first match */
-}
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-sa1100/trizeps.h
- *
- * This file contains the hardware specific definitions for Trizeps
- *
- * Authors:
- * Andreas Hofer <ho@dsa-ac.de>,
- * Peter Lueg <pl@dsa-ac.de>,
- * Guennadi Liakhovetski <gl@dsa-ac.de>
- *
- */
-
-#ifndef _ASM_ARCH_TRIZEPS_H_
-#define _ASM_ARCH_TRIZEPS_H_
-
-#include <linux/config.h>
-
-#ifdef CONFIG_TRIZEPS_MFTB2
-#include "mftb2.h"
-#endif
-
-#endif // _INCLUDE_TRIZEPS_
+++ /dev/null
-#ifndef __ASM_ARCH_YOPY_H__
-#define __ASM_ARCH_YOPY_H__
-
-/******************************************************************************
- * Memory mappings
- ******************************************************************************/
-
-/* Flash memories */
-#define YOPY_FLASH0_BASE_P (0x00000000) /* CS0 */
-#define YOPY_FLASH0_BASE_V (0xe8000000)
-#define YOPY_FLASH0_BASE YOPY_FLASH0_BASE_V
-#define YOPY_FLASH0_SIZE (0x04000000) /* map 64MB */
-
-#define YOPY_FLASH1_BASE_P (0x08000000) /* CS1 */
-#define YOPY_FLASH1_BASE_V (YOPY_FLASH0_BASE_V + YOPY_FLASH0_SIZE)
-#define YOPY_FLASH1_BASE YOPY_FLASH1_BASE_V
-#define YOPY_FLASH1_SIZE (0x04000000) /* map 64MB */
-
-/* LCD Controller */
-#define YOPY_LCD_IO_BASE_P (0x48000000) /* CS5 */
-#define YOPY_LCD_IO_BASE_V (0xf0000000)
-
-#define YOPY_LCD_IO_BASE YOPY_LCD_IO_BASE_V
-#define YOPY_LCD_IO_RANGE (0x00208000)
-
-/* Extended GPIO */
-#define YOPY_EGPIO_BASE_P (0x10000000) /* CS2 */
-#define YOPY_EGPIO_BASE_V (0xf1000000)
-
-#define YOPY_EGPIO_BASE YOPY_EGPIO_BASE_V
-#define YOPY_EGPIO_RANGE 4
-
-#define YOPY_EGPIO (*((volatile Word *)YOPY_EGPIO_BASE))
-
-
-/******************************************************************************
- * GPIO assignements
- ******************************************************************************/
-
-#define GPIO_UCB1200_IRQ GPIO_GPIO0
-#define GPIO_UCB1200_RESET GPIO_GPIO22
-
-#define GPIO_CF_IREQ GPIO_GPIO2
-#define GPIO_CF_CD GPIO_GPIO3
-#define GPIO_CF_BVD1 GPIO_GPIO4
-#define GPIO_CF_BVD2 GPIO_GPIO5
-#define GPIO_CF_CSEL GPIO_GPIO6
-#define GPIO_CF_READY GPIO_CF_IREQ
-#define GPIO_CF_STSCHG GPIO_CF_BVD1
-#define GPIO_CF_SPKR GPIO_CF_BVD2
-
-#define GPIO_MASK(io) (1 << (io))
-
-#define GPIO_YOPY_PLL_ML PPC_LDD7
-#define GPIO_YOPY_PLL_MC PPC_L_LCLK
-#define GPIO_YOPY_PLL_MD PPC_L_FCLK
-
-#define GPIO_YOPY_L3_MODE PPC_LDD4
-#define GPIO_YOPY_L3_CLOCK PPC_LDD5
-#define GPIO_YOPY_L3_DATA PPC_LDD6
-
-#define GPIO_CF_RESET 0
-#define GPIO_CLKDIV_CLR1 1
-#define GPIO_CLKDIV_CLR2 2
-#define GPIO_SPEAKER_MUTE 5
-#define GPIO_CF_POWER 8
-#define GPIO_AUDIO_OPAMP_POWER 11
-#define GPIO_AUDIO_CODEC_POWER 12
-#define GPIO_AUDIO_POWER 13
-
-#define GPIO_IRDA_POWER PPC_L_PCLK
-#define GPIO_IRDA_FIR PPC_LDD0
-
-#ifndef __ASSEMBLY__
-extern int yopy_gpio_test(unsigned int gpio);
-extern void yopy_gpio_set(unsigned int gpio, int level);
-#endif
-
-
-/******************************************************************************
- * IRQ assignements
- ******************************************************************************/
-
-/* for our old drivers */
-#define IRQ_SP0_UDC 13
-#define IRQ_SP1_SDLC 14
-#define IRQ_SP1_UART 15
-#define IRQ_SP2_ICP 16
-#define IRQ_SP2_UART 16
-#define IRQ_SP3_UART 17
-#define IRQ_SP4_MCP 18
-#define IRQ_SP4_SSP 19
-#define IRQ_RTC_HZ 30
-#define IRQ_RTC_ALARM 31
-
-/* GPIO interrupts */
-#define IRQ_GPIO_UCB1200_IRQ IRQ_GPIO0
-
-#define IRQ_CF_IREQ IRQ_GPIO2
-#define IRQ_CF_CD IRQ_GPIO3
-#define IRQ_CF_BVD1 IRQ_GPIO4
-#define IRQ_CF_BVD2 IRQ_GPIO5
-
-#define IRQ_UART_CTS IRQ_GPIO7
-#define IRQ_UART_DCD IRQ_GPIO8
-#define IRQ_UART_DSR IRQ_GPIO9
-
-#define IRQ_FLASH_STATUS IRQ_GPIO23
-
-#define IRQ_BUTTON_POWER IRQ_GPIO1
-#define IRQ_BUTTON_UP IRQ_GPIO14
-#define IRQ_BUTTON_DOWN IRQ_GPIO15
-#define IRQ_BUTTON_LEFT IRQ_GPIO16
-#define IRQ_BUTTON_RIGHT IRQ_GPIO17
-#define IRQ_BUTTON_SHOT0 IRQ_GPIO18
-#define IRQ_BUTTON_SHOT1 IRQ_GPIO20
-#define IRQ_BUTTON_PIMS IRQ_UCB1200_IO1
-#define IRQ_BUTTON_MP3 IRQ_UCB1200_IO2
-#define IRQ_BUTTON_RECORD IRQ_UCB1200_IO3
-#define IRQ_BUTTON_PREV IRQ_UCB1200_IO4
-#define IRQ_BUTTON_SELECT IRQ_UCB1200_IO5
-#define IRQ_BUTTON_NEXT IRQ_UCB1200_IO6
-#define IRQ_BUTTON_CANCEL IRQ_UCB1200_IO7
-#define IRQ_BUTTON_REMOTE IRQ_UCB1200_IO8
-
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-shark/ide.h
- *
- * by Alexander Schulz
- *
- * derived from:
- * linux/include/asm-arm/arch-ebsa285/ide.h
- * Copyright (c) 1998 Russell King
- */
-
-#include <asm/irq.h>
-
-/*
- * Set up a hw structure for a specified data port, control port and IRQ.
- * This should follow whatever the default interface uses.
- */
-static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
- unsigned long ctrl_port, int *irq)
-{
- unsigned long reg = data_port;
- int i;
-
- memset(hw, 0, sizeof(*hw));
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- if (irq)
- *irq = 0;
-}
-
-/*
- * This registers the standard ports for this architecture with the IDE
- * driver.
- */
-static __inline__ void
-ide_init_default_hwifs(void)
-{
- hw_regs_t hw;
-
- ide_init_hwif_ports(&hw, 0x1f0, 0x3f6, NULL);
- hw.irq = 14;
- ide_register_hw(&hw,NULL);
-}
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-shark/keyboard.h
- * by Alexander Schulz
- *
- * Derived from linux/include/asm-arm/arch-ebsa285/keyboard.h
- * (C) 1998 Russell King
- * (C) 1998 Phil Blundell
- */
-#include <linux/config.h>
-#include <linux/ioport.h>
-#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/system.h>
-
-#define KEYBOARD_IRQ IRQ_ISA_KEYBOARD
-#define NR_SCANCODES 128
-
-#define kbd_disable_irq() do { } while (0)
-#define kbd_enable_irq() do { } while (0)
-
-extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
-extern int pckbd_getkeycode(unsigned int scancode);
-extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
- char raw_mode);
-extern char pckbd_unexpected_up(unsigned char keycode);
-extern void pckbd_leds(unsigned char leds);
-extern void pckbd_init_hw(void);
-extern unsigned char pckbd_sysrq_xlate[128];
-
-static inline void kbd_init_hw(void)
-{
- k_setkeycode = pckbd_setkeycode;
- k_getkeycode = pckbd_getkeycode;
- k_translate = pckbd_translate;
- k_unexpected_up = pckbd_unexpected_up;
- k_leds = pckbd_leds;
-#ifdef CONFIG_MAGIC_SYSRQ
- k_sysrq_key = 0x54;
- k_sysrq_xlate = pckbd_sysrq_xlate;
-#endif
- pckbd_init_hw();
-}
-
-/*
- * PC Keyboard specifics
- */
-
-/* resource allocation */
-#define kbd_request_region() request_region(0x60, 16, "keyboard")
-#define kbd_request_irq(handler) request_irq(KEYBOARD_IRQ, handler, 0, \
- "keyboard", NULL)
-
-/* How to access the keyboard macros on this platform. */
-#define kbd_read_input() inb(KBD_DATA_REG)
-#define kbd_read_status() inb(KBD_STATUS_REG)
-#define kbd_write_output(val) outb(val, KBD_DATA_REG)
-#define kbd_write_command(val) outb(val, KBD_CNTL_REG)
-
-/* Some stoneage hardware needs delays after some operations. */
-#define kbd_pause() do { } while(0)
-
-/*
- * Machine specific bits for the PS/2 driver
- */
-#define aux_request_irq(hand, dev_id) \
- request_irq(AUX_IRQ, hand, SA_SHIRQ, "PS/2 Mouse", dev_id)
-
-#define aux_free_irq(dev_id) free_irq(AUX_IRQ, dev_id)
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-ebsa110/serial.h
- *
- * Copyright (c) 1996,1997,1998 Russell King.
- *
- * Changelog:
- * 15-10-1996 RMK Created
- */
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD (1843200 / 16)
-
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
- /* UART CLK PORT IRQ FLAGS */
-#define STD_SERIAL_PORT_DEFNS \
- { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-shark/time.h
- *
- * by Alexander Schulz
- *
- * derived from include/asm-arm/arch-ebsa110/time.h
- * Copyright (c) 1996,1997,1998 Russell King.
- */
-
-#include <asm/leds.h>
-#include <asm/param.h>
-
-#define IRQ_TIMER 0
-#define HZ_TIME ((1193180 + HZ/2) / HZ)
-
-static irqreturn_t
-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- do_leds();
- do_timer(regs);
- do_profile(regs);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-void __init time_init(void)
-{
- unsigned long flags;
-
- outb(0x34, 0x43); /* binary, mode 0, LSB/MSB, Ch 0 */
- outb(HZ_TIME & 0xff, 0x40); /* LSB of count */
- outb(HZ_TIME >> 8, 0x40);
-
- timer_irq.handler = timer_interrupt;
- setup_irq(IRQ_TIMER, &timer_irq);
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/dma.h
- *
- * Architecture DMA routines. We have to contend with the bizarre DMA
- * machine built into the Tbox hardware.
- *
- * Copyright (C) 1998 Philip Blundell
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-/*
- * DMA channel definitions. Some of these are physically strange but
- * we sort it out inside dma.c so the user never has to care. The
- * exception is the double-buffering which we can't really abstract
- * away sensibly.
- */
-#define DMA_VIDEO 0
-#define DMA_MPEG_B 1
-#define DMA_AUDIO_B 2
-#define DMA_ASHRX_B 3
-#define DMA_ASHTX 4
-#define DMA_MPEG 5
-#define DMA_AUDIO 6
-#define DMA_ASHRX 7
-
-#define MAX_DMA_CHANNELS 0 /* XXX */
-
-/*
- * This is the maximum DMA address that can be DMAd to.
- */
-#define MAX_DMA_ADDRESS 0xffffffff
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/hardware.h
- *
- * Copyright (C) 1998, 1999, 2000 Philip Blundell
- * Copyright (C) 2000 FutureTV Labs Ltd
- *
- * This file contains the hardware definitions of the Tbox
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-/* Logical Physical
- * 0xfff00000 0x00100000 I/O
- * 0xfff00000 0x00100000 Expansion CS0
- * 0xfff10000 0x00110000 DMA
- * 0xfff20000 0x00120000 C-Cube
- * 0xfff30000 0x00130000 FPGA 1
- * 0xfff40000 0x00140000 UART 2
- * 0xfff50000 0x00150000 UART 1
- * 0xfff60000 0x00160000 CS8900
- * 0xfff70000 0x00170000 INTCONT
- * 0xfff80000 0x00180000 RAMDAC
- * 0xfff90000 0x00190000 Control 0
- * 0xfffa0000 0x001a0000 Control 1
- * 0xfffb0000 0x001b0000 Control 2
- * 0xfffc0000 0x001c0000 FPGA 2
- * 0xfffd0000 0x001d0000 INTRESET
- * 0xfffe0000 0x001e0000 C-Cube DMA throttle
- * 0xffff0000 0x001f0000 Expansion CS1
- * 0xffe00000 0x82000000 cache flush
- */
-
-/*
- * Mapping areas
- */
-#define IO_BASE 0xfff00000
-#define IO_START 0x00100000
-#define FLUSH_BASE 0xffe00000
-
-#define INTCONT 0xfff70000
-
-#define FPGA1CONT 0xffff3000
-
-/*
- * RAM definitions
- */
-#define RAM_BASE 0x80000000
-#define FLUSH_BASE_PHYS 0x82000000
-
-#define UNCACHEABLE_ADDR INTCONT
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/ide.h
- */
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/io.h
- *
- * Copyright (C) 1996-1999 Russell King
- * Copyright (C) 1998, 1999 Philip Blundell
- *
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(_x) ((_x) << 2)
-
-/*
- * Generic virtual read/write
- */
-static inline unsigned int __arch_getw(unsigned long a)
-{
- unsigned int value;
- __asm__ __volatile__("ldr%?h %0, [%1, #0] @ getw"
- : "=&r" (value)
- : "r" (a));
- return value;
-}
-
-static inline void __arch_putw(unsigned int value, unsigned long a)
-{
- __asm__ __volatile__("str%?h %0, [%1, #0] @ putw"
- : : "r" (value), "r" (a));
-}
-
-/* Idem, for devices on the upper byte lanes */
-#define inb_u(p) __arch_getb(__io_pc(p) + 2)
-#define inw_u(p) __arch_getw(__io_pc(p) + 2)
-
-#define outb_u(v,p) __arch_putb(v,__io_pc(p) + 2)
-#define outw_u(v,p) __arch_putw(v,__io_pc(p) + 2)
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/irqs.h
- *
- * Copyright (C) 1998, 2000 Philip Blundell
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#define IRQ_MPEGDMA 0
-#define IRQ_ASHTX 1
-#define IRQ_ASHRX 2
-#define IRQ_VSYNC 3
-#define IRQ_HSYNC 4
-#define IRQ_MPEG 5
-#define IRQ_UART2 6
-#define IRQ_UART1 7
-#define IRQ_ETHERNET 8
-#define IRQ_TIMER 9
-#define IRQ_AUDIODMA 10
-/* bit 11 used for video field ident */
-#define IRQ_EXPMODCS0 12
-#define IRQ_EXPMODCS1 13
-
-#define irq_canonicalize(i) (i)
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/memory.h
- *
- * Copyright (c) 1996-1999 Russell King.
- * Copyright (c) 1998-1999 Phil Blundell
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-
-/*
- * Physical DRAM offset.
- */
-#define PHYS_OFFSET (0x80000000UL)
-
-/*
- * Bus view is the same as physical view
- */
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/param.h
- */
-#define __KERNEL_HZ 1000
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/serial.h
- *
- * Copyright (c) 1996 Russell King.
- * Copyright (c) 1998 Phil Blundell
- *
- * Changelog:
- * 15-10-1996 RMK Created
- * 09-06-1998 PJB tbox version
- */
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD (1843200 / 16)
-
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
- /* UART CLK PORT IRQ FLAGS */
-#define STD_SERIAL_PORT_DEFNS \
- { 0, BASE_BAUD, 0xffff4000 >> 2, 6, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0xffff5000 >> 2, 7, STD_COM_FLAGS }, /* ttyS1 */
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/system.h
- *
- * Copyright (c) 1996-1999 Russell King.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
- cpu_do_idle();
-}
-
-#define arch_reset(mode) do { } while (0)
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/time.h
- *
- * Copyright (c) 1997, 1999 Phil Blundell.
- * Copyright (c) 2000 FutureTV Labs Ltd
- *
- * Tbox has no real-time clock -- we get millisecond ticks to update
- * our soft copy.
- */
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <asm/io.h>
-#include <asm/hardware.h>
-
-#define update_rtc()
-
-static irqreturn_t
-timer_interrupt (int irq, void *dev_id, struct pt_regs *regs)
-{
- /* Clear irq */
- __raw_writel(1, FPGA1CONT + 0xc);
- __raw_writel(0, FPGA1CONT + 0xc);
-
- do_timer(regs);
-
- return IRQ_HANDLED;
-}
-
-void __init time_init(void)
-{
- timer_irq.handler = timer_interrupt;
- setup_irq(IRQ_TIMER, &timer_irq);
-}
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/timex.h
- *
- * Tbox timex specifications
- *
- * Copyright (C) 1999 Philip Blundell
- */
-
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-nexuspci/uncompress.h
- * from linux/include/asm-arm/arch-ebsa110/uncompress.h
- *
- * Copyright (C) 1996,1997,1998 Russell King
- * Copyright (C) 1998, 1999 Phil Blundell
- */
-
-#include <asm/io.h>
-
-#define UARTBASE 0x00400000
-
-/*
- * This does not append a newline
- */
-static void puts(const char *s)
-{
- while (*s)
- {
- char c = *(s++);
- while (!(__raw_readb(UARTBASE + 0x14) & 0x20));
- __raw_writeb(c, UARTBASE);
- if (c == 10) {
- while (!(__raw_readb(UARTBASE + 0x14) & 0x20));
- __raw_writeb(13, UARTBASE);
- }
- }
-}
-
-/*
- * nothing to do
- */
-#define arch_decomp_setup()
-
-/*
- * Stroke the watchdog so we don't get reset during decompression.
- */
-#define arch_decomp_wdog() \
- do { \
- __raw_writel(1, 0xa00000); \
- __raw_writel(0, 0xa00000); \
- } while (0)
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-tbox/vmalloc.h
- */
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-versatile/serial.h
- *
- * Copyright (C) 2003 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-/*
- * This assumes you have a 14.7456 MHz clock UART.
- */
-#define BASE_BAUD 115200
-
- /* UART CLK PORT IRQ FLAGS */
-#define STD_SERIAL_PORT_DEFNS \
- { 0, BASE_BAUD, 0, 0, ASYNC_SKIP_TEST }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0, 0, ASYNC_SKIP_TEST }, /* ttyS1 */ \
- { 0, BASE_BAUD, 0, 0, ASYNC_SKIP_TEST }, /* ttyS2 */ \
- { 0, BASE_BAUD, 0, 0, ASYNC_SKIP_TEST }, /* ttyS3 */
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/arch-versatile/time.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <asm/system.h>
-#include <asm/leds.h>
-
-/*
- * Where is the timer (VA)?
- */
-#define TIMER0_VA_BASE IO_ADDRESS(VERSATILE_TIMER0_1_BASE)
-#define TIMER1_VA_BASE (IO_ADDRESS(VERSATILE_TIMER0_1_BASE) + 0x20)
-#define TIMER2_VA_BASE IO_ADDRESS(VERSATILE_TIMER2_3_BASE)
-#define TIMER3_VA_BASE (IO_ADDRESS(VERSATILE_TIMER2_3_BASE) + 0x20)
-#define VA_IC_BASE IO_ADDRESS(VERSATILE_VIC_BASE)
-
-/*
- * How long is the timer interval?
- */
-#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
-#if TIMER_INTERVAL >= 0x100000
-#define TIMER_RELOAD (TIMER_INTERVAL >> 8) /* Divide by 256 */
-#define TIMER_CTRL 0x88 /* Enable, Clock / 256 */
-#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
-#elif TIMER_INTERVAL >= 0x10000
-#define TIMER_RELOAD (TIMER_INTERVAL >> 4) /* Divide by 16 */
-#define TIMER_CTRL 0x84 /* Enable, Clock / 16 */
-#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
-#else
-#define TIMER_RELOAD (TIMER_INTERVAL)
-#define TIMER_CTRL 0x80 /* Enable */
-#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
-#endif
-
-#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable */
-
-/*
- * What does it look like?
- */
-typedef struct TimerStruct {
- unsigned long TimerLoad;
- unsigned long TimerValue;
- unsigned long TimerControl;
- unsigned long TimerClear;
-} TimerStruct_t;
-
-extern unsigned long (*gettimeoffset)(void);
-
-/*
- * Returns number of ms since last clock interrupt. Note that interrupts
- * will have been disabled by do_gettimeoffset()
- */
-static unsigned long versatile_gettimeoffset(void)
-{
- volatile TimerStruct_t *timer0 = (TimerStruct_t *)TIMER0_VA_BASE;
- unsigned long ticks1, ticks2, status;
-
- /*
- * Get the current number of ticks. Note that there is a race
- * condition between us reading the timer and checking for
- * an interrupt. We get around this by ensuring that the
- * counter has not reloaded between our two reads.
- */
- ticks2 = timer0->TimerValue & 0xffff;
- do {
- ticks1 = ticks2;
- status = __raw_readl(VA_IC_BASE + VIC_IRQ_RAW_STATUS);
- ticks2 = timer0->TimerValue & 0xffff;
- } while (ticks2 > ticks1);
-
- /*
- * Number of ticks since last interrupt.
- */
- ticks1 = TIMER_RELOAD - ticks2;
-
- /*
- * Interrupt pending? If so, we've reloaded once already.
- *
- * FIXME: Need to check this is effectively timer 0 that expires
- */
- if (status & IRQMASK_TIMERINT0_1)
- ticks1 += TIMER_RELOAD;
-
- /*
- * Convert the ticks to usecs
- */
- return TICKS2USECS(ticks1);
-}
-
-/*
- * IRQ handler for the timer
- */
-static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE;
-
- // ...clear the interrupt
- timer0->TimerClear = 1;
-
- do_leds();
- do_timer(regs);
- do_profile(regs);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-void __init time_init(void)
-{
- volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE;
- volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE;
- volatile TimerStruct_t *timer2 = (volatile TimerStruct_t *)TIMER2_VA_BASE;
- volatile TimerStruct_t *timer3 = (volatile TimerStruct_t *)TIMER3_VA_BASE;
-
- /*
- * set clock frequency:
- * VERSATILE_REFCLK is 32KHz
- * VERSATILE_TIMCLK is 1MHz
- */
- *(volatile unsigned int *)IO_ADDRESS(VERSATILE_SCTL_BASE) |=
- ((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) |
- (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel));
-
- timer_irq.handler = versatile_timer_interrupt;
-
- /*
- * Initialise to a known state (all timers off)
- */
- timer0->TimerControl = 0;
- timer1->TimerControl = 0;
- timer2->TimerControl = 0;
- timer3->TimerControl = 0;
-
- timer0->TimerLoad = TIMER_RELOAD;
- timer0->TimerValue = TIMER_RELOAD;
- timer0->TimerControl = TIMER_CTRL | 0x40 | TIMER_CTRL_IE; /* periodic + IE */
-
- /*
- * Make irqs happen for the system timer
- */
- setup_irq(IRQ_TIMERINT0_1, &timer_irq);
- gettimeoffset = versatile_gettimeoffset;
-}
+++ /dev/null
-#ifndef _ASM_ARM_CPUMASK_H
-#define _ASM_ARM_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_ARM_CPUMASK_H */
+++ /dev/null
-#ifndef _ARM_RMAP_H
-#define _ARM_RMAP_H
-
-#include <asm-generic/rmap.h>
-
-#endif /* _ARM_RMAP_H */
+++ /dev/null
-/*
- * linux/arch/arm26/lib/calls.h
- *
- * Copyright (C) 2003 Ian Molton
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * FIXME
- * This file is included twice in entry-common.S which may not be necessary
- */
-#ifndef NR_syscalls
-#define NR_syscalls 256
-#else
-
-__syscall_start:
-/* 0 */ .long sys_ni_syscall
- .long sys_exit
- .long sys_fork_wrapper
- .long sys_read
- .long sys_write
-/* 5 */ .long sys_open
- .long sys_close
- .long sys_ni_syscall /* was sys_waitpid */
- .long sys_creat
- .long sys_link
-/* 10 */ .long sys_unlink
- .long sys_execve_wrapper
- .long sys_chdir
- .long sys_time /* used by libc4 */
- .long sys_mknod
-/* 15 */ .long sys_chmod
- .long sys_lchown16
- .long sys_ni_syscall /* was sys_break */
- .long sys_ni_syscall /* was sys_stat */
- .long sys_lseek
-/* 20 */ .long sys_getpid
- .long sys_mount
- .long sys_oldumount /* used by libc4 */
- .long sys_setuid16
- .long sys_getuid16
-/* 25 */ .long sys_stime
- .long sys_ptrace
- .long sys_alarm /* used by libc4 */
- .long sys_ni_syscall /* was sys_fstat */
- .long sys_pause
-/* 30 */ .long sys_utime /* used by libc4 */
- .long sys_ni_syscall /* was sys_stty */
- .long sys_ni_syscall /* was sys_getty */
- .long sys_access
- .long sys_nice
-/* 35 */ .long sys_ni_syscall /* was sys_ftime */
- .long sys_sync
- .long sys_kill
- .long sys_rename
- .long sys_mkdir
-/* 40 */ .long sys_rmdir
- .long sys_dup
- .long sys_pipe
- .long sys_times
- .long sys_ni_syscall /* was sys_prof */
-/* 45 */ .long sys_brk
- .long sys_setgid16
- .long sys_getgid16
- .long sys_ni_syscall /* was sys_signal */
- .long sys_geteuid16
-/* 50 */ .long sys_getegid16
- .long sys_acct
- .long sys_umount
- .long sys_ni_syscall /* was sys_lock */
- .long sys_ioctl
-/* 55 */ .long sys_fcntl
- .long sys_ni_syscall /* was sys_mpx */
- .long sys_setpgid
- .long sys_ni_syscall /* was sys_ulimit */
- .long sys_ni_syscall /* was sys_olduname */
-/* 60 */ .long sys_umask
- .long sys_chroot
- .long sys_ustat
- .long sys_dup2
- .long sys_getppid
-/* 65 */ .long sys_getpgrp
- .long sys_setsid
- .long sys_sigaction
- .long sys_ni_syscall /* was sys_sgetmask */
- .long sys_ni_syscall /* was sys_ssetmask */
-/* 70 */ .long sys_setreuid16
- .long sys_setregid16
- .long sys_sigsuspend_wrapper
- .long sys_sigpending
- .long sys_sethostname
-/* 75 */ .long sys_setrlimit
- .long sys_old_getrlimit /* used by libc4 */
- .long sys_getrusage
- .long sys_gettimeofday
- .long sys_settimeofday
-/* 80 */ .long sys_getgroups16
- .long sys_setgroups16
- .long old_select /* used by libc4 */
- .long sys_symlink
- .long sys_ni_syscall /* was sys_lstat */
-/* 85 */ .long sys_readlink
- .long sys_uselib
- .long sys_swapon
- .long sys_reboot
- .long old_readdir /* used by libc4 */
-/* 90 */ .long old_mmap /* used by libc4 */
- .long sys_munmap
- .long sys_truncate
- .long sys_ftruncate
- .long sys_fchmod
-/* 95 */ .long sys_fchown16
- .long sys_getpriority
- .long sys_setpriority
- .long sys_ni_syscall /* was sys_profil */
- .long sys_statfs
-/* 100 */ .long sys_fstatfs
- .long sys_ni_syscall
- .long sys_socketcall
- .long sys_syslog
- .long sys_setitimer
-/* 105 */ .long sys_getitimer
- .long sys_newstat
- .long sys_newlstat
- .long sys_newfstat
- .long sys_ni_syscall /* was sys_uname */
-/* 110 */ .long sys_ni_syscall /* was sys_iopl */
- .long sys_vhangup
- .long sys_ni_syscall
- .long sys_syscall /* call a syscall */
- .long sys_wait4
-/* 115 */ .long sys_swapoff
- .long sys_sysinfo
- .long sys_ipc
- .long sys_fsync
- .long sys_sigreturn_wrapper
-/* 120 */ .long sys_clone_wapper
- .long sys_setdomainname
- .long sys_newuname
- .long sys_ni_syscall
- .long sys_adjtimex
-/* 125 */ .long sys_mprotect
- .long sys_sigprocmask
- .long sys_ni_syscall /* WAS: sys_create_module */
- .long sys_init_module
- .long sys_delete_module
-/* 130 */ .long sys_ni_syscall /* WAS: sys_get_kernel_syms */
- .long sys_quotactl
- .long sys_getpgid
- .long sys_fchdir
- .long sys_bdflush
-/* 135 */ .long sys_sysfs
- .long sys_personality
- .long sys_ni_syscall /* .long _sys_afs_syscall */
- .long sys_setfsuid16
- .long sys_setfsgid16
-/* 140 */ .long sys_llseek
- .long sys_getdents
- .long sys_select
- .long sys_flock
- .long sys_msync
-/* 145 */ .long sys_readv
- .long sys_writev
- .long sys_getsid
- .long sys_fdatasync
- .long sys_sysctl
-/* 150 */ .long sys_mlock
- .long sys_munlock
- .long sys_mlockall
- .long sys_munlockall
- .long sys_sched_setparam
-/* 155 */ .long sys_sched_getparam
- .long sys_sched_setscheduler
- .long sys_sched_getscheduler
- .long sys_sched_yield
- .long sys_sched_get_priority_max
-/* 160 */ .long sys_sched_get_priority_min
- .long sys_sched_rr_get_interval
- .long sys_nanosleep
- .long sys_arm_mremap
- .long sys_setresuid16
-/* 165 */ .long sys_getresuid16
- .long sys_ni_syscall
- .long sys_ni_syscall /* WAS: sys_query_module */
- .long sys_poll
- .long sys_nfsservctl
-/* 170 */ .long sys_setresgid16
- .long sys_getresgid16
- .long sys_prctl
- .long sys_rt_sigreturn_wrapper
- .long sys_rt_sigaction
-/* 175 */ .long sys_rt_sigprocmask
- .long sys_rt_sigpending
- .long sys_rt_sigtimedwait
- .long sys_rt_sigqueueinfo
- .long sys_rt_sigsuspend_wrapper
-/* 180 */ .long sys_pread64
- .long sys_pwrite64
- .long sys_chown16
- .long sys_getcwd
- .long sys_capget
-/* 185 */ .long sys_capset
- .long sys_sigaltstack_wrapper
- .long sys_sendfile
- .long sys_ni_syscall
- .long sys_ni_syscall
-/* 190 */ .long sys_vfork_wrapper
- .long sys_getrlimit
- .long sys_mmap2
- .long sys_truncate64
- .long sys_ftruncate64
-/* 195 */ .long sys_stat64
- .long sys_lstat64
- .long sys_fstat64
- .long sys_lchown
- .long sys_getuid
-/* 200 */ .long sys_getgid
- .long sys_geteuid
- .long sys_getegid
- .long sys_setreuid
- .long sys_setregid
-/* 205 */ .long sys_getgroups
- .long sys_setgroups
- .long sys_fchown
- .long sys_setresuid
- .long sys_getresuid
-/* 210 */ .long sys_setresgid
- .long sys_getresgid
- .long sys_chown
- .long sys_setuid
- .long sys_setgid
-/* 215 */ .long sys_setfsuid
- .long sys_setfsgid
- .long sys_getdents64
- .long sys_pivot_root
- .long sys_mincore
-/* 220 */ .long sys_madvise
- .long sys_fcntl64
- .long sys_ni_syscall /* TUX */
- .long sys_ni_syscall /* WAS: sys_security */
- .long sys_gettid
-/* 225 */ .long sys_readahead
- .long sys_setxattr
- .long sys_lsetxattr
- .long sys_fsetxattr
- .long sys_getxattr
-/* 230 */ .long sys_lgetxattr
- .long sys_fgetxattr
- .long sys_listxattr
- .long sys_llistxattr
- .long sys_flistxattr
-/* 235 */ .long sys_removexattr
- .long sys_lremovexattr
- .long sys_fremovexattr
- .long sys_tkill
-__syscall_end:
-
- .rept NR_syscalls - (__syscall_end - __syscall_start) / 4
- .long sys_ni_syscall
- .endr
-#endif
+++ /dev/null
-#ifndef _ASM_ARM26_CPUMASK_H
-#define _ASM_ARM26_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_ARM26_CPUMASK_H */
+++ /dev/null
-#ifndef _ian_char_h_included
-#define _ian_char_h_included
-static int charset[256*8] = {0x777700, 0x7700770, 0x7700770, 0x7777770, 0x7700770, 0x7700770, 0x7700770, 0x0, 0x777770, 0x7700770, 0x7700770, 0x777770, 0x7700770, 0x7700770, 0x777770, 0x0, 0x777700, 0x7700770, 0x770, 0x770, 0x770, 0x7700770, 0x777700, 0x0, 0x77770, 0x770770, 0x7700770, 0x7700770, 0x7700770, 0x770770, 0x77770, 0x0, 0x7777770, 0x770, 0x770, 0x777770, 0x770, 0x770, 0x7777770, 0x0, 0x7777770, 0x770, 0x770, 0x777770, 0x770, 0x770, 0x770, 0x0, 0x777700, 0x7700770, 0x770, 0x7770770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7777770, 0x7700770, 0x7700770, 0x7700770, 0x0, 0x7777770, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x7777770, 0x0, 0x7777700, 0x770000, 0x770000, 0x770000, 0x770000, 0x770770, 0x77700, 0x0, 0x7700770, 0x770770, 0x77770, 0x7770, 0x77770, 0x770770, 0x7700770, 0x0, 0x770, 0x770, 0x770, 0x770, 0x770, 0x770, 0x7777770, 0x0, 0x77000770, 0x77707770, 0x77777770, 0x77070770, 0x77070770, 0x77000770, 0x77000770, 0x0, 0x7700770, 0x7700770, 0x7707770, 0x7777770, 0x7770770, 0x7700770, 0x7700770, 0x0, 0x777700, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x777770, 0x7700770, 0x7700770, 0x777770, 0x770, 0x770, 0x770, 0x0, 0x777700, 0x7700770, 0x7700770, 0x7700770, 0x7070770, 0x770770, 0x7707700, 0x0, 0x777770, 0x7700770, 0x7700770, 0x777770, 0x770770, 0x7700770, 0x7700770, 0x0, 0x777700, 0x7700770, 0x770, 0x777700, 0x7700000, 0x7700770, 0x777700, 0x0, 0x7777770, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x77000, 0x0, 0x77000770, 0x77000770, 0x77070770, 0x77070770, 0x77777770, 0x77707770, 0x77000770, 0x0, 0x7700770, 0x7700770, 0x777700, 0x77000, 0x777700, 0x7700770, 0x7700770, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x77000, 0x77000, 0x77000, 0x0, 0x7777770, 0x7700000, 0x770000, 0x77000, 0x7700, 0x770, 0x7777770, 0x0, 0x777770, 0x770, 0x770, 0x770, 0x770, 0x770, 0x777770, 0x0, 0x0, 0x770, 0x7700, 0x77000, 0x770000, 0x7700000, 0x0, 0x0, 0x7777700, 0x7700000, 0x7700000, 0x7700000, 0x7700000, 0x7700000, 0x7777700, 0x0, 0x777700, 0x7700770, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77777777, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x0, 0x77000, 0x0, 0x770770, 0x770770, 0x770770, 0x0, 0x0, 0x0, 0x0, 0x0, 0x7707700, 0x7707700, 0x77777770, 0x7707700, 0x77777770, 0x7707700, 0x7707700, 0x0, 0x770000, 0x77777700, 0x70770, 0x7777700, 0x77070000, 0x7777770, 0x77000, 0x0, 0x770, 0x7700770, 0x770000, 0x77000, 0x7700, 0x7700770, 0x7700000, 0x0, 0x77700, 0x770770, 0x770770, 0x77700, 0x70770770, 0x7700770, 0x77077700, 0x0, 0x77000, 0x77000, 0x77000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x770000, 0x77000, 0x7700, 0x7700, 0x7700, 0x77000, 0x770000, 0x0, 0x7700, 0x77000, 0x770000, 0x770000, 0x770000, 0x77000, 0x7700, 0x0, 0x0, 0x77000, 0x7777770, 0x777700, 0x7777770, 0x77000, 0x0, 0x0, 0x0, 0x77000, 0x77000, 0x7777770, 0x77000, 0x77000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77000, 0x77000, 0x7700, 0x0, 0x0, 0x0, 0x7777770, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77000, 0x77000, 0x0, 0x0, 0x7700000, 0x770000, 0x77000, 0x7700, 0x770, 0x0, 0x0, 0x777700, 0x7700770, 0x7770770, 0x7777770, 0x7707770, 0x7700770, 0x777700, 0x0, 0x77000, 0x77700, 0x77000, 0x77000, 0x77000, 0x77000, 0x7777770, 0x0, 0x777700, 0x7700770, 0x7700000, 0x770000, 0x77000, 0x7700, 0x7777770, 0x0, 0x777700, 0x7700770, 0x7700000, 0x777000, 0x7700000, 0x7700770, 0x777700, 0x0, 0x770000, 0x777000, 0x777700, 0x770770, 0x7777770, 0x770000, 0x770000, 0x0, 0x7777770, 0x770, 0x777770, 0x7700000, 0x7700000, 0x7700770, 0x777700, 0x0, 0x777000, 0x7700, 0x770, 0x777770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x7777770, 0x7700000, 0x770000, 0x77000, 0x7700, 0x7700, 0x7700, 0x0, 0x777700, 0x7700770, 0x7700770, 0x777700, 0x7700770, 0x7700770, 0x777700, 0x0, 0x777700, 0x7700770, 0x7700770, 0x7777700, 0x7700000, 0x770000, 0x77700, 0x0, 0x0, 0x0, 0x77000, 0x77000, 0x0, 0x77000, 0x77000, 0x0, 0x0, 0x0, 0x77000, 0x77000, 0x0, 0x77000, 0x77000, 0x7700, 0x770000, 0x77000, 0x7700, 0x770, 0x7700, 0x77000, 0x770000, 0x0, 0x0, 0x0, 0x7777770, 0x0, 0x7777770, 0x0, 0x0, 0x0, 0x7700, 0x77000, 0x770000, 0x7700000, 0x770000, 0x77000, 0x7700, 0x0, 0x777700, 0x7700770, 0x770000, 0x77000, 0x77000, 0x0, 0x77000, 0x0, 0x777700, 0x7700770, 0x7770770, 0x7070770, 0x7770770, 0x770, 0x777700, 0x0, 0x777700, 0x7700770, 0x7700770, 0x7777770, 0x7700770, 0x7700770, 0x7700770, 0x0, 0x777770, 0x7700770, 0x7700770, 0x777770, 0x7700770, 0x7700770, 0x777770, 0x0, 0x777700, 0x7700770, 0x770, 0x770, 0x770, 0x7700770, 0x777700, 0x0, 0x77770, 0x770770, 0x7700770, 0x7700770, 0x7700770, 0x770770, 0x77770, 0x0, 0x7777770, 0x770, 0x770, 0x777770, 0x770, 0x770, 0x7777770, 0x0, 0x7777770, 0x770, 0x770, 0x777770, 0x770, 0x770, 0x770, 0x0, 0x777700, 0x7700770, 0x770, 0x7770770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7777770, 0x7700770, 0x7700770, 0x7700770, 0x0, 0x7777770, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x7777770, 0x0, 0x7777700, 0x770000, 0x770000, 0x770000, 0x770000, 0x770770, 0x77700, 0x0, 0x7700770, 0x770770, 0x77770, 0x7770, 0x77770, 0x770770, 0x7700770, 0x0, 0x770, 0x770, 0x770, 0x770, 0x770, 0x770, 0x7777770, 0x0, 0x77000770, 0x77707770, 0x77777770, 0x77070770, 0x77070770, 0x77000770, 0x77000770, 0x0, 0x7700770, 0x7700770, 0x7707770, 0x7777770, 0x7770770, 0x7700770, 0x7700770, 0x0, 0x777700, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x777770, 0x7700770, 0x7700770, 0x777770, 0x770, 0x770, 0x770, 0x0, 0x777700, 0x7700770, 0x7700770, 0x7700770, 0x7070770, 0x770770, 0x7707700, 0x0, 0x777770, 0x7700770, 0x7700770, 0x777770, 0x770770, 0x7700770, 0x7700770, 0x0, 0x777700, 0x7700770, 0x770, 0x777700, 0x7700000, 0x7700770, 0x777700, 0x0, 0x7777770, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x77000, 0x0, 0x77000770, 0x77000770, 0x77070770, 0x77070770, 0x77777770, 0x77707770, 0x77000770, 0x0, 0x7700770, 0x7700770, 0x777700, 0x77000, 0x777700, 0x7700770, 0x7700770, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x77000, 0x77000, 0x77000, 0x0, 0x7777770, 0x7700000, 0x770000, 0x77000, 0x7700, 0x770, 0x7777770, 0x0, 0x777770, 0x770, 0x770, 0x770, 0x770, 0x770, 0x777770, 0x0, 0x0, 0x770, 0x7700, 0x77000, 0x770000, 0x7700000, 0x0, 0x0, 0x7777700, 0x7700000, 0x7700000, 0x7700000, 0x7700000, 0x7700000, 0x7777700, 0x0, 0x777700, 0x7700770, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77777777, 0x7700, 0x77000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x777700, 0x7700000, 0x7777700, 0x7700770, 0x7777700, 0x0, 0x770, 0x770, 0x777770, 0x7700770, 0x7700770, 0x7700770, 0x777770, 0x0, 0x0, 0x0, 0x777700, 0x7700770, 0x770, 0x7700770, 0x777700, 0x0, 0x7700000, 0x7700000, 0x7777700, 0x7700770, 0x7700770, 0x7700770, 0x7777700, 0x0, 0x0, 0x0, 0x777700, 0x7700770, 0x7777770, 0x770, 0x777700, 0x0, 0x777000, 0x7700, 0x7700, 0x777770, 0x7700, 0x7700, 0x7700, 0x0, 0x0, 0x0, 0x7777700, 0x7700770, 0x7700770, 0x7777700, 0x7700000, 0x777700, 0x770, 0x770, 0x777770, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x0, 0x77000, 0x0, 0x77700, 0x77000, 0x77000, 0x77000, 0x777700, 0x0, 0x77000, 0x0, 0x77700, 0x77000, 0x77000, 0x77000, 0x77000, 0x7770, 0x770, 0x770, 0x7700770, 0x770770, 0x77770, 0x770770, 0x7700770, 0x0, 0x77700, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x777700, 0x0, 0x0, 0x0, 0x7707700, 0x77777770, 0x77070770, 0x77070770, 0x77000770, 0x0, 0x0, 0x0, 0x777770, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x0, 0x0, 0x0, 0x777700, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x0, 0x0, 0x777770, 0x7700770, 0x7700770, 0x777770, 0x770, 0x770, 0x0, 0x0, 0x7777700, 0x7700770, 0x7700770, 0x7777700, 0x7700000, 0x77700000, 0x0, 0x0, 0x770770, 0x7707770, 0x770, 0x770, 0x770, 0x0, 0x0, 0x0, 0x7777700, 0x770, 0x777700, 0x7700000, 0x777770, 0x0, 0x7700, 0x7700, 0x777770, 0x7700, 0x7700, 0x7700, 0x777000, 0x0, 0x0, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x7777700, 0x0, 0x0, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x77000, 0x0, 0x0, 0x0, 0x77000770, 0x77070770, 0x77070770, 0x77777770, 0x7707700, 0x0, 0x0, 0x0, 0x7700770, 0x777700, 0x77000, 0x777700, 0x7700770, 0x0, 0x0, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7777700, 0x7700000, 0x777700, 0x0, 0x0, 0x7777770, 0x770000, 0x77000, 0x7700, 0x7777770, 0x0, 0x770000, 0x77000, 0x77000, 0x7770, 0x77000, 0x77000, 0x770000, 0x0, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x0, 0x7700, 0x77000, 0x77000, 0x7770000, 0x77000, 0x77000, 0x7700, 0x0, 0x70007700, 0x77070770, 0x7700070, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77000000, 0x77000000, 0x7700000, 0x7700000, 0x7707770, 0x777000, 0x770000, 0x0, 0x777000, 0x77000770, 0x77070770, 0x77070770, 0x77777770, 0x77707770, 0x77000770, 0x0, 0x777000, 0x7707700, 0x0, 0x77070770, 0x77070770, 0x77777770, 0x7707700, 0x0, 0x7777777, 0x7007007, 0x7007007, 0x7007777, 0x7000007, 0x7000007, 0x7777777, 0x0, 0x7700770, 0x70077007, 0x70000007, 0x7000070, 0x70000007, 0x70077007, 0x7700770, 0x0, 0x77000, 0x7700770, 0x7000070, 0x7700770, 0x777700, 0x77000, 0x77000, 0x0, 0x77000, 0x7700770, 0x0, 0x7700770, 0x7700770, 0x7777700, 0x7700000, 0x777700, 0x77700000, 0x70000000, 0x7000000, 0x700770, 0x707007, 0x770, 0x7007, 0x770, 0x77000, 0x70700, 0x77770070, 0x70000007, 0x77770070, 0x70700, 0x77000, 0x0, 0x77000, 0x707000, 0x7007777, 0x70000007, 0x7007777, 0x707000, 0x77000, 0x0, 0x777700, 0x700700, 0x700700, 0x77700777, 0x7000070, 0x700700, 0x77000, 0x0, 0x77000, 0x700700, 0x7000070, 0x77700777, 0x700700, 0x700700, 0x777700, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77077077, 0x77077077, 0x0, 0x70007777, 0x77077070, 0x70707070, 0x70007070, 0x0, 0x0, 0x0, 0x0, 0x77, 0x770077, 0x77000, 0x7700, 0x770, 0x77077077, 0x77077000, 0x0, 0x0, 0x0, 0x777700, 0x7777770, 0x7777770, 0x777700, 0x0, 0x0, 0x770000, 0x77000, 0x77000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x770000, 0x770000, 0x77000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x770000, 0x77000, 0x7700, 0x7700, 0x77000, 0x770000, 0x0, 0x0, 0x7700, 0x77000, 0x770000, 0x770000, 0x77000, 0x7700, 0x0, 0x77077000, 0x7707700, 0x7707700, 0x0, 0x0, 0x0, 0x0, 0x0, 0x7707700, 0x7707700, 0x770770, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x7707700, 0x7707700, 0x770770, 0x0, 0x0, 0x0, 0x777700, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77777777, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x7777770, 0x0, 0x0, 0x0, 0x0, 0x77707770, 0x770077, 0x770077, 0x77770077, 0x770077, 0x770077, 0x77707770, 0x0, 0x0, 0x0, 0x7770770, 0x77077077, 0x77777077, 0x77077, 0x7770770, 0x0, 0x77000, 0x77000, 0x7777770, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x7777770, 0x77000, 0x7777770, 0x77000, 0x77000, 0x77000, 0x777700, 0x7700770, 0x770, 0x7707777, 0x7700770, 0x7700770, 0x7700770, 0x0, 0x7777700, 0x7700770, 0x7700770, 0x7707777, 0x7700770, 0x7700770, 0x7700770, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77000, 0x0, 0x77000, 0x77000, 0x77000, 0x77000, 0x77000, 0x0, 0x70000, 0x7777700, 0x77070770, 0x70770, 0x77070770, 0x7777700, 0x70000, 0x0, 0x777000, 0x7707700, 0x7700, 0x777770, 0x7700, 0x7700, 0x7777770, 0x0, 0x0, 0x7700770, 0x777700, 0x7700770, 0x7700770, 0x777700, 0x7700770, 0x0, 0x7700770, 0x777700, 0x77000, 0x77000, 0x7777770, 0x77000, 0x77000, 0x0, 0x77000, 0x77000, 0x77000, 0x0, 0x77000, 0x77000, 0x77000, 0x0, 0x777700, 0x770, 0x777700, 0x7700770, 0x777700, 0x7700000, 0x777700, 0x0, 0x7700770, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x777700, 0x7000070, 0x70077007, 0x70000707, 0x70000707, 0x70077007, 0x7000070, 0x777700, 0x777000, 0x7700000, 0x7777000, 0x7707700, 0x7777000, 0x0, 0x7777700, 0x0, 0x0, 0x77007700, 0x7700770, 0x770077, 0x770077, 0x7700770, 0x77007700, 0x0, 0x7777770, 0x7700000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x7777770, 0x0, 0x0, 0x0, 0x0, 0x777700, 0x7000070, 0x70077707, 0x70700707, 0x70077707, 0x70700707, 0x7000070, 0x777700, 0x7777770, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x777700, 0x7700770, 0x777700, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77000, 0x77000, 0x7777770, 0x77000, 0x77000, 0x0, 0x7777770, 0x0, 0x77700, 0x700000, 0x77000, 0x700, 0x777700, 0x0, 0x0, 0x0, 0x77700, 0x700000, 0x77000, 0x700000, 0x77700, 0x0, 0x0, 0x0, 0x770000, 0x77000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77007700, 0x77007700, 0x77007700, 0x77007700, 0x7777700, 0x770, 0x77000000, 0x7777700, 0x7707770, 0x7707770, 0x7707700, 0x7707700, 0x7777700, 0x0, 0x0, 0x0, 0x0, 0x77000, 0x77000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x77000, 0x7700, 0x7000, 0x7700, 0x7000, 0x7000, 0x77700, 0x0, 0x0, 0x0, 0x777000, 0x7707700, 0x7707700, 0x7707700, 0x777000, 0x0, 0x7777700, 0x0, 0x0, 0x770077, 0x7700770, 0x77007700, 0x77007700, 0x7700770, 0x770077, 0x0, 0x70, 0x77, 0x70, 0x70070, 0x70070, 0x7070000, 0x77770000, 0x7000000, 0x70, 0x77, 0x70, 0x77770070, 0x70000070, 0x77770000, 0x70000, 0x77770000, 0x777, 0x700, 0x777, 0x70700, 0x70777, 0x7070000, 0x77770000, 0x7000000, 0x77000, 0x0, 0x77000, 0x77000, 0x7700, 0x7700770, 0x777700, 0x0, 0x7700, 0x77000, 0x0, 0x777700, 0x7700770, 0x7777770, 0x7700770, 0x0, 0x770000, 0x77000, 0x0, 0x777700, 0x7700770, 0x7777770, 0x7700770, 0x0, 0x77000, 0x7700770, 0x0, 0x777700, 0x7700770, 0x7777770, 0x7700770, 0x0, 0x7707700, 0x770770, 0x0, 0x777700, 0x7700770, 0x7777770, 0x7700770, 0x0, 0x7700770, 0x7700770, 0x0, 0x777700, 0x7700770, 0x7777770, 0x7700770, 0x0, 0x777700, 0x7700770, 0x777700, 0x777700, 0x7700770, 0x7777770, 0x7700770, 0x0, 0x77777700, 0x7700770, 0x7700770, 0x77777770, 0x7700770, 0x7700770, 0x77700770, 0x0, 0x777700, 0x7700770, 0x770, 0x770, 0x7700770, 0x777700, 0x7700, 0x770, 0x7700, 0x77000, 0x7777770, 0x770, 0x777770, 0x770, 0x7777770, 0x0, 0x770000, 0x77000, 0x7777770, 0x770, 0x777770, 0x770, 0x7777770, 0x0, 0x777700, 0x7700770, 0x7777770, 0x770, 0x777770, 0x770, 0x7777770, 0x0, 0x7700770, 0x0, 0x7777770, 0x770, 0x777770, 0x770, 0x7777770, 0x0, 0x7700, 0x77000, 0x0, 0x7777770, 0x77000, 0x77000, 0x7777770, 0x0, 0x770000, 0x77000, 0x0, 0x7777770, 0x77000, 0x77000, 0x7777770, 0x0, 0x777700, 0x7700770, 0x0, 0x7777770, 0x77000, 0x77000, 0x7777770, 0x0, 0x7700770, 0x7700770, 0x0, 0x7777770, 0x77000, 0x77000, 0x7777770, 0x0, 0x77770, 0x770770, 0x7700770, 0x7707777, 0x7700770, 0x770770, 0x77770, 0x0, 0x7707700, 0x770770, 0x0, 0x7700770, 0x7707770, 0x7770770, 0x7700770, 0x0, 0x7700, 0x77000, 0x777700, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x770000, 0x77000, 0x777700, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x777700, 0x7700770, 0x777700, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x7707700, 0x770770, 0x777700, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x7700770, 0x0, 0x777700, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x0, 0x77000770, 0x7707700, 0x777000, 0x777000, 0x7707700, 0x77000770, 0x0, 0x70777700, 0x7700770, 0x7770770, 0x7777770, 0x7707770, 0x7700770, 0x777707, 0x0, 0x7700, 0x77000, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x770000, 0x77000, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x777700, 0x7700770, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x7700770, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7700770, 0x777700, 0x0, 0x770000, 0x77000, 0x7700770, 0x7700770, 0x777700, 0x77000, 0x77000, 0x0, 0x7777, 0x770, 0x777770, 0x7700770, 0x777770, 0x770, 0x7777, 0x0, 0x777700, 0x7700770, 0x7700770, 0x770770, 0x7700770, 0x7700770, 0x770770, 0x77, 0x7700, 0x77000, 0x777700, 0x7700000, 0x7777700, 0x7700770, 0x7777700, 0x0, 0x770000, 0x77000, 0x777700, 0x7700000, 0x7777700, 0x7700770, 0x7777700, 0x0, 0x77000, 0x7700770, 0x777700, 0x7700000, 0x7777700, 0x7700770, 0x7777700, 0x0, 0x7707700, 0x770770, 0x777700, 0x7700000, 0x7777700, 0x7700770, 0x7777700, 0x0, 0x7700770, 0x0, 0x777700, 0x7700000, 0x7777700, 0x7700770, 0x7777700, 0x0, 0x777700, 0x7700770, 0x777700, 0x7700000, 0x7777700, 0x7700770, 0x7777700, 0x0, 0x0, 0x0, 0x77777700, 0x70770000, 0x77777700, 0x770770, 0x77777700, 0x0, 0x0, 0x0, 0x777700, 0x7700770, 0x770, 0x7700770, 0x777700, 0x770, 0x7700, 0x77000, 0x777700, 0x7700770, 0x7777770, 0x770, 0x777700, 0x0, 0x770000, 0x77000, 0x777700, 0x7700770, 0x7777770, 0x770, 0x777700, 0x0, 0x777700, 0x7700770, 0x777700, 0x7700770, 0x7777770, 0x770, 0x777700, 0x0, 0x7700770, 0x0, 0x777700, 0x7700770, 0x7777770, 0x770, 0x777700, 0x0, 0x7700, 0x77000, 0x0, 0x77700, 0x77000, 0x77000, 0x777700, 0x0, 0x770000, 0x77000, 0x0, 0x77700, 0x77000, 0x77000, 0x777700, 0x0, 0x777700, 0x7700770, 0x0, 0x77700, 0x77000, 0x77000, 0x777700, 0x0, 0x7700770, 0x0, 0x0, 0x77700, 0x77000, 0x77000, 0x777700, 0x0, 0x77000, 0x7777700, 0x770000, 0x7700000, 0x7777700, 0x7700770, 0x7777700, 0x0, 0x7707700, 0x770770, 0x0, 0x777770, 0x7700770, 0x7700770, 0x7700770, 0x0, 0x7700, 0x77000, 0x0, 0x777700, 0x7700770, 0x7700770, 0x777700, 0x0, 0x770000, 0x77000, 0x0, 0x777700, 0x7700770, 0x7700770, 0x777700, 0x0, 0x777700, 0x7700770, 0x0, 0x777700, 0x7700770, 0x7700770, 0x777700, 0x0, 0x7707700, 0x770770, 0x0, 0x777700, 0x7700770, 0x7700770, 0x777700, 0x0, 0x7700770, 0x0, 0x0, 0x777700, 0x7700770, 0x7700770, 0x777700, 0x0, 0x0, 0x77000, 0x0, 0x77777777, 0x0, 0x77000, 0x0, 0x0, 0x0, 0x7000000, 0x777700, 0x7770770, 0x7707770, 0x7700770, 0x777707, 0x0, 0x7700, 0x77000, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7777700, 0x0, 0x770000, 0x77000, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7777700, 0x0, 0x777700, 0x7700770, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7777700, 0x0, 0x7700770, 0x0, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7777700, 0x0, 0x770000, 0x77000, 0x7700770, 0x7700770, 0x7700770, 0x7777700, 0x7700000, 0x777700, 0x770, 0x770, 0x777770, 0x7700770, 0x777770, 0x770, 0x770, 0x0, 0x7700770, 0x0, 0x7700770, 0x7700770, 0x7700770, 0x7777700, 0x7700000, 0x777700};
-
-
-static void ian_scroll_screen(void){
- int i;
- char *j;
- char *screen_base = (char*)0x2000000;//1F88000;
- for(i = 8; i < 480 ; i++)
- for(j = screen_base + i*(640/2) ; j < screen_base + (i+1)*(640/2) ; j++)
- *(j-(8*(640/2))) = *j;
- for(i = 479 ; i >= 472 ; i--)
- for(j = screen_base + i*(640/2) ; j < screen_base + (i+1)*(640/2) ; j++)
- *j = 0;
-
-}
-
-static void ian_print(char *string){
- char *screen_base = (char*)0x2000000;
- static int x, y, first, page;
- int *temp;
- int i;
-
- if(first == 0){
- first = 1;
- for(i = 0 ; i < (640/2)*480 ; i++) screen_base[i] = 0;
- }
-
- while(*string){
- if(*string==10){
- y++;
- x = 0;
- if(y > 59){
- y = 59;
- ian_scroll_screen();
- }
- }
- else if(*string == 8){
- if(x)
- x--;
- }
- else{
- if(x > 79){
- y++;
- x = 0;
- if(y > 59){
- y = 59;
- ian_scroll_screen();
- }
- }
-
- temp = (int *)(screen_base + ((640/2)*8*y) + (x * 4));
- for(i = 0 ; i < 8 ; i++){
- *temp = charset[i + (*string * 8)];
- temp += 640/8;
- }
- x++;
- }
- string++;
- }
-}
-
-static void ian_print_num(unsigned long value){
- int i;
- char out[9];
-
- for(i = 7; i >= 0 ; i--){
- out[i] = value & 0x0F;
- out[i] = out[i]<10?out[i]+'0':out[i]+'A'-10;
- value = value >> 4;
- }
- out[8] = 0;
-
- ian_print(out);
-
-}
-
-#endif
+++ /dev/null
-/*
- * linux/include/asm-arm/linux_logo.h
- *
- * Copyright (C) 1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Linux console driver logo definitions for ARM
- */
-
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "ARM Linux version " UTS_RELEASE
-
-#include <linux/linux_logo.h>
-
+++ /dev/null
-#ifndef _ARM_RMAP_H
-#define _ARM_RMAP_H
-
-/*
- * linux/include/asm-arm26/proc-armv/rmap.h
- *
- * Architecture dependant parts of the reverse mapping code,
- *
- * ARM is different since hardware page tables are smaller than
- * the page size and Linux uses a "duplicate" one with extra info.
- * For rmap this means that the first 2 kB of a page are the hardware
- * page tables and the last 2 kB are the software page tables.
- */
-
-static inline void pgtable_add_rmap(struct page *page, struct mm_struct * mm, unsigned long address)
-{
- page->mapping = (void *)mm;
- page->index = address & ~((PTRS_PER_PTE * PAGE_SIZE) - 1);
- inc_page_state(nr_page_table_pages);
-}
-
-static inline void pgtable_remove_rmap(struct page *page)
-{
- page->mapping = NULL;
- page->index = 0;
- dec_page_state(nr_page_table_pages);
-}
-
-static inline struct mm_struct * ptep_to_mm(pte_t * ptep)
-{
- struct page * page = virt_to_page(ptep);
- return (struct mm_struct *)page->mapping;
-}
-
-/* The page table takes half of the page */
-#define PTE_MASK ((PAGE_SIZE / 2) - 1)
-
-static inline unsigned long ptep_to_address(pte_t * ptep)
-{
- struct page * page = virt_to_page(ptep);
- unsigned long low_bits;
-
- low_bits = ((unsigned long)ptep & PTE_MASK) * PTRS_PER_PTE;
- return page->index + low_bits;
-}
-
-//FIXME!!! IS these correct?
-static inline pte_addr_t ptep_to_paddr(pte_t *ptep)
-{
- return (pte_addr_t)ptep;
-}
-
-static inline pte_t *rmap_ptep_map(pte_addr_t pte_paddr)
-{
- return (pte_t *)pte_paddr;
-}
-
-static inline void rmap_ptep_unmap(pte_t *pte)
-{
- return;
-}
-
-
-//#include <asm-generic/rmap.h>
-
-#endif /* _ARM_RMAP_H */
+++ /dev/null
-#ifndef _ASM_CRIS_CPUMASK_H
-#define _ASM_CRIS_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_CRIS_CPUMASK_H */
+++ /dev/null
-#ifndef _CRIS_RMAP_H
-#define _CRIS_RMAP_H
-
-/* nothing to see, move along :) */
-#include <asm-generic/rmap.h>
-
-#endif
+++ /dev/null
-#ifndef __ASM_GENERIC_CPUMASK_H
-#define __ASM_GENERIC_CPUMASK_H
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/threads.h>
-#include <linux/types.h>
-#include <linux/bitmap.h>
-
-#if NR_CPUS > BITS_PER_LONG && NR_CPUS != 1
-#define CPU_ARRAY_SIZE BITS_TO_LONGS(NR_CPUS)
-
-struct cpumask
-{
- unsigned long mask[CPU_ARRAY_SIZE];
-};
-
-typedef struct cpumask cpumask_t;
-
-#else
-typedef unsigned long cpumask_t;
-#endif
-
-#ifdef CONFIG_SMP
-#if NR_CPUS > BITS_PER_LONG
-#include <asm-generic/cpumask_array.h>
-#else
-#include <asm-generic/cpumask_arith.h>
-#endif
-#else
-#include <asm-generic/cpumask_up.h>
-#endif
-
-#if NR_CPUS <= 4*BITS_PER_LONG
-#include <asm-generic/cpumask_const_value.h>
-#else
-#include <asm-generic/cpumask_const_reference.h>
-#endif
-
-#endif /* __ASM_GENERIC_CPUMASK_H */
+++ /dev/null
-#ifndef __ASM_GENERIC_CPUMASK_ARITH_H
-#define __ASM_GENERIC_CPUMASK_ARITH_H
-
-/*
- * Arithmetic type -based cpu bitmaps. A single unsigned long is used
- * to contain the whole cpu bitmap.
- */
-
-#define cpu_set(cpu, map) set_bit(cpu, &(map))
-#define cpu_clear(cpu, map) clear_bit(cpu, &(map))
-#define cpu_isset(cpu, map) test_bit(cpu, &(map))
-#define cpu_test_and_set(cpu, map) test_and_set_bit(cpu, &(map))
-
-#define cpus_and(dst,src1,src2) do { dst = (src1) & (src2); } while (0)
-#define cpus_or(dst,src1,src2) do { dst = (src1) | (src2); } while (0)
-#define cpus_clear(map) do { map = 0; } while (0)
-#define cpus_complement(map) do { map = ~(map); } while (0)
-#define cpus_equal(map1, map2) ((map1) == (map2))
-#define cpus_empty(map) ((map) == 0)
-#define cpus_addr(map) (&(map))
-
-#if BITS_PER_LONG == 32
-#define cpus_weight(map) hweight32(map)
-#elif BITS_PER_LONG == 64
-#define cpus_weight(map) hweight64(map)
-#endif
-
-#define cpus_shift_right(dst, src, n) do { dst = (src) >> (n); } while (0)
-#define cpus_shift_left(dst, src, n) do { dst = (src) << (n); } while (0)
-
-#define any_online_cpu(map) \
-({ \
- cpumask_t __tmp__; \
- cpus_and(__tmp__, map, cpu_online_map); \
- __tmp__ ? first_cpu(__tmp__) : NR_CPUS; \
-})
-
-#define CPU_MASK_ALL (~((cpumask_t)0) >> (8*sizeof(cpumask_t) - NR_CPUS))
-#define CPU_MASK_NONE ((cpumask_t)0)
-
-/* only ever use this for things that are _never_ used on large boxen */
-#define cpus_coerce(map) ((unsigned long)(map))
-#define cpus_promote(map) ({ map; })
-#define cpumask_of_cpu(cpu) ({ ((cpumask_t)1) << (cpu); })
-
-#define first_cpu(map) find_first_bit(&(map), NR_CPUS)
-#define next_cpu(cpu, map) find_next_bit(&(map), NR_CPUS, cpu + 1)
-
-#endif /* __ASM_GENERIC_CPUMASK_ARITH_H */
+++ /dev/null
-#ifndef __ASM_GENERIC_CPUMASK_ARRAY_H
-#define __ASM_GENERIC_CPUMASK_ARRAY_H
-
-/*
- * Array-based cpu bitmaps. An array of unsigned longs is used to contain
- * the bitmap, and then contained in a structure so it may be passed by
- * value.
- */
-
-#define CPU_ARRAY_SIZE BITS_TO_LONGS(NR_CPUS)
-
-#define cpu_set(cpu, map) set_bit(cpu, (map).mask)
-#define cpu_clear(cpu, map) clear_bit(cpu, (map).mask)
-#define cpu_isset(cpu, map) test_bit(cpu, (map).mask)
-#define cpu_test_and_set(cpu, map) test_and_set_bit(cpu, (map).mask)
-
-#define cpus_and(dst,src1,src2) bitmap_and((dst).mask,(src1).mask, (src2).mask, NR_CPUS)
-#define cpus_or(dst,src1,src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, NR_CPUS)
-#define cpus_clear(map) bitmap_zero((map).mask, NR_CPUS)
-#define cpus_complement(map) bitmap_complement((map).mask, NR_CPUS)
-#define cpus_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, NR_CPUS)
-#define cpus_empty(map) bitmap_empty(map.mask, NR_CPUS)
-#define cpus_addr(map) ((map).mask)
-#define cpus_weight(map) bitmap_weight((map).mask, NR_CPUS)
-#define cpus_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, NR_CPUS)
-#define cpus_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, NR_CPUS)
-#define first_cpu(map) find_first_bit((map).mask, NR_CPUS)
-#define next_cpu(cpu, map) find_next_bit((map).mask, NR_CPUS, cpu + 1)
-
-/* only ever use this for things that are _never_ used on large boxen */
-#define cpus_coerce(map) ((map).mask[0])
-#define cpus_promote(map) ({ cpumask_t __cpu_mask = CPU_MASK_NONE;\
- __cpu_mask.mask[0] = map; \
- __cpu_mask; \
- })
-#define cpumask_of_cpu(cpu) ({ cpumask_t __cpu_mask = CPU_MASK_NONE;\
- cpu_set(cpu, __cpu_mask); \
- __cpu_mask; \
- })
-#define any_online_cpu(map) \
-({ \
- cpumask_t __tmp__; \
- cpus_and(__tmp__, map, cpu_online_map); \
- find_first_bit(__tmp__.mask, NR_CPUS); \
-})
-
-
-/*
- * um, these need to be usable as static initializers
- */
-#define CPU_MASK_ALL ((cpumask_t) { {[0 ... CPU_ARRAY_SIZE-1] = ~0UL} })
-#define CPU_MASK_NONE ((cpumask_t) { {[0 ... CPU_ARRAY_SIZE-1] = 0UL} })
-
-#endif /* __ASM_GENERIC_CPUMASK_ARRAY_H */
+++ /dev/null
-#ifndef __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H
-#define __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H
-
-struct cpumask_ref {
- const cpumask_t *val;
-};
-
-typedef const struct cpumask_ref cpumask_const_t;
-
-#define mk_cpumask_const(map) ((cpumask_const_t){ &(map) })
-#define cpu_isset_const(cpu, map) cpu_isset(cpu, *(map).val)
-
-#define cpus_and_const(dst,src1,src2) cpus_and(dst,*(src1).val,*(src2).val)
-#define cpus_or_const(dst,src1,src2) cpus_or(dst,*(src1).val,*(src2).val)
-
-#define cpus_equal_const(map1, map2) cpus_equal(*(map1).val, *(map2).val)
-
-#define cpus_copy_const(map1, map2) bitmap_copy((map1).mask, (map2).val->mask, NR_CPUS)
-
-#define cpus_empty_const(map) cpus_empty(*(map).val)
-#define cpus_weight_const(map) cpus_weight(*(map).val)
-#define first_cpu_const(map) first_cpu(*(map).val)
-#define next_cpu_const(cpu, map) next_cpu(cpu, *(map).val)
-
-/* only ever use this for things that are _never_ used on large boxen */
-#define cpus_coerce_const(map) cpus_coerce(*(map).val)
-#define any_online_cpu_const(map) any_online_cpu(*(map).val)
-
-#endif /* __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H */
+++ /dev/null
-#ifndef __ASM_GENERIC_CPUMASK_CONST_VALUE_H
-#define __ASM_GENERIC_CPUMASK_CONST_VALUE_H
-
-typedef const cpumask_t cpumask_const_t;
-
-#define mk_cpumask_const(map) (map)
-#define cpu_isset_const(cpu, map) cpu_isset(cpu, map)
-#define cpus_and_const(dst,src1,src2) cpus_and(dst, src1, src2)
-#define cpus_or_const(dst,src1,src2) cpus_or(dst, src1, src2)
-#define cpus_equal_const(map1, map2) cpus_equal(map1, map2)
-#define cpus_empty_const(map) cpus_empty(map)
-#define cpus_copy_const(map1, map2) do { map1 = (cpumask_t)map2; } while (0)
-#define cpus_weight_const(map) cpus_weight(map)
-#define first_cpu_const(map) first_cpu(map)
-#define next_cpu_const(cpu, map) next_cpu(cpu, map)
-
-/* only ever use this for things that are _never_ used on large boxen */
-#define cpus_coerce_const(map) cpus_coerce(map)
-#define any_online_cpu_const(map) any_online_cpu(map)
-
-#endif /* __ASM_GENERIC_CPUMASK_CONST_VALUE_H */
+++ /dev/null
-#ifndef __ASM_GENERIC_CPUMASK_UP_H
-#define __ASM_GENERIC_CPUMASK_UP_H
-
-#define cpus_coerce(map) (map)
-
-#define cpu_set(cpu, map) do { (void)(cpu); cpus_coerce(map) = 1UL; } while (0)
-#define cpu_clear(cpu, map) do { (void)(cpu); cpus_coerce(map) = 0UL; } while (0)
-#define cpu_isset(cpu, map) ((void)(cpu), cpus_coerce(map) != 0UL)
-#define cpu_test_and_set(cpu, map) ((void)(cpu), test_and_set_bit(0, &(map)))
-
-#define cpus_and(dst, src1, src2) \
- do { \
- if (cpus_coerce(src1) && cpus_coerce(src2)) \
- cpus_coerce(dst) = 1UL; \
- else \
- cpus_coerce(dst) = 0UL; \
- } while (0)
-
-#define cpus_or(dst, src1, src2) \
- do { \
- if (cpus_coerce(src1) || cpus_coerce(src2)) \
- cpus_coerce(dst) = 1UL; \
- else \
- cpus_coerce(dst) = 0UL; \
- } while (0)
-
-#define cpus_clear(map) do { cpus_coerce(map) = 0UL; } while (0)
-
-#define cpus_complement(map) \
- do { \
- cpus_coerce(map) = !cpus_coerce(map); \
- } while (0)
-
-#define cpus_equal(map1, map2) (cpus_coerce(map1) == cpus_coerce(map2))
-#define cpus_empty(map) (cpus_coerce(map) == 0UL)
-#define cpus_addr(map) (&(map))
-#define cpus_weight(map) (cpus_coerce(map) ? 1UL : 0UL)
-#define cpus_shift_right(d, s, n) do { cpus_coerce(d) = 0UL; } while (0)
-#define cpus_shift_left(d, s, n) do { cpus_coerce(d) = 0UL; } while (0)
-#define first_cpu(map) (cpus_coerce(map) ? 0 : 1)
-#define next_cpu(cpu, map) 1
-
-/* only ever use this for things that are _never_ used on large boxen */
-#define cpus_promote(map) \
- ({ \
- cpumask_t __tmp__; \
- cpus_coerce(__tmp__) = map; \
- __tmp__; \
- })
-#define cpumask_of_cpu(cpu) ((void)(cpu), cpus_promote(1))
-#define any_online_cpu(map) (cpus_coerce(map) ? 0 : 1)
-
-/*
- * um, these need to be usable as static initializers
- */
-#define CPU_MASK_ALL 1UL
-#define CPU_MASK_NONE 0UL
-
-#endif /* __ASM_GENERIC_CPUMASK_UP_H */
+++ /dev/null
-#ifndef _GENERIC_RMAP_H
-#define _GENERIC_RMAP_H
-/*
- * linux/include/asm-generic/rmap.h
- *
- * Architecture dependent parts of the reverse mapping code,
- * this version should work for most architectures with a
- * 'normal' page table layout.
- *
- * We use the struct page of the page table page to find out
- * the process and full address of a page table entry:
- * - page->mapping points to the process' mm_struct
- * - page->index has the high bits of the address
- * - the lower bits of the address are calculated from the
- * offset of the page table entry within the page table page
- *
- * For CONFIG_HIGHPTE, we need to represent the address of a pte in a
- * scalar pte_addr_t. The pfn of the pte's page is shifted left by PAGE_SIZE
- * bits and is then ORed with the byte offset of the pte within its page.
- *
- * For CONFIG_HIGHMEM4G, the pte_addr_t is 32 bits. 20 for the pfn, 12 for
- * the offset.
- *
- * For CONFIG_HIGHMEM64G, the pte_addr_t is 64 bits. 52 for the pfn, 12 for
- * the offset.
- */
-#include <linux/mm.h>
-
-static inline void pgtable_add_rmap(struct page * page, struct mm_struct * mm, unsigned long address)
-{
-#ifdef BROKEN_PPC_PTE_ALLOC_ONE
- /* OK, so PPC calls pte_alloc() before mem_map[] is setup ... ;( */
- extern int mem_init_done;
-
- if (!mem_init_done)
- return;
-#endif
- page->mapping = (void *)mm;
- page->index = address & ~((PTRS_PER_PTE * PAGE_SIZE) - 1);
- inc_page_state(nr_page_table_pages);
-}
-
-static inline void pgtable_remove_rmap(struct page * page)
-{
- page->mapping = NULL;
- page->index = 0;
- dec_page_state(nr_page_table_pages);
-}
-
-static inline struct mm_struct * ptep_to_mm(pte_t * ptep)
-{
- struct page * page = kmap_atomic_to_page(ptep);
- return (struct mm_struct *) page->mapping;
-}
-
-static inline unsigned long ptep_to_address(pte_t * ptep)
-{
- struct page * page = kmap_atomic_to_page(ptep);
- unsigned long low_bits;
- low_bits = ((unsigned long)ptep & (PTRS_PER_PTE*sizeof(pte_t) - 1))
- * (PAGE_SIZE/sizeof(pte_t));
- return page->index + low_bits;
-}
-
-#ifdef CONFIG_HIGHPTE
-static inline pte_addr_t ptep_to_paddr(pte_t *ptep)
-{
- pte_addr_t paddr;
- paddr = ((pte_addr_t)page_to_pfn(kmap_atomic_to_page(ptep))) << PAGE_SHIFT;
- return paddr + (pte_addr_t)((unsigned long)ptep & ~PAGE_MASK);
-}
-#else
-static inline pte_addr_t ptep_to_paddr(pte_t *ptep)
-{
- return (pte_addr_t)ptep;
-}
-#endif
-
-#ifndef CONFIG_HIGHPTE
-static inline pte_t *rmap_ptep_map(pte_addr_t pte_paddr)
-{
- return (pte_t *)pte_paddr;
-}
-
-static inline void rmap_ptep_unmap(pte_t *pte)
-{
- return;
-}
-#endif
-
-#endif /* _GENERIC_RMAP_H */
+++ /dev/null
-/* AE-3068 board depend header */
-
-/* TIMER rate define */
-#ifdef H8300_TIMER_DEFINE
-#define H8300_TIMER_COUNT_DATA 20000*10/8192
-#define H8300_TIMER_FREQ 20000*1000/8192
-#endif
-
-/* AE-3068 RTL8019AS Config */
-#ifdef H8300_NE_DEFINE
-
-#define NE2000_ADDR 0x200000
-#define NE2000_IRQ 5
-#define NE2000_BYTE volatile unsigned short
-
-#define WCRL 0xfee023
-#define MAR0A 0xffff20
-#define ETCR0A 0xffff24
-#define DTCR0A 0xffff27
-#define MAR0B 0xffff28
-#define DTCR0B 0xffff2f
-
-#define H8300_INIT_NE() \
-do { \
- wordlength = 1; \
- outb_p(0x48, ioaddr + EN0_DCFG); \
-} while(0)
-
-#endif
+++ /dev/null
-#ifndef _ASM_H8300_CPUMASK_H
-#define _ASM_H8300_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_H8300_CPUMASK_H */
+++ /dev/null
-/* EDOSK2674 board depend header */
-
-/* TIMER rate define */
-#ifdef H8300_TIMER_DEFINE
-#define H8300_TIMER_COUNT_DATA 33000*10/8192
-#define H8300_TIMER_FREQ 33000*1000/8192
-#endif
-
-/* EDOSK-2674R SMSC Network Controler Target Depend impliments */
-#ifdef H8300_SMSC_DEFINE
-
-#define SMSC_BASE 0xf80000
-#define SMSC_IRQ 16
-
-/* sorry quick hack */
-#if defined(outw)
-# undef outw
-#endif
-#define outw(d,a) edosk2674_smsc_outw(d,(volatile unsigned short *)(a))
-#if defined(inw)
-# undef inw
-#endif
-#define inw(a) edosk2674_smsc_inw((volatile unsigned short *)(a))
-#if defined(outsw)
-# undef outsw
-#endif
-#define outsw(a,p,l) edosk2674_smsc_outsw((volatile unsigned short *)(a),p,l)
-#if defined(insw)
-# undef insw
-#endif
-#define insw(a,p,l) edosk2674_smsc_insw((volatile unsigned short *)(a),p,l)
-
-static inline void edosk2674_smsc_outw(
- unsigned short d,
- volatile unsigned short *a
- )
-{
- *a = (d >> 8) | (d << 8);
-}
-
-static inline unsigned short edosk2674_smsc_inw(
- volatile unsigned short *a
- )
-{
- unsigned short d;
- d = *a;
- return (d >> 8) | (d << 8);
-}
-
-static inline void edosk2674_smsc_outsw(
- volatile unsigned short *a,
- unsigned short *p,
- unsigned long l
- )
-{
- for (; l != 0; --l, p++)
- *a = *p;
-}
-
-static inline void edosk2674_smsc_insw(
- volatile unsigned short *a,
- unsigned short *p,
- unsigned long l
- )
-{
- for (; l != 0; --l, p++)
- *p = *a;
-}
-
-#endif
+++ /dev/null
-/* machine depend header */
-
-/* TIMER rate define */
-#ifdef H8300_TIMER_DEFINE
-#include <linux/config.h>
-#if defined(CONFIG_H83007) || defined(CONFIG_H83068) || defined(CONFIG_H8S2678)
-#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8192
-#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192
-#endif
-
-#if defined(CONFIG_H8_3002) || defined(CONFIG_H83048)
-#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8
-#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8
-#endif
-
-#endif
-
+++ /dev/null
-#include <linux/config.h>
-
-#if defined(CONFIG_H83007) || defined(CONFIG_H83068) || defined(CONFIG_H8S2678)
-#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8192
-#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192
-#endif
-
-#if defined(H8_3002) || defined(CONFIG_H83048)
-#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8
-#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8
-#endif
-
-#if !defined(H8300_TIMER_COUNT_DATA)
-#error illigal configuration
-#endif
+++ /dev/null
-/****************************************************************************/
-
-/*
- * h8300_ne.h -- NE2000 in H8/300H Evalution Board.
- *
- * (C) Copyright 2002, Yoshinori Sato <ysato@users.sourceforge.jp>
- */
-
-/****************************************************************************/
-#ifndef h8300ne_h
-#define h8300ne_h
-/****************************************************************************/
-
-#define H8300_NE_DEFINE
-#include <asm/machine-depend.h>
-#define NE2000_IRQ_VECTOR (12 + NE2000_IRQ)
-#undef H8300_NE_DEFINE
-
-/****************************************************************************/
-#endif /* h8300ne_h */
+++ /dev/null
-/****************************************************************************/
-
-/*
- * h8300_smsc.h -- SMSC in H8/300H and H8S Evalution Board.
- *
- * (C) Copyright 2003, Yoshinori Sato <ysato@users.sourceforge.jp>
- */
-
-/****************************************************************************/
-#ifndef h8300smsc_h
-#define h8300smsc_h
-/****************************************************************************/
-
-/* Such a description is OK ? */
-#define H8300_SMSC_DEFINE
-#include <asm/machine-depend.h>
-#undef H8300_SMSC_DEFINE
-
-/****************************************************************************/
-#endif /* h8300smsc_h */
+++ /dev/null
-/* H8MAX board depend header */
-
-/* TIMER rate define */
-#ifdef H8300_TIMER_DEFINE
-#define H8300_TIMER_COUNT_DATA 25000*10/8192
-#define H8300_TIMER_FREQ 25000*1000/8192
-#endif
-
-/* H8MAX RTL8019AS Config */
-#ifdef H8300_NE_DEFINE
-
-#define NE2000_ADDR 0x800600
-#define NE2000_IRQ 4
-#define NE2000_IRQ_VECTOR (12 + NE2000_IRQ)
-#define NE2000_BYTE volatile unsigned short
-
-/* sorry quick hack */
-#if defined(outb)
-# undef outb
-#endif
-#define outb(d,a) h8max_outb((d),(a) - NE2000_ADDR)
-#if defined(inb)
-# undef inb
-#endif
-#define inb(a) h8max_inb((a) - NE2000_ADDR)
-#if defined(outb_p)
-# undef outb_p
-#endif
-#define outb_p(d,a) h8max_outb((d),(a) - NE2000_ADDR)
-#if defined(inb_p)
-# undef inb_p
-#endif
-#define inb_p(a) h8max_inb((a) - NE2000_ADDR)
-#if defined(outsw)
-# undef outsw
-#endif
-#define outsw(a,p,l) h8max_outsw((a) - NE2000_ADDR,(unsigned short *)p,l)
-#if defined(insw)
-# undef insw
-#endif
-#define insw(a,p,l) h8max_insw((a) - NE2000_ADDR,(unsigned short *)p,l)
-#if defined(outsb)
-# undef outsb
-#endif
-#define outsb(a,p,l) h8max_outsb((a) - NE2000_ADDR,(unsigned char *)p,l)
-#if defined(insb)
-# undef insb
-#endif
-#define insb(a,p,l) h8max_insb((a) - NE2000_ADDR,(unsigned char *)p,l)
-
-#define H8300_INIT_NE() \
-do { \
- wordlength = 2; \
- h8max_outb(0x49, ioaddr + EN0_DCFG); \
- SA_prom[14] = SA_prom[15] = 0x57;\
-} while(0)
-
-static inline void h8max_outb(unsigned char d,unsigned char a)
-{
- *(unsigned short *)(NE2000_ADDR + (a << 1)) = d;
-}
-
-static inline unsigned char h8max_inb(unsigned char a)
-{
- return *(unsigned char *)(NE2000_ADDR + (a << 1) +1);
-}
-
-static inline void h8max_outsw(unsigned char a,unsigned short *p,unsigned long l)
-{
- unsigned short d;
- for (; l != 0; --l, p++) {
- d = (((*p) >> 8) & 0xff) | ((*p) << 8);
- *(unsigned short *)(NE2000_ADDR + (a << 1)) = d;
- }
-}
-
-static inline void h8max_insw(unsigned char a,unsigned short *p,unsigned long l)
-{
- unsigned short d;
- for (; l != 0; --l, p++) {
- d = *(unsigned short *)(NE2000_ADDR + (a << 1));
- *p = (d << 8)|((d >> 8) & 0xff);
- }
-}
-
-static inline void h8max_outsb(unsigned char a,unsigned char *p,unsigned long l)
-{
- for (; l != 0; --l, p++) {
- *(unsigned short *)(NE2000_ADDR + (a << 1)) = *p;
- }
-}
-
-static inline void h8max_insb(unsigned char a,unsigned char *p,unsigned long l)
-{
- for (; l != 0; --l, p++) {
- *p = *((unsigned char *)(NE2000_ADDR + (a << 1))+1);
- }
-}
-
-#endif
+++ /dev/null
-#ifndef _H8300_INIT_H
-#define _H8300_INIT_H
-
-#define __init __attribute__ ((__section__ (".text.init")))
-#define __initdata __attribute__ ((__section__ (".data.init")))
-/* For assembly routines */
-#define __INIT .section ".text.init",#alloc,#execinstr
-#define __FINIT .previous
-#define __INITDATA .section ".data.init",#alloc,#write
-
-#endif
+++ /dev/null
-/*
- * include/asm-h8300/linux_logo.h: This is a linux logo
- * to be displayed on boot.
- */
-
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "Linux/m68knommu version " UTS_RELEASE
-
+++ /dev/null
-#ifndef __ASM_SOFTIRQ_H
-#define __ASM_SOFTIRQ_H
-
-#include <linux/preempt.h>
-#include <asm/hardirq.h>
-
-#define local_bh_disable() \
- do { preempt_count() += SOFTIRQ_OFFSET; barrier(); } while (0)
-#define __local_bh_enable() \
- do { barrier(); preempt_count() -= SOFTIRQ_OFFSET; } while (0)
-
-#define local_bh_enable() \
-do { \
- __local_bh_enable(); \
- if (unlikely(!in_interrupt() && softirq_pending(smp_processor_id()))) \
- do_softirq(); \
- preempt_check_resched(); \
-} while (0)
-
-#endif /* __ASM_SOFTIRQ_H */
+++ /dev/null
-#ifndef _ASM_I386_CPUMASK_H
-#define _ASM_I386_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_I386_CPUMASK_H */
+++ /dev/null
-#error "<asm/init.h> should never be used - use <linux/init.h> instead"
+++ /dev/null
-/*
- * include/asm-i386/mach-pc9800/apm.h
- *
- * Machine specific APM BIOS functions for NEC PC9800.
- * Split out from apm.c by Osamu Tomita <tomita@cinet.co.jp>
- */
-
-#ifndef _ASM_APM_H
-#define _ASM_APM_H
-
-#include <linux/apm_bios.h>
-
-#ifdef APM_ZERO_SEGS
-# define APM_DO_ZERO_SEGS \
- "pushl %%ds\n\t" \
- "pushl %%es\n\t" \
- "xorl %%edx, %%edx\n\t" \
- "mov %%dx, %%ds\n\t" \
- "mov %%dx, %%es\n\t" \
- "mov %%dx, %%fs\n\t" \
- "mov %%dx, %%gs\n\t"
-# define APM_DO_POP_SEGS \
- "popl %%es\n\t" \
- "popl %%ds\n\t"
-#else
-# define APM_DO_ZERO_SEGS
-# define APM_DO_POP_SEGS
-#endif
-
-static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in,
- u32 *eax, u32 *ebx, u32 *ecx,
- u32 *edx, u32 *esi)
-{
- /*
- * N.B. We do NOT need a cld after the BIOS call
- * because we always save and restore the flags.
- */
- __asm__ __volatile__(APM_DO_ZERO_SEGS
- "pushl %%edi\n\t"
- "pushl %%ebp\n\t"
- "pushfl\n\t"
- "lcall *%%cs:apm_bios_entry\n\t"
- "setc %%al\n\t"
- "popl %%ebp\n\t"
- "popl %%edi\n\t"
- APM_DO_POP_SEGS
- : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx),
- "=S" (*esi)
- : "a" (func), "b" (ebx_in), "c" (ecx_in)
- : "memory", "cc");
-}
-
-static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in,
- u32 ecx_in, u32 *eax)
-{
- int cx, dx, si;
- u8 error;
-
- /*
- * N.B. We do NOT need a cld after the BIOS call
- * because we always save and restore the flags.
- */
- __asm__ __volatile__(APM_DO_ZERO_SEGS
- "pushl %%edi\n\t"
- "pushl %%ebp\n\t"
- "pushfl\n\t"
- "lcall *%%cs:apm_bios_entry\n\t"
- "setc %%bl\n\t"
- "popl %%ebp\n\t"
- "popl %%edi\n\t"
- APM_DO_POP_SEGS
- : "=a" (*eax), "=b" (error), "=c" (cx), "=d" (dx),
- "=S" (si)
- : "a" (func), "b" (ebx_in), "c" (ecx_in)
- : "memory", "cc");
- if (func == APM_FUNC_VERSION)
- *eax = (*eax & 0xff00) | ((*eax & 0x00f0) >> 4);
-
- return error;
-}
-
-#endif /* _ASM_APM_H */
+++ /dev/null
-#ifndef _MACH_BIOS_EBDA_H
-#define _MACH_BIOS_EBDA_H
-
-/*
- * PC-9800 has no EBDA.
- * Its BIOS uses 0x40E for other purpose,
- * Not pointer to 4K EBDA area.
- */
-static inline unsigned int get_bios_ebda(void)
-{
- return 0; /* 0 means none */
-}
-
-#endif /* _MACH_BIOS_EBDA_H */
+++ /dev/null
-/* defines for inline arch setup functions */
-
-#include <asm/apic.h>
-
-/**
- * do_timer_interrupt_hook - hook into timer tick
- * @regs: standard registers from interrupt
- *
- * Description:
- * This hook is called immediately after the timer interrupt is ack'd.
- * It's primary purpose is to allow architectures that don't possess
- * individual per CPU clocks (like the CPU APICs supply) to broadcast the
- * timer interrupt as a means of triggering reschedules etc.
- **/
-
-static inline void do_timer_interrupt_hook(struct pt_regs *regs)
-{
- do_timer(regs);
-/*
- * In the SMP case we use the local APIC timer interrupt to do the
- * profiling, except when we simulate SMP mode on a uniprocessor
- * system, in that case we have to call the local interrupt handler.
- */
-#ifndef CONFIG_X86_LOCAL_APIC
- x86_do_profile(regs);
-#else
- if (!using_apic_timer)
- smp_local_timer_interrupt(regs);
-#endif
-}
-
-
-/* you can safely undefine this if you don't have the Neptune chipset */
-
-#define BUGGY_NEPTUN_TIMER
-
-/**
- * do_timer_overflow - process a detected timer overflow condition
- * @count: hardware timer interrupt count on overflow
- *
- * Description:
- * This call is invoked when the jiffies count has not incremented but
- * the hardware timer interrupt has. It means that a timer tick interrupt
- * came along while the previous one was pending, thus a tick was missed
- **/
-static inline int do_timer_overflow(int count)
-{
- int i;
-
- spin_lock(&i8259A_lock);
- /*
- * This is tricky when I/O APICs are used;
- * see do_timer_interrupt().
- */
- i = inb(0x00);
- spin_unlock(&i8259A_lock);
-
- /* assumption about timer being IRQ0 */
- if (i & 0x01) {
- /*
- * We cannot detect lost timer interrupts ...
- * well, that's why we call them lost, don't we? :)
- * [hmm, on the Pentium and Alpha we can ... sort of]
- */
- count -= LATCH;
- } else {
-#ifdef BUGGY_NEPTUN_TIMER
- /*
- * for the Neptun bug we know that the 'latch'
- * command doesn't latch the high and low value
- * of the counter atomically. Thus we have to
- * substract 256 from the counter
- * ... funny, isnt it? :)
- */
-
- count -= 256;
-#else
- printk("do_slow_gettimeoffset(): hardware timer problem?\n");
-#endif
- }
- return count;
-}
+++ /dev/null
-/*
- * arch/i386/mach-pc9800/io_ports.h
- *
- * Machine specific IO port address definition for PC-9800.
- * Written by Osamu Tomita <tomita@cinet.co.jp>
- */
-#ifndef _MACH_IO_PORTS_H
-#define _MACH_IO_PORTS_H
-
-/* i8253A PIT registers */
-#define PIT_MODE 0x77
-#define PIT_CH0 0x71
-#define PIT_CH2 0x75
-
-/* i8259A PIC registers */
-#define PIC_MASTER_CMD 0x00
-#define PIC_MASTER_IMR 0x02
-#define PIC_MASTER_ISR PIC_MASTER_CMD
-#define PIC_MASTER_POLL PIC_MASTER_ISR
-#define PIC_MASTER_OCW3 PIC_MASTER_ISR
-#define PIC_SLAVE_CMD 0x08
-#define PIC_SLAVE_IMR 0x0a
-
-/* i8259A PIC related values */
-#define PIC_CASCADE_IR 7
-#define MASTER_ICW4_DEFAULT 0x1d
-#define SLAVE_ICW4_DEFAULT 0x09
-#define PIC_ICW4_AEOI 0x02
-
-#endif /* !_MACH_IO_PORTS_H */
+++ /dev/null
-/*
- * This file should contain #defines for all of the interrupt vector
- * numbers used by this architecture.
- *
- * In addition, there are some standard defines:
- *
- * FIRST_EXTERNAL_VECTOR:
- * The first free place for external interrupts
- *
- * SYSCALL_VECTOR:
- * The IRQ vector a syscall makes the user to kernel transition
- * under.
- *
- * TIMER_IRQ:
- * The IRQ number the timer interrupt comes in at.
- *
- * NR_IRQS:
- * The total number of interrupt vectors (including all the
- * architecture specific interrupts) needed.
- *
- * NR_IRQ_VECTORS:
- * The total number of IO APIC vector inputs
- *
- */
-#ifndef _ASM_IRQ_VECTORS_H
-#define _ASM_IRQ_VECTORS_H
-
-/*
- * IDT vectors usable for external interrupt sources start
- * at 0x20:
- */
-#define FIRST_EXTERNAL_VECTOR 0x20
-
-#define SYSCALL_VECTOR 0x80
-
-/*
- * Vectors 0x20-0x2f are used for ISA interrupts.
- */
-
-/*
- * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
- *
- * some of the following vectors are 'rare', they are merged
- * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
- * TLB, reschedule and local APIC vectors are performance-critical.
- *
- * Vectors 0xf0-0xfa are free (reserved for future Linux use).
- */
-#define SPURIOUS_APIC_VECTOR 0xff
-#define ERROR_APIC_VECTOR 0xfe
-#define INVALIDATE_TLB_VECTOR 0xfd
-#define RESCHEDULE_VECTOR 0xfc
-#define CALL_FUNCTION_VECTOR 0xfb
-
-#define THERMAL_APIC_VECTOR 0xf0
-/*
- * Local APIC timer IRQ vector is on a different priority level,
- * to work around the 'lost local interrupt if more than 2 IRQ
- * sources per level' errata.
- */
-#define LOCAL_TIMER_VECTOR 0xef
-
-/*
- * First APIC vector available to drivers: (vectors 0x30-0xee)
- * we start at 0x31 to spread out vectors evenly between priority
- * levels. (0x80 is the syscall vector)
- */
-#define FIRST_DEVICE_VECTOR 0x31
-#define FIRST_SYSTEM_VECTOR 0xef
-
-#define TIMER_IRQ 0
-
-/*
- * 16 8259A IRQ's, 208 potential APIC interrupt sources.
- * Right now the APIC is mostly only used for SMP.
- * 256 vectors is an architectural limit. (we can have
- * more than 256 devices theoretically, but they will
- * have to use shared interrupts)
- * Since vectors 0x00-0x1f are used/reserved for the CPU,
- * the usable vector space is 0x20-0xff (224 vectors)
- */
-#ifdef CONFIG_X86_IO_APIC
-#define NR_IRQS 224
-#else
-#define NR_IRQS 16
-#endif
-
-#define NR_VECTORS 256
-#define NR_IRQ_VECTORS NR_IRQS
-
-#define FPU_IRQ 8
-
-#define FIRST_VM86_IRQ 2
-#define LAST_VM86_IRQ 15
-#define invalid_vm86_irq(irq) ((irq) < 2 || (irq) == 7 || (irq) > 15)
-
-#endif /* _ASM_IRQ_VECTORS_H */
-
-
+++ /dev/null
-/*
- * arch/i386/mach-pc9800/mach_reboot.h
- *
- * Machine specific reboot functions for PC-9800.
- * Written by Osamu Tomita <tomita@cinet.co.jp>
- */
-#ifndef _MACH_REBOOT_H
-#define _MACH_REBOOT_H
-
-#ifdef CMOS_WRITE
-#undef CMOS_WRITE
-#define CMOS_WRITE(a,b) do{}while(0)
-#endif
-
-static inline void mach_reboot(void)
-{
- outb(0, 0xf0); /* signal CPU reset */
- mdelay(1);
-}
-
-#endif /* !_MACH_REBOOT_H */
+++ /dev/null
-/*
- * include/asm-i386/mach-pc9800/mach_time.h
- *
- * Machine specific set RTC function for PC-9800.
- * Written by Osamu Tomita <tomita@cinet.co.jp>
- */
-#ifndef _MACH_TIME_H
-#define _MACH_TIME_H
-
-#include <linux/bcd.h>
-#include <linux/upd4990a.h>
-
-/* for check timing call set_rtc_mmss() */
-/* used in arch/i386/time.c::do_timer_interrupt() */
-/*
- * Because PC-9800's RTC (NEC uPD4990A) does not allow setting
- * time partially, we always have to read-modify-write the
- * entire time (including year) so that set_rtc_mmss() will
- * take quite much time to execute. You may want to relax
- * RTC resetting interval (currently ~11 minuts)...
- */
-#define USEC_AFTER 1000000
-#define USEC_BEFORE 0
-
-static inline int mach_set_rtc_mmss(unsigned long nowtime)
-{
- int retval = 0;
- int real_seconds, real_minutes, cmos_minutes;
- struct upd4990a_raw_data data;
-
- upd4990a_get_time(&data, 1);
- cmos_minutes = BCD2BIN(data.min);
-
- /*
- * since we're only adjusting minutes and seconds,
- * don't interfere with hour overflow. This avoids
- * messing with unknown time zones but requires your
- * RTC not to be off by more than 15 minutes
- */
- real_seconds = nowtime % 60;
- real_minutes = nowtime / 60;
- if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
- real_minutes += 30; /* correct for half hour time zone */
- real_minutes %= 60;
-
- if (abs(real_minutes - cmos_minutes) < 30) {
- u8 temp_seconds = (real_seconds / 10) * 16 + real_seconds % 10;
- u8 temp_minutes = (real_minutes / 10) * 16 + real_minutes % 10;
-
- if (data.sec != temp_seconds || data.min != temp_minutes) {
- data.sec = temp_seconds;
- data.min = temp_minutes;
- upd4990a_set_time(&data, 1);
- }
- } else {
- printk(KERN_WARNING
- "set_rtc_mmss: can't update from %d to %d\n",
- cmos_minutes, real_minutes);
- retval = -1;
- }
-
- /* uPD4990A users' manual says we should issue Register Hold
- * command after reading time, or future Time Read command
- * may not work. When we have set the time, this also starts
- * the clock.
- */
- upd4990a_serial_command(UPD4990A_REGISTER_HOLD);
-
- return retval;
-}
-
-static inline unsigned long mach_get_cmos_time(void)
-{
- int i;
- u8 prev, cur;
- unsigned int year;
- struct upd4990a_raw_data data;
-
- /* Connect uPD4990A's DATA OUT pin to its 1Hz reference clock. */
- upd4990a_serial_command(UPD4990A_REGISTER_HOLD);
-
- /* Catch rising edge of reference clock. */
- prev = ~UPD4990A_READ_DATA();
- for (i = 0; i < 1800000; i++) { /* may take up to 1 second... */
- __asm__ ("outb %%al,%0" : : "N" (0x5f)); /* 0.6usec delay */
- cur = UPD4990A_READ_DATA();
- if (!(prev & cur & 1))
- break;
- prev = ~cur;
- }
-
- upd4990a_get_time(&data, 0);
-
- if ((year = BCD2BIN(data.year) + 1900) < 1995)
- year += 100;
- return mktime(year, data.mon, BCD2BIN(data.mday), BCD2BIN(data.hour),
- BCD2BIN(data.min), BCD2BIN(data.sec));
-}
-
-#endif /* !_MACH_TIME_H */
+++ /dev/null
-/*
- * include/asm-i386/mach-pc9800/mach_timer.h
- *
- * Machine specific calibrate_tsc() for PC-9800.
- * Written by Osamu Tomita <tomita@cinet.co.jp>
- */
-/* ------ Calibrate the TSC -------
- * PC-9800:
- * CTC cannot be used because some models (especially
- * note-machines) may disable clock to speaker channel (#1)
- * unless speaker is enabled. We use ARTIC instead.
- */
-#ifndef _MACH_TIMER_H
-#define _MACH_TIMER_H
-
-#define CALIBRATE_LATCH (5 * 307200/HZ) /* 0.050sec * 307200Hz = 15360 */
-
-static inline void mach_prepare_counter(void)
-{
- /* ARTIC can't be stopped nor reset. So we wait roundup. */
- while (inw(0x5c));
-}
-
-static inline void mach_countup(unsigned long *count)
-{
- do {
- *count = inw(0x5c);
- } while (*count < CALIBRATE_LATCH);
-}
-
-#endif /* !_MACH_TIMER_H */
+++ /dev/null
-/*
- * include/asm-i386/mach-pc9800/mach_traps.h
- *
- * Machine specific NMI handling for PC-9800.
- * Written by Osamu Tomita <tomita@cinet.co.jp>
- */
-#ifndef _MACH_TRAPS_H
-#define _MACH_TRAPS_H
-
-static inline void clear_mem_error(unsigned char reason)
-{
- outb(0x08, 0x37);
- outb(0x09, 0x37);
-}
-
-static inline unsigned char get_nmi_reason(void)
-{
- return (inb(0x33) & 6) ? 0x80 : 0;
-}
-
-static inline void reassert_nmi(void)
-{
- outb(0x09, 0x50); /* disable NMI once */
- outb(0x09, 0x52); /* re-enable it */
-}
-
-#endif /* !_MACH_TRAPS_H */
+++ /dev/null
-#ifndef __ASM_MACH_WAKECPU_H
-#define __ASM_MACH_WAKECPU_H
-
-/*
- * This file copes with machines that wakeup secondary CPUs by the
- * INIT, INIT, STARTUP sequence.
- */
-
-#define WAKE_SECONDARY_VIA_INIT
-
-/*
- * On PC-9800, continuation on warm reset is done by loading
- * %ss:%sp from 0x0000:0404 and executing 'lret', so:
- */
-#define TRAMPOLINE_LOW phys_to_virt(0x4fa)
-#define TRAMPOLINE_HIGH phys_to_virt(0x4fc)
-
-#define boot_cpu_apicid boot_cpu_physical_apicid
-
-static inline void wait_for_init_deassert(atomic_t *deassert)
-{
- while (!atomic_read(deassert));
- return;
-}
-
-/* Nothing to do for most platforms, since cleared by the INIT cycle */
-static inline void smp_callin_clear_local_apic(void)
-{
-}
-
-static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
-{
-}
-
-static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
-{
-}
-
-#if APIC_DEBUG
- #define inquire_remote_apic(apicid) __inquire_remote_apic(apicid)
-#else
- #define inquire_remote_apic(apicid) {}
-#endif
-
-#endif /* __ASM_MACH_WAKECPU_H */
+++ /dev/null
-/*
- * PCI BIOS function codes for the PC9800. Different to
- * standard PC systems
- */
-
-/* Note: PC-9800 confirms PCI 2.1 on only few models */
-
-#define PCIBIOS_PCI_FUNCTION_ID 0xccXX
-#define PCIBIOS_PCI_BIOS_PRESENT 0xcc81
-#define PCIBIOS_FIND_PCI_DEVICE 0xcc82
-#define PCIBIOS_FIND_PCI_CLASS_CODE 0xcc83
-/* PCIBIOS_GENERATE_SPECIAL_CYCLE 0xcc86 (not supported by bios) */
-#define PCIBIOS_READ_CONFIG_BYTE 0xcc88
-#define PCIBIOS_READ_CONFIG_WORD 0xcc89
-#define PCIBIOS_READ_CONFIG_DWORD 0xcc8a
-#define PCIBIOS_WRITE_CONFIG_BYTE 0xcc8b
-#define PCIBIOS_WRITE_CONFIG_WORD 0xcc8c
-#define PCIBIOS_WRITE_CONFIG_DWORD 0xcc8d
-#define PCIBIOS_GET_ROUTING_OPTIONS 0xcc8e /* PCI 2.1 only */
-#define PCIBIOS_SET_PCI_HW_INT 0xcc8f /* PCI 2.1 only */
+++ /dev/null
-/**
- * machine_specific_memory_setup - Hook for machine specific memory setup.
- *
- * Description:
- * This is included late in kernel/setup.c so that it can make
- * use of all of the static functions.
- **/
-
-static inline char * __init machine_specific_memory_setup(void)
-{
- char *who;
- unsigned long low_mem_size, lower_high, higher_high;
-
-
- who = "BIOS (common area)";
-
- low_mem_size = ((*(unsigned char *)__va(PC9800SCA_BIOS_FLAG) & 7) + 1) << 17;
- add_memory_region(0, low_mem_size, 1);
- lower_high = (__u32) *(__u8 *) bus_to_virt(PC9800SCA_EXPMMSZ) << 17;
- higher_high = (__u32) *(__u16 *) bus_to_virt(PC9800SCA_MMSZ16M) << 20;
- if (lower_high != 0x00f00000UL) {
- add_memory_region(HIGH_MEMORY, lower_high, 1);
- add_memory_region(0x01000000UL, higher_high, 1);
- }
- else
- add_memory_region(HIGH_MEMORY, lower_high + higher_high, 1);
-
- return who;
-}
+++ /dev/null
-/* Hook to call BIOS initialisation function */
-
-/* no action for generic */
-
-#define ARCH_SETUP arch_setup_pc9800();
-
-#include <linux/timex.h>
-#include <asm/io.h>
-#include <asm/pc9800.h>
-#include <asm/pc9800_sca.h>
-
-int CLOCK_TICK_RATE;
-extern unsigned long tick_usec; /* ACTHZ period (usec) */
-extern unsigned long tick_nsec; /* USER_HZ period (nsec) */
-unsigned char pc9800_misc_flags;
-/* (bit 0) 1:High Address Video ram exists 0:otherwise */
-
-#ifdef CONFIG_SMP
-#define MPC_TABLE_SIZE 512
-#define MPC_TABLE ((char *) (PARAM+0x400))
-char mpc_table[MPC_TABLE_SIZE];
-#endif
-
-static inline void arch_setup_pc9800(void)
-{
- CLOCK_TICK_RATE = PC9800_8MHz_P() ? 1996800 : 2457600;
- printk(KERN_DEBUG "CLOCK_TICK_RATE = %d\n", CLOCK_TICK_RATE);
- tick_usec = TICK_USEC; /* USER_HZ period (usec) */
- tick_nsec = TICK_NSEC; /* ACTHZ period (nsec) */
-
- pc9800_misc_flags = PC9800_MISC_FLAGS;
-#ifdef CONFIG_SMP
- if ((*(u32 *)(MPC_TABLE)) == 0x504d4350)
- memcpy(mpc_table, MPC_TABLE, *(u16 *)(MPC_TABLE + 4));
-#endif /* CONFIG_SMP */
-}
+++ /dev/null
-/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws
- * which needs to alter them. */
-
-static inline void smpboot_clear_io_apic_irqs(void)
-{
- io_apic_irqs = 0;
-}
-
-static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
-{
- /* reset code is stored in 8255 on PC-9800. */
- outb(0x0e, 0x37); /* SHUT0 = 0 */
- local_flush_tlb();
- Dprintk("1.\n");
- *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4;
- Dprintk("2.\n");
- *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf;
- Dprintk("3.\n");
- /*
- * On PC-9800, continuation on warm reset is done by loading
- * %ss:%sp from 0x0000:0404 and executing 'lret', so:
- */
- /* 0x3f0 is on unused interrupt vector and should be safe... */
- *((volatile unsigned long *) phys_to_virt(0x404)) = 0x000003f0;
- Dprintk("4.\n");
-}
-
-static inline void smpboot_restore_warm_reset_vector(void)
-{
- /*
- * Install writable page 0 entry to set BIOS data area.
- */
- local_flush_tlb();
-
- /*
- * Paranoid: Set warm reset code and vector here back
- * to default values.
- */
- outb(0x0f, 0x37); /* SHUT0 = 1 */
-
- *((volatile long *) phys_to_virt(0x404)) = 0;
-}
-
-static inline void smpboot_setup_io_apic(void)
-{
- /*
- * Here we can be sure that there is an IO-APIC in the system. Let's
- * go and set it up:
- */
- if (!skip_ioapic_setup && nr_ioapics)
- setup_IO_APIC();
-}
+++ /dev/null
-/*
- * PC-9800 machine types.
- *
- * Copyright (C) 1999 TAKAI Kosuke <tak@kmc.kyoto-u.ac.jp>
- * (Linux/98 Project)
- */
-
-#ifndef _ASM_PC9800_H_
-#define _ASM_PC9800_H_
-
-#include <asm/pc9800_sca.h>
-#include <asm/types.h>
-
-#define __PC9800SCA(type, pa) (*(type *) phys_to_virt(pa))
-#define __PC9800SCA_TEST_BIT(pa, n) \
- ((__PC9800SCA(u8, pa) & (1U << (n))) != 0)
-
-#define PC9800_HIGHRESO_P() __PC9800SCA_TEST_BIT(PC9800SCA_BIOS_FLAG, 3)
-#define PC9800_8MHz_P() __PC9800SCA_TEST_BIT(PC9800SCA_BIOS_FLAG, 7)
-
- /* 0x2198 is 98 21 on memory... */
-#define PC9800_9821_P() (__PC9800SCA(u16, PC9821SCA_ROM_ID) == 0x2198)
-
-/* Note PC9821_...() are valid only when PC9800_9821_P() was true. */
-#define PC9821_IDEIF_DOUBLE_P() __PC9800SCA_TEST_BIT(PC9821SCA_ROM_FLAG4, 4)
-
-#endif
+++ /dev/null
-/*
- * System-common area definitions for NEC PC-9800 series
- *
- * Copyright (C) 1999 TAKAI Kousuke <tak@kmc.kyoto-u.ac.jp>,
- * Kyoto University Microcomputer Club.
- */
-
-#ifndef _ASM_I386_PC9800SCA_H_
-#define _ASM_I386_PC9800SCA_H_
-
-#define PC9800SCA_EXPMMSZ (0x0401) /* B */
-#define PC9800SCA_SCSI_PARAMS (0x0460) /* 8 * 4B */
-#define PC9800SCA_DISK_EQUIPS (0x0482) /* B */
-#define PC9800SCA_XROM_ID (0x04C0) /* 52B */
-#define PC9800SCA_BIOS_FLAG (0x0501) /* B */
-#define PC9800SCA_MMSZ16M (0x0594) /* W */
-
-/* PC-9821 have additional system common area in their BIOS-ROM segment. */
-
-#define PC9821SCA__BASE (0xF8E8 << 4)
-#define PC9821SCA_ROM_ID (PC9821SCA__BASE + 0x00)
-#define PC9821SCA_ROM_FLAG4 (PC9821SCA__BASE + 0x05)
-#define PC9821SCA_RSFLAGS (PC9821SCA__BASE + 0x11) /* B */
-
-#endif /* !_ASM_I386_PC9800SCA_H_ */
+++ /dev/null
-#ifndef _I386_RMAP_H
-#define _I386_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#ifdef CONFIG_HIGHPTE
-static inline pte_t *rmap_ptep_map(pte_addr_t pte_paddr)
-{
- unsigned long pfn = (unsigned long)(pte_paddr >> PAGE_SHIFT);
- unsigned long off = ((unsigned long)pte_paddr) & ~PAGE_MASK;
- return (pte_t *)((char *)kmap_atomic(pfn_to_page(pfn), KM_PTE2) + off);
-}
-
-static inline void rmap_ptep_unmap(pte_t *pte)
-{
- kunmap_atomic(pte, KM_PTE2);
-}
-#endif
-
-#endif
+++ /dev/null
-/*
- * include/asm-i386/std_resources.h
- */
-
-#ifndef __ASM_I386_STD_RESOURCES_H
-#define __ASM_I386_STD_RESOURCES_H
-
-#include <linux/init.h>
-
-void probe_roms(void) __init;
-void request_graphics_resource(void) __init;
-void request_standard_io_resources(void) __init;
-
-#endif
+++ /dev/null
-/*
- * Architecture dependent definitions
- * for NEC uPD4990A serial I/O real-time clock.
- *
- * Copyright 2001 TAKAI Kousuke <tak@kmc.kyoto-u.ac.jp>
- * Kyoto University Microcomputer Club (KMC).
- *
- * References:
- * uPD4990A serial I/O real-time clock users' manual (Japanese)
- * No. S12828JJ4V0UM00 (4th revision), NEC Corporation, 1999.
- */
-
-#ifndef _ASM_I386_uPD4990A_H
-#define _ASM_I386_uPD4990A_H
-
-#include <asm/io.h>
-
-#define UPD4990A_IO (0x0020)
-#define UPD4990A_IO_DATAOUT (0x0033)
-
-#define UPD4990A_OUTPUT_DATA_CLK(data, clk) \
- outb((((data) & 1) << 5) | (((clk) & 1) << 4) \
- | UPD4990A_PAR_SERIAL_MODE, UPD4990A_IO)
-
-#define UPD4990A_OUTPUT_CLK(clk) UPD4990A_OUTPUT_DATA_CLK(0, (clk))
-
-#define UPD4990A_OUTPUT_STROBE(stb) \
- outb(((stb) << 3) | UPD4990A_PAR_SERIAL_MODE, UPD4990A_IO)
-
-/*
- * Note: udelay() is *not* usable for UPD4990A_DELAY because
- * the Linux kernel reads uPD4990A to set up system clock
- * before calibrating delay...
- */
-#define UPD4990A_DELAY(usec) \
- do { \
- if (__builtin_constant_p((usec)) && (usec) < 5) \
- __asm__ (".rept %c1\n\toutb %%al,%0\n\t.endr" \
- : : "N" (0x5F), \
- "i" (((usec) * 10 + 5) / 6)); \
- else { \
- int _count = ((usec) * 10 + 5) / 6; \
- __asm__ volatile ("1: outb %%al,%1\n\tloop 1b" \
- : "=c" (_count) \
- : "N" (0x5F), "0" (_count)); \
- } \
- } while (0)
-
-/* Caller should ignore all bits except bit0 */
-#define UPD4990A_READ_DATA() inb(UPD4990A_IO_DATAOUT)
-
-#endif
+++ /dev/null
-#ifndef _ASM_IA64_CPUMASK_H
-#define _ASM_IA64_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_IA64_CPUMASK_H */
+++ /dev/null
-#ifndef _ASM_IA64_RMAP_H
-#define _ASM_IA64_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#endif /* _ASM_IA64_RMAP_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_CDL_H
-#define _ASM_IA64_SN_CDL_H
-
-#ifdef __KERNEL__
-#include <asm/sn/sgi.h>
-#endif
-
-struct cdl {
- int part_num; /* Part part number */
- int mfg_num; /* Part MFG number */
- int (*attach)(vertex_hdl_t); /* Attach routine */
-};
-
-
-/*
- * cdl: connection/driver list
- *
- * support code for bus infrastructure for busses
- * that have self-identifying devices; initially
- * constructed for xtalk, pciio and gioio modules.
- */
-typedef struct cdl *cdl_p;
-
-/*
- * cdl_add_connpt: add a connection point
- *
- * Calls the attach routines of all the drivers on
- * the list that match this connection point, in
- * the order that they were added to the list.
- */
-extern int cdl_add_connpt(int key1,
- int key2,
- vertex_hdl_t conn,
- int drv_flags);
-#endif /* _ASM_IA64_SN_CDL_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_DMAMAP_H
-#define _ASM_IA64_SN_DMAMAP_H
-
-/*
- * Definitions for allocating, freeing, and using DMA maps
- */
-
-/*
- * DMA map types
- */
-#define DMA_SCSI 0
-#define DMA_A24VME 1 /* Challenge/Onyx only */
-#define DMA_A32VME 2 /* Challenge/Onyx only */
-#define DMA_A64VME 3 /* SN0/Racer */
-
-#define DMA_EISA 4
-
-#define DMA_PCI32 5 /* SN0/Racer */
-#define DMA_PCI64 6 /* SN0/Racer */
-
-/*
- * DMA map structure as returned by dma_mapalloc()
- */
-typedef struct dmamap {
- int dma_type; /* Map type (see above) */
- int dma_adap; /* I/O adapter */
- int dma_index; /* Beginning map register to use */
- int dma_size; /* Number of map registers to use */
- paddr_t dma_addr; /* Corresponding bus addr for A24/A32 */
- unsigned long dma_virtaddr; /* Beginning virtual address that is mapped */
-} dmamap_t;
-
-/* standard flags values for pio_map routines,
- * including {xtalk,pciio}_dmamap calls.
- * NOTE: try to keep these in step with PIOMAP flags.
- */
-#define DMAMAP_FIXED 0x1
-#define DMAMAP_NOSLEEP 0x2
-#define DMAMAP_INPLACE 0x4
-
-#define DMAMAP_FLAGS 0x7
-
-#endif /* _ASM_IA64_SN_DMAMAP_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_DRIVER_H
-#define _ASM_IA64_SN_DRIVER_H
-
-#include <asm/sn/sgi.h>
-#include <asm/types.h>
-
-/*
-** Interface for device driver handle management.
-**
-** These functions are mostly for use by the loadable driver code, and
-** for use by I/O bus infrastructure code.
-*/
-
-typedef struct device_driver_s *device_driver_t;
-
-/* == Driver thread priority support == */
-typedef int ilvl_t;
-
-struct eframe_s;
-struct piomap;
-struct dmamap;
-
-typedef unsigned long iobush_t;
-
-/* interrupt function */
-typedef void *intr_arg_t;
-typedef void intr_func_f(intr_arg_t);
-typedef intr_func_f *intr_func_t;
-
-#define INTR_ARG(n) ((intr_arg_t)(__psunsigned_t)(n))
-
-/* system interrupt resource handle -- returned from intr_alloc */
-typedef struct intr_s *intr_t;
-#define INTR_HANDLE_NONE ((intr_t)0)
-
-/*
- * restore interrupt level value, returned from intr_block_level
- * for use with intr_unblock_level.
- */
-typedef void *rlvl_t;
-
-
-/*
- * A basic, platform-independent description of I/O requirements for
- * a device. This structure is usually formed by lboot based on information
- * in configuration files. It contains information about PIO, DMA, and
- * interrupt requirements for a specific instance of a device.
- *
- * The pio description is currently unused.
- *
- * The dma description describes bandwidth characteristics and bandwidth
- * allocation requirements. (TBD)
- *
- * The Interrupt information describes the priority of interrupt, desired
- * destination, policy (TBD), whether this is an error interrupt, etc.
- * For now, interrupts are targeted to specific CPUs.
- */
-
-typedef struct device_desc_s {
- /* pio description (currently none) */
-
- /* dma description */
- /* TBD: allocated badwidth requirements */
-
- /* interrupt description */
- vertex_hdl_t intr_target; /* Hardware locator string */
- int intr_policy; /* TBD */
- ilvl_t intr_swlevel; /* software level for blocking intr */
- char *intr_name; /* name of interrupt, if any */
-
- int flags;
-} *device_desc_t;
-
-/* flag values */
-#define D_INTR_ISERR 0x1 /* interrupt is for error handling */
-#define D_IS_ASSOC 0x2 /* descriptor is associated with a dev */
-#define D_INTR_NOTHREAD 0x4 /* Interrupt handler isn't threaded. */
-
-#define INTR_SWLEVEL_NOTHREAD_DEFAULT 0 /* Default
- * Interrupt level in case of
- * non-threaded interrupt
- * handlers
- */
-#endif /* _ASM_IA64_SN_DRIVER_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_HCL_H
-#define _ASM_IA64_SN_HCL_H
-
-#include <linux/fs.h>
-#include <asm/sn/sgi.h>
-
-extern vertex_hdl_t hwgraph_root;
-extern vertex_hdl_t linux_busnum;
-
-void hwgraph_debug(char *, const char *, int, vertex_hdl_t, vertex_hdl_t, char *, ...);
-
-#if 1
-#define HWGRAPH_DEBUG(args...) hwgraph_debug(args)
-#else
-#define HWGRAPH_DEBUG(args)
-#endif
-
-typedef long labelcl_info_place_t;
-typedef long arbitrary_info_t;
-typedef long arb_info_desc_t;
-
-
-/*
- * Reserve room in every vertex for 2 pieces of fast access indexed information
- * Note that we do not save a pointer to the bdevsw or cdevsw[] tables anymore.
- */
-#define HWGRAPH_NUM_INDEX_INFO 2 /* MAX Entries */
-#define HWGRAPH_CONNECTPT 0 /* connect point (aprent) */
-#define HWGRAPH_FASTINFO 1 /* callee's private handle */
-
-/*
- * Reserved edge_place_t values, used as the "place" parameter to edge_get_next.
- * Every vertex in the hwgraph has up to 2 *implicit* edges. There is an implicit
- * edge called "." that points to the current vertex. There is an implicit edge
- * called ".." that points to the vertex' connect point.
- */
-#define EDGE_PLACE_WANT_CURRENT 0 /* "." */
-#define EDGE_PLACE_WANT_CONNECTPT 1 /* ".." */
-#define EDGE_PLACE_WANT_REAL_EDGES 2 /* Get the first real edge */
-#define HWGRAPH_RESERVED_PLACES 2
-
-
-/*
- * Special pre-defined edge labels.
- */
-#define HWGRAPH_EDGELBL_HW "hw"
-#define HWGRAPH_EDGELBL_DOT "."
-#define HWGRAPH_EDGELBL_DOTDOT ".."
-
-#include <asm/sn/labelcl.h>
-#define hwgraph_fastinfo_set(a,b) labelcl_info_replace_IDX(a, HWGRAPH_FASTINFO, b, NULL)
-#define hwgraph_connectpt_set labelcl_info_connectpt_set
-#define hwgraph_generate_path hwgfs_generate_path
-#define hwgraph_path_to_vertex(a) hwgfs_find_handle(NULL, a, 0, 0, 0, 1)
-#define hwgraph_vertex_unref(a)
-
-/*
- * External declarations of EXPORTED SYMBOLS in hcl.c
- */
-extern vertex_hdl_t hwgraph_register(vertex_hdl_t, const char *,
- unsigned int, unsigned int, unsigned int, unsigned int,
- umode_t, uid_t, gid_t, struct file_operations *, void *);
-
-extern int hwgraph_mk_symlink(vertex_hdl_t, const char *, unsigned int,
- unsigned int, const char *, unsigned int, vertex_hdl_t *, void *);
-
-extern int hwgraph_vertex_destroy(vertex_hdl_t);
-
-extern int hwgraph_edge_add(vertex_hdl_t, vertex_hdl_t, char *);
-extern int hwgraph_edge_get(vertex_hdl_t, char *, vertex_hdl_t *);
-
-extern arbitrary_info_t hwgraph_fastinfo_get(vertex_hdl_t);
-extern vertex_hdl_t hwgraph_mk_dir(vertex_hdl_t, const char *, unsigned int, void *);
-
-extern int hwgraph_connectpt_set(vertex_hdl_t, vertex_hdl_t);
-extern vertex_hdl_t hwgraph_connectpt_get(vertex_hdl_t);
-extern int hwgraph_edge_get_next(vertex_hdl_t, char *, vertex_hdl_t *, unsigned int *);
-
-extern graph_error_t hwgraph_traverse(vertex_hdl_t, char *, vertex_hdl_t *);
-
-extern int hwgraph_vertex_get_next(vertex_hdl_t *, vertex_hdl_t *);
-extern int hwgraph_path_add(vertex_hdl_t, char *, vertex_hdl_t *);
-extern vertex_hdl_t hwgraph_path_to_dev(char *);
-extern vertex_hdl_t hwgraph_block_device_get(vertex_hdl_t);
-extern vertex_hdl_t hwgraph_char_device_get(vertex_hdl_t);
-extern graph_error_t hwgraph_char_device_add(vertex_hdl_t, char *, char *, vertex_hdl_t *);
-extern int hwgraph_path_add(vertex_hdl_t, char *, vertex_hdl_t *);
-extern int hwgraph_info_add_LBL(vertex_hdl_t, char *, arbitrary_info_t);
-extern int hwgraph_info_get_LBL(vertex_hdl_t, char *, arbitrary_info_t *);
-extern int hwgraph_info_replace_LBL(vertex_hdl_t, char *, arbitrary_info_t,
- arbitrary_info_t *);
-extern int hwgraph_info_get_exported_LBL(vertex_hdl_t, char *, int *, arbitrary_info_t *);
-extern int hwgraph_info_get_next_LBL(vertex_hdl_t, char *, arbitrary_info_t *,
- labelcl_info_place_t *);
-extern int hwgraph_info_export_LBL(vertex_hdl_t, char *, int);
-extern int hwgraph_info_unexport_LBL(vertex_hdl_t, char *);
-extern int hwgraph_info_remove_LBL(vertex_hdl_t, char *, arbitrary_info_t *);
-extern char *vertex_to_name(vertex_hdl_t, char *, unsigned int);
-
-#endif /* _ASM_IA64_SN_HCL_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_IA64_SN_HCL_UTIL_H
-#define _ASM_IA64_SN_HCL_UTIL_H
-
-#include <asm/sn/sgi.h>
-
-extern char * dev_to_name(vertex_hdl_t, char *, unsigned int);
-extern int device_master_set(vertex_hdl_t, vertex_hdl_t);
-extern vertex_hdl_t device_master_get(vertex_hdl_t);
-extern cnodeid_t master_node_get(vertex_hdl_t);
-extern cnodeid_t nodevertex_to_cnodeid(vertex_hdl_t);
-extern void mark_nodevertex_as_node(vertex_hdl_t, cnodeid_t);
-
-#endif /* _ASM_IA64_SN_HCL_UTIL_H */
+++ /dev/null
-#ifndef _ASM_IA64_SN_HWGFS_H
-#define _ASM_IA64_SN_HWGFS_H
-
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <asm/types.h>
-
-typedef struct dentry *hwgfs_handle_t;
-
-extern hwgfs_handle_t hwgfs_register(hwgfs_handle_t dir, const char *name,
- unsigned int flags,
- unsigned int major, unsigned int minor,
- umode_t mode, void *ops, void *info);
-extern int hwgfs_mk_symlink(hwgfs_handle_t dir, const char *name,
- unsigned int flags, const char *link,
- hwgfs_handle_t *handle, void *info);
-extern hwgfs_handle_t hwgfs_mk_dir(hwgfs_handle_t dir, const char *name,
- void *info);
-extern void hwgfs_unregister(hwgfs_handle_t de);
-
-extern hwgfs_handle_t hwgfs_find_handle(hwgfs_handle_t dir, const char *name,
- unsigned int major,unsigned int minor,
- char type, int traverse_symlinks);
-extern hwgfs_handle_t hwgfs_get_parent(hwgfs_handle_t de);
-extern int hwgfs_generate_path(hwgfs_handle_t de, char *path, int buflen);
-
-extern void *hwgfs_get_info(hwgfs_handle_t de);
-extern int hwgfs_set_info(hwgfs_handle_t de, void *info);
-
-#endif /* _ASM_IA64_SN_HWGFS_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_IA64_SN_IFCONFIG_NET_H
-#define _ASM_IA64_SN_IFCONFIG_NET_H
-
-#define NETCONFIG_FILE "/tmp/ifconfig_net"
-#define POUND_CHAR '#'
-#define MAX_LINE_LEN 128
-#define MAXPATHLEN 128
-
-struct ifname_num {
- long next_eth;
- long next_fddi;
- long next_hip;
- long next_tr;
- long next_fc;
- long size;
-};
-
-struct ifname_MAC {
- char name[16];
- unsigned char dev_addr[7];
- unsigned char addr_len; /* hardware address length */
-};
-
-#endif /* _ASM_IA64_SN_IFCONFIG_NET_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2002-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-
-#ifndef _ASM_IA64_SN_IOC4_H
-#define _ASM_IA64_SN_IOC4_H
-
-/*
- * Bytebus device space
- */
-#define IOC4_BYTEBUS_DEV0 0x80000L /* Addressed using pci_bar0 */
-#define IOC4_BYTEBUS_DEV1 0xA0000L /* Addressed using pci_bar0 */
-#define IOC4_BYTEBUS_DEV2 0xC0000L /* Addressed using pci_bar0 */
-#define IOC4_BYTEBUS_DEV3 0xE0000L /* Addressed using pci_bar0 */
-
-#endif /* _ASM_IA64_SN_IOC4_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-
-#ifndef _ASM_IA64_SN_IOCONFIG_BUS_H
-#define _ASM_IA64_SN_IOCONFIG_BUS_H
-
-#define IOCONFIG_PCIBUS "/boot/efi/ioconfig_pcibus"
-#define POUND_CHAR '#'
-#define MAX_LINE_LEN 128
-#define MAXPATHLEN 128
-
-struct ioconfig_parm {
- unsigned long ioconfig_activated;
- unsigned long number;
- void *buffer;
-};
-
-struct ascii_moduleid {
- unsigned char io_moduleid[8]; /* pci path name */
-};
-
-#endif /* _ASM_IA64_SN_IOCONFIG_BUS_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_IOERROR_H
-#define _ASM_IA64_SN_IOERROR_H
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-#include <asm/sn/types.h>
-
-/*
- * Macros defining the various Errors to be handled as part of
- * IO Error handling.
- */
-
-/*
- * List of errors to be handled by each subsystem.
- * "error_code" field will take one of these values.
- * The error code is built up of single bits expressing
- * our confidence that the error was that type; note
- * that it is possible to have a PIO or DMA error where
- * we don't know whether it was a READ or a WRITE, or
- * even a READ or WRITE error that we're not sure whether
- * to call a PIO or DMA.
- *
- * It is also possible to set both PIO and DMA, and possible
- * to set both READ and WRITE; the first may be nonsensical
- * but the second *could* be used to designate an access
- * that is known to be a read-modify-write cycle. It is
- * quite possible that nobody will ever use PIO|DMA or
- * READ|WRITE ... but being flexible is good.
- */
-#define IOECODE_UNSPEC 0
-#define IOECODE_READ 1
-#define IOECODE_WRITE 2
-#define IOECODE_PIO 4
-#define IOECODE_DMA 8
-
-#define IOECODE_PIO_READ (IOECODE_PIO|IOECODE_READ)
-#define IOECODE_PIO_WRITE (IOECODE_PIO|IOECODE_WRITE)
-#define IOECODE_DMA_READ (IOECODE_DMA|IOECODE_READ)
-#define IOECODE_DMA_WRITE (IOECODE_DMA|IOECODE_WRITE)
-
-/* support older names, but try to move everything
- * to using new names that identify which package
- * controls their values ...
- */
-#define PIO_READ_ERROR IOECODE_PIO_READ
-#define PIO_WRITE_ERROR IOECODE_PIO_WRITE
-#define DMA_READ_ERROR IOECODE_DMA_READ
-#define DMA_WRITE_ERROR IOECODE_DMA_WRITE
-
-/*
- * List of error numbers returned by error handling sub-system.
- */
-
-#define IOERROR_HANDLED 0 /* Error Properly handled. */
-#define IOERROR_NODEV 0x1 /* No such device attached */
-#define IOERROR_BADHANDLE 0x2 /* Received bad handle */
-#define IOERROR_BADWIDGETNUM 0x3 /* Bad widget number */
-#define IOERROR_BADERRORCODE 0x4 /* Bad error code passed in */
-#define IOERROR_INVALIDADDR 0x5 /* Invalid address specified */
-
-#define IOERROR_WIDGETLEVEL 0x6 /* Some failure at widget level */
-#define IOERROR_XTALKLEVEL 0x7
-
-#define IOERROR_HWGRAPH_LOOKUP 0x8 /* hwgraph lookup failed for path */
-#define IOERROR_UNHANDLED 0x9 /* handler rejected error */
-
-#define IOERROR_PANIC 0xA /* subsidiary handler has already
- * started decode: continue error
- * data dump, and panic from top
- * caller in error chain.
- */
-
-/*
- * IO errors at the bus/device driver level
- */
-
-#define IOERROR_DEV_NOTFOUND 0x10 /* Device matching bus addr not found */
-#define IOERROR_DEV_SHUTDOWN 0x11 /* Device has been shutdown */
-
-/*
- * Type of address.
- * Indicates the direction of transfer that caused the error.
- */
-#define IOERROR_ADDR_PIO 1 /* Error Address generated due to PIO */
-#define IOERROR_ADDR_DMA 2 /* Error address generated due to DMA */
-
-/*
- * IO error structure.
- *
- * This structure would expand to hold the information retrieved from
- * all IO related error registers.
- *
- * This structure is defined to hold all system specific
- * information related to a single error.
- *
- * This serves a couple of purpose.
- * - Error handling often involves translating one form of address to other
- * form. So, instead of having different data structures at each level,
- * we have a single structure, and the appropriate fields get filled in
- * at each layer.
- * - This provides a way to dump all error related information in any layer
- * of erorr handling (debugging aid).
- *
- * A second possibility is to allow each layer to define its own error
- * data structure, and fill in the proper fields. This has the advantage
- * of isolating the layers.
- * A big concern is the potential stack usage (and overflow), if each layer
- * defines these structures on stack (assuming we don't want to do kmalloc.
- *
- * Any layer wishing to pass extra information to a layer next to it in
- * error handling hierarchy, can do so as a separate parameter.
- */
-
-typedef struct io_error_s {
- /* Bit fields indicating which structure fields are valid */
- union {
- struct {
- unsigned ievb_errortype:1;
- unsigned ievb_widgetnum:1;
- unsigned ievb_widgetdev:1;
- unsigned ievb_srccpu:1;
- unsigned ievb_srcnode:1;
- unsigned ievb_errnode:1;
- unsigned ievb_sysioaddr:1;
- unsigned ievb_xtalkaddr:1;
- unsigned ievb_busspace:1;
- unsigned ievb_busaddr:1;
- unsigned ievb_vaddr:1;
- unsigned ievb_memaddr:1;
- unsigned ievb_epc:1;
- unsigned ievb_ef:1;
- unsigned ievb_tnum:1;
- } iev_b;
- unsigned iev_a;
- } ie_v;
-
- short ie_errortype; /* error type: extra info about error */
- short ie_widgetnum; /* Widget number that's in error */
- short ie_widgetdev; /* Device within widget in error */
- cpuid_t ie_srccpu; /* CPU on srcnode generating error */
- cnodeid_t ie_srcnode; /* Node which caused the error */
- cnodeid_t ie_errnode; /* Node where error was noticed */
- iopaddr_t ie_sysioaddr; /* Sys specific IO address */
- iopaddr_t ie_xtalkaddr; /* Xtalk (48bit) addr of Error */
- iopaddr_t ie_busspace; /* Bus specific address space */
- iopaddr_t ie_busaddr; /* Bus specific address */
- caddr_t ie_vaddr; /* Virtual address of error */
- paddr_t ie_memaddr; /* Physical memory address */
- caddr_t ie_epc; /* pc when error reported */
- caddr_t ie_ef; /* eframe when error reported */
- short ie_tnum; /* Xtalk TNUM field */
-} ioerror_t;
-
-#define IOERROR_INIT(e) do { (e)->ie_v.iev_a = 0; } while (0)
-#define IOERROR_SETVALUE(e,f,v) do { (e)->ie_ ## f = (v); (e)->ie_v.iev_b.ievb_ ## f = 1; } while (0)
-#define IOERROR_FIELDVALID(e,f) ((unsigned long long)((e)->ie_v.iev_b.ievb_ ## f) != (unsigned long long) 0)
-#define IOERROR_NOGETVALUE(e,f) (ASSERT(IOERROR_FIELDVALID(e,f)), ((e)->ie_ ## f))
-#define IOERROR_GETVALUE(p,e,f) ASSERT(IOERROR_FIELDVALID(e,f)); p=((e)->ie_ ## f)
-
-/* hub code likes to call the SysAD address "hubaddr" ... */
-#define ie_hubaddr ie_sysioaddr
-#define ievb_hubaddr ievb_sysioaddr
-#endif
-
-/*
- * Error handling Modes.
- */
-typedef enum {
- MODE_DEVPROBE, /* Probing mode. Errors not fatal */
- MODE_DEVERROR, /* Error while system is running */
- MODE_DEVUSERERROR, /* Device Error created due to user mode access */
- MODE_DEVREENABLE /* Reenable pass */
-} ioerror_mode_t;
-
-
-typedef int error_handler_f(void *, int, ioerror_mode_t, ioerror_t *);
-typedef void *error_handler_arg_t;
-
-#ifdef ERROR_DEBUG
-#define IOERR_PRINTF(x) (x)
-#else
-#define IOERR_PRINTF(x)
-#endif /* ERROR_DEBUG */
-
-#endif /* _ASM_IA64_SN_IOERROR_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_IOERROR_HANDLING_H
-#define _ASM_IA64_SN_IOERROR_HANDLING_H
-
-#include <linux/types.h>
-#include <asm/sn/sgi.h>
-
-#ifdef __KERNEL__
-
-/*
- * Basic types required for io error handling interfaces.
- */
-
-/*
- * Return code from the io error handling interfaces.
- */
-
-enum error_return_code_e {
- /* Success */
- ERROR_RETURN_CODE_SUCCESS,
-
- /* Unknown failure */
- ERROR_RETURN_CODE_GENERAL_FAILURE,
-
- /* Nth error noticed while handling the first error */
- ERROR_RETURN_CODE_NESTED_CALL,
-
- /* State of the vertex is invalid */
- ERROR_RETURN_CODE_INVALID_STATE,
-
- /* Invalid action */
- ERROR_RETURN_CODE_INVALID_ACTION,
-
- /* Valid action but not cannot set it */
- ERROR_RETURN_CODE_CANNOT_SET_ACTION,
-
- /* Valid action but not possible for the current state */
- ERROR_RETURN_CODE_CANNOT_PERFORM_ACTION,
-
- /* Valid state but cannot change the state of the vertex to it */
- ERROR_RETURN_CODE_CANNOT_SET_STATE,
-
- /* ??? */
- ERROR_RETURN_CODE_DUPLICATE,
-
- /* Reached the root of the system critical graph */
- ERROR_RETURN_CODE_SYS_CRITICAL_GRAPH_BEGIN,
-
- /* Reached the leaf of the system critical graph */
- ERROR_RETURN_CODE_SYS_CRITICAL_GRAPH_ADD,
-
- /* Cannot shutdown the device in hw/sw */
- ERROR_RETURN_CODE_SHUTDOWN_FAILED,
-
- /* Cannot restart the device in hw/sw */
- ERROR_RETURN_CODE_RESET_FAILED,
-
- /* Cannot failover the io subsystem */
- ERROR_RETURN_CODE_FAILOVER_FAILED,
-
- /* No Jump Buffer exists */
- ERROR_RETURN_CODE_NO_JUMP_BUFFER
-};
-
-typedef uint64_t error_return_code_t;
-
-/*
- * State of the vertex during error handling.
- */
-enum error_state_e {
- /* Ignore state */
- ERROR_STATE_IGNORE,
-
- /* Invalid state */
- ERROR_STATE_NONE,
-
- /* Trying to decipher the error bits */
- ERROR_STATE_LOOKUP,
-
- /* Trying to carryout the action decided upon after
- * looking at the error bits
- */
- ERROR_STATE_ACTION,
-
- /* Donot allow any other operations to this vertex from
- * other parts of the kernel. This is also used to indicate
- * that the device has been software shutdown.
- */
- ERROR_STATE_SHUTDOWN,
-
- /* This is a transitory state when no new requests are accepted
- * on behalf of the device. This is usually used when trying to
- * quiesce all the outstanding operations and preparing the
- * device for a failover / shutdown etc.
- */
- ERROR_STATE_SHUTDOWN_IN_PROGRESS,
-
- /* This is the state when there is absolutely no activity going
- * on wrt device.
- */
- ERROR_STATE_SHUTDOWN_COMPLETE,
-
- /* This is the state when the device has issued a retry. */
- ERROR_STATE_RETRY,
-
- /* This is the normal state. This can also be used to indicate
- * that the device has been software-enabled after software-
- * shutting down previously.
- */
- ERROR_STATE_NORMAL
-
-};
-
-typedef uint64_t error_state_t;
-
-/*
- * Generic error classes. This is used to classify errors after looking
- * at the error bits and helpful in deciding on the action.
- */
-enum error_class_e {
- /* Unclassified error */
- ERROR_CLASS_UNKNOWN,
-
- /* LLP transmit error */
- ERROR_CLASS_LLP_XMIT,
-
- /* LLP receive error */
- ERROR_CLASS_LLP_RECV,
-
- /* Credit error */
- ERROR_CLASS_CREDIT,
-
- /* Timeout error */
- ERROR_CLASS_TIMEOUT,
-
- /* Access error */
- ERROR_CLASS_ACCESS,
-
- /* System coherency error */
- ERROR_CLASS_SYS_COHERENCY,
-
- /* Bad data error (ecc / parity etc) */
- ERROR_CLASS_BAD_DATA,
-
- /* Illegal request packet */
- ERROR_CLASS_BAD_REQ_PKT,
-
- /* Illegal response packet */
- ERROR_CLASS_BAD_RESP_PKT
-};
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_IA64_SN_IOERROR_HANDLING_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_IOGRAPH_H
-#define _ASM_IA64_SN_IOGRAPH_H
-
-#include <asm/sn/xtalk/xbow.h> /* For get MAX_PORT_NUM */
-
-/*
- * During initialization, platform-dependent kernel code establishes some
- * basic elements of the hardware graph. This file contains edge and
- * info labels that are used across various platforms -- it serves as an
- * ad-hoc registry.
- */
-
-/* edges names */
-#define EDGE_LBL_BUS "bus"
-#define EDGE_LBL_CONN ".connection"
-#define EDGE_LBL_GUEST ".guest" /* For IOC3 */
-#define EDGE_LBL_HOST ".host" /* For IOC3 */
-#define EDGE_LBL_PERFMON "mon"
-#define EDGE_LBL_USRPCI "usrpci"
-#define EDGE_LBL_BLOCK "block"
-#define EDGE_LBL_BOARD "board"
-#define EDGE_LBL_CHAR "char"
-#define EDGE_LBL_CONTROLLER "controller"
-#define EDGE_LBL_CPU "cpu"
-#define EDGE_LBL_CPUNUM "cpunum"
-#define EDGE_LBL_DIRECT "direct"
-#define EDGE_LBL_DISABLED "disabled"
-#define EDGE_LBL_DISK "disk"
-#define EDGE_LBL_HUB "hub" /* For SN0 */
-#define EDGE_LBL_HW "hw"
-#define EDGE_LBL_INTERCONNECT "link"
-#define EDGE_LBL_IO "io"
-#define EDGE_LBL_LUN "lun"
-#define EDGE_LBL_LINUX "linux"
-#define EDGE_LBL_LINUX_BUS EDGE_LBL_LINUX "/bus/pci-x"
-#define EDGE_LBL_MACHDEP "machdep" /* Platform depedent devices */
-#define EDGE_LBL_MASTER ".master"
-#define EDGE_LBL_MEMORY "memory"
-#define EDGE_LBL_META_ROUTER "metarouter"
-#define EDGE_LBL_MIDPLANE "midplane"
-#define EDGE_LBL_MODULE "module"
-#define EDGE_LBL_NODE "node"
-#define EDGE_LBL_NODENUM "nodenum"
-#define EDGE_LBL_NVRAM "nvram"
-#define EDGE_LBL_PARTITION "partition"
-#define EDGE_LBL_PCI "pci"
-#define EDGE_LBL_PCIX "pci-x"
-#define EDGE_LBL_PCIX_0 EDGE_LBL_PCIX "/0"
-#define EDGE_LBL_PCIX_1 EDGE_LBL_PCIX "/1"
-#define EDGE_LBL_AGP "agp"
-#define EDGE_LBL_AGP_0 EDGE_LBL_AGP "/0"
-#define EDGE_LBL_AGP_1 EDGE_LBL_AGP "/1"
-#define EDGE_LBL_PORT "port"
-#define EDGE_LBL_PROM "prom"
-#define EDGE_LBL_RACK "rack"
-#define EDGE_LBL_RDISK "rdisk"
-#define EDGE_LBL_REPEATER_ROUTER "repeaterrouter"
-#define EDGE_LBL_ROUTER "router"
-#define EDGE_LBL_RPOS "bay" /* Position in rack */
-#define EDGE_LBL_SCSI "scsi"
-#define EDGE_LBL_SCSI_CTLR "scsi_ctlr"
-#define EDGE_LBL_SLOT "slot"
-#define EDGE_LBL_TARGET "target"
-#define EDGE_LBL_UNKNOWN "unknown"
-#define EDGE_LBL_XBOW "xbow"
-#define EDGE_LBL_XIO "xio"
-#define EDGE_LBL_XSWITCH ".xswitch"
-#define EDGE_LBL_XTALK "xtalk"
-#define EDGE_LBL_XWIDGET "xwidget"
-#define EDGE_LBL_ELSC "elsc"
-#define EDGE_LBL_L1 "L1"
-#define EDGE_LBL_XPLINK "xplink" /* Cross partition */
-#define EDGE_LBL_XPLINK_NET "net" /* XP network devs */
-#define EDGE_LBL_XPLINK_RAW "raw" /* XP Raw devs */
-#define EDGE_LBL_SLAB "slab" /* Slab of a module */
-#define EDGE_LBL_XPLINK_KERNEL "kernel" /* XP kernel devs */
-#define EDGE_LBL_XPLINK_ADMIN "admin" /* Partition admin */
-#define EDGE_LBL_IOBRICK "iobrick"
-#define EDGE_LBL_PXBRICK "PXbrick"
-#define EDGE_LBL_OPUSBRICK "onboardio"
-#define EDGE_LBL_IXBRICK "IXbrick"
-#define EDGE_LBL_CGBRICK "CGbrick"
-#define EDGE_LBL_CPUBUS "cpubus" /* CPU Interfaces (SysAd) */
-
-/* vertex info labels in hwgraph */
-#define INFO_LBL_CNODEID "_cnodeid"
-#define INFO_LBL_CONTROLLER_NAME "_controller_name"
-#define INFO_LBL_CPUBUS "_cpubus"
-#define INFO_LBL_CPUID "_cpuid"
-#define INFO_LBL_CPU_INFO "_cpu"
-#define INFO_LBL_DETAIL_INVENT "_detail_invent" /* inventory data*/
-#define INFO_LBL_DIAGVAL "_diag_reason" /* Reason disabled */
-#define INFO_LBL_DRIVER "_driver" /* points to attached device_driver_t */
-#define INFO_LBL_ELSC "_elsc"
-#define INFO_LBL_SUBCH "_subch" /* system controller subchannel */
-#define INFO_LBL_HUB_INFO "_hubinfo"
-#define INFO_LBL_HWGFSLIST "_hwgfs_list"
-#define INFO_LBL_TRAVERSE "_hwg_traverse" /* hwgraph traverse function */
-#define INFO_LBL_MODULE_INFO "_module" /* module data ptr */
-#define INFO_LBL_MDPERF_DATA "_mdperf" /* mdperf monitoring*/
-#define INFO_LBL_NODE_INFO "_node"
-#define INFO_LBL_PCIBR_HINTS "_pcibr_hints"
-#define INFO_LBL_PCIIO "_pciio"
-#define INFO_LBL_PFUNCS "_pciio_ops" /* ops vector for gio providers */
-#define INFO_LBL_PERMISSIONS "_permissions" /* owner, uid, gid */
-#define INFO_LBL_ROUTER_INFO "_router"
-#define INFO_LBL_SUBDEVS "_subdevs" /* subdevice enable bits */
-#define INFO_LBL_XSWITCH "_xswitch"
-#define INFO_LBL_XSWITCH_ID "_xswitch_id"
-#define INFO_LBL_XSWITCH_VOL "_xswitch_volunteer"
-#define INFO_LBL_XFUNCS "_xtalk_ops" /* ops vector for gio providers */
-#define INFO_LBL_XWIDGET "_xwidget"
-
-
-#ifdef __KERNEL__
-void init_all_devices(void);
-#endif /* __KERNEL__ */
-
-int io_brick_map_widget(int, int);
-
-/*
- * Map a brick's widget number to a meaningful int
- */
-
-struct io_brick_map_s {
- int ibm_type; /* brick type */
- int ibm_map_wid[MAX_PORT_NUM]; /* wid to int map */
-};
-
-#endif /* _ASM_IA64_SN_IOGRAPH_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Derived from IRIX <sys/SN/kldir.h>, revision 1.21.
- *
- * Copyright (C) 1992-1997,1999,2001-2003 Silicon Graphics, Inc. All Rights Reserved.
- * Copyright (C) 1999 by Ralf Baechle
- */
-#ifndef _ASM_IA64_SN_KLDIR_H
-#define _ASM_IA64_SN_KLDIR_H
-
-#include <linux/types.h>
-
-/*
- * The kldir memory area resides at a fixed place in each node's memory and
- * provides pointers to most other IP27 memory areas. This allows us to
- * resize and/or relocate memory areas at a later time without breaking all
- * firmware and kernels that use them. Indices in the array are
- * permanently dedicated to areas listed below. Some memory areas (marked
- * below) reside at a permanently fixed location, but are included in the
- * directory for completeness.
- */
-
-#define KLDIR_MAGIC 0x434d5f53505f5357
-
-/*
- * The upper portion of the memory map applies during boot
- * only and is overwritten by IRIX/SYMMON.
- *
- * MEMORY MAP PER NODE
- *
- * 0x2000000 (32M) +-----------------------------------------+
- * | IO6 BUFFERS FOR FLASH ENET IOC3 |
- * 0x1F80000 (31.5M) +-----------------------------------------+
- * | IO6 TEXT/DATA/BSS/stack |
- * 0x1C00000 (30M) +-----------------------------------------+
- * | IO6 PROM DEBUG TEXT/DATA/BSS/stack |
- * 0x0800000 (28M) +-----------------------------------------+
- * | IP27 PROM TEXT/DATA/BSS/stack |
- * 0x1B00000 (27M) +-----------------------------------------+
- * | IP27 CFG |
- * 0x1A00000 (26M) +-----------------------------------------+
- * | Graphics PROM |
- * 0x1800000 (24M) +-----------------------------------------+
- * | 3rd Party PROM drivers |
- * 0x1600000 (22M) +-----------------------------------------+
- * | |
- * | Free |
- * | |
- * +-----------------------------------------+
- * | UNIX DEBUG Version |
- * 0x190000 (2M--) +-----------------------------------------+
- * | SYMMON |
- * | (For UNIX Debug only) |
- * 0x34000 (208K) +-----------------------------------------+
- * | SYMMON STACK [NUM_CPU_PER_NODE] |
- * | (For UNIX Debug only) |
- * 0x25000 (148K) +-----------------------------------------+
- * | KLCONFIG - II (temp) |
- * | |
- * | ---------------------------- |
- * | |
- * | UNIX NON-DEBUG Version |
- * 0x19000 (100K) +-----------------------------------------+
- *
- *
- * The lower portion of the memory map contains information that is
- * permanent and is used by the IP27PROM, IO6PROM and IRIX.
- *
- * 0x19000 (100K) +-----------------------------------------+
- * | |
- * | PI Error Spools (32K) |
- * | |
- * 0x12000 (72K) +-----------------------------------------+
- * | Unused |
- * 0x11c00 (71K) +-----------------------------------------+
- * | CPU 1 NMI Eframe area |
- * 0x11a00 (70.5K) +-----------------------------------------+
- * | CPU 0 NMI Eframe area |
- * 0x11800 (70K) +-----------------------------------------+
- * | CPU 1 NMI Register save area |
- * 0x11600 (69.5K) +-----------------------------------------+
- * | CPU 0 NMI Register save area |
- * 0x11400 (69K) +-----------------------------------------+
- * | GDA (1k) |
- * 0x11000 (68K) +-----------------------------------------+
- * | Early cache Exception stack |
- * | and/or |
- * | kernel/io6prom nmi registers |
- * 0x10800 (66k) +-----------------------------------------+
- * | cache error eframe |
- * 0x10400 (65K) +-----------------------------------------+
- * | Exception Handlers (UALIAS copy) |
- * 0x10000 (64K) +-----------------------------------------+
- * | |
- * | |
- * | KLCONFIG - I (permanent) (48K) |
- * | |
- * | |
- * | |
- * 0x4000 (16K) +-----------------------------------------+
- * | NMI Handler (Protected Page) |
- * 0x3000 (12K) +-----------------------------------------+
- * | ARCS PVECTORS (master node only) |
- * 0x2c00 (11K) +-----------------------------------------+
- * | ARCS TVECTORS (master node only) |
- * 0x2800 (10K) +-----------------------------------------+
- * | LAUNCH [NUM_CPU] |
- * 0x2400 (9K) +-----------------------------------------+
- * | Low memory directory (KLDIR) |
- * 0x2000 (8K) +-----------------------------------------+
- * | ARCS SPB (1K) |
- * 0x1000 (4K) +-----------------------------------------+
- * | Early cache Exception stack |
- * | and/or |
- * | kernel/io6prom nmi registers |
- * 0x800 (2k) +-----------------------------------------+
- * | cache error eframe |
- * 0x400 (1K) +-----------------------------------------+
- * | Exception Handlers |
- * 0x0 (0K) +-----------------------------------------+
- */
-
-#ifdef __ASSEMBLY__
-#define KLDIR_OFF_MAGIC 0x00
-#define KLDIR_OFF_OFFSET 0x08
-#define KLDIR_OFF_POINTER 0x10
-#define KLDIR_OFF_SIZE 0x18
-#define KLDIR_OFF_COUNT 0x20
-#define KLDIR_OFF_STRIDE 0x28
-#endif /* __ASSEMBLY__ */
-
-#ifndef __ASSEMBLY__
-typedef struct kldir_ent_s {
- u64 magic; /* Indicates validity of entry */
- off_t offset; /* Offset from start of node space */
- unsigned long pointer; /* Pointer to area in some cases */
- size_t size; /* Size in bytes */
- u64 count; /* Repeat count if array, 1 if not */
- size_t stride; /* Stride if array, 0 if not */
- char rsvd[16]; /* Pad entry to 0x40 bytes */
- /* NOTE: These 16 bytes are used in the Partition KLDIR
- entry to store partition info. Refer to klpart.h for this. */
-} kldir_ent_t;
-#endif /* __ASSEMBLY__ */
-
-
-#define KLDIR_ENT_SIZE 0x40
-#define KLDIR_MAX_ENTRIES (0x400 / 0x40)
-
-
-
-/*
- * The upper portion of the memory map applies during boot
- * only and is overwritten by IRIX/SYMMON. The minimum memory bank
- * size on IP35 is 64M, which provides a limit on the amount of space
- * the PROM can assume it has available.
- *
- * Most of the addresses below are defined as macros in this file, or
- * in SN/addrs.h or SN/SN1/addrs.h.
- *
- * MEMORY MAP PER NODE
- *
- * 0x4000000 (64M) +-----------------------------------------+
- * | |
- * | |
- * | IO7 TEXT/DATA/BSS/stack |
- * 0x3000000 (48M) +-----------------------------------------+
- * | Free |
- * 0x2102000 (>33M) +-----------------------------------------+
- * | IP35 Topology (PCFG) + misc data |
- * 0x2000000 (32M) +-----------------------------------------+
- * | IO7 BUFFERS FOR FLASH ENET IOC3 |
- * 0x1F80000 (31.5M) +-----------------------------------------+
- * | Free |
- * 0x1C00000 (28M) +-----------------------------------------+
- * | IP35 PROM TEXT/DATA/BSS/stack |
- * 0x1A00000 (26M) +-----------------------------------------+
- * | Routing temp. space |
- * 0x1800000 (24M) +-----------------------------------------+
- * | Diagnostics temp. space |
- * 0x1500000 (21M) +-----------------------------------------+
- * | Free |
- * 0x1400000 (20M) +-----------------------------------------+
- * | IO7 PROM temporary copy |
- * 0x1300000 (19M) +-----------------------------------------+
- * | |
- * | Free |
- * | (UNIX DATA starts above 0x1000000) |
- * | |
- * +-----------------------------------------+
- * | UNIX DEBUG Version |
- * 0x0310000 (3.1M) +-----------------------------------------+
- * | SYMMON, loaded just below UNIX |
- * | (For UNIX Debug only) |
- * | |
- * | |
- * 0x006C000 (432K) +-----------------------------------------+
- * | SYMMON STACK [NUM_CPU_PER_NODE] |
- * | (For UNIX Debug only) |
- * 0x004C000 (304K) +-----------------------------------------+
- * | |
- * | |
- * | UNIX NON-DEBUG Version |
- * 0x0040000 (256K) +-----------------------------------------+
- *
- *
- * The lower portion of the memory map contains information that is
- * permanent and is used by the IP35PROM, IO7PROM and IRIX.
- *
- * 0x40000 (256K) +-----------------------------------------+
- * | |
- * | KLCONFIG (64K) |
- * | |
- * 0x30000 (192K) +-----------------------------------------+
- * | |
- * | PI Error Spools (64K) |
- * | |
- * 0x20000 (128K) +-----------------------------------------+
- * | |
- * | Unused |
- * | |
- * 0x19000 (100K) +-----------------------------------------+
- * | Early cache Exception stack (CPU 3)|
- * 0x18800 (98K) +-----------------------------------------+
- * | cache error eframe (CPU 3) |
- * 0x18400 (97K) +-----------------------------------------+
- * | Exception Handlers (CPU 3) |
- * 0x18000 (96K) +-----------------------------------------+
- * | |
- * | Unused |
- * | |
- * 0x13c00 (79K) +-----------------------------------------+
- * | GPDA (8k) |
- * 0x11c00 (71K) +-----------------------------------------+
- * | Early cache Exception stack (CPU 2)|
- * 0x10800 (66k) +-----------------------------------------+
- * | cache error eframe (CPU 2) |
- * 0x10400 (65K) +-----------------------------------------+
- * | Exception Handlers (CPU 2) |
- * 0x10000 (64K) +-----------------------------------------+
- * | |
- * | Unused |
- * | |
- * 0x0b400 (45K) +-----------------------------------------+
- * | GDA (1k) |
- * 0x0b000 (44K) +-----------------------------------------+
- * | NMI Eframe areas (4) |
- * 0x0a000 (40K) +-----------------------------------------+
- * | NMI Register save areas (4) |
- * 0x09000 (36K) +-----------------------------------------+
- * | Early cache Exception stack (CPU 1)|
- * 0x08800 (34K) +-----------------------------------------+
- * | cache error eframe (CPU 1) |
- * 0x08400 (33K) +-----------------------------------------+
- * | Exception Handlers (CPU 1) |
- * 0x08000 (32K) +-----------------------------------------+
- * | |
- * | |
- * | Unused |
- * | |
- * | |
- * 0x04000 (16K) +-----------------------------------------+
- * | NMI Handler (Protected Page) |
- * 0x03000 (12K) +-----------------------------------------+
- * | ARCS PVECTORS (master node only) |
- * 0x02c00 (11K) +-----------------------------------------+
- * | ARCS TVECTORS (master node only) |
- * 0x02800 (10K) +-----------------------------------------+
- * | LAUNCH [NUM_CPU] |
- * 0x02400 (9K) +-----------------------------------------+
- * | Low memory directory (KLDIR) |
- * 0x02000 (8K) +-----------------------------------------+
- * | ARCS SPB (1K) |
- * 0x01000 (4K) +-----------------------------------------+
- * | Early cache Exception stack (CPU 0)|
- * 0x00800 (2k) +-----------------------------------------+
- * | cache error eframe (CPU 0) |
- * 0x00400 (1K) +-----------------------------------------+
- * | Exception Handlers (CPU 0) |
- * 0x00000 (0K) +-----------------------------------------+
- */
-
-/*
- * NOTE: To change the kernel load address, you must update:
- * - the appropriate elspec files in irix/kern/master.d
- * - NODEBUGUNIX_ADDR in SN/SN1/addrs.h
- * - IP27_FREEMEM_OFFSET below
- * - KERNEL_START_OFFSET below (if supporting cells)
- */
-
-
-/*
- * This is defined here because IP27_SYMMON_STK_SIZE must be at least what
- * we define here. Since it's set up in the prom. We can't redefine it later
- * and expect more space to be allocated. The way to find out the true size
- * of the symmon stacks is to divide SYMMON_STK_SIZE by SYMMON_STK_STRIDE
- * for a particular node.
- */
-#define SYMMON_STACK_SIZE 0x8000
-
-#if defined (PROM) || defined (SABLE)
-
-/*
- * These defines are prom version dependent. No code other than the IP35
- * prom should attempt to use these values.
- */
-#define IP27_LAUNCH_OFFSET 0x2400
-#define IP27_LAUNCH_SIZE 0x400
-#define IP27_LAUNCH_COUNT 4
-#define IP27_LAUNCH_STRIDE 0x100 /* could be as small as 0x80 */
-
-#define IP27_KLCONFIG_OFFSET 0x30000
-#define IP27_KLCONFIG_SIZE 0x10000
-#define IP27_KLCONFIG_COUNT 1
-#define IP27_KLCONFIG_STRIDE 0
-
-#define IP27_NMI_OFFSET 0x3000
-#define IP27_NMI_SIZE 0x100
-#define IP27_NMI_COUNT 4
-#define IP27_NMI_STRIDE 0x40
-
-#define IP27_PI_ERROR_OFFSET 0x20000
-#define IP27_PI_ERROR_SIZE 0x10000
-#define IP27_PI_ERROR_COUNT 1
-#define IP27_PI_ERROR_STRIDE 0
-
-#define IP27_SYMMON_STK_OFFSET 0x4c000
-#define IP27_SYMMON_STK_SIZE 0x20000
-#define IP27_SYMMON_STK_COUNT 4
-/* IP27_SYMMON_STK_STRIDE must be >= SYMMON_STACK_SIZE */
-#define IP27_SYMMON_STK_STRIDE 0x8000
-
-#define IP27_FREEMEM_OFFSET 0x40000
-#define IP27_FREEMEM_SIZE (-1)
-#define IP27_FREEMEM_COUNT 1
-#define IP27_FREEMEM_STRIDE 0
-
-#endif /* PROM || SABLE*/
-/*
- * There will be only one of these in a partition so the IO7 must set it up.
- */
-#define IO6_GDA_OFFSET 0xb000
-#define IO6_GDA_SIZE 0x400
-#define IO6_GDA_COUNT 1
-#define IO6_GDA_STRIDE 0
-
-/*
- * save area of kernel nmi regs in the prom format
- */
-#define IP27_NMI_KREGS_OFFSET 0x9000
-#define IP27_NMI_KREGS_CPU_SIZE 0x400
-/*
- * save area of kernel nmi regs in eframe format
- */
-#define IP27_NMI_EFRAME_OFFSET 0xa000
-#define IP27_NMI_EFRAME_SIZE 0x400
-
-#define GPDA_OFFSET 0x11c00
-
-#endif /* _ASM_IA64_SN_KLDIR_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-#ifndef _ASM_IA64_SN_KSYS_ELSC_H
-#define _ASM_IA64_SN_KSYS_ELSC_H
-
-/*
- * Error codes
- *
- * The possible ELSC error codes are a superset of the I2C error codes,
- * so ELSC error codes begin at -100.
- */
-
-#define ELSC_ERROR_NONE 0
-
-#define ELSC_ERROR_CMD_SEND (-100) /* Error sending command */
-#define ELSC_ERROR_CMD_CHECKSUM (-101) /* Command checksum bad */
-#define ELSC_ERROR_CMD_UNKNOWN (-102) /* Unknown command */
-#define ELSC_ERROR_CMD_ARGS (-103) /* Invalid argument(s) */
-#define ELSC_ERROR_CMD_PERM (-104) /* Permission denied */
-#define ELSC_ERROR_CMD_STATE (-105) /* not allowed in this state*/
-
-#define ELSC_ERROR_RESP_TIMEOUT (-110) /* ELSC response timeout */
-#define ELSC_ERROR_RESP_CHECKSUM (-111) /* Response checksum bad */
-#define ELSC_ERROR_RESP_FORMAT (-112) /* Response format error */
-#define ELSC_ERROR_RESP_DIR (-113) /* Response direction error */
-
-#define ELSC_ERROR_MSG_LOST (-120) /* Queue full; msg. lost */
-#define ELSC_ERROR_LOCK_TIMEOUT (-121) /* ELSC response timeout */
-#define ELSC_ERROR_DATA_SEND (-122) /* Error sending data */
-#define ELSC_ERROR_NIC (-123) /* NIC processing error */
-#define ELSC_ERROR_NVMAGIC (-124) /* Bad magic no. in NVRAM */
-#define ELSC_ERROR_MODULE (-125) /* Moduleid processing err */
-
-#endif /* _ASM_IA64_SN_KSYS_ELSC_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-
-#ifndef _ASM_IA64_SN_KSYS_L1_H
-#define _ASM_IA64_SN_KSYS_L1_H
-
-#include <asm/sn/types.h>
-
-/* L1 Target Addresses */
-/*
- * L1 commands and responses use source/target addresses that are
- * 32 bits long. These are broken up into multiple bitfields that
- * specify the type of the target controller (could actually be L2
- * L3, not just L1), the rack and bay of the target, and the task
- * id (L1 functionality is divided into several independent "tasks"
- * that can each receive command requests and transmit responses)
- */
-#define L1_ADDR_TYPE_L1 0x00 /* L1 system controller */
-#define L1_ADDR_TYPE_L2 0x01 /* L2 system controller */
-#define L1_ADDR_TYPE_L3 0x02 /* L3 system controller */
-#define L1_ADDR_TYPE_CBRICK 0x03 /* attached C brick */
-#define L1_ADDR_TYPE_IOBRICK 0x04 /* attached I/O brick */
-#define L1_ADDR_TASK_SHFT 0
-#define L1_ADDR_TASK_MASK 0x0000001F
-#define L1_ADDR_TASK_INVALID 0x00 /* invalid task */
-#define L1_ADDR_TASK_IROUTER 0x01 /* iRouter */
-#define L1_ADDR_TASK_SYS_MGMT 0x02 /* system management port */
-#define L1_ADDR_TASK_CMD 0x03 /* command interpreter */
-#define L1_ADDR_TASK_ENV 0x04 /* environmental monitor */
-#define L1_ADDR_TASK_BEDROCK 0x05 /* bedrock */
-#define L1_ADDR_TASK_GENERAL 0x06 /* general requests */
-
-/* response argument types */
-#define L1_ARG_INT 0x00 /* 4-byte integer (big-endian) */
-#define L1_ARG_ASCII 0x01 /* null-terminated ASCII string */
-#define L1_ARG_UNKNOWN 0x80 /* unknown data type. The low
- * 7 bits will contain the data
- * length. */
-
-/* response codes */
-#define L1_RESP_OK 0 /* no problems encountered */
-#define L1_RESP_IROUTER (- 1) /* iRouter error */
-#define L1_RESP_ARGC (-100) /* arg count mismatch */
-#define L1_RESP_REQC (-101) /* bad request code */
-#define L1_RESP_NAVAIL (-104) /* requested data not available */
-#define L1_RESP_ARGVAL (-105) /* arg value out of range */
-#define L1_RESP_INVAL (-107) /* requested data invalid */
-
-/* L1 general requests */
-
-/* request codes */
-#define L1_REQ_RDBG 0x0001 /* read debug switches */
-#define L1_REQ_RRACK 0x0002 /* read brick rack & bay */
-#define L1_REQ_RRBT 0x0003 /* read brick rack, bay & type */
-#define L1_REQ_SER_NUM 0x0004 /* read brick serial number */
-#define L1_REQ_FW_REV 0x0005 /* read L1 firmware revision */
-#define L1_REQ_EEPROM 0x0006 /* read EEPROM info */
-#define L1_REQ_EEPROM_FMT 0x0007 /* get EEPROM data format & size */
-#define L1_REQ_SYS_SERIAL 0x0008 /* read system serial number */
-#define L1_REQ_PARTITION_GET 0x0009 /* read partition id */
-#define L1_REQ_PORTSPEED 0x000a /* get ioport speed */
-
-#define L1_REQ_CONS_SUBCH 0x1002 /* select this node's console
- subchannel */
-#define L1_REQ_CONS_NODE 0x1003 /* volunteer to be the master
- (console-hosting) node */
-#define L1_REQ_DISP1 0x1004 /* write line 1 of L1 display */
-#define L1_REQ_DISP2 0x1005 /* write line 2 of L1 display */
-#define L1_REQ_PARTITION_SET 0x1006 /* set partition id */
-#define L1_REQ_EVENT_SUBCH 0x1007 /* set the subchannel for system
- controller event transmission */
-
-#define L1_REQ_RESET 0x2000 /* request a full system reset */
-#define L1_REQ_PCI_UP 0x2001 /* power up pci slot or bus */
-#define L1_REQ_PCI_DOWN 0x2002 /* power down pci slot or bus */
-#define L1_REQ_PCI_RESET 0x2003 /* reset pci bus or slot */
-
-/* L1 command interpreter requests */
-
-/* request codes */
-#define L1_REQ_EXEC_CMD 0x0000 /* interpret and execute an ASCII
- command string */
-
-/* brick type response codes */
-#define L1_BRICKTYPE_PX 0x23 /* # */
-#define L1_BRICKTYPE_PE 0x25 /* % */
-#define L1_BRICKTYPE_N_p0 0x26 /* & */
-#define L1_BRICKTYPE_IP45 0x34 /* 4 */
-#define L1_BRICKTYPE_IP41 0x35 /* 5 */
-#define L1_BRICKTYPE_TWISTER 0x36 /* 6 */ /* IP53 & ROUTER */
-#define L1_BRICKTYPE_IX 0x3d /* = */
-#define L1_BRICKTYPE_IP34 0x61 /* a */
-#define L1_BRICKTYPE_C 0x63 /* c */
-#define L1_BRICKTYPE_I 0x69 /* i */
-#define L1_BRICKTYPE_N 0x6e /* n */
-#define L1_BRICKTYPE_OPUS 0x6f /* o */
-#define L1_BRICKTYPE_P 0x70 /* p */
-#define L1_BRICKTYPE_R 0x72 /* r */
-#define L1_BRICKTYPE_CHI_CG 0x76 /* v */
-#define L1_BRICKTYPE_X 0x78 /* x */
-#define L1_BRICKTYPE_X2 0x79 /* y */
-
-/* EEPROM codes (for the "read EEPROM" request) */
-/* c brick */
-#define L1_EEP_NODE 0x00 /* node board */
-#define L1_EEP_PIMM0 0x01
-#define L1_EEP_PIMM(x) (L1_EEP_PIMM0+(x))
-#define L1_EEP_DIMM0 0x03
-#define L1_EEP_DIMM(x) (L1_EEP_DIMM0+(x))
-
-/* other brick types */
-#define L1_EEP_POWER 0x00 /* power board */
-#define L1_EEP_LOGIC 0x01 /* logic board */
-
-/* info area types */
-#define L1_EEP_CHASSIS 1 /* chassis info area */
-#define L1_EEP_BOARD 2 /* board info area */
-#define L1_EEP_IUSE 3 /* internal use area */
-#define L1_EEP_SPD 4 /* serial presence detect record */
-
-#define L1_DISPLAY_LINE_LENGTH 12 /* L1 display characters/line */
-
-#ifdef L1_DISP_2LINES
-#define L1_DISPLAY_LINES 2 /* number of L1 display lines */
-#else
-#define L1_DISPLAY_LINES 1 /* number of L1 display lines available
- * to system software */
-#endif
-
-int elsc_display_line(nasid_t nasid, char *line, int lnum);
-int iobrick_rack_bay_type_get( nasid_t nasid, unsigned int *rack,
- unsigned int *bay, unsigned int *brick_type );
-int iomoduleid_get( nasid_t nasid );
-
-
-#endif /* _ASM_IA64_SN_KSYS_L1_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_LABELCL_H
-#define _ASM_IA64_SN_LABELCL_H
-
-#define LABELCL_MAGIC 0x4857434c /* 'HWLC' */
-#define LABEL_LENGTH_MAX 256 /* Includes NULL char */
-#define INFO_DESC_PRIVATE (-1) /* default */
-#define INFO_DESC_EXPORT 0 /* export info itself */
-
-/*
- * Description of a label entry.
- */
-typedef struct label_info_s {
- char *name;
- arb_info_desc_t desc;
- arbitrary_info_t info;
-} label_info_t;
-
-/*
- * Definition of the data structure that provides the link to
- * the hwgraph fastinfo and the label entries associated with a
- * particular hwgraph entry.
- */
-typedef struct labelcl_info_s {
- unsigned long hwcl_magic;
- unsigned long num_labels;
- void *label_list;
- arbitrary_info_t IDX_list[HWGRAPH_NUM_INDEX_INFO];
-} labelcl_info_t;
-
-/*
- * Definitions for the string table that holds the actual names
- * of the labels.
- */
-struct string_table_item {
- struct string_table_item *next;
- char string[1];
-};
-
-struct string_table {
- struct string_table_item *string_table_head;
- long string_table_generation;
-};
-
-
-#define STRTBL_BASIC_SIZE ((size_t)(((struct string_table_item *)0)->string))
-#define STRTBL_ITEM_SIZE(str_length) (STRTBL_BASIC_SIZE + (str_length) + 1)
-
-#define STRTBL_ALLOC(str_length) \
- ((struct string_table_item *)kmalloc(STRTBL_ITEM_SIZE(str_length), GFP_KERNEL))
-
-#define STRTBL_FREE(ptr) kfree(ptr)
-
-
-extern labelcl_info_t *labelcl_info_create(void);
-extern int labelcl_info_destroy(labelcl_info_t *);
-extern int labelcl_info_add_LBL(vertex_hdl_t, char *, arb_info_desc_t, arbitrary_info_t);
-extern int labelcl_info_remove_LBL(vertex_hdl_t, char *, arb_info_desc_t *, arbitrary_info_t *);
-extern int labelcl_info_replace_LBL(vertex_hdl_t, char *, arb_info_desc_t,
- arbitrary_info_t, arb_info_desc_t *, arbitrary_info_t *);
-extern int labelcl_info_get_LBL(vertex_hdl_t, char *, arb_info_desc_t *,
- arbitrary_info_t *);
-extern int labelcl_info_get_next_LBL(vertex_hdl_t, char *, arb_info_desc_t *,
- arbitrary_info_t *, labelcl_info_place_t *);
-extern int labelcl_info_replace_IDX(vertex_hdl_t, int, arbitrary_info_t,
- arbitrary_info_t *);
-extern int labelcl_info_connectpt_set(vertex_hdl_t, vertex_hdl_t);
-extern int labelcl_info_get_IDX(vertex_hdl_t, int, arbitrary_info_t *);
-
-#endif /* _ASM_IA64_SN_LABELCL_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_SN_PCI_BRIDGE_H
-#define _ASM_SN_PCI_BRIDGE_H
-
-
-/*
- * bridge.h - header file for bridge chip and bridge portion of xbridge chip
- *
- * Also including offsets for unique PIC registers.
- * The PIC asic is a follow-on to Xbridge and most of its registers are
- * identical to those of Xbridge. PIC is different than Xbridge in that
- * it will accept 64 bit register access and that, in some cases, data
- * is kept in bits 63:32. PIC registers that are identical to Xbridge
- * may be accessed identically to the Xbridge registers, allowing for lots
- * of code reuse. Here are the access rules as described in the PIC
- * manual:
- *
- * o Read a word on a DW boundary returns D31:00 of reg.
- * o Read a DW on a DW boundary returns D63:00 of reg.
- * o Write a word on a DW boundary loads D31:00 of reg.
- * o Write a DW on a DW boundary loads D63:00 of reg.
- * o No support for word boundary access that is not double word
- * aligned.
- *
- * So we can reuse a lot of bridge_s for PIC. In bridge_s are included
- * #define tags and unions for 64 bit access to PIC registers.
- * For a detailed PIC register layout see pic.h.
- */
-
-#include <linux/config.h>
-#include <asm/sn/xtalk/xwidget.h>
-#include <asm/sn/pci/pic.h>
-
-#define BRIDGE_REG_GET32(reg) \
- __swab32( *(volatile uint32_t *) (((uint64_t)reg)^4) )
-
-#define BRIDGE_REG_SET32(reg) \
- *(volatile uint32_t *) (((uint64_t)reg)^4)
-
-/* I/O page size */
-
-#if PAGE_SIZE == 4096
-#define IOPFNSHIFT 12 /* 4K per mapped page */
-#else
-#define IOPFNSHIFT 14 /* 16K per mapped page */
-#endif /* PAGE_SIZE */
-
-#define IOPGSIZE (1 << IOPFNSHIFT)
-#define IOPG(x) ((x) >> IOPFNSHIFT)
-#define IOPGOFF(x) ((x) & (IOPGSIZE-1))
-
-/* Bridge RAM sizes */
-
-#define BRIDGE_INTERNAL_ATES 128
-#define XBRIDGE_INTERNAL_ATES 1024
-
-#define BRIDGE_ATE_RAM_SIZE (BRIDGE_INTERNAL_ATES<<3) /* 1kB ATE */
-#define XBRIDGE_ATE_RAM_SIZE (XBRIDGE_INTERNAL_ATES<<3) /* 8kB ATE */
-
-#define PIC_WR_REQ_BUFSIZE 256
-
-#define BRIDGE_CONFIG_BASE 0x20000 /* start of bridge's */
- /* map to each device's */
- /* config space */
-#define BRIDGE_CONFIG1_BASE 0x28000 /* type 1 device config space */
-#define BRIDGE_CONFIG_END 0x30000
-#define BRIDGE_CONFIG_SLOT_SIZE 0x1000 /* each map == 4k */
-
-#define BRIDGE_SSRAM_512K 0x00080000 /* 512kB */
-#define BRIDGE_SSRAM_128K 0x00020000 /* 128kB */
-#define BRIDGE_SSRAM_64K 0x00010000 /* 64kB */
-#define BRIDGE_SSRAM_0K 0x00000000 /* 0kB */
-
-/* ========================================================================
- * Bridge address map
- */
-
-#ifndef __ASSEMBLY__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
- * All accesses to bridge hardware registers must be done
- * using 32-bit loads and stores.
- */
-typedef uint32_t bridgereg_t;
-
-typedef uint64_t bridge_ate_t;
-
-/* pointers to bridge ATEs
- * are always "pointer to volatile"
- */
-typedef volatile bridge_ate_t *bridge_ate_p;
-
-/*
- * It is generally preferred that hardware registers on the bridge
- * are located from C code via this structure.
- *
- * Generated from Bridge spec dated 04oct95
- */
-
-
-/*
- * pic_widget_cfg_s is a local definition of widget_cfg_t but with
- * a union of 64bit & 32bit registers, since PIC has 64bit widget
- * registers but BRIDGE and XBRIDGE have 32bit. PIC registers that
- * have valid bits (ie. not just reserved) in the upper 32bits are
- * defined as a union so we can access them as 64bit for PIC and
- * as 32bit for BRIDGE and XBRIDGE.
- */
-typedef volatile struct pic_widget_cfg_s {
- bridgereg_t _b_wid_id; /* 0x000004 */
- bridgereg_t _pad_000000;
-
- union {
- picreg_t _p_wid_stat; /* 0x000008 */
- struct {
- bridgereg_t _b_wid_stat; /* 0x00000C */
- bridgereg_t _b_pad_000008;
- } _b;
- } u_wid_stat;
- #define __p_wid_stat_64 u_wid_stat._p_wid_stat
- #define __b_wid_stat u_wid_stat._b._b_wid_stat
-
- bridgereg_t _b_wid_err_upper; /* 0x000014 */
- bridgereg_t _pad_000010;
-
- union {
- picreg_t _p_wid_err_lower; /* 0x000018 */
- struct {
- bridgereg_t _b_wid_err_lower; /* 0x00001C */
- bridgereg_t _b_pad_000018;
- } _b;
- } u_wid_err_lower;
- #define __p_wid_err_64 u_wid_err_lower._p_wid_err_lower
- #define __b_wid_err_lower u_wid_err_lower._b._b_wid_err_lower
-
- union {
- picreg_t _p_wid_control; /* 0x000020 */
- struct {
- bridgereg_t _b_wid_control; /* 0x000024 */
- bridgereg_t _b_pad_000020;
- } _b;
- } u_wid_control;
- #define __p_wid_control_64 u_wid_control._p_wid_control
- #define __b_wid_control u_wid_control._b._b_wid_control
-
- bridgereg_t _b_wid_req_timeout; /* 0x00002C */
- bridgereg_t _pad_000028;
-
- bridgereg_t _b_wid_int_upper; /* 0x000034 */
- bridgereg_t _pad_000030;
-
- union {
- picreg_t _p_wid_int_lower; /* 0x000038 */
- struct {
- bridgereg_t _b_wid_int_lower; /* 0x00003C */
- bridgereg_t _b_pad_000038;
- } _b;
- } u_wid_int_lower;
- #define __p_wid_int_64 u_wid_int_lower._p_wid_int_lower
- #define __b_wid_int_lower u_wid_int_lower._b._b_wid_int_lower
-
- bridgereg_t _b_wid_err_cmdword; /* 0x000044 */
- bridgereg_t _pad_000040;
-
- bridgereg_t _b_wid_llp; /* 0x00004C */
- bridgereg_t _pad_000048;
-
- bridgereg_t _b_wid_tflush; /* 0x000054 */
- bridgereg_t _pad_000050;
-} pic_widget_cfg_t;
-
-/*
- * BRIDGE, XBRIDGE, PIC register definitions. NOTE: Prior to PIC, registers
- * were a 32bit quantity and double word aligned (and only accessible as a
- * 32bit word. PIC registers are 64bits and accessible as words or double
- * words. PIC registers that have valid bits (ie. not just reserved) in the
- * upper 32bits are defined as a union of one 64bit picreg_t and two 32bit
- * bridgereg_t so we can access them both ways.
- *
- * It is generally preferred that hardware registers on the bridge are
- * located from C code via this structure.
- *
- * Generated from Bridge spec dated 04oct95
- */
-
-typedef volatile struct bridge_s {
-
- /* 0x000000-0x00FFFF -- Local Registers */
-
- /* 0x000000-0x000057 -- Standard Widget Configuration */
- union {
- widget_cfg_t xtalk_widget_def; /* 0x000000 */
- pic_widget_cfg_t local_widget_def; /* 0x000000 */
- } u_wid;
-
- /* 32bit widget register access via the widget_cfg_t */
- #define b_widget u_wid.xtalk_widget_def
-
- /* 32bit widget register access via the pic_widget_cfg_t */
- #define b_wid_id u_wid.local_widget_def._b_wid_id
- #define b_wid_stat u_wid.local_widget_def.__b_wid_stat
- #define b_wid_err_upper u_wid.local_widget_def._b_wid_err_upper
- #define b_wid_err_lower u_wid.local_widget_def.__b_wid_err_lower
- #define b_wid_control u_wid.local_widget_def.__b_wid_control
- #define b_wid_req_timeout u_wid.local_widget_def._b_wid_req_timeout
- #define b_wid_int_upper u_wid.local_widget_def._b_wid_int_upper
- #define b_wid_int_lower u_wid.local_widget_def.__b_wid_int_lower
- #define b_wid_err_cmdword u_wid.local_widget_def._b_wid_err_cmdword
- #define b_wid_llp u_wid.local_widget_def._b_wid_llp
- #define b_wid_tflush u_wid.local_widget_def._b_wid_tflush
-
- /* 64bit widget register access via the pic_widget_cfg_t */
- #define p_wid_stat_64 u_wid.local_widget_def.__p_wid_stat_64
- #define p_wid_err_64 u_wid.local_widget_def.__p_wid_err_64
- #define p_wid_control_64 u_wid.local_widget_def.__p_wid_control_64
- #define p_wid_int_64 u_wid.local_widget_def.__p_wid_int_64
-
- /* 0x000058-0x00007F -- Bridge-specific Widget Configuration */
- bridgereg_t b_wid_aux_err; /* 0x00005C */
- bridgereg_t _pad_000058;
-
- bridgereg_t b_wid_resp_upper; /* 0x000064 */
- bridgereg_t _pad_000060;
-
- union {
- picreg_t _p_wid_resp_lower; /* 0x000068 */
- struct {
- bridgereg_t _b_wid_resp_lower; /* 0x00006C */
- bridgereg_t _b_pad_000068;
- } _b;
- } u_wid_resp_lower;
- #define p_wid_resp_64 u_wid_resp_lower._p_wid_resp_lower
- #define b_wid_resp_lower u_wid_resp_lower._b._b_wid_resp_lower
-
- bridgereg_t b_wid_tst_pin_ctrl; /* 0x000074 */
- bridgereg_t _pad_000070;
-
- union {
- picreg_t _p_addr_lkerr; /* 0x000078 */
- struct {
- bridgereg_t _b_pad_00007C;
- bridgereg_t _b_pad_000078;
- } _b;
- } u_addr_lkerr;
- #define p_addr_lkerr_64 u_addr_lkerr._p_addr_lkerr
-
- /* 0x000080-0x00008F -- PMU */
- bridgereg_t b_dir_map; /* 0x000084 */
- bridgereg_t _pad_000080;
-
- bridgereg_t _pad_00008C;
- bridgereg_t _pad_000088;
-
- /* 0x000090-0x00009F -- SSRAM */
- bridgereg_t b_ram_perr_or_map_fault;/* 0x000094 */
- bridgereg_t _pad_000090;
- #define b_ram_perr b_ram_perr_or_map_fault /* Bridge */
- #define b_map_fault b_ram_perr_or_map_fault /* Xbridge & PIC */
-
- bridgereg_t _pad_00009C;
- bridgereg_t _pad_000098;
-
- /* 0x0000A0-0x0000AF -- Arbitration */
- bridgereg_t b_arb; /* 0x0000A4 */
- bridgereg_t _pad_0000A0;
-
- bridgereg_t _pad_0000AC;
- bridgereg_t _pad_0000A8;
-
- /* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */
- union {
- picreg_t _p_ate_parity_err; /* 0x0000B0 */
- struct {
- bridgereg_t _b_nic; /* 0x0000B4 */
- bridgereg_t _b_pad_0000B0;
- } _b;
- } u_ate_parity_err_or_nic;
- #define p_ate_parity_err_64 u_ate_parity_err_or_nic._p_ate_parity_err
- #define b_nic u_ate_parity_err_or_nic._b._b_nic
-
- bridgereg_t _pad_0000BC;
- bridgereg_t _pad_0000B8;
-
- /* 0x0000C0-0x0000FF -- PCI/GIO */
- bridgereg_t b_bus_timeout; /* 0x0000C4 */
- bridgereg_t _pad_0000C0;
- #define b_pci_bus_timeout b_bus_timeout
-
- bridgereg_t b_pci_cfg; /* 0x0000CC */
- bridgereg_t _pad_0000C8;
-
- bridgereg_t b_pci_err_upper; /* 0x0000D4 */
- bridgereg_t _pad_0000D0;
- #define b_gio_err_upper b_pci_err_upper
-
- union {
- picreg_t _p_pci_err_lower; /* 0x0000D8 */
- struct {
- bridgereg_t _b_pci_err_lower; /* 0x0000DC */
- bridgereg_t _b_pad_0000D8;
- } _b;
- } u_pci_err_lower;
- #define p_pci_err_64 u_pci_err_lower._p_pci_err_lower
- #define b_pci_err_lower u_pci_err_lower._b._b_pci_err_lower
- #define b_gio_err_lower b_pci_err_lower
-
- bridgereg_t _pad_0000E0[8];
-
- /* 0x000100-0x0001FF -- Interrupt */
- union {
- picreg_t _p_int_status; /* 0x000100 */
- struct {
- bridgereg_t _b_int_status; /* 0x000104 */
- bridgereg_t _b_pad_000100;
- } _b;
- } u_int_status;
- #define p_int_status_64 u_int_status._p_int_status
- #define b_int_status u_int_status._b._b_int_status
-
- union {
- picreg_t _p_int_enable; /* 0x000108 */
- struct {
- bridgereg_t _b_int_enable; /* 0x00010C */
- bridgereg_t _b_pad_000108;
- } _b;
- } u_int_enable;
- #define p_int_enable_64 u_int_enable._p_int_enable
- #define b_int_enable u_int_enable._b._b_int_enable
-
- union {
- picreg_t _p_int_rst_stat; /* 0x000110 */
- struct {
- bridgereg_t _b_int_rst_stat; /* 0x000114 */
- bridgereg_t _b_pad_000110;
- } _b;
- } u_int_rst_stat;
- #define p_int_rst_stat_64 u_int_rst_stat._p_int_rst_stat
- #define b_int_rst_stat u_int_rst_stat._b._b_int_rst_stat
-
- bridgereg_t b_int_mode; /* 0x00011C */
- bridgereg_t _pad_000118;
-
- bridgereg_t b_int_device; /* 0x000124 */
- bridgereg_t _pad_000120;
-
- bridgereg_t b_int_host_err; /* 0x00012C */
- bridgereg_t _pad_000128;
-
- union {
- picreg_t _p_int_addr[8]; /* 0x0001{30,,,68} */
- struct {
- bridgereg_t addr; /* 0x0001{34,,,6C} */
- bridgereg_t _b_pad;
- } _b[8];
- } u_int_addr;
- #define p_int_addr_64 u_int_addr._p_int_addr
- #define b_int_addr u_int_addr._b
-
- union {
- picreg_t _p_err_int_view; /* 0x000170 */
- struct {
- bridgereg_t _b_err_int_view; /* 0x000174 */
- bridgereg_t _b_pad_000170;
- } _b;
- } u_err_int_view;
- #define p_err_int_view_64 u_err_int_view._p_err_int_view
- #define b_err_int_view u_err_int_view._b._b_err_int_view
-
- union {
- picreg_t _p_mult_int; /* 0x000178 */
- struct {
- bridgereg_t _b_mult_int; /* 0x00017C */
- bridgereg_t _b_pad_000178;
- } _b;
- } u_mult_int;
- #define p_mult_int_64 u_mult_int._p_mult_int
- #define b_mult_int u_mult_int._b._b_mult_int
-
- struct {
- bridgereg_t intr; /* 0x0001{84,,,BC} */
- bridgereg_t __pad;
- } b_force_always[8];
-
- struct {
- bridgereg_t intr; /* 0x0001{C4,,,FC} */
- bridgereg_t __pad;
- } b_force_pin[8];
-
- /* 0x000200-0x0003FF -- Device */
- struct {
- bridgereg_t reg; /* 0x0002{04,,,3C} */
- bridgereg_t __pad;
- } b_device[8];
-
- struct {
- bridgereg_t reg; /* 0x0002{44,,,7C} */
- bridgereg_t __pad;
- } b_wr_req_buf[8];
-
- struct {
- bridgereg_t reg; /* 0x0002{84,,,8C} */
- bridgereg_t __pad;
- } b_rrb_map[2];
- #define b_even_resp b_rrb_map[0].reg /* 0x000284 */
- #define b_odd_resp b_rrb_map[1].reg /* 0x00028C */
-
- bridgereg_t b_resp_status; /* 0x000294 */
- bridgereg_t _pad_000290;
-
- bridgereg_t b_resp_clear; /* 0x00029C */
- bridgereg_t _pad_000298;
-
- bridgereg_t _pad_0002A0[24];
-
- /* Xbridge/PIC only */
- union {
- struct {
- picreg_t lower; /* 0x0003{08,,,F8} */
- picreg_t upper; /* 0x0003{00,,,F0} */
- } _p[16];
- struct {
- bridgereg_t upper; /* 0x0003{04,,,F4} */
- bridgereg_t _b_pad1;
- bridgereg_t lower; /* 0x0003{0C,,,FC} */
- bridgereg_t _b_pad2;
- } _b[16];
- } u_buf_addr_match;
- #define p_buf_addr_match_64 u_buf_addr_match._p
- #define b_buf_addr_match u_buf_addr_match._b
-
- /* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */
- struct {
- bridgereg_t flush_w_touch; /* 0x000{404,,,5C4} */
- bridgereg_t __pad1;
- bridgereg_t flush_wo_touch; /* 0x000{40C,,,5CC} */
- bridgereg_t __pad2;
- bridgereg_t inflight; /* 0x000{414,,,5D4} */
- bridgereg_t __pad3;
- bridgereg_t prefetch; /* 0x000{41C,,,5DC} */
- bridgereg_t __pad4;
- bridgereg_t total_pci_retry; /* 0x000{424,,,5E4} */
- bridgereg_t __pad5;
- bridgereg_t max_pci_retry; /* 0x000{42C,,,5EC} */
- bridgereg_t __pad6;
- bridgereg_t max_latency; /* 0x000{434,,,5F4} */
- bridgereg_t __pad7;
- bridgereg_t clear_all; /* 0x000{43C,,,5FC} */
- bridgereg_t __pad8;
- } b_buf_count[8];
-
- /*
- * "PCI/X registers that are specific to PIC". See pic.h.
- */
-
- /* 0x000600-0x0009FF -- PCI/X registers */
- picreg_t p_pcix_bus_err_addr_64; /* 0x000600 */
- picreg_t p_pcix_bus_err_attr_64; /* 0x000608 */
- picreg_t p_pcix_bus_err_data_64; /* 0x000610 */
- picreg_t p_pcix_pio_split_addr_64; /* 0x000618 */
- picreg_t p_pcix_pio_split_attr_64; /* 0x000620 */
- picreg_t p_pcix_dma_req_err_attr_64; /* 0x000628 */
- picreg_t p_pcix_dma_req_err_addr_64; /* 0x000630 */
- picreg_t p_pcix_timeout_64; /* 0x000638 */
-
- picreg_t _pad_000600[120];
-
- /* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */
- struct {
- picreg_t p_buf_attr; /* 0X000{A08,,,AF8} */
- picreg_t p_buf_addr; /* 0x000{A00,,,AF0} */
- } p_pcix_read_buf_64[16];
-
- struct {
- picreg_t p_buf_attr; /* 0x000{B08,,,BE8} */
- picreg_t p_buf_addr; /* 0x000{B00,,,BE0} */
- picreg_t __pad1; /* 0x000{B18,,,BF8} */
- picreg_t p_buf_valid; /* 0x000{B10,,,BF0} */
- } p_pcix_write_buf_64[8];
-
- /*
- * end "PCI/X registers that are specific to PIC"
- */
-
- char _pad_000c00[0x010000 - 0x000c00];
-
- /* 0x010000-0x011fff -- Internal Address Translation Entry RAM */
- /*
- * Xbridge and PIC have 1024 internal ATE's and the Bridge has 128.
- * Make enough room for the Xbridge/PIC ATE's and depend on runtime
- * checks to limit access to bridge ATE's.
- *
- * In [X]bridge the internal ATE Ram is writen as double words only,
- * but due to internal design issues it is read back as single words.
- * i.e:
- * b_int_ate_ram[index].hi.rd << 32 | xb_int_ate_ram_lo[index].rd
- */
- union {
- bridge_ate_t wr; /* write-only */ /* 0x01{0000,,,1FF8} */
- struct {
- bridgereg_t rd; /* read-only */ /* 0x01{0004,,,1FFC} */
- bridgereg_t _p_pad;
- } hi;
- } b_int_ate_ram[XBRIDGE_INTERNAL_ATES];
- #define b_int_ate_ram_lo(idx) b_int_ate_ram[idx+512].hi.rd
-
- /* 0x012000-0x013fff -- Internal Address Translation Entry RAM LOW */
- struct {
- bridgereg_t rd; /* read-only */ /* 0x01{2004,,,3FFC} */
- bridgereg_t _p_pad;
- } xb_int_ate_ram_lo[XBRIDGE_INTERNAL_ATES];
-
- char _pad_014000[0x18000 - 0x014000];
-
- /* 0x18000-0x197F8 -- PIC Write Request Ram */
- /* 0x18000 - 0x187F8 */
- picreg_t p_wr_req_lower[PIC_WR_REQ_BUFSIZE];
- /* 0x18800 - 0x18FF8 */
- picreg_t p_wr_req_upper[PIC_WR_REQ_BUFSIZE];
- /* 0x19000 - 0x197F8 */
- picreg_t p_wr_req_parity[PIC_WR_REQ_BUFSIZE];
-
- char _pad_019800[0x20000 - 0x019800];
-
- /* 0x020000-0x027FFF -- PCI Device Configuration Spaces */
- union { /* make all access sizes available. */
- unsigned char c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */
- uint16_t s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */
- uint32_t l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */
- uint64_t d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */
- union {
- unsigned char c[0x100 / 1];
- uint16_t s[0x100 / 2];
- uint32_t l[0x100 / 4];
- uint64_t d[0x100 / 8];
- } f[8];
- } b_type0_cfg_dev[8]; /* 0x02{0000,,,7FFF} */
-
- /* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */
- union { /* make all access sizes available. */
- unsigned char c[0x1000 / 1];
- uint16_t s[0x1000 / 2];
- uint32_t l[0x1000 / 4];
- uint64_t d[0x1000 / 8];
- union {
- unsigned char c[0x100 / 1];
- uint16_t s[0x100 / 2];
- uint32_t l[0x100 / 4];
- uint64_t d[0x100 / 8];
- } f[8];
- } b_type1_cfg; /* 0x028000-0x029000 */
-
- char _pad_029000[0x007000]; /* 0x029000-0x030000 */
-
- /* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */
- union {
- unsigned char c[8 / 1];
- uint16_t s[8 / 2];
- uint32_t l[8 / 4];
- uint64_t d[8 / 8];
- } b_pci_iack; /* 0x030000-0x030007 */
-
- unsigned char _pad_030007[0x04fff8]; /* 0x030008-0x07FFFF */
-
- /* 0x080000-0x0FFFFF -- External Address Translation Entry RAM */
- bridge_ate_t b_ext_ate_ram[0x10000];
-
- /* 0x100000-0x1FFFFF -- Reserved */
- char _pad_100000[0x200000-0x100000];
-
- /* 0x200000-0xBFFFFF -- PCI/GIO Device Spaces */
- union { /* make all access sizes available. */
- unsigned char c[0x100000 / 1];
- uint16_t s[0x100000 / 2];
- uint32_t l[0x100000 / 4];
- uint64_t d[0x100000 / 8];
- } b_devio_raw[10];
-
- /* b_devio macro is a bit strange; it reflects the
- * fact that the Bridge ASIC provides 2M for the
- * first two DevIO windows and 1M for the other six.
- */
- #define b_devio(n) b_devio_raw[((n)<2)?(n*2):(n+2)]
-
- /* 0xC00000-0xFFFFFF -- External Flash Proms 1,0 */
- union { /* make all access sizes available. */
- unsigned char c[0x400000 / 1]; /* read-only */
- uint16_t s[0x400000 / 2]; /* read-write */
- uint32_t l[0x400000 / 4]; /* read-only */
- uint64_t d[0x400000 / 8]; /* read-only */
- } b_external_flash;
-} bridge_t;
-
-#define berr_field berr_un.berr_st
-#endif /* __ASSEMBLY__ */
-
-/*
- * The values of these macros can and should be crosschecked
- * regularly against the offsets of the like-named fields
- * within the "bridge_t" structure above.
- */
-
-/* Byte offset macros for Bridge internal registers */
-
-#define BRIDGE_WID_ID WIDGET_ID
-#define BRIDGE_WID_STAT WIDGET_STATUS
-#define BRIDGE_WID_ERR_UPPER WIDGET_ERR_UPPER_ADDR
-#define BRIDGE_WID_ERR_LOWER WIDGET_ERR_LOWER_ADDR
-#define BRIDGE_WID_CONTROL WIDGET_CONTROL
-#define BRIDGE_WID_REQ_TIMEOUT WIDGET_REQ_TIMEOUT
-#define BRIDGE_WID_INT_UPPER WIDGET_INTDEST_UPPER_ADDR
-#define BRIDGE_WID_INT_LOWER WIDGET_INTDEST_LOWER_ADDR
-#define BRIDGE_WID_ERR_CMDWORD WIDGET_ERR_CMD_WORD
-#define BRIDGE_WID_LLP WIDGET_LLP_CFG
-#define BRIDGE_WID_TFLUSH WIDGET_TFLUSH
-
-#define BRIDGE_WID_AUX_ERR 0x00005C /* Aux Error Command Word */
-#define BRIDGE_WID_RESP_UPPER 0x000064 /* Response Buf Upper Addr */
-#define BRIDGE_WID_RESP_LOWER 0x00006C /* Response Buf Lower Addr */
-#define BRIDGE_WID_TST_PIN_CTRL 0x000074 /* Test pin control */
-
-#define BRIDGE_DIR_MAP 0x000084 /* Direct Map reg */
-
-/* Bridge has SSRAM Parity Error and Xbridge has Map Fault here */
-#define BRIDGE_RAM_PERR 0x000094 /* SSRAM Parity Error */
-#define BRIDGE_MAP_FAULT 0x000094 /* Map Fault */
-
-#define BRIDGE_ARB 0x0000A4 /* Arbitration Priority reg */
-
-#define BRIDGE_NIC 0x0000B4 /* Number In A Can */
-
-#define BRIDGE_BUS_TIMEOUT 0x0000C4 /* Bus Timeout Register */
-#define BRIDGE_PCI_BUS_TIMEOUT BRIDGE_BUS_TIMEOUT
-#define BRIDGE_PCI_CFG 0x0000CC /* PCI Type 1 Config reg */
-#define BRIDGE_PCI_ERR_UPPER 0x0000D4 /* PCI error Upper Addr */
-#define BRIDGE_PCI_ERR_LOWER 0x0000DC /* PCI error Lower Addr */
-
-#define BRIDGE_INT_STATUS 0x000104 /* Interrupt Status */
-#define BRIDGE_INT_ENABLE 0x00010C /* Interrupt Enables */
-#define BRIDGE_INT_RST_STAT 0x000114 /* Reset Intr Status */
-#define BRIDGE_INT_MODE 0x00011C /* Interrupt Mode */
-#define BRIDGE_INT_DEVICE 0x000124 /* Interrupt Device */
-#define BRIDGE_INT_HOST_ERR 0x00012C /* Host Error Field */
-
-#define BRIDGE_INT_ADDR0 0x000134 /* Host Address Reg */
-#define BRIDGE_INT_ADDR_OFF 0x000008 /* Host Addr offset (1..7) */
-#define BRIDGE_INT_ADDR(x) (BRIDGE_INT_ADDR0+(x)*BRIDGE_INT_ADDR_OFF)
-
-#define BRIDGE_INT_VIEW 0x000174 /* Interrupt view */
-#define BRIDGE_MULTIPLE_INT 0x00017c /* Multiple interrupt occurred */
-
-#define BRIDGE_FORCE_ALWAYS0 0x000184 /* Force an interrupt (always)*/
-#define BRIDGE_FORCE_ALWAYS_OFF 0x000008 /* Force Always offset */
-#define BRIDGE_FORCE_ALWAYS(x) (BRIDGE_FORCE_ALWAYS0+(x)*BRIDGE_FORCE_ALWAYS_OFF)
-
-#define BRIDGE_FORCE_PIN0 0x0001c4 /* Force an interrupt */
-#define BRIDGE_FORCE_PIN_OFF 0x000008 /* Force Pin offset */
-#define BRIDGE_FORCE_PIN(x) (BRIDGE_FORCE_PIN0+(x)*BRIDGE_FORCE_PIN_OFF)
-
-#define BRIDGE_DEVICE0 0x000204 /* Device 0 */
-#define BRIDGE_DEVICE_OFF 0x000008 /* Device offset (1..7) */
-#define BRIDGE_DEVICE(x) (BRIDGE_DEVICE0+(x)*BRIDGE_DEVICE_OFF)
-
-#define BRIDGE_WR_REQ_BUF0 0x000244 /* Write Request Buffer 0 */
-#define BRIDGE_WR_REQ_BUF_OFF 0x000008 /* Buffer Offset (1..7) */
-#define BRIDGE_WR_REQ_BUF(x) (BRIDGE_WR_REQ_BUF0+(x)*BRIDGE_WR_REQ_BUF_OFF)
-
-#define BRIDGE_EVEN_RESP 0x000284 /* Even Device Response Buf */
-#define BRIDGE_ODD_RESP 0x00028C /* Odd Device Response Buf */
-
-#define BRIDGE_RESP_STATUS 0x000294 /* Read Response Status reg */
-#define BRIDGE_RESP_CLEAR 0x00029C /* Read Response Clear reg */
-
-#define BRIDGE_BUF_ADDR_UPPER0 0x000304
-#define BRIDGE_BUF_ADDR_UPPER_OFF 0x000010 /* PCI Buffer Upper Offset */
-#define BRIDGE_BUF_ADDR_UPPER(x) (BRIDGE_BUF_ADDR_UPPER0+(x)*BRIDGE_BUF_ADDR_UPPER_OFF)
-
-#define BRIDGE_BUF_ADDR_LOWER0 0x00030c
-#define BRIDGE_BUF_ADDR_LOWER_OFF 0x000010 /* PCI Buffer Upper Offset */
-#define BRIDGE_BUF_ADDR_LOWER(x) (BRIDGE_BUF_ADDR_LOWER0+(x)*BRIDGE_BUF_ADDR_LOWER_OFF)
-
-/*
- * Performance Monitor Registers.
- *
- * The Performance registers are those registers which are associated with
- * monitoring the performance of PCI generated reads to the host environ
- * ment. Because of the size of the register file only the even registers
- * were instrumented.
- */
-
-#define BRIDGE_BUF_OFF 0x40
-#define BRIDGE_BUF_NEXT(base, off) (base+((off)*BRIDGE_BUF_OFF))
-
-/*
- * Buffer (x) Flush Count with Data Touch Register.
- *
- * This counter is incremented each time the corresponding response buffer
- * is flushed after at least a single data element in the buffer is used.
- * A word write to this address clears the count.
- */
-
-#define BRIDGE_BUF_0_FLUSH_TOUCH 0x000404
-#define BRIDGE_BUF_2_FLUSH_TOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_TOUCH, 1)
-#define BRIDGE_BUF_4_FLUSH_TOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_TOUCH, 2)
-#define BRIDGE_BUF_6_FLUSH_TOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_TOUCH, 3)
-#define BRIDGE_BUF_8_FLUSH_TOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_TOUCH, 4)
-#define BRIDGE_BUF_10_FLUSH_TOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_TOUCH, 5)
-#define BRIDGE_BUF_12_FLUSH_TOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_TOUCH, 6)
-#define BRIDGE_BUF_14_FLUSH_TOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_TOUCH, 7)
-
-/*
- * Buffer (x) Flush Count w/o Data Touch Register
- *
- * This counter is incremented each time the corresponding response buffer
- * is flushed without any data element in the buffer being used. A word
- * write to this address clears the count.
- */
-
-
-#define BRIDGE_BUF_0_FLUSH_NOTOUCH 0x00040c
-#define BRIDGE_BUF_2_FLUSH_NOTOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_NOTOUCH, 1)
-#define BRIDGE_BUF_4_FLUSH_NOTOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_NOTOUCH, 2)
-#define BRIDGE_BUF_6_FLUSH_NOTOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_NOTOUCH, 3)
-#define BRIDGE_BUF_8_FLUSH_NOTOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_NOTOUCH, 4)
-#define BRIDGE_BUF_10_FLUSH_NOTOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_NOTOUCH, 5)
-#define BRIDGE_BUF_12_FLUSH_NOTOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_NOTOUCH, 6)
-#define BRIDGE_BUF_14_FLUSH_NOTOUCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_FLUSH_NOTOUCH, 7)
-
-/*
- * Buffer (x) Request in Flight Count Register
- *
- * This counter is incremented on each bus clock while the request is in
- * flight. A word write to this address clears the count.
- */
-
-#define BRIDGE_BUF_0_INFLIGHT 0x000414
-#define BRIDGE_BUF_2_INFLIGHT BRIDGE_BUF_NEXT(BRIDGE_BUF_0_INFLIGHT, 1)
-#define BRIDGE_BUF_4_INFLIGHT BRIDGE_BUF_NEXT(BRIDGE_BUF_0_INFLIGHT, 2)
-#define BRIDGE_BUF_6_INFLIGHT BRIDGE_BUF_NEXT(BRIDGE_BUF_0_INFLIGHT, 3)
-#define BRIDGE_BUF_8_INFLIGHT BRIDGE_BUF_NEXT(BRIDGE_BUF_0_INFLIGHT, 4)
-#define BRIDGE_BUF_10_INFLIGHT BRIDGE_BUF_NEXT(BRIDGE_BUF_0_INFLIGHT, 5)
-#define BRIDGE_BUF_12_INFLIGHT BRIDGE_BUF_NEXT(BRIDGE_BUF_0_INFLIGHT, 6)
-#define BRIDGE_BUF_14_INFLIGHT BRIDGE_BUF_NEXT(BRIDGE_BUF_0_INFLIGHT, 7)
-
-/*
- * Buffer (x) Prefetch Request Count Register
- *
- * This counter is incremented each time the request using this buffer was
- * generated from the prefetcher. A word write to this address clears the
- * count.
- */
-
-#define BRIDGE_BUF_0_PREFETCH 0x00041C
-#define BRIDGE_BUF_2_PREFETCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PREFETCH, 1)
-#define BRIDGE_BUF_4_PREFETCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PREFETCH, 2)
-#define BRIDGE_BUF_6_PREFETCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PREFETCH, 3)
-#define BRIDGE_BUF_8_PREFETCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PREFETCH, 4)
-#define BRIDGE_BUF_10_PREFETCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PREFETCH, 5)
-#define BRIDGE_BUF_12_PREFETCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PREFETCH, 6)
-#define BRIDGE_BUF_14_PREFETCH BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PREFETCH, 7)
-
-/*
- * Buffer (x) Total PCI Retry Count Register
- *
- * This counter is incremented each time a PCI bus retry occurs and the ad
- * dress matches the tag for the selected buffer. The buffer must also has
- * this request in-flight. A word write to this address clears the count.
- */
-
-#define BRIDGE_BUF_0_PCI_RETRY 0x000424
-#define BRIDGE_BUF_2_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PCI_RETRY, 1)
-#define BRIDGE_BUF_4_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PCI_RETRY, 2)
-#define BRIDGE_BUF_6_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PCI_RETRY, 3)
-#define BRIDGE_BUF_8_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PCI_RETRY, 4)
-#define BRIDGE_BUF_10_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PCI_RETRY, 5)
-#define BRIDGE_BUF_12_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PCI_RETRY, 6)
-#define BRIDGE_BUF_14_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_PCI_RETRY, 7)
-
-/*
- * Buffer (x) Max PCI Retry Count Register
- *
- * This counter is contains the maximum retry count for a single request
- * which was in-flight for this buffer. A word write to this address
- * clears the count.
- */
-
-#define BRIDGE_BUF_0_MAX_PCI_RETRY 0x00042C
-#define BRIDGE_BUF_2_MAX_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_PCI_RETRY, 1)
-#define BRIDGE_BUF_4_MAX_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_PCI_RETRY, 2)
-#define BRIDGE_BUF_6_MAX_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_PCI_RETRY, 3)
-#define BRIDGE_BUF_8_MAX_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_PCI_RETRY, 4)
-#define BRIDGE_BUF_10_MAX_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_PCI_RETRY, 5)
-#define BRIDGE_BUF_12_MAX_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_PCI_RETRY, 6)
-#define BRIDGE_BUF_14_MAX_PCI_RETRY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_PCI_RETRY, 7)
-
-/*
- * Buffer (x) Max Latency Count Register
- *
- * This counter is contains the maximum count (in bus clocks) for a single
- * request which was in-flight for this buffer. A word write to this
- * address clears the count.
- */
-
-#define BRIDGE_BUF_0_MAX_LATENCY 0x000434
-#define BRIDGE_BUF_2_MAX_LATENCY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_LATENCY, 1)
-#define BRIDGE_BUF_4_MAX_LATENCY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_LATENCY, 2)
-#define BRIDGE_BUF_6_MAX_LATENCY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_LATENCY, 3)
-#define BRIDGE_BUF_8_MAX_LATENCY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_LATENCY, 4)
-#define BRIDGE_BUF_10_MAX_LATENCY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_LATENCY, 5)
-#define BRIDGE_BUF_12_MAX_LATENCY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_LATENCY, 6)
-#define BRIDGE_BUF_14_MAX_LATENCY BRIDGE_BUF_NEXT(BRIDGE_BUF_0_MAX_LATENCY, 7)
-
-/*
- * Buffer (x) Clear All Register
- *
- * Any access to this register clears all the count values for the (x)
- * registers.
- */
-
-#define BRIDGE_BUF_0_CLEAR_ALL 0x00043C
-#define BRIDGE_BUF_2_CLEAR_ALL BRIDGE_BUF_NEXT(BRIDGE_BUF_0_CLEAR_ALL, 1)
-#define BRIDGE_BUF_4_CLEAR_ALL BRIDGE_BUF_NEXT(BRIDGE_BUF_0_CLEAR_ALL, 2)
-#define BRIDGE_BUF_6_CLEAR_ALL BRIDGE_BUF_NEXT(BRIDGE_BUF_0_CLEAR_ALL, 3)
-#define BRIDGE_BUF_8_CLEAR_ALL BRIDGE_BUF_NEXT(BRIDGE_BUF_0_CLEAR_ALL, 4)
-#define BRIDGE_BUF_10_CLEAR_ALL BRIDGE_BUF_NEXT(BRIDGE_BUF_0_CLEAR_ALL, 5)
-#define BRIDGE_BUF_12_CLEAR_ALL BRIDGE_BUF_NEXT(BRIDGE_BUF_0_CLEAR_ALL, 6)
-#define BRIDGE_BUF_14_CLEAR_ALL BRIDGE_BUF_NEXT(BRIDGE_BUF_0_CLEAR_ALL, 7)
-
-/* end of Performance Monitor Registers */
-
-/* Byte offset macros for Bridge I/O space.
- *
- * NOTE: Where applicable please use the PCIBR_xxx or PCIBRIDGE_xxx
- * macros (below) as they will handle [X]Bridge and PIC. For example,
- * PCIBRIDGE_TYPE0_CFG_DEV0() vs BRIDGE_TYPE0_CFG_DEV0
- */
-
-#define BRIDGE_ATE_RAM 0x00010000 /* Internal Addr Xlat Ram */
-
-#define BRIDGE_TYPE0_CFG_DEV0 0x00020000 /* Type 0 Cfg, Device 0 */
-#define BRIDGE_TYPE0_CFG_SLOT_OFF 0x00001000 /* Type 0 Cfg Slot Offset (1..7) */
-#define BRIDGE_TYPE0_CFG_FUNC_OFF 0x00000100 /* Type 0 Cfg Func Offset (1..7) */
-#define BRIDGE_TYPE0_CFG_DEV(s) (BRIDGE_TYPE0_CFG_DEV0+\
- (s)*BRIDGE_TYPE0_CFG_SLOT_OFF)
-#define BRIDGE_TYPE0_CFG_DEVF(s,f) (BRIDGE_TYPE0_CFG_DEV0+\
- (s)*BRIDGE_TYPE0_CFG_SLOT_OFF+\
- (f)*BRIDGE_TYPE0_CFG_FUNC_OFF)
-
-#define BRIDGE_TYPE1_CFG 0x00028000 /* Type 1 Cfg space */
-
-#define BRIDGE_PCI_IACK 0x00030000 /* PCI Interrupt Ack */
-#define BRIDGE_EXT_SSRAM 0x00080000 /* Extern SSRAM (ATE) */
-
-/* Byte offset macros for Bridge device IO spaces */
-
-#define BRIDGE_DEV_CNT 8 /* Up to 8 devices per bridge */
-#define BRIDGE_DEVIO0 0x00200000 /* Device IO 0 Addr */
-#define BRIDGE_DEVIO1 0x00400000 /* Device IO 1 Addr */
-#define BRIDGE_DEVIO2 0x00600000 /* Device IO 2 Addr */
-#define BRIDGE_DEVIO_OFF 0x00100000 /* Device IO Offset (3..7) */
-
-#define BRIDGE_DEVIO_2MB 0x00200000 /* Device IO Offset (0..1) */
-#define BRIDGE_DEVIO_1MB 0x00100000 /* Device IO Offset (2..7) */
-
-#ifndef __ASSEMBLY__
-
-#define BRIDGE_DEVIO(x) ((x)<=1 ? BRIDGE_DEVIO0+(x)*BRIDGE_DEVIO_2MB : BRIDGE_DEVIO2+((x)-2)*BRIDGE_DEVIO_1MB)
-
-/*
- * The device space macros for PIC are more complicated because the PIC has
- * two PCI/X bridges under the same widget. For PIC bus 0, the addresses are
- * basically the same as for the [X]Bridge. For PIC bus 1, the addresses are
- * offset by 0x800000. Here are two sets of macros. They are
- * "PCIBRIDGE_xxx" that return the address based on the supplied bus number
- * and also equivalent "PCIBR_xxx" macros that may be used with a
- * pcibr_soft_s structure. Both should work with all bridges.
- */
-#define PIC_BUS1_OFFSET 0x800000
-
-#define PCIBRIDGE_TYPE0_CFG_DEV0(busnum) \
- ((busnum) ? BRIDGE_TYPE0_CFG_DEV0 + PIC_BUS1_OFFSET : \
- BRIDGE_TYPE0_CFG_DEV0)
-#define PCIBRIDGE_TYPE1_CFG(busnum) \
- ((busnum) ? BRIDGE_TYPE1_CFG + PIC_BUS1_OFFSET : BRIDGE_TYPE1_CFG)
-#define PCIBRIDGE_TYPE0_CFG_DEV(busnum, s) \
- (PCIBRIDGE_TYPE0_CFG_DEV0(busnum)+\
- (s)*BRIDGE_TYPE0_CFG_SLOT_OFF)
-#define PCIBRIDGE_TYPE0_CFG_DEVF(busnum, s, f) \
- (PCIBRIDGE_TYPE0_CFG_DEV0(busnum)+\
- (s)*BRIDGE_TYPE0_CFG_SLOT_OFF+\
- (f)*BRIDGE_TYPE0_CFG_FUNC_OFF)
-#define PCIBRIDGE_DEVIO0(busnum) ((busnum) ? \
- (BRIDGE_DEVIO0 + PIC_BUS1_OFFSET) : BRIDGE_DEVIO0)
-#define PCIBRIDGE_DEVIO1(busnum) ((busnum) ? \
- (BRIDGE_DEVIO1 + PIC_BUS1_OFFSET) : BRIDGE_DEVIO1)
-#define PCIBRIDGE_DEVIO2(busnum) ((busnum) ? \
- (BRIDGE_DEVIO2 + PIC_BUS1_OFFSET) : BRIDGE_DEVIO2)
-#define PCIBRIDGE_DEVIO(busnum, x) \
- ((x)<=1 ? PCIBRIDGE_DEVIO0(busnum)+(x)*BRIDGE_DEVIO_2MB : \
- PCIBRIDGE_DEVIO2(busnum)+((x)-2)*BRIDGE_DEVIO_1MB)
-
-#define PCIBR_BRIDGE_DEVIO0(ps) PCIBRIDGE_DEVIO0((ps)->bs_busnum)
-#define PCIBR_BRIDGE_DEVIO1(ps) PCIBRIDGE_DEVIO1((ps)->bs_busnum)
-#define PCIBR_BRIDGE_DEVIO2(ps) PCIBRIDGE_DEVIO2((ps)->bs_busnum)
-#define PCIBR_BRIDGE_DEVIO(ps, s) PCIBRIDGE_DEVIO((ps)->bs_busnum, s)
-
-#define PCIBR_TYPE1_CFG(ps) PCIBRIDGE_TYPE1_CFG((ps)->bs_busnum)
-#define PCIBR_BUS_TYPE0_CFG_DEV0(ps) PCIBR_TYPE0_CFG_DEV(ps, 0)
-#define PCIBR_TYPE0_CFG_DEV(ps, s) PCIBRIDGE_TYPE0_CFG_DEV((ps)->bs_busnum, s+1)
-#define PCIBR_BUS_TYPE0_CFG_DEVF(ps,s,f) PCIBRIDGE_TYPE0_CFG_DEVF((ps)->bs_busnum,(s+1),f)
-
-/* NOTE: 's' is the internal device number, not the external slot number */
-#define PCIBR_BUS_TYPE0_CFG_DEV(ps, s) \
- PCIBRIDGE_TYPE0_CFG_DEV((ps)->bs_busnum, s+1)
-
-#endif /* LANGUAGE_C */
-
-#define BRIDGE_EXTERNAL_FLASH 0x00C00000 /* External Flash PROMS */
-
-/* ========================================================================
- * Bridge register bit field definitions
- */
-
-/* Widget part number of bridge */
-#define BRIDGE_WIDGET_PART_NUM 0xc002
-#define XBRIDGE_WIDGET_PART_NUM 0xd002
-
-/* Manufacturer of bridge */
-#define BRIDGE_WIDGET_MFGR_NUM 0x036
-#define XBRIDGE_WIDGET_MFGR_NUM 0x024
-
-/* Revision numbers for known [X]Bridge revisions */
-#define BRIDGE_REV_A 0x1
-#define BRIDGE_REV_B 0x2
-#define BRIDGE_REV_C 0x3
-#define BRIDGE_REV_D 0x4
-#define XBRIDGE_REV_A 0x1
-#define XBRIDGE_REV_B 0x2
-
-/* macros to determine bridge type. 'wid' == widget identification */
-#define IS_PIC_BUS0(wid) (XWIDGET_PART_NUM(wid) == PIC_WIDGET_PART_NUM_BUS0 && \
- XWIDGET_MFG_NUM(wid) == PIC_WIDGET_MFGR_NUM)
-#define IS_PIC_BUS1(wid) (XWIDGET_PART_NUM(wid) == PIC_WIDGET_PART_NUM_BUS1 && \
- XWIDGET_MFG_NUM(wid) == PIC_WIDGET_MFGR_NUM)
-#define IS_PIC_BRIDGE(wid) (IS_PIC_BUS0(wid) || IS_PIC_BUS1(wid))
-
-/* Part + Rev numbers allows distinction and acscending sequence */
-#define BRIDGE_PART_REV_A (BRIDGE_WIDGET_PART_NUM << 4 | BRIDGE_REV_A)
-#define BRIDGE_PART_REV_B (BRIDGE_WIDGET_PART_NUM << 4 | BRIDGE_REV_B)
-#define BRIDGE_PART_REV_C (BRIDGE_WIDGET_PART_NUM << 4 | BRIDGE_REV_C)
-#define BRIDGE_PART_REV_D (BRIDGE_WIDGET_PART_NUM << 4 | BRIDGE_REV_D)
-#define XBRIDGE_PART_REV_A (XBRIDGE_WIDGET_PART_NUM << 4 | XBRIDGE_REV_A)
-#define XBRIDGE_PART_REV_B (XBRIDGE_WIDGET_PART_NUM << 4 | XBRIDGE_REV_B)
-
-/* Bridge widget status register bits definition */
-#define PIC_STAT_PCIX_SPEED (0x3ull << 34)
-#define PIC_STAT_PCIX_ACTIVE (0x1ull << 33)
-#define BRIDGE_STAT_LLP_REC_CNT (0xFFu << 24)
-#define BRIDGE_STAT_LLP_TX_CNT (0xFF << 16)
-#define BRIDGE_STAT_FLASH_SELECT (0x1 << 6)
-#define BRIDGE_STAT_PCI_GIO_N (0x1 << 5)
-#define BRIDGE_STAT_PENDING (0x1F << 0)
-
-/* Bridge widget control register bits definition */
-#define PIC_CTRL_NO_SNOOP (0x1ull << 62)
-#define PIC_CTRL_RELAX_ORDER (0x1ull << 61)
-#define PIC_CTRL_BUS_NUM(x) ((unsigned long long)(x) << 48)
-#define PIC_CTRL_BUS_NUM_MASK (PIC_CTRL_BUS_NUM(0xff))
-#define PIC_CTRL_DEV_NUM(x) ((unsigned long long)(x) << 43)
-#define PIC_CTRL_DEV_NUM_MASK (PIC_CTRL_DEV_NUM(0x1f))
-#define PIC_CTRL_FUN_NUM(x) ((unsigned long long)(x) << 40)
-#define PIC_CTRL_FUN_NUM_MASK (PIC_CTRL_FUN_NUM(0x7))
-#define PIC_CTRL_PAR_EN_REQ (0x1ull << 29)
-#define PIC_CTRL_PAR_EN_RESP (0x1ull << 30)
-#define PIC_CTRL_PAR_EN_ATE (0x1ull << 31)
-#define BRIDGE_CTRL_FLASH_WR_EN (0x1ul << 31) /* bridge only */
-#define BRIDGE_CTRL_EN_CLK50 (0x1 << 30)
-#define BRIDGE_CTRL_EN_CLK40 (0x1 << 29)
-#define BRIDGE_CTRL_EN_CLK33 (0x1 << 28)
-#define BRIDGE_CTRL_RST(n) ((n) << 24)
-#define BRIDGE_CTRL_RST_MASK (BRIDGE_CTRL_RST(0xF))
-#define BRIDGE_CTRL_RST_PIN(x) (BRIDGE_CTRL_RST(0x1 << (x)))
-#define BRIDGE_CTRL_IO_SWAP (0x1 << 23)
-#define BRIDGE_CTRL_MEM_SWAP (0x1 << 22)
-#define BRIDGE_CTRL_PAGE_SIZE (0x1 << 21)
-#define BRIDGE_CTRL_SS_PAR_BAD (0x1 << 20)
-#define BRIDGE_CTRL_SS_PAR_EN (0x1 << 19)
-#define BRIDGE_CTRL_SSRAM_SIZE(n) ((n) << 17)
-#define BRIDGE_CTRL_SSRAM_SIZE_MASK (BRIDGE_CTRL_SSRAM_SIZE(0x3))
-#define BRIDGE_CTRL_SSRAM_512K (BRIDGE_CTRL_SSRAM_SIZE(0x3))
-#define BRIDGE_CTRL_SSRAM_128K (BRIDGE_CTRL_SSRAM_SIZE(0x2))
-#define BRIDGE_CTRL_SSRAM_64K (BRIDGE_CTRL_SSRAM_SIZE(0x1))
-#define BRIDGE_CTRL_SSRAM_1K (BRIDGE_CTRL_SSRAM_SIZE(0x0))
-#define BRIDGE_CTRL_F_BAD_PKT (0x1 << 16)
-#define BRIDGE_CTRL_LLP_XBAR_CRD(n) ((n) << 12)
-#define BRIDGE_CTRL_LLP_XBAR_CRD_MASK (BRIDGE_CTRL_LLP_XBAR_CRD(0xf))
-#define BRIDGE_CTRL_CLR_RLLP_CNT (0x1 << 11)
-#define BRIDGE_CTRL_CLR_TLLP_CNT (0x1 << 10)
-#define BRIDGE_CTRL_SYS_END (0x1 << 9)
-#define BRIDGE_CTRL_PCI_SPEED (0x3 << 4)
-
-#define BRIDGE_CTRL_BUS_SPEED(n) ((n) << 4)
-#define BRIDGE_CTRL_BUS_SPEED_MASK (BRIDGE_CTRL_BUS_SPEED(0x3))
-#define BRIDGE_CTRL_BUS_SPEED_33 0x00
-#define BRIDGE_CTRL_BUS_SPEED_66 0x10
-#define BRIDGE_CTRL_MAX_TRANS(n) ((n) << 4)
-#define BRIDGE_CTRL_MAX_TRANS_MASK (BRIDGE_CTRL_MAX_TRANS(0x1f))
-#define BRIDGE_CTRL_WIDGET_ID(n) ((n) << 0)
-#define BRIDGE_CTRL_WIDGET_ID_MASK (BRIDGE_CTRL_WIDGET_ID(0xf))
-
-/* Bridge Response buffer Error Upper Register bit fields definition */
-#define BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT (20)
-#define BRIDGE_RESP_ERRUPPR_DEVNUM_MASK (0x7 << BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT)
-#define BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT (16)
-#define BRIDGE_RESP_ERRUPPR_BUFNUM_MASK (0xF << BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT)
-#define BRIDGE_RESP_ERRRUPPR_BUFMASK (0xFFFF)
-
-#define BRIDGE_RESP_ERRUPPR_BUFNUM(x) \
- (((x) & BRIDGE_RESP_ERRUPPR_BUFNUM_MASK) >> \
- BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT)
-
-#define BRIDGE_RESP_ERRUPPR_DEVICE(x) \
- (((x) & BRIDGE_RESP_ERRUPPR_DEVNUM_MASK) >> \
- BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT)
-
-/* Bridge direct mapping register bits definition */
-#define BRIDGE_DIRMAP_W_ID_SHFT 20
-#define BRIDGE_DIRMAP_W_ID (0xf << BRIDGE_DIRMAP_W_ID_SHFT)
-#define BRIDGE_DIRMAP_RMF_64 (0x1 << 18)
-#define BRIDGE_DIRMAP_ADD512 (0x1 << 17)
-#define BRIDGE_DIRMAP_OFF (0x1ffff << 0)
-#define BRIDGE_DIRMAP_OFF_ADDRSHFT (31) /* lsbit of DIRMAP_OFF is xtalk address bit 31 */
-
-/* Bridge Arbitration register bits definition */
-#define BRIDGE_ARB_REQ_WAIT_TICK(x) ((x) << 16)
-#define BRIDGE_ARB_REQ_WAIT_TICK_MASK BRIDGE_ARB_REQ_WAIT_TICK(0x3)
-#define BRIDGE_ARB_REQ_WAIT_EN(x) ((x) << 8)
-#define BRIDGE_ARB_REQ_WAIT_EN_MASK BRIDGE_ARB_REQ_WAIT_EN(0xff)
-#define BRIDGE_ARB_FREEZE_GNT (1 << 6)
-#define BRIDGE_ARB_HPRI_RING_B2 (1 << 5)
-#define BRIDGE_ARB_HPRI_RING_B1 (1 << 4)
-#define BRIDGE_ARB_HPRI_RING_B0 (1 << 3)
-#define BRIDGE_ARB_LPRI_RING_B2 (1 << 2)
-#define BRIDGE_ARB_LPRI_RING_B1 (1 << 1)
-#define BRIDGE_ARB_LPRI_RING_B0 (1 << 0)
-
-/* Bridge Bus time-out register bits definition */
-#define BRIDGE_BUS_PCI_RETRY_HLD(x) ((x) << 16)
-#define BRIDGE_BUS_PCI_RETRY_HLD_MASK BRIDGE_BUS_PCI_RETRY_HLD(0x1f)
-#define BRIDGE_BUS_GIO_TIMEOUT (1 << 12)
-#define BRIDGE_BUS_PCI_RETRY_CNT(x) ((x) << 0)
-#define BRIDGE_BUS_PCI_RETRY_MASK BRIDGE_BUS_PCI_RETRY_CNT(0x3ff)
-
-/* Bridge interrupt status register bits definition */
-#define PIC_ISR_PCIX_SPLIT_MSG_PE (0x1ull << 45)
-#define PIC_ISR_PCIX_SPLIT_EMSG (0x1ull << 44)
-#define PIC_ISR_PCIX_SPLIT_TO (0x1ull << 43)
-#define PIC_ISR_PCIX_UNEX_COMP (0x1ull << 42)
-#define PIC_ISR_INT_RAM_PERR (0x1ull << 41)
-#define PIC_ISR_PCIX_ARB_ERR (0x1ull << 40)
-#define PIC_ISR_PCIX_REQ_TOUT (0x1ull << 39)
-#define PIC_ISR_PCIX_TABORT (0x1ull << 38)
-#define PIC_ISR_PCIX_PERR (0x1ull << 37)
-#define PIC_ISR_PCIX_SERR (0x1ull << 36)
-#define PIC_ISR_PCIX_MRETRY (0x1ull << 35)
-#define PIC_ISR_PCIX_MTOUT (0x1ull << 34)
-#define PIC_ISR_PCIX_DA_PARITY (0x1ull << 33)
-#define PIC_ISR_PCIX_AD_PARITY (0x1ull << 32)
-#define BRIDGE_ISR_MULTI_ERR (0x1u << 31) /* bridge only */
-#define BRIDGE_ISR_PMU_ESIZE_FAULT (0x1 << 30) /* bridge only */
-#define BRIDGE_ISR_PAGE_FAULT (0x1 << 30) /* xbridge only */
-#define BRIDGE_ISR_UNEXP_RESP (0x1 << 29)
-#define BRIDGE_ISR_BAD_XRESP_PKT (0x1 << 28)
-#define BRIDGE_ISR_BAD_XREQ_PKT (0x1 << 27)
-#define BRIDGE_ISR_RESP_XTLK_ERR (0x1 << 26)
-#define BRIDGE_ISR_REQ_XTLK_ERR (0x1 << 25)
-#define BRIDGE_ISR_INVLD_ADDR (0x1 << 24)
-#define BRIDGE_ISR_UNSUPPORTED_XOP (0x1 << 23)
-#define BRIDGE_ISR_XREQ_FIFO_OFLOW (0x1 << 22)
-#define BRIDGE_ISR_LLP_REC_SNERR (0x1 << 21)
-#define BRIDGE_ISR_LLP_REC_CBERR (0x1 << 20)
-#define BRIDGE_ISR_LLP_RCTY (0x1 << 19)
-#define BRIDGE_ISR_LLP_TX_RETRY (0x1 << 18)
-#define BRIDGE_ISR_LLP_TCTY (0x1 << 17)
-#define BRIDGE_ISR_SSRAM_PERR (0x1 << 16)
-#define BRIDGE_ISR_PCI_ABORT (0x1 << 15)
-#define BRIDGE_ISR_PCI_PARITY (0x1 << 14)
-#define BRIDGE_ISR_PCI_SERR (0x1 << 13)
-#define BRIDGE_ISR_PCI_PERR (0x1 << 12)
-#define BRIDGE_ISR_PCI_MST_TIMEOUT (0x1 << 11)
-#define BRIDGE_ISR_GIO_MST_TIMEOUT BRIDGE_ISR_PCI_MST_TIMEOUT
-#define BRIDGE_ISR_PCI_RETRY_CNT (0x1 << 10)
-#define BRIDGE_ISR_XREAD_REQ_TIMEOUT (0x1 << 9)
-#define BRIDGE_ISR_GIO_B_ENBL_ERR (0x1 << 8)
-#define BRIDGE_ISR_INT_MSK (0xff << 0)
-#define BRIDGE_ISR_INT(x) (0x1 << (x))
-
-#define BRIDGE_ISR_LINK_ERROR \
- (BRIDGE_ISR_LLP_REC_SNERR|BRIDGE_ISR_LLP_REC_CBERR| \
- BRIDGE_ISR_LLP_RCTY|BRIDGE_ISR_LLP_TX_RETRY| \
- BRIDGE_ISR_LLP_TCTY)
-
-#define BRIDGE_ISR_PCIBUS_PIOERR \
- (BRIDGE_ISR_PCI_MST_TIMEOUT|BRIDGE_ISR_PCI_ABORT| \
- PIC_ISR_PCIX_MTOUT|PIC_ISR_PCIX_TABORT)
-
-#define BRIDGE_ISR_PCIBUS_ERROR \
- (BRIDGE_ISR_PCIBUS_PIOERR|BRIDGE_ISR_PCI_PERR| \
- BRIDGE_ISR_PCI_SERR|BRIDGE_ISR_PCI_RETRY_CNT| \
- BRIDGE_ISR_PCI_PARITY|PIC_ISR_PCIX_PERR| \
- PIC_ISR_PCIX_SERR|PIC_ISR_PCIX_MRETRY| \
- PIC_ISR_PCIX_AD_PARITY|PIC_ISR_PCIX_DA_PARITY| \
- PIC_ISR_PCIX_REQ_TOUT|PIC_ISR_PCIX_UNEX_COMP| \
- PIC_ISR_PCIX_SPLIT_TO|PIC_ISR_PCIX_SPLIT_EMSG| \
- PIC_ISR_PCIX_SPLIT_MSG_PE)
-
-#define BRIDGE_ISR_XTALK_ERROR \
- (BRIDGE_ISR_XREAD_REQ_TIMEOUT|BRIDGE_ISR_XREQ_FIFO_OFLOW|\
- BRIDGE_ISR_UNSUPPORTED_XOP|BRIDGE_ISR_INVLD_ADDR| \
- BRIDGE_ISR_REQ_XTLK_ERR|BRIDGE_ISR_RESP_XTLK_ERR| \
- BRIDGE_ISR_BAD_XREQ_PKT|BRIDGE_ISR_BAD_XRESP_PKT| \
- BRIDGE_ISR_UNEXP_RESP)
-
-#define BRIDGE_ISR_ERRORS \
- (BRIDGE_ISR_LINK_ERROR|BRIDGE_ISR_PCIBUS_ERROR| \
- BRIDGE_ISR_XTALK_ERROR|BRIDGE_ISR_SSRAM_PERR| \
- BRIDGE_ISR_PMU_ESIZE_FAULT|PIC_ISR_INT_RAM_PERR)
-
-/*
- * List of Errors which are fatal and kill the sytem
- */
-#define BRIDGE_ISR_ERROR_FATAL \
- ((BRIDGE_ISR_XTALK_ERROR & ~BRIDGE_ISR_XREAD_REQ_TIMEOUT)|\
- BRIDGE_ISR_PCI_SERR|BRIDGE_ISR_PCI_PARITY| \
- PIC_ISR_PCIX_SERR|PIC_ISR_PCIX_AD_PARITY| \
- PIC_ISR_PCIX_DA_PARITY| \
- PIC_ISR_INT_RAM_PERR|PIC_ISR_PCIX_SPLIT_MSG_PE )
-
-#define BRIDGE_ISR_ERROR_DUMP \
- (BRIDGE_ISR_PCIBUS_ERROR|BRIDGE_ISR_PMU_ESIZE_FAULT| \
- BRIDGE_ISR_XTALK_ERROR|BRIDGE_ISR_SSRAM_PERR| \
- PIC_ISR_PCIX_ARB_ERR|PIC_ISR_INT_RAM_PERR)
-
-/* Bridge interrupt enable register bits definition */
-#define PIC_IMR_PCIX_SPLIT_MSG_PE PIC_ISR_PCIX_SPLIT_MSG_PE
-#define PIC_IMR_PCIX_SPLIT_EMSG PIC_ISR_PCIX_SPLIT_EMSG
-#define PIC_IMR_PCIX_SPLIT_TO PIC_ISR_PCIX_SPLIT_TO
-#define PIC_IMR_PCIX_UNEX_COMP PIC_ISR_PCIX_UNEX_COMP
-#define PIC_IMR_INT_RAM_PERR PIC_ISR_INT_RAM_PERR
-#define PIC_IMR_PCIX_ARB_ERR PIC_ISR_PCIX_ARB_ERR
-#define PIC_IMR_PCIX_REQ_TOUR PIC_ISR_PCIX_REQ_TOUT
-#define PIC_IMR_PCIX_TABORT PIC_ISR_PCIX_TABORT
-#define PIC_IMR_PCIX_PERR PIC_ISR_PCIX_PERR
-#define PIC_IMR_PCIX_SERR PIC_ISR_PCIX_SERR
-#define PIC_IMR_PCIX_MRETRY PIC_ISR_PCIX_MRETRY
-#define PIC_IMR_PCIX_MTOUT PIC_ISR_PCIX_MTOUT
-#define PIC_IMR_PCIX_DA_PARITY PIC_ISR_PCIX_DA_PARITY
-#define PIC_IMR_PCIX_AD_PARITY PIC_ISR_PCIX_AD_PARITY
-#define BRIDGE_IMR_UNEXP_RESP BRIDGE_ISR_UNEXP_RESP
-#define BRIDGE_IMR_PMU_ESIZE_FAULT BRIDGE_ISR_PMU_ESIZE_FAULT
-#define BRIDGE_IMR_BAD_XRESP_PKT BRIDGE_ISR_BAD_XRESP_PKT
-#define BRIDGE_IMR_BAD_XREQ_PKT BRIDGE_ISR_BAD_XREQ_PKT
-#define BRIDGE_IMR_RESP_XTLK_ERR BRIDGE_ISR_RESP_XTLK_ERR
-#define BRIDGE_IMR_REQ_XTLK_ERR BRIDGE_ISR_REQ_XTLK_ERR
-#define BRIDGE_IMR_INVLD_ADDR BRIDGE_ISR_INVLD_ADDR
-#define BRIDGE_IMR_UNSUPPORTED_XOP BRIDGE_ISR_UNSUPPORTED_XOP
-#define BRIDGE_IMR_XREQ_FIFO_OFLOW BRIDGE_ISR_XREQ_FIFO_OFLOW
-#define BRIDGE_IMR_LLP_REC_SNERR BRIDGE_ISR_LLP_REC_SNERR
-#define BRIDGE_IMR_LLP_REC_CBERR BRIDGE_ISR_LLP_REC_CBERR
-#define BRIDGE_IMR_LLP_RCTY BRIDGE_ISR_LLP_RCTY
-#define BRIDGE_IMR_LLP_TX_RETRY BRIDGE_ISR_LLP_TX_RETRY
-#define BRIDGE_IMR_LLP_TCTY BRIDGE_ISR_LLP_TCTY
-#define BRIDGE_IMR_SSRAM_PERR BRIDGE_ISR_SSRAM_PERR
-#define BRIDGE_IMR_PCI_ABORT BRIDGE_ISR_PCI_ABORT
-#define BRIDGE_IMR_PCI_PARITY BRIDGE_ISR_PCI_PARITY
-#define BRIDGE_IMR_PCI_SERR BRIDGE_ISR_PCI_SERR
-#define BRIDGE_IMR_PCI_PERR BRIDGE_ISR_PCI_PERR
-#define BRIDGE_IMR_PCI_MST_TIMEOUT BRIDGE_ISR_PCI_MST_TIMEOUT
-#define BRIDGE_IMR_GIO_MST_TIMEOUT BRIDGE_ISR_GIO_MST_TIMEOUT
-#define BRIDGE_IMR_PCI_RETRY_CNT BRIDGE_ISR_PCI_RETRY_CNT
-#define BRIDGE_IMR_XREAD_REQ_TIMEOUT BRIDGE_ISR_XREAD_REQ_TIMEOUT
-#define BRIDGE_IMR_GIO_B_ENBL_ERR BRIDGE_ISR_GIO_B_ENBL_ERR
-#define BRIDGE_IMR_INT_MSK BRIDGE_ISR_INT_MSK
-#define BRIDGE_IMR_INT(x) BRIDGE_ISR_INT(x)
-
-/*
- * Bridge interrupt reset register bits definition. Note, PIC can
- * reset indiviual error interrupts, BRIDGE & XBRIDGE can only do
- * groups of them.
- */
-#define PIC_IRR_PCIX_SPLIT_MSG_PE PIC_ISR_PCIX_SPLIT_MSG_PE
-#define PIC_IRR_PCIX_SPLIT_EMSG PIC_ISR_PCIX_SPLIT_EMSG
-#define PIC_IRR_PCIX_SPLIT_TO PIC_ISR_PCIX_SPLIT_TO
-#define PIC_IRR_PCIX_UNEX_COMP PIC_ISR_PCIX_UNEX_COMP
-#define PIC_IRR_INT_RAM_PERR PIC_ISR_INT_RAM_PERR
-#define PIC_IRR_PCIX_ARB_ERR PIC_ISR_PCIX_ARB_ERR
-#define PIC_IRR_PCIX_REQ_TOUT PIC_ISR_PCIX_REQ_TOUT
-#define PIC_IRR_PCIX_TABORT PIC_ISR_PCIX_TABORT
-#define PIC_IRR_PCIX_PERR PIC_ISR_PCIX_PERR
-#define PIC_IRR_PCIX_SERR PIC_ISR_PCIX_SERR
-#define PIC_IRR_PCIX_MRETRY PIC_ISR_PCIX_MRETRY
-#define PIC_IRR_PCIX_MTOUT PIC_ISR_PCIX_MTOUT
-#define PIC_IRR_PCIX_DA_PARITY PIC_ISR_PCIX_DA_PARITY
-#define PIC_IRR_PCIX_AD_PARITY PIC_ISR_PCIX_AD_PARITY
-#define PIC_IRR_PAGE_FAULT BRIDGE_ISR_PAGE_FAULT
-#define PIC_IRR_UNEXP_RESP BRIDGE_ISR_UNEXP_RESP
-#define PIC_IRR_BAD_XRESP_PKT BRIDGE_ISR_BAD_XRESP_PKT
-#define PIC_IRR_BAD_XREQ_PKT BRIDGE_ISR_BAD_XREQ_PKT
-#define PIC_IRR_RESP_XTLK_ERR BRIDGE_ISR_RESP_XTLK_ERR
-#define PIC_IRR_REQ_XTLK_ERR BRIDGE_ISR_REQ_XTLK_ERR
-#define PIC_IRR_INVLD_ADDR BRIDGE_ISR_INVLD_ADDR
-#define PIC_IRR_UNSUPPORTED_XOP BRIDGE_ISR_UNSUPPORTED_XOP
-#define PIC_IRR_XREQ_FIFO_OFLOW BRIDGE_ISR_XREQ_FIFO_OFLOW
-#define PIC_IRR_LLP_REC_SNERR BRIDGE_ISR_LLP_REC_SNERR
-#define PIC_IRR_LLP_REC_CBERR BRIDGE_ISR_LLP_REC_CBERR
-#define PIC_IRR_LLP_RCTY BRIDGE_ISR_LLP_RCTY
-#define PIC_IRR_LLP_TX_RETRY BRIDGE_ISR_LLP_TX_RETRY
-#define PIC_IRR_LLP_TCTY BRIDGE_ISR_LLP_TCTY
-#define PIC_IRR_PCI_ABORT BRIDGE_ISR_PCI_ABORT
-#define PIC_IRR_PCI_PARITY BRIDGE_ISR_PCI_PARITY
-#define PIC_IRR_PCI_SERR BRIDGE_ISR_PCI_SERR
-#define PIC_IRR_PCI_PERR BRIDGE_ISR_PCI_PERR
-#define PIC_IRR_PCI_MST_TIMEOUT BRIDGE_ISR_PCI_MST_TIMEOUT
-#define PIC_IRR_PCI_RETRY_CNT BRIDGE_ISR_PCI_RETRY_CNT
-#define PIC_IRR_XREAD_REQ_TIMEOUT BRIDGE_ISR_XREAD_REQ_TIMEOUT
-#define BRIDGE_IRR_MULTI_CLR (0x1 << 6)
-#define BRIDGE_IRR_CRP_GRP_CLR (0x1 << 5)
-#define BRIDGE_IRR_RESP_BUF_GRP_CLR (0x1 << 4)
-#define BRIDGE_IRR_REQ_DSP_GRP_CLR (0x1 << 3)
-#define BRIDGE_IRR_LLP_GRP_CLR (0x1 << 2)
-#define BRIDGE_IRR_SSRAM_GRP_CLR (0x1 << 1)
-#define BRIDGE_IRR_PCI_GRP_CLR (0x1 << 0)
-#define BRIDGE_IRR_GIO_GRP_CLR (0x1 << 0)
-#define BRIDGE_IRR_ALL_CLR 0x7f
-
-#define BRIDGE_IRR_CRP_GRP (BRIDGE_ISR_UNEXP_RESP | \
- BRIDGE_ISR_XREQ_FIFO_OFLOW)
-#define BRIDGE_IRR_RESP_BUF_GRP (BRIDGE_ISR_BAD_XRESP_PKT | \
- BRIDGE_ISR_RESP_XTLK_ERR | \
- BRIDGE_ISR_XREAD_REQ_TIMEOUT)
-#define BRIDGE_IRR_REQ_DSP_GRP (BRIDGE_ISR_UNSUPPORTED_XOP | \
- BRIDGE_ISR_BAD_XREQ_PKT | \
- BRIDGE_ISR_REQ_XTLK_ERR | \
- BRIDGE_ISR_INVLD_ADDR)
-#define BRIDGE_IRR_LLP_GRP (BRIDGE_ISR_LLP_REC_SNERR | \
- BRIDGE_ISR_LLP_REC_CBERR | \
- BRIDGE_ISR_LLP_RCTY | \
- BRIDGE_ISR_LLP_TX_RETRY | \
- BRIDGE_ISR_LLP_TCTY)
-#define BRIDGE_IRR_SSRAM_GRP (BRIDGE_ISR_SSRAM_PERR | \
- BRIDGE_ISR_PMU_ESIZE_FAULT)
-#define BRIDGE_IRR_PCI_GRP (BRIDGE_ISR_PCI_ABORT | \
- BRIDGE_ISR_PCI_PARITY | \
- BRIDGE_ISR_PCI_SERR | \
- BRIDGE_ISR_PCI_PERR | \
- BRIDGE_ISR_PCI_MST_TIMEOUT | \
- BRIDGE_ISR_PCI_RETRY_CNT)
-
-#define BRIDGE_IRR_GIO_GRP (BRIDGE_ISR_GIO_B_ENBL_ERR | \
- BRIDGE_ISR_GIO_MST_TIMEOUT)
-
-#define PIC_IRR_RAM_GRP PIC_ISR_INT_RAM_PERR
-
-#define PIC_PCIX_GRP_CLR (PIC_IRR_PCIX_AD_PARITY | \
- PIC_IRR_PCIX_DA_PARITY | \
- PIC_IRR_PCIX_MTOUT | \
- PIC_IRR_PCIX_MRETRY | \
- PIC_IRR_PCIX_SERR | \
- PIC_IRR_PCIX_PERR | \
- PIC_IRR_PCIX_TABORT | \
- PIC_ISR_PCIX_REQ_TOUT | \
- PIC_ISR_PCIX_UNEX_COMP | \
- PIC_ISR_PCIX_SPLIT_TO | \
- PIC_ISR_PCIX_SPLIT_EMSG | \
- PIC_ISR_PCIX_SPLIT_MSG_PE)
-
-/* Bridge INT_DEV register bits definition */
-#define BRIDGE_INT_DEV_SHFT(n) ((n)*3)
-#define BRIDGE_INT_DEV_MASK(n) (0x7 << BRIDGE_INT_DEV_SHFT(n))
-#define BRIDGE_INT_DEV_SET(_dev, _line) (_dev << BRIDGE_INT_DEV_SHFT(_line))
-
-/* Bridge interrupt(x) register bits definition */
-#define BRIDGE_INT_ADDR_HOST 0x0003FF00
-#define BRIDGE_INT_ADDR_FLD 0x000000FF
-
-/* PIC interrupt(x) register bits definition */
-#define PIC_INT_ADDR_FLD 0x00FF000000000000
-#define PIC_INT_ADDR_HOST 0x0000FFFFFFFFFFFF
-
-#define BRIDGE_TMO_PCI_RETRY_HLD_MASK 0x1f0000
-#define BRIDGE_TMO_GIO_TIMEOUT_MASK 0x001000
-#define BRIDGE_TMO_PCI_RETRY_CNT_MASK 0x0003ff
-
-#define BRIDGE_TMO_PCI_RETRY_CNT_MAX 0x3ff
-
-/* Bridge device(x) register bits definition */
-#define BRIDGE_DEV_ERR_LOCK_EN (1ull << 28)
-#define BRIDGE_DEV_PAGE_CHK_DIS (1ull << 27)
-#define BRIDGE_DEV_FORCE_PCI_PAR (1ull << 26)
-#define BRIDGE_DEV_VIRTUAL_EN (1ull << 25)
-#define BRIDGE_DEV_PMU_WRGA_EN (1ull << 24)
-#define BRIDGE_DEV_DIR_WRGA_EN (1ull << 23)
-#define BRIDGE_DEV_DEV_SIZE (1ull << 22)
-#define BRIDGE_DEV_RT (1ull << 21)
-#define BRIDGE_DEV_SWAP_PMU (1ull << 20)
-#define BRIDGE_DEV_SWAP_DIR (1ull << 19)
-#define BRIDGE_DEV_PREF (1ull << 18)
-#define BRIDGE_DEV_PRECISE (1ull << 17)
-#define BRIDGE_DEV_COH (1ull << 16)
-#define BRIDGE_DEV_BARRIER (1ull << 15)
-#define BRIDGE_DEV_GBR (1ull << 14)
-#define BRIDGE_DEV_DEV_SWAP (1ull << 13)
-#define BRIDGE_DEV_DEV_IO_MEM (1ull << 12)
-#define BRIDGE_DEV_OFF_MASK 0x00000fff
-#define BRIDGE_DEV_OFF_ADDR_SHFT 20
-
-#define XBRIDGE_DEV_PMU_BITS BRIDGE_DEV_PMU_WRGA_EN
-#define BRIDGE_DEV_PMU_BITS (BRIDGE_DEV_PMU_WRGA_EN | \
- BRIDGE_DEV_SWAP_PMU)
-#define BRIDGE_DEV_D32_BITS (BRIDGE_DEV_DIR_WRGA_EN | \
- BRIDGE_DEV_SWAP_DIR | \
- BRIDGE_DEV_PREF | \
- BRIDGE_DEV_PRECISE | \
- BRIDGE_DEV_COH | \
- BRIDGE_DEV_BARRIER)
-#define XBRIDGE_DEV_D64_BITS (BRIDGE_DEV_DIR_WRGA_EN | \
- BRIDGE_DEV_COH | \
- BRIDGE_DEV_BARRIER)
-#define BRIDGE_DEV_D64_BITS (BRIDGE_DEV_DIR_WRGA_EN | \
- BRIDGE_DEV_SWAP_DIR | \
- BRIDGE_DEV_COH | \
- BRIDGE_DEV_BARRIER)
-
-/* Bridge Error Upper register bit field definition */
-#define BRIDGE_ERRUPPR_DEVMASTER (0x1 << 20) /* Device was master */
-#define BRIDGE_ERRUPPR_PCIVDEV (0x1 << 19) /* Virtual Req value */
-#define BRIDGE_ERRUPPR_DEVNUM_SHFT (16)
-#define BRIDGE_ERRUPPR_DEVNUM_MASK (0x7 << BRIDGE_ERRUPPR_DEVNUM_SHFT)
-#define BRIDGE_ERRUPPR_DEVICE(err) (((err) >> BRIDGE_ERRUPPR_DEVNUM_SHFT) & 0x7)
-#define BRIDGE_ERRUPPR_ADDRMASK (0xFFFF)
-
-/* Bridge interrupt mode register bits definition */
-#define BRIDGE_INTMODE_CLR_PKT_EN(x) (0x1 << (x))
-
-/* this should be written to the xbow's link_control(x) register */
-#define BRIDGE_CREDIT 3
-
-/* RRB assignment register */
-#define BRIDGE_RRB_EN 0x8 /* after shifting down */
-#define BRIDGE_RRB_DEV 0x7 /* after shifting down */
-#define BRIDGE_RRB_VDEV 0x4 /* after shifting down, 2 virtual channels */
-#define BRIDGE_RRB_PDEV 0x3 /* after shifting down, 8 devices */
-
-#define PIC_RRB_EN 0x8 /* after shifting down */
-#define PIC_RRB_DEV 0x7 /* after shifting down */
-#define PIC_RRB_VDEV 0x6 /* after shifting down, 4 virtual channels */
-#define PIC_RRB_PDEV 0x1 /* after shifting down, 4 devices */
-
-/* RRB status register */
-#define BRIDGE_RRB_VALID(r) (0x00010000<<(r))
-#define BRIDGE_RRB_INUSE(r) (0x00000001<<(r))
-
-/* RRB clear register */
-#define BRIDGE_RRB_CLEAR(r) (0x00000001<<(r))
-
-/* Defines for the virtual channels so we don't hardcode 0-3 within code */
-#define VCHAN0 0 /* virtual channel 0 (ie. the "normal" channel) */
-#define VCHAN1 1 /* virtual channel 1 */
-#define VCHAN2 2 /* virtual channel 2 - PIC only */
-#define VCHAN3 3 /* virtual channel 3 - PIC only */
-
-/* PIC: PCI-X Read Buffer Attribute Register (RBAR) */
-#define NUM_RBAR 16 /* number of RBAR registers */
-
-/* xbox system controller declarations */
-#define XBOX_BRIDGE_WID 8
-#define FLASH_PROM1_BASE 0xE00000 /* To read the xbox sysctlr status */
-#define XBOX_RPS_EXISTS 1 << 6 /* RPS bit in status register */
-#define XBOX_RPS_FAIL 1 << 4 /* RPS status bit in register */
-
-/* ========================================================================
- */
-/*
- * Macros for Xtalk to Bridge bus (PCI/GIO) PIO
- * refer to section 4.2.1 of Bridge Spec for xtalk to PCI/GIO PIO mappings
- */
-/* XTALK addresses that map into Bridge Bus addr space */
-#define BRIDGE_PIO32_XTALK_ALIAS_BASE 0x000040000000L
-#define BRIDGE_PIO32_XTALK_ALIAS_LIMIT 0x00007FFFFFFFL
-#define BRIDGE_PIO64_XTALK_ALIAS_BASE 0x000080000000L
-#define BRIDGE_PIO64_XTALK_ALIAS_LIMIT 0x0000BFFFFFFFL
-#define BRIDGE_PCIIO_XTALK_ALIAS_BASE 0x000100000000L
-#define BRIDGE_PCIIO_XTALK_ALIAS_LIMIT 0x0001FFFFFFFFL
-
-/* Ranges of PCI bus space that can be accessed via PIO from xtalk */
-#define BRIDGE_MIN_PIO_ADDR_MEM 0x00000000 /* 1G PCI memory space */
-#define BRIDGE_MAX_PIO_ADDR_MEM 0x3fffffff
-#define BRIDGE_MIN_PIO_ADDR_IO 0x00000000 /* 4G PCI IO space */
-#define BRIDGE_MAX_PIO_ADDR_IO 0xffffffff
-
-/* XTALK addresses that map into PCI addresses */
-#define BRIDGE_PCI_MEM32_BASE BRIDGE_PIO32_XTALK_ALIAS_BASE
-#define BRIDGE_PCI_MEM32_LIMIT BRIDGE_PIO32_XTALK_ALIAS_LIMIT
-#define BRIDGE_PCI_MEM64_BASE BRIDGE_PIO64_XTALK_ALIAS_BASE
-#define BRIDGE_PCI_MEM64_LIMIT BRIDGE_PIO64_XTALK_ALIAS_LIMIT
-#define BRIDGE_PCI_IO_BASE BRIDGE_PCIIO_XTALK_ALIAS_BASE
-#define BRIDGE_PCI_IO_LIMIT BRIDGE_PCIIO_XTALK_ALIAS_LIMIT
-
-/*
- * Macros for Xtalk to Bridge bus (PCI) PIO
- * refer to section 5.2.1 Figure 4 of the "PCI Interface Chip (PIC) Volume II
- * Programmer's Reference" (Revision 0.8 as of this writing).
- *
- * These are PIC bridge specific. A separate set of macros was defined
- * because PIC deviates from Bridge/Xbridge by not supporting a big-window
- * alias for PCI I/O space, and also redefines XTALK addresses
- * 0x0000C0000000L and 0x000100000000L to be PCI MEM aliases for the second
- * bus.
- */
-
-/* XTALK addresses that map into PIC Bridge Bus addr space */
-#define PICBRIDGE0_PIO32_XTALK_ALIAS_BASE 0x000040000000L
-#define PICBRIDGE0_PIO32_XTALK_ALIAS_LIMIT 0x00007FFFFFFFL
-#define PICBRIDGE0_PIO64_XTALK_ALIAS_BASE 0x000080000000L
-#define PICBRIDGE0_PIO64_XTALK_ALIAS_LIMIT 0x0000BFFFFFFFL
-#define PICBRIDGE1_PIO32_XTALK_ALIAS_BASE 0x0000C0000000L
-#define PICBRIDGE1_PIO32_XTALK_ALIAS_LIMIT 0x0000FFFFFFFFL
-#define PICBRIDGE1_PIO64_XTALK_ALIAS_BASE 0x000100000000L
-#define PICBRIDGE1_PIO64_XTALK_ALIAS_LIMIT 0x00013FFFFFFFL
-
-/* XTALK addresses that map into PCI addresses */
-#define PICBRIDGE0_PCI_MEM32_BASE PICBRIDGE0_PIO32_XTALK_ALIAS_BASE
-#define PICBRIDGE0_PCI_MEM32_LIMIT PICBRIDGE0_PIO32_XTALK_ALIAS_LIMIT
-#define PICBRIDGE0_PCI_MEM64_BASE PICBRIDGE0_PIO64_XTALK_ALIAS_BASE
-#define PICBRIDGE0_PCI_MEM64_LIMIT PICBRIDGE0_PIO64_XTALK_ALIAS_LIMIT
-#define PICBRIDGE1_PCI_MEM32_BASE PICBRIDGE1_PIO32_XTALK_ALIAS_BASE
-#define PICBRIDGE1_PCI_MEM32_LIMIT PICBRIDGE1_PIO32_XTALK_ALIAS_LIMIT
-#define PICBRIDGE1_PCI_MEM64_BASE PICBRIDGE1_PIO64_XTALK_ALIAS_BASE
-#define PICBRIDGE1_PCI_MEM64_LIMIT PICBRIDGE1_PIO64_XTALK_ALIAS_LIMIT
-
-/*
- * Macros for Bridge bus (PCI/GIO) to Xtalk DMA
- */
-/* Bridge Bus DMA addresses */
-#define BRIDGE_LOCAL_BASE 0
-#define BRIDGE_DMA_MAPPED_BASE 0x40000000
-#define BRIDGE_DMA_MAPPED_SIZE 0x40000000 /* 1G Bytes */
-#define BRIDGE_DMA_DIRECT_BASE 0x80000000
-#define BRIDGE_DMA_DIRECT_SIZE 0x80000000 /* 2G Bytes */
-
-#define PCI32_LOCAL_BASE BRIDGE_LOCAL_BASE
-
-/* PCI addresses of regions decoded by Bridge for DMA */
-#define PCI32_MAPPED_BASE BRIDGE_DMA_MAPPED_BASE
-#define PCI32_DIRECT_BASE BRIDGE_DMA_DIRECT_BASE
-
-#ifndef __ASSEMBLY__
-
-#define IS_PCI32_LOCAL(x) ((uint64_t)(x) < PCI32_MAPPED_BASE)
-#define IS_PCI32_MAPPED(x) ((uint64_t)(x) < PCI32_DIRECT_BASE && \
- (uint64_t)(x) >= PCI32_MAPPED_BASE)
-#define IS_PCI32_DIRECT(x) ((uint64_t)(x) >= PCI32_MAPPED_BASE)
-#define IS_PCI64(x) ((uint64_t)(x) >= PCI64_BASE)
-#endif /* __ASSEMBLY__ */
-
-/*
- * The GIO address space.
- */
-/* Xtalk to GIO PIO */
-#define BRIDGE_GIO_MEM32_BASE BRIDGE_PIO32_XTALK_ALIAS_BASE
-#define BRIDGE_GIO_MEM32_LIMIT BRIDGE_PIO32_XTALK_ALIAS_LIMIT
-
-#define GIO_LOCAL_BASE BRIDGE_LOCAL_BASE
-
-/* GIO addresses of regions decoded by Bridge for DMA */
-#define GIO_MAPPED_BASE BRIDGE_DMA_MAPPED_BASE
-#define GIO_DIRECT_BASE BRIDGE_DMA_DIRECT_BASE
-
-#ifndef __ASSEMBLY__
-
-#define IS_GIO_LOCAL(x) ((uint64_t)(x) < GIO_MAPPED_BASE)
-#define IS_GIO_MAPPED(x) ((uint64_t)(x) < GIO_DIRECT_BASE && \
- (uint64_t)(x) >= GIO_MAPPED_BASE)
-#define IS_GIO_DIRECT(x) ((uint64_t)(x) >= GIO_MAPPED_BASE)
-#endif /* __ASSEMBLY__ */
-
-/* PCI to xtalk mapping */
-
-/* given a DIR_OFF value and a pci/gio 32 bits direct address, determine
- * which xtalk address is accessed
- */
-#define BRIDGE_DIRECT_32_SEG_SIZE BRIDGE_DMA_DIRECT_SIZE
-#define BRIDGE_DIRECT_32_TO_XTALK(dir_off,adr) \
- ((dir_off) * BRIDGE_DIRECT_32_SEG_SIZE + \
- ((adr) & (BRIDGE_DIRECT_32_SEG_SIZE - 1)) + PHYS_RAMBASE)
-
-/* 64-bit address attribute masks */
-#define PCI64_ATTR_TARG_MASK 0xf000000000000000
-#define PCI64_ATTR_TARG_SHFT 60
-#define PCI64_ATTR_PREF (1ull << 59)
-#define PCI64_ATTR_PREC (1ull << 58)
-#define PCI64_ATTR_VIRTUAL (1ull << 57)
-#define PCI64_ATTR_BAR (1ull << 56)
-#define PCI64_ATTR_SWAP (1ull << 55)
-#define PCI64_ATTR_RMF_MASK 0x00ff000000000000
-#define PCI64_ATTR_RMF_SHFT 48
-
-#ifndef __ASSEMBLY__
-/* Address translation entry for mapped pci32 accesses */
-typedef union ate_u {
- uint64_t ent;
- struct xb_ate_s { /* xbridge */
- uint64_t :16;
- uint64_t addr:36;
- uint64_t targ:4;
- uint64_t reserved:2;
- uint64_t swap:1;
- uint64_t barrier:1;
- uint64_t prefetch:1;
- uint64_t precise:1;
- uint64_t coherent:1;
- uint64_t valid:1;
- } xb_field;
- struct ate_s { /* bridge */
- uint64_t rmf:16;
- uint64_t addr:36;
- uint64_t targ:4;
- uint64_t reserved:3;
- uint64_t barrier:1;
- uint64_t prefetch:1;
- uint64_t precise:1;
- uint64_t coherent:1;
- uint64_t valid:1;
- } field;
-} ate_t;
-#endif /* __ASSEMBLY__ */
-
-#define ATE_V (1 << 0)
-#define ATE_CO (1 << 1)
-#define ATE_PREC (1 << 2)
-#define ATE_PREF (1 << 3)
-#define ATE_BAR (1 << 4)
-#define ATE_SWAP (1 << 5)
-
-#define ATE_PFNSHIFT 12
-#define ATE_TIDSHIFT 8
-#define ATE_RMFSHIFT 48
-
-#define mkate(xaddr, xid, attr) ((xaddr) & 0x0000fffffffff000ULL) | \
- ((xid)<<ATE_TIDSHIFT) | \
- (attr)
-
-/*
- * for xbridge, bit 29 of the pci address is the swap bit */
-#define ATE_SWAPSHIFT 29
-#define ATE_SWAP_ON(x) ((x) |= (1 << ATE_SWAPSHIFT))
-#define ATE_SWAP_OFF(x) ((x) &= ~(1 << ATE_SWAPSHIFT))
-
-/* extern declarations */
-
-#ifndef __ASSEMBLY__
-
-/* ========================================================================
- */
-
-#ifdef MACROFIELD_LINE
-/*
- * This table forms a relation between the byte offset macros normally
- * used for ASM coding and the calculated byte offsets of the fields
- * in the C structure.
- *
- * See bridge_check.c and bridge_html.c for further details.
- */
-#ifndef MACROFIELD_LINE_BITFIELD
-#define MACROFIELD_LINE_BITFIELD(m) /* ignored */
-#endif
-
-struct macrofield_s bridge_macrofield[] =
-{
-
- MACROFIELD_LINE(BRIDGE_WID_ID, b_wid_id)
- MACROFIELD_LINE_BITFIELD(WIDGET_REV_NUM)
- MACROFIELD_LINE_BITFIELD(WIDGET_PART_NUM)
- MACROFIELD_LINE_BITFIELD(WIDGET_MFG_NUM)
- MACROFIELD_LINE(BRIDGE_WID_STAT, b_wid_stat)
- MACROFIELD_LINE_BITFIELD(BRIDGE_STAT_LLP_REC_CNT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_STAT_LLP_TX_CNT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_STAT_FLASH_SELECT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_STAT_PCI_GIO_N)
- MACROFIELD_LINE_BITFIELD(BRIDGE_STAT_PENDING)
- MACROFIELD_LINE(BRIDGE_WID_ERR_UPPER, b_wid_err_upper)
- MACROFIELD_LINE(BRIDGE_WID_ERR_LOWER, b_wid_err_lower)
- MACROFIELD_LINE(BRIDGE_WID_CONTROL, b_wid_control)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_FLASH_WR_EN)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_EN_CLK50)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_EN_CLK40)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_EN_CLK33)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_RST_MASK)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_IO_SWAP)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_MEM_SWAP)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_PAGE_SIZE)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_SS_PAR_BAD)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_SS_PAR_EN)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_SSRAM_SIZE_MASK)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_F_BAD_PKT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_LLP_XBAR_CRD_MASK)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_CLR_RLLP_CNT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_CLR_TLLP_CNT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_SYS_END)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_MAX_TRANS_MASK)
- MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_WIDGET_ID_MASK)
- MACROFIELD_LINE(BRIDGE_WID_REQ_TIMEOUT, b_wid_req_timeout)
- MACROFIELD_LINE(BRIDGE_WID_INT_UPPER, b_wid_int_upper)
- MACROFIELD_LINE_BITFIELD(WIDGET_INT_VECTOR)
- MACROFIELD_LINE_BITFIELD(WIDGET_TARGET_ID)
- MACROFIELD_LINE_BITFIELD(WIDGET_UPP_ADDR)
- MACROFIELD_LINE(BRIDGE_WID_INT_LOWER, b_wid_int_lower)
- MACROFIELD_LINE(BRIDGE_WID_ERR_CMDWORD, b_wid_err_cmdword)
- MACROFIELD_LINE_BITFIELD(WIDGET_DIDN)
- MACROFIELD_LINE_BITFIELD(WIDGET_SIDN)
- MACROFIELD_LINE_BITFIELD(WIDGET_PACTYP)
- MACROFIELD_LINE_BITFIELD(WIDGET_TNUM)
- MACROFIELD_LINE_BITFIELD(WIDGET_COHERENT)
- MACROFIELD_LINE_BITFIELD(WIDGET_DS)
- MACROFIELD_LINE_BITFIELD(WIDGET_GBR)
- MACROFIELD_LINE_BITFIELD(WIDGET_VBPM)
- MACROFIELD_LINE_BITFIELD(WIDGET_ERROR)
- MACROFIELD_LINE_BITFIELD(WIDGET_BARRIER)
- MACROFIELD_LINE(BRIDGE_WID_LLP, b_wid_llp)
- MACROFIELD_LINE_BITFIELD(WIDGET_LLP_MAXRETRY)
- MACROFIELD_LINE_BITFIELD(WIDGET_LLP_NULLTIMEOUT)
- MACROFIELD_LINE_BITFIELD(WIDGET_LLP_MAXBURST)
- MACROFIELD_LINE(BRIDGE_WID_TFLUSH, b_wid_tflush)
- MACROFIELD_LINE(BRIDGE_WID_AUX_ERR, b_wid_aux_err)
- MACROFIELD_LINE(BRIDGE_WID_RESP_UPPER, b_wid_resp_upper)
- MACROFIELD_LINE(BRIDGE_WID_RESP_LOWER, b_wid_resp_lower)
- MACROFIELD_LINE(BRIDGE_WID_TST_PIN_CTRL, b_wid_tst_pin_ctrl)
- MACROFIELD_LINE(BRIDGE_DIR_MAP, b_dir_map)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DIRMAP_W_ID)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DIRMAP_RMF_64)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DIRMAP_ADD512)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DIRMAP_OFF)
- MACROFIELD_LINE(BRIDGE_RAM_PERR, b_ram_perr)
- MACROFIELD_LINE(BRIDGE_ARB, b_arb)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_REQ_WAIT_TICK_MASK)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_REQ_WAIT_EN_MASK)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_FREEZE_GNT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_HPRI_RING_B2)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_HPRI_RING_B1)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_HPRI_RING_B0)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_LPRI_RING_B2)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_LPRI_RING_B1)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_LPRI_RING_B0)
- MACROFIELD_LINE(BRIDGE_NIC, b_nic)
- MACROFIELD_LINE(BRIDGE_PCI_BUS_TIMEOUT, b_pci_bus_timeout)
- MACROFIELD_LINE(BRIDGE_PCI_CFG, b_pci_cfg)
- MACROFIELD_LINE(BRIDGE_PCI_ERR_UPPER, b_pci_err_upper)
- MACROFIELD_LINE(BRIDGE_PCI_ERR_LOWER, b_pci_err_lower)
- MACROFIELD_LINE(BRIDGE_INT_STATUS, b_int_status)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_MULTI_ERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PMU_ESIZE_FAULT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_UNEXP_RESP)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_BAD_XRESP_PKT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_BAD_XREQ_PKT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_RESP_XTLK_ERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_REQ_XTLK_ERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_INVLD_ADDR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_UNSUPPORTED_XOP)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_XREQ_FIFO_OFLOW)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_LLP_REC_SNERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_LLP_REC_CBERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_LLP_RCTY)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_LLP_TX_RETRY)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_LLP_TCTY)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_SSRAM_PERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_ABORT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_PARITY)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_SERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_PERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_MST_TIMEOUT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_RETRY_CNT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_XREAD_REQ_TIMEOUT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_GIO_B_ENBL_ERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_INT_MSK)
- MACROFIELD_LINE(BRIDGE_INT_ENABLE, b_int_enable)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_UNEXP_RESP)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PMU_ESIZE_FAULT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_BAD_XRESP_PKT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_BAD_XREQ_PKT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_RESP_XTLK_ERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_REQ_XTLK_ERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_INVLD_ADDR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_UNSUPPORTED_XOP)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_XREQ_FIFO_OFLOW)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_LLP_REC_SNERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_LLP_REC_CBERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_LLP_RCTY)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_LLP_TX_RETRY)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_LLP_TCTY)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_SSRAM_PERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_ABORT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_PARITY)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_SERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_PERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_MST_TIMEOUT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_RETRY_CNT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_XREAD_REQ_TIMEOUT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_GIO_B_ENBL_ERR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_INT_MSK)
- MACROFIELD_LINE(BRIDGE_INT_RST_STAT, b_int_rst_stat)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_ALL_CLR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_MULTI_CLR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_CRP_GRP_CLR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_RESP_BUF_GRP_CLR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_REQ_DSP_GRP_CLR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_LLP_GRP_CLR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_SSRAM_GRP_CLR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_PCI_GRP_CLR)
- MACROFIELD_LINE(BRIDGE_INT_MODE, b_int_mode)
- MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(7))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(6))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(5))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(4))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(3))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(2))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(1))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(0))
- MACROFIELD_LINE(BRIDGE_INT_DEVICE, b_int_device)
- MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(7))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(6))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(5))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(4))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(3))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(2))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(1))
- MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(0))
- MACROFIELD_LINE(BRIDGE_INT_HOST_ERR, b_int_host_err)
- MACROFIELD_LINE_BITFIELD(BRIDGE_INT_ADDR_HOST)
- MACROFIELD_LINE_BITFIELD(BRIDGE_INT_ADDR_FLD)
- MACROFIELD_LINE(BRIDGE_INT_ADDR0, b_int_addr[0].addr)
- MACROFIELD_LINE(BRIDGE_INT_ADDR(0), b_int_addr[0].addr)
- MACROFIELD_LINE(BRIDGE_INT_ADDR(1), b_int_addr[1].addr)
- MACROFIELD_LINE(BRIDGE_INT_ADDR(2), b_int_addr[2].addr)
- MACROFIELD_LINE(BRIDGE_INT_ADDR(3), b_int_addr[3].addr)
- MACROFIELD_LINE(BRIDGE_INT_ADDR(4), b_int_addr[4].addr)
- MACROFIELD_LINE(BRIDGE_INT_ADDR(5), b_int_addr[5].addr)
- MACROFIELD_LINE(BRIDGE_INT_ADDR(6), b_int_addr[6].addr)
- MACROFIELD_LINE(BRIDGE_INT_ADDR(7), b_int_addr[7].addr)
- MACROFIELD_LINE(BRIDGE_DEVICE0, b_device[0].reg)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_ERR_LOCK_EN)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_PAGE_CHK_DIS)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_FORCE_PCI_PAR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_VIRTUAL_EN)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_PMU_WRGA_EN)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_DIR_WRGA_EN)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_DEV_SIZE)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_RT)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_SWAP_PMU)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_SWAP_DIR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_PREF)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_PRECISE)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_COH)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_BARRIER)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_GBR)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_DEV_SWAP)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_DEV_IO_MEM)
- MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_OFF_MASK)
- MACROFIELD_LINE(BRIDGE_DEVICE(0), b_device[0].reg)
- MACROFIELD_LINE(BRIDGE_DEVICE(1), b_device[1].reg)
- MACROFIELD_LINE(BRIDGE_DEVICE(2), b_device[2].reg)
- MACROFIELD_LINE(BRIDGE_DEVICE(3), b_device[3].reg)
- MACROFIELD_LINE(BRIDGE_DEVICE(4), b_device[4].reg)
- MACROFIELD_LINE(BRIDGE_DEVICE(5), b_device[5].reg)
- MACROFIELD_LINE(BRIDGE_DEVICE(6), b_device[6].reg)
- MACROFIELD_LINE(BRIDGE_DEVICE(7), b_device[7].reg)
- MACROFIELD_LINE(BRIDGE_WR_REQ_BUF0, b_wr_req_buf[0].reg)
- MACROFIELD_LINE(BRIDGE_WR_REQ_BUF(0), b_wr_req_buf[0].reg)
- MACROFIELD_LINE(BRIDGE_WR_REQ_BUF(1), b_wr_req_buf[1].reg)
- MACROFIELD_LINE(BRIDGE_WR_REQ_BUF(2), b_wr_req_buf[2].reg)
- MACROFIELD_LINE(BRIDGE_WR_REQ_BUF(3), b_wr_req_buf[3].reg)
- MACROFIELD_LINE(BRIDGE_WR_REQ_BUF(4), b_wr_req_buf[4].reg)
- MACROFIELD_LINE(BRIDGE_WR_REQ_BUF(5), b_wr_req_buf[5].reg)
- MACROFIELD_LINE(BRIDGE_WR_REQ_BUF(6), b_wr_req_buf[6].reg)
- MACROFIELD_LINE(BRIDGE_WR_REQ_BUF(7), b_wr_req_buf[7].reg)
- MACROFIELD_LINE(BRIDGE_EVEN_RESP, b_even_resp)
- MACROFIELD_LINE(BRIDGE_ODD_RESP, b_odd_resp)
- MACROFIELD_LINE(BRIDGE_RESP_STATUS, b_resp_status)
- MACROFIELD_LINE(BRIDGE_RESP_CLEAR, b_resp_clear)
- MACROFIELD_LINE(BRIDGE_ATE_RAM, b_int_ate_ram)
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEV0, b_type0_cfg_dev[0])
-
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEV(0), b_type0_cfg_dev[0])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(0,0), b_type0_cfg_dev[0].f[0])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(0,1), b_type0_cfg_dev[0].f[1])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(0,2), b_type0_cfg_dev[0].f[2])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(0,3), b_type0_cfg_dev[0].f[3])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(0,4), b_type0_cfg_dev[0].f[4])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(0,5), b_type0_cfg_dev[0].f[5])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(0,6), b_type0_cfg_dev[0].f[6])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(0,7), b_type0_cfg_dev[0].f[7])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEV(1), b_type0_cfg_dev[1])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(1,0), b_type0_cfg_dev[1].f[0])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(1,1), b_type0_cfg_dev[1].f[1])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(1,2), b_type0_cfg_dev[1].f[2])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(1,3), b_type0_cfg_dev[1].f[3])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(1,4), b_type0_cfg_dev[1].f[4])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(1,5), b_type0_cfg_dev[1].f[5])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(1,6), b_type0_cfg_dev[1].f[6])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(1,7), b_type0_cfg_dev[1].f[7])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEV(2), b_type0_cfg_dev[2])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(2,0), b_type0_cfg_dev[2].f[0])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(2,1), b_type0_cfg_dev[2].f[1])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(2,2), b_type0_cfg_dev[2].f[2])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(2,3), b_type0_cfg_dev[2].f[3])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(2,4), b_type0_cfg_dev[2].f[4])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(2,5), b_type0_cfg_dev[2].f[5])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(2,6), b_type0_cfg_dev[2].f[6])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(2,7), b_type0_cfg_dev[2].f[7])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEV(3), b_type0_cfg_dev[3])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(3,0), b_type0_cfg_dev[3].f[0])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(3,1), b_type0_cfg_dev[3].f[1])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(3,2), b_type0_cfg_dev[3].f[2])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(3,3), b_type0_cfg_dev[3].f[3])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(3,4), b_type0_cfg_dev[3].f[4])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(3,5), b_type0_cfg_dev[3].f[5])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(3,6), b_type0_cfg_dev[3].f[6])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(3,7), b_type0_cfg_dev[3].f[7])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEV(4), b_type0_cfg_dev[4])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(4,0), b_type0_cfg_dev[4].f[0])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(4,1), b_type0_cfg_dev[4].f[1])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(4,2), b_type0_cfg_dev[4].f[2])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(4,3), b_type0_cfg_dev[4].f[3])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(4,4), b_type0_cfg_dev[4].f[4])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(4,5), b_type0_cfg_dev[4].f[5])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(4,6), b_type0_cfg_dev[4].f[6])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(4,7), b_type0_cfg_dev[4].f[7])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEV(5), b_type0_cfg_dev[5])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(5,0), b_type0_cfg_dev[5].f[0])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(5,1), b_type0_cfg_dev[5].f[1])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(5,2), b_type0_cfg_dev[5].f[2])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(5,3), b_type0_cfg_dev[5].f[3])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(5,4), b_type0_cfg_dev[5].f[4])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(5,5), b_type0_cfg_dev[5].f[5])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(5,6), b_type0_cfg_dev[5].f[6])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(5,7), b_type0_cfg_dev[5].f[7])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEV(6), b_type0_cfg_dev[6])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(6,0), b_type0_cfg_dev[6].f[0])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(6,1), b_type0_cfg_dev[6].f[1])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(6,2), b_type0_cfg_dev[6].f[2])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(6,3), b_type0_cfg_dev[6].f[3])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(6,4), b_type0_cfg_dev[6].f[4])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(6,5), b_type0_cfg_dev[6].f[5])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(6,6), b_type0_cfg_dev[6].f[6])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(6,7), b_type0_cfg_dev[6].f[7])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEV(7), b_type0_cfg_dev[7])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(7,0), b_type0_cfg_dev[7].f[0])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(7,1), b_type0_cfg_dev[7].f[1])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(7,2), b_type0_cfg_dev[7].f[2])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(7,3), b_type0_cfg_dev[7].f[3])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(7,4), b_type0_cfg_dev[7].f[4])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(7,5), b_type0_cfg_dev[7].f[5])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(7,6), b_type0_cfg_dev[7].f[6])
- MACROFIELD_LINE(BRIDGE_TYPE0_CFG_DEVF(7,7), b_type0_cfg_dev[7].f[7])
-
- MACROFIELD_LINE(BRIDGE_TYPE1_CFG, b_type1_cfg)
- MACROFIELD_LINE(BRIDGE_PCI_IACK, b_pci_iack)
- MACROFIELD_LINE(BRIDGE_EXT_SSRAM, b_ext_ate_ram)
- MACROFIELD_LINE(BRIDGE_DEVIO0, b_devio(0))
- MACROFIELD_LINE(BRIDGE_DEVIO(0), b_devio(0))
- MACROFIELD_LINE(BRIDGE_DEVIO(1), b_devio(1))
- MACROFIELD_LINE(BRIDGE_DEVIO(2), b_devio(2))
- MACROFIELD_LINE(BRIDGE_DEVIO(3), b_devio(3))
- MACROFIELD_LINE(BRIDGE_DEVIO(4), b_devio(4))
- MACROFIELD_LINE(BRIDGE_DEVIO(5), b_devio(5))
- MACROFIELD_LINE(BRIDGE_DEVIO(6), b_devio(6))
- MACROFIELD_LINE(BRIDGE_DEVIO(7), b_devio(7))
- MACROFIELD_LINE(BRIDGE_EXTERNAL_FLASH, b_external_flash)
-};
-#endif
-
-#ifdef __cplusplus
-};
-#endif
-#endif /* C or C++ */
-
-#endif /* _ASM_SN_PCI_BRIDGE_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_PCI_CVLINK_H
-#define _ASM_IA64_SN_PCI_CVLINK_H
-
-#include <asm/sn/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/driver.h>
-#include <asm/sn/iograph.h>
-#include <asm/param.h>
-#include <asm/sn/pio.h>
-#include <asm/sn/xtalk/xwidget.h>
-#include <asm/sn/sn_private.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/hcl_util.h>
-#include <asm/sn/intr.h>
-#include <asm/sn/xtalk/xtalkaddrs.h>
-#include <asm/sn/klconfig.h>
-#include <asm/sn/io.h>
-
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pcibr_private.h>
-
-#define MAX_PCI_XWIDGET 256
-#define MAX_ATE_MAPS 1024
-
-#define SN_DEVICE_SYSDATA(dev) \
- ((struct sn_device_sysdata *) \
- (((struct pci_controller *) ((dev)->sysdata))->platform_data))
-
-#define IS_PCI32G(dev) ((dev)->dma_mask >= 0xffffffff)
-#define IS_PCI32L(dev) ((dev)->dma_mask < 0xffffffff)
-
-#define PCIDEV_VERTEX(pci_dev) \
- ((SN_DEVICE_SYSDATA(pci_dev))->vhdl)
-
-struct sn_widget_sysdata {
- vertex_hdl_t vhdl;
-};
-
-struct sn_device_sysdata {
- vertex_hdl_t vhdl;
- pciio_provider_t *pci_provider;
- pciio_intr_t intr_handle;
- struct sn_flush_device_list *dma_flush_list;
- pciio_piomap_t pio_map[PCI_ROM_RESOURCE];
-};
-
-struct ioports_to_tlbs_s {
- unsigned long p:1,
- rv_1:1,
- ma:3,
- a:1,
- d:1,
- pl:2,
- ar:3,
- ppn:38,
- rv_2:2,
- ed:1,
- ig:11;
-};
-
-#endif /* _ASM_IA64_SN_PCI_CVLINK_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_PCI_PCI_DEFS_H
-#define _ASM_IA64_SN_PCI_PCI_DEFS_H
-
-/* defines for the PCI bus architecture */
-
-/* Bit layout of address fields for Type-1
- * Configuration Space cycles.
- */
-#define PCI_TYPE0_SLOT_MASK 0xFFFFF800
-#define PCI_TYPE0_FUNC_MASK 0x00000700
-#define PCI_TYPE0_REG_MASK 0x000000FF
-
-#define PCI_TYPE0_SLOT_SHFT 11
-#define PCI_TYPE0_FUNC_SHFT 8
-#define PCI_TYPE0_REG_SHFT 0
-
-#define PCI_TYPE0_FUNC(a) (((a) & PCI_TYPE0_FUNC_MASK) >> PCI_TYPE0_FUNC_SHFT)
-#define PCI_TYPE0_REG(a) (((a) & PCI_TYPE0_REG_MASK) >> PCI_TYPE0_REG_SHFT)
-
-#define PCI_TYPE0(s,f,r) ((((1<<(s)) << PCI_TYPE0_SLOT_SHFT) & PCI_TYPE0_SLOT_MASK) |\
- (((f) << PCI_TYPE0_FUNC_SHFT) & PCI_TYPE0_FUNC_MASK) |\
- (((r) << PCI_TYPE0_REG_SHFT) & PCI_TYPE0_REG_MASK))
-
-/* Bit layout of address fields for Type-1
- * Configuration Space cycles.
- * NOTE: I'm including the byte offset within
- * the 32-bit word as part of the register
- * number as an extension of the layout in
- * the PCI spec.
- */
-#define PCI_TYPE1_BUS_MASK 0x00FF0000
-#define PCI_TYPE1_SLOT_MASK 0x0000F800
-#define PCI_TYPE1_FUNC_MASK 0x00000700
-#define PCI_TYPE1_REG_MASK 0x000000FF
-
-#define PCI_TYPE1_BUS_SHFT 16
-#define PCI_TYPE1_SLOT_SHFT 11
-#define PCI_TYPE1_FUNC_SHFT 8
-#define PCI_TYPE1_REG_SHFT 0
-
-#define PCI_TYPE1_BUS(a) (((a) & PCI_TYPE1_BUS_MASK) >> PCI_TYPE1_BUS_SHFT)
-#define PCI_TYPE1_SLOT(a) (((a) & PCI_TYPE1_SLOT_MASK) >> PCI_TYPE1_SLOT_SHFT)
-#define PCI_TYPE1_FUNC(a) (((a) & PCI_TYPE1_FUNC_MASK) >> PCI_TYPE1_FUNC_SHFT)
-#define PCI_TYPE1_REG(a) (((a) & PCI_TYPE1_REG_MASK) >> PCI_TYPE1_REG_SHFT)
-
-#define PCI_TYPE1(b,s,f,r) ((((b) << PCI_TYPE1_BUS_SHFT) & PCI_TYPE1_BUS_MASK) |\
- (((s) << PCI_TYPE1_SLOT_SHFT) & PCI_TYPE1_SLOT_MASK) |\
- (((f) << PCI_TYPE1_FUNC_SHFT) & PCI_TYPE1_FUNC_MASK) |\
- (((r) << PCI_TYPE1_REG_SHFT) & PCI_TYPE1_REG_MASK))
-
-/* Byte offsets of registers in CFG space
- */
-#define PCI_CFG_VENDOR_ID 0x00 /* Vendor ID (2 bytes) */
-#define PCI_CFG_DEVICE_ID 0x02 /* Device ID (2 bytes) */
-
-#define PCI_CFG_COMMAND 0x04 /* Command (2 bytes) */
-#define PCI_CFG_STATUS 0x06 /* Status (2 bytes) */
-
-/* NOTE: if you are using a C "switch" statement to
- * differentiate between the Config space registers, be
- * aware that PCI_CFG_CLASS_CODE and PCI_CFG_PROG_IF
- * are the same offset.
- */
-#define PCI_CFG_REV_ID 0x08 /* Revision Id (1 byte) */
-#define PCI_CFG_CLASS_CODE 0x09 /* Class Code (3 bytes) */
-#define PCI_CFG_PROG_IF 0x09 /* Prog Interface (1 byte) */
-#define PCI_CFG_SUB_CLASS 0x0A /* Sub Class (1 byte) */
-#define PCI_CFG_BASE_CLASS 0x0B /* Base Class (1 byte) */
-
-#define PCI_CFG_CACHE_LINE 0x0C /* Cache line size (1 byte) */
-#define PCI_CFG_LATENCY_TIMER 0x0D /* Latency Timer (1 byte) */
-#define PCI_CFG_HEADER_TYPE 0x0E /* Header Type (1 byte) */
-#define PCI_CFG_BIST 0x0F /* Built In Self Test */
-
-#define PCI_CFG_BASE_ADDR_0 0x10 /* Base Address (4 bytes) */
-#define PCI_CFG_BASE_ADDR_1 0x14 /* Base Address (4 bytes) */
-#define PCI_CFG_BASE_ADDR_2 0x18 /* Base Address (4 bytes) */
-#define PCI_CFG_BASE_ADDR_3 0x1C /* Base Address (4 bytes) */
-#define PCI_CFG_BASE_ADDR_4 0x20 /* Base Address (4 bytes) */
-#define PCI_CFG_BASE_ADDR_5 0x24 /* Base Address (4 bytes) */
-
-#define PCI_CFG_BASE_ADDR_OFF 0x04 /* Base Address Offset (1..5)*/
-#define PCI_CFG_BASE_ADDR(n) (PCI_CFG_BASE_ADDR_0 + (n)*PCI_CFG_BASE_ADDR_OFF)
-#define PCI_CFG_BASE_ADDRS 6 /* up to this many BASE regs */
-
-#define PCI_CFG_CARDBUS_CIS 0x28 /* Cardbus CIS Pointer (4B) */
-
-#define PCI_CFG_SUBSYS_VEND_ID 0x2C /* Subsystem Vendor ID (2B) */
-#define PCI_CFG_SUBSYS_ID 0x2E /* Subsystem ID */
-
-#define PCI_EXPANSION_ROM 0x30 /* Expansion Rom Base (4B) */
-#define PCI_CAPABILITIES_PTR 0x34 /* Capabilities Pointer */
-
-#define PCI_INTR_LINE 0x3C /* Interrupt Line (1B) */
-#define PCI_INTR_PIN 0x3D /* Interrupt Pin (1B) */
-
-#define PCI_CFG_VEND_SPECIFIC 0x40 /* first vendor specific reg */
-
-/* layout for Type 0x01 headers */
-
-#define PCI_CFG_PPB_BUS_PRI 0x18 /* immediate upstream bus # */
-#define PCI_CFG_PPB_BUS_SEC 0x19 /* immediate downstream bus # */
-#define PCI_CFG_PPB_BUS_SUB 0x1A /* last downstream bus # */
-#define PCI_CFG_PPB_SEC_LAT 0x1B /* latency timer for SEC bus */
-#define PCI_CFG_PPB_IOBASE 0x1C /* IO Base Addr bits 12..15 */
-#define PCI_CFG_PPB_IOLIM 0x1D /* IO Limit Addr bits 12..15 */
-#define PCI_CFG_PPB_SEC_STAT 0x1E /* Secondary Status */
-#define PCI_CFG_PPB_MEMBASE 0x20 /* MEM Base Addr bits 16..31 */
-#define PCI_CFG_PPB_MEMLIM 0x22 /* MEM Limit Addr bits 16..31 */
-#define PCI_CFG_PPB_MEMPFBASE 0x24 /* PfMEM Base Addr bits 16..31 */
-#define PCI_CFG_PPB_MEMPFLIM 0x26 /* PfMEM Limit Addr bits 16..31 */
-#define PCI_CFG_PPB_MEMPFBASEHI 0x28 /* PfMEM Base Addr bits 32..63 */
-#define PCI_CFG_PPB_MEMPFLIMHI 0x2C /* PfMEM Limit Addr bits 32..63 */
-#define PCI_CFG_PPB_IOBASEHI 0x30 /* IO Base Addr bits 16..31 */
-#define PCI_CFG_PPB_IOLIMHI 0x32 /* IO Limit Addr bits 16..31 */
-#define PCI_CFG_PPB_SUB_VENDOR 0x34 /* Subsystem Vendor ID */
-#define PCI_CFG_PPB_SUB_DEVICE 0x36 /* Subsystem Device ID */
-#define PCI_CFG_PPB_ROM_BASE 0x38 /* ROM base address */
-#define PCI_CFG_PPB_INT_LINE 0x3C /* Interrupt Line */
-#define PCI_CFG_PPB_INT_PIN 0x3D /* Interrupt Pin */
-#define PCI_CFG_PPB_BRIDGE_CTRL 0x3E /* Bridge Control */
- /* XXX- these might be DEC 21152 specific */
-#define PCI_CFG_PPB_CHIP_CTRL 0x40
-#define PCI_CFG_PPB_DIAG_CTRL 0x41
-#define PCI_CFG_PPB_ARB_CTRL 0x42
-#define PCI_CFG_PPB_SERR_DISABLE 0x64
-#define PCI_CFG_PPB_CLK2_CTRL 0x68
-#define PCI_CFG_PPB_SERR_STATUS 0x6A
-
-/* Command Register layout (0x04) */
-#define PCI_CMD_IO_SPACE 0x001 /* I/O Space device */
-#define PCI_CMD_MEM_SPACE 0x002 /* Memory Space */
-#define PCI_CMD_BUS_MASTER 0x004 /* Bus Master */
-#define PCI_CMD_SPEC_CYCLES 0x008 /* Special Cycles */
-#define PCI_CMD_MEMW_INV_ENAB 0x010 /* Memory Write Inv Enable */
-#define PCI_CMD_VGA_PALETTE_SNP 0x020 /* VGA Palette Snoop */
-#define PCI_CMD_PAR_ERR_RESP 0x040 /* Parity Error Response */
-#define PCI_CMD_WAIT_CYCLE_CTL 0x080 /* Wait Cycle Control */
-#define PCI_CMD_SERR_ENABLE 0x100 /* SERR# Enable */
-#define PCI_CMD_F_BK_BK_ENABLE 0x200 /* Fast Back-to-Back Enable */
-
-/* Status Register Layout (0x06) */
-#define PCI_STAT_PAR_ERR_DET 0x8000 /* Detected Parity Error */
-#define PCI_STAT_SYS_ERR 0x4000 /* Signaled System Error */
-#define PCI_STAT_RCVD_MSTR_ABT 0x2000 /* Received Master Abort */
-#define PCI_STAT_RCVD_TGT_ABT 0x1000 /* Received Target Abort */
-#define PCI_STAT_SGNL_TGT_ABT 0x0800 /* Signaled Target Abort */
-
-#define PCI_STAT_DEVSEL_TIMING 0x0600 /* DEVSEL Timing Mask */
-#define DEVSEL_TIMING(_x) (((_x) >> 9) & 3) /* devsel tim macro */
-#define DEVSEL_FAST 0 /* Fast timing */
-#define DEVSEL_MEDIUM 1 /* Medium timing */
-#define DEVSEL_SLOW 2 /* Slow timing */
-
-#define PCI_STAT_DATA_PAR_ERR 0x0100 /* Data Parity Err Detected */
-#define PCI_STAT_F_BK_BK_CAP 0x0080 /* Fast Back-to-Back Capable */
-#define PCI_STAT_UDF_SUPP 0x0040 /* UDF Supported */
-#define PCI_STAT_66MHZ_CAP 0x0020 /* 66 MHz Capable */
-#define PCI_STAT_CAP_LIST 0x0010 /* Capabilities List */
-
-/* BIST Register Layout (0x0F) */
-#define PCI_BIST_BIST_CAP 0x80 /* BIST Capable */
-#define PCI_BIST_START_BIST 0x40 /* Start BIST */
-#define PCI_BIST_CMPLTION_MASK 0x0F /* COMPLETION MASK */
-#define PCI_BIST_CMPL_OK 0x00 /* 0 value is completion OK */
-
-/* Base Address Register 0x10 */
-#define PCI_BA_IO_CODEMASK 0x3 /* bottom 2 bits encode I/O BAR type */
-#define PCI_BA_IO_SPACE 0x1 /* I/O Space Marker */
-
-#define PCI_BA_MEM_CODEMASK 0xf /* bottom 4 bits encode MEM BAR type */
-#define PCI_BA_MEM_LOCATION 0x6 /* 2 bits for location avail */
-#define PCI_BA_MEM_32BIT 0x0 /* Anywhere in 32bit space */
-#define PCI_BA_MEM_1MEG 0x2 /* Locate below 1 Meg */
-#define PCI_BA_MEM_64BIT 0x4 /* Anywhere in 64bit space */
-#define PCI_BA_PREFETCH 0x8 /* Prefetchable, no side effect */
-
-#define PCI_BA_ROM_CODEMASK 0x1 /* bottom bit control expansion ROM enable */
-#define PCI_BA_ROM_ENABLE 0x1 /* enable expansion ROM */
-
-/* Bridge Control Register 0x3e */
-#define PCI_BCTRL_DTO_SERR 0x0800 /* Discard Timer timeout generates SERR on primary bus */
-#define PCI_BCTRL_DTO 0x0400 /* Discard Timer timeout status */
-#define PCI_BCTRL_DTO_SEC 0x0200 /* Secondary Discard Timer: 0 => 2^15 PCI clock cycles, 1 => 2^10 */
-#define PCI_BCTRL_DTO_PRI 0x0100 /* Primary Discard Timer: 0 => 2^15 PCI clock cycles, 1 => 2^10 */
-#define PCI_BCTRL_F_BK_BK_ENABLE 0x0080 /* Enable Fast Back-to-Back on secondary bus */
-#define PCI_BCTRL_RESET_SEC 0x0040 /* Reset Secondary bus */
-#define PCI_BCTRL_MSTR_ABT_MODE 0x0020 /* Master Abort Mode: 0 => do not report Master-Aborts */
-#define PCI_BCTRL_VGA_AF_ENABLE 0x0008 /* Enable VGA Address Forwarding */
-#define PCI_BCTRL_ISA_AF_ENABLE 0x0004 /* Enable ISA Address Forwarding */
-#define PCI_BCTRL_SERR_ENABLE 0x0002 /* Enable forwarding of SERR from secondary bus to primary bus */
-#define PCI_BCTRL_PAR_ERR_RESP 0x0001 /* Enable Parity Error Response reporting on secondary interface */
-
-/*
- * PCI 2.2 introduces the concept of ``capability lists.'' Capability lists
- * provide a flexible mechanism for a device or bridge to advertise one or
- * more standardized capabilities such as the presense of a power management
- * interface, etc. The presense of a capability list is indicated by
- * PCI_STAT_CAP_LIST being non-zero in the PCI_CFG_STATUS register. If
- * PCI_STAT_CAP_LIST is set, then PCI_CFG_CAP_PTR is a ``pointer'' into the
- * device-specific portion of the configuration header where the first
- * capability block is stored. This ``pointer'' is a single byte which
- * contains an offset from the beginning of the configuration header. The
- * bottom two bits of the pointer are reserved and should be masked off to
- * determine the offset. Each capability block contains a capability ID, a
- * ``pointer'' to the next capability (another offset where a zero terminates
- * the list) and capability-specific data. Each capability block starts with
- * the capability ID and the ``next capability pointer.'' All data following
- * this are capability-dependent.
- */
-#define PCI_CAP_ID 0x00 /* Capability ID (1B) */
-#define PCI_CAP_PTR 0x01 /* Capability ``pointer'' (1B) */
-
-/* PCI Capability IDs */
-#define PCI_CAP_PM 0x01 /* PCI Power Management */
-#define PCI_CAP_AGP 0x02 /* Accelerated Graphics Port */
-#define PCI_CAP_VPD 0x03 /* Vital Product Data (VPD) */
-#define PCI_CAP_SID 0x04 /* Slot Identification */
-#define PCI_CAP_MSI 0x05 /* Message Signaled Intr */
-#define PCI_CAP_HS 0x06 /* CompactPCI Hot Swap */
-#define PCI_CAP_PCIX 0x07 /* PCI-X */
-#define PCI_CAP_ID_HT 0x08 /* HyperTransport */
-
-
-/* PIO interface macros */
-
-#ifndef IOC3_EMULATION
-
-#define PCI_INB(x) (*((volatile char*)x))
-#define PCI_INH(x) (*((volatile short*)x))
-#define PCI_INW(x) (*((volatile int*)x))
-#define PCI_OUTB(x,y) (*((volatile char*)x) = y)
-#define PCI_OUTH(x,y) (*((volatile short*)x) = y)
-#define PCI_OUTW(x,y) (*((volatile int*)x) = y)
-
-#else
-
-extern unsigned int pci_read(void * address, int type);
-extern void pci_write(void * address, int data, int type);
-
-#define BYTE 1
-#define HALF 2
-#define WORD 4
-
-#define PCI_INB(x) pci_read((void *)(x),BYTE)
-#define PCI_INH(x) pci_read((void *)(x),HALF)
-#define PCI_INW(x) pci_read((void *)(x),WORD)
-#define PCI_OUTB(x,y) pci_write((void *)(x),(y),BYTE)
-#define PCI_OUTH(x,y) pci_write((void *)(x),(y),HALF)
-#define PCI_OUTW(x,y) pci_write((void *)(x),(y),WORD)
-
-#endif /* !IOC3_EMULATION */
- /* effects on reads, merges */
-
-/*
- * Definition of address layouts for PCI Config mechanism #1
- * XXX- These largely duplicate PCI_TYPE1 constants at the top
- * of the file; the two groups should probably be combined.
- */
-
-#define CFG1_ADDR_REGISTER_MASK 0x000000fc
-#define CFG1_ADDR_FUNCTION_MASK 0x00000700
-#define CFG1_ADDR_DEVICE_MASK 0x0000f800
-#define CFG1_ADDR_BUS_MASK 0x00ff0000
-
-#define CFG1_REGISTER_SHIFT 2
-#define CFG1_FUNCTION_SHIFT 8
-#define CFG1_DEVICE_SHIFT 11
-#define CFG1_BUS_SHIFT 16
-
-/*
- * Class codes
- */
-#define PCI_CFG_CLASS_PRE20 0x00
-#define PCI_CFG_CLASS_STORAGE 0x01
-#define PCI_CFG_CLASS_NETWORK 0x02
-#define PCI_CFG_CLASS_DISPLAY 0x03
-#define PCI_CFG_CLASS_MMEDIA 0x04
-#define PCI_CFG_CLASS_MEMORY 0x05
-#define PCI_CFG_CLASS_BRIDGE 0x06
-#define PCI_CFG_CLASS_COMM 0x07
-#define PCI_CFG_CLASS_BASE 0x08
-#define PCI_CFG_CLASS_INPUT 0x09
-#define PCI_CFG_CLASS_DOCK 0x0A
-#define PCI_CFG_CLASS_PROC 0x0B
-#define PCI_CFG_CLASS_SERIALBUS 0x0C
-#define PCI_CFG_CLASS_OTHER 0xFF
-
-/*
- * Important Subclasses
- */
-#define PCI_CFG_SUBCLASS_BRIDGE_HOST 0x00
-#define PCI_CFG_SUBCLASS_BRIDGE_ISA 0x01
-#define PCI_CFG_SUBCLASS_BRIDGE_EISA 0x02
-#define PCI_CFG_SUBCLASS_BRIDGE_MC 0x03
-#define PCI_CFG_SUBCLASS_BRIDGE_PCI 0x04
-#define PCI_CFG_SUBCLASS_BRIDGE_PCMCIA 0x05
-#define PCI_CFG_SUBCLASS_BRIDGE_NUBUS 0x06
-#define PCI_CFG_SUBCLASS_BRIDGE_CARDBUS 0x07
-#define PCI_CFG_SUBCLASS_BRIDGE_OTHER 0x80
-
-#ifndef __ASSEMBLY__
-
-/*
- * PCI config space definition
- */
-typedef volatile struct pci_cfg_s {
- uint16_t vendor_id;
- uint16_t dev_id;
- uint16_t cmd;
- uint16_t status;
- uint8_t rev;
- uint8_t prog_if;
- uint8_t sub_class;
- uint8_t class;
- uint8_t line_size;
- uint8_t lt;
- uint8_t hdr_type;
- uint8_t bist;
- uint32_t bar[6];
- uint32_t cardbus;
- uint16_t subsys_vendor_id;
- uint16_t subsys_dev_id;
- uint32_t exp_rom;
- uint32_t res[2];
- uint8_t int_line;
- uint8_t int_pin;
- uint8_t min_gnt;
- uint8_t max_lat;
-} pci_cfg_t;
-
-/*
- * PCI Type 1 config space definition for PCI to PCI Bridges (PPBs)
- */
-typedef volatile struct pci_cfg1_s {
- uint16_t vendor_id;
- uint16_t dev_id;
- uint16_t cmd;
- uint16_t status;
- uint8_t rev;
- uint8_t prog_if;
- uint8_t sub_class;
- uint8_t class;
- uint8_t line_size;
- uint8_t lt;
- uint8_t hdr_type;
- uint8_t bist;
- uint32_t bar[2];
- uint8_t pri_bus_num;
- uint8_t snd_bus_num;
- uint8_t sub_bus_num;
- uint8_t slt;
- uint8_t io_base;
- uint8_t io_limit;
- uint16_t snd_status;
- uint16_t mem_base;
- uint16_t mem_limit;
- uint16_t pmem_base;
- uint16_t pmem_limit;
- uint32_t pmem_base_upper;
- uint32_t pmem_limit_upper;
- uint16_t io_base_upper;
- uint16_t io_limit_upper;
- uint32_t res;
- uint32_t exp_rom;
- uint8_t int_line;
- uint8_t int_pin;
- uint16_t ppb_control;
-
-} pci_cfg1_t;
-
-/*
- * PCI-X Capability
- */
-typedef volatile struct cap_pcix_cmd_reg_s {
- uint16_t data_parity_enable: 1,
- enable_relaxed_order: 1,
- max_mem_read_cnt: 2,
- max_split: 3,
- reserved1: 9;
-} cap_pcix_cmd_reg_t;
-
-typedef volatile struct cap_pcix_stat_reg_s {
- uint32_t func_num: 3,
- dev_num: 5,
- bus_num: 8,
- bit64_device: 1,
- mhz133_capable: 1,
- split_complt_discard: 1,
- unexpect_split_complt: 1,
- device_complex: 1,
- max_mem_read_cnt: 2,
- max_out_split: 3,
- max_cum_read: 3,
- split_complt_err: 1,
- reserved1: 2;
-} cap_pcix_stat_reg_t;
-
-typedef volatile struct cap_pcix_type0_s {
- uint8_t pcix_cap_id;
- uint8_t pcix_cap_nxt;
- cap_pcix_cmd_reg_t pcix_type0_command;
- cap_pcix_stat_reg_t pcix_type0_status;
-} cap_pcix_type0_t;
-
-#endif /* __ASSEMBLY__ */
-#endif /* _ASM_IA64_SN_PCI_PCI_DEFS_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_PCI_PCIBR_H
-#define _ASM_IA64_SN_PCI_PCIBR_H
-
-#if defined(__KERNEL__)
-
-#include <linux/config.h>
-#include <asm/sn/dmamap.h>
-#include <asm/sn/driver.h>
-#include <asm/sn/pio.h>
-
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/bridge.h>
-
-/* =====================================================================
- * symbolic constants used by pcibr's xtalk bus provider
- */
-
-#define PCIBR_PIOMAP_BUSY 0x80000000
-
-#define PCIBR_DMAMAP_BUSY 0x80000000
-#define PCIBR_DMAMAP_SSRAM 0x40000000
-
-#define PCIBR_INTR_BLOCKED 0x40000000
-#define PCIBR_INTR_BUSY 0x80000000
-
-#ifndef __ASSEMBLY__
-
-/* =====================================================================
- * opaque types used by pcibr's xtalk bus provider
- */
-
-typedef struct pcibr_piomap_s *pcibr_piomap_t;
-typedef struct pcibr_dmamap_s *pcibr_dmamap_t;
-typedef struct pcibr_intr_s *pcibr_intr_t;
-
-/* =====================================================================
- * bus provider function table
- *
- * Normally, this table is only handed off explicitly
- * during provider initialization, and the PCI generic
- * layer will stash a pointer to it in the vertex; however,
- * exporting it explicitly enables a performance hack in
- * the generic PCI provider where if we know at compile
- * time that the only possible PCI provider is a
- * pcibr, we can go directly to this ops table.
- */
-
-extern pciio_provider_t pci_pic_provider;
-
-/* =====================================================================
- * secondary entry points: pcibr PCI bus provider
- *
- * These functions are normally exported explicitly by
- * a direct call from the pcibr initialization routine
- * into the generic crosstalk provider; they are included
- * here to enable a more aggressive performance hack in
- * the generic crosstalk layer, where if we know that the
- * only possible crosstalk provider is pcibr, and we can
- * guarantee that all entry points are properly named, and
- * we can deal with the implicit casting properly, then
- * we can turn many of the generic provider routines into
- * plain brances, or even eliminate them (given sufficient
- * smarts on the part of the compilation system).
- */
-
-extern pcibr_piomap_t pcibr_piomap_alloc(vertex_hdl_t dev,
- device_desc_t dev_desc,
- pciio_space_t space,
- iopaddr_t pci_addr,
- size_t byte_count,
- size_t byte_count_max,
- unsigned flags);
-
-extern void pcibr_piomap_free(pcibr_piomap_t piomap);
-
-extern caddr_t pcibr_piomap_addr(pcibr_piomap_t piomap,
- iopaddr_t xtalk_addr,
- size_t byte_count);
-
-extern void pcibr_piomap_done(pcibr_piomap_t piomap);
-
-extern int pcibr_piomap_probe(pcibr_piomap_t piomap,
- off_t offset,
- int len,
- void *valp);
-
-extern caddr_t pcibr_piotrans_addr(vertex_hdl_t dev,
- device_desc_t dev_desc,
- pciio_space_t space,
- iopaddr_t pci_addr,
- size_t byte_count,
- unsigned flags);
-
-extern iopaddr_t pcibr_piospace_alloc(vertex_hdl_t dev,
- device_desc_t dev_desc,
- pciio_space_t space,
- size_t byte_count,
- size_t alignment);
-extern void pcibr_piospace_free(vertex_hdl_t dev,
- pciio_space_t space,
- iopaddr_t pciaddr,
- size_t byte_count);
-
-extern pcibr_dmamap_t pcibr_dmamap_alloc(vertex_hdl_t dev,
- device_desc_t dev_desc,
- size_t byte_count_max,
- unsigned flags);
-
-extern void pcibr_dmamap_free(pcibr_dmamap_t dmamap);
-
-extern iopaddr_t pcibr_dmamap_addr(pcibr_dmamap_t dmamap,
- paddr_t paddr,
- size_t byte_count);
-
-extern void pcibr_dmamap_done(pcibr_dmamap_t dmamap);
-
-/*
- * pcibr_get_dmatrans_node() will return the compact node id to which
- * all 32-bit Direct Mapping memory accesses will be directed.
- * (This node id can be different for each PCI bus.)
- */
-
-extern cnodeid_t pcibr_get_dmatrans_node(vertex_hdl_t pconn_vhdl);
-
-extern iopaddr_t pcibr_dmatrans_addr(vertex_hdl_t dev,
- device_desc_t dev_desc,
- paddr_t paddr,
- size_t byte_count,
- unsigned flags);
-
-extern void pcibr_dmamap_drain(pcibr_dmamap_t map);
-
-extern void pcibr_dmaaddr_drain(vertex_hdl_t vhdl,
- paddr_t addr,
- size_t bytes);
-
-typedef unsigned pcibr_intr_ibit_f(pciio_info_t info,
- pciio_intr_line_t lines);
-
-extern void pcibr_intr_ibit_set(vertex_hdl_t, pcibr_intr_ibit_f *);
-
-extern pcibr_intr_t pcibr_intr_alloc(vertex_hdl_t dev,
- device_desc_t dev_desc,
- pciio_intr_line_t lines,
- vertex_hdl_t owner_dev);
-
-extern void pcibr_intr_free(pcibr_intr_t intr);
-
-extern int pcibr_intr_connect(pcibr_intr_t intr, intr_func_t, intr_arg_t);
-
-extern void pcibr_intr_disconnect(pcibr_intr_t intr);
-
-extern vertex_hdl_t pcibr_intr_cpu_get(pcibr_intr_t intr);
-
-extern void pcibr_provider_startup(vertex_hdl_t pcibr);
-
-extern void pcibr_provider_shutdown(vertex_hdl_t pcibr);
-
-extern int pcibr_reset(vertex_hdl_t dev);
-
-extern pciio_endian_t pcibr_endian_set(vertex_hdl_t dev,
- pciio_endian_t device_end,
- pciio_endian_t desired_end);
-
-extern uint64_t pcibr_config_get(vertex_hdl_t conn,
- unsigned reg,
- unsigned size);
-
-extern void pcibr_config_set(vertex_hdl_t conn,
- unsigned reg,
- unsigned size,
- uint64_t value);
-
-extern pciio_slot_t pcibr_error_extract(vertex_hdl_t pcibr_vhdl,
- pciio_space_t *spacep,
- iopaddr_t *addrp);
-
-extern int pcibr_wrb_flush(vertex_hdl_t pconn_vhdl);
-extern int pcibr_rrb_check(vertex_hdl_t pconn_vhdl,
- int *count_vchan0,
- int *count_vchan1,
- int *count_reserved,
- int *count_pool);
-
-extern int pcibr_alloc_all_rrbs(vertex_hdl_t vhdl, int even_odd,
- int dev_1_rrbs, int virt1,
- int dev_2_rrbs, int virt2,
- int dev_3_rrbs, int virt3,
- int dev_4_rrbs, int virt4);
-
-typedef void
-rrb_alloc_funct_f (vertex_hdl_t xconn_vhdl,
- int *vendor_list);
-
-typedef rrb_alloc_funct_f *rrb_alloc_funct_t;
-
-void pcibr_set_rrb_callback(vertex_hdl_t xconn_vhdl,
- rrb_alloc_funct_f *func);
-
-extern int pcibr_device_unregister(vertex_hdl_t);
-extern void pcibr_driver_reg_callback(vertex_hdl_t, int, int, int);
-extern void pcibr_driver_unreg_callback(vertex_hdl_t,
- int, int, int);
-
-
-extern void * pcibr_bridge_ptr_get(vertex_hdl_t, int);
-
-/*
- * Bridge-specific flags that can be set via pcibr_device_flags_set
- * and cleared via pcibr_device_flags_clear. Other flags are
- * more generic and are maniuplated through PCI-generic interfaces.
- *
- * Note that all PCI implementation-specific flags (Bridge flags, in
- * this case) are in bits 15-31. The lower 15 bits are reserved
- * for PCI-generic flags.
- *
- * Some of these flags have been "promoted" to the
- * generic layer, so they can be used without having
- * to "know" that the PCI bus is hosted by a Bridge.
- *
- * PCIBR_NO_ATE_ROUNDUP: Request that no rounding up be done when
- * allocating ATE's. ATE count computation will assume that the
- * address to be mapped will start on a page boundary.
- */
-#define PCIBR_NO_ATE_ROUNDUP 0x00008000
-#define PCIBR_WRITE_GATHER 0x00010000 /* please use PCIIO version */
-#define PCIBR_NOWRITE_GATHER 0x00020000 /* please use PCIIO version */
-#define PCIBR_PREFETCH 0x00040000 /* please use PCIIO version */
-#define PCIBR_NOPREFETCH 0x00080000 /* please use PCIIO version */
-#define PCIBR_PRECISE 0x00100000
-#define PCIBR_NOPRECISE 0x00200000
-#define PCIBR_BARRIER 0x00400000
-#define PCIBR_NOBARRIER 0x00800000
-#define PCIBR_VCHAN0 0x01000000
-#define PCIBR_VCHAN1 0x02000000
-#define PCIBR_64BIT 0x04000000
-#define PCIBR_NO64BIT 0x08000000
-#define PCIBR_SWAP 0x10000000
-#define PCIBR_NOSWAP 0x20000000
-
-#define PCIBR_EXTERNAL_ATES 0x40000000 /* uses external ATEs */
-#define PCIBR_ACTIVE 0x80000000 /* need a "done" */
-
-/* Flags that have meaning to pcibr_device_flags_{set,clear} */
-#define PCIBR_DEVICE_FLAGS ( \
- PCIBR_WRITE_GATHER |\
- PCIBR_NOWRITE_GATHER |\
- PCIBR_PREFETCH |\
- PCIBR_NOPREFETCH |\
- PCIBR_PRECISE |\
- PCIBR_NOPRECISE |\
- PCIBR_BARRIER |\
- PCIBR_NOBARRIER \
-)
-
-/* Flags that have meaning to *_dmamap_alloc, *_dmatrans_{addr,list} */
-#define PCIBR_DMA_FLAGS ( \
- PCIBR_PREFETCH |\
- PCIBR_NOPREFETCH |\
- PCIBR_PRECISE |\
- PCIBR_NOPRECISE |\
- PCIBR_BARRIER |\
- PCIBR_NOBARRIER |\
- PCIBR_VCHAN0 |\
- PCIBR_VCHAN1 \
-)
-
-typedef int pcibr_device_flags_t;
-
-#define MINIMAL_ATES_REQUIRED(addr, size) \
- (IOPG(IOPGOFF(addr) + (size) - 1) == IOPG((size) - 1))
-
-#define MINIMAL_ATE_FLAG(addr, size) \
- (MINIMAL_ATES_REQUIRED((u_long)addr, size) ? PCIBR_NO_ATE_ROUNDUP : 0)
-
-/*
- * Set bits in the Bridge Device(x) register for this device.
- * "flags" are defined above. NOTE: this includes turning
- * things *OFF* as well as turning them *ON* ...
- */
-extern int pcibr_device_flags_set(vertex_hdl_t dev,
- pcibr_device_flags_t flags);
-
-/*
- * Allocate Read Response Buffers for use by the specified device.
- * count_vchan0 is the total number of buffers desired for the
- * "normal" channel. count_vchan1 is the total number of buffers
- * desired for the "virtual" channel. Returns 0 on success, or
- * <0 on failure, which occurs when we're unable to allocate any
- * buffers to a channel that desires at least one buffer.
- */
-extern int pcibr_rrb_alloc(vertex_hdl_t pconn_vhdl,
- int *count_vchan0,
- int *count_vchan1);
-
-/*
- * Get the starting PCIbus address out of the given DMA map.
- * This function is supposed to be used by a close friend of PCI bridge
- * since it relies on the fact that the starting address of the map is fixed at
- * the allocation time in the current implementation of PCI bridge.
- */
-extern iopaddr_t pcibr_dmamap_pciaddr_get(pcibr_dmamap_t);
-extern void pcibr_hints_fix_rrbs(vertex_hdl_t);
-extern void pcibr_hints_dualslot(vertex_hdl_t, pciio_slot_t, pciio_slot_t);
-extern void pcibr_hints_subdevs(vertex_hdl_t, pciio_slot_t, ulong);
-extern void pcibr_hints_handsoff(vertex_hdl_t);
-
-typedef unsigned pcibr_intr_bits_f(pciio_info_t, pciio_intr_line_t, int);
-extern void pcibr_hints_intr_bits(vertex_hdl_t, pcibr_intr_bits_f *);
-
-extern int pcibr_asic_rev(vertex_hdl_t);
-
-#endif /* __ASSEMBLY__ */
-#endif /* #if defined(__KERNEL__) */
-/*
- * Some useful ioctls into the pcibr driver
- */
-#define PCIBR 'p'
-#define _PCIBR(x) ((PCIBR << 8) | (x))
-
-/*
- * Bit defintions for variable slot_status in struct
- * pcibr_soft_slot_s. They are here so that the user
- * hot-plug utility can interpret the slot's power
- * status.
- */
-#ifdef CONFIG_HOTPLUG_PCI_SGI
-#define PCI_SLOT_ENABLE_CMPLT 0x01
-#define PCI_SLOT_ENABLE_INCMPLT 0x02
-#define PCI_SLOT_DISABLE_CMPLT 0x04
-#define PCI_SLOT_DISABLE_INCMPLT 0x08
-#define PCI_SLOT_POWER_ON 0x10
-#define PCI_SLOT_POWER_OFF 0x20
-#define PCI_SLOT_IS_SYS_CRITICAL 0x40
-#define PCI_SLOT_PCIBA_LOADED 0x80
-
-#define PCI_SLOT_STATUS_MASK (PCI_SLOT_ENABLE_CMPLT | \
- PCI_SLOT_ENABLE_INCMPLT | \
- PCI_SLOT_DISABLE_CMPLT | \
- PCI_SLOT_DISABLE_INCMPLT)
-#define PCI_SLOT_POWER_MASK (PCI_SLOT_POWER_ON | PCI_SLOT_POWER_OFF)
-
-/*
- * Bit defintions for variable slot_status in struct
- * pcibr_soft_slot_s. They are here so that both
- * the pcibr driver and the pciconfig command can
- * reference them.
- */
-#define SLOT_STARTUP_CMPLT 0x01
-#define SLOT_STARTUP_INCMPLT 0x02
-#define SLOT_SHUTDOWN_CMPLT 0x04
-#define SLOT_SHUTDOWN_INCMPLT 0x08
-#define SLOT_POWER_UP 0x10
-#define SLOT_POWER_DOWN 0x20
-#define SLOT_IS_SYS_CRITICAL 0x40
-
-#define SLOT_STATUS_MASK (SLOT_STARTUP_CMPLT | SLOT_STARTUP_INCMPLT | \
- SLOT_SHUTDOWN_CMPLT | SLOT_SHUTDOWN_INCMPLT)
-#define SLOT_POWER_MASK (SLOT_POWER_UP | SLOT_POWER_DOWN)
-
-/*
- * Bit definitions for variable resp_f_staus.
- * They are here so that both the pcibr driver
- * and the pciconfig command can reference them.
- */
-#define FUNC_IS_VALID 0x01
-#define FUNC_IS_SYS_CRITICAL 0x02
-
-/*
- * L1 slot power operations for PCI hot-plug
- */
-#define PCI_REQ_SLOT_POWER_ON 1
-#define PCI_L1_QSIZE 128 /* our L1 message buffer size */
-
-
-#define L1_QSIZE 128 /* our L1 message buffer size */
-
-enum pcibr_slot_disable_action_e {
- PCI_REQ_SLOT_ELIGIBLE,
- PCI_REQ_SLOT_DISABLE
-};
-
-
-struct pcibr_slot_up_resp_s {
- int resp_sub_errno;
- char resp_l1_msg[L1_QSIZE + 1];
-};
-
-struct pcibr_slot_down_resp_s {
- int resp_sub_errno;
- char resp_l1_msg[L1_QSIZE + 1];
-};
-
-struct pcibr_slot_info_resp_s {
- short resp_bs_bridge_type;
- short resp_bs_bridge_mode;
- int resp_has_host;
- char resp_host_slot;
- vertex_hdl_t resp_slot_conn;
- char resp_slot_conn_name[MAXDEVNAME];
- int resp_slot_status;
- int resp_l1_bus_num;
- int resp_bss_ninfo;
- char resp_bss_devio_bssd_space[16];
- iopaddr_t resp_bss_devio_bssd_base;
- uint64_t resp_bss_device;
- int resp_bss_pmu_uctr;
- int resp_bss_d32_uctr;
- int resp_bss_d64_uctr;
- iopaddr_t resp_bss_d64_base;
- unsigned resp_bss_d64_flags;
- iopaddr_t resp_bss_d32_base;
- unsigned resp_bss_d32_flags;
- volatile unsigned *resp_bss_cmd_pointer;
- unsigned resp_bss_cmd_shadow;
- int resp_bs_rrb_valid;
- int resp_bs_rrb_valid_v1;
- int resp_bs_rrb_valid_v2;
- int resp_bs_rrb_valid_v3;
- int resp_bs_rrb_res;
- uint64_t resp_b_resp;
- uint64_t resp_b_int_device;
- uint64_t resp_b_int_enable;
- uint64_t resp_b_int_host;
- struct pcibr_slot_func_info_resp_s {
- int resp_f_status;
- char resp_f_slot_name[MAXDEVNAME];
- char resp_f_bus;
- char resp_f_slot;
- char resp_f_func;
- char resp_f_master_name[MAXDEVNAME];
- void *resp_f_pops;
- error_handler_f *resp_f_efunc;
- error_handler_arg_t resp_f_einfo;
- int resp_f_vendor;
- int resp_f_device;
-
- struct {
- char resp_w_space[16];
- iopaddr_t resp_w_base;
- size_t resp_w_size;
- } resp_f_window[6];
-
- unsigned resp_f_rbase;
- unsigned resp_f_rsize;
- int resp_f_ibit[4];
- int resp_f_att_det_error;
-
- } resp_func[8];
-};
-
-struct pcibr_slot_req_s {
- int req_slot;
- union {
- enum pcibr_slot_disable_action_e up;
- struct pcibr_slot_down_resp_s *down;
- struct pcibr_slot_info_resp_s *query;
- void *any;
- } req_respp;
- int req_size;
-};
-
-struct pcibr_slot_enable_resp_s {
- int resp_sub_errno;
- char resp_l1_msg[PCI_L1_QSIZE + 1];
-};
-
-struct pcibr_slot_disable_resp_s {
- int resp_sub_errno;
- char resp_l1_msg[PCI_L1_QSIZE + 1];
-};
-
-struct pcibr_slot_enable_req_s {
- pciio_slot_t req_device;
- struct pcibr_slot_enable_resp_s req_resp;
-};
-
-struct pcibr_slot_disable_req_s {
- pciio_slot_t req_device;
- enum pcibr_slot_disable_action_e req_action;
- struct pcibr_slot_disable_resp_s req_resp;
-};
-
-struct pcibr_slot_info_req_s {
- pciio_slot_t req_device;
- struct pcibr_slot_info_resp_s req_resp;
-};
-
-#endif /* CONFIG_HOTPLUG_PCI_SGI */
-
-
-/*
- * PCI specific errors, interpreted by pciconfig command
- */
-
-/* EPERM 1 */
-#define PCI_SLOT_ALREADY_UP 2 /* slot already up */
-#define PCI_SLOT_ALREADY_DOWN 3 /* slot already down */
-#define PCI_IS_SYS_CRITICAL 4 /* slot is system critical */
-/* EIO 5 */
-/* ENXIO 6 */
-#define PCI_L1_ERR 7 /* L1 console command error */
-#define PCI_NOT_A_BRIDGE 8 /* device is not a bridge */
-#define PCI_SLOT_IN_SHOEHORN 9 /* slot is in a shorhorn */
-#define PCI_NOT_A_SLOT 10 /* slot is invalid */
-#define PCI_RESP_AREA_TOO_SMALL 11 /* slot is invalid */
-/* ENOMEM 12 */
-#define PCI_NO_DRIVER 13 /* no driver for device */
-/* EFAULT 14 */
-#define PCI_EMPTY_33MHZ 15 /* empty 33 MHz bus */
-/* EBUSY 16 */
-#define PCI_SLOT_RESET_ERR 17 /* slot reset error */
-#define PCI_SLOT_INFO_INIT_ERR 18 /* slot info init error */
-/* ENODEV 19 */
-#define PCI_SLOT_ADDR_INIT_ERR 20 /* slot addr space init error */
-#define PCI_SLOT_DEV_INIT_ERR 21 /* slot device init error */
-/* EINVAL 22 */
-#define PCI_SLOT_GUEST_INIT_ERR 23 /* slot guest info init error */
-#define PCI_SLOT_RRB_ALLOC_ERR 24 /* slot initial rrb alloc error */
-#define PCI_SLOT_DRV_ATTACH_ERR 25 /* driver attach error */
-#define PCI_SLOT_DRV_DETACH_ERR 26 /* driver detach error */
-/* EFBIG 27 */
-#define PCI_MULTI_FUNC_ERR 28 /* multi-function card error */
-#define PCI_SLOT_RBAR_ALLOC_ERR 29 /* slot PCI-X RBAR alloc error */
-/* ERANGE 34 */
-/* EUNATCH 42 */
-
-#endif /* _ASM_IA64_SN_PCI_PCIBR_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_PCI_PCIBR_PRIVATE_H
-#define _ASM_IA64_SN_PCI_PCIBR_PRIVATE_H
-
-/*
- * pcibr_private.h -- private definitions for pcibr
- * only the pcibr driver (and its closest friends)
- * should ever peek into this file.
- */
-
-#include <linux/pci.h>
-#include <asm/sn/pci/pcibr.h>
-#include <asm/sn/pci/pciio_private.h>
-
-/*
- * convenience typedefs
- */
-
-typedef uint64_t pcibr_DMattr_t;
-typedef uint32_t pcibr_ATEattr_t;
-
-typedef struct pcibr_info_s *pcibr_info_t, **pcibr_info_h;
-typedef struct pcibr_soft_s *pcibr_soft_t;
-typedef struct pcibr_soft_slot_s *pcibr_soft_slot_t;
-typedef struct pcibr_hints_s *pcibr_hints_t;
-typedef struct pcibr_intr_list_s *pcibr_intr_list_t;
-typedef struct pcibr_intr_wrap_s *pcibr_intr_wrap_t;
-typedef struct pcibr_intr_cbuf_s *pcibr_intr_cbuf_t;
-
-typedef volatile unsigned int *cfg_p;
-typedef volatile bridgereg_t *reg_p;
-
-/*
- * extern functions
- */
-cfg_p pcibr_slot_config_addr(pcibr_soft_t, pciio_slot_t, int);
-cfg_p pcibr_func_config_addr(pcibr_soft_t, pciio_bus_t bus, pciio_slot_t, pciio_function_t, int);
-void pcibr_debug(uint32_t, vertex_hdl_t, char *, ...);
-void pcibr_func_config_set(pcibr_soft_t, pciio_slot_t, pciio_function_t, int, unsigned);
-/*
- * pcireg_ externs
- */
-
-extern uint64_t pcireg_id_get(pcibr_soft_t);
-extern uint64_t pcireg_bridge_id_get(void *);
-extern uint64_t pcireg_bus_err_get(pcibr_soft_t);
-extern uint64_t pcireg_control_get(pcibr_soft_t);
-extern uint64_t pcireg_bridge_control_get(void *);
-extern void pcireg_control_set(pcibr_soft_t, uint64_t);
-extern void pcireg_control_bit_clr(pcibr_soft_t, uint64_t);
-extern void pcireg_control_bit_set(pcibr_soft_t, uint64_t);
-extern void pcireg_req_timeout_set(pcibr_soft_t, uint64_t);
-extern void pcireg_intr_dst_set(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_intr_dst_target_id_get(pcibr_soft_t);
-extern void pcireg_intr_dst_target_id_set(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_intr_dst_addr_get(pcibr_soft_t);
-extern void pcireg_intr_dst_addr_set(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_cmdword_err_get(pcibr_soft_t);
-extern uint64_t pcireg_llp_cfg_get(pcibr_soft_t);
-extern void pcireg_llp_cfg_set(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_tflush_get(pcibr_soft_t);
-extern uint64_t pcireg_linkside_err_get(pcibr_soft_t);
-extern uint64_t pcireg_resp_err_get(pcibr_soft_t);
-extern uint64_t pcireg_resp_err_addr_get(pcibr_soft_t);
-extern uint64_t pcireg_resp_err_buf_get(pcibr_soft_t);
-extern uint64_t pcireg_resp_err_dev_get(pcibr_soft_t);
-extern uint64_t pcireg_linkside_err_addr_get(pcibr_soft_t);
-extern uint64_t pcireg_dirmap_get(pcibr_soft_t);
-extern void pcireg_dirmap_set(pcibr_soft_t, uint64_t);
-extern void pcireg_dirmap_wid_set(pcibr_soft_t, uint64_t);
-extern void pcireg_dirmap_diroff_set(pcibr_soft_t, uint64_t);
-extern void pcireg_dirmap_add512_set(pcibr_soft_t);
-extern void pcireg_dirmap_add512_clr(pcibr_soft_t);
-extern uint64_t pcireg_map_fault_get(pcibr_soft_t);
-extern uint64_t pcireg_arbitration_get(pcibr_soft_t);
-extern void pcireg_arbitration_set(pcibr_soft_t, uint64_t);
-extern void pcireg_arbitration_bit_clr(pcibr_soft_t, uint64_t);
-extern void pcireg_arbitration_bit_set(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_parity_err_get(pcibr_soft_t);
-extern uint64_t pcireg_type1_cntr_get(pcibr_soft_t);
-extern void pcireg_type1_cntr_set(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_timeout_get(pcibr_soft_t);
-extern void pcireg_timeout_set(pcibr_soft_t, uint64_t);
-extern void pcireg_timeout_bit_clr(pcibr_soft_t, uint64_t);
-extern void pcireg_timeout_bit_set(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_pci_bus_addr_get(pcibr_soft_t);
-extern uint64_t pcireg_pci_bus_addr_addr_get(pcibr_soft_t);
-extern uint64_t pcireg_intr_status_get(pcibr_soft_t);
-extern uint64_t pcireg_intr_enable_get(pcibr_soft_t);
-extern void pcireg_intr_enable_set(pcibr_soft_t, uint64_t);
-extern void pcireg_intr_enable_bit_clr(pcibr_soft_t, uint64_t);
-extern void pcireg_intr_enable_bit_set(pcibr_soft_t, uint64_t);
-extern void pcireg_intr_reset_set(pcibr_soft_t, uint64_t);
-extern void pcireg_intr_reset_bit_set(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_intr_mode_get(pcibr_soft_t);
-extern void pcireg_intr_mode_set(pcibr_soft_t, uint64_t);
-extern void pcireg_intr_mode_bit_clr(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_intr_device_get(pcibr_soft_t);
-extern void pcireg_intr_device_set(pcibr_soft_t, uint64_t);
-extern void pcireg_intr_device_bit_set(pcibr_soft_t, uint64_t);
-extern void pcireg_bridge_intr_device_bit_set(void *, uint64_t);
-extern void pcireg_intr_device_bit_clr(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_intr_host_err_get(pcibr_soft_t);
-extern void pcireg_intr_host_err_set(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_intr_addr_get(pcibr_soft_t, int);
-extern void pcireg_intr_addr_set(pcibr_soft_t, int, uint64_t);
-extern void pcireg_bridge_intr_addr_set(void *, int, uint64_t);
-extern void * pcireg_intr_addr_addr(pcibr_soft_t, int);
-extern void pcireg_intr_addr_vect_set(pcibr_soft_t, int, uint64_t);
-extern void pcireg_bridge_intr_addr_vect_set(void *, int, uint64_t);
-extern uint64_t pcireg_intr_addr_addr_get(pcibr_soft_t, int);
-extern void pcireg_intr_addr_addr_set(pcibr_soft_t, int, uint64_t);
-extern void pcireg_bridge_intr_addr_addr_set(void *, int, uint64_t);
-extern uint64_t pcireg_intr_view_get(pcibr_soft_t);
-extern uint64_t pcireg_intr_multiple_get(pcibr_soft_t);
-extern void pcireg_force_always_set(pcibr_soft_t, int);
-extern void * pcireg_bridge_force_always_addr_get(void *, int);
-extern void * pcireg_force_always_addr_get(pcibr_soft_t, int);
-extern void pcireg_force_intr_set(pcibr_soft_t, int);
-extern uint64_t pcireg_device_get(pcibr_soft_t, int);
-extern void pcireg_device_set(pcibr_soft_t, int, uint64_t);
-extern void pcireg_device_bit_set(pcibr_soft_t, int, uint64_t);
-extern void pcireg_device_bit_clr(pcibr_soft_t, int, uint64_t);
-extern uint64_t pcireg_rrb_get(pcibr_soft_t, int);
-extern void pcireg_rrb_set(pcibr_soft_t, int, uint64_t);
-extern void pcireg_rrb_bit_set(pcibr_soft_t, int, uint64_t);
-extern void pcireg_rrb_bit_clr(pcibr_soft_t, int, uint64_t);
-extern uint64_t pcireg_rrb_status_get(pcibr_soft_t);
-extern void pcireg_rrb_clear_set(pcibr_soft_t, uint64_t);
-extern uint64_t pcireg_wrb_flush_get(pcibr_soft_t, int);
-extern uint64_t pcireg_pcix_bus_err_addr_get(pcibr_soft_t);
-extern uint64_t pcireg_pcix_bus_err_attr_get(pcibr_soft_t);
-extern uint64_t pcireg_pcix_bus_err_data_get(pcibr_soft_t);
-extern uint64_t pcireg_pcix_req_err_attr_get(pcibr_soft_t);
-extern uint64_t pcireg_pcix_req_err_addr_get(pcibr_soft_t);
-extern uint64_t pcireg_pcix_pio_split_addr_get(pcibr_soft_t);
-extern uint64_t pcireg_pcix_pio_split_attr_get(pcibr_soft_t);
-extern cfg_p pcireg_type1_cfg_addr(pcibr_soft_t, pciio_function_t,
- int);
-extern cfg_p pcireg_type0_cfg_addr(pcibr_soft_t, pciio_slot_t,
- pciio_function_t, int);
-extern bridge_ate_t pcireg_int_ate_get(pcibr_soft_t, int);
-extern void pcireg_int_ate_set(pcibr_soft_t, int, bridge_ate_t);
-extern bridge_ate_p pcireg_int_ate_addr(pcibr_soft_t, int);
-
-extern uint64_t pcireg_speed_get(pcibr_soft_t);
-extern uint64_t pcireg_mode_get(pcibr_soft_t);
-
-/*
- * PCIBR_DEBUG() macro and debug bitmask defines
- */
-/* low freqency debug events (ie. initialization, resource allocation,...) */
-#define PCIBR_DEBUG_INIT 0x00000001 /* bridge init */
-#define PCIBR_DEBUG_HINTS 0x00000002 /* bridge hints */
-#define PCIBR_DEBUG_ATTACH 0x00000004 /* bridge attach */
-#define PCIBR_DEBUG_DETACH 0x00000008 /* bridge detach */
-#define PCIBR_DEBUG_ATE 0x00000010 /* bridge ATE allocation */
-#define PCIBR_DEBUG_RRB 0x00000020 /* bridge RRB allocation */
-#define PCIBR_DEBUG_RBAR 0x00000040 /* bridge RBAR allocation */
-#define PCIBR_DEBUG_PROBE 0x00000080 /* bridge device probing */
-#define PCIBR_DEBUG_INTR_ERROR 0x00000100 /* bridge error interrupt */
-#define PCIBR_DEBUG_ERROR_HDLR 0x00000200 /* bridge error handler */
-#define PCIBR_DEBUG_CONFIG 0x00000400 /* device's config space */
-#define PCIBR_DEBUG_BAR 0x00000800 /* device's BAR allocations */
-#define PCIBR_DEBUG_INTR_ALLOC 0x00001000 /* device's intr allocation */
-#define PCIBR_DEBUG_DEV_ATTACH 0x00002000 /* device's attach */
-#define PCIBR_DEBUG_DEV_DETACH 0x00004000 /* device's detach */
-#define PCIBR_DEBUG_HOTPLUG 0x00008000
-
-/* high freqency debug events (ie. map allocation, direct translation,...) */
-#define PCIBR_DEBUG_DEVREG 0x04000000 /* bridges device reg sets */
-#define PCIBR_DEBUG_PIOMAP 0x08000000 /* pcibr_piomap */
-#define PCIBR_DEBUG_PIODIR 0x10000000 /* pcibr_piotrans */
-#define PCIBR_DEBUG_DMAMAP 0x20000000 /* pcibr_dmamap */
-#define PCIBR_DEBUG_DMADIR 0x40000000 /* pcibr_dmatrans */
-#define PCIBR_DEBUG_INTR 0x80000000 /* interrupts */
-
-extern char *pcibr_debug_module;
-extern int pcibr_debug_widget;
-extern int pcibr_debug_slot;
-extern uint32_t pcibr_debug_mask;
-
-/* For low frequency events (ie. initialization, resource allocation,...) */
-#define PCIBR_DEBUG_ALWAYS(args) pcibr_debug args ;
-
-/* XXX: habeck: maybe make PCIBR_DEBUG() always available? Even in non-
- * debug kernels? If tracing isn't enabled (i.e pcibr_debug_mask isn't
- * set, then the overhead for this macro is just an extra 'if' check.
- */
-/* For high frequency events (ie. map allocation, direct translation,...) */
-#if DEBUG
-#define PCIBR_DEBUG(args) PCIBR_DEBUG_ALWAYS(args)
-#else /* DEBUG */
-#define PCIBR_DEBUG(args)
-#endif /* DEBUG */
-
-/*
- * Bridge sets up PIO using this information.
- */
-struct pcibr_piomap_s {
- struct pciio_piomap_s bp_pp; /* generic stuff */
-
-#define bp_flags bp_pp.pp_flags /* PCIBR_PIOMAP flags */
-#define bp_dev bp_pp.pp_dev /* associated pci card */
-#define bp_slot bp_pp.pp_slot /* which slot the card is in */
-#define bp_space bp_pp.pp_space /* which address space */
-#define bp_pciaddr bp_pp.pp_pciaddr /* starting offset of mapping */
-#define bp_mapsz bp_pp.pp_mapsz /* size of this mapping */
-#define bp_kvaddr bp_pp.pp_kvaddr /* kernel virtual address to use */
-
- iopaddr_t bp_xtalk_addr; /* corresponding xtalk address */
- xtalk_piomap_t bp_xtalk_pio; /* corresponding xtalk resource */
- pcibr_piomap_t bp_next; /* Next piomap on the list */
- pcibr_soft_t bp_soft; /* backpointer to bridge soft data */
- atomic_t bp_toc; /* PCI timeout counter */
-
-};
-
-/*
- * Bridge sets up DMA using this information.
- */
-struct pcibr_dmamap_s {
- struct pciio_dmamap_s bd_pd;
-#define bd_flags bd_pd.pd_flags /* PCIBR_DMAMAP flags */
-#define bd_dev bd_pd.pd_dev /* associated pci card */
-#define bd_slot bd_pd.pd_slot /* which slot the card is in */
- struct pcibr_soft_s *bd_soft; /* pcibr soft state backptr */
- xtalk_dmamap_t bd_xtalk; /* associated xtalk resources */
-
- size_t bd_max_size; /* maximum size of mapping */
- xwidgetnum_t bd_xio_port; /* target XIO port */
- iopaddr_t bd_xio_addr; /* target XIO address */
- iopaddr_t bd_pci_addr; /* via PCI address */
-
- int bd_ate_index; /* Address Translation Entry Index */
- int bd_ate_count; /* number of ATE's allocated */
- bridge_ate_p bd_ate_ptr; /* where to write first ATE */
- bridge_ate_t bd_ate_proto; /* prototype ATE (for xioaddr=0) */
- bridge_ate_t bd_ate_prime; /* value of 1st ATE written */
- dma_addr_t bd_dma_addr; /* Linux dma handle */
- struct resource resource;
-};
-
-#define IBUFSIZE 5 /* size of circular buffer (holds 4) */
-
-/*
- * Circular buffer used for interrupt processing
- */
-struct pcibr_intr_cbuf_s {
- spinlock_t ib_lock; /* cbuf 'put' lock */
- int ib_in; /* index of next free entry */
- int ib_out; /* index of next full entry */
- pcibr_intr_wrap_t ib_cbuf[IBUFSIZE]; /* circular buffer of wrap */
-};
-
-/*
- * Bridge sets up interrupts using this information.
- */
-
-struct pcibr_intr_s {
- struct pciio_intr_s bi_pi;
-#define bi_flags bi_pi.pi_flags /* PCIBR_INTR flags */
-#define bi_dev bi_pi.pi_dev /* associated pci card */
-#define bi_lines bi_pi.pi_lines /* which PCI interrupt line(s) */
-#define bi_func bi_pi.pi_func /* handler function (when connected) */
-#define bi_arg bi_pi.pi_arg /* handler parameter (when connected) */
-#define bi_mustruncpu bi_pi.pi_mustruncpu /* Where we must run. */
-#define bi_irq bi_pi.pi_irq /* IRQ assigned. */
-#define bi_cpu bi_pi.pi_cpu /* cpu assigned. */
- unsigned int bi_ibits; /* which Bridge interrupt bit(s) */
- pcibr_soft_t bi_soft; /* shortcut to soft info */
- struct pcibr_intr_cbuf_s bi_ibuf; /* circular buffer of wrap ptrs */
- unsigned bi_last_intr; /* For Shub lb lost intr. bug */
-};
-
-
-/*
- * PCIBR_INFO_SLOT_GET_EXT returns the external slot number that the card
- * resides in. (i.e the slot number silk screened on the back of the I/O
- * brick). PCIBR_INFO_SLOT_GET_INT returns the internal slot (or device)
- * number used by the pcibr code to represent that external slot (i.e to
- * set bit patterns in BRIDGE/PIC registers to represent the device, or to
- * offset into an array, or ...).
- *
- * In BRIDGE and XBRIDGE the external slot and internal device numbering
- * are the same. (0->0, 1->1, 2->2,... 7->7) BUT in the PIC the external
- * slot number is always 1 greater than the internal device number (1->0,
- * 2->1, 3->2, 4->3). This is due to the fact that the PCI-X spec requires
- * that the 'bridge' (i.e PIC) be designated as 'device 0', thus external
- * slot numbering can't start at zero.
- *
- * PCIBR_DEVICE_TO_SLOT converts an internal device number to an external
- * slot number. NOTE: PCIIO_SLOT_NONE stays as PCIIO_SLOT_NONE.
- *
- * PCIBR_SLOT_TO_DEVICE converts an external slot number to an internal
- * device number. NOTE: PCIIO_SLOT_NONE stays as PCIIO_SLOT_NONE.
- */
-#define PCIBR_INFO_SLOT_GET_EXT(info) (((pcibr_info_t)info)->f_slot)
-#define PCIBR_INFO_SLOT_GET_INT(info) (((pcibr_info_t)info)->f_dev)
-
-#define PCIBR_DEVICE_TO_SLOT(pcibr_soft, dev_num) \
- (((dev_num) != PCIIO_SLOT_NONE) ? ((dev_num) + 1) : PCIIO_SLOT_NONE)
-
-#define PCIBR_SLOT_TO_DEVICE(pcibr_soft, slot) \
- (((slot) != PCIIO_SLOT_NONE) ? ((slot) - 1) : PCIIO_SLOT_NONE)
-
-/*
- * per-connect point pcibr data, including standard pciio data in-line:
- */
-struct pcibr_info_s {
- struct pciio_info_s f_c; /* MUST BE FIRST. */
-#define f_vertex f_c.c_vertex /* back pointer to vertex */
-#define f_bus f_c.c_bus /* which bus the card is in */
-#define f_slot f_c.c_slot /* which slot the card is in */
-#define f_func f_c.c_func /* which func (on multi-func cards) */
-#define f_vendor f_c.c_vendor /* PCI card "vendor" code */
-#define f_device f_c.c_device /* PCI card "device" code */
-#define f_master f_c.c_master /* PCI bus provider */
-#define f_mfast f_c.c_mfast /* cached fastinfo from c_master */
-#define f_pops f_c.c_pops /* cached provider from c_master */
-#define f_efunc f_c.c_efunc /* error handling function */
-#define f_einfo f_c.c_einfo /* first parameter for efunc */
-#define f_window f_c.c_window /* state of BASE regs */
-#define f_rwindow f_c.c_rwindow /* expansion ROM BASE regs */
-#define f_rbase f_c.c_rbase /* expansion ROM base */
-#define f_rsize f_c.c_rsize /* expansion ROM size */
-#define f_piospace f_c.c_piospace /* additional I/O spaces allocated */
-
- /* pcibr-specific connection state */
- int f_ibit[4]; /* Bridge bit for each INTx */
- pcibr_piomap_t f_piomap;
- int f_att_det_error;
- pciio_slot_t f_dev; /* which device the card represents */
- cap_pcix_type0_t *f_pcix_cap; /* pointer to the pcix capability */
-};
-
-/* =====================================================================
- * Shared Interrupt Information
- */
-
-struct pcibr_intr_list_s {
- pcibr_intr_list_t il_next;
- pcibr_intr_t il_intr;
- pcibr_soft_t il_soft;
- pciio_slot_t il_slot;
-};
-
-/* =====================================================================
- * Interrupt Wrapper Data
- */
-struct pcibr_intr_wrap_s {
- pcibr_soft_t iw_soft; /* which bridge */
- volatile bridgereg_t *iw_stat; /* ptr to b_int_status */
- bridgereg_t iw_ibit; /* bit in b_int_status */
- pcibr_intr_list_t iw_list; /* ghostbusters! */
- int iw_hdlrcnt; /* running handler count */
- int iw_shared; /* if Bridge bit is shared */
- int iw_connected; /* if already connected */
-};
-
-#define PCIBR_ISR_ERR_START 8
-#define PCIBR_ISR_MAX_ERRS_BRIDGE 32
-#define PCIBR_ISR_MAX_ERRS_PIC 45
-#define PCIBR_ISR_MAX_ERRS PCIBR_ISR_MAX_ERRS_PIC
-
-/*
- * PCI Base Address Register window allocation constants.
- * To reduce the size of the internal resource mapping structures, do
- * not use the entire PCI bus I/O address space
- */
-#define PCIBR_BUS_IO_BASE 0x200000
-#define PCIBR_BUS_IO_MAX 0x0FFFFFFF
-#define PCIBR_BUS_IO_PAGE 0x100000
-
-#define PCIBR_BUS_SWIN_BASE PAGE_SIZE
-#define PCIBR_BUS_SWIN_MAX 0x000FFFFF
-#define PCIBR_BUS_SWIN_PAGE PAGE_SIZE
-
-#define PCIBR_BUS_MEM_BASE 0x200000
-#define PCIBR_BUS_MEM_MAX 0x3FFFFFFF
-#define PCIBR_BUS_MEM_PAGE 0x100000
-
-/* defines for pcibr_soft_s->bs_bridge_type */
-#define PCIBR_BRIDGETYPE_PIC 2
-#define IS_PIC_BUSNUM_SOFT(ps, bus) ((ps)->bs_busnum == (bus))
-
-/*
- * Runtime checks for workarounds.
- */
-#define PCIBR_WAR_ENABLED(pv, pcibr_soft) \
- ((1 << XWIDGET_PART_REV_NUM_REV(pcibr_soft->bs_rev_num)) & pv)
-
-/* defines for pcibr_soft_s->bs_bridge_mode */
-#define PCIBR_BRIDGEMODE_PCI_33 0x0
-#define PCIBR_BRIDGEMODE_PCI_66 0x2
-#define PCIBR_BRIDGEMODE_PCIX_66 0x3
-#define PCIBR_BRIDGEMODE_PCIX_100 0x5
-#define PCIBR_BRIDGEMODE_PCIX_133 0x7
-#define BUSSPEED_MASK 0x6
-#define BUSTYPE_MASK 0x1
-
-#define IS_PCI(ps) (!IS_PCIX(ps))
-#define IS_PCIX(ps) ((ps)->bs_bridge_mode & BUSTYPE_MASK)
-
-#define IS_33MHZ(ps) ((ps)->bs_bridge_mode == PCIBR_BRIDGEMODE_PCI_33)
-#define IS_66MHZ(ps) (((ps)->bs_bridge_mode == PCIBR_BRIDGEMODE_PCI_66) || \
- ((ps)->bs_bridge_mode == PCIBR_BRIDGEMODE_PCIX_66))
-#define IS_100MHZ(ps) ((ps)->bs_bridge_mode == PCIBR_BRIDGEMODE_PCIX_100)
-#define IS_133MHZ(ps) ((ps)->bs_bridge_mode == PCIBR_BRIDGEMODE_PCIX_133)
-
-
-/* Number of PCI slots. NOTE: this works as long as the first slot
- * is zero. Otherwise use ((ps->bs_max_slot+1) - ps->bs_min_slot)
- */
-#define PCIBR_NUM_SLOTS(ps) (ps->bs_max_slot+1)
-
-/* =====================================================================
- * Bridge Device State structure
- *
- * one instance of this structure is kept for each
- * Bridge ASIC in the system.
- */
-
-struct pcibr_soft_s {
- vertex_hdl_t bs_conn; /* xtalk connection point */
- vertex_hdl_t bs_vhdl; /* vertex owned by pcibr */
- uint64_t bs_int_enable; /* Mask of enabled intrs */
- void *bs_base; /* PIO pointer to Bridge chip */
- char *bs_name; /* hw graph name */
- char bs_asic_name[16]; /* ASIC name */
- xwidgetnum_t bs_xid; /* Bridge's xtalk ID number */
- vertex_hdl_t bs_master; /* xtalk master vertex */
- xwidgetnum_t bs_mxid; /* master's xtalk ID number */
- pciio_slot_t bs_first_slot; /* first existing slot */
- pciio_slot_t bs_last_slot; /* last existing slot */
- pciio_slot_t bs_last_reset; /* last slot to reset */
- uint32_t bs_unused_slot; /* unavailable slots bitmask */
- pciio_slot_t bs_min_slot; /* lowest possible slot */
- pciio_slot_t bs_max_slot; /* highest possible slot */
- pcibr_soft_t bs_peers_soft; /* PICs other bus's soft */
- int bs_busnum; /* PIC has two pci busses */
-
- iopaddr_t bs_dir_xbase; /* xtalk address for 32-bit PCI direct map */
- xwidgetnum_t bs_dir_xport; /* xtalk port for 32-bit PCI direct map */
-
- struct resource bs_int_ate_resource;/* root resource for internal ATEs */
- struct resource bs_ext_ate_resource;/* root resource for external ATEs */
- void *bs_allocated_ate_res;/* resource struct allocated */
- short bs_int_ate_size; /* number of internal ates */
- short bs_bridge_type; /* see defines above */
- short bs_bridge_mode; /* see defines above */
-
- int bs_rev_num; /* revision number of Bridge */
-
- /* bs_dma_flags are the forced dma flags used on all DMAs. Used for
- * working around ASIC rev issues and protocol specific requirements
- */
- unsigned int bs_dma_flags; /* forced DMA flags */
-
- nasid_t bs_nasid; /* nasid this bus is on */
- moduleid_t bs_moduleid; /* io brick moduleid */
- short bs_bricktype; /* io brick type */
-
- /*
- * Lock used primarily to get mutual exclusion while managing any
- * bridge resources..
- */
- spinlock_t bs_lock;
-
- vertex_hdl_t bs_noslot_conn; /* NO-SLOT connection point */
- pcibr_info_t bs_noslot_info;
-
-#ifdef CONFIG_HOTPLUG_PCI_SGI
- /* Linux PCI bus structure pointer */
- struct pci_bus *bs_pci_bus;
-#endif
-
- struct pcibr_soft_slot_s {
- /* information we keep about each CFG slot */
-
- /* some devices (ioc3 in non-slotted
- * configurations, sometimes) make use
- * of more than one REQ/GNT/INT* signal
- * sets. The slot corresponding to the
- * IDSEL that the device responds to is
- * called the host slot; the slot
- * numbers that the device is stealing
- * REQ/GNT/INT bits from are known as
- * the guest slots.
- */
- int has_host;
- pciio_slot_t host_slot;
- vertex_hdl_t slot_conn;
-
-#ifdef CONFIG_HOTPLUG_PCI_SGI
- /* PCI Hot-Plug status word */
- int slot_status;
-
- /* PCI Hot-Plug core structure pointer */
- struct hotplug_slot *bss_hotplug_slot;
-#endif /* CONFIG_HOTPLUG_PCI_SGI */
-
- /* Potentially several connection points
- * for this slot. bss_ninfo is how many,
- * and bss_infos is a pointer to
- * an array pcibr_info_t values (which are
- * pointers to pcibr_info structs, stored
- * as device_info in connection ponts).
- */
- int bss_ninfo;
- pcibr_info_h bss_infos;
-
- /* Temporary Compatibility Macros, for
- * stuff that has moved out of bs_slot
- * and into the info structure. These
- * will go away when their users have
- * converted over to multifunction-
- * friendly use of bss_{ninfo,infos}.
- */
-#define bss_vendor_id bss_infos[0]->f_vendor
-#define bss_device_id bss_infos[0]->f_device
-#define bss_window bss_infos[0]->f_window
-#define bssw_space w_space
-#define bssw_base w_base
-#define bssw_size w_size
-
- /* Where is DevIO(x) pointing? */
- /* bssd_space is NONE if it is not assigned. */
- struct {
- pciio_space_t bssd_space;
- iopaddr_t bssd_base;
- int bssd_ref_cnt;
- } bss_devio;
-
- /* Shadow value for Device(x) register,
- * so we don't have to go to the chip.
- */
- uint64_t bss_device;
-
- /* Number of sets on GBR/REALTIME bit outstanding
- * Used by Priority I/O for tracking reservations
- */
- int bss_pri_uctr;
-
- /* Number of "uses" of PMU, 32-bit direct,
- * and 64-bit direct DMA (0:none, <0: trans,
- * >0: how many dmamaps). Device(x) bits
- * controlling attribute of each kind of
- * channel can't be changed by dmamap_alloc
- * or dmatrans if the controlling counter
- * is nonzero. dmatrans is forever.
- */
- int bss_pmu_uctr;
- int bss_d32_uctr;
- int bss_d64_uctr;
-
- /* When the contents of mapping configuration
- * information is locked down by dmatrans,
- * repeated checks of the same flags should
- * be shortcircuited for efficiency.
- */
- iopaddr_t bss_d64_base;
- unsigned bss_d64_flags;
- iopaddr_t bss_d32_base;
- unsigned bss_d32_flags;
- } bs_slot[8];
-
- pcibr_intr_bits_f *bs_intr_bits;
-
- /* PIC PCI-X Read Buffer Management :
- * bs_pcix_num_funcs: the total number of PCI-X functions
- * on the bus
- * bs_pcix_split_tot: total number of outstanding split
- * transactions requested by all functions on the bus
- * bs_pcix_rbar_percent_allowed: the percentage of the
- * total number of buffers a function requested that are
- * available to it, not including the 1 RBAR guaranteed
- * to it.
- * bs_pcix_rbar_inuse: number of RBARs in use.
- * bs_pcix_rbar_avail: number of RBARs available. NOTE:
- * this value can go negative if we oversubscribe the
- * RBARs. (i.e. We have 16 RBARs but 17 functions).
- */
- int bs_pcix_num_funcs;
- int bs_pcix_split_tot;
- int bs_pcix_rbar_percent_allowed;
-
- int bs_pcix_rbar_inuse;
- int bs_pcix_rbar_avail;
-
-
- /* RRB MANAGEMENT
- * bs_rrb_fixed: bitmap of slots whose RRB
- * allocations we should not "automatically" change
- * bs_rrb_avail: number of RRBs that have not
- * been allocated or reserved for {even,odd} slots
- * bs_rrb_res: number of RRBs currently reserved for the
- * use of the index slot number
- * bs_rrb_res_dflt: number of RRBs reserved at boot
- * time for the use of the index slot number
- * bs_rrb_valid: number of RRBs currently marked valid
- * for the indexed slot/vchan number; array[slot][vchan]
- * bs_rrb_valid_dflt: number of RRBs marked valid at boot
- * time for the indexed slot/vchan number; array[slot][vchan]
- */
- int bs_rrb_fixed;
- int bs_rrb_avail[2];
- int bs_rrb_res[8];
- int bs_rrb_res_dflt[8];
- int bs_rrb_valid[8][4];
- int bs_rrb_valid_dflt[8][4];
- struct {
- /* Each Bridge interrupt bit has a single XIO
- * interrupt channel allocated.
- */
- xtalk_intr_t bsi_xtalk_intr;
- /*
- * A wrapper structure is associated with each
- * Bridge interrupt bit.
- */
- struct pcibr_intr_wrap_s bsi_pcibr_intr_wrap;
- /* The bus and interrupt bit, used for pcibr_setpciint().
- * The pci busnum is bit3, int_bits bit2:0
- */
- uint32_t bsi_int_bit;
-
- } bs_intr[8];
-
- xtalk_intr_t bsi_err_intr;
-
- /*
- * We stash away some information in this structure on getting
- * an error interrupt. This information is used during PIO read/
- * write error handling.
- *
- * As it stands now, we do not re-enable the error interrupt
- * till the error is resolved. Error resolution happens either at
- * bus error time for PIO Read errors (~100 microseconds), or at
- * the scheduled timeout time for PIO write errors (~milliseconds).
- * If this delay causes problems, we may need to move towards
- * a different scheme..
- *
- * Note that there is no locking while looking at this data structure.
- * There should not be any race between bus error code and
- * error interrupt code.. will look into this if needed.
- *
- * NOTE: The above discussion of error interrupt processing is
- * no longer true. Whether it should again be true, is
- * being looked into.
- */
- struct br_errintr_info {
- int bserr_toutcnt;
- iopaddr_t bserr_addr; /* Address where error occured */
- uint64_t bserr_intstat; /* interrupts active at error dump */
- } bs_errinfo;
-
- /*
- * PCI Bus Space allocation data structure.
- *
- * The resource mapping functions rmalloc() and rmfree() are used
- * to manage the PCI bus I/O, small window, and memory address
- * spaces.
- *
- * This info is used to assign PCI bus space addresses to cards
- * via their BARs and to the callers of the pcibr_piospace_alloc()
- * interface.
- *
- * Users of the pcibr_piospace_alloc() interface, such as the VME
- * Universe chip, need PCI bus space that is not acquired by BARs.
- * Most of these users need "large" amounts of PIO space (typically
- * in Megabytes), and they generally tend to take once and never
- * release.
- */
- struct pciio_win_map_s bs_io_win_map; /* I/O addr space */
- struct pciio_win_map_s bs_swin_map; /* Small window addr space */
- struct pciio_win_map_s bs_mem_win_map; /* Memory addr space */
-
- struct resource bs_io_win_root_resource; /* I/O addr space */
- struct resource bs_swin_root_resource; /* Small window addr space */
- struct resource bs_mem_win_root_resource; /* Memory addr space */
-
- int bs_bus_addr_status; /* Bus space status */
-
-#define PCIBR_BUS_ADDR_MEM_FREED 1 /* Reserved PROM mem addr freed */
-#define PCIBR_BUS_ADDR_IO_FREED 2 /* Reserved PROM I/O addr freed */
-
- struct bs_errintr_stat_s {
- uint32_t bs_errcount_total;
- uint32_t bs_lasterr_timestamp;
- uint32_t bs_lasterr_snapshot;
- } bs_errintr_stat[PCIBR_ISR_MAX_ERRS];
-
- /*
- * Bridge-wide endianness control for
- * large-window PIO mappings
- *
- * These fields are set to PCIIO_BYTE_SWAP
- * or PCIIO_WORD_VALUES once the swapper
- * has been configured, one way or the other,
- * for the direct windows. If they are zero,
- * nobody has a PIO mapping through that window,
- * and the swapper can be set either way.
- */
- unsigned bs_pio_end_io;
- unsigned bs_pio_end_mem;
-};
-
-#define PCIBR_ERRTIME_THRESHOLD (100)
-#define PCIBR_ERRRATE_THRESHOLD (100)
-
-/*
- * pcibr will respond to hints dropped in its vertex
- * using the following structure.
- */
-struct pcibr_hints_s {
- /* ph_host_slot is actually +1 so "0" means "no host" */
- pciio_slot_t ph_host_slot[8]; /* REQ/GNT/INT in use by ... */
- unsigned int ph_rrb_fixed; /* do not change RRB allocations */
- unsigned int ph_hands_off; /* prevent further pcibr operations */
- rrb_alloc_funct_t rrb_alloc_funct; /* do dynamic rrb allocation */
- pcibr_intr_bits_f *ph_intr_bits; /* map PCI INT[ABCD] to Bridge Int(n) */
-};
-
-/*
- * Number of bridge non-fatal error interrupts we can see before
- * we decide to disable that interrupt.
- */
-#define PCIBR_ERRINTR_DISABLE_LEVEL 10000
-
-/* =====================================================================
- * Bridge (pcibr) state management functions
- *
- * pcibr_soft_get is here because we do it in a lot
- * of places and I want to make sure they all stay
- * in step with each other.
- *
- * pcibr_soft_set is here because I want it to be
- * closely associated with pcibr_soft_get, even
- * though it is only called in one place.
- */
-
-#define pcibr_soft_get(v) ((pcibr_soft_t)hwgraph_fastinfo_get((v)))
-#define pcibr_soft_set(v,i) (hwgraph_fastinfo_set((v), (arbitrary_info_t)(i)))
-
-/*
- * Additional PIO spaces per slot are
- * recorded in this structure.
- */
-struct pciio_piospace_s {
- pciio_piospace_t next; /* another space for this device */
- char free; /* 1 if free, 0 if in use */
- pciio_space_t space; /* Which space is in use */
- iopaddr_t start; /* Starting address of the PIO space */
- size_t count; /* size of PIO space */
-};
-
-/*
- * pcibr_soft structure locking macros
- */
-inline static unsigned long
-pcibr_lock(pcibr_soft_t pcibr_soft)
-{
- unsigned long flag;
- spin_lock_irqsave(&pcibr_soft->bs_lock, flag);
- return(flag);
-}
-#define pcibr_unlock(pcibr_soft, flag) spin_unlock_irqrestore(&pcibr_soft->bs_lock, flag)
-
-#define PCIBR_VALID_SLOT(ps, s) (s < PCIBR_NUM_SLOTS(ps))
-#define PCIBR_D64_BASE_UNSET (0xFFFFFFFFFFFFFFFF)
-#define PCIBR_D32_BASE_UNSET (0xFFFFFFFF)
-#define INFO_LBL_PCIBR_ASIC_REV "_pcibr_asic_rev"
-
-#define PCIBR_SOFT_LIST 1
-#if PCIBR_SOFT_LIST
-typedef struct pcibr_list_s *pcibr_list_p;
-struct pcibr_list_s {
- pcibr_list_p bl_next;
- pcibr_soft_t bl_soft;
- vertex_hdl_t bl_vhdl;
-};
-#endif /* PCIBR_SOFT_LIST */
-
-/* Devices per widget: 2 buses, 2 slots per bus, 8 functions per slot. */
-#define DEV_PER_WIDGET (2*2*8)
-
-struct sn_flush_device_list {
- int bus;
- int slot;
- int pin;
- struct bar_list {
- unsigned long start;
- unsigned long end;
- } bar_list[PCI_ROM_RESOURCE];
- unsigned long force_int_addr;
- volatile unsigned long flush_addr;
- spinlock_t flush_lock;
-};
-
-struct sn_flush_nasid_entry {
- struct sn_flush_device_list **widget_p;
- unsigned long iio_itte[8];
-};
-
-#endif /* _ASM_SN_PCI_PCIBR_PRIVATE_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_PCI_PCIIO_H
-#define _ASM_IA64_SN_PCI_PCIIO_H
-
-/*
- * pciio.h -- platform-independent PCI interface
- */
-
-#ifdef __KERNEL__
-#include <linux/ioport.h>
-#include <asm/sn/ioerror.h>
-#include <asm/sn/driver.h>
-#include <asm/sn/hcl.h>
-#else
-#include <linux/ioport.h>
-#include <ioerror.h>
-#include <driver.h>
-#include <hcl.h>
-#endif
-
-#ifndef __ASSEMBLY__
-
-#ifdef __KERNEL__
-#include <asm/sn/dmamap.h>
-#else
-#include <dmamap.h>
-#endif
-
-typedef int pciio_vendor_id_t;
-
-#define PCIIO_VENDOR_ID_NONE (-1)
-
-typedef int pciio_device_id_t;
-
-#define PCIIO_DEVICE_ID_NONE (-1)
-
-typedef uint8_t pciio_bus_t; /* PCI bus number (0..255) */
-typedef uint8_t pciio_slot_t; /* PCI slot number (0..31, 255) */
-typedef uint8_t pciio_function_t; /* PCI func number (0..7, 255) */
-
-#define PCIIO_SLOTS ((pciio_slot_t)32)
-#define PCIIO_FUNCS ((pciio_function_t)8)
-
-#define PCIIO_SLOT_NONE ((pciio_slot_t)255)
-#define PCIIO_FUNC_NONE ((pciio_function_t)255)
-
-typedef int pciio_intr_line_t; /* PCI interrupt line(s) */
-
-#define PCIIO_INTR_LINE(n) (0x1 << (n))
-#define PCIIO_INTR_LINE_A (0x1)
-#define PCIIO_INTR_LINE_B (0x2)
-#define PCIIO_INTR_LINE_C (0x4)
-#define PCIIO_INTR_LINE_D (0x8)
-
-typedef int pciio_space_t; /* PCI address space designation */
-
-#define PCIIO_SPACE_NONE (0)
-#define PCIIO_SPACE_ROM (1)
-#define PCIIO_SPACE_IO (2)
-/* PCIIO_SPACE_ (3) */
-#define PCIIO_SPACE_MEM (4)
-#define PCIIO_SPACE_MEM32 (5)
-#define PCIIO_SPACE_MEM64 (6)
-#define PCIIO_SPACE_CFG (7)
-#define PCIIO_SPACE_WIN0 (8)
-#define PCIIO_SPACE_WIN(n) (PCIIO_SPACE_WIN0+(n)) /* 8..13 */
-/* PCIIO_SPACE_ (14) */
-#define PCIIO_SPACE_BAD (15)
-
-#if 1 /* does anyone really use these? */
-#define PCIIO_SPACE_USER0 (20)
-#define PCIIO_SPACE_USER(n) (PCIIO_SPACE_USER0+(n)) /* 20 .. ? */
-#endif
-
-/*
- * PCI_NOWHERE is the error value returned in
- * place of a PCI address when there is no
- * corresponding address.
- */
-#define PCI_NOWHERE (0)
-
-/*
- * Acceptable flag bits for pciio service calls
- *
- * PCIIO_FIXED: require that mappings be established
- * using fixed sharable resources; address
- * translation results will be permanently
- * available. (PIOMAP_FIXED and DMAMAP_FIXED are
- * the same numeric value and are acceptable).
- * PCIIO_NOSLEEP: if any part of the operation would
- * sleep waiting for resoruces, return an error
- * instead. (PIOMAP_NOSLEEP and DMAMAP_NOSLEEP are
- * the same numeric value and are acceptable).
- *
- * PCIIO_DMA_CMD: configure this stream as a
- * generic "command" stream. Generally this
- * means turn off prefetchers and write
- * gatherers, and whatever else might be
- * necessary to make command ring DMAs
- * work as expected.
- * PCIIO_DMA_DATA: configure this stream as a
- * generic "data" stream. Generally, this
- * means turning on prefetchers and write
- * gatherers, and anything else that might
- * increase the DMA throughput (short of
- * using "high priority" or "real time"
- * resources that may lower overall system
- * performance).
- * PCIIO_DMA_A64: this device is capable of
- * using 64-bit DMA addresses. Unless this
- * flag is specified, it is assumed that
- * the DMA address must be in the low 4G
- * of PCI space.
- * PCIIO_PREFETCH: if there are prefetchers
- * available, they can be turned on.
- * PCIIO_NOPREFETCH: any prefetchers along
- * the dma path should be turned off.
- * PCIIO_WRITE_GATHER: if there are write gatherers
- * available, they can be turned on.
- * PCIIO_NOWRITE_GATHER: any write gatherers along
- * the dma path should be turned off.
- *
- * PCIIO_BYTE_STREAM: the DMA stream represents a group
- * of ordered bytes. Arrange all byte swapping
- * hardware so that the bytes land in the correct
- * order. This is a common setting for data
- * channels, but is NOT implied by PCIIO_DMA_DATA.
- * PCIIO_WORD_VALUES: the DMA stream is used to
- * communicate quantities stored in multiple bytes,
- * and the device doing the DMA is little-endian;
- * arrange any swapping hardware so that
- * 32-bit-wide values are maintained. This is a
- * common setting for command rings that contain
- * DMA addresses and counts, but is NOT implied by
- * PCIIO_DMA_CMD. CPU Accesses to 16-bit fields
- * must have their address xor-ed with 2, and
- * accesses to individual bytes must have their
- * addresses xor-ed with 3 relative to what the
- * device expects.
- *
- * NOTE: any "provider specific" flags that
- * conflict with the generic flags will
- * override the generic flags, locally
- * at that provider.
- *
- * Also, note that PCI-generic flags (PCIIO_) are
- * in bits 0-14. The upper bits, 15-31, are reserved
- * for PCI implementation-specific flags.
- */
-
-#define PCIIO_FIXED DMAMAP_FIXED
-#define PCIIO_NOSLEEP DMAMAP_NOSLEEP
-
-#define PCIIO_DMA_CMD 0x0010
-#define PCIIO_DMA_DATA 0x0020
-#define PCIIO_DMA_A64 0x0040
-
-#define PCIIO_WRITE_GATHER 0x0100
-#define PCIIO_NOWRITE_GATHER 0x0200
-#define PCIIO_PREFETCH 0x0400
-#define PCIIO_NOPREFETCH 0x0800
-
-/* Requesting an endianness setting that the
- * underlieing hardware can not support
- * WILL result in a failure to allocate
- * dmamaps or complete a dmatrans.
- */
-#define PCIIO_BYTE_STREAM 0x1000 /* set BYTE SWAP for "byte stream" */
-#define PCIIO_WORD_VALUES 0x2000 /* set BYTE SWAP for "word values" */
-
-/*
- * Interface to deal with PCI endianness.
- * The driver calls pciio_endian_set once, supplying the actual endianness of
- * the device and the desired endianness. On SGI systems, only use LITTLE if
- * dealing with a driver that does software swizzling. Most of the time,
- * it's preferable to request BIG. The return value indicates the endianness
- * that is actually achieved. On systems that support hardware swizzling,
- * the achieved endianness will be the desired endianness. On systems without
- * swizzle hardware, the achieved endianness will be the device's endianness.
- */
-typedef enum pciio_endian_e {
- PCIDMA_ENDIAN_BIG,
- PCIDMA_ENDIAN_LITTLE
-} pciio_endian_t;
-
-/*
- * Generic PCI bus information
- */
-typedef enum pciio_asic_type_e {
- PCIIO_ASIC_TYPE_UNKNOWN,
- PCIIO_ASIC_TYPE_MACE,
- PCIIO_ASIC_TYPE_BRIDGE,
- PCIIO_ASIC_TYPE_XBRIDGE,
- PCIIO_ASIC_TYPE_PIC,
-} pciio_asic_type_t;
-
-typedef enum pciio_bus_type_e {
- PCIIO_BUS_TYPE_UNKNOWN,
- PCIIO_BUS_TYPE_PCI,
- PCIIO_BUS_TYPE_PCIX
-} pciio_bus_type_t;
-
-typedef enum pciio_bus_speed_e {
- PCIIO_BUS_SPEED_UNKNOWN,
- PCIIO_BUS_SPEED_33,
- PCIIO_BUS_SPEED_66,
- PCIIO_BUS_SPEED_100,
- PCIIO_BUS_SPEED_133
-} pciio_bus_speed_t;
-
-/*
- * Interface to set PCI arbitration priority for devices that require
- * realtime characteristics. pciio_priority_set is used to switch a
- * device between the PCI high-priority arbitration ring and the low
- * priority arbitration ring.
- *
- * (Note: this is strictly for the PCI arbitrary priority. It has
- * no direct relationship to GBR.)
- */
-typedef enum pciio_priority_e {
- PCI_PRIO_LOW,
- PCI_PRIO_HIGH
-} pciio_priority_t;
-
-/*
- * handles of various sorts
- */
-typedef struct pciio_piomap_s *pciio_piomap_t;
-typedef struct pciio_dmamap_s *pciio_dmamap_t;
-typedef struct pciio_intr_s *pciio_intr_t;
-typedef struct pciio_info_s *pciio_info_t;
-typedef struct pciio_piospace_s *pciio_piospace_t;
-typedef struct pciio_win_info_s *pciio_win_info_t;
-typedef struct pciio_win_map_s *pciio_win_map_t;
-typedef struct pciio_win_alloc_s *pciio_win_alloc_t;
-typedef struct pciio_bus_map_s *pciio_bus_map_t;
-typedef struct pciio_businfo_s *pciio_businfo_t;
-
-
-/* PIO MANAGEMENT */
-
-/*
- * A NOTE ON PCI PIO ADDRESSES
- *
- * PCI supports three different address spaces: CFG
- * space, MEM space and I/O space. Further, each
- * card always accepts CFG accesses at an address
- * based on which slot it is attached to, but can
- * decode up to six address ranges.
- *
- * Assignment of the base address registers for all
- * PCI devices is handled centrally; most commonly,
- * device drivers will want to talk to offsets
- * within one or another of the address ranges. In
- * order to do this, which of these "address
- * spaces" the PIO is directed into must be encoded
- * in the flag word.
- *
- * We reserve the right to defer allocation of PCI
- * address space for a device window until the
- * driver makes a piomap_alloc or piotrans_addr
- * request.
- *
- * If a device driver mucks with its device's base
- * registers through a PIO mapping to CFG space,
- * results of further PIO through the corresponding
- * window are UNDEFINED.
- *
- * Windows are named by the index in the base
- * address register set for the device of the
- * desired register; IN THE CASE OF 64 BIT base
- * registers, the index should be to the word of
- * the register that contains the mapping type
- * bits; since the PCI CFG space is natively
- * organized little-endian fashion, this is the
- * first of the two words.
- *
- * AT THE MOMENT, any required corrections for
- * endianness are the responsibility of the device
- * driver; not all platforms support control in
- * hardware of byteswapping hardware. We anticipate
- * providing flag bits to the PIO and DMA
- * management interfaces to request different
- * configurations of byteswapping hardware.
- *
- * PIO Accesses to CFG space via the "Bridge" ASIC
- * used in IP30 platforms preserve the native byte
- * significance within the 32-bit word; byte
- * addresses for single byte accesses need to be
- * XORed with 3, and addresses for 16-bit accesses
- * need to be XORed with 2.
- *
- * The IOC3 used on IP30, and other SGI PCI devices
- * as well, require use of 32-bit accesses to their
- * configuration space registers. Any potential PCI
- * bus providers need to be aware of this requirement.
- */
-
-#define PCIIO_PIOMAP_CFG (0x1)
-#define PCIIO_PIOMAP_MEM (0x2)
-#define PCIIO_PIOMAP_IO (0x4)
-#define PCIIO_PIOMAP_WIN(n) (0x8+(n))
-
-typedef pciio_piomap_t
-pciio_piomap_alloc_f (vertex_hdl_t dev, /* set up mapping for this device */
- device_desc_t dev_desc, /* device descriptor */
- pciio_space_t space, /* which address space */
- iopaddr_t pcipio_addr, /* starting address */
- size_t byte_count,
- size_t byte_count_max, /* maximum size of a mapping */
- unsigned int flags); /* defined in sys/pio.h */
-
-typedef void
-pciio_piomap_free_f (pciio_piomap_t pciio_piomap);
-
-typedef caddr_t
-pciio_piomap_addr_f (pciio_piomap_t pciio_piomap, /* mapping resources */
- iopaddr_t pciio_addr, /* map for this pcipio address */
- size_t byte_count); /* map this many bytes */
-
-typedef void
-pciio_piomap_done_f (pciio_piomap_t pciio_piomap);
-
-typedef caddr_t
-pciio_piotrans_addr_f (vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- pciio_space_t space, /* which address space */
- iopaddr_t pciio_addr, /* starting address */
- size_t byte_count, /* map this many bytes */
- unsigned int flags);
-
-typedef caddr_t
-pciio_pio_addr_f (vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- pciio_space_t space, /* which address space */
- iopaddr_t pciio_addr, /* starting address */
- size_t byte_count, /* map this many bytes */
- pciio_piomap_t *mapp, /* in case a piomap was needed */
- unsigned int flags);
-
-typedef iopaddr_t
-pciio_piospace_alloc_f (vertex_hdl_t dev, /* PIO space for this device */
- device_desc_t dev_desc, /* Device descriptor */
- pciio_space_t space, /* which address space */
- size_t byte_count, /* Number of bytes of space */
- size_t alignment); /* Alignment of allocation */
-
-typedef void
-pciio_piospace_free_f (vertex_hdl_t dev, /* Device freeing space */
- pciio_space_t space, /* Which space is freed */
- iopaddr_t pci_addr, /* Address being freed */
- size_t size); /* Size freed */
-
-/* DMA MANAGEMENT */
-
-typedef pciio_dmamap_t
-pciio_dmamap_alloc_f (vertex_hdl_t dev, /* set up mappings for this device */
- device_desc_t dev_desc, /* device descriptor */
- size_t byte_count_max, /* max size of a mapping */
- unsigned int flags); /* defined in dma.h */
-
-typedef void
-pciio_dmamap_free_f (pciio_dmamap_t dmamap);
-
-typedef iopaddr_t
-pciio_dmamap_addr_f (pciio_dmamap_t dmamap, /* use these mapping resources */
- paddr_t paddr, /* map for this address */
- size_t byte_count); /* map this many bytes */
-
-typedef void
-pciio_dmamap_done_f (pciio_dmamap_t dmamap);
-
-typedef iopaddr_t
-pciio_dmatrans_addr_f (vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- paddr_t paddr, /* system physical address */
- size_t byte_count, /* length */
- unsigned int flags); /* defined in dma.h */
-
-typedef void
-pciio_dmamap_drain_f (pciio_dmamap_t map);
-
-typedef void
-pciio_dmaaddr_drain_f (vertex_hdl_t vhdl,
- paddr_t addr,
- size_t bytes);
-
-
-/* INTERRUPT MANAGEMENT */
-
-typedef pciio_intr_t
-pciio_intr_alloc_f (vertex_hdl_t dev, /* which PCI device */
- device_desc_t dev_desc, /* device descriptor */
- pciio_intr_line_t lines, /* which line(s) will be used */
- vertex_hdl_t owner_dev); /* owner of this intr */
-
-typedef void
-pciio_intr_free_f (pciio_intr_t intr_hdl);
-
-typedef int
-pciio_intr_connect_f (pciio_intr_t intr_hdl, intr_func_t intr_func, intr_arg_t intr_arg); /* pciio intr resource handle */
-
-typedef void
-pciio_intr_disconnect_f (pciio_intr_t intr_hdl);
-
-typedef vertex_hdl_t
-pciio_intr_cpu_get_f (pciio_intr_t intr_hdl); /* pciio intr resource handle */
-
-/* CONFIGURATION MANAGEMENT */
-
-typedef void
-pciio_provider_startup_f (vertex_hdl_t pciio_provider);
-
-typedef void
-pciio_provider_shutdown_f (vertex_hdl_t pciio_provider);
-
-typedef int
-pciio_reset_f (vertex_hdl_t conn); /* pci connection point */
-
-typedef pciio_endian_t /* actual endianness */
-pciio_endian_set_f (vertex_hdl_t dev, /* specify endianness for this device */
- pciio_endian_t device_end, /* endianness of device */
- pciio_endian_t desired_end); /* desired endianness */
-
-typedef uint64_t
-pciio_config_get_f (vertex_hdl_t conn, /* pci connection point */
- unsigned int reg, /* register byte offset */
- unsigned int size); /* width in bytes (1..4) */
-
-typedef void
-pciio_config_set_f (vertex_hdl_t conn, /* pci connection point */
- unsigned int reg, /* register byte offset */
- unsigned int size, /* width in bytes (1..4) */
- uint64_t value); /* value to store */
-
-typedef pciio_slot_t
-pciio_error_extract_f (vertex_hdl_t vhdl,
- pciio_space_t *spacep,
- iopaddr_t *addrp);
-
-typedef void
-pciio_driver_reg_callback_f (vertex_hdl_t conn,
- int key1,
- int key2,
- int error);
-
-typedef void
-pciio_driver_unreg_callback_f (vertex_hdl_t conn, /* pci connection point */
- int key1,
- int key2,
- int error);
-
-typedef int
-pciio_device_unregister_f (vertex_hdl_t conn);
-
-
-/*
- * Adapters that provide a PCI interface adhere to this software interface.
- */
-typedef struct pciio_provider_s {
- /* ASIC PROVIDER ID */
- pciio_asic_type_t provider_asic;
-
- /* PIO MANAGEMENT */
- pciio_piomap_alloc_f *piomap_alloc;
- pciio_piomap_free_f *piomap_free;
- pciio_piomap_addr_f *piomap_addr;
- pciio_piomap_done_f *piomap_done;
- pciio_piotrans_addr_f *piotrans_addr;
- pciio_piospace_alloc_f *piospace_alloc;
- pciio_piospace_free_f *piospace_free;
-
- /* DMA MANAGEMENT */
- pciio_dmamap_alloc_f *dmamap_alloc;
- pciio_dmamap_free_f *dmamap_free;
- pciio_dmamap_addr_f *dmamap_addr;
- pciio_dmamap_done_f *dmamap_done;
- pciio_dmatrans_addr_f *dmatrans_addr;
- pciio_dmamap_drain_f *dmamap_drain;
- pciio_dmaaddr_drain_f *dmaaddr_drain;
-
- /* INTERRUPT MANAGEMENT */
- pciio_intr_alloc_f *intr_alloc;
- pciio_intr_free_f *intr_free;
- pciio_intr_connect_f *intr_connect;
- pciio_intr_disconnect_f *intr_disconnect;
- pciio_intr_cpu_get_f *intr_cpu_get;
-
- /* CONFIGURATION MANAGEMENT */
- pciio_provider_startup_f *provider_startup;
- pciio_provider_shutdown_f *provider_shutdown;
- pciio_reset_f *reset;
- pciio_endian_set_f *endian_set;
- pciio_config_get_f *config_get;
- pciio_config_set_f *config_set;
-
- /* Error handling interface */
- pciio_error_extract_f *error_extract;
-
- /* Callback support */
- pciio_driver_reg_callback_f *driver_reg_callback;
- pciio_driver_unreg_callback_f *driver_unreg_callback;
- pciio_device_unregister_f *device_unregister;
-} pciio_provider_t;
-
-/* PCI devices use these standard PCI provider interfaces */
-extern pciio_piomap_alloc_f pciio_piomap_alloc;
-extern pciio_piomap_free_f pciio_piomap_free;
-extern pciio_piomap_addr_f pciio_piomap_addr;
-extern pciio_piomap_done_f pciio_piomap_done;
-extern pciio_piotrans_addr_f pciio_piotrans_addr;
-extern pciio_pio_addr_f pciio_pio_addr;
-extern pciio_piospace_alloc_f pciio_piospace_alloc;
-extern pciio_piospace_free_f pciio_piospace_free;
-extern pciio_dmamap_alloc_f pciio_dmamap_alloc;
-extern pciio_dmamap_free_f pciio_dmamap_free;
-extern pciio_dmamap_addr_f pciio_dmamap_addr;
-extern pciio_dmamap_done_f pciio_dmamap_done;
-extern pciio_dmatrans_addr_f pciio_dmatrans_addr;
-extern pciio_dmamap_drain_f pciio_dmamap_drain;
-extern pciio_dmaaddr_drain_f pciio_dmaaddr_drain;
-extern pciio_intr_alloc_f pciio_intr_alloc;
-extern pciio_intr_free_f pciio_intr_free;
-extern pciio_intr_connect_f pciio_intr_connect;
-extern pciio_intr_disconnect_f pciio_intr_disconnect;
-extern pciio_intr_cpu_get_f pciio_intr_cpu_get;
-extern pciio_provider_startup_f pciio_provider_startup;
-extern pciio_provider_shutdown_f pciio_provider_shutdown;
-extern pciio_reset_f pciio_reset;
-extern pciio_endian_set_f pciio_endian_set;
-extern pciio_config_get_f pciio_config_get;
-extern pciio_config_set_f pciio_config_set;
-
-/* Widgetdev in the IOERROR structure is encoded as follows.
- * +---------------------------+
- * | slot (7:3) | function(2:0)|
- * +---------------------------+
- * Following are the convenience interfaces to get at form
- * a widgetdev or to break it into its constituents.
- */
-
-#define PCIIO_WIDGETDEV_SLOT_SHFT 3
-#define PCIIO_WIDGETDEV_SLOT_MASK 0x1f
-#define PCIIO_WIDGETDEV_FUNC_MASK 0x7
-
-#define pciio_widgetdev_create(slot,func) \
- (((slot) << PCIIO_WIDGETDEV_SLOT_SHFT) + (func))
-
-#define pciio_widgetdev_slot_get(wdev) \
- (((wdev) >> PCIIO_WIDGETDEV_SLOT_SHFT) & PCIIO_WIDGETDEV_SLOT_MASK)
-
-#define pciio_widgetdev_func_get(wdev) \
- ((wdev) & PCIIO_WIDGETDEV_FUNC_MASK)
-
-
-/* Generic PCI card initialization interface
- */
-
-extern int
-pciio_driver_register (pciio_vendor_id_t vendor_id, /* card's vendor number */
- pciio_device_id_t device_id, /* card's device number */
- char *driver_prefix, /* driver prefix */
- unsigned int flags);
-
-extern void
-pciio_error_register (vertex_hdl_t pconn, /* which slot */
- error_handler_f *efunc, /* function to call */
- error_handler_arg_t einfo); /* first parameter */
-
-extern void pciio_driver_unregister(char *driver_prefix);
-
-typedef void pciio_iter_f(vertex_hdl_t pconn); /* a connect point */
-
-/* Interfaces used by PCI Bus Providers to talk to
- * the Generic PCI layer.
- */
-extern vertex_hdl_t
-pciio_device_register (vertex_hdl_t connectpt, /* vertex at center of bus */
- vertex_hdl_t master, /* card's master ASIC (pci provider) */
- pciio_slot_t slot, /* card's slot (0..?) */
- pciio_function_t func, /* card's func (0..?) */
- pciio_vendor_id_t vendor, /* card's vendor number */
- pciio_device_id_t device); /* card's device number */
-
-extern void
-pciio_device_unregister(vertex_hdl_t connectpt);
-
-extern pciio_info_t
-pciio_device_info_new (pciio_info_t pciio_info, /* preallocated info struct */
- vertex_hdl_t master, /* card's master ASIC (pci provider) */
- pciio_slot_t slot, /* card's slot (0..?) */
- pciio_function_t func, /* card's func (0..?) */
- pciio_vendor_id_t vendor, /* card's vendor number */
- pciio_device_id_t device); /* card's device number */
-
-extern void
-pciio_device_info_free(pciio_info_t pciio_info);
-
-extern vertex_hdl_t
-pciio_device_info_register(
- vertex_hdl_t connectpt, /* vertex at center of bus */
- pciio_info_t pciio_info); /* details about conn point */
-
-extern void
-pciio_device_info_unregister(
- vertex_hdl_t connectpt, /* vertex at center of bus */
- pciio_info_t pciio_info); /* details about conn point */
-
-
-extern int
-pciio_device_attach(
- vertex_hdl_t pcicard, /* vertex created by pciio_device_register */
- int drv_flags);
-extern int
-pciio_device_detach(
- vertex_hdl_t pcicard, /* vertex created by pciio_device_register */
- int drv_flags);
-
-
-/* create and initialize empty window mapping resource */
-extern pciio_win_map_t
-pciio_device_win_map_new(pciio_win_map_t win_map, /* preallocated win map structure */
- size_t region_size, /* size of region to be tracked */
- size_t page_size); /* allocation page size */
-
-/* destroy window mapping resource freeing up ancillary resources */
-extern void
-pciio_device_win_map_free(pciio_win_map_t win_map); /* preallocated win map structure */
-
-/* populate window mapping with free range of addresses */
-extern void
-pciio_device_win_populate(pciio_win_map_t win_map, /* win map */
- iopaddr_t ioaddr, /* base address of free range */
- size_t size); /* size of free range */
-
-/* allocate window from mapping resource */
-extern iopaddr_t
-pciio_device_win_alloc(struct resource * res,
- pciio_win_alloc_t win_alloc, /* opaque allocation cookie */
- size_t start, /* start unit, or 0 */
- size_t size, /* size of allocation */
- size_t align); /* alignment of allocation */
-
-/* free previously allocated window */
-extern void
-pciio_device_win_free(pciio_win_alloc_t win_alloc); /* opaque allocation cookie */
-
-
-/*
- * Generic PCI interface, for use with all PCI providers
- * and all PCI devices.
- */
-
-/* Generic PCI interrupt interfaces */
-extern vertex_hdl_t pciio_intr_dev_get(pciio_intr_t pciio_intr);
-extern vertex_hdl_t pciio_intr_cpu_get(pciio_intr_t pciio_intr);
-
-/* Generic PCI pio interfaces */
-extern vertex_hdl_t pciio_pio_dev_get(pciio_piomap_t pciio_piomap);
-extern pciio_slot_t pciio_pio_slot_get(pciio_piomap_t pciio_piomap);
-extern pciio_space_t pciio_pio_space_get(pciio_piomap_t pciio_piomap);
-extern iopaddr_t pciio_pio_pciaddr_get(pciio_piomap_t pciio_piomap);
-extern ulong pciio_pio_mapsz_get(pciio_piomap_t pciio_piomap);
-extern caddr_t pciio_pio_kvaddr_get(pciio_piomap_t pciio_piomap);
-
-/* Generic PCI dma interfaces */
-extern vertex_hdl_t pciio_dma_dev_get(pciio_dmamap_t pciio_dmamap);
-
-/* Register/unregister PCI providers and get implementation handle */
-extern void pciio_provider_register(vertex_hdl_t provider, pciio_provider_t *pciio_fns);
-extern void pciio_provider_unregister(vertex_hdl_t provider);
-extern pciio_provider_t *pciio_provider_fns_get(vertex_hdl_t provider);
-
-/* Generic pci slot information access interface */
-extern pciio_info_t pciio_info_chk(vertex_hdl_t vhdl);
-extern pciio_info_t pciio_info_get(vertex_hdl_t vhdl);
-extern void pciio_info_set(vertex_hdl_t vhdl, pciio_info_t widget_info);
-extern vertex_hdl_t pciio_info_dev_get(pciio_info_t pciio_info);
-extern pciio_bus_t pciio_info_bus_get(pciio_info_t pciio_info);
-extern pciio_slot_t pciio_info_slot_get(pciio_info_t pciio_info);
-extern pciio_function_t pciio_info_function_get(pciio_info_t pciio_info);
-extern pciio_vendor_id_t pciio_info_vendor_id_get(pciio_info_t pciio_info);
-extern pciio_device_id_t pciio_info_device_id_get(pciio_info_t pciio_info);
-extern vertex_hdl_t pciio_info_master_get(pciio_info_t pciio_info);
-extern arbitrary_info_t pciio_info_mfast_get(pciio_info_t pciio_info);
-extern pciio_provider_t *pciio_info_pops_get(pciio_info_t pciio_info);
-extern error_handler_f *pciio_info_efunc_get(pciio_info_t);
-extern error_handler_arg_t *pciio_info_einfo_get(pciio_info_t);
-extern pciio_space_t pciio_info_bar_space_get(pciio_info_t, int);
-extern iopaddr_t pciio_info_bar_base_get(pciio_info_t, int);
-extern size_t pciio_info_bar_size_get(pciio_info_t, int);
-extern iopaddr_t pciio_info_rom_base_get(pciio_info_t);
-extern size_t pciio_info_rom_size_get(pciio_info_t);
-extern int pciio_info_type1_get(pciio_info_t);
-extern int pciio_error_handler(vertex_hdl_t, int, ioerror_mode_t, ioerror_t *);
-
-/**
- * sn_pci_set_vchan - Set the requested Virtual Channel bits into the mapped DMA
- * address.
- * @pci_dev: pci device pointer
- * @addr: mapped dma address
- * @vchan: Virtual Channel to use 0 or 1.
- *
- * Set the Virtual Channel bit in the mapped dma address.
- */
-
-static inline int
-sn_pci_set_vchan(struct pci_dev *pci_dev,
- dma_addr_t *addr,
- int vchan)
-{
- if (vchan > 1) {
- return -1;
- }
-
- if (!(*addr >> 32)) /* Using a mask here would be cleaner */
- return 0; /* but this generates better code */
-
- if (vchan == 1) {
- /* Set Bit 57 */
- *addr |= (1UL << 57);
- } else {
- /* Clear Bit 57 */
- *addr &= ~(1UL << 57);
- }
-
- return 0;
-}
-
-#endif /* C or C++ */
-
-
-/*
- * Prototypes
- */
-
-int snia_badaddr_val(volatile void *addr, int len, volatile void *ptr);
-nasid_t snia_get_console_nasid(void);
-nasid_t snia_get_master_baseio_nasid(void);
-#endif /* _ASM_IA64_SN_PCI_PCIIO_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_PCI_PCIIO_PRIVATE_H
-#define _ASM_IA64_SN_PCI_PCIIO_PRIVATE_H
-
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/pci/pci_defs.h>
-
-/*
- * pciio_private.h -- private definitions for pciio
- * PCI drivers should NOT include this file.
- */
-
-/*
- * All PCI providers set up PIO using this information.
- */
-struct pciio_piomap_s {
- unsigned int pp_flags; /* PCIIO_PIOMAP flags */
- vertex_hdl_t pp_dev; /* associated pci card */
- pciio_slot_t pp_slot; /* which slot the card is in */
- pciio_space_t pp_space; /* which address space */
- iopaddr_t pp_pciaddr; /* starting offset of mapping */
- size_t pp_mapsz; /* size of this mapping */
- caddr_t pp_kvaddr; /* kernel virtual address to use */
-};
-
-/*
- * All PCI providers set up DMA using this information.
- */
-struct pciio_dmamap_s {
- unsigned int pd_flags; /* PCIIO_DMAMAP flags */
- vertex_hdl_t pd_dev; /* associated pci card */
- pciio_slot_t pd_slot; /* which slot the card is in */
-};
-
-/*
- * All PCI providers set up interrupts using this information.
- */
-
-struct pciio_intr_s {
- unsigned int pi_flags; /* PCIIO_INTR flags */
- vertex_hdl_t pi_dev; /* associated pci card */
- device_desc_t pi_dev_desc; /* override device descriptor */
- pciio_intr_line_t pi_lines; /* which interrupt line(s) */
- intr_func_t pi_func; /* handler function (when connected) */
- intr_arg_t pi_arg; /* handler parameter (when connected) */
- cpuid_t pi_mustruncpu; /* Where we must run. */
- int pi_irq; /* IRQ assigned */
- int pi_cpu; /* cpu assigned */
-};
-
-/* PCIIO_INTR (pi_flags) flags */
-#define PCIIO_INTR_CONNECTED 1 /* interrupt handler/thread has been connected */
-#define PCIIO_INTR_NOTHREAD 2 /* interrupt handler wants to be called at interrupt level */
-
-/*
- * Generic PCI bus information
- */
-struct pciio_businfo_s {
- int bi_multi_master;/* Bus provider supports multiple */
- /* dma masters behind a single slot. */
- /* Needed to work around a thrashing */
- /* issue in SGI Bridge ASIC and */
- /* its derivatives. */
- pciio_asic_type_t bi_asic_type; /* PCI ASIC type */
- pciio_bus_type_t bi_bus_type; /* PCI bus type */
- pciio_bus_speed_t bi_bus_speed; /* PCI bus speed */
-};
-
-/*
- * Some PCI provider implementations keep track of PCI window Base Address
- * Register (BAR) address range assignment via the rmalloc()/rmfree() arena
- * management routines. These implementations use the following data
- * structure for each allocation address space (e.g. memory, I/O, small
- * window, etc.).
- *
- * The ``page size'' encodes the minimum allocation unit and must be a power
- * of 2. The main use of this allocation ``page size'' is to control the
- * number of free address ranges that the mapping allocation software will
- * need to track. Smaller values will allow more efficient use of the address
- * ranges but will result in much larger allocation map structures ... For
- * instance, if we want to manage allocations for a 256MB address range,
- * choosing a 1MB allocation page size will result in up to 1MB being wasted
- * for allocation requests smaller than 1MB. The worst case allocation
- * pattern for the allocation software to track would be a pattern of 1MB
- * allocated, 1MB free. This results in the need to track up to 128 free
- * ranges.
- */
-struct pciio_win_map_s {
- struct map *wm_map; /* window address map */
- int wm_page_size; /* allocation ``page size'' */
-};
-
-/*
- * Opaque structure used to keep track of window allocation information.
- */
-struct pciio_win_alloc_s {
- struct resource *wa_resource; /* window map allocation resource */
- unsigned long wa_base; /* allocation starting page number */
- size_t wa_pages; /* number of pages in allocation */
-};
-
-/*
- * Each PCI Card has one of these.
- */
-
-struct pciio_info_s {
- char *c_fingerprint;
- vertex_hdl_t c_vertex; /* back pointer to vertex */
- vertex_hdl_t c_hostvertex;/* top most device in tree */
- pciio_bus_t c_bus; /* which bus the card is in */
- pciio_slot_t c_slot; /* which slot the card is in */
- pciio_function_t c_func; /* which func (on multi-func cards) */
- pciio_vendor_id_t c_vendor; /* PCI card "vendor" code */
- pciio_device_id_t c_device; /* PCI card "device" code */
- vertex_hdl_t c_master; /* PCI bus provider */
- arbitrary_info_t c_mfast; /* cached fastinfo from c_master */
- pciio_provider_t *c_pops; /* cached provider from c_master */
- error_handler_f *c_efunc; /* error handling function */
- error_handler_arg_t c_einfo; /* first parameter for efunc */
-
- struct pciio_win_info_s { /* state of BASE regs */
- pciio_space_t w_space;
- char w_code; /* low 4 bits of MEM BAR */
- /* low 2 bits of IO BAR */
- iopaddr_t w_base;
- size_t w_size;
- int w_devio_index; /* DevIO[] register used to
- access this window */
- struct pciio_win_alloc_s w_win_alloc; /* window allocation cookie */
- } c_window[PCI_CFG_BASE_ADDRS + 1];
-#define c_rwindow c_window[PCI_CFG_BASE_ADDRS] /* EXPANSION ROM window */
-#define c_rbase c_rwindow.w_base /* EXPANSION ROM base addr */
-#define c_rsize c_rwindow.w_size /* EXPANSION ROM size (bytes) */
- pciio_piospace_t c_piospace; /* additional I/O spaces allocated */
- int c_type1; /* use type1 addressing */
-};
-
-extern char pciio_info_fingerprint[];
-#endif /* _ASM_IA64_SN_PCI_PCIIO_PRIVATE_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_PCI_PIC_H
-#define _ASM_IA64_SN_PCI_PIC_H
-
-/*
- * PIC AS DEVICE ZERO
- * ------------------
- *
- * PIC handles PCI/X busses. PCI/X requires that the 'bridge' (i.e. PIC)
- * be designated as 'device 0'. That is a departure from earlier SGI
- * PCI bridges. Because of that we use config space 1 to access the
- * config space of the first actual PCI device on the bus.
- * Here's what the PIC manual says:
- *
- * The current PCI-X bus specification now defines that the parent
- * hosts bus bridge (PIC for example) must be device 0 on bus 0. PIC
- * reduced the total number of devices from 8 to 4 and removed the
- * device registers and windows, now only supporting devices 0,1,2, and
- * 3. PIC did leave all 8 configuration space windows. The reason was
- * there was nothing to gain by removing them. Here in lies the problem.
- * The device numbering we do using 0 through 3 is unrelated to the device
- * numbering which PCI-X requires in configuration space. In the past we
- * correlated Configs pace and our device space 0 <-> 0, 1 <-> 1, etc.
- * PCI-X requires we start a 1, not 0 and currently the PX brick
- * does associate our:
- *
- * device 0 with configuration space window 1,
- * device 1 with configuration space window 2,
- * device 2 with configuration space window 3,
- * device 3 with configuration space window 4.
- *
- * The net effect is that all config space access are off-by-one with
- * relation to other per-slot accesses on the PIC.
- * Here is a table that shows some of that:
- *
- * Internal Slot#
- * |
- * | 0 1 2 3
- * ----------|---------------------------------------
- * config | 0x21000 0x22000 0x23000 0x24000
- * |
- * even rrb | 0[0] n/a 1[0] n/a [] == implied even/odd
- * |
- * odd rrb | n/a 0[1] n/a 1[1]
- * |
- * int dev | 00 01 10 11
- * |
- * ext slot# | 1 2 3 4
- * ----------|---------------------------------------
- */
-
-
-#ifdef __KERNEL__
-#include <linux/types.h>
-#include <asm/sn/xtalk/xwidget.h> /* generic widget header */
-#else
-#include <xtalk/xwidget.h>
-#endif
-
-#include <asm/sn/pci/pciio.h>
-
-
-/*
- * bus provider function table
- *
- * Normally, this table is only handed off explicitly
- * during provider initialization, and the PCI generic
- * layer will stash a pointer to it in the vertex; however,
- * exporting it explicitly enables a performance hack in
- * the generic PCI provider where if we know at compile
- * time that the only possible PCI provider is a
- * pcibr, we can go directly to this ops table.
- */
-
-extern pciio_provider_t pci_pic_provider;
-
-
-/*
- * misc defines
- *
- */
-
-#define PIC_WIDGET_PART_NUM_BUS0 0xd102
-#define PIC_WIDGET_PART_NUM_BUS1 0xd112
-#define PIC_WIDGET_MFGR_NUM 0x24
-#define PIC_WIDGET_REV_A 0x1
-#define PIC_WIDGET_REV_B 0x2
-#define PIC_WIDGET_REV_C 0x3
-
-#define PIC_XTALK_ADDR_MASK 0x0000FFFFFFFFFFFF
-#define PIC_INTERNAL_ATES 1024
-
-
-#define IS_PIC_PART_REV_A(rev) \
- ((rev == (PIC_WIDGET_PART_NUM_BUS0 << 4 | PIC_WIDGET_REV_A)) || \
- (rev == (PIC_WIDGET_PART_NUM_BUS1 << 4 | PIC_WIDGET_REV_A)))
-#define IS_PIC_PART_REV_B(rev) \
- ((rev == (PIC_WIDGET_PART_NUM_BUS0 << 4 | PIC_WIDGET_REV_B)) || \
- (rev == (PIC_WIDGET_PART_NUM_BUS1 << 4 | PIC_WIDGET_REV_B)))
-#define IS_PIC_PART_REV_C(rev) \
- ((rev == (PIC_WIDGET_PART_NUM_BUS0 << 4 | PIC_WIDGET_REV_C)) || \
- (rev == (PIC_WIDGET_PART_NUM_BUS1 << 4 | PIC_WIDGET_REV_C)))
-
-
-/*
- * misc typedefs
- *
- */
-typedef uint64_t picreg_t;
-typedef uint64_t picate_t;
-
-/*
- * PIC Bridge MMR defines
- */
-
-/*
- * PIC STATUS register offset 0x00000008
- */
-
-#define PIC_STAT_PCIX_ACTIVE_SHFT 33
-
-/*
- * PIC CONTROL register offset 0x00000020
- */
-
-#define PIC_CTRL_PCI_SPEED_SHFT 4
-#define PIC_CTRL_PCI_SPEED (0x3 << PIC_CTRL_PCI_SPEED_SHFT)
-#define PIC_CTRL_PAGE_SIZE_SHFT 21
-#define PIC_CTRL_PAGE_SIZE (0x1 << PIC_CTRL_PAGE_SIZE_SHFT)
-
-
-/*
- * PIC Intr Destination Addr offset 0x00000038
- */
-
-#define PIC_INTR_DEST_ADDR 0x0000FFFFFFFFFFFF
-#define PIC_INTR_DEST_TID_SHFT 48
-#define PIC_INTR_DEST_TID (0xFull << PIC_INTR_DEST_TID_SHFT)
-
-/*
- * PIC PCI Responce Buffer offset 0x00000068
- */
-#define PIC_RSP_BUF_ADDR 0x0000FFFFFFFFFFFF
-#define PIC_RSP_BUF_NUM_SHFT 48
-#define PIC_RSP_BUF_NUM (0xFull << PIC_RSP_BUF_NUM_SHFT)
-#define PIC_RSP_BUF_DEV_NUM_SHFT 52
-#define PIC_RSP_BUF_DEV_NUM (0x3ull << PIC_RSP_BUF_DEV_NUM_SHFT)
-
-/*
- * PIC PCI DIRECT MAP register offset 0x00000080
- */
-#define PIC_DIRMAP_DIROFF_SHFT 0
-#define PIC_DIRMAP_DIROFF (0x1FFFF << PIC_DIRMAP_DIROFF_SHFT)
-#define PIC_DIRMAP_ADD512_SHFT 17
-#define PIC_DIRMAP_ADD512 (0x1 << PIC_DIRMAP_ADD512_SHFT)
-#define PIC_DIRMAP_WID_SHFT 20
-#define PIC_DIRMAP_WID (0xF << PIC_DIRMAP_WID_SHFT)
-
-#define PIC_DIRMAP_OFF_ADDRSHFT 31
-
-/*
- * Interrupt Status register offset 0x00000100
- */
-#define PIC_ISR_PCIX_SPLIT_MSG_PE (0x1ull << 45)
-#define PIC_ISR_PCIX_SPLIT_EMSG (0x1ull << 44)
-#define PIC_ISR_PCIX_SPLIT_TO (0x1ull << 43)
-#define PIC_ISR_PCIX_UNEX_COMP (0x1ull << 42)
-#define PIC_ISR_INT_RAM_PERR (0x1ull << 41)
-#define PIC_ISR_PCIX_ARB_ERR (0x1ull << 40)
-#define PIC_ISR_PCIX_REQ_TOUT (0x1ull << 39)
-#define PIC_ISR_PCIX_TABORT (0x1ull << 38)
-#define PIC_ISR_PCIX_PERR (0x1ull << 37)
-#define PIC_ISR_PCIX_SERR (0x1ull << 36)
-#define PIC_ISR_PCIX_MRETRY (0x1ull << 35)
-#define PIC_ISR_PCIX_MTOUT (0x1ull << 34)
-#define PIC_ISR_PCIX_DA_PARITY (0x1ull << 33)
-#define PIC_ISR_PCIX_AD_PARITY (0x1ull << 32)
-#define PIC_ISR_PMU_PAGE_FAULT (0x1ull << 30)
-#define PIC_ISR_UNEXP_RESP (0x1ull << 29)
-#define PIC_ISR_BAD_XRESP_PKT (0x1ull << 28)
-#define PIC_ISR_BAD_XREQ_PKT (0x1ull << 27)
-#define PIC_ISR_RESP_XTLK_ERR (0x1ull << 26)
-#define PIC_ISR_REQ_XTLK_ERR (0x1ull << 25)
-#define PIC_ISR_INVLD_ADDR (0x1ull << 24)
-#define PIC_ISR_UNSUPPORTED_XOP (0x1ull << 23)
-#define PIC_ISR_XREQ_FIFO_OFLOW (0x1ull << 22)
-#define PIC_ISR_LLP_REC_SNERR (0x1ull << 21)
-#define PIC_ISR_LLP_REC_CBERR (0x1ull << 20)
-#define PIC_ISR_LLP_RCTY (0x1ull << 19)
-#define PIC_ISR_LLP_TX_RETRY (0x1ull << 18)
-#define PIC_ISR_LLP_TCTY (0x1ull << 17)
-#define PIC_ISR_PCI_ABORT (0x1ull << 15)
-#define PIC_ISR_PCI_PARITY (0x1ull << 14)
-#define PIC_ISR_PCI_SERR (0x1ull << 13)
-#define PIC_ISR_PCI_PERR (0x1ull << 12)
-#define PIC_ISR_PCI_MST_TIMEOUT (0x1ull << 11)
-#define PIC_ISR_PCI_RETRY_CNT (0x1ull << 10)
-#define PIC_ISR_XREAD_REQ_TIMEOUT (0x1ull << 9)
-#define PIC_ISR_INT_MSK (0xffull << 0)
-#define PIC_ISR_INT(x) (0x1ull << (x))
-
-#define PIC_ISR_LINK_ERROR \
- (PIC_ISR_LLP_REC_SNERR|PIC_ISR_LLP_REC_CBERR| \
- PIC_ISR_LLP_RCTY|PIC_ISR_LLP_TX_RETRY| \
- PIC_ISR_LLP_TCTY)
-
-#define PIC_ISR_PCIBUS_PIOERR \
- (PIC_ISR_PCI_MST_TIMEOUT|PIC_ISR_PCI_ABORT| \
- PIC_ISR_PCIX_MTOUT|PIC_ISR_PCIX_TABORT)
-
-#define PIC_ISR_PCIBUS_ERROR \
- (PIC_ISR_PCIBUS_PIOERR|PIC_ISR_PCI_PERR| \
- PIC_ISR_PCI_SERR|PIC_ISR_PCI_RETRY_CNT| \
- PIC_ISR_PCI_PARITY|PIC_ISR_PCIX_PERR| \
- PIC_ISR_PCIX_SERR|PIC_ISR_PCIX_MRETRY| \
- PIC_ISR_PCIX_AD_PARITY|PIC_ISR_PCIX_DA_PARITY| \
- PIC_ISR_PCIX_REQ_TOUT|PIC_ISR_PCIX_UNEX_COMP| \
- PIC_ISR_PCIX_SPLIT_TO|PIC_ISR_PCIX_SPLIT_EMSG| \
- PIC_ISR_PCIX_SPLIT_MSG_PE)
-
-#define PIC_ISR_XTALK_ERROR \
- (PIC_ISR_XREAD_REQ_TIMEOUT|PIC_ISR_XREQ_FIFO_OFLOW| \
- PIC_ISR_UNSUPPORTED_XOP|PIC_ISR_INVLD_ADDR| \
- PIC_ISR_REQ_XTLK_ERR|PIC_ISR_RESP_XTLK_ERR| \
- PIC_ISR_BAD_XREQ_PKT|PIC_ISR_BAD_XRESP_PKT| \
- PIC_ISR_UNEXP_RESP)
-
-#define PIC_ISR_ERRORS \
- (PIC_ISR_LINK_ERROR|PIC_ISR_PCIBUS_ERROR| \
- PIC_ISR_XTALK_ERROR| \
- PIC_ISR_PMU_PAGE_FAULT|PIC_ISR_INT_RAM_PERR)
-
-/*
- * PIC RESET INTR register offset 0x00000110
- */
-
-#define PIC_IRR_ALL_CLR 0xffffffffffffffff
-
-/*
- * PIC PCI Host Intr Addr offset 0x00000130 - 0x00000168
- */
-#define PIC_HOST_INTR_ADDR 0x0000FFFFFFFFFFFF
-#define PIC_HOST_INTR_FLD_SHFT 48
-#define PIC_HOST_INTR_FLD (0xFFull << PIC_HOST_INTR_FLD_SHFT)
-
-
-/*
- * PIC MMR structure mapping
- */
-
-/* NOTE: PIC WAR. PV#854697. PIC does not allow writes just to [31:0]
- * of a 64-bit register. When writing PIC registers, always write the
- * entire 64 bits.
- */
-
-typedef volatile struct pic_s {
-
- /* 0x000000-0x00FFFF -- Local Registers */
-
- /* 0x000000-0x000057 -- Standard Widget Configuration */
- picreg_t p_wid_id; /* 0x000000 */
- picreg_t p_wid_stat; /* 0x000008 */
- picreg_t p_wid_err_upper; /* 0x000010 */
- picreg_t p_wid_err_lower; /* 0x000018 */
- #define p_wid_err p_wid_err_lower
- picreg_t p_wid_control; /* 0x000020 */
- picreg_t p_wid_req_timeout; /* 0x000028 */
- picreg_t p_wid_int_upper; /* 0x000030 */
- picreg_t p_wid_int_lower; /* 0x000038 */
- #define p_wid_int p_wid_int_lower
- picreg_t p_wid_err_cmdword; /* 0x000040 */
- picreg_t p_wid_llp; /* 0x000048 */
- picreg_t p_wid_tflush; /* 0x000050 */
-
- /* 0x000058-0x00007F -- Bridge-specific Widget Configuration */
- picreg_t p_wid_aux_err; /* 0x000058 */
- picreg_t p_wid_resp_upper; /* 0x000060 */
- picreg_t p_wid_resp_lower; /* 0x000068 */
- #define p_wid_resp p_wid_resp_lower
- picreg_t p_wid_tst_pin_ctrl; /* 0x000070 */
- picreg_t p_wid_addr_lkerr; /* 0x000078 */
-
- /* 0x000080-0x00008F -- PMU & MAP */
- picreg_t p_dir_map; /* 0x000080 */
- picreg_t _pad_000088; /* 0x000088 */
-
- /* 0x000090-0x00009F -- SSRAM */
- picreg_t p_map_fault; /* 0x000090 */
- picreg_t _pad_000098; /* 0x000098 */
-
- /* 0x0000A0-0x0000AF -- Arbitration */
- picreg_t p_arb; /* 0x0000A0 */
- picreg_t _pad_0000A8; /* 0x0000A8 */
-
- /* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */
- picreg_t p_ate_parity_err; /* 0x0000B0 */
- picreg_t _pad_0000B8; /* 0x0000B8 */
-
- /* 0x0000C0-0x0000FF -- PCI/GIO */
- picreg_t p_bus_timeout; /* 0x0000C0 */
- picreg_t p_pci_cfg; /* 0x0000C8 */
- picreg_t p_pci_err_upper; /* 0x0000D0 */
- picreg_t p_pci_err_lower; /* 0x0000D8 */
- #define p_pci_err p_pci_err_lower
- picreg_t _pad_0000E0[4]; /* 0x0000{E0..F8} */
-
- /* 0x000100-0x0001FF -- Interrupt */
- picreg_t p_int_status; /* 0x000100 */
- picreg_t p_int_enable; /* 0x000108 */
- picreg_t p_int_rst_stat; /* 0x000110 */
- picreg_t p_int_mode; /* 0x000118 */
- picreg_t p_int_device; /* 0x000120 */
- picreg_t p_int_host_err; /* 0x000128 */
- picreg_t p_int_addr[8]; /* 0x0001{30,,,68} */
- picreg_t p_err_int_view; /* 0x000170 */
- picreg_t p_mult_int; /* 0x000178 */
- picreg_t p_force_always[8]; /* 0x0001{80,,,B8} */
- picreg_t p_force_pin[8]; /* 0x0001{C0,,,F8} */
-
- /* 0x000200-0x000298 -- Device */
- picreg_t p_device[4]; /* 0x0002{00,,,18} */
- picreg_t _pad_000220[4]; /* 0x0002{20,,,38} */
- picreg_t p_wr_req_buf[4]; /* 0x0002{40,,,58} */
- picreg_t _pad_000260[4]; /* 0x0002{60,,,78} */
- picreg_t p_rrb_map[2]; /* 0x0002{80,,,88} */
- #define p_even_resp p_rrb_map[0] /* 0x000280 */
- #define p_odd_resp p_rrb_map[1] /* 0x000288 */
- picreg_t p_resp_status; /* 0x000290 */
- picreg_t p_resp_clear; /* 0x000298 */
-
- picreg_t _pad_0002A0[12]; /* 0x0002{A0..F8} */
-
- /* 0x000300-0x0003F8 -- Buffer Address Match Registers */
- struct {
- picreg_t upper; /* 0x0003{00,,,F0} */
- picreg_t lower; /* 0x0003{08,,,F8} */
- } p_buf_addr_match[16];
-
- /* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */
- struct {
- picreg_t flush_w_touch; /* 0x000{400,,,5C0} */
- picreg_t flush_wo_touch; /* 0x000{408,,,5C8} */
- picreg_t inflight; /* 0x000{410,,,5D0} */
- picreg_t prefetch; /* 0x000{418,,,5D8} */
- picreg_t total_pci_retry; /* 0x000{420,,,5E0} */
- picreg_t max_pci_retry; /* 0x000{428,,,5E8} */
- picreg_t max_latency; /* 0x000{430,,,5F0} */
- picreg_t clear_all; /* 0x000{438,,,5F8} */
- } p_buf_count[8];
-
-
- /* 0x000600-0x0009FF -- PCI/X registers */
- picreg_t p_pcix_bus_err_addr; /* 0x000600 */
- picreg_t p_pcix_bus_err_attr; /* 0x000608 */
- picreg_t p_pcix_bus_err_data; /* 0x000610 */
- picreg_t p_pcix_pio_split_addr; /* 0x000618 */
- picreg_t p_pcix_pio_split_attr; /* 0x000620 */
- picreg_t p_pcix_dma_req_err_attr; /* 0x000628 */
- picreg_t p_pcix_dma_req_err_addr; /* 0x000630 */
- picreg_t p_pcix_timeout; /* 0x000638 */
-
- picreg_t _pad_000640[120]; /* 0x000{640,,,9F8} */
-
- /* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */
- struct {
- picreg_t p_buf_addr; /* 0x000{A00,,,AF0} */
- picreg_t p_buf_attr; /* 0X000{A08,,,AF8} */
- } p_pcix_read_buf_64[16];
-
- struct {
- picreg_t p_buf_addr; /* 0x000{B00,,,BE0} */
- picreg_t p_buf_attr; /* 0x000{B08,,,BE8} */
- picreg_t p_buf_valid; /* 0x000{B10,,,BF0} */
- picreg_t __pad1; /* 0x000{B18,,,BF8} */
- } p_pcix_write_buf_64[8];
-
- /* End of Local Registers -- Start of Address Map space */
-
- char _pad_000c00[0x010000 - 0x000c00];
-
- /* 0x010000-0x011fff -- Internal ATE RAM (Auto Parity Generation) */
- picate_t p_int_ate_ram[1024]; /* 0x010000-0x011fff */
-
- /* 0x012000-0x013fff -- Internal ATE RAM (Manual Parity Generation) */
- picate_t p_int_ate_ram_mp[1024]; /* 0x012000-0x013fff */
-
- char _pad_014000[0x18000 - 0x014000];
-
- /* 0x18000-0x197F8 -- PIC Write Request Ram */
- picreg_t p_wr_req_lower[256]; /* 0x18000 - 0x187F8 */
- picreg_t p_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */
- picreg_t p_wr_req_parity[256]; /* 0x19000 - 0x197F8 */
-
- char _pad_019800[0x20000 - 0x019800];
-
- /* 0x020000-0x027FFF -- PCI Device Configuration Spaces */
- union {
- uint8_t c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */
- uint16_t s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */
- uint32_t l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */
- uint64_t d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */
- union {
- uint8_t c[0x100 / 1];
- uint16_t s[0x100 / 2];
- uint32_t l[0x100 / 4];
- uint64_t d[0x100 / 8];
- } f[8];
- } p_type0_cfg_dev[8]; /* 0x02{0000,,,7FFF} */
-
- /* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */
- union {
- uint8_t c[0x1000 / 1]; /* 0x028000-0x029000 */
- uint16_t s[0x1000 / 2]; /* 0x028000-0x029000 */
- uint32_t l[0x1000 / 4]; /* 0x028000-0x029000 */
- uint64_t d[0x1000 / 8]; /* 0x028000-0x029000 */
- union {
- uint8_t c[0x100 / 1];
- uint16_t s[0x100 / 2];
- uint32_t l[0x100 / 4];
- uint64_t d[0x100 / 8];
- } f[8];
- } p_type1_cfg; /* 0x028000-0x029000 */
-
- char _pad_029000[0x030000-0x029000];
-
- /* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */
- union {
- uint8_t c[8 / 1];
- uint16_t s[8 / 2];
- uint32_t l[8 / 4];
- uint64_t d[8 / 8];
- } p_pci_iack; /* 0x030000-0x030007 */
-
- char _pad_030007[0x040000-0x030008];
-
- /* 0x040000-0x030007 -- PCIX Special Cycle */
- union {
- uint8_t c[8 / 1];
- uint16_t s[8 / 2];
- uint32_t l[8 / 4];
- uint64_t d[8 / 8];
- } p_pcix_cycle; /* 0x040000-0x040007 */
-} pic_t;
-
-#endif /* _ASM_IA64_SN_PCI_PIC_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_PIO_H
-#define _ASM_IA64_SN_PIO_H
-
-#include <asm/sn/types.h>
-
-/*
- * pioaddr_t - The kernel virtual address that a PIO can be done upon.
- * Should probably be (volatile void*) but EVEREST would do PIO
- * to long mostly, just cast for other sizes.
- */
-
-typedef volatile unsigned long* pioaddr_t;
-
-/*
- * iopaddr_t - the physical io space relative address (e.g. VME A16S 0x0800).
- * iosapce_t - specifies the io address space to be mapped/accessed.
- * piomap_t - the handle returned by pio_alloc() and used with all the pio
- * access functions.
- */
-
-
-typedef struct piomap {
- unsigned int pio_bus;
- unsigned int pio_adap;
- int pio_flag;
- int pio_reg;
- char pio_name[7]; /* to identify the mapped device */
- struct piomap *pio_next; /* dlist to link active piomap's */
- struct piomap *pio_prev; /* for debug and error reporting */
- iopaddr_t pio_iopmask; /* valid iop address bit mask */
- iobush_t pio_bushandle; /* bus-level handle */
-} piomap_t;
-
-#define pio_type pio_iospace.ios_type
-#define pio_iopaddr pio_iospace.ios_iopaddr
-#define pio_size pio_iospace.ios_size
-#define pio_vaddr pio_iospace.ios_vaddr
-
-/* Macro to get/set PIO error function */
-#define pio_seterrf(p,f) (p)->pio_errfunc = (f)
-#define pio_geterrf(p) (p)->pio_errfunc
-
-
-/*
- * piomap_t type defines
- */
-
-#define PIOMAP_NTYPES 7
-
-#define PIOMAP_A16N VME_A16NP
-#define PIOMAP_A16S VME_A16S
-#define PIOMAP_A24N VME_A24NP
-#define PIOMAP_A24S VME_A24S
-#define PIOMAP_A32N VME_A32NP
-#define PIOMAP_A32S VME_A32S
-#define PIOMAP_A64 6
-
-#define PIOMAP_EISA_IO 0
-#define PIOMAP_EISA_MEM 1
-
-#define PIOMAP_PCI_IO 0
-#define PIOMAP_PCI_MEM 1
-#define PIOMAP_PCI_CFG 2
-#define PIOMAP_PCI_ID 3
-
-/* IBUS piomap types */
-#define PIOMAP_FCI 0
-
-/* dang gio piomap types */
-
-#define PIOMAP_GIO32 0
-#define PIOMAP_GIO64 1
-
-#define ET_MEM 0
-#define ET_IO 1
-#define LAN_RAM 2
-#define LAN_IO 3
-
-#define PIOREG_NULL (-1)
-
-/* standard flags values for pio_map routines,
- * including {xtalk,pciio}_piomap calls.
- * NOTE: try to keep these in step with DMAMAP flags.
- */
-#define PIOMAP_UNFIXED 0x0
-#define PIOMAP_FIXED 0x1
-#define PIOMAP_NOSLEEP 0x2
-#define PIOMAP_INPLACE 0x4
-
-#define PIOMAP_FLAGS 0x7
-
-#endif /* _ASM_IA64_SN_PIO_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_PRIO_H
-#define _ASM_IA64_SN_PRIO_H
-
-#include <linux/types.h>
-
-/*
- * Priority I/O function prototypes and macro definitions
- */
-
-typedef long long bandwidth_t;
-
-/* These should be the same as FREAD/FWRITE */
-#define PRIO_READ_ALLOCATE 0x1
-#define PRIO_WRITE_ALLOCATE 0x2
-#define PRIO_READWRITE_ALLOCATE (PRIO_READ_ALLOCATE | PRIO_WRITE_ALLOCATE)
-
-extern int prioSetBandwidth (int /* fd */,
- int /* alloc_type */,
- bandwidth_t /* bytes_per_sec */,
- pid_t * /* pid */);
-extern int prioGetBandwidth (int /* fd */,
- bandwidth_t * /* read_bw */,
- bandwidth_t * /* write_bw */);
-extern int prioLock (pid_t *);
-extern int prioUnlock (void);
-
-/* Error returns */
-#define PRIO_SUCCESS 0
-#define PRIO_FAIL (-1)
-
-#endif /* _ASM_IA64_SN_PRIO_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_IA64_SN_ROUTER_H
-#define _ASM_IA64_SN_ROUTER_H
-
-/*
- * Router Register definitions
- *
- * Macro argument _L always stands for a link number (1 to 8, inclusive).
- */
-
-#ifndef __ASSEMBLY__
-
-#include <asm/sn/arch.h>
-
-typedef uint64_t router_reg_t;
-
-#define MAX_ROUTERS 64
-
-#define MAX_ROUTER_PATH 80
-
-#define ROUTER_REG_CAST (volatile router_reg_t *)
-typedef signed char port_no_t; /* Type for router port number */
-
-#else
-
-#define ROUTERREG_CAST
-
-#endif /* __ASSEMBLY__ */
-
-#define MAX_ROUTER_PORTS 8 /* Max. number of ports on a router */
-
-#define ALL_PORTS ((1 << MAX_ROUTER_PORTS) - 1) /* for 0 based references */
-
-#define PORT_INVALID -1 /* Invalid port number */
-
-#define IS_META(_rp) ((_rp)->flags & PCFG_ROUTER_META)
-
-#define IS_REPEATER(_rp)((_rp)->flags & PCFG_ROUTER_REPEATER)
-
-/*
- * RR_TURN makes a given number of clockwise turns (0 to 7) from an inport
- * port to generate an output port.
- *
- * RR_DISTANCE returns the number of turns necessary (0 to 7) to go from
- * an input port (_L1 = 1 to 8) to an output port ( _L2 = 1 to 8).
- *
- * These are written to work on unsigned data.
- */
-
-#define RR_TURN(_L, count) ((_L) + (count) > MAX_ROUTER_PORTS ? \
- (_L) + (count) - MAX_ROUTER_PORTS : \
- (_L) + (count))
-
-#define RR_DISTANCE(_LS, _LD) ((_LD) >= (_LS) ? \
- (_LD) - (_LS) : \
- (_LD) + MAX_ROUTER_PORTS - (_LS))
-
-/* Router register addresses */
-
-#define RR_STATUS_REV_ID 0x00000 /* Status register and Revision ID */
-#define RR_PORT_RESET 0x00008 /* Multiple port reset */
-#define RR_PROT_CONF 0x00010 /* Inter-partition protection conf. */
-#define RR_GLOBAL_PORT_DEF 0x00018 /* Global Port definitions */
-#define RR_GLOBAL_PARMS0 0x00020 /* Parameters shared by all 8 ports */
-#define RR_GLOBAL_PARMS1 0x00028 /* Parameters shared by all 8 ports */
-#define RR_DIAG_PARMS 0x00030 /* Parameters for diag. testing */
-#define RR_DEBUG_ADDR 0x00038 /* Debug address select - debug port*/
-#define RR_LB_TO_L2 0x00040 /* Local Block to L2 cntrl intf reg */
-#define RR_L2_TO_LB 0x00048 /* L2 cntrl intf to Local Block reg */
-#define RR_JBUS_CONTROL 0x00050 /* read/write timing for JBUS intf */
-
-#define RR_SCRATCH_REG0 0x00100 /* Scratch 0 is 64 bits */
-#define RR_SCRATCH_REG1 0x00108 /* Scratch 1 is 64 bits */
-#define RR_SCRATCH_REG2 0x00110 /* Scratch 2 is 64 bits */
-#define RR_SCRATCH_REG3 0x00118 /* Scratch 3 is 1 bit */
-#define RR_SCRATCH_REG4 0x00120 /* Scratch 4 is 1 bit */
-
-#define RR_JBUS0(_D) (((_D) & 0x7) << 3 | 0x00200) /* JBUS0 addresses */
-#define RR_JBUS1(_D) (((_D) & 0x7) << 3 | 0x00240) /* JBUS1 addresses */
-
-#define RR_SCRATCH_REG0_WZ 0x00500 /* Scratch 0 is 64 bits */
-#define RR_SCRATCH_REG1_WZ 0x00508 /* Scratch 1 is 64 bits */
-#define RR_SCRATCH_REG2_WZ 0x00510 /* Scratch 2 is 64 bits */
-#define RR_SCRATCH_REG3_SZ 0x00518 /* Scratch 3 is 1 bit */
-#define RR_SCRATCH_REG4_SZ 0x00520 /* Scratch 4 is 1 bit */
-
-#define RR_VECTOR_HW_BAR(context) (0x08000 | (context)<<3) /* barrier config registers */
-/* Port-specific registers (_L is the link number from 1 to 8) */
-
-#define RR_PORT_PARMS(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0000) /* LLP parameters */
-#define RR_STATUS_ERROR(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0008) /* Port-related errs */
-#define RR_CHANNEL_TEST(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0010) /* Port LLP chan test */
-#define RR_RESET_MASK(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0018) /* Remote reset mask */
-#define RR_HISTOGRAM0(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0020) /* Port usage histgrm */
-#define RR_HISTOGRAM1(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0028) /* Port usage histgrm */
-#define RR_HISTOGRAM0_WC(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0030) /* Port usage histgrm */
-#define RR_HISTOGRAM1_WC(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0038) /* Port usage histgrm */
-#define RR_ERROR_CLEAR(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0088) /* Read/clear errors */
-#define RR_GLOBAL_TABLE0(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0100) /* starting address of global table for this port */
-#define RR_GLOBAL_TABLE(_L, _x) (RR_GLOBAL_TABLE0(_L) + ((_x) << 3))
-#define RR_LOCAL_TABLE0(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0200) /* starting address of local table for this port */
-#define RR_LOCAL_TABLE(_L, _x) (RR_LOCAL_TABLE0(_L) + ((_x) << 3))
-
-#define RR_META_ENTRIES 16
-
-#define RR_LOCAL_ENTRIES 128
-
-/*
- * RR_STATUS_REV_ID mask and shift definitions
- */
-
-#define RSRI_INPORT_SHFT 52
-#define RSRI_INPORT_MASK (0xfUL << 52)
-#define RSRI_LINKWORKING_BIT(_L) (35 + 2 * (_L))
-#define RSRI_LINKWORKING(_L) (1UL << (35 + 2 * (_L)))
-#define RSRI_LINKRESETFAIL(_L) (1UL << (34 + 2 * (_L)))
-#define RSRI_LSTAT_SHFT(_L) (34 + 2 * (_L))
-#define RSRI_LSTAT_MASK(_L) (0x3UL << 34 + 2 * (_L))
-#define RSRI_LOCALSBERROR (1UL << 35)
-#define RSRI_LOCALSTUCK (1UL << 34)
-#define RSRI_LOCALBADVEC (1UL << 33)
-#define RSRI_LOCALTAILERR (1UL << 32)
-#define RSRI_LOCAL_SHFT 32
-#define RSRI_LOCAL_MASK (0xfUL << 32)
-#define RSRI_CHIPREV_SHFT 28
-#define RSRI_CHIPREV_MASK (0xfUL << 28)
-#define RSRI_CHIPID_SHFT 12
-#define RSRI_CHIPID_MASK (0xffffUL << 12)
-#define RSRI_MFGID_SHFT 1
-#define RSRI_MFGID_MASK (0x7ffUL << 1)
-
-#define RSRI_LSTAT_WENTDOWN 0
-#define RSRI_LSTAT_RESETFAIL 1
-#define RSRI_LSTAT_LINKUP 2
-#define RSRI_LSTAT_NOTUSED 3
-
-/*
- * RR_PORT_RESET mask definitions
- */
-
-#define RPRESET_WARM (1UL << 9)
-#define RPRESET_LINK(_L) (1UL << (_L))
-#define RPRESET_LOCAL 1UL
-
-/*
- * RR_PROT_CONF mask and shift definitions
- */
-
-#define RPCONF_DIRCMPDIS_SHFT 13
-#define RPCONF_DIRCMPDIS_MASK (1UL << 13)
-#define RPCONF_FORCELOCAL (1UL << 12)
-#define RPCONF_FLOCAL_SHFT 12
-#define RPCONF_METAID_SHFT 8
-#define RPCONF_METAID_MASK (0xfUL << 8)
-#define RPCONF_RESETOK(_L) (1UL << ((_L) - 1))
-
-/*
- * RR_GLOBAL_PORT_DEF mask and shift definitions
- */
-
-#define RGPD_MGLBLNHBR_ID_SHFT 12 /* -global neighbor ID */
-#define RGPD_MGLBLNHBR_ID_MASK (0xfUL << 12)
-#define RGPD_MGLBLNHBR_VLD_SHFT 11 /* -global neighbor Valid */
-#define RGPD_MGLBLNHBR_VLD_MASK (0x1UL << 11)
-#define RGPD_MGLBLPORT_SHFT 8 /* -global neighbor Port */
-#define RGPD_MGLBLPORT_MASK (0x7UL << 8)
-#define RGPD_PGLBLNHBR_ID_SHFT 4 /* +global neighbor ID */
-#define RGPD_PGLBLNHBR_ID_MASK (0xfUL << 4)
-#define RGPD_PGLBLNHBR_VLD_SHFT 3 /* +global neighbor Valid */
-#define RGPD_PGLBLNHBR_VLD_MASK (0x1UL << 3)
-#define RGPD_PGLBLPORT_SHFT 0 /* +global neighbor Port */
-#define RGPD_PGLBLPORT_MASK (0x7UL << 0)
-
-#define GLBL_PARMS_REGS 2 /* Two Global Parms registers */
-
-/*
- * RR_GLOBAL_PARMS0 mask and shift definitions
- */
-
-#define RGPARM0_ARB_VALUE_SHFT 54 /* Local Block Arbitration State */
-#define RGPARM0_ARB_VALUE_MASK (0x7UL << 54)
-#define RGPARM0_ROTATEARB_SHFT 53 /* Rotate Local Block Arbitration */
-#define RGPARM0_ROTATEARB_MASK (1UL << 53)
-#define RGPARM0_FAIREN_SHFT 52 /* Fairness logic Enable */
-#define RGPARM0_FAIREN_MASK (1UL << 52)
-#define RGPARM0_LOCGNTTO_SHFT 40 /* Local grant timeout */
-#define RGPARM0_LOCGNTTO_MASK (0xfffUL << 40)
-#define RGPARM0_DATELINE_SHFT 38 /* Dateline crossing router */
-#define RGPARM0_DATELINE_MASK (1UL << 38)
-#define RGPARM0_MAXRETRY_SHFT 28 /* Max retry count */
-#define RGPARM0_MAXRETRY_MASK (0x3ffUL << 28)
-#define RGPARM0_URGWRAP_SHFT 20 /* Urgent wrap */
-#define RGPARM0_URGWRAP_MASK (0xffUL << 20)
-#define RGPARM0_DEADLKTO_SHFT 16 /* Deadlock timeout */
-#define RGPARM0_DEADLKTO_MASK (0xfUL << 16)
-#define RGPARM0_URGVAL_SHFT 12 /* Urgent value */
-#define RGPARM0_URGVAL_MASK (0xfUL << 12)
-#define RGPARM0_VCHSELEN_SHFT 11 /* VCH_SEL_EN */
-#define RGPARM0_VCHSELEN_MASK (1UL << 11)
-#define RGPARM0_LOCURGTO_SHFT 9 /* Local urgent timeout */
-#define RGPARM0_LOCURGTO_MASK (0x3UL << 9)
-#define RGPARM0_TAILVAL_SHFT 5 /* Tail value */
-#define RGPARM0_TAILVAL_MASK (0xfUL << 5)
-#define RGPARM0_CLOCK_SHFT 1 /* Global clock select */
-#define RGPARM0_CLOCK_MASK (0xfUL << 1)
-#define RGPARM0_BYPEN_SHFT 0
-#define RGPARM0_BYPEN_MASK 1UL /* Bypass enable */
-
-/*
- * RR_GLOBAL_PARMS1 shift and mask definitions
- */
-
-#define RGPARM1_TTOWRAP_SHFT 12 /* Tail timeout wrap */
-#define RGPARM1_TTOWRAP_MASK (0xfffffUL << 12)
-#define RGPARM1_AGERATE_SHFT 8 /* Age rate */
-#define RGPARM1_AGERATE_MASK (0xfUL << 8)
-#define RGPARM1_JSWSTAT_SHFT 0 /* JTAG Sw Register bits */
-#define RGPARM1_JSWSTAT_MASK (0xffUL << 0)
-
-/*
- * RR_DIAG_PARMS mask and shift definitions
- */
-
-#define RDPARM_ABSHISTOGRAM (1UL << 17) /* Absolute histgrm */
-#define RDPARM_DEADLOCKRESET (1UL << 16) /* Reset on deadlck */
-#define RDPARM_DISABLE(_L) (1UL << ((_L) + 7))
-#define RDPARM_SENDERROR(_L) (1UL << ((_L) - 1))
-
-/*
- * RR_DEBUG_ADDR mask and shift definitions
- */
-
-#define RDA_DATA_SHFT 10 /* Observed debug data */
-#define RDA_DATA_MASK (0xffffUL << 10)
-#define RDA_ADDR_SHFT 0 /* debug address for data */
-#define RDA_ADDR_MASK (0x3ffUL << 0)
-
-/*
- * RR_LB_TO_L2 mask and shift definitions
- */
-
-#define RLBTOL2_DATA_VLD_SHFT 32 /* data is valid for JTAG controller */
-#define RLBTOL2_DATA_VLD_MASK (1UL << 32)
-#define RLBTOL2_DATA_SHFT 0 /* data bits for JTAG controller */
-#define RLBTOL2_DATA_MASK 0xffffffffUL
-
-/*
- * RR_L2_TO_LB mask and shift definitions
- */
-
-#define RL2TOLB_DATA_VLD_SHFT 33 /* data is valid from JTAG controller */
-#define RL2TOLB_DATA_VLD_MASK (1UL << 33)
-#define RL2TOLB_PARITY_SHFT 32 /* sw implemented parity for data */
-#define RL2TOLB_PARITY_MASK (1UL << 32)
-#define RL2TOLB_DATA_SHFT 0 /* data bits from JTAG controller */
-#define RL2TOLB_DATA_MASK 0xffffffffUL
-
-/*
- * RR_JBUS_CONTROL mask and shift definitions
- */
-
-#define RJC_POS_BITS_SHFT 20 /* Router position bits */
-#define RJC_POS_BITS_MASK (0xfUL << 20)
-#define RJC_RD_DATA_STROBE_SHFT 16 /* count when read data is strobed in */
-#define RJC_RD_DATA_STROBE_MASK (0xfUL << 16)
-#define RJC_WE_OE_HOLD_SHFT 8 /* time OE or WE is held */
-#define RJC_WE_OE_HOLD_MASK (0xffUL << 8)
-#define RJC_ADDR_SET_HLD_SHFT 0 /* time address driven around OE/WE */
-#define RJC_ADDR_SET_HLD_MASK 0xffUL
-
-/*
- * RR_SCRATCH_REGx mask and shift definitions
- * note: these fields represent a software convention, and are not
- * understood/interpreted by the hardware.
- */
-
-#define RSCR0_BOOTED_SHFT 63
-#define RSCR0_BOOTED_MASK (0x1UL << RSCR0_BOOTED_SHFT)
-#define RSCR0_LOCALID_SHFT 56
-#define RSCR0_LOCALID_MASK (0x7fUL << RSCR0_LOCALID_SHFT)
-#define RSCR0_UNUSED_SHFT 48
-#define RSCR0_UNUSED_MASK (0xffUL << RSCR0_UNUSED_SHFT)
-#define RSCR0_NIC_SHFT 0
-#define RSCR0_NIC_MASK 0xffffffffffffUL
-
-#define RSCR1_MODID_SHFT 0
-#define RSCR1_MODID_MASK 0xffffUL
-
-/*
- * RR_VECTOR_HW_BAR mask and shift definitions
- */
-
-#define BAR_TX_SHFT 27 /* Barrier in trans(m)it when read */
-#define BAR_TX_MASK (1UL << BAR_TX_SHFT)
-#define BAR_VLD_SHFT 26 /* Valid Configuration */
-#define BAR_VLD_MASK (1UL << BAR_VLD_SHFT)
-#define BAR_SEQ_SHFT 24 /* Sequence number */
-#define BAR_SEQ_MASK (3UL << BAR_SEQ_SHFT)
-#define BAR_LEAFSTATE_SHFT 18 /* Leaf State */
-#define BAR_LEAFSTATE_MASK (0x3fUL << BAR_LEAFSTATE_SHFT)
-#define BAR_PARENT_SHFT 14 /* Parent Port */
-#define BAR_PARENT_MASK (0xfUL << BAR_PARENT_SHFT)
-#define BAR_CHILDREN_SHFT 6 /* Child Select port bits */
-#define BAR_CHILDREN_MASK (0xffUL << BAR_CHILDREN_SHFT)
-#define BAR_LEAFCOUNT_SHFT 0 /* Leaf Count to trigger parent */
-#define BAR_LEAFCOUNT_MASK 0x3fUL
-
-/*
- * RR_PORT_PARMS(_L) mask and shift definitions
- */
-
-#define RPPARM_MIPRESETEN_SHFT 29 /* Message In Progress reset enable */
-#define RPPARM_MIPRESETEN_MASK (0x1UL << 29)
-#define RPPARM_UBAREN_SHFT 28 /* Enable user barrier requests */
-#define RPPARM_UBAREN_MASK (0x1UL << 28)
-#define RPPARM_OUTPDTO_SHFT 24 /* Output Port Deadlock TO value */
-#define RPPARM_OUTPDTO_MASK (0xfUL << 24)
-#define RPPARM_PORTMATE_SHFT 21 /* Port Mate for the port */
-#define RPPARM_PORTMATE_MASK (0x7UL << 21)
-#define RPPARM_HISTEN_SHFT 20 /* Histogram counter enable */
-#define RPPARM_HISTEN_MASK (0x1UL << 20)
-#define RPPARM_HISTSEL_SHFT 18
-#define RPPARM_HISTSEL_MASK (0x3UL << 18)
-#define RPPARM_DAMQHS_SHFT 16
-#define RPPARM_DAMQHS_MASK (0x3UL << 16)
-#define RPPARM_NULLTO_SHFT 10
-#define RPPARM_NULLTO_MASK (0x3fUL << 10)
-#define RPPARM_MAXBURST_SHFT 0
-#define RPPARM_MAXBURST_MASK 0x3ffUL
-
-/*
- * NOTE: Normally the kernel tracks only UTILIZATION statistics.
- * The other 2 should not be used, except during any experimentation
- * with the router.
- */
-#define RPPARM_HISTSEL_AGE 0 /* Histogram age characterization. */
-#define RPPARM_HISTSEL_UTIL 1 /* Histogram link utilization */
-#define RPPARM_HISTSEL_DAMQ 2 /* Histogram DAMQ characterization. */
-
-/*
- * RR_STATUS_ERROR(_L) and RR_ERROR_CLEAR(_L) mask and shift definitions
- */
-#define RSERR_POWERNOK (1UL << 38)
-#define RSERR_PORT_DEADLOCK (1UL << 37)
-#define RSERR_WARMRESET (1UL << 36)
-#define RSERR_LINKRESET (1UL << 35)
-#define RSERR_RETRYTIMEOUT (1UL << 34)
-#define RSERR_FIFOOVERFLOW (1UL << 33)
-#define RSERR_ILLEGALPORT (1UL << 32)
-#define RSERR_DEADLOCKTO_SHFT 28
-#define RSERR_DEADLOCKTO_MASK (0xfUL << 28)
-#define RSERR_RECVTAILTO_SHFT 24
-#define RSERR_RECVTAILTO_MASK (0xfUL << 24)
-#define RSERR_RETRYCNT_SHFT 16
-#define RSERR_RETRYCNT_MASK (0xffUL << 16)
-#define RSERR_CBERRCNT_SHFT 8
-#define RSERR_CBERRCNT_MASK (0xffUL << 8)
-#define RSERR_SNERRCNT_SHFT 0
-#define RSERR_SNERRCNT_MASK (0xffUL << 0)
-
-
-#define PORT_STATUS_UP (1 << 0) /* Router link up */
-#define PORT_STATUS_FENCE (1 << 1) /* Router link fenced */
-#define PORT_STATUS_RESETFAIL (1 << 2) /* Router link didnot
- * come out of reset */
-#define PORT_STATUS_DISCFAIL (1 << 3) /* Router link failed after
- * out of reset but before
- * router tables were
- * programmed
- */
-#define PORT_STATUS_KERNFAIL (1 << 4) /* Router link failed
- * after reset and the
- * router tables were
- * programmed
- */
-#define PORT_STATUS_UNDEF (1 << 5) /* Unable to pinpoint
- * why the router link
- * went down
- */
-#define PROBE_RESULT_BAD -1 /* Set if any of the router
- * links failed after reset
- */
-#define PROBE_RESULT_GOOD 0 /* Set if all the router links
- * which came out of reset
- * are up
- */
-
-/* Should be enough for 256 CPUs */
-#define MAX_RTR_BREADTH 64 /* Max # of routers possible */
-
-/* Get the require set of bits in a var. corr to a sequence of bits */
-#define GET_FIELD(var, fname) \
- ((var) >> fname##_SHFT & fname##_MASK >> fname##_SHFT)
-/* Set the require set of bits in a var. corr to a sequence of bits */
-#define SET_FIELD(var, fname, fval) \
- ((var) = (var) & ~fname##_MASK | (uint64_t) (fval) << fname##_SHFT)
-
-
-#ifndef __ASSEMBLY__
-
-typedef struct router_map_ent_s {
- uint64_t nic;
- moduleid_t module;
- char slot;
-} router_map_ent_t;
-
-struct rr_status_error_fmt {
- uint64_t rserr_unused : 30,
- rserr_fifooverflow : 1,
- rserr_illegalport : 1,
- rserr_deadlockto : 4,
- rserr_recvtailto : 4,
- rserr_retrycnt : 8,
- rserr_cberrcnt : 8,
- rserr_snerrcnt : 8;
-};
-
-/*
- * This type is used to store "absolute" counts of router events
- */
-typedef int router_count_t;
-
-/* All utilizations are on a scale from 0 - 1023. */
-#define RP_BYPASS_UTIL 0
-#define RP_RCV_UTIL 1
-#define RP_SEND_UTIL 2
-#define RP_TOTAL_PKTS 3 /* Free running clock/packet counter */
-
-#define RP_NUM_UTILS 3
-
-#define RP_HIST_REGS 2
-#define RP_NUM_BUCKETS 4
-#define RP_HIST_TYPES 3
-
-#define RP_AGE0 0
-#define RP_AGE1 1
-#define RP_AGE2 2
-#define RP_AGE3 3
-
-
-#define RR_UTIL_SCALE 1024
-
-/*
- * Router port-oriented information
- */
-typedef struct router_port_info_s {
- router_reg_t rp_histograms[RP_HIST_REGS];/* Port usage info */
- router_reg_t rp_port_error; /* Port error info */
- router_count_t rp_retry_errors; /* Total retry errors */
- router_count_t rp_sn_errors; /* Total sn errors */
- router_count_t rp_cb_errors; /* Total cb errors */
- int rp_overflows; /* Total count overflows */
- int rp_excess_err; /* Port has excessive errors */
- ushort rp_util[RP_NUM_BUCKETS];/* Port utilization */
-} router_port_info_t;
-
-#define ROUTER_INFO_VERSION 7
-
-struct lboard_s;
-
-/*
- * Router information
- */
-typedef struct router_info_s {
- char ri_version; /* structure version */
- cnodeid_t ri_cnode; /* cnode of its legal guardian hub */
- nasid_t ri_nasid; /* Nasid of same */
- char ri_ledcache; /* Last LED bitmap */
- char ri_leds; /* Current LED bitmap */
- char ri_portmask; /* Active port bitmap */
- router_reg_t ri_stat_rev_id; /* Status rev ID value */
- uint64_t ri_vector; /* vector from guardian to router */
- int ri_writeid; /* router's vector write ID */
- int64_t ri_timebase; /* Time of first sample */
- int64_t ri_timestamp; /* Time of last sample */
- router_port_info_t ri_port[MAX_ROUTER_PORTS]; /* per port info */
- moduleid_t ri_module; /* Which module are we in? */
- char ri_slotnum; /* Which slot are we in? */
- router_reg_t ri_glbl_parms[GLBL_PARMS_REGS];
- /* Global parms0&1 register contents*/
- void * ri_vertex; /* hardware graph vertex */
- router_reg_t ri_prot_conf; /* protection config. register */
- int64_t ri_per_minute; /* Ticks per minute */
-
- /*
- * Everything below here is for kernel use only and may change at
- * at any time with or without a change in the revision number
- *
- * Any pointers or things that come and go with DEBUG must go at
- * the bottom of the structure, below the user stuff.
- */
- char ri_hist_type; /* histogram type */
- void * ri_guardian; /* guardian node for the router */
- int64_t ri_last_print; /* When did we last print */
- char ri_print; /* Should we print */
- char ri_just_blink; /* Should we blink the LEDs */
-
-#ifdef DEBUG
- int64_t ri_deltatime; /* Time it took to sample */
-#endif
- spinlock_t ri_lock; /* Lock for access to router info */
- uint64_t *ri_vecarray; /* Pointer to array of vectors */
- struct lboard_s *ri_brd; /* Pointer to board structure */
- char * ri_name; /* This board's hwg path */
- unsigned char ri_port_maint[MAX_ROUTER_PORTS]; /* should we send a
- message to availmon */
-} router_info_t;
-
-
-/* Router info location specifiers */
-
-#define RIP_PROMLOG 2 /* Router info in promlog */
-#define RIP_CONSOLE 4 /* Router info on console */
-
-/*
- * Router info hanging in the nodepda
- */
-typedef struct nodepda_router_info_s {
- void * router_vhdl; /* vertex handle of the router */
- short router_port; /* port thru which we entered */
- short router_portmask;
- moduleid_t router_module; /* module in which router is there */
- char router_slot; /* router slot */
- unsigned char router_type; /* kind of router */
- uint64_t router_vector; /* vector from the guardian node */
-
- router_info_t *router_infop; /* info hanging off the hwg vertex */
- struct nodepda_router_info_s *router_next;
- /* pointer to next element */
-} nodepda_router_info_t;
-
-#define ROUTER_NAME_SIZE 20 /* Max size of a router name */
-
-#define NORMAL_ROUTER_NAME "normal_router"
-#define NULL_ROUTER_NAME "null_router"
-#define META_ROUTER_NAME "meta_router"
-#define REPEATER_ROUTER_NAME "repeater_router"
-#define UNKNOWN_ROUTER_NAME "unknown_router"
-
-/* The following definitions are needed by the router traversing
- * code either using the hardware graph or using vector operations.
- */
-/* Structure of the router queue element */
-typedef struct router_elt_s {
- union {
- /* queue element structure during router probing */
- struct {
- /* number-in-a-can (unique) for the router */
- nic_t nic;
- /* vector route from the master hub to
- * this router.
- */
- uint64_t vec;
- /* port status */
- uint64_t status;
- char port_status[MAX_ROUTER_PORTS + 1];
- } r_elt;
- /* queue element structure during router guardian
- * assignment
- */
- struct {
- /* vertex handle for the router */
- void * vhdl;
- /* guardian for this router */
- void * guard;
- /* vector router from the guardian to the router */
- uint64_t vec;
- } k_elt;
- } u;
- /* easy to use port status interpretation */
-} router_elt_t;
-
-/* structure of the router queue */
-
-typedef struct router_queue_s {
- char head; /* Point where a queue element is inserted */
- char tail; /* Point where a queue element is removed */
- int type;
- router_elt_t array[MAX_RTR_BREADTH];
- /* Entries for queue elements */
-} router_queue_t;
-
-
-#endif /* __ASSEMBLY__ */
-
-/*
- * RR_HISTOGRAM(_L) mask and shift definitions
- * There are two 64 bit histogram registers, so the following macros take
- * into account dealing with an array of 4 32 bit values indexed by _x
- */
-
-#define RHIST_BUCKET_SHFT(_x) (32 * ((_x) & 0x1))
-#define RHIST_BUCKET_MASK(_x) (0xffffffffUL << RHIST_BUCKET_SHFT((_x) & 0x1))
-#define RHIST_GET_BUCKET(_x, _reg) \
- ((RHIST_BUCKET_MASK(_x) & ((_reg)[(_x) >> 1])) >> RHIST_BUCKET_SHFT(_x))
-
-/*
- * RR_RESET_MASK(_L) mask and shift definitions
- */
-
-#define RRM_RESETOK(_L) (1UL << ((_L) - 1))
-#define RRM_RESETOK_ALL ALL_PORTS
-
-/*
- * RR_META_TABLE(_x) and RR_LOCAL_TABLE(_x) mask and shift definitions
- */
-
-#define RTABLE_SHFT(_L) (4 * ((_L) - 1))
-#define RTABLE_MASK(_L) (0x7UL << RTABLE_SHFT(_L))
-
-#endif /* _ASM_IA64_SN_ROUTER_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-
-#ifndef _ASM_IA64_SN_SGI_H
-#define _ASM_IA64_SN_SGI_H
-
-#include <linux/config.h>
-
-#include <asm/sn/types.h>
-#include <asm/sn/hwgfs.h>
-
-typedef hwgfs_handle_t vertex_hdl_t;
-
-/* Nice general name length that lots of people like to use */
-#ifndef MAXDEVNAME
-#define MAXDEVNAME 256
-#endif
-
-
-/*
- * Possible return values from graph routines.
- */
-typedef enum graph_error_e {
- GRAPH_SUCCESS, /* 0 */
- GRAPH_DUP, /* 1 */
- GRAPH_NOT_FOUND, /* 2 */
- GRAPH_BAD_PARAM, /* 3 */
- GRAPH_HIT_LIMIT, /* 4 */
- GRAPH_CANNOT_ALLOC, /* 5 */
- GRAPH_ILLEGAL_REQUEST, /* 6 */
- GRAPH_IN_USE /* 7 */
-} graph_error_t;
-
-#define CNODEID_NONE ((cnodeid_t)-1)
-#define CPU_NONE (-1)
-#define GRAPH_VERTEX_NONE ((vertex_hdl_t)-1)
-
-/*
- * Defines for individual WARs. Each is a bitmask of applicable
- * part revision numbers. (1 << 1) == rev A, (1 << 2) == rev B,
- * (3 << 1) == (rev A or rev B), etc
- */
-#define PV854697 (~0) /* PIC: write 64bit regs as 64bits. permanent */
-#define PV854827 (~0UL) /* PIC: fake widget 0xf presence bit. permanent */
-#define PV855271 (1 << 1) /* PIC: use virt chan iff 64-bit device. */
-#define PV878674 (~0) /* PIC: Dont allow 64bit PIOs. permanent */
-#define PV855272 (1 << 1) /* PIC: runaway interrupt WAR */
-#define PV856155 (1 << 1) /* PIC: arbitration WAR */
-#define PV856864 (1 << 1) /* PIC: lower timeout to free TNUMs quicker */
-#define PV856866 (1 << 1) /* PIC: avoid rrb's 0/1/8/9. */
-#define PV862253 (1 << 1) /* PIC: don't enable write req RAM parity checking */
-#define PV867308 (3 << 1) /* PIC: make LLP error interrupts FATAL for PIC */
-
-/*
- * No code is complete without an Assertion macro
- */
-
-#if defined(DISABLE_ASSERT)
-#define ASSERT(expr)
-#define ASSERT_ALWAYS(expr)
-#else
-#define ASSERT(expr) do { \
- if(!(expr)) { \
- printk( "Assertion [%s] failed! %s:%s(line=%d)\n",\
- #expr,__FILE__,__FUNCTION__,__LINE__); \
- panic("Assertion panic\n"); \
- } } while(0)
-
-#define ASSERT_ALWAYS(expr) do {\
- if(!(expr)) { \
- printk( "Assertion [%s] failed! %s:%s(line=%d)\n",\
- #expr,__FILE__,__FUNCTION__,__LINE__); \
- panic("Assertion always panic\n"); \
- } } while(0)
-#endif /* DISABLE_ASSERT */
-
-#endif /* _ASM_IA64_SN_SGI_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_SLOTNUM_H
-#define _ASM_IA64_SN_SLOTNUM_H
-
-
-typedef unsigned char slotid_t;
-
-#include <asm/sn/sn2/slotnum.h>
-
-#endif /* _ASM_IA64_SN_SLOTNUM_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_IA64_SN_SN2_ADDRS_H
-#define _ASM_IA64_SN_SN2_ADDRS_H
-
-/* McKinley Address Format:
- *
- * 4 4 3 3 3 3
- * 9 8 8 7 6 5 0
- * +-+---------+----+--------------+
- * |0| Node ID | AS | Node Offset |
- * +-+---------+----+--------------+
- *
- * Node ID: If bit 38 = 1, is ICE, else is SHUB
- * AS: Address Space Identifier. Used only if bit 38 = 0.
- * b'00: Local Resources and MMR space
- * bit 35
- * 0: Local resources space
- * node id:
- * 0: IA64/NT compatibility space
- * 2: Local MMR Space
- * 4: Local memory, regardless of local node id
- * 1: Global MMR space
- * b'01: GET space.
- * b'10: AMO space.
- * b'11: Cacheable memory space.
- *
- * NodeOffset: byte offset
- */
-
-#ifndef __ASSEMBLY__
-typedef union ia64_sn2_pa {
- struct {
- unsigned long off : 36;
- unsigned long as : 2;
- unsigned long nasid: 11;
- unsigned long fill : 15;
- } f;
- unsigned long l;
- void *p;
-} ia64_sn2_pa_t;
-#endif
-
-#define TO_PHYS_MASK 0x0001ffcfffffffff /* Note - clear AS bits */
-
-
-/* Regions determined by AS */
-#define LOCAL_MMR_SPACE 0xc000008000000000 /* Local MMR space */
-#define LOCAL_PHYS_MMR_SPACE 0x8000008000000000 /* Local PhysicalMMR space */
-#define LOCAL_MEM_SPACE 0xc000010000000000 /* Local Memory space */
-#define GLOBAL_MMR_SPACE 0xc000000800000000 /* Global MMR space */
-#define GLOBAL_PHYS_MMR_SPACE 0x0000000800000000 /* Global Physical MMR space */
-#define GET_SPACE 0xe000001000000000 /* GET space */
-#define AMO_SPACE 0xc000002000000000 /* AMO space */
-#define CACHEABLE_MEM_SPACE 0xe000003000000000 /* Cacheable memory space */
-#define UNCACHED 0xc000000000000000 /* UnCacheable memory space */
-#define UNCACHED_PHYS 0x8000000000000000 /* UnCacheable physical memory space */
-
-#define PHYS_MEM_SPACE 0x0000003000000000 /* physical memory space */
-
-/* SN2 address macros */
-#define NID_SHFT 38
-#define LOCAL_MMR_ADDR(a) (UNCACHED | LOCAL_MMR_SPACE | (a))
-#define LOCAL_MMR_PHYS_ADDR(a) (UNCACHED_PHYS | LOCAL_PHYS_MMR_SPACE | (a))
-#define LOCAL_MEM_ADDR(a) (LOCAL_MEM_SPACE | (a))
-#define REMOTE_ADDR(n,a) ((((unsigned long)(n))<<NID_SHFT) | (a))
-#define GLOBAL_MMR_ADDR(n,a) (UNCACHED | GLOBAL_MMR_SPACE | REMOTE_ADDR(n,a))
-#define GLOBAL_MMR_PHYS_ADDR(n,a) (UNCACHED_PHYS | GLOBAL_PHYS_MMR_SPACE | REMOTE_ADDR(n,a))
-#define GET_ADDR(n,a) (GET_SPACE | REMOTE_ADDR(n,a))
-#define AMO_ADDR(n,a) (UNCACHED | AMO_SPACE | REMOTE_ADDR(n,a))
-#define GLOBAL_MEM_ADDR(n,a) (CACHEABLE_MEM_SPACE | REMOTE_ADDR(n,a))
-
-/* non-II mmr's start at top of big window space (4G) */
-#define BWIN_TOP 0x0000000100000000
-
-/*
- * general address defines - for code common to SN0/SN1/SN2
- */
-#define CAC_BASE CACHEABLE_MEM_SPACE /* cacheable memory space */
-#define IO_BASE (UNCACHED | GLOBAL_MMR_SPACE) /* lower 4G maps II's XIO space */
-#define AMO_BASE (UNCACHED | AMO_SPACE) /* fetch & op space */
-#define MSPEC_BASE AMO_BASE /* fetch & op space */
-#define UNCAC_BASE (UNCACHED | CACHEABLE_MEM_SPACE) /* uncached global memory */
-#define GET_BASE GET_SPACE /* momentarily coherent remote mem. */
-#define CALIAS_BASE LOCAL_CACHEABLE_BASE /* cached node-local memory */
-#define UALIAS_BASE (UNCACHED | LOCAL_CACHEABLE_BASE) /* uncached node-local memory */
-
-#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
-#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_MSPEC(x) (MSPEC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_GET(x) (GET_BASE | ((x) & TO_PHYS_MASK))
-#define TO_CALIAS(x) (CALIAS_BASE | TO_NODE_ADDRSPACE(x))
-#define TO_UALIAS(x) (UALIAS_BASE | TO_NODE_ADDRSPACE(x))
-#define NODE_SIZE_BITS 36 /* node offset : bits <35:0> */
-#define BWIN_SIZE_BITS 29 /* big window size: 512M */
-#define NASID_BITS 11 /* bits <48:38> */
-#define NASID_BITMASK (0x7ffULL)
-#define NASID_SHFT NID_SHFT
-#define NASID_META_BITS 0 /* ???? */
-#define NASID_LOCAL_BITS 7 /* same router as SN1 */
-
-#define NODE_ADDRSPACE_SIZE (1UL << NODE_SIZE_BITS)
-#define NASID_MASK ((uint64_t) NASID_BITMASK << NASID_SHFT)
-#define NASID_GET(_pa) (int) (((uint64_t) (_pa) >> \
- NASID_SHFT) & NASID_BITMASK)
-#define PHYS_TO_DMA(x) ( ((x & NASID_MASK) >> 2) | \
- (x & (NODE_ADDRSPACE_SIZE - 1)) )
-
-#define CHANGE_NASID(n,x) ({ia64_sn2_pa_t _v; _v.l = (long) (x); _v.f.nasid = n; _v.p;})
-
-/*
- * Determine if a physical address should be referenced as cached or uncached.
- * For now, assume all memory is cached and everything else is noncached.
- * (Later, we may need to special case areas of memory to be reference uncached).
- */
-#define IS_CACHED_ADDRESS(x) (((x) & PHYS_MEM_SPACE) == PHYS_MEM_SPACE)
-
-
-#ifndef __ASSEMBLY__
-#define NODE_SWIN_BASE(nasid, widget) \
- ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \
- : RAW_NODE_SWIN_BASE(nasid, widget))
-#else
-#define NODE_SWIN_BASE(nasid, widget) \
- (NODE_IO_BASE(nasid) + ((uint64_t) (widget) << SWIN_SIZE_BITS))
-#define LOCAL_SWIN_BASE(widget) \
- (UNCACHED | LOCAL_MMR_SPACE | (((uint64_t) (widget) << SWIN_SIZE_BITS)))
-#endif /* __ASSEMBLY__ */
-
-/*
- * The following definitions pertain to the IO special address
- * space. They define the location of the big and little windows
- * of any given node.
- */
-
-#define BWIN_INDEX_BITS 3
-#define BWIN_SIZE (1UL << BWIN_SIZE_BITS)
-#define BWIN_SIZEMASK (BWIN_SIZE - 1)
-#define BWIN_WIDGET_MASK 0x7
-#define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE)
-#define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + \
- ((uint64_t) (bigwin) << BWIN_SIZE_BITS))
-
-#define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK)
-#define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK)
-
-/*
- * Verify if addr belongs to large window address of node with "nasid"
- *
- *
- * NOTE: "addr" is expected to be XKPHYS address, and NOT physical
- * address
- *
- *
- */
-
-#define NODE_BWIN_ADDR(nasid, addr) \
- (((addr) >= NODE_BWIN_BASE0(nasid)) && \
- ((addr) < (NODE_BWIN_BASE(nasid, HUB_NUM_BIG_WINDOW) + \
- BWIN_SIZE)))
-
-#endif /* _ASM_IA64_SN_SN2_ADDRS_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_SN2_ARCH_H
-#define _ASM_IA64_SN_SN2_ARCH_H
-
-#define CPUS_PER_NODE 4 /* CPUs on a single hub */
-#define CPUS_PER_SUBNODE 4 /* CPUs on a single hub PI */
-
-
-/*
- * This is the maximum number of NASIDS that can be present in a system.
- * (Highest NASID plus one.)
- */
-#define MAX_NASIDS 2048
-
-
-/*
- * This is the maximum number of nodes that can be part of a kernel.
- * Effectively, it's the maximum number of compact node ids (cnodeid_t).
- * This is not necessarily the same as MAX_NASIDS.
- */
-#define MAX_COMPACT_NODES 2048
-
-/*
- * MAX_REGIONS refers to the maximum number of hardware partitioned regions.
- */
-#define MAX_REGIONS 64
-#define MAX_NONPREMIUM_REGIONS 16
-#define MAX_PREMIUM_REGIONS MAX_REGIONS
-
-
-/*
- * MAX_PARITIONS refers to the maximum number of logically defined
- * partitions the system can support.
- */
-#define MAX_PARTITIONS MAX_REGIONS
-
-
-#define NASID_MASK_BYTES ((MAX_NASIDS + 7) / 8)
-#define CNASID_MASK_BYTES (NASID_MASK_BYTES / 2)
-
-
-/*
- * 1 FSB per SHUB, with up to 4 cpus per FSB.
- */
-#define NUM_SUBNODES 1
-#define SUBNODE_SHFT 0
-#define SUBNODE_MASK (0x0 << SUBNODE_SHFT)
-#define LOCALCPU_SHFT 0
-#define LOCALCPU_MASK (0x3 << LOCALCPU_SHFT)
-#define SUBNODE(slice) (((slice) & SUBNODE_MASK) >> SUBNODE_SHFT)
-#define LOCALCPU(slice) (((slice) & LOCALCPU_MASK) >> LOCALCPU_SHFT)
-#define TO_SLICE(subn, local) (((subn) << SUBNODE_SHFT) | \
- ((local) << LOCALCPU_SHFT))
-
-#endif /* _ASM_IA64_SN_SN2_ARCH_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_IA64_SN_SN2_GEO_H
-#define _ASM_IA64_SN_SN2_GEO_H
-
-/* Headers required by declarations in this file */
-
-#include <asm/sn/slotnum.h>
-
-
-/* The geoid_t implementation below is based loosely on the pcfg_t
- implementation in sys/SN/promcfg.h. */
-
-/* Type declaractions */
-
-/* Size of a geoid_t structure (must be before decl. of geoid_u) */
-#define GEOID_SIZE 8 /* Would 16 be better? The size can
- be different on different platforms. */
-
-#define MAX_SLABS 0xe /* slabs per module */
-
-typedef unsigned char geo_type_t;
-
-/* Fields common to all substructures */
-typedef struct geo_any_s {
- moduleid_t module; /* The module (box) this h/w lives in */
- geo_type_t type; /* What type of h/w is named by this geoid_t */
- slabid_t slab; /* The logical assembly within the module */
-} geo_any_t;
-
-/* Additional fields for particular types of hardware */
-typedef struct geo_node_s {
- geo_any_t any; /* No additional fields needed */
-} geo_node_t;
-
-typedef struct geo_rtr_s {
- geo_any_t any; /* No additional fields needed */
-} geo_rtr_t;
-
-typedef struct geo_iocntl_s {
- geo_any_t any; /* No additional fields needed */
-} geo_iocntl_t;
-
-typedef struct geo_pcicard_s {
- geo_iocntl_t any;
- char bus; /* Bus/widget number */
- slotid_t slot; /* PCI slot number */
-} geo_pcicard_t;
-
-/* Subcomponents of a node */
-typedef struct geo_cpu_s {
- geo_node_t node;
- char slice; /* Which CPU on the node */
-} geo_cpu_t;
-
-typedef struct geo_mem_s {
- geo_node_t node;
- char membus; /* The memory bus on the node */
- char memslot; /* The memory slot on the bus */
-} geo_mem_t;
-
-
-typedef union geoid_u {
- geo_any_t any;
- geo_node_t node;
- geo_iocntl_t iocntl;
- geo_pcicard_t pcicard;
- geo_rtr_t rtr;
- geo_cpu_t cpu;
- geo_mem_t mem;
- char padsize[GEOID_SIZE];
-} geoid_t;
-
-
-/* Preprocessor macros */
-
-#define GEO_MAX_LEN 48 /* max. formatted length, plus some pad:
- module/001c07/slab/5/node/memory/2/slot/4 */
-
-/* Values for geo_type_t */
-#define GEO_TYPE_INVALID 0
-#define GEO_TYPE_MODULE 1
-#define GEO_TYPE_NODE 2
-#define GEO_TYPE_RTR 3
-#define GEO_TYPE_IOCNTL 4
-#define GEO_TYPE_IOCARD 5
-#define GEO_TYPE_CPU 6
-#define GEO_TYPE_MEM 7
-#define GEO_TYPE_MAX (GEO_TYPE_MEM+1)
-
-/* Parameter for hwcfg_format_geoid_compt() */
-#define GEO_COMPT_MODULE 1
-#define GEO_COMPT_SLAB 2
-#define GEO_COMPT_IOBUS 3
-#define GEO_COMPT_IOSLOT 4
-#define GEO_COMPT_CPU 5
-#define GEO_COMPT_MEMBUS 6
-#define GEO_COMPT_MEMSLOT 7
-
-#define GEO_INVALID_STR "<invalid>"
-
-#endif /* _ASM_IA64_SN_SN2_GEO_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_SN2_INTR_H
-#define _ASM_IA64_SN_SN2_INTR_H
-
-#define SGI_UART_VECTOR (0xe9)
-#define SGI_SHUB_ERROR_VECTOR (0xea)
-
-// These two IRQ's are used by partitioning.
-#define SGI_XPC_ACTIVATE (0x30)
-#define SGI_II_ERROR (0x31)
-#define SGI_XBOW_ERROR (0x32)
-#define SGI_PCIBR_ERROR (0x33)
-#define SGI_ACPI_SCI_INT (0x34)
-#define SGI_XPC_NOTIFY (0xe7)
-
-#define IA64_SN2_FIRST_DEVICE_VECTOR (0x37)
-#define IA64_SN2_LAST_DEVICE_VECTOR (0xe6)
-
-#define SN2_IRQ_RESERVED (0x1)
-#define SN2_IRQ_CONNECTED (0x2)
-#define SN2_IRQ_SHARED (0x4)
-
-#define SN2_IRQ_PER_HUB (2048)
-
-#endif /* _ASM_IA64_SN_SN2_INTR_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_SN_SN2_IO_H
-#define _ASM_SN_SN2_IO_H
-#include <linux/compiler.h>
-#include <asm/intrinsics.h>
-
-extern void * sn_io_addr(unsigned long port) __attribute_const__; /* Forward definition */
-extern void sn_mmiob(void); /* Forward definition */
-
-#define __sn_mf_a() ia64_mfa()
-
-extern void sn_dma_flush(unsigned long);
-
-#define __sn_inb ___sn_inb
-#define __sn_inw ___sn_inw
-#define __sn_inl ___sn_inl
-#define __sn_outb ___sn_outb
-#define __sn_outw ___sn_outw
-#define __sn_outl ___sn_outl
-#define __sn_readb ___sn_readb
-#define __sn_readw ___sn_readw
-#define __sn_readl ___sn_readl
-#define __sn_readq ___sn_readq
-#define __sn_readb_relaxed ___sn_readb_relaxed
-#define __sn_readw_relaxed ___sn_readw_relaxed
-#define __sn_readl_relaxed ___sn_readl_relaxed
-#define __sn_readq_relaxed ___sn_readq_relaxed
-
-/*
- * The following routines are SN Platform specific, called when
- * a reference is made to inX/outX set macros. SN Platform
- * inX set of macros ensures that Posted DMA writes on the
- * Bridge is flushed.
- *
- * The routines should be self explainatory.
- */
-
-static inline unsigned int
-___sn_inb (unsigned long port)
-{
- volatile unsigned char *addr;
- unsigned char ret = -1;
-
- if ((addr = sn_io_addr(port))) {
- ret = *addr;
- __sn_mf_a();
- sn_dma_flush((unsigned long)addr);
- }
- return ret;
-}
-
-static inline unsigned int
-___sn_inw (unsigned long port)
-{
- volatile unsigned short *addr;
- unsigned short ret = -1;
-
- if ((addr = sn_io_addr(port))) {
- ret = *addr;
- __sn_mf_a();
- sn_dma_flush((unsigned long)addr);
- }
- return ret;
-}
-
-static inline unsigned int
-___sn_inl (unsigned long port)
-{
- volatile unsigned int *addr;
- unsigned int ret = -1;
-
- if ((addr = sn_io_addr(port))) {
- ret = *addr;
- __sn_mf_a();
- sn_dma_flush((unsigned long)addr);
- }
- return ret;
-}
-
-static inline void
-___sn_outb (unsigned char val, unsigned long port)
-{
- volatile unsigned char *addr;
-
- if ((addr = sn_io_addr(port))) {
- *addr = val;
- sn_mmiob();
- }
-}
-
-static inline void
-___sn_outw (unsigned short val, unsigned long port)
-{
- volatile unsigned short *addr;
-
- if ((addr = sn_io_addr(port))) {
- *addr = val;
- sn_mmiob();
- }
-}
-
-static inline void
-___sn_outl (unsigned int val, unsigned long port)
-{
- volatile unsigned int *addr;
-
- if ((addr = sn_io_addr(port))) {
- *addr = val;
- sn_mmiob();
- }
-}
-
-/*
- * The following routines are SN Platform specific, called when
- * a reference is made to readX/writeX set macros. SN Platform
- * readX set of macros ensures that Posted DMA writes on the
- * Bridge is flushed.
- *
- * The routines should be self explainatory.
- */
-
-static inline unsigned char
-___sn_readb (void *addr)
-{
- unsigned char val;
-
- val = *(volatile unsigned char *)addr;
- __sn_mf_a();
- sn_dma_flush((unsigned long)addr);
- return val;
-}
-
-static inline unsigned short
-___sn_readw (void *addr)
-{
- unsigned short val;
-
- val = *(volatile unsigned short *)addr;
- __sn_mf_a();
- sn_dma_flush((unsigned long)addr);
- return val;
-}
-
-static inline unsigned int
-___sn_readl (void *addr)
-{
- unsigned int val;
-
- val = *(volatile unsigned int *) addr;
- __sn_mf_a();
- sn_dma_flush((unsigned long)addr);
- return val;
-}
-
-static inline unsigned long
-___sn_readq (void *addr)
-{
- unsigned long val;
-
- val = *(volatile unsigned long *) addr;
- __sn_mf_a();
- sn_dma_flush((unsigned long)addr);
- return val;
-}
-
-/*
- * For generic and SN2 kernels, we have a set of fast access
- * PIO macros. These macros are provided on SN Platform
- * because the normal inX and readX macros perform an
- * additional task of flushing Post DMA request on the Bridge.
- *
- * These routines should be self explainatory.
- */
-
-static inline unsigned int
-sn_inb_fast (unsigned long port)
-{
- volatile unsigned char *addr = (unsigned char *)port;
- unsigned char ret;
-
- ret = *addr;
- __sn_mf_a();
- return ret;
-}
-
-static inline unsigned int
-sn_inw_fast (unsigned long port)
-{
- volatile unsigned short *addr = (unsigned short *)port;
- unsigned short ret;
-
- ret = *addr;
- __sn_mf_a();
- return ret;
-}
-
-static inline unsigned int
-sn_inl_fast (unsigned long port)
-{
- volatile unsigned int *addr = (unsigned int *)port;
- unsigned int ret;
-
- ret = *addr;
- __sn_mf_a();
- return ret;
-}
-
-static inline unsigned char
-___sn_readb_relaxed (void *addr)
-{
- return *(volatile unsigned char *)addr;
-}
-
-static inline unsigned short
-___sn_readw_relaxed (void *addr)
-{
- return *(volatile unsigned short *)addr;
-}
-
-static inline unsigned int
-___sn_readl_relaxed (void *addr)
-{
- return *(volatile unsigned int *) addr;
-}
-
-static inline unsigned long
-___sn_readq_relaxed (void *addr)
-{
- return *(volatile unsigned long *) addr;
-}
-
-#endif
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-
-#ifndef _ASM_IA64_SN_SN2_SHUB_H
-#define _ASM_IA64_SN_SN2_SHUB_H
-
-/*
- * Junk Bus Address Space
- * The junk bus is used to access the PROM, LED's, and UART. It's
- * accessed through the local block MMR space. The data path is
- * 16 bits wide. This space requires address bits 31-27 to be set, and
- * is further divided by address bits 26:15.
- * The LED addresses are write-only. To read the LEDs, you need to use
- * SH_JUNK_BUS_LED0-3, defined in shub_mmr.h
- *
- */
-#define SH_REAL_JUNK_BUS_LED0 0x7fed00000
-#define SH_REAL_JUNK_BUS_LED1 0x7fed10000
-#define SH_REAL_JUNK_BUS_LED2 0x7fed20000
-#define SH_REAL_JUNK_BUS_LED3 0x7fed30000
-#define SH_JUNK_BUS_UART0 0x7fed40000
-#define SH_JUNK_BUS_UART1 0x7fed40008
-#define SH_JUNK_BUS_UART2 0x7fed40010
-#define SH_JUNK_BUS_UART3 0x7fed40018
-#define SH_JUNK_BUS_UART4 0x7fed40020
-#define SH_JUNK_BUS_UART5 0x7fed40028
-#define SH_JUNK_BUS_UART6 0x7fed40030
-#define SH_JUNK_BUS_UART7 0x7fed40038
-
-#endif /* _ASM_IA64_SN_SN2_SHUB_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2001, 2002-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-
-#ifndef _ASM_IA64_SN_SN2_SHUB_MD_H
-#define _ASM_IA64_SN_SN2_SHUB_MD_H
-
-/* SN2 supports a mostly-flat address space with 4 CPU-visible, evenly spaced,
- contiguous regions, or "software banks". On SN2, software bank n begins at
- addresses n * 16GB, 0 <= n < 4. Each bank has a 16GB address space. If
- the 4 dimms do not use up this space there will be holes between the
- banks. Even with these holes the whole memory space within a bank is
- not addressable address space. The top 1/32 of each bank is directory
- memory space and is accessible through bist only.
-
- Physically a SN2 node board contains 2 daughter cards with 8 dimm sockets
- each. A total of 16 dimm sockets arranged as 4 "DIMM banks" of 4 dimms
- each. The data is stripped across the 4 memory busses so all dimms within
- a dimm bank must have identical capacity dimms. Memory is increased or
- decreased in sets of 4. Each dimm bank has 2 dimms on each side.
-
- Physical Dimm Bank layout.
- DTR Card0
- ------------
- Dimm Bank 3 | MemYL3 | CS 3
- | MemXL3 |
- |----------|
- Dimm Bank 2 | MemYL2 | CS 2
- | MemXL2 |
- |----------|
- Dimm Bank 1 | MemYL1 | CS 1
- | MemXL1 |
- |----------|
- Dimm Bank 0 | MemYL0 | CS 0
- | MemXL0 |
- ------------
- | |
- BUS BUS
- XL YL
- | |
- ------------
- | SHUB |
- | MD |
- ------------
- | |
- BUS BUS
- XR YR
- | |
- ------------
- Dimm Bank 0 | MemXR0 | CS 0
- | MemYR0 |
- |----------|
- Dimm Bank 1 | MemXR1 | CS 1
- | MemYR1 |
- |----------|
- Dimm Bank 2 | MemXR2 | CS 2
- | MemYR2 |
- |----------|
- Dimm Bank 3 | MemXR3 | CS 3
- | MemYR3 |
- ------------
- DTR Card1
-
- The dimms can be 1 or 2 sided dimms. The size and bankness is defined
- separately for each dimm bank in the sh_[x,y,jnr]_dimm_cfg MMR register.
-
- Normally software bank 0 would map directly to physical dimm bank 0. The
- software banks can map to the different physical dimm banks via the
- DIMM[0-3]_CS field in SH_[x,y,jnr]_DIMM_CFG for each dimm slot.
-
- All the PROM's data structures (promlog variables, klconfig, etc.)
- track memory by the physical dimm bank number. The kernel usually
- tracks memory by the software bank number.
-
- */
-
-
-/* Preprocessor macros */
-#define MD_MEM_BANKS 4
-#define MD_PHYS_BANKS_PER_DIMM 2 /* dimms may be 2 sided. */
-#define MD_NUM_PHYS_BANKS (MD_MEM_BANKS * MD_PHYS_BANKS_PER_DIMM)
-#define MD_DIMMS_IN_SLOT 4 /* 4 dimms in each dimm bank. aka slot */
-
-/* Address bits 35,34 control dimm bank access. */
-#define MD_BANK_SHFT 34
-#define MD_BANK_MASK (UINT64_CAST 0x3 << MD_BANK_SHFT )
-#define MD_BANK_GET(addr) (((addr) & MD_BANK_MASK) >> MD_BANK_SHFT)
-#define MD_BANK_SIZE (UINT64_CAST 0x1 << MD_BANK_SHFT ) /* 16 gb */
-#define MD_BANK_OFFSET(_b) (UINT64_CAST (_b) << MD_BANK_SHFT)
-
-/*Address bit 12 selects side of dimm if 2bnk dimms present. */
-#define MD_PHYS_BANK_SEL_SHFT 12
-#define MD_PHYS_BANK_SEL_MASK (UINT64_CAST 0x1 << MD_PHYS_BANK_SEL_SHFT)
-
-/* Address bit 7 determines if data resides on X or Y memory system.
- * If addr Bit 7 is set the data resides on Y memory system and
- * the corresponing directory entry reside on the X.
- */
-#define MD_X_OR_Y_SEL_SHFT 7
-#define MD_X_OR_Y_SEL_MASK (1 << MD_X_OR_Y_SEL_SHFT)
-
-/* Address bit 8 determines which directory entry of the pair the address
- * corresponds to. If addr Bit 8 is set DirB corresponds to the memory address.
- */
-#define MD_DIRA_OR_DIRB_SEL_SHFT 8
-#define MD_DIRA_OR_DIRB_SEL_MASK (1 << MD_DIRA_OR_DIRB_SEL_SHFT)
-
-/* Address bit 11 determines if corresponding directory entry resides
- * on Left or Right memory bus. If addr Bit 11 is set the corresponding
- * directory entry resides on Right memory bus.
- */
-#define MD_L_OR_R_SEL_SHFT 11
-#define MD_L_OR_R_SEL_MASK (1 << MD_L_OR_R_SEL_SHFT)
-
-/* DRAM sizes. */
-#define MD_SZ_64_Mb 0x0
-#define MD_SZ_128_Mb 0x1
-#define MD_SZ_256_Mb 0x2
-#define MD_SZ_512_Mb 0x3
-#define MD_SZ_1024_Mb 0x4
-#define MD_SZ_2048_Mb 0x5
-#define MD_SZ_UNUSED 0x7
-
-#define MD_DIMM_SIZE_BYTES(_size, _2bk) ( \
- ( (_size) == 7 ? 0 : ( 0x4000000L << (_size)) << (_2bk)))\
-
-#define MD_DIMM_SIZE_MBYTES(_size, _2bk) ( \
- ( (_size) == 7 ? 0 : ( 0x40L << (_size) ) << (_2bk))) \
-
-/* The top 1/32 of each bank is directory memory, and not accessible
- * via normal reads and writes */
-#define MD_DIMM_USER_SIZE(_size) ((_size) * 31 / 32)
-
-/* Minimum size of a populated bank is 64M (62M usable) */
-#define MIN_BANK_SIZE MD_DIMM_USER_SIZE((64 * 0x100000))
-#define MIN_BANK_STRING "62"
-
-
-/*Possible values for FREQ field in sh_[x,y,jnr]_dimm_cfg regs */
-#define MD_DIMM_100_CL2_0 0x0
-#define MD_DIMM_133_CL2_0 0x1
-#define MD_DIMM_133_CL2_5 0x2
-#define MD_DIMM_160_CL2_0 0x3
-#define MD_DIMM_160_CL2_5 0x4
-#define MD_DIMM_160_CL3_0 0x5
-#define MD_DIMM_200_CL2_0 0x6
-#define MD_DIMM_200_CL2_5 0x7
-#define MD_DIMM_200_CL3_0 0x8
-
-/* DIMM_CFG fields */
-#define MD_DIMM_SHFT(_dimm) ((_dimm) << 3)
-#define MD_DIMM_SIZE_MASK(_dimm) \
- (SH_JNR_DIMM_CFG_DIMM0_SIZE_MASK << \
- (MD_DIMM_SHFT(_dimm)))
-
-#define MD_DIMM_2BK_MASK(_dimm) \
- (SH_JNR_DIMM_CFG_DIMM0_2BK_MASK << \
- MD_DIMM_SHFT(_dimm))
-
-#define MD_DIMM_REV_MASK(_dimm) \
- (SH_JNR_DIMM_CFG_DIMM0_REV_MASK << \
- MD_DIMM_SHFT(_dimm))
-
-#define MD_DIMM_CS_MASK(_dimm) \
- (SH_JNR_DIMM_CFG_DIMM0_CS_MASK << \
- MD_DIMM_SHFT(_dimm))
-
-#define MD_DIMM_SIZE(_dimm, _cfg) \
- (((_cfg) & MD_DIMM_SIZE_MASK(_dimm)) \
- >> (MD_DIMM_SHFT(_dimm)+SH_JNR_DIMM_CFG_DIMM0_SIZE_SHFT))
-
-#define MD_DIMM_TWO_SIDED(_dimm,_cfg) \
- ( ((_cfg) & MD_DIMM_2BK_MASK(_dimm)) \
- >> (MD_DIMM_SHFT(_dimm)+SH_JNR_DIMM_CFG_DIMM0_2BK_SHFT))
-
-#define MD_DIMM_REVERSED(_dimm,_cfg) \
- (((_cfg) & MD_DIMM_REV_MASK(_dimm)) \
- >> (MD_DIMM_SHFT(_dimm)+SH_JNR_DIMM_CFG_DIMM0_REV_SHFT))
-
-#define MD_DIMM_CS(_dimm,_cfg) \
- (((_cfg) & MD_DIMM_CS_MASK(_dimm)) \
- >> (MD_DIMM_SHFT(_dimm)+SH_JNR_DIMM_CFG_DIMM0_CS_SHFT))
-
-
-
-/* Macros to set MMRs that must be set identically to others. */
-#define MD_SET_DIMM_CFG(_n, _value) { \
- REMOTE_HUB_S(_n, SH_X_DIMM_CFG,_value); \
- REMOTE_HUB_S(_n, SH_Y_DIMM_CFG, _value); \
- REMOTE_HUB_S(_n, SH_JNR_DIMM_CFG, _value);}
-
-#define MD_SET_DQCT_CFG(_n, _value) { \
- REMOTE_HUB_S(_n, SH_X_DQCT_CFG,_value); \
- REMOTE_HUB_S(_n, SH_Y_DQCT_CFG,_value); }
-
-#define MD_SET_CFG(_n, _value) { \
- REMOTE_HUB_S(_n, SH_X_CFG,_value); \
- REMOTE_HUB_S(_n, SH_Y_CFG,_value);}
-
-#define MD_SET_REFRESH_CONTROL(_n, _value) { \
- REMOTE_HUB_S(_n, SH_X_REFRESH_CONTROL, _value); \
- REMOTE_HUB_S(_n, SH_Y_REFRESH_CONTROL, _value);}
-
-#define MD_SET_DQ_MMR_DIR_COFIG(_n, _value) { \
- REMOTE_HUB_S(_n, SH_MD_DQLP_MMR_DIR_CONFIG, _value); \
- REMOTE_HUB_S(_n, SH_MD_DQRP_MMR_DIR_CONFIG, _value);}
-
-#define MD_SET_PIOWD_DIR_ENTRYS(_n, _value) { \
- REMOTE_HUB_S(_n, SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY, _value);\
- REMOTE_HUB_S(_n, SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY, _value);}
-
-/*
- * There are 12 Node Presence MMRs, 4 in each primary DQ and 4 in the
- * LB. The data in the left and right DQ MMRs and the LB must match.
- */
-#define MD_SET_PRESENT_VEC(_n, _vec, _value) { \
- REMOTE_HUB_S(_n, SH_MD_DQLP_MMR_DIR_PRESVEC0+((_vec)*0x10),\
- _value); \
- REMOTE_HUB_S(_n, SH_MD_DQRP_MMR_DIR_PRESVEC0+((_vec)*0x10),\
- _value); \
- REMOTE_HUB_S(_n, SH_SHUBS_PRESENT0+((_vec)*0x80), _value);}
-/*
- * There are 16 Privilege Vector MMRs, 8 in each primary DQ. The data
- * in the corresponding left and right DQ MMRs must match. Each MMR
- * pair is used for a single partition.
- */
-#define MD_SET_PRI_VEC(_n, _vec, _value) { \
- REMOTE_HUB_S(_n, SH_MD_DQLP_MMR_DIR_PRIVEC0+((_vec)*0x10),\
- _value); \
- REMOTE_HUB_S(_n, SH_MD_DQRP_MMR_DIR_PRIVEC0+((_vec)*0x10),\
- _value);}
-/*
- * There are 16 Local/Remote MMRs, 8 in each primary DQ. The data in
- * the corresponding left and right DQ MMRs must match. Each MMR pair
- * is used for a single partition.
- */
-#define MD_SET_LOC_VEC(_n, _vec, _value) { \
- REMOTE_HUB_S(_n, SH_MD_DQLP_MMR_DIR_LOCVEC0+((_vec)*0x10),\
- _value); \
- REMOTE_HUB_S(_n, SH_MD_DQRP_MMR_DIR_LOCVEC0+((_vec)*0x10),\
- _value);}
-
-/* Memory BIST CMDS */
-#define MD_DIMM_INIT_MODE_SET 0x0
-#define MD_DIMM_INIT_REFRESH 0x1
-#define MD_DIMM_INIT_PRECHARGE 0x2
-#define MD_DIMM_INIT_BURST_TERM 0x6
-#define MD_DIMM_INIT_NOP 0x7
-#define MD_DIMM_BIST_READ 0x10
-#define MD_FILL_DIR 0x20
-#define MD_FILL_DATA 0x30
-#define MD_FILL_DIR_ACCESS 0X40
-#define MD_READ_DIR_PAIR 0x50
-#define MD_READ_DIR_TAG 0x60
-
-/* SH_MMRBIST_CTL macros */
-#define MD_BIST_FAIL(_n) (REMOTE_HUB_L(_n, SH_MMRBIST_CTL) & \
- SH_MMRBIST_CTL_FAIL_MASK)
-
-#define MD_BIST_IN_PROGRESS(_n) (REMOTE_HUB_L(_n, SH_MMRBIST_CTL) & \
- SH_MMRBIST_CTL_IN_PROGRESS_MASK)
-
-#define MD_BIST_MEM_IDLE(_n); (REMOTE_HUB_L(_n, SH_MMRBIST_CTL) & \
- SH_MMRBIST_CTL_MEM_IDLE_MASK)
-
-/* SH_MMRBIST_ERR macros */
-#define MD_BIST_MISCOMPARE(_n) (REMOTE_HUB_L(_n, SH_MMRBIST_ERR) & \
- SH_MMRBIST_ERR_DETECTED_MASK)
-
-#endif /* _ASM_IA64_SN_SN2_SHUB_MD_H */
+++ /dev/null
-/*
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-
-#ifndef _ASM_IA64_SN_SN2_SHUB_MMR_H
-#define _ASM_IA64_SN_SN2_SHUB_MMR_H
-
-/* ==================================================================== */
-/* Register "SH_FSB_BINIT_CONTROL" */
-/* FSB BINIT# Control */
-/* ==================================================================== */
-
-#define SH_FSB_BINIT_CONTROL 0x0000000120010000
-#define SH_FSB_BINIT_CONTROL_MASK 0x0000000000000001
-#define SH_FSB_BINIT_CONTROL_INIT 0x0000000000000000
-
-/* SH_FSB_BINIT_CONTROL_BINIT */
-/* Description: Assert the FSB's BINIT# Signal */
-#define SH_FSB_BINIT_CONTROL_BINIT_SHFT 0
-#define SH_FSB_BINIT_CONTROL_BINIT_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_FSB_RESET_CONTROL" */
-/* FSB Reset Control */
-/* ==================================================================== */
-
-#define SH_FSB_RESET_CONTROL 0x0000000120010080
-#define SH_FSB_RESET_CONTROL_MASK 0x0000000000000001
-#define SH_FSB_RESET_CONTROL_INIT 0x0000000000000000
-
-/* SH_FSB_RESET_CONTROL_RESET */
-/* Description: Assert the FSB's RESET# Signal */
-#define SH_FSB_RESET_CONTROL_RESET_SHFT 0
-#define SH_FSB_RESET_CONTROL_RESET_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_FSB_SYSTEM_AGENT_CONFIG" */
-/* FSB System Agent Configuration */
-/* ==================================================================== */
-
-#define SH_FSB_SYSTEM_AGENT_CONFIG 0x0000000120010100
-#define SH_FSB_SYSTEM_AGENT_CONFIG_MASK 0x00003fff0187fff9
-#define SH_FSB_SYSTEM_AGENT_CONFIG_INIT 0x0000000000000000
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_RCNT_SCNT_EN */
-/* Description: RCNT/SCNT Assertion Enabled */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_RCNT_SCNT_EN_SHFT 0
-#define SH_FSB_SYSTEM_AGENT_CONFIG_RCNT_SCNT_EN_MASK 0x0000000000000001
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_BERR_ASSERT_EN */
-/* Description: BERR Assertion Enabled for Bus Errors */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_BERR_ASSERT_EN_SHFT 3
-#define SH_FSB_SYSTEM_AGENT_CONFIG_BERR_ASSERT_EN_MASK 0x0000000000000008
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_BERR_SAMPLING_EN */
-/* Description: BERR Sampling Enabled */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_BERR_SAMPLING_EN_SHFT 4
-#define SH_FSB_SYSTEM_AGENT_CONFIG_BERR_SAMPLING_EN_MASK 0x0000000000000010
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_BINIT_ASSERT_EN */
-/* Description: BINIT Assertion Enabled */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_BINIT_ASSERT_EN_SHFT 5
-#define SH_FSB_SYSTEM_AGENT_CONFIG_BINIT_ASSERT_EN_MASK 0x0000000000000020
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_BNR_THROTTLING_EN */
-/* Description: stutter FSB request assertion */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_BNR_THROTTLING_EN_SHFT 6
-#define SH_FSB_SYSTEM_AGENT_CONFIG_BNR_THROTTLING_EN_MASK 0x0000000000000040
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_SHORT_HANG_EN */
-/* Description: use short duration hang timeout */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_SHORT_HANG_EN_SHFT 7
-#define SH_FSB_SYSTEM_AGENT_CONFIG_SHORT_HANG_EN_MASK 0x0000000000000080
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_INTA_RSP_DATA */
-/* Description: Interrupt Acknowledge Response Data */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_INTA_RSP_DATA_SHFT 8
-#define SH_FSB_SYSTEM_AGENT_CONFIG_INTA_RSP_DATA_MASK 0x000000000000ff00
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_IO_TRANS_RSP */
-/* Description: IO Transaction Response */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_IO_TRANS_RSP_SHFT 16
-#define SH_FSB_SYSTEM_AGENT_CONFIG_IO_TRANS_RSP_MASK 0x0000000000010000
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_XTPR_TRANS_RSP */
-/* Description: External Task Priority Register (xTPR) Transaction */
-/* Response */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_XTPR_TRANS_RSP_SHFT 17
-#define SH_FSB_SYSTEM_AGENT_CONFIG_XTPR_TRANS_RSP_MASK 0x0000000000020000
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_INTA_TRANS_RSP */
-/* Description: Interrupt Acknowledge Transaction Response */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_INTA_TRANS_RSP_SHFT 18
-#define SH_FSB_SYSTEM_AGENT_CONFIG_INTA_TRANS_RSP_MASK 0x0000000000040000
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_TDOT */
-/* Description: Throttle Data-bus Ownership Transitions */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_TDOT_SHFT 23
-#define SH_FSB_SYSTEM_AGENT_CONFIG_TDOT_MASK 0x0000000000800000
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_SERIALIZE_FSB_EN */
-/* Description: serialize processor transactions */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_SERIALIZE_FSB_EN_SHFT 24
-#define SH_FSB_SYSTEM_AGENT_CONFIG_SERIALIZE_FSB_EN_MASK 0x0000000001000000
-
-/* SH_FSB_SYSTEM_AGENT_CONFIG_BINIT_EVENT_ENABLES */
-/* Description: FSB error binit enables */
-#define SH_FSB_SYSTEM_AGENT_CONFIG_BINIT_EVENT_ENABLES_SHFT 32
-#define SH_FSB_SYSTEM_AGENT_CONFIG_BINIT_EVENT_ENABLES_MASK 0x00003fff00000000
-
-/* ==================================================================== */
-/* Register "SH_FSB_VGA_REMAP" */
-/* FSB VGA Address Space Remap */
-/* ==================================================================== */
-
-#define SH_FSB_VGA_REMAP 0x0000000120010180
-#define SH_FSB_VGA_REMAP_MASK 0x4001fffffffe0000
-#define SH_FSB_VGA_REMAP_INIT 0x0000000000000000
-
-/* SH_FSB_VGA_REMAP_OFFSET */
-/* Description: VGA Remap Node Offset */
-#define SH_FSB_VGA_REMAP_OFFSET_SHFT 17
-#define SH_FSB_VGA_REMAP_OFFSET_MASK 0x0000000ffffe0000
-
-/* SH_FSB_VGA_REMAP_ASID */
-/* Description: VGA Remap Address Space ID */
-#define SH_FSB_VGA_REMAP_ASID_SHFT 36
-#define SH_FSB_VGA_REMAP_ASID_MASK 0x0000003000000000
-
-/* SH_FSB_VGA_REMAP_NID */
-/* Description: VGA Remap Node ID */
-#define SH_FSB_VGA_REMAP_NID_SHFT 38
-#define SH_FSB_VGA_REMAP_NID_MASK 0x0001ffc000000000
-
-/* SH_FSB_VGA_REMAP_VGA_REMAPPING_ENABLED */
-/* Description: VGA Remapping Enabled */
-#define SH_FSB_VGA_REMAP_VGA_REMAPPING_ENABLED_SHFT 62
-#define SH_FSB_VGA_REMAP_VGA_REMAPPING_ENABLED_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_FSB_RESET_STATUS" */
-/* FSB Reset Status */
-/* ==================================================================== */
-
-#define SH_FSB_RESET_STATUS 0x0000000120020000
-#define SH_FSB_RESET_STATUS_MASK 0x0000000000000001
-#define SH_FSB_RESET_STATUS_INIT 0x0000000000000000
-
-/* SH_FSB_RESET_STATUS_RESET_IN_PROGRESS */
-/* Description: Reset in Progress */
-#define SH_FSB_RESET_STATUS_RESET_IN_PROGRESS_SHFT 0
-#define SH_FSB_RESET_STATUS_RESET_IN_PROGRESS_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_FSB_SYMMETRIC_AGENT_STATUS" */
-/* FSB Symmetric Agent Status */
-/* ==================================================================== */
-
-#define SH_FSB_SYMMETRIC_AGENT_STATUS 0x0000000120020080
-#define SH_FSB_SYMMETRIC_AGENT_STATUS_MASK 0x0000000000000007
-#define SH_FSB_SYMMETRIC_AGENT_STATUS_INIT 0x0000000000000000
-
-/* SH_FSB_SYMMETRIC_AGENT_STATUS_CPU_0_ACTIVE */
-/* Description: CPU 0 Active. */
-#define SH_FSB_SYMMETRIC_AGENT_STATUS_CPU_0_ACTIVE_SHFT 0
-#define SH_FSB_SYMMETRIC_AGENT_STATUS_CPU_0_ACTIVE_MASK 0x0000000000000001
-
-/* SH_FSB_SYMMETRIC_AGENT_STATUS_CPU_1_ACTIVE */
-/* Description: CPU 1 Active. */
-#define SH_FSB_SYMMETRIC_AGENT_STATUS_CPU_1_ACTIVE_SHFT 1
-#define SH_FSB_SYMMETRIC_AGENT_STATUS_CPU_1_ACTIVE_MASK 0x0000000000000002
-
-/* SH_FSB_SYMMETRIC_AGENT_STATUS_CPUS_READY */
-/* Description: The Processors are Ready */
-#define SH_FSB_SYMMETRIC_AGENT_STATUS_CPUS_READY_SHFT 2
-#define SH_FSB_SYMMETRIC_AGENT_STATUS_CPUS_READY_MASK 0x0000000000000004
-
-/* ==================================================================== */
-/* Register "SH_GFX_CREDIT_COUNT_0" */
-/* Graphics-write Credit Count for CPU 0 */
-/* ==================================================================== */
-
-#define SH_GFX_CREDIT_COUNT_0 0x0000000120030000
-#define SH_GFX_CREDIT_COUNT_0_MASK 0x80000000000fffff
-#define SH_GFX_CREDIT_COUNT_0_INIT 0x000000000000003f
-
-/* SH_GFX_CREDIT_COUNT_0_COUNT */
-/* Description: Credit Count */
-#define SH_GFX_CREDIT_COUNT_0_COUNT_SHFT 0
-#define SH_GFX_CREDIT_COUNT_0_COUNT_MASK 0x00000000000fffff
-
-/* SH_GFX_CREDIT_COUNT_0_RESET_GFX_STATE */
-/* Description: Reset GFX state */
-#define SH_GFX_CREDIT_COUNT_0_RESET_GFX_STATE_SHFT 63
-#define SH_GFX_CREDIT_COUNT_0_RESET_GFX_STATE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_GFX_CREDIT_COUNT_1" */
-/* Graphics-write Credit Count for CPU 1 */
-/* ==================================================================== */
-
-#define SH_GFX_CREDIT_COUNT_1 0x0000000120030080
-#define SH_GFX_CREDIT_COUNT_1_MASK 0x80000000000fffff
-#define SH_GFX_CREDIT_COUNT_1_INIT 0x000000000000003f
-
-/* SH_GFX_CREDIT_COUNT_1_COUNT */
-/* Description: Credit Count */
-#define SH_GFX_CREDIT_COUNT_1_COUNT_SHFT 0
-#define SH_GFX_CREDIT_COUNT_1_COUNT_MASK 0x00000000000fffff
-
-/* SH_GFX_CREDIT_COUNT_1_RESET_GFX_STATE */
-/* Description: Reset GFX state */
-#define SH_GFX_CREDIT_COUNT_1_RESET_GFX_STATE_SHFT 63
-#define SH_GFX_CREDIT_COUNT_1_RESET_GFX_STATE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_GFX_MODE_CNTRL_0" */
-/* Graphics credit mode amd message ordering for CPU 0 */
-/* ==================================================================== */
-
-#define SH_GFX_MODE_CNTRL_0 0x0000000120030100
-#define SH_GFX_MODE_CNTRL_0_MASK 0x0000000000000007
-#define SH_GFX_MODE_CNTRL_0_INIT 0x0000000000000003
-
-/* SH_GFX_MODE_CNTRL_0_DWORD_CREDITS */
-/* Description: GFX credits are tracked by D-words */
-#define SH_GFX_MODE_CNTRL_0_DWORD_CREDITS_SHFT 0
-#define SH_GFX_MODE_CNTRL_0_DWORD_CREDITS_MASK 0x0000000000000001
-
-/* SH_GFX_MODE_CNTRL_0_MIXED_MODE_CREDITS */
-/* Description: GFX credits are tracked by D-words and messages */
-#define SH_GFX_MODE_CNTRL_0_MIXED_MODE_CREDITS_SHFT 1
-#define SH_GFX_MODE_CNTRL_0_MIXED_MODE_CREDITS_MASK 0x0000000000000002
-
-/* SH_GFX_MODE_CNTRL_0_RELAXED_ORDERING */
-/* Description: GFX message routing order */
-#define SH_GFX_MODE_CNTRL_0_RELAXED_ORDERING_SHFT 2
-#define SH_GFX_MODE_CNTRL_0_RELAXED_ORDERING_MASK 0x0000000000000004
-
-/* ==================================================================== */
-/* Register "SH_GFX_MODE_CNTRL_1" */
-/* Graphics credit mode amd message ordering for CPU 1 */
-/* ==================================================================== */
-
-#define SH_GFX_MODE_CNTRL_1 0x0000000120030180
-#define SH_GFX_MODE_CNTRL_1_MASK 0x0000000000000007
-#define SH_GFX_MODE_CNTRL_1_INIT 0x0000000000000003
-
-/* SH_GFX_MODE_CNTRL_1_DWORD_CREDITS */
-/* Description: GFX credits are tracked by D-words */
-#define SH_GFX_MODE_CNTRL_1_DWORD_CREDITS_SHFT 0
-#define SH_GFX_MODE_CNTRL_1_DWORD_CREDITS_MASK 0x0000000000000001
-
-/* SH_GFX_MODE_CNTRL_1_MIXED_MODE_CREDITS */
-/* Description: GFX credits are tracked by D-words and messages */
-#define SH_GFX_MODE_CNTRL_1_MIXED_MODE_CREDITS_SHFT 1
-#define SH_GFX_MODE_CNTRL_1_MIXED_MODE_CREDITS_MASK 0x0000000000000002
-
-/* SH_GFX_MODE_CNTRL_1_RELAXED_ORDERING */
-/* Description: GFX message routing order */
-#define SH_GFX_MODE_CNTRL_1_RELAXED_ORDERING_SHFT 2
-#define SH_GFX_MODE_CNTRL_1_RELAXED_ORDERING_MASK 0x0000000000000004
-
-/* ==================================================================== */
-/* Register "SH_GFX_SKID_CREDIT_COUNT_0" */
-/* Graphics-write Skid Credit Count for CPU 0 */
-/* ==================================================================== */
-
-#define SH_GFX_SKID_CREDIT_COUNT_0 0x0000000120030200
-#define SH_GFX_SKID_CREDIT_COUNT_0_MASK 0x00000000000fffff
-#define SH_GFX_SKID_CREDIT_COUNT_0_INIT 0x0000000000000030
-
-/* SH_GFX_SKID_CREDIT_COUNT_0_SKID */
-/* Description: Skid Credit Count */
-#define SH_GFX_SKID_CREDIT_COUNT_0_SKID_SHFT 0
-#define SH_GFX_SKID_CREDIT_COUNT_0_SKID_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_GFX_SKID_CREDIT_COUNT_1" */
-/* Graphics-write Skid Credit Count for CPU 1 */
-/* ==================================================================== */
-
-#define SH_GFX_SKID_CREDIT_COUNT_1 0x0000000120030280
-#define SH_GFX_SKID_CREDIT_COUNT_1_MASK 0x00000000000fffff
-#define SH_GFX_SKID_CREDIT_COUNT_1_INIT 0x0000000000000030
-
-/* SH_GFX_SKID_CREDIT_COUNT_1_SKID */
-/* Description: Skid Credit Count */
-#define SH_GFX_SKID_CREDIT_COUNT_1_SKID_SHFT 0
-#define SH_GFX_SKID_CREDIT_COUNT_1_SKID_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_GFX_STALL_LIMIT_0" */
-/* Graphics-write Stall Limit for CPU 0 */
-/* ==================================================================== */
-
-#define SH_GFX_STALL_LIMIT_0 0x0000000120030300
-#define SH_GFX_STALL_LIMIT_0_MASK 0x0000000003ffffff
-#define SH_GFX_STALL_LIMIT_0_INIT 0x0000000000010000
-
-/* SH_GFX_STALL_LIMIT_0_LIMIT */
-/* Description: Graphics Stall Limit for CPU 0 */
-#define SH_GFX_STALL_LIMIT_0_LIMIT_SHFT 0
-#define SH_GFX_STALL_LIMIT_0_LIMIT_MASK 0x0000000003ffffff
-
-/* ==================================================================== */
-/* Register "SH_GFX_STALL_LIMIT_1" */
-/* Graphics-write Stall Limit for CPU 1 */
-/* ==================================================================== */
-
-#define SH_GFX_STALL_LIMIT_1 0x0000000120030380
-#define SH_GFX_STALL_LIMIT_1_MASK 0x0000000003ffffff
-#define SH_GFX_STALL_LIMIT_1_INIT 0x0000000000010000
-
-/* SH_GFX_STALL_LIMIT_1_LIMIT */
-/* Description: Graphics Stall Limit for CPU 1 */
-#define SH_GFX_STALL_LIMIT_1_LIMIT_SHFT 0
-#define SH_GFX_STALL_LIMIT_1_LIMIT_MASK 0x0000000003ffffff
-
-/* ==================================================================== */
-/* Register "SH_GFX_STALL_TIMER_0" */
-/* Graphics-write Stall Timer for CPU 0 */
-/* ==================================================================== */
-
-#define SH_GFX_STALL_TIMER_0 0x0000000120030400
-#define SH_GFX_STALL_TIMER_0_MASK 0x0000000003ffffff
-#define SH_GFX_STALL_TIMER_0_INIT 0x0000000000000000
-
-/* SH_GFX_STALL_TIMER_0_TIMER_VALUE */
-/* Description: Timer Value */
-#define SH_GFX_STALL_TIMER_0_TIMER_VALUE_SHFT 0
-#define SH_GFX_STALL_TIMER_0_TIMER_VALUE_MASK 0x0000000003ffffff
-
-/* ==================================================================== */
-/* Register "SH_GFX_STALL_TIMER_1" */
-/* Graphics-write Stall Timer for CPU 1 */
-/* ==================================================================== */
-
-#define SH_GFX_STALL_TIMER_1 0x0000000120030480
-#define SH_GFX_STALL_TIMER_1_MASK 0x0000000003ffffff
-#define SH_GFX_STALL_TIMER_1_INIT 0x0000000000000000
-
-/* SH_GFX_STALL_TIMER_1_TIMER_VALUE */
-/* Description: Timer Value */
-#define SH_GFX_STALL_TIMER_1_TIMER_VALUE_SHFT 0
-#define SH_GFX_STALL_TIMER_1_TIMER_VALUE_MASK 0x0000000003ffffff
-
-/* ==================================================================== */
-/* Register "SH_GFX_WINDOW_0" */
-/* Graphics-write Window for CPU 0 */
-/* ==================================================================== */
-
-#define SH_GFX_WINDOW_0 0x0000000120030500
-#define SH_GFX_WINDOW_0_MASK 0x8000000fff000000
-#define SH_GFX_WINDOW_0_INIT 0x0000000000000000
-
-/* SH_GFX_WINDOW_0_BASE_ADDR */
-/* Description: Base Address for CPU 0's 16 MB Graphics Window */
-#define SH_GFX_WINDOW_0_BASE_ADDR_SHFT 24
-#define SH_GFX_WINDOW_0_BASE_ADDR_MASK 0x0000000fff000000
-
-/* SH_GFX_WINDOW_0_GFX_WINDOW_EN */
-/* Description: Graphics Window Enabled */
-#define SH_GFX_WINDOW_0_GFX_WINDOW_EN_SHFT 63
-#define SH_GFX_WINDOW_0_GFX_WINDOW_EN_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_GFX_WINDOW_1" */
-/* Graphics-write Window for CPU 1 */
-/* ==================================================================== */
-
-#define SH_GFX_WINDOW_1 0x0000000120030580
-#define SH_GFX_WINDOW_1_MASK 0x8000000fff000000
-#define SH_GFX_WINDOW_1_INIT 0x0000000000000000
-
-/* SH_GFX_WINDOW_1_BASE_ADDR */
-/* Description: Base Address for CPU 1's 16 MB Graphics Window */
-#define SH_GFX_WINDOW_1_BASE_ADDR_SHFT 24
-#define SH_GFX_WINDOW_1_BASE_ADDR_MASK 0x0000000fff000000
-
-/* SH_GFX_WINDOW_1_GFX_WINDOW_EN */
-/* Description: Graphics Window Enabled */
-#define SH_GFX_WINDOW_1_GFX_WINDOW_EN_SHFT 63
-#define SH_GFX_WINDOW_1_GFX_WINDOW_EN_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_GFX_INTERRUPT_TIMER_LIMIT_0" */
-/* Graphics-write Interrupt Limit for CPU 0 */
-/* ==================================================================== */
-
-#define SH_GFX_INTERRUPT_TIMER_LIMIT_0 0x0000000120030600
-#define SH_GFX_INTERRUPT_TIMER_LIMIT_0_MASK 0x00000000000000ff
-#define SH_GFX_INTERRUPT_TIMER_LIMIT_0_INIT 0x0000000000000040
-
-/* SH_GFX_INTERRUPT_TIMER_LIMIT_0_INTERRUPT_TIMER_LIMIT */
-/* Description: GFX Interrupt Timer Limit */
-#define SH_GFX_INTERRUPT_TIMER_LIMIT_0_INTERRUPT_TIMER_LIMIT_SHFT 0
-#define SH_GFX_INTERRUPT_TIMER_LIMIT_0_INTERRUPT_TIMER_LIMIT_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_GFX_INTERRUPT_TIMER_LIMIT_1" */
-/* Graphics-write Interrupt Limit for CPU 1 */
-/* ==================================================================== */
-
-#define SH_GFX_INTERRUPT_TIMER_LIMIT_1 0x0000000120030680
-#define SH_GFX_INTERRUPT_TIMER_LIMIT_1_MASK 0x00000000000000ff
-#define SH_GFX_INTERRUPT_TIMER_LIMIT_1_INIT 0x0000000000000040
-
-/* SH_GFX_INTERRUPT_TIMER_LIMIT_1_INTERRUPT_TIMER_LIMIT */
-/* Description: GFX Interrupt Timer Limit */
-#define SH_GFX_INTERRUPT_TIMER_LIMIT_1_INTERRUPT_TIMER_LIMIT_SHFT 0
-#define SH_GFX_INTERRUPT_TIMER_LIMIT_1_INTERRUPT_TIMER_LIMIT_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_GFX_WRITE_STATUS_0" */
-/* Graphics Write Status for CPU 0 */
-/* ==================================================================== */
-
-#define SH_GFX_WRITE_STATUS_0 0x0000000120040000
-#define SH_GFX_WRITE_STATUS_0_MASK 0x8000000000000001
-#define SH_GFX_WRITE_STATUS_0_INIT 0x0000000000000000
-
-/* SH_GFX_WRITE_STATUS_0_BUSY */
-/* Description: Busy */
-#define SH_GFX_WRITE_STATUS_0_BUSY_SHFT 0
-#define SH_GFX_WRITE_STATUS_0_BUSY_MASK 0x0000000000000001
-
-/* SH_GFX_WRITE_STATUS_0_RE_ENABLE_GFX_STALL */
-/* Description: Re-enable GFX stall logic for this processor */
-#define SH_GFX_WRITE_STATUS_0_RE_ENABLE_GFX_STALL_SHFT 63
-#define SH_GFX_WRITE_STATUS_0_RE_ENABLE_GFX_STALL_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_GFX_WRITE_STATUS_1" */
-/* Graphics Write Status for CPU 1 */
-/* ==================================================================== */
-
-#define SH_GFX_WRITE_STATUS_1 0x0000000120040080
-#define SH_GFX_WRITE_STATUS_1_MASK 0x8000000000000001
-#define SH_GFX_WRITE_STATUS_1_INIT 0x0000000000000000
-
-/* SH_GFX_WRITE_STATUS_1_BUSY */
-/* Description: Busy */
-#define SH_GFX_WRITE_STATUS_1_BUSY_SHFT 0
-#define SH_GFX_WRITE_STATUS_1_BUSY_MASK 0x0000000000000001
-
-/* SH_GFX_WRITE_STATUS_1_RE_ENABLE_GFX_STALL */
-/* Description: Re-enable GFX stall logic for this processor */
-#define SH_GFX_WRITE_STATUS_1_RE_ENABLE_GFX_STALL_SHFT 63
-#define SH_GFX_WRITE_STATUS_1_RE_ENABLE_GFX_STALL_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_II_INT0" */
-/* SHub II Interrupt 0 Registers */
-/* ==================================================================== */
-
-#define SH_II_INT0 0x0000000110000000
-#define SH_II_INT0_MASK 0x00000000000001ff
-#define SH_II_INT0_INIT 0x0000000000000000
-
-/* SH_II_INT0_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_II_INT0_IDX_SHFT 0
-#define SH_II_INT0_IDX_MASK 0x00000000000000ff
-
-/* SH_II_INT0_SEND */
-/* Description: Send Interrupt Message to PI, This generates a puls */
-#define SH_II_INT0_SEND_SHFT 8
-#define SH_II_INT0_SEND_MASK 0x0000000000000100
-
-/* ==================================================================== */
-/* Register "SH_II_INT0_CONFIG" */
-/* SHub II Interrupt 0 Config Registers */
-/* ==================================================================== */
-
-#define SH_II_INT0_CONFIG 0x0000000110000080
-#define SH_II_INT0_CONFIG_MASK 0x0003ffffffefffff
-#define SH_II_INT0_CONFIG_INIT 0x0000000000000000
-
-/* SH_II_INT0_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_II_INT0_CONFIG_TYPE_SHFT 0
-#define SH_II_INT0_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_II_INT0_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_II_INT0_CONFIG_AGT_SHFT 3
-#define SH_II_INT0_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_II_INT0_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_II_INT0_CONFIG_PID_SHFT 4
-#define SH_II_INT0_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_II_INT0_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_II_INT0_CONFIG_BASE_SHFT 21
-#define SH_II_INT0_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* ==================================================================== */
-/* Register "SH_II_INT0_ENABLE" */
-/* SHub II Interrupt 0 Enable Registers */
-/* ==================================================================== */
-
-#define SH_II_INT0_ENABLE 0x0000000110000200
-#define SH_II_INT0_ENABLE_MASK 0x0000000000000001
-#define SH_II_INT0_ENABLE_INIT 0x0000000000000000
-
-/* SH_II_INT0_ENABLE_II_ENABLE */
-/* Description: Enable II Interrupt */
-#define SH_II_INT0_ENABLE_II_ENABLE_SHFT 0
-#define SH_II_INT0_ENABLE_II_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_II_INT1" */
-/* SHub II Interrupt 1 Registers */
-/* ==================================================================== */
-
-#define SH_II_INT1 0x0000000110000100
-#define SH_II_INT1_MASK 0x00000000000001ff
-#define SH_II_INT1_INIT 0x0000000000000000
-
-/* SH_II_INT1_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_II_INT1_IDX_SHFT 0
-#define SH_II_INT1_IDX_MASK 0x00000000000000ff
-
-/* SH_II_INT1_SEND */
-/* Description: Send Interrupt Message to PI, This generates a puls */
-#define SH_II_INT1_SEND_SHFT 8
-#define SH_II_INT1_SEND_MASK 0x0000000000000100
-
-/* ==================================================================== */
-/* Register "SH_II_INT1_CONFIG" */
-/* SHub II Interrupt 1 Config Registers */
-/* ==================================================================== */
-
-#define SH_II_INT1_CONFIG 0x0000000110000180
-#define SH_II_INT1_CONFIG_MASK 0x0003ffffffefffff
-#define SH_II_INT1_CONFIG_INIT 0x0000000000000000
-
-/* SH_II_INT1_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_II_INT1_CONFIG_TYPE_SHFT 0
-#define SH_II_INT1_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_II_INT1_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_II_INT1_CONFIG_AGT_SHFT 3
-#define SH_II_INT1_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_II_INT1_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_II_INT1_CONFIG_PID_SHFT 4
-#define SH_II_INT1_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_II_INT1_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_II_INT1_CONFIG_BASE_SHFT 21
-#define SH_II_INT1_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* ==================================================================== */
-/* Register "SH_II_INT1_ENABLE" */
-/* SHub II Interrupt 1 Enable Registers */
-/* ==================================================================== */
-
-#define SH_II_INT1_ENABLE 0x0000000110000280
-#define SH_II_INT1_ENABLE_MASK 0x0000000000000001
-#define SH_II_INT1_ENABLE_INIT 0x0000000000000000
-
-/* SH_II_INT1_ENABLE_II_ENABLE */
-/* Description: Enable II 1 Interrupt */
-#define SH_II_INT1_ENABLE_II_ENABLE_SHFT 0
-#define SH_II_INT1_ENABLE_II_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_INT_NODE_ID_CONFIG" */
-/* SHub Interrupt Node ID Configuration */
-/* ==================================================================== */
-
-#define SH_INT_NODE_ID_CONFIG 0x0000000110000300
-#define SH_INT_NODE_ID_CONFIG_MASK 0x0000000000000fff
-#define SH_INT_NODE_ID_CONFIG_INIT 0x0000000000000000
-
-/* SH_INT_NODE_ID_CONFIG_NODE_ID */
-/* Description: Node ID for interrupt messages */
-#define SH_INT_NODE_ID_CONFIG_NODE_ID_SHFT 0
-#define SH_INT_NODE_ID_CONFIG_NODE_ID_MASK 0x00000000000007ff
-
-/* SH_INT_NODE_ID_CONFIG_ID_SEL */
-/* Description: Select node id for interrupt messages */
-#define SH_INT_NODE_ID_CONFIG_ID_SEL_SHFT 11
-#define SH_INT_NODE_ID_CONFIG_ID_SEL_MASK 0x0000000000000800
-
-/* ==================================================================== */
-/* Register "SH_IPI_INT" */
-/* SHub Inter-Processor Interrupt Registers */
-/* ==================================================================== */
-
-#define SH_IPI_INT 0x0000000110000380
-#define SH_IPI_INT_MASK 0x8ff3ffffffefffff
-#define SH_IPI_INT_INIT 0x0000000000000000
-
-/* SH_IPI_INT_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_IPI_INT_TYPE_SHFT 0
-#define SH_IPI_INT_TYPE_MASK 0x0000000000000007
-
-/* SH_IPI_INT_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_IPI_INT_AGT_SHFT 3
-#define SH_IPI_INT_AGT_MASK 0x0000000000000008
-
-/* SH_IPI_INT_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_IPI_INT_PID_SHFT 4
-#define SH_IPI_INT_PID_MASK 0x00000000000ffff0
-
-/* SH_IPI_INT_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_IPI_INT_BASE_SHFT 21
-#define SH_IPI_INT_BASE_MASK 0x0003ffffffe00000
-
-/* SH_IPI_INT_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_IPI_INT_IDX_SHFT 52
-#define SH_IPI_INT_IDX_MASK 0x0ff0000000000000
-
-/* SH_IPI_INT_SEND */
-/* Description: Send Interrupt Message to PI, This generates a puls */
-#define SH_IPI_INT_SEND_SHFT 63
-#define SH_IPI_INT_SEND_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_IPI_INT_ENABLE" */
-/* SHub Inter-Processor Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_IPI_INT_ENABLE 0x0000000110000400
-#define SH_IPI_INT_ENABLE_MASK 0x0000000000000001
-#define SH_IPI_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_IPI_INT_ENABLE_PIO_ENABLE */
-/* Description: Enable PIO Interrupt */
-#define SH_IPI_INT_ENABLE_PIO_ENABLE_SHFT 0
-#define SH_IPI_INT_ENABLE_PIO_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT0_CONFIG" */
-/* SHub Local Interrupt 0 Registers */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT0_CONFIG 0x0000000110000480
-#define SH_LOCAL_INT0_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_LOCAL_INT0_CONFIG_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT0_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_LOCAL_INT0_CONFIG_TYPE_SHFT 0
-#define SH_LOCAL_INT0_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_LOCAL_INT0_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_LOCAL_INT0_CONFIG_AGT_SHFT 3
-#define SH_LOCAL_INT0_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT0_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_LOCAL_INT0_CONFIG_PID_SHFT 4
-#define SH_LOCAL_INT0_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_LOCAL_INT0_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_LOCAL_INT0_CONFIG_BASE_SHFT 21
-#define SH_LOCAL_INT0_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_LOCAL_INT0_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_LOCAL_INT0_CONFIG_IDX_SHFT 52
-#define SH_LOCAL_INT0_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT0_ENABLE" */
-/* SHub Local Interrupt 0 Enable */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT0_ENABLE 0x0000000110000500
-#define SH_LOCAL_INT0_ENABLE_MASK 0x000000000000f7ff
-#define SH_LOCAL_INT0_ENABLE_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT0_ENABLE_PI_HW_INT */
-/* Description: Enable PI Hardware interrupt */
-#define SH_LOCAL_INT0_ENABLE_PI_HW_INT_SHFT 0
-#define SH_LOCAL_INT0_ENABLE_PI_HW_INT_MASK 0x0000000000000001
-
-/* SH_LOCAL_INT0_ENABLE_MD_HW_INT */
-/* Description: Enable MD Hardware interrupt */
-#define SH_LOCAL_INT0_ENABLE_MD_HW_INT_SHFT 1
-#define SH_LOCAL_INT0_ENABLE_MD_HW_INT_MASK 0x0000000000000002
-
-/* SH_LOCAL_INT0_ENABLE_XN_HW_INT */
-/* Description: Enable XN Hardware interrupt */
-#define SH_LOCAL_INT0_ENABLE_XN_HW_INT_SHFT 2
-#define SH_LOCAL_INT0_ENABLE_XN_HW_INT_MASK 0x0000000000000004
-
-/* SH_LOCAL_INT0_ENABLE_LB_HW_INT */
-/* Description: Enable LB Hardware interrupt */
-#define SH_LOCAL_INT0_ENABLE_LB_HW_INT_SHFT 3
-#define SH_LOCAL_INT0_ENABLE_LB_HW_INT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT0_ENABLE_II_HW_INT */
-/* Description: Enable II wrapper Hardware interrupt */
-#define SH_LOCAL_INT0_ENABLE_II_HW_INT_SHFT 4
-#define SH_LOCAL_INT0_ENABLE_II_HW_INT_MASK 0x0000000000000010
-
-/* SH_LOCAL_INT0_ENABLE_PI_CE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT0_ENABLE_PI_CE_INT_SHFT 5
-#define SH_LOCAL_INT0_ENABLE_PI_CE_INT_MASK 0x0000000000000020
-
-/* SH_LOCAL_INT0_ENABLE_MD_CE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT0_ENABLE_MD_CE_INT_SHFT 6
-#define SH_LOCAL_INT0_ENABLE_MD_CE_INT_MASK 0x0000000000000040
-
-/* SH_LOCAL_INT0_ENABLE_XN_CE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT0_ENABLE_XN_CE_INT_SHFT 7
-#define SH_LOCAL_INT0_ENABLE_XN_CE_INT_MASK 0x0000000000000080
-
-/* SH_LOCAL_INT0_ENABLE_PI_UCE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT0_ENABLE_PI_UCE_INT_SHFT 8
-#define SH_LOCAL_INT0_ENABLE_PI_UCE_INT_MASK 0x0000000000000100
-
-/* SH_LOCAL_INT0_ENABLE_MD_UCE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT0_ENABLE_MD_UCE_INT_SHFT 9
-#define SH_LOCAL_INT0_ENABLE_MD_UCE_INT_MASK 0x0000000000000200
-
-/* SH_LOCAL_INT0_ENABLE_XN_UCE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT0_ENABLE_XN_UCE_INT_SHFT 10
-#define SH_LOCAL_INT0_ENABLE_XN_UCE_INT_MASK 0x0000000000000400
-
-/* SH_LOCAL_INT0_ENABLE_SYSTEM_SHUTDOWN_INT */
-/* Description: Enable System Shutdown Interrupt */
-#define SH_LOCAL_INT0_ENABLE_SYSTEM_SHUTDOWN_INT_SHFT 12
-#define SH_LOCAL_INT0_ENABLE_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000001000
-
-/* SH_LOCAL_INT0_ENABLE_UART_INT */
-/* Description: Enable Junk Bus UART Interrupt */
-#define SH_LOCAL_INT0_ENABLE_UART_INT_SHFT 13
-#define SH_LOCAL_INT0_ENABLE_UART_INT_MASK 0x0000000000002000
-
-/* SH_LOCAL_INT0_ENABLE_L1_NMI_INT */
-/* Description: Enable L1 Controller NMI Interrupt */
-#define SH_LOCAL_INT0_ENABLE_L1_NMI_INT_SHFT 14
-#define SH_LOCAL_INT0_ENABLE_L1_NMI_INT_MASK 0x0000000000004000
-
-/* SH_LOCAL_INT0_ENABLE_STOP_CLOCK */
-/* Description: Stop Clock Interrupt */
-#define SH_LOCAL_INT0_ENABLE_STOP_CLOCK_SHFT 15
-#define SH_LOCAL_INT0_ENABLE_STOP_CLOCK_MASK 0x0000000000008000
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT1_CONFIG" */
-/* SHub Local Interrupt 1 Registers */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT1_CONFIG 0x0000000110000580
-#define SH_LOCAL_INT1_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_LOCAL_INT1_CONFIG_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT1_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_LOCAL_INT1_CONFIG_TYPE_SHFT 0
-#define SH_LOCAL_INT1_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_LOCAL_INT1_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_LOCAL_INT1_CONFIG_AGT_SHFT 3
-#define SH_LOCAL_INT1_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT1_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_LOCAL_INT1_CONFIG_PID_SHFT 4
-#define SH_LOCAL_INT1_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_LOCAL_INT1_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_LOCAL_INT1_CONFIG_BASE_SHFT 21
-#define SH_LOCAL_INT1_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_LOCAL_INT1_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_LOCAL_INT1_CONFIG_IDX_SHFT 52
-#define SH_LOCAL_INT1_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT1_ENABLE" */
-/* SHub Local Interrupt 1 Enable */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT1_ENABLE 0x0000000110000600
-#define SH_LOCAL_INT1_ENABLE_MASK 0x000000000000f7ff
-#define SH_LOCAL_INT1_ENABLE_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT1_ENABLE_PI_HW_INT */
-/* Description: Enable PI Hardware interrupt */
-#define SH_LOCAL_INT1_ENABLE_PI_HW_INT_SHFT 0
-#define SH_LOCAL_INT1_ENABLE_PI_HW_INT_MASK 0x0000000000000001
-
-/* SH_LOCAL_INT1_ENABLE_MD_HW_INT */
-/* Description: Enable MD Hardware interrupt */
-#define SH_LOCAL_INT1_ENABLE_MD_HW_INT_SHFT 1
-#define SH_LOCAL_INT1_ENABLE_MD_HW_INT_MASK 0x0000000000000002
-
-/* SH_LOCAL_INT1_ENABLE_XN_HW_INT */
-/* Description: Enable XN Hardware interrupt */
-#define SH_LOCAL_INT1_ENABLE_XN_HW_INT_SHFT 2
-#define SH_LOCAL_INT1_ENABLE_XN_HW_INT_MASK 0x0000000000000004
-
-/* SH_LOCAL_INT1_ENABLE_LB_HW_INT */
-/* Description: Enable LB Hardware interrupt */
-#define SH_LOCAL_INT1_ENABLE_LB_HW_INT_SHFT 3
-#define SH_LOCAL_INT1_ENABLE_LB_HW_INT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT1_ENABLE_II_HW_INT */
-/* Description: Enable II wrapper Hardware interrupt */
-#define SH_LOCAL_INT1_ENABLE_II_HW_INT_SHFT 4
-#define SH_LOCAL_INT1_ENABLE_II_HW_INT_MASK 0x0000000000000010
-
-/* SH_LOCAL_INT1_ENABLE_PI_CE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT1_ENABLE_PI_CE_INT_SHFT 5
-#define SH_LOCAL_INT1_ENABLE_PI_CE_INT_MASK 0x0000000000000020
-
-/* SH_LOCAL_INT1_ENABLE_MD_CE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT1_ENABLE_MD_CE_INT_SHFT 6
-#define SH_LOCAL_INT1_ENABLE_MD_CE_INT_MASK 0x0000000000000040
-
-/* SH_LOCAL_INT1_ENABLE_XN_CE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT1_ENABLE_XN_CE_INT_SHFT 7
-#define SH_LOCAL_INT1_ENABLE_XN_CE_INT_MASK 0x0000000000000080
-
-/* SH_LOCAL_INT1_ENABLE_PI_UCE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT1_ENABLE_PI_UCE_INT_SHFT 8
-#define SH_LOCAL_INT1_ENABLE_PI_UCE_INT_MASK 0x0000000000000100
-
-/* SH_LOCAL_INT1_ENABLE_MD_UCE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT1_ENABLE_MD_UCE_INT_SHFT 9
-#define SH_LOCAL_INT1_ENABLE_MD_UCE_INT_MASK 0x0000000000000200
-
-/* SH_LOCAL_INT1_ENABLE_XN_UCE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT1_ENABLE_XN_UCE_INT_SHFT 10
-#define SH_LOCAL_INT1_ENABLE_XN_UCE_INT_MASK 0x0000000000000400
-
-/* SH_LOCAL_INT1_ENABLE_SYSTEM_SHUTDOWN_INT */
-/* Description: Enable System Shutdown Interrupt */
-#define SH_LOCAL_INT1_ENABLE_SYSTEM_SHUTDOWN_INT_SHFT 12
-#define SH_LOCAL_INT1_ENABLE_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000001000
-
-/* SH_LOCAL_INT1_ENABLE_UART_INT */
-/* Description: Enable Junk Bus UART Interrupt */
-#define SH_LOCAL_INT1_ENABLE_UART_INT_SHFT 13
-#define SH_LOCAL_INT1_ENABLE_UART_INT_MASK 0x0000000000002000
-
-/* SH_LOCAL_INT1_ENABLE_L1_NMI_INT */
-/* Description: Enable L1 Controller NMI Interrupt */
-#define SH_LOCAL_INT1_ENABLE_L1_NMI_INT_SHFT 14
-#define SH_LOCAL_INT1_ENABLE_L1_NMI_INT_MASK 0x0000000000004000
-
-/* SH_LOCAL_INT1_ENABLE_STOP_CLOCK */
-/* Description: Stop Clock Interrupt */
-#define SH_LOCAL_INT1_ENABLE_STOP_CLOCK_SHFT 15
-#define SH_LOCAL_INT1_ENABLE_STOP_CLOCK_MASK 0x0000000000008000
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT2_CONFIG" */
-/* SHub Local Interrupt 2 Registers */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT2_CONFIG 0x0000000110000680
-#define SH_LOCAL_INT2_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_LOCAL_INT2_CONFIG_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT2_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_LOCAL_INT2_CONFIG_TYPE_SHFT 0
-#define SH_LOCAL_INT2_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_LOCAL_INT2_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_LOCAL_INT2_CONFIG_AGT_SHFT 3
-#define SH_LOCAL_INT2_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT2_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_LOCAL_INT2_CONFIG_PID_SHFT 4
-#define SH_LOCAL_INT2_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_LOCAL_INT2_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_LOCAL_INT2_CONFIG_BASE_SHFT 21
-#define SH_LOCAL_INT2_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_LOCAL_INT2_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_LOCAL_INT2_CONFIG_IDX_SHFT 52
-#define SH_LOCAL_INT2_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT2_ENABLE" */
-/* SHub Local Interrupt 2 Enable */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT2_ENABLE 0x0000000110000700
-#define SH_LOCAL_INT2_ENABLE_MASK 0x000000000000f7ff
-#define SH_LOCAL_INT2_ENABLE_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT2_ENABLE_PI_HW_INT */
-/* Description: Enable PI Hardware interrupt */
-#define SH_LOCAL_INT2_ENABLE_PI_HW_INT_SHFT 0
-#define SH_LOCAL_INT2_ENABLE_PI_HW_INT_MASK 0x0000000000000001
-
-/* SH_LOCAL_INT2_ENABLE_MD_HW_INT */
-/* Description: Enable MD Hardware interrupt */
-#define SH_LOCAL_INT2_ENABLE_MD_HW_INT_SHFT 1
-#define SH_LOCAL_INT2_ENABLE_MD_HW_INT_MASK 0x0000000000000002
-
-/* SH_LOCAL_INT2_ENABLE_XN_HW_INT */
-/* Description: Enable XN Hardware interrupt */
-#define SH_LOCAL_INT2_ENABLE_XN_HW_INT_SHFT 2
-#define SH_LOCAL_INT2_ENABLE_XN_HW_INT_MASK 0x0000000000000004
-
-/* SH_LOCAL_INT2_ENABLE_LB_HW_INT */
-/* Description: Enable LB Hardware interrupt */
-#define SH_LOCAL_INT2_ENABLE_LB_HW_INT_SHFT 3
-#define SH_LOCAL_INT2_ENABLE_LB_HW_INT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT2_ENABLE_II_HW_INT */
-/* Description: Enable II wrapper Hardware interrupt */
-#define SH_LOCAL_INT2_ENABLE_II_HW_INT_SHFT 4
-#define SH_LOCAL_INT2_ENABLE_II_HW_INT_MASK 0x0000000000000010
-
-/* SH_LOCAL_INT2_ENABLE_PI_CE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT2_ENABLE_PI_CE_INT_SHFT 5
-#define SH_LOCAL_INT2_ENABLE_PI_CE_INT_MASK 0x0000000000000020
-
-/* SH_LOCAL_INT2_ENABLE_MD_CE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT2_ENABLE_MD_CE_INT_SHFT 6
-#define SH_LOCAL_INT2_ENABLE_MD_CE_INT_MASK 0x0000000000000040
-
-/* SH_LOCAL_INT2_ENABLE_XN_CE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT2_ENABLE_XN_CE_INT_SHFT 7
-#define SH_LOCAL_INT2_ENABLE_XN_CE_INT_MASK 0x0000000000000080
-
-/* SH_LOCAL_INT2_ENABLE_PI_UCE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT2_ENABLE_PI_UCE_INT_SHFT 8
-#define SH_LOCAL_INT2_ENABLE_PI_UCE_INT_MASK 0x0000000000000100
-
-/* SH_LOCAL_INT2_ENABLE_MD_UCE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT2_ENABLE_MD_UCE_INT_SHFT 9
-#define SH_LOCAL_INT2_ENABLE_MD_UCE_INT_MASK 0x0000000000000200
-
-/* SH_LOCAL_INT2_ENABLE_XN_UCE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT2_ENABLE_XN_UCE_INT_SHFT 10
-#define SH_LOCAL_INT2_ENABLE_XN_UCE_INT_MASK 0x0000000000000400
-
-/* SH_LOCAL_INT2_ENABLE_SYSTEM_SHUTDOWN_INT */
-/* Description: Enable System Shutdown Interrupt */
-#define SH_LOCAL_INT2_ENABLE_SYSTEM_SHUTDOWN_INT_SHFT 12
-#define SH_LOCAL_INT2_ENABLE_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000001000
-
-/* SH_LOCAL_INT2_ENABLE_UART_INT */
-/* Description: Enable Junk Bus UART Interrupt */
-#define SH_LOCAL_INT2_ENABLE_UART_INT_SHFT 13
-#define SH_LOCAL_INT2_ENABLE_UART_INT_MASK 0x0000000000002000
-
-/* SH_LOCAL_INT2_ENABLE_L1_NMI_INT */
-/* Description: Enable L1 Controller NMI Interrupt */
-#define SH_LOCAL_INT2_ENABLE_L1_NMI_INT_SHFT 14
-#define SH_LOCAL_INT2_ENABLE_L1_NMI_INT_MASK 0x0000000000004000
-
-/* SH_LOCAL_INT2_ENABLE_STOP_CLOCK */
-/* Description: Stop Clock Interrupt */
-#define SH_LOCAL_INT2_ENABLE_STOP_CLOCK_SHFT 15
-#define SH_LOCAL_INT2_ENABLE_STOP_CLOCK_MASK 0x0000000000008000
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT3_CONFIG" */
-/* SHub Local Interrupt 3 Registers */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT3_CONFIG 0x0000000110000780
-#define SH_LOCAL_INT3_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_LOCAL_INT3_CONFIG_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT3_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_LOCAL_INT3_CONFIG_TYPE_SHFT 0
-#define SH_LOCAL_INT3_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_LOCAL_INT3_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_LOCAL_INT3_CONFIG_AGT_SHFT 3
-#define SH_LOCAL_INT3_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT3_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_LOCAL_INT3_CONFIG_PID_SHFT 4
-#define SH_LOCAL_INT3_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_LOCAL_INT3_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_LOCAL_INT3_CONFIG_BASE_SHFT 21
-#define SH_LOCAL_INT3_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_LOCAL_INT3_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_LOCAL_INT3_CONFIG_IDX_SHFT 52
-#define SH_LOCAL_INT3_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT3_ENABLE" */
-/* SHub Local Interrupt 3 Enable */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT3_ENABLE 0x0000000110000800
-#define SH_LOCAL_INT3_ENABLE_MASK 0x000000000000f7ff
-#define SH_LOCAL_INT3_ENABLE_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT3_ENABLE_PI_HW_INT */
-/* Description: Enable PI Hardware interrupt */
-#define SH_LOCAL_INT3_ENABLE_PI_HW_INT_SHFT 0
-#define SH_LOCAL_INT3_ENABLE_PI_HW_INT_MASK 0x0000000000000001
-
-/* SH_LOCAL_INT3_ENABLE_MD_HW_INT */
-/* Description: Enable MD Hardware interrupt */
-#define SH_LOCAL_INT3_ENABLE_MD_HW_INT_SHFT 1
-#define SH_LOCAL_INT3_ENABLE_MD_HW_INT_MASK 0x0000000000000002
-
-/* SH_LOCAL_INT3_ENABLE_XN_HW_INT */
-/* Description: Enable XN Hardware interrupt */
-#define SH_LOCAL_INT3_ENABLE_XN_HW_INT_SHFT 2
-#define SH_LOCAL_INT3_ENABLE_XN_HW_INT_MASK 0x0000000000000004
-
-/* SH_LOCAL_INT3_ENABLE_LB_HW_INT */
-/* Description: Enable LB Hardware interrupt */
-#define SH_LOCAL_INT3_ENABLE_LB_HW_INT_SHFT 3
-#define SH_LOCAL_INT3_ENABLE_LB_HW_INT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT3_ENABLE_II_HW_INT */
-/* Description: Enable II wrapper Hardware interrupt */
-#define SH_LOCAL_INT3_ENABLE_II_HW_INT_SHFT 4
-#define SH_LOCAL_INT3_ENABLE_II_HW_INT_MASK 0x0000000000000010
-
-/* SH_LOCAL_INT3_ENABLE_PI_CE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT3_ENABLE_PI_CE_INT_SHFT 5
-#define SH_LOCAL_INT3_ENABLE_PI_CE_INT_MASK 0x0000000000000020
-
-/* SH_LOCAL_INT3_ENABLE_MD_CE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT3_ENABLE_MD_CE_INT_SHFT 6
-#define SH_LOCAL_INT3_ENABLE_MD_CE_INT_MASK 0x0000000000000040
-
-/* SH_LOCAL_INT3_ENABLE_XN_CE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT3_ENABLE_XN_CE_INT_SHFT 7
-#define SH_LOCAL_INT3_ENABLE_XN_CE_INT_MASK 0x0000000000000080
-
-/* SH_LOCAL_INT3_ENABLE_PI_UCE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT3_ENABLE_PI_UCE_INT_SHFT 8
-#define SH_LOCAL_INT3_ENABLE_PI_UCE_INT_MASK 0x0000000000000100
-
-/* SH_LOCAL_INT3_ENABLE_MD_UCE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT3_ENABLE_MD_UCE_INT_SHFT 9
-#define SH_LOCAL_INT3_ENABLE_MD_UCE_INT_MASK 0x0000000000000200
-
-/* SH_LOCAL_INT3_ENABLE_XN_UCE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT3_ENABLE_XN_UCE_INT_SHFT 10
-#define SH_LOCAL_INT3_ENABLE_XN_UCE_INT_MASK 0x0000000000000400
-
-/* SH_LOCAL_INT3_ENABLE_SYSTEM_SHUTDOWN_INT */
-/* Description: Enable System Shutdown Interrupt */
-#define SH_LOCAL_INT3_ENABLE_SYSTEM_SHUTDOWN_INT_SHFT 12
-#define SH_LOCAL_INT3_ENABLE_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000001000
-
-/* SH_LOCAL_INT3_ENABLE_UART_INT */
-/* Description: Enable Junk Bus UART Interrupt */
-#define SH_LOCAL_INT3_ENABLE_UART_INT_SHFT 13
-#define SH_LOCAL_INT3_ENABLE_UART_INT_MASK 0x0000000000002000
-
-/* SH_LOCAL_INT3_ENABLE_L1_NMI_INT */
-/* Description: Enable L1 Controller NMI Interrupt */
-#define SH_LOCAL_INT3_ENABLE_L1_NMI_INT_SHFT 14
-#define SH_LOCAL_INT3_ENABLE_L1_NMI_INT_MASK 0x0000000000004000
-
-/* SH_LOCAL_INT3_ENABLE_STOP_CLOCK */
-/* Description: Stop Clock Interrupt */
-#define SH_LOCAL_INT3_ENABLE_STOP_CLOCK_SHFT 15
-#define SH_LOCAL_INT3_ENABLE_STOP_CLOCK_MASK 0x0000000000008000
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT4_CONFIG" */
-/* SHub Local Interrupt 4 Registers */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT4_CONFIG 0x0000000110000880
-#define SH_LOCAL_INT4_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_LOCAL_INT4_CONFIG_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT4_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_LOCAL_INT4_CONFIG_TYPE_SHFT 0
-#define SH_LOCAL_INT4_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_LOCAL_INT4_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_LOCAL_INT4_CONFIG_AGT_SHFT 3
-#define SH_LOCAL_INT4_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT4_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_LOCAL_INT4_CONFIG_PID_SHFT 4
-#define SH_LOCAL_INT4_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_LOCAL_INT4_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_LOCAL_INT4_CONFIG_BASE_SHFT 21
-#define SH_LOCAL_INT4_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_LOCAL_INT4_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_LOCAL_INT4_CONFIG_IDX_SHFT 52
-#define SH_LOCAL_INT4_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT4_ENABLE" */
-/* SHub Local Interrupt 4 Enable */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT4_ENABLE 0x0000000110000900
-#define SH_LOCAL_INT4_ENABLE_MASK 0x000000000000f7ff
-#define SH_LOCAL_INT4_ENABLE_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT4_ENABLE_PI_HW_INT */
-/* Description: Enable PI Hardware interrupt */
-#define SH_LOCAL_INT4_ENABLE_PI_HW_INT_SHFT 0
-#define SH_LOCAL_INT4_ENABLE_PI_HW_INT_MASK 0x0000000000000001
-
-/* SH_LOCAL_INT4_ENABLE_MD_HW_INT */
-/* Description: Enable MD Hardware interrupt */
-#define SH_LOCAL_INT4_ENABLE_MD_HW_INT_SHFT 1
-#define SH_LOCAL_INT4_ENABLE_MD_HW_INT_MASK 0x0000000000000002
-
-/* SH_LOCAL_INT4_ENABLE_XN_HW_INT */
-/* Description: Enable XN Hardware interrupt */
-#define SH_LOCAL_INT4_ENABLE_XN_HW_INT_SHFT 2
-#define SH_LOCAL_INT4_ENABLE_XN_HW_INT_MASK 0x0000000000000004
-
-/* SH_LOCAL_INT4_ENABLE_LB_HW_INT */
-/* Description: Enable LB Hardware interrupt */
-#define SH_LOCAL_INT4_ENABLE_LB_HW_INT_SHFT 3
-#define SH_LOCAL_INT4_ENABLE_LB_HW_INT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT4_ENABLE_II_HW_INT */
-/* Description: Enable II wrapper Hardware interrupt */
-#define SH_LOCAL_INT4_ENABLE_II_HW_INT_SHFT 4
-#define SH_LOCAL_INT4_ENABLE_II_HW_INT_MASK 0x0000000000000010
-
-/* SH_LOCAL_INT4_ENABLE_PI_CE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT4_ENABLE_PI_CE_INT_SHFT 5
-#define SH_LOCAL_INT4_ENABLE_PI_CE_INT_MASK 0x0000000000000020
-
-/* SH_LOCAL_INT4_ENABLE_MD_CE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT4_ENABLE_MD_CE_INT_SHFT 6
-#define SH_LOCAL_INT4_ENABLE_MD_CE_INT_MASK 0x0000000000000040
-
-/* SH_LOCAL_INT4_ENABLE_XN_CE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT4_ENABLE_XN_CE_INT_SHFT 7
-#define SH_LOCAL_INT4_ENABLE_XN_CE_INT_MASK 0x0000000000000080
-
-/* SH_LOCAL_INT4_ENABLE_PI_UCE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT4_ENABLE_PI_UCE_INT_SHFT 8
-#define SH_LOCAL_INT4_ENABLE_PI_UCE_INT_MASK 0x0000000000000100
-
-/* SH_LOCAL_INT4_ENABLE_MD_UCE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT4_ENABLE_MD_UCE_INT_SHFT 9
-#define SH_LOCAL_INT4_ENABLE_MD_UCE_INT_MASK 0x0000000000000200
-
-/* SH_LOCAL_INT4_ENABLE_XN_UCE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT4_ENABLE_XN_UCE_INT_SHFT 10
-#define SH_LOCAL_INT4_ENABLE_XN_UCE_INT_MASK 0x0000000000000400
-
-/* SH_LOCAL_INT4_ENABLE_SYSTEM_SHUTDOWN_INT */
-/* Description: Enable System Shutdown Interrupt */
-#define SH_LOCAL_INT4_ENABLE_SYSTEM_SHUTDOWN_INT_SHFT 12
-#define SH_LOCAL_INT4_ENABLE_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000001000
-
-/* SH_LOCAL_INT4_ENABLE_UART_INT */
-/* Description: Enable Junk Bus UART Interrupt */
-#define SH_LOCAL_INT4_ENABLE_UART_INT_SHFT 13
-#define SH_LOCAL_INT4_ENABLE_UART_INT_MASK 0x0000000000002000
-
-/* SH_LOCAL_INT4_ENABLE_L1_NMI_INT */
-/* Description: Enable L1 Controller NMI Interrupt */
-#define SH_LOCAL_INT4_ENABLE_L1_NMI_INT_SHFT 14
-#define SH_LOCAL_INT4_ENABLE_L1_NMI_INT_MASK 0x0000000000004000
-
-/* SH_LOCAL_INT4_ENABLE_STOP_CLOCK */
-/* Description: Stop Clock Interrupt */
-#define SH_LOCAL_INT4_ENABLE_STOP_CLOCK_SHFT 15
-#define SH_LOCAL_INT4_ENABLE_STOP_CLOCK_MASK 0x0000000000008000
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT5_CONFIG" */
-/* SHub Local Interrupt 5 Registers */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT5_CONFIG 0x0000000110000980
-#define SH_LOCAL_INT5_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_LOCAL_INT5_CONFIG_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT5_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_LOCAL_INT5_CONFIG_TYPE_SHFT 0
-#define SH_LOCAL_INT5_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_LOCAL_INT5_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_LOCAL_INT5_CONFIG_AGT_SHFT 3
-#define SH_LOCAL_INT5_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT5_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_LOCAL_INT5_CONFIG_PID_SHFT 4
-#define SH_LOCAL_INT5_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_LOCAL_INT5_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_LOCAL_INT5_CONFIG_BASE_SHFT 21
-#define SH_LOCAL_INT5_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_LOCAL_INT5_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_LOCAL_INT5_CONFIG_IDX_SHFT 52
-#define SH_LOCAL_INT5_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT5_ENABLE" */
-/* SHub Local Interrupt 5 Enable */
-/* ==================================================================== */
-
-#define SH_LOCAL_INT5_ENABLE 0x0000000110000a00
-#define SH_LOCAL_INT5_ENABLE_MASK 0x000000000000f7ff
-#define SH_LOCAL_INT5_ENABLE_INIT 0x0000000000000000
-
-/* SH_LOCAL_INT5_ENABLE_PI_HW_INT */
-/* Description: Enable PI Hardware interrupt */
-#define SH_LOCAL_INT5_ENABLE_PI_HW_INT_SHFT 0
-#define SH_LOCAL_INT5_ENABLE_PI_HW_INT_MASK 0x0000000000000001
-
-/* SH_LOCAL_INT5_ENABLE_MD_HW_INT */
-/* Description: Enable MD Hardware interrupt */
-#define SH_LOCAL_INT5_ENABLE_MD_HW_INT_SHFT 1
-#define SH_LOCAL_INT5_ENABLE_MD_HW_INT_MASK 0x0000000000000002
-
-/* SH_LOCAL_INT5_ENABLE_XN_HW_INT */
-/* Description: Enable XN Hardware interrupt */
-#define SH_LOCAL_INT5_ENABLE_XN_HW_INT_SHFT 2
-#define SH_LOCAL_INT5_ENABLE_XN_HW_INT_MASK 0x0000000000000004
-
-/* SH_LOCAL_INT5_ENABLE_LB_HW_INT */
-/* Description: Enable LB Hardware interrupt */
-#define SH_LOCAL_INT5_ENABLE_LB_HW_INT_SHFT 3
-#define SH_LOCAL_INT5_ENABLE_LB_HW_INT_MASK 0x0000000000000008
-
-/* SH_LOCAL_INT5_ENABLE_II_HW_INT */
-/* Description: Enable II wrapper Hardware interrupt */
-#define SH_LOCAL_INT5_ENABLE_II_HW_INT_SHFT 4
-#define SH_LOCAL_INT5_ENABLE_II_HW_INT_MASK 0x0000000000000010
-
-/* SH_LOCAL_INT5_ENABLE_PI_CE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT5_ENABLE_PI_CE_INT_SHFT 5
-#define SH_LOCAL_INT5_ENABLE_PI_CE_INT_MASK 0x0000000000000020
-
-/* SH_LOCAL_INT5_ENABLE_MD_CE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT5_ENABLE_MD_CE_INT_SHFT 6
-#define SH_LOCAL_INT5_ENABLE_MD_CE_INT_MASK 0x0000000000000040
-
-/* SH_LOCAL_INT5_ENABLE_XN_CE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT5_ENABLE_XN_CE_INT_SHFT 7
-#define SH_LOCAL_INT5_ENABLE_XN_CE_INT_MASK 0x0000000000000080
-
-/* SH_LOCAL_INT5_ENABLE_PI_UCE_INT */
-/* Description: Enable PI Correctable Error Interrupt */
-#define SH_LOCAL_INT5_ENABLE_PI_UCE_INT_SHFT 8
-#define SH_LOCAL_INT5_ENABLE_PI_UCE_INT_MASK 0x0000000000000100
-
-/* SH_LOCAL_INT5_ENABLE_MD_UCE_INT */
-/* Description: Enable MD Correctable Error Interrupt */
-#define SH_LOCAL_INT5_ENABLE_MD_UCE_INT_SHFT 9
-#define SH_LOCAL_INT5_ENABLE_MD_UCE_INT_MASK 0x0000000000000200
-
-/* SH_LOCAL_INT5_ENABLE_XN_UCE_INT */
-/* Description: Enable XN Correctable Error Interrupt */
-#define SH_LOCAL_INT5_ENABLE_XN_UCE_INT_SHFT 10
-#define SH_LOCAL_INT5_ENABLE_XN_UCE_INT_MASK 0x0000000000000400
-
-/* SH_LOCAL_INT5_ENABLE_SYSTEM_SHUTDOWN_INT */
-/* Description: Enable System Shutdown Interrupt */
-#define SH_LOCAL_INT5_ENABLE_SYSTEM_SHUTDOWN_INT_SHFT 12
-#define SH_LOCAL_INT5_ENABLE_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000001000
-
-/* SH_LOCAL_INT5_ENABLE_UART_INT */
-/* Description: Enable Junk Bus UART Interrupt */
-#define SH_LOCAL_INT5_ENABLE_UART_INT_SHFT 13
-#define SH_LOCAL_INT5_ENABLE_UART_INT_MASK 0x0000000000002000
-
-/* SH_LOCAL_INT5_ENABLE_L1_NMI_INT */
-/* Description: Enable L1 Controller NMI Interrupt */
-#define SH_LOCAL_INT5_ENABLE_L1_NMI_INT_SHFT 14
-#define SH_LOCAL_INT5_ENABLE_L1_NMI_INT_MASK 0x0000000000004000
-
-/* SH_LOCAL_INT5_ENABLE_STOP_CLOCK */
-/* Description: Stop Clock Interrupt */
-#define SH_LOCAL_INT5_ENABLE_STOP_CLOCK_SHFT 15
-#define SH_LOCAL_INT5_ENABLE_STOP_CLOCK_MASK 0x0000000000008000
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ERR_INT_CONFIG" */
-/* SHub Processor 0 Error Interrupt Registers */
-/* ==================================================================== */
-
-#define SH_PROC0_ERR_INT_CONFIG 0x0000000110000a80
-#define SH_PROC0_ERR_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_PROC0_ERR_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_PROC0_ERR_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_PROC0_ERR_INT_CONFIG_TYPE_SHFT 0
-#define SH_PROC0_ERR_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_PROC0_ERR_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_PROC0_ERR_INT_CONFIG_AGT_SHFT 3
-#define SH_PROC0_ERR_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_PROC0_ERR_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_PROC0_ERR_INT_CONFIG_PID_SHFT 4
-#define SH_PROC0_ERR_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_PROC0_ERR_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_PROC0_ERR_INT_CONFIG_BASE_SHFT 21
-#define SH_PROC0_ERR_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_PROC0_ERR_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_PROC0_ERR_INT_CONFIG_IDX_SHFT 52
-#define SH_PROC0_ERR_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ERR_INT_CONFIG" */
-/* SHub Processor 1 Error Interrupt Registers */
-/* ==================================================================== */
-
-#define SH_PROC1_ERR_INT_CONFIG 0x0000000110000b00
-#define SH_PROC1_ERR_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_PROC1_ERR_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_PROC1_ERR_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_PROC1_ERR_INT_CONFIG_TYPE_SHFT 0
-#define SH_PROC1_ERR_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_PROC1_ERR_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_PROC1_ERR_INT_CONFIG_AGT_SHFT 3
-#define SH_PROC1_ERR_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_PROC1_ERR_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_PROC1_ERR_INT_CONFIG_PID_SHFT 4
-#define SH_PROC1_ERR_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_PROC1_ERR_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_PROC1_ERR_INT_CONFIG_BASE_SHFT 21
-#define SH_PROC1_ERR_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_PROC1_ERR_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_PROC1_ERR_INT_CONFIG_IDX_SHFT 52
-#define SH_PROC1_ERR_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ERR_INT_CONFIG" */
-/* SHub Processor 2 Error Interrupt Registers */
-/* ==================================================================== */
-
-#define SH_PROC2_ERR_INT_CONFIG 0x0000000110000b80
-#define SH_PROC2_ERR_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_PROC2_ERR_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_PROC2_ERR_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_PROC2_ERR_INT_CONFIG_TYPE_SHFT 0
-#define SH_PROC2_ERR_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_PROC2_ERR_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_PROC2_ERR_INT_CONFIG_AGT_SHFT 3
-#define SH_PROC2_ERR_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_PROC2_ERR_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_PROC2_ERR_INT_CONFIG_PID_SHFT 4
-#define SH_PROC2_ERR_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_PROC2_ERR_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_PROC2_ERR_INT_CONFIG_BASE_SHFT 21
-#define SH_PROC2_ERR_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_PROC2_ERR_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_PROC2_ERR_INT_CONFIG_IDX_SHFT 52
-#define SH_PROC2_ERR_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ERR_INT_CONFIG" */
-/* SHub Processor 3 Error Interrupt Registers */
-/* ==================================================================== */
-
-#define SH_PROC3_ERR_INT_CONFIG 0x0000000110000c00
-#define SH_PROC3_ERR_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_PROC3_ERR_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_PROC3_ERR_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_PROC3_ERR_INT_CONFIG_TYPE_SHFT 0
-#define SH_PROC3_ERR_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_PROC3_ERR_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_PROC3_ERR_INT_CONFIG_AGT_SHFT 3
-#define SH_PROC3_ERR_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_PROC3_ERR_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_PROC3_ERR_INT_CONFIG_PID_SHFT 4
-#define SH_PROC3_ERR_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_PROC3_ERR_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_PROC3_ERR_INT_CONFIG_BASE_SHFT 21
-#define SH_PROC3_ERR_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_PROC3_ERR_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_PROC3_ERR_INT_CONFIG_IDX_SHFT 52
-#define SH_PROC3_ERR_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ADV_INT_CONFIG" */
-/* SHub Processor 0 Advisory Interrupt Registers */
-/* ==================================================================== */
-
-#define SH_PROC0_ADV_INT_CONFIG 0x0000000110000c80
-#define SH_PROC0_ADV_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_PROC0_ADV_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_PROC0_ADV_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_PROC0_ADV_INT_CONFIG_TYPE_SHFT 0
-#define SH_PROC0_ADV_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_PROC0_ADV_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_PROC0_ADV_INT_CONFIG_AGT_SHFT 3
-#define SH_PROC0_ADV_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_PROC0_ADV_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_PROC0_ADV_INT_CONFIG_PID_SHFT 4
-#define SH_PROC0_ADV_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_PROC0_ADV_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_PROC0_ADV_INT_CONFIG_BASE_SHFT 21
-#define SH_PROC0_ADV_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_PROC0_ADV_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_PROC0_ADV_INT_CONFIG_IDX_SHFT 52
-#define SH_PROC0_ADV_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ADV_INT_CONFIG" */
-/* SHub Processor 1 Advisory Interrupt Registers */
-/* ==================================================================== */
-
-#define SH_PROC1_ADV_INT_CONFIG 0x0000000110000d00
-#define SH_PROC1_ADV_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_PROC1_ADV_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_PROC1_ADV_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_PROC1_ADV_INT_CONFIG_TYPE_SHFT 0
-#define SH_PROC1_ADV_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_PROC1_ADV_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_PROC1_ADV_INT_CONFIG_AGT_SHFT 3
-#define SH_PROC1_ADV_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_PROC1_ADV_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_PROC1_ADV_INT_CONFIG_PID_SHFT 4
-#define SH_PROC1_ADV_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_PROC1_ADV_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_PROC1_ADV_INT_CONFIG_BASE_SHFT 21
-#define SH_PROC1_ADV_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_PROC1_ADV_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_PROC1_ADV_INT_CONFIG_IDX_SHFT 52
-#define SH_PROC1_ADV_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ADV_INT_CONFIG" */
-/* SHub Processor 2 Advisory Interrupt Registers */
-/* ==================================================================== */
-
-#define SH_PROC2_ADV_INT_CONFIG 0x0000000110000d80
-#define SH_PROC2_ADV_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_PROC2_ADV_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_PROC2_ADV_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_PROC2_ADV_INT_CONFIG_TYPE_SHFT 0
-#define SH_PROC2_ADV_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_PROC2_ADV_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_PROC2_ADV_INT_CONFIG_AGT_SHFT 3
-#define SH_PROC2_ADV_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_PROC2_ADV_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_PROC2_ADV_INT_CONFIG_PID_SHFT 4
-#define SH_PROC2_ADV_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_PROC2_ADV_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_PROC2_ADV_INT_CONFIG_BASE_SHFT 21
-#define SH_PROC2_ADV_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_PROC2_ADV_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_PROC2_ADV_INT_CONFIG_IDX_SHFT 52
-#define SH_PROC2_ADV_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ADV_INT_CONFIG" */
-/* SHub Processor 3 Advisory Interrupt Registers */
-/* ==================================================================== */
-
-#define SH_PROC3_ADV_INT_CONFIG 0x0000000110000e00
-#define SH_PROC3_ADV_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_PROC3_ADV_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_PROC3_ADV_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_PROC3_ADV_INT_CONFIG_TYPE_SHFT 0
-#define SH_PROC3_ADV_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_PROC3_ADV_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_PROC3_ADV_INT_CONFIG_AGT_SHFT 3
-#define SH_PROC3_ADV_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_PROC3_ADV_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_PROC3_ADV_INT_CONFIG_PID_SHFT 4
-#define SH_PROC3_ADV_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_PROC3_ADV_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_PROC3_ADV_INT_CONFIG_BASE_SHFT 21
-#define SH_PROC3_ADV_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_PROC3_ADV_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_PROC3_ADV_INT_CONFIG_IDX_SHFT 52
-#define SH_PROC3_ADV_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ERR_INT_ENABLE" */
-/* SHub Processor 0 Error Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_PROC0_ERR_INT_ENABLE 0x0000000110000e80
-#define SH_PROC0_ERR_INT_ENABLE_MASK 0x0000000000000001
-#define SH_PROC0_ERR_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_PROC0_ERR_INT_ENABLE_PROC0_ERR_ENABLE */
-/* Description: Enable Processor 0 Error Interrupt */
-#define SH_PROC0_ERR_INT_ENABLE_PROC0_ERR_ENABLE_SHFT 0
-#define SH_PROC0_ERR_INT_ENABLE_PROC0_ERR_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ERR_INT_ENABLE" */
-/* SHub Processor 1 Error Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_PROC1_ERR_INT_ENABLE 0x0000000110000f00
-#define SH_PROC1_ERR_INT_ENABLE_MASK 0x0000000000000001
-#define SH_PROC1_ERR_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_PROC1_ERR_INT_ENABLE_PROC1_ERR_ENABLE */
-/* Description: Enable Processor 1 Error Interrupt */
-#define SH_PROC1_ERR_INT_ENABLE_PROC1_ERR_ENABLE_SHFT 0
-#define SH_PROC1_ERR_INT_ENABLE_PROC1_ERR_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ERR_INT_ENABLE" */
-/* SHub Processor 2 Error Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_PROC2_ERR_INT_ENABLE 0x0000000110000f80
-#define SH_PROC2_ERR_INT_ENABLE_MASK 0x0000000000000001
-#define SH_PROC2_ERR_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_PROC2_ERR_INT_ENABLE_PROC2_ERR_ENABLE */
-/* Description: Enable Processor 2 Error Interrupt */
-#define SH_PROC2_ERR_INT_ENABLE_PROC2_ERR_ENABLE_SHFT 0
-#define SH_PROC2_ERR_INT_ENABLE_PROC2_ERR_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ERR_INT_ENABLE" */
-/* SHub Processor 3 Error Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_PROC3_ERR_INT_ENABLE 0x0000000110001000
-#define SH_PROC3_ERR_INT_ENABLE_MASK 0x0000000000000001
-#define SH_PROC3_ERR_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_PROC3_ERR_INT_ENABLE_PROC3_ERR_ENABLE */
-/* Description: Enable Processor 3 Error Interrupt */
-#define SH_PROC3_ERR_INT_ENABLE_PROC3_ERR_ENABLE_SHFT 0
-#define SH_PROC3_ERR_INT_ENABLE_PROC3_ERR_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ADV_INT_ENABLE" */
-/* SHub Processor 0 Advisory Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_PROC0_ADV_INT_ENABLE 0x0000000110001080
-#define SH_PROC0_ADV_INT_ENABLE_MASK 0x0000000000000001
-#define SH_PROC0_ADV_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_PROC0_ADV_INT_ENABLE_PROC0_ADV_ENABLE */
-/* Description: Enable Processor 0 Advisory Interrupt */
-#define SH_PROC0_ADV_INT_ENABLE_PROC0_ADV_ENABLE_SHFT 0
-#define SH_PROC0_ADV_INT_ENABLE_PROC0_ADV_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ADV_INT_ENABLE" */
-/* SHub Processor 1 Advisory Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_PROC1_ADV_INT_ENABLE 0x0000000110001100
-#define SH_PROC1_ADV_INT_ENABLE_MASK 0x0000000000000001
-#define SH_PROC1_ADV_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_PROC1_ADV_INT_ENABLE_PROC1_ADV_ENABLE */
-/* Description: Enable Processor 1 Advisory Interrupt */
-#define SH_PROC1_ADV_INT_ENABLE_PROC1_ADV_ENABLE_SHFT 0
-#define SH_PROC1_ADV_INT_ENABLE_PROC1_ADV_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ADV_INT_ENABLE" */
-/* SHub Processor 2 Advisory Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_PROC2_ADV_INT_ENABLE 0x0000000110001180
-#define SH_PROC2_ADV_INT_ENABLE_MASK 0x0000000000000001
-#define SH_PROC2_ADV_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_PROC2_ADV_INT_ENABLE_PROC2_ADV_ENABLE */
-/* Description: Enable Processor 2 Advisory Interrupt */
-#define SH_PROC2_ADV_INT_ENABLE_PROC2_ADV_ENABLE_SHFT 0
-#define SH_PROC2_ADV_INT_ENABLE_PROC2_ADV_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ADV_INT_ENABLE" */
-/* SHub Processor 3 Advisory Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_PROC3_ADV_INT_ENABLE 0x0000000110001200
-#define SH_PROC3_ADV_INT_ENABLE_MASK 0x0000000000000001
-#define SH_PROC3_ADV_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_PROC3_ADV_INT_ENABLE_PROC3_ADV_ENABLE */
-/* Description: Enable Processor 3 Advisory Interrupt */
-#define SH_PROC3_ADV_INT_ENABLE_PROC3_ADV_ENABLE_SHFT 0
-#define SH_PROC3_ADV_INT_ENABLE_PROC3_ADV_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_INT_CONFIG" */
-/* SHub Profile Interrupt Configuration Registers */
-/* ==================================================================== */
-
-#define SH_PROFILE_INT_CONFIG 0x0000000110001280
-#define SH_PROFILE_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_PROFILE_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_PROFILE_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_PROFILE_INT_CONFIG_TYPE_SHFT 0
-#define SH_PROFILE_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_PROFILE_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_PROFILE_INT_CONFIG_AGT_SHFT 3
-#define SH_PROFILE_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_PROFILE_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_PROFILE_INT_CONFIG_PID_SHFT 4
-#define SH_PROFILE_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_PROFILE_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_PROFILE_INT_CONFIG_BASE_SHFT 21
-#define SH_PROFILE_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_PROFILE_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_PROFILE_INT_CONFIG_IDX_SHFT 52
-#define SH_PROFILE_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_INT_ENABLE" */
-/* SHub Profile Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_PROFILE_INT_ENABLE 0x0000000110001300
-#define SH_PROFILE_INT_ENABLE_MASK 0x0000000000000001
-#define SH_PROFILE_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_PROFILE_INT_ENABLE_PROFILE_ENABLE */
-/* Description: Enable Profile Interrupt */
-#define SH_PROFILE_INT_ENABLE_PROFILE_ENABLE_SHFT 0
-#define SH_PROFILE_INT_ENABLE_PROFILE_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_RTC0_INT_CONFIG" */
-/* SHub RTC 0 Interrupt Config Registers */
-/* ==================================================================== */
-
-#define SH_RTC0_INT_CONFIG 0x0000000110001380
-#define SH_RTC0_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_RTC0_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_RTC0_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_RTC0_INT_CONFIG_TYPE_SHFT 0
-#define SH_RTC0_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_RTC0_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_RTC0_INT_CONFIG_AGT_SHFT 3
-#define SH_RTC0_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_RTC0_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_RTC0_INT_CONFIG_PID_SHFT 4
-#define SH_RTC0_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_RTC0_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_RTC0_INT_CONFIG_BASE_SHFT 21
-#define SH_RTC0_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_RTC0_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_RTC0_INT_CONFIG_IDX_SHFT 52
-#define SH_RTC0_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_RTC0_INT_ENABLE" */
-/* SHub RTC 0 Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_RTC0_INT_ENABLE 0x0000000110001400
-#define SH_RTC0_INT_ENABLE_MASK 0x0000000000000001
-#define SH_RTC0_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_RTC0_INT_ENABLE_RTC0_ENABLE */
-/* Description: Enable RTC 0 Interrupt */
-#define SH_RTC0_INT_ENABLE_RTC0_ENABLE_SHFT 0
-#define SH_RTC0_INT_ENABLE_RTC0_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_RTC1_INT_CONFIG" */
-/* SHub RTC 1 Interrupt Config Registers */
-/* ==================================================================== */
-
-#define SH_RTC1_INT_CONFIG 0x0000000110001480
-#define SH_RTC1_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_RTC1_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_RTC1_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_RTC1_INT_CONFIG_TYPE_SHFT 0
-#define SH_RTC1_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_RTC1_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_RTC1_INT_CONFIG_AGT_SHFT 3
-#define SH_RTC1_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_RTC1_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_RTC1_INT_CONFIG_PID_SHFT 4
-#define SH_RTC1_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_RTC1_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_RTC1_INT_CONFIG_BASE_SHFT 21
-#define SH_RTC1_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_RTC1_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_RTC1_INT_CONFIG_IDX_SHFT 52
-#define SH_RTC1_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_RTC1_INT_ENABLE" */
-/* SHub RTC 1 Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_RTC1_INT_ENABLE 0x0000000110001500
-#define SH_RTC1_INT_ENABLE_MASK 0x0000000000000001
-#define SH_RTC1_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_RTC1_INT_ENABLE_RTC1_ENABLE */
-/* Description: Enable RTC 1 Interrupt */
-#define SH_RTC1_INT_ENABLE_RTC1_ENABLE_SHFT 0
-#define SH_RTC1_INT_ENABLE_RTC1_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_RTC2_INT_CONFIG" */
-/* SHub RTC 2 Interrupt Config Registers */
-/* ==================================================================== */
-
-#define SH_RTC2_INT_CONFIG 0x0000000110001580
-#define SH_RTC2_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_RTC2_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_RTC2_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_RTC2_INT_CONFIG_TYPE_SHFT 0
-#define SH_RTC2_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_RTC2_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_RTC2_INT_CONFIG_AGT_SHFT 3
-#define SH_RTC2_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_RTC2_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_RTC2_INT_CONFIG_PID_SHFT 4
-#define SH_RTC2_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_RTC2_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_RTC2_INT_CONFIG_BASE_SHFT 21
-#define SH_RTC2_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_RTC2_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_RTC2_INT_CONFIG_IDX_SHFT 52
-#define SH_RTC2_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_RTC2_INT_ENABLE" */
-/* SHub RTC 2 Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_RTC2_INT_ENABLE 0x0000000110001600
-#define SH_RTC2_INT_ENABLE_MASK 0x0000000000000001
-#define SH_RTC2_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_RTC2_INT_ENABLE_RTC2_ENABLE */
-/* Description: Enable RTC 2 Interrupt */
-#define SH_RTC2_INT_ENABLE_RTC2_ENABLE_SHFT 0
-#define SH_RTC2_INT_ENABLE_RTC2_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_RTC3_INT_CONFIG" */
-/* SHub RTC 3 Interrupt Config Registers */
-/* ==================================================================== */
-
-#define SH_RTC3_INT_CONFIG 0x0000000110001680
-#define SH_RTC3_INT_CONFIG_MASK 0x0ff3ffffffefffff
-#define SH_RTC3_INT_CONFIG_INIT 0x0000000000000000
-
-/* SH_RTC3_INT_CONFIG_TYPE */
-/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
-#define SH_RTC3_INT_CONFIG_TYPE_SHFT 0
-#define SH_RTC3_INT_CONFIG_TYPE_MASK 0x0000000000000007
-
-/* SH_RTC3_INT_CONFIG_AGT */
-/* Description: Agent, must be 0 for SHub */
-#define SH_RTC3_INT_CONFIG_AGT_SHFT 3
-#define SH_RTC3_INT_CONFIG_AGT_MASK 0x0000000000000008
-
-/* SH_RTC3_INT_CONFIG_PID */
-/* Description: Processor ID, same setting as on targeted McKinley */
-#define SH_RTC3_INT_CONFIG_PID_SHFT 4
-#define SH_RTC3_INT_CONFIG_PID_MASK 0x00000000000ffff0
-
-/* SH_RTC3_INT_CONFIG_BASE */
-/* Description: Optional interrupt vector area, 2MB aligned */
-#define SH_RTC3_INT_CONFIG_BASE_SHFT 21
-#define SH_RTC3_INT_CONFIG_BASE_MASK 0x0003ffffffe00000
-
-/* SH_RTC3_INT_CONFIG_IDX */
-/* Description: Targeted McKinley interrupt vector */
-#define SH_RTC3_INT_CONFIG_IDX_SHFT 52
-#define SH_RTC3_INT_CONFIG_IDX_MASK 0x0ff0000000000000
-
-/* ==================================================================== */
-/* Register "SH_RTC3_INT_ENABLE" */
-/* SHub RTC 3 Interrupt Enable Registers */
-/* ==================================================================== */
-
-#define SH_RTC3_INT_ENABLE 0x0000000110001700
-#define SH_RTC3_INT_ENABLE_MASK 0x0000000000000001
-#define SH_RTC3_INT_ENABLE_INIT 0x0000000000000000
-
-/* SH_RTC3_INT_ENABLE_RTC3_ENABLE */
-/* Description: Enable RTC 3 Interrupt */
-#define SH_RTC3_INT_ENABLE_RTC3_ENABLE_SHFT 0
-#define SH_RTC3_INT_ENABLE_RTC3_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_EVENT_OCCURRED" */
-/* SHub Interrupt Event Occurred */
-/* ==================================================================== */
-
-#define SH_EVENT_OCCURRED 0x0000000110010000
-#define SH_EVENT_OCCURRED_MASK 0x000000007fffffff
-#define SH_EVENT_OCCURRED_INIT 0x0000000000000000
-
-/* SH_EVENT_OCCURRED_PI_HW_INT */
-/* Description: Pending PI Hardware interrupt */
-#define SH_EVENT_OCCURRED_PI_HW_INT_SHFT 0
-#define SH_EVENT_OCCURRED_PI_HW_INT_MASK 0x0000000000000001
-
-/* SH_EVENT_OCCURRED_MD_HW_INT */
-/* Description: Pending MD Hardware interrupt */
-#define SH_EVENT_OCCURRED_MD_HW_INT_SHFT 1
-#define SH_EVENT_OCCURRED_MD_HW_INT_MASK 0x0000000000000002
-
-/* SH_EVENT_OCCURRED_XN_HW_INT */
-/* Description: Pending XN Hardware interrupt */
-#define SH_EVENT_OCCURRED_XN_HW_INT_SHFT 2
-#define SH_EVENT_OCCURRED_XN_HW_INT_MASK 0x0000000000000004
-
-/* SH_EVENT_OCCURRED_LB_HW_INT */
-/* Description: Pending LB Hardware interrupt */
-#define SH_EVENT_OCCURRED_LB_HW_INT_SHFT 3
-#define SH_EVENT_OCCURRED_LB_HW_INT_MASK 0x0000000000000008
-
-/* SH_EVENT_OCCURRED_II_HW_INT */
-/* Description: Pending II wrapper Hardware interrupt */
-#define SH_EVENT_OCCURRED_II_HW_INT_SHFT 4
-#define SH_EVENT_OCCURRED_II_HW_INT_MASK 0x0000000000000010
-
-/* SH_EVENT_OCCURRED_PI_CE_INT */
-/* Description: Pending PI Correctable Error Interrupt */
-#define SH_EVENT_OCCURRED_PI_CE_INT_SHFT 5
-#define SH_EVENT_OCCURRED_PI_CE_INT_MASK 0x0000000000000020
-
-/* SH_EVENT_OCCURRED_MD_CE_INT */
-/* Description: Pending MD Correctable Error Interrupt */
-#define SH_EVENT_OCCURRED_MD_CE_INT_SHFT 6
-#define SH_EVENT_OCCURRED_MD_CE_INT_MASK 0x0000000000000040
-
-/* SH_EVENT_OCCURRED_XN_CE_INT */
-/* Description: Pending XN Correctable Error Interrupt */
-#define SH_EVENT_OCCURRED_XN_CE_INT_SHFT 7
-#define SH_EVENT_OCCURRED_XN_CE_INT_MASK 0x0000000000000080
-
-/* SH_EVENT_OCCURRED_PI_UCE_INT */
-/* Description: Pending PI Correctable Error Interrupt */
-#define SH_EVENT_OCCURRED_PI_UCE_INT_SHFT 8
-#define SH_EVENT_OCCURRED_PI_UCE_INT_MASK 0x0000000000000100
-
-/* SH_EVENT_OCCURRED_MD_UCE_INT */
-/* Description: Pending MD Correctable Error Interrupt */
-#define SH_EVENT_OCCURRED_MD_UCE_INT_SHFT 9
-#define SH_EVENT_OCCURRED_MD_UCE_INT_MASK 0x0000000000000200
-
-/* SH_EVENT_OCCURRED_XN_UCE_INT */
-/* Description: Pending XN Correctable Error Interrupt */
-#define SH_EVENT_OCCURRED_XN_UCE_INT_SHFT 10
-#define SH_EVENT_OCCURRED_XN_UCE_INT_MASK 0x0000000000000400
-
-/* SH_EVENT_OCCURRED_PROC0_ADV_INT */
-/* Description: Pending Processor 0 Advisory Interrupt */
-#define SH_EVENT_OCCURRED_PROC0_ADV_INT_SHFT 11
-#define SH_EVENT_OCCURRED_PROC0_ADV_INT_MASK 0x0000000000000800
-
-/* SH_EVENT_OCCURRED_PROC1_ADV_INT */
-/* Description: Pending Processor 1 Advisory Interrupt */
-#define SH_EVENT_OCCURRED_PROC1_ADV_INT_SHFT 12
-#define SH_EVENT_OCCURRED_PROC1_ADV_INT_MASK 0x0000000000001000
-
-/* SH_EVENT_OCCURRED_PROC2_ADV_INT */
-/* Description: Pending Processor 2 Advisory Interrupt */
-#define SH_EVENT_OCCURRED_PROC2_ADV_INT_SHFT 13
-#define SH_EVENT_OCCURRED_PROC2_ADV_INT_MASK 0x0000000000002000
-
-/* SH_EVENT_OCCURRED_PROC3_ADV_INT */
-/* Description: Pending Processor 3 Advisory Interrupt */
-#define SH_EVENT_OCCURRED_PROC3_ADV_INT_SHFT 14
-#define SH_EVENT_OCCURRED_PROC3_ADV_INT_MASK 0x0000000000004000
-
-/* SH_EVENT_OCCURRED_PROC0_ERR_INT */
-/* Description: Pending Processor 0 Error Interrupt */
-#define SH_EVENT_OCCURRED_PROC0_ERR_INT_SHFT 15
-#define SH_EVENT_OCCURRED_PROC0_ERR_INT_MASK 0x0000000000008000
-
-/* SH_EVENT_OCCURRED_PROC1_ERR_INT */
-/* Description: Pending Processor 1 Error Interrupt */
-#define SH_EVENT_OCCURRED_PROC1_ERR_INT_SHFT 16
-#define SH_EVENT_OCCURRED_PROC1_ERR_INT_MASK 0x0000000000010000
-
-/* SH_EVENT_OCCURRED_PROC2_ERR_INT */
-/* Description: Pending Processor 2 Error Interrupt */
-#define SH_EVENT_OCCURRED_PROC2_ERR_INT_SHFT 17
-#define SH_EVENT_OCCURRED_PROC2_ERR_INT_MASK 0x0000000000020000
-
-/* SH_EVENT_OCCURRED_PROC3_ERR_INT */
-/* Description: Pending Processor 3 Error Interrupt */
-#define SH_EVENT_OCCURRED_PROC3_ERR_INT_SHFT 18
-#define SH_EVENT_OCCURRED_PROC3_ERR_INT_MASK 0x0000000000040000
-
-/* SH_EVENT_OCCURRED_SYSTEM_SHUTDOWN_INT */
-/* Description: Pending System Shutdown Interrupt */
-#define SH_EVENT_OCCURRED_SYSTEM_SHUTDOWN_INT_SHFT 19
-#define SH_EVENT_OCCURRED_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000080000
-
-/* SH_EVENT_OCCURRED_UART_INT */
-/* Description: Pending Junk Bus UART Interrupt */
-#define SH_EVENT_OCCURRED_UART_INT_SHFT 20
-#define SH_EVENT_OCCURRED_UART_INT_MASK 0x0000000000100000
-
-/* SH_EVENT_OCCURRED_L1_NMI_INT */
-/* Description: Pending L1 Controller NMI Interrupt */
-#define SH_EVENT_OCCURRED_L1_NMI_INT_SHFT 21
-#define SH_EVENT_OCCURRED_L1_NMI_INT_MASK 0x0000000000200000
-
-/* SH_EVENT_OCCURRED_STOP_CLOCK */
-/* Description: Pending Stop Clock Interrupt */
-#define SH_EVENT_OCCURRED_STOP_CLOCK_SHFT 22
-#define SH_EVENT_OCCURRED_STOP_CLOCK_MASK 0x0000000000400000
-
-/* SH_EVENT_OCCURRED_RTC0_INT */
-/* Description: Pending RTC 0 Interrupt */
-#define SH_EVENT_OCCURRED_RTC0_INT_SHFT 23
-#define SH_EVENT_OCCURRED_RTC0_INT_MASK 0x0000000000800000
-
-/* SH_EVENT_OCCURRED_RTC1_INT */
-/* Description: Pending RTC 1 Interrupt */
-#define SH_EVENT_OCCURRED_RTC1_INT_SHFT 24
-#define SH_EVENT_OCCURRED_RTC1_INT_MASK 0x0000000001000000
-
-/* SH_EVENT_OCCURRED_RTC2_INT */
-/* Description: Pending RTC 2 Interrupt */
-#define SH_EVENT_OCCURRED_RTC2_INT_SHFT 25
-#define SH_EVENT_OCCURRED_RTC2_INT_MASK 0x0000000002000000
-
-/* SH_EVENT_OCCURRED_RTC3_INT */
-/* Description: Pending RTC 3 Interrupt */
-#define SH_EVENT_OCCURRED_RTC3_INT_SHFT 26
-#define SH_EVENT_OCCURRED_RTC3_INT_MASK 0x0000000004000000
-
-/* SH_EVENT_OCCURRED_PROFILE_INT */
-/* Description: Pending Profile Interrupt */
-#define SH_EVENT_OCCURRED_PROFILE_INT_SHFT 27
-#define SH_EVENT_OCCURRED_PROFILE_INT_MASK 0x0000000008000000
-
-/* SH_EVENT_OCCURRED_IPI_INT */
-/* Description: Pending IPI Interrupt */
-#define SH_EVENT_OCCURRED_IPI_INT_SHFT 28
-#define SH_EVENT_OCCURRED_IPI_INT_MASK 0x0000000010000000
-
-/* SH_EVENT_OCCURRED_II_INT0 */
-/* Description: Pending II 0 Interrupt */
-#define SH_EVENT_OCCURRED_II_INT0_SHFT 29
-#define SH_EVENT_OCCURRED_II_INT0_MASK 0x0000000020000000
-
-/* SH_EVENT_OCCURRED_II_INT1 */
-/* Description: Pending II 1 Interrupt */
-#define SH_EVENT_OCCURRED_II_INT1_SHFT 30
-#define SH_EVENT_OCCURRED_II_INT1_MASK 0x0000000040000000
-
-/* ==================================================================== */
-/* Register "SH_EVENT_OCCURRED_ALIAS" */
-/* SHub Interrupt Event Occurred Alias */
-/* ==================================================================== */
-
-#define SH_EVENT_OCCURRED_ALIAS 0x0000000110010008
-
-/* ==================================================================== */
-/* Register "SH_EVENT_OVERFLOW" */
-/* SHub Interrupt Event Occurred Overflow */
-/* ==================================================================== */
-
-#define SH_EVENT_OVERFLOW 0x0000000110010080
-#define SH_EVENT_OVERFLOW_MASK 0x000000000fffffff
-#define SH_EVENT_OVERFLOW_INIT 0x0000000000000000
-
-/* SH_EVENT_OVERFLOW_PI_HW_INT */
-/* Description: Pending PI Hardware interrupt */
-#define SH_EVENT_OVERFLOW_PI_HW_INT_SHFT 0
-#define SH_EVENT_OVERFLOW_PI_HW_INT_MASK 0x0000000000000001
-
-/* SH_EVENT_OVERFLOW_MD_HW_INT */
-/* Description: Pending MD Hardware interrupt */
-#define SH_EVENT_OVERFLOW_MD_HW_INT_SHFT 1
-#define SH_EVENT_OVERFLOW_MD_HW_INT_MASK 0x0000000000000002
-
-/* SH_EVENT_OVERFLOW_XN_HW_INT */
-/* Description: Pending XN Hardware interrupt */
-#define SH_EVENT_OVERFLOW_XN_HW_INT_SHFT 2
-#define SH_EVENT_OVERFLOW_XN_HW_INT_MASK 0x0000000000000004
-
-/* SH_EVENT_OVERFLOW_LB_HW_INT */
-/* Description: Pending LB Hardware interrupt */
-#define SH_EVENT_OVERFLOW_LB_HW_INT_SHFT 3
-#define SH_EVENT_OVERFLOW_LB_HW_INT_MASK 0x0000000000000008
-
-/* SH_EVENT_OVERFLOW_II_HW_INT */
-/* Description: Pending II wrapper Hardware interrupt */
-#define SH_EVENT_OVERFLOW_II_HW_INT_SHFT 4
-#define SH_EVENT_OVERFLOW_II_HW_INT_MASK 0x0000000000000010
-
-/* SH_EVENT_OVERFLOW_PI_CE_INT */
-/* Description: Pending PI Correctable Error Interrupt */
-#define SH_EVENT_OVERFLOW_PI_CE_INT_SHFT 5
-#define SH_EVENT_OVERFLOW_PI_CE_INT_MASK 0x0000000000000020
-
-/* SH_EVENT_OVERFLOW_MD_CE_INT */
-/* Description: Pending MD Correctable Error Interrupt */
-#define SH_EVENT_OVERFLOW_MD_CE_INT_SHFT 6
-#define SH_EVENT_OVERFLOW_MD_CE_INT_MASK 0x0000000000000040
-
-/* SH_EVENT_OVERFLOW_XN_CE_INT */
-/* Description: Pending XN Correctable Error Interrupt */
-#define SH_EVENT_OVERFLOW_XN_CE_INT_SHFT 7
-#define SH_EVENT_OVERFLOW_XN_CE_INT_MASK 0x0000000000000080
-
-/* SH_EVENT_OVERFLOW_PI_UCE_INT */
-/* Description: Pending PI Correctable Error Interrupt */
-#define SH_EVENT_OVERFLOW_PI_UCE_INT_SHFT 8
-#define SH_EVENT_OVERFLOW_PI_UCE_INT_MASK 0x0000000000000100
-
-/* SH_EVENT_OVERFLOW_MD_UCE_INT */
-/* Description: Pending MD Correctable Error Interrupt */
-#define SH_EVENT_OVERFLOW_MD_UCE_INT_SHFT 9
-#define SH_EVENT_OVERFLOW_MD_UCE_INT_MASK 0x0000000000000200
-
-/* SH_EVENT_OVERFLOW_XN_UCE_INT */
-/* Description: Pending XN Correctable Error Interrupt */
-#define SH_EVENT_OVERFLOW_XN_UCE_INT_SHFT 10
-#define SH_EVENT_OVERFLOW_XN_UCE_INT_MASK 0x0000000000000400
-
-/* SH_EVENT_OVERFLOW_PROC0_ADV_INT */
-/* Description: Pending Processor 0 Advisory Interrupt */
-#define SH_EVENT_OVERFLOW_PROC0_ADV_INT_SHFT 11
-#define SH_EVENT_OVERFLOW_PROC0_ADV_INT_MASK 0x0000000000000800
-
-/* SH_EVENT_OVERFLOW_PROC1_ADV_INT */
-/* Description: Pending Processor 1 Advisory Interrupt */
-#define SH_EVENT_OVERFLOW_PROC1_ADV_INT_SHFT 12
-#define SH_EVENT_OVERFLOW_PROC1_ADV_INT_MASK 0x0000000000001000
-
-/* SH_EVENT_OVERFLOW_PROC2_ADV_INT */
-/* Description: Pending Processor 2 Advisory Interrupt */
-#define SH_EVENT_OVERFLOW_PROC2_ADV_INT_SHFT 13
-#define SH_EVENT_OVERFLOW_PROC2_ADV_INT_MASK 0x0000000000002000
-
-/* SH_EVENT_OVERFLOW_PROC3_ADV_INT */
-/* Description: Pending Processor 3 Advisory Interrupt */
-#define SH_EVENT_OVERFLOW_PROC3_ADV_INT_SHFT 14
-#define SH_EVENT_OVERFLOW_PROC3_ADV_INT_MASK 0x0000000000004000
-
-/* SH_EVENT_OVERFLOW_PROC0_ERR_INT */
-/* Description: Pending Processor 0 Error Interrupt */
-#define SH_EVENT_OVERFLOW_PROC0_ERR_INT_SHFT 15
-#define SH_EVENT_OVERFLOW_PROC0_ERR_INT_MASK 0x0000000000008000
-
-/* SH_EVENT_OVERFLOW_PROC1_ERR_INT */
-/* Description: Pending Processor 1 Error Interrupt */
-#define SH_EVENT_OVERFLOW_PROC1_ERR_INT_SHFT 16
-#define SH_EVENT_OVERFLOW_PROC1_ERR_INT_MASK 0x0000000000010000
-
-/* SH_EVENT_OVERFLOW_PROC2_ERR_INT */
-/* Description: Pending Processor 2 Error Interrupt */
-#define SH_EVENT_OVERFLOW_PROC2_ERR_INT_SHFT 17
-#define SH_EVENT_OVERFLOW_PROC2_ERR_INT_MASK 0x0000000000020000
-
-/* SH_EVENT_OVERFLOW_PROC3_ERR_INT */
-/* Description: Pending Processor 3 Error Interrupt */
-#define SH_EVENT_OVERFLOW_PROC3_ERR_INT_SHFT 18
-#define SH_EVENT_OVERFLOW_PROC3_ERR_INT_MASK 0x0000000000040000
-
-/* SH_EVENT_OVERFLOW_SYSTEM_SHUTDOWN_INT */
-/* Description: Pending System Shutdown Interrupt */
-#define SH_EVENT_OVERFLOW_SYSTEM_SHUTDOWN_INT_SHFT 19
-#define SH_EVENT_OVERFLOW_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000080000
-
-/* SH_EVENT_OVERFLOW_UART_INT */
-/* Description: Pending Junk Bus UART Interrupt */
-#define SH_EVENT_OVERFLOW_UART_INT_SHFT 20
-#define SH_EVENT_OVERFLOW_UART_INT_MASK 0x0000000000100000
-
-/* SH_EVENT_OVERFLOW_L1_NMI_INT */
-/* Description: Pending L1 Controller NMI Interrupt */
-#define SH_EVENT_OVERFLOW_L1_NMI_INT_SHFT 21
-#define SH_EVENT_OVERFLOW_L1_NMI_INT_MASK 0x0000000000200000
-
-/* SH_EVENT_OVERFLOW_STOP_CLOCK */
-/* Description: Pending Stop Clock Interrupt */
-#define SH_EVENT_OVERFLOW_STOP_CLOCK_SHFT 22
-#define SH_EVENT_OVERFLOW_STOP_CLOCK_MASK 0x0000000000400000
-
-/* SH_EVENT_OVERFLOW_RTC0_INT */
-/* Description: Pending RTC 0 Interrupt */
-#define SH_EVENT_OVERFLOW_RTC0_INT_SHFT 23
-#define SH_EVENT_OVERFLOW_RTC0_INT_MASK 0x0000000000800000
-
-/* SH_EVENT_OVERFLOW_RTC1_INT */
-/* Description: Pending RTC 1 Interrupt */
-#define SH_EVENT_OVERFLOW_RTC1_INT_SHFT 24
-#define SH_EVENT_OVERFLOW_RTC1_INT_MASK 0x0000000001000000
-
-/* SH_EVENT_OVERFLOW_RTC2_INT */
-/* Description: Pending RTC 2 Interrupt */
-#define SH_EVENT_OVERFLOW_RTC2_INT_SHFT 25
-#define SH_EVENT_OVERFLOW_RTC2_INT_MASK 0x0000000002000000
-
-/* SH_EVENT_OVERFLOW_RTC3_INT */
-/* Description: Pending RTC 3 Interrupt */
-#define SH_EVENT_OVERFLOW_RTC3_INT_SHFT 26
-#define SH_EVENT_OVERFLOW_RTC3_INT_MASK 0x0000000004000000
-
-/* SH_EVENT_OVERFLOW_PROFILE_INT */
-/* Description: Pending Profile Interrupt */
-#define SH_EVENT_OVERFLOW_PROFILE_INT_SHFT 27
-#define SH_EVENT_OVERFLOW_PROFILE_INT_MASK 0x0000000008000000
-
-/* ==================================================================== */
-/* Register "SH_EVENT_OVERFLOW_ALIAS" */
-/* SHub Interrupt Event Occurred Overflow Alias */
-/* ==================================================================== */
-
-#define SH_EVENT_OVERFLOW_ALIAS 0x0000000110010088
-
-/* ==================================================================== */
-/* Register "SH_JUNK_BUS_TIME" */
-/* Junk Bus Timing */
-/* ==================================================================== */
-
-#define SH_JUNK_BUS_TIME 0x0000000110020000
-#define SH_JUNK_BUS_TIME_MASK 0x00000000ffffffff
-#define SH_JUNK_BUS_TIME_INIT 0x0000000040404040
-
-/* SH_JUNK_BUS_TIME_FPROM_SETUP_HOLD */
-/* Description: Fprom_Setup_Hold */
-#define SH_JUNK_BUS_TIME_FPROM_SETUP_HOLD_SHFT 0
-#define SH_JUNK_BUS_TIME_FPROM_SETUP_HOLD_MASK 0x00000000000000ff
-
-/* SH_JUNK_BUS_TIME_FPROM_ENABLE */
-/* Description: Fprom_Enable */
-#define SH_JUNK_BUS_TIME_FPROM_ENABLE_SHFT 8
-#define SH_JUNK_BUS_TIME_FPROM_ENABLE_MASK 0x000000000000ff00
-
-/* SH_JUNK_BUS_TIME_UART_SETUP_HOLD */
-/* Description: Uart_Setup_Hold */
-#define SH_JUNK_BUS_TIME_UART_SETUP_HOLD_SHFT 16
-#define SH_JUNK_BUS_TIME_UART_SETUP_HOLD_MASK 0x0000000000ff0000
-
-/* SH_JUNK_BUS_TIME_UART_ENABLE */
-/* Description: Uart_Enable */
-#define SH_JUNK_BUS_TIME_UART_ENABLE_SHFT 24
-#define SH_JUNK_BUS_TIME_UART_ENABLE_MASK 0x00000000ff000000
-
-/* ==================================================================== */
-/* Register "SH_JUNK_LATCH_TIME" */
-/* Junk Bus Latch Timing */
-/* ==================================================================== */
-
-#define SH_JUNK_LATCH_TIME 0x0000000110020080
-#define SH_JUNK_LATCH_TIME_MASK 0x0000000000000007
-#define SH_JUNK_LATCH_TIME_INIT 0x0000000000000002
-
-/* SH_JUNK_LATCH_TIME_SETUP_HOLD */
-/* Description: Setup and Hold Time */
-#define SH_JUNK_LATCH_TIME_SETUP_HOLD_SHFT 0
-#define SH_JUNK_LATCH_TIME_SETUP_HOLD_MASK 0x0000000000000007
-
-/* ==================================================================== */
-/* Register "SH_JUNK_NACK_RESET" */
-/* Junk Bus Nack Counter Reset */
-/* ==================================================================== */
-
-#define SH_JUNK_NACK_RESET 0x0000000110020100
-#define SH_JUNK_NACK_RESET_MASK 0x0000000000000001
-#define SH_JUNK_NACK_RESET_INIT 0x0000000000000000
-
-/* SH_JUNK_NACK_RESET_PULSE */
-/* Description: Junk bus nack counter reset */
-#define SH_JUNK_NACK_RESET_PULSE_SHFT 0
-#define SH_JUNK_NACK_RESET_PULSE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_JUNK_BUS_LED0" */
-/* Junk Bus LED0 */
-/* ==================================================================== */
-
-#define SH_JUNK_BUS_LED0 0x0000000110030000
-#define SH_JUNK_BUS_LED0_MASK 0x00000000000000ff
-#define SH_JUNK_BUS_LED0_INIT 0x0000000000000000
-
-/* SH_JUNK_BUS_LED0_LED0_DATA */
-/* Description: LED0_data */
-#define SH_JUNK_BUS_LED0_LED0_DATA_SHFT 0
-#define SH_JUNK_BUS_LED0_LED0_DATA_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_JUNK_BUS_LED1" */
-/* Junk Bus LED1 */
-/* ==================================================================== */
-
-#define SH_JUNK_BUS_LED1 0x0000000110030080
-#define SH_JUNK_BUS_LED1_MASK 0x00000000000000ff
-#define SH_JUNK_BUS_LED1_INIT 0x0000000000000000
-
-/* SH_JUNK_BUS_LED1_LED1_DATA */
-/* Description: LED1_data */
-#define SH_JUNK_BUS_LED1_LED1_DATA_SHFT 0
-#define SH_JUNK_BUS_LED1_LED1_DATA_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_JUNK_BUS_LED2" */
-/* Junk Bus LED2 */
-/* ==================================================================== */
-
-#define SH_JUNK_BUS_LED2 0x0000000110030100
-#define SH_JUNK_BUS_LED2_MASK 0x00000000000000ff
-#define SH_JUNK_BUS_LED2_INIT 0x0000000000000000
-
-/* SH_JUNK_BUS_LED2_LED2_DATA */
-/* Description: LED2_data */
-#define SH_JUNK_BUS_LED2_LED2_DATA_SHFT 0
-#define SH_JUNK_BUS_LED2_LED2_DATA_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_JUNK_BUS_LED3" */
-/* Junk Bus LED3 */
-/* ==================================================================== */
-
-#define SH_JUNK_BUS_LED3 0x0000000110030180
-#define SH_JUNK_BUS_LED3_MASK 0x00000000000000ff
-#define SH_JUNK_BUS_LED3_INIT 0x0000000000000000
-
-/* SH_JUNK_BUS_LED3_LED3_DATA */
-/* Description: LED3_data */
-#define SH_JUNK_BUS_LED3_LED3_DATA_SHFT 0
-#define SH_JUNK_BUS_LED3_LED3_DATA_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_JUNK_ERROR_STATUS" */
-/* Junk Bus Error Status */
-/* ==================================================================== */
-
-#define SH_JUNK_ERROR_STATUS 0x0000000110030200
-#define SH_JUNK_ERROR_STATUS_MASK 0x1fff7fffffffffff
-#define SH_JUNK_ERROR_STATUS_INIT 0x0000000000000000
-
-/* SH_JUNK_ERROR_STATUS_ADDRESS */
-/* Description: Failing junk bus address */
-#define SH_JUNK_ERROR_STATUS_ADDRESS_SHFT 0
-#define SH_JUNK_ERROR_STATUS_ADDRESS_MASK 0x00007fffffffffff
-
-/* SH_JUNK_ERROR_STATUS_CMD */
-/* Description: Junk bus command */
-#define SH_JUNK_ERROR_STATUS_CMD_SHFT 48
-#define SH_JUNK_ERROR_STATUS_CMD_MASK 0x00ff000000000000
-
-/* SH_JUNK_ERROR_STATUS_MODE */
-/* Description: Mode */
-#define SH_JUNK_ERROR_STATUS_MODE_SHFT 56
-#define SH_JUNK_ERROR_STATUS_MODE_MASK 0x0100000000000000
-
-/* SH_JUNK_ERROR_STATUS_STATUS */
-/* Description: Status */
-#define SH_JUNK_ERROR_STATUS_STATUS_SHFT 57
-#define SH_JUNK_ERROR_STATUS_STATUS_MASK 0x1e00000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_STAT" */
-/* This register describes the LLP status. */
-/* ==================================================================== */
-
-#define SH_NI0_LLP_STAT 0x0000000150000000
-#define SH_NI0_LLP_STAT_MASK 0x000000000000000f
-#define SH_NI0_LLP_STAT_INIT 0x0000000000000000
-
-/* SH_NI0_LLP_STAT_LINK_RESET_STATE */
-/* Description: Status of LLP link. */
-#define SH_NI0_LLP_STAT_LINK_RESET_STATE_SHFT 0
-#define SH_NI0_LLP_STAT_LINK_RESET_STATE_MASK 0x000000000000000f
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_RESET" */
-/* Writing issues a reset to the network interface */
-/* ==================================================================== */
-
-#define SH_NI0_LLP_RESET 0x0000000150000008
-#define SH_NI0_LLP_RESET_MASK 0x0000000000000003
-#define SH_NI0_LLP_RESET_INIT 0x0000000000000000
-
-/* SH_NI0_LLP_RESET_LINK */
-/* Description: Send Link Reset. Generates a pulse. */
-#define SH_NI0_LLP_RESET_LINK_SHFT 0
-#define SH_NI0_LLP_RESET_LINK_MASK 0x0000000000000001
-
-/* SH_NI0_LLP_RESET_WARM */
-/* Description: Send Warm Reset. Generates a pulse. */
-#define SH_NI0_LLP_RESET_WARM_SHFT 1
-#define SH_NI0_LLP_RESET_WARM_MASK 0x0000000000000002
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_RESET_EN" */
-/* Controls LLP warm reset propagation */
-/* ==================================================================== */
-
-#define SH_NI0_LLP_RESET_EN 0x0000000150000010
-#define SH_NI0_LLP_RESET_EN_MASK 0x0000000000000001
-#define SH_NI0_LLP_RESET_EN_INIT 0x0000000000000001
-
-/* SH_NI0_LLP_RESET_EN_OK */
-/* Description: Allow LLP warm reset to reset SHUB */
-#define SH_NI0_LLP_RESET_EN_OK_SHFT 0
-#define SH_NI0_LLP_RESET_EN_OK_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_CHAN_MODE" */
-/* Sets the signaling mode of LLP and channel */
-/* ==================================================================== */
-
-#define SH_NI0_LLP_CHAN_MODE 0x0000000150000018
-#define SH_NI0_LLP_CHAN_MODE_MASK 0x000000000000001f
-#define SH_NI0_LLP_CHAN_MODE_INIT 0x0000000000000000
-
-/* SH_NI0_LLP_CHAN_MODE_BITMODE32 */
-/* Description: Enables 32-bit (plus sideband) channel phits */
-#define SH_NI0_LLP_CHAN_MODE_BITMODE32_SHFT 0
-#define SH_NI0_LLP_CHAN_MODE_BITMODE32_MASK 0x0000000000000001
-
-/* SH_NI0_LLP_CHAN_MODE_AC_ENCODE */
-/* Description: Enables nearly dc-free encoding for AC-coupling */
-#define SH_NI0_LLP_CHAN_MODE_AC_ENCODE_SHFT 1
-#define SH_NI0_LLP_CHAN_MODE_AC_ENCODE_MASK 0x0000000000000002
-
-/* SH_NI0_LLP_CHAN_MODE_ENABLE_TUNING */
-/* Description: Enables automatic tuning of channel skew. */
-#define SH_NI0_LLP_CHAN_MODE_ENABLE_TUNING_SHFT 2
-#define SH_NI0_LLP_CHAN_MODE_ENABLE_TUNING_MASK 0x0000000000000004
-
-/* SH_NI0_LLP_CHAN_MODE_ENABLE_RMT_FT_UPD */
-/* Description: Enables remote fine tune updates */
-#define SH_NI0_LLP_CHAN_MODE_ENABLE_RMT_FT_UPD_SHFT 3
-#define SH_NI0_LLP_CHAN_MODE_ENABLE_RMT_FT_UPD_MASK 0x0000000000000008
-
-/* SH_NI0_LLP_CHAN_MODE_ENABLE_CLKQUAD */
-/* Description: Enables quadrature clock in the pfssd */
-#define SH_NI0_LLP_CHAN_MODE_ENABLE_CLKQUAD_SHFT 4
-#define SH_NI0_LLP_CHAN_MODE_ENABLE_CLKQUAD_MASK 0x0000000000000010
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_CONFIG" */
-/* Sets the configuration of LLP and channel */
-/* ==================================================================== */
-
-#define SH_NI0_LLP_CONFIG 0x0000000150000020
-#define SH_NI0_LLP_CONFIG_MASK 0x0000003fffffffff
-#define SH_NI0_LLP_CONFIG_INIT 0x00000007fc6ffd00
-
-/* SH_NI0_LLP_CONFIG_MAXBURST */
-#define SH_NI0_LLP_CONFIG_MAXBURST_SHFT 0
-#define SH_NI0_LLP_CONFIG_MAXBURST_MASK 0x00000000000003ff
-
-/* SH_NI0_LLP_CONFIG_MAXRETRY */
-#define SH_NI0_LLP_CONFIG_MAXRETRY_SHFT 10
-#define SH_NI0_LLP_CONFIG_MAXRETRY_MASK 0x00000000000ffc00
-
-/* SH_NI0_LLP_CONFIG_NULLTIMEOUT */
-#define SH_NI0_LLP_CONFIG_NULLTIMEOUT_SHFT 20
-#define SH_NI0_LLP_CONFIG_NULLTIMEOUT_MASK 0x0000000003f00000
-
-/* SH_NI0_LLP_CONFIG_FTU_TIME */
-#define SH_NI0_LLP_CONFIG_FTU_TIME_SHFT 26
-#define SH_NI0_LLP_CONFIG_FTU_TIME_MASK 0x0000003ffc000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_TEST_CTL" */
-/* ==================================================================== */
-
-#define SH_NI0_LLP_TEST_CTL 0x0000000150000028
-#define SH_NI0_LLP_TEST_CTL_MASK 0x7ff3f3ffffffffff
-#define SH_NI0_LLP_TEST_CTL_INIT 0x000000000a5fffff
-
-/* SH_NI0_LLP_TEST_CTL_PATTERN */
-/* Description: Send channel data pattern */
-#define SH_NI0_LLP_TEST_CTL_PATTERN_SHFT 0
-#define SH_NI0_LLP_TEST_CTL_PATTERN_MASK 0x000000ffffffffff
-
-/* SH_NI0_LLP_TEST_CTL_SEND_TEST_MODE */
-/* Description: Enables continuous send of data */
-#define SH_NI0_LLP_TEST_CTL_SEND_TEST_MODE_SHFT 40
-#define SH_NI0_LLP_TEST_CTL_SEND_TEST_MODE_MASK 0x0000030000000000
-
-/* SH_NI0_LLP_TEST_CTL_WIRE_SEL */
-#define SH_NI0_LLP_TEST_CTL_WIRE_SEL_SHFT 44
-#define SH_NI0_LLP_TEST_CTL_WIRE_SEL_MASK 0x0003f00000000000
-
-/* SH_NI0_LLP_TEST_CTL_LFSR_MODE */
-#define SH_NI0_LLP_TEST_CTL_LFSR_MODE_SHFT 52
-#define SH_NI0_LLP_TEST_CTL_LFSR_MODE_MASK 0x0030000000000000
-
-/* SH_NI0_LLP_TEST_CTL_NOISE_MODE */
-#define SH_NI0_LLP_TEST_CTL_NOISE_MODE_SHFT 54
-#define SH_NI0_LLP_TEST_CTL_NOISE_MODE_MASK 0x00c0000000000000
-
-/* SH_NI0_LLP_TEST_CTL_ARMCAPTURE */
-/* Description: Enable Capture of Next MicroPacket */
-#define SH_NI0_LLP_TEST_CTL_ARMCAPTURE_SHFT 56
-#define SH_NI0_LLP_TEST_CTL_ARMCAPTURE_MASK 0x0100000000000000
-
-/* SH_NI0_LLP_TEST_CTL_CAPTURECBONLY */
-/* Description: Only capture a micropacket with a Check Byte error */
-#define SH_NI0_LLP_TEST_CTL_CAPTURECBONLY_SHFT 57
-#define SH_NI0_LLP_TEST_CTL_CAPTURECBONLY_MASK 0x0200000000000000
-
-/* SH_NI0_LLP_TEST_CTL_SENDCBERROR */
-/* Description: Sends a single error */
-#define SH_NI0_LLP_TEST_CTL_SENDCBERROR_SHFT 58
-#define SH_NI0_LLP_TEST_CTL_SENDCBERROR_MASK 0x0400000000000000
-
-/* SH_NI0_LLP_TEST_CTL_SENDSNERROR */
-/* Description: Sends a single sequence number error */
-#define SH_NI0_LLP_TEST_CTL_SENDSNERROR_SHFT 59
-#define SH_NI0_LLP_TEST_CTL_SENDSNERROR_MASK 0x0800000000000000
-
-/* SH_NI0_LLP_TEST_CTL_FAKESNERROR */
-/* Description: Causes receiver to pretend it saw a sn error */
-#define SH_NI0_LLP_TEST_CTL_FAKESNERROR_SHFT 60
-#define SH_NI0_LLP_TEST_CTL_FAKESNERROR_MASK 0x1000000000000000
-
-/* SH_NI0_LLP_TEST_CTL_CAPTURED */
-/* Description: Indicates a Valid Micropacket was captured */
-#define SH_NI0_LLP_TEST_CTL_CAPTURED_SHFT 61
-#define SH_NI0_LLP_TEST_CTL_CAPTURED_MASK 0x2000000000000000
-
-/* SH_NI0_LLP_TEST_CTL_CBERROR */
-/* Description: Indicates a Micropacket with a CB error was capture */
-#define SH_NI0_LLP_TEST_CTL_CBERROR_SHFT 62
-#define SH_NI0_LLP_TEST_CTL_CBERROR_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_CAPT_WD1" */
-/* low order 64-bit captured word */
-/* ==================================================================== */
-
-#define SH_NI0_LLP_CAPT_WD1 0x0000000150000030
-#define SH_NI0_LLP_CAPT_WD1_MASK 0xffffffffffffffff
-#define SH_NI0_LLP_CAPT_WD1_INIT 0x0000000000000000
-
-/* SH_NI0_LLP_CAPT_WD1_DATA */
-/* Description: low order 64-bit captured word */
-#define SH_NI0_LLP_CAPT_WD1_DATA_SHFT 0
-#define SH_NI0_LLP_CAPT_WD1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_CAPT_WD2" */
-/* high order 64-bit captured word */
-/* ==================================================================== */
-
-#define SH_NI0_LLP_CAPT_WD2 0x0000000150000038
-#define SH_NI0_LLP_CAPT_WD2_MASK 0xffffffffffffffff
-#define SH_NI0_LLP_CAPT_WD2_INIT 0x0000000000000000
-
-/* SH_NI0_LLP_CAPT_WD2_DATA */
-/* Description: high order 64-bit captured word */
-#define SH_NI0_LLP_CAPT_WD2_DATA_SHFT 0
-#define SH_NI0_LLP_CAPT_WD2_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_CAPT_SBCB" */
-/* captured sideband, sequence, and CRC */
-/* ==================================================================== */
-
-#define SH_NI0_LLP_CAPT_SBCB 0x0000000150000040
-#define SH_NI0_LLP_CAPT_SBCB_MASK 0x0000001fffffffff
-#define SH_NI0_LLP_CAPT_SBCB_INIT 0x0000000000000000
-
-/* SH_NI0_LLP_CAPT_SBCB_CAPTUREDRCVSBSN */
-/* Description: sideband and sequence */
-#define SH_NI0_LLP_CAPT_SBCB_CAPTUREDRCVSBSN_SHFT 0
-#define SH_NI0_LLP_CAPT_SBCB_CAPTUREDRCVSBSN_MASK 0x000000000000ffff
-
-/* SH_NI0_LLP_CAPT_SBCB_CAPTUREDRCVCRC */
-/* Description: CRC */
-#define SH_NI0_LLP_CAPT_SBCB_CAPTUREDRCVCRC_SHFT 16
-#define SH_NI0_LLP_CAPT_SBCB_CAPTUREDRCVCRC_MASK 0x00000000ffff0000
-
-/* SH_NI0_LLP_CAPT_SBCB_SENTALLCBERRORS */
-/* Description: All CB errors have been sent */
-#define SH_NI0_LLP_CAPT_SBCB_SENTALLCBERRORS_SHFT 32
-#define SH_NI0_LLP_CAPT_SBCB_SENTALLCBERRORS_MASK 0x0000000100000000
-
-/* SH_NI0_LLP_CAPT_SBCB_SENTALLSNERRORS */
-/* Description: All SN errors have been sent */
-#define SH_NI0_LLP_CAPT_SBCB_SENTALLSNERRORS_SHFT 33
-#define SH_NI0_LLP_CAPT_SBCB_SENTALLSNERRORS_MASK 0x0000000200000000
-
-/* SH_NI0_LLP_CAPT_SBCB_FAKEDALLSNERRORS */
-/* Description: All faked SN errors have been sent */
-#define SH_NI0_LLP_CAPT_SBCB_FAKEDALLSNERRORS_SHFT 34
-#define SH_NI0_LLP_CAPT_SBCB_FAKEDALLSNERRORS_MASK 0x0000000400000000
-
-/* SH_NI0_LLP_CAPT_SBCB_CHARGEOVERFLOW */
-/* Description: wire charge counter overflowed, valid if llp_mode e */
-#define SH_NI0_LLP_CAPT_SBCB_CHARGEOVERFLOW_SHFT 35
-#define SH_NI0_LLP_CAPT_SBCB_CHARGEOVERFLOW_MASK 0x0000000800000000
-
-/* SH_NI0_LLP_CAPT_SBCB_CHARGEUNDERFLOW */
-/* Description: wire charge counter underflowed, valid if llp_mode */
-/* enabled */
-#define SH_NI0_LLP_CAPT_SBCB_CHARGEUNDERFLOW_SHFT 36
-#define SH_NI0_LLP_CAPT_SBCB_CHARGEUNDERFLOW_MASK 0x0000001000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_ERR" */
-/* ==================================================================== */
-
-#define SH_NI0_LLP_ERR 0x0000000150000048
-#define SH_NI0_LLP_ERR_MASK 0x001fffffffffffff
-#define SH_NI0_LLP_ERR_INIT 0x0000000000000000
-
-/* SH_NI0_LLP_ERR_RX_SN_ERR_COUNT */
-/* Description: Counts the sequence number errors received */
-#define SH_NI0_LLP_ERR_RX_SN_ERR_COUNT_SHFT 0
-#define SH_NI0_LLP_ERR_RX_SN_ERR_COUNT_MASK 0x00000000000000ff
-
-/* SH_NI0_LLP_ERR_RX_CB_ERR_COUNT */
-/* Description: Counts the check byte errors received */
-#define SH_NI0_LLP_ERR_RX_CB_ERR_COUNT_SHFT 8
-#define SH_NI0_LLP_ERR_RX_CB_ERR_COUNT_MASK 0x000000000000ff00
-
-/* SH_NI0_LLP_ERR_RETRY_COUNT */
-/* Description: Counts the retries */
-#define SH_NI0_LLP_ERR_RETRY_COUNT_SHFT 16
-#define SH_NI0_LLP_ERR_RETRY_COUNT_MASK 0x0000000000ff0000
-
-/* SH_NI0_LLP_ERR_RETRY_TIMEOUT */
-/* Description: Indicates a retry timeout has occurred */
-#define SH_NI0_LLP_ERR_RETRY_TIMEOUT_SHFT 24
-#define SH_NI0_LLP_ERR_RETRY_TIMEOUT_MASK 0x0000000001000000
-
-/* SH_NI0_LLP_ERR_RCV_LINK_RESET */
-/* Description: Indicates a link reset has been received */
-#define SH_NI0_LLP_ERR_RCV_LINK_RESET_SHFT 25
-#define SH_NI0_LLP_ERR_RCV_LINK_RESET_MASK 0x0000000002000000
-
-/* SH_NI0_LLP_ERR_SQUASH */
-/* Description: Indicates a micropacket was squashed */
-#define SH_NI0_LLP_ERR_SQUASH_SHFT 26
-#define SH_NI0_LLP_ERR_SQUASH_MASK 0x0000000004000000
-
-/* SH_NI0_LLP_ERR_POWER_NOT_OK */
-/* Description: Detects and traps a loss of power_OK */
-#define SH_NI0_LLP_ERR_POWER_NOT_OK_SHFT 27
-#define SH_NI0_LLP_ERR_POWER_NOT_OK_MASK 0x0000000008000000
-
-/* SH_NI0_LLP_ERR_WIRE_CNT */
-/* Description: counts the errors detected on a single wire test */
-#define SH_NI0_LLP_ERR_WIRE_CNT_SHFT 28
-#define SH_NI0_LLP_ERR_WIRE_CNT_MASK 0x000ffffff0000000
-
-/* SH_NI0_LLP_ERR_WIRE_OVERFLOW */
-/* Description: wire_error_cnt has overflowed */
-#define SH_NI0_LLP_ERR_WIRE_OVERFLOW_SHFT 52
-#define SH_NI0_LLP_ERR_WIRE_OVERFLOW_MASK 0x0010000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_STAT" */
-/* This register describes the LLP status. */
-/* ==================================================================== */
-
-#define SH_NI1_LLP_STAT 0x0000000150002000
-#define SH_NI1_LLP_STAT_MASK 0x000000000000000f
-#define SH_NI1_LLP_STAT_INIT 0x0000000000000000
-
-/* SH_NI1_LLP_STAT_LINK_RESET_STATE */
-/* Description: Status of LLP link. */
-#define SH_NI1_LLP_STAT_LINK_RESET_STATE_SHFT 0
-#define SH_NI1_LLP_STAT_LINK_RESET_STATE_MASK 0x000000000000000f
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_RESET" */
-/* Writing issues a reset to the network interface */
-/* ==================================================================== */
-
-#define SH_NI1_LLP_RESET 0x0000000150002008
-#define SH_NI1_LLP_RESET_MASK 0x0000000000000003
-#define SH_NI1_LLP_RESET_INIT 0x0000000000000000
-
-/* SH_NI1_LLP_RESET_LINK */
-/* Description: Send Link Reset. Generates a pulse. */
-#define SH_NI1_LLP_RESET_LINK_SHFT 0
-#define SH_NI1_LLP_RESET_LINK_MASK 0x0000000000000001
-
-/* SH_NI1_LLP_RESET_WARM */
-/* Description: Send Warm Reset. Generates a pulse. */
-#define SH_NI1_LLP_RESET_WARM_SHFT 1
-#define SH_NI1_LLP_RESET_WARM_MASK 0x0000000000000002
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_RESET_EN" */
-/* Controls LLP warm reset propagation */
-/* ==================================================================== */
-
-#define SH_NI1_LLP_RESET_EN 0x0000000150002010
-#define SH_NI1_LLP_RESET_EN_MASK 0x0000000000000001
-#define SH_NI1_LLP_RESET_EN_INIT 0x0000000000000001
-
-/* SH_NI1_LLP_RESET_EN_OK */
-/* Description: Allow LLP warm reset to reset SHUB */
-#define SH_NI1_LLP_RESET_EN_OK_SHFT 0
-#define SH_NI1_LLP_RESET_EN_OK_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_CHAN_MODE" */
-/* Sets the signaling mode of LLP and channel */
-/* ==================================================================== */
-
-#define SH_NI1_LLP_CHAN_MODE 0x0000000150002018
-#define SH_NI1_LLP_CHAN_MODE_MASK 0x000000000000001f
-#define SH_NI1_LLP_CHAN_MODE_INIT 0x0000000000000000
-
-/* SH_NI1_LLP_CHAN_MODE_BITMODE32 */
-/* Description: Enables 32-bit (plus sideband) channel phits */
-#define SH_NI1_LLP_CHAN_MODE_BITMODE32_SHFT 0
-#define SH_NI1_LLP_CHAN_MODE_BITMODE32_MASK 0x0000000000000001
-
-/* SH_NI1_LLP_CHAN_MODE_AC_ENCODE */
-/* Description: Enables nearly dc-free encoding for AC-coupling */
-#define SH_NI1_LLP_CHAN_MODE_AC_ENCODE_SHFT 1
-#define SH_NI1_LLP_CHAN_MODE_AC_ENCODE_MASK 0x0000000000000002
-
-/* SH_NI1_LLP_CHAN_MODE_ENABLE_TUNING */
-/* Description: Enables automatic tuning of channel skew. */
-#define SH_NI1_LLP_CHAN_MODE_ENABLE_TUNING_SHFT 2
-#define SH_NI1_LLP_CHAN_MODE_ENABLE_TUNING_MASK 0x0000000000000004
-
-/* SH_NI1_LLP_CHAN_MODE_ENABLE_RMT_FT_UPD */
-/* Description: Enables remote fine tune updates */
-#define SH_NI1_LLP_CHAN_MODE_ENABLE_RMT_FT_UPD_SHFT 3
-#define SH_NI1_LLP_CHAN_MODE_ENABLE_RMT_FT_UPD_MASK 0x0000000000000008
-
-/* SH_NI1_LLP_CHAN_MODE_ENABLE_CLKQUAD */
-/* Description: Enables quadrature clock in the pfssd */
-#define SH_NI1_LLP_CHAN_MODE_ENABLE_CLKQUAD_SHFT 4
-#define SH_NI1_LLP_CHAN_MODE_ENABLE_CLKQUAD_MASK 0x0000000000000010
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_CONFIG" */
-/* Sets the configuration of LLP and channel */
-/* ==================================================================== */
-
-#define SH_NI1_LLP_CONFIG 0x0000000150002020
-#define SH_NI1_LLP_CONFIG_MASK 0x0000003fffffffff
-#define SH_NI1_LLP_CONFIG_INIT 0x00000007fc6ffd00
-
-/* SH_NI1_LLP_CONFIG_MAXBURST */
-#define SH_NI1_LLP_CONFIG_MAXBURST_SHFT 0
-#define SH_NI1_LLP_CONFIG_MAXBURST_MASK 0x00000000000003ff
-
-/* SH_NI1_LLP_CONFIG_MAXRETRY */
-#define SH_NI1_LLP_CONFIG_MAXRETRY_SHFT 10
-#define SH_NI1_LLP_CONFIG_MAXRETRY_MASK 0x00000000000ffc00
-
-/* SH_NI1_LLP_CONFIG_NULLTIMEOUT */
-#define SH_NI1_LLP_CONFIG_NULLTIMEOUT_SHFT 20
-#define SH_NI1_LLP_CONFIG_NULLTIMEOUT_MASK 0x0000000003f00000
-
-/* SH_NI1_LLP_CONFIG_FTU_TIME */
-#define SH_NI1_LLP_CONFIG_FTU_TIME_SHFT 26
-#define SH_NI1_LLP_CONFIG_FTU_TIME_MASK 0x0000003ffc000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_TEST_CTL" */
-/* ==================================================================== */
-
-#define SH_NI1_LLP_TEST_CTL 0x0000000150002028
-#define SH_NI1_LLP_TEST_CTL_MASK 0x7ff3f3ffffffffff
-#define SH_NI1_LLP_TEST_CTL_INIT 0x000000000a5fffff
-
-/* SH_NI1_LLP_TEST_CTL_PATTERN */
-/* Description: Send channel data pattern */
-#define SH_NI1_LLP_TEST_CTL_PATTERN_SHFT 0
-#define SH_NI1_LLP_TEST_CTL_PATTERN_MASK 0x000000ffffffffff
-
-/* SH_NI1_LLP_TEST_CTL_SEND_TEST_MODE */
-/* Description: Enables continuous send of data */
-#define SH_NI1_LLP_TEST_CTL_SEND_TEST_MODE_SHFT 40
-#define SH_NI1_LLP_TEST_CTL_SEND_TEST_MODE_MASK 0x0000030000000000
-
-/* SH_NI1_LLP_TEST_CTL_WIRE_SEL */
-#define SH_NI1_LLP_TEST_CTL_WIRE_SEL_SHFT 44
-#define SH_NI1_LLP_TEST_CTL_WIRE_SEL_MASK 0x0003f00000000000
-
-/* SH_NI1_LLP_TEST_CTL_LFSR_MODE */
-#define SH_NI1_LLP_TEST_CTL_LFSR_MODE_SHFT 52
-#define SH_NI1_LLP_TEST_CTL_LFSR_MODE_MASK 0x0030000000000000
-
-/* SH_NI1_LLP_TEST_CTL_NOISE_MODE */
-#define SH_NI1_LLP_TEST_CTL_NOISE_MODE_SHFT 54
-#define SH_NI1_LLP_TEST_CTL_NOISE_MODE_MASK 0x00c0000000000000
-
-/* SH_NI1_LLP_TEST_CTL_ARMCAPTURE */
-/* Description: Enable Capture of Next MicroPacket */
-#define SH_NI1_LLP_TEST_CTL_ARMCAPTURE_SHFT 56
-#define SH_NI1_LLP_TEST_CTL_ARMCAPTURE_MASK 0x0100000000000000
-
-/* SH_NI1_LLP_TEST_CTL_CAPTURECBONLY */
-/* Description: Only capture a micropacket with a Check Byte error */
-#define SH_NI1_LLP_TEST_CTL_CAPTURECBONLY_SHFT 57
-#define SH_NI1_LLP_TEST_CTL_CAPTURECBONLY_MASK 0x0200000000000000
-
-/* SH_NI1_LLP_TEST_CTL_SENDCBERROR */
-/* Description: Sends a single error */
-#define SH_NI1_LLP_TEST_CTL_SENDCBERROR_SHFT 58
-#define SH_NI1_LLP_TEST_CTL_SENDCBERROR_MASK 0x0400000000000000
-
-/* SH_NI1_LLP_TEST_CTL_SENDSNERROR */
-/* Description: Sends a single sequence number error */
-#define SH_NI1_LLP_TEST_CTL_SENDSNERROR_SHFT 59
-#define SH_NI1_LLP_TEST_CTL_SENDSNERROR_MASK 0x0800000000000000
-
-/* SH_NI1_LLP_TEST_CTL_FAKESNERROR */
-/* Description: Causes receiver to pretend it saw a sn error */
-#define SH_NI1_LLP_TEST_CTL_FAKESNERROR_SHFT 60
-#define SH_NI1_LLP_TEST_CTL_FAKESNERROR_MASK 0x1000000000000000
-
-/* SH_NI1_LLP_TEST_CTL_CAPTURED */
-/* Description: Indicates a Valid Micropacket was captured */
-#define SH_NI1_LLP_TEST_CTL_CAPTURED_SHFT 61
-#define SH_NI1_LLP_TEST_CTL_CAPTURED_MASK 0x2000000000000000
-
-/* SH_NI1_LLP_TEST_CTL_CBERROR */
-/* Description: Indicates a Micropacket with a CB error was capture */
-#define SH_NI1_LLP_TEST_CTL_CBERROR_SHFT 62
-#define SH_NI1_LLP_TEST_CTL_CBERROR_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_CAPT_WD1" */
-/* low order 64-bit captured word */
-/* ==================================================================== */
-
-#define SH_NI1_LLP_CAPT_WD1 0x0000000150002030
-#define SH_NI1_LLP_CAPT_WD1_MASK 0xffffffffffffffff
-#define SH_NI1_LLP_CAPT_WD1_INIT 0x0000000000000000
-
-/* SH_NI1_LLP_CAPT_WD1_DATA */
-/* Description: low order 64-bit captured word */
-#define SH_NI1_LLP_CAPT_WD1_DATA_SHFT 0
-#define SH_NI1_LLP_CAPT_WD1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_CAPT_WD2" */
-/* high order 64-bit captured word */
-/* ==================================================================== */
-
-#define SH_NI1_LLP_CAPT_WD2 0x0000000150002038
-#define SH_NI1_LLP_CAPT_WD2_MASK 0xffffffffffffffff
-#define SH_NI1_LLP_CAPT_WD2_INIT 0x0000000000000000
-
-/* SH_NI1_LLP_CAPT_WD2_DATA */
-/* Description: high order 64-bit captured word */
-#define SH_NI1_LLP_CAPT_WD2_DATA_SHFT 0
-#define SH_NI1_LLP_CAPT_WD2_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_CAPT_SBCB" */
-/* captured sideband, sequence, and CRC */
-/* ==================================================================== */
-
-#define SH_NI1_LLP_CAPT_SBCB 0x0000000150002040
-#define SH_NI1_LLP_CAPT_SBCB_MASK 0x0000001fffffffff
-#define SH_NI1_LLP_CAPT_SBCB_INIT 0x0000000000000000
-
-/* SH_NI1_LLP_CAPT_SBCB_CAPTUREDRCVSBSN */
-/* Description: sideband and sequence */
-#define SH_NI1_LLP_CAPT_SBCB_CAPTUREDRCVSBSN_SHFT 0
-#define SH_NI1_LLP_CAPT_SBCB_CAPTUREDRCVSBSN_MASK 0x000000000000ffff
-
-/* SH_NI1_LLP_CAPT_SBCB_CAPTUREDRCVCRC */
-/* Description: CRC */
-#define SH_NI1_LLP_CAPT_SBCB_CAPTUREDRCVCRC_SHFT 16
-#define SH_NI1_LLP_CAPT_SBCB_CAPTUREDRCVCRC_MASK 0x00000000ffff0000
-
-/* SH_NI1_LLP_CAPT_SBCB_SENTALLCBERRORS */
-/* Description: All CB errors have been sent */
-#define SH_NI1_LLP_CAPT_SBCB_SENTALLCBERRORS_SHFT 32
-#define SH_NI1_LLP_CAPT_SBCB_SENTALLCBERRORS_MASK 0x0000000100000000
-
-/* SH_NI1_LLP_CAPT_SBCB_SENTALLSNERRORS */
-/* Description: All SN errors have been sent */
-#define SH_NI1_LLP_CAPT_SBCB_SENTALLSNERRORS_SHFT 33
-#define SH_NI1_LLP_CAPT_SBCB_SENTALLSNERRORS_MASK 0x0000000200000000
-
-/* SH_NI1_LLP_CAPT_SBCB_FAKEDALLSNERRORS */
-/* Description: All faked SN errors have been sent */
-#define SH_NI1_LLP_CAPT_SBCB_FAKEDALLSNERRORS_SHFT 34
-#define SH_NI1_LLP_CAPT_SBCB_FAKEDALLSNERRORS_MASK 0x0000000400000000
-
-/* SH_NI1_LLP_CAPT_SBCB_CHARGEOVERFLOW */
-/* Description: wire charge counter overflowed, valid if llp_mode e */
-#define SH_NI1_LLP_CAPT_SBCB_CHARGEOVERFLOW_SHFT 35
-#define SH_NI1_LLP_CAPT_SBCB_CHARGEOVERFLOW_MASK 0x0000000800000000
-
-/* SH_NI1_LLP_CAPT_SBCB_CHARGEUNDERFLOW */
-/* Description: wire charge counter underflowed, valid if llp_mode */
-/* enabled */
-#define SH_NI1_LLP_CAPT_SBCB_CHARGEUNDERFLOW_SHFT 36
-#define SH_NI1_LLP_CAPT_SBCB_CHARGEUNDERFLOW_MASK 0x0000001000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_ERR" */
-/* ==================================================================== */
-
-#define SH_NI1_LLP_ERR 0x0000000150002048
-#define SH_NI1_LLP_ERR_MASK 0x001fffffffffffff
-#define SH_NI1_LLP_ERR_INIT 0x0000000000000000
-
-/* SH_NI1_LLP_ERR_RX_SN_ERR_COUNT */
-/* Description: Counts the sequence number errors received */
-#define SH_NI1_LLP_ERR_RX_SN_ERR_COUNT_SHFT 0
-#define SH_NI1_LLP_ERR_RX_SN_ERR_COUNT_MASK 0x00000000000000ff
-
-/* SH_NI1_LLP_ERR_RX_CB_ERR_COUNT */
-/* Description: Counts the check byte errors received */
-#define SH_NI1_LLP_ERR_RX_CB_ERR_COUNT_SHFT 8
-#define SH_NI1_LLP_ERR_RX_CB_ERR_COUNT_MASK 0x000000000000ff00
-
-/* SH_NI1_LLP_ERR_RETRY_COUNT */
-/* Description: Counts the retries */
-#define SH_NI1_LLP_ERR_RETRY_COUNT_SHFT 16
-#define SH_NI1_LLP_ERR_RETRY_COUNT_MASK 0x0000000000ff0000
-
-/* SH_NI1_LLP_ERR_RETRY_TIMEOUT */
-/* Description: Indicates a retry timeout has occurred */
-#define SH_NI1_LLP_ERR_RETRY_TIMEOUT_SHFT 24
-#define SH_NI1_LLP_ERR_RETRY_TIMEOUT_MASK 0x0000000001000000
-
-/* SH_NI1_LLP_ERR_RCV_LINK_RESET */
-/* Description: Indicates a link reset has been received */
-#define SH_NI1_LLP_ERR_RCV_LINK_RESET_SHFT 25
-#define SH_NI1_LLP_ERR_RCV_LINK_RESET_MASK 0x0000000002000000
-
-/* SH_NI1_LLP_ERR_SQUASH */
-/* Description: Indicates a micropacket was squashed */
-#define SH_NI1_LLP_ERR_SQUASH_SHFT 26
-#define SH_NI1_LLP_ERR_SQUASH_MASK 0x0000000004000000
-
-/* SH_NI1_LLP_ERR_POWER_NOT_OK */
-/* Description: Detects and traps a loss of power_OK */
-#define SH_NI1_LLP_ERR_POWER_NOT_OK_SHFT 27
-#define SH_NI1_LLP_ERR_POWER_NOT_OK_MASK 0x0000000008000000
-
-/* SH_NI1_LLP_ERR_WIRE_CNT */
-/* Description: counts the errors detected on a single wire test */
-#define SH_NI1_LLP_ERR_WIRE_CNT_SHFT 28
-#define SH_NI1_LLP_ERR_WIRE_CNT_MASK 0x000ffffff0000000
-
-/* SH_NI1_LLP_ERR_WIRE_OVERFLOW */
-/* Description: wire_error_cnt has overflowed */
-#define SH_NI1_LLP_ERR_WIRE_OVERFLOW_SHFT 52
-#define SH_NI1_LLP_ERR_WIRE_OVERFLOW_MASK 0x0010000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LLP_TO_FIFO02_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW 0x0000000150001010
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_MASK 0x3f3f003f3f00bfbf
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC0_DYN_MASK 0x000000003f000000
-
-/* SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC0_CAP_MASK 0x0000003f00000000
-
-/* SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC2_DYN_MASK 0x003f000000000000
-
-/* SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNNI0_LLP_TO_FIFO02_FLOW_CREDIT_VC2_CAP_MASK 0x3f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LLP_TO_FIFO13_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW 0x0000000150001020
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_MASK 0x3f3f003f3f00bfbf
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC0_DYN_MASK 0x000000003f000000
-
-/* SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC0_CAP_MASK 0x0000003f00000000
-
-/* SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC2_DYN_MASK 0x003f000000000000
-
-/* SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNNI0_LLP_TO_FIFO13_FLOW_CREDIT_VC2_CAP_MASK 0x3f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LLP_DEBIT_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_LLP_DEBIT_FLOW 0x0000000150001030
-#define SH_XNNI0_LLP_DEBIT_FLOW_MASK 0x1f1f1f1f1f1f1f1f
-#define SH_XNNI0_LLP_DEBIT_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC0_DYN_SHFT 0
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC0_DYN_MASK 0x000000000000001f
-
-/* SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC0_CAP_SHFT 8
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC0_CAP_MASK 0x0000000000001f00
-
-/* SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC1_DYN */
-/* Description: vc1 debit dynamic value */
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC1_DYN_SHFT 16
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC1_DYN_MASK 0x00000000001f0000
-
-/* SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC1_CAP */
-/* Description: vc1 debit captured value */
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC1_CAP_SHFT 24
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC1_CAP_MASK 0x000000001f000000
-
-/* SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC2_DYN_SHFT 32
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC2_DYN_MASK 0x0000001f00000000
-
-/* SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC2_CAP_SHFT 40
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC2_CAP_MASK 0x00001f0000000000
-
-/* SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC3_DYN */
-/* Description: vc3 debit dynamic value */
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC3_DYN_SHFT 48
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC3_DYN_MASK 0x001f000000000000
-
-/* SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC3_CAP */
-/* Description: vc3 debit captured value */
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC3_CAP_SHFT 56
-#define SH_XNNI0_LLP_DEBIT_FLOW_DEBIT_VC3_CAP_MASK 0x1f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LINK_0_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_LINK_0_FLOW 0x0000000150001040
-#define SH_XNNI0_LINK_0_FLOW_MASK 0x000000007f7f7fbf
-#define SH_XNNI0_LINK_0_FLOW_INIT 0x0000000000001800
-
-/* SH_XNNI0_LINK_0_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI0_LINK_0_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI0_LINK_0_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_LINK_0_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on vc0 from debit cntr */
-#define SH_XNNI0_LINK_0_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI0_LINK_0_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI0_LINK_0_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 Limit Test */
-#define SH_XNNI0_LINK_0_FLOW_CREDIT_VC0_TEST_SHFT 8
-#define SH_XNNI0_LINK_0_FLOW_CREDIT_VC0_TEST_MASK 0x0000000000007f00
-
-/* SH_XNNI0_LINK_0_FLOW_CREDIT_VC0_DYN */
-/* Description: Dynamic vc0 credit value */
-#define SH_XNNI0_LINK_0_FLOW_CREDIT_VC0_DYN_SHFT 16
-#define SH_XNNI0_LINK_0_FLOW_CREDIT_VC0_DYN_MASK 0x00000000007f0000
-
-/* SH_XNNI0_LINK_0_FLOW_CREDIT_VC0_CAP */
-/* Description: Captured vc0 credit */
-#define SH_XNNI0_LINK_0_FLOW_CREDIT_VC0_CAP_SHFT 24
-#define SH_XNNI0_LINK_0_FLOW_CREDIT_VC0_CAP_MASK 0x000000007f000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LINK_1_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_LINK_1_FLOW 0x0000000150001050
-#define SH_XNNI0_LINK_1_FLOW_MASK 0x000000007f7f7fbf
-#define SH_XNNI0_LINK_1_FLOW_INIT 0x0000000000001800
-
-/* SH_XNNI0_LINK_1_FLOW_DEBIT_VC1_WITHHOLD */
-/* Description: vc1 withhold */
-#define SH_XNNI0_LINK_1_FLOW_DEBIT_VC1_WITHHOLD_SHFT 0
-#define SH_XNNI0_LINK_1_FLOW_DEBIT_VC1_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_LINK_1_FLOW_DEBIT_VC1_FORCE_CRED */
-/* Description: Force Credit on vc1 from debit cntr */
-#define SH_XNNI0_LINK_1_FLOW_DEBIT_VC1_FORCE_CRED_SHFT 7
-#define SH_XNNI0_LINK_1_FLOW_DEBIT_VC1_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI0_LINK_1_FLOW_CREDIT_VC1_TEST */
-/* Description: vc1 Limit Test */
-#define SH_XNNI0_LINK_1_FLOW_CREDIT_VC1_TEST_SHFT 8
-#define SH_XNNI0_LINK_1_FLOW_CREDIT_VC1_TEST_MASK 0x0000000000007f00
-
-/* SH_XNNI0_LINK_1_FLOW_CREDIT_VC1_DYN */
-/* Description: Dynamic vc1 credit value */
-#define SH_XNNI0_LINK_1_FLOW_CREDIT_VC1_DYN_SHFT 16
-#define SH_XNNI0_LINK_1_FLOW_CREDIT_VC1_DYN_MASK 0x00000000007f0000
-
-/* SH_XNNI0_LINK_1_FLOW_CREDIT_VC1_CAP */
-/* Description: Captured vc1 credit */
-#define SH_XNNI0_LINK_1_FLOW_CREDIT_VC1_CAP_SHFT 24
-#define SH_XNNI0_LINK_1_FLOW_CREDIT_VC1_CAP_MASK 0x000000007f000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LINK_2_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_LINK_2_FLOW 0x0000000150001060
-#define SH_XNNI0_LINK_2_FLOW_MASK 0x000000007f7f7fbf
-#define SH_XNNI0_LINK_2_FLOW_INIT 0x0000000000001800
-
-/* SH_XNNI0_LINK_2_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI0_LINK_2_FLOW_DEBIT_VC2_WITHHOLD_SHFT 0
-#define SH_XNNI0_LINK_2_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_LINK_2_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on vc2 from debit cntr */
-#define SH_XNNI0_LINK_2_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 7
-#define SH_XNNI0_LINK_2_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI0_LINK_2_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 Limit Test */
-#define SH_XNNI0_LINK_2_FLOW_CREDIT_VC2_TEST_SHFT 8
-#define SH_XNNI0_LINK_2_FLOW_CREDIT_VC2_TEST_MASK 0x0000000000007f00
-
-/* SH_XNNI0_LINK_2_FLOW_CREDIT_VC2_DYN */
-/* Description: Dynamic vc2 credit value */
-#define SH_XNNI0_LINK_2_FLOW_CREDIT_VC2_DYN_SHFT 16
-#define SH_XNNI0_LINK_2_FLOW_CREDIT_VC2_DYN_MASK 0x00000000007f0000
-
-/* SH_XNNI0_LINK_2_FLOW_CREDIT_VC2_CAP */
-/* Description: Captured vc2 credit */
-#define SH_XNNI0_LINK_2_FLOW_CREDIT_VC2_CAP_SHFT 24
-#define SH_XNNI0_LINK_2_FLOW_CREDIT_VC2_CAP_MASK 0x000000007f000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LINK_3_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_LINK_3_FLOW 0x0000000150001070
-#define SH_XNNI0_LINK_3_FLOW_MASK 0x000000007f7f7fbf
-#define SH_XNNI0_LINK_3_FLOW_INIT 0x0000000000001800
-
-/* SH_XNNI0_LINK_3_FLOW_DEBIT_VC3_WITHHOLD */
-/* Description: vc3 withhold */
-#define SH_XNNI0_LINK_3_FLOW_DEBIT_VC3_WITHHOLD_SHFT 0
-#define SH_XNNI0_LINK_3_FLOW_DEBIT_VC3_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_LINK_3_FLOW_DEBIT_VC3_FORCE_CRED */
-/* Description: Force Credit on vc3 from debit cntr */
-#define SH_XNNI0_LINK_3_FLOW_DEBIT_VC3_FORCE_CRED_SHFT 7
-#define SH_XNNI0_LINK_3_FLOW_DEBIT_VC3_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI0_LINK_3_FLOW_CREDIT_VC3_TEST */
-/* Description: vc3 Limit Test */
-#define SH_XNNI0_LINK_3_FLOW_CREDIT_VC3_TEST_SHFT 8
-#define SH_XNNI0_LINK_3_FLOW_CREDIT_VC3_TEST_MASK 0x0000000000007f00
-
-/* SH_XNNI0_LINK_3_FLOW_CREDIT_VC3_DYN */
-/* Description: Dynamic vc3 credit value */
-#define SH_XNNI0_LINK_3_FLOW_CREDIT_VC3_DYN_SHFT 16
-#define SH_XNNI0_LINK_3_FLOW_CREDIT_VC3_DYN_MASK 0x00000000007f0000
-
-/* SH_XNNI0_LINK_3_FLOW_CREDIT_VC3_CAP */
-/* Description: Captured vc3 credit */
-#define SH_XNNI0_LINK_3_FLOW_CREDIT_VC3_CAP_SHFT 24
-#define SH_XNNI0_LINK_3_FLOW_CREDIT_VC3_CAP_MASK 0x000000007f000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LLP_TO_FIFO02_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW 0x0000000150003010
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_MASK 0x3f3f003f3f00bfbf
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC0_DYN_MASK 0x000000003f000000
-
-/* SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC0_CAP_MASK 0x0000003f00000000
-
-/* SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC2_DYN_MASK 0x003f000000000000
-
-/* SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNNI1_LLP_TO_FIFO02_FLOW_CREDIT_VC2_CAP_MASK 0x3f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LLP_TO_FIFO13_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW 0x0000000150003020
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_MASK 0x3f3f003f3f00bfbf
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC0_DYN_MASK 0x000000003f000000
-
-/* SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC0_CAP_MASK 0x0000003f00000000
-
-/* SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC2_DYN_MASK 0x003f000000000000
-
-/* SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNNI1_LLP_TO_FIFO13_FLOW_CREDIT_VC2_CAP_MASK 0x3f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LLP_DEBIT_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_LLP_DEBIT_FLOW 0x0000000150003030
-#define SH_XNNI1_LLP_DEBIT_FLOW_MASK 0x1f1f1f1f1f1f1f1f
-#define SH_XNNI1_LLP_DEBIT_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC0_DYN_SHFT 0
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC0_DYN_MASK 0x000000000000001f
-
-/* SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC0_CAP_SHFT 8
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC0_CAP_MASK 0x0000000000001f00
-
-/* SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC1_DYN */
-/* Description: vc1 debit dynamic value */
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC1_DYN_SHFT 16
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC1_DYN_MASK 0x00000000001f0000
-
-/* SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC1_CAP */
-/* Description: vc1 debit captured value */
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC1_CAP_SHFT 24
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC1_CAP_MASK 0x000000001f000000
-
-/* SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC2_DYN_SHFT 32
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC2_DYN_MASK 0x0000001f00000000
-
-/* SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC2_CAP_SHFT 40
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC2_CAP_MASK 0x00001f0000000000
-
-/* SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC3_DYN */
-/* Description: vc3 debit dynamic value */
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC3_DYN_SHFT 48
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC3_DYN_MASK 0x001f000000000000
-
-/* SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC3_CAP */
-/* Description: vc3 debit captured value */
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC3_CAP_SHFT 56
-#define SH_XNNI1_LLP_DEBIT_FLOW_DEBIT_VC3_CAP_MASK 0x1f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LINK_0_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_LINK_0_FLOW 0x0000000150003040
-#define SH_XNNI1_LINK_0_FLOW_MASK 0x000000007f7f7fbf
-#define SH_XNNI1_LINK_0_FLOW_INIT 0x0000000000001800
-
-/* SH_XNNI1_LINK_0_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI1_LINK_0_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI1_LINK_0_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_LINK_0_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on vc0 from debit cntr */
-#define SH_XNNI1_LINK_0_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI1_LINK_0_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI1_LINK_0_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 Limit Test */
-#define SH_XNNI1_LINK_0_FLOW_CREDIT_VC0_TEST_SHFT 8
-#define SH_XNNI1_LINK_0_FLOW_CREDIT_VC0_TEST_MASK 0x0000000000007f00
-
-/* SH_XNNI1_LINK_0_FLOW_CREDIT_VC0_DYN */
-/* Description: Dynamic vc0 credit value */
-#define SH_XNNI1_LINK_0_FLOW_CREDIT_VC0_DYN_SHFT 16
-#define SH_XNNI1_LINK_0_FLOW_CREDIT_VC0_DYN_MASK 0x00000000007f0000
-
-/* SH_XNNI1_LINK_0_FLOW_CREDIT_VC0_CAP */
-/* Description: Captured vc0 credit */
-#define SH_XNNI1_LINK_0_FLOW_CREDIT_VC0_CAP_SHFT 24
-#define SH_XNNI1_LINK_0_FLOW_CREDIT_VC0_CAP_MASK 0x000000007f000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LINK_1_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_LINK_1_FLOW 0x0000000150003050
-#define SH_XNNI1_LINK_1_FLOW_MASK 0x000000007f7f7fbf
-#define SH_XNNI1_LINK_1_FLOW_INIT 0x0000000000001800
-
-/* SH_XNNI1_LINK_1_FLOW_DEBIT_VC1_WITHHOLD */
-/* Description: vc1 withhold */
-#define SH_XNNI1_LINK_1_FLOW_DEBIT_VC1_WITHHOLD_SHFT 0
-#define SH_XNNI1_LINK_1_FLOW_DEBIT_VC1_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_LINK_1_FLOW_DEBIT_VC1_FORCE_CRED */
-/* Description: Force Credit on vc1 from debit cntr */
-#define SH_XNNI1_LINK_1_FLOW_DEBIT_VC1_FORCE_CRED_SHFT 7
-#define SH_XNNI1_LINK_1_FLOW_DEBIT_VC1_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI1_LINK_1_FLOW_CREDIT_VC1_TEST */
-/* Description: vc1 Limit Test */
-#define SH_XNNI1_LINK_1_FLOW_CREDIT_VC1_TEST_SHFT 8
-#define SH_XNNI1_LINK_1_FLOW_CREDIT_VC1_TEST_MASK 0x0000000000007f00
-
-/* SH_XNNI1_LINK_1_FLOW_CREDIT_VC1_DYN */
-/* Description: Dynamic vc1 credit value */
-#define SH_XNNI1_LINK_1_FLOW_CREDIT_VC1_DYN_SHFT 16
-#define SH_XNNI1_LINK_1_FLOW_CREDIT_VC1_DYN_MASK 0x00000000007f0000
-
-/* SH_XNNI1_LINK_1_FLOW_CREDIT_VC1_CAP */
-/* Description: Captured vc1 credit */
-#define SH_XNNI1_LINK_1_FLOW_CREDIT_VC1_CAP_SHFT 24
-#define SH_XNNI1_LINK_1_FLOW_CREDIT_VC1_CAP_MASK 0x000000007f000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LINK_2_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_LINK_2_FLOW 0x0000000150003060
-#define SH_XNNI1_LINK_2_FLOW_MASK 0x000000007f7f7fbf
-#define SH_XNNI1_LINK_2_FLOW_INIT 0x0000000000001800
-
-/* SH_XNNI1_LINK_2_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI1_LINK_2_FLOW_DEBIT_VC2_WITHHOLD_SHFT 0
-#define SH_XNNI1_LINK_2_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_LINK_2_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on vc2 from debit cntr */
-#define SH_XNNI1_LINK_2_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 7
-#define SH_XNNI1_LINK_2_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI1_LINK_2_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 Limit Test */
-#define SH_XNNI1_LINK_2_FLOW_CREDIT_VC2_TEST_SHFT 8
-#define SH_XNNI1_LINK_2_FLOW_CREDIT_VC2_TEST_MASK 0x0000000000007f00
-
-/* SH_XNNI1_LINK_2_FLOW_CREDIT_VC2_DYN */
-/* Description: Dynamic vc2 credit value */
-#define SH_XNNI1_LINK_2_FLOW_CREDIT_VC2_DYN_SHFT 16
-#define SH_XNNI1_LINK_2_FLOW_CREDIT_VC2_DYN_MASK 0x00000000007f0000
-
-/* SH_XNNI1_LINK_2_FLOW_CREDIT_VC2_CAP */
-/* Description: Captured vc2 credit */
-#define SH_XNNI1_LINK_2_FLOW_CREDIT_VC2_CAP_SHFT 24
-#define SH_XNNI1_LINK_2_FLOW_CREDIT_VC2_CAP_MASK 0x000000007f000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LINK_3_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_LINK_3_FLOW 0x0000000150003070
-#define SH_XNNI1_LINK_3_FLOW_MASK 0x000000007f7f7fbf
-#define SH_XNNI1_LINK_3_FLOW_INIT 0x0000000000001800
-
-/* SH_XNNI1_LINK_3_FLOW_DEBIT_VC3_WITHHOLD */
-/* Description: vc3 withhold */
-#define SH_XNNI1_LINK_3_FLOW_DEBIT_VC3_WITHHOLD_SHFT 0
-#define SH_XNNI1_LINK_3_FLOW_DEBIT_VC3_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_LINK_3_FLOW_DEBIT_VC3_FORCE_CRED */
-/* Description: Force Credit on vc3 from debit cntr */
-#define SH_XNNI1_LINK_3_FLOW_DEBIT_VC3_FORCE_CRED_SHFT 7
-#define SH_XNNI1_LINK_3_FLOW_DEBIT_VC3_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI1_LINK_3_FLOW_CREDIT_VC3_TEST */
-/* Description: vc3 Limit Test */
-#define SH_XNNI1_LINK_3_FLOW_CREDIT_VC3_TEST_SHFT 8
-#define SH_XNNI1_LINK_3_FLOW_CREDIT_VC3_TEST_MASK 0x0000000000007f00
-
-/* SH_XNNI1_LINK_3_FLOW_CREDIT_VC3_DYN */
-/* Description: Dynamic vc3 credit value */
-#define SH_XNNI1_LINK_3_FLOW_CREDIT_VC3_DYN_SHFT 16
-#define SH_XNNI1_LINK_3_FLOW_CREDIT_VC3_DYN_MASK 0x00000000007f0000
-
-/* SH_XNNI1_LINK_3_FLOW_CREDIT_VC3_CAP */
-/* Description: Captured vc3 credit */
-#define SH_XNNI1_LINK_3_FLOW_CREDIT_VC3_CAP_SHFT 24
-#define SH_XNNI1_LINK_3_FLOW_CREDIT_VC3_CAP_MASK 0x000000007f000000
-
-/* ==================================================================== */
-/* Register "SH_IILB_LOCAL_TABLE" */
-/* local lookup table */
-/* ==================================================================== */
-
-#define SH_IILB_LOCAL_TABLE 0x0000000150020000
-#define SH_IILB_LOCAL_TABLE_MASK 0x800000000000003f
-#define SH_IILB_LOCAL_TABLE_MEMDEPTH 128
-#define SH_IILB_LOCAL_TABLE_INIT 0x0000000000000000
-
-/* SH_IILB_LOCAL_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_IILB_LOCAL_TABLE_DIR0_SHFT 0
-#define SH_IILB_LOCAL_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_IILB_LOCAL_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_IILB_LOCAL_TABLE_V0_SHFT 4
-#define SH_IILB_LOCAL_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_IILB_LOCAL_TABLE_NI_SEL0 */
-/* Description: ni select for requests */
-#define SH_IILB_LOCAL_TABLE_NI_SEL0_SHFT 5
-#define SH_IILB_LOCAL_TABLE_NI_SEL0_MASK 0x0000000000000020
-
-/* SH_IILB_LOCAL_TABLE_VALID */
-/* Description: Indicates that this entry is valid */
-#define SH_IILB_LOCAL_TABLE_VALID_SHFT 63
-#define SH_IILB_LOCAL_TABLE_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_IILB_GLOBAL_TABLE" */
-/* global lookup table */
-/* ==================================================================== */
-
-#define SH_IILB_GLOBAL_TABLE 0x0000000150020400
-#define SH_IILB_GLOBAL_TABLE_MASK 0x800000000000003f
-#define SH_IILB_GLOBAL_TABLE_MEMDEPTH 16
-#define SH_IILB_GLOBAL_TABLE_INIT 0x0000000000000000
-
-/* SH_IILB_GLOBAL_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_IILB_GLOBAL_TABLE_DIR0_SHFT 0
-#define SH_IILB_GLOBAL_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_IILB_GLOBAL_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_IILB_GLOBAL_TABLE_V0_SHFT 4
-#define SH_IILB_GLOBAL_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_IILB_GLOBAL_TABLE_NI_SEL0 */
-/* Description: ni select for requests */
-#define SH_IILB_GLOBAL_TABLE_NI_SEL0_SHFT 5
-#define SH_IILB_GLOBAL_TABLE_NI_SEL0_MASK 0x0000000000000020
-
-/* SH_IILB_GLOBAL_TABLE_VALID */
-/* Description: Indicates that this entry is valid */
-#define SH_IILB_GLOBAL_TABLE_VALID_SHFT 63
-#define SH_IILB_GLOBAL_TABLE_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_IILB_OVER_RIDE_TABLE" */
-/* If enabled, bypass the Global/Local tables */
-/* ==================================================================== */
-
-#define SH_IILB_OVER_RIDE_TABLE 0x0000000150020480
-#define SH_IILB_OVER_RIDE_TABLE_MASK 0x800000000000003f
-#define SH_IILB_OVER_RIDE_TABLE_INIT 0x8000000000000000
-
-/* SH_IILB_OVER_RIDE_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_IILB_OVER_RIDE_TABLE_DIR0_SHFT 0
-#define SH_IILB_OVER_RIDE_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_IILB_OVER_RIDE_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_IILB_OVER_RIDE_TABLE_V0_SHFT 4
-#define SH_IILB_OVER_RIDE_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_IILB_OVER_RIDE_TABLE_NI_SEL0 */
-/* Description: ni select */
-#define SH_IILB_OVER_RIDE_TABLE_NI_SEL0_SHFT 5
-#define SH_IILB_OVER_RIDE_TABLE_NI_SEL0_MASK 0x0000000000000020
-
-/* SH_IILB_OVER_RIDE_TABLE_ENABLE */
-/* Description: Indicates that this entry is enabled */
-#define SH_IILB_OVER_RIDE_TABLE_ENABLE_SHFT 63
-#define SH_IILB_OVER_RIDE_TABLE_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_IILB_RSP_PLANE_HINT" */
-/* If enabled, invert incoming response only plane hint bit before lo */
-/* ==================================================================== */
-
-#define SH_IILB_RSP_PLANE_HINT 0x0000000150020488
-#define SH_IILB_RSP_PLANE_HINT_MASK 0x0000000000000000
-#define SH_IILB_RSP_PLANE_HINT_INIT 0x0000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_LOCAL_TABLE" */
-/* local lookup table */
-/* ==================================================================== */
-
-#define SH_PI_LOCAL_TABLE 0x0000000150021000
-#define SH_PI_LOCAL_TABLE_MASK 0x8000000000003f3f
-#define SH_PI_LOCAL_TABLE_MEMDEPTH 128
-#define SH_PI_LOCAL_TABLE_INIT 0x0000000000000000
-
-/* SH_PI_LOCAL_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_PI_LOCAL_TABLE_DIR0_SHFT 0
-#define SH_PI_LOCAL_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_PI_LOCAL_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_PI_LOCAL_TABLE_V0_SHFT 4
-#define SH_PI_LOCAL_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_PI_LOCAL_TABLE_NI_SEL0 */
-/* Description: ni select for requests */
-#define SH_PI_LOCAL_TABLE_NI_SEL0_SHFT 5
-#define SH_PI_LOCAL_TABLE_NI_SEL0_MASK 0x0000000000000020
-
-/* SH_PI_LOCAL_TABLE_DIR1 */
-#define SH_PI_LOCAL_TABLE_DIR1_SHFT 8
-#define SH_PI_LOCAL_TABLE_DIR1_MASK 0x0000000000000f00
-
-/* SH_PI_LOCAL_TABLE_V1 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_PI_LOCAL_TABLE_V1_SHFT 12
-#define SH_PI_LOCAL_TABLE_V1_MASK 0x0000000000001000
-
-/* SH_PI_LOCAL_TABLE_NI_SEL1 */
-/* Description: ni select for plane-hint 1 */
-#define SH_PI_LOCAL_TABLE_NI_SEL1_SHFT 13
-#define SH_PI_LOCAL_TABLE_NI_SEL1_MASK 0x0000000000002000
-
-/* SH_PI_LOCAL_TABLE_VALID */
-/* Description: Indicates that this entry is valid */
-#define SH_PI_LOCAL_TABLE_VALID_SHFT 63
-#define SH_PI_LOCAL_TABLE_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_GLOBAL_TABLE" */
-/* global lookup table */
-/* ==================================================================== */
-
-#define SH_PI_GLOBAL_TABLE 0x0000000150021400
-#define SH_PI_GLOBAL_TABLE_MASK 0x8000000000003f3f
-#define SH_PI_GLOBAL_TABLE_MEMDEPTH 16
-#define SH_PI_GLOBAL_TABLE_INIT 0x0000000000000000
-
-/* SH_PI_GLOBAL_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_PI_GLOBAL_TABLE_DIR0_SHFT 0
-#define SH_PI_GLOBAL_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_PI_GLOBAL_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_PI_GLOBAL_TABLE_V0_SHFT 4
-#define SH_PI_GLOBAL_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_PI_GLOBAL_TABLE_NI_SEL0 */
-/* Description: ni select for requests */
-#define SH_PI_GLOBAL_TABLE_NI_SEL0_SHFT 5
-#define SH_PI_GLOBAL_TABLE_NI_SEL0_MASK 0x0000000000000020
-
-/* SH_PI_GLOBAL_TABLE_DIR1 */
-#define SH_PI_GLOBAL_TABLE_DIR1_SHFT 8
-#define SH_PI_GLOBAL_TABLE_DIR1_MASK 0x0000000000000f00
-
-/* SH_PI_GLOBAL_TABLE_V1 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_PI_GLOBAL_TABLE_V1_SHFT 12
-#define SH_PI_GLOBAL_TABLE_V1_MASK 0x0000000000001000
-
-/* SH_PI_GLOBAL_TABLE_NI_SEL1 */
-/* Description: ni select for plane-hint 1 */
-#define SH_PI_GLOBAL_TABLE_NI_SEL1_SHFT 13
-#define SH_PI_GLOBAL_TABLE_NI_SEL1_MASK 0x0000000000002000
-
-/* SH_PI_GLOBAL_TABLE_VALID */
-/* Description: Indicates that this entry is valid */
-#define SH_PI_GLOBAL_TABLE_VALID_SHFT 63
-#define SH_PI_GLOBAL_TABLE_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_OVER_RIDE_TABLE" */
-/* If enabled, bypass the Global/Local tables */
-/* ==================================================================== */
-
-#define SH_PI_OVER_RIDE_TABLE 0x0000000150021480
-#define SH_PI_OVER_RIDE_TABLE_MASK 0x8000000000003f3f
-#define SH_PI_OVER_RIDE_TABLE_INIT 0x8000000000002000
-
-/* SH_PI_OVER_RIDE_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_PI_OVER_RIDE_TABLE_DIR0_SHFT 0
-#define SH_PI_OVER_RIDE_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_PI_OVER_RIDE_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_PI_OVER_RIDE_TABLE_V0_SHFT 4
-#define SH_PI_OVER_RIDE_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_PI_OVER_RIDE_TABLE_NI_SEL0 */
-/* Description: ni select */
-#define SH_PI_OVER_RIDE_TABLE_NI_SEL0_SHFT 5
-#define SH_PI_OVER_RIDE_TABLE_NI_SEL0_MASK 0x0000000000000020
-
-/* SH_PI_OVER_RIDE_TABLE_DIR1 */
-#define SH_PI_OVER_RIDE_TABLE_DIR1_SHFT 8
-#define SH_PI_OVER_RIDE_TABLE_DIR1_MASK 0x0000000000000f00
-
-/* SH_PI_OVER_RIDE_TABLE_V1 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_PI_OVER_RIDE_TABLE_V1_SHFT 12
-#define SH_PI_OVER_RIDE_TABLE_V1_MASK 0x0000000000001000
-
-/* SH_PI_OVER_RIDE_TABLE_NI_SEL1 */
-/* Description: ni select */
-#define SH_PI_OVER_RIDE_TABLE_NI_SEL1_SHFT 13
-#define SH_PI_OVER_RIDE_TABLE_NI_SEL1_MASK 0x0000000000002000
-
-/* SH_PI_OVER_RIDE_TABLE_ENABLE */
-/* Description: Indicates that this entry is enabled */
-#define SH_PI_OVER_RIDE_TABLE_ENABLE_SHFT 63
-#define SH_PI_OVER_RIDE_TABLE_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_RSP_PLANE_HINT" */
-/* If enabled, invert incoming response only plane hint bit before lo */
-/* ==================================================================== */
-
-#define SH_PI_RSP_PLANE_HINT 0x0000000150021488
-#define SH_PI_RSP_PLANE_HINT_MASK 0x0000000000000001
-#define SH_PI_RSP_PLANE_HINT_INIT 0x0000000000000000
-
-/* SH_PI_RSP_PLANE_HINT_INVERT */
-/* Description: Invert Response Plane Hint */
-#define SH_PI_RSP_PLANE_HINT_INVERT_SHFT 0
-#define SH_PI_RSP_PLANE_HINT_INVERT_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_NI0_LOCAL_TABLE" */
-/* local lookup table */
-/* ==================================================================== */
-
-#define SH_NI0_LOCAL_TABLE 0x0000000150022000
-#define SH_NI0_LOCAL_TABLE_MASK 0x800000000000001f
-#define SH_NI0_LOCAL_TABLE_MEMDEPTH 128
-#define SH_NI0_LOCAL_TABLE_INIT 0x0000000000000000
-
-/* SH_NI0_LOCAL_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_NI0_LOCAL_TABLE_DIR0_SHFT 0
-#define SH_NI0_LOCAL_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_NI0_LOCAL_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_NI0_LOCAL_TABLE_V0_SHFT 4
-#define SH_NI0_LOCAL_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_NI0_LOCAL_TABLE_VALID */
-/* Description: Indicates that this entry is valid */
-#define SH_NI0_LOCAL_TABLE_VALID_SHFT 63
-#define SH_NI0_LOCAL_TABLE_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_GLOBAL_TABLE" */
-/* global lookup table */
-/* ==================================================================== */
-
-#define SH_NI0_GLOBAL_TABLE 0x0000000150022400
-#define SH_NI0_GLOBAL_TABLE_MASK 0x800000000000001f
-#define SH_NI0_GLOBAL_TABLE_MEMDEPTH 16
-#define SH_NI0_GLOBAL_TABLE_INIT 0x0000000000000000
-
-/* SH_NI0_GLOBAL_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_NI0_GLOBAL_TABLE_DIR0_SHFT 0
-#define SH_NI0_GLOBAL_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_NI0_GLOBAL_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_NI0_GLOBAL_TABLE_V0_SHFT 4
-#define SH_NI0_GLOBAL_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_NI0_GLOBAL_TABLE_VALID */
-/* Description: Indicates that this entry is valid */
-#define SH_NI0_GLOBAL_TABLE_VALID_SHFT 63
-#define SH_NI0_GLOBAL_TABLE_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_OVER_RIDE_TABLE" */
-/* If enabled, bypass the Global/Local tables */
-/* ==================================================================== */
-
-#define SH_NI0_OVER_RIDE_TABLE 0x0000000150022480
-#define SH_NI0_OVER_RIDE_TABLE_MASK 0x800000000000001f
-#define SH_NI0_OVER_RIDE_TABLE_INIT 0x8000000000000000
-
-/* SH_NI0_OVER_RIDE_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_NI0_OVER_RIDE_TABLE_DIR0_SHFT 0
-#define SH_NI0_OVER_RIDE_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_NI0_OVER_RIDE_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_NI0_OVER_RIDE_TABLE_V0_SHFT 4
-#define SH_NI0_OVER_RIDE_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_NI0_OVER_RIDE_TABLE_ENABLE */
-/* Description: Indicates that this entry is enabled */
-#define SH_NI0_OVER_RIDE_TABLE_ENABLE_SHFT 63
-#define SH_NI0_OVER_RIDE_TABLE_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_RSP_PLANE_HINT" */
-/* If enabled, invert incoming response only plane hint bit before lo */
-/* ==================================================================== */
-
-#define SH_NI0_RSP_PLANE_HINT 0x0000000150022488
-#define SH_NI0_RSP_PLANE_HINT_MASK 0x0000000000000000
-#define SH_NI0_RSP_PLANE_HINT_INIT 0x0000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_LOCAL_TABLE" */
-/* local lookup table */
-/* ==================================================================== */
-
-#define SH_NI1_LOCAL_TABLE 0x0000000150023000
-#define SH_NI1_LOCAL_TABLE_MASK 0x800000000000001f
-#define SH_NI1_LOCAL_TABLE_MEMDEPTH 128
-#define SH_NI1_LOCAL_TABLE_INIT 0x0000000000000000
-
-/* SH_NI1_LOCAL_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_NI1_LOCAL_TABLE_DIR0_SHFT 0
-#define SH_NI1_LOCAL_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_NI1_LOCAL_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_NI1_LOCAL_TABLE_V0_SHFT 4
-#define SH_NI1_LOCAL_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_NI1_LOCAL_TABLE_VALID */
-/* Description: Indicates that this entry is valid */
-#define SH_NI1_LOCAL_TABLE_VALID_SHFT 63
-#define SH_NI1_LOCAL_TABLE_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_GLOBAL_TABLE" */
-/* global lookup table */
-/* ==================================================================== */
-
-#define SH_NI1_GLOBAL_TABLE 0x0000000150023400
-#define SH_NI1_GLOBAL_TABLE_MASK 0x800000000000001f
-#define SH_NI1_GLOBAL_TABLE_MEMDEPTH 16
-#define SH_NI1_GLOBAL_TABLE_INIT 0x0000000000000000
-
-/* SH_NI1_GLOBAL_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_NI1_GLOBAL_TABLE_DIR0_SHFT 0
-#define SH_NI1_GLOBAL_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_NI1_GLOBAL_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_NI1_GLOBAL_TABLE_V0_SHFT 4
-#define SH_NI1_GLOBAL_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_NI1_GLOBAL_TABLE_VALID */
-/* Description: Indicates that this entry is valid */
-#define SH_NI1_GLOBAL_TABLE_VALID_SHFT 63
-#define SH_NI1_GLOBAL_TABLE_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_OVER_RIDE_TABLE" */
-/* If enabled, bypass the Global/Local tables */
-/* ==================================================================== */
-
-#define SH_NI1_OVER_RIDE_TABLE 0x0000000150023480
-#define SH_NI1_OVER_RIDE_TABLE_MASK 0x800000000000001f
-#define SH_NI1_OVER_RIDE_TABLE_INIT 0x8000000000000000
-
-/* SH_NI1_OVER_RIDE_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_NI1_OVER_RIDE_TABLE_DIR0_SHFT 0
-#define SH_NI1_OVER_RIDE_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_NI1_OVER_RIDE_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_NI1_OVER_RIDE_TABLE_V0_SHFT 4
-#define SH_NI1_OVER_RIDE_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_NI1_OVER_RIDE_TABLE_ENABLE */
-/* Description: Indicates that this entry is enabled */
-#define SH_NI1_OVER_RIDE_TABLE_ENABLE_SHFT 63
-#define SH_NI1_OVER_RIDE_TABLE_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_RSP_PLANE_HINT" */
-/* If enabled, invert incoming response only plane hint bit before lo */
-/* ==================================================================== */
-
-#define SH_NI1_RSP_PLANE_HINT 0x0000000150023488
-#define SH_NI1_RSP_PLANE_HINT_MASK 0x0000000000000000
-#define SH_NI1_RSP_PLANE_HINT_INIT 0x0000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_LOCAL_TABLE" */
-/* local lookup table */
-/* ==================================================================== */
-
-#define SH_MD_LOCAL_TABLE 0x0000000150024000
-#define SH_MD_LOCAL_TABLE_MASK 0x8000000000003f3f
-#define SH_MD_LOCAL_TABLE_MEMDEPTH 128
-#define SH_MD_LOCAL_TABLE_INIT 0x0000000000000000
-
-/* SH_MD_LOCAL_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_MD_LOCAL_TABLE_DIR0_SHFT 0
-#define SH_MD_LOCAL_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_MD_LOCAL_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_MD_LOCAL_TABLE_V0_SHFT 4
-#define SH_MD_LOCAL_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_MD_LOCAL_TABLE_NI_SEL0 */
-/* Description: ni select for requests */
-#define SH_MD_LOCAL_TABLE_NI_SEL0_SHFT 5
-#define SH_MD_LOCAL_TABLE_NI_SEL0_MASK 0x0000000000000020
-
-/* SH_MD_LOCAL_TABLE_DIR1 */
-#define SH_MD_LOCAL_TABLE_DIR1_SHFT 8
-#define SH_MD_LOCAL_TABLE_DIR1_MASK 0x0000000000000f00
-
-/* SH_MD_LOCAL_TABLE_V1 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_MD_LOCAL_TABLE_V1_SHFT 12
-#define SH_MD_LOCAL_TABLE_V1_MASK 0x0000000000001000
-
-/* SH_MD_LOCAL_TABLE_NI_SEL1 */
-/* Description: ni select for plane-hint 1 */
-#define SH_MD_LOCAL_TABLE_NI_SEL1_SHFT 13
-#define SH_MD_LOCAL_TABLE_NI_SEL1_MASK 0x0000000000002000
-
-/* SH_MD_LOCAL_TABLE_VALID */
-/* Description: Indicates that this entry is valid */
-#define SH_MD_LOCAL_TABLE_VALID_SHFT 63
-#define SH_MD_LOCAL_TABLE_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_GLOBAL_TABLE" */
-/* global lookup table */
-/* ==================================================================== */
-
-#define SH_MD_GLOBAL_TABLE 0x0000000150024400
-#define SH_MD_GLOBAL_TABLE_MASK 0x8000000000003f3f
-#define SH_MD_GLOBAL_TABLE_MEMDEPTH 16
-#define SH_MD_GLOBAL_TABLE_INIT 0x0000000000000000
-
-/* SH_MD_GLOBAL_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_MD_GLOBAL_TABLE_DIR0_SHFT 0
-#define SH_MD_GLOBAL_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_MD_GLOBAL_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_MD_GLOBAL_TABLE_V0_SHFT 4
-#define SH_MD_GLOBAL_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_MD_GLOBAL_TABLE_NI_SEL0 */
-/* Description: ni select for requests */
-#define SH_MD_GLOBAL_TABLE_NI_SEL0_SHFT 5
-#define SH_MD_GLOBAL_TABLE_NI_SEL0_MASK 0x0000000000000020
-
-/* SH_MD_GLOBAL_TABLE_DIR1 */
-#define SH_MD_GLOBAL_TABLE_DIR1_SHFT 8
-#define SH_MD_GLOBAL_TABLE_DIR1_MASK 0x0000000000000f00
-
-/* SH_MD_GLOBAL_TABLE_V1 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_MD_GLOBAL_TABLE_V1_SHFT 12
-#define SH_MD_GLOBAL_TABLE_V1_MASK 0x0000000000001000
-
-/* SH_MD_GLOBAL_TABLE_NI_SEL1 */
-/* Description: ni select for plane-hint 1 */
-#define SH_MD_GLOBAL_TABLE_NI_SEL1_SHFT 13
-#define SH_MD_GLOBAL_TABLE_NI_SEL1_MASK 0x0000000000002000
-
-/* SH_MD_GLOBAL_TABLE_VALID */
-/* Description: Indicates that this entry is valid */
-#define SH_MD_GLOBAL_TABLE_VALID_SHFT 63
-#define SH_MD_GLOBAL_TABLE_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_OVER_RIDE_TABLE" */
-/* If enabled, bypass the Global/Local tables */
-/* ==================================================================== */
-
-#define SH_MD_OVER_RIDE_TABLE 0x0000000150024480
-#define SH_MD_OVER_RIDE_TABLE_MASK 0x8000000000003f3f
-#define SH_MD_OVER_RIDE_TABLE_INIT 0x8000000000002000
-
-/* SH_MD_OVER_RIDE_TABLE_DIR0 */
-/* Description: Direction field for next chip */
-#define SH_MD_OVER_RIDE_TABLE_DIR0_SHFT 0
-#define SH_MD_OVER_RIDE_TABLE_DIR0_MASK 0x000000000000000f
-
-/* SH_MD_OVER_RIDE_TABLE_V0 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_MD_OVER_RIDE_TABLE_V0_SHFT 4
-#define SH_MD_OVER_RIDE_TABLE_V0_MASK 0x0000000000000010
-
-/* SH_MD_OVER_RIDE_TABLE_NI_SEL0 */
-/* Description: ni select */
-#define SH_MD_OVER_RIDE_TABLE_NI_SEL0_SHFT 5
-#define SH_MD_OVER_RIDE_TABLE_NI_SEL0_MASK 0x0000000000000020
-
-/* SH_MD_OVER_RIDE_TABLE_DIR1 */
-#define SH_MD_OVER_RIDE_TABLE_DIR1_SHFT 8
-#define SH_MD_OVER_RIDE_TABLE_DIR1_MASK 0x0000000000000f00
-
-/* SH_MD_OVER_RIDE_TABLE_V1 */
-/* Description: Low bit of virtual channel for next chip */
-#define SH_MD_OVER_RIDE_TABLE_V1_SHFT 12
-#define SH_MD_OVER_RIDE_TABLE_V1_MASK 0x0000000000001000
-
-/* SH_MD_OVER_RIDE_TABLE_NI_SEL1 */
-/* Description: ni select */
-#define SH_MD_OVER_RIDE_TABLE_NI_SEL1_SHFT 13
-#define SH_MD_OVER_RIDE_TABLE_NI_SEL1_MASK 0x0000000000002000
-
-/* SH_MD_OVER_RIDE_TABLE_ENABLE */
-/* Description: Indicates that this entry is enabled */
-#define SH_MD_OVER_RIDE_TABLE_ENABLE_SHFT 63
-#define SH_MD_OVER_RIDE_TABLE_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_RSP_PLANE_HINT" */
-/* If enabled, invert incoming response only plane hint bit before lo */
-/* ==================================================================== */
-
-#define SH_MD_RSP_PLANE_HINT 0x0000000150024488
-#define SH_MD_RSP_PLANE_HINT_MASK 0x0000000000000001
-#define SH_MD_RSP_PLANE_HINT_INIT 0x0000000000000000
-
-/* SH_MD_RSP_PLANE_HINT_INVERT */
-/* Description: Invert Response Plane Hint */
-#define SH_MD_RSP_PLANE_HINT_INVERT_SHFT 0
-#define SH_MD_RSP_PLANE_HINT_INVERT_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_LB_LIQ_CTL" */
-/* Local Block LIQ Control */
-/* ==================================================================== */
-
-#define SH_LB_LIQ_CTL 0x0000000110040000
-#define SH_LB_LIQ_CTL_MASK 0x0000000000070f1f
-#define SH_LB_LIQ_CTL_INIT 0x0000000000000000
-
-/* SH_LB_LIQ_CTL_LIQ_REQ_CTL */
-/* Description: LIQ Request Control */
-#define SH_LB_LIQ_CTL_LIQ_REQ_CTL_SHFT 0
-#define SH_LB_LIQ_CTL_LIQ_REQ_CTL_MASK 0x000000000000001f
-
-/* SH_LB_LIQ_CTL_LIQ_RPL_CTL */
-/* Description: LIQ Reply Control */
-#define SH_LB_LIQ_CTL_LIQ_RPL_CTL_SHFT 8
-#define SH_LB_LIQ_CTL_LIQ_RPL_CTL_MASK 0x0000000000000f00
-
-/* SH_LB_LIQ_CTL_FORCE_RQ_CREDIT */
-/* Description: Force request credit */
-#define SH_LB_LIQ_CTL_FORCE_RQ_CREDIT_SHFT 16
-#define SH_LB_LIQ_CTL_FORCE_RQ_CREDIT_MASK 0x0000000000010000
-
-/* SH_LB_LIQ_CTL_FORCE_RP_CREDIT */
-/* Description: Force reply credit */
-#define SH_LB_LIQ_CTL_FORCE_RP_CREDIT_SHFT 17
-#define SH_LB_LIQ_CTL_FORCE_RP_CREDIT_MASK 0x0000000000020000
-
-/* SH_LB_LIQ_CTL_FORCE_LINVV_CREDIT */
-/* Description: Force linvv credit */
-#define SH_LB_LIQ_CTL_FORCE_LINVV_CREDIT_SHFT 18
-#define SH_LB_LIQ_CTL_FORCE_LINVV_CREDIT_MASK 0x0000000000040000
-
-/* ==================================================================== */
-/* Register "SH_LB_LOQ_CTL" */
-/* Local Block LOQ Control */
-/* ==================================================================== */
-
-#define SH_LB_LOQ_CTL 0x0000000110040080
-#define SH_LB_LOQ_CTL_MASK 0x0000000000000003
-#define SH_LB_LOQ_CTL_INIT 0x0000000000000000
-
-/* SH_LB_LOQ_CTL_LOQ_REQ_CTL */
-/* Description: LOQ Request Control */
-#define SH_LB_LOQ_CTL_LOQ_REQ_CTL_SHFT 0
-#define SH_LB_LOQ_CTL_LOQ_REQ_CTL_MASK 0x0000000000000001
-
-/* SH_LB_LOQ_CTL_LOQ_RPL_CTL */
-/* Description: LOQ Reply Control */
-#define SH_LB_LOQ_CTL_LOQ_RPL_CTL_SHFT 1
-#define SH_LB_LOQ_CTL_LOQ_RPL_CTL_MASK 0x0000000000000002
-
-/* ==================================================================== */
-/* Register "SH_LB_MAX_REP_CREDIT_CNT" */
-/* Maximum number of reply credits from XN */
-/* ==================================================================== */
-
-#define SH_LB_MAX_REP_CREDIT_CNT 0x0000000110040100
-#define SH_LB_MAX_REP_CREDIT_CNT_MASK 0x000000000000001f
-#define SH_LB_MAX_REP_CREDIT_CNT_INIT 0x000000000000001f
-
-/* SH_LB_MAX_REP_CREDIT_CNT_MAX_CNT */
-/* Description: Max reply credits */
-#define SH_LB_MAX_REP_CREDIT_CNT_MAX_CNT_SHFT 0
-#define SH_LB_MAX_REP_CREDIT_CNT_MAX_CNT_MASK 0x000000000000001f
-
-/* ==================================================================== */
-/* Register "SH_LB_MAX_REQ_CREDIT_CNT" */
-/* Maximum number of request credits from XN */
-/* ==================================================================== */
-
-#define SH_LB_MAX_REQ_CREDIT_CNT 0x0000000110040180
-#define SH_LB_MAX_REQ_CREDIT_CNT_MASK 0x000000000000001f
-#define SH_LB_MAX_REQ_CREDIT_CNT_INIT 0x000000000000001f
-
-/* SH_LB_MAX_REQ_CREDIT_CNT_MAX_CNT */
-/* Description: Max request credits */
-#define SH_LB_MAX_REQ_CREDIT_CNT_MAX_CNT_SHFT 0
-#define SH_LB_MAX_REQ_CREDIT_CNT_MAX_CNT_MASK 0x000000000000001f
-
-/* ==================================================================== */
-/* Register "SH_PIO_TIME_OUT" */
-/* Local Block PIO time out value */
-/* ==================================================================== */
-
-#define SH_PIO_TIME_OUT 0x0000000110040200
-#define SH_PIO_TIME_OUT_MASK 0x000000000000ffff
-#define SH_PIO_TIME_OUT_INIT 0x0000000000000400
-
-/* SH_PIO_TIME_OUT_VALUE */
-/* Description: PIO time out value */
-#define SH_PIO_TIME_OUT_VALUE_SHFT 0
-#define SH_PIO_TIME_OUT_VALUE_MASK 0x000000000000ffff
-
-/* ==================================================================== */
-/* Register "SH_PIO_NACK_RESET" */
-/* Local Block PIO Reset for nack counters */
-/* ==================================================================== */
-
-#define SH_PIO_NACK_RESET 0x0000000110040280
-#define SH_PIO_NACK_RESET_MASK 0x0000000000000001
-#define SH_PIO_NACK_RESET_INIT 0x0000000000000000
-
-/* SH_PIO_NACK_RESET_PULSE */
-/* Description: PIO nack counter reset */
-#define SH_PIO_NACK_RESET_PULSE_SHFT 0
-#define SH_PIO_NACK_RESET_PULSE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_CONVEYOR_BELT_TIME_OUT" */
-/* Local Block conveyor belt time out value */
-/* ==================================================================== */
-
-#define SH_CONVEYOR_BELT_TIME_OUT 0x0000000110040300
-#define SH_CONVEYOR_BELT_TIME_OUT_MASK 0x0000000000000fff
-#define SH_CONVEYOR_BELT_TIME_OUT_INIT 0x0000000000000000
-
-/* SH_CONVEYOR_BELT_TIME_OUT_VALUE */
-/* Description: Conveyor belt time out value */
-#define SH_CONVEYOR_BELT_TIME_OUT_VALUE_SHFT 0
-#define SH_CONVEYOR_BELT_TIME_OUT_VALUE_MASK 0x0000000000000fff
-
-/* ==================================================================== */
-/* Register "SH_LB_CREDIT_STATUS" */
-/* Credit Counter Status Register */
-/* ==================================================================== */
-
-#define SH_LB_CREDIT_STATUS 0x0000000110050000
-#define SH_LB_CREDIT_STATUS_MASK 0x000000000ffff3df
-#define SH_LB_CREDIT_STATUS_INIT 0x0000000000000000
-
-/* SH_LB_CREDIT_STATUS_LIQ_RQ_CREDIT */
-/* Description: LIQ request queue credit counter */
-#define SH_LB_CREDIT_STATUS_LIQ_RQ_CREDIT_SHFT 0
-#define SH_LB_CREDIT_STATUS_LIQ_RQ_CREDIT_MASK 0x000000000000001f
-
-/* SH_LB_CREDIT_STATUS_LIQ_RP_CREDIT */
-/* Description: LIQ reply queue credit counter */
-#define SH_LB_CREDIT_STATUS_LIQ_RP_CREDIT_SHFT 6
-#define SH_LB_CREDIT_STATUS_LIQ_RP_CREDIT_MASK 0x00000000000003c0
-
-/* SH_LB_CREDIT_STATUS_LINVV_CREDIT */
-/* Description: LINVV credit counter */
-#define SH_LB_CREDIT_STATUS_LINVV_CREDIT_SHFT 12
-#define SH_LB_CREDIT_STATUS_LINVV_CREDIT_MASK 0x000000000003f000
-
-/* SH_LB_CREDIT_STATUS_LOQ_RQ_CREDIT */
-/* Description: LOQ request queue credit counter */
-#define SH_LB_CREDIT_STATUS_LOQ_RQ_CREDIT_SHFT 18
-#define SH_LB_CREDIT_STATUS_LOQ_RQ_CREDIT_MASK 0x00000000007c0000
-
-/* SH_LB_CREDIT_STATUS_LOQ_RP_CREDIT */
-/* Description: LOQ reply queue credit counter */
-#define SH_LB_CREDIT_STATUS_LOQ_RP_CREDIT_SHFT 23
-#define SH_LB_CREDIT_STATUS_LOQ_RP_CREDIT_MASK 0x000000000f800000
-
-/* ==================================================================== */
-/* Register "SH_LB_DEBUG_LOCAL_SEL" */
-/* LB Debug Port Select */
-/* ==================================================================== */
-
-#define SH_LB_DEBUG_LOCAL_SEL 0x0000000110050080
-#define SH_LB_DEBUG_LOCAL_SEL_MASK 0xf777777777777777
-#define SH_LB_DEBUG_LOCAL_SEL_INIT 0x0000000000000000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE0_CHIPLET_SEL */
-/* Description: Nibble 0 Chiplet select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE0_CHIPLET_SEL_SHFT 0
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE0_CHIPLET_SEL_MASK 0x0000000000000007
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE1_CHIPLET_SEL */
-/* Description: Nibble 1 Chiplet select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE1_CHIPLET_SEL_SHFT 8
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE1_CHIPLET_SEL_MASK 0x0000000000000700
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE2_CHIPLET_SEL */
-/* Description: Nibble 2 Chiplet select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE2_CHIPLET_SEL_SHFT 16
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE2_CHIPLET_SEL_MASK 0x0000000000070000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE3_CHIPLET_SEL */
-/* Description: Nibble 3 Chiplet select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE3_CHIPLET_SEL_SHFT 24
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE3_CHIPLET_SEL_MASK 0x0000000007000000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE4_CHIPLET_SEL */
-/* Description: Nibble 4 Chiplet select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE4_CHIPLET_SEL_SHFT 32
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE4_CHIPLET_SEL_MASK 0x0000000700000000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE5_CHIPLET_SEL */
-/* Description: Nibble 5 Chiplet select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE5_CHIPLET_SEL_SHFT 40
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE5_CHIPLET_SEL_MASK 0x0000070000000000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE6_CHIPLET_SEL */
-/* Description: Nibble 6 Chiplet select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE6_CHIPLET_SEL_SHFT 48
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE6_CHIPLET_SEL_MASK 0x0007000000000000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE7_CHIPLET_SEL */
-/* Description: Nibble 7 Chiplet select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE7_CHIPLET_SEL_SHFT 56
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE7_CHIPLET_SEL_MASK 0x0700000000000000
-
-/* SH_LB_DEBUG_LOCAL_SEL_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_LB_DEBUG_LOCAL_SEL_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* SH_LB_DEBUG_LOCAL_SEL_TRIGGER_ENABLE */
-/* Description: Enable trigger on bit 32 of Analyzer data */
-#define SH_LB_DEBUG_LOCAL_SEL_TRIGGER_ENABLE_SHFT 63
-#define SH_LB_DEBUG_LOCAL_SEL_TRIGGER_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_LB_DEBUG_PERF_SEL" */
-/* LB Debug Port Performance Select */
-/* ==================================================================== */
-
-#define SH_LB_DEBUG_PERF_SEL 0x0000000110050100
-#define SH_LB_DEBUG_PERF_SEL_MASK 0x7777777777777777
-#define SH_LB_DEBUG_PERF_SEL_INIT 0x0000000000000000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE0_CHIPLET_SEL */
-/* Description: Nibble 0 Chiplet select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE0_CHIPLET_SEL_SHFT 0
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE0_CHIPLET_SEL_MASK 0x0000000000000007
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE1_CHIPLET_SEL */
-/* Description: Nibble 1 Chiplet select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE1_CHIPLET_SEL_SHFT 8
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE1_CHIPLET_SEL_MASK 0x0000000000000700
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE2_CHIPLET_SEL */
-/* Description: Nibble 2 Chiplet select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE2_CHIPLET_SEL_SHFT 16
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE2_CHIPLET_SEL_MASK 0x0000000000070000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE3_CHIPLET_SEL */
-/* Description: Nibble 3 Chiplet select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE3_CHIPLET_SEL_SHFT 24
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE3_CHIPLET_SEL_MASK 0x0000000007000000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE4_CHIPLET_SEL */
-/* Description: Nibble 4 Chiplet select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE4_CHIPLET_SEL_SHFT 32
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE4_CHIPLET_SEL_MASK 0x0000000700000000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE5_CHIPLET_SEL */
-/* Description: Nibble 5 Chiplet select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE5_CHIPLET_SEL_SHFT 40
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE5_CHIPLET_SEL_MASK 0x0000070000000000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE6_CHIPLET_SEL */
-/* Description: Nibble 6 Chiplet select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE6_CHIPLET_SEL_SHFT 48
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE6_CHIPLET_SEL_MASK 0x0007000000000000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE7_CHIPLET_SEL */
-/* Description: Nibble 7 Chiplet select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE7_CHIPLET_SEL_SHFT 56
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE7_CHIPLET_SEL_MASK 0x0700000000000000
-
-/* SH_LB_DEBUG_PERF_SEL_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_LB_DEBUG_PERF_SEL_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_LB_DEBUG_TRIG_SEL" */
-/* LB Debug Trigger Select */
-/* ==================================================================== */
-
-#define SH_LB_DEBUG_TRIG_SEL 0x0000000110050180
-#define SH_LB_DEBUG_TRIG_SEL_MASK 0x7777777777777777
-#define SH_LB_DEBUG_TRIG_SEL_INIT 0x0000000000000000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER0_CHIPLET_SEL */
-/* Description: Nibble 0 Chiplet select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER0_CHIPLET_SEL_SHFT 0
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER0_CHIPLET_SEL_MASK 0x0000000000000007
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER0_NIBBLE_SEL_SHFT 4
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER1_CHIPLET_SEL */
-/* Description: Nibble 1 Chiplet select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER1_CHIPLET_SEL_SHFT 8
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER1_CHIPLET_SEL_MASK 0x0000000000000700
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER1_NIBBLE_SEL_SHFT 12
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER2_CHIPLET_SEL */
-/* Description: Nibble 2 Chiplet select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER2_CHIPLET_SEL_SHFT 16
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER2_CHIPLET_SEL_MASK 0x0000000000070000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER2_NIBBLE_SEL_SHFT 20
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER3_CHIPLET_SEL */
-/* Description: Nibble 3 Chiplet select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER3_CHIPLET_SEL_SHFT 24
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER3_CHIPLET_SEL_MASK 0x0000000007000000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER3_NIBBLE_SEL_SHFT 28
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER4_CHIPLET_SEL */
-/* Description: Nibble 4 Chiplet select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER4_CHIPLET_SEL_SHFT 32
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER4_CHIPLET_SEL_MASK 0x0000000700000000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER4_NIBBLE_SEL_SHFT 36
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER5_CHIPLET_SEL */
-/* Description: Nibble 5 Chiplet select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER5_CHIPLET_SEL_SHFT 40
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER5_CHIPLET_SEL_MASK 0x0000070000000000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER5_NIBBLE_SEL_SHFT 44
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER6_CHIPLET_SEL */
-/* Description: Nibble 6 Chiplet select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER6_CHIPLET_SEL_SHFT 48
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER6_CHIPLET_SEL_MASK 0x0007000000000000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER6_NIBBLE_SEL_SHFT 52
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER7_CHIPLET_SEL */
-/* Description: Nibble 7 Chiplet select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER7_CHIPLET_SEL_SHFT 56
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER7_CHIPLET_SEL_MASK 0x0700000000000000
-
-/* SH_LB_DEBUG_TRIG_SEL_TRIGGER7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER7_NIBBLE_SEL_SHFT 60
-#define SH_LB_DEBUG_TRIG_SEL_TRIGGER7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_DETAIL_1" */
-/* LB Error capture information: HDR1 */
-/* ==================================================================== */
-
-#define SH_LB_ERROR_DETAIL_1 0x0000000110050200
-#define SH_LB_ERROR_DETAIL_1_MASK 0x8003073fff3fffff
-#define SH_LB_ERROR_DETAIL_1_INIT 0x0000000000000000
-
-/* SH_LB_ERROR_DETAIL_1_COMMAND */
-/* Description: COMMAND */
-#define SH_LB_ERROR_DETAIL_1_COMMAND_SHFT 0
-#define SH_LB_ERROR_DETAIL_1_COMMAND_MASK 0x00000000000000ff
-
-/* SH_LB_ERROR_DETAIL_1_SUPPL */
-/* Description: SUPPLMENTAL */
-#define SH_LB_ERROR_DETAIL_1_SUPPL_SHFT 8
-#define SH_LB_ERROR_DETAIL_1_SUPPL_MASK 0x00000000003fff00
-
-/* SH_LB_ERROR_DETAIL_1_SOURCE */
-/* Description: SOURCE */
-#define SH_LB_ERROR_DETAIL_1_SOURCE_SHFT 24
-#define SH_LB_ERROR_DETAIL_1_SOURCE_MASK 0x0000003fff000000
-
-/* SH_LB_ERROR_DETAIL_1_DEST */
-/* Description: DEST */
-#define SH_LB_ERROR_DETAIL_1_DEST_SHFT 40
-#define SH_LB_ERROR_DETAIL_1_DEST_MASK 0x0000070000000000
-
-/* SH_LB_ERROR_DETAIL_1_HDR_ERR */
-/* Description: HDR_ERR */
-#define SH_LB_ERROR_DETAIL_1_HDR_ERR_SHFT 48
-#define SH_LB_ERROR_DETAIL_1_HDR_ERR_MASK 0x0001000000000000
-
-/* SH_LB_ERROR_DETAIL_1_DATA_ERR */
-/* Description: DATA_ERR */
-#define SH_LB_ERROR_DETAIL_1_DATA_ERR_SHFT 49
-#define SH_LB_ERROR_DETAIL_1_DATA_ERR_MASK 0x0002000000000000
-
-/* SH_LB_ERROR_DETAIL_1_VALID */
-/* Description: VALID */
-#define SH_LB_ERROR_DETAIL_1_VALID_SHFT 63
-#define SH_LB_ERROR_DETAIL_1_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_DETAIL_2" */
-/* LB Error Bits */
-/* ==================================================================== */
-
-#define SH_LB_ERROR_DETAIL_2 0x0000000110050280
-#define SH_LB_ERROR_DETAIL_2_MASK 0x00007fffffffffff
-#define SH_LB_ERROR_DETAIL_2_INIT 0x0000000000000000
-
-/* SH_LB_ERROR_DETAIL_2_ADDRESS */
-/* Description: ADDRESS */
-#define SH_LB_ERROR_DETAIL_2_ADDRESS_SHFT 0
-#define SH_LB_ERROR_DETAIL_2_ADDRESS_MASK 0x00007fffffffffff
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_DETAIL_3" */
-/* LB Error Bits */
-/* ==================================================================== */
-
-#define SH_LB_ERROR_DETAIL_3 0x0000000110050300
-#define SH_LB_ERROR_DETAIL_3_MASK 0xffffffffffffffff
-#define SH_LB_ERROR_DETAIL_3_INIT 0x0000000000000000
-
-/* SH_LB_ERROR_DETAIL_3_DATA */
-/* Description: DATA */
-#define SH_LB_ERROR_DETAIL_3_DATA_SHFT 0
-#define SH_LB_ERROR_DETAIL_3_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_DETAIL_4" */
-/* LB Error Bits */
-/* ==================================================================== */
-
-#define SH_LB_ERROR_DETAIL_4 0x0000000110050380
-#define SH_LB_ERROR_DETAIL_4_MASK 0xffffffffffffffff
-#define SH_LB_ERROR_DETAIL_4_INIT 0x0000000000000000
-
-/* SH_LB_ERROR_DETAIL_4_ROUTE */
-/* Description: ROUTE */
-#define SH_LB_ERROR_DETAIL_4_ROUTE_SHFT 0
-#define SH_LB_ERROR_DETAIL_4_ROUTE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_DETAIL_5" */
-/* LB Error Bits */
-/* ==================================================================== */
-
-#define SH_LB_ERROR_DETAIL_5 0x0000000110050400
-#define SH_LB_ERROR_DETAIL_5_MASK 0x000000000000007f
-#define SH_LB_ERROR_DETAIL_5_INIT 0x0000000000000000
-
-/* SH_LB_ERROR_DETAIL_5_READ_RETRY */
-/* Description: Read retry error */
-#define SH_LB_ERROR_DETAIL_5_READ_RETRY_SHFT 0
-#define SH_LB_ERROR_DETAIL_5_READ_RETRY_MASK 0x0000000000000001
-
-/* SH_LB_ERROR_DETAIL_5_PTC1_WRITE */
-/* Description: PTC1 write error */
-#define SH_LB_ERROR_DETAIL_5_PTC1_WRITE_SHFT 1
-#define SH_LB_ERROR_DETAIL_5_PTC1_WRITE_MASK 0x0000000000000002
-
-/* SH_LB_ERROR_DETAIL_5_WRITE_RETRY */
-/* Description: Write retry error */
-#define SH_LB_ERROR_DETAIL_5_WRITE_RETRY_SHFT 2
-#define SH_LB_ERROR_DETAIL_5_WRITE_RETRY_MASK 0x0000000000000004
-
-/* SH_LB_ERROR_DETAIL_5_COUNT_A_OVERFLOW */
-/* Description: Nack A counter overflow error */
-#define SH_LB_ERROR_DETAIL_5_COUNT_A_OVERFLOW_SHFT 3
-#define SH_LB_ERROR_DETAIL_5_COUNT_A_OVERFLOW_MASK 0x0000000000000008
-
-/* SH_LB_ERROR_DETAIL_5_COUNT_B_OVERFLOW */
-/* Description: Nack B counter overflow error */
-#define SH_LB_ERROR_DETAIL_5_COUNT_B_OVERFLOW_SHFT 4
-#define SH_LB_ERROR_DETAIL_5_COUNT_B_OVERFLOW_MASK 0x0000000000000010
-
-/* SH_LB_ERROR_DETAIL_5_NACK_A_TIMEOUT */
-/* Description: Nack A counter timeout error */
-#define SH_LB_ERROR_DETAIL_5_NACK_A_TIMEOUT_SHFT 5
-#define SH_LB_ERROR_DETAIL_5_NACK_A_TIMEOUT_MASK 0x0000000000000020
-
-/* SH_LB_ERROR_DETAIL_5_NACK_B_TIMEOUT */
-/* Description: Nack B counter timeout error */
-#define SH_LB_ERROR_DETAIL_5_NACK_B_TIMEOUT_SHFT 6
-#define SH_LB_ERROR_DETAIL_5_NACK_B_TIMEOUT_MASK 0x0000000000000040
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_MASK" */
-/* LB Error Mask */
-/* ==================================================================== */
-
-#define SH_LB_ERROR_MASK 0x0000000110050480
-#define SH_LB_ERROR_MASK_MASK 0x00000000007fffff
-#define SH_LB_ERROR_MASK_INIT 0x00000000007fffff
-
-/* SH_LB_ERROR_MASK_RQ_BAD_CMD */
-/* Description: RQ_BAD_CMD */
-#define SH_LB_ERROR_MASK_RQ_BAD_CMD_SHFT 0
-#define SH_LB_ERROR_MASK_RQ_BAD_CMD_MASK 0x0000000000000001
-
-/* SH_LB_ERROR_MASK_RP_BAD_CMD */
-/* Description: RP_BAD_CMD */
-#define SH_LB_ERROR_MASK_RP_BAD_CMD_SHFT 1
-#define SH_LB_ERROR_MASK_RP_BAD_CMD_MASK 0x0000000000000002
-
-/* SH_LB_ERROR_MASK_RQ_SHORT */
-/* Description: RQ_SHORT */
-#define SH_LB_ERROR_MASK_RQ_SHORT_SHFT 2
-#define SH_LB_ERROR_MASK_RQ_SHORT_MASK 0x0000000000000004
-
-/* SH_LB_ERROR_MASK_RP_SHORT */
-/* Description: RP_SHORT */
-#define SH_LB_ERROR_MASK_RP_SHORT_SHFT 3
-#define SH_LB_ERROR_MASK_RP_SHORT_MASK 0x0000000000000008
-
-/* SH_LB_ERROR_MASK_RQ_LONG */
-/* Description: RQ_LONG */
-#define SH_LB_ERROR_MASK_RQ_LONG_SHFT 4
-#define SH_LB_ERROR_MASK_RQ_LONG_MASK 0x0000000000000010
-
-/* SH_LB_ERROR_MASK_RP_LONG */
-/* Description: RP_LONG */
-#define SH_LB_ERROR_MASK_RP_LONG_SHFT 5
-#define SH_LB_ERROR_MASK_RP_LONG_MASK 0x0000000000000020
-
-/* SH_LB_ERROR_MASK_RQ_BAD_DATA */
-/* Description: RQ_BAD_DATA */
-#define SH_LB_ERROR_MASK_RQ_BAD_DATA_SHFT 6
-#define SH_LB_ERROR_MASK_RQ_BAD_DATA_MASK 0x0000000000000040
-
-/* SH_LB_ERROR_MASK_RP_BAD_DATA */
-/* Description: RP_BAD_DATA */
-#define SH_LB_ERROR_MASK_RP_BAD_DATA_SHFT 7
-#define SH_LB_ERROR_MASK_RP_BAD_DATA_MASK 0x0000000000000080
-
-/* SH_LB_ERROR_MASK_RQ_BAD_ADDR */
-/* Description: RQ_BAD_ADDR */
-#define SH_LB_ERROR_MASK_RQ_BAD_ADDR_SHFT 8
-#define SH_LB_ERROR_MASK_RQ_BAD_ADDR_MASK 0x0000000000000100
-
-/* SH_LB_ERROR_MASK_RQ_TIME_OUT */
-/* Description: RQ_TIME_OUT */
-#define SH_LB_ERROR_MASK_RQ_TIME_OUT_SHFT 9
-#define SH_LB_ERROR_MASK_RQ_TIME_OUT_MASK 0x0000000000000200
-
-/* SH_LB_ERROR_MASK_LINVV_OVERFLOW */
-/* Description: LINVV_OVERFLOW */
-#define SH_LB_ERROR_MASK_LINVV_OVERFLOW_SHFT 10
-#define SH_LB_ERROR_MASK_LINVV_OVERFLOW_MASK 0x0000000000000400
-
-/* SH_LB_ERROR_MASK_UNEXPECTED_LINV */
-/* Description: UNEXPECTED_LINV */
-#define SH_LB_ERROR_MASK_UNEXPECTED_LINV_SHFT 11
-#define SH_LB_ERROR_MASK_UNEXPECTED_LINV_MASK 0x0000000000000800
-
-/* SH_LB_ERROR_MASK_PTC_1_TIMEOUT */
-/* Description: PTC_1 Time out */
-#define SH_LB_ERROR_MASK_PTC_1_TIMEOUT_SHFT 12
-#define SH_LB_ERROR_MASK_PTC_1_TIMEOUT_MASK 0x0000000000001000
-
-/* SH_LB_ERROR_MASK_JUNK_BUS_ERR */
-/* Description: Junk Bus error */
-#define SH_LB_ERROR_MASK_JUNK_BUS_ERR_SHFT 13
-#define SH_LB_ERROR_MASK_JUNK_BUS_ERR_MASK 0x0000000000002000
-
-/* SH_LB_ERROR_MASK_PIO_CB_ERR */
-/* Description: PIO Conveyor Belt operation error */
-#define SH_LB_ERROR_MASK_PIO_CB_ERR_SHFT 14
-#define SH_LB_ERROR_MASK_PIO_CB_ERR_MASK 0x0000000000004000
-
-/* SH_LB_ERROR_MASK_VECTOR_RQ_ROUTE_ERROR */
-/* Description: Vector request Route data was invalid */
-#define SH_LB_ERROR_MASK_VECTOR_RQ_ROUTE_ERROR_SHFT 15
-#define SH_LB_ERROR_MASK_VECTOR_RQ_ROUTE_ERROR_MASK 0x0000000000008000
-
-/* SH_LB_ERROR_MASK_VECTOR_RP_ROUTE_ERROR */
-/* Description: Vector reply Route data was invalid */
-#define SH_LB_ERROR_MASK_VECTOR_RP_ROUTE_ERROR_SHFT 16
-#define SH_LB_ERROR_MASK_VECTOR_RP_ROUTE_ERROR_MASK 0x0000000000010000
-
-/* SH_LB_ERROR_MASK_GCLK_DROP */
-/* Description: Gclk drop error */
-#define SH_LB_ERROR_MASK_GCLK_DROP_SHFT 17
-#define SH_LB_ERROR_MASK_GCLK_DROP_MASK 0x0000000000020000
-
-/* SH_LB_ERROR_MASK_RQ_FIFO_ERROR */
-/* Description: Request queue FIFO error */
-#define SH_LB_ERROR_MASK_RQ_FIFO_ERROR_SHFT 18
-#define SH_LB_ERROR_MASK_RQ_FIFO_ERROR_MASK 0x0000000000040000
-
-/* SH_LB_ERROR_MASK_RP_FIFO_ERROR */
-/* Description: Reply queue FIFO error */
-#define SH_LB_ERROR_MASK_RP_FIFO_ERROR_SHFT 19
-#define SH_LB_ERROR_MASK_RP_FIFO_ERROR_MASK 0x0000000000080000
-
-/* SH_LB_ERROR_MASK_UNEXP_VALID */
-/* Description: Unexpected valid error */
-#define SH_LB_ERROR_MASK_UNEXP_VALID_SHFT 20
-#define SH_LB_ERROR_MASK_UNEXP_VALID_MASK 0x0000000000100000
-
-/* SH_LB_ERROR_MASK_RQ_CREDIT_OVERFLOW */
-/* Description: Request queue credit overflow */
-#define SH_LB_ERROR_MASK_RQ_CREDIT_OVERFLOW_SHFT 21
-#define SH_LB_ERROR_MASK_RQ_CREDIT_OVERFLOW_MASK 0x0000000000200000
-
-/* SH_LB_ERROR_MASK_RP_CREDIT_OVERFLOW */
-/* Description: Reply queue credit overflow */
-#define SH_LB_ERROR_MASK_RP_CREDIT_OVERFLOW_SHFT 22
-#define SH_LB_ERROR_MASK_RP_CREDIT_OVERFLOW_MASK 0x0000000000400000
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_OVERFLOW" */
-/* LB Error Overflow */
-/* ==================================================================== */
-
-#define SH_LB_ERROR_OVERFLOW 0x0000000110050500
-#define SH_LB_ERROR_OVERFLOW_MASK 0x00000000007fffff
-#define SH_LB_ERROR_OVERFLOW_INIT 0x0000000000000000
-
-/* SH_LB_ERROR_OVERFLOW_RQ_BAD_CMD_OVRFL */
-/* Description: RQ_BAD_CMD_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_RQ_BAD_CMD_OVRFL_SHFT 0
-#define SH_LB_ERROR_OVERFLOW_RQ_BAD_CMD_OVRFL_MASK 0x0000000000000001
-
-/* SH_LB_ERROR_OVERFLOW_RP_BAD_CMD_OVRFL */
-/* Description: RP_BAD_CMD_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_RP_BAD_CMD_OVRFL_SHFT 1
-#define SH_LB_ERROR_OVERFLOW_RP_BAD_CMD_OVRFL_MASK 0x0000000000000002
-
-/* SH_LB_ERROR_OVERFLOW_RQ_SHORT_OVRFL */
-/* Description: RQ_SHORT_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_RQ_SHORT_OVRFL_SHFT 2
-#define SH_LB_ERROR_OVERFLOW_RQ_SHORT_OVRFL_MASK 0x0000000000000004
-
-/* SH_LB_ERROR_OVERFLOW_RP_SHORT_OVRFL */
-/* Description: RP_SHORT_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_RP_SHORT_OVRFL_SHFT 3
-#define SH_LB_ERROR_OVERFLOW_RP_SHORT_OVRFL_MASK 0x0000000000000008
-
-/* SH_LB_ERROR_OVERFLOW_RQ_LONG_OVRFL */
-/* Description: RQ_LONG_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_RQ_LONG_OVRFL_SHFT 4
-#define SH_LB_ERROR_OVERFLOW_RQ_LONG_OVRFL_MASK 0x0000000000000010
-
-/* SH_LB_ERROR_OVERFLOW_RP_LONG_OVRFL */
-/* Description: RP_LONG_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_RP_LONG_OVRFL_SHFT 5
-#define SH_LB_ERROR_OVERFLOW_RP_LONG_OVRFL_MASK 0x0000000000000020
-
-/* SH_LB_ERROR_OVERFLOW_RQ_BAD_DATA_OVRFL */
-/* Description: RQ_BAD_DATA_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_RQ_BAD_DATA_OVRFL_SHFT 6
-#define SH_LB_ERROR_OVERFLOW_RQ_BAD_DATA_OVRFL_MASK 0x0000000000000040
-
-/* SH_LB_ERROR_OVERFLOW_RP_BAD_DATA_OVRFL */
-/* Description: RP_BAD_DATA_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_RP_BAD_DATA_OVRFL_SHFT 7
-#define SH_LB_ERROR_OVERFLOW_RP_BAD_DATA_OVRFL_MASK 0x0000000000000080
-
-/* SH_LB_ERROR_OVERFLOW_RQ_BAD_ADDR_OVRFL */
-/* Description: RQ_BAD_ADDR_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_RQ_BAD_ADDR_OVRFL_SHFT 8
-#define SH_LB_ERROR_OVERFLOW_RQ_BAD_ADDR_OVRFL_MASK 0x0000000000000100
-
-/* SH_LB_ERROR_OVERFLOW_RQ_TIME_OUT_OVRFL */
-/* Description: RQ_TIME_OUT_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_RQ_TIME_OUT_OVRFL_SHFT 9
-#define SH_LB_ERROR_OVERFLOW_RQ_TIME_OUT_OVRFL_MASK 0x0000000000000200
-
-/* SH_LB_ERROR_OVERFLOW_LINVV_OVERFLOW_OVRFL */
-/* Description: LINVV_OVERFLOW_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_LINVV_OVERFLOW_OVRFL_SHFT 10
-#define SH_LB_ERROR_OVERFLOW_LINVV_OVERFLOW_OVRFL_MASK 0x0000000000000400
-
-/* SH_LB_ERROR_OVERFLOW_UNEXPECTED_LINV_OVRFL */
-/* Description: UNEXPECTED_LINV_OVRFL */
-#define SH_LB_ERROR_OVERFLOW_UNEXPECTED_LINV_OVRFL_SHFT 11
-#define SH_LB_ERROR_OVERFLOW_UNEXPECTED_LINV_OVRFL_MASK 0x0000000000000800
-
-/* SH_LB_ERROR_OVERFLOW_PTC_1_TIMEOUT_OVRFL */
-/* Description: PTC_1 Time out overflow */
-#define SH_LB_ERROR_OVERFLOW_PTC_1_TIMEOUT_OVRFL_SHFT 12
-#define SH_LB_ERROR_OVERFLOW_PTC_1_TIMEOUT_OVRFL_MASK 0x0000000000001000
-
-/* SH_LB_ERROR_OVERFLOW_JUNK_BUS_ERR_OVRFL */
-/* Description: Junk Bus error overflow */
-#define SH_LB_ERROR_OVERFLOW_JUNK_BUS_ERR_OVRFL_SHFT 13
-#define SH_LB_ERROR_OVERFLOW_JUNK_BUS_ERR_OVRFL_MASK 0x0000000000002000
-
-/* SH_LB_ERROR_OVERFLOW_PIO_CB_ERR_OVRFL */
-/* Description: PIO Conveyor Belt operation error overflow */
-#define SH_LB_ERROR_OVERFLOW_PIO_CB_ERR_OVRFL_SHFT 14
-#define SH_LB_ERROR_OVERFLOW_PIO_CB_ERR_OVRFL_MASK 0x0000000000004000
-
-/* SH_LB_ERROR_OVERFLOW_VECTOR_RQ_ROUTE_ERROR_OVRFL */
-/* Description: Vector request Route data was invalid overflow */
-#define SH_LB_ERROR_OVERFLOW_VECTOR_RQ_ROUTE_ERROR_OVRFL_SHFT 15
-#define SH_LB_ERROR_OVERFLOW_VECTOR_RQ_ROUTE_ERROR_OVRFL_MASK 0x0000000000008000
-
-/* SH_LB_ERROR_OVERFLOW_VECTOR_RP_ROUTE_ERROR_OVRFL */
-/* Description: Vector reply Route data was invalid overflow */
-#define SH_LB_ERROR_OVERFLOW_VECTOR_RP_ROUTE_ERROR_OVRFL_SHFT 16
-#define SH_LB_ERROR_OVERFLOW_VECTOR_RP_ROUTE_ERROR_OVRFL_MASK 0x0000000000010000
-
-/* SH_LB_ERROR_OVERFLOW_GCLK_DROP_OVRFL */
-/* Description: Gclk drop error overflow */
-#define SH_LB_ERROR_OVERFLOW_GCLK_DROP_OVRFL_SHFT 17
-#define SH_LB_ERROR_OVERFLOW_GCLK_DROP_OVRFL_MASK 0x0000000000020000
-
-/* SH_LB_ERROR_OVERFLOW_RQ_FIFO_ERROR_OVRFL */
-/* Description: Request queue FIFO error overflow */
-#define SH_LB_ERROR_OVERFLOW_RQ_FIFO_ERROR_OVRFL_SHFT 18
-#define SH_LB_ERROR_OVERFLOW_RQ_FIFO_ERROR_OVRFL_MASK 0x0000000000040000
-
-/* SH_LB_ERROR_OVERFLOW_RP_FIFO_ERROR_OVRFL */
-/* Description: Reply queue FIFO error overflow */
-#define SH_LB_ERROR_OVERFLOW_RP_FIFO_ERROR_OVRFL_SHFT 19
-#define SH_LB_ERROR_OVERFLOW_RP_FIFO_ERROR_OVRFL_MASK 0x0000000000080000
-
-/* SH_LB_ERROR_OVERFLOW_UNEXP_VALID_OVRFL */
-/* Description: Unexpected valid error overflow */
-#define SH_LB_ERROR_OVERFLOW_UNEXP_VALID_OVRFL_SHFT 20
-#define SH_LB_ERROR_OVERFLOW_UNEXP_VALID_OVRFL_MASK 0x0000000000100000
-
-/* SH_LB_ERROR_OVERFLOW_RQ_CREDIT_OVERFLOW_OVRFL */
-/* Description: Request queue credit overflow */
-#define SH_LB_ERROR_OVERFLOW_RQ_CREDIT_OVERFLOW_OVRFL_SHFT 21
-#define SH_LB_ERROR_OVERFLOW_RQ_CREDIT_OVERFLOW_OVRFL_MASK 0x0000000000200000
-
-/* SH_LB_ERROR_OVERFLOW_RP_CREDIT_OVERFLOW_OVRFL */
-/* Description: Reply queue credit overflow */
-#define SH_LB_ERROR_OVERFLOW_RP_CREDIT_OVERFLOW_OVRFL_SHFT 22
-#define SH_LB_ERROR_OVERFLOW_RP_CREDIT_OVERFLOW_OVRFL_MASK 0x0000000000400000
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_OVERFLOW_ALIAS" */
-/* LB Error Overflow */
-/* ==================================================================== */
-
-#define SH_LB_ERROR_OVERFLOW_ALIAS 0x0000000110050508
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_SUMMARY" */
-/* LB Error Bits */
-/* ==================================================================== */
-
-#define SH_LB_ERROR_SUMMARY 0x0000000110050580
-#define SH_LB_ERROR_SUMMARY_MASK 0x00000000007fffff
-#define SH_LB_ERROR_SUMMARY_INIT 0x0000000000000000
-
-/* SH_LB_ERROR_SUMMARY_RQ_BAD_CMD */
-/* Description: RQ_BAD_CMD */
-#define SH_LB_ERROR_SUMMARY_RQ_BAD_CMD_SHFT 0
-#define SH_LB_ERROR_SUMMARY_RQ_BAD_CMD_MASK 0x0000000000000001
-
-/* SH_LB_ERROR_SUMMARY_RP_BAD_CMD */
-/* Description: RP_BAD_CMD */
-#define SH_LB_ERROR_SUMMARY_RP_BAD_CMD_SHFT 1
-#define SH_LB_ERROR_SUMMARY_RP_BAD_CMD_MASK 0x0000000000000002
-
-/* SH_LB_ERROR_SUMMARY_RQ_SHORT */
-/* Description: RQ_SHORT */
-#define SH_LB_ERROR_SUMMARY_RQ_SHORT_SHFT 2
-#define SH_LB_ERROR_SUMMARY_RQ_SHORT_MASK 0x0000000000000004
-
-/* SH_LB_ERROR_SUMMARY_RP_SHORT */
-/* Description: RP_SHORT */
-#define SH_LB_ERROR_SUMMARY_RP_SHORT_SHFT 3
-#define SH_LB_ERROR_SUMMARY_RP_SHORT_MASK 0x0000000000000008
-
-/* SH_LB_ERROR_SUMMARY_RQ_LONG */
-/* Description: RQ_LONG */
-#define SH_LB_ERROR_SUMMARY_RQ_LONG_SHFT 4
-#define SH_LB_ERROR_SUMMARY_RQ_LONG_MASK 0x0000000000000010
-
-/* SH_LB_ERROR_SUMMARY_RP_LONG */
-/* Description: RP_LONG */
-#define SH_LB_ERROR_SUMMARY_RP_LONG_SHFT 5
-#define SH_LB_ERROR_SUMMARY_RP_LONG_MASK 0x0000000000000020
-
-/* SH_LB_ERROR_SUMMARY_RQ_BAD_DATA */
-/* Description: RQ_BAD_DATA */
-#define SH_LB_ERROR_SUMMARY_RQ_BAD_DATA_SHFT 6
-#define SH_LB_ERROR_SUMMARY_RQ_BAD_DATA_MASK 0x0000000000000040
-
-/* SH_LB_ERROR_SUMMARY_RP_BAD_DATA */
-/* Description: RP_BAD_DATA */
-#define SH_LB_ERROR_SUMMARY_RP_BAD_DATA_SHFT 7
-#define SH_LB_ERROR_SUMMARY_RP_BAD_DATA_MASK 0x0000000000000080
-
-/* SH_LB_ERROR_SUMMARY_RQ_BAD_ADDR */
-/* Description: RQ_BAD_ADDR */
-#define SH_LB_ERROR_SUMMARY_RQ_BAD_ADDR_SHFT 8
-#define SH_LB_ERROR_SUMMARY_RQ_BAD_ADDR_MASK 0x0000000000000100
-
-/* SH_LB_ERROR_SUMMARY_RQ_TIME_OUT */
-/* Description: RQ_TIME_OUT */
-#define SH_LB_ERROR_SUMMARY_RQ_TIME_OUT_SHFT 9
-#define SH_LB_ERROR_SUMMARY_RQ_TIME_OUT_MASK 0x0000000000000200
-
-/* SH_LB_ERROR_SUMMARY_LINVV_OVERFLOW */
-/* Description: LINVV_OVERFLOW */
-#define SH_LB_ERROR_SUMMARY_LINVV_OVERFLOW_SHFT 10
-#define SH_LB_ERROR_SUMMARY_LINVV_OVERFLOW_MASK 0x0000000000000400
-
-/* SH_LB_ERROR_SUMMARY_UNEXPECTED_LINV */
-/* Description: UNEXPECTED_LINV */
-#define SH_LB_ERROR_SUMMARY_UNEXPECTED_LINV_SHFT 11
-#define SH_LB_ERROR_SUMMARY_UNEXPECTED_LINV_MASK 0x0000000000000800
-
-/* SH_LB_ERROR_SUMMARY_PTC_1_TIMEOUT */
-/* Description: PTC_1 Time out */
-#define SH_LB_ERROR_SUMMARY_PTC_1_TIMEOUT_SHFT 12
-#define SH_LB_ERROR_SUMMARY_PTC_1_TIMEOUT_MASK 0x0000000000001000
-
-/* SH_LB_ERROR_SUMMARY_JUNK_BUS_ERR */
-/* Description: Junk Bus error */
-#define SH_LB_ERROR_SUMMARY_JUNK_BUS_ERR_SHFT 13
-#define SH_LB_ERROR_SUMMARY_JUNK_BUS_ERR_MASK 0x0000000000002000
-
-/* SH_LB_ERROR_SUMMARY_PIO_CB_ERR */
-/* Description: PIO Conveyor Belt operation error */
-#define SH_LB_ERROR_SUMMARY_PIO_CB_ERR_SHFT 14
-#define SH_LB_ERROR_SUMMARY_PIO_CB_ERR_MASK 0x0000000000004000
-
-/* SH_LB_ERROR_SUMMARY_VECTOR_RQ_ROUTE_ERROR */
-/* Description: Vector request Route data was invalid */
-#define SH_LB_ERROR_SUMMARY_VECTOR_RQ_ROUTE_ERROR_SHFT 15
-#define SH_LB_ERROR_SUMMARY_VECTOR_RQ_ROUTE_ERROR_MASK 0x0000000000008000
-
-/* SH_LB_ERROR_SUMMARY_VECTOR_RP_ROUTE_ERROR */
-/* Description: Vector reply Route data was invalid */
-#define SH_LB_ERROR_SUMMARY_VECTOR_RP_ROUTE_ERROR_SHFT 16
-#define SH_LB_ERROR_SUMMARY_VECTOR_RP_ROUTE_ERROR_MASK 0x0000000000010000
-
-/* SH_LB_ERROR_SUMMARY_GCLK_DROP */
-/* Description: Gclk drop error */
-#define SH_LB_ERROR_SUMMARY_GCLK_DROP_SHFT 17
-#define SH_LB_ERROR_SUMMARY_GCLK_DROP_MASK 0x0000000000020000
-
-/* SH_LB_ERROR_SUMMARY_RQ_FIFO_ERROR */
-/* Description: Request queue FIFO error */
-#define SH_LB_ERROR_SUMMARY_RQ_FIFO_ERROR_SHFT 18
-#define SH_LB_ERROR_SUMMARY_RQ_FIFO_ERROR_MASK 0x0000000000040000
-
-/* SH_LB_ERROR_SUMMARY_RP_FIFO_ERROR */
-/* Description: Reply queue FIFO error */
-#define SH_LB_ERROR_SUMMARY_RP_FIFO_ERROR_SHFT 19
-#define SH_LB_ERROR_SUMMARY_RP_FIFO_ERROR_MASK 0x0000000000080000
-
-/* SH_LB_ERROR_SUMMARY_UNEXP_VALID */
-/* Description: Unexpected valid error */
-#define SH_LB_ERROR_SUMMARY_UNEXP_VALID_SHFT 20
-#define SH_LB_ERROR_SUMMARY_UNEXP_VALID_MASK 0x0000000000100000
-
-/* SH_LB_ERROR_SUMMARY_RQ_CREDIT_OVERFLOW */
-/* Description: Request queue credit overflow */
-#define SH_LB_ERROR_SUMMARY_RQ_CREDIT_OVERFLOW_SHFT 21
-#define SH_LB_ERROR_SUMMARY_RQ_CREDIT_OVERFLOW_MASK 0x0000000000200000
-
-/* SH_LB_ERROR_SUMMARY_RP_CREDIT_OVERFLOW */
-/* Description: Reply queue credit overflow */
-#define SH_LB_ERROR_SUMMARY_RP_CREDIT_OVERFLOW_SHFT 22
-#define SH_LB_ERROR_SUMMARY_RP_CREDIT_OVERFLOW_MASK 0x0000000000400000
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_SUMMARY_ALIAS" */
-/* LB Error Bits Alias */
-/* ==================================================================== */
-
-#define SH_LB_ERROR_SUMMARY_ALIAS 0x0000000110050588
-
-/* ==================================================================== */
-/* Register "SH_LB_FIRST_ERROR" */
-/* LB First Error */
-/* ==================================================================== */
-
-#define SH_LB_FIRST_ERROR 0x0000000110050600
-#define SH_LB_FIRST_ERROR_MASK 0x00000000007fffff
-#define SH_LB_FIRST_ERROR_INIT 0x0000000000000000
-
-/* SH_LB_FIRST_ERROR_RQ_BAD_CMD */
-/* Description: RQ_BAD_CMD */
-#define SH_LB_FIRST_ERROR_RQ_BAD_CMD_SHFT 0
-#define SH_LB_FIRST_ERROR_RQ_BAD_CMD_MASK 0x0000000000000001
-
-/* SH_LB_FIRST_ERROR_RP_BAD_CMD */
-/* Description: RP_BAD_CMD */
-#define SH_LB_FIRST_ERROR_RP_BAD_CMD_SHFT 1
-#define SH_LB_FIRST_ERROR_RP_BAD_CMD_MASK 0x0000000000000002
-
-/* SH_LB_FIRST_ERROR_RQ_SHORT */
-/* Description: RQ_SHORT */
-#define SH_LB_FIRST_ERROR_RQ_SHORT_SHFT 2
-#define SH_LB_FIRST_ERROR_RQ_SHORT_MASK 0x0000000000000004
-
-/* SH_LB_FIRST_ERROR_RP_SHORT */
-/* Description: RP_SHORT */
-#define SH_LB_FIRST_ERROR_RP_SHORT_SHFT 3
-#define SH_LB_FIRST_ERROR_RP_SHORT_MASK 0x0000000000000008
-
-/* SH_LB_FIRST_ERROR_RQ_LONG */
-/* Description: RQ_LONG */
-#define SH_LB_FIRST_ERROR_RQ_LONG_SHFT 4
-#define SH_LB_FIRST_ERROR_RQ_LONG_MASK 0x0000000000000010
-
-/* SH_LB_FIRST_ERROR_RP_LONG */
-/* Description: RP_LONG */
-#define SH_LB_FIRST_ERROR_RP_LONG_SHFT 5
-#define SH_LB_FIRST_ERROR_RP_LONG_MASK 0x0000000000000020
-
-/* SH_LB_FIRST_ERROR_RQ_BAD_DATA */
-/* Description: RQ_BAD_DATA */
-#define SH_LB_FIRST_ERROR_RQ_BAD_DATA_SHFT 6
-#define SH_LB_FIRST_ERROR_RQ_BAD_DATA_MASK 0x0000000000000040
-
-/* SH_LB_FIRST_ERROR_RP_BAD_DATA */
-/* Description: RP_BAD_DATA */
-#define SH_LB_FIRST_ERROR_RP_BAD_DATA_SHFT 7
-#define SH_LB_FIRST_ERROR_RP_BAD_DATA_MASK 0x0000000000000080
-
-/* SH_LB_FIRST_ERROR_RQ_BAD_ADDR */
-/* Description: RQ_BAD_ADDR */
-#define SH_LB_FIRST_ERROR_RQ_BAD_ADDR_SHFT 8
-#define SH_LB_FIRST_ERROR_RQ_BAD_ADDR_MASK 0x0000000000000100
-
-/* SH_LB_FIRST_ERROR_RQ_TIME_OUT */
-/* Description: RQ_TIME_OUT */
-#define SH_LB_FIRST_ERROR_RQ_TIME_OUT_SHFT 9
-#define SH_LB_FIRST_ERROR_RQ_TIME_OUT_MASK 0x0000000000000200
-
-/* SH_LB_FIRST_ERROR_LINVV_OVERFLOW */
-/* Description: LINVV_OVERFLOW */
-#define SH_LB_FIRST_ERROR_LINVV_OVERFLOW_SHFT 10
-#define SH_LB_FIRST_ERROR_LINVV_OVERFLOW_MASK 0x0000000000000400
-
-/* SH_LB_FIRST_ERROR_UNEXPECTED_LINV */
-/* Description: UNEXPECTED_LINV */
-#define SH_LB_FIRST_ERROR_UNEXPECTED_LINV_SHFT 11
-#define SH_LB_FIRST_ERROR_UNEXPECTED_LINV_MASK 0x0000000000000800
-
-/* SH_LB_FIRST_ERROR_PTC_1_TIMEOUT */
-/* Description: PTC_1 Time out */
-#define SH_LB_FIRST_ERROR_PTC_1_TIMEOUT_SHFT 12
-#define SH_LB_FIRST_ERROR_PTC_1_TIMEOUT_MASK 0x0000000000001000
-
-/* SH_LB_FIRST_ERROR_JUNK_BUS_ERR */
-/* Description: Junk Bus error */
-#define SH_LB_FIRST_ERROR_JUNK_BUS_ERR_SHFT 13
-#define SH_LB_FIRST_ERROR_JUNK_BUS_ERR_MASK 0x0000000000002000
-
-/* SH_LB_FIRST_ERROR_PIO_CB_ERR */
-/* Description: PIO Conveyor Belt operation error */
-#define SH_LB_FIRST_ERROR_PIO_CB_ERR_SHFT 14
-#define SH_LB_FIRST_ERROR_PIO_CB_ERR_MASK 0x0000000000004000
-
-/* SH_LB_FIRST_ERROR_VECTOR_RQ_ROUTE_ERROR */
-/* Description: Vector request Route data was invalid */
-#define SH_LB_FIRST_ERROR_VECTOR_RQ_ROUTE_ERROR_SHFT 15
-#define SH_LB_FIRST_ERROR_VECTOR_RQ_ROUTE_ERROR_MASK 0x0000000000008000
-
-/* SH_LB_FIRST_ERROR_VECTOR_RP_ROUTE_ERROR */
-/* Description: Vector reply Route data was invalid */
-#define SH_LB_FIRST_ERROR_VECTOR_RP_ROUTE_ERROR_SHFT 16
-#define SH_LB_FIRST_ERROR_VECTOR_RP_ROUTE_ERROR_MASK 0x0000000000010000
-
-/* SH_LB_FIRST_ERROR_GCLK_DROP */
-/* Description: Gclk drop error */
-#define SH_LB_FIRST_ERROR_GCLK_DROP_SHFT 17
-#define SH_LB_FIRST_ERROR_GCLK_DROP_MASK 0x0000000000020000
-
-/* SH_LB_FIRST_ERROR_RQ_FIFO_ERROR */
-/* Description: Request queue FIFO error */
-#define SH_LB_FIRST_ERROR_RQ_FIFO_ERROR_SHFT 18
-#define SH_LB_FIRST_ERROR_RQ_FIFO_ERROR_MASK 0x0000000000040000
-
-/* SH_LB_FIRST_ERROR_RP_FIFO_ERROR */
-/* Description: Reply queue FIFO error */
-#define SH_LB_FIRST_ERROR_RP_FIFO_ERROR_SHFT 19
-#define SH_LB_FIRST_ERROR_RP_FIFO_ERROR_MASK 0x0000000000080000
-
-/* SH_LB_FIRST_ERROR_UNEXP_VALID */
-/* Description: Unexpected valid error */
-#define SH_LB_FIRST_ERROR_UNEXP_VALID_SHFT 20
-#define SH_LB_FIRST_ERROR_UNEXP_VALID_MASK 0x0000000000100000
-
-/* SH_LB_FIRST_ERROR_RQ_CREDIT_OVERFLOW */
-/* Description: Request queue credit overflow */
-#define SH_LB_FIRST_ERROR_RQ_CREDIT_OVERFLOW_SHFT 21
-#define SH_LB_FIRST_ERROR_RQ_CREDIT_OVERFLOW_MASK 0x0000000000200000
-
-/* SH_LB_FIRST_ERROR_RP_CREDIT_OVERFLOW */
-/* Description: Reply queue credit overflow */
-#define SH_LB_FIRST_ERROR_RP_CREDIT_OVERFLOW_SHFT 22
-#define SH_LB_FIRST_ERROR_RP_CREDIT_OVERFLOW_MASK 0x0000000000400000
-
-/* ==================================================================== */
-/* Register "SH_LB_LAST_CREDIT" */
-/* Credit counter status register */
-/* ==================================================================== */
-
-#define SH_LB_LAST_CREDIT 0x0000000110050680
-#define SH_LB_LAST_CREDIT_MASK 0x000000000ffff3df
-#define SH_LB_LAST_CREDIT_INIT 0x0000000000000000
-
-/* SH_LB_LAST_CREDIT_LIQ_RQ_CREDIT */
-/* Description: LIQ request queue credit counter */
-#define SH_LB_LAST_CREDIT_LIQ_RQ_CREDIT_SHFT 0
-#define SH_LB_LAST_CREDIT_LIQ_RQ_CREDIT_MASK 0x000000000000001f
-
-/* SH_LB_LAST_CREDIT_LIQ_RP_CREDIT */
-/* Description: LIQ reply queue credit counter */
-#define SH_LB_LAST_CREDIT_LIQ_RP_CREDIT_SHFT 6
-#define SH_LB_LAST_CREDIT_LIQ_RP_CREDIT_MASK 0x00000000000003c0
-
-/* SH_LB_LAST_CREDIT_LINVV_CREDIT */
-/* Description: LINVV credit counter */
-#define SH_LB_LAST_CREDIT_LINVV_CREDIT_SHFT 12
-#define SH_LB_LAST_CREDIT_LINVV_CREDIT_MASK 0x000000000003f000
-
-/* SH_LB_LAST_CREDIT_LOQ_RQ_CREDIT */
-/* Description: LOQ request queue credit counter */
-#define SH_LB_LAST_CREDIT_LOQ_RQ_CREDIT_SHFT 18
-#define SH_LB_LAST_CREDIT_LOQ_RQ_CREDIT_MASK 0x00000000007c0000
-
-/* SH_LB_LAST_CREDIT_LOQ_RP_CREDIT */
-/* Description: LOQ reply queue credit counter */
-#define SH_LB_LAST_CREDIT_LOQ_RP_CREDIT_SHFT 23
-#define SH_LB_LAST_CREDIT_LOQ_RP_CREDIT_MASK 0x000000000f800000
-
-/* ==================================================================== */
-/* Register "SH_LB_NACK_STATUS" */
-/* Nack Counter Status Register */
-/* ==================================================================== */
-
-#define SH_LB_NACK_STATUS 0x0000000110050700
-#define SH_LB_NACK_STATUS_MASK 0x3fffffff0fff0fff
-#define SH_LB_NACK_STATUS_INIT 0x0000000000000000
-
-/* SH_LB_NACK_STATUS_PIO_NACK_A */
-/* Description: PIO nackA counter */
-#define SH_LB_NACK_STATUS_PIO_NACK_A_SHFT 0
-#define SH_LB_NACK_STATUS_PIO_NACK_A_MASK 0x0000000000000fff
-
-/* SH_LB_NACK_STATUS_PIO_NACK_B */
-/* Description: PIO nackA counter */
-#define SH_LB_NACK_STATUS_PIO_NACK_B_SHFT 16
-#define SH_LB_NACK_STATUS_PIO_NACK_B_MASK 0x000000000fff0000
-
-/* SH_LB_NACK_STATUS_JUNK_NACK */
-/* Description: Junk bus nack counter */
-#define SH_LB_NACK_STATUS_JUNK_NACK_SHFT 32
-#define SH_LB_NACK_STATUS_JUNK_NACK_MASK 0x0000ffff00000000
-
-/* SH_LB_NACK_STATUS_CB_TIMEOUT_COUNT */
-/* Description: Conveyor belt time out counter */
-#define SH_LB_NACK_STATUS_CB_TIMEOUT_COUNT_SHFT 48
-#define SH_LB_NACK_STATUS_CB_TIMEOUT_COUNT_MASK 0x0fff000000000000
-
-/* SH_LB_NACK_STATUS_CB_STATE */
-/* Description: Conveyor belt state */
-#define SH_LB_NACK_STATUS_CB_STATE_SHFT 60
-#define SH_LB_NACK_STATUS_CB_STATE_MASK 0x3000000000000000
-
-/* ==================================================================== */
-/* Register "SH_LB_TRIGGER_COMPARE" */
-/* LB Test-point Trigger Compare */
-/* ==================================================================== */
-
-#define SH_LB_TRIGGER_COMPARE 0x0000000110050780
-#define SH_LB_TRIGGER_COMPARE_MASK 0x00000000ffffffff
-#define SH_LB_TRIGGER_COMPARE_INIT 0x0000000000000000
-
-/* SH_LB_TRIGGER_COMPARE_MASK */
-/* Description: Mask to select Debug bits for trigger generation */
-#define SH_LB_TRIGGER_COMPARE_MASK_SHFT 0
-#define SH_LB_TRIGGER_COMPARE_MASK_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_LB_TRIGGER_DATA" */
-/* LB Test-point Trigger Compare Data */
-/* ==================================================================== */
-
-#define SH_LB_TRIGGER_DATA 0x0000000110050800
-#define SH_LB_TRIGGER_DATA_MASK 0x00000000ffffffff
-#define SH_LB_TRIGGER_DATA_INIT 0x00000000ffffffff
-
-/* SH_LB_TRIGGER_DATA_COMPARE_PATTERN */
-/* Description: debug bit pattern for trigger generation */
-#define SH_LB_TRIGGER_DATA_COMPARE_PATTERN_SHFT 0
-#define SH_LB_TRIGGER_DATA_COMPARE_PATTERN_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_PI_AEC_CONFIG" */
-/* PI Adaptive Error Correction Configuration */
-/* ==================================================================== */
-
-#define SH_PI_AEC_CONFIG 0x0000000120050000
-#define SH_PI_AEC_CONFIG_MASK 0x0000000000000007
-#define SH_PI_AEC_CONFIG_INIT 0x0000000000000000
-
-/* SH_PI_AEC_CONFIG_MODE */
-/* Description: AEC Operation Mode */
-#define SH_PI_AEC_CONFIG_MODE_SHFT 0
-#define SH_PI_AEC_CONFIG_MODE_MASK 0x0000000000000007
-
-/* ==================================================================== */
-/* Register "SH_PI_AFI_ERROR_MASK" */
-/* PI AFI Error Mask */
-/* ==================================================================== */
-
-#define SH_PI_AFI_ERROR_MASK 0x0000000120050080
-#define SH_PI_AFI_ERROR_MASK_MASK 0x00000007ffe00000
-#define SH_PI_AFI_ERROR_MASK_INIT 0x00000007ffe00000
-
-/* SH_PI_AFI_ERROR_MASK_HUNG_BUS */
-/* Description: FSB is hung */
-#define SH_PI_AFI_ERROR_MASK_HUNG_BUS_SHFT 21
-#define SH_PI_AFI_ERROR_MASK_HUNG_BUS_MASK 0x0000000000200000
-
-/* SH_PI_AFI_ERROR_MASK_RSP_PARITY */
-/* Description: Parity error detecte during response phase */
-#define SH_PI_AFI_ERROR_MASK_RSP_PARITY_SHFT 22
-#define SH_PI_AFI_ERROR_MASK_RSP_PARITY_MASK 0x0000000000400000
-
-/* SH_PI_AFI_ERROR_MASK_IOQ_OVERRUN */
-/* Description: Over run error detected on IOQ */
-#define SH_PI_AFI_ERROR_MASK_IOQ_OVERRUN_SHFT 23
-#define SH_PI_AFI_ERROR_MASK_IOQ_OVERRUN_MASK 0x0000000000800000
-
-/* SH_PI_AFI_ERROR_MASK_REQ_FORMAT */
-/* Description: FSB request format not supported */
-#define SH_PI_AFI_ERROR_MASK_REQ_FORMAT_SHFT 24
-#define SH_PI_AFI_ERROR_MASK_REQ_FORMAT_MASK 0x0000000001000000
-
-/* SH_PI_AFI_ERROR_MASK_ADDR_ACCESS */
-/* Description: Access to Address is not supported */
-#define SH_PI_AFI_ERROR_MASK_ADDR_ACCESS_SHFT 25
-#define SH_PI_AFI_ERROR_MASK_ADDR_ACCESS_MASK 0x0000000002000000
-
-/* SH_PI_AFI_ERROR_MASK_REQ_PARITY */
-/* Description: Parity error detected during request phase */
-#define SH_PI_AFI_ERROR_MASK_REQ_PARITY_SHFT 26
-#define SH_PI_AFI_ERROR_MASK_REQ_PARITY_MASK 0x0000000004000000
-
-/* SH_PI_AFI_ERROR_MASK_ADDR_PARITY */
-/* Description: Parity error detected on address */
-#define SH_PI_AFI_ERROR_MASK_ADDR_PARITY_SHFT 27
-#define SH_PI_AFI_ERROR_MASK_ADDR_PARITY_MASK 0x0000000008000000
-
-/* SH_PI_AFI_ERROR_MASK_SHUB_FSB_DQE */
-/* Description: SHUB_FSB_DQE */
-#define SH_PI_AFI_ERROR_MASK_SHUB_FSB_DQE_SHFT 28
-#define SH_PI_AFI_ERROR_MASK_SHUB_FSB_DQE_MASK 0x0000000010000000
-
-/* SH_PI_AFI_ERROR_MASK_SHUB_FSB_UCE */
-/* Description: An un-correctable ECC error was detected */
-#define SH_PI_AFI_ERROR_MASK_SHUB_FSB_UCE_SHFT 29
-#define SH_PI_AFI_ERROR_MASK_SHUB_FSB_UCE_MASK 0x0000000020000000
-
-/* SH_PI_AFI_ERROR_MASK_SHUB_FSB_CE */
-/* Description: An correctable ECC error was detected */
-#define SH_PI_AFI_ERROR_MASK_SHUB_FSB_CE_SHFT 30
-#define SH_PI_AFI_ERROR_MASK_SHUB_FSB_CE_MASK 0x0000000040000000
-
-/* SH_PI_AFI_ERROR_MASK_LIVELOCK */
-/* Description: AFI livelock error was detected */
-#define SH_PI_AFI_ERROR_MASK_LIVELOCK_SHFT 31
-#define SH_PI_AFI_ERROR_MASK_LIVELOCK_MASK 0x0000000080000000
-
-/* SH_PI_AFI_ERROR_MASK_BAD_SNOOP */
-/* Description: AFI bad snoop error was detected */
-#define SH_PI_AFI_ERROR_MASK_BAD_SNOOP_SHFT 32
-#define SH_PI_AFI_ERROR_MASK_BAD_SNOOP_MASK 0x0000000100000000
-
-/* SH_PI_AFI_ERROR_MASK_FSB_TBL_MISS */
-/* Description: AFI FSB request table miss error was detected */
-#define SH_PI_AFI_ERROR_MASK_FSB_TBL_MISS_SHFT 33
-#define SH_PI_AFI_ERROR_MASK_FSB_TBL_MISS_MASK 0x0000000200000000
-
-/* SH_PI_AFI_ERROR_MASK_MSG_LEN */
-/* Description: Runt or Obese message received from SIC */
-#define SH_PI_AFI_ERROR_MASK_MSG_LEN_SHFT 34
-#define SH_PI_AFI_ERROR_MASK_MSG_LEN_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_PI_AFI_TEST_POINT_COMPARE" */
-/* PI AFI Test Point Compare */
-/* ==================================================================== */
-
-#define SH_PI_AFI_TEST_POINT_COMPARE 0x0000000120050100
-#define SH_PI_AFI_TEST_POINT_COMPARE_MASK 0xffffffffffffffff
-#define SH_PI_AFI_TEST_POINT_COMPARE_INIT 0xffffffff00000000
-
-/* SH_PI_AFI_TEST_POINT_COMPARE_COMPARE_MASK */
-/* Description: Mask to select Debug bits for trigger generation */
-#define SH_PI_AFI_TEST_POINT_COMPARE_COMPARE_MASK_SHFT 0
-#define SH_PI_AFI_TEST_POINT_COMPARE_COMPARE_MASK_MASK 0x00000000ffffffff
-
-/* SH_PI_AFI_TEST_POINT_COMPARE_COMPARE_PATTERN */
-/* Description: debug bit pattern for trigger generation */
-#define SH_PI_AFI_TEST_POINT_COMPARE_COMPARE_PATTERN_SHFT 32
-#define SH_PI_AFI_TEST_POINT_COMPARE_COMPARE_PATTERN_MASK 0xffffffff00000000
-
-/* ==================================================================== */
-/* Register "SH_PI_AFI_TEST_POINT_SELECT" */
-/* PI AFI Test Point Select */
-/* ==================================================================== */
-
-#define SH_PI_AFI_TEST_POINT_SELECT 0x0000000120050180
-#define SH_PI_AFI_TEST_POINT_SELECT_MASK 0xff7f7f7f7f7f7f7f
-#define SH_PI_AFI_TEST_POINT_SELECT_INIT 0x0000000000000000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL */
-/* Description: Nibble 0: Word Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL_SHFT 0
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL_MASK 0x000000000000000f
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0: Nibble Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL */
-/* Description: Nibble 1: Word Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL_SHFT 8
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL_MASK 0x0000000000000f00
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1: Nibble Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL */
-/* Description: Nibble 2: Word Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL_SHFT 16
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL_MASK 0x00000000000f0000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2: Nibble Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL */
-/* Description: Nibble 3: Word Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL_SHFT 24
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL_MASK 0x000000000f000000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3: Nibble Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL */
-/* Description: Nibble 4: Word Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL_SHFT 32
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL_MASK 0x0000000f00000000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4: Nibble Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL */
-/* Description: Nibble 5: Word Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL_SHFT 40
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL_MASK 0x00000f0000000000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5: Nibble Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL */
-/* Description: Nibble 6: Word Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL_SHFT 48
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL_MASK 0x000f000000000000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6: Nibble Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL */
-/* Description: Nibble 7: Word Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL_SHFT 56
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL_MASK 0x0f00000000000000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7: Nibble Select */
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_PI_AFI_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* SH_PI_AFI_TEST_POINT_SELECT_TRIGGER_ENABLE */
-/* Description: Trigger Enabled */
-#define SH_PI_AFI_TEST_POINT_SELECT_TRIGGER_ENABLE_SHFT 63
-#define SH_PI_AFI_TEST_POINT_SELECT_TRIGGER_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_AFI_TEST_POINT_TRIGGER_SELECT" */
-/* PI CRBC Test Point Trigger Select */
-/* ==================================================================== */
-
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT 0x0000000120050200
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_MASK 0x7f7f7f7f7f7f7f7f
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_INIT 0x0000000000000000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL */
-/* Description: Nibble 0 Chiplet select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL_SHFT 0
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL_MASK 0x000000000000000f
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL_SHFT 4
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL */
-/* Description: Nibble 1 Chiplet select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL_SHFT 8
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL_MASK 0x0000000000000f00
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL_SHFT 12
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL */
-/* Description: Nibble 2 Chiplet select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL_SHFT 16
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL_MASK 0x00000000000f0000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL_SHFT 20
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL */
-/* Description: Nibble 3 Chiplet select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL_SHFT 24
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL_MASK 0x000000000f000000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL_SHFT 28
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL */
-/* Description: Nibble 4 Chiplet select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL_SHFT 32
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL_MASK 0x0000000f00000000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL_SHFT 36
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL */
-/* Description: Nibble 5 Chiplet select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL_SHFT 40
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL_MASK 0x00000f0000000000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL_SHFT 44
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL */
-/* Description: Nibble 6 Chiplet select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL_SHFT 48
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL_MASK 0x000f000000000000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL_SHFT 52
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL */
-/* Description: Nibble 7 Chiplet select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL_SHFT 56
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL_MASK 0x0f00000000000000
-
-/* SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL_SHFT 60
-#define SH_PI_AFI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_AUTO_REPLY_ENABLE" */
-/* PI Auto Reply Enable */
-/* ==================================================================== */
-
-#define SH_PI_AUTO_REPLY_ENABLE 0x0000000120050280
-#define SH_PI_AUTO_REPLY_ENABLE_MASK 0x0000000000000001
-#define SH_PI_AUTO_REPLY_ENABLE_INIT 0x0000000000000000
-
-/* SH_PI_AUTO_REPLY_ENABLE_AUTO_REPLY_ENABLE */
-/* Description: Auto Reply Enabled */
-#define SH_PI_AUTO_REPLY_ENABLE_AUTO_REPLY_ENABLE_SHFT 0
-#define SH_PI_AUTO_REPLY_ENABLE_AUTO_REPLY_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_PI_CAM_CONTROL" */
-/* CRB CAM MMR Access Control */
-/* ==================================================================== */
-
-#define SH_PI_CAM_CONTROL 0x0000000120050300
-#define SH_PI_CAM_CONTROL_MASK 0x800000000000037f
-#define SH_PI_CAM_CONTROL_INIT 0x0000000000000000
-
-/* SH_PI_CAM_CONTROL_CAM_INDX */
-/* Description: CRB CAM Index to perform read/write on. */
-#define SH_PI_CAM_CONTROL_CAM_INDX_SHFT 0
-#define SH_PI_CAM_CONTROL_CAM_INDX_MASK 0x000000000000007f
-
-/* SH_PI_CAM_CONTROL_CAM_WRITE */
-/* Description: Is CRB CAM MMR function a write. */
-#define SH_PI_CAM_CONTROL_CAM_WRITE_SHFT 8
-#define SH_PI_CAM_CONTROL_CAM_WRITE_MASK 0x0000000000000100
-
-/* SH_PI_CAM_CONTROL_RRB_RD_XFER_CLEAR */
-/* Description: Clear RRB read tranfer pending. */
-#define SH_PI_CAM_CONTROL_RRB_RD_XFER_CLEAR_SHFT 9
-#define SH_PI_CAM_CONTROL_RRB_RD_XFER_CLEAR_MASK 0x0000000000000200
-
-/* SH_PI_CAM_CONTROL_START */
-/* Description: Start CRB CAM read/write operation */
-#define SH_PI_CAM_CONTROL_START_SHFT 63
-#define SH_PI_CAM_CONTROL_START_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBC_TEST_POINT_COMPARE" */
-/* PI CRBC Test Point Compare */
-/* ==================================================================== */
-
-#define SH_PI_CRBC_TEST_POINT_COMPARE 0x0000000120050380
-#define SH_PI_CRBC_TEST_POINT_COMPARE_MASK 0xffffffffffffffff
-#define SH_PI_CRBC_TEST_POINT_COMPARE_INIT 0xffffffff00000000
-
-/* SH_PI_CRBC_TEST_POINT_COMPARE_COMPARE_MASK */
-/* Description: Mask to select Debug bits for trigger generation */
-#define SH_PI_CRBC_TEST_POINT_COMPARE_COMPARE_MASK_SHFT 0
-#define SH_PI_CRBC_TEST_POINT_COMPARE_COMPARE_MASK_MASK 0x00000000ffffffff
-
-/* SH_PI_CRBC_TEST_POINT_COMPARE_COMPARE_PATTERN */
-/* Description: debug bit pattern for trigger generation */
-#define SH_PI_CRBC_TEST_POINT_COMPARE_COMPARE_PATTERN_SHFT 32
-#define SH_PI_CRBC_TEST_POINT_COMPARE_COMPARE_PATTERN_MASK 0xffffffff00000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBC_TEST_POINT_SELECT" */
-/* PI CRBC Test Point Select */
-/* ==================================================================== */
-
-#define SH_PI_CRBC_TEST_POINT_SELECT 0x0000000120050400
-#define SH_PI_CRBC_TEST_POINT_SELECT_MASK 0xf777777777777777
-#define SH_PI_CRBC_TEST_POINT_SELECT_INIT 0x0000000000000000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL */
-/* Description: Nibble 0 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL_SHFT 0
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL_MASK 0x0000000000000007
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL */
-/* Description: Nibble 1 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL_SHFT 8
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL_MASK 0x0000000000000700
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL */
-/* Description: Nibble 2 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL_SHFT 16
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL_MASK 0x0000000000070000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL */
-/* Description: Nibble 3 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL_SHFT 24
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL_MASK 0x0000000007000000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL */
-/* Description: Nibble 4 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL_SHFT 32
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL_MASK 0x0000000700000000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL */
-/* Description: Nibble 5 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL_SHFT 40
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL_MASK 0x0000070000000000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL */
-/* Description: Nibble 6 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL_SHFT 48
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL_MASK 0x0007000000000000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL */
-/* Description: Nibble 7 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL_SHFT 56
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL_MASK 0x0700000000000000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_PI_CRBC_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* SH_PI_CRBC_TEST_POINT_SELECT_TRIGGER_ENABLE */
-/* Description: Enable trigger on bit 32 of Analyzer data */
-#define SH_PI_CRBC_TEST_POINT_SELECT_TRIGGER_ENABLE_SHFT 63
-#define SH_PI_CRBC_TEST_POINT_SELECT_TRIGGER_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT" */
-/* PI CRBC Test Point Trigger Select */
-/* ==================================================================== */
-
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT 0x0000000120050480
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_MASK 0x7777777777777777
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_INIT 0x0000000000000000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL */
-/* Description: Nibble 0 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL_SHFT 0
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL_MASK 0x0000000000000007
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL_SHFT 4
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL */
-/* Description: Nibble 1 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL_SHFT 8
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL_MASK 0x0000000000000700
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL_SHFT 12
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL */
-/* Description: Nibble 2 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL_SHFT 16
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL_MASK 0x0000000000070000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL_SHFT 20
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL */
-/* Description: Nibble 3 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL_SHFT 24
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL_MASK 0x0000000007000000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL_SHFT 28
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL */
-/* Description: Nibble 4 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL_SHFT 32
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL_MASK 0x0000000700000000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL_SHFT 36
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL */
-/* Description: Nibble 5 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL_SHFT 40
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL_MASK 0x0000070000000000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL_SHFT 44
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL */
-/* Description: Nibble 6 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL_SHFT 48
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL_MASK 0x0007000000000000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL_SHFT 52
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL */
-/* Description: Nibble 7 Chiplet select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL_SHFT 56
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL_MASK 0x0700000000000000
-
-/* SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL_SHFT 60
-#define SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_ERROR_MASK" */
-/* PI CRBP Error Mask */
-/* ==================================================================== */
-
-#define SH_PI_CRBP_ERROR_MASK 0x0000000120050500
-#define SH_PI_CRBP_ERROR_MASK_MASK 0x00000000001fffff
-#define SH_PI_CRBP_ERROR_MASK_INIT 0x00000000001fffff
-
-/* SH_PI_CRBP_ERROR_MASK_FSB_PROTO_ERR */
-/* Description: Mask detection internal protocol table misses */
-#define SH_PI_CRBP_ERROR_MASK_FSB_PROTO_ERR_SHFT 0
-#define SH_PI_CRBP_ERROR_MASK_FSB_PROTO_ERR_MASK 0x0000000000000001
-
-/* SH_PI_CRBP_ERROR_MASK_GFX_RP_ERR */
-/* Description: Mask graphic reply error detection */
-#define SH_PI_CRBP_ERROR_MASK_GFX_RP_ERR_SHFT 1
-#define SH_PI_CRBP_ERROR_MASK_GFX_RP_ERR_MASK 0x0000000000000002
-
-/* SH_PI_CRBP_ERROR_MASK_XB_PROTO_ERR */
-/* Description: Mask detection of external protocol table misses */
-#define SH_PI_CRBP_ERROR_MASK_XB_PROTO_ERR_SHFT 2
-#define SH_PI_CRBP_ERROR_MASK_XB_PROTO_ERR_MASK 0x0000000000000004
-
-/* SH_PI_CRBP_ERROR_MASK_MEM_RP_ERR */
-/* Description: Mask memory error reply message detection */
-#define SH_PI_CRBP_ERROR_MASK_MEM_RP_ERR_SHFT 3
-#define SH_PI_CRBP_ERROR_MASK_MEM_RP_ERR_MASK 0x0000000000000008
-
-/* SH_PI_CRBP_ERROR_MASK_PIO_RP_ERR */
-/* Description: Mask PIO reply error message detection */
-#define SH_PI_CRBP_ERROR_MASK_PIO_RP_ERR_SHFT 4
-#define SH_PI_CRBP_ERROR_MASK_PIO_RP_ERR_MASK 0x0000000000000010
-
-/* SH_PI_CRBP_ERROR_MASK_MEM_TO_ERR */
-/* Description: Mask memory time-out detection */
-#define SH_PI_CRBP_ERROR_MASK_MEM_TO_ERR_SHFT 5
-#define SH_PI_CRBP_ERROR_MASK_MEM_TO_ERR_MASK 0x0000000000000020
-
-/* SH_PI_CRBP_ERROR_MASK_PIO_TO_ERR */
-/* Description: Mask PIO time-out detection */
-#define SH_PI_CRBP_ERROR_MASK_PIO_TO_ERR_SHFT 6
-#define SH_PI_CRBP_ERROR_MASK_PIO_TO_ERR_MASK 0x0000000000000040
-
-/* SH_PI_CRBP_ERROR_MASK_FSB_SHUB_UCE */
-/* Description: Mask un-correctable ECC error detection */
-#define SH_PI_CRBP_ERROR_MASK_FSB_SHUB_UCE_SHFT 7
-#define SH_PI_CRBP_ERROR_MASK_FSB_SHUB_UCE_MASK 0x0000000000000080
-
-/* SH_PI_CRBP_ERROR_MASK_FSB_SHUB_CE */
-/* Description: Mask correctable ECC error detection */
-#define SH_PI_CRBP_ERROR_MASK_FSB_SHUB_CE_SHFT 8
-#define SH_PI_CRBP_ERROR_MASK_FSB_SHUB_CE_MASK 0x0000000000000100
-
-/* SH_PI_CRBP_ERROR_MASK_MSG_COLOR_ERR */
-/* Description: Mask detection of color errors */
-#define SH_PI_CRBP_ERROR_MASK_MSG_COLOR_ERR_SHFT 9
-#define SH_PI_CRBP_ERROR_MASK_MSG_COLOR_ERR_MASK 0x0000000000000200
-
-/* SH_PI_CRBP_ERROR_MASK_MD_RQ_Q_OFLOW */
-/* Description: Mask MD Request input buffer over flow error */
-#define SH_PI_CRBP_ERROR_MASK_MD_RQ_Q_OFLOW_SHFT 10
-#define SH_PI_CRBP_ERROR_MASK_MD_RQ_Q_OFLOW_MASK 0x0000000000000400
-
-/* SH_PI_CRBP_ERROR_MASK_MD_RP_Q_OFLOW */
-/* Description: Mask MD Reply input buffer over flow error */
-#define SH_PI_CRBP_ERROR_MASK_MD_RP_Q_OFLOW_SHFT 11
-#define SH_PI_CRBP_ERROR_MASK_MD_RP_Q_OFLOW_MASK 0x0000000000000800
-
-/* SH_PI_CRBP_ERROR_MASK_XN_RQ_Q_OFLOW */
-/* Description: Mask XN Request input buffer over flow error */
-#define SH_PI_CRBP_ERROR_MASK_XN_RQ_Q_OFLOW_SHFT 12
-#define SH_PI_CRBP_ERROR_MASK_XN_RQ_Q_OFLOW_MASK 0x0000000000001000
-
-/* SH_PI_CRBP_ERROR_MASK_XN_RP_Q_OFLOW */
-/* Description: Mask XN Reply input buffer over flow error */
-#define SH_PI_CRBP_ERROR_MASK_XN_RP_Q_OFLOW_SHFT 13
-#define SH_PI_CRBP_ERROR_MASK_XN_RP_Q_OFLOW_MASK 0x0000000000002000
-
-/* SH_PI_CRBP_ERROR_MASK_NACK_OFLOW */
-/* Description: Mask NACK over flow error */
-#define SH_PI_CRBP_ERROR_MASK_NACK_OFLOW_SHFT 14
-#define SH_PI_CRBP_ERROR_MASK_NACK_OFLOW_MASK 0x0000000000004000
-
-/* SH_PI_CRBP_ERROR_MASK_GFX_INT_0 */
-/* Description: Mask GFX transfer interrupt for CPU 0 */
-#define SH_PI_CRBP_ERROR_MASK_GFX_INT_0_SHFT 15
-#define SH_PI_CRBP_ERROR_MASK_GFX_INT_0_MASK 0x0000000000008000
-
-/* SH_PI_CRBP_ERROR_MASK_GFX_INT_1 */
-/* Description: Mask GFX transfer interrupt for CPU 1 */
-#define SH_PI_CRBP_ERROR_MASK_GFX_INT_1_SHFT 16
-#define SH_PI_CRBP_ERROR_MASK_GFX_INT_1_MASK 0x0000000000010000
-
-/* SH_PI_CRBP_ERROR_MASK_MD_RQ_CRD_OFLOW */
-/* Description: Mask MD Request Credit Overflow Error */
-#define SH_PI_CRBP_ERROR_MASK_MD_RQ_CRD_OFLOW_SHFT 17
-#define SH_PI_CRBP_ERROR_MASK_MD_RQ_CRD_OFLOW_MASK 0x0000000000020000
-
-/* SH_PI_CRBP_ERROR_MASK_MD_RP_CRD_OFLOW */
-/* Description: Mask MD Reply Credit Overflow Error */
-#define SH_PI_CRBP_ERROR_MASK_MD_RP_CRD_OFLOW_SHFT 18
-#define SH_PI_CRBP_ERROR_MASK_MD_RP_CRD_OFLOW_MASK 0x0000000000040000
-
-/* SH_PI_CRBP_ERROR_MASK_XN_RQ_CRD_OFLOW */
-/* Description: Mask XN Request Credit Overflow Error */
-#define SH_PI_CRBP_ERROR_MASK_XN_RQ_CRD_OFLOW_SHFT 19
-#define SH_PI_CRBP_ERROR_MASK_XN_RQ_CRD_OFLOW_MASK 0x0000000000080000
-
-/* SH_PI_CRBP_ERROR_MASK_XN_RP_CRD_OFLOW */
-/* Description: Mask XN Reply Credit Overflow Error */
-#define SH_PI_CRBP_ERROR_MASK_XN_RP_CRD_OFLOW_SHFT 20
-#define SH_PI_CRBP_ERROR_MASK_XN_RP_CRD_OFLOW_MASK 0x0000000000100000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_FSB_PIPE_COMPARE" */
-/* CRBP FSB Pipe Compare */
-/* ==================================================================== */
-
-#define SH_PI_CRBP_FSB_PIPE_COMPARE 0x0000000120050580
-#define SH_PI_CRBP_FSB_PIPE_COMPARE_MASK 0x001fffffffffffff
-#define SH_PI_CRBP_FSB_PIPE_COMPARE_INIT 0x0000000000000000
-
-/* SH_PI_CRBP_FSB_PIPE_COMPARE_COMPARE_ADDRESS */
-/* Description: Address A or B to compare against */
-#define SH_PI_CRBP_FSB_PIPE_COMPARE_COMPARE_ADDRESS_SHFT 0
-#define SH_PI_CRBP_FSB_PIPE_COMPARE_COMPARE_ADDRESS_MASK 0x00007fffffffffff
-
-/* SH_PI_CRBP_FSB_PIPE_COMPARE_COMPARE_REQ */
-/* Description: REQa or REQb value to compare against */
-#define SH_PI_CRBP_FSB_PIPE_COMPARE_COMPARE_REQ_SHFT 47
-#define SH_PI_CRBP_FSB_PIPE_COMPARE_COMPARE_REQ_MASK 0x001f800000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_FSB_PIPE_MASK" */
-/* CRBP Compare Mask */
-/* ==================================================================== */
-
-#define SH_PI_CRBP_FSB_PIPE_MASK 0x0000000120050600
-#define SH_PI_CRBP_FSB_PIPE_MASK_MASK 0x001fffffffffffff
-#define SH_PI_CRBP_FSB_PIPE_MASK_INIT 0x0000000000000000
-
-/* SH_PI_CRBP_FSB_PIPE_MASK_COMPARE_ADDRESS_MASK */
-/* Description: Address A or B mask values */
-#define SH_PI_CRBP_FSB_PIPE_MASK_COMPARE_ADDRESS_MASK_SHFT 0
-#define SH_PI_CRBP_FSB_PIPE_MASK_COMPARE_ADDRESS_MASK_MASK 0x00007fffffffffff
-
-/* SH_PI_CRBP_FSB_PIPE_MASK_COMPARE_REQ_MASK */
-/* Description: REQa or REQb mask values */
-#define SH_PI_CRBP_FSB_PIPE_MASK_COMPARE_REQ_MASK_SHFT 47
-#define SH_PI_CRBP_FSB_PIPE_MASK_COMPARE_REQ_MASK_MASK 0x001f800000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_TEST_POINT_COMPARE" */
-/* PI CRBP Test Point Compare */
-/* ==================================================================== */
-
-#define SH_PI_CRBP_TEST_POINT_COMPARE 0x0000000120050680
-#define SH_PI_CRBP_TEST_POINT_COMPARE_MASK 0xffffffffffffffff
-#define SH_PI_CRBP_TEST_POINT_COMPARE_INIT 0xffffffff00000000
-
-/* SH_PI_CRBP_TEST_POINT_COMPARE_COMPARE_MASK */
-/* Description: Mask to select Debug bits for trigger generation */
-#define SH_PI_CRBP_TEST_POINT_COMPARE_COMPARE_MASK_SHFT 0
-#define SH_PI_CRBP_TEST_POINT_COMPARE_COMPARE_MASK_MASK 0x00000000ffffffff
-
-/* SH_PI_CRBP_TEST_POINT_COMPARE_COMPARE_PATTERN */
-/* Description: debug bit pattern for trigger generation */
-#define SH_PI_CRBP_TEST_POINT_COMPARE_COMPARE_PATTERN_SHFT 32
-#define SH_PI_CRBP_TEST_POINT_COMPARE_COMPARE_PATTERN_MASK 0xffffffff00000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_TEST_POINT_SELECT" */
-/* PI CRBP Test Point Select */
-/* ==================================================================== */
-
-#define SH_PI_CRBP_TEST_POINT_SELECT 0x0000000120050700
-#define SH_PI_CRBP_TEST_POINT_SELECT_MASK 0xf777777777777777
-#define SH_PI_CRBP_TEST_POINT_SELECT_INIT 0x0000000000000000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL */
-/* Description: Nibble 0 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL_SHFT 0
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL_MASK 0x0000000000000007
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL */
-/* Description: Nibble 1 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL_SHFT 8
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL_MASK 0x0000000000000700
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL */
-/* Description: Nibble 2 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL_SHFT 16
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL_MASK 0x0000000000070000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL */
-/* Description: Nibble 3 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL_SHFT 24
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL_MASK 0x0000000007000000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL */
-/* Description: Nibble 4 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL_SHFT 32
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL_MASK 0x0000000700000000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL */
-/* Description: Nibble 5 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL_SHFT 40
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL_MASK 0x0000070000000000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL */
-/* Description: Nibble 6 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL_SHFT 48
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL_MASK 0x0007000000000000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL */
-/* Description: Nibble 7 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL_SHFT 56
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL_MASK 0x0700000000000000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_PI_CRBP_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* SH_PI_CRBP_TEST_POINT_SELECT_TRIGGER_ENABLE */
-/* Description: Enable trigger on bit 32 of Analyzer data */
-#define SH_PI_CRBP_TEST_POINT_SELECT_TRIGGER_ENABLE_SHFT 63
-#define SH_PI_CRBP_TEST_POINT_SELECT_TRIGGER_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT" */
-/* PI CRBP Test Point Trigger Select */
-/* ==================================================================== */
-
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT 0x0000000120050780
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_MASK 0x7777777777777777
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_INIT 0x0000000000000000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL */
-/* Description: Nibble 0 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL_SHFT 0
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL_MASK 0x0000000000000007
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL_SHFT 4
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL */
-/* Description: Nibble 1 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL_SHFT 8
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL_MASK 0x0000000000000700
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL_SHFT 12
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL */
-/* Description: Nibble 2 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL_SHFT 16
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL_MASK 0x0000000000070000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL_SHFT 20
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL */
-/* Description: Nibble 3 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL_SHFT 24
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL_MASK 0x0000000007000000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL_SHFT 28
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL */
-/* Description: Nibble 4 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL_SHFT 32
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL_MASK 0x0000000700000000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL_SHFT 36
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL */
-/* Description: Nibble 5 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL_SHFT 40
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL_MASK 0x0000070000000000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL_SHFT 44
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL */
-/* Description: Nibble 6 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL_SHFT 48
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL_MASK 0x0007000000000000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL_SHFT 52
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL */
-/* Description: Nibble 7 Chiplet select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL_SHFT 56
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL_MASK 0x0700000000000000
-
-/* SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL_SHFT 60
-#define SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_XB_PIPE_COMPARE_0" */
-/* CRBP XB Pipe Compare */
-/* ==================================================================== */
-
-#define SH_PI_CRBP_XB_PIPE_COMPARE_0 0x0000000120050800
-#define SH_PI_CRBP_XB_PIPE_COMPARE_0_MASK 0x007fffffffffffff
-#define SH_PI_CRBP_XB_PIPE_COMPARE_0_INIT 0x0000000000000000
-
-/* SH_PI_CRBP_XB_PIPE_COMPARE_0_COMPARE_ADDRESS */
-/* Description: Address to compare against */
-#define SH_PI_CRBP_XB_PIPE_COMPARE_0_COMPARE_ADDRESS_SHFT 0
-#define SH_PI_CRBP_XB_PIPE_COMPARE_0_COMPARE_ADDRESS_MASK 0x00007fffffffffff
-
-/* SH_PI_CRBP_XB_PIPE_COMPARE_0_COMPARE_COMMAND */
-/* Description: SN2NET Command to compare against */
-#define SH_PI_CRBP_XB_PIPE_COMPARE_0_COMPARE_COMMAND_SHFT 47
-#define SH_PI_CRBP_XB_PIPE_COMPARE_0_COMPARE_COMMAND_MASK 0x007f800000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_XB_PIPE_COMPARE_1" */
-/* CRBP XB Pipe Compare */
-/* ==================================================================== */
-
-#define SH_PI_CRBP_XB_PIPE_COMPARE_1 0x0000000120050880
-#define SH_PI_CRBP_XB_PIPE_COMPARE_1_MASK 0x000001ff3fff3fff
-#define SH_PI_CRBP_XB_PIPE_COMPARE_1_INIT 0x0000000000000000
-
-/* SH_PI_CRBP_XB_PIPE_COMPARE_1_COMPARE_SOURCE */
-/* Description: Source to compare against */
-#define SH_PI_CRBP_XB_PIPE_COMPARE_1_COMPARE_SOURCE_SHFT 0
-#define SH_PI_CRBP_XB_PIPE_COMPARE_1_COMPARE_SOURCE_MASK 0x0000000000003fff
-
-/* SH_PI_CRBP_XB_PIPE_COMPARE_1_COMPARE_SUPPLEMENTAL */
-/* Description: Supplemental to compare against */
-#define SH_PI_CRBP_XB_PIPE_COMPARE_1_COMPARE_SUPPLEMENTAL_SHFT 16
-#define SH_PI_CRBP_XB_PIPE_COMPARE_1_COMPARE_SUPPLEMENTAL_MASK 0x000000003fff0000
-
-/* SH_PI_CRBP_XB_PIPE_COMPARE_1_COMPARE_ECHO */
-/* Description: Echo to compare against */
-#define SH_PI_CRBP_XB_PIPE_COMPARE_1_COMPARE_ECHO_SHFT 32
-#define SH_PI_CRBP_XB_PIPE_COMPARE_1_COMPARE_ECHO_MASK 0x000001ff00000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_XB_PIPE_MASK_0" */
-/* CRBP Compare Mask Register 1 */
-/* ==================================================================== */
-
-#define SH_PI_CRBP_XB_PIPE_MASK_0 0x0000000120050900
-#define SH_PI_CRBP_XB_PIPE_MASK_0_MASK 0x007fffffffffffff
-#define SH_PI_CRBP_XB_PIPE_MASK_0_INIT 0x0000000000000000
-
-/* SH_PI_CRBP_XB_PIPE_MASK_0_COMPARE_ADDRESS_MASK */
-/* Description: Address to compare against */
-#define SH_PI_CRBP_XB_PIPE_MASK_0_COMPARE_ADDRESS_MASK_SHFT 0
-#define SH_PI_CRBP_XB_PIPE_MASK_0_COMPARE_ADDRESS_MASK_MASK 0x00007fffffffffff
-
-/* SH_PI_CRBP_XB_PIPE_MASK_0_COMPARE_COMMAND_MASK */
-/* Description: SN2NET Command to compare against */
-#define SH_PI_CRBP_XB_PIPE_MASK_0_COMPARE_COMMAND_MASK_SHFT 47
-#define SH_PI_CRBP_XB_PIPE_MASK_0_COMPARE_COMMAND_MASK_MASK 0x007f800000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_XB_PIPE_MASK_1" */
-/* CRBP XB Pipe Compare Mask Register 1 */
-/* ==================================================================== */
-
-#define SH_PI_CRBP_XB_PIPE_MASK_1 0x0000000120050980
-#define SH_PI_CRBP_XB_PIPE_MASK_1_MASK 0x000001ff3fff3fff
-#define SH_PI_CRBP_XB_PIPE_MASK_1_INIT 0x0000000000000000
-
-/* SH_PI_CRBP_XB_PIPE_MASK_1_COMPARE_SOURCE_MASK */
-/* Description: Source to compare against */
-#define SH_PI_CRBP_XB_PIPE_MASK_1_COMPARE_SOURCE_MASK_SHFT 0
-#define SH_PI_CRBP_XB_PIPE_MASK_1_COMPARE_SOURCE_MASK_MASK 0x0000000000003fff
-
-/* SH_PI_CRBP_XB_PIPE_MASK_1_COMPARE_SUPPLEMENTAL_MASK */
-/* Description: Supplemental to compare against */
-#define SH_PI_CRBP_XB_PIPE_MASK_1_COMPARE_SUPPLEMENTAL_MASK_SHFT 16
-#define SH_PI_CRBP_XB_PIPE_MASK_1_COMPARE_SUPPLEMENTAL_MASK_MASK 0x000000003fff0000
-
-/* SH_PI_CRBP_XB_PIPE_MASK_1_COMPARE_ECHO_MASK */
-/* Description: Echo to compare against */
-#define SH_PI_CRBP_XB_PIPE_MASK_1_COMPARE_ECHO_MASK_SHFT 32
-#define SH_PI_CRBP_XB_PIPE_MASK_1_COMPARE_ECHO_MASK_MASK 0x000001ff00000000
-
-/* ==================================================================== */
-/* Register "SH_PI_DPC_QUEUE_CONFIG" */
-/* DPC Queue Configuration */
-/* ==================================================================== */
-
-#define SH_PI_DPC_QUEUE_CONFIG 0x0000000120050a00
-#define SH_PI_DPC_QUEUE_CONFIG_MASK 0x000000001f1f1f1f
-#define SH_PI_DPC_QUEUE_CONFIG_INIT 0x000000000c010c01
-
-/* SH_PI_DPC_QUEUE_CONFIG_DWCQ_AE_LEVEL */
-/* Description: DXB WTL Command Queue Almost Empty Level */
-#define SH_PI_DPC_QUEUE_CONFIG_DWCQ_AE_LEVEL_SHFT 0
-#define SH_PI_DPC_QUEUE_CONFIG_DWCQ_AE_LEVEL_MASK 0x000000000000001f
-
-/* SH_PI_DPC_QUEUE_CONFIG_DWCQ_AF_THRESH */
-/* Description: DXB WTL Command Queue Almost Full Threshold */
-#define SH_PI_DPC_QUEUE_CONFIG_DWCQ_AF_THRESH_SHFT 8
-#define SH_PI_DPC_QUEUE_CONFIG_DWCQ_AF_THRESH_MASK 0x0000000000001f00
-
-/* SH_PI_DPC_QUEUE_CONFIG_FWCQ_AE_LEVEL */
-/* Description: FSB WTL Command Queue Almost Empty Level */
-#define SH_PI_DPC_QUEUE_CONFIG_FWCQ_AE_LEVEL_SHFT 16
-#define SH_PI_DPC_QUEUE_CONFIG_FWCQ_AE_LEVEL_MASK 0x00000000001f0000
-
-/* SH_PI_DPC_QUEUE_CONFIG_FWCQ_AF_THRESH */
-/* Description: FSB WTL Command Queue Almost Full Threshold */
-#define SH_PI_DPC_QUEUE_CONFIG_FWCQ_AF_THRESH_SHFT 24
-#define SH_PI_DPC_QUEUE_CONFIG_FWCQ_AF_THRESH_MASK 0x000000001f000000
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_MASK" */
-/* PI Error Mask */
-/* ==================================================================== */
-
-#define SH_PI_ERROR_MASK 0x0000000120050a80
-#define SH_PI_ERROR_MASK_MASK 0x00000007ffffffff
-#define SH_PI_ERROR_MASK_INIT 0x00000007ffffffff
-
-/* SH_PI_ERROR_MASK_FSB_PROTO_ERR */
-/* Description: Mask detection of internal protocol table misses */
-#define SH_PI_ERROR_MASK_FSB_PROTO_ERR_SHFT 0
-#define SH_PI_ERROR_MASK_FSB_PROTO_ERR_MASK 0x0000000000000001
-
-/* SH_PI_ERROR_MASK_GFX_RP_ERR */
-/* Description: Mask graphic reply error message error detection */
-#define SH_PI_ERROR_MASK_GFX_RP_ERR_SHFT 1
-#define SH_PI_ERROR_MASK_GFX_RP_ERR_MASK 0x0000000000000002
-
-/* SH_PI_ERROR_MASK_XB_PROTO_ERR */
-/* Description: Mask detection of external protocol table misses */
-#define SH_PI_ERROR_MASK_XB_PROTO_ERR_SHFT 2
-#define SH_PI_ERROR_MASK_XB_PROTO_ERR_MASK 0x0000000000000004
-
-/* SH_PI_ERROR_MASK_MEM_RP_ERR */
-/* Description: Mask memory reply error detection */
-#define SH_PI_ERROR_MASK_MEM_RP_ERR_SHFT 3
-#define SH_PI_ERROR_MASK_MEM_RP_ERR_MASK 0x0000000000000008
-
-/* SH_PI_ERROR_MASK_PIO_RP_ERR */
-/* Description: Mask PIO reply error detection */
-#define SH_PI_ERROR_MASK_PIO_RP_ERR_SHFT 4
-#define SH_PI_ERROR_MASK_PIO_RP_ERR_MASK 0x0000000000000010
-
-/* SH_PI_ERROR_MASK_MEM_TO_ERR */
-/* Description: Mask CRB time-out errors */
-#define SH_PI_ERROR_MASK_MEM_TO_ERR_SHFT 5
-#define SH_PI_ERROR_MASK_MEM_TO_ERR_MASK 0x0000000000000020
-
-/* SH_PI_ERROR_MASK_PIO_TO_ERR */
-/* Description: Mask PIO time-out errors */
-#define SH_PI_ERROR_MASK_PIO_TO_ERR_SHFT 6
-#define SH_PI_ERROR_MASK_PIO_TO_ERR_MASK 0x0000000000000040
-
-/* SH_PI_ERROR_MASK_FSB_SHUB_UCE */
-/* Description: Mask un-correctable ECC error detection */
-#define SH_PI_ERROR_MASK_FSB_SHUB_UCE_SHFT 7
-#define SH_PI_ERROR_MASK_FSB_SHUB_UCE_MASK 0x0000000000000080
-
-/* SH_PI_ERROR_MASK_FSB_SHUB_CE */
-/* Description: Mask correctable ECC error detection */
-#define SH_PI_ERROR_MASK_FSB_SHUB_CE_SHFT 8
-#define SH_PI_ERROR_MASK_FSB_SHUB_CE_MASK 0x0000000000000100
-
-/* SH_PI_ERROR_MASK_MSG_COLOR_ERR */
-/* Description: Mask message color error detection */
-#define SH_PI_ERROR_MASK_MSG_COLOR_ERR_SHFT 9
-#define SH_PI_ERROR_MASK_MSG_COLOR_ERR_MASK 0x0000000000000200
-
-/* SH_PI_ERROR_MASK_MD_RQ_Q_OFLOW */
-/* Description: Mask MD Request input buffer over flow error */
-#define SH_PI_ERROR_MASK_MD_RQ_Q_OFLOW_SHFT 10
-#define SH_PI_ERROR_MASK_MD_RQ_Q_OFLOW_MASK 0x0000000000000400
-
-/* SH_PI_ERROR_MASK_MD_RP_Q_OFLOW */
-/* Description: Mask MD Reply input buffer over flow error */
-#define SH_PI_ERROR_MASK_MD_RP_Q_OFLOW_SHFT 11
-#define SH_PI_ERROR_MASK_MD_RP_Q_OFLOW_MASK 0x0000000000000800
-
-/* SH_PI_ERROR_MASK_XN_RQ_Q_OFLOW */
-/* Description: Mask XN Request input buffer over flow error */
-#define SH_PI_ERROR_MASK_XN_RQ_Q_OFLOW_SHFT 12
-#define SH_PI_ERROR_MASK_XN_RQ_Q_OFLOW_MASK 0x0000000000001000
-
-/* SH_PI_ERROR_MASK_XN_RP_Q_OFLOW */
-/* Description: Mask XN Reply input buffer over flow error */
-#define SH_PI_ERROR_MASK_XN_RP_Q_OFLOW_SHFT 13
-#define SH_PI_ERROR_MASK_XN_RP_Q_OFLOW_MASK 0x0000000000002000
-
-/* SH_PI_ERROR_MASK_NACK_OFLOW */
-/* Description: Mask NACK over flow error */
-#define SH_PI_ERROR_MASK_NACK_OFLOW_SHFT 14
-#define SH_PI_ERROR_MASK_NACK_OFLOW_MASK 0x0000000000004000
-
-/* SH_PI_ERROR_MASK_GFX_INT_0 */
-/* Description: Mask GFX transfer interrupt for CPU 0 */
-#define SH_PI_ERROR_MASK_GFX_INT_0_SHFT 15
-#define SH_PI_ERROR_MASK_GFX_INT_0_MASK 0x0000000000008000
-
-/* SH_PI_ERROR_MASK_GFX_INT_1 */
-/* Description: Mask GFX transfer interrupt for CPU 1 */
-#define SH_PI_ERROR_MASK_GFX_INT_1_SHFT 16
-#define SH_PI_ERROR_MASK_GFX_INT_1_MASK 0x0000000000010000
-
-/* SH_PI_ERROR_MASK_MD_RQ_CRD_OFLOW */
-/* Description: Mask MD Request Credit Overflow Error */
-#define SH_PI_ERROR_MASK_MD_RQ_CRD_OFLOW_SHFT 17
-#define SH_PI_ERROR_MASK_MD_RQ_CRD_OFLOW_MASK 0x0000000000020000
-
-/* SH_PI_ERROR_MASK_MD_RP_CRD_OFLOW */
-/* Description: Mask MD Reply Credit Overflow Error */
-#define SH_PI_ERROR_MASK_MD_RP_CRD_OFLOW_SHFT 18
-#define SH_PI_ERROR_MASK_MD_RP_CRD_OFLOW_MASK 0x0000000000040000
-
-/* SH_PI_ERROR_MASK_XN_RQ_CRD_OFLOW */
-/* Description: Mask XN Request Credit Overflow Error */
-#define SH_PI_ERROR_MASK_XN_RQ_CRD_OFLOW_SHFT 19
-#define SH_PI_ERROR_MASK_XN_RQ_CRD_OFLOW_MASK 0x0000000000080000
-
-/* SH_PI_ERROR_MASK_XN_RP_CRD_OFLOW */
-/* Description: Mask XN Reply Credit Overflow Error */
-#define SH_PI_ERROR_MASK_XN_RP_CRD_OFLOW_SHFT 20
-#define SH_PI_ERROR_MASK_XN_RP_CRD_OFLOW_MASK 0x0000000000100000
-
-/* SH_PI_ERROR_MASK_HUNG_BUS */
-/* Description: Mask FSB hung error */
-#define SH_PI_ERROR_MASK_HUNG_BUS_SHFT 21
-#define SH_PI_ERROR_MASK_HUNG_BUS_MASK 0x0000000000200000
-
-/* SH_PI_ERROR_MASK_RSP_PARITY */
-/* Description: Parity error detecte during response phase */
-#define SH_PI_ERROR_MASK_RSP_PARITY_SHFT 22
-#define SH_PI_ERROR_MASK_RSP_PARITY_MASK 0x0000000000400000
-
-/* SH_PI_ERROR_MASK_IOQ_OVERRUN */
-/* Description: Over run error detected on IOQ */
-#define SH_PI_ERROR_MASK_IOQ_OVERRUN_SHFT 23
-#define SH_PI_ERROR_MASK_IOQ_OVERRUN_MASK 0x0000000000800000
-
-/* SH_PI_ERROR_MASK_REQ_FORMAT */
-/* Description: FSB request format not supported */
-#define SH_PI_ERROR_MASK_REQ_FORMAT_SHFT 24
-#define SH_PI_ERROR_MASK_REQ_FORMAT_MASK 0x0000000001000000
-
-/* SH_PI_ERROR_MASK_ADDR_ACCESS */
-/* Description: Access to Address is not supported */
-#define SH_PI_ERROR_MASK_ADDR_ACCESS_SHFT 25
-#define SH_PI_ERROR_MASK_ADDR_ACCESS_MASK 0x0000000002000000
-
-/* SH_PI_ERROR_MASK_REQ_PARITY */
-/* Description: Parity error detected during request phase */
-#define SH_PI_ERROR_MASK_REQ_PARITY_SHFT 26
-#define SH_PI_ERROR_MASK_REQ_PARITY_MASK 0x0000000004000000
-
-/* SH_PI_ERROR_MASK_ADDR_PARITY */
-/* Description: Parity error detected on address */
-#define SH_PI_ERROR_MASK_ADDR_PARITY_SHFT 27
-#define SH_PI_ERROR_MASK_ADDR_PARITY_MASK 0x0000000008000000
-
-/* SH_PI_ERROR_MASK_SHUB_FSB_DQE */
-/* Description: SHUB_FSB_DQE */
-#define SH_PI_ERROR_MASK_SHUB_FSB_DQE_SHFT 28
-#define SH_PI_ERROR_MASK_SHUB_FSB_DQE_MASK 0x0000000010000000
-
-/* SH_PI_ERROR_MASK_SHUB_FSB_UCE */
-/* Description: An un-correctable ECC error was detected */
-#define SH_PI_ERROR_MASK_SHUB_FSB_UCE_SHFT 29
-#define SH_PI_ERROR_MASK_SHUB_FSB_UCE_MASK 0x0000000020000000
-
-/* SH_PI_ERROR_MASK_SHUB_FSB_CE */
-/* Description: An correctable ECC error was detected */
-#define SH_PI_ERROR_MASK_SHUB_FSB_CE_SHFT 30
-#define SH_PI_ERROR_MASK_SHUB_FSB_CE_MASK 0x0000000040000000
-
-/* SH_PI_ERROR_MASK_LIVELOCK */
-/* Description: AFI livelock error was detected */
-#define SH_PI_ERROR_MASK_LIVELOCK_SHFT 31
-#define SH_PI_ERROR_MASK_LIVELOCK_MASK 0x0000000080000000
-
-/* SH_PI_ERROR_MASK_BAD_SNOOP */
-/* Description: AFI bad snoop error was detected */
-#define SH_PI_ERROR_MASK_BAD_SNOOP_SHFT 32
-#define SH_PI_ERROR_MASK_BAD_SNOOP_MASK 0x0000000100000000
-
-/* SH_PI_ERROR_MASK_FSB_TBL_MISS */
-/* Description: AFI FSB request table miss error was detected */
-#define SH_PI_ERROR_MASK_FSB_TBL_MISS_SHFT 33
-#define SH_PI_ERROR_MASK_FSB_TBL_MISS_MASK 0x0000000200000000
-
-/* SH_PI_ERROR_MASK_MSG_LENGTH */
-/* Description: Message length error on received message from SIC */
-#define SH_PI_ERROR_MASK_MSG_LENGTH_SHFT 34
-#define SH_PI_ERROR_MASK_MSG_LENGTH_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_PI_EXPRESS_REPLY_CONFIG" */
-/* PI Express Reply Configuration */
-/* ==================================================================== */
-
-#define SH_PI_EXPRESS_REPLY_CONFIG 0x0000000120050b00
-#define SH_PI_EXPRESS_REPLY_CONFIG_MASK 0x0000000000000007
-#define SH_PI_EXPRESS_REPLY_CONFIG_INIT 0x0000000000000001
-
-/* SH_PI_EXPRESS_REPLY_CONFIG_MODE */
-/* Description: Express Reply Mode */
-#define SH_PI_EXPRESS_REPLY_CONFIG_MODE_SHFT 0
-#define SH_PI_EXPRESS_REPLY_CONFIG_MODE_MASK 0x0000000000000007
-
-/* ==================================================================== */
-/* Register "SH_PI_FSB_COMPARE_VALUE" */
-/* FSB Compare Value */
-/* ==================================================================== */
-
-#define SH_PI_FSB_COMPARE_VALUE 0x0000000120050c00
-#define SH_PI_FSB_COMPARE_VALUE_MASK 0xffffffffffffffff
-#define SH_PI_FSB_COMPARE_VALUE_INIT 0x0000000000000000
-
-/* SH_PI_FSB_COMPARE_VALUE_COMPARE_VALUE */
-/* Description: Compare value */
-#define SH_PI_FSB_COMPARE_VALUE_COMPARE_VALUE_SHFT 0
-#define SH_PI_FSB_COMPARE_VALUE_COMPARE_VALUE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_PI_FSB_COMPARE_MASK" */
-/* FSB Compare Mask */
-/* ==================================================================== */
-
-#define SH_PI_FSB_COMPARE_MASK 0x0000000120050b80
-#define SH_PI_FSB_COMPARE_MASK_MASK 0xffffffffffffffff
-#define SH_PI_FSB_COMPARE_MASK_INIT 0x0000000000000000
-
-/* SH_PI_FSB_COMPARE_MASK_MASK_VALUE */
-/* Description: Mask value */
-#define SH_PI_FSB_COMPARE_MASK_MASK_VALUE_SHFT 0
-#define SH_PI_FSB_COMPARE_MASK_MASK_VALUE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_PI_FSB_ERROR_INJECTION" */
-/* Inject an Error onto the FSB */
-/* ==================================================================== */
-
-#define SH_PI_FSB_ERROR_INJECTION 0x0000000120050c80
-#define SH_PI_FSB_ERROR_INJECTION_MASK 0x000000070fff03ff
-#define SH_PI_FSB_ERROR_INJECTION_INIT 0x0000000000000000
-
-/* SH_PI_FSB_ERROR_INJECTION_RP_PE_TO_FSB */
-/* Description: Inject a RP# Parity Error onto the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_RP_PE_TO_FSB_SHFT 0
-#define SH_PI_FSB_ERROR_INJECTION_RP_PE_TO_FSB_MASK 0x0000000000000001
-
-/* SH_PI_FSB_ERROR_INJECTION_AP0_PE_TO_FSB */
-/* Description: Inject an AP[0]# Parity Error onto the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_AP0_PE_TO_FSB_SHFT 1
-#define SH_PI_FSB_ERROR_INJECTION_AP0_PE_TO_FSB_MASK 0x0000000000000002
-
-/* SH_PI_FSB_ERROR_INJECTION_AP1_PE_TO_FSB */
-/* Description: Inject an AP[1]# Parity Error onto the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_AP1_PE_TO_FSB_SHFT 2
-#define SH_PI_FSB_ERROR_INJECTION_AP1_PE_TO_FSB_MASK 0x0000000000000004
-
-/* SH_PI_FSB_ERROR_INJECTION_RSP_PE_TO_FSB */
-/* Description: Inject a RSP# Parity Error onto the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_RSP_PE_TO_FSB_SHFT 3
-#define SH_PI_FSB_ERROR_INJECTION_RSP_PE_TO_FSB_MASK 0x0000000000000008
-
-/* SH_PI_FSB_ERROR_INJECTION_DW0_CE_TO_FSB */
-/* Description: Inject a Correctable Error in Doubleword 0 onto the */
-#define SH_PI_FSB_ERROR_INJECTION_DW0_CE_TO_FSB_SHFT 4
-#define SH_PI_FSB_ERROR_INJECTION_DW0_CE_TO_FSB_MASK 0x0000000000000010
-
-/* SH_PI_FSB_ERROR_INJECTION_DW0_UCE_TO_FSB */
-/* Description: Inject an Uncorrectable Error in Doubleword 0 onto */
-/* the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_DW0_UCE_TO_FSB_SHFT 5
-#define SH_PI_FSB_ERROR_INJECTION_DW0_UCE_TO_FSB_MASK 0x0000000000000020
-
-/* SH_PI_FSB_ERROR_INJECTION_DW1_CE_TO_FSB */
-/* Description: Inject a Correctable Error in Doubleword 1 onto the */
-#define SH_PI_FSB_ERROR_INJECTION_DW1_CE_TO_FSB_SHFT 6
-#define SH_PI_FSB_ERROR_INJECTION_DW1_CE_TO_FSB_MASK 0x0000000000000040
-
-/* SH_PI_FSB_ERROR_INJECTION_DW1_UCE_TO_FSB */
-/* Description: Inject an Uncorrectable Error in Doubleword 1 onto */
-/* the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_DW1_UCE_TO_FSB_SHFT 7
-#define SH_PI_FSB_ERROR_INJECTION_DW1_UCE_TO_FSB_MASK 0x0000000000000080
-
-/* SH_PI_FSB_ERROR_INJECTION_IP0_PE_TO_FSB */
-/* Description: Inject an IP[0]# Parity Error onto the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_IP0_PE_TO_FSB_SHFT 8
-#define SH_PI_FSB_ERROR_INJECTION_IP0_PE_TO_FSB_MASK 0x0000000000000100
-
-/* SH_PI_FSB_ERROR_INJECTION_IP1_PE_TO_FSB */
-/* Description: Inject an IP[1]# Parity Error onto the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_IP1_PE_TO_FSB_SHFT 9
-#define SH_PI_FSB_ERROR_INJECTION_IP1_PE_TO_FSB_MASK 0x0000000000000200
-
-/* SH_PI_FSB_ERROR_INJECTION_RP_PE_FROM_FSB */
-/* Description: Inject a RP# Parity Error When Sampling the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_RP_PE_FROM_FSB_SHFT 16
-#define SH_PI_FSB_ERROR_INJECTION_RP_PE_FROM_FSB_MASK 0x0000000000010000
-
-/* SH_PI_FSB_ERROR_INJECTION_AP0_PE_FROM_FSB */
-/* Description: Inject an AP[0]# Parity Error When Sampling the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_AP0_PE_FROM_FSB_SHFT 17
-#define SH_PI_FSB_ERROR_INJECTION_AP0_PE_FROM_FSB_MASK 0x0000000000020000
-
-/* SH_PI_FSB_ERROR_INJECTION_AP1_PE_FROM_FSB */
-/* Description: Inject an AP[1]# Parity Error When Sampling the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_AP1_PE_FROM_FSB_SHFT 18
-#define SH_PI_FSB_ERROR_INJECTION_AP1_PE_FROM_FSB_MASK 0x0000000000040000
-
-/* SH_PI_FSB_ERROR_INJECTION_RSP_PE_FROM_FSB */
-/* Description: Inject a RSP# Parity Error When Sampling the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_RSP_PE_FROM_FSB_SHFT 19
-#define SH_PI_FSB_ERROR_INJECTION_RSP_PE_FROM_FSB_MASK 0x0000000000080000
-
-/* SH_PI_FSB_ERROR_INJECTION_DW0_CE_FROM_FSB */
-/* Description: Inject a Correctable Error in Doubleword 0 of SIC D */
-/* ata Packet 0 */
-#define SH_PI_FSB_ERROR_INJECTION_DW0_CE_FROM_FSB_SHFT 20
-#define SH_PI_FSB_ERROR_INJECTION_DW0_CE_FROM_FSB_MASK 0x0000000000100000
-
-/* SH_PI_FSB_ERROR_INJECTION_DW0_UCE_FROM_FSB */
-/* Description: Inject a Uncorrectable Error in Doubleword 0 of SIC */
-/* Data Packet 0 */
-#define SH_PI_FSB_ERROR_INJECTION_DW0_UCE_FROM_FSB_SHFT 21
-#define SH_PI_FSB_ERROR_INJECTION_DW0_UCE_FROM_FSB_MASK 0x0000000000200000
-
-/* SH_PI_FSB_ERROR_INJECTION_DW1_CE_FROM_FSB */
-/* Description: Inject a Correctable Error in Doubleword 0 of SIC D */
-/* ata Packet 0 */
-#define SH_PI_FSB_ERROR_INJECTION_DW1_CE_FROM_FSB_SHFT 22
-#define SH_PI_FSB_ERROR_INJECTION_DW1_CE_FROM_FSB_MASK 0x0000000000400000
-
-/* SH_PI_FSB_ERROR_INJECTION_DW1_UCE_FROM_FSB */
-/* Description: Inject a Uncorrectable Error in Doubleword 0 of SIC */
-/* Data Packet 0 */
-#define SH_PI_FSB_ERROR_INJECTION_DW1_UCE_FROM_FSB_SHFT 23
-#define SH_PI_FSB_ERROR_INJECTION_DW1_UCE_FROM_FSB_MASK 0x0000000000800000
-
-/* SH_PI_FSB_ERROR_INJECTION_DW2_CE_FROM_FSB */
-/* Description: Inject a Correctable Error in Doubleword 0 of SIC D */
-/* ata Packet 0 */
-#define SH_PI_FSB_ERROR_INJECTION_DW2_CE_FROM_FSB_SHFT 24
-#define SH_PI_FSB_ERROR_INJECTION_DW2_CE_FROM_FSB_MASK 0x0000000001000000
-
-/* SH_PI_FSB_ERROR_INJECTION_DW2_UCE_FROM_FSB */
-/* Description: Inject a Uncorrectable Error in Doubleword 0 of SIC */
-/* Data Packet 0 */
-#define SH_PI_FSB_ERROR_INJECTION_DW2_UCE_FROM_FSB_SHFT 25
-#define SH_PI_FSB_ERROR_INJECTION_DW2_UCE_FROM_FSB_MASK 0x0000000002000000
-
-/* SH_PI_FSB_ERROR_INJECTION_DW3_CE_FROM_FSB */
-/* Description: Inject a Correctable Error in Doubleword 0 of SIC D */
-/* ata Packet 0 */
-#define SH_PI_FSB_ERROR_INJECTION_DW3_CE_FROM_FSB_SHFT 26
-#define SH_PI_FSB_ERROR_INJECTION_DW3_CE_FROM_FSB_MASK 0x0000000004000000
-
-/* SH_PI_FSB_ERROR_INJECTION_DW3_UCE_FROM_FSB */
-/* Description: Inject a Uncorrectable Error in Doubleword 0 of SIC */
-/* Data Packet 0 */
-#define SH_PI_FSB_ERROR_INJECTION_DW3_UCE_FROM_FSB_SHFT 27
-#define SH_PI_FSB_ERROR_INJECTION_DW3_UCE_FROM_FSB_MASK 0x0000000008000000
-
-/* SH_PI_FSB_ERROR_INJECTION_IOQ_OVERRUN */
-/* Description: Inject an ioq overrun Error on the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_IOQ_OVERRUN_SHFT 32
-#define SH_PI_FSB_ERROR_INJECTION_IOQ_OVERRUN_MASK 0x0000000100000000
-
-/* SH_PI_FSB_ERROR_INJECTION_LIVELOCK */
-/* Description: Inject a livelock Error on the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_LIVELOCK_SHFT 33
-#define SH_PI_FSB_ERROR_INJECTION_LIVELOCK_MASK 0x0000000200000000
-
-/* SH_PI_FSB_ERROR_INJECTION_BUS_HANG */
-/* Description: Inject an bus hang on the FSB */
-#define SH_PI_FSB_ERROR_INJECTION_BUS_HANG_SHFT 34
-#define SH_PI_FSB_ERROR_INJECTION_BUS_HANG_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_PI_MD2PI_REPLY_VC_CONFIG" */
-/* MD-to-PI Reply Virtual Channel Configuration */
-/* ==================================================================== */
-
-#define SH_PI_MD2PI_REPLY_VC_CONFIG 0x0000000120050d00
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_MASK 0xc000000000003fff
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_INIT 0x000000000000088c
-
-/* SH_PI_MD2PI_REPLY_VC_CONFIG_HDR_DEPTH */
-/* Description: Depth of header Buffer */
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_HDR_DEPTH_SHFT 0
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_HDR_DEPTH_MASK 0x000000000000000f
-
-/* SH_PI_MD2PI_REPLY_VC_CONFIG_DATA_DEPTH */
-/* Description: Number of data buffers Available */
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_DATA_DEPTH_SHFT 4
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_DATA_DEPTH_MASK 0x00000000000000f0
-
-/* SH_PI_MD2PI_REPLY_VC_CONFIG_MAX_CREDITS */
-/* Description: Maximum credits from sender */
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_MAX_CREDITS_SHFT 8
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_MAX_CREDITS_MASK 0x0000000000003f00
-
-/* SH_PI_MD2PI_REPLY_VC_CONFIG_FORCE_CREDIT */
-/* Description: Send an extra credit to sender */
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_FORCE_CREDIT_SHFT 62
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_FORCE_CREDIT_MASK 0x4000000000000000
-
-/* SH_PI_MD2PI_REPLY_VC_CONFIG_CAPTURE_CREDIT_STATUS */
-/* Description: Capture credit and status information */
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_CAPTURE_CREDIT_STATUS_SHFT 63
-#define SH_PI_MD2PI_REPLY_VC_CONFIG_CAPTURE_CREDIT_STATUS_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_MD2PI_REQUEST_VC_CONFIG" */
-/* MD-to-PI Request Virtual Channel Configuration */
-/* ==================================================================== */
-
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG 0x0000000120050d80
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_MASK 0xc000000000003fff
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_INIT 0x000000000000088c
-
-/* SH_PI_MD2PI_REQUEST_VC_CONFIG_HDR_DEPTH */
-/* Description: Depth of header Buffer */
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_HDR_DEPTH_SHFT 0
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_HDR_DEPTH_MASK 0x000000000000000f
-
-/* SH_PI_MD2PI_REQUEST_VC_CONFIG_DATA_DEPTH */
-/* Description: Number of data buffers Available */
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_DATA_DEPTH_SHFT 4
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_DATA_DEPTH_MASK 0x00000000000000f0
-
-/* SH_PI_MD2PI_REQUEST_VC_CONFIG_MAX_CREDITS */
-/* Description: Maximum credits from sender */
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_MAX_CREDITS_SHFT 8
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_MAX_CREDITS_MASK 0x0000000000003f00
-
-/* SH_PI_MD2PI_REQUEST_VC_CONFIG_FORCE_CREDIT */
-/* Description: Send an extra credit to sender */
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_FORCE_CREDIT_SHFT 62
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_FORCE_CREDIT_MASK 0x4000000000000000
-
-/* SH_PI_MD2PI_REQUEST_VC_CONFIG_CAPTURE_CREDIT_STATUS */
-/* Description: Capture credit and status information */
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_CAPTURE_CREDIT_STATUS_SHFT 63
-#define SH_PI_MD2PI_REQUEST_VC_CONFIG_CAPTURE_CREDIT_STATUS_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_QUEUE_ERROR_INJECTION" */
-/* PI Queue Error Injection */
-/* ==================================================================== */
-
-#define SH_PI_QUEUE_ERROR_INJECTION 0x0000000120050e00
-#define SH_PI_QUEUE_ERROR_INJECTION_MASK 0x00000000000000ff
-#define SH_PI_QUEUE_ERROR_INJECTION_INIT 0x0000000000000000
-
-/* SH_PI_QUEUE_ERROR_INJECTION_DAT_DFR_Q */
-#define SH_PI_QUEUE_ERROR_INJECTION_DAT_DFR_Q_SHFT 0
-#define SH_PI_QUEUE_ERROR_INJECTION_DAT_DFR_Q_MASK 0x0000000000000001
-
-/* SH_PI_QUEUE_ERROR_INJECTION_DXB_WTL_CMND_Q */
-#define SH_PI_QUEUE_ERROR_INJECTION_DXB_WTL_CMND_Q_SHFT 1
-#define SH_PI_QUEUE_ERROR_INJECTION_DXB_WTL_CMND_Q_MASK 0x0000000000000002
-
-/* SH_PI_QUEUE_ERROR_INJECTION_FSB_WTL_CMND_Q */
-#define SH_PI_QUEUE_ERROR_INJECTION_FSB_WTL_CMND_Q_SHFT 2
-#define SH_PI_QUEUE_ERROR_INJECTION_FSB_WTL_CMND_Q_MASK 0x0000000000000004
-
-/* SH_PI_QUEUE_ERROR_INJECTION_MDPI_RPY_BFR */
-#define SH_PI_QUEUE_ERROR_INJECTION_MDPI_RPY_BFR_SHFT 3
-#define SH_PI_QUEUE_ERROR_INJECTION_MDPI_RPY_BFR_MASK 0x0000000000000008
-
-/* SH_PI_QUEUE_ERROR_INJECTION_PTC_INTR */
-#define SH_PI_QUEUE_ERROR_INJECTION_PTC_INTR_SHFT 4
-#define SH_PI_QUEUE_ERROR_INJECTION_PTC_INTR_MASK 0x0000000000000010
-
-/* SH_PI_QUEUE_ERROR_INJECTION_RXL_KILL_Q */
-#define SH_PI_QUEUE_ERROR_INJECTION_RXL_KILL_Q_SHFT 5
-#define SH_PI_QUEUE_ERROR_INJECTION_RXL_KILL_Q_MASK 0x0000000000000020
-
-/* SH_PI_QUEUE_ERROR_INJECTION_RXL_RDY_Q */
-#define SH_PI_QUEUE_ERROR_INJECTION_RXL_RDY_Q_SHFT 6
-#define SH_PI_QUEUE_ERROR_INJECTION_RXL_RDY_Q_MASK 0x0000000000000040
-
-/* SH_PI_QUEUE_ERROR_INJECTION_XNPI_RPY_BFR */
-#define SH_PI_QUEUE_ERROR_INJECTION_XNPI_RPY_BFR_SHFT 7
-#define SH_PI_QUEUE_ERROR_INJECTION_XNPI_RPY_BFR_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_PI_TEST_POINT_COMPARE" */
-/* PI Test Point Compare */
-/* ==================================================================== */
-
-#define SH_PI_TEST_POINT_COMPARE 0x0000000120050e80
-#define SH_PI_TEST_POINT_COMPARE_MASK 0xffffffffffffffff
-#define SH_PI_TEST_POINT_COMPARE_INIT 0xffffffff00000000
-
-/* SH_PI_TEST_POINT_COMPARE_COMPARE_MASK */
-/* Description: Mask to select test point data for trigger generati */
-#define SH_PI_TEST_POINT_COMPARE_COMPARE_MASK_SHFT 0
-#define SH_PI_TEST_POINT_COMPARE_COMPARE_MASK_MASK 0x00000000ffffffff
-
-/* SH_PI_TEST_POINT_COMPARE_COMPARE_PATTERN */
-/* Description: Pattern of test point data to cause trigger */
-#define SH_PI_TEST_POINT_COMPARE_COMPARE_PATTERN_SHFT 32
-#define SH_PI_TEST_POINT_COMPARE_COMPARE_PATTERN_MASK 0xffffffff00000000
-
-/* ==================================================================== */
-/* Register "SH_PI_TEST_POINT_SELECT" */
-/* PI Test Point Select */
-/* ==================================================================== */
-
-#define SH_PI_TEST_POINT_SELECT 0x0000000120050f00
-#define SH_PI_TEST_POINT_SELECT_MASK 0xf777777777777777
-#define SH_PI_TEST_POINT_SELECT_INIT 0x0000000000000000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL */
-/* Description: Nibble 0 data is from Chiplet X */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL_SHFT 0
-#define SH_PI_TEST_POINT_SELECT_NIBBLE0_CHIPLET_SEL_MASK 0x0000000000000007
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble X is routed to Nibble 0 */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_PI_TEST_POINT_SELECT_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL */
-/* Description: Nibble 1 data is from Chiplet X */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL_SHFT 8
-#define SH_PI_TEST_POINT_SELECT_NIBBLE1_CHIPLET_SEL_MASK 0x0000000000000700
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble X is routed to Nibble 1 */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_PI_TEST_POINT_SELECT_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL */
-/* Description: Nibble 2 data is from Chiplet X */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL_SHFT 16
-#define SH_PI_TEST_POINT_SELECT_NIBBLE2_CHIPLET_SEL_MASK 0x0000000000070000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble X is routed to Nibble 2 */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_PI_TEST_POINT_SELECT_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL */
-/* Description: Nibble 3 data is from Chiplet X */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL_SHFT 24
-#define SH_PI_TEST_POINT_SELECT_NIBBLE3_CHIPLET_SEL_MASK 0x0000000007000000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble X is routed to Nibble 3 */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_PI_TEST_POINT_SELECT_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL */
-/* Description: Nibble 4 data is from Chiplet X */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL_SHFT 32
-#define SH_PI_TEST_POINT_SELECT_NIBBLE4_CHIPLET_SEL_MASK 0x0000000700000000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble X is routed to Nibble 4 */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_PI_TEST_POINT_SELECT_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL */
-/* Description: Nibble 5 data is from Chiplet X */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL_SHFT 40
-#define SH_PI_TEST_POINT_SELECT_NIBBLE5_CHIPLET_SEL_MASK 0x0000070000000000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble X is routed to Nibble 5 */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_PI_TEST_POINT_SELECT_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL */
-/* Description: Nibble 6 data is from Chiplet X */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL_SHFT 48
-#define SH_PI_TEST_POINT_SELECT_NIBBLE6_CHIPLET_SEL_MASK 0x0007000000000000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble X is routed to Nibble 6 */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_PI_TEST_POINT_SELECT_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL */
-/* Description: Nibble 7 data is from Chiplet X */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL_SHFT 56
-#define SH_PI_TEST_POINT_SELECT_NIBBLE7_CHIPLET_SEL_MASK 0x0700000000000000
-
-/* SH_PI_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble X is routed to Nibble 7 */
-#define SH_PI_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_PI_TEST_POINT_SELECT_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* SH_PI_TEST_POINT_SELECT_TRIGGER_ENABLE */
-/* Description: Enable trigger on bit 32 of Analyzer data */
-#define SH_PI_TEST_POINT_SELECT_TRIGGER_ENABLE_SHFT 63
-#define SH_PI_TEST_POINT_SELECT_TRIGGER_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_TEST_POINT_TRIGGER_SELECT" */
-/* PI Test Point Trigger Select */
-/* ==================================================================== */
-
-#define SH_PI_TEST_POINT_TRIGGER_SELECT 0x0000000120050f80
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_MASK 0x7777777777777777
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_INIT 0x0000000000000000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL */
-/* Description: Nibble 0 Chiplet select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL_SHFT 0
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_CHIPLET_SEL_MASK 0x0000000000000007
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL_SHFT 4
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL */
-/* Description: Nibble 1 Chiplet select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL_SHFT 8
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_CHIPLET_SEL_MASK 0x0000000000000700
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL_SHFT 12
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL */
-/* Description: Nibble 2 Chiplet select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL_SHFT 16
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_CHIPLET_SEL_MASK 0x0000000000070000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL_SHFT 20
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL */
-/* Description: Nibble 3 Chiplet select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL_SHFT 24
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_CHIPLET_SEL_MASK 0x0000000007000000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL_SHFT 28
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL */
-/* Description: Nibble 4 Chiplet select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL_SHFT 32
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_CHIPLET_SEL_MASK 0x0000000700000000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL_SHFT 36
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL */
-/* Description: Nibble 5 Chiplet select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL_SHFT 40
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_CHIPLET_SEL_MASK 0x0000070000000000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL_SHFT 44
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL */
-/* Description: Nibble 6 Chiplet select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL_SHFT 48
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_CHIPLET_SEL_MASK 0x0007000000000000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL_SHFT 52
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL */
-/* Description: Nibble 7 Chiplet select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL_SHFT 56
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_CHIPLET_SEL_MASK 0x0700000000000000
-
-/* SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL_SHFT 60
-#define SH_PI_TEST_POINT_TRIGGER_SELECT_TRIGGER7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_XN2PI_REPLY_VC_CONFIG" */
-/* XN-to-PI Reply Virtual Channel Configuration */
-/* ==================================================================== */
-
-#define SH_PI_XN2PI_REPLY_VC_CONFIG 0x0000000120051000
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_MASK 0xc000000000003fff
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_INIT 0x000000000000068c
-
-/* SH_PI_XN2PI_REPLY_VC_CONFIG_HDR_DEPTH */
-/* Description: Depth of header Buffer */
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_HDR_DEPTH_SHFT 0
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_HDR_DEPTH_MASK 0x000000000000000f
-
-/* SH_PI_XN2PI_REPLY_VC_CONFIG_DATA_DEPTH */
-/* Description: Number of data buffers Available */
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_DATA_DEPTH_SHFT 4
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_DATA_DEPTH_MASK 0x00000000000000f0
-
-/* SH_PI_XN2PI_REPLY_VC_CONFIG_MAX_CREDITS */
-/* Description: Maximum credits from sender */
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_MAX_CREDITS_SHFT 8
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_MAX_CREDITS_MASK 0x0000000000003f00
-
-/* SH_PI_XN2PI_REPLY_VC_CONFIG_FORCE_CREDIT */
-/* Description: Send an extra credit to sender */
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_FORCE_CREDIT_SHFT 62
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_FORCE_CREDIT_MASK 0x4000000000000000
-
-/* SH_PI_XN2PI_REPLY_VC_CONFIG_CAPTURE_CREDIT_STATUS */
-/* Description: Capture credit and status information */
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_CAPTURE_CREDIT_STATUS_SHFT 63
-#define SH_PI_XN2PI_REPLY_VC_CONFIG_CAPTURE_CREDIT_STATUS_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_XN2PI_REQUEST_VC_CONFIG" */
-/* XN-to-PI Request Virtual Channel Configuration */
-/* ==================================================================== */
-
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG 0x0000000120051080
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_MASK 0xc000000000003fff
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_INIT 0x000000000000068c
-
-/* SH_PI_XN2PI_REQUEST_VC_CONFIG_HDR_DEPTH */
-/* Description: Depth of header Buffer */
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_HDR_DEPTH_SHFT 0
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_HDR_DEPTH_MASK 0x000000000000000f
-
-/* SH_PI_XN2PI_REQUEST_VC_CONFIG_DATA_DEPTH */
-/* Description: Number of data buffers Available */
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_DATA_DEPTH_SHFT 4
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_DATA_DEPTH_MASK 0x00000000000000f0
-
-/* SH_PI_XN2PI_REQUEST_VC_CONFIG_MAX_CREDITS */
-/* Description: Maximum credits from sender */
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_MAX_CREDITS_SHFT 8
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_MAX_CREDITS_MASK 0x0000000000003f00
-
-/* SH_PI_XN2PI_REQUEST_VC_CONFIG_FORCE_CREDIT */
-/* Description: Send an extra credit to sender */
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_FORCE_CREDIT_SHFT 62
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_FORCE_CREDIT_MASK 0x4000000000000000
-
-/* SH_PI_XN2PI_REQUEST_VC_CONFIG_CAPTURE_CREDIT_STATUS */
-/* Description: Capture credit and status information */
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_CAPTURE_CREDIT_STATUS_SHFT 63
-#define SH_PI_XN2PI_REQUEST_VC_CONFIG_CAPTURE_CREDIT_STATUS_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_AEC_STATUS" */
-/* PI Adaptive Error Correction Status */
-/* ==================================================================== */
-
-#define SH_PI_AEC_STATUS 0x0000000120060000
-#define SH_PI_AEC_STATUS_MASK 0x0000000000000007
-#define SH_PI_AEC_STATUS_INIT 0x0000000000000000
-
-/* SH_PI_AEC_STATUS_STATE */
-/* Description: AEC State */
-#define SH_PI_AEC_STATUS_STATE_SHFT 0
-#define SH_PI_AEC_STATUS_STATE_MASK 0x0000000000000007
-
-/* ==================================================================== */
-/* Register "SH_PI_AFI_FIRST_ERROR" */
-/* PI AFI First Error */
-/* ==================================================================== */
-
-#define SH_PI_AFI_FIRST_ERROR 0x0000000120060080
-#define SH_PI_AFI_FIRST_ERROR_MASK 0x00000007ffe00180
-#define SH_PI_AFI_FIRST_ERROR_INIT 0x0000000000000000
-
-/* SH_PI_AFI_FIRST_ERROR_FSB_SHUB_UCE */
-/* Description: An un-correctable ECC error was detected */
-#define SH_PI_AFI_FIRST_ERROR_FSB_SHUB_UCE_SHFT 7
-#define SH_PI_AFI_FIRST_ERROR_FSB_SHUB_UCE_MASK 0x0000000000000080
-
-/* SH_PI_AFI_FIRST_ERROR_FSB_SHUB_CE */
-/* Description: A correctable ECC error was detected */
-#define SH_PI_AFI_FIRST_ERROR_FSB_SHUB_CE_SHFT 8
-#define SH_PI_AFI_FIRST_ERROR_FSB_SHUB_CE_MASK 0x0000000000000100
-
-/* SH_PI_AFI_FIRST_ERROR_HUNG_BUS */
-/* Description: FSB is hung */
-#define SH_PI_AFI_FIRST_ERROR_HUNG_BUS_SHFT 21
-#define SH_PI_AFI_FIRST_ERROR_HUNG_BUS_MASK 0x0000000000200000
-
-/* SH_PI_AFI_FIRST_ERROR_RSP_PARITY */
-/* Description: Parity error detecte during response phase */
-#define SH_PI_AFI_FIRST_ERROR_RSP_PARITY_SHFT 22
-#define SH_PI_AFI_FIRST_ERROR_RSP_PARITY_MASK 0x0000000000400000
-
-/* SH_PI_AFI_FIRST_ERROR_IOQ_OVERRUN */
-/* Description: Over run error detected on IOQ */
-#define SH_PI_AFI_FIRST_ERROR_IOQ_OVERRUN_SHFT 23
-#define SH_PI_AFI_FIRST_ERROR_IOQ_OVERRUN_MASK 0x0000000000800000
-
-/* SH_PI_AFI_FIRST_ERROR_REQ_FORMAT */
-/* Description: FSB request format not supported */
-#define SH_PI_AFI_FIRST_ERROR_REQ_FORMAT_SHFT 24
-#define SH_PI_AFI_FIRST_ERROR_REQ_FORMAT_MASK 0x0000000001000000
-
-/* SH_PI_AFI_FIRST_ERROR_ADDR_ACCESS */
-/* Description: Access to Address is not supported */
-#define SH_PI_AFI_FIRST_ERROR_ADDR_ACCESS_SHFT 25
-#define SH_PI_AFI_FIRST_ERROR_ADDR_ACCESS_MASK 0x0000000002000000
-
-/* SH_PI_AFI_FIRST_ERROR_REQ_PARITY */
-/* Description: Parity error detected during request phase */
-#define SH_PI_AFI_FIRST_ERROR_REQ_PARITY_SHFT 26
-#define SH_PI_AFI_FIRST_ERROR_REQ_PARITY_MASK 0x0000000004000000
-
-/* SH_PI_AFI_FIRST_ERROR_ADDR_PARITY */
-/* Description: Parity error detected on address */
-#define SH_PI_AFI_FIRST_ERROR_ADDR_PARITY_SHFT 27
-#define SH_PI_AFI_FIRST_ERROR_ADDR_PARITY_MASK 0x0000000008000000
-
-/* SH_PI_AFI_FIRST_ERROR_SHUB_FSB_DQE */
-/* Description: SHUB_FSB_DQE */
-#define SH_PI_AFI_FIRST_ERROR_SHUB_FSB_DQE_SHFT 28
-#define SH_PI_AFI_FIRST_ERROR_SHUB_FSB_DQE_MASK 0x0000000010000000
-
-/* SH_PI_AFI_FIRST_ERROR_SHUB_FSB_UCE */
-/* Description: An un-correctable ECC error was detected */
-#define SH_PI_AFI_FIRST_ERROR_SHUB_FSB_UCE_SHFT 29
-#define SH_PI_AFI_FIRST_ERROR_SHUB_FSB_UCE_MASK 0x0000000020000000
-
-/* SH_PI_AFI_FIRST_ERROR_SHUB_FSB_CE */
-/* Description: An correctable ECC error was detected */
-#define SH_PI_AFI_FIRST_ERROR_SHUB_FSB_CE_SHFT 30
-#define SH_PI_AFI_FIRST_ERROR_SHUB_FSB_CE_MASK 0x0000000040000000
-
-/* SH_PI_AFI_FIRST_ERROR_LIVELOCK */
-/* Description: AFI livelock error was detected */
-#define SH_PI_AFI_FIRST_ERROR_LIVELOCK_SHFT 31
-#define SH_PI_AFI_FIRST_ERROR_LIVELOCK_MASK 0x0000000080000000
-
-/* SH_PI_AFI_FIRST_ERROR_BAD_SNOOP */
-/* Description: AFI bad snoop error was detected */
-#define SH_PI_AFI_FIRST_ERROR_BAD_SNOOP_SHFT 32
-#define SH_PI_AFI_FIRST_ERROR_BAD_SNOOP_MASK 0x0000000100000000
-
-/* SH_PI_AFI_FIRST_ERROR_FSB_TBL_MISS */
-/* Description: AFI FSB request table miss error was detected */
-#define SH_PI_AFI_FIRST_ERROR_FSB_TBL_MISS_SHFT 33
-#define SH_PI_AFI_FIRST_ERROR_FSB_TBL_MISS_MASK 0x0000000200000000
-
-/* SH_PI_AFI_FIRST_ERROR_MSG_LEN */
-/* Description: Runt or Obese message received from SIC */
-#define SH_PI_AFI_FIRST_ERROR_MSG_LEN_SHFT 34
-#define SH_PI_AFI_FIRST_ERROR_MSG_LEN_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CAM_ADDRESS_READ_DATA" */
-/* CRB CAM MMR Address Read Data */
-/* ==================================================================== */
-
-#define SH_PI_CAM_ADDRESS_READ_DATA 0x0000000120060100
-#define SH_PI_CAM_ADDRESS_READ_DATA_MASK 0x8000ffffffffffff
-#define SH_PI_CAM_ADDRESS_READ_DATA_INIT 0x0000000000000000
-
-/* SH_PI_CAM_ADDRESS_READ_DATA_CAM_ADDR */
-/* Description: CRB CAM Address Read Data. */
-#define SH_PI_CAM_ADDRESS_READ_DATA_CAM_ADDR_SHFT 0
-#define SH_PI_CAM_ADDRESS_READ_DATA_CAM_ADDR_MASK 0x0000ffffffffffff
-
-/* SH_PI_CAM_ADDRESS_READ_DATA_CAM_ADDR_VAL */
-/* Description: CRB CAM Address Read Data Valid. */
-#define SH_PI_CAM_ADDRESS_READ_DATA_CAM_ADDR_VAL_SHFT 63
-#define SH_PI_CAM_ADDRESS_READ_DATA_CAM_ADDR_VAL_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CAM_LPRA_READ_DATA" */
-/* CRB CAM MMR LPRA Read Data */
-/* ==================================================================== */
-
-#define SH_PI_CAM_LPRA_READ_DATA 0x0000000120060180
-#define SH_PI_CAM_LPRA_READ_DATA_MASK 0xffffffffffffffff
-#define SH_PI_CAM_LPRA_READ_DATA_INIT 0x0000000000000000
-
-/* SH_PI_CAM_LPRA_READ_DATA_CAM_LPRA */
-/* Description: CRB CAM LPRA read data. */
-#define SH_PI_CAM_LPRA_READ_DATA_CAM_LPRA_SHFT 0
-#define SH_PI_CAM_LPRA_READ_DATA_CAM_LPRA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_PI_CAM_STATE_READ_DATA" */
-/* CRB CAM MMR State Read Data */
-/* ==================================================================== */
-
-#define SH_PI_CAM_STATE_READ_DATA 0x0000000120060200
-#define SH_PI_CAM_STATE_READ_DATA_MASK 0x8003ffff0000003f
-#define SH_PI_CAM_STATE_READ_DATA_INIT 0x0000000000000000
-
-/* SH_PI_CAM_STATE_READ_DATA_CAM_STATE */
-/* Description: CRB CAM State read data. */
-#define SH_PI_CAM_STATE_READ_DATA_CAM_STATE_SHFT 0
-#define SH_PI_CAM_STATE_READ_DATA_CAM_STATE_MASK 0x000000000000000f
-
-/* SH_PI_CAM_STATE_READ_DATA_CAM_TO */
-/* Description: CRB CAM Time-out Status. */
-#define SH_PI_CAM_STATE_READ_DATA_CAM_TO_SHFT 4
-#define SH_PI_CAM_STATE_READ_DATA_CAM_TO_MASK 0x0000000000000010
-
-/* SH_PI_CAM_STATE_READ_DATA_CAM_STATE_RD_PEND */
-/* Description: CRB CAM State Read Pending. */
-#define SH_PI_CAM_STATE_READ_DATA_CAM_STATE_RD_PEND_SHFT 5
-#define SH_PI_CAM_STATE_READ_DATA_CAM_STATE_RD_PEND_MASK 0x0000000000000020
-
-/* SH_PI_CAM_STATE_READ_DATA_CAM_LPRA */
-/* Description: CRB LPRA Overflow Data. */
-#define SH_PI_CAM_STATE_READ_DATA_CAM_LPRA_SHFT 32
-#define SH_PI_CAM_STATE_READ_DATA_CAM_LPRA_MASK 0x0003ffff00000000
-
-/* SH_PI_CAM_STATE_READ_DATA_CAM_RD_DATA_VAL */
-/* Description: CRB CAM MMR read data is valid. */
-#define SH_PI_CAM_STATE_READ_DATA_CAM_RD_DATA_VAL_SHFT 63
-#define SH_PI_CAM_STATE_READ_DATA_CAM_RD_DATA_VAL_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CORRECTED_DETAIL_1" */
-/* PI Corrected Error Detail */
-/* ==================================================================== */
-
-#define SH_PI_CORRECTED_DETAIL_1 0x0000000120060280
-#define SH_PI_CORRECTED_DETAIL_1_MASK 0xffffffffffffffff
-#define SH_PI_CORRECTED_DETAIL_1_INIT 0x0000000000000000
-
-/* SH_PI_CORRECTED_DETAIL_1_ADDRESS */
-/* Description: Address of Message that logged Correctable Error */
-#define SH_PI_CORRECTED_DETAIL_1_ADDRESS_SHFT 0
-#define SH_PI_CORRECTED_DETAIL_1_ADDRESS_MASK 0x0000ffffffffffff
-
-/* SH_PI_CORRECTED_DETAIL_1_SYNDROME */
-/* Description: Syndrome for double word data with Correctable Erro */
-#define SH_PI_CORRECTED_DETAIL_1_SYNDROME_SHFT 48
-#define SH_PI_CORRECTED_DETAIL_1_SYNDROME_MASK 0x00ff000000000000
-
-/* SH_PI_CORRECTED_DETAIL_1_DEP */
-/* Description: DEP code for Double word in error */
-#define SH_PI_CORRECTED_DETAIL_1_DEP_SHFT 56
-#define SH_PI_CORRECTED_DETAIL_1_DEP_MASK 0xff00000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CORRECTED_DETAIL_2" */
-/* PI Corrected Error Detail 2 */
-/* ==================================================================== */
-
-#define SH_PI_CORRECTED_DETAIL_2 0x0000000120060300
-#define SH_PI_CORRECTED_DETAIL_2_MASK 0xffffffffffffffff
-#define SH_PI_CORRECTED_DETAIL_2_INIT 0x0000000000000000
-
-/* SH_PI_CORRECTED_DETAIL_2_DATA */
-/* Description: Double word data in error */
-#define SH_PI_CORRECTED_DETAIL_2_DATA_SHFT 0
-#define SH_PI_CORRECTED_DETAIL_2_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_PI_CORRECTED_DETAIL_3" */
-/* PI Corrected Error Detail 3 */
-/* ==================================================================== */
-
-#define SH_PI_CORRECTED_DETAIL_3 0x0000000120060380
-#define SH_PI_CORRECTED_DETAIL_3_MASK 0xffffffffffffffff
-#define SH_PI_CORRECTED_DETAIL_3_INIT 0x0000000000000000
-
-/* SH_PI_CORRECTED_DETAIL_3_ADDRESS */
-/* Description: Address of Message that logged Correctable Error */
-#define SH_PI_CORRECTED_DETAIL_3_ADDRESS_SHFT 0
-#define SH_PI_CORRECTED_DETAIL_3_ADDRESS_MASK 0x0000ffffffffffff
-
-/* SH_PI_CORRECTED_DETAIL_3_SYNDROME */
-/* Description: Syndrome for double word data with Correctable Erro */
-#define SH_PI_CORRECTED_DETAIL_3_SYNDROME_SHFT 48
-#define SH_PI_CORRECTED_DETAIL_3_SYNDROME_MASK 0x00ff000000000000
-
-/* SH_PI_CORRECTED_DETAIL_3_DEP */
-/* Description: DEP code for Double word in error */
-#define SH_PI_CORRECTED_DETAIL_3_DEP_SHFT 56
-#define SH_PI_CORRECTED_DETAIL_3_DEP_MASK 0xff00000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_CORRECTED_DETAIL_4" */
-/* PI Corrected Error Detail 4 */
-/* ==================================================================== */
-
-#define SH_PI_CORRECTED_DETAIL_4 0x0000000120060400
-#define SH_PI_CORRECTED_DETAIL_4_MASK 0xffffffffffffffff
-#define SH_PI_CORRECTED_DETAIL_4_INIT 0x0000000000000000
-
-/* SH_PI_CORRECTED_DETAIL_4_DATA */
-/* Description: Double word data in error */
-#define SH_PI_CORRECTED_DETAIL_4_DATA_SHFT 0
-#define SH_PI_CORRECTED_DETAIL_4_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_FIRST_ERROR" */
-/* PI CRBP First Error */
-/* ==================================================================== */
-
-#define SH_PI_CRBP_FIRST_ERROR 0x0000000120060480
-#define SH_PI_CRBP_FIRST_ERROR_MASK 0x00000000001fffff
-#define SH_PI_CRBP_FIRST_ERROR_INIT 0x0000000000000000
-
-/* SH_PI_CRBP_FIRST_ERROR_FSB_PROTO_ERR */
-/* Description: CRB's FSB pipe detected protocol table miss */
-#define SH_PI_CRBP_FIRST_ERROR_FSB_PROTO_ERR_SHFT 0
-#define SH_PI_CRBP_FIRST_ERROR_FSB_PROTO_ERR_MASK 0x0000000000000001
-
-/* SH_PI_CRBP_FIRST_ERROR_GFX_RP_ERR */
-/* Description: CRB's XB pipe received a GFX error reply */
-#define SH_PI_CRBP_FIRST_ERROR_GFX_RP_ERR_SHFT 1
-#define SH_PI_CRBP_FIRST_ERROR_GFX_RP_ERR_MASK 0x0000000000000002
-
-/* SH_PI_CRBP_FIRST_ERROR_XB_PROTO_ERR */
-/* Description: CRB's XB pipe detected protocol table miss */
-#define SH_PI_CRBP_FIRST_ERROR_XB_PROTO_ERR_SHFT 2
-#define SH_PI_CRBP_FIRST_ERROR_XB_PROTO_ERR_MASK 0x0000000000000004
-
-/* SH_PI_CRBP_FIRST_ERROR_MEM_RP_ERR */
-/* Description: CRB's XB pipe received a memory error reply message */
-#define SH_PI_CRBP_FIRST_ERROR_MEM_RP_ERR_SHFT 3
-#define SH_PI_CRBP_FIRST_ERROR_MEM_RP_ERR_MASK 0x0000000000000008
-
-/* SH_PI_CRBP_FIRST_ERROR_PIO_RP_ERR */
-/* Description: CRB's XB pipe received a PIO error reply message */
-#define SH_PI_CRBP_FIRST_ERROR_PIO_RP_ERR_SHFT 4
-#define SH_PI_CRBP_FIRST_ERROR_PIO_RP_ERR_MASK 0x0000000000000010
-
-/* SH_PI_CRBP_FIRST_ERROR_MEM_TO_ERR */
-/* Description: CRB's XB pipe detected a CRB time-out */
-#define SH_PI_CRBP_FIRST_ERROR_MEM_TO_ERR_SHFT 5
-#define SH_PI_CRBP_FIRST_ERROR_MEM_TO_ERR_MASK 0x0000000000000020
-
-/* SH_PI_CRBP_FIRST_ERROR_PIO_TO_ERR */
-/* Description: CRB's XB pipe detected a PIO time-out */
-#define SH_PI_CRBP_FIRST_ERROR_PIO_TO_ERR_SHFT 6
-#define SH_PI_CRBP_FIRST_ERROR_PIO_TO_ERR_MASK 0x0000000000000040
-
-/* SH_PI_CRBP_FIRST_ERROR_FSB_SHUB_UCE */
-/* Description: An un-correctable ECC error was detected */
-#define SH_PI_CRBP_FIRST_ERROR_FSB_SHUB_UCE_SHFT 7
-#define SH_PI_CRBP_FIRST_ERROR_FSB_SHUB_UCE_MASK 0x0000000000000080
-
-/* SH_PI_CRBP_FIRST_ERROR_FSB_SHUB_CE */
-/* Description: A correctable ECC error was detected */
-#define SH_PI_CRBP_FIRST_ERROR_FSB_SHUB_CE_SHFT 8
-#define SH_PI_CRBP_FIRST_ERROR_FSB_SHUB_CE_MASK 0x0000000000000100
-
-/* SH_PI_CRBP_FIRST_ERROR_MSG_COLOR_ERR */
-/* Description: Message color was wrong */
-#define SH_PI_CRBP_FIRST_ERROR_MSG_COLOR_ERR_SHFT 9
-#define SH_PI_CRBP_FIRST_ERROR_MSG_COLOR_ERR_MASK 0x0000000000000200
-
-/* SH_PI_CRBP_FIRST_ERROR_MD_RQ_Q_OFLOW */
-/* Description: MD Request input buffer over flow error */
-#define SH_PI_CRBP_FIRST_ERROR_MD_RQ_Q_OFLOW_SHFT 10
-#define SH_PI_CRBP_FIRST_ERROR_MD_RQ_Q_OFLOW_MASK 0x0000000000000400
-
-/* SH_PI_CRBP_FIRST_ERROR_MD_RP_Q_OFLOW */
-/* Description: MD Reply input buffer over flow error */
-#define SH_PI_CRBP_FIRST_ERROR_MD_RP_Q_OFLOW_SHFT 11
-#define SH_PI_CRBP_FIRST_ERROR_MD_RP_Q_OFLOW_MASK 0x0000000000000800
-
-/* SH_PI_CRBP_FIRST_ERROR_XN_RQ_Q_OFLOW */
-/* Description: XN Request input buffer over flow error */
-#define SH_PI_CRBP_FIRST_ERROR_XN_RQ_Q_OFLOW_SHFT 12
-#define SH_PI_CRBP_FIRST_ERROR_XN_RQ_Q_OFLOW_MASK 0x0000000000001000
-
-/* SH_PI_CRBP_FIRST_ERROR_XN_RP_Q_OFLOW */
-/* Description: XN Reply input buffer over flow error */
-#define SH_PI_CRBP_FIRST_ERROR_XN_RP_Q_OFLOW_SHFT 13
-#define SH_PI_CRBP_FIRST_ERROR_XN_RP_Q_OFLOW_MASK 0x0000000000002000
-
-/* SH_PI_CRBP_FIRST_ERROR_NACK_OFLOW */
-/* Description: NACK over flow error */
-#define SH_PI_CRBP_FIRST_ERROR_NACK_OFLOW_SHFT 14
-#define SH_PI_CRBP_FIRST_ERROR_NACK_OFLOW_MASK 0x0000000000004000
-
-/* SH_PI_CRBP_FIRST_ERROR_GFX_INT_0 */
-/* Description: GFX transfer interrupt for CPU 0 */
-#define SH_PI_CRBP_FIRST_ERROR_GFX_INT_0_SHFT 15
-#define SH_PI_CRBP_FIRST_ERROR_GFX_INT_0_MASK 0x0000000000008000
-
-/* SH_PI_CRBP_FIRST_ERROR_GFX_INT_1 */
-/* Description: GFX transfer interrupt for CPU 1 */
-#define SH_PI_CRBP_FIRST_ERROR_GFX_INT_1_SHFT 16
-#define SH_PI_CRBP_FIRST_ERROR_GFX_INT_1_MASK 0x0000000000010000
-
-/* SH_PI_CRBP_FIRST_ERROR_MD_RQ_CRD_OFLOW */
-/* Description: MD Request Credit Overflow Error */
-#define SH_PI_CRBP_FIRST_ERROR_MD_RQ_CRD_OFLOW_SHFT 17
-#define SH_PI_CRBP_FIRST_ERROR_MD_RQ_CRD_OFLOW_MASK 0x0000000000020000
-
-/* SH_PI_CRBP_FIRST_ERROR_MD_RP_CRD_OFLOW */
-/* Description: MD Reply Credit Overflow Error */
-#define SH_PI_CRBP_FIRST_ERROR_MD_RP_CRD_OFLOW_SHFT 18
-#define SH_PI_CRBP_FIRST_ERROR_MD_RP_CRD_OFLOW_MASK 0x0000000000040000
-
-/* SH_PI_CRBP_FIRST_ERROR_XN_RQ_CRD_OFLOW */
-/* Description: XN Request Credit Overflow Error */
-#define SH_PI_CRBP_FIRST_ERROR_XN_RQ_CRD_OFLOW_SHFT 19
-#define SH_PI_CRBP_FIRST_ERROR_XN_RQ_CRD_OFLOW_MASK 0x0000000000080000
-
-/* SH_PI_CRBP_FIRST_ERROR_XN_RP_CRD_OFLOW */
-/* Description: XN Reply Credit Overflow Error */
-#define SH_PI_CRBP_FIRST_ERROR_XN_RP_CRD_OFLOW_SHFT 20
-#define SH_PI_CRBP_FIRST_ERROR_XN_RP_CRD_OFLOW_MASK 0x0000000000100000
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_DETAIL_1" */
-/* PI Error Detail 1 */
-/* ==================================================================== */
-
-#define SH_PI_ERROR_DETAIL_1 0x0000000120060500
-#define SH_PI_ERROR_DETAIL_1_MASK 0xffffffffffffffff
-#define SH_PI_ERROR_DETAIL_1_INIT 0x0000000000000000
-
-/* SH_PI_ERROR_DETAIL_1_STATUS */
-/* Description: Error Detail 1 */
-#define SH_PI_ERROR_DETAIL_1_STATUS_SHFT 0
-#define SH_PI_ERROR_DETAIL_1_STATUS_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_DETAIL_2" */
-/* PI Error Detail 2 */
-/* ==================================================================== */
-
-#define SH_PI_ERROR_DETAIL_2 0x0000000120060580
-#define SH_PI_ERROR_DETAIL_2_MASK 0xffffffffffffffff
-#define SH_PI_ERROR_DETAIL_2_INIT 0x0000000000000000
-
-/* SH_PI_ERROR_DETAIL_2_STATUS */
-/* Description: Error Status */
-#define SH_PI_ERROR_DETAIL_2_STATUS_SHFT 0
-#define SH_PI_ERROR_DETAIL_2_STATUS_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_OVERFLOW" */
-/* PI Error Overflow */
-/* ==================================================================== */
-
-#define SH_PI_ERROR_OVERFLOW 0x0000000120060600
-#define SH_PI_ERROR_OVERFLOW_MASK 0x00000007ffffffff
-#define SH_PI_ERROR_OVERFLOW_INIT 0x0000000000000000
-
-/* SH_PI_ERROR_OVERFLOW_FSB_PROTO_ERR */
-/* Description: CRB's FSB pipe detected protocol table miss */
-#define SH_PI_ERROR_OVERFLOW_FSB_PROTO_ERR_SHFT 0
-#define SH_PI_ERROR_OVERFLOW_FSB_PROTO_ERR_MASK 0x0000000000000001
-
-/* SH_PI_ERROR_OVERFLOW_GFX_RP_ERR */
-/* Description: CRB's XB pipe received another GFX reply error mess */
-#define SH_PI_ERROR_OVERFLOW_GFX_RP_ERR_SHFT 1
-#define SH_PI_ERROR_OVERFLOW_GFX_RP_ERR_MASK 0x0000000000000002
-
-/* SH_PI_ERROR_OVERFLOW_XB_PROTO_ERR */
-/* Description: CRB's XB pipe detected another protocol table miss */
-#define SH_PI_ERROR_OVERFLOW_XB_PROTO_ERR_SHFT 2
-#define SH_PI_ERROR_OVERFLOW_XB_PROTO_ERR_MASK 0x0000000000000004
-
-/* SH_PI_ERROR_OVERFLOW_MEM_RP_ERR */
-/* Description: CRB's XB pipe received another memory reply error m */
-#define SH_PI_ERROR_OVERFLOW_MEM_RP_ERR_SHFT 3
-#define SH_PI_ERROR_OVERFLOW_MEM_RP_ERR_MASK 0x0000000000000008
-
-/* SH_PI_ERROR_OVERFLOW_PIO_RP_ERR */
-/* Description: CRB's XB pipe received another PIO reply error mess */
-#define SH_PI_ERROR_OVERFLOW_PIO_RP_ERR_SHFT 4
-#define SH_PI_ERROR_OVERFLOW_PIO_RP_ERR_MASK 0x0000000000000010
-
-/* SH_PI_ERROR_OVERFLOW_MEM_TO_ERR */
-/* Description: CRB's XB pipe detected a CRB time-out */
-#define SH_PI_ERROR_OVERFLOW_MEM_TO_ERR_SHFT 5
-#define SH_PI_ERROR_OVERFLOW_MEM_TO_ERR_MASK 0x0000000000000020
-
-/* SH_PI_ERROR_OVERFLOW_PIO_TO_ERR */
-/* Description: CRB's XB pipe detected a PIO time-out */
-#define SH_PI_ERROR_OVERFLOW_PIO_TO_ERR_SHFT 6
-#define SH_PI_ERROR_OVERFLOW_PIO_TO_ERR_MASK 0x0000000000000040
-
-/* SH_PI_ERROR_OVERFLOW_FSB_SHUB_UCE */
-/* Description: An un-correctable ECC error was detected */
-#define SH_PI_ERROR_OVERFLOW_FSB_SHUB_UCE_SHFT 7
-#define SH_PI_ERROR_OVERFLOW_FSB_SHUB_UCE_MASK 0x0000000000000080
-
-/* SH_PI_ERROR_OVERFLOW_FSB_SHUB_CE */
-/* Description: An correctable ECC error was detected */
-#define SH_PI_ERROR_OVERFLOW_FSB_SHUB_CE_SHFT 8
-#define SH_PI_ERROR_OVERFLOW_FSB_SHUB_CE_MASK 0x0000000000000100
-
-/* SH_PI_ERROR_OVERFLOW_MSG_COLOR_ERR */
-/* Description: Message color was not correct */
-#define SH_PI_ERROR_OVERFLOW_MSG_COLOR_ERR_SHFT 9
-#define SH_PI_ERROR_OVERFLOW_MSG_COLOR_ERR_MASK 0x0000000000000200
-
-/* SH_PI_ERROR_OVERFLOW_MD_RQ_Q_OFLOW */
-/* Description: MD Request input buffer over flow error */
-#define SH_PI_ERROR_OVERFLOW_MD_RQ_Q_OFLOW_SHFT 10
-#define SH_PI_ERROR_OVERFLOW_MD_RQ_Q_OFLOW_MASK 0x0000000000000400
-
-/* SH_PI_ERROR_OVERFLOW_MD_RP_Q_OFLOW */
-/* Description: MD Reply input buffer over flow error */
-#define SH_PI_ERROR_OVERFLOW_MD_RP_Q_OFLOW_SHFT 11
-#define SH_PI_ERROR_OVERFLOW_MD_RP_Q_OFLOW_MASK 0x0000000000000800
-
-/* SH_PI_ERROR_OVERFLOW_XN_RQ_Q_OFLOW */
-/* Description: XN Request input buffer over flow error */
-#define SH_PI_ERROR_OVERFLOW_XN_RQ_Q_OFLOW_SHFT 12
-#define SH_PI_ERROR_OVERFLOW_XN_RQ_Q_OFLOW_MASK 0x0000000000001000
-
-/* SH_PI_ERROR_OVERFLOW_XN_RP_Q_OFLOW */
-/* Description: XN Reply input buffer over flow error */
-#define SH_PI_ERROR_OVERFLOW_XN_RP_Q_OFLOW_SHFT 13
-#define SH_PI_ERROR_OVERFLOW_XN_RP_Q_OFLOW_MASK 0x0000000000002000
-
-/* SH_PI_ERROR_OVERFLOW_NACK_OFLOW */
-/* Description: NACK over flow error */
-#define SH_PI_ERROR_OVERFLOW_NACK_OFLOW_SHFT 14
-#define SH_PI_ERROR_OVERFLOW_NACK_OFLOW_MASK 0x0000000000004000
-
-/* SH_PI_ERROR_OVERFLOW_GFX_INT_0 */
-/* Description: GFX transfer interrupt for CPU 0 */
-#define SH_PI_ERROR_OVERFLOW_GFX_INT_0_SHFT 15
-#define SH_PI_ERROR_OVERFLOW_GFX_INT_0_MASK 0x0000000000008000
-
-/* SH_PI_ERROR_OVERFLOW_GFX_INT_1 */
-/* Description: GFX transfer interrupt for CPU 1 */
-#define SH_PI_ERROR_OVERFLOW_GFX_INT_1_SHFT 16
-#define SH_PI_ERROR_OVERFLOW_GFX_INT_1_MASK 0x0000000000010000
-
-/* SH_PI_ERROR_OVERFLOW_MD_RQ_CRD_OFLOW */
-/* Description: MD Request Credit Overflow Error */
-#define SH_PI_ERROR_OVERFLOW_MD_RQ_CRD_OFLOW_SHFT 17
-#define SH_PI_ERROR_OVERFLOW_MD_RQ_CRD_OFLOW_MASK 0x0000000000020000
-
-/* SH_PI_ERROR_OVERFLOW_MD_RP_CRD_OFLOW */
-/* Description: MD Reply Credit Overflow Error */
-#define SH_PI_ERROR_OVERFLOW_MD_RP_CRD_OFLOW_SHFT 18
-#define SH_PI_ERROR_OVERFLOW_MD_RP_CRD_OFLOW_MASK 0x0000000000040000
-
-/* SH_PI_ERROR_OVERFLOW_XN_RQ_CRD_OFLOW */
-/* Description: XN Request Credit Overflow Error */
-#define SH_PI_ERROR_OVERFLOW_XN_RQ_CRD_OFLOW_SHFT 19
-#define SH_PI_ERROR_OVERFLOW_XN_RQ_CRD_OFLOW_MASK 0x0000000000080000
-
-/* SH_PI_ERROR_OVERFLOW_XN_RP_CRD_OFLOW */
-/* Description: XN Reply Credit Overflow Error */
-#define SH_PI_ERROR_OVERFLOW_XN_RP_CRD_OFLOW_SHFT 20
-#define SH_PI_ERROR_OVERFLOW_XN_RP_CRD_OFLOW_MASK 0x0000000000100000
-
-/* SH_PI_ERROR_OVERFLOW_HUNG_BUS */
-/* Description: FSB is hung */
-#define SH_PI_ERROR_OVERFLOW_HUNG_BUS_SHFT 21
-#define SH_PI_ERROR_OVERFLOW_HUNG_BUS_MASK 0x0000000000200000
-
-/* SH_PI_ERROR_OVERFLOW_RSP_PARITY */
-/* Description: Parity error detecte during response phase */
-#define SH_PI_ERROR_OVERFLOW_RSP_PARITY_SHFT 22
-#define SH_PI_ERROR_OVERFLOW_RSP_PARITY_MASK 0x0000000000400000
-
-/* SH_PI_ERROR_OVERFLOW_IOQ_OVERRUN */
-/* Description: Over run error detected on IOQ */
-#define SH_PI_ERROR_OVERFLOW_IOQ_OVERRUN_SHFT 23
-#define SH_PI_ERROR_OVERFLOW_IOQ_OVERRUN_MASK 0x0000000000800000
-
-/* SH_PI_ERROR_OVERFLOW_REQ_FORMAT */
-/* Description: FSB request format not supported */
-#define SH_PI_ERROR_OVERFLOW_REQ_FORMAT_SHFT 24
-#define SH_PI_ERROR_OVERFLOW_REQ_FORMAT_MASK 0x0000000001000000
-
-/* SH_PI_ERROR_OVERFLOW_ADDR_ACCESS */
-/* Description: Access to Address is not supported */
-#define SH_PI_ERROR_OVERFLOW_ADDR_ACCESS_SHFT 25
-#define SH_PI_ERROR_OVERFLOW_ADDR_ACCESS_MASK 0x0000000002000000
-
-/* SH_PI_ERROR_OVERFLOW_REQ_PARITY */
-/* Description: Parity error detected during request phase */
-#define SH_PI_ERROR_OVERFLOW_REQ_PARITY_SHFT 26
-#define SH_PI_ERROR_OVERFLOW_REQ_PARITY_MASK 0x0000000004000000
-
-/* SH_PI_ERROR_OVERFLOW_ADDR_PARITY */
-/* Description: Parity error detected on address */
-#define SH_PI_ERROR_OVERFLOW_ADDR_PARITY_SHFT 27
-#define SH_PI_ERROR_OVERFLOW_ADDR_PARITY_MASK 0x0000000008000000
-
-/* SH_PI_ERROR_OVERFLOW_SHUB_FSB_DQE */
-/* Description: SHUB_FSB_DQE */
-#define SH_PI_ERROR_OVERFLOW_SHUB_FSB_DQE_SHFT 28
-#define SH_PI_ERROR_OVERFLOW_SHUB_FSB_DQE_MASK 0x0000000010000000
-
-/* SH_PI_ERROR_OVERFLOW_SHUB_FSB_UCE */
-/* Description: An un-correctable ECC error was detected */
-#define SH_PI_ERROR_OVERFLOW_SHUB_FSB_UCE_SHFT 29
-#define SH_PI_ERROR_OVERFLOW_SHUB_FSB_UCE_MASK 0x0000000020000000
-
-/* SH_PI_ERROR_OVERFLOW_SHUB_FSB_CE */
-/* Description: An correctable ECC error was detected */
-#define SH_PI_ERROR_OVERFLOW_SHUB_FSB_CE_SHFT 30
-#define SH_PI_ERROR_OVERFLOW_SHUB_FSB_CE_MASK 0x0000000040000000
-
-/* SH_PI_ERROR_OVERFLOW_LIVELOCK */
-/* Description: AFI livelock error was detected */
-#define SH_PI_ERROR_OVERFLOW_LIVELOCK_SHFT 31
-#define SH_PI_ERROR_OVERFLOW_LIVELOCK_MASK 0x0000000080000000
-
-/* SH_PI_ERROR_OVERFLOW_BAD_SNOOP */
-/* Description: AFI bad snoop error was detected */
-#define SH_PI_ERROR_OVERFLOW_BAD_SNOOP_SHFT 32
-#define SH_PI_ERROR_OVERFLOW_BAD_SNOOP_MASK 0x0000000100000000
-
-/* SH_PI_ERROR_OVERFLOW_FSB_TBL_MISS */
-/* Description: AFI FSB request table miss error was detected */
-#define SH_PI_ERROR_OVERFLOW_FSB_TBL_MISS_SHFT 33
-#define SH_PI_ERROR_OVERFLOW_FSB_TBL_MISS_MASK 0x0000000200000000
-
-/* SH_PI_ERROR_OVERFLOW_MSG_LENGTH */
-/* Description: Message length error on received message from SIC */
-#define SH_PI_ERROR_OVERFLOW_MSG_LENGTH_SHFT 34
-#define SH_PI_ERROR_OVERFLOW_MSG_LENGTH_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_OVERFLOW_ALIAS" */
-/* PI Error Overflow Alias */
-/* ==================================================================== */
-
-#define SH_PI_ERROR_OVERFLOW_ALIAS 0x0000000120060608
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_SUMMARY" */
-/* PI Error Summary */
-/* ==================================================================== */
-
-#define SH_PI_ERROR_SUMMARY 0x0000000120060680
-#define SH_PI_ERROR_SUMMARY_MASK 0x00000007ffffffff
-#define SH_PI_ERROR_SUMMARY_INIT 0x0000000000000000
-
-/* SH_PI_ERROR_SUMMARY_FSB_PROTO_ERR */
-/* Description: CRB's FSB pipe detected protocol table miss */
-#define SH_PI_ERROR_SUMMARY_FSB_PROTO_ERR_SHFT 0
-#define SH_PI_ERROR_SUMMARY_FSB_PROTO_ERR_MASK 0x0000000000000001
-
-/* SH_PI_ERROR_SUMMARY_GFX_RP_ERR */
-/* Description: Graphic reply error message received */
-#define SH_PI_ERROR_SUMMARY_GFX_RP_ERR_SHFT 1
-#define SH_PI_ERROR_SUMMARY_GFX_RP_ERR_MASK 0x0000000000000002
-
-/* SH_PI_ERROR_SUMMARY_XB_PROTO_ERR */
-/* Description: CRB's XB pipe detected protocol table miss */
-#define SH_PI_ERROR_SUMMARY_XB_PROTO_ERR_SHFT 2
-#define SH_PI_ERROR_SUMMARY_XB_PROTO_ERR_MASK 0x0000000000000004
-
-/* SH_PI_ERROR_SUMMARY_MEM_RP_ERR */
-/* Description: Memory reply error message received */
-#define SH_PI_ERROR_SUMMARY_MEM_RP_ERR_SHFT 3
-#define SH_PI_ERROR_SUMMARY_MEM_RP_ERR_MASK 0x0000000000000008
-
-/* SH_PI_ERROR_SUMMARY_PIO_RP_ERR */
-/* Description: PIO error reply message received */
-#define SH_PI_ERROR_SUMMARY_PIO_RP_ERR_SHFT 4
-#define SH_PI_ERROR_SUMMARY_PIO_RP_ERR_MASK 0x0000000000000010
-
-/* SH_PI_ERROR_SUMMARY_MEM_TO_ERR */
-/* Description: CRB's XB pipe detected a CRB time-out */
-#define SH_PI_ERROR_SUMMARY_MEM_TO_ERR_SHFT 5
-#define SH_PI_ERROR_SUMMARY_MEM_TO_ERR_MASK 0x0000000000000020
-
-/* SH_PI_ERROR_SUMMARY_PIO_TO_ERR */
-/* Description: CRB's XB pipe detected a PIO time-out */
-#define SH_PI_ERROR_SUMMARY_PIO_TO_ERR_SHFT 6
-#define SH_PI_ERROR_SUMMARY_PIO_TO_ERR_MASK 0x0000000000000040
-
-/* SH_PI_ERROR_SUMMARY_FSB_SHUB_UCE */
-/* Description: An un-correctable ECC error was detected */
-#define SH_PI_ERROR_SUMMARY_FSB_SHUB_UCE_SHFT 7
-#define SH_PI_ERROR_SUMMARY_FSB_SHUB_UCE_MASK 0x0000000000000080
-
-/* SH_PI_ERROR_SUMMARY_FSB_SHUB_CE */
-/* Description: An correctable ECC error was detected */
-#define SH_PI_ERROR_SUMMARY_FSB_SHUB_CE_SHFT 8
-#define SH_PI_ERROR_SUMMARY_FSB_SHUB_CE_MASK 0x0000000000000100
-
-/* SH_PI_ERROR_SUMMARY_MSG_COLOR_ERR */
-/* Description: Message color was wrong */
-#define SH_PI_ERROR_SUMMARY_MSG_COLOR_ERR_SHFT 9
-#define SH_PI_ERROR_SUMMARY_MSG_COLOR_ERR_MASK 0x0000000000000200
-
-/* SH_PI_ERROR_SUMMARY_MD_RQ_Q_OFLOW */
-/* Description: MD Request input buffer over flow error */
-#define SH_PI_ERROR_SUMMARY_MD_RQ_Q_OFLOW_SHFT 10
-#define SH_PI_ERROR_SUMMARY_MD_RQ_Q_OFLOW_MASK 0x0000000000000400
-
-/* SH_PI_ERROR_SUMMARY_MD_RP_Q_OFLOW */
-/* Description: MD Reply input buffer over flow error */
-#define SH_PI_ERROR_SUMMARY_MD_RP_Q_OFLOW_SHFT 11
-#define SH_PI_ERROR_SUMMARY_MD_RP_Q_OFLOW_MASK 0x0000000000000800
-
-/* SH_PI_ERROR_SUMMARY_XN_RQ_Q_OFLOW */
-/* Description: XN Request input buffer over flow error */
-#define SH_PI_ERROR_SUMMARY_XN_RQ_Q_OFLOW_SHFT 12
-#define SH_PI_ERROR_SUMMARY_XN_RQ_Q_OFLOW_MASK 0x0000000000001000
-
-/* SH_PI_ERROR_SUMMARY_XN_RP_Q_OFLOW */
-/* Description: XN Reply input buffer over flow error */
-#define SH_PI_ERROR_SUMMARY_XN_RP_Q_OFLOW_SHFT 13
-#define SH_PI_ERROR_SUMMARY_XN_RP_Q_OFLOW_MASK 0x0000000000002000
-
-/* SH_PI_ERROR_SUMMARY_NACK_OFLOW */
-/* Description: NACK over flow error */
-#define SH_PI_ERROR_SUMMARY_NACK_OFLOW_SHFT 14
-#define SH_PI_ERROR_SUMMARY_NACK_OFLOW_MASK 0x0000000000004000
-
-/* SH_PI_ERROR_SUMMARY_GFX_INT_0 */
-/* Description: GFX transfer interrupt for CPU 0 */
-#define SH_PI_ERROR_SUMMARY_GFX_INT_0_SHFT 15
-#define SH_PI_ERROR_SUMMARY_GFX_INT_0_MASK 0x0000000000008000
-
-/* SH_PI_ERROR_SUMMARY_GFX_INT_1 */
-/* Description: GFX transfer interrupt for CPU 1 */
-#define SH_PI_ERROR_SUMMARY_GFX_INT_1_SHFT 16
-#define SH_PI_ERROR_SUMMARY_GFX_INT_1_MASK 0x0000000000010000
-
-/* SH_PI_ERROR_SUMMARY_MD_RQ_CRD_OFLOW */
-/* Description: MD Request Credit Overflow Error */
-#define SH_PI_ERROR_SUMMARY_MD_RQ_CRD_OFLOW_SHFT 17
-#define SH_PI_ERROR_SUMMARY_MD_RQ_CRD_OFLOW_MASK 0x0000000000020000
-
-/* SH_PI_ERROR_SUMMARY_MD_RP_CRD_OFLOW */
-/* Description: MD Reply Credit Overflow Error */
-#define SH_PI_ERROR_SUMMARY_MD_RP_CRD_OFLOW_SHFT 18
-#define SH_PI_ERROR_SUMMARY_MD_RP_CRD_OFLOW_MASK 0x0000000000040000
-
-/* SH_PI_ERROR_SUMMARY_XN_RQ_CRD_OFLOW */
-/* Description: XN Request Credit Overflow Error */
-#define SH_PI_ERROR_SUMMARY_XN_RQ_CRD_OFLOW_SHFT 19
-#define SH_PI_ERROR_SUMMARY_XN_RQ_CRD_OFLOW_MASK 0x0000000000080000
-
-/* SH_PI_ERROR_SUMMARY_XN_RP_CRD_OFLOW */
-/* Description: XN Reply Credit Overflow Error */
-#define SH_PI_ERROR_SUMMARY_XN_RP_CRD_OFLOW_SHFT 20
-#define SH_PI_ERROR_SUMMARY_XN_RP_CRD_OFLOW_MASK 0x0000000000100000
-
-/* SH_PI_ERROR_SUMMARY_HUNG_BUS */
-/* Description: FSB is hung */
-#define SH_PI_ERROR_SUMMARY_HUNG_BUS_SHFT 21
-#define SH_PI_ERROR_SUMMARY_HUNG_BUS_MASK 0x0000000000200000
-
-/* SH_PI_ERROR_SUMMARY_RSP_PARITY */
-/* Description: Parity error detecte during response phase */
-#define SH_PI_ERROR_SUMMARY_RSP_PARITY_SHFT 22
-#define SH_PI_ERROR_SUMMARY_RSP_PARITY_MASK 0x0000000000400000
-
-/* SH_PI_ERROR_SUMMARY_IOQ_OVERRUN */
-/* Description: Over run error detected on IOQ */
-#define SH_PI_ERROR_SUMMARY_IOQ_OVERRUN_SHFT 23
-#define SH_PI_ERROR_SUMMARY_IOQ_OVERRUN_MASK 0x0000000000800000
-
-/* SH_PI_ERROR_SUMMARY_REQ_FORMAT */
-/* Description: FSB request format not supported */
-#define SH_PI_ERROR_SUMMARY_REQ_FORMAT_SHFT 24
-#define SH_PI_ERROR_SUMMARY_REQ_FORMAT_MASK 0x0000000001000000
-
-/* SH_PI_ERROR_SUMMARY_ADDR_ACCESS */
-/* Description: Access to Address is not supported */
-#define SH_PI_ERROR_SUMMARY_ADDR_ACCESS_SHFT 25
-#define SH_PI_ERROR_SUMMARY_ADDR_ACCESS_MASK 0x0000000002000000
-
-/* SH_PI_ERROR_SUMMARY_REQ_PARITY */
-/* Description: Parity error detected during request phase */
-#define SH_PI_ERROR_SUMMARY_REQ_PARITY_SHFT 26
-#define SH_PI_ERROR_SUMMARY_REQ_PARITY_MASK 0x0000000004000000
-
-/* SH_PI_ERROR_SUMMARY_ADDR_PARITY */
-/* Description: Parity error detected on address */
-#define SH_PI_ERROR_SUMMARY_ADDR_PARITY_SHFT 27
-#define SH_PI_ERROR_SUMMARY_ADDR_PARITY_MASK 0x0000000008000000
-
-/* SH_PI_ERROR_SUMMARY_SHUB_FSB_DQE */
-/* Description: SHUB_FSB_DQE error */
-#define SH_PI_ERROR_SUMMARY_SHUB_FSB_DQE_SHFT 28
-#define SH_PI_ERROR_SUMMARY_SHUB_FSB_DQE_MASK 0x0000000010000000
-
-/* SH_PI_ERROR_SUMMARY_SHUB_FSB_UCE */
-/* Description: An un-correctable ECC error was detected */
-#define SH_PI_ERROR_SUMMARY_SHUB_FSB_UCE_SHFT 29
-#define SH_PI_ERROR_SUMMARY_SHUB_FSB_UCE_MASK 0x0000000020000000
-
-/* SH_PI_ERROR_SUMMARY_SHUB_FSB_CE */
-/* Description: An correctable ECC error was detected */
-#define SH_PI_ERROR_SUMMARY_SHUB_FSB_CE_SHFT 30
-#define SH_PI_ERROR_SUMMARY_SHUB_FSB_CE_MASK 0x0000000040000000
-
-/* SH_PI_ERROR_SUMMARY_LIVELOCK */
-/* Description: AFI livelock error was detected */
-#define SH_PI_ERROR_SUMMARY_LIVELOCK_SHFT 31
-#define SH_PI_ERROR_SUMMARY_LIVELOCK_MASK 0x0000000080000000
-
-/* SH_PI_ERROR_SUMMARY_BAD_SNOOP */
-/* Description: AFI bad snoop error was detected */
-#define SH_PI_ERROR_SUMMARY_BAD_SNOOP_SHFT 32
-#define SH_PI_ERROR_SUMMARY_BAD_SNOOP_MASK 0x0000000100000000
-
-/* SH_PI_ERROR_SUMMARY_FSB_TBL_MISS */
-/* Description: AFI FSB request table miss error was detected */
-#define SH_PI_ERROR_SUMMARY_FSB_TBL_MISS_SHFT 33
-#define SH_PI_ERROR_SUMMARY_FSB_TBL_MISS_MASK 0x0000000200000000
-
-/* SH_PI_ERROR_SUMMARY_MSG_LENGTH */
-/* Description: Message length error on received message from SIC */
-#define SH_PI_ERROR_SUMMARY_MSG_LENGTH_SHFT 34
-#define SH_PI_ERROR_SUMMARY_MSG_LENGTH_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_SUMMARY_ALIAS" */
-/* PI Error Summary Alias */
-/* ==================================================================== */
-
-#define SH_PI_ERROR_SUMMARY_ALIAS 0x0000000120060688
-
-/* ==================================================================== */
-/* Register "SH_PI_EXPRESS_REPLY_STATUS" */
-/* PI Express Reply Status */
-/* ==================================================================== */
-
-#define SH_PI_EXPRESS_REPLY_STATUS 0x0000000120060700
-#define SH_PI_EXPRESS_REPLY_STATUS_MASK 0x0000000000000007
-#define SH_PI_EXPRESS_REPLY_STATUS_INIT 0x0000000000000000
-
-/* SH_PI_EXPRESS_REPLY_STATUS_STATE */
-/* Description: Express Reply State */
-#define SH_PI_EXPRESS_REPLY_STATUS_STATE_SHFT 0
-#define SH_PI_EXPRESS_REPLY_STATUS_STATE_MASK 0x0000000000000007
-
-/* ==================================================================== */
-/* Register "SH_PI_FIRST_ERROR" */
-/* PI First Error */
-/* ==================================================================== */
-
-#define SH_PI_FIRST_ERROR 0x0000000120060780
-#define SH_PI_FIRST_ERROR_MASK 0x00000007ffffffff
-#define SH_PI_FIRST_ERROR_INIT 0x0000000000000000
-
-/* SH_PI_FIRST_ERROR_FSB_PROTO_ERR */
-/* Description: CRB's FSB pipe detected protocol table miss */
-#define SH_PI_FIRST_ERROR_FSB_PROTO_ERR_SHFT 0
-#define SH_PI_FIRST_ERROR_FSB_PROTO_ERR_MASK 0x0000000000000001
-
-/* SH_PI_FIRST_ERROR_GFX_RP_ERR */
-/* Description: Graphics error reply message received */
-#define SH_PI_FIRST_ERROR_GFX_RP_ERR_SHFT 1
-#define SH_PI_FIRST_ERROR_GFX_RP_ERR_MASK 0x0000000000000002
-
-/* SH_PI_FIRST_ERROR_XB_PROTO_ERR */
-/* Description: CRB's XB pipe detected protocol table miss */
-#define SH_PI_FIRST_ERROR_XB_PROTO_ERR_SHFT 2
-#define SH_PI_FIRST_ERROR_XB_PROTO_ERR_MASK 0x0000000000000004
-
-/* SH_PI_FIRST_ERROR_MEM_RP_ERR */
-/* Description: Memory reply error message received */
-#define SH_PI_FIRST_ERROR_MEM_RP_ERR_SHFT 3
-#define SH_PI_FIRST_ERROR_MEM_RP_ERR_MASK 0x0000000000000008
-
-/* SH_PI_FIRST_ERROR_PIO_RP_ERR */
-/* Description: PIO reply error message received */
-#define SH_PI_FIRST_ERROR_PIO_RP_ERR_SHFT 4
-#define SH_PI_FIRST_ERROR_PIO_RP_ERR_MASK 0x0000000000000010
-
-/* SH_PI_FIRST_ERROR_MEM_TO_ERR */
-/* Description: CRB's XB pipe detected a CRB time-out */
-#define SH_PI_FIRST_ERROR_MEM_TO_ERR_SHFT 5
-#define SH_PI_FIRST_ERROR_MEM_TO_ERR_MASK 0x0000000000000020
-
-/* SH_PI_FIRST_ERROR_PIO_TO_ERR */
-/* Description: CRB's XB pipe detected a PIO time-out */
-#define SH_PI_FIRST_ERROR_PIO_TO_ERR_SHFT 6
-#define SH_PI_FIRST_ERROR_PIO_TO_ERR_MASK 0x0000000000000040
-
-/* SH_PI_FIRST_ERROR_FSB_SHUB_UCE */
-/* Description: An un-correctable ECC error was detected */
-#define SH_PI_FIRST_ERROR_FSB_SHUB_UCE_SHFT 7
-#define SH_PI_FIRST_ERROR_FSB_SHUB_UCE_MASK 0x0000000000000080
-
-/* SH_PI_FIRST_ERROR_FSB_SHUB_CE */
-/* Description: A correctable ECC error was detected */
-#define SH_PI_FIRST_ERROR_FSB_SHUB_CE_SHFT 8
-#define SH_PI_FIRST_ERROR_FSB_SHUB_CE_MASK 0x0000000000000100
-
-/* SH_PI_FIRST_ERROR_MSG_COLOR_ERR */
-/* Description: Message color was wrong */
-#define SH_PI_FIRST_ERROR_MSG_COLOR_ERR_SHFT 9
-#define SH_PI_FIRST_ERROR_MSG_COLOR_ERR_MASK 0x0000000000000200
-
-/* SH_PI_FIRST_ERROR_MD_RQ_Q_OFLOW */
-/* Description: MD Request input buffer over flow error */
-#define SH_PI_FIRST_ERROR_MD_RQ_Q_OFLOW_SHFT 10
-#define SH_PI_FIRST_ERROR_MD_RQ_Q_OFLOW_MASK 0x0000000000000400
-
-/* SH_PI_FIRST_ERROR_MD_RP_Q_OFLOW */
-/* Description: MD Reply input buffer over flow error */
-#define SH_PI_FIRST_ERROR_MD_RP_Q_OFLOW_SHFT 11
-#define SH_PI_FIRST_ERROR_MD_RP_Q_OFLOW_MASK 0x0000000000000800
-
-/* SH_PI_FIRST_ERROR_XN_RQ_Q_OFLOW */
-/* Description: XN Request input buffer over flow error */
-#define SH_PI_FIRST_ERROR_XN_RQ_Q_OFLOW_SHFT 12
-#define SH_PI_FIRST_ERROR_XN_RQ_Q_OFLOW_MASK 0x0000000000001000
-
-/* SH_PI_FIRST_ERROR_XN_RP_Q_OFLOW */
-/* Description: XN Reply input buffer over flow error */
-#define SH_PI_FIRST_ERROR_XN_RP_Q_OFLOW_SHFT 13
-#define SH_PI_FIRST_ERROR_XN_RP_Q_OFLOW_MASK 0x0000000000002000
-
-/* SH_PI_FIRST_ERROR_NACK_OFLOW */
-/* Description: NACK over flow error */
-#define SH_PI_FIRST_ERROR_NACK_OFLOW_SHFT 14
-#define SH_PI_FIRST_ERROR_NACK_OFLOW_MASK 0x0000000000004000
-
-/* SH_PI_FIRST_ERROR_GFX_INT_0 */
-/* Description: GFX transfer interrupt for CPU 0 */
-#define SH_PI_FIRST_ERROR_GFX_INT_0_SHFT 15
-#define SH_PI_FIRST_ERROR_GFX_INT_0_MASK 0x0000000000008000
-
-/* SH_PI_FIRST_ERROR_GFX_INT_1 */
-/* Description: GFX transfer interrupt for CPU 1 */
-#define SH_PI_FIRST_ERROR_GFX_INT_1_SHFT 16
-#define SH_PI_FIRST_ERROR_GFX_INT_1_MASK 0x0000000000010000
-
-/* SH_PI_FIRST_ERROR_MD_RQ_CRD_OFLOW */
-/* Description: MD Request Credit Overflow Error */
-#define SH_PI_FIRST_ERROR_MD_RQ_CRD_OFLOW_SHFT 17
-#define SH_PI_FIRST_ERROR_MD_RQ_CRD_OFLOW_MASK 0x0000000000020000
-
-/* SH_PI_FIRST_ERROR_MD_RP_CRD_OFLOW */
-/* Description: MD Reply Credit Overflow Error */
-#define SH_PI_FIRST_ERROR_MD_RP_CRD_OFLOW_SHFT 18
-#define SH_PI_FIRST_ERROR_MD_RP_CRD_OFLOW_MASK 0x0000000000040000
-
-/* SH_PI_FIRST_ERROR_XN_RQ_CRD_OFLOW */
-/* Description: XN Request Credit Overflow Error */
-#define SH_PI_FIRST_ERROR_XN_RQ_CRD_OFLOW_SHFT 19
-#define SH_PI_FIRST_ERROR_XN_RQ_CRD_OFLOW_MASK 0x0000000000080000
-
-/* SH_PI_FIRST_ERROR_XN_RP_CRD_OFLOW */
-/* Description: XN Reply Credit Overflow Error */
-#define SH_PI_FIRST_ERROR_XN_RP_CRD_OFLOW_SHFT 20
-#define SH_PI_FIRST_ERROR_XN_RP_CRD_OFLOW_MASK 0x0000000000100000
-
-/* SH_PI_FIRST_ERROR_HUNG_BUS */
-/* Description: FSB is hung */
-#define SH_PI_FIRST_ERROR_HUNG_BUS_SHFT 21
-#define SH_PI_FIRST_ERROR_HUNG_BUS_MASK 0x0000000000200000
-
-/* SH_PI_FIRST_ERROR_RSP_PARITY */
-/* Description: Parity error detecte during response phase */
-#define SH_PI_FIRST_ERROR_RSP_PARITY_SHFT 22
-#define SH_PI_FIRST_ERROR_RSP_PARITY_MASK 0x0000000000400000
-
-/* SH_PI_FIRST_ERROR_IOQ_OVERRUN */
-/* Description: Over run error detected on IOQ */
-#define SH_PI_FIRST_ERROR_IOQ_OVERRUN_SHFT 23
-#define SH_PI_FIRST_ERROR_IOQ_OVERRUN_MASK 0x0000000000800000
-
-/* SH_PI_FIRST_ERROR_REQ_FORMAT */
-/* Description: FSB request format not supported */
-#define SH_PI_FIRST_ERROR_REQ_FORMAT_SHFT 24
-#define SH_PI_FIRST_ERROR_REQ_FORMAT_MASK 0x0000000001000000
-
-/* SH_PI_FIRST_ERROR_ADDR_ACCESS */
-/* Description: Access to Address is not supported */
-#define SH_PI_FIRST_ERROR_ADDR_ACCESS_SHFT 25
-#define SH_PI_FIRST_ERROR_ADDR_ACCESS_MASK 0x0000000002000000
-
-/* SH_PI_FIRST_ERROR_REQ_PARITY */
-/* Description: Parity error detected during request phase */
-#define SH_PI_FIRST_ERROR_REQ_PARITY_SHFT 26
-#define SH_PI_FIRST_ERROR_REQ_PARITY_MASK 0x0000000004000000
-
-/* SH_PI_FIRST_ERROR_ADDR_PARITY */
-/* Description: Parity error detected on address */
-#define SH_PI_FIRST_ERROR_ADDR_PARITY_SHFT 27
-#define SH_PI_FIRST_ERROR_ADDR_PARITY_MASK 0x0000000008000000
-
-/* SH_PI_FIRST_ERROR_SHUB_FSB_DQE */
-/* Description: SHUB_FSB_DQE */
-#define SH_PI_FIRST_ERROR_SHUB_FSB_DQE_SHFT 28
-#define SH_PI_FIRST_ERROR_SHUB_FSB_DQE_MASK 0x0000000010000000
-
-/* SH_PI_FIRST_ERROR_SHUB_FSB_UCE */
-/* Description: An un-correctable ECC error was detected */
-#define SH_PI_FIRST_ERROR_SHUB_FSB_UCE_SHFT 29
-#define SH_PI_FIRST_ERROR_SHUB_FSB_UCE_MASK 0x0000000020000000
-
-/* SH_PI_FIRST_ERROR_SHUB_FSB_CE */
-/* Description: An correctable ECC error was detected */
-#define SH_PI_FIRST_ERROR_SHUB_FSB_CE_SHFT 30
-#define SH_PI_FIRST_ERROR_SHUB_FSB_CE_MASK 0x0000000040000000
-
-/* SH_PI_FIRST_ERROR_LIVELOCK */
-/* Description: AFI livelock error was detected */
-#define SH_PI_FIRST_ERROR_LIVELOCK_SHFT 31
-#define SH_PI_FIRST_ERROR_LIVELOCK_MASK 0x0000000080000000
-
-/* SH_PI_FIRST_ERROR_BAD_SNOOP */
-/* Description: AFI bad snoop error was detected */
-#define SH_PI_FIRST_ERROR_BAD_SNOOP_SHFT 32
-#define SH_PI_FIRST_ERROR_BAD_SNOOP_MASK 0x0000000100000000
-
-/* SH_PI_FIRST_ERROR_FSB_TBL_MISS */
-/* Description: AFI FSB request table miss error was detected */
-#define SH_PI_FIRST_ERROR_FSB_TBL_MISS_SHFT 33
-#define SH_PI_FIRST_ERROR_FSB_TBL_MISS_MASK 0x0000000200000000
-
-/* SH_PI_FIRST_ERROR_MSG_LENGTH */
-/* Description: Message length error on received message from SIC */
-#define SH_PI_FIRST_ERROR_MSG_LENGTH_SHFT 34
-#define SH_PI_FIRST_ERROR_MSG_LENGTH_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_PI_FIRST_ERROR_ALIAS" */
-/* PI First Error Alias */
-/* ==================================================================== */
-
-#define SH_PI_FIRST_ERROR_ALIAS 0x0000000120060788
-
-/* ==================================================================== */
-/* Register "SH_PI_PI2MD_REPLY_VC_STATUS" */
-/* PI-to-MD Reply Virtual Channel Status */
-/* ==================================================================== */
-
-#define SH_PI_PI2MD_REPLY_VC_STATUS 0x0000000120060900
-#define SH_PI_PI2MD_REPLY_VC_STATUS_MASK 0x000000000000003f
-#define SH_PI_PI2MD_REPLY_VC_STATUS_INIT 0x0000000000000000
-
-/* SH_PI_PI2MD_REPLY_VC_STATUS_OUTPUT_CRD_STAT */
-/* Description: Status of output credits */
-#define SH_PI_PI2MD_REPLY_VC_STATUS_OUTPUT_CRD_STAT_SHFT 0
-#define SH_PI_PI2MD_REPLY_VC_STATUS_OUTPUT_CRD_STAT_MASK 0x000000000000003f
-
-/* ==================================================================== */
-/* Register "SH_PI_PI2MD_REQUEST_VC_STATUS" */
-/* PI-to-MD Request Virtual Channel Status */
-/* ==================================================================== */
-
-#define SH_PI_PI2MD_REQUEST_VC_STATUS 0x0000000120060980
-#define SH_PI_PI2MD_REQUEST_VC_STATUS_MASK 0x000000000000003f
-#define SH_PI_PI2MD_REQUEST_VC_STATUS_INIT 0x0000000000000000
-
-/* SH_PI_PI2MD_REQUEST_VC_STATUS_OUTPUT_CRD_STAT */
-/* Description: Status of output credits */
-#define SH_PI_PI2MD_REQUEST_VC_STATUS_OUTPUT_CRD_STAT_SHFT 0
-#define SH_PI_PI2MD_REQUEST_VC_STATUS_OUTPUT_CRD_STAT_MASK 0x000000000000003f
-
-/* ==================================================================== */
-/* Register "SH_PI_PI2XN_REPLY_VC_STATUS" */
-/* PI-to-XN Reply Virtual Channel Status */
-/* ==================================================================== */
-
-#define SH_PI_PI2XN_REPLY_VC_STATUS 0x0000000120060a00
-#define SH_PI_PI2XN_REPLY_VC_STATUS_MASK 0x000000000000003f
-#define SH_PI_PI2XN_REPLY_VC_STATUS_INIT 0x0000000000000000
-
-/* SH_PI_PI2XN_REPLY_VC_STATUS_OUTPUT_CRD_STAT */
-/* Description: Status of output credits */
-#define SH_PI_PI2XN_REPLY_VC_STATUS_OUTPUT_CRD_STAT_SHFT 0
-#define SH_PI_PI2XN_REPLY_VC_STATUS_OUTPUT_CRD_STAT_MASK 0x000000000000003f
-
-/* ==================================================================== */
-/* Register "SH_PI_PI2XN_REQUEST_VC_STATUS" */
-/* PI-to-XN Request Virtual Channel Status */
-/* ==================================================================== */
-
-#define SH_PI_PI2XN_REQUEST_VC_STATUS 0x0000000120060a80
-#define SH_PI_PI2XN_REQUEST_VC_STATUS_MASK 0x000000000000003f
-#define SH_PI_PI2XN_REQUEST_VC_STATUS_INIT 0x0000000000000000
-
-/* SH_PI_PI2XN_REQUEST_VC_STATUS_OUTPUT_CRD_STAT */
-/* Description: Status of output credits */
-#define SH_PI_PI2XN_REQUEST_VC_STATUS_OUTPUT_CRD_STAT_SHFT 0
-#define SH_PI_PI2XN_REQUEST_VC_STATUS_OUTPUT_CRD_STAT_MASK 0x000000000000003f
-
-/* ==================================================================== */
-/* Register "SH_PI_UNCORRECTED_DETAIL_1" */
-/* PI Uncorrected Error Detail 1 */
-/* ==================================================================== */
-
-#define SH_PI_UNCORRECTED_DETAIL_1 0x0000000120060b00
-#define SH_PI_UNCORRECTED_DETAIL_1_MASK 0xffffffffffffffff
-#define SH_PI_UNCORRECTED_DETAIL_1_INIT 0x0000000000000000
-
-/* SH_PI_UNCORRECTED_DETAIL_1_ADDRESS */
-/* Description: Address of Message that logged Uncorrectable Error */
-#define SH_PI_UNCORRECTED_DETAIL_1_ADDRESS_SHFT 0
-#define SH_PI_UNCORRECTED_DETAIL_1_ADDRESS_MASK 0x0000ffffffffffff
-
-/* SH_PI_UNCORRECTED_DETAIL_1_SYNDROME */
-/* Description: Syndrome for double word data with Uncorrectable Er */
-#define SH_PI_UNCORRECTED_DETAIL_1_SYNDROME_SHFT 48
-#define SH_PI_UNCORRECTED_DETAIL_1_SYNDROME_MASK 0x00ff000000000000
-
-/* SH_PI_UNCORRECTED_DETAIL_1_DEP */
-/* Description: DEP for Double word in error */
-#define SH_PI_UNCORRECTED_DETAIL_1_DEP_SHFT 56
-#define SH_PI_UNCORRECTED_DETAIL_1_DEP_MASK 0xff00000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_UNCORRECTED_DETAIL_2" */
-/* PI Uncorrected Error Detail 2 */
-/* ==================================================================== */
-
-#define SH_PI_UNCORRECTED_DETAIL_2 0x0000000120060b80
-#define SH_PI_UNCORRECTED_DETAIL_2_MASK 0xffffffffffffffff
-#define SH_PI_UNCORRECTED_DETAIL_2_INIT 0x0000000000000000
-
-/* SH_PI_UNCORRECTED_DETAIL_2_DATA */
-/* Description: Double word data in error */
-#define SH_PI_UNCORRECTED_DETAIL_2_DATA_SHFT 0
-#define SH_PI_UNCORRECTED_DETAIL_2_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_PI_UNCORRECTED_DETAIL_3" */
-/* PI Uncorrected Error Detail 3 */
-/* ==================================================================== */
-
-#define SH_PI_UNCORRECTED_DETAIL_3 0x0000000120060c00
-#define SH_PI_UNCORRECTED_DETAIL_3_MASK 0xffffffffffffffff
-#define SH_PI_UNCORRECTED_DETAIL_3_INIT 0x0000000000000000
-
-/* SH_PI_UNCORRECTED_DETAIL_3_ADDRESS */
-/* Description: Address of Message that logged Uncorrectable Error */
-#define SH_PI_UNCORRECTED_DETAIL_3_ADDRESS_SHFT 0
-#define SH_PI_UNCORRECTED_DETAIL_3_ADDRESS_MASK 0x0000ffffffffffff
-
-/* SH_PI_UNCORRECTED_DETAIL_3_SYNDROME */
-/* Description: Syndrome for double word data with Uncorrectable Er */
-#define SH_PI_UNCORRECTED_DETAIL_3_SYNDROME_SHFT 48
-#define SH_PI_UNCORRECTED_DETAIL_3_SYNDROME_MASK 0x00ff000000000000
-
-/* SH_PI_UNCORRECTED_DETAIL_3_DEP */
-/* Description: DCP for Double word in error */
-#define SH_PI_UNCORRECTED_DETAIL_3_DEP_SHFT 56
-#define SH_PI_UNCORRECTED_DETAIL_3_DEP_MASK 0xff00000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_UNCORRECTED_DETAIL_4" */
-/* PI Uncorrected Error Detail 4 */
-/* ==================================================================== */
-
-#define SH_PI_UNCORRECTED_DETAIL_4 0x0000000120060c80
-#define SH_PI_UNCORRECTED_DETAIL_4_MASK 0xffffffffffffffff
-#define SH_PI_UNCORRECTED_DETAIL_4_INIT 0x0000000000000000
-
-/* SH_PI_UNCORRECTED_DETAIL_4_DATA */
-/* Description: Double word data in error */
-#define SH_PI_UNCORRECTED_DETAIL_4_DATA_SHFT 0
-#define SH_PI_UNCORRECTED_DETAIL_4_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_PI_MD2PI_REPLY_VC_STATUS" */
-/* MD-to-PI Reply Virtual Channel Status */
-/* ==================================================================== */
-
-#define SH_PI_MD2PI_REPLY_VC_STATUS 0x0000000120060800
-#define SH_PI_MD2PI_REPLY_VC_STATUS_MASK 0x0000000000000fff
-#define SH_PI_MD2PI_REPLY_VC_STATUS_INIT 0x0000000000000000
-
-/* SH_PI_MD2PI_REPLY_VC_STATUS_INPUT_HDR_CRD_STAT */
-/* Description: Status of input header credits */
-#define SH_PI_MD2PI_REPLY_VC_STATUS_INPUT_HDR_CRD_STAT_SHFT 0
-#define SH_PI_MD2PI_REPLY_VC_STATUS_INPUT_HDR_CRD_STAT_MASK 0x000000000000000f
-
-/* SH_PI_MD2PI_REPLY_VC_STATUS_INPUT_DAT_CRD_STAT */
-/* Description: Status of data credits */
-#define SH_PI_MD2PI_REPLY_VC_STATUS_INPUT_DAT_CRD_STAT_SHFT 4
-#define SH_PI_MD2PI_REPLY_VC_STATUS_INPUT_DAT_CRD_STAT_MASK 0x00000000000000f0
-
-/* SH_PI_MD2PI_REPLY_VC_STATUS_INPUT_QUEUE_STAT */
-/* Description: Status of MD Reply Input Queue */
-#define SH_PI_MD2PI_REPLY_VC_STATUS_INPUT_QUEUE_STAT_SHFT 8
-#define SH_PI_MD2PI_REPLY_VC_STATUS_INPUT_QUEUE_STAT_MASK 0x0000000000000f00
-
-/* ==================================================================== */
-/* Register "SH_PI_MD2PI_REQUEST_VC_STATUS" */
-/* MD-to-PI Request Virtual Channel Status */
-/* ==================================================================== */
-
-#define SH_PI_MD2PI_REQUEST_VC_STATUS 0x0000000120060880
-#define SH_PI_MD2PI_REQUEST_VC_STATUS_MASK 0x0000000000000fff
-#define SH_PI_MD2PI_REQUEST_VC_STATUS_INIT 0x0000000000000000
-
-/* SH_PI_MD2PI_REQUEST_VC_STATUS_INPUT_HDR_CRD_STAT */
-/* Description: Status of input header credits */
-#define SH_PI_MD2PI_REQUEST_VC_STATUS_INPUT_HDR_CRD_STAT_SHFT 0
-#define SH_PI_MD2PI_REQUEST_VC_STATUS_INPUT_HDR_CRD_STAT_MASK 0x000000000000000f
-
-/* SH_PI_MD2PI_REQUEST_VC_STATUS_INPUT_DAT_CRD_STAT */
-/* Description: Status of input data credits */
-#define SH_PI_MD2PI_REQUEST_VC_STATUS_INPUT_DAT_CRD_STAT_SHFT 4
-#define SH_PI_MD2PI_REQUEST_VC_STATUS_INPUT_DAT_CRD_STAT_MASK 0x00000000000000f0
-
-/* SH_PI_MD2PI_REQUEST_VC_STATUS_INPUT_QUEUE_STAT */
-/* Description: Status of MD Request Input Queue */
-#define SH_PI_MD2PI_REQUEST_VC_STATUS_INPUT_QUEUE_STAT_SHFT 8
-#define SH_PI_MD2PI_REQUEST_VC_STATUS_INPUT_QUEUE_STAT_MASK 0x0000000000000f00
-
-/* ==================================================================== */
-/* Register "SH_PI_XN2PI_REPLY_VC_STATUS" */
-/* XN-to-PI Reply Virtual Channel Status */
-/* ==================================================================== */
-
-#define SH_PI_XN2PI_REPLY_VC_STATUS 0x0000000120060d00
-#define SH_PI_XN2PI_REPLY_VC_STATUS_MASK 0x0000000000000fff
-#define SH_PI_XN2PI_REPLY_VC_STATUS_INIT 0x0000000000000000
-
-/* SH_PI_XN2PI_REPLY_VC_STATUS_INPUT_HDR_CRD_STAT */
-/* Description: Status of input header credits */
-#define SH_PI_XN2PI_REPLY_VC_STATUS_INPUT_HDR_CRD_STAT_SHFT 0
-#define SH_PI_XN2PI_REPLY_VC_STATUS_INPUT_HDR_CRD_STAT_MASK 0x000000000000000f
-
-/* SH_PI_XN2PI_REPLY_VC_STATUS_INPUT_DAT_CRD_STAT */
-/* Description: Status of input data credits */
-#define SH_PI_XN2PI_REPLY_VC_STATUS_INPUT_DAT_CRD_STAT_SHFT 4
-#define SH_PI_XN2PI_REPLY_VC_STATUS_INPUT_DAT_CRD_STAT_MASK 0x00000000000000f0
-
-/* SH_PI_XN2PI_REPLY_VC_STATUS_INPUT_QUEUE_STAT */
-/* Description: Status of XN Reply Input Queue */
-#define SH_PI_XN2PI_REPLY_VC_STATUS_INPUT_QUEUE_STAT_SHFT 8
-#define SH_PI_XN2PI_REPLY_VC_STATUS_INPUT_QUEUE_STAT_MASK 0x0000000000000f00
-
-/* ==================================================================== */
-/* Register "SH_PI_XN2PI_REQUEST_VC_STATUS" */
-/* XN-to-PI Request Virtual Channel Status */
-/* ==================================================================== */
-
-#define SH_PI_XN2PI_REQUEST_VC_STATUS 0x0000000120060d80
-#define SH_PI_XN2PI_REQUEST_VC_STATUS_MASK 0x0000000000000fff
-#define SH_PI_XN2PI_REQUEST_VC_STATUS_INIT 0x0000000000000000
-
-/* SH_PI_XN2PI_REQUEST_VC_STATUS_INPUT_HDR_CRD_STAT */
-/* Description: Status of input header credits */
-#define SH_PI_XN2PI_REQUEST_VC_STATUS_INPUT_HDR_CRD_STAT_SHFT 0
-#define SH_PI_XN2PI_REQUEST_VC_STATUS_INPUT_HDR_CRD_STAT_MASK 0x000000000000000f
-
-/* SH_PI_XN2PI_REQUEST_VC_STATUS_INPUT_DAT_CRD_STAT */
-/* Description: Status of input data credits */
-#define SH_PI_XN2PI_REQUEST_VC_STATUS_INPUT_DAT_CRD_STAT_SHFT 4
-#define SH_PI_XN2PI_REQUEST_VC_STATUS_INPUT_DAT_CRD_STAT_MASK 0x00000000000000f0
-
-/* SH_PI_XN2PI_REQUEST_VC_STATUS_INPUT_QUEUE_STAT */
-/* Description: Status of XN Request Input Queue */
-#define SH_PI_XN2PI_REQUEST_VC_STATUS_INPUT_QUEUE_STAT_SHFT 8
-#define SH_PI_XN2PI_REQUEST_VC_STATUS_INPUT_QUEUE_STAT_MASK 0x0000000000000f00
-
-/* ==================================================================== */
-/* Register "SH_XNPI_SIC_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNPI_SIC_FLOW 0x0000000150030000
-#define SH_XNPI_SIC_FLOW_MASK 0x9f1f1f1f1f1f9f9f
-#define SH_XNPI_SIC_FLOW_INIT 0x0000080000080000
-
-/* SH_XNPI_SIC_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNPI_SIC_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNPI_SIC_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000001f
-
-/* SH_XNPI_SIC_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNPI_SIC_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNPI_SIC_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNPI_SIC_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNPI_SIC_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNPI_SIC_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000001f00
-
-/* SH_XNPI_SIC_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNPI_SIC_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNPI_SIC_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNPI_SIC_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNPI_SIC_FLOW_CREDIT_VC0_TEST_SHFT 16
-#define SH_XNPI_SIC_FLOW_CREDIT_VC0_TEST_MASK 0x00000000001f0000
-
-/* SH_XNPI_SIC_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNPI_SIC_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNPI_SIC_FLOW_CREDIT_VC0_DYN_MASK 0x000000001f000000
-
-/* SH_XNPI_SIC_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNPI_SIC_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNPI_SIC_FLOW_CREDIT_VC0_CAP_MASK 0x0000001f00000000
-
-/* SH_XNPI_SIC_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNPI_SIC_FLOW_CREDIT_VC2_TEST_SHFT 40
-#define SH_XNPI_SIC_FLOW_CREDIT_VC2_TEST_MASK 0x00001f0000000000
-
-/* SH_XNPI_SIC_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNPI_SIC_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNPI_SIC_FLOW_CREDIT_VC2_DYN_MASK 0x001f000000000000
-
-/* SH_XNPI_SIC_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNPI_SIC_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNPI_SIC_FLOW_CREDIT_VC2_CAP_MASK 0x1f00000000000000
-
-/* SH_XNPI_SIC_FLOW_DISABLE_BYPASS_OUT */
-#define SH_XNPI_SIC_FLOW_DISABLE_BYPASS_OUT_SHFT 63
-#define SH_XNPI_SIC_FLOW_DISABLE_BYPASS_OUT_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNPI_TO_NI0_PORT_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNPI_TO_NI0_PORT_FLOW 0x0000000150030010
-#define SH_XNPI_TO_NI0_PORT_FLOW_MASK 0x3f3f003f3f00bfbf
-#define SH_XNPI_TO_NI0_PORT_FLOW_INIT 0x0000000000000000
-
-/* SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNPI_TO_NI0_PORT_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC0_DYN_MASK 0x000000003f000000
-
-/* SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC0_CAP_MASK 0x0000003f00000000
-
-/* SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC2_DYN_MASK 0x003f000000000000
-
-/* SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNPI_TO_NI0_PORT_FLOW_CREDIT_VC2_CAP_MASK 0x3f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNPI_TO_NI1_PORT_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNPI_TO_NI1_PORT_FLOW 0x0000000150030020
-#define SH_XNPI_TO_NI1_PORT_FLOW_MASK 0x3f3f003f3f00bfbf
-#define SH_XNPI_TO_NI1_PORT_FLOW_INIT 0x0000000000000000
-
-/* SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNPI_TO_NI1_PORT_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC0_DYN_MASK 0x000000003f000000
-
-/* SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC0_CAP_MASK 0x0000003f00000000
-
-/* SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC2_DYN_MASK 0x003f000000000000
-
-/* SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNPI_TO_NI1_PORT_FLOW_CREDIT_VC2_CAP_MASK 0x3f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNPI_TO_IILB_PORT_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNPI_TO_IILB_PORT_FLOW 0x0000000150030030
-#define SH_XNPI_TO_IILB_PORT_FLOW_MASK 0x3f3f003f3f00bfbf
-#define SH_XNPI_TO_IILB_PORT_FLOW_INIT 0x0000000000000000
-
-/* SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNPI_TO_IILB_PORT_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC0_DYN_MASK 0x000000003f000000
-
-/* SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC0_CAP_MASK 0x0000003f00000000
-
-/* SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC2_DYN_MASK 0x003f000000000000
-
-/* SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNPI_TO_IILB_PORT_FLOW_CREDIT_VC2_CAP_MASK 0x3f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNPI_FR_NI0_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO 0x0000000150030040
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_MASK 0x00001f1f3f3f3f3f
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_INIT 0x00000c0c00000000
-
-/* SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_DYN */
-/* Description: vc0 fifo entry dynamic value */
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_DYN_SHFT 0
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_DYN_MASK 0x000000000000003f
-
-/* SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_CAP */
-/* Description: vc0 fifo entry captured value */
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_CAP_SHFT 8
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_CAP_MASK 0x0000000000003f00
-
-/* SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_DYN */
-/* Description: vc2 fifo entry dynamic value */
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_DYN_SHFT 16
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_DYN_MASK 0x00000000003f0000
-
-/* SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_CAP */
-/* Description: vc2 fifo entry captured value */
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_CAP_SHFT 24
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_CAP_MASK 0x000000003f000000
-
-/* SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_TEST */
-/* Description: vc0 test credits limit */
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_TEST_SHFT 32
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_TEST_MASK 0x0000001f00000000
-
-/* SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_TEST */
-/* Description: vc2 test credits limit */
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_TEST_SHFT 40
-#define SH_XNPI_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_TEST_MASK 0x00001f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNPI_FR_NI1_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO 0x0000000150030050
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_MASK 0x00001f1f3f3f3f3f
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_INIT 0x00000c0c00000000
-
-/* SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_DYN */
-/* Description: vc0 fifo entry dynamic value */
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_DYN_SHFT 0
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_DYN_MASK 0x000000000000003f
-
-/* SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_CAP */
-/* Description: vc0 fifo entry captured value */
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_CAP_SHFT 8
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_CAP_MASK 0x0000000000003f00
-
-/* SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_DYN */
-/* Description: vc2 fifo entry dynamic value */
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_DYN_SHFT 16
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_DYN_MASK 0x00000000003f0000
-
-/* SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_CAP */
-/* Description: vc2 fifo entry captured value */
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_CAP_SHFT 24
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_CAP_MASK 0x000000003f000000
-
-/* SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_TEST */
-/* Description: vc0 test credits limit */
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_TEST_SHFT 32
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_TEST_MASK 0x0000001f00000000
-
-/* SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_TEST */
-/* Description: vc2 test credits limit */
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_TEST_SHFT 40
-#define SH_XNPI_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_TEST_MASK 0x00001f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNPI_FR_IILB_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO 0x0000000150030060
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_MASK 0x00001f1f3f3f3f3f
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_INIT 0x00000c0c00000000
-
-/* SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_DYN */
-/* Description: vc0 fifo entry dynamic value */
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_DYN_SHFT 0
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_DYN_MASK 0x000000000000003f
-
-/* SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_CAP */
-/* Description: vc0 fifo entry captured value */
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_CAP_SHFT 8
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_CAP_MASK 0x0000000000003f00
-
-/* SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_DYN */
-/* Description: vc2 fifo entry dynamic value */
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_DYN_SHFT 16
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_DYN_MASK 0x00000000003f0000
-
-/* SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_CAP */
-/* Description: vc2 fifo entry captured value */
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_CAP_SHFT 24
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_CAP_MASK 0x000000003f000000
-
-/* SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_TEST */
-/* Description: vc0 test credits limit */
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_TEST_SHFT 32
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_TEST_MASK 0x0000001f00000000
-
-/* SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_TEST */
-/* Description: vc2 test credits limit */
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_TEST_SHFT 40
-#define SH_XNPI_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_TEST_MASK 0x00001f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_SIC_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNMD_SIC_FLOW 0x0000000150030100
-#define SH_XNMD_SIC_FLOW_MASK 0x9f1f1f1f1f1f9f9f
-#define SH_XNMD_SIC_FLOW_INIT 0x0000090000090000
-
-/* SH_XNMD_SIC_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNMD_SIC_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNMD_SIC_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000001f
-
-/* SH_XNMD_SIC_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNMD_SIC_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNMD_SIC_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNMD_SIC_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNMD_SIC_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNMD_SIC_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000001f00
-
-/* SH_XNMD_SIC_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNMD_SIC_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNMD_SIC_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNMD_SIC_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNMD_SIC_FLOW_CREDIT_VC0_TEST_SHFT 16
-#define SH_XNMD_SIC_FLOW_CREDIT_VC0_TEST_MASK 0x00000000001f0000
-
-/* SH_XNMD_SIC_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNMD_SIC_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNMD_SIC_FLOW_CREDIT_VC0_DYN_MASK 0x000000001f000000
-
-/* SH_XNMD_SIC_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNMD_SIC_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNMD_SIC_FLOW_CREDIT_VC0_CAP_MASK 0x0000001f00000000
-
-/* SH_XNMD_SIC_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNMD_SIC_FLOW_CREDIT_VC2_TEST_SHFT 40
-#define SH_XNMD_SIC_FLOW_CREDIT_VC2_TEST_MASK 0x00001f0000000000
-
-/* SH_XNMD_SIC_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNMD_SIC_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNMD_SIC_FLOW_CREDIT_VC2_DYN_MASK 0x001f000000000000
-
-/* SH_XNMD_SIC_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNMD_SIC_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNMD_SIC_FLOW_CREDIT_VC2_CAP_MASK 0x1f00000000000000
-
-/* SH_XNMD_SIC_FLOW_DISABLE_BYPASS_OUT */
-#define SH_XNMD_SIC_FLOW_DISABLE_BYPASS_OUT_SHFT 63
-#define SH_XNMD_SIC_FLOW_DISABLE_BYPASS_OUT_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_TO_NI0_PORT_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNMD_TO_NI0_PORT_FLOW 0x0000000150030110
-#define SH_XNMD_TO_NI0_PORT_FLOW_MASK 0x3f3f003f3f00bfbf
-#define SH_XNMD_TO_NI0_PORT_FLOW_INIT 0x0000000000000000
-
-/* SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNMD_TO_NI0_PORT_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC0_DYN_MASK 0x000000003f000000
-
-/* SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC0_CAP_MASK 0x0000003f00000000
-
-/* SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC2_DYN_MASK 0x003f000000000000
-
-/* SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNMD_TO_NI0_PORT_FLOW_CREDIT_VC2_CAP_MASK 0x3f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_TO_NI1_PORT_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNMD_TO_NI1_PORT_FLOW 0x0000000150030120
-#define SH_XNMD_TO_NI1_PORT_FLOW_MASK 0x3f3f003f3f00bfbf
-#define SH_XNMD_TO_NI1_PORT_FLOW_INIT 0x0000000000000000
-
-/* SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNMD_TO_NI1_PORT_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC0_DYN_MASK 0x000000003f000000
-
-/* SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC0_CAP_MASK 0x0000003f00000000
-
-/* SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC2_DYN_MASK 0x003f000000000000
-
-/* SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNMD_TO_NI1_PORT_FLOW_CREDIT_VC2_CAP_MASK 0x3f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_TO_IILB_PORT_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNMD_TO_IILB_PORT_FLOW 0x0000000150030130
-#define SH_XNMD_TO_IILB_PORT_FLOW_MASK 0x3f3f003f3f00bfbf
-#define SH_XNMD_TO_IILB_PORT_FLOW_INIT 0x0000000000000000
-
-/* SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNMD_TO_IILB_PORT_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC0_DYN_MASK 0x000000003f000000
-
-/* SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC0_CAP_MASK 0x0000003f00000000
-
-/* SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC2_DYN_MASK 0x003f000000000000
-
-/* SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNMD_TO_IILB_PORT_FLOW_CREDIT_VC2_CAP_MASK 0x3f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_FR_NI0_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO 0x0000000150030140
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_MASK 0x00001f1f3f3f3f3f
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_INIT 0x00000c0c00000000
-
-/* SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_DYN */
-/* Description: vc0 fifo entry dynamic value */
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_DYN_SHFT 0
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_DYN_MASK 0x000000000000003f
-
-/* SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_CAP */
-/* Description: vc0 fifo entry captured value */
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_CAP_SHFT 8
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_CAP_MASK 0x0000000000003f00
-
-/* SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_DYN */
-/* Description: vc2 fifo entry dynamic value */
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_DYN_SHFT 16
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_DYN_MASK 0x00000000003f0000
-
-/* SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_CAP */
-/* Description: vc2 fifo entry captured value */
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_CAP_SHFT 24
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_CAP_MASK 0x000000003f000000
-
-/* SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_TEST */
-/* Description: vc0 test credits limit */
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_TEST_SHFT 32
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC0_TEST_MASK 0x0000001f00000000
-
-/* SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_TEST */
-/* Description: vc2 test credits limit */
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_TEST_SHFT 40
-#define SH_XNMD_FR_NI0_PORT_FLOW_FIFO_ENTRY_VC2_TEST_MASK 0x00001f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_FR_NI1_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO 0x0000000150030150
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_MASK 0x00001f1f3f3f3f3f
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_INIT 0x00000c0c00000000
-
-/* SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_DYN */
-/* Description: vc0 fifo entry dynamic value */
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_DYN_SHFT 0
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_DYN_MASK 0x000000000000003f
-
-/* SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_CAP */
-/* Description: vc0 fifo entry captured value */
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_CAP_SHFT 8
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_CAP_MASK 0x0000000000003f00
-
-/* SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_DYN */
-/* Description: vc2 fifo entry dynamic value */
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_DYN_SHFT 16
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_DYN_MASK 0x00000000003f0000
-
-/* SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_CAP */
-/* Description: vc2 fifo entry captured value */
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_CAP_SHFT 24
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_CAP_MASK 0x000000003f000000
-
-/* SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_TEST */
-/* Description: vc0 test credits limit */
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_TEST_SHFT 32
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC0_TEST_MASK 0x0000001f00000000
-
-/* SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_TEST */
-/* Description: vc2 test credits limit */
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_TEST_SHFT 40
-#define SH_XNMD_FR_NI1_PORT_FLOW_FIFO_ENTRY_VC2_TEST_MASK 0x00001f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_FR_IILB_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO 0x0000000150030160
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_MASK 0x00001f1f3f3f3f3f
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_INIT 0x00000c0c00000000
-
-/* SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_DYN */
-/* Description: vc0 fifo entry dynamic value */
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_DYN_SHFT 0
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_DYN_MASK 0x000000000000003f
-
-/* SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_CAP */
-/* Description: vc0 fifo entry captured value */
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_CAP_SHFT 8
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_CAP_MASK 0x0000000000003f00
-
-/* SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_DYN */
-/* Description: vc2 fifo entry dynamic value */
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_DYN_SHFT 16
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_DYN_MASK 0x00000000003f0000
-
-/* SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_CAP */
-/* Description: vc2 fifo entry captured value */
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_CAP_SHFT 24
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_CAP_MASK 0x000000003f000000
-
-/* SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_TEST */
-/* Description: vc0 test credits limit */
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_TEST_SHFT 32
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC0_TEST_MASK 0x0000001f00000000
-
-/* SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_TEST */
-/* Description: vc2 test credits limit */
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_TEST_SHFT 40
-#define SH_XNMD_FR_IILB_PORT_FLOW_FIFO_ENTRY_VC2_TEST_MASK 0x00001f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNII_INTRA_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNII_INTRA_FLOW 0x0000000150030200
-#define SH_XNII_INTRA_FLOW_MASK 0x7f7f7f7f7f7fbfbf
-#define SH_XNII_INTRA_FLOW_INIT 0x00003f00003f0000
-
-/* SH_XNII_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNII_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNII_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNII_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNII_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNII_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNII_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNII_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNII_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNII_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNII_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNII_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNII_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNII_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 16
-#define SH_XNII_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x00000000007f0000
-
-/* SH_XNII_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNII_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNII_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNII_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNII_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNII_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNII_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNII_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 40
-#define SH_XNII_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x00007f0000000000
-
-/* SH_XNII_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNII_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNII_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNII_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNII_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNII_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNLB_INTRA_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNLB_INTRA_FLOW 0x0000000150030210
-#define SH_XNLB_INTRA_FLOW_MASK 0xff7f7f7f7f7fbfbf
-#define SH_XNLB_INTRA_FLOW_INIT 0x0000080000100000
-
-/* SH_XNLB_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNLB_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNLB_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNLB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNLB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNLB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNLB_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNLB_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNLB_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNLB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNLB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNLB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNLB_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 16
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x00000000007f0000
-
-/* SH_XNLB_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 24
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNLB_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 32
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNLB_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 40
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x00007f0000000000
-
-/* SH_XNLB_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 48
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNLB_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 56
-#define SH_XNLB_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* SH_XNLB_INTRA_FLOW_DISABLE_BYPASS_IN */
-#define SH_XNLB_INTRA_FLOW_DISABLE_BYPASS_IN_SHFT 63
-#define SH_XNLB_INTRA_FLOW_DISABLE_BYPASS_IN_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT 0x0000000150030220
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_MASK 0x7f7f007f7f00bfbf
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_INIT 0x0000000000000000
-
-/* SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_DYN_SHFT 24
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_CAP_SHFT 32
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_DYN_SHFT 48
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_CAP_SHFT 56
-#define SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT 0x0000000150030230
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_MASK 0x7f7f007f7f00bfbf
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_INIT 0x0000000000000000
-
-/* SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_DYN_SHFT 24
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_CAP_SHFT 32
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_DYN_SHFT 48
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_CAP_SHFT 56
-#define SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT 0x0000000150030240
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_MASK 0x7f7f007f7f00bfbf
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_INIT 0x0000000000000000
-
-/* SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_DYN_SHFT 24
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_CAP_SHFT 32
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_DYN_SHFT 48
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_CAP_SHFT 56
-#define SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT 0x0000000150030250
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_MASK 0x7f7f007f7f00bfbf
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_INIT 0x0000000000000000
-
-/* SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_DYN_SHFT 24
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_CAP_SHFT 32
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_DYN_SHFT 48
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_CAP_SHFT 56
-#define SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT 0x0000000150030260
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_MASK 0x7f7f007f7f00bfbf
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_INIT 0x0000000000000000
-
-/* SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_DYN_SHFT 24
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_CAP_SHFT 32
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_DYN_SHFT 48
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_CAP_SHFT 56
-#define SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT 0x0000000150030270
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_MASK 0x00007f7f7f7f7f7f
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_INIT 0x000000000c00000c
-
-/* SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 0
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x000000000000007f
-
-/* SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 8
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x0000000000007f00
-
-/* SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 16
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x00000000007f0000
-
-/* SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 24
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x000000007f000000
-
-/* SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 32
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x0000007f00000000
-
-/* SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 40
-#define SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x00007f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT 0x0000000150030280
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_MASK 0x00007f7f7f7f7f7f
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_INIT 0x000000000c00000c
-
-/* SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 0
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x000000000000007f
-
-/* SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 8
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x0000000000007f00
-
-/* SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 16
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x00000000007f0000
-
-/* SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 24
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x000000007f000000
-
-/* SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 32
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x0000007f00000000
-
-/* SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 40
-#define SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x00007f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT 0x0000000150030290
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_MASK 0x00007f7f7f7f7f7f
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_INIT 0x000000000c00000c
-
-/* SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 0
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x000000000000007f
-
-/* SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 8
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x0000000000007f00
-
-/* SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 16
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x00000000007f0000
-
-/* SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 24
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x000000007f000000
-
-/* SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 32
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x0000007f00000000
-
-/* SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 40
-#define SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x00007f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT 0x00000001500302a0
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_MASK 0x00007f7f7f7f7f7f
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_INIT 0x000000000c00000c
-
-/* SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 0
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x000000000000007f
-
-/* SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 8
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x0000000000007f00
-
-/* SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 16
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x00000000007f0000
-
-/* SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 24
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x000000007f000000
-
-/* SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 32
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x0000007f00000000
-
-/* SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 40
-#define SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x00007f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT 0x00000001500302b0
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_MASK 0x00007f7f7f7f7f7f
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_INIT 0x000000000c00000c
-
-/* SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 0
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x000000000000007f
-
-/* SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 8
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x0000000000007f00
-
-/* SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 16
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x00000000007f0000
-
-/* SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 24
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x000000007f000000
-
-/* SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 32
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x0000007f00000000
-
-/* SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 40
-#define SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x00007f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT 0x0000000150030300
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_MASK 0x7f7f007f7f00bfbf
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_INIT 0x0000000000000000
-
-/* SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_DYN_SHFT 24
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_CAP_SHFT 32
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_DYN_SHFT 48
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_CAP_SHFT 56
-#define SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT 0x0000000150030310
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_MASK 0x7f7f007f7f00bfbf
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_INIT 0x0000000000000000
-
-/* SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_DYN_SHFT 24
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_CAP_SHFT 32
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_DYN_SHFT 48
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_CAP_SHFT 56
-#define SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT 0x0000000150030320
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_MASK 0x7f7f007f7f00bfbf
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_INIT 0x0000000000000000
-
-/* SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_DYN_SHFT 24
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_CAP_SHFT 32
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_DYN_SHFT 48
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_CAP_SHFT 56
-#define SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT 0x0000000150030330
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_MASK 0x00007f7f7f7f7f7f
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_INIT 0x000000000c00000c
-
-/* SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 0
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x000000000000007f
-
-/* SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 8
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x0000000000007f00
-
-/* SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 16
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x00000000007f0000
-
-/* SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 24
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x000000007f000000
-
-/* SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 32
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x0000007f00000000
-
-/* SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 40
-#define SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x00007f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT 0x0000000150030340
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_MASK 0x00007f7f7f7f7f7f
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_INIT 0x000000000c00000c
-
-/* SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 0
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x000000000000007f
-
-/* SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 8
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x0000000000007f00
-
-/* SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 16
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x00000000007f0000
-
-/* SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 24
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x000000007f000000
-
-/* SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 32
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x0000007f00000000
-
-/* SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 40
-#define SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x00007f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT 0x0000000150030350
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_MASK 0x00007f7f7f7f7f7f
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_INIT 0x000000000c00000c
-
-/* SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 0
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x000000000000007f
-
-/* SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 8
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x0000000000007f00
-
-/* SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 16
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x00000000007f0000
-
-/* SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 24
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x000000007f000000
-
-/* SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 32
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x0000007f00000000
-
-/* SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 40
-#define SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x00007f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_0_INTRANI_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_0_INTRANI_FLOW 0x0000000150030360
-#define SH_XNNI0_0_INTRANI_FLOW_MASK 0x00000000000000bf
-#define SH_XNNI0_0_INTRANI_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_0_INTRANI_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI0_0_INTRANI_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI0_0_INTRANI_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_0_INTRANI_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI0_0_INTRANI_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI0_0_INTRANI_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_1_INTRANI_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_1_INTRANI_FLOW 0x0000000150030370
-#define SH_XNNI0_1_INTRANI_FLOW_MASK 0x00000000000000bf
-#define SH_XNNI0_1_INTRANI_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_1_INTRANI_FLOW_DEBIT_VC1_WITHHOLD */
-/* Description: vc1 withhold */
-#define SH_XNNI0_1_INTRANI_FLOW_DEBIT_VC1_WITHHOLD_SHFT 0
-#define SH_XNNI0_1_INTRANI_FLOW_DEBIT_VC1_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_1_INTRANI_FLOW_DEBIT_VC1_FORCE_CRED */
-/* Description: Force Credit on VC1 from debit cntr */
-#define SH_XNNI0_1_INTRANI_FLOW_DEBIT_VC1_FORCE_CRED_SHFT 7
-#define SH_XNNI0_1_INTRANI_FLOW_DEBIT_VC1_FORCE_CRED_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_2_INTRANI_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_2_INTRANI_FLOW 0x0000000150030380
-#define SH_XNNI0_2_INTRANI_FLOW_MASK 0x00000000000000bf
-#define SH_XNNI0_2_INTRANI_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_2_INTRANI_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI0_2_INTRANI_FLOW_DEBIT_VC2_WITHHOLD_SHFT 0
-#define SH_XNNI0_2_INTRANI_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_2_INTRANI_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI0_2_INTRANI_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 7
-#define SH_XNNI0_2_INTRANI_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_3_INTRANI_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_3_INTRANI_FLOW 0x0000000150030390
-#define SH_XNNI0_3_INTRANI_FLOW_MASK 0x00000000000000bf
-#define SH_XNNI0_3_INTRANI_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_3_INTRANI_FLOW_DEBIT_VC3_WITHHOLD */
-/* Description: vc3 withhold */
-#define SH_XNNI0_3_INTRANI_FLOW_DEBIT_VC3_WITHHOLD_SHFT 0
-#define SH_XNNI0_3_INTRANI_FLOW_DEBIT_VC3_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI0_3_INTRANI_FLOW_DEBIT_VC3_FORCE_CRED */
-/* Description: Force Credit on VC3 from debit cntr */
-#define SH_XNNI0_3_INTRANI_FLOW_DEBIT_VC3_FORCE_CRED_SHFT 7
-#define SH_XNNI0_3_INTRANI_FLOW_DEBIT_VC3_FORCE_CRED_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_VCSWITCH_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_VCSWITCH_FLOW 0x00000001500303a0
-#define SH_XNNI0_VCSWITCH_FLOW_MASK 0x0000000701010101
-#define SH_XNNI0_VCSWITCH_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_VCSWITCH_FLOW_NI_VCFIFO_DATELINE_SWITCH */
-/* Description: Swap VC0/2 with VC1/3 */
-#define SH_XNNI0_VCSWITCH_FLOW_NI_VCFIFO_DATELINE_SWITCH_SHFT 0
-#define SH_XNNI0_VCSWITCH_FLOW_NI_VCFIFO_DATELINE_SWITCH_MASK 0x0000000000000001
-
-/* SH_XNNI0_VCSWITCH_FLOW_PI_VCFIFO_SWITCH */
-/* Description: Swap VC0/2 with VC1/3 */
-#define SH_XNNI0_VCSWITCH_FLOW_PI_VCFIFO_SWITCH_SHFT 8
-#define SH_XNNI0_VCSWITCH_FLOW_PI_VCFIFO_SWITCH_MASK 0x0000000000000100
-
-/* SH_XNNI0_VCSWITCH_FLOW_MD_VCFIFO_SWITCH */
-/* Description: Swap VC0/2 with VC1/3 */
-#define SH_XNNI0_VCSWITCH_FLOW_MD_VCFIFO_SWITCH_SHFT 16
-#define SH_XNNI0_VCSWITCH_FLOW_MD_VCFIFO_SWITCH_MASK 0x0000000000010000
-
-/* SH_XNNI0_VCSWITCH_FLOW_IILB_VCFIFO_SWITCH */
-/* Description: Swap VC0/2 with VC1/3 */
-#define SH_XNNI0_VCSWITCH_FLOW_IILB_VCFIFO_SWITCH_SHFT 24
-#define SH_XNNI0_VCSWITCH_FLOW_IILB_VCFIFO_SWITCH_MASK 0x0000000001000000
-
-/* SH_XNNI0_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_IN */
-#define SH_XNNI0_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_IN_SHFT 32
-#define SH_XNNI0_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_IN_MASK 0x0000000100000000
-
-/* SH_XNNI0_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_OUT */
-#define SH_XNNI0_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_OUT_SHFT 33
-#define SH_XNNI0_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_OUT_MASK 0x0000000200000000
-
-/* SH_XNNI0_VCSWITCH_FLOW_ASYNC_FIFOES */
-#define SH_XNNI0_VCSWITCH_FLOW_ASYNC_FIFOES_SHFT 34
-#define SH_XNNI0_VCSWITCH_FLOW_ASYNC_FIFOES_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_TIMER_REG" */
-/* ==================================================================== */
-
-#define SH_XNNI0_TIMER_REG 0x00000001500303b0
-#define SH_XNNI0_TIMER_REG_MASK 0x0000000100ffffff
-#define SH_XNNI0_TIMER_REG_INIT 0x0000000000ffffff
-
-/* SH_XNNI0_TIMER_REG_TIMEOUT_REG */
-/* Description: Master Timeout Counter */
-#define SH_XNNI0_TIMER_REG_TIMEOUT_REG_SHFT 0
-#define SH_XNNI0_TIMER_REG_TIMEOUT_REG_MASK 0x0000000000ffffff
-
-/* SH_XNNI0_TIMER_REG_LINKCLEANUP_REG */
-/* Description: Link Clean Up */
-#define SH_XNNI0_TIMER_REG_LINKCLEANUP_REG_SHFT 32
-#define SH_XNNI0_TIMER_REG_LINKCLEANUP_REG_MASK 0x0000000100000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_FIFO02_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_FIFO02_FLOW 0x00000001500303c0
-#define SH_XNNI0_FIFO02_FLOW_MASK 0x00000f0f0f0f0f0f
-#define SH_XNNI0_FIFO02_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_FIFO02_FLOW_COUNT_VC0_LIMIT */
-/* Description: limit reg zero disables functionality */
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC0_LIMIT_SHFT 0
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC0_LIMIT_MASK 0x000000000000000f
-
-/* SH_XNNI0_FIFO02_FLOW_COUNT_VC0_DYN */
-/* Description: dynamic counter value */
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC0_DYN_SHFT 8
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC0_DYN_MASK 0x0000000000000f00
-
-/* SH_XNNI0_FIFO02_FLOW_COUNT_VC0_CAP */
-/* Description: captured counter value */
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC0_CAP_SHFT 16
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC0_CAP_MASK 0x00000000000f0000
-
-/* SH_XNNI0_FIFO02_FLOW_COUNT_VC2_LIMIT */
-/* Description: limit reg zero disables functionality */
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC2_LIMIT_SHFT 24
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC2_LIMIT_MASK 0x000000000f000000
-
-/* SH_XNNI0_FIFO02_FLOW_COUNT_VC2_DYN */
-/* Description: counter dynamic value */
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC2_DYN_SHFT 32
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC2_DYN_MASK 0x0000000f00000000
-
-/* SH_XNNI0_FIFO02_FLOW_COUNT_VC2_CAP */
-/* Description: captured counter value */
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC2_CAP_SHFT 40
-#define SH_XNNI0_FIFO02_FLOW_COUNT_VC2_CAP_MASK 0x00000f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_FIFO13_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_FIFO13_FLOW 0x00000001500303d0
-#define SH_XNNI0_FIFO13_FLOW_MASK 0x00000f0f0f0f0f0f
-#define SH_XNNI0_FIFO13_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_FIFO13_FLOW_COUNT_VC1_LIMIT */
-/* Description: limit reg zero disables functionality */
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC1_LIMIT_SHFT 0
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC1_LIMIT_MASK 0x000000000000000f
-
-/* SH_XNNI0_FIFO13_FLOW_COUNT_VC1_DYN */
-/* Description: dynamic counter value */
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC1_DYN_SHFT 8
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC1_DYN_MASK 0x0000000000000f00
-
-/* SH_XNNI0_FIFO13_FLOW_COUNT_VC1_CAP */
-/* Description: captured counter value */
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC1_CAP_SHFT 16
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC1_CAP_MASK 0x00000000000f0000
-
-/* SH_XNNI0_FIFO13_FLOW_COUNT_VC3_LIMIT */
-/* Description: limit reg zero disables functionality */
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC3_LIMIT_SHFT 24
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC3_LIMIT_MASK 0x000000000f000000
-
-/* SH_XNNI0_FIFO13_FLOW_COUNT_VC3_DYN */
-/* Description: counter dynamic value */
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC3_DYN_SHFT 32
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC3_DYN_MASK 0x0000000f00000000
-
-/* SH_XNNI0_FIFO13_FLOW_COUNT_VC3_CAP */
-/* Description: captured counter value */
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC3_CAP_SHFT 40
-#define SH_XNNI0_FIFO13_FLOW_COUNT_VC3_CAP_MASK 0x00000f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_NI_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_NI_FLOW 0x00000001500303e0
-#define SH_XNNI0_NI_FLOW_MASK 0xff0fff0fff0fff0f
-#define SH_XNNI0_NI_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_NI_FLOW_VC0_LIMIT */
-/* Description: vc0 limit reg, zero disables functionality */
-#define SH_XNNI0_NI_FLOW_VC0_LIMIT_SHFT 0
-#define SH_XNNI0_NI_FLOW_VC0_LIMIT_MASK 0x000000000000000f
-
-/* SH_XNNI0_NI_FLOW_VC0_DYN */
-/* Description: vc0 counter dynamic value */
-#define SH_XNNI0_NI_FLOW_VC0_DYN_SHFT 8
-#define SH_XNNI0_NI_FLOW_VC0_DYN_MASK 0x0000000000000f00
-
-/* SH_XNNI0_NI_FLOW_VC0_CAP */
-/* Description: vc0 counter captured value */
-#define SH_XNNI0_NI_FLOW_VC0_CAP_SHFT 12
-#define SH_XNNI0_NI_FLOW_VC0_CAP_MASK 0x000000000000f000
-
-/* SH_XNNI0_NI_FLOW_VC1_LIMIT */
-/* Description: vc1 limit reg, zero disables functionality */
-#define SH_XNNI0_NI_FLOW_VC1_LIMIT_SHFT 16
-#define SH_XNNI0_NI_FLOW_VC1_LIMIT_MASK 0x00000000000f0000
-
-/* SH_XNNI0_NI_FLOW_VC1_DYN */
-/* Description: vc1 counter dynamic value */
-#define SH_XNNI0_NI_FLOW_VC1_DYN_SHFT 24
-#define SH_XNNI0_NI_FLOW_VC1_DYN_MASK 0x000000000f000000
-
-/* SH_XNNI0_NI_FLOW_VC1_CAP */
-/* Description: vc1 counter captured value */
-#define SH_XNNI0_NI_FLOW_VC1_CAP_SHFT 28
-#define SH_XNNI0_NI_FLOW_VC1_CAP_MASK 0x00000000f0000000
-
-/* SH_XNNI0_NI_FLOW_VC2_LIMIT */
-/* Description: vc2 limit reg, zero disables functionality */
-#define SH_XNNI0_NI_FLOW_VC2_LIMIT_SHFT 32
-#define SH_XNNI0_NI_FLOW_VC2_LIMIT_MASK 0x0000000f00000000
-
-/* SH_XNNI0_NI_FLOW_VC2_DYN */
-/* Description: vc2 counter dynamic value */
-#define SH_XNNI0_NI_FLOW_VC2_DYN_SHFT 40
-#define SH_XNNI0_NI_FLOW_VC2_DYN_MASK 0x00000f0000000000
-
-/* SH_XNNI0_NI_FLOW_VC2_CAP */
-/* Description: vc2 counter captured value */
-#define SH_XNNI0_NI_FLOW_VC2_CAP_SHFT 44
-#define SH_XNNI0_NI_FLOW_VC2_CAP_MASK 0x0000f00000000000
-
-/* SH_XNNI0_NI_FLOW_VC3_LIMIT */
-/* Description: vc3 limit reg, zero disables functionality */
-#define SH_XNNI0_NI_FLOW_VC3_LIMIT_SHFT 48
-#define SH_XNNI0_NI_FLOW_VC3_LIMIT_MASK 0x000f000000000000
-
-/* SH_XNNI0_NI_FLOW_VC3_DYN */
-/* Description: vc3 counter dynamic value */
-#define SH_XNNI0_NI_FLOW_VC3_DYN_SHFT 56
-#define SH_XNNI0_NI_FLOW_VC3_DYN_MASK 0x0f00000000000000
-
-/* SH_XNNI0_NI_FLOW_VC3_CAP */
-/* Description: vc3 counter captured value */
-#define SH_XNNI0_NI_FLOW_VC3_CAP_SHFT 60
-#define SH_XNNI0_NI_FLOW_VC3_CAP_MASK 0xf000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_DEAD_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI0_DEAD_FLOW 0x00000001500303f0
-#define SH_XNNI0_DEAD_FLOW_MASK 0xff0fff0fff0fff0f
-#define SH_XNNI0_DEAD_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI0_DEAD_FLOW_VC0_LIMIT */
-/* Description: vc0 limit reg, zero disables functionality */
-#define SH_XNNI0_DEAD_FLOW_VC0_LIMIT_SHFT 0
-#define SH_XNNI0_DEAD_FLOW_VC0_LIMIT_MASK 0x000000000000000f
-
-/* SH_XNNI0_DEAD_FLOW_VC0_DYN */
-/* Description: vc0 counter dynamic value */
-#define SH_XNNI0_DEAD_FLOW_VC0_DYN_SHFT 8
-#define SH_XNNI0_DEAD_FLOW_VC0_DYN_MASK 0x0000000000000f00
-
-/* SH_XNNI0_DEAD_FLOW_VC0_CAP */
-/* Description: vc0 counter captured value */
-#define SH_XNNI0_DEAD_FLOW_VC0_CAP_SHFT 12
-#define SH_XNNI0_DEAD_FLOW_VC0_CAP_MASK 0x000000000000f000
-
-/* SH_XNNI0_DEAD_FLOW_VC1_LIMIT */
-/* Description: vc1 limit reg, zero disables functionality */
-#define SH_XNNI0_DEAD_FLOW_VC1_LIMIT_SHFT 16
-#define SH_XNNI0_DEAD_FLOW_VC1_LIMIT_MASK 0x00000000000f0000
-
-/* SH_XNNI0_DEAD_FLOW_VC1_DYN */
-/* Description: vc1 counter dynamic value */
-#define SH_XNNI0_DEAD_FLOW_VC1_DYN_SHFT 24
-#define SH_XNNI0_DEAD_FLOW_VC1_DYN_MASK 0x000000000f000000
-
-/* SH_XNNI0_DEAD_FLOW_VC1_CAP */
-/* Description: vc1 counter captured value */
-#define SH_XNNI0_DEAD_FLOW_VC1_CAP_SHFT 28
-#define SH_XNNI0_DEAD_FLOW_VC1_CAP_MASK 0x00000000f0000000
-
-/* SH_XNNI0_DEAD_FLOW_VC2_LIMIT */
-/* Description: vc2 limit reg, zero disables functionality */
-#define SH_XNNI0_DEAD_FLOW_VC2_LIMIT_SHFT 32
-#define SH_XNNI0_DEAD_FLOW_VC2_LIMIT_MASK 0x0000000f00000000
-
-/* SH_XNNI0_DEAD_FLOW_VC2_DYN */
-/* Description: vc2 counter dynamic value */
-#define SH_XNNI0_DEAD_FLOW_VC2_DYN_SHFT 40
-#define SH_XNNI0_DEAD_FLOW_VC2_DYN_MASK 0x00000f0000000000
-
-/* SH_XNNI0_DEAD_FLOW_VC2_CAP */
-/* Description: vc2 counter captured value */
-#define SH_XNNI0_DEAD_FLOW_VC2_CAP_SHFT 44
-#define SH_XNNI0_DEAD_FLOW_VC2_CAP_MASK 0x0000f00000000000
-
-/* SH_XNNI0_DEAD_FLOW_VC3_LIMIT */
-/* Description: vc3 limit reg, zero disables functionality */
-#define SH_XNNI0_DEAD_FLOW_VC3_LIMIT_SHFT 48
-#define SH_XNNI0_DEAD_FLOW_VC3_LIMIT_MASK 0x000f000000000000
-
-/* SH_XNNI0_DEAD_FLOW_VC3_DYN */
-/* Description: vc3 counter dynamic value */
-#define SH_XNNI0_DEAD_FLOW_VC3_DYN_SHFT 56
-#define SH_XNNI0_DEAD_FLOW_VC3_DYN_MASK 0x0f00000000000000
-
-/* SH_XNNI0_DEAD_FLOW_VC3_CAP */
-/* Description: vc3 counter captured value */
-#define SH_XNNI0_DEAD_FLOW_VC3_CAP_SHFT 60
-#define SH_XNNI0_DEAD_FLOW_VC3_CAP_MASK 0xf000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_INJECT_AGE" */
-/* ==================================================================== */
-
-#define SH_XNNI0_INJECT_AGE 0x0000000150030400
-#define SH_XNNI0_INJECT_AGE_MASK 0x000000000000ffff
-#define SH_XNNI0_INJECT_AGE_INIT 0x0000000000000000
-
-/* SH_XNNI0_INJECT_AGE_REQUEST_INJECT */
-/* Description: Value of AGE field for outgoing requests */
-#define SH_XNNI0_INJECT_AGE_REQUEST_INJECT_SHFT 0
-#define SH_XNNI0_INJECT_AGE_REQUEST_INJECT_MASK 0x00000000000000ff
-
-/* SH_XNNI0_INJECT_AGE_REPLY_INJECT */
-/* Description: Value of AGE field for outgoing replies */
-#define SH_XNNI0_INJECT_AGE_REPLY_INJECT_SHFT 8
-#define SH_XNNI0_INJECT_AGE_REPLY_INJECT_MASK 0x000000000000ff00
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT 0x0000000150030500
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_MASK 0x7f7f007f7f00bfbf
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_INIT 0x0000000000000000
-
-/* SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_DYN_SHFT 24
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_CAP_SHFT 32
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_DYN_SHFT 48
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_CAP_SHFT 56
-#define SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT 0x0000000150030510
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_MASK 0x7f7f007f7f00bfbf
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_INIT 0x0000000000000000
-
-/* SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_DYN_SHFT 24
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_CAP_SHFT 32
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_DYN_SHFT 48
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_CAP_SHFT 56
-#define SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT 0x0000000150030520
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_MASK 0x7f7f007f7f00bfbf
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_INIT 0x0000000000000000
-
-/* SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_WITHHOLD_SHFT 8
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x0000000000003f00
-
-/* SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 15
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000008000
-
-/* SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_DYN */
-/* Description: vc0 debit dynamic value */
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_DYN_SHFT 24
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_DYN_MASK 0x000000007f000000
-
-/* SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_CAP */
-/* Description: vc0 debit captured value */
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_CAP_SHFT 32
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC0_CAP_MASK 0x0000007f00000000
-
-/* SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_DYN */
-/* Description: vc2 debit dynamic value */
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_DYN_SHFT 48
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_DYN_MASK 0x007f000000000000
-
-/* SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_CAP */
-/* Description: vc2 debit captured value */
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_CAP_SHFT 56
-#define SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT_VC2_CAP_MASK 0x7f00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT 0x0000000150030530
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_MASK 0x00007f7f7f7f7f7f
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_INIT 0x000000000c00000c
-
-/* SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 0
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x000000000000007f
-
-/* SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 8
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x0000000000007f00
-
-/* SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 16
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x00000000007f0000
-
-/* SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 24
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x000000007f000000
-
-/* SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 32
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x0000007f00000000
-
-/* SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 40
-#define SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x00007f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT 0x0000000150030540
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_MASK 0x00007f7f7f7f7f7f
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_INIT 0x000000000c00000c
-
-/* SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 0
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x000000000000007f
-
-/* SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 8
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x0000000000007f00
-
-/* SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 16
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x00000000007f0000
-
-/* SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 24
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x000000007f000000
-
-/* SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 32
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x0000007f00000000
-
-/* SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 40
-#define SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x00007f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT 0x0000000150030550
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_MASK 0x00007f7f7f7f7f7f
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_INIT 0x000000000c00000c
-
-/* SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC0_TEST */
-/* Description: vc0 credit_test */
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC0_TEST_SHFT 0
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC0_TEST_MASK 0x000000000000007f
-
-/* SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC0_DYN */
-/* Description: vc0 credit dynamic value */
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC0_DYN_SHFT 8
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC0_DYN_MASK 0x0000000000007f00
-
-/* SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC0_CAP */
-/* Description: vc0 credit captured value */
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC0_CAP_SHFT 16
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC0_CAP_MASK 0x00000000007f0000
-
-/* SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC2_TEST */
-/* Description: vc2 credit_test */
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC2_TEST_SHFT 24
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC2_TEST_MASK 0x000000007f000000
-
-/* SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC2_DYN */
-/* Description: vc2 credit dynamic value */
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC2_DYN_SHFT 32
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC2_DYN_MASK 0x0000007f00000000
-
-/* SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC2_CAP */
-/* Description: vc2 credit captured value */
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC2_CAP_SHFT 40
-#define SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT_VC2_CAP_MASK 0x00007f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_0_INTRANI_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_0_INTRANI_FLOW 0x0000000150030560
-#define SH_XNNI1_0_INTRANI_FLOW_MASK 0x00000000000000bf
-#define SH_XNNI1_0_INTRANI_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_0_INTRANI_FLOW_DEBIT_VC0_WITHHOLD */
-/* Description: vc0 withhold */
-#define SH_XNNI1_0_INTRANI_FLOW_DEBIT_VC0_WITHHOLD_SHFT 0
-#define SH_XNNI1_0_INTRANI_FLOW_DEBIT_VC0_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_0_INTRANI_FLOW_DEBIT_VC0_FORCE_CRED */
-/* Description: Force Credit on VC0 from debit cntr */
-#define SH_XNNI1_0_INTRANI_FLOW_DEBIT_VC0_FORCE_CRED_SHFT 7
-#define SH_XNNI1_0_INTRANI_FLOW_DEBIT_VC0_FORCE_CRED_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_1_INTRANI_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_1_INTRANI_FLOW 0x0000000150030570
-#define SH_XNNI1_1_INTRANI_FLOW_MASK 0x00000000000000bf
-#define SH_XNNI1_1_INTRANI_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_1_INTRANI_FLOW_DEBIT_VC1_WITHHOLD */
-/* Description: vc1 withhold */
-#define SH_XNNI1_1_INTRANI_FLOW_DEBIT_VC1_WITHHOLD_SHFT 0
-#define SH_XNNI1_1_INTRANI_FLOW_DEBIT_VC1_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_1_INTRANI_FLOW_DEBIT_VC1_FORCE_CRED */
-/* Description: Force Credit on VC1 from debit cntr */
-#define SH_XNNI1_1_INTRANI_FLOW_DEBIT_VC1_FORCE_CRED_SHFT 7
-#define SH_XNNI1_1_INTRANI_FLOW_DEBIT_VC1_FORCE_CRED_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_2_INTRANI_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_2_INTRANI_FLOW 0x0000000150030580
-#define SH_XNNI1_2_INTRANI_FLOW_MASK 0x00000000000000bf
-#define SH_XNNI1_2_INTRANI_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_2_INTRANI_FLOW_DEBIT_VC2_WITHHOLD */
-/* Description: vc2 withhold */
-#define SH_XNNI1_2_INTRANI_FLOW_DEBIT_VC2_WITHHOLD_SHFT 0
-#define SH_XNNI1_2_INTRANI_FLOW_DEBIT_VC2_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_2_INTRANI_FLOW_DEBIT_VC2_FORCE_CRED */
-/* Description: Force Credit on VC2 from debit cntr */
-#define SH_XNNI1_2_INTRANI_FLOW_DEBIT_VC2_FORCE_CRED_SHFT 7
-#define SH_XNNI1_2_INTRANI_FLOW_DEBIT_VC2_FORCE_CRED_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_3_INTRANI_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_3_INTRANI_FLOW 0x0000000150030590
-#define SH_XNNI1_3_INTRANI_FLOW_MASK 0x00000000000000bf
-#define SH_XNNI1_3_INTRANI_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_3_INTRANI_FLOW_DEBIT_VC3_WITHHOLD */
-/* Description: vc3 withhold */
-#define SH_XNNI1_3_INTRANI_FLOW_DEBIT_VC3_WITHHOLD_SHFT 0
-#define SH_XNNI1_3_INTRANI_FLOW_DEBIT_VC3_WITHHOLD_MASK 0x000000000000003f
-
-/* SH_XNNI1_3_INTRANI_FLOW_DEBIT_VC3_FORCE_CRED */
-/* Description: Force Credit on VC3 from debit cntr */
-#define SH_XNNI1_3_INTRANI_FLOW_DEBIT_VC3_FORCE_CRED_SHFT 7
-#define SH_XNNI1_3_INTRANI_FLOW_DEBIT_VC3_FORCE_CRED_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_VCSWITCH_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_VCSWITCH_FLOW 0x00000001500305a0
-#define SH_XNNI1_VCSWITCH_FLOW_MASK 0x0000000701010101
-#define SH_XNNI1_VCSWITCH_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_VCSWITCH_FLOW_NI_VCFIFO_DATELINE_SWITCH */
-/* Description: Swap VC0/2 with VC1/3 */
-#define SH_XNNI1_VCSWITCH_FLOW_NI_VCFIFO_DATELINE_SWITCH_SHFT 0
-#define SH_XNNI1_VCSWITCH_FLOW_NI_VCFIFO_DATELINE_SWITCH_MASK 0x0000000000000001
-
-/* SH_XNNI1_VCSWITCH_FLOW_PI_VCFIFO_SWITCH */
-/* Description: Swap VC0/2 with VC1/3 */
-#define SH_XNNI1_VCSWITCH_FLOW_PI_VCFIFO_SWITCH_SHFT 8
-#define SH_XNNI1_VCSWITCH_FLOW_PI_VCFIFO_SWITCH_MASK 0x0000000000000100
-
-/* SH_XNNI1_VCSWITCH_FLOW_MD_VCFIFO_SWITCH */
-/* Description: Swap VC0/2 with VC1/3 */
-#define SH_XNNI1_VCSWITCH_FLOW_MD_VCFIFO_SWITCH_SHFT 16
-#define SH_XNNI1_VCSWITCH_FLOW_MD_VCFIFO_SWITCH_MASK 0x0000000000010000
-
-/* SH_XNNI1_VCSWITCH_FLOW_IILB_VCFIFO_SWITCH */
-/* Description: Swap VC0/2 with VC1/3 */
-#define SH_XNNI1_VCSWITCH_FLOW_IILB_VCFIFO_SWITCH_SHFT 24
-#define SH_XNNI1_VCSWITCH_FLOW_IILB_VCFIFO_SWITCH_MASK 0x0000000001000000
-
-/* SH_XNNI1_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_IN */
-#define SH_XNNI1_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_IN_SHFT 32
-#define SH_XNNI1_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_IN_MASK 0x0000000100000000
-
-/* SH_XNNI1_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_OUT */
-#define SH_XNNI1_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_OUT_SHFT 33
-#define SH_XNNI1_VCSWITCH_FLOW_DISABLE_SYNC_BYPASS_OUT_MASK 0x0000000200000000
-
-/* SH_XNNI1_VCSWITCH_FLOW_ASYNC_FIFOES */
-#define SH_XNNI1_VCSWITCH_FLOW_ASYNC_FIFOES_SHFT 34
-#define SH_XNNI1_VCSWITCH_FLOW_ASYNC_FIFOES_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_TIMER_REG" */
-/* ==================================================================== */
-
-#define SH_XNNI1_TIMER_REG 0x00000001500305b0
-#define SH_XNNI1_TIMER_REG_MASK 0x0000000100ffffff
-#define SH_XNNI1_TIMER_REG_INIT 0x0000000000ffffff
-
-/* SH_XNNI1_TIMER_REG_TIMEOUT_REG */
-/* Description: Master Timeout Counter */
-#define SH_XNNI1_TIMER_REG_TIMEOUT_REG_SHFT 0
-#define SH_XNNI1_TIMER_REG_TIMEOUT_REG_MASK 0x0000000000ffffff
-
-/* SH_XNNI1_TIMER_REG_LINKCLEANUP_REG */
-/* Description: Link Clean Up */
-#define SH_XNNI1_TIMER_REG_LINKCLEANUP_REG_SHFT 32
-#define SH_XNNI1_TIMER_REG_LINKCLEANUP_REG_MASK 0x0000000100000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_FIFO02_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_FIFO02_FLOW 0x00000001500305c0
-#define SH_XNNI1_FIFO02_FLOW_MASK 0x00000f0f0f0f0f0f
-#define SH_XNNI1_FIFO02_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_FIFO02_FLOW_COUNT_VC0_LIMIT */
-/* Description: limit reg zero disables functionality */
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC0_LIMIT_SHFT 0
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC0_LIMIT_MASK 0x000000000000000f
-
-/* SH_XNNI1_FIFO02_FLOW_COUNT_VC0_DYN */
-/* Description: dynamic counter value */
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC0_DYN_SHFT 8
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC0_DYN_MASK 0x0000000000000f00
-
-/* SH_XNNI1_FIFO02_FLOW_COUNT_VC0_CAP */
-/* Description: captured counter value */
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC0_CAP_SHFT 16
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC0_CAP_MASK 0x00000000000f0000
-
-/* SH_XNNI1_FIFO02_FLOW_COUNT_VC2_LIMIT */
-/* Description: limit reg zero disables functionality */
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC2_LIMIT_SHFT 24
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC2_LIMIT_MASK 0x000000000f000000
-
-/* SH_XNNI1_FIFO02_FLOW_COUNT_VC2_DYN */
-/* Description: counter dynamic value */
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC2_DYN_SHFT 32
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC2_DYN_MASK 0x0000000f00000000
-
-/* SH_XNNI1_FIFO02_FLOW_COUNT_VC2_CAP */
-/* Description: captured counter value */
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC2_CAP_SHFT 40
-#define SH_XNNI1_FIFO02_FLOW_COUNT_VC2_CAP_MASK 0x00000f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_FIFO13_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_FIFO13_FLOW 0x00000001500305d0
-#define SH_XNNI1_FIFO13_FLOW_MASK 0x00000f0f0f0f0f0f
-#define SH_XNNI1_FIFO13_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_FIFO13_FLOW_COUNT_VC1_LIMIT */
-/* Description: limit reg zero disables functionality */
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC1_LIMIT_SHFT 0
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC1_LIMIT_MASK 0x000000000000000f
-
-/* SH_XNNI1_FIFO13_FLOW_COUNT_VC1_DYN */
-/* Description: dynamic counter value */
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC1_DYN_SHFT 8
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC1_DYN_MASK 0x0000000000000f00
-
-/* SH_XNNI1_FIFO13_FLOW_COUNT_VC1_CAP */
-/* Description: captured counter value */
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC1_CAP_SHFT 16
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC1_CAP_MASK 0x00000000000f0000
-
-/* SH_XNNI1_FIFO13_FLOW_COUNT_VC3_LIMIT */
-/* Description: limit reg zero disables functionality */
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC3_LIMIT_SHFT 24
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC3_LIMIT_MASK 0x000000000f000000
-
-/* SH_XNNI1_FIFO13_FLOW_COUNT_VC3_DYN */
-/* Description: counter dynamic value */
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC3_DYN_SHFT 32
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC3_DYN_MASK 0x0000000f00000000
-
-/* SH_XNNI1_FIFO13_FLOW_COUNT_VC3_CAP */
-/* Description: captured counter value */
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC3_CAP_SHFT 40
-#define SH_XNNI1_FIFO13_FLOW_COUNT_VC3_CAP_MASK 0x00000f0000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_NI_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_NI_FLOW 0x00000001500305e0
-#define SH_XNNI1_NI_FLOW_MASK 0xff0fff0fff0fff0f
-#define SH_XNNI1_NI_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_NI_FLOW_VC0_LIMIT */
-/* Description: vc0 limit reg, zero disables functionality */
-#define SH_XNNI1_NI_FLOW_VC0_LIMIT_SHFT 0
-#define SH_XNNI1_NI_FLOW_VC0_LIMIT_MASK 0x000000000000000f
-
-/* SH_XNNI1_NI_FLOW_VC0_DYN */
-/* Description: vc0 counter dynamic value */
-#define SH_XNNI1_NI_FLOW_VC0_DYN_SHFT 8
-#define SH_XNNI1_NI_FLOW_VC0_DYN_MASK 0x0000000000000f00
-
-/* SH_XNNI1_NI_FLOW_VC0_CAP */
-/* Description: vc0 counter captured value */
-#define SH_XNNI1_NI_FLOW_VC0_CAP_SHFT 12
-#define SH_XNNI1_NI_FLOW_VC0_CAP_MASK 0x000000000000f000
-
-/* SH_XNNI1_NI_FLOW_VC1_LIMIT */
-/* Description: vc1 limit reg, zero disables functionality */
-#define SH_XNNI1_NI_FLOW_VC1_LIMIT_SHFT 16
-#define SH_XNNI1_NI_FLOW_VC1_LIMIT_MASK 0x00000000000f0000
-
-/* SH_XNNI1_NI_FLOW_VC1_DYN */
-/* Description: vc1 counter dynamic value */
-#define SH_XNNI1_NI_FLOW_VC1_DYN_SHFT 24
-#define SH_XNNI1_NI_FLOW_VC1_DYN_MASK 0x000000000f000000
-
-/* SH_XNNI1_NI_FLOW_VC1_CAP */
-/* Description: vc1 counter captured value */
-#define SH_XNNI1_NI_FLOW_VC1_CAP_SHFT 28
-#define SH_XNNI1_NI_FLOW_VC1_CAP_MASK 0x00000000f0000000
-
-/* SH_XNNI1_NI_FLOW_VC2_LIMIT */
-/* Description: vc2 limit reg, zero disables functionality */
-#define SH_XNNI1_NI_FLOW_VC2_LIMIT_SHFT 32
-#define SH_XNNI1_NI_FLOW_VC2_LIMIT_MASK 0x0000000f00000000
-
-/* SH_XNNI1_NI_FLOW_VC2_DYN */
-/* Description: vc2 counter dynamic value */
-#define SH_XNNI1_NI_FLOW_VC2_DYN_SHFT 40
-#define SH_XNNI1_NI_FLOW_VC2_DYN_MASK 0x00000f0000000000
-
-/* SH_XNNI1_NI_FLOW_VC2_CAP */
-/* Description: vc2 counter captured value */
-#define SH_XNNI1_NI_FLOW_VC2_CAP_SHFT 44
-#define SH_XNNI1_NI_FLOW_VC2_CAP_MASK 0x0000f00000000000
-
-/* SH_XNNI1_NI_FLOW_VC3_LIMIT */
-/* Description: vc3 limit reg, zero disables functionality */
-#define SH_XNNI1_NI_FLOW_VC3_LIMIT_SHFT 48
-#define SH_XNNI1_NI_FLOW_VC3_LIMIT_MASK 0x000f000000000000
-
-/* SH_XNNI1_NI_FLOW_VC3_DYN */
-/* Description: vc3 counter dynamic value */
-#define SH_XNNI1_NI_FLOW_VC3_DYN_SHFT 56
-#define SH_XNNI1_NI_FLOW_VC3_DYN_MASK 0x0f00000000000000
-
-/* SH_XNNI1_NI_FLOW_VC3_CAP */
-/* Description: vc3 counter captured value */
-#define SH_XNNI1_NI_FLOW_VC3_CAP_SHFT 60
-#define SH_XNNI1_NI_FLOW_VC3_CAP_MASK 0xf000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_DEAD_FLOW" */
-/* ==================================================================== */
-
-#define SH_XNNI1_DEAD_FLOW 0x00000001500305f0
-#define SH_XNNI1_DEAD_FLOW_MASK 0xff0fff0fff0fff0f
-#define SH_XNNI1_DEAD_FLOW_INIT 0x0000000000000000
-
-/* SH_XNNI1_DEAD_FLOW_VC0_LIMIT */
-/* Description: vc0 limit reg, zero disables functionality */
-#define SH_XNNI1_DEAD_FLOW_VC0_LIMIT_SHFT 0
-#define SH_XNNI1_DEAD_FLOW_VC0_LIMIT_MASK 0x000000000000000f
-
-/* SH_XNNI1_DEAD_FLOW_VC0_DYN */
-/* Description: vc0 counter dynamic value */
-#define SH_XNNI1_DEAD_FLOW_VC0_DYN_SHFT 8
-#define SH_XNNI1_DEAD_FLOW_VC0_DYN_MASK 0x0000000000000f00
-
-/* SH_XNNI1_DEAD_FLOW_VC0_CAP */
-/* Description: vc0 counter captured value */
-#define SH_XNNI1_DEAD_FLOW_VC0_CAP_SHFT 12
-#define SH_XNNI1_DEAD_FLOW_VC0_CAP_MASK 0x000000000000f000
-
-/* SH_XNNI1_DEAD_FLOW_VC1_LIMIT */
-/* Description: vc1 limit reg, zero disables functionality */
-#define SH_XNNI1_DEAD_FLOW_VC1_LIMIT_SHFT 16
-#define SH_XNNI1_DEAD_FLOW_VC1_LIMIT_MASK 0x00000000000f0000
-
-/* SH_XNNI1_DEAD_FLOW_VC1_DYN */
-/* Description: vc1 counter dynamic value */
-#define SH_XNNI1_DEAD_FLOW_VC1_DYN_SHFT 24
-#define SH_XNNI1_DEAD_FLOW_VC1_DYN_MASK 0x000000000f000000
-
-/* SH_XNNI1_DEAD_FLOW_VC1_CAP */
-/* Description: vc1 counter captured value */
-#define SH_XNNI1_DEAD_FLOW_VC1_CAP_SHFT 28
-#define SH_XNNI1_DEAD_FLOW_VC1_CAP_MASK 0x00000000f0000000
-
-/* SH_XNNI1_DEAD_FLOW_VC2_LIMIT */
-/* Description: vc2 limit reg, zero disables functionality */
-#define SH_XNNI1_DEAD_FLOW_VC2_LIMIT_SHFT 32
-#define SH_XNNI1_DEAD_FLOW_VC2_LIMIT_MASK 0x0000000f00000000
-
-/* SH_XNNI1_DEAD_FLOW_VC2_DYN */
-/* Description: vc2 counter dynamic value */
-#define SH_XNNI1_DEAD_FLOW_VC2_DYN_SHFT 40
-#define SH_XNNI1_DEAD_FLOW_VC2_DYN_MASK 0x00000f0000000000
-
-/* SH_XNNI1_DEAD_FLOW_VC2_CAP */
-/* Description: vc2 counter captured value */
-#define SH_XNNI1_DEAD_FLOW_VC2_CAP_SHFT 44
-#define SH_XNNI1_DEAD_FLOW_VC2_CAP_MASK 0x0000f00000000000
-
-/* SH_XNNI1_DEAD_FLOW_VC3_LIMIT */
-/* Description: vc3 limit reg, zero disables functionality */
-#define SH_XNNI1_DEAD_FLOW_VC3_LIMIT_SHFT 48
-#define SH_XNNI1_DEAD_FLOW_VC3_LIMIT_MASK 0x000f000000000000
-
-/* SH_XNNI1_DEAD_FLOW_VC3_DYN */
-/* Description: vc3 counter dynamic value */
-#define SH_XNNI1_DEAD_FLOW_VC3_DYN_SHFT 56
-#define SH_XNNI1_DEAD_FLOW_VC3_DYN_MASK 0x0f00000000000000
-
-/* SH_XNNI1_DEAD_FLOW_VC3_CAP */
-/* Description: vc3 counter captured value */
-#define SH_XNNI1_DEAD_FLOW_VC3_CAP_SHFT 60
-#define SH_XNNI1_DEAD_FLOW_VC3_CAP_MASK 0xf000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_INJECT_AGE" */
-/* ==================================================================== */
-
-#define SH_XNNI1_INJECT_AGE 0x0000000150030600
-#define SH_XNNI1_INJECT_AGE_MASK 0x000000000000ffff
-#define SH_XNNI1_INJECT_AGE_INIT 0x0000000000000000
-
-/* SH_XNNI1_INJECT_AGE_REQUEST_INJECT */
-/* Description: Value of AGE field for outgoing requests */
-#define SH_XNNI1_INJECT_AGE_REQUEST_INJECT_SHFT 0
-#define SH_XNNI1_INJECT_AGE_REQUEST_INJECT_MASK 0x00000000000000ff
-
-/* SH_XNNI1_INJECT_AGE_REPLY_INJECT */
-/* Description: Value of AGE field for outgoing replies */
-#define SH_XNNI1_INJECT_AGE_REPLY_INJECT_SHFT 8
-#define SH_XNNI1_INJECT_AGE_REPLY_INJECT_MASK 0x000000000000ff00
-
-/* ==================================================================== */
-/* Register "SH_XN_DEBUG_SEL" */
-/* XN Debug Port Select */
-/* ==================================================================== */
-
-#define SH_XN_DEBUG_SEL 0x0000000150031000
-#define SH_XN_DEBUG_SEL_MASK 0xf777777777777777
-#define SH_XN_DEBUG_SEL_INIT 0x0000000000000000
-
-/* SH_XN_DEBUG_SEL_NIBBLE0_RLM_SEL */
-/* Description: Nibble 0 RLM select */
-#define SH_XN_DEBUG_SEL_NIBBLE0_RLM_SEL_SHFT 0
-#define SH_XN_DEBUG_SEL_NIBBLE0_RLM_SEL_MASK 0x0000000000000007
-
-/* SH_XN_DEBUG_SEL_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_XN_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_XN_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_XN_DEBUG_SEL_NIBBLE1_RLM_SEL */
-/* Description: Nibble 1 RLM select */
-#define SH_XN_DEBUG_SEL_NIBBLE1_RLM_SEL_SHFT 8
-#define SH_XN_DEBUG_SEL_NIBBLE1_RLM_SEL_MASK 0x0000000000000700
-
-/* SH_XN_DEBUG_SEL_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_XN_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_XN_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_XN_DEBUG_SEL_NIBBLE2_RLM_SEL */
-/* Description: Nibble 2 RLM select */
-#define SH_XN_DEBUG_SEL_NIBBLE2_RLM_SEL_SHFT 16
-#define SH_XN_DEBUG_SEL_NIBBLE2_RLM_SEL_MASK 0x0000000000070000
-
-/* SH_XN_DEBUG_SEL_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_XN_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_XN_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_XN_DEBUG_SEL_NIBBLE3_RLM_SEL */
-/* Description: Nibble 3 RLM select */
-#define SH_XN_DEBUG_SEL_NIBBLE3_RLM_SEL_SHFT 24
-#define SH_XN_DEBUG_SEL_NIBBLE3_RLM_SEL_MASK 0x0000000007000000
-
-/* SH_XN_DEBUG_SEL_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_XN_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_XN_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_XN_DEBUG_SEL_NIBBLE4_RLM_SEL */
-/* Description: Nibble 4 RLM select */
-#define SH_XN_DEBUG_SEL_NIBBLE4_RLM_SEL_SHFT 32
-#define SH_XN_DEBUG_SEL_NIBBLE4_RLM_SEL_MASK 0x0000000700000000
-
-/* SH_XN_DEBUG_SEL_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_XN_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_XN_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_XN_DEBUG_SEL_NIBBLE5_RLM_SEL */
-/* Description: Nibble 5 RLM select */
-#define SH_XN_DEBUG_SEL_NIBBLE5_RLM_SEL_SHFT 40
-#define SH_XN_DEBUG_SEL_NIBBLE5_RLM_SEL_MASK 0x0000070000000000
-
-/* SH_XN_DEBUG_SEL_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_XN_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_XN_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_XN_DEBUG_SEL_NIBBLE6_RLM_SEL */
-/* Description: Nibble 6 RLM select */
-#define SH_XN_DEBUG_SEL_NIBBLE6_RLM_SEL_SHFT 48
-#define SH_XN_DEBUG_SEL_NIBBLE6_RLM_SEL_MASK 0x0007000000000000
-
-/* SH_XN_DEBUG_SEL_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_XN_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_XN_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_XN_DEBUG_SEL_NIBBLE7_RLM_SEL */
-/* Description: Nibble 7 RLM select */
-#define SH_XN_DEBUG_SEL_NIBBLE7_RLM_SEL_SHFT 56
-#define SH_XN_DEBUG_SEL_NIBBLE7_RLM_SEL_MASK 0x0700000000000000
-
-/* SH_XN_DEBUG_SEL_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_XN_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_XN_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* SH_XN_DEBUG_SEL_TRIGGER_ENABLE */
-/* Description: Enable trigger on bit 32 of Analyzer data */
-#define SH_XN_DEBUG_SEL_TRIGGER_ENABLE_SHFT 63
-#define SH_XN_DEBUG_SEL_TRIGGER_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_DEBUG_TRIG_SEL" */
-/* XN Debug trigger Select */
-/* ==================================================================== */
-
-#define SH_XN_DEBUG_TRIG_SEL 0x0000000150031020
-#define SH_XN_DEBUG_TRIG_SEL_MASK 0x7777777777777777
-#define SH_XN_DEBUG_TRIG_SEL_INIT 0x0000000000000000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER0_RLM_SEL */
-/* Description: Nibble 0 RLM select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER0_RLM_SEL_SHFT 0
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER0_RLM_SEL_MASK 0x0000000000000007
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER0_NIBBLE_SEL_SHFT 4
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER1_RLM_SEL */
-/* Description: Nibble 1 RLM select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER1_RLM_SEL_SHFT 8
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER1_RLM_SEL_MASK 0x0000000000000700
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER1_NIBBLE_SEL_SHFT 12
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER2_RLM_SEL */
-/* Description: Nibble 2 RLM select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER2_RLM_SEL_SHFT 16
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER2_RLM_SEL_MASK 0x0000000000070000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER2_NIBBLE_SEL_SHFT 20
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER3_RLM_SEL */
-/* Description: Nibble 3 RLM select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER3_RLM_SEL_SHFT 24
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER3_RLM_SEL_MASK 0x0000000007000000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER3_NIBBLE_SEL_SHFT 28
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER4_RLM_SEL */
-/* Description: Nibble 4 RLM select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER4_RLM_SEL_SHFT 32
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER4_RLM_SEL_MASK 0x0000000700000000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER4_NIBBLE_SEL_SHFT 36
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER5_RLM_SEL */
-/* Description: Nibble 5 RLM select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER5_RLM_SEL_SHFT 40
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER5_RLM_SEL_MASK 0x0000070000000000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER5_NIBBLE_SEL_SHFT 44
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER6_RLM_SEL */
-/* Description: Nibble 6 RLM select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER6_RLM_SEL_SHFT 48
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER6_RLM_SEL_MASK 0x0007000000000000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER6_NIBBLE_SEL_SHFT 52
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER7_RLM_SEL */
-/* Description: Nibble 7 RLM select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER7_RLM_SEL_SHFT 56
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER7_RLM_SEL_MASK 0x0700000000000000
-
-/* SH_XN_DEBUG_TRIG_SEL_TRIGGER7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER7_NIBBLE_SEL_SHFT 60
-#define SH_XN_DEBUG_TRIG_SEL_TRIGGER7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_TRIGGER_COMPARE" */
-/* XN Debug Compare */
-/* ==================================================================== */
-
-#define SH_XN_TRIGGER_COMPARE 0x0000000150031040
-#define SH_XN_TRIGGER_COMPARE_MASK 0x00000000ffffffff
-#define SH_XN_TRIGGER_COMPARE_INIT 0x0000000000000000
-
-/* SH_XN_TRIGGER_COMPARE_MASK */
-/* Description: Mask to select Debug bits for trigger generation */
-#define SH_XN_TRIGGER_COMPARE_MASK_SHFT 0
-#define SH_XN_TRIGGER_COMPARE_MASK_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_TRIGGER_DATA" */
-/* XN Debug Compare Data */
-/* ==================================================================== */
-
-#define SH_XN_TRIGGER_DATA 0x0000000150031050
-#define SH_XN_TRIGGER_DATA_MASK 0x00000000ffffffff
-#define SH_XN_TRIGGER_DATA_INIT 0x00000000ffffffff
-
-/* SH_XN_TRIGGER_DATA_COMPARE_PATTERN */
-/* Description: debug bit pattern for trigger generation */
-#define SH_XN_TRIGGER_DATA_COMPARE_PATTERN_SHFT 0
-#define SH_XN_TRIGGER_DATA_COMPARE_PATTERN_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_DEBUG_SEL" */
-/* XN IILB Debug Port Select */
-/* ==================================================================== */
-
-#define SH_XN_IILB_DEBUG_SEL 0x0000000150031060
-#define SH_XN_IILB_DEBUG_SEL_MASK 0x7777777777777777
-#define SH_XN_IILB_DEBUG_SEL_INIT 0x0000000000000000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE0_INPUT_SEL */
-/* Description: Nibble 0 input select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE0_INPUT_SEL_SHFT 0
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE0_INPUT_SEL_MASK 0x0000000000000007
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE1_INPUT_SEL */
-/* Description: Nibble 1 input select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE1_INPUT_SEL_SHFT 8
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE1_INPUT_SEL_MASK 0x0000000000000700
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE2_INPUT_SEL */
-/* Description: Nibble 2 input select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE2_INPUT_SEL_SHFT 16
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE2_INPUT_SEL_MASK 0x0000000000070000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE3_INPUT_SEL */
-/* Description: Nibble 3 input select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE3_INPUT_SEL_SHFT 24
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE3_INPUT_SEL_MASK 0x0000000007000000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE4_INPUT_SEL */
-/* Description: Nibble 4 input select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE4_INPUT_SEL_SHFT 32
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE4_INPUT_SEL_MASK 0x0000000700000000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE5_INPUT_SEL */
-/* Description: Nibble 5 input select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE5_INPUT_SEL_SHFT 40
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE5_INPUT_SEL_MASK 0x0000070000000000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE6_INPUT_SEL */
-/* Description: Nibble 6 input select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE6_INPUT_SEL_SHFT 48
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE6_INPUT_SEL_MASK 0x0007000000000000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE7_INPUT_SEL */
-/* Description: Nibble 7 input select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE7_INPUT_SEL_SHFT 56
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE7_INPUT_SEL_MASK 0x0700000000000000
-
-/* SH_XN_IILB_DEBUG_SEL_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_XN_IILB_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_DEBUG_SEL" */
-/* XN PI Debug Port Select */
-/* ==================================================================== */
-
-#define SH_XN_PI_DEBUG_SEL 0x00000001500310a0
-#define SH_XN_PI_DEBUG_SEL_MASK 0x7777777777777777
-#define SH_XN_PI_DEBUG_SEL_INIT 0x0000000000000000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE0_INPUT_SEL */
-/* Description: Nibble 0 input select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE0_INPUT_SEL_SHFT 0
-#define SH_XN_PI_DEBUG_SEL_NIBBLE0_INPUT_SEL_MASK 0x0000000000000007
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_XN_PI_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE1_INPUT_SEL */
-/* Description: Nibble 1 input select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE1_INPUT_SEL_SHFT 8
-#define SH_XN_PI_DEBUG_SEL_NIBBLE1_INPUT_SEL_MASK 0x0000000000000700
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_XN_PI_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE2_INPUT_SEL */
-/* Description: Nibble 2 input select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE2_INPUT_SEL_SHFT 16
-#define SH_XN_PI_DEBUG_SEL_NIBBLE2_INPUT_SEL_MASK 0x0000000000070000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_XN_PI_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE3_INPUT_SEL */
-/* Description: Nibble 3 input select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE3_INPUT_SEL_SHFT 24
-#define SH_XN_PI_DEBUG_SEL_NIBBLE3_INPUT_SEL_MASK 0x0000000007000000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_XN_PI_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE4_INPUT_SEL */
-/* Description: Nibble 4 input select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE4_INPUT_SEL_SHFT 32
-#define SH_XN_PI_DEBUG_SEL_NIBBLE4_INPUT_SEL_MASK 0x0000000700000000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_XN_PI_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE5_INPUT_SEL */
-/* Description: Nibble 5 input select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE5_INPUT_SEL_SHFT 40
-#define SH_XN_PI_DEBUG_SEL_NIBBLE5_INPUT_SEL_MASK 0x0000070000000000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_XN_PI_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE6_INPUT_SEL */
-/* Description: Nibble 6 input select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE6_INPUT_SEL_SHFT 48
-#define SH_XN_PI_DEBUG_SEL_NIBBLE6_INPUT_SEL_MASK 0x0007000000000000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_XN_PI_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE7_INPUT_SEL */
-/* Description: Nibble 7 input select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE7_INPUT_SEL_SHFT 56
-#define SH_XN_PI_DEBUG_SEL_NIBBLE7_INPUT_SEL_MASK 0x0700000000000000
-
-/* SH_XN_PI_DEBUG_SEL_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_XN_PI_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_XN_PI_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_DEBUG_SEL" */
-/* XN MD Debug Port Select */
-/* ==================================================================== */
-
-#define SH_XN_MD_DEBUG_SEL 0x0000000150031080
-#define SH_XN_MD_DEBUG_SEL_MASK 0x7777777777777777
-#define SH_XN_MD_DEBUG_SEL_INIT 0x0000000000000000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE0_INPUT_SEL */
-/* Description: Nibble 0 input select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE0_INPUT_SEL_SHFT 0
-#define SH_XN_MD_DEBUG_SEL_NIBBLE0_INPUT_SEL_MASK 0x0000000000000007
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_XN_MD_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE1_INPUT_SEL */
-/* Description: Nibble 1 input select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE1_INPUT_SEL_SHFT 8
-#define SH_XN_MD_DEBUG_SEL_NIBBLE1_INPUT_SEL_MASK 0x0000000000000700
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_XN_MD_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE2_INPUT_SEL */
-/* Description: Nibble 2 input select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE2_INPUT_SEL_SHFT 16
-#define SH_XN_MD_DEBUG_SEL_NIBBLE2_INPUT_SEL_MASK 0x0000000000070000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_XN_MD_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE3_INPUT_SEL */
-/* Description: Nibble 3 input select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE3_INPUT_SEL_SHFT 24
-#define SH_XN_MD_DEBUG_SEL_NIBBLE3_INPUT_SEL_MASK 0x0000000007000000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_XN_MD_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE4_INPUT_SEL */
-/* Description: Nibble 4 input select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE4_INPUT_SEL_SHFT 32
-#define SH_XN_MD_DEBUG_SEL_NIBBLE4_INPUT_SEL_MASK 0x0000000700000000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_XN_MD_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE5_INPUT_SEL */
-/* Description: Nibble 5 input select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE5_INPUT_SEL_SHFT 40
-#define SH_XN_MD_DEBUG_SEL_NIBBLE5_INPUT_SEL_MASK 0x0000070000000000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_XN_MD_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE6_INPUT_SEL */
-/* Description: Nibble 6 input select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE6_INPUT_SEL_SHFT 48
-#define SH_XN_MD_DEBUG_SEL_NIBBLE6_INPUT_SEL_MASK 0x0007000000000000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_XN_MD_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE7_INPUT_SEL */
-/* Description: Nibble 7 input select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE7_INPUT_SEL_SHFT 56
-#define SH_XN_MD_DEBUG_SEL_NIBBLE7_INPUT_SEL_MASK 0x0700000000000000
-
-/* SH_XN_MD_DEBUG_SEL_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_XN_MD_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_XN_MD_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_DEBUG_SEL" */
-/* XN NI0 Debug Port Select */
-/* ==================================================================== */
-
-#define SH_XN_NI0_DEBUG_SEL 0x00000001500310c0
-#define SH_XN_NI0_DEBUG_SEL_MASK 0x7777777777777777
-#define SH_XN_NI0_DEBUG_SEL_INIT 0x0000000000000000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE0_INPUT_SEL */
-/* Description: Nibble 0 input select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE0_INPUT_SEL_SHFT 0
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE0_INPUT_SEL_MASK 0x0000000000000007
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE1_INPUT_SEL */
-/* Description: Nibble 1 input select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE1_INPUT_SEL_SHFT 8
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE1_INPUT_SEL_MASK 0x0000000000000700
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE2_INPUT_SEL */
-/* Description: Nibble 2 input select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE2_INPUT_SEL_SHFT 16
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE2_INPUT_SEL_MASK 0x0000000000070000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE3_INPUT_SEL */
-/* Description: Nibble 3 input select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE3_INPUT_SEL_SHFT 24
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE3_INPUT_SEL_MASK 0x0000000007000000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE4_INPUT_SEL */
-/* Description: Nibble 4 input select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE4_INPUT_SEL_SHFT 32
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE4_INPUT_SEL_MASK 0x0000000700000000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE5_INPUT_SEL */
-/* Description: Nibble 5 input select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE5_INPUT_SEL_SHFT 40
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE5_INPUT_SEL_MASK 0x0000070000000000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE6_INPUT_SEL */
-/* Description: Nibble 6 input select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE6_INPUT_SEL_SHFT 48
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE6_INPUT_SEL_MASK 0x0007000000000000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE7_INPUT_SEL */
-/* Description: Nibble 7 input select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE7_INPUT_SEL_SHFT 56
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE7_INPUT_SEL_MASK 0x0700000000000000
-
-/* SH_XN_NI0_DEBUG_SEL_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_XN_NI0_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_DEBUG_SEL" */
-/* XN NI1 Debug Port Select */
-/* ==================================================================== */
-
-#define SH_XN_NI1_DEBUG_SEL 0x00000001500310e0
-#define SH_XN_NI1_DEBUG_SEL_MASK 0x7777777777777777
-#define SH_XN_NI1_DEBUG_SEL_INIT 0x0000000000000000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE0_INPUT_SEL */
-/* Description: Nibble 0 input select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE0_INPUT_SEL_SHFT 0
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE0_INPUT_SEL_MASK 0x0000000000000007
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE1_INPUT_SEL */
-/* Description: Nibble 1 input select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE1_INPUT_SEL_SHFT 8
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE1_INPUT_SEL_MASK 0x0000000000000700
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE2_INPUT_SEL */
-/* Description: Nibble 2 input select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE2_INPUT_SEL_SHFT 16
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE2_INPUT_SEL_MASK 0x0000000000070000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE3_INPUT_SEL */
-/* Description: Nibble 3 input select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE3_INPUT_SEL_SHFT 24
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE3_INPUT_SEL_MASK 0x0000000007000000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE4_INPUT_SEL */
-/* Description: Nibble 4 input select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE4_INPUT_SEL_SHFT 32
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE4_INPUT_SEL_MASK 0x0000000700000000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE5_INPUT_SEL */
-/* Description: Nibble 5 input select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE5_INPUT_SEL_SHFT 40
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE5_INPUT_SEL_MASK 0x0000070000000000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE6_INPUT_SEL */
-/* Description: Nibble 6 input select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE6_INPUT_SEL_SHFT 48
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE6_INPUT_SEL_MASK 0x0007000000000000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE7_INPUT_SEL */
-/* Description: Nibble 7 input select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE7_INPUT_SEL_SHFT 56
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE7_INPUT_SEL_MASK 0x0700000000000000
-
-/* SH_XN_NI1_DEBUG_SEL_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_XN_NI1_DEBUG_SEL_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_LB_CMP_EXP_DATA0" */
-/* IILB compare LB input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_LB_CMP_EXP_DATA0 0x0000000150031100
-#define SH_XN_IILB_LB_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_LB_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_LB_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_IILB_LB_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_IILB_LB_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_LB_CMP_EXP_DATA1" */
-/* IILB compare LB input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_LB_CMP_EXP_DATA1 0x0000000150031110
-#define SH_XN_IILB_LB_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_LB_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_LB_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_IILB_LB_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_IILB_LB_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_LB_CMP_ENABLE0" */
-/* IILB compare LB input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_LB_CMP_ENABLE0 0x0000000150031120
-#define SH_XN_IILB_LB_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_LB_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_LB_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_IILB_LB_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_IILB_LB_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_LB_CMP_ENABLE1" */
-/* IILB compare LB input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_LB_CMP_ENABLE1 0x0000000150031130
-#define SH_XN_IILB_LB_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_LB_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_LB_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_IILB_LB_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_IILB_LB_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_II_CMP_EXP_DATA0" */
-/* IILB compare II input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_II_CMP_EXP_DATA0 0x0000000150031140
-#define SH_XN_IILB_II_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_II_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_II_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_IILB_II_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_IILB_II_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_II_CMP_EXP_DATA1" */
-/* IILB compare II input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_II_CMP_EXP_DATA1 0x0000000150031150
-#define SH_XN_IILB_II_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_II_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_II_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_IILB_II_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_IILB_II_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_II_CMP_ENABLE0" */
-/* IILB compare II input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_II_CMP_ENABLE0 0x0000000150031160
-#define SH_XN_IILB_II_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_II_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_II_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_IILB_II_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_IILB_II_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_II_CMP_ENABLE1" */
-/* IILB compare II input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_II_CMP_ENABLE1 0x0000000150031170
-#define SH_XN_IILB_II_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_II_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_II_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_IILB_II_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_IILB_II_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_MD_CMP_EXP_DATA0" */
-/* IILB compare MD input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_MD_CMP_EXP_DATA0 0x0000000150031180
-#define SH_XN_IILB_MD_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_MD_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_MD_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_IILB_MD_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_IILB_MD_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_MD_CMP_EXP_DATA1" */
-/* IILB compare MD input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_MD_CMP_EXP_DATA1 0x0000000150031190
-#define SH_XN_IILB_MD_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_MD_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_MD_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_IILB_MD_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_IILB_MD_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_MD_CMP_ENABLE0" */
-/* IILB compare MD input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_MD_CMP_ENABLE0 0x00000001500311a0
-#define SH_XN_IILB_MD_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_MD_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_MD_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_IILB_MD_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_IILB_MD_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_MD_CMP_ENABLE1" */
-/* IILB compare MD input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_MD_CMP_ENABLE1 0x00000001500311b0
-#define SH_XN_IILB_MD_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_MD_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_MD_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_IILB_MD_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_IILB_MD_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_PI_CMP_EXP_DATA0" */
-/* IILB compare PI input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_PI_CMP_EXP_DATA0 0x00000001500311c0
-#define SH_XN_IILB_PI_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_PI_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_PI_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_IILB_PI_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_IILB_PI_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_PI_CMP_EXP_DATA1" */
-/* IILB compare PI input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_PI_CMP_EXP_DATA1 0x00000001500311d0
-#define SH_XN_IILB_PI_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_PI_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_PI_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_IILB_PI_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_IILB_PI_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_PI_CMP_ENABLE0" */
-/* IILB compare PI input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_PI_CMP_ENABLE0 0x00000001500311e0
-#define SH_XN_IILB_PI_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_PI_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_PI_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_IILB_PI_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_IILB_PI_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_PI_CMP_ENABLE1" */
-/* IILB compare PI input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_PI_CMP_ENABLE1 0x00000001500311f0
-#define SH_XN_IILB_PI_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_PI_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_PI_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_IILB_PI_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_IILB_PI_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI0_CMP_EXP_DATA0" */
-/* IILB compare NI0 input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_NI0_CMP_EXP_DATA0 0x0000000150031200
-#define SH_XN_IILB_NI0_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_NI0_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_NI0_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_IILB_NI0_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_IILB_NI0_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI0_CMP_EXP_DATA1" */
-/* IILB compare NI0 input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_NI0_CMP_EXP_DATA1 0x0000000150031210
-#define SH_XN_IILB_NI0_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_NI0_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_NI0_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_IILB_NI0_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_IILB_NI0_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI0_CMP_ENABLE0" */
-/* IILB compare NI0 input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_NI0_CMP_ENABLE0 0x0000000150031220
-#define SH_XN_IILB_NI0_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_NI0_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_NI0_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_IILB_NI0_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_IILB_NI0_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI0_CMP_ENABLE1" */
-/* IILB compare NI0 input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_NI0_CMP_ENABLE1 0x0000000150031230
-#define SH_XN_IILB_NI0_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_NI0_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_NI0_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_IILB_NI0_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_IILB_NI0_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI1_CMP_EXP_DATA0" */
-/* IILB compare NI1 input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_NI1_CMP_EXP_DATA0 0x0000000150031240
-#define SH_XN_IILB_NI1_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_NI1_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_NI1_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_IILB_NI1_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_IILB_NI1_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI1_CMP_EXP_DATA1" */
-/* IILB compare NI1 input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_NI1_CMP_EXP_DATA1 0x0000000150031250
-#define SH_XN_IILB_NI1_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_NI1_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_NI1_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_IILB_NI1_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_IILB_NI1_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI1_CMP_ENABLE0" */
-/* IILB compare NI1 input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_NI1_CMP_ENABLE0 0x0000000150031260
-#define SH_XN_IILB_NI1_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_IILB_NI1_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_IILB_NI1_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_IILB_NI1_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_IILB_NI1_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI1_CMP_ENABLE1" */
-/* IILB compare NI1 input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_IILB_NI1_CMP_ENABLE1 0x0000000150031270
-#define SH_XN_IILB_NI1_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_IILB_NI1_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_IILB_NI1_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_IILB_NI1_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_IILB_NI1_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_IILB_CMP_EXP_DATA0" */
-/* MD compare IILB input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_MD_IILB_CMP_EXP_DATA0 0x0000000150031500
-#define SH_XN_MD_IILB_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_MD_IILB_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_MD_IILB_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_MD_IILB_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_MD_IILB_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_IILB_CMP_EXP_DATA1" */
-/* MD compare IILB input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_MD_IILB_CMP_EXP_DATA1 0x0000000150031510
-#define SH_XN_MD_IILB_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_MD_IILB_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_MD_IILB_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_MD_IILB_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_MD_IILB_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_IILB_CMP_ENABLE0" */
-/* MD compare IILB input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_MD_IILB_CMP_ENABLE0 0x0000000150031520
-#define SH_XN_MD_IILB_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_MD_IILB_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_MD_IILB_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_MD_IILB_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_MD_IILB_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_IILB_CMP_ENABLE1" */
-/* MD compare IILB input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_MD_IILB_CMP_ENABLE1 0x0000000150031530
-#define SH_XN_MD_IILB_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_MD_IILB_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_MD_IILB_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_MD_IILB_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_MD_IILB_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI0_CMP_EXP_DATA0" */
-/* MD compare NI0 input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_MD_NI0_CMP_EXP_DATA0 0x0000000150031540
-#define SH_XN_MD_NI0_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_MD_NI0_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_MD_NI0_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_MD_NI0_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_MD_NI0_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI0_CMP_EXP_DATA1" */
-/* MD compare NI0 input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_MD_NI0_CMP_EXP_DATA1 0x0000000150031550
-#define SH_XN_MD_NI0_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_MD_NI0_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_MD_NI0_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_MD_NI0_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_MD_NI0_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI0_CMP_ENABLE0" */
-/* MD compare NI0 input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_MD_NI0_CMP_ENABLE0 0x0000000150031560
-#define SH_XN_MD_NI0_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_MD_NI0_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_MD_NI0_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_MD_NI0_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_MD_NI0_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI0_CMP_ENABLE1" */
-/* MD compare NI0 input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_MD_NI0_CMP_ENABLE1 0x0000000150031570
-#define SH_XN_MD_NI0_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_MD_NI0_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_MD_NI0_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_MD_NI0_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_MD_NI0_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI1_CMP_EXP_DATA0" */
-/* MD compare NI1 input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_MD_NI1_CMP_EXP_DATA0 0x0000000150031580
-#define SH_XN_MD_NI1_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_MD_NI1_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_MD_NI1_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_MD_NI1_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_MD_NI1_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI1_CMP_EXP_DATA1" */
-/* MD compare NI1 input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_MD_NI1_CMP_EXP_DATA1 0x0000000150031590
-#define SH_XN_MD_NI1_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_MD_NI1_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_MD_NI1_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_MD_NI1_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_MD_NI1_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI1_CMP_ENABLE0" */
-/* MD compare NI1 input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_MD_NI1_CMP_ENABLE0 0x00000001500315a0
-#define SH_XN_MD_NI1_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_MD_NI1_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_MD_NI1_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_MD_NI1_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_MD_NI1_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI1_CMP_ENABLE1" */
-/* MD compare NI1 input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_MD_NI1_CMP_ENABLE1 0x00000001500315b0
-#define SH_XN_MD_NI1_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_MD_NI1_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_MD_NI1_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_MD_NI1_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_MD_NI1_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_EXP_HDR0" */
-/* MD compare SIC input expected header0 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_EXP_HDR0 0x00000001500315c0
-#define SH_XN_MD_SIC_CMP_EXP_HDR0_MASK 0xffffffffffffffff
-#define SH_XN_MD_SIC_CMP_EXP_HDR0_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_EXP_HDR0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_MD_SIC_CMP_EXP_HDR0_DATA_SHFT 0
-#define SH_XN_MD_SIC_CMP_EXP_HDR0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_EXP_HDR1" */
-/* MD compare SIC input expected header1 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_EXP_HDR1 0x00000001500315d0
-#define SH_XN_MD_SIC_CMP_EXP_HDR1_MASK 0x000003ffffffffff
-#define SH_XN_MD_SIC_CMP_EXP_HDR1_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_EXP_HDR1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_MD_SIC_CMP_EXP_HDR1_DATA_SHFT 0
-#define SH_XN_MD_SIC_CMP_EXP_HDR1_DATA_MASK 0x000003ffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_HDR_ENABLE0" */
-/* MD compare SIC header enable0 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_HDR_ENABLE0 0x00000001500315e0
-#define SH_XN_MD_SIC_CMP_HDR_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_MD_SIC_CMP_HDR_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_HDR_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_MD_SIC_CMP_HDR_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_MD_SIC_CMP_HDR_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_HDR_ENABLE1" */
-/* MD compare SIC header enable1 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_HDR_ENABLE1 0x00000001500315f0
-#define SH_XN_MD_SIC_CMP_HDR_ENABLE1_MASK 0x000003ffffffffff
-#define SH_XN_MD_SIC_CMP_HDR_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_HDR_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_MD_SIC_CMP_HDR_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_MD_SIC_CMP_HDR_ENABLE1_ENABLE_MASK 0x000003ffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA0" */
-/* MD compare SIC data0 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_DATA0 0x0000000150031600
-#define SH_XN_MD_SIC_CMP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_MD_SIC_CMP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_DATA0_DATA0 */
-/* Description: Data0 */
-#define SH_XN_MD_SIC_CMP_DATA0_DATA0_SHFT 0
-#define SH_XN_MD_SIC_CMP_DATA0_DATA0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA1" */
-/* MD compare SIC data1 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_DATA1 0x0000000150031610
-#define SH_XN_MD_SIC_CMP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_MD_SIC_CMP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_DATA1_DATA1 */
-/* Description: Data1 */
-#define SH_XN_MD_SIC_CMP_DATA1_DATA1_SHFT 0
-#define SH_XN_MD_SIC_CMP_DATA1_DATA1_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA2" */
-/* MD compare SIC data2 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_DATA2 0x0000000150031620
-#define SH_XN_MD_SIC_CMP_DATA2_MASK 0xffffffffffffffff
-#define SH_XN_MD_SIC_CMP_DATA2_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_DATA2_DATA2 */
-/* Description: Data2 */
-#define SH_XN_MD_SIC_CMP_DATA2_DATA2_SHFT 0
-#define SH_XN_MD_SIC_CMP_DATA2_DATA2_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA3" */
-/* MD compare SIC data3 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_DATA3 0x0000000150031630
-#define SH_XN_MD_SIC_CMP_DATA3_MASK 0xffffffffffffffff
-#define SH_XN_MD_SIC_CMP_DATA3_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_DATA3_DATA3 */
-/* Description: Data3 */
-#define SH_XN_MD_SIC_CMP_DATA3_DATA3_SHFT 0
-#define SH_XN_MD_SIC_CMP_DATA3_DATA3_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA_ENABLE0" */
-/* MD enable compare SIC data0 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE0 0x0000000150031640
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_DATA_ENABLE0_DATA_ENABLE0 */
-/* Description: Data0 */
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE0_DATA_ENABLE0_SHFT 0
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE0_DATA_ENABLE0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA_ENABLE1" */
-/* MD enable compare SIC data1 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE1 0x0000000150031650
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_DATA_ENABLE1_DATA_ENABLE1 */
-/* Description: Data1 */
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE1_DATA_ENABLE1_SHFT 0
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE1_DATA_ENABLE1_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA_ENABLE2" */
-/* MD enable compare SIC data2 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE2 0x0000000150031660
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE2_MASK 0xffffffffffffffff
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE2_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_DATA_ENABLE2_DATA_ENABLE2 */
-/* Description: Data2 */
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE2_DATA_ENABLE2_SHFT 0
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE2_DATA_ENABLE2_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA_ENABLE3" */
-/* MD enable compare SIC data3 */
-/* ==================================================================== */
-
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE3 0x0000000150031670
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE3_MASK 0xffffffffffffffff
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE3_INIT 0x0000000000000000
-
-/* SH_XN_MD_SIC_CMP_DATA_ENABLE3_DATA_ENABLE3 */
-/* Description: Data3 */
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE3_DATA_ENABLE3_SHFT 0
-#define SH_XN_MD_SIC_CMP_DATA_ENABLE3_DATA_ENABLE3_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_IILB_CMP_EXP_DATA0" */
-/* PI compare IILB input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_PI_IILB_CMP_EXP_DATA0 0x0000000150031300
-#define SH_XN_PI_IILB_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_PI_IILB_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_PI_IILB_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_PI_IILB_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_PI_IILB_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_IILB_CMP_EXP_DATA1" */
-/* PI compare IILB input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_PI_IILB_CMP_EXP_DATA1 0x0000000150031310
-#define SH_XN_PI_IILB_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_PI_IILB_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_PI_IILB_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_PI_IILB_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_PI_IILB_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_IILB_CMP_ENABLE0" */
-/* PI compare IILB input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_PI_IILB_CMP_ENABLE0 0x0000000150031320
-#define SH_XN_PI_IILB_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_PI_IILB_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_PI_IILB_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_PI_IILB_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_PI_IILB_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_IILB_CMP_ENABLE1" */
-/* PI compare IILB input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_PI_IILB_CMP_ENABLE1 0x0000000150031330
-#define SH_XN_PI_IILB_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_PI_IILB_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_PI_IILB_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_PI_IILB_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_PI_IILB_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI0_CMP_EXP_DATA0" */
-/* PI compare NI0 input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_PI_NI0_CMP_EXP_DATA0 0x0000000150031340
-#define SH_XN_PI_NI0_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_PI_NI0_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_PI_NI0_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_PI_NI0_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_PI_NI0_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI0_CMP_EXP_DATA1" */
-/* PI compare NI0 input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_PI_NI0_CMP_EXP_DATA1 0x0000000150031350
-#define SH_XN_PI_NI0_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_PI_NI0_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_PI_NI0_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_PI_NI0_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_PI_NI0_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI0_CMP_ENABLE0" */
-/* PI compare NI0 input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_PI_NI0_CMP_ENABLE0 0x0000000150031360
-#define SH_XN_PI_NI0_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_PI_NI0_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_PI_NI0_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_PI_NI0_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_PI_NI0_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI0_CMP_ENABLE1" */
-/* PI compare NI0 input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_PI_NI0_CMP_ENABLE1 0x0000000150031370
-#define SH_XN_PI_NI0_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_PI_NI0_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_PI_NI0_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_PI_NI0_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_PI_NI0_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI1_CMP_EXP_DATA0" */
-/* PI compare NI1 input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_PI_NI1_CMP_EXP_DATA0 0x0000000150031380
-#define SH_XN_PI_NI1_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_PI_NI1_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_PI_NI1_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_PI_NI1_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_PI_NI1_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI1_CMP_EXP_DATA1" */
-/* PI compare NI1 input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_PI_NI1_CMP_EXP_DATA1 0x0000000150031390
-#define SH_XN_PI_NI1_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_PI_NI1_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_PI_NI1_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_PI_NI1_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_PI_NI1_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI1_CMP_ENABLE0" */
-/* PI compare NI1 input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_PI_NI1_CMP_ENABLE0 0x00000001500313a0
-#define SH_XN_PI_NI1_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_PI_NI1_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_PI_NI1_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_PI_NI1_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_PI_NI1_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI1_CMP_ENABLE1" */
-/* PI compare NI1 input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_PI_NI1_CMP_ENABLE1 0x00000001500313b0
-#define SH_XN_PI_NI1_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_PI_NI1_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_PI_NI1_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_PI_NI1_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_PI_NI1_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_EXP_HDR0" */
-/* PI compare SIC input expected header0 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_EXP_HDR0 0x00000001500313c0
-#define SH_XN_PI_SIC_CMP_EXP_HDR0_MASK 0xffffffffffffffff
-#define SH_XN_PI_SIC_CMP_EXP_HDR0_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_EXP_HDR0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_PI_SIC_CMP_EXP_HDR0_DATA_SHFT 0
-#define SH_XN_PI_SIC_CMP_EXP_HDR0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_EXP_HDR1" */
-/* PI compare SIC input expected header1 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_EXP_HDR1 0x00000001500313d0
-#define SH_XN_PI_SIC_CMP_EXP_HDR1_MASK 0x000003ffffffffff
-#define SH_XN_PI_SIC_CMP_EXP_HDR1_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_EXP_HDR1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_PI_SIC_CMP_EXP_HDR1_DATA_SHFT 0
-#define SH_XN_PI_SIC_CMP_EXP_HDR1_DATA_MASK 0x000003ffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_HDR_ENABLE0" */
-/* PI compare SIC header enable0 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_HDR_ENABLE0 0x00000001500313e0
-#define SH_XN_PI_SIC_CMP_HDR_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_PI_SIC_CMP_HDR_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_HDR_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_PI_SIC_CMP_HDR_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_PI_SIC_CMP_HDR_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_HDR_ENABLE1" */
-/* PI compare SIC header enable1 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_HDR_ENABLE1 0x00000001500313f0
-#define SH_XN_PI_SIC_CMP_HDR_ENABLE1_MASK 0x000003ffffffffff
-#define SH_XN_PI_SIC_CMP_HDR_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_HDR_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_PI_SIC_CMP_HDR_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_PI_SIC_CMP_HDR_ENABLE1_ENABLE_MASK 0x000003ffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA0" */
-/* PI compare SIC data0 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_DATA0 0x0000000150031400
-#define SH_XN_PI_SIC_CMP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_PI_SIC_CMP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_DATA0_DATA0 */
-/* Description: Data0 */
-#define SH_XN_PI_SIC_CMP_DATA0_DATA0_SHFT 0
-#define SH_XN_PI_SIC_CMP_DATA0_DATA0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA1" */
-/* PI compare SIC data1 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_DATA1 0x0000000150031410
-#define SH_XN_PI_SIC_CMP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_PI_SIC_CMP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_DATA1_DATA1 */
-/* Description: Data1 */
-#define SH_XN_PI_SIC_CMP_DATA1_DATA1_SHFT 0
-#define SH_XN_PI_SIC_CMP_DATA1_DATA1_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA2" */
-/* PI compare SIC data2 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_DATA2 0x0000000150031420
-#define SH_XN_PI_SIC_CMP_DATA2_MASK 0xffffffffffffffff
-#define SH_XN_PI_SIC_CMP_DATA2_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_DATA2_DATA2 */
-/* Description: Data2 */
-#define SH_XN_PI_SIC_CMP_DATA2_DATA2_SHFT 0
-#define SH_XN_PI_SIC_CMP_DATA2_DATA2_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA3" */
-/* PI compare SIC data3 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_DATA3 0x0000000150031430
-#define SH_XN_PI_SIC_CMP_DATA3_MASK 0xffffffffffffffff
-#define SH_XN_PI_SIC_CMP_DATA3_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_DATA3_DATA3 */
-/* Description: Data3 */
-#define SH_XN_PI_SIC_CMP_DATA3_DATA3_SHFT 0
-#define SH_XN_PI_SIC_CMP_DATA3_DATA3_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA_ENABLE0" */
-/* PI enable compare SIC data0 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE0 0x0000000150031440
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_DATA_ENABLE0_DATA_ENABLE0 */
-/* Description: Data0 */
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE0_DATA_ENABLE0_SHFT 0
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE0_DATA_ENABLE0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA_ENABLE1" */
-/* PI enable compare SIC data1 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE1 0x0000000150031450
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_DATA_ENABLE1_DATA_ENABLE1 */
-/* Description: Data1 */
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE1_DATA_ENABLE1_SHFT 0
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE1_DATA_ENABLE1_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA_ENABLE2" */
-/* PI enable compare SIC data2 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE2 0x0000000150031460
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE2_MASK 0xffffffffffffffff
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE2_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_DATA_ENABLE2_DATA_ENABLE2 */
-/* Description: Data2 */
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE2_DATA_ENABLE2_SHFT 0
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE2_DATA_ENABLE2_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA_ENABLE3" */
-/* PI enable compare SIC data3 */
-/* ==================================================================== */
-
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE3 0x0000000150031470
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE3_MASK 0xffffffffffffffff
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE3_INIT 0x0000000000000000
-
-/* SH_XN_PI_SIC_CMP_DATA_ENABLE3_DATA_ENABLE3 */
-/* Description: Data3 */
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE3_DATA_ENABLE3_SHFT 0
-#define SH_XN_PI_SIC_CMP_DATA_ENABLE3_DATA_ENABLE3_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_IILB_CMP_EXP_DATA0" */
-/* NI0 compare IILB input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_IILB_CMP_EXP_DATA0 0x0000000150031700
-#define SH_XN_NI0_IILB_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_NI0_IILB_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_NI0_IILB_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_NI0_IILB_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_NI0_IILB_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_IILB_CMP_EXP_DATA1" */
-/* NI0 compare IILB input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_IILB_CMP_EXP_DATA1 0x0000000150031710
-#define SH_XN_NI0_IILB_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_NI0_IILB_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_NI0_IILB_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_NI0_IILB_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_NI0_IILB_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_IILB_CMP_ENABLE0" */
-/* NI0 compare IILB input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_IILB_CMP_ENABLE0 0x0000000150031720
-#define SH_XN_NI0_IILB_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_NI0_IILB_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_NI0_IILB_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_NI0_IILB_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_NI0_IILB_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_IILB_CMP_ENABLE1" */
-/* NI0 compare IILB input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_IILB_CMP_ENABLE1 0x0000000150031730
-#define SH_XN_NI0_IILB_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_NI0_IILB_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_NI0_IILB_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_NI0_IILB_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_NI0_IILB_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_PI_CMP_EXP_DATA0" */
-/* NI0 compare PI input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_PI_CMP_EXP_DATA0 0x0000000150031740
-#define SH_XN_NI0_PI_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_NI0_PI_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_NI0_PI_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_NI0_PI_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_NI0_PI_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_PI_CMP_EXP_DATA1" */
-/* NI0 compare PI input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_PI_CMP_EXP_DATA1 0x0000000150031750
-#define SH_XN_NI0_PI_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_NI0_PI_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_NI0_PI_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_NI0_PI_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_NI0_PI_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_PI_CMP_ENABLE0" */
-/* NI0 compare PI input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_PI_CMP_ENABLE0 0x0000000150031760
-#define SH_XN_NI0_PI_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_NI0_PI_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_NI0_PI_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_NI0_PI_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_NI0_PI_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_PI_CMP_ENABLE1" */
-/* NI0 compare PI input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_PI_CMP_ENABLE1 0x0000000150031770
-#define SH_XN_NI0_PI_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_NI0_PI_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_NI0_PI_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_NI0_PI_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_NI0_PI_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_MD_CMP_EXP_DATA0" */
-/* NI0 compare MD input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_MD_CMP_EXP_DATA0 0x0000000150031780
-#define SH_XN_NI0_MD_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_NI0_MD_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_NI0_MD_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_NI0_MD_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_NI0_MD_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_MD_CMP_EXP_DATA1" */
-/* NI0 compare MD input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_MD_CMP_EXP_DATA1 0x0000000150031790
-#define SH_XN_NI0_MD_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_NI0_MD_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_NI0_MD_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_NI0_MD_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_NI0_MD_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_MD_CMP_ENABLE0" */
-/* NI0 compare MD input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_MD_CMP_ENABLE0 0x00000001500317a0
-#define SH_XN_NI0_MD_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_NI0_MD_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_NI0_MD_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_NI0_MD_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_NI0_MD_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_MD_CMP_ENABLE1" */
-/* NI0 compare MD input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_MD_CMP_ENABLE1 0x00000001500317b0
-#define SH_XN_NI0_MD_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_NI0_MD_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_NI0_MD_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_NI0_MD_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_NI0_MD_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_NI_CMP_EXP_DATA0" */
-/* NI0 compare NI input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_NI_CMP_EXP_DATA0 0x00000001500317c0
-#define SH_XN_NI0_NI_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_NI0_NI_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_NI0_NI_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_NI0_NI_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_NI0_NI_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_NI_CMP_EXP_DATA1" */
-/* NI0 compare NI input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_NI_CMP_EXP_DATA1 0x00000001500317d0
-#define SH_XN_NI0_NI_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_NI0_NI_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_NI0_NI_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_NI0_NI_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_NI0_NI_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_NI_CMP_ENABLE0" */
-/* NI0 compare NI input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_NI_CMP_ENABLE0 0x00000001500317e0
-#define SH_XN_NI0_NI_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_NI0_NI_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_NI0_NI_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_NI0_NI_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_NI0_NI_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_NI_CMP_ENABLE1" */
-/* NI0 compare NI input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_NI_CMP_ENABLE1 0x00000001500317f0
-#define SH_XN_NI0_NI_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_NI0_NI_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_NI0_NI_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_NI0_NI_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_NI0_NI_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_LLP_CMP_EXP_DATA0" */
-/* NI0 compare LLP input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_LLP_CMP_EXP_DATA0 0x0000000150031800
-#define SH_XN_NI0_LLP_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_NI0_LLP_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_NI0_LLP_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_NI0_LLP_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_NI0_LLP_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_LLP_CMP_EXP_DATA1" */
-/* NI0 compare LLP input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_LLP_CMP_EXP_DATA1 0x0000000150031810
-#define SH_XN_NI0_LLP_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_NI0_LLP_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_NI0_LLP_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_NI0_LLP_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_NI0_LLP_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_LLP_CMP_ENABLE0" */
-/* NI0 compare LLP input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_LLP_CMP_ENABLE0 0x0000000150031820
-#define SH_XN_NI0_LLP_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_NI0_LLP_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_NI0_LLP_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_NI0_LLP_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_NI0_LLP_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_LLP_CMP_ENABLE1" */
-/* NI0 compare LLP input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_NI0_LLP_CMP_ENABLE1 0x0000000150031830
-#define SH_XN_NI0_LLP_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_NI0_LLP_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_NI0_LLP_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_NI0_LLP_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_NI0_LLP_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_IILB_CMP_EXP_DATA0" */
-/* NI1 compare IILB input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_IILB_CMP_EXP_DATA0 0x0000000150031900
-#define SH_XN_NI1_IILB_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_NI1_IILB_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_NI1_IILB_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_NI1_IILB_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_NI1_IILB_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_IILB_CMP_EXP_DATA1" */
-/* NI1 compare IILB input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_IILB_CMP_EXP_DATA1 0x0000000150031910
-#define SH_XN_NI1_IILB_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_NI1_IILB_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_NI1_IILB_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_NI1_IILB_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_NI1_IILB_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_IILB_CMP_ENABLE0" */
-/* NI1 compare IILB input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_IILB_CMP_ENABLE0 0x0000000150031920
-#define SH_XN_NI1_IILB_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_NI1_IILB_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_NI1_IILB_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_NI1_IILB_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_NI1_IILB_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_IILB_CMP_ENABLE1" */
-/* NI1 compare IILB input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_IILB_CMP_ENABLE1 0x0000000150031930
-#define SH_XN_NI1_IILB_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_NI1_IILB_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_NI1_IILB_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_NI1_IILB_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_NI1_IILB_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_PI_CMP_EXP_DATA0" */
-/* NI1 compare PI input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_PI_CMP_EXP_DATA0 0x0000000150031940
-#define SH_XN_NI1_PI_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_NI1_PI_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_NI1_PI_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_NI1_PI_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_NI1_PI_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_PI_CMP_EXP_DATA1" */
-/* NI1 compare PI input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_PI_CMP_EXP_DATA1 0x0000000150031950
-#define SH_XN_NI1_PI_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_NI1_PI_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_NI1_PI_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_NI1_PI_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_NI1_PI_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_PI_CMP_ENABLE0" */
-/* NI1 compare PI input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_PI_CMP_ENABLE0 0x0000000150031960
-#define SH_XN_NI1_PI_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_NI1_PI_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_NI1_PI_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_NI1_PI_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_NI1_PI_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_PI_CMP_ENABLE1" */
-/* NI1 compare PI input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_PI_CMP_ENABLE1 0x0000000150031970
-#define SH_XN_NI1_PI_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_NI1_PI_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_NI1_PI_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_NI1_PI_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_NI1_PI_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_MD_CMP_EXP_DATA0" */
-/* NI1 compare MD input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_MD_CMP_EXP_DATA0 0x0000000150031980
-#define SH_XN_NI1_MD_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_NI1_MD_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_NI1_MD_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_NI1_MD_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_NI1_MD_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_MD_CMP_EXP_DATA1" */
-/* NI1 compare MD input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_MD_CMP_EXP_DATA1 0x0000000150031990
-#define SH_XN_NI1_MD_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_NI1_MD_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_NI1_MD_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_NI1_MD_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_NI1_MD_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_MD_CMP_ENABLE0" */
-/* NI1 compare MD input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_MD_CMP_ENABLE0 0x00000001500319a0
-#define SH_XN_NI1_MD_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_NI1_MD_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_NI1_MD_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_NI1_MD_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_NI1_MD_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_MD_CMP_ENABLE1" */
-/* NI1 compare MD input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_MD_CMP_ENABLE1 0x00000001500319b0
-#define SH_XN_NI1_MD_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_NI1_MD_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_NI1_MD_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_NI1_MD_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_NI1_MD_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_NI_CMP_EXP_DATA0" */
-/* NI1 compare NI input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_NI_CMP_EXP_DATA0 0x00000001500319c0
-#define SH_XN_NI1_NI_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_NI1_NI_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_NI1_NI_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_NI1_NI_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_NI1_NI_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_NI_CMP_EXP_DATA1" */
-/* NI1 compare NI input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_NI_CMP_EXP_DATA1 0x00000001500319d0
-#define SH_XN_NI1_NI_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_NI1_NI_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_NI1_NI_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_NI1_NI_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_NI1_NI_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_NI_CMP_ENABLE0" */
-/* NI1 compare NI input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_NI_CMP_ENABLE0 0x00000001500319e0
-#define SH_XN_NI1_NI_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_NI1_NI_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_NI1_NI_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_NI1_NI_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_NI1_NI_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_NI_CMP_ENABLE1" */
-/* NI1 compare NI input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_NI_CMP_ENABLE1 0x00000001500319f0
-#define SH_XN_NI1_NI_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_NI1_NI_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_NI1_NI_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_NI1_NI_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_NI1_NI_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_LLP_CMP_EXP_DATA0" */
-/* NI1 compare LLP input expected data0 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_LLP_CMP_EXP_DATA0 0x0000000150031a00
-#define SH_XN_NI1_LLP_CMP_EXP_DATA0_MASK 0xffffffffffffffff
-#define SH_XN_NI1_LLP_CMP_EXP_DATA0_INIT 0x0000000000000000
-
-/* SH_XN_NI1_LLP_CMP_EXP_DATA0_DATA */
-/* Description: Expected data 0 */
-#define SH_XN_NI1_LLP_CMP_EXP_DATA0_DATA_SHFT 0
-#define SH_XN_NI1_LLP_CMP_EXP_DATA0_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_LLP_CMP_EXP_DATA1" */
-/* NI1 compare LLP input expected data1 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_LLP_CMP_EXP_DATA1 0x0000000150031a10
-#define SH_XN_NI1_LLP_CMP_EXP_DATA1_MASK 0xffffffffffffffff
-#define SH_XN_NI1_LLP_CMP_EXP_DATA1_INIT 0x0000000000000000
-
-/* SH_XN_NI1_LLP_CMP_EXP_DATA1_DATA */
-/* Description: Expected data 1 */
-#define SH_XN_NI1_LLP_CMP_EXP_DATA1_DATA_SHFT 0
-#define SH_XN_NI1_LLP_CMP_EXP_DATA1_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_LLP_CMP_ENABLE0" */
-/* NI1 compare LLP input enable0 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_LLP_CMP_ENABLE0 0x0000000150031a20
-#define SH_XN_NI1_LLP_CMP_ENABLE0_MASK 0xffffffffffffffff
-#define SH_XN_NI1_LLP_CMP_ENABLE0_INIT 0x0000000000000000
-
-/* SH_XN_NI1_LLP_CMP_ENABLE0_ENABLE */
-/* Description: Enable0 */
-#define SH_XN_NI1_LLP_CMP_ENABLE0_ENABLE_SHFT 0
-#define SH_XN_NI1_LLP_CMP_ENABLE0_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_LLP_CMP_ENABLE1" */
-/* NI1 compare LLP input enable1 */
-/* ==================================================================== */
-
-#define SH_XN_NI1_LLP_CMP_ENABLE1 0x0000000150031a30
-#define SH_XN_NI1_LLP_CMP_ENABLE1_MASK 0xffffffffffffffff
-#define SH_XN_NI1_LLP_CMP_ENABLE1_INIT 0x0000000000000000
-
-/* SH_XN_NI1_LLP_CMP_ENABLE1_ENABLE */
-/* Description: Enable1 */
-#define SH_XN_NI1_LLP_CMP_ENABLE1_ENABLE_SHFT 0
-#define SH_XN_NI1_LLP_CMP_ENABLE1_ENABLE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ECC_INJ_REG" */
-/* ==================================================================== */
-
-#define SH_XNPI_ECC_INJ_REG 0x0000000150032000
-#define SH_XNPI_ECC_INJ_REG_MASK 0xf0fff0fff0fff0ff
-#define SH_XNPI_ECC_INJ_REG_INIT 0x0000000000000000
-
-/* SH_XNPI_ECC_INJ_REG_BYTE0 */
-/* Description: Replacement Checkbyte */
-#define SH_XNPI_ECC_INJ_REG_BYTE0_SHFT 0
-#define SH_XNPI_ECC_INJ_REG_BYTE0_MASK 0x00000000000000ff
-
-/* SH_XNPI_ECC_INJ_REG_DATA_1SHOT0 */
-/* Description: 1 shot mask data */
-#define SH_XNPI_ECC_INJ_REG_DATA_1SHOT0_SHFT 12
-#define SH_XNPI_ECC_INJ_REG_DATA_1SHOT0_MASK 0x0000000000001000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CONT0 */
-/* Description: toggle mask data */
-#define SH_XNPI_ECC_INJ_REG_DATA_CONT0_SHFT 13
-#define SH_XNPI_ECC_INJ_REG_DATA_CONT0_MASK 0x0000000000002000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT0 */
-/* Description: Replace Checkbyte One Shot */
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT0_SHFT 14
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT0_MASK 0x0000000000004000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CB_CONT0 */
-/* Description: Replace Checkbyte Continuous */
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_CONT0_SHFT 15
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_CONT0_MASK 0x0000000000008000
-
-/* SH_XNPI_ECC_INJ_REG_BYTE1 */
-/* Description: Replacement Checkbyte */
-#define SH_XNPI_ECC_INJ_REG_BYTE1_SHFT 16
-#define SH_XNPI_ECC_INJ_REG_BYTE1_MASK 0x0000000000ff0000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_1SHOT1 */
-/* Description: 1 shot mask data */
-#define SH_XNPI_ECC_INJ_REG_DATA_1SHOT1_SHFT 28
-#define SH_XNPI_ECC_INJ_REG_DATA_1SHOT1_MASK 0x0000000010000000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CONT1 */
-/* Description: toggle mask data */
-#define SH_XNPI_ECC_INJ_REG_DATA_CONT1_SHFT 29
-#define SH_XNPI_ECC_INJ_REG_DATA_CONT1_MASK 0x0000000020000000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT1 */
-/* Description: Replace Checkbyte One Shot */
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT1_SHFT 30
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT1_MASK 0x0000000040000000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CB_CONT1 */
-/* Description: Replace Checkbyte Continous */
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_CONT1_SHFT 31
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_CONT1_MASK 0x0000000080000000
-
-/* SH_XNPI_ECC_INJ_REG_BYTE2 */
-/* Description: Replacement Checkbyte */
-#define SH_XNPI_ECC_INJ_REG_BYTE2_SHFT 32
-#define SH_XNPI_ECC_INJ_REG_BYTE2_MASK 0x000000ff00000000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_1SHOT2 */
-/* Description: 1 shot mask data */
-#define SH_XNPI_ECC_INJ_REG_DATA_1SHOT2_SHFT 44
-#define SH_XNPI_ECC_INJ_REG_DATA_1SHOT2_MASK 0x0000100000000000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CONT2 */
-/* Description: toggle mask data */
-#define SH_XNPI_ECC_INJ_REG_DATA_CONT2_SHFT 45
-#define SH_XNPI_ECC_INJ_REG_DATA_CONT2_MASK 0x0000200000000000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT2 */
-/* Description: Replace Checkbyte OneShot */
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT2_SHFT 46
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT2_MASK 0x0000400000000000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CB_CONT2 */
-/* Description: Replace Checkbyte Continous */
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_CONT2_SHFT 47
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_CONT2_MASK 0x0000800000000000
-
-/* SH_XNPI_ECC_INJ_REG_BYTE3 */
-/* Description: Replacement Checkbyte */
-#define SH_XNPI_ECC_INJ_REG_BYTE3_SHFT 48
-#define SH_XNPI_ECC_INJ_REG_BYTE3_MASK 0x00ff000000000000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_1SHOT3 */
-/* Description: 1 shot mask data */
-#define SH_XNPI_ECC_INJ_REG_DATA_1SHOT3_SHFT 60
-#define SH_XNPI_ECC_INJ_REG_DATA_1SHOT3_MASK 0x1000000000000000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CONT3 */
-/* Description: toggle mask data */
-#define SH_XNPI_ECC_INJ_REG_DATA_CONT3_SHFT 61
-#define SH_XNPI_ECC_INJ_REG_DATA_CONT3_MASK 0x2000000000000000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT3 */
-/* Description: Replace Checkbyte One-Shot */
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT3_SHFT 62
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_1SHOT3_MASK 0x4000000000000000
-
-/* SH_XNPI_ECC_INJ_REG_DATA_CB_CONT3 */
-/* Description: Replace Checkbyte Continous */
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_CONT3_SHFT 63
-#define SH_XNPI_ECC_INJ_REG_DATA_CB_CONT3_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ECC0_INJ_MASK_REG" */
-/* ==================================================================== */
-
-#define SH_XNPI_ECC0_INJ_MASK_REG 0x0000000150032008
-#define SH_XNPI_ECC0_INJ_MASK_REG_MASK 0xffffffffffffffff
-#define SH_XNPI_ECC0_INJ_MASK_REG_INIT 0x0000000000000000
-
-/* SH_XNPI_ECC0_INJ_MASK_REG_MASK_ECC0 */
-/* Description: Replacement Data */
-#define SH_XNPI_ECC0_INJ_MASK_REG_MASK_ECC0_SHFT 0
-#define SH_XNPI_ECC0_INJ_MASK_REG_MASK_ECC0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ECC1_INJ_MASK_REG" */
-/* ==================================================================== */
-
-#define SH_XNPI_ECC1_INJ_MASK_REG 0x0000000150032010
-#define SH_XNPI_ECC1_INJ_MASK_REG_MASK 0xffffffffffffffff
-#define SH_XNPI_ECC1_INJ_MASK_REG_INIT 0x0000000000000000
-
-/* SH_XNPI_ECC1_INJ_MASK_REG_MASK_ECC1 */
-/* Description: Replacement Data */
-#define SH_XNPI_ECC1_INJ_MASK_REG_MASK_ECC1_SHFT 0
-#define SH_XNPI_ECC1_INJ_MASK_REG_MASK_ECC1_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ECC2_INJ_MASK_REG" */
-/* ==================================================================== */
-
-#define SH_XNPI_ECC2_INJ_MASK_REG 0x0000000150032018
-#define SH_XNPI_ECC2_INJ_MASK_REG_MASK 0xffffffffffffffff
-#define SH_XNPI_ECC2_INJ_MASK_REG_INIT 0x0000000000000000
-
-/* SH_XNPI_ECC2_INJ_MASK_REG_MASK_ECC2 */
-/* Description: Replacement Data */
-#define SH_XNPI_ECC2_INJ_MASK_REG_MASK_ECC2_SHFT 0
-#define SH_XNPI_ECC2_INJ_MASK_REG_MASK_ECC2_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ECC3_INJ_MASK_REG" */
-/* ==================================================================== */
-
-#define SH_XNPI_ECC3_INJ_MASK_REG 0x0000000150032020
-#define SH_XNPI_ECC3_INJ_MASK_REG_MASK 0xffffffffffffffff
-#define SH_XNPI_ECC3_INJ_MASK_REG_INIT 0x0000000000000000
-
-/* SH_XNPI_ECC3_INJ_MASK_REG_MASK_ECC3 */
-/* Description: Replacement Data */
-#define SH_XNPI_ECC3_INJ_MASK_REG_MASK_ECC3_SHFT 0
-#define SH_XNPI_ECC3_INJ_MASK_REG_MASK_ECC3_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC_INJ_REG" */
-/* ==================================================================== */
-
-#define SH_XNMD_ECC_INJ_REG 0x0000000150032030
-#define SH_XNMD_ECC_INJ_REG_MASK 0xf0fff0fff0fff0ff
-#define SH_XNMD_ECC_INJ_REG_INIT 0x0000000000000000
-
-/* SH_XNMD_ECC_INJ_REG_BYTE0 */
-/* Description: Replacement Checkbyte */
-#define SH_XNMD_ECC_INJ_REG_BYTE0_SHFT 0
-#define SH_XNMD_ECC_INJ_REG_BYTE0_MASK 0x00000000000000ff
-
-/* SH_XNMD_ECC_INJ_REG_DATA_1SHOT0 */
-/* Description: 1 shot mask data */
-#define SH_XNMD_ECC_INJ_REG_DATA_1SHOT0_SHFT 12
-#define SH_XNMD_ECC_INJ_REG_DATA_1SHOT0_MASK 0x0000000000001000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CONT0 */
-/* Description: toggle mask data */
-#define SH_XNMD_ECC_INJ_REG_DATA_CONT0_SHFT 13
-#define SH_XNMD_ECC_INJ_REG_DATA_CONT0_MASK 0x0000000000002000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT0 */
-/* Description: Replace Checkbyte One Shot */
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT0_SHFT 14
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT0_MASK 0x0000000000004000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CB_CONT0 */
-/* Description: Replace Checkbyte Continuous */
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_CONT0_SHFT 15
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_CONT0_MASK 0x0000000000008000
-
-/* SH_XNMD_ECC_INJ_REG_BYTE1 */
-/* Description: Replacement Checkbyte */
-#define SH_XNMD_ECC_INJ_REG_BYTE1_SHFT 16
-#define SH_XNMD_ECC_INJ_REG_BYTE1_MASK 0x0000000000ff0000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_1SHOT1 */
-/* Description: 1 shot mask data */
-#define SH_XNMD_ECC_INJ_REG_DATA_1SHOT1_SHFT 28
-#define SH_XNMD_ECC_INJ_REG_DATA_1SHOT1_MASK 0x0000000010000000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CONT1 */
-/* Description: toggle mask data */
-#define SH_XNMD_ECC_INJ_REG_DATA_CONT1_SHFT 29
-#define SH_XNMD_ECC_INJ_REG_DATA_CONT1_MASK 0x0000000020000000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT1 */
-/* Description: Replace Checkbyte One Shot */
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT1_SHFT 30
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT1_MASK 0x0000000040000000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CB_CONT1 */
-/* Description: Replace Checkbyte Continous */
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_CONT1_SHFT 31
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_CONT1_MASK 0x0000000080000000
-
-/* SH_XNMD_ECC_INJ_REG_BYTE2 */
-/* Description: Replacement Checkbyte */
-#define SH_XNMD_ECC_INJ_REG_BYTE2_SHFT 32
-#define SH_XNMD_ECC_INJ_REG_BYTE2_MASK 0x000000ff00000000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_1SHOT2 */
-/* Description: 1 shot mask data */
-#define SH_XNMD_ECC_INJ_REG_DATA_1SHOT2_SHFT 44
-#define SH_XNMD_ECC_INJ_REG_DATA_1SHOT2_MASK 0x0000100000000000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CONT2 */
-/* Description: toggle mask data */
-#define SH_XNMD_ECC_INJ_REG_DATA_CONT2_SHFT 45
-#define SH_XNMD_ECC_INJ_REG_DATA_CONT2_MASK 0x0000200000000000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT2 */
-/* Description: Replace Checkbyte OneShot */
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT2_SHFT 46
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT2_MASK 0x0000400000000000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CB_CONT2 */
-/* Description: Replace Checkbyte Continous */
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_CONT2_SHFT 47
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_CONT2_MASK 0x0000800000000000
-
-/* SH_XNMD_ECC_INJ_REG_BYTE3 */
-/* Description: Replacement Checkbyte */
-#define SH_XNMD_ECC_INJ_REG_BYTE3_SHFT 48
-#define SH_XNMD_ECC_INJ_REG_BYTE3_MASK 0x00ff000000000000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_1SHOT3 */
-/* Description: 1 shot mask data */
-#define SH_XNMD_ECC_INJ_REG_DATA_1SHOT3_SHFT 60
-#define SH_XNMD_ECC_INJ_REG_DATA_1SHOT3_MASK 0x1000000000000000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CONT3 */
-/* Description: toggle mask data */
-#define SH_XNMD_ECC_INJ_REG_DATA_CONT3_SHFT 61
-#define SH_XNMD_ECC_INJ_REG_DATA_CONT3_MASK 0x2000000000000000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT3 */
-/* Description: Replace Checkbyte One-Shot */
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT3_SHFT 62
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_1SHOT3_MASK 0x4000000000000000
-
-/* SH_XNMD_ECC_INJ_REG_DATA_CB_CONT3 */
-/* Description: Replace Checkbyte Continous */
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_CONT3_SHFT 63
-#define SH_XNMD_ECC_INJ_REG_DATA_CB_CONT3_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC0_INJ_MASK_REG" */
-/* ==================================================================== */
-
-#define SH_XNMD_ECC0_INJ_MASK_REG 0x0000000150032038
-#define SH_XNMD_ECC0_INJ_MASK_REG_MASK 0xffffffffffffffff
-#define SH_XNMD_ECC0_INJ_MASK_REG_INIT 0x0000000000000000
-
-/* SH_XNMD_ECC0_INJ_MASK_REG_MASK_ECC0 */
-/* Description: Replacement Data */
-#define SH_XNMD_ECC0_INJ_MASK_REG_MASK_ECC0_SHFT 0
-#define SH_XNMD_ECC0_INJ_MASK_REG_MASK_ECC0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC1_INJ_MASK_REG" */
-/* ==================================================================== */
-
-#define SH_XNMD_ECC1_INJ_MASK_REG 0x0000000150032040
-#define SH_XNMD_ECC1_INJ_MASK_REG_MASK 0xffffffffffffffff
-#define SH_XNMD_ECC1_INJ_MASK_REG_INIT 0x0000000000000000
-
-/* SH_XNMD_ECC1_INJ_MASK_REG_MASK_ECC1 */
-/* Description: Replacement Data */
-#define SH_XNMD_ECC1_INJ_MASK_REG_MASK_ECC1_SHFT 0
-#define SH_XNMD_ECC1_INJ_MASK_REG_MASK_ECC1_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC2_INJ_MASK_REG" */
-/* ==================================================================== */
-
-#define SH_XNMD_ECC2_INJ_MASK_REG 0x0000000150032048
-#define SH_XNMD_ECC2_INJ_MASK_REG_MASK 0xffffffffffffffff
-#define SH_XNMD_ECC2_INJ_MASK_REG_INIT 0x0000000000000000
-
-/* SH_XNMD_ECC2_INJ_MASK_REG_MASK_ECC2 */
-/* Description: Replacement Data */
-#define SH_XNMD_ECC2_INJ_MASK_REG_MASK_ECC2_SHFT 0
-#define SH_XNMD_ECC2_INJ_MASK_REG_MASK_ECC2_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC3_INJ_MASK_REG" */
-/* ==================================================================== */
-
-#define SH_XNMD_ECC3_INJ_MASK_REG 0x0000000150032050
-#define SH_XNMD_ECC3_INJ_MASK_REG_MASK 0xffffffffffffffff
-#define SH_XNMD_ECC3_INJ_MASK_REG_INIT 0x0000000000000000
-
-/* SH_XNMD_ECC3_INJ_MASK_REG_MASK_ECC3 */
-/* Description: Replacement Data */
-#define SH_XNMD_ECC3_INJ_MASK_REG_MASK_ECC3_SHFT 0
-#define SH_XNMD_ECC3_INJ_MASK_REG_MASK_ECC3_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC_ERR_REPORT" */
-/* ==================================================================== */
-
-#define SH_XNMD_ECC_ERR_REPORT 0x0000000150032058
-#define SH_XNMD_ECC_ERR_REPORT_MASK 0x0001000100010001
-#define SH_XNMD_ECC_ERR_REPORT_INIT 0x0000000000000000
-
-/* SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE0 */
-/* Description: Disable Error Correction */
-#define SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE0_SHFT 0
-#define SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE0_MASK 0x0000000000000001
-
-/* SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE1 */
-/* Description: Disable Error Correction */
-#define SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE1_SHFT 16
-#define SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE1_MASK 0x0000000000010000
-
-/* SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE2 */
-/* Description: Disable Error Correction */
-#define SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE2_SHFT 32
-#define SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE2_MASK 0x0000000100000000
-
-/* SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE3 */
-/* Description: Disable Error Correction */
-#define SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE3_SHFT 48
-#define SH_XNMD_ECC_ERR_REPORT_ECC_DISABLE3_MASK 0x0001000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_SUMMARY_1" */
-/* ni0 Error Summary Bits */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_SUMMARY_1 0x0000000150040500
-#define SH_NI0_ERROR_SUMMARY_1_MASK 0xffffffffffffffff
-#define SH_NI0_ERROR_SUMMARY_1_INIT 0xffffffffffffffff
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT0 */
-/* Description: Fifo 02 debit0 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT0_SHFT 0
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT0_MASK 0x0000000000000001
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT2 */
-/* Description: Fifo 02 debit2 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT2_SHFT 1
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT2_MASK 0x0000000000000002
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT0 */
-/* Description: Fifo 13 debit0 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT0_SHFT 2
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT0_MASK 0x0000000000000004
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT2 */
-/* Description: Fifo 13 debit2 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT2_SHFT 3
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT2_MASK 0x0000000000000008
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit overflow 0 */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit overflow 1 */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit overflow 2 */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit overflow 0 */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit overflow 1 */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit overflow 2 */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT0 */
-/* Description: PI Fifo debit0 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT0_SHFT 22
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT0_MASK 0x0000000000400000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT2 */
-/* Description: PI Fifo debit2 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT2_SHFT 23
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT2_MASK 0x0000000000800000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT0 */
-/* Description: IILB Fifo debit0 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT0_SHFT 24
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT0_MASK 0x0000000001000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT2 */
-/* Description: IILB Fifo debit2 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT2_SHFT 25
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT2_MASK 0x0000000002000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT0 */
-/* Description: MD Fifo debit0 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT0_SHFT 26
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT0_MASK 0x0000000004000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT2 */
-/* Description: MD Fifo debit2 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT2_SHFT 27
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT2_MASK 0x0000000008000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT0 */
-/* Description: NI Fifo debit0 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT0_SHFT 28
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT0_MASK 0x0000000010000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT1 */
-/* Description: NI Fifo debit1 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT1_SHFT 29
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT1_MASK 0x0000000020000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT2 */
-/* Description: NI Fifo debit2 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT2_SHFT 30
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT2_MASK 0x0000000040000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT3 */
-/* Description: NI Fifo debit3 overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT3_SHFT 31
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT3_MASK 0x0000000080000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit overflow */
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI0_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC0 */
-/* Description: Fifo02 vc0 tail timeout */
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC0_SHFT 56
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC0_MASK 0x0100000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC2 */
-/* Description: Fifo02 vc2 tail timeout */
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC2_SHFT 57
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC2_MASK 0x0200000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC1 */
-/* Description: Fifo13 vc1 tail timeout */
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC1_SHFT 58
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC1_MASK 0x0400000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC3 */
-/* Description: Fifo13 vc3 tail timeout */
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC3_SHFT 59
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC3_MASK 0x0800000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC0 */
-/* Description: NI vc0 tail timeout */
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC0_SHFT 60
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC0_MASK 0x1000000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC1 */
-/* Description: NI vc1 tail timeout */
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC1_SHFT 61
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC1_MASK 0x2000000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC2 */
-/* Description: NI vc2 tail timeout */
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC2_SHFT 62
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC2_MASK 0x4000000000000000
-
-/* SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC3 */
-/* Description: NI vc3 tail timeout */
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC3_SHFT 63
-#define SH_NI0_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC3_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_SUMMARY_1_ALIAS" */
-/* ni0 Error Summary Bits Alias */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_SUMMARY_1_ALIAS 0x0000000150040508
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_SUMMARY_2" */
-/* ni0 Error Summary Bits */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_SUMMARY_2 0x0000000150040510
-#define SH_NI0_ERROR_SUMMARY_2_MASK 0x7fffffff003fffff
-#define SH_NI0_ERROR_SUMMARY_2_INIT 0x7fffffff003fffff
-
-/* SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCNI */
-/* Description: Illegal VC NI */
-#define SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCNI_SHFT 0
-#define SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCNI_MASK 0x0000000000000001
-
-/* SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCPI */
-/* Description: Illegal VC PI */
-#define SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCPI_SHFT 1
-#define SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCPI_MASK 0x0000000000000002
-
-/* SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCMD */
-/* Description: Illegal VC MD */
-#define SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCMD_SHFT 2
-#define SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCMD_MASK 0x0000000000000004
-
-/* SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCIILB */
-/* Description: Illegal VC IILB */
-#define SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCIILB_SHFT 3
-#define SH_NI0_ERROR_SUMMARY_2_ILLEGAL_VCIILB_MASK 0x0000000000000008
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit underflow 0 */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit underflow 1 */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit underflow 2 */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit underflow 0 */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit underflow 1 */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit underflow 2 */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit underflow */
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI0_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC0 */
-/* Description: llp deadlock vc0 */
-#define SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC0_SHFT 56
-#define SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC0_MASK 0x0100000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC1 */
-/* Description: llp deadlock vc1 */
-#define SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC1_SHFT 57
-#define SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC1_MASK 0x0200000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC2 */
-/* Description: llp deadlock vc2 */
-#define SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC2_SHFT 58
-#define SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC2_MASK 0x0400000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC3 */
-/* Description: llp deadlock vc3 */
-#define SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC3_SHFT 59
-#define SH_NI0_ERROR_SUMMARY_2_LLP_DEADLOCK_VC3_MASK 0x0800000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_NI0_ERROR_SUMMARY_2_CHIPLET_NOMATCH_SHFT 60
-#define SH_NI0_ERROR_SUMMARY_2_CHIPLET_NOMATCH_MASK 0x1000000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_NI0_ERROR_SUMMARY_2_LUT_READ_ERROR_SHFT 61
-#define SH_NI0_ERROR_SUMMARY_2_LUT_READ_ERROR_MASK 0x2000000000000000
-
-/* SH_NI0_ERROR_SUMMARY_2_RETRY_TIMEOUT_ERROR */
-/* Description: Retry Timeout Error */
-#define SH_NI0_ERROR_SUMMARY_2_RETRY_TIMEOUT_ERROR_SHFT 62
-#define SH_NI0_ERROR_SUMMARY_2_RETRY_TIMEOUT_ERROR_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_SUMMARY_2_ALIAS" */
-/* ni0 Error Summary Bits Alias */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_SUMMARY_2_ALIAS 0x0000000150040518
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_OVERFLOW_1" */
-/* ni0 Error Overflow Bits */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_OVERFLOW_1 0x0000000150040520
-#define SH_NI0_ERROR_OVERFLOW_1_MASK 0xffffffffffffffff
-#define SH_NI0_ERROR_OVERFLOW_1_INIT 0xffffffffffffffff
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT0 */
-/* Description: Fifo 02 debit0 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT0_SHFT 0
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT0_MASK 0x0000000000000001
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT2 */
-/* Description: Fifo 02 debit2 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT2_SHFT 1
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT2_MASK 0x0000000000000002
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT0 */
-/* Description: Fifo 13 debit0 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT0_SHFT 2
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT0_MASK 0x0000000000000004
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT2 */
-/* Description: Fifo 13 debit2 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT2_SHFT 3
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT2_MASK 0x0000000000000008
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit overflow 0 */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit overflow 1 */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit overflow 2 */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit overflow 0 */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit overflow 1 */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit overflow 2 */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT0 */
-/* Description: PI Fifo debit0 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT0_SHFT 22
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT0_MASK 0x0000000000400000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT2 */
-/* Description: PI Fifo debit2 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT2_SHFT 23
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT2_MASK 0x0000000000800000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT0 */
-/* Description: IILB Fifo debit0 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT0_SHFT 24
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT0_MASK 0x0000000001000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT2 */
-/* Description: IILB Fifo debit2 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT2_SHFT 25
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT2_MASK 0x0000000002000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT0 */
-/* Description: MD Fifo debit0 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT0_SHFT 26
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT0_MASK 0x0000000004000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT2 */
-/* Description: MD Fifo debit2 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT2_SHFT 27
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT2_MASK 0x0000000008000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT0 */
-/* Description: NI Fifo debit0 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT0_SHFT 28
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT0_MASK 0x0000000010000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT1 */
-/* Description: NI Fifo debit1 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT1_SHFT 29
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT1_MASK 0x0000000020000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT2 */
-/* Description: NI Fifo debit2 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT2_SHFT 30
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT2_MASK 0x0000000040000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT3 */
-/* Description: NI Fifo debit3 overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT3_SHFT 31
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT3_MASK 0x0000000080000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit overflow */
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI0_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC0 */
-/* Description: Fifo02 vc0 tail timeout */
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC0_SHFT 56
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC0_MASK 0x0100000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC2 */
-/* Description: Fifo02 vc2 tail timeout */
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC2_SHFT 57
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC2_MASK 0x0200000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC1 */
-/* Description: Fifo13 vc1 tail timeout */
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC1_SHFT 58
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC1_MASK 0x0400000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC3 */
-/* Description: Fifo13 vc3 tail timeout */
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC3_SHFT 59
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC3_MASK 0x0800000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC0 */
-/* Description: NI vc0 tail timeout */
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC0_SHFT 60
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC0_MASK 0x1000000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC1 */
-/* Description: NI vc1 tail timeout */
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC1_SHFT 61
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC1_MASK 0x2000000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC2 */
-/* Description: NI vc2 tail timeout */
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC2_SHFT 62
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC2_MASK 0x4000000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC3 */
-/* Description: NI vc3 tail timeout */
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC3_SHFT 63
-#define SH_NI0_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC3_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_OVERFLOW_1_ALIAS" */
-/* ni0 Error Overflow Bits Alias */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_OVERFLOW_1_ALIAS 0x0000000150040528
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_OVERFLOW_2" */
-/* ni0 Error Overflow Bits */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_OVERFLOW_2 0x0000000150040530
-#define SH_NI0_ERROR_OVERFLOW_2_MASK 0x7fffffff003fffff
-#define SH_NI0_ERROR_OVERFLOW_2_INIT 0x7fffffff003fffff
-
-/* SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCNI */
-/* Description: Illegal VC NI */
-#define SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCNI_SHFT 0
-#define SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCNI_MASK 0x0000000000000001
-
-/* SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCPI */
-/* Description: Illegal VC PI */
-#define SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCPI_SHFT 1
-#define SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCPI_MASK 0x0000000000000002
-
-/* SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCMD */
-/* Description: Illegal VC MD */
-#define SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCMD_SHFT 2
-#define SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCMD_MASK 0x0000000000000004
-
-/* SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCIILB */
-/* Description: Illegal VC IILB */
-#define SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCIILB_SHFT 3
-#define SH_NI0_ERROR_OVERFLOW_2_ILLEGAL_VCIILB_MASK 0x0000000000000008
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit underflow 0 */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit underflow 1 */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit underflow 2 */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit underflow 0 */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit underflow 1 */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit underflow 2 */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit underflow */
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI0_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC0 */
-/* Description: llp deadlock vc0 */
-#define SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC0_SHFT 56
-#define SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC0_MASK 0x0100000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC1 */
-/* Description: llp deadlock vc1 */
-#define SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC1_SHFT 57
-#define SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC1_MASK 0x0200000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC2 */
-/* Description: llp deadlock vc2 */
-#define SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC2_SHFT 58
-#define SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC2_MASK 0x0400000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC3 */
-/* Description: llp deadlock vc3 */
-#define SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC3_SHFT 59
-#define SH_NI0_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC3_MASK 0x0800000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_NI0_ERROR_OVERFLOW_2_CHIPLET_NOMATCH_SHFT 60
-#define SH_NI0_ERROR_OVERFLOW_2_CHIPLET_NOMATCH_MASK 0x1000000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_NI0_ERROR_OVERFLOW_2_LUT_READ_ERROR_SHFT 61
-#define SH_NI0_ERROR_OVERFLOW_2_LUT_READ_ERROR_MASK 0x2000000000000000
-
-/* SH_NI0_ERROR_OVERFLOW_2_RETRY_TIMEOUT_ERROR */
-/* Description: Retry Timeout Error */
-#define SH_NI0_ERROR_OVERFLOW_2_RETRY_TIMEOUT_ERROR_SHFT 62
-#define SH_NI0_ERROR_OVERFLOW_2_RETRY_TIMEOUT_ERROR_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_OVERFLOW_2_ALIAS" */
-/* ni0 Error Overflow Bits Alias */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_OVERFLOW_2_ALIAS 0x0000000150040538
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_MASK_1" */
-/* ni0 Error Mask Bits */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_MASK_1 0x0000000150040540
-#define SH_NI0_ERROR_MASK_1_MASK 0xffffffffffffffff
-#define SH_NI0_ERROR_MASK_1_INIT 0xffffffffffffffff
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT0 */
-/* Description: Fifo 02 debit0 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT0_SHFT 0
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT0_MASK 0x0000000000000001
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT2 */
-/* Description: Fifo 02 debit2 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT2_SHFT 1
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT2_MASK 0x0000000000000002
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT0 */
-/* Description: Fifo 13 debit0 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT0_SHFT 2
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT0_MASK 0x0000000000000004
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT2 */
-/* Description: Fifo 13 debit2 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT2_SHFT 3
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT2_MASK 0x0000000000000008
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit overflow 0 */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI0_ERROR_MASK_1_OVERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit overflow 1 */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI0_ERROR_MASK_1_OVERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit overflow 2 */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI0_ERROR_MASK_1_OVERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit overflow 0 */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI0_ERROR_MASK_1_OVERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit overflow 1 */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI0_ERROR_MASK_1_OVERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit overflow 2 */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI0_ERROR_MASK_1_OVERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT0 */
-/* Description: PI Fifo debit0 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT0_SHFT 22
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT0_MASK 0x0000000000400000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT2 */
-/* Description: PI Fifo debit2 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT2_SHFT 23
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT2_MASK 0x0000000000800000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT0 */
-/* Description: IILB Fifo debit0 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT0_SHFT 24
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT0_MASK 0x0000000001000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT2 */
-/* Description: IILB Fifo debit2 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT2_SHFT 25
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT2_MASK 0x0000000002000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT0 */
-/* Description: MD Fifo debit0 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT0_SHFT 26
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT0_MASK 0x0000000004000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT2 */
-/* Description: MD Fifo debit2 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT2_SHFT 27
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT2_MASK 0x0000000008000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT0 */
-/* Description: NI Fifo debit0 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT0_SHFT 28
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT0_MASK 0x0000000010000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT1 */
-/* Description: NI Fifo debit1 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT1_SHFT 29
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT1_MASK 0x0000000020000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT2 */
-/* Description: NI Fifo debit2 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT2_SHFT 30
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT2_MASK 0x0000000040000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT3 */
-/* Description: NI Fifo debit3 overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT3_SHFT 31
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT3_MASK 0x0000000080000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit overflow */
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI0_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC0 */
-/* Description: Fifo02 vc0 tail timeout */
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC0_SHFT 56
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC0_MASK 0x0100000000000000
-
-/* SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC2 */
-/* Description: Fifo02 vc2 tail timeout */
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC2_SHFT 57
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC2_MASK 0x0200000000000000
-
-/* SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC1 */
-/* Description: Fifo13 vc1 tail timeout */
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC1_SHFT 58
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC1_MASK 0x0400000000000000
-
-/* SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC3 */
-/* Description: Fifo13 vc3 tail timeout */
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC3_SHFT 59
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC3_MASK 0x0800000000000000
-
-/* SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC0 */
-/* Description: NI vc0 tail timeout */
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC0_SHFT 60
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC0_MASK 0x1000000000000000
-
-/* SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC1 */
-/* Description: NI vc1 tail timeout */
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC1_SHFT 61
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC1_MASK 0x2000000000000000
-
-/* SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC2 */
-/* Description: NI vc2 tail timeout */
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC2_SHFT 62
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC2_MASK 0x4000000000000000
-
-/* SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC3 */
-/* Description: NI vc3 tail timeout */
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC3_SHFT 63
-#define SH_NI0_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC3_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_MASK_2" */
-/* ni0 Error Mask Bits */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_MASK_2 0x0000000150040550
-#define SH_NI0_ERROR_MASK_2_MASK 0x7fffffff003fffff
-#define SH_NI0_ERROR_MASK_2_INIT 0x7fffffff003fffff
-
-/* SH_NI0_ERROR_MASK_2_ILLEGAL_VCNI */
-/* Description: Illegal VC NI */
-#define SH_NI0_ERROR_MASK_2_ILLEGAL_VCNI_SHFT 0
-#define SH_NI0_ERROR_MASK_2_ILLEGAL_VCNI_MASK 0x0000000000000001
-
-/* SH_NI0_ERROR_MASK_2_ILLEGAL_VCPI */
-/* Description: Illegal VC PI */
-#define SH_NI0_ERROR_MASK_2_ILLEGAL_VCPI_SHFT 1
-#define SH_NI0_ERROR_MASK_2_ILLEGAL_VCPI_MASK 0x0000000000000002
-
-/* SH_NI0_ERROR_MASK_2_ILLEGAL_VCMD */
-/* Description: Illegal VC MD */
-#define SH_NI0_ERROR_MASK_2_ILLEGAL_VCMD_SHFT 2
-#define SH_NI0_ERROR_MASK_2_ILLEGAL_VCMD_MASK 0x0000000000000004
-
-/* SH_NI0_ERROR_MASK_2_ILLEGAL_VCIILB */
-/* Description: Illegal VC IILB */
-#define SH_NI0_ERROR_MASK_2_ILLEGAL_VCIILB_SHFT 3
-#define SH_NI0_ERROR_MASK_2_ILLEGAL_VCIILB_MASK 0x0000000000000008
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit underflow 0 */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit underflow 1 */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit underflow 2 */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit underflow 0 */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit underflow 1 */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit underflow 2 */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit underflow */
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI0_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC0 */
-/* Description: llp deadlock vc0 */
-#define SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC0_SHFT 56
-#define SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC0_MASK 0x0100000000000000
-
-/* SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC1 */
-/* Description: llp deadlock vc1 */
-#define SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC1_SHFT 57
-#define SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC1_MASK 0x0200000000000000
-
-/* SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC2 */
-/* Description: llp deadlock vc2 */
-#define SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC2_SHFT 58
-#define SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC2_MASK 0x0400000000000000
-
-/* SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC3 */
-/* Description: llp deadlock vc3 */
-#define SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC3_SHFT 59
-#define SH_NI0_ERROR_MASK_2_LLP_DEADLOCK_VC3_MASK 0x0800000000000000
-
-/* SH_NI0_ERROR_MASK_2_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_NI0_ERROR_MASK_2_CHIPLET_NOMATCH_SHFT 60
-#define SH_NI0_ERROR_MASK_2_CHIPLET_NOMATCH_MASK 0x1000000000000000
-
-/* SH_NI0_ERROR_MASK_2_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_NI0_ERROR_MASK_2_LUT_READ_ERROR_SHFT 61
-#define SH_NI0_ERROR_MASK_2_LUT_READ_ERROR_MASK 0x2000000000000000
-
-/* SH_NI0_ERROR_MASK_2_RETRY_TIMEOUT_ERROR */
-/* Description: Retry Timeout Error */
-#define SH_NI0_ERROR_MASK_2_RETRY_TIMEOUT_ERROR_SHFT 62
-#define SH_NI0_ERROR_MASK_2_RETRY_TIMEOUT_ERROR_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_FIRST_ERROR_1" */
-/* ni0 First Error Bits */
-/* ==================================================================== */
-
-#define SH_NI0_FIRST_ERROR_1 0x0000000150040560
-#define SH_NI0_FIRST_ERROR_1_MASK 0xffffffffffffffff
-#define SH_NI0_FIRST_ERROR_1_INIT 0xffffffffffffffff
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT0 */
-/* Description: Fifo 02 debit0 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT0_SHFT 0
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT0_MASK 0x0000000000000001
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT2 */
-/* Description: Fifo 02 debit2 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT2_SHFT 1
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT2_MASK 0x0000000000000002
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT0 */
-/* Description: Fifo 13 debit0 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT0_SHFT 2
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT0_MASK 0x0000000000000004
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT2 */
-/* Description: Fifo 13 debit2 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT2_SHFT 3
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT2_MASK 0x0000000000000008
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit overflow 0 */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit overflow 1 */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit overflow 2 */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit overflow 0 */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit overflow 1 */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit overflow 2 */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT0 */
-/* Description: PI Fifo debit0 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT0_SHFT 22
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT0_MASK 0x0000000000400000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT2 */
-/* Description: PI Fifo debit2 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT2_SHFT 23
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT2_MASK 0x0000000000800000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT0 */
-/* Description: IILB Fifo debit0 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT0_SHFT 24
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT0_MASK 0x0000000001000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT2 */
-/* Description: IILB Fifo debit2 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT2_SHFT 25
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT2_MASK 0x0000000002000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT0 */
-/* Description: MD Fifo debit0 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT0_SHFT 26
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT0_MASK 0x0000000004000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT2 */
-/* Description: MD Fifo debit2 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT2_SHFT 27
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT2_MASK 0x0000000008000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT0 */
-/* Description: NI Fifo debit0 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT0_SHFT 28
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT0_MASK 0x0000000010000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT1 */
-/* Description: NI Fifo debit1 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT1_SHFT 29
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT1_MASK 0x0000000020000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT2 */
-/* Description: NI Fifo debit2 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT2_SHFT 30
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT2_MASK 0x0000000040000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT3 */
-/* Description: NI Fifo debit3 overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT3_SHFT 31
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT3_MASK 0x0000000080000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit overflow */
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI0_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC0 */
-/* Description: Fifo02 vc0 tail timeout */
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC0_SHFT 56
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC0_MASK 0x0100000000000000
-
-/* SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC2 */
-/* Description: Fifo02 vc2 tail timeout */
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC2_SHFT 57
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC2_MASK 0x0200000000000000
-
-/* SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC1 */
-/* Description: Fifo13 vc1 tail timeout */
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC1_SHFT 58
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC1_MASK 0x0400000000000000
-
-/* SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC3 */
-/* Description: Fifo13 vc3 tail timeout */
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC3_SHFT 59
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC3_MASK 0x0800000000000000
-
-/* SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC0 */
-/* Description: NI vc0 tail timeout */
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC0_SHFT 60
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC0_MASK 0x1000000000000000
-
-/* SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC1 */
-/* Description: NI vc1 tail timeout */
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC1_SHFT 61
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC1_MASK 0x2000000000000000
-
-/* SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC2 */
-/* Description: NI vc2 tail timeout */
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC2_SHFT 62
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC2_MASK 0x4000000000000000
-
-/* SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC3 */
-/* Description: NI vc3 tail timeout */
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC3_SHFT 63
-#define SH_NI0_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC3_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_FIRST_ERROR_2" */
-/* ni0 First Error Bits */
-/* ==================================================================== */
-
-#define SH_NI0_FIRST_ERROR_2 0x0000000150040570
-#define SH_NI0_FIRST_ERROR_2_MASK 0x7fffffff003fffff
-#define SH_NI0_FIRST_ERROR_2_INIT 0x7fffffff003fffff
-
-/* SH_NI0_FIRST_ERROR_2_ILLEGAL_VCNI */
-/* Description: Illegal VC NI */
-#define SH_NI0_FIRST_ERROR_2_ILLEGAL_VCNI_SHFT 0
-#define SH_NI0_FIRST_ERROR_2_ILLEGAL_VCNI_MASK 0x0000000000000001
-
-/* SH_NI0_FIRST_ERROR_2_ILLEGAL_VCPI */
-/* Description: Illegal VC PI */
-#define SH_NI0_FIRST_ERROR_2_ILLEGAL_VCPI_SHFT 1
-#define SH_NI0_FIRST_ERROR_2_ILLEGAL_VCPI_MASK 0x0000000000000002
-
-/* SH_NI0_FIRST_ERROR_2_ILLEGAL_VCMD */
-/* Description: Illegal VC MD */
-#define SH_NI0_FIRST_ERROR_2_ILLEGAL_VCMD_SHFT 2
-#define SH_NI0_FIRST_ERROR_2_ILLEGAL_VCMD_MASK 0x0000000000000004
-
-/* SH_NI0_FIRST_ERROR_2_ILLEGAL_VCIILB */
-/* Description: Illegal VC IILB */
-#define SH_NI0_FIRST_ERROR_2_ILLEGAL_VCIILB_SHFT 3
-#define SH_NI0_FIRST_ERROR_2_ILLEGAL_VCIILB_MASK 0x0000000000000008
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit underflow 0 */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit underflow 1 */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit underflow 2 */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit underflow 0 */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit underflow 1 */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit underflow 2 */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit underflow */
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI0_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC0 */
-/* Description: llp deadlock vc0 */
-#define SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC0_SHFT 56
-#define SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC0_MASK 0x0100000000000000
-
-/* SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC1 */
-/* Description: llp deadlock vc1 */
-#define SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC1_SHFT 57
-#define SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC1_MASK 0x0200000000000000
-
-/* SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC2 */
-/* Description: llp deadlock vc2 */
-#define SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC2_SHFT 58
-#define SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC2_MASK 0x0400000000000000
-
-/* SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC3 */
-/* Description: llp deadlock vc3 */
-#define SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC3_SHFT 59
-#define SH_NI0_FIRST_ERROR_2_LLP_DEADLOCK_VC3_MASK 0x0800000000000000
-
-/* SH_NI0_FIRST_ERROR_2_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_NI0_FIRST_ERROR_2_CHIPLET_NOMATCH_SHFT 60
-#define SH_NI0_FIRST_ERROR_2_CHIPLET_NOMATCH_MASK 0x1000000000000000
-
-/* SH_NI0_FIRST_ERROR_2_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_NI0_FIRST_ERROR_2_LUT_READ_ERROR_SHFT 61
-#define SH_NI0_FIRST_ERROR_2_LUT_READ_ERROR_MASK 0x2000000000000000
-
-/* SH_NI0_FIRST_ERROR_2_RETRY_TIMEOUT_ERROR */
-/* Description: Retry Timeout Error */
-#define SH_NI0_FIRST_ERROR_2_RETRY_TIMEOUT_ERROR_SHFT 62
-#define SH_NI0_FIRST_ERROR_2_RETRY_TIMEOUT_ERROR_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_DETAIL_1" */
-/* ni0 Chiplet no match header bits 63:0 */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_DETAIL_1 0x0000000150040580
-#define SH_NI0_ERROR_DETAIL_1_MASK 0xffffffffffffffff
-#define SH_NI0_ERROR_DETAIL_1_INIT 0x0000000000000000
-
-/* SH_NI0_ERROR_DETAIL_1_HEADER */
-/* Description: Header bits 63:0 */
-#define SH_NI0_ERROR_DETAIL_1_HEADER_SHFT 0
-#define SH_NI0_ERROR_DETAIL_1_HEADER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_DETAIL_2" */
-/* ni0 Chiplet no match header bits 127:64 */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_DETAIL_2 0x0000000150040590
-#define SH_NI0_ERROR_DETAIL_2_MASK 0xffffffffffffffff
-#define SH_NI0_ERROR_DETAIL_2_INIT 0x0000000000000000
-
-/* SH_NI0_ERROR_DETAIL_2_HEADER */
-/* Description: Header bits 127:64 */
-#define SH_NI0_ERROR_DETAIL_2_HEADER_SHFT 0
-#define SH_NI0_ERROR_DETAIL_2_HEADER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_SUMMARY_1" */
-/* ni1 Error Summary Bits */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_SUMMARY_1 0x0000000150040600
-#define SH_NI1_ERROR_SUMMARY_1_MASK 0xffffffffffffffff
-#define SH_NI1_ERROR_SUMMARY_1_INIT 0xffffffffffffffff
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT0 */
-/* Description: Fifo 02 debit0 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT0_SHFT 0
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT0_MASK 0x0000000000000001
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT2 */
-/* Description: Fifo 02 debit2 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT2_SHFT 1
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_DEBIT2_MASK 0x0000000000000002
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT0 */
-/* Description: Fifo 13 debit0 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT0_SHFT 2
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT0_MASK 0x0000000000000004
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT2 */
-/* Description: Fifo 13 debit2 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT2_SHFT 3
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_DEBIT2_MASK 0x0000000000000008
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit overflow 0 */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit overflow 1 */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit overflow 2 */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit overflow 0 */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit overflow 1 */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit overflow 2 */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT0 */
-/* Description: PI Fifo debit0 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT0_SHFT 22
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT0_MASK 0x0000000000400000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT2 */
-/* Description: PI Fifo debit2 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT2_SHFT 23
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_DEBIT2_MASK 0x0000000000800000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT0 */
-/* Description: IILB Fifo debit0 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT0_SHFT 24
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT0_MASK 0x0000000001000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT2 */
-/* Description: IILB Fifo debit2 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT2_SHFT 25
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_DEBIT2_MASK 0x0000000002000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT0 */
-/* Description: MD Fifo debit0 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT0_SHFT 26
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT0_MASK 0x0000000004000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT2 */
-/* Description: MD Fifo debit2 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT2_SHFT 27
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_DEBIT2_MASK 0x0000000008000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT0 */
-/* Description: NI Fifo debit0 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT0_SHFT 28
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT0_MASK 0x0000000010000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT1 */
-/* Description: NI Fifo debit1 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT1_SHFT 29
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT1_MASK 0x0000000020000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT2 */
-/* Description: NI Fifo debit2 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT2_SHFT 30
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT2_MASK 0x0000000040000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT3 */
-/* Description: NI Fifo debit3 overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT3_SHFT 31
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_DEBIT3_MASK 0x0000000080000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit overflow */
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI1_ERROR_SUMMARY_1_OVERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC0 */
-/* Description: Fifo02 vc0 tail timeout */
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC0_SHFT 56
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC0_MASK 0x0100000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC2 */
-/* Description: Fifo02 vc2 tail timeout */
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC2_SHFT 57
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO02_VC2_MASK 0x0200000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC1 */
-/* Description: Fifo13 vc1 tail timeout */
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC1_SHFT 58
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC1_MASK 0x0400000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC3 */
-/* Description: Fifo13 vc3 tail timeout */
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC3_SHFT 59
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_FIFO13_VC3_MASK 0x0800000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC0 */
-/* Description: NI vc0 tail timeout */
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC0_SHFT 60
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC0_MASK 0x1000000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC1 */
-/* Description: NI vc1 tail timeout */
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC1_SHFT 61
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC1_MASK 0x2000000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC2 */
-/* Description: NI vc2 tail timeout */
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC2_SHFT 62
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC2_MASK 0x4000000000000000
-
-/* SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC3 */
-/* Description: NI vc3 tail timeout */
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC3_SHFT 63
-#define SH_NI1_ERROR_SUMMARY_1_TAIL_TIMEOUT_NI_VC3_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_SUMMARY_1_ALIAS" */
-/* ni1 Error Summary Bits Alias */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_SUMMARY_1_ALIAS 0x0000000150040608
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_SUMMARY_2" */
-/* ni1 Error Summary Bits */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_SUMMARY_2 0x0000000150040610
-#define SH_NI1_ERROR_SUMMARY_2_MASK 0x7fffffff003fffff
-#define SH_NI1_ERROR_SUMMARY_2_INIT 0x7fffffff003fffff
-
-/* SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCNI */
-/* Description: Illegal VC NI */
-#define SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCNI_SHFT 0
-#define SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCNI_MASK 0x0000000000000001
-
-/* SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCPI */
-/* Description: Illegal VC PI */
-#define SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCPI_SHFT 1
-#define SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCPI_MASK 0x0000000000000002
-
-/* SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCMD */
-/* Description: Illegal VC MD */
-#define SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCMD_SHFT 2
-#define SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCMD_MASK 0x0000000000000004
-
-/* SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCIILB */
-/* Description: Illegal VC IILB */
-#define SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCIILB_SHFT 3
-#define SH_NI1_ERROR_SUMMARY_2_ILLEGAL_VCIILB_MASK 0x0000000000000008
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit underflow 0 */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit underflow 1 */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit underflow 2 */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit underflow 0 */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit underflow 1 */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit underflow 2 */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit underflow */
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI1_ERROR_SUMMARY_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC0 */
-/* Description: llp deadlock vc0 */
-#define SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC0_SHFT 56
-#define SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC0_MASK 0x0100000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC1 */
-/* Description: llp deadlock vc1 */
-#define SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC1_SHFT 57
-#define SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC1_MASK 0x0200000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC2 */
-/* Description: llp deadlock vc2 */
-#define SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC2_SHFT 58
-#define SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC2_MASK 0x0400000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC3 */
-/* Description: llp deadlock vc3 */
-#define SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC3_SHFT 59
-#define SH_NI1_ERROR_SUMMARY_2_LLP_DEADLOCK_VC3_MASK 0x0800000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_NI1_ERROR_SUMMARY_2_CHIPLET_NOMATCH_SHFT 60
-#define SH_NI1_ERROR_SUMMARY_2_CHIPLET_NOMATCH_MASK 0x1000000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_NI1_ERROR_SUMMARY_2_LUT_READ_ERROR_SHFT 61
-#define SH_NI1_ERROR_SUMMARY_2_LUT_READ_ERROR_MASK 0x2000000000000000
-
-/* SH_NI1_ERROR_SUMMARY_2_RETRY_TIMEOUT_ERROR */
-/* Description: Retry Timeout Error */
-#define SH_NI1_ERROR_SUMMARY_2_RETRY_TIMEOUT_ERROR_SHFT 62
-#define SH_NI1_ERROR_SUMMARY_2_RETRY_TIMEOUT_ERROR_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_SUMMARY_2_ALIAS" */
-/* ni1 Error Summary Bits Alias */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_SUMMARY_2_ALIAS 0x0000000150040618
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_OVERFLOW_1" */
-/* ni1 Error Overflow Bits */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_OVERFLOW_1 0x0000000150040620
-#define SH_NI1_ERROR_OVERFLOW_1_MASK 0xffffffffffffffff
-#define SH_NI1_ERROR_OVERFLOW_1_INIT 0xffffffffffffffff
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT0 */
-/* Description: Fifo 02 debit0 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT0_SHFT 0
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT0_MASK 0x0000000000000001
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT2 */
-/* Description: Fifo 02 debit2 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT2_SHFT 1
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_DEBIT2_MASK 0x0000000000000002
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT0 */
-/* Description: Fifo 13 debit0 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT0_SHFT 2
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT0_MASK 0x0000000000000004
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT2 */
-/* Description: Fifo 13 debit2 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT2_SHFT 3
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_DEBIT2_MASK 0x0000000000000008
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit overflow 0 */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit overflow 1 */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit overflow 2 */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit overflow 0 */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit overflow 1 */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit overflow 2 */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT0 */
-/* Description: PI Fifo debit0 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT0_SHFT 22
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT0_MASK 0x0000000000400000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT2 */
-/* Description: PI Fifo debit2 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT2_SHFT 23
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_DEBIT2_MASK 0x0000000000800000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT0 */
-/* Description: IILB Fifo debit0 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT0_SHFT 24
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT0_MASK 0x0000000001000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT2 */
-/* Description: IILB Fifo debit2 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT2_SHFT 25
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_DEBIT2_MASK 0x0000000002000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT0 */
-/* Description: MD Fifo debit0 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT0_SHFT 26
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT0_MASK 0x0000000004000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT2 */
-/* Description: MD Fifo debit2 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT2_SHFT 27
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_DEBIT2_MASK 0x0000000008000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT0 */
-/* Description: NI Fifo debit0 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT0_SHFT 28
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT0_MASK 0x0000000010000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT1 */
-/* Description: NI Fifo debit1 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT1_SHFT 29
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT1_MASK 0x0000000020000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT2 */
-/* Description: NI Fifo debit2 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT2_SHFT 30
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT2_MASK 0x0000000040000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT3 */
-/* Description: NI Fifo debit3 overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT3_SHFT 31
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_DEBIT3_MASK 0x0000000080000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit overflow */
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI1_ERROR_OVERFLOW_1_OVERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC0 */
-/* Description: Fifo02 vc0 tail timeout */
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC0_SHFT 56
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC0_MASK 0x0100000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC2 */
-/* Description: Fifo02 vc2 tail timeout */
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC2_SHFT 57
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO02_VC2_MASK 0x0200000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC1 */
-/* Description: Fifo13 vc1 tail timeout */
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC1_SHFT 58
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC1_MASK 0x0400000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC3 */
-/* Description: Fifo13 vc3 tail timeout */
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC3_SHFT 59
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_FIFO13_VC3_MASK 0x0800000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC0 */
-/* Description: NI vc0 tail timeout */
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC0_SHFT 60
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC0_MASK 0x1000000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC1 */
-/* Description: NI vc1 tail timeout */
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC1_SHFT 61
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC1_MASK 0x2000000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC2 */
-/* Description: NI vc2 tail timeout */
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC2_SHFT 62
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC2_MASK 0x4000000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC3 */
-/* Description: NI vc3 tail timeout */
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC3_SHFT 63
-#define SH_NI1_ERROR_OVERFLOW_1_TAIL_TIMEOUT_NI_VC3_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_OVERFLOW_1_ALIAS" */
-/* ni1 Error Overflow Bits Alias */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_OVERFLOW_1_ALIAS 0x0000000150040628
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_OVERFLOW_2" */
-/* ni1 Error Overflow Bits */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_OVERFLOW_2 0x0000000150040630
-#define SH_NI1_ERROR_OVERFLOW_2_MASK 0x7fffffff003fffff
-#define SH_NI1_ERROR_OVERFLOW_2_INIT 0x7fffffff003fffff
-
-/* SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCNI */
-/* Description: Illegal VC NI */
-#define SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCNI_SHFT 0
-#define SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCNI_MASK 0x0000000000000001
-
-/* SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCPI */
-/* Description: Illegal VC PI */
-#define SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCPI_SHFT 1
-#define SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCPI_MASK 0x0000000000000002
-
-/* SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCMD */
-/* Description: Illegal VC MD */
-#define SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCMD_SHFT 2
-#define SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCMD_MASK 0x0000000000000004
-
-/* SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCIILB */
-/* Description: Illegal VC IILB */
-#define SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCIILB_SHFT 3
-#define SH_NI1_ERROR_OVERFLOW_2_ILLEGAL_VCIILB_MASK 0x0000000000000008
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit underflow 0 */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit underflow 1 */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit underflow 2 */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit underflow 0 */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit underflow 1 */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit underflow 2 */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit underflow */
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI1_ERROR_OVERFLOW_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC0 */
-/* Description: llp deadlock vc0 */
-#define SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC0_SHFT 56
-#define SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC0_MASK 0x0100000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC1 */
-/* Description: llp deadlock vc1 */
-#define SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC1_SHFT 57
-#define SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC1_MASK 0x0200000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC2 */
-/* Description: llp deadlock vc2 */
-#define SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC2_SHFT 58
-#define SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC2_MASK 0x0400000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC3 */
-/* Description: llp deadlock vc3 */
-#define SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC3_SHFT 59
-#define SH_NI1_ERROR_OVERFLOW_2_LLP_DEADLOCK_VC3_MASK 0x0800000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_NI1_ERROR_OVERFLOW_2_CHIPLET_NOMATCH_SHFT 60
-#define SH_NI1_ERROR_OVERFLOW_2_CHIPLET_NOMATCH_MASK 0x1000000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_NI1_ERROR_OVERFLOW_2_LUT_READ_ERROR_SHFT 61
-#define SH_NI1_ERROR_OVERFLOW_2_LUT_READ_ERROR_MASK 0x2000000000000000
-
-/* SH_NI1_ERROR_OVERFLOW_2_RETRY_TIMEOUT_ERROR */
-/* Description: Retry Timeout Error */
-#define SH_NI1_ERROR_OVERFLOW_2_RETRY_TIMEOUT_ERROR_SHFT 62
-#define SH_NI1_ERROR_OVERFLOW_2_RETRY_TIMEOUT_ERROR_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_OVERFLOW_2_ALIAS" */
-/* ni1 Error Overflow Bits Alias */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_OVERFLOW_2_ALIAS 0x0000000150040638
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_MASK_1" */
-/* ni1 Error Mask Bits */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_MASK_1 0x0000000150040640
-#define SH_NI1_ERROR_MASK_1_MASK 0xffffffffffffffff
-#define SH_NI1_ERROR_MASK_1_INIT 0xffffffffffffffff
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT0 */
-/* Description: Fifo 02 debit0 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT0_SHFT 0
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT0_MASK 0x0000000000000001
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT2 */
-/* Description: Fifo 02 debit2 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT2_SHFT 1
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_DEBIT2_MASK 0x0000000000000002
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT0 */
-/* Description: Fifo 13 debit0 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT0_SHFT 2
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT0_MASK 0x0000000000000004
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT2 */
-/* Description: Fifo 13 debit2 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT2_SHFT 3
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_DEBIT2_MASK 0x0000000000000008
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit overflow 0 */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI1_ERROR_MASK_1_OVERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit overflow 1 */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI1_ERROR_MASK_1_OVERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit overflow 2 */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI1_ERROR_MASK_1_OVERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit overflow 0 */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI1_ERROR_MASK_1_OVERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit overflow 1 */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI1_ERROR_MASK_1_OVERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit overflow 2 */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI1_ERROR_MASK_1_OVERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT0 */
-/* Description: PI Fifo debit0 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT0_SHFT 22
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT0_MASK 0x0000000000400000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT2 */
-/* Description: PI Fifo debit2 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT2_SHFT 23
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_DEBIT2_MASK 0x0000000000800000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT0 */
-/* Description: IILB Fifo debit0 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT0_SHFT 24
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT0_MASK 0x0000000001000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT2 */
-/* Description: IILB Fifo debit2 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT2_SHFT 25
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_DEBIT2_MASK 0x0000000002000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT0 */
-/* Description: MD Fifo debit0 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT0_SHFT 26
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT0_MASK 0x0000000004000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT2 */
-/* Description: MD Fifo debit2 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT2_SHFT 27
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_DEBIT2_MASK 0x0000000008000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT0 */
-/* Description: NI Fifo debit0 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT0_SHFT 28
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT0_MASK 0x0000000010000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT1 */
-/* Description: NI Fifo debit1 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT1_SHFT 29
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT1_MASK 0x0000000020000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT2 */
-/* Description: NI Fifo debit2 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT2_SHFT 30
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT2_MASK 0x0000000040000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT3 */
-/* Description: NI Fifo debit3 overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT3_SHFT 31
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_DEBIT3_MASK 0x0000000080000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit overflow */
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI1_ERROR_MASK_1_OVERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC0 */
-/* Description: Fifo02 vc0 tail timeout */
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC0_SHFT 56
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC0_MASK 0x0100000000000000
-
-/* SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC2 */
-/* Description: Fifo02 vc2 tail timeout */
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC2_SHFT 57
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO02_VC2_MASK 0x0200000000000000
-
-/* SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC1 */
-/* Description: Fifo13 vc1 tail timeout */
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC1_SHFT 58
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC1_MASK 0x0400000000000000
-
-/* SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC3 */
-/* Description: Fifo13 vc3 tail timeout */
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC3_SHFT 59
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_FIFO13_VC3_MASK 0x0800000000000000
-
-/* SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC0 */
-/* Description: NI vc0 tail timeout */
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC0_SHFT 60
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC0_MASK 0x1000000000000000
-
-/* SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC1 */
-/* Description: NI vc1 tail timeout */
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC1_SHFT 61
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC1_MASK 0x2000000000000000
-
-/* SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC2 */
-/* Description: NI vc2 tail timeout */
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC2_SHFT 62
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC2_MASK 0x4000000000000000
-
-/* SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC3 */
-/* Description: NI vc3 tail timeout */
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC3_SHFT 63
-#define SH_NI1_ERROR_MASK_1_TAIL_TIMEOUT_NI_VC3_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_MASK_2" */
-/* ni1 Error Mask Bits */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_MASK_2 0x0000000150040650
-#define SH_NI1_ERROR_MASK_2_MASK 0x7fffffff003fffff
-#define SH_NI1_ERROR_MASK_2_INIT 0x7fffffff003fffff
-
-/* SH_NI1_ERROR_MASK_2_ILLEGAL_VCNI */
-/* Description: Illegal VC NI */
-#define SH_NI1_ERROR_MASK_2_ILLEGAL_VCNI_SHFT 0
-#define SH_NI1_ERROR_MASK_2_ILLEGAL_VCNI_MASK 0x0000000000000001
-
-/* SH_NI1_ERROR_MASK_2_ILLEGAL_VCPI */
-/* Description: Illegal VC PI */
-#define SH_NI1_ERROR_MASK_2_ILLEGAL_VCPI_SHFT 1
-#define SH_NI1_ERROR_MASK_2_ILLEGAL_VCPI_MASK 0x0000000000000002
-
-/* SH_NI1_ERROR_MASK_2_ILLEGAL_VCMD */
-/* Description: Illegal VC MD */
-#define SH_NI1_ERROR_MASK_2_ILLEGAL_VCMD_SHFT 2
-#define SH_NI1_ERROR_MASK_2_ILLEGAL_VCMD_MASK 0x0000000000000004
-
-/* SH_NI1_ERROR_MASK_2_ILLEGAL_VCIILB */
-/* Description: Illegal VC IILB */
-#define SH_NI1_ERROR_MASK_2_ILLEGAL_VCIILB_SHFT 3
-#define SH_NI1_ERROR_MASK_2_ILLEGAL_VCIILB_MASK 0x0000000000000008
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit underflow 0 */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit underflow 1 */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit underflow 2 */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit underflow 0 */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit underflow 1 */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit underflow 2 */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit underflow */
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI1_ERROR_MASK_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC0 */
-/* Description: llp deadlock vc0 */
-#define SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC0_SHFT 56
-#define SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC0_MASK 0x0100000000000000
-
-/* SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC1 */
-/* Description: llp deadlock vc1 */
-#define SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC1_SHFT 57
-#define SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC1_MASK 0x0200000000000000
-
-/* SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC2 */
-/* Description: llp deadlock vc2 */
-#define SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC2_SHFT 58
-#define SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC2_MASK 0x0400000000000000
-
-/* SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC3 */
-/* Description: llp deadlock vc3 */
-#define SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC3_SHFT 59
-#define SH_NI1_ERROR_MASK_2_LLP_DEADLOCK_VC3_MASK 0x0800000000000000
-
-/* SH_NI1_ERROR_MASK_2_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_NI1_ERROR_MASK_2_CHIPLET_NOMATCH_SHFT 60
-#define SH_NI1_ERROR_MASK_2_CHIPLET_NOMATCH_MASK 0x1000000000000000
-
-/* SH_NI1_ERROR_MASK_2_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_NI1_ERROR_MASK_2_LUT_READ_ERROR_SHFT 61
-#define SH_NI1_ERROR_MASK_2_LUT_READ_ERROR_MASK 0x2000000000000000
-
-/* SH_NI1_ERROR_MASK_2_RETRY_TIMEOUT_ERROR */
-/* Description: Retry Timeout Error */
-#define SH_NI1_ERROR_MASK_2_RETRY_TIMEOUT_ERROR_SHFT 62
-#define SH_NI1_ERROR_MASK_2_RETRY_TIMEOUT_ERROR_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_FIRST_ERROR_1" */
-/* ni1 First Error Bits */
-/* ==================================================================== */
-
-#define SH_NI1_FIRST_ERROR_1 0x0000000150040660
-#define SH_NI1_FIRST_ERROR_1_MASK 0xffffffffffffffff
-#define SH_NI1_FIRST_ERROR_1_INIT 0xffffffffffffffff
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT0 */
-/* Description: Fifo 02 debit0 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT0_SHFT 0
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT0_MASK 0x0000000000000001
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT2 */
-/* Description: Fifo 02 debit2 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT2_SHFT 1
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_DEBIT2_MASK 0x0000000000000002
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT0 */
-/* Description: Fifo 13 debit0 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT0_SHFT 2
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT0_MASK 0x0000000000000004
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT2 */
-/* Description: Fifo 13 debit2 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT2_SHFT 3
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_DEBIT2_MASK 0x0000000000000008
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit overflow 0 */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit overflow 1 */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit overflow 2 */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit overflow 0 */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit overflow 1 */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit overflow 2 */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT0 */
-/* Description: PI Fifo debit0 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT0_SHFT 22
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT0_MASK 0x0000000000400000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT2 */
-/* Description: PI Fifo debit2 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT2_SHFT 23
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_DEBIT2_MASK 0x0000000000800000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT0 */
-/* Description: IILB Fifo debit0 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT0_SHFT 24
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT0_MASK 0x0000000001000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT2 */
-/* Description: IILB Fifo debit2 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT2_SHFT 25
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_DEBIT2_MASK 0x0000000002000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT0 */
-/* Description: MD Fifo debit0 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT0_SHFT 26
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT0_MASK 0x0000000004000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT2 */
-/* Description: MD Fifo debit2 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT2_SHFT 27
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_DEBIT2_MASK 0x0000000008000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT0 */
-/* Description: NI Fifo debit0 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT0_SHFT 28
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT0_MASK 0x0000000010000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT1 */
-/* Description: NI Fifo debit1 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT1_SHFT 29
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT1_MASK 0x0000000020000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT2 */
-/* Description: NI Fifo debit2 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT2_SHFT 30
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT2_MASK 0x0000000040000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT3 */
-/* Description: NI Fifo debit3 overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT3_SHFT 31
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_DEBIT3_MASK 0x0000000080000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit overflow */
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI1_FIRST_ERROR_1_OVERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC0 */
-/* Description: Fifo02 vc0 tail timeout */
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC0_SHFT 56
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC0_MASK 0x0100000000000000
-
-/* SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC2 */
-/* Description: Fifo02 vc2 tail timeout */
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC2_SHFT 57
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO02_VC2_MASK 0x0200000000000000
-
-/* SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC1 */
-/* Description: Fifo13 vc1 tail timeout */
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC1_SHFT 58
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC1_MASK 0x0400000000000000
-
-/* SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC3 */
-/* Description: Fifo13 vc3 tail timeout */
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC3_SHFT 59
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_FIFO13_VC3_MASK 0x0800000000000000
-
-/* SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC0 */
-/* Description: NI vc0 tail timeout */
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC0_SHFT 60
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC0_MASK 0x1000000000000000
-
-/* SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC1 */
-/* Description: NI vc1 tail timeout */
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC1_SHFT 61
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC1_MASK 0x2000000000000000
-
-/* SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC2 */
-/* Description: NI vc2 tail timeout */
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC2_SHFT 62
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC2_MASK 0x4000000000000000
-
-/* SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC3 */
-/* Description: NI vc3 tail timeout */
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC3_SHFT 63
-#define SH_NI1_FIRST_ERROR_1_TAIL_TIMEOUT_NI_VC3_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_FIRST_ERROR_2" */
-/* ni1 First Error Bits */
-/* ==================================================================== */
-
-#define SH_NI1_FIRST_ERROR_2 0x0000000150040670
-#define SH_NI1_FIRST_ERROR_2_MASK 0x7fffffff003fffff
-#define SH_NI1_FIRST_ERROR_2_INIT 0x7fffffff003fffff
-
-/* SH_NI1_FIRST_ERROR_2_ILLEGAL_VCNI */
-/* Description: Illegal VC NI */
-#define SH_NI1_FIRST_ERROR_2_ILLEGAL_VCNI_SHFT 0
-#define SH_NI1_FIRST_ERROR_2_ILLEGAL_VCNI_MASK 0x0000000000000001
-
-/* SH_NI1_FIRST_ERROR_2_ILLEGAL_VCPI */
-/* Description: Illegal VC PI */
-#define SH_NI1_FIRST_ERROR_2_ILLEGAL_VCPI_SHFT 1
-#define SH_NI1_FIRST_ERROR_2_ILLEGAL_VCPI_MASK 0x0000000000000002
-
-/* SH_NI1_FIRST_ERROR_2_ILLEGAL_VCMD */
-/* Description: Illegal VC MD */
-#define SH_NI1_FIRST_ERROR_2_ILLEGAL_VCMD_SHFT 2
-#define SH_NI1_FIRST_ERROR_2_ILLEGAL_VCMD_MASK 0x0000000000000004
-
-/* SH_NI1_FIRST_ERROR_2_ILLEGAL_VCIILB */
-/* Description: Illegal VC IILB */
-#define SH_NI1_FIRST_ERROR_2_ILLEGAL_VCIILB_SHFT 3
-#define SH_NI1_FIRST_ERROR_2_ILLEGAL_VCIILB_MASK 0x0000000000000008
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_POP */
-/* Description: Fifo 02 vc0 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_POP_SHFT 4
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_POP_MASK 0x0000000000000010
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_POP */
-/* Description: Fifo 02 vc2 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_POP_SHFT 5
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_POP_MASK 0x0000000000000020
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_POP */
-/* Description: Fifo 13 vc1 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_POP_SHFT 6
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_POP_MASK 0x0000000000000040
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_POP */
-/* Description: Fifo 13 vc3 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_POP_SHFT 7
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_POP_MASK 0x0000000000000080
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_PUSH */
-/* Description: Fifo 02 vc0 push underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_PUSH_SHFT 8
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_PUSH_MASK 0x0000000000000100
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_PUSH */
-/* Description: Fifo 02 vc2 push underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_PUSH_SHFT 9
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_PUSH_MASK 0x0000000000000200
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_PUSH */
-/* Description: Fifo 13 vc1 push underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_PUSH_SHFT 10
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC1_PUSH_MASK 0x0000000000000400
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_PUSH */
-/* Description: Fifo 13 vc3 push underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_PUSH_SHFT 11
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC3_PUSH_MASK 0x0000000000000800
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_CREDIT */
-/* Description: Fifo 02 vc0 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_CREDIT_SHFT 12
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_CREDIT */
-/* Description: Fifo 02 vc2 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_CREDIT_SHFT 13
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO02_VC2_CREDIT_MASK 0x0000000000002000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC0_CREDIT */
-/* Description: Fifo 13 vc0 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC0_CREDIT_SHFT 14
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC0_CREDIT_MASK 0x0000000000004000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC2_CREDIT */
-/* Description: Fifo 13 vc2 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC2_CREDIT_SHFT 15
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_FIFO13_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW0_VC0_CREDIT */
-/* Description: VC0 credit underflow 0 */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW0_VC0_CREDIT_SHFT 16
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW0_VC0_CREDIT_MASK 0x0000000000010000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW1_VC0_CREDIT */
-/* Description: VC0 credit underflow 1 */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW1_VC0_CREDIT_SHFT 17
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW1_VC0_CREDIT_MASK 0x0000000000020000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW2_VC0_CREDIT */
-/* Description: VC0 credit underflow 2 */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW2_VC0_CREDIT_SHFT 18
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW2_VC0_CREDIT_MASK 0x0000000000040000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW0_VC2_CREDIT */
-/* Description: VC2 credit underflow 0 */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW0_VC2_CREDIT_SHFT 19
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW0_VC2_CREDIT_MASK 0x0000000000080000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW1_VC2_CREDIT */
-/* Description: VC2 credit underflow 1 */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW1_VC2_CREDIT_SHFT 20
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW1_VC2_CREDIT_MASK 0x0000000000100000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW2_VC2_CREDIT */
-/* Description: VC2 credit underflow 2 */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW2_VC2_CREDIT_SHFT 21
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW2_VC2_CREDIT_MASK 0x0000000000200000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_POP */
-/* Description: PI Fifo vc0 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_POP_SHFT 32
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_POP_MASK 0x0000000100000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_POP */
-/* Description: PI Fifo vc2 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_POP_SHFT 33
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_POP_MASK 0x0000000200000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_POP */
-/* Description: IILB Fifo vc0 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_POP_SHFT 34
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_POP_MASK 0x0000000400000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_POP */
-/* Description: IILB Fifo vc2 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_POP_SHFT 35
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_POP_MASK 0x0000000800000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_POP */
-/* Description: MD Fifo vc0 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_POP_SHFT 36
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_POP_MASK 0x0000001000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_POP */
-/* Description: MD Fifo vc2 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_POP_SHFT 37
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_POP_MASK 0x0000002000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_POP */
-/* Description: NI Fifo vc0 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_POP_SHFT 38
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_POP_MASK 0x0000004000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_POP */
-/* Description: NI Fifo vc2 pop underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_POP_SHFT 39
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_POP_MASK 0x0000008000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_PUSH */
-/* Description: PI Fifo vc0 push underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_PUSH_SHFT 40
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_PUSH_MASK 0x0000010000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_PUSH */
-/* Description: PI Fifo vc2 push underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_PUSH_SHFT 41
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_PUSH_MASK 0x0000020000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_PUSH */
-/* Description: IILB Fifo vc0 push underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_SHFT 42
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_PUSH_MASK 0x0000040000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_PUSH */
-/* Description: IILB Fifo vc2 push underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_SHFT 43
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_PUSH_MASK 0x0000080000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_PUSH */
-/* Description: MD Fifo vc0 push underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_PUSH_SHFT 44
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_PUSH_MASK 0x0000100000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_PUSH */
-/* Description: MD Fifo vc2 push underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_PUSH_SHFT 45
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_PUSH_MASK 0x0000200000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_CREDIT */
-/* Description: PI Fifo vc0 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_SHFT 46
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_CREDIT */
-/* Description: PI Fifo vc2 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_SHFT 47
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_PI_FIFO_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT */
-/* Description: IILB Fifo vc0 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_SHFT 48
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC0_CREDIT_MASK 0x0001000000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT */
-/* Description: IILB Fifo vc2 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_SHFT 49
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_IILB_FIFO_VC2_CREDIT_MASK 0x0002000000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_CREDIT */
-/* Description: MD Fifo vc0 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_SHFT 50
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC0_CREDIT_MASK 0x0004000000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_CREDIT */
-/* Description: MD Fifo vc2 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_SHFT 51
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_MD_FIFO_VC2_CREDIT_MASK 0x0008000000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_CREDIT */
-/* Description: NI Fifo vc0 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_SHFT 52
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC0_CREDIT_MASK 0x0010000000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC1_CREDIT */
-/* Description: NI Fifo vc1 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_SHFT 53
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC1_CREDIT_MASK 0x0020000000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_CREDIT */
-/* Description: NI Fifo vc2 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_SHFT 54
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC2_CREDIT_MASK 0x0040000000000000
-
-/* SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC3_CREDIT */
-/* Description: NI Fifo vc3 credit underflow */
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_SHFT 55
-#define SH_NI1_FIRST_ERROR_2_UNDERFLOW_NI_FIFO_VC3_CREDIT_MASK 0x0080000000000000
-
-/* SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC0 */
-/* Description: llp deadlock vc0 */
-#define SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC0_SHFT 56
-#define SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC0_MASK 0x0100000000000000
-
-/* SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC1 */
-/* Description: llp deadlock vc1 */
-#define SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC1_SHFT 57
-#define SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC1_MASK 0x0200000000000000
-
-/* SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC2 */
-/* Description: llp deadlock vc2 */
-#define SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC2_SHFT 58
-#define SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC2_MASK 0x0400000000000000
-
-/* SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC3 */
-/* Description: llp deadlock vc3 */
-#define SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC3_SHFT 59
-#define SH_NI1_FIRST_ERROR_2_LLP_DEADLOCK_VC3_MASK 0x0800000000000000
-
-/* SH_NI1_FIRST_ERROR_2_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_NI1_FIRST_ERROR_2_CHIPLET_NOMATCH_SHFT 60
-#define SH_NI1_FIRST_ERROR_2_CHIPLET_NOMATCH_MASK 0x1000000000000000
-
-/* SH_NI1_FIRST_ERROR_2_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_NI1_FIRST_ERROR_2_LUT_READ_ERROR_SHFT 61
-#define SH_NI1_FIRST_ERROR_2_LUT_READ_ERROR_MASK 0x2000000000000000
-
-/* SH_NI1_FIRST_ERROR_2_RETRY_TIMEOUT_ERROR */
-/* Description: Retry Timeout Error */
-#define SH_NI1_FIRST_ERROR_2_RETRY_TIMEOUT_ERROR_SHFT 62
-#define SH_NI1_FIRST_ERROR_2_RETRY_TIMEOUT_ERROR_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_DETAIL_1" */
-/* ni1 Chiplet no match header bits 63:0 */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_DETAIL_1 0x0000000150040680
-#define SH_NI1_ERROR_DETAIL_1_MASK 0xffffffffffffffff
-#define SH_NI1_ERROR_DETAIL_1_INIT 0x0000000000000000
-
-/* SH_NI1_ERROR_DETAIL_1_HEADER */
-/* Description: Header bits 63:0 */
-#define SH_NI1_ERROR_DETAIL_1_HEADER_SHFT 0
-#define SH_NI1_ERROR_DETAIL_1_HEADER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_DETAIL_2" */
-/* ni1 Chiplet no match header bits 127:64 */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_DETAIL_2 0x0000000150040690
-#define SH_NI1_ERROR_DETAIL_2_MASK 0xffffffffffffffff
-#define SH_NI1_ERROR_DETAIL_2_INIT 0x0000000000000000
-
-/* SH_NI1_ERROR_DETAIL_2_HEADER */
-/* Description: Header bits 127:64 */
-#define SH_NI1_ERROR_DETAIL_2_HEADER_SHFT 0
-#define SH_NI1_ERROR_DETAIL_2_HEADER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_CORRECTED_DETAIL_1" */
-/* Corrected error details */
-/* ==================================================================== */
-
-#define SH_XN_CORRECTED_DETAIL_1 0x0000000150040070
-#define SH_XN_CORRECTED_DETAIL_1_MASK 0x0fff0fff0fff0fff
-#define SH_XN_CORRECTED_DETAIL_1_INIT 0x0000000000000000
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC0_SYNDROME */
-/* Description: ECC0 Syndrome */
-#define SH_XN_CORRECTED_DETAIL_1_ECC0_SYNDROME_SHFT 0
-#define SH_XN_CORRECTED_DETAIL_1_ECC0_SYNDROME_MASK 0x00000000000000ff
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC0_WC */
-/* Description: ECC0 Word Count */
-#define SH_XN_CORRECTED_DETAIL_1_ECC0_WC_SHFT 8
-#define SH_XN_CORRECTED_DETAIL_1_ECC0_WC_MASK 0x0000000000000300
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC0_VC */
-/* Description: ECC0 Virtual Channel */
-#define SH_XN_CORRECTED_DETAIL_1_ECC0_VC_SHFT 10
-#define SH_XN_CORRECTED_DETAIL_1_ECC0_VC_MASK 0x0000000000000c00
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC1_SYNDROME */
-/* Description: ECC1 Syndrome */
-#define SH_XN_CORRECTED_DETAIL_1_ECC1_SYNDROME_SHFT 16
-#define SH_XN_CORRECTED_DETAIL_1_ECC1_SYNDROME_MASK 0x0000000000ff0000
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC1_WC */
-/* Description: ECC1 Word Count */
-#define SH_XN_CORRECTED_DETAIL_1_ECC1_WC_SHFT 24
-#define SH_XN_CORRECTED_DETAIL_1_ECC1_WC_MASK 0x0000000003000000
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC1_VC */
-/* Description: ECC1 Virtual Channel */
-#define SH_XN_CORRECTED_DETAIL_1_ECC1_VC_SHFT 26
-#define SH_XN_CORRECTED_DETAIL_1_ECC1_VC_MASK 0x000000000c000000
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC2_SYNDROME */
-/* Description: ECC2 Syndrome */
-#define SH_XN_CORRECTED_DETAIL_1_ECC2_SYNDROME_SHFT 32
-#define SH_XN_CORRECTED_DETAIL_1_ECC2_SYNDROME_MASK 0x000000ff00000000
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC2_WC */
-/* Description: ECC2 Word Count */
-#define SH_XN_CORRECTED_DETAIL_1_ECC2_WC_SHFT 40
-#define SH_XN_CORRECTED_DETAIL_1_ECC2_WC_MASK 0x0000030000000000
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC2_VC */
-/* Description: ECC2 Virtual Channel */
-#define SH_XN_CORRECTED_DETAIL_1_ECC2_VC_SHFT 42
-#define SH_XN_CORRECTED_DETAIL_1_ECC2_VC_MASK 0x00000c0000000000
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC3_SYNDROME */
-/* Description: ECC3 Syndrome */
-#define SH_XN_CORRECTED_DETAIL_1_ECC3_SYNDROME_SHFT 48
-#define SH_XN_CORRECTED_DETAIL_1_ECC3_SYNDROME_MASK 0x00ff000000000000
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC3_WC */
-/* Description: ECC3 Word Count */
-#define SH_XN_CORRECTED_DETAIL_1_ECC3_WC_SHFT 56
-#define SH_XN_CORRECTED_DETAIL_1_ECC3_WC_MASK 0x0300000000000000
-
-/* SH_XN_CORRECTED_DETAIL_1_ECC3_VC */
-/* Description: ECC3 Virtual Channel */
-#define SH_XN_CORRECTED_DETAIL_1_ECC3_VC_SHFT 58
-#define SH_XN_CORRECTED_DETAIL_1_ECC3_VC_MASK 0x0c00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_CORRECTED_DETAIL_2" */
-/* Corrected error data */
-/* ==================================================================== */
-
-#define SH_XN_CORRECTED_DETAIL_2 0x0000000150040080
-#define SH_XN_CORRECTED_DETAIL_2_MASK 0xffffffffffffffff
-#define SH_XN_CORRECTED_DETAIL_2_INIT 0x0000000000000000
-
-/* SH_XN_CORRECTED_DETAIL_2_DATA */
-/* Description: ECC data */
-#define SH_XN_CORRECTED_DETAIL_2_DATA_SHFT 0
-#define SH_XN_CORRECTED_DETAIL_2_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_CORRECTED_DETAIL_3" */
-/* Corrected error header0 */
-/* ==================================================================== */
-
-#define SH_XN_CORRECTED_DETAIL_3 0x0000000150040090
-#define SH_XN_CORRECTED_DETAIL_3_MASK 0xffffffffffffffff
-#define SH_XN_CORRECTED_DETAIL_3_INIT 0x0000000000000000
-
-/* SH_XN_CORRECTED_DETAIL_3_HEADER0 */
-/* Description: ECC header0 (bits 63 - 0) */
-#define SH_XN_CORRECTED_DETAIL_3_HEADER0_SHFT 0
-#define SH_XN_CORRECTED_DETAIL_3_HEADER0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_CORRECTED_DETAIL_4" */
-/* Corrected error header1 */
-/* ==================================================================== */
-
-#define SH_XN_CORRECTED_DETAIL_4 0x00000001500400a0
-#define SH_XN_CORRECTED_DETAIL_4_MASK 0xc00003ffffffffff
-#define SH_XN_CORRECTED_DETAIL_4_INIT 0x0000000000000000
-
-/* SH_XN_CORRECTED_DETAIL_4_HEADER1 */
-/* Description: ECC header1 (bits 104 - 64) */
-#define SH_XN_CORRECTED_DETAIL_4_HEADER1_SHFT 0
-#define SH_XN_CORRECTED_DETAIL_4_HEADER1_MASK 0x000003ffffffffff
-
-/* SH_XN_CORRECTED_DETAIL_4_ERR_GROUP */
-/* Description: Error group */
-#define SH_XN_CORRECTED_DETAIL_4_ERR_GROUP_SHFT 62
-#define SH_XN_CORRECTED_DETAIL_4_ERR_GROUP_MASK 0xc000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_UNCORRECTED_DETAIL_1" */
-/* Uncorrected error details */
-/* ==================================================================== */
-
-#define SH_XN_UNCORRECTED_DETAIL_1 0x00000001500400b0
-#define SH_XN_UNCORRECTED_DETAIL_1_MASK 0x0fff0fff0fff0fff
-#define SH_XN_UNCORRECTED_DETAIL_1_INIT 0x0000000000000000
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC0_SYNDROME */
-/* Description: ECC0 Syndrome */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC0_SYNDROME_SHFT 0
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC0_SYNDROME_MASK 0x00000000000000ff
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC0_WC */
-/* Description: ECC0 Word Count */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC0_WC_SHFT 8
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC0_WC_MASK 0x0000000000000300
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC0_VC */
-/* Description: ECC0 Virtual Channel */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC0_VC_SHFT 10
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC0_VC_MASK 0x0000000000000c00
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC1_SYNDROME */
-/* Description: ECC1 Syndrome */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC1_SYNDROME_SHFT 16
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC1_SYNDROME_MASK 0x0000000000ff0000
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC1_WC */
-/* Description: ECC1 Word Count */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC1_WC_SHFT 24
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC1_WC_MASK 0x0000000003000000
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC1_VC */
-/* Description: ECC1 Virtual Channel */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC1_VC_SHFT 26
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC1_VC_MASK 0x000000000c000000
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC2_SYNDROME */
-/* Description: ECC2 Syndrome */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC2_SYNDROME_SHFT 32
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC2_SYNDROME_MASK 0x000000ff00000000
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC2_WC */
-/* Description: ECC2 Word Count */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC2_WC_SHFT 40
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC2_WC_MASK 0x0000030000000000
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC2_VC */
-/* Description: ECC2 Virtual Channel */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC2_VC_SHFT 42
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC2_VC_MASK 0x00000c0000000000
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC3_SYNDROME */
-/* Description: ECC3 Syndrome */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC3_SYNDROME_SHFT 48
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC3_SYNDROME_MASK 0x00ff000000000000
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC3_WC */
-/* Description: ECC3 Word Count */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC3_WC_SHFT 56
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC3_WC_MASK 0x0300000000000000
-
-/* SH_XN_UNCORRECTED_DETAIL_1_ECC3_VC */
-/* Description: ECC3 Virtual Channel */
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC3_VC_SHFT 58
-#define SH_XN_UNCORRECTED_DETAIL_1_ECC3_VC_MASK 0x0c00000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_UNCORRECTED_DETAIL_2" */
-/* Uncorrected error data */
-/* ==================================================================== */
-
-#define SH_XN_UNCORRECTED_DETAIL_2 0x00000001500400c0
-#define SH_XN_UNCORRECTED_DETAIL_2_MASK 0xffffffffffffffff
-#define SH_XN_UNCORRECTED_DETAIL_2_INIT 0x0000000000000000
-
-/* SH_XN_UNCORRECTED_DETAIL_2_DATA */
-/* Description: ECC data */
-#define SH_XN_UNCORRECTED_DETAIL_2_DATA_SHFT 0
-#define SH_XN_UNCORRECTED_DETAIL_2_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_UNCORRECTED_DETAIL_3" */
-/* Uncorrected error header0 */
-/* ==================================================================== */
-
-#define SH_XN_UNCORRECTED_DETAIL_3 0x00000001500400d0
-#define SH_XN_UNCORRECTED_DETAIL_3_MASK 0xffffffffffffffff
-#define SH_XN_UNCORRECTED_DETAIL_3_INIT 0x0000000000000000
-
-/* SH_XN_UNCORRECTED_DETAIL_3_HEADER0 */
-/* Description: ECC header0 (bits 63 - 0) */
-#define SH_XN_UNCORRECTED_DETAIL_3_HEADER0_SHFT 0
-#define SH_XN_UNCORRECTED_DETAIL_3_HEADER0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_UNCORRECTED_DETAIL_4" */
-/* Uncorrected error header1 */
-/* ==================================================================== */
-
-#define SH_XN_UNCORRECTED_DETAIL_4 0x00000001500400e0
-#define SH_XN_UNCORRECTED_DETAIL_4_MASK 0xc00003ffffffffff
-#define SH_XN_UNCORRECTED_DETAIL_4_INIT 0x0000000000000000
-
-/* SH_XN_UNCORRECTED_DETAIL_4_HEADER1 */
-/* Description: ECC header1 (bits 104 - 64) */
-#define SH_XN_UNCORRECTED_DETAIL_4_HEADER1_SHFT 0
-#define SH_XN_UNCORRECTED_DETAIL_4_HEADER1_MASK 0x000003ffffffffff
-
-/* SH_XN_UNCORRECTED_DETAIL_4_ERR_GROUP */
-/* Description: Error group */
-#define SH_XN_UNCORRECTED_DETAIL_4_ERR_GROUP_SHFT 62
-#define SH_XN_UNCORRECTED_DETAIL_4_ERR_GROUP_MASK 0xc000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ERROR_DETAIL_1" */
-/* Look Up Table Address (md) */
-/* ==================================================================== */
-
-#define SH_XNMD_ERROR_DETAIL_1 0x00000001500400f0
-#define SH_XNMD_ERROR_DETAIL_1_MASK 0x00000000000007ff
-#define SH_XNMD_ERROR_DETAIL_1_INIT 0x0000000000000000
-
-/* SH_XNMD_ERROR_DETAIL_1_LUT_ADDR */
-/* Description: Look Up Table Read Address */
-#define SH_XNMD_ERROR_DETAIL_1_LUT_ADDR_SHFT 0
-#define SH_XNMD_ERROR_DETAIL_1_LUT_ADDR_MASK 0x00000000000007ff
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ERROR_DETAIL_1" */
-/* Look Up Table Address (pi) */
-/* ==================================================================== */
-
-#define SH_XNPI_ERROR_DETAIL_1 0x0000000150040100
-#define SH_XNPI_ERROR_DETAIL_1_MASK 0x00000000000007ff
-#define SH_XNPI_ERROR_DETAIL_1_INIT 0x0000000000000000
-
-/* SH_XNPI_ERROR_DETAIL_1_LUT_ADDR */
-/* Description: Look Up Table Read Address */
-#define SH_XNPI_ERROR_DETAIL_1_LUT_ADDR_SHFT 0
-#define SH_XNPI_ERROR_DETAIL_1_LUT_ADDR_MASK 0x00000000000007ff
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_DETAIL_1" */
-/* Chiplet NoMatch header [63:0] */
-/* ==================================================================== */
-
-#define SH_XNIILB_ERROR_DETAIL_1 0x0000000150040110
-#define SH_XNIILB_ERROR_DETAIL_1_MASK 0xffffffffffffffff
-#define SH_XNIILB_ERROR_DETAIL_1_INIT 0x0000000000000000
-
-/* SH_XNIILB_ERROR_DETAIL_1_HEADER */
-/* Description: header bits [63:0] */
-#define SH_XNIILB_ERROR_DETAIL_1_HEADER_SHFT 0
-#define SH_XNIILB_ERROR_DETAIL_1_HEADER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_DETAIL_2" */
-/* Chiplet NoMatch header [127:64] */
-/* ==================================================================== */
-
-#define SH_XNIILB_ERROR_DETAIL_2 0x0000000150040120
-#define SH_XNIILB_ERROR_DETAIL_2_MASK 0xffffffffffffffff
-#define SH_XNIILB_ERROR_DETAIL_2_INIT 0x0000000000000000
-
-/* SH_XNIILB_ERROR_DETAIL_2_HEADER */
-/* Description: header bits [127:64] */
-#define SH_XNIILB_ERROR_DETAIL_2_HEADER_SHFT 0
-#define SH_XNIILB_ERROR_DETAIL_2_HEADER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_DETAIL_3" */
-/* Look Up Table Address (iilb) */
-/* ==================================================================== */
-
-#define SH_XNIILB_ERROR_DETAIL_3 0x0000000150040130
-#define SH_XNIILB_ERROR_DETAIL_3_MASK 0x00000000000007ff
-#define SH_XNIILB_ERROR_DETAIL_3_INIT 0x0000000000000000
-
-/* SH_XNIILB_ERROR_DETAIL_3_LUT_ADDR */
-/* Description: Look Up Table Read Address */
-#define SH_XNIILB_ERROR_DETAIL_3_LUT_ADDR_SHFT 0
-#define SH_XNIILB_ERROR_DETAIL_3_LUT_ADDR_MASK 0x00000000000007ff
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_DETAIL_3" */
-/* Look Up Table Address (ni0) */
-/* ==================================================================== */
-
-#define SH_NI0_ERROR_DETAIL_3 0x0000000150040140
-#define SH_NI0_ERROR_DETAIL_3_MASK 0x00000000000007ff
-#define SH_NI0_ERROR_DETAIL_3_INIT 0x0000000000000000
-
-/* SH_NI0_ERROR_DETAIL_3_LUT_ADDR */
-/* Description: Look Up Table Read Address */
-#define SH_NI0_ERROR_DETAIL_3_LUT_ADDR_SHFT 0
-#define SH_NI0_ERROR_DETAIL_3_LUT_ADDR_MASK 0x00000000000007ff
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_DETAIL_3" */
-/* Look Up Table Address (ni1) */
-/* ==================================================================== */
-
-#define SH_NI1_ERROR_DETAIL_3 0x0000000150040150
-#define SH_NI1_ERROR_DETAIL_3_MASK 0x00000000000007ff
-#define SH_NI1_ERROR_DETAIL_3_INIT 0x0000000000000000
-
-/* SH_NI1_ERROR_DETAIL_3_LUT_ADDR */
-/* Description: Look Up Table Read Address */
-#define SH_NI1_ERROR_DETAIL_3_LUT_ADDR_SHFT 0
-#define SH_NI1_ERROR_DETAIL_3_LUT_ADDR_MASK 0x00000000000007ff
-
-/* ==================================================================== */
-/* Register "SH_XN_ERROR_SUMMARY" */
-/* ==================================================================== */
-
-#define SH_XN_ERROR_SUMMARY 0x0000000150040000
-#define SH_XN_ERROR_SUMMARY_MASK 0x0000003fffffffff
-#define SH_XN_ERROR_SUMMARY_INIT 0x0000003fffffffff
-
-/* SH_XN_ERROR_SUMMARY_NI0_POP_OVERFLOW */
-/* Description: NI0 pop overflow */
-#define SH_XN_ERROR_SUMMARY_NI0_POP_OVERFLOW_SHFT 0
-#define SH_XN_ERROR_SUMMARY_NI0_POP_OVERFLOW_MASK 0x0000000000000001
-
-/* SH_XN_ERROR_SUMMARY_NI0_PUSH_OVERFLOW */
-/* Description: NI0 push overflow */
-#define SH_XN_ERROR_SUMMARY_NI0_PUSH_OVERFLOW_SHFT 1
-#define SH_XN_ERROR_SUMMARY_NI0_PUSH_OVERFLOW_MASK 0x0000000000000002
-
-/* SH_XN_ERROR_SUMMARY_NI0_CREDIT_OVERFLOW */
-/* Description: NI0 credit overflow */
-#define SH_XN_ERROR_SUMMARY_NI0_CREDIT_OVERFLOW_SHFT 2
-#define SH_XN_ERROR_SUMMARY_NI0_CREDIT_OVERFLOW_MASK 0x0000000000000004
-
-/* SH_XN_ERROR_SUMMARY_NI0_DEBIT_OVERFLOW */
-/* Description: NI0 debit overflow */
-#define SH_XN_ERROR_SUMMARY_NI0_DEBIT_OVERFLOW_SHFT 3
-#define SH_XN_ERROR_SUMMARY_NI0_DEBIT_OVERFLOW_MASK 0x0000000000000008
-
-/* SH_XN_ERROR_SUMMARY_NI0_POP_UNDERFLOW */
-/* Description: NI0 pop underflow */
-#define SH_XN_ERROR_SUMMARY_NI0_POP_UNDERFLOW_SHFT 4
-#define SH_XN_ERROR_SUMMARY_NI0_POP_UNDERFLOW_MASK 0x0000000000000010
-
-/* SH_XN_ERROR_SUMMARY_NI0_PUSH_UNDERFLOW */
-/* Description: NI0 push underflow */
-#define SH_XN_ERROR_SUMMARY_NI0_PUSH_UNDERFLOW_SHFT 5
-#define SH_XN_ERROR_SUMMARY_NI0_PUSH_UNDERFLOW_MASK 0x0000000000000020
-
-/* SH_XN_ERROR_SUMMARY_NI0_CREDIT_UNDERFLOW */
-/* Description: NI0 credit underflow */
-#define SH_XN_ERROR_SUMMARY_NI0_CREDIT_UNDERFLOW_SHFT 6
-#define SH_XN_ERROR_SUMMARY_NI0_CREDIT_UNDERFLOW_MASK 0x0000000000000040
-
-/* SH_XN_ERROR_SUMMARY_NI0_LLP_ERROR */
-/* Description: NI0 llp error */
-#define SH_XN_ERROR_SUMMARY_NI0_LLP_ERROR_SHFT 7
-#define SH_XN_ERROR_SUMMARY_NI0_LLP_ERROR_MASK 0x0000000000000080
-
-/* SH_XN_ERROR_SUMMARY_NI0_PIPE_ERROR */
-/* Description: NI0 Pipe in/out errors */
-#define SH_XN_ERROR_SUMMARY_NI0_PIPE_ERROR_SHFT 8
-#define SH_XN_ERROR_SUMMARY_NI0_PIPE_ERROR_MASK 0x0000000000000100
-
-/* SH_XN_ERROR_SUMMARY_NI1_POP_OVERFLOW */
-/* Description: NI1 pop overflow */
-#define SH_XN_ERROR_SUMMARY_NI1_POP_OVERFLOW_SHFT 9
-#define SH_XN_ERROR_SUMMARY_NI1_POP_OVERFLOW_MASK 0x0000000000000200
-
-/* SH_XN_ERROR_SUMMARY_NI1_PUSH_OVERFLOW */
-/* Description: NI1 push overflow */
-#define SH_XN_ERROR_SUMMARY_NI1_PUSH_OVERFLOW_SHFT 10
-#define SH_XN_ERROR_SUMMARY_NI1_PUSH_OVERFLOW_MASK 0x0000000000000400
-
-/* SH_XN_ERROR_SUMMARY_NI1_CREDIT_OVERFLOW */
-/* Description: NI1 credit overflow */
-#define SH_XN_ERROR_SUMMARY_NI1_CREDIT_OVERFLOW_SHFT 11
-#define SH_XN_ERROR_SUMMARY_NI1_CREDIT_OVERFLOW_MASK 0x0000000000000800
-
-/* SH_XN_ERROR_SUMMARY_NI1_DEBIT_OVERFLOW */
-/* Description: NI1 debit overflow */
-#define SH_XN_ERROR_SUMMARY_NI1_DEBIT_OVERFLOW_SHFT 12
-#define SH_XN_ERROR_SUMMARY_NI1_DEBIT_OVERFLOW_MASK 0x0000000000001000
-
-/* SH_XN_ERROR_SUMMARY_NI1_POP_UNDERFLOW */
-/* Description: NI1 pop underflow */
-#define SH_XN_ERROR_SUMMARY_NI1_POP_UNDERFLOW_SHFT 13
-#define SH_XN_ERROR_SUMMARY_NI1_POP_UNDERFLOW_MASK 0x0000000000002000
-
-/* SH_XN_ERROR_SUMMARY_NI1_PUSH_UNDERFLOW */
-/* Description: NI1 push underflow */
-#define SH_XN_ERROR_SUMMARY_NI1_PUSH_UNDERFLOW_SHFT 14
-#define SH_XN_ERROR_SUMMARY_NI1_PUSH_UNDERFLOW_MASK 0x0000000000004000
-
-/* SH_XN_ERROR_SUMMARY_NI1_CREDIT_UNDERFLOW */
-/* Description: NI1 credit underflow */
-#define SH_XN_ERROR_SUMMARY_NI1_CREDIT_UNDERFLOW_SHFT 15
-#define SH_XN_ERROR_SUMMARY_NI1_CREDIT_UNDERFLOW_MASK 0x0000000000008000
-
-/* SH_XN_ERROR_SUMMARY_NI1_LLP_ERROR */
-/* Description: NI1 llp error */
-#define SH_XN_ERROR_SUMMARY_NI1_LLP_ERROR_SHFT 16
-#define SH_XN_ERROR_SUMMARY_NI1_LLP_ERROR_MASK 0x0000000000010000
-
-/* SH_XN_ERROR_SUMMARY_NI1_PIPE_ERROR */
-/* Description: NI1 pipe in/out error */
-#define SH_XN_ERROR_SUMMARY_NI1_PIPE_ERROR_SHFT 17
-#define SH_XN_ERROR_SUMMARY_NI1_PIPE_ERROR_MASK 0x0000000000020000
-
-/* SH_XN_ERROR_SUMMARY_XNMD_CREDIT_OVERFLOW */
-/* Description: XNMD credit overflow */
-#define SH_XN_ERROR_SUMMARY_XNMD_CREDIT_OVERFLOW_SHFT 18
-#define SH_XN_ERROR_SUMMARY_XNMD_CREDIT_OVERFLOW_MASK 0x0000000000040000
-
-/* SH_XN_ERROR_SUMMARY_XNMD_DEBIT_OVERFLOW */
-/* Description: XNMD debit overflow */
-#define SH_XN_ERROR_SUMMARY_XNMD_DEBIT_OVERFLOW_SHFT 19
-#define SH_XN_ERROR_SUMMARY_XNMD_DEBIT_OVERFLOW_MASK 0x0000000000080000
-
-/* SH_XN_ERROR_SUMMARY_XNMD_DATA_BUFF_OVERFLOW */
-/* Description: XNMD data buffer overflow */
-#define SH_XN_ERROR_SUMMARY_XNMD_DATA_BUFF_OVERFLOW_SHFT 20
-#define SH_XN_ERROR_SUMMARY_XNMD_DATA_BUFF_OVERFLOW_MASK 0x0000000000100000
-
-/* SH_XN_ERROR_SUMMARY_XNMD_CREDIT_UNDERFLOW */
-/* Description: XNMD credit underflow */
-#define SH_XN_ERROR_SUMMARY_XNMD_CREDIT_UNDERFLOW_SHFT 21
-#define SH_XN_ERROR_SUMMARY_XNMD_CREDIT_UNDERFLOW_MASK 0x0000000000200000
-
-/* SH_XN_ERROR_SUMMARY_XNMD_SBE_ERROR */
-/* Description: XNMD single bit error */
-#define SH_XN_ERROR_SUMMARY_XNMD_SBE_ERROR_SHFT 22
-#define SH_XN_ERROR_SUMMARY_XNMD_SBE_ERROR_MASK 0x0000000000400000
-
-/* SH_XN_ERROR_SUMMARY_XNMD_UCE_ERROR */
-/* Description: XNMD uncorrectable error */
-#define SH_XN_ERROR_SUMMARY_XNMD_UCE_ERROR_SHFT 23
-#define SH_XN_ERROR_SUMMARY_XNMD_UCE_ERROR_MASK 0x0000000000800000
-
-/* SH_XN_ERROR_SUMMARY_XNMD_LUT_ERROR */
-/* Description: XNMD look up table error */
-#define SH_XN_ERROR_SUMMARY_XNMD_LUT_ERROR_SHFT 24
-#define SH_XN_ERROR_SUMMARY_XNMD_LUT_ERROR_MASK 0x0000000001000000
-
-/* SH_XN_ERROR_SUMMARY_XNPI_CREDIT_OVERFLOW */
-/* Description: XNMD credit overflow */
-#define SH_XN_ERROR_SUMMARY_XNPI_CREDIT_OVERFLOW_SHFT 25
-#define SH_XN_ERROR_SUMMARY_XNPI_CREDIT_OVERFLOW_MASK 0x0000000002000000
-
-/* SH_XN_ERROR_SUMMARY_XNPI_DEBIT_OVERFLOW */
-/* Description: XNPI debit overflow */
-#define SH_XN_ERROR_SUMMARY_XNPI_DEBIT_OVERFLOW_SHFT 26
-#define SH_XN_ERROR_SUMMARY_XNPI_DEBIT_OVERFLOW_MASK 0x0000000004000000
-
-/* SH_XN_ERROR_SUMMARY_XNPI_DATA_BUFF_OVERFLOW */
-/* Description: XNPI data buffer overflow */
-#define SH_XN_ERROR_SUMMARY_XNPI_DATA_BUFF_OVERFLOW_SHFT 27
-#define SH_XN_ERROR_SUMMARY_XNPI_DATA_BUFF_OVERFLOW_MASK 0x0000000008000000
-
-/* SH_XN_ERROR_SUMMARY_XNPI_CREDIT_UNDERFLOW */
-/* Description: XNPI credit underflow */
-#define SH_XN_ERROR_SUMMARY_XNPI_CREDIT_UNDERFLOW_SHFT 28
-#define SH_XN_ERROR_SUMMARY_XNPI_CREDIT_UNDERFLOW_MASK 0x0000000010000000
-
-/* SH_XN_ERROR_SUMMARY_XNPI_SBE_ERROR */
-/* Description: XNPI single bit error */
-#define SH_XN_ERROR_SUMMARY_XNPI_SBE_ERROR_SHFT 29
-#define SH_XN_ERROR_SUMMARY_XNPI_SBE_ERROR_MASK 0x0000000020000000
-
-/* SH_XN_ERROR_SUMMARY_XNPI_UCE_ERROR */
-/* Description: XNPI uncorrectable error */
-#define SH_XN_ERROR_SUMMARY_XNPI_UCE_ERROR_SHFT 30
-#define SH_XN_ERROR_SUMMARY_XNPI_UCE_ERROR_MASK 0x0000000040000000
-
-/* SH_XN_ERROR_SUMMARY_XNPI_LUT_ERROR */
-/* Description: XNPI look up table error */
-#define SH_XN_ERROR_SUMMARY_XNPI_LUT_ERROR_SHFT 31
-#define SH_XN_ERROR_SUMMARY_XNPI_LUT_ERROR_MASK 0x0000000080000000
-
-/* SH_XN_ERROR_SUMMARY_IILB_DEBIT_OVERFLOW */
-/* Description: IILB debit overflow */
-#define SH_XN_ERROR_SUMMARY_IILB_DEBIT_OVERFLOW_SHFT 32
-#define SH_XN_ERROR_SUMMARY_IILB_DEBIT_OVERFLOW_MASK 0x0000000100000000
-
-/* SH_XN_ERROR_SUMMARY_IILB_CREDIT_OVERFLOW */
-/* Description: IILB credit overflow */
-#define SH_XN_ERROR_SUMMARY_IILB_CREDIT_OVERFLOW_SHFT 33
-#define SH_XN_ERROR_SUMMARY_IILB_CREDIT_OVERFLOW_MASK 0x0000000200000000
-
-/* SH_XN_ERROR_SUMMARY_IILB_FIFO_OVERFLOW */
-/* Description: IILB fifo overflow */
-#define SH_XN_ERROR_SUMMARY_IILB_FIFO_OVERFLOW_SHFT 34
-#define SH_XN_ERROR_SUMMARY_IILB_FIFO_OVERFLOW_MASK 0x0000000400000000
-
-/* SH_XN_ERROR_SUMMARY_IILB_CREDIT_UNDERFLOW */
-/* Description: IILB credit underflow */
-#define SH_XN_ERROR_SUMMARY_IILB_CREDIT_UNDERFLOW_SHFT 35
-#define SH_XN_ERROR_SUMMARY_IILB_CREDIT_UNDERFLOW_MASK 0x0000000800000000
-
-/* SH_XN_ERROR_SUMMARY_IILB_FIFO_UNDERFLOW */
-/* Description: IILB fifo underflow */
-#define SH_XN_ERROR_SUMMARY_IILB_FIFO_UNDERFLOW_SHFT 36
-#define SH_XN_ERROR_SUMMARY_IILB_FIFO_UNDERFLOW_MASK 0x0000001000000000
-
-/* SH_XN_ERROR_SUMMARY_IILB_CHIPLET_OR_LUT */
-/* Description: IILB chiplet nomatch or lut read error */
-#define SH_XN_ERROR_SUMMARY_IILB_CHIPLET_OR_LUT_SHFT 37
-#define SH_XN_ERROR_SUMMARY_IILB_CHIPLET_OR_LUT_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_ERRORS_ALIAS" */
-/* ==================================================================== */
-
-#define SH_XN_ERRORS_ALIAS 0x0000000150040008
-
-/* ==================================================================== */
-/* Register "SH_XN_ERROR_OVERFLOW" */
-/* ==================================================================== */
-
-#define SH_XN_ERROR_OVERFLOW 0x0000000150040020
-#define SH_XN_ERROR_OVERFLOW_MASK 0x0000003fffffffff
-#define SH_XN_ERROR_OVERFLOW_INIT 0x0000003fffffffff
-
-/* SH_XN_ERROR_OVERFLOW_NI0_POP_OVERFLOW */
-/* Description: NI0 pop overflow */
-#define SH_XN_ERROR_OVERFLOW_NI0_POP_OVERFLOW_SHFT 0
-#define SH_XN_ERROR_OVERFLOW_NI0_POP_OVERFLOW_MASK 0x0000000000000001
-
-/* SH_XN_ERROR_OVERFLOW_NI0_PUSH_OVERFLOW */
-/* Description: NI0 push overflow */
-#define SH_XN_ERROR_OVERFLOW_NI0_PUSH_OVERFLOW_SHFT 1
-#define SH_XN_ERROR_OVERFLOW_NI0_PUSH_OVERFLOW_MASK 0x0000000000000002
-
-/* SH_XN_ERROR_OVERFLOW_NI0_CREDIT_OVERFLOW */
-/* Description: NI0 credit overflow */
-#define SH_XN_ERROR_OVERFLOW_NI0_CREDIT_OVERFLOW_SHFT 2
-#define SH_XN_ERROR_OVERFLOW_NI0_CREDIT_OVERFLOW_MASK 0x0000000000000004
-
-/* SH_XN_ERROR_OVERFLOW_NI0_DEBIT_OVERFLOW */
-/* Description: NI0 debit overflow */
-#define SH_XN_ERROR_OVERFLOW_NI0_DEBIT_OVERFLOW_SHFT 3
-#define SH_XN_ERROR_OVERFLOW_NI0_DEBIT_OVERFLOW_MASK 0x0000000000000008
-
-/* SH_XN_ERROR_OVERFLOW_NI0_POP_UNDERFLOW */
-/* Description: NI0 pop underflow */
-#define SH_XN_ERROR_OVERFLOW_NI0_POP_UNDERFLOW_SHFT 4
-#define SH_XN_ERROR_OVERFLOW_NI0_POP_UNDERFLOW_MASK 0x0000000000000010
-
-/* SH_XN_ERROR_OVERFLOW_NI0_PUSH_UNDERFLOW */
-/* Description: NI0 push underflow */
-#define SH_XN_ERROR_OVERFLOW_NI0_PUSH_UNDERFLOW_SHFT 5
-#define SH_XN_ERROR_OVERFLOW_NI0_PUSH_UNDERFLOW_MASK 0x0000000000000020
-
-/* SH_XN_ERROR_OVERFLOW_NI0_CREDIT_UNDERFLOW */
-/* Description: NI0 credit underflow */
-#define SH_XN_ERROR_OVERFLOW_NI0_CREDIT_UNDERFLOW_SHFT 6
-#define SH_XN_ERROR_OVERFLOW_NI0_CREDIT_UNDERFLOW_MASK 0x0000000000000040
-
-/* SH_XN_ERROR_OVERFLOW_NI0_LLP_ERROR */
-/* Description: NI0 llp error */
-#define SH_XN_ERROR_OVERFLOW_NI0_LLP_ERROR_SHFT 7
-#define SH_XN_ERROR_OVERFLOW_NI0_LLP_ERROR_MASK 0x0000000000000080
-
-/* SH_XN_ERROR_OVERFLOW_NI0_PIPE_ERROR */
-/* Description: NI0 Pipe in/out errors */
-#define SH_XN_ERROR_OVERFLOW_NI0_PIPE_ERROR_SHFT 8
-#define SH_XN_ERROR_OVERFLOW_NI0_PIPE_ERROR_MASK 0x0000000000000100
-
-/* SH_XN_ERROR_OVERFLOW_NI1_POP_OVERFLOW */
-/* Description: NI1 pop overflow */
-#define SH_XN_ERROR_OVERFLOW_NI1_POP_OVERFLOW_SHFT 9
-#define SH_XN_ERROR_OVERFLOW_NI1_POP_OVERFLOW_MASK 0x0000000000000200
-
-/* SH_XN_ERROR_OVERFLOW_NI1_PUSH_OVERFLOW */
-/* Description: NI1 push overflow */
-#define SH_XN_ERROR_OVERFLOW_NI1_PUSH_OVERFLOW_SHFT 10
-#define SH_XN_ERROR_OVERFLOW_NI1_PUSH_OVERFLOW_MASK 0x0000000000000400
-
-/* SH_XN_ERROR_OVERFLOW_NI1_CREDIT_OVERFLOW */
-/* Description: NI1 credit overflow */
-#define SH_XN_ERROR_OVERFLOW_NI1_CREDIT_OVERFLOW_SHFT 11
-#define SH_XN_ERROR_OVERFLOW_NI1_CREDIT_OVERFLOW_MASK 0x0000000000000800
-
-/* SH_XN_ERROR_OVERFLOW_NI1_DEBIT_OVERFLOW */
-/* Description: NI1 debit overflow */
-#define SH_XN_ERROR_OVERFLOW_NI1_DEBIT_OVERFLOW_SHFT 12
-#define SH_XN_ERROR_OVERFLOW_NI1_DEBIT_OVERFLOW_MASK 0x0000000000001000
-
-/* SH_XN_ERROR_OVERFLOW_NI1_POP_UNDERFLOW */
-/* Description: NI1 pop underflow */
-#define SH_XN_ERROR_OVERFLOW_NI1_POP_UNDERFLOW_SHFT 13
-#define SH_XN_ERROR_OVERFLOW_NI1_POP_UNDERFLOW_MASK 0x0000000000002000
-
-/* SH_XN_ERROR_OVERFLOW_NI1_PUSH_UNDERFLOW */
-/* Description: NI1 push underflow */
-#define SH_XN_ERROR_OVERFLOW_NI1_PUSH_UNDERFLOW_SHFT 14
-#define SH_XN_ERROR_OVERFLOW_NI1_PUSH_UNDERFLOW_MASK 0x0000000000004000
-
-/* SH_XN_ERROR_OVERFLOW_NI1_CREDIT_UNDERFLOW */
-/* Description: NI1 credit underflow */
-#define SH_XN_ERROR_OVERFLOW_NI1_CREDIT_UNDERFLOW_SHFT 15
-#define SH_XN_ERROR_OVERFLOW_NI1_CREDIT_UNDERFLOW_MASK 0x0000000000008000
-
-/* SH_XN_ERROR_OVERFLOW_NI1_LLP_ERROR */
-/* Description: NI1 llp error */
-#define SH_XN_ERROR_OVERFLOW_NI1_LLP_ERROR_SHFT 16
-#define SH_XN_ERROR_OVERFLOW_NI1_LLP_ERROR_MASK 0x0000000000010000
-
-/* SH_XN_ERROR_OVERFLOW_NI1_PIPE_ERROR */
-/* Description: NI1 pipe in/out error */
-#define SH_XN_ERROR_OVERFLOW_NI1_PIPE_ERROR_SHFT 17
-#define SH_XN_ERROR_OVERFLOW_NI1_PIPE_ERROR_MASK 0x0000000000020000
-
-/* SH_XN_ERROR_OVERFLOW_XNMD_CREDIT_OVERFLOW */
-/* Description: XNMD credit overflow */
-#define SH_XN_ERROR_OVERFLOW_XNMD_CREDIT_OVERFLOW_SHFT 18
-#define SH_XN_ERROR_OVERFLOW_XNMD_CREDIT_OVERFLOW_MASK 0x0000000000040000
-
-/* SH_XN_ERROR_OVERFLOW_XNMD_DEBIT_OVERFLOW */
-/* Description: XNMD debit overflow */
-#define SH_XN_ERROR_OVERFLOW_XNMD_DEBIT_OVERFLOW_SHFT 19
-#define SH_XN_ERROR_OVERFLOW_XNMD_DEBIT_OVERFLOW_MASK 0x0000000000080000
-
-/* SH_XN_ERROR_OVERFLOW_XNMD_DATA_BUFF_OVERFLOW */
-/* Description: XNMD data buffer overflow */
-#define SH_XN_ERROR_OVERFLOW_XNMD_DATA_BUFF_OVERFLOW_SHFT 20
-#define SH_XN_ERROR_OVERFLOW_XNMD_DATA_BUFF_OVERFLOW_MASK 0x0000000000100000
-
-/* SH_XN_ERROR_OVERFLOW_XNMD_CREDIT_UNDERFLOW */
-/* Description: XNMD credit underflow */
-#define SH_XN_ERROR_OVERFLOW_XNMD_CREDIT_UNDERFLOW_SHFT 21
-#define SH_XN_ERROR_OVERFLOW_XNMD_CREDIT_UNDERFLOW_MASK 0x0000000000200000
-
-/* SH_XN_ERROR_OVERFLOW_XNMD_SBE_ERROR */
-/* Description: XNMD single bit error */
-#define SH_XN_ERROR_OVERFLOW_XNMD_SBE_ERROR_SHFT 22
-#define SH_XN_ERROR_OVERFLOW_XNMD_SBE_ERROR_MASK 0x0000000000400000
-
-/* SH_XN_ERROR_OVERFLOW_XNMD_UCE_ERROR */
-/* Description: XNMD uncorrectable error */
-#define SH_XN_ERROR_OVERFLOW_XNMD_UCE_ERROR_SHFT 23
-#define SH_XN_ERROR_OVERFLOW_XNMD_UCE_ERROR_MASK 0x0000000000800000
-
-/* SH_XN_ERROR_OVERFLOW_XNMD_LUT_ERROR */
-/* Description: XNMD look up table error */
-#define SH_XN_ERROR_OVERFLOW_XNMD_LUT_ERROR_SHFT 24
-#define SH_XN_ERROR_OVERFLOW_XNMD_LUT_ERROR_MASK 0x0000000001000000
-
-/* SH_XN_ERROR_OVERFLOW_XNPI_CREDIT_OVERFLOW */
-/* Description: XNMD credit overflow */
-#define SH_XN_ERROR_OVERFLOW_XNPI_CREDIT_OVERFLOW_SHFT 25
-#define SH_XN_ERROR_OVERFLOW_XNPI_CREDIT_OVERFLOW_MASK 0x0000000002000000
-
-/* SH_XN_ERROR_OVERFLOW_XNPI_DEBIT_OVERFLOW */
-/* Description: XNPI debit overflow */
-#define SH_XN_ERROR_OVERFLOW_XNPI_DEBIT_OVERFLOW_SHFT 26
-#define SH_XN_ERROR_OVERFLOW_XNPI_DEBIT_OVERFLOW_MASK 0x0000000004000000
-
-/* SH_XN_ERROR_OVERFLOW_XNPI_DATA_BUFF_OVERFLOW */
-/* Description: XNPI data buffer overflow */
-#define SH_XN_ERROR_OVERFLOW_XNPI_DATA_BUFF_OVERFLOW_SHFT 27
-#define SH_XN_ERROR_OVERFLOW_XNPI_DATA_BUFF_OVERFLOW_MASK 0x0000000008000000
-
-/* SH_XN_ERROR_OVERFLOW_XNPI_CREDIT_UNDERFLOW */
-/* Description: XNPI credit underflow */
-#define SH_XN_ERROR_OVERFLOW_XNPI_CREDIT_UNDERFLOW_SHFT 28
-#define SH_XN_ERROR_OVERFLOW_XNPI_CREDIT_UNDERFLOW_MASK 0x0000000010000000
-
-/* SH_XN_ERROR_OVERFLOW_XNPI_SBE_ERROR */
-/* Description: XNPI single bit error */
-#define SH_XN_ERROR_OVERFLOW_XNPI_SBE_ERROR_SHFT 29
-#define SH_XN_ERROR_OVERFLOW_XNPI_SBE_ERROR_MASK 0x0000000020000000
-
-/* SH_XN_ERROR_OVERFLOW_XNPI_UCE_ERROR */
-/* Description: XNPI uncorrectable error */
-#define SH_XN_ERROR_OVERFLOW_XNPI_UCE_ERROR_SHFT 30
-#define SH_XN_ERROR_OVERFLOW_XNPI_UCE_ERROR_MASK 0x0000000040000000
-
-/* SH_XN_ERROR_OVERFLOW_XNPI_LUT_ERROR */
-/* Description: XNPI look up table error */
-#define SH_XN_ERROR_OVERFLOW_XNPI_LUT_ERROR_SHFT 31
-#define SH_XN_ERROR_OVERFLOW_XNPI_LUT_ERROR_MASK 0x0000000080000000
-
-/* SH_XN_ERROR_OVERFLOW_IILB_DEBIT_OVERFLOW */
-/* Description: IILB debit overflow */
-#define SH_XN_ERROR_OVERFLOW_IILB_DEBIT_OVERFLOW_SHFT 32
-#define SH_XN_ERROR_OVERFLOW_IILB_DEBIT_OVERFLOW_MASK 0x0000000100000000
-
-/* SH_XN_ERROR_OVERFLOW_IILB_CREDIT_OVERFLOW */
-/* Description: IILB credit overflow */
-#define SH_XN_ERROR_OVERFLOW_IILB_CREDIT_OVERFLOW_SHFT 33
-#define SH_XN_ERROR_OVERFLOW_IILB_CREDIT_OVERFLOW_MASK 0x0000000200000000
-
-/* SH_XN_ERROR_OVERFLOW_IILB_FIFO_OVERFLOW */
-/* Description: IILB fifo overflow */
-#define SH_XN_ERROR_OVERFLOW_IILB_FIFO_OVERFLOW_SHFT 34
-#define SH_XN_ERROR_OVERFLOW_IILB_FIFO_OVERFLOW_MASK 0x0000000400000000
-
-/* SH_XN_ERROR_OVERFLOW_IILB_CREDIT_UNDERFLOW */
-/* Description: IILB credit underflow */
-#define SH_XN_ERROR_OVERFLOW_IILB_CREDIT_UNDERFLOW_SHFT 35
-#define SH_XN_ERROR_OVERFLOW_IILB_CREDIT_UNDERFLOW_MASK 0x0000000800000000
-
-/* SH_XN_ERROR_OVERFLOW_IILB_FIFO_UNDERFLOW */
-/* Description: IILB fifo underflow */
-#define SH_XN_ERROR_OVERFLOW_IILB_FIFO_UNDERFLOW_SHFT 36
-#define SH_XN_ERROR_OVERFLOW_IILB_FIFO_UNDERFLOW_MASK 0x0000001000000000
-
-/* SH_XN_ERROR_OVERFLOW_IILB_CHIPLET_OR_LUT */
-/* Description: IILB chiplet nomatch or lut read error */
-#define SH_XN_ERROR_OVERFLOW_IILB_CHIPLET_OR_LUT_SHFT 37
-#define SH_XN_ERROR_OVERFLOW_IILB_CHIPLET_OR_LUT_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_ERROR_OVERFLOW_ALIAS" */
-/* ==================================================================== */
-
-#define SH_XN_ERROR_OVERFLOW_ALIAS 0x0000000150040028
-
-/* ==================================================================== */
-/* Register "SH_XN_ERROR_MASK" */
-/* ==================================================================== */
-
-#define SH_XN_ERROR_MASK 0x0000000150040040
-#define SH_XN_ERROR_MASK_MASK 0x0000003fffffffff
-#define SH_XN_ERROR_MASK_INIT 0x0000003fffffffff
-
-/* SH_XN_ERROR_MASK_NI0_POP_OVERFLOW */
-/* Description: NI0 pop overflow */
-#define SH_XN_ERROR_MASK_NI0_POP_OVERFLOW_SHFT 0
-#define SH_XN_ERROR_MASK_NI0_POP_OVERFLOW_MASK 0x0000000000000001
-
-/* SH_XN_ERROR_MASK_NI0_PUSH_OVERFLOW */
-/* Description: NI0 push overflow */
-#define SH_XN_ERROR_MASK_NI0_PUSH_OVERFLOW_SHFT 1
-#define SH_XN_ERROR_MASK_NI0_PUSH_OVERFLOW_MASK 0x0000000000000002
-
-/* SH_XN_ERROR_MASK_NI0_CREDIT_OVERFLOW */
-/* Description: NI0 credit overflow */
-#define SH_XN_ERROR_MASK_NI0_CREDIT_OVERFLOW_SHFT 2
-#define SH_XN_ERROR_MASK_NI0_CREDIT_OVERFLOW_MASK 0x0000000000000004
-
-/* SH_XN_ERROR_MASK_NI0_DEBIT_OVERFLOW */
-/* Description: NI0 debit overflow */
-#define SH_XN_ERROR_MASK_NI0_DEBIT_OVERFLOW_SHFT 3
-#define SH_XN_ERROR_MASK_NI0_DEBIT_OVERFLOW_MASK 0x0000000000000008
-
-/* SH_XN_ERROR_MASK_NI0_POP_UNDERFLOW */
-/* Description: NI0 pop underflow */
-#define SH_XN_ERROR_MASK_NI0_POP_UNDERFLOW_SHFT 4
-#define SH_XN_ERROR_MASK_NI0_POP_UNDERFLOW_MASK 0x0000000000000010
-
-/* SH_XN_ERROR_MASK_NI0_PUSH_UNDERFLOW */
-/* Description: NI0 push underflow */
-#define SH_XN_ERROR_MASK_NI0_PUSH_UNDERFLOW_SHFT 5
-#define SH_XN_ERROR_MASK_NI0_PUSH_UNDERFLOW_MASK 0x0000000000000020
-
-/* SH_XN_ERROR_MASK_NI0_CREDIT_UNDERFLOW */
-/* Description: NI0 credit underflow */
-#define SH_XN_ERROR_MASK_NI0_CREDIT_UNDERFLOW_SHFT 6
-#define SH_XN_ERROR_MASK_NI0_CREDIT_UNDERFLOW_MASK 0x0000000000000040
-
-/* SH_XN_ERROR_MASK_NI0_LLP_ERROR */
-/* Description: NI0 llp error */
-#define SH_XN_ERROR_MASK_NI0_LLP_ERROR_SHFT 7
-#define SH_XN_ERROR_MASK_NI0_LLP_ERROR_MASK 0x0000000000000080
-
-/* SH_XN_ERROR_MASK_NI0_PIPE_ERROR */
-/* Description: NI0 Pipe in/out errors */
-#define SH_XN_ERROR_MASK_NI0_PIPE_ERROR_SHFT 8
-#define SH_XN_ERROR_MASK_NI0_PIPE_ERROR_MASK 0x0000000000000100
-
-/* SH_XN_ERROR_MASK_NI1_POP_OVERFLOW */
-/* Description: NI1 pop overflow */
-#define SH_XN_ERROR_MASK_NI1_POP_OVERFLOW_SHFT 9
-#define SH_XN_ERROR_MASK_NI1_POP_OVERFLOW_MASK 0x0000000000000200
-
-/* SH_XN_ERROR_MASK_NI1_PUSH_OVERFLOW */
-/* Description: NI1 push overflow */
-#define SH_XN_ERROR_MASK_NI1_PUSH_OVERFLOW_SHFT 10
-#define SH_XN_ERROR_MASK_NI1_PUSH_OVERFLOW_MASK 0x0000000000000400
-
-/* SH_XN_ERROR_MASK_NI1_CREDIT_OVERFLOW */
-/* Description: NI1 credit overflow */
-#define SH_XN_ERROR_MASK_NI1_CREDIT_OVERFLOW_SHFT 11
-#define SH_XN_ERROR_MASK_NI1_CREDIT_OVERFLOW_MASK 0x0000000000000800
-
-/* SH_XN_ERROR_MASK_NI1_DEBIT_OVERFLOW */
-/* Description: NI1 debit overflow */
-#define SH_XN_ERROR_MASK_NI1_DEBIT_OVERFLOW_SHFT 12
-#define SH_XN_ERROR_MASK_NI1_DEBIT_OVERFLOW_MASK 0x0000000000001000
-
-/* SH_XN_ERROR_MASK_NI1_POP_UNDERFLOW */
-/* Description: NI1 pop underflow */
-#define SH_XN_ERROR_MASK_NI1_POP_UNDERFLOW_SHFT 13
-#define SH_XN_ERROR_MASK_NI1_POP_UNDERFLOW_MASK 0x0000000000002000
-
-/* SH_XN_ERROR_MASK_NI1_PUSH_UNDERFLOW */
-/* Description: NI1 push underflow */
-#define SH_XN_ERROR_MASK_NI1_PUSH_UNDERFLOW_SHFT 14
-#define SH_XN_ERROR_MASK_NI1_PUSH_UNDERFLOW_MASK 0x0000000000004000
-
-/* SH_XN_ERROR_MASK_NI1_CREDIT_UNDERFLOW */
-/* Description: NI1 credit underflow */
-#define SH_XN_ERROR_MASK_NI1_CREDIT_UNDERFLOW_SHFT 15
-#define SH_XN_ERROR_MASK_NI1_CREDIT_UNDERFLOW_MASK 0x0000000000008000
-
-/* SH_XN_ERROR_MASK_NI1_LLP_ERROR */
-/* Description: NI1 llp error */
-#define SH_XN_ERROR_MASK_NI1_LLP_ERROR_SHFT 16
-#define SH_XN_ERROR_MASK_NI1_LLP_ERROR_MASK 0x0000000000010000
-
-/* SH_XN_ERROR_MASK_NI1_PIPE_ERROR */
-/* Description: NI1 pipe in/out error */
-#define SH_XN_ERROR_MASK_NI1_PIPE_ERROR_SHFT 17
-#define SH_XN_ERROR_MASK_NI1_PIPE_ERROR_MASK 0x0000000000020000
-
-/* SH_XN_ERROR_MASK_XNMD_CREDIT_OVERFLOW */
-/* Description: XNMD credit overflow */
-#define SH_XN_ERROR_MASK_XNMD_CREDIT_OVERFLOW_SHFT 18
-#define SH_XN_ERROR_MASK_XNMD_CREDIT_OVERFLOW_MASK 0x0000000000040000
-
-/* SH_XN_ERROR_MASK_XNMD_DEBIT_OVERFLOW */
-/* Description: XNMD debit overflow */
-#define SH_XN_ERROR_MASK_XNMD_DEBIT_OVERFLOW_SHFT 19
-#define SH_XN_ERROR_MASK_XNMD_DEBIT_OVERFLOW_MASK 0x0000000000080000
-
-/* SH_XN_ERROR_MASK_XNMD_DATA_BUFF_OVERFLOW */
-/* Description: XNMD data buffer overflow */
-#define SH_XN_ERROR_MASK_XNMD_DATA_BUFF_OVERFLOW_SHFT 20
-#define SH_XN_ERROR_MASK_XNMD_DATA_BUFF_OVERFLOW_MASK 0x0000000000100000
-
-/* SH_XN_ERROR_MASK_XNMD_CREDIT_UNDERFLOW */
-/* Description: XNMD credit underflow */
-#define SH_XN_ERROR_MASK_XNMD_CREDIT_UNDERFLOW_SHFT 21
-#define SH_XN_ERROR_MASK_XNMD_CREDIT_UNDERFLOW_MASK 0x0000000000200000
-
-/* SH_XN_ERROR_MASK_XNMD_SBE_ERROR */
-/* Description: XNMD single bit error */
-#define SH_XN_ERROR_MASK_XNMD_SBE_ERROR_SHFT 22
-#define SH_XN_ERROR_MASK_XNMD_SBE_ERROR_MASK 0x0000000000400000
-
-/* SH_XN_ERROR_MASK_XNMD_UCE_ERROR */
-/* Description: XNMD uncorrectable error */
-#define SH_XN_ERROR_MASK_XNMD_UCE_ERROR_SHFT 23
-#define SH_XN_ERROR_MASK_XNMD_UCE_ERROR_MASK 0x0000000000800000
-
-/* SH_XN_ERROR_MASK_XNMD_LUT_ERROR */
-/* Description: XNMD look up table error */
-#define SH_XN_ERROR_MASK_XNMD_LUT_ERROR_SHFT 24
-#define SH_XN_ERROR_MASK_XNMD_LUT_ERROR_MASK 0x0000000001000000
-
-/* SH_XN_ERROR_MASK_XNPI_CREDIT_OVERFLOW */
-/* Description: XNMD credit overflow */
-#define SH_XN_ERROR_MASK_XNPI_CREDIT_OVERFLOW_SHFT 25
-#define SH_XN_ERROR_MASK_XNPI_CREDIT_OVERFLOW_MASK 0x0000000002000000
-
-/* SH_XN_ERROR_MASK_XNPI_DEBIT_OVERFLOW */
-/* Description: XNPI debit overflow */
-#define SH_XN_ERROR_MASK_XNPI_DEBIT_OVERFLOW_SHFT 26
-#define SH_XN_ERROR_MASK_XNPI_DEBIT_OVERFLOW_MASK 0x0000000004000000
-
-/* SH_XN_ERROR_MASK_XNPI_DATA_BUFF_OVERFLOW */
-/* Description: XNPI data buffer overflow */
-#define SH_XN_ERROR_MASK_XNPI_DATA_BUFF_OVERFLOW_SHFT 27
-#define SH_XN_ERROR_MASK_XNPI_DATA_BUFF_OVERFLOW_MASK 0x0000000008000000
-
-/* SH_XN_ERROR_MASK_XNPI_CREDIT_UNDERFLOW */
-/* Description: XNPI credit underflow */
-#define SH_XN_ERROR_MASK_XNPI_CREDIT_UNDERFLOW_SHFT 28
-#define SH_XN_ERROR_MASK_XNPI_CREDIT_UNDERFLOW_MASK 0x0000000010000000
-
-/* SH_XN_ERROR_MASK_XNPI_SBE_ERROR */
-/* Description: XNPI single bit error */
-#define SH_XN_ERROR_MASK_XNPI_SBE_ERROR_SHFT 29
-#define SH_XN_ERROR_MASK_XNPI_SBE_ERROR_MASK 0x0000000020000000
-
-/* SH_XN_ERROR_MASK_XNPI_UCE_ERROR */
-/* Description: XNPI uncorrectable error */
-#define SH_XN_ERROR_MASK_XNPI_UCE_ERROR_SHFT 30
-#define SH_XN_ERROR_MASK_XNPI_UCE_ERROR_MASK 0x0000000040000000
-
-/* SH_XN_ERROR_MASK_XNPI_LUT_ERROR */
-/* Description: XNPI look up table error */
-#define SH_XN_ERROR_MASK_XNPI_LUT_ERROR_SHFT 31
-#define SH_XN_ERROR_MASK_XNPI_LUT_ERROR_MASK 0x0000000080000000
-
-/* SH_XN_ERROR_MASK_IILB_DEBIT_OVERFLOW */
-/* Description: IILB debit overflow */
-#define SH_XN_ERROR_MASK_IILB_DEBIT_OVERFLOW_SHFT 32
-#define SH_XN_ERROR_MASK_IILB_DEBIT_OVERFLOW_MASK 0x0000000100000000
-
-/* SH_XN_ERROR_MASK_IILB_CREDIT_OVERFLOW */
-/* Description: IILB credit overflow */
-#define SH_XN_ERROR_MASK_IILB_CREDIT_OVERFLOW_SHFT 33
-#define SH_XN_ERROR_MASK_IILB_CREDIT_OVERFLOW_MASK 0x0000000200000000
-
-/* SH_XN_ERROR_MASK_IILB_FIFO_OVERFLOW */
-/* Description: IILB fifo overflow */
-#define SH_XN_ERROR_MASK_IILB_FIFO_OVERFLOW_SHFT 34
-#define SH_XN_ERROR_MASK_IILB_FIFO_OVERFLOW_MASK 0x0000000400000000
-
-/* SH_XN_ERROR_MASK_IILB_CREDIT_UNDERFLOW */
-/* Description: IILB credit underflow */
-#define SH_XN_ERROR_MASK_IILB_CREDIT_UNDERFLOW_SHFT 35
-#define SH_XN_ERROR_MASK_IILB_CREDIT_UNDERFLOW_MASK 0x0000000800000000
-
-/* SH_XN_ERROR_MASK_IILB_FIFO_UNDERFLOW */
-/* Description: IILB fifo underflow */
-#define SH_XN_ERROR_MASK_IILB_FIFO_UNDERFLOW_SHFT 36
-#define SH_XN_ERROR_MASK_IILB_FIFO_UNDERFLOW_MASK 0x0000001000000000
-
-/* SH_XN_ERROR_MASK_IILB_CHIPLET_OR_LUT */
-/* Description: IILB chiplet nomatch or lut read error */
-#define SH_XN_ERROR_MASK_IILB_CHIPLET_OR_LUT_SHFT 37
-#define SH_XN_ERROR_MASK_IILB_CHIPLET_OR_LUT_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_FIRST_ERROR" */
-/* ==================================================================== */
-
-#define SH_XN_FIRST_ERROR 0x0000000150040060
-#define SH_XN_FIRST_ERROR_MASK 0x0000003fffffffff
-#define SH_XN_FIRST_ERROR_INIT 0x0000003fffffffff
-
-/* SH_XN_FIRST_ERROR_NI0_POP_OVERFLOW */
-/* Description: NI0 pop overflow */
-#define SH_XN_FIRST_ERROR_NI0_POP_OVERFLOW_SHFT 0
-#define SH_XN_FIRST_ERROR_NI0_POP_OVERFLOW_MASK 0x0000000000000001
-
-/* SH_XN_FIRST_ERROR_NI0_PUSH_OVERFLOW */
-/* Description: NI0 push overflow */
-#define SH_XN_FIRST_ERROR_NI0_PUSH_OVERFLOW_SHFT 1
-#define SH_XN_FIRST_ERROR_NI0_PUSH_OVERFLOW_MASK 0x0000000000000002
-
-/* SH_XN_FIRST_ERROR_NI0_CREDIT_OVERFLOW */
-/* Description: NI0 credit overflow */
-#define SH_XN_FIRST_ERROR_NI0_CREDIT_OVERFLOW_SHFT 2
-#define SH_XN_FIRST_ERROR_NI0_CREDIT_OVERFLOW_MASK 0x0000000000000004
-
-/* SH_XN_FIRST_ERROR_NI0_DEBIT_OVERFLOW */
-/* Description: NI0 debit overflow */
-#define SH_XN_FIRST_ERROR_NI0_DEBIT_OVERFLOW_SHFT 3
-#define SH_XN_FIRST_ERROR_NI0_DEBIT_OVERFLOW_MASK 0x0000000000000008
-
-/* SH_XN_FIRST_ERROR_NI0_POP_UNDERFLOW */
-/* Description: NI0 pop underflow */
-#define SH_XN_FIRST_ERROR_NI0_POP_UNDERFLOW_SHFT 4
-#define SH_XN_FIRST_ERROR_NI0_POP_UNDERFLOW_MASK 0x0000000000000010
-
-/* SH_XN_FIRST_ERROR_NI0_PUSH_UNDERFLOW */
-/* Description: NI0 push underflow */
-#define SH_XN_FIRST_ERROR_NI0_PUSH_UNDERFLOW_SHFT 5
-#define SH_XN_FIRST_ERROR_NI0_PUSH_UNDERFLOW_MASK 0x0000000000000020
-
-/* SH_XN_FIRST_ERROR_NI0_CREDIT_UNDERFLOW */
-/* Description: NI0 credit underflow */
-#define SH_XN_FIRST_ERROR_NI0_CREDIT_UNDERFLOW_SHFT 6
-#define SH_XN_FIRST_ERROR_NI0_CREDIT_UNDERFLOW_MASK 0x0000000000000040
-
-/* SH_XN_FIRST_ERROR_NI0_LLP_ERROR */
-/* Description: NI0 llp error */
-#define SH_XN_FIRST_ERROR_NI0_LLP_ERROR_SHFT 7
-#define SH_XN_FIRST_ERROR_NI0_LLP_ERROR_MASK 0x0000000000000080
-
-/* SH_XN_FIRST_ERROR_NI0_PIPE_ERROR */
-/* Description: NI0 Pipe in/out errors */
-#define SH_XN_FIRST_ERROR_NI0_PIPE_ERROR_SHFT 8
-#define SH_XN_FIRST_ERROR_NI0_PIPE_ERROR_MASK 0x0000000000000100
-
-/* SH_XN_FIRST_ERROR_NI1_POP_OVERFLOW */
-/* Description: NI1 pop overflow */
-#define SH_XN_FIRST_ERROR_NI1_POP_OVERFLOW_SHFT 9
-#define SH_XN_FIRST_ERROR_NI1_POP_OVERFLOW_MASK 0x0000000000000200
-
-/* SH_XN_FIRST_ERROR_NI1_PUSH_OVERFLOW */
-/* Description: NI1 push overflow */
-#define SH_XN_FIRST_ERROR_NI1_PUSH_OVERFLOW_SHFT 10
-#define SH_XN_FIRST_ERROR_NI1_PUSH_OVERFLOW_MASK 0x0000000000000400
-
-/* SH_XN_FIRST_ERROR_NI1_CREDIT_OVERFLOW */
-/* Description: NI1 credit overflow */
-#define SH_XN_FIRST_ERROR_NI1_CREDIT_OVERFLOW_SHFT 11
-#define SH_XN_FIRST_ERROR_NI1_CREDIT_OVERFLOW_MASK 0x0000000000000800
-
-/* SH_XN_FIRST_ERROR_NI1_DEBIT_OVERFLOW */
-/* Description: NI1 debit overflow */
-#define SH_XN_FIRST_ERROR_NI1_DEBIT_OVERFLOW_SHFT 12
-#define SH_XN_FIRST_ERROR_NI1_DEBIT_OVERFLOW_MASK 0x0000000000001000
-
-/* SH_XN_FIRST_ERROR_NI1_POP_UNDERFLOW */
-/* Description: NI1 pop underflow */
-#define SH_XN_FIRST_ERROR_NI1_POP_UNDERFLOW_SHFT 13
-#define SH_XN_FIRST_ERROR_NI1_POP_UNDERFLOW_MASK 0x0000000000002000
-
-/* SH_XN_FIRST_ERROR_NI1_PUSH_UNDERFLOW */
-/* Description: NI1 push underflow */
-#define SH_XN_FIRST_ERROR_NI1_PUSH_UNDERFLOW_SHFT 14
-#define SH_XN_FIRST_ERROR_NI1_PUSH_UNDERFLOW_MASK 0x0000000000004000
-
-/* SH_XN_FIRST_ERROR_NI1_CREDIT_UNDERFLOW */
-/* Description: NI1 credit underflow */
-#define SH_XN_FIRST_ERROR_NI1_CREDIT_UNDERFLOW_SHFT 15
-#define SH_XN_FIRST_ERROR_NI1_CREDIT_UNDERFLOW_MASK 0x0000000000008000
-
-/* SH_XN_FIRST_ERROR_NI1_LLP_ERROR */
-/* Description: NI1 llp error */
-#define SH_XN_FIRST_ERROR_NI1_LLP_ERROR_SHFT 16
-#define SH_XN_FIRST_ERROR_NI1_LLP_ERROR_MASK 0x0000000000010000
-
-/* SH_XN_FIRST_ERROR_NI1_PIPE_ERROR */
-/* Description: NI1 pipe in/out error */
-#define SH_XN_FIRST_ERROR_NI1_PIPE_ERROR_SHFT 17
-#define SH_XN_FIRST_ERROR_NI1_PIPE_ERROR_MASK 0x0000000000020000
-
-/* SH_XN_FIRST_ERROR_XNMD_CREDIT_OVERFLOW */
-/* Description: XNMD credit overflow */
-#define SH_XN_FIRST_ERROR_XNMD_CREDIT_OVERFLOW_SHFT 18
-#define SH_XN_FIRST_ERROR_XNMD_CREDIT_OVERFLOW_MASK 0x0000000000040000
-
-/* SH_XN_FIRST_ERROR_XNMD_DEBIT_OVERFLOW */
-/* Description: XNMD debit overflow */
-#define SH_XN_FIRST_ERROR_XNMD_DEBIT_OVERFLOW_SHFT 19
-#define SH_XN_FIRST_ERROR_XNMD_DEBIT_OVERFLOW_MASK 0x0000000000080000
-
-/* SH_XN_FIRST_ERROR_XNMD_DATA_BUFF_OVERFLOW */
-/* Description: XNMD data buffer overflow */
-#define SH_XN_FIRST_ERROR_XNMD_DATA_BUFF_OVERFLOW_SHFT 20
-#define SH_XN_FIRST_ERROR_XNMD_DATA_BUFF_OVERFLOW_MASK 0x0000000000100000
-
-/* SH_XN_FIRST_ERROR_XNMD_CREDIT_UNDERFLOW */
-/* Description: XNMD credit underflow */
-#define SH_XN_FIRST_ERROR_XNMD_CREDIT_UNDERFLOW_SHFT 21
-#define SH_XN_FIRST_ERROR_XNMD_CREDIT_UNDERFLOW_MASK 0x0000000000200000
-
-/* SH_XN_FIRST_ERROR_XNMD_SBE_ERROR */
-/* Description: XNMD single bit error */
-#define SH_XN_FIRST_ERROR_XNMD_SBE_ERROR_SHFT 22
-#define SH_XN_FIRST_ERROR_XNMD_SBE_ERROR_MASK 0x0000000000400000
-
-/* SH_XN_FIRST_ERROR_XNMD_UCE_ERROR */
-/* Description: XNMD uncorrectable error */
-#define SH_XN_FIRST_ERROR_XNMD_UCE_ERROR_SHFT 23
-#define SH_XN_FIRST_ERROR_XNMD_UCE_ERROR_MASK 0x0000000000800000
-
-/* SH_XN_FIRST_ERROR_XNMD_LUT_ERROR */
-/* Description: XNMD look up table error */
-#define SH_XN_FIRST_ERROR_XNMD_LUT_ERROR_SHFT 24
-#define SH_XN_FIRST_ERROR_XNMD_LUT_ERROR_MASK 0x0000000001000000
-
-/* SH_XN_FIRST_ERROR_XNPI_CREDIT_OVERFLOW */
-/* Description: XNMD credit overflow */
-#define SH_XN_FIRST_ERROR_XNPI_CREDIT_OVERFLOW_SHFT 25
-#define SH_XN_FIRST_ERROR_XNPI_CREDIT_OVERFLOW_MASK 0x0000000002000000
-
-/* SH_XN_FIRST_ERROR_XNPI_DEBIT_OVERFLOW */
-/* Description: XNPI debit overflow */
-#define SH_XN_FIRST_ERROR_XNPI_DEBIT_OVERFLOW_SHFT 26
-#define SH_XN_FIRST_ERROR_XNPI_DEBIT_OVERFLOW_MASK 0x0000000004000000
-
-/* SH_XN_FIRST_ERROR_XNPI_DATA_BUFF_OVERFLOW */
-/* Description: XNPI data buffer overflow */
-#define SH_XN_FIRST_ERROR_XNPI_DATA_BUFF_OVERFLOW_SHFT 27
-#define SH_XN_FIRST_ERROR_XNPI_DATA_BUFF_OVERFLOW_MASK 0x0000000008000000
-
-/* SH_XN_FIRST_ERROR_XNPI_CREDIT_UNDERFLOW */
-/* Description: XNPI credit underflow */
-#define SH_XN_FIRST_ERROR_XNPI_CREDIT_UNDERFLOW_SHFT 28
-#define SH_XN_FIRST_ERROR_XNPI_CREDIT_UNDERFLOW_MASK 0x0000000010000000
-
-/* SH_XN_FIRST_ERROR_XNPI_SBE_ERROR */
-/* Description: XNPI single bit error */
-#define SH_XN_FIRST_ERROR_XNPI_SBE_ERROR_SHFT 29
-#define SH_XN_FIRST_ERROR_XNPI_SBE_ERROR_MASK 0x0000000020000000
-
-/* SH_XN_FIRST_ERROR_XNPI_UCE_ERROR */
-/* Description: XNPI uncorrectable error */
-#define SH_XN_FIRST_ERROR_XNPI_UCE_ERROR_SHFT 30
-#define SH_XN_FIRST_ERROR_XNPI_UCE_ERROR_MASK 0x0000000040000000
-
-/* SH_XN_FIRST_ERROR_XNPI_LUT_ERROR */
-/* Description: XNPI look up table error */
-#define SH_XN_FIRST_ERROR_XNPI_LUT_ERROR_SHFT 31
-#define SH_XN_FIRST_ERROR_XNPI_LUT_ERROR_MASK 0x0000000080000000
-
-/* SH_XN_FIRST_ERROR_IILB_DEBIT_OVERFLOW */
-/* Description: IILB debit overflow */
-#define SH_XN_FIRST_ERROR_IILB_DEBIT_OVERFLOW_SHFT 32
-#define SH_XN_FIRST_ERROR_IILB_DEBIT_OVERFLOW_MASK 0x0000000100000000
-
-/* SH_XN_FIRST_ERROR_IILB_CREDIT_OVERFLOW */
-/* Description: IILB credit overflow */
-#define SH_XN_FIRST_ERROR_IILB_CREDIT_OVERFLOW_SHFT 33
-#define SH_XN_FIRST_ERROR_IILB_CREDIT_OVERFLOW_MASK 0x0000000200000000
-
-/* SH_XN_FIRST_ERROR_IILB_FIFO_OVERFLOW */
-/* Description: IILB fifo overflow */
-#define SH_XN_FIRST_ERROR_IILB_FIFO_OVERFLOW_SHFT 34
-#define SH_XN_FIRST_ERROR_IILB_FIFO_OVERFLOW_MASK 0x0000000400000000
-
-/* SH_XN_FIRST_ERROR_IILB_CREDIT_UNDERFLOW */
-/* Description: IILB credit underflow */
-#define SH_XN_FIRST_ERROR_IILB_CREDIT_UNDERFLOW_SHFT 35
-#define SH_XN_FIRST_ERROR_IILB_CREDIT_UNDERFLOW_MASK 0x0000000800000000
-
-/* SH_XN_FIRST_ERROR_IILB_FIFO_UNDERFLOW */
-/* Description: IILB fifo underflow */
-#define SH_XN_FIRST_ERROR_IILB_FIFO_UNDERFLOW_SHFT 36
-#define SH_XN_FIRST_ERROR_IILB_FIFO_UNDERFLOW_MASK 0x0000001000000000
-
-/* SH_XN_FIRST_ERROR_IILB_CHIPLET_OR_LUT */
-/* Description: IILB chiplet nomatch or lut read error */
-#define SH_XN_FIRST_ERROR_IILB_CHIPLET_OR_LUT_SHFT 37
-#define SH_XN_FIRST_ERROR_IILB_CHIPLET_OR_LUT_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_SUMMARY" */
-/* ==================================================================== */
-
-#define SH_XNIILB_ERROR_SUMMARY 0x0000000150040200
-#define SH_XNIILB_ERROR_SUMMARY_MASK 0xffffffffffffffff
-#define SH_XNIILB_ERROR_SUMMARY_INIT 0xffffffffffffffff
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_DEBIT0 */
-/* Description: II debit0 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_DEBIT0_SHFT 0
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_DEBIT0_MASK 0x0000000000000001
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_DEBIT2 */
-/* Description: II debit2 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_DEBIT2_SHFT 1
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_DEBIT2_MASK 0x0000000000000002
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_DEBIT0 */
-/* Description: LB debit0 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_DEBIT0_SHFT 2
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_DEBIT0_MASK 0x0000000000000004
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_DEBIT2 */
-/* Description: LB debit2 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_DEBIT2_SHFT 3
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_DEBIT2_MASK 0x0000000000000008
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_VC0 */
-/* Description: II VC0 fifo overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_VC0_SHFT 4
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_VC0_MASK 0x0000000000000010
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_VC2 */
-/* Description: II VC2 fifo overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_VC2_SHFT 5
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_II_VC2_MASK 0x0000000000000020
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_II_VC0 */
-/* Description: II VC0 fifo underflow */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_II_VC0_SHFT 6
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_II_VC0_MASK 0x0000000000000040
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_II_VC2 */
-/* Description: II VC2 fifo underflow */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_II_VC2_SHFT 7
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_II_VC2_MASK 0x0000000000000080
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_VC0 */
-/* Description: LB VC0 fifo overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_VC0_SHFT 8
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_VC0_MASK 0x0000000000000100
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_VC2 */
-/* Description: LB VC2 fifo overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_VC2_SHFT 9
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_LB_VC2_MASK 0x0000000000000200
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_LB_VC0 */
-/* Description: LB VC0 fifo underflow */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_LB_VC0_SHFT 10
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_LB_VC0_MASK 0x0000000000000400
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_LB_VC2 */
-/* Description: LB VC2 fifo underflow */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_LB_VC2_SHFT 11
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_LB_VC2_MASK 0x0000000000000800
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC0_CREDIT_IN */
-/* Description: PI VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC0_CREDIT_IN_SHFT 12
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC0_CREDIT_IN_MASK 0x0000000000001000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT_IN */
-/* Description: IILB VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT_IN_SHFT 13
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT_IN_MASK 0x0000000000002000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC0_CREDIT_IN */
-/* Description: MD VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC0_CREDIT_IN_SHFT 14
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC0_CREDIT_IN_MASK 0x0000000000004000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT_IN */
-/* Description: NI0 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT_IN_SHFT 15
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT_IN_MASK 0x0000000000008000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT_IN */
-/* Description: NI1 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT_IN_SHFT 16
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT_IN_MASK 0x0000000000010000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC2_CREDIT_IN */
-/* Description: PI VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC2_CREDIT_IN_SHFT 17
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC2_CREDIT_IN_MASK 0x0000000000020000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT_IN */
-/* Description: IILB VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT_IN_SHFT 18
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT_IN_MASK 0x0000000000040000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC2_CREDIT_IN */
-/* Description: MD VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC2_CREDIT_IN_SHFT 19
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC2_CREDIT_IN_MASK 0x0000000000080000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT_IN */
-/* Description: NI0 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT_IN_SHFT 20
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT_IN_MASK 0x0000000000100000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT_IN */
-/* Description: NI1 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT_IN_SHFT 21
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT_IN_MASK 0x0000000000200000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC0_CREDIT_IN */
-/* Description: PI VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC0_CREDIT_IN_SHFT 22
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC0_CREDIT_IN_MASK 0x0000000000400000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT_IN */
-/* Description: IILB VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT_IN_SHFT 23
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT_IN_MASK 0x0000000000800000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC0_CREDIT_IN */
-/* Description: MD VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC0_CREDIT_IN_SHFT 24
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC0_CREDIT_IN_MASK 0x0000000001000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT_IN */
-/* Description: NI0 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT_IN_SHFT 25
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT_IN_MASK 0x0000000002000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT_IN */
-/* Description: NI1 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT_IN_SHFT 26
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT_IN_MASK 0x0000000004000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC2_CREDIT_IN */
-/* Description: PI VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC2_CREDIT_IN_SHFT 27
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC2_CREDIT_IN_MASK 0x0000000008000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT_IN */
-/* Description: IILB VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT_IN_SHFT 28
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT_IN_MASK 0x0000000010000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC2_CREDIT_IN */
-/* Description: MD VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC2_CREDIT_IN_SHFT 29
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC2_CREDIT_IN_MASK 0x0000000020000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT_IN */
-/* Description: NI0 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT_IN_SHFT 30
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT_IN_MASK 0x0000000040000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT_IN */
-/* Description: NI1 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT_IN_SHFT 31
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT_IN_MASK 0x0000000080000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_DEBIT0 */
-/* Description: PI Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_DEBIT0_SHFT 32
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_DEBIT0_MASK 0x0000000100000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_DEBIT2 */
-/* Description: PI Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_DEBIT2_SHFT 33
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_DEBIT2_MASK 0x0000000200000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT0_SHFT 34
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT0_MASK 0x0000000400000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT2_SHFT 35
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT2_MASK 0x0000000800000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_DEBIT0 */
-/* Description: MD Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_DEBIT0_SHFT 36
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_DEBIT0_MASK 0x0000001000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_DEBIT2 */
-/* Description: MD Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_DEBIT2_SHFT 37
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_DEBIT2_MASK 0x0000002000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT0_SHFT 38
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT0_MASK 0x0000004000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT2_SHFT 39
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT2_MASK 0x0000008000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT0_SHFT 40
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT0_MASK 0x0000010000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT2_SHFT 41
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT2_MASK 0x0000020000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC0_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC0_CREDIT_OUT_SHFT 42
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC0_CREDIT_OUT_MASK 0x0000040000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC2_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC2_CREDIT_OUT_SHFT 43
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_PI_VC2_CREDIT_OUT_MASK 0x0000080000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC0_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC0_CREDIT_OUT_SHFT 44
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC0_CREDIT_OUT_MASK 0x0000100000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC2_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC2_CREDIT_OUT_SHFT 45
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_MD_VC2_CREDIT_OUT_MASK 0x0000200000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT_OUT_SHFT 46
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT_OUT_MASK 0x0000400000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT_OUT_SHFT 47
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT_OUT_MASK 0x0000800000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT_OUT_SHFT 48
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT_OUT_MASK 0x0001000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT_OUT_SHFT 49
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT_OUT_MASK 0x0002000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT_OUT_SHFT 50
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT_OUT_MASK 0x0004000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT_OUT_SHFT 51
-#define SH_XNIILB_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT_OUT_MASK 0x0008000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC0_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC0_CREDIT_OUT_SHFT 52
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC0_CREDIT_OUT_MASK 0x0010000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC2_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC2_CREDIT_OUT_SHFT 53
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_PI_VC2_CREDIT_OUT_MASK 0x0020000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC0_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC0_CREDIT_OUT_SHFT 54
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC0_CREDIT_OUT_MASK 0x0040000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC2_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC2_CREDIT_OUT_SHFT 55
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_MD_VC2_CREDIT_OUT_MASK 0x0080000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT_OUT_SHFT 56
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT_OUT_MASK 0x0100000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT_OUT_SHFT 57
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT_OUT_MASK 0x0200000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT_OUT_SHFT 58
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT_OUT_MASK 0x0400000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT_OUT_SHFT 59
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT_OUT_MASK 0x0800000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT_OUT_SHFT 60
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT_OUT_MASK 0x1000000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT_OUT_SHFT 61
-#define SH_XNIILB_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT_OUT_MASK 0x2000000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_XNIILB_ERROR_SUMMARY_CHIPLET_NOMATCH_SHFT 62
-#define SH_XNIILB_ERROR_SUMMARY_CHIPLET_NOMATCH_MASK 0x4000000000000000
-
-/* SH_XNIILB_ERROR_SUMMARY_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNIILB_ERROR_SUMMARY_LUT_READ_ERROR_SHFT 63
-#define SH_XNIILB_ERROR_SUMMARY_LUT_READ_ERROR_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERRORS_ALIAS" */
-/* ==================================================================== */
-
-#define SH_XNIILB_ERRORS_ALIAS 0x0000000150040208
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_OVERFLOW" */
-/* ==================================================================== */
-
-#define SH_XNIILB_ERROR_OVERFLOW 0x0000000150040220
-#define SH_XNIILB_ERROR_OVERFLOW_MASK 0xffffffffffffffff
-#define SH_XNIILB_ERROR_OVERFLOW_INIT 0xffffffffffffffff
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_DEBIT0 */
-/* Description: II debit0 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_DEBIT0_SHFT 0
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_DEBIT0_MASK 0x0000000000000001
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_DEBIT2 */
-/* Description: II debit2 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_DEBIT2_SHFT 1
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_DEBIT2_MASK 0x0000000000000002
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_DEBIT0 */
-/* Description: LB debit0 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_DEBIT0_SHFT 2
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_DEBIT0_MASK 0x0000000000000004
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_DEBIT2 */
-/* Description: LB debit2 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_DEBIT2_SHFT 3
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_DEBIT2_MASK 0x0000000000000008
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_VC0 */
-/* Description: II VC0 fifo overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_VC0_SHFT 4
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_VC0_MASK 0x0000000000000010
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_VC2 */
-/* Description: II VC2 fifo overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_VC2_SHFT 5
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_II_VC2_MASK 0x0000000000000020
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_II_VC0 */
-/* Description: II VC0 fifo underflow */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_II_VC0_SHFT 6
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_II_VC0_MASK 0x0000000000000040
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_II_VC2 */
-/* Description: II VC2 fifo underflow */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_II_VC2_SHFT 7
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_II_VC2_MASK 0x0000000000000080
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_VC0 */
-/* Description: LB VC0 fifo overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_VC0_SHFT 8
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_VC0_MASK 0x0000000000000100
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_VC2 */
-/* Description: LB VC2 fifo overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_VC2_SHFT 9
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_LB_VC2_MASK 0x0000000000000200
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_LB_VC0 */
-/* Description: LB VC0 fifo underflow */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_LB_VC0_SHFT 10
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_LB_VC0_MASK 0x0000000000000400
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_LB_VC2 */
-/* Description: LB VC2 fifo underflow */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_LB_VC2_SHFT 11
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_LB_VC2_MASK 0x0000000000000800
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC0_CREDIT_IN */
-/* Description: PI VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC0_CREDIT_IN_SHFT 12
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC0_CREDIT_IN_MASK 0x0000000000001000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT_IN */
-/* Description: IILB VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT_IN_SHFT 13
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT_IN_MASK 0x0000000000002000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC0_CREDIT_IN */
-/* Description: MD VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC0_CREDIT_IN_SHFT 14
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC0_CREDIT_IN_MASK 0x0000000000004000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT_IN */
-/* Description: NI0 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT_IN_SHFT 15
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT_IN_MASK 0x0000000000008000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT_IN */
-/* Description: NI1 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT_IN_SHFT 16
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT_IN_MASK 0x0000000000010000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC2_CREDIT_IN */
-/* Description: PI VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC2_CREDIT_IN_SHFT 17
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC2_CREDIT_IN_MASK 0x0000000000020000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT_IN */
-/* Description: IILB VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT_IN_SHFT 18
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT_IN_MASK 0x0000000000040000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC2_CREDIT_IN */
-/* Description: MD VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC2_CREDIT_IN_SHFT 19
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC2_CREDIT_IN_MASK 0x0000000000080000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT_IN */
-/* Description: NI0 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT_IN_SHFT 20
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT_IN_MASK 0x0000000000100000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT_IN */
-/* Description: NI1 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT_IN_SHFT 21
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT_IN_MASK 0x0000000000200000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC0_CREDIT_IN */
-/* Description: PI VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC0_CREDIT_IN_SHFT 22
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC0_CREDIT_IN_MASK 0x0000000000400000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT_IN */
-/* Description: IILB VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT_IN_SHFT 23
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT_IN_MASK 0x0000000000800000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC0_CREDIT_IN */
-/* Description: MD VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC0_CREDIT_IN_SHFT 24
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC0_CREDIT_IN_MASK 0x0000000001000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT_IN */
-/* Description: NI0 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT_IN_SHFT 25
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT_IN_MASK 0x0000000002000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT_IN */
-/* Description: NI1 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT_IN_SHFT 26
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT_IN_MASK 0x0000000004000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC2_CREDIT_IN */
-/* Description: PI VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC2_CREDIT_IN_SHFT 27
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC2_CREDIT_IN_MASK 0x0000000008000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT_IN */
-/* Description: IILB VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT_IN_SHFT 28
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT_IN_MASK 0x0000000010000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC2_CREDIT_IN */
-/* Description: MD VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC2_CREDIT_IN_SHFT 29
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC2_CREDIT_IN_MASK 0x0000000020000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT_IN */
-/* Description: NI0 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT_IN_SHFT 30
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT_IN_MASK 0x0000000040000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT_IN */
-/* Description: NI1 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT_IN_SHFT 31
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT_IN_MASK 0x0000000080000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_DEBIT0 */
-/* Description: PI Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_DEBIT0_SHFT 32
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_DEBIT0_MASK 0x0000000100000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_DEBIT2 */
-/* Description: PI Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_DEBIT2_SHFT 33
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_DEBIT2_MASK 0x0000000200000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT0_SHFT 34
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT0_MASK 0x0000000400000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT2_SHFT 35
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT2_MASK 0x0000000800000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_DEBIT0 */
-/* Description: MD Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_DEBIT0_SHFT 36
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_DEBIT0_MASK 0x0000001000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_DEBIT2 */
-/* Description: MD Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_DEBIT2_SHFT 37
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_DEBIT2_MASK 0x0000002000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT0_SHFT 38
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT0_MASK 0x0000004000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT2_SHFT 39
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT2_MASK 0x0000008000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT0_SHFT 40
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT0_MASK 0x0000010000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT2_SHFT 41
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT2_MASK 0x0000020000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC0_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC0_CREDIT_OUT_SHFT 42
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC0_CREDIT_OUT_MASK 0x0000040000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC2_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC2_CREDIT_OUT_SHFT 43
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_PI_VC2_CREDIT_OUT_MASK 0x0000080000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC0_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC0_CREDIT_OUT_SHFT 44
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC0_CREDIT_OUT_MASK 0x0000100000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC2_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC2_CREDIT_OUT_SHFT 45
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_MD_VC2_CREDIT_OUT_MASK 0x0000200000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT_OUT_SHFT 46
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT_OUT_MASK 0x0000400000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT_OUT_SHFT 47
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT_OUT_MASK 0x0000800000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT_OUT_SHFT 48
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT_OUT_MASK 0x0001000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT_OUT_SHFT 49
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT_OUT_MASK 0x0002000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT_OUT_SHFT 50
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT_OUT_MASK 0x0004000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT_OUT_SHFT 51
-#define SH_XNIILB_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT_OUT_MASK 0x0008000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC0_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC0_CREDIT_OUT_SHFT 52
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC0_CREDIT_OUT_MASK 0x0010000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC2_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC2_CREDIT_OUT_SHFT 53
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_PI_VC2_CREDIT_OUT_MASK 0x0020000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC0_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC0_CREDIT_OUT_SHFT 54
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC0_CREDIT_OUT_MASK 0x0040000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC2_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC2_CREDIT_OUT_SHFT 55
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_MD_VC2_CREDIT_OUT_MASK 0x0080000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT_OUT_SHFT 56
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT_OUT_MASK 0x0100000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT_OUT_SHFT 57
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT_OUT_MASK 0x0200000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT_OUT_SHFT 58
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT_OUT_MASK 0x0400000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT_OUT_SHFT 59
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT_OUT_MASK 0x0800000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT_OUT_SHFT 60
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT_OUT_MASK 0x1000000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT_OUT_SHFT 61
-#define SH_XNIILB_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT_OUT_MASK 0x2000000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_XNIILB_ERROR_OVERFLOW_CHIPLET_NOMATCH_SHFT 62
-#define SH_XNIILB_ERROR_OVERFLOW_CHIPLET_NOMATCH_MASK 0x4000000000000000
-
-/* SH_XNIILB_ERROR_OVERFLOW_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNIILB_ERROR_OVERFLOW_LUT_READ_ERROR_SHFT 63
-#define SH_XNIILB_ERROR_OVERFLOW_LUT_READ_ERROR_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_OVERFLOW_ALIAS" */
-/* ==================================================================== */
-
-#define SH_XNIILB_ERROR_OVERFLOW_ALIAS 0x0000000150040228
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_MASK" */
-/* ==================================================================== */
-
-#define SH_XNIILB_ERROR_MASK 0x0000000150040240
-#define SH_XNIILB_ERROR_MASK_MASK 0xffffffffffffffff
-#define SH_XNIILB_ERROR_MASK_INIT 0xffffffffffffffff
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_II_DEBIT0 */
-/* Description: II debit0 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_II_DEBIT0_SHFT 0
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_II_DEBIT0_MASK 0x0000000000000001
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_II_DEBIT2 */
-/* Description: II debit2 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_II_DEBIT2_SHFT 1
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_II_DEBIT2_MASK 0x0000000000000002
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_LB_DEBIT0 */
-/* Description: LB debit0 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_LB_DEBIT0_SHFT 2
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_LB_DEBIT0_MASK 0x0000000000000004
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_LB_DEBIT2 */
-/* Description: LB debit2 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_LB_DEBIT2_SHFT 3
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_LB_DEBIT2_MASK 0x0000000000000008
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_II_VC0 */
-/* Description: II VC0 fifo overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_II_VC0_SHFT 4
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_II_VC0_MASK 0x0000000000000010
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_II_VC2 */
-/* Description: II VC2 fifo overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_II_VC2_SHFT 5
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_II_VC2_MASK 0x0000000000000020
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_II_VC0 */
-/* Description: II VC0 fifo underflow */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_II_VC0_SHFT 6
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_II_VC0_MASK 0x0000000000000040
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_II_VC2 */
-/* Description: II VC2 fifo underflow */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_II_VC2_SHFT 7
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_II_VC2_MASK 0x0000000000000080
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_LB_VC0 */
-/* Description: LB VC0 fifo overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_LB_VC0_SHFT 8
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_LB_VC0_MASK 0x0000000000000100
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_LB_VC2 */
-/* Description: LB VC2 fifo overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_LB_VC2_SHFT 9
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_LB_VC2_MASK 0x0000000000000200
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_LB_VC0 */
-/* Description: LB VC0 fifo underflow */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_LB_VC0_SHFT 10
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_LB_VC0_MASK 0x0000000000000400
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_LB_VC2 */
-/* Description: LB VC2 fifo underflow */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_LB_VC2_SHFT 11
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_LB_VC2_MASK 0x0000000000000800
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC0_CREDIT_IN */
-/* Description: PI VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC0_CREDIT_IN_SHFT 12
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC0_CREDIT_IN_MASK 0x0000000000001000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT_IN */
-/* Description: IILB VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT_IN_SHFT 13
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT_IN_MASK 0x0000000000002000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC0_CREDIT_IN */
-/* Description: MD VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC0_CREDIT_IN_SHFT 14
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC0_CREDIT_IN_MASK 0x0000000000004000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT_IN */
-/* Description: NI0 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT_IN_SHFT 15
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT_IN_MASK 0x0000000000008000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT_IN */
-/* Description: NI1 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT_IN_SHFT 16
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT_IN_MASK 0x0000000000010000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC2_CREDIT_IN */
-/* Description: PI VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC2_CREDIT_IN_SHFT 17
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC2_CREDIT_IN_MASK 0x0000000000020000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT_IN */
-/* Description: IILB VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT_IN_SHFT 18
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT_IN_MASK 0x0000000000040000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC2_CREDIT_IN */
-/* Description: MD VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC2_CREDIT_IN_SHFT 19
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC2_CREDIT_IN_MASK 0x0000000000080000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT_IN */
-/* Description: NI0 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT_IN_SHFT 20
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT_IN_MASK 0x0000000000100000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT_IN */
-/* Description: NI1 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT_IN_SHFT 21
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT_IN_MASK 0x0000000000200000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC0_CREDIT_IN */
-/* Description: PI VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC0_CREDIT_IN_SHFT 22
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC0_CREDIT_IN_MASK 0x0000000000400000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT_IN */
-/* Description: IILB VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT_IN_SHFT 23
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT_IN_MASK 0x0000000000800000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC0_CREDIT_IN */
-/* Description: MD VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC0_CREDIT_IN_SHFT 24
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC0_CREDIT_IN_MASK 0x0000000001000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT_IN */
-/* Description: NI0 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT_IN_SHFT 25
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT_IN_MASK 0x0000000002000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT_IN */
-/* Description: NI1 VC0 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT_IN_SHFT 26
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT_IN_MASK 0x0000000004000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC2_CREDIT_IN */
-/* Description: PI VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC2_CREDIT_IN_SHFT 27
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC2_CREDIT_IN_MASK 0x0000000008000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT_IN */
-/* Description: IILB VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT_IN_SHFT 28
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT_IN_MASK 0x0000000010000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC2_CREDIT_IN */
-/* Description: MD VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC2_CREDIT_IN_SHFT 29
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC2_CREDIT_IN_MASK 0x0000000020000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT_IN */
-/* Description: NI0 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT_IN_SHFT 30
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT_IN_MASK 0x0000000040000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT_IN */
-/* Description: NI1 VC2 credit overflow Pipe In */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT_IN_SHFT 31
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT_IN_MASK 0x0000000080000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_PI_DEBIT0 */
-/* Description: PI Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_DEBIT0_SHFT 32
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_DEBIT0_MASK 0x0000000100000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_PI_DEBIT2 */
-/* Description: PI Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_DEBIT2_SHFT 33
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_DEBIT2_MASK 0x0000000200000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_DEBIT0_SHFT 34
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_DEBIT0_MASK 0x0000000400000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_DEBIT2_SHFT 35
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_DEBIT2_MASK 0x0000000800000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_MD_DEBIT0 */
-/* Description: MD Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_DEBIT0_SHFT 36
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_DEBIT0_MASK 0x0000001000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_MD_DEBIT2 */
-/* Description: MD Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_DEBIT2_SHFT 37
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_DEBIT2_MASK 0x0000002000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_DEBIT0_SHFT 38
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_DEBIT0_MASK 0x0000004000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_DEBIT2_SHFT 39
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_DEBIT2_MASK 0x0000008000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Fifo Debit0 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_DEBIT0_SHFT 40
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_DEBIT0_MASK 0x0000010000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Fifo Debit2 overflow */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_DEBIT2_SHFT 41
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_DEBIT2_MASK 0x0000020000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC0_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC0_CREDIT_OUT_SHFT 42
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC0_CREDIT_OUT_MASK 0x0000040000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC2_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC2_CREDIT_OUT_SHFT 43
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_PI_VC2_CREDIT_OUT_MASK 0x0000080000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC0_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC0_CREDIT_OUT_SHFT 44
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC0_CREDIT_OUT_MASK 0x0000100000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC2_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC2_CREDIT_OUT_SHFT 45
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_MD_VC2_CREDIT_OUT_MASK 0x0000200000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT_OUT_SHFT 46
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT_OUT_MASK 0x0000400000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT_OUT_SHFT 47
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT_OUT_MASK 0x0000800000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT_OUT_SHFT 48
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT_OUT_MASK 0x0001000000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT_OUT_SHFT 49
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT_OUT_MASK 0x0002000000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT_OUT_SHFT 50
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT_OUT_MASK 0x0004000000000000
-
-/* SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT_OUT_SHFT 51
-#define SH_XNIILB_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT_OUT_MASK 0x0008000000000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC0_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC0_CREDIT_OUT_SHFT 52
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC0_CREDIT_OUT_MASK 0x0010000000000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC2_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC2_CREDIT_OUT_SHFT 53
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_PI_VC2_CREDIT_OUT_MASK 0x0020000000000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC0_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC0_CREDIT_OUT_SHFT 54
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC0_CREDIT_OUT_MASK 0x0040000000000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC2_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC2_CREDIT_OUT_SHFT 55
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_MD_VC2_CREDIT_OUT_MASK 0x0080000000000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT_OUT_SHFT 56
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT_OUT_MASK 0x0100000000000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT_OUT_SHFT 57
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT_OUT_MASK 0x0200000000000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT_OUT_SHFT 58
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT_OUT_MASK 0x0400000000000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT_OUT_SHFT 59
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT_OUT_MASK 0x0800000000000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT_OUT_SHFT 60
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT_OUT_MASK 0x1000000000000000
-
-/* SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT_OUT_SHFT 61
-#define SH_XNIILB_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT_OUT_MASK 0x2000000000000000
-
-/* SH_XNIILB_ERROR_MASK_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_XNIILB_ERROR_MASK_CHIPLET_NOMATCH_SHFT 62
-#define SH_XNIILB_ERROR_MASK_CHIPLET_NOMATCH_MASK 0x4000000000000000
-
-/* SH_XNIILB_ERROR_MASK_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNIILB_ERROR_MASK_LUT_READ_ERROR_SHFT 63
-#define SH_XNIILB_ERROR_MASK_LUT_READ_ERROR_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FIRST_ERROR" */
-/* ==================================================================== */
-
-#define SH_XNIILB_FIRST_ERROR 0x0000000150040260
-#define SH_XNIILB_FIRST_ERROR_MASK 0xffffffffffffffff
-#define SH_XNIILB_FIRST_ERROR_INIT 0xffffffffffffffff
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_II_DEBIT0 */
-/* Description: II debit0 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_II_DEBIT0_SHFT 0
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_II_DEBIT0_MASK 0x0000000000000001
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_II_DEBIT2 */
-/* Description: II debit2 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_II_DEBIT2_SHFT 1
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_II_DEBIT2_MASK 0x0000000000000002
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_DEBIT0 */
-/* Description: LB debit0 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_DEBIT0_SHFT 2
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_DEBIT0_MASK 0x0000000000000004
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_DEBIT2 */
-/* Description: LB debit2 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_DEBIT2_SHFT 3
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_DEBIT2_MASK 0x0000000000000008
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_II_VC0 */
-/* Description: II VC0 fifo overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_II_VC0_SHFT 4
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_II_VC0_MASK 0x0000000000000010
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_II_VC2 */
-/* Description: II VC2 fifo overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_II_VC2_SHFT 5
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_II_VC2_MASK 0x0000000000000020
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_II_VC0 */
-/* Description: II VC0 fifo underflow */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_II_VC0_SHFT 6
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_II_VC0_MASK 0x0000000000000040
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_II_VC2 */
-/* Description: II VC2 fifo underflow */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_II_VC2_SHFT 7
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_II_VC2_MASK 0x0000000000000080
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_VC0 */
-/* Description: LB VC0 fifo overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_VC0_SHFT 8
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_VC0_MASK 0x0000000000000100
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_VC2 */
-/* Description: LB VC2 fifo overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_VC2_SHFT 9
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_LB_VC2_MASK 0x0000000000000200
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_LB_VC0 */
-/* Description: LB VC0 fifo underflow */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_LB_VC0_SHFT 10
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_LB_VC0_MASK 0x0000000000000400
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_LB_VC2 */
-/* Description: LB VC2 fifo underflow */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_LB_VC2_SHFT 11
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_LB_VC2_MASK 0x0000000000000800
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC0_CREDIT_IN */
-/* Description: PI VC0 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC0_CREDIT_IN_SHFT 12
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC0_CREDIT_IN_MASK 0x0000000000001000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT_IN */
-/* Description: IILB VC0 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT_IN_SHFT 13
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT_IN_MASK 0x0000000000002000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC0_CREDIT_IN */
-/* Description: MD VC0 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC0_CREDIT_IN_SHFT 14
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC0_CREDIT_IN_MASK 0x0000000000004000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT_IN */
-/* Description: NI0 VC0 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT_IN_SHFT 15
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT_IN_MASK 0x0000000000008000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT_IN */
-/* Description: NI1 VC0 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT_IN_SHFT 16
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT_IN_MASK 0x0000000000010000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC2_CREDIT_IN */
-/* Description: PI VC2 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC2_CREDIT_IN_SHFT 17
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC2_CREDIT_IN_MASK 0x0000000000020000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT_IN */
-/* Description: IILB VC2 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT_IN_SHFT 18
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT_IN_MASK 0x0000000000040000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC2_CREDIT_IN */
-/* Description: MD VC2 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC2_CREDIT_IN_SHFT 19
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC2_CREDIT_IN_MASK 0x0000000000080000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT_IN */
-/* Description: NI0 VC2 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT_IN_SHFT 20
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT_IN_MASK 0x0000000000100000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT_IN */
-/* Description: NI1 VC2 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT_IN_SHFT 21
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT_IN_MASK 0x0000000000200000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC0_CREDIT_IN */
-/* Description: PI VC0 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC0_CREDIT_IN_SHFT 22
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC0_CREDIT_IN_MASK 0x0000000000400000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT_IN */
-/* Description: IILB VC0 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT_IN_SHFT 23
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT_IN_MASK 0x0000000000800000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC0_CREDIT_IN */
-/* Description: MD VC0 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC0_CREDIT_IN_SHFT 24
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC0_CREDIT_IN_MASK 0x0000000001000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT_IN */
-/* Description: NI0 VC0 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT_IN_SHFT 25
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT_IN_MASK 0x0000000002000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT_IN */
-/* Description: NI1 VC0 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT_IN_SHFT 26
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT_IN_MASK 0x0000000004000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC2_CREDIT_IN */
-/* Description: PI VC2 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC2_CREDIT_IN_SHFT 27
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC2_CREDIT_IN_MASK 0x0000000008000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT_IN */
-/* Description: IILB VC2 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT_IN_SHFT 28
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT_IN_MASK 0x0000000010000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC2_CREDIT_IN */
-/* Description: MD VC2 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC2_CREDIT_IN_SHFT 29
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC2_CREDIT_IN_MASK 0x0000000020000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT_IN */
-/* Description: NI0 VC2 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT_IN_SHFT 30
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT_IN_MASK 0x0000000040000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT_IN */
-/* Description: NI1 VC2 credit overflow Pipe In */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT_IN_SHFT 31
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT_IN_MASK 0x0000000080000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_DEBIT0 */
-/* Description: PI Fifo Debit0 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_DEBIT0_SHFT 32
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_DEBIT0_MASK 0x0000000100000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_DEBIT2 */
-/* Description: PI Fifo Debit2 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_DEBIT2_SHFT 33
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_DEBIT2_MASK 0x0000000200000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Fifo Debit0 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_DEBIT0_SHFT 34
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_DEBIT0_MASK 0x0000000400000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Fifo Debit2 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_DEBIT2_SHFT 35
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_DEBIT2_MASK 0x0000000800000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_DEBIT0 */
-/* Description: MD Fifo Debit0 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_DEBIT0_SHFT 36
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_DEBIT0_MASK 0x0000001000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_DEBIT2 */
-/* Description: MD Fifo Debit2 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_DEBIT2_SHFT 37
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_DEBIT2_MASK 0x0000002000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Fifo Debit0 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_DEBIT0_SHFT 38
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_DEBIT0_MASK 0x0000004000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Fifo Debit2 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_DEBIT2_SHFT 39
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_DEBIT2_MASK 0x0000008000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Fifo Debit0 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_DEBIT0_SHFT 40
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_DEBIT0_MASK 0x0000010000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Fifo Debit2 overflow */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_DEBIT2_SHFT 41
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_DEBIT2_MASK 0x0000020000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC0_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC0_CREDIT_OUT_SHFT 42
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC0_CREDIT_OUT_MASK 0x0000040000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC2_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC2_CREDIT_OUT_SHFT 43
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_PI_VC2_CREDIT_OUT_MASK 0x0000080000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC0_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC0_CREDIT_OUT_SHFT 44
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC0_CREDIT_OUT_MASK 0x0000100000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC2_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC2_CREDIT_OUT_SHFT 45
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_MD_VC2_CREDIT_OUT_MASK 0x0000200000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT_OUT_SHFT 46
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT_OUT_MASK 0x0000400000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT_OUT_SHFT 47
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT_OUT_MASK 0x0000800000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT_OUT_SHFT 48
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT_OUT_MASK 0x0001000000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT_OUT_SHFT 49
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT_OUT_MASK 0x0002000000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT_OUT_SHFT 50
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT_OUT_MASK 0x0004000000000000
-
-/* SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT_OUT_SHFT 51
-#define SH_XNIILB_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT_OUT_MASK 0x0008000000000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC0_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC0_CREDIT_OUT_SHFT 52
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC0_CREDIT_OUT_MASK 0x0010000000000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC2_CREDIT_OUT */
-/* Description: PI VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC2_CREDIT_OUT_SHFT 53
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_PI_VC2_CREDIT_OUT_MASK 0x0020000000000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC0_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC0_CREDIT_OUT_SHFT 54
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC0_CREDIT_OUT_MASK 0x0040000000000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC2_CREDIT_OUT */
-/* Description: MD VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC2_CREDIT_OUT_SHFT 55
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_MD_VC2_CREDIT_OUT_MASK 0x0080000000000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT_OUT_SHFT 56
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT_OUT_MASK 0x0100000000000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT_OUT */
-/* Description: IILB VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT_OUT_SHFT 57
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT_OUT_MASK 0x0200000000000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT_OUT_SHFT 58
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT_OUT_MASK 0x0400000000000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT_OUT */
-/* Description: NI0 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT_OUT_SHFT 59
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT_OUT_MASK 0x0800000000000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT_OUT_SHFT 60
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT_OUT_MASK 0x1000000000000000
-
-/* SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT_OUT */
-/* Description: NI1 VC0 Credit overflow Pipe Out */
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT_OUT_SHFT 61
-#define SH_XNIILB_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT_OUT_MASK 0x2000000000000000
-
-/* SH_XNIILB_FIRST_ERROR_CHIPLET_NOMATCH */
-/* Description: chiplet nomatch */
-#define SH_XNIILB_FIRST_ERROR_CHIPLET_NOMATCH_SHFT 62
-#define SH_XNIILB_FIRST_ERROR_CHIPLET_NOMATCH_MASK 0x4000000000000000
-
-/* SH_XNIILB_FIRST_ERROR_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNIILB_FIRST_ERROR_LUT_READ_ERROR_SHFT 63
-#define SH_XNIILB_FIRST_ERROR_LUT_READ_ERROR_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ERROR_SUMMARY" */
-/* ==================================================================== */
-
-#define SH_XNPI_ERROR_SUMMARY 0x0000000150040300
-#define SH_XNPI_ERROR_SUMMARY_MASK 0x0003ffffffffffff
-#define SH_XNPI_ERROR_SUMMARY_INIT 0x0003ffffffffffff
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_SHFT 0
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_MASK 0x0000000000000001
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC0_SHFT 1
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC0_MASK 0x0000000000000002
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_SHFT 2
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_MASK 0x0000000000000004
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC2_SHFT 3
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC2_MASK 0x0000000000000008
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_SHFT 4
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_MASK 0x0000000000000010
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC0_SHFT 5
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC0_MASK 0x0000000000000020
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_SHFT 6
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_MASK 0x0000000000000040
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC2_SHFT 7
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC2_MASK 0x0000000000000080
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_SHFT 8
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_MASK 0x0000000000000100
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC0_SHFT 9
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC0_MASK 0x0000000000000200
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_SHFT 10
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_MASK 0x0000000000000400
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC2_SHFT 11
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC2_MASK 0x0000000000000800
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_VC0_CREDIT_SHFT 12
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_VC0_CREDIT_SHFT 13
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_VC0_CREDIT_MASK 0x0000000000002000
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_VC2_CREDIT_SHFT 14
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_VC2_CREDIT_MASK 0x0000000000004000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_VC2_CREDIT_SHFT 15
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC0 */
-/* Description: VC0 Data Buffer overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC0_SHFT 16
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC0_MASK 0x0000000000010000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC2 */
-/* Description: VC2 Data Buffer overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC2_SHFT 17
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC2_MASK 0x0000000000020000
-
-/* SH_XNPI_ERROR_SUMMARY_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNPI_ERROR_SUMMARY_LUT_READ_ERROR_SHFT 18
-#define SH_XNPI_ERROR_SUMMARY_LUT_READ_ERROR_MASK 0x0000000000040000
-
-/* SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR0 */
-/* Description: Single Bit Error in Bits 63:0 */
-#define SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR0_SHFT 19
-#define SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR0_MASK 0x0000000000080000
-
-/* SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR1 */
-/* Description: Single Bit Error in Bits 127:64 */
-#define SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR1_SHFT 20
-#define SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR1_MASK 0x0000000000100000
-
-/* SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR2 */
-/* Description: Single Bit Error in Bits 191:128 */
-#define SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR2_SHFT 21
-#define SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR2_MASK 0x0000000000200000
-
-/* SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR3 */
-/* Description: Single Bit Error in Bits 255:192 */
-#define SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR3_SHFT 22
-#define SH_XNPI_ERROR_SUMMARY_SINGLE_BIT_ERROR3_MASK 0x0000000000400000
-
-/* SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR0 */
-/* Description: Uncorrectable Error in Bits 63:0 */
-#define SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR0_SHFT 23
-#define SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR0_MASK 0x0000000000800000
-
-/* SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR1 */
-/* Description: Uncorrectable Error in Bits 127:64 */
-#define SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR1_SHFT 24
-#define SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR1_MASK 0x0000000001000000
-
-/* SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR2 */
-/* Description: Uncorrectable Error in Bits 191:128 */
-#define SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR2_SHFT 25
-#define SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR2_MASK 0x0000000002000000
-
-/* SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR3 */
-/* Description: Uncorrectable Error in Bits 255:192 */
-#define SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR3_SHFT 26
-#define SH_XNPI_ERROR_SUMMARY_UNCOR_ERROR3_MASK 0x0000000004000000
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR0_SHFT 27
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR0_MASK 0x0000000008000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_SIC_CNTR0_SHFT 28
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_SIC_CNTR0_MASK 0x0000000010000000
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR2_SHFT 29
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR2_MASK 0x0000000020000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_SIC_CNTR2_SHFT 30
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_SIC_CNTR2_MASK 0x0000000040000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Debit 0 Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT0_SHFT 31
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT0_MASK 0x0000000080000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Debit 2 Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT2_SHFT 32
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT2_MASK 0x0000000100000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Debit 0 Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT0_SHFT 33
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT0_MASK 0x0000000200000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Debit 2 Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT2_SHFT 34
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT2_MASK 0x0000000400000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Debit 0 Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT0_SHFT 35
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT0_MASK 0x0000000800000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Debit 2 Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT2_SHFT 36
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT2_MASK 0x0000001000000000
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT_SHFT 37
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT_MASK 0x0000002000000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT_SHFT 38
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT_MASK 0x0000004000000000
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT_SHFT 39
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT_MASK 0x0000008000000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT_SHFT 40
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT_MASK 0x0000010000000000
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT_SHFT 41
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT_MASK 0x0000020000000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT_SHFT 42
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT_MASK 0x0000040000000000
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT_SHFT 43
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT_MASK 0x0000080000000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT_SHFT 44
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT_MASK 0x0000100000000000
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT_SHFT 45
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT_MASK 0x0000200000000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT_SHFT 46
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Underflow */
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT_SHFT 47
-#define SH_XNPI_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT_SHFT 48
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT_MASK 0x0001000000000000
-
-/* SH_XNPI_ERROR_SUMMARY_OVERFLOW_HEADER_CANCEL_FIFO */
-/* Description: Header Cancel Fifo Overflow */
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_HEADER_CANCEL_FIFO_SHFT 49
-#define SH_XNPI_ERROR_SUMMARY_OVERFLOW_HEADER_CANCEL_FIFO_MASK 0x0002000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ERRORS_ALIAS" */
-/* ==================================================================== */
-
-#define SH_XNPI_ERRORS_ALIAS 0x0000000150040308
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ERROR_OVERFLOW" */
-/* ==================================================================== */
-
-#define SH_XNPI_ERROR_OVERFLOW 0x0000000150040320
-#define SH_XNPI_ERROR_OVERFLOW_MASK 0x0003ffffffffffff
-#define SH_XNPI_ERROR_OVERFLOW_INIT 0x0003ffffffffffff
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_SHFT 0
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_MASK 0x0000000000000001
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_SHFT 1
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_MASK 0x0000000000000002
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_SHFT 2
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_MASK 0x0000000000000004
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_SHFT 3
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_MASK 0x0000000000000008
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_SHFT 4
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_MASK 0x0000000000000010
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_SHFT 5
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_MASK 0x0000000000000020
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_SHFT 6
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_MASK 0x0000000000000040
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_SHFT 7
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_MASK 0x0000000000000080
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_SHFT 8
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_MASK 0x0000000000000100
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_SHFT 9
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_MASK 0x0000000000000200
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_SHFT 10
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_MASK 0x0000000000000400
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_SHFT 11
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_MASK 0x0000000000000800
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_VC0_CREDIT_SHFT 12
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_VC0_CREDIT_SHFT 13
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_VC0_CREDIT_MASK 0x0000000000002000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_VC2_CREDIT_SHFT 14
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_VC2_CREDIT_MASK 0x0000000000004000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_VC2_CREDIT_SHFT 15
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC0 */
-/* Description: VC0 Data Buffer overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC0_SHFT 16
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC0_MASK 0x0000000000010000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC2 */
-/* Description: VC2 Data Buffer overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC2_SHFT 17
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC2_MASK 0x0000000000020000
-
-/* SH_XNPI_ERROR_OVERFLOW_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNPI_ERROR_OVERFLOW_LUT_READ_ERROR_SHFT 18
-#define SH_XNPI_ERROR_OVERFLOW_LUT_READ_ERROR_MASK 0x0000000000040000
-
-/* SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR0 */
-/* Description: Single Bit Error in Bits 63:0 */
-#define SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR0_SHFT 19
-#define SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR0_MASK 0x0000000000080000
-
-/* SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR1 */
-/* Description: Single Bit Error in Bits 127:64 */
-#define SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR1_SHFT 20
-#define SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR1_MASK 0x0000000000100000
-
-/* SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR2 */
-/* Description: Single Bit Error in Bits 191:128 */
-#define SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR2_SHFT 21
-#define SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR2_MASK 0x0000000000200000
-
-/* SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR3 */
-/* Description: Single Bit Error in Bits 255:192 */
-#define SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR3_SHFT 22
-#define SH_XNPI_ERROR_OVERFLOW_SINGLE_BIT_ERROR3_MASK 0x0000000000400000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR0 */
-/* Description: Uncorrectable Error in Bits 63:0 */
-#define SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR0_SHFT 23
-#define SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR0_MASK 0x0000000000800000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR1 */
-/* Description: Uncorrectable Error in Bits 127:64 */
-#define SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR1_SHFT 24
-#define SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR1_MASK 0x0000000001000000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR2 */
-/* Description: Uncorrectable Error in Bits 191:128 */
-#define SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR2_SHFT 25
-#define SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR2_MASK 0x0000000002000000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR3 */
-/* Description: Uncorrectable Error in Bits 255:192 */
-#define SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR3_SHFT 26
-#define SH_XNPI_ERROR_OVERFLOW_UNCOR_ERROR3_MASK 0x0000000004000000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR0_SHFT 27
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR0_MASK 0x0000000008000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR0_SHFT 28
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR0_MASK 0x0000000010000000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR2_SHFT 29
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR2_MASK 0x0000000020000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR2_SHFT 30
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR2_MASK 0x0000000040000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Debit 0 Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT0_SHFT 31
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT0_MASK 0x0000000080000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Debit 2 Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT2_SHFT 32
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT2_MASK 0x0000000100000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Debit 0 Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT0_SHFT 33
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT0_MASK 0x0000000200000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Debit 2 Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT2_SHFT 34
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT2_MASK 0x0000000400000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Debit 0 Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT0_SHFT 35
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT0_MASK 0x0000000800000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Debit 2 Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT2_SHFT 36
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT2_MASK 0x0000001000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT_SHFT 37
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT_MASK 0x0000002000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT_SHFT 38
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT_MASK 0x0000004000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT_SHFT 39
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT_MASK 0x0000008000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT_SHFT 40
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT_MASK 0x0000010000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT_SHFT 41
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT_MASK 0x0000020000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT_SHFT 42
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT_MASK 0x0000040000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT_SHFT 43
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT_MASK 0x0000080000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT_SHFT 44
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT_MASK 0x0000100000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT_SHFT 45
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT_MASK 0x0000200000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT_SHFT 46
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Underflow */
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT_SHFT 47
-#define SH_XNPI_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT_SHFT 48
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT_MASK 0x0001000000000000
-
-/* SH_XNPI_ERROR_OVERFLOW_OVERFLOW_HEADER_CANCEL_FIFO */
-/* Description: Header Cancel Fifo Overflow */
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_HEADER_CANCEL_FIFO_SHFT 49
-#define SH_XNPI_ERROR_OVERFLOW_OVERFLOW_HEADER_CANCEL_FIFO_MASK 0x0002000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ERROR_OVERFLOW_ALIAS" */
-/* ==================================================================== */
-
-#define SH_XNPI_ERROR_OVERFLOW_ALIAS 0x0000000150040328
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ERROR_MASK" */
-/* ==================================================================== */
-
-#define SH_XNPI_ERROR_MASK 0x0000000150040340
-#define SH_XNPI_ERROR_MASK_MASK 0x0003ffffffffffff
-#define SH_XNPI_ERROR_MASK_INIT 0x0003ffffffffffff
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC0_SHFT 0
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC0_MASK 0x0000000000000001
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC0_SHFT 1
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC0_MASK 0x0000000000000002
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC2_SHFT 2
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC2_MASK 0x0000000000000004
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC2_SHFT 3
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC2_MASK 0x0000000000000008
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC0_SHFT 4
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC0_MASK 0x0000000000000010
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC0_SHFT 5
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC0_MASK 0x0000000000000020
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC2_SHFT 6
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC2_MASK 0x0000000000000040
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC2_SHFT 7
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC2_MASK 0x0000000000000080
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC0_SHFT 8
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC0_MASK 0x0000000000000100
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC0_SHFT 9
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC0_MASK 0x0000000000000200
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC2_SHFT 10
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC2_MASK 0x0000000000000400
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC2_SHFT 11
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC2_MASK 0x0000000000000800
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_VC0_CREDIT_SHFT 12
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_VC0_CREDIT_SHFT 13
-#define SH_XNPI_ERROR_MASK_OVERFLOW_VC0_CREDIT_MASK 0x0000000000002000
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_VC2_CREDIT_SHFT 14
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_VC2_CREDIT_MASK 0x0000000000004000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_VC2_CREDIT_SHFT 15
-#define SH_XNPI_ERROR_MASK_OVERFLOW_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_DATABUFF_VC0 */
-/* Description: VC0 Data Buffer overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_DATABUFF_VC0_SHFT 16
-#define SH_XNPI_ERROR_MASK_OVERFLOW_DATABUFF_VC0_MASK 0x0000000000010000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_DATABUFF_VC2 */
-/* Description: VC2 Data Buffer overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_DATABUFF_VC2_SHFT 17
-#define SH_XNPI_ERROR_MASK_OVERFLOW_DATABUFF_VC2_MASK 0x0000000000020000
-
-/* SH_XNPI_ERROR_MASK_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNPI_ERROR_MASK_LUT_READ_ERROR_SHFT 18
-#define SH_XNPI_ERROR_MASK_LUT_READ_ERROR_MASK 0x0000000000040000
-
-/* SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR0 */
-/* Description: Single Bit Error in Bits 63:0 */
-#define SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR0_SHFT 19
-#define SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR0_MASK 0x0000000000080000
-
-/* SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR1 */
-/* Description: Single Bit Error in Bits 127:64 */
-#define SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR1_SHFT 20
-#define SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR1_MASK 0x0000000000100000
-
-/* SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR2 */
-/* Description: Single Bit Error in Bits 191:128 */
-#define SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR2_SHFT 21
-#define SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR2_MASK 0x0000000000200000
-
-/* SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR3 */
-/* Description: Single Bit Error in Bits 255:192 */
-#define SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR3_SHFT 22
-#define SH_XNPI_ERROR_MASK_SINGLE_BIT_ERROR3_MASK 0x0000000000400000
-
-/* SH_XNPI_ERROR_MASK_UNCOR_ERROR0 */
-/* Description: Uncorrectable Error in Bits 63:0 */
-#define SH_XNPI_ERROR_MASK_UNCOR_ERROR0_SHFT 23
-#define SH_XNPI_ERROR_MASK_UNCOR_ERROR0_MASK 0x0000000000800000
-
-/* SH_XNPI_ERROR_MASK_UNCOR_ERROR1 */
-/* Description: Uncorrectable Error in Bits 127:64 */
-#define SH_XNPI_ERROR_MASK_UNCOR_ERROR1_SHFT 24
-#define SH_XNPI_ERROR_MASK_UNCOR_ERROR1_MASK 0x0000000001000000
-
-/* SH_XNPI_ERROR_MASK_UNCOR_ERROR2 */
-/* Description: Uncorrectable Error in Bits 191:128 */
-#define SH_XNPI_ERROR_MASK_UNCOR_ERROR2_SHFT 25
-#define SH_XNPI_ERROR_MASK_UNCOR_ERROR2_MASK 0x0000000002000000
-
-/* SH_XNPI_ERROR_MASK_UNCOR_ERROR3 */
-/* Description: Uncorrectable Error in Bits 255:192 */
-#define SH_XNPI_ERROR_MASK_UNCOR_ERROR3_SHFT 26
-#define SH_XNPI_ERROR_MASK_UNCOR_ERROR3_MASK 0x0000000004000000
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_SIC_CNTR0_SHFT 27
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_SIC_CNTR0_MASK 0x0000000008000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_SIC_CNTR0_SHFT 28
-#define SH_XNPI_ERROR_MASK_OVERFLOW_SIC_CNTR0_MASK 0x0000000010000000
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_SIC_CNTR2_SHFT 29
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_SIC_CNTR2_MASK 0x0000000020000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_SIC_CNTR2_SHFT 30
-#define SH_XNPI_ERROR_MASK_OVERFLOW_SIC_CNTR2_MASK 0x0000000040000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Debit 0 Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_DEBIT0_SHFT 31
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_DEBIT0_MASK 0x0000000080000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Debit 2 Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_DEBIT2_SHFT 32
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_DEBIT2_MASK 0x0000000100000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Debit 0 Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_DEBIT0_SHFT 33
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_DEBIT0_MASK 0x0000000200000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Debit 2 Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_DEBIT2_SHFT 34
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_DEBIT2_MASK 0x0000000400000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Debit 0 Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_DEBIT0_SHFT 35
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_DEBIT0_MASK 0x0000000800000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Debit 2 Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_DEBIT2_SHFT 36
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_DEBIT2_MASK 0x0000001000000000
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT_SHFT 37
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT_MASK 0x0000002000000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT_SHFT 38
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT_MASK 0x0000004000000000
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT_SHFT 39
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT_MASK 0x0000008000000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT_SHFT 40
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT_MASK 0x0000010000000000
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT_SHFT 41
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT_MASK 0x0000020000000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT_SHFT 42
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT_MASK 0x0000040000000000
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT_SHFT 43
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT_MASK 0x0000080000000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT_SHFT 44
-#define SH_XNPI_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT_MASK 0x0000100000000000
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT_SHFT 45
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT_MASK 0x0000200000000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT_SHFT 46
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Underflow */
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT_SHFT 47
-#define SH_XNPI_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT_SHFT 48
-#define SH_XNPI_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT_MASK 0x0001000000000000
-
-/* SH_XNPI_ERROR_MASK_OVERFLOW_HEADER_CANCEL_FIFO */
-/* Description: Header Cancel Fifo Overflow */
-#define SH_XNPI_ERROR_MASK_OVERFLOW_HEADER_CANCEL_FIFO_SHFT 49
-#define SH_XNPI_ERROR_MASK_OVERFLOW_HEADER_CANCEL_FIFO_MASK 0x0002000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNPI_FIRST_ERROR" */
-/* ==================================================================== */
-
-#define SH_XNPI_FIRST_ERROR 0x0000000150040360
-#define SH_XNPI_FIRST_ERROR_MASK 0x0003ffffffffffff
-#define SH_XNPI_FIRST_ERROR_INIT 0x0003ffffffffffff
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC0_SHFT 0
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC0_MASK 0x0000000000000001
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC0_SHFT 1
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC0_MASK 0x0000000000000002
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC2_SHFT 2
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC2_MASK 0x0000000000000004
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC2_SHFT 3
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC2_MASK 0x0000000000000008
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC0_SHFT 4
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC0_MASK 0x0000000000000010
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC0_SHFT 5
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC0_MASK 0x0000000000000020
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC2_SHFT 6
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC2_MASK 0x0000000000000040
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC2_SHFT 7
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC2_MASK 0x0000000000000080
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC0_SHFT 8
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC0_MASK 0x0000000000000100
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC0_SHFT 9
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC0_MASK 0x0000000000000200
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC2_SHFT 10
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC2_MASK 0x0000000000000400
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC2_SHFT 11
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC2_MASK 0x0000000000000800
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_VC0_CREDIT_SHFT 12
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_VC0_CREDIT_SHFT 13
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_VC0_CREDIT_MASK 0x0000000000002000
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_VC2_CREDIT_SHFT 14
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_VC2_CREDIT_MASK 0x0000000000004000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_VC2_CREDIT_SHFT 15
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_DATABUFF_VC0 */
-/* Description: VC0 Data Buffer overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_DATABUFF_VC0_SHFT 16
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_DATABUFF_VC0_MASK 0x0000000000010000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_DATABUFF_VC2 */
-/* Description: VC2 Data Buffer overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_DATABUFF_VC2_SHFT 17
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_DATABUFF_VC2_MASK 0x0000000000020000
-
-/* SH_XNPI_FIRST_ERROR_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNPI_FIRST_ERROR_LUT_READ_ERROR_SHFT 18
-#define SH_XNPI_FIRST_ERROR_LUT_READ_ERROR_MASK 0x0000000000040000
-
-/* SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR0 */
-/* Description: Single Bit Error in Bits 63:0 */
-#define SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR0_SHFT 19
-#define SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR0_MASK 0x0000000000080000
-
-/* SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR1 */
-/* Description: Single Bit Error in Bits 127:64 */
-#define SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR1_SHFT 20
-#define SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR1_MASK 0x0000000000100000
-
-/* SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR2 */
-/* Description: Single Bit Error in Bits 191:128 */
-#define SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR2_SHFT 21
-#define SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR2_MASK 0x0000000000200000
-
-/* SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR3 */
-/* Description: Single Bit Error in Bits 255:192 */
-#define SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR3_SHFT 22
-#define SH_XNPI_FIRST_ERROR_SINGLE_BIT_ERROR3_MASK 0x0000000000400000
-
-/* SH_XNPI_FIRST_ERROR_UNCOR_ERROR0 */
-/* Description: Uncorrectable Error in Bits 63:0 */
-#define SH_XNPI_FIRST_ERROR_UNCOR_ERROR0_SHFT 23
-#define SH_XNPI_FIRST_ERROR_UNCOR_ERROR0_MASK 0x0000000000800000
-
-/* SH_XNPI_FIRST_ERROR_UNCOR_ERROR1 */
-/* Description: Uncorrectable Error in Bits 127:64 */
-#define SH_XNPI_FIRST_ERROR_UNCOR_ERROR1_SHFT 24
-#define SH_XNPI_FIRST_ERROR_UNCOR_ERROR1_MASK 0x0000000001000000
-
-/* SH_XNPI_FIRST_ERROR_UNCOR_ERROR2 */
-/* Description: Uncorrectable Error in Bits 191:128 */
-#define SH_XNPI_FIRST_ERROR_UNCOR_ERROR2_SHFT 25
-#define SH_XNPI_FIRST_ERROR_UNCOR_ERROR2_MASK 0x0000000002000000
-
-/* SH_XNPI_FIRST_ERROR_UNCOR_ERROR3 */
-/* Description: Uncorrectable Error in Bits 255:192 */
-#define SH_XNPI_FIRST_ERROR_UNCOR_ERROR3_SHFT 26
-#define SH_XNPI_FIRST_ERROR_UNCOR_ERROR3_MASK 0x0000000004000000
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_SIC_CNTR0_SHFT 27
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_SIC_CNTR0_MASK 0x0000000008000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_SIC_CNTR0_SHFT 28
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_SIC_CNTR0_MASK 0x0000000010000000
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_SIC_CNTR2_SHFT 29
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_SIC_CNTR2_MASK 0x0000000020000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_SIC_CNTR2_SHFT 30
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_SIC_CNTR2_MASK 0x0000000040000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Debit 0 Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_DEBIT0_SHFT 31
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_DEBIT0_MASK 0x0000000080000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Debit 2 Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_DEBIT2_SHFT 32
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_DEBIT2_MASK 0x0000000100000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Debit 0 Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_DEBIT0_SHFT 33
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_DEBIT0_MASK 0x0000000200000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Debit 2 Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_DEBIT2_SHFT 34
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_DEBIT2_MASK 0x0000000400000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Debit 0 Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_DEBIT0_SHFT 35
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_DEBIT0_MASK 0x0000000800000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Debit 2 Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_DEBIT2_SHFT 36
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_DEBIT2_MASK 0x0000001000000000
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT_SHFT 37
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT_MASK 0x0000002000000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT_SHFT 38
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT_MASK 0x0000004000000000
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT_SHFT 39
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT_MASK 0x0000008000000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT_SHFT 40
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT_MASK 0x0000010000000000
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT_SHFT 41
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT_MASK 0x0000020000000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT_SHFT 42
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT_MASK 0x0000040000000000
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT_SHFT 43
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT_MASK 0x0000080000000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT_SHFT 44
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT_MASK 0x0000100000000000
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT_SHFT 45
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT_MASK 0x0000200000000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT_SHFT 46
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Underflow */
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT_SHFT 47
-#define SH_XNPI_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT_SHFT 48
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT_MASK 0x0001000000000000
-
-/* SH_XNPI_FIRST_ERROR_OVERFLOW_HEADER_CANCEL_FIFO */
-/* Description: Header Cancel Fifo Overflow */
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_HEADER_CANCEL_FIFO_SHFT 49
-#define SH_XNPI_FIRST_ERROR_OVERFLOW_HEADER_CANCEL_FIFO_MASK 0x0002000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ERROR_SUMMARY" */
-/* ==================================================================== */
-
-#define SH_XNMD_ERROR_SUMMARY 0x0000000150040400
-#define SH_XNMD_ERROR_SUMMARY_MASK 0x0003ffffffffffff
-#define SH_XNMD_ERROR_SUMMARY_INIT 0x0003ffffffffffff
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_SHFT 0
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_MASK 0x0000000000000001
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC0_SHFT 1
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC0_MASK 0x0000000000000002
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_SHFT 2
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_MASK 0x0000000000000004
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC2_SHFT 3
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC2_MASK 0x0000000000000008
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_SHFT 4
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_MASK 0x0000000000000010
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC0_SHFT 5
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC0_MASK 0x0000000000000020
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_SHFT 6
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_MASK 0x0000000000000040
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC2_SHFT 7
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC2_MASK 0x0000000000000080
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_SHFT 8
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_MASK 0x0000000000000100
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC0_SHFT 9
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC0_MASK 0x0000000000000200
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_SHFT 10
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_MASK 0x0000000000000400
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC2_SHFT 11
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC2_MASK 0x0000000000000800
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_VC0_CREDIT_SHFT 12
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_VC0_CREDIT_SHFT 13
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_VC0_CREDIT_MASK 0x0000000000002000
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_VC2_CREDIT_SHFT 14
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_VC2_CREDIT_MASK 0x0000000000004000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_VC2_CREDIT_SHFT 15
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC0 */
-/* Description: VC0 Data Buffer overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC0_SHFT 16
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC0_MASK 0x0000000000010000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC2 */
-/* Description: VC2 Data Buffer overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC2_SHFT 17
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_DATABUFF_VC2_MASK 0x0000000000020000
-
-/* SH_XNMD_ERROR_SUMMARY_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNMD_ERROR_SUMMARY_LUT_READ_ERROR_SHFT 18
-#define SH_XNMD_ERROR_SUMMARY_LUT_READ_ERROR_MASK 0x0000000000040000
-
-/* SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR0 */
-/* Description: Single Bit Error in Bits 63:0 */
-#define SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR0_SHFT 19
-#define SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR0_MASK 0x0000000000080000
-
-/* SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR1 */
-/* Description: Single Bit Error in Bits 127:64 */
-#define SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR1_SHFT 20
-#define SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR1_MASK 0x0000000000100000
-
-/* SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR2 */
-/* Description: Single Bit Error in Bits 191:128 */
-#define SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR2_SHFT 21
-#define SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR2_MASK 0x0000000000200000
-
-/* SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR3 */
-/* Description: Single Bit Error in Bits 255:192 */
-#define SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR3_SHFT 22
-#define SH_XNMD_ERROR_SUMMARY_SINGLE_BIT_ERROR3_MASK 0x0000000000400000
-
-/* SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR0 */
-/* Description: Uncorrectable Error in Bits 63:0 */
-#define SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR0_SHFT 23
-#define SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR0_MASK 0x0000000000800000
-
-/* SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR1 */
-/* Description: Uncorrectable Error in Bits 127:64 */
-#define SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR1_SHFT 24
-#define SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR1_MASK 0x0000000001000000
-
-/* SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR2 */
-/* Description: Uncorrectable Error in Bits 191:128 */
-#define SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR2_SHFT 25
-#define SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR2_MASK 0x0000000002000000
-
-/* SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR3 */
-/* Description: Uncorrectable Error in Bits 255:192 */
-#define SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR3_SHFT 26
-#define SH_XNMD_ERROR_SUMMARY_UNCOR_ERROR3_MASK 0x0000000004000000
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR0_SHFT 27
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR0_MASK 0x0000000008000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_SIC_CNTR0_SHFT 28
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_SIC_CNTR0_MASK 0x0000000010000000
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR2_SHFT 29
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_SIC_CNTR2_MASK 0x0000000020000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_SIC_CNTR2_SHFT 30
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_SIC_CNTR2_MASK 0x0000000040000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Debit 0 Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT0_SHFT 31
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT0_MASK 0x0000000080000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Debit 2 Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT2_SHFT 32
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_DEBIT2_MASK 0x0000000100000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Debit 0 Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT0_SHFT 33
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT0_MASK 0x0000000200000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Debit 2 Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT2_SHFT 34
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_DEBIT2_MASK 0x0000000400000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Debit 0 Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT0_SHFT 35
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT0_MASK 0x0000000800000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Debit 2 Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT2_SHFT 36
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_DEBIT2_MASK 0x0000001000000000
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT_SHFT 37
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC0_CREDIT_MASK 0x0000002000000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT_SHFT 38
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC0_CREDIT_MASK 0x0000004000000000
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT_SHFT 39
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI0_VC2_CREDIT_MASK 0x0000008000000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT_SHFT 40
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI0_VC2_CREDIT_MASK 0x0000010000000000
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT_SHFT 41
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC0_CREDIT_MASK 0x0000020000000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT_SHFT 42
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC0_CREDIT_MASK 0x0000040000000000
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT_SHFT 43
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_NI1_VC2_CREDIT_MASK 0x0000080000000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT_SHFT 44
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_NI1_VC2_CREDIT_MASK 0x0000100000000000
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT_SHFT 45
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC0_CREDIT_MASK 0x0000200000000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT_SHFT 46
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Underflow */
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT_SHFT 47
-#define SH_XNMD_ERROR_SUMMARY_UNDERFLOW_IILB_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT_SHFT 48
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_IILB_VC2_CREDIT_MASK 0x0001000000000000
-
-/* SH_XNMD_ERROR_SUMMARY_OVERFLOW_HEADER_CANCEL_FIFO */
-/* Description: Header Cancel Fifo Overflow */
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_HEADER_CANCEL_FIFO_SHFT 49
-#define SH_XNMD_ERROR_SUMMARY_OVERFLOW_HEADER_CANCEL_FIFO_MASK 0x0002000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ERRORS_ALIAS" */
-/* ==================================================================== */
-
-#define SH_XNMD_ERRORS_ALIAS 0x0000000150040408
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ERROR_OVERFLOW" */
-/* ==================================================================== */
-
-#define SH_XNMD_ERROR_OVERFLOW 0x0000000150040420
-#define SH_XNMD_ERROR_OVERFLOW_MASK 0x0003ffffffffffff
-#define SH_XNMD_ERROR_OVERFLOW_INIT 0x0003ffffffffffff
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_SHFT 0
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_MASK 0x0000000000000001
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_SHFT 1
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_MASK 0x0000000000000002
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_SHFT 2
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_MASK 0x0000000000000004
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_SHFT 3
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_MASK 0x0000000000000008
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_SHFT 4
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_MASK 0x0000000000000010
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_SHFT 5
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_MASK 0x0000000000000020
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_SHFT 6
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_MASK 0x0000000000000040
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_SHFT 7
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_MASK 0x0000000000000080
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_SHFT 8
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_MASK 0x0000000000000100
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_SHFT 9
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_MASK 0x0000000000000200
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_SHFT 10
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_MASK 0x0000000000000400
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_SHFT 11
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_MASK 0x0000000000000800
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_VC0_CREDIT_SHFT 12
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_VC0_CREDIT_SHFT 13
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_VC0_CREDIT_MASK 0x0000000000002000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_VC2_CREDIT_SHFT 14
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_VC2_CREDIT_MASK 0x0000000000004000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_VC2_CREDIT_SHFT 15
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC0 */
-/* Description: VC0 Data Buffer overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC0_SHFT 16
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC0_MASK 0x0000000000010000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC2 */
-/* Description: VC2 Data Buffer overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC2_SHFT 17
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_DATABUFF_VC2_MASK 0x0000000000020000
-
-/* SH_XNMD_ERROR_OVERFLOW_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNMD_ERROR_OVERFLOW_LUT_READ_ERROR_SHFT 18
-#define SH_XNMD_ERROR_OVERFLOW_LUT_READ_ERROR_MASK 0x0000000000040000
-
-/* SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR0 */
-/* Description: Single Bit Error in Bits 63:0 */
-#define SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR0_SHFT 19
-#define SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR0_MASK 0x0000000000080000
-
-/* SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR1 */
-/* Description: Single Bit Error in Bits 127:64 */
-#define SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR1_SHFT 20
-#define SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR1_MASK 0x0000000000100000
-
-/* SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR2 */
-/* Description: Single Bit Error in Bits 191:128 */
-#define SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR2_SHFT 21
-#define SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR2_MASK 0x0000000000200000
-
-/* SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR3 */
-/* Description: Single Bit Error in Bits 255:192 */
-#define SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR3_SHFT 22
-#define SH_XNMD_ERROR_OVERFLOW_SINGLE_BIT_ERROR3_MASK 0x0000000000400000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR0 */
-/* Description: Uncorrectable Error in Bits 63:0 */
-#define SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR0_SHFT 23
-#define SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR0_MASK 0x0000000000800000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR1 */
-/* Description: Uncorrectable Error in Bits 127:64 */
-#define SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR1_SHFT 24
-#define SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR1_MASK 0x0000000001000000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR2 */
-/* Description: Uncorrectable Error in Bits 191:128 */
-#define SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR2_SHFT 25
-#define SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR2_MASK 0x0000000002000000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR3 */
-/* Description: Uncorrectable Error in Bits 255:192 */
-#define SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR3_SHFT 26
-#define SH_XNMD_ERROR_OVERFLOW_UNCOR_ERROR3_MASK 0x0000000004000000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR0_SHFT 27
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR0_MASK 0x0000000008000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR0_SHFT 28
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR0_MASK 0x0000000010000000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR2_SHFT 29
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_SIC_CNTR2_MASK 0x0000000020000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR2_SHFT 30
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_SIC_CNTR2_MASK 0x0000000040000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Debit 0 Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT0_SHFT 31
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT0_MASK 0x0000000080000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Debit 2 Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT2_SHFT 32
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_DEBIT2_MASK 0x0000000100000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Debit 0 Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT0_SHFT 33
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT0_MASK 0x0000000200000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Debit 2 Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT2_SHFT 34
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_DEBIT2_MASK 0x0000000400000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Debit 0 Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT0_SHFT 35
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT0_MASK 0x0000000800000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Debit 2 Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT2_SHFT 36
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_DEBIT2_MASK 0x0000001000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT_SHFT 37
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC0_CREDIT_MASK 0x0000002000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT_SHFT 38
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC0_CREDIT_MASK 0x0000004000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT_SHFT 39
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI0_VC2_CREDIT_MASK 0x0000008000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT_SHFT 40
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI0_VC2_CREDIT_MASK 0x0000010000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT_SHFT 41
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC0_CREDIT_MASK 0x0000020000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT_SHFT 42
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC0_CREDIT_MASK 0x0000040000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT_SHFT 43
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_NI1_VC2_CREDIT_MASK 0x0000080000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT_SHFT 44
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_NI1_VC2_CREDIT_MASK 0x0000100000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT_SHFT 45
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC0_CREDIT_MASK 0x0000200000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT_SHFT 46
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Underflow */
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT_SHFT 47
-#define SH_XNMD_ERROR_OVERFLOW_UNDERFLOW_IILB_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT_SHFT 48
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_IILB_VC2_CREDIT_MASK 0x0001000000000000
-
-/* SH_XNMD_ERROR_OVERFLOW_OVERFLOW_HEADER_CANCEL_FIFO */
-/* Description: Header Cancel Fifo Overflow */
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_HEADER_CANCEL_FIFO_SHFT 49
-#define SH_XNMD_ERROR_OVERFLOW_OVERFLOW_HEADER_CANCEL_FIFO_MASK 0x0002000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ERROR_OVERFLOW_ALIAS" */
-/* ==================================================================== */
-
-#define SH_XNMD_ERROR_OVERFLOW_ALIAS 0x0000000150040428
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ERROR_MASK" */
-/* ==================================================================== */
-
-#define SH_XNMD_ERROR_MASK 0x0000000150040440
-#define SH_XNMD_ERROR_MASK_MASK 0x0003ffffffffffff
-#define SH_XNMD_ERROR_MASK_INIT 0x0003ffffffffffff
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC0_SHFT 0
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC0_MASK 0x0000000000000001
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC0_SHFT 1
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC0_MASK 0x0000000000000002
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC2_SHFT 2
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC2_MASK 0x0000000000000004
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC2_SHFT 3
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC2_MASK 0x0000000000000008
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC0_SHFT 4
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC0_MASK 0x0000000000000010
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC0_SHFT 5
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC0_MASK 0x0000000000000020
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC2_SHFT 6
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC2_MASK 0x0000000000000040
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC2_SHFT 7
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC2_MASK 0x0000000000000080
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC0_SHFT 8
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC0_MASK 0x0000000000000100
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC0_SHFT 9
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC0_MASK 0x0000000000000200
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC2_SHFT 10
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC2_MASK 0x0000000000000400
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC2_SHFT 11
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC2_MASK 0x0000000000000800
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_VC0_CREDIT_SHFT 12
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_VC0_CREDIT_SHFT 13
-#define SH_XNMD_ERROR_MASK_OVERFLOW_VC0_CREDIT_MASK 0x0000000000002000
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_VC2_CREDIT_SHFT 14
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_VC2_CREDIT_MASK 0x0000000000004000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_VC2_CREDIT_SHFT 15
-#define SH_XNMD_ERROR_MASK_OVERFLOW_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_DATABUFF_VC0 */
-/* Description: VC0 Data Buffer overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_DATABUFF_VC0_SHFT 16
-#define SH_XNMD_ERROR_MASK_OVERFLOW_DATABUFF_VC0_MASK 0x0000000000010000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_DATABUFF_VC2 */
-/* Description: VC2 Data Buffer overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_DATABUFF_VC2_SHFT 17
-#define SH_XNMD_ERROR_MASK_OVERFLOW_DATABUFF_VC2_MASK 0x0000000000020000
-
-/* SH_XNMD_ERROR_MASK_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNMD_ERROR_MASK_LUT_READ_ERROR_SHFT 18
-#define SH_XNMD_ERROR_MASK_LUT_READ_ERROR_MASK 0x0000000000040000
-
-/* SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR0 */
-/* Description: Single Bit Error in Bits 63:0 */
-#define SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR0_SHFT 19
-#define SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR0_MASK 0x0000000000080000
-
-/* SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR1 */
-/* Description: Single Bit Error in Bits 127:64 */
-#define SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR1_SHFT 20
-#define SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR1_MASK 0x0000000000100000
-
-/* SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR2 */
-/* Description: Single Bit Error in Bits 191:128 */
-#define SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR2_SHFT 21
-#define SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR2_MASK 0x0000000000200000
-
-/* SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR3 */
-/* Description: Single Bit Error in Bits 255:192 */
-#define SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR3_SHFT 22
-#define SH_XNMD_ERROR_MASK_SINGLE_BIT_ERROR3_MASK 0x0000000000400000
-
-/* SH_XNMD_ERROR_MASK_UNCOR_ERROR0 */
-/* Description: Uncorrectable Error in Bits 63:0 */
-#define SH_XNMD_ERROR_MASK_UNCOR_ERROR0_SHFT 23
-#define SH_XNMD_ERROR_MASK_UNCOR_ERROR0_MASK 0x0000000000800000
-
-/* SH_XNMD_ERROR_MASK_UNCOR_ERROR1 */
-/* Description: Uncorrectable Error in Bits 127:64 */
-#define SH_XNMD_ERROR_MASK_UNCOR_ERROR1_SHFT 24
-#define SH_XNMD_ERROR_MASK_UNCOR_ERROR1_MASK 0x0000000001000000
-
-/* SH_XNMD_ERROR_MASK_UNCOR_ERROR2 */
-/* Description: Uncorrectable Error in Bits 191:128 */
-#define SH_XNMD_ERROR_MASK_UNCOR_ERROR2_SHFT 25
-#define SH_XNMD_ERROR_MASK_UNCOR_ERROR2_MASK 0x0000000002000000
-
-/* SH_XNMD_ERROR_MASK_UNCOR_ERROR3 */
-/* Description: Uncorrectable Error in Bits 255:192 */
-#define SH_XNMD_ERROR_MASK_UNCOR_ERROR3_SHFT 26
-#define SH_XNMD_ERROR_MASK_UNCOR_ERROR3_MASK 0x0000000004000000
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_SIC_CNTR0_SHFT 27
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_SIC_CNTR0_MASK 0x0000000008000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_SIC_CNTR0_SHFT 28
-#define SH_XNMD_ERROR_MASK_OVERFLOW_SIC_CNTR0_MASK 0x0000000010000000
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_SIC_CNTR2_SHFT 29
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_SIC_CNTR2_MASK 0x0000000020000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_SIC_CNTR2_SHFT 30
-#define SH_XNMD_ERROR_MASK_OVERFLOW_SIC_CNTR2_MASK 0x0000000040000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Debit 0 Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_DEBIT0_SHFT 31
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_DEBIT0_MASK 0x0000000080000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Debit 2 Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_DEBIT2_SHFT 32
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_DEBIT2_MASK 0x0000000100000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Debit 0 Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_DEBIT0_SHFT 33
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_DEBIT0_MASK 0x0000000200000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Debit 2 Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_DEBIT2_SHFT 34
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_DEBIT2_MASK 0x0000000400000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Debit 0 Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_DEBIT0_SHFT 35
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_DEBIT0_MASK 0x0000000800000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Debit 2 Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_DEBIT2_SHFT 36
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_DEBIT2_MASK 0x0000001000000000
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT_SHFT 37
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC0_CREDIT_MASK 0x0000002000000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT_SHFT 38
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC0_CREDIT_MASK 0x0000004000000000
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT_SHFT 39
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI0_VC2_CREDIT_MASK 0x0000008000000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT_SHFT 40
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI0_VC2_CREDIT_MASK 0x0000010000000000
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT_SHFT 41
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC0_CREDIT_MASK 0x0000020000000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT_SHFT 42
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC0_CREDIT_MASK 0x0000040000000000
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT_SHFT 43
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_NI1_VC2_CREDIT_MASK 0x0000080000000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT_SHFT 44
-#define SH_XNMD_ERROR_MASK_OVERFLOW_NI1_VC2_CREDIT_MASK 0x0000100000000000
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT_SHFT 45
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC0_CREDIT_MASK 0x0000200000000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT_SHFT 46
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Underflow */
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT_SHFT 47
-#define SH_XNMD_ERROR_MASK_UNDERFLOW_IILB_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT_SHFT 48
-#define SH_XNMD_ERROR_MASK_OVERFLOW_IILB_VC2_CREDIT_MASK 0x0001000000000000
-
-/* SH_XNMD_ERROR_MASK_OVERFLOW_HEADER_CANCEL_FIFO */
-/* Description: Header Cancel Fifo Overflow */
-#define SH_XNMD_ERROR_MASK_OVERFLOW_HEADER_CANCEL_FIFO_SHFT 49
-#define SH_XNMD_ERROR_MASK_OVERFLOW_HEADER_CANCEL_FIFO_MASK 0x0002000000000000
-
-/* ==================================================================== */
-/* Register "SH_XNMD_FIRST_ERROR" */
-/* ==================================================================== */
-
-#define SH_XNMD_FIRST_ERROR 0x0000000150040460
-#define SH_XNMD_FIRST_ERROR_MASK 0x0003ffffffffffff
-#define SH_XNMD_FIRST_ERROR_INIT 0x0003ffffffffffff
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC0_SHFT 0
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC0_MASK 0x0000000000000001
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC0 */
-/* Description: NI0 VC0 fifo overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC0_SHFT 1
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC0_MASK 0x0000000000000002
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC2_SHFT 2
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC2_MASK 0x0000000000000004
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC2 */
-/* Description: NI0 VC2 fifo overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC2_SHFT 3
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC2_MASK 0x0000000000000008
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC0_SHFT 4
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC0_MASK 0x0000000000000010
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC0 */
-/* Description: NI1 VC0 fifo overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC0_SHFT 5
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC0_MASK 0x0000000000000020
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC2_SHFT 6
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC2_MASK 0x0000000000000040
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC2 */
-/* Description: NI1 VC2 fifo overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC2_SHFT 7
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC2_MASK 0x0000000000000080
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC0_SHFT 8
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC0_MASK 0x0000000000000100
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC0 */
-/* Description: IILB VC0 fifo overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC0_SHFT 9
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC0_MASK 0x0000000000000200
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC2_SHFT 10
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC2_MASK 0x0000000000000400
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC2 */
-/* Description: IILB VC2 fifo overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC2_SHFT 11
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC2_MASK 0x0000000000000800
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_VC0_CREDIT_SHFT 12
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_VC0_CREDIT_MASK 0x0000000000001000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_VC0_CREDIT */
-/* Description: VC0 Credit overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_VC0_CREDIT_SHFT 13
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_VC0_CREDIT_MASK 0x0000000000002000
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_VC2_CREDIT_SHFT 14
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_VC2_CREDIT_MASK 0x0000000000004000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_VC2_CREDIT */
-/* Description: VC2 Credit overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_VC2_CREDIT_SHFT 15
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_VC2_CREDIT_MASK 0x0000000000008000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_DATABUFF_VC0 */
-/* Description: VC0 Data Buffer overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_DATABUFF_VC0_SHFT 16
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_DATABUFF_VC0_MASK 0x0000000000010000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_DATABUFF_VC2 */
-/* Description: VC2 Data Buffer overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_DATABUFF_VC2_SHFT 17
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_DATABUFF_VC2_MASK 0x0000000000020000
-
-/* SH_XNMD_FIRST_ERROR_LUT_READ_ERROR */
-/* Description: LUT Read Error */
-#define SH_XNMD_FIRST_ERROR_LUT_READ_ERROR_SHFT 18
-#define SH_XNMD_FIRST_ERROR_LUT_READ_ERROR_MASK 0x0000000000040000
-
-/* SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR0 */
-/* Description: Single Bit Error in Bits 63:0 */
-#define SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR0_SHFT 19
-#define SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR0_MASK 0x0000000000080000
-
-/* SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR1 */
-/* Description: Single Bit Error in Bits 127:64 */
-#define SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR1_SHFT 20
-#define SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR1_MASK 0x0000000000100000
-
-/* SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR2 */
-/* Description: Single Bit Error in Bits 191:128 */
-#define SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR2_SHFT 21
-#define SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR2_MASK 0x0000000000200000
-
-/* SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR3 */
-/* Description: Single Bit Error in Bits 255:192 */
-#define SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR3_SHFT 22
-#define SH_XNMD_FIRST_ERROR_SINGLE_BIT_ERROR3_MASK 0x0000000000400000
-
-/* SH_XNMD_FIRST_ERROR_UNCOR_ERROR0 */
-/* Description: Uncorrectable Error in Bits 63:0 */
-#define SH_XNMD_FIRST_ERROR_UNCOR_ERROR0_SHFT 23
-#define SH_XNMD_FIRST_ERROR_UNCOR_ERROR0_MASK 0x0000000000800000
-
-/* SH_XNMD_FIRST_ERROR_UNCOR_ERROR1 */
-/* Description: Uncorrectable Error in Bits 127:64 */
-#define SH_XNMD_FIRST_ERROR_UNCOR_ERROR1_SHFT 24
-#define SH_XNMD_FIRST_ERROR_UNCOR_ERROR1_MASK 0x0000000001000000
-
-/* SH_XNMD_FIRST_ERROR_UNCOR_ERROR2 */
-/* Description: Uncorrectable Error in Bits 191:128 */
-#define SH_XNMD_FIRST_ERROR_UNCOR_ERROR2_SHFT 25
-#define SH_XNMD_FIRST_ERROR_UNCOR_ERROR2_MASK 0x0000000002000000
-
-/* SH_XNMD_FIRST_ERROR_UNCOR_ERROR3 */
-/* Description: Uncorrectable Error in Bits 255:192 */
-#define SH_XNMD_FIRST_ERROR_UNCOR_ERROR3_SHFT 26
-#define SH_XNMD_FIRST_ERROR_UNCOR_ERROR3_MASK 0x0000000004000000
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_SIC_CNTR0_SHFT 27
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_SIC_CNTR0_MASK 0x0000000008000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_SIC_CNTR0 */
-/* Description: SIC Counter 0 Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_SIC_CNTR0_SHFT 28
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_SIC_CNTR0_MASK 0x0000000010000000
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_SIC_CNTR2_SHFT 29
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_SIC_CNTR2_MASK 0x0000000020000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_SIC_CNTR2 */
-/* Description: SIC Counter 2 Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_SIC_CNTR2_SHFT 30
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_SIC_CNTR2_MASK 0x0000000040000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_DEBIT0 */
-/* Description: NI0 Debit 0 Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_DEBIT0_SHFT 31
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_DEBIT0_MASK 0x0000000080000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_DEBIT2 */
-/* Description: NI0 Debit 2 Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_DEBIT2_SHFT 32
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_DEBIT2_MASK 0x0000000100000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_DEBIT0 */
-/* Description: NI1 Debit 0 Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_DEBIT0_SHFT 33
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_DEBIT0_MASK 0x0000000200000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_DEBIT2 */
-/* Description: NI1 Debit 2 Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_DEBIT2_SHFT 34
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_DEBIT2_MASK 0x0000000400000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_DEBIT0 */
-/* Description: IILB Debit 0 Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_DEBIT0_SHFT 35
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_DEBIT0_MASK 0x0000000800000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_DEBIT2 */
-/* Description: IILB Debit 2 Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_DEBIT2_SHFT 36
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_DEBIT2_MASK 0x0000001000000000
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT_SHFT 37
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC0_CREDIT_MASK 0x0000002000000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT */
-/* Description: NI0 VC0 Credit Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT_SHFT 38
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC0_CREDIT_MASK 0x0000004000000000
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT_SHFT 39
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI0_VC2_CREDIT_MASK 0x0000008000000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT */
-/* Description: NI0 VC2 Credit Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT_SHFT 40
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI0_VC2_CREDIT_MASK 0x0000010000000000
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT_SHFT 41
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC0_CREDIT_MASK 0x0000020000000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT */
-/* Description: NI1 VC0 Credit Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT_SHFT 42
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC0_CREDIT_MASK 0x0000040000000000
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT_SHFT 43
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_NI1_VC2_CREDIT_MASK 0x0000080000000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT */
-/* Description: NI1 VC2 Credit Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT_SHFT 44
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_NI1_VC2_CREDIT_MASK 0x0000100000000000
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT_SHFT 45
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC0_CREDIT_MASK 0x0000200000000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT */
-/* Description: IILB VC0 Credit Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT_SHFT 46
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC0_CREDIT_MASK 0x0000400000000000
-
-/* SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Underflow */
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT_SHFT 47
-#define SH_XNMD_FIRST_ERROR_UNDERFLOW_IILB_VC2_CREDIT_MASK 0x0000800000000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT */
-/* Description: IILB VC2 Credit Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT_SHFT 48
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_IILB_VC2_CREDIT_MASK 0x0001000000000000
-
-/* SH_XNMD_FIRST_ERROR_OVERFLOW_HEADER_CANCEL_FIFO */
-/* Description: Header Cancel Fifo Overflow */
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_HEADER_CANCEL_FIFO_SHFT 49
-#define SH_XNMD_FIRST_ERROR_OVERFLOW_HEADER_CANCEL_FIFO_MASK 0x0002000000000000
-
-/* ==================================================================== */
-/* Register "SH_AUTO_REPLY_ENABLE0" */
-/* Automatic Maintenance Reply Enable 0 */
-/* ==================================================================== */
-
-#define SH_AUTO_REPLY_ENABLE0 0x0000000110061000
-#define SH_AUTO_REPLY_ENABLE0_MASK 0xffffffffffffffff
-#define SH_AUTO_REPLY_ENABLE0_INIT 0x0000000000000000
-
-/* SH_AUTO_REPLY_ENABLE0_ENABLE0 */
-/* Description: Enable 0 */
-#define SH_AUTO_REPLY_ENABLE0_ENABLE0_SHFT 0
-#define SH_AUTO_REPLY_ENABLE0_ENABLE0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_AUTO_REPLY_ENABLE1" */
-/* Automatic Maintenance Reply Enable 1 */
-/* ==================================================================== */
-
-#define SH_AUTO_REPLY_ENABLE1 0x0000000110061080
-#define SH_AUTO_REPLY_ENABLE1_MASK 0xffffffffffffffff
-#define SH_AUTO_REPLY_ENABLE1_INIT 0x0000000000000000
-
-/* SH_AUTO_REPLY_ENABLE1_ENABLE1 */
-/* Description: Enable 1 */
-#define SH_AUTO_REPLY_ENABLE1_ENABLE1_SHFT 0
-#define SH_AUTO_REPLY_ENABLE1_ENABLE1_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_AUTO_REPLY_HEADER0" */
-/* Automatic Maintenance Reply Header 0 */
-/* ==================================================================== */
-
-#define SH_AUTO_REPLY_HEADER0 0x0000000110061100
-#define SH_AUTO_REPLY_HEADER0_MASK 0xffffffffffffffff
-#define SH_AUTO_REPLY_HEADER0_INIT 0x0000000000000000
-
-/* SH_AUTO_REPLY_HEADER0_HEADER0 */
-/* Description: Header 0 */
-#define SH_AUTO_REPLY_HEADER0_HEADER0_SHFT 0
-#define SH_AUTO_REPLY_HEADER0_HEADER0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_AUTO_REPLY_HEADER1" */
-/* Automatic Maintenance Reply Header 1 */
-/* ==================================================================== */
-
-#define SH_AUTO_REPLY_HEADER1 0x0000000110061180
-#define SH_AUTO_REPLY_HEADER1_MASK 0xffffffffffffffff
-#define SH_AUTO_REPLY_HEADER1_INIT 0x0000000000000000
-
-/* SH_AUTO_REPLY_HEADER1_HEADER1 */
-/* Description: Header 1 */
-#define SH_AUTO_REPLY_HEADER1_HEADER1_SHFT 0
-#define SH_AUTO_REPLY_HEADER1_HEADER1_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_ENABLE_RP_AUTO_REPLY" */
-/* Enable Automatic Maintenance Reply From Reply Queue */
-/* ==================================================================== */
-
-#define SH_ENABLE_RP_AUTO_REPLY 0x0000000110061200
-#define SH_ENABLE_RP_AUTO_REPLY_MASK 0x0000000000000001
-#define SH_ENABLE_RP_AUTO_REPLY_INIT 0x0000000000000000
-
-/* SH_ENABLE_RP_AUTO_REPLY_ENABLE */
-/* Description: Enable Reply Auto Reply */
-#define SH_ENABLE_RP_AUTO_REPLY_ENABLE_SHFT 0
-#define SH_ENABLE_RP_AUTO_REPLY_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_ENABLE_RQ_AUTO_REPLY" */
-/* Enable Automatic Maintenance Reply From Request Queue */
-/* ==================================================================== */
-
-#define SH_ENABLE_RQ_AUTO_REPLY 0x0000000110061280
-#define SH_ENABLE_RQ_AUTO_REPLY_MASK 0x0000000000000001
-#define SH_ENABLE_RQ_AUTO_REPLY_INIT 0x0000000000000000
-
-/* SH_ENABLE_RQ_AUTO_REPLY_ENABLE */
-/* Description: Enable Request Auto Reply */
-#define SH_ENABLE_RQ_AUTO_REPLY_ENABLE_SHFT 0
-#define SH_ENABLE_RQ_AUTO_REPLY_ENABLE_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_REDIRECT_INVAL" */
-/* Redirect invalidate to LB instead of PI */
-/* ==================================================================== */
-
-#define SH_REDIRECT_INVAL 0x0000000110061300
-#define SH_REDIRECT_INVAL_MASK 0x0000000000000001
-#define SH_REDIRECT_INVAL_INIT 0x0000000000000000
-
-/* SH_REDIRECT_INVAL_REDIRECT */
-/* Description: Redirect invalidates to LB instead of PI */
-#define SH_REDIRECT_INVAL_REDIRECT_SHFT 0
-#define SH_REDIRECT_INVAL_REDIRECT_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_CNTRL" */
-/* Diagnostic Message Control Register */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_CNTRL 0x0000000110062000
-#define SH_DIAG_MSG_CNTRL_MASK 0xc000000000003fff
-#define SH_DIAG_MSG_CNTRL_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_CNTRL_MSG_LENGTH */
-/* Description: Message data payload length, 0 - 63 */
-#define SH_DIAG_MSG_CNTRL_MSG_LENGTH_SHFT 0
-#define SH_DIAG_MSG_CNTRL_MSG_LENGTH_MASK 0x000000000000003f
-
-/* SH_DIAG_MSG_CNTRL_ERROR_INJECT_POINT */
-/* Description: Point message that the error bit would be activated */
-#define SH_DIAG_MSG_CNTRL_ERROR_INJECT_POINT_SHFT 6
-#define SH_DIAG_MSG_CNTRL_ERROR_INJECT_POINT_MASK 0x0000000000000fc0
-
-/* SH_DIAG_MSG_CNTRL_ERROR_INJECT_ENABLE */
-/* Description: Enable ERROR_INJECT_POINT field */
-#define SH_DIAG_MSG_CNTRL_ERROR_INJECT_ENABLE_SHFT 12
-#define SH_DIAG_MSG_CNTRL_ERROR_INJECT_ENABLE_MASK 0x0000000000001000
-
-/* SH_DIAG_MSG_CNTRL_PORT */
-/* Description: 0 = request port, 1 = reply port */
-#define SH_DIAG_MSG_CNTRL_PORT_SHFT 13
-#define SH_DIAG_MSG_CNTRL_PORT_MASK 0x0000000000002000
-
-/* SH_DIAG_MSG_CNTRL_START */
-/* Description: Start */
-#define SH_DIAG_MSG_CNTRL_START_SHFT 62
-#define SH_DIAG_MSG_CNTRL_START_MASK 0x4000000000000000
-
-/* SH_DIAG_MSG_CNTRL_BUSY */
-/* Description: Busy */
-#define SH_DIAG_MSG_CNTRL_BUSY_SHFT 63
-#define SH_DIAG_MSG_CNTRL_BUSY_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA0L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA0L 0x0000000110062080
-#define SH_DIAG_MSG_DATA0L_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA0L_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA0L_DATA_LOWER */
-/* Description: Lower 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA0L_DATA_LOWER_SHFT 0
-#define SH_DIAG_MSG_DATA0L_DATA_LOWER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA0U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA0U 0x0000000110062100
-#define SH_DIAG_MSG_DATA0U_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA0U_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA0U_DATA_UPPER */
-/* Description: Upper 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA0U_DATA_UPPER_SHFT 0
-#define SH_DIAG_MSG_DATA0U_DATA_UPPER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA1L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA1L 0x0000000110062180
-#define SH_DIAG_MSG_DATA1L_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA1L_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA1L_DATA_LOWER */
-/* Description: Lower 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA1L_DATA_LOWER_SHFT 0
-#define SH_DIAG_MSG_DATA1L_DATA_LOWER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA1U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA1U 0x0000000110062200
-#define SH_DIAG_MSG_DATA1U_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA1U_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA1U_DATA_UPPER */
-/* Description: Upper 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA1U_DATA_UPPER_SHFT 0
-#define SH_DIAG_MSG_DATA1U_DATA_UPPER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA2L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA2L 0x0000000110062280
-#define SH_DIAG_MSG_DATA2L_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA2L_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA2L_DATA_LOWER */
-/* Description: Lower 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA2L_DATA_LOWER_SHFT 0
-#define SH_DIAG_MSG_DATA2L_DATA_LOWER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA2U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA2U 0x0000000110062300
-#define SH_DIAG_MSG_DATA2U_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA2U_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA2U_DATA_UPPER */
-/* Description: Upper 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA2U_DATA_UPPER_SHFT 0
-#define SH_DIAG_MSG_DATA2U_DATA_UPPER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA3L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA3L 0x0000000110062380
-#define SH_DIAG_MSG_DATA3L_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA3L_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA3L_DATA_LOWER */
-/* Description: Lower 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA3L_DATA_LOWER_SHFT 0
-#define SH_DIAG_MSG_DATA3L_DATA_LOWER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA3U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA3U 0x0000000110062400
-#define SH_DIAG_MSG_DATA3U_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA3U_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA3U_DATA_UPPER */
-/* Description: Upper 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA3U_DATA_UPPER_SHFT 0
-#define SH_DIAG_MSG_DATA3U_DATA_UPPER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA4L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA4L 0x0000000110062480
-#define SH_DIAG_MSG_DATA4L_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA4L_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA4L_DATA_LOWER */
-/* Description: Lower 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA4L_DATA_LOWER_SHFT 0
-#define SH_DIAG_MSG_DATA4L_DATA_LOWER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA4U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA4U 0x0000000110062500
-#define SH_DIAG_MSG_DATA4U_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA4U_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA4U_DATA_UPPER */
-/* Description: Upper 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA4U_DATA_UPPER_SHFT 0
-#define SH_DIAG_MSG_DATA4U_DATA_UPPER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA5L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA5L 0x0000000110062580
-#define SH_DIAG_MSG_DATA5L_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA5L_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA5L_DATA_LOWER */
-/* Description: Lower 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA5L_DATA_LOWER_SHFT 0
-#define SH_DIAG_MSG_DATA5L_DATA_LOWER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA5U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA5U 0x0000000110062600
-#define SH_DIAG_MSG_DATA5U_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA5U_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA5U_DATA_UPPER */
-/* Description: Upper 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA5U_DATA_UPPER_SHFT 0
-#define SH_DIAG_MSG_DATA5U_DATA_UPPER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA6L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA6L 0x0000000110062680
-#define SH_DIAG_MSG_DATA6L_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA6L_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA6L_DATA_LOWER */
-/* Description: Lower 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA6L_DATA_LOWER_SHFT 0
-#define SH_DIAG_MSG_DATA6L_DATA_LOWER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA6U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA6U 0x0000000110062700
-#define SH_DIAG_MSG_DATA6U_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA6U_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA6U_DATA_UPPER */
-/* Description: Upper 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA6U_DATA_UPPER_SHFT 0
-#define SH_DIAG_MSG_DATA6U_DATA_UPPER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA7L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA7L 0x0000000110062780
-#define SH_DIAG_MSG_DATA7L_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA7L_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA7L_DATA_LOWER */
-/* Description: Lower 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA7L_DATA_LOWER_SHFT 0
-#define SH_DIAG_MSG_DATA7L_DATA_LOWER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA7U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA7U 0x0000000110062800
-#define SH_DIAG_MSG_DATA7U_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA7U_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA7U_DATA_UPPER */
-/* Description: Upper 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA7U_DATA_UPPER_SHFT 0
-#define SH_DIAG_MSG_DATA7U_DATA_UPPER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA8L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA8L 0x0000000110062880
-#define SH_DIAG_MSG_DATA8L_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA8L_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA8L_DATA_LOWER */
-/* Description: Lower 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA8L_DATA_LOWER_SHFT 0
-#define SH_DIAG_MSG_DATA8L_DATA_LOWER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA8U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_DATA8U 0x0000000110062900
-#define SH_DIAG_MSG_DATA8U_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_DATA8U_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_DATA8U_DATA_UPPER */
-/* Description: Upper 64 bits of Diagnositic Message Data */
-#define SH_DIAG_MSG_DATA8U_DATA_UPPER_SHFT 0
-#define SH_DIAG_MSG_DATA8U_DATA_UPPER_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_HDR0" */
-/* Diagnostice Data, lower 64 bits of header */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_HDR0 0x0000000110062980
-#define SH_DIAG_MSG_HDR0_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_HDR0_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_HDR0_HEADER0 */
-/* Description: Lower 64 bits of Diagnositic Message Header */
-#define SH_DIAG_MSG_HDR0_HEADER0_SHFT 0
-#define SH_DIAG_MSG_HDR0_HEADER0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_HDR1" */
-/* Diagnostice Data, upper 64 bits of header */
-/* ==================================================================== */
-
-#define SH_DIAG_MSG_HDR1 0x0000000110062a00
-#define SH_DIAG_MSG_HDR1_MASK 0xffffffffffffffff
-#define SH_DIAG_MSG_HDR1_INIT 0x0000000000000000
-
-/* SH_DIAG_MSG_HDR1_HEADER1 */
-/* Description: Upper 64 bits of Diagnositic Message Header */
-#define SH_DIAG_MSG_HDR1_HEADER1_SHFT 0
-#define SH_DIAG_MSG_HDR1_HEADER1_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_DEBUG_SELECT" */
-/* SHub Debug Port Select */
-/* ==================================================================== */
-
-#define SH_DEBUG_SELECT 0x0000000110063000
-#define SH_DEBUG_SELECT_MASK 0x8fffffffffffffff
-#define SH_DEBUG_SELECT_INIT 0x0000e38e38e38e38
-
-/* SH_DEBUG_SELECT_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble0_nibble_select */
-#define SH_DEBUG_SELECT_NIBBLE0_NIBBLE_SEL_SHFT 0
-#define SH_DEBUG_SELECT_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000007
-
-/* SH_DEBUG_SELECT_NIBBLE0_CHIPLET_SEL */
-/* Description: Nibble0_chiplet_select */
-#define SH_DEBUG_SELECT_NIBBLE0_CHIPLET_SEL_SHFT 3
-#define SH_DEBUG_SELECT_NIBBLE0_CHIPLET_SEL_MASK 0x0000000000000038
-
-/* SH_DEBUG_SELECT_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble1_nibble_select */
-#define SH_DEBUG_SELECT_NIBBLE1_NIBBLE_SEL_SHFT 6
-#define SH_DEBUG_SELECT_NIBBLE1_NIBBLE_SEL_MASK 0x00000000000001c0
-
-/* SH_DEBUG_SELECT_NIBBLE1_CHIPLET_SEL */
-/* Description: Nibble1_chiplet_select */
-#define SH_DEBUG_SELECT_NIBBLE1_CHIPLET_SEL_SHFT 9
-#define SH_DEBUG_SELECT_NIBBLE1_CHIPLET_SEL_MASK 0x0000000000000e00
-
-/* SH_DEBUG_SELECT_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble2_nibble_select */
-#define SH_DEBUG_SELECT_NIBBLE2_NIBBLE_SEL_SHFT 12
-#define SH_DEBUG_SELECT_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_DEBUG_SELECT_NIBBLE2_CHIPLET_SEL */
-/* Description: Nibble2_chiplet_select */
-#define SH_DEBUG_SELECT_NIBBLE2_CHIPLET_SEL_SHFT 15
-#define SH_DEBUG_SELECT_NIBBLE2_CHIPLET_SEL_MASK 0x0000000000038000
-
-/* SH_DEBUG_SELECT_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble3_nibble_select */
-#define SH_DEBUG_SELECT_NIBBLE3_NIBBLE_SEL_SHFT 18
-#define SH_DEBUG_SELECT_NIBBLE3_NIBBLE_SEL_MASK 0x00000000001c0000
-
-/* SH_DEBUG_SELECT_NIBBLE3_CHIPLET_SEL */
-/* Description: Nibble3_chiplet_select */
-#define SH_DEBUG_SELECT_NIBBLE3_CHIPLET_SEL_SHFT 21
-#define SH_DEBUG_SELECT_NIBBLE3_CHIPLET_SEL_MASK 0x0000000000e00000
-
-/* SH_DEBUG_SELECT_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble4_nibble_select */
-#define SH_DEBUG_SELECT_NIBBLE4_NIBBLE_SEL_SHFT 24
-#define SH_DEBUG_SELECT_NIBBLE4_NIBBLE_SEL_MASK 0x0000000007000000
-
-/* SH_DEBUG_SELECT_NIBBLE4_CHIPLET_SEL */
-/* Description: Nibble4_chiplet_select */
-#define SH_DEBUG_SELECT_NIBBLE4_CHIPLET_SEL_SHFT 27
-#define SH_DEBUG_SELECT_NIBBLE4_CHIPLET_SEL_MASK 0x0000000038000000
-
-/* SH_DEBUG_SELECT_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble5_nibble_select */
-#define SH_DEBUG_SELECT_NIBBLE5_NIBBLE_SEL_SHFT 30
-#define SH_DEBUG_SELECT_NIBBLE5_NIBBLE_SEL_MASK 0x00000001c0000000
-
-/* SH_DEBUG_SELECT_NIBBLE5_CHIPLET_SEL */
-/* Description: Nibble5_chiplet_select */
-#define SH_DEBUG_SELECT_NIBBLE5_CHIPLET_SEL_SHFT 33
-#define SH_DEBUG_SELECT_NIBBLE5_CHIPLET_SEL_MASK 0x0000000e00000000
-
-/* SH_DEBUG_SELECT_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble6_nibble_select */
-#define SH_DEBUG_SELECT_NIBBLE6_NIBBLE_SEL_SHFT 36
-#define SH_DEBUG_SELECT_NIBBLE6_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_DEBUG_SELECT_NIBBLE6_CHIPLET_SEL */
-/* Description: Nibble6_chiplet_select */
-#define SH_DEBUG_SELECT_NIBBLE6_CHIPLET_SEL_SHFT 39
-#define SH_DEBUG_SELECT_NIBBLE6_CHIPLET_SEL_MASK 0x0000038000000000
-
-/* SH_DEBUG_SELECT_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble7_nibble_select */
-#define SH_DEBUG_SELECT_NIBBLE7_NIBBLE_SEL_SHFT 42
-#define SH_DEBUG_SELECT_NIBBLE7_NIBBLE_SEL_MASK 0x00001c0000000000
-
-/* SH_DEBUG_SELECT_NIBBLE7_CHIPLET_SEL */
-/* Description: Nibble7_chiplet_select */
-#define SH_DEBUG_SELECT_NIBBLE7_CHIPLET_SEL_SHFT 45
-#define SH_DEBUG_SELECT_NIBBLE7_CHIPLET_SEL_MASK 0x0000e00000000000
-
-/* SH_DEBUG_SELECT_DEBUG_II_SEL */
-/* Description: Select bits to II port */
-#define SH_DEBUG_SELECT_DEBUG_II_SEL_SHFT 48
-#define SH_DEBUG_SELECT_DEBUG_II_SEL_MASK 0x0007000000000000
-
-/* SH_DEBUG_SELECT_SEL_II */
-/* Description: Select II to debug port */
-#define SH_DEBUG_SELECT_SEL_II_SHFT 51
-#define SH_DEBUG_SELECT_SEL_II_MASK 0x0ff8000000000000
-
-/* SH_DEBUG_SELECT_TRIGGER_ENABLE */
-/* Description: Enable trigger on bit 32 of Analyzer data */
-#define SH_DEBUG_SELECT_TRIGGER_ENABLE_SHFT 63
-#define SH_DEBUG_SELECT_TRIGGER_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_TRIGGER_COMPARE_MASK" */
-/* SHub Trigger Compare Mask */
-/* ==================================================================== */
-
-#define SH_TRIGGER_COMPARE_MASK 0x0000000110063080
-#define SH_TRIGGER_COMPARE_MASK_MASK 0x00000000ffffffff
-#define SH_TRIGGER_COMPARE_MASK_INIT 0x0000000000000000
-
-/* SH_TRIGGER_COMPARE_MASK_MASK */
-/* Description: SHub Trigger Compare Mask */
-#define SH_TRIGGER_COMPARE_MASK_MASK_SHFT 0
-#define SH_TRIGGER_COMPARE_MASK_MASK_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_TRIGGER_COMPARE_PATTERN" */
-/* SHub Trigger Compare Pattern */
-/* ==================================================================== */
-
-#define SH_TRIGGER_COMPARE_PATTERN 0x0000000110063100
-#define SH_TRIGGER_COMPARE_PATTERN_MASK 0x00000000ffffffff
-#define SH_TRIGGER_COMPARE_PATTERN_INIT 0x0000000000000000
-
-/* SH_TRIGGER_COMPARE_PATTERN_DATA */
-/* Description: SHub Trigger Compare Pattern */
-#define SH_TRIGGER_COMPARE_PATTERN_DATA_SHFT 0
-#define SH_TRIGGER_COMPARE_PATTERN_DATA_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_TRIGGER_SEL" */
-/* Trigger select for SHUB debug port */
-/* ==================================================================== */
-
-#define SH_TRIGGER_SEL 0x0000000110063180
-#define SH_TRIGGER_SEL_MASK 0x7777777777777777
-#define SH_TRIGGER_SEL_INIT 0x0000000000000000
-
-/* SH_TRIGGER_SEL_NIBBLE0_INPUT_SEL */
-/* Description: Nibble 0 input select */
-#define SH_TRIGGER_SEL_NIBBLE0_INPUT_SEL_SHFT 0
-#define SH_TRIGGER_SEL_NIBBLE0_INPUT_SEL_MASK 0x0000000000000007
-
-/* SH_TRIGGER_SEL_NIBBLE0_NIBBLE_SEL */
-/* Description: Nibble 0 Nibble select */
-#define SH_TRIGGER_SEL_NIBBLE0_NIBBLE_SEL_SHFT 4
-#define SH_TRIGGER_SEL_NIBBLE0_NIBBLE_SEL_MASK 0x0000000000000070
-
-/* SH_TRIGGER_SEL_NIBBLE1_INPUT_SEL */
-/* Description: Nibble 1 input select */
-#define SH_TRIGGER_SEL_NIBBLE1_INPUT_SEL_SHFT 8
-#define SH_TRIGGER_SEL_NIBBLE1_INPUT_SEL_MASK 0x0000000000000700
-
-/* SH_TRIGGER_SEL_NIBBLE1_NIBBLE_SEL */
-/* Description: Nibble 1 Nibble select */
-#define SH_TRIGGER_SEL_NIBBLE1_NIBBLE_SEL_SHFT 12
-#define SH_TRIGGER_SEL_NIBBLE1_NIBBLE_SEL_MASK 0x0000000000007000
-
-/* SH_TRIGGER_SEL_NIBBLE2_INPUT_SEL */
-/* Description: Nibble 2 input select */
-#define SH_TRIGGER_SEL_NIBBLE2_INPUT_SEL_SHFT 16
-#define SH_TRIGGER_SEL_NIBBLE2_INPUT_SEL_MASK 0x0000000000070000
-
-/* SH_TRIGGER_SEL_NIBBLE2_NIBBLE_SEL */
-/* Description: Nibble 2 Nibble select */
-#define SH_TRIGGER_SEL_NIBBLE2_NIBBLE_SEL_SHFT 20
-#define SH_TRIGGER_SEL_NIBBLE2_NIBBLE_SEL_MASK 0x0000000000700000
-
-/* SH_TRIGGER_SEL_NIBBLE3_INPUT_SEL */
-/* Description: Nibble 3 input select */
-#define SH_TRIGGER_SEL_NIBBLE3_INPUT_SEL_SHFT 24
-#define SH_TRIGGER_SEL_NIBBLE3_INPUT_SEL_MASK 0x0000000007000000
-
-/* SH_TRIGGER_SEL_NIBBLE3_NIBBLE_SEL */
-/* Description: Nibble 3 Nibble select */
-#define SH_TRIGGER_SEL_NIBBLE3_NIBBLE_SEL_SHFT 28
-#define SH_TRIGGER_SEL_NIBBLE3_NIBBLE_SEL_MASK 0x0000000070000000
-
-/* SH_TRIGGER_SEL_NIBBLE4_INPUT_SEL */
-/* Description: Nibble 4 input select */
-#define SH_TRIGGER_SEL_NIBBLE4_INPUT_SEL_SHFT 32
-#define SH_TRIGGER_SEL_NIBBLE4_INPUT_SEL_MASK 0x0000000700000000
-
-/* SH_TRIGGER_SEL_NIBBLE4_NIBBLE_SEL */
-/* Description: Nibble 4 Nibble select */
-#define SH_TRIGGER_SEL_NIBBLE4_NIBBLE_SEL_SHFT 36
-#define SH_TRIGGER_SEL_NIBBLE4_NIBBLE_SEL_MASK 0x0000007000000000
-
-/* SH_TRIGGER_SEL_NIBBLE5_INPUT_SEL */
-/* Description: Nibble 5 input select */
-#define SH_TRIGGER_SEL_NIBBLE5_INPUT_SEL_SHFT 40
-#define SH_TRIGGER_SEL_NIBBLE5_INPUT_SEL_MASK 0x0000070000000000
-
-/* SH_TRIGGER_SEL_NIBBLE5_NIBBLE_SEL */
-/* Description: Nibble 5 Nibble select */
-#define SH_TRIGGER_SEL_NIBBLE5_NIBBLE_SEL_SHFT 44
-#define SH_TRIGGER_SEL_NIBBLE5_NIBBLE_SEL_MASK 0x0000700000000000
-
-/* SH_TRIGGER_SEL_NIBBLE6_INPUT_SEL */
-/* Description: Nibble 6 input select */
-#define SH_TRIGGER_SEL_NIBBLE6_INPUT_SEL_SHFT 48
-#define SH_TRIGGER_SEL_NIBBLE6_INPUT_SEL_MASK 0x0007000000000000
-
-/* SH_TRIGGER_SEL_NIBBLE6_NIBBLE_SEL */
-/* Description: Nibble 6 Nibble select */
-#define SH_TRIGGER_SEL_NIBBLE6_NIBBLE_SEL_SHFT 52
-#define SH_TRIGGER_SEL_NIBBLE6_NIBBLE_SEL_MASK 0x0070000000000000
-
-/* SH_TRIGGER_SEL_NIBBLE7_INPUT_SEL */
-/* Description: Nibble 7 input select */
-#define SH_TRIGGER_SEL_NIBBLE7_INPUT_SEL_SHFT 56
-#define SH_TRIGGER_SEL_NIBBLE7_INPUT_SEL_MASK 0x0700000000000000
-
-/* SH_TRIGGER_SEL_NIBBLE7_NIBBLE_SEL */
-/* Description: Nibble 7 Nibble select */
-#define SH_TRIGGER_SEL_NIBBLE7_NIBBLE_SEL_SHFT 60
-#define SH_TRIGGER_SEL_NIBBLE7_NIBBLE_SEL_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_STOP_CLK_CONTROL" */
-/* Stop Clock Control */
-/* ==================================================================== */
-
-#define SH_STOP_CLK_CONTROL 0x0000000110064000
-#define SH_STOP_CLK_CONTROL_MASK 0x00000000000000ff
-#define SH_STOP_CLK_CONTROL_INIT 0x00000000000000e0
-
-/* SH_STOP_CLK_CONTROL_STIMULUS */
-/* Description: Counter stimulus */
-#define SH_STOP_CLK_CONTROL_STIMULUS_SHFT 0
-#define SH_STOP_CLK_CONTROL_STIMULUS_MASK 0x000000000000001f
-
-/* SH_STOP_CLK_CONTROL_EVENT */
-/* Description: Counter event select (0-greater than, 1-equal) */
-#define SH_STOP_CLK_CONTROL_EVENT_SHFT 5
-#define SH_STOP_CLK_CONTROL_EVENT_MASK 0x0000000000000020
-
-/* SH_STOP_CLK_CONTROL_POLARITY */
-/* Description: Counter polarity select (0-negative edge, 1-positiv */
-/* e edge) */
-#define SH_STOP_CLK_CONTROL_POLARITY_SHFT 6
-#define SH_STOP_CLK_CONTROL_POLARITY_MASK 0x0000000000000040
-
-/* SH_STOP_CLK_CONTROL_MODE */
-/* Description: Counter mode select (0-internal, 1-external) */
-#define SH_STOP_CLK_CONTROL_MODE_SHFT 7
-#define SH_STOP_CLK_CONTROL_MODE_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_STOP_CLK_DELAY_PHASE" */
-/* Stop Clock Delay Phase */
-/* ==================================================================== */
-
-#define SH_STOP_CLK_DELAY_PHASE 0x0000000110064080
-#define SH_STOP_CLK_DELAY_PHASE_MASK 0x00000000000000ff
-#define SH_STOP_CLK_DELAY_PHASE_INIT 0x0000000000000000
-
-/* SH_STOP_CLK_DELAY_PHASE_DELAY */
-/* Description: Delay phase */
-#define SH_STOP_CLK_DELAY_PHASE_DELAY_SHFT 0
-#define SH_STOP_CLK_DELAY_PHASE_DELAY_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_TSF_ARM_MASK" */
-/* Trigger sequencing facility arm mask */
-/* ==================================================================== */
-
-#define SH_TSF_ARM_MASK 0x0000000110065000
-#define SH_TSF_ARM_MASK_MASK 0xffffffffffffffff
-#define SH_TSF_ARM_MASK_INIT 0x0000000000000000
-
-/* SH_TSF_ARM_MASK_MASK */
-/* Description: Trigger sequencing facility arm mask */
-#define SH_TSF_ARM_MASK_MASK_SHFT 0
-#define SH_TSF_ARM_MASK_MASK_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_TSF_COUNTER_PRESETS" */
-/* Trigger sequencing facility counter presets */
-/* ==================================================================== */
-
-#define SH_TSF_COUNTER_PRESETS 0x0000000110065080
-#define SH_TSF_COUNTER_PRESETS_MASK 0xffffffffffffffff
-#define SH_TSF_COUNTER_PRESETS_INIT 0x0000000000000000
-
-/* SH_TSF_COUNTER_PRESETS_COUNT_32 */
-/* Description: Trigger sequencing facility counter 32 */
-#define SH_TSF_COUNTER_PRESETS_COUNT_32_SHFT 0
-#define SH_TSF_COUNTER_PRESETS_COUNT_32_MASK 0x00000000ffffffff
-
-/* SH_TSF_COUNTER_PRESETS_COUNT_16 */
-/* Description: Trigger sequencing facility counter 16 */
-#define SH_TSF_COUNTER_PRESETS_COUNT_16_SHFT 32
-#define SH_TSF_COUNTER_PRESETS_COUNT_16_MASK 0x0000ffff00000000
-
-/* SH_TSF_COUNTER_PRESETS_COUNT_8B */
-/* Description: Trigger sequencing facility counter 8b */
-#define SH_TSF_COUNTER_PRESETS_COUNT_8B_SHFT 48
-#define SH_TSF_COUNTER_PRESETS_COUNT_8B_MASK 0x00ff000000000000
-
-/* SH_TSF_COUNTER_PRESETS_COUNT_8A */
-/* Description: Trigger sequencing facility counter 8a */
-#define SH_TSF_COUNTER_PRESETS_COUNT_8A_SHFT 56
-#define SH_TSF_COUNTER_PRESETS_COUNT_8A_MASK 0xff00000000000000
-
-/* ==================================================================== */
-/* Register "SH_TSF_DECREMENT_CTL" */
-/* Trigger sequencing facility counter decrement control */
-/* ==================================================================== */
-
-#define SH_TSF_DECREMENT_CTL 0x0000000110065100
-#define SH_TSF_DECREMENT_CTL_MASK 0x000000000000ffff
-#define SH_TSF_DECREMENT_CTL_INIT 0x0000000000000000
-
-/* SH_TSF_DECREMENT_CTL_CTL */
-/* Description: Trigger sequencing facility counter decrement contr */
-#define SH_TSF_DECREMENT_CTL_CTL_SHFT 0
-#define SH_TSF_DECREMENT_CTL_CTL_MASK 0x000000000000ffff
-
-/* ==================================================================== */
-/* Register "SH_TSF_DIAG_MSG_CTL" */
-/* Trigger sequencing facility diagnostic message control */
-/* ==================================================================== */
-
-#define SH_TSF_DIAG_MSG_CTL 0x0000000110065180
-#define SH_TSF_DIAG_MSG_CTL_MASK 0x00000000000000ff
-#define SH_TSF_DIAG_MSG_CTL_INIT 0x0000000000000000
-
-/* SH_TSF_DIAG_MSG_CTL_ENABLE */
-/* Description: Trigger sequencing facility diagnostic message cont */
-#define SH_TSF_DIAG_MSG_CTL_ENABLE_SHFT 0
-#define SH_TSF_DIAG_MSG_CTL_ENABLE_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_TSF_DISARM_MASK" */
-/* Trigger sequencing facility disarm mask */
-/* ==================================================================== */
-
-#define SH_TSF_DISARM_MASK 0x0000000110065200
-#define SH_TSF_DISARM_MASK_MASK 0xffffffffffffffff
-#define SH_TSF_DISARM_MASK_INIT 0x0000000000000000
-
-/* SH_TSF_DISARM_MASK_MASK */
-/* Description: Trigger sequencing facility disarm mask */
-#define SH_TSF_DISARM_MASK_MASK_SHFT 0
-#define SH_TSF_DISARM_MASK_MASK_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_TSF_ENABLE_CTL" */
-/* Trigger sequencing facility counter enable control */
-/* ==================================================================== */
-
-#define SH_TSF_ENABLE_CTL 0x0000000110065280
-#define SH_TSF_ENABLE_CTL_MASK 0x000000000000ffff
-#define SH_TSF_ENABLE_CTL_INIT 0x0000000000000000
-
-/* SH_TSF_ENABLE_CTL_CTL */
-/* Description: Trigger sequencing facility counter enable control */
-#define SH_TSF_ENABLE_CTL_CTL_SHFT 0
-#define SH_TSF_ENABLE_CTL_CTL_MASK 0x000000000000ffff
-
-/* ==================================================================== */
-/* Register "SH_TSF_SOFTWARE_ARM" */
-/* Trigger sequencing facility software arm */
-/* ==================================================================== */
-
-#define SH_TSF_SOFTWARE_ARM 0x0000000110065300
-#define SH_TSF_SOFTWARE_ARM_MASK 0x00000000000000ff
-#define SH_TSF_SOFTWARE_ARM_INIT 0x0000000000000000
-
-/* SH_TSF_SOFTWARE_ARM_BIT0 */
-/* Description: Trigger sequencing facility software arm bit 0 */
-#define SH_TSF_SOFTWARE_ARM_BIT0_SHFT 0
-#define SH_TSF_SOFTWARE_ARM_BIT0_MASK 0x0000000000000001
-
-/* SH_TSF_SOFTWARE_ARM_BIT1 */
-/* Description: Trigger sequencing facility software arm bit 1 */
-#define SH_TSF_SOFTWARE_ARM_BIT1_SHFT 1
-#define SH_TSF_SOFTWARE_ARM_BIT1_MASK 0x0000000000000002
-
-/* SH_TSF_SOFTWARE_ARM_BIT2 */
-/* Description: Trigger sequencing facility software arm bit 2 */
-#define SH_TSF_SOFTWARE_ARM_BIT2_SHFT 2
-#define SH_TSF_SOFTWARE_ARM_BIT2_MASK 0x0000000000000004
-
-/* SH_TSF_SOFTWARE_ARM_BIT3 */
-/* Description: Trigger sequencing facility software arm bit 3 */
-#define SH_TSF_SOFTWARE_ARM_BIT3_SHFT 3
-#define SH_TSF_SOFTWARE_ARM_BIT3_MASK 0x0000000000000008
-
-/* SH_TSF_SOFTWARE_ARM_BIT4 */
-/* Description: Trigger sequencing facility software arm bit 4 */
-#define SH_TSF_SOFTWARE_ARM_BIT4_SHFT 4
-#define SH_TSF_SOFTWARE_ARM_BIT4_MASK 0x0000000000000010
-
-/* SH_TSF_SOFTWARE_ARM_BIT5 */
-/* Description: Trigger sequencing facility software arm bit 5 */
-#define SH_TSF_SOFTWARE_ARM_BIT5_SHFT 5
-#define SH_TSF_SOFTWARE_ARM_BIT5_MASK 0x0000000000000020
-
-/* SH_TSF_SOFTWARE_ARM_BIT6 */
-/* Description: Trigger sequencing facility software arm bit 6 */
-#define SH_TSF_SOFTWARE_ARM_BIT6_SHFT 6
-#define SH_TSF_SOFTWARE_ARM_BIT6_MASK 0x0000000000000040
-
-/* SH_TSF_SOFTWARE_ARM_BIT7 */
-/* Description: Trigger sequencing facility software arm bit 7 */
-#define SH_TSF_SOFTWARE_ARM_BIT7_SHFT 7
-#define SH_TSF_SOFTWARE_ARM_BIT7_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_TSF_SOFTWARE_DISARM" */
-/* Trigger sequencing facility software disarm */
-/* ==================================================================== */
-
-#define SH_TSF_SOFTWARE_DISARM 0x0000000110065380
-#define SH_TSF_SOFTWARE_DISARM_MASK 0x00000000000000ff
-#define SH_TSF_SOFTWARE_DISARM_INIT 0x0000000000000000
-
-/* SH_TSF_SOFTWARE_DISARM_BIT0 */
-/* Description: Trigger sequencing facility software disarm bit 0 */
-#define SH_TSF_SOFTWARE_DISARM_BIT0_SHFT 0
-#define SH_TSF_SOFTWARE_DISARM_BIT0_MASK 0x0000000000000001
-
-/* SH_TSF_SOFTWARE_DISARM_BIT1 */
-/* Description: Trigger sequencing facility software disarm bit 1 */
-#define SH_TSF_SOFTWARE_DISARM_BIT1_SHFT 1
-#define SH_TSF_SOFTWARE_DISARM_BIT1_MASK 0x0000000000000002
-
-/* SH_TSF_SOFTWARE_DISARM_BIT2 */
-/* Description: Trigger sequencing facility software disarm bit 2 */
-#define SH_TSF_SOFTWARE_DISARM_BIT2_SHFT 2
-#define SH_TSF_SOFTWARE_DISARM_BIT2_MASK 0x0000000000000004
-
-/* SH_TSF_SOFTWARE_DISARM_BIT3 */
-/* Description: Trigger sequencing facility software disarm bit 3 */
-#define SH_TSF_SOFTWARE_DISARM_BIT3_SHFT 3
-#define SH_TSF_SOFTWARE_DISARM_BIT3_MASK 0x0000000000000008
-
-/* SH_TSF_SOFTWARE_DISARM_BIT4 */
-/* Description: Trigger sequencing facility software disarm bit 4 */
-#define SH_TSF_SOFTWARE_DISARM_BIT4_SHFT 4
-#define SH_TSF_SOFTWARE_DISARM_BIT4_MASK 0x0000000000000010
-
-/* SH_TSF_SOFTWARE_DISARM_BIT5 */
-/* Description: Trigger sequencing facility software disarm bit 5 */
-#define SH_TSF_SOFTWARE_DISARM_BIT5_SHFT 5
-#define SH_TSF_SOFTWARE_DISARM_BIT5_MASK 0x0000000000000020
-
-/* SH_TSF_SOFTWARE_DISARM_BIT6 */
-/* Description: Trigger sequencing facility software disarm bit 6 */
-#define SH_TSF_SOFTWARE_DISARM_BIT6_SHFT 6
-#define SH_TSF_SOFTWARE_DISARM_BIT6_MASK 0x0000000000000040
-
-/* SH_TSF_SOFTWARE_DISARM_BIT7 */
-/* Description: Trigger sequencing facility software disarm bit 7 */
-#define SH_TSF_SOFTWARE_DISARM_BIT7_SHFT 7
-#define SH_TSF_SOFTWARE_DISARM_BIT7_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_TSF_SOFTWARE_TRIGGERED" */
-/* Trigger sequencing facility software triggered */
-/* ==================================================================== */
-
-#define SH_TSF_SOFTWARE_TRIGGERED 0x0000000110065400
-#define SH_TSF_SOFTWARE_TRIGGERED_MASK 0x00000000000000ff
-#define SH_TSF_SOFTWARE_TRIGGERED_INIT 0x0000000000000000
-
-/* SH_TSF_SOFTWARE_TRIGGERED_BIT0 */
-/* Description: Trigger sequencing facility software triggered bit */
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT0_SHFT 0
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT0_MASK 0x0000000000000001
-
-/* SH_TSF_SOFTWARE_TRIGGERED_BIT1 */
-/* Description: Trigger sequencing facility software triggered bit */
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT1_SHFT 1
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT1_MASK 0x0000000000000002
-
-/* SH_TSF_SOFTWARE_TRIGGERED_BIT2 */
-/* Description: Trigger sequencing facility software triggered bit */
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT2_SHFT 2
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT2_MASK 0x0000000000000004
-
-/* SH_TSF_SOFTWARE_TRIGGERED_BIT3 */
-/* Description: Trigger sequencing facility software triggered bit */
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT3_SHFT 3
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT3_MASK 0x0000000000000008
-
-/* SH_TSF_SOFTWARE_TRIGGERED_BIT4 */
-/* Description: Trigger sequencing facility software triggered bit */
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT4_SHFT 4
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT4_MASK 0x0000000000000010
-
-/* SH_TSF_SOFTWARE_TRIGGERED_BIT5 */
-/* Description: Trigger sequencing facility software triggered bit */
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT5_SHFT 5
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT5_MASK 0x0000000000000020
-
-/* SH_TSF_SOFTWARE_TRIGGERED_BIT6 */
-/* Description: Trigger sequencing facility software triggered bit */
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT6_SHFT 6
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT6_MASK 0x0000000000000040
-
-/* SH_TSF_SOFTWARE_TRIGGERED_BIT7 */
-/* Description: Trigger sequencing facility software triggered bit */
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT7_SHFT 7
-#define SH_TSF_SOFTWARE_TRIGGERED_BIT7_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_TSF_TRIGGER_MASK" */
-/* Trigger sequencing facility trigger mask */
-/* ==================================================================== */
-
-#define SH_TSF_TRIGGER_MASK 0x0000000110065480
-#define SH_TSF_TRIGGER_MASK_MASK 0xffffffffffffffff
-#define SH_TSF_TRIGGER_MASK_INIT 0x0000000000000000
-
-/* SH_TSF_TRIGGER_MASK_MASK */
-/* Description: Trigger sequencing facility trigger mask */
-#define SH_TSF_TRIGGER_MASK_MASK_SHFT 0
-#define SH_TSF_TRIGGER_MASK_MASK_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_VEC_DATA" */
-/* Vector Write Request Message Data */
-/* ==================================================================== */
-
-#define SH_VEC_DATA 0x0000000110066000
-#define SH_VEC_DATA_MASK 0xffffffffffffffff
-#define SH_VEC_DATA_INIT 0x0000000000000000
-
-/* SH_VEC_DATA_DATA */
-/* Description: Data */
-#define SH_VEC_DATA_DATA_SHFT 0
-#define SH_VEC_DATA_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_VEC_PARMS" */
-/* Vector Message Parameters Register */
-/* ==================================================================== */
-
-#define SH_VEC_PARMS 0x0000000110066080
-#define SH_VEC_PARMS_MASK 0xc0003ffffffffffb
-#define SH_VEC_PARMS_INIT 0x0000000000000000
-
-/* SH_VEC_PARMS_TYPE */
-/* Description: Vector Request Message Type */
-#define SH_VEC_PARMS_TYPE_SHFT 0
-#define SH_VEC_PARMS_TYPE_MASK 0x0000000000000001
-
-/* SH_VEC_PARMS_NI_PORT */
-/* Description: Network Interface Port Select */
-#define SH_VEC_PARMS_NI_PORT_SHFT 1
-#define SH_VEC_PARMS_NI_PORT_MASK 0x0000000000000002
-
-/* SH_VEC_PARMS_ADDRESS */
-/* Description: Address[37:6] */
-#define SH_VEC_PARMS_ADDRESS_SHFT 3
-#define SH_VEC_PARMS_ADDRESS_MASK 0x00000007fffffff8
-
-/* SH_VEC_PARMS_PIO_ID */
-/* Description: PIO ID */
-#define SH_VEC_PARMS_PIO_ID_SHFT 35
-#define SH_VEC_PARMS_PIO_ID_MASK 0x00003ff800000000
-
-/* SH_VEC_PARMS_START */
-/* Description: Start */
-#define SH_VEC_PARMS_START_SHFT 62
-#define SH_VEC_PARMS_START_MASK 0x4000000000000000
-
-/* SH_VEC_PARMS_BUSY */
-/* Description: Busy */
-#define SH_VEC_PARMS_BUSY_SHFT 63
-#define SH_VEC_PARMS_BUSY_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_VEC_ROUTE" */
-/* Vector Request Message Route */
-/* ==================================================================== */
-
-#define SH_VEC_ROUTE 0x0000000110066100
-#define SH_VEC_ROUTE_MASK 0xffffffffffffffff
-#define SH_VEC_ROUTE_INIT 0x0000000000000000
-
-/* SH_VEC_ROUTE_ROUTE */
-/* Description: Route */
-#define SH_VEC_ROUTE_ROUTE_SHFT 0
-#define SH_VEC_ROUTE_ROUTE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_CPU_PERM" */
-/* CPU MMR Access Permission Bits */
-/* ==================================================================== */
-
-#define SH_CPU_PERM 0x0000000110060000
-#define SH_CPU_PERM_MASK 0xffffffffffffffff
-#define SH_CPU_PERM_INIT 0xffffffffffffffff
-
-/* SH_CPU_PERM_ACCESS_BITS */
-/* Description: Access Bits */
-#define SH_CPU_PERM_ACCESS_BITS_SHFT 0
-#define SH_CPU_PERM_ACCESS_BITS_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_CPU_PERM_OVR" */
-/* CPU MMR Access Permission Override */
-/* ==================================================================== */
-
-#define SH_CPU_PERM_OVR 0x0000000110060080
-#define SH_CPU_PERM_OVR_MASK 0xffffffffffffffff
-#define SH_CPU_PERM_OVR_INIT 0x0000000000000000
-
-/* SH_CPU_PERM_OVR_OVERRIDE */
-/* Description: Override */
-#define SH_CPU_PERM_OVR_OVERRIDE_SHFT 0
-#define SH_CPU_PERM_OVR_OVERRIDE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_EXT_IO_PERM" */
-/* External IO MMR Access Permission Bits */
-/* ==================================================================== */
-
-#define SH_EXT_IO_PERM 0x0000000110060100
-#define SH_EXT_IO_PERM_MASK 0xffffffffffffffff
-#define SH_EXT_IO_PERM_INIT 0x0000000000000000
-
-/* SH_EXT_IO_PERM_ACCESS_BITS */
-/* Description: Access Bits */
-#define SH_EXT_IO_PERM_ACCESS_BITS_SHFT 0
-#define SH_EXT_IO_PERM_ACCESS_BITS_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_EXT_IOI_ACCESS" */
-/* External IO Interrupt Access Permission Bits */
-/* ==================================================================== */
-
-#define SH_EXT_IOI_ACCESS 0x0000000110060180
-#define SH_EXT_IOI_ACCESS_MASK 0xffffffffffffffff
-#define SH_EXT_IOI_ACCESS_INIT 0xffffffffffffffff
-
-/* SH_EXT_IOI_ACCESS_ACCESS_BITS */
-/* Description: Access Bits */
-#define SH_EXT_IOI_ACCESS_ACCESS_BITS_SHFT 0
-#define SH_EXT_IOI_ACCESS_ACCESS_BITS_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_GC_FIL_CTRL" */
-/* SHub Global Clock Filter Control */
-/* ==================================================================== */
-
-#define SH_GC_FIL_CTRL 0x0000000110060200
-#define SH_GC_FIL_CTRL_MASK 0x03ff3ff3ff1fff1f
-#define SH_GC_FIL_CTRL_INIT 0x0000000000000000
-
-/* SH_GC_FIL_CTRL_OFFSET */
-/* Description: Offset */
-#define SH_GC_FIL_CTRL_OFFSET_SHFT 0
-#define SH_GC_FIL_CTRL_OFFSET_MASK 0x000000000000001f
-
-/* SH_GC_FIL_CTRL_MASK_COUNTER */
-/* Description: Mask Counter */
-#define SH_GC_FIL_CTRL_MASK_COUNTER_SHFT 8
-#define SH_GC_FIL_CTRL_MASK_COUNTER_MASK 0x00000000000fff00
-
-/* SH_GC_FIL_CTRL_MASK_ENABLE */
-/* Description: Mask Enable */
-#define SH_GC_FIL_CTRL_MASK_ENABLE_SHFT 20
-#define SH_GC_FIL_CTRL_MASK_ENABLE_MASK 0x0000000000100000
-
-/* SH_GC_FIL_CTRL_DROPOUT_COUNTER */
-/* Description: Dropout Counter */
-#define SH_GC_FIL_CTRL_DROPOUT_COUNTER_SHFT 24
-#define SH_GC_FIL_CTRL_DROPOUT_COUNTER_MASK 0x00000003ff000000
-
-/* SH_GC_FIL_CTRL_DROPOUT_THRESH */
-/* Description: Dropout threshold */
-#define SH_GC_FIL_CTRL_DROPOUT_THRESH_SHFT 36
-#define SH_GC_FIL_CTRL_DROPOUT_THRESH_MASK 0x00003ff000000000
-
-/* SH_GC_FIL_CTRL_ERROR_COUNTER */
-/* Description: Error counter */
-#define SH_GC_FIL_CTRL_ERROR_COUNTER_SHFT 48
-#define SH_GC_FIL_CTRL_ERROR_COUNTER_MASK 0x03ff000000000000
-
-/* ==================================================================== */
-/* Register "SH_GC_SRC_CTRL" */
-/* SHub Global Clock Control */
-/* ==================================================================== */
-
-#define SH_GC_SRC_CTRL 0x0000000110060280
-#define SH_GC_SRC_CTRL_MASK 0x0000000313ff3ff1
-#define SH_GC_SRC_CTRL_INIT 0x0000000100000000
-
-/* SH_GC_SRC_CTRL_ENABLE_COUNTER */
-/* Description: Enable Counter */
-#define SH_GC_SRC_CTRL_ENABLE_COUNTER_SHFT 0
-#define SH_GC_SRC_CTRL_ENABLE_COUNTER_MASK 0x0000000000000001
-
-/* SH_GC_SRC_CTRL_MAX_COUNT */
-/* Description: Max Count */
-#define SH_GC_SRC_CTRL_MAX_COUNT_SHFT 4
-#define SH_GC_SRC_CTRL_MAX_COUNT_MASK 0x0000000000003ff0
-
-/* SH_GC_SRC_CTRL_COUNTER */
-/* Description: Counter */
-#define SH_GC_SRC_CTRL_COUNTER_SHFT 16
-#define SH_GC_SRC_CTRL_COUNTER_MASK 0x0000000003ff0000
-
-/* SH_GC_SRC_CTRL_TOGGLE_BIT */
-/* Description: Toggle bit */
-#define SH_GC_SRC_CTRL_TOGGLE_BIT_SHFT 28
-#define SH_GC_SRC_CTRL_TOGGLE_BIT_MASK 0x0000000010000000
-
-/* SH_GC_SRC_CTRL_SOURCE_SEL */
-/* Description: Source select (0=ext., 1=Int., 2=SHUB) */
-#define SH_GC_SRC_CTRL_SOURCE_SEL_SHFT 32
-#define SH_GC_SRC_CTRL_SOURCE_SEL_MASK 0x0000000300000000
-
-/* ==================================================================== */
-/* Register "SH_HARD_RESET" */
-/* SHub Hard Reset */
-/* ==================================================================== */
-
-#define SH_HARD_RESET 0x0000000110060300
-#define SH_HARD_RESET_MASK 0x0000000000000001
-#define SH_HARD_RESET_INIT 0x0000000000000000
-
-/* SH_HARD_RESET_HARD_RESET */
-/* Description: Hard Reset */
-#define SH_HARD_RESET_HARD_RESET_SHFT 0
-#define SH_HARD_RESET_HARD_RESET_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_IO_PERM" */
-/* II MMR Access Permission Bits */
-/* ==================================================================== */
-
-#define SH_IO_PERM 0x0000000110060380
-#define SH_IO_PERM_MASK 0xffffffffffffffff
-#define SH_IO_PERM_INIT 0x0000000000000000
-
-/* SH_IO_PERM_ACCESS_BITS */
-/* Description: Access Bits */
-#define SH_IO_PERM_ACCESS_BITS_SHFT 0
-#define SH_IO_PERM_ACCESS_BITS_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_IOI_ACCESS" */
-/* II Interrupt Access Permission Bits */
-/* ==================================================================== */
-
-#define SH_IOI_ACCESS 0x0000000110060400
-#define SH_IOI_ACCESS_MASK 0xffffffffffffffff
-#define SH_IOI_ACCESS_INIT 0xffffffffffffffff
-
-/* SH_IOI_ACCESS_ACCESS_BITS */
-/* Description: Access Bits */
-#define SH_IOI_ACCESS_ACCESS_BITS_SHFT 0
-#define SH_IOI_ACCESS_ACCESS_BITS_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_IPI_ACCESS" */
-/* CPU interrupt Access Permission Bits */
-/* ==================================================================== */
-
-#define SH_IPI_ACCESS 0x0000000110060480
-#define SH_IPI_ACCESS_MASK 0xffffffffffffffff
-#define SH_IPI_ACCESS_INIT 0xffffffffffffffff
-
-/* SH_IPI_ACCESS_ACCESS_BITS */
-/* Description: Access Bits */
-#define SH_IPI_ACCESS_ACCESS_BITS_SHFT 0
-#define SH_IPI_ACCESS_ACCESS_BITS_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_JTAG_CONFIG" */
-/* SHub JTAG configuration */
-/* ==================================================================== */
-
-#define SH_JTAG_CONFIG 0x0000000110060500
-#define SH_JTAG_CONFIG_MASK 0x00ffffffffffffff
-#define SH_JTAG_CONFIG_INIT 0x0000000000000000
-
-/* SH_JTAG_CONFIG_MD_CLK_SEL */
-/* Description: Select divide freq of DRAMCLK */
-#define SH_JTAG_CONFIG_MD_CLK_SEL_SHFT 0
-#define SH_JTAG_CONFIG_MD_CLK_SEL_MASK 0x0000000000000003
-
-/* SH_JTAG_CONFIG_NI_CLK_SEL */
-/* Description: Selects clock source for NICLK domain */
-#define SH_JTAG_CONFIG_NI_CLK_SEL_SHFT 2
-#define SH_JTAG_CONFIG_NI_CLK_SEL_MASK 0x0000000000000004
-
-/* SH_JTAG_CONFIG_II_CLK_SEL */
-/* Description: Selects clock source for IOCLK domain */
-#define SH_JTAG_CONFIG_II_CLK_SEL_SHFT 3
-#define SH_JTAG_CONFIG_II_CLK_SEL_MASK 0x0000000000000018
-
-/* SH_JTAG_CONFIG_WRT90_TARGET */
-/* Description: wrt90_target */
-#define SH_JTAG_CONFIG_WRT90_TARGET_SHFT 5
-#define SH_JTAG_CONFIG_WRT90_TARGET_MASK 0x000000000007ffe0
-
-/* SH_JTAG_CONFIG_WRT90_OVERRIDER */
-/* Description: wrt90_overrideR */
-#define SH_JTAG_CONFIG_WRT90_OVERRIDER_SHFT 19
-#define SH_JTAG_CONFIG_WRT90_OVERRIDER_MASK 0x0000000000080000
-
-/* SH_JTAG_CONFIG_WRT90_OVERRIDE */
-/* Description: wrt90_override */
-#define SH_JTAG_CONFIG_WRT90_OVERRIDE_SHFT 20
-#define SH_JTAG_CONFIG_WRT90_OVERRIDE_MASK 0x0000000000100000
-
-/* SH_JTAG_CONFIG_JTAG_MCI_RESET_DELAY */
-/* Description: jtag_mci_reset_delay */
-#define SH_JTAG_CONFIG_JTAG_MCI_RESET_DELAY_SHFT 21
-#define SH_JTAG_CONFIG_JTAG_MCI_RESET_DELAY_MASK 0x0000000001e00000
-
-/* SH_JTAG_CONFIG_JTAG_MCI_TARGET */
-/* Description: jtag_mci_target */
-#define SH_JTAG_CONFIG_JTAG_MCI_TARGET_SHFT 25
-#define SH_JTAG_CONFIG_JTAG_MCI_TARGET_MASK 0x0000007ffe000000
-
-/* SH_JTAG_CONFIG_JTAG_MCI_OVERRIDE */
-/* Description: jtag_mci_override */
-#define SH_JTAG_CONFIG_JTAG_MCI_OVERRIDE_SHFT 39
-#define SH_JTAG_CONFIG_JTAG_MCI_OVERRIDE_MASK 0x0000008000000000
-
-/* SH_JTAG_CONFIG_FSB_CONFIG_IOQ_DEPTH */
-/* Description: 0=depth 8, 1=depth1 */
-#define SH_JTAG_CONFIG_FSB_CONFIG_IOQ_DEPTH_SHFT 40
-#define SH_JTAG_CONFIG_FSB_CONFIG_IOQ_DEPTH_MASK 0x0000010000000000
-
-/* SH_JTAG_CONFIG_FSB_CONFIG_SAMPLE_BINIT */
-/* Description: Enable sampling of BINIT */
-#define SH_JTAG_CONFIG_FSB_CONFIG_SAMPLE_BINIT_SHFT 41
-#define SH_JTAG_CONFIG_FSB_CONFIG_SAMPLE_BINIT_MASK 0x0000020000000000
-
-/* SH_JTAG_CONFIG_FSB_CONFIG_ENABLE_BUS_PARKING */
-#define SH_JTAG_CONFIG_FSB_CONFIG_ENABLE_BUS_PARKING_SHFT 42
-#define SH_JTAG_CONFIG_FSB_CONFIG_ENABLE_BUS_PARKING_MASK 0x0000040000000000
-
-/* SH_JTAG_CONFIG_FSB_CONFIG_CLOCK_RATIO */
-#define SH_JTAG_CONFIG_FSB_CONFIG_CLOCK_RATIO_SHFT 43
-#define SH_JTAG_CONFIG_FSB_CONFIG_CLOCK_RATIO_MASK 0x0000f80000000000
-
-/* SH_JTAG_CONFIG_FSB_CONFIG_OUTPUT_TRISTATE */
-/* Description: Output tristate control */
-#define SH_JTAG_CONFIG_FSB_CONFIG_OUTPUT_TRISTATE_SHFT 48
-#define SH_JTAG_CONFIG_FSB_CONFIG_OUTPUT_TRISTATE_MASK 0x000f000000000000
-
-/* SH_JTAG_CONFIG_FSB_CONFIG_ENABLE_BIST */
-/* Description: Enables BIST */
-#define SH_JTAG_CONFIG_FSB_CONFIG_ENABLE_BIST_SHFT 52
-#define SH_JTAG_CONFIG_FSB_CONFIG_ENABLE_BIST_MASK 0x0010000000000000
-
-/* SH_JTAG_CONFIG_FSB_CONFIG_AUX */
-/* Description: Enables BIST */
-#define SH_JTAG_CONFIG_FSB_CONFIG_AUX_SHFT 53
-#define SH_JTAG_CONFIG_FSB_CONFIG_AUX_MASK 0x0060000000000000
-
-/* SH_JTAG_CONFIG_GTL_CONFIG_RE */
-/* Description: Reference Enable selection for GTL io */
-#define SH_JTAG_CONFIG_GTL_CONFIG_RE_SHFT 55
-#define SH_JTAG_CONFIG_GTL_CONFIG_RE_MASK 0x0080000000000000
-
-/* ==================================================================== */
-/* Register "SH_SHUB_ID" */
-/* SHub ID Number */
-/* ==================================================================== */
-
-#define SH_SHUB_ID 0x0000000110060580
-#define SH_SHUB_ID_MASK 0x011f37ffffffffff
-#define SH_SHUB_ID_INIT 0x0010300000000000
-
-/* SH_SHUB_ID_FORCE1 */
-/* Description: Must be 1 */
-#define SH_SHUB_ID_FORCE1_SHFT 0
-#define SH_SHUB_ID_FORCE1_MASK 0x0000000000000001
-
-/* SH_SHUB_ID_MANUFACTURER */
-/* Description: Manufacturer */
-#define SH_SHUB_ID_MANUFACTURER_SHFT 1
-#define SH_SHUB_ID_MANUFACTURER_MASK 0x0000000000000ffe
-
-/* SH_SHUB_ID_PART_NUMBER */
-/* Description: Part Number */
-#define SH_SHUB_ID_PART_NUMBER_SHFT 12
-#define SH_SHUB_ID_PART_NUMBER_MASK 0x000000000ffff000
-
-/* SH_SHUB_ID_REVISION */
-/* Description: Revision */
-#define SH_SHUB_ID_REVISION_SHFT 28
-#define SH_SHUB_ID_REVISION_MASK 0x00000000f0000000
-
-/* SH_SHUB_ID_NODE_ID */
-/* Description: Node Identification */
-#define SH_SHUB_ID_NODE_ID_SHFT 32
-#define SH_SHUB_ID_NODE_ID_MASK 0x000007ff00000000
-
-/* SH_SHUB_ID_SHARING_MODE */
-/* Description: Sharing mode (Coherency Domain Size) */
-#define SH_SHUB_ID_SHARING_MODE_SHFT 44
-#define SH_SHUB_ID_SHARING_MODE_MASK 0x0000300000000000
-
-/* SH_SHUB_ID_NODES_PER_BIT */
-/* Description: Nodes per bit definition for MMR access */
-#define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
-#define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000
-
-/* SH_SHUB_ID_NI_PORT */
-/* Description: NI port of vector reference, 0 = NI0, 1 = NI1 */
-#define SH_SHUB_ID_NI_PORT_SHFT 56
-#define SH_SHUB_ID_NI_PORT_MASK 0x0100000000000000
-
-/* ==================================================================== */
-/* Register "SH_SHUBS_PRESENT0" */
-/* Shubs 0 - 63 Present. Used for invalidate generation */
-/* ==================================================================== */
-
-#define SH_SHUBS_PRESENT0 0x0000000110060600
-#define SH_SHUBS_PRESENT0_MASK 0xffffffffffffffff
-#define SH_SHUBS_PRESENT0_INIT 0xffffffffffffffff
-
-/* SH_SHUBS_PRESENT0_SHUBS_PRESENT0 */
-/* Description: Shubs 0 - 63 Present configuration */
-#define SH_SHUBS_PRESENT0_SHUBS_PRESENT0_SHFT 0
-#define SH_SHUBS_PRESENT0_SHUBS_PRESENT0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_SHUBS_PRESENT1" */
-/* Shubs 64 - 127 Present. Used for invalidate generation */
-/* ==================================================================== */
-
-#define SH_SHUBS_PRESENT1 0x0000000110060680
-#define SH_SHUBS_PRESENT1_MASK 0xffffffffffffffff
-#define SH_SHUBS_PRESENT1_INIT 0xffffffffffffffff
-
-/* SH_SHUBS_PRESENT1_SHUBS_PRESENT1 */
-/* Description: Shubs 64 - 127 Present configuration */
-#define SH_SHUBS_PRESENT1_SHUBS_PRESENT1_SHFT 0
-#define SH_SHUBS_PRESENT1_SHUBS_PRESENT1_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_SHUBS_PRESENT2" */
-/* Shubs 128 - 191 Present. Used for invalidate generation */
-/* ==================================================================== */
-
-#define SH_SHUBS_PRESENT2 0x0000000110060700
-#define SH_SHUBS_PRESENT2_MASK 0xffffffffffffffff
-#define SH_SHUBS_PRESENT2_INIT 0xffffffffffffffff
-
-/* SH_SHUBS_PRESENT2_SHUBS_PRESENT2 */
-/* Description: Shubs 128 - 191 Present configuration */
-#define SH_SHUBS_PRESENT2_SHUBS_PRESENT2_SHFT 0
-#define SH_SHUBS_PRESENT2_SHUBS_PRESENT2_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_SHUBS_PRESENT3" */
-/* Shubs 192 - 255 Present. Used for invalidate generation */
-/* ==================================================================== */
-
-#define SH_SHUBS_PRESENT3 0x0000000110060780
-#define SH_SHUBS_PRESENT3_MASK 0xffffffffffffffff
-#define SH_SHUBS_PRESENT3_INIT 0xffffffffffffffff
-
-/* SH_SHUBS_PRESENT3_SHUBS_PRESENT3 */
-/* Description: Shubs 192 - 255 Present configuration */
-#define SH_SHUBS_PRESENT3_SHUBS_PRESENT3_SHFT 0
-#define SH_SHUBS_PRESENT3_SHUBS_PRESENT3_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_SOFT_RESET" */
-/* SHub Soft Reset */
-/* ==================================================================== */
-
-#define SH_SOFT_RESET 0x0000000110060800
-#define SH_SOFT_RESET_MASK 0x0000000000000001
-#define SH_SOFT_RESET_INIT 0x0000000000000000
-
-/* SH_SOFT_RESET_SOFT_RESET */
-/* Description: Soft Reset */
-#define SH_SOFT_RESET_SOFT_RESET_SHFT 0
-#define SH_SOFT_RESET_SOFT_RESET_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_FIRST_ERROR" */
-/* Shub Global First Error Flags */
-/* ==================================================================== */
-
-#define SH_FIRST_ERROR 0x0000000110071000
-#define SH_FIRST_ERROR_MASK 0x000000000007ffff
-#define SH_FIRST_ERROR_INIT 0x0000000000000000
-
-/* SH_FIRST_ERROR_FIRST_ERROR */
-/* Description: Chiplet with first error */
-#define SH_FIRST_ERROR_FIRST_ERROR_SHFT 0
-#define SH_FIRST_ERROR_FIRST_ERROR_MASK 0x000000000007ffff
-
-/* ==================================================================== */
-/* Register "SH_II_HW_TIME_STAMP" */
-/* II hardware error time stamp */
-/* ==================================================================== */
-
-#define SH_II_HW_TIME_STAMP 0x0000000110071080
-#define SH_II_HW_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_II_HW_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_II_HW_TIME_STAMP_TIME */
-/* Description: II hardware error time stamp */
-#define SH_II_HW_TIME_STAMP_TIME_SHFT 0
-#define SH_II_HW_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_II_HW_TIME_STAMP_VALID */
-/* Description: II hardware error time stamp valid */
-#define SH_II_HW_TIME_STAMP_VALID_SHFT 63
-#define SH_II_HW_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_LB_HW_TIME_STAMP" */
-/* LB hardware error time stamp */
-/* ==================================================================== */
-
-#define SH_LB_HW_TIME_STAMP 0x0000000110071100
-#define SH_LB_HW_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_LB_HW_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_LB_HW_TIME_STAMP_TIME */
-/* Description: LB hardware error time stamp */
-#define SH_LB_HW_TIME_STAMP_TIME_SHFT 0
-#define SH_LB_HW_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_LB_HW_TIME_STAMP_VALID */
-/* Description: LB hardware error time stamp valid */
-#define SH_LB_HW_TIME_STAMP_VALID_SHFT 63
-#define SH_LB_HW_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_COR_TIME_STAMP" */
-/* MD correctable error time stamp */
-/* ==================================================================== */
-
-#define SH_MD_COR_TIME_STAMP 0x0000000110071180
-#define SH_MD_COR_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_MD_COR_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_MD_COR_TIME_STAMP_TIME */
-/* Description: MD correctable error time stamp */
-#define SH_MD_COR_TIME_STAMP_TIME_SHFT 0
-#define SH_MD_COR_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_MD_COR_TIME_STAMP_VALID */
-/* Description: MD correctable error time stamp valid */
-#define SH_MD_COR_TIME_STAMP_VALID_SHFT 63
-#define SH_MD_COR_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_HW_TIME_STAMP" */
-/* MD hardware error time stamp */
-/* ==================================================================== */
-
-#define SH_MD_HW_TIME_STAMP 0x0000000110071200
-#define SH_MD_HW_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_MD_HW_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_MD_HW_TIME_STAMP_TIME */
-/* Description: MD hardware error time stamp */
-#define SH_MD_HW_TIME_STAMP_TIME_SHFT 0
-#define SH_MD_HW_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_MD_HW_TIME_STAMP_VALID */
-/* Description: MD hardware error time stamp valid */
-#define SH_MD_HW_TIME_STAMP_VALID_SHFT 63
-#define SH_MD_HW_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_UNCOR_TIME_STAMP" */
-/* MD uncorrectable error time stamp */
-/* ==================================================================== */
-
-#define SH_MD_UNCOR_TIME_STAMP 0x0000000110071280
-#define SH_MD_UNCOR_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_MD_UNCOR_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_MD_UNCOR_TIME_STAMP_TIME */
-/* Description: MD uncorrectable error time stamp */
-#define SH_MD_UNCOR_TIME_STAMP_TIME_SHFT 0
-#define SH_MD_UNCOR_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_MD_UNCOR_TIME_STAMP_VALID */
-/* Description: MD uncorrectable error time stamp valid */
-#define SH_MD_UNCOR_TIME_STAMP_VALID_SHFT 63
-#define SH_MD_UNCOR_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_COR_TIME_STAMP" */
-/* PI correctable error time stamp */
-/* ==================================================================== */
-
-#define SH_PI_COR_TIME_STAMP 0x0000000110071300
-#define SH_PI_COR_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_PI_COR_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_PI_COR_TIME_STAMP_TIME */
-/* Description: PI correctable error time stamp */
-#define SH_PI_COR_TIME_STAMP_TIME_SHFT 0
-#define SH_PI_COR_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_PI_COR_TIME_STAMP_VALID */
-/* Description: PI correctable error time stamp valid */
-#define SH_PI_COR_TIME_STAMP_VALID_SHFT 63
-#define SH_PI_COR_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_HW_TIME_STAMP" */
-/* PI hardware error time stamp */
-/* ==================================================================== */
-
-#define SH_PI_HW_TIME_STAMP 0x0000000110071380
-#define SH_PI_HW_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_PI_HW_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_PI_HW_TIME_STAMP_TIME */
-/* Description: PI hardware error time stamp */
-#define SH_PI_HW_TIME_STAMP_TIME_SHFT 0
-#define SH_PI_HW_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_PI_HW_TIME_STAMP_VALID */
-/* Description: PI hardware error time stamp valid */
-#define SH_PI_HW_TIME_STAMP_VALID_SHFT 63
-#define SH_PI_HW_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PI_UNCOR_TIME_STAMP" */
-/* PI uncorrectable error time stamp */
-/* ==================================================================== */
-
-#define SH_PI_UNCOR_TIME_STAMP 0x0000000110071400
-#define SH_PI_UNCOR_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_PI_UNCOR_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_PI_UNCOR_TIME_STAMP_TIME */
-/* Description: PI uncorrectable error time stamp */
-#define SH_PI_UNCOR_TIME_STAMP_TIME_SHFT 0
-#define SH_PI_UNCOR_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_PI_UNCOR_TIME_STAMP_VALID */
-/* Description: PI uncorrectable error time stamp valid */
-#define SH_PI_UNCOR_TIME_STAMP_VALID_SHFT 63
-#define SH_PI_UNCOR_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ADV_TIME_STAMP" */
-/* Proc 0 advisory time stamp */
-/* ==================================================================== */
-
-#define SH_PROC0_ADV_TIME_STAMP 0x0000000110071480
-#define SH_PROC0_ADV_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_PROC0_ADV_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_PROC0_ADV_TIME_STAMP_TIME */
-/* Description: Processor 0 advisory time stamp */
-#define SH_PROC0_ADV_TIME_STAMP_TIME_SHFT 0
-#define SH_PROC0_ADV_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_PROC0_ADV_TIME_STAMP_VALID */
-/* Description: Processor 0 advisory time stamp valid */
-#define SH_PROC0_ADV_TIME_STAMP_VALID_SHFT 63
-#define SH_PROC0_ADV_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ERR_TIME_STAMP" */
-/* Proc 0 error time stamp */
-/* ==================================================================== */
-
-#define SH_PROC0_ERR_TIME_STAMP 0x0000000110071500
-#define SH_PROC0_ERR_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_PROC0_ERR_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_PROC0_ERR_TIME_STAMP_TIME */
-/* Description: Processor 0 error time stamp */
-#define SH_PROC0_ERR_TIME_STAMP_TIME_SHFT 0
-#define SH_PROC0_ERR_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_PROC0_ERR_TIME_STAMP_VALID */
-/* Description: Processor 0 error time stamp valid */
-#define SH_PROC0_ERR_TIME_STAMP_VALID_SHFT 63
-#define SH_PROC0_ERR_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ADV_TIME_STAMP" */
-/* Proc 1 advisory time stamp */
-/* ==================================================================== */
-
-#define SH_PROC1_ADV_TIME_STAMP 0x0000000110071580
-#define SH_PROC1_ADV_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_PROC1_ADV_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_PROC1_ADV_TIME_STAMP_TIME */
-/* Description: Processor 1 advisory time stamp */
-#define SH_PROC1_ADV_TIME_STAMP_TIME_SHFT 0
-#define SH_PROC1_ADV_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_PROC1_ADV_TIME_STAMP_VALID */
-/* Description: Processor 1 advisory time stamp valid */
-#define SH_PROC1_ADV_TIME_STAMP_VALID_SHFT 63
-#define SH_PROC1_ADV_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ERR_TIME_STAMP" */
-/* Proc 1 error time stamp */
-/* ==================================================================== */
-
-#define SH_PROC1_ERR_TIME_STAMP 0x0000000110071600
-#define SH_PROC1_ERR_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_PROC1_ERR_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_PROC1_ERR_TIME_STAMP_TIME */
-/* Description: Processor 1 error time stamp */
-#define SH_PROC1_ERR_TIME_STAMP_TIME_SHFT 0
-#define SH_PROC1_ERR_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_PROC1_ERR_TIME_STAMP_VALID */
-/* Description: Processor 1 error time stamp valid */
-#define SH_PROC1_ERR_TIME_STAMP_VALID_SHFT 63
-#define SH_PROC1_ERR_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ADV_TIME_STAMP" */
-/* Proc 2 advisory time stamp */
-/* ==================================================================== */
-
-#define SH_PROC2_ADV_TIME_STAMP 0x0000000110071680
-#define SH_PROC2_ADV_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_PROC2_ADV_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_PROC2_ADV_TIME_STAMP_TIME */
-/* Description: Processor 2 advisory time stamp */
-#define SH_PROC2_ADV_TIME_STAMP_TIME_SHFT 0
-#define SH_PROC2_ADV_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_PROC2_ADV_TIME_STAMP_VALID */
-/* Description: Processor 2 advisory time stamp valid */
-#define SH_PROC2_ADV_TIME_STAMP_VALID_SHFT 63
-#define SH_PROC2_ADV_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ERR_TIME_STAMP" */
-/* Proc 2 error time stamp */
-/* ==================================================================== */
-
-#define SH_PROC2_ERR_TIME_STAMP 0x0000000110071700
-#define SH_PROC2_ERR_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_PROC2_ERR_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_PROC2_ERR_TIME_STAMP_TIME */
-/* Description: Processor 2 error time stamp */
-#define SH_PROC2_ERR_TIME_STAMP_TIME_SHFT 0
-#define SH_PROC2_ERR_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_PROC2_ERR_TIME_STAMP_VALID */
-/* Description: Processor 2 error time stamp valid */
-#define SH_PROC2_ERR_TIME_STAMP_VALID_SHFT 63
-#define SH_PROC2_ERR_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ADV_TIME_STAMP" */
-/* Proc 3 advisory time stamp */
-/* ==================================================================== */
-
-#define SH_PROC3_ADV_TIME_STAMP 0x0000000110071780
-#define SH_PROC3_ADV_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_PROC3_ADV_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_PROC3_ADV_TIME_STAMP_TIME */
-/* Description: Processor 3 advisory time stamp */
-#define SH_PROC3_ADV_TIME_STAMP_TIME_SHFT 0
-#define SH_PROC3_ADV_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_PROC3_ADV_TIME_STAMP_VALID */
-/* Description: Processor 3 advisory time stamp valid */
-#define SH_PROC3_ADV_TIME_STAMP_VALID_SHFT 63
-#define SH_PROC3_ADV_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ERR_TIME_STAMP" */
-/* Proc 3 error time stamp */
-/* ==================================================================== */
-
-#define SH_PROC3_ERR_TIME_STAMP 0x0000000110071800
-#define SH_PROC3_ERR_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_PROC3_ERR_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_PROC3_ERR_TIME_STAMP_TIME */
-/* Description: Processor 3 error time stamp */
-#define SH_PROC3_ERR_TIME_STAMP_TIME_SHFT 0
-#define SH_PROC3_ERR_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_PROC3_ERR_TIME_STAMP_VALID */
-/* Description: Processor 3 error time stamp valid */
-#define SH_PROC3_ERR_TIME_STAMP_VALID_SHFT 63
-#define SH_PROC3_ERR_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_COR_TIME_STAMP" */
-/* XN correctable error time stamp */
-/* ==================================================================== */
-
-#define SH_XN_COR_TIME_STAMP 0x0000000110071880
-#define SH_XN_COR_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_XN_COR_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_XN_COR_TIME_STAMP_TIME */
-/* Description: XN correctable error time stamp */
-#define SH_XN_COR_TIME_STAMP_TIME_SHFT 0
-#define SH_XN_COR_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_XN_COR_TIME_STAMP_VALID */
-/* Description: XN correctable error time stamp valid */
-#define SH_XN_COR_TIME_STAMP_VALID_SHFT 63
-#define SH_XN_COR_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_HW_TIME_STAMP" */
-/* XN hardware error time stamp */
-/* ==================================================================== */
-
-#define SH_XN_HW_TIME_STAMP 0x0000000110071900
-#define SH_XN_HW_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_XN_HW_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_XN_HW_TIME_STAMP_TIME */
-/* Description: XN hardware error time stamp */
-#define SH_XN_HW_TIME_STAMP_TIME_SHFT 0
-#define SH_XN_HW_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_XN_HW_TIME_STAMP_VALID */
-/* Description: XN hardware error time stamp valid */
-#define SH_XN_HW_TIME_STAMP_VALID_SHFT 63
-#define SH_XN_HW_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_XN_UNCOR_TIME_STAMP" */
-/* XN uncorrectable error time stamp */
-/* ==================================================================== */
-
-#define SH_XN_UNCOR_TIME_STAMP 0x0000000110071980
-#define SH_XN_UNCOR_TIME_STAMP_MASK 0xffffffffffffffff
-#define SH_XN_UNCOR_TIME_STAMP_INIT 0x0000000000000000
-
-/* SH_XN_UNCOR_TIME_STAMP_TIME */
-/* Description: XN uncorrectable error time stamp */
-#define SH_XN_UNCOR_TIME_STAMP_TIME_SHFT 0
-#define SH_XN_UNCOR_TIME_STAMP_TIME_MASK 0x7fffffffffffffff
-
-/* SH_XN_UNCOR_TIME_STAMP_VALID */
-/* Description: XN uncorrectable error time stamp valid */
-#define SH_XN_UNCOR_TIME_STAMP_VALID_SHFT 63
-#define SH_XN_UNCOR_TIME_STAMP_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_DEBUG_PORT" */
-/* SHub Debug Port */
-/* ==================================================================== */
-
-#define SH_DEBUG_PORT 0x0000000110072000
-#define SH_DEBUG_PORT_MASK 0x00000000ffffffff
-#define SH_DEBUG_PORT_INIT 0x0000000000000000
-
-/* SH_DEBUG_PORT_DEBUG_NIBBLE0 */
-/* Description: Debug port nibble 0 */
-#define SH_DEBUG_PORT_DEBUG_NIBBLE0_SHFT 0
-#define SH_DEBUG_PORT_DEBUG_NIBBLE0_MASK 0x000000000000000f
-
-/* SH_DEBUG_PORT_DEBUG_NIBBLE1 */
-/* Description: Debug port nibble 1 */
-#define SH_DEBUG_PORT_DEBUG_NIBBLE1_SHFT 4
-#define SH_DEBUG_PORT_DEBUG_NIBBLE1_MASK 0x00000000000000f0
-
-/* SH_DEBUG_PORT_DEBUG_NIBBLE2 */
-/* Description: Debug port nibble 2 */
-#define SH_DEBUG_PORT_DEBUG_NIBBLE2_SHFT 8
-#define SH_DEBUG_PORT_DEBUG_NIBBLE2_MASK 0x0000000000000f00
-
-/* SH_DEBUG_PORT_DEBUG_NIBBLE3 */
-/* Description: Debug port nibble 3 */
-#define SH_DEBUG_PORT_DEBUG_NIBBLE3_SHFT 12
-#define SH_DEBUG_PORT_DEBUG_NIBBLE3_MASK 0x000000000000f000
-
-/* SH_DEBUG_PORT_DEBUG_NIBBLE4 */
-/* Description: Debug port nibble 4 */
-#define SH_DEBUG_PORT_DEBUG_NIBBLE4_SHFT 16
-#define SH_DEBUG_PORT_DEBUG_NIBBLE4_MASK 0x00000000000f0000
-
-/* SH_DEBUG_PORT_DEBUG_NIBBLE5 */
-/* Description: Debug port nibble 5 */
-#define SH_DEBUG_PORT_DEBUG_NIBBLE5_SHFT 20
-#define SH_DEBUG_PORT_DEBUG_NIBBLE5_MASK 0x0000000000f00000
-
-/* SH_DEBUG_PORT_DEBUG_NIBBLE6 */
-/* Description: Debug port nibble 6 */
-#define SH_DEBUG_PORT_DEBUG_NIBBLE6_SHFT 24
-#define SH_DEBUG_PORT_DEBUG_NIBBLE6_MASK 0x000000000f000000
-
-/* SH_DEBUG_PORT_DEBUG_NIBBLE7 */
-/* Description: Debug port nibble 7 */
-#define SH_DEBUG_PORT_DEBUG_NIBBLE7_SHFT 28
-#define SH_DEBUG_PORT_DEBUG_NIBBLE7_MASK 0x00000000f0000000
-
-/* ==================================================================== */
-/* Register "SH_II_DEBUG_DATA" */
-/* II Debug Data */
-/* ==================================================================== */
-
-#define SH_II_DEBUG_DATA 0x0000000110072080
-#define SH_II_DEBUG_DATA_MASK 0x00000000ffffffff
-#define SH_II_DEBUG_DATA_INIT 0x0000000000000000
-
-/* SH_II_DEBUG_DATA_II_DATA */
-/* Description: II debug data */
-#define SH_II_DEBUG_DATA_II_DATA_SHFT 0
-#define SH_II_DEBUG_DATA_II_DATA_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_II_WRAP_DEBUG_DATA" */
-/* SHub II Wrapper Debug Data */
-/* ==================================================================== */
-
-#define SH_II_WRAP_DEBUG_DATA 0x0000000110072100
-#define SH_II_WRAP_DEBUG_DATA_MASK 0x00000000ffffffff
-#define SH_II_WRAP_DEBUG_DATA_INIT 0x0000000000000000
-
-/* SH_II_WRAP_DEBUG_DATA_II_WRAP_DATA */
-/* Description: II wrapper debug data */
-#define SH_II_WRAP_DEBUG_DATA_II_WRAP_DATA_SHFT 0
-#define SH_II_WRAP_DEBUG_DATA_II_WRAP_DATA_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_LB_DEBUG_DATA" */
-/* SHub LB Debug Data */
-/* ==================================================================== */
-
-#define SH_LB_DEBUG_DATA 0x0000000110072180
-#define SH_LB_DEBUG_DATA_MASK 0x00000000ffffffff
-#define SH_LB_DEBUG_DATA_INIT 0x0000000000000000
-
-/* SH_LB_DEBUG_DATA_LB_DATA */
-/* Description: LB debug data */
-#define SH_LB_DEBUG_DATA_LB_DATA_SHFT 0
-#define SH_LB_DEBUG_DATA_LB_DATA_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DEBUG_DATA" */
-/* SHub MD Debug Data */
-/* ==================================================================== */
-
-#define SH_MD_DEBUG_DATA 0x0000000110072200
-#define SH_MD_DEBUG_DATA_MASK 0x00000000ffffffff
-#define SH_MD_DEBUG_DATA_INIT 0x0000000000000000
-
-/* SH_MD_DEBUG_DATA_MD_DATA */
-/* Description: MD debug data */
-#define SH_MD_DEBUG_DATA_MD_DATA_SHFT 0
-#define SH_MD_DEBUG_DATA_MD_DATA_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_PI_DEBUG_DATA" */
-/* SHub PI Debug Data */
-/* ==================================================================== */
-
-#define SH_PI_DEBUG_DATA 0x0000000110072280
-#define SH_PI_DEBUG_DATA_MASK 0x00000000ffffffff
-#define SH_PI_DEBUG_DATA_INIT 0x0000000000000000
-
-/* SH_PI_DEBUG_DATA_PI_DATA */
-/* Description: PI Debug Data */
-#define SH_PI_DEBUG_DATA_PI_DATA_SHFT 0
-#define SH_PI_DEBUG_DATA_PI_DATA_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_XN_DEBUG_DATA" */
-/* SHub XN Debug Data */
-/* ==================================================================== */
-
-#define SH_XN_DEBUG_DATA 0x0000000110072300
-#define SH_XN_DEBUG_DATA_MASK 0x00000000ffffffff
-#define SH_XN_DEBUG_DATA_INIT 0x0000000000000000
-
-/* SH_XN_DEBUG_DATA_XN_DATA */
-/* Description: XN debug data */
-#define SH_XN_DEBUG_DATA_XN_DATA_SHFT 0
-#define SH_XN_DEBUG_DATA_XN_DATA_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_TSF_ARMED_STATE" */
-/* Trigger sequencing facility arm state */
-/* ==================================================================== */
-
-#define SH_TSF_ARMED_STATE 0x0000000110073000
-#define SH_TSF_ARMED_STATE_MASK 0x00000000000000ff
-#define SH_TSF_ARMED_STATE_INIT 0x0000000000000000
-
-/* SH_TSF_ARMED_STATE_STATE */
-/* Description: Trigger sequencing facility armed state */
-#define SH_TSF_ARMED_STATE_STATE_SHFT 0
-#define SH_TSF_ARMED_STATE_STATE_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_TSF_COUNTER_VALUE" */
-/* Trigger sequencing facility counter value */
-/* ==================================================================== */
-
-#define SH_TSF_COUNTER_VALUE 0x0000000110073080
-#define SH_TSF_COUNTER_VALUE_MASK 0xffffffffffffffff
-#define SH_TSF_COUNTER_VALUE_INIT 0x0000000000000000
-
-/* SH_TSF_COUNTER_VALUE_COUNT_32 */
-/* Description: Trigger sequencing facility counter 32 */
-#define SH_TSF_COUNTER_VALUE_COUNT_32_SHFT 0
-#define SH_TSF_COUNTER_VALUE_COUNT_32_MASK 0x00000000ffffffff
-
-/* SH_TSF_COUNTER_VALUE_COUNT_16 */
-/* Description: Trigger sequencing facility counter 16 */
-#define SH_TSF_COUNTER_VALUE_COUNT_16_SHFT 32
-#define SH_TSF_COUNTER_VALUE_COUNT_16_MASK 0x0000ffff00000000
-
-/* SH_TSF_COUNTER_VALUE_COUNT_8B */
-/* Description: Trigger sequencing facility counter 8b */
-#define SH_TSF_COUNTER_VALUE_COUNT_8B_SHFT 48
-#define SH_TSF_COUNTER_VALUE_COUNT_8B_MASK 0x00ff000000000000
-
-/* SH_TSF_COUNTER_VALUE_COUNT_8A */
-/* Description: Trigger sequencing facility counter 8a */
-#define SH_TSF_COUNTER_VALUE_COUNT_8A_SHFT 56
-#define SH_TSF_COUNTER_VALUE_COUNT_8A_MASK 0xff00000000000000
-
-/* ==================================================================== */
-/* Register "SH_TSF_TRIGGERED_STATE" */
-/* Trigger sequencing facility triggered state */
-/* ==================================================================== */
-
-#define SH_TSF_TRIGGERED_STATE 0x0000000110073100
-#define SH_TSF_TRIGGERED_STATE_MASK 0x00000000000000ff
-#define SH_TSF_TRIGGERED_STATE_INIT 0x0000000000000000
-
-/* SH_TSF_TRIGGERED_STATE_STATE */
-/* Description: Trigger sequencing facility triggered state */
-#define SH_TSF_TRIGGERED_STATE_STATE_SHFT 0
-#define SH_TSF_TRIGGERED_STATE_STATE_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_VEC_RDDATA" */
-/* Vector Reply Message Data */
-/* ==================================================================== */
-
-#define SH_VEC_RDDATA 0x0000000110074000
-#define SH_VEC_RDDATA_MASK 0xffffffffffffffff
-#define SH_VEC_RDDATA_INIT 0x0000000000000000
-
-/* SH_VEC_RDDATA_DATA */
-/* Description: Data */
-#define SH_VEC_RDDATA_DATA_SHFT 0
-#define SH_VEC_RDDATA_DATA_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_VEC_RETURN" */
-/* Vector Reply Message Return Route */
-/* ==================================================================== */
-
-#define SH_VEC_RETURN 0x0000000110074080
-#define SH_VEC_RETURN_MASK 0xffffffffffffffff
-#define SH_VEC_RETURN_INIT 0x0000000000000000
-
-/* SH_VEC_RETURN_ROUTE */
-/* Description: Route */
-#define SH_VEC_RETURN_ROUTE_SHFT 0
-#define SH_VEC_RETURN_ROUTE_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_VEC_STATUS" */
-/* Vector Reply Message Status */
-/* ==================================================================== */
-
-#define SH_VEC_STATUS 0x0000000110074100
-#define SH_VEC_STATUS_MASK 0xcfffffffffffffff
-#define SH_VEC_STATUS_INIT 0x0000000000000000
-
-/* SH_VEC_STATUS_TYPE */
-/* Description: Type */
-#define SH_VEC_STATUS_TYPE_SHFT 0
-#define SH_VEC_STATUS_TYPE_MASK 0x0000000000000007
-
-/* SH_VEC_STATUS_ADDRESS */
-/* Description: Address */
-#define SH_VEC_STATUS_ADDRESS_SHFT 3
-#define SH_VEC_STATUS_ADDRESS_MASK 0x00000007fffffff8
-
-/* SH_VEC_STATUS_PIO_ID */
-/* Description: PIO ID */
-#define SH_VEC_STATUS_PIO_ID_SHFT 35
-#define SH_VEC_STATUS_PIO_ID_MASK 0x00003ff800000000
-
-/* SH_VEC_STATUS_SOURCE */
-/* Description: Source */
-#define SH_VEC_STATUS_SOURCE_SHFT 46
-#define SH_VEC_STATUS_SOURCE_MASK 0x0fffc00000000000
-
-/* SH_VEC_STATUS_OVERRUN */
-/* Description: Overrun */
-#define SH_VEC_STATUS_OVERRUN_SHFT 62
-#define SH_VEC_STATUS_OVERRUN_MASK 0x4000000000000000
-
-/* SH_VEC_STATUS_STATUS_VALID */
-/* Description: Status_Valid */
-#define SH_VEC_STATUS_STATUS_VALID_SHFT 63
-#define SH_VEC_STATUS_STATUS_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_VEC_STATUS_ALIAS" */
-/* Vector Reply Message Status Alias */
-/* ==================================================================== */
-
-#define SH_VEC_STATUS_ALIAS 0x0000000110074108
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT0_CONTROL" */
-/* Performance Counter 0 Control */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNT0_CONTROL 0x0000000110080000
-#define SH_PERFORMANCE_COUNT0_CONTROL_MASK 0x000000000007ffff
-#define SH_PERFORMANCE_COUNT0_CONTROL_INIT 0x000000000000b8b8
-
-/* SH_PERFORMANCE_COUNT0_CONTROL_UP_STIMULUS */
-/* Description: Counter 0 up stimulus */
-#define SH_PERFORMANCE_COUNT0_CONTROL_UP_STIMULUS_SHFT 0
-#define SH_PERFORMANCE_COUNT0_CONTROL_UP_STIMULUS_MASK 0x000000000000001f
-
-/* SH_PERFORMANCE_COUNT0_CONTROL_UP_EVENT */
-/* Description: Counter 0 up event select (1-greater than, 0-equal) */
-#define SH_PERFORMANCE_COUNT0_CONTROL_UP_EVENT_SHFT 5
-#define SH_PERFORMANCE_COUNT0_CONTROL_UP_EVENT_MASK 0x0000000000000020
-
-/* SH_PERFORMANCE_COUNT0_CONTROL_UP_POLARITY */
-/* Description: Counter 0 up polarity select (1-negative edge, 0-po */
-/* sitive edge) */
-#define SH_PERFORMANCE_COUNT0_CONTROL_UP_POLARITY_SHFT 6
-#define SH_PERFORMANCE_COUNT0_CONTROL_UP_POLARITY_MASK 0x0000000000000040
-
-/* SH_PERFORMANCE_COUNT0_CONTROL_UP_MODE */
-/* Description: Counter 0 up mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT0_CONTROL_UP_MODE_SHFT 7
-#define SH_PERFORMANCE_COUNT0_CONTROL_UP_MODE_MASK 0x0000000000000080
-
-/* SH_PERFORMANCE_COUNT0_CONTROL_DN_STIMULUS */
-/* Description: Counter 0 down stimulus */
-#define SH_PERFORMANCE_COUNT0_CONTROL_DN_STIMULUS_SHFT 8
-#define SH_PERFORMANCE_COUNT0_CONTROL_DN_STIMULUS_MASK 0x0000000000001f00
-
-/* SH_PERFORMANCE_COUNT0_CONTROL_DN_EVENT */
-/* Description: Counter 0 down event select (1-greater than, 0-equa */
-#define SH_PERFORMANCE_COUNT0_CONTROL_DN_EVENT_SHFT 13
-#define SH_PERFORMANCE_COUNT0_CONTROL_DN_EVENT_MASK 0x0000000000002000
-
-/* SH_PERFORMANCE_COUNT0_CONTROL_DN_POLARITY */
-/* Description: Counter 0 down polarity select (1-negative edge, 0- */
-/* positive edge) */
-#define SH_PERFORMANCE_COUNT0_CONTROL_DN_POLARITY_SHFT 14
-#define SH_PERFORMANCE_COUNT0_CONTROL_DN_POLARITY_MASK 0x0000000000004000
-
-/* SH_PERFORMANCE_COUNT0_CONTROL_DN_MODE */
-/* Description: Counter 0 down mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT0_CONTROL_DN_MODE_SHFT 15
-#define SH_PERFORMANCE_COUNT0_CONTROL_DN_MODE_MASK 0x0000000000008000
-
-/* SH_PERFORMANCE_COUNT0_CONTROL_INC_ENABLE */
-/* Description: Counter 0 enable increment */
-#define SH_PERFORMANCE_COUNT0_CONTROL_INC_ENABLE_SHFT 16
-#define SH_PERFORMANCE_COUNT0_CONTROL_INC_ENABLE_MASK 0x0000000000010000
-
-/* SH_PERFORMANCE_COUNT0_CONTROL_DEC_ENABLE */
-/* Description: Counter 0 enable decrement */
-#define SH_PERFORMANCE_COUNT0_CONTROL_DEC_ENABLE_SHFT 17
-#define SH_PERFORMANCE_COUNT0_CONTROL_DEC_ENABLE_MASK 0x0000000000020000
-
-/* SH_PERFORMANCE_COUNT0_CONTROL_PEAK_DET_ENABLE */
-/* Description: Counter 0 enable peak detection */
-#define SH_PERFORMANCE_COUNT0_CONTROL_PEAK_DET_ENABLE_SHFT 18
-#define SH_PERFORMANCE_COUNT0_CONTROL_PEAK_DET_ENABLE_MASK 0x0000000000040000
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT1_CONTROL" */
-/* Performance Counter 1 Control */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNT1_CONTROL 0x0000000110090000
-#define SH_PERFORMANCE_COUNT1_CONTROL_MASK 0x000000000007ffff
-#define SH_PERFORMANCE_COUNT1_CONTROL_INIT 0x000000000000b8b8
-
-/* SH_PERFORMANCE_COUNT1_CONTROL_UP_STIMULUS */
-/* Description: Counter 1 up stimulus */
-#define SH_PERFORMANCE_COUNT1_CONTROL_UP_STIMULUS_SHFT 0
-#define SH_PERFORMANCE_COUNT1_CONTROL_UP_STIMULUS_MASK 0x000000000000001f
-
-/* SH_PERFORMANCE_COUNT1_CONTROL_UP_EVENT */
-/* Description: Counter 1 up event select (1-greater than, 0-equal) */
-#define SH_PERFORMANCE_COUNT1_CONTROL_UP_EVENT_SHFT 5
-#define SH_PERFORMANCE_COUNT1_CONTROL_UP_EVENT_MASK 0x0000000000000020
-
-/* SH_PERFORMANCE_COUNT1_CONTROL_UP_POLARITY */
-/* Description: Counter 1 up polarity select (1-negative edge, 0-po */
-/* sitive edge) */
-#define SH_PERFORMANCE_COUNT1_CONTROL_UP_POLARITY_SHFT 6
-#define SH_PERFORMANCE_COUNT1_CONTROL_UP_POLARITY_MASK 0x0000000000000040
-
-/* SH_PERFORMANCE_COUNT1_CONTROL_UP_MODE */
-/* Description: Counter 1 up mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT1_CONTROL_UP_MODE_SHFT 7
-#define SH_PERFORMANCE_COUNT1_CONTROL_UP_MODE_MASK 0x0000000000000080
-
-/* SH_PERFORMANCE_COUNT1_CONTROL_DN_STIMULUS */
-/* Description: Counter 1 down stimulus */
-#define SH_PERFORMANCE_COUNT1_CONTROL_DN_STIMULUS_SHFT 8
-#define SH_PERFORMANCE_COUNT1_CONTROL_DN_STIMULUS_MASK 0x0000000000001f00
-
-/* SH_PERFORMANCE_COUNT1_CONTROL_DN_EVENT */
-/* Description: Counter 1 down event select (1-greater than, 0-equa */
-#define SH_PERFORMANCE_COUNT1_CONTROL_DN_EVENT_SHFT 13
-#define SH_PERFORMANCE_COUNT1_CONTROL_DN_EVENT_MASK 0x0000000000002000
-
-/* SH_PERFORMANCE_COUNT1_CONTROL_DN_POLARITY */
-/* Description: Counter 1 down polarity select (1-negative edge, 0- */
-/* positive edge) */
-#define SH_PERFORMANCE_COUNT1_CONTROL_DN_POLARITY_SHFT 14
-#define SH_PERFORMANCE_COUNT1_CONTROL_DN_POLARITY_MASK 0x0000000000004000
-
-/* SH_PERFORMANCE_COUNT1_CONTROL_DN_MODE */
-/* Description: Counter 1 down mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT1_CONTROL_DN_MODE_SHFT 15
-#define SH_PERFORMANCE_COUNT1_CONTROL_DN_MODE_MASK 0x0000000000008000
-
-/* SH_PERFORMANCE_COUNT1_CONTROL_INC_ENABLE */
-/* Description: Counter 1 enable increment */
-#define SH_PERFORMANCE_COUNT1_CONTROL_INC_ENABLE_SHFT 16
-#define SH_PERFORMANCE_COUNT1_CONTROL_INC_ENABLE_MASK 0x0000000000010000
-
-/* SH_PERFORMANCE_COUNT1_CONTROL_DEC_ENABLE */
-/* Description: Counter 1 enable decrement */
-#define SH_PERFORMANCE_COUNT1_CONTROL_DEC_ENABLE_SHFT 17
-#define SH_PERFORMANCE_COUNT1_CONTROL_DEC_ENABLE_MASK 0x0000000000020000
-
-/* SH_PERFORMANCE_COUNT1_CONTROL_PEAK_DET_ENABLE */
-/* Description: Counter 1 enable peak detection */
-#define SH_PERFORMANCE_COUNT1_CONTROL_PEAK_DET_ENABLE_SHFT 18
-#define SH_PERFORMANCE_COUNT1_CONTROL_PEAK_DET_ENABLE_MASK 0x0000000000040000
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT2_CONTROL" */
-/* Performance Counter 2 Control */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNT2_CONTROL 0x00000001100a0000
-#define SH_PERFORMANCE_COUNT2_CONTROL_MASK 0x000000000007ffff
-#define SH_PERFORMANCE_COUNT2_CONTROL_INIT 0x000000000000b8b8
-
-/* SH_PERFORMANCE_COUNT2_CONTROL_UP_STIMULUS */
-/* Description: Counter 2 up stimulus */
-#define SH_PERFORMANCE_COUNT2_CONTROL_UP_STIMULUS_SHFT 0
-#define SH_PERFORMANCE_COUNT2_CONTROL_UP_STIMULUS_MASK 0x000000000000001f
-
-/* SH_PERFORMANCE_COUNT2_CONTROL_UP_EVENT */
-/* Description: Counter 2 up event select (1-greater than, 0-equal) */
-#define SH_PERFORMANCE_COUNT2_CONTROL_UP_EVENT_SHFT 5
-#define SH_PERFORMANCE_COUNT2_CONTROL_UP_EVENT_MASK 0x0000000000000020
-
-/* SH_PERFORMANCE_COUNT2_CONTROL_UP_POLARITY */
-/* Description: Counter 2 up polarity select (1-negative edge, 0-po */
-/* sitive edge) */
-#define SH_PERFORMANCE_COUNT2_CONTROL_UP_POLARITY_SHFT 6
-#define SH_PERFORMANCE_COUNT2_CONTROL_UP_POLARITY_MASK 0x0000000000000040
-
-/* SH_PERFORMANCE_COUNT2_CONTROL_UP_MODE */
-/* Description: Counter 2 up mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT2_CONTROL_UP_MODE_SHFT 7
-#define SH_PERFORMANCE_COUNT2_CONTROL_UP_MODE_MASK 0x0000000000000080
-
-/* SH_PERFORMANCE_COUNT2_CONTROL_DN_STIMULUS */
-/* Description: Counter 2 down stimulus */
-#define SH_PERFORMANCE_COUNT2_CONTROL_DN_STIMULUS_SHFT 8
-#define SH_PERFORMANCE_COUNT2_CONTROL_DN_STIMULUS_MASK 0x0000000000001f00
-
-/* SH_PERFORMANCE_COUNT2_CONTROL_DN_EVENT */
-/* Description: Counter 2 down event select (1-greater than, 0-equa */
-#define SH_PERFORMANCE_COUNT2_CONTROL_DN_EVENT_SHFT 13
-#define SH_PERFORMANCE_COUNT2_CONTROL_DN_EVENT_MASK 0x0000000000002000
-
-/* SH_PERFORMANCE_COUNT2_CONTROL_DN_POLARITY */
-/* Description: Counter 2 down polarity select (1-negative edge, 0- */
-/* positive edge) */
-#define SH_PERFORMANCE_COUNT2_CONTROL_DN_POLARITY_SHFT 14
-#define SH_PERFORMANCE_COUNT2_CONTROL_DN_POLARITY_MASK 0x0000000000004000
-
-/* SH_PERFORMANCE_COUNT2_CONTROL_DN_MODE */
-/* Description: Counter 2 down mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT2_CONTROL_DN_MODE_SHFT 15
-#define SH_PERFORMANCE_COUNT2_CONTROL_DN_MODE_MASK 0x0000000000008000
-
-/* SH_PERFORMANCE_COUNT2_CONTROL_INC_ENABLE */
-/* Description: Counter 2 enable increment */
-#define SH_PERFORMANCE_COUNT2_CONTROL_INC_ENABLE_SHFT 16
-#define SH_PERFORMANCE_COUNT2_CONTROL_INC_ENABLE_MASK 0x0000000000010000
-
-/* SH_PERFORMANCE_COUNT2_CONTROL_DEC_ENABLE */
-/* Description: Counter 2 enable decrement */
-#define SH_PERFORMANCE_COUNT2_CONTROL_DEC_ENABLE_SHFT 17
-#define SH_PERFORMANCE_COUNT2_CONTROL_DEC_ENABLE_MASK 0x0000000000020000
-
-/* SH_PERFORMANCE_COUNT2_CONTROL_PEAK_DET_ENABLE */
-/* Description: Counter 2 enable peak detection */
-#define SH_PERFORMANCE_COUNT2_CONTROL_PEAK_DET_ENABLE_SHFT 18
-#define SH_PERFORMANCE_COUNT2_CONTROL_PEAK_DET_ENABLE_MASK 0x0000000000040000
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT3_CONTROL" */
-/* Performance Counter 3 Control */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNT3_CONTROL 0x00000001100b0000
-#define SH_PERFORMANCE_COUNT3_CONTROL_MASK 0x000000000007ffff
-#define SH_PERFORMANCE_COUNT3_CONTROL_INIT 0x000000000000b8b8
-
-/* SH_PERFORMANCE_COUNT3_CONTROL_UP_STIMULUS */
-/* Description: Counter 3 up stimulus */
-#define SH_PERFORMANCE_COUNT3_CONTROL_UP_STIMULUS_SHFT 0
-#define SH_PERFORMANCE_COUNT3_CONTROL_UP_STIMULUS_MASK 0x000000000000001f
-
-/* SH_PERFORMANCE_COUNT3_CONTROL_UP_EVENT */
-/* Description: Counter 3 up event select (1-greater than, 0-equal) */
-#define SH_PERFORMANCE_COUNT3_CONTROL_UP_EVENT_SHFT 5
-#define SH_PERFORMANCE_COUNT3_CONTROL_UP_EVENT_MASK 0x0000000000000020
-
-/* SH_PERFORMANCE_COUNT3_CONTROL_UP_POLARITY */
-/* Description: Counter 3 up polarity select (1-negative edge, 0-po */
-/* sitive edge) */
-#define SH_PERFORMANCE_COUNT3_CONTROL_UP_POLARITY_SHFT 6
-#define SH_PERFORMANCE_COUNT3_CONTROL_UP_POLARITY_MASK 0x0000000000000040
-
-/* SH_PERFORMANCE_COUNT3_CONTROL_UP_MODE */
-/* Description: Counter 3 up mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT3_CONTROL_UP_MODE_SHFT 7
-#define SH_PERFORMANCE_COUNT3_CONTROL_UP_MODE_MASK 0x0000000000000080
-
-/* SH_PERFORMANCE_COUNT3_CONTROL_DN_STIMULUS */
-/* Description: Counter 3 down stimulus */
-#define SH_PERFORMANCE_COUNT3_CONTROL_DN_STIMULUS_SHFT 8
-#define SH_PERFORMANCE_COUNT3_CONTROL_DN_STIMULUS_MASK 0x0000000000001f00
-
-/* SH_PERFORMANCE_COUNT3_CONTROL_DN_EVENT */
-/* Description: Counter 3 down event select (1-greater than, 0-equa */
-#define SH_PERFORMANCE_COUNT3_CONTROL_DN_EVENT_SHFT 13
-#define SH_PERFORMANCE_COUNT3_CONTROL_DN_EVENT_MASK 0x0000000000002000
-
-/* SH_PERFORMANCE_COUNT3_CONTROL_DN_POLARITY */
-/* Description: Counter 3 down polarity select (1-negative edge, 0- */
-/* positive edge) */
-#define SH_PERFORMANCE_COUNT3_CONTROL_DN_POLARITY_SHFT 14
-#define SH_PERFORMANCE_COUNT3_CONTROL_DN_POLARITY_MASK 0x0000000000004000
-
-/* SH_PERFORMANCE_COUNT3_CONTROL_DN_MODE */
-/* Description: Counter 3 down mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT3_CONTROL_DN_MODE_SHFT 15
-#define SH_PERFORMANCE_COUNT3_CONTROL_DN_MODE_MASK 0x0000000000008000
-
-/* SH_PERFORMANCE_COUNT3_CONTROL_INC_ENABLE */
-/* Description: Counter 3 enable increment */
-#define SH_PERFORMANCE_COUNT3_CONTROL_INC_ENABLE_SHFT 16
-#define SH_PERFORMANCE_COUNT3_CONTROL_INC_ENABLE_MASK 0x0000000000010000
-
-/* SH_PERFORMANCE_COUNT3_CONTROL_DEC_ENABLE */
-/* Description: Counter 3 enable decrement */
-#define SH_PERFORMANCE_COUNT3_CONTROL_DEC_ENABLE_SHFT 17
-#define SH_PERFORMANCE_COUNT3_CONTROL_DEC_ENABLE_MASK 0x0000000000020000
-
-/* SH_PERFORMANCE_COUNT3_CONTROL_PEAK_DET_ENABLE */
-/* Description: Counter 3 enable peak detection */
-#define SH_PERFORMANCE_COUNT3_CONTROL_PEAK_DET_ENABLE_SHFT 18
-#define SH_PERFORMANCE_COUNT3_CONTROL_PEAK_DET_ENABLE_MASK 0x0000000000040000
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT4_CONTROL" */
-/* Performance Counter 4 Control */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNT4_CONTROL 0x00000001100c0000
-#define SH_PERFORMANCE_COUNT4_CONTROL_MASK 0x000000000007ffff
-#define SH_PERFORMANCE_COUNT4_CONTROL_INIT 0x000000000000b8b8
-
-/* SH_PERFORMANCE_COUNT4_CONTROL_UP_STIMULUS */
-/* Description: Counter 4 up stimulus */
-#define SH_PERFORMANCE_COUNT4_CONTROL_UP_STIMULUS_SHFT 0
-#define SH_PERFORMANCE_COUNT4_CONTROL_UP_STIMULUS_MASK 0x000000000000001f
-
-/* SH_PERFORMANCE_COUNT4_CONTROL_UP_EVENT */
-/* Description: Counter 4 up event select (1-greater than, 0-equal) */
-#define SH_PERFORMANCE_COUNT4_CONTROL_UP_EVENT_SHFT 5
-#define SH_PERFORMANCE_COUNT4_CONTROL_UP_EVENT_MASK 0x0000000000000020
-
-/* SH_PERFORMANCE_COUNT4_CONTROL_UP_POLARITY */
-/* Description: Counter 4 up polarity select (1-negative edge, 0-po */
-/* sitive edge) */
-#define SH_PERFORMANCE_COUNT4_CONTROL_UP_POLARITY_SHFT 6
-#define SH_PERFORMANCE_COUNT4_CONTROL_UP_POLARITY_MASK 0x0000000000000040
-
-/* SH_PERFORMANCE_COUNT4_CONTROL_UP_MODE */
-/* Description: Counter 4 up mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT4_CONTROL_UP_MODE_SHFT 7
-#define SH_PERFORMANCE_COUNT4_CONTROL_UP_MODE_MASK 0x0000000000000080
-
-/* SH_PERFORMANCE_COUNT4_CONTROL_DN_STIMULUS */
-/* Description: Counter 4 down stimulus */
-#define SH_PERFORMANCE_COUNT4_CONTROL_DN_STIMULUS_SHFT 8
-#define SH_PERFORMANCE_COUNT4_CONTROL_DN_STIMULUS_MASK 0x0000000000001f00
-
-/* SH_PERFORMANCE_COUNT4_CONTROL_DN_EVENT */
-/* Description: Counter 4 down event select (1-greater than, 0-equa */
-#define SH_PERFORMANCE_COUNT4_CONTROL_DN_EVENT_SHFT 13
-#define SH_PERFORMANCE_COUNT4_CONTROL_DN_EVENT_MASK 0x0000000000002000
-
-/* SH_PERFORMANCE_COUNT4_CONTROL_DN_POLARITY */
-/* Description: Counter 4 down polarity select (1-negative edge, 0- */
-/* positive edge) */
-#define SH_PERFORMANCE_COUNT4_CONTROL_DN_POLARITY_SHFT 14
-#define SH_PERFORMANCE_COUNT4_CONTROL_DN_POLARITY_MASK 0x0000000000004000
-
-/* SH_PERFORMANCE_COUNT4_CONTROL_DN_MODE */
-/* Description: Counter 4 down mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT4_CONTROL_DN_MODE_SHFT 15
-#define SH_PERFORMANCE_COUNT4_CONTROL_DN_MODE_MASK 0x0000000000008000
-
-/* SH_PERFORMANCE_COUNT4_CONTROL_INC_ENABLE */
-/* Description: Counter 4 enable increment */
-#define SH_PERFORMANCE_COUNT4_CONTROL_INC_ENABLE_SHFT 16
-#define SH_PERFORMANCE_COUNT4_CONTROL_INC_ENABLE_MASK 0x0000000000010000
-
-/* SH_PERFORMANCE_COUNT4_CONTROL_DEC_ENABLE */
-/* Description: Counter 4 enable decrement */
-#define SH_PERFORMANCE_COUNT4_CONTROL_DEC_ENABLE_SHFT 17
-#define SH_PERFORMANCE_COUNT4_CONTROL_DEC_ENABLE_MASK 0x0000000000020000
-
-/* SH_PERFORMANCE_COUNT4_CONTROL_PEAK_DET_ENABLE */
-/* Description: Counter 4 enable peak detection */
-#define SH_PERFORMANCE_COUNT4_CONTROL_PEAK_DET_ENABLE_SHFT 18
-#define SH_PERFORMANCE_COUNT4_CONTROL_PEAK_DET_ENABLE_MASK 0x0000000000040000
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT5_CONTROL" */
-/* Performance Counter 5 Control */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNT5_CONTROL 0x00000001100d0000
-#define SH_PERFORMANCE_COUNT5_CONTROL_MASK 0x000000000007ffff
-#define SH_PERFORMANCE_COUNT5_CONTROL_INIT 0x000000000000b8b8
-
-/* SH_PERFORMANCE_COUNT5_CONTROL_UP_STIMULUS */
-/* Description: Counter 5 up stimulus */
-#define SH_PERFORMANCE_COUNT5_CONTROL_UP_STIMULUS_SHFT 0
-#define SH_PERFORMANCE_COUNT5_CONTROL_UP_STIMULUS_MASK 0x000000000000001f
-
-/* SH_PERFORMANCE_COUNT5_CONTROL_UP_EVENT */
-/* Description: Counter 5 up event select (1-greater than, 0-equal) */
-#define SH_PERFORMANCE_COUNT5_CONTROL_UP_EVENT_SHFT 5
-#define SH_PERFORMANCE_COUNT5_CONTROL_UP_EVENT_MASK 0x0000000000000020
-
-/* SH_PERFORMANCE_COUNT5_CONTROL_UP_POLARITY */
-/* Description: Counter 5 up polarity select (1-negative edge, 0-po */
-/* sitive edge) */
-#define SH_PERFORMANCE_COUNT5_CONTROL_UP_POLARITY_SHFT 6
-#define SH_PERFORMANCE_COUNT5_CONTROL_UP_POLARITY_MASK 0x0000000000000040
-
-/* SH_PERFORMANCE_COUNT5_CONTROL_UP_MODE */
-/* Description: Counter 5 up mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT5_CONTROL_UP_MODE_SHFT 7
-#define SH_PERFORMANCE_COUNT5_CONTROL_UP_MODE_MASK 0x0000000000000080
-
-/* SH_PERFORMANCE_COUNT5_CONTROL_DN_STIMULUS */
-/* Description: Counter 5 down stimulus */
-#define SH_PERFORMANCE_COUNT5_CONTROL_DN_STIMULUS_SHFT 8
-#define SH_PERFORMANCE_COUNT5_CONTROL_DN_STIMULUS_MASK 0x0000000000001f00
-
-/* SH_PERFORMANCE_COUNT5_CONTROL_DN_EVENT */
-/* Description: Counter 5 down event select (1-greater than, 0-equa */
-#define SH_PERFORMANCE_COUNT5_CONTROL_DN_EVENT_SHFT 13
-#define SH_PERFORMANCE_COUNT5_CONTROL_DN_EVENT_MASK 0x0000000000002000
-
-/* SH_PERFORMANCE_COUNT5_CONTROL_DN_POLARITY */
-/* Description: Counter 5 down polarity select (1-negative edge, 0- */
-/* positive edge) */
-#define SH_PERFORMANCE_COUNT5_CONTROL_DN_POLARITY_SHFT 14
-#define SH_PERFORMANCE_COUNT5_CONTROL_DN_POLARITY_MASK 0x0000000000004000
-
-/* SH_PERFORMANCE_COUNT5_CONTROL_DN_MODE */
-/* Description: Counter 5 down mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT5_CONTROL_DN_MODE_SHFT 15
-#define SH_PERFORMANCE_COUNT5_CONTROL_DN_MODE_MASK 0x0000000000008000
-
-/* SH_PERFORMANCE_COUNT5_CONTROL_INC_ENABLE */
-/* Description: Counter 5 enable increment */
-#define SH_PERFORMANCE_COUNT5_CONTROL_INC_ENABLE_SHFT 16
-#define SH_PERFORMANCE_COUNT5_CONTROL_INC_ENABLE_MASK 0x0000000000010000
-
-/* SH_PERFORMANCE_COUNT5_CONTROL_DEC_ENABLE */
-/* Description: Counter 5 enable decrement */
-#define SH_PERFORMANCE_COUNT5_CONTROL_DEC_ENABLE_SHFT 17
-#define SH_PERFORMANCE_COUNT5_CONTROL_DEC_ENABLE_MASK 0x0000000000020000
-
-/* SH_PERFORMANCE_COUNT5_CONTROL_PEAK_DET_ENABLE */
-/* Description: Counter 5 enable peak detection */
-#define SH_PERFORMANCE_COUNT5_CONTROL_PEAK_DET_ENABLE_SHFT 18
-#define SH_PERFORMANCE_COUNT5_CONTROL_PEAK_DET_ENABLE_MASK 0x0000000000040000
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT6_CONTROL" */
-/* Performance Counter 6 Control */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNT6_CONTROL 0x00000001100e0000
-#define SH_PERFORMANCE_COUNT6_CONTROL_MASK 0x000000000007ffff
-#define SH_PERFORMANCE_COUNT6_CONTROL_INIT 0x000000000000b8b8
-
-/* SH_PERFORMANCE_COUNT6_CONTROL_UP_STIMULUS */
-/* Description: Counter 6 up stimulus */
-#define SH_PERFORMANCE_COUNT6_CONTROL_UP_STIMULUS_SHFT 0
-#define SH_PERFORMANCE_COUNT6_CONTROL_UP_STIMULUS_MASK 0x000000000000001f
-
-/* SH_PERFORMANCE_COUNT6_CONTROL_UP_EVENT */
-/* Description: Counter 6 up event select (1-greater than, 0-equal) */
-#define SH_PERFORMANCE_COUNT6_CONTROL_UP_EVENT_SHFT 5
-#define SH_PERFORMANCE_COUNT6_CONTROL_UP_EVENT_MASK 0x0000000000000020
-
-/* SH_PERFORMANCE_COUNT6_CONTROL_UP_POLARITY */
-/* Description: Counter 6 up polarity select (1-negative edge, 0-po */
-/* sitive edge) */
-#define SH_PERFORMANCE_COUNT6_CONTROL_UP_POLARITY_SHFT 6
-#define SH_PERFORMANCE_COUNT6_CONTROL_UP_POLARITY_MASK 0x0000000000000040
-
-/* SH_PERFORMANCE_COUNT6_CONTROL_UP_MODE */
-/* Description: Counter 6 up mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT6_CONTROL_UP_MODE_SHFT 7
-#define SH_PERFORMANCE_COUNT6_CONTROL_UP_MODE_MASK 0x0000000000000080
-
-/* SH_PERFORMANCE_COUNT6_CONTROL_DN_STIMULUS */
-/* Description: Counter 6 down stimulus */
-#define SH_PERFORMANCE_COUNT6_CONTROL_DN_STIMULUS_SHFT 8
-#define SH_PERFORMANCE_COUNT6_CONTROL_DN_STIMULUS_MASK 0x0000000000001f00
-
-/* SH_PERFORMANCE_COUNT6_CONTROL_DN_EVENT */
-/* Description: Counter 6 down event select (1-greater than, 0-equa */
-#define SH_PERFORMANCE_COUNT6_CONTROL_DN_EVENT_SHFT 13
-#define SH_PERFORMANCE_COUNT6_CONTROL_DN_EVENT_MASK 0x0000000000002000
-
-/* SH_PERFORMANCE_COUNT6_CONTROL_DN_POLARITY */
-/* Description: Counter 6 down polarity select (1-negative edge, 0- */
-/* positive edge) */
-#define SH_PERFORMANCE_COUNT6_CONTROL_DN_POLARITY_SHFT 14
-#define SH_PERFORMANCE_COUNT6_CONTROL_DN_POLARITY_MASK 0x0000000000004000
-
-/* SH_PERFORMANCE_COUNT6_CONTROL_DN_MODE */
-/* Description: Counter 6 down mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT6_CONTROL_DN_MODE_SHFT 15
-#define SH_PERFORMANCE_COUNT6_CONTROL_DN_MODE_MASK 0x0000000000008000
-
-/* SH_PERFORMANCE_COUNT6_CONTROL_INC_ENABLE */
-/* Description: Counter 6 enable increment */
-#define SH_PERFORMANCE_COUNT6_CONTROL_INC_ENABLE_SHFT 16
-#define SH_PERFORMANCE_COUNT6_CONTROL_INC_ENABLE_MASK 0x0000000000010000
-
-/* SH_PERFORMANCE_COUNT6_CONTROL_DEC_ENABLE */
-/* Description: Counter 6 enable decrement */
-#define SH_PERFORMANCE_COUNT6_CONTROL_DEC_ENABLE_SHFT 17
-#define SH_PERFORMANCE_COUNT6_CONTROL_DEC_ENABLE_MASK 0x0000000000020000
-
-/* SH_PERFORMANCE_COUNT6_CONTROL_PEAK_DET_ENABLE */
-/* Description: Counter 6 enable peak detection */
-#define SH_PERFORMANCE_COUNT6_CONTROL_PEAK_DET_ENABLE_SHFT 18
-#define SH_PERFORMANCE_COUNT6_CONTROL_PEAK_DET_ENABLE_MASK 0x0000000000040000
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT7_CONTROL" */
-/* Performance Counter 7 Control */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNT7_CONTROL 0x00000001100f0000
-#define SH_PERFORMANCE_COUNT7_CONTROL_MASK 0x000000000007ffff
-#define SH_PERFORMANCE_COUNT7_CONTROL_INIT 0x000000000000b8b8
-
-/* SH_PERFORMANCE_COUNT7_CONTROL_UP_STIMULUS */
-/* Description: Counter 7 up stimulus */
-#define SH_PERFORMANCE_COUNT7_CONTROL_UP_STIMULUS_SHFT 0
-#define SH_PERFORMANCE_COUNT7_CONTROL_UP_STIMULUS_MASK 0x000000000000001f
-
-/* SH_PERFORMANCE_COUNT7_CONTROL_UP_EVENT */
-/* Description: Counter 7 up event select (1-greater than, 0-equal) */
-#define SH_PERFORMANCE_COUNT7_CONTROL_UP_EVENT_SHFT 5
-#define SH_PERFORMANCE_COUNT7_CONTROL_UP_EVENT_MASK 0x0000000000000020
-
-/* SH_PERFORMANCE_COUNT7_CONTROL_UP_POLARITY */
-/* Description: Counter 7 up polarity select (1-negative edge, 0-po */
-/* sitive edge) */
-#define SH_PERFORMANCE_COUNT7_CONTROL_UP_POLARITY_SHFT 6
-#define SH_PERFORMANCE_COUNT7_CONTROL_UP_POLARITY_MASK 0x0000000000000040
-
-/* SH_PERFORMANCE_COUNT7_CONTROL_UP_MODE */
-/* Description: Counter 7 up mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT7_CONTROL_UP_MODE_SHFT 7
-#define SH_PERFORMANCE_COUNT7_CONTROL_UP_MODE_MASK 0x0000000000000080
-
-/* SH_PERFORMANCE_COUNT7_CONTROL_DN_STIMULUS */
-/* Description: Counter 7 down stimulus */
-#define SH_PERFORMANCE_COUNT7_CONTROL_DN_STIMULUS_SHFT 8
-#define SH_PERFORMANCE_COUNT7_CONTROL_DN_STIMULUS_MASK 0x0000000000001f00
-
-/* SH_PERFORMANCE_COUNT7_CONTROL_DN_EVENT */
-/* Description: Counter 7 down event select (1-greater than, 0-equa */
-#define SH_PERFORMANCE_COUNT7_CONTROL_DN_EVENT_SHFT 13
-#define SH_PERFORMANCE_COUNT7_CONTROL_DN_EVENT_MASK 0x0000000000002000
-
-/* SH_PERFORMANCE_COUNT7_CONTROL_DN_POLARITY */
-/* Description: Counter 7 down polarity select (1-negative edge, 0- */
-/* positive edge) */
-#define SH_PERFORMANCE_COUNT7_CONTROL_DN_POLARITY_SHFT 14
-#define SH_PERFORMANCE_COUNT7_CONTROL_DN_POLARITY_MASK 0x0000000000004000
-
-/* SH_PERFORMANCE_COUNT7_CONTROL_DN_MODE */
-/* Description: Counter 7 down mode select (1-internal, 0-external) */
-#define SH_PERFORMANCE_COUNT7_CONTROL_DN_MODE_SHFT 15
-#define SH_PERFORMANCE_COUNT7_CONTROL_DN_MODE_MASK 0x0000000000008000
-
-/* SH_PERFORMANCE_COUNT7_CONTROL_INC_ENABLE */
-/* Description: Counter 7 enable increment */
-#define SH_PERFORMANCE_COUNT7_CONTROL_INC_ENABLE_SHFT 16
-#define SH_PERFORMANCE_COUNT7_CONTROL_INC_ENABLE_MASK 0x0000000000010000
-
-/* SH_PERFORMANCE_COUNT7_CONTROL_DEC_ENABLE */
-/* Description: Counter 7 enable decrement */
-#define SH_PERFORMANCE_COUNT7_CONTROL_DEC_ENABLE_SHFT 17
-#define SH_PERFORMANCE_COUNT7_CONTROL_DEC_ENABLE_MASK 0x0000000000020000
-
-/* SH_PERFORMANCE_COUNT7_CONTROL_PEAK_DET_ENABLE */
-/* Description: Counter 7 enable peak detection */
-#define SH_PERFORMANCE_COUNT7_CONTROL_PEAK_DET_ENABLE_SHFT 18
-#define SH_PERFORMANCE_COUNT7_CONTROL_PEAK_DET_ENABLE_MASK 0x0000000000040000
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_DN_CONTROL" */
-/* Profile Counter Down Control */
-/* ==================================================================== */
-
-#define SH_PROFILE_DN_CONTROL 0x0000000110100000
-#define SH_PROFILE_DN_CONTROL_MASK 0x00000000000000ff
-#define SH_PROFILE_DN_CONTROL_INIT 0x00000000000000b8
-
-/* SH_PROFILE_DN_CONTROL_STIMULUS */
-/* Description: Counter stimulus */
-#define SH_PROFILE_DN_CONTROL_STIMULUS_SHFT 0
-#define SH_PROFILE_DN_CONTROL_STIMULUS_MASK 0x000000000000001f
-
-/* SH_PROFILE_DN_CONTROL_EVENT */
-/* Description: Counter event select (1-greater than, 0-equal) */
-#define SH_PROFILE_DN_CONTROL_EVENT_SHFT 5
-#define SH_PROFILE_DN_CONTROL_EVENT_MASK 0x0000000000000020
-
-/* SH_PROFILE_DN_CONTROL_POLARITY */
-/* Description: Counter polarity select (1-negative edge, 0-positiv */
-/* e edge) */
-#define SH_PROFILE_DN_CONTROL_POLARITY_SHFT 6
-#define SH_PROFILE_DN_CONTROL_POLARITY_MASK 0x0000000000000040
-
-/* SH_PROFILE_DN_CONTROL_MODE */
-/* Description: Counter mode select (1-internal, 0-external) */
-#define SH_PROFILE_DN_CONTROL_MODE_SHFT 7
-#define SH_PROFILE_DN_CONTROL_MODE_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_PEAK_CONTROL" */
-/* Profile Counter Peak Control */
-/* ==================================================================== */
-
-#define SH_PROFILE_PEAK_CONTROL 0x0000000110100080
-#define SH_PROFILE_PEAK_CONTROL_MASK 0x0000000000000068
-#define SH_PROFILE_PEAK_CONTROL_INIT 0x0000000000000060
-
-/* SH_PROFILE_PEAK_CONTROL_STIMULUS */
-/* Description: Counter stimulus */
-#define SH_PROFILE_PEAK_CONTROL_STIMULUS_SHFT 3
-#define SH_PROFILE_PEAK_CONTROL_STIMULUS_MASK 0x0000000000000008
-
-/* SH_PROFILE_PEAK_CONTROL_EVENT */
-/* Description: Counter event select (0-greater than, 1-equal) */
-#define SH_PROFILE_PEAK_CONTROL_EVENT_SHFT 5
-#define SH_PROFILE_PEAK_CONTROL_EVENT_MASK 0x0000000000000020
-
-/* SH_PROFILE_PEAK_CONTROL_POLARITY */
-/* Description: Counter polarity select (0-negative edge, 1-positiv */
-/* e edge) */
-#define SH_PROFILE_PEAK_CONTROL_POLARITY_SHFT 6
-#define SH_PROFILE_PEAK_CONTROL_POLARITY_MASK 0x0000000000000040
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_RANGE" */
-/* Profile Counter Range */
-/* ==================================================================== */
-
-#define SH_PROFILE_RANGE 0x0000000110100100
-#define SH_PROFILE_RANGE_MASK 0xffffffffffffffff
-#define SH_PROFILE_RANGE_INIT 0x0000000000000000
-
-/* SH_PROFILE_RANGE_RANGE0 */
-/* Description: Profiling range 0 */
-#define SH_PROFILE_RANGE_RANGE0_SHFT 0
-#define SH_PROFILE_RANGE_RANGE0_MASK 0x00000000000000ff
-
-/* SH_PROFILE_RANGE_RANGE1 */
-/* Description: Profiling range 1 */
-#define SH_PROFILE_RANGE_RANGE1_SHFT 8
-#define SH_PROFILE_RANGE_RANGE1_MASK 0x000000000000ff00
-
-/* SH_PROFILE_RANGE_RANGE2 */
-/* Description: Profiling range 2 */
-#define SH_PROFILE_RANGE_RANGE2_SHFT 16
-#define SH_PROFILE_RANGE_RANGE2_MASK 0x0000000000ff0000
-
-/* SH_PROFILE_RANGE_RANGE3 */
-/* Description: Profiling range 3 */
-#define SH_PROFILE_RANGE_RANGE3_SHFT 24
-#define SH_PROFILE_RANGE_RANGE3_MASK 0x00000000ff000000
-
-/* SH_PROFILE_RANGE_RANGE4 */
-/* Description: Profiling range 4 */
-#define SH_PROFILE_RANGE_RANGE4_SHFT 32
-#define SH_PROFILE_RANGE_RANGE4_MASK 0x000000ff00000000
-
-/* SH_PROFILE_RANGE_RANGE5 */
-/* Description: Profiling range 5 */
-#define SH_PROFILE_RANGE_RANGE5_SHFT 40
-#define SH_PROFILE_RANGE_RANGE5_MASK 0x0000ff0000000000
-
-/* SH_PROFILE_RANGE_RANGE6 */
-/* Description: Profiling range 6 */
-#define SH_PROFILE_RANGE_RANGE6_SHFT 48
-#define SH_PROFILE_RANGE_RANGE6_MASK 0x00ff000000000000
-
-/* SH_PROFILE_RANGE_RANGE7 */
-/* Description: Profiling range 7 */
-#define SH_PROFILE_RANGE_RANGE7_SHFT 56
-#define SH_PROFILE_RANGE_RANGE7_MASK 0xff00000000000000
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_UP_CONTROL" */
-/* Profile Counter Up Control */
-/* ==================================================================== */
-
-#define SH_PROFILE_UP_CONTROL 0x0000000110100180
-#define SH_PROFILE_UP_CONTROL_MASK 0x00000000000000ff
-#define SH_PROFILE_UP_CONTROL_INIT 0x00000000000000b8
-
-/* SH_PROFILE_UP_CONTROL_STIMULUS */
-/* Description: Counter stimulus */
-#define SH_PROFILE_UP_CONTROL_STIMULUS_SHFT 0
-#define SH_PROFILE_UP_CONTROL_STIMULUS_MASK 0x000000000000001f
-
-/* SH_PROFILE_UP_CONTROL_EVENT */
-/* Description: Counter event select (1-greater than, 0-equal) */
-#define SH_PROFILE_UP_CONTROL_EVENT_SHFT 5
-#define SH_PROFILE_UP_CONTROL_EVENT_MASK 0x0000000000000020
-
-/* SH_PROFILE_UP_CONTROL_POLARITY */
-/* Description: Counter polarity select (1-negative edge, 0-positiv */
-/* e edge) */
-#define SH_PROFILE_UP_CONTROL_POLARITY_SHFT 6
-#define SH_PROFILE_UP_CONTROL_POLARITY_MASK 0x0000000000000040
-
-/* SH_PROFILE_UP_CONTROL_MODE */
-/* Description: Counter mode select (1-internal, 0-external) */
-#define SH_PROFILE_UP_CONTROL_MODE_SHFT 7
-#define SH_PROFILE_UP_CONTROL_MODE_MASK 0x0000000000000080
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER0" */
-/* Performance Counter 0 */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNTER0 0x0000000110110000
-#define SH_PERFORMANCE_COUNTER0_MASK 0x00000000ffffffff
-#define SH_PERFORMANCE_COUNTER0_INIT 0x0000000000000000
-
-/* SH_PERFORMANCE_COUNTER0_COUNT */
-/* Description: Counter 0 */
-#define SH_PERFORMANCE_COUNTER0_COUNT_SHFT 0
-#define SH_PERFORMANCE_COUNTER0_COUNT_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER1" */
-/* Performance Counter 1 */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNTER1 0x0000000110120000
-#define SH_PERFORMANCE_COUNTER1_MASK 0x00000000ffffffff
-#define SH_PERFORMANCE_COUNTER1_INIT 0x0000000000000000
-
-/* SH_PERFORMANCE_COUNTER1_COUNT */
-/* Description: Counter 1 */
-#define SH_PERFORMANCE_COUNTER1_COUNT_SHFT 0
-#define SH_PERFORMANCE_COUNTER1_COUNT_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER2" */
-/* Performance Counter 2 */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNTER2 0x0000000110130000
-#define SH_PERFORMANCE_COUNTER2_MASK 0x00000000ffffffff
-#define SH_PERFORMANCE_COUNTER2_INIT 0x0000000000000000
-
-/* SH_PERFORMANCE_COUNTER2_COUNT */
-/* Description: Counter 2 */
-#define SH_PERFORMANCE_COUNTER2_COUNT_SHFT 0
-#define SH_PERFORMANCE_COUNTER2_COUNT_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER3" */
-/* Performance Counter 3 */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNTER3 0x0000000110140000
-#define SH_PERFORMANCE_COUNTER3_MASK 0x00000000ffffffff
-#define SH_PERFORMANCE_COUNTER3_INIT 0x0000000000000000
-
-/* SH_PERFORMANCE_COUNTER3_COUNT */
-/* Description: Counter 3 */
-#define SH_PERFORMANCE_COUNTER3_COUNT_SHFT 0
-#define SH_PERFORMANCE_COUNTER3_COUNT_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER4" */
-/* Performance Counter 4 */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNTER4 0x0000000110150000
-#define SH_PERFORMANCE_COUNTER4_MASK 0x00000000ffffffff
-#define SH_PERFORMANCE_COUNTER4_INIT 0x0000000000000000
-
-/* SH_PERFORMANCE_COUNTER4_COUNT */
-/* Description: Counter 4 */
-#define SH_PERFORMANCE_COUNTER4_COUNT_SHFT 0
-#define SH_PERFORMANCE_COUNTER4_COUNT_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER5" */
-/* Performance Counter 5 */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNTER5 0x0000000110160000
-#define SH_PERFORMANCE_COUNTER5_MASK 0x00000000ffffffff
-#define SH_PERFORMANCE_COUNTER5_INIT 0x0000000000000000
-
-/* SH_PERFORMANCE_COUNTER5_COUNT */
-/* Description: Counter 5 */
-#define SH_PERFORMANCE_COUNTER5_COUNT_SHFT 0
-#define SH_PERFORMANCE_COUNTER5_COUNT_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER6" */
-/* Performance Counter 6 */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNTER6 0x0000000110170000
-#define SH_PERFORMANCE_COUNTER6_MASK 0x00000000ffffffff
-#define SH_PERFORMANCE_COUNTER6_INIT 0x0000000000000000
-
-/* SH_PERFORMANCE_COUNTER6_COUNT */
-/* Description: Counter 6 */
-#define SH_PERFORMANCE_COUNTER6_COUNT_SHFT 0
-#define SH_PERFORMANCE_COUNTER6_COUNT_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER7" */
-/* Performance Counter 7 */
-/* ==================================================================== */
-
-#define SH_PERFORMANCE_COUNTER7 0x0000000110180000
-#define SH_PERFORMANCE_COUNTER7_MASK 0x00000000ffffffff
-#define SH_PERFORMANCE_COUNTER7_INIT 0x0000000000000000
-
-/* SH_PERFORMANCE_COUNTER7_COUNT */
-/* Description: Counter 7 */
-#define SH_PERFORMANCE_COUNTER7_COUNT_SHFT 0
-#define SH_PERFORMANCE_COUNTER7_COUNT_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_COUNTER" */
-/* Profile Counter */
-/* ==================================================================== */
-
-#define SH_PROFILE_COUNTER 0x0000000110190000
-#define SH_PROFILE_COUNTER_MASK 0x00000000000000ff
-#define SH_PROFILE_COUNTER_INIT 0x0000000000000000
-
-/* SH_PROFILE_COUNTER_COUNTER */
-/* Description: Counter Value */
-#define SH_PROFILE_COUNTER_COUNTER_SHFT 0
-#define SH_PROFILE_COUNTER_COUNTER_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_PEAK" */
-/* Profile Peak Counter */
-/* ==================================================================== */
-
-#define SH_PROFILE_PEAK 0x0000000110190080
-#define SH_PROFILE_PEAK_MASK 0x00000000000000ff
-#define SH_PROFILE_PEAK_INIT 0x0000000000000000
-
-/* SH_PROFILE_PEAK_COUNTER */
-/* Description: Counter Value */
-#define SH_PROFILE_PEAK_COUNTER_SHFT 0
-#define SH_PROFILE_PEAK_COUNTER_MASK 0x00000000000000ff
-
-/* ==================================================================== */
-/* Register "SH_PTC_0" */
-/* Puge Translation Cache Message Configuration Information */
-/* ==================================================================== */
-
-#define SH_PTC_0 0x00000001101a0000
-#define SH_PTC_0_MASK 0x80000000fffffffd
-#define SH_PTC_0_INIT 0x0000000000000000
-
-/* SH_PTC_0_A */
-/* Description: Type */
-#define SH_PTC_0_A_SHFT 0
-#define SH_PTC_0_A_MASK 0x0000000000000001
-
-/* SH_PTC_0_PS */
-/* Description: Page Size */
-#define SH_PTC_0_PS_SHFT 2
-#define SH_PTC_0_PS_MASK 0x00000000000000fc
-
-/* SH_PTC_0_RID */
-/* Description: Region ID */
-#define SH_PTC_0_RID_SHFT 8
-#define SH_PTC_0_RID_MASK 0x00000000ffffff00
-
-/* SH_PTC_0_START */
-/* Description: Start */
-#define SH_PTC_0_START_SHFT 63
-#define SH_PTC_0_START_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PTC_1" */
-/* Puge Translation Cache Message Configuration Information */
-/* ==================================================================== */
-
-#define SH_PTC_1 0x00000001101a0080
-#define SH_PTC_1_MASK 0x9ffffffffffff000
-#define SH_PTC_1_INIT 0x0000000000000000
-
-/* SH_PTC_1_VPN */
-/* Description: Virtual page number */
-#define SH_PTC_1_VPN_SHFT 12
-#define SH_PTC_1_VPN_MASK 0x1ffffffffffff000
-
-/* SH_PTC_1_START */
-/* Description: PTC_1 Start */
-#define SH_PTC_1_START_SHFT 63
-#define SH_PTC_1_START_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PTC_PARMS" */
-/* PTC Time-out parmaeters */
-/* ==================================================================== */
-
-#define SH_PTC_PARMS 0x00000001101a0100
-#define SH_PTC_PARMS_MASK 0x0000000fffffffff
-#define SH_PTC_PARMS_INIT 0x00000007ffffffff
-
-/* SH_PTC_PARMS_PTC_TO_WRAP */
-/* Description: PTC time-out period */
-#define SH_PTC_PARMS_PTC_TO_WRAP_SHFT 0
-#define SH_PTC_PARMS_PTC_TO_WRAP_MASK 0x0000000000ffffff
-
-/* SH_PTC_PARMS_PTC_TO_VAL */
-/* Description: PTC time-out valid */
-#define SH_PTC_PARMS_PTC_TO_VAL_SHFT 24
-#define SH_PTC_PARMS_PTC_TO_VAL_MASK 0x0000000fff000000
-
-/* ==================================================================== */
-/* Register "SH_INT_CMPA" */
-/* RTC Compare Value for Processor A */
-/* ==================================================================== */
-
-#define SH_INT_CMPA 0x00000001101b0000
-#define SH_INT_CMPA_MASK 0x007fffffffffffff
-#define SH_INT_CMPA_INIT 0x0000000000000000
-
-/* SH_INT_CMPA_REAL_TIME_CMPA */
-/* Description: Real Time Clock Compare */
-#define SH_INT_CMPA_REAL_TIME_CMPA_SHFT 0
-#define SH_INT_CMPA_REAL_TIME_CMPA_MASK 0x007fffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_INT_CMPB" */
-/* RTC Compare Value for Processor B */
-/* ==================================================================== */
-
-#define SH_INT_CMPB 0x00000001101b0080
-#define SH_INT_CMPB_MASK 0x007fffffffffffff
-#define SH_INT_CMPB_INIT 0x0000000000000000
-
-/* SH_INT_CMPB_REAL_TIME_CMPB */
-/* Description: Real Time Clock Compare */
-#define SH_INT_CMPB_REAL_TIME_CMPB_SHFT 0
-#define SH_INT_CMPB_REAL_TIME_CMPB_MASK 0x007fffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_INT_CMPC" */
-/* RTC Compare Value for Processor C */
-/* ==================================================================== */
-
-#define SH_INT_CMPC 0x00000001101b0100
-#define SH_INT_CMPC_MASK 0x007fffffffffffff
-#define SH_INT_CMPC_INIT 0x0000000000000000
-
-/* SH_INT_CMPC_REAL_TIME_CMPC */
-/* Description: Real Time Clock Compare */
-#define SH_INT_CMPC_REAL_TIME_CMPC_SHFT 0
-#define SH_INT_CMPC_REAL_TIME_CMPC_MASK 0x007fffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_INT_CMPD" */
-/* RTC Compare Value for Processor D */
-/* ==================================================================== */
-
-#define SH_INT_CMPD 0x00000001101b0180
-#define SH_INT_CMPD_MASK 0x007fffffffffffff
-#define SH_INT_CMPD_INIT 0x0000000000000000
-
-/* SH_INT_CMPD_REAL_TIME_CMPD */
-/* Description: Real Time Clock Compare */
-#define SH_INT_CMPD_REAL_TIME_CMPD_SHFT 0
-#define SH_INT_CMPD_REAL_TIME_CMPD_MASK 0x007fffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_INT_PROF" */
-/* Profile Compare Registers */
-/* ==================================================================== */
-
-#define SH_INT_PROF 0x00000001101b0200
-#define SH_INT_PROF_MASK 0x00000000ffffffff
-#define SH_INT_PROF_INIT 0x0000000000000000
-
-/* SH_INT_PROF_PROFILE_COMPARE */
-/* Description: Profile Compare */
-#define SH_INT_PROF_PROFILE_COMPARE_SHFT 0
-#define SH_INT_PROF_PROFILE_COMPARE_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_RTC" */
-/* Real-time Clock */
-/* ==================================================================== */
-
-#define SH_RTC 0x00000001101c0000UL
-#define SH_RTC_MASK 0x007fffffffffffffUL
-#define SH_RTC_INIT 0x0000000000000000
-
-/* SH_RTC_REAL_TIME_CLOCK */
-/* Description: Real-time Clock */
-#define SH_RTC_REAL_TIME_CLOCK_SHFT 0
-#define SH_RTC_REAL_TIME_CLOCK_MASK 0x007fffffffffffffUL
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH0" */
-/* Scratch Register 0 */
-/* ==================================================================== */
-
-#define SH_SCRATCH0 0x00000001101d0000
-#define SH_SCRATCH0_MASK 0xffffffffffffffff
-#define SH_SCRATCH0_INIT 0x0000000000000000
-
-/* SH_SCRATCH0_SCRATCH0 */
-/* Description: Scratch register 0 */
-#define SH_SCRATCH0_SCRATCH0_SHFT 0
-#define SH_SCRATCH0_SCRATCH0_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH0_ALIAS" */
-/* Scratch Register 0 Alias Address */
-/* ==================================================================== */
-
-#define SH_SCRATCH0_ALIAS 0x00000001101d0008
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH1" */
-/* Scratch Register 1 */
-/* ==================================================================== */
-
-#define SH_SCRATCH1 0x00000001101d0080
-#define SH_SCRATCH1_MASK 0xffffffffffffffff
-#define SH_SCRATCH1_INIT 0x0000000000000000
-
-/* SH_SCRATCH1_SCRATCH1 */
-/* Description: Scratch register 1 */
-#define SH_SCRATCH1_SCRATCH1_SHFT 0
-#define SH_SCRATCH1_SCRATCH1_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH1_ALIAS" */
-/* Scratch Register 1 Alias Address */
-/* ==================================================================== */
-
-#define SH_SCRATCH1_ALIAS 0x00000001101d0088
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH2" */
-/* Scratch Register 2 */
-/* ==================================================================== */
-
-#define SH_SCRATCH2 0x00000001101d0100
-#define SH_SCRATCH2_MASK 0xffffffffffffffff
-#define SH_SCRATCH2_INIT 0x0000000000000000
-
-/* SH_SCRATCH2_SCRATCH2 */
-/* Description: Scratch register 2 */
-#define SH_SCRATCH2_SCRATCH2_SHFT 0
-#define SH_SCRATCH2_SCRATCH2_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH2_ALIAS" */
-/* Scratch Register 2 Alias Address */
-/* ==================================================================== */
-
-#define SH_SCRATCH2_ALIAS 0x00000001101d0108
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH3" */
-/* Scratch Register 3 */
-/* ==================================================================== */
-
-#define SH_SCRATCH3 0x00000001101d0180
-#define SH_SCRATCH3_MASK 0x0000000000000001
-#define SH_SCRATCH3_INIT 0x0000000000000000
-
-/* SH_SCRATCH3_SCRATCH3 */
-/* Description: Scratch register 3 */
-#define SH_SCRATCH3_SCRATCH3_SHFT 0
-#define SH_SCRATCH3_SCRATCH3_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH3_ALIAS" */
-/* Scratch Register 3 Alias Address */
-/* ==================================================================== */
-
-#define SH_SCRATCH3_ALIAS 0x00000001101d0188
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH4" */
-/* Scratch Register 4 */
-/* ==================================================================== */
-
-#define SH_SCRATCH4 0x00000001101d0200
-#define SH_SCRATCH4_MASK 0x0000000000000001
-#define SH_SCRATCH4_INIT 0x0000000000000000
-
-/* SH_SCRATCH4_SCRATCH4 */
-/* Description: Scratch register 4 */
-#define SH_SCRATCH4_SCRATCH4_SHFT 0
-#define SH_SCRATCH4_SCRATCH4_MASK 0x0000000000000001
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH4_ALIAS" */
-/* Scratch Register 4 Alias Address */
-/* ==================================================================== */
-
-#define SH_SCRATCH4_ALIAS 0x00000001101d0208
-
-/* ==================================================================== */
-/* Register "SH_CRB_MESSAGE_CONTROL" */
-/* Coherent Request Buffer Message Control */
-/* ==================================================================== */
-
-#define SH_CRB_MESSAGE_CONTROL 0x0000000120000000
-#define SH_CRB_MESSAGE_CONTROL_MASK 0xffffffff00000fff
-#define SH_CRB_MESSAGE_CONTROL_INIT 0x0000000000000006
-
-/* SH_CRB_MESSAGE_CONTROL_SYSTEM_COHERENCE_ENABLE */
-/* Description: System Coherence Enabled */
-#define SH_CRB_MESSAGE_CONTROL_SYSTEM_COHERENCE_ENABLE_SHFT 0
-#define SH_CRB_MESSAGE_CONTROL_SYSTEM_COHERENCE_ENABLE_MASK 0x0000000000000001
-
-/* SH_CRB_MESSAGE_CONTROL_LOCAL_SPECULATIVE_MESSAGE_ENABLE */
-/* Description: Speculative Read Requests to Local Memory Enabled */
-#define SH_CRB_MESSAGE_CONTROL_LOCAL_SPECULATIVE_MESSAGE_ENABLE_SHFT 1
-#define SH_CRB_MESSAGE_CONTROL_LOCAL_SPECULATIVE_MESSAGE_ENABLE_MASK 0x0000000000000002
-
-/* SH_CRB_MESSAGE_CONTROL_REMOTE_SPECULATIVE_MESSAGE_ENABLE */
-/* Description: Speculative Read Requests to Remote Memory Enabled */
-#define SH_CRB_MESSAGE_CONTROL_REMOTE_SPECULATIVE_MESSAGE_ENABLE_SHFT 2
-#define SH_CRB_MESSAGE_CONTROL_REMOTE_SPECULATIVE_MESSAGE_ENABLE_MASK 0x0000000000000004
-
-/* SH_CRB_MESSAGE_CONTROL_MESSAGE_COLOR */
-/* Description: Define color of message */
-#define SH_CRB_MESSAGE_CONTROL_MESSAGE_COLOR_SHFT 3
-#define SH_CRB_MESSAGE_CONTROL_MESSAGE_COLOR_MASK 0x0000000000000008
-
-/* SH_CRB_MESSAGE_CONTROL_MESSAGE_COLOR_ENABLE */
-/* Description: Enable color message processing */
-#define SH_CRB_MESSAGE_CONTROL_MESSAGE_COLOR_ENABLE_SHFT 4
-#define SH_CRB_MESSAGE_CONTROL_MESSAGE_COLOR_ENABLE_MASK 0x0000000000000010
-
-/* SH_CRB_MESSAGE_CONTROL_RRB_ATTRIBUTE_MISMATCH_FSB_ENABLE */
-/* Description: Enable FSB RRB Mismatch check */
-#define SH_CRB_MESSAGE_CONTROL_RRB_ATTRIBUTE_MISMATCH_FSB_ENABLE_SHFT 5
-#define SH_CRB_MESSAGE_CONTROL_RRB_ATTRIBUTE_MISMATCH_FSB_ENABLE_MASK 0x0000000000000020
-
-/* SH_CRB_MESSAGE_CONTROL_WRB_ATTRIBUTE_MISMATCH_FSB_ENABLE */
-/* Description: Enable FSB WRB Mismatch check */
-#define SH_CRB_MESSAGE_CONTROL_WRB_ATTRIBUTE_MISMATCH_FSB_ENABLE_SHFT 6
-#define SH_CRB_MESSAGE_CONTROL_WRB_ATTRIBUTE_MISMATCH_FSB_ENABLE_MASK 0x0000000000000040
-
-/* SH_CRB_MESSAGE_CONTROL_IRB_ATTRIBUTE_MISMATCH_FSB_ENABLE */
-/* Description: Enable FSB IRB Mismatch check */
-#define SH_CRB_MESSAGE_CONTROL_IRB_ATTRIBUTE_MISMATCH_FSB_ENABLE_SHFT 7
-#define SH_CRB_MESSAGE_CONTROL_IRB_ATTRIBUTE_MISMATCH_FSB_ENABLE_MASK 0x0000000000000080
-
-/* SH_CRB_MESSAGE_CONTROL_RRB_ATTRIBUTE_MISMATCH_XB_ENABLE */
-/* Description: Enable XB RRB Mismatch check */
-#define SH_CRB_MESSAGE_CONTROL_RRB_ATTRIBUTE_MISMATCH_XB_ENABLE_SHFT 8
-#define SH_CRB_MESSAGE_CONTROL_RRB_ATTRIBUTE_MISMATCH_XB_ENABLE_MASK 0x0000000000000100
-
-/* SH_CRB_MESSAGE_CONTROL_WRB_ATTRIBUTE_MISMATCH_XB_ENABLE */
-/* Description: Enable XB WRB Mismatch check */
-#define SH_CRB_MESSAGE_CONTROL_WRB_ATTRIBUTE_MISMATCH_XB_ENABLE_SHFT 9
-#define SH_CRB_MESSAGE_CONTROL_WRB_ATTRIBUTE_MISMATCH_XB_ENABLE_MASK 0x0000000000000200
-
-/* SH_CRB_MESSAGE_CONTROL_SUPPRESS_BOGUS_WRITES */
-/* Description: ignor residual write data */
-#define SH_CRB_MESSAGE_CONTROL_SUPPRESS_BOGUS_WRITES_SHFT 10
-#define SH_CRB_MESSAGE_CONTROL_SUPPRESS_BOGUS_WRITES_MASK 0x0000000000000400
-
-/* SH_CRB_MESSAGE_CONTROL_ENABLE_IVACK_CONSOLIDATION */
-/* Description: enable IVACK reply consolidation */
-#define SH_CRB_MESSAGE_CONTROL_ENABLE_IVACK_CONSOLIDATION_SHFT 11
-#define SH_CRB_MESSAGE_CONTROL_ENABLE_IVACK_CONSOLIDATION_MASK 0x0000000000000800
-
-/* SH_CRB_MESSAGE_CONTROL_IVACK_STALL_COUNT */
-/* Description: IVACK stall counter */
-#define SH_CRB_MESSAGE_CONTROL_IVACK_STALL_COUNT_SHFT 32
-#define SH_CRB_MESSAGE_CONTROL_IVACK_STALL_COUNT_MASK 0x0000ffff00000000
-
-/* SH_CRB_MESSAGE_CONTROL_IVACK_THROTTLE_CONTROL */
-/* Description: IVACK throttling limit/timer control */
-#define SH_CRB_MESSAGE_CONTROL_IVACK_THROTTLE_CONTROL_SHFT 48
-#define SH_CRB_MESSAGE_CONTROL_IVACK_THROTTLE_CONTROL_MASK 0xffff000000000000
-
-/* ==================================================================== */
-/* Register "SH_CRB_NACK_LIMIT" */
-/* CRB Nack Limit */
-/* ==================================================================== */
-
-#define SH_CRB_NACK_LIMIT 0x0000000120000080
-#define SH_CRB_NACK_LIMIT_MASK 0x800000000000ffff
-#define SH_CRB_NACK_LIMIT_INIT 0x0000000000000000
-
-/* SH_CRB_NACK_LIMIT_LIMIT */
-/* Description: Nack Count Limit */
-#define SH_CRB_NACK_LIMIT_LIMIT_SHFT 0
-#define SH_CRB_NACK_LIMIT_LIMIT_MASK 0x0000000000000fff
-
-/* SH_CRB_NACK_LIMIT_PRI_FREQ */
-/* Description: Frequency at which priority count is incremented */
-#define SH_CRB_NACK_LIMIT_PRI_FREQ_SHFT 12
-#define SH_CRB_NACK_LIMIT_PRI_FREQ_MASK 0x000000000000f000
-
-/* SH_CRB_NACK_LIMIT_ENABLE */
-/* Description: Enable NACK limit detection */
-#define SH_CRB_NACK_LIMIT_ENABLE_SHFT 63
-#define SH_CRB_NACK_LIMIT_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_CRB_TIMEOUT_PRESCALE" */
-/* Coherent Request Buffer Timeout Prescale */
-/* ==================================================================== */
-
-#define SH_CRB_TIMEOUT_PRESCALE 0x0000000120000100
-#define SH_CRB_TIMEOUT_PRESCALE_MASK 0x00000000ffffffff
-#define SH_CRB_TIMEOUT_PRESCALE_INIT 0x0000000000000000
-
-/* SH_CRB_TIMEOUT_PRESCALE_SCALING_FACTOR */
-/* Description: CRB Time-out Prescale Factor */
-#define SH_CRB_TIMEOUT_PRESCALE_SCALING_FACTOR_SHFT 0
-#define SH_CRB_TIMEOUT_PRESCALE_SCALING_FACTOR_MASK 0x00000000ffffffff
-
-/* ==================================================================== */
-/* Register "SH_CRB_TIMEOUT_SKID" */
-/* Coherent Request Buffer Timeout Skid Limit */
-/* ==================================================================== */
-
-#define SH_CRB_TIMEOUT_SKID 0x0000000120000180
-#define SH_CRB_TIMEOUT_SKID_MASK 0x800000000000003f
-#define SH_CRB_TIMEOUT_SKID_INIT 0x0000000000000007
-
-/* SH_CRB_TIMEOUT_SKID_SKID */
-/* Description: CRB Time-out Skid */
-#define SH_CRB_TIMEOUT_SKID_SKID_SHFT 0
-#define SH_CRB_TIMEOUT_SKID_SKID_MASK 0x000000000000003f
-
-/* SH_CRB_TIMEOUT_SKID_RESET_SKID_COUNT */
-/* Description: Reset Skid counter */
-#define SH_CRB_TIMEOUT_SKID_RESET_SKID_COUNT_SHFT 63
-#define SH_CRB_TIMEOUT_SKID_RESET_SKID_COUNT_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MEMORY_WRITE_STATUS_0" */
-/* Memory Write Status for CPU 0 */
-/* ==================================================================== */
-
-#define SH_MEMORY_WRITE_STATUS_0 0x0000000120070000
-#define SH_MEMORY_WRITE_STATUS_0_MASK 0x000000000000003f
-#define SH_MEMORY_WRITE_STATUS_0_INIT 0x0000000000000000
-
-/* SH_MEMORY_WRITE_STATUS_0_PENDING_WRITE_COUNT */
-/* Description: Pending Write Count */
-#define SH_MEMORY_WRITE_STATUS_0_PENDING_WRITE_COUNT_SHFT 0
-#define SH_MEMORY_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK 0x000000000000003f
-
-/* ==================================================================== */
-/* Register "SH_MEMORY_WRITE_STATUS_1" */
-/* Memory Write Status for CPU 1 */
-/* ==================================================================== */
-
-#define SH_MEMORY_WRITE_STATUS_1 0x0000000120070080
-#define SH_MEMORY_WRITE_STATUS_1_MASK 0x000000000000003f
-#define SH_MEMORY_WRITE_STATUS_1_INIT 0x0000000000000000
-
-/* SH_MEMORY_WRITE_STATUS_1_PENDING_WRITE_COUNT */
-/* Description: Pending Write Count */
-#define SH_MEMORY_WRITE_STATUS_1_PENDING_WRITE_COUNT_SHFT 0
-#define SH_MEMORY_WRITE_STATUS_1_PENDING_WRITE_COUNT_MASK 0x000000000000003f
-
-/* ==================================================================== */
-/* Register "SH_PIO_WRITE_STATUS_0" */
-/* PIO Write Status for CPU 0 */
-/* ==================================================================== */
-
-#define SH_PIO_WRITE_STATUS_0 0x0000000120070200
-#define SH_PIO_WRITE_STATUS_0_MASK 0xbf03ffffffffffff
-#define SH_PIO_WRITE_STATUS_0_INIT 0x8000000000000000
-
-/* SH_PIO_WRITE_STATUS_0_MULTI_WRITE_ERROR */
-/* Description: More than one PIO write error occurred */
-#define SH_PIO_WRITE_STATUS_0_MULTI_WRITE_ERROR_SHFT 0
-#define SH_PIO_WRITE_STATUS_0_MULTI_WRITE_ERROR_MASK 0x0000000000000001
-
-/* SH_PIO_WRITE_STATUS_0_WRITE_DEADLOCK */
-/* Description: Deaklock response detected */
-#define SH_PIO_WRITE_STATUS_0_WRITE_DEADLOCK_SHFT 1
-#define SH_PIO_WRITE_STATUS_0_WRITE_DEADLOCK_MASK 0x0000000000000002
-
-/* SH_PIO_WRITE_STATUS_0_WRITE_ERROR */
-/* Description: Error response detected */
-#define SH_PIO_WRITE_STATUS_0_WRITE_ERROR_SHFT 2
-#define SH_PIO_WRITE_STATUS_0_WRITE_ERROR_MASK 0x0000000000000004
-
-/* SH_PIO_WRITE_STATUS_0_WRITE_ERROR_ADDRESS */
-/* Description: Address associated with error response */
-#define SH_PIO_WRITE_STATUS_0_WRITE_ERROR_ADDRESS_SHFT 3
-#define SH_PIO_WRITE_STATUS_0_WRITE_ERROR_ADDRESS_MASK 0x0003fffffffffff8
-
-/* SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT */
-/* Description: Count of currently pending PIO writes */
-#define SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_SHFT 56
-#define SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK 0x3f00000000000000
-
-/* SH_PIO_WRITE_STATUS_0_WRITES_OK */
-/* Description: No pending writes or errors */
-#define SH_PIO_WRITE_STATUS_0_WRITES_OK_SHFT 63
-#define SH_PIO_WRITE_STATUS_0_WRITES_OK_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PIO_WRITE_STATUS_1" */
-/* PIO Write Status for CPU 1 */
-/* ==================================================================== */
-
-#define SH_PIO_WRITE_STATUS_1 0x0000000120070280
-#define SH_PIO_WRITE_STATUS_1_MASK 0xbf03ffffffffffff
-#define SH_PIO_WRITE_STATUS_1_INIT 0x8000000000000000
-
-/* SH_PIO_WRITE_STATUS_1_MULTI_WRITE_ERROR */
-/* Description: More than one PIO write error occurred */
-#define SH_PIO_WRITE_STATUS_1_MULTI_WRITE_ERROR_SHFT 0
-#define SH_PIO_WRITE_STATUS_1_MULTI_WRITE_ERROR_MASK 0x0000000000000001
-
-/* SH_PIO_WRITE_STATUS_1_WRITE_DEADLOCK */
-/* Description: Deaklock response detected */
-#define SH_PIO_WRITE_STATUS_1_WRITE_DEADLOCK_SHFT 1
-#define SH_PIO_WRITE_STATUS_1_WRITE_DEADLOCK_MASK 0x0000000000000002
-
-/* SH_PIO_WRITE_STATUS_1_WRITE_ERROR */
-/* Description: Error response detected */
-#define SH_PIO_WRITE_STATUS_1_WRITE_ERROR_SHFT 2
-#define SH_PIO_WRITE_STATUS_1_WRITE_ERROR_MASK 0x0000000000000004
-
-/* SH_PIO_WRITE_STATUS_1_WRITE_ERROR_ADDRESS */
-/* Description: Address associated with error response */
-#define SH_PIO_WRITE_STATUS_1_WRITE_ERROR_ADDRESS_SHFT 3
-#define SH_PIO_WRITE_STATUS_1_WRITE_ERROR_ADDRESS_MASK 0x0003fffffffffff8
-
-/* SH_PIO_WRITE_STATUS_1_PENDING_WRITE_COUNT */
-/* Description: Count of currently pending PIO writes */
-#define SH_PIO_WRITE_STATUS_1_PENDING_WRITE_COUNT_SHFT 56
-#define SH_PIO_WRITE_STATUS_1_PENDING_WRITE_COUNT_MASK 0x3f00000000000000
-
-/* SH_PIO_WRITE_STATUS_1_WRITES_OK */
-/* Description: No pending writes or errors */
-#define SH_PIO_WRITE_STATUS_1_WRITES_OK_SHFT 63
-#define SH_PIO_WRITE_STATUS_1_WRITES_OK_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_PIO_WRITE_STATUS_0_ALIAS" */
-/* ==================================================================== */
-
-#define SH_PIO_WRITE_STATUS_0_ALIAS 0x0000000120070208
-
-/* ==================================================================== */
-/* Register "SH_PIO_WRITE_STATUS_1_ALIAS" */
-/* ==================================================================== */
-
-#define SH_PIO_WRITE_STATUS_1_ALIAS 0x0000000120070288
-
-/* ==================================================================== */
-/* Register "SH_MEMORY_WRITE_STATUS_NON_USER_0" */
-/* Memory Write Status for CPU 0. OS access only */
-/* ==================================================================== */
-
-#define SH_MEMORY_WRITE_STATUS_NON_USER_0 0x0000000120070400
-#define SH_MEMORY_WRITE_STATUS_NON_USER_0_MASK 0x800000000000003f
-#define SH_MEMORY_WRITE_STATUS_NON_USER_0_INIT 0x0000000000000000
-
-/* SH_MEMORY_WRITE_STATUS_NON_USER_0_PENDING_WRITE_COUNT */
-/* Description: Pending Write Count */
-#define SH_MEMORY_WRITE_STATUS_NON_USER_0_PENDING_WRITE_COUNT_SHFT 0
-#define SH_MEMORY_WRITE_STATUS_NON_USER_0_PENDING_WRITE_COUNT_MASK 0x000000000000003f
-
-/* SH_MEMORY_WRITE_STATUS_NON_USER_0_CLEAR */
-/* Description: Clear pending write count */
-#define SH_MEMORY_WRITE_STATUS_NON_USER_0_CLEAR_SHFT 63
-#define SH_MEMORY_WRITE_STATUS_NON_USER_0_CLEAR_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MEMORY_WRITE_STATUS_NON_USER_1" */
-/* Memory Write Status for CPU 1. OS access only */
-/* ==================================================================== */
-
-#define SH_MEMORY_WRITE_STATUS_NON_USER_1 0x0000000120070480
-#define SH_MEMORY_WRITE_STATUS_NON_USER_1_MASK 0x800000000000003f
-#define SH_MEMORY_WRITE_STATUS_NON_USER_1_INIT 0x0000000000000000
-
-/* SH_MEMORY_WRITE_STATUS_NON_USER_1_PENDING_WRITE_COUNT */
-/* Description: Pending Write Count */
-#define SH_MEMORY_WRITE_STATUS_NON_USER_1_PENDING_WRITE_COUNT_SHFT 0
-#define SH_MEMORY_WRITE_STATUS_NON_USER_1_PENDING_WRITE_COUNT_MASK 0x000000000000003f
-
-/* SH_MEMORY_WRITE_STATUS_NON_USER_1_CLEAR */
-/* Description: Clear pending write count */
-#define SH_MEMORY_WRITE_STATUS_NON_USER_1_CLEAR_SHFT 63
-#define SH_MEMORY_WRITE_STATUS_NON_USER_1_CLEAR_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MMRBIST_ERR" */
-/* Error capture for bist read errors */
-/* ==================================================================== */
-
-#define SH_MMRBIST_ERR 0x0000000100000080
-#define SH_MMRBIST_ERR_MASK 0x00000071ffffffff
-#define SH_MMRBIST_ERR_INIT 0x0000000000000000
-
-/* SH_MMRBIST_ERR_ADDR */
-/* Description: dword address of bist error */
-#define SH_MMRBIST_ERR_ADDR_SHFT 0
-#define SH_MMRBIST_ERR_ADDR_MASK 0x00000001ffffffff
-
-/* SH_MMRBIST_ERR_DETECTED */
-/* Description: error detected flag */
-#define SH_MMRBIST_ERR_DETECTED_SHFT 36
-#define SH_MMRBIST_ERR_DETECTED_MASK 0x0000001000000000
-
-/* SH_MMRBIST_ERR_MULTIPLE_DETECTED */
-/* Description: multiple errors detected flag */
-#define SH_MMRBIST_ERR_MULTIPLE_DETECTED_SHFT 37
-#define SH_MMRBIST_ERR_MULTIPLE_DETECTED_MASK 0x0000002000000000
-
-/* SH_MMRBIST_ERR_CANCELLED */
-/* Description: mmr/bist was cancelled */
-#define SH_MMRBIST_ERR_CANCELLED_SHFT 38
-#define SH_MMRBIST_ERR_CANCELLED_MASK 0x0000004000000000
-
-/* ==================================================================== */
-/* Register "SH_MISC_ERR_HDR_LOWER" */
-/* Header capture register */
-/* ==================================================================== */
-
-#define SH_MISC_ERR_HDR_LOWER 0x0000000100000088
-#define SH_MISC_ERR_HDR_LOWER_MASK 0x93fffffffffffff8
-#define SH_MISC_ERR_HDR_LOWER_INIT 0x0000000000000000
-
-/* SH_MISC_ERR_HDR_LOWER_ADDR */
-/* Description: upper bits of reference address */
-#define SH_MISC_ERR_HDR_LOWER_ADDR_SHFT 3
-#define SH_MISC_ERR_HDR_LOWER_ADDR_MASK 0x0000000ffffffff8
-
-/* SH_MISC_ERR_HDR_LOWER_CMD */
-/* Description: command of reference */
-#define SH_MISC_ERR_HDR_LOWER_CMD_SHFT 36
-#define SH_MISC_ERR_HDR_LOWER_CMD_MASK 0x00000ff000000000
-
-/* SH_MISC_ERR_HDR_LOWER_SRC */
-/* Description: source node of reference */
-#define SH_MISC_ERR_HDR_LOWER_SRC_SHFT 44
-#define SH_MISC_ERR_HDR_LOWER_SRC_MASK 0x03fff00000000000
-
-/* SH_MISC_ERR_HDR_LOWER_WRITE */
-/* Description: reference is a write */
-#define SH_MISC_ERR_HDR_LOWER_WRITE_SHFT 60
-#define SH_MISC_ERR_HDR_LOWER_WRITE_MASK 0x1000000000000000
-
-/* SH_MISC_ERR_HDR_LOWER_VALID */
-/* Description: set when capture occurs */
-#define SH_MISC_ERR_HDR_LOWER_VALID_SHFT 63
-#define SH_MISC_ERR_HDR_LOWER_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MISC_ERR_HDR_UPPER" */
-/* Error header capture packet and protocol errors */
-/* ==================================================================== */
-
-#define SH_MISC_ERR_HDR_UPPER 0x0000000100000090
-#define SH_MISC_ERR_HDR_UPPER_MASK 0x000000001ff000ff
-#define SH_MISC_ERR_HDR_UPPER_INIT 0x0000000000000000
-
-/* SH_MISC_ERR_HDR_UPPER_DIR_PROTOCOL */
-/* Description: indicates a directory protocol error captured */
-#define SH_MISC_ERR_HDR_UPPER_DIR_PROTOCOL_SHFT 0
-#define SH_MISC_ERR_HDR_UPPER_DIR_PROTOCOL_MASK 0x0000000000000001
-
-/* SH_MISC_ERR_HDR_UPPER_ILLEGAL_CMD */
-/* Description: indicates an illegal command error captured */
-#define SH_MISC_ERR_HDR_UPPER_ILLEGAL_CMD_SHFT 1
-#define SH_MISC_ERR_HDR_UPPER_ILLEGAL_CMD_MASK 0x0000000000000002
-
-/* SH_MISC_ERR_HDR_UPPER_NONEXIST_ADDR */
-/* Description: indicates a non-existent memory error captured */
-#define SH_MISC_ERR_HDR_UPPER_NONEXIST_ADDR_SHFT 2
-#define SH_MISC_ERR_HDR_UPPER_NONEXIST_ADDR_MASK 0x0000000000000004
-
-/* SH_MISC_ERR_HDR_UPPER_RMW_UC */
-/* Description: indicates an uncorrectable store rmw */
-#define SH_MISC_ERR_HDR_UPPER_RMW_UC_SHFT 3
-#define SH_MISC_ERR_HDR_UPPER_RMW_UC_MASK 0x0000000000000008
-
-/* SH_MISC_ERR_HDR_UPPER_RMW_COR */
-/* Description: indicates a correctable store rmw */
-#define SH_MISC_ERR_HDR_UPPER_RMW_COR_SHFT 4
-#define SH_MISC_ERR_HDR_UPPER_RMW_COR_MASK 0x0000000000000010
-
-/* SH_MISC_ERR_HDR_UPPER_DIR_ACC */
-/* Description: indicates a data request to directory memory error */
-/* captured */
-#define SH_MISC_ERR_HDR_UPPER_DIR_ACC_SHFT 5
-#define SH_MISC_ERR_HDR_UPPER_DIR_ACC_MASK 0x0000000000000020
-
-/* SH_MISC_ERR_HDR_UPPER_PI_PKT_SIZE */
-/* Description: indicates a pkt size error from pi */
-#define SH_MISC_ERR_HDR_UPPER_PI_PKT_SIZE_SHFT 6
-#define SH_MISC_ERR_HDR_UPPER_PI_PKT_SIZE_MASK 0x0000000000000040
-
-/* SH_MISC_ERR_HDR_UPPER_XN_PKT_SIZE */
-/* Description: indicates a pkt size error from xn */
-#define SH_MISC_ERR_HDR_UPPER_XN_PKT_SIZE_SHFT 7
-#define SH_MISC_ERR_HDR_UPPER_XN_PKT_SIZE_MASK 0x0000000000000080
-
-/* SH_MISC_ERR_HDR_UPPER_ECHO */
-#define SH_MISC_ERR_HDR_UPPER_ECHO_SHFT 20
-#define SH_MISC_ERR_HDR_UPPER_ECHO_MASK 0x000000001ff00000
-
-/* ==================================================================== */
-/* Register "SH_DIR_UC_ERR_HDR_LOWER" */
-/* Header capture register */
-/* ==================================================================== */
-
-#define SH_DIR_UC_ERR_HDR_LOWER 0x0000000100000098
-#define SH_DIR_UC_ERR_HDR_LOWER_MASK 0x93fffffffffffff8
-#define SH_DIR_UC_ERR_HDR_LOWER_INIT 0x0000000000000000
-
-/* SH_DIR_UC_ERR_HDR_LOWER_ADDR */
-/* Description: upper bits of reference address */
-#define SH_DIR_UC_ERR_HDR_LOWER_ADDR_SHFT 3
-#define SH_DIR_UC_ERR_HDR_LOWER_ADDR_MASK 0x0000000ffffffff8
-
-/* SH_DIR_UC_ERR_HDR_LOWER_CMD */
-/* Description: command of reference */
-#define SH_DIR_UC_ERR_HDR_LOWER_CMD_SHFT 36
-#define SH_DIR_UC_ERR_HDR_LOWER_CMD_MASK 0x00000ff000000000
-
-/* SH_DIR_UC_ERR_HDR_LOWER_SRC */
-/* Description: source node of reference */
-#define SH_DIR_UC_ERR_HDR_LOWER_SRC_SHFT 44
-#define SH_DIR_UC_ERR_HDR_LOWER_SRC_MASK 0x03fff00000000000
-
-/* SH_DIR_UC_ERR_HDR_LOWER_WRITE */
-/* Description: reference is a write */
-#define SH_DIR_UC_ERR_HDR_LOWER_WRITE_SHFT 60
-#define SH_DIR_UC_ERR_HDR_LOWER_WRITE_MASK 0x1000000000000000
-
-/* SH_DIR_UC_ERR_HDR_LOWER_VALID */
-/* Description: set when capture occurs */
-#define SH_DIR_UC_ERR_HDR_LOWER_VALID_SHFT 63
-#define SH_DIR_UC_ERR_HDR_LOWER_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_DIR_UC_ERR_HDR_UPPER" */
-/* Error header capture packet and protocol errors */
-/* ==================================================================== */
-
-#define SH_DIR_UC_ERR_HDR_UPPER 0x00000001000000a0
-#define SH_DIR_UC_ERR_HDR_UPPER_MASK 0x000000001ff00008
-#define SH_DIR_UC_ERR_HDR_UPPER_INIT 0x0000000000000000
-
-/* SH_DIR_UC_ERR_HDR_UPPER_DIR_UC */
-/* Description: indicates uncorrectable directory error captured */
-#define SH_DIR_UC_ERR_HDR_UPPER_DIR_UC_SHFT 3
-#define SH_DIR_UC_ERR_HDR_UPPER_DIR_UC_MASK 0x0000000000000008
-
-/* SH_DIR_UC_ERR_HDR_UPPER_ECHO */
-#define SH_DIR_UC_ERR_HDR_UPPER_ECHO_SHFT 20
-#define SH_DIR_UC_ERR_HDR_UPPER_ECHO_MASK 0x000000001ff00000
-
-/* ==================================================================== */
-/* Register "SH_DIR_COR_ERR_HDR_LOWER" */
-/* Header capture register */
-/* ==================================================================== */
-
-#define SH_DIR_COR_ERR_HDR_LOWER 0x00000001000000a8
-#define SH_DIR_COR_ERR_HDR_LOWER_MASK 0x93fffffffffffff8
-#define SH_DIR_COR_ERR_HDR_LOWER_INIT 0x0000000000000000
-
-/* SH_DIR_COR_ERR_HDR_LOWER_ADDR */
-/* Description: upper bits of reference address */
-#define SH_DIR_COR_ERR_HDR_LOWER_ADDR_SHFT 3
-#define SH_DIR_COR_ERR_HDR_LOWER_ADDR_MASK 0x0000000ffffffff8
-
-/* SH_DIR_COR_ERR_HDR_LOWER_CMD */
-/* Description: command of reference */
-#define SH_DIR_COR_ERR_HDR_LOWER_CMD_SHFT 36
-#define SH_DIR_COR_ERR_HDR_LOWER_CMD_MASK 0x00000ff000000000
-
-/* SH_DIR_COR_ERR_HDR_LOWER_SRC */
-/* Description: source node of reference */
-#define SH_DIR_COR_ERR_HDR_LOWER_SRC_SHFT 44
-#define SH_DIR_COR_ERR_HDR_LOWER_SRC_MASK 0x03fff00000000000
-
-/* SH_DIR_COR_ERR_HDR_LOWER_WRITE */
-/* Description: reference is a write */
-#define SH_DIR_COR_ERR_HDR_LOWER_WRITE_SHFT 60
-#define SH_DIR_COR_ERR_HDR_LOWER_WRITE_MASK 0x1000000000000000
-
-/* SH_DIR_COR_ERR_HDR_LOWER_VALID */
-/* Description: set when capture occurs */
-#define SH_DIR_COR_ERR_HDR_LOWER_VALID_SHFT 63
-#define SH_DIR_COR_ERR_HDR_LOWER_VALID_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_DIR_COR_ERR_HDR_UPPER" */
-/* Error header capture packet and protocol errors */
-/* ==================================================================== */
-
-#define SH_DIR_COR_ERR_HDR_UPPER 0x00000001000000b0
-#define SH_DIR_COR_ERR_HDR_UPPER_MASK 0x000000001ff00100
-#define SH_DIR_COR_ERR_HDR_UPPER_INIT 0x0000000000000000
-
-/* SH_DIR_COR_ERR_HDR_UPPER_DIR_COR */
-/* Description: indicates correctable directory error captured */
-#define SH_DIR_COR_ERR_HDR_UPPER_DIR_COR_SHFT 8
-#define SH_DIR_COR_ERR_HDR_UPPER_DIR_COR_MASK 0x0000000000000100
-
-/* SH_DIR_COR_ERR_HDR_UPPER_ECHO */
-#define SH_DIR_COR_ERR_HDR_UPPER_ECHO_SHFT 20
-#define SH_DIR_COR_ERR_HDR_UPPER_ECHO_MASK 0x000000001ff00000
-
-/* ==================================================================== */
-/* Register "SH_MEM_ERROR_SUMMARY" */
-/* Memory error flags */
-/* ==================================================================== */
-
-#define SH_MEM_ERROR_SUMMARY 0x00000001000000b8
-#define SH_MEM_ERROR_SUMMARY_MASK 0x00000007f77777ff
-#define SH_MEM_ERROR_SUMMARY_INIT 0x0000000000000000
-
-/* SH_MEM_ERROR_SUMMARY_ILLEGAL_CMD */
-/* Description: illegal command error */
-#define SH_MEM_ERROR_SUMMARY_ILLEGAL_CMD_SHFT 0
-#define SH_MEM_ERROR_SUMMARY_ILLEGAL_CMD_MASK 0x0000000000000001
-
-/* SH_MEM_ERROR_SUMMARY_NONEXIST_ADDR */
-/* Description: non-existent memory error */
-#define SH_MEM_ERROR_SUMMARY_NONEXIST_ADDR_SHFT 1
-#define SH_MEM_ERROR_SUMMARY_NONEXIST_ADDR_MASK 0x0000000000000002
-
-/* SH_MEM_ERROR_SUMMARY_DQLP_DIR_PERR */
-/* Description: directory protocol error in dqlp */
-#define SH_MEM_ERROR_SUMMARY_DQLP_DIR_PERR_SHFT 2
-#define SH_MEM_ERROR_SUMMARY_DQLP_DIR_PERR_MASK 0x0000000000000004
-
-/* SH_MEM_ERROR_SUMMARY_DQRP_DIR_PERR */
-/* Description: directory protocol error in dqrp */
-#define SH_MEM_ERROR_SUMMARY_DQRP_DIR_PERR_SHFT 3
-#define SH_MEM_ERROR_SUMMARY_DQRP_DIR_PERR_MASK 0x0000000000000008
-
-/* SH_MEM_ERROR_SUMMARY_DQLP_DIR_UC */
-/* Description: uncorrectable directory error in dqlp */
-#define SH_MEM_ERROR_SUMMARY_DQLP_DIR_UC_SHFT 4
-#define SH_MEM_ERROR_SUMMARY_DQLP_DIR_UC_MASK 0x0000000000000010
-
-/* SH_MEM_ERROR_SUMMARY_DQLP_DIR_COR */
-/* Description: correctable directory error in dqlp */
-#define SH_MEM_ERROR_SUMMARY_DQLP_DIR_COR_SHFT 5
-#define SH_MEM_ERROR_SUMMARY_DQLP_DIR_COR_MASK 0x0000000000000020
-
-/* SH_MEM_ERROR_SUMMARY_DQRP_DIR_UC */
-/* Description: uncorrectable directory error in dqrp */
-#define SH_MEM_ERROR_SUMMARY_DQRP_DIR_UC_SHFT 6
-#define SH_MEM_ERROR_SUMMARY_DQRP_DIR_UC_MASK 0x0000000000000040
-
-/* SH_MEM_ERROR_SUMMARY_DQRP_DIR_COR */
-/* Description: correctable directory error in dqrp */
-#define SH_MEM_ERROR_SUMMARY_DQRP_DIR_COR_SHFT 7
-#define SH_MEM_ERROR_SUMMARY_DQRP_DIR_COR_MASK 0x0000000000000080
-
-/* SH_MEM_ERROR_SUMMARY_ACX_INT_HW */
-/* Description: hardware interrupt from acx */
-#define SH_MEM_ERROR_SUMMARY_ACX_INT_HW_SHFT 8
-#define SH_MEM_ERROR_SUMMARY_ACX_INT_HW_MASK 0x0000000000000100
-
-/* SH_MEM_ERROR_SUMMARY_ACY_INT_HW */
-/* Description: hardware interrupt from acy */
-#define SH_MEM_ERROR_SUMMARY_ACY_INT_HW_SHFT 9
-#define SH_MEM_ERROR_SUMMARY_ACY_INT_HW_MASK 0x0000000000000200
-
-/* SH_MEM_ERROR_SUMMARY_DIR_ACC */
-/* Description: directory memory access error */
-#define SH_MEM_ERROR_SUMMARY_DIR_ACC_SHFT 10
-#define SH_MEM_ERROR_SUMMARY_DIR_ACC_MASK 0x0000000000000400
-
-/* SH_MEM_ERROR_SUMMARY_DQLP_INT_UC */
-/* Description: uncorrectable interrupt from dqlp */
-#define SH_MEM_ERROR_SUMMARY_DQLP_INT_UC_SHFT 12
-#define SH_MEM_ERROR_SUMMARY_DQLP_INT_UC_MASK 0x0000000000001000
-
-/* SH_MEM_ERROR_SUMMARY_DQLP_INT_COR */
-/* Description: correctable interrupt from dqlp */
-#define SH_MEM_ERROR_SUMMARY_DQLP_INT_COR_SHFT 13
-#define SH_MEM_ERROR_SUMMARY_DQLP_INT_COR_MASK 0x0000000000002000
-
-/* SH_MEM_ERROR_SUMMARY_DQLP_INT_HW */
-/* Description: hardware interrupt from dqlp */
-#define SH_MEM_ERROR_SUMMARY_DQLP_INT_HW_SHFT 14
-#define SH_MEM_ERROR_SUMMARY_DQLP_INT_HW_MASK 0x0000000000004000
-
-/* SH_MEM_ERROR_SUMMARY_DQLS_INT_UC */
-/* Description: uncorrectable interrupt from dqls */
-#define SH_MEM_ERROR_SUMMARY_DQLS_INT_UC_SHFT 16
-#define SH_MEM_ERROR_SUMMARY_DQLS_INT_UC_MASK 0x0000000000010000
-
-/* SH_MEM_ERROR_SUMMARY_DQLS_INT_COR */
-/* Description: correctable interrupt from dqls */
-#define SH_MEM_ERROR_SUMMARY_DQLS_INT_COR_SHFT 17
-#define SH_MEM_ERROR_SUMMARY_DQLS_INT_COR_MASK 0x0000000000020000
-
-/* SH_MEM_ERROR_SUMMARY_DQLS_INT_HW */
-/* Description: hardware interrupt from dqls */
-#define SH_MEM_ERROR_SUMMARY_DQLS_INT_HW_SHFT 18
-#define SH_MEM_ERROR_SUMMARY_DQLS_INT_HW_MASK 0x0000000000040000
-
-/* SH_MEM_ERROR_SUMMARY_DQRP_INT_UC */
-/* Description: uncorrectable interrupt from dqrp */
-#define SH_MEM_ERROR_SUMMARY_DQRP_INT_UC_SHFT 20
-#define SH_MEM_ERROR_SUMMARY_DQRP_INT_UC_MASK 0x0000000000100000
-
-/* SH_MEM_ERROR_SUMMARY_DQRP_INT_COR */
-/* Description: correctable interrupt from dqrp */
-#define SH_MEM_ERROR_SUMMARY_DQRP_INT_COR_SHFT 21
-#define SH_MEM_ERROR_SUMMARY_DQRP_INT_COR_MASK 0x0000000000200000
-
-/* SH_MEM_ERROR_SUMMARY_DQRP_INT_HW */
-/* Description: hardware interrupt from dqrp */
-#define SH_MEM_ERROR_SUMMARY_DQRP_INT_HW_SHFT 22
-#define SH_MEM_ERROR_SUMMARY_DQRP_INT_HW_MASK 0x0000000000400000
-
-/* SH_MEM_ERROR_SUMMARY_DQRS_INT_UC */
-/* Description: uncorrectable interrupt from dqrs */
-#define SH_MEM_ERROR_SUMMARY_DQRS_INT_UC_SHFT 24
-#define SH_MEM_ERROR_SUMMARY_DQRS_INT_UC_MASK 0x0000000001000000
-
-/* SH_MEM_ERROR_SUMMARY_DQRS_INT_COR */
-/* Description: correctable interrupt from dqrs */
-#define SH_MEM_ERROR_SUMMARY_DQRS_INT_COR_SHFT 25
-#define SH_MEM_ERROR_SUMMARY_DQRS_INT_COR_MASK 0x0000000002000000
-
-/* SH_MEM_ERROR_SUMMARY_DQRS_INT_HW */
-/* Description: hardware interrupt from dqrs */
-#define SH_MEM_ERROR_SUMMARY_DQRS_INT_HW_SHFT 26
-#define SH_MEM_ERROR_SUMMARY_DQRS_INT_HW_MASK 0x0000000004000000
-
-/* SH_MEM_ERROR_SUMMARY_PI_REPLY_OVERFLOW */
-/* Description: too many reply packets came from pi */
-#define SH_MEM_ERROR_SUMMARY_PI_REPLY_OVERFLOW_SHFT 28
-#define SH_MEM_ERROR_SUMMARY_PI_REPLY_OVERFLOW_MASK 0x0000000010000000
-
-/* SH_MEM_ERROR_SUMMARY_XN_REPLY_OVERFLOW */
-/* Description: too many reply packets came from xn */
-#define SH_MEM_ERROR_SUMMARY_XN_REPLY_OVERFLOW_SHFT 29
-#define SH_MEM_ERROR_SUMMARY_XN_REPLY_OVERFLOW_MASK 0x0000000020000000
-
-/* SH_MEM_ERROR_SUMMARY_PI_REQUEST_OVERFLOW */
-/* Description: too many request packets came from pi */
-#define SH_MEM_ERROR_SUMMARY_PI_REQUEST_OVERFLOW_SHFT 30
-#define SH_MEM_ERROR_SUMMARY_PI_REQUEST_OVERFLOW_MASK 0x0000000040000000
-
-/* SH_MEM_ERROR_SUMMARY_XN_REQUEST_OVERFLOW */
-/* Description: too many request packets came from xn */
-#define SH_MEM_ERROR_SUMMARY_XN_REQUEST_OVERFLOW_SHFT 31
-#define SH_MEM_ERROR_SUMMARY_XN_REQUEST_OVERFLOW_MASK 0x0000000080000000
-
-/* SH_MEM_ERROR_SUMMARY_RED_BLACK_ERR_TIMEOUT */
-/* Description: red black scheme did not clean up soon enough */
-#define SH_MEM_ERROR_SUMMARY_RED_BLACK_ERR_TIMEOUT_SHFT 32
-#define SH_MEM_ERROR_SUMMARY_RED_BLACK_ERR_TIMEOUT_MASK 0x0000000100000000
-
-/* SH_MEM_ERROR_SUMMARY_PI_PKT_SIZE */
-/* Description: received data bearing packet from pi with wrong siz */
-#define SH_MEM_ERROR_SUMMARY_PI_PKT_SIZE_SHFT 33
-#define SH_MEM_ERROR_SUMMARY_PI_PKT_SIZE_MASK 0x0000000200000000
-
-/* SH_MEM_ERROR_SUMMARY_XN_PKT_SIZE */
-/* Description: received data bearing packet from xn with wrong siz */
-#define SH_MEM_ERROR_SUMMARY_XN_PKT_SIZE_SHFT 34
-#define SH_MEM_ERROR_SUMMARY_XN_PKT_SIZE_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_MEM_ERROR_SUMMARY_ALIAS" */
-/* Memory error flags clear alias */
-/* ==================================================================== */
-
-#define SH_MEM_ERROR_SUMMARY_ALIAS 0x00000001000000c0
-
-/* ==================================================================== */
-/* Register "SH_MEM_ERROR_OVERFLOW" */
-/* Memory error flags */
-/* ==================================================================== */
-
-#define SH_MEM_ERROR_OVERFLOW 0x00000001000000c8
-#define SH_MEM_ERROR_OVERFLOW_MASK 0x00000007f77777ff
-#define SH_MEM_ERROR_OVERFLOW_INIT 0x0000000000000000
-
-/* SH_MEM_ERROR_OVERFLOW_ILLEGAL_CMD */
-/* Description: illegal command error */
-#define SH_MEM_ERROR_OVERFLOW_ILLEGAL_CMD_SHFT 0
-#define SH_MEM_ERROR_OVERFLOW_ILLEGAL_CMD_MASK 0x0000000000000001
-
-/* SH_MEM_ERROR_OVERFLOW_NONEXIST_ADDR */
-/* Description: non-existent memory error */
-#define SH_MEM_ERROR_OVERFLOW_NONEXIST_ADDR_SHFT 1
-#define SH_MEM_ERROR_OVERFLOW_NONEXIST_ADDR_MASK 0x0000000000000002
-
-/* SH_MEM_ERROR_OVERFLOW_DQLP_DIR_PERR */
-/* Description: directory protocol error in dqlp */
-#define SH_MEM_ERROR_OVERFLOW_DQLP_DIR_PERR_SHFT 2
-#define SH_MEM_ERROR_OVERFLOW_DQLP_DIR_PERR_MASK 0x0000000000000004
-
-/* SH_MEM_ERROR_OVERFLOW_DQRP_DIR_PERR */
-/* Description: directory protocol error in dqrp */
-#define SH_MEM_ERROR_OVERFLOW_DQRP_DIR_PERR_SHFT 3
-#define SH_MEM_ERROR_OVERFLOW_DQRP_DIR_PERR_MASK 0x0000000000000008
-
-/* SH_MEM_ERROR_OVERFLOW_DQLP_DIR_UC */
-/* Description: uncorrectable directory error in dqlp */
-#define SH_MEM_ERROR_OVERFLOW_DQLP_DIR_UC_SHFT 4
-#define SH_MEM_ERROR_OVERFLOW_DQLP_DIR_UC_MASK 0x0000000000000010
-
-/* SH_MEM_ERROR_OVERFLOW_DQLP_DIR_COR */
-/* Description: correctable directory error in dqlp */
-#define SH_MEM_ERROR_OVERFLOW_DQLP_DIR_COR_SHFT 5
-#define SH_MEM_ERROR_OVERFLOW_DQLP_DIR_COR_MASK 0x0000000000000020
-
-/* SH_MEM_ERROR_OVERFLOW_DQRP_DIR_UC */
-/* Description: uncorrectable directory error in dqrp */
-#define SH_MEM_ERROR_OVERFLOW_DQRP_DIR_UC_SHFT 6
-#define SH_MEM_ERROR_OVERFLOW_DQRP_DIR_UC_MASK 0x0000000000000040
-
-/* SH_MEM_ERROR_OVERFLOW_DQRP_DIR_COR */
-/* Description: correctable directory error in dqrp */
-#define SH_MEM_ERROR_OVERFLOW_DQRP_DIR_COR_SHFT 7
-#define SH_MEM_ERROR_OVERFLOW_DQRP_DIR_COR_MASK 0x0000000000000080
-
-/* SH_MEM_ERROR_OVERFLOW_ACX_INT_HW */
-/* Description: hardware interrupt from acx */
-#define SH_MEM_ERROR_OVERFLOW_ACX_INT_HW_SHFT 8
-#define SH_MEM_ERROR_OVERFLOW_ACX_INT_HW_MASK 0x0000000000000100
-
-/* SH_MEM_ERROR_OVERFLOW_ACY_INT_HW */
-/* Description: hardware interrupt from acy */
-#define SH_MEM_ERROR_OVERFLOW_ACY_INT_HW_SHFT 9
-#define SH_MEM_ERROR_OVERFLOW_ACY_INT_HW_MASK 0x0000000000000200
-
-/* SH_MEM_ERROR_OVERFLOW_DIR_ACC */
-/* Description: directory memory access error */
-#define SH_MEM_ERROR_OVERFLOW_DIR_ACC_SHFT 10
-#define SH_MEM_ERROR_OVERFLOW_DIR_ACC_MASK 0x0000000000000400
-
-/* SH_MEM_ERROR_OVERFLOW_DQLP_INT_UC */
-/* Description: uncorrectable interrupt from dqlp */
-#define SH_MEM_ERROR_OVERFLOW_DQLP_INT_UC_SHFT 12
-#define SH_MEM_ERROR_OVERFLOW_DQLP_INT_UC_MASK 0x0000000000001000
-
-/* SH_MEM_ERROR_OVERFLOW_DQLP_INT_COR */
-/* Description: correctable interrupt from dqlp */
-#define SH_MEM_ERROR_OVERFLOW_DQLP_INT_COR_SHFT 13
-#define SH_MEM_ERROR_OVERFLOW_DQLP_INT_COR_MASK 0x0000000000002000
-
-/* SH_MEM_ERROR_OVERFLOW_DQLP_INT_HW */
-/* Description: hardware interrupt from dqlp */
-#define SH_MEM_ERROR_OVERFLOW_DQLP_INT_HW_SHFT 14
-#define SH_MEM_ERROR_OVERFLOW_DQLP_INT_HW_MASK 0x0000000000004000
-
-/* SH_MEM_ERROR_OVERFLOW_DQLS_INT_UC */
-/* Description: uncorrectable interrupt from dqls */
-#define SH_MEM_ERROR_OVERFLOW_DQLS_INT_UC_SHFT 16
-#define SH_MEM_ERROR_OVERFLOW_DQLS_INT_UC_MASK 0x0000000000010000
-
-/* SH_MEM_ERROR_OVERFLOW_DQLS_INT_COR */
-/* Description: correctable interrupt from dqls */
-#define SH_MEM_ERROR_OVERFLOW_DQLS_INT_COR_SHFT 17
-#define SH_MEM_ERROR_OVERFLOW_DQLS_INT_COR_MASK 0x0000000000020000
-
-/* SH_MEM_ERROR_OVERFLOW_DQLS_INT_HW */
-/* Description: hardware interrupt from dqls */
-#define SH_MEM_ERROR_OVERFLOW_DQLS_INT_HW_SHFT 18
-#define SH_MEM_ERROR_OVERFLOW_DQLS_INT_HW_MASK 0x0000000000040000
-
-/* SH_MEM_ERROR_OVERFLOW_DQRP_INT_UC */
-/* Description: uncorrectable interrupt from dqrp */
-#define SH_MEM_ERROR_OVERFLOW_DQRP_INT_UC_SHFT 20
-#define SH_MEM_ERROR_OVERFLOW_DQRP_INT_UC_MASK 0x0000000000100000
-
-/* SH_MEM_ERROR_OVERFLOW_DQRP_INT_COR */
-/* Description: correctable interrupt from dqrp */
-#define SH_MEM_ERROR_OVERFLOW_DQRP_INT_COR_SHFT 21
-#define SH_MEM_ERROR_OVERFLOW_DQRP_INT_COR_MASK 0x0000000000200000
-
-/* SH_MEM_ERROR_OVERFLOW_DQRP_INT_HW */
-/* Description: hardware interrupt from dqrp */
-#define SH_MEM_ERROR_OVERFLOW_DQRP_INT_HW_SHFT 22
-#define SH_MEM_ERROR_OVERFLOW_DQRP_INT_HW_MASK 0x0000000000400000
-
-/* SH_MEM_ERROR_OVERFLOW_DQRS_INT_UC */
-/* Description: uncorrectable interrupt from dqrs */
-#define SH_MEM_ERROR_OVERFLOW_DQRS_INT_UC_SHFT 24
-#define SH_MEM_ERROR_OVERFLOW_DQRS_INT_UC_MASK 0x0000000001000000
-
-/* SH_MEM_ERROR_OVERFLOW_DQRS_INT_COR */
-/* Description: correctable interrupt from dqrs */
-#define SH_MEM_ERROR_OVERFLOW_DQRS_INT_COR_SHFT 25
-#define SH_MEM_ERROR_OVERFLOW_DQRS_INT_COR_MASK 0x0000000002000000
-
-/* SH_MEM_ERROR_OVERFLOW_DQRS_INT_HW */
-/* Description: hardware interrupt from dqrs */
-#define SH_MEM_ERROR_OVERFLOW_DQRS_INT_HW_SHFT 26
-#define SH_MEM_ERROR_OVERFLOW_DQRS_INT_HW_MASK 0x0000000004000000
-
-/* SH_MEM_ERROR_OVERFLOW_PI_REPLY_OVERFLOW */
-/* Description: too many reply packets came from pi */
-#define SH_MEM_ERROR_OVERFLOW_PI_REPLY_OVERFLOW_SHFT 28
-#define SH_MEM_ERROR_OVERFLOW_PI_REPLY_OVERFLOW_MASK 0x0000000010000000
-
-/* SH_MEM_ERROR_OVERFLOW_XN_REPLY_OVERFLOW */
-/* Description: too many reply packets came from xn */
-#define SH_MEM_ERROR_OVERFLOW_XN_REPLY_OVERFLOW_SHFT 29
-#define SH_MEM_ERROR_OVERFLOW_XN_REPLY_OVERFLOW_MASK 0x0000000020000000
-
-/* SH_MEM_ERROR_OVERFLOW_PI_REQUEST_OVERFLOW */
-/* Description: too many request packets came from pi */
-#define SH_MEM_ERROR_OVERFLOW_PI_REQUEST_OVERFLOW_SHFT 30
-#define SH_MEM_ERROR_OVERFLOW_PI_REQUEST_OVERFLOW_MASK 0x0000000040000000
-
-/* SH_MEM_ERROR_OVERFLOW_XN_REQUEST_OVERFLOW */
-/* Description: too many request packets came from xn */
-#define SH_MEM_ERROR_OVERFLOW_XN_REQUEST_OVERFLOW_SHFT 31
-#define SH_MEM_ERROR_OVERFLOW_XN_REQUEST_OVERFLOW_MASK 0x0000000080000000
-
-/* SH_MEM_ERROR_OVERFLOW_RED_BLACK_ERR_TIMEOUT */
-/* Description: red black scheme did not clean up soon enough */
-#define SH_MEM_ERROR_OVERFLOW_RED_BLACK_ERR_TIMEOUT_SHFT 32
-#define SH_MEM_ERROR_OVERFLOW_RED_BLACK_ERR_TIMEOUT_MASK 0x0000000100000000
-
-/* SH_MEM_ERROR_OVERFLOW_PI_PKT_SIZE */
-/* Description: received data bearing packet from pi with wrong siz */
-#define SH_MEM_ERROR_OVERFLOW_PI_PKT_SIZE_SHFT 33
-#define SH_MEM_ERROR_OVERFLOW_PI_PKT_SIZE_MASK 0x0000000200000000
-
-/* SH_MEM_ERROR_OVERFLOW_XN_PKT_SIZE */
-/* Description: received data bearing packet from xn with wrong siz */
-#define SH_MEM_ERROR_OVERFLOW_XN_PKT_SIZE_SHFT 34
-#define SH_MEM_ERROR_OVERFLOW_XN_PKT_SIZE_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_MEM_ERROR_OVERFLOW_ALIAS" */
-/* Memory error flags clear alias */
-/* ==================================================================== */
-
-#define SH_MEM_ERROR_OVERFLOW_ALIAS 0x00000001000000d0
-
-/* ==================================================================== */
-/* Register "SH_MEM_ERROR_MASK" */
-/* Memory error flags */
-/* ==================================================================== */
-
-#define SH_MEM_ERROR_MASK 0x00000001000000d8
-#define SH_MEM_ERROR_MASK_MASK 0x00000007f77777ff
-#define SH_MEM_ERROR_MASK_INIT 0x00000007f77773ff
-
-/* SH_MEM_ERROR_MASK_ILLEGAL_CMD */
-/* Description: illegal command error */
-#define SH_MEM_ERROR_MASK_ILLEGAL_CMD_SHFT 0
-#define SH_MEM_ERROR_MASK_ILLEGAL_CMD_MASK 0x0000000000000001
-
-/* SH_MEM_ERROR_MASK_NONEXIST_ADDR */
-/* Description: non-existent memory error */
-#define SH_MEM_ERROR_MASK_NONEXIST_ADDR_SHFT 1
-#define SH_MEM_ERROR_MASK_NONEXIST_ADDR_MASK 0x0000000000000002
-
-/* SH_MEM_ERROR_MASK_DQLP_DIR_PERR */
-/* Description: directory protocol error in dqlp */
-#define SH_MEM_ERROR_MASK_DQLP_DIR_PERR_SHFT 2
-#define SH_MEM_ERROR_MASK_DQLP_DIR_PERR_MASK 0x0000000000000004
-
-/* SH_MEM_ERROR_MASK_DQRP_DIR_PERR */
-/* Description: directory protocol error in dqrp */
-#define SH_MEM_ERROR_MASK_DQRP_DIR_PERR_SHFT 3
-#define SH_MEM_ERROR_MASK_DQRP_DIR_PERR_MASK 0x0000000000000008
-
-/* SH_MEM_ERROR_MASK_DQLP_DIR_UC */
-/* Description: uncorrectable directory error in dqlp */
-#define SH_MEM_ERROR_MASK_DQLP_DIR_UC_SHFT 4
-#define SH_MEM_ERROR_MASK_DQLP_DIR_UC_MASK 0x0000000000000010
-
-/* SH_MEM_ERROR_MASK_DQLP_DIR_COR */
-/* Description: correctable directory error in dqlp */
-#define SH_MEM_ERROR_MASK_DQLP_DIR_COR_SHFT 5
-#define SH_MEM_ERROR_MASK_DQLP_DIR_COR_MASK 0x0000000000000020
-
-/* SH_MEM_ERROR_MASK_DQRP_DIR_UC */
-/* Description: uncorrectable directory error in dqrp */
-#define SH_MEM_ERROR_MASK_DQRP_DIR_UC_SHFT 6
-#define SH_MEM_ERROR_MASK_DQRP_DIR_UC_MASK 0x0000000000000040
-
-/* SH_MEM_ERROR_MASK_DQRP_DIR_COR */
-/* Description: correctable directory error in dqrp */
-#define SH_MEM_ERROR_MASK_DQRP_DIR_COR_SHFT 7
-#define SH_MEM_ERROR_MASK_DQRP_DIR_COR_MASK 0x0000000000000080
-
-/* SH_MEM_ERROR_MASK_ACX_INT_HW */
-/* Description: hardware interrupt from acx */
-#define SH_MEM_ERROR_MASK_ACX_INT_HW_SHFT 8
-#define SH_MEM_ERROR_MASK_ACX_INT_HW_MASK 0x0000000000000100
-
-/* SH_MEM_ERROR_MASK_ACY_INT_HW */
-/* Description: hardware interrupt from acy */
-#define SH_MEM_ERROR_MASK_ACY_INT_HW_SHFT 9
-#define SH_MEM_ERROR_MASK_ACY_INT_HW_MASK 0x0000000000000200
-
-/* SH_MEM_ERROR_MASK_DIR_ACC */
-/* Description: directory memory access error */
-#define SH_MEM_ERROR_MASK_DIR_ACC_SHFT 10
-#define SH_MEM_ERROR_MASK_DIR_ACC_MASK 0x0000000000000400
-
-/* SH_MEM_ERROR_MASK_DQLP_INT_UC */
-/* Description: uncorrectable interrupt from dqlp */
-#define SH_MEM_ERROR_MASK_DQLP_INT_UC_SHFT 12
-#define SH_MEM_ERROR_MASK_DQLP_INT_UC_MASK 0x0000000000001000
-
-/* SH_MEM_ERROR_MASK_DQLP_INT_COR */
-/* Description: correctable interrupt from dqlp */
-#define SH_MEM_ERROR_MASK_DQLP_INT_COR_SHFT 13
-#define SH_MEM_ERROR_MASK_DQLP_INT_COR_MASK 0x0000000000002000
-
-/* SH_MEM_ERROR_MASK_DQLP_INT_HW */
-/* Description: hardware interrupt from dqlp */
-#define SH_MEM_ERROR_MASK_DQLP_INT_HW_SHFT 14
-#define SH_MEM_ERROR_MASK_DQLP_INT_HW_MASK 0x0000000000004000
-
-/* SH_MEM_ERROR_MASK_DQLS_INT_UC */
-/* Description: uncorrectable interrupt from dqls */
-#define SH_MEM_ERROR_MASK_DQLS_INT_UC_SHFT 16
-#define SH_MEM_ERROR_MASK_DQLS_INT_UC_MASK 0x0000000000010000
-
-/* SH_MEM_ERROR_MASK_DQLS_INT_COR */
-/* Description: correctable interrupt from dqls */
-#define SH_MEM_ERROR_MASK_DQLS_INT_COR_SHFT 17
-#define SH_MEM_ERROR_MASK_DQLS_INT_COR_MASK 0x0000000000020000
-
-/* SH_MEM_ERROR_MASK_DQLS_INT_HW */
-/* Description: hardware interrupt from dqls */
-#define SH_MEM_ERROR_MASK_DQLS_INT_HW_SHFT 18
-#define SH_MEM_ERROR_MASK_DQLS_INT_HW_MASK 0x0000000000040000
-
-/* SH_MEM_ERROR_MASK_DQRP_INT_UC */
-/* Description: uncorrectable interrupt from dqrp */
-#define SH_MEM_ERROR_MASK_DQRP_INT_UC_SHFT 20
-#define SH_MEM_ERROR_MASK_DQRP_INT_UC_MASK 0x0000000000100000
-
-/* SH_MEM_ERROR_MASK_DQRP_INT_COR */
-/* Description: correctable interrupt from dqrp */
-#define SH_MEM_ERROR_MASK_DQRP_INT_COR_SHFT 21
-#define SH_MEM_ERROR_MASK_DQRP_INT_COR_MASK 0x0000000000200000
-
-/* SH_MEM_ERROR_MASK_DQRP_INT_HW */
-/* Description: hardware interrupt from dqrp */
-#define SH_MEM_ERROR_MASK_DQRP_INT_HW_SHFT 22
-#define SH_MEM_ERROR_MASK_DQRP_INT_HW_MASK 0x0000000000400000
-
-/* SH_MEM_ERROR_MASK_DQRS_INT_UC */
-/* Description: uncorrectable interrupt from dqrs */
-#define SH_MEM_ERROR_MASK_DQRS_INT_UC_SHFT 24
-#define SH_MEM_ERROR_MASK_DQRS_INT_UC_MASK 0x0000000001000000
-
-/* SH_MEM_ERROR_MASK_DQRS_INT_COR */
-/* Description: correctable interrupt from dqrs */
-#define SH_MEM_ERROR_MASK_DQRS_INT_COR_SHFT 25
-#define SH_MEM_ERROR_MASK_DQRS_INT_COR_MASK 0x0000000002000000
-
-/* SH_MEM_ERROR_MASK_DQRS_INT_HW */
-/* Description: hardware interrupt from dqrs */
-#define SH_MEM_ERROR_MASK_DQRS_INT_HW_SHFT 26
-#define SH_MEM_ERROR_MASK_DQRS_INT_HW_MASK 0x0000000004000000
-
-/* SH_MEM_ERROR_MASK_PI_REPLY_OVERFLOW */
-/* Description: too many reply packets came from pi */
-#define SH_MEM_ERROR_MASK_PI_REPLY_OVERFLOW_SHFT 28
-#define SH_MEM_ERROR_MASK_PI_REPLY_OVERFLOW_MASK 0x0000000010000000
-
-/* SH_MEM_ERROR_MASK_XN_REPLY_OVERFLOW */
-/* Description: too many reply packets came from xn */
-#define SH_MEM_ERROR_MASK_XN_REPLY_OVERFLOW_SHFT 29
-#define SH_MEM_ERROR_MASK_XN_REPLY_OVERFLOW_MASK 0x0000000020000000
-
-/* SH_MEM_ERROR_MASK_PI_REQUEST_OVERFLOW */
-/* Description: too many request packets came from pi */
-#define SH_MEM_ERROR_MASK_PI_REQUEST_OVERFLOW_SHFT 30
-#define SH_MEM_ERROR_MASK_PI_REQUEST_OVERFLOW_MASK 0x0000000040000000
-
-/* SH_MEM_ERROR_MASK_XN_REQUEST_OVERFLOW */
-/* Description: too many request packets came from xn */
-#define SH_MEM_ERROR_MASK_XN_REQUEST_OVERFLOW_SHFT 31
-#define SH_MEM_ERROR_MASK_XN_REQUEST_OVERFLOW_MASK 0x0000000080000000
-
-/* SH_MEM_ERROR_MASK_RED_BLACK_ERR_TIMEOUT */
-/* Description: red black scheme did not clean up soon enough */
-#define SH_MEM_ERROR_MASK_RED_BLACK_ERR_TIMEOUT_SHFT 32
-#define SH_MEM_ERROR_MASK_RED_BLACK_ERR_TIMEOUT_MASK 0x0000000100000000
-
-/* SH_MEM_ERROR_MASK_PI_PKT_SIZE */
-/* Description: received data bearing packet from pi with wrong siz */
-#define SH_MEM_ERROR_MASK_PI_PKT_SIZE_SHFT 33
-#define SH_MEM_ERROR_MASK_PI_PKT_SIZE_MASK 0x0000000200000000
-
-/* SH_MEM_ERROR_MASK_XN_PKT_SIZE */
-/* Description: received data bearing packet from xn with wrong siz */
-#define SH_MEM_ERROR_MASK_XN_PKT_SIZE_SHFT 34
-#define SH_MEM_ERROR_MASK_XN_PKT_SIZE_MASK 0x0000000400000000
-
-/* ==================================================================== */
-/* Register "SH_X_DIMM_CFG" */
-/* AC Mem Config Registers */
-/* ==================================================================== */
-
-#define SH_X_DIMM_CFG 0x0000000100010000
-#define SH_X_DIMM_CFG_MASK 0x0000000f7f7f7f7f
-#define SH_X_DIMM_CFG_INIT 0x000000026f4f2f0f
-
-/* SH_X_DIMM_CFG_DIMM0_SIZE */
-/* Description: DIMM 0 DRAM size */
-#define SH_X_DIMM_CFG_DIMM0_SIZE_SHFT 0
-#define SH_X_DIMM_CFG_DIMM0_SIZE_MASK 0x0000000000000007
-
-/* SH_X_DIMM_CFG_DIMM0_2BK */
-/* Description: DIMM 0 has two physical banks */
-#define SH_X_DIMM_CFG_DIMM0_2BK_SHFT 3
-#define SH_X_DIMM_CFG_DIMM0_2BK_MASK 0x0000000000000008
-
-/* SH_X_DIMM_CFG_DIMM0_REV */
-/* Description: DIMM 0 physical banks reversed */
-#define SH_X_DIMM_CFG_DIMM0_REV_SHFT 4
-#define SH_X_DIMM_CFG_DIMM0_REV_MASK 0x0000000000000010
-
-/* SH_X_DIMM_CFG_DIMM0_CS */
-/* Description: DIMM 0 chip select, addr[35:34] match */
-#define SH_X_DIMM_CFG_DIMM0_CS_SHFT 5
-#define SH_X_DIMM_CFG_DIMM0_CS_MASK 0x0000000000000060
-
-/* SH_X_DIMM_CFG_DIMM1_SIZE */
-/* Description: DIMM 1 DRAM size */
-#define SH_X_DIMM_CFG_DIMM1_SIZE_SHFT 8
-#define SH_X_DIMM_CFG_DIMM1_SIZE_MASK 0x0000000000000700
-
-/* SH_X_DIMM_CFG_DIMM1_2BK */
-/* Description: DIMM 1 has two physical banks */
-#define SH_X_DIMM_CFG_DIMM1_2BK_SHFT 11
-#define SH_X_DIMM_CFG_DIMM1_2BK_MASK 0x0000000000000800
-
-/* SH_X_DIMM_CFG_DIMM1_REV */
-/* Description: DIMM 1 physical banks reversed */
-#define SH_X_DIMM_CFG_DIMM1_REV_SHFT 12
-#define SH_X_DIMM_CFG_DIMM1_REV_MASK 0x0000000000001000
-
-/* SH_X_DIMM_CFG_DIMM1_CS */
-/* Description: DIMM 1 chip select, addr[35:34] match */
-#define SH_X_DIMM_CFG_DIMM1_CS_SHFT 13
-#define SH_X_DIMM_CFG_DIMM1_CS_MASK 0x0000000000006000
-
-/* SH_X_DIMM_CFG_DIMM2_SIZE */
-/* Description: DIMM 2 DRAM size */
-#define SH_X_DIMM_CFG_DIMM2_SIZE_SHFT 16
-#define SH_X_DIMM_CFG_DIMM2_SIZE_MASK 0x0000000000070000
-
-/* SH_X_DIMM_CFG_DIMM2_2BK */
-/* Description: DIMM 2 has two physical banks */
-#define SH_X_DIMM_CFG_DIMM2_2BK_SHFT 19
-#define SH_X_DIMM_CFG_DIMM2_2BK_MASK 0x0000000000080000
-
-/* SH_X_DIMM_CFG_DIMM2_REV */
-/* Description: DIMM 2 physical banks reversed */
-#define SH_X_DIMM_CFG_DIMM2_REV_SHFT 20
-#define SH_X_DIMM_CFG_DIMM2_REV_MASK 0x0000000000100000
-
-/* SH_X_DIMM_CFG_DIMM2_CS */
-/* Description: DIMM 2 chip select, addr[35:34] match */
-#define SH_X_DIMM_CFG_DIMM2_CS_SHFT 21
-#define SH_X_DIMM_CFG_DIMM2_CS_MASK 0x0000000000600000
-
-/* SH_X_DIMM_CFG_DIMM3_SIZE */
-/* Description: DIMM 3 DRAM size */
-#define SH_X_DIMM_CFG_DIMM3_SIZE_SHFT 24
-#define SH_X_DIMM_CFG_DIMM3_SIZE_MASK 0x0000000007000000
-
-/* SH_X_DIMM_CFG_DIMM3_2BK */
-/* Description: DIMM 3 has two physical banks */
-#define SH_X_DIMM_CFG_DIMM3_2BK_SHFT 27
-#define SH_X_DIMM_CFG_DIMM3_2BK_MASK 0x0000000008000000
-
-/* SH_X_DIMM_CFG_DIMM3_REV */
-/* Description: DIMM 3 physical banks reversed */
-#define SH_X_DIMM_CFG_DIMM3_REV_SHFT 28
-#define SH_X_DIMM_CFG_DIMM3_REV_MASK 0x0000000010000000
-
-/* SH_X_DIMM_CFG_DIMM3_CS */
-/* Description: DIMM 3 chip select, addr[35:34] match */
-#define SH_X_DIMM_CFG_DIMM3_CS_SHFT 29
-#define SH_X_DIMM_CFG_DIMM3_CS_MASK 0x0000000060000000
-
-/* SH_X_DIMM_CFG_FREQ */
-/* Description: DIMM frequency select */
-#define SH_X_DIMM_CFG_FREQ_SHFT 32
-#define SH_X_DIMM_CFG_FREQ_MASK 0x0000000f00000000
-
-/* ==================================================================== */
-/* Register "SH_Y_DIMM_CFG" */
-/* AC Mem Config Registers */
-/* ==================================================================== */
-
-#define SH_Y_DIMM_CFG 0x0000000100010008
-#define SH_Y_DIMM_CFG_MASK 0x0000000f7f7f7f7f
-#define SH_Y_DIMM_CFG_INIT 0x000000026f4f2f0f
-
-/* SH_Y_DIMM_CFG_DIMM0_SIZE */
-/* Description: DIMM 0 DRAM size */
-#define SH_Y_DIMM_CFG_DIMM0_SIZE_SHFT 0
-#define SH_Y_DIMM_CFG_DIMM0_SIZE_MASK 0x0000000000000007
-
-/* SH_Y_DIMM_CFG_DIMM0_2BK */
-/* Description: DIMM 0 has two physical banks */
-#define SH_Y_DIMM_CFG_DIMM0_2BK_SHFT 3
-#define SH_Y_DIMM_CFG_DIMM0_2BK_MASK 0x0000000000000008
-
-/* SH_Y_DIMM_CFG_DIMM0_REV */
-/* Description: DIMM 0 physical banks reversed */
-#define SH_Y_DIMM_CFG_DIMM0_REV_SHFT 4
-#define SH_Y_DIMM_CFG_DIMM0_REV_MASK 0x0000000000000010
-
-/* SH_Y_DIMM_CFG_DIMM0_CS */
-/* Description: DIMM 0 chip select, addr[35:34] match */
-#define SH_Y_DIMM_CFG_DIMM0_CS_SHFT 5
-#define SH_Y_DIMM_CFG_DIMM0_CS_MASK 0x0000000000000060
-
-/* SH_Y_DIMM_CFG_DIMM1_SIZE */
-/* Description: DIMM 1 DRAM size */
-#define SH_Y_DIMM_CFG_DIMM1_SIZE_SHFT 8
-#define SH_Y_DIMM_CFG_DIMM1_SIZE_MASK 0x0000000000000700
-
-/* SH_Y_DIMM_CFG_DIMM1_2BK */
-/* Description: DIMM 1 has two physical banks */
-#define SH_Y_DIMM_CFG_DIMM1_2BK_SHFT 11
-#define SH_Y_DIMM_CFG_DIMM1_2BK_MASK 0x0000000000000800
-
-/* SH_Y_DIMM_CFG_DIMM1_REV */
-/* Description: DIMM 1 physical banks reversed */
-#define SH_Y_DIMM_CFG_DIMM1_REV_SHFT 12
-#define SH_Y_DIMM_CFG_DIMM1_REV_MASK 0x0000000000001000
-
-/* SH_Y_DIMM_CFG_DIMM1_CS */
-/* Description: DIMM 1 chip select, addr[35:34] match */
-#define SH_Y_DIMM_CFG_DIMM1_CS_SHFT 13
-#define SH_Y_DIMM_CFG_DIMM1_CS_MASK 0x0000000000006000
-
-/* SH_Y_DIMM_CFG_DIMM2_SIZE */
-/* Description: DIMM 2 DRAM size */
-#define SH_Y_DIMM_CFG_DIMM2_SIZE_SHFT 16
-#define SH_Y_DIMM_CFG_DIMM2_SIZE_MASK 0x0000000000070000
-
-/* SH_Y_DIMM_CFG_DIMM2_2BK */
-/* Description: DIMM 2 has two physical banks */
-#define SH_Y_DIMM_CFG_DIMM2_2BK_SHFT 19
-#define SH_Y_DIMM_CFG_DIMM2_2BK_MASK 0x0000000000080000
-
-/* SH_Y_DIMM_CFG_DIMM2_REV */
-/* Description: DIMM 2 physical banks reversed */
-#define SH_Y_DIMM_CFG_DIMM2_REV_SHFT 20
-#define SH_Y_DIMM_CFG_DIMM2_REV_MASK 0x0000000000100000
-
-/* SH_Y_DIMM_CFG_DIMM2_CS */
-/* Description: DIMM 2 chip select, addr[35:34] match */
-#define SH_Y_DIMM_CFG_DIMM2_CS_SHFT 21
-#define SH_Y_DIMM_CFG_DIMM2_CS_MASK 0x0000000000600000
-
-/* SH_Y_DIMM_CFG_DIMM3_SIZE */
-/* Description: DIMM 3 DRAM size */
-#define SH_Y_DIMM_CFG_DIMM3_SIZE_SHFT 24
-#define SH_Y_DIMM_CFG_DIMM3_SIZE_MASK 0x0000000007000000
-
-/* SH_Y_DIMM_CFG_DIMM3_2BK */
-/* Description: DIMM 3 has two physical banks */
-#define SH_Y_DIMM_CFG_DIMM3_2BK_SHFT 27
-#define SH_Y_DIMM_CFG_DIMM3_2BK_MASK 0x0000000008000000
-
-/* SH_Y_DIMM_CFG_DIMM3_REV */
-/* Description: DIMM 3 physical banks reversed */
-#define SH_Y_DIMM_CFG_DIMM3_REV_SHFT 28
-#define SH_Y_DIMM_CFG_DIMM3_REV_MASK 0x0000000010000000
-
-/* SH_Y_DIMM_CFG_DIMM3_CS */
-/* Description: DIMM 3 chip select, addr[35:34] match */
-#define SH_Y_DIMM_CFG_DIMM3_CS_SHFT 29
-#define SH_Y_DIMM_CFG_DIMM3_CS_MASK 0x0000000060000000
-
-/* SH_Y_DIMM_CFG_FREQ */
-/* Description: DIMM frequency select */
-#define SH_Y_DIMM_CFG_FREQ_SHFT 32
-#define SH_Y_DIMM_CFG_FREQ_MASK 0x0000000f00000000
-
-/* ==================================================================== */
-/* Register "SH_JNR_DIMM_CFG" */
-/* AC Mem Config Registers */
-/* ==================================================================== */
-
-#define SH_JNR_DIMM_CFG 0x0000000100010010
-#define SH_JNR_DIMM_CFG_MASK 0x0000000f7f7f7f7f
-#define SH_JNR_DIMM_CFG_INIT 0x000000026f4f2f0f
-
-/* SH_JNR_DIMM_CFG_DIMM0_SIZE */
-/* Description: DIMM 0 DRAM size */
-#define SH_JNR_DIMM_CFG_DIMM0_SIZE_SHFT 0
-#define SH_JNR_DIMM_CFG_DIMM0_SIZE_MASK 0x0000000000000007
-
-/* SH_JNR_DIMM_CFG_DIMM0_2BK */
-/* Description: DIMM 0 has two physical banks */
-#define SH_JNR_DIMM_CFG_DIMM0_2BK_SHFT 3
-#define SH_JNR_DIMM_CFG_DIMM0_2BK_MASK 0x0000000000000008
-
-/* SH_JNR_DIMM_CFG_DIMM0_REV */
-/* Description: DIMM 0 physical banks reversed */
-#define SH_JNR_DIMM_CFG_DIMM0_REV_SHFT 4
-#define SH_JNR_DIMM_CFG_DIMM0_REV_MASK 0x0000000000000010
-
-/* SH_JNR_DIMM_CFG_DIMM0_CS */
-/* Description: DIMM 0 chip select, addr[35:34] match */
-#define SH_JNR_DIMM_CFG_DIMM0_CS_SHFT 5
-#define SH_JNR_DIMM_CFG_DIMM0_CS_MASK 0x0000000000000060
-
-/* SH_JNR_DIMM_CFG_DIMM1_SIZE */
-/* Description: DIMM 1 DRAM size */
-#define SH_JNR_DIMM_CFG_DIMM1_SIZE_SHFT 8
-#define SH_JNR_DIMM_CFG_DIMM1_SIZE_MASK 0x0000000000000700
-
-/* SH_JNR_DIMM_CFG_DIMM1_2BK */
-/* Description: DIMM 1 has two physical banks */
-#define SH_JNR_DIMM_CFG_DIMM1_2BK_SHFT 11
-#define SH_JNR_DIMM_CFG_DIMM1_2BK_MASK 0x0000000000000800
-
-/* SH_JNR_DIMM_CFG_DIMM1_REV */
-/* Description: DIMM 1 physical banks reversed */
-#define SH_JNR_DIMM_CFG_DIMM1_REV_SHFT 12
-#define SH_JNR_DIMM_CFG_DIMM1_REV_MASK 0x0000000000001000
-
-/* SH_JNR_DIMM_CFG_DIMM1_CS */
-/* Description: DIMM 1 chip select, addr[35:34] match */
-#define SH_JNR_DIMM_CFG_DIMM1_CS_SHFT 13
-#define SH_JNR_DIMM_CFG_DIMM1_CS_MASK 0x0000000000006000
-
-/* SH_JNR_DIMM_CFG_DIMM2_SIZE */
-/* Description: DIMM 2 DRAM size */
-#define SH_JNR_DIMM_CFG_DIMM2_SIZE_SHFT 16
-#define SH_JNR_DIMM_CFG_DIMM2_SIZE_MASK 0x0000000000070000
-
-/* SH_JNR_DIMM_CFG_DIMM2_2BK */
-/* Description: DIMM 2 has two physical banks */
-#define SH_JNR_DIMM_CFG_DIMM2_2BK_SHFT 19
-#define SH_JNR_DIMM_CFG_DIMM2_2BK_MASK 0x0000000000080000
-
-/* SH_JNR_DIMM_CFG_DIMM2_REV */
-/* Description: DIMM 2 physical banks reversed */
-#define SH_JNR_DIMM_CFG_DIMM2_REV_SHFT 20
-#define SH_JNR_DIMM_CFG_DIMM2_REV_MASK 0x0000000000100000
-
-/* SH_JNR_DIMM_CFG_DIMM2_CS */
-/* Description: DIMM 2 chip select, addr[35:34] match */
-#define SH_JNR_DIMM_CFG_DIMM2_CS_SHFT 21
-#define SH_JNR_DIMM_CFG_DIMM2_CS_MASK 0x0000000000600000
-
-/* SH_JNR_DIMM_CFG_DIMM3_SIZE */
-/* Description: DIMM 3 DRAM size */
-#define SH_JNR_DIMM_CFG_DIMM3_SIZE_SHFT 24
-#define SH_JNR_DIMM_CFG_DIMM3_SIZE_MASK 0x0000000007000000
-
-/* SH_JNR_DIMM_CFG_DIMM3_2BK */
-/* Description: DIMM 3 has two physical banks */
-#define SH_JNR_DIMM_CFG_DIMM3_2BK_SHFT 27
-#define SH_JNR_DIMM_CFG_DIMM3_2BK_MASK 0x0000000008000000
-
-/* SH_JNR_DIMM_CFG_DIMM3_REV */
-/* Description: DIMM 3 physical banks reversed */
-#define SH_JNR_DIMM_CFG_DIMM3_REV_SHFT 28
-#define SH_JNR_DIMM_CFG_DIMM3_REV_MASK 0x0000000010000000
-
-/* SH_JNR_DIMM_CFG_DIMM3_CS */
-/* Description: DIMM 3 chip select, addr[35:34] match */
-#define SH_JNR_DIMM_CFG_DIMM3_CS_SHFT 29
-#define SH_JNR_DIMM_CFG_DIMM3_CS_MASK 0x0000000060000000
-
-/* SH_JNR_DIMM_CFG_FREQ */
-/* Description: DIMM frequency select */
-#define SH_JNR_DIMM_CFG_FREQ_SHFT 32
-#define SH_JNR_DIMM_CFG_FREQ_MASK 0x0000000f00000000
-
-/* ==================================================================== */
-/* Register "SH_X_PHASE_CFG" */
-/* AC Phase Config Registers */
-/* ==================================================================== */
-
-#define SH_X_PHASE_CFG 0x0000000100010018
-#define SH_X_PHASE_CFG_MASK 0x7fffffffffffffff
-#define SH_X_PHASE_CFG_INIT 0x0000000000000000
-
-/* SH_X_PHASE_CFG_LD_A */
-/* Description: Address, control load core clock A latch */
-#define SH_X_PHASE_CFG_LD_A_SHFT 0
-#define SH_X_PHASE_CFG_LD_A_MASK 0x000000000000001f
-
-/* SH_X_PHASE_CFG_LD_B */
-/* Description: Address, control load core clock B latch */
-#define SH_X_PHASE_CFG_LD_B_SHFT 5
-#define SH_X_PHASE_CFG_LD_B_MASK 0x00000000000003e0
-
-/* SH_X_PHASE_CFG_DQ_LD_A */
-/* Description: DATA MCI load core clock A latch */
-#define SH_X_PHASE_CFG_DQ_LD_A_SHFT 10
-#define SH_X_PHASE_CFG_DQ_LD_A_MASK 0x0000000000007c00
-
-/* SH_X_PHASE_CFG_DQ_LD_B */
-/* Description: DATA MCI load core clock B latch */
-#define SH_X_PHASE_CFG_DQ_LD_B_SHFT 15
-#define SH_X_PHASE_CFG_DQ_LD_B_MASK 0x00000000000f8000
-
-/* SH_X_PHASE_CFG_HOLD */
-/* Description: Hold request on core clock phase */
-#define SH_X_PHASE_CFG_HOLD_SHFT 20
-#define SH_X_PHASE_CFG_HOLD_MASK 0x0000000001f00000
-
-/* SH_X_PHASE_CFG_HOLD_REQ */
-/* Description: Hold next request on core clock phase */
-#define SH_X_PHASE_CFG_HOLD_REQ_SHFT 25
-#define SH_X_PHASE_CFG_HOLD_REQ_MASK 0x000000003e000000
-
-/* SH_X_PHASE_CFG_ADD_CP */
-/* Description: add delay clock period to dqct delay chain on phase */
-#define SH_X_PHASE_CFG_ADD_CP_SHFT 30
-#define SH_X_PHASE_CFG_ADD_CP_MASK 0x00000007c0000000
-
-/* SH_X_PHASE_CFG_BUBBLE_EN */
-/* Description: bubble, idle core clock to wait for memory clock */
-#define SH_X_PHASE_CFG_BUBBLE_EN_SHFT 35
-#define SH_X_PHASE_CFG_BUBBLE_EN_MASK 0x000000f800000000
-
-/* SH_X_PHASE_CFG_PHA_BUBBLE */
-/* Description: MMR phaseA bubble value */
-#define SH_X_PHASE_CFG_PHA_BUBBLE_SHFT 40
-#define SH_X_PHASE_CFG_PHA_BUBBLE_MASK 0x0000070000000000
-
-/* SH_X_PHASE_CFG_PHB_BUBBLE */
-/* Description: MMR phaseB bubble value */
-#define SH_X_PHASE_CFG_PHB_BUBBLE_SHFT 43
-#define SH_X_PHASE_CFG_PHB_BUBBLE_MASK 0x0000380000000000
-
-/* SH_X_PHASE_CFG_PHC_BUBBLE */
-/* Description: MMR phaseC bubble value */
-#define SH_X_PHASE_CFG_PHC_BUBBLE_SHFT 46
-#define SH_X_PHASE_CFG_PHC_BUBBLE_MASK 0x0001c00000000000
-
-/* SH_X_PHASE_CFG_PHD_BUBBLE */
-/* Description: MMR phaseD bubble value */
-#define SH_X_PHASE_CFG_PHD_BUBBLE_SHFT 49
-#define SH_X_PHASE_CFG_PHD_BUBBLE_MASK 0x000e000000000000
-
-/* SH_X_PHASE_CFG_PHE_BUBBLE */
-/* Description: MMR phaseE bubble value */
-#define SH_X_PHASE_CFG_PHE_BUBBLE_SHFT 52
-#define SH_X_PHASE_CFG_PHE_BUBBLE_MASK 0x0070000000000000
-
-/* SH_X_PHASE_CFG_SEL_A */
-/* Description: address,control select A memory clock latch */
-#define SH_X_PHASE_CFG_SEL_A_SHFT 55
-#define SH_X_PHASE_CFG_SEL_A_MASK 0x0780000000000000
-
-/* SH_X_PHASE_CFG_DQ_SEL_A */
-/* Description: DATA MCI select A memory clock latch */
-#define SH_X_PHASE_CFG_DQ_SEL_A_SHFT 59
-#define SH_X_PHASE_CFG_DQ_SEL_A_MASK 0x7800000000000000
-
-/* ==================================================================== */
-/* Register "SH_X_CFG" */
-/* AC Config Registers */
-/* ==================================================================== */
-
-#define SH_X_CFG 0x0000000100010020
-#define SH_X_CFG_MASK 0xffffffffffffffff
-#define SH_X_CFG_INIT 0x108443103322100c
-
-/* SH_X_CFG_MODE_SERIAL */
-/* Description: Arbque arbitration in serial mode */
-#define SH_X_CFG_MODE_SERIAL_SHFT 0
-#define SH_X_CFG_MODE_SERIAL_MASK 0x0000000000000001
-
-/* SH_X_CFG_DIRC_RANDOM_REPLACEMENT */
-/* Description: Directory cache random replacement */
-#define SH_X_CFG_DIRC_RANDOM_REPLACEMENT_SHFT 1
-#define SH_X_CFG_DIRC_RANDOM_REPLACEMENT_MASK 0x0000000000000002
-
-/* SH_X_CFG_DIR_COUNTER_INIT */
-/* Description: Dir counter initial value */
-#define SH_X_CFG_DIR_COUNTER_INIT_SHFT 2
-#define SH_X_CFG_DIR_COUNTER_INIT_MASK 0x00000000000000fc
-
-/* SH_X_CFG_TA_DLYS */
-/* Description: Turn around delays */
-#define SH_X_CFG_TA_DLYS_SHFT 8
-#define SH_X_CFG_TA_DLYS_MASK 0x000000ffffffff00
-
-/* SH_X_CFG_DA_BB_CLR */
-/* Description: Bank busy CPs for a data read request */
-#define SH_X_CFG_DA_BB_CLR_SHFT 40
-#define SH_X_CFG_DA_BB_CLR_MASK 0x00000f0000000000
-
-/* SH_X_CFG_DC_BB_CLR */
-/* Description: Bank busy CPs for a directory cache read request */
-#define SH_X_CFG_DC_BB_CLR_SHFT 44
-#define SH_X_CFG_DC_BB_CLR_MASK 0x0000f00000000000
-
-/* SH_X_CFG_WT_BB_CLR */
-/* Description: Bank busy CPs for all write request */
-#define SH_X_CFG_WT_BB_CLR_SHFT 48
-#define SH_X_CFG_WT_BB_CLR_MASK 0x000f000000000000
-
-/* SH_X_CFG_SSO_WT_EN */
-/* Description: Simultaneous switching enabled on output data pins */
-#define SH_X_CFG_SSO_WT_EN_SHFT 52
-#define SH_X_CFG_SSO_WT_EN_MASK 0x0010000000000000
-
-/* SH_X_CFG_TRCD2_EN */
-/* Description: Trcd, ras to cas delay of 2 CPs enabled */
-#define SH_X_CFG_TRCD2_EN_SHFT 53
-#define SH_X_CFG_TRCD2_EN_MASK 0x0020000000000000
-
-/* SH_X_CFG_TRCD4_EN */
-/* Description: Trcd, ras to case delay of 4 CPs enabled */
-#define SH_X_CFG_TRCD4_EN_SHFT 54
-#define SH_X_CFG_TRCD4_EN_MASK 0x0040000000000000
-
-/* SH_X_CFG_REQ_CNTR_DIS */
-/* Description: Request delay counter disabled */
-#define SH_X_CFG_REQ_CNTR_DIS_SHFT 55
-#define SH_X_CFG_REQ_CNTR_DIS_MASK 0x0080000000000000
-
-/* SH_X_CFG_REQ_CNTR_VAL */
-/* Description: Request counter delay value in CPs */
-#define SH_X_CFG_REQ_CNTR_VAL_SHFT 56
-#define SH_X_CFG_REQ_CNTR_VAL_MASK 0x3f00000000000000
-
-/* SH_X_CFG_INV_CAS_ADDR */
-/* Description: Invert cas address bits 3 to 7 */
-#define SH_X_CFG_INV_CAS_ADDR_SHFT 62
-#define SH_X_CFG_INV_CAS_ADDR_MASK 0x4000000000000000
-
-/* SH_X_CFG_CLR_DIR_CACHE */
-/* Description: Clear directory cache tags */
-#define SH_X_CFG_CLR_DIR_CACHE_SHFT 63
-#define SH_X_CFG_CLR_DIR_CACHE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_X_DQCT_CFG" */
-/* AC Config Registers */
-/* ==================================================================== */
-
-#define SH_X_DQCT_CFG 0x0000000100010028
-#define SH_X_DQCT_CFG_MASK 0x0000000000ffffff
-#define SH_X_DQCT_CFG_INIT 0x0000000000585418
-
-/* SH_X_DQCT_CFG_RD_SEL */
-/* Description: Read data select */
-#define SH_X_DQCT_CFG_RD_SEL_SHFT 0
-#define SH_X_DQCT_CFG_RD_SEL_MASK 0x000000000000000f
-
-/* SH_X_DQCT_CFG_WT_SEL */
-/* Description: Write data select */
-#define SH_X_DQCT_CFG_WT_SEL_SHFT 4
-#define SH_X_DQCT_CFG_WT_SEL_MASK 0x00000000000000f0
-
-/* SH_X_DQCT_CFG_DTA_RD_SEL */
-/* Description: Data ready read select */
-#define SH_X_DQCT_CFG_DTA_RD_SEL_SHFT 8
-#define SH_X_DQCT_CFG_DTA_RD_SEL_MASK 0x0000000000000f00
-
-/* SH_X_DQCT_CFG_DTA_WT_SEL */
-/* Description: Data ready write select */
-#define SH_X_DQCT_CFG_DTA_WT_SEL_SHFT 12
-#define SH_X_DQCT_CFG_DTA_WT_SEL_MASK 0x000000000000f000
-
-/* SH_X_DQCT_CFG_DIR_RD_SEL */
-/* Description: Dir ready read select */
-#define SH_X_DQCT_CFG_DIR_RD_SEL_SHFT 16
-#define SH_X_DQCT_CFG_DIR_RD_SEL_MASK 0x00000000000f0000
-
-/* SH_X_DQCT_CFG_MDIR_RD_SEL */
-/* Description: Dir ready read select */
-#define SH_X_DQCT_CFG_MDIR_RD_SEL_SHFT 20
-#define SH_X_DQCT_CFG_MDIR_RD_SEL_MASK 0x0000000000f00000
-
-/* ==================================================================== */
-/* Register "SH_X_REFRESH_CONTROL" */
-/* Refresh Control Register */
-/* ==================================================================== */
-
-#define SH_X_REFRESH_CONTROL 0x0000000100010030
-#define SH_X_REFRESH_CONTROL_MASK 0x000000000fffffff
-#define SH_X_REFRESH_CONTROL_INIT 0x00000000009cc300
-
-/* SH_X_REFRESH_CONTROL_ENABLE */
-/* Description: Refresh enable */
-#define SH_X_REFRESH_CONTROL_ENABLE_SHFT 0
-#define SH_X_REFRESH_CONTROL_ENABLE_MASK 0x00000000000000ff
-
-/* SH_X_REFRESH_CONTROL_INTERVAL */
-/* Description: Refresh interval in core CPs */
-#define SH_X_REFRESH_CONTROL_INTERVAL_SHFT 8
-#define SH_X_REFRESH_CONTROL_INTERVAL_MASK 0x000000000001ff00
-
-/* SH_X_REFRESH_CONTROL_HOLD */
-/* Description: Refresh hold */
-#define SH_X_REFRESH_CONTROL_HOLD_SHFT 17
-#define SH_X_REFRESH_CONTROL_HOLD_MASK 0x00000000007e0000
-
-/* SH_X_REFRESH_CONTROL_INTERLEAVE */
-/* Description: Refresh interleave */
-#define SH_X_REFRESH_CONTROL_INTERLEAVE_SHFT 23
-#define SH_X_REFRESH_CONTROL_INTERLEAVE_MASK 0x0000000000800000
-
-/* SH_X_REFRESH_CONTROL_HALF_RATE */
-/* Description: Refresh half rate */
-#define SH_X_REFRESH_CONTROL_HALF_RATE_SHFT 24
-#define SH_X_REFRESH_CONTROL_HALF_RATE_MASK 0x000000000f000000
-
-/* ==================================================================== */
-/* Register "SH_Y_PHASE_CFG" */
-/* AC Phase Config Registers */
-/* ==================================================================== */
-
-#define SH_Y_PHASE_CFG 0x0000000100010038
-#define SH_Y_PHASE_CFG_MASK 0x7fffffffffffffff
-#define SH_Y_PHASE_CFG_INIT 0x0000000000000000
-
-/* SH_Y_PHASE_CFG_LD_A */
-/* Description: Address, control load core clock A latch */
-#define SH_Y_PHASE_CFG_LD_A_SHFT 0
-#define SH_Y_PHASE_CFG_LD_A_MASK 0x000000000000001f
-
-/* SH_Y_PHASE_CFG_LD_B */
-/* Description: Address, control load core clock B latch */
-#define SH_Y_PHASE_CFG_LD_B_SHFT 5
-#define SH_Y_PHASE_CFG_LD_B_MASK 0x00000000000003e0
-
-/* SH_Y_PHASE_CFG_DQ_LD_A */
-/* Description: DATA MCI load core clock A latch */
-#define SH_Y_PHASE_CFG_DQ_LD_A_SHFT 10
-#define SH_Y_PHASE_CFG_DQ_LD_A_MASK 0x0000000000007c00
-
-/* SH_Y_PHASE_CFG_DQ_LD_B */
-/* Description: DATA MCI load core clock B latch */
-#define SH_Y_PHASE_CFG_DQ_LD_B_SHFT 15
-#define SH_Y_PHASE_CFG_DQ_LD_B_MASK 0x00000000000f8000
-
-/* SH_Y_PHASE_CFG_HOLD */
-/* Description: Hold request on core clock phase */
-#define SH_Y_PHASE_CFG_HOLD_SHFT 20
-#define SH_Y_PHASE_CFG_HOLD_MASK 0x0000000001f00000
-
-/* SH_Y_PHASE_CFG_HOLD_REQ */
-/* Description: Hold next request on core clock phase */
-#define SH_Y_PHASE_CFG_HOLD_REQ_SHFT 25
-#define SH_Y_PHASE_CFG_HOLD_REQ_MASK 0x000000003e000000
-
-/* SH_Y_PHASE_CFG_ADD_CP */
-/* Description: add delay clock period to dqct delay chain on phase */
-#define SH_Y_PHASE_CFG_ADD_CP_SHFT 30
-#define SH_Y_PHASE_CFG_ADD_CP_MASK 0x00000007c0000000
-
-/* SH_Y_PHASE_CFG_BUBBLE_EN */
-/* Description: bubble, idle core clock to wait for memory clock */
-#define SH_Y_PHASE_CFG_BUBBLE_EN_SHFT 35
-#define SH_Y_PHASE_CFG_BUBBLE_EN_MASK 0x000000f800000000
-
-/* SH_Y_PHASE_CFG_PHA_BUBBLE */
-/* Description: MMR phaseA bubble value */
-#define SH_Y_PHASE_CFG_PHA_BUBBLE_SHFT 40
-#define SH_Y_PHASE_CFG_PHA_BUBBLE_MASK 0x0000070000000000
-
-/* SH_Y_PHASE_CFG_PHB_BUBBLE */
-/* Description: MMR phaseB bubble value */
-#define SH_Y_PHASE_CFG_PHB_BUBBLE_SHFT 43
-#define SH_Y_PHASE_CFG_PHB_BUBBLE_MASK 0x0000380000000000
-
-/* SH_Y_PHASE_CFG_PHC_BUBBLE */
-/* Description: MMR phaseC bubble value */
-#define SH_Y_PHASE_CFG_PHC_BUBBLE_SHFT 46
-#define SH_Y_PHASE_CFG_PHC_BUBBLE_MASK 0x0001c00000000000
-
-/* SH_Y_PHASE_CFG_PHD_BUBBLE */
-/* Description: MMR phaseD bubble value */
-#define SH_Y_PHASE_CFG_PHD_BUBBLE_SHFT 49
-#define SH_Y_PHASE_CFG_PHD_BUBBLE_MASK 0x000e000000000000
-
-/* SH_Y_PHASE_CFG_PHE_BUBBLE */
-/* Description: MMR phaseE bubble value */
-#define SH_Y_PHASE_CFG_PHE_BUBBLE_SHFT 52
-#define SH_Y_PHASE_CFG_PHE_BUBBLE_MASK 0x0070000000000000
-
-/* SH_Y_PHASE_CFG_SEL_A */
-/* Description: address,control select A memory clock latch */
-#define SH_Y_PHASE_CFG_SEL_A_SHFT 55
-#define SH_Y_PHASE_CFG_SEL_A_MASK 0x0780000000000000
-
-/* SH_Y_PHASE_CFG_DQ_SEL_A */
-/* Description: DATA MCI select A memory clock latch */
-#define SH_Y_PHASE_CFG_DQ_SEL_A_SHFT 59
-#define SH_Y_PHASE_CFG_DQ_SEL_A_MASK 0x7800000000000000
-
-/* ==================================================================== */
-/* Register "SH_Y_CFG" */
-/* AC Config Registers */
-/* ==================================================================== */
-
-#define SH_Y_CFG 0x0000000100010040
-#define SH_Y_CFG_MASK 0xffffffffffffffff
-#define SH_Y_CFG_INIT 0x108443103322100c
-
-/* SH_Y_CFG_MODE_SERIAL */
-/* Description: Arbque arbitration in serial mode */
-#define SH_Y_CFG_MODE_SERIAL_SHFT 0
-#define SH_Y_CFG_MODE_SERIAL_MASK 0x0000000000000001
-
-/* SH_Y_CFG_DIRC_RANDOM_REPLACEMENT */
-/* Description: Directory cache random replacement */
-#define SH_Y_CFG_DIRC_RANDOM_REPLACEMENT_SHFT 1
-#define SH_Y_CFG_DIRC_RANDOM_REPLACEMENT_MASK 0x0000000000000002
-
-/* SH_Y_CFG_DIR_COUNTER_INIT */
-/* Description: Dir counter initial value */
-#define SH_Y_CFG_DIR_COUNTER_INIT_SHFT 2
-#define SH_Y_CFG_DIR_COUNTER_INIT_MASK 0x00000000000000fc
-
-/* SH_Y_CFG_TA_DLYS */
-/* Description: Turn around delays */
-#define SH_Y_CFG_TA_DLYS_SHFT 8
-#define SH_Y_CFG_TA_DLYS_MASK 0x000000ffffffff00
-
-/* SH_Y_CFG_DA_BB_CLR */
-/* Description: Bank busy CPs for a data read request */
-#define SH_Y_CFG_DA_BB_CLR_SHFT 40
-#define SH_Y_CFG_DA_BB_CLR_MASK 0x00000f0000000000
-
-/* SH_Y_CFG_DC_BB_CLR */
-/* Description: Bank busy CPs for a directory cache read request */
-#define SH_Y_CFG_DC_BB_CLR_SHFT 44
-#define SH_Y_CFG_DC_BB_CLR_MASK 0x0000f00000000000
-
-/* SH_Y_CFG_WT_BB_CLR */
-/* Description: Bank busy CPs for all write request */
-#define SH_Y_CFG_WT_BB_CLR_SHFT 48
-#define SH_Y_CFG_WT_BB_CLR_MASK 0x000f000000000000
-
-/* SH_Y_CFG_SSO_WT_EN */
-/* Description: Simultaneous switching enabled on output data pins */
-#define SH_Y_CFG_SSO_WT_EN_SHFT 52
-#define SH_Y_CFG_SSO_WT_EN_MASK 0x0010000000000000
-
-/* SH_Y_CFG_TRCD2_EN */
-/* Description: Trcd, ras to cas delay of 2 CPs enabled */
-#define SH_Y_CFG_TRCD2_EN_SHFT 53
-#define SH_Y_CFG_TRCD2_EN_MASK 0x0020000000000000
-
-/* SH_Y_CFG_TRCD4_EN */
-/* Description: Trcd, ras to case delay of 4 CPs enabled */
-#define SH_Y_CFG_TRCD4_EN_SHFT 54
-#define SH_Y_CFG_TRCD4_EN_MASK 0x0040000000000000
-
-/* SH_Y_CFG_REQ_CNTR_DIS */
-/* Description: Request delay counter disabled */
-#define SH_Y_CFG_REQ_CNTR_DIS_SHFT 55
-#define SH_Y_CFG_REQ_CNTR_DIS_MASK 0x0080000000000000
-
-/* SH_Y_CFG_REQ_CNTR_VAL */
-/* Description: Request counter delay value in CPs */
-#define SH_Y_CFG_REQ_CNTR_VAL_SHFT 56
-#define SH_Y_CFG_REQ_CNTR_VAL_MASK 0x3f00000000000000
-
-/* SH_Y_CFG_INV_CAS_ADDR */
-/* Description: Invert cas address bits 3 to 7 */
-#define SH_Y_CFG_INV_CAS_ADDR_SHFT 62
-#define SH_Y_CFG_INV_CAS_ADDR_MASK 0x4000000000000000
-
-/* SH_Y_CFG_CLR_DIR_CACHE */
-/* Description: Clear directory cache tags */
-#define SH_Y_CFG_CLR_DIR_CACHE_SHFT 63
-#define SH_Y_CFG_CLR_DIR_CACHE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_Y_DQCT_CFG" */
-/* AC Config Registers */
-/* ==================================================================== */
-
-#define SH_Y_DQCT_CFG 0x0000000100010048
-#define SH_Y_DQCT_CFG_MASK 0x0000000000ffffff
-#define SH_Y_DQCT_CFG_INIT 0x0000000000585418
-
-/* SH_Y_DQCT_CFG_RD_SEL */
-/* Description: Read data select */
-#define SH_Y_DQCT_CFG_RD_SEL_SHFT 0
-#define SH_Y_DQCT_CFG_RD_SEL_MASK 0x000000000000000f
-
-/* SH_Y_DQCT_CFG_WT_SEL */
-/* Description: Write data select */
-#define SH_Y_DQCT_CFG_WT_SEL_SHFT 4
-#define SH_Y_DQCT_CFG_WT_SEL_MASK 0x00000000000000f0
-
-/* SH_Y_DQCT_CFG_DTA_RD_SEL */
-/* Description: Data ready read select */
-#define SH_Y_DQCT_CFG_DTA_RD_SEL_SHFT 8
-#define SH_Y_DQCT_CFG_DTA_RD_SEL_MASK 0x0000000000000f00
-
-/* SH_Y_DQCT_CFG_DTA_WT_SEL */
-/* Description: Data ready write select */
-#define SH_Y_DQCT_CFG_DTA_WT_SEL_SHFT 12
-#define SH_Y_DQCT_CFG_DTA_WT_SEL_MASK 0x000000000000f000
-
-/* SH_Y_DQCT_CFG_DIR_RD_SEL */
-/* Description: Dir ready read select */
-#define SH_Y_DQCT_CFG_DIR_RD_SEL_SHFT 16
-#define SH_Y_DQCT_CFG_DIR_RD_SEL_MASK 0x00000000000f0000
-
-/* SH_Y_DQCT_CFG_MDIR_RD_SEL */
-/* Description: Dir ready read select */
-#define SH_Y_DQCT_CFG_MDIR_RD_SEL_SHFT 20
-#define SH_Y_DQCT_CFG_MDIR_RD_SEL_MASK 0x0000000000f00000
-
-/* ==================================================================== */
-/* Register "SH_Y_REFRESH_CONTROL" */
-/* Refresh Control Register */
-/* ==================================================================== */
-
-#define SH_Y_REFRESH_CONTROL 0x0000000100010050
-#define SH_Y_REFRESH_CONTROL_MASK 0x000000000fffffff
-#define SH_Y_REFRESH_CONTROL_INIT 0x00000000009cc300
-
-/* SH_Y_REFRESH_CONTROL_ENABLE */
-/* Description: Refresh enable */
-#define SH_Y_REFRESH_CONTROL_ENABLE_SHFT 0
-#define SH_Y_REFRESH_CONTROL_ENABLE_MASK 0x00000000000000ff
-
-/* SH_Y_REFRESH_CONTROL_INTERVAL */
-/* Description: Refresh interval in core CPs */
-#define SH_Y_REFRESH_CONTROL_INTERVAL_SHFT 8
-#define SH_Y_REFRESH_CONTROL_INTERVAL_MASK 0x000000000001ff00
-
-/* SH_Y_REFRESH_CONTROL_HOLD */
-/* Description: Refresh hold */
-#define SH_Y_REFRESH_CONTROL_HOLD_SHFT 17
-#define SH_Y_REFRESH_CONTROL_HOLD_MASK 0x00000000007e0000
-
-/* SH_Y_REFRESH_CONTROL_INTERLEAVE */
-/* Description: Refresh interleave */
-#define SH_Y_REFRESH_CONTROL_INTERLEAVE_SHFT 23
-#define SH_Y_REFRESH_CONTROL_INTERLEAVE_MASK 0x0000000000800000
-
-/* SH_Y_REFRESH_CONTROL_HALF_RATE */
-/* Description: Refresh half rate */
-#define SH_Y_REFRESH_CONTROL_HALF_RATE_SHFT 24
-#define SH_Y_REFRESH_CONTROL_HALF_RATE_MASK 0x000000000f000000
-
-/* ==================================================================== */
-/* Register "SH_MEM_RED_BLACK" */
-/* MD fairness watchdog timers */
-/* ==================================================================== */
-
-#define SH_MEM_RED_BLACK 0x0000000100010058
-#define SH_MEM_RED_BLACK_MASK 0x000fffffffffffff
-#define SH_MEM_RED_BLACK_INIT 0x0000000040000400
-
-/* SH_MEM_RED_BLACK_TIME */
-/* Description: Clocks to tag references with a given color */
-#define SH_MEM_RED_BLACK_TIME_SHFT 0
-#define SH_MEM_RED_BLACK_TIME_MASK 0x000000000000ffff
-
-/* SH_MEM_RED_BLACK_ERR_TIME */
-/* Description: Max clocks to wait after red/black change for old c */
-/* olor to clear. */
-#define SH_MEM_RED_BLACK_ERR_TIME_SHFT 16
-#define SH_MEM_RED_BLACK_ERR_TIME_MASK 0x000fffffffff0000
-
-/* ==================================================================== */
-/* Register "SH_MISC_MEM_CFG" */
-/* ==================================================================== */
-
-#define SH_MISC_MEM_CFG 0x0000000100010060
-#define SH_MISC_MEM_CFG_MASK 0x0013f1f1fff3f3ff
-#define SH_MISC_MEM_CFG_INIT 0x0000000000010107
-
-/* SH_MISC_MEM_CFG_EXPRESS_HEADER_ENABLE */
-/* Description: enables the use of express headers from md to pi */
-#define SH_MISC_MEM_CFG_EXPRESS_HEADER_ENABLE_SHFT 0
-#define SH_MISC_MEM_CFG_EXPRESS_HEADER_ENABLE_MASK 0x0000000000000001
-
-/* SH_MISC_MEM_CFG_SPEC_HEADER_ENABLE */
-/* Description: enables the use of speculative headers from md to p */
-#define SH_MISC_MEM_CFG_SPEC_HEADER_ENABLE_SHFT 1
-#define SH_MISC_MEM_CFG_SPEC_HEADER_ENABLE_MASK 0x0000000000000002
-
-/* SH_MISC_MEM_CFG_JNR_BYPASS_ENABLE */
-/* Description: enables bypass path for requests going through ac */
-#define SH_MISC_MEM_CFG_JNR_BYPASS_ENABLE_SHFT 2
-#define SH_MISC_MEM_CFG_JNR_BYPASS_ENABLE_MASK 0x0000000000000004
-
-/* SH_MISC_MEM_CFG_XN_RD_SAME_AS_PI */
-/* Description: disables a one clock delay of XN read data */
-#define SH_MISC_MEM_CFG_XN_RD_SAME_AS_PI_SHFT 3
-#define SH_MISC_MEM_CFG_XN_RD_SAME_AS_PI_MASK 0x0000000000000008
-
-/* SH_MISC_MEM_CFG_LOW_WRITE_BUFFER_THRESHOLD */
-/* Description: point at which data writes get higher priority */
-#define SH_MISC_MEM_CFG_LOW_WRITE_BUFFER_THRESHOLD_SHFT 4
-#define SH_MISC_MEM_CFG_LOW_WRITE_BUFFER_THRESHOLD_MASK 0x00000000000003f0
-
-/* SH_MISC_MEM_CFG_LOW_VICTIM_BUFFER_THRESHOLD */
-/* Description: point at which dir cache writes get higher priority */
-#define SH_MISC_MEM_CFG_LOW_VICTIM_BUFFER_THRESHOLD_SHFT 12
-#define SH_MISC_MEM_CFG_LOW_VICTIM_BUFFER_THRESHOLD_MASK 0x000000000003f000
-
-/* SH_MISC_MEM_CFG_THROTTLE_CNT */
-/* Description: number of clocks between accepting references */
-#define SH_MISC_MEM_CFG_THROTTLE_CNT_SHFT 20
-#define SH_MISC_MEM_CFG_THROTTLE_CNT_MASK 0x000000000ff00000
-
-/* SH_MISC_MEM_CFG_DISABLED_READ_TNUMS */
-/* Description: number of read tnums to take out of circulation */
-#define SH_MISC_MEM_CFG_DISABLED_READ_TNUMS_SHFT 28
-#define SH_MISC_MEM_CFG_DISABLED_READ_TNUMS_MASK 0x00000001f0000000
-
-/* SH_MISC_MEM_CFG_DISABLED_WRITE_TNUMS */
-/* Description: number of write tnums to take out of circulation */
-#define SH_MISC_MEM_CFG_DISABLED_WRITE_TNUMS_SHFT 36
-#define SH_MISC_MEM_CFG_DISABLED_WRITE_TNUMS_MASK 0x000001f000000000
-
-/* SH_MISC_MEM_CFG_DISABLED_VICTIMS */
-/* Description: number of dir cache victim buffers to take out of c */
-/* irculation in each quadrant of the MD */
-#define SH_MISC_MEM_CFG_DISABLED_VICTIMS_SHFT 44
-#define SH_MISC_MEM_CFG_DISABLED_VICTIMS_MASK 0x0003f00000000000
-
-/* SH_MISC_MEM_CFG_ALTERNATE_XN_RP_PLANE */
-/* Description: enables plane alternating for replies to XN */
-#define SH_MISC_MEM_CFG_ALTERNATE_XN_RP_PLANE_SHFT 52
-#define SH_MISC_MEM_CFG_ALTERNATE_XN_RP_PLANE_MASK 0x0010000000000000
-
-/* ==================================================================== */
-/* Register "SH_PIO_RQ_CRD_CTL" */
-/* pio_rq Credit Circulation Control */
-/* ==================================================================== */
-
-#define SH_PIO_RQ_CRD_CTL 0x0000000100010068
-#define SH_PIO_RQ_CRD_CTL_MASK 0x000000000000003f
-#define SH_PIO_RQ_CRD_CTL_INIT 0x0000000000000002
-
-/* SH_PIO_RQ_CRD_CTL_DEPTH */
-/* Description: Total depth of buffering (in sic packets) */
-#define SH_PIO_RQ_CRD_CTL_DEPTH_SHFT 0
-#define SH_PIO_RQ_CRD_CTL_DEPTH_MASK 0x000000000000003f
-
-/* ==================================================================== */
-/* Register "SH_PI_MD_RQ_CRD_CTL" */
-/* pi_md_rq Credit Circulation Control */
-/* ==================================================================== */
-
-#define SH_PI_MD_RQ_CRD_CTL 0x0000000100010070
-#define SH_PI_MD_RQ_CRD_CTL_MASK 0x000000000000003f
-#define SH_PI_MD_RQ_CRD_CTL_INIT 0x0000000000000008
-
-/* SH_PI_MD_RQ_CRD_CTL_DEPTH */
-/* Description: Total depth of buffering (in sic packets) */
-#define SH_PI_MD_RQ_CRD_CTL_DEPTH_SHFT 0
-#define SH_PI_MD_RQ_CRD_CTL_DEPTH_MASK 0x000000000000003f
-
-/* ==================================================================== */
-/* Register "SH_PI_MD_RP_CRD_CTL" */
-/* pi_md_rp Credit Circulation Control */
-/* ==================================================================== */
-
-#define SH_PI_MD_RP_CRD_CTL 0x0000000100010078
-#define SH_PI_MD_RP_CRD_CTL_MASK 0x000000000000003f
-#define SH_PI_MD_RP_CRD_CTL_INIT 0x0000000000000004
-
-/* SH_PI_MD_RP_CRD_CTL_DEPTH */
-/* Description: Total depth of buffering (in sic packets) */
-#define SH_PI_MD_RP_CRD_CTL_DEPTH_SHFT 0
-#define SH_PI_MD_RP_CRD_CTL_DEPTH_MASK 0x000000000000003f
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_RQ_CRD_CTL" */
-/* xn_md_rq Credit Circulation Control */
-/* ==================================================================== */
-
-#define SH_XN_MD_RQ_CRD_CTL 0x0000000100010080
-#define SH_XN_MD_RQ_CRD_CTL_MASK 0x000000000000003f
-#define SH_XN_MD_RQ_CRD_CTL_INIT 0x0000000000000008
-
-/* SH_XN_MD_RQ_CRD_CTL_DEPTH */
-/* Description: Total depth of buffering (in sic packets) */
-#define SH_XN_MD_RQ_CRD_CTL_DEPTH_SHFT 0
-#define SH_XN_MD_RQ_CRD_CTL_DEPTH_MASK 0x000000000000003f
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_RP_CRD_CTL" */
-/* xn_md_rp Credit Circulation Control */
-/* ==================================================================== */
-
-#define SH_XN_MD_RP_CRD_CTL 0x0000000100010088
-#define SH_XN_MD_RP_CRD_CTL_MASK 0x000000000000003f
-#define SH_XN_MD_RP_CRD_CTL_INIT 0x0000000000000004
-
-/* SH_XN_MD_RP_CRD_CTL_DEPTH */
-/* Description: Total depth of buffering (in sic packets) */
-#define SH_XN_MD_RP_CRD_CTL_DEPTH_SHFT 0
-#define SH_XN_MD_RP_CRD_CTL_DEPTH_MASK 0x000000000000003f
-
-/* ==================================================================== */
-/* Register "SH_X_TAG0" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_X_TAG0 0x0000000100020000
-#define SH_X_TAG0_MASK 0x00000000000fffff
-#define SH_X_TAG0_INIT 0x0000000000000000
-
-/* SH_X_TAG0_TAG */
-/* Description: Valid + Tag Address */
-#define SH_X_TAG0_TAG_SHFT 0
-#define SH_X_TAG0_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_X_TAG1" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_X_TAG1 0x0000000100020008
-#define SH_X_TAG1_MASK 0x00000000000fffff
-#define SH_X_TAG1_INIT 0x0000000000000000
-
-/* SH_X_TAG1_TAG */
-/* Description: Valid + Tag Address */
-#define SH_X_TAG1_TAG_SHFT 0
-#define SH_X_TAG1_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_X_TAG2" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_X_TAG2 0x0000000100020010
-#define SH_X_TAG2_MASK 0x00000000000fffff
-#define SH_X_TAG2_INIT 0x0000000000000000
-
-/* SH_X_TAG2_TAG */
-/* Description: Valid + Tag Address */
-#define SH_X_TAG2_TAG_SHFT 0
-#define SH_X_TAG2_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_X_TAG3" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_X_TAG3 0x0000000100020018
-#define SH_X_TAG3_MASK 0x00000000000fffff
-#define SH_X_TAG3_INIT 0x0000000000000000
-
-/* SH_X_TAG3_TAG */
-/* Description: Valid + Tag Address */
-#define SH_X_TAG3_TAG_SHFT 0
-#define SH_X_TAG3_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_X_TAG4" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_X_TAG4 0x0000000100020020
-#define SH_X_TAG4_MASK 0x00000000000fffff
-#define SH_X_TAG4_INIT 0x0000000000000000
-
-/* SH_X_TAG4_TAG */
-/* Description: Valid + Tag Address */
-#define SH_X_TAG4_TAG_SHFT 0
-#define SH_X_TAG4_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_X_TAG5" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_X_TAG5 0x0000000100020028
-#define SH_X_TAG5_MASK 0x00000000000fffff
-#define SH_X_TAG5_INIT 0x0000000000000000
-
-/* SH_X_TAG5_TAG */
-/* Description: Valid + Tag Address */
-#define SH_X_TAG5_TAG_SHFT 0
-#define SH_X_TAG5_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_X_TAG6" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_X_TAG6 0x0000000100020030
-#define SH_X_TAG6_MASK 0x00000000000fffff
-#define SH_X_TAG6_INIT 0x0000000000000000
-
-/* SH_X_TAG6_TAG */
-/* Description: Valid + Tag Address */
-#define SH_X_TAG6_TAG_SHFT 0
-#define SH_X_TAG6_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_X_TAG7" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_X_TAG7 0x0000000100020038
-#define SH_X_TAG7_MASK 0x00000000000fffff
-#define SH_X_TAG7_INIT 0x0000000000000000
-
-/* SH_X_TAG7_TAG */
-/* Description: Valid + Tag Address */
-#define SH_X_TAG7_TAG_SHFT 0
-#define SH_X_TAG7_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG0" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_Y_TAG0 0x0000000100020040
-#define SH_Y_TAG0_MASK 0x00000000000fffff
-#define SH_Y_TAG0_INIT 0x0000000000000000
-
-/* SH_Y_TAG0_TAG */
-/* Description: Valid + Tag Address */
-#define SH_Y_TAG0_TAG_SHFT 0
-#define SH_Y_TAG0_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG1" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_Y_TAG1 0x0000000100020048
-#define SH_Y_TAG1_MASK 0x00000000000fffff
-#define SH_Y_TAG1_INIT 0x0000000000000000
-
-/* SH_Y_TAG1_TAG */
-/* Description: Valid + Tag Address */
-#define SH_Y_TAG1_TAG_SHFT 0
-#define SH_Y_TAG1_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG2" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_Y_TAG2 0x0000000100020050
-#define SH_Y_TAG2_MASK 0x00000000000fffff
-#define SH_Y_TAG2_INIT 0x0000000000000000
-
-/* SH_Y_TAG2_TAG */
-/* Description: Valid + Tag Address */
-#define SH_Y_TAG2_TAG_SHFT 0
-#define SH_Y_TAG2_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG3" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_Y_TAG3 0x0000000100020058
-#define SH_Y_TAG3_MASK 0x00000000000fffff
-#define SH_Y_TAG3_INIT 0x0000000000000000
-
-/* SH_Y_TAG3_TAG */
-/* Description: Valid + Tag Address */
-#define SH_Y_TAG3_TAG_SHFT 0
-#define SH_Y_TAG3_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG4" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_Y_TAG4 0x0000000100020060
-#define SH_Y_TAG4_MASK 0x00000000000fffff
-#define SH_Y_TAG4_INIT 0x0000000000000000
-
-/* SH_Y_TAG4_TAG */
-/* Description: Valid + Tag Address */
-#define SH_Y_TAG4_TAG_SHFT 0
-#define SH_Y_TAG4_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG5" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_Y_TAG5 0x0000000100020068
-#define SH_Y_TAG5_MASK 0x00000000000fffff
-#define SH_Y_TAG5_INIT 0x0000000000000000
-
-/* SH_Y_TAG5_TAG */
-/* Description: Valid + Tag Address */
-#define SH_Y_TAG5_TAG_SHFT 0
-#define SH_Y_TAG5_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG6" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_Y_TAG6 0x0000000100020070
-#define SH_Y_TAG6_MASK 0x00000000000fffff
-#define SH_Y_TAG6_INIT 0x0000000000000000
-
-/* SH_Y_TAG6_TAG */
-/* Description: Valid + Tag Address */
-#define SH_Y_TAG6_TAG_SHFT 0
-#define SH_Y_TAG6_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG7" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-#define SH_Y_TAG7 0x0000000100020078
-#define SH_Y_TAG7_MASK 0x00000000000fffff
-#define SH_Y_TAG7_INIT 0x0000000000000000
-
-/* SH_Y_TAG7_TAG */
-/* Description: Valid + Tag Address */
-#define SH_Y_TAG7_TAG_SHFT 0
-#define SH_Y_TAG7_TAG_MASK 0x00000000000fffff
-
-/* ==================================================================== */
-/* Register "SH_MMRBIST_BASE" */
-/* mmr/bist base address */
-/* ==================================================================== */
-
-#define SH_MMRBIST_BASE 0x0000000100020080
-#define SH_MMRBIST_BASE_MASK 0x0003fffffffffff8
-#define SH_MMRBIST_BASE_INIT 0x0000000000000000
-
-/* SH_MMRBIST_BASE_DWORD_ADDR */
-/* Description: bits 49:3 of the memory address */
-#define SH_MMRBIST_BASE_DWORD_ADDR_SHFT 3
-#define SH_MMRBIST_BASE_DWORD_ADDR_MASK 0x0003fffffffffff8
-
-/* ==================================================================== */
-/* Register "SH_MMRBIST_CTL" */
-/* Bist base address */
-/* ==================================================================== */
-
-#define SH_MMRBIST_CTL 0x0000000100020088
-#define SH_MMRBIST_CTL_MASK 0x0000177f7fffffff
-#define SH_MMRBIST_CTL_INIT 0x0000000000000000
-
-/* SH_MMRBIST_CTL_BLOCK_LENGTH */
-/* Description: number of dwords in operation */
-#define SH_MMRBIST_CTL_BLOCK_LENGTH_SHFT 0
-#define SH_MMRBIST_CTL_BLOCK_LENGTH_MASK 0x000000007fffffff
-
-/* SH_MMRBIST_CTL_CMD */
-/* Description: mmr/bist function */
-#define SH_MMRBIST_CTL_CMD_SHFT 32
-#define SH_MMRBIST_CTL_CMD_MASK 0x0000007f00000000
-
-/* SH_MMRBIST_CTL_IN_PROGRESS */
-/* Description: writing a 1 starts operation, hardware clears on co */
-/* mpletion */
-#define SH_MMRBIST_CTL_IN_PROGRESS_SHFT 40
-#define SH_MMRBIST_CTL_IN_PROGRESS_MASK 0x0000010000000000
-
-/* SH_MMRBIST_CTL_FAIL */
-/* Description: mmr/bist had a data or address error */
-#define SH_MMRBIST_CTL_FAIL_SHFT 41
-#define SH_MMRBIST_CTL_FAIL_MASK 0x0000020000000000
-
-/* SH_MMRBIST_CTL_MEM_IDLE */
-/* Description: all memory activity is complete */
-#define SH_MMRBIST_CTL_MEM_IDLE_SHFT 42
-#define SH_MMRBIST_CTL_MEM_IDLE_MASK 0x0000040000000000
-
-/* SH_MMRBIST_CTL_RESET_STATE */
-/* Description: writing a 1 resets mmrbist hardware, hardware clear */
-/* s on completion */
-#define SH_MMRBIST_CTL_RESET_STATE_SHFT 44
-#define SH_MMRBIST_CTL_RESET_STATE_MASK 0x0000100000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DBUG_DATA_CFG" */
-/* configuration for md debug data muxes */
-/* ==================================================================== */
-
-#define SH_MD_DBUG_DATA_CFG 0x0000000100020100
-#define SH_MD_DBUG_DATA_CFG_MASK 0x7777777777777777
-#define SH_MD_DBUG_DATA_CFG_INIT 0x0000000000000000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE0_CHIPLET */
-/* Description: selects which md chiplet drives nibble0 */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE0_CHIPLET_SHFT 0
-#define SH_MD_DBUG_DATA_CFG_NIBBLE0_CHIPLET_MASK 0x0000000000000007
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE0_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE0_NIBBLE_SHFT 4
-#define SH_MD_DBUG_DATA_CFG_NIBBLE0_NIBBLE_MASK 0x0000000000000070
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE1_CHIPLET */
-/* Description: selects which md chiplet drives nibble1 */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE1_CHIPLET_SHFT 8
-#define SH_MD_DBUG_DATA_CFG_NIBBLE1_CHIPLET_MASK 0x0000000000000700
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE1_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE1_NIBBLE_SHFT 12
-#define SH_MD_DBUG_DATA_CFG_NIBBLE1_NIBBLE_MASK 0x0000000000007000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE2_CHIPLET */
-/* Description: selects which md chiplet drives nibble2 */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE2_CHIPLET_SHFT 16
-#define SH_MD_DBUG_DATA_CFG_NIBBLE2_CHIPLET_MASK 0x0000000000070000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE2_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE2_NIBBLE_SHFT 20
-#define SH_MD_DBUG_DATA_CFG_NIBBLE2_NIBBLE_MASK 0x0000000000700000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE3_CHIPLET */
-/* Description: selects which md chiplet drives nibble3 */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE3_CHIPLET_SHFT 24
-#define SH_MD_DBUG_DATA_CFG_NIBBLE3_CHIPLET_MASK 0x0000000007000000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE3_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE3_NIBBLE_SHFT 28
-#define SH_MD_DBUG_DATA_CFG_NIBBLE3_NIBBLE_MASK 0x0000000070000000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE4_CHIPLET */
-/* Description: selects which md chiplet drives nibble4 */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE4_CHIPLET_SHFT 32
-#define SH_MD_DBUG_DATA_CFG_NIBBLE4_CHIPLET_MASK 0x0000000700000000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE4_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE4_NIBBLE_SHFT 36
-#define SH_MD_DBUG_DATA_CFG_NIBBLE4_NIBBLE_MASK 0x0000007000000000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE5_CHIPLET */
-/* Description: selects which md chiplet drives nibble5 */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE5_CHIPLET_SHFT 40
-#define SH_MD_DBUG_DATA_CFG_NIBBLE5_CHIPLET_MASK 0x0000070000000000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE5_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE5_NIBBLE_SHFT 44
-#define SH_MD_DBUG_DATA_CFG_NIBBLE5_NIBBLE_MASK 0x0000700000000000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE6_CHIPLET */
-/* Description: selects which md chiplet drives nibble6 */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE6_CHIPLET_SHFT 48
-#define SH_MD_DBUG_DATA_CFG_NIBBLE6_CHIPLET_MASK 0x0007000000000000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE6_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE6_NIBBLE_SHFT 52
-#define SH_MD_DBUG_DATA_CFG_NIBBLE6_NIBBLE_MASK 0x0070000000000000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE7_CHIPLET */
-/* Description: selects which md chiplet drives nibble7 */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE7_CHIPLET_SHFT 56
-#define SH_MD_DBUG_DATA_CFG_NIBBLE7_CHIPLET_MASK 0x0700000000000000
-
-/* SH_MD_DBUG_DATA_CFG_NIBBLE7_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_DATA_CFG_NIBBLE7_NIBBLE_SHFT 60
-#define SH_MD_DBUG_DATA_CFG_NIBBLE7_NIBBLE_MASK 0x7000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DBUG_TRIGGER_CFG" */
-/* configuration for md debug triggers */
-/* ==================================================================== */
-
-#define SH_MD_DBUG_TRIGGER_CFG 0x0000000100020108
-#define SH_MD_DBUG_TRIGGER_CFG_MASK 0xf777777777777777
-#define SH_MD_DBUG_TRIGGER_CFG_INIT 0x0000000000000000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE0_CHIPLET */
-/* Description: selects which md chiplet drives nibble0 */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE0_CHIPLET_SHFT 0
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE0_CHIPLET_MASK 0x0000000000000007
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE0_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE0_NIBBLE_SHFT 4
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE0_NIBBLE_MASK 0x0000000000000070
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE1_CHIPLET */
-/* Description: selects which md chiplet drives nibble1 */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE1_CHIPLET_SHFT 8
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE1_CHIPLET_MASK 0x0000000000000700
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE1_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE1_NIBBLE_SHFT 12
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE1_NIBBLE_MASK 0x0000000000007000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE2_CHIPLET */
-/* Description: selects which md chiplet drives nibble2 */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE2_CHIPLET_SHFT 16
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE2_CHIPLET_MASK 0x0000000000070000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE2_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE2_NIBBLE_SHFT 20
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE2_NIBBLE_MASK 0x0000000000700000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE3_CHIPLET */
-/* Description: selects which md chiplet drives nibble3 */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE3_CHIPLET_SHFT 24
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE3_CHIPLET_MASK 0x0000000007000000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE3_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE3_NIBBLE_SHFT 28
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE3_NIBBLE_MASK 0x0000000070000000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE4_CHIPLET */
-/* Description: selects which md chiplet drives nibble4 */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE4_CHIPLET_SHFT 32
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE4_CHIPLET_MASK 0x0000000700000000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE4_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE4_NIBBLE_SHFT 36
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE4_NIBBLE_MASK 0x0000007000000000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE5_CHIPLET */
-/* Description: selects which md chiplet drives nibble5 */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE5_CHIPLET_SHFT 40
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE5_CHIPLET_MASK 0x0000070000000000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE5_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE5_NIBBLE_SHFT 44
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE5_NIBBLE_MASK 0x0000700000000000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE6_CHIPLET */
-/* Description: selects which md chiplet drives nibble6 */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE6_CHIPLET_SHFT 48
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE6_CHIPLET_MASK 0x0007000000000000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE6_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE6_NIBBLE_SHFT 52
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE6_NIBBLE_MASK 0x0070000000000000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE7_CHIPLET */
-/* Description: selects which md chiplet drives nibble7 */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE7_CHIPLET_SHFT 56
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE7_CHIPLET_MASK 0x0700000000000000
-
-/* SH_MD_DBUG_TRIGGER_CFG_NIBBLE7_NIBBLE */
-/* Description: selects which nibble from selected chiplet drives n */
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE7_NIBBLE_SHFT 60
-#define SH_MD_DBUG_TRIGGER_CFG_NIBBLE7_NIBBLE_MASK 0x7000000000000000
-
-/* SH_MD_DBUG_TRIGGER_CFG_ENABLE */
-/* Description: enables triggering on pattern match */
-#define SH_MD_DBUG_TRIGGER_CFG_ENABLE_SHFT 63
-#define SH_MD_DBUG_TRIGGER_CFG_ENABLE_MASK 0x8000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DBUG_COMPARE" */
-/* md debug compare pattern and mask */
-/* ==================================================================== */
-
-#define SH_MD_DBUG_COMPARE 0x0000000100020110
-#define SH_MD_DBUG_COMPARE_MASK 0xffffffffffffffff
-#define SH_MD_DBUG_COMPARE_INIT 0x0000000000000000
-
-/* SH_MD_DBUG_COMPARE_PATTERN */
-/* Description: pattern against which to compare dbug data for trig */
-#define SH_MD_DBUG_COMPARE_PATTERN_SHFT 0
-#define SH_MD_DBUG_COMPARE_PATTERN_MASK 0x00000000ffffffff
-
-/* SH_MD_DBUG_COMPARE_MASK */
-/* Description: bits to include in compare of dbug data for trigger */
-#define SH_MD_DBUG_COMPARE_MASK_SHFT 32
-#define SH_MD_DBUG_COMPARE_MASK_MASK 0xffffffff00000000
-
-/* ==================================================================== */
-/* Register "SH_X_MOD_DBUG_SEL" */
-/* MD acx debug select */
-/* ==================================================================== */
-
-#define SH_X_MOD_DBUG_SEL 0x0000000100020118
-#define SH_X_MOD_DBUG_SEL_MASK 0x03ffffffffffffff
-#define SH_X_MOD_DBUG_SEL_INIT 0x0000000000000000
-
-/* SH_X_MOD_DBUG_SEL_TAG_SEL */
-/* Description: tagmgr select */
-#define SH_X_MOD_DBUG_SEL_TAG_SEL_SHFT 0
-#define SH_X_MOD_DBUG_SEL_TAG_SEL_MASK 0x00000000000000ff
-
-/* SH_X_MOD_DBUG_SEL_WBQ_SEL */
-/* Description: wbqtg select */
-#define SH_X_MOD_DBUG_SEL_WBQ_SEL_SHFT 8
-#define SH_X_MOD_DBUG_SEL_WBQ_SEL_MASK 0x000000000000ff00
-
-/* SH_X_MOD_DBUG_SEL_ARB_SEL */
-/* Description: arbque select */
-#define SH_X_MOD_DBUG_SEL_ARB_SEL_SHFT 16
-#define SH_X_MOD_DBUG_SEL_ARB_SEL_MASK 0x0000000000ff0000
-
-/* SH_X_MOD_DBUG_SEL_ATL_SEL */
-/* Description: aintl select */
-#define SH_X_MOD_DBUG_SEL_ATL_SEL_SHFT 24
-#define SH_X_MOD_DBUG_SEL_ATL_SEL_MASK 0x00000007ff000000
-
-/* SH_X_MOD_DBUG_SEL_ATR_SEL */
-/* Description: aintr select */
-#define SH_X_MOD_DBUG_SEL_ATR_SEL_SHFT 35
-#define SH_X_MOD_DBUG_SEL_ATR_SEL_MASK 0x00003ff800000000
-
-/* SH_X_MOD_DBUG_SEL_DQL_SEL */
-/* Description: dqctr select */
-#define SH_X_MOD_DBUG_SEL_DQL_SEL_SHFT 46
-#define SH_X_MOD_DBUG_SEL_DQL_SEL_MASK 0x000fc00000000000
-
-/* SH_X_MOD_DBUG_SEL_DQR_SEL */
-/* Description: dqctl select */
-#define SH_X_MOD_DBUG_SEL_DQR_SEL_SHFT 52
-#define SH_X_MOD_DBUG_SEL_DQR_SEL_MASK 0x03f0000000000000
-
-/* ==================================================================== */
-/* Register "SH_X_DBUG_SEL" */
-/* MD acx debug select */
-/* ==================================================================== */
-
-#define SH_X_DBUG_SEL 0x0000000100020120
-#define SH_X_DBUG_SEL_MASK 0x0000000000ffffff
-#define SH_X_DBUG_SEL_INIT 0x0000000000000000
-
-/* SH_X_DBUG_SEL_DBG_SEL */
-/* Description: debug select */
-#define SH_X_DBUG_SEL_DBG_SEL_SHFT 0
-#define SH_X_DBUG_SEL_DBG_SEL_MASK 0x0000000000ffffff
-
-/* ==================================================================== */
-/* Register "SH_X_LADDR_CMP" */
-/* MD acx address compare */
-/* ==================================================================== */
-
-#define SH_X_LADDR_CMP 0x0000000100020128
-#define SH_X_LADDR_CMP_MASK 0x0fffffff0fffffff
-#define SH_X_LADDR_CMP_INIT 0x0000000000000000
-
-/* SH_X_LADDR_CMP_CMP_VAL */
-/* Description: Compare value */
-#define SH_X_LADDR_CMP_CMP_VAL_SHFT 0
-#define SH_X_LADDR_CMP_CMP_VAL_MASK 0x000000000fffffff
-
-/* SH_X_LADDR_CMP_MASK_VAL */
-/* Description: Mask value */
-#define SH_X_LADDR_CMP_MASK_VAL_SHFT 32
-#define SH_X_LADDR_CMP_MASK_VAL_MASK 0x0fffffff00000000
-
-/* ==================================================================== */
-/* Register "SH_X_RADDR_CMP" */
-/* MD acx address compare */
-/* ==================================================================== */
-
-#define SH_X_RADDR_CMP 0x0000000100020130
-#define SH_X_RADDR_CMP_MASK 0x0fffffff0fffffff
-#define SH_X_RADDR_CMP_INIT 0x0000000000000000
-
-/* SH_X_RADDR_CMP_CMP_VAL */
-/* Description: Compare value */
-#define SH_X_RADDR_CMP_CMP_VAL_SHFT 0
-#define SH_X_RADDR_CMP_CMP_VAL_MASK 0x000000000fffffff
-
-/* SH_X_RADDR_CMP_MASK_VAL */
-/* Description: Mask value */
-#define SH_X_RADDR_CMP_MASK_VAL_SHFT 32
-#define SH_X_RADDR_CMP_MASK_VAL_MASK 0x0fffffff00000000
-
-/* ==================================================================== */
-/* Register "SH_X_TAG_CMP" */
-/* MD acx tagmgr compare */
-/* ==================================================================== */
-
-#define SH_X_TAG_CMP 0x0000000100020138
-#define SH_X_TAG_CMP_MASK 0x007fffffffffffff
-#define SH_X_TAG_CMP_INIT 0x0000000000000000
-
-/* SH_X_TAG_CMP_CMD */
-/* Description: Command compare value */
-#define SH_X_TAG_CMP_CMD_SHFT 0
-#define SH_X_TAG_CMP_CMD_MASK 0x00000000000000ff
-
-/* SH_X_TAG_CMP_ADDR */
-/* Description: Address compare value */
-#define SH_X_TAG_CMP_ADDR_SHFT 8
-#define SH_X_TAG_CMP_ADDR_MASK 0x000001ffffffff00
-
-/* SH_X_TAG_CMP_SRC */
-/* Description: Source compare value */
-#define SH_X_TAG_CMP_SRC_SHFT 41
-#define SH_X_TAG_CMP_SRC_MASK 0x007ffe0000000000
-
-/* ==================================================================== */
-/* Register "SH_X_TAG_MASK" */
-/* MD acx tagmgr mask */
-/* ==================================================================== */
-
-#define SH_X_TAG_MASK 0x0000000100020140
-#define SH_X_TAG_MASK_MASK 0x007fffffffffffff
-#define SH_X_TAG_MASK_INIT 0x0000000000000000
-
-/* SH_X_TAG_MASK_CMD */
-/* Description: Command compare value */
-#define SH_X_TAG_MASK_CMD_SHFT 0
-#define SH_X_TAG_MASK_CMD_MASK 0x00000000000000ff
-
-/* SH_X_TAG_MASK_ADDR */
-/* Description: Address compare value */
-#define SH_X_TAG_MASK_ADDR_SHFT 8
-#define SH_X_TAG_MASK_ADDR_MASK 0x000001ffffffff00
-
-/* SH_X_TAG_MASK_SRC */
-/* Description: Source compare value */
-#define SH_X_TAG_MASK_SRC_SHFT 41
-#define SH_X_TAG_MASK_SRC_MASK 0x007ffe0000000000
-
-/* ==================================================================== */
-/* Register "SH_Y_MOD_DBUG_SEL" */
-/* MD acy debug select */
-/* ==================================================================== */
-
-#define SH_Y_MOD_DBUG_SEL 0x0000000100020148
-#define SH_Y_MOD_DBUG_SEL_MASK 0x03ffffffffffffff
-#define SH_Y_MOD_DBUG_SEL_INIT 0x0000000000000000
-
-/* SH_Y_MOD_DBUG_SEL_TAG_SEL */
-/* Description: tagmgr select */
-#define SH_Y_MOD_DBUG_SEL_TAG_SEL_SHFT 0
-#define SH_Y_MOD_DBUG_SEL_TAG_SEL_MASK 0x00000000000000ff
-
-/* SH_Y_MOD_DBUG_SEL_WBQ_SEL */
-/* Description: wbqtg select */
-#define SH_Y_MOD_DBUG_SEL_WBQ_SEL_SHFT 8
-#define SH_Y_MOD_DBUG_SEL_WBQ_SEL_MASK 0x000000000000ff00
-
-/* SH_Y_MOD_DBUG_SEL_ARB_SEL */
-/* Description: arbque select */
-#define SH_Y_MOD_DBUG_SEL_ARB_SEL_SHFT 16
-#define SH_Y_MOD_DBUG_SEL_ARB_SEL_MASK 0x0000000000ff0000
-
-/* SH_Y_MOD_DBUG_SEL_ATL_SEL */
-/* Description: aintl select */
-#define SH_Y_MOD_DBUG_SEL_ATL_SEL_SHFT 24
-#define SH_Y_MOD_DBUG_SEL_ATL_SEL_MASK 0x00000007ff000000
-
-/* SH_Y_MOD_DBUG_SEL_ATR_SEL */
-/* Description: aintr select */
-#define SH_Y_MOD_DBUG_SEL_ATR_SEL_SHFT 35
-#define SH_Y_MOD_DBUG_SEL_ATR_SEL_MASK 0x00003ff800000000
-
-/* SH_Y_MOD_DBUG_SEL_DQL_SEL */
-/* Description: dqctr select */
-#define SH_Y_MOD_DBUG_SEL_DQL_SEL_SHFT 46
-#define SH_Y_MOD_DBUG_SEL_DQL_SEL_MASK 0x000fc00000000000
-
-/* SH_Y_MOD_DBUG_SEL_DQR_SEL */
-/* Description: dqctl select */
-#define SH_Y_MOD_DBUG_SEL_DQR_SEL_SHFT 52
-#define SH_Y_MOD_DBUG_SEL_DQR_SEL_MASK 0x03f0000000000000
-
-/* ==================================================================== */
-/* Register "SH_Y_DBUG_SEL" */
-/* MD acy debug select */
-/* ==================================================================== */
-
-#define SH_Y_DBUG_SEL 0x0000000100020150
-#define SH_Y_DBUG_SEL_MASK 0x0000000000ffffff
-#define SH_Y_DBUG_SEL_INIT 0x0000000000000000
-
-/* SH_Y_DBUG_SEL_DBG_SEL */
-/* Description: debug select */
-#define SH_Y_DBUG_SEL_DBG_SEL_SHFT 0
-#define SH_Y_DBUG_SEL_DBG_SEL_MASK 0x0000000000ffffff
-
-/* ==================================================================== */
-/* Register "SH_Y_LADDR_CMP" */
-/* MD acy address compare */
-/* ==================================================================== */
-
-#define SH_Y_LADDR_CMP 0x0000000100020158
-#define SH_Y_LADDR_CMP_MASK 0x0fffffff0fffffff
-#define SH_Y_LADDR_CMP_INIT 0x0000000000000000
-
-/* SH_Y_LADDR_CMP_CMP_VAL */
-/* Description: Compare value */
-#define SH_Y_LADDR_CMP_CMP_VAL_SHFT 0
-#define SH_Y_LADDR_CMP_CMP_VAL_MASK 0x000000000fffffff
-
-/* SH_Y_LADDR_CMP_MASK_VAL */
-/* Description: Mask value */
-#define SH_Y_LADDR_CMP_MASK_VAL_SHFT 32
-#define SH_Y_LADDR_CMP_MASK_VAL_MASK 0x0fffffff00000000
-
-/* ==================================================================== */
-/* Register "SH_Y_RADDR_CMP" */
-/* MD acy address compare */
-/* ==================================================================== */
-
-#define SH_Y_RADDR_CMP 0x0000000100020160
-#define SH_Y_RADDR_CMP_MASK 0x0fffffff0fffffff
-#define SH_Y_RADDR_CMP_INIT 0x0000000000000000
-
-/* SH_Y_RADDR_CMP_CMP_VAL */
-/* Description: Compare value */
-#define SH_Y_RADDR_CMP_CMP_VAL_SHFT 0
-#define SH_Y_RADDR_CMP_CMP_VAL_MASK 0x000000000fffffff
-
-/* SH_Y_RADDR_CMP_MASK_VAL */
-/* Description: Mask value */
-#define SH_Y_RADDR_CMP_MASK_VAL_SHFT 32
-#define SH_Y_RADDR_CMP_MASK_VAL_MASK 0x0fffffff00000000
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG_CMP" */
-/* MD acy tagmgr compare */
-/* ==================================================================== */
-
-#define SH_Y_TAG_CMP 0x0000000100020168
-#define SH_Y_TAG_CMP_MASK 0x007fffffffffffff
-#define SH_Y_TAG_CMP_INIT 0x0000000000000000
-
-/* SH_Y_TAG_CMP_CMD */
-/* Description: Command compare value */
-#define SH_Y_TAG_CMP_CMD_SHFT 0
-#define SH_Y_TAG_CMP_CMD_MASK 0x00000000000000ff
-
-/* SH_Y_TAG_CMP_ADDR */
-/* Description: Address compare value */
-#define SH_Y_TAG_CMP_ADDR_SHFT 8
-#define SH_Y_TAG_CMP_ADDR_MASK 0x000001ffffffff00
-
-/* SH_Y_TAG_CMP_SRC */
-/* Description: Source compare value */
-#define SH_Y_TAG_CMP_SRC_SHFT 41
-#define SH_Y_TAG_CMP_SRC_MASK 0x007ffe0000000000
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG_MASK" */
-/* MD acy tagmgr mask */
-/* ==================================================================== */
-
-#define SH_Y_TAG_MASK 0x0000000100020170
-#define SH_Y_TAG_MASK_MASK 0x007fffffffffffff
-#define SH_Y_TAG_MASK_INIT 0x0000000000000000
-
-/* SH_Y_TAG_MASK_CMD */
-/* Description: Command compare value */
-#define SH_Y_TAG_MASK_CMD_SHFT 0
-#define SH_Y_TAG_MASK_CMD_MASK 0x00000000000000ff
-
-/* SH_Y_TAG_MASK_ADDR */
-/* Description: Address compare value */
-#define SH_Y_TAG_MASK_ADDR_SHFT 8
-#define SH_Y_TAG_MASK_ADDR_MASK 0x000001ffffffff00
-
-/* SH_Y_TAG_MASK_SRC */
-/* Description: Source compare value */
-#define SH_Y_TAG_MASK_SRC_SHFT 41
-#define SH_Y_TAG_MASK_SRC_MASK 0x007ffe0000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_JNR_DBUG_DATA_CFG" */
-/* configuration for md jnr debug data muxes */
-/* ==================================================================== */
-
-#define SH_MD_JNR_DBUG_DATA_CFG 0x0000000100020178
-#define SH_MD_JNR_DBUG_DATA_CFG_MASK 0x0000000077777777
-#define SH_MD_JNR_DBUG_DATA_CFG_INIT 0x0000000000000000
-
-/* SH_MD_JNR_DBUG_DATA_CFG_NIBBLE0_SEL */
-/* Description: selects which nibble drives nibble0 */
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE0_SEL_SHFT 0
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE0_SEL_MASK 0x0000000000000007
-
-/* SH_MD_JNR_DBUG_DATA_CFG_NIBBLE1_SEL */
-/* Description: selects which nibble drives nibble1 */
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE1_SEL_SHFT 4
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE1_SEL_MASK 0x0000000000000070
-
-/* SH_MD_JNR_DBUG_DATA_CFG_NIBBLE2_SEL */
-/* Description: selects which nibble drives nibble2 */
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE2_SEL_SHFT 8
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE2_SEL_MASK 0x0000000000000700
-
-/* SH_MD_JNR_DBUG_DATA_CFG_NIBBLE3_SEL */
-/* Description: selects which nibble drives nibble3 */
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE3_SEL_SHFT 12
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE3_SEL_MASK 0x0000000000007000
-
-/* SH_MD_JNR_DBUG_DATA_CFG_NIBBLE4_SEL */
-/* Description: selects which nibble drives nibble4 */
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE4_SEL_SHFT 16
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE4_SEL_MASK 0x0000000000070000
-
-/* SH_MD_JNR_DBUG_DATA_CFG_NIBBLE5_SEL */
-/* Description: selects which nibble drives nibble5 */
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE5_SEL_SHFT 20
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE5_SEL_MASK 0x0000000000700000
-
-/* SH_MD_JNR_DBUG_DATA_CFG_NIBBLE6_SEL */
-/* Description: selects which nibble drives nibble6 */
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE6_SEL_SHFT 24
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE6_SEL_MASK 0x0000000007000000
-
-/* SH_MD_JNR_DBUG_DATA_CFG_NIBBLE7_SEL */
-/* Description: selects which nibble drives nibble7 */
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE7_SEL_SHFT 28
-#define SH_MD_JNR_DBUG_DATA_CFG_NIBBLE7_SEL_MASK 0x0000000070000000
-
-/* ==================================================================== */
-/* Register "SH_MD_LAST_CREDIT" */
-/* captures last credit values on reset */
-/* ==================================================================== */
-
-#define SH_MD_LAST_CREDIT 0x0000000100020180
-#define SH_MD_LAST_CREDIT_MASK 0x0000003f3f3f3f3f
-#define SH_MD_LAST_CREDIT_INIT 0x0000000000000000
-
-/* SH_MD_LAST_CREDIT_RQ_TO_PI */
-/* Description: capture of request credits to pi */
-#define SH_MD_LAST_CREDIT_RQ_TO_PI_SHFT 0
-#define SH_MD_LAST_CREDIT_RQ_TO_PI_MASK 0x000000000000003f
-
-/* SH_MD_LAST_CREDIT_RP_TO_PI */
-/* Description: capture of reply credits to pi */
-#define SH_MD_LAST_CREDIT_RP_TO_PI_SHFT 8
-#define SH_MD_LAST_CREDIT_RP_TO_PI_MASK 0x0000000000003f00
-
-/* SH_MD_LAST_CREDIT_RQ_TO_XN */
-/* Description: capture of request credits to xn */
-#define SH_MD_LAST_CREDIT_RQ_TO_XN_SHFT 16
-#define SH_MD_LAST_CREDIT_RQ_TO_XN_MASK 0x00000000003f0000
-
-/* SH_MD_LAST_CREDIT_RP_TO_XN */
-/* Description: capture of reply credits to xn */
-#define SH_MD_LAST_CREDIT_RP_TO_XN_SHFT 24
-#define SH_MD_LAST_CREDIT_RP_TO_XN_MASK 0x000000003f000000
-
-/* SH_MD_LAST_CREDIT_TO_LB */
-/* Description: capture of credits to pi */
-#define SH_MD_LAST_CREDIT_TO_LB_SHFT 32
-#define SH_MD_LAST_CREDIT_TO_LB_MASK 0x0000003f00000000
-
-/* ==================================================================== */
-/* Register "SH_MEM_CAPTURE_ADDR" */
-/* Address capture address register */
-/* ==================================================================== */
-
-#define SH_MEM_CAPTURE_ADDR 0x0000000100020300
-#define SH_MEM_CAPTURE_ADDR_MASK 0x00000ffffffffff8
-#define SH_MEM_CAPTURE_ADDR_INIT 0x0000000000000000
-
-/* SH_MEM_CAPTURE_ADDR_ADDR */
-/* Description: upper bits of address */
-#define SH_MEM_CAPTURE_ADDR_ADDR_SHFT 3
-#define SH_MEM_CAPTURE_ADDR_ADDR_MASK 0x0000000ffffffff8
-
-/* SH_MEM_CAPTURE_ADDR_CMD */
-/* Description: command of reference */
-#define SH_MEM_CAPTURE_ADDR_CMD_SHFT 36
-#define SH_MEM_CAPTURE_ADDR_CMD_MASK 0x00000ff000000000
-
-/* ==================================================================== */
-/* Register "SH_MEM_CAPTURE_MASK" */
-/* Address capture mask register */
-/* ==================================================================== */
-
-#define SH_MEM_CAPTURE_MASK 0x0000000100020308
-#define SH_MEM_CAPTURE_MASK_MASK 0x00003ffffffffff8
-#define SH_MEM_CAPTURE_MASK_INIT 0x0000000000000000
-
-/* SH_MEM_CAPTURE_MASK_ADDR */
-/* Description: upper bits of address */
-#define SH_MEM_CAPTURE_MASK_ADDR_SHFT 3
-#define SH_MEM_CAPTURE_MASK_ADDR_MASK 0x0000000ffffffff8
-
-/* SH_MEM_CAPTURE_MASK_CMD */
-/* Description: command of reference */
-#define SH_MEM_CAPTURE_MASK_CMD_SHFT 36
-#define SH_MEM_CAPTURE_MASK_CMD_MASK 0x00000ff000000000
-
-/* SH_MEM_CAPTURE_MASK_ENABLE_LOCAL */
-/* Description: capture references originating locally */
-#define SH_MEM_CAPTURE_MASK_ENABLE_LOCAL_SHFT 44
-#define SH_MEM_CAPTURE_MASK_ENABLE_LOCAL_MASK 0x0000100000000000
-
-/* SH_MEM_CAPTURE_MASK_ENABLE_REMOTE */
-/* Description: capture references originating remotely */
-#define SH_MEM_CAPTURE_MASK_ENABLE_REMOTE_SHFT 45
-#define SH_MEM_CAPTURE_MASK_ENABLE_REMOTE_MASK 0x0000200000000000
-
-/* ==================================================================== */
-/* Register "SH_MEM_CAPTURE_HDR" */
-/* Address capture header register */
-/* ==================================================================== */
-
-#define SH_MEM_CAPTURE_HDR 0x0000000100020310
-#define SH_MEM_CAPTURE_HDR_MASK 0xfffffffffffffff8
-#define SH_MEM_CAPTURE_HDR_INIT 0x0000000000000000
-
-/* SH_MEM_CAPTURE_HDR_ADDR */
-/* Description: upper bits of reference address */
-#define SH_MEM_CAPTURE_HDR_ADDR_SHFT 3
-#define SH_MEM_CAPTURE_HDR_ADDR_MASK 0x0000000ffffffff8
-
-/* SH_MEM_CAPTURE_HDR_CMD */
-/* Description: command of reference */
-#define SH_MEM_CAPTURE_HDR_CMD_SHFT 36
-#define SH_MEM_CAPTURE_HDR_CMD_MASK 0x00000ff000000000
-
-/* SH_MEM_CAPTURE_HDR_SRC */
-/* Description: source node of reference */
-#define SH_MEM_CAPTURE_HDR_SRC_SHFT 44
-#define SH_MEM_CAPTURE_HDR_SRC_MASK 0x03fff00000000000
-
-/* SH_MEM_CAPTURE_HDR_CNTR */
-/* Description: increments on every capture */
-#define SH_MEM_CAPTURE_HDR_CNTR_SHFT 58
-#define SH_MEM_CAPTURE_HDR_CNTR_MASK 0xfc00000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_CONFIG" */
-/* DQ directory config register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_CONFIG 0x0000000100030000
-#define SH_MD_DQLP_MMR_DIR_CONFIG_MASK 0x000000000000001f
-#define SH_MD_DQLP_MMR_DIR_CONFIG_INIT 0x0000000000000010
-
-/* SH_MD_DQLP_MMR_DIR_CONFIG_SYS_SIZE */
-/* Description: system size code */
-#define SH_MD_DQLP_MMR_DIR_CONFIG_SYS_SIZE_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_CONFIG_SYS_SIZE_MASK 0x0000000000000007
-
-/* SH_MD_DQLP_MMR_DIR_CONFIG_EN_DIRECC */
-/* Description: enable directory ecc correction */
-#define SH_MD_DQLP_MMR_DIR_CONFIG_EN_DIRECC_SHFT 3
-#define SH_MD_DQLP_MMR_DIR_CONFIG_EN_DIRECC_MASK 0x0000000000000008
-
-/* SH_MD_DQLP_MMR_DIR_CONFIG_EN_DIRPOIS */
-/* Description: enable local poisoning for dir table fall-through */
-#define SH_MD_DQLP_MMR_DIR_CONFIG_EN_DIRPOIS_SHFT 4
-#define SH_MD_DQLP_MMR_DIR_CONFIG_EN_DIRPOIS_MASK 0x0000000000000010
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRESVEC0" */
-/* node [63:0] presence bits */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRESVEC0 0x0000000100030100
-#define SH_MD_DQLP_MMR_DIR_PRESVEC0_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_PRESVEC0_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRESVEC0_VEC */
-/* Description: node presence bits, 1=present */
-#define SH_MD_DQLP_MMR_DIR_PRESVEC0_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRESVEC0_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRESVEC1" */
-/* node [127:64] presence bits */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRESVEC1 0x0000000100030110
-#define SH_MD_DQLP_MMR_DIR_PRESVEC1_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_PRESVEC1_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRESVEC1_VEC */
-/* Description: node presence bits, 1=present */
-#define SH_MD_DQLP_MMR_DIR_PRESVEC1_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRESVEC1_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRESVEC2" */
-/* node [191:128] presence bits */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRESVEC2 0x0000000100030120
-#define SH_MD_DQLP_MMR_DIR_PRESVEC2_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_PRESVEC2_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRESVEC2_VEC */
-/* Description: node presence bits, 1=present */
-#define SH_MD_DQLP_MMR_DIR_PRESVEC2_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRESVEC2_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRESVEC3" */
-/* node [255:192] presence bits */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRESVEC3 0x0000000100030130
-#define SH_MD_DQLP_MMR_DIR_PRESVEC3_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_PRESVEC3_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRESVEC3_VEC */
-/* Description: node presence bits, 1=present */
-#define SH_MD_DQLP_MMR_DIR_PRESVEC3_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRESVEC3_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC0" */
-/* local vector for acc=0 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_LOCVEC0 0x0000000100030200
-#define SH_MD_DQLP_MMR_DIR_LOCVEC0_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_LOCVEC0_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_LOCVEC0_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQLP_MMR_DIR_LOCVEC0_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_LOCVEC0_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC1" */
-/* local vector for acc=1 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_LOCVEC1 0x0000000100030210
-#define SH_MD_DQLP_MMR_DIR_LOCVEC1_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_LOCVEC1_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_LOCVEC1_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQLP_MMR_DIR_LOCVEC1_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_LOCVEC1_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC2" */
-/* local vector for acc=2 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_LOCVEC2 0x0000000100030220
-#define SH_MD_DQLP_MMR_DIR_LOCVEC2_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_LOCVEC2_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_LOCVEC2_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQLP_MMR_DIR_LOCVEC2_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_LOCVEC2_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC3" */
-/* local vector for acc=3 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_LOCVEC3 0x0000000100030230
-#define SH_MD_DQLP_MMR_DIR_LOCVEC3_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_LOCVEC3_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_LOCVEC3_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQLP_MMR_DIR_LOCVEC3_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_LOCVEC3_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC4" */
-/* local vector for acc=4 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_LOCVEC4 0x0000000100030240
-#define SH_MD_DQLP_MMR_DIR_LOCVEC4_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_LOCVEC4_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_LOCVEC4_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQLP_MMR_DIR_LOCVEC4_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_LOCVEC4_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC5" */
-/* local vector for acc=5 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_LOCVEC5 0x0000000100030250
-#define SH_MD_DQLP_MMR_DIR_LOCVEC5_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_LOCVEC5_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_LOCVEC5_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQLP_MMR_DIR_LOCVEC5_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_LOCVEC5_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC6" */
-/* local vector for acc=6 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_LOCVEC6 0x0000000100030260
-#define SH_MD_DQLP_MMR_DIR_LOCVEC6_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_LOCVEC6_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_LOCVEC6_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQLP_MMR_DIR_LOCVEC6_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_LOCVEC6_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC7" */
-/* local vector for acc=7 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_LOCVEC7 0x0000000100030270
-#define SH_MD_DQLP_MMR_DIR_LOCVEC7_MASK 0xffffffffffffffff
-#define SH_MD_DQLP_MMR_DIR_LOCVEC7_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_LOCVEC7_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQLP_MMR_DIR_LOCVEC7_VEC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_LOCVEC7_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC0" */
-/* privilege vector for acc=0 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRIVEC0 0x0000000100030300
-#define SH_MD_DQLP_MMR_DIR_PRIVEC0_MASK 0x000000000fffffff
-#define SH_MD_DQLP_MMR_DIR_PRIVEC0_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC0_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC0_IN_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRIVEC0_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC0_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC0_OUT_SHFT 14
-#define SH_MD_DQLP_MMR_DIR_PRIVEC0_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC1" */
-/* privilege vector for acc=1 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRIVEC1 0x0000000100030310
-#define SH_MD_DQLP_MMR_DIR_PRIVEC1_MASK 0x000000000fffffff
-#define SH_MD_DQLP_MMR_DIR_PRIVEC1_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC1_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC1_IN_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRIVEC1_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC1_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC1_OUT_SHFT 14
-#define SH_MD_DQLP_MMR_DIR_PRIVEC1_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC2" */
-/* privilege vector for acc=2 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRIVEC2 0x0000000100030320
-#define SH_MD_DQLP_MMR_DIR_PRIVEC2_MASK 0x000000000fffffff
-#define SH_MD_DQLP_MMR_DIR_PRIVEC2_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC2_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC2_IN_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRIVEC2_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC2_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC2_OUT_SHFT 14
-#define SH_MD_DQLP_MMR_DIR_PRIVEC2_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC3" */
-/* privilege vector for acc=3 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRIVEC3 0x0000000100030330
-#define SH_MD_DQLP_MMR_DIR_PRIVEC3_MASK 0x000000000fffffff
-#define SH_MD_DQLP_MMR_DIR_PRIVEC3_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC3_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC3_IN_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRIVEC3_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC3_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC3_OUT_SHFT 14
-#define SH_MD_DQLP_MMR_DIR_PRIVEC3_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC4" */
-/* privilege vector for acc=4 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRIVEC4 0x0000000100030340
-#define SH_MD_DQLP_MMR_DIR_PRIVEC4_MASK 0x000000000fffffff
-#define SH_MD_DQLP_MMR_DIR_PRIVEC4_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC4_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC4_IN_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRIVEC4_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC4_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC4_OUT_SHFT 14
-#define SH_MD_DQLP_MMR_DIR_PRIVEC4_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC5" */
-/* privilege vector for acc=5 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRIVEC5 0x0000000100030350
-#define SH_MD_DQLP_MMR_DIR_PRIVEC5_MASK 0x000000000fffffff
-#define SH_MD_DQLP_MMR_DIR_PRIVEC5_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC5_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC5_IN_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRIVEC5_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC5_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC5_OUT_SHFT 14
-#define SH_MD_DQLP_MMR_DIR_PRIVEC5_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC6" */
-/* privilege vector for acc=6 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRIVEC6 0x0000000100030360
-#define SH_MD_DQLP_MMR_DIR_PRIVEC6_MASK 0x000000000fffffff
-#define SH_MD_DQLP_MMR_DIR_PRIVEC6_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC6_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC6_IN_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRIVEC6_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC6_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC6_OUT_SHFT 14
-#define SH_MD_DQLP_MMR_DIR_PRIVEC6_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC7" */
-/* privilege vector for acc=7 */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_PRIVEC7 0x0000000100030370
-#define SH_MD_DQLP_MMR_DIR_PRIVEC7_MASK 0x000000000fffffff
-#define SH_MD_DQLP_MMR_DIR_PRIVEC7_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC7_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC7_IN_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_PRIVEC7_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQLP_MMR_DIR_PRIVEC7_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQLP_MMR_DIR_PRIVEC7_OUT_SHFT 14
-#define SH_MD_DQLP_MMR_DIR_PRIVEC7_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_TIMER" */
-/* MD SXRO timer */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_TIMER 0x0000000100030400
-#define SH_MD_DQLP_MMR_DIR_TIMER_MASK 0x00000000003fffff
-#define SH_MD_DQLP_MMR_DIR_TIMER_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_TIMER_TIMER_DIV */
-/* Description: timer divide register */
-#define SH_MD_DQLP_MMR_DIR_TIMER_TIMER_DIV_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_TIMER_TIMER_DIV_MASK 0x0000000000000fff
-
-/* SH_MD_DQLP_MMR_DIR_TIMER_TIMER_EN */
-/* Description: timer enable */
-#define SH_MD_DQLP_MMR_DIR_TIMER_TIMER_EN_SHFT 12
-#define SH_MD_DQLP_MMR_DIR_TIMER_TIMER_EN_MASK 0x0000000000001000
-
-/* SH_MD_DQLP_MMR_DIR_TIMER_TIMER_CUR */
-/* Description: value of current timer */
-#define SH_MD_DQLP_MMR_DIR_TIMER_TIMER_CUR_SHFT 13
-#define SH_MD_DQLP_MMR_DIR_TIMER_TIMER_CUR_MASK 0x00000000003fe000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY" */
-/* directory pio write data */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY 0x0000000100031000
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_MASK 0x03ffffffffffffff
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_DIRA */
-/* Description: directory entry A */
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_DIRA_SHFT 0
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_DIRA_MASK 0x0000000003ffffff
-
-/* SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_DIRB */
-/* Description: directory entry B */
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_DIRB_SHFT 26
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_DIRB_MASK 0x000ffffffc000000
-
-/* SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_PRI */
-/* Description: directory priority */
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_PRI_SHFT 52
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_PRI_MASK 0x0070000000000000
-
-/* SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_ACC */
-/* Description: directory access bits */
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_ACC_SHFT 55
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY_ACC_MASK 0x0380000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_PIOWD_DIR_ECC" */
-/* directory ecc register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ECC 0x0000000100031010
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ECC_MASK 0x0000000000003fff
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ECC_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_PIOWD_DIR_ECC_ECCA */
-/* Description: XOR bits for directory ECC group 1 */
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ECC_ECCA_SHFT 0
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ECC_ECCA_MASK 0x000000000000007f
-
-/* SH_MD_DQLP_MMR_PIOWD_DIR_ECC_ECCB */
-/* Description: XOR bits for directory ECC group 2 */
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ECC_ECCB_SHFT 7
-#define SH_MD_DQLP_MMR_PIOWD_DIR_ECC_ECCB_MASK 0x0000000000003f80
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY" */
-/* x directory pio read data */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY 0x0000000100032000
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_MASK 0x0fffffffffffffff
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_DIRA */
-/* Description: directory entry A */
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_DIRA_SHFT 0
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_DIRA_MASK 0x0000000003ffffff
-
-/* SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_DIRB */
-/* Description: directory entry B */
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_DIRB_SHFT 26
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_DIRB_MASK 0x000ffffffc000000
-
-/* SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_PRI */
-/* Description: directory priority */
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_PRI_SHFT 52
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_PRI_MASK 0x0070000000000000
-
-/* SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_ACC */
-/* Description: directory access bits */
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_ACC_SHFT 55
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_ACC_MASK 0x0380000000000000
-
-/* SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_COR */
-/* Description: correctable ecc error */
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_COR_SHFT 58
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_COR_MASK 0x0400000000000000
-
-/* SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_UNC */
-/* Description: uncorrectable ecc error */
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_UNC_SHFT 59
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY_UNC_MASK 0x0800000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XPIORD_XDIR_ECC" */
-/* x directory ecc */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ECC 0x0000000100032010
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ECC_MASK 0x0000000000003fff
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ECC_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_XPIORD_XDIR_ECC_ECCA */
-/* Description: group 1 ecc */
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ECC_ECCA_SHFT 0
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ECC_ECCA_MASK 0x000000000000007f
-
-/* SH_MD_DQLP_MMR_XPIORD_XDIR_ECC_ECCB */
-/* Description: group 2 ecc */
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ECC_ECCB_SHFT 7
-#define SH_MD_DQLP_MMR_XPIORD_XDIR_ECC_ECCB_MASK 0x0000000000003f80
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY" */
-/* y directory pio read data */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY 0x0000000100032800
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_MASK 0x0fffffffffffffff
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_DIRA */
-/* Description: directory entry A */
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_DIRA_SHFT 0
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_DIRA_MASK 0x0000000003ffffff
-
-/* SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_DIRB */
-/* Description: directory entry B */
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_DIRB_SHFT 26
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_DIRB_MASK 0x000ffffffc000000
-
-/* SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_PRI */
-/* Description: directory priority */
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_PRI_SHFT 52
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_PRI_MASK 0x0070000000000000
-
-/* SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_ACC */
-/* Description: directory access bits */
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_ACC_SHFT 55
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_ACC_MASK 0x0380000000000000
-
-/* SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_COR */
-/* Description: correctable ecc error */
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_COR_SHFT 58
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_COR_MASK 0x0400000000000000
-
-/* SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_UNC */
-/* Description: uncorrectable ecc error */
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_UNC_SHFT 59
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY_UNC_MASK 0x0800000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YPIORD_YDIR_ECC" */
-/* y directory ecc */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ECC 0x0000000100032810
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ECC_MASK 0x0000000000003fff
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ECC_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_YPIORD_YDIR_ECC_ECCA */
-/* Description: group 1 ecc */
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ECC_ECCA_SHFT 0
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ECC_ECCA_MASK 0x000000000000007f
-
-/* SH_MD_DQLP_MMR_YPIORD_YDIR_ECC_ECCB */
-/* Description: group 2 ecc */
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ECC_ECCB_SHFT 7
-#define SH_MD_DQLP_MMR_YPIORD_YDIR_ECC_ECCB_MASK 0x0000000000003f80
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XCERR1" */
-/* correctable dir ecc group 1 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_XCERR1 0x0000000100033000
-#define SH_MD_DQLP_MMR_XCERR1_MASK 0x0000007fffffffff
-#define SH_MD_DQLP_MMR_XCERR1_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_XCERR1_GRP1 */
-/* Description: ecc group 1 bits */
-#define SH_MD_DQLP_MMR_XCERR1_GRP1_SHFT 0
-#define SH_MD_DQLP_MMR_XCERR1_GRP1_MASK 0x0000000fffffffff
-
-/* SH_MD_DQLP_MMR_XCERR1_VAL */
-/* Description: correctable ecc error in group 1 bits */
-#define SH_MD_DQLP_MMR_XCERR1_VAL_SHFT 36
-#define SH_MD_DQLP_MMR_XCERR1_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQLP_MMR_XCERR1_MORE */
-/* Description: more than one correctable ecc error in group 1 */
-#define SH_MD_DQLP_MMR_XCERR1_MORE_SHFT 37
-#define SH_MD_DQLP_MMR_XCERR1_MORE_MASK 0x0000002000000000
-
-/* SH_MD_DQLP_MMR_XCERR1_ARM */
-/* Description: writing 1 arms uncorrectable ecc error capture */
-#define SH_MD_DQLP_MMR_XCERR1_ARM_SHFT 38
-#define SH_MD_DQLP_MMR_XCERR1_ARM_MASK 0x0000004000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XCERR2" */
-/* correctable dir ecc group 2 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_XCERR2 0x0000000100033010
-#define SH_MD_DQLP_MMR_XCERR2_MASK 0x0000003fffffffff
-#define SH_MD_DQLP_MMR_XCERR2_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_XCERR2_GRP2 */
-/* Description: ecc group 2 bits */
-#define SH_MD_DQLP_MMR_XCERR2_GRP2_SHFT 0
-#define SH_MD_DQLP_MMR_XCERR2_GRP2_MASK 0x0000000fffffffff
-
-/* SH_MD_DQLP_MMR_XCERR2_VAL */
-/* Description: correctable ecc error in group 2 bits */
-#define SH_MD_DQLP_MMR_XCERR2_VAL_SHFT 36
-#define SH_MD_DQLP_MMR_XCERR2_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQLP_MMR_XCERR2_MORE */
-/* Description: more than one correctable ecc error in group 2 */
-#define SH_MD_DQLP_MMR_XCERR2_MORE_SHFT 37
-#define SH_MD_DQLP_MMR_XCERR2_MORE_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XUERR1" */
-/* uncorrectable dir ecc group 1 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_XUERR1 0x0000000100033020
-#define SH_MD_DQLP_MMR_XUERR1_MASK 0x0000007fffffffff
-#define SH_MD_DQLP_MMR_XUERR1_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_XUERR1_GRP1 */
-/* Description: ecc group 1 bits */
-#define SH_MD_DQLP_MMR_XUERR1_GRP1_SHFT 0
-#define SH_MD_DQLP_MMR_XUERR1_GRP1_MASK 0x0000000fffffffff
-
-/* SH_MD_DQLP_MMR_XUERR1_VAL */
-/* Description: uncorrectable ecc error in group 1 bits */
-#define SH_MD_DQLP_MMR_XUERR1_VAL_SHFT 36
-#define SH_MD_DQLP_MMR_XUERR1_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQLP_MMR_XUERR1_MORE */
-/* Description: more than one uncorrectable ecc error in group 1 */
-#define SH_MD_DQLP_MMR_XUERR1_MORE_SHFT 37
-#define SH_MD_DQLP_MMR_XUERR1_MORE_MASK 0x0000002000000000
-
-/* SH_MD_DQLP_MMR_XUERR1_ARM */
-/* Description: writing 1 arms uncorrectable ecc error capture */
-#define SH_MD_DQLP_MMR_XUERR1_ARM_SHFT 38
-#define SH_MD_DQLP_MMR_XUERR1_ARM_MASK 0x0000004000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XUERR2" */
-/* uncorrectable dir ecc group 2 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_XUERR2 0x0000000100033030
-#define SH_MD_DQLP_MMR_XUERR2_MASK 0x0000003fffffffff
-#define SH_MD_DQLP_MMR_XUERR2_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_XUERR2_GRP2 */
-/* Description: ecc group 2 bits */
-#define SH_MD_DQLP_MMR_XUERR2_GRP2_SHFT 0
-#define SH_MD_DQLP_MMR_XUERR2_GRP2_MASK 0x0000000fffffffff
-
-/* SH_MD_DQLP_MMR_XUERR2_VAL */
-/* Description: uncorrectable ecc error in group 2 bits */
-#define SH_MD_DQLP_MMR_XUERR2_VAL_SHFT 36
-#define SH_MD_DQLP_MMR_XUERR2_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQLP_MMR_XUERR2_MORE */
-/* Description: more than one uncorrectable ecc error in group 2 */
-#define SH_MD_DQLP_MMR_XUERR2_MORE_SHFT 37
-#define SH_MD_DQLP_MMR_XUERR2_MORE_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XPERR" */
-/* protocol error register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_XPERR 0x0000000100033040
-#define SH_MD_DQLP_MMR_XPERR_MASK 0x7fffffffffffffff
-#define SH_MD_DQLP_MMR_XPERR_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_XPERR_DIR */
-/* Description: directory entry */
-#define SH_MD_DQLP_MMR_XPERR_DIR_SHFT 0
-#define SH_MD_DQLP_MMR_XPERR_DIR_MASK 0x0000000003ffffff
-
-/* SH_MD_DQLP_MMR_XPERR_CMD */
-/* Description: incoming command */
-#define SH_MD_DQLP_MMR_XPERR_CMD_SHFT 26
-#define SH_MD_DQLP_MMR_XPERR_CMD_MASK 0x00000003fc000000
-
-/* SH_MD_DQLP_MMR_XPERR_SRC */
-/* Description: source node of dir operation */
-#define SH_MD_DQLP_MMR_XPERR_SRC_SHFT 34
-#define SH_MD_DQLP_MMR_XPERR_SRC_MASK 0x0000fffc00000000
-
-/* SH_MD_DQLP_MMR_XPERR_PRIGE */
-/* Description: priority was greater-equal */
-#define SH_MD_DQLP_MMR_XPERR_PRIGE_SHFT 48
-#define SH_MD_DQLP_MMR_XPERR_PRIGE_MASK 0x0001000000000000
-
-/* SH_MD_DQLP_MMR_XPERR_PRIV */
-/* Description: access privilege bit */
-#define SH_MD_DQLP_MMR_XPERR_PRIV_SHFT 49
-#define SH_MD_DQLP_MMR_XPERR_PRIV_MASK 0x0002000000000000
-
-/* SH_MD_DQLP_MMR_XPERR_COR */
-/* Description: correctable ecc error */
-#define SH_MD_DQLP_MMR_XPERR_COR_SHFT 50
-#define SH_MD_DQLP_MMR_XPERR_COR_MASK 0x0004000000000000
-
-/* SH_MD_DQLP_MMR_XPERR_UNC */
-/* Description: uncorrectable ecc error */
-#define SH_MD_DQLP_MMR_XPERR_UNC_SHFT 51
-#define SH_MD_DQLP_MMR_XPERR_UNC_MASK 0x0008000000000000
-
-/* SH_MD_DQLP_MMR_XPERR_MYBIT */
-/* Description: ptreq,timeq,timlast,timspec,onlyme,anytim,ptrii,src */
-#define SH_MD_DQLP_MMR_XPERR_MYBIT_SHFT 52
-#define SH_MD_DQLP_MMR_XPERR_MYBIT_MASK 0x0ff0000000000000
-
-/* SH_MD_DQLP_MMR_XPERR_VAL */
-/* Description: protocol error info valid */
-#define SH_MD_DQLP_MMR_XPERR_VAL_SHFT 60
-#define SH_MD_DQLP_MMR_XPERR_VAL_MASK 0x1000000000000000
-
-/* SH_MD_DQLP_MMR_XPERR_MORE */
-/* Description: more than one protocol error */
-#define SH_MD_DQLP_MMR_XPERR_MORE_SHFT 61
-#define SH_MD_DQLP_MMR_XPERR_MORE_MASK 0x2000000000000000
-
-/* SH_MD_DQLP_MMR_XPERR_ARM */
-/* Description: writing 1 arms error capture */
-#define SH_MD_DQLP_MMR_XPERR_ARM_SHFT 62
-#define SH_MD_DQLP_MMR_XPERR_ARM_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YCERR1" */
-/* correctable dir ecc group 1 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_YCERR1 0x0000000100033800
-#define SH_MD_DQLP_MMR_YCERR1_MASK 0x0000007fffffffff
-#define SH_MD_DQLP_MMR_YCERR1_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_YCERR1_GRP1 */
-/* Description: ecc group 1 bits */
-#define SH_MD_DQLP_MMR_YCERR1_GRP1_SHFT 0
-#define SH_MD_DQLP_MMR_YCERR1_GRP1_MASK 0x0000000fffffffff
-
-/* SH_MD_DQLP_MMR_YCERR1_VAL */
-/* Description: correctable ecc error in group 1 bits */
-#define SH_MD_DQLP_MMR_YCERR1_VAL_SHFT 36
-#define SH_MD_DQLP_MMR_YCERR1_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQLP_MMR_YCERR1_MORE */
-/* Description: more than one correctable ecc error in group 1 */
-#define SH_MD_DQLP_MMR_YCERR1_MORE_SHFT 37
-#define SH_MD_DQLP_MMR_YCERR1_MORE_MASK 0x0000002000000000
-
-/* SH_MD_DQLP_MMR_YCERR1_ARM */
-/* Description: writing 1 arms uncorrectable ecc error capture */
-#define SH_MD_DQLP_MMR_YCERR1_ARM_SHFT 38
-#define SH_MD_DQLP_MMR_YCERR1_ARM_MASK 0x0000004000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YCERR2" */
-/* correctable dir ecc group 2 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_YCERR2 0x0000000100033810
-#define SH_MD_DQLP_MMR_YCERR2_MASK 0x0000003fffffffff
-#define SH_MD_DQLP_MMR_YCERR2_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_YCERR2_GRP2 */
-/* Description: ecc group 2 bits */
-#define SH_MD_DQLP_MMR_YCERR2_GRP2_SHFT 0
-#define SH_MD_DQLP_MMR_YCERR2_GRP2_MASK 0x0000000fffffffff
-
-/* SH_MD_DQLP_MMR_YCERR2_VAL */
-/* Description: correctable ecc error in group 2 bits */
-#define SH_MD_DQLP_MMR_YCERR2_VAL_SHFT 36
-#define SH_MD_DQLP_MMR_YCERR2_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQLP_MMR_YCERR2_MORE */
-/* Description: more than one correctable ecc error in group 2 */
-#define SH_MD_DQLP_MMR_YCERR2_MORE_SHFT 37
-#define SH_MD_DQLP_MMR_YCERR2_MORE_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YUERR1" */
-/* uncorrectable dir ecc group 1 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_YUERR1 0x0000000100033820
-#define SH_MD_DQLP_MMR_YUERR1_MASK 0x0000007fffffffff
-#define SH_MD_DQLP_MMR_YUERR1_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_YUERR1_GRP1 */
-/* Description: ecc group 1 bits */
-#define SH_MD_DQLP_MMR_YUERR1_GRP1_SHFT 0
-#define SH_MD_DQLP_MMR_YUERR1_GRP1_MASK 0x0000000fffffffff
-
-/* SH_MD_DQLP_MMR_YUERR1_VAL */
-/* Description: uncorrectable ecc error in group 1 bits */
-#define SH_MD_DQLP_MMR_YUERR1_VAL_SHFT 36
-#define SH_MD_DQLP_MMR_YUERR1_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQLP_MMR_YUERR1_MORE */
-/* Description: more than one uncorrectable ecc error in group 1 */
-#define SH_MD_DQLP_MMR_YUERR1_MORE_SHFT 37
-#define SH_MD_DQLP_MMR_YUERR1_MORE_MASK 0x0000002000000000
-
-/* SH_MD_DQLP_MMR_YUERR1_ARM */
-/* Description: writing 1 arms uncorrectable ecc error capture */
-#define SH_MD_DQLP_MMR_YUERR1_ARM_SHFT 38
-#define SH_MD_DQLP_MMR_YUERR1_ARM_MASK 0x0000004000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YUERR2" */
-/* uncorrectable dir ecc group 2 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_YUERR2 0x0000000100033830
-#define SH_MD_DQLP_MMR_YUERR2_MASK 0x0000003fffffffff
-#define SH_MD_DQLP_MMR_YUERR2_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_YUERR2_GRP2 */
-/* Description: ecc group 2 bits */
-#define SH_MD_DQLP_MMR_YUERR2_GRP2_SHFT 0
-#define SH_MD_DQLP_MMR_YUERR2_GRP2_MASK 0x0000000fffffffff
-
-/* SH_MD_DQLP_MMR_YUERR2_VAL */
-/* Description: uncorrectable ecc error in group 2 bits */
-#define SH_MD_DQLP_MMR_YUERR2_VAL_SHFT 36
-#define SH_MD_DQLP_MMR_YUERR2_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQLP_MMR_YUERR2_MORE */
-/* Description: more than one uncorrectable ecc error in group 2 */
-#define SH_MD_DQLP_MMR_YUERR2_MORE_SHFT 37
-#define SH_MD_DQLP_MMR_YUERR2_MORE_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YPERR" */
-/* protocol error register */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_YPERR 0x0000000100033840
-#define SH_MD_DQLP_MMR_YPERR_MASK 0x7fffffffffffffff
-#define SH_MD_DQLP_MMR_YPERR_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_YPERR_DIR */
-/* Description: directory entry */
-#define SH_MD_DQLP_MMR_YPERR_DIR_SHFT 0
-#define SH_MD_DQLP_MMR_YPERR_DIR_MASK 0x0000000003ffffff
-
-/* SH_MD_DQLP_MMR_YPERR_CMD */
-/* Description: incoming command */
-#define SH_MD_DQLP_MMR_YPERR_CMD_SHFT 26
-#define SH_MD_DQLP_MMR_YPERR_CMD_MASK 0x00000003fc000000
-
-/* SH_MD_DQLP_MMR_YPERR_SRC */
-/* Description: source node of dir operation */
-#define SH_MD_DQLP_MMR_YPERR_SRC_SHFT 34
-#define SH_MD_DQLP_MMR_YPERR_SRC_MASK 0x0000fffc00000000
-
-/* SH_MD_DQLP_MMR_YPERR_PRIGE */
-/* Description: priority was greater-equal */
-#define SH_MD_DQLP_MMR_YPERR_PRIGE_SHFT 48
-#define SH_MD_DQLP_MMR_YPERR_PRIGE_MASK 0x0001000000000000
-
-/* SH_MD_DQLP_MMR_YPERR_PRIV */
-/* Description: access privilege bit */
-#define SH_MD_DQLP_MMR_YPERR_PRIV_SHFT 49
-#define SH_MD_DQLP_MMR_YPERR_PRIV_MASK 0x0002000000000000
-
-/* SH_MD_DQLP_MMR_YPERR_COR */
-/* Description: correctable ecc error */
-#define SH_MD_DQLP_MMR_YPERR_COR_SHFT 50
-#define SH_MD_DQLP_MMR_YPERR_COR_MASK 0x0004000000000000
-
-/* SH_MD_DQLP_MMR_YPERR_UNC */
-/* Description: uncorrectable ecc error */
-#define SH_MD_DQLP_MMR_YPERR_UNC_SHFT 51
-#define SH_MD_DQLP_MMR_YPERR_UNC_MASK 0x0008000000000000
-
-/* SH_MD_DQLP_MMR_YPERR_MYBIT */
-/* Description: ptreq,timeq,timlast,timspec,onlyme,anytim,ptrii,src */
-#define SH_MD_DQLP_MMR_YPERR_MYBIT_SHFT 52
-#define SH_MD_DQLP_MMR_YPERR_MYBIT_MASK 0x0ff0000000000000
-
-/* SH_MD_DQLP_MMR_YPERR_VAL */
-/* Description: protocol error info valid */
-#define SH_MD_DQLP_MMR_YPERR_VAL_SHFT 60
-#define SH_MD_DQLP_MMR_YPERR_VAL_MASK 0x1000000000000000
-
-/* SH_MD_DQLP_MMR_YPERR_MORE */
-/* Description: more than one protocol error */
-#define SH_MD_DQLP_MMR_YPERR_MORE_SHFT 61
-#define SH_MD_DQLP_MMR_YPERR_MORE_MASK 0x2000000000000000
-
-/* SH_MD_DQLP_MMR_YPERR_ARM */
-/* Description: writing 1 arms error capture */
-#define SH_MD_DQLP_MMR_YPERR_ARM_SHFT 62
-#define SH_MD_DQLP_MMR_YPERR_ARM_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_CMDTRIG" */
-/* cmd triggers */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_CMDTRIG 0x0000000100034000
-#define SH_MD_DQLP_MMR_DIR_CMDTRIG_MASK 0x00000000ffffffff
-#define SH_MD_DQLP_MMR_DIR_CMDTRIG_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD0 */
-/* Description: command trigger 0 */
-#define SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD0_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD0_MASK 0x00000000000000ff
-
-/* SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD1 */
-/* Description: command trigger 1 */
-#define SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD1_SHFT 8
-#define SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD1_MASK 0x000000000000ff00
-
-/* SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD2 */
-/* Description: command trigger 2 */
-#define SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD2_SHFT 16
-#define SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD2_MASK 0x0000000000ff0000
-
-/* SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD3 */
-/* Description: command trigger 3 */
-#define SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD3_SHFT 24
-#define SH_MD_DQLP_MMR_DIR_CMDTRIG_CMD3_MASK 0x00000000ff000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_TBLTRIG" */
-/* dir table trigger */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG 0x0000000100034010
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_MASK 0x000003ffffffffff
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_TBLTRIG_SRC */
-/* Description: source of request */
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_SRC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_SRC_MASK 0x0000000000003fff
-
-/* SH_MD_DQLP_MMR_DIR_TBLTRIG_CMD */
-/* Description: incoming request */
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_CMD_SHFT 14
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_CMD_MASK 0x00000000003fc000
-
-/* SH_MD_DQLP_MMR_DIR_TBLTRIG_ACC */
-/* Description: uncorrectable error, privilege bit */
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_ACC_SHFT 22
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_ACC_MASK 0x0000000000c00000
-
-/* SH_MD_DQLP_MMR_DIR_TBLTRIG_PRIGE */
-/* Description: priority greater-equal */
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_PRIGE_SHFT 24
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_PRIGE_MASK 0x0000000001000000
-
-/* SH_MD_DQLP_MMR_DIR_TBLTRIG_DIRST */
-/* Description: shrd,sxro,sub-state */
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_DIRST_SHFT 25
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_DIRST_MASK 0x00000003fe000000
-
-/* SH_MD_DQLP_MMR_DIR_TBLTRIG_MYBIT */
-/* Description: ptreq,timeq,timlast,timspec,onlyme,anytim,ptrii,src */
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_MYBIT_SHFT 34
-#define SH_MD_DQLP_MMR_DIR_TBLTRIG_MYBIT_MASK 0x000003fc00000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_TBLMASK" */
-/* dir table trigger mask */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_DIR_TBLMASK 0x0000000100034020
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_MASK 0x000003ffffffffff
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_DIR_TBLMASK_SRC */
-/* Description: source of request */
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_SRC_SHFT 0
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_SRC_MASK 0x0000000000003fff
-
-/* SH_MD_DQLP_MMR_DIR_TBLMASK_CMD */
-/* Description: incoming request */
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_CMD_SHFT 14
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_CMD_MASK 0x00000000003fc000
-
-/* SH_MD_DQLP_MMR_DIR_TBLMASK_ACC */
-/* Description: uncorrectable error, privilege bit */
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_ACC_SHFT 22
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_ACC_MASK 0x0000000000c00000
-
-/* SH_MD_DQLP_MMR_DIR_TBLMASK_PRIGE */
-/* Description: priority greater-equal */
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_PRIGE_SHFT 24
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_PRIGE_MASK 0x0000000001000000
-
-/* SH_MD_DQLP_MMR_DIR_TBLMASK_DIRST */
-/* Description: shrd,sxro,sub-state */
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_DIRST_SHFT 25
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_DIRST_MASK 0x00000003fe000000
-
-/* SH_MD_DQLP_MMR_DIR_TBLMASK_MYBIT */
-/* Description: ptreq,timeq,timlast,timspec,onlyme,anytim,ptrii,src */
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_MYBIT_SHFT 34
-#define SH_MD_DQLP_MMR_DIR_TBLMASK_MYBIT_MASK 0x000003fc00000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_XBIST_H 0x0000000100038000
-#define SH_MD_DQLP_MMR_XBIST_H_MASK 0x00000700ffffffff
-#define SH_MD_DQLP_MMR_XBIST_H_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_XBIST_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLP_MMR_XBIST_H_PAT_SHFT 0
-#define SH_MD_DQLP_MMR_XBIST_H_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQLP_MMR_XBIST_H_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQLP_MMR_XBIST_H_INV_SHFT 40
-#define SH_MD_DQLP_MMR_XBIST_H_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQLP_MMR_XBIST_H_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQLP_MMR_XBIST_H_ROT_SHFT 41
-#define SH_MD_DQLP_MMR_XBIST_H_ROT_MASK 0x0000020000000000
-
-/* SH_MD_DQLP_MMR_XBIST_H_ARM */
-/* Description: writing 1 arms data miscompare capture */
-#define SH_MD_DQLP_MMR_XBIST_H_ARM_SHFT 42
-#define SH_MD_DQLP_MMR_XBIST_H_ARM_MASK 0x0000040000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_XBIST_L 0x0000000100038010
-#define SH_MD_DQLP_MMR_XBIST_L_MASK 0x00000300ffffffff
-#define SH_MD_DQLP_MMR_XBIST_L_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_XBIST_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLP_MMR_XBIST_L_PAT_SHFT 0
-#define SH_MD_DQLP_MMR_XBIST_L_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQLP_MMR_XBIST_L_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQLP_MMR_XBIST_L_INV_SHFT 40
-#define SH_MD_DQLP_MMR_XBIST_L_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQLP_MMR_XBIST_L_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQLP_MMR_XBIST_L_ROT_SHFT 41
-#define SH_MD_DQLP_MMR_XBIST_L_ROT_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_XBIST_ERR_H 0x0000000100038020
-#define SH_MD_DQLP_MMR_XBIST_ERR_H_MASK 0x00000300ffffffff
-#define SH_MD_DQLP_MMR_XBIST_ERR_H_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_XBIST_ERR_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLP_MMR_XBIST_ERR_H_PAT_SHFT 0
-#define SH_MD_DQLP_MMR_XBIST_ERR_H_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQLP_MMR_XBIST_ERR_H_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQLP_MMR_XBIST_ERR_H_VAL_SHFT 40
-#define SH_MD_DQLP_MMR_XBIST_ERR_H_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQLP_MMR_XBIST_ERR_H_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQLP_MMR_XBIST_ERR_H_MORE_SHFT 41
-#define SH_MD_DQLP_MMR_XBIST_ERR_H_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_XBIST_ERR_L 0x0000000100038030
-#define SH_MD_DQLP_MMR_XBIST_ERR_L_MASK 0x00000300ffffffff
-#define SH_MD_DQLP_MMR_XBIST_ERR_L_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_XBIST_ERR_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLP_MMR_XBIST_ERR_L_PAT_SHFT 0
-#define SH_MD_DQLP_MMR_XBIST_ERR_L_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQLP_MMR_XBIST_ERR_L_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQLP_MMR_XBIST_ERR_L_VAL_SHFT 40
-#define SH_MD_DQLP_MMR_XBIST_ERR_L_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQLP_MMR_XBIST_ERR_L_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQLP_MMR_XBIST_ERR_L_MORE_SHFT 41
-#define SH_MD_DQLP_MMR_XBIST_ERR_L_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_YBIST_H 0x0000000100038800
-#define SH_MD_DQLP_MMR_YBIST_H_MASK 0x00000700ffffffff
-#define SH_MD_DQLP_MMR_YBIST_H_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_YBIST_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLP_MMR_YBIST_H_PAT_SHFT 0
-#define SH_MD_DQLP_MMR_YBIST_H_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQLP_MMR_YBIST_H_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQLP_MMR_YBIST_H_INV_SHFT 40
-#define SH_MD_DQLP_MMR_YBIST_H_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQLP_MMR_YBIST_H_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQLP_MMR_YBIST_H_ROT_SHFT 41
-#define SH_MD_DQLP_MMR_YBIST_H_ROT_MASK 0x0000020000000000
-
-/* SH_MD_DQLP_MMR_YBIST_H_ARM */
-/* Description: writing 1 arms data miscompare capture */
-#define SH_MD_DQLP_MMR_YBIST_H_ARM_SHFT 42
-#define SH_MD_DQLP_MMR_YBIST_H_ARM_MASK 0x0000040000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_YBIST_L 0x0000000100038810
-#define SH_MD_DQLP_MMR_YBIST_L_MASK 0x00000300ffffffff
-#define SH_MD_DQLP_MMR_YBIST_L_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_YBIST_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLP_MMR_YBIST_L_PAT_SHFT 0
-#define SH_MD_DQLP_MMR_YBIST_L_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQLP_MMR_YBIST_L_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQLP_MMR_YBIST_L_INV_SHFT 40
-#define SH_MD_DQLP_MMR_YBIST_L_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQLP_MMR_YBIST_L_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQLP_MMR_YBIST_L_ROT_SHFT 41
-#define SH_MD_DQLP_MMR_YBIST_L_ROT_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_YBIST_ERR_H 0x0000000100038820
-#define SH_MD_DQLP_MMR_YBIST_ERR_H_MASK 0x00000300ffffffff
-#define SH_MD_DQLP_MMR_YBIST_ERR_H_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_YBIST_ERR_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLP_MMR_YBIST_ERR_H_PAT_SHFT 0
-#define SH_MD_DQLP_MMR_YBIST_ERR_H_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQLP_MMR_YBIST_ERR_H_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQLP_MMR_YBIST_ERR_H_VAL_SHFT 40
-#define SH_MD_DQLP_MMR_YBIST_ERR_H_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQLP_MMR_YBIST_ERR_H_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQLP_MMR_YBIST_ERR_H_MORE_SHFT 41
-#define SH_MD_DQLP_MMR_YBIST_ERR_H_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLP_MMR_YBIST_ERR_L 0x0000000100038830
-#define SH_MD_DQLP_MMR_YBIST_ERR_L_MASK 0x00000300ffffffff
-#define SH_MD_DQLP_MMR_YBIST_ERR_L_INIT 0x0000000000000000
-
-/* SH_MD_DQLP_MMR_YBIST_ERR_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLP_MMR_YBIST_ERR_L_PAT_SHFT 0
-#define SH_MD_DQLP_MMR_YBIST_ERR_L_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQLP_MMR_YBIST_ERR_L_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQLP_MMR_YBIST_ERR_L_VAL_SHFT 40
-#define SH_MD_DQLP_MMR_YBIST_ERR_L_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQLP_MMR_YBIST_ERR_L_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQLP_MMR_YBIST_ERR_L_MORE_SHFT 41
-#define SH_MD_DQLP_MMR_YBIST_ERR_L_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_XBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLS_MMR_XBIST_H 0x0000000100048000
-#define SH_MD_DQLS_MMR_XBIST_H_MASK 0x000007ffffffffff
-#define SH_MD_DQLS_MMR_XBIST_H_INIT 0x0000000000000000
-
-/* SH_MD_DQLS_MMR_XBIST_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLS_MMR_XBIST_H_PAT_SHFT 0
-#define SH_MD_DQLS_MMR_XBIST_H_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQLS_MMR_XBIST_H_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQLS_MMR_XBIST_H_INV_SHFT 40
-#define SH_MD_DQLS_MMR_XBIST_H_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQLS_MMR_XBIST_H_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQLS_MMR_XBIST_H_ROT_SHFT 41
-#define SH_MD_DQLS_MMR_XBIST_H_ROT_MASK 0x0000020000000000
-
-/* SH_MD_DQLS_MMR_XBIST_H_ARM */
-/* Description: writing 1 arms data miscompare capture */
-#define SH_MD_DQLS_MMR_XBIST_H_ARM_SHFT 42
-#define SH_MD_DQLS_MMR_XBIST_H_ARM_MASK 0x0000040000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_XBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLS_MMR_XBIST_L 0x0000000100048010
-#define SH_MD_DQLS_MMR_XBIST_L_MASK 0x000003ffffffffff
-#define SH_MD_DQLS_MMR_XBIST_L_INIT 0x0000000000000000
-
-/* SH_MD_DQLS_MMR_XBIST_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLS_MMR_XBIST_L_PAT_SHFT 0
-#define SH_MD_DQLS_MMR_XBIST_L_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQLS_MMR_XBIST_L_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQLS_MMR_XBIST_L_INV_SHFT 40
-#define SH_MD_DQLS_MMR_XBIST_L_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQLS_MMR_XBIST_L_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQLS_MMR_XBIST_L_ROT_SHFT 41
-#define SH_MD_DQLS_MMR_XBIST_L_ROT_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_XBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLS_MMR_XBIST_ERR_H 0x0000000100048020
-#define SH_MD_DQLS_MMR_XBIST_ERR_H_MASK 0x000003ffffffffff
-#define SH_MD_DQLS_MMR_XBIST_ERR_H_INIT 0x0000000000000000
-
-/* SH_MD_DQLS_MMR_XBIST_ERR_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLS_MMR_XBIST_ERR_H_PAT_SHFT 0
-#define SH_MD_DQLS_MMR_XBIST_ERR_H_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQLS_MMR_XBIST_ERR_H_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQLS_MMR_XBIST_ERR_H_VAL_SHFT 40
-#define SH_MD_DQLS_MMR_XBIST_ERR_H_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQLS_MMR_XBIST_ERR_H_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQLS_MMR_XBIST_ERR_H_MORE_SHFT 41
-#define SH_MD_DQLS_MMR_XBIST_ERR_H_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_XBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLS_MMR_XBIST_ERR_L 0x0000000100048030
-#define SH_MD_DQLS_MMR_XBIST_ERR_L_MASK 0x000003ffffffffff
-#define SH_MD_DQLS_MMR_XBIST_ERR_L_INIT 0x0000000000000000
-
-/* SH_MD_DQLS_MMR_XBIST_ERR_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLS_MMR_XBIST_ERR_L_PAT_SHFT 0
-#define SH_MD_DQLS_MMR_XBIST_ERR_L_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQLS_MMR_XBIST_ERR_L_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQLS_MMR_XBIST_ERR_L_VAL_SHFT 40
-#define SH_MD_DQLS_MMR_XBIST_ERR_L_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQLS_MMR_XBIST_ERR_L_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQLS_MMR_XBIST_ERR_L_MORE_SHFT 41
-#define SH_MD_DQLS_MMR_XBIST_ERR_L_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_YBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLS_MMR_YBIST_H 0x0000000100048800
-#define SH_MD_DQLS_MMR_YBIST_H_MASK 0x000007ffffffffff
-#define SH_MD_DQLS_MMR_YBIST_H_INIT 0x0000000000000000
-
-/* SH_MD_DQLS_MMR_YBIST_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLS_MMR_YBIST_H_PAT_SHFT 0
-#define SH_MD_DQLS_MMR_YBIST_H_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQLS_MMR_YBIST_H_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQLS_MMR_YBIST_H_INV_SHFT 40
-#define SH_MD_DQLS_MMR_YBIST_H_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQLS_MMR_YBIST_H_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQLS_MMR_YBIST_H_ROT_SHFT 41
-#define SH_MD_DQLS_MMR_YBIST_H_ROT_MASK 0x0000020000000000
-
-/* SH_MD_DQLS_MMR_YBIST_H_ARM */
-/* Description: writing 1 arms data miscompare capture */
-#define SH_MD_DQLS_MMR_YBIST_H_ARM_SHFT 42
-#define SH_MD_DQLS_MMR_YBIST_H_ARM_MASK 0x0000040000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_YBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLS_MMR_YBIST_L 0x0000000100048810
-#define SH_MD_DQLS_MMR_YBIST_L_MASK 0x000003ffffffffff
-#define SH_MD_DQLS_MMR_YBIST_L_INIT 0x0000000000000000
-
-/* SH_MD_DQLS_MMR_YBIST_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLS_MMR_YBIST_L_PAT_SHFT 0
-#define SH_MD_DQLS_MMR_YBIST_L_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQLS_MMR_YBIST_L_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQLS_MMR_YBIST_L_INV_SHFT 40
-#define SH_MD_DQLS_MMR_YBIST_L_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQLS_MMR_YBIST_L_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQLS_MMR_YBIST_L_ROT_SHFT 41
-#define SH_MD_DQLS_MMR_YBIST_L_ROT_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_YBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLS_MMR_YBIST_ERR_H 0x0000000100048820
-#define SH_MD_DQLS_MMR_YBIST_ERR_H_MASK 0x000003ffffffffff
-#define SH_MD_DQLS_MMR_YBIST_ERR_H_INIT 0x0000000000000000
-
-/* SH_MD_DQLS_MMR_YBIST_ERR_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLS_MMR_YBIST_ERR_H_PAT_SHFT 0
-#define SH_MD_DQLS_MMR_YBIST_ERR_H_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQLS_MMR_YBIST_ERR_H_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQLS_MMR_YBIST_ERR_H_VAL_SHFT 40
-#define SH_MD_DQLS_MMR_YBIST_ERR_H_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQLS_MMR_YBIST_ERR_H_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQLS_MMR_YBIST_ERR_H_MORE_SHFT 41
-#define SH_MD_DQLS_MMR_YBIST_ERR_H_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_YBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQLS_MMR_YBIST_ERR_L 0x0000000100048830
-#define SH_MD_DQLS_MMR_YBIST_ERR_L_MASK 0x000003ffffffffff
-#define SH_MD_DQLS_MMR_YBIST_ERR_L_INIT 0x0000000000000000
-
-/* SH_MD_DQLS_MMR_YBIST_ERR_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQLS_MMR_YBIST_ERR_L_PAT_SHFT 0
-#define SH_MD_DQLS_MMR_YBIST_ERR_L_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQLS_MMR_YBIST_ERR_L_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQLS_MMR_YBIST_ERR_L_VAL_SHFT 40
-#define SH_MD_DQLS_MMR_YBIST_ERR_L_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQLS_MMR_YBIST_ERR_L_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQLS_MMR_YBIST_ERR_L_MORE_SHFT 41
-#define SH_MD_DQLS_MMR_YBIST_ERR_L_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_JNR_DEBUG" */
-/* joiner/fct debug configuration */
-/* ==================================================================== */
-
-#define SH_MD_DQLS_MMR_JNR_DEBUG 0x0000000100049000
-#define SH_MD_DQLS_MMR_JNR_DEBUG_MASK 0x0000000000000003
-#define SH_MD_DQLS_MMR_JNR_DEBUG_INIT 0x0000000000000000
-
-/* SH_MD_DQLS_MMR_JNR_DEBUG_PX */
-/* Description: select 0=pi 1=xn side */
-#define SH_MD_DQLS_MMR_JNR_DEBUG_PX_SHFT 0
-#define SH_MD_DQLS_MMR_JNR_DEBUG_PX_MASK 0x0000000000000001
-
-/* SH_MD_DQLS_MMR_JNR_DEBUG_RW */
-/* Description: select 0=read 1=write side */
-#define SH_MD_DQLS_MMR_JNR_DEBUG_RW_SHFT 1
-#define SH_MD_DQLS_MMR_JNR_DEBUG_RW_MASK 0x0000000000000002
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_XAMOPW_ERR" */
-/* amo/partial rmw ecc error register */
-/* ==================================================================== */
-
-#define SH_MD_DQLS_MMR_XAMOPW_ERR 0x000000010004a000
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_MASK 0x0000000103ff03ff
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_INIT 0x0000000000000000
-
-/* SH_MD_DQLS_MMR_XAMOPW_ERR_SSYN */
-/* Description: store data syndrome */
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_SSYN_SHFT 0
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_SSYN_MASK 0x00000000000000ff
-
-/* SH_MD_DQLS_MMR_XAMOPW_ERR_SCOR */
-/* Description: correctable ecc errror on store data */
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_SCOR_SHFT 8
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_SCOR_MASK 0x0000000000000100
-
-/* SH_MD_DQLS_MMR_XAMOPW_ERR_SUNC */
-/* Description: uncorrectable ecc errror on store data */
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_SUNC_SHFT 9
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_SUNC_MASK 0x0000000000000200
-
-/* SH_MD_DQLS_MMR_XAMOPW_ERR_RSYN */
-/* Description: memory read data syndrome */
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_RSYN_SHFT 16
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_RSYN_MASK 0x0000000000ff0000
-
-/* SH_MD_DQLS_MMR_XAMOPW_ERR_RCOR */
-/* Description: correctable ecc errror on read data */
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_RCOR_SHFT 24
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_RCOR_MASK 0x0000000001000000
-
-/* SH_MD_DQLS_MMR_XAMOPW_ERR_RUNC */
-/* Description: uncorrectable ecc errror on read data */
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_RUNC_SHFT 25
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_RUNC_MASK 0x0000000002000000
-
-/* SH_MD_DQLS_MMR_XAMOPW_ERR_ARM */
-/* Description: writing 1 arms ecc error capture */
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_ARM_SHFT 32
-#define SH_MD_DQLS_MMR_XAMOPW_ERR_ARM_MASK 0x0000000100000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_CONFIG" */
-/* DQ directory config register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_CONFIG 0x0000000100050000
-#define SH_MD_DQRP_MMR_DIR_CONFIG_MASK 0x000000000000001f
-#define SH_MD_DQRP_MMR_DIR_CONFIG_INIT 0x0000000000000010
-
-/* SH_MD_DQRP_MMR_DIR_CONFIG_SYS_SIZE */
-/* Description: system size code */
-#define SH_MD_DQRP_MMR_DIR_CONFIG_SYS_SIZE_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_CONFIG_SYS_SIZE_MASK 0x0000000000000007
-
-/* SH_MD_DQRP_MMR_DIR_CONFIG_EN_DIRECC */
-/* Description: enable directory ecc correction */
-#define SH_MD_DQRP_MMR_DIR_CONFIG_EN_DIRECC_SHFT 3
-#define SH_MD_DQRP_MMR_DIR_CONFIG_EN_DIRECC_MASK 0x0000000000000008
-
-/* SH_MD_DQRP_MMR_DIR_CONFIG_EN_DIRPOIS */
-/* Description: enable local poisoning for dir table fall-through */
-#define SH_MD_DQRP_MMR_DIR_CONFIG_EN_DIRPOIS_SHFT 4
-#define SH_MD_DQRP_MMR_DIR_CONFIG_EN_DIRPOIS_MASK 0x0000000000000010
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRESVEC0" */
-/* node [63:0] presence bits */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRESVEC0 0x0000000100050100
-#define SH_MD_DQRP_MMR_DIR_PRESVEC0_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_PRESVEC0_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRESVEC0_VEC */
-/* Description: node presence bits, 1=present */
-#define SH_MD_DQRP_MMR_DIR_PRESVEC0_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRESVEC0_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRESVEC1" */
-/* node [127:64] presence bits */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRESVEC1 0x0000000100050110
-#define SH_MD_DQRP_MMR_DIR_PRESVEC1_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_PRESVEC1_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRESVEC1_VEC */
-/* Description: node presence bits, 1=present */
-#define SH_MD_DQRP_MMR_DIR_PRESVEC1_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRESVEC1_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRESVEC2" */
-/* node [191:128] presence bits */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRESVEC2 0x0000000100050120
-#define SH_MD_DQRP_MMR_DIR_PRESVEC2_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_PRESVEC2_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRESVEC2_VEC */
-/* Description: node presence bits, 1=present */
-#define SH_MD_DQRP_MMR_DIR_PRESVEC2_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRESVEC2_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRESVEC3" */
-/* node [255:192] presence bits */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRESVEC3 0x0000000100050130
-#define SH_MD_DQRP_MMR_DIR_PRESVEC3_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_PRESVEC3_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRESVEC3_VEC */
-/* Description: node presence bits, 1=present */
-#define SH_MD_DQRP_MMR_DIR_PRESVEC3_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRESVEC3_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC0" */
-/* local vector for acc=0 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_LOCVEC0 0x0000000100050200
-#define SH_MD_DQRP_MMR_DIR_LOCVEC0_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_LOCVEC0_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_LOCVEC0_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQRP_MMR_DIR_LOCVEC0_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_LOCVEC0_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC1" */
-/* local vector for acc=1 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_LOCVEC1 0x0000000100050210
-#define SH_MD_DQRP_MMR_DIR_LOCVEC1_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_LOCVEC1_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_LOCVEC1_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQRP_MMR_DIR_LOCVEC1_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_LOCVEC1_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC2" */
-/* local vector for acc=2 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_LOCVEC2 0x0000000100050220
-#define SH_MD_DQRP_MMR_DIR_LOCVEC2_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_LOCVEC2_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_LOCVEC2_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQRP_MMR_DIR_LOCVEC2_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_LOCVEC2_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC3" */
-/* local vector for acc=3 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_LOCVEC3 0x0000000100050230
-#define SH_MD_DQRP_MMR_DIR_LOCVEC3_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_LOCVEC3_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_LOCVEC3_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQRP_MMR_DIR_LOCVEC3_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_LOCVEC3_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC4" */
-/* local vector for acc=4 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_LOCVEC4 0x0000000100050240
-#define SH_MD_DQRP_MMR_DIR_LOCVEC4_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_LOCVEC4_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_LOCVEC4_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQRP_MMR_DIR_LOCVEC4_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_LOCVEC4_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC5" */
-/* local vector for acc=5 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_LOCVEC5 0x0000000100050250
-#define SH_MD_DQRP_MMR_DIR_LOCVEC5_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_LOCVEC5_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_LOCVEC5_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQRP_MMR_DIR_LOCVEC5_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_LOCVEC5_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC6" */
-/* local vector for acc=6 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_LOCVEC6 0x0000000100050260
-#define SH_MD_DQRP_MMR_DIR_LOCVEC6_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_LOCVEC6_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_LOCVEC6_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQRP_MMR_DIR_LOCVEC6_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_LOCVEC6_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC7" */
-/* local vector for acc=7 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_LOCVEC7 0x0000000100050270
-#define SH_MD_DQRP_MMR_DIR_LOCVEC7_MASK 0xffffffffffffffff
-#define SH_MD_DQRP_MMR_DIR_LOCVEC7_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_LOCVEC7_VEC */
-/* Description: 1 node is local */
-#define SH_MD_DQRP_MMR_DIR_LOCVEC7_VEC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_LOCVEC7_VEC_MASK 0xffffffffffffffff
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC0" */
-/* privilege vector for acc=0 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRIVEC0 0x0000000100050300
-#define SH_MD_DQRP_MMR_DIR_PRIVEC0_MASK 0x000000000fffffff
-#define SH_MD_DQRP_MMR_DIR_PRIVEC0_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC0_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC0_IN_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRIVEC0_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC0_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC0_OUT_SHFT 14
-#define SH_MD_DQRP_MMR_DIR_PRIVEC0_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC1" */
-/* privilege vector for acc=1 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRIVEC1 0x0000000100050310
-#define SH_MD_DQRP_MMR_DIR_PRIVEC1_MASK 0x000000000fffffff
-#define SH_MD_DQRP_MMR_DIR_PRIVEC1_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC1_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC1_IN_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRIVEC1_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC1_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC1_OUT_SHFT 14
-#define SH_MD_DQRP_MMR_DIR_PRIVEC1_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC2" */
-/* privilege vector for acc=2 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRIVEC2 0x0000000100050320
-#define SH_MD_DQRP_MMR_DIR_PRIVEC2_MASK 0x000000000fffffff
-#define SH_MD_DQRP_MMR_DIR_PRIVEC2_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC2_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC2_IN_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRIVEC2_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC2_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC2_OUT_SHFT 14
-#define SH_MD_DQRP_MMR_DIR_PRIVEC2_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC3" */
-/* privilege vector for acc=3 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRIVEC3 0x0000000100050330
-#define SH_MD_DQRP_MMR_DIR_PRIVEC3_MASK 0x000000000fffffff
-#define SH_MD_DQRP_MMR_DIR_PRIVEC3_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC3_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC3_IN_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRIVEC3_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC3_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC3_OUT_SHFT 14
-#define SH_MD_DQRP_MMR_DIR_PRIVEC3_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC4" */
-/* privilege vector for acc=4 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRIVEC4 0x0000000100050340
-#define SH_MD_DQRP_MMR_DIR_PRIVEC4_MASK 0x000000000fffffff
-#define SH_MD_DQRP_MMR_DIR_PRIVEC4_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC4_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC4_IN_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRIVEC4_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC4_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC4_OUT_SHFT 14
-#define SH_MD_DQRP_MMR_DIR_PRIVEC4_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC5" */
-/* privilege vector for acc=5 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRIVEC5 0x0000000100050350
-#define SH_MD_DQRP_MMR_DIR_PRIVEC5_MASK 0x000000000fffffff
-#define SH_MD_DQRP_MMR_DIR_PRIVEC5_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC5_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC5_IN_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRIVEC5_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC5_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC5_OUT_SHFT 14
-#define SH_MD_DQRP_MMR_DIR_PRIVEC5_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC6" */
-/* privilege vector for acc=6 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRIVEC6 0x0000000100050360
-#define SH_MD_DQRP_MMR_DIR_PRIVEC6_MASK 0x000000000fffffff
-#define SH_MD_DQRP_MMR_DIR_PRIVEC6_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC6_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC6_IN_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRIVEC6_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC6_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC6_OUT_SHFT 14
-#define SH_MD_DQRP_MMR_DIR_PRIVEC6_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC7" */
-/* privilege vector for acc=7 */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_PRIVEC7 0x0000000100050370
-#define SH_MD_DQRP_MMR_DIR_PRIVEC7_MASK 0x000000000fffffff
-#define SH_MD_DQRP_MMR_DIR_PRIVEC7_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC7_IN */
-/* Description: in partition privileges, locvec bit=1 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC7_IN_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_PRIVEC7_IN_MASK 0x0000000000003fff
-
-/* SH_MD_DQRP_MMR_DIR_PRIVEC7_OUT */
-/* Description: out of partition privileges, locvec bit=0 */
-#define SH_MD_DQRP_MMR_DIR_PRIVEC7_OUT_SHFT 14
-#define SH_MD_DQRP_MMR_DIR_PRIVEC7_OUT_MASK 0x000000000fffc000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_TIMER" */
-/* MD SXRO timer */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_TIMER 0x0000000100050400
-#define SH_MD_DQRP_MMR_DIR_TIMER_MASK 0x00000000003fffff
-#define SH_MD_DQRP_MMR_DIR_TIMER_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_TIMER_TIMER_DIV */
-/* Description: timer divide register */
-#define SH_MD_DQRP_MMR_DIR_TIMER_TIMER_DIV_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_TIMER_TIMER_DIV_MASK 0x0000000000000fff
-
-/* SH_MD_DQRP_MMR_DIR_TIMER_TIMER_EN */
-/* Description: timer enable */
-#define SH_MD_DQRP_MMR_DIR_TIMER_TIMER_EN_SHFT 12
-#define SH_MD_DQRP_MMR_DIR_TIMER_TIMER_EN_MASK 0x0000000000001000
-
-/* SH_MD_DQRP_MMR_DIR_TIMER_TIMER_CUR */
-/* Description: value of current timer */
-#define SH_MD_DQRP_MMR_DIR_TIMER_TIMER_CUR_SHFT 13
-#define SH_MD_DQRP_MMR_DIR_TIMER_TIMER_CUR_MASK 0x00000000003fe000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY" */
-/* directory pio write data */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY 0x0000000100051000
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_MASK 0x03ffffffffffffff
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_DIRA */
-/* Description: directory entry A */
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_DIRA_SHFT 0
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_DIRA_MASK 0x0000000003ffffff
-
-/* SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_DIRB */
-/* Description: directory entry B */
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_DIRB_SHFT 26
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_DIRB_MASK 0x000ffffffc000000
-
-/* SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_PRI */
-/* Description: directory priority */
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_PRI_SHFT 52
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_PRI_MASK 0x0070000000000000
-
-/* SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_ACC */
-/* Description: directory access bits */
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_ACC_SHFT 55
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY_ACC_MASK 0x0380000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_PIOWD_DIR_ECC" */
-/* directory ecc register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ECC 0x0000000100051010
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ECC_MASK 0x0000000000003fff
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ECC_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_PIOWD_DIR_ECC_ECCA */
-/* Description: XOR bits for directory ECC group 1 */
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ECC_ECCA_SHFT 0
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ECC_ECCA_MASK 0x000000000000007f
-
-/* SH_MD_DQRP_MMR_PIOWD_DIR_ECC_ECCB */
-/* Description: XOR bits for directory ECC group 2 */
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ECC_ECCB_SHFT 7
-#define SH_MD_DQRP_MMR_PIOWD_DIR_ECC_ECCB_MASK 0x0000000000003f80
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY" */
-/* x directory pio read data */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY 0x0000000100052000
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_MASK 0x0fffffffffffffff
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_DIRA */
-/* Description: directory entry A */
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_DIRA_SHFT 0
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_DIRA_MASK 0x0000000003ffffff
-
-/* SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_DIRB */
-/* Description: directory entry B */
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_DIRB_SHFT 26
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_DIRB_MASK 0x000ffffffc000000
-
-/* SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_PRI */
-/* Description: directory priority */
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_PRI_SHFT 52
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_PRI_MASK 0x0070000000000000
-
-/* SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_ACC */
-/* Description: directory access bits */
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_ACC_SHFT 55
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_ACC_MASK 0x0380000000000000
-
-/* SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_COR */
-/* Description: correctable ecc error */
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_COR_SHFT 58
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_COR_MASK 0x0400000000000000
-
-/* SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_UNC */
-/* Description: uncorrectable ecc error */
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_UNC_SHFT 59
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY_UNC_MASK 0x0800000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XPIORD_XDIR_ECC" */
-/* x directory ecc */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ECC 0x0000000100052010
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ECC_MASK 0x0000000000003fff
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ECC_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_XPIORD_XDIR_ECC_ECCA */
-/* Description: group 1 ecc */
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ECC_ECCA_SHFT 0
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ECC_ECCA_MASK 0x000000000000007f
-
-/* SH_MD_DQRP_MMR_XPIORD_XDIR_ECC_ECCB */
-/* Description: group 2 ecc */
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ECC_ECCB_SHFT 7
-#define SH_MD_DQRP_MMR_XPIORD_XDIR_ECC_ECCB_MASK 0x0000000000003f80
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY" */
-/* y directory pio read data */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY 0x0000000100052800
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_MASK 0x0fffffffffffffff
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_DIRA */
-/* Description: directory entry A */
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_DIRA_SHFT 0
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_DIRA_MASK 0x0000000003ffffff
-
-/* SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_DIRB */
-/* Description: directory entry B */
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_DIRB_SHFT 26
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_DIRB_MASK 0x000ffffffc000000
-
-/* SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_PRI */
-/* Description: directory priority */
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_PRI_SHFT 52
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_PRI_MASK 0x0070000000000000
-
-/* SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_ACC */
-/* Description: directory access bits */
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_ACC_SHFT 55
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_ACC_MASK 0x0380000000000000
-
-/* SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_COR */
-/* Description: correctable ecc error */
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_COR_SHFT 58
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_COR_MASK 0x0400000000000000
-
-/* SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_UNC */
-/* Description: uncorrectable ecc error */
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_UNC_SHFT 59
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY_UNC_MASK 0x0800000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YPIORD_YDIR_ECC" */
-/* y directory ecc */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ECC 0x0000000100052810
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ECC_MASK 0x0000000000003fff
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ECC_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_YPIORD_YDIR_ECC_ECCA */
-/* Description: group 1 ecc */
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ECC_ECCA_SHFT 0
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ECC_ECCA_MASK 0x000000000000007f
-
-/* SH_MD_DQRP_MMR_YPIORD_YDIR_ECC_ECCB */
-/* Description: group 2 ecc */
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ECC_ECCB_SHFT 7
-#define SH_MD_DQRP_MMR_YPIORD_YDIR_ECC_ECCB_MASK 0x0000000000003f80
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XCERR1" */
-/* correctable dir ecc group 1 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_XCERR1 0x0000000100053000
-#define SH_MD_DQRP_MMR_XCERR1_MASK 0x0000007fffffffff
-#define SH_MD_DQRP_MMR_XCERR1_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_XCERR1_GRP1 */
-/* Description: ecc group 1 bits */
-#define SH_MD_DQRP_MMR_XCERR1_GRP1_SHFT 0
-#define SH_MD_DQRP_MMR_XCERR1_GRP1_MASK 0x0000000fffffffff
-
-/* SH_MD_DQRP_MMR_XCERR1_VAL */
-/* Description: correctable ecc error in group 1 bits */
-#define SH_MD_DQRP_MMR_XCERR1_VAL_SHFT 36
-#define SH_MD_DQRP_MMR_XCERR1_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQRP_MMR_XCERR1_MORE */
-/* Description: more than one correctable ecc error in group 1 */
-#define SH_MD_DQRP_MMR_XCERR1_MORE_SHFT 37
-#define SH_MD_DQRP_MMR_XCERR1_MORE_MASK 0x0000002000000000
-
-/* SH_MD_DQRP_MMR_XCERR1_ARM */
-/* Description: writing 1 arms uncorrectable ecc error capture */
-#define SH_MD_DQRP_MMR_XCERR1_ARM_SHFT 38
-#define SH_MD_DQRP_MMR_XCERR1_ARM_MASK 0x0000004000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XCERR2" */
-/* correctable dir ecc group 2 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_XCERR2 0x0000000100053010
-#define SH_MD_DQRP_MMR_XCERR2_MASK 0x0000003fffffffff
-#define SH_MD_DQRP_MMR_XCERR2_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_XCERR2_GRP2 */
-/* Description: ecc group 2 bits */
-#define SH_MD_DQRP_MMR_XCERR2_GRP2_SHFT 0
-#define SH_MD_DQRP_MMR_XCERR2_GRP2_MASK 0x0000000fffffffff
-
-/* SH_MD_DQRP_MMR_XCERR2_VAL */
-/* Description: correctable ecc error in group 2 bits */
-#define SH_MD_DQRP_MMR_XCERR2_VAL_SHFT 36
-#define SH_MD_DQRP_MMR_XCERR2_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQRP_MMR_XCERR2_MORE */
-/* Description: more than one correctable ecc error in group 2 */
-#define SH_MD_DQRP_MMR_XCERR2_MORE_SHFT 37
-#define SH_MD_DQRP_MMR_XCERR2_MORE_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XUERR1" */
-/* uncorrectable dir ecc group 1 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_XUERR1 0x0000000100053020
-#define SH_MD_DQRP_MMR_XUERR1_MASK 0x0000007fffffffff
-#define SH_MD_DQRP_MMR_XUERR1_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_XUERR1_GRP1 */
-/* Description: ecc group 1 bits */
-#define SH_MD_DQRP_MMR_XUERR1_GRP1_SHFT 0
-#define SH_MD_DQRP_MMR_XUERR1_GRP1_MASK 0x0000000fffffffff
-
-/* SH_MD_DQRP_MMR_XUERR1_VAL */
-/* Description: uncorrectable ecc error in group 1 bits */
-#define SH_MD_DQRP_MMR_XUERR1_VAL_SHFT 36
-#define SH_MD_DQRP_MMR_XUERR1_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQRP_MMR_XUERR1_MORE */
-/* Description: more than one uncorrectable ecc error in group 1 */
-#define SH_MD_DQRP_MMR_XUERR1_MORE_SHFT 37
-#define SH_MD_DQRP_MMR_XUERR1_MORE_MASK 0x0000002000000000
-
-/* SH_MD_DQRP_MMR_XUERR1_ARM */
-/* Description: writing 1 arms uncorrectable ecc error capture */
-#define SH_MD_DQRP_MMR_XUERR1_ARM_SHFT 38
-#define SH_MD_DQRP_MMR_XUERR1_ARM_MASK 0x0000004000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XUERR2" */
-/* uncorrectable dir ecc group 2 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_XUERR2 0x0000000100053030
-#define SH_MD_DQRP_MMR_XUERR2_MASK 0x0000003fffffffff
-#define SH_MD_DQRP_MMR_XUERR2_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_XUERR2_GRP2 */
-/* Description: ecc group 2 bits */
-#define SH_MD_DQRP_MMR_XUERR2_GRP2_SHFT 0
-#define SH_MD_DQRP_MMR_XUERR2_GRP2_MASK 0x0000000fffffffff
-
-/* SH_MD_DQRP_MMR_XUERR2_VAL */
-/* Description: uncorrectable ecc error in group 2 bits */
-#define SH_MD_DQRP_MMR_XUERR2_VAL_SHFT 36
-#define SH_MD_DQRP_MMR_XUERR2_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQRP_MMR_XUERR2_MORE */
-/* Description: more than one uncorrectable ecc error in group 2 */
-#define SH_MD_DQRP_MMR_XUERR2_MORE_SHFT 37
-#define SH_MD_DQRP_MMR_XUERR2_MORE_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XPERR" */
-/* protocol error register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_XPERR 0x0000000100053040
-#define SH_MD_DQRP_MMR_XPERR_MASK 0x7fffffffffffffff
-#define SH_MD_DQRP_MMR_XPERR_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_XPERR_DIR */
-/* Description: directory entry */
-#define SH_MD_DQRP_MMR_XPERR_DIR_SHFT 0
-#define SH_MD_DQRP_MMR_XPERR_DIR_MASK 0x0000000003ffffff
-
-/* SH_MD_DQRP_MMR_XPERR_CMD */
-/* Description: incoming command */
-#define SH_MD_DQRP_MMR_XPERR_CMD_SHFT 26
-#define SH_MD_DQRP_MMR_XPERR_CMD_MASK 0x00000003fc000000
-
-/* SH_MD_DQRP_MMR_XPERR_SRC */
-/* Description: source node of dir operation */
-#define SH_MD_DQRP_MMR_XPERR_SRC_SHFT 34
-#define SH_MD_DQRP_MMR_XPERR_SRC_MASK 0x0000fffc00000000
-
-/* SH_MD_DQRP_MMR_XPERR_PRIGE */
-/* Description: priority was greater-equal */
-#define SH_MD_DQRP_MMR_XPERR_PRIGE_SHFT 48
-#define SH_MD_DQRP_MMR_XPERR_PRIGE_MASK 0x0001000000000000
-
-/* SH_MD_DQRP_MMR_XPERR_PRIV */
-/* Description: access privilege bit */
-#define SH_MD_DQRP_MMR_XPERR_PRIV_SHFT 49
-#define SH_MD_DQRP_MMR_XPERR_PRIV_MASK 0x0002000000000000
-
-/* SH_MD_DQRP_MMR_XPERR_COR */
-/* Description: correctable ecc error */
-#define SH_MD_DQRP_MMR_XPERR_COR_SHFT 50
-#define SH_MD_DQRP_MMR_XPERR_COR_MASK 0x0004000000000000
-
-/* SH_MD_DQRP_MMR_XPERR_UNC */
-/* Description: uncorrectable ecc error */
-#define SH_MD_DQRP_MMR_XPERR_UNC_SHFT 51
-#define SH_MD_DQRP_MMR_XPERR_UNC_MASK 0x0008000000000000
-
-/* SH_MD_DQRP_MMR_XPERR_MYBIT */
-/* Description: ptreq,timeq,timlast,timspec,onlyme,anytim,ptrii,src */
-#define SH_MD_DQRP_MMR_XPERR_MYBIT_SHFT 52
-#define SH_MD_DQRP_MMR_XPERR_MYBIT_MASK 0x0ff0000000000000
-
-/* SH_MD_DQRP_MMR_XPERR_VAL */
-/* Description: protocol error info valid */
-#define SH_MD_DQRP_MMR_XPERR_VAL_SHFT 60
-#define SH_MD_DQRP_MMR_XPERR_VAL_MASK 0x1000000000000000
-
-/* SH_MD_DQRP_MMR_XPERR_MORE */
-/* Description: more than one protocol error */
-#define SH_MD_DQRP_MMR_XPERR_MORE_SHFT 61
-#define SH_MD_DQRP_MMR_XPERR_MORE_MASK 0x2000000000000000
-
-/* SH_MD_DQRP_MMR_XPERR_ARM */
-/* Description: writing 1 arms error capture */
-#define SH_MD_DQRP_MMR_XPERR_ARM_SHFT 62
-#define SH_MD_DQRP_MMR_XPERR_ARM_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YCERR1" */
-/* correctable dir ecc group 1 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_YCERR1 0x0000000100053800
-#define SH_MD_DQRP_MMR_YCERR1_MASK 0x0000007fffffffff
-#define SH_MD_DQRP_MMR_YCERR1_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_YCERR1_GRP1 */
-/* Description: ecc group 1 bits */
-#define SH_MD_DQRP_MMR_YCERR1_GRP1_SHFT 0
-#define SH_MD_DQRP_MMR_YCERR1_GRP1_MASK 0x0000000fffffffff
-
-/* SH_MD_DQRP_MMR_YCERR1_VAL */
-/* Description: correctable ecc error in group 1 bits */
-#define SH_MD_DQRP_MMR_YCERR1_VAL_SHFT 36
-#define SH_MD_DQRP_MMR_YCERR1_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQRP_MMR_YCERR1_MORE */
-/* Description: more than one correctable ecc error in group 1 */
-#define SH_MD_DQRP_MMR_YCERR1_MORE_SHFT 37
-#define SH_MD_DQRP_MMR_YCERR1_MORE_MASK 0x0000002000000000
-
-/* SH_MD_DQRP_MMR_YCERR1_ARM */
-/* Description: writing 1 arms uncorrectable ecc error capture */
-#define SH_MD_DQRP_MMR_YCERR1_ARM_SHFT 38
-#define SH_MD_DQRP_MMR_YCERR1_ARM_MASK 0x0000004000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YCERR2" */
-/* correctable dir ecc group 2 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_YCERR2 0x0000000100053810
-#define SH_MD_DQRP_MMR_YCERR2_MASK 0x0000003fffffffff
-#define SH_MD_DQRP_MMR_YCERR2_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_YCERR2_GRP2 */
-/* Description: ecc group 2 bits */
-#define SH_MD_DQRP_MMR_YCERR2_GRP2_SHFT 0
-#define SH_MD_DQRP_MMR_YCERR2_GRP2_MASK 0x0000000fffffffff
-
-/* SH_MD_DQRP_MMR_YCERR2_VAL */
-/* Description: correctable ecc error in group 2 bits */
-#define SH_MD_DQRP_MMR_YCERR2_VAL_SHFT 36
-#define SH_MD_DQRP_MMR_YCERR2_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQRP_MMR_YCERR2_MORE */
-/* Description: more than one correctable ecc error in group 2 */
-#define SH_MD_DQRP_MMR_YCERR2_MORE_SHFT 37
-#define SH_MD_DQRP_MMR_YCERR2_MORE_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YUERR1" */
-/* uncorrectable dir ecc group 1 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_YUERR1 0x0000000100053820
-#define SH_MD_DQRP_MMR_YUERR1_MASK 0x0000007fffffffff
-#define SH_MD_DQRP_MMR_YUERR1_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_YUERR1_GRP1 */
-/* Description: ecc group 1 bits */
-#define SH_MD_DQRP_MMR_YUERR1_GRP1_SHFT 0
-#define SH_MD_DQRP_MMR_YUERR1_GRP1_MASK 0x0000000fffffffff
-
-/* SH_MD_DQRP_MMR_YUERR1_VAL */
-/* Description: uncorrectable ecc error in group 1 bits */
-#define SH_MD_DQRP_MMR_YUERR1_VAL_SHFT 36
-#define SH_MD_DQRP_MMR_YUERR1_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQRP_MMR_YUERR1_MORE */
-/* Description: more than one uncorrectable ecc error in group 1 */
-#define SH_MD_DQRP_MMR_YUERR1_MORE_SHFT 37
-#define SH_MD_DQRP_MMR_YUERR1_MORE_MASK 0x0000002000000000
-
-/* SH_MD_DQRP_MMR_YUERR1_ARM */
-/* Description: writing 1 arms uncorrectable ecc error capture */
-#define SH_MD_DQRP_MMR_YUERR1_ARM_SHFT 38
-#define SH_MD_DQRP_MMR_YUERR1_ARM_MASK 0x0000004000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YUERR2" */
-/* uncorrectable dir ecc group 2 error register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_YUERR2 0x0000000100053830
-#define SH_MD_DQRP_MMR_YUERR2_MASK 0x0000003fffffffff
-#define SH_MD_DQRP_MMR_YUERR2_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_YUERR2_GRP2 */
-/* Description: ecc group 2 bits */
-#define SH_MD_DQRP_MMR_YUERR2_GRP2_SHFT 0
-#define SH_MD_DQRP_MMR_YUERR2_GRP2_MASK 0x0000000fffffffff
-
-/* SH_MD_DQRP_MMR_YUERR2_VAL */
-/* Description: uncorrectable ecc error in group 2 bits */
-#define SH_MD_DQRP_MMR_YUERR2_VAL_SHFT 36
-#define SH_MD_DQRP_MMR_YUERR2_VAL_MASK 0x0000001000000000
-
-/* SH_MD_DQRP_MMR_YUERR2_MORE */
-/* Description: more than one uncorrectable ecc error in group 2 */
-#define SH_MD_DQRP_MMR_YUERR2_MORE_SHFT 37
-#define SH_MD_DQRP_MMR_YUERR2_MORE_MASK 0x0000002000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YPERR" */
-/* protocol error register */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_YPERR 0x0000000100053840
-#define SH_MD_DQRP_MMR_YPERR_MASK 0x7fffffffffffffff
-#define SH_MD_DQRP_MMR_YPERR_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_YPERR_DIR */
-/* Description: directory entry */
-#define SH_MD_DQRP_MMR_YPERR_DIR_SHFT 0
-#define SH_MD_DQRP_MMR_YPERR_DIR_MASK 0x0000000003ffffff
-
-/* SH_MD_DQRP_MMR_YPERR_CMD */
-/* Description: incoming command */
-#define SH_MD_DQRP_MMR_YPERR_CMD_SHFT 26
-#define SH_MD_DQRP_MMR_YPERR_CMD_MASK 0x00000003fc000000
-
-/* SH_MD_DQRP_MMR_YPERR_SRC */
-/* Description: source node of dir operation */
-#define SH_MD_DQRP_MMR_YPERR_SRC_SHFT 34
-#define SH_MD_DQRP_MMR_YPERR_SRC_MASK 0x0000fffc00000000
-
-/* SH_MD_DQRP_MMR_YPERR_PRIGE */
-/* Description: priority was greater-equal */
-#define SH_MD_DQRP_MMR_YPERR_PRIGE_SHFT 48
-#define SH_MD_DQRP_MMR_YPERR_PRIGE_MASK 0x0001000000000000
-
-/* SH_MD_DQRP_MMR_YPERR_PRIV */
-/* Description: access privilege bit */
-#define SH_MD_DQRP_MMR_YPERR_PRIV_SHFT 49
-#define SH_MD_DQRP_MMR_YPERR_PRIV_MASK 0x0002000000000000
-
-/* SH_MD_DQRP_MMR_YPERR_COR */
-/* Description: correctable ecc error */
-#define SH_MD_DQRP_MMR_YPERR_COR_SHFT 50
-#define SH_MD_DQRP_MMR_YPERR_COR_MASK 0x0004000000000000
-
-/* SH_MD_DQRP_MMR_YPERR_UNC */
-/* Description: uncorrectable ecc error */
-#define SH_MD_DQRP_MMR_YPERR_UNC_SHFT 51
-#define SH_MD_DQRP_MMR_YPERR_UNC_MASK 0x0008000000000000
-
-/* SH_MD_DQRP_MMR_YPERR_MYBIT */
-/* Description: ptreq,timeq,timlast,timspec,onlyme,anytim,ptrii,src */
-#define SH_MD_DQRP_MMR_YPERR_MYBIT_SHFT 52
-#define SH_MD_DQRP_MMR_YPERR_MYBIT_MASK 0x0ff0000000000000
-
-/* SH_MD_DQRP_MMR_YPERR_VAL */
-/* Description: protocol error info valid */
-#define SH_MD_DQRP_MMR_YPERR_VAL_SHFT 60
-#define SH_MD_DQRP_MMR_YPERR_VAL_MASK 0x1000000000000000
-
-/* SH_MD_DQRP_MMR_YPERR_MORE */
-/* Description: more than one protocol error */
-#define SH_MD_DQRP_MMR_YPERR_MORE_SHFT 61
-#define SH_MD_DQRP_MMR_YPERR_MORE_MASK 0x2000000000000000
-
-/* SH_MD_DQRP_MMR_YPERR_ARM */
-/* Description: writing 1 arms error capture */
-#define SH_MD_DQRP_MMR_YPERR_ARM_SHFT 62
-#define SH_MD_DQRP_MMR_YPERR_ARM_MASK 0x4000000000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_CMDTRIG" */
-/* cmd triggers */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_CMDTRIG 0x0000000100054000
-#define SH_MD_DQRP_MMR_DIR_CMDTRIG_MASK 0x00000000ffffffff
-#define SH_MD_DQRP_MMR_DIR_CMDTRIG_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD0 */
-/* Description: command trigger 0 */
-#define SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD0_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD0_MASK 0x00000000000000ff
-
-/* SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD1 */
-/* Description: command trigger 1 */
-#define SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD1_SHFT 8
-#define SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD1_MASK 0x000000000000ff00
-
-/* SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD2 */
-/* Description: command trigger 2 */
-#define SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD2_SHFT 16
-#define SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD2_MASK 0x0000000000ff0000
-
-/* SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD3 */
-/* Description: command trigger 3 */
-#define SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD3_SHFT 24
-#define SH_MD_DQRP_MMR_DIR_CMDTRIG_CMD3_MASK 0x00000000ff000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_TBLTRIG" */
-/* dir table trigger */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG 0x0000000100054010
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_MASK 0x000003ffffffffff
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_TBLTRIG_SRC */
-/* Description: source of request */
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_SRC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_SRC_MASK 0x0000000000003fff
-
-/* SH_MD_DQRP_MMR_DIR_TBLTRIG_CMD */
-/* Description: incoming request */
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_CMD_SHFT 14
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_CMD_MASK 0x00000000003fc000
-
-/* SH_MD_DQRP_MMR_DIR_TBLTRIG_ACC */
-/* Description: uncorrectable error, privilege bit */
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_ACC_SHFT 22
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_ACC_MASK 0x0000000000c00000
-
-/* SH_MD_DQRP_MMR_DIR_TBLTRIG_PRIGE */
-/* Description: priority greater-equal */
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_PRIGE_SHFT 24
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_PRIGE_MASK 0x0000000001000000
-
-/* SH_MD_DQRP_MMR_DIR_TBLTRIG_DIRST */
-/* Description: shrd,sxro,sub-state */
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_DIRST_SHFT 25
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_DIRST_MASK 0x00000003fe000000
-
-/* SH_MD_DQRP_MMR_DIR_TBLTRIG_MYBIT */
-/* Description: ptreq,timeq,timlast,timspec,onlyme,anytim,ptrii,src */
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_MYBIT_SHFT 34
-#define SH_MD_DQRP_MMR_DIR_TBLTRIG_MYBIT_MASK 0x000003fc00000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_TBLMASK" */
-/* dir table trigger mask */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_DIR_TBLMASK 0x0000000100054020
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_MASK 0x000003ffffffffff
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_DIR_TBLMASK_SRC */
-/* Description: source of request */
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_SRC_SHFT 0
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_SRC_MASK 0x0000000000003fff
-
-/* SH_MD_DQRP_MMR_DIR_TBLMASK_CMD */
-/* Description: incoming request */
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_CMD_SHFT 14
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_CMD_MASK 0x00000000003fc000
-
-/* SH_MD_DQRP_MMR_DIR_TBLMASK_ACC */
-/* Description: uncorrectable error, privilege bit */
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_ACC_SHFT 22
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_ACC_MASK 0x0000000000c00000
-
-/* SH_MD_DQRP_MMR_DIR_TBLMASK_PRIGE */
-/* Description: priority greater-equal */
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_PRIGE_SHFT 24
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_PRIGE_MASK 0x0000000001000000
-
-/* SH_MD_DQRP_MMR_DIR_TBLMASK_DIRST */
-/* Description: shrd,sxro,sub-state */
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_DIRST_SHFT 25
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_DIRST_MASK 0x00000003fe000000
-
-/* SH_MD_DQRP_MMR_DIR_TBLMASK_MYBIT */
-/* Description: ptreq,timeq,timlast,timspec,onlyme,anytim,ptrii,src */
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_MYBIT_SHFT 34
-#define SH_MD_DQRP_MMR_DIR_TBLMASK_MYBIT_MASK 0x000003fc00000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_XBIST_H 0x0000000100058000
-#define SH_MD_DQRP_MMR_XBIST_H_MASK 0x00000700ffffffff
-#define SH_MD_DQRP_MMR_XBIST_H_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_XBIST_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRP_MMR_XBIST_H_PAT_SHFT 0
-#define SH_MD_DQRP_MMR_XBIST_H_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQRP_MMR_XBIST_H_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQRP_MMR_XBIST_H_INV_SHFT 40
-#define SH_MD_DQRP_MMR_XBIST_H_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQRP_MMR_XBIST_H_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQRP_MMR_XBIST_H_ROT_SHFT 41
-#define SH_MD_DQRP_MMR_XBIST_H_ROT_MASK 0x0000020000000000
-
-/* SH_MD_DQRP_MMR_XBIST_H_ARM */
-/* Description: writing 1 arms data miscompare capture */
-#define SH_MD_DQRP_MMR_XBIST_H_ARM_SHFT 42
-#define SH_MD_DQRP_MMR_XBIST_H_ARM_MASK 0x0000040000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_XBIST_L 0x0000000100058010
-#define SH_MD_DQRP_MMR_XBIST_L_MASK 0x00000300ffffffff
-#define SH_MD_DQRP_MMR_XBIST_L_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_XBIST_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRP_MMR_XBIST_L_PAT_SHFT 0
-#define SH_MD_DQRP_MMR_XBIST_L_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQRP_MMR_XBIST_L_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQRP_MMR_XBIST_L_INV_SHFT 40
-#define SH_MD_DQRP_MMR_XBIST_L_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQRP_MMR_XBIST_L_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQRP_MMR_XBIST_L_ROT_SHFT 41
-#define SH_MD_DQRP_MMR_XBIST_L_ROT_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_XBIST_ERR_H 0x0000000100058020
-#define SH_MD_DQRP_MMR_XBIST_ERR_H_MASK 0x00000300ffffffff
-#define SH_MD_DQRP_MMR_XBIST_ERR_H_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_XBIST_ERR_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRP_MMR_XBIST_ERR_H_PAT_SHFT 0
-#define SH_MD_DQRP_MMR_XBIST_ERR_H_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQRP_MMR_XBIST_ERR_H_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQRP_MMR_XBIST_ERR_H_VAL_SHFT 40
-#define SH_MD_DQRP_MMR_XBIST_ERR_H_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQRP_MMR_XBIST_ERR_H_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQRP_MMR_XBIST_ERR_H_MORE_SHFT 41
-#define SH_MD_DQRP_MMR_XBIST_ERR_H_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_XBIST_ERR_L 0x0000000100058030
-#define SH_MD_DQRP_MMR_XBIST_ERR_L_MASK 0x00000300ffffffff
-#define SH_MD_DQRP_MMR_XBIST_ERR_L_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_XBIST_ERR_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRP_MMR_XBIST_ERR_L_PAT_SHFT 0
-#define SH_MD_DQRP_MMR_XBIST_ERR_L_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQRP_MMR_XBIST_ERR_L_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQRP_MMR_XBIST_ERR_L_VAL_SHFT 40
-#define SH_MD_DQRP_MMR_XBIST_ERR_L_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQRP_MMR_XBIST_ERR_L_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQRP_MMR_XBIST_ERR_L_MORE_SHFT 41
-#define SH_MD_DQRP_MMR_XBIST_ERR_L_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_YBIST_H 0x0000000100058800
-#define SH_MD_DQRP_MMR_YBIST_H_MASK 0x00000700ffffffff
-#define SH_MD_DQRP_MMR_YBIST_H_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_YBIST_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRP_MMR_YBIST_H_PAT_SHFT 0
-#define SH_MD_DQRP_MMR_YBIST_H_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQRP_MMR_YBIST_H_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQRP_MMR_YBIST_H_INV_SHFT 40
-#define SH_MD_DQRP_MMR_YBIST_H_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQRP_MMR_YBIST_H_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQRP_MMR_YBIST_H_ROT_SHFT 41
-#define SH_MD_DQRP_MMR_YBIST_H_ROT_MASK 0x0000020000000000
-
-/* SH_MD_DQRP_MMR_YBIST_H_ARM */
-/* Description: writing 1 arms data miscompare capture */
-#define SH_MD_DQRP_MMR_YBIST_H_ARM_SHFT 42
-#define SH_MD_DQRP_MMR_YBIST_H_ARM_MASK 0x0000040000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_YBIST_L 0x0000000100058810
-#define SH_MD_DQRP_MMR_YBIST_L_MASK 0x00000300ffffffff
-#define SH_MD_DQRP_MMR_YBIST_L_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_YBIST_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRP_MMR_YBIST_L_PAT_SHFT 0
-#define SH_MD_DQRP_MMR_YBIST_L_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQRP_MMR_YBIST_L_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQRP_MMR_YBIST_L_INV_SHFT 40
-#define SH_MD_DQRP_MMR_YBIST_L_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQRP_MMR_YBIST_L_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQRP_MMR_YBIST_L_ROT_SHFT 41
-#define SH_MD_DQRP_MMR_YBIST_L_ROT_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_YBIST_ERR_H 0x0000000100058820
-#define SH_MD_DQRP_MMR_YBIST_ERR_H_MASK 0x00000300ffffffff
-#define SH_MD_DQRP_MMR_YBIST_ERR_H_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_YBIST_ERR_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRP_MMR_YBIST_ERR_H_PAT_SHFT 0
-#define SH_MD_DQRP_MMR_YBIST_ERR_H_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQRP_MMR_YBIST_ERR_H_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQRP_MMR_YBIST_ERR_H_VAL_SHFT 40
-#define SH_MD_DQRP_MMR_YBIST_ERR_H_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQRP_MMR_YBIST_ERR_H_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQRP_MMR_YBIST_ERR_H_MORE_SHFT 41
-#define SH_MD_DQRP_MMR_YBIST_ERR_H_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRP_MMR_YBIST_ERR_L 0x0000000100058830
-#define SH_MD_DQRP_MMR_YBIST_ERR_L_MASK 0x00000300ffffffff
-#define SH_MD_DQRP_MMR_YBIST_ERR_L_INIT 0x0000000000000000
-
-/* SH_MD_DQRP_MMR_YBIST_ERR_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRP_MMR_YBIST_ERR_L_PAT_SHFT 0
-#define SH_MD_DQRP_MMR_YBIST_ERR_L_PAT_MASK 0x00000000ffffffff
-
-/* SH_MD_DQRP_MMR_YBIST_ERR_L_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQRP_MMR_YBIST_ERR_L_VAL_SHFT 40
-#define SH_MD_DQRP_MMR_YBIST_ERR_L_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQRP_MMR_YBIST_ERR_L_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQRP_MMR_YBIST_ERR_L_MORE_SHFT 41
-#define SH_MD_DQRP_MMR_YBIST_ERR_L_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_XBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRS_MMR_XBIST_H 0x0000000100068000
-#define SH_MD_DQRS_MMR_XBIST_H_MASK 0x000007ffffffffff
-#define SH_MD_DQRS_MMR_XBIST_H_INIT 0x0000000000000000
-
-/* SH_MD_DQRS_MMR_XBIST_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRS_MMR_XBIST_H_PAT_SHFT 0
-#define SH_MD_DQRS_MMR_XBIST_H_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQRS_MMR_XBIST_H_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQRS_MMR_XBIST_H_INV_SHFT 40
-#define SH_MD_DQRS_MMR_XBIST_H_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQRS_MMR_XBIST_H_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQRS_MMR_XBIST_H_ROT_SHFT 41
-#define SH_MD_DQRS_MMR_XBIST_H_ROT_MASK 0x0000020000000000
-
-/* SH_MD_DQRS_MMR_XBIST_H_ARM */
-/* Description: writing 1 arms data miscompare capture */
-#define SH_MD_DQRS_MMR_XBIST_H_ARM_SHFT 42
-#define SH_MD_DQRS_MMR_XBIST_H_ARM_MASK 0x0000040000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_XBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRS_MMR_XBIST_L 0x0000000100068010
-#define SH_MD_DQRS_MMR_XBIST_L_MASK 0x000003ffffffffff
-#define SH_MD_DQRS_MMR_XBIST_L_INIT 0x0000000000000000
-
-/* SH_MD_DQRS_MMR_XBIST_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRS_MMR_XBIST_L_PAT_SHFT 0
-#define SH_MD_DQRS_MMR_XBIST_L_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQRS_MMR_XBIST_L_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQRS_MMR_XBIST_L_INV_SHFT 40
-#define SH_MD_DQRS_MMR_XBIST_L_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQRS_MMR_XBIST_L_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQRS_MMR_XBIST_L_ROT_SHFT 41
-#define SH_MD_DQRS_MMR_XBIST_L_ROT_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_XBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRS_MMR_XBIST_ERR_H 0x0000000100068020
-#define SH_MD_DQRS_MMR_XBIST_ERR_H_MASK 0x000003ffffffffff
-#define SH_MD_DQRS_MMR_XBIST_ERR_H_INIT 0x0000000000000000
-
-/* SH_MD_DQRS_MMR_XBIST_ERR_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRS_MMR_XBIST_ERR_H_PAT_SHFT 0
-#define SH_MD_DQRS_MMR_XBIST_ERR_H_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQRS_MMR_XBIST_ERR_H_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQRS_MMR_XBIST_ERR_H_VAL_SHFT 40
-#define SH_MD_DQRS_MMR_XBIST_ERR_H_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQRS_MMR_XBIST_ERR_H_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQRS_MMR_XBIST_ERR_H_MORE_SHFT 41
-#define SH_MD_DQRS_MMR_XBIST_ERR_H_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_XBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRS_MMR_XBIST_ERR_L 0x0000000100068030
-#define SH_MD_DQRS_MMR_XBIST_ERR_L_MASK 0x000003ffffffffff
-#define SH_MD_DQRS_MMR_XBIST_ERR_L_INIT 0x0000000000000000
-
-/* SH_MD_DQRS_MMR_XBIST_ERR_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRS_MMR_XBIST_ERR_L_PAT_SHFT 0
-#define SH_MD_DQRS_MMR_XBIST_ERR_L_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQRS_MMR_XBIST_ERR_L_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQRS_MMR_XBIST_ERR_L_VAL_SHFT 40
-#define SH_MD_DQRS_MMR_XBIST_ERR_L_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQRS_MMR_XBIST_ERR_L_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQRS_MMR_XBIST_ERR_L_MORE_SHFT 41
-#define SH_MD_DQRS_MMR_XBIST_ERR_L_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_YBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRS_MMR_YBIST_H 0x0000000100068800
-#define SH_MD_DQRS_MMR_YBIST_H_MASK 0x000007ffffffffff
-#define SH_MD_DQRS_MMR_YBIST_H_INIT 0x0000000000000000
-
-/* SH_MD_DQRS_MMR_YBIST_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRS_MMR_YBIST_H_PAT_SHFT 0
-#define SH_MD_DQRS_MMR_YBIST_H_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQRS_MMR_YBIST_H_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQRS_MMR_YBIST_H_INV_SHFT 40
-#define SH_MD_DQRS_MMR_YBIST_H_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQRS_MMR_YBIST_H_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQRS_MMR_YBIST_H_ROT_SHFT 41
-#define SH_MD_DQRS_MMR_YBIST_H_ROT_MASK 0x0000020000000000
-
-/* SH_MD_DQRS_MMR_YBIST_H_ARM */
-/* Description: writing 1 arms data miscompare capture */
-#define SH_MD_DQRS_MMR_YBIST_H_ARM_SHFT 42
-#define SH_MD_DQRS_MMR_YBIST_H_ARM_MASK 0x0000040000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_YBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRS_MMR_YBIST_L 0x0000000100068810
-#define SH_MD_DQRS_MMR_YBIST_L_MASK 0x000003ffffffffff
-#define SH_MD_DQRS_MMR_YBIST_L_INIT 0x0000000000000000
-
-/* SH_MD_DQRS_MMR_YBIST_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRS_MMR_YBIST_L_PAT_SHFT 0
-#define SH_MD_DQRS_MMR_YBIST_L_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQRS_MMR_YBIST_L_INV */
-/* Description: invert data pattern in next cycle */
-#define SH_MD_DQRS_MMR_YBIST_L_INV_SHFT 40
-#define SH_MD_DQRS_MMR_YBIST_L_INV_MASK 0x0000010000000000
-
-/* SH_MD_DQRS_MMR_YBIST_L_ROT */
-/* Description: rotate left data pattern in next cycle */
-#define SH_MD_DQRS_MMR_YBIST_L_ROT_SHFT 41
-#define SH_MD_DQRS_MMR_YBIST_L_ROT_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_YBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRS_MMR_YBIST_ERR_H 0x0000000100068820
-#define SH_MD_DQRS_MMR_YBIST_ERR_H_MASK 0x000003ffffffffff
-#define SH_MD_DQRS_MMR_YBIST_ERR_H_INIT 0x0000000000000000
-
-/* SH_MD_DQRS_MMR_YBIST_ERR_H_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRS_MMR_YBIST_ERR_H_PAT_SHFT 0
-#define SH_MD_DQRS_MMR_YBIST_ERR_H_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQRS_MMR_YBIST_ERR_H_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQRS_MMR_YBIST_ERR_H_VAL_SHFT 40
-#define SH_MD_DQRS_MMR_YBIST_ERR_H_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQRS_MMR_YBIST_ERR_H_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQRS_MMR_YBIST_ERR_H_MORE_SHFT 41
-#define SH_MD_DQRS_MMR_YBIST_ERR_H_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_YBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-#define SH_MD_DQRS_MMR_YBIST_ERR_L 0x0000000100068830
-#define SH_MD_DQRS_MMR_YBIST_ERR_L_MASK 0x000003ffffffffff
-#define SH_MD_DQRS_MMR_YBIST_ERR_L_INIT 0x0000000000000000
-
-/* SH_MD_DQRS_MMR_YBIST_ERR_L_PAT */
-/* Description: data pattern */
-#define SH_MD_DQRS_MMR_YBIST_ERR_L_PAT_SHFT 0
-#define SH_MD_DQRS_MMR_YBIST_ERR_L_PAT_MASK 0x000000ffffffffff
-
-/* SH_MD_DQRS_MMR_YBIST_ERR_L_VAL */
-/* Description: bist data miscompare */
-#define SH_MD_DQRS_MMR_YBIST_ERR_L_VAL_SHFT 40
-#define SH_MD_DQRS_MMR_YBIST_ERR_L_VAL_MASK 0x0000010000000000
-
-/* SH_MD_DQRS_MMR_YBIST_ERR_L_MORE */
-/* Description: more than one bist data miscompare */
-#define SH_MD_DQRS_MMR_YBIST_ERR_L_MORE_SHFT 41
-#define SH_MD_DQRS_MMR_YBIST_ERR_L_MORE_MASK 0x0000020000000000
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_JNR_DEBUG" */
-/* joiner/fct debug configuration */
-/* ==================================================================== */
-
-#define SH_MD_DQRS_MMR_JNR_DEBUG 0x0000000100069000
-#define SH_MD_DQRS_MMR_JNR_DEBUG_MASK 0x0000000000000003
-#define SH_MD_DQRS_MMR_JNR_DEBUG_INIT 0x0000000000000000
-
-/* SH_MD_DQRS_MMR_JNR_DEBUG_PX */
-/* Description: select 0=pi 1=xn side */
-#define SH_MD_DQRS_MMR_JNR_DEBUG_PX_SHFT 0
-#define SH_MD_DQRS_MMR_JNR_DEBUG_PX_MASK 0x0000000000000001
-
-/* SH_MD_DQRS_MMR_JNR_DEBUG_RW */
-/* Description: select 0=read 1=write side */
-#define SH_MD_DQRS_MMR_JNR_DEBUG_RW_SHFT 1
-#define SH_MD_DQRS_MMR_JNR_DEBUG_RW_MASK 0x0000000000000002
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_YAMOPW_ERR" */
-/* amo/partial rmw ecc error register */
-/* ==================================================================== */
-
-#define SH_MD_DQRS_MMR_YAMOPW_ERR 0x000000010006a000
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_MASK 0x0000000103ff03ff
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_INIT 0x0000000000000000
-
-/* SH_MD_DQRS_MMR_YAMOPW_ERR_SSYN */
-/* Description: store data syndrome */
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_SSYN_SHFT 0
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_SSYN_MASK 0x00000000000000ff
-
-/* SH_MD_DQRS_MMR_YAMOPW_ERR_SCOR */
-/* Description: correctable ecc errror on store data */
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_SCOR_SHFT 8
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_SCOR_MASK 0x0000000000000100
-
-/* SH_MD_DQRS_MMR_YAMOPW_ERR_SUNC */
-/* Description: uncorrectable ecc errror on store data */
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_SUNC_SHFT 9
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_SUNC_MASK 0x0000000000000200
-
-/* SH_MD_DQRS_MMR_YAMOPW_ERR_RSYN */
-/* Description: memory read data syndrome */
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_RSYN_SHFT 16
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_RSYN_MASK 0x0000000000ff0000
-
-/* SH_MD_DQRS_MMR_YAMOPW_ERR_RCOR */
-/* Description: correctable ecc errror on read data */
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_RCOR_SHFT 24
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_RCOR_MASK 0x0000000001000000
-
-/* SH_MD_DQRS_MMR_YAMOPW_ERR_RUNC */
-/* Description: uncorrectable ecc errror on read data */
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_RUNC_SHFT 25
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_RUNC_MASK 0x0000000002000000
-
-/* SH_MD_DQRS_MMR_YAMOPW_ERR_ARM */
-/* Description: writing 1 arms ecc error capture */
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_ARM_SHFT 32
-#define SH_MD_DQRS_MMR_YAMOPW_ERR_ARM_MASK 0x0000000100000000
-
-
-#endif /* _ASM_IA64_SN_SN2_SHUB_MMR_H */
+++ /dev/null
-/*
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_IA64_SN_SN2_SHUB_MMR_T_H
-#define _ASM_IA64_SN_SN2_SHUB_MMR_T_H
-
-#include <asm/sn/arch.h>
-
-/* ==================================================================== */
-/* Register "SH_FSB_BINIT_CONTROL" */
-/* FSB BINIT# Control */
-/* ==================================================================== */
-
-typedef union sh_fsb_binit_control_u {
- mmr_t sh_fsb_binit_control_regval;
- struct {
- mmr_t binit : 1;
- mmr_t reserved_0 : 63;
- } sh_fsb_binit_control_s;
-} sh_fsb_binit_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_FSB_RESET_CONTROL" */
-/* FSB Reset Control */
-/* ==================================================================== */
-
-typedef union sh_fsb_reset_control_u {
- mmr_t sh_fsb_reset_control_regval;
- struct {
- mmr_t reset : 1;
- mmr_t reserved_0 : 63;
- } sh_fsb_reset_control_s;
-} sh_fsb_reset_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_FSB_SYSTEM_AGENT_CONFIG" */
-/* FSB System Agent Configuration */
-/* ==================================================================== */
-
-typedef union sh_fsb_system_agent_config_u {
- mmr_t sh_fsb_system_agent_config_regval;
- struct {
- mmr_t rcnt_scnt_en : 1;
- mmr_t reserved_0 : 2;
- mmr_t berr_assert_en : 1;
- mmr_t berr_sampling_en : 1;
- mmr_t binit_assert_en : 1;
- mmr_t bnr_throttling_en : 1;
- mmr_t short_hang_en : 1;
- mmr_t inta_rsp_data : 8;
- mmr_t io_trans_rsp : 1;
- mmr_t xtpr_trans_rsp : 1;
- mmr_t inta_trans_rsp : 1;
- mmr_t reserved_1 : 4;
- mmr_t tdot : 1;
- mmr_t serialize_fsb_en : 1;
- mmr_t reserved_2 : 7;
- mmr_t binit_event_enables : 14;
- mmr_t reserved_3 : 18;
- } sh_fsb_system_agent_config_s;
-} sh_fsb_system_agent_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_FSB_VGA_REMAP" */
-/* FSB VGA Address Space Remap */
-/* ==================================================================== */
-
-typedef union sh_fsb_vga_remap_u {
- mmr_t sh_fsb_vga_remap_regval;
- struct {
- mmr_t reserved_0 : 17;
- mmr_t offset : 19;
- mmr_t asid : 2;
- mmr_t nid : 11;
- mmr_t reserved_1 : 13;
- mmr_t vga_remapping_enabled : 1;
- mmr_t reserved_2 : 1;
- } sh_fsb_vga_remap_s;
-} sh_fsb_vga_remap_u_t;
-
-/* ==================================================================== */
-/* Register "SH_FSB_RESET_STATUS" */
-/* FSB Reset Status */
-/* ==================================================================== */
-
-typedef union sh_fsb_reset_status_u {
- mmr_t sh_fsb_reset_status_regval;
- struct {
- mmr_t reset_in_progress : 1;
- mmr_t reserved_0 : 63;
- } sh_fsb_reset_status_s;
-} sh_fsb_reset_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_FSB_SYMMETRIC_AGENT_STATUS" */
-/* FSB Symmetric Agent Status */
-/* ==================================================================== */
-
-typedef union sh_fsb_symmetric_agent_status_u {
- mmr_t sh_fsb_symmetric_agent_status_regval;
- struct {
- mmr_t cpu_0_active : 1;
- mmr_t cpu_1_active : 1;
- mmr_t cpus_ready : 1;
- mmr_t reserved_0 : 61;
- } sh_fsb_symmetric_agent_status_s;
-} sh_fsb_symmetric_agent_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_CREDIT_COUNT_0" */
-/* Graphics-write Credit Count for CPU 0 */
-/* ==================================================================== */
-
-typedef union sh_gfx_credit_count_0_u {
- mmr_t sh_gfx_credit_count_0_regval;
- struct {
- mmr_t count : 20;
- mmr_t reserved_0 : 43;
- mmr_t reset_gfx_state : 1;
- } sh_gfx_credit_count_0_s;
-} sh_gfx_credit_count_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_CREDIT_COUNT_1" */
-/* Graphics-write Credit Count for CPU 1 */
-/* ==================================================================== */
-
-typedef union sh_gfx_credit_count_1_u {
- mmr_t sh_gfx_credit_count_1_regval;
- struct {
- mmr_t count : 20;
- mmr_t reserved_0 : 43;
- mmr_t reset_gfx_state : 1;
- } sh_gfx_credit_count_1_s;
-} sh_gfx_credit_count_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_MODE_CNTRL_0" */
-/* Graphics credit mode amd message ordering for CPU 0 */
-/* ==================================================================== */
-
-typedef union sh_gfx_mode_cntrl_0_u {
- mmr_t sh_gfx_mode_cntrl_0_regval;
- struct {
- mmr_t dword_credits : 1;
- mmr_t mixed_mode_credits : 1;
- mmr_t relaxed_ordering : 1;
- mmr_t reserved_0 : 61;
- } sh_gfx_mode_cntrl_0_s;
-} sh_gfx_mode_cntrl_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_MODE_CNTRL_1" */
-/* Graphics credit mode amd message ordering for CPU 1 */
-/* ==================================================================== */
-
-typedef union sh_gfx_mode_cntrl_1_u {
- mmr_t sh_gfx_mode_cntrl_1_regval;
- struct {
- mmr_t dword_credits : 1;
- mmr_t mixed_mode_credits : 1;
- mmr_t relaxed_ordering : 1;
- mmr_t reserved_0 : 61;
- } sh_gfx_mode_cntrl_1_s;
-} sh_gfx_mode_cntrl_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_SKID_CREDIT_COUNT_0" */
-/* Graphics-write Skid Credit Count for CPU 0 */
-/* ==================================================================== */
-
-typedef union sh_gfx_skid_credit_count_0_u {
- mmr_t sh_gfx_skid_credit_count_0_regval;
- struct {
- mmr_t skid : 20;
- mmr_t reserved_0 : 44;
- } sh_gfx_skid_credit_count_0_s;
-} sh_gfx_skid_credit_count_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_SKID_CREDIT_COUNT_1" */
-/* Graphics-write Skid Credit Count for CPU 1 */
-/* ==================================================================== */
-
-typedef union sh_gfx_skid_credit_count_1_u {
- mmr_t sh_gfx_skid_credit_count_1_regval;
- struct {
- mmr_t skid : 20;
- mmr_t reserved_0 : 44;
- } sh_gfx_skid_credit_count_1_s;
-} sh_gfx_skid_credit_count_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_STALL_LIMIT_0" */
-/* Graphics-write Stall Limit for CPU 0 */
-/* ==================================================================== */
-
-typedef union sh_gfx_stall_limit_0_u {
- mmr_t sh_gfx_stall_limit_0_regval;
- struct {
- mmr_t limit : 26;
- mmr_t reserved_0 : 38;
- } sh_gfx_stall_limit_0_s;
-} sh_gfx_stall_limit_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_STALL_LIMIT_1" */
-/* Graphics-write Stall Limit for CPU 1 */
-/* ==================================================================== */
-
-typedef union sh_gfx_stall_limit_1_u {
- mmr_t sh_gfx_stall_limit_1_regval;
- struct {
- mmr_t limit : 26;
- mmr_t reserved_0 : 38;
- } sh_gfx_stall_limit_1_s;
-} sh_gfx_stall_limit_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_STALL_TIMER_0" */
-/* Graphics-write Stall Timer for CPU 0 */
-/* ==================================================================== */
-
-typedef union sh_gfx_stall_timer_0_u {
- mmr_t sh_gfx_stall_timer_0_regval;
- struct {
- mmr_t timer_value : 26;
- mmr_t reserved_0 : 38;
- } sh_gfx_stall_timer_0_s;
-} sh_gfx_stall_timer_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_STALL_TIMER_1" */
-/* Graphics-write Stall Timer for CPU 1 */
-/* ==================================================================== */
-
-typedef union sh_gfx_stall_timer_1_u {
- mmr_t sh_gfx_stall_timer_1_regval;
- struct {
- mmr_t timer_value : 26;
- mmr_t reserved_0 : 38;
- } sh_gfx_stall_timer_1_s;
-} sh_gfx_stall_timer_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_WINDOW_0" */
-/* Graphics-write Window for CPU 0 */
-/* ==================================================================== */
-
-typedef union sh_gfx_window_0_u {
- mmr_t sh_gfx_window_0_regval;
- struct {
- mmr_t reserved_0 : 24;
- mmr_t base_addr : 12;
- mmr_t reserved_1 : 27;
- mmr_t gfx_window_en : 1;
- } sh_gfx_window_0_s;
-} sh_gfx_window_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_WINDOW_1" */
-/* Graphics-write Window for CPU 1 */
-/* ==================================================================== */
-
-typedef union sh_gfx_window_1_u {
- mmr_t sh_gfx_window_1_regval;
- struct {
- mmr_t reserved_0 : 24;
- mmr_t base_addr : 12;
- mmr_t reserved_1 : 27;
- mmr_t gfx_window_en : 1;
- } sh_gfx_window_1_s;
-} sh_gfx_window_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_INTERRUPT_TIMER_LIMIT_0" */
-/* Graphics-write Interrupt Limit for CPU 0 */
-/* ==================================================================== */
-
-typedef union sh_gfx_interrupt_timer_limit_0_u {
- mmr_t sh_gfx_interrupt_timer_limit_0_regval;
- struct {
- mmr_t interrupt_timer_limit : 8;
- mmr_t reserved_0 : 56;
- } sh_gfx_interrupt_timer_limit_0_s;
-} sh_gfx_interrupt_timer_limit_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_INTERRUPT_TIMER_LIMIT_1" */
-/* Graphics-write Interrupt Limit for CPU 1 */
-/* ==================================================================== */
-
-typedef union sh_gfx_interrupt_timer_limit_1_u {
- mmr_t sh_gfx_interrupt_timer_limit_1_regval;
- struct {
- mmr_t interrupt_timer_limit : 8;
- mmr_t reserved_0 : 56;
- } sh_gfx_interrupt_timer_limit_1_s;
-} sh_gfx_interrupt_timer_limit_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_WRITE_STATUS_0" */
-/* Graphics Write Status for CPU 0 */
-/* ==================================================================== */
-
-typedef union sh_gfx_write_status_0_u {
- mmr_t sh_gfx_write_status_0_regval;
- struct {
- mmr_t busy : 1;
- mmr_t reserved_0 : 62;
- mmr_t re_enable_gfx_stall : 1;
- } sh_gfx_write_status_0_s;
-} sh_gfx_write_status_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GFX_WRITE_STATUS_1" */
-/* Graphics Write Status for CPU 1 */
-/* ==================================================================== */
-
-typedef union sh_gfx_write_status_1_u {
- mmr_t sh_gfx_write_status_1_regval;
- struct {
- mmr_t busy : 1;
- mmr_t reserved_0 : 62;
- mmr_t re_enable_gfx_stall : 1;
- } sh_gfx_write_status_1_s;
-} sh_gfx_write_status_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_II_INT0" */
-/* SHub II Interrupt 0 Registers */
-/* ==================================================================== */
-
-typedef union sh_ii_int0_u {
- mmr_t sh_ii_int0_regval;
- struct {
- mmr_t idx : 8;
- mmr_t send : 1;
- mmr_t reserved_0 : 55;
- } sh_ii_int0_s;
-} sh_ii_int0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_II_INT0_CONFIG" */
-/* SHub II Interrupt 0 Config Registers */
-/* ==================================================================== */
-
-typedef union sh_ii_int0_config_u {
- mmr_t sh_ii_int0_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 14;
- } sh_ii_int0_config_s;
-} sh_ii_int0_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_II_INT0_ENABLE" */
-/* SHub II Interrupt 0 Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_ii_int0_enable_u {
- mmr_t sh_ii_int0_enable_regval;
- struct {
- mmr_t ii_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_ii_int0_enable_s;
-} sh_ii_int0_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_II_INT1" */
-/* SHub II Interrupt 1 Registers */
-/* ==================================================================== */
-
-typedef union sh_ii_int1_u {
- mmr_t sh_ii_int1_regval;
- struct {
- mmr_t idx : 8;
- mmr_t send : 1;
- mmr_t reserved_0 : 55;
- } sh_ii_int1_s;
-} sh_ii_int1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_II_INT1_CONFIG" */
-/* SHub II Interrupt 1 Config Registers */
-/* ==================================================================== */
-
-typedef union sh_ii_int1_config_u {
- mmr_t sh_ii_int1_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 14;
- } sh_ii_int1_config_s;
-} sh_ii_int1_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_II_INT1_ENABLE" */
-/* SHub II Interrupt 1 Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_ii_int1_enable_u {
- mmr_t sh_ii_int1_enable_regval;
- struct {
- mmr_t ii_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_ii_int1_enable_s;
-} sh_ii_int1_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_INT_NODE_ID_CONFIG" */
-/* SHub Interrupt Node ID Configuration */
-/* ==================================================================== */
-
-typedef union sh_int_node_id_config_u {
- mmr_t sh_int_node_id_config_regval;
- struct {
- mmr_t node_id : 11;
- mmr_t id_sel : 1;
- mmr_t reserved_0 : 52;
- } sh_int_node_id_config_s;
-} sh_int_node_id_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_IPI_INT" */
-/* SHub Inter-Processor Interrupt Registers */
-/* ==================================================================== */
-
-typedef union sh_ipi_int_u {
- mmr_t sh_ipi_int_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 3;
- mmr_t send : 1;
- } sh_ipi_int_s;
-} sh_ipi_int_u_t;
-
-/* ==================================================================== */
-/* Register "SH_IPI_INT_ENABLE" */
-/* SHub Inter-Processor Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_ipi_int_enable_u {
- mmr_t sh_ipi_int_enable_regval;
- struct {
- mmr_t pio_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_ipi_int_enable_s;
-} sh_ipi_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT0_CONFIG" */
-/* SHub Local Interrupt 0 Registers */
-/* ==================================================================== */
-
-typedef union sh_local_int0_config_u {
- mmr_t sh_local_int0_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_local_int0_config_s;
-} sh_local_int0_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT0_ENABLE" */
-/* SHub Local Interrupt 0 Enable */
-/* ==================================================================== */
-
-typedef union sh_local_int0_enable_u {
- mmr_t sh_local_int0_enable_regval;
- struct {
- mmr_t pi_hw_int : 1;
- mmr_t md_hw_int : 1;
- mmr_t xn_hw_int : 1;
- mmr_t lb_hw_int : 1;
- mmr_t ii_hw_int : 1;
- mmr_t pi_ce_int : 1;
- mmr_t md_ce_int : 1;
- mmr_t xn_ce_int : 1;
- mmr_t pi_uce_int : 1;
- mmr_t md_uce_int : 1;
- mmr_t xn_uce_int : 1;
- mmr_t reserved_0 : 1;
- mmr_t system_shutdown_int : 1;
- mmr_t uart_int : 1;
- mmr_t l1_nmi_int : 1;
- mmr_t stop_clock : 1;
- mmr_t reserved_1 : 48;
- } sh_local_int0_enable_s;
-} sh_local_int0_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT1_CONFIG" */
-/* SHub Local Interrupt 1 Registers */
-/* ==================================================================== */
-
-typedef union sh_local_int1_config_u {
- mmr_t sh_local_int1_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_local_int1_config_s;
-} sh_local_int1_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT1_ENABLE" */
-/* SHub Local Interrupt 1 Enable */
-/* ==================================================================== */
-
-typedef union sh_local_int1_enable_u {
- mmr_t sh_local_int1_enable_regval;
- struct {
- mmr_t pi_hw_int : 1;
- mmr_t md_hw_int : 1;
- mmr_t xn_hw_int : 1;
- mmr_t lb_hw_int : 1;
- mmr_t ii_hw_int : 1;
- mmr_t pi_ce_int : 1;
- mmr_t md_ce_int : 1;
- mmr_t xn_ce_int : 1;
- mmr_t pi_uce_int : 1;
- mmr_t md_uce_int : 1;
- mmr_t xn_uce_int : 1;
- mmr_t reserved_0 : 1;
- mmr_t system_shutdown_int : 1;
- mmr_t uart_int : 1;
- mmr_t l1_nmi_int : 1;
- mmr_t stop_clock : 1;
- mmr_t reserved_1 : 48;
- } sh_local_int1_enable_s;
-} sh_local_int1_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT2_CONFIG" */
-/* SHub Local Interrupt 2 Registers */
-/* ==================================================================== */
-
-typedef union sh_local_int2_config_u {
- mmr_t sh_local_int2_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_local_int2_config_s;
-} sh_local_int2_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT2_ENABLE" */
-/* SHub Local Interrupt 2 Enable */
-/* ==================================================================== */
-
-typedef union sh_local_int2_enable_u {
- mmr_t sh_local_int2_enable_regval;
- struct {
- mmr_t pi_hw_int : 1;
- mmr_t md_hw_int : 1;
- mmr_t xn_hw_int : 1;
- mmr_t lb_hw_int : 1;
- mmr_t ii_hw_int : 1;
- mmr_t pi_ce_int : 1;
- mmr_t md_ce_int : 1;
- mmr_t xn_ce_int : 1;
- mmr_t pi_uce_int : 1;
- mmr_t md_uce_int : 1;
- mmr_t xn_uce_int : 1;
- mmr_t reserved_0 : 1;
- mmr_t system_shutdown_int : 1;
- mmr_t uart_int : 1;
- mmr_t l1_nmi_int : 1;
- mmr_t stop_clock : 1;
- mmr_t reserved_1 : 48;
- } sh_local_int2_enable_s;
-} sh_local_int2_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT3_CONFIG" */
-/* SHub Local Interrupt 3 Registers */
-/* ==================================================================== */
-
-typedef union sh_local_int3_config_u {
- mmr_t sh_local_int3_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_local_int3_config_s;
-} sh_local_int3_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT3_ENABLE" */
-/* SHub Local Interrupt 3 Enable */
-/* ==================================================================== */
-
-typedef union sh_local_int3_enable_u {
- mmr_t sh_local_int3_enable_regval;
- struct {
- mmr_t pi_hw_int : 1;
- mmr_t md_hw_int : 1;
- mmr_t xn_hw_int : 1;
- mmr_t lb_hw_int : 1;
- mmr_t ii_hw_int : 1;
- mmr_t pi_ce_int : 1;
- mmr_t md_ce_int : 1;
- mmr_t xn_ce_int : 1;
- mmr_t pi_uce_int : 1;
- mmr_t md_uce_int : 1;
- mmr_t xn_uce_int : 1;
- mmr_t reserved_0 : 1;
- mmr_t system_shutdown_int : 1;
- mmr_t uart_int : 1;
- mmr_t l1_nmi_int : 1;
- mmr_t stop_clock : 1;
- mmr_t reserved_1 : 48;
- } sh_local_int3_enable_s;
-} sh_local_int3_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT4_CONFIG" */
-/* SHub Local Interrupt 4 Registers */
-/* ==================================================================== */
-
-typedef union sh_local_int4_config_u {
- mmr_t sh_local_int4_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_local_int4_config_s;
-} sh_local_int4_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT4_ENABLE" */
-/* SHub Local Interrupt 4 Enable */
-/* ==================================================================== */
-
-typedef union sh_local_int4_enable_u {
- mmr_t sh_local_int4_enable_regval;
- struct {
- mmr_t pi_hw_int : 1;
- mmr_t md_hw_int : 1;
- mmr_t xn_hw_int : 1;
- mmr_t lb_hw_int : 1;
- mmr_t ii_hw_int : 1;
- mmr_t pi_ce_int : 1;
- mmr_t md_ce_int : 1;
- mmr_t xn_ce_int : 1;
- mmr_t pi_uce_int : 1;
- mmr_t md_uce_int : 1;
- mmr_t xn_uce_int : 1;
- mmr_t reserved_0 : 1;
- mmr_t system_shutdown_int : 1;
- mmr_t uart_int : 1;
- mmr_t l1_nmi_int : 1;
- mmr_t stop_clock : 1;
- mmr_t reserved_1 : 48;
- } sh_local_int4_enable_s;
-} sh_local_int4_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT5_CONFIG" */
-/* SHub Local Interrupt 5 Registers */
-/* ==================================================================== */
-
-typedef union sh_local_int5_config_u {
- mmr_t sh_local_int5_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_local_int5_config_s;
-} sh_local_int5_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LOCAL_INT5_ENABLE" */
-/* SHub Local Interrupt 5 Enable */
-/* ==================================================================== */
-
-typedef union sh_local_int5_enable_u {
- mmr_t sh_local_int5_enable_regval;
- struct {
- mmr_t pi_hw_int : 1;
- mmr_t md_hw_int : 1;
- mmr_t xn_hw_int : 1;
- mmr_t lb_hw_int : 1;
- mmr_t ii_hw_int : 1;
- mmr_t pi_ce_int : 1;
- mmr_t md_ce_int : 1;
- mmr_t xn_ce_int : 1;
- mmr_t pi_uce_int : 1;
- mmr_t md_uce_int : 1;
- mmr_t xn_uce_int : 1;
- mmr_t reserved_0 : 1;
- mmr_t system_shutdown_int : 1;
- mmr_t uart_int : 1;
- mmr_t l1_nmi_int : 1;
- mmr_t stop_clock : 1;
- mmr_t reserved_1 : 48;
- } sh_local_int5_enable_s;
-} sh_local_int5_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ERR_INT_CONFIG" */
-/* SHub Processor 0 Error Interrupt Registers */
-/* ==================================================================== */
-
-typedef union sh_proc0_err_int_config_u {
- mmr_t sh_proc0_err_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_proc0_err_int_config_s;
-} sh_proc0_err_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ERR_INT_CONFIG" */
-/* SHub Processor 1 Error Interrupt Registers */
-/* ==================================================================== */
-
-typedef union sh_proc1_err_int_config_u {
- mmr_t sh_proc1_err_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_proc1_err_int_config_s;
-} sh_proc1_err_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ERR_INT_CONFIG" */
-/* SHub Processor 2 Error Interrupt Registers */
-/* ==================================================================== */
-
-typedef union sh_proc2_err_int_config_u {
- mmr_t sh_proc2_err_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_proc2_err_int_config_s;
-} sh_proc2_err_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ERR_INT_CONFIG" */
-/* SHub Processor 3 Error Interrupt Registers */
-/* ==================================================================== */
-
-typedef union sh_proc3_err_int_config_u {
- mmr_t sh_proc3_err_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_proc3_err_int_config_s;
-} sh_proc3_err_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ADV_INT_CONFIG" */
-/* SHub Processor 0 Advisory Interrupt Registers */
-/* ==================================================================== */
-
-typedef union sh_proc0_adv_int_config_u {
- mmr_t sh_proc0_adv_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_proc0_adv_int_config_s;
-} sh_proc0_adv_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ADV_INT_CONFIG" */
-/* SHub Processor 1 Advisory Interrupt Registers */
-/* ==================================================================== */
-
-typedef union sh_proc1_adv_int_config_u {
- mmr_t sh_proc1_adv_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_proc1_adv_int_config_s;
-} sh_proc1_adv_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ADV_INT_CONFIG" */
-/* SHub Processor 2 Advisory Interrupt Registers */
-/* ==================================================================== */
-
-typedef union sh_proc2_adv_int_config_u {
- mmr_t sh_proc2_adv_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_proc2_adv_int_config_s;
-} sh_proc2_adv_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ADV_INT_CONFIG" */
-/* SHub Processor 3 Advisory Interrupt Registers */
-/* ==================================================================== */
-
-typedef union sh_proc3_adv_int_config_u {
- mmr_t sh_proc3_adv_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_proc3_adv_int_config_s;
-} sh_proc3_adv_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ERR_INT_ENABLE" */
-/* SHub Processor 0 Error Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_proc0_err_int_enable_u {
- mmr_t sh_proc0_err_int_enable_regval;
- struct {
- mmr_t proc0_err_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_proc0_err_int_enable_s;
-} sh_proc0_err_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ERR_INT_ENABLE" */
-/* SHub Processor 1 Error Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_proc1_err_int_enable_u {
- mmr_t sh_proc1_err_int_enable_regval;
- struct {
- mmr_t proc1_err_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_proc1_err_int_enable_s;
-} sh_proc1_err_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ERR_INT_ENABLE" */
-/* SHub Processor 2 Error Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_proc2_err_int_enable_u {
- mmr_t sh_proc2_err_int_enable_regval;
- struct {
- mmr_t proc2_err_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_proc2_err_int_enable_s;
-} sh_proc2_err_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ERR_INT_ENABLE" */
-/* SHub Processor 3 Error Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_proc3_err_int_enable_u {
- mmr_t sh_proc3_err_int_enable_regval;
- struct {
- mmr_t proc3_err_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_proc3_err_int_enable_s;
-} sh_proc3_err_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ADV_INT_ENABLE" */
-/* SHub Processor 0 Advisory Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_proc0_adv_int_enable_u {
- mmr_t sh_proc0_adv_int_enable_regval;
- struct {
- mmr_t proc0_adv_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_proc0_adv_int_enable_s;
-} sh_proc0_adv_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ADV_INT_ENABLE" */
-/* SHub Processor 1 Advisory Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_proc1_adv_int_enable_u {
- mmr_t sh_proc1_adv_int_enable_regval;
- struct {
- mmr_t proc1_adv_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_proc1_adv_int_enable_s;
-} sh_proc1_adv_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ADV_INT_ENABLE" */
-/* SHub Processor 2 Advisory Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_proc2_adv_int_enable_u {
- mmr_t sh_proc2_adv_int_enable_regval;
- struct {
- mmr_t proc2_adv_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_proc2_adv_int_enable_s;
-} sh_proc2_adv_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ADV_INT_ENABLE" */
-/* SHub Processor 3 Advisory Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_proc3_adv_int_enable_u {
- mmr_t sh_proc3_adv_int_enable_regval;
- struct {
- mmr_t proc3_adv_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_proc3_adv_int_enable_s;
-} sh_proc3_adv_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_INT_CONFIG" */
-/* SHub Profile Interrupt Configuration Registers */
-/* ==================================================================== */
-
-typedef union sh_profile_int_config_u {
- mmr_t sh_profile_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_profile_int_config_s;
-} sh_profile_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_INT_ENABLE" */
-/* SHub Profile Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_profile_int_enable_u {
- mmr_t sh_profile_int_enable_regval;
- struct {
- mmr_t profile_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_profile_int_enable_s;
-} sh_profile_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_RTC0_INT_CONFIG" */
-/* SHub RTC 0 Interrupt Config Registers */
-/* ==================================================================== */
-
-typedef union sh_rtc0_int_config_u {
- mmr_t sh_rtc0_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_rtc0_int_config_s;
-} sh_rtc0_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_RTC0_INT_ENABLE" */
-/* SHub RTC 0 Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_rtc0_int_enable_u {
- mmr_t sh_rtc0_int_enable_regval;
- struct {
- mmr_t rtc0_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_rtc0_int_enable_s;
-} sh_rtc0_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_RTC1_INT_CONFIG" */
-/* SHub RTC 1 Interrupt Config Registers */
-/* ==================================================================== */
-
-typedef union sh_rtc1_int_config_u {
- mmr_t sh_rtc1_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_rtc1_int_config_s;
-} sh_rtc1_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_RTC1_INT_ENABLE" */
-/* SHub RTC 1 Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_rtc1_int_enable_u {
- mmr_t sh_rtc1_int_enable_regval;
- struct {
- mmr_t rtc1_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_rtc1_int_enable_s;
-} sh_rtc1_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_RTC2_INT_CONFIG" */
-/* SHub RTC 2 Interrupt Config Registers */
-/* ==================================================================== */
-
-typedef union sh_rtc2_int_config_u {
- mmr_t sh_rtc2_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_rtc2_int_config_s;
-} sh_rtc2_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_RTC2_INT_ENABLE" */
-/* SHub RTC 2 Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_rtc2_int_enable_u {
- mmr_t sh_rtc2_int_enable_regval;
- struct {
- mmr_t rtc2_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_rtc2_int_enable_s;
-} sh_rtc2_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_RTC3_INT_CONFIG" */
-/* SHub RTC 3 Interrupt Config Registers */
-/* ==================================================================== */
-
-typedef union sh_rtc3_int_config_u {
- mmr_t sh_rtc3_int_config_regval;
- struct {
- mmr_t type : 3;
- mmr_t agt : 1;
- mmr_t pid : 16;
- mmr_t reserved_0 : 1;
- mmr_t base : 29;
- mmr_t reserved_1 : 2;
- mmr_t idx : 8;
- mmr_t reserved_2 : 4;
- } sh_rtc3_int_config_s;
-} sh_rtc3_int_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_RTC3_INT_ENABLE" */
-/* SHub RTC 3 Interrupt Enable Registers */
-/* ==================================================================== */
-
-typedef union sh_rtc3_int_enable_u {
- mmr_t sh_rtc3_int_enable_regval;
- struct {
- mmr_t rtc3_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_rtc3_int_enable_s;
-} sh_rtc3_int_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_EVENT_OCCURRED" */
-/* SHub Interrupt Event Occurred */
-/* ==================================================================== */
-
-typedef union sh_event_occurred_u {
- mmr_t sh_event_occurred_regval;
- struct {
- mmr_t pi_hw_int : 1;
- mmr_t md_hw_int : 1;
- mmr_t xn_hw_int : 1;
- mmr_t lb_hw_int : 1;
- mmr_t ii_hw_int : 1;
- mmr_t pi_ce_int : 1;
- mmr_t md_ce_int : 1;
- mmr_t xn_ce_int : 1;
- mmr_t pi_uce_int : 1;
- mmr_t md_uce_int : 1;
- mmr_t xn_uce_int : 1;
- mmr_t proc0_adv_int : 1;
- mmr_t proc1_adv_int : 1;
- mmr_t proc2_adv_int : 1;
- mmr_t proc3_adv_int : 1;
- mmr_t proc0_err_int : 1;
- mmr_t proc1_err_int : 1;
- mmr_t proc2_err_int : 1;
- mmr_t proc3_err_int : 1;
- mmr_t system_shutdown_int : 1;
- mmr_t uart_int : 1;
- mmr_t l1_nmi_int : 1;
- mmr_t stop_clock : 1;
- mmr_t rtc0_int : 1;
- mmr_t rtc1_int : 1;
- mmr_t rtc2_int : 1;
- mmr_t rtc3_int : 1;
- mmr_t profile_int : 1;
- mmr_t ipi_int : 1;
- mmr_t ii_int0 : 1;
- mmr_t ii_int1 : 1;
- mmr_t reserved_0 : 33;
- } sh_event_occurred_s;
-} sh_event_occurred_u_t;
-
-/* ==================================================================== */
-/* Register "SH_EVENT_OVERFLOW" */
-/* SHub Interrupt Event Occurred Overflow */
-/* ==================================================================== */
-
-typedef union sh_event_overflow_u {
- mmr_t sh_event_overflow_regval;
- struct {
- mmr_t pi_hw_int : 1;
- mmr_t md_hw_int : 1;
- mmr_t xn_hw_int : 1;
- mmr_t lb_hw_int : 1;
- mmr_t ii_hw_int : 1;
- mmr_t pi_ce_int : 1;
- mmr_t md_ce_int : 1;
- mmr_t xn_ce_int : 1;
- mmr_t pi_uce_int : 1;
- mmr_t md_uce_int : 1;
- mmr_t xn_uce_int : 1;
- mmr_t proc0_adv_int : 1;
- mmr_t proc1_adv_int : 1;
- mmr_t proc2_adv_int : 1;
- mmr_t proc3_adv_int : 1;
- mmr_t proc0_err_int : 1;
- mmr_t proc1_err_int : 1;
- mmr_t proc2_err_int : 1;
- mmr_t proc3_err_int : 1;
- mmr_t system_shutdown_int : 1;
- mmr_t uart_int : 1;
- mmr_t l1_nmi_int : 1;
- mmr_t stop_clock : 1;
- mmr_t rtc0_int : 1;
- mmr_t rtc1_int : 1;
- mmr_t rtc2_int : 1;
- mmr_t rtc3_int : 1;
- mmr_t profile_int : 1;
- mmr_t reserved_0 : 36;
- } sh_event_overflow_s;
-} sh_event_overflow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_JUNK_BUS_TIME" */
-/* Junk Bus Timing */
-/* ==================================================================== */
-
-typedef union sh_junk_bus_time_u {
- mmr_t sh_junk_bus_time_regval;
- struct {
- mmr_t fprom_setup_hold : 8;
- mmr_t fprom_enable : 8;
- mmr_t uart_setup_hold : 8;
- mmr_t uart_enable : 8;
- mmr_t reserved_0 : 32;
- } sh_junk_bus_time_s;
-} sh_junk_bus_time_u_t;
-
-/* ==================================================================== */
-/* Register "SH_JUNK_LATCH_TIME" */
-/* Junk Bus Latch Timing */
-/* ==================================================================== */
-
-typedef union sh_junk_latch_time_u {
- mmr_t sh_junk_latch_time_regval;
- struct {
- mmr_t setup_hold : 3;
- mmr_t reserved_0 : 61;
- } sh_junk_latch_time_s;
-} sh_junk_latch_time_u_t;
-
-/* ==================================================================== */
-/* Register "SH_JUNK_NACK_RESET" */
-/* Junk Bus Nack Counter Reset */
-/* ==================================================================== */
-
-typedef union sh_junk_nack_reset_u {
- mmr_t sh_junk_nack_reset_regval;
- struct {
- mmr_t pulse : 1;
- mmr_t reserved_0 : 63;
- } sh_junk_nack_reset_s;
-} sh_junk_nack_reset_u_t;
-
-/* ==================================================================== */
-/* Register "SH_JUNK_BUS_LED0" */
-/* Junk Bus LED0 */
-/* ==================================================================== */
-
-typedef union sh_junk_bus_led0_u {
- mmr_t sh_junk_bus_led0_regval;
- struct {
- mmr_t led0_data : 8;
- mmr_t reserved_0 : 56;
- } sh_junk_bus_led0_s;
-} sh_junk_bus_led0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_JUNK_BUS_LED1" */
-/* Junk Bus LED1 */
-/* ==================================================================== */
-
-typedef union sh_junk_bus_led1_u {
- mmr_t sh_junk_bus_led1_regval;
- struct {
- mmr_t led1_data : 8;
- mmr_t reserved_0 : 56;
- } sh_junk_bus_led1_s;
-} sh_junk_bus_led1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_JUNK_BUS_LED2" */
-/* Junk Bus LED2 */
-/* ==================================================================== */
-
-typedef union sh_junk_bus_led2_u {
- mmr_t sh_junk_bus_led2_regval;
- struct {
- mmr_t led2_data : 8;
- mmr_t reserved_0 : 56;
- } sh_junk_bus_led2_s;
-} sh_junk_bus_led2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_JUNK_BUS_LED3" */
-/* Junk Bus LED3 */
-/* ==================================================================== */
-
-typedef union sh_junk_bus_led3_u {
- mmr_t sh_junk_bus_led3_regval;
- struct {
- mmr_t led3_data : 8;
- mmr_t reserved_0 : 56;
- } sh_junk_bus_led3_s;
-} sh_junk_bus_led3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_JUNK_ERROR_STATUS" */
-/* Junk Bus Error Status */
-/* ==================================================================== */
-
-typedef union sh_junk_error_status_u {
- mmr_t sh_junk_error_status_regval;
- struct {
- mmr_t address : 47;
- mmr_t reserved_0 : 1;
- mmr_t cmd : 8;
- mmr_t mode : 1;
- mmr_t status : 4;
- mmr_t reserved_1 : 3;
- } sh_junk_error_status_s;
-} sh_junk_error_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_STAT" */
-/* This register describes the LLP status. */
-/* ==================================================================== */
-
-typedef union sh_ni0_llp_stat_u {
- mmr_t sh_ni0_llp_stat_regval;
- struct {
- mmr_t link_reset_state : 4;
- mmr_t reserved_0 : 60;
- } sh_ni0_llp_stat_s;
-} sh_ni0_llp_stat_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_RESET" */
-/* Writing issues a reset to the network interface */
-/* ==================================================================== */
-
-typedef union sh_ni0_llp_reset_u {
- mmr_t sh_ni0_llp_reset_regval;
- struct {
- mmr_t link : 1;
- mmr_t warm : 1;
- mmr_t reserved_0 : 62;
- } sh_ni0_llp_reset_s;
-} sh_ni0_llp_reset_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_RESET_EN" */
-/* Controls LLP warm reset propagation */
-/* ==================================================================== */
-
-typedef union sh_ni0_llp_reset_en_u {
- mmr_t sh_ni0_llp_reset_en_regval;
- struct {
- mmr_t ok : 1;
- mmr_t reserved_0 : 63;
- } sh_ni0_llp_reset_en_s;
-} sh_ni0_llp_reset_en_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_CHAN_MODE" */
-/* Sets the signaling mode of LLP and channel */
-/* ==================================================================== */
-
-typedef union sh_ni0_llp_chan_mode_u {
- mmr_t sh_ni0_llp_chan_mode_regval;
- struct {
- mmr_t bitmode32 : 1;
- mmr_t ac_encode : 1;
- mmr_t enable_tuning : 1;
- mmr_t enable_rmt_ft_upd : 1;
- mmr_t enable_clkquad : 1;
- mmr_t reserved_0 : 59;
- } sh_ni0_llp_chan_mode_s;
-} sh_ni0_llp_chan_mode_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_CONFIG" */
-/* Sets the configuration of LLP and channel */
-/* ==================================================================== */
-
-typedef union sh_ni0_llp_config_u {
- mmr_t sh_ni0_llp_config_regval;
- struct {
- mmr_t maxburst : 10;
- mmr_t maxretry : 10;
- mmr_t nulltimeout : 6;
- mmr_t ftu_time : 12;
- mmr_t reserved_0 : 26;
- } sh_ni0_llp_config_s;
-} sh_ni0_llp_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_TEST_CTL" */
-/* ==================================================================== */
-
-typedef union sh_ni0_llp_test_ctl_u {
- mmr_t sh_ni0_llp_test_ctl_regval;
- struct {
- mmr_t pattern : 40;
- mmr_t send_test_mode : 2;
- mmr_t reserved_0 : 2;
- mmr_t wire_sel : 6;
- mmr_t reserved_1 : 2;
- mmr_t lfsr_mode : 2;
- mmr_t noise_mode : 2;
- mmr_t armcapture : 1;
- mmr_t capturecbonly : 1;
- mmr_t sendcberror : 1;
- mmr_t sendsnerror : 1;
- mmr_t fakesnerror : 1;
- mmr_t captured : 1;
- mmr_t cberror : 1;
- mmr_t reserved_2 : 1;
- } sh_ni0_llp_test_ctl_s;
-} sh_ni0_llp_test_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_CAPT_WD1" */
-/* low order 64-bit captured word */
-/* ==================================================================== */
-
-typedef union sh_ni0_llp_capt_wd1_u {
- mmr_t sh_ni0_llp_capt_wd1_regval;
- struct {
- mmr_t data : 64;
- } sh_ni0_llp_capt_wd1_s;
-} sh_ni0_llp_capt_wd1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_CAPT_WD2" */
-/* high order 64-bit captured word */
-/* ==================================================================== */
-
-typedef union sh_ni0_llp_capt_wd2_u {
- mmr_t sh_ni0_llp_capt_wd2_regval;
- struct {
- mmr_t data : 64;
- } sh_ni0_llp_capt_wd2_s;
-} sh_ni0_llp_capt_wd2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_CAPT_SBCB" */
-/* captured sideband, sequence, and CRC */
-/* ==================================================================== */
-
-typedef union sh_ni0_llp_capt_sbcb_u {
- mmr_t sh_ni0_llp_capt_sbcb_regval;
- struct {
- mmr_t capturedrcvsbsn : 16;
- mmr_t capturedrcvcrc : 16;
- mmr_t sentallcberrors : 1;
- mmr_t sentallsnerrors : 1;
- mmr_t fakedallsnerrors : 1;
- mmr_t chargeoverflow : 1;
- mmr_t chargeunderflow : 1;
- mmr_t reserved_0 : 27;
- } sh_ni0_llp_capt_sbcb_s;
-} sh_ni0_llp_capt_sbcb_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_LLP_ERR" */
-/* ==================================================================== */
-
-typedef union sh_ni0_llp_err_u {
- mmr_t sh_ni0_llp_err_regval;
- struct {
- mmr_t rx_sn_err_count : 8;
- mmr_t rx_cb_err_count : 8;
- mmr_t retry_count : 8;
- mmr_t retry_timeout : 1;
- mmr_t rcv_link_reset : 1;
- mmr_t squash : 1;
- mmr_t power_not_ok : 1;
- mmr_t wire_cnt : 24;
- mmr_t wire_overflow : 1;
- mmr_t reserved_0 : 11;
- } sh_ni0_llp_err_s;
-} sh_ni0_llp_err_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_STAT" */
-/* This register describes the LLP status. */
-/* ==================================================================== */
-
-typedef union sh_ni1_llp_stat_u {
- mmr_t sh_ni1_llp_stat_regval;
- struct {
- mmr_t link_reset_state : 4;
- mmr_t reserved_0 : 60;
- } sh_ni1_llp_stat_s;
-} sh_ni1_llp_stat_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_RESET" */
-/* Writing issues a reset to the network interface */
-/* ==================================================================== */
-
-typedef union sh_ni1_llp_reset_u {
- mmr_t sh_ni1_llp_reset_regval;
- struct {
- mmr_t link : 1;
- mmr_t warm : 1;
- mmr_t reserved_0 : 62;
- } sh_ni1_llp_reset_s;
-} sh_ni1_llp_reset_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_RESET_EN" */
-/* Controls LLP warm reset propagation */
-/* ==================================================================== */
-
-typedef union sh_ni1_llp_reset_en_u {
- mmr_t sh_ni1_llp_reset_en_regval;
- struct {
- mmr_t ok : 1;
- mmr_t reserved_0 : 63;
- } sh_ni1_llp_reset_en_s;
-} sh_ni1_llp_reset_en_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_CHAN_MODE" */
-/* Sets the signaling mode of LLP and channel */
-/* ==================================================================== */
-
-typedef union sh_ni1_llp_chan_mode_u {
- mmr_t sh_ni1_llp_chan_mode_regval;
- struct {
- mmr_t bitmode32 : 1;
- mmr_t ac_encode : 1;
- mmr_t enable_tuning : 1;
- mmr_t enable_rmt_ft_upd : 1;
- mmr_t enable_clkquad : 1;
- mmr_t reserved_0 : 59;
- } sh_ni1_llp_chan_mode_s;
-} sh_ni1_llp_chan_mode_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_CONFIG" */
-/* Sets the configuration of LLP and channel */
-/* ==================================================================== */
-
-typedef union sh_ni1_llp_config_u {
- mmr_t sh_ni1_llp_config_regval;
- struct {
- mmr_t maxburst : 10;
- mmr_t maxretry : 10;
- mmr_t nulltimeout : 6;
- mmr_t ftu_time : 12;
- mmr_t reserved_0 : 26;
- } sh_ni1_llp_config_s;
-} sh_ni1_llp_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_TEST_CTL" */
-/* ==================================================================== */
-
-typedef union sh_ni1_llp_test_ctl_u {
- mmr_t sh_ni1_llp_test_ctl_regval;
- struct {
- mmr_t pattern : 40;
- mmr_t send_test_mode : 2;
- mmr_t reserved_0 : 2;
- mmr_t wire_sel : 6;
- mmr_t reserved_1 : 2;
- mmr_t lfsr_mode : 2;
- mmr_t noise_mode : 2;
- mmr_t armcapture : 1;
- mmr_t capturecbonly : 1;
- mmr_t sendcberror : 1;
- mmr_t sendsnerror : 1;
- mmr_t fakesnerror : 1;
- mmr_t captured : 1;
- mmr_t cberror : 1;
- mmr_t reserved_2 : 1;
- } sh_ni1_llp_test_ctl_s;
-} sh_ni1_llp_test_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_CAPT_WD1" */
-/* low order 64-bit captured word */
-/* ==================================================================== */
-
-typedef union sh_ni1_llp_capt_wd1_u {
- mmr_t sh_ni1_llp_capt_wd1_regval;
- struct {
- mmr_t data : 64;
- } sh_ni1_llp_capt_wd1_s;
-} sh_ni1_llp_capt_wd1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_CAPT_WD2" */
-/* high order 64-bit captured word */
-/* ==================================================================== */
-
-typedef union sh_ni1_llp_capt_wd2_u {
- mmr_t sh_ni1_llp_capt_wd2_regval;
- struct {
- mmr_t data : 64;
- } sh_ni1_llp_capt_wd2_s;
-} sh_ni1_llp_capt_wd2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_CAPT_SBCB" */
-/* captured sideband, sequence, and CRC */
-/* ==================================================================== */
-
-typedef union sh_ni1_llp_capt_sbcb_u {
- mmr_t sh_ni1_llp_capt_sbcb_regval;
- struct {
- mmr_t capturedrcvsbsn : 16;
- mmr_t capturedrcvcrc : 16;
- mmr_t sentallcberrors : 1;
- mmr_t sentallsnerrors : 1;
- mmr_t fakedallsnerrors : 1;
- mmr_t chargeoverflow : 1;
- mmr_t chargeunderflow : 1;
- mmr_t reserved_0 : 27;
- } sh_ni1_llp_capt_sbcb_s;
-} sh_ni1_llp_capt_sbcb_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_LLP_ERR" */
-/* ==================================================================== */
-
-typedef union sh_ni1_llp_err_u {
- mmr_t sh_ni1_llp_err_regval;
- struct {
- mmr_t rx_sn_err_count : 8;
- mmr_t rx_cb_err_count : 8;
- mmr_t retry_count : 8;
- mmr_t retry_timeout : 1;
- mmr_t rcv_link_reset : 1;
- mmr_t squash : 1;
- mmr_t power_not_ok : 1;
- mmr_t wire_cnt : 24;
- mmr_t wire_overflow : 1;
- mmr_t reserved_0 : 11;
- } sh_ni1_llp_err_s;
-} sh_ni1_llp_err_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LLP_TO_FIFO02_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_llp_to_fifo02_flow_u {
- mmr_t sh_xnni0_llp_to_fifo02_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t credit_vc0_dyn : 6;
- mmr_t reserved_3 : 2;
- mmr_t credit_vc0_cap : 6;
- mmr_t reserved_4 : 10;
- mmr_t credit_vc2_dyn : 6;
- mmr_t reserved_5 : 2;
- mmr_t credit_vc2_cap : 6;
- mmr_t reserved_6 : 2;
- } sh_xnni0_llp_to_fifo02_flow_s;
-} sh_xnni0_llp_to_fifo02_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LLP_TO_FIFO13_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_llp_to_fifo13_flow_u {
- mmr_t sh_xnni0_llp_to_fifo13_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t credit_vc0_dyn : 6;
- mmr_t reserved_3 : 2;
- mmr_t credit_vc0_cap : 6;
- mmr_t reserved_4 : 10;
- mmr_t credit_vc2_dyn : 6;
- mmr_t reserved_5 : 2;
- mmr_t credit_vc2_cap : 6;
- mmr_t reserved_6 : 2;
- } sh_xnni0_llp_to_fifo13_flow_s;
-} sh_xnni0_llp_to_fifo13_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LLP_DEBIT_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_llp_debit_flow_u {
- mmr_t sh_xnni0_llp_debit_flow_regval;
- struct {
- mmr_t debit_vc0_dyn : 5;
- mmr_t reserved_0 : 3;
- mmr_t debit_vc0_cap : 5;
- mmr_t reserved_1 : 3;
- mmr_t debit_vc1_dyn : 5;
- mmr_t reserved_2 : 3;
- mmr_t debit_vc1_cap : 5;
- mmr_t reserved_3 : 3;
- mmr_t debit_vc2_dyn : 5;
- mmr_t reserved_4 : 3;
- mmr_t debit_vc2_cap : 5;
- mmr_t reserved_5 : 3;
- mmr_t debit_vc3_dyn : 5;
- mmr_t reserved_6 : 3;
- mmr_t debit_vc3_cap : 5;
- mmr_t reserved_7 : 3;
- } sh_xnni0_llp_debit_flow_s;
-} sh_xnni0_llp_debit_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LINK_0_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_link_0_flow_u {
- mmr_t sh_xnni0_link_0_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t credit_vc0_test : 7;
- mmr_t reserved_1 : 1;
- mmr_t credit_vc0_dyn : 7;
- mmr_t reserved_2 : 1;
- mmr_t credit_vc0_cap : 7;
- mmr_t reserved_3 : 33;
- } sh_xnni0_link_0_flow_s;
-} sh_xnni0_link_0_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LINK_1_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_link_1_flow_u {
- mmr_t sh_xnni0_link_1_flow_regval;
- struct {
- mmr_t debit_vc1_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc1_force_cred : 1;
- mmr_t credit_vc1_test : 7;
- mmr_t reserved_1 : 1;
- mmr_t credit_vc1_dyn : 7;
- mmr_t reserved_2 : 1;
- mmr_t credit_vc1_cap : 7;
- mmr_t reserved_3 : 33;
- } sh_xnni0_link_1_flow_s;
-} sh_xnni0_link_1_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LINK_2_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_link_2_flow_u {
- mmr_t sh_xnni0_link_2_flow_regval;
- struct {
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t credit_vc2_test : 7;
- mmr_t reserved_1 : 1;
- mmr_t credit_vc2_dyn : 7;
- mmr_t reserved_2 : 1;
- mmr_t credit_vc2_cap : 7;
- mmr_t reserved_3 : 33;
- } sh_xnni0_link_2_flow_s;
-} sh_xnni0_link_2_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_LINK_3_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_link_3_flow_u {
- mmr_t sh_xnni0_link_3_flow_regval;
- struct {
- mmr_t debit_vc3_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc3_force_cred : 1;
- mmr_t credit_vc3_test : 7;
- mmr_t reserved_1 : 1;
- mmr_t credit_vc3_dyn : 7;
- mmr_t reserved_2 : 1;
- mmr_t credit_vc3_cap : 7;
- mmr_t reserved_3 : 33;
- } sh_xnni0_link_3_flow_s;
-} sh_xnni0_link_3_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LLP_TO_FIFO02_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_llp_to_fifo02_flow_u {
- mmr_t sh_xnni1_llp_to_fifo02_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t credit_vc0_dyn : 6;
- mmr_t reserved_3 : 2;
- mmr_t credit_vc0_cap : 6;
- mmr_t reserved_4 : 10;
- mmr_t credit_vc2_dyn : 6;
- mmr_t reserved_5 : 2;
- mmr_t credit_vc2_cap : 6;
- mmr_t reserved_6 : 2;
- } sh_xnni1_llp_to_fifo02_flow_s;
-} sh_xnni1_llp_to_fifo02_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LLP_TO_FIFO13_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_llp_to_fifo13_flow_u {
- mmr_t sh_xnni1_llp_to_fifo13_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t credit_vc0_dyn : 6;
- mmr_t reserved_3 : 2;
- mmr_t credit_vc0_cap : 6;
- mmr_t reserved_4 : 10;
- mmr_t credit_vc2_dyn : 6;
- mmr_t reserved_5 : 2;
- mmr_t credit_vc2_cap : 6;
- mmr_t reserved_6 : 2;
- } sh_xnni1_llp_to_fifo13_flow_s;
-} sh_xnni1_llp_to_fifo13_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LLP_DEBIT_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_llp_debit_flow_u {
- mmr_t sh_xnni1_llp_debit_flow_regval;
- struct {
- mmr_t debit_vc0_dyn : 5;
- mmr_t reserved_0 : 3;
- mmr_t debit_vc0_cap : 5;
- mmr_t reserved_1 : 3;
- mmr_t debit_vc1_dyn : 5;
- mmr_t reserved_2 : 3;
- mmr_t debit_vc1_cap : 5;
- mmr_t reserved_3 : 3;
- mmr_t debit_vc2_dyn : 5;
- mmr_t reserved_4 : 3;
- mmr_t debit_vc2_cap : 5;
- mmr_t reserved_5 : 3;
- mmr_t debit_vc3_dyn : 5;
- mmr_t reserved_6 : 3;
- mmr_t debit_vc3_cap : 5;
- mmr_t reserved_7 : 3;
- } sh_xnni1_llp_debit_flow_s;
-} sh_xnni1_llp_debit_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LINK_0_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_link_0_flow_u {
- mmr_t sh_xnni1_link_0_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t credit_vc0_test : 7;
- mmr_t reserved_1 : 1;
- mmr_t credit_vc0_dyn : 7;
- mmr_t reserved_2 : 1;
- mmr_t credit_vc0_cap : 7;
- mmr_t reserved_3 : 33;
- } sh_xnni1_link_0_flow_s;
-} sh_xnni1_link_0_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LINK_1_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_link_1_flow_u {
- mmr_t sh_xnni1_link_1_flow_regval;
- struct {
- mmr_t debit_vc1_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc1_force_cred : 1;
- mmr_t credit_vc1_test : 7;
- mmr_t reserved_1 : 1;
- mmr_t credit_vc1_dyn : 7;
- mmr_t reserved_2 : 1;
- mmr_t credit_vc1_cap : 7;
- mmr_t reserved_3 : 33;
- } sh_xnni1_link_1_flow_s;
-} sh_xnni1_link_1_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LINK_2_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_link_2_flow_u {
- mmr_t sh_xnni1_link_2_flow_regval;
- struct {
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t credit_vc2_test : 7;
- mmr_t reserved_1 : 1;
- mmr_t credit_vc2_dyn : 7;
- mmr_t reserved_2 : 1;
- mmr_t credit_vc2_cap : 7;
- mmr_t reserved_3 : 33;
- } sh_xnni1_link_2_flow_s;
-} sh_xnni1_link_2_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_LINK_3_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_link_3_flow_u {
- mmr_t sh_xnni1_link_3_flow_regval;
- struct {
- mmr_t debit_vc3_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc3_force_cred : 1;
- mmr_t credit_vc3_test : 7;
- mmr_t reserved_1 : 1;
- mmr_t credit_vc3_dyn : 7;
- mmr_t reserved_2 : 1;
- mmr_t credit_vc3_cap : 7;
- mmr_t reserved_3 : 33;
- } sh_xnni1_link_3_flow_s;
-} sh_xnni1_link_3_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_IILB_LOCAL_TABLE" */
-/* local lookup table */
-/* ==================================================================== */
-
-typedef union sh_iilb_local_table_u {
- mmr_t sh_iilb_local_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t ni_sel0 : 1;
- mmr_t reserved_0 : 57;
- mmr_t valid : 1;
- } sh_iilb_local_table_s;
-} sh_iilb_local_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_IILB_GLOBAL_TABLE" */
-/* global lookup table */
-/* ==================================================================== */
-
-typedef union sh_iilb_global_table_u {
- mmr_t sh_iilb_global_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t ni_sel0 : 1;
- mmr_t reserved_0 : 57;
- mmr_t valid : 1;
- } sh_iilb_global_table_s;
-} sh_iilb_global_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_IILB_OVER_RIDE_TABLE" */
-/* If enabled, bypass the Global/Local tables */
-/* ==================================================================== */
-
-typedef union sh_iilb_over_ride_table_u {
- mmr_t sh_iilb_over_ride_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t ni_sel0 : 1;
- mmr_t reserved_0 : 57;
- mmr_t enable : 1;
- } sh_iilb_over_ride_table_s;
-} sh_iilb_over_ride_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_IILB_RSP_PLANE_HINT" */
-/* If enabled, invert incoming response only plane hint bit before lo */
-/* ==================================================================== */
-
-typedef union sh_iilb_rsp_plane_hint_u {
- mmr_t sh_iilb_rsp_plane_hint_regval;
- struct {
- mmr_t reserved_0 : 64;
- } sh_iilb_rsp_plane_hint_s;
-} sh_iilb_rsp_plane_hint_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_LOCAL_TABLE" */
-/* local lookup table */
-/* ==================================================================== */
-
-typedef union sh_pi_local_table_u {
- mmr_t sh_pi_local_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t ni_sel0 : 1;
- mmr_t reserved_0 : 2;
- mmr_t dir1 : 4;
- mmr_t v1 : 1;
- mmr_t ni_sel1 : 1;
- mmr_t reserved_1 : 49;
- mmr_t valid : 1;
- } sh_pi_local_table_s;
-} sh_pi_local_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_GLOBAL_TABLE" */
-/* global lookup table */
-/* ==================================================================== */
-
-typedef union sh_pi_global_table_u {
- mmr_t sh_pi_global_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t ni_sel0 : 1;
- mmr_t reserved_0 : 2;
- mmr_t dir1 : 4;
- mmr_t v1 : 1;
- mmr_t ni_sel1 : 1;
- mmr_t reserved_1 : 49;
- mmr_t valid : 1;
- } sh_pi_global_table_s;
-} sh_pi_global_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_OVER_RIDE_TABLE" */
-/* If enabled, bypass the Global/Local tables */
-/* ==================================================================== */
-
-typedef union sh_pi_over_ride_table_u {
- mmr_t sh_pi_over_ride_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t ni_sel0 : 1;
- mmr_t reserved_0 : 2;
- mmr_t dir1 : 4;
- mmr_t v1 : 1;
- mmr_t ni_sel1 : 1;
- mmr_t reserved_1 : 49;
- mmr_t enable : 1;
- } sh_pi_over_ride_table_s;
-} sh_pi_over_ride_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_RSP_PLANE_HINT" */
-/* If enabled, invert incoming response only plane hint bit before lo */
-/* ==================================================================== */
-
-typedef union sh_pi_rsp_plane_hint_u {
- mmr_t sh_pi_rsp_plane_hint_regval;
- struct {
- mmr_t invert : 1;
- mmr_t reserved_0 : 63;
- } sh_pi_rsp_plane_hint_s;
-} sh_pi_rsp_plane_hint_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_LOCAL_TABLE" */
-/* local lookup table */
-/* ==================================================================== */
-
-typedef union sh_ni0_local_table_u {
- mmr_t sh_ni0_local_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t reserved_0 : 58;
- mmr_t valid : 1;
- } sh_ni0_local_table_s;
-} sh_ni0_local_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_GLOBAL_TABLE" */
-/* global lookup table */
-/* ==================================================================== */
-
-typedef union sh_ni0_global_table_u {
- mmr_t sh_ni0_global_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t reserved_0 : 58;
- mmr_t valid : 1;
- } sh_ni0_global_table_s;
-} sh_ni0_global_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_OVER_RIDE_TABLE" */
-/* If enabled, bypass the Global/Local tables */
-/* ==================================================================== */
-
-typedef union sh_ni0_over_ride_table_u {
- mmr_t sh_ni0_over_ride_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t reserved_0 : 58;
- mmr_t enable : 1;
- } sh_ni0_over_ride_table_s;
-} sh_ni0_over_ride_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_RSP_PLANE_HINT" */
-/* If enabled, invert incoming response only plane hint bit before lo */
-/* ==================================================================== */
-
-typedef union sh_ni0_rsp_plane_hint_u {
- mmr_t sh_ni0_rsp_plane_hint_regval;
- struct {
- mmr_t reserved_0 : 64;
- } sh_ni0_rsp_plane_hint_s;
-} sh_ni0_rsp_plane_hint_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_LOCAL_TABLE" */
-/* local lookup table */
-/* ==================================================================== */
-
-typedef union sh_ni1_local_table_u {
- mmr_t sh_ni1_local_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t reserved_0 : 58;
- mmr_t valid : 1;
- } sh_ni1_local_table_s;
-} sh_ni1_local_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_GLOBAL_TABLE" */
-/* global lookup table */
-/* ==================================================================== */
-
-typedef union sh_ni1_global_table_u {
- mmr_t sh_ni1_global_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t reserved_0 : 58;
- mmr_t valid : 1;
- } sh_ni1_global_table_s;
-} sh_ni1_global_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_OVER_RIDE_TABLE" */
-/* If enabled, bypass the Global/Local tables */
-/* ==================================================================== */
-
-typedef union sh_ni1_over_ride_table_u {
- mmr_t sh_ni1_over_ride_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t reserved_0 : 58;
- mmr_t enable : 1;
- } sh_ni1_over_ride_table_s;
-} sh_ni1_over_ride_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_RSP_PLANE_HINT" */
-/* If enabled, invert incoming response only plane hint bit before lo */
-/* ==================================================================== */
-
-typedef union sh_ni1_rsp_plane_hint_u {
- mmr_t sh_ni1_rsp_plane_hint_regval;
- struct {
- mmr_t reserved_0 : 64;
- } sh_ni1_rsp_plane_hint_s;
-} sh_ni1_rsp_plane_hint_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_LOCAL_TABLE" */
-/* local lookup table */
-/* ==================================================================== */
-
-typedef union sh_md_local_table_u {
- mmr_t sh_md_local_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t ni_sel0 : 1;
- mmr_t reserved_0 : 2;
- mmr_t dir1 : 4;
- mmr_t v1 : 1;
- mmr_t ni_sel1 : 1;
- mmr_t reserved_1 : 49;
- mmr_t valid : 1;
- } sh_md_local_table_s;
-} sh_md_local_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_GLOBAL_TABLE" */
-/* global lookup table */
-/* ==================================================================== */
-
-typedef union sh_md_global_table_u {
- mmr_t sh_md_global_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t ni_sel0 : 1;
- mmr_t reserved_0 : 2;
- mmr_t dir1 : 4;
- mmr_t v1 : 1;
- mmr_t ni_sel1 : 1;
- mmr_t reserved_1 : 49;
- mmr_t valid : 1;
- } sh_md_global_table_s;
-} sh_md_global_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_OVER_RIDE_TABLE" */
-/* If enabled, bypass the Global/Local tables */
-/* ==================================================================== */
-
-typedef union sh_md_over_ride_table_u {
- mmr_t sh_md_over_ride_table_regval;
- struct {
- mmr_t dir0 : 4;
- mmr_t v0 : 1;
- mmr_t ni_sel0 : 1;
- mmr_t reserved_0 : 2;
- mmr_t dir1 : 4;
- mmr_t v1 : 1;
- mmr_t ni_sel1 : 1;
- mmr_t reserved_1 : 49;
- mmr_t enable : 1;
- } sh_md_over_ride_table_s;
-} sh_md_over_ride_table_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_RSP_PLANE_HINT" */
-/* If enabled, invert incoming response only plane hint bit before lo */
-/* ==================================================================== */
-
-typedef union sh_md_rsp_plane_hint_u {
- mmr_t sh_md_rsp_plane_hint_regval;
- struct {
- mmr_t invert : 1;
- mmr_t reserved_0 : 63;
- } sh_md_rsp_plane_hint_s;
-} sh_md_rsp_plane_hint_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_LIQ_CTL" */
-/* Local Block LIQ Control */
-/* ==================================================================== */
-
-typedef union sh_lb_liq_ctl_u {
- mmr_t sh_lb_liq_ctl_regval;
- struct {
- mmr_t liq_req_ctl : 5;
- mmr_t reserved_0 : 3;
- mmr_t liq_rpl_ctl : 4;
- mmr_t reserved_1 : 4;
- mmr_t force_rq_credit : 1;
- mmr_t force_rp_credit : 1;
- mmr_t force_linvv_credit : 1;
- mmr_t reserved_2 : 45;
- } sh_lb_liq_ctl_s;
-} sh_lb_liq_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_LOQ_CTL" */
-/* Local Block LOQ Control */
-/* ==================================================================== */
-
-typedef union sh_lb_loq_ctl_u {
- mmr_t sh_lb_loq_ctl_regval;
- struct {
- mmr_t loq_req_ctl : 1;
- mmr_t loq_rpl_ctl : 1;
- mmr_t reserved_0 : 62;
- } sh_lb_loq_ctl_s;
-} sh_lb_loq_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_MAX_REP_CREDIT_CNT" */
-/* Maximum number of reply credits from XN */
-/* ==================================================================== */
-
-typedef union sh_lb_max_rep_credit_cnt_u {
- mmr_t sh_lb_max_rep_credit_cnt_regval;
- struct {
- mmr_t max_cnt : 5;
- mmr_t reserved_0 : 59;
- } sh_lb_max_rep_credit_cnt_s;
-} sh_lb_max_rep_credit_cnt_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_MAX_REQ_CREDIT_CNT" */
-/* Maximum number of request credits from XN */
-/* ==================================================================== */
-
-typedef union sh_lb_max_req_credit_cnt_u {
- mmr_t sh_lb_max_req_credit_cnt_regval;
- struct {
- mmr_t max_cnt : 5;
- mmr_t reserved_0 : 59;
- } sh_lb_max_req_credit_cnt_s;
-} sh_lb_max_req_credit_cnt_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PIO_TIME_OUT" */
-/* Local Block PIO time out value */
-/* ==================================================================== */
-
-typedef union sh_pio_time_out_u {
- mmr_t sh_pio_time_out_regval;
- struct {
- mmr_t value : 16;
- mmr_t reserved_0 : 48;
- } sh_pio_time_out_s;
-} sh_pio_time_out_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PIO_NACK_RESET" */
-/* Local Block PIO Reset for nack counters */
-/* ==================================================================== */
-
-typedef union sh_pio_nack_reset_u {
- mmr_t sh_pio_nack_reset_regval;
- struct {
- mmr_t pulse : 1;
- mmr_t reserved_0 : 63;
- } sh_pio_nack_reset_s;
-} sh_pio_nack_reset_u_t;
-
-/* ==================================================================== */
-/* Register "SH_CONVEYOR_BELT_TIME_OUT" */
-/* Local Block conveyor belt time out value */
-/* ==================================================================== */
-
-typedef union sh_conveyor_belt_time_out_u {
- mmr_t sh_conveyor_belt_time_out_regval;
- struct {
- mmr_t value : 12;
- mmr_t reserved_0 : 52;
- } sh_conveyor_belt_time_out_s;
-} sh_conveyor_belt_time_out_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_CREDIT_STATUS" */
-/* Credit Counter Status Register */
-/* ==================================================================== */
-
-typedef union sh_lb_credit_status_u {
- mmr_t sh_lb_credit_status_regval;
- struct {
- mmr_t liq_rq_credit : 5;
- mmr_t reserved_0 : 1;
- mmr_t liq_rp_credit : 4;
- mmr_t reserved_1 : 2;
- mmr_t linvv_credit : 6;
- mmr_t loq_rq_credit : 5;
- mmr_t loq_rp_credit : 5;
- mmr_t reserved_2 : 36;
- } sh_lb_credit_status_s;
-} sh_lb_credit_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_DEBUG_LOCAL_SEL" */
-/* LB Debug Port Select */
-/* ==================================================================== */
-
-typedef union sh_lb_debug_local_sel_u {
- mmr_t sh_lb_debug_local_sel_regval;
- struct {
- mmr_t nibble0_chiplet_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_chiplet_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_chiplet_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_chiplet_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_chiplet_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_chiplet_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_chiplet_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_chiplet_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t trigger_enable : 1;
- } sh_lb_debug_local_sel_s;
-} sh_lb_debug_local_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_DEBUG_PERF_SEL" */
-/* LB Debug Port Performance Select */
-/* ==================================================================== */
-
-typedef union sh_lb_debug_perf_sel_u {
- mmr_t sh_lb_debug_perf_sel_regval;
- struct {
- mmr_t nibble0_chiplet_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_chiplet_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_chiplet_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_chiplet_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_chiplet_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_chiplet_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_chiplet_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_chiplet_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_lb_debug_perf_sel_s;
-} sh_lb_debug_perf_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_DEBUG_TRIG_SEL" */
-/* LB Debug Trigger Select */
-/* ==================================================================== */
-
-typedef union sh_lb_debug_trig_sel_u {
- mmr_t sh_lb_debug_trig_sel_regval;
- struct {
- mmr_t trigger0_chiplet_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t trigger0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t trigger1_chiplet_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t trigger1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t trigger2_chiplet_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t trigger2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t trigger3_chiplet_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t trigger3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t trigger4_chiplet_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t trigger4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t trigger5_chiplet_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t trigger5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t trigger6_chiplet_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t trigger6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t trigger7_chiplet_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t trigger7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_lb_debug_trig_sel_s;
-} sh_lb_debug_trig_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_DETAIL_1" */
-/* LB Error capture information: HDR1 */
-/* ==================================================================== */
-
-typedef union sh_lb_error_detail_1_u {
- mmr_t sh_lb_error_detail_1_regval;
- struct {
- mmr_t command : 8;
- mmr_t suppl : 14;
- mmr_t reserved_0 : 2;
- mmr_t source : 14;
- mmr_t reserved_1 : 2;
- mmr_t dest : 3;
- mmr_t reserved_2 : 5;
- mmr_t hdr_err : 1;
- mmr_t data_err : 1;
- mmr_t reserved_3 : 13;
- mmr_t valid : 1;
- } sh_lb_error_detail_1_s;
-} sh_lb_error_detail_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_DETAIL_2" */
-/* LB Error Bits */
-/* ==================================================================== */
-
-typedef union sh_lb_error_detail_2_u {
- mmr_t sh_lb_error_detail_2_regval;
- struct {
- mmr_t address : 47;
- mmr_t reserved_0 : 17;
- } sh_lb_error_detail_2_s;
-} sh_lb_error_detail_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_DETAIL_3" */
-/* LB Error Bits */
-/* ==================================================================== */
-
-typedef union sh_lb_error_detail_3_u {
- mmr_t sh_lb_error_detail_3_regval;
- struct {
- mmr_t data : 64;
- } sh_lb_error_detail_3_s;
-} sh_lb_error_detail_3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_DETAIL_4" */
-/* LB Error Bits */
-/* ==================================================================== */
-
-typedef union sh_lb_error_detail_4_u {
- mmr_t sh_lb_error_detail_4_regval;
- struct {
- mmr_t route : 64;
- } sh_lb_error_detail_4_s;
-} sh_lb_error_detail_4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_DETAIL_5" */
-/* LB Error Bits */
-/* ==================================================================== */
-
-typedef union sh_lb_error_detail_5_u {
- mmr_t sh_lb_error_detail_5_regval;
- struct {
- mmr_t read_retry : 1;
- mmr_t ptc1_write : 1;
- mmr_t write_retry : 1;
- mmr_t count_a_overflow : 1;
- mmr_t count_b_overflow : 1;
- mmr_t nack_a_timeout : 1;
- mmr_t nack_b_timeout : 1;
- mmr_t reserved_0 : 57;
- } sh_lb_error_detail_5_s;
-} sh_lb_error_detail_5_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_MASK" */
-/* LB Error Mask */
-/* ==================================================================== */
-
-typedef union sh_lb_error_mask_u {
- mmr_t sh_lb_error_mask_regval;
- struct {
- mmr_t rq_bad_cmd : 1;
- mmr_t rp_bad_cmd : 1;
- mmr_t rq_short : 1;
- mmr_t rp_short : 1;
- mmr_t rq_long : 1;
- mmr_t rp_long : 1;
- mmr_t rq_bad_data : 1;
- mmr_t rp_bad_data : 1;
- mmr_t rq_bad_addr : 1;
- mmr_t rq_time_out : 1;
- mmr_t linvv_overflow : 1;
- mmr_t unexpected_linv : 1;
- mmr_t ptc_1_timeout : 1;
- mmr_t junk_bus_err : 1;
- mmr_t pio_cb_err : 1;
- mmr_t vector_rq_route_error : 1;
- mmr_t vector_rp_route_error : 1;
- mmr_t gclk_drop : 1;
- mmr_t rq_fifo_error : 1;
- mmr_t rp_fifo_error : 1;
- mmr_t unexp_valid : 1;
- mmr_t rq_credit_overflow : 1;
- mmr_t rp_credit_overflow : 1;
- mmr_t reserved_0 : 41;
- } sh_lb_error_mask_s;
-} sh_lb_error_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_OVERFLOW" */
-/* LB Error Overflow */
-/* ==================================================================== */
-
-typedef union sh_lb_error_overflow_u {
- mmr_t sh_lb_error_overflow_regval;
- struct {
- mmr_t rq_bad_cmd_ovrfl : 1;
- mmr_t rp_bad_cmd_ovrfl : 1;
- mmr_t rq_short_ovrfl : 1;
- mmr_t rp_short_ovrfl : 1;
- mmr_t rq_long_ovrfl : 1;
- mmr_t rp_long_ovrfl : 1;
- mmr_t rq_bad_data_ovrfl : 1;
- mmr_t rp_bad_data_ovrfl : 1;
- mmr_t rq_bad_addr_ovrfl : 1;
- mmr_t rq_time_out_ovrfl : 1;
- mmr_t linvv_overflow_ovrfl : 1;
- mmr_t unexpected_linv_ovrfl : 1;
- mmr_t ptc_1_timeout_ovrfl : 1;
- mmr_t junk_bus_err_ovrfl : 1;
- mmr_t pio_cb_err_ovrfl : 1;
- mmr_t vector_rq_route_error_ovrfl : 1;
- mmr_t vector_rp_route_error_ovrfl : 1;
- mmr_t gclk_drop_ovrfl : 1;
- mmr_t rq_fifo_error_ovrfl : 1;
- mmr_t rp_fifo_error_ovrfl : 1;
- mmr_t unexp_valid_ovrfl : 1;
- mmr_t rq_credit_overflow_ovrfl : 1;
- mmr_t rp_credit_overflow_ovrfl : 1;
- mmr_t reserved_0 : 41;
- } sh_lb_error_overflow_s;
-} sh_lb_error_overflow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_ERROR_SUMMARY" */
-/* LB Error Bits */
-/* ==================================================================== */
-
-typedef union sh_lb_error_summary_u {
- mmr_t sh_lb_error_summary_regval;
- struct {
- mmr_t rq_bad_cmd : 1;
- mmr_t rp_bad_cmd : 1;
- mmr_t rq_short : 1;
- mmr_t rp_short : 1;
- mmr_t rq_long : 1;
- mmr_t rp_long : 1;
- mmr_t rq_bad_data : 1;
- mmr_t rp_bad_data : 1;
- mmr_t rq_bad_addr : 1;
- mmr_t rq_time_out : 1;
- mmr_t linvv_overflow : 1;
- mmr_t unexpected_linv : 1;
- mmr_t ptc_1_timeout : 1;
- mmr_t junk_bus_err : 1;
- mmr_t pio_cb_err : 1;
- mmr_t vector_rq_route_error : 1;
- mmr_t vector_rp_route_error : 1;
- mmr_t gclk_drop : 1;
- mmr_t rq_fifo_error : 1;
- mmr_t rp_fifo_error : 1;
- mmr_t unexp_valid : 1;
- mmr_t rq_credit_overflow : 1;
- mmr_t rp_credit_overflow : 1;
- mmr_t reserved_0 : 41;
- } sh_lb_error_summary_s;
-} sh_lb_error_summary_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_FIRST_ERROR" */
-/* LB First Error */
-/* ==================================================================== */
-
-typedef union sh_lb_first_error_u {
- mmr_t sh_lb_first_error_regval;
- struct {
- mmr_t rq_bad_cmd : 1;
- mmr_t rp_bad_cmd : 1;
- mmr_t rq_short : 1;
- mmr_t rp_short : 1;
- mmr_t rq_long : 1;
- mmr_t rp_long : 1;
- mmr_t rq_bad_data : 1;
- mmr_t rp_bad_data : 1;
- mmr_t rq_bad_addr : 1;
- mmr_t rq_time_out : 1;
- mmr_t linvv_overflow : 1;
- mmr_t unexpected_linv : 1;
- mmr_t ptc_1_timeout : 1;
- mmr_t junk_bus_err : 1;
- mmr_t pio_cb_err : 1;
- mmr_t vector_rq_route_error : 1;
- mmr_t vector_rp_route_error : 1;
- mmr_t gclk_drop : 1;
- mmr_t rq_fifo_error : 1;
- mmr_t rp_fifo_error : 1;
- mmr_t unexp_valid : 1;
- mmr_t rq_credit_overflow : 1;
- mmr_t rp_credit_overflow : 1;
- mmr_t reserved_0 : 41;
- } sh_lb_first_error_s;
-} sh_lb_first_error_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_LAST_CREDIT" */
-/* Credit counter status register */
-/* ==================================================================== */
-
-typedef union sh_lb_last_credit_u {
- mmr_t sh_lb_last_credit_regval;
- struct {
- mmr_t liq_rq_credit : 5;
- mmr_t reserved_0 : 1;
- mmr_t liq_rp_credit : 4;
- mmr_t reserved_1 : 2;
- mmr_t linvv_credit : 6;
- mmr_t loq_rq_credit : 5;
- mmr_t loq_rp_credit : 5;
- mmr_t reserved_2 : 36;
- } sh_lb_last_credit_s;
-} sh_lb_last_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_NACK_STATUS" */
-/* Nack Counter Status Register */
-/* ==================================================================== */
-
-typedef union sh_lb_nack_status_u {
- mmr_t sh_lb_nack_status_regval;
- struct {
- mmr_t pio_nack_a : 12;
- mmr_t reserved_0 : 4;
- mmr_t pio_nack_b : 12;
- mmr_t reserved_1 : 4;
- mmr_t junk_nack : 16;
- mmr_t cb_timeout_count : 12;
- mmr_t cb_state : 2;
- mmr_t reserved_2 : 2;
- } sh_lb_nack_status_s;
-} sh_lb_nack_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_TRIGGER_COMPARE" */
-/* LB Test-point Trigger Compare */
-/* ==================================================================== */
-
-typedef union sh_lb_trigger_compare_u {
- mmr_t sh_lb_trigger_compare_regval;
- struct {
- mmr_t mask : 32;
- mmr_t reserved_0 : 32;
- } sh_lb_trigger_compare_s;
-} sh_lb_trigger_compare_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_TRIGGER_DATA" */
-/* LB Test-point Trigger Compare Data */
-/* ==================================================================== */
-
-typedef union sh_lb_trigger_data_u {
- mmr_t sh_lb_trigger_data_regval;
- struct {
- mmr_t compare_pattern : 32;
- mmr_t reserved_0 : 32;
- } sh_lb_trigger_data_s;
-} sh_lb_trigger_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_AEC_CONFIG" */
-/* PI Adaptive Error Correction Configuration */
-/* ==================================================================== */
-
-typedef union sh_pi_aec_config_u {
- mmr_t sh_pi_aec_config_regval;
- struct {
- mmr_t mode : 3;
- mmr_t reserved_0 : 61;
- } sh_pi_aec_config_s;
-} sh_pi_aec_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_AFI_ERROR_MASK" */
-/* PI AFI Error Mask */
-/* ==================================================================== */
-
-typedef union sh_pi_afi_error_mask_u {
- mmr_t sh_pi_afi_error_mask_regval;
- struct {
- mmr_t reserved_0 : 21;
- mmr_t hung_bus : 1;
- mmr_t rsp_parity : 1;
- mmr_t ioq_overrun : 1;
- mmr_t req_format : 1;
- mmr_t addr_access : 1;
- mmr_t req_parity : 1;
- mmr_t addr_parity : 1;
- mmr_t shub_fsb_dqe : 1;
- mmr_t shub_fsb_uce : 1;
- mmr_t shub_fsb_ce : 1;
- mmr_t livelock : 1;
- mmr_t bad_snoop : 1;
- mmr_t fsb_tbl_miss : 1;
- mmr_t msg_len : 1;
- mmr_t reserved_1 : 29;
- } sh_pi_afi_error_mask_s;
-} sh_pi_afi_error_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_AFI_TEST_POINT_COMPARE" */
-/* PI AFI Test Point Compare */
-/* ==================================================================== */
-
-typedef union sh_pi_afi_test_point_compare_u {
- mmr_t sh_pi_afi_test_point_compare_regval;
- struct {
- mmr_t compare_mask : 32;
- mmr_t compare_pattern : 32;
- } sh_pi_afi_test_point_compare_s;
-} sh_pi_afi_test_point_compare_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_AFI_TEST_POINT_SELECT" */
-/* PI AFI Test Point Select */
-/* ==================================================================== */
-
-typedef union sh_pi_afi_test_point_select_u {
- mmr_t sh_pi_afi_test_point_select_regval;
- struct {
- mmr_t nibble0_chiplet_sel : 4;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble1_chiplet_sel : 4;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble2_chiplet_sel : 4;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble3_chiplet_sel : 4;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble4_chiplet_sel : 4;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble5_chiplet_sel : 4;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble6_chiplet_sel : 4;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble7_chiplet_sel : 4;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t trigger_enable : 1;
- } sh_pi_afi_test_point_select_s;
-} sh_pi_afi_test_point_select_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_AFI_TEST_POINT_TRIGGER_SELECT" */
-/* PI CRBC Test Point Trigger Select */
-/* ==================================================================== */
-
-typedef union sh_pi_afi_test_point_trigger_select_u {
- mmr_t sh_pi_afi_test_point_trigger_select_regval;
- struct {
- mmr_t trigger0_chiplet_sel : 4;
- mmr_t trigger0_nibble_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t trigger1_chiplet_sel : 4;
- mmr_t trigger1_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t trigger2_chiplet_sel : 4;
- mmr_t trigger2_nibble_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t trigger3_chiplet_sel : 4;
- mmr_t trigger3_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t trigger4_chiplet_sel : 4;
- mmr_t trigger4_nibble_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t trigger5_chiplet_sel : 4;
- mmr_t trigger5_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t trigger6_chiplet_sel : 4;
- mmr_t trigger6_nibble_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t trigger7_chiplet_sel : 4;
- mmr_t trigger7_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- } sh_pi_afi_test_point_trigger_select_s;
-} sh_pi_afi_test_point_trigger_select_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_AUTO_REPLY_ENABLE" */
-/* PI Auto Reply Enable */
-/* ==================================================================== */
-
-typedef union sh_pi_auto_reply_enable_u {
- mmr_t sh_pi_auto_reply_enable_regval;
- struct {
- mmr_t auto_reply_enable : 1;
- mmr_t reserved_0 : 63;
- } sh_pi_auto_reply_enable_s;
-} sh_pi_auto_reply_enable_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CAM_CONTROL" */
-/* CRB CAM MMR Access Control */
-/* ==================================================================== */
-
-typedef union sh_pi_cam_control_u {
- mmr_t sh_pi_cam_control_regval;
- struct {
- mmr_t cam_indx : 7;
- mmr_t reserved_0 : 1;
- mmr_t cam_write : 1;
- mmr_t rrb_rd_xfer_clear : 1;
- mmr_t reserved_1 : 53;
- mmr_t start : 1;
- } sh_pi_cam_control_s;
-} sh_pi_cam_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBC_TEST_POINT_COMPARE" */
-/* PI CRBC Test Point Compare */
-/* ==================================================================== */
-
-typedef union sh_pi_crbc_test_point_compare_u {
- mmr_t sh_pi_crbc_test_point_compare_regval;
- struct {
- mmr_t compare_mask : 32;
- mmr_t compare_pattern : 32;
- } sh_pi_crbc_test_point_compare_s;
-} sh_pi_crbc_test_point_compare_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBC_TEST_POINT_SELECT" */
-/* PI CRBC Test Point Select */
-/* ==================================================================== */
-
-typedef union sh_pi_crbc_test_point_select_u {
- mmr_t sh_pi_crbc_test_point_select_regval;
- struct {
- mmr_t nibble0_chiplet_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_chiplet_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_chiplet_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_chiplet_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_chiplet_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_chiplet_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_chiplet_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_chiplet_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t trigger_enable : 1;
- } sh_pi_crbc_test_point_select_s;
-} sh_pi_crbc_test_point_select_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBC_TEST_POINT_TRIGGER_SELECT" */
-/* PI CRBC Test Point Trigger Select */
-/* ==================================================================== */
-
-typedef union sh_pi_crbc_test_point_trigger_select_u {
- mmr_t sh_pi_crbc_test_point_trigger_select_regval;
- struct {
- mmr_t trigger0_chiplet_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t trigger0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t trigger1_chiplet_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t trigger1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t trigger2_chiplet_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t trigger2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t trigger3_chiplet_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t trigger3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t trigger4_chiplet_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t trigger4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t trigger5_chiplet_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t trigger5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t trigger6_chiplet_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t trigger6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t trigger7_chiplet_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t trigger7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_pi_crbc_test_point_trigger_select_s;
-} sh_pi_crbc_test_point_trigger_select_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_ERROR_MASK" */
-/* PI CRBP Error Mask */
-/* ==================================================================== */
-
-typedef union sh_pi_crbp_error_mask_u {
- mmr_t sh_pi_crbp_error_mask_regval;
- struct {
- mmr_t fsb_proto_err : 1;
- mmr_t gfx_rp_err : 1;
- mmr_t xb_proto_err : 1;
- mmr_t mem_rp_err : 1;
- mmr_t pio_rp_err : 1;
- mmr_t mem_to_err : 1;
- mmr_t pio_to_err : 1;
- mmr_t fsb_shub_uce : 1;
- mmr_t fsb_shub_ce : 1;
- mmr_t msg_color_err : 1;
- mmr_t md_rq_q_oflow : 1;
- mmr_t md_rp_q_oflow : 1;
- mmr_t xn_rq_q_oflow : 1;
- mmr_t xn_rp_q_oflow : 1;
- mmr_t nack_oflow : 1;
- mmr_t gfx_int_0 : 1;
- mmr_t gfx_int_1 : 1;
- mmr_t md_rq_crd_oflow : 1;
- mmr_t md_rp_crd_oflow : 1;
- mmr_t xn_rq_crd_oflow : 1;
- mmr_t xn_rp_crd_oflow : 1;
- mmr_t reserved_0 : 43;
- } sh_pi_crbp_error_mask_s;
-} sh_pi_crbp_error_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_FSB_PIPE_COMPARE" */
-/* CRBP FSB Pipe Compare */
-/* ==================================================================== */
-
-typedef union sh_pi_crbp_fsb_pipe_compare_u {
- mmr_t sh_pi_crbp_fsb_pipe_compare_regval;
- struct {
- mmr_t compare_address : 47;
- mmr_t compare_req : 6;
- mmr_t reserved_0 : 11;
- } sh_pi_crbp_fsb_pipe_compare_s;
-} sh_pi_crbp_fsb_pipe_compare_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_FSB_PIPE_MASK" */
-/* CRBP Compare Mask */
-/* ==================================================================== */
-
-typedef union sh_pi_crbp_fsb_pipe_mask_u {
- mmr_t sh_pi_crbp_fsb_pipe_mask_regval;
- struct {
- mmr_t compare_address_mask : 47;
- mmr_t compare_req_mask : 6;
- mmr_t reserved_0 : 11;
- } sh_pi_crbp_fsb_pipe_mask_s;
-} sh_pi_crbp_fsb_pipe_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_TEST_POINT_COMPARE" */
-/* PI CRBP Test Point Compare */
-/* ==================================================================== */
-
-typedef union sh_pi_crbp_test_point_compare_u {
- mmr_t sh_pi_crbp_test_point_compare_regval;
- struct {
- mmr_t compare_mask : 32;
- mmr_t compare_pattern : 32;
- } sh_pi_crbp_test_point_compare_s;
-} sh_pi_crbp_test_point_compare_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_TEST_POINT_SELECT" */
-/* PI CRBP Test Point Select */
-/* ==================================================================== */
-
-typedef union sh_pi_crbp_test_point_select_u {
- mmr_t sh_pi_crbp_test_point_select_regval;
- struct {
- mmr_t nibble0_chiplet_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_chiplet_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_chiplet_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_chiplet_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_chiplet_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_chiplet_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_chiplet_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_chiplet_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t trigger_enable : 1;
- } sh_pi_crbp_test_point_select_s;
-} sh_pi_crbp_test_point_select_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_TEST_POINT_TRIGGER_SELECT" */
-/* PI CRBP Test Point Trigger Select */
-/* ==================================================================== */
-
-typedef union sh_pi_crbp_test_point_trigger_select_u {
- mmr_t sh_pi_crbp_test_point_trigger_select_regval;
- struct {
- mmr_t trigger0_chiplet_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t trigger0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t trigger1_chiplet_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t trigger1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t trigger2_chiplet_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t trigger2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t trigger3_chiplet_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t trigger3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t trigger4_chiplet_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t trigger4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t trigger5_chiplet_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t trigger5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t trigger6_chiplet_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t trigger6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t trigger7_chiplet_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t trigger7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_pi_crbp_test_point_trigger_select_s;
-} sh_pi_crbp_test_point_trigger_select_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_XB_PIPE_COMPARE_0" */
-/* CRBP XB Pipe Compare */
-/* ==================================================================== */
-
-typedef union sh_pi_crbp_xb_pipe_compare_0_u {
- mmr_t sh_pi_crbp_xb_pipe_compare_0_regval;
- struct {
- mmr_t compare_address : 47;
- mmr_t compare_command : 8;
- mmr_t reserved_0 : 9;
- } sh_pi_crbp_xb_pipe_compare_0_s;
-} sh_pi_crbp_xb_pipe_compare_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_XB_PIPE_COMPARE_1" */
-/* CRBP XB Pipe Compare */
-/* ==================================================================== */
-
-typedef union sh_pi_crbp_xb_pipe_compare_1_u {
- mmr_t sh_pi_crbp_xb_pipe_compare_1_regval;
- struct {
- mmr_t compare_source : 14;
- mmr_t reserved_0 : 2;
- mmr_t compare_supplemental : 14;
- mmr_t reserved_1 : 2;
- mmr_t compare_echo : 9;
- mmr_t reserved_2 : 23;
- } sh_pi_crbp_xb_pipe_compare_1_s;
-} sh_pi_crbp_xb_pipe_compare_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_XB_PIPE_MASK_0" */
-/* CRBP Compare Mask Register 1 */
-/* ==================================================================== */
-
-typedef union sh_pi_crbp_xb_pipe_mask_0_u {
- mmr_t sh_pi_crbp_xb_pipe_mask_0_regval;
- struct {
- mmr_t compare_address_mask : 47;
- mmr_t compare_command_mask : 8;
- mmr_t reserved_0 : 9;
- } sh_pi_crbp_xb_pipe_mask_0_s;
-} sh_pi_crbp_xb_pipe_mask_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_XB_PIPE_MASK_1" */
-/* CRBP XB Pipe Compare Mask Register 1 */
-/* ==================================================================== */
-
-typedef union sh_pi_crbp_xb_pipe_mask_1_u {
- mmr_t sh_pi_crbp_xb_pipe_mask_1_regval;
- struct {
- mmr_t compare_source_mask : 14;
- mmr_t reserved_0 : 2;
- mmr_t compare_supplemental_mask : 14;
- mmr_t reserved_1 : 2;
- mmr_t compare_echo_mask : 9;
- mmr_t reserved_2 : 23;
- } sh_pi_crbp_xb_pipe_mask_1_s;
-} sh_pi_crbp_xb_pipe_mask_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_DPC_QUEUE_CONFIG" */
-/* DPC Queue Configuration */
-/* ==================================================================== */
-
-typedef union sh_pi_dpc_queue_config_u {
- mmr_t sh_pi_dpc_queue_config_regval;
- struct {
- mmr_t dwcq_ae_level : 5;
- mmr_t reserved_0 : 3;
- mmr_t dwcq_af_thresh : 5;
- mmr_t reserved_1 : 3;
- mmr_t fwcq_ae_level : 5;
- mmr_t reserved_2 : 3;
- mmr_t fwcq_af_thresh : 5;
- mmr_t reserved_3 : 35;
- } sh_pi_dpc_queue_config_s;
-} sh_pi_dpc_queue_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_MASK" */
-/* PI Error Mask */
-/* ==================================================================== */
-
-typedef union sh_pi_error_mask_u {
- mmr_t sh_pi_error_mask_regval;
- struct {
- mmr_t fsb_proto_err : 1;
- mmr_t gfx_rp_err : 1;
- mmr_t xb_proto_err : 1;
- mmr_t mem_rp_err : 1;
- mmr_t pio_rp_err : 1;
- mmr_t mem_to_err : 1;
- mmr_t pio_to_err : 1;
- mmr_t fsb_shub_uce : 1;
- mmr_t fsb_shub_ce : 1;
- mmr_t msg_color_err : 1;
- mmr_t md_rq_q_oflow : 1;
- mmr_t md_rp_q_oflow : 1;
- mmr_t xn_rq_q_oflow : 1;
- mmr_t xn_rp_q_oflow : 1;
- mmr_t nack_oflow : 1;
- mmr_t gfx_int_0 : 1;
- mmr_t gfx_int_1 : 1;
- mmr_t md_rq_crd_oflow : 1;
- mmr_t md_rp_crd_oflow : 1;
- mmr_t xn_rq_crd_oflow : 1;
- mmr_t xn_rp_crd_oflow : 1;
- mmr_t hung_bus : 1;
- mmr_t rsp_parity : 1;
- mmr_t ioq_overrun : 1;
- mmr_t req_format : 1;
- mmr_t addr_access : 1;
- mmr_t req_parity : 1;
- mmr_t addr_parity : 1;
- mmr_t shub_fsb_dqe : 1;
- mmr_t shub_fsb_uce : 1;
- mmr_t shub_fsb_ce : 1;
- mmr_t livelock : 1;
- mmr_t bad_snoop : 1;
- mmr_t fsb_tbl_miss : 1;
- mmr_t msg_length : 1;
- mmr_t reserved_0 : 29;
- } sh_pi_error_mask_s;
-} sh_pi_error_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_EXPRESS_REPLY_CONFIG" */
-/* PI Express Reply Configuration */
-/* ==================================================================== */
-
-typedef union sh_pi_express_reply_config_u {
- mmr_t sh_pi_express_reply_config_regval;
- struct {
- mmr_t mode : 3;
- mmr_t reserved_0 : 61;
- } sh_pi_express_reply_config_s;
-} sh_pi_express_reply_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_FSB_COMPARE_VALUE" */
-/* FSB Compare Value */
-/* ==================================================================== */
-
-typedef union sh_pi_fsb_compare_value_u {
- mmr_t sh_pi_fsb_compare_value_regval;
- struct {
- mmr_t compare_value : 64;
- } sh_pi_fsb_compare_value_s;
-} sh_pi_fsb_compare_value_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_FSB_COMPARE_MASK" */
-/* FSB Compare Mask */
-/* ==================================================================== */
-
-typedef union sh_pi_fsb_compare_mask_u {
- mmr_t sh_pi_fsb_compare_mask_regval;
- struct {
- mmr_t mask_value : 64;
- } sh_pi_fsb_compare_mask_s;
-} sh_pi_fsb_compare_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_FSB_ERROR_INJECTION" */
-/* Inject an Error onto the FSB */
-/* ==================================================================== */
-
-typedef union sh_pi_fsb_error_injection_u {
- mmr_t sh_pi_fsb_error_injection_regval;
- struct {
- mmr_t rp_pe_to_fsb : 1;
- mmr_t ap0_pe_to_fsb : 1;
- mmr_t ap1_pe_to_fsb : 1;
- mmr_t rsp_pe_to_fsb : 1;
- mmr_t dw0_ce_to_fsb : 1;
- mmr_t dw0_uce_to_fsb : 1;
- mmr_t dw1_ce_to_fsb : 1;
- mmr_t dw1_uce_to_fsb : 1;
- mmr_t ip0_pe_to_fsb : 1;
- mmr_t ip1_pe_to_fsb : 1;
- mmr_t reserved_0 : 6;
- mmr_t rp_pe_from_fsb : 1;
- mmr_t ap0_pe_from_fsb : 1;
- mmr_t ap1_pe_from_fsb : 1;
- mmr_t rsp_pe_from_fsb : 1;
- mmr_t dw0_ce_from_fsb : 1;
- mmr_t dw0_uce_from_fsb : 1;
- mmr_t dw1_ce_from_fsb : 1;
- mmr_t dw1_uce_from_fsb : 1;
- mmr_t dw2_ce_from_fsb : 1;
- mmr_t dw2_uce_from_fsb : 1;
- mmr_t dw3_ce_from_fsb : 1;
- mmr_t dw3_uce_from_fsb : 1;
- mmr_t reserved_1 : 4;
- mmr_t ioq_overrun : 1;
- mmr_t livelock : 1;
- mmr_t bus_hang : 1;
- mmr_t reserved_2 : 29;
- } sh_pi_fsb_error_injection_s;
-} sh_pi_fsb_error_injection_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_MD2PI_REPLY_VC_CONFIG" */
-/* MD-to-PI Reply Virtual Channel Configuration */
-/* ==================================================================== */
-
-typedef union sh_pi_md2pi_reply_vc_config_u {
- mmr_t sh_pi_md2pi_reply_vc_config_regval;
- struct {
- mmr_t hdr_depth : 4;
- mmr_t data_depth : 4;
- mmr_t max_credits : 6;
- mmr_t reserved_0 : 48;
- mmr_t force_credit : 1;
- mmr_t capture_credit_status : 1;
- } sh_pi_md2pi_reply_vc_config_s;
-} sh_pi_md2pi_reply_vc_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_MD2PI_REQUEST_VC_CONFIG" */
-/* MD-to-PI Request Virtual Channel Configuration */
-/* ==================================================================== */
-
-typedef union sh_pi_md2pi_request_vc_config_u {
- mmr_t sh_pi_md2pi_request_vc_config_regval;
- struct {
- mmr_t hdr_depth : 4;
- mmr_t data_depth : 4;
- mmr_t max_credits : 6;
- mmr_t reserved_0 : 48;
- mmr_t force_credit : 1;
- mmr_t capture_credit_status : 1;
- } sh_pi_md2pi_request_vc_config_s;
-} sh_pi_md2pi_request_vc_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_QUEUE_ERROR_INJECTION" */
-/* PI Queue Error Injection */
-/* ==================================================================== */
-
-typedef union sh_pi_queue_error_injection_u {
- mmr_t sh_pi_queue_error_injection_regval;
- struct {
- mmr_t dat_dfr_q : 1;
- mmr_t dxb_wtl_cmnd_q : 1;
- mmr_t fsb_wtl_cmnd_q : 1;
- mmr_t mdpi_rpy_bfr : 1;
- mmr_t ptc_intr : 1;
- mmr_t rxl_kill_q : 1;
- mmr_t rxl_rdy_q : 1;
- mmr_t xnpi_rpy_bfr : 1;
- mmr_t reserved_0 : 56;
- } sh_pi_queue_error_injection_s;
-} sh_pi_queue_error_injection_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_TEST_POINT_COMPARE" */
-/* PI Test Point Compare */
-/* ==================================================================== */
-
-typedef union sh_pi_test_point_compare_u {
- mmr_t sh_pi_test_point_compare_regval;
- struct {
- mmr_t compare_mask : 32;
- mmr_t compare_pattern : 32;
- } sh_pi_test_point_compare_s;
-} sh_pi_test_point_compare_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_TEST_POINT_SELECT" */
-/* PI Test Point Select */
-/* ==================================================================== */
-
-typedef union sh_pi_test_point_select_u {
- mmr_t sh_pi_test_point_select_regval;
- struct {
- mmr_t nibble0_chiplet_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_chiplet_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_chiplet_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_chiplet_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_chiplet_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_chiplet_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_chiplet_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_chiplet_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t trigger_enable : 1;
- } sh_pi_test_point_select_s;
-} sh_pi_test_point_select_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_TEST_POINT_TRIGGER_SELECT" */
-/* PI Test Point Trigger Select */
-/* ==================================================================== */
-
-typedef union sh_pi_test_point_trigger_select_u {
- mmr_t sh_pi_test_point_trigger_select_regval;
- struct {
- mmr_t trigger0_chiplet_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t trigger0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t trigger1_chiplet_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t trigger1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t trigger2_chiplet_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t trigger2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t trigger3_chiplet_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t trigger3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t trigger4_chiplet_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t trigger4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t trigger5_chiplet_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t trigger5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t trigger6_chiplet_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t trigger6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t trigger7_chiplet_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t trigger7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_pi_test_point_trigger_select_s;
-} sh_pi_test_point_trigger_select_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_XN2PI_REPLY_VC_CONFIG" */
-/* XN-to-PI Reply Virtual Channel Configuration */
-/* ==================================================================== */
-
-typedef union sh_pi_xn2pi_reply_vc_config_u {
- mmr_t sh_pi_xn2pi_reply_vc_config_regval;
- struct {
- mmr_t hdr_depth : 4;
- mmr_t data_depth : 4;
- mmr_t max_credits : 6;
- mmr_t reserved_0 : 48;
- mmr_t force_credit : 1;
- mmr_t capture_credit_status : 1;
- } sh_pi_xn2pi_reply_vc_config_s;
-} sh_pi_xn2pi_reply_vc_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_XN2PI_REQUEST_VC_CONFIG" */
-/* XN-to-PI Request Virtual Channel Configuration */
-/* ==================================================================== */
-
-typedef union sh_pi_xn2pi_request_vc_config_u {
- mmr_t sh_pi_xn2pi_request_vc_config_regval;
- struct {
- mmr_t hdr_depth : 4;
- mmr_t data_depth : 4;
- mmr_t max_credits : 6;
- mmr_t reserved_0 : 48;
- mmr_t force_credit : 1;
- mmr_t capture_credit_status : 1;
- } sh_pi_xn2pi_request_vc_config_s;
-} sh_pi_xn2pi_request_vc_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_AEC_STATUS" */
-/* PI Adaptive Error Correction Status */
-/* ==================================================================== */
-
-typedef union sh_pi_aec_status_u {
- mmr_t sh_pi_aec_status_regval;
- struct {
- mmr_t state : 3;
- mmr_t reserved_0 : 61;
- } sh_pi_aec_status_s;
-} sh_pi_aec_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_AFI_FIRST_ERROR" */
-/* PI AFI First Error */
-/* ==================================================================== */
-
-typedef union sh_pi_afi_first_error_u {
- mmr_t sh_pi_afi_first_error_regval;
- struct {
- mmr_t reserved_0 : 7;
- mmr_t fsb_shub_uce : 1;
- mmr_t fsb_shub_ce : 1;
- mmr_t reserved_1 : 12;
- mmr_t hung_bus : 1;
- mmr_t rsp_parity : 1;
- mmr_t ioq_overrun : 1;
- mmr_t req_format : 1;
- mmr_t addr_access : 1;
- mmr_t req_parity : 1;
- mmr_t addr_parity : 1;
- mmr_t shub_fsb_dqe : 1;
- mmr_t shub_fsb_uce : 1;
- mmr_t shub_fsb_ce : 1;
- mmr_t livelock : 1;
- mmr_t bad_snoop : 1;
- mmr_t fsb_tbl_miss : 1;
- mmr_t msg_len : 1;
- mmr_t reserved_2 : 29;
- } sh_pi_afi_first_error_s;
-} sh_pi_afi_first_error_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CAM_ADDRESS_READ_DATA" */
-/* CRB CAM MMR Address Read Data */
-/* ==================================================================== */
-
-typedef union sh_pi_cam_address_read_data_u {
- mmr_t sh_pi_cam_address_read_data_regval;
- struct {
- mmr_t cam_addr : 48;
- mmr_t reserved_0 : 15;
- mmr_t cam_addr_val : 1;
- } sh_pi_cam_address_read_data_s;
-} sh_pi_cam_address_read_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CAM_LPRA_READ_DATA" */
-/* CRB CAM MMR LPRA Read Data */
-/* ==================================================================== */
-
-typedef union sh_pi_cam_lpra_read_data_u {
- mmr_t sh_pi_cam_lpra_read_data_regval;
- struct {
- mmr_t cam_lpra : 64;
- } sh_pi_cam_lpra_read_data_s;
-} sh_pi_cam_lpra_read_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CAM_STATE_READ_DATA" */
-/* CRB CAM MMR State Read Data */
-/* ==================================================================== */
-
-typedef union sh_pi_cam_state_read_data_u {
- mmr_t sh_pi_cam_state_read_data_regval;
- struct {
- mmr_t cam_state : 4;
- mmr_t cam_to : 1;
- mmr_t cam_state_rd_pend : 1;
- mmr_t reserved_0 : 26;
- mmr_t cam_lpra : 18;
- mmr_t reserved_1 : 13;
- mmr_t cam_rd_data_val : 1;
- } sh_pi_cam_state_read_data_s;
-} sh_pi_cam_state_read_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CORRECTED_DETAIL_1" */
-/* PI Corrected Error Detail */
-/* ==================================================================== */
-
-typedef union sh_pi_corrected_detail_1_u {
- mmr_t sh_pi_corrected_detail_1_regval;
- struct {
- mmr_t address : 48;
- mmr_t syndrome : 8;
- mmr_t dep : 8;
- } sh_pi_corrected_detail_1_s;
-} sh_pi_corrected_detail_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CORRECTED_DETAIL_2" */
-/* PI Corrected Error Detail 2 */
-/* ==================================================================== */
-
-typedef union sh_pi_corrected_detail_2_u {
- mmr_t sh_pi_corrected_detail_2_regval;
- struct {
- mmr_t data : 64;
- } sh_pi_corrected_detail_2_s;
-} sh_pi_corrected_detail_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CORRECTED_DETAIL_3" */
-/* PI Corrected Error Detail 3 */
-/* ==================================================================== */
-
-typedef union sh_pi_corrected_detail_3_u {
- mmr_t sh_pi_corrected_detail_3_regval;
- struct {
- mmr_t address : 48;
- mmr_t syndrome : 8;
- mmr_t dep : 8;
- } sh_pi_corrected_detail_3_s;
-} sh_pi_corrected_detail_3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CORRECTED_DETAIL_4" */
-/* PI Corrected Error Detail 4 */
-/* ==================================================================== */
-
-typedef union sh_pi_corrected_detail_4_u {
- mmr_t sh_pi_corrected_detail_4_regval;
- struct {
- mmr_t data : 64;
- } sh_pi_corrected_detail_4_s;
-} sh_pi_corrected_detail_4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_CRBP_FIRST_ERROR" */
-/* PI CRBP First Error */
-/* ==================================================================== */
-
-typedef union sh_pi_crbp_first_error_u {
- mmr_t sh_pi_crbp_first_error_regval;
- struct {
- mmr_t fsb_proto_err : 1;
- mmr_t gfx_rp_err : 1;
- mmr_t xb_proto_err : 1;
- mmr_t mem_rp_err : 1;
- mmr_t pio_rp_err : 1;
- mmr_t mem_to_err : 1;
- mmr_t pio_to_err : 1;
- mmr_t fsb_shub_uce : 1;
- mmr_t fsb_shub_ce : 1;
- mmr_t msg_color_err : 1;
- mmr_t md_rq_q_oflow : 1;
- mmr_t md_rp_q_oflow : 1;
- mmr_t xn_rq_q_oflow : 1;
- mmr_t xn_rp_q_oflow : 1;
- mmr_t nack_oflow : 1;
- mmr_t gfx_int_0 : 1;
- mmr_t gfx_int_1 : 1;
- mmr_t md_rq_crd_oflow : 1;
- mmr_t md_rp_crd_oflow : 1;
- mmr_t xn_rq_crd_oflow : 1;
- mmr_t xn_rp_crd_oflow : 1;
- mmr_t reserved_0 : 43;
- } sh_pi_crbp_first_error_s;
-} sh_pi_crbp_first_error_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_DETAIL_1" */
-/* PI Error Detail 1 */
-/* ==================================================================== */
-
-typedef union sh_pi_error_detail_1_u {
- mmr_t sh_pi_error_detail_1_regval;
- struct {
- mmr_t status : 64;
- } sh_pi_error_detail_1_s;
-} sh_pi_error_detail_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_DETAIL_2" */
-/* PI Error Detail 2 */
-/* ==================================================================== */
-
-typedef union sh_pi_error_detail_2_u {
- mmr_t sh_pi_error_detail_2_regval;
- struct {
- mmr_t status : 64;
- } sh_pi_error_detail_2_s;
-} sh_pi_error_detail_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_OVERFLOW" */
-/* PI Error Overflow */
-/* ==================================================================== */
-
-typedef union sh_pi_error_overflow_u {
- mmr_t sh_pi_error_overflow_regval;
- struct {
- mmr_t fsb_proto_err : 1;
- mmr_t gfx_rp_err : 1;
- mmr_t xb_proto_err : 1;
- mmr_t mem_rp_err : 1;
- mmr_t pio_rp_err : 1;
- mmr_t mem_to_err : 1;
- mmr_t pio_to_err : 1;
- mmr_t fsb_shub_uce : 1;
- mmr_t fsb_shub_ce : 1;
- mmr_t msg_color_err : 1;
- mmr_t md_rq_q_oflow : 1;
- mmr_t md_rp_q_oflow : 1;
- mmr_t xn_rq_q_oflow : 1;
- mmr_t xn_rp_q_oflow : 1;
- mmr_t nack_oflow : 1;
- mmr_t gfx_int_0 : 1;
- mmr_t gfx_int_1 : 1;
- mmr_t md_rq_crd_oflow : 1;
- mmr_t md_rp_crd_oflow : 1;
- mmr_t xn_rq_crd_oflow : 1;
- mmr_t xn_rp_crd_oflow : 1;
- mmr_t hung_bus : 1;
- mmr_t rsp_parity : 1;
- mmr_t ioq_overrun : 1;
- mmr_t req_format : 1;
- mmr_t addr_access : 1;
- mmr_t req_parity : 1;
- mmr_t addr_parity : 1;
- mmr_t shub_fsb_dqe : 1;
- mmr_t shub_fsb_uce : 1;
- mmr_t shub_fsb_ce : 1;
- mmr_t livelock : 1;
- mmr_t bad_snoop : 1;
- mmr_t fsb_tbl_miss : 1;
- mmr_t msg_length : 1;
- mmr_t reserved_0 : 29;
- } sh_pi_error_overflow_s;
-} sh_pi_error_overflow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_ERROR_SUMMARY" */
-/* PI Error Summary */
-/* ==================================================================== */
-
-typedef union sh_pi_error_summary_u {
- mmr_t sh_pi_error_summary_regval;
- struct {
- mmr_t fsb_proto_err : 1;
- mmr_t gfx_rp_err : 1;
- mmr_t xb_proto_err : 1;
- mmr_t mem_rp_err : 1;
- mmr_t pio_rp_err : 1;
- mmr_t mem_to_err : 1;
- mmr_t pio_to_err : 1;
- mmr_t fsb_shub_uce : 1;
- mmr_t fsb_shub_ce : 1;
- mmr_t msg_color_err : 1;
- mmr_t md_rq_q_oflow : 1;
- mmr_t md_rp_q_oflow : 1;
- mmr_t xn_rq_q_oflow : 1;
- mmr_t xn_rp_q_oflow : 1;
- mmr_t nack_oflow : 1;
- mmr_t gfx_int_0 : 1;
- mmr_t gfx_int_1 : 1;
- mmr_t md_rq_crd_oflow : 1;
- mmr_t md_rp_crd_oflow : 1;
- mmr_t xn_rq_crd_oflow : 1;
- mmr_t xn_rp_crd_oflow : 1;
- mmr_t hung_bus : 1;
- mmr_t rsp_parity : 1;
- mmr_t ioq_overrun : 1;
- mmr_t req_format : 1;
- mmr_t addr_access : 1;
- mmr_t req_parity : 1;
- mmr_t addr_parity : 1;
- mmr_t shub_fsb_dqe : 1;
- mmr_t shub_fsb_uce : 1;
- mmr_t shub_fsb_ce : 1;
- mmr_t livelock : 1;
- mmr_t bad_snoop : 1;
- mmr_t fsb_tbl_miss : 1;
- mmr_t msg_length : 1;
- mmr_t reserved_0 : 29;
- } sh_pi_error_summary_s;
-} sh_pi_error_summary_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_EXPRESS_REPLY_STATUS" */
-/* PI Express Reply Status */
-/* ==================================================================== */
-
-typedef union sh_pi_express_reply_status_u {
- mmr_t sh_pi_express_reply_status_regval;
- struct {
- mmr_t state : 3;
- mmr_t reserved_0 : 61;
- } sh_pi_express_reply_status_s;
-} sh_pi_express_reply_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_FIRST_ERROR" */
-/* PI First Error */
-/* ==================================================================== */
-
-typedef union sh_pi_first_error_u {
- mmr_t sh_pi_first_error_regval;
- struct {
- mmr_t fsb_proto_err : 1;
- mmr_t gfx_rp_err : 1;
- mmr_t xb_proto_err : 1;
- mmr_t mem_rp_err : 1;
- mmr_t pio_rp_err : 1;
- mmr_t mem_to_err : 1;
- mmr_t pio_to_err : 1;
- mmr_t fsb_shub_uce : 1;
- mmr_t fsb_shub_ce : 1;
- mmr_t msg_color_err : 1;
- mmr_t md_rq_q_oflow : 1;
- mmr_t md_rp_q_oflow : 1;
- mmr_t xn_rq_q_oflow : 1;
- mmr_t xn_rp_q_oflow : 1;
- mmr_t nack_oflow : 1;
- mmr_t gfx_int_0 : 1;
- mmr_t gfx_int_1 : 1;
- mmr_t md_rq_crd_oflow : 1;
- mmr_t md_rp_crd_oflow : 1;
- mmr_t xn_rq_crd_oflow : 1;
- mmr_t xn_rp_crd_oflow : 1;
- mmr_t hung_bus : 1;
- mmr_t rsp_parity : 1;
- mmr_t ioq_overrun : 1;
- mmr_t req_format : 1;
- mmr_t addr_access : 1;
- mmr_t req_parity : 1;
- mmr_t addr_parity : 1;
- mmr_t shub_fsb_dqe : 1;
- mmr_t shub_fsb_uce : 1;
- mmr_t shub_fsb_ce : 1;
- mmr_t livelock : 1;
- mmr_t bad_snoop : 1;
- mmr_t fsb_tbl_miss : 1;
- mmr_t msg_length : 1;
- mmr_t reserved_0 : 29;
- } sh_pi_first_error_s;
-} sh_pi_first_error_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_PI2MD_REPLY_VC_STATUS" */
-/* PI-to-MD Reply Virtual Channel Status */
-/* ==================================================================== */
-
-typedef union sh_pi_pi2md_reply_vc_status_u {
- mmr_t sh_pi_pi2md_reply_vc_status_regval;
- struct {
- mmr_t output_crd_stat : 6;
- mmr_t reserved_0 : 58;
- } sh_pi_pi2md_reply_vc_status_s;
-} sh_pi_pi2md_reply_vc_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_PI2MD_REQUEST_VC_STATUS" */
-/* PI-to-MD Request Virtual Channel Status */
-/* ==================================================================== */
-
-typedef union sh_pi_pi2md_request_vc_status_u {
- mmr_t sh_pi_pi2md_request_vc_status_regval;
- struct {
- mmr_t output_crd_stat : 6;
- mmr_t reserved_0 : 58;
- } sh_pi_pi2md_request_vc_status_s;
-} sh_pi_pi2md_request_vc_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_PI2XN_REPLY_VC_STATUS" */
-/* PI-to-XN Reply Virtual Channel Status */
-/* ==================================================================== */
-
-typedef union sh_pi_pi2xn_reply_vc_status_u {
- mmr_t sh_pi_pi2xn_reply_vc_status_regval;
- struct {
- mmr_t output_crd_stat : 6;
- mmr_t reserved_0 : 58;
- } sh_pi_pi2xn_reply_vc_status_s;
-} sh_pi_pi2xn_reply_vc_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_PI2XN_REQUEST_VC_STATUS" */
-/* PI-to-XN Request Virtual Channel Status */
-/* ==================================================================== */
-
-typedef union sh_pi_pi2xn_request_vc_status_u {
- mmr_t sh_pi_pi2xn_request_vc_status_regval;
- struct {
- mmr_t output_crd_stat : 6;
- mmr_t reserved_0 : 58;
- } sh_pi_pi2xn_request_vc_status_s;
-} sh_pi_pi2xn_request_vc_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_UNCORRECTED_DETAIL_1" */
-/* PI Uncorrected Error Detail 1 */
-/* ==================================================================== */
-
-typedef union sh_pi_uncorrected_detail_1_u {
- mmr_t sh_pi_uncorrected_detail_1_regval;
- struct {
- mmr_t address : 48;
- mmr_t syndrome : 8;
- mmr_t dep : 8;
- } sh_pi_uncorrected_detail_1_s;
-} sh_pi_uncorrected_detail_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_UNCORRECTED_DETAIL_2" */
-/* PI Uncorrected Error Detail 2 */
-/* ==================================================================== */
-
-typedef union sh_pi_uncorrected_detail_2_u {
- mmr_t sh_pi_uncorrected_detail_2_regval;
- struct {
- mmr_t data : 64;
- } sh_pi_uncorrected_detail_2_s;
-} sh_pi_uncorrected_detail_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_UNCORRECTED_DETAIL_3" */
-/* PI Uncorrected Error Detail 3 */
-/* ==================================================================== */
-
-typedef union sh_pi_uncorrected_detail_3_u {
- mmr_t sh_pi_uncorrected_detail_3_regval;
- struct {
- mmr_t address : 48;
- mmr_t syndrome : 8;
- mmr_t dep : 8;
- } sh_pi_uncorrected_detail_3_s;
-} sh_pi_uncorrected_detail_3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_UNCORRECTED_DETAIL_4" */
-/* PI Uncorrected Error Detail 4 */
-/* ==================================================================== */
-
-typedef union sh_pi_uncorrected_detail_4_u {
- mmr_t sh_pi_uncorrected_detail_4_regval;
- struct {
- mmr_t data : 64;
- } sh_pi_uncorrected_detail_4_s;
-} sh_pi_uncorrected_detail_4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_MD2PI_REPLY_VC_STATUS" */
-/* MD-to-PI Reply Virtual Channel Status */
-/* ==================================================================== */
-
-typedef union sh_pi_md2pi_reply_vc_status_u {
- mmr_t sh_pi_md2pi_reply_vc_status_regval;
- struct {
- mmr_t input_hdr_crd_stat : 4;
- mmr_t input_dat_crd_stat : 4;
- mmr_t input_queue_stat : 4;
- mmr_t reserved_0 : 52;
- } sh_pi_md2pi_reply_vc_status_s;
-} sh_pi_md2pi_reply_vc_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_MD2PI_REQUEST_VC_STATUS" */
-/* MD-to-PI Request Virtual Channel Status */
-/* ==================================================================== */
-
-typedef union sh_pi_md2pi_request_vc_status_u {
- mmr_t sh_pi_md2pi_request_vc_status_regval;
- struct {
- mmr_t input_hdr_crd_stat : 4;
- mmr_t input_dat_crd_stat : 4;
- mmr_t input_queue_stat : 4;
- mmr_t reserved_0 : 52;
- } sh_pi_md2pi_request_vc_status_s;
-} sh_pi_md2pi_request_vc_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_XN2PI_REPLY_VC_STATUS" */
-/* XN-to-PI Reply Virtual Channel Status */
-/* ==================================================================== */
-
-typedef union sh_pi_xn2pi_reply_vc_status_u {
- mmr_t sh_pi_xn2pi_reply_vc_status_regval;
- struct {
- mmr_t input_hdr_crd_stat : 4;
- mmr_t input_dat_crd_stat : 4;
- mmr_t input_queue_stat : 4;
- mmr_t reserved_0 : 52;
- } sh_pi_xn2pi_reply_vc_status_s;
-} sh_pi_xn2pi_reply_vc_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_XN2PI_REQUEST_VC_STATUS" */
-/* XN-to-PI Request Virtual Channel Status */
-/* ==================================================================== */
-
-typedef union sh_pi_xn2pi_request_vc_status_u {
- mmr_t sh_pi_xn2pi_request_vc_status_regval;
- struct {
- mmr_t input_hdr_crd_stat : 4;
- mmr_t input_dat_crd_stat : 4;
- mmr_t input_queue_stat : 4;
- mmr_t reserved_0 : 52;
- } sh_pi_xn2pi_request_vc_status_s;
-} sh_pi_xn2pi_request_vc_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_SIC_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_sic_flow_u {
- mmr_t sh_xnpi_sic_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 5;
- mmr_t reserved_0 : 2;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 5;
- mmr_t reserved_1 : 2;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t credit_vc0_test : 5;
- mmr_t reserved_2 : 3;
- mmr_t credit_vc0_dyn : 5;
- mmr_t reserved_3 : 3;
- mmr_t credit_vc0_cap : 5;
- mmr_t reserved_4 : 3;
- mmr_t credit_vc2_test : 5;
- mmr_t reserved_5 : 3;
- mmr_t credit_vc2_dyn : 5;
- mmr_t reserved_6 : 3;
- mmr_t credit_vc2_cap : 5;
- mmr_t reserved_7 : 2;
- mmr_t disable_bypass_out : 1;
- } sh_xnpi_sic_flow_s;
-} sh_xnpi_sic_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_TO_NI0_PORT_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_to_ni0_port_flow_u {
- mmr_t sh_xnpi_to_ni0_port_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t credit_vc0_dyn : 6;
- mmr_t reserved_3 : 2;
- mmr_t credit_vc0_cap : 6;
- mmr_t reserved_4 : 10;
- mmr_t credit_vc2_dyn : 6;
- mmr_t reserved_5 : 2;
- mmr_t credit_vc2_cap : 6;
- mmr_t reserved_6 : 2;
- } sh_xnpi_to_ni0_port_flow_s;
-} sh_xnpi_to_ni0_port_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_TO_NI1_PORT_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_to_ni1_port_flow_u {
- mmr_t sh_xnpi_to_ni1_port_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t credit_vc0_dyn : 6;
- mmr_t reserved_3 : 2;
- mmr_t credit_vc0_cap : 6;
- mmr_t reserved_4 : 10;
- mmr_t credit_vc2_dyn : 6;
- mmr_t reserved_5 : 2;
- mmr_t credit_vc2_cap : 6;
- mmr_t reserved_6 : 2;
- } sh_xnpi_to_ni1_port_flow_s;
-} sh_xnpi_to_ni1_port_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_TO_IILB_PORT_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_to_iilb_port_flow_u {
- mmr_t sh_xnpi_to_iilb_port_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t credit_vc0_dyn : 6;
- mmr_t reserved_3 : 2;
- mmr_t credit_vc0_cap : 6;
- mmr_t reserved_4 : 10;
- mmr_t credit_vc2_dyn : 6;
- mmr_t reserved_5 : 2;
- mmr_t credit_vc2_cap : 6;
- mmr_t reserved_6 : 2;
- } sh_xnpi_to_iilb_port_flow_s;
-} sh_xnpi_to_iilb_port_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_FR_NI0_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_fr_ni0_port_flow_fifo_u {
- mmr_t sh_xnpi_fr_ni0_port_flow_fifo_regval;
- struct {
- mmr_t entry_vc0_dyn : 6;
- mmr_t reserved_0 : 2;
- mmr_t entry_vc0_cap : 6;
- mmr_t reserved_1 : 2;
- mmr_t entry_vc2_dyn : 6;
- mmr_t reserved_2 : 2;
- mmr_t entry_vc2_cap : 6;
- mmr_t reserved_3 : 2;
- mmr_t entry_vc0_test : 5;
- mmr_t reserved_4 : 3;
- mmr_t entry_vc2_test : 5;
- mmr_t reserved_5 : 19;
- } sh_xnpi_fr_ni0_port_flow_fifo_s;
-} sh_xnpi_fr_ni0_port_flow_fifo_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_FR_NI1_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_fr_ni1_port_flow_fifo_u {
- mmr_t sh_xnpi_fr_ni1_port_flow_fifo_regval;
- struct {
- mmr_t entry_vc0_dyn : 6;
- mmr_t reserved_0 : 2;
- mmr_t entry_vc0_cap : 6;
- mmr_t reserved_1 : 2;
- mmr_t entry_vc2_dyn : 6;
- mmr_t reserved_2 : 2;
- mmr_t entry_vc2_cap : 6;
- mmr_t reserved_3 : 2;
- mmr_t entry_vc0_test : 5;
- mmr_t reserved_4 : 3;
- mmr_t entry_vc2_test : 5;
- mmr_t reserved_5 : 19;
- } sh_xnpi_fr_ni1_port_flow_fifo_s;
-} sh_xnpi_fr_ni1_port_flow_fifo_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_FR_IILB_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_fr_iilb_port_flow_fifo_u {
- mmr_t sh_xnpi_fr_iilb_port_flow_fifo_regval;
- struct {
- mmr_t entry_vc0_dyn : 6;
- mmr_t reserved_0 : 2;
- mmr_t entry_vc0_cap : 6;
- mmr_t reserved_1 : 2;
- mmr_t entry_vc2_dyn : 6;
- mmr_t reserved_2 : 2;
- mmr_t entry_vc2_cap : 6;
- mmr_t reserved_3 : 2;
- mmr_t entry_vc0_test : 5;
- mmr_t reserved_4 : 3;
- mmr_t entry_vc2_test : 5;
- mmr_t reserved_5 : 19;
- } sh_xnpi_fr_iilb_port_flow_fifo_s;
-} sh_xnpi_fr_iilb_port_flow_fifo_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_SIC_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_sic_flow_u {
- mmr_t sh_xnmd_sic_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 5;
- mmr_t reserved_0 : 2;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 5;
- mmr_t reserved_1 : 2;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t credit_vc0_test : 5;
- mmr_t reserved_2 : 3;
- mmr_t credit_vc0_dyn : 5;
- mmr_t reserved_3 : 3;
- mmr_t credit_vc0_cap : 5;
- mmr_t reserved_4 : 3;
- mmr_t credit_vc2_test : 5;
- mmr_t reserved_5 : 3;
- mmr_t credit_vc2_dyn : 5;
- mmr_t reserved_6 : 3;
- mmr_t credit_vc2_cap : 5;
- mmr_t reserved_7 : 2;
- mmr_t disable_bypass_out : 1;
- } sh_xnmd_sic_flow_s;
-} sh_xnmd_sic_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_TO_NI0_PORT_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_to_ni0_port_flow_u {
- mmr_t sh_xnmd_to_ni0_port_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t credit_vc0_dyn : 6;
- mmr_t reserved_3 : 2;
- mmr_t credit_vc0_cap : 6;
- mmr_t reserved_4 : 10;
- mmr_t credit_vc2_dyn : 6;
- mmr_t reserved_5 : 2;
- mmr_t credit_vc2_cap : 6;
- mmr_t reserved_6 : 2;
- } sh_xnmd_to_ni0_port_flow_s;
-} sh_xnmd_to_ni0_port_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_TO_NI1_PORT_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_to_ni1_port_flow_u {
- mmr_t sh_xnmd_to_ni1_port_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t credit_vc0_dyn : 6;
- mmr_t reserved_3 : 2;
- mmr_t credit_vc0_cap : 6;
- mmr_t reserved_4 : 10;
- mmr_t credit_vc2_dyn : 6;
- mmr_t reserved_5 : 2;
- mmr_t credit_vc2_cap : 6;
- mmr_t reserved_6 : 2;
- } sh_xnmd_to_ni1_port_flow_s;
-} sh_xnmd_to_ni1_port_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_TO_IILB_PORT_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_to_iilb_port_flow_u {
- mmr_t sh_xnmd_to_iilb_port_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t credit_vc0_dyn : 6;
- mmr_t reserved_3 : 2;
- mmr_t credit_vc0_cap : 6;
- mmr_t reserved_4 : 10;
- mmr_t credit_vc2_dyn : 6;
- mmr_t reserved_5 : 2;
- mmr_t credit_vc2_cap : 6;
- mmr_t reserved_6 : 2;
- } sh_xnmd_to_iilb_port_flow_s;
-} sh_xnmd_to_iilb_port_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_FR_NI0_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_fr_ni0_port_flow_fifo_u {
- mmr_t sh_xnmd_fr_ni0_port_flow_fifo_regval;
- struct {
- mmr_t entry_vc0_dyn : 6;
- mmr_t reserved_0 : 2;
- mmr_t entry_vc0_cap : 6;
- mmr_t reserved_1 : 2;
- mmr_t entry_vc2_dyn : 6;
- mmr_t reserved_2 : 2;
- mmr_t entry_vc2_cap : 6;
- mmr_t reserved_3 : 2;
- mmr_t entry_vc0_test : 5;
- mmr_t reserved_4 : 3;
- mmr_t entry_vc2_test : 5;
- mmr_t reserved_5 : 19;
- } sh_xnmd_fr_ni0_port_flow_fifo_s;
-} sh_xnmd_fr_ni0_port_flow_fifo_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_FR_NI1_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_fr_ni1_port_flow_fifo_u {
- mmr_t sh_xnmd_fr_ni1_port_flow_fifo_regval;
- struct {
- mmr_t entry_vc0_dyn : 6;
- mmr_t reserved_0 : 2;
- mmr_t entry_vc0_cap : 6;
- mmr_t reserved_1 : 2;
- mmr_t entry_vc2_dyn : 6;
- mmr_t reserved_2 : 2;
- mmr_t entry_vc2_cap : 6;
- mmr_t reserved_3 : 2;
- mmr_t entry_vc0_test : 5;
- mmr_t reserved_4 : 3;
- mmr_t entry_vc2_test : 5;
- mmr_t reserved_5 : 19;
- } sh_xnmd_fr_ni1_port_flow_fifo_s;
-} sh_xnmd_fr_ni1_port_flow_fifo_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_FR_IILB_PORT_FLOW_FIFO" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_fr_iilb_port_flow_fifo_u {
- mmr_t sh_xnmd_fr_iilb_port_flow_fifo_regval;
- struct {
- mmr_t entry_vc0_dyn : 6;
- mmr_t reserved_0 : 2;
- mmr_t entry_vc0_cap : 6;
- mmr_t reserved_1 : 2;
- mmr_t entry_vc2_dyn : 6;
- mmr_t reserved_2 : 2;
- mmr_t entry_vc2_cap : 6;
- mmr_t reserved_3 : 2;
- mmr_t entry_vc0_test : 5;
- mmr_t reserved_4 : 3;
- mmr_t entry_vc2_test : 5;
- mmr_t reserved_5 : 19;
- } sh_xnmd_fr_iilb_port_flow_fifo_s;
-} sh_xnmd_fr_iilb_port_flow_fifo_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNII_INTRA_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnii_intra_flow_u {
- mmr_t sh_xnii_intra_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t credit_vc0_test : 7;
- mmr_t reserved_2 : 1;
- mmr_t credit_vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t credit_vc0_cap : 7;
- mmr_t reserved_4 : 1;
- mmr_t credit_vc2_test : 7;
- mmr_t reserved_5 : 1;
- mmr_t credit_vc2_dyn : 7;
- mmr_t reserved_6 : 1;
- mmr_t credit_vc2_cap : 7;
- mmr_t reserved_7 : 1;
- } sh_xnii_intra_flow_s;
-} sh_xnii_intra_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNLB_INTRA_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnlb_intra_flow_u {
- mmr_t sh_xnlb_intra_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t credit_vc0_test : 7;
- mmr_t reserved_2 : 1;
- mmr_t credit_vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t credit_vc0_cap : 7;
- mmr_t reserved_4 : 1;
- mmr_t credit_vc2_test : 7;
- mmr_t reserved_5 : 1;
- mmr_t credit_vc2_dyn : 7;
- mmr_t reserved_6 : 1;
- mmr_t credit_vc2_cap : 7;
- mmr_t disable_bypass_in : 1;
- } sh_xnlb_intra_flow_s;
-} sh_xnlb_intra_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_TO_NI0_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_to_ni0_intra_flow_debit_u {
- mmr_t sh_xniilb_to_ni0_intra_flow_debit_regval;
- struct {
- mmr_t vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t vc0_force_cred : 1;
- mmr_t vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_4 : 9;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_5 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_6 : 1;
- } sh_xniilb_to_ni0_intra_flow_debit_s;
-} sh_xniilb_to_ni0_intra_flow_debit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_TO_NI1_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_to_ni1_intra_flow_debit_u {
- mmr_t sh_xniilb_to_ni1_intra_flow_debit_regval;
- struct {
- mmr_t vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t vc0_force_cred : 1;
- mmr_t vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_4 : 9;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_5 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_6 : 1;
- } sh_xniilb_to_ni1_intra_flow_debit_s;
-} sh_xniilb_to_ni1_intra_flow_debit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_TO_MD_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_to_md_intra_flow_debit_u {
- mmr_t sh_xniilb_to_md_intra_flow_debit_regval;
- struct {
- mmr_t vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t vc0_force_cred : 1;
- mmr_t vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_4 : 9;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_5 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_6 : 1;
- } sh_xniilb_to_md_intra_flow_debit_s;
-} sh_xniilb_to_md_intra_flow_debit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_TO_IILB_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_to_iilb_intra_flow_debit_u {
- mmr_t sh_xniilb_to_iilb_intra_flow_debit_regval;
- struct {
- mmr_t vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t vc0_force_cred : 1;
- mmr_t vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_4 : 9;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_5 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_6 : 1;
- } sh_xniilb_to_iilb_intra_flow_debit_s;
-} sh_xniilb_to_iilb_intra_flow_debit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_TO_PI_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_to_pi_intra_flow_debit_u {
- mmr_t sh_xniilb_to_pi_intra_flow_debit_regval;
- struct {
- mmr_t vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t vc0_force_cred : 1;
- mmr_t vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_4 : 9;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_5 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_6 : 1;
- } sh_xniilb_to_pi_intra_flow_debit_s;
-} sh_xniilb_to_pi_intra_flow_debit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FR_NI0_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_fr_ni0_intra_flow_credit_u {
- mmr_t sh_xniilb_fr_ni0_intra_flow_credit_regval;
- struct {
- mmr_t vc0_test : 7;
- mmr_t reserved_0 : 1;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_1 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_2 : 1;
- mmr_t vc2_test : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_4 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_5 : 17;
- } sh_xniilb_fr_ni0_intra_flow_credit_s;
-} sh_xniilb_fr_ni0_intra_flow_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FR_NI1_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_fr_ni1_intra_flow_credit_u {
- mmr_t sh_xniilb_fr_ni1_intra_flow_credit_regval;
- struct {
- mmr_t vc0_test : 7;
- mmr_t reserved_0 : 1;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_1 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_2 : 1;
- mmr_t vc2_test : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_4 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_5 : 17;
- } sh_xniilb_fr_ni1_intra_flow_credit_s;
-} sh_xniilb_fr_ni1_intra_flow_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FR_MD_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_fr_md_intra_flow_credit_u {
- mmr_t sh_xniilb_fr_md_intra_flow_credit_regval;
- struct {
- mmr_t vc0_test : 7;
- mmr_t reserved_0 : 1;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_1 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_2 : 1;
- mmr_t vc2_test : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_4 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_5 : 17;
- } sh_xniilb_fr_md_intra_flow_credit_s;
-} sh_xniilb_fr_md_intra_flow_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FR_IILB_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_fr_iilb_intra_flow_credit_u {
- mmr_t sh_xniilb_fr_iilb_intra_flow_credit_regval;
- struct {
- mmr_t vc0_test : 7;
- mmr_t reserved_0 : 1;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_1 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_2 : 1;
- mmr_t vc2_test : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_4 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_5 : 17;
- } sh_xniilb_fr_iilb_intra_flow_credit_s;
-} sh_xniilb_fr_iilb_intra_flow_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FR_PI_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_fr_pi_intra_flow_credit_u {
- mmr_t sh_xniilb_fr_pi_intra_flow_credit_regval;
- struct {
- mmr_t vc0_test : 7;
- mmr_t reserved_0 : 1;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_1 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_2 : 1;
- mmr_t vc2_test : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_4 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_5 : 17;
- } sh_xniilb_fr_pi_intra_flow_credit_s;
-} sh_xniilb_fr_pi_intra_flow_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_TO_PI_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_to_pi_intra_flow_debit_u {
- mmr_t sh_xnni0_to_pi_intra_flow_debit_regval;
- struct {
- mmr_t vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t vc0_force_cred : 1;
- mmr_t vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_4 : 9;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_5 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_6 : 1;
- } sh_xnni0_to_pi_intra_flow_debit_s;
-} sh_xnni0_to_pi_intra_flow_debit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_TO_MD_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_to_md_intra_flow_debit_u {
- mmr_t sh_xnni0_to_md_intra_flow_debit_regval;
- struct {
- mmr_t vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t vc0_force_cred : 1;
- mmr_t vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_4 : 9;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_5 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_6 : 1;
- } sh_xnni0_to_md_intra_flow_debit_s;
-} sh_xnni0_to_md_intra_flow_debit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_TO_IILB_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_to_iilb_intra_flow_debit_u {
- mmr_t sh_xnni0_to_iilb_intra_flow_debit_regval;
- struct {
- mmr_t vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t vc0_force_cred : 1;
- mmr_t vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_4 : 9;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_5 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_6 : 1;
- } sh_xnni0_to_iilb_intra_flow_debit_s;
-} sh_xnni0_to_iilb_intra_flow_debit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_FR_PI_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_fr_pi_intra_flow_credit_u {
- mmr_t sh_xnni0_fr_pi_intra_flow_credit_regval;
- struct {
- mmr_t vc0_test : 7;
- mmr_t reserved_0 : 1;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_1 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_2 : 1;
- mmr_t vc2_test : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_4 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_5 : 17;
- } sh_xnni0_fr_pi_intra_flow_credit_s;
-} sh_xnni0_fr_pi_intra_flow_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_FR_MD_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_fr_md_intra_flow_credit_u {
- mmr_t sh_xnni0_fr_md_intra_flow_credit_regval;
- struct {
- mmr_t vc0_test : 7;
- mmr_t reserved_0 : 1;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_1 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_2 : 1;
- mmr_t vc2_test : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_4 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_5 : 17;
- } sh_xnni0_fr_md_intra_flow_credit_s;
-} sh_xnni0_fr_md_intra_flow_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_FR_IILB_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_fr_iilb_intra_flow_credit_u {
- mmr_t sh_xnni0_fr_iilb_intra_flow_credit_regval;
- struct {
- mmr_t vc0_test : 7;
- mmr_t reserved_0 : 1;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_1 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_2 : 1;
- mmr_t vc2_test : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_4 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_5 : 17;
- } sh_xnni0_fr_iilb_intra_flow_credit_s;
-} sh_xnni0_fr_iilb_intra_flow_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_0_INTRANI_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_0_intrani_flow_u {
- mmr_t sh_xnni0_0_intrani_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t reserved_1 : 56;
- } sh_xnni0_0_intrani_flow_s;
-} sh_xnni0_0_intrani_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_1_INTRANI_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_1_intrani_flow_u {
- mmr_t sh_xnni0_1_intrani_flow_regval;
- struct {
- mmr_t debit_vc1_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc1_force_cred : 1;
- mmr_t reserved_1 : 56;
- } sh_xnni0_1_intrani_flow_s;
-} sh_xnni0_1_intrani_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_2_INTRANI_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_2_intrani_flow_u {
- mmr_t sh_xnni0_2_intrani_flow_regval;
- struct {
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_1 : 56;
- } sh_xnni0_2_intrani_flow_s;
-} sh_xnni0_2_intrani_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_3_INTRANI_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_3_intrani_flow_u {
- mmr_t sh_xnni0_3_intrani_flow_regval;
- struct {
- mmr_t debit_vc3_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc3_force_cred : 1;
- mmr_t reserved_1 : 56;
- } sh_xnni0_3_intrani_flow_s;
-} sh_xnni0_3_intrani_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_VCSWITCH_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_vcswitch_flow_u {
- mmr_t sh_xnni0_vcswitch_flow_regval;
- struct {
- mmr_t ni_vcfifo_dateline_switch : 1;
- mmr_t reserved_0 : 7;
- mmr_t pi_vcfifo_switch : 1;
- mmr_t reserved_1 : 7;
- mmr_t md_vcfifo_switch : 1;
- mmr_t reserved_2 : 7;
- mmr_t iilb_vcfifo_switch : 1;
- mmr_t reserved_3 : 7;
- mmr_t disable_sync_bypass_in : 1;
- mmr_t disable_sync_bypass_out : 1;
- mmr_t async_fifoes : 1;
- mmr_t reserved_4 : 29;
- } sh_xnni0_vcswitch_flow_s;
-} sh_xnni0_vcswitch_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_TIMER_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_timer_reg_u {
- mmr_t sh_xnni0_timer_reg_regval;
- struct {
- mmr_t timeout_reg : 24;
- mmr_t reserved_0 : 8;
- mmr_t linkcleanup_reg : 1;
- mmr_t reserved_1 : 31;
- } sh_xnni0_timer_reg_s;
-} sh_xnni0_timer_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_FIFO02_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_fifo02_flow_u {
- mmr_t sh_xnni0_fifo02_flow_regval;
- struct {
- mmr_t count_vc0_limit : 4;
- mmr_t reserved_0 : 4;
- mmr_t count_vc0_dyn : 4;
- mmr_t reserved_1 : 4;
- mmr_t count_vc0_cap : 4;
- mmr_t reserved_2 : 4;
- mmr_t count_vc2_limit : 4;
- mmr_t reserved_3 : 4;
- mmr_t count_vc2_dyn : 4;
- mmr_t reserved_4 : 4;
- mmr_t count_vc2_cap : 4;
- mmr_t reserved_5 : 20;
- } sh_xnni0_fifo02_flow_s;
-} sh_xnni0_fifo02_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_FIFO13_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_fifo13_flow_u {
- mmr_t sh_xnni0_fifo13_flow_regval;
- struct {
- mmr_t count_vc1_limit : 4;
- mmr_t reserved_0 : 4;
- mmr_t count_vc1_dyn : 4;
- mmr_t reserved_1 : 4;
- mmr_t count_vc1_cap : 4;
- mmr_t reserved_2 : 4;
- mmr_t count_vc3_limit : 4;
- mmr_t reserved_3 : 4;
- mmr_t count_vc3_dyn : 4;
- mmr_t reserved_4 : 4;
- mmr_t count_vc3_cap : 4;
- mmr_t reserved_5 : 20;
- } sh_xnni0_fifo13_flow_s;
-} sh_xnni0_fifo13_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_NI_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_ni_flow_u {
- mmr_t sh_xnni0_ni_flow_regval;
- struct {
- mmr_t vc0_limit : 4;
- mmr_t reserved_0 : 4;
- mmr_t vc0_dyn : 4;
- mmr_t vc0_cap : 4;
- mmr_t vc1_limit : 4;
- mmr_t reserved_1 : 4;
- mmr_t vc1_dyn : 4;
- mmr_t vc1_cap : 4;
- mmr_t vc2_limit : 4;
- mmr_t reserved_2 : 4;
- mmr_t vc2_dyn : 4;
- mmr_t vc2_cap : 4;
- mmr_t vc3_limit : 4;
- mmr_t reserved_3 : 4;
- mmr_t vc3_dyn : 4;
- mmr_t vc3_cap : 4;
- } sh_xnni0_ni_flow_s;
-} sh_xnni0_ni_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_DEAD_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_dead_flow_u {
- mmr_t sh_xnni0_dead_flow_regval;
- struct {
- mmr_t vc0_limit : 4;
- mmr_t reserved_0 : 4;
- mmr_t vc0_dyn : 4;
- mmr_t vc0_cap : 4;
- mmr_t vc1_limit : 4;
- mmr_t reserved_1 : 4;
- mmr_t vc1_dyn : 4;
- mmr_t vc1_cap : 4;
- mmr_t vc2_limit : 4;
- mmr_t reserved_2 : 4;
- mmr_t vc2_dyn : 4;
- mmr_t vc2_cap : 4;
- mmr_t vc3_limit : 4;
- mmr_t reserved_3 : 4;
- mmr_t vc3_dyn : 4;
- mmr_t vc3_cap : 4;
- } sh_xnni0_dead_flow_s;
-} sh_xnni0_dead_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI0_INJECT_AGE" */
-/* ==================================================================== */
-
-typedef union sh_xnni0_inject_age_u {
- mmr_t sh_xnni0_inject_age_regval;
- struct {
- mmr_t request_inject : 8;
- mmr_t reply_inject : 8;
- mmr_t reserved_0 : 48;
- } sh_xnni0_inject_age_s;
-} sh_xnni0_inject_age_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_TO_PI_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_to_pi_intra_flow_debit_u {
- mmr_t sh_xnni1_to_pi_intra_flow_debit_regval;
- struct {
- mmr_t vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t vc0_force_cred : 1;
- mmr_t vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_4 : 9;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_5 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_6 : 1;
- } sh_xnni1_to_pi_intra_flow_debit_s;
-} sh_xnni1_to_pi_intra_flow_debit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_TO_MD_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_to_md_intra_flow_debit_u {
- mmr_t sh_xnni1_to_md_intra_flow_debit_regval;
- struct {
- mmr_t vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t vc0_force_cred : 1;
- mmr_t vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_4 : 9;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_5 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_6 : 1;
- } sh_xnni1_to_md_intra_flow_debit_s;
-} sh_xnni1_to_md_intra_flow_debit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_TO_IILB_INTRA_FLOW_DEBIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_to_iilb_intra_flow_debit_u {
- mmr_t sh_xnni1_to_iilb_intra_flow_debit_regval;
- struct {
- mmr_t vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t vc0_force_cred : 1;
- mmr_t vc2_withhold : 6;
- mmr_t reserved_1 : 1;
- mmr_t vc2_force_cred : 1;
- mmr_t reserved_2 : 8;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_4 : 9;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_5 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_6 : 1;
- } sh_xnni1_to_iilb_intra_flow_debit_s;
-} sh_xnni1_to_iilb_intra_flow_debit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_FR_PI_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_fr_pi_intra_flow_credit_u {
- mmr_t sh_xnni1_fr_pi_intra_flow_credit_regval;
- struct {
- mmr_t vc0_test : 7;
- mmr_t reserved_0 : 1;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_1 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_2 : 1;
- mmr_t vc2_test : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_4 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_5 : 17;
- } sh_xnni1_fr_pi_intra_flow_credit_s;
-} sh_xnni1_fr_pi_intra_flow_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_FR_MD_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_fr_md_intra_flow_credit_u {
- mmr_t sh_xnni1_fr_md_intra_flow_credit_regval;
- struct {
- mmr_t vc0_test : 7;
- mmr_t reserved_0 : 1;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_1 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_2 : 1;
- mmr_t vc2_test : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_4 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_5 : 17;
- } sh_xnni1_fr_md_intra_flow_credit_s;
-} sh_xnni1_fr_md_intra_flow_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_FR_IILB_INTRA_FLOW_CREDIT" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_fr_iilb_intra_flow_credit_u {
- mmr_t sh_xnni1_fr_iilb_intra_flow_credit_regval;
- struct {
- mmr_t vc0_test : 7;
- mmr_t reserved_0 : 1;
- mmr_t vc0_dyn : 7;
- mmr_t reserved_1 : 1;
- mmr_t vc0_cap : 7;
- mmr_t reserved_2 : 1;
- mmr_t vc2_test : 7;
- mmr_t reserved_3 : 1;
- mmr_t vc2_dyn : 7;
- mmr_t reserved_4 : 1;
- mmr_t vc2_cap : 7;
- mmr_t reserved_5 : 17;
- } sh_xnni1_fr_iilb_intra_flow_credit_s;
-} sh_xnni1_fr_iilb_intra_flow_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_0_INTRANI_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_0_intrani_flow_u {
- mmr_t sh_xnni1_0_intrani_flow_regval;
- struct {
- mmr_t debit_vc0_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc0_force_cred : 1;
- mmr_t reserved_1 : 56;
- } sh_xnni1_0_intrani_flow_s;
-} sh_xnni1_0_intrani_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_1_INTRANI_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_1_intrani_flow_u {
- mmr_t sh_xnni1_1_intrani_flow_regval;
- struct {
- mmr_t debit_vc1_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc1_force_cred : 1;
- mmr_t reserved_1 : 56;
- } sh_xnni1_1_intrani_flow_s;
-} sh_xnni1_1_intrani_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_2_INTRANI_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_2_intrani_flow_u {
- mmr_t sh_xnni1_2_intrani_flow_regval;
- struct {
- mmr_t debit_vc2_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc2_force_cred : 1;
- mmr_t reserved_1 : 56;
- } sh_xnni1_2_intrani_flow_s;
-} sh_xnni1_2_intrani_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_3_INTRANI_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_3_intrani_flow_u {
- mmr_t sh_xnni1_3_intrani_flow_regval;
- struct {
- mmr_t debit_vc3_withhold : 6;
- mmr_t reserved_0 : 1;
- mmr_t debit_vc3_force_cred : 1;
- mmr_t reserved_1 : 56;
- } sh_xnni1_3_intrani_flow_s;
-} sh_xnni1_3_intrani_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_VCSWITCH_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_vcswitch_flow_u {
- mmr_t sh_xnni1_vcswitch_flow_regval;
- struct {
- mmr_t ni_vcfifo_dateline_switch : 1;
- mmr_t reserved_0 : 7;
- mmr_t pi_vcfifo_switch : 1;
- mmr_t reserved_1 : 7;
- mmr_t md_vcfifo_switch : 1;
- mmr_t reserved_2 : 7;
- mmr_t iilb_vcfifo_switch : 1;
- mmr_t reserved_3 : 7;
- mmr_t disable_sync_bypass_in : 1;
- mmr_t disable_sync_bypass_out : 1;
- mmr_t async_fifoes : 1;
- mmr_t reserved_4 : 29;
- } sh_xnni1_vcswitch_flow_s;
-} sh_xnni1_vcswitch_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_TIMER_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_timer_reg_u {
- mmr_t sh_xnni1_timer_reg_regval;
- struct {
- mmr_t timeout_reg : 24;
- mmr_t reserved_0 : 8;
- mmr_t linkcleanup_reg : 1;
- mmr_t reserved_1 : 31;
- } sh_xnni1_timer_reg_s;
-} sh_xnni1_timer_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_FIFO02_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_fifo02_flow_u {
- mmr_t sh_xnni1_fifo02_flow_regval;
- struct {
- mmr_t count_vc0_limit : 4;
- mmr_t reserved_0 : 4;
- mmr_t count_vc0_dyn : 4;
- mmr_t reserved_1 : 4;
- mmr_t count_vc0_cap : 4;
- mmr_t reserved_2 : 4;
- mmr_t count_vc2_limit : 4;
- mmr_t reserved_3 : 4;
- mmr_t count_vc2_dyn : 4;
- mmr_t reserved_4 : 4;
- mmr_t count_vc2_cap : 4;
- mmr_t reserved_5 : 20;
- } sh_xnni1_fifo02_flow_s;
-} sh_xnni1_fifo02_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_FIFO13_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_fifo13_flow_u {
- mmr_t sh_xnni1_fifo13_flow_regval;
- struct {
- mmr_t count_vc1_limit : 4;
- mmr_t reserved_0 : 4;
- mmr_t count_vc1_dyn : 4;
- mmr_t reserved_1 : 4;
- mmr_t count_vc1_cap : 4;
- mmr_t reserved_2 : 4;
- mmr_t count_vc3_limit : 4;
- mmr_t reserved_3 : 4;
- mmr_t count_vc3_dyn : 4;
- mmr_t reserved_4 : 4;
- mmr_t count_vc3_cap : 4;
- mmr_t reserved_5 : 20;
- } sh_xnni1_fifo13_flow_s;
-} sh_xnni1_fifo13_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_NI_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_ni_flow_u {
- mmr_t sh_xnni1_ni_flow_regval;
- struct {
- mmr_t vc0_limit : 4;
- mmr_t reserved_0 : 4;
- mmr_t vc0_dyn : 4;
- mmr_t vc0_cap : 4;
- mmr_t vc1_limit : 4;
- mmr_t reserved_1 : 4;
- mmr_t vc1_dyn : 4;
- mmr_t vc1_cap : 4;
- mmr_t vc2_limit : 4;
- mmr_t reserved_2 : 4;
- mmr_t vc2_dyn : 4;
- mmr_t vc2_cap : 4;
- mmr_t vc3_limit : 4;
- mmr_t reserved_3 : 4;
- mmr_t vc3_dyn : 4;
- mmr_t vc3_cap : 4;
- } sh_xnni1_ni_flow_s;
-} sh_xnni1_ni_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_DEAD_FLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_dead_flow_u {
- mmr_t sh_xnni1_dead_flow_regval;
- struct {
- mmr_t vc0_limit : 4;
- mmr_t reserved_0 : 4;
- mmr_t vc0_dyn : 4;
- mmr_t vc0_cap : 4;
- mmr_t vc1_limit : 4;
- mmr_t reserved_1 : 4;
- mmr_t vc1_dyn : 4;
- mmr_t vc1_cap : 4;
- mmr_t vc2_limit : 4;
- mmr_t reserved_2 : 4;
- mmr_t vc2_dyn : 4;
- mmr_t vc2_cap : 4;
- mmr_t vc3_limit : 4;
- mmr_t reserved_3 : 4;
- mmr_t vc3_dyn : 4;
- mmr_t vc3_cap : 4;
- } sh_xnni1_dead_flow_s;
-} sh_xnni1_dead_flow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNNI1_INJECT_AGE" */
-/* ==================================================================== */
-
-typedef union sh_xnni1_inject_age_u {
- mmr_t sh_xnni1_inject_age_regval;
- struct {
- mmr_t request_inject : 8;
- mmr_t reply_inject : 8;
- mmr_t reserved_0 : 48;
- } sh_xnni1_inject_age_s;
-} sh_xnni1_inject_age_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_DEBUG_SEL" */
-/* XN Debug Port Select */
-/* ==================================================================== */
-
-typedef union sh_xn_debug_sel_u {
- mmr_t sh_xn_debug_sel_regval;
- struct {
- mmr_t nibble0_rlm_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_rlm_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_rlm_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_rlm_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_rlm_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_rlm_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_rlm_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_rlm_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t trigger_enable : 1;
- } sh_xn_debug_sel_s;
-} sh_xn_debug_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_DEBUG_TRIG_SEL" */
-/* XN Debug trigger Select */
-/* ==================================================================== */
-
-typedef union sh_xn_debug_trig_sel_u {
- mmr_t sh_xn_debug_trig_sel_regval;
- struct {
- mmr_t trigger0_rlm_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t trigger0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t trigger1_rlm_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t trigger1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t trigger2_rlm_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t trigger2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t trigger3_rlm_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t trigger3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t trigger4_rlm_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t trigger4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t trigger5_rlm_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t trigger5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t trigger6_rlm_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t trigger6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t trigger7_rlm_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t trigger7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_xn_debug_trig_sel_s;
-} sh_xn_debug_trig_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_TRIGGER_COMPARE" */
-/* XN Debug Compare */
-/* ==================================================================== */
-
-typedef union sh_xn_trigger_compare_u {
- mmr_t sh_xn_trigger_compare_regval;
- struct {
- mmr_t mask : 32;
- mmr_t reserved_0 : 32;
- } sh_xn_trigger_compare_s;
-} sh_xn_trigger_compare_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_TRIGGER_DATA" */
-/* XN Debug Compare Data */
-/* ==================================================================== */
-
-typedef union sh_xn_trigger_data_u {
- mmr_t sh_xn_trigger_data_regval;
- struct {
- mmr_t compare_pattern : 32;
- mmr_t reserved_0 : 32;
- } sh_xn_trigger_data_s;
-} sh_xn_trigger_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_DEBUG_SEL" */
-/* XN IILB Debug Port Select */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_debug_sel_u {
- mmr_t sh_xn_iilb_debug_sel_regval;
- struct {
- mmr_t nibble0_input_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_input_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_input_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_input_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_input_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_input_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_input_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_input_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_xn_iilb_debug_sel_s;
-} sh_xn_iilb_debug_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_DEBUG_SEL" */
-/* XN PI Debug Port Select */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_debug_sel_u {
- mmr_t sh_xn_pi_debug_sel_regval;
- struct {
- mmr_t nibble0_input_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_input_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_input_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_input_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_input_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_input_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_input_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_input_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_xn_pi_debug_sel_s;
-} sh_xn_pi_debug_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_DEBUG_SEL" */
-/* XN MD Debug Port Select */
-/* ==================================================================== */
-
-typedef union sh_xn_md_debug_sel_u {
- mmr_t sh_xn_md_debug_sel_regval;
- struct {
- mmr_t nibble0_input_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_input_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_input_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_input_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_input_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_input_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_input_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_input_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_xn_md_debug_sel_s;
-} sh_xn_md_debug_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_DEBUG_SEL" */
-/* XN NI0 Debug Port Select */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_debug_sel_u {
- mmr_t sh_xn_ni0_debug_sel_regval;
- struct {
- mmr_t nibble0_input_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_input_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_input_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_input_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_input_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_input_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_input_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_input_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_xn_ni0_debug_sel_s;
-} sh_xn_ni0_debug_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_DEBUG_SEL" */
-/* XN NI1 Debug Port Select */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_debug_sel_u {
- mmr_t sh_xn_ni1_debug_sel_regval;
- struct {
- mmr_t nibble0_input_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_input_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_input_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_input_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_input_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_input_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_input_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_input_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_xn_ni1_debug_sel_s;
-} sh_xn_ni1_debug_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_LB_CMP_EXP_DATA0" */
-/* IILB compare LB input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_lb_cmp_exp_data0_u {
- mmr_t sh_xn_iilb_lb_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_lb_cmp_exp_data0_s;
-} sh_xn_iilb_lb_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_LB_CMP_EXP_DATA1" */
-/* IILB compare LB input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_lb_cmp_exp_data1_u {
- mmr_t sh_xn_iilb_lb_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_lb_cmp_exp_data1_s;
-} sh_xn_iilb_lb_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_LB_CMP_ENABLE0" */
-/* IILB compare LB input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_lb_cmp_enable0_u {
- mmr_t sh_xn_iilb_lb_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_lb_cmp_enable0_s;
-} sh_xn_iilb_lb_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_LB_CMP_ENABLE1" */
-/* IILB compare LB input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_lb_cmp_enable1_u {
- mmr_t sh_xn_iilb_lb_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_lb_cmp_enable1_s;
-} sh_xn_iilb_lb_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_II_CMP_EXP_DATA0" */
-/* IILB compare II input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ii_cmp_exp_data0_u {
- mmr_t sh_xn_iilb_ii_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_ii_cmp_exp_data0_s;
-} sh_xn_iilb_ii_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_II_CMP_EXP_DATA1" */
-/* IILB compare II input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ii_cmp_exp_data1_u {
- mmr_t sh_xn_iilb_ii_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_ii_cmp_exp_data1_s;
-} sh_xn_iilb_ii_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_II_CMP_ENABLE0" */
-/* IILB compare II input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ii_cmp_enable0_u {
- mmr_t sh_xn_iilb_ii_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_ii_cmp_enable0_s;
-} sh_xn_iilb_ii_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_II_CMP_ENABLE1" */
-/* IILB compare II input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ii_cmp_enable1_u {
- mmr_t sh_xn_iilb_ii_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_ii_cmp_enable1_s;
-} sh_xn_iilb_ii_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_MD_CMP_EXP_DATA0" */
-/* IILB compare MD input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_md_cmp_exp_data0_u {
- mmr_t sh_xn_iilb_md_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_md_cmp_exp_data0_s;
-} sh_xn_iilb_md_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_MD_CMP_EXP_DATA1" */
-/* IILB compare MD input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_md_cmp_exp_data1_u {
- mmr_t sh_xn_iilb_md_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_md_cmp_exp_data1_s;
-} sh_xn_iilb_md_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_MD_CMP_ENABLE0" */
-/* IILB compare MD input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_md_cmp_enable0_u {
- mmr_t sh_xn_iilb_md_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_md_cmp_enable0_s;
-} sh_xn_iilb_md_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_MD_CMP_ENABLE1" */
-/* IILB compare MD input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_md_cmp_enable1_u {
- mmr_t sh_xn_iilb_md_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_md_cmp_enable1_s;
-} sh_xn_iilb_md_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_PI_CMP_EXP_DATA0" */
-/* IILB compare PI input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_pi_cmp_exp_data0_u {
- mmr_t sh_xn_iilb_pi_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_pi_cmp_exp_data0_s;
-} sh_xn_iilb_pi_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_PI_CMP_EXP_DATA1" */
-/* IILB compare PI input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_pi_cmp_exp_data1_u {
- mmr_t sh_xn_iilb_pi_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_pi_cmp_exp_data1_s;
-} sh_xn_iilb_pi_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_PI_CMP_ENABLE0" */
-/* IILB compare PI input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_pi_cmp_enable0_u {
- mmr_t sh_xn_iilb_pi_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_pi_cmp_enable0_s;
-} sh_xn_iilb_pi_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_PI_CMP_ENABLE1" */
-/* IILB compare PI input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_pi_cmp_enable1_u {
- mmr_t sh_xn_iilb_pi_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_pi_cmp_enable1_s;
-} sh_xn_iilb_pi_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI0_CMP_EXP_DATA0" */
-/* IILB compare NI0 input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ni0_cmp_exp_data0_u {
- mmr_t sh_xn_iilb_ni0_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_ni0_cmp_exp_data0_s;
-} sh_xn_iilb_ni0_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI0_CMP_EXP_DATA1" */
-/* IILB compare NI0 input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ni0_cmp_exp_data1_u {
- mmr_t sh_xn_iilb_ni0_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_ni0_cmp_exp_data1_s;
-} sh_xn_iilb_ni0_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI0_CMP_ENABLE0" */
-/* IILB compare NI0 input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ni0_cmp_enable0_u {
- mmr_t sh_xn_iilb_ni0_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_ni0_cmp_enable0_s;
-} sh_xn_iilb_ni0_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI0_CMP_ENABLE1" */
-/* IILB compare NI0 input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ni0_cmp_enable1_u {
- mmr_t sh_xn_iilb_ni0_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_ni0_cmp_enable1_s;
-} sh_xn_iilb_ni0_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI1_CMP_EXP_DATA0" */
-/* IILB compare NI1 input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ni1_cmp_exp_data0_u {
- mmr_t sh_xn_iilb_ni1_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_ni1_cmp_exp_data0_s;
-} sh_xn_iilb_ni1_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI1_CMP_EXP_DATA1" */
-/* IILB compare NI1 input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ni1_cmp_exp_data1_u {
- mmr_t sh_xn_iilb_ni1_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_iilb_ni1_cmp_exp_data1_s;
-} sh_xn_iilb_ni1_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI1_CMP_ENABLE0" */
-/* IILB compare NI1 input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ni1_cmp_enable0_u {
- mmr_t sh_xn_iilb_ni1_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_ni1_cmp_enable0_s;
-} sh_xn_iilb_ni1_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_IILB_NI1_CMP_ENABLE1" */
-/* IILB compare NI1 input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_iilb_ni1_cmp_enable1_u {
- mmr_t sh_xn_iilb_ni1_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_iilb_ni1_cmp_enable1_s;
-} sh_xn_iilb_ni1_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_IILB_CMP_EXP_DATA0" */
-/* MD compare IILB input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_iilb_cmp_exp_data0_u {
- mmr_t sh_xn_md_iilb_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_md_iilb_cmp_exp_data0_s;
-} sh_xn_md_iilb_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_IILB_CMP_EXP_DATA1" */
-/* MD compare IILB input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_iilb_cmp_exp_data1_u {
- mmr_t sh_xn_md_iilb_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_md_iilb_cmp_exp_data1_s;
-} sh_xn_md_iilb_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_IILB_CMP_ENABLE0" */
-/* MD compare IILB input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_iilb_cmp_enable0_u {
- mmr_t sh_xn_md_iilb_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_md_iilb_cmp_enable0_s;
-} sh_xn_md_iilb_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_IILB_CMP_ENABLE1" */
-/* MD compare IILB input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_iilb_cmp_enable1_u {
- mmr_t sh_xn_md_iilb_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_md_iilb_cmp_enable1_s;
-} sh_xn_md_iilb_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI0_CMP_EXP_DATA0" */
-/* MD compare NI0 input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_ni0_cmp_exp_data0_u {
- mmr_t sh_xn_md_ni0_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_md_ni0_cmp_exp_data0_s;
-} sh_xn_md_ni0_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI0_CMP_EXP_DATA1" */
-/* MD compare NI0 input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_ni0_cmp_exp_data1_u {
- mmr_t sh_xn_md_ni0_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_md_ni0_cmp_exp_data1_s;
-} sh_xn_md_ni0_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI0_CMP_ENABLE0" */
-/* MD compare NI0 input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_ni0_cmp_enable0_u {
- mmr_t sh_xn_md_ni0_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_md_ni0_cmp_enable0_s;
-} sh_xn_md_ni0_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI0_CMP_ENABLE1" */
-/* MD compare NI0 input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_ni0_cmp_enable1_u {
- mmr_t sh_xn_md_ni0_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_md_ni0_cmp_enable1_s;
-} sh_xn_md_ni0_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI1_CMP_EXP_DATA0" */
-/* MD compare NI1 input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_ni1_cmp_exp_data0_u {
- mmr_t sh_xn_md_ni1_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_md_ni1_cmp_exp_data0_s;
-} sh_xn_md_ni1_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI1_CMP_EXP_DATA1" */
-/* MD compare NI1 input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_ni1_cmp_exp_data1_u {
- mmr_t sh_xn_md_ni1_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_md_ni1_cmp_exp_data1_s;
-} sh_xn_md_ni1_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI1_CMP_ENABLE0" */
-/* MD compare NI1 input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_ni1_cmp_enable0_u {
- mmr_t sh_xn_md_ni1_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_md_ni1_cmp_enable0_s;
-} sh_xn_md_ni1_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_NI1_CMP_ENABLE1" */
-/* MD compare NI1 input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_ni1_cmp_enable1_u {
- mmr_t sh_xn_md_ni1_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_md_ni1_cmp_enable1_s;
-} sh_xn_md_ni1_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_EXP_HDR0" */
-/* MD compare SIC input expected header0 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_exp_hdr0_u {
- mmr_t sh_xn_md_sic_cmp_exp_hdr0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_md_sic_cmp_exp_hdr0_s;
-} sh_xn_md_sic_cmp_exp_hdr0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_EXP_HDR1" */
-/* MD compare SIC input expected header1 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_exp_hdr1_u {
- mmr_t sh_xn_md_sic_cmp_exp_hdr1_regval;
- struct {
- mmr_t data : 42;
- mmr_t reserved_0 : 22;
- } sh_xn_md_sic_cmp_exp_hdr1_s;
-} sh_xn_md_sic_cmp_exp_hdr1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_HDR_ENABLE0" */
-/* MD compare SIC header enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_hdr_enable0_u {
- mmr_t sh_xn_md_sic_cmp_hdr_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_md_sic_cmp_hdr_enable0_s;
-} sh_xn_md_sic_cmp_hdr_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_HDR_ENABLE1" */
-/* MD compare SIC header enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_hdr_enable1_u {
- mmr_t sh_xn_md_sic_cmp_hdr_enable1_regval;
- struct {
- mmr_t enable : 42;
- mmr_t reserved_0 : 22;
- } sh_xn_md_sic_cmp_hdr_enable1_s;
-} sh_xn_md_sic_cmp_hdr_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA0" */
-/* MD compare SIC data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_data0_u {
- mmr_t sh_xn_md_sic_cmp_data0_regval;
- struct {
- mmr_t data0 : 64;
- } sh_xn_md_sic_cmp_data0_s;
-} sh_xn_md_sic_cmp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA1" */
-/* MD compare SIC data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_data1_u {
- mmr_t sh_xn_md_sic_cmp_data1_regval;
- struct {
- mmr_t data1 : 64;
- } sh_xn_md_sic_cmp_data1_s;
-} sh_xn_md_sic_cmp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA2" */
-/* MD compare SIC data2 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_data2_u {
- mmr_t sh_xn_md_sic_cmp_data2_regval;
- struct {
- mmr_t data2 : 64;
- } sh_xn_md_sic_cmp_data2_s;
-} sh_xn_md_sic_cmp_data2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA3" */
-/* MD compare SIC data3 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_data3_u {
- mmr_t sh_xn_md_sic_cmp_data3_regval;
- struct {
- mmr_t data3 : 64;
- } sh_xn_md_sic_cmp_data3_s;
-} sh_xn_md_sic_cmp_data3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA_ENABLE0" */
-/* MD enable compare SIC data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_data_enable0_u {
- mmr_t sh_xn_md_sic_cmp_data_enable0_regval;
- struct {
- mmr_t data_enable0 : 64;
- } sh_xn_md_sic_cmp_data_enable0_s;
-} sh_xn_md_sic_cmp_data_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA_ENABLE1" */
-/* MD enable compare SIC data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_data_enable1_u {
- mmr_t sh_xn_md_sic_cmp_data_enable1_regval;
- struct {
- mmr_t data_enable1 : 64;
- } sh_xn_md_sic_cmp_data_enable1_s;
-} sh_xn_md_sic_cmp_data_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA_ENABLE2" */
-/* MD enable compare SIC data2 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_data_enable2_u {
- mmr_t sh_xn_md_sic_cmp_data_enable2_regval;
- struct {
- mmr_t data_enable2 : 64;
- } sh_xn_md_sic_cmp_data_enable2_s;
-} sh_xn_md_sic_cmp_data_enable2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_SIC_CMP_DATA_ENABLE3" */
-/* MD enable compare SIC data3 */
-/* ==================================================================== */
-
-typedef union sh_xn_md_sic_cmp_data_enable3_u {
- mmr_t sh_xn_md_sic_cmp_data_enable3_regval;
- struct {
- mmr_t data_enable3 : 64;
- } sh_xn_md_sic_cmp_data_enable3_s;
-} sh_xn_md_sic_cmp_data_enable3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_IILB_CMP_EXP_DATA0" */
-/* PI compare IILB input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_iilb_cmp_exp_data0_u {
- mmr_t sh_xn_pi_iilb_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_pi_iilb_cmp_exp_data0_s;
-} sh_xn_pi_iilb_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_IILB_CMP_EXP_DATA1" */
-/* PI compare IILB input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_iilb_cmp_exp_data1_u {
- mmr_t sh_xn_pi_iilb_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_pi_iilb_cmp_exp_data1_s;
-} sh_xn_pi_iilb_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_IILB_CMP_ENABLE0" */
-/* PI compare IILB input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_iilb_cmp_enable0_u {
- mmr_t sh_xn_pi_iilb_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_pi_iilb_cmp_enable0_s;
-} sh_xn_pi_iilb_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_IILB_CMP_ENABLE1" */
-/* PI compare IILB input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_iilb_cmp_enable1_u {
- mmr_t sh_xn_pi_iilb_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_pi_iilb_cmp_enable1_s;
-} sh_xn_pi_iilb_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI0_CMP_EXP_DATA0" */
-/* PI compare NI0 input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_ni0_cmp_exp_data0_u {
- mmr_t sh_xn_pi_ni0_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_pi_ni0_cmp_exp_data0_s;
-} sh_xn_pi_ni0_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI0_CMP_EXP_DATA1" */
-/* PI compare NI0 input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_ni0_cmp_exp_data1_u {
- mmr_t sh_xn_pi_ni0_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_pi_ni0_cmp_exp_data1_s;
-} sh_xn_pi_ni0_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI0_CMP_ENABLE0" */
-/* PI compare NI0 input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_ni0_cmp_enable0_u {
- mmr_t sh_xn_pi_ni0_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_pi_ni0_cmp_enable0_s;
-} sh_xn_pi_ni0_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI0_CMP_ENABLE1" */
-/* PI compare NI0 input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_ni0_cmp_enable1_u {
- mmr_t sh_xn_pi_ni0_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_pi_ni0_cmp_enable1_s;
-} sh_xn_pi_ni0_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI1_CMP_EXP_DATA0" */
-/* PI compare NI1 input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_ni1_cmp_exp_data0_u {
- mmr_t sh_xn_pi_ni1_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_pi_ni1_cmp_exp_data0_s;
-} sh_xn_pi_ni1_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI1_CMP_EXP_DATA1" */
-/* PI compare NI1 input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_ni1_cmp_exp_data1_u {
- mmr_t sh_xn_pi_ni1_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_pi_ni1_cmp_exp_data1_s;
-} sh_xn_pi_ni1_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI1_CMP_ENABLE0" */
-/* PI compare NI1 input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_ni1_cmp_enable0_u {
- mmr_t sh_xn_pi_ni1_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_pi_ni1_cmp_enable0_s;
-} sh_xn_pi_ni1_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_NI1_CMP_ENABLE1" */
-/* PI compare NI1 input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_ni1_cmp_enable1_u {
- mmr_t sh_xn_pi_ni1_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_pi_ni1_cmp_enable1_s;
-} sh_xn_pi_ni1_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_EXP_HDR0" */
-/* PI compare SIC input expected header0 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_exp_hdr0_u {
- mmr_t sh_xn_pi_sic_cmp_exp_hdr0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_pi_sic_cmp_exp_hdr0_s;
-} sh_xn_pi_sic_cmp_exp_hdr0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_EXP_HDR1" */
-/* PI compare SIC input expected header1 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_exp_hdr1_u {
- mmr_t sh_xn_pi_sic_cmp_exp_hdr1_regval;
- struct {
- mmr_t data : 42;
- mmr_t reserved_0 : 22;
- } sh_xn_pi_sic_cmp_exp_hdr1_s;
-} sh_xn_pi_sic_cmp_exp_hdr1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_HDR_ENABLE0" */
-/* PI compare SIC header enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_hdr_enable0_u {
- mmr_t sh_xn_pi_sic_cmp_hdr_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_pi_sic_cmp_hdr_enable0_s;
-} sh_xn_pi_sic_cmp_hdr_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_HDR_ENABLE1" */
-/* PI compare SIC header enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_hdr_enable1_u {
- mmr_t sh_xn_pi_sic_cmp_hdr_enable1_regval;
- struct {
- mmr_t enable : 42;
- mmr_t reserved_0 : 22;
- } sh_xn_pi_sic_cmp_hdr_enable1_s;
-} sh_xn_pi_sic_cmp_hdr_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA0" */
-/* PI compare SIC data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_data0_u {
- mmr_t sh_xn_pi_sic_cmp_data0_regval;
- struct {
- mmr_t data0 : 64;
- } sh_xn_pi_sic_cmp_data0_s;
-} sh_xn_pi_sic_cmp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA1" */
-/* PI compare SIC data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_data1_u {
- mmr_t sh_xn_pi_sic_cmp_data1_regval;
- struct {
- mmr_t data1 : 64;
- } sh_xn_pi_sic_cmp_data1_s;
-} sh_xn_pi_sic_cmp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA2" */
-/* PI compare SIC data2 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_data2_u {
- mmr_t sh_xn_pi_sic_cmp_data2_regval;
- struct {
- mmr_t data2 : 64;
- } sh_xn_pi_sic_cmp_data2_s;
-} sh_xn_pi_sic_cmp_data2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA3" */
-/* PI compare SIC data3 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_data3_u {
- mmr_t sh_xn_pi_sic_cmp_data3_regval;
- struct {
- mmr_t data3 : 64;
- } sh_xn_pi_sic_cmp_data3_s;
-} sh_xn_pi_sic_cmp_data3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA_ENABLE0" */
-/* PI enable compare SIC data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_data_enable0_u {
- mmr_t sh_xn_pi_sic_cmp_data_enable0_regval;
- struct {
- mmr_t data_enable0 : 64;
- } sh_xn_pi_sic_cmp_data_enable0_s;
-} sh_xn_pi_sic_cmp_data_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA_ENABLE1" */
-/* PI enable compare SIC data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_data_enable1_u {
- mmr_t sh_xn_pi_sic_cmp_data_enable1_regval;
- struct {
- mmr_t data_enable1 : 64;
- } sh_xn_pi_sic_cmp_data_enable1_s;
-} sh_xn_pi_sic_cmp_data_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA_ENABLE2" */
-/* PI enable compare SIC data2 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_data_enable2_u {
- mmr_t sh_xn_pi_sic_cmp_data_enable2_regval;
- struct {
- mmr_t data_enable2 : 64;
- } sh_xn_pi_sic_cmp_data_enable2_s;
-} sh_xn_pi_sic_cmp_data_enable2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_PI_SIC_CMP_DATA_ENABLE3" */
-/* PI enable compare SIC data3 */
-/* ==================================================================== */
-
-typedef union sh_xn_pi_sic_cmp_data_enable3_u {
- mmr_t sh_xn_pi_sic_cmp_data_enable3_regval;
- struct {
- mmr_t data_enable3 : 64;
- } sh_xn_pi_sic_cmp_data_enable3_s;
-} sh_xn_pi_sic_cmp_data_enable3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_IILB_CMP_EXP_DATA0" */
-/* NI0 compare IILB input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_iilb_cmp_exp_data0_u {
- mmr_t sh_xn_ni0_iilb_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni0_iilb_cmp_exp_data0_s;
-} sh_xn_ni0_iilb_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_IILB_CMP_EXP_DATA1" */
-/* NI0 compare IILB input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_iilb_cmp_exp_data1_u {
- mmr_t sh_xn_ni0_iilb_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni0_iilb_cmp_exp_data1_s;
-} sh_xn_ni0_iilb_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_IILB_CMP_ENABLE0" */
-/* NI0 compare IILB input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_iilb_cmp_enable0_u {
- mmr_t sh_xn_ni0_iilb_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni0_iilb_cmp_enable0_s;
-} sh_xn_ni0_iilb_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_IILB_CMP_ENABLE1" */
-/* NI0 compare IILB input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_iilb_cmp_enable1_u {
- mmr_t sh_xn_ni0_iilb_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni0_iilb_cmp_enable1_s;
-} sh_xn_ni0_iilb_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_PI_CMP_EXP_DATA0" */
-/* NI0 compare PI input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_pi_cmp_exp_data0_u {
- mmr_t sh_xn_ni0_pi_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni0_pi_cmp_exp_data0_s;
-} sh_xn_ni0_pi_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_PI_CMP_EXP_DATA1" */
-/* NI0 compare PI input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_pi_cmp_exp_data1_u {
- mmr_t sh_xn_ni0_pi_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni0_pi_cmp_exp_data1_s;
-} sh_xn_ni0_pi_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_PI_CMP_ENABLE0" */
-/* NI0 compare PI input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_pi_cmp_enable0_u {
- mmr_t sh_xn_ni0_pi_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni0_pi_cmp_enable0_s;
-} sh_xn_ni0_pi_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_PI_CMP_ENABLE1" */
-/* NI0 compare PI input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_pi_cmp_enable1_u {
- mmr_t sh_xn_ni0_pi_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni0_pi_cmp_enable1_s;
-} sh_xn_ni0_pi_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_MD_CMP_EXP_DATA0" */
-/* NI0 compare MD input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_md_cmp_exp_data0_u {
- mmr_t sh_xn_ni0_md_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni0_md_cmp_exp_data0_s;
-} sh_xn_ni0_md_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_MD_CMP_EXP_DATA1" */
-/* NI0 compare MD input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_md_cmp_exp_data1_u {
- mmr_t sh_xn_ni0_md_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni0_md_cmp_exp_data1_s;
-} sh_xn_ni0_md_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_MD_CMP_ENABLE0" */
-/* NI0 compare MD input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_md_cmp_enable0_u {
- mmr_t sh_xn_ni0_md_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni0_md_cmp_enable0_s;
-} sh_xn_ni0_md_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_MD_CMP_ENABLE1" */
-/* NI0 compare MD input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_md_cmp_enable1_u {
- mmr_t sh_xn_ni0_md_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni0_md_cmp_enable1_s;
-} sh_xn_ni0_md_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_NI_CMP_EXP_DATA0" */
-/* NI0 compare NI input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_ni_cmp_exp_data0_u {
- mmr_t sh_xn_ni0_ni_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni0_ni_cmp_exp_data0_s;
-} sh_xn_ni0_ni_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_NI_CMP_EXP_DATA1" */
-/* NI0 compare NI input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_ni_cmp_exp_data1_u {
- mmr_t sh_xn_ni0_ni_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni0_ni_cmp_exp_data1_s;
-} sh_xn_ni0_ni_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_NI_CMP_ENABLE0" */
-/* NI0 compare NI input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_ni_cmp_enable0_u {
- mmr_t sh_xn_ni0_ni_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni0_ni_cmp_enable0_s;
-} sh_xn_ni0_ni_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_NI_CMP_ENABLE1" */
-/* NI0 compare NI input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_ni_cmp_enable1_u {
- mmr_t sh_xn_ni0_ni_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni0_ni_cmp_enable1_s;
-} sh_xn_ni0_ni_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_LLP_CMP_EXP_DATA0" */
-/* NI0 compare LLP input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_llp_cmp_exp_data0_u {
- mmr_t sh_xn_ni0_llp_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni0_llp_cmp_exp_data0_s;
-} sh_xn_ni0_llp_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_LLP_CMP_EXP_DATA1" */
-/* NI0 compare LLP input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_llp_cmp_exp_data1_u {
- mmr_t sh_xn_ni0_llp_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni0_llp_cmp_exp_data1_s;
-} sh_xn_ni0_llp_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_LLP_CMP_ENABLE0" */
-/* NI0 compare LLP input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_llp_cmp_enable0_u {
- mmr_t sh_xn_ni0_llp_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni0_llp_cmp_enable0_s;
-} sh_xn_ni0_llp_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI0_LLP_CMP_ENABLE1" */
-/* NI0 compare LLP input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni0_llp_cmp_enable1_u {
- mmr_t sh_xn_ni0_llp_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni0_llp_cmp_enable1_s;
-} sh_xn_ni0_llp_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_IILB_CMP_EXP_DATA0" */
-/* NI1 compare IILB input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_iilb_cmp_exp_data0_u {
- mmr_t sh_xn_ni1_iilb_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni1_iilb_cmp_exp_data0_s;
-} sh_xn_ni1_iilb_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_IILB_CMP_EXP_DATA1" */
-/* NI1 compare IILB input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_iilb_cmp_exp_data1_u {
- mmr_t sh_xn_ni1_iilb_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni1_iilb_cmp_exp_data1_s;
-} sh_xn_ni1_iilb_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_IILB_CMP_ENABLE0" */
-/* NI1 compare IILB input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_iilb_cmp_enable0_u {
- mmr_t sh_xn_ni1_iilb_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni1_iilb_cmp_enable0_s;
-} sh_xn_ni1_iilb_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_IILB_CMP_ENABLE1" */
-/* NI1 compare IILB input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_iilb_cmp_enable1_u {
- mmr_t sh_xn_ni1_iilb_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni1_iilb_cmp_enable1_s;
-} sh_xn_ni1_iilb_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_PI_CMP_EXP_DATA0" */
-/* NI1 compare PI input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_pi_cmp_exp_data0_u {
- mmr_t sh_xn_ni1_pi_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni1_pi_cmp_exp_data0_s;
-} sh_xn_ni1_pi_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_PI_CMP_EXP_DATA1" */
-/* NI1 compare PI input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_pi_cmp_exp_data1_u {
- mmr_t sh_xn_ni1_pi_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni1_pi_cmp_exp_data1_s;
-} sh_xn_ni1_pi_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_PI_CMP_ENABLE0" */
-/* NI1 compare PI input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_pi_cmp_enable0_u {
- mmr_t sh_xn_ni1_pi_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni1_pi_cmp_enable0_s;
-} sh_xn_ni1_pi_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_PI_CMP_ENABLE1" */
-/* NI1 compare PI input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_pi_cmp_enable1_u {
- mmr_t sh_xn_ni1_pi_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni1_pi_cmp_enable1_s;
-} sh_xn_ni1_pi_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_MD_CMP_EXP_DATA0" */
-/* NI1 compare MD input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_md_cmp_exp_data0_u {
- mmr_t sh_xn_ni1_md_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni1_md_cmp_exp_data0_s;
-} sh_xn_ni1_md_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_MD_CMP_EXP_DATA1" */
-/* NI1 compare MD input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_md_cmp_exp_data1_u {
- mmr_t sh_xn_ni1_md_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni1_md_cmp_exp_data1_s;
-} sh_xn_ni1_md_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_MD_CMP_ENABLE0" */
-/* NI1 compare MD input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_md_cmp_enable0_u {
- mmr_t sh_xn_ni1_md_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni1_md_cmp_enable0_s;
-} sh_xn_ni1_md_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_MD_CMP_ENABLE1" */
-/* NI1 compare MD input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_md_cmp_enable1_u {
- mmr_t sh_xn_ni1_md_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni1_md_cmp_enable1_s;
-} sh_xn_ni1_md_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_NI_CMP_EXP_DATA0" */
-/* NI1 compare NI input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_ni_cmp_exp_data0_u {
- mmr_t sh_xn_ni1_ni_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni1_ni_cmp_exp_data0_s;
-} sh_xn_ni1_ni_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_NI_CMP_EXP_DATA1" */
-/* NI1 compare NI input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_ni_cmp_exp_data1_u {
- mmr_t sh_xn_ni1_ni_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni1_ni_cmp_exp_data1_s;
-} sh_xn_ni1_ni_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_NI_CMP_ENABLE0" */
-/* NI1 compare NI input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_ni_cmp_enable0_u {
- mmr_t sh_xn_ni1_ni_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni1_ni_cmp_enable0_s;
-} sh_xn_ni1_ni_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_NI_CMP_ENABLE1" */
-/* NI1 compare NI input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_ni_cmp_enable1_u {
- mmr_t sh_xn_ni1_ni_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni1_ni_cmp_enable1_s;
-} sh_xn_ni1_ni_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_LLP_CMP_EXP_DATA0" */
-/* NI1 compare LLP input expected data0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_llp_cmp_exp_data0_u {
- mmr_t sh_xn_ni1_llp_cmp_exp_data0_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni1_llp_cmp_exp_data0_s;
-} sh_xn_ni1_llp_cmp_exp_data0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_LLP_CMP_EXP_DATA1" */
-/* NI1 compare LLP input expected data1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_llp_cmp_exp_data1_u {
- mmr_t sh_xn_ni1_llp_cmp_exp_data1_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_ni1_llp_cmp_exp_data1_s;
-} sh_xn_ni1_llp_cmp_exp_data1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_LLP_CMP_ENABLE0" */
-/* NI1 compare LLP input enable0 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_llp_cmp_enable0_u {
- mmr_t sh_xn_ni1_llp_cmp_enable0_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni1_llp_cmp_enable0_s;
-} sh_xn_ni1_llp_cmp_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_NI1_LLP_CMP_ENABLE1" */
-/* NI1 compare LLP input enable1 */
-/* ==================================================================== */
-
-typedef union sh_xn_ni1_llp_cmp_enable1_u {
- mmr_t sh_xn_ni1_llp_cmp_enable1_regval;
- struct {
- mmr_t enable : 64;
- } sh_xn_ni1_llp_cmp_enable1_s;
-} sh_xn_ni1_llp_cmp_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ECC_INJ_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_ecc_inj_reg_u {
- mmr_t sh_xnpi_ecc_inj_reg_regval;
- struct {
- mmr_t byte0 : 8;
- mmr_t reserved_0 : 4;
- mmr_t data_1shot0 : 1;
- mmr_t data_cont0 : 1;
- mmr_t data_cb_1shot0 : 1;
- mmr_t data_cb_cont0 : 1;
- mmr_t byte1 : 8;
- mmr_t reserved_1 : 4;
- mmr_t data_1shot1 : 1;
- mmr_t data_cont1 : 1;
- mmr_t data_cb_1shot1 : 1;
- mmr_t data_cb_cont1 : 1;
- mmr_t byte2 : 8;
- mmr_t reserved_2 : 4;
- mmr_t data_1shot2 : 1;
- mmr_t data_cont2 : 1;
- mmr_t data_cb_1shot2 : 1;
- mmr_t data_cb_cont2 : 1;
- mmr_t byte3 : 8;
- mmr_t reserved_3 : 4;
- mmr_t data_1shot3 : 1;
- mmr_t data_cont3 : 1;
- mmr_t data_cb_1shot3 : 1;
- mmr_t data_cb_cont3 : 1;
- } sh_xnpi_ecc_inj_reg_s;
-} sh_xnpi_ecc_inj_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ECC0_INJ_MASK_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_ecc0_inj_mask_reg_u {
- mmr_t sh_xnpi_ecc0_inj_mask_reg_regval;
- struct {
- mmr_t mask_ecc0 : 64;
- } sh_xnpi_ecc0_inj_mask_reg_s;
-} sh_xnpi_ecc0_inj_mask_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ECC1_INJ_MASK_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_ecc1_inj_mask_reg_u {
- mmr_t sh_xnpi_ecc1_inj_mask_reg_regval;
- struct {
- mmr_t mask_ecc1 : 64;
- } sh_xnpi_ecc1_inj_mask_reg_s;
-} sh_xnpi_ecc1_inj_mask_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ECC2_INJ_MASK_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_ecc2_inj_mask_reg_u {
- mmr_t sh_xnpi_ecc2_inj_mask_reg_regval;
- struct {
- mmr_t mask_ecc2 : 64;
- } sh_xnpi_ecc2_inj_mask_reg_s;
-} sh_xnpi_ecc2_inj_mask_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ECC3_INJ_MASK_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_ecc3_inj_mask_reg_u {
- mmr_t sh_xnpi_ecc3_inj_mask_reg_regval;
- struct {
- mmr_t mask_ecc3 : 64;
- } sh_xnpi_ecc3_inj_mask_reg_s;
-} sh_xnpi_ecc3_inj_mask_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC_INJ_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_ecc_inj_reg_u {
- mmr_t sh_xnmd_ecc_inj_reg_regval;
- struct {
- mmr_t byte0 : 8;
- mmr_t reserved_0 : 4;
- mmr_t data_1shot0 : 1;
- mmr_t data_cont0 : 1;
- mmr_t data_cb_1shot0 : 1;
- mmr_t data_cb_cont0 : 1;
- mmr_t byte1 : 8;
- mmr_t reserved_1 : 4;
- mmr_t data_1shot1 : 1;
- mmr_t data_cont1 : 1;
- mmr_t data_cb_1shot1 : 1;
- mmr_t data_cb_cont1 : 1;
- mmr_t byte2 : 8;
- mmr_t reserved_2 : 4;
- mmr_t data_1shot2 : 1;
- mmr_t data_cont2 : 1;
- mmr_t data_cb_1shot2 : 1;
- mmr_t data_cb_cont2 : 1;
- mmr_t byte3 : 8;
- mmr_t reserved_3 : 4;
- mmr_t data_1shot3 : 1;
- mmr_t data_cont3 : 1;
- mmr_t data_cb_1shot3 : 1;
- mmr_t data_cb_cont3 : 1;
- } sh_xnmd_ecc_inj_reg_s;
-} sh_xnmd_ecc_inj_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC0_INJ_MASK_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_ecc0_inj_mask_reg_u {
- mmr_t sh_xnmd_ecc0_inj_mask_reg_regval;
- struct {
- mmr_t mask_ecc0 : 64;
- } sh_xnmd_ecc0_inj_mask_reg_s;
-} sh_xnmd_ecc0_inj_mask_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC1_INJ_MASK_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_ecc1_inj_mask_reg_u {
- mmr_t sh_xnmd_ecc1_inj_mask_reg_regval;
- struct {
- mmr_t mask_ecc1 : 64;
- } sh_xnmd_ecc1_inj_mask_reg_s;
-} sh_xnmd_ecc1_inj_mask_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC2_INJ_MASK_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_ecc2_inj_mask_reg_u {
- mmr_t sh_xnmd_ecc2_inj_mask_reg_regval;
- struct {
- mmr_t mask_ecc2 : 64;
- } sh_xnmd_ecc2_inj_mask_reg_s;
-} sh_xnmd_ecc2_inj_mask_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC3_INJ_MASK_REG" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_ecc3_inj_mask_reg_u {
- mmr_t sh_xnmd_ecc3_inj_mask_reg_regval;
- struct {
- mmr_t mask_ecc3 : 64;
- } sh_xnmd_ecc3_inj_mask_reg_s;
-} sh_xnmd_ecc3_inj_mask_reg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ECC_ERR_REPORT" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_ecc_err_report_u {
- mmr_t sh_xnmd_ecc_err_report_regval;
- struct {
- mmr_t ecc_disable0 : 1;
- mmr_t reserved_0 : 15;
- mmr_t ecc_disable1 : 1;
- mmr_t reserved_1 : 15;
- mmr_t ecc_disable2 : 1;
- mmr_t reserved_2 : 15;
- mmr_t ecc_disable3 : 1;
- mmr_t reserved_3 : 15;
- } sh_xnmd_ecc_err_report_s;
-} sh_xnmd_ecc_err_report_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_SUMMARY_1" */
-/* ni0 Error Summary Bits */
-/* ==================================================================== */
-
-typedef union sh_ni0_error_summary_1_u {
- mmr_t sh_ni0_error_summary_1_regval;
- struct {
- mmr_t overflow_fifo02_debit0 : 1;
- mmr_t overflow_fifo02_debit2 : 1;
- mmr_t overflow_fifo13_debit0 : 1;
- mmr_t overflow_fifo13_debit2 : 1;
- mmr_t overflow_fifo02_vc0_pop : 1;
- mmr_t overflow_fifo02_vc2_pop : 1;
- mmr_t overflow_fifo13_vc1_pop : 1;
- mmr_t overflow_fifo13_vc3_pop : 1;
- mmr_t overflow_fifo02_vc0_push : 1;
- mmr_t overflow_fifo02_vc2_push : 1;
- mmr_t overflow_fifo13_vc1_push : 1;
- mmr_t overflow_fifo13_vc3_push : 1;
- mmr_t overflow_fifo02_vc0_credit : 1;
- mmr_t overflow_fifo02_vc2_credit : 1;
- mmr_t overflow_fifo13_vc0_credit : 1;
- mmr_t overflow_fifo13_vc2_credit : 1;
- mmr_t overflow0_vc0_credit : 1;
- mmr_t overflow1_vc0_credit : 1;
- mmr_t overflow2_vc0_credit : 1;
- mmr_t overflow0_vc2_credit : 1;
- mmr_t overflow1_vc2_credit : 1;
- mmr_t overflow2_vc2_credit : 1;
- mmr_t overflow_pi_fifo_debit0 : 1;
- mmr_t overflow_pi_fifo_debit2 : 1;
- mmr_t overflow_iilb_fifo_debit0 : 1;
- mmr_t overflow_iilb_fifo_debit2 : 1;
- mmr_t overflow_md_fifo_debit0 : 1;
- mmr_t overflow_md_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit0 : 1;
- mmr_t overflow_ni_fifo_debit1 : 1;
- mmr_t overflow_ni_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit3 : 1;
- mmr_t overflow_pi_fifo_vc0_pop : 1;
- mmr_t overflow_pi_fifo_vc2_pop : 1;
- mmr_t overflow_iilb_fifo_vc0_pop : 1;
- mmr_t overflow_iilb_fifo_vc2_pop : 1;
- mmr_t overflow_md_fifo_vc0_pop : 1;
- mmr_t overflow_md_fifo_vc2_pop : 1;
- mmr_t overflow_ni_fifo_vc0_pop : 1;
- mmr_t overflow_ni_fifo_vc2_pop : 1;
- mmr_t overflow_pi_fifo_vc0_push : 1;
- mmr_t overflow_pi_fifo_vc2_push : 1;
- mmr_t overflow_iilb_fifo_vc0_push : 1;
- mmr_t overflow_iilb_fifo_vc2_push : 1;
- mmr_t overflow_md_fifo_vc0_push : 1;
- mmr_t overflow_md_fifo_vc2_push : 1;
- mmr_t overflow_pi_fifo_vc0_credit : 1;
- mmr_t overflow_pi_fifo_vc2_credit : 1;
- mmr_t overflow_iilb_fifo_vc0_credit : 1;
- mmr_t overflow_iilb_fifo_vc2_credit : 1;
- mmr_t overflow_md_fifo_vc0_credit : 1;
- mmr_t overflow_md_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc0_credit : 1;
- mmr_t overflow_ni_fifo_vc1_credit : 1;
- mmr_t overflow_ni_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc3_credit : 1;
- mmr_t tail_timeout_fifo02_vc0 : 1;
- mmr_t tail_timeout_fifo02_vc2 : 1;
- mmr_t tail_timeout_fifo13_vc1 : 1;
- mmr_t tail_timeout_fifo13_vc3 : 1;
- mmr_t tail_timeout_ni_vc0 : 1;
- mmr_t tail_timeout_ni_vc1 : 1;
- mmr_t tail_timeout_ni_vc2 : 1;
- mmr_t tail_timeout_ni_vc3 : 1;
- } sh_ni0_error_summary_1_s;
-} sh_ni0_error_summary_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_SUMMARY_2" */
-/* ni0 Error Summary Bits */
-/* ==================================================================== */
-
-typedef union sh_ni0_error_summary_2_u {
- mmr_t sh_ni0_error_summary_2_regval;
- struct {
- mmr_t illegal_vcni : 1;
- mmr_t illegal_vcpi : 1;
- mmr_t illegal_vcmd : 1;
- mmr_t illegal_vciilb : 1;
- mmr_t underflow_fifo02_vc0_pop : 1;
- mmr_t underflow_fifo02_vc2_pop : 1;
- mmr_t underflow_fifo13_vc1_pop : 1;
- mmr_t underflow_fifo13_vc3_pop : 1;
- mmr_t underflow_fifo02_vc0_push : 1;
- mmr_t underflow_fifo02_vc2_push : 1;
- mmr_t underflow_fifo13_vc1_push : 1;
- mmr_t underflow_fifo13_vc3_push : 1;
- mmr_t underflow_fifo02_vc0_credit : 1;
- mmr_t underflow_fifo02_vc2_credit : 1;
- mmr_t underflow_fifo13_vc0_credit : 1;
- mmr_t underflow_fifo13_vc2_credit : 1;
- mmr_t underflow0_vc0_credit : 1;
- mmr_t underflow1_vc0_credit : 1;
- mmr_t underflow2_vc0_credit : 1;
- mmr_t underflow0_vc2_credit : 1;
- mmr_t underflow1_vc2_credit : 1;
- mmr_t underflow2_vc2_credit : 1;
- mmr_t reserved_0 : 10;
- mmr_t underflow_pi_fifo_vc0_pop : 1;
- mmr_t underflow_pi_fifo_vc2_pop : 1;
- mmr_t underflow_iilb_fifo_vc0_pop : 1;
- mmr_t underflow_iilb_fifo_vc2_pop : 1;
- mmr_t underflow_md_fifo_vc0_pop : 1;
- mmr_t underflow_md_fifo_vc2_pop : 1;
- mmr_t underflow_ni_fifo_vc0_pop : 1;
- mmr_t underflow_ni_fifo_vc2_pop : 1;
- mmr_t underflow_pi_fifo_vc0_push : 1;
- mmr_t underflow_pi_fifo_vc2_push : 1;
- mmr_t underflow_iilb_fifo_vc0_push : 1;
- mmr_t underflow_iilb_fifo_vc2_push : 1;
- mmr_t underflow_md_fifo_vc0_push : 1;
- mmr_t underflow_md_fifo_vc2_push : 1;
- mmr_t underflow_pi_fifo_vc0_credit : 1;
- mmr_t underflow_pi_fifo_vc2_credit : 1;
- mmr_t underflow_iilb_fifo_vc0_credit : 1;
- mmr_t underflow_iilb_fifo_vc2_credit : 1;
- mmr_t underflow_md_fifo_vc0_credit : 1;
- mmr_t underflow_md_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc0_credit : 1;
- mmr_t underflow_ni_fifo_vc1_credit : 1;
- mmr_t underflow_ni_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc3_credit : 1;
- mmr_t llp_deadlock_vc0 : 1;
- mmr_t llp_deadlock_vc1 : 1;
- mmr_t llp_deadlock_vc2 : 1;
- mmr_t llp_deadlock_vc3 : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- mmr_t retry_timeout_error : 1;
- mmr_t reserved_1 : 1;
- } sh_ni0_error_summary_2_s;
-} sh_ni0_error_summary_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_OVERFLOW_1" */
-/* ni0 Error Overflow Bits */
-/* ==================================================================== */
-
-typedef union sh_ni0_error_overflow_1_u {
- mmr_t sh_ni0_error_overflow_1_regval;
- struct {
- mmr_t overflow_fifo02_debit0 : 1;
- mmr_t overflow_fifo02_debit2 : 1;
- mmr_t overflow_fifo13_debit0 : 1;
- mmr_t overflow_fifo13_debit2 : 1;
- mmr_t overflow_fifo02_vc0_pop : 1;
- mmr_t overflow_fifo02_vc2_pop : 1;
- mmr_t overflow_fifo13_vc1_pop : 1;
- mmr_t overflow_fifo13_vc3_pop : 1;
- mmr_t overflow_fifo02_vc0_push : 1;
- mmr_t overflow_fifo02_vc2_push : 1;
- mmr_t overflow_fifo13_vc1_push : 1;
- mmr_t overflow_fifo13_vc3_push : 1;
- mmr_t overflow_fifo02_vc0_credit : 1;
- mmr_t overflow_fifo02_vc2_credit : 1;
- mmr_t overflow_fifo13_vc0_credit : 1;
- mmr_t overflow_fifo13_vc2_credit : 1;
- mmr_t overflow0_vc0_credit : 1;
- mmr_t overflow1_vc0_credit : 1;
- mmr_t overflow2_vc0_credit : 1;
- mmr_t overflow0_vc2_credit : 1;
- mmr_t overflow1_vc2_credit : 1;
- mmr_t overflow2_vc2_credit : 1;
- mmr_t overflow_pi_fifo_debit0 : 1;
- mmr_t overflow_pi_fifo_debit2 : 1;
- mmr_t overflow_iilb_fifo_debit0 : 1;
- mmr_t overflow_iilb_fifo_debit2 : 1;
- mmr_t overflow_md_fifo_debit0 : 1;
- mmr_t overflow_md_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit0 : 1;
- mmr_t overflow_ni_fifo_debit1 : 1;
- mmr_t overflow_ni_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit3 : 1;
- mmr_t overflow_pi_fifo_vc0_pop : 1;
- mmr_t overflow_pi_fifo_vc2_pop : 1;
- mmr_t overflow_iilb_fifo_vc0_pop : 1;
- mmr_t overflow_iilb_fifo_vc2_pop : 1;
- mmr_t overflow_md_fifo_vc0_pop : 1;
- mmr_t overflow_md_fifo_vc2_pop : 1;
- mmr_t overflow_ni_fifo_vc0_pop : 1;
- mmr_t overflow_ni_fifo_vc2_pop : 1;
- mmr_t overflow_pi_fifo_vc0_push : 1;
- mmr_t overflow_pi_fifo_vc2_push : 1;
- mmr_t overflow_iilb_fifo_vc0_push : 1;
- mmr_t overflow_iilb_fifo_vc2_push : 1;
- mmr_t overflow_md_fifo_vc0_push : 1;
- mmr_t overflow_md_fifo_vc2_push : 1;
- mmr_t overflow_pi_fifo_vc0_credit : 1;
- mmr_t overflow_pi_fifo_vc2_credit : 1;
- mmr_t overflow_iilb_fifo_vc0_credit : 1;
- mmr_t overflow_iilb_fifo_vc2_credit : 1;
- mmr_t overflow_md_fifo_vc0_credit : 1;
- mmr_t overflow_md_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc0_credit : 1;
- mmr_t overflow_ni_fifo_vc1_credit : 1;
- mmr_t overflow_ni_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc3_credit : 1;
- mmr_t tail_timeout_fifo02_vc0 : 1;
- mmr_t tail_timeout_fifo02_vc2 : 1;
- mmr_t tail_timeout_fifo13_vc1 : 1;
- mmr_t tail_timeout_fifo13_vc3 : 1;
- mmr_t tail_timeout_ni_vc0 : 1;
- mmr_t tail_timeout_ni_vc1 : 1;
- mmr_t tail_timeout_ni_vc2 : 1;
- mmr_t tail_timeout_ni_vc3 : 1;
- } sh_ni0_error_overflow_1_s;
-} sh_ni0_error_overflow_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_OVERFLOW_2" */
-/* ni0 Error Overflow Bits */
-/* ==================================================================== */
-
-typedef union sh_ni0_error_overflow_2_u {
- mmr_t sh_ni0_error_overflow_2_regval;
- struct {
- mmr_t illegal_vcni : 1;
- mmr_t illegal_vcpi : 1;
- mmr_t illegal_vcmd : 1;
- mmr_t illegal_vciilb : 1;
- mmr_t underflow_fifo02_vc0_pop : 1;
- mmr_t underflow_fifo02_vc2_pop : 1;
- mmr_t underflow_fifo13_vc1_pop : 1;
- mmr_t underflow_fifo13_vc3_pop : 1;
- mmr_t underflow_fifo02_vc0_push : 1;
- mmr_t underflow_fifo02_vc2_push : 1;
- mmr_t underflow_fifo13_vc1_push : 1;
- mmr_t underflow_fifo13_vc3_push : 1;
- mmr_t underflow_fifo02_vc0_credit : 1;
- mmr_t underflow_fifo02_vc2_credit : 1;
- mmr_t underflow_fifo13_vc0_credit : 1;
- mmr_t underflow_fifo13_vc2_credit : 1;
- mmr_t underflow0_vc0_credit : 1;
- mmr_t underflow1_vc0_credit : 1;
- mmr_t underflow2_vc0_credit : 1;
- mmr_t underflow0_vc2_credit : 1;
- mmr_t underflow1_vc2_credit : 1;
- mmr_t underflow2_vc2_credit : 1;
- mmr_t reserved_0 : 10;
- mmr_t underflow_pi_fifo_vc0_pop : 1;
- mmr_t underflow_pi_fifo_vc2_pop : 1;
- mmr_t underflow_iilb_fifo_vc0_pop : 1;
- mmr_t underflow_iilb_fifo_vc2_pop : 1;
- mmr_t underflow_md_fifo_vc0_pop : 1;
- mmr_t underflow_md_fifo_vc2_pop : 1;
- mmr_t underflow_ni_fifo_vc0_pop : 1;
- mmr_t underflow_ni_fifo_vc2_pop : 1;
- mmr_t underflow_pi_fifo_vc0_push : 1;
- mmr_t underflow_pi_fifo_vc2_push : 1;
- mmr_t underflow_iilb_fifo_vc0_push : 1;
- mmr_t underflow_iilb_fifo_vc2_push : 1;
- mmr_t underflow_md_fifo_vc0_push : 1;
- mmr_t underflow_md_fifo_vc2_push : 1;
- mmr_t underflow_pi_fifo_vc0_credit : 1;
- mmr_t underflow_pi_fifo_vc2_credit : 1;
- mmr_t underflow_iilb_fifo_vc0_credit : 1;
- mmr_t underflow_iilb_fifo_vc2_credit : 1;
- mmr_t underflow_md_fifo_vc0_credit : 1;
- mmr_t underflow_md_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc0_credit : 1;
- mmr_t underflow_ni_fifo_vc1_credit : 1;
- mmr_t underflow_ni_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc3_credit : 1;
- mmr_t llp_deadlock_vc0 : 1;
- mmr_t llp_deadlock_vc1 : 1;
- mmr_t llp_deadlock_vc2 : 1;
- mmr_t llp_deadlock_vc3 : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- mmr_t retry_timeout_error : 1;
- mmr_t reserved_1 : 1;
- } sh_ni0_error_overflow_2_s;
-} sh_ni0_error_overflow_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_MASK_1" */
-/* ni0 Error Mask Bits */
-/* ==================================================================== */
-
-typedef union sh_ni0_error_mask_1_u {
- mmr_t sh_ni0_error_mask_1_regval;
- struct {
- mmr_t overflow_fifo02_debit0 : 1;
- mmr_t overflow_fifo02_debit2 : 1;
- mmr_t overflow_fifo13_debit0 : 1;
- mmr_t overflow_fifo13_debit2 : 1;
- mmr_t overflow_fifo02_vc0_pop : 1;
- mmr_t overflow_fifo02_vc2_pop : 1;
- mmr_t overflow_fifo13_vc1_pop : 1;
- mmr_t overflow_fifo13_vc3_pop : 1;
- mmr_t overflow_fifo02_vc0_push : 1;
- mmr_t overflow_fifo02_vc2_push : 1;
- mmr_t overflow_fifo13_vc1_push : 1;
- mmr_t overflow_fifo13_vc3_push : 1;
- mmr_t overflow_fifo02_vc0_credit : 1;
- mmr_t overflow_fifo02_vc2_credit : 1;
- mmr_t overflow_fifo13_vc0_credit : 1;
- mmr_t overflow_fifo13_vc2_credit : 1;
- mmr_t overflow0_vc0_credit : 1;
- mmr_t overflow1_vc0_credit : 1;
- mmr_t overflow2_vc0_credit : 1;
- mmr_t overflow0_vc2_credit : 1;
- mmr_t overflow1_vc2_credit : 1;
- mmr_t overflow2_vc2_credit : 1;
- mmr_t overflow_pi_fifo_debit0 : 1;
- mmr_t overflow_pi_fifo_debit2 : 1;
- mmr_t overflow_iilb_fifo_debit0 : 1;
- mmr_t overflow_iilb_fifo_debit2 : 1;
- mmr_t overflow_md_fifo_debit0 : 1;
- mmr_t overflow_md_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit0 : 1;
- mmr_t overflow_ni_fifo_debit1 : 1;
- mmr_t overflow_ni_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit3 : 1;
- mmr_t overflow_pi_fifo_vc0_pop : 1;
- mmr_t overflow_pi_fifo_vc2_pop : 1;
- mmr_t overflow_iilb_fifo_vc0_pop : 1;
- mmr_t overflow_iilb_fifo_vc2_pop : 1;
- mmr_t overflow_md_fifo_vc0_pop : 1;
- mmr_t overflow_md_fifo_vc2_pop : 1;
- mmr_t overflow_ni_fifo_vc0_pop : 1;
- mmr_t overflow_ni_fifo_vc2_pop : 1;
- mmr_t overflow_pi_fifo_vc0_push : 1;
- mmr_t overflow_pi_fifo_vc2_push : 1;
- mmr_t overflow_iilb_fifo_vc0_push : 1;
- mmr_t overflow_iilb_fifo_vc2_push : 1;
- mmr_t overflow_md_fifo_vc0_push : 1;
- mmr_t overflow_md_fifo_vc2_push : 1;
- mmr_t overflow_pi_fifo_vc0_credit : 1;
- mmr_t overflow_pi_fifo_vc2_credit : 1;
- mmr_t overflow_iilb_fifo_vc0_credit : 1;
- mmr_t overflow_iilb_fifo_vc2_credit : 1;
- mmr_t overflow_md_fifo_vc0_credit : 1;
- mmr_t overflow_md_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc0_credit : 1;
- mmr_t overflow_ni_fifo_vc1_credit : 1;
- mmr_t overflow_ni_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc3_credit : 1;
- mmr_t tail_timeout_fifo02_vc0 : 1;
- mmr_t tail_timeout_fifo02_vc2 : 1;
- mmr_t tail_timeout_fifo13_vc1 : 1;
- mmr_t tail_timeout_fifo13_vc3 : 1;
- mmr_t tail_timeout_ni_vc0 : 1;
- mmr_t tail_timeout_ni_vc1 : 1;
- mmr_t tail_timeout_ni_vc2 : 1;
- mmr_t tail_timeout_ni_vc3 : 1;
- } sh_ni0_error_mask_1_s;
-} sh_ni0_error_mask_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_MASK_2" */
-/* ni0 Error Mask Bits */
-/* ==================================================================== */
-
-typedef union sh_ni0_error_mask_2_u {
- mmr_t sh_ni0_error_mask_2_regval;
- struct {
- mmr_t illegal_vcni : 1;
- mmr_t illegal_vcpi : 1;
- mmr_t illegal_vcmd : 1;
- mmr_t illegal_vciilb : 1;
- mmr_t underflow_fifo02_vc0_pop : 1;
- mmr_t underflow_fifo02_vc2_pop : 1;
- mmr_t underflow_fifo13_vc1_pop : 1;
- mmr_t underflow_fifo13_vc3_pop : 1;
- mmr_t underflow_fifo02_vc0_push : 1;
- mmr_t underflow_fifo02_vc2_push : 1;
- mmr_t underflow_fifo13_vc1_push : 1;
- mmr_t underflow_fifo13_vc3_push : 1;
- mmr_t underflow_fifo02_vc0_credit : 1;
- mmr_t underflow_fifo02_vc2_credit : 1;
- mmr_t underflow_fifo13_vc0_credit : 1;
- mmr_t underflow_fifo13_vc2_credit : 1;
- mmr_t underflow0_vc0_credit : 1;
- mmr_t underflow1_vc0_credit : 1;
- mmr_t underflow2_vc0_credit : 1;
- mmr_t underflow0_vc2_credit : 1;
- mmr_t underflow1_vc2_credit : 1;
- mmr_t underflow2_vc2_credit : 1;
- mmr_t reserved_0 : 10;
- mmr_t underflow_pi_fifo_vc0_pop : 1;
- mmr_t underflow_pi_fifo_vc2_pop : 1;
- mmr_t underflow_iilb_fifo_vc0_pop : 1;
- mmr_t underflow_iilb_fifo_vc2_pop : 1;
- mmr_t underflow_md_fifo_vc0_pop : 1;
- mmr_t underflow_md_fifo_vc2_pop : 1;
- mmr_t underflow_ni_fifo_vc0_pop : 1;
- mmr_t underflow_ni_fifo_vc2_pop : 1;
- mmr_t underflow_pi_fifo_vc0_push : 1;
- mmr_t underflow_pi_fifo_vc2_push : 1;
- mmr_t underflow_iilb_fifo_vc0_push : 1;
- mmr_t underflow_iilb_fifo_vc2_push : 1;
- mmr_t underflow_md_fifo_vc0_push : 1;
- mmr_t underflow_md_fifo_vc2_push : 1;
- mmr_t underflow_pi_fifo_vc0_credit : 1;
- mmr_t underflow_pi_fifo_vc2_credit : 1;
- mmr_t underflow_iilb_fifo_vc0_credit : 1;
- mmr_t underflow_iilb_fifo_vc2_credit : 1;
- mmr_t underflow_md_fifo_vc0_credit : 1;
- mmr_t underflow_md_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc0_credit : 1;
- mmr_t underflow_ni_fifo_vc1_credit : 1;
- mmr_t underflow_ni_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc3_credit : 1;
- mmr_t llp_deadlock_vc0 : 1;
- mmr_t llp_deadlock_vc1 : 1;
- mmr_t llp_deadlock_vc2 : 1;
- mmr_t llp_deadlock_vc3 : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- mmr_t retry_timeout_error : 1;
- mmr_t reserved_1 : 1;
- } sh_ni0_error_mask_2_s;
-} sh_ni0_error_mask_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_FIRST_ERROR_1" */
-/* ni0 First Error Bits */
-/* ==================================================================== */
-
-typedef union sh_ni0_first_error_1_u {
- mmr_t sh_ni0_first_error_1_regval;
- struct {
- mmr_t overflow_fifo02_debit0 : 1;
- mmr_t overflow_fifo02_debit2 : 1;
- mmr_t overflow_fifo13_debit0 : 1;
- mmr_t overflow_fifo13_debit2 : 1;
- mmr_t overflow_fifo02_vc0_pop : 1;
- mmr_t overflow_fifo02_vc2_pop : 1;
- mmr_t overflow_fifo13_vc1_pop : 1;
- mmr_t overflow_fifo13_vc3_pop : 1;
- mmr_t overflow_fifo02_vc0_push : 1;
- mmr_t overflow_fifo02_vc2_push : 1;
- mmr_t overflow_fifo13_vc1_push : 1;
- mmr_t overflow_fifo13_vc3_push : 1;
- mmr_t overflow_fifo02_vc0_credit : 1;
- mmr_t overflow_fifo02_vc2_credit : 1;
- mmr_t overflow_fifo13_vc0_credit : 1;
- mmr_t overflow_fifo13_vc2_credit : 1;
- mmr_t overflow0_vc0_credit : 1;
- mmr_t overflow1_vc0_credit : 1;
- mmr_t overflow2_vc0_credit : 1;
- mmr_t overflow0_vc2_credit : 1;
- mmr_t overflow1_vc2_credit : 1;
- mmr_t overflow2_vc2_credit : 1;
- mmr_t overflow_pi_fifo_debit0 : 1;
- mmr_t overflow_pi_fifo_debit2 : 1;
- mmr_t overflow_iilb_fifo_debit0 : 1;
- mmr_t overflow_iilb_fifo_debit2 : 1;
- mmr_t overflow_md_fifo_debit0 : 1;
- mmr_t overflow_md_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit0 : 1;
- mmr_t overflow_ni_fifo_debit1 : 1;
- mmr_t overflow_ni_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit3 : 1;
- mmr_t overflow_pi_fifo_vc0_pop : 1;
- mmr_t overflow_pi_fifo_vc2_pop : 1;
- mmr_t overflow_iilb_fifo_vc0_pop : 1;
- mmr_t overflow_iilb_fifo_vc2_pop : 1;
- mmr_t overflow_md_fifo_vc0_pop : 1;
- mmr_t overflow_md_fifo_vc2_pop : 1;
- mmr_t overflow_ni_fifo_vc0_pop : 1;
- mmr_t overflow_ni_fifo_vc2_pop : 1;
- mmr_t overflow_pi_fifo_vc0_push : 1;
- mmr_t overflow_pi_fifo_vc2_push : 1;
- mmr_t overflow_iilb_fifo_vc0_push : 1;
- mmr_t overflow_iilb_fifo_vc2_push : 1;
- mmr_t overflow_md_fifo_vc0_push : 1;
- mmr_t overflow_md_fifo_vc2_push : 1;
- mmr_t overflow_pi_fifo_vc0_credit : 1;
- mmr_t overflow_pi_fifo_vc2_credit : 1;
- mmr_t overflow_iilb_fifo_vc0_credit : 1;
- mmr_t overflow_iilb_fifo_vc2_credit : 1;
- mmr_t overflow_md_fifo_vc0_credit : 1;
- mmr_t overflow_md_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc0_credit : 1;
- mmr_t overflow_ni_fifo_vc1_credit : 1;
- mmr_t overflow_ni_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc3_credit : 1;
- mmr_t tail_timeout_fifo02_vc0 : 1;
- mmr_t tail_timeout_fifo02_vc2 : 1;
- mmr_t tail_timeout_fifo13_vc1 : 1;
- mmr_t tail_timeout_fifo13_vc3 : 1;
- mmr_t tail_timeout_ni_vc0 : 1;
- mmr_t tail_timeout_ni_vc1 : 1;
- mmr_t tail_timeout_ni_vc2 : 1;
- mmr_t tail_timeout_ni_vc3 : 1;
- } sh_ni0_first_error_1_s;
-} sh_ni0_first_error_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_FIRST_ERROR_2" */
-/* ni0 First Error Bits */
-/* ==================================================================== */
-
-typedef union sh_ni0_first_error_2_u {
- mmr_t sh_ni0_first_error_2_regval;
- struct {
- mmr_t illegal_vcni : 1;
- mmr_t illegal_vcpi : 1;
- mmr_t illegal_vcmd : 1;
- mmr_t illegal_vciilb : 1;
- mmr_t underflow_fifo02_vc0_pop : 1;
- mmr_t underflow_fifo02_vc2_pop : 1;
- mmr_t underflow_fifo13_vc1_pop : 1;
- mmr_t underflow_fifo13_vc3_pop : 1;
- mmr_t underflow_fifo02_vc0_push : 1;
- mmr_t underflow_fifo02_vc2_push : 1;
- mmr_t underflow_fifo13_vc1_push : 1;
- mmr_t underflow_fifo13_vc3_push : 1;
- mmr_t underflow_fifo02_vc0_credit : 1;
- mmr_t underflow_fifo02_vc2_credit : 1;
- mmr_t underflow_fifo13_vc0_credit : 1;
- mmr_t underflow_fifo13_vc2_credit : 1;
- mmr_t underflow0_vc0_credit : 1;
- mmr_t underflow1_vc0_credit : 1;
- mmr_t underflow2_vc0_credit : 1;
- mmr_t underflow0_vc2_credit : 1;
- mmr_t underflow1_vc2_credit : 1;
- mmr_t underflow2_vc2_credit : 1;
- mmr_t reserved_0 : 10;
- mmr_t underflow_pi_fifo_vc0_pop : 1;
- mmr_t underflow_pi_fifo_vc2_pop : 1;
- mmr_t underflow_iilb_fifo_vc0_pop : 1;
- mmr_t underflow_iilb_fifo_vc2_pop : 1;
- mmr_t underflow_md_fifo_vc0_pop : 1;
- mmr_t underflow_md_fifo_vc2_pop : 1;
- mmr_t underflow_ni_fifo_vc0_pop : 1;
- mmr_t underflow_ni_fifo_vc2_pop : 1;
- mmr_t underflow_pi_fifo_vc0_push : 1;
- mmr_t underflow_pi_fifo_vc2_push : 1;
- mmr_t underflow_iilb_fifo_vc0_push : 1;
- mmr_t underflow_iilb_fifo_vc2_push : 1;
- mmr_t underflow_md_fifo_vc0_push : 1;
- mmr_t underflow_md_fifo_vc2_push : 1;
- mmr_t underflow_pi_fifo_vc0_credit : 1;
- mmr_t underflow_pi_fifo_vc2_credit : 1;
- mmr_t underflow_iilb_fifo_vc0_credit : 1;
- mmr_t underflow_iilb_fifo_vc2_credit : 1;
- mmr_t underflow_md_fifo_vc0_credit : 1;
- mmr_t underflow_md_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc0_credit : 1;
- mmr_t underflow_ni_fifo_vc1_credit : 1;
- mmr_t underflow_ni_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc3_credit : 1;
- mmr_t llp_deadlock_vc0 : 1;
- mmr_t llp_deadlock_vc1 : 1;
- mmr_t llp_deadlock_vc2 : 1;
- mmr_t llp_deadlock_vc3 : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- mmr_t retry_timeout_error : 1;
- mmr_t reserved_1 : 1;
- } sh_ni0_first_error_2_s;
-} sh_ni0_first_error_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_DETAIL_1" */
-/* ni0 Chiplet no match header bits 63:0 */
-/* ==================================================================== */
-
-typedef union sh_ni0_error_detail_1_u {
- mmr_t sh_ni0_error_detail_1_regval;
- struct {
- mmr_t header : 64;
- } sh_ni0_error_detail_1_s;
-} sh_ni0_error_detail_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_DETAIL_2" */
-/* ni0 Chiplet no match header bits 127:64 */
-/* ==================================================================== */
-
-typedef union sh_ni0_error_detail_2_u {
- mmr_t sh_ni0_error_detail_2_regval;
- struct {
- mmr_t header : 64;
- } sh_ni0_error_detail_2_s;
-} sh_ni0_error_detail_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_SUMMARY_1" */
-/* ni1 Error Summary Bits */
-/* ==================================================================== */
-
-typedef union sh_ni1_error_summary_1_u {
- mmr_t sh_ni1_error_summary_1_regval;
- struct {
- mmr_t overflow_fifo02_debit0 : 1;
- mmr_t overflow_fifo02_debit2 : 1;
- mmr_t overflow_fifo13_debit0 : 1;
- mmr_t overflow_fifo13_debit2 : 1;
- mmr_t overflow_fifo02_vc0_pop : 1;
- mmr_t overflow_fifo02_vc2_pop : 1;
- mmr_t overflow_fifo13_vc1_pop : 1;
- mmr_t overflow_fifo13_vc3_pop : 1;
- mmr_t overflow_fifo02_vc0_push : 1;
- mmr_t overflow_fifo02_vc2_push : 1;
- mmr_t overflow_fifo13_vc1_push : 1;
- mmr_t overflow_fifo13_vc3_push : 1;
- mmr_t overflow_fifo02_vc0_credit : 1;
- mmr_t overflow_fifo02_vc2_credit : 1;
- mmr_t overflow_fifo13_vc0_credit : 1;
- mmr_t overflow_fifo13_vc2_credit : 1;
- mmr_t overflow0_vc0_credit : 1;
- mmr_t overflow1_vc0_credit : 1;
- mmr_t overflow2_vc0_credit : 1;
- mmr_t overflow0_vc2_credit : 1;
- mmr_t overflow1_vc2_credit : 1;
- mmr_t overflow2_vc2_credit : 1;
- mmr_t overflow_pi_fifo_debit0 : 1;
- mmr_t overflow_pi_fifo_debit2 : 1;
- mmr_t overflow_iilb_fifo_debit0 : 1;
- mmr_t overflow_iilb_fifo_debit2 : 1;
- mmr_t overflow_md_fifo_debit0 : 1;
- mmr_t overflow_md_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit0 : 1;
- mmr_t overflow_ni_fifo_debit1 : 1;
- mmr_t overflow_ni_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit3 : 1;
- mmr_t overflow_pi_fifo_vc0_pop : 1;
- mmr_t overflow_pi_fifo_vc2_pop : 1;
- mmr_t overflow_iilb_fifo_vc0_pop : 1;
- mmr_t overflow_iilb_fifo_vc2_pop : 1;
- mmr_t overflow_md_fifo_vc0_pop : 1;
- mmr_t overflow_md_fifo_vc2_pop : 1;
- mmr_t overflow_ni_fifo_vc0_pop : 1;
- mmr_t overflow_ni_fifo_vc2_pop : 1;
- mmr_t overflow_pi_fifo_vc0_push : 1;
- mmr_t overflow_pi_fifo_vc2_push : 1;
- mmr_t overflow_iilb_fifo_vc0_push : 1;
- mmr_t overflow_iilb_fifo_vc2_push : 1;
- mmr_t overflow_md_fifo_vc0_push : 1;
- mmr_t overflow_md_fifo_vc2_push : 1;
- mmr_t overflow_pi_fifo_vc0_credit : 1;
- mmr_t overflow_pi_fifo_vc2_credit : 1;
- mmr_t overflow_iilb_fifo_vc0_credit : 1;
- mmr_t overflow_iilb_fifo_vc2_credit : 1;
- mmr_t overflow_md_fifo_vc0_credit : 1;
- mmr_t overflow_md_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc0_credit : 1;
- mmr_t overflow_ni_fifo_vc1_credit : 1;
- mmr_t overflow_ni_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc3_credit : 1;
- mmr_t tail_timeout_fifo02_vc0 : 1;
- mmr_t tail_timeout_fifo02_vc2 : 1;
- mmr_t tail_timeout_fifo13_vc1 : 1;
- mmr_t tail_timeout_fifo13_vc3 : 1;
- mmr_t tail_timeout_ni_vc0 : 1;
- mmr_t tail_timeout_ni_vc1 : 1;
- mmr_t tail_timeout_ni_vc2 : 1;
- mmr_t tail_timeout_ni_vc3 : 1;
- } sh_ni1_error_summary_1_s;
-} sh_ni1_error_summary_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_SUMMARY_2" */
-/* ni1 Error Summary Bits */
-/* ==================================================================== */
-
-typedef union sh_ni1_error_summary_2_u {
- mmr_t sh_ni1_error_summary_2_regval;
- struct {
- mmr_t illegal_vcni : 1;
- mmr_t illegal_vcpi : 1;
- mmr_t illegal_vcmd : 1;
- mmr_t illegal_vciilb : 1;
- mmr_t underflow_fifo02_vc0_pop : 1;
- mmr_t underflow_fifo02_vc2_pop : 1;
- mmr_t underflow_fifo13_vc1_pop : 1;
- mmr_t underflow_fifo13_vc3_pop : 1;
- mmr_t underflow_fifo02_vc0_push : 1;
- mmr_t underflow_fifo02_vc2_push : 1;
- mmr_t underflow_fifo13_vc1_push : 1;
- mmr_t underflow_fifo13_vc3_push : 1;
- mmr_t underflow_fifo02_vc0_credit : 1;
- mmr_t underflow_fifo02_vc2_credit : 1;
- mmr_t underflow_fifo13_vc0_credit : 1;
- mmr_t underflow_fifo13_vc2_credit : 1;
- mmr_t underflow0_vc0_credit : 1;
- mmr_t underflow1_vc0_credit : 1;
- mmr_t underflow2_vc0_credit : 1;
- mmr_t underflow0_vc2_credit : 1;
- mmr_t underflow1_vc2_credit : 1;
- mmr_t underflow2_vc2_credit : 1;
- mmr_t reserved_0 : 10;
- mmr_t underflow_pi_fifo_vc0_pop : 1;
- mmr_t underflow_pi_fifo_vc2_pop : 1;
- mmr_t underflow_iilb_fifo_vc0_pop : 1;
- mmr_t underflow_iilb_fifo_vc2_pop : 1;
- mmr_t underflow_md_fifo_vc0_pop : 1;
- mmr_t underflow_md_fifo_vc2_pop : 1;
- mmr_t underflow_ni_fifo_vc0_pop : 1;
- mmr_t underflow_ni_fifo_vc2_pop : 1;
- mmr_t underflow_pi_fifo_vc0_push : 1;
- mmr_t underflow_pi_fifo_vc2_push : 1;
- mmr_t underflow_iilb_fifo_vc0_push : 1;
- mmr_t underflow_iilb_fifo_vc2_push : 1;
- mmr_t underflow_md_fifo_vc0_push : 1;
- mmr_t underflow_md_fifo_vc2_push : 1;
- mmr_t underflow_pi_fifo_vc0_credit : 1;
- mmr_t underflow_pi_fifo_vc2_credit : 1;
- mmr_t underflow_iilb_fifo_vc0_credit : 1;
- mmr_t underflow_iilb_fifo_vc2_credit : 1;
- mmr_t underflow_md_fifo_vc0_credit : 1;
- mmr_t underflow_md_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc0_credit : 1;
- mmr_t underflow_ni_fifo_vc1_credit : 1;
- mmr_t underflow_ni_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc3_credit : 1;
- mmr_t llp_deadlock_vc0 : 1;
- mmr_t llp_deadlock_vc1 : 1;
- mmr_t llp_deadlock_vc2 : 1;
- mmr_t llp_deadlock_vc3 : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- mmr_t retry_timeout_error : 1;
- mmr_t reserved_1 : 1;
- } sh_ni1_error_summary_2_s;
-} sh_ni1_error_summary_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_OVERFLOW_1" */
-/* ni1 Error Overflow Bits */
-/* ==================================================================== */
-
-typedef union sh_ni1_error_overflow_1_u {
- mmr_t sh_ni1_error_overflow_1_regval;
- struct {
- mmr_t overflow_fifo02_debit0 : 1;
- mmr_t overflow_fifo02_debit2 : 1;
- mmr_t overflow_fifo13_debit0 : 1;
- mmr_t overflow_fifo13_debit2 : 1;
- mmr_t overflow_fifo02_vc0_pop : 1;
- mmr_t overflow_fifo02_vc2_pop : 1;
- mmr_t overflow_fifo13_vc1_pop : 1;
- mmr_t overflow_fifo13_vc3_pop : 1;
- mmr_t overflow_fifo02_vc0_push : 1;
- mmr_t overflow_fifo02_vc2_push : 1;
- mmr_t overflow_fifo13_vc1_push : 1;
- mmr_t overflow_fifo13_vc3_push : 1;
- mmr_t overflow_fifo02_vc0_credit : 1;
- mmr_t overflow_fifo02_vc2_credit : 1;
- mmr_t overflow_fifo13_vc0_credit : 1;
- mmr_t overflow_fifo13_vc2_credit : 1;
- mmr_t overflow0_vc0_credit : 1;
- mmr_t overflow1_vc0_credit : 1;
- mmr_t overflow2_vc0_credit : 1;
- mmr_t overflow0_vc2_credit : 1;
- mmr_t overflow1_vc2_credit : 1;
- mmr_t overflow2_vc2_credit : 1;
- mmr_t overflow_pi_fifo_debit0 : 1;
- mmr_t overflow_pi_fifo_debit2 : 1;
- mmr_t overflow_iilb_fifo_debit0 : 1;
- mmr_t overflow_iilb_fifo_debit2 : 1;
- mmr_t overflow_md_fifo_debit0 : 1;
- mmr_t overflow_md_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit0 : 1;
- mmr_t overflow_ni_fifo_debit1 : 1;
- mmr_t overflow_ni_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit3 : 1;
- mmr_t overflow_pi_fifo_vc0_pop : 1;
- mmr_t overflow_pi_fifo_vc2_pop : 1;
- mmr_t overflow_iilb_fifo_vc0_pop : 1;
- mmr_t overflow_iilb_fifo_vc2_pop : 1;
- mmr_t overflow_md_fifo_vc0_pop : 1;
- mmr_t overflow_md_fifo_vc2_pop : 1;
- mmr_t overflow_ni_fifo_vc0_pop : 1;
- mmr_t overflow_ni_fifo_vc2_pop : 1;
- mmr_t overflow_pi_fifo_vc0_push : 1;
- mmr_t overflow_pi_fifo_vc2_push : 1;
- mmr_t overflow_iilb_fifo_vc0_push : 1;
- mmr_t overflow_iilb_fifo_vc2_push : 1;
- mmr_t overflow_md_fifo_vc0_push : 1;
- mmr_t overflow_md_fifo_vc2_push : 1;
- mmr_t overflow_pi_fifo_vc0_credit : 1;
- mmr_t overflow_pi_fifo_vc2_credit : 1;
- mmr_t overflow_iilb_fifo_vc0_credit : 1;
- mmr_t overflow_iilb_fifo_vc2_credit : 1;
- mmr_t overflow_md_fifo_vc0_credit : 1;
- mmr_t overflow_md_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc0_credit : 1;
- mmr_t overflow_ni_fifo_vc1_credit : 1;
- mmr_t overflow_ni_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc3_credit : 1;
- mmr_t tail_timeout_fifo02_vc0 : 1;
- mmr_t tail_timeout_fifo02_vc2 : 1;
- mmr_t tail_timeout_fifo13_vc1 : 1;
- mmr_t tail_timeout_fifo13_vc3 : 1;
- mmr_t tail_timeout_ni_vc0 : 1;
- mmr_t tail_timeout_ni_vc1 : 1;
- mmr_t tail_timeout_ni_vc2 : 1;
- mmr_t tail_timeout_ni_vc3 : 1;
- } sh_ni1_error_overflow_1_s;
-} sh_ni1_error_overflow_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_OVERFLOW_2" */
-/* ni1 Error Overflow Bits */
-/* ==================================================================== */
-
-typedef union sh_ni1_error_overflow_2_u {
- mmr_t sh_ni1_error_overflow_2_regval;
- struct {
- mmr_t illegal_vcni : 1;
- mmr_t illegal_vcpi : 1;
- mmr_t illegal_vcmd : 1;
- mmr_t illegal_vciilb : 1;
- mmr_t underflow_fifo02_vc0_pop : 1;
- mmr_t underflow_fifo02_vc2_pop : 1;
- mmr_t underflow_fifo13_vc1_pop : 1;
- mmr_t underflow_fifo13_vc3_pop : 1;
- mmr_t underflow_fifo02_vc0_push : 1;
- mmr_t underflow_fifo02_vc2_push : 1;
- mmr_t underflow_fifo13_vc1_push : 1;
- mmr_t underflow_fifo13_vc3_push : 1;
- mmr_t underflow_fifo02_vc0_credit : 1;
- mmr_t underflow_fifo02_vc2_credit : 1;
- mmr_t underflow_fifo13_vc0_credit : 1;
- mmr_t underflow_fifo13_vc2_credit : 1;
- mmr_t underflow0_vc0_credit : 1;
- mmr_t underflow1_vc0_credit : 1;
- mmr_t underflow2_vc0_credit : 1;
- mmr_t underflow0_vc2_credit : 1;
- mmr_t underflow1_vc2_credit : 1;
- mmr_t underflow2_vc2_credit : 1;
- mmr_t reserved_0 : 10;
- mmr_t underflow_pi_fifo_vc0_pop : 1;
- mmr_t underflow_pi_fifo_vc2_pop : 1;
- mmr_t underflow_iilb_fifo_vc0_pop : 1;
- mmr_t underflow_iilb_fifo_vc2_pop : 1;
- mmr_t underflow_md_fifo_vc0_pop : 1;
- mmr_t underflow_md_fifo_vc2_pop : 1;
- mmr_t underflow_ni_fifo_vc0_pop : 1;
- mmr_t underflow_ni_fifo_vc2_pop : 1;
- mmr_t underflow_pi_fifo_vc0_push : 1;
- mmr_t underflow_pi_fifo_vc2_push : 1;
- mmr_t underflow_iilb_fifo_vc0_push : 1;
- mmr_t underflow_iilb_fifo_vc2_push : 1;
- mmr_t underflow_md_fifo_vc0_push : 1;
- mmr_t underflow_md_fifo_vc2_push : 1;
- mmr_t underflow_pi_fifo_vc0_credit : 1;
- mmr_t underflow_pi_fifo_vc2_credit : 1;
- mmr_t underflow_iilb_fifo_vc0_credit : 1;
- mmr_t underflow_iilb_fifo_vc2_credit : 1;
- mmr_t underflow_md_fifo_vc0_credit : 1;
- mmr_t underflow_md_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc0_credit : 1;
- mmr_t underflow_ni_fifo_vc1_credit : 1;
- mmr_t underflow_ni_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc3_credit : 1;
- mmr_t llp_deadlock_vc0 : 1;
- mmr_t llp_deadlock_vc1 : 1;
- mmr_t llp_deadlock_vc2 : 1;
- mmr_t llp_deadlock_vc3 : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- mmr_t retry_timeout_error : 1;
- mmr_t reserved_1 : 1;
- } sh_ni1_error_overflow_2_s;
-} sh_ni1_error_overflow_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_MASK_1" */
-/* ni1 Error Mask Bits */
-/* ==================================================================== */
-
-typedef union sh_ni1_error_mask_1_u {
- mmr_t sh_ni1_error_mask_1_regval;
- struct {
- mmr_t overflow_fifo02_debit0 : 1;
- mmr_t overflow_fifo02_debit2 : 1;
- mmr_t overflow_fifo13_debit0 : 1;
- mmr_t overflow_fifo13_debit2 : 1;
- mmr_t overflow_fifo02_vc0_pop : 1;
- mmr_t overflow_fifo02_vc2_pop : 1;
- mmr_t overflow_fifo13_vc1_pop : 1;
- mmr_t overflow_fifo13_vc3_pop : 1;
- mmr_t overflow_fifo02_vc0_push : 1;
- mmr_t overflow_fifo02_vc2_push : 1;
- mmr_t overflow_fifo13_vc1_push : 1;
- mmr_t overflow_fifo13_vc3_push : 1;
- mmr_t overflow_fifo02_vc0_credit : 1;
- mmr_t overflow_fifo02_vc2_credit : 1;
- mmr_t overflow_fifo13_vc0_credit : 1;
- mmr_t overflow_fifo13_vc2_credit : 1;
- mmr_t overflow0_vc0_credit : 1;
- mmr_t overflow1_vc0_credit : 1;
- mmr_t overflow2_vc0_credit : 1;
- mmr_t overflow0_vc2_credit : 1;
- mmr_t overflow1_vc2_credit : 1;
- mmr_t overflow2_vc2_credit : 1;
- mmr_t overflow_pi_fifo_debit0 : 1;
- mmr_t overflow_pi_fifo_debit2 : 1;
- mmr_t overflow_iilb_fifo_debit0 : 1;
- mmr_t overflow_iilb_fifo_debit2 : 1;
- mmr_t overflow_md_fifo_debit0 : 1;
- mmr_t overflow_md_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit0 : 1;
- mmr_t overflow_ni_fifo_debit1 : 1;
- mmr_t overflow_ni_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit3 : 1;
- mmr_t overflow_pi_fifo_vc0_pop : 1;
- mmr_t overflow_pi_fifo_vc2_pop : 1;
- mmr_t overflow_iilb_fifo_vc0_pop : 1;
- mmr_t overflow_iilb_fifo_vc2_pop : 1;
- mmr_t overflow_md_fifo_vc0_pop : 1;
- mmr_t overflow_md_fifo_vc2_pop : 1;
- mmr_t overflow_ni_fifo_vc0_pop : 1;
- mmr_t overflow_ni_fifo_vc2_pop : 1;
- mmr_t overflow_pi_fifo_vc0_push : 1;
- mmr_t overflow_pi_fifo_vc2_push : 1;
- mmr_t overflow_iilb_fifo_vc0_push : 1;
- mmr_t overflow_iilb_fifo_vc2_push : 1;
- mmr_t overflow_md_fifo_vc0_push : 1;
- mmr_t overflow_md_fifo_vc2_push : 1;
- mmr_t overflow_pi_fifo_vc0_credit : 1;
- mmr_t overflow_pi_fifo_vc2_credit : 1;
- mmr_t overflow_iilb_fifo_vc0_credit : 1;
- mmr_t overflow_iilb_fifo_vc2_credit : 1;
- mmr_t overflow_md_fifo_vc0_credit : 1;
- mmr_t overflow_md_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc0_credit : 1;
- mmr_t overflow_ni_fifo_vc1_credit : 1;
- mmr_t overflow_ni_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc3_credit : 1;
- mmr_t tail_timeout_fifo02_vc0 : 1;
- mmr_t tail_timeout_fifo02_vc2 : 1;
- mmr_t tail_timeout_fifo13_vc1 : 1;
- mmr_t tail_timeout_fifo13_vc3 : 1;
- mmr_t tail_timeout_ni_vc0 : 1;
- mmr_t tail_timeout_ni_vc1 : 1;
- mmr_t tail_timeout_ni_vc2 : 1;
- mmr_t tail_timeout_ni_vc3 : 1;
- } sh_ni1_error_mask_1_s;
-} sh_ni1_error_mask_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_MASK_2" */
-/* ni1 Error Mask Bits */
-/* ==================================================================== */
-
-typedef union sh_ni1_error_mask_2_u {
- mmr_t sh_ni1_error_mask_2_regval;
- struct {
- mmr_t illegal_vcni : 1;
- mmr_t illegal_vcpi : 1;
- mmr_t illegal_vcmd : 1;
- mmr_t illegal_vciilb : 1;
- mmr_t underflow_fifo02_vc0_pop : 1;
- mmr_t underflow_fifo02_vc2_pop : 1;
- mmr_t underflow_fifo13_vc1_pop : 1;
- mmr_t underflow_fifo13_vc3_pop : 1;
- mmr_t underflow_fifo02_vc0_push : 1;
- mmr_t underflow_fifo02_vc2_push : 1;
- mmr_t underflow_fifo13_vc1_push : 1;
- mmr_t underflow_fifo13_vc3_push : 1;
- mmr_t underflow_fifo02_vc0_credit : 1;
- mmr_t underflow_fifo02_vc2_credit : 1;
- mmr_t underflow_fifo13_vc0_credit : 1;
- mmr_t underflow_fifo13_vc2_credit : 1;
- mmr_t underflow0_vc0_credit : 1;
- mmr_t underflow1_vc0_credit : 1;
- mmr_t underflow2_vc0_credit : 1;
- mmr_t underflow0_vc2_credit : 1;
- mmr_t underflow1_vc2_credit : 1;
- mmr_t underflow2_vc2_credit : 1;
- mmr_t reserved_0 : 10;
- mmr_t underflow_pi_fifo_vc0_pop : 1;
- mmr_t underflow_pi_fifo_vc2_pop : 1;
- mmr_t underflow_iilb_fifo_vc0_pop : 1;
- mmr_t underflow_iilb_fifo_vc2_pop : 1;
- mmr_t underflow_md_fifo_vc0_pop : 1;
- mmr_t underflow_md_fifo_vc2_pop : 1;
- mmr_t underflow_ni_fifo_vc0_pop : 1;
- mmr_t underflow_ni_fifo_vc2_pop : 1;
- mmr_t underflow_pi_fifo_vc0_push : 1;
- mmr_t underflow_pi_fifo_vc2_push : 1;
- mmr_t underflow_iilb_fifo_vc0_push : 1;
- mmr_t underflow_iilb_fifo_vc2_push : 1;
- mmr_t underflow_md_fifo_vc0_push : 1;
- mmr_t underflow_md_fifo_vc2_push : 1;
- mmr_t underflow_pi_fifo_vc0_credit : 1;
- mmr_t underflow_pi_fifo_vc2_credit : 1;
- mmr_t underflow_iilb_fifo_vc0_credit : 1;
- mmr_t underflow_iilb_fifo_vc2_credit : 1;
- mmr_t underflow_md_fifo_vc0_credit : 1;
- mmr_t underflow_md_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc0_credit : 1;
- mmr_t underflow_ni_fifo_vc1_credit : 1;
- mmr_t underflow_ni_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc3_credit : 1;
- mmr_t llp_deadlock_vc0 : 1;
- mmr_t llp_deadlock_vc1 : 1;
- mmr_t llp_deadlock_vc2 : 1;
- mmr_t llp_deadlock_vc3 : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- mmr_t retry_timeout_error : 1;
- mmr_t reserved_1 : 1;
- } sh_ni1_error_mask_2_s;
-} sh_ni1_error_mask_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_FIRST_ERROR_1" */
-/* ni1 First Error Bits */
-/* ==================================================================== */
-
-typedef union sh_ni1_first_error_1_u {
- mmr_t sh_ni1_first_error_1_regval;
- struct {
- mmr_t overflow_fifo02_debit0 : 1;
- mmr_t overflow_fifo02_debit2 : 1;
- mmr_t overflow_fifo13_debit0 : 1;
- mmr_t overflow_fifo13_debit2 : 1;
- mmr_t overflow_fifo02_vc0_pop : 1;
- mmr_t overflow_fifo02_vc2_pop : 1;
- mmr_t overflow_fifo13_vc1_pop : 1;
- mmr_t overflow_fifo13_vc3_pop : 1;
- mmr_t overflow_fifo02_vc0_push : 1;
- mmr_t overflow_fifo02_vc2_push : 1;
- mmr_t overflow_fifo13_vc1_push : 1;
- mmr_t overflow_fifo13_vc3_push : 1;
- mmr_t overflow_fifo02_vc0_credit : 1;
- mmr_t overflow_fifo02_vc2_credit : 1;
- mmr_t overflow_fifo13_vc0_credit : 1;
- mmr_t overflow_fifo13_vc2_credit : 1;
- mmr_t overflow0_vc0_credit : 1;
- mmr_t overflow1_vc0_credit : 1;
- mmr_t overflow2_vc0_credit : 1;
- mmr_t overflow0_vc2_credit : 1;
- mmr_t overflow1_vc2_credit : 1;
- mmr_t overflow2_vc2_credit : 1;
- mmr_t overflow_pi_fifo_debit0 : 1;
- mmr_t overflow_pi_fifo_debit2 : 1;
- mmr_t overflow_iilb_fifo_debit0 : 1;
- mmr_t overflow_iilb_fifo_debit2 : 1;
- mmr_t overflow_md_fifo_debit0 : 1;
- mmr_t overflow_md_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit0 : 1;
- mmr_t overflow_ni_fifo_debit1 : 1;
- mmr_t overflow_ni_fifo_debit2 : 1;
- mmr_t overflow_ni_fifo_debit3 : 1;
- mmr_t overflow_pi_fifo_vc0_pop : 1;
- mmr_t overflow_pi_fifo_vc2_pop : 1;
- mmr_t overflow_iilb_fifo_vc0_pop : 1;
- mmr_t overflow_iilb_fifo_vc2_pop : 1;
- mmr_t overflow_md_fifo_vc0_pop : 1;
- mmr_t overflow_md_fifo_vc2_pop : 1;
- mmr_t overflow_ni_fifo_vc0_pop : 1;
- mmr_t overflow_ni_fifo_vc2_pop : 1;
- mmr_t overflow_pi_fifo_vc0_push : 1;
- mmr_t overflow_pi_fifo_vc2_push : 1;
- mmr_t overflow_iilb_fifo_vc0_push : 1;
- mmr_t overflow_iilb_fifo_vc2_push : 1;
- mmr_t overflow_md_fifo_vc0_push : 1;
- mmr_t overflow_md_fifo_vc2_push : 1;
- mmr_t overflow_pi_fifo_vc0_credit : 1;
- mmr_t overflow_pi_fifo_vc2_credit : 1;
- mmr_t overflow_iilb_fifo_vc0_credit : 1;
- mmr_t overflow_iilb_fifo_vc2_credit : 1;
- mmr_t overflow_md_fifo_vc0_credit : 1;
- mmr_t overflow_md_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc0_credit : 1;
- mmr_t overflow_ni_fifo_vc1_credit : 1;
- mmr_t overflow_ni_fifo_vc2_credit : 1;
- mmr_t overflow_ni_fifo_vc3_credit : 1;
- mmr_t tail_timeout_fifo02_vc0 : 1;
- mmr_t tail_timeout_fifo02_vc2 : 1;
- mmr_t tail_timeout_fifo13_vc1 : 1;
- mmr_t tail_timeout_fifo13_vc3 : 1;
- mmr_t tail_timeout_ni_vc0 : 1;
- mmr_t tail_timeout_ni_vc1 : 1;
- mmr_t tail_timeout_ni_vc2 : 1;
- mmr_t tail_timeout_ni_vc3 : 1;
- } sh_ni1_first_error_1_s;
-} sh_ni1_first_error_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_FIRST_ERROR_2" */
-/* ni1 First Error Bits */
-/* ==================================================================== */
-
-typedef union sh_ni1_first_error_2_u {
- mmr_t sh_ni1_first_error_2_regval;
- struct {
- mmr_t illegal_vcni : 1;
- mmr_t illegal_vcpi : 1;
- mmr_t illegal_vcmd : 1;
- mmr_t illegal_vciilb : 1;
- mmr_t underflow_fifo02_vc0_pop : 1;
- mmr_t underflow_fifo02_vc2_pop : 1;
- mmr_t underflow_fifo13_vc1_pop : 1;
- mmr_t underflow_fifo13_vc3_pop : 1;
- mmr_t underflow_fifo02_vc0_push : 1;
- mmr_t underflow_fifo02_vc2_push : 1;
- mmr_t underflow_fifo13_vc1_push : 1;
- mmr_t underflow_fifo13_vc3_push : 1;
- mmr_t underflow_fifo02_vc0_credit : 1;
- mmr_t underflow_fifo02_vc2_credit : 1;
- mmr_t underflow_fifo13_vc0_credit : 1;
- mmr_t underflow_fifo13_vc2_credit : 1;
- mmr_t underflow0_vc0_credit : 1;
- mmr_t underflow1_vc0_credit : 1;
- mmr_t underflow2_vc0_credit : 1;
- mmr_t underflow0_vc2_credit : 1;
- mmr_t underflow1_vc2_credit : 1;
- mmr_t underflow2_vc2_credit : 1;
- mmr_t reserved_0 : 10;
- mmr_t underflow_pi_fifo_vc0_pop : 1;
- mmr_t underflow_pi_fifo_vc2_pop : 1;
- mmr_t underflow_iilb_fifo_vc0_pop : 1;
- mmr_t underflow_iilb_fifo_vc2_pop : 1;
- mmr_t underflow_md_fifo_vc0_pop : 1;
- mmr_t underflow_md_fifo_vc2_pop : 1;
- mmr_t underflow_ni_fifo_vc0_pop : 1;
- mmr_t underflow_ni_fifo_vc2_pop : 1;
- mmr_t underflow_pi_fifo_vc0_push : 1;
- mmr_t underflow_pi_fifo_vc2_push : 1;
- mmr_t underflow_iilb_fifo_vc0_push : 1;
- mmr_t underflow_iilb_fifo_vc2_push : 1;
- mmr_t underflow_md_fifo_vc0_push : 1;
- mmr_t underflow_md_fifo_vc2_push : 1;
- mmr_t underflow_pi_fifo_vc0_credit : 1;
- mmr_t underflow_pi_fifo_vc2_credit : 1;
- mmr_t underflow_iilb_fifo_vc0_credit : 1;
- mmr_t underflow_iilb_fifo_vc2_credit : 1;
- mmr_t underflow_md_fifo_vc0_credit : 1;
- mmr_t underflow_md_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc0_credit : 1;
- mmr_t underflow_ni_fifo_vc1_credit : 1;
- mmr_t underflow_ni_fifo_vc2_credit : 1;
- mmr_t underflow_ni_fifo_vc3_credit : 1;
- mmr_t llp_deadlock_vc0 : 1;
- mmr_t llp_deadlock_vc1 : 1;
- mmr_t llp_deadlock_vc2 : 1;
- mmr_t llp_deadlock_vc3 : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- mmr_t retry_timeout_error : 1;
- mmr_t reserved_1 : 1;
- } sh_ni1_first_error_2_s;
-} sh_ni1_first_error_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_DETAIL_1" */
-/* ni1 Chiplet no match header bits 63:0 */
-/* ==================================================================== */
-
-typedef union sh_ni1_error_detail_1_u {
- mmr_t sh_ni1_error_detail_1_regval;
- struct {
- mmr_t header : 64;
- } sh_ni1_error_detail_1_s;
-} sh_ni1_error_detail_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_DETAIL_2" */
-/* ni1 Chiplet no match header bits 127:64 */
-/* ==================================================================== */
-
-typedef union sh_ni1_error_detail_2_u {
- mmr_t sh_ni1_error_detail_2_regval;
- struct {
- mmr_t header : 64;
- } sh_ni1_error_detail_2_s;
-} sh_ni1_error_detail_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_CORRECTED_DETAIL_1" */
-/* Corrected error details */
-/* ==================================================================== */
-
-typedef union sh_xn_corrected_detail_1_u {
- mmr_t sh_xn_corrected_detail_1_regval;
- struct {
- mmr_t ecc0_syndrome : 8;
- mmr_t ecc0_wc : 2;
- mmr_t ecc0_vc : 2;
- mmr_t reserved_0 : 4;
- mmr_t ecc1_syndrome : 8;
- mmr_t ecc1_wc : 2;
- mmr_t ecc1_vc : 2;
- mmr_t reserved_1 : 4;
- mmr_t ecc2_syndrome : 8;
- mmr_t ecc2_wc : 2;
- mmr_t ecc2_vc : 2;
- mmr_t reserved_2 : 4;
- mmr_t ecc3_syndrome : 8;
- mmr_t ecc3_wc : 2;
- mmr_t ecc3_vc : 2;
- mmr_t reserved_3 : 4;
- } sh_xn_corrected_detail_1_s;
-} sh_xn_corrected_detail_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_CORRECTED_DETAIL_2" */
-/* Corrected error data */
-/* ==================================================================== */
-
-typedef union sh_xn_corrected_detail_2_u {
- mmr_t sh_xn_corrected_detail_2_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_corrected_detail_2_s;
-} sh_xn_corrected_detail_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_CORRECTED_DETAIL_3" */
-/* Corrected error header0 */
-/* ==================================================================== */
-
-typedef union sh_xn_corrected_detail_3_u {
- mmr_t sh_xn_corrected_detail_3_regval;
- struct {
- mmr_t header0 : 64;
- } sh_xn_corrected_detail_3_s;
-} sh_xn_corrected_detail_3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_CORRECTED_DETAIL_4" */
-/* Corrected error header1 */
-/* ==================================================================== */
-
-typedef union sh_xn_corrected_detail_4_u {
- mmr_t sh_xn_corrected_detail_4_regval;
- struct {
- mmr_t header1 : 42;
- mmr_t reserved_0 : 20;
- mmr_t err_group : 2;
- } sh_xn_corrected_detail_4_s;
-} sh_xn_corrected_detail_4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_UNCORRECTED_DETAIL_1" */
-/* Uncorrected error details */
-/* ==================================================================== */
-
-typedef union sh_xn_uncorrected_detail_1_u {
- mmr_t sh_xn_uncorrected_detail_1_regval;
- struct {
- mmr_t ecc0_syndrome : 8;
- mmr_t ecc0_wc : 2;
- mmr_t ecc0_vc : 2;
- mmr_t reserved_0 : 4;
- mmr_t ecc1_syndrome : 8;
- mmr_t ecc1_wc : 2;
- mmr_t ecc1_vc : 2;
- mmr_t reserved_1 : 4;
- mmr_t ecc2_syndrome : 8;
- mmr_t ecc2_wc : 2;
- mmr_t ecc2_vc : 2;
- mmr_t reserved_2 : 4;
- mmr_t ecc3_syndrome : 8;
- mmr_t ecc3_wc : 2;
- mmr_t ecc3_vc : 2;
- mmr_t reserved_3 : 4;
- } sh_xn_uncorrected_detail_1_s;
-} sh_xn_uncorrected_detail_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_UNCORRECTED_DETAIL_2" */
-/* Uncorrected error data */
-/* ==================================================================== */
-
-typedef union sh_xn_uncorrected_detail_2_u {
- mmr_t sh_xn_uncorrected_detail_2_regval;
- struct {
- mmr_t data : 64;
- } sh_xn_uncorrected_detail_2_s;
-} sh_xn_uncorrected_detail_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_UNCORRECTED_DETAIL_3" */
-/* Uncorrected error header0 */
-/* ==================================================================== */
-
-typedef union sh_xn_uncorrected_detail_3_u {
- mmr_t sh_xn_uncorrected_detail_3_regval;
- struct {
- mmr_t header0 : 64;
- } sh_xn_uncorrected_detail_3_s;
-} sh_xn_uncorrected_detail_3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_UNCORRECTED_DETAIL_4" */
-/* Uncorrected error header1 */
-/* ==================================================================== */
-
-typedef union sh_xn_uncorrected_detail_4_u {
- mmr_t sh_xn_uncorrected_detail_4_regval;
- struct {
- mmr_t header1 : 42;
- mmr_t reserved_0 : 20;
- mmr_t err_group : 2;
- } sh_xn_uncorrected_detail_4_s;
-} sh_xn_uncorrected_detail_4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ERROR_DETAIL_1" */
-/* Look Up Table Address (md) */
-/* ==================================================================== */
-
-typedef union sh_xnmd_error_detail_1_u {
- mmr_t sh_xnmd_error_detail_1_regval;
- struct {
- mmr_t lut_addr : 11;
- mmr_t reserved_0 : 53;
- } sh_xnmd_error_detail_1_s;
-} sh_xnmd_error_detail_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ERROR_DETAIL_1" */
-/* Look Up Table Address (pi) */
-/* ==================================================================== */
-
-typedef union sh_xnpi_error_detail_1_u {
- mmr_t sh_xnpi_error_detail_1_regval;
- struct {
- mmr_t lut_addr : 11;
- mmr_t reserved_0 : 53;
- } sh_xnpi_error_detail_1_s;
-} sh_xnpi_error_detail_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_DETAIL_1" */
-/* Chiplet NoMatch header [63:0] */
-/* ==================================================================== */
-
-typedef union sh_xniilb_error_detail_1_u {
- mmr_t sh_xniilb_error_detail_1_regval;
- struct {
- mmr_t header : 64;
- } sh_xniilb_error_detail_1_s;
-} sh_xniilb_error_detail_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_DETAIL_2" */
-/* Chiplet NoMatch header [127:64] */
-/* ==================================================================== */
-
-typedef union sh_xniilb_error_detail_2_u {
- mmr_t sh_xniilb_error_detail_2_regval;
- struct {
- mmr_t header : 64;
- } sh_xniilb_error_detail_2_s;
-} sh_xniilb_error_detail_2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_DETAIL_3" */
-/* Look Up Table Address (iilb) */
-/* ==================================================================== */
-
-typedef union sh_xniilb_error_detail_3_u {
- mmr_t sh_xniilb_error_detail_3_regval;
- struct {
- mmr_t lut_addr : 11;
- mmr_t reserved_0 : 53;
- } sh_xniilb_error_detail_3_s;
-} sh_xniilb_error_detail_3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI0_ERROR_DETAIL_3" */
-/* Look Up Table Address (ni0) */
-/* ==================================================================== */
-
-typedef union sh_ni0_error_detail_3_u {
- mmr_t sh_ni0_error_detail_3_regval;
- struct {
- mmr_t lut_addr : 11;
- mmr_t reserved_0 : 53;
- } sh_ni0_error_detail_3_s;
-} sh_ni0_error_detail_3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_NI1_ERROR_DETAIL_3" */
-/* Look Up Table Address (ni1) */
-/* ==================================================================== */
-
-typedef union sh_ni1_error_detail_3_u {
- mmr_t sh_ni1_error_detail_3_regval;
- struct {
- mmr_t lut_addr : 11;
- mmr_t reserved_0 : 53;
- } sh_ni1_error_detail_3_s;
-} sh_ni1_error_detail_3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_ERROR_SUMMARY" */
-/* ==================================================================== */
-
-typedef union sh_xn_error_summary_u {
- mmr_t sh_xn_error_summary_regval;
- struct {
- mmr_t ni0_pop_overflow : 1;
- mmr_t ni0_push_overflow : 1;
- mmr_t ni0_credit_overflow : 1;
- mmr_t ni0_debit_overflow : 1;
- mmr_t ni0_pop_underflow : 1;
- mmr_t ni0_push_underflow : 1;
- mmr_t ni0_credit_underflow : 1;
- mmr_t ni0_llp_error : 1;
- mmr_t ni0_pipe_error : 1;
- mmr_t ni1_pop_overflow : 1;
- mmr_t ni1_push_overflow : 1;
- mmr_t ni1_credit_overflow : 1;
- mmr_t ni1_debit_overflow : 1;
- mmr_t ni1_pop_underflow : 1;
- mmr_t ni1_push_underflow : 1;
- mmr_t ni1_credit_underflow : 1;
- mmr_t ni1_llp_error : 1;
- mmr_t ni1_pipe_error : 1;
- mmr_t xnmd_credit_overflow : 1;
- mmr_t xnmd_debit_overflow : 1;
- mmr_t xnmd_data_buff_overflow : 1;
- mmr_t xnmd_credit_underflow : 1;
- mmr_t xnmd_sbe_error : 1;
- mmr_t xnmd_uce_error : 1;
- mmr_t xnmd_lut_error : 1;
- mmr_t xnpi_credit_overflow : 1;
- mmr_t xnpi_debit_overflow : 1;
- mmr_t xnpi_data_buff_overflow : 1;
- mmr_t xnpi_credit_underflow : 1;
- mmr_t xnpi_sbe_error : 1;
- mmr_t xnpi_uce_error : 1;
- mmr_t xnpi_lut_error : 1;
- mmr_t iilb_debit_overflow : 1;
- mmr_t iilb_credit_overflow : 1;
- mmr_t iilb_fifo_overflow : 1;
- mmr_t iilb_credit_underflow : 1;
- mmr_t iilb_fifo_underflow : 1;
- mmr_t iilb_chiplet_or_lut : 1;
- mmr_t reserved_0 : 26;
- } sh_xn_error_summary_s;
-} sh_xn_error_summary_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_ERROR_OVERFLOW" */
-/* ==================================================================== */
-
-typedef union sh_xn_error_overflow_u {
- mmr_t sh_xn_error_overflow_regval;
- struct {
- mmr_t ni0_pop_overflow : 1;
- mmr_t ni0_push_overflow : 1;
- mmr_t ni0_credit_overflow : 1;
- mmr_t ni0_debit_overflow : 1;
- mmr_t ni0_pop_underflow : 1;
- mmr_t ni0_push_underflow : 1;
- mmr_t ni0_credit_underflow : 1;
- mmr_t ni0_llp_error : 1;
- mmr_t ni0_pipe_error : 1;
- mmr_t ni1_pop_overflow : 1;
- mmr_t ni1_push_overflow : 1;
- mmr_t ni1_credit_overflow : 1;
- mmr_t ni1_debit_overflow : 1;
- mmr_t ni1_pop_underflow : 1;
- mmr_t ni1_push_underflow : 1;
- mmr_t ni1_credit_underflow : 1;
- mmr_t ni1_llp_error : 1;
- mmr_t ni1_pipe_error : 1;
- mmr_t xnmd_credit_overflow : 1;
- mmr_t xnmd_debit_overflow : 1;
- mmr_t xnmd_data_buff_overflow : 1;
- mmr_t xnmd_credit_underflow : 1;
- mmr_t xnmd_sbe_error : 1;
- mmr_t xnmd_uce_error : 1;
- mmr_t xnmd_lut_error : 1;
- mmr_t xnpi_credit_overflow : 1;
- mmr_t xnpi_debit_overflow : 1;
- mmr_t xnpi_data_buff_overflow : 1;
- mmr_t xnpi_credit_underflow : 1;
- mmr_t xnpi_sbe_error : 1;
- mmr_t xnpi_uce_error : 1;
- mmr_t xnpi_lut_error : 1;
- mmr_t iilb_debit_overflow : 1;
- mmr_t iilb_credit_overflow : 1;
- mmr_t iilb_fifo_overflow : 1;
- mmr_t iilb_credit_underflow : 1;
- mmr_t iilb_fifo_underflow : 1;
- mmr_t iilb_chiplet_or_lut : 1;
- mmr_t reserved_0 : 26;
- } sh_xn_error_overflow_s;
-} sh_xn_error_overflow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_ERROR_MASK" */
-/* ==================================================================== */
-
-typedef union sh_xn_error_mask_u {
- mmr_t sh_xn_error_mask_regval;
- struct {
- mmr_t ni0_pop_overflow : 1;
- mmr_t ni0_push_overflow : 1;
- mmr_t ni0_credit_overflow : 1;
- mmr_t ni0_debit_overflow : 1;
- mmr_t ni0_pop_underflow : 1;
- mmr_t ni0_push_underflow : 1;
- mmr_t ni0_credit_underflow : 1;
- mmr_t ni0_llp_error : 1;
- mmr_t ni0_pipe_error : 1;
- mmr_t ni1_pop_overflow : 1;
- mmr_t ni1_push_overflow : 1;
- mmr_t ni1_credit_overflow : 1;
- mmr_t ni1_debit_overflow : 1;
- mmr_t ni1_pop_underflow : 1;
- mmr_t ni1_push_underflow : 1;
- mmr_t ni1_credit_underflow : 1;
- mmr_t ni1_llp_error : 1;
- mmr_t ni1_pipe_error : 1;
- mmr_t xnmd_credit_overflow : 1;
- mmr_t xnmd_debit_overflow : 1;
- mmr_t xnmd_data_buff_overflow : 1;
- mmr_t xnmd_credit_underflow : 1;
- mmr_t xnmd_sbe_error : 1;
- mmr_t xnmd_uce_error : 1;
- mmr_t xnmd_lut_error : 1;
- mmr_t xnpi_credit_overflow : 1;
- mmr_t xnpi_debit_overflow : 1;
- mmr_t xnpi_data_buff_overflow : 1;
- mmr_t xnpi_credit_underflow : 1;
- mmr_t xnpi_sbe_error : 1;
- mmr_t xnpi_uce_error : 1;
- mmr_t xnpi_lut_error : 1;
- mmr_t iilb_debit_overflow : 1;
- mmr_t iilb_credit_overflow : 1;
- mmr_t iilb_fifo_overflow : 1;
- mmr_t iilb_credit_underflow : 1;
- mmr_t iilb_fifo_underflow : 1;
- mmr_t iilb_chiplet_or_lut : 1;
- mmr_t reserved_0 : 26;
- } sh_xn_error_mask_s;
-} sh_xn_error_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_FIRST_ERROR" */
-/* ==================================================================== */
-
-typedef union sh_xn_first_error_u {
- mmr_t sh_xn_first_error_regval;
- struct {
- mmr_t ni0_pop_overflow : 1;
- mmr_t ni0_push_overflow : 1;
- mmr_t ni0_credit_overflow : 1;
- mmr_t ni0_debit_overflow : 1;
- mmr_t ni0_pop_underflow : 1;
- mmr_t ni0_push_underflow : 1;
- mmr_t ni0_credit_underflow : 1;
- mmr_t ni0_llp_error : 1;
- mmr_t ni0_pipe_error : 1;
- mmr_t ni1_pop_overflow : 1;
- mmr_t ni1_push_overflow : 1;
- mmr_t ni1_credit_overflow : 1;
- mmr_t ni1_debit_overflow : 1;
- mmr_t ni1_pop_underflow : 1;
- mmr_t ni1_push_underflow : 1;
- mmr_t ni1_credit_underflow : 1;
- mmr_t ni1_llp_error : 1;
- mmr_t ni1_pipe_error : 1;
- mmr_t xnmd_credit_overflow : 1;
- mmr_t xnmd_debit_overflow : 1;
- mmr_t xnmd_data_buff_overflow : 1;
- mmr_t xnmd_credit_underflow : 1;
- mmr_t xnmd_sbe_error : 1;
- mmr_t xnmd_uce_error : 1;
- mmr_t xnmd_lut_error : 1;
- mmr_t xnpi_credit_overflow : 1;
- mmr_t xnpi_debit_overflow : 1;
- mmr_t xnpi_data_buff_overflow : 1;
- mmr_t xnpi_credit_underflow : 1;
- mmr_t xnpi_sbe_error : 1;
- mmr_t xnpi_uce_error : 1;
- mmr_t xnpi_lut_error : 1;
- mmr_t iilb_debit_overflow : 1;
- mmr_t iilb_credit_overflow : 1;
- mmr_t iilb_fifo_overflow : 1;
- mmr_t iilb_credit_underflow : 1;
- mmr_t iilb_fifo_underflow : 1;
- mmr_t iilb_chiplet_or_lut : 1;
- mmr_t reserved_0 : 26;
- } sh_xn_first_error_s;
-} sh_xn_first_error_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_SUMMARY" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_error_summary_u {
- mmr_t sh_xniilb_error_summary_regval;
- struct {
- mmr_t overflow_ii_debit0 : 1;
- mmr_t overflow_ii_debit2 : 1;
- mmr_t overflow_lb_debit0 : 1;
- mmr_t overflow_lb_debit2 : 1;
- mmr_t overflow_ii_vc0 : 1;
- mmr_t overflow_ii_vc2 : 1;
- mmr_t underflow_ii_vc0 : 1;
- mmr_t underflow_ii_vc2 : 1;
- mmr_t overflow_lb_vc0 : 1;
- mmr_t overflow_lb_vc2 : 1;
- mmr_t underflow_lb_vc0 : 1;
- mmr_t underflow_lb_vc2 : 1;
- mmr_t overflow_pi_vc0_credit_in : 1;
- mmr_t overflow_iilb_vc0_credit_in : 1;
- mmr_t overflow_md_vc0_credit_in : 1;
- mmr_t overflow_ni0_vc0_credit_in : 1;
- mmr_t overflow_ni1_vc0_credit_in : 1;
- mmr_t overflow_pi_vc2_credit_in : 1;
- mmr_t overflow_iilb_vc2_credit_in : 1;
- mmr_t overflow_md_vc2_credit_in : 1;
- mmr_t overflow_ni0_vc2_credit_in : 1;
- mmr_t overflow_ni1_vc2_credit_in : 1;
- mmr_t underflow_pi_vc0_credit_in : 1;
- mmr_t underflow_iilb_vc0_credit_in : 1;
- mmr_t underflow_md_vc0_credit_in : 1;
- mmr_t underflow_ni0_vc0_credit_in : 1;
- mmr_t underflow_ni1_vc0_credit_in : 1;
- mmr_t underflow_pi_vc2_credit_in : 1;
- mmr_t underflow_iilb_vc2_credit_in : 1;
- mmr_t underflow_md_vc2_credit_in : 1;
- mmr_t underflow_ni0_vc2_credit_in : 1;
- mmr_t underflow_ni1_vc2_credit_in : 1;
- mmr_t overflow_pi_debit0 : 1;
- mmr_t overflow_pi_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t overflow_md_debit0 : 1;
- mmr_t overflow_md_debit2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_pi_vc0_credit_out : 1;
- mmr_t overflow_pi_vc2_credit_out : 1;
- mmr_t overflow_md_vc0_credit_out : 1;
- mmr_t overflow_md_vc2_credit_out : 1;
- mmr_t overflow_iilb_vc0_credit_out : 1;
- mmr_t overflow_iilb_vc2_credit_out : 1;
- mmr_t overflow_ni0_vc0_credit_out : 1;
- mmr_t overflow_ni0_vc2_credit_out : 1;
- mmr_t overflow_ni1_vc0_credit_out : 1;
- mmr_t overflow_ni1_vc2_credit_out : 1;
- mmr_t underflow_pi_vc0_credit_out : 1;
- mmr_t underflow_pi_vc2_credit_out : 1;
- mmr_t underflow_md_vc0_credit_out : 1;
- mmr_t underflow_md_vc2_credit_out : 1;
- mmr_t underflow_iilb_vc0_credit_out : 1;
- mmr_t underflow_iilb_vc2_credit_out : 1;
- mmr_t underflow_ni0_vc0_credit_out : 1;
- mmr_t underflow_ni0_vc2_credit_out : 1;
- mmr_t underflow_ni1_vc0_credit_out : 1;
- mmr_t underflow_ni1_vc2_credit_out : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- } sh_xniilb_error_summary_s;
-} sh_xniilb_error_summary_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_OVERFLOW" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_error_overflow_u {
- mmr_t sh_xniilb_error_overflow_regval;
- struct {
- mmr_t overflow_ii_debit0 : 1;
- mmr_t overflow_ii_debit2 : 1;
- mmr_t overflow_lb_debit0 : 1;
- mmr_t overflow_lb_debit2 : 1;
- mmr_t overflow_ii_vc0 : 1;
- mmr_t overflow_ii_vc2 : 1;
- mmr_t underflow_ii_vc0 : 1;
- mmr_t underflow_ii_vc2 : 1;
- mmr_t overflow_lb_vc0 : 1;
- mmr_t overflow_lb_vc2 : 1;
- mmr_t underflow_lb_vc0 : 1;
- mmr_t underflow_lb_vc2 : 1;
- mmr_t overflow_pi_vc0_credit_in : 1;
- mmr_t overflow_iilb_vc0_credit_in : 1;
- mmr_t overflow_md_vc0_credit_in : 1;
- mmr_t overflow_ni0_vc0_credit_in : 1;
- mmr_t overflow_ni1_vc0_credit_in : 1;
- mmr_t overflow_pi_vc2_credit_in : 1;
- mmr_t overflow_iilb_vc2_credit_in : 1;
- mmr_t overflow_md_vc2_credit_in : 1;
- mmr_t overflow_ni0_vc2_credit_in : 1;
- mmr_t overflow_ni1_vc2_credit_in : 1;
- mmr_t underflow_pi_vc0_credit_in : 1;
- mmr_t underflow_iilb_vc0_credit_in : 1;
- mmr_t underflow_md_vc0_credit_in : 1;
- mmr_t underflow_ni0_vc0_credit_in : 1;
- mmr_t underflow_ni1_vc0_credit_in : 1;
- mmr_t underflow_pi_vc2_credit_in : 1;
- mmr_t underflow_iilb_vc2_credit_in : 1;
- mmr_t underflow_md_vc2_credit_in : 1;
- mmr_t underflow_ni0_vc2_credit_in : 1;
- mmr_t underflow_ni1_vc2_credit_in : 1;
- mmr_t overflow_pi_debit0 : 1;
- mmr_t overflow_pi_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t overflow_md_debit0 : 1;
- mmr_t overflow_md_debit2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_pi_vc0_credit_out : 1;
- mmr_t overflow_pi_vc2_credit_out : 1;
- mmr_t overflow_md_vc0_credit_out : 1;
- mmr_t overflow_md_vc2_credit_out : 1;
- mmr_t overflow_iilb_vc0_credit_out : 1;
- mmr_t overflow_iilb_vc2_credit_out : 1;
- mmr_t overflow_ni0_vc0_credit_out : 1;
- mmr_t overflow_ni0_vc2_credit_out : 1;
- mmr_t overflow_ni1_vc0_credit_out : 1;
- mmr_t overflow_ni1_vc2_credit_out : 1;
- mmr_t underflow_pi_vc0_credit_out : 1;
- mmr_t underflow_pi_vc2_credit_out : 1;
- mmr_t underflow_md_vc0_credit_out : 1;
- mmr_t underflow_md_vc2_credit_out : 1;
- mmr_t underflow_iilb_vc0_credit_out : 1;
- mmr_t underflow_iilb_vc2_credit_out : 1;
- mmr_t underflow_ni0_vc0_credit_out : 1;
- mmr_t underflow_ni0_vc2_credit_out : 1;
- mmr_t underflow_ni1_vc0_credit_out : 1;
- mmr_t underflow_ni1_vc2_credit_out : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- } sh_xniilb_error_overflow_s;
-} sh_xniilb_error_overflow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_ERROR_MASK" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_error_mask_u {
- mmr_t sh_xniilb_error_mask_regval;
- struct {
- mmr_t overflow_ii_debit0 : 1;
- mmr_t overflow_ii_debit2 : 1;
- mmr_t overflow_lb_debit0 : 1;
- mmr_t overflow_lb_debit2 : 1;
- mmr_t overflow_ii_vc0 : 1;
- mmr_t overflow_ii_vc2 : 1;
- mmr_t underflow_ii_vc0 : 1;
- mmr_t underflow_ii_vc2 : 1;
- mmr_t overflow_lb_vc0 : 1;
- mmr_t overflow_lb_vc2 : 1;
- mmr_t underflow_lb_vc0 : 1;
- mmr_t underflow_lb_vc2 : 1;
- mmr_t overflow_pi_vc0_credit_in : 1;
- mmr_t overflow_iilb_vc0_credit_in : 1;
- mmr_t overflow_md_vc0_credit_in : 1;
- mmr_t overflow_ni0_vc0_credit_in : 1;
- mmr_t overflow_ni1_vc0_credit_in : 1;
- mmr_t overflow_pi_vc2_credit_in : 1;
- mmr_t overflow_iilb_vc2_credit_in : 1;
- mmr_t overflow_md_vc2_credit_in : 1;
- mmr_t overflow_ni0_vc2_credit_in : 1;
- mmr_t overflow_ni1_vc2_credit_in : 1;
- mmr_t underflow_pi_vc0_credit_in : 1;
- mmr_t underflow_iilb_vc0_credit_in : 1;
- mmr_t underflow_md_vc0_credit_in : 1;
- mmr_t underflow_ni0_vc0_credit_in : 1;
- mmr_t underflow_ni1_vc0_credit_in : 1;
- mmr_t underflow_pi_vc2_credit_in : 1;
- mmr_t underflow_iilb_vc2_credit_in : 1;
- mmr_t underflow_md_vc2_credit_in : 1;
- mmr_t underflow_ni0_vc2_credit_in : 1;
- mmr_t underflow_ni1_vc2_credit_in : 1;
- mmr_t overflow_pi_debit0 : 1;
- mmr_t overflow_pi_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t overflow_md_debit0 : 1;
- mmr_t overflow_md_debit2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_pi_vc0_credit_out : 1;
- mmr_t overflow_pi_vc2_credit_out : 1;
- mmr_t overflow_md_vc0_credit_out : 1;
- mmr_t overflow_md_vc2_credit_out : 1;
- mmr_t overflow_iilb_vc0_credit_out : 1;
- mmr_t overflow_iilb_vc2_credit_out : 1;
- mmr_t overflow_ni0_vc0_credit_out : 1;
- mmr_t overflow_ni0_vc2_credit_out : 1;
- mmr_t overflow_ni1_vc0_credit_out : 1;
- mmr_t overflow_ni1_vc2_credit_out : 1;
- mmr_t underflow_pi_vc0_credit_out : 1;
- mmr_t underflow_pi_vc2_credit_out : 1;
- mmr_t underflow_md_vc0_credit_out : 1;
- mmr_t underflow_md_vc2_credit_out : 1;
- mmr_t underflow_iilb_vc0_credit_out : 1;
- mmr_t underflow_iilb_vc2_credit_out : 1;
- mmr_t underflow_ni0_vc0_credit_out : 1;
- mmr_t underflow_ni0_vc2_credit_out : 1;
- mmr_t underflow_ni1_vc0_credit_out : 1;
- mmr_t underflow_ni1_vc2_credit_out : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- } sh_xniilb_error_mask_s;
-} sh_xniilb_error_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNIILB_FIRST_ERROR" */
-/* ==================================================================== */
-
-typedef union sh_xniilb_first_error_u {
- mmr_t sh_xniilb_first_error_regval;
- struct {
- mmr_t overflow_ii_debit0 : 1;
- mmr_t overflow_ii_debit2 : 1;
- mmr_t overflow_lb_debit0 : 1;
- mmr_t overflow_lb_debit2 : 1;
- mmr_t overflow_ii_vc0 : 1;
- mmr_t overflow_ii_vc2 : 1;
- mmr_t underflow_ii_vc0 : 1;
- mmr_t underflow_ii_vc2 : 1;
- mmr_t overflow_lb_vc0 : 1;
- mmr_t overflow_lb_vc2 : 1;
- mmr_t underflow_lb_vc0 : 1;
- mmr_t underflow_lb_vc2 : 1;
- mmr_t overflow_pi_vc0_credit_in : 1;
- mmr_t overflow_iilb_vc0_credit_in : 1;
- mmr_t overflow_md_vc0_credit_in : 1;
- mmr_t overflow_ni0_vc0_credit_in : 1;
- mmr_t overflow_ni1_vc0_credit_in : 1;
- mmr_t overflow_pi_vc2_credit_in : 1;
- mmr_t overflow_iilb_vc2_credit_in : 1;
- mmr_t overflow_md_vc2_credit_in : 1;
- mmr_t overflow_ni0_vc2_credit_in : 1;
- mmr_t overflow_ni1_vc2_credit_in : 1;
- mmr_t underflow_pi_vc0_credit_in : 1;
- mmr_t underflow_iilb_vc0_credit_in : 1;
- mmr_t underflow_md_vc0_credit_in : 1;
- mmr_t underflow_ni0_vc0_credit_in : 1;
- mmr_t underflow_ni1_vc0_credit_in : 1;
- mmr_t underflow_pi_vc2_credit_in : 1;
- mmr_t underflow_iilb_vc2_credit_in : 1;
- mmr_t underflow_md_vc2_credit_in : 1;
- mmr_t underflow_ni0_vc2_credit_in : 1;
- mmr_t underflow_ni1_vc2_credit_in : 1;
- mmr_t overflow_pi_debit0 : 1;
- mmr_t overflow_pi_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t overflow_md_debit0 : 1;
- mmr_t overflow_md_debit2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_pi_vc0_credit_out : 1;
- mmr_t overflow_pi_vc2_credit_out : 1;
- mmr_t overflow_md_vc0_credit_out : 1;
- mmr_t overflow_md_vc2_credit_out : 1;
- mmr_t overflow_iilb_vc0_credit_out : 1;
- mmr_t overflow_iilb_vc2_credit_out : 1;
- mmr_t overflow_ni0_vc0_credit_out : 1;
- mmr_t overflow_ni0_vc2_credit_out : 1;
- mmr_t overflow_ni1_vc0_credit_out : 1;
- mmr_t overflow_ni1_vc2_credit_out : 1;
- mmr_t underflow_pi_vc0_credit_out : 1;
- mmr_t underflow_pi_vc2_credit_out : 1;
- mmr_t underflow_md_vc0_credit_out : 1;
- mmr_t underflow_md_vc2_credit_out : 1;
- mmr_t underflow_iilb_vc0_credit_out : 1;
- mmr_t underflow_iilb_vc2_credit_out : 1;
- mmr_t underflow_ni0_vc0_credit_out : 1;
- mmr_t underflow_ni0_vc2_credit_out : 1;
- mmr_t underflow_ni1_vc0_credit_out : 1;
- mmr_t underflow_ni1_vc2_credit_out : 1;
- mmr_t chiplet_nomatch : 1;
- mmr_t lut_read_error : 1;
- } sh_xniilb_first_error_s;
-} sh_xniilb_first_error_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ERROR_SUMMARY" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_error_summary_u {
- mmr_t sh_xnpi_error_summary_regval;
- struct {
- mmr_t underflow_ni0_vc0 : 1;
- mmr_t overflow_ni0_vc0 : 1;
- mmr_t underflow_ni0_vc2 : 1;
- mmr_t overflow_ni0_vc2 : 1;
- mmr_t underflow_ni1_vc0 : 1;
- mmr_t overflow_ni1_vc0 : 1;
- mmr_t underflow_ni1_vc2 : 1;
- mmr_t overflow_ni1_vc2 : 1;
- mmr_t underflow_iilb_vc0 : 1;
- mmr_t overflow_iilb_vc0 : 1;
- mmr_t underflow_iilb_vc2 : 1;
- mmr_t overflow_iilb_vc2 : 1;
- mmr_t underflow_vc0_credit : 1;
- mmr_t overflow_vc0_credit : 1;
- mmr_t underflow_vc2_credit : 1;
- mmr_t overflow_vc2_credit : 1;
- mmr_t overflow_databuff_vc0 : 1;
- mmr_t overflow_databuff_vc2 : 1;
- mmr_t lut_read_error : 1;
- mmr_t single_bit_error0 : 1;
- mmr_t single_bit_error1 : 1;
- mmr_t single_bit_error2 : 1;
- mmr_t single_bit_error3 : 1;
- mmr_t uncor_error0 : 1;
- mmr_t uncor_error1 : 1;
- mmr_t uncor_error2 : 1;
- mmr_t uncor_error3 : 1;
- mmr_t underflow_sic_cntr0 : 1;
- mmr_t overflow_sic_cntr0 : 1;
- mmr_t underflow_sic_cntr2 : 1;
- mmr_t overflow_sic_cntr2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t underflow_ni0_vc0_credit : 1;
- mmr_t overflow_ni0_vc0_credit : 1;
- mmr_t underflow_ni0_vc2_credit : 1;
- mmr_t overflow_ni0_vc2_credit : 1;
- mmr_t underflow_ni1_vc0_credit : 1;
- mmr_t overflow_ni1_vc0_credit : 1;
- mmr_t underflow_ni1_vc2_credit : 1;
- mmr_t overflow_ni1_vc2_credit : 1;
- mmr_t underflow_iilb_vc0_credit : 1;
- mmr_t overflow_iilb_vc0_credit : 1;
- mmr_t underflow_iilb_vc2_credit : 1;
- mmr_t overflow_iilb_vc2_credit : 1;
- mmr_t overflow_header_cancel_fifo : 1;
- mmr_t reserved_0 : 14;
- } sh_xnpi_error_summary_s;
-} sh_xnpi_error_summary_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ERROR_OVERFLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_error_overflow_u {
- mmr_t sh_xnpi_error_overflow_regval;
- struct {
- mmr_t underflow_ni0_vc0 : 1;
- mmr_t overflow_ni0_vc0 : 1;
- mmr_t underflow_ni0_vc2 : 1;
- mmr_t overflow_ni0_vc2 : 1;
- mmr_t underflow_ni1_vc0 : 1;
- mmr_t overflow_ni1_vc0 : 1;
- mmr_t underflow_ni1_vc2 : 1;
- mmr_t overflow_ni1_vc2 : 1;
- mmr_t underflow_iilb_vc0 : 1;
- mmr_t overflow_iilb_vc0 : 1;
- mmr_t underflow_iilb_vc2 : 1;
- mmr_t overflow_iilb_vc2 : 1;
- mmr_t underflow_vc0_credit : 1;
- mmr_t overflow_vc0_credit : 1;
- mmr_t underflow_vc2_credit : 1;
- mmr_t overflow_vc2_credit : 1;
- mmr_t overflow_databuff_vc0 : 1;
- mmr_t overflow_databuff_vc2 : 1;
- mmr_t lut_read_error : 1;
- mmr_t single_bit_error0 : 1;
- mmr_t single_bit_error1 : 1;
- mmr_t single_bit_error2 : 1;
- mmr_t single_bit_error3 : 1;
- mmr_t uncor_error0 : 1;
- mmr_t uncor_error1 : 1;
- mmr_t uncor_error2 : 1;
- mmr_t uncor_error3 : 1;
- mmr_t underflow_sic_cntr0 : 1;
- mmr_t overflow_sic_cntr0 : 1;
- mmr_t underflow_sic_cntr2 : 1;
- mmr_t overflow_sic_cntr2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t underflow_ni0_vc0_credit : 1;
- mmr_t overflow_ni0_vc0_credit : 1;
- mmr_t underflow_ni0_vc2_credit : 1;
- mmr_t overflow_ni0_vc2_credit : 1;
- mmr_t underflow_ni1_vc0_credit : 1;
- mmr_t overflow_ni1_vc0_credit : 1;
- mmr_t underflow_ni1_vc2_credit : 1;
- mmr_t overflow_ni1_vc2_credit : 1;
- mmr_t underflow_iilb_vc0_credit : 1;
- mmr_t overflow_iilb_vc0_credit : 1;
- mmr_t underflow_iilb_vc2_credit : 1;
- mmr_t overflow_iilb_vc2_credit : 1;
- mmr_t overflow_header_cancel_fifo : 1;
- mmr_t reserved_0 : 14;
- } sh_xnpi_error_overflow_s;
-} sh_xnpi_error_overflow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_ERROR_MASK" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_error_mask_u {
- mmr_t sh_xnpi_error_mask_regval;
- struct {
- mmr_t underflow_ni0_vc0 : 1;
- mmr_t overflow_ni0_vc0 : 1;
- mmr_t underflow_ni0_vc2 : 1;
- mmr_t overflow_ni0_vc2 : 1;
- mmr_t underflow_ni1_vc0 : 1;
- mmr_t overflow_ni1_vc0 : 1;
- mmr_t underflow_ni1_vc2 : 1;
- mmr_t overflow_ni1_vc2 : 1;
- mmr_t underflow_iilb_vc0 : 1;
- mmr_t overflow_iilb_vc0 : 1;
- mmr_t underflow_iilb_vc2 : 1;
- mmr_t overflow_iilb_vc2 : 1;
- mmr_t underflow_vc0_credit : 1;
- mmr_t overflow_vc0_credit : 1;
- mmr_t underflow_vc2_credit : 1;
- mmr_t overflow_vc2_credit : 1;
- mmr_t overflow_databuff_vc0 : 1;
- mmr_t overflow_databuff_vc2 : 1;
- mmr_t lut_read_error : 1;
- mmr_t single_bit_error0 : 1;
- mmr_t single_bit_error1 : 1;
- mmr_t single_bit_error2 : 1;
- mmr_t single_bit_error3 : 1;
- mmr_t uncor_error0 : 1;
- mmr_t uncor_error1 : 1;
- mmr_t uncor_error2 : 1;
- mmr_t uncor_error3 : 1;
- mmr_t underflow_sic_cntr0 : 1;
- mmr_t overflow_sic_cntr0 : 1;
- mmr_t underflow_sic_cntr2 : 1;
- mmr_t overflow_sic_cntr2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t underflow_ni0_vc0_credit : 1;
- mmr_t overflow_ni0_vc0_credit : 1;
- mmr_t underflow_ni0_vc2_credit : 1;
- mmr_t overflow_ni0_vc2_credit : 1;
- mmr_t underflow_ni1_vc0_credit : 1;
- mmr_t overflow_ni1_vc0_credit : 1;
- mmr_t underflow_ni1_vc2_credit : 1;
- mmr_t overflow_ni1_vc2_credit : 1;
- mmr_t underflow_iilb_vc0_credit : 1;
- mmr_t overflow_iilb_vc0_credit : 1;
- mmr_t underflow_iilb_vc2_credit : 1;
- mmr_t overflow_iilb_vc2_credit : 1;
- mmr_t overflow_header_cancel_fifo : 1;
- mmr_t reserved_0 : 14;
- } sh_xnpi_error_mask_s;
-} sh_xnpi_error_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNPI_FIRST_ERROR" */
-/* ==================================================================== */
-
-typedef union sh_xnpi_first_error_u {
- mmr_t sh_xnpi_first_error_regval;
- struct {
- mmr_t underflow_ni0_vc0 : 1;
- mmr_t overflow_ni0_vc0 : 1;
- mmr_t underflow_ni0_vc2 : 1;
- mmr_t overflow_ni0_vc2 : 1;
- mmr_t underflow_ni1_vc0 : 1;
- mmr_t overflow_ni1_vc0 : 1;
- mmr_t underflow_ni1_vc2 : 1;
- mmr_t overflow_ni1_vc2 : 1;
- mmr_t underflow_iilb_vc0 : 1;
- mmr_t overflow_iilb_vc0 : 1;
- mmr_t underflow_iilb_vc2 : 1;
- mmr_t overflow_iilb_vc2 : 1;
- mmr_t underflow_vc0_credit : 1;
- mmr_t overflow_vc0_credit : 1;
- mmr_t underflow_vc2_credit : 1;
- mmr_t overflow_vc2_credit : 1;
- mmr_t overflow_databuff_vc0 : 1;
- mmr_t overflow_databuff_vc2 : 1;
- mmr_t lut_read_error : 1;
- mmr_t single_bit_error0 : 1;
- mmr_t single_bit_error1 : 1;
- mmr_t single_bit_error2 : 1;
- mmr_t single_bit_error3 : 1;
- mmr_t uncor_error0 : 1;
- mmr_t uncor_error1 : 1;
- mmr_t uncor_error2 : 1;
- mmr_t uncor_error3 : 1;
- mmr_t underflow_sic_cntr0 : 1;
- mmr_t overflow_sic_cntr0 : 1;
- mmr_t underflow_sic_cntr2 : 1;
- mmr_t overflow_sic_cntr2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t underflow_ni0_vc0_credit : 1;
- mmr_t overflow_ni0_vc0_credit : 1;
- mmr_t underflow_ni0_vc2_credit : 1;
- mmr_t overflow_ni0_vc2_credit : 1;
- mmr_t underflow_ni1_vc0_credit : 1;
- mmr_t overflow_ni1_vc0_credit : 1;
- mmr_t underflow_ni1_vc2_credit : 1;
- mmr_t overflow_ni1_vc2_credit : 1;
- mmr_t underflow_iilb_vc0_credit : 1;
- mmr_t overflow_iilb_vc0_credit : 1;
- mmr_t underflow_iilb_vc2_credit : 1;
- mmr_t overflow_iilb_vc2_credit : 1;
- mmr_t overflow_header_cancel_fifo : 1;
- mmr_t reserved_0 : 14;
- } sh_xnpi_first_error_s;
-} sh_xnpi_first_error_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ERROR_SUMMARY" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_error_summary_u {
- mmr_t sh_xnmd_error_summary_regval;
- struct {
- mmr_t underflow_ni0_vc0 : 1;
- mmr_t overflow_ni0_vc0 : 1;
- mmr_t underflow_ni0_vc2 : 1;
- mmr_t overflow_ni0_vc2 : 1;
- mmr_t underflow_ni1_vc0 : 1;
- mmr_t overflow_ni1_vc0 : 1;
- mmr_t underflow_ni1_vc2 : 1;
- mmr_t overflow_ni1_vc2 : 1;
- mmr_t underflow_iilb_vc0 : 1;
- mmr_t overflow_iilb_vc0 : 1;
- mmr_t underflow_iilb_vc2 : 1;
- mmr_t overflow_iilb_vc2 : 1;
- mmr_t underflow_vc0_credit : 1;
- mmr_t overflow_vc0_credit : 1;
- mmr_t underflow_vc2_credit : 1;
- mmr_t overflow_vc2_credit : 1;
- mmr_t overflow_databuff_vc0 : 1;
- mmr_t overflow_databuff_vc2 : 1;
- mmr_t lut_read_error : 1;
- mmr_t single_bit_error0 : 1;
- mmr_t single_bit_error1 : 1;
- mmr_t single_bit_error2 : 1;
- mmr_t single_bit_error3 : 1;
- mmr_t uncor_error0 : 1;
- mmr_t uncor_error1 : 1;
- mmr_t uncor_error2 : 1;
- mmr_t uncor_error3 : 1;
- mmr_t underflow_sic_cntr0 : 1;
- mmr_t overflow_sic_cntr0 : 1;
- mmr_t underflow_sic_cntr2 : 1;
- mmr_t overflow_sic_cntr2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t underflow_ni0_vc0_credit : 1;
- mmr_t overflow_ni0_vc0_credit : 1;
- mmr_t underflow_ni0_vc2_credit : 1;
- mmr_t overflow_ni0_vc2_credit : 1;
- mmr_t underflow_ni1_vc0_credit : 1;
- mmr_t overflow_ni1_vc0_credit : 1;
- mmr_t underflow_ni1_vc2_credit : 1;
- mmr_t overflow_ni1_vc2_credit : 1;
- mmr_t underflow_iilb_vc0_credit : 1;
- mmr_t overflow_iilb_vc0_credit : 1;
- mmr_t underflow_iilb_vc2_credit : 1;
- mmr_t overflow_iilb_vc2_credit : 1;
- mmr_t overflow_header_cancel_fifo : 1;
- mmr_t reserved_0 : 14;
- } sh_xnmd_error_summary_s;
-} sh_xnmd_error_summary_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ERROR_OVERFLOW" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_error_overflow_u {
- mmr_t sh_xnmd_error_overflow_regval;
- struct {
- mmr_t underflow_ni0_vc0 : 1;
- mmr_t overflow_ni0_vc0 : 1;
- mmr_t underflow_ni0_vc2 : 1;
- mmr_t overflow_ni0_vc2 : 1;
- mmr_t underflow_ni1_vc0 : 1;
- mmr_t overflow_ni1_vc0 : 1;
- mmr_t underflow_ni1_vc2 : 1;
- mmr_t overflow_ni1_vc2 : 1;
- mmr_t underflow_iilb_vc0 : 1;
- mmr_t overflow_iilb_vc0 : 1;
- mmr_t underflow_iilb_vc2 : 1;
- mmr_t overflow_iilb_vc2 : 1;
- mmr_t underflow_vc0_credit : 1;
- mmr_t overflow_vc0_credit : 1;
- mmr_t underflow_vc2_credit : 1;
- mmr_t overflow_vc2_credit : 1;
- mmr_t overflow_databuff_vc0 : 1;
- mmr_t overflow_databuff_vc2 : 1;
- mmr_t lut_read_error : 1;
- mmr_t single_bit_error0 : 1;
- mmr_t single_bit_error1 : 1;
- mmr_t single_bit_error2 : 1;
- mmr_t single_bit_error3 : 1;
- mmr_t uncor_error0 : 1;
- mmr_t uncor_error1 : 1;
- mmr_t uncor_error2 : 1;
- mmr_t uncor_error3 : 1;
- mmr_t underflow_sic_cntr0 : 1;
- mmr_t overflow_sic_cntr0 : 1;
- mmr_t underflow_sic_cntr2 : 1;
- mmr_t overflow_sic_cntr2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t underflow_ni0_vc0_credit : 1;
- mmr_t overflow_ni0_vc0_credit : 1;
- mmr_t underflow_ni0_vc2_credit : 1;
- mmr_t overflow_ni0_vc2_credit : 1;
- mmr_t underflow_ni1_vc0_credit : 1;
- mmr_t overflow_ni1_vc0_credit : 1;
- mmr_t underflow_ni1_vc2_credit : 1;
- mmr_t overflow_ni1_vc2_credit : 1;
- mmr_t underflow_iilb_vc0_credit : 1;
- mmr_t overflow_iilb_vc0_credit : 1;
- mmr_t underflow_iilb_vc2_credit : 1;
- mmr_t overflow_iilb_vc2_credit : 1;
- mmr_t overflow_header_cancel_fifo : 1;
- mmr_t reserved_0 : 14;
- } sh_xnmd_error_overflow_s;
-} sh_xnmd_error_overflow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_ERROR_MASK" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_error_mask_u {
- mmr_t sh_xnmd_error_mask_regval;
- struct {
- mmr_t underflow_ni0_vc0 : 1;
- mmr_t overflow_ni0_vc0 : 1;
- mmr_t underflow_ni0_vc2 : 1;
- mmr_t overflow_ni0_vc2 : 1;
- mmr_t underflow_ni1_vc0 : 1;
- mmr_t overflow_ni1_vc0 : 1;
- mmr_t underflow_ni1_vc2 : 1;
- mmr_t overflow_ni1_vc2 : 1;
- mmr_t underflow_iilb_vc0 : 1;
- mmr_t overflow_iilb_vc0 : 1;
- mmr_t underflow_iilb_vc2 : 1;
- mmr_t overflow_iilb_vc2 : 1;
- mmr_t underflow_vc0_credit : 1;
- mmr_t overflow_vc0_credit : 1;
- mmr_t underflow_vc2_credit : 1;
- mmr_t overflow_vc2_credit : 1;
- mmr_t overflow_databuff_vc0 : 1;
- mmr_t overflow_databuff_vc2 : 1;
- mmr_t lut_read_error : 1;
- mmr_t single_bit_error0 : 1;
- mmr_t single_bit_error1 : 1;
- mmr_t single_bit_error2 : 1;
- mmr_t single_bit_error3 : 1;
- mmr_t uncor_error0 : 1;
- mmr_t uncor_error1 : 1;
- mmr_t uncor_error2 : 1;
- mmr_t uncor_error3 : 1;
- mmr_t underflow_sic_cntr0 : 1;
- mmr_t overflow_sic_cntr0 : 1;
- mmr_t underflow_sic_cntr2 : 1;
- mmr_t overflow_sic_cntr2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t underflow_ni0_vc0_credit : 1;
- mmr_t overflow_ni0_vc0_credit : 1;
- mmr_t underflow_ni0_vc2_credit : 1;
- mmr_t overflow_ni0_vc2_credit : 1;
- mmr_t underflow_ni1_vc0_credit : 1;
- mmr_t overflow_ni1_vc0_credit : 1;
- mmr_t underflow_ni1_vc2_credit : 1;
- mmr_t overflow_ni1_vc2_credit : 1;
- mmr_t underflow_iilb_vc0_credit : 1;
- mmr_t overflow_iilb_vc0_credit : 1;
- mmr_t underflow_iilb_vc2_credit : 1;
- mmr_t overflow_iilb_vc2_credit : 1;
- mmr_t overflow_header_cancel_fifo : 1;
- mmr_t reserved_0 : 14;
- } sh_xnmd_error_mask_s;
-} sh_xnmd_error_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XNMD_FIRST_ERROR" */
-/* ==================================================================== */
-
-typedef union sh_xnmd_first_error_u {
- mmr_t sh_xnmd_first_error_regval;
- struct {
- mmr_t underflow_ni0_vc0 : 1;
- mmr_t overflow_ni0_vc0 : 1;
- mmr_t underflow_ni0_vc2 : 1;
- mmr_t overflow_ni0_vc2 : 1;
- mmr_t underflow_ni1_vc0 : 1;
- mmr_t overflow_ni1_vc0 : 1;
- mmr_t underflow_ni1_vc2 : 1;
- mmr_t overflow_ni1_vc2 : 1;
- mmr_t underflow_iilb_vc0 : 1;
- mmr_t overflow_iilb_vc0 : 1;
- mmr_t underflow_iilb_vc2 : 1;
- mmr_t overflow_iilb_vc2 : 1;
- mmr_t underflow_vc0_credit : 1;
- mmr_t overflow_vc0_credit : 1;
- mmr_t underflow_vc2_credit : 1;
- mmr_t overflow_vc2_credit : 1;
- mmr_t overflow_databuff_vc0 : 1;
- mmr_t overflow_databuff_vc2 : 1;
- mmr_t lut_read_error : 1;
- mmr_t single_bit_error0 : 1;
- mmr_t single_bit_error1 : 1;
- mmr_t single_bit_error2 : 1;
- mmr_t single_bit_error3 : 1;
- mmr_t uncor_error0 : 1;
- mmr_t uncor_error1 : 1;
- mmr_t uncor_error2 : 1;
- mmr_t uncor_error3 : 1;
- mmr_t underflow_sic_cntr0 : 1;
- mmr_t overflow_sic_cntr0 : 1;
- mmr_t underflow_sic_cntr2 : 1;
- mmr_t overflow_sic_cntr2 : 1;
- mmr_t overflow_ni0_debit0 : 1;
- mmr_t overflow_ni0_debit2 : 1;
- mmr_t overflow_ni1_debit0 : 1;
- mmr_t overflow_ni1_debit2 : 1;
- mmr_t overflow_iilb_debit0 : 1;
- mmr_t overflow_iilb_debit2 : 1;
- mmr_t underflow_ni0_vc0_credit : 1;
- mmr_t overflow_ni0_vc0_credit : 1;
- mmr_t underflow_ni0_vc2_credit : 1;
- mmr_t overflow_ni0_vc2_credit : 1;
- mmr_t underflow_ni1_vc0_credit : 1;
- mmr_t overflow_ni1_vc0_credit : 1;
- mmr_t underflow_ni1_vc2_credit : 1;
- mmr_t overflow_ni1_vc2_credit : 1;
- mmr_t underflow_iilb_vc0_credit : 1;
- mmr_t overflow_iilb_vc0_credit : 1;
- mmr_t underflow_iilb_vc2_credit : 1;
- mmr_t overflow_iilb_vc2_credit : 1;
- mmr_t overflow_header_cancel_fifo : 1;
- mmr_t reserved_0 : 14;
- } sh_xnmd_first_error_s;
-} sh_xnmd_first_error_u_t;
-
-/* ==================================================================== */
-/* Register "SH_AUTO_REPLY_ENABLE0" */
-/* Automatic Maintenance Reply Enable 0 */
-/* ==================================================================== */
-
-typedef union sh_auto_reply_enable0_u {
- mmr_t sh_auto_reply_enable0_regval;
- struct {
- mmr_t enable0 : 64;
- } sh_auto_reply_enable0_s;
-} sh_auto_reply_enable0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_AUTO_REPLY_ENABLE1" */
-/* Automatic Maintenance Reply Enable 1 */
-/* ==================================================================== */
-
-typedef union sh_auto_reply_enable1_u {
- mmr_t sh_auto_reply_enable1_regval;
- struct {
- mmr_t enable1 : 64;
- } sh_auto_reply_enable1_s;
-} sh_auto_reply_enable1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_AUTO_REPLY_HEADER0" */
-/* Automatic Maintenance Reply Header 0 */
-/* ==================================================================== */
-
-typedef union sh_auto_reply_header0_u {
- mmr_t sh_auto_reply_header0_regval;
- struct {
- mmr_t header0 : 64;
- } sh_auto_reply_header0_s;
-} sh_auto_reply_header0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_AUTO_REPLY_HEADER1" */
-/* Automatic Maintenance Reply Header 1 */
-/* ==================================================================== */
-
-typedef union sh_auto_reply_header1_u {
- mmr_t sh_auto_reply_header1_regval;
- struct {
- mmr_t header1 : 64;
- } sh_auto_reply_header1_s;
-} sh_auto_reply_header1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_ENABLE_RP_AUTO_REPLY" */
-/* Enable Automatic Maintenance Reply From Reply Queue */
-/* ==================================================================== */
-
-typedef union sh_enable_rp_auto_reply_u {
- mmr_t sh_enable_rp_auto_reply_regval;
- struct {
- mmr_t enable : 1;
- mmr_t reserved_0 : 63;
- } sh_enable_rp_auto_reply_s;
-} sh_enable_rp_auto_reply_u_t;
-
-/* ==================================================================== */
-/* Register "SH_ENABLE_RQ_AUTO_REPLY" */
-/* Enable Automatic Maintenance Reply From Request Queue */
-/* ==================================================================== */
-
-typedef union sh_enable_rq_auto_reply_u {
- mmr_t sh_enable_rq_auto_reply_regval;
- struct {
- mmr_t enable : 1;
- mmr_t reserved_0 : 63;
- } sh_enable_rq_auto_reply_s;
-} sh_enable_rq_auto_reply_u_t;
-
-/* ==================================================================== */
-/* Register "SH_REDIRECT_INVAL" */
-/* Redirect invalidate to LB instead of PI */
-/* ==================================================================== */
-
-typedef union sh_redirect_inval_u {
- mmr_t sh_redirect_inval_regval;
- struct {
- mmr_t redirect : 1;
- mmr_t reserved_0 : 63;
- } sh_redirect_inval_s;
-} sh_redirect_inval_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_CNTRL" */
-/* Diagnostic Message Control Register */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_cntrl_u {
- mmr_t sh_diag_msg_cntrl_regval;
- struct {
- mmr_t msg_length : 6;
- mmr_t error_inject_point : 6;
- mmr_t error_inject_enable : 1;
- mmr_t port : 1;
- mmr_t reserved_0 : 48;
- mmr_t start : 1;
- mmr_t busy : 1;
- } sh_diag_msg_cntrl_s;
-} sh_diag_msg_cntrl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA0L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data0l_u {
- mmr_t sh_diag_msg_data0l_regval;
- struct {
- mmr_t data_lower : 64;
- } sh_diag_msg_data0l_s;
-} sh_diag_msg_data0l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA0U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data0u_u {
- mmr_t sh_diag_msg_data0u_regval;
- struct {
- mmr_t data_upper : 64;
- } sh_diag_msg_data0u_s;
-} sh_diag_msg_data0u_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA1L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data1l_u {
- mmr_t sh_diag_msg_data1l_regval;
- struct {
- mmr_t data_lower : 64;
- } sh_diag_msg_data1l_s;
-} sh_diag_msg_data1l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA1U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data1u_u {
- mmr_t sh_diag_msg_data1u_regval;
- struct {
- mmr_t data_upper : 64;
- } sh_diag_msg_data1u_s;
-} sh_diag_msg_data1u_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA2L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data2l_u {
- mmr_t sh_diag_msg_data2l_regval;
- struct {
- mmr_t data_lower : 64;
- } sh_diag_msg_data2l_s;
-} sh_diag_msg_data2l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA2U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data2u_u {
- mmr_t sh_diag_msg_data2u_regval;
- struct {
- mmr_t data_upper : 64;
- } sh_diag_msg_data2u_s;
-} sh_diag_msg_data2u_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA3L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data3l_u {
- mmr_t sh_diag_msg_data3l_regval;
- struct {
- mmr_t data_lower : 64;
- } sh_diag_msg_data3l_s;
-} sh_diag_msg_data3l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA3U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data3u_u {
- mmr_t sh_diag_msg_data3u_regval;
- struct {
- mmr_t data_upper : 64;
- } sh_diag_msg_data3u_s;
-} sh_diag_msg_data3u_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA4L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data4l_u {
- mmr_t sh_diag_msg_data4l_regval;
- struct {
- mmr_t data_lower : 64;
- } sh_diag_msg_data4l_s;
-} sh_diag_msg_data4l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA4U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data4u_u {
- mmr_t sh_diag_msg_data4u_regval;
- struct {
- mmr_t data_upper : 64;
- } sh_diag_msg_data4u_s;
-} sh_diag_msg_data4u_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA5L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data5l_u {
- mmr_t sh_diag_msg_data5l_regval;
- struct {
- mmr_t data_lower : 64;
- } sh_diag_msg_data5l_s;
-} sh_diag_msg_data5l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA5U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data5u_u {
- mmr_t sh_diag_msg_data5u_regval;
- struct {
- mmr_t data_upper : 64;
- } sh_diag_msg_data5u_s;
-} sh_diag_msg_data5u_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA6L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data6l_u {
- mmr_t sh_diag_msg_data6l_regval;
- struct {
- mmr_t data_lower : 64;
- } sh_diag_msg_data6l_s;
-} sh_diag_msg_data6l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA6U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data6u_u {
- mmr_t sh_diag_msg_data6u_regval;
- struct {
- mmr_t data_upper : 64;
- } sh_diag_msg_data6u_s;
-} sh_diag_msg_data6u_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA7L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data7l_u {
- mmr_t sh_diag_msg_data7l_regval;
- struct {
- mmr_t data_lower : 64;
- } sh_diag_msg_data7l_s;
-} sh_diag_msg_data7l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA7U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data7u_u {
- mmr_t sh_diag_msg_data7u_regval;
- struct {
- mmr_t data_upper : 64;
- } sh_diag_msg_data7u_s;
-} sh_diag_msg_data7u_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA8L" */
-/* Diagnostic Data, lower 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data8l_u {
- mmr_t sh_diag_msg_data8l_regval;
- struct {
- mmr_t data_lower : 64;
- } sh_diag_msg_data8l_s;
-} sh_diag_msg_data8l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_DATA8U" */
-/* Diagnostice Data, upper 64 bits */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_data8u_u {
- mmr_t sh_diag_msg_data8u_regval;
- struct {
- mmr_t data_upper : 64;
- } sh_diag_msg_data8u_s;
-} sh_diag_msg_data8u_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_HDR0" */
-/* Diagnostice Data, lower 64 bits of header */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_hdr0_u {
- mmr_t sh_diag_msg_hdr0_regval;
- struct {
- mmr_t header0 : 64;
- } sh_diag_msg_hdr0_s;
-} sh_diag_msg_hdr0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIAG_MSG_HDR1" */
-/* Diagnostice Data, upper 64 bits of header */
-/* ==================================================================== */
-
-typedef union sh_diag_msg_hdr1_u {
- mmr_t sh_diag_msg_hdr1_regval;
- struct {
- mmr_t header1 : 64;
- } sh_diag_msg_hdr1_s;
-} sh_diag_msg_hdr1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DEBUG_SELECT" */
-/* SHub Debug Port Select */
-/* ==================================================================== */
-
-typedef union sh_debug_select_u {
- mmr_t sh_debug_select_regval;
- struct {
- mmr_t nibble0_nibble_sel : 3;
- mmr_t nibble0_chiplet_sel : 3;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t nibble1_chiplet_sel : 3;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t nibble2_chiplet_sel : 3;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t nibble3_chiplet_sel : 3;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t nibble4_chiplet_sel : 3;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t nibble5_chiplet_sel : 3;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t nibble6_chiplet_sel : 3;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t nibble7_chiplet_sel : 3;
- mmr_t debug_ii_sel : 3;
- mmr_t sel_ii : 9;
- mmr_t reserved_0 : 3;
- mmr_t trigger_enable : 1;
- } sh_debug_select_s;
-} sh_debug_select_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TRIGGER_COMPARE_MASK" */
-/* SHub Trigger Compare Mask */
-/* ==================================================================== */
-
-typedef union sh_trigger_compare_mask_u {
- mmr_t sh_trigger_compare_mask_regval;
- struct {
- mmr_t mask : 32;
- mmr_t reserved_0 : 32;
- } sh_trigger_compare_mask_s;
-} sh_trigger_compare_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TRIGGER_COMPARE_PATTERN" */
-/* SHub Trigger Compare Pattern */
-/* ==================================================================== */
-
-typedef union sh_trigger_compare_pattern_u {
- mmr_t sh_trigger_compare_pattern_regval;
- struct {
- mmr_t data : 32;
- mmr_t reserved_0 : 32;
- } sh_trigger_compare_pattern_s;
-} sh_trigger_compare_pattern_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TRIGGER_SEL" */
-/* Trigger select for SHUB debug port */
-/* ==================================================================== */
-
-typedef union sh_trigger_sel_u {
- mmr_t sh_trigger_sel_regval;
- struct {
- mmr_t nibble0_input_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_input_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_input_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_input_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble_sel : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_input_sel : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble_sel : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_input_sel : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble_sel : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_input_sel : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble_sel : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_input_sel : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble_sel : 3;
- mmr_t reserved_15 : 1;
- } sh_trigger_sel_s;
-} sh_trigger_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_STOP_CLK_CONTROL" */
-/* Stop Clock Control */
-/* ==================================================================== */
-
-typedef union sh_stop_clk_control_u {
- mmr_t sh_stop_clk_control_regval;
- struct {
- mmr_t stimulus : 5;
- mmr_t event : 1;
- mmr_t polarity : 1;
- mmr_t mode : 1;
- mmr_t reserved_0 : 56;
- } sh_stop_clk_control_s;
-} sh_stop_clk_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_STOP_CLK_DELAY_PHASE" */
-/* Stop Clock Delay Phase */
-/* ==================================================================== */
-
-typedef union sh_stop_clk_delay_phase_u {
- mmr_t sh_stop_clk_delay_phase_regval;
- struct {
- mmr_t delay : 8;
- mmr_t reserved_0 : 56;
- } sh_stop_clk_delay_phase_s;
-} sh_stop_clk_delay_phase_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_ARM_MASK" */
-/* Trigger sequencing facility arm mask */
-/* ==================================================================== */
-
-typedef union sh_tsf_arm_mask_u {
- mmr_t sh_tsf_arm_mask_regval;
- struct {
- mmr_t mask : 64;
- } sh_tsf_arm_mask_s;
-} sh_tsf_arm_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_COUNTER_PRESETS" */
-/* Trigger sequencing facility counter presets */
-/* ==================================================================== */
-
-typedef union sh_tsf_counter_presets_u {
- mmr_t sh_tsf_counter_presets_regval;
- struct {
- mmr_t count_32 : 32;
- mmr_t count_16 : 16;
- mmr_t count_8b : 8;
- mmr_t count_8a : 8;
- } sh_tsf_counter_presets_s;
-} sh_tsf_counter_presets_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_DECREMENT_CTL" */
-/* Trigger sequencing facility counter decrement control */
-/* ==================================================================== */
-
-typedef union sh_tsf_decrement_ctl_u {
- mmr_t sh_tsf_decrement_ctl_regval;
- struct {
- mmr_t ctl : 16;
- mmr_t reserved_0 : 48;
- } sh_tsf_decrement_ctl_s;
-} sh_tsf_decrement_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_DIAG_MSG_CTL" */
-/* Trigger sequencing facility diagnostic message control */
-/* ==================================================================== */
-
-typedef union sh_tsf_diag_msg_ctl_u {
- mmr_t sh_tsf_diag_msg_ctl_regval;
- struct {
- mmr_t enable : 8;
- mmr_t reserved_0 : 56;
- } sh_tsf_diag_msg_ctl_s;
-} sh_tsf_diag_msg_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_DISARM_MASK" */
-/* Trigger sequencing facility disarm mask */
-/* ==================================================================== */
-
-typedef union sh_tsf_disarm_mask_u {
- mmr_t sh_tsf_disarm_mask_regval;
- struct {
- mmr_t mask : 64;
- } sh_tsf_disarm_mask_s;
-} sh_tsf_disarm_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_ENABLE_CTL" */
-/* Trigger sequencing facility counter enable control */
-/* ==================================================================== */
-
-typedef union sh_tsf_enable_ctl_u {
- mmr_t sh_tsf_enable_ctl_regval;
- struct {
- mmr_t ctl : 16;
- mmr_t reserved_0 : 48;
- } sh_tsf_enable_ctl_s;
-} sh_tsf_enable_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_SOFTWARE_ARM" */
-/* Trigger sequencing facility software arm */
-/* ==================================================================== */
-
-typedef union sh_tsf_software_arm_u {
- mmr_t sh_tsf_software_arm_regval;
- struct {
- mmr_t bit0 : 1;
- mmr_t bit1 : 1;
- mmr_t bit2 : 1;
- mmr_t bit3 : 1;
- mmr_t bit4 : 1;
- mmr_t bit5 : 1;
- mmr_t bit6 : 1;
- mmr_t bit7 : 1;
- mmr_t reserved_0 : 56;
- } sh_tsf_software_arm_s;
-} sh_tsf_software_arm_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_SOFTWARE_DISARM" */
-/* Trigger sequencing facility software disarm */
-/* ==================================================================== */
-
-typedef union sh_tsf_software_disarm_u {
- mmr_t sh_tsf_software_disarm_regval;
- struct {
- mmr_t bit0 : 1;
- mmr_t bit1 : 1;
- mmr_t bit2 : 1;
- mmr_t bit3 : 1;
- mmr_t bit4 : 1;
- mmr_t bit5 : 1;
- mmr_t bit6 : 1;
- mmr_t bit7 : 1;
- mmr_t reserved_0 : 56;
- } sh_tsf_software_disarm_s;
-} sh_tsf_software_disarm_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_SOFTWARE_TRIGGERED" */
-/* Trigger sequencing facility software triggered */
-/* ==================================================================== */
-
-typedef union sh_tsf_software_triggered_u {
- mmr_t sh_tsf_software_triggered_regval;
- struct {
- mmr_t bit0 : 1;
- mmr_t bit1 : 1;
- mmr_t bit2 : 1;
- mmr_t bit3 : 1;
- mmr_t bit4 : 1;
- mmr_t bit5 : 1;
- mmr_t bit6 : 1;
- mmr_t bit7 : 1;
- mmr_t reserved_0 : 56;
- } sh_tsf_software_triggered_s;
-} sh_tsf_software_triggered_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_TRIGGER_MASK" */
-/* Trigger sequencing facility trigger mask */
-/* ==================================================================== */
-
-typedef union sh_tsf_trigger_mask_u {
- mmr_t sh_tsf_trigger_mask_regval;
- struct {
- mmr_t mask : 64;
- } sh_tsf_trigger_mask_s;
-} sh_tsf_trigger_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_VEC_DATA" */
-/* Vector Write Request Message Data */
-/* ==================================================================== */
-
-typedef union sh_vec_data_u {
- mmr_t sh_vec_data_regval;
- struct {
- mmr_t data : 64;
- } sh_vec_data_s;
-} sh_vec_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_VEC_PARMS" */
-/* Vector Message Parameters Register */
-/* ==================================================================== */
-
-typedef union sh_vec_parms_u {
- mmr_t sh_vec_parms_regval;
- struct {
- mmr_t type : 1;
- mmr_t ni_port : 1;
- mmr_t reserved_0 : 1;
- mmr_t address : 32;
- mmr_t pio_id : 11;
- mmr_t reserved_1 : 16;
- mmr_t start : 1;
- mmr_t busy : 1;
- } sh_vec_parms_s;
-} sh_vec_parms_u_t;
-
-/* ==================================================================== */
-/* Register "SH_VEC_ROUTE" */
-/* Vector Request Message Route */
-/* ==================================================================== */
-
-typedef union sh_vec_route_u {
- mmr_t sh_vec_route_regval;
- struct {
- mmr_t route : 64;
- } sh_vec_route_s;
-} sh_vec_route_u_t;
-
-/* ==================================================================== */
-/* Register "SH_CPU_PERM" */
-/* CPU MMR Access Permission Bits */
-/* ==================================================================== */
-
-typedef union sh_cpu_perm_u {
- mmr_t sh_cpu_perm_regval;
- struct {
- mmr_t access_bits : 64;
- } sh_cpu_perm_s;
-} sh_cpu_perm_u_t;
-
-/* ==================================================================== */
-/* Register "SH_CPU_PERM_OVR" */
-/* CPU MMR Access Permission Override */
-/* ==================================================================== */
-
-typedef union sh_cpu_perm_ovr_u {
- mmr_t sh_cpu_perm_ovr_regval;
- struct {
- mmr_t override : 64;
- } sh_cpu_perm_ovr_s;
-} sh_cpu_perm_ovr_u_t;
-
-/* ==================================================================== */
-/* Register "SH_EXT_IO_PERM" */
-/* External IO MMR Access Permission Bits */
-/* ==================================================================== */
-
-typedef union sh_ext_io_perm_u {
- mmr_t sh_ext_io_perm_regval;
- struct {
- mmr_t access_bits : 64;
- } sh_ext_io_perm_s;
-} sh_ext_io_perm_u_t;
-
-/* ==================================================================== */
-/* Register "SH_EXT_IOI_ACCESS" */
-/* External IO Interrupt Access Permission Bits */
-/* ==================================================================== */
-
-typedef union sh_ext_ioi_access_u {
- mmr_t sh_ext_ioi_access_regval;
- struct {
- mmr_t access_bits : 64;
- } sh_ext_ioi_access_s;
-} sh_ext_ioi_access_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GC_FIL_CTRL" */
-/* SHub Global Clock Filter Control */
-/* ==================================================================== */
-
-typedef union sh_gc_fil_ctrl_u {
- mmr_t sh_gc_fil_ctrl_regval;
- struct {
- mmr_t offset : 5;
- mmr_t reserved_0 : 3;
- mmr_t mask_counter : 12;
- mmr_t mask_enable : 1;
- mmr_t reserved_1 : 3;
- mmr_t dropout_counter : 10;
- mmr_t reserved_2 : 2;
- mmr_t dropout_thresh : 10;
- mmr_t reserved_3 : 2;
- mmr_t error_counter : 10;
- mmr_t reserved_4 : 6;
- } sh_gc_fil_ctrl_s;
-} sh_gc_fil_ctrl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_GC_SRC_CTRL" */
-/* SHub Global Clock Control */
-/* ==================================================================== */
-
-typedef union sh_gc_src_ctrl_u {
- mmr_t sh_gc_src_ctrl_regval;
- struct {
- mmr_t enable_counter : 1;
- mmr_t reserved_0 : 3;
- mmr_t max_count : 10;
- mmr_t reserved_1 : 2;
- mmr_t counter : 10;
- mmr_t reserved_2 : 2;
- mmr_t toggle_bit : 1;
- mmr_t reserved_3 : 3;
- mmr_t source_sel : 2;
- mmr_t reserved_4 : 30;
- } sh_gc_src_ctrl_s;
-} sh_gc_src_ctrl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_HARD_RESET" */
-/* SHub Hard Reset */
-/* ==================================================================== */
-
-typedef union sh_hard_reset_u {
- mmr_t sh_hard_reset_regval;
- struct {
- mmr_t hard_reset : 1;
- mmr_t reserved_0 : 63;
- } sh_hard_reset_s;
-} sh_hard_reset_u_t;
-
-/* ==================================================================== */
-/* Register "SH_IO_PERM" */
-/* II MMR Access Permission Bits */
-/* ==================================================================== */
-
-typedef union sh_io_perm_u {
- mmr_t sh_io_perm_regval;
- struct {
- mmr_t access_bits : 64;
- } sh_io_perm_s;
-} sh_io_perm_u_t;
-
-/* ==================================================================== */
-/* Register "SH_IOI_ACCESS" */
-/* II Interrupt Access Permission Bits */
-/* ==================================================================== */
-
-typedef union sh_ioi_access_u {
- mmr_t sh_ioi_access_regval;
- struct {
- mmr_t access_bits : 64;
- } sh_ioi_access_s;
-} sh_ioi_access_u_t;
-
-/* ==================================================================== */
-/* Register "SH_IPI_ACCESS" */
-/* CPU interrupt Access Permission Bits */
-/* ==================================================================== */
-
-typedef union sh_ipi_access_u {
- mmr_t sh_ipi_access_regval;
- struct {
- mmr_t access_bits : 64;
- } sh_ipi_access_s;
-} sh_ipi_access_u_t;
-
-/* ==================================================================== */
-/* Register "SH_JTAG_CONFIG" */
-/* SHub JTAG configuration */
-/* ==================================================================== */
-
-typedef union sh_jtag_config_u {
- mmr_t sh_jtag_config_regval;
- struct {
- mmr_t md_clk_sel : 2;
- mmr_t ni_clk_sel : 1;
- mmr_t ii_clk_sel : 2;
- mmr_t wrt90_target : 14;
- mmr_t wrt90_overrider : 1;
- mmr_t wrt90_override : 1;
- mmr_t jtag_mci_reset_delay : 4;
- mmr_t jtag_mci_target : 14;
- mmr_t jtag_mci_override : 1;
- mmr_t fsb_config_ioq_depth : 1;
- mmr_t fsb_config_sample_binit : 1;
- mmr_t fsb_config_enable_bus_parking : 1;
- mmr_t fsb_config_clock_ratio : 5;
- mmr_t fsb_config_output_tristate : 4;
- mmr_t fsb_config_enable_bist : 1;
- mmr_t fsb_config_aux : 2;
- mmr_t gtl_config_re : 1;
- mmr_t reserved_0 : 8;
- } sh_jtag_config_s;
-} sh_jtag_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_SHUB_ID" */
-/* SHub ID Number */
-/* ==================================================================== */
-
-typedef union sh_shub_id_u {
- mmr_t sh_shub_id_regval;
- struct {
- mmr_t force1 : 1;
- mmr_t manufacturer : 11;
- mmr_t part_number : 16;
- mmr_t revision : 4;
- mmr_t node_id : 11;
- mmr_t reserved_0 : 1;
- mmr_t sharing_mode : 2;
- mmr_t reserved_1 : 2;
- mmr_t nodes_per_bit : 5;
- mmr_t reserved_2 : 3;
- mmr_t ni_port : 1;
- mmr_t reserved_3 : 7;
- } sh_shub_id_s;
-} sh_shub_id_u_t;
-
-/* ==================================================================== */
-/* Register "SH_SHUBS_PRESENT0" */
-/* Shubs 0 - 63 Present. Used for invalidate generation */
-/* ==================================================================== */
-
-typedef union sh_shubs_present0_u {
- mmr_t sh_shubs_present0_regval;
- struct {
- mmr_t shubs_present0 : 64;
- } sh_shubs_present0_s;
-} sh_shubs_present0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_SHUBS_PRESENT1" */
-/* Shubs 64 - 127 Present. Used for invalidate generation */
-/* ==================================================================== */
-
-typedef union sh_shubs_present1_u {
- mmr_t sh_shubs_present1_regval;
- struct {
- mmr_t shubs_present1 : 64;
- } sh_shubs_present1_s;
-} sh_shubs_present1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_SHUBS_PRESENT2" */
-/* Shubs 128 - 191 Present. Used for invalidate generation */
-/* ==================================================================== */
-
-typedef union sh_shubs_present2_u {
- mmr_t sh_shubs_present2_regval;
- struct {
- mmr_t shubs_present2 : 64;
- } sh_shubs_present2_s;
-} sh_shubs_present2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_SHUBS_PRESENT3" */
-/* Shubs 192 - 255 Present. Used for invalidate generation */
-/* ==================================================================== */
-
-typedef union sh_shubs_present3_u {
- mmr_t sh_shubs_present3_regval;
- struct {
- mmr_t shubs_present3 : 64;
- } sh_shubs_present3_s;
-} sh_shubs_present3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_SOFT_RESET" */
-/* SHub Soft Reset */
-/* ==================================================================== */
-
-typedef union sh_soft_reset_u {
- mmr_t sh_soft_reset_regval;
- struct {
- mmr_t soft_reset : 1;
- mmr_t reserved_0 : 63;
- } sh_soft_reset_s;
-} sh_soft_reset_u_t;
-
-/* ==================================================================== */
-/* Register "SH_FIRST_ERROR" */
-/* Shub Global First Error Flags */
-/* ==================================================================== */
-
-typedef union sh_first_error_u {
- mmr_t sh_first_error_regval;
- struct {
- mmr_t first_error : 19;
- mmr_t reserved_0 : 45;
- } sh_first_error_s;
-} sh_first_error_u_t;
-
-/* ==================================================================== */
-/* Register "SH_II_HW_TIME_STAMP" */
-/* II hardware error time stamp */
-/* ==================================================================== */
-
-typedef union sh_ii_hw_time_stamp_u {
- mmr_t sh_ii_hw_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_ii_hw_time_stamp_s;
-} sh_ii_hw_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_HW_TIME_STAMP" */
-/* LB hardware error time stamp */
-/* ==================================================================== */
-
-typedef union sh_lb_hw_time_stamp_u {
- mmr_t sh_lb_hw_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_lb_hw_time_stamp_s;
-} sh_lb_hw_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_COR_TIME_STAMP" */
-/* MD correctable error time stamp */
-/* ==================================================================== */
-
-typedef union sh_md_cor_time_stamp_u {
- mmr_t sh_md_cor_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_md_cor_time_stamp_s;
-} sh_md_cor_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_HW_TIME_STAMP" */
-/* MD hardware error time stamp */
-/* ==================================================================== */
-
-typedef union sh_md_hw_time_stamp_u {
- mmr_t sh_md_hw_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_md_hw_time_stamp_s;
-} sh_md_hw_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_UNCOR_TIME_STAMP" */
-/* MD uncorrectable error time stamp */
-/* ==================================================================== */
-
-typedef union sh_md_uncor_time_stamp_u {
- mmr_t sh_md_uncor_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_md_uncor_time_stamp_s;
-} sh_md_uncor_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_COR_TIME_STAMP" */
-/* PI correctable error time stamp */
-/* ==================================================================== */
-
-typedef union sh_pi_cor_time_stamp_u {
- mmr_t sh_pi_cor_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_pi_cor_time_stamp_s;
-} sh_pi_cor_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_HW_TIME_STAMP" */
-/* PI hardware error time stamp */
-/* ==================================================================== */
-
-typedef union sh_pi_hw_time_stamp_u {
- mmr_t sh_pi_hw_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_pi_hw_time_stamp_s;
-} sh_pi_hw_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_UNCOR_TIME_STAMP" */
-/* PI uncorrectable error time stamp */
-/* ==================================================================== */
-
-typedef union sh_pi_uncor_time_stamp_u {
- mmr_t sh_pi_uncor_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_pi_uncor_time_stamp_s;
-} sh_pi_uncor_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ADV_TIME_STAMP" */
-/* Proc 0 advisory time stamp */
-/* ==================================================================== */
-
-typedef union sh_proc0_adv_time_stamp_u {
- mmr_t sh_proc0_adv_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_proc0_adv_time_stamp_s;
-} sh_proc0_adv_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC0_ERR_TIME_STAMP" */
-/* Proc 0 error time stamp */
-/* ==================================================================== */
-
-typedef union sh_proc0_err_time_stamp_u {
- mmr_t sh_proc0_err_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_proc0_err_time_stamp_s;
-} sh_proc0_err_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ADV_TIME_STAMP" */
-/* Proc 1 advisory time stamp */
-/* ==================================================================== */
-
-typedef union sh_proc1_adv_time_stamp_u {
- mmr_t sh_proc1_adv_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_proc1_adv_time_stamp_s;
-} sh_proc1_adv_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC1_ERR_TIME_STAMP" */
-/* Proc 1 error time stamp */
-/* ==================================================================== */
-
-typedef union sh_proc1_err_time_stamp_u {
- mmr_t sh_proc1_err_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_proc1_err_time_stamp_s;
-} sh_proc1_err_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ADV_TIME_STAMP" */
-/* Proc 2 advisory time stamp */
-/* ==================================================================== */
-
-typedef union sh_proc2_adv_time_stamp_u {
- mmr_t sh_proc2_adv_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_proc2_adv_time_stamp_s;
-} sh_proc2_adv_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC2_ERR_TIME_STAMP" */
-/* Proc 2 error time stamp */
-/* ==================================================================== */
-
-typedef union sh_proc2_err_time_stamp_u {
- mmr_t sh_proc2_err_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_proc2_err_time_stamp_s;
-} sh_proc2_err_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ADV_TIME_STAMP" */
-/* Proc 3 advisory time stamp */
-/* ==================================================================== */
-
-typedef union sh_proc3_adv_time_stamp_u {
- mmr_t sh_proc3_adv_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_proc3_adv_time_stamp_s;
-} sh_proc3_adv_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROC3_ERR_TIME_STAMP" */
-/* Proc 3 error time stamp */
-/* ==================================================================== */
-
-typedef union sh_proc3_err_time_stamp_u {
- mmr_t sh_proc3_err_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_proc3_err_time_stamp_s;
-} sh_proc3_err_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_COR_TIME_STAMP" */
-/* XN correctable error time stamp */
-/* ==================================================================== */
-
-typedef union sh_xn_cor_time_stamp_u {
- mmr_t sh_xn_cor_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_xn_cor_time_stamp_s;
-} sh_xn_cor_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_HW_TIME_STAMP" */
-/* XN hardware error time stamp */
-/* ==================================================================== */
-
-typedef union sh_xn_hw_time_stamp_u {
- mmr_t sh_xn_hw_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_xn_hw_time_stamp_s;
-} sh_xn_hw_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_UNCOR_TIME_STAMP" */
-/* XN uncorrectable error time stamp */
-/* ==================================================================== */
-
-typedef union sh_xn_uncor_time_stamp_u {
- mmr_t sh_xn_uncor_time_stamp_regval;
- struct {
- mmr_t time : 63;
- mmr_t valid : 1;
- } sh_xn_uncor_time_stamp_s;
-} sh_xn_uncor_time_stamp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DEBUG_PORT" */
-/* SHub Debug Port */
-/* ==================================================================== */
-
-typedef union sh_debug_port_u {
- mmr_t sh_debug_port_regval;
- struct {
- mmr_t debug_nibble0 : 4;
- mmr_t debug_nibble1 : 4;
- mmr_t debug_nibble2 : 4;
- mmr_t debug_nibble3 : 4;
- mmr_t debug_nibble4 : 4;
- mmr_t debug_nibble5 : 4;
- mmr_t debug_nibble6 : 4;
- mmr_t debug_nibble7 : 4;
- mmr_t reserved_0 : 32;
- } sh_debug_port_s;
-} sh_debug_port_u_t;
-
-/* ==================================================================== */
-/* Register "SH_II_DEBUG_DATA" */
-/* II Debug Data */
-/* ==================================================================== */
-
-typedef union sh_ii_debug_data_u {
- mmr_t sh_ii_debug_data_regval;
- struct {
- mmr_t ii_data : 32;
- mmr_t reserved_0 : 32;
- } sh_ii_debug_data_s;
-} sh_ii_debug_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_II_WRAP_DEBUG_DATA" */
-/* SHub II Wrapper Debug Data */
-/* ==================================================================== */
-
-typedef union sh_ii_wrap_debug_data_u {
- mmr_t sh_ii_wrap_debug_data_regval;
- struct {
- mmr_t ii_wrap_data : 32;
- mmr_t reserved_0 : 32;
- } sh_ii_wrap_debug_data_s;
-} sh_ii_wrap_debug_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_LB_DEBUG_DATA" */
-/* SHub LB Debug Data */
-/* ==================================================================== */
-
-typedef union sh_lb_debug_data_u {
- mmr_t sh_lb_debug_data_regval;
- struct {
- mmr_t lb_data : 32;
- mmr_t reserved_0 : 32;
- } sh_lb_debug_data_s;
-} sh_lb_debug_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DEBUG_DATA" */
-/* SHub MD Debug Data */
-/* ==================================================================== */
-
-typedef union sh_md_debug_data_u {
- mmr_t sh_md_debug_data_regval;
- struct {
- mmr_t md_data : 32;
- mmr_t reserved_0 : 32;
- } sh_md_debug_data_s;
-} sh_md_debug_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_DEBUG_DATA" */
-/* SHub PI Debug Data */
-/* ==================================================================== */
-
-typedef union sh_pi_debug_data_u {
- mmr_t sh_pi_debug_data_regval;
- struct {
- mmr_t pi_data : 32;
- mmr_t reserved_0 : 32;
- } sh_pi_debug_data_s;
-} sh_pi_debug_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_DEBUG_DATA" */
-/* SHub XN Debug Data */
-/* ==================================================================== */
-
-typedef union sh_xn_debug_data_u {
- mmr_t sh_xn_debug_data_regval;
- struct {
- mmr_t xn_data : 32;
- mmr_t reserved_0 : 32;
- } sh_xn_debug_data_s;
-} sh_xn_debug_data_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_ARMED_STATE" */
-/* Trigger sequencing facility arm state */
-/* ==================================================================== */
-
-typedef union sh_tsf_armed_state_u {
- mmr_t sh_tsf_armed_state_regval;
- struct {
- mmr_t state : 8;
- mmr_t reserved_0 : 56;
- } sh_tsf_armed_state_s;
-} sh_tsf_armed_state_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_COUNTER_VALUE" */
-/* Trigger sequencing facility counter value */
-/* ==================================================================== */
-
-typedef union sh_tsf_counter_value_u {
- mmr_t sh_tsf_counter_value_regval;
- struct {
- mmr_t count_32 : 32;
- mmr_t count_16 : 16;
- mmr_t count_8b : 8;
- mmr_t count_8a : 8;
- } sh_tsf_counter_value_s;
-} sh_tsf_counter_value_u_t;
-
-/* ==================================================================== */
-/* Register "SH_TSF_TRIGGERED_STATE" */
-/* Trigger sequencing facility triggered state */
-/* ==================================================================== */
-
-typedef union sh_tsf_triggered_state_u {
- mmr_t sh_tsf_triggered_state_regval;
- struct {
- mmr_t state : 8;
- mmr_t reserved_0 : 56;
- } sh_tsf_triggered_state_s;
-} sh_tsf_triggered_state_u_t;
-
-/* ==================================================================== */
-/* Register "SH_VEC_RDDATA" */
-/* Vector Reply Message Data */
-/* ==================================================================== */
-
-typedef union sh_vec_rddata_u {
- mmr_t sh_vec_rddata_regval;
- struct {
- mmr_t data : 64;
- } sh_vec_rddata_s;
-} sh_vec_rddata_u_t;
-
-/* ==================================================================== */
-/* Register "SH_VEC_RETURN" */
-/* Vector Reply Message Return Route */
-/* ==================================================================== */
-
-typedef union sh_vec_return_u {
- mmr_t sh_vec_return_regval;
- struct {
- mmr_t route : 64;
- } sh_vec_return_s;
-} sh_vec_return_u_t;
-
-/* ==================================================================== */
-/* Register "SH_VEC_STATUS" */
-/* Vector Reply Message Status */
-/* ==================================================================== */
-
-typedef union sh_vec_status_u {
- mmr_t sh_vec_status_regval;
- struct {
- mmr_t type : 3;
- mmr_t address : 32;
- mmr_t pio_id : 11;
- mmr_t source : 14;
- mmr_t reserved_0 : 2;
- mmr_t overrun : 1;
- mmr_t status_valid : 1;
- } sh_vec_status_s;
-} sh_vec_status_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT0_CONTROL" */
-/* Performance Counter 0 Control */
-/* ==================================================================== */
-
-typedef union sh_performance_count0_control_u {
- mmr_t sh_performance_count0_control_regval;
- struct {
- mmr_t up_stimulus : 5;
- mmr_t up_event : 1;
- mmr_t up_polarity : 1;
- mmr_t up_mode : 1;
- mmr_t dn_stimulus : 5;
- mmr_t dn_event : 1;
- mmr_t dn_polarity : 1;
- mmr_t dn_mode : 1;
- mmr_t inc_enable : 1;
- mmr_t dec_enable : 1;
- mmr_t peak_det_enable : 1;
- mmr_t reserved_0 : 45;
- } sh_performance_count0_control_s;
-} sh_performance_count0_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT1_CONTROL" */
-/* Performance Counter 1 Control */
-/* ==================================================================== */
-
-typedef union sh_performance_count1_control_u {
- mmr_t sh_performance_count1_control_regval;
- struct {
- mmr_t up_stimulus : 5;
- mmr_t up_event : 1;
- mmr_t up_polarity : 1;
- mmr_t up_mode : 1;
- mmr_t dn_stimulus : 5;
- mmr_t dn_event : 1;
- mmr_t dn_polarity : 1;
- mmr_t dn_mode : 1;
- mmr_t inc_enable : 1;
- mmr_t dec_enable : 1;
- mmr_t peak_det_enable : 1;
- mmr_t reserved_0 : 45;
- } sh_performance_count1_control_s;
-} sh_performance_count1_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT2_CONTROL" */
-/* Performance Counter 2 Control */
-/* ==================================================================== */
-
-typedef union sh_performance_count2_control_u {
- mmr_t sh_performance_count2_control_regval;
- struct {
- mmr_t up_stimulus : 5;
- mmr_t up_event : 1;
- mmr_t up_polarity : 1;
- mmr_t up_mode : 1;
- mmr_t dn_stimulus : 5;
- mmr_t dn_event : 1;
- mmr_t dn_polarity : 1;
- mmr_t dn_mode : 1;
- mmr_t inc_enable : 1;
- mmr_t dec_enable : 1;
- mmr_t peak_det_enable : 1;
- mmr_t reserved_0 : 45;
- } sh_performance_count2_control_s;
-} sh_performance_count2_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT3_CONTROL" */
-/* Performance Counter 3 Control */
-/* ==================================================================== */
-
-typedef union sh_performance_count3_control_u {
- mmr_t sh_performance_count3_control_regval;
- struct {
- mmr_t up_stimulus : 5;
- mmr_t up_event : 1;
- mmr_t up_polarity : 1;
- mmr_t up_mode : 1;
- mmr_t dn_stimulus : 5;
- mmr_t dn_event : 1;
- mmr_t dn_polarity : 1;
- mmr_t dn_mode : 1;
- mmr_t inc_enable : 1;
- mmr_t dec_enable : 1;
- mmr_t peak_det_enable : 1;
- mmr_t reserved_0 : 45;
- } sh_performance_count3_control_s;
-} sh_performance_count3_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT4_CONTROL" */
-/* Performance Counter 4 Control */
-/* ==================================================================== */
-
-typedef union sh_performance_count4_control_u {
- mmr_t sh_performance_count4_control_regval;
- struct {
- mmr_t up_stimulus : 5;
- mmr_t up_event : 1;
- mmr_t up_polarity : 1;
- mmr_t up_mode : 1;
- mmr_t dn_stimulus : 5;
- mmr_t dn_event : 1;
- mmr_t dn_polarity : 1;
- mmr_t dn_mode : 1;
- mmr_t inc_enable : 1;
- mmr_t dec_enable : 1;
- mmr_t peak_det_enable : 1;
- mmr_t reserved_0 : 45;
- } sh_performance_count4_control_s;
-} sh_performance_count4_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT5_CONTROL" */
-/* Performance Counter 5 Control */
-/* ==================================================================== */
-
-typedef union sh_performance_count5_control_u {
- mmr_t sh_performance_count5_control_regval;
- struct {
- mmr_t up_stimulus : 5;
- mmr_t up_event : 1;
- mmr_t up_polarity : 1;
- mmr_t up_mode : 1;
- mmr_t dn_stimulus : 5;
- mmr_t dn_event : 1;
- mmr_t dn_polarity : 1;
- mmr_t dn_mode : 1;
- mmr_t inc_enable : 1;
- mmr_t dec_enable : 1;
- mmr_t peak_det_enable : 1;
- mmr_t reserved_0 : 45;
- } sh_performance_count5_control_s;
-} sh_performance_count5_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT6_CONTROL" */
-/* Performance Counter 6 Control */
-/* ==================================================================== */
-
-typedef union sh_performance_count6_control_u {
- mmr_t sh_performance_count6_control_regval;
- struct {
- mmr_t up_stimulus : 5;
- mmr_t up_event : 1;
- mmr_t up_polarity : 1;
- mmr_t up_mode : 1;
- mmr_t dn_stimulus : 5;
- mmr_t dn_event : 1;
- mmr_t dn_polarity : 1;
- mmr_t dn_mode : 1;
- mmr_t inc_enable : 1;
- mmr_t dec_enable : 1;
- mmr_t peak_det_enable : 1;
- mmr_t reserved_0 : 45;
- } sh_performance_count6_control_s;
-} sh_performance_count6_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNT7_CONTROL" */
-/* Performance Counter 7 Control */
-/* ==================================================================== */
-
-typedef union sh_performance_count7_control_u {
- mmr_t sh_performance_count7_control_regval;
- struct {
- mmr_t up_stimulus : 5;
- mmr_t up_event : 1;
- mmr_t up_polarity : 1;
- mmr_t up_mode : 1;
- mmr_t dn_stimulus : 5;
- mmr_t dn_event : 1;
- mmr_t dn_polarity : 1;
- mmr_t dn_mode : 1;
- mmr_t inc_enable : 1;
- mmr_t dec_enable : 1;
- mmr_t peak_det_enable : 1;
- mmr_t reserved_0 : 45;
- } sh_performance_count7_control_s;
-} sh_performance_count7_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_DN_CONTROL" */
-/* Profile Counter Down Control */
-/* ==================================================================== */
-
-typedef union sh_profile_dn_control_u {
- mmr_t sh_profile_dn_control_regval;
- struct {
- mmr_t stimulus : 5;
- mmr_t event : 1;
- mmr_t polarity : 1;
- mmr_t mode : 1;
- mmr_t reserved_0 : 56;
- } sh_profile_dn_control_s;
-} sh_profile_dn_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_PEAK_CONTROL" */
-/* Profile Counter Peak Control */
-/* ==================================================================== */
-
-typedef union sh_profile_peak_control_u {
- mmr_t sh_profile_peak_control_regval;
- struct {
- mmr_t reserved_0 : 3;
- mmr_t stimulus : 1;
- mmr_t reserved_1 : 1;
- mmr_t event : 1;
- mmr_t polarity : 1;
- mmr_t reserved_2 : 57;
- } sh_profile_peak_control_s;
-} sh_profile_peak_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_RANGE" */
-/* Profile Counter Range */
-/* ==================================================================== */
-
-typedef union sh_profile_range_u {
- mmr_t sh_profile_range_regval;
- struct {
- mmr_t range0 : 8;
- mmr_t range1 : 8;
- mmr_t range2 : 8;
- mmr_t range3 : 8;
- mmr_t range4 : 8;
- mmr_t range5 : 8;
- mmr_t range6 : 8;
- mmr_t range7 : 8;
- } sh_profile_range_s;
-} sh_profile_range_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_UP_CONTROL" */
-/* Profile Counter Up Control */
-/* ==================================================================== */
-
-typedef union sh_profile_up_control_u {
- mmr_t sh_profile_up_control_regval;
- struct {
- mmr_t stimulus : 5;
- mmr_t event : 1;
- mmr_t polarity : 1;
- mmr_t mode : 1;
- mmr_t reserved_0 : 56;
- } sh_profile_up_control_s;
-} sh_profile_up_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER0" */
-/* Performance Counter 0 */
-/* ==================================================================== */
-
-typedef union sh_performance_counter0_u {
- mmr_t sh_performance_counter0_regval;
- struct {
- mmr_t count : 32;
- mmr_t reserved_0 : 32;
- } sh_performance_counter0_s;
-} sh_performance_counter0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER1" */
-/* Performance Counter 1 */
-/* ==================================================================== */
-
-typedef union sh_performance_counter1_u {
- mmr_t sh_performance_counter1_regval;
- struct {
- mmr_t count : 32;
- mmr_t reserved_0 : 32;
- } sh_performance_counter1_s;
-} sh_performance_counter1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER2" */
-/* Performance Counter 2 */
-/* ==================================================================== */
-
-typedef union sh_performance_counter2_u {
- mmr_t sh_performance_counter2_regval;
- struct {
- mmr_t count : 32;
- mmr_t reserved_0 : 32;
- } sh_performance_counter2_s;
-} sh_performance_counter2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER3" */
-/* Performance Counter 3 */
-/* ==================================================================== */
-
-typedef union sh_performance_counter3_u {
- mmr_t sh_performance_counter3_regval;
- struct {
- mmr_t count : 32;
- mmr_t reserved_0 : 32;
- } sh_performance_counter3_s;
-} sh_performance_counter3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER4" */
-/* Performance Counter 4 */
-/* ==================================================================== */
-
-typedef union sh_performance_counter4_u {
- mmr_t sh_performance_counter4_regval;
- struct {
- mmr_t count : 32;
- mmr_t reserved_0 : 32;
- } sh_performance_counter4_s;
-} sh_performance_counter4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER5" */
-/* Performance Counter 5 */
-/* ==================================================================== */
-
-typedef union sh_performance_counter5_u {
- mmr_t sh_performance_counter5_regval;
- struct {
- mmr_t count : 32;
- mmr_t reserved_0 : 32;
- } sh_performance_counter5_s;
-} sh_performance_counter5_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER6" */
-/* Performance Counter 6 */
-/* ==================================================================== */
-
-typedef union sh_performance_counter6_u {
- mmr_t sh_performance_counter6_regval;
- struct {
- mmr_t count : 32;
- mmr_t reserved_0 : 32;
- } sh_performance_counter6_s;
-} sh_performance_counter6_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PERFORMANCE_COUNTER7" */
-/* Performance Counter 7 */
-/* ==================================================================== */
-
-typedef union sh_performance_counter7_u {
- mmr_t sh_performance_counter7_regval;
- struct {
- mmr_t count : 32;
- mmr_t reserved_0 : 32;
- } sh_performance_counter7_s;
-} sh_performance_counter7_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_COUNTER" */
-/* Profile Counter */
-/* ==================================================================== */
-
-typedef union sh_profile_counter_u {
- mmr_t sh_profile_counter_regval;
- struct {
- mmr_t counter : 8;
- mmr_t reserved_0 : 56;
- } sh_profile_counter_s;
-} sh_profile_counter_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PROFILE_PEAK" */
-/* Profile Peak Counter */
-/* ==================================================================== */
-
-typedef union sh_profile_peak_u {
- mmr_t sh_profile_peak_regval;
- struct {
- mmr_t counter : 8;
- mmr_t reserved_0 : 56;
- } sh_profile_peak_s;
-} sh_profile_peak_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PTC_0" */
-/* Puge Translation Cache Message Configuration Information */
-/* ==================================================================== */
-
-typedef union sh_ptc_0_u {
- mmr_t sh_ptc_0_regval;
- struct {
- mmr_t a : 1;
- mmr_t reserved_0 : 1;
- mmr_t ps : 6;
- mmr_t rid : 24;
- mmr_t reserved_1 : 31;
- mmr_t start : 1;
- } sh_ptc_0_s;
-} sh_ptc_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PTC_1" */
-/* Puge Translation Cache Message Configuration Information */
-/* ==================================================================== */
-
-typedef union sh_ptc_1_u {
- mmr_t sh_ptc_1_regval;
- struct {
- mmr_t reserved_0 : 12;
- mmr_t vpn : 49;
- mmr_t reserved_1 : 2;
- mmr_t start : 1;
- } sh_ptc_1_s;
-} sh_ptc_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PTC_PARMS" */
-/* PTC Time-out parmaeters */
-/* ==================================================================== */
-
-typedef union sh_ptc_parms_u {
- mmr_t sh_ptc_parms_regval;
- struct {
- mmr_t ptc_to_wrap : 24;
- mmr_t ptc_to_val : 12;
- mmr_t reserved_0 : 28;
- } sh_ptc_parms_s;
-} sh_ptc_parms_u_t;
-
-/* ==================================================================== */
-/* Register "SH_INT_CMPA" */
-/* RTC Compare Value for Processor A */
-/* ==================================================================== */
-
-typedef union sh_int_cmpa_u {
- mmr_t sh_int_cmpa_regval;
- struct {
- mmr_t real_time_cmpa : 55;
- mmr_t reserved_0 : 9;
- } sh_int_cmpa_s;
-} sh_int_cmpa_u_t;
-
-/* ==================================================================== */
-/* Register "SH_INT_CMPB" */
-/* RTC Compare Value for Processor B */
-/* ==================================================================== */
-
-typedef union sh_int_cmpb_u {
- mmr_t sh_int_cmpb_regval;
- struct {
- mmr_t real_time_cmpb : 55;
- mmr_t reserved_0 : 9;
- } sh_int_cmpb_s;
-} sh_int_cmpb_u_t;
-
-/* ==================================================================== */
-/* Register "SH_INT_CMPC" */
-/* RTC Compare Value for Processor C */
-/* ==================================================================== */
-
-typedef union sh_int_cmpc_u {
- mmr_t sh_int_cmpc_regval;
- struct {
- mmr_t real_time_cmpc : 55;
- mmr_t reserved_0 : 9;
- } sh_int_cmpc_s;
-} sh_int_cmpc_u_t;
-
-/* ==================================================================== */
-/* Register "SH_INT_CMPD" */
-/* RTC Compare Value for Processor D */
-/* ==================================================================== */
-
-typedef union sh_int_cmpd_u {
- mmr_t sh_int_cmpd_regval;
- struct {
- mmr_t real_time_cmpd : 55;
- mmr_t reserved_0 : 9;
- } sh_int_cmpd_s;
-} sh_int_cmpd_u_t;
-
-/* ==================================================================== */
-/* Register "SH_INT_PROF" */
-/* Profile Compare Registers */
-/* ==================================================================== */
-
-typedef union sh_int_prof_u {
- mmr_t sh_int_prof_regval;
- struct {
- mmr_t profile_compare : 32;
- mmr_t reserved_0 : 32;
- } sh_int_prof_s;
-} sh_int_prof_u_t;
-
-/* ==================================================================== */
-/* Register "SH_RTC" */
-/* Real-time Clock */
-/* ==================================================================== */
-
-typedef union sh_rtc_u {
- mmr_t sh_rtc_regval;
- struct {
- mmr_t real_time_clock : 55;
- mmr_t reserved_0 : 9;
- } sh_rtc_s;
-} sh_rtc_u_t;
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH0" */
-/* Scratch Register 0 */
-/* ==================================================================== */
-
-typedef union sh_scratch0_u {
- mmr_t sh_scratch0_regval;
- struct {
- mmr_t scratch0 : 64;
- } sh_scratch0_s;
-} sh_scratch0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH1" */
-/* Scratch Register 1 */
-/* ==================================================================== */
-
-typedef union sh_scratch1_u {
- mmr_t sh_scratch1_regval;
- struct {
- mmr_t scratch1 : 64;
- } sh_scratch1_s;
-} sh_scratch1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH2" */
-/* Scratch Register 2 */
-/* ==================================================================== */
-
-typedef union sh_scratch2_u {
- mmr_t sh_scratch2_regval;
- struct {
- mmr_t scratch2 : 64;
- } sh_scratch2_s;
-} sh_scratch2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH3" */
-/* Scratch Register 3 */
-/* ==================================================================== */
-
-typedef union sh_scratch3_u {
- mmr_t sh_scratch3_regval;
- struct {
- mmr_t scratch3 : 1;
- mmr_t reserved_0 : 63;
- } sh_scratch3_s;
-} sh_scratch3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_SCRATCH4" */
-/* Scratch Register 4 */
-/* ==================================================================== */
-
-typedef union sh_scratch4_u {
- mmr_t sh_scratch4_regval;
- struct {
- mmr_t scratch4 : 1;
- mmr_t reserved_0 : 63;
- } sh_scratch4_s;
-} sh_scratch4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_CRB_MESSAGE_CONTROL" */
-/* Coherent Request Buffer Message Control */
-/* ==================================================================== */
-
-typedef union sh_crb_message_control_u {
- mmr_t sh_crb_message_control_regval;
- struct {
- mmr_t system_coherence_enable : 1;
- mmr_t local_speculative_message_enable : 1;
- mmr_t remote_speculative_message_enable : 1;
- mmr_t message_color : 1;
- mmr_t message_color_enable : 1;
- mmr_t rrb_attribute_mismatch_fsb_enable : 1;
- mmr_t wrb_attribute_mismatch_fsb_enable : 1;
- mmr_t irb_attribute_mismatch_fsb_enable : 1;
- mmr_t rrb_attribute_mismatch_xb_enable : 1;
- mmr_t wrb_attribute_mismatch_xb_enable : 1;
- mmr_t suppress_bogus_writes : 1;
- mmr_t enable_ivack_consolidation : 1;
- mmr_t reserved_0 : 20;
- mmr_t ivack_stall_count : 16;
- mmr_t ivack_throttle_control : 16;
- } sh_crb_message_control_s;
-} sh_crb_message_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_CRB_NACK_LIMIT" */
-/* CRB Nack Limit */
-/* ==================================================================== */
-
-typedef union sh_crb_nack_limit_u {
- mmr_t sh_crb_nack_limit_regval;
- struct {
- mmr_t limit : 12;
- mmr_t pri_freq : 4;
- mmr_t reserved_0 : 47;
- mmr_t enable : 1;
- } sh_crb_nack_limit_s;
-} sh_crb_nack_limit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_CRB_TIMEOUT_PRESCALE" */
-/* Coherent Request Buffer Timeout Prescale */
-/* ==================================================================== */
-
-typedef union sh_crb_timeout_prescale_u {
- mmr_t sh_crb_timeout_prescale_regval;
- struct {
- mmr_t scaling_factor : 32;
- mmr_t reserved_0 : 32;
- } sh_crb_timeout_prescale_s;
-} sh_crb_timeout_prescale_u_t;
-
-/* ==================================================================== */
-/* Register "SH_CRB_TIMEOUT_SKID" */
-/* Coherent Request Buffer Timeout Skid Limit */
-/* ==================================================================== */
-
-typedef union sh_crb_timeout_skid_u {
- mmr_t sh_crb_timeout_skid_regval;
- struct {
- mmr_t skid : 6;
- mmr_t reserved_0 : 57;
- mmr_t reset_skid_count : 1;
- } sh_crb_timeout_skid_s;
-} sh_crb_timeout_skid_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MEMORY_WRITE_STATUS_0" */
-/* Memory Write Status for CPU 0 */
-/* ==================================================================== */
-
-typedef union sh_memory_write_status_0_u {
- mmr_t sh_memory_write_status_0_regval;
- struct {
- mmr_t pending_write_count : 6;
- mmr_t reserved_0 : 58;
- } sh_memory_write_status_0_s;
-} sh_memory_write_status_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MEMORY_WRITE_STATUS_1" */
-/* Memory Write Status for CPU 1 */
-/* ==================================================================== */
-
-typedef union sh_memory_write_status_1_u {
- mmr_t sh_memory_write_status_1_regval;
- struct {
- mmr_t pending_write_count : 6;
- mmr_t reserved_0 : 58;
- } sh_memory_write_status_1_s;
-} sh_memory_write_status_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PIO_WRITE_STATUS_0" */
-/* PIO Write Status for CPU 0 */
-/* ==================================================================== */
-
-typedef union sh_pio_write_status_0_u {
- mmr_t sh_pio_write_status_0_regval;
- struct {
- mmr_t multi_write_error : 1;
- mmr_t write_deadlock : 1;
- mmr_t write_error : 1;
- mmr_t write_error_address : 47;
- mmr_t reserved_0 : 6;
- mmr_t pending_write_count : 6;
- mmr_t reserved_1 : 1;
- mmr_t writes_ok : 1;
- } sh_pio_write_status_0_s;
-} sh_pio_write_status_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PIO_WRITE_STATUS_1" */
-/* PIO Write Status for CPU 1 */
-/* ==================================================================== */
-
-typedef union sh_pio_write_status_1_u {
- mmr_t sh_pio_write_status_1_regval;
- struct {
- mmr_t multi_write_error : 1;
- mmr_t write_deadlock : 1;
- mmr_t write_error : 1;
- mmr_t write_error_address : 47;
- mmr_t reserved_0 : 6;
- mmr_t pending_write_count : 6;
- mmr_t reserved_1 : 1;
- mmr_t writes_ok : 1;
- } sh_pio_write_status_1_s;
-} sh_pio_write_status_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MEMORY_WRITE_STATUS_NON_USER_0" */
-/* Memory Write Status for CPU 0. OS access only */
-/* ==================================================================== */
-
-typedef union sh_memory_write_status_non_user_0_u {
- mmr_t sh_memory_write_status_non_user_0_regval;
- struct {
- mmr_t pending_write_count : 6;
- mmr_t reserved_0 : 57;
- mmr_t clear : 1;
- } sh_memory_write_status_non_user_0_s;
-} sh_memory_write_status_non_user_0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MEMORY_WRITE_STATUS_NON_USER_1" */
-/* Memory Write Status for CPU 1. OS access only */
-/* ==================================================================== */
-
-typedef union sh_memory_write_status_non_user_1_u {
- mmr_t sh_memory_write_status_non_user_1_regval;
- struct {
- mmr_t pending_write_count : 6;
- mmr_t reserved_0 : 57;
- mmr_t clear : 1;
- } sh_memory_write_status_non_user_1_s;
-} sh_memory_write_status_non_user_1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MMRBIST_ERR" */
-/* Error capture for bist read errors */
-/* ==================================================================== */
-
-typedef union sh_mmrbist_err_u {
- mmr_t sh_mmrbist_err_regval;
- struct {
- mmr_t addr : 33;
- mmr_t reserved_0 : 3;
- mmr_t detected : 1;
- mmr_t multiple_detected : 1;
- mmr_t cancelled : 1;
- mmr_t reserved_1 : 25;
- } sh_mmrbist_err_s;
-} sh_mmrbist_err_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MISC_ERR_HDR_LOWER" */
-/* Header capture register */
-/* ==================================================================== */
-
-typedef union sh_misc_err_hdr_lower_u {
- mmr_t sh_misc_err_hdr_lower_regval;
- struct {
- mmr_t reserved_0 : 3;
- mmr_t addr : 33;
- mmr_t cmd : 8;
- mmr_t src : 14;
- mmr_t reserved_1 : 2;
- mmr_t write : 1;
- mmr_t reserved_2 : 2;
- mmr_t valid : 1;
- } sh_misc_err_hdr_lower_s;
-} sh_misc_err_hdr_lower_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MISC_ERR_HDR_UPPER" */
-/* Error header capture packet and protocol errors */
-/* ==================================================================== */
-
-typedef union sh_misc_err_hdr_upper_u {
- mmr_t sh_misc_err_hdr_upper_regval;
- struct {
- mmr_t dir_protocol : 1;
- mmr_t illegal_cmd : 1;
- mmr_t nonexist_addr : 1;
- mmr_t rmw_uc : 1;
- mmr_t rmw_cor : 1;
- mmr_t dir_acc : 1;
- mmr_t pi_pkt_size : 1;
- mmr_t xn_pkt_size : 1;
- mmr_t reserved_0 : 12;
- mmr_t echo : 9;
- mmr_t reserved_1 : 35;
- } sh_misc_err_hdr_upper_s;
-} sh_misc_err_hdr_upper_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIR_UC_ERR_HDR_LOWER" */
-/* Header capture register */
-/* ==================================================================== */
-
-typedef union sh_dir_uc_err_hdr_lower_u {
- mmr_t sh_dir_uc_err_hdr_lower_regval;
- struct {
- mmr_t reserved_0 : 3;
- mmr_t addr : 33;
- mmr_t cmd : 8;
- mmr_t src : 14;
- mmr_t reserved_1 : 2;
- mmr_t write : 1;
- mmr_t reserved_2 : 2;
- mmr_t valid : 1;
- } sh_dir_uc_err_hdr_lower_s;
-} sh_dir_uc_err_hdr_lower_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIR_UC_ERR_HDR_UPPER" */
-/* Error header capture packet and protocol errors */
-/* ==================================================================== */
-
-typedef union sh_dir_uc_err_hdr_upper_u {
- mmr_t sh_dir_uc_err_hdr_upper_regval;
- struct {
- mmr_t reserved_0 : 3;
- mmr_t dir_uc : 1;
- mmr_t reserved_1 : 16;
- mmr_t echo : 9;
- mmr_t reserved_2 : 35;
- } sh_dir_uc_err_hdr_upper_s;
-} sh_dir_uc_err_hdr_upper_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIR_COR_ERR_HDR_LOWER" */
-/* Header capture register */
-/* ==================================================================== */
-
-typedef union sh_dir_cor_err_hdr_lower_u {
- mmr_t sh_dir_cor_err_hdr_lower_regval;
- struct {
- mmr_t reserved_0 : 3;
- mmr_t addr : 33;
- mmr_t cmd : 8;
- mmr_t src : 14;
- mmr_t reserved_1 : 2;
- mmr_t write : 1;
- mmr_t reserved_2 : 2;
- mmr_t valid : 1;
- } sh_dir_cor_err_hdr_lower_s;
-} sh_dir_cor_err_hdr_lower_u_t;
-
-/* ==================================================================== */
-/* Register "SH_DIR_COR_ERR_HDR_UPPER" */
-/* Error header capture packet and protocol errors */
-/* ==================================================================== */
-
-typedef union sh_dir_cor_err_hdr_upper_u {
- mmr_t sh_dir_cor_err_hdr_upper_regval;
- struct {
- mmr_t reserved_0 : 8;
- mmr_t dir_cor : 1;
- mmr_t reserved_1 : 11;
- mmr_t echo : 9;
- mmr_t reserved_2 : 35;
- } sh_dir_cor_err_hdr_upper_s;
-} sh_dir_cor_err_hdr_upper_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MEM_ERROR_SUMMARY" */
-/* Memory error flags */
-/* ==================================================================== */
-
-typedef union sh_mem_error_summary_u {
- mmr_t sh_mem_error_summary_regval;
- struct {
- mmr_t illegal_cmd : 1;
- mmr_t nonexist_addr : 1;
- mmr_t dqlp_dir_perr : 1;
- mmr_t dqrp_dir_perr : 1;
- mmr_t dqlp_dir_uc : 1;
- mmr_t dqlp_dir_cor : 1;
- mmr_t dqrp_dir_uc : 1;
- mmr_t dqrp_dir_cor : 1;
- mmr_t acx_int_hw : 1;
- mmr_t acy_int_hw : 1;
- mmr_t dir_acc : 1;
- mmr_t reserved_0 : 1;
- mmr_t dqlp_int_uc : 1;
- mmr_t dqlp_int_cor : 1;
- mmr_t dqlp_int_hw : 1;
- mmr_t reserved_1 : 1;
- mmr_t dqls_int_uc : 1;
- mmr_t dqls_int_cor : 1;
- mmr_t dqls_int_hw : 1;
- mmr_t reserved_2 : 1;
- mmr_t dqrp_int_uc : 1;
- mmr_t dqrp_int_cor : 1;
- mmr_t dqrp_int_hw : 1;
- mmr_t reserved_3 : 1;
- mmr_t dqrs_int_uc : 1;
- mmr_t dqrs_int_cor : 1;
- mmr_t dqrs_int_hw : 1;
- mmr_t reserved_4 : 1;
- mmr_t pi_reply_overflow : 1;
- mmr_t xn_reply_overflow : 1;
- mmr_t pi_request_overflow : 1;
- mmr_t xn_request_overflow : 1;
- mmr_t red_black_err_timeout : 1;
- mmr_t pi_pkt_size : 1;
- mmr_t xn_pkt_size : 1;
- mmr_t reserved_5 : 29;
- } sh_mem_error_summary_s;
-} sh_mem_error_summary_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MEM_ERROR_OVERFLOW" */
-/* Memory error flags */
-/* ==================================================================== */
-
-typedef union sh_mem_error_overflow_u {
- mmr_t sh_mem_error_overflow_regval;
- struct {
- mmr_t illegal_cmd : 1;
- mmr_t nonexist_addr : 1;
- mmr_t dqlp_dir_perr : 1;
- mmr_t dqrp_dir_perr : 1;
- mmr_t dqlp_dir_uc : 1;
- mmr_t dqlp_dir_cor : 1;
- mmr_t dqrp_dir_uc : 1;
- mmr_t dqrp_dir_cor : 1;
- mmr_t acx_int_hw : 1;
- mmr_t acy_int_hw : 1;
- mmr_t dir_acc : 1;
- mmr_t reserved_0 : 1;
- mmr_t dqlp_int_uc : 1;
- mmr_t dqlp_int_cor : 1;
- mmr_t dqlp_int_hw : 1;
- mmr_t reserved_1 : 1;
- mmr_t dqls_int_uc : 1;
- mmr_t dqls_int_cor : 1;
- mmr_t dqls_int_hw : 1;
- mmr_t reserved_2 : 1;
- mmr_t dqrp_int_uc : 1;
- mmr_t dqrp_int_cor : 1;
- mmr_t dqrp_int_hw : 1;
- mmr_t reserved_3 : 1;
- mmr_t dqrs_int_uc : 1;
- mmr_t dqrs_int_cor : 1;
- mmr_t dqrs_int_hw : 1;
- mmr_t reserved_4 : 1;
- mmr_t pi_reply_overflow : 1;
- mmr_t xn_reply_overflow : 1;
- mmr_t pi_request_overflow : 1;
- mmr_t xn_request_overflow : 1;
- mmr_t red_black_err_timeout : 1;
- mmr_t pi_pkt_size : 1;
- mmr_t xn_pkt_size : 1;
- mmr_t reserved_5 : 29;
- } sh_mem_error_overflow_s;
-} sh_mem_error_overflow_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MEM_ERROR_MASK" */
-/* Memory error flags */
-/* ==================================================================== */
-
-typedef union sh_mem_error_mask_u {
- mmr_t sh_mem_error_mask_regval;
- struct {
- mmr_t illegal_cmd : 1;
- mmr_t nonexist_addr : 1;
- mmr_t dqlp_dir_perr : 1;
- mmr_t dqrp_dir_perr : 1;
- mmr_t dqlp_dir_uc : 1;
- mmr_t dqlp_dir_cor : 1;
- mmr_t dqrp_dir_uc : 1;
- mmr_t dqrp_dir_cor : 1;
- mmr_t acx_int_hw : 1;
- mmr_t acy_int_hw : 1;
- mmr_t dir_acc : 1;
- mmr_t reserved_0 : 1;
- mmr_t dqlp_int_uc : 1;
- mmr_t dqlp_int_cor : 1;
- mmr_t dqlp_int_hw : 1;
- mmr_t reserved_1 : 1;
- mmr_t dqls_int_uc : 1;
- mmr_t dqls_int_cor : 1;
- mmr_t dqls_int_hw : 1;
- mmr_t reserved_2 : 1;
- mmr_t dqrp_int_uc : 1;
- mmr_t dqrp_int_cor : 1;
- mmr_t dqrp_int_hw : 1;
- mmr_t reserved_3 : 1;
- mmr_t dqrs_int_uc : 1;
- mmr_t dqrs_int_cor : 1;
- mmr_t dqrs_int_hw : 1;
- mmr_t reserved_4 : 1;
- mmr_t pi_reply_overflow : 1;
- mmr_t xn_reply_overflow : 1;
- mmr_t pi_request_overflow : 1;
- mmr_t xn_request_overflow : 1;
- mmr_t red_black_err_timeout : 1;
- mmr_t pi_pkt_size : 1;
- mmr_t xn_pkt_size : 1;
- mmr_t reserved_5 : 29;
- } sh_mem_error_mask_s;
-} sh_mem_error_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_DIMM_CFG" */
-/* AC Mem Config Registers */
-/* ==================================================================== */
-
-typedef union sh_x_dimm_cfg_u {
- mmr_t sh_x_dimm_cfg_regval;
- struct {
- mmr_t dimm0_size : 3;
- mmr_t dimm0_2bk : 1;
- mmr_t dimm0_rev : 1;
- mmr_t dimm0_cs : 2;
- mmr_t reserved_0 : 1;
- mmr_t dimm1_size : 3;
- mmr_t dimm1_2bk : 1;
- mmr_t dimm1_rev : 1;
- mmr_t dimm1_cs : 2;
- mmr_t reserved_1 : 1;
- mmr_t dimm2_size : 3;
- mmr_t dimm2_2bk : 1;
- mmr_t dimm2_rev : 1;
- mmr_t dimm2_cs : 2;
- mmr_t reserved_2 : 1;
- mmr_t dimm3_size : 3;
- mmr_t dimm3_2bk : 1;
- mmr_t dimm3_rev : 1;
- mmr_t dimm3_cs : 2;
- mmr_t reserved_3 : 1;
- mmr_t freq : 4;
- mmr_t reserved_4 : 28;
- } sh_x_dimm_cfg_s;
-} sh_x_dimm_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_DIMM_CFG" */
-/* AC Mem Config Registers */
-/* ==================================================================== */
-
-typedef union sh_y_dimm_cfg_u {
- mmr_t sh_y_dimm_cfg_regval;
- struct {
- mmr_t dimm0_size : 3;
- mmr_t dimm0_2bk : 1;
- mmr_t dimm0_rev : 1;
- mmr_t dimm0_cs : 2;
- mmr_t reserved_0 : 1;
- mmr_t dimm1_size : 3;
- mmr_t dimm1_2bk : 1;
- mmr_t dimm1_rev : 1;
- mmr_t dimm1_cs : 2;
- mmr_t reserved_1 : 1;
- mmr_t dimm2_size : 3;
- mmr_t dimm2_2bk : 1;
- mmr_t dimm2_rev : 1;
- mmr_t dimm2_cs : 2;
- mmr_t reserved_2 : 1;
- mmr_t dimm3_size : 3;
- mmr_t dimm3_2bk : 1;
- mmr_t dimm3_rev : 1;
- mmr_t dimm3_cs : 2;
- mmr_t reserved_3 : 1;
- mmr_t freq : 4;
- mmr_t reserved_4 : 28;
- } sh_y_dimm_cfg_s;
-} sh_y_dimm_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_JNR_DIMM_CFG" */
-/* AC Mem Config Registers */
-/* ==================================================================== */
-
-typedef union sh_jnr_dimm_cfg_u {
- mmr_t sh_jnr_dimm_cfg_regval;
- struct {
- mmr_t dimm0_size : 3;
- mmr_t dimm0_2bk : 1;
- mmr_t dimm0_rev : 1;
- mmr_t dimm0_cs : 2;
- mmr_t reserved_0 : 1;
- mmr_t dimm1_size : 3;
- mmr_t dimm1_2bk : 1;
- mmr_t dimm1_rev : 1;
- mmr_t dimm1_cs : 2;
- mmr_t reserved_1 : 1;
- mmr_t dimm2_size : 3;
- mmr_t dimm2_2bk : 1;
- mmr_t dimm2_rev : 1;
- mmr_t dimm2_cs : 2;
- mmr_t reserved_2 : 1;
- mmr_t dimm3_size : 3;
- mmr_t dimm3_2bk : 1;
- mmr_t dimm3_rev : 1;
- mmr_t dimm3_cs : 2;
- mmr_t reserved_3 : 1;
- mmr_t freq : 4;
- mmr_t reserved_4 : 28;
- } sh_jnr_dimm_cfg_s;
-} sh_jnr_dimm_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_PHASE_CFG" */
-/* AC Phase Config Registers */
-/* ==================================================================== */
-
-typedef union sh_x_phase_cfg_u {
- mmr_t sh_x_phase_cfg_regval;
- struct {
- mmr_t ld_a : 5;
- mmr_t ld_b : 5;
- mmr_t dq_ld_a : 5;
- mmr_t dq_ld_b : 5;
- mmr_t hold : 5;
- mmr_t hold_req : 5;
- mmr_t add_cp : 5;
- mmr_t bubble_en : 5;
- mmr_t pha_bubble : 3;
- mmr_t phb_bubble : 3;
- mmr_t phc_bubble : 3;
- mmr_t phd_bubble : 3;
- mmr_t phe_bubble : 3;
- mmr_t sel_a : 4;
- mmr_t dq_sel_a : 4;
- mmr_t reserved_0 : 1;
- } sh_x_phase_cfg_s;
-} sh_x_phase_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_CFG" */
-/* AC Config Registers */
-/* ==================================================================== */
-
-typedef union sh_x_cfg_u {
- mmr_t sh_x_cfg_regval;
- struct {
- mmr_t mode_serial : 1;
- mmr_t dirc_random_replacement : 1;
- mmr_t dir_counter_init : 6;
- mmr_t ta_dlys : 32;
- mmr_t da_bb_clr : 4;
- mmr_t dc_bb_clr : 4;
- mmr_t wt_bb_clr : 4;
- mmr_t sso_wt_en : 1;
- mmr_t trcd2_en : 1;
- mmr_t trcd4_en : 1;
- mmr_t req_cntr_dis : 1;
- mmr_t req_cntr_val : 6;
- mmr_t inv_cas_addr : 1;
- mmr_t clr_dir_cache : 1;
- } sh_x_cfg_s;
-} sh_x_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_DQCT_CFG" */
-/* AC Config Registers */
-/* ==================================================================== */
-
-typedef union sh_x_dqct_cfg_u {
- mmr_t sh_x_dqct_cfg_regval;
- struct {
- mmr_t rd_sel : 4;
- mmr_t wt_sel : 4;
- mmr_t dta_rd_sel : 4;
- mmr_t dta_wt_sel : 4;
- mmr_t dir_rd_sel : 4;
- mmr_t mdir_rd_sel : 4;
- mmr_t reserved_0 : 40;
- } sh_x_dqct_cfg_s;
-} sh_x_dqct_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_REFRESH_CONTROL" */
-/* Refresh Control Register */
-/* ==================================================================== */
-
-typedef union sh_x_refresh_control_u {
- mmr_t sh_x_refresh_control_regval;
- struct {
- mmr_t enable : 8;
- mmr_t interval : 9;
- mmr_t hold : 6;
- mmr_t interleave : 1;
- mmr_t half_rate : 4;
- mmr_t reserved_0 : 36;
- } sh_x_refresh_control_s;
-} sh_x_refresh_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_PHASE_CFG" */
-/* AC Phase Config Registers */
-/* ==================================================================== */
-
-typedef union sh_y_phase_cfg_u {
- mmr_t sh_y_phase_cfg_regval;
- struct {
- mmr_t ld_a : 5;
- mmr_t ld_b : 5;
- mmr_t dq_ld_a : 5;
- mmr_t dq_ld_b : 5;
- mmr_t hold : 5;
- mmr_t hold_req : 5;
- mmr_t add_cp : 5;
- mmr_t bubble_en : 5;
- mmr_t pha_bubble : 3;
- mmr_t phb_bubble : 3;
- mmr_t phc_bubble : 3;
- mmr_t phd_bubble : 3;
- mmr_t phe_bubble : 3;
- mmr_t sel_a : 4;
- mmr_t dq_sel_a : 4;
- mmr_t reserved_0 : 1;
- } sh_y_phase_cfg_s;
-} sh_y_phase_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_CFG" */
-/* AC Config Registers */
-/* ==================================================================== */
-
-typedef union sh_y_cfg_u {
- mmr_t sh_y_cfg_regval;
- struct {
- mmr_t mode_serial : 1;
- mmr_t dirc_random_replacement : 1;
- mmr_t dir_counter_init : 6;
- mmr_t ta_dlys : 32;
- mmr_t da_bb_clr : 4;
- mmr_t dc_bb_clr : 4;
- mmr_t wt_bb_clr : 4;
- mmr_t sso_wt_en : 1;
- mmr_t trcd2_en : 1;
- mmr_t trcd4_en : 1;
- mmr_t req_cntr_dis : 1;
- mmr_t req_cntr_val : 6;
- mmr_t inv_cas_addr : 1;
- mmr_t clr_dir_cache : 1;
- } sh_y_cfg_s;
-} sh_y_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_DQCT_CFG" */
-/* AC Config Registers */
-/* ==================================================================== */
-
-typedef union sh_y_dqct_cfg_u {
- mmr_t sh_y_dqct_cfg_regval;
- struct {
- mmr_t rd_sel : 4;
- mmr_t wt_sel : 4;
- mmr_t dta_rd_sel : 4;
- mmr_t dta_wt_sel : 4;
- mmr_t dir_rd_sel : 4;
- mmr_t mdir_rd_sel : 4;
- mmr_t reserved_0 : 40;
- } sh_y_dqct_cfg_s;
-} sh_y_dqct_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_REFRESH_CONTROL" */
-/* Refresh Control Register */
-/* ==================================================================== */
-
-typedef union sh_y_refresh_control_u {
- mmr_t sh_y_refresh_control_regval;
- struct {
- mmr_t enable : 8;
- mmr_t interval : 9;
- mmr_t hold : 6;
- mmr_t interleave : 1;
- mmr_t half_rate : 4;
- mmr_t reserved_0 : 36;
- } sh_y_refresh_control_s;
-} sh_y_refresh_control_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MEM_RED_BLACK" */
-/* MD fairness watchdog timers */
-/* ==================================================================== */
-
-typedef union sh_mem_red_black_u {
- mmr_t sh_mem_red_black_regval;
- struct {
- mmr_t time : 16;
- mmr_t err_time : 36;
- mmr_t reserved_0 : 12;
- } sh_mem_red_black_s;
-} sh_mem_red_black_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MISC_MEM_CFG" */
-/* ==================================================================== */
-
-typedef union sh_misc_mem_cfg_u {
- mmr_t sh_misc_mem_cfg_regval;
- struct {
- mmr_t express_header_enable : 1;
- mmr_t spec_header_enable : 1;
- mmr_t jnr_bypass_enable : 1;
- mmr_t xn_rd_same_as_pi : 1;
- mmr_t low_write_buffer_threshold : 6;
- mmr_t reserved_0 : 2;
- mmr_t low_victim_buffer_threshold : 6;
- mmr_t reserved_1 : 2;
- mmr_t throttle_cnt : 8;
- mmr_t disabled_read_tnums : 5;
- mmr_t reserved_2 : 3;
- mmr_t disabled_write_tnums : 5;
- mmr_t reserved_3 : 3;
- mmr_t disabled_victims : 6;
- mmr_t reserved_4 : 2;
- mmr_t alternate_xn_rp_plane : 1;
- mmr_t reserved_5 : 11;
- } sh_misc_mem_cfg_s;
-} sh_misc_mem_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PIO_RQ_CRD_CTL" */
-/* pio_rq Credit Circulation Control */
-/* ==================================================================== */
-
-typedef union sh_pio_rq_crd_ctl_u {
- mmr_t sh_pio_rq_crd_ctl_regval;
- struct {
- mmr_t depth : 6;
- mmr_t reserved_0 : 58;
- } sh_pio_rq_crd_ctl_s;
-} sh_pio_rq_crd_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_MD_RQ_CRD_CTL" */
-/* pi_md_rq Credit Circulation Control */
-/* ==================================================================== */
-
-typedef union sh_pi_md_rq_crd_ctl_u {
- mmr_t sh_pi_md_rq_crd_ctl_regval;
- struct {
- mmr_t depth : 6;
- mmr_t reserved_0 : 58;
- } sh_pi_md_rq_crd_ctl_s;
-} sh_pi_md_rq_crd_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_PI_MD_RP_CRD_CTL" */
-/* pi_md_rp Credit Circulation Control */
-/* ==================================================================== */
-
-typedef union sh_pi_md_rp_crd_ctl_u {
- mmr_t sh_pi_md_rp_crd_ctl_regval;
- struct {
- mmr_t depth : 6;
- mmr_t reserved_0 : 58;
- } sh_pi_md_rp_crd_ctl_s;
-} sh_pi_md_rp_crd_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_RQ_CRD_CTL" */
-/* xn_md_rq Credit Circulation Control */
-/* ==================================================================== */
-
-typedef union sh_xn_md_rq_crd_ctl_u {
- mmr_t sh_xn_md_rq_crd_ctl_regval;
- struct {
- mmr_t depth : 6;
- mmr_t reserved_0 : 58;
- } sh_xn_md_rq_crd_ctl_s;
-} sh_xn_md_rq_crd_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_XN_MD_RP_CRD_CTL" */
-/* xn_md_rp Credit Circulation Control */
-/* ==================================================================== */
-
-typedef union sh_xn_md_rp_crd_ctl_u {
- mmr_t sh_xn_md_rp_crd_ctl_regval;
- struct {
- mmr_t depth : 6;
- mmr_t reserved_0 : 58;
- } sh_xn_md_rp_crd_ctl_s;
-} sh_xn_md_rp_crd_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_TAG0" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_x_tag0_u {
- mmr_t sh_x_tag0_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_x_tag0_s;
-} sh_x_tag0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_TAG1" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_x_tag1_u {
- mmr_t sh_x_tag1_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_x_tag1_s;
-} sh_x_tag1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_TAG2" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_x_tag2_u {
- mmr_t sh_x_tag2_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_x_tag2_s;
-} sh_x_tag2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_TAG3" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_x_tag3_u {
- mmr_t sh_x_tag3_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_x_tag3_s;
-} sh_x_tag3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_TAG4" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_x_tag4_u {
- mmr_t sh_x_tag4_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_x_tag4_s;
-} sh_x_tag4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_TAG5" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_x_tag5_u {
- mmr_t sh_x_tag5_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_x_tag5_s;
-} sh_x_tag5_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_TAG6" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_x_tag6_u {
- mmr_t sh_x_tag6_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_x_tag6_s;
-} sh_x_tag6_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_TAG7" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_x_tag7_u {
- mmr_t sh_x_tag7_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_x_tag7_s;
-} sh_x_tag7_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG0" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_y_tag0_u {
- mmr_t sh_y_tag0_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_y_tag0_s;
-} sh_y_tag0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG1" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_y_tag1_u {
- mmr_t sh_y_tag1_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_y_tag1_s;
-} sh_y_tag1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG2" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_y_tag2_u {
- mmr_t sh_y_tag2_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_y_tag2_s;
-} sh_y_tag2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG3" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_y_tag3_u {
- mmr_t sh_y_tag3_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_y_tag3_s;
-} sh_y_tag3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG4" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_y_tag4_u {
- mmr_t sh_y_tag4_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_y_tag4_s;
-} sh_y_tag4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG5" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_y_tag5_u {
- mmr_t sh_y_tag5_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_y_tag5_s;
-} sh_y_tag5_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG6" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_y_tag6_u {
- mmr_t sh_y_tag6_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_y_tag6_s;
-} sh_y_tag6_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG7" */
-/* AC tag Registers */
-/* ==================================================================== */
-
-typedef union sh_y_tag7_u {
- mmr_t sh_y_tag7_regval;
- struct {
- mmr_t tag : 20;
- mmr_t reserved_0 : 44;
- } sh_y_tag7_s;
-} sh_y_tag7_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MMRBIST_BASE" */
-/* mmr/bist base address */
-/* ==================================================================== */
-
-typedef union sh_mmrbist_base_u {
- mmr_t sh_mmrbist_base_regval;
- struct {
- mmr_t reserved_0 : 3;
- mmr_t dword_addr : 47;
- mmr_t reserved_1 : 14;
- } sh_mmrbist_base_s;
-} sh_mmrbist_base_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MMRBIST_CTL" */
-/* Bist base address */
-/* ==================================================================== */
-
-typedef union sh_mmrbist_ctl_u {
- mmr_t sh_mmrbist_ctl_regval;
- struct {
- mmr_t block_length : 31;
- mmr_t reserved_0 : 1;
- mmr_t cmd : 7;
- mmr_t reserved_1 : 1;
- mmr_t in_progress : 1;
- mmr_t fail : 1;
- mmr_t mem_idle : 1;
- mmr_t reserved_2 : 1;
- mmr_t reset_state : 1;
- mmr_t reserved_3 : 19;
- } sh_mmrbist_ctl_s;
-} sh_mmrbist_ctl_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DBUG_DATA_CFG" */
-/* configuration for md debug data muxes */
-/* ==================================================================== */
-
-typedef union sh_md_dbug_data_cfg_u {
- mmr_t sh_md_dbug_data_cfg_regval;
- struct {
- mmr_t nibble0_chiplet : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_chiplet : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_chiplet : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_chiplet : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_chiplet : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_chiplet : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_chiplet : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_chiplet : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble : 3;
- mmr_t reserved_15 : 1;
- } sh_md_dbug_data_cfg_s;
-} sh_md_dbug_data_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DBUG_TRIGGER_CFG" */
-/* configuration for md debug triggers */
-/* ==================================================================== */
-
-typedef union sh_md_dbug_trigger_cfg_u {
- mmr_t sh_md_dbug_trigger_cfg_regval;
- struct {
- mmr_t nibble0_chiplet : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble0_nibble : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble1_chiplet : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble1_nibble : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble2_chiplet : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble2_nibble : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble3_chiplet : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble3_nibble : 3;
- mmr_t reserved_7 : 1;
- mmr_t nibble4_chiplet : 3;
- mmr_t reserved_8 : 1;
- mmr_t nibble4_nibble : 3;
- mmr_t reserved_9 : 1;
- mmr_t nibble5_chiplet : 3;
- mmr_t reserved_10 : 1;
- mmr_t nibble5_nibble : 3;
- mmr_t reserved_11 : 1;
- mmr_t nibble6_chiplet : 3;
- mmr_t reserved_12 : 1;
- mmr_t nibble6_nibble : 3;
- mmr_t reserved_13 : 1;
- mmr_t nibble7_chiplet : 3;
- mmr_t reserved_14 : 1;
- mmr_t nibble7_nibble : 3;
- mmr_t enable : 1;
- } sh_md_dbug_trigger_cfg_s;
-} sh_md_dbug_trigger_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DBUG_COMPARE" */
-/* md debug compare pattern and mask */
-/* ==================================================================== */
-
-typedef union sh_md_dbug_compare_u {
- mmr_t sh_md_dbug_compare_regval;
- struct {
- mmr_t pattern : 32;
- mmr_t mask : 32;
- } sh_md_dbug_compare_s;
-} sh_md_dbug_compare_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_MOD_DBUG_SEL" */
-/* MD acx debug select */
-/* ==================================================================== */
-
-typedef union sh_x_mod_dbug_sel_u {
- mmr_t sh_x_mod_dbug_sel_regval;
- struct {
- mmr_t tag_sel : 8;
- mmr_t wbq_sel : 8;
- mmr_t arb_sel : 8;
- mmr_t atl_sel : 11;
- mmr_t atr_sel : 11;
- mmr_t dql_sel : 6;
- mmr_t dqr_sel : 6;
- mmr_t reserved_0 : 6;
- } sh_x_mod_dbug_sel_s;
-} sh_x_mod_dbug_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_DBUG_SEL" */
-/* MD acx debug select */
-/* ==================================================================== */
-
-typedef union sh_x_dbug_sel_u {
- mmr_t sh_x_dbug_sel_regval;
- struct {
- mmr_t dbg_sel : 24;
- mmr_t reserved_0 : 40;
- } sh_x_dbug_sel_s;
-} sh_x_dbug_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_LADDR_CMP" */
-/* MD acx address compare */
-/* ==================================================================== */
-
-typedef union sh_x_laddr_cmp_u {
- mmr_t sh_x_laddr_cmp_regval;
- struct {
- mmr_t cmp_val : 28;
- mmr_t reserved_0 : 4;
- mmr_t mask_val : 28;
- mmr_t reserved_1 : 4;
- } sh_x_laddr_cmp_s;
-} sh_x_laddr_cmp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_RADDR_CMP" */
-/* MD acx address compare */
-/* ==================================================================== */
-
-typedef union sh_x_raddr_cmp_u {
- mmr_t sh_x_raddr_cmp_regval;
- struct {
- mmr_t cmp_val : 28;
- mmr_t reserved_0 : 4;
- mmr_t mask_val : 28;
- mmr_t reserved_1 : 4;
- } sh_x_raddr_cmp_s;
-} sh_x_raddr_cmp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_TAG_CMP" */
-/* MD acx tagmgr compare */
-/* ==================================================================== */
-
-typedef union sh_x_tag_cmp_u {
- mmr_t sh_x_tag_cmp_regval;
- struct {
- mmr_t cmd : 8;
- mmr_t addr : 33;
- mmr_t src : 14;
- mmr_t reserved_0 : 9;
- } sh_x_tag_cmp_s;
-} sh_x_tag_cmp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_X_TAG_MASK" */
-/* MD acx tagmgr mask */
-/* ==================================================================== */
-
-typedef union sh_x_tag_mask_u {
- mmr_t sh_x_tag_mask_regval;
- struct {
- mmr_t cmd : 8;
- mmr_t addr : 33;
- mmr_t src : 14;
- mmr_t reserved_0 : 9;
- } sh_x_tag_mask_s;
-} sh_x_tag_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_MOD_DBUG_SEL" */
-/* MD acy debug select */
-/* ==================================================================== */
-
-typedef union sh_y_mod_dbug_sel_u {
- mmr_t sh_y_mod_dbug_sel_regval;
- struct {
- mmr_t tag_sel : 8;
- mmr_t wbq_sel : 8;
- mmr_t arb_sel : 8;
- mmr_t atl_sel : 11;
- mmr_t atr_sel : 11;
- mmr_t dql_sel : 6;
- mmr_t dqr_sel : 6;
- mmr_t reserved_0 : 6;
- } sh_y_mod_dbug_sel_s;
-} sh_y_mod_dbug_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_DBUG_SEL" */
-/* MD acy debug select */
-/* ==================================================================== */
-
-typedef union sh_y_dbug_sel_u {
- mmr_t sh_y_dbug_sel_regval;
- struct {
- mmr_t dbg_sel : 24;
- mmr_t reserved_0 : 40;
- } sh_y_dbug_sel_s;
-} sh_y_dbug_sel_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_LADDR_CMP" */
-/* MD acy address compare */
-/* ==================================================================== */
-
-typedef union sh_y_laddr_cmp_u {
- mmr_t sh_y_laddr_cmp_regval;
- struct {
- mmr_t cmp_val : 28;
- mmr_t reserved_0 : 4;
- mmr_t mask_val : 28;
- mmr_t reserved_1 : 4;
- } sh_y_laddr_cmp_s;
-} sh_y_laddr_cmp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_RADDR_CMP" */
-/* MD acy address compare */
-/* ==================================================================== */
-
-typedef union sh_y_raddr_cmp_u {
- mmr_t sh_y_raddr_cmp_regval;
- struct {
- mmr_t cmp_val : 28;
- mmr_t reserved_0 : 4;
- mmr_t mask_val : 28;
- mmr_t reserved_1 : 4;
- } sh_y_raddr_cmp_s;
-} sh_y_raddr_cmp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG_CMP" */
-/* MD acy tagmgr compare */
-/* ==================================================================== */
-
-typedef union sh_y_tag_cmp_u {
- mmr_t sh_y_tag_cmp_regval;
- struct {
- mmr_t cmd : 8;
- mmr_t addr : 33;
- mmr_t src : 14;
- mmr_t reserved_0 : 9;
- } sh_y_tag_cmp_s;
-} sh_y_tag_cmp_u_t;
-
-/* ==================================================================== */
-/* Register "SH_Y_TAG_MASK" */
-/* MD acy tagmgr mask */
-/* ==================================================================== */
-
-typedef union sh_y_tag_mask_u {
- mmr_t sh_y_tag_mask_regval;
- struct {
- mmr_t cmd : 8;
- mmr_t addr : 33;
- mmr_t src : 14;
- mmr_t reserved_0 : 9;
- } sh_y_tag_mask_s;
-} sh_y_tag_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_JNR_DBUG_DATA_CFG" */
-/* configuration for md jnr debug data muxes */
-/* ==================================================================== */
-
-typedef union sh_md_jnr_dbug_data_cfg_u {
- mmr_t sh_md_jnr_dbug_data_cfg_regval;
- struct {
- mmr_t nibble0_sel : 3;
- mmr_t reserved_0 : 1;
- mmr_t nibble1_sel : 3;
- mmr_t reserved_1 : 1;
- mmr_t nibble2_sel : 3;
- mmr_t reserved_2 : 1;
- mmr_t nibble3_sel : 3;
- mmr_t reserved_3 : 1;
- mmr_t nibble4_sel : 3;
- mmr_t reserved_4 : 1;
- mmr_t nibble5_sel : 3;
- mmr_t reserved_5 : 1;
- mmr_t nibble6_sel : 3;
- mmr_t reserved_6 : 1;
- mmr_t nibble7_sel : 3;
- mmr_t reserved_7 : 33;
- } sh_md_jnr_dbug_data_cfg_s;
-} sh_md_jnr_dbug_data_cfg_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_LAST_CREDIT" */
-/* captures last credit values on reset */
-/* ==================================================================== */
-
-typedef union sh_md_last_credit_u {
- mmr_t sh_md_last_credit_regval;
- struct {
- mmr_t rq_to_pi : 6;
- mmr_t reserved_0 : 2;
- mmr_t rp_to_pi : 6;
- mmr_t reserved_1 : 2;
- mmr_t rq_to_xn : 6;
- mmr_t reserved_2 : 2;
- mmr_t rp_to_xn : 6;
- mmr_t reserved_3 : 2;
- mmr_t to_lb : 6;
- mmr_t reserved_4 : 26;
- } sh_md_last_credit_s;
-} sh_md_last_credit_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MEM_CAPTURE_ADDR" */
-/* Address capture address register */
-/* ==================================================================== */
-
-typedef union sh_mem_capture_addr_u {
- mmr_t sh_mem_capture_addr_regval;
- struct {
- mmr_t reserved_0 : 3;
- mmr_t addr : 33;
- mmr_t cmd : 8;
- mmr_t reserved_1 : 20;
- } sh_mem_capture_addr_s;
-} sh_mem_capture_addr_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MEM_CAPTURE_MASK" */
-/* Address capture mask register */
-/* ==================================================================== */
-
-typedef union sh_mem_capture_mask_u {
- mmr_t sh_mem_capture_mask_regval;
- struct {
- mmr_t reserved_0 : 3;
- mmr_t addr : 33;
- mmr_t cmd : 8;
- mmr_t enable_local : 1;
- mmr_t enable_remote : 1;
- mmr_t reserved_1 : 18;
- } sh_mem_capture_mask_s;
-} sh_mem_capture_mask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MEM_CAPTURE_HDR" */
-/* Address capture header register */
-/* ==================================================================== */
-
-typedef union sh_mem_capture_hdr_u {
- mmr_t sh_mem_capture_hdr_regval;
- struct {
- mmr_t reserved_0 : 3;
- mmr_t addr : 33;
- mmr_t cmd : 8;
- mmr_t src : 14;
- mmr_t cntr : 6;
- } sh_mem_capture_hdr_s;
-} sh_mem_capture_hdr_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_CONFIG" */
-/* DQ directory config register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_config_u {
- mmr_t sh_md_dqlp_mmr_dir_config_regval;
- struct {
- mmr_t sys_size : 3;
- mmr_t en_direcc : 1;
- mmr_t en_dirpois : 1;
- mmr_t reserved_0 : 59;
- } sh_md_dqlp_mmr_dir_config_s;
-} sh_md_dqlp_mmr_dir_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRESVEC0" */
-/* node [63:0] presence bits */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_presvec0_u {
- mmr_t sh_md_dqlp_mmr_dir_presvec0_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_presvec0_s;
-} sh_md_dqlp_mmr_dir_presvec0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRESVEC1" */
-/* node [127:64] presence bits */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_presvec1_u {
- mmr_t sh_md_dqlp_mmr_dir_presvec1_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_presvec1_s;
-} sh_md_dqlp_mmr_dir_presvec1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRESVEC2" */
-/* node [191:128] presence bits */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_presvec2_u {
- mmr_t sh_md_dqlp_mmr_dir_presvec2_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_presvec2_s;
-} sh_md_dqlp_mmr_dir_presvec2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRESVEC3" */
-/* node [255:192] presence bits */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_presvec3_u {
- mmr_t sh_md_dqlp_mmr_dir_presvec3_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_presvec3_s;
-} sh_md_dqlp_mmr_dir_presvec3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC0" */
-/* local vector for acc=0 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_locvec0_u {
- mmr_t sh_md_dqlp_mmr_dir_locvec0_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_locvec0_s;
-} sh_md_dqlp_mmr_dir_locvec0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC1" */
-/* local vector for acc=1 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_locvec1_u {
- mmr_t sh_md_dqlp_mmr_dir_locvec1_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_locvec1_s;
-} sh_md_dqlp_mmr_dir_locvec1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC2" */
-/* local vector for acc=2 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_locvec2_u {
- mmr_t sh_md_dqlp_mmr_dir_locvec2_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_locvec2_s;
-} sh_md_dqlp_mmr_dir_locvec2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC3" */
-/* local vector for acc=3 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_locvec3_u {
- mmr_t sh_md_dqlp_mmr_dir_locvec3_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_locvec3_s;
-} sh_md_dqlp_mmr_dir_locvec3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC4" */
-/* local vector for acc=4 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_locvec4_u {
- mmr_t sh_md_dqlp_mmr_dir_locvec4_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_locvec4_s;
-} sh_md_dqlp_mmr_dir_locvec4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC5" */
-/* local vector for acc=5 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_locvec5_u {
- mmr_t sh_md_dqlp_mmr_dir_locvec5_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_locvec5_s;
-} sh_md_dqlp_mmr_dir_locvec5_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC6" */
-/* local vector for acc=6 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_locvec6_u {
- mmr_t sh_md_dqlp_mmr_dir_locvec6_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_locvec6_s;
-} sh_md_dqlp_mmr_dir_locvec6_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_LOCVEC7" */
-/* local vector for acc=7 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_locvec7_u {
- mmr_t sh_md_dqlp_mmr_dir_locvec7_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqlp_mmr_dir_locvec7_s;
-} sh_md_dqlp_mmr_dir_locvec7_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC0" */
-/* privilege vector for acc=0 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_privec0_u {
- mmr_t sh_md_dqlp_mmr_dir_privec0_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqlp_mmr_dir_privec0_s;
-} sh_md_dqlp_mmr_dir_privec0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC1" */
-/* privilege vector for acc=1 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_privec1_u {
- mmr_t sh_md_dqlp_mmr_dir_privec1_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqlp_mmr_dir_privec1_s;
-} sh_md_dqlp_mmr_dir_privec1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC2" */
-/* privilege vector for acc=2 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_privec2_u {
- mmr_t sh_md_dqlp_mmr_dir_privec2_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqlp_mmr_dir_privec2_s;
-} sh_md_dqlp_mmr_dir_privec2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC3" */
-/* privilege vector for acc=3 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_privec3_u {
- mmr_t sh_md_dqlp_mmr_dir_privec3_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqlp_mmr_dir_privec3_s;
-} sh_md_dqlp_mmr_dir_privec3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC4" */
-/* privilege vector for acc=4 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_privec4_u {
- mmr_t sh_md_dqlp_mmr_dir_privec4_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqlp_mmr_dir_privec4_s;
-} sh_md_dqlp_mmr_dir_privec4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC5" */
-/* privilege vector for acc=5 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_privec5_u {
- mmr_t sh_md_dqlp_mmr_dir_privec5_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqlp_mmr_dir_privec5_s;
-} sh_md_dqlp_mmr_dir_privec5_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC6" */
-/* privilege vector for acc=6 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_privec6_u {
- mmr_t sh_md_dqlp_mmr_dir_privec6_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqlp_mmr_dir_privec6_s;
-} sh_md_dqlp_mmr_dir_privec6_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC7" */
-/* privilege vector for acc=7 */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_privec7_u {
- mmr_t sh_md_dqlp_mmr_dir_privec7_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqlp_mmr_dir_privec7_s;
-} sh_md_dqlp_mmr_dir_privec7_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_TIMER" */
-/* MD SXRO timer */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_timer_u {
- mmr_t sh_md_dqlp_mmr_dir_timer_regval;
- struct {
- mmr_t timer_div : 12;
- mmr_t timer_en : 1;
- mmr_t timer_cur : 9;
- mmr_t reserved_0 : 42;
- } sh_md_dqlp_mmr_dir_timer_s;
-} sh_md_dqlp_mmr_dir_timer_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_PIOWD_DIR_ENTRY" */
-/* directory pio write data */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_piowd_dir_entry_u {
- mmr_t sh_md_dqlp_mmr_piowd_dir_entry_regval;
- struct {
- mmr_t dira : 26;
- mmr_t dirb : 26;
- mmr_t pri : 3;
- mmr_t acc : 3;
- mmr_t reserved_0 : 6;
- } sh_md_dqlp_mmr_piowd_dir_entry_s;
-} sh_md_dqlp_mmr_piowd_dir_entry_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_PIOWD_DIR_ECC" */
-/* directory ecc register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_piowd_dir_ecc_u {
- mmr_t sh_md_dqlp_mmr_piowd_dir_ecc_regval;
- struct {
- mmr_t ecca : 7;
- mmr_t eccb : 7;
- mmr_t reserved_0 : 50;
- } sh_md_dqlp_mmr_piowd_dir_ecc_s;
-} sh_md_dqlp_mmr_piowd_dir_ecc_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XPIORD_XDIR_ENTRY" */
-/* x directory pio read data */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_xpiord_xdir_entry_u {
- mmr_t sh_md_dqlp_mmr_xpiord_xdir_entry_regval;
- struct {
- mmr_t dira : 26;
- mmr_t dirb : 26;
- mmr_t pri : 3;
- mmr_t acc : 3;
- mmr_t cor : 1;
- mmr_t unc : 1;
- mmr_t reserved_0 : 4;
- } sh_md_dqlp_mmr_xpiord_xdir_entry_s;
-} sh_md_dqlp_mmr_xpiord_xdir_entry_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XPIORD_XDIR_ECC" */
-/* x directory ecc */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_xpiord_xdir_ecc_u {
- mmr_t sh_md_dqlp_mmr_xpiord_xdir_ecc_regval;
- struct {
- mmr_t ecca : 7;
- mmr_t eccb : 7;
- mmr_t reserved_0 : 50;
- } sh_md_dqlp_mmr_xpiord_xdir_ecc_s;
-} sh_md_dqlp_mmr_xpiord_xdir_ecc_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YPIORD_YDIR_ENTRY" */
-/* y directory pio read data */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_ypiord_ydir_entry_u {
- mmr_t sh_md_dqlp_mmr_ypiord_ydir_entry_regval;
- struct {
- mmr_t dira : 26;
- mmr_t dirb : 26;
- mmr_t pri : 3;
- mmr_t acc : 3;
- mmr_t cor : 1;
- mmr_t unc : 1;
- mmr_t reserved_0 : 4;
- } sh_md_dqlp_mmr_ypiord_ydir_entry_s;
-} sh_md_dqlp_mmr_ypiord_ydir_entry_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YPIORD_YDIR_ECC" */
-/* y directory ecc */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_ypiord_ydir_ecc_u {
- mmr_t sh_md_dqlp_mmr_ypiord_ydir_ecc_regval;
- struct {
- mmr_t ecca : 7;
- mmr_t eccb : 7;
- mmr_t reserved_0 : 50;
- } sh_md_dqlp_mmr_ypiord_ydir_ecc_s;
-} sh_md_dqlp_mmr_ypiord_ydir_ecc_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XCERR1" */
-/* correctable dir ecc group 1 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_xcerr1_u {
- mmr_t sh_md_dqlp_mmr_xcerr1_regval;
- struct {
- mmr_t grp1 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 25;
- } sh_md_dqlp_mmr_xcerr1_s;
-} sh_md_dqlp_mmr_xcerr1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XCERR2" */
-/* correctable dir ecc group 2 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_xcerr2_u {
- mmr_t sh_md_dqlp_mmr_xcerr2_regval;
- struct {
- mmr_t grp2 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 26;
- } sh_md_dqlp_mmr_xcerr2_s;
-} sh_md_dqlp_mmr_xcerr2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XUERR1" */
-/* uncorrectable dir ecc group 1 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_xuerr1_u {
- mmr_t sh_md_dqlp_mmr_xuerr1_regval;
- struct {
- mmr_t grp1 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 25;
- } sh_md_dqlp_mmr_xuerr1_s;
-} sh_md_dqlp_mmr_xuerr1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XUERR2" */
-/* uncorrectable dir ecc group 2 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_xuerr2_u {
- mmr_t sh_md_dqlp_mmr_xuerr2_regval;
- struct {
- mmr_t grp2 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 26;
- } sh_md_dqlp_mmr_xuerr2_s;
-} sh_md_dqlp_mmr_xuerr2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XPERR" */
-/* protocol error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_xperr_u {
- mmr_t sh_md_dqlp_mmr_xperr_regval;
- struct {
- mmr_t dir : 26;
- mmr_t cmd : 8;
- mmr_t src : 14;
- mmr_t prige : 1;
- mmr_t priv : 1;
- mmr_t cor : 1;
- mmr_t unc : 1;
- mmr_t mybit : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 1;
- } sh_md_dqlp_mmr_xperr_s;
-} sh_md_dqlp_mmr_xperr_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YCERR1" */
-/* correctable dir ecc group 1 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_ycerr1_u {
- mmr_t sh_md_dqlp_mmr_ycerr1_regval;
- struct {
- mmr_t grp1 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 25;
- } sh_md_dqlp_mmr_ycerr1_s;
-} sh_md_dqlp_mmr_ycerr1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YCERR2" */
-/* correctable dir ecc group 2 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_ycerr2_u {
- mmr_t sh_md_dqlp_mmr_ycerr2_regval;
- struct {
- mmr_t grp2 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 26;
- } sh_md_dqlp_mmr_ycerr2_s;
-} sh_md_dqlp_mmr_ycerr2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YUERR1" */
-/* uncorrectable dir ecc group 1 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_yuerr1_u {
- mmr_t sh_md_dqlp_mmr_yuerr1_regval;
- struct {
- mmr_t grp1 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 25;
- } sh_md_dqlp_mmr_yuerr1_s;
-} sh_md_dqlp_mmr_yuerr1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YUERR2" */
-/* uncorrectable dir ecc group 2 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_yuerr2_u {
- mmr_t sh_md_dqlp_mmr_yuerr2_regval;
- struct {
- mmr_t grp2 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 26;
- } sh_md_dqlp_mmr_yuerr2_s;
-} sh_md_dqlp_mmr_yuerr2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YPERR" */
-/* protocol error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_yperr_u {
- mmr_t sh_md_dqlp_mmr_yperr_regval;
- struct {
- mmr_t dir : 26;
- mmr_t cmd : 8;
- mmr_t src : 14;
- mmr_t prige : 1;
- mmr_t priv : 1;
- mmr_t cor : 1;
- mmr_t unc : 1;
- mmr_t mybit : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 1;
- } sh_md_dqlp_mmr_yperr_s;
-} sh_md_dqlp_mmr_yperr_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_CMDTRIG" */
-/* cmd triggers */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_cmdtrig_u {
- mmr_t sh_md_dqlp_mmr_dir_cmdtrig_regval;
- struct {
- mmr_t cmd0 : 8;
- mmr_t cmd1 : 8;
- mmr_t cmd2 : 8;
- mmr_t cmd3 : 8;
- mmr_t reserved_0 : 32;
- } sh_md_dqlp_mmr_dir_cmdtrig_s;
-} sh_md_dqlp_mmr_dir_cmdtrig_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_TBLTRIG" */
-/* dir table trigger */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_tbltrig_u {
- mmr_t sh_md_dqlp_mmr_dir_tbltrig_regval;
- struct {
- mmr_t src : 14;
- mmr_t cmd : 8;
- mmr_t acc : 2;
- mmr_t prige : 1;
- mmr_t dirst : 9;
- mmr_t mybit : 8;
- mmr_t reserved_0 : 22;
- } sh_md_dqlp_mmr_dir_tbltrig_s;
-} sh_md_dqlp_mmr_dir_tbltrig_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_DIR_TBLMASK" */
-/* dir table trigger mask */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_dir_tblmask_u {
- mmr_t sh_md_dqlp_mmr_dir_tblmask_regval;
- struct {
- mmr_t src : 14;
- mmr_t cmd : 8;
- mmr_t acc : 2;
- mmr_t prige : 1;
- mmr_t dirst : 9;
- mmr_t mybit : 8;
- mmr_t reserved_0 : 22;
- } sh_md_dqlp_mmr_dir_tblmask_s;
-} sh_md_dqlp_mmr_dir_tblmask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_xbist_h_u {
- mmr_t sh_md_dqlp_mmr_xbist_h_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t arm : 1;
- mmr_t reserved_1 : 21;
- } sh_md_dqlp_mmr_xbist_h_s;
-} sh_md_dqlp_mmr_xbist_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_xbist_l_u {
- mmr_t sh_md_dqlp_mmr_xbist_l_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqlp_mmr_xbist_l_s;
-} sh_md_dqlp_mmr_xbist_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_xbist_err_h_u {
- mmr_t sh_md_dqlp_mmr_xbist_err_h_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqlp_mmr_xbist_err_h_s;
-} sh_md_dqlp_mmr_xbist_err_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_XBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_xbist_err_l_u {
- mmr_t sh_md_dqlp_mmr_xbist_err_l_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqlp_mmr_xbist_err_l_s;
-} sh_md_dqlp_mmr_xbist_err_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_ybist_h_u {
- mmr_t sh_md_dqlp_mmr_ybist_h_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t arm : 1;
- mmr_t reserved_1 : 21;
- } sh_md_dqlp_mmr_ybist_h_s;
-} sh_md_dqlp_mmr_ybist_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_ybist_l_u {
- mmr_t sh_md_dqlp_mmr_ybist_l_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqlp_mmr_ybist_l_s;
-} sh_md_dqlp_mmr_ybist_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_ybist_err_h_u {
- mmr_t sh_md_dqlp_mmr_ybist_err_h_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqlp_mmr_ybist_err_h_s;
-} sh_md_dqlp_mmr_ybist_err_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLP_MMR_YBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqlp_mmr_ybist_err_l_u {
- mmr_t sh_md_dqlp_mmr_ybist_err_l_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqlp_mmr_ybist_err_l_s;
-} sh_md_dqlp_mmr_ybist_err_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_XBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqls_mmr_xbist_h_u {
- mmr_t sh_md_dqls_mmr_xbist_h_regval;
- struct {
- mmr_t pat : 40;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 21;
- } sh_md_dqls_mmr_xbist_h_s;
-} sh_md_dqls_mmr_xbist_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_XBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqls_mmr_xbist_l_u {
- mmr_t sh_md_dqls_mmr_xbist_l_regval;
- struct {
- mmr_t pat : 40;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqls_mmr_xbist_l_s;
-} sh_md_dqls_mmr_xbist_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_XBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqls_mmr_xbist_err_h_u {
- mmr_t sh_md_dqls_mmr_xbist_err_h_regval;
- struct {
- mmr_t pat : 40;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqls_mmr_xbist_err_h_s;
-} sh_md_dqls_mmr_xbist_err_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_XBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqls_mmr_xbist_err_l_u {
- mmr_t sh_md_dqls_mmr_xbist_err_l_regval;
- struct {
- mmr_t pat : 40;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqls_mmr_xbist_err_l_s;
-} sh_md_dqls_mmr_xbist_err_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_YBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqls_mmr_ybist_h_u {
- mmr_t sh_md_dqls_mmr_ybist_h_regval;
- struct {
- mmr_t pat : 40;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 21;
- } sh_md_dqls_mmr_ybist_h_s;
-} sh_md_dqls_mmr_ybist_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_YBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqls_mmr_ybist_l_u {
- mmr_t sh_md_dqls_mmr_ybist_l_regval;
- struct {
- mmr_t pat : 40;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqls_mmr_ybist_l_s;
-} sh_md_dqls_mmr_ybist_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_YBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqls_mmr_ybist_err_h_u {
- mmr_t sh_md_dqls_mmr_ybist_err_h_regval;
- struct {
- mmr_t pat : 40;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqls_mmr_ybist_err_h_s;
-} sh_md_dqls_mmr_ybist_err_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_YBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqls_mmr_ybist_err_l_u {
- mmr_t sh_md_dqls_mmr_ybist_err_l_regval;
- struct {
- mmr_t pat : 40;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqls_mmr_ybist_err_l_s;
-} sh_md_dqls_mmr_ybist_err_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_JNR_DEBUG" */
-/* joiner/fct debug configuration */
-/* ==================================================================== */
-
-typedef union sh_md_dqls_mmr_jnr_debug_u {
- mmr_t sh_md_dqls_mmr_jnr_debug_regval;
- struct {
- mmr_t px : 1;
- mmr_t rw : 1;
- mmr_t reserved_0 : 62;
- } sh_md_dqls_mmr_jnr_debug_s;
-} sh_md_dqls_mmr_jnr_debug_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQLS_MMR_XAMOPW_ERR" */
-/* amo/partial rmw ecc error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqls_mmr_xamopw_err_u {
- mmr_t sh_md_dqls_mmr_xamopw_err_regval;
- struct {
- mmr_t ssyn : 8;
- mmr_t scor : 1;
- mmr_t sunc : 1;
- mmr_t reserved_0 : 6;
- mmr_t rsyn : 8;
- mmr_t rcor : 1;
- mmr_t runc : 1;
- mmr_t reserved_1 : 6;
- mmr_t arm : 1;
- mmr_t reserved_2 : 31;
- } sh_md_dqls_mmr_xamopw_err_s;
-} sh_md_dqls_mmr_xamopw_err_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_CONFIG" */
-/* DQ directory config register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_config_u {
- mmr_t sh_md_dqrp_mmr_dir_config_regval;
- struct {
- mmr_t sys_size : 3;
- mmr_t en_direcc : 1;
- mmr_t en_dirpois : 1;
- mmr_t reserved_0 : 59;
- } sh_md_dqrp_mmr_dir_config_s;
-} sh_md_dqrp_mmr_dir_config_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRESVEC0" */
-/* node [63:0] presence bits */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_presvec0_u {
- mmr_t sh_md_dqrp_mmr_dir_presvec0_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_presvec0_s;
-} sh_md_dqrp_mmr_dir_presvec0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRESVEC1" */
-/* node [127:64] presence bits */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_presvec1_u {
- mmr_t sh_md_dqrp_mmr_dir_presvec1_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_presvec1_s;
-} sh_md_dqrp_mmr_dir_presvec1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRESVEC2" */
-/* node [191:128] presence bits */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_presvec2_u {
- mmr_t sh_md_dqrp_mmr_dir_presvec2_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_presvec2_s;
-} sh_md_dqrp_mmr_dir_presvec2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRESVEC3" */
-/* node [255:192] presence bits */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_presvec3_u {
- mmr_t sh_md_dqrp_mmr_dir_presvec3_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_presvec3_s;
-} sh_md_dqrp_mmr_dir_presvec3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC0" */
-/* local vector for acc=0 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_locvec0_u {
- mmr_t sh_md_dqrp_mmr_dir_locvec0_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_locvec0_s;
-} sh_md_dqrp_mmr_dir_locvec0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC1" */
-/* local vector for acc=1 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_locvec1_u {
- mmr_t sh_md_dqrp_mmr_dir_locvec1_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_locvec1_s;
-} sh_md_dqrp_mmr_dir_locvec1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC2" */
-/* local vector for acc=2 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_locvec2_u {
- mmr_t sh_md_dqrp_mmr_dir_locvec2_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_locvec2_s;
-} sh_md_dqrp_mmr_dir_locvec2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC3" */
-/* local vector for acc=3 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_locvec3_u {
- mmr_t sh_md_dqrp_mmr_dir_locvec3_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_locvec3_s;
-} sh_md_dqrp_mmr_dir_locvec3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC4" */
-/* local vector for acc=4 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_locvec4_u {
- mmr_t sh_md_dqrp_mmr_dir_locvec4_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_locvec4_s;
-} sh_md_dqrp_mmr_dir_locvec4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC5" */
-/* local vector for acc=5 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_locvec5_u {
- mmr_t sh_md_dqrp_mmr_dir_locvec5_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_locvec5_s;
-} sh_md_dqrp_mmr_dir_locvec5_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC6" */
-/* local vector for acc=6 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_locvec6_u {
- mmr_t sh_md_dqrp_mmr_dir_locvec6_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_locvec6_s;
-} sh_md_dqrp_mmr_dir_locvec6_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_LOCVEC7" */
-/* local vector for acc=7 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_locvec7_u {
- mmr_t sh_md_dqrp_mmr_dir_locvec7_regval;
- struct {
- mmr_t vec : 64;
- } sh_md_dqrp_mmr_dir_locvec7_s;
-} sh_md_dqrp_mmr_dir_locvec7_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC0" */
-/* privilege vector for acc=0 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_privec0_u {
- mmr_t sh_md_dqrp_mmr_dir_privec0_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqrp_mmr_dir_privec0_s;
-} sh_md_dqrp_mmr_dir_privec0_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC1" */
-/* privilege vector for acc=1 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_privec1_u {
- mmr_t sh_md_dqrp_mmr_dir_privec1_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqrp_mmr_dir_privec1_s;
-} sh_md_dqrp_mmr_dir_privec1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC2" */
-/* privilege vector for acc=2 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_privec2_u {
- mmr_t sh_md_dqrp_mmr_dir_privec2_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqrp_mmr_dir_privec2_s;
-} sh_md_dqrp_mmr_dir_privec2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC3" */
-/* privilege vector for acc=3 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_privec3_u {
- mmr_t sh_md_dqrp_mmr_dir_privec3_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqrp_mmr_dir_privec3_s;
-} sh_md_dqrp_mmr_dir_privec3_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC4" */
-/* privilege vector for acc=4 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_privec4_u {
- mmr_t sh_md_dqrp_mmr_dir_privec4_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqrp_mmr_dir_privec4_s;
-} sh_md_dqrp_mmr_dir_privec4_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC5" */
-/* privilege vector for acc=5 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_privec5_u {
- mmr_t sh_md_dqrp_mmr_dir_privec5_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqrp_mmr_dir_privec5_s;
-} sh_md_dqrp_mmr_dir_privec5_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC6" */
-/* privilege vector for acc=6 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_privec6_u {
- mmr_t sh_md_dqrp_mmr_dir_privec6_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqrp_mmr_dir_privec6_s;
-} sh_md_dqrp_mmr_dir_privec6_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC7" */
-/* privilege vector for acc=7 */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_privec7_u {
- mmr_t sh_md_dqrp_mmr_dir_privec7_regval;
- struct {
- mmr_t in : 14;
- mmr_t out : 14;
- mmr_t reserved_0 : 36;
- } sh_md_dqrp_mmr_dir_privec7_s;
-} sh_md_dqrp_mmr_dir_privec7_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_TIMER" */
-/* MD SXRO timer */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_timer_u {
- mmr_t sh_md_dqrp_mmr_dir_timer_regval;
- struct {
- mmr_t timer_div : 12;
- mmr_t timer_en : 1;
- mmr_t timer_cur : 9;
- mmr_t reserved_0 : 42;
- } sh_md_dqrp_mmr_dir_timer_s;
-} sh_md_dqrp_mmr_dir_timer_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_PIOWD_DIR_ENTRY" */
-/* directory pio write data */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_piowd_dir_entry_u {
- mmr_t sh_md_dqrp_mmr_piowd_dir_entry_regval;
- struct {
- mmr_t dira : 26;
- mmr_t dirb : 26;
- mmr_t pri : 3;
- mmr_t acc : 3;
- mmr_t reserved_0 : 6;
- } sh_md_dqrp_mmr_piowd_dir_entry_s;
-} sh_md_dqrp_mmr_piowd_dir_entry_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_PIOWD_DIR_ECC" */
-/* directory ecc register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_piowd_dir_ecc_u {
- mmr_t sh_md_dqrp_mmr_piowd_dir_ecc_regval;
- struct {
- mmr_t ecca : 7;
- mmr_t eccb : 7;
- mmr_t reserved_0 : 50;
- } sh_md_dqrp_mmr_piowd_dir_ecc_s;
-} sh_md_dqrp_mmr_piowd_dir_ecc_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XPIORD_XDIR_ENTRY" */
-/* x directory pio read data */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_xpiord_xdir_entry_u {
- mmr_t sh_md_dqrp_mmr_xpiord_xdir_entry_regval;
- struct {
- mmr_t dira : 26;
- mmr_t dirb : 26;
- mmr_t pri : 3;
- mmr_t acc : 3;
- mmr_t cor : 1;
- mmr_t unc : 1;
- mmr_t reserved_0 : 4;
- } sh_md_dqrp_mmr_xpiord_xdir_entry_s;
-} sh_md_dqrp_mmr_xpiord_xdir_entry_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XPIORD_XDIR_ECC" */
-/* x directory ecc */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_xpiord_xdir_ecc_u {
- mmr_t sh_md_dqrp_mmr_xpiord_xdir_ecc_regval;
- struct {
- mmr_t ecca : 7;
- mmr_t eccb : 7;
- mmr_t reserved_0 : 50;
- } sh_md_dqrp_mmr_xpiord_xdir_ecc_s;
-} sh_md_dqrp_mmr_xpiord_xdir_ecc_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YPIORD_YDIR_ENTRY" */
-/* y directory pio read data */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_ypiord_ydir_entry_u {
- mmr_t sh_md_dqrp_mmr_ypiord_ydir_entry_regval;
- struct {
- mmr_t dira : 26;
- mmr_t dirb : 26;
- mmr_t pri : 3;
- mmr_t acc : 3;
- mmr_t cor : 1;
- mmr_t unc : 1;
- mmr_t reserved_0 : 4;
- } sh_md_dqrp_mmr_ypiord_ydir_entry_s;
-} sh_md_dqrp_mmr_ypiord_ydir_entry_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YPIORD_YDIR_ECC" */
-/* y directory ecc */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_ypiord_ydir_ecc_u {
- mmr_t sh_md_dqrp_mmr_ypiord_ydir_ecc_regval;
- struct {
- mmr_t ecca : 7;
- mmr_t eccb : 7;
- mmr_t reserved_0 : 50;
- } sh_md_dqrp_mmr_ypiord_ydir_ecc_s;
-} sh_md_dqrp_mmr_ypiord_ydir_ecc_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XCERR1" */
-/* correctable dir ecc group 1 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_xcerr1_u {
- mmr_t sh_md_dqrp_mmr_xcerr1_regval;
- struct {
- mmr_t grp1 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 25;
- } sh_md_dqrp_mmr_xcerr1_s;
-} sh_md_dqrp_mmr_xcerr1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XCERR2" */
-/* correctable dir ecc group 2 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_xcerr2_u {
- mmr_t sh_md_dqrp_mmr_xcerr2_regval;
- struct {
- mmr_t grp2 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 26;
- } sh_md_dqrp_mmr_xcerr2_s;
-} sh_md_dqrp_mmr_xcerr2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XUERR1" */
-/* uncorrectable dir ecc group 1 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_xuerr1_u {
- mmr_t sh_md_dqrp_mmr_xuerr1_regval;
- struct {
- mmr_t grp1 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 25;
- } sh_md_dqrp_mmr_xuerr1_s;
-} sh_md_dqrp_mmr_xuerr1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XUERR2" */
-/* uncorrectable dir ecc group 2 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_xuerr2_u {
- mmr_t sh_md_dqrp_mmr_xuerr2_regval;
- struct {
- mmr_t grp2 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 26;
- } sh_md_dqrp_mmr_xuerr2_s;
-} sh_md_dqrp_mmr_xuerr2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XPERR" */
-/* protocol error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_xperr_u {
- mmr_t sh_md_dqrp_mmr_xperr_regval;
- struct {
- mmr_t dir : 26;
- mmr_t cmd : 8;
- mmr_t src : 14;
- mmr_t prige : 1;
- mmr_t priv : 1;
- mmr_t cor : 1;
- mmr_t unc : 1;
- mmr_t mybit : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 1;
- } sh_md_dqrp_mmr_xperr_s;
-} sh_md_dqrp_mmr_xperr_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YCERR1" */
-/* correctable dir ecc group 1 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_ycerr1_u {
- mmr_t sh_md_dqrp_mmr_ycerr1_regval;
- struct {
- mmr_t grp1 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 25;
- } sh_md_dqrp_mmr_ycerr1_s;
-} sh_md_dqrp_mmr_ycerr1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YCERR2" */
-/* correctable dir ecc group 2 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_ycerr2_u {
- mmr_t sh_md_dqrp_mmr_ycerr2_regval;
- struct {
- mmr_t grp2 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 26;
- } sh_md_dqrp_mmr_ycerr2_s;
-} sh_md_dqrp_mmr_ycerr2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YUERR1" */
-/* uncorrectable dir ecc group 1 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_yuerr1_u {
- mmr_t sh_md_dqrp_mmr_yuerr1_regval;
- struct {
- mmr_t grp1 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 25;
- } sh_md_dqrp_mmr_yuerr1_s;
-} sh_md_dqrp_mmr_yuerr1_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YUERR2" */
-/* uncorrectable dir ecc group 2 error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_yuerr2_u {
- mmr_t sh_md_dqrp_mmr_yuerr2_regval;
- struct {
- mmr_t grp2 : 36;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 26;
- } sh_md_dqrp_mmr_yuerr2_s;
-} sh_md_dqrp_mmr_yuerr2_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YPERR" */
-/* protocol error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_yperr_u {
- mmr_t sh_md_dqrp_mmr_yperr_regval;
- struct {
- mmr_t dir : 26;
- mmr_t cmd : 8;
- mmr_t src : 14;
- mmr_t prige : 1;
- mmr_t priv : 1;
- mmr_t cor : 1;
- mmr_t unc : 1;
- mmr_t mybit : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 1;
- } sh_md_dqrp_mmr_yperr_s;
-} sh_md_dqrp_mmr_yperr_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_CMDTRIG" */
-/* cmd triggers */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_cmdtrig_u {
- mmr_t sh_md_dqrp_mmr_dir_cmdtrig_regval;
- struct {
- mmr_t cmd0 : 8;
- mmr_t cmd1 : 8;
- mmr_t cmd2 : 8;
- mmr_t cmd3 : 8;
- mmr_t reserved_0 : 32;
- } sh_md_dqrp_mmr_dir_cmdtrig_s;
-} sh_md_dqrp_mmr_dir_cmdtrig_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_TBLTRIG" */
-/* dir table trigger */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_tbltrig_u {
- mmr_t sh_md_dqrp_mmr_dir_tbltrig_regval;
- struct {
- mmr_t src : 14;
- mmr_t cmd : 8;
- mmr_t acc : 2;
- mmr_t prige : 1;
- mmr_t dirst : 9;
- mmr_t mybit : 8;
- mmr_t reserved_0 : 22;
- } sh_md_dqrp_mmr_dir_tbltrig_s;
-} sh_md_dqrp_mmr_dir_tbltrig_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_DIR_TBLMASK" */
-/* dir table trigger mask */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_dir_tblmask_u {
- mmr_t sh_md_dqrp_mmr_dir_tblmask_regval;
- struct {
- mmr_t src : 14;
- mmr_t cmd : 8;
- mmr_t acc : 2;
- mmr_t prige : 1;
- mmr_t dirst : 9;
- mmr_t mybit : 8;
- mmr_t reserved_0 : 22;
- } sh_md_dqrp_mmr_dir_tblmask_s;
-} sh_md_dqrp_mmr_dir_tblmask_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_xbist_h_u {
- mmr_t sh_md_dqrp_mmr_xbist_h_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t arm : 1;
- mmr_t reserved_1 : 21;
- } sh_md_dqrp_mmr_xbist_h_s;
-} sh_md_dqrp_mmr_xbist_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_xbist_l_u {
- mmr_t sh_md_dqrp_mmr_xbist_l_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqrp_mmr_xbist_l_s;
-} sh_md_dqrp_mmr_xbist_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_xbist_err_h_u {
- mmr_t sh_md_dqrp_mmr_xbist_err_h_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqrp_mmr_xbist_err_h_s;
-} sh_md_dqrp_mmr_xbist_err_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_XBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_xbist_err_l_u {
- mmr_t sh_md_dqrp_mmr_xbist_err_l_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqrp_mmr_xbist_err_l_s;
-} sh_md_dqrp_mmr_xbist_err_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_ybist_h_u {
- mmr_t sh_md_dqrp_mmr_ybist_h_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t arm : 1;
- mmr_t reserved_1 : 21;
- } sh_md_dqrp_mmr_ybist_h_s;
-} sh_md_dqrp_mmr_ybist_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_ybist_l_u {
- mmr_t sh_md_dqrp_mmr_ybist_l_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqrp_mmr_ybist_l_s;
-} sh_md_dqrp_mmr_ybist_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_ybist_err_h_u {
- mmr_t sh_md_dqrp_mmr_ybist_err_h_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqrp_mmr_ybist_err_h_s;
-} sh_md_dqrp_mmr_ybist_err_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRP_MMR_YBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrp_mmr_ybist_err_l_u {
- mmr_t sh_md_dqrp_mmr_ybist_err_l_regval;
- struct {
- mmr_t pat : 32;
- mmr_t reserved_0 : 8;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_1 : 22;
- } sh_md_dqrp_mmr_ybist_err_l_s;
-} sh_md_dqrp_mmr_ybist_err_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_XBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrs_mmr_xbist_h_u {
- mmr_t sh_md_dqrs_mmr_xbist_h_regval;
- struct {
- mmr_t pat : 40;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 21;
- } sh_md_dqrs_mmr_xbist_h_s;
-} sh_md_dqrs_mmr_xbist_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_XBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrs_mmr_xbist_l_u {
- mmr_t sh_md_dqrs_mmr_xbist_l_regval;
- struct {
- mmr_t pat : 40;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqrs_mmr_xbist_l_s;
-} sh_md_dqrs_mmr_xbist_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_XBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrs_mmr_xbist_err_h_u {
- mmr_t sh_md_dqrs_mmr_xbist_err_h_regval;
- struct {
- mmr_t pat : 40;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqrs_mmr_xbist_err_h_s;
-} sh_md_dqrs_mmr_xbist_err_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_XBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrs_mmr_xbist_err_l_u {
- mmr_t sh_md_dqrs_mmr_xbist_err_l_regval;
- struct {
- mmr_t pat : 40;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqrs_mmr_xbist_err_l_s;
-} sh_md_dqrs_mmr_xbist_err_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_YBIST_H" */
-/* rising edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrs_mmr_ybist_h_u {
- mmr_t sh_md_dqrs_mmr_ybist_h_regval;
- struct {
- mmr_t pat : 40;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t arm : 1;
- mmr_t reserved_0 : 21;
- } sh_md_dqrs_mmr_ybist_h_s;
-} sh_md_dqrs_mmr_ybist_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_YBIST_L" */
-/* falling edge bist/fill pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrs_mmr_ybist_l_u {
- mmr_t sh_md_dqrs_mmr_ybist_l_regval;
- struct {
- mmr_t pat : 40;
- mmr_t inv : 1;
- mmr_t rot : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqrs_mmr_ybist_l_s;
-} sh_md_dqrs_mmr_ybist_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_YBIST_ERR_H" */
-/* rising edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrs_mmr_ybist_err_h_u {
- mmr_t sh_md_dqrs_mmr_ybist_err_h_regval;
- struct {
- mmr_t pat : 40;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqrs_mmr_ybist_err_h_s;
-} sh_md_dqrs_mmr_ybist_err_h_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_YBIST_ERR_L" */
-/* falling edge bist error pattern */
-/* ==================================================================== */
-
-typedef union sh_md_dqrs_mmr_ybist_err_l_u {
- mmr_t sh_md_dqrs_mmr_ybist_err_l_regval;
- struct {
- mmr_t pat : 40;
- mmr_t val : 1;
- mmr_t more : 1;
- mmr_t reserved_0 : 22;
- } sh_md_dqrs_mmr_ybist_err_l_s;
-} sh_md_dqrs_mmr_ybist_err_l_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_JNR_DEBUG" */
-/* joiner/fct debug configuration */
-/* ==================================================================== */
-
-typedef union sh_md_dqrs_mmr_jnr_debug_u {
- mmr_t sh_md_dqrs_mmr_jnr_debug_regval;
- struct {
- mmr_t px : 1;
- mmr_t rw : 1;
- mmr_t reserved_0 : 62;
- } sh_md_dqrs_mmr_jnr_debug_s;
-} sh_md_dqrs_mmr_jnr_debug_u_t;
-
-/* ==================================================================== */
-/* Register "SH_MD_DQRS_MMR_YAMOPW_ERR" */
-/* amo/partial rmw ecc error register */
-/* ==================================================================== */
-
-typedef union sh_md_dqrs_mmr_yamopw_err_u {
- mmr_t sh_md_dqrs_mmr_yamopw_err_regval;
- struct {
- mmr_t ssyn : 8;
- mmr_t scor : 1;
- mmr_t sunc : 1;
- mmr_t reserved_0 : 6;
- mmr_t rsyn : 8;
- mmr_t rcor : 1;
- mmr_t runc : 1;
- mmr_t reserved_1 : 6;
- mmr_t arm : 1;
- mmr_t reserved_2 : 31;
- } sh_md_dqrs_mmr_yamopw_err_s;
-} sh_md_dqrs_mmr_yamopw_err_u_t;
-
-#endif /* _ASM_IA64_SN_SN2_SHUB_MMR_T_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_IA64_SN_SN2_SHUBIO_H
-#define _ASM_IA64_SN_SN2_SHUBIO_H
-
-#include <asm/sn/arch.h>
-
-#define HUB_WIDGET_ID_MAX 0xf
-#define IIO_NUM_ITTES 7
-#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1)
-
-#define IIO_WID 0x00400000 /* Crosstalk Widget Identification */
- /* This register is also accessible from
- * Crosstalk at address 0x0. */
-#define IIO_WSTAT 0x00400008 /* Crosstalk Widget Status */
-#define IIO_WCR 0x00400020 /* Crosstalk Widget Control Register */
-#define IIO_ILAPR 0x00400100 /* IO Local Access Protection Register */
-#define IIO_ILAPO 0x00400108 /* IO Local Access Protection Override */
-#define IIO_IOWA 0x00400110 /* IO Outbound Widget Access */
-#define IIO_IIWA 0x00400118 /* IO Inbound Widget Access */
-#define IIO_IIDEM 0x00400120 /* IO Inbound Device Error Mask */
-#define IIO_ILCSR 0x00400128 /* IO LLP Control and Status Register */
-#define IIO_ILLR 0x00400130 /* IO LLP Log Register */
-#define IIO_IIDSR 0x00400138 /* IO Interrupt Destination */
-
-#define IIO_IGFX0 0x00400140 /* IO Graphics Node-Widget Map 0 */
-#define IIO_IGFX1 0x00400148 /* IO Graphics Node-Widget Map 1 */
-
-#define IIO_ISCR0 0x00400150 /* IO Scratch Register 0 */
-#define IIO_ISCR1 0x00400158 /* IO Scratch Register 1 */
-
-#define IIO_ITTE1 0x00400160 /* IO Translation Table Entry 1 */
-#define IIO_ITTE2 0x00400168 /* IO Translation Table Entry 2 */
-#define IIO_ITTE3 0x00400170 /* IO Translation Table Entry 3 */
-#define IIO_ITTE4 0x00400178 /* IO Translation Table Entry 4 */
-#define IIO_ITTE5 0x00400180 /* IO Translation Table Entry 5 */
-#define IIO_ITTE6 0x00400188 /* IO Translation Table Entry 6 */
-#define IIO_ITTE7 0x00400190 /* IO Translation Table Entry 7 */
-
-#define IIO_IPRB0 0x00400198 /* IO PRB Entry 0 */
-#define IIO_IPRB8 0x004001A0 /* IO PRB Entry 8 */
-#define IIO_IPRB9 0x004001A8 /* IO PRB Entry 9 */
-#define IIO_IPRBA 0x004001B0 /* IO PRB Entry A */
-#define IIO_IPRBB 0x004001B8 /* IO PRB Entry B */
-#define IIO_IPRBC 0x004001C0 /* IO PRB Entry C */
-#define IIO_IPRBD 0x004001C8 /* IO PRB Entry D */
-#define IIO_IPRBE 0x004001D0 /* IO PRB Entry E */
-#define IIO_IPRBF 0x004001D8 /* IO PRB Entry F */
-
-#define IIO_IXCC 0x004001E0 /* IO Crosstalk Credit Count Timeout */
-#define IIO_IMEM 0x004001E8 /* IO Miscellaneous Error Mask */
-#define IIO_IXTT 0x004001F0 /* IO Crosstalk Timeout Threshold */
-#define IIO_IECLR 0x004001F8 /* IO Error Clear Register */
-#define IIO_IBCR 0x00400200 /* IO BTE Control Register */
-
-#define IIO_IXSM 0x00400208 /* IO Crosstalk Spurious Message */
-#define IIO_IXSS 0x00400210 /* IO Crosstalk Spurious Sideband */
-
-#define IIO_ILCT 0x00400218 /* IO LLP Channel Test */
-
-#define IIO_IIEPH1 0x00400220 /* IO Incoming Error Packet Header, Part 1 */
-#define IIO_IIEPH2 0x00400228 /* IO Incoming Error Packet Header, Part 2 */
-
-
-#define IIO_ISLAPR 0x00400230 /* IO SXB Local Access Protection Regster */
-#define IIO_ISLAPO 0x00400238 /* IO SXB Local Access Protection Override */
-
-#define IIO_IWI 0x00400240 /* IO Wrapper Interrupt Register */
-#define IIO_IWEL 0x00400248 /* IO Wrapper Error Log Register */
-#define IIO_IWC 0x00400250 /* IO Wrapper Control Register */
-#define IIO_IWS 0x00400258 /* IO Wrapper Status Register */
-#define IIO_IWEIM 0x00400260 /* IO Wrapper Error Interrupt Masking Register */
-
-#define IIO_IPCA 0x00400300 /* IO PRB Counter Adjust */
-
-#define IIO_IPRTE0_A 0x00400308 /* IO PIO Read Address Table Entry 0, Part A */
-#define IIO_IPRTE1_A 0x00400310 /* IO PIO Read Address Table Entry 1, Part A */
-#define IIO_IPRTE2_A 0x00400318 /* IO PIO Read Address Table Entry 2, Part A */
-#define IIO_IPRTE3_A 0x00400320 /* IO PIO Read Address Table Entry 3, Part A */
-#define IIO_IPRTE4_A 0x00400328 /* IO PIO Read Address Table Entry 4, Part A */
-#define IIO_IPRTE5_A 0x00400330 /* IO PIO Read Address Table Entry 5, Part A */
-#define IIO_IPRTE6_A 0x00400338 /* IO PIO Read Address Table Entry 6, Part A */
-#define IIO_IPRTE7_A 0x00400340 /* IO PIO Read Address Table Entry 7, Part A */
-
-#define IIO_IPRTE0_B 0x00400348 /* IO PIO Read Address Table Entry 0, Part B */
-#define IIO_IPRTE1_B 0x00400350 /* IO PIO Read Address Table Entry 1, Part B */
-#define IIO_IPRTE2_B 0x00400358 /* IO PIO Read Address Table Entry 2, Part B */
-#define IIO_IPRTE3_B 0x00400360 /* IO PIO Read Address Table Entry 3, Part B */
-#define IIO_IPRTE4_B 0x00400368 /* IO PIO Read Address Table Entry 4, Part B */
-#define IIO_IPRTE5_B 0x00400370 /* IO PIO Read Address Table Entry 5, Part B */
-#define IIO_IPRTE6_B 0x00400378 /* IO PIO Read Address Table Entry 6, Part B */
-#define IIO_IPRTE7_B 0x00400380 /* IO PIO Read Address Table Entry 7, Part B */
-
-#define IIO_IPDR 0x00400388 /* IO PIO Deallocation Register */
-#define IIO_ICDR 0x00400390 /* IO CRB Entry Deallocation Register */
-#define IIO_IFDR 0x00400398 /* IO IOQ FIFO Depth Register */
-#define IIO_IIAP 0x004003A0 /* IO IIQ Arbitration Parameters */
-#define IIO_ICMR 0x004003A8 /* IO CRB Management Register */
-#define IIO_ICCR 0x004003B0 /* IO CRB Control Register */
-#define IIO_ICTO 0x004003B8 /* IO CRB Timeout */
-#define IIO_ICTP 0x004003C0 /* IO CRB Timeout Prescalar */
-
-#define IIO_ICRB0_A 0x00400400 /* IO CRB Entry 0_A */
-#define IIO_ICRB0_B 0x00400408 /* IO CRB Entry 0_B */
-#define IIO_ICRB0_C 0x00400410 /* IO CRB Entry 0_C */
-#define IIO_ICRB0_D 0x00400418 /* IO CRB Entry 0_D */
-#define IIO_ICRB0_E 0x00400420 /* IO CRB Entry 0_E */
-
-#define IIO_ICRB1_A 0x00400430 /* IO CRB Entry 1_A */
-#define IIO_ICRB1_B 0x00400438 /* IO CRB Entry 1_B */
-#define IIO_ICRB1_C 0x00400440 /* IO CRB Entry 1_C */
-#define IIO_ICRB1_D 0x00400448 /* IO CRB Entry 1_D */
-#define IIO_ICRB1_E 0x00400450 /* IO CRB Entry 1_E */
-
-#define IIO_ICRB2_A 0x00400460 /* IO CRB Entry 2_A */
-#define IIO_ICRB2_B 0x00400468 /* IO CRB Entry 2_B */
-#define IIO_ICRB2_C 0x00400470 /* IO CRB Entry 2_C */
-#define IIO_ICRB2_D 0x00400478 /* IO CRB Entry 2_D */
-#define IIO_ICRB2_E 0x00400480 /* IO CRB Entry 2_E */
-
-#define IIO_ICRB3_A 0x00400490 /* IO CRB Entry 3_A */
-#define IIO_ICRB3_B 0x00400498 /* IO CRB Entry 3_B */
-#define IIO_ICRB3_C 0x004004a0 /* IO CRB Entry 3_C */
-#define IIO_ICRB3_D 0x004004a8 /* IO CRB Entry 3_D */
-#define IIO_ICRB3_E 0x004004b0 /* IO CRB Entry 3_E */
-
-#define IIO_ICRB4_A 0x004004c0 /* IO CRB Entry 4_A */
-#define IIO_ICRB4_B 0x004004c8 /* IO CRB Entry 4_B */
-#define IIO_ICRB4_C 0x004004d0 /* IO CRB Entry 4_C */
-#define IIO_ICRB4_D 0x004004d8 /* IO CRB Entry 4_D */
-#define IIO_ICRB4_E 0x004004e0 /* IO CRB Entry 4_E */
-
-#define IIO_ICRB5_A 0x004004f0 /* IO CRB Entry 5_A */
-#define IIO_ICRB5_B 0x004004f8 /* IO CRB Entry 5_B */
-#define IIO_ICRB5_C 0x00400500 /* IO CRB Entry 5_C */
-#define IIO_ICRB5_D 0x00400508 /* IO CRB Entry 5_D */
-#define IIO_ICRB5_E 0x00400510 /* IO CRB Entry 5_E */
-
-#define IIO_ICRB6_A 0x00400520 /* IO CRB Entry 6_A */
-#define IIO_ICRB6_B 0x00400528 /* IO CRB Entry 6_B */
-#define IIO_ICRB6_C 0x00400530 /* IO CRB Entry 6_C */
-#define IIO_ICRB6_D 0x00400538 /* IO CRB Entry 6_D */
-#define IIO_ICRB6_E 0x00400540 /* IO CRB Entry 6_E */
-
-#define IIO_ICRB7_A 0x00400550 /* IO CRB Entry 7_A */
-#define IIO_ICRB7_B 0x00400558 /* IO CRB Entry 7_B */
-#define IIO_ICRB7_C 0x00400560 /* IO CRB Entry 7_C */
-#define IIO_ICRB7_D 0x00400568 /* IO CRB Entry 7_D */
-#define IIO_ICRB7_E 0x00400570 /* IO CRB Entry 7_E */
-
-#define IIO_ICRB8_A 0x00400580 /* IO CRB Entry 8_A */
-#define IIO_ICRB8_B 0x00400588 /* IO CRB Entry 8_B */
-#define IIO_ICRB8_C 0x00400590 /* IO CRB Entry 8_C */
-#define IIO_ICRB8_D 0x00400598 /* IO CRB Entry 8_D */
-#define IIO_ICRB8_E 0x004005a0 /* IO CRB Entry 8_E */
-
-#define IIO_ICRB9_A 0x004005b0 /* IO CRB Entry 9_A */
-#define IIO_ICRB9_B 0x004005b8 /* IO CRB Entry 9_B */
-#define IIO_ICRB9_C 0x004005c0 /* IO CRB Entry 9_C */
-#define IIO_ICRB9_D 0x004005c8 /* IO CRB Entry 9_D */
-#define IIO_ICRB9_E 0x004005d0 /* IO CRB Entry 9_E */
-
-#define IIO_ICRBA_A 0x004005e0 /* IO CRB Entry A_A */
-#define IIO_ICRBA_B 0x004005e8 /* IO CRB Entry A_B */
-#define IIO_ICRBA_C 0x004005f0 /* IO CRB Entry A_C */
-#define IIO_ICRBA_D 0x004005f8 /* IO CRB Entry A_D */
-#define IIO_ICRBA_E 0x00400600 /* IO CRB Entry A_E */
-
-#define IIO_ICRBB_A 0x00400610 /* IO CRB Entry B_A */
-#define IIO_ICRBB_B 0x00400618 /* IO CRB Entry B_B */
-#define IIO_ICRBB_C 0x00400620 /* IO CRB Entry B_C */
-#define IIO_ICRBB_D 0x00400628 /* IO CRB Entry B_D */
-#define IIO_ICRBB_E 0x00400630 /* IO CRB Entry B_E */
-
-#define IIO_ICRBC_A 0x00400640 /* IO CRB Entry C_A */
-#define IIO_ICRBC_B 0x00400648 /* IO CRB Entry C_B */
-#define IIO_ICRBC_C 0x00400650 /* IO CRB Entry C_C */
-#define IIO_ICRBC_D 0x00400658 /* IO CRB Entry C_D */
-#define IIO_ICRBC_E 0x00400660 /* IO CRB Entry C_E */
-
-#define IIO_ICRBD_A 0x00400670 /* IO CRB Entry D_A */
-#define IIO_ICRBD_B 0x00400678 /* IO CRB Entry D_B */
-#define IIO_ICRBD_C 0x00400680 /* IO CRB Entry D_C */
-#define IIO_ICRBD_D 0x00400688 /* IO CRB Entry D_D */
-#define IIO_ICRBD_E 0x00400690 /* IO CRB Entry D_E */
-
-#define IIO_ICRBE_A 0x004006a0 /* IO CRB Entry E_A */
-#define IIO_ICRBE_B 0x004006a8 /* IO CRB Entry E_B */
-#define IIO_ICRBE_C 0x004006b0 /* IO CRB Entry E_C */
-#define IIO_ICRBE_D 0x004006b8 /* IO CRB Entry E_D */
-#define IIO_ICRBE_E 0x004006c0 /* IO CRB Entry E_E */
-
-#define IIO_ICSML 0x00400700 /* IO CRB Spurious Message Low */
-#define IIO_ICSMM 0x00400708 /* IO CRB Spurious Message Middle */
-#define IIO_ICSMH 0x00400710 /* IO CRB Spurious Message High */
-
-#define IIO_IDBSS 0x00400718 /* IO Debug Submenu Select */
-
-#define IIO_IBLS0 0x00410000 /* IO BTE Length Status 0 */
-#define IIO_IBSA0 0x00410008 /* IO BTE Source Address 0 */
-#define IIO_IBDA0 0x00410010 /* IO BTE Destination Address 0 */
-#define IIO_IBCT0 0x00410018 /* IO BTE Control Terminate 0 */
-#define IIO_IBNA0 0x00410020 /* IO BTE Notification Address 0 */
-#define IIO_IBIA0 0x00410028 /* IO BTE Interrupt Address 0 */
-#define IIO_IBLS1 0x00420000 /* IO BTE Length Status 1 */
-#define IIO_IBSA1 0x00420008 /* IO BTE Source Address 1 */
-#define IIO_IBDA1 0x00420010 /* IO BTE Destination Address 1 */
-#define IIO_IBCT1 0x00420018 /* IO BTE Control Terminate 1 */
-#define IIO_IBNA1 0x00420020 /* IO BTE Notification Address 1 */
-#define IIO_IBIA1 0x00420028 /* IO BTE Interrupt Address 1 */
-
-#define IIO_IPCR 0x00430000 /* IO Performance Control */
-#define IIO_IPPR 0x00430008 /* IO Performance Profiling */
-
-
-/************************************************************************
- * *
- * Description: This register echoes some information from the *
- * LB_REV_ID register. It is available through Crosstalk as described *
- * above. The REV_NUM and MFG_NUM fields receive their values from *
- * the REVISION and MANUFACTURER fields in the LB_REV_ID register. *
- * The PART_NUM field's value is the Crosstalk device ID number that *
- * Steve Miller assigned to the SHub chip. *
- * *
- ************************************************************************/
-
-typedef union ii_wid_u {
- shubreg_t ii_wid_regval;
- struct {
- shubreg_t w_rsvd_1 : 1;
- shubreg_t w_mfg_num : 11;
- shubreg_t w_part_num : 16;
- shubreg_t w_rev_num : 4;
- shubreg_t w_rsvd : 32;
- } ii_wid_fld_s;
-} ii_wid_u_t;
-
-
-/************************************************************************
- * *
- * The fields in this register are set upon detection of an error *
- * and cleared by various mechanisms, as explained in the *
- * description. *
- * *
- ************************************************************************/
-
-typedef union ii_wstat_u {
- shubreg_t ii_wstat_regval;
- struct {
- shubreg_t w_pending : 4;
- shubreg_t w_xt_crd_to : 1;
- shubreg_t w_xt_tail_to : 1;
- shubreg_t w_rsvd_3 : 3;
- shubreg_t w_tx_mx_rty : 1;
- shubreg_t w_rsvd_2 : 6;
- shubreg_t w_llp_tx_cnt : 8;
- shubreg_t w_rsvd_1 : 8;
- shubreg_t w_crazy : 1;
- shubreg_t w_rsvd : 31;
- } ii_wstat_fld_s;
-} ii_wstat_u_t;
-
-
-/************************************************************************
- * *
- * Description: This is a read-write enabled register. It controls *
- * various aspects of the Crosstalk flow control. *
- * *
- ************************************************************************/
-
-typedef union ii_wcr_u {
- shubreg_t ii_wcr_regval;
- struct {
- shubreg_t w_wid : 4;
- shubreg_t w_tag : 1;
- shubreg_t w_rsvd_1 : 8;
- shubreg_t w_dst_crd : 3;
- shubreg_t w_f_bad_pkt : 1;
- shubreg_t w_dir_con : 1;
- shubreg_t w_e_thresh : 5;
- shubreg_t w_rsvd : 41;
- } ii_wcr_fld_s;
-} ii_wcr_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register's value is a bit vector that guards *
- * access to local registers within the II as well as to external *
- * Crosstalk widgets. Each bit in the register corresponds to a *
- * particular region in the system; a region consists of one, two or *
- * four nodes (depending on the value of the REGION_SIZE field in the *
- * LB_REV_ID register, which is documented in Section 8.3.1.1). The *
- * protection provided by this register applies to PIO read *
- * operations as well as PIO write operations. The II will perform a *
- * PIO read or write request only if the bit for the requestor's *
- * region is set; otherwise, the II will not perform the requested *
- * operation and will return an error response. When a PIO read or *
- * write request targets an external Crosstalk widget, then not only *
- * must the bit for the requestor's region be set in the ILAPR, but *
- * also the target widget's bit in the IOWA register must be set in *
- * order for the II to perform the requested operation; otherwise, *
- * the II will return an error response. Hence, the protection *
- * provided by the IOWA register supplements the protection provided *
- * by the ILAPR for requests that target external Crosstalk widgets. *
- * This register itself can be accessed only by the nodes whose *
- * region ID bits are enabled in this same register. It can also be *
- * accessed through the IAlias space by the local processors. *
- * The reset value of this register allows access by all nodes. *
- * *
- ************************************************************************/
-
-typedef union ii_ilapr_u {
- shubreg_t ii_ilapr_regval;
- struct {
- shubreg_t i_region : 64;
- } ii_ilapr_fld_s;
-} ii_ilapr_u_t;
-
-
-
-
-/************************************************************************
- * *
- * Description: A write to this register of the 64-bit value *
- * "SGIrules" in ASCII, will cause the bit in the ILAPR register *
- * corresponding to the region of the requestor to be set (allow *
- * access). A write of any other value will be ignored. Access *
- * protection for this register is "SGIrules". *
- * This register can also be accessed through the IAlias space. *
- * However, this access will not change the access permissions in the *
- * ILAPR. *
- * *
- ************************************************************************/
-
-typedef union ii_ilapo_u {
- shubreg_t ii_ilapo_regval;
- struct {
- shubreg_t i_io_ovrride : 64;
- } ii_ilapo_fld_s;
-} ii_ilapo_u_t;
-
-
-
-/************************************************************************
- * *
- * This register qualifies all the PIO and Graphics writes launched *
- * from the SHUB towards a widget. *
- * *
- ************************************************************************/
-
-typedef union ii_iowa_u {
- shubreg_t ii_iowa_regval;
- struct {
- shubreg_t i_w0_oac : 1;
- shubreg_t i_rsvd_1 : 7;
- shubreg_t i_wx_oac : 8;
- shubreg_t i_rsvd : 48;
- } ii_iowa_fld_s;
-} ii_iowa_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register qualifies all the requests launched *
- * from a widget towards the Shub. This register is intended to be *
- * used by software in case of misbehaving widgets. *
- * *
- * *
- ************************************************************************/
-
-typedef union ii_iiwa_u {
- shubreg_t ii_iiwa_regval;
- struct {
- shubreg_t i_w0_iac : 1;
- shubreg_t i_rsvd_1 : 7;
- shubreg_t i_wx_iac : 8;
- shubreg_t i_rsvd : 48;
- } ii_iiwa_fld_s;
-} ii_iiwa_u_t;
-
-
-
-/************************************************************************
- * *
- * Description: This register qualifies all the operations launched *
- * from a widget towards the SHub. It allows individual access *
- * control for up to 8 devices per widget. A device refers to *
- * individual DMA master hosted by a widget. *
- * The bits in each field of this register are cleared by the Shub *
- * upon detection of an error which requires the device to be *
- * disabled. These fields assume that 0=TNUM=7 (i.e., Bridge-centric *
- * Crosstalk). Whether or not a device has access rights to this *
- * Shub is determined by an AND of the device enable bit in the *
- * appropriate field of this register and the corresponding bit in *
- * the Wx_IAC field (for the widget which this device belongs to). *
- * The bits in this field are set by writing a 1 to them. Incoming *
- * replies from Crosstalk are not subject to this access control *
- * mechanism. *
- * *
- ************************************************************************/
-
-typedef union ii_iidem_u {
- shubreg_t ii_iidem_regval;
- struct {
- shubreg_t i_w8_dxs : 8;
- shubreg_t i_w9_dxs : 8;
- shubreg_t i_wa_dxs : 8;
- shubreg_t i_wb_dxs : 8;
- shubreg_t i_wc_dxs : 8;
- shubreg_t i_wd_dxs : 8;
- shubreg_t i_we_dxs : 8;
- shubreg_t i_wf_dxs : 8;
- } ii_iidem_fld_s;
-} ii_iidem_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the various programmable fields necessary *
- * for controlling and observing the LLP signals. *
- * *
- ************************************************************************/
-
-typedef union ii_ilcsr_u {
- shubreg_t ii_ilcsr_regval;
- struct {
- shubreg_t i_nullto : 6;
- shubreg_t i_rsvd_4 : 2;
- shubreg_t i_wrmrst : 1;
- shubreg_t i_rsvd_3 : 1;
- shubreg_t i_llp_en : 1;
- shubreg_t i_bm8 : 1;
- shubreg_t i_llp_stat : 2;
- shubreg_t i_remote_power : 1;
- shubreg_t i_rsvd_2 : 1;
- shubreg_t i_maxrtry : 10;
- shubreg_t i_d_avail_sel : 2;
- shubreg_t i_rsvd_1 : 4;
- shubreg_t i_maxbrst : 10;
- shubreg_t i_rsvd : 22;
-
- } ii_ilcsr_fld_s;
-} ii_ilcsr_u_t;
-
-
-/************************************************************************
- * *
- * This is simply a status registers that monitors the LLP error *
- * rate. *
- * *
- ************************************************************************/
-
-typedef union ii_illr_u {
- shubreg_t ii_illr_regval;
- struct {
- shubreg_t i_sn_cnt : 16;
- shubreg_t i_cb_cnt : 16;
- shubreg_t i_rsvd : 32;
- } ii_illr_fld_s;
-} ii_illr_u_t;
-
-
-/************************************************************************
- * *
- * Description: All II-detected non-BTE error interrupts are *
- * specified via this register. *
- * NOTE: The PI interrupt register address is hardcoded in the II. If *
- * PI_ID==0, then the II sends an interrupt request (Duplonet PWRI *
- * packet) to address offset 0x0180_0090 within the local register *
- * address space of PI0 on the node specified by the NODE field. If *
- * PI_ID==1, then the II sends the interrupt request to address *
- * offset 0x01A0_0090 within the local register address space of PI1 *
- * on the node specified by the NODE field. *
- * *
- ************************************************************************/
-
-typedef union ii_iidsr_u {
- shubreg_t ii_iidsr_regval;
- struct {
- shubreg_t i_level : 8;
- shubreg_t i_pi_id : 1;
- shubreg_t i_node : 11;
- shubreg_t i_rsvd_3 : 4;
- shubreg_t i_enable : 1;
- shubreg_t i_rsvd_2 : 3;
- shubreg_t i_int_sent : 2;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_pi0_forward_int : 1;
- shubreg_t i_pi1_forward_int : 1;
- shubreg_t i_rsvd : 30;
- } ii_iidsr_fld_s;
-} ii_iidsr_u_t;
-
-
-
-/************************************************************************
- * *
- * There are two instances of this register. This register is used *
- * for matching up the incoming responses from the graphics widget to *
- * the processor that initiated the graphics operation. The *
- * write-responses are converted to graphics credits and returned to *
- * the processor so that the processor interface can manage the flow *
- * control. *
- * *
- ************************************************************************/
-
-typedef union ii_igfx0_u {
- shubreg_t ii_igfx0_regval;
- struct {
- shubreg_t i_w_num : 4;
- shubreg_t i_pi_id : 1;
- shubreg_t i_n_num : 12;
- shubreg_t i_p_num : 1;
- shubreg_t i_rsvd : 46;
- } ii_igfx0_fld_s;
-} ii_igfx0_u_t;
-
-
-/************************************************************************
- * *
- * There are two instances of this register. This register is used *
- * for matching up the incoming responses from the graphics widget to *
- * the processor that initiated the graphics operation. The *
- * write-responses are converted to graphics credits and returned to *
- * the processor so that the processor interface can manage the flow *
- * control. *
- * *
- ************************************************************************/
-
-typedef union ii_igfx1_u {
- shubreg_t ii_igfx1_regval;
- struct {
- shubreg_t i_w_num : 4;
- shubreg_t i_pi_id : 1;
- shubreg_t i_n_num : 12;
- shubreg_t i_p_num : 1;
- shubreg_t i_rsvd : 46;
- } ii_igfx1_fld_s;
-} ii_igfx1_u_t;
-
-
-/************************************************************************
- * *
- * There are two instances of this registers. These registers are *
- * used as scratch registers for software use. *
- * *
- ************************************************************************/
-
-typedef union ii_iscr0_u {
- shubreg_t ii_iscr0_regval;
- struct {
- shubreg_t i_scratch : 64;
- } ii_iscr0_fld_s;
-} ii_iscr0_u_t;
-
-
-
-/************************************************************************
- * *
- * There are two instances of this registers. These registers are *
- * used as scratch registers for software use. *
- * *
- ************************************************************************/
-
-typedef union ii_iscr1_u {
- shubreg_t ii_iscr1_regval;
- struct {
- shubreg_t i_scratch : 64;
- } ii_iscr1_fld_s;
-} ii_iscr1_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the SHub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte1_u {
- shubreg_t ii_itte1_regval;
- struct {
- shubreg_t i_offset : 5;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_w_num : 4;
- shubreg_t i_iosp : 1;
- shubreg_t i_rsvd : 51;
- } ii_itte1_fld_s;
-} ii_itte1_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte2_u {
- shubreg_t ii_itte2_regval;
- struct {
- shubreg_t i_offset : 5;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_w_num : 4;
- shubreg_t i_iosp : 1;
- shubreg_t i_rsvd : 51;
- } ii_itte2_fld_s;
-} ii_itte2_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the SHub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte3_u {
- shubreg_t ii_itte3_regval;
- struct {
- shubreg_t i_offset : 5;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_w_num : 4;
- shubreg_t i_iosp : 1;
- shubreg_t i_rsvd : 51;
- } ii_itte3_fld_s;
-} ii_itte3_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a SHub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the SHub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the SHub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte4_u {
- shubreg_t ii_itte4_regval;
- struct {
- shubreg_t i_offset : 5;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_w_num : 4;
- shubreg_t i_iosp : 1;
- shubreg_t i_rsvd : 51;
- } ii_itte4_fld_s;
-} ii_itte4_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a SHub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte5_u {
- shubreg_t ii_itte5_regval;
- struct {
- shubreg_t i_offset : 5;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_w_num : 4;
- shubreg_t i_iosp : 1;
- shubreg_t i_rsvd : 51;
- } ii_itte5_fld_s;
-} ii_itte5_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the Shub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte6_u {
- shubreg_t ii_itte6_regval;
- struct {
- shubreg_t i_offset : 5;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_w_num : 4;
- shubreg_t i_iosp : 1;
- shubreg_t i_rsvd : 51;
- } ii_itte6_fld_s;
-} ii_itte6_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are seven instances of translation table entry *
- * registers. Each register maps a Shub Big Window to a 48-bit *
- * address on Crosstalk. *
- * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
- * number) are used to select one of these 7 registers. The Widget *
- * number field is then derived from the W_NUM field for synthesizing *
- * a Crosstalk packet. The 5 bits of OFFSET are concatenated with *
- * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] *
- * are padded with zeros. Although the maximum Crosstalk space *
- * addressable by the Shub is thus the lower 16 GBytes per widget *
- * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this *
- * space can be accessed. *
- * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big *
- * Window number) are used to select one of these 7 registers. The *
- * Widget number field is then derived from the W_NUM field for *
- * synthesizing a Crosstalk packet. The 5 bits of OFFSET are *
- * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP *
- * field is used as Crosstalk[47], and remainder of the Crosstalk *
- * address bits (Crosstalk[46:34]) are always zero. While the maximum *
- * Crosstalk space addressable by the SHub is thus the lower *
- * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
- * of this space can be accessed. *
- * *
- ************************************************************************/
-
-typedef union ii_itte7_u {
- shubreg_t ii_itte7_regval;
- struct {
- shubreg_t i_offset : 5;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_w_num : 4;
- shubreg_t i_iosp : 1;
- shubreg_t i_rsvd : 51;
- } ii_itte7_fld_s;
-} ii_itte7_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprb0_u {
- shubreg_t ii_iprb0_regval;
- struct {
- shubreg_t i_c : 8;
- shubreg_t i_na : 14;
- shubreg_t i_rsvd_2 : 2;
- shubreg_t i_nb : 14;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_m : 2;
- shubreg_t i_f : 1;
- shubreg_t i_of_cnt : 5;
- shubreg_t i_error : 1;
- shubreg_t i_rd_to : 1;
- shubreg_t i_spur_wr : 1;
- shubreg_t i_spur_rd : 1;
- shubreg_t i_rsvd : 11;
- shubreg_t i_mult_err : 1;
- } ii_iprb0_fld_s;
-} ii_iprb0_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprb8_u {
- shubreg_t ii_iprb8_regval;
- struct {
- shubreg_t i_c : 8;
- shubreg_t i_na : 14;
- shubreg_t i_rsvd_2 : 2;
- shubreg_t i_nb : 14;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_m : 2;
- shubreg_t i_f : 1;
- shubreg_t i_of_cnt : 5;
- shubreg_t i_error : 1;
- shubreg_t i_rd_to : 1;
- shubreg_t i_spur_wr : 1;
- shubreg_t i_spur_rd : 1;
- shubreg_t i_rsvd : 11;
- shubreg_t i_mult_err : 1;
- } ii_iprb8_fld_s;
-} ii_iprb8_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprb9_u {
- shubreg_t ii_iprb9_regval;
- struct {
- shubreg_t i_c : 8;
- shubreg_t i_na : 14;
- shubreg_t i_rsvd_2 : 2;
- shubreg_t i_nb : 14;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_m : 2;
- shubreg_t i_f : 1;
- shubreg_t i_of_cnt : 5;
- shubreg_t i_error : 1;
- shubreg_t i_rd_to : 1;
- shubreg_t i_spur_wr : 1;
- shubreg_t i_spur_rd : 1;
- shubreg_t i_rsvd : 11;
- shubreg_t i_mult_err : 1;
- } ii_iprb9_fld_s;
-} ii_iprb9_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * *
- * *
- ************************************************************************/
-
-typedef union ii_iprba_u {
- shubreg_t ii_iprba_regval;
- struct {
- shubreg_t i_c : 8;
- shubreg_t i_na : 14;
- shubreg_t i_rsvd_2 : 2;
- shubreg_t i_nb : 14;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_m : 2;
- shubreg_t i_f : 1;
- shubreg_t i_of_cnt : 5;
- shubreg_t i_error : 1;
- shubreg_t i_rd_to : 1;
- shubreg_t i_spur_wr : 1;
- shubreg_t i_spur_rd : 1;
- shubreg_t i_rsvd : 11;
- shubreg_t i_mult_err : 1;
- } ii_iprba_fld_s;
-} ii_iprba_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbb_u {
- shubreg_t ii_iprbb_regval;
- struct {
- shubreg_t i_c : 8;
- shubreg_t i_na : 14;
- shubreg_t i_rsvd_2 : 2;
- shubreg_t i_nb : 14;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_m : 2;
- shubreg_t i_f : 1;
- shubreg_t i_of_cnt : 5;
- shubreg_t i_error : 1;
- shubreg_t i_rd_to : 1;
- shubreg_t i_spur_wr : 1;
- shubreg_t i_spur_rd : 1;
- shubreg_t i_rsvd : 11;
- shubreg_t i_mult_err : 1;
- } ii_iprbb_fld_s;
-} ii_iprbb_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbc_u {
- shubreg_t ii_iprbc_regval;
- struct {
- shubreg_t i_c : 8;
- shubreg_t i_na : 14;
- shubreg_t i_rsvd_2 : 2;
- shubreg_t i_nb : 14;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_m : 2;
- shubreg_t i_f : 1;
- shubreg_t i_of_cnt : 5;
- shubreg_t i_error : 1;
- shubreg_t i_rd_to : 1;
- shubreg_t i_spur_wr : 1;
- shubreg_t i_spur_rd : 1;
- shubreg_t i_rsvd : 11;
- shubreg_t i_mult_err : 1;
- } ii_iprbc_fld_s;
-} ii_iprbc_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbd_u {
- shubreg_t ii_iprbd_regval;
- struct {
- shubreg_t i_c : 8;
- shubreg_t i_na : 14;
- shubreg_t i_rsvd_2 : 2;
- shubreg_t i_nb : 14;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_m : 2;
- shubreg_t i_f : 1;
- shubreg_t i_of_cnt : 5;
- shubreg_t i_error : 1;
- shubreg_t i_rd_to : 1;
- shubreg_t i_spur_wr : 1;
- shubreg_t i_spur_rd : 1;
- shubreg_t i_rsvd : 11;
- shubreg_t i_mult_err : 1;
- } ii_iprbd_fld_s;
-} ii_iprbd_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of SHub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbe_u {
- shubreg_t ii_iprbe_regval;
- struct {
- shubreg_t i_c : 8;
- shubreg_t i_na : 14;
- shubreg_t i_rsvd_2 : 2;
- shubreg_t i_nb : 14;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_m : 2;
- shubreg_t i_f : 1;
- shubreg_t i_of_cnt : 5;
- shubreg_t i_error : 1;
- shubreg_t i_rd_to : 1;
- shubreg_t i_spur_wr : 1;
- shubreg_t i_spur_rd : 1;
- shubreg_t i_rsvd : 11;
- shubreg_t i_mult_err : 1;
- } ii_iprbe_fld_s;
-} ii_iprbe_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 9 instances of this register, one per *
- * actual widget in this implementation of Shub and Crossbow. *
- * Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
- * refers to Crossbow's internal space. *
- * This register contains the state elements per widget that are *
- * necessary to manage the PIO flow control on Crosstalk and on the *
- * Router Network. See the PIO Flow Control chapter for a complete *
- * description of this register *
- * The SPUR_WR bit requires some explanation. When this register is *
- * written, the new value of the C field is captured in an internal *
- * register so the hardware can remember what the programmer wrote *
- * into the credit counter. The SPUR_WR bit sets whenever the C field *
- * increments above this stored value, which indicates that there *
- * have been more responses received than requests sent. The SPUR_WR *
- * bit cannot be cleared until a value is written to the IPRBx *
- * register; the write will correct the C field and capture its new *
- * value in the internal register. Even if IECLR[E_PRB_x] is set, the *
- * SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
- ************************************************************************/
-
-typedef union ii_iprbf_u {
- shubreg_t ii_iprbf_regval;
- struct {
- shubreg_t i_c : 8;
- shubreg_t i_na : 14;
- shubreg_t i_rsvd_2 : 2;
- shubreg_t i_nb : 14;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_m : 2;
- shubreg_t i_f : 1;
- shubreg_t i_of_cnt : 5;
- shubreg_t i_error : 1;
- shubreg_t i_rd_to : 1;
- shubreg_t i_spur_wr : 1;
- shubreg_t i_spur_rd : 1;
- shubreg_t i_rsvd : 11;
- shubreg_t i_mult_err : 1;
- } ii_iprbe_fld_s;
-} ii_iprbf_u_t;
-
-
-/************************************************************************
- * *
- * This register specifies the timeout value to use for monitoring *
- * Crosstalk credits which are used outbound to Crosstalk. An *
- * internal counter called the Crosstalk Credit Timeout Counter *
- * increments every 128 II clocks. The counter starts counting *
- * anytime the credit count drops below a threshold, and resets to *
- * zero (stops counting) anytime the credit count is at or above the *
- * threshold. The threshold is 1 credit in direct connect mode and 2 *
- * in Crossbow connect mode. When the internal Crosstalk Credit *
- * Timeout Counter reaches the value programmed in this register, a *
- * Crosstalk Credit Timeout has occurred. The internal counter is not *
- * readable from software, and stops counting at its maximum value, *
- * so it cannot cause more than one interrupt. *
- * *
- ************************************************************************/
-
-typedef union ii_ixcc_u {
- shubreg_t ii_ixcc_regval;
- struct {
- shubreg_t i_time_out : 26;
- shubreg_t i_rsvd : 38;
- } ii_ixcc_fld_s;
-} ii_ixcc_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register qualifies all the PIO and DMA *
- * operations launched from widget 0 towards the SHub. In *
- * addition, it also qualifies accesses by the BTE streams. *
- * The bits in each field of this register are cleared by the SHub *
- * upon detection of an error which requires widget 0 or the BTE *
- * streams to be terminated. Whether or not widget x has access *
- * rights to this SHub is determined by an AND of the device *
- * enable bit in the appropriate field of this register and bit 0 in *
- * the Wx_IAC field. The bits in this field are set by writing a 1 to *
- * them. Incoming replies from Crosstalk are not subject to this *
- * access control mechanism. *
- * *
- ************************************************************************/
-
-typedef union ii_imem_u {
- shubreg_t ii_imem_regval;
- struct {
- shubreg_t i_w0_esd : 1;
- shubreg_t i_rsvd_3 : 3;
- shubreg_t i_b0_esd : 1;
- shubreg_t i_rsvd_2 : 3;
- shubreg_t i_b1_esd : 1;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_clr_precise : 1;
- shubreg_t i_rsvd : 51;
- } ii_imem_fld_s;
-} ii_imem_u_t;
-
-
-
-/************************************************************************
- * *
- * Description: This register specifies the timeout value to use for *
- * monitoring Crosstalk tail flits coming into the Shub in the *
- * TAIL_TO field. An internal counter associated with this register *
- * is incremented every 128 II internal clocks (7 bits). The counter *
- * starts counting anytime a header micropacket is received and stops *
- * counting (and resets to zero) any time a micropacket with a Tail *
- * bit is received. Once the counter reaches the threshold value *
- * programmed in this register, it generates an interrupt to the *
- * processor that is programmed into the IIDSR. The counter saturates *
- * (does not roll over) at its maximum value, so it cannot cause *
- * another interrupt until after it is cleared. *
- * The register also contains the Read Response Timeout values. The *
- * Prescalar is 23 bits, and counts II clocks. An internal counter *
- * increments on every II clock and when it reaches the value in the *
- * Prescalar field, all IPRTE registers with their valid bits set *
- * have their Read Response timers bumped. Whenever any of them match *
- * the value in the RRSP_TO field, a Read Response Timeout has *
- * occurred, and error handling occurs as described in the Error *
- * Handling section of this document. *
- * *
- ************************************************************************/
-
-typedef union ii_ixtt_u {
- shubreg_t ii_ixtt_regval;
- struct {
- shubreg_t i_tail_to : 26;
- shubreg_t i_rsvd_1 : 6;
- shubreg_t i_rrsp_ps : 23;
- shubreg_t i_rrsp_to : 5;
- shubreg_t i_rsvd : 4;
- } ii_ixtt_fld_s;
-} ii_ixtt_u_t;
-
-
-/************************************************************************
- * *
- * Writing a 1 to the fields of this register clears the appropriate *
- * error bits in other areas of SHub. Note that when the *
- * E_PRB_x bits are used to clear error bits in PRB registers, *
- * SPUR_RD and SPUR_WR may persist, because they require additional *
- * action to clear them. See the IPRBx and IXSS Register *
- * specifications. *
- * *
- ************************************************************************/
-
-typedef union ii_ieclr_u {
- shubreg_t ii_ieclr_regval;
- struct {
- shubreg_t i_e_prb_0 : 1;
- shubreg_t i_rsvd : 7;
- shubreg_t i_e_prb_8 : 1;
- shubreg_t i_e_prb_9 : 1;
- shubreg_t i_e_prb_a : 1;
- shubreg_t i_e_prb_b : 1;
- shubreg_t i_e_prb_c : 1;
- shubreg_t i_e_prb_d : 1;
- shubreg_t i_e_prb_e : 1;
- shubreg_t i_e_prb_f : 1;
- shubreg_t i_e_crazy : 1;
- shubreg_t i_e_bte_0 : 1;
- shubreg_t i_e_bte_1 : 1;
- shubreg_t i_reserved_1 : 10;
- shubreg_t i_spur_rd_hdr : 1;
- shubreg_t i_cam_intr_to : 1;
- shubreg_t i_cam_overflow : 1;
- shubreg_t i_cam_read_miss : 1;
- shubreg_t i_ioq_rep_underflow : 1;
- shubreg_t i_ioq_req_underflow : 1;
- shubreg_t i_ioq_rep_overflow : 1;
- shubreg_t i_ioq_req_overflow : 1;
- shubreg_t i_iiq_rep_overflow : 1;
- shubreg_t i_iiq_req_overflow : 1;
- shubreg_t i_ii_xn_rep_cred_overflow : 1;
- shubreg_t i_ii_xn_req_cred_overflow : 1;
- shubreg_t i_ii_xn_invalid_cmd : 1;
- shubreg_t i_xn_ii_invalid_cmd : 1;
- shubreg_t i_reserved_2 : 21;
- } ii_ieclr_fld_s;
-} ii_ieclr_u_t;
-
-
-/************************************************************************
- * *
- * This register controls both BTEs. SOFT_RESET is intended for *
- * recovery after an error. COUNT controls the total number of CRBs *
- * that both BTEs (combined) can use, which affects total BTE *
- * bandwidth. *
- * *
- ************************************************************************/
-
-typedef union ii_ibcr_u {
- shubreg_t ii_ibcr_regval;
- struct {
- shubreg_t i_count : 4;
- shubreg_t i_rsvd_1 : 4;
- shubreg_t i_soft_reset : 1;
- shubreg_t i_rsvd : 55;
- } ii_ibcr_fld_s;
-} ii_ibcr_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the header of a spurious read response *
- * received from Crosstalk. A spurious read response is defined as a *
- * read response received by II from a widget for which (1) the SIDN *
- * has a value between 1 and 7, inclusive (II never sends requests to *
- * these widgets (2) there is no valid IPRTE register which *
- * corresponds to the TNUM, or (3) the widget indicated in SIDN is *
- * not the same as the widget recorded in the IPRTE register *
- * referenced by the TNUM. If this condition is true, and if the *
- * IXSS[VALID] bit is clear, then the header of the spurious read *
- * response is capture in IXSM and IXSS, and IXSS[VALID] is set. The *
- * errant header is thereby captured, and no further spurious read *
- * respones are captured until IXSS[VALID] is cleared by setting the *
- * appropriate bit in IECLR.Everytime a spurious read response is *
- * detected, the SPUR_RD bit of the PRB corresponding to the incoming *
- * message's SIDN field is set. This always happens, regarless of *
- * whether a header is captured. The programmer should check *
- * IXSM[SIDN] to determine which widget sent the spurious response, *
- * because there may be more than one SPUR_RD bit set in the PRB *
- * registers. The widget indicated by IXSM[SIDN] was the first *
- * spurious read response to be received since the last time *
- * IXSS[VALID] was clear. The SPUR_RD bit of the corresponding PRB *
- * will be set. Any SPUR_RD bits in any other PRB registers indicate *
- * spurious messages from other widets which were detected after the *
- * header was captured.. *
- * *
- ************************************************************************/
-
-typedef union ii_ixsm_u {
- shubreg_t ii_ixsm_regval;
- struct {
- shubreg_t i_byte_en : 32;
- shubreg_t i_reserved : 1;
- shubreg_t i_tag : 3;
- shubreg_t i_alt_pactyp : 4;
- shubreg_t i_bo : 1;
- shubreg_t i_error : 1;
- shubreg_t i_vbpm : 1;
- shubreg_t i_gbr : 1;
- shubreg_t i_ds : 2;
- shubreg_t i_ct : 1;
- shubreg_t i_tnum : 5;
- shubreg_t i_pactyp : 4;
- shubreg_t i_sidn : 4;
- shubreg_t i_didn : 4;
- } ii_ixsm_fld_s;
-} ii_ixsm_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the sideband bits of a spurious read *
- * response received from Crosstalk. *
- * *
- ************************************************************************/
-
-typedef union ii_ixss_u {
- shubreg_t ii_ixss_regval;
- struct {
- shubreg_t i_sideband : 8;
- shubreg_t i_rsvd : 55;
- shubreg_t i_valid : 1;
- } ii_ixss_fld_s;
-} ii_ixss_u_t;
-
-
-/************************************************************************
- * *
- * This register enables software to access the II LLP's test port. *
- * Refer to the LLP 2.5 documentation for an explanation of the test *
- * port. Software can write to this register to program the values *
- * for the control fields (TestErrCapture, TestClear, TestFlit, *
- * TestMask and TestSeed). Similarly, software can read from this *
- * register to obtain the values of the test port's status outputs *
- * (TestCBerr, TestValid and TestData). *
- * *
- ************************************************************************/
-
-typedef union ii_ilct_u {
- shubreg_t ii_ilct_regval;
- struct {
- shubreg_t i_test_seed : 20;
- shubreg_t i_test_mask : 8;
- shubreg_t i_test_data : 20;
- shubreg_t i_test_valid : 1;
- shubreg_t i_test_cberr : 1;
- shubreg_t i_test_flit : 3;
- shubreg_t i_test_clear : 1;
- shubreg_t i_test_err_capture : 1;
- shubreg_t i_rsvd : 9;
- } ii_ilct_fld_s;
-} ii_ilct_u_t;
-
-
-/************************************************************************
- * *
- * If the II detects an illegal incoming Duplonet packet (request or *
- * reply) when VALID==0 in the IIEPH1 register, then it saves the *
- * contents of the packet's header flit in the IIEPH1 and IIEPH2 *
- * registers, sets the VALID bit in IIEPH1, clears the OVERRUN bit, *
- * and assigns a value to the ERR_TYPE field which indicates the *
- * specific nature of the error. The II recognizes four different *
- * types of errors: short request packets (ERR_TYPE==2), short reply *
- * packets (ERR_TYPE==3), long request packets (ERR_TYPE==4) and long *
- * reply packets (ERR_TYPE==5). The encodings for these types of *
- * errors were chosen to be consistent with the same types of errors *
- * indicated by the ERR_TYPE field in the LB_ERROR_HDR1 register (in *
- * the LB unit). If the II detects an illegal incoming Duplonet *
- * packet when VALID==1 in the IIEPH1 register, then it merely sets *
- * the OVERRUN bit to indicate that a subsequent error has happened, *
- * and does nothing further. *
- * *
- ************************************************************************/
-
-typedef union ii_iieph1_u {
- shubreg_t ii_iieph1_regval;
- struct {
- shubreg_t i_command : 7;
- shubreg_t i_rsvd_5 : 1;
- shubreg_t i_suppl : 14;
- shubreg_t i_rsvd_4 : 1;
- shubreg_t i_source : 14;
- shubreg_t i_rsvd_3 : 1;
- shubreg_t i_err_type : 4;
- shubreg_t i_rsvd_2 : 4;
- shubreg_t i_overrun : 1;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_valid : 1;
- shubreg_t i_rsvd : 13;
- } ii_iieph1_fld_s;
-} ii_iieph1_u_t;
-
-
-/************************************************************************
- * *
- * This register holds the Address field from the header flit of an *
- * incoming erroneous Duplonet packet, along with the tail bit which *
- * accompanied this header flit. This register is essentially an *
- * extension of IIEPH1. Two registers were necessary because the 64 *
- * bits available in only a single register were insufficient to *
- * capture the entire header flit of an erroneous packet. *
- * *
- ************************************************************************/
-
-typedef union ii_iieph2_u {
- shubreg_t ii_iieph2_regval;
- struct {
- shubreg_t i_rsvd_0 : 3;
- shubreg_t i_address : 47;
- shubreg_t i_rsvd_1 : 10;
- shubreg_t i_tail : 1;
- shubreg_t i_rsvd : 3;
- } ii_iieph2_fld_s;
-} ii_iieph2_u_t;
-
-
-/******************************/
-
-
-
-/************************************************************************
- * *
- * This register's value is a bit vector that guards access from SXBs *
- * to local registers within the II as well as to external Crosstalk *
- * widgets *
- * *
- ************************************************************************/
-
-typedef union ii_islapr_u {
- shubreg_t ii_islapr_regval;
- struct {
- shubreg_t i_region : 64;
- } ii_islapr_fld_s;
-} ii_islapr_u_t;
-
-
-/************************************************************************
- * *
- * A write to this register of the 56-bit value "Pup+Bun" will cause *
- * the bit in the ISLAPR register corresponding to the region of the *
- * requestor to be set (access allowed). (
- * *
- ************************************************************************/
-
-typedef union ii_islapo_u {
- shubreg_t ii_islapo_regval;
- struct {
- shubreg_t i_io_sbx_ovrride : 56;
- shubreg_t i_rsvd : 8;
- } ii_islapo_fld_s;
-} ii_islapo_u_t;
-
-/************************************************************************
- * *
- * Determines how long the wrapper will wait aftr an interrupt is *
- * initially issued from the II before it times out the outstanding *
- * interrupt and drops it from the interrupt queue. *
- * *
- ************************************************************************/
-
-typedef union ii_iwi_u {
- shubreg_t ii_iwi_regval;
- struct {
- shubreg_t i_prescale : 24;
- shubreg_t i_rsvd : 8;
- shubreg_t i_timeout : 8;
- shubreg_t i_rsvd1 : 8;
- shubreg_t i_intrpt_retry_period : 8;
- shubreg_t i_rsvd2 : 8;
- } ii_iwi_fld_s;
-} ii_iwi_u_t;
-
-/************************************************************************
- * *
- * Log errors which have occurred in the II wrapper. The errors are *
- * cleared by writing to the IECLR register. *
- * *
- ************************************************************************/
-
-typedef union ii_iwel_u {
- shubreg_t ii_iwel_regval;
- struct {
- shubreg_t i_intr_timed_out : 1;
- shubreg_t i_rsvd : 7;
- shubreg_t i_cam_overflow : 1;
- shubreg_t i_cam_read_miss : 1;
- shubreg_t i_rsvd1 : 2;
- shubreg_t i_ioq_rep_underflow : 1;
- shubreg_t i_ioq_req_underflow : 1;
- shubreg_t i_ioq_rep_overflow : 1;
- shubreg_t i_ioq_req_overflow : 1;
- shubreg_t i_iiq_rep_overflow : 1;
- shubreg_t i_iiq_req_overflow : 1;
- shubreg_t i_rsvd2 : 6;
- shubreg_t i_ii_xn_rep_cred_over_under: 1;
- shubreg_t i_ii_xn_req_cred_over_under: 1;
- shubreg_t i_rsvd3 : 6;
- shubreg_t i_ii_xn_invalid_cmd : 1;
- shubreg_t i_xn_ii_invalid_cmd : 1;
- shubreg_t i_rsvd4 : 30;
- } ii_iwel_fld_s;
-} ii_iwel_u_t;
-
-/************************************************************************
- * *
- * Controls the II wrapper. *
- * *
- ************************************************************************/
-
-typedef union ii_iwc_u {
- shubreg_t ii_iwc_regval;
- struct {
- shubreg_t i_dma_byte_swap : 1;
- shubreg_t i_rsvd : 3;
- shubreg_t i_cam_read_lines_reset : 1;
- shubreg_t i_rsvd1 : 3;
- shubreg_t i_ii_xn_cred_over_under_log: 1;
- shubreg_t i_rsvd2 : 19;
- shubreg_t i_xn_rep_iq_depth : 5;
- shubreg_t i_rsvd3 : 3;
- shubreg_t i_xn_req_iq_depth : 5;
- shubreg_t i_rsvd4 : 3;
- shubreg_t i_iiq_depth : 6;
- shubreg_t i_rsvd5 : 12;
- shubreg_t i_force_rep_cred : 1;
- shubreg_t i_force_req_cred : 1;
- } ii_iwc_fld_s;
-} ii_iwc_u_t;
-
-/************************************************************************
- * *
- * Status in the II wrapper. *
- * *
- ************************************************************************/
-
-typedef union ii_iws_u {
- shubreg_t ii_iws_regval;
- struct {
- shubreg_t i_xn_rep_iq_credits : 5;
- shubreg_t i_rsvd : 3;
- shubreg_t i_xn_req_iq_credits : 5;
- shubreg_t i_rsvd1 : 51;
- } ii_iws_fld_s;
-} ii_iws_u_t;
-
-/************************************************************************
- * *
- * Masks errors in the IWEL register. *
- * *
- ************************************************************************/
-
-typedef union ii_iweim_u {
- shubreg_t ii_iweim_regval;
- struct {
- shubreg_t i_intr_timed_out : 1;
- shubreg_t i_rsvd : 7;
- shubreg_t i_cam_overflow : 1;
- shubreg_t i_cam_read_miss : 1;
- shubreg_t i_rsvd1 : 2;
- shubreg_t i_ioq_rep_underflow : 1;
- shubreg_t i_ioq_req_underflow : 1;
- shubreg_t i_ioq_rep_overflow : 1;
- shubreg_t i_ioq_req_overflow : 1;
- shubreg_t i_iiq_rep_overflow : 1;
- shubreg_t i_iiq_req_overflow : 1;
- shubreg_t i_rsvd2 : 6;
- shubreg_t i_ii_xn_rep_cred_overflow : 1;
- shubreg_t i_ii_xn_req_cred_overflow : 1;
- shubreg_t i_rsvd3 : 6;
- shubreg_t i_ii_xn_invalid_cmd : 1;
- shubreg_t i_xn_ii_invalid_cmd : 1;
- shubreg_t i_rsvd4 : 30;
- } ii_iweim_fld_s;
-} ii_iweim_u_t;
-
-
-/************************************************************************
- * *
- * A write to this register causes a particular field in the *
- * corresponding widget's PRB entry to be adjusted up or down by 1. *
- * This counter should be used when recovering from error and reset *
- * conditions. Note that software would be capable of causing *
- * inadvertent overflow or underflow of these counters. *
- * *
- ************************************************************************/
-
-typedef union ii_ipca_u {
- shubreg_t ii_ipca_regval;
- struct {
- shubreg_t i_wid : 4;
- shubreg_t i_adjust : 1;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_field : 2;
- shubreg_t i_rsvd : 54;
- } ii_ipca_fld_s;
-} ii_ipca_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-
-typedef union ii_iprte0a_u {
- shubreg_t ii_iprte0a_regval;
- struct {
- shubreg_t i_rsvd_1 : 54;
- shubreg_t i_widget : 4;
- shubreg_t i_to_cnt : 5;
- shubreg_t i_vld : 1;
- } ii_iprte0a_fld_s;
-} ii_iprte0a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte1a_u {
- shubreg_t ii_iprte1a_regval;
- struct {
- shubreg_t i_rsvd_1 : 54;
- shubreg_t i_widget : 4;
- shubreg_t i_to_cnt : 5;
- shubreg_t i_vld : 1;
- } ii_iprte1a_fld_s;
-} ii_iprte1a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte2a_u {
- shubreg_t ii_iprte2a_regval;
- struct {
- shubreg_t i_rsvd_1 : 54;
- shubreg_t i_widget : 4;
- shubreg_t i_to_cnt : 5;
- shubreg_t i_vld : 1;
- } ii_iprte2a_fld_s;
-} ii_iprte2a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte3a_u {
- shubreg_t ii_iprte3a_regval;
- struct {
- shubreg_t i_rsvd_1 : 54;
- shubreg_t i_widget : 4;
- shubreg_t i_to_cnt : 5;
- shubreg_t i_vld : 1;
- } ii_iprte3a_fld_s;
-} ii_iprte3a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte4a_u {
- shubreg_t ii_iprte4a_regval;
- struct {
- shubreg_t i_rsvd_1 : 54;
- shubreg_t i_widget : 4;
- shubreg_t i_to_cnt : 5;
- shubreg_t i_vld : 1;
- } ii_iprte4a_fld_s;
-} ii_iprte4a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte5a_u {
- shubreg_t ii_iprte5a_regval;
- struct {
- shubreg_t i_rsvd_1 : 54;
- shubreg_t i_widget : 4;
- shubreg_t i_to_cnt : 5;
- shubreg_t i_vld : 1;
- } ii_iprte5a_fld_s;
-} ii_iprte5a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte6a_u {
- shubreg_t ii_iprte6a_regval;
- struct {
- shubreg_t i_rsvd_1 : 54;
- shubreg_t i_widget : 4;
- shubreg_t i_to_cnt : 5;
- shubreg_t i_vld : 1;
- } ii_iprte6a_fld_s;
-} ii_iprte6a_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte7a_u {
- shubreg_t ii_iprte7a_regval;
- struct {
- shubreg_t i_rsvd_1 : 54;
- shubreg_t i_widget : 4;
- shubreg_t i_to_cnt : 5;
- shubreg_t i_vld : 1;
- } ii_iprtea7_fld_s;
-} ii_iprte7a_u_t;
-
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-
-typedef union ii_iprte0b_u {
- shubreg_t ii_iprte0b_regval;
- struct {
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_address : 47;
- shubreg_t i_init : 3;
- shubreg_t i_source : 11;
- } ii_iprte0b_fld_s;
-} ii_iprte0b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte1b_u {
- shubreg_t ii_iprte1b_regval;
- struct {
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_address : 47;
- shubreg_t i_init : 3;
- shubreg_t i_source : 11;
- } ii_iprte1b_fld_s;
-} ii_iprte1b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte2b_u {
- shubreg_t ii_iprte2b_regval;
- struct {
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_address : 47;
- shubreg_t i_init : 3;
- shubreg_t i_source : 11;
- } ii_iprte2b_fld_s;
-} ii_iprte2b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte3b_u {
- shubreg_t ii_iprte3b_regval;
- struct {
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_address : 47;
- shubreg_t i_init : 3;
- shubreg_t i_source : 11;
- } ii_iprte3b_fld_s;
-} ii_iprte3b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte4b_u {
- shubreg_t ii_iprte4b_regval;
- struct {
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_address : 47;
- shubreg_t i_init : 3;
- shubreg_t i_source : 11;
- } ii_iprte4b_fld_s;
-} ii_iprte4b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte5b_u {
- shubreg_t ii_iprte5b_regval;
- struct {
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_address : 47;
- shubreg_t i_init : 3;
- shubreg_t i_source : 11;
- } ii_iprte5b_fld_s;
-} ii_iprte5b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte6b_u {
- shubreg_t ii_iprte6b_regval;
- struct {
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_address : 47;
- shubreg_t i_init : 3;
- shubreg_t i_source : 11;
-
- } ii_iprte6b_fld_s;
-} ii_iprte6b_u_t;
-
-
-/************************************************************************
- * *
- * There are 8 instances of this register. This register contains *
- * the information that the II has to remember once it has launched a *
- * PIO Read operation. The contents are used to form the correct *
- * Router Network packet and direct the Crosstalk reply to the *
- * appropriate processor. *
- * *
- ************************************************************************/
-
-typedef union ii_iprte7b_u {
- shubreg_t ii_iprte7b_regval;
- struct {
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_address : 47;
- shubreg_t i_init : 3;
- shubreg_t i_source : 11;
- } ii_iprte7b_fld_s;
-} ii_iprte7b_u_t;
-
-
-/************************************************************************
- * *
- * Description: SHub II contains a feature which did not exist in *
- * the Hub which automatically cleans up after a Read Response *
- * timeout, including deallocation of the IPRTE and recovery of IBuf *
- * space. The inclusion of this register in SHub is for backward *
- * compatibility *
- * A write to this register causes an entry from the table of *
- * outstanding PIO Read Requests to be freed and returned to the *
- * stack of free entries. This register is used in handling the *
- * timeout errors that result in a PIO Reply never returning from *
- * Crosstalk. *
- * Note that this register does not affect the contents of the IPRTE *
- * registers. The Valid bits in those registers have to be *
- * specifically turned off by software. *
- * *
- ************************************************************************/
-
-typedef union ii_ipdr_u {
- shubreg_t ii_ipdr_regval;
- struct {
- shubreg_t i_te : 3;
- shubreg_t i_rsvd_1 : 1;
- shubreg_t i_pnd : 1;
- shubreg_t i_init_rpcnt : 1;
- shubreg_t i_rsvd : 58;
- } ii_ipdr_fld_s;
-} ii_ipdr_u_t;
-
-
-/************************************************************************
- * *
- * A write to this register causes a CRB entry to be returned to the *
- * queue of free CRBs. The entry should have previously been cleared *
- * (mark bit) via backdoor access to the pertinent CRB entry. This *
- * register is used in the last step of handling the errors that are *
- * captured and marked in CRB entries. Briefly: 1) first error for *
- * DMA write from a particular device, and first error for a *
- * particular BTE stream, lead to a marked CRB entry, and processor *
- * interrupt, 2) software reads the error information captured in the *
- * CRB entry, and presumably takes some corrective action, 3) *
- * software clears the mark bit, and finally 4) software writes to *
- * the ICDR register to return the CRB entry to the list of free CRB *
- * entries. *
- * *
- ************************************************************************/
-
-typedef union ii_icdr_u {
- shubreg_t ii_icdr_regval;
- struct {
- shubreg_t i_crb_num : 4;
- shubreg_t i_pnd : 1;
- shubreg_t i_rsvd : 59;
- } ii_icdr_fld_s;
-} ii_icdr_u_t;
-
-
-/************************************************************************
- * *
- * This register provides debug access to two FIFOs inside of II. *
- * Both IOQ_MAX* fields of this register contain the instantaneous *
- * depth (in units of the number of available entries) of the *
- * associated IOQ FIFO. A read of this register will return the *
- * number of free entries on each FIFO at the time of the read. So *
- * when a FIFO is idle, the associated field contains the maximum *
- * depth of the FIFO. This register is writable for debug reasons *
- * and is intended to be written with the maximum desired FIFO depth *
- * while the FIFO is idle. Software must assure that II is idle when *
- * this register is written. If there are any active entries in any *
- * of these FIFOs when this register is written, the results are *
- * undefined. *
- * *
- ************************************************************************/
-
-typedef union ii_ifdr_u {
- shubreg_t ii_ifdr_regval;
- struct {
- shubreg_t i_ioq_max_rq : 7;
- shubreg_t i_set_ioq_rq : 1;
- shubreg_t i_ioq_max_rp : 7;
- shubreg_t i_set_ioq_rp : 1;
- shubreg_t i_rsvd : 48;
- } ii_ifdr_fld_s;
-} ii_ifdr_u_t;
-
-
-/************************************************************************
- * *
- * This register allows the II to become sluggish in removing *
- * messages from its inbound queue (IIQ). This will cause messages to *
- * back up in either virtual channel. Disabling the "molasses" mode *
- * subsequently allows the II to be tested under stress. In the *
- * sluggish ("Molasses") mode, the localized effects of congestion *
- * can be observed. *
- * *
- ************************************************************************/
-
-typedef union ii_iiap_u {
- shubreg_t ii_iiap_regval;
- struct {
- shubreg_t i_rq_mls : 6;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_rp_mls : 6;
- shubreg_t i_rsvd : 50;
- } ii_iiap_fld_s;
-} ii_iiap_u_t;
-
-
-/************************************************************************
- * *
- * This register allows several parameters of CRB operation to be *
- * set. Note that writing to this register can have catastrophic side *
- * effects, if the CRB is not quiescent, i.e. if the CRB is *
- * processing protocol messages when the write occurs. *
- * *
- ************************************************************************/
-
-typedef union ii_icmr_u {
- shubreg_t ii_icmr_regval;
- struct {
- shubreg_t i_sp_msg : 1;
- shubreg_t i_rd_hdr : 1;
- shubreg_t i_rsvd_4 : 2;
- shubreg_t i_c_cnt : 4;
- shubreg_t i_rsvd_3 : 4;
- shubreg_t i_clr_rqpd : 1;
- shubreg_t i_clr_rppd : 1;
- shubreg_t i_rsvd_2 : 2;
- shubreg_t i_fc_cnt : 4;
- shubreg_t i_crb_vld : 15;
- shubreg_t i_crb_mark : 15;
- shubreg_t i_rsvd_1 : 2;
- shubreg_t i_precise : 1;
- shubreg_t i_rsvd : 11;
- } ii_icmr_fld_s;
-} ii_icmr_u_t;
-
-
-/************************************************************************
- * *
- * This register allows control of the table portion of the CRB *
- * logic via software. Control operations from this register have *
- * priority over all incoming Crosstalk or BTE requests. *
- * *
- ************************************************************************/
-
-typedef union ii_iccr_u {
- shubreg_t ii_iccr_regval;
- struct {
- shubreg_t i_crb_num : 4;
- shubreg_t i_rsvd_1 : 4;
- shubreg_t i_cmd : 8;
- shubreg_t i_pending : 1;
- shubreg_t i_rsvd : 47;
- } ii_iccr_fld_s;
-} ii_iccr_u_t;
-
-
-/************************************************************************
- * *
- * This register allows the maximum timeout value to be programmed. *
- * *
- ************************************************************************/
-
-typedef union ii_icto_u {
- shubreg_t ii_icto_regval;
- struct {
- shubreg_t i_timeout : 8;
- shubreg_t i_rsvd : 56;
- } ii_icto_fld_s;
-} ii_icto_u_t;
-
-
-/************************************************************************
- * *
- * This register allows the timeout prescalar to be programmed. An *
- * internal counter is associated with this register. When the *
- * internal counter reaches the value of the PRESCALE field, the *
- * timer registers in all valid CRBs are incremented (CRBx_D[TIMEOUT] *
- * field). The internal counter resets to zero, and then continues *
- * counting. *
- * *
- ************************************************************************/
-
-typedef union ii_ictp_u {
- shubreg_t ii_ictp_regval;
- struct {
- shubreg_t i_prescale : 24;
- shubreg_t i_rsvd : 40;
- } ii_ictp_fld_s;
-} ii_ictp_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * The CRB Entry registers can be conceptualized as rows and columns *
- * (illustrated in the table above). Each row contains the 4 *
- * registers required for a single CRB Entry. The first doubleword *
- * (column) for each entry is labeled A, and the second doubleword *
- * (higher address) is labeled B, the third doubleword is labeled C, *
- * the fourth doubleword is labeled D and the fifth doubleword is *
- * labeled E. All CRB entries have their addresses on a quarter *
- * cacheline aligned boundary. *
- * Upon reset, only the following fields are initialized: valid *
- * (VLD), priority count, timeout, timeout valid, and context valid. *
- * All other bits should be cleared by software before use (after *
- * recovering any potential error state from before the reset). *
- * The following four tables summarize the format for the four *
- * registers that are used for each ICRB# Entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_a_u {
- shubreg_t ii_icrb0_a_regval;
- struct {
- shubreg_t ia_iow : 1;
- shubreg_t ia_vld : 1;
- shubreg_t ia_addr : 47;
- shubreg_t ia_tnum : 5;
- shubreg_t ia_sidn : 4;
- shubreg_t ia_rsvd : 6;
- } ii_icrb0_a_fld_s;
-} ii_icrb0_a_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_b_u {
- shubreg_t ii_icrb0_b_regval;
- struct {
- shubreg_t ib_xt_err : 1;
- shubreg_t ib_mark : 1;
- shubreg_t ib_ln_uce : 1;
- shubreg_t ib_errcode : 3;
- shubreg_t ib_error : 1;
- shubreg_t ib_stall__bte_1 : 1;
- shubreg_t ib_stall__bte_0 : 1;
- shubreg_t ib_stall__intr : 1;
- shubreg_t ib_stall_ib : 1;
- shubreg_t ib_intvn : 1;
- shubreg_t ib_wb : 1;
- shubreg_t ib_hold : 1;
- shubreg_t ib_ack : 1;
- shubreg_t ib_resp : 1;
- shubreg_t ib_ack_cnt : 11;
- shubreg_t ib_rsvd : 7;
- shubreg_t ib_exc : 5;
- shubreg_t ib_init : 3;
- shubreg_t ib_imsg : 8;
- shubreg_t ib_imsgtype : 2;
- shubreg_t ib_use_old : 1;
- shubreg_t ib_rsvd_1 : 11;
- } ii_icrb0_b_fld_s;
-} ii_icrb0_b_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_c_u {
- shubreg_t ii_icrb0_c_regval;
- struct {
- shubreg_t ic_source : 15;
- shubreg_t ic_size : 2;
- shubreg_t ic_ct : 1;
- shubreg_t ic_bte_num : 1;
- shubreg_t ic_gbr : 1;
- shubreg_t ic_resprqd : 1;
- shubreg_t ic_bo : 1;
- shubreg_t ic_suppl : 15;
- shubreg_t ic_rsvd : 27;
- } ii_icrb0_c_fld_s;
-} ii_icrb0_c_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_d_u {
- shubreg_t ii_icrb0_d_regval;
- struct {
- shubreg_t id_pa_be : 43;
- shubreg_t id_bte_op : 1;
- shubreg_t id_pr_psc : 4;
- shubreg_t id_pr_cnt : 4;
- shubreg_t id_sleep : 1;
- shubreg_t id_rsvd : 11;
- } ii_icrb0_d_fld_s;
-} ii_icrb0_d_u_t;
-
-
-/************************************************************************
- * *
- * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
- * used for Crosstalk operations (both cacheline and partial *
- * operations) or BTE/IO. Because the CRB entries are very wide, five *
- * registers (_A to _E) are required to read and write each entry. *
- * *
- ************************************************************************/
-
-typedef union ii_icrb0_e_u {
- shubreg_t ii_icrb0_e_regval;
- struct {
- shubreg_t ie_timeout : 8;
- shubreg_t ie_context : 15;
- shubreg_t ie_rsvd : 1;
- shubreg_t ie_tvld : 1;
- shubreg_t ie_cvld : 1;
- shubreg_t ie_rsvd_0 : 38;
- } ii_icrb0_e_fld_s;
-} ii_icrb0_e_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the lower 64 bits of the header of the *
- * spurious message captured by II. Valid when the SP_MSG bit in ICMR *
- * register is set. *
- * *
- ************************************************************************/
-
-typedef union ii_icsml_u {
- shubreg_t ii_icsml_regval;
- struct {
- shubreg_t i_tt_addr : 47;
- shubreg_t i_newsuppl_ex : 14;
- shubreg_t i_reserved : 2;
- shubreg_t i_overflow : 1;
- } ii_icsml_fld_s;
-} ii_icsml_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the middle 64 bits of the header of the *
- * spurious message captured by II. Valid when the SP_MSG bit in ICMR *
- * register is set. *
- * *
- ************************************************************************/
-
-typedef union ii_icsmm_u {
- shubreg_t ii_icsmm_regval;
- struct {
- shubreg_t i_tt_ack_cnt : 11;
- shubreg_t i_reserved : 53;
- } ii_icsmm_fld_s;
-} ii_icsmm_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the microscopic state, all the inputs to *
- * the protocol table, captured with the spurious message. Valid when *
- * the SP_MSG bit in the ICMR register is set. *
- * *
- ************************************************************************/
-
-typedef union ii_icsmh_u {
- shubreg_t ii_icsmh_regval;
- struct {
- shubreg_t i_tt_vld : 1;
- shubreg_t i_xerr : 1;
- shubreg_t i_ft_cwact_o : 1;
- shubreg_t i_ft_wact_o : 1;
- shubreg_t i_ft_active_o : 1;
- shubreg_t i_sync : 1;
- shubreg_t i_mnusg : 1;
- shubreg_t i_mnusz : 1;
- shubreg_t i_plusz : 1;
- shubreg_t i_plusg : 1;
- shubreg_t i_tt_exc : 5;
- shubreg_t i_tt_wb : 1;
- shubreg_t i_tt_hold : 1;
- shubreg_t i_tt_ack : 1;
- shubreg_t i_tt_resp : 1;
- shubreg_t i_tt_intvn : 1;
- shubreg_t i_g_stall_bte1 : 1;
- shubreg_t i_g_stall_bte0 : 1;
- shubreg_t i_g_stall_il : 1;
- shubreg_t i_g_stall_ib : 1;
- shubreg_t i_tt_imsg : 8;
- shubreg_t i_tt_imsgtype : 2;
- shubreg_t i_tt_use_old : 1;
- shubreg_t i_tt_respreqd : 1;
- shubreg_t i_tt_bte_num : 1;
- shubreg_t i_cbn : 1;
- shubreg_t i_match : 1;
- shubreg_t i_rpcnt_lt_34 : 1;
- shubreg_t i_rpcnt_ge_34 : 1;
- shubreg_t i_rpcnt_lt_18 : 1;
- shubreg_t i_rpcnt_ge_18 : 1;
- shubreg_t i_rpcnt_lt_2 : 1;
- shubreg_t i_rpcnt_ge_2 : 1;
- shubreg_t i_rqcnt_lt_18 : 1;
- shubreg_t i_rqcnt_ge_18 : 1;
- shubreg_t i_rqcnt_lt_2 : 1;
- shubreg_t i_rqcnt_ge_2 : 1;
- shubreg_t i_tt_device : 7;
- shubreg_t i_tt_init : 3;
- shubreg_t i_reserved : 5;
- } ii_icsmh_fld_s;
-} ii_icsmh_u_t;
-
-
-/************************************************************************
- * *
- * The Shub DEBUG unit provides a 3-bit selection signal to the *
- * II core and a 3-bit selection signal to the fsbclk domain in the II *
- * wrapper. *
- * *
- ************************************************************************/
-
-typedef union ii_idbss_u {
- shubreg_t ii_idbss_regval;
- struct {
- shubreg_t i_iioclk_core_submenu : 3;
- shubreg_t i_rsvd : 5;
- shubreg_t i_fsbclk_wrapper_submenu : 3;
- shubreg_t i_rsvd_1 : 5;
- shubreg_t i_iioclk_menu : 5;
- shubreg_t i_rsvd_2 : 43;
- } ii_idbss_fld_s;
-} ii_idbss_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register is used to set up the length for a *
- * transfer and then to monitor the progress of that transfer. This *
- * register needs to be initialized before a transfer is started. A *
- * legitimate write to this register will set the Busy bit, clear the *
- * Error bit, and initialize the length to the value desired. *
- * While the transfer is in progress, hardware will decrement the *
- * length field with each successful block that is copied. Once the *
- * transfer completes, hardware will clear the Busy bit. The length *
- * field will also contain the number of cache lines left to be *
- * transferred. *
- * *
- ************************************************************************/
-
-typedef union ii_ibls0_u {
- shubreg_t ii_ibls0_regval;
- struct {
- shubreg_t i_length : 16;
- shubreg_t i_error : 1;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_busy : 1;
- shubreg_t i_rsvd : 43;
- } ii_ibls0_fld_s;
-} ii_ibls0_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibsa0_u {
- shubreg_t ii_ibsa0_regval;
- struct {
- shubreg_t i_rsvd_1 : 7;
- shubreg_t i_addr : 42;
- shubreg_t i_rsvd : 15;
- } ii_ibsa0_fld_s;
-} ii_ibsa0_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibda0_u {
- shubreg_t ii_ibda0_regval;
- struct {
- shubreg_t i_rsvd_1 : 7;
- shubreg_t i_addr : 42;
- shubreg_t i_rsvd : 15;
- } ii_ibda0_fld_s;
-} ii_ibda0_u_t;
-
-
-/************************************************************************
- * *
- * Writing to this register sets up the attributes of the transfer *
- * and initiates the transfer operation. Reading this register has *
- * the side effect of terminating any transfer in progress. Note: *
- * stopping a transfer midstream could have an adverse impact on the *
- * other BTE. If a BTE stream has to be stopped (due to error *
- * handling for example), both BTE streams should be stopped and *
- * their transfers discarded. *
- * *
- ************************************************************************/
-
-typedef union ii_ibct0_u {
- shubreg_t ii_ibct0_regval;
- struct {
- shubreg_t i_zerofill : 1;
- shubreg_t i_rsvd_2 : 3;
- shubreg_t i_notify : 1;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_poison : 1;
- shubreg_t i_rsvd : 55;
- } ii_ibct0_fld_s;
-} ii_ibct0_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the address to which the WINV is sent. *
- * This address has to be cache line aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibna0_u {
- shubreg_t ii_ibna0_regval;
- struct {
- shubreg_t i_rsvd_1 : 7;
- shubreg_t i_addr : 42;
- shubreg_t i_rsvd : 15;
- } ii_ibna0_fld_s;
-} ii_ibna0_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the programmable level as well as the node *
- * ID and PI unit of the processor to which the interrupt will be *
- * sent. *
- * *
- ************************************************************************/
-
-typedef union ii_ibia0_u {
- shubreg_t ii_ibia0_regval;
- struct {
- shubreg_t i_rsvd_2 : 1;
- shubreg_t i_node_id : 11;
- shubreg_t i_rsvd_1 : 4;
- shubreg_t i_level : 7;
- shubreg_t i_rsvd : 41;
- } ii_ibia0_fld_s;
-} ii_ibia0_u_t;
-
-
-/************************************************************************
- * *
- * Description: This register is used to set up the length for a *
- * transfer and then to monitor the progress of that transfer. This *
- * register needs to be initialized before a transfer is started. A *
- * legitimate write to this register will set the Busy bit, clear the *
- * Error bit, and initialize the length to the value desired. *
- * While the transfer is in progress, hardware will decrement the *
- * length field with each successful block that is copied. Once the *
- * transfer completes, hardware will clear the Busy bit. The length *
- * field will also contain the number of cache lines left to be *
- * transferred. *
- * *
- ************************************************************************/
-
-typedef union ii_ibls1_u {
- shubreg_t ii_ibls1_regval;
- struct {
- shubreg_t i_length : 16;
- shubreg_t i_error : 1;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_busy : 1;
- shubreg_t i_rsvd : 43;
- } ii_ibls1_fld_s;
-} ii_ibls1_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibsa1_u {
- shubreg_t ii_ibsa1_regval;
- struct {
- shubreg_t i_rsvd_1 : 7;
- shubreg_t i_addr : 33;
- shubreg_t i_rsvd : 24;
- } ii_ibsa1_fld_s;
-} ii_ibsa1_u_t;
-
-
-/************************************************************************
- * *
- * This register should be loaded before a transfer is started. The *
- * address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
- * address as described in Section 1.3, Figure2 and Figure3. Since *
- * the bottom 7 bits of the address are always taken to be zero, BTE *
- * transfers are always cacheline-aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibda1_u {
- shubreg_t ii_ibda1_regval;
- struct {
- shubreg_t i_rsvd_1 : 7;
- shubreg_t i_addr : 33;
- shubreg_t i_rsvd : 24;
- } ii_ibda1_fld_s;
-} ii_ibda1_u_t;
-
-
-/************************************************************************
- * *
- * Writing to this register sets up the attributes of the transfer *
- * and initiates the transfer operation. Reading this register has *
- * the side effect of terminating any transfer in progress. Note: *
- * stopping a transfer midstream could have an adverse impact on the *
- * other BTE. If a BTE stream has to be stopped (due to error *
- * handling for example), both BTE streams should be stopped and *
- * their transfers discarded. *
- * *
- ************************************************************************/
-
-typedef union ii_ibct1_u {
- shubreg_t ii_ibct1_regval;
- struct {
- shubreg_t i_zerofill : 1;
- shubreg_t i_rsvd_2 : 3;
- shubreg_t i_notify : 1;
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_poison : 1;
- shubreg_t i_rsvd : 55;
- } ii_ibct1_fld_s;
-} ii_ibct1_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the address to which the WINV is sent. *
- * This address has to be cache line aligned. *
- * *
- ************************************************************************/
-
-typedef union ii_ibna1_u {
- shubreg_t ii_ibna1_regval;
- struct {
- shubreg_t i_rsvd_1 : 7;
- shubreg_t i_addr : 33;
- shubreg_t i_rsvd : 24;
- } ii_ibna1_fld_s;
-} ii_ibna1_u_t;
-
-
-/************************************************************************
- * *
- * This register contains the programmable level as well as the node *
- * ID and PI unit of the processor to which the interrupt will be *
- * sent. *
- * *
- ************************************************************************/
-
-typedef union ii_ibia1_u {
- shubreg_t ii_ibia1_regval;
- struct {
- shubreg_t i_pi_id : 1;
- shubreg_t i_node_id : 8;
- shubreg_t i_rsvd_1 : 7;
- shubreg_t i_level : 7;
- shubreg_t i_rsvd : 41;
- } ii_ibia1_fld_s;
-} ii_ibia1_u_t;
-
-
-/************************************************************************
- * *
- * This register defines the resources that feed information into *
- * the two performance counters located in the IO Performance *
- * Profiling Register. There are 17 different quantities that can be *
- * measured. Given these 17 different options, the two performance *
- * counters have 15 of them in common; menu selections 0 through 0xE *
- * are identical for each performance counter. As for the other two *
- * options, one is available from one performance counter and the *
- * other is available from the other performance counter. Hence, the *
- * II supports all 17*16=272 possible combinations of quantities to *
- * measure. *
- * *
- ************************************************************************/
-
-typedef union ii_ipcr_u {
- shubreg_t ii_ipcr_regval;
- struct {
- shubreg_t i_ippr0_c : 4;
- shubreg_t i_ippr1_c : 4;
- shubreg_t i_icct : 8;
- shubreg_t i_rsvd : 48;
- } ii_ipcr_fld_s;
-} ii_ipcr_u_t;
-
-
-/************************************************************************
- * *
- * *
- * *
- ************************************************************************/
-
-typedef union ii_ippr_u {
- shubreg_t ii_ippr_regval;
- struct {
- shubreg_t i_ippr0 : 32;
- shubreg_t i_ippr1 : 32;
- } ii_ippr_fld_s;
-} ii_ippr_u_t;
-
-
-/**************************************************************************
- * *
- * The following defines which were not formed into structures are *
- * probably indentical to another register, and the name of the *
- * register is provided against each of these registers. This *
- * information needs to be checked carefully *
- * *
- * IIO_ICRB1_A IIO_ICRB0_A *
- * IIO_ICRB1_B IIO_ICRB0_B *
- * IIO_ICRB1_C IIO_ICRB0_C *
- * IIO_ICRB1_D IIO_ICRB0_D *
- * IIO_ICRB1_E IIO_ICRB0_E *
- * IIO_ICRB2_A IIO_ICRB0_A *
- * IIO_ICRB2_B IIO_ICRB0_B *
- * IIO_ICRB2_C IIO_ICRB0_C *
- * IIO_ICRB2_D IIO_ICRB0_D *
- * IIO_ICRB2_E IIO_ICRB0_E *
- * IIO_ICRB3_A IIO_ICRB0_A *
- * IIO_ICRB3_B IIO_ICRB0_B *
- * IIO_ICRB3_C IIO_ICRB0_C *
- * IIO_ICRB3_D IIO_ICRB0_D *
- * IIO_ICRB3_E IIO_ICRB0_E *
- * IIO_ICRB4_A IIO_ICRB0_A *
- * IIO_ICRB4_B IIO_ICRB0_B *
- * IIO_ICRB4_C IIO_ICRB0_C *
- * IIO_ICRB4_D IIO_ICRB0_D *
- * IIO_ICRB4_E IIO_ICRB0_E *
- * IIO_ICRB5_A IIO_ICRB0_A *
- * IIO_ICRB5_B IIO_ICRB0_B *
- * IIO_ICRB5_C IIO_ICRB0_C *
- * IIO_ICRB5_D IIO_ICRB0_D *
- * IIO_ICRB5_E IIO_ICRB0_E *
- * IIO_ICRB6_A IIO_ICRB0_A *
- * IIO_ICRB6_B IIO_ICRB0_B *
- * IIO_ICRB6_C IIO_ICRB0_C *
- * IIO_ICRB6_D IIO_ICRB0_D *
- * IIO_ICRB6_E IIO_ICRB0_E *
- * IIO_ICRB7_A IIO_ICRB0_A *
- * IIO_ICRB7_B IIO_ICRB0_B *
- * IIO_ICRB7_C IIO_ICRB0_C *
- * IIO_ICRB7_D IIO_ICRB0_D *
- * IIO_ICRB7_E IIO_ICRB0_E *
- * IIO_ICRB8_A IIO_ICRB0_A *
- * IIO_ICRB8_B IIO_ICRB0_B *
- * IIO_ICRB8_C IIO_ICRB0_C *
- * IIO_ICRB8_D IIO_ICRB0_D *
- * IIO_ICRB8_E IIO_ICRB0_E *
- * IIO_ICRB9_A IIO_ICRB0_A *
- * IIO_ICRB9_B IIO_ICRB0_B *
- * IIO_ICRB9_C IIO_ICRB0_C *
- * IIO_ICRB9_D IIO_ICRB0_D *
- * IIO_ICRB9_E IIO_ICRB0_E *
- * IIO_ICRBA_A IIO_ICRB0_A *
- * IIO_ICRBA_B IIO_ICRB0_B *
- * IIO_ICRBA_C IIO_ICRB0_C *
- * IIO_ICRBA_D IIO_ICRB0_D *
- * IIO_ICRBA_E IIO_ICRB0_E *
- * IIO_ICRBB_A IIO_ICRB0_A *
- * IIO_ICRBB_B IIO_ICRB0_B *
- * IIO_ICRBB_C IIO_ICRB0_C *
- * IIO_ICRBB_D IIO_ICRB0_D *
- * IIO_ICRBB_E IIO_ICRB0_E *
- * IIO_ICRBC_A IIO_ICRB0_A *
- * IIO_ICRBC_B IIO_ICRB0_B *
- * IIO_ICRBC_C IIO_ICRB0_C *
- * IIO_ICRBC_D IIO_ICRB0_D *
- * IIO_ICRBC_E IIO_ICRB0_E *
- * IIO_ICRBD_A IIO_ICRB0_A *
- * IIO_ICRBD_B IIO_ICRB0_B *
- * IIO_ICRBD_C IIO_ICRB0_C *
- * IIO_ICRBD_D IIO_ICRB0_D *
- * IIO_ICRBD_E IIO_ICRB0_E *
- * IIO_ICRBE_A IIO_ICRB0_A *
- * IIO_ICRBE_B IIO_ICRB0_B *
- * IIO_ICRBE_C IIO_ICRB0_C *
- * IIO_ICRBE_D IIO_ICRB0_D *
- * IIO_ICRBE_E IIO_ICRB0_E *
- * *
- **************************************************************************/
-
-
-/*
- * Slightly friendlier names for some common registers.
- */
-#define IIO_WIDGET IIO_WID /* Widget identification */
-#define IIO_WIDGET_STAT IIO_WSTAT /* Widget status register */
-#define IIO_WIDGET_CTRL IIO_WCR /* Widget control register */
-#define IIO_PROTECT IIO_ILAPR /* IO interface protection */
-#define IIO_PROTECT_OVRRD IIO_ILAPO /* IO protect override */
-#define IIO_OUTWIDGET_ACCESS IIO_IOWA /* Outbound widget access */
-#define IIO_INWIDGET_ACCESS IIO_IIWA /* Inbound widget access */
-#define IIO_INDEV_ERR_MASK IIO_IIDEM /* Inbound device error mask */
-#define IIO_LLP_CSR IIO_ILCSR /* LLP control and status */
-#define IIO_LLP_LOG IIO_ILLR /* LLP log */
-#define IIO_XTALKCC_TOUT IIO_IXCC /* Xtalk credit count timeout*/
-#define IIO_XTALKTT_TOUT IIO_IXTT /* Xtalk tail timeout */
-#define IIO_IO_ERR_CLR IIO_IECLR /* IO error clear */
-#define IIO_IGFX_0 IIO_IGFX0
-#define IIO_IGFX_1 IIO_IGFX1
-#define IIO_IBCT_0 IIO_IBCT0
-#define IIO_IBCT_1 IIO_IBCT1
-#define IIO_IBLS_0 IIO_IBLS0
-#define IIO_IBLS_1 IIO_IBLS1
-#define IIO_IBSA_0 IIO_IBSA0
-#define IIO_IBSA_1 IIO_IBSA1
-#define IIO_IBDA_0 IIO_IBDA0
-#define IIO_IBDA_1 IIO_IBDA1
-#define IIO_IBNA_0 IIO_IBNA0
-#define IIO_IBNA_1 IIO_IBNA1
-#define IIO_IBIA_0 IIO_IBIA0
-#define IIO_IBIA_1 IIO_IBIA1
-#define IIO_IOPRB_0 IIO_IPRB0
-
-#define IIO_PRTE_A(_x) (IIO_IPRTE0_A + (8 * (_x)))
-#define IIO_PRTE_B(_x) (IIO_IPRTE0_B + (8 * (_x)))
-#define IIO_NUM_PRTES 8 /* Total number of PRB table entries */
-#define IIO_WIDPRTE_A(x) IIO_PRTE_A(((x) - 8)) /* widget ID to its PRTE num */
-#define IIO_WIDPRTE_B(x) IIO_PRTE_B(((x) - 8)) /* widget ID to its PRTE num */
-
-#define IIO_NUM_IPRBS (9)
-
-#define IIO_LLP_CSR_IS_UP 0x00002000
-#define IIO_LLP_CSR_LLP_STAT_MASK 0x00003000
-#define IIO_LLP_CSR_LLP_STAT_SHFT 12
-
-#define IIO_LLP_CB_MAX 0xffff /* in ILLR CB_CNT, Max Check Bit errors */
-#define IIO_LLP_SN_MAX 0xffff /* in ILLR SN_CNT, Max Sequence Number errors */
-
-/* key to IIO_PROTECT_OVRRD */
-#define IIO_PROTECT_OVRRD_KEY 0x53474972756c6573ull /* "SGIrules" */
-
-/* BTE register names */
-#define IIO_BTE_STAT_0 IIO_IBLS_0 /* Also BTE length/status 0 */
-#define IIO_BTE_SRC_0 IIO_IBSA_0 /* Also BTE source address 0 */
-#define IIO_BTE_DEST_0 IIO_IBDA_0 /* Also BTE dest. address 0 */
-#define IIO_BTE_CTRL_0 IIO_IBCT_0 /* Also BTE control/terminate 0 */
-#define IIO_BTE_NOTIFY_0 IIO_IBNA_0 /* Also BTE notification 0 */
-#define IIO_BTE_INT_0 IIO_IBIA_0 /* Also BTE interrupt 0 */
-#define IIO_BTE_OFF_0 0 /* Base offset from BTE 0 regs. */
-#define IIO_BTE_OFF_1 (IIO_IBLS_1 - IIO_IBLS_0) /* Offset from base to BTE 1 */
-
-/* BTE register offsets from base */
-#define BTEOFF_STAT 0
-#define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0)
-#define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0)
-#define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0)
-#define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0)
-#define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0)
-
-
-/* names used in shub diags */
-#define IIO_BASE_BTE0 IIO_IBLS_0
-#define IIO_BASE_BTE1 IIO_IBLS_1
-
-/*
- * Macro which takes the widget number, and returns the
- * IO PRB address of that widget.
- * value _x is expected to be a widget number in the range
- * 0, 8 - 0xF
- */
-#define IIO_IOPRB(_x) (IIO_IOPRB_0 + ( ( (_x) < HUB_WIDGET_ID_MIN ? \
- (_x) : \
- (_x) - (HUB_WIDGET_ID_MIN-1)) << 3) )
-
-
-/* GFX Flow Control Node/Widget Register */
-#define IIO_IGFX_W_NUM_BITS 4 /* size of widget num field */
-#define IIO_IGFX_W_NUM_MASK ((1<<IIO_IGFX_W_NUM_BITS)-1)
-#define IIO_IGFX_W_NUM_SHIFT 0
-#define IIO_IGFX_PI_NUM_BITS 1 /* size of PI num field */
-#define IIO_IGFX_PI_NUM_MASK ((1<<IIO_IGFX_PI_NUM_BITS)-1)
-#define IIO_IGFX_PI_NUM_SHIFT 4
-#define IIO_IGFX_N_NUM_BITS 8 /* size of node num field */
-#define IIO_IGFX_N_NUM_MASK ((1<<IIO_IGFX_N_NUM_BITS)-1)
-#define IIO_IGFX_N_NUM_SHIFT 5
-#define IIO_IGFX_P_NUM_BITS 1 /* size of processor num field */
-#define IIO_IGFX_P_NUM_MASK ((1<<IIO_IGFX_P_NUM_BITS)-1)
-#define IIO_IGFX_P_NUM_SHIFT 16
-#define IIO_IGFX_INIT(widget, pi, node, cpu) (\
- (((widget) & IIO_IGFX_W_NUM_MASK) << IIO_IGFX_W_NUM_SHIFT) | \
- (((pi) & IIO_IGFX_PI_NUM_MASK)<< IIO_IGFX_PI_NUM_SHIFT)| \
- (((node) & IIO_IGFX_N_NUM_MASK) << IIO_IGFX_N_NUM_SHIFT) | \
- (((cpu) & IIO_IGFX_P_NUM_MASK) << IIO_IGFX_P_NUM_SHIFT))
-
-
-/* Scratch registers (all bits available) */
-#define IIO_SCRATCH_REG0 IIO_ISCR0
-#define IIO_SCRATCH_REG1 IIO_ISCR1
-#define IIO_SCRATCH_MASK 0xffffffffffffffffUL
-
-#define IIO_SCRATCH_BIT0_0 0x0000000000000001UL
-#define IIO_SCRATCH_BIT0_1 0x0000000000000002UL
-#define IIO_SCRATCH_BIT0_2 0x0000000000000004UL
-#define IIO_SCRATCH_BIT0_3 0x0000000000000008UL
-#define IIO_SCRATCH_BIT0_4 0x0000000000000010UL
-#define IIO_SCRATCH_BIT0_5 0x0000000000000020UL
-#define IIO_SCRATCH_BIT0_6 0x0000000000000040UL
-#define IIO_SCRATCH_BIT0_7 0x0000000000000080UL
-#define IIO_SCRATCH_BIT0_8 0x0000000000000100UL
-#define IIO_SCRATCH_BIT0_9 0x0000000000000200UL
-#define IIO_SCRATCH_BIT0_A 0x0000000000000400UL
-
-#define IIO_SCRATCH_BIT1_0 0x0000000000000001UL
-#define IIO_SCRATCH_BIT1_1 0x0000000000000002UL
-/* IO Translation Table Entries */
-#define IIO_NUM_ITTES 7 /* ITTEs numbered 0..6 */
- /* Hw manuals number them 1..7! */
-/*
- * IIO_IMEM Register fields.
- */
-#define IIO_IMEM_W0ESD 0x1UL /* Widget 0 shut down due to error */
-#define IIO_IMEM_B0ESD (1UL << 4) /* BTE 0 shut down due to error */
-#define IIO_IMEM_B1ESD (1UL << 8) /* BTE 1 Shut down due to error */
-
-/*
- * As a permanent workaround for a bug in the PI side of the shub, we've
- * redefined big window 7 as small window 0.
- XXX does this still apply for SN1??
- */
-#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1)
-
-/*
- * Use the top big window as a surrogate for the first small window
- */
-#define SWIN0_BIGWIN HUB_NUM_BIG_WINDOW
-
-#define ILCSR_WARM_RESET 0x100
-
-/*
- * CRB manipulation macros
- * The CRB macros are slightly complicated, since there are up to
- * four registers associated with each CRB entry.
- */
-#define IIO_NUM_CRBS 15 /* Number of CRBs */
-#define IIO_NUM_PC_CRBS 4 /* Number of partial cache CRBs */
-#define IIO_ICRB_OFFSET 8
-#define IIO_ICRB_0 IIO_ICRB0_A
-#define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */
-/* XXX - This is now tuneable:
- #define IIO_FIRST_PC_ENTRY 12
- */
-
-#define IIO_ICRB_A(_x) ((u64)(IIO_ICRB_0 + (6 * IIO_ICRB_OFFSET * (_x))))
-#define IIO_ICRB_B(_x) ((u64)((char *)IIO_ICRB_A(_x) + 1*IIO_ICRB_OFFSET))
-#define IIO_ICRB_C(_x) ((u64)((char *)IIO_ICRB_A(_x) + 2*IIO_ICRB_OFFSET))
-#define IIO_ICRB_D(_x) ((u64)((char *)IIO_ICRB_A(_x) + 3*IIO_ICRB_OFFSET))
-#define IIO_ICRB_E(_x) ((u64)((char *)IIO_ICRB_A(_x) + 4*IIO_ICRB_OFFSET))
-
-#define TNUM_TO_WIDGET_DEV(_tnum) (_tnum & 0x7)
-
-/*
- * values for "ecode" field
- */
-#define IIO_ICRB_ECODE_DERR 0 /* Directory error due to IIO access */
-#define IIO_ICRB_ECODE_PERR 1 /* Poison error on IO access */
-#define IIO_ICRB_ECODE_WERR 2 /* Write error by IIO access
- * e.g. WINV to a Read only line. */
-#define IIO_ICRB_ECODE_AERR 3 /* Access error caused by IIO access */
-#define IIO_ICRB_ECODE_PWERR 4 /* Error on partial write */
-#define IIO_ICRB_ECODE_PRERR 5 /* Error on partial read */
-#define IIO_ICRB_ECODE_TOUT 6 /* CRB timeout before deallocating */
-#define IIO_ICRB_ECODE_XTERR 7 /* Incoming xtalk pkt had error bit */
-
-/*
- * Values for field imsgtype
- */
-#define IIO_ICRB_IMSGT_XTALK 0 /* Incoming Meessage from Xtalk */
-#define IIO_ICRB_IMSGT_BTE 1 /* Incoming message from BTE */
-#define IIO_ICRB_IMSGT_SN1NET 2 /* Incoming message from SN1 net */
-#define IIO_ICRB_IMSGT_CRB 3 /* Incoming message from CRB ??? */
-
-/*
- * values for field initiator.
- */
-#define IIO_ICRB_INIT_XTALK 0 /* Message originated in xtalk */
-#define IIO_ICRB_INIT_BTE0 0x1 /* Message originated in BTE 0 */
-#define IIO_ICRB_INIT_SN1NET 0x2 /* Message originated in SN1net */
-#define IIO_ICRB_INIT_CRB 0x3 /* Message originated in CRB ? */
-#define IIO_ICRB_INIT_BTE1 0x5 /* MEssage originated in BTE 1 */
-
-/*
- * Number of credits Hub widget has while sending req/response to
- * xbow.
- * Value of 3 is required by Xbow 1.1
- * We may be able to increase this to 4 with Xbow 1.2.
- */
-#define HUBII_XBOW_CREDIT 3
-#define HUBII_XBOW_REV2_CREDIT 4
-
-/*
- * Number of credits that xtalk devices should use when communicating
- * with a SHub (depth of SHub's queue).
- */
-#define HUB_CREDIT 4
-
-/*
- * Some IIO_PRB fields
- */
-#define IIO_PRB_MULTI_ERR (1LL << 63)
-#define IIO_PRB_SPUR_RD (1LL << 51)
-#define IIO_PRB_SPUR_WR (1LL << 50)
-#define IIO_PRB_RD_TO (1LL << 49)
-#define IIO_PRB_ERROR (1LL << 48)
-
-/*************************************************************************
-
- Some of the IIO field masks and shifts are defined here.
- This is in order to maintain compatibility in SN0 and SN1 code
-
-**************************************************************************/
-
-/*
- * ICMR register fields
- * (Note: the IIO_ICMR_P_CNT and IIO_ICMR_PC_VLD from Hub are not
- * present in SHub)
- */
-
-#define IIO_ICMR_CRB_VLD_SHFT 20
-#define IIO_ICMR_CRB_VLD_MASK (0x7fffUL << IIO_ICMR_CRB_VLD_SHFT)
-
-#define IIO_ICMR_FC_CNT_SHFT 16
-#define IIO_ICMR_FC_CNT_MASK (0xf << IIO_ICMR_FC_CNT_SHFT)
-
-#define IIO_ICMR_C_CNT_SHFT 4
-#define IIO_ICMR_C_CNT_MASK (0xf << IIO_ICMR_C_CNT_SHFT)
-
-#define IIO_ICMR_PRECISE (1UL << 52)
-#define IIO_ICMR_CLR_RPPD (1UL << 13)
-#define IIO_ICMR_CLR_RQPD (1UL << 12)
-
-/*
- * IIO PIO Deallocation register field masks : (IIO_IPDR)
- XXX present but not needed in bedrock? See the manual.
- */
-#define IIO_IPDR_PND (1 << 4)
-
-/*
- * IIO CRB deallocation register field masks: (IIO_ICDR)
- */
-#define IIO_ICDR_PND (1 << 4)
-
-/*
- * IO BTE Length/Status (IIO_IBLS) register bit field definitions
- */
-#define IBLS_BUSY (0x1UL << 20)
-#define IBLS_ERROR_SHFT 16
-#define IBLS_ERROR (0x1UL << IBLS_ERROR_SHFT)
-#define IBLS_LENGTH_MASK 0xffff
-
-/*
- * IO BTE Control/Terminate register (IBCT) register bit field definitions
- */
-#define IBCT_POISON (0x1UL << 8)
-#define IBCT_NOTIFY (0x1UL << 4)
-#define IBCT_ZFIL_MODE (0x1UL << 0)
-
-/*
- * IIO Incoming Error Packet Header (IIO_IIEPH1/IIO_IIEPH2)
- */
-#define IIEPH1_VALID (1UL << 44)
-#define IIEPH1_OVERRUN (1UL << 40)
-#define IIEPH1_ERR_TYPE_SHFT 32
-#define IIEPH1_ERR_TYPE_MASK 0xf
-#define IIEPH1_SOURCE_SHFT 20
-#define IIEPH1_SOURCE_MASK 11
-#define IIEPH1_SUPPL_SHFT 8
-#define IIEPH1_SUPPL_MASK 11
-#define IIEPH1_CMD_SHFT 0
-#define IIEPH1_CMD_MASK 7
-
-#define IIEPH2_TAIL (1UL << 40)
-#define IIEPH2_ADDRESS_SHFT 0
-#define IIEPH2_ADDRESS_MASK 38
-
-#define IIEPH1_ERR_SHORT_REQ 2
-#define IIEPH1_ERR_SHORT_REPLY 3
-#define IIEPH1_ERR_LONG_REQ 4
-#define IIEPH1_ERR_LONG_REPLY 5
-
-/*
- * IO Error Clear register bit field definitions
- */
-#define IECLR_PI1_FWD_INT (1UL << 31) /* clear PI1_FORWARD_INT in iidsr */
-#define IECLR_PI0_FWD_INT (1UL << 30) /* clear PI0_FORWARD_INT in iidsr */
-#define IECLR_SPUR_RD_HDR (1UL << 29) /* clear valid bit in ixss reg */
-#define IECLR_BTE1 (1UL << 18) /* clear bte error 1 */
-#define IECLR_BTE0 (1UL << 17) /* clear bte error 0 */
-#define IECLR_CRAZY (1UL << 16) /* clear crazy bit in wstat reg */
-#define IECLR_PRB_F (1UL << 15) /* clear err bit in PRB_F reg */
-#define IECLR_PRB_E (1UL << 14) /* clear err bit in PRB_E reg */
-#define IECLR_PRB_D (1UL << 13) /* clear err bit in PRB_D reg */
-#define IECLR_PRB_C (1UL << 12) /* clear err bit in PRB_C reg */
-#define IECLR_PRB_B (1UL << 11) /* clear err bit in PRB_B reg */
-#define IECLR_PRB_A (1UL << 10) /* clear err bit in PRB_A reg */
-#define IECLR_PRB_9 (1UL << 9) /* clear err bit in PRB_9 reg */
-#define IECLR_PRB_8 (1UL << 8) /* clear err bit in PRB_8 reg */
-#define IECLR_PRB_0 (1UL << 0) /* clear err bit in PRB_0 reg */
-
-/*
- * IIO CRB control register Fields: IIO_ICCR
- */
-#define IIO_ICCR_PENDING (0x10000)
-#define IIO_ICCR_CMD_MASK (0xFF)
-#define IIO_ICCR_CMD_SHFT (7)
-#define IIO_ICCR_CMD_NOP (0x0) /* No Op */
-#define IIO_ICCR_CMD_WAKE (0x100) /* Reactivate CRB entry and process */
-#define IIO_ICCR_CMD_TIMEOUT (0x200) /* Make CRB timeout & mark invalid */
-#define IIO_ICCR_CMD_EJECT (0x400) /* Contents of entry written to memory
- * via a WB
- */
-#define IIO_ICCR_CMD_FLUSH (0x800)
-
-/*
- *
- * CRB Register description.
- *
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING * WARNING
- *
- * Many of the fields in CRB are status bits used by hardware
- * for implementation of the protocol. It's very dangerous to
- * mess around with the CRB registers.
- *
- * It's OK to read the CRB registers and try to make sense out of the
- * fields in CRB.
- *
- * Updating CRB requires all activities in Hub IIO to be quiesced.
- * otherwise, a write to CRB could corrupt other CRB entries.
- * CRBs are here only as a back door peek to shub IIO's status.
- * Quiescing implies no dmas no PIOs
- * either directly from the cpu or from sn0net.
- * this is not something that can be done easily. So, AVOID updating
- * CRBs.
- */
-
-#ifndef __ASSEMBLY__
-
-/*
- * Easy access macros for CRBs, all 5 registers (A-E)
- */
-typedef ii_icrb0_a_u_t icrba_t;
-#define a_sidn ii_icrb0_a_fld_s.ia_sidn
-#define a_tnum ii_icrb0_a_fld_s.ia_tnum
-#define a_addr ii_icrb0_a_fld_s.ia_addr
-#define a_valid ii_icrb0_a_fld_s.ia_vld
-#define a_iow ii_icrb0_a_fld_s.ia_iow
-#define a_regvalue ii_icrb0_a_regval
-
-typedef ii_icrb0_b_u_t icrbb_t;
-#define b_use_old ii_icrb0_b_fld_s.ib_use_old
-#define b_imsgtype ii_icrb0_b_fld_s.ib_imsgtype
-#define b_imsg ii_icrb0_b_fld_s.ib_imsg
-#define b_initiator ii_icrb0_b_fld_s.ib_init
-#define b_exc ii_icrb0_b_fld_s.ib_exc
-#define b_ackcnt ii_icrb0_b_fld_s.ib_ack_cnt
-#define b_resp ii_icrb0_b_fld_s.ib_resp
-#define b_ack ii_icrb0_b_fld_s.ib_ack
-#define b_hold ii_icrb0_b_fld_s.ib_hold
-#define b_wb ii_icrb0_b_fld_s.ib_wb
-#define b_intvn ii_icrb0_b_fld_s.ib_intvn
-#define b_stall_ib ii_icrb0_b_fld_s.ib_stall_ib
-#define b_stall_int ii_icrb0_b_fld_s.ib_stall__intr
-#define b_stall_bte_0 ii_icrb0_b_fld_s.ib_stall__bte_0
-#define b_stall_bte_1 ii_icrb0_b_fld_s.ib_stall__bte_1
-#define b_error ii_icrb0_b_fld_s.ib_error
-#define b_ecode ii_icrb0_b_fld_s.ib_errcode
-#define b_lnetuce ii_icrb0_b_fld_s.ib_ln_uce
-#define b_mark ii_icrb0_b_fld_s.ib_mark
-#define b_xerr ii_icrb0_b_fld_s.ib_xt_err
-#define b_regvalue ii_icrb0_b_regval
-
-typedef ii_icrb0_c_u_t icrbc_t;
-#define c_suppl ii_icrb0_c_fld_s.ic_suppl
-#define c_barrop ii_icrb0_c_fld_s.ic_bo
-#define c_doresp ii_icrb0_c_fld_s.ic_resprqd
-#define c_gbr ii_icrb0_c_fld_s.ic_gbr
-#define c_btenum ii_icrb0_c_fld_s.ic_bte_num
-#define c_cohtrans ii_icrb0_c_fld_s.ic_ct
-#define c_xtsize ii_icrb0_c_fld_s.ic_size
-#define c_source ii_icrb0_c_fld_s.ic_source
-#define c_regvalue ii_icrb0_c_regval
-
-
-typedef ii_icrb0_d_u_t icrbd_t;
-#define d_sleep ii_icrb0_d_fld_s.id_sleep
-#define d_pricnt ii_icrb0_d_fld_s.id_pr_cnt
-#define d_pripsc ii_icrb0_d_fld_s.id_pr_psc
-#define d_bteop ii_icrb0_d_fld_s.id_bte_op
-#define d_bteaddr ii_icrb0_d_fld_s.id_pa_be /* ic_pa_be fld has 2 names*/
-#define d_benable ii_icrb0_d_fld_s.id_pa_be /* ic_pa_be fld has 2 names*/
-#define d_regvalue ii_icrb0_d_regval
-
-typedef ii_icrb0_e_u_t icrbe_t;
-#define icrbe_ctxtvld ii_icrb0_e_fld_s.ie_cvld
-#define icrbe_toutvld ii_icrb0_e_fld_s.ie_tvld
-#define icrbe_context ii_icrb0_e_fld_s.ie_context
-#define icrbe_timeout ii_icrb0_e_fld_s.ie_timeout
-#define e_regvalue ii_icrb0_e_regval
-
-#endif /* __ASSEMBLY__ */
-
-/* Number of widgets supported by shub */
-#define HUB_NUM_WIDGET 9
-#define HUB_WIDGET_ID_MIN 0x8
-#define HUB_WIDGET_ID_MAX 0xf
-
-#define HUB_WIDGET_PART_NUM 0xc120
-#define MAX_HUBS_PER_XBOW 2
-
-#ifndef __ASSEMBLY__
-/* A few more #defines for backwards compatibility */
-#define iprb_t ii_iprb0_u_t
-#define iprb_regval ii_iprb0_regval
-#define iprb_mult_err ii_iprb0_fld_s.i_mult_err
-#define iprb_spur_rd ii_iprb0_fld_s.i_spur_rd
-#define iprb_spur_wr ii_iprb0_fld_s.i_spur_wr
-#define iprb_rd_to ii_iprb0_fld_s.i_rd_to
-#define iprb_ovflow ii_iprb0_fld_s.i_of_cnt
-#define iprb_error ii_iprb0_fld_s.i_error
-#define iprb_ff ii_iprb0_fld_s.i_f
-#define iprb_mode ii_iprb0_fld_s.i_m
-#define iprb_bnakctr ii_iprb0_fld_s.i_nb
-#define iprb_anakctr ii_iprb0_fld_s.i_na
-#define iprb_xtalkctr ii_iprb0_fld_s.i_c
-#endif
-
-#define LNK_STAT_WORKING 0x2 /* LLP is working */
-
-#define IIO_WSTAT_ECRAZY (1ULL << 32) /* Hub gone crazy */
-#define IIO_WSTAT_TXRETRY (1ULL << 9) /* Hub Tx Retry timeout */
-#define IIO_WSTAT_TXRETRY_MASK (0x7F) /* should be 0xFF?? */
-#define IIO_WSTAT_TXRETRY_SHFT (16)
-#define IIO_WSTAT_TXRETRY_CNT(w) (((w) >> IIO_WSTAT_TXRETRY_SHFT) & \
- IIO_WSTAT_TXRETRY_MASK)
-
-/* Number of II perf. counters we can multiplex at once */
-
-#define IO_PERF_SETS 32
-
-#ifdef __KERNEL__
-#include <asm/sn/dmamap.h>
-#include <asm/sn/driver.h>
-#include <asm/sn/xtalk/xtalk.h>
-
-/* Bit for the widget in inbound access register */
-#define IIO_IIWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
-/* Bit for the widget in outbound access register */
-#define IIO_IOWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
-
-/* NOTE: The following define assumes that we are going to get
- * widget numbers from 8 thru F and the device numbers within
- * widget from 0 thru 7.
- */
-#define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((uint64_t)(1ULL << (8 * ((w) - 8) + (d))))
-
-/* IO Interrupt Destination Register */
-#define IIO_IIDSR_SENT_SHIFT 28
-#define IIO_IIDSR_SENT_MASK 0x30000000
-#define IIO_IIDSR_ENB_SHIFT 24
-#define IIO_IIDSR_ENB_MASK 0x01000000
-#define IIO_IIDSR_NODE_SHIFT 9
-#define IIO_IIDSR_NODE_MASK 0x000ff700
-#define IIO_IIDSR_PI_ID_SHIFT 8
-#define IIO_IIDSR_PI_ID_MASK 0x00000100
-#define IIO_IIDSR_LVL_SHIFT 0
-#define IIO_IIDSR_LVL_MASK 0x000000ff
-
-/* Xtalk timeout threshhold register (IIO_IXTT) */
-#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */
-#define IXTT_RRSP_TO_MASK (0x1FULL << IXTT_RRSP_TO_SHFT)
-#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */
-#define IXTT_RRSP_PS_MASK (0x7FFFFFULL << IXTT_RRSP_PS_SHFT)
-#define IXTT_TAIL_TO_SHFT 0 /* tail timeout counter threshold */
-#define IXTT_TAIL_TO_MASK (0x3FFFFFFULL << IXTT_TAIL_TO_SHFT)
-
-/*
- * The IO LLP control status register and widget control register
- */
-
-typedef union hubii_wcr_u {
- uint64_t wcr_reg_value;
- struct {
- uint64_t wcr_widget_id: 4, /* LLP crossbar credit */
- wcr_tag_mode: 1, /* Tag mode */
- wcr_rsvd1: 8, /* Reserved */
- wcr_xbar_crd: 3, /* LLP crossbar credit */
- wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */
- wcr_dir_con: 1, /* widget direct connect */
- wcr_e_thresh: 5, /* elasticity threshold */
- wcr_rsvd: 41; /* unused */
- } wcr_fields_s;
-} hubii_wcr_t;
-
-#define iwcr_dir_con wcr_fields_s.wcr_dir_con
-
-/* The structures below are defined to extract and modify the ii
-performance registers */
-
-/* io_perf_sel allows the caller to specify what tests will be
- performed */
-
-typedef union io_perf_sel {
- uint64_t perf_sel_reg;
- struct {
- uint64_t perf_ippr0 : 4,
- perf_ippr1 : 4,
- perf_icct : 8,
- perf_rsvd : 48;
- } perf_sel_bits;
-} io_perf_sel_t;
-
-/* io_perf_cnt is to extract the count from the shub registers. Due to
- hardware problems there is only one counter, not two. */
-
-typedef union io_perf_cnt {
- uint64_t perf_cnt;
- struct {
- uint64_t perf_cnt : 20,
- perf_rsvd2 : 12,
- perf_rsvd1 : 32;
- } perf_cnt_bits;
-
-} io_perf_cnt_t;
-
-typedef union iprte_a {
- shubreg_t entry;
- struct {
- shubreg_t i_rsvd_1 : 3;
- shubreg_t i_addr : 38;
- shubreg_t i_init : 3;
- shubreg_t i_source : 8;
- shubreg_t i_rsvd : 2;
- shubreg_t i_widget : 4;
- shubreg_t i_to_cnt : 5;
- shubreg_t i_vld : 1;
- } iprte_fields;
-} iprte_a_t;
-
-
-/* PIO MANAGEMENT */
-typedef struct hub_piomap_s *hub_piomap_t;
-
-extern hub_piomap_t
-hub_piomap_alloc(vertex_hdl_t dev, /* set up mapping for this device */
- device_desc_t dev_desc, /* device descriptor */
- iopaddr_t xtalk_addr, /* map for this xtalk_addr range */
- size_t byte_count,
- size_t byte_count_max, /* maximum size of a mapping */
- unsigned flags); /* defined in sys/pio.h */
-
-extern void hub_piomap_free(hub_piomap_t hub_piomap);
-
-extern caddr_t
-hub_piomap_addr(hub_piomap_t hub_piomap, /* mapping resources */
- iopaddr_t xtalk_addr, /* map for this xtalk addr */
- size_t byte_count); /* map this many bytes */
-
-extern void
-hub_piomap_done(hub_piomap_t hub_piomap);
-
-extern caddr_t
-hub_piotrans_addr( vertex_hdl_t dev, /* translate to this device */
- device_desc_t dev_desc, /* device descriptor */
- iopaddr_t xtalk_addr, /* Crosstalk address */
- size_t byte_count, /* map this many bytes */
- unsigned flags); /* (currently unused) */
-
-/* DMA MANAGEMENT */
-typedef struct hub_dmamap_s *hub_dmamap_t;
-
-extern hub_dmamap_t
-hub_dmamap_alloc( vertex_hdl_t dev, /* set up mappings for dev */
- device_desc_t dev_desc, /* device descriptor */
- size_t byte_count_max, /* max size of a mapping */
- unsigned flags); /* defined in dma.h */
-
-extern void
-hub_dmamap_free(hub_dmamap_t dmamap);
-
-extern iopaddr_t
-hub_dmamap_addr( hub_dmamap_t dmamap, /* use mapping resources */
- paddr_t paddr, /* map for this address */
- size_t byte_count); /* map this many bytes */
-
-extern void
-hub_dmamap_done( hub_dmamap_t dmamap); /* done w/ mapping resources */
-
-extern iopaddr_t
-hub_dmatrans_addr( vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- paddr_t paddr, /* system physical address */
- size_t byte_count, /* length */
- unsigned flags); /* defined in dma.h */
-
-extern void
-hub_dmamap_drain( hub_dmamap_t map);
-
-extern void
-hub_dmaaddr_drain( vertex_hdl_t vhdl,
- paddr_t addr,
- size_t bytes);
-
-
-/* INTERRUPT MANAGEMENT */
-typedef struct hub_intr_s *hub_intr_t;
-
-extern hub_intr_t
-hub_intr_alloc( vertex_hdl_t dev, /* which device */
- device_desc_t dev_desc, /* device descriptor */
- vertex_hdl_t owner_dev); /* owner of this interrupt */
-
-extern hub_intr_t
-hub_intr_alloc_nothd(vertex_hdl_t dev, /* which device */
- device_desc_t dev_desc, /* device descriptor */
- vertex_hdl_t owner_dev); /* owner of this interrupt */
-
-extern void
-hub_intr_free(hub_intr_t intr_hdl);
-
-extern int
-hub_intr_connect( hub_intr_t intr_hdl, /* xtalk intr resource hndl */
- intr_func_t intr_func, /* xtalk intr handler */
- void *intr_arg, /* arg to intr handler */
- xtalk_intr_setfunc_t setfunc, /* func to set intr hw */
- void *setfunc_arg); /* arg to setfunc */
-
-extern void
-hub_intr_disconnect(hub_intr_t intr_hdl);
-
-
-/* CONFIGURATION MANAGEMENT */
-
-extern void
-hub_provider_startup(vertex_hdl_t hub);
-
-extern void
-hub_provider_shutdown(vertex_hdl_t hub);
-
-#define HUB_PIO_CONVEYOR 0x1 /* PIO in conveyor belt mode */
-#define HUB_PIO_FIRE_N_FORGET 0x2 /* PIO in fire-and-forget mode */
-
-/* Flags that make sense to hub_widget_flags_set */
-#define HUB_WIDGET_FLAGS ( \
- HUB_PIO_CONVEYOR | \
- HUB_PIO_FIRE_N_FORGET \
- )
-
-
-typedef int hub_widget_flags_t;
-
-/* Set the PIO mode for a widget. */
-extern int hub_widget_flags_set(nasid_t nasid,
- xwidgetnum_t widget_num,
- hub_widget_flags_t flags);
-
-/* Error Handling. */
-extern int hub_ioerror_handler(vertex_hdl_t, int, int, struct io_error_s *);
-extern int kl_ioerror_handler(cnodeid_t, cnodeid_t, cpuid_t,
- int, paddr_t, caddr_t, ioerror_mode_t);
-#endif /* _KERNEL */
-#endif /* _ASM_IA64_SN_SN2_SHUBIO_H */
-
+++ /dev/null
-/*
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1992-1997,2001-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_IA64_SN_SN2_SLOTNUM_H
-#define _ASM_IA64_SN_SN2_SLOTNUM_H
-
-#define SLOTNUM_MAXLENGTH 16
-
-/*
- * This file defines IO widget to slot/device assignments.
- */
-
-
-/* This determines module to pnode mapping. */
-
-#define NODESLOTS_PER_MODULE 1
-#define NODESLOTS_PER_MODULE_SHFT 1
-
-#define SLOTNUM_NODE_CLASS 0x00 /* Node */
-#define SLOTNUM_ROUTER_CLASS 0x10 /* Router */
-#define SLOTNUM_XTALK_CLASS 0x20 /* Xtalk */
-#define SLOTNUM_MIDPLANE_CLASS 0x30 /* Midplane */
-#define SLOTNUM_XBOW_CLASS 0x40 /* Xbow */
-#define SLOTNUM_KNODE_CLASS 0x50 /* Kego node */
-#define SLOTNUM_PCI_CLASS 0x60 /* PCI widgets on XBridge */
-#define SLOTNUM_INVALID_CLASS 0xf0 /* Invalid */
-
-#define SLOTNUM_CLASS_MASK 0xf0
-#define SLOTNUM_SLOT_MASK 0x0f
-
-#define SLOTNUM_GETCLASS(_sn) ((_sn) & SLOTNUM_CLASS_MASK)
-#define SLOTNUM_GETSLOT(_sn) ((_sn) & SLOTNUM_SLOT_MASK)
-
-
-#endif /* _ASM_IA64_SN_SN2_SLOTNUM_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_SN2_SN_PRIVATE_H
-#define _ASM_IA64_SN_SN2_SN_PRIVATE_H
-
-#include <linux/wait.h>
-#include <asm/sn/nodepda.h>
-#include <asm/sn/io.h>
-#include <asm/sn/iograph.h>
-#include <asm/sn/xtalk/xwidget.h>
-#include <asm/sn/xtalk/xtalk_private.h>
-
-extern nasid_t master_nasid;
-
-/* promif.c */
-extern void he_arcs_set_vectors(void);
-extern void mem_init(void);
-extern void cpu_unenable(cpuid_t);
-extern nasid_t get_lowest_nasid(void);
-extern unsigned long get_master_bridge_base(void);
-extern int check_nasid_equiv(nasid_t, nasid_t);
-extern char get_console_pcislot(void);
-
-extern int is_master_baseio_nasid_widget(nasid_t test_nasid,
- xwidgetnum_t test_wid);
-
-/* memsupport.c */
-extern void poison_state_alter_range(unsigned long start, int len, int poison);
-extern int memory_present(paddr_t);
-extern int memory_read_accessible(paddr_t);
-extern int memory_write_accessible(paddr_t);
-extern void memory_set_access(paddr_t, int, int);
-extern void show_dir_state(paddr_t, void (*)(char *, ...));
-extern void check_dir_state(nasid_t, int, void (*)(char *, ...));
-extern void set_dir_owner(paddr_t, int);
-extern void set_dir_state(paddr_t, int);
-extern void set_dir_state_POISONED(paddr_t);
-extern void set_dir_state_UNOWNED(paddr_t);
-extern int is_POISONED_dir_state(paddr_t);
-extern int is_UNOWNED_dir_state(paddr_t);
-#ifdef LATER
-extern void get_dir_ent(paddr_t paddr, int *state,
- uint64_t * vec_ptr, hubreg_t * elo);
-#endif
-
-/* intr.c */
-extern void intr_unreserve_level(cpuid_t cpu, int level);
-extern int intr_connect_level(cpuid_t cpu, int bit);
-extern int intr_disconnect_level(cpuid_t cpu, int bit);
-extern cpuid_t intr_heuristic(vertex_hdl_t dev, int req_bit, int *resp_bit);
-extern void intr_block_bit(cpuid_t cpu, int bit);
-extern void intr_unblock_bit(cpuid_t cpu, int bit);
-extern void setrtvector(intr_func_t);
-extern void install_cpuintr(cpuid_t cpu);
-extern void install_dbgintr(cpuid_t cpu);
-extern void install_tlbintr(cpuid_t cpu);
-extern void hub_migrintr_init(cnodeid_t /*cnode */ );
-extern int cause_intr_connect(int level, intr_func_t handler,
- unsigned int intr_spl_mask);
-extern int cause_intr_disconnect(int level);
-extern void intr_dumpvec(cnodeid_t cnode, void (*pf) (char *, ...));
-
-/* error_dump.c */
-extern char *hub_rrb_err_type[];
-extern char *hub_wrb_err_type[];
-
-void nmi_dump(void);
-void install_cpu_nmi_handler(int slice);
-
-/* klclock.c */
-extern void hub_rtc_init(cnodeid_t);
-
-/* bte.c */
-void bte_lateinit(void);
-void bte_wait_for_xfer_completion(void *);
-
-/* klgraph.c */
-void klhwg_add_all_nodes(vertex_hdl_t);
-void klhwg_add_all_modules(vertex_hdl_t);
-
-/* klidbg.c */
-void install_klidbg_functions(void);
-
-/* klnuma.c */
-extern void replicate_kernel_text(int numnodes);
-extern unsigned long get_freemem_start(cnodeid_t cnode);
-extern void setup_replication_mask(int maxnodes);
-
-/* init.c */
-extern cnodeid_t get_compact_nodeid(void); /* get compact node id */
-extern void init_platform_nodepda(nodepda_t * npda, cnodeid_t node);
-extern int is_fine_dirmode(void);
-extern void update_node_information(cnodeid_t);
-
-/* shubio.c */
-extern void hubio_init(void);
-extern void hub_merge_clean(nasid_t nasid);
-extern void hub_set_piomode(nasid_t nasid, int conveyor);
-
-/* shuberror.c */
-extern void hub_error_init(cnodeid_t);
-extern void dump_error_spool(cpuid_t cpu, void (*pf) (char *, ...));
-extern void hubni_error_handler(char *, int);
-extern int check_ni_errors(void);
-
-/* Used for debugger to signal upper software a breakpoint has taken place */
-
-extern void *debugger_update;
-extern unsigned long debugger_stopped;
-
-/*
- * piomap, created by shub_pio_alloc.
- * xtalk_info MUST BE FIRST, since this structure is cast to a
- * xtalk_piomap_s by generic xtalk routines.
- */
-struct hub_piomap_s {
- struct xtalk_piomap_s hpio_xtalk_info; /* standard crosstalk pio info */
- vertex_hdl_t hpio_hub; /* which shub's mapping registers are set up */
- short hpio_holdcnt; /* count of current users of bigwin mapping */
- char hpio_bigwin_num; /* if big window map, which one */
- int hpio_flags; /* defined below */
-};
-/* hub_piomap flags */
-#define HUB_PIOMAP_IS_VALID 0x1
-#define HUB_PIOMAP_IS_BIGWINDOW 0x2
-#define HUB_PIOMAP_IS_FIXED 0x4
-
-#define hub_piomap_xt_piomap(hp) (&hp->hpio_xtalk_info)
-#define hub_piomap_hub_v(hp) (hp->hpio_hub)
-#define hub_piomap_winnum(hp) (hp->hpio_bigwin_num)
-
-/*
- * dmamap, created by shub_pio_alloc.
- * xtalk_info MUST BE FIRST, since this structure is cast to a
- * xtalk_dmamap_s by generic xtalk routines.
- */
-struct hub_dmamap_s {
- struct xtalk_dmamap_s hdma_xtalk_info; /* standard crosstalk dma info */
- vertex_hdl_t hdma_hub; /* which shub we go through */
- int hdma_flags; /* defined below */
-};
-/* shub_dmamap flags */
-#define HUB_DMAMAP_IS_VALID 0x1
-#define HUB_DMAMAP_USED 0x2
-#define HUB_DMAMAP_IS_FIXED 0x4
-
-/*
- * interrupt handle, created by shub_intr_alloc.
- * xtalk_info MUST BE FIRST, since this structure is cast to a
- * xtalk_intr_s by generic xtalk routines.
- */
-struct hub_intr_s {
- struct xtalk_intr_s i_xtalk_info; /* standard crosstalk intr info */
- cpuid_t i_cpuid; /* which cpu */
- int i_bit; /* which bit */
- int i_flags;
-};
-/* flag values */
-#define HUB_INTR_IS_ALLOCED 0x1 /* for debug: allocated */
-#define HUB_INTR_IS_CONNECTED 0x4 /* for debug: connected to a software driver */
-
-typedef struct hubinfo_s {
- nodepda_t *h_nodepda; /* pointer to node's private data area */
- cnodeid_t h_cnodeid; /* compact nodeid */
- nasid_t h_nasid; /* nasid */
-
- /* structures for PIO management */
- xwidgetnum_t h_widgetid; /* my widget # (as viewed from xbow) */
- struct hub_piomap_s h_small_window_piomap[HUB_WIDGET_ID_MAX + 1];
- wait_queue_head_t h_bwwait; /* wait for big window to free */
- spinlock_t h_bwlock; /* guard big window piomap's */
- spinlock_t h_crblock; /* gaurd CRB error handling */
- int h_num_big_window_fixed; /* count number of FIXED maps */
- struct hub_piomap_s h_big_window_piomap[HUB_NUM_BIG_WINDOW];
- hub_intr_t hub_ii_errintr;
-} *hubinfo_t;
-
-#define hubinfo_get(vhdl, infoptr) ((void)hwgraph_info_get_LBL \
- (vhdl, INFO_LBL_NODE_INFO, (arbitrary_info_t *)infoptr))
-
-#define hubinfo_set(vhdl, infoptr) (void)hwgraph_info_add_LBL \
- (vhdl, INFO_LBL_NODE_INFO, (arbitrary_info_t)infoptr)
-
-#define hubinfo_to_hubv(hinfo, hub_v) (hinfo->h_nodepda->node_vertex)
-
-/*
- * Hub info PIO map access functions.
- */
-#define hubinfo_bwin_piomap_get(hinfo, win) \
- (&hinfo->h_big_window_piomap[win])
-#define hubinfo_swin_piomap_get(hinfo, win) \
- (&hinfo->h_small_window_piomap[win])
-
-/* cpu-specific information stored under INFO_LBL_CPU_INFO */
-typedef struct cpuinfo_s {
- cpuid_t ci_cpuid; /* CPU ID */
-} *cpuinfo_t;
-
-#define cpuinfo_get(vhdl, infoptr) ((void)hwgraph_info_get_LBL \
- (vhdl, INFO_LBL_CPU_INFO, (arbitrary_info_t *)infoptr))
-
-#define cpuinfo_set(vhdl, infoptr) (void)hwgraph_info_add_LBL \
- (vhdl, INFO_LBL_CPU_INFO, (arbitrary_info_t)infoptr)
-
-/* Special initialization function for xswitch vertices created during startup. */
-extern void xswitch_vertex_init(vertex_hdl_t xswitch);
-
-extern xtalk_provider_t hub_provider;
-extern int numionodes;
-
-/* du.c */
-int ducons_write(char *buf, int len);
-
-/* memerror.c */
-
-extern void install_eccintr(cpuid_t cpu);
-extern void memerror_get_stats(cnodeid_t cnode,
- int *bank_stats, int *bank_stats_max);
-extern void probe_md_errors(nasid_t);
-/* sysctlr.c */
-extern void sysctlr_init(void);
-extern void sysctlr_power_off(int sdonly);
-extern void sysctlr_keepalive(void);
-
-#define valid_cpuid(_x) (((_x) >= 0) && ((_x) < maxcpus))
-
-/* Useful definitions to get the memory dimm given a physical
- * address.
- */
-#define paddr_dimm(_pa) ((_pa & MD_BANK_MASK) >> MD_BANK_SHFT)
-#define paddr_cnode(_pa) (nasid_to_cnodeid(NASID_GET(_pa)))
-extern void membank_pathname_get(paddr_t, char *);
-
-extern void crbx(nasid_t nasid, void (*pf) (char *, ...));
-void bootstrap(void);
-
-/* sndrv.c */
-extern int sndrv_attach(vertex_hdl_t vertex);
-
-#endif /* _ASM_IA64_SN_SN2_SN_PRIVATE_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_SN_PRIVATE_H
-#define _ASM_IA64_SN_SN_PRIVATE_H
-
-#include <asm/sn/sn2/sn_private.h>
-
-#endif /* _ASM_IA64_SN_SN_PRIVATE_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_VECTOR_H
-#define _ASM_IA64_SN_VECTOR_H
-
-#define NET_VEC_NULL ((net_vec_t) 0)
-#define NET_VEC_BAD ((net_vec_t) -1)
-
-#define VEC_POLLS_W 128 /* Polls before write times out */
-#define VEC_POLLS_R 128 /* Polls before read times out */
-#define VEC_POLLS_X 128 /* Polls before exch times out */
-
-#define VEC_RETRIES_W 8 /* Retries before write fails */
-#define VEC_RETRIES_R 8 /* Retries before read fails */
-#define VEC_RETRIES_X 4 /* Retries before exch fails */
-
-#define NET_ERROR_NONE 0 /* No error */
-#define NET_ERROR_HARDWARE (-1) /* Hardware error */
-#define NET_ERROR_OVERRUN (-2) /* Extra response(s) */
-#define NET_ERROR_REPLY (-3) /* Reply parms mismatch */
-#define NET_ERROR_ADDRESS (-4) /* Addr error response */
-#define NET_ERROR_COMMAND (-5) /* Cmd error response */
-#define NET_ERROR_PROT (-6) /* Prot error response */
-#define NET_ERROR_TIMEOUT (-7) /* Too many retries */
-#define NET_ERROR_VECTOR (-8) /* Invalid vector/path */
-#define NET_ERROR_ROUTERLOCK (-9) /* Timeout locking rtr */
-#define NET_ERROR_INVAL (-10) /* Invalid vector request */
-
-#ifndef __ASSEMBLY__
-#include <linux/types.h>
-#include <asm/sn/types.h>
-
-typedef uint64_t net_reg_t;
-typedef uint64_t net_vec_t;
-
-int vector_write(net_vec_t dest,
- int write_id, int address,
- uint64_t value);
-
-int vector_read(net_vec_t dest,
- int write_id, int address,
- uint64_t *value);
-
-int vector_write_node(net_vec_t dest, nasid_t nasid,
- int write_id, int address,
- uint64_t value);
-
-int vector_read_node(net_vec_t dest, nasid_t nasid,
- int write_id, int address,
- uint64_t *value);
-
-int vector_length(net_vec_t vec);
-net_vec_t vector_get(net_vec_t vec, int n);
-net_vec_t vector_prefix(net_vec_t vec, int n);
-net_vec_t vector_modify(net_vec_t entry, int n, int route);
-net_vec_t vector_reverse(net_vec_t vec);
-net_vec_t vector_concat(net_vec_t vec1, net_vec_t vec2);
-
-char *net_errmsg(int);
-
-#ifndef _STANDALONE
-int hub_vector_write(cnodeid_t cnode, net_vec_t vector, int writeid,
- int addr, net_reg_t value);
-int hub_vector_read(cnodeid_t cnode, net_vec_t vector, int writeid,
- int addr, net_reg_t *value);
-#endif
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* _ASM_IA64_SN_VECTOR_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-#ifndef _ASM_IA64_SN_XTALK_XBOW_H
-#define _ASM_IA64_SN_XTALK_XBOW_H
-
-/*
- * xbow.h - header file for crossbow chip and xbow section of xbridge
- */
-
-#include <asm/types.h>
-#include <asm/sn/xtalk/xtalk.h>
-#include <asm/sn/xtalk/xwidget.h>
-#include <asm/sn/xtalk/xswitch.h>
-#ifndef __ASSEMBLY__
-#include <asm/sn/xtalk/xbow_info.h>
-#endif
-
-
-#define XBOW_DRV_PREFIX "xbow_"
-
-/* The crossbow chip supports 8 8/16 bits I/O ports, numbered 0x8 through 0xf.
- * It also implements the widget 0 address space and register set.
- */
-#define XBOW_PORT_0 0x0
-#define XBOW_PORT_8 0x8
-#define XBOW_PORT_9 0x9
-#define XBOW_PORT_A 0xa
-#define XBOW_PORT_B 0xb
-#define XBOW_PORT_C 0xc
-#define XBOW_PORT_D 0xd
-#define XBOW_PORT_E 0xe
-#define XBOW_PORT_F 0xf
-
-#define MAX_XBOW_PORTS 8 /* number of ports on xbow chip */
-#define BASE_XBOW_PORT XBOW_PORT_8 /* Lowest external port */
-#define MAX_PORT_NUM 0x10 /* maximum port number + 1 */
-#define XBOW_WIDGET_ID 0 /* xbow is itself widget 0 */
-
-#define XBOW_HUBLINK_LOW 0xa
-#define XBOW_HUBLINK_HIGH 0xb
-
-#define XBOW_PEER_LINK(link) (link == XBOW_HUBLINK_LOW) ? \
- XBOW_HUBLINK_HIGH : XBOW_HUBLINK_LOW
-
-
-#define XBOW_CREDIT 4
-
-#define MAX_XBOW_NAME 16
-
-#ifndef __ASSEMBLY__
-typedef uint32_t xbowreg_t;
-
-/* Register set for each xbow link */
-typedef volatile struct xb_linkregs_s {
-/*
- * we access these through synergy unswizzled space, so the address
- * gets twiddled (i.e. references to 0x4 actually go to 0x0 and vv.)
- * That's why we put the register first and filler second.
- */
- xbowreg_t link_ibf;
- xbowreg_t filler0; /* filler for proper alignment */
- xbowreg_t link_control;
- xbowreg_t filler1;
- xbowreg_t link_status;
- xbowreg_t filler2;
- xbowreg_t link_arb_upper;
- xbowreg_t filler3;
- xbowreg_t link_arb_lower;
- xbowreg_t filler4;
- xbowreg_t link_status_clr;
- xbowreg_t filler5;
- xbowreg_t link_reset;
- xbowreg_t filler6;
- xbowreg_t link_aux_status;
- xbowreg_t filler7;
-} xb_linkregs_t;
-
-typedef volatile struct xbow_s {
- /* standard widget configuration 0x000000-0x000057 */
- widget_cfg_t xb_widget; /* 0x000000 */
-
- /* helper fieldnames for accessing bridge widget */
-
-#define xb_wid_id xb_widget.w_id
-#define xb_wid_stat xb_widget.w_status
-#define xb_wid_err_upper xb_widget.w_err_upper_addr
-#define xb_wid_err_lower xb_widget.w_err_lower_addr
-#define xb_wid_control xb_widget.w_control
-#define xb_wid_req_timeout xb_widget.w_req_timeout
-#define xb_wid_int_upper xb_widget.w_intdest_upper_addr
-#define xb_wid_int_lower xb_widget.w_intdest_lower_addr
-#define xb_wid_err_cmdword xb_widget.w_err_cmd_word
-#define xb_wid_llp xb_widget.w_llp_cfg
-#define xb_wid_stat_clr xb_widget.w_tflush
-
-/*
- * we access these through synergy unswizzled space, so the address
- * gets twiddled (i.e. references to 0x4 actually go to 0x0 and vv.)
- * That's why we put the register first and filler second.
- */
- /* xbow-specific widget configuration 0x000058-0x0000FF */
- xbowreg_t xb_wid_arb_reload; /* 0x00005C */
- xbowreg_t _pad_000058;
- xbowreg_t xb_perf_ctr_a; /* 0x000064 */
- xbowreg_t _pad_000060;
- xbowreg_t xb_perf_ctr_b; /* 0x00006c */
- xbowreg_t _pad_000068;
- xbowreg_t xb_nic; /* 0x000074 */
- xbowreg_t _pad_000070;
-
- /* Xbridge only */
- xbowreg_t xb_w0_rst_fnc; /* 0x00007C */
- xbowreg_t _pad_000078;
- xbowreg_t xb_l8_rst_fnc; /* 0x000084 */
- xbowreg_t _pad_000080;
- xbowreg_t xb_l9_rst_fnc; /* 0x00008c */
- xbowreg_t _pad_000088;
- xbowreg_t xb_la_rst_fnc; /* 0x000094 */
- xbowreg_t _pad_000090;
- xbowreg_t xb_lb_rst_fnc; /* 0x00009c */
- xbowreg_t _pad_000098;
- xbowreg_t xb_lc_rst_fnc; /* 0x0000a4 */
- xbowreg_t _pad_0000a0;
- xbowreg_t xb_ld_rst_fnc; /* 0x0000ac */
- xbowreg_t _pad_0000a8;
- xbowreg_t xb_le_rst_fnc; /* 0x0000b4 */
- xbowreg_t _pad_0000b0;
- xbowreg_t xb_lf_rst_fnc; /* 0x0000bc */
- xbowreg_t _pad_0000b8;
- xbowreg_t xb_lock; /* 0x0000c4 */
- xbowreg_t _pad_0000c0;
- xbowreg_t xb_lock_clr; /* 0x0000cc */
- xbowreg_t _pad_0000c8;
- /* end of Xbridge only */
- xbowreg_t _pad_0000d0[12];
-
- /* Link Specific Registers, port 8..15 0x000100-0x000300 */
- xb_linkregs_t xb_link_raw[MAX_XBOW_PORTS];
-#define xb_link(p) xb_link_raw[(p) & (MAX_XBOW_PORTS - 1)]
-
-} xbow_t;
-
-/* Configuration structure which describes each xbow link */
-typedef struct xbow_cfg_s {
- int xb_port; /* port number (0-15) */
- int xb_flags; /* port software flags */
- short xb_shift; /* shift for arb reg (mask is 0xff) */
- short xb_ul; /* upper or lower arb reg */
- int xb_pad; /* use this later (pad to ptr align) */
- xb_linkregs_t *xb_linkregs; /* pointer to link registers */
- widget_cfg_t *xb_widget; /* pointer to widget registers */
- char xb_name[MAX_XBOW_NAME]; /* port name */
- xbowreg_t xb_sh_arb_upper; /* shadow upper arb register */
- xbowreg_t xb_sh_arb_lower; /* shadow lower arb register */
-} xbow_cfg_t;
-
-#define XB_FLAGS_EXISTS 0x1 /* device exists */
-#define XB_FLAGS_MASTER 0x2
-#define XB_FLAGS_SLAVE 0x0
-#define XB_FLAGS_GBR 0x4
-#define XB_FLAGS_16BIT 0x8
-#define XB_FLAGS_8BIT 0x0
-
-/* get xbow config information for port p */
-#define XB_CONFIG(p) xbow_cfg[xb_ports[p]]
-
-/* is widget port number valid? (based on version 7.0 of xbow spec) */
-#define XBOW_WIDGET_IS_VALID(wid) ((wid) >= XBOW_PORT_8 && (wid) <= XBOW_PORT_F)
-
-/* whether to use upper or lower arbitration register, given source widget id */
-#define XBOW_ARB_IS_UPPER(wid) ((wid) >= XBOW_PORT_8 && (wid) <= XBOW_PORT_B)
-#define XBOW_ARB_IS_LOWER(wid) ((wid) >= XBOW_PORT_C && (wid) <= XBOW_PORT_F)
-
-/* offset of arbitration register, given source widget id */
-#define XBOW_ARB_OFF(wid) (XBOW_ARB_IS_UPPER(wid) ? 0x1c : 0x24)
-
-#endif /* __ASSEMBLY__ */
-
-#define XBOW_WID_ID WIDGET_ID
-#define XBOW_WID_STAT WIDGET_STATUS
-#define XBOW_WID_ERR_UPPER WIDGET_ERR_UPPER_ADDR
-#define XBOW_WID_ERR_LOWER WIDGET_ERR_LOWER_ADDR
-#define XBOW_WID_CONTROL WIDGET_CONTROL
-#define XBOW_WID_REQ_TO WIDGET_REQ_TIMEOUT
-#define XBOW_WID_INT_UPPER WIDGET_INTDEST_UPPER_ADDR
-#define XBOW_WID_INT_LOWER WIDGET_INTDEST_LOWER_ADDR
-#define XBOW_WID_ERR_CMDWORD WIDGET_ERR_CMD_WORD
-#define XBOW_WID_LLP WIDGET_LLP_CFG
-#define XBOW_WID_STAT_CLR WIDGET_TFLUSH
-#define XBOW_WID_ARB_RELOAD 0x5c
-#define XBOW_WID_PERF_CTR_A 0x64
-#define XBOW_WID_PERF_CTR_B 0x6c
-#define XBOW_WID_NIC 0x74
-
-/* Xbridge only */
-#define XBOW_W0_RST_FNC 0x00007C
-#define XBOW_L8_RST_FNC 0x000084
-#define XBOW_L9_RST_FNC 0x00008c
-#define XBOW_LA_RST_FNC 0x000094
-#define XBOW_LB_RST_FNC 0x00009c
-#define XBOW_LC_RST_FNC 0x0000a4
-#define XBOW_LD_RST_FNC 0x0000ac
-#define XBOW_LE_RST_FNC 0x0000b4
-#define XBOW_LF_RST_FNC 0x0000bc
-#define XBOW_RESET_FENCE(x) ((x) > 7 && (x) < 16) ? \
- (XBOW_W0_RST_FNC + ((x) - 7) * 8) : \
- ((x) == 0) ? XBOW_W0_RST_FNC : 0
-#define XBOW_LOCK 0x0000c4
-#define XBOW_LOCK_CLR 0x0000cc
-/* End of Xbridge only */
-
-/* used only in ide, but defined here within the reserved portion */
-/* of the widget0 address space (before 0xf4) */
-#define XBOW_WID_UNDEF 0xe4
-
-/* xbow link register set base, legal value for x is 0x8..0xf */
-#define XB_LINK_BASE 0x100
-#define XB_LINK_OFFSET 0x40
-#define XB_LINK_REG_BASE(x) (XB_LINK_BASE + ((x) & (MAX_XBOW_PORTS - 1)) * XB_LINK_OFFSET)
-
-#define XB_LINK_IBUF_FLUSH(x) (XB_LINK_REG_BASE(x) + 0x4)
-#define XB_LINK_CTRL(x) (XB_LINK_REG_BASE(x) + 0xc)
-#define XB_LINK_STATUS(x) (XB_LINK_REG_BASE(x) + 0x14)
-#define XB_LINK_ARB_UPPER(x) (XB_LINK_REG_BASE(x) + 0x1c)
-#define XB_LINK_ARB_LOWER(x) (XB_LINK_REG_BASE(x) + 0x24)
-#define XB_LINK_STATUS_CLR(x) (XB_LINK_REG_BASE(x) + 0x2c)
-#define XB_LINK_RESET(x) (XB_LINK_REG_BASE(x) + 0x34)
-#define XB_LINK_AUX_STATUS(x) (XB_LINK_REG_BASE(x) + 0x3c)
-
-/* link_control(x) */
-#define XB_CTRL_LINKALIVE_IE 0x80000000 /* link comes alive */
- /* reserved: 0x40000000 */
-#define XB_CTRL_PERF_CTR_MODE_MSK 0x30000000 /* perf counter mode */
-#define XB_CTRL_IBUF_LEVEL_MSK 0x0e000000 /* input packet buffer level */
-#define XB_CTRL_8BIT_MODE 0x01000000 /* force link into 8 bit mode */
-#define XB_CTRL_BAD_LLP_PKT 0x00800000 /* force bad LLP packet */
-#define XB_CTRL_WIDGET_CR_MSK 0x007c0000 /* LLP widget credit mask */
-#define XB_CTRL_WIDGET_CR_SHFT 18 /* LLP widget credit shift */
-#define XB_CTRL_ILLEGAL_DST_IE 0x00020000 /* illegal destination */
-#define XB_CTRL_OALLOC_IBUF_IE 0x00010000 /* overallocated input buffer */
- /* reserved: 0x0000fe00 */
-#define XB_CTRL_BNDWDTH_ALLOC_IE 0x00000100 /* bandwidth alloc */
-#define XB_CTRL_RCV_CNT_OFLOW_IE 0x00000080 /* rcv retry overflow */
-#define XB_CTRL_XMT_CNT_OFLOW_IE 0x00000040 /* xmt retry overflow */
-#define XB_CTRL_XMT_MAX_RTRY_IE 0x00000020 /* max transmit retry */
-#define XB_CTRL_RCV_IE 0x00000010 /* receive */
-#define XB_CTRL_XMT_RTRY_IE 0x00000008 /* transmit retry */
- /* reserved: 0x00000004 */
-#define XB_CTRL_MAXREQ_TOUT_IE 0x00000002 /* maximum request timeout */
-#define XB_CTRL_SRC_TOUT_IE 0x00000001 /* source timeout */
-
-/* link_status(x) */
-#define XB_STAT_LINKALIVE XB_CTRL_LINKALIVE_IE
- /* reserved: 0x7ff80000 */
-#define XB_STAT_MULTI_ERR 0x00040000 /* multi error */
-#define XB_STAT_ILLEGAL_DST_ERR XB_CTRL_ILLEGAL_DST_IE
-#define XB_STAT_OALLOC_IBUF_ERR XB_CTRL_OALLOC_IBUF_IE
-#define XB_STAT_BNDWDTH_ALLOC_ID_MSK 0x0000ff00 /* port bitmask */
-#define XB_STAT_RCV_CNT_OFLOW_ERR XB_CTRL_RCV_CNT_OFLOW_IE
-#define XB_STAT_XMT_CNT_OFLOW_ERR XB_CTRL_XMT_CNT_OFLOW_IE
-#define XB_STAT_XMT_MAX_RTRY_ERR XB_CTRL_XMT_MAX_RTRY_IE
-#define XB_STAT_RCV_ERR XB_CTRL_RCV_IE
-#define XB_STAT_XMT_RTRY_ERR XB_CTRL_XMT_RTRY_IE
- /* reserved: 0x00000004 */
-#define XB_STAT_MAXREQ_TOUT_ERR XB_CTRL_MAXREQ_TOUT_IE
-#define XB_STAT_SRC_TOUT_ERR XB_CTRL_SRC_TOUT_IE
-
-/* link_aux_status(x) */
-#define XB_AUX_STAT_RCV_CNT 0xff000000
-#define XB_AUX_STAT_XMT_CNT 0x00ff0000
-#define XB_AUX_STAT_TOUT_DST 0x0000ff00
-#define XB_AUX_LINKFAIL_RST_BAD 0x00000040
-#define XB_AUX_STAT_PRESENT 0x00000020
-#define XB_AUX_STAT_PORT_WIDTH 0x00000010
- /* reserved: 0x0000000f */
-
-/*
- * link_arb_upper/link_arb_lower(x), (reg) should be the link_arb_upper
- * register if (x) is 0x8..0xb, link_arb_lower if (x) is 0xc..0xf
- */
-#define XB_ARB_GBR_MSK 0x1f
-#define XB_ARB_RR_MSK 0x7
-#define XB_ARB_GBR_SHFT(x) (((x) & 0x3) * 8)
-#define XB_ARB_RR_SHFT(x) (((x) & 0x3) * 8 + 5)
-#define XB_ARB_GBR_CNT(reg,x) ((reg) >> XB_ARB_GBR_SHFT(x) & XB_ARB_GBR_MSK)
-#define XB_ARB_RR_CNT(reg,x) ((reg) >> XB_ARB_RR_SHFT(x) & XB_ARB_RR_MSK)
-
-/* XBOW_WID_STAT */
-#define XB_WID_STAT_LINK_INTR_SHFT (24)
-#define XB_WID_STAT_LINK_INTR_MASK (0xFF << XB_WID_STAT_LINK_INTR_SHFT)
-#define XB_WID_STAT_LINK_INTR(x) (0x1 << (((x)&7) + XB_WID_STAT_LINK_INTR_SHFT))
-#define XB_WID_STAT_WIDGET0_INTR 0x00800000
-#define XB_WID_STAT_SRCID_MASK 0x000003c0 /* Xbridge only */
-#define XB_WID_STAT_REG_ACC_ERR 0x00000020
-#define XB_WID_STAT_RECV_TOUT 0x00000010 /* Xbridge only */
-#define XB_WID_STAT_ARB_TOUT 0x00000008 /* Xbridge only */
-#define XB_WID_STAT_XTALK_ERR 0x00000004
-#define XB_WID_STAT_DST_TOUT 0x00000002 /* Xbridge only */
-#define XB_WID_STAT_MULTI_ERR 0x00000001
-
-#define XB_WID_STAT_SRCID_SHFT 6
-
-/* XBOW_WID_CONTROL */
-#define XB_WID_CTRL_REG_ACC_IE XB_WID_STAT_REG_ACC_ERR
-#define XB_WID_CTRL_RECV_TOUT XB_WID_STAT_RECV_TOUT
-#define XB_WID_CTRL_ARB_TOUT XB_WID_STAT_ARB_TOUT
-#define XB_WID_CTRL_XTALK_IE XB_WID_STAT_XTALK_ERR
-
-/* XBOW_WID_INT_UPPER */
-/* defined in xwidget.h for WIDGET_INTDEST_UPPER_ADDR */
-
-/* XBOW WIDGET part number, in the ID register */
-#define XBOW_WIDGET_PART_NUM 0x0 /* crossbow */
-#define XXBOW_WIDGET_PART_NUM 0xd000 /* Xbridge */
-#define XBOW_WIDGET_MFGR_NUM 0x0
-#define XXBOW_WIDGET_MFGR_NUM 0x0
-#define PXBOW_WIDGET_PART_NUM 0xd100 /* PIC */
-
-#define XBOW_REV_1_0 0x1 /* xbow rev 1.0 is "1" */
-#define XBOW_REV_1_1 0x2 /* xbow rev 1.1 is "2" */
-#define XBOW_REV_1_2 0x3 /* xbow rev 1.2 is "3" */
-#define XBOW_REV_1_3 0x4 /* xbow rev 1.3 is "4" */
-#define XBOW_REV_2_0 0x5 /* xbow rev 2.0 is "5" */
-
-#define XXBOW_PART_REV_1_0 (XXBOW_WIDGET_PART_NUM << 4 | 0x1 )
-#define XXBOW_PART_REV_2_0 (XXBOW_WIDGET_PART_NUM << 4 | 0x2 )
-
-/* XBOW_WID_ARB_RELOAD */
-#define XBOW_WID_ARB_RELOAD_INT 0x3f /* GBR reload interval */
-
-#define IS_XBRIDGE_XBOW(wid) \
- (XWIDGET_PART_NUM(wid) == XXBOW_WIDGET_PART_NUM && \
- XWIDGET_MFG_NUM(wid) == XXBOW_WIDGET_MFGR_NUM)
-
-#define IS_PIC_XBOW(wid) \
- (XWIDGET_PART_NUM(wid) == PXBOW_WIDGET_PART_NUM && \
- XWIDGET_MFG_NUM(wid) == XXBOW_WIDGET_MFGR_NUM)
-
-#define XBOW_WAR_ENABLED(pv, widid) ((1 << XWIDGET_REV_NUM(widid)) & pv)
-
-#ifndef __ASSEMBLY__
-/*
- * XBOW Widget 0 Register formats.
- * Format for many of these registers are similar to the standard
- * widget register format described as part of xtalk specification
- * Standard widget register field format description is available in
- * xwidget.h
- * Following structures define the format for xbow widget 0 registers
- */
-/*
- * Xbow Widget 0 Command error word
- */
-typedef union xbw0_cmdword_u {
- xbowreg_t cmdword;
- struct {
- uint32_t rsvd:8, /* Reserved */
- barr:1, /* Barrier operation */
- error:1, /* Error Occured */
- vbpm:1, /* Virtual Backplane message */
- gbr:1, /* GBR enable ? */
- ds:2, /* Data size */
- ct:1, /* Is it a coherent transaction */
- tnum:5, /* Transaction Number */
- pactyp:4, /* Packet type: */
- srcid:4, /* Source ID number */
- destid:4; /* Desination ID number */
-
- } xbw0_cmdfield;
-} xbw0_cmdword_t;
-
-#define xbcmd_destid xbw0_cmdfield.destid
-#define xbcmd_srcid xbw0_cmdfield.srcid
-#define xbcmd_pactyp xbw0_cmdfield.pactyp
-#define xbcmd_tnum xbw0_cmdfield.tnum
-#define xbcmd_ct xbw0_cmdfield.ct
-#define xbcmd_ds xbw0_cmdfield.ds
-#define xbcmd_gbr xbw0_cmdfield.gbr
-#define xbcmd_vbpm xbw0_cmdfield.vbpm
-#define xbcmd_error xbw0_cmdfield.error
-#define xbcmd_barr xbw0_cmdfield.barr
-
-/*
- * Values for field PACTYP in xbow error command word
- */
-#define XBCMDTYP_READREQ 0 /* Read Request packet */
-#define XBCMDTYP_READRESP 1 /* Read Response packet */
-#define XBCMDTYP_WRREQ_RESP 2 /* Write Request with response */
-#define XBCMDTYP_WRRESP 3 /* Write Response */
-#define XBCMDTYP_WRREQ_NORESP 4 /* Write request with No Response */
-#define XBCMDTYP_FETCHOP 6 /* Fetch & Op packet */
-#define XBCMDTYP_STOREOP 8 /* Store & Op packet */
-#define XBCMDTYP_SPLPKT_REQ 0xE /* Special packet request */
-#define XBCMDTYP_SPLPKT_RESP 0xF /* Special packet response */
-
-/*
- * Values for field ds (datasize) in xbow error command word
- */
-#define XBCMDSZ_DOUBLEWORD 0
-#define XBCMDSZ_QUARTRCACHE 1
-#define XBCMDSZ_FULLCACHE 2
-
-/*
- * Xbow widget 0 Status register format.
- */
-
-typedef union xbw0_status_u {
- xbowreg_t statusword;
- struct {
- uint32_t mult_err:1, /* Multiple error occurred */
- connect_tout:1, /* Connection timeout */
- xtalk_err:1, /* Xtalk pkt with error bit */
- /* End of Xbridge only */
- w0_arb_tout, /* arbiter timeout err */
- w0_recv_tout, /* receive timeout err */
- /* Xbridge only */
- regacc_err:1, /* Reg Access error */
- src_id:4, /* source id. Xbridge only */
- resvd1:13,
- wid0intr:1; /* Widget 0 err intr */
- } xbw0_stfield;
-} xbw0_status_t;
-
-#define xbst_linkXintr xbw0_stfield.linkXintr
-#define xbst_w0intr xbw0_stfield.wid0intr
-#define xbst_regacc_err xbw0_stfield.regacc_err
-#define xbst_xtalk_err xbw0_stfield.xtalk_err
-#define xbst_connect_tout xbw0_stfield.connect_tout
-#define xbst_mult_err xbw0_stfield.mult_err
-#define xbst_src_id xbw0_stfield.src_id /* Xbridge only */
-#define xbst_w0_recv_tout xbw0_stfield.w0_recv_tout /* Xbridge only */
-#define xbst_w0_arb_tout xbw0_stfield.w0_arb_tout /* Xbridge only */
-
-/*
- * Xbow widget 0 Control register format
- */
-
-typedef union xbw0_ctrl_u {
- xbowreg_t ctrlword;
- struct {
- uint32_t
- resvd3:1,
- conntout_intr:1,
- xtalkerr_intr:1,
- w0_arg_tout_intr:1, /* Xbridge only */
- w0_recv_tout_intr:1, /* Xbridge only */
- accerr_intr:1,
- enable_w0_tout_cntr:1, /* Xbridge only */
- enable_watchdog:1, /* Xbridge only */
- resvd1:24;
- } xbw0_ctrlfield;
-} xbw0_ctrl_t;
-
-typedef union xbow_linkctrl_u {
- xbowreg_t xbl_ctrlword;
- struct {
- uint32_t srcto_intr:1,
- maxto_intr:1,
- rsvd3:1,
- trx_retry_intr:1,
- rcv_err_intr:1,
- trx_max_retry_intr:1,
- trxov_intr:1,
- rcvov_intr:1,
- bwalloc_intr:1,
- rsvd2:7,
- obuf_intr:1,
- idest_intr:1,
- llp_credit:5,
- force_badllp:1,
- send_bm8:1,
- inbuf_level:3,
- perf_mode:2,
- rsvd1:1,
- alive_intr:1;
-
- } xb_linkcontrol;
-} xbow_linkctrl_t;
-
-#define xbctl_accerr_intr (xbw0_ctrlfield.accerr_intr)
-#define xbctl_xtalkerr_intr (xbw0_ctrlfield.xtalkerr_intr)
-#define xbctl_cnntout_intr (xbw0_ctrlfield.conntout_intr)
-
-#define XBW0_CTRL_ACCERR_INTR (1 << 5)
-#define XBW0_CTRL_XTERR_INTR (1 << 2)
-#define XBW0_CTRL_CONNTOUT_INTR (1 << 1)
-
-/*
- * Xbow Link specific Registers structure definitions.
- */
-
-typedef union xbow_linkX_status_u {
- xbowreg_t linkstatus;
- struct {
- uint32_t pkt_toutsrc:1,
- pkt_toutconn:1, /* max_req_tout in Xbridge */
- pkt_toutdest:1, /* reserved in Xbridge */
- llp_xmitretry:1,
- llp_rcverror:1,
- llp_maxtxretry:1,
- llp_txovflow:1,
- llp_rxovflow:1,
- bw_errport:8, /* BW allocation error port */
- ioe:1, /* Input overallocation error */
- illdest:1,
- merror:1,
- resvd1:12,
- alive:1;
- } xb_linkstatus;
-} xbwX_stat_t;
-
-#define link_alive xb_linkstatus.alive
-#define link_multierror xb_linkstatus.merror
-#define link_illegal_dest xb_linkstatus.illdest
-#define link_ioe xb_linkstatus.ioe
-#define link_max_req_tout xb_linkstatus.pkt_toutconn /* Xbridge */
-#define link_pkt_toutconn xb_linkstatus.pkt_toutconn /* Xbow */
-#define link_pkt_toutdest xb_linkstatus.pkt_toutdest
-#define link_pkt_toutsrc xb_linkstatus.pkt_toutsrc
-
-typedef union xbow_aux_linkX_status_u {
- xbowreg_t aux_linkstatus;
- struct {
- uint32_t rsvd2:4,
- bit_mode_8:1,
- wid_present:1,
- fail_mode:1,
- rsvd1:1,
- to_src_loc:8,
- tx_retry_cnt:8,
- rx_err_cnt:8;
- } xb_aux_linkstatus;
-} xbow_aux_link_status_t;
-
-typedef union xbow_perf_count_u {
- xbowreg_t xb_counter_val;
- struct {
- uint32_t count:20,
- link_select:3,
- rsvd:9;
- } xb_perf;
-} xbow_perfcount_t;
-
-#define XBOW_COUNTER_MASK 0xFFFFF
-
-extern int xbow_widget_present(xbow_t * xbow, int port);
-
-extern xwidget_intr_preset_f xbow_intr_preset;
-extern xswitch_reset_link_f xbow_reset_link;
-void xbow_mlreset(xbow_t *);
-
-/* ========================================================================
- */
-
-#ifdef MACROFIELD_LINE
-/*
- * This table forms a relation between the byte offset macros normally
- * used for ASM coding and the calculated byte offsets of the fields
- * in the C structure.
- *
- * See xbow_check.c xbow_html.c for further details.
- */
-#ifndef MACROFIELD_LINE_BITFIELD
-#define MACROFIELD_LINE_BITFIELD(m) /* ignored */
-#endif
-
-struct macrofield_s xbow_macrofield[] =
-{
-
- MACROFIELD_LINE(XBOW_WID_ID, xb_wid_id)
- MACROFIELD_LINE(XBOW_WID_STAT, xb_wid_stat)
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_LINK_INTR(0xF))
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_LINK_INTR(0xE))
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_LINK_INTR(0xD))
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_LINK_INTR(0xC))
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_LINK_INTR(0xB))
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_LINK_INTR(0xA))
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_LINK_INTR(0x9))
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_LINK_INTR(0x8))
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_WIDGET0_INTR)
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_REG_ACC_ERR)
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_XTALK_ERR)
- MACROFIELD_LINE_BITFIELD(XB_WID_STAT_MULTI_ERR)
- MACROFIELD_LINE(XBOW_WID_ERR_UPPER, xb_wid_err_upper)
- MACROFIELD_LINE(XBOW_WID_ERR_LOWER, xb_wid_err_lower)
- MACROFIELD_LINE(XBOW_WID_CONTROL, xb_wid_control)
- MACROFIELD_LINE_BITFIELD(XB_WID_CTRL_REG_ACC_IE)
- MACROFIELD_LINE_BITFIELD(XB_WID_CTRL_XTALK_IE)
- MACROFIELD_LINE(XBOW_WID_REQ_TO, xb_wid_req_timeout)
- MACROFIELD_LINE(XBOW_WID_INT_UPPER, xb_wid_int_upper)
- MACROFIELD_LINE(XBOW_WID_INT_LOWER, xb_wid_int_lower)
- MACROFIELD_LINE(XBOW_WID_ERR_CMDWORD, xb_wid_err_cmdword)
- MACROFIELD_LINE(XBOW_WID_LLP, xb_wid_llp)
- MACROFIELD_LINE(XBOW_WID_STAT_CLR, xb_wid_stat_clr)
- MACROFIELD_LINE(XBOW_WID_ARB_RELOAD, xb_wid_arb_reload)
- MACROFIELD_LINE(XBOW_WID_PERF_CTR_A, xb_perf_ctr_a)
- MACROFIELD_LINE(XBOW_WID_PERF_CTR_B, xb_perf_ctr_b)
- MACROFIELD_LINE(XBOW_WID_NIC, xb_nic)
- MACROFIELD_LINE(XB_LINK_REG_BASE(8), xb_link(8))
- MACROFIELD_LINE(XB_LINK_IBUF_FLUSH(8), xb_link(8).link_ibf)
- MACROFIELD_LINE(XB_LINK_CTRL(8), xb_link(8).link_control)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_LINKALIVE_IE)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_PERF_CTR_MODE_MSK)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_IBUF_LEVEL_MSK)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_8BIT_MODE)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_BAD_LLP_PKT)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_WIDGET_CR_MSK)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_ILLEGAL_DST_IE)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_OALLOC_IBUF_IE)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_BNDWDTH_ALLOC_IE)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_RCV_CNT_OFLOW_IE)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_XMT_CNT_OFLOW_IE)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_XMT_MAX_RTRY_IE)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_RCV_IE)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_XMT_RTRY_IE)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_MAXREQ_TOUT_IE)
- MACROFIELD_LINE_BITFIELD(XB_CTRL_SRC_TOUT_IE)
- MACROFIELD_LINE(XB_LINK_STATUS(8), xb_link(8).link_status)
- MACROFIELD_LINE_BITFIELD(XB_STAT_LINKALIVE)
- MACROFIELD_LINE_BITFIELD(XB_STAT_MULTI_ERR)
- MACROFIELD_LINE_BITFIELD(XB_STAT_ILLEGAL_DST_ERR)
- MACROFIELD_LINE_BITFIELD(XB_STAT_OALLOC_IBUF_ERR)
- MACROFIELD_LINE_BITFIELD(XB_STAT_BNDWDTH_ALLOC_ID_MSK)
- MACROFIELD_LINE_BITFIELD(XB_STAT_RCV_CNT_OFLOW_ERR)
- MACROFIELD_LINE_BITFIELD(XB_STAT_XMT_CNT_OFLOW_ERR)
- MACROFIELD_LINE_BITFIELD(XB_STAT_XMT_MAX_RTRY_ERR)
- MACROFIELD_LINE_BITFIELD(XB_STAT_RCV_ERR)
- MACROFIELD_LINE_BITFIELD(XB_STAT_XMT_RTRY_ERR)
- MACROFIELD_LINE_BITFIELD(XB_STAT_MAXREQ_TOUT_ERR)
- MACROFIELD_LINE_BITFIELD(XB_STAT_SRC_TOUT_ERR)
- MACROFIELD_LINE(XB_LINK_ARB_UPPER(8), xb_link(8).link_arb_upper)
- MACROFIELD_LINE_BITFIELD(XB_ARB_RR_MSK << XB_ARB_RR_SHFT(0xb))
- MACROFIELD_LINE_BITFIELD(XB_ARB_GBR_MSK << XB_ARB_GBR_SHFT(0xb))
- MACROFIELD_LINE_BITFIELD(XB_ARB_RR_MSK << XB_ARB_RR_SHFT(0xa))
- MACROFIELD_LINE_BITFIELD(XB_ARB_GBR_MSK << XB_ARB_GBR_SHFT(0xa))
- MACROFIELD_LINE_BITFIELD(XB_ARB_RR_MSK << XB_ARB_RR_SHFT(0x9))
- MACROFIELD_LINE_BITFIELD(XB_ARB_GBR_MSK << XB_ARB_GBR_SHFT(0x9))
- MACROFIELD_LINE_BITFIELD(XB_ARB_RR_MSK << XB_ARB_RR_SHFT(0x8))
- MACROFIELD_LINE_BITFIELD(XB_ARB_GBR_MSK << XB_ARB_GBR_SHFT(0x8))
- MACROFIELD_LINE(XB_LINK_ARB_LOWER(8), xb_link(8).link_arb_lower)
- MACROFIELD_LINE_BITFIELD(XB_ARB_RR_MSK << XB_ARB_RR_SHFT(0xf))
- MACROFIELD_LINE_BITFIELD(XB_ARB_GBR_MSK << XB_ARB_GBR_SHFT(0xf))
- MACROFIELD_LINE_BITFIELD(XB_ARB_RR_MSK << XB_ARB_RR_SHFT(0xe))
- MACROFIELD_LINE_BITFIELD(XB_ARB_GBR_MSK << XB_ARB_GBR_SHFT(0xe))
- MACROFIELD_LINE_BITFIELD(XB_ARB_RR_MSK << XB_ARB_RR_SHFT(0xd))
- MACROFIELD_LINE_BITFIELD(XB_ARB_GBR_MSK << XB_ARB_GBR_SHFT(0xd))
- MACROFIELD_LINE_BITFIELD(XB_ARB_RR_MSK << XB_ARB_RR_SHFT(0xc))
- MACROFIELD_LINE_BITFIELD(XB_ARB_GBR_MSK << XB_ARB_GBR_SHFT(0xc))
- MACROFIELD_LINE(XB_LINK_STATUS_CLR(8), xb_link(8).link_status_clr)
- MACROFIELD_LINE(XB_LINK_RESET(8), xb_link(8).link_reset)
- MACROFIELD_LINE(XB_LINK_AUX_STATUS(8), xb_link(8).link_aux_status)
- MACROFIELD_LINE_BITFIELD(XB_AUX_STAT_RCV_CNT)
- MACROFIELD_LINE_BITFIELD(XB_AUX_STAT_XMT_CNT)
- MACROFIELD_LINE_BITFIELD(XB_AUX_LINKFAIL_RST_BAD)
- MACROFIELD_LINE_BITFIELD(XB_AUX_STAT_PRESENT)
- MACROFIELD_LINE_BITFIELD(XB_AUX_STAT_PORT_WIDTH)
- MACROFIELD_LINE_BITFIELD(XB_AUX_STAT_TOUT_DST)
- MACROFIELD_LINE(XB_LINK_REG_BASE(0x8), xb_link(0x8))
- MACROFIELD_LINE(XB_LINK_REG_BASE(0x9), xb_link(0x9))
- MACROFIELD_LINE(XB_LINK_REG_BASE(0xA), xb_link(0xA))
- MACROFIELD_LINE(XB_LINK_REG_BASE(0xB), xb_link(0xB))
- MACROFIELD_LINE(XB_LINK_REG_BASE(0xC), xb_link(0xC))
- MACROFIELD_LINE(XB_LINK_REG_BASE(0xD), xb_link(0xD))
- MACROFIELD_LINE(XB_LINK_REG_BASE(0xE), xb_link(0xE))
- MACROFIELD_LINE(XB_LINK_REG_BASE(0xF), xb_link(0xF))
-}; /* xbow_macrofield[] */
-
-#endif /* MACROFIELD_LINE */
-
-#endif /* __ASSEMBLY__ */
-#endif /* _ASM_IA64_SN_XTALK_XBOW_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-#ifndef _ASM_IA64_SN_XTALK_XBOW_INFO_H
-#define _ASM_IA64_SN_XTALK_XBOW_INFO_H
-
-#include <linux/types.h>
-
-#define XBOW_PERF_MODES 0x03
-
-typedef struct xbow_link_status {
- uint64_t rx_err_count;
- uint64_t tx_retry_count;
-} xbow_link_status_t;
-
-
-#endif /* _ASM_IA64_SN_XTALK_XBOW_INFO_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-#ifndef _ASM_IA64_SN_XTALK_XSWITCH_H
-#define _ASM_IA64_SN_XTALK_XSWITCH_H
-
-/*
- * xswitch.h - controls the format of the data
- * provided by xswitch verticies back to the
- * xtalk bus providers.
- */
-
-#ifndef __ASSEMBLY__
-
-#include <asm/sn/xtalk/xtalk.h>
-
-typedef struct xswitch_info_s *xswitch_info_t;
-
-typedef int
- xswitch_reset_link_f(vertex_hdl_t xconn);
-
-typedef struct xswitch_provider_s {
- xswitch_reset_link_f *reset_link;
-} xswitch_provider_t;
-
-extern void xswitch_provider_register(vertex_hdl_t sw_vhdl, xswitch_provider_t * xsw_fns);
-
-xswitch_reset_link_f xswitch_reset_link;
-
-extern xswitch_info_t xswitch_info_new(vertex_hdl_t vhdl);
-
-extern void xswitch_info_link_is_ok(xswitch_info_t xswitch_info,
- xwidgetnum_t port);
-extern void xswitch_info_vhdl_set(xswitch_info_t xswitch_info,
- xwidgetnum_t port,
- vertex_hdl_t xwidget);
-extern void xswitch_info_master_assignment_set(xswitch_info_t xswitch_info,
- xwidgetnum_t port,
- vertex_hdl_t master_vhdl);
-
-extern xswitch_info_t xswitch_info_get(vertex_hdl_t vhdl);
-
-extern int xswitch_info_link_ok(xswitch_info_t xswitch_info,
- xwidgetnum_t port);
-extern vertex_hdl_t xswitch_info_vhdl_get(xswitch_info_t xswitch_info,
- xwidgetnum_t port);
-extern vertex_hdl_t xswitch_info_master_assignment_get(xswitch_info_t xswitch_info,
- xwidgetnum_t port);
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* _ASM_IA64_SN_XTALK_XSWITCH_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-#ifndef _ASM_IA64_SN_XTALK_XTALK_H
-#define _ASM_IA64_SN_XTALK_XTALK_H
-#include <linux/config.h>
-
-#ifdef __KERNEL__
-#include "asm/sn/sgi.h"
-#endif
-
-
-/*
- * xtalk.h -- platform-independent crosstalk interface
- */
-/*
- * User-level device driver visible types
- */
-typedef char xwidgetnum_t; /* xtalk widget number (0..15) */
-
-#define XWIDGET_NONE (-1)
-
-typedef int xwidget_part_num_t; /* xtalk widget part number */
-
-#define XWIDGET_PART_NUM_NONE (-1)
-
-typedef int xwidget_rev_num_t; /* xtalk widget revision number */
-
-#define XWIDGET_REV_NUM_NONE (-1)
-
-typedef int xwidget_mfg_num_t; /* xtalk widget manufacturing ID */
-
-#define XWIDGET_MFG_NUM_NONE (-1)
-
-typedef struct xtalk_piomap_s *xtalk_piomap_t;
-
-/* It is often convenient to fold the XIO target port
- * number into the XIO address.
- */
-#define XIO_NOWHERE (0xFFFFFFFFFFFFFFFFull)
-#define XIO_ADDR_BITS (0x0000FFFFFFFFFFFFull)
-#define XIO_PORT_BITS (0xF000000000000000ull)
-#define XIO_PORT_SHIFT (60)
-
-#define XIO_PACKED(x) (((x)&XIO_PORT_BITS) != 0)
-#define XIO_ADDR(x) ((x)&XIO_ADDR_BITS)
-#define XIO_PORT(x) ((xwidgetnum_t)(((x)&XIO_PORT_BITS) >> XIO_PORT_SHIFT))
-#define XIO_PACK(p,o) ((((uint64_t)(p))<<XIO_PORT_SHIFT) | ((o)&XIO_ADDR_BITS))
-
-
-/*
- * Kernel/driver only definitions
- */
-#ifdef __KERNEL__
-
-#include <asm/types.h>
-#include <asm/sn/types.h>
-#include <asm/sn/ioerror.h>
-#include <asm/sn/driver.h>
-#include <asm/sn/dmamap.h>
-
-struct xwidget_hwid_s;
-
-/*
- * Acceptable flag bits for xtalk service calls
- *
- * XTALK_FIXED: require that mappings be established
- * using fixed sharable resources; address
- * translation results will be permanently
- * available. (PIOMAP_FIXED and DMAMAP_FIXED are
- * the same numeric value and are acceptable).
- * XTALK_NOSLEEP: if any part of the operation would
- * sleep waiting for resoruces, return an error
- * instead. (PIOMAP_NOSLEEP and DMAMAP_NOSLEEP are
- * the same numeric value and are acceptable).
- */
-#define XTALK_FIXED DMAMAP_FIXED
-#define XTALK_NOSLEEP DMAMAP_NOSLEEP
-
-/* PIO MANAGEMENT */
-typedef xtalk_piomap_t
-xtalk_piomap_alloc_f (vertex_hdl_t dev, /* set up mapping for this device */
- device_desc_t dev_desc, /* device descriptor */
- iopaddr_t xtalk_addr, /* map for this xtalk_addr range */
- size_t byte_count,
- size_t byte_count_max, /* maximum size of a mapping */
- unsigned int flags); /* defined in sys/pio.h */
-typedef void
-xtalk_piomap_free_f (xtalk_piomap_t xtalk_piomap);
-
-typedef caddr_t
-xtalk_piomap_addr_f (xtalk_piomap_t xtalk_piomap, /* mapping resources */
- iopaddr_t xtalk_addr, /* map for this xtalk address */
- size_t byte_count); /* map this many bytes */
-
-typedef void
-xtalk_piomap_done_f (xtalk_piomap_t xtalk_piomap);
-
-typedef caddr_t
-xtalk_piotrans_addr_f (vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- iopaddr_t xtalk_addr, /* Crosstalk address */
- size_t byte_count, /* map this many bytes */
- unsigned int flags); /* (currently unused) */
-
-extern caddr_t
-xtalk_pio_addr (vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- iopaddr_t xtalk_addr, /* Crosstalk address */
- size_t byte_count, /* map this many bytes */
- xtalk_piomap_t *xtalk_piomapp, /* RETURNS mapping resources */
- unsigned int flags); /* (currently unused) */
-
-/* DMA MANAGEMENT */
-
-typedef struct xtalk_dmamap_s *xtalk_dmamap_t;
-
-typedef xtalk_dmamap_t
-xtalk_dmamap_alloc_f (vertex_hdl_t dev, /* set up mappings for this device */
- device_desc_t dev_desc, /* device descriptor */
- size_t byte_count_max, /* max size of a mapping */
- unsigned int flags); /* defined in dma.h */
-
-typedef void
-xtalk_dmamap_free_f (xtalk_dmamap_t dmamap);
-
-typedef iopaddr_t
-xtalk_dmamap_addr_f (xtalk_dmamap_t dmamap, /* use these mapping resources */
- paddr_t paddr, /* map for this address */
- size_t byte_count); /* map this many bytes */
-
-typedef void
-xtalk_dmamap_done_f (xtalk_dmamap_t dmamap);
-
-typedef iopaddr_t
-xtalk_dmatrans_addr_f (vertex_hdl_t dev, /* translate for this device */
- device_desc_t dev_desc, /* device descriptor */
- paddr_t paddr, /* system physical address */
- size_t byte_count, /* length */
- unsigned int flags);
-
-typedef void
-xtalk_dmamap_drain_f (xtalk_dmamap_t map); /* drain this map's channel */
-
-typedef void
-xtalk_dmaaddr_drain_f (vertex_hdl_t vhdl, /* drain channel from this device */
- paddr_t addr, /* to this physical address */
- size_t bytes); /* for this many bytes */
-
-/* INTERRUPT MANAGEMENT */
-
-/*
- * A xtalk interrupt resource handle. When resources are allocated
- * in order to satisfy a xtalk_intr_alloc request, a xtalk_intr handle
- * is returned. xtalk_intr_connect associates a software handler with
-
- * these system resources.
- */
-typedef struct xtalk_intr_s *xtalk_intr_t;
-
-
-/*
- * When a crosstalk device connects an interrupt, it passes in a function
- * that knows how to set its xtalk interrupt register appropriately. The
- * low-level interrupt code may invoke this function later in order to
- * migrate an interrupt transparently to the device driver(s) that use this
- * interrupt.
- *
- * The argument passed to this function contains enough information for a
- * crosstalk device to (re-)target an interrupt. A function of this type
- * must be supplied by every crosstalk driver.
- */
-typedef int
-xtalk_intr_setfunc_f (xtalk_intr_t intr_hdl); /* interrupt handle */
-
-typedef xtalk_intr_t
-xtalk_intr_alloc_f (vertex_hdl_t dev, /* which crosstalk device */
- device_desc_t dev_desc, /* device descriptor */
- vertex_hdl_t owner_dev); /* owner of this intr */
-
-typedef void
-xtalk_intr_free_f (xtalk_intr_t intr_hdl);
-
-typedef int
-xtalk_intr_connect_f (xtalk_intr_t intr_hdl, /* xtalk intr resource handle */
- intr_func_t intr_func, /* xtalk intr handler */
- void *intr_arg, /* arg to intr handler */
- xtalk_intr_setfunc_f *setfunc, /* func to set intr hw */
- void *setfunc_arg); /* arg to setfunc */
-
-typedef void
-xtalk_intr_disconnect_f (xtalk_intr_t intr_hdl);
-
-typedef vertex_hdl_t
-xtalk_intr_cpu_get_f (xtalk_intr_t intr_hdl); /* xtalk intr resource handle */
-
-/* CONFIGURATION MANAGEMENT */
-
-typedef void
-xtalk_provider_startup_f (vertex_hdl_t xtalk_provider);
-
-typedef void
-xtalk_provider_shutdown_f (vertex_hdl_t xtalk_provider);
-
-typedef void
-xtalk_widgetdev_enable_f (vertex_hdl_t, int);
-
-typedef void
-xtalk_widgetdev_shutdown_f (vertex_hdl_t, int);
-
-/* Error Management */
-
-/* Early Action Support */
-typedef caddr_t
-xtalk_early_piotrans_addr_f (xwidget_part_num_t part_num,
- xwidget_mfg_num_t mfg_num,
- int which,
- iopaddr_t xtalk_addr,
- size_t byte_count,
- unsigned int flags);
-
-/*
- * Adapters that provide a crosstalk interface adhere to this software interface.
- */
-typedef struct xtalk_provider_s {
- /* PIO MANAGEMENT */
- xtalk_piomap_alloc_f *piomap_alloc;
- xtalk_piomap_free_f *piomap_free;
- xtalk_piomap_addr_f *piomap_addr;
- xtalk_piomap_done_f *piomap_done;
- xtalk_piotrans_addr_f *piotrans_addr;
-
- /* DMA MANAGEMENT */
- xtalk_dmamap_alloc_f *dmamap_alloc;
- xtalk_dmamap_free_f *dmamap_free;
- xtalk_dmamap_addr_f *dmamap_addr;
- xtalk_dmamap_done_f *dmamap_done;
- xtalk_dmatrans_addr_f *dmatrans_addr;
- xtalk_dmamap_drain_f *dmamap_drain;
- xtalk_dmaaddr_drain_f *dmaaddr_drain;
-
- /* INTERRUPT MANAGEMENT */
- xtalk_intr_alloc_f *intr_alloc;
- xtalk_intr_alloc_f *intr_alloc_nothd;
- xtalk_intr_free_f *intr_free;
- xtalk_intr_connect_f *intr_connect;
- xtalk_intr_disconnect_f *intr_disconnect;
-
- /* CONFIGURATION MANAGEMENT */
- xtalk_provider_startup_f *provider_startup;
- xtalk_provider_shutdown_f *provider_shutdown;
-} xtalk_provider_t;
-
-/* Crosstalk devices use these standard Crosstalk provider interfaces */
-extern xtalk_piomap_alloc_f xtalk_piomap_alloc;
-extern xtalk_piomap_free_f xtalk_piomap_free;
-extern xtalk_piomap_addr_f xtalk_piomap_addr;
-extern xtalk_piomap_done_f xtalk_piomap_done;
-extern xtalk_piotrans_addr_f xtalk_piotrans_addr;
-extern xtalk_dmamap_alloc_f xtalk_dmamap_alloc;
-extern xtalk_dmamap_free_f xtalk_dmamap_free;
-extern xtalk_dmamap_addr_f xtalk_dmamap_addr;
-extern xtalk_dmamap_done_f xtalk_dmamap_done;
-extern xtalk_dmatrans_addr_f xtalk_dmatrans_addr;
-extern xtalk_dmamap_drain_f xtalk_dmamap_drain;
-extern xtalk_dmaaddr_drain_f xtalk_dmaaddr_drain;
-extern xtalk_intr_alloc_f xtalk_intr_alloc;
-extern xtalk_intr_alloc_f xtalk_intr_alloc_nothd;
-extern xtalk_intr_free_f xtalk_intr_free;
-extern xtalk_intr_connect_f xtalk_intr_connect;
-extern xtalk_intr_disconnect_f xtalk_intr_disconnect;
-extern xtalk_intr_cpu_get_f xtalk_intr_cpu_get;
-extern xtalk_provider_startup_f xtalk_provider_startup;
-extern xtalk_provider_shutdown_f xtalk_provider_shutdown;
-extern xtalk_widgetdev_enable_f xtalk_widgetdev_enable;
-extern xtalk_widgetdev_shutdown_f xtalk_widgetdev_shutdown;
-extern xtalk_early_piotrans_addr_f xtalk_early_piotrans_addr;
-
-/* error management */
-
-extern int xtalk_error_handler(vertex_hdl_t,
- int,
- ioerror_mode_t,
- ioerror_t *);
-
-/*
- * Generic crosstalk interface, for use with all crosstalk providers
- * and all crosstalk devices.
- */
-typedef unchar xtalk_intr_vector_t; /* crosstalk interrupt vector (0..255) */
-
-#define XTALK_INTR_VECTOR_NONE (xtalk_intr_vector_t)0
-
-/* Generic crosstalk interrupt interfaces */
-extern vertex_hdl_t xtalk_intr_dev_get(xtalk_intr_t xtalk_intr);
-extern xwidgetnum_t xtalk_intr_target_get(xtalk_intr_t xtalk_intr);
-extern xtalk_intr_vector_t xtalk_intr_vector_get(xtalk_intr_t xtalk_intr);
-extern iopaddr_t xtalk_intr_addr_get(xtalk_intr_t xtalk_intr);
-extern vertex_hdl_t xtalk_intr_cpu_get(xtalk_intr_t xtalk_intr);
-extern void *xtalk_intr_sfarg_get(xtalk_intr_t xtalk_intr);
-
-/* Generic crosstalk pio interfaces */
-extern vertex_hdl_t xtalk_pio_dev_get(xtalk_piomap_t xtalk_piomap);
-extern xwidgetnum_t xtalk_pio_target_get(xtalk_piomap_t xtalk_piomap);
-extern iopaddr_t xtalk_pio_xtalk_addr_get(xtalk_piomap_t xtalk_piomap);
-extern size_t xtalk_pio_mapsz_get(xtalk_piomap_t xtalk_piomap);
-extern caddr_t xtalk_pio_kvaddr_get(xtalk_piomap_t xtalk_piomap);
-
-/* Generic crosstalk dma interfaces */
-extern vertex_hdl_t xtalk_dma_dev_get(xtalk_dmamap_t xtalk_dmamap);
-extern xwidgetnum_t xtalk_dma_target_get(xtalk_dmamap_t xtalk_dmamap);
-
-/* Register/unregister Crosstalk providers and get implementation handle */
-extern void xtalk_set_early_piotrans_addr(xtalk_early_piotrans_addr_f *);
-extern void xtalk_provider_register(vertex_hdl_t provider, xtalk_provider_t *xtalk_fns);
-extern void xtalk_provider_unregister(vertex_hdl_t provider);
-extern xtalk_provider_t *xtalk_provider_fns_get(vertex_hdl_t provider);
-
-/* Crosstalk Switch generic layer, for use by initialization code */
-extern void xswitch_census(vertex_hdl_t xswitchv);
-extern void xswitch_init_widgets(vertex_hdl_t xswitchv);
-
-/* early init interrupt management */
-
-typedef void
-xwidget_intr_preset_f (void *which_widget,
- int which_widget_intr,
- xwidgetnum_t targ,
- iopaddr_t addr,
- xtalk_intr_vector_t vect);
-
-typedef void
-xtalk_intr_prealloc_f (void *which_xtalk,
- xtalk_intr_vector_t xtalk_vector,
- xwidget_intr_preset_f *preset_func,
- void *which_widget,
- int which_widget_intr);
-
-typedef void
-xtalk_intr_preconn_f (void *which_xtalk,
- xtalk_intr_vector_t xtalk_vector,
- intr_func_t intr_func,
- intr_arg_t intr_arg);
-
-
-#define XTALK_ADDR_TO_UPPER(xtalk_addr) (((iopaddr_t)(xtalk_addr) >> 32) & 0xffff)
-#define XTALK_ADDR_TO_LOWER(xtalk_addr) ((iopaddr_t)(xtalk_addr) & 0xffffffff)
-
-typedef xtalk_intr_setfunc_f *xtalk_intr_setfunc_t;
-
-typedef void xtalk_iter_f(vertex_hdl_t vhdl);
-
-extern void xtalk_iterate(char *prefix, xtalk_iter_f *func);
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_IA64_SN_XTALK_XTALK_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-#ifndef _ASM_IA64_SN_XTALK_XTALK_PRIVATE_H
-#define _ASM_IA64_SN_XTALK_XTALK_PRIVATE_H
-
-#include <asm/sn/ioerror.h> /* for error function and arg types */
-#include <asm/sn/xtalk/xwidget.h>
-#include <asm/sn/xtalk/xtalk.h>
-
-/*
- * xtalk_private.h -- private definitions for xtalk
- * crosstalk drivers should NOT include this file.
- */
-
-/*
- * All Crosstalk providers set up PIO using this information.
- */
-struct xtalk_piomap_s {
- vertex_hdl_t xp_dev; /* a requestor of this mapping */
- xwidgetnum_t xp_target; /* target (node's widget number) */
- iopaddr_t xp_xtalk_addr; /* which crosstalk addr is mapped */
- size_t xp_mapsz; /* size of this mapping */
- caddr_t xp_kvaddr; /* kernel virtual address to use */
-};
-
-/*
- * All Crosstalk providers set up DMA using this information.
- */
-struct xtalk_dmamap_s {
- vertex_hdl_t xd_dev; /* a requestor of this mapping */
- xwidgetnum_t xd_target; /* target (node's widget number) */
-};
-
-/*
- * All Crosstalk providers set up interrupts using this information.
- */
-struct xtalk_intr_s {
- vertex_hdl_t xi_dev; /* requestor of this intr */
- xwidgetnum_t xi_target; /* master's widget number */
- xtalk_intr_vector_t xi_vector; /* 8-bit interrupt vector */
- iopaddr_t xi_addr; /* xtalk address to generate intr */
- void *xi_sfarg; /* argument for setfunc */
- xtalk_intr_setfunc_t xi_setfunc; /* device's setfunc routine */
-};
-
-/*
- * Xtalk interrupt handler structure access functions
- */
-#define xwidget_hwid_is_sn1_xswitch(_hwid) \
- (((_hwid)->part_num == XXBOW_WIDGET_PART_NUM || \
- (_hwid)->part_num == PXBOW_WIDGET_PART_NUM) && \
- ((_hwid)->mfg_num == XXBOW_WIDGET_MFGR_NUM ))
-
-#define xwidget_hwid_is_xswitch(_hwid) \
- xwidget_hwid_is_sn1_xswitch(_hwid)
-
-/* common iograph info for all widgets,
- * stashed in FASTINFO of widget connection points.
- */
-struct xwidget_info_s {
- char *w_fingerprint;
- vertex_hdl_t w_vertex; /* back pointer to vertex */
- xwidgetnum_t w_id; /* widget id */
- struct xwidget_hwid_s w_hwid; /* hardware identification (part/rev/mfg) */
- vertex_hdl_t w_master; /* CACHED widget's master */
- xwidgetnum_t w_masterid; /* CACHED widget's master's widgetnum */
- error_handler_f *w_efunc; /* error handling function */
- error_handler_arg_t w_einfo; /* first parameter for efunc */
- char *w_name; /* canonical hwgraph name */
-};
-
-extern char widget_info_fingerprint[];
-
-#endif /* _ASM_IA64_SN_XTALK_XTALK_PRIVATE_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-#ifndef _ASM_IA64_SN_XTALK_XTALKADDRS_H
-#define _ASM_IA64_SN_XTALK_XTALKADDRS_H
-
-
-/*
- * CrossTalk to SN0 Hub addressing support
- *
- * This file defines the mapping conventions used by the Hub's
- * I/O interface when it receives a read or write request from
- * a CrossTalk widget.
- *
- * Format for non-Memory accesses:
- *
- * +--------------+------------------------------------------------+
- * | 0 | XXXXX | SN0Addr |
- * +----+---------+------------------------------------------------+
- * 47 46 40 39 0
- * bit 47 indicates Memory (0)
- * bits 46..40 are unused
- * bits 39..0 hold the memory address
- * (bits 39..31 hold the nodeID in N mode
- * bits 39..32 hold the nodeID in M mode
- * By design, this looks exactly like a 0-extended SN0 Address, so
- * we don't need to do any conversions.
- *
- *
- *
- * Format for non-Memory accesses:
- *
- * +--------------+------+---------+------+--+---------------------+
- * | 1 | DstNode | XXXX | BigW=0 | SW=1 | 1| Addr |
- * +----+---------+------+---------+------+--+---------------------+
- * 47 46 38 37 31 30 28 27 24 23 22 0
- *
- * bit 47 indicates IO (1)
- * bits 46..38 hold the destination node ID
- * bits 37..31 are unused
- * bits 30..28 hold the big window being addressed
- * bits 27..24 hold the small window being addressed
- * 0 always refers to the xbow
- * 1 always refers to the hub itself
- * bit 23 indicates local (0) or remote (1)
- * no accessing checks are done if this bit is 0
- * bits 22..0 hold the register address
- * bits 22..21 determine which section of the hub
- * 00 -> PI
- * 01 -> MD
- * 10 -> IO
- * 11 -> NI
- * This looks very much like a REMOTE_HUB access, except the nodeID
- * is in a different place, and the highest xtalk bit is set.
- */
-/* Hub-specific xtalk definitions */
-
-#define HX_MEM_BIT 0L /* Hub's idea of xtalk memory access */
-#define HX_IO_BIT 1L /* Hub's idea of xtalk register access */
-#define HX_ACCTYPE_SHIFT 47
-
-#define HX_NODE_SHIFT 39
-
-#define HX_BIGWIN_SHIFT 28
-#define HX_SWIN_SHIFT 23
-
-#define HX_LOCACC 0L /* local access */
-#define HX_REMACC 1L /* remote access */
-#define HX_ACCESS_SHIFT 23
-
-/*
- * Pre-calculate the fixed portion of a crosstalk address that maps
- * to local register space on a hub.
- */
-#define HX_REG_BASE ((HX_IO_BIT<<HX_ACCTYPE_SHIFT) + \
- (0L<<HX_BIGWIN_SHIFT) + \
- (1L<<HX_SWIN_SHIFT) + IALIAS_SIZE + \
- (HX_REMACC<<HX_ACCESS_SHIFT))
-
-/*
- * Return a crosstalk address which a widget can use to access a
- * designated register on a designated node.
- */
-#define HUBREG_AS_XTALKADDR(nasid, regaddr) \
- ((iopaddr_t)(HX_REG_BASE + (((long)nasid)<<HX_NODE_SHIFT) + ((long)regaddr)))
-
-#if TBD
-#assert sizeof(iopaddr_t) == 8
-#endif /* TBD */
-
-/*
- * Get widget part number, given node id and widget id.
- * Always do a 32-bit read, because some widgets, e.g., Bridge, require so.
- * Widget ID is at offset 0 for 64-bit access. Add 4 to get lower 32 bits
- * in big endian mode.
- * XXX Double check this with Hub, Xbow, Bridge and other hardware folks.
- */
-#define XWIDGET_ID_READ(nasid, widget) \
- (widgetreg_t)(*(volatile uint32_t *)(NODE_SWIN_BASE(nasid, widget) + WIDGET_ID))
-
-
-#endif /* _ASM_IA64_SN_XTALK_XTALKADDRS_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All Rights Reserved.
- */
-#ifndef _ASM_IA64_SN_XTALK_XWIDGET_H
-#define _ASM_IA64_SN_XTALK_XWIDGET_H
-
-/*
- * xwidget.h - generic crosstalk widget header file
- */
-
-#ifdef __KERNEL__
-#include <asm/sn/xtalk/xtalk.h>
-#ifndef __ASSEMBLY__
-#include <asm/sn/cdl.h>
-#endif /* __ASSEMBLY__ */
-#else
-#include <xtalk/xtalk.h>
-#endif
-
-#define WIDGET_ID 0x00
-#define WIDGET_STATUS 0x08
-#define WIDGET_ERR_UPPER_ADDR 0x10
-#define WIDGET_ERR_LOWER_ADDR 0x18
-#define WIDGET_CONTROL 0x20
-#define WIDGET_REQ_TIMEOUT 0x28
-#define WIDGET_INTDEST_UPPER_ADDR 0x30
-#define WIDGET_INTDEST_LOWER_ADDR 0x38
-#define WIDGET_ERR_CMD_WORD 0x40
-#define WIDGET_LLP_CFG 0x48
-#define WIDGET_TFLUSH 0x50
-
-/* WIDGET_ID */
-#define WIDGET_REV_NUM 0xf0000000
-#define WIDGET_PART_NUM 0x0ffff000
-#define WIDGET_MFG_NUM 0x00000ffe
-#define WIDGET_REV_NUM_SHFT 28
-#define WIDGET_PART_NUM_SHFT 12
-#define WIDGET_MFG_NUM_SHFT 1
-
-#define XWIDGET_PART_NUM(widgetid) (((widgetid) & WIDGET_PART_NUM) >> WIDGET_PART_NUM_SHFT)
-#define XWIDGET_REV_NUM(widgetid) (((widgetid) & WIDGET_REV_NUM) >> WIDGET_REV_NUM_SHFT)
-#define XWIDGET_MFG_NUM(widgetid) (((widgetid) & WIDGET_MFG_NUM) >> WIDGET_MFG_NUM_SHFT)
-#define XWIDGET_PART_REV_NUM(widgetid) ((XWIDGET_PART_NUM(widgetid) << 4) | \
- XWIDGET_REV_NUM(widgetid))
-#define XWIDGET_PART_REV_NUM_REV(partrev) (partrev & 0xf)
-
-/* WIDGET_STATUS */
-#define WIDGET_LLP_REC_CNT 0xff000000
-#define WIDGET_LLP_TX_CNT 0x00ff0000
-#define WIDGET_PENDING 0x0000001f
-
-/* WIDGET_ERR_UPPER_ADDR */
-#define WIDGET_ERR_UPPER_ADDR_ONLY 0x0000ffff
-
-/* WIDGET_CONTROL */
-#define WIDGET_F_BAD_PKT 0x00010000
-#define WIDGET_LLP_XBAR_CRD 0x0000f000
-#define WIDGET_LLP_XBAR_CRD_SHFT 12
-#define WIDGET_CLR_RLLP_CNT 0x00000800
-#define WIDGET_CLR_TLLP_CNT 0x00000400
-#define WIDGET_SYS_END 0x00000200
-#define WIDGET_MAX_TRANS 0x000001f0
-#define WIDGET_PCI_SPEED 0x00000030
-#define WIDGET_PCI_SPEED_SHFT 4
-#define WIDGET_PCI_SPEED_33MHZ 0
-#define WIDGET_PCI_SPEED_66MHZ 1
-#define WIDGET_WIDGET_ID 0x0000000f
-
-/* WIDGET_INTDEST_UPPER_ADDR */
-#define WIDGET_INT_VECTOR 0xff000000
-#define WIDGET_INT_VECTOR_SHFT 24
-#define WIDGET_TARGET_ID 0x000f0000
-#define WIDGET_TARGET_ID_SHFT 16
-#define WIDGET_UPP_ADDR 0x0000ffff
-
-/* WIDGET_ERR_CMD_WORD */
-#define WIDGET_DIDN 0xf0000000
-#define WIDGET_SIDN 0x0f000000
-#define WIDGET_PACTYP 0x00f00000
-#define WIDGET_TNUM 0x000f8000
-#define WIDGET_COHERENT 0x00004000
-#define WIDGET_DS 0x00003000
-#define WIDGET_GBR 0x00000800
-#define WIDGET_VBPM 0x00000400
-#define WIDGET_ERROR 0x00000200
-#define WIDGET_BARRIER 0x00000100
-
-/* WIDGET_LLP_CFG */
-#define WIDGET_LLP_MAXRETRY 0x03ff0000
-#define WIDGET_LLP_MAXRETRY_SHFT 16
-#define WIDGET_LLP_NULLTIMEOUT 0x0000fc00
-#define WIDGET_LLP_NULLTIMEOUT_SHFT 10
-#define WIDGET_LLP_MAXBURST 0x000003ff
-#define WIDGET_LLP_MAXBURST_SHFT 0
-
-/*
- * according to the crosstalk spec, only 32-bits access to the widget
- * configuration registers is allowed. some widgets may allow 64-bits
- * access but software should not depend on it. registers beyond the
- * widget target flush register are widget dependent thus will not be
- * defined here
- */
-#ifndef __ASSEMBLY__
-typedef uint32_t widgetreg_t;
-
-/* widget configuration registers */
-typedef volatile struct widget_cfg {
-/*
- * we access these through synergy unswizzled space, so the address
- * gets twiddled (i.e. references to 0x4 actually go to 0x0 and vv.)
- * That's why we put the register first and filler second.
- */
- widgetreg_t w_id; /* 0x04 */
- widgetreg_t w_pad_0; /* 0x00 */
- widgetreg_t w_status; /* 0x0c */
- widgetreg_t w_pad_1; /* 0x08 */
- widgetreg_t w_err_upper_addr; /* 0x14 */
- widgetreg_t w_pad_2; /* 0x10 */
- widgetreg_t w_err_lower_addr; /* 0x1c */
- widgetreg_t w_pad_3; /* 0x18 */
- widgetreg_t w_control; /* 0x24 */
- widgetreg_t w_pad_4; /* 0x20 */
- widgetreg_t w_req_timeout; /* 0x2c */
- widgetreg_t w_pad_5; /* 0x28 */
- widgetreg_t w_intdest_upper_addr; /* 0x34 */
- widgetreg_t w_pad_6; /* 0x30 */
- widgetreg_t w_intdest_lower_addr; /* 0x3c */
- widgetreg_t w_pad_7; /* 0x38 */
- widgetreg_t w_err_cmd_word; /* 0x44 */
- widgetreg_t w_pad_8; /* 0x40 */
- widgetreg_t w_llp_cfg; /* 0x4c */
- widgetreg_t w_pad_9; /* 0x48 */
- widgetreg_t w_tflush; /* 0x54 */
- widgetreg_t w_pad_10; /* 0x50 */
-} widget_cfg_t;
-
-typedef struct {
- unsigned int other:8;
- unsigned int bo:1;
- unsigned int error:1;
- unsigned int vbpm:1;
- unsigned int gbr:1;
- unsigned int ds:2;
- unsigned int ct:1;
- unsigned int tnum:5;
- unsigned int pactyp:4;
- unsigned int sidn:4;
- unsigned int didn:4;
-} w_err_cmd_word_f;
-
-typedef union {
- w_err_cmd_word_f f;
- widgetreg_t r;
-} w_err_cmd_word_u;
-
-/* IO widget initialization function */
-typedef struct xwidget_info_s *xwidget_info_t;
-
-/*
- * Crosstalk Widget Hardware Identification, as defined in the Crosstalk spec.
- */
-typedef struct xwidget_hwid_s {
- xwidget_mfg_num_t mfg_num;
- xwidget_rev_num_t rev_num;
- xwidget_part_num_t part_num;
-} *xwidget_hwid_t;
-
-
-/*
- * Returns 1 if a driver that handles devices described by hwid1 is able
- * to manage a device with hardwareid hwid2. NOTE: We don't check rev
- * numbers at all.
- */
-#define XWIDGET_HARDWARE_ID_MATCH(hwid1, hwid2) \
- (((hwid1)->part_num == (hwid2)->part_num) && \
- (((hwid1)->mfg_num == XWIDGET_MFG_NUM_NONE) || \
- ((hwid2)->mfg_num == XWIDGET_MFG_NUM_NONE) || \
- ((hwid1)->mfg_num == (hwid2)->mfg_num)))
-
-
-/* Generic crosstalk widget initialization interface */
-#ifdef __KERNEL__
-
-extern int xwidget_driver_register(xwidget_part_num_t part_num,
- xwidget_mfg_num_t mfg_num,
- char *driver_prefix,
- unsigned int flags);
-
-extern void xwidget_driver_unregister(char *driver_prefix);
-
-extern int xwidget_register(struct xwidget_hwid_s *hwid,
- vertex_hdl_t dev,
- xwidgetnum_t id,
- vertex_hdl_t master,
- xwidgetnum_t targetid);
-
-extern int xwidget_unregister(vertex_hdl_t);
-
-extern void xwidget_reset(vertex_hdl_t xwidget);
-extern void xwidget_gfx_reset(vertex_hdl_t xwidget);
-extern char *xwidget_name_get(vertex_hdl_t xwidget);
-
-/* Generic crosstalk widget information access interface */
-extern xwidget_info_t xwidget_info_chk(vertex_hdl_t widget);
-extern xwidget_info_t xwidget_info_get(vertex_hdl_t widget);
-extern void xwidget_info_set(vertex_hdl_t widget, xwidget_info_t widget_info);
-extern vertex_hdl_t xwidget_info_dev_get(xwidget_info_t xwidget_info);
-extern xwidgetnum_t xwidget_info_id_get(xwidget_info_t xwidget_info);
-extern int xwidget_info_type_get(xwidget_info_t xwidget_info);
-extern int xwidget_info_state_get(xwidget_info_t xwidget_info);
-extern vertex_hdl_t xwidget_info_master_get(xwidget_info_t xwidget_info);
-extern xwidgetnum_t xwidget_info_masterid_get(xwidget_info_t xwidget_info);
-extern xwidget_part_num_t xwidget_info_part_num_get(xwidget_info_t xwidget_info);
-extern xwidget_rev_num_t xwidget_info_rev_num_get(xwidget_info_t xwidget_info);
-extern xwidget_mfg_num_t xwidget_info_mfg_num_get(xwidget_info_t xwidget_info);
-
-extern xwidgetnum_t hub_widget_id(nasid_t);
-
-
-
-/*
- * TBD: DELETE THIS ENTIRE STRUCTURE! Equivalent is now in
- * xtalk_private.h: xwidget_info_s
- * This is just here for now because we still have a lot of
- * junk referencing it.
- * However, since nobody looks inside ...
- */
-typedef struct v_widget_s {
- unsigned int v_widget_s_is_really_empty;
-#define v_widget_s_is_really_empty and using this would be a syntax error.
-} v_widget_t;
-#endif /* _KERNEL */
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* _ASM_IA64_SN_XTALK_XWIDGET_H */
+++ /dev/null
-#ifndef _ASM_ADB_MOUSE_H
-#define _ASM_ADB_MOUSE_H
-
-/*
- * linux/include/asm-m68k/adb_mouse.h
- * header file for Macintosh ADB mouse driver
- * 27-10-97 Michael Schmitz
- * copied from:
- * header file for Atari Mouse driver
- * by Robert de Vries (robert@and.nl) on 19Jul93
- */
-
-struct mouse_status {
- char buttons;
- short dx;
- short dy;
- int ready;
- int active;
- wait_queue_head_t wait;
- struct fasync_struct *fasyncptr;
-};
-
-#endif
+++ /dev/null
-#ifndef _ATARI_SCCSERIAL_H
-#define _ATARI_SCCSERIAL_H
-
-/* Special configuration ioctls for the Atari SCC5380 Serial
- * Communications Controller
- */
-
-/* ioctl command codes */
-
-#define TIOCGATSCC 0x54c0 /* get SCC configuration */
-#define TIOCSATSCC 0x54c1 /* set SCC configuration */
-#define TIOCDATSCC 0x54c2 /* reset configuration to defaults */
-
-/* Clock sources */
-
-#define CLK_RTxC 0
-#define CLK_TRxC 1
-#define CLK_PCLK 2
-
-/* baud_bases for the common clocks in the Atari. These are the real
- * frequencies divided by 16.
- */
-
-#define SCC_BAUD_BASE_TIMC 19200 /* 0.3072 MHz from TT-MFP, Timer C */
-#define SCC_BAUD_BASE_BCLK 153600 /* 2.4576 MHz */
-#define SCC_BAUD_BASE_PCLK4 229500 /* 3.6720 MHz */
-#define SCC_BAUD_BASE_PCLK 503374 /* 8.0539763 MHz */
-#define SCC_BAUD_BASE_NONE 0 /* for not connected or unused
- * clock sources */
-
-#define SCC_BAUD_BASE_M147_PCLK 312500 /* 5 MHz */
-#define SCC_BAUD_BASE_M147 312500 /* 5 MHz */
-#define SCC_BAUD_BASE_MVME_PCLK 781250 /* 12.5 MHz */
-#define SCC_BAUD_BASE_MVME 625000 /* 10.000 MHz */
-#define SCC_BAUD_BASE_BVME_PCLK 781250 /* 12.5 MHz */ /* XXX ??? */
-#define SCC_BAUD_BASE_BVME 460800 /* 7.3728 MHz */
-
-/* The SCC configuration structure */
-
-struct atari_SCCserial {
- unsigned RTxC_base; /* base_baud of RTxC */
- unsigned TRxC_base; /* base_baud of TRxC */
- unsigned PCLK_base; /* base_baud of PCLK, for both channels! */
- struct {
- unsigned clksrc; /* CLK_RTxC, CLK_TRxC or CLK_PCLK */
- unsigned divisor; /* divisor for base baud, valid values:
- * see below */
- } baud_table[17]; /* For 50, 75, 110, 135, 150, 200, 300,
- * 600, 1200, 1800, 2400, 4800, 9600,
- * 19200, 38400, 57600 and 115200 bps. The
- * last two could be replaced by other
- * rates > 38400 if they're not possible.
- */
-};
-
-/* The following divisors are valid:
- *
- * - CLK_RTxC: 1 or even (1, 2 and 4 are the direct modes, > 4 use
- * the BRG)
- *
- * - CLK_TRxC: 1, 2 or 4 (no BRG, only direct modes possible)
- *
- * - CLK_PCLK: >= 4 and even (no direct modes, only BRG)
- *
- */
-
-#endif /* _ATARI_SCCSERIAL_H */
+++ /dev/null
-#ifndef _ASM_M68K_CPUMASK_H
-#define _ASM_M68K_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_M68K_CPUMASK_H */
+++ /dev/null
-#ifndef _M68K_INIT_H
-#define _M68K_INIT_H
-
-#define __init __attribute__ ((__section__ (".text.init")))
-#define __initdata __attribute__ ((__section__ (".data.init")))
-/* For assembly routines */
-#define __INIT .section ".text.init",#alloc,#execinstr
-#define __FINIT .previous
-#define __INITDATA .section ".data.init",#alloc,#write
-
-#endif
+++ /dev/null
-#ifndef _M68K_RMAP_H
-#define _M68K_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#endif
+++ /dev/null
-#ifndef _ASM_M68KNOMMU_CPUMASK_H
-#define _ASM_M68KNOMMU_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_M68KNOMMU_CPUMASK_H */
+++ /dev/null
-#include <asm-m68k/init.h>
+++ /dev/null
-#include <asm-m68k/keyboard.h>
+++ /dev/null
-/****************************************************************************/
-
-/*
- * m5282sim.h -- ColdFire 5282 System Integration Module support.
- *
- * (C) Copyright 2003, Greg Ungerer (gerg@snapgear.com)
- */
-
-/****************************************************************************/
-#ifndef m5282sim_h
-#define m5282sim_h
-/****************************************************************************/
-
-#include <linux/config.h>
-
-/*
- * Define the 5282 SIM register set addresses.
- */
-#define MCFICM_INTC0 0x0c00 /* Base for Interrupt Ctrl 0 */
-#define MCFICM_INTC1 0x0d00 /* Base for Interrupt Ctrl 0 */
-#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
-#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
-#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
-#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
-#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
-#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
-#define MCFINTC_IRLR 0x18 /* */
-#define MCFINTC_IACKL 0x19 /* */
-#define MCFINTC_ICR0 0x40 /* Base ICR register */
-
-#define MCFINT_UART0 13 /* Interrupt number for UART0 */
-#define MCFINT_PIT1 55 /* Interrupt number for PIT1 */
-
-/****************************************************************************/
-#endif /* m5282sim_h */
+++ /dev/null
-/****************************************************************************/
-
-/*
- * nap.h -- Marconi/NAP support.
- *
- * (C) Copyright 2001, SnapGear (www.snapgear.com)
- */
-
-/****************************************************************************/
-#ifndef nap_h
-#define nap_h
-/****************************************************************************/
-
-#include <linux/config.h>
-
-/****************************************************************************/
-#ifdef CONFIG_MARCONINAP
-/****************************************************************************/
-
-#ifdef CONFIG_COLDFIRE
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#endif
-
-/*
- * Command to support selecting RS232 or RS422 mode on the
- * second COM port.
- */
-#define TIOCSET422 0x4d01 /* Set port mode 232 or 422 */
-#define TIOCGET422 0x4d02 /* Get current port mode */
-
-/*
- * Low level control of the RS232/422 enable.
- */
-#define MCFPP_PA11 0x0800
-
-#ifndef __ASSEMBLY__
-/*
- * RS232/422 control is via the single PA11 line. Low is the RS422
- * enable, high is RS232 mode.
- */
-static __inline__ unsigned int mcf_getpa(void)
-{
- volatile unsigned short *pp;
- pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT);
- return((unsigned int) *pp);
-}
-
-static __inline__ void mcf_setpa(unsigned int mask, unsigned int bits)
-{
- volatile unsigned short *pp;
- unsigned long flags;
-
- pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT);
- save_flags(flags); cli();
- *pp = (*pp & ~mask) | bits;
- restore_flags(flags);
-}
-#endif /* __ASSEMBLY__ */
-
-/****************************************************************************/
-
-#if defined(CONFIG_M5272)
-/*
- * Marconi/NAP based hardware. DTR/DCD lines are wired to GPB lines.
- */
-#define MCFPP_DCD0 0x0080
-#define MCFPP_DCD1 0x0020
-#define MCFPP_DTR0 0x0040
-#define MCFPP_DTR1 0x0010
-
-#ifndef __ASSEMBLY__
-/*
- * These functions defined to give quasi generic access to the
- * PPIO bits used for DTR/DCD.
- */
-static __inline__ unsigned int mcf_getppdata(void)
-{
- volatile unsigned short *pp;
- pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PBDAT);
- return((unsigned int) *pp);
-}
-
-static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
-{
- volatile unsigned short *pp;
- pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PBDAT);
- *pp = (*pp & ~mask) | bits;
-}
-#endif /* __ASSEMBLY__ */
-#endif /* CONFIG_M5272 */
-
-/****************************************************************************/
-#endif /* CONFIG_MARCONINAP */
-/****************************************************************************/
-#endif /* nap_h */
+++ /dev/null
-/* Do not need anything here */
-
+++ /dev/null
-
-/* Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>,
- */
-
-#ifndef _M68K_SHGLCORE_H
-#define _M68K_SHGLCORE_H
-
-#include <linux/config.h>
-
-#ifdef CONFIG_SHGLCORE
-
-#include <asm/MC68332.h>
-
-#ifdef CONFIG_SHGLCORE_2MEG
-
-#define SHGLCORE_ROM_BANK_0_ADDR 0x000000
-#define SHGLCORE_ROM_BANK_1_ADDR 0x100000
-#define SHGLCORE_RAM_BANK_0_ADDR 0x200000
-#define SHGLCORE_RAM_BANK_1_ADDR 0x300000
-#define SHGLCORE_FLASH_BANK_0_ADDR 0x400000
-
-#define SHGLCORE_ROM_BANK_0_LENGTH 0x100000
-#define SHGLCORE_ROM_BANK_1_LENGTH 0x100000
-#define SHGLCORE_RAM_BANK_0_LENGTH 0x100000
-#define SHGLCORE_RAM_BANK_1_LENGTH 0x100000
-#define SHGLCORE_FLASH_BANK_0_LENGTH 0x80000
-
-#define SHGLCORE_ACC_ADDR 0x600000
-#define SHGLCORE_LANCE_ADDR 0x700000
-
-#else
-
-#define SHGLCORE_ROM_BANK_0_ADDR 0x000000
-#define SHGLCORE_RAM_BANK_0_ADDR 0x100000
-#define SHGLCORE_FLASH_BANK_0_ADDR 0x300000
-
-#define SHGLCORE_ROM_BANK_0_LENGTH 0x100000
-#define SHGLCORE_RAM_BANK_0_LENGTH 0x100000
-#define SHGLCORE_FLASH_BANK_0_LENGTH 0x80000
-
-#define SHGLCORE_ACC_ADDR 0x400000
-#define SHGLCORE_LANCE_ADDR 0x500000
-
-#endif
-
-#define MAX_DMA_ADDRESS SHGLCORE_RAM_BANK_0_ADDR + SHGLCORE_RAM_BANK_0_LENGTH
-
-#define SHGLCORE_LATCH_ADDR (SHGLCORE_ACC_ADDR+0x100)
-#define SHGLCORE_1865_0_ADDR (SHGLCORE_ACC_ADDR+0x600)
-#define SHGLCORE_1865_1_ADDR (SHGLCORE_ACC_ADDR+0x700)
-
-#define SHGLCORE_LATCH_BIT(x) BYTE_REF(SHGLCORE_LATCH_ADDR+x)
-
-#define SHGLCORE_LATCH_STATUS_LED 0
-#define SHGLCORE_LATCH_ERROR_LED 1
-#define SHGLCORE_LATCH_ALARM_LED 2
-
-#define SHGLCORE_LATCH_1865 4
-
-#define SHGLCORE_LATCH_RELAY_1 6
-#define SHGLCORE_LATCH_RELAY_2 7
-
-#endif /* SHGLCORE */
-
-#endif /* _M68K_SHGLCORE_H */
+++ /dev/null
-
-/* Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>,
- * 1997, 1998 D. Jeff Dionne <jeff@lineo.ca>,
- */
-
-#ifndef _M68K_SHGLPORTS_H
-#define _M68K_SHGLPORTS_H
-
-#include <linux/config.h>
-#include <linux/sched.h>
-
-#ifdef CONFIG_SHGLCORE
-
-extern struct semaphore porte_interlock;
-
-struct SHGLCORE_PORT_QS {
- unsigned char
- nullqs:1, /* COM1TX */
- sbin:1, /* PQS6 (PCS3) */
- sbclk:1, /* PQS5 (PCS2) */
- sbout:1, /* PQS4 (PCS1) */
- null4:4; /* MISO, MOSI, SCLK, /SS=PCS0 */
-};
-
-#define PORT_QS ((volatile struct SHGLCORE_PORT_QS*)PORTQS_ADDR)
-
-struct SHGLCORE_PORT_E {
- unsigned char
- dead:1, /* LED */
- sbirigb:1, /* PE6 */
- ds:1, /* /DS */
- nulle1:1, /* na */
- sbpll:1, /* PE3 */
- avec:1, /* /AVEC */
- sbsrom:1, /* PE1 */
- sbpanel:1; /* PE0 */
-};
-
-#define PORT_E ((volatile struct SHGLCORE_PORT_E*)PORTE_ADDR)
-
-struct SHGLCORE_PORT_F {
- unsigned char
- nullf1:4,
- nullf2:4;
-};
-
-#define PORT_F ((volatile struct SHGLCORE_PORT_F*)PORTF_ADDR)
-
-extern int comm_status_led, comm_error_led, alarm_led;
-
-static inline void SET_COMM_STATUS_LED(int value) {
- BYTE_REF(SHGLCORE_ACC_ADDR+0x100+0) = comm_status_led = value;
-}
-static inline int GET_COMM_STATUS_LED(void) {
- return comm_status_led;
-}
-
-
-static inline void SET_COMM_ERROR_LED(int value) {
- BYTE_REF(SHGLCORE_ACC_ADDR+0x100+1) = comm_error_led = value;
-}
-static inline int GET_COMM_ERROR_LED(void) {
- return comm_error_led;
-}
-
-
-static inline void SET_ALARM_LED(int value) {
- BYTE_REF(SHGLCORE_ACC_ADDR+0x100+2) = alarm_led = value;
-}
-static inline int GET_ALARM_LED(void) {
- return alarm_led;
-}
-
-#endif
-
-#endif /* _M68K_SHGLPORTS_H */
+++ /dev/null
-/*
- * baget.h: Definitions specific to Baget/MIPS machines.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#ifndef _MIPS_BAGET_H
-#define _MIPS_BAGET_H
-
-#include "vic.h"
-#include "vac.h"
-
-#define VIC_BASE 0xBFFC0000
-#define VAC_BASE 0xBFFD0000
-
-
-/* Baget interrupt registers and their sizes */
-
-struct baget_int_reg {
- unsigned long address;
- int size; /* in bytes */
-};
-#define BAGET_INT_NONE {0,0}
-
-#define BAGET_INT0_ACK {0xbffa0003,1}
-#define BAGET_INT1_ACK {0xbffa0008,4}
-#define BAGET_INT5_ACK {0xbff00000,1}
-
-#define BAGET_WRERR_ACK ((volatile char*)0xbff00000)
-
-
-/* Baget address spaces */
-
-#define BAGET_A24M_BASE 0xFC000000 /* VME-master A24 base address */
-#define BAGET_A24S_BASE 0x00000000 /* VME-slave A24 base address */
-#define BAGET_A24S_MASK 0x00c00000 /* VME-slave A24 address mask */
-#define BAGET_GSW_BASE 0xf000 /* global switches address base */
-#define BAGET_MSW_BASE(P) (0xe000+(P)*0x100) /* module switches address base */
-
-#define BAGET_LED_BASE ((volatile short *)(0xbffd0000 + 0x00001800))
-
-#define BAGET_PIL_NR 8
-#define BAGET_IRQ_NR NR_IRQS /* 64 */
-#define BAGET_IRQ_MASK(x) ((NR_IRQS-1) & (x))
-
-#define BAGET_FPU_IRQ 0x26
-#define BAGET_VIC_TIMER_IRQ 0x32
-#define BAGET_VAC_TIMER_IRQ 0x36
-#define BAGET_BSM_IRQ 0x3C
-
-#define BAGET_LANCE_MEM_BASE 0xfcf10000
-#define BAGET_LANCE_MEM_SIZE 0x10000
-#define BAGET_LANCE_IO_BASE 0xbffeff00
-
-#define BALO_OFFSET 0x400000 /* sync with ld.script.balo */
-#define BALO_SIZE 0x200000 /* sync with image segs size */
-
-/* move it to the right place, somehere in include/asm */
-#define CAUSE_DBE 0x1C
-#define CAUSE_MASK 0x7C
-
-/* Simple debug fascilities */
-extern void outc(char);
-extern void outs(char *);
-extern void baget_write(char *s, int l);
-extern int baget_printk(const char *, ...);
-extern void balo_printf( char *f, ... );
-extern void balo_hungup(void);
-
-#endif /* !(_MIPS_BAGET_H) */
+++ /dev/null
-/*
- * vac.h: Various VIC controller defines. The VIC is a VME controller
- * used in Baget/MIPS series.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#ifndef _ASM_VAC_H
-#define _ASM_VAC_H
-
-#define VAC_SLSEL1_MASK 0x000
-#define VAC_SLSEL1_BASE 0x100
-#define VAC_SLSEL0_MASK 0x200
-#define VAC_SLSEL0_BASE 0x300
-#define VAC_ICFSEL_BASE 0x400
-#define VAC_ICFSEL_GLOBAL_VAL(x) (((x)>>8)&0xff)
-#define VAC_ICFSEL_MODULE_VAL(x) ((x)&0xff)
-#define VAC_DRAM_MASK 0x500
-#define VAC_BNDR2 0x600
-#define VAC_BNDR3 0x700
-#define VAC_A24_BASE 0x800
-#define VAC_A24_MASK (0x3f<<9)
-#define VAC_A24_D32_ENABLE (1<<8)
-#define VAC_A24_A24_CACHINH (1<<7)
-#define VAC_A24_A16D32_ENABLE (1<<6)
-#define VAC_A24_A16D32 (1<<5)
-#define VAC_A24_DATAPATH (1<<4)
-#define VAC_A24_IO_CACHINH (1<<3)
-#define VAC_REG1 0x900
-#define VAC_REG2 0xA00
-#define VAC_REG3 0xB00
-#define VAC_REG_WORD (1<<15)
-#define VAC_REG_ASIZ1 (1<<14)
-#define VAC_REG_ASIZ0 (1<<13)
-#define VAC_REG_ASIZ_VAL(x) (((x)>>13)&3)
-#define VAC_REG_CACHINH (1<<12)
-#define VAC_REG_INACTIVE (0<<10)
-#define VAC_REG_SHARED (1<<10)
-#define VAC_REG_VSB (2<<10)
-#define VAC_REG_MWB (3<<10)
-#define VAC_REG_MASK (3<<10)
-#define VAC_REG_MODE(x) (((x)>>10)&3)
-#define VAC_IOSEL4_CTRL 0xC00
-#define VAC_IOSEL5_CTRL 0xD00
-#define VAC_SHRCS_CTRL 0xE00
-#define VAC_EPROMCS_CTRL 0xF00
-#define VAC_IOSEL0_CTRL 0x1000
-#define VAC_IOSEL1_CTRL 0x1100
-#define VAC_IOSEL2_CTRL 0x1200
-#define VAC_IOSEL3_CTRL 0x1300
-#define VAC_CTRL_IOWR (1<<0)
-#define VAC_CTRL_IORD (1<<1)
-#define VAC_CTRL_DELAY_IOSELI(x) (((x)&3)<<2)
-#define VAC_CTRL_DELAY_IOSELI_VAL(x) (((x)>>2)&3)
-#define VAC_CTRL_DELAY_IOWR(x) (((x)&3)<<4)
-#define VAC_CTRL_DELAY_IOWR_VAL(x) (((x)>>4)&3)
-#define VAC_CTRL_DELAY_IORD(x) (((x)&3)<<6)
-#define VAC_CTRL_DELAY_IORD_VAL(x) (((x)>>6)&3)
-#define VAC_CTRL_RECOVERY_IOSELI(x) ((((x)-1)&7)<<8)
-#define VAC_CTRL_RECOVERY_IOSELI_VAL(x) ((((x)>>8)&7)+1)
-#define VAC_CTRL_DSACK0 (1<<11)
-#define VAC_CTRL_DSACK1 (1<<12)
-#define VAC_CTRL_DELAY_DSACKI(x) ((((x)-1)&7)<<13)
-#define VAC_CTRL_DELAY_DSACKI_VAL(x) ((((x)>>13)&7)+1)
-#define VAC_DECODE_CTRL 0x1400
-#define VAC_DECODE_FPUCS (1<<0)
-#define VAC_DECODE_CPUCLK(x) (((x)&3)<<1)
-#define VAC_DECODE_CPUCLK_VAL(x) (((x)>>1)&3)
-#define VAC_DECODE_RDR_SLSEL0 (1<<3)
-#define VAC_DECODE_RDR_SLSEL1 (1<<4)
-#define VAC_DECODE_DSACK (1<<5)
-#define VAC_DECODE_QFY_BNDR (1<<6)
-#define VAC_DECODE_QFY_ICFSEL (1<<7)
-#define VAC_DECODE_QFY_SLSEL1 (1<<8)
-#define VAC_DECODE_QFY_SLSEL0 (1<<9)
-#define VAC_DECODE_CMP_SLSEL1_LO (1<<10)
-#define VAC_DECODE_CMP_SLSEL1_HI (1<<11)
-#define VAC_DECODE_CMP_SLSEL1_VAL(x) (((x)>>10)&3)
-#define VAC_DECODE_DRAMCS (3<<12)
-#define VAC_DECODE_SHRCS (2<<12)
-#define VAC_DECODE_VSBSEL (1<<12)
-#define VAC_DECODE_EPROMCS (0<<12)
-#define VAC_DECODE_MODE_VAL(x) (((x)>>12)&3)
-#define VAC_DECODE_QFY_DRAMCS (1<<14)
-#define VAC_DECODE_DSACKI (1<<15)
-#define VAC_INT_STATUS 0x1500
-#define VAC_INT_CTRL 0x1600
-#define VAC_INT_CTRL_TIMER_PIO11 (3<<0)
-#define VAC_INT_CTRL_TIMER_PIO10 (2<<0)
-#define VAC_INT_CTRL_TIMER_PIO7 (1<<0)
-#define VAC_INT_CTRL_TIMER_DISABLE (0<<0)
-#define VAC_INT_CTRL_TIMER_MASK (3<<0)
-#define VAC_INT_CTRL_UART_B_PIO11 (3<<2)
-#define VAC_INT_CTRL_UART_B_PIO10 (2<<2)
-#define VAC_INT_CTRL_UART_B_PIO7 (1<<2)
-#define VAC_INT_CTRL_UART_B_DISABLE (0<<2)
-#define VAC_INT_CTRL_UART_A_PIO11 (3<<4)
-#define VAC_INT_CTRL_UART_A_PIO10 (2<<4)
-#define VAC_INT_CTRL_UART_A_PIO7 (1<<4)
-#define VAC_INT_CTRL_UART_A_DISABLE (0<<4)
-#define VAC_INT_CTRL_MBOX_PIO11 (3<<6)
-#define VAC_INT_CTRL_MBOX_PIO10 (2<<6)
-#define VAC_INT_CTRL_MBOX_PIO7 (1<<6)
-#define VAC_INT_CTRL_MBOX_DISABLE (0<<6)
-#define VAC_INT_CTRL_PIO4_PIO11 (3<<8)
-#define VAC_INT_CTRL_PIO4_PIO10 (2<<8)
-#define VAC_INT_CTRL_PIO4_PIO7 (1<<8)
-#define VAC_INT_CTRL_PIO4_DISABLE (0<<8)
-#define VAC_INT_CTRL_PIO7_PIO11 (3<<10)
-#define VAC_INT_CTRL_PIO7_PIO10 (2<<10)
-#define VAC_INT_CTRL_PIO7_PIO7 (1<<10)
-#define VAC_INT_CTRL_PIO7_DISABLE (0<<10)
-#define VAC_INT_CTRL_PIO8_PIO11 (3<<12)
-#define VAC_INT_CTRL_PIO8_PIO10 (2<<12)
-#define VAC_INT_CTRL_PIO8_PIO7 (1<<12)
-#define VAC_INT_CTRL_PIO8_DISABLE (0<<12)
-#define VAC_INT_CTRL_PIO9_PIO11 (3<<14)
-#define VAC_INT_CTRL_PIO9_PIO10 (2<<14)
-#define VAC_INT_CTRL_PIO9_PIO7 (1<<14)
-#define VAC_INT_CTRL_PIO9_DISABLE (0<<14)
-#define VAC_DEV_LOC 0x1700
-#define VAC_DEV_LOC_IOSEL(x) (1<<(x))
-#define VAC_PIO_DATA_OUT 0x1800
-#define VAC_PIO_PIN 0x1900
-#define VAC_PIO_DIRECTION 0x1A00
-#define VAC_PIO_DIR_OUT(x) (1<<(x))
-#define VAC_PIO_DIR_IN(x) (0<<(x))
-#define VAC_PIO_DIR_FCIACK (1<<14)
-#define VAC_PIO_FUNC 0x1B00
-#define VAC_PIO_FUNC_UART_A_TX (1<<0)
-#define VAC_PIO_FUNC_UART_A_RX (1<<1)
-#define VAC_PIO_FUNC_UART_B_TX (1<<2)
-#define VAC_PIO_FUNC_UART_B_RX (1<<3)
-#define VAC_PIO_FUNC_IORD (1<<4)
-#define VAC_PIO_FUNC_IOWR (1<<5)
-#define VAC_PIO_FUNC_IOSEL3 (1<<6)
-#define VAC_PIO_FUNC_IRQ7 (1<<7)
-#define VAC_PIO_FUNC_IOSEL4 (1<<8)
-#define VAC_PIO_FUNC_IOSEL5 (1<<9)
-#define VAC_PIO_FUNC_IRQ10 (1<<10)
-#define VAC_PIO_FUNC_IRQ11 (1<<11)
-#define VAC_PIO_FUNC_OUT (1<<12)
-#define VAC_PIO_FUNC_IOSEL2 (1<<13)
-#define VAC_PIO_FUNC_DELAY (1<<14)
-#define VAC_PIO_FUNC_FCIACK (1<<15)
-#define VAC_CPU_CLK_DIV 0x1C00
-#define VAC_UART_A_MODE 0x1D00
-#define VAC_UART_MODE_PARITY_ENABLE (1<<15) /* Inversed in manual ? */
-#define VAC_UART_MODE_PARITY_ODD (1<<14) /* Inversed in manual ? */
-#define VAC_UART_MODE_8BIT_CHAR (1<<13)
-#define VAC_UART_MODE_BAUD(x) (((x)&7)<<10)
-#define VAC_UART_MODE_CHAR_RX_ENABLE (1<<9)
-#define VAC_UART_MODE_CHAR_TX_ENABLE (1<<8)
-#define VAC_UART_MODE_TX_ENABLE (1<<7)
-#define VAC_UART_MODE_RX_ENABLE (1<<6)
-#define VAC_UART_MODE_SEND_BREAK (1<<5)
-#define VAC_UART_MODE_LOOPBACK (1<<4)
-#define VAC_UART_MODE_INITIAL (VAC_UART_MODE_8BIT_CHAR | \
- VAC_UART_MODE_TX_ENABLE | \
- VAC_UART_MODE_RX_ENABLE | \
- VAC_UART_MODE_CHAR_TX_ENABLE | \
- VAC_UART_MODE_CHAR_RX_ENABLE | \
- VAC_UART_MODE_BAUD(5)) /* 9600/4 */
-#define VAC_UART_A_TX 0x1E00
-#define VAC_UART_B_MODE 0x1F00
-#define VAC_UART_A_RX 0x2000
-#define VAC_UART_RX_ERR_BREAK (1<<10)
-#define VAC_UART_RX_ERR_FRAME (1<<9)
-#define VAC_UART_RX_ERR_PARITY (1<<8)
-#define VAC_UART_RX_DATA_MASK (0xff)
-#define VAC_UART_B_RX 0x2100
-#define VAC_UART_B_TX 0x2200
-#define VAC_UART_A_INT_MASK 0x2300
-#define VAC_UART_INT_RX_READY (1<<15)
-#define VAC_UART_INT_RX_FULL (1<<14)
-#define VAC_UART_INT_RX_BREAK_CHANGE (1<<13)
-#define VAC_UART_INT_RX_ERRS (1<<12)
-#define VAC_UART_INT_TX_READY (1<<11)
-#define VAC_UART_INT_TX_EMPTY (1<<10)
-#define VAC_UART_B_INT_MASK 0x2400
-#define VAC_UART_A_INT_STATUS 0x2500
-#define VAC_UART_STATUS_RX_READY (1<<15)
-#define VAC_UART_STATUS_RX_FULL (1<<14)
-#define VAC_UART_STATUS_RX_BREAK_CHANGE (1<<13)
-#define VAC_UART_STATUS_RX_ERR_PARITY (1<<12)
-#define VAC_UART_STATUS_RX_ERR_FRAME (1<<11)
-#define VAC_UART_STATUS_RX_ERR_OVERRUN (1<<10)
-#define VAC_UART_STATUS_TX_READY (1<<9)
-#define VAC_UART_STATUS_TX_EMPTY (1<<8)
-#define VAC_UART_STATUS_INTS (0xff<<8)
-#define VAC_UART_B_INT_STATUS 0x2600
-#define VAC_TIMER_DATA 0x2700
-#define VAC_TIMER_CTRL 0x2800
-#define VAC_TIMER_ONCE (1<<15)
-#define VAC_TIMER_ENABLE (1<<14)
-#define VAC_TIMER_PRESCALE(x) (((x)&0x3F)<<8)
-#define VAC_ID 0x2900
-
-
-#ifndef __ASSEMBLY__
-
-#define vac_inb(p) (*(volatile unsigned char *)(VAC_BASE + (p)))
-#define vac_outb(v,p) (*((volatile unsigned char *)(VAC_BASE + (p))) = v)
-#define vac_inw(p) (*(volatile unsigned short*)(VAC_BASE + (p)))
-#define vac_outw(v,p) (*((volatile unsigned short*)(VAC_BASE + (p))) = v)
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _ASM_VAC_H */
+++ /dev/null
-/*
- * vic.h: Various VIC controller defines. The VIC is an interrupt controller
- * used in Baget/MIPS series.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#ifndef _ASM_BAGET_VIC_H
-#define _ASM_BAGET_VIC_H
-
-#define VIC_VME_II 0x3
-#define VIC_VME_INT1 0x7
-#define VIC_VME_INT2 0xB
-#define VIC_VME_INT3 0xF
-#define VIC_VME_INT4 0x13
-#define VIC_VME_INT5 0x17
-#define VIC_VME_INT6 0x1B
-#define VIC_VME_INT7 0x1F
-#define VIC_DMA_INT 0x23
-#define VIC_LINT1 0x27
-#define VIC_LINT2 0x2B
-#define VIC_LINT3 0x2F
-#define VIC_LINT4 0x33
-#define VIC_LINT5 0x37
-#define VIC_LINT6 0x3B
-#define VIC_LINT7 0x3F
-#define VIC_ICGS_INT 0x43
-#define VIC_ICMS_INT 0x47
-#define VIC_INT_IPL(lev) ((~(lev))&0x7)
-#define VIC_INT_ACTIVE (1<<3)
-#define VIC_INT_AUTO (0<<4)
-#define VIC_INT_NOAUTO (1<<4)
-#define VIC_INT_LEVEL (0<<5)
-#define VIC_INT_EDGE (1<<5)
-#define VIC_INT_LOW (0<<6)
-#define VIC_INT_HIGH (1<<6)
-#define VIC_INT_ENABLE (0<<7)
-#define VIC_INT_DISABLE (1<<7)
-#define VIC_INT_SWITCH(x) (1<<(((x)&0x3)+4))
-#define VIC_ERR_INT 0x4B
-#define VIC_ERR_INT_SYSFAIL_ACTIVE (1<<3)
-#define VIC_ERR_INT_SYSFAIL (1<<4)
-#define VIC_ERR_INT_TIMO (1<<5)
-#define VIC_ERR_INT_WRPOST (1<<6)
-#define VIC_ERR_INT_ACFAIL (1<<7)
-#define VIC_ICGS_BASE 0x4F
-#define VIC_ICMS_BASE 0x53
-#define VIC_ICxS_BASE_GSWITCH_MASK 0x3
-#define VIC_ICxS_BASE_ID(x) (((x)&0x3f)<<2)
-#define VIC_LOCAL_BASE 0x57
-#define VIC_LOCAL_BASE_LINT_MASK 0x7
-#define VIC_LOCAL_BASE_ID(x) (((x)&0x1f)<<3)
-#define VIC_ERR_BASE 0x5B
-#define VIC_ERR_BASE_ACFAIL 0
-#define VIC_ERR_BASE_WRPOST 1
-#define VIC_ERR_BASE_TIMO 2
-#define VIC_ERR_BASE_SYSFAIL 3
-#define VIC_ERR_BASE_VMEACK 4
-#define VIC_ERR_BASE_DMA 5
-#define VIC_ERR_BASE_ID(x) (((x)&0x1f)<<3)
-#define VIC_ICS 0x5F
-#define VIC_IC0 0x63
-#define VIC_IC1 0x67
-#define VIC_IC2 0x6B
-#define VIC_IC3 0x6F
-#define VIC_IC4 0x73
-#define VIC_ID 0x77
-#define VIC_IC6 0x7B
-#define VIC_IC6_IRESET_STATUS (1<<7)
-#define VIC_IC6_HALT_STATUS (1<<6)
-#define VIC_IC6_SYSRESET (3<<0)
-#define VIC_IC6_RESET (2<<0)
-#define VIC_IC6_HALT (1<<0)
-#define VIC_IC6_RUN (0<<0)
-#define VIC_IC7 0x7F
-#define VIC_IC7_SYSFAIL (1<<7)
-#define VIC_IC7_RESET (1<<6)
-#define VIC_IC7_VME_MASTER (1<<5)
-#define VIC_IC7_SEMSET(x) ((1<<(x))&0x1f)
-#define VIC_VME_REQ 0x83
-#define VIC_VME_BASE1 0x87
-#define VIC_VME_BASE2 0x8B
-#define VIC_VME_BASE3 0x8F
-#define VIC_VME_BASE4 0x93
-#define VIC_VME_BASE5 0x97
-#define VIC_VME_BASE6 0x9B
-#define VIC_VME_BASE7 0x9F
-#define VIC_XFER_TIMO 0xA3
-#define VIC_XFER_TIMO_VME_PERIOD_INF (7<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_512 (6<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_256 (5<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_128 (4<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_64 (3<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_32 (2<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_16 (1<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_4 (0<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_VAL(x) (((x)>>5)&7)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_INF (7<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_512 (6<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_256 (5<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_128 (4<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_64 (3<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_32 (2<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_16 (1<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_4 (0<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_VAL(x) (((x)>>2)&7)
-#define VIC_XFER_TIMO_ARB (1<<1)
-#define VIC_XFER_TIMO_VME (1<<0)
-#define VIC_LOCAL_TIM 0xA7
-#define VIC_LOCAL_TIM_PAS_ASSERT(x) (((x)-2)&0xf)
-#define VIC_LOCAL_TIM_PAS_ASSERT_VAL(x) (((x)&0xf)+2)
-#define VIC_LOCAT_TIM_DS_DEASSERT(x) ((((x)-1)&1)<<4)
-#define VIC_LOCAT_TIM_DS_DEASSERT_VAL(x) ((((x)>>4)&1)+1)
-#define VIC_LOCAL_TIM_PAS_DEASSERT(x) ((((x)-1)&0x7)<<5)
-#define VIC_LOCAL_TIM_PAS_DEASSERT_VAL(x) ((((x)>>5)&0x7)+1)
-#define VIC_BXFER_DEF 0xAB
-#define VIC_BXFER_DEF_VME_CROSS (1<<3)
-#define VIC_BXFER_DEF_LOCAL_CROSS (1<<2)
-#define VIC_BXFER_DEF_AMSR (1<<1)
-#define VIC_BXFER_DEF_DUAL (1<<0)
-#define VIC_IFACE_CFG 0xAF
-#define VIC_IFACE_CFG_RMC3 (1<<7)
-#define VIC_IFACE_CFG_RMC2 (1<<6)
-#define VIC_IFACE_CFG_RMC1 (1<<5)
-#define VIC_IFACE_CFG_HALT (1<<4)
-#define VIC_IFACE_CFG_NOHALT (0<<4)
-#define VIC_IFACE_CFG_NORMC (1<<3)
-#define VIC_IFACE_CFG_DEADLOCK_VAL(x) (((x)>>3)&3)
-#define VIC_IFACE_CFG_MSTAB (1<<2)
-#define VIC_IFACE_CFG_TURBO (1<<1)
-#define VIC_IFACE_CFG_NOTURBO (0<<1)
-#define VIC_IFACE_CFG_VME (1<<0)
-#define VIC_REQ_CFG 0xB3
-#define VIC_REQ_CFG_FAIRNESS_DISABLED 0
-#define VIC_REQ_CFG_FAIRNESS_ENABLED 1
-#define VIC_REQ_CFG_TIMO_DISABLED 0xf
-#define VIC_REQ_CFG_DRAM_REFRESH (1<<4)
-#define VIC_REQ_CFG_LEVEL(x) (((x)&3)<<5)
-#define VIC_REQ_CFG_PRIO_ARBITRATION (1<<7)
-#define VIC_REQ_CFG_RR_ARBITRATION (0<<7)
-#define VIC_AMS 0xB7
-#define VIC_AMS_AM_2_0 (1<<7)
-#define VIC_AMS_AM_5_3 (1<<6)
-#define VIC_AMS_CODE(x) ((x)&0x1f)
-#define VIC_BERR_STATUS 0xBB
-#define VIC_DMA_STATUS 0xBF
-#define VIC_SS0CR0 0xC3
-#define VIC_SS1CR0 0xCB
-#define VIC_SSxCR0_LOCAL_XFER_ACCEL (2)
-#define VIC_SSxCR0_LOCAL_XFER_SINGLE (1)
-#define VIC_SSxCR0_LOCAL_XFER_NONE (0)
-#define VIC_SSxCR0_A32 (0<<2)
-#define VIC_SSxCR0_A24 (1<<2)
-#define VIC_SSxCR0_A16 (2<<2)
-#define VIC_SSxCR0_USER (3<<2)
-#define VIC_SSxCR0_D32 (1<<4)
-#define VIC_SSxCR0_SUPER (1<<5)
-#define VIC_SS0CR0_TIMER_FREQ_MASK (3<<6)
-#define VIC_SS0CR0_TIMER_FREQ_NONE (0<<6)
-#define VIC_SS0CR0_TIMER_FREQ_50HZ (1<<6)
-#define VIC_SS0CR0_TIMER_FREQ_1000HZ (2<<6)
-#define VIC_SS0CR0_TIMER_FREQ_100HZ (3<<6)
-#define VIC_SS1CR0_MASTER_WRPOST (1<<6)
-#define VIC_SS1CR0_SLAVE_WRPOST (1<<7)
-#define VIC_SS0CR1 0xC7
-#define VIC_SS1CR1 0xCF
-#define VIC_SSxCR1_TF2(x) (((x)&0xf)<<4)
-#define VIC_SSxCR1_TF1(x) ((x)&0xf)
-#define VIC_RELEASE 0xD3
-#define VIC_RELEASE_BLKXFER_BLEN(x) ((x)&0x1f)
-#define VIC_RELEASE_ROR (0<<6)
-#define VIC_RELEASE_RWD (1<<6)
-#define VIC_RELEASE_ROC (2<<6)
-#define VIC_RELEASE_BCAP (3<<6)
-#define VIC_BXFER_CTRL 0xD7
-#define VIC_BXFER_CTRL_MODULE (1<<7)
-#define VIC_BXFER_CTRL_LOCAL (1<<6)
-#define VIC_BXFER_CTRL_MOVEM (1<<5)
-#define VIC_BXFER_CTRL_READ (1<<4)
-#define VIC_BXFER_CTRL_WRITE (0<<4)
-#define VIC_BXFER_CTRL_INTERLEAVE(x) ((x)&0xf)
-#define VIC_BXFER_LEN_LO 0xDB
-#define VIC_BXFER_LEN_HI 0xDF
-#define VIC_SYS_RESET 0xE3
-
-#ifndef __ASSEMBLY__
-
-#define vic_inb(p) (*(volatile unsigned char *)(VIC_BASE + (p)))
-#define vic_outb(v,p) (*((volatile unsigned char *)(VIC_BASE + (p))) = v)
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _ASM_BAGET_VIC_H */
+++ /dev/null
-#ifndef _ASM_MIPS_CPUMASK_H
-#define _ASM_MIPS_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_MIPS_CPUMASK_H */
+++ /dev/null
-#error "<asm/init.h> should never be used - use <linux/init.h> instead"
+++ /dev/null
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * IT8172 system controller defines.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
+++ /dev/null
-/*
- * mv64340.h - MV-64340 Internal registers definition file.
- *
- * Copyright 2002 Momentum Computer, Inc.
- * Author: Matthew Dharm <mdharm@momenco.com>
- * Copyright 2002 GALILEO TECHNOLOGY, LTD.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#ifndef __ASM_MV64340_H
-#define __ASM_MV64340_H
-
-#include <asm/addrspace.h>
-#include <asm/marvell.h>
-
-/****************************************/
-/* Processor Address Space */
-/****************************************/
-
-/* DDR SDRAM BAR and size registers */
-
-#define MV64340_CS_0_BASE_ADDR 0x008
-#define MV64340_CS_0_SIZE 0x010
-#define MV64340_CS_1_BASE_ADDR 0x208
-#define MV64340_CS_1_SIZE 0x210
-#define MV64340_CS_2_BASE_ADDR 0x018
-#define MV64340_CS_2_SIZE 0x020
-#define MV64340_CS_3_BASE_ADDR 0x218
-#define MV64340_CS_3_SIZE 0x220
-
-/* Devices BAR and size registers */
-
-#define MV64340_DEV_CS0_BASE_ADDR 0x028
-#define MV64340_DEV_CS0_SIZE 0x030
-#define MV64340_DEV_CS1_BASE_ADDR 0x228
-#define MV64340_DEV_CS1_SIZE 0x230
-#define MV64340_DEV_CS2_BASE_ADDR 0x248
-#define MV64340_DEV_CS2_SIZE 0x250
-#define MV64340_DEV_CS3_BASE_ADDR 0x038
-#define MV64340_DEV_CS3_SIZE 0x040
-#define MV64340_BOOTCS_BASE_ADDR 0x238
-#define MV64340_BOOTCS_SIZE 0x240
-
-/* PCI 0 BAR and size registers */
-
-#define MV64340_PCI_0_IO_BASE_ADDR 0x048
-#define MV64340_PCI_0_IO_SIZE 0x050
-#define MV64340_PCI_0_MEMORY0_BASE_ADDR 0x058
-#define MV64340_PCI_0_MEMORY0_SIZE 0x060
-#define MV64340_PCI_0_MEMORY1_BASE_ADDR 0x080
-#define MV64340_PCI_0_MEMORY1_SIZE 0x088
-#define MV64340_PCI_0_MEMORY2_BASE_ADDR 0x258
-#define MV64340_PCI_0_MEMORY2_SIZE 0x260
-#define MV64340_PCI_0_MEMORY3_BASE_ADDR 0x280
-#define MV64340_PCI_0_MEMORY3_SIZE 0x288
-
-/* PCI 1 BAR and size registers */
-#define MV64340_PCI_1_IO_BASE_ADDR 0x090
-#define MV64340_PCI_1_IO_SIZE 0x098
-#define MV64340_PCI_1_MEMORY0_BASE_ADDR 0x0a0
-#define MV64340_PCI_1_MEMORY0_SIZE 0x0a8
-#define MV64340_PCI_1_MEMORY1_BASE_ADDR 0x0b0
-#define MV64340_PCI_1_MEMORY1_SIZE 0x0b8
-#define MV64340_PCI_1_MEMORY2_BASE_ADDR 0x2a0
-#define MV64340_PCI_1_MEMORY2_SIZE 0x2a8
-#define MV64340_PCI_1_MEMORY3_BASE_ADDR 0x2b0
-#define MV64340_PCI_1_MEMORY3_SIZE 0x2b8
-
-/* SRAM base address */
-#define MV64340_INTEGRATED_SRAM_BASE_ADDR 0x268
-
-/* internal registers space base address */
-#define MV64340_INTERNAL_SPACE_BASE_ADDR 0x068
-
-/* Enables the CS , DEV_CS , PCI 0 and PCI 1
- windows above */
-#define MV64340_BASE_ADDR_ENABLE 0x278
-
-/****************************************/
-/* PCI remap registers */
-/****************************************/
- /* PCI 0 */
-#define MV64340_PCI_0_IO_ADDR_REMAP 0x0f0
-#define MV64340_PCI_0_MEMORY0_LOW_ADDR_REMAP 0x0f8
-#define MV64340_PCI_0_MEMORY0_HIGH_ADDR_REMAP 0x320
-#define MV64340_PCI_0_MEMORY1_LOW_ADDR_REMAP 0x100
-#define MV64340_PCI_0_MEMORY1_HIGH_ADDR_REMAP 0x328
-#define MV64340_PCI_0_MEMORY2_LOW_ADDR_REMAP 0x2f8
-#define MV64340_PCI_0_MEMORY2_HIGH_ADDR_REMAP 0x330
-#define MV64340_PCI_0_MEMORY3_LOW_ADDR_REMAP 0x300
-#define MV64340_PCI_0_MEMORY3_HIGH_ADDR_REMAP 0x338
- /* PCI 1 */
-#define MV64340_PCI_1_IO_ADDR_REMAP 0x108
-#define MV64340_PCI_1_MEMORY0_LOW_ADDR_REMAP 0x110
-#define MV64340_PCI_1_MEMORY0_HIGH_ADDR_REMAP 0x340
-#define MV64340_PCI_1_MEMORY1_LOW_ADDR_REMAP 0x118
-#define MV64340_PCI_1_MEMORY1_HIGH_ADDR_REMAP 0x348
-#define MV64340_PCI_1_MEMORY2_LOW_ADDR_REMAP 0x310
-#define MV64340_PCI_1_MEMORY2_HIGH_ADDR_REMAP 0x350
-#define MV64340_PCI_1_MEMORY3_LOW_ADDR_REMAP 0x318
-#define MV64340_PCI_1_MEMORY3_HIGH_ADDR_REMAP 0x358
-
-#define MV64340_CPU_PCI_0_HEADERS_RETARGET_CONTROL 0x3b0
-#define MV64340_CPU_PCI_0_HEADERS_RETARGET_BASE 0x3b8
-#define MV64340_CPU_PCI_1_HEADERS_RETARGET_CONTROL 0x3c0
-#define MV64340_CPU_PCI_1_HEADERS_RETARGET_BASE 0x3c8
-#define MV64340_CPU_GE_HEADERS_RETARGET_CONTROL 0x3d0
-#define MV64340_CPU_GE_HEADERS_RETARGET_BASE 0x3d8
-#define MV64340_CPU_IDMA_HEADERS_RETARGET_CONTROL 0x3e0
-#define MV64340_CPU_IDMA_HEADERS_RETARGET_BASE 0x3e8
-
-/****************************************/
-/* CPU Control Registers */
-/****************************************/
-
-#define MV64340_CPU_CONFIG 0x000
-#define MV64340_CPU_MODE 0x120
-#define MV64340_CPU_MASTER_CONTROL 0x160
-#define MV64340_CPU_CROSS_BAR_CONTROL_LOW 0x150
-#define MV64340_CPU_CROSS_BAR_CONTROL_HIGH 0x158
-#define MV64340_CPU_CROSS_BAR_TIMEOUT 0x168
-
-/****************************************/
-/* SMP RegisterS */
-/****************************************/
-
-#define MV64340_SMP_WHO_AM_I 0x200
-#define MV64340_SMP_CPU0_DOORBELL 0x214
-#define MV64340_SMP_CPU0_DOORBELL_CLEAR 0x21C
-#define MV64340_SMP_CPU1_DOORBELL 0x224
-#define MV64340_SMP_CPU1_DOORBELL_CLEAR 0x22C
-#define MV64340_SMP_CPU0_DOORBELL_MASK 0x234
-#define MV64340_SMP_CPU1_DOORBELL_MASK 0x23C
-#define MV64340_SMP_SEMAPHOR0 0x244
-#define MV64340_SMP_SEMAPHOR1 0x24c
-#define MV64340_SMP_SEMAPHOR2 0x254
-#define MV64340_SMP_SEMAPHOR3 0x25c
-#define MV64340_SMP_SEMAPHOR4 0x264
-#define MV64340_SMP_SEMAPHOR5 0x26c
-#define MV64340_SMP_SEMAPHOR6 0x274
-#define MV64340_SMP_SEMAPHOR7 0x27c
-
-/****************************************/
-/* CPU Sync Barrier Register */
-/****************************************/
-
-#define MV64340_CPU_0_SYNC_BARRIER_TRIGGER 0x0c0
-#define MV64340_CPU_0_SYNC_BARRIER_VIRTUAL 0x0c8
-#define MV64340_CPU_1_SYNC_BARRIER_TRIGGER 0x0d0
-#define MV64340_CPU_1_SYNC_BARRIER_VIRTUAL 0x0d8
-
-/****************************************/
-/* CPU Access Protect */
-/****************************************/
-
-#define MV64340_CPU_PROTECT_WINDOW_0_BASE_ADDR 0x180
-#define MV64340_CPU_PROTECT_WINDOW_0_SIZE 0x188
-#define MV64340_CPU_PROTECT_WINDOW_1_BASE_ADDR 0x190
-#define MV64340_CPU_PROTECT_WINDOW_1_SIZE 0x198
-#define MV64340_CPU_PROTECT_WINDOW_2_BASE_ADDR 0x1a0
-#define MV64340_CPU_PROTECT_WINDOW_2_SIZE 0x1a8
-#define MV64340_CPU_PROTECT_WINDOW_3_BASE_ADDR 0x1b0
-#define MV64340_CPU_PROTECT_WINDOW_3_SIZE 0x1b8
-
-
-/****************************************/
-/* CPU Error Report */
-/****************************************/
-
-#define MV64340_CPU_ERROR_ADDR_LOW 0x070
-#define MV64340_CPU_ERROR_ADDR_HIGH 0x078
-#define MV64340_CPU_ERROR_DATA_LOW 0x128
-#define MV64340_CPU_ERROR_DATA_HIGH 0x130
-#define MV64340_CPU_ERROR_PARITY 0x138
-#define MV64340_CPU_ERROR_CAUSE 0x140
-#define MV64340_CPU_ERROR_MASK 0x148
-
-/****************************************/
-/* CPU Interface Debug Registers */
-/****************************************/
-
-#define MV64340_PUNIT_SLAVE_DEBUG_LOW 0x360
-#define MV64340_PUNIT_SLAVE_DEBUG_HIGH 0x368
-#define MV64340_PUNIT_MASTER_DEBUG_LOW 0x370
-#define MV64340_PUNIT_MASTER_DEBUG_HIGH 0x378
-#define MV64340_PUNIT_MMASK 0x3e4
-
-/****************************************/
-/* Integrated SRAM Registers */
-/****************************************/
-
-#define MV64340_SRAM_CONFIG 0x380
-#define MV64340_SRAM_TEST_MODE 0X3F4
-#define MV64340_SRAM_ERROR_CAUSE 0x388
-#define MV64340_SRAM_ERROR_ADDR 0x390
-#define MV64340_SRAM_ERROR_ADDR_HIGH 0X3F8
-#define MV64340_SRAM_ERROR_DATA_LOW 0x398
-#define MV64340_SRAM_ERROR_DATA_HIGH 0x3a0
-#define MV64340_SRAM_ERROR_DATA_PARITY 0x3a8
-
-/****************************************/
-/* SDRAM Configuration */
-/****************************************/
-
-#define MV64340_SDRAM_CONFIG 0x1400
-#define MV64340_D_UNIT_CONTROL_LOW 0x1404
-#define MV64340_D_UNIT_CONTROL_HIGH 0x1424
-#define MV64340_SDRAM_TIMING_CONTROL_LOW 0x1408
-#define MV64340_SDRAM_TIMING_CONTROL_HIGH 0x140c
-#define MV64340_SDRAM_ADDR_CONTROL 0x1410
-#define MV64340_SDRAM_OPEN_PAGES_CONTROL 0x1414
-#define MV64340_SDRAM_OPERATION 0x1418
-#define MV64340_SDRAM_MODE 0x141c
-#define MV64340_EXTENDED_DRAM_MODE 0x1420
-#define MV64340_SDRAM_CROSS_BAR_CONTROL_LOW 0x1430
-#define MV64340_SDRAM_CROSS_BAR_CONTROL_HIGH 0x1434
-#define MV64340_SDRAM_CROSS_BAR_TIMEOUT 0x1438
-#define MV64340_SDRAM_ADDR_CTRL_PADS_CALIBRATION 0x14c0
-#define MV64340_SDRAM_DATA_PADS_CALIBRATION 0x14c4
-
-/****************************************/
-/* SDRAM Error Report */
-/****************************************/
-
-#define MV64340_SDRAM_ERROR_DATA_LOW 0x1444
-#define MV64340_SDRAM_ERROR_DATA_HIGH 0x1440
-#define MV64340_SDRAM_ERROR_ADDR 0x1450
-#define MV64340_SDRAM_RECEIVED_ECC 0x1448
-#define MV64340_SDRAM_CALCULATED_ECC 0x144c
-#define MV64340_SDRAM_ECC_CONTROL 0x1454
-#define MV64340_SDRAM_ECC_ERROR_COUNTER 0x1458
-
-/******************************************/
-/* Controlled Delay Line (CDL) Registers */
-/******************************************/
-
-#define MV64340_DFCDL_CONFIG0 0x1480
-#define MV64340_DFCDL_CONFIG1 0x1484
-#define MV64340_DLL_WRITE 0x1488
-#define MV64340_DLL_READ 0x148c
-#define MV64340_SRAM_ADDR 0x1490
-#define MV64340_SRAM_DATA0 0x1494
-#define MV64340_SRAM_DATA1 0x1498
-#define MV64340_SRAM_DATA2 0x149c
-#define MV64340_DFCL_PROBE 0x14a0
-
-/******************************************/
-/* Debug Registers */
-/******************************************/
-
-#define MV64340_DUNIT_DEBUG_LOW 0x1460
-#define MV64340_DUNIT_DEBUG_HIGH 0x1464
-#define MV64340_DUNIT_MMASK 0X1b40
-
-/****************************************/
-/* Device Parameters */
-/****************************************/
-
-#define MV64340_DEVICE_BANK0_PARAMETERS 0x45c
-#define MV64340_DEVICE_BANK1_PARAMETERS 0x460
-#define MV64340_DEVICE_BANK2_PARAMETERS 0x464
-#define MV64340_DEVICE_BANK3_PARAMETERS 0x468
-#define MV64340_DEVICE_BOOT_BANK_PARAMETERS 0x46c
-#define MV64340_DEVICE_INTERFACE_CONTROL 0x4c0
-#define MV64340_DEVICE_INTERFACE_CROSS_BAR_CONTROL_LOW 0x4c8
-#define MV64340_DEVICE_INTERFACE_CROSS_BAR_CONTROL_HIGH 0x4cc
-#define MV64340_DEVICE_INTERFACE_CROSS_BAR_TIMEOUT 0x4c4
-
-/****************************************/
-/* Device interrupt registers */
-/****************************************/
-
-#define MV64340_DEVICE_INTERRUPT_CAUSE 0x4d0
-#define MV64340_DEVICE_INTERRUPT_MASK 0x4d4
-#define MV64340_DEVICE_ERROR_ADDR 0x4d8
-#define MV64340_DEVICE_ERROR_DATA 0x4dc
-#define MV64340_DEVICE_ERROR_PARITY 0x4e0
-
-/****************************************/
-/* Device debug registers */
-/****************************************/
-
-#define MV64340_DEVICE_DEBUG_LOW 0x4e4
-#define MV64340_DEVICE_DEBUG_HIGH 0x4e8
-#define MV64340_RUNIT_MMASK 0x4f0
-
-/****************************************/
-/* PCI Slave Address Decoding registers */
-/****************************************/
-
-#define MV64340_PCI_0_CS_0_BANK_SIZE 0xc08
-#define MV64340_PCI_1_CS_0_BANK_SIZE 0xc88
-#define MV64340_PCI_0_CS_1_BANK_SIZE 0xd08
-#define MV64340_PCI_1_CS_1_BANK_SIZE 0xd88
-#define MV64340_PCI_0_CS_2_BANK_SIZE 0xc0c
-#define MV64340_PCI_1_CS_2_BANK_SIZE 0xc8c
-#define MV64340_PCI_0_CS_3_BANK_SIZE 0xd0c
-#define MV64340_PCI_1_CS_3_BANK_SIZE 0xd8c
-#define MV64340_PCI_0_DEVCS_0_BANK_SIZE 0xc10
-#define MV64340_PCI_1_DEVCS_0_BANK_SIZE 0xc90
-#define MV64340_PCI_0_DEVCS_1_BANK_SIZE 0xd10
-#define MV64340_PCI_1_DEVCS_1_BANK_SIZE 0xd90
-#define MV64340_PCI_0_DEVCS_2_BANK_SIZE 0xd18
-#define MV64340_PCI_1_DEVCS_2_BANK_SIZE 0xd98
-#define MV64340_PCI_0_DEVCS_3_BANK_SIZE 0xc14
-#define MV64340_PCI_1_DEVCS_3_BANK_SIZE 0xc94
-#define MV64340_PCI_0_DEVCS_BOOT_BANK_SIZE 0xd14
-#define MV64340_PCI_1_DEVCS_BOOT_BANK_SIZE 0xd94
-#define MV64340_PCI_0_P2P_MEM0_BAR_SIZE 0xd1c
-#define MV64340_PCI_1_P2P_MEM0_BAR_SIZE 0xd9c
-#define MV64340_PCI_0_P2P_MEM1_BAR_SIZE 0xd20
-#define MV64340_PCI_1_P2P_MEM1_BAR_SIZE 0xda0
-#define MV64340_PCI_0_P2P_I_O_BAR_SIZE 0xd24
-#define MV64340_PCI_1_P2P_I_O_BAR_SIZE 0xda4
-#define MV64340_PCI_0_CPU_BAR_SIZE 0xd28
-#define MV64340_PCI_1_CPU_BAR_SIZE 0xda8
-#define MV64340_PCI_0_INTERNAL_SRAM_BAR_SIZE 0xe00
-#define MV64340_PCI_1_INTERNAL_SRAM_BAR_SIZE 0xe80
-#define MV64340_PCI_0_EXPANSION_ROM_BAR_SIZE 0xd2c
-#define MV64340_PCI_1_EXPANSION_ROM_BAR_SIZE 0xd9c
-#define MV64340_PCI_0_BASE_ADDR_REG_ENABLE 0xc3c
-#define MV64340_PCI_1_BASE_ADDR_REG_ENABLE 0xcbc
-#define MV64340_PCI_0_CS_0_BASE_ADDR_REMAP 0xc48
-#define MV64340_PCI_1_CS_0_BASE_ADDR_REMAP 0xcc8
-#define MV64340_PCI_0_CS_1_BASE_ADDR_REMAP 0xd48
-#define MV64340_PCI_1_CS_1_BASE_ADDR_REMAP 0xdc8
-#define MV64340_PCI_0_CS_2_BASE_ADDR_REMAP 0xc4c
-#define MV64340_PCI_1_CS_2_BASE_ADDR_REMAP 0xccc
-#define MV64340_PCI_0_CS_3_BASE_ADDR_REMAP 0xd4c
-#define MV64340_PCI_1_CS_3_BASE_ADDR_REMAP 0xdcc
-#define MV64340_PCI_0_CS_0_BASE_HIGH_ADDR_REMAP 0xF04
-#define MV64340_PCI_1_CS_0_BASE_HIGH_ADDR_REMAP 0xF84
-#define MV64340_PCI_0_CS_1_BASE_HIGH_ADDR_REMAP 0xF08
-#define MV64340_PCI_1_CS_1_BASE_HIGH_ADDR_REMAP 0xF88
-#define MV64340_PCI_0_CS_2_BASE_HIGH_ADDR_REMAP 0xF0C
-#define MV64340_PCI_1_CS_2_BASE_HIGH_ADDR_REMAP 0xF8C
-#define MV64340_PCI_0_CS_3_BASE_HIGH_ADDR_REMAP 0xF10
-#define MV64340_PCI_1_CS_3_BASE_HIGH_ADDR_REMAP 0xF90
-#define MV64340_PCI_0_DEVCS_0_BASE_ADDR_REMAP 0xc50
-#define MV64340_PCI_1_DEVCS_0_BASE_ADDR_REMAP 0xcd0
-#define MV64340_PCI_0_DEVCS_1_BASE_ADDR_REMAP 0xd50
-#define MV64340_PCI_1_DEVCS_1_BASE_ADDR_REMAP 0xdd0
-#define MV64340_PCI_0_DEVCS_2_BASE_ADDR_REMAP 0xd58
-#define MV64340_PCI_1_DEVCS_2_BASE_ADDR_REMAP 0xdd8
-#define MV64340_PCI_0_DEVCS_3_BASE_ADDR_REMAP 0xc54
-#define MV64340_PCI_1_DEVCS_3_BASE_ADDR_REMAP 0xcd4
-#define MV64340_PCI_0_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xd54
-#define MV64340_PCI_1_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xdd4
-#define MV64340_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xd5c
-#define MV64340_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xddc
-#define MV64340_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xd60
-#define MV64340_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xde0
-#define MV64340_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xd64
-#define MV64340_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xde4
-#define MV64340_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xd68
-#define MV64340_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xde8
-#define MV64340_PCI_0_P2P_I_O_BASE_ADDR_REMAP 0xd6c
-#define MV64340_PCI_1_P2P_I_O_BASE_ADDR_REMAP 0xdec
-#define MV64340_PCI_0_CPU_BASE_ADDR_REMAP_LOW 0xd70
-#define MV64340_PCI_1_CPU_BASE_ADDR_REMAP_LOW 0xdf0
-#define MV64340_PCI_0_CPU_BASE_ADDR_REMAP_HIGH 0xd74
-#define MV64340_PCI_1_CPU_BASE_ADDR_REMAP_HIGH 0xdf4
-#define MV64340_PCI_0_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf00
-#define MV64340_PCI_1_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf80
-#define MV64340_PCI_0_EXPANSION_ROM_BASE_ADDR_REMAP 0xf38
-#define MV64340_PCI_1_EXPANSION_ROM_BASE_ADDR_REMAP 0xfb8
-#define MV64340_PCI_0_ADDR_DECODE_CONTROL 0xd3c
-#define MV64340_PCI_1_ADDR_DECODE_CONTROL 0xdbc
-#define MV64340_PCI_0_HEADERS_RETARGET_CONTROL 0xF40
-#define MV64340_PCI_1_HEADERS_RETARGET_CONTROL 0xFc0
-#define MV64340_PCI_0_HEADERS_RETARGET_BASE 0xF44
-#define MV64340_PCI_1_HEADERS_RETARGET_BASE 0xFc4
-#define MV64340_PCI_0_HEADERS_RETARGET_HIGH 0xF48
-#define MV64340_PCI_1_HEADERS_RETARGET_HIGH 0xFc8
-
-/***********************************/
-/* PCI Control Register Map */
-/***********************************/
-
-#define MV64340_PCI_0_DLL_STATUS_AND_COMMAND 0x1d20
-#define MV64340_PCI_1_DLL_STATUS_AND_COMMAND 0x1da0
-#define MV64340_PCI_0_MPP_PADS_DRIVE_CONTROL 0x1d1C
-#define MV64340_PCI_1_MPP_PADS_DRIVE_CONTROL 0x1d9C
-#define MV64340_PCI_0_COMMAND 0xc00
-#define MV64340_PCI_1_COMMAND 0xc80
-#define MV64340_PCI_0_MODE 0xd00
-#define MV64340_PCI_1_MODE 0xd80
-#define MV64340_PCI_0_RETRY 0xc04
-#define MV64340_PCI_1_RETRY 0xc84
-#define MV64340_PCI_0_READ_BUFFER_DISCARD_TIMER 0xd04
-#define MV64340_PCI_1_READ_BUFFER_DISCARD_TIMER 0xd84
-#define MV64340_PCI_0_MSI_TRIGGER_TIMER 0xc38
-#define MV64340_PCI_1_MSI_TRIGGER_TIMER 0xcb8
-#define MV64340_PCI_0_ARBITER_CONTROL 0x1d00
-#define MV64340_PCI_1_ARBITER_CONTROL 0x1d80
-#define MV64340_PCI_0_CROSS_BAR_CONTROL_LOW 0x1d08
-#define MV64340_PCI_1_CROSS_BAR_CONTROL_LOW 0x1d88
-#define MV64340_PCI_0_CROSS_BAR_CONTROL_HIGH 0x1d0c
-#define MV64340_PCI_1_CROSS_BAR_CONTROL_HIGH 0x1d8c
-#define MV64340_PCI_0_CROSS_BAR_TIMEOUT 0x1d04
-#define MV64340_PCI_1_CROSS_BAR_TIMEOUT 0x1d84
-#define MV64340_PCI_0_SYNC_BARRIER_TRIGGER_REG 0x1D18
-#define MV64340_PCI_1_SYNC_BARRIER_TRIGGER_REG 0x1D98
-#define MV64340_PCI_0_SYNC_BARRIER_VIRTUAL_REG 0x1d10
-#define MV64340_PCI_1_SYNC_BARRIER_VIRTUAL_REG 0x1d90
-#define MV64340_PCI_0_P2P_CONFIG 0x1d14
-#define MV64340_PCI_1_P2P_CONFIG 0x1d94
-
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_0_LOW 0x1e00
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_0_HIGH 0x1e04
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_0 0x1e08
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_1_LOW 0x1e10
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_1_HIGH 0x1e14
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_1 0x1e18
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_2_LOW 0x1e20
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_2_HIGH 0x1e24
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_2 0x1e28
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_3_LOW 0x1e30
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_3_HIGH 0x1e34
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_3 0x1e38
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_4_LOW 0x1e40
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_4_HIGH 0x1e44
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_4 0x1e48
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_5_LOW 0x1e50
-#define MV64340_PCI_0_ACCESS_CONTROL_BASE_5_HIGH 0x1e54
-#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_5 0x1e58
-
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_0_LOW 0x1e80
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_0_HIGH 0x1e84
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_0 0x1e88
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_1_LOW 0x1e90
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_1_HIGH 0x1e94
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_1 0x1e98
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_2_LOW 0x1ea0
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_2_HIGH 0x1ea4
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_2 0x1ea8
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_3_LOW 0x1eb0
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_3_HIGH 0x1eb4
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_3 0x1eb8
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_4_LOW 0x1ec0
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_4_HIGH 0x1ec4
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_4 0x1ec8
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_5_LOW 0x1ed0
-#define MV64340_PCI_1_ACCESS_CONTROL_BASE_5_HIGH 0x1ed4
-#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_5 0x1ed8
-
-/****************************************/
-/* PCI Configuration Access Registers */
-/****************************************/
-
-#define MV64340_PCI_0_CONFIG_ADDR 0xcf8
-#define MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG 0xcfc
-#define MV64340_PCI_1_CONFIG_ADDR 0xc78
-#define MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG 0xc7c
-#define MV64340_PCI_0_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xc34
-#define MV64340_PCI_1_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xcb4
-
-/****************************************/
-/* PCI Error Report Registers */
-/****************************************/
-
-#define MV64340_PCI_0_SERR_MASK 0xc28
-#define MV64340_PCI_1_SERR_MASK 0xca8
-#define MV64340_PCI_0_ERROR_ADDR_LOW 0x1d40
-#define MV64340_PCI_1_ERROR_ADDR_LOW 0x1dc0
-#define MV64340_PCI_0_ERROR_ADDR_HIGH 0x1d44
-#define MV64340_PCI_1_ERROR_ADDR_HIGH 0x1dc4
-#define MV64340_PCI_0_ERROR_ATTRIBUTE 0x1d48
-#define MV64340_PCI_1_ERROR_ATTRIBUTE 0x1dc8
-#define MV64340_PCI_0_ERROR_COMMAND 0x1d50
-#define MV64340_PCI_1_ERROR_COMMAND 0x1dd0
-#define MV64340_PCI_0_ERROR_CAUSE 0x1d58
-#define MV64340_PCI_1_ERROR_CAUSE 0x1dd8
-#define MV64340_PCI_0_ERROR_MASK 0x1d5c
-#define MV64340_PCI_1_ERROR_MASK 0x1ddc
-
-/****************************************/
-/* PCI Debug Registers */
-/****************************************/
-
-#define MV64340_PCI_0_MMASK 0X1D24
-#define MV64340_PCI_1_MMASK 0X1DA4
-
-/*********************************************/
-/* PCI Configuration, Function 0, Registers */
-/*********************************************/
-
-#define MV64340_PCI_DEVICE_AND_VENDOR_ID 0x000
-#define MV64340_PCI_STATUS_AND_COMMAND 0x004
-#define MV64340_PCI_CLASS_CODE_AND_REVISION_ID 0x008
-#define MV64340_PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C
-
-#define MV64340_PCI_SCS_0_BASE_ADDR_LOW 0x010
-#define MV64340_PCI_SCS_0_BASE_ADDR_HIGH 0x014
-#define MV64340_PCI_SCS_1_BASE_ADDR_LOW 0x018
-#define MV64340_PCI_SCS_1_BASE_ADDR_HIGH 0x01C
-#define MV64340_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_LOW 0x020
-#define MV64340_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_HIGH 0x024
-#define MV64340_PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02c
-#define MV64340_PCI_EXPANSION_ROM_BASE_ADDR_REG 0x030
-#define MV64340_PCI_CAPABILTY_LIST_POINTER 0x034
-#define MV64340_PCI_INTERRUPT_PIN_AND_LINE 0x03C
- /* capability list */
-#define MV64340_PCI_POWER_MANAGEMENT_CAPABILITY 0x040
-#define MV64340_PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044
-#define MV64340_PCI_VPD_ADDR 0x048
-#define MV64340_PCI_VPD_DATA 0x04c
-#define MV64340_PCI_MSI_MESSAGE_CONTROL 0x050
-#define MV64340_PCI_MSI_MESSAGE_ADDR 0x054
-#define MV64340_PCI_MSI_MESSAGE_UPPER_ADDR 0x058
-#define MV64340_PCI_MSI_MESSAGE_DATA 0x05c
-#define MV64340_PCI_X_COMMAND 0x060
-#define MV64340_PCI_X_STATUS 0x064
-#define MV64340_PCI_COMPACT_PCI_HOT_SWAP 0x068
-
-/***********************************************/
-/* PCI Configuration, Function 1, Registers */
-/***********************************************/
-
-#define MV64340_PCI_SCS_2_BASE_ADDR_LOW 0x110
-#define MV64340_PCI_SCS_2_BASE_ADDR_HIGH 0x114
-#define MV64340_PCI_SCS_3_BASE_ADDR_LOW 0x118
-#define MV64340_PCI_SCS_3_BASE_ADDR_HIGH 0x11c
-#define MV64340_PCI_INTERNAL_SRAM_BASE_ADDR_LOW 0x120
-#define MV64340_PCI_INTERNAL_SRAM_BASE_ADDR_HIGH 0x124
-
-/***********************************************/
-/* PCI Configuration, Function 2, Registers */
-/***********************************************/
-
-#define MV64340_PCI_DEVCS_0_BASE_ADDR_LOW 0x210
-#define MV64340_PCI_DEVCS_0_BASE_ADDR_HIGH 0x214
-#define MV64340_PCI_DEVCS_1_BASE_ADDR_LOW 0x218
-#define MV64340_PCI_DEVCS_1_BASE_ADDR_HIGH 0x21c
-#define MV64340_PCI_DEVCS_2_BASE_ADDR_LOW 0x220
-#define MV64340_PCI_DEVCS_2_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 3, Registers */
-/***********************************************/
-
-#define MV64340_PCI_DEVCS_3_BASE_ADDR_LOW 0x310
-#define MV64340_PCI_DEVCS_3_BASE_ADDR_HIGH 0x314
-#define MV64340_PCI_BOOT_CS_BASE_ADDR_LOW 0x318
-#define MV64340_PCI_BOOT_CS_BASE_ADDR_HIGH 0x31c
-#define MV64340_PCI_CPU_BASE_ADDR_LOW 0x220
-#define MV64340_PCI_CPU_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 4, Registers */
-/***********************************************/
-
-#define MV64340_PCI_P2P_MEM0_BASE_ADDR_LOW 0x410
-#define MV64340_PCI_P2P_MEM0_BASE_ADDR_HIGH 0x414
-#define MV64340_PCI_P2P_MEM1_BASE_ADDR_LOW 0x418
-#define MV64340_PCI_P2P_MEM1_BASE_ADDR_HIGH 0x41c
-#define MV64340_PCI_P2P_I_O_BASE_ADDR 0x420
-#define MV64340_PCI_INTERNAL_REGS_I_O_MAPPED_BASE_ADDR 0x424
-
-/****************************************/
-/* Messaging Unit Registers (I20) */
-/****************************************/
-
-#define MV64340_I2O_INBOUND_MESSAGE_REG0_PCI_0_SIDE 0x010
-#define MV64340_I2O_INBOUND_MESSAGE_REG1_PCI_0_SIDE 0x014
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_PCI_0_SIDE 0x018
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_PCI_0_SIDE 0x01C
-#define MV64340_I2O_INBOUND_DOORBELL_REG_PCI_0_SIDE 0x020
-#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x024
-#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x028
-#define MV64340_I2O_OUTBOUND_DOORBELL_REG_PCI_0_SIDE 0x02C
-#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x030
-#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x034
-#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x040
-#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x044
-#define MV64340_I2O_QUEUE_CONTROL_REG_PCI_0_SIDE 0x050
-#define MV64340_I2O_QUEUE_BASE_ADDR_REG_PCI_0_SIDE 0x054
-#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x060
-#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x064
-#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x068
-#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x06C
-#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x070
-#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x074
-#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x0F8
-#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x0FC
-
-#define MV64340_I2O_INBOUND_MESSAGE_REG0_PCI_1_SIDE 0x090
-#define MV64340_I2O_INBOUND_MESSAGE_REG1_PCI_1_SIDE 0x094
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_PCI_1_SIDE 0x098
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_PCI_1_SIDE 0x09C
-#define MV64340_I2O_INBOUND_DOORBELL_REG_PCI_1_SIDE 0x0A0
-#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0A4
-#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0A8
-#define MV64340_I2O_OUTBOUND_DOORBELL_REG_PCI_1_SIDE 0x0AC
-#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0B0
-#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0B4
-#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C0
-#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C4
-#define MV64340_I2O_QUEUE_CONTROL_REG_PCI_1_SIDE 0x0D0
-#define MV64340_I2O_QUEUE_BASE_ADDR_REG_PCI_1_SIDE 0x0D4
-#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0E0
-#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0E4
-#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x0E8
-#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x0EC
-#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0F0
-#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0F4
-#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x078
-#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x07C
-
-#define MV64340_I2O_INBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C10
-#define MV64340_I2O_INBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C14
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C18
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C1C
-#define MV64340_I2O_INBOUND_DOORBELL_REG_CPU0_SIDE 0x1C20
-#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C24
-#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C28
-#define MV64340_I2O_OUTBOUND_DOORBELL_REG_CPU0_SIDE 0x1C2C
-#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C30
-#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C34
-#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C40
-#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C44
-#define MV64340_I2O_QUEUE_CONTROL_REG_CPU0_SIDE 0x1C50
-#define MV64340_I2O_QUEUE_BASE_ADDR_REG_CPU0_SIDE 0x1C54
-#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C60
-#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C64
-#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1C68
-#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1C6C
-#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C70
-#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C74
-#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1CF8
-#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1CFC
-#define MV64340_I2O_INBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C90
-#define MV64340_I2O_INBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C94
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C98
-#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C9C
-#define MV64340_I2O_INBOUND_DOORBELL_REG_CPU1_SIDE 0x1CA0
-#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CA4
-#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CA8
-#define MV64340_I2O_OUTBOUND_DOORBELL_REG_CPU1_SIDE 0x1CAC
-#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CB0
-#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CB4
-#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC0
-#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC4
-#define MV64340_I2O_QUEUE_CONTROL_REG_CPU1_SIDE 0x1CD0
-#define MV64340_I2O_QUEUE_BASE_ADDR_REG_CPU1_SIDE 0x1CD4
-#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CE0
-#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CE4
-#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1CE8
-#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1CEC
-#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CF0
-#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CF4
-#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1C78
-#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1C7C
-
-/****************************************/
-/* Ethernet Unit Registers */
-/****************************************/
-
-#define MV64340_ETH_PHY_ADDR_REG 0x2000
-#define MV64340_ETH_SMI_REG 0x2004
-#define MV64340_ETH_UNIT_DEFAULT_ADDR_REG 0x2008
-#define MV64340_ETH_UNIT_DEFAULTID_REG 0x200c
-#define MV64340_ETH_UNIT_INTERRUPT_CAUSE_REG 0x2080
-#define MV64340_ETH_UNIT_INTERRUPT_MASK_REG 0x2084
-#define MV64340_ETH_UNIT_INTERNAL_USE_REG 0x24fc
-#define MV64340_ETH_UNIT_ERROR_ADDR_REG 0x2094
-#define MV64340_ETH_BAR_0 0x2200
-#define MV64340_ETH_BAR_1 0x2208
-#define MV64340_ETH_BAR_2 0x2210
-#define MV64340_ETH_BAR_3 0x2218
-#define MV64340_ETH_BAR_4 0x2220
-#define MV64340_ETH_BAR_5 0x2228
-#define MV64340_ETH_SIZE_REG_0 0x2204
-#define MV64340_ETH_SIZE_REG_1 0x220c
-#define MV64340_ETH_SIZE_REG_2 0x2214
-#define MV64340_ETH_SIZE_REG_3 0x221c
-#define MV64340_ETH_SIZE_REG_4 0x2224
-#define MV64340_ETH_SIZE_REG_5 0x222c
-#define MV64340_ETH_HEADERS_RETARGET_BASE_REG 0x2230
-#define MV64340_ETH_HEADERS_RETARGET_CONTROL_REG 0x2234
-#define MV64340_ETH_HIGH_ADDR_REMAP_REG_0 0x2280
-#define MV64340_ETH_HIGH_ADDR_REMAP_REG_1 0x2284
-#define MV64340_ETH_HIGH_ADDR_REMAP_REG_2 0x2288
-#define MV64340_ETH_HIGH_ADDR_REMAP_REG_3 0x228c
-#define MV64340_ETH_BASE_ADDR_ENABLE_REG 0x2290
-#define MV64340_ETH_ACCESS_PROTECTION_REG(port) (0x2294 + (port<<2))
-#define MV64340_ETH_MIB_COUNTERS_BASE(port) (0x3000 + (port<<7))
-#define MV64340_ETH_PORT_CONFIG_REG(port) (0x2400 + (port<<10))
-#define MV64340_ETH_PORT_CONFIG_EXTEND_REG(port) (0x2404 + (port<<10))
-#define MV64340_ETH_MII_SERIAL_PARAMETRS_REG(port) (0x2408 + (port<<10))
-#define MV64340_ETH_GMII_SERIAL_PARAMETRS_REG(port) (0x240c + (port<<10))
-#define MV64340_ETH_VLAN_ETHERTYPE_REG(port) (0x2410 + (port<<10))
-#define MV64340_ETH_MAC_ADDR_LOW(port) (0x2414 + (port<<10))
-#define MV64340_ETH_MAC_ADDR_HIGH(port) (0x2418 + (port<<10))
-#define MV64340_ETH_SDMA_CONFIG_REG(port) (0x241c + (port<<10))
-#define MV64340_ETH_DSCP_0(port) (0x2420 + (port<<10))
-#define MV64340_ETH_DSCP_1(port) (0x2424 + (port<<10))
-#define MV64340_ETH_DSCP_2(port) (0x2428 + (port<<10))
-#define MV64340_ETH_DSCP_3(port) (0x242c + (port<<10))
-#define MV64340_ETH_DSCP_4(port) (0x2430 + (port<<10))
-#define MV64340_ETH_DSCP_5(port) (0x2434 + (port<<10))
-#define MV64340_ETH_DSCP_6(port) (0x2438 + (port<<10))
-#define MV64340_ETH_PORT_SERIAL_CONTROL_REG(port) (0x243c + (port<<10))
-#define MV64340_ETH_VLAN_PRIORITY_TAG_TO_PRIORITY(port) (0x2440 + (port<<10))
-#define MV64340_ETH_PORT_STATUS_REG(port) (0x2444 + (port<<10))
-#define MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(port) (0x2448 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_FIXED_PRIORITY(port) (0x244c + (port<<10))
-#define MV64340_ETH_PORT_TX_TOKEN_BUCKET_RATE_CONFIG(port) (0x2450 + (port<<10))
-#define MV64340_ETH_MAXIMUM_TRANSMIT_UNIT(port) (0x2458 + (port<<10))
-#define MV64340_ETH_PORT_MAXIMUM_TOKEN_BUCKET_SIZE(port) (0x245c + (port<<10))
-#define MV64340_ETH_INTERRUPT_CAUSE_REG(port) (0x2460 + (port<<10))
-#define MV64340_ETH_INTERRUPT_CAUSE_EXTEND_REG(port) (0x2464 + (port<<10))
-#define MV64340_ETH_INTERRUPT_MASK_REG(port) (0x2468 + (port<<10))
-#define MV64340_ETH_INTERRUPT_EXTEND_MASK_REG(port) (0x246c + (port<<10))
-#define MV64340_ETH_RX_FIFO_URGENT_THRESHOLD_REG(port) (0x2470 + (port<<10))
-#define MV64340_ETH_TX_FIFO_URGENT_THRESHOLD_REG(port) (0x2474 + (port<<10))
-#define MV64340_ETH_RX_MINIMAL_FRAME_SIZE_REG(port) (0x247c + (port<<10))
-#define MV64340_ETH_RX_DISCARDED_FRAMES_COUNTER(port) (0x2484 + (port<<10)
-#define MV64340_ETH_PORT_DEBUG_0_REG(port) (0x248c + (port<<10))
-#define MV64340_ETH_PORT_DEBUG_1_REG(port) (0x2490 + (port<<10))
-#define MV64340_ETH_PORT_INTERNAL_ADDR_ERROR_REG(port) (0x2494 + (port<<10))
-#define MV64340_ETH_INTERNAL_USE_REG(port) (0x24fc + (port<<10))
-#define MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(port) (0x2680 + (port<<10))
-#define MV64340_ETH_CURRENT_SERVED_TX_DESC_PTR(port) (0x2684 + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port) (0x260c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_1(port) (0x261c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_2(port) (0x262c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_3(port) (0x263c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_4(port) (0x264c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_5(port) (0x265c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_6(port) (0x266c + (port<<10))
-#define MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_7(port) (0x267c + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port) (0x26c0 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_1(port) (0x26c4 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_2(port) (0x26c8 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_3(port) (0x26cc + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_4(port) (0x26d0 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_5(port) (0x26d4 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_6(port) (0x26d8 + (port<<10))
-#define MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_7(port) (0x26dc + (port<<10))
-#define MV64340_ETH_TX_QUEUE_0_TOKEN_BUCKET_COUNT(port) (0x2700 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_1_TOKEN_BUCKET_COUNT(port) (0x2710 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_2_TOKEN_BUCKET_COUNT(port) (0x2720 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_3_TOKEN_BUCKET_COUNT(port) (0x2730 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_4_TOKEN_BUCKET_COUNT(port) (0x2740 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_5_TOKEN_BUCKET_COUNT(port) (0x2750 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_6_TOKEN_BUCKET_COUNT(port) (0x2760 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_7_TOKEN_BUCKET_COUNT(port) (0x2770 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_0_TOKEN_BUCKET_CONFIG(port) (0x2704 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_1_TOKEN_BUCKET_CONFIG(port) (0x2714 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_2_TOKEN_BUCKET_CONFIG(port) (0x2724 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_3_TOKEN_BUCKET_CONFIG(port) (0x2734 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_4_TOKEN_BUCKET_CONFIG(port) (0x2744 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_5_TOKEN_BUCKET_CONFIG(port) (0x2754 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_6_TOKEN_BUCKET_CONFIG(port) (0x2764 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_7_TOKEN_BUCKET_CONFIG(port) (0x2774 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_0_ARBITER_CONFIG(port) (0x2708 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_1_ARBITER_CONFIG(port) (0x2718 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_2_ARBITER_CONFIG(port) (0x2728 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_3_ARBITER_CONFIG(port) (0x2738 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_4_ARBITER_CONFIG(port) (0x2748 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_5_ARBITER_CONFIG(port) (0x2758 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_6_ARBITER_CONFIG(port) (0x2768 + (port<<10))
-#define MV64340_ETH_TX_QUEUE_7_ARBITER_CONFIG(port) (0x2778 + (port<<10))
-#define MV64340_ETH_PORT_TX_TOKEN_BUCKET_COUNT(port) (0x2780 + (port<<10))
-#define MV64340_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(port) (0x3400 + (port<<10))
-#define MV64340_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(port) (0x3500 + (port<<10))
-#define MV64340_ETH_DA_FILTER_UNICAST_TABLE_BASE(port) (0x3600 + (port<<10))
-
-/*******************************************/
-/* CUNIT Registers */
-/*******************************************/
-
- /* Address Decoding Register Map */
-
-#define MV64340_CUNIT_BASE_ADDR_REG0 0xf200
-#define MV64340_CUNIT_BASE_ADDR_REG1 0xf208
-#define MV64340_CUNIT_BASE_ADDR_REG2 0xf210
-#define MV64340_CUNIT_BASE_ADDR_REG3 0xf218
-#define MV64340_CUNIT_SIZE0 0xf204
-#define MV64340_CUNIT_SIZE1 0xf20c
-#define MV64340_CUNIT_SIZE2 0xf214
-#define MV64340_CUNIT_SIZE3 0xf21c
-#define MV64340_CUNIT_HIGH_ADDR_REMAP_REG0 0xf240
-#define MV64340_CUNIT_HIGH_ADDR_REMAP_REG1 0xf244
-#define MV64340_CUNIT_BASE_ADDR_ENABLE_REG 0xf250
-#define MV64340_MPSC0_ACCESS_PROTECTION_REG 0xf254
-#define MV64340_MPSC1_ACCESS_PROTECTION_REG 0xf258
-#define MV64340_CUNIT_INTERNAL_SPACE_BASE_ADDR_REG 0xf25C
-
- /* Error Report Registers */
-
-#define MV64340_CUNIT_INTERRUPT_CAUSE_REG 0xf310
-#define MV64340_CUNIT_INTERRUPT_MASK_REG 0xf314
-#define MV64340_CUNIT_ERROR_ADDR 0xf318
-
- /* Cunit Control Registers */
-
-#define MV64340_CUNIT_ARBITER_CONTROL_REG 0xf300
-#define MV64340_CUNIT_CONFIG_REG 0xb40c
-#define MV64340_CUNIT_CRROSBAR_TIMEOUT_REG 0xf304
-
- /* Cunit Debug Registers */
-
-#define MV64340_CUNIT_DEBUG_LOW 0xf340
-#define MV64340_CUNIT_DEBUG_HIGH 0xf344
-#define MV64340_CUNIT_MMASK 0xf380
-
- /* MPSCs Clocks Routing Registers */
-
-#define MV64340_MPSC_ROUTING_REG 0xb400
-#define MV64340_MPSC_RX_CLOCK_ROUTING_REG 0xb404
-#define MV64340_MPSC_TX_CLOCK_ROUTING_REG 0xb408
-
- /* MPSCs Interrupts Registers */
-
-#define MV64340_MPSC_CAUSE_REG(port) (0xb804 + (port<<3))
-#define MV64340_MPSC_MASK_REG(port) (0xb884 + (port<<3))
-
-#define MV64340_MPSC_MAIN_CONFIG_LOW(port) (0x8000 + (port<<12))
-#define MV64340_MPSC_MAIN_CONFIG_HIGH(port) (0x8004 + (port<<12))
-#define MV64340_MPSC_PROTOCOL_CONFIG(port) (0x8008 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG1(port) (0x800c + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG2(port) (0x8010 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG3(port) (0x8014 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG4(port) (0x8018 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG5(port) (0x801c + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG6(port) (0x8020 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG7(port) (0x8024 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG8(port) (0x8028 + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG9(port) (0x802c + (port<<12))
-#define MV64340_MPSC_CHANNEL_REG10(port) (0x8030 + (port<<12))
-
- /* MPSC0 Registers */
-
-
-/***************************************/
-/* SDMA Registers */
-/***************************************/
-
-#define MV64340_SDMA_CONFIG_REG(channel) (0x4000 + (channel<<13))
-#define MV64340_SDMA_COMMAND_REG(channel) (0x4008 + (channel<<13))
-#define MV64340_SDMA_CURRENT_RX_DESCRIPTOR_POINTER(channel) (0x4810 + (channel<<13))
-#define MV64340_SDMA_CURRENT_TX_DESCRIPTOR_POINTER(channel) (0x4c10 + (channel<<13))
-#define MV64340_SDMA_FIRST_TX_DESCRIPTOR_POINTER(channel) (0x4c14 + (channel<<13))
-
-#define MV64340_SDMA_CAUSE_REG 0xb800
-#define MV64340_SDMA_MASK_REG 0xb880
-
-/* BRG Interrupts */
-
-#define MV64340_BRG_CONFIG_REG(brg) (0xb200 + (brg<<3))
-#define MV64340_BRG_BAUDE_TUNING_REG(brg) (0xb208 + (brg<<3))
-#define MV64340_BRG_CAUSE_REG 0xb834
-#define MV64340_BRG_MASK_REG 0xb8b4
-
-/****************************************/
-/* DMA Channel Control */
-/****************************************/
-
-#define MV64340_DMA_CHANNEL0_CONTROL 0x840
-#define MV64340_DMA_CHANNEL0_CONTROL_HIGH 0x880
-#define MV64340_DMA_CHANNEL1_CONTROL 0x844
-#define MV64340_DMA_CHANNEL1_CONTROL_HIGH 0x884
-#define MV64340_DMA_CHANNEL2_CONTROL 0x848
-#define MV64340_DMA_CHANNEL2_CONTROL_HIGH 0x888
-#define MV64340_DMA_CHANNEL3_CONTROL 0x84C
-#define MV64340_DMA_CHANNEL3_CONTROL_HIGH 0x88C
-
-
-/****************************************/
-/* IDMA Registers */
-/****************************************/
-
-#define MV64340_DMA_CHANNEL0_BYTE_COUNT 0x800
-#define MV64340_DMA_CHANNEL1_BYTE_COUNT 0x804
-#define MV64340_DMA_CHANNEL2_BYTE_COUNT 0x808
-#define MV64340_DMA_CHANNEL3_BYTE_COUNT 0x80C
-#define MV64340_DMA_CHANNEL0_SOURCE_ADDR 0x810
-#define MV64340_DMA_CHANNEL1_SOURCE_ADDR 0x814
-#define MV64340_DMA_CHANNEL2_SOURCE_ADDR 0x818
-#define MV64340_DMA_CHANNEL3_SOURCE_ADDR 0x81c
-#define MV64340_DMA_CHANNEL0_DESTINATION_ADDR 0x820
-#define MV64340_DMA_CHANNEL1_DESTINATION_ADDR 0x824
-#define MV64340_DMA_CHANNEL2_DESTINATION_ADDR 0x828
-#define MV64340_DMA_CHANNEL3_DESTINATION_ADDR 0x82C
-#define MV64340_DMA_CHANNEL0_NEXT_DESCRIPTOR_POINTER 0x830
-#define MV64340_DMA_CHANNEL1_NEXT_DESCRIPTOR_POINTER 0x834
-#define MV64340_DMA_CHANNEL2_NEXT_DESCRIPTOR_POINTER 0x838
-#define MV64340_DMA_CHANNEL3_NEXT_DESCRIPTOR_POINTER 0x83C
-#define MV64340_DMA_CHANNEL0_CURRENT_DESCRIPTOR_POINTER 0x870
-#define MV64340_DMA_CHANNEL1_CURRENT_DESCRIPTOR_POINTER 0x874
-#define MV64340_DMA_CHANNEL2_CURRENT_DESCRIPTOR_POINTER 0x878
-#define MV64340_DMA_CHANNEL3_CURRENT_DESCRIPTOR_POINTER 0x87C
-
- /* IDMA Address Decoding Base Address Registers */
-
-#define MV64340_DMA_BASE_ADDR_REG0 0xa00
-#define MV64340_DMA_BASE_ADDR_REG1 0xa08
-#define MV64340_DMA_BASE_ADDR_REG2 0xa10
-#define MV64340_DMA_BASE_ADDR_REG3 0xa18
-#define MV64340_DMA_BASE_ADDR_REG4 0xa20
-#define MV64340_DMA_BASE_ADDR_REG5 0xa28
-#define MV64340_DMA_BASE_ADDR_REG6 0xa30
-#define MV64340_DMA_BASE_ADDR_REG7 0xa38
-
- /* IDMA Address Decoding Size Address Register */
-
-#define MV64340_DMA_SIZE_REG0 0xa04
-#define MV64340_DMA_SIZE_REG1 0xa0c
-#define MV64340_DMA_SIZE_REG2 0xa14
-#define MV64340_DMA_SIZE_REG3 0xa1c
-#define MV64340_DMA_SIZE_REG4 0xa24
-#define MV64340_DMA_SIZE_REG5 0xa2c
-#define MV64340_DMA_SIZE_REG6 0xa34
-#define MV64340_DMA_SIZE_REG7 0xa3C
-
- /* IDMA Address Decoding High Address Remap and Access
- Protection Registers */
-
-#define MV64340_DMA_HIGH_ADDR_REMAP_REG0 0xa60
-#define MV64340_DMA_HIGH_ADDR_REMAP_REG1 0xa64
-#define MV64340_DMA_HIGH_ADDR_REMAP_REG2 0xa68
-#define MV64340_DMA_HIGH_ADDR_REMAP_REG3 0xa6C
-#define MV64340_DMA_BASE_ADDR_ENABLE_REG 0xa80
-#define MV64340_DMA_CHANNEL0_ACCESS_PROTECTION_REG 0xa70
-#define MV64340_DMA_CHANNEL1_ACCESS_PROTECTION_REG 0xa74
-#define MV64340_DMA_CHANNEL2_ACCESS_PROTECTION_REG 0xa78
-#define MV64340_DMA_CHANNEL3_ACCESS_PROTECTION_REG 0xa7c
-#define MV64340_DMA_ARBITER_CONTROL 0x860
-#define MV64340_DMA_CROSS_BAR_TIMEOUT 0x8d0
-
- /* IDMA Headers Retarget Registers */
-
-#define MV64340_DMA_HEADERS_RETARGET_CONTROL 0xa84
-#define MV64340_DMA_HEADERS_RETARGET_BASE 0xa88
-
- /* IDMA Interrupt Register */
-
-#define MV64340_DMA_INTERRUPT_CAUSE_REG 0x8c0
-#define MV64340_DMA_INTERRUPT_CAUSE_MASK 0x8c4
-#define MV64340_DMA_ERROR_ADDR 0x8c8
-#define MV64340_DMA_ERROR_SELECT 0x8cc
-
- /* IDMA Debug Register ( for internal use ) */
-
-#define MV64340_DMA_DEBUG_LOW 0x8e0
-#define MV64340_DMA_DEBUG_HIGH 0x8e4
-#define MV64340_DMA_SPARE 0xA8C
-
-/****************************************/
-/* Timer_Counter */
-/****************************************/
-
-#define MV64340_TIMER_COUNTER0 0x850
-#define MV64340_TIMER_COUNTER1 0x854
-#define MV64340_TIMER_COUNTER2 0x858
-#define MV64340_TIMER_COUNTER3 0x85C
-#define MV64340_TIMER_COUNTER_0_3_CONTROL 0x864
-#define MV64340_TIMER_COUNTER_0_3_INTERRUPT_CAUSE 0x868
-#define MV64340_TIMER_COUNTER_0_3_INTERRUPT_MASK 0x86c
-
-/****************************************/
-/* Watchdog registers */
-/****************************************/
-
-#define MV64340_WATCHDOG_CONFIG_REG 0xb410
-#define MV64340_WATCHDOG_VALUE_REG 0xb414
-
-/****************************************/
-/* I2C Registers */
-/****************************************/
-
-#define MV64340_I2C_SLAVE_ADDR 0xc000
-#define MV64340_I2C_EXTENDED_SLAVE_ADDR 0xc010
-#define MV64340_I2C_DATA 0xc004
-#define MV64340_I2C_CONTROL 0xc008
-#define MV64340_I2C_STATUS_BAUDE_RATE 0xc00C
-#define MV64340_I2C_SOFT_RESET 0xc01c
-
-/****************************************/
-/* GPP Interface Registers */
-/****************************************/
-
-#define MV64340_GPP_IO_CONTROL 0xf100
-#define MV64340_GPP_LEVEL_CONTROL 0xf110
-#define MV64340_GPP_VALUE 0xf104
-#define MV64340_GPP_INTERRUPT_CAUSE 0xf108
-#define MV64340_GPP_INTERRUPT_MASK0 0xf10c
-#define MV64340_GPP_INTERRUPT_MASK1 0xf114
-#define MV64340_GPP_VALUE_SET 0xf118
-#define MV64340_GPP_VALUE_CLEAR 0xf11c
-
-/****************************************/
-/* Interrupt Controller Registers */
-/****************************************/
-
-/****************************************/
-/* Interrupts */
-/****************************************/
-
-#define MV64340_MAIN_INTERRUPT_CAUSE_LOW 0x004
-#define MV64340_MAIN_INTERRUPT_CAUSE_HIGH 0x00c
-#define MV64340_CPU_INTERRUPT0_MASK_LOW 0x014
-#define MV64340_CPU_INTERRUPT0_MASK_HIGH 0x01c
-#define MV64340_CPU_INTERRUPT0_SELECT_CAUSE 0x024
-#define MV64340_CPU_INTERRUPT1_MASK_LOW 0x034
-#define MV64340_CPU_INTERRUPT1_MASK_HIGH 0x03c
-#define MV64340_CPU_INTERRUPT1_SELECT_CAUSE 0x044
-#define MV64340_INTERRUPT0_MASK_0_LOW 0x054
-#define MV64340_INTERRUPT0_MASK_0_HIGH 0x05c
-#define MV64340_INTERRUPT0_SELECT_CAUSE 0x064
-#define MV64340_INTERRUPT1_MASK_0_LOW 0x074
-#define MV64340_INTERRUPT1_MASK_0_HIGH 0x07c
-#define MV64340_INTERRUPT1_SELECT_CAUSE 0x084
-
-/****************************************/
-/* MPP Interface Registers */
-/****************************************/
-
-#define MV64340_MPP_CONTROL0 0xf000
-#define MV64340_MPP_CONTROL1 0xf004
-#define MV64340_MPP_CONTROL2 0xf008
-#define MV64340_MPP_CONTROL3 0xf00c
-
-/****************************************/
-/* Serial Initialization registers */
-/****************************************/
-
-#define MV64340_SERIAL_INIT_LAST_DATA 0xf324
-#define MV64340_SERIAL_INIT_CONTROL 0xf328
-#define MV64340_SERIAL_INIT_STATUS 0xf32c
-
-extern void mv64340_irq_init(unsigned int base);
-
-#endif /* __ASM_MV64340_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SGI/Newport video card ioctl definitions
- */
-#ifndef _ASM_NG1_H
-#define _ASM_NG1_H
-
-typedef struct {
- int flags;
- __u16 w, h;
- __u16 fields_sec;
-} ng1_vof_info_t;
-
-struct ng1_info {
- struct gfx_info gfx_info;
- __u8 boardrev;
- __u8 rex3rev;
- __u8 vc2rev;
- __u8 monitortype;
- __u8 videoinstalled;
- __u8 mcrev;
- __u8 bitplanes;
- __u8 xmap9rev;
- __u8 cmaprev;
- ng1_vof_info_t ng1_vof_info;
- __u8 bt445rev;
- __u8 paneltype;
-};
-
-#define GFX_NAME_NEWPORT "NG1"
-
-/* ioctls */
-#define NG1_SET_CURSOR_HOTSPOT 21001
-struct ng1_set_cursor_hotspot {
- unsigned short xhot;
- unsigned short yhot;
-};
-
-#define NG1_SETDISPLAYMODE 21006
-struct ng1_setdisplaymode_args {
- int wid;
- unsigned int mode;
-};
-
-#define NG1_SETGAMMARAMP0 21007
-struct ng1_setgammaramp_args {
- unsigned char red [256];
- unsigned char green [256];
- unsigned char blue [256];
-};
-
-#endif /* _ASM_NG1_H */
+++ /dev/null
-/*
- * ng1hw.h: Tweaks the newport.h structures and definitions to be compatible
- * with IRIX. Quite ugly, but it works.
- *
- * Copyright (C) 1999 Ulf Carlsson (ulfc@thepuffingroup.com)
- */
-#ifndef _SGI_NG1HW_H
-#define _SGI_NG1HW_H
-
-#include <video/newport.h>
-
-#define rex3regs newport_rexregs
-#define configregs newport_cregs
-#define float_long npfreg_t
-
-typedef struct newport_rexregs Rex3regs;
-typedef struct newport_cregs Configregs;
-typedef union np_dcb DCB_reg;
-
-
-/* It looks like I can't do a simple tweak with this structure because the IRIX
- * version is just *too* stupid. Ok, here's a new version of it..
- */
-
-struct rex3chip {
- struct newport_rexregs set;
- unsigned long _unused0[0x16e];
- struct newport_rexregs go;
- unsigned long _unused1[0x22e];
- struct {
- struct newport_cregs set;
- unsigned long _unused2[0x1ef];
- struct newport_cregs go;
- } p1;
-};
-
-typedef struct rex3chip rex3Chip;
-typedef struct rex3chip Rex3chip;
-
-/* Tweak the defines .. */
-
-#define DM0_OPCODE NPORT_DMODE0_OPMASK
-#define DM0_NOP NPORT_DMODE0_NOP
-#define DM0_READ NPORT_DMODE0_RD
-#define DM0_DRAW NPORT_DMODE0_DRAW
-#define DM0_SCR2SCR NPORT_DMODE0_S2S
-
-#define DM0_ADRMODE_SHIFT 2
-#define DM0_ADRMODE NPORT_DMODE0_AMMASK
-#define DM0_SPAN NPORT_DMODE0_SPAN
-#define DM0_BLOCK NPORT_DMODE0_BLOCK
-#define DM0_ILINE NPORT_DMODE0_ILINE
-#define DM0_FLINE NPORT_DMODE0_FLINE
-#define DM0_ALINE NPORT_DMODE0_ALINE
-#define DM0_TLINE NPORT_DMODE0_TLINE
-#define DM0_BLINE NPORT_DMODE0_BLINE
-
-#define DM0_DOSETUP NPORT_DMODE0_DOSETUP
-#define DM0_COLORHOST NPORT_DMODE0_CHOST
-#define DM0_ALPHAHOST NPORT_DMODE0_AHOST
-#define DM0_STOPONX NPORT_DMODE0_STOPX
-#define DM0_STOPONY NPORT_DMODE0_STOPY
-#define DM0_STOPONXY (NPORT_DMODE0_STOPX | NPORT_DMODE0_STOPY)
-#define DM0_SKIPFIRST NPORT_DMODE0_SK1ST
-#define DM0_SKIPLAST NPORT_DMODE0_SKLST
-#define DM0_ENZPATTERN NPORT_DMODE0_ZPENAB
-#define DM0_ENLSPATTERN NPORT_DMODE0_LISPENAB
-#define DM0_LSADVLAST NPORT_DMODE0_LISLST
-#define DM0_LENGTH32 NPORT_DMODE0_L32
-#define DM0_ZOPAQUE NPORT_DMODE0_ZOPQ
-#define DM0_LSOPAQUE NPORT_DMODE0_LISOPQ
-#define DM0_SHADE NPORT_DMODE0_SHADE
-#define DM0_LRONLY NPORT_DMODE0_LRONLY
-#define DM0_XYOFFSET NPORT_DMODE0_XYOFF
-#define DM0_CICLAMP NPORT_DMODE0_CLAMP
-#define DM0_ENDPTFILTER NPORT_DMODE0_ENDPF
-#define DM0_YSTRIDE NPORT_DMODE0_YSTR
-
-#define DM1_PLANES_SHIFT 0
-/* The rest of the DM1 planes defines are in newport.h */
-
-#define DM1_DRAWDEPTH_SHIFT 3
-#define DM1_DRAWDEPTH_MASK NPORT_DMODE1_DDMASK
-#define DM1_DRAWDEPTH NPORT_DMODE1_DD24 /* An alias? */
-#define DM1_DRAWDEPTH4 NPORT_DMODE1_DD4
-#define DM1_DRAWDEPTH8 NPORT_DMODE1_DD8
-#define DM1_DRAWDEPTH12 NPORT_DMODE1_DD12
-#define DM1_DRAWDEPTH24 NPORT_DMODE1_DD24
-
-#define DM1_DBLSRC NPORT_DMODE1_DSRC
-#define DM1_YFLIP NPORT_DMODE1_YFLIP
-#define DM1_RWPACKED NPORT_DMODE1_RWPCKD
-
-#define DM1_HOSTDEPTH_SHIFT 8
-#define DM1_HOSTDEPTH_MASK NPORT_DMODE1_HDMASK
-#define DM1_HOSTDEPTH NPORT_DMODE1_HD32 /* An alias? */
-#define DM1_HOSTDEPTH4 NPORT_DMODE1_HD4
-#define DM1_HOSTDEPTH8 NPORT_DMODE1_HD8
-#define DM1_HOSTDEPTH12 NPORT_DMODE1_HD12
-#define DM1_HOSTDEPTH32 NPORT_DMODE1_HD32
-
-#define DM1_RWDOUBLE NPORT_DMODE1_RWDBL
-#define DM1_SWAPENDIAN NPORT_DMODE1_ESWAP
-
-#define DM1_COLORCOMPARE_SHIFT 12
-#define DM1_COLORCOMPARE_MASK NPORT_DMODE1_CCMASK
-#define DM1_COLORCOMPARE NPORT_DMODE1_CCMASK
-#define DM1_COLORCOMPLT NPORT_DMODE1_CCLT
-#define DM1_COLORCOMPEQ NPORT_DMODE1_CCEQ
-#define DM1_COLORCOMPGT NPORT_DMODE1_CCGT
-
-#define DM1_RGBMODE NPORT_DMODE1_RGBMD
-#define DM1_ENDITHER NPORT_DMODE1_DENAB
-#define DM1_FASTCLEAR NPORT_DMODE1_FCLR
-#define DM1_ENBLEND NPORT_DMODE1_BENAB
-
-#define DM1_SF_SHIFT 19
-#define DM1_SF_MASK NPORT_DMODE1_SFMASK
-#define DM1_SF NPORT_DMODE1_SFMASK
-#define DM1_SF_ZERO NPORT_DMODE1_SF0
-#define DM1_SF_ONE NPORT_DMODE1_SF1
-#define DM1_SF_DC NPORT_DMODE1_SFDC
-#define DM1_SF_MDC NPORT_DMODE1_SFMDC
-#define DM1_SF_SA NPORT_DMODE1_SFSA
-#define DM1_SF_MSA NPORT_DMODE1_SFMSA
-
-#define DM1_DF_SHIFT 22 /* dfactor(2:0) */
-#define DM1_DF_MASK NPORT_DMODE1_DFMASK
-#define DM1_DF NPORT_DMODE1_DFMASK
-#define DM1_DF_ZERO NPORT_DMODE1_DF0
-#define DM1_DF_ONE NPORT_DMODE1_DF1
-#define DM1_DF_SC NPORT_DMODE1_DFSC
-#define DM1_DF_MSC NPORT_DMODE1_DFMSC
-#define DM1_DF_SA NPORT_DMODE1_DFSA
-#define DM1_DF_MSA NPORT_DMODE1_DFMSA
-
-#define DM1_ENBACKBLEND NPORT_DMODE1_BBENAB
-#define DM1_ENPREFETCH NPORT_DMODE1_PFENAB
-#define DM1_BLENDALPHA NPORT_DMODE1_ABLEND
-
-#define DM1_LO_SHIFT 28
-#define DM1_LO NPORT_DMODE1_LOMASK
-#define DM1_LO_MASK NPORT_DMODE1_LOMASK
-#define DM1_LO_ZERO NPORT_DMODE1_LOZERO
-#define DM1_LO_AND NPORT_DMODE1_LOAND
-#define DM1_LO_ANDR NPORT_DMODE1_LOANDR
-#define DM1_LO_SRC NPORT_DMODE1_LOSRC
-#define DM1_LO_ANDI NPORT_DMODE1_LOANDI
-#define DM1_LO_DST NPORT_DMODE1_LODST
-#define DM1_LO_XOR NPORT_DMODE1_LOXOR
-#define DM1_LO_OR NPORT_DMODE1_LOOR
-#define DM1_LO_NOR NPORT_DMODE1_LONOR
-#define DM1_LO_XNOR NPORT_DMODE1_LOXNOR
-#define DM1_LO_NDST NPORT_DMODE1_LONDST
-#define DM1_LO_ORR NPORT_DMODE1_LOORR
-#define DM1_LO_NSRC NPORT_DMODE1_LONSRC
-#define DM1_LO_ORI NPORT_DMODE1_LOORI
-#define DM1_LO_NAND NPORT_DMODE1_LONAND
-#define DM1_LO_ONE NPORT_DMODE1_LOONE
-
-#define SMASK0 NPORT_CMODE_SM0
-#define SMASK1 NPORT_CMODE_SM1
-#define SMASK2 NPORT_CMODE_SM2
-#define SMASK3 NPORT_CMODE_SM3
-#define SMASK4 NPORT_CMODE_SM4
-#define ALL_SMASKS 0x1f
-
-#define CM_CIDMATCH_SHIFT 9
-#define CM_CIDMATCH_MASK NPORT_CMODE_CMSK
-
-#define REX3VERSION_MASK NPORT_STAT_VERS
-#define GFXBUSY NPORT_STAT_GBUSY
-#define BACKBUSY NPORT_STAT_BBUSY
-#define VRINT NPORT_STAT_VRINT
-#define VIDEOINT NPORT_STAT_VIDINT
-#define GFIFO_LEVEL_SHIFT 7
-#define GFIFO_LEVEL_MASK NPORT_STAT_GLMSK
-#define BFIFO_LEVEL_SHIFT 13
-#define BFIFO_LEVEL_MASK NPORT_STAT_BLMSK
-#define BFIFO_INT NPORT_STAT_BFIRQ
-#define GFIFO_INT NPORT_STAT_GFIRQ
-
-#define GIO32MODE NPORT_CFG_G32MD
-#define BUSWIDTH NPORT_CFG_BWIDTH
-#define EXTREGXCVR NPORT_CFG_ERCVR
-#define BFIFODEPTH_SHIFT 3
-#define BFIFODEPTH_MASK NPORT_CFG_BDMSK
-#define BFIFOABOVEINT NPORT_CFG_BFAINT
-#define GFIFODEPTH_SHIFT 8
-#define GFIFODEPTH_MASK NPORT_CFG_GDMSK
-#define GFIFOABOVEINT NPORT_CFG_GFAINT
-#define TIMEOUT_SHIFT 14
-#define TIMEOUT_MASK NPORT_CFG_TOMSK
-#define VREFRESH_SHIFT 17
-#define VREFRESH_MASK NPORT_CFG_VRMSK
-#define FB_TYPE NPORT_CFG_FBTYP
-
-#define DCB_DATAWIDTH_MASK (0x3)
-
-#define DCB_CRS_MASK (0x7 << DCB_CRS_SHIFT)
-#define DCB_ADDR_MASK (0xf << DCB_ADDR_SHIFT)
-#define DCB_CSWIDTH_MASK (0x1f << DCB_CSWIDTH_SHIFT)
-#define DCB_CSHOLD_MASK (0x1f << DCB_CSHOLD_SHIFT)
-#define DCB_CSSETUP_MASK (0x1f << DCB_CSSETUP_SHIFT)
-
-#define DCB_SWAPENDIAN (1 << 28)
-
-#define REX3WAIT(rex3) while ((rex3)->p1.set.status & GFXBUSY)
-#define BFIFOWAIT(rex3) while ((rex3)->p1.set.status & BACKBUSY)
-
-#define REX3_GIO_ADDR_0 0x1f0f0000
-#define REX3_GIO_ADDR_1 0x1f4f0000
-#define REX3_GIO_ADDR_2 0x1f8f0000
-#define REX3_GIO_ADDR_3 0x1fcf0000
-
-#define NG1_XSIZE 1280
-#define NG1_YSIZE 1024
-
-#endif
+++ /dev/null
-#ifndef __ASM_PCI_CHANNEL_H
-#define __ASM_PCI_CHANNEL_H
-
-/*
- * This file essentially defines the interface between board
- * specific PCI code and MIPS common PCI code. Should potentially put
- * into include/asm/pci.h file.
- */
-
-#include <linux/ioport.h>
-#include <linux/pci.h>
-
-/*
- * Each pci channel is a top-level PCI bus seem by CPU. A machine with
- * multiple PCI channels may have multiple PCI host controllers or a
- * single controller supporting multiple channels.
- */
-struct pci_controller {
- struct pci_controller *next;
- struct pci_bus *bus;
-
- struct pci_ops *pci_ops;
- struct resource *mem_resource;
- unsigned long mem_offset;
- struct resource *io_resource;
- unsigned long io_offset;
-
- /* For compatibility with current (as of July 2003) pciutils
- and XFree86. Eventually will be removed. */
- unsigned int need_domain_info;
-
- int iommu;
-};
-
-/*
- * Used by boards to register their PCI interfaces before the actual scanning.
- */
-extern struct pci_controller * alloc_pci_controller(void);
-extern void register_pci_controller(struct pci_controller *hose);
-
-/*
- * board supplied pci irq fixup routine
- */
-extern int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
-
-#endif /* __ASM_PCI_CHANNEL_H */
+++ /dev/null
-#ifndef __ASM_RMAP_H
-#define __ASM_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#endif /* __ASM_RMAP_H */
+++ /dev/null
-/*
- * FILE NAME
- * include/asm-mips/vr41xx/eagle.h
- *
- * BRIEF MODULE DESCRIPTION
- * Include file for NEC Eagle board.
- *
- * Author: MontaVista Software, Inc.
- * yyuasa@mvista.com or source@mvista.com
- *
- * Copyright 2001-2003 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __NEC_EAGLE_H
-#define __NEC_EAGLE_H
-
-#include <asm/addrspace.h>
-#include <asm/vr41xx/vr41xx.h>
-
-/*
- * Board specific address mapping
- */
-#define VR41XX_PCI_MEM1_BASE 0x10000000
-#define VR41XX_PCI_MEM1_SIZE 0x04000000
-#define VR41XX_PCI_MEM1_MASK 0x7c000000
-
-#define VR41XX_PCI_MEM2_BASE 0x14000000
-#define VR41XX_PCI_MEM2_SIZE 0x02000000
-#define VR41XX_PCI_MEM2_MASK 0x7e000000
-
-#define VR41XX_PCI_IO_BASE 0x16000000
-#define VR41XX_PCI_IO_SIZE 0x02000000
-#define VR41XX_PCI_IO_MASK 0x7e000000
-
-#define VR41XX_PCI_IO_START 0x01000000
-#define VR41XX_PCI_IO_END 0x01ffffff
-
-#define VR41XX_PCI_MEM_START 0x12000000
-#define VR41XX_PCI_MEM_END 0x15ffffff
-
-#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE)
-#define IO_PORT_RESOURCE_START 0
-#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE
-#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE
-#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
-#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE
-#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
-
-/*
- * General-Purpose I/O Pin Number
- */
-#define VRC4173_PIN 1
-#define PCISLOT_PIN 4
-#define FPGA_PIN 5
-#define DCD_PIN 15
-
-/*
- * Interrupt Number
- */
-#define VRC4173_CASCADE_IRQ GIU_IRQ(VRC4173_PIN)
-#define PCISLOT_IRQ GIU_IRQ(PCISLOT_PIN)
-#define FPGA_CASCADE_IRQ GIU_IRQ(FPGA_PIN)
-#define DCD_IRQ GIU_IRQ(DCD_PIN)
-
-#define SDBINT_IRQ_BASE 88
-#define SDBINT_IRQ(x) (SDBINT_IRQ_BASE + (x))
-/* RFU */
-#define DEG_IRQ SDBINT_IRQ(1)
-#define ENUM_IRQ SDBINT_IRQ(2)
-#define SIO1INT_IRQ SDBINT_IRQ(3)
-#define SIO2INT_IRQ SDBINT_IRQ(4)
-#define PARINT_IRQ SDBINT_IRQ(5)
-#define SDBINT_IRQ_LAST PARINT_IRQ
-
-#define PCIINT_IRQ_BASE 96
-#define PCIINT_IRQ(x) (PCIINT_IRQ_BASE + (x))
-#define CP_INTA_IRQ PCIINT_IRQ(0)
-#define CP_INTB_IRQ PCIINT_IRQ(1)
-#define CP_INTC_IRQ PCIINT_IRQ(2)
-#define CP_INTD_IRQ PCIINT_IRQ(3)
-#define LANINTA_IRQ PCIINT_IRQ(4)
-#define PCIINT_IRQ_LAST LANINTA_IRQ
-
-/*
- * On board Devices I/O Mapping
- */
-#define NEC_EAGLE_SIO1RB KSEG1ADDR(0x0DFFFEC0)
-#define NEC_EAGLE_SIO1TH KSEG1ADDR(0x0DFFFEC0)
-#define NEC_EAGLE_SIO1IE KSEG1ADDR(0x0DFFFEC2)
-#define NEC_EAGLE_SIO1IID KSEG1ADDR(0x0DFFFEC4)
-#define NEC_EAGLE_SIO1FC KSEG1ADDR(0x0DFFFEC4)
-#define NEC_EAGLE_SIO1LC KSEG1ADDR(0x0DFFFEC6)
-#define NEC_EAGLE_SIO1MC KSEG1ADDR(0x0DFFFEC8)
-#define NEC_EAGLE_SIO1LS KSEG1ADDR(0x0DFFFECA)
-#define NEC_EAGLE_SIO1MS KSEG1ADDR(0x0DFFFECC)
-#define NEC_EAGLE_SIO1SC KSEG1ADDR(0x0DFFFECE)
-
-#define NEC_EAGLE_SIO2TH KSEG1ADDR(0x0DFFFED0)
-#define NEC_EAGLE_SIO2IE KSEG1ADDR(0x0DFFFED2)
-#define NEC_EAGLE_SIO2IID KSEG1ADDR(0x0DFFFED4)
-#define NEC_EAGLE_SIO2FC KSEG1ADDR(0x0DFFFED4)
-#define NEC_EAGLE_SIO2LC KSEG1ADDR(0x0DFFFED6)
-#define NEC_EAGLE_SIO2MC KSEG1ADDR(0x0DFFFED8)
-#define NEC_EAGLE_SIO2LS KSEG1ADDR(0x0DFFFEDA)
-#define NEC_EAGLE_SIO2MS KSEG1ADDR(0x0DFFFEDC)
-#define NEC_EAGLE_SIO2SC KSEG1ADDR(0x0DFFFEDE)
-
-#define NEC_EAGLE_PIOPP_DATA KSEG1ADDR(0x0DFFFEE0)
-#define NEC_EAGLE_PIOPP_STATUS KSEG1ADDR(0x0DFFFEE2)
-#define NEC_EAGLE_PIOPP_CNT KSEG1ADDR(0x0DFFFEE4)
-#define NEC_EAGLE_PIOPP_EPPADDR KSEG1ADDR(0x0DFFFEE6)
-#define NEC_EAGLE_PIOPP_EPPDATA0 KSEG1ADDR(0x0DFFFEE8)
-#define NEC_EAGLE_PIOPP_EPPDATA1 KSEG1ADDR(0x0DFFFEEA)
-#define NEC_EAGLE_PIOPP_EPPDATA2 KSEG1ADDR(0x0DFFFEEC)
-
-#define NEC_EAGLE_PIOECP_DATA KSEG1ADDR(0x0DFFFEF0)
-#define NEC_EAGLE_PIOECP_CONFIG KSEG1ADDR(0x0DFFFEF2)
-#define NEC_EAGLE_PIOECP_EXTCNT KSEG1ADDR(0x0DFFFEF4)
-
-/*
- * FLSHCNT Register
- */
-#define NEC_EAGLE_FLSHCNT KSEG1ADDR(0x0DFFFFA0)
-#define NEC_EAGLE_FLSHCNT_FRDY 0x80
-#define NEC_EAGLE_FLSHCNT_VPPE 0x40
-#define NEC_EAGLE_FLSHCNT_WP2 0x01
-
-/*
- * FLSHBANK Register
- */
-#define NEC_EAGLE_FLSHBANK KSEG1ADDR(0x0DFFFFA4)
-#define NEC_EAGLE_FLSHBANK_S_BANK2 0x40
-#define NEC_EAGLE_FLSHBANK_S_BANK1 0x20
-#define NEC_EAGLE_FLSHBANK_BNKQ4 0x10
-#define NEC_EAGLE_FLSHBANK_BNKQ3 0x08
-#define NEC_EAGLE_FLSHBANK_BNKQ2 0x04
-#define NEC_EAGLE_FLSHBANK_BNKQ1 0x02
-#define NEC_EAGLE_FLSHBANK_BNKQ0 0x01
-
-/*
- * SWITCH Setting Register
- */
-#define NEC_EAGLE_SWTCHSET KSEG1ADDR(0x0DFFFFA8)
-#define NEC_EAGLE_SWTCHSET_DP2SW4 0x80
-#define NEC_EAGLE_SWTCHSET_DP2SW3 0x40
-#define NEC_EAGLE_SWTCHSET_DP2SW2 0x20
-#define NEC_EAGLE_SWTCHSET_DP2SW1 0x10
-#define NEC_EAGLE_SWTCHSET_DP1SW4 0x08
-#define NEC_EAGLE_SWTCHSET_DP1SW3 0x04
-#define NEC_EAGLE_SWTCHSET_DP1SW2 0x02
-#define NEC_EAGLE_SWTCHSET_DP1SW1 0x01
-
-/*
- * PPT Parallel Port Device Controller
- */
-#define NEC_EAGLE_PPT_WRITE_DATA KSEG1ADDR(0x0DFFFFB0)
-#define NEC_EAGLE_PPT_READ_DATA KSEG1ADDR(0x0DFFFFB2)
-#define NEC_EAGLE_PPT_CNT KSEG1ADDR(0x0DFFFFB4)
-#define NEC_EAGLE_PPT_CNT2 KSEG1ADDR(0x0DFFFFB4)
-
-/* Control Register */
-#define NEC_EAGLE_PPT_INTMSK 0x20
-#define NEC_EAGLE_PPT_PARIINT 0x10
-#define NEC_EAGLE_PPT_SELECTIN 0x08
-#define NEC_EAGLE_PPT_INIT 0x04
-#define NEC_EAGLE_PPT_AUTOFD 0x02
-#define NEC_EAGLE_PPT_STROBE 0x01
-
-/* Control Rgister 2 */
-#define NEC_EAGLE_PPT_PAREN 0x80
-#define NEC_EAGLE_PPT_AUTOEN 0x20
-#define NEC_EAGLE_PPT_BUSY 0x10
-#define NEC_EAGLE_PPT_ACK 0x08
-#define NEC_EAGLE_PPT_PE 0x04
-#define NEC_EAGLE_PPT_SELECT 0x02
-#define NEC_EAGLE_PPT_FAULT 0x01
-
-/*
- * LEDWR Register
- */
-#define NEC_EAGLE_LEDWR1 KSEG1ADDR(0x0DFFFFC0)
-#define NEC_EAGLE_LEDWR2 KSEG1ADDR(0x0DFFFFC4)
-
-/*
- * SDBINT Register
- */
-#define NEC_EAGLE_SDBINT KSEG1ADDR(0x0DFFFFD0)
-#define NEC_EAGLE_SDBINT_PARINT 0x20
-#define NEC_EAGLE_SDBINT_SIO2INT 0x10
-#define NEC_EAGLE_SDBINT_SIO1INT 0x08
-#define NEC_EAGLE_SDBINT_ENUM 0x04
-#define NEC_EAGLE_SDBINT_DEG 0x02
-
-/*
- * SDB INTMSK Register
- */
-#define NEC_EAGLE_SDBINTMSK KSEG1ADDR(0x0DFFFFD4)
-#define NEC_EAGLE_SDBINTMSK_MSKPAR 0x20
-#define NEC_EAGLE_SDBINTMSK_MSKSIO2 0x10
-#define NEC_EAGLE_SDBINTMSK_MSKSIO1 0x08
-#define NEC_EAGLE_SDBINTMSK_MSKENUM 0x04
-#define NEC_EAGLE_SDBINTMSK_MSKDEG 0x02
-
-/*
- * RSTREG Register
- */
-#define NEC_EAGLE_RSTREG KSEG1ADDR(0x0DFFFFD8)
-#define NEC_EAGLE_RST_RSTSW 0x02
-#define NEC_EAGLE_RST_LEDOFF 0x01
-
-/*
- * PCI INT Rgister
- */
-#define NEC_EAGLE_PCIINTREG KSEG1ADDR(0x0DFFFFDC)
-#define NEC_EAGLE_PCIINT_LANINT 0x10
-#define NEC_EAGLE_PCIINT_CP_INTD 0x08
-#define NEC_EAGLE_PCIINT_CP_INTC 0x04
-#define NEC_EAGLE_PCIINT_CP_INTB 0x02
-#define NEC_EAGLE_PCIINT_CP_INTA 0x01
-
-/*
- * PCI INT Mask Register
- */
-#define NEC_EAGLE_PCIINTMSKREG KSEG1ADDR(0x0DFFFFE0)
-#define NEC_EAGLE_PCIINTMSK_MSKLANINT 0x10
-#define NEC_EAGLE_PCIINTMSK_MSKCP_INTD 0x08
-#define NEC_EAGLE_PCIINTMSK_MSKCP_INTC 0x04
-#define NEC_EAGLE_PCIINTMSK_MSKCP_INTB 0x02
-#define NEC_EAGLE_PCIINTMSK_MSKCP_INTA 0x01
-
-/*
- * CLK Division Register
- */
-#define NEC_EAGLE_CLKDIV KSEG1ADDR(0x0DFFFFE4)
-#define NEC_EAGLE_CLKDIV_PCIDIV1 0x10
-#define NEC_EAGLE_CLKDIV_PCIDIV0 0x08
-#define NEC_EAGLE_CLKDIV_VTDIV2 0x04
-#define NEC_EAGLE_CLKDIV_VTDIV1 0x02
-#define NEC_EAGLE_CLKDIV_VTDIV0 0x01
-
-/*
- * Source Revision Register
- */
-#define NEC_EAGLE_REVISION KSEG1ADDR(0x0DFFFFE8)
-
-#endif /* __NEC_EAGLE_H */
+++ /dev/null
-/*
- * FILE NAME
- * include/asm-mips/vr41xx/tb0229.h
- *
- * BRIEF MODULE DESCRIPTION
- * Include file for TANBAC TB0229 and TB0219.
- *
- * Copyright 2002,2003 Yoichi Yuasa
- * yuasa@hh.iij4u.or.jp
- *
- * Modified for TANBAC TB0229:
- * Copyright 2003 Megasolution Inc.
- * matsu@megasolution.jp
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#ifndef __TANBAC_TB0229_H
-#define __TANBAC_TB0229_H
-
-#include <asm/addrspace.h>
-#include <asm/vr41xx/vr41xx.h>
-
-/*
- * Board specific address mapping
- */
-#define VR41XX_PCI_MEM1_BASE 0x10000000
-#define VR41XX_PCI_MEM1_SIZE 0x04000000
-#define VR41XX_PCI_MEM1_MASK 0x7c000000
-
-#define VR41XX_PCI_MEM2_BASE 0x14000000
-#define VR41XX_PCI_MEM2_SIZE 0x02000000
-#define VR41XX_PCI_MEM2_MASK 0x7e000000
-
-#define VR41XX_PCI_IO_BASE 0x16000000
-#define VR41XX_PCI_IO_SIZE 0x02000000
-#define VR41XX_PCI_IO_MASK 0x7e000000
-
-#define VR41XX_PCI_IO_START 0x01000000
-#define VR41XX_PCI_IO_END 0x01ffffff
-
-#define VR41XX_PCI_MEM_START 0x12000000
-#define VR41XX_PCI_MEM_END 0x15ffffff
-
-#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE)
-#define IO_PORT_RESOURCE_START 0
-#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE
-#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE
-#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
-#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE
-#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
-
-/*
- * General-Purpose I/O Pin Number
- */
-#define TB0219_PCI_SLOT1_PIN 2
-#define TB0219_PCI_SLOT2_PIN 3
-#define TB0219_PCI_SLOT3_PIN 4
-
-/*
- * Interrupt Number
- */
-#define TB0219_PCI_SLOT1_IRQ GIU_IRQ(TB0219_PCI_SLOT1_PIN)
-#define TB0219_PCI_SLOT2_IRQ GIU_IRQ(TB0219_PCI_SLOT2_PIN)
-#define TB0219_PCI_SLOT3_IRQ GIU_IRQ(TB0219_PCI_SLOT3_PIN)
-
-#define TB0219_RESET_REGS KSEG1ADDR(0x0a00000e)
-
-extern void tanbac_tb0229_restart(char *command);
-
-#endif /* __TANBAC_TB0229_H */
+++ /dev/null
-#ifndef _PARISC_BOOTDATA_H
-#define _PARISC_BOOTDATA_H
-
-/* structure given from bootloader... */
-typedef struct {
- unsigned data_valid_signature,
- initrd_start,
- initrd_end;
- char commandline[1024];
-} bootdata_t;
-
-#define BOOTDATA_DATA_VALID_SIGNATURE 0xC0400000
-
-#define BOOTDATA_PTR ((bootdata_t*) 0xC0400000)
-
-#endif
+++ /dev/null
-#ifndef _ASM_PARISC_CPUMASK_H
-#define _ASM_PARISC_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_PARISC_CPUMASK_H */
+++ /dev/null
-#ifndef _PARISC_RMAP_H
-#define _PARISC_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#endif
+++ /dev/null
-#ifndef _ASM_PARISC_SOM_H
-#define _ASM_PARISC_SOM_H
-
-/* File format definition for SOM executables / shared libraries */
-#include <linux/som.h>
-
-
-#endif /* _ASM_PARISC_SOM_H
+++ /dev/null
-/*
- * MPC8260 Communication Processor Module.
- * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
- *
- * This file contains structures and information for the communication
- * processor channels found in the dual port RAM or parameter RAM.
- * All CPM control and status is available through the MPC8260 internal
- * memory map. See immap.h for details.
- */
-#ifdef __KERNEL__
-#ifndef __CPM_82XX__
-#define __CPM_82XX__
-
-#include <asm/immap_8260.h>
-
-/* CPM Command register.
-*/
-#define CPM_CR_RST ((uint)0x80000000)
-#define CPM_CR_PAGE ((uint)0x7c000000)
-#define CPM_CR_SBLOCK ((uint)0x03e00000)
-#define CPM_CR_FLG ((uint)0x00010000)
-#define CPM_CR_MCN ((uint)0x00003fc0)
-#define CPM_CR_OPCODE ((uint)0x0000000f)
-
-/* Device sub-block and page codes.
-*/
-#define CPM_CR_SCC1_SBLOCK (0x04)
-#define CPM_CR_SCC2_SBLOCK (0x05)
-#define CPM_CR_SCC3_SBLOCK (0x06)
-#define CPM_CR_SCC4_SBLOCK (0x07)
-#define CPM_CR_SMC1_SBLOCK (0x08)
-#define CPM_CR_SMC2_SBLOCK (0x09)
-#define CPM_CR_SPI_SBLOCK (0x0a)
-#define CPM_CR_I2C_SBLOCK (0x0b)
-#define CPM_CR_TIMER_SBLOCK (0x0f)
-#define CPM_CR_RAND_SBLOCK (0x0e)
-#define CPM_CR_FCC1_SBLOCK (0x10)
-#define CPM_CR_FCC2_SBLOCK (0x11)
-#define CPM_CR_FCC3_SBLOCK (0x12)
-#define CPM_CR_IDMA1_SBLOCK (0x14)
-#define CPM_CR_IDMA2_SBLOCK (0x15)
-#define CPM_CR_IDMA3_SBLOCK (0x16)
-#define CPM_CR_IDMA4_SBLOCK (0x17)
-#define CPM_CR_MCC1_SBLOCK (0x1c)
-
-#define CPM_CR_SCC1_PAGE (0x00)
-#define CPM_CR_SCC2_PAGE (0x01)
-#define CPM_CR_SCC3_PAGE (0x02)
-#define CPM_CR_SCC4_PAGE (0x03)
-#define CPM_CR_SMC1_PAGE (0x07)
-#define CPM_CR_SMC2_PAGE (0x08)
-#define CPM_CR_SPI_PAGE (0x09)
-#define CPM_CR_I2C_PAGE (0x0a)
-#define CPM_CR_TIMER_PAGE (0x0a)
-#define CPM_CR_RAND_PAGE (0x0a)
-#define CPM_CR_FCC1_PAGE (0x04)
-#define CPM_CR_FCC2_PAGE (0x05)
-#define CPM_CR_FCC3_PAGE (0x06)
-#define CPM_CR_IDMA1_PAGE (0x07)
-#define CPM_CR_IDMA2_PAGE (0x08)
-#define CPM_CR_IDMA3_PAGE (0x09)
-#define CPM_CR_IDMA4_PAGE (0x0a)
-#define CPM_CR_MCC1_PAGE (0x07)
-#define CPM_CR_MCC2_PAGE (0x08)
-
-/* Some opcodes (there are more...later)
-*/
-#define CPM_CR_INIT_TRX ((ushort)0x0000)
-#define CPM_CR_INIT_RX ((ushort)0x0001)
-#define CPM_CR_INIT_TX ((ushort)0x0002)
-#define CPM_CR_HUNT_MODE ((ushort)0x0003)
-#define CPM_CR_STOP_TX ((ushort)0x0004)
-#define CPM_CR_RESTART_TX ((ushort)0x0006)
-#define CPM_CR_SET_GADDR ((ushort)0x0008)
-
-#define mk_cr_cmd(PG, SBC, MCN, OP) \
- ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
-
-/* Dual Port RAM addresses. The first 16K is available for almost
- * any CPM use, so we put the BDs there. The first 128 bytes are
- * used for SMC1 and SMC2 parameter RAM, so we start allocating
- * BDs above that. All of this must change when we start
- * downloading RAM microcode.
- */
-#define CPM_DATAONLY_BASE ((uint)128)
-#define CPM_DATAONLY_SIZE ((uint)(16 * 1024) - CPM_DATAONLY_BASE)
-#define CPM_DP_NOSPACE ((uint)0x7fffffff)
-#define CPM_FCC_SPECIAL_BASE ((uint)0x0000b000)
-
-/* The number of pages of host memory we allocate for CPM. This is
- * done early in kernel initialization to get physically contiguous
- * pages.
- */
-#define NUM_CPM_HOST_PAGES 2
-
-
-/* Export the base address of the communication processor registers
- * and dual port ram.
- */
-extern cpm8260_t *cpmp; /* Pointer to comm processor */
-uint m8260_cpm_dpalloc(uint size, uint align);
-uint m8260_cpm_hostalloc(uint size, uint align);
-void m8260_cpm_setbrg(uint brg, uint rate);
-void m8260_cpm_fastbrg(uint brg, uint rate, int div16);
-
-/* Buffer descriptors used by many of the CPM protocols.
-*/
-typedef struct cpm_buf_desc {
- ushort cbd_sc; /* Status and Control */
- ushort cbd_datlen; /* Data length in buffer */
- uint cbd_bufaddr; /* Buffer address in host memory */
-} cbd_t;
-
-#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */
-#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */
-#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */
-#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */
-#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame */
-#define BD_SC_CM ((ushort)0x0200) /* Continous mode */
-#define BD_SC_ID ((ushort)0x0100) /* Rec'd too many idles */
-#define BD_SC_P ((ushort)0x0100) /* xmt preamble */
-#define BD_SC_BR ((ushort)0x0020) /* Break received */
-#define BD_SC_FR ((ushort)0x0010) /* Framing error */
-#define BD_SC_PR ((ushort)0x0008) /* Parity error */
-#define BD_SC_OV ((ushort)0x0002) /* Overrun */
-#define BD_SC_CD ((ushort)0x0001) /* ?? */
-
-/* Function code bits, usually generic to devices.
-*/
-#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
-#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */
-#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */
-#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */
-#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */
-
-/* Parameter RAM offsets from the base.
-*/
-#define PROFF_SCC1 ((uint)0x8000)
-#define PROFF_SCC2 ((uint)0x8100)
-#define PROFF_SCC3 ((uint)0x8200)
-#define PROFF_SCC4 ((uint)0x8300)
-#define PROFF_FCC1 ((uint)0x8400)
-#define PROFF_FCC2 ((uint)0x8500)
-#define PROFF_FCC3 ((uint)0x8600)
-#define PROFF_MCC1 ((uint)0x8700)
-#define PROFF_SMC1_BASE ((uint)0x87fc)
-#define PROFF_IDMA1_BASE ((uint)0x87fe)
-#define PROFF_MCC2 ((uint)0x8800)
-#define PROFF_SMC2_BASE ((uint)0x88fc)
-#define PROFF_IDMA2_BASE ((uint)0x88fe)
-#define PROFF_SPI_BASE ((uint)0x89fc)
-#define PROFF_IDMA3_BASE ((uint)0x89fe)
-#define PROFF_TIMERS ((uint)0x8ae0)
-#define PROFF_REVNUM ((uint)0x8af0)
-#define PROFF_RAND ((uint)0x8af8)
-#define PROFF_I2C_BASE ((uint)0x8afc)
-#define PROFF_IDMA4_BASE ((uint)0x8afe)
-
-/* The SMCs are relocated to any of the first eight DPRAM pages.
- * We will fix these at the first locations of DPRAM, until we
- * get some microcode patches :-).
- * The parameter ram space for the SMCs is fifty-some bytes, and
- * they are required to start on a 64 byte boundary.
- */
-#define PROFF_SMC1 (0)
-#define PROFF_SMC2 (64)
-
-
-/* Define enough so I can at least use the serial port as a UART.
- */
-typedef struct smc_uart {
- ushort smc_rbase; /* Rx Buffer descriptor base address */
- ushort smc_tbase; /* Tx Buffer descriptor base address */
- u_char smc_rfcr; /* Rx function code */
- u_char smc_tfcr; /* Tx function code */
- ushort smc_mrblr; /* Max receive buffer length */
- uint smc_rstate; /* Internal */
- uint smc_idp; /* Internal */
- ushort smc_rbptr; /* Internal */
- ushort smc_ibc; /* Internal */
- uint smc_rxtmp; /* Internal */
- uint smc_tstate; /* Internal */
- uint smc_tdp; /* Internal */
- ushort smc_tbptr; /* Internal */
- ushort smc_tbc; /* Internal */
- uint smc_txtmp; /* Internal */
- ushort smc_maxidl; /* Maximum idle characters */
- ushort smc_tmpidl; /* Temporary idle counter */
- ushort smc_brklen; /* Last received break length */
- ushort smc_brkec; /* rcv'd break condition counter */
- ushort smc_brkcr; /* xmt break count register */
- ushort smc_rmask; /* Temporary bit mask */
- uint smc_stmp; /* SDMA Temp */
-} smc_uart_t;
-
-/* SMC uart mode register (Internal memory map).
-*/
-#define SMCMR_REN ((ushort)0x0001)
-#define SMCMR_TEN ((ushort)0x0002)
-#define SMCMR_DM ((ushort)0x000c)
-#define SMCMR_SM_GCI ((ushort)0x0000)
-#define SMCMR_SM_UART ((ushort)0x0020)
-#define SMCMR_SM_TRANS ((ushort)0x0030)
-#define SMCMR_SM_MASK ((ushort)0x0030)
-#define SMCMR_PM_EVEN ((ushort)0x0100) /* Even parity, else odd */
-#define SMCMR_REVD SMCMR_PM_EVEN
-#define SMCMR_PEN ((ushort)0x0200) /* Parity enable */
-#define SMCMR_BS SMCMR_PEN
-#define SMCMR_SL ((ushort)0x0400) /* Two stops, else one */
-#define SMCR_CLEN_MASK ((ushort)0x7800) /* Character length */
-#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK)
-
-/* SMC Event and Mask register.
-*/
-#define SMCM_BRKE ((unsigned char)0x40) /* When in UART Mode */
-#define SMCM_BRK ((unsigned char)0x10) /* When in UART Mode */
-#define SMCM_TXE ((unsigned char)0x10)
-#define SMCM_BSY ((unsigned char)0x04)
-#define SMCM_TX ((unsigned char)0x02)
-#define SMCM_RX ((unsigned char)0x01)
-
-/* Baud rate generators.
-*/
-#define CPM_BRG_RST ((uint)0x00020000)
-#define CPM_BRG_EN ((uint)0x00010000)
-#define CPM_BRG_EXTC_INT ((uint)0x00000000)
-#define CPM_BRG_EXTC_CLK3_9 ((uint)0x00004000)
-#define CPM_BRG_EXTC_CLK5_15 ((uint)0x00008000)
-#define CPM_BRG_ATB ((uint)0x00002000)
-#define CPM_BRG_CD_MASK ((uint)0x00001ffe)
-#define CPM_BRG_DIV16 ((uint)0x00000001)
-
-/* SCCs.
-*/
-#define SCC_GSMRH_IRP ((uint)0x00040000)
-#define SCC_GSMRH_GDE ((uint)0x00010000)
-#define SCC_GSMRH_TCRC_CCITT ((uint)0x00008000)
-#define SCC_GSMRH_TCRC_BISYNC ((uint)0x00004000)
-#define SCC_GSMRH_TCRC_HDLC ((uint)0x00000000)
-#define SCC_GSMRH_REVD ((uint)0x00002000)
-#define SCC_GSMRH_TRX ((uint)0x00001000)
-#define SCC_GSMRH_TTX ((uint)0x00000800)
-#define SCC_GSMRH_CDP ((uint)0x00000400)
-#define SCC_GSMRH_CTSP ((uint)0x00000200)
-#define SCC_GSMRH_CDS ((uint)0x00000100)
-#define SCC_GSMRH_CTSS ((uint)0x00000080)
-#define SCC_GSMRH_TFL ((uint)0x00000040)
-#define SCC_GSMRH_RFW ((uint)0x00000020)
-#define SCC_GSMRH_TXSY ((uint)0x00000010)
-#define SCC_GSMRH_SYNL16 ((uint)0x0000000c)
-#define SCC_GSMRH_SYNL8 ((uint)0x00000008)
-#define SCC_GSMRH_SYNL4 ((uint)0x00000004)
-#define SCC_GSMRH_RTSM ((uint)0x00000002)
-#define SCC_GSMRH_RSYN ((uint)0x00000001)
-
-#define SCC_GSMRL_SIR ((uint)0x80000000) /* SCC2 only */
-#define SCC_GSMRL_EDGE_NONE ((uint)0x60000000)
-#define SCC_GSMRL_EDGE_NEG ((uint)0x40000000)
-#define SCC_GSMRL_EDGE_POS ((uint)0x20000000)
-#define SCC_GSMRL_EDGE_BOTH ((uint)0x00000000)
-#define SCC_GSMRL_TCI ((uint)0x10000000)
-#define SCC_GSMRL_TSNC_3 ((uint)0x0c000000)
-#define SCC_GSMRL_TSNC_4 ((uint)0x08000000)
-#define SCC_GSMRL_TSNC_14 ((uint)0x04000000)
-#define SCC_GSMRL_TSNC_INF ((uint)0x00000000)
-#define SCC_GSMRL_RINV ((uint)0x02000000)
-#define SCC_GSMRL_TINV ((uint)0x01000000)
-#define SCC_GSMRL_TPL_128 ((uint)0x00c00000)
-#define SCC_GSMRL_TPL_64 ((uint)0x00a00000)
-#define SCC_GSMRL_TPL_48 ((uint)0x00800000)
-#define SCC_GSMRL_TPL_32 ((uint)0x00600000)
-#define SCC_GSMRL_TPL_16 ((uint)0x00400000)
-#define SCC_GSMRL_TPL_8 ((uint)0x00200000)
-#define SCC_GSMRL_TPL_NONE ((uint)0x00000000)
-#define SCC_GSMRL_TPP_ALL1 ((uint)0x00180000)
-#define SCC_GSMRL_TPP_01 ((uint)0x00100000)
-#define SCC_GSMRL_TPP_10 ((uint)0x00080000)
-#define SCC_GSMRL_TPP_ZEROS ((uint)0x00000000)
-#define SCC_GSMRL_TEND ((uint)0x00040000)
-#define SCC_GSMRL_TDCR_32 ((uint)0x00030000)
-#define SCC_GSMRL_TDCR_16 ((uint)0x00020000)
-#define SCC_GSMRL_TDCR_8 ((uint)0x00010000)
-#define SCC_GSMRL_TDCR_1 ((uint)0x00000000)
-#define SCC_GSMRL_RDCR_32 ((uint)0x0000c000)
-#define SCC_GSMRL_RDCR_16 ((uint)0x00008000)
-#define SCC_GSMRL_RDCR_8 ((uint)0x00004000)
-#define SCC_GSMRL_RDCR_1 ((uint)0x00000000)
-#define SCC_GSMRL_RENC_DFMAN ((uint)0x00003000)
-#define SCC_GSMRL_RENC_MANCH ((uint)0x00002000)
-#define SCC_GSMRL_RENC_FM0 ((uint)0x00001000)
-#define SCC_GSMRL_RENC_NRZI ((uint)0x00000800)
-#define SCC_GSMRL_RENC_NRZ ((uint)0x00000000)
-#define SCC_GSMRL_TENC_DFMAN ((uint)0x00000600)
-#define SCC_GSMRL_TENC_MANCH ((uint)0x00000400)
-#define SCC_GSMRL_TENC_FM0 ((uint)0x00000200)
-#define SCC_GSMRL_TENC_NRZI ((uint)0x00000100)
-#define SCC_GSMRL_TENC_NRZ ((uint)0x00000000)
-#define SCC_GSMRL_DIAG_LE ((uint)0x000000c0) /* Loop and echo */
-#define SCC_GSMRL_DIAG_ECHO ((uint)0x00000080)
-#define SCC_GSMRL_DIAG_LOOP ((uint)0x00000040)
-#define SCC_GSMRL_DIAG_NORM ((uint)0x00000000)
-#define SCC_GSMRL_ENR ((uint)0x00000020)
-#define SCC_GSMRL_ENT ((uint)0x00000010)
-#define SCC_GSMRL_MODE_ENET ((uint)0x0000000c)
-#define SCC_GSMRL_MODE_DDCMP ((uint)0x00000009)
-#define SCC_GSMRL_MODE_BISYNC ((uint)0x00000008)
-#define SCC_GSMRL_MODE_V14 ((uint)0x00000007)
-#define SCC_GSMRL_MODE_AHDLC ((uint)0x00000006)
-#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005)
-#define SCC_GSMRL_MODE_UART ((uint)0x00000004)
-#define SCC_GSMRL_MODE_SS7 ((uint)0x00000003)
-#define SCC_GSMRL_MODE_ATALK ((uint)0x00000002)
-#define SCC_GSMRL_MODE_HDLC ((uint)0x00000000)
-
-#define SCC_TODR_TOD ((ushort)0x8000)
-
-/* SCC Event and Mask register.
-*/
-#define SCCM_TXE ((unsigned char)0x10)
-#define SCCM_BSY ((unsigned char)0x04)
-#define SCCM_TX ((unsigned char)0x02)
-#define SCCM_RX ((unsigned char)0x01)
-
-typedef struct scc_param {
- ushort scc_rbase; /* Rx Buffer descriptor base address */
- ushort scc_tbase; /* Tx Buffer descriptor base address */
- u_char scc_rfcr; /* Rx function code */
- u_char scc_tfcr; /* Tx function code */
- ushort scc_mrblr; /* Max receive buffer length */
- uint scc_rstate; /* Internal */
- uint scc_idp; /* Internal */
- ushort scc_rbptr; /* Internal */
- ushort scc_ibc; /* Internal */
- uint scc_rxtmp; /* Internal */
- uint scc_tstate; /* Internal */
- uint scc_tdp; /* Internal */
- ushort scc_tbptr; /* Internal */
- ushort scc_tbc; /* Internal */
- uint scc_txtmp; /* Internal */
- uint scc_rcrc; /* Internal */
- uint scc_tcrc; /* Internal */
-} sccp_t;
-
-/* CPM Ethernet through SCC1.
- */
-typedef struct scc_enet {
- sccp_t sen_genscc;
- uint sen_cpres; /* Preset CRC */
- uint sen_cmask; /* Constant mask for CRC */
- uint sen_crcec; /* CRC Error counter */
- uint sen_alec; /* alignment error counter */
- uint sen_disfc; /* discard frame counter */
- ushort sen_pads; /* Tx short frame pad character */
- ushort sen_retlim; /* Retry limit threshold */
- ushort sen_retcnt; /* Retry limit counter */
- ushort sen_maxflr; /* maximum frame length register */
- ushort sen_minflr; /* minimum frame length register */
- ushort sen_maxd1; /* maximum DMA1 length */
- ushort sen_maxd2; /* maximum DMA2 length */
- ushort sen_maxd; /* Rx max DMA */
- ushort sen_dmacnt; /* Rx DMA counter */
- ushort sen_maxb; /* Max BD byte count */
- ushort sen_gaddr1; /* Group address filter */
- ushort sen_gaddr2;
- ushort sen_gaddr3;
- ushort sen_gaddr4;
- uint sen_tbuf0data0; /* Save area 0 - current frame */
- uint sen_tbuf0data1; /* Save area 1 - current frame */
- uint sen_tbuf0rba; /* Internal */
- uint sen_tbuf0crc; /* Internal */
- ushort sen_tbuf0bcnt; /* Internal */
- ushort sen_paddrh; /* physical address (MSB) */
- ushort sen_paddrm;
- ushort sen_paddrl; /* physical address (LSB) */
- ushort sen_pper; /* persistence */
- ushort sen_rfbdptr; /* Rx first BD pointer */
- ushort sen_tfbdptr; /* Tx first BD pointer */
- ushort sen_tlbdptr; /* Tx last BD pointer */
- uint sen_tbuf1data0; /* Save area 0 - current frame */
- uint sen_tbuf1data1; /* Save area 1 - current frame */
- uint sen_tbuf1rba; /* Internal */
- uint sen_tbuf1crc; /* Internal */
- ushort sen_tbuf1bcnt; /* Internal */
- ushort sen_txlen; /* Tx Frame length counter */
- ushort sen_iaddr1; /* Individual address filter */
- ushort sen_iaddr2;
- ushort sen_iaddr3;
- ushort sen_iaddr4;
- ushort sen_boffcnt; /* Backoff counter */
-
- /* NOTE: Some versions of the manual have the following items
- * incorrectly documented. Below is the proper order.
- */
- ushort sen_taddrh; /* temp address (MSB) */
- ushort sen_taddrm;
- ushort sen_taddrl; /* temp address (LSB) */
-} scc_enet_t;
-
-
-/* SCC Event register as used by Ethernet.
-*/
-#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */
-#define SCCE_ENET_TXE ((ushort)0x0010) /* Transmit Error */
-#define SCCE_ENET_RXF ((ushort)0x0008) /* Full frame received */
-#define SCCE_ENET_BSY ((ushort)0x0004) /* All incoming buffers full */
-#define SCCE_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */
-#define SCCE_ENET_RXB ((ushort)0x0001) /* A buffer was received */
-
-/* SCC Mode Register (PSMR) as used by Ethernet.
-*/
-#define SCC_PSMR_HBC ((ushort)0x8000) /* Enable heartbeat */
-#define SCC_PSMR_FC ((ushort)0x4000) /* Force collision */
-#define SCC_PSMR_RSH ((ushort)0x2000) /* Receive short frames */
-#define SCC_PSMR_IAM ((ushort)0x1000) /* Check individual hash */
-#define SCC_PSMR_ENCRC ((ushort)0x0800) /* Ethernet CRC mode */
-#define SCC_PSMR_PRO ((ushort)0x0200) /* Promiscuous mode */
-#define SCC_PSMR_BRO ((ushort)0x0100) /* Catch broadcast pkts */
-#define SCC_PSMR_SBT ((ushort)0x0080) /* Special backoff timer */
-#define SCC_PSMR_LPB ((ushort)0x0040) /* Set Loopback mode */
-#define SCC_PSMR_SIP ((ushort)0x0020) /* Sample Input Pins */
-#define SCC_PSMR_LCW ((ushort)0x0010) /* Late collision window */
-#define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */
-#define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */
-
-/* Buffer descriptor control/status used by Ethernet receive.
- * Common to SCC and FCC.
- */
-#define BD_ENET_RX_EMPTY ((ushort)0x8000)
-#define BD_ENET_RX_WRAP ((ushort)0x2000)
-#define BD_ENET_RX_INTR ((ushort)0x1000)
-#define BD_ENET_RX_LAST ((ushort)0x0800)
-#define BD_ENET_RX_FIRST ((ushort)0x0400)
-#define BD_ENET_RX_MISS ((ushort)0x0100)
-#define BD_ENET_RX_BC ((ushort)0x0080) /* FCC Only */
-#define BD_ENET_RX_MC ((ushort)0x0040) /* FCC Only */
-#define BD_ENET_RX_LG ((ushort)0x0020)
-#define BD_ENET_RX_NO ((ushort)0x0010)
-#define BD_ENET_RX_SH ((ushort)0x0008)
-#define BD_ENET_RX_CR ((ushort)0x0004)
-#define BD_ENET_RX_OV ((ushort)0x0002)
-#define BD_ENET_RX_CL ((ushort)0x0001)
-#define BD_ENET_RX_STATS ((ushort)0x01ff) /* All status bits */
-
-/* Buffer descriptor control/status used by Ethernet transmit.
- * Common to SCC and FCC.
- */
-#define BD_ENET_TX_READY ((ushort)0x8000)
-#define BD_ENET_TX_PAD ((ushort)0x4000)
-#define BD_ENET_TX_WRAP ((ushort)0x2000)
-#define BD_ENET_TX_INTR ((ushort)0x1000)
-#define BD_ENET_TX_LAST ((ushort)0x0800)
-#define BD_ENET_TX_TC ((ushort)0x0400)
-#define BD_ENET_TX_DEF ((ushort)0x0200)
-#define BD_ENET_TX_HB ((ushort)0x0100)
-#define BD_ENET_TX_LC ((ushort)0x0080)
-#define BD_ENET_TX_RL ((ushort)0x0040)
-#define BD_ENET_TX_RCMASK ((ushort)0x003c)
-#define BD_ENET_TX_UN ((ushort)0x0002)
-#define BD_ENET_TX_CSL ((ushort)0x0001)
-#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */
-
-/* SCC as UART
-*/
-typedef struct scc_uart {
- sccp_t scc_genscc;
- uint scc_res1; /* Reserved */
- uint scc_res2; /* Reserved */
- ushort scc_maxidl; /* Maximum idle chars */
- ushort scc_idlc; /* temp idle counter */
- ushort scc_brkcr; /* Break count register */
- ushort scc_parec; /* receive parity error counter */
- ushort scc_frmec; /* receive framing error counter */
- ushort scc_nosec; /* receive noise counter */
- ushort scc_brkec; /* receive break condition counter */
- ushort scc_brkln; /* last received break length */
- ushort scc_uaddr1; /* UART address character 1 */
- ushort scc_uaddr2; /* UART address character 2 */
- ushort scc_rtemp; /* Temp storage */
- ushort scc_toseq; /* Transmit out of sequence char */
- ushort scc_char1; /* control character 1 */
- ushort scc_char2; /* control character 2 */
- ushort scc_char3; /* control character 3 */
- ushort scc_char4; /* control character 4 */
- ushort scc_char5; /* control character 5 */
- ushort scc_char6; /* control character 6 */
- ushort scc_char7; /* control character 7 */
- ushort scc_char8; /* control character 8 */
- ushort scc_rccm; /* receive control character mask */
- ushort scc_rccr; /* receive control character register */
- ushort scc_rlbc; /* receive last break character */
-} scc_uart_t;
-
-/* SCC Event and Mask registers when it is used as a UART.
-*/
-#define UART_SCCM_GLR ((ushort)0x1000)
-#define UART_SCCM_GLT ((ushort)0x0800)
-#define UART_SCCM_AB ((ushort)0x0200)
-#define UART_SCCM_IDL ((ushort)0x0100)
-#define UART_SCCM_GRA ((ushort)0x0080)
-#define UART_SCCM_BRKE ((ushort)0x0040)
-#define UART_SCCM_BRKS ((ushort)0x0020)
-#define UART_SCCM_CCR ((ushort)0x0008)
-#define UART_SCCM_BSY ((ushort)0x0004)
-#define UART_SCCM_TX ((ushort)0x0002)
-#define UART_SCCM_RX ((ushort)0x0001)
-
-/* The SCC PMSR when used as a UART.
-*/
-#define SCU_PMSR_FLC ((ushort)0x8000)
-#define SCU_PMSR_SL ((ushort)0x4000)
-#define SCU_PMSR_CL ((ushort)0x3000)
-#define SCU_PMSR_UM ((ushort)0x0c00)
-#define SCU_PMSR_FRZ ((ushort)0x0200)
-#define SCU_PMSR_RZS ((ushort)0x0100)
-#define SCU_PMSR_SYN ((ushort)0x0080)
-#define SCU_PMSR_DRT ((ushort)0x0040)
-#define SCU_PMSR_PEN ((ushort)0x0010)
-#define SCU_PMSR_RPM ((ushort)0x000c)
-#define SCU_PMSR_REVP ((ushort)0x0008)
-#define SCU_PMSR_TPM ((ushort)0x0003)
-#define SCU_PMSR_TEVP ((ushort)0x0003)
-
-/* CPM Transparent mode SCC.
- */
-typedef struct scc_trans {
- sccp_t st_genscc;
- uint st_cpres; /* Preset CRC */
- uint st_cmask; /* Constant mask for CRC */
-} scc_trans_t;
-
-#define BD_SCC_TX_LAST ((ushort)0x0800)
-
-/* How about some FCCs.....
-*/
-#define FCC_GFMR_DIAG_NORM ((uint)0x00000000)
-#define FCC_GFMR_DIAG_LE ((uint)0x40000000)
-#define FCC_GFMR_DIAG_AE ((uint)0x80000000)
-#define FCC_GFMR_DIAG_ALE ((uint)0xc0000000)
-#define FCC_GFMR_TCI ((uint)0x20000000)
-#define FCC_GFMR_TRX ((uint)0x10000000)
-#define FCC_GFMR_TTX ((uint)0x08000000)
-#define FCC_GFMR_TTX ((uint)0x08000000)
-#define FCC_GFMR_CDP ((uint)0x04000000)
-#define FCC_GFMR_CTSP ((uint)0x02000000)
-#define FCC_GFMR_CDS ((uint)0x01000000)
-#define FCC_GFMR_CTSS ((uint)0x00800000)
-#define FCC_GFMR_SYNL_NONE ((uint)0x00000000)
-#define FCC_GFMR_SYNL_AUTO ((uint)0x00004000)
-#define FCC_GFMR_SYNL_8 ((uint)0x00008000)
-#define FCC_GFMR_SYNL_16 ((uint)0x0000c000)
-#define FCC_GFMR_RTSM ((uint)0x00002000)
-#define FCC_GFMR_RENC_NRZ ((uint)0x00000000)
-#define FCC_GFMR_RENC_NRZI ((uint)0x00000800)
-#define FCC_GFMR_REVD ((uint)0x00000400)
-#define FCC_GFMR_TENC_NRZ ((uint)0x00000000)
-#define FCC_GFMR_TENC_NRZI ((uint)0x00000100)
-#define FCC_GFMR_TCRC_16 ((uint)0x00000000)
-#define FCC_GFMR_TCRC_32 ((uint)0x00000080)
-#define FCC_GFMR_ENR ((uint)0x00000020)
-#define FCC_GFMR_ENT ((uint)0x00000010)
-#define FCC_GFMR_MODE_ENET ((uint)0x0000000c)
-#define FCC_GFMR_MODE_ATM ((uint)0x0000000a)
-#define FCC_GFMR_MODE_HDLC ((uint)0x00000000)
-
-/* Generic FCC parameter ram.
-*/
-typedef struct fcc_param {
- ushort fcc_riptr; /* Rx Internal temp pointer */
- ushort fcc_tiptr; /* Tx Internal temp pointer */
- ushort fcc_res1;
- ushort fcc_mrblr; /* Max receive buffer length, mod 32 bytes */
- uint fcc_rstate; /* Upper byte is Func code, must be set */
- uint fcc_rbase; /* Receive BD base */
- ushort fcc_rbdstat; /* RxBD status */
- ushort fcc_rbdlen; /* RxBD down counter */
- uint fcc_rdptr; /* RxBD internal data pointer */
- uint fcc_tstate; /* Upper byte is Func code, must be set */
- uint fcc_tbase; /* Transmit BD base */
- ushort fcc_tbdstat; /* TxBD status */
- ushort fcc_tbdlen; /* TxBD down counter */
- uint fcc_tdptr; /* TxBD internal data pointer */
- uint fcc_rbptr; /* Rx BD Internal buf pointer */
- uint fcc_tbptr; /* Tx BD Internal buf pointer */
- uint fcc_rcrc; /* Rx temp CRC */
- uint fcc_res2;
- uint fcc_tcrc; /* Tx temp CRC */
-} fccp_t;
-
-
-/* Ethernet controller through FCC.
-*/
-typedef struct fcc_enet {
- fccp_t fen_genfcc;
- uint fen_statbuf; /* Internal status buffer */
- uint fen_camptr; /* CAM address */
- uint fen_cmask; /* Constant mask for CRC */
- uint fen_cpres; /* Preset CRC */
- uint fen_crcec; /* CRC Error counter */
- uint fen_alec; /* alignment error counter */
- uint fen_disfc; /* discard frame counter */
- ushort fen_retlim; /* Retry limit */
- ushort fen_retcnt; /* Retry counter */
- ushort fen_pper; /* Persistence */
- ushort fen_boffcnt; /* backoff counter */
- uint fen_gaddrh; /* Group address filter, high 32-bits */
- uint fen_gaddrl; /* Group address filter, low 32-bits */
- ushort fen_tfcstat; /* out of sequence TxBD */
- ushort fen_tfclen;
- uint fen_tfcptr;
- ushort fen_mflr; /* Maximum frame length (1518) */
- ushort fen_paddrh; /* MAC address */
- ushort fen_paddrm;
- ushort fen_paddrl;
- ushort fen_ibdcount; /* Internal BD counter */
- ushort fen_idbstart; /* Internal BD start pointer */
- ushort fen_ibdend; /* Internal BD end pointer */
- ushort fen_txlen; /* Internal Tx frame length counter */
- uint fen_ibdbase[8]; /* Internal use */
- uint fen_iaddrh; /* Individual address filter */
- uint fen_iaddrl;
- ushort fen_minflr; /* Minimum frame length (64) */
- ushort fen_taddrh; /* Filter transfer MAC address */
- ushort fen_taddrm;
- ushort fen_taddrl;
- ushort fen_padptr; /* Pointer to pad byte buffer */
- ushort fen_cftype; /* control frame type */
- ushort fen_cfrange; /* control frame range */
- ushort fen_maxb; /* maximum BD count */
- ushort fen_maxd1; /* Max DMA1 length (1520) */
- ushort fen_maxd2; /* Max DMA2 length (1520) */
- ushort fen_maxd; /* internal max DMA count */
- ushort fen_dmacnt; /* internal DMA counter */
- uint fen_octc; /* Total octect counter */
- uint fen_colc; /* Total collision counter */
- uint fen_broc; /* Total broadcast packet counter */
- uint fen_mulc; /* Total multicast packet count */
- uint fen_uspc; /* Total packets < 64 bytes */
- uint fen_frgc; /* Total packets < 64 bytes with errors */
- uint fen_ospc; /* Total packets > 1518 */
- uint fen_jbrc; /* Total packets > 1518 with errors */
- uint fen_p64c; /* Total packets == 64 bytes */
- uint fen_p65c; /* Total packets 64 < bytes <= 127 */
- uint fen_p128c; /* Total packets 127 < bytes <= 255 */
- uint fen_p256c; /* Total packets 256 < bytes <= 511 */
- uint fen_p512c; /* Total packets 512 < bytes <= 1023 */
- uint fen_p1024c; /* Total packets 1024 < bytes <= 1518 */
- uint fen_cambuf; /* Internal CAM buffer poiner */
- ushort fen_rfthr; /* Received frames threshold */
- ushort fen_rfcnt; /* Received frames count */
-} fcc_enet_t;
-
-/* FCC Event/Mask register as used by Ethernet.
-*/
-#define FCC_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */
-#define FCC_ENET_RXC ((ushort)0x0040) /* Control Frame Received */
-#define FCC_ENET_TXC ((ushort)0x0020) /* Out of seq. Tx sent */
-#define FCC_ENET_TXE ((ushort)0x0010) /* Transmit Error */
-#define FCC_ENET_RXF ((ushort)0x0008) /* Full frame received */
-#define FCC_ENET_BSY ((ushort)0x0004) /* Busy. Rx Frame dropped */
-#define FCC_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */
-#define FCC_ENET_RXB ((ushort)0x0001) /* A buffer was received */
-
-/* FCC Mode Register (FPSMR) as used by Ethernet.
-*/
-#define FCC_PSMR_HBC ((uint)0x80000000) /* Enable heartbeat */
-#define FCC_PSMR_FC ((uint)0x40000000) /* Force Collision */
-#define FCC_PSMR_SBT ((uint)0x20000000) /* Stop backoff timer */
-#define FCC_PSMR_LPB ((uint)0x10000000) /* Local protect. 1 = FDX */
-#define FCC_PSMR_LCW ((uint)0x08000000) /* Late collision select */
-#define FCC_PSMR_FDE ((uint)0x04000000) /* Full Duplex Enable */
-#define FCC_PSMR_MON ((uint)0x02000000) /* RMON Enable */
-#define FCC_PSMR_PRO ((uint)0x00400000) /* Promiscuous Enable */
-#define FCC_PSMR_FCE ((uint)0x00200000) /* Flow Control Enable */
-#define FCC_PSMR_RSH ((uint)0x00100000) /* Receive Short Frames */
-#define FCC_PSMR_CAM ((uint)0x00000400) /* CAM enable */
-#define FCC_PSMR_BRO ((uint)0x00000200) /* Broadcast pkt discard */
-#define FCC_PSMR_ENCRC ((uint)0x00000080) /* Use 32-bit CRC */
-
-/* IIC parameter RAM.
-*/
-typedef struct iic {
- ushort iic_rbase; /* Rx Buffer descriptor base address */
- ushort iic_tbase; /* Tx Buffer descriptor base address */
- u_char iic_rfcr; /* Rx function code */
- u_char iic_tfcr; /* Tx function code */
- ushort iic_mrblr; /* Max receive buffer length */
- uint iic_rstate; /* Internal */
- uint iic_rdp; /* Internal */
- ushort iic_rbptr; /* Internal */
- ushort iic_rbc; /* Internal */
- uint iic_rxtmp; /* Internal */
- uint iic_tstate; /* Internal */
- uint iic_tdp; /* Internal */
- ushort iic_tbptr; /* Internal */
- ushort iic_tbc; /* Internal */
- uint iic_txtmp; /* Internal */
-} iic_t;
-
-#define BD_IIC_START ((ushort)0x0400)
-
-#endif /* __CPM_82XX__ */
-#endif /* __KERNEL__ */
+++ /dev/null
-#ifndef _ASM_PPC_CPUMASK_H
-#define _ASM_PPC_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_PPC_CPUMASK_H */
+++ /dev/null
-/*
- * MPC8260 Internal Memory Map
- * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
- *
- * The Internal Memory Map of the 8260. I don't know how generic
- * this will be, as I don't have any knowledge of the subsequent
- * parts at this time. I copied this from the 8xx_immap.h.
- */
-#ifdef __KERNEL__
-#ifndef __IMMAP_82XX__
-#define __IMMAP_82XX__
-
-/* System configuration registers.
-*/
-typedef struct sys_conf {
- uint sc_siumcr;
- uint sc_sypcr;
- char res1[6];
- ushort sc_swsr;
- char res2[20];
- uint sc_bcr;
- u_char sc_ppc_acr;
- char res3[3];
- uint sc_ppc_alrh;
- uint sc_ppc_alrl;
- u_char sc_lcl_acr;
- char res4[3];
- uint sc_lcl_alrh;
- uint sc_lcl_alrl;
- uint sc_tescr1;
- uint sc_tescr2;
- uint sc_ltescr1;
- uint sc_ltescr2;
- uint sc_pdtea;
- u_char sc_pdtem;
- char res5[3];
- uint sc_ldtea;
- u_char sc_ldtem;
- char res6[163];
-} sysconf8260_t;
-
-
-/* Memory controller registers.
-*/
-typedef struct mem_ctlr {
- uint memc_br0;
- uint memc_or0;
- uint memc_br1;
- uint memc_or1;
- uint memc_br2;
- uint memc_or2;
- uint memc_br3;
- uint memc_or3;
- uint memc_br4;
- uint memc_or4;
- uint memc_br5;
- uint memc_or5;
- uint memc_br6;
- uint memc_or6;
- uint memc_br7;
- uint memc_or7;
- uint memc_br8;
- uint memc_or8;
- uint memc_br9;
- uint memc_or9;
- uint memc_br10;
- uint memc_or10;
- uint memc_br11;
- uint memc_or11;
- char res1[8];
- uint memc_mar;
- char res2[4];
- uint memc_mamr;
- uint memc_mbmr;
- uint memc_mcmr;
- char res3[8];
- ushort memc_mptpr;
- char res4[2];
- uint memc_mdr;
- char res5[4];
- uint memc_psdmr;
- uint memc_lsdmr;
- u_char memc_purt;
- char res6[3];
- u_char memc_psrt;
- char res7[3];
- u_char memc_lurt;
- char res8[3];
- u_char memc_lsrt;
- char res9[3];
- uint memc_immr;
- char res10[84];
-} memctl8260_t;
-
-/* System Integration Timers.
-*/
-typedef struct sys_int_timers {
- char res1[32];
- ushort sit_tmcntsc;
- char res2[2];
- uint sit_tmcnt;
- char res3[4];
- uint sit_tmcntal;
- char res4[16];
- ushort sit_piscr;
- char res5[2];
- uint sit_pitc;
- uint sit_pitr;
- char res6[94];
- char res7[2390];
-} sit8260_t;
-
-#define PISCR_PIRQ_MASK ((ushort)0xff00)
-#define PISCR_PS ((ushort)0x0080)
-#define PISCR_PIE ((ushort)0x0004)
-#define PISCR_PTF ((ushort)0x0002)
-#define PISCR_PTE ((ushort)0x0001)
-
-/* Interrupt Controller.
-*/
-typedef struct interrupt_controller {
- ushort ic_sicr;
- char res1[2];
- uint ic_sivec;
- uint ic_sipnrh;
- uint ic_sipnrl;
- uint ic_siprr;
- uint ic_scprrh;
- uint ic_scprrl;
- uint ic_simrh;
- uint ic_simrl;
- uint ic_siexr;
- char res2[88];
-} intctl8260_t;
-
-/* Clocks and Reset.
-*/
-typedef struct clk_and_reset {
- uint car_sccr;
- char res1[4];
- uint car_scmr;
- char res2[4];
- uint car_rsr;
- uint car_rmr;
- char res[104];
-} car8260_t;
-
-/* Input/Output Port control/status registers.
- * Names consistent with processor manual, although they are different
- * from the original 8xx names.......
- */
-typedef struct io_port {
- uint iop_pdira;
- uint iop_ppara;
- uint iop_psora;
- uint iop_podra;
- uint iop_pdata;
- char res1[12];
- uint iop_pdirb;
- uint iop_pparb;
- uint iop_psorb;
- uint iop_podrb;
- uint iop_pdatb;
- char res2[12];
- uint iop_pdirc;
- uint iop_pparc;
- uint iop_psorc;
- uint iop_podrc;
- uint iop_pdatc;
- char res3[12];
- uint iop_pdird;
- uint iop_ppard;
- uint iop_psord;
- uint iop_podrd;
- uint iop_pdatd;
- char res4[12];
-} iop8260_t;
-
-/* Communication Processor Module Timers
-*/
-typedef struct cpm_timers {
- u_char cpmt_tgcr1;
- char res1[3];
- u_char cpmt_tgcr2;
- char res2[11];
- ushort cpmt_tmr1;
- ushort cpmt_tmr2;
- ushort cpmt_trr1;
- ushort cpmt_trr2;
- ushort cpmt_tcr1;
- ushort cpmt_tcr2;
- ushort cpmt_tcn1;
- ushort cpmt_tcn2;
- ushort cpmt_tmr3;
- ushort cpmt_tmr4;
- ushort cpmt_trr3;
- ushort cpmt_trr4;
- ushort cpmt_tcr3;
- ushort cpmt_tcr4;
- ushort cpmt_tcn3;
- ushort cpmt_tcn4;
- ushort cpmt_ter1;
- ushort cpmt_ter2;
- ushort cpmt_ter3;
- ushort cpmt_ter4;
- char res3[584];
-} cpmtimer8260_t;
-
-/* DMA control/status registers.
-*/
-typedef struct sdma_csr {
- char res0[24];
- u_char sdma_sdsr;
- char res1[3];
- u_char sdma_sdmr;
- char res2[3];
- u_char sdma_idsr1;
- char res3[3];
- u_char sdma_idmr1;
- char res4[3];
- u_char sdma_idsr2;
- char res5[3];
- u_char sdma_idmr2;
- char res6[3];
- u_char sdma_idsr3;
- char res7[3];
- u_char sdma_idmr3;
- char res8[3];
- u_char sdma_idsr4;
- char res9[3];
- u_char sdma_idmr4;
- char res10[707];
-} sdma8260_t;
-
-/* Fast controllers
-*/
-typedef struct fcc {
- uint fcc_gfmr;
- uint fcc_fpsmr;
- ushort fcc_ftodr;
- char res1[2];
- ushort fcc_fdsr;
- char res2[2];
- ushort fcc_fcce;
- char res3[2];
- ushort fcc_fccm;
- char res4[2];
- u_char fcc_fccs;
- char res5[3];
- u_char fcc_ftirr_phy[4];
-} fcc_t;
-
-/* I2C
-*/
-typedef struct i2c {
- u_char i2c_i2mod;
- char res1[3];
- u_char i2c_i2add;
- char res2[3];
- u_char i2c_i2brg;
- char res3[3];
- u_char i2c_i2com;
- char res4[3];
- u_char i2c_i2cer;
- char res5[3];
- u_char i2c_i2cmr;
- char res6[331];
-} i2c8260_t;
-
-typedef struct scc { /* Serial communication channels */
- uint scc_gsmrl;
- uint scc_gsmrh;
- ushort scc_pmsr;
- char res1[2];
- ushort scc_todr;
- ushort scc_dsr;
- ushort scc_scce;
- char res2[2];
- ushort scc_sccm;
- char res3;
- u_char scc_sccs;
- char res4[8];
-} scc_t;
-
-typedef struct smc { /* Serial management channels */
- char res1[2];
- ushort smc_smcmr;
- char res2[2];
- u_char smc_smce;
- char res3[3];
- u_char smc_smcm;
- char res4[5];
-} smc_t;
-
-/* Serial Peripheral Interface.
-*/
-typedef struct spi {
- ushort spi_spmode;
- char res1[4];
- u_char spi_spie;
- char res2[3];
- u_char spi_spim;
- char res3[2];
- u_char spi_spcom;
- char res4[82];
-} spi_t;
-
-/* CPM Mux.
-*/
-typedef struct cpmux {
- u_char cmx_si1cr;
- char res1;
- u_char cmx_si2cr;
- char res2;
- uint cmx_fcr;
- uint cmx_scr;
- u_char cmx_smr;
- char res3;
- ushort cmx_uar;
- char res4[16];
-} cpmux_t;
-
-/* SIRAM control
-*/
-typedef struct siram {
- ushort si_amr;
- ushort si_bmr;
- ushort si_cmr;
- ushort si_dmr;
- u_char si_gmr;
- char res1;
- u_char si_cmdr;
- char res2;
- u_char si_str;
- char res3;
- ushort si_rsr;
-} siramctl_t;
-
-typedef struct mcc {
- ushort mcc_mcce;
- char res1[2];
- ushort mcc_mccm;
- char res2[2];
- u_char mcc_mccf;
- char res3[7];
-} mcc_t;
-
-typedef struct comm_proc {
- uint cp_cpcr;
- uint cp_rccr;
- char res1[14];
- ushort cp_rter;
- char res2[2];
- ushort cp_rtmr;
- ushort cp_rtscr;
- char res3[2];
- uint cp_rtsr;
- char res4[12];
-} cpm8260_t;
-
-/* ...and the whole thing wrapped up....
-*/
-typedef struct immap {
- /* Some references are into the unique and known dpram spaces,
- * others are from the generic base.
- */
-#define im_dprambase im_dpram1
- u_char im_dpram1[16*1024];
- char res1[16*1024];
- u_char im_dpram2[4*1024];
- char res2[8*1024];
- u_char im_dpram3[4*1024];
- char res3[16*1024];
-
- sysconf8260_t im_siu_conf; /* SIU Configuration */
- memctl8260_t im_memctl; /* Memory Controller */
- sit8260_t im_sit; /* System Integration Timers */
- intctl8260_t im_intctl; /* Interrupt Controller */
- car8260_t im_clkrst; /* Clocks and reset */
- iop8260_t im_ioport; /* IO Port control/status */
- cpmtimer8260_t im_cpmtimer; /* CPM timers */
- sdma8260_t im_sdma; /* SDMA control/status */
-
- fcc_t im_fcc[3]; /* Three FCCs */
-
- char res4[159];
-
- /* First set of baud rate generators.
- */
- char res4a[496];
- uint im_brgc5;
- uint im_brgc6;
- uint im_brgc7;
- uint im_brgc8;
-
- char res5[608];
-
- i2c8260_t im_i2c; /* I2C control/status */
- cpm8260_t im_cpm; /* Communication processor */
-
- /* Second set of baud rate generators.
- */
- uint im_brgc1;
- uint im_brgc2;
- uint im_brgc3;
- uint im_brgc4;
-
- scc_t im_scc[4]; /* Four SCCs */
- smc_t im_smc[2]; /* Couple of SMCs */
- spi_t im_spi; /* A SPI */
- cpmux_t im_cpmux; /* CPM clock route mux */
- siramctl_t im_siramctl1; /* First SI RAM Control */
- mcc_t im_mcc1; /* First MCC */
- siramctl_t im_siramctl2; /* Second SI RAM Control */
- mcc_t im_mcc2; /* Second MCC */
-
- char res6[1184];
-
- ushort im_si1txram[256];
- char res7[512];
- ushort im_si1rxram[256];
- char res8[512];
- ushort im_si2txram[256];
- char res9[512];
- ushort im_si2rxram[256];
- char res10[512];
- char res11[4096];
-} immap_t;
-
-extern immap_t *immr;
-
-#endif /* __IMMAP_82XX__ */
-#endif /* __KERNEL__ */
+++ /dev/null
-/*
- * Author: Pete Popov <ppopov@mvista.com>
- *
- * 2000 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Data structures specific to the IBM PowerPC 405 on-chip DMA controller
- * and API.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASMPPC_405_DMA_H
-#define __ASMPPC_405_DMA_H
-
-#include <linux/types.h>
-
-/* #define DEBUG_405DMA */
-
-#define TRUE 1
-#define FALSE 0
-
-#define SGL_LIST_SIZE 4096
-/* #define PCI_ALLOC_IS_NONCONSISTENT */
-
-#define MAX_405GP_DMA_CHANNELS 4
-
-/* The maximum address that we can perform a DMA transfer to on this platform */
-/* Doesn't really apply... */
-#define MAX_DMA_ADDRESS 0xFFFFFFFF
-
-extern unsigned long ISA_DMA_THRESHOLD;
-
-#define dma_outb outb
-#define dma_inb inb
-
-
-/*
- * Function return status codes
- * These values are used to indicate whether or not the function
- * call was successful, or a bad/invalid parameter was passed.
- */
-#define DMA_STATUS_GOOD 0
-#define DMA_STATUS_BAD_CHANNEL 1
-#define DMA_STATUS_BAD_HANDLE 2
-#define DMA_STATUS_BAD_MODE 3
-#define DMA_STATUS_NULL_POINTER 4
-#define DMA_STATUS_OUT_OF_MEMORY 5
-#define DMA_STATUS_SGL_LIST_EMPTY 6
-#define DMA_STATUS_GENERAL_ERROR 7
-
-
-/*
- * These indicate status as returned from the DMA Status Register.
- */
-#define DMA_STATUS_NO_ERROR 0
-#define DMA_STATUS_CS 1 /* Count Status */
-#define DMA_STATUS_TS 2 /* Transfer Status */
-#define DMA_STATUS_DMA_ERROR 3 /* DMA Error Occurred */
-#define DMA_STATUS_DMA_BUSY 4 /* The channel is busy */
-
-
-/*
- * Transfer Modes
- * These modes are defined in a way that makes it possible to
- * simply "or" in the value in the control register.
- */
-#define DMA_MODE_READ DMA_TD /* Peripheral to Memory */
-#define DMA_MODE_WRITE 0 /* Memory to Peripheral */
-#define DMA_MODE_MM (SET_DMA_TM(TM_S_MM)) /* memory to memory */
-
- /* Device-paced memory to memory, */
- /* device is at source address */
-#define DMA_MODE_MM_DEVATSRC (DMA_TD | SET_DMA_TM(TM_D_MM))
-
- /* Device-paced memory to memory, */
- /* device is at destination address */
-#define DMA_MODE_MM_DEVATDST (SET_DMA_TM(TM_D_MM))
-
-
-/*
- * DMA Polarity Configuration Register
- */
-#define DMAReq0_ActiveLow (1<<31)
-#define DMAAck0_ActiveLow (1<<30)
-#define EOT0_ActiveLow (1<<29) /* End of Transfer */
-
-#define DMAReq1_ActiveLow (1<<28)
-#define DMAAck1_ActiveLow (1<<27)
-#define EOT1_ActiveLow (1<<26)
-
-#define DMAReq2_ActiveLow (1<<25)
-#define DMAAck2_ActiveLow (1<<24)
-#define EOT2_ActiveLow (1<<23)
-
-#define DMAReq3_ActiveLow (1<<22)
-#define DMAAck3_ActiveLow (1<<21)
-#define EOT3_ActiveLow (1<<20)
-
-/*
- * DMA Sleep Mode Register
- */
-#define SLEEP_MODE_ENABLE (1<<21)
-
-
-/*
- * DMA Status Register
- */
-#define DMA_CS0 (1<<31) /* Terminal Count has been reached */
-#define DMA_CS1 (1<<30)
-#define DMA_CS2 (1<<29)
-#define DMA_CS3 (1<<28)
-
-#define DMA_TS0 (1<<27) /* End of Transfer has been requested */
-#define DMA_TS1 (1<<26)
-#define DMA_TS2 (1<<25)
-#define DMA_TS3 (1<<24)
-
-#define DMA_CH0_ERR (1<<23) /* DMA Chanel 0 Error */
-#define DMA_CH1_ERR (1<<22)
-#define DMA_CH2_ERR (1<<21)
-#define DMA_CH3_ERR (1<<20)
-
-#define DMA_IN_DMA_REQ0 (1<<19) /* Internal DMA Request is pending */
-#define DMA_IN_DMA_REQ1 (1<<18)
-#define DMA_IN_DMA_REQ2 (1<<17)
-#define DMA_IN_DMA_REQ3 (1<<16)
-
-#define DMA_EXT_DMA_REQ0 (1<<15) /* External DMA Request is pending */
-#define DMA_EXT_DMA_REQ1 (1<<14)
-#define DMA_EXT_DMA_REQ2 (1<<13)
-#define DMA_EXT_DMA_REQ3 (1<<12)
-
-#define DMA_CH0_BUSY (1<<11) /* DMA Channel 0 Busy */
-#define DMA_CH1_BUSY (1<<10)
-#define DMA_CH2_BUSY (1<<9)
-#define DMA_CH3_BUSY (1<<8)
-
-#define DMA_SG0 (1<<7) /* DMA Channel 0 Scatter/Gather in progress */
-#define DMA_SG1 (1<<6)
-#define DMA_SG2 (1<<5)
-#define DMA_SG3 (1<<4)
-
-
-
-/*
- * DMA Channel Control Registers
- */
-#define DMA_CH_ENABLE (1<<31) /* DMA Channel Enable */
-#define SET_DMA_CH_ENABLE(x) (((x)&0x1)<<31)
-#define GET_DMA_CH_ENABLE(x) (((x)&DMA_CH_ENABLE)>>31)
-
-#define DMA_CIE_ENABLE (1<<30) /* DMA Channel Interrupt Enable */
-#define SET_DMA_CIE_ENABLE(x) (((x)&0x1)<<30)
-#define GET_DMA_CIE_ENABLE(x) (((x)&DMA_CIE_ENABLE)>>30)
-
-#define DMA_TD (1<<29)
-#define SET_DMA_TD(x) (((x)&0x1)<<29)
-#define GET_DMA_TD(x) (((x)&DMA_TD)>>29)
-
-#define DMA_PL (1<<28) /* Peripheral Location */
-#define SET_DMA_PL(x) (((x)&0x1)<<28)
-#define GET_DMA_PL(x) (((x)&DMA_PL)>>28)
-
-#define EXTERNAL_PERIPHERAL 0
-#define INTERNAL_PERIPHERAL 1
-
-
-#define SET_DMA_PW(x) (((x)&0x3)<<26) /* Peripheral Width */
-#define DMA_PW_MASK SET_DMA_PW(3)
-#define PW_8 0
-#define PW_16 1
-#define PW_32 2
-#define PW_64 3
-#define GET_DMA_PW(x) (((x)&DMA_PW_MASK)>>26)
-
-#define DMA_DAI (1<<25) /* Destination Address Increment */
-#define SET_DMA_DAI(x) (((x)&0x1)<<25)
-
-#define DMA_SAI (1<<24) /* Source Address Increment */
-#define SET_DMA_SAI(x) (((x)&0x1)<<24)
-
-#define DMA_BEN (1<<23) /* Buffer Enable */
-#define SET_DMA_BEN(x) (((x)&0x1)<<23)
-
-#define SET_DMA_TM(x) (((x)&0x3)<<21) /* Transfer Mode */
-#define DMA_TM_MASK SET_DMA_TM(3)
-#define TM_PERIPHERAL 0 /* Peripheral */
-#define TM_RESERVED 1 /* Reserved */
-#define TM_S_MM 2 /* Memory to Memory */
-#define TM_D_MM 3 /* Device Paced Memory to Memory */
-#define GET_DMA_TM(x) (((x)&DMA_TM_MASK)>>21)
-
-#define SET_DMA_PSC(x) (((x)&0x3)<<19) /* Peripheral Setup Cycles */
-#define DMA_PSC_MASK SET_DMA_PSC(3)
-#define GET_DMA_PSC(x) (((x)&DMA_PSC_MASK)>>19)
-
-#define SET_DMA_PWC(x) (((x)&0x3F)<<13) /* Peripheral Wait Cycles */
-#define DMA_PWC_MASK SET_DMA_PWC(0x3F)
-#define GET_DMA_PWC(x) (((x)&DMA_PWC_MASK)>>13)
-
-#define SET_DMA_PHC(x) (((x)&0x7)<<10) /* Peripheral Hold Cycles */
-#define DMA_PHC_MASK SET_DMA_PHC(0x7)
-#define GET_DMA_PHC(x) (((x)&DMA_PHC_MASK)>>10)
-
-#define DMA_ETD_OUTPUT (1<<9) /* EOT pin is a TC output */
-#define SET_DMA_ETD(x) (((x)&0x1)<<9)
-
-#define DMA_TCE_ENABLE (1<<8)
-#define SET_DMA_TCE(x) (((x)&0x1)<<8)
-
-#define SET_DMA_PRIORITY(x) (((x)&0x3)<<6) /* DMA Channel Priority */
-#define DMA_PRIORITY_MASK SET_DMA_PRIORITY(3)
-#define PRIORITY_LOW 0
-#define PRIORITY_MID_LOW 1
-#define PRIORITY_MID_HIGH 2
-#define PRIORITY_HIGH 3
-#define GET_DMA_PRIORITY(x) (((x)&DMA_PRIORITY_MASK)>>6)
-
-#define SET_DMA_PREFETCH(x) (((x)&0x3)<<4) /* Memory Read Prefetch */
-#define DMA_PREFETCH_MASK SET_DMA_PREFETCH(3)
-#define PREFETCH_1 0 /* Prefetch 1 Double Word */
-#define PREFETCH_2 1
-#define PREFETCH_4 2
-#define GET_DMA_PREFETCH(x) (((x)&DMA_PREFETCH_MASK)>>4)
-
-#define DMA_PCE (1<<3) /* Parity Check Enable */
-#define SET_DMA_PCE(x) (((x)&0x1)<<3)
-#define GET_DMA_PCE(x) (((x)&DMA_PCE)>>3)
-
-#define DMA_DEC (1<<2) /* Address Decrement */
-#define SET_DMA_DEC(x) (((x)&0x1)<<2)
-#define GET_DMA_DEC(x) (((x)&DMA_DEC)>>2)
-
-/*
- * DMA SG Command Register
- */
-#define SSG0_ENABLE (1<<31) /* Start Scatter Gather */
-#define SSG1_ENABLE (1<<30)
-#define SSG2_ENABLE (1<<29)
-#define SSG3_ENABLE (1<<28)
-#define SSG0_MASK_ENABLE (1<<15) /* Enable writing to SSG0 bit */
-#define SSG1_MASK_ENABLE (1<<14)
-#define SSG2_MASK_ENABLE (1<<13)
-#define SSG3_MASK_ENABLE (1<<12)
-
-
-/*
- * DMA Scatter/Gather Descriptor Bit fields
- */
-#define SG_LINK (1<<31) /* Link */
-#define SG_TCI_ENABLE (1<<29) /* Enable Terminal Count Interrupt */
-#define SG_ETI_ENABLE (1<<28) /* Enable End of Transfer Interrupt */
-#define SG_ERI_ENABLE (1<<27) /* Enable Error Interrupt */
-#define SG_COUNT_MASK 0xFFFF /* Count Field */
-
-
-
-
-typedef uint32_t sgl_handle_t;
-
-typedef struct {
-
- /*
- * Valid polarity settings:
- * DMAReq0_ActiveLow
- * DMAAck0_ActiveLow
- * EOT0_ActiveLow
- *
- * DMAReq1_ActiveLow
- * DMAAck1_ActiveLow
- * EOT1_ActiveLow
- *
- * DMAReq2_ActiveLow
- * DMAAck2_ActiveLow
- * EOT2_ActiveLow
- *
- * DMAReq3_ActiveLow
- * DMAAck3_ActiveLow
- * EOT3_ActiveLow
- */
- unsigned int polarity;
-
- char buffer_enable; /* Boolean: buffer enable */
- char tce_enable; /* Boolean: terminal count enable */
- char etd_output; /* Boolean: eot pin is a tc output */
- char pce; /* Boolean: parity check enable */
-
- /*
- * Peripheral location:
- * INTERNAL_PERIPHERAL (UART0 on the 405GP)
- * EXTERNAL_PERIPHERAL
- */
- char pl; /* internal/external peripheral */
-
- /*
- * Valid pwidth settings:
- * PW_8
- * PW_16
- * PW_32
- * PW_64
- */
- unsigned int pwidth;
-
- char dai; /* Boolean: dst address increment */
- char sai; /* Boolean: src address increment */
-
- /*
- * Valid psc settings: 0-3
- */
- unsigned int psc; /* Peripheral Setup Cycles */
-
- /*
- * Valid pwc settings:
- * 0-63
- */
- unsigned int pwc; /* Peripheral Wait Cycles */
-
- /*
- * Valid phc settings:
- * 0-7
- */
- unsigned int phc; /* Peripheral Hold Cycles */
-
- /*
- * Valid cp (channel priority) settings:
- * PRIORITY_LOW
- * PRIORITY_MID_LOW
- * PRIORITY_MID_HIGH
- * PRIORITY_HIGH
- */
- unsigned int cp; /* channel priority */
-
- /*
- * Valid pf (memory read prefetch) settings:
- *
- * PREFETCH_1
- * PREFETCH_2
- * PREFETCH_4
- */
- unsigned int pf; /* memory read prefetch */
-
- /*
- * Boolean: channel interrupt enable
- * NOTE: for sgl transfers, only the last descriptor will be setup to
- * interrupt.
- */
- char int_enable;
-
- char shift; /* easy access to byte_count shift, based on */
- /* the width of the channel */
-
- uint32_t control; /* channel control word */
-
-
- /* These variabled are used ONLY in single dma transfers */
- unsigned int mode; /* transfer mode */
- dma_addr_t addr;
-
-} ppc_dma_ch_t;
-
-
-typedef struct {
- uint32_t control;
- uint32_t src_addr;
- uint32_t dst_addr;
- uint32_t control_count;
- uint32_t next;
-} ppc_sgl_t;
-
-
-
-typedef struct {
- unsigned int dmanr;
- uint32_t control; /* channel ctrl word; loaded from each descrptr */
- uint32_t sgl_control; /* LK, TCI, ETI, and ERI bits in sgl descriptor */
- dma_addr_t dma_addr; /* dma (physical) address of this list */
- ppc_sgl_t *phead;
- ppc_sgl_t *ptail;
-
-} sgl_list_info_t;
-
-
-typedef struct {
- unsigned int *src_addr;
- unsigned int *dst_addr;
- dma_addr_t dma_src_addr;
- dma_addr_t dma_dst_addr;
-} pci_alloc_desc_t;
-
-
-extern ppc_dma_ch_t dma_channels[];
-
-/*
- *
- * DMA API inline functions
- * These functions are implemented here as inline functions for
- * performance reasons.
- *
- */
-
-static __inline__ int get_405gp_dma_status(void)
-{
- return (mfdcr(DCRN_DMASR));
-}
-
-
-static __inline__ int enable_405gp_dma(unsigned int dmanr)
-{
- unsigned int control;
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
-#ifdef DEBUG_405DMA
- if (dmanr >= MAX_405GP_DMA_CHANNELS) {
- printk("enable_dma: bad channel: %d\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-#endif
-
-
- switch (dmanr) {
- case 0:
- if (p_dma_ch->mode == DMA_MODE_READ) {
- /* peripheral to memory */
- mtdcr(DCRN_DMASA0, NULL);
- mtdcr(DCRN_DMADA0, p_dma_ch->addr);
- }
- else if (p_dma_ch->mode == DMA_MODE_WRITE) {
- /* memory to peripheral */
- mtdcr(DCRN_DMASA0, p_dma_ch->addr);
- mtdcr(DCRN_DMADA0, NULL);
- }
- /* for other xfer modes, the addresses are already set */
- control = mfdcr(DCRN_DMACR0);
- control &= ~(DMA_TM_MASK | DMA_TD); /* clear all mode bits */
- control |= (p_dma_ch->mode | DMA_CH_ENABLE);
- mtdcr(DCRN_DMACR0, control);
- break;
- case 1:
- if (p_dma_ch->mode == DMA_MODE_READ) {
- mtdcr(DCRN_DMASA1, NULL);
- mtdcr(DCRN_DMADA1, p_dma_ch->addr);
- } else if (p_dma_ch->mode == DMA_MODE_WRITE) {
- mtdcr(DCRN_DMASA1, p_dma_ch->addr);
- mtdcr(DCRN_DMADA1, NULL);
- }
- control = mfdcr(DCRN_DMACR1);
- control &= ~(DMA_TM_MASK | DMA_TD);
- control |= (p_dma_ch->mode | DMA_CH_ENABLE);
- mtdcr(DCRN_DMACR1, control);
- break;
- case 2:
- if (p_dma_ch->mode == DMA_MODE_READ) {
- mtdcr(DCRN_DMASA2, NULL);
- mtdcr(DCRN_DMADA2, p_dma_ch->addr);
- } else if (p_dma_ch->mode == DMA_MODE_WRITE) {
- mtdcr(DCRN_DMASA2, p_dma_ch->addr);
- mtdcr(DCRN_DMADA2, NULL);
- }
- control = mfdcr(DCRN_DMACR2);
- control &= ~(DMA_TM_MASK | DMA_TD);
- control |= (p_dma_ch->mode | DMA_CH_ENABLE);
- mtdcr(DCRN_DMACR2, control);
- break;
- case 3:
- if (p_dma_ch->mode == DMA_MODE_READ) {
- mtdcr(DCRN_DMASA3, NULL);
- mtdcr(DCRN_DMADA3, p_dma_ch->addr);
- } else if (p_dma_ch->mode == DMA_MODE_WRITE) {
- mtdcr(DCRN_DMASA3, p_dma_ch->addr);
- mtdcr(DCRN_DMADA3, NULL);
- }
- control = mfdcr(DCRN_DMACR3);
- control &= ~(DMA_TM_MASK | DMA_TD);
- control |= (p_dma_ch->mode | DMA_CH_ENABLE);
- mtdcr(DCRN_DMACR3, control);
- break;
- default:
- return DMA_STATUS_BAD_CHANNEL;
- }
- return DMA_STATUS_GOOD;
-}
-
-
-
-static __inline__ void disable_405gp_dma(unsigned int dmanr)
-{
- unsigned int control;
-
- switch (dmanr) {
- case 0:
- control = mfdcr(DCRN_DMACR0);
- control &= ~DMA_CH_ENABLE;
- mtdcr(DCRN_DMACR0, control);
- break;
- case 1:
- control = mfdcr(DCRN_DMACR1);
- control &= ~DMA_CH_ENABLE;
- mtdcr(DCRN_DMACR1, control);
- break;
- case 2:
- control = mfdcr(DCRN_DMACR2);
- control &= ~DMA_CH_ENABLE;
- mtdcr(DCRN_DMACR2, control);
- break;
- case 3:
- control = mfdcr(DCRN_DMACR3);
- control &= ~DMA_CH_ENABLE;
- mtdcr(DCRN_DMACR3, control);
- break;
- default:
-#ifdef DEBUG_405DMA
- printk("disable_dma: bad channel: %d\n", dmanr);
-#endif
- }
-}
-
-
-
-/*
- * Sets the dma mode for single DMA transfers only.
- * For scatter/gather transfers, the mode is passed to the
- * alloc_dma_handle() function as one of the parameters.
- *
- * The mode is simply saved and used later. This allows
- * the driver to call set_dma_mode() and set_dma_addr() in
- * any order.
- *
- * Valid mode values are:
- *
- * DMA_MODE_READ peripheral to memory
- * DMA_MODE_WRITE memory to peripheral
- * DMA_MODE_MM memory to memory
- * DMA_MODE_MM_DEVATSRC device-paced memory to memory, device at src
- * DMA_MODE_MM_DEVATDST device-paced memory to memory, device at dst
- */
-static __inline__ int set_405gp_dma_mode(unsigned int dmanr, unsigned int mode)
-{
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
-#ifdef DEBUG_405DMA
- switch (mode) {
- case DMA_MODE_READ:
- case DMA_MODE_WRITE:
- case DMA_MODE_MM:
- case DMA_MODE_MM_DEVATSRC:
- case DMA_MODE_MM_DEVATDST:
- break;
- default:
- printk("set_dma_mode: bad mode 0x%x\n", mode);
- return DMA_STATUS_BAD_MODE;
- }
- if (dmanr >= MAX_405GP_DMA_CHANNELS) {
- printk("set_dma_mode: bad channel 0x%x\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-#endif
-
- p_dma_ch->mode = mode;
- return DMA_STATUS_GOOD;
-}
-
-
-
-/*
- * Sets the DMA Count register. Note that 'count' is in bytes.
- * However, the DMA Count register counts the number of "transfers",
- * where each transfer is equal to the bus width. Thus, count
- * MUST be a multiple of the bus width.
- */
-static __inline__ void
-set_405gp_dma_count(unsigned int dmanr, unsigned int count)
-{
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
-#ifdef DEBUG_405DMA
- {
- int error = 0;
- switch(p_dma_ch->pwidth) {
- case PW_8:
- break;
- case PW_16:
- if (count & 0x1)
- error = 1;
- break;
- case PW_32:
- if (count & 0x3)
- error = 1;
- break;
- case PW_64:
- if (count & 0x7)
- error = 1;
- break;
- default:
- printk("set_dma_count: invalid bus width: 0x%x\n",
- p_dma_ch->pwidth);
- return;
- }
- if (error)
- printk("Warning: set_dma_count count 0x%x bus width %d\n",
- count, p_dma_ch->pwidth);
- }
-#endif
-
- count = count >> p_dma_ch->shift;
- switch (dmanr) {
- case 0:
- mtdcr(DCRN_DMACT0, count);
- break;
- case 1:
- mtdcr(DCRN_DMACT1, count);
- break;
- case 2:
- mtdcr(DCRN_DMACT2, count);
- break;
- case 3:
- mtdcr(DCRN_DMACT3, count);
- break;
- default:
-#ifdef DEBUG_405DMA
- printk("set_dma_count: bad channel: %d\n", dmanr);
-#endif
- }
-}
-
-
-
-/*
- * Returns the number of bytes left to be transfered.
- * After a DMA transfer, this should return zero.
- * Reading this while a DMA transfer is still in progress will return
- * unpredictable results.
- */
-static __inline__ int get_405gp_dma_residue(unsigned int dmanr)
-{
- unsigned int count;
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
- switch (dmanr) {
- case 0:
- count = mfdcr(DCRN_DMACT0);
- break;
- case 1:
- count = mfdcr(DCRN_DMACT1);
- break;
- case 2:
- count = mfdcr(DCRN_DMACT2);
- break;
- case 3:
- count = mfdcr(DCRN_DMACT3);
- break;
- default:
-#ifdef DEBUG_405DMA
- printk("get_dma_residue: bad channel: %d\n", dmanr);
-#endif
- return 0;
- }
-
- return (count << p_dma_ch->shift);
-}
-
-
-
-/*
- * Sets the DMA address for a memory to peripheral or peripheral
- * to memory transfer. The address is just saved in the channel
- * structure for now and used later in enable_dma().
- */
-static __inline__ void set_405gp_dma_addr(unsigned int dmanr, dma_addr_t addr)
-{
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-#ifdef DEBUG_405DMA
- {
- int error = 0;
- switch(p_dma_ch->pwidth) {
- case PW_8:
- break;
- case PW_16:
- if ((unsigned)addr & 0x1)
- error = 1;
- break;
- case PW_32:
- if ((unsigned)addr & 0x3)
- error = 1;
- break;
- case PW_64:
- if ((unsigned)addr & 0x7)
- error = 1;
- break;
- default:
- printk("set_dma_addr: invalid bus width: 0x%x\n",
- p_dma_ch->pwidth);
- return;
- }
- if (error)
- printk("Warning: set_dma_addr addr 0x%x bus width %d\n",
- addr, p_dma_ch->pwidth);
- }
-#endif
-
- /* save dma address and program it later after we know the xfer mode */
- p_dma_ch->addr = addr;
-}
-
-
-
-
-/*
- * Sets both DMA addresses for a memory to memory transfer.
- * For memory to peripheral or peripheral to memory transfers
- * the function set_dma_addr() should be used instead.
- */
-static __inline__ void
-set_405gp_dma_addr2(unsigned int dmanr, dma_addr_t src_dma_addr,
- dma_addr_t dst_dma_addr)
-{
-#ifdef DEBUG_405DMA
- {
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
- int error = 0;
- switch(p_dma_ch->pwidth) {
- case PW_8:
- break;
- case PW_16:
- if (((unsigned)src_dma_addr & 0x1) ||
- ((unsigned)dst_dma_addr & 0x1)
- )
- error = 1;
- break;
- case PW_32:
- if (((unsigned)src_dma_addr & 0x3) ||
- ((unsigned)dst_dma_addr & 0x3)
- )
- error = 1;
- break;
- case PW_64:
- if (((unsigned)src_dma_addr & 0x7) ||
- ((unsigned)dst_dma_addr & 0x7)
- )
- error = 1;
- break;
- default:
- printk("set_dma_addr2: invalid bus width: 0x%x\n",
- p_dma_ch->pwidth);
- return;
- }
- if (error)
- printk("Warning: set_dma_addr2 src 0x%x dst 0x%x bus width %d\n",
- src_dma_addr, dst_dma_addr, p_dma_ch->pwidth);
- }
-#endif
-
- switch (dmanr) {
- case 0:
- mtdcr(DCRN_DMASA0, src_dma_addr);
- mtdcr(DCRN_DMADA0, dst_dma_addr);
- break;
- case 1:
- mtdcr(DCRN_DMASA1, src_dma_addr);
- mtdcr(DCRN_DMADA1, dst_dma_addr);
- break;
- case 2:
- mtdcr(DCRN_DMASA2, src_dma_addr);
- mtdcr(DCRN_DMADA2, dst_dma_addr);
- break;
- case 3:
- mtdcr(DCRN_DMASA3, src_dma_addr);
- mtdcr(DCRN_DMADA3, dst_dma_addr);
- break;
- default:
-#ifdef DEBUG_405DMA
- printk("set_dma_addr2: bad channel: %d\n", dmanr);
-#endif
- }
-}
-
-
-
-/*
- * Enables the channel interrupt.
- *
- * If performing a scatter/gatter transfer, this function
- * MUST be called before calling alloc_dma_handle() and building
- * the sgl list. Otherwise, interrupts will not be enabled, if
- * they were previously disabled.
- */
-static __inline__ int
-enable_405gp_dma_interrupt(unsigned int dmanr)
-{
- unsigned int control;
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
- p_dma_ch->int_enable = TRUE;
- switch (dmanr) {
- case 0:
- control = mfdcr(DCRN_DMACR0);
- control|= DMA_CIE_ENABLE; /* Channel Interrupt Enable */
- mtdcr(DCRN_DMACR0, control);
- break;
- case 1:
- control = mfdcr(DCRN_DMACR1);
- control|= DMA_CIE_ENABLE;
- mtdcr(DCRN_DMACR1, control);
- break;
- case 2:
- control = mfdcr(DCRN_DMACR2);
- control|= DMA_CIE_ENABLE;
- mtdcr(DCRN_DMACR2, control);
- break;
- case 3:
- control = mfdcr(DCRN_DMACR3);
- control|= DMA_CIE_ENABLE;
- mtdcr(DCRN_DMACR3, control);
- break;
- default:
-#ifdef DEBUG_405DMA
- printk("enable_dma_interrupt: bad channel: %d\n", dmanr);
-#endif
- return DMA_STATUS_BAD_CHANNEL;
- }
- return DMA_STATUS_GOOD;
-}
-
-
-
-/*
- * Disables the channel interrupt.
- *
- * If performing a scatter/gatter transfer, this function
- * MUST be called before calling alloc_dma_handle() and building
- * the sgl list. Otherwise, interrupts will not be disabled, if
- * they were previously enabled.
- */
-static __inline__ int
-disable_405gp_dma_interrupt(unsigned int dmanr)
-{
- unsigned int control;
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
- p_dma_ch->int_enable = TRUE;
- switch (dmanr) {
- case 0:
- control = mfdcr(DCRN_DMACR0);
- control &= ~DMA_CIE_ENABLE; /* Channel Interrupt Enable */
- mtdcr(DCRN_DMACR0, control);
- break;
- case 1:
- control = mfdcr(DCRN_DMACR1);
- control &= ~DMA_CIE_ENABLE;
- mtdcr(DCRN_DMACR1, control);
- break;
- case 2:
- control = mfdcr(DCRN_DMACR2);
- control &= ~DMA_CIE_ENABLE;
- mtdcr(DCRN_DMACR2, control);
- break;
- case 3:
- control = mfdcr(DCRN_DMACR3);
- control &= ~DMA_CIE_ENABLE;
- mtdcr(DCRN_DMACR3, control);
- break;
- default:
-#ifdef DEBUG_405DMA
- printk("enable_dma_interrupt: bad channel: %d\n", dmanr);
-#endif
- return DMA_STATUS_BAD_CHANNEL;
- }
- return DMA_STATUS_GOOD;
-}
-
-
-#ifdef DCRNCAP_DMA_SG
-
-/*
- * Add a new sgl descriptor to the end of a scatter/gather list
- * which was created by alloc_dma_handle().
- *
- * For a memory to memory transfer, both dma addresses must be
- * valid. For a peripheral to memory transfer, one of the addresses
- * must be set to NULL, depending on the direction of the transfer:
- * memory to peripheral: set dst_addr to NULL,
- * peripheral to memory: set src_addr to NULL.
- */
-static __inline__ int
-add_405gp_dma_sgl(sgl_handle_t handle, dma_addr_t src_addr, dma_addr_t dst_addr,
- unsigned int count)
-{
- sgl_list_info_t *psgl = (sgl_list_info_t *)handle;
- ppc_dma_ch_t *p_dma_ch;
-
- if (!handle) {
-#ifdef DEBUG_405DMA
- printk("add_dma_sgl: null handle\n");
-#endif
- return DMA_STATUS_BAD_HANDLE;
- }
-
-#ifdef DEBUG_405DMA
- if (psgl->dmanr >= MAX_405GP_DMA_CHANNELS) {
- printk("add_dma_sgl error: psgl->dmanr == %d\n", psgl->dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-#endif
-
- p_dma_ch = &dma_channels[psgl->dmanr];
-
-#ifdef DEBUG_405DMA
- {
- int error = 0;
- unsigned int aligned = (unsigned)src_addr | (unsigned)dst_addr | count;
- switch(p_dma_ch->pwidth) {
- case PW_8:
- break;
- case PW_16:
- if (aligned & 0x1)
- error = 1;
- break;
- case PW_32:
- if (aligned & 0x3)
- error = 1;
- break;
- case PW_64:
- if (aligned & 0x7)
- error = 1;
- break;
- default:
- printk("add_dma_sgl: invalid bus width: 0x%x\n",
- p_dma_ch->pwidth);
- return DMA_STATUS_GENERAL_ERROR;
- }
- if (error)
- printk("Alignment warning: add_dma_sgl src 0x%x dst 0x%x count 0x%x bus width var %d\n",
- src_addr, dst_addr, count, p_dma_ch->pwidth);
-
- }
-#endif
-
- if ((unsigned)(psgl->ptail + 1) >= ((unsigned)psgl + SGL_LIST_SIZE)) {
-#ifdef DEBUG_405DMA
- printk("sgl handle out of memory \n");
-#endif
- return DMA_STATUS_OUT_OF_MEMORY;
- }
-
-
- if (!psgl->ptail) {
- psgl->phead = (ppc_sgl_t *)
- ((unsigned)psgl + sizeof(sgl_list_info_t));
- psgl->ptail = psgl->phead;
- } else {
- psgl->ptail->next = virt_to_bus(psgl->ptail + 1);
- psgl->ptail++;
- }
-
- psgl->ptail->control = psgl->control;
- psgl->ptail->src_addr = src_addr;
- psgl->ptail->dst_addr = dst_addr;
- psgl->ptail->control_count = (count >> p_dma_ch->shift) |
- psgl->sgl_control;
- psgl->ptail->next = (uint32_t)NULL;
-
- return DMA_STATUS_GOOD;
-}
-
-
-
-/*
- * Enable (start) the DMA described by the sgl handle.
- */
-static __inline__ void enable_405gp_dma_sgl(sgl_handle_t handle)
-{
- sgl_list_info_t *psgl = (sgl_list_info_t *)handle;
- ppc_dma_ch_t *p_dma_ch;
- uint32_t sg_command;
-
-#ifdef DEBUG_405DMA
- if (!handle) {
- printk("enable_dma_sgl: null handle\n");
- return;
- } else if (psgl->dmanr > (MAX_405GP_DMA_CHANNELS - 1)) {
- printk("enable_dma_sgl: bad channel in handle %d\n",
- psgl->dmanr);
- return;
- } else if (!psgl->phead) {
- printk("enable_dma_sgl: sg list empty\n");
- return;
- }
-#endif
-
- p_dma_ch = &dma_channels[psgl->dmanr];
- psgl->ptail->control_count &= ~SG_LINK; /* make this the last dscrptr */
- sg_command = mfdcr(DCRN_ASGC);
-
- switch(psgl->dmanr) {
- case 0:
- mtdcr(DCRN_ASG0, virt_to_bus(psgl->phead));
- sg_command |= SSG0_ENABLE;
- break;
- case 1:
- mtdcr(DCRN_ASG1, virt_to_bus(psgl->phead));
- sg_command |= SSG1_ENABLE;
- break;
- case 2:
- mtdcr(DCRN_ASG2, virt_to_bus(psgl->phead));
- sg_command |= SSG2_ENABLE;
- break;
- case 3:
- mtdcr(DCRN_ASG3, virt_to_bus(psgl->phead));
- sg_command |= SSG3_ENABLE;
- break;
- default:
-#ifdef DEBUG_405DMA
- printk("enable_dma_sgl: bad channel: %d\n", psgl->dmanr);
-#endif
- }
-
-#if 0 /* debug */
- printk("\n\nenable_dma_sgl at dma_addr 0x%x\n",
- virt_to_bus(psgl->phead));
- {
- ppc_sgl_t *pnext, *sgl_addr;
-
- pnext = psgl->phead;
- while (pnext) {
- printk("dma descriptor at 0x%x, dma addr 0x%x\n",
- (unsigned)pnext, (unsigned)virt_to_bus(pnext));
- printk("control 0x%x src 0x%x dst 0x%x c_count 0x%x, next 0x%x\n",
- (unsigned)pnext->control, (unsigned)pnext->src_addr,
- (unsigned)pnext->dst_addr,
- (unsigned)pnext->control_count, (unsigned)pnext->next);
-
- (unsigned)pnext = bus_to_virt(pnext->next);
- }
- printk("sg_command 0x%x\n", sg_command);
- }
-#endif
-
-#ifdef PCI_ALLOC_IS_NONCONSISTENT
- /*
- * This is temporary only, until pci_alloc_consistent() really does
- * return "consistent" memory.
- */
- flush_dcache_range((unsigned)handle, (unsigned)handle + SGL_LIST_SIZE);
-#endif
-
- mtdcr(DCRN_ASGC, sg_command); /* start transfer */
-}
-
-
-
-/*
- * Halt an active scatter/gather DMA operation.
- */
-static __inline__ void disable_405gp_dma_sgl(sgl_handle_t handle)
-{
- sgl_list_info_t *psgl = (sgl_list_info_t *)handle;
- uint32_t sg_command;
-
-#ifdef DEBUG_405DMA
- if (!handle) {
- printk("enable_dma_sgl: null handle\n");
- return;
- } else if (psgl->dmanr > (MAX_405GP_DMA_CHANNELS - 1)) {
- printk("enable_dma_sgl: bad channel in handle %d\n",
- psgl->dmanr);
- return;
- }
-#endif
- sg_command = mfdcr(DCRN_ASGC);
- switch(psgl->dmanr) {
- case 0:
- sg_command &= ~SSG0_ENABLE;
- break;
- case 1:
- sg_command &= ~SSG1_ENABLE;
- break;
- case 2:
- sg_command &= ~SSG2_ENABLE;
- break;
- case 3:
- sg_command &= ~SSG3_ENABLE;
- break;
- default:
-#ifdef DEBUG_405DMA
- printk("enable_dma_sgl: bad channel: %d\n", psgl->dmanr);
-#endif
- }
-
- mtdcr(DCRN_ASGC, sg_command); /* stop transfer */
-}
-
-
-
-/*
- * Returns number of bytes left to be transferred from the entire sgl list.
- * *src_addr and *dst_addr get set to the source/destination address of
- * the sgl descriptor where the DMA stopped.
- *
- * An sgl transfer must NOT be active when this function is called.
- */
-static __inline__ int
-get_405gp_dma_sgl_residue(sgl_handle_t handle, dma_addr_t *src_addr,
- dma_addr_t *dst_addr)
-{
- sgl_list_info_t *psgl = (sgl_list_info_t *)handle;
- ppc_dma_ch_t *p_dma_ch;
- ppc_sgl_t *pnext, *sgl_addr;
- uint32_t count_left;
-
-#ifdef DEBUG_405DMA
- if (!handle) {
- printk("get_dma_sgl_residue: null handle\n");
- return DMA_STATUS_BAD_HANDLE;
- } else if (psgl->dmanr > (MAX_405GP_DMA_CHANNELS - 1)) {
- printk("get_dma_sgl_residue: bad channel in handle %d\n",
- psgl->dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-#endif
-
- switch(psgl->dmanr) {
- case 0:
- sgl_addr = (ppc_sgl_t *)bus_to_virt(mfdcr(DCRN_ASG0));
- count_left = mfdcr(DCRN_DMACT0);
- break;
- case 1:
- sgl_addr = (ppc_sgl_t *)bus_to_virt(mfdcr(DCRN_ASG1));
- count_left = mfdcr(DCRN_DMACT1);
- break;
- case 2:
- sgl_addr = (ppc_sgl_t *)bus_to_virt(mfdcr(DCRN_ASG2));
- count_left = mfdcr(DCRN_DMACT2);
- break;
- case 3:
- sgl_addr = (ppc_sgl_t *)bus_to_virt(mfdcr(DCRN_ASG3));
- count_left = mfdcr(DCRN_DMACT3);
- break;
- default:
-#ifdef DEBUG_405DMA
- printk("get_dma_sgl_residue: bad channel: %d\n", psgl->dmanr);
-#endif
- goto error;
- }
-
- if (!sgl_addr) {
-#ifdef DEBUG_405DMA
- printk("get_dma_sgl_residue: sgl addr register is null\n");
-#endif
- goto error;
- }
-
- pnext = psgl->phead;
- while (pnext &&
- ((unsigned)pnext < ((unsigned)psgl + SGL_LIST_SIZE) &&
- (pnext != sgl_addr))
- ) {
- pnext = pnext++;
- }
-
- if (pnext == sgl_addr) { /* found the sgl descriptor */
-
- *src_addr = pnext->src_addr;
- *dst_addr = pnext->dst_addr;
-
- /*
- * Now search the remaining descriptors and add their count.
- * We already have the remaining count from this descriptor in
- * count_left.
- */
- pnext++;
-
- while ((pnext != psgl->ptail) &&
- ((unsigned)pnext < ((unsigned)psgl + SGL_LIST_SIZE))
- ) {
- count_left += pnext->control_count & SG_COUNT_MASK;
- }
-
- if (pnext != psgl->ptail) { /* should never happen */
-#ifdef DEBUG_405DMA
- printk("get_dma_sgl_residue error (1) psgl->ptail 0x%x handle 0x%x\n",
- (unsigned int)psgl->ptail,
- (unsigned int)handle);
-#endif
- goto error;
- }
-
- /* success */
- p_dma_ch = &dma_channels[psgl->dmanr];
- return (count_left << p_dma_ch->shift); /* count in bytes */
-
- } else {
- /* this shouldn't happen */
-#ifdef DEBUG_405DMA
- printk("get_dma_sgl_residue, unable to match current address 0x%x, handle 0x%x\n",
- (unsigned int)sgl_addr, (unsigned int)handle);
-
-#endif
- }
-
-
-error:
- *src_addr = (dma_addr_t)NULL;
- *dst_addr = (dma_addr_t)NULL;
- return 0;
-}
-
-
-
-
-/*
- * Returns the address(es) of the buffer(s) contained in the head element of
- * the scatter/gather list. The element is removed from the scatter/gather
- * list and the next element becomes the head.
- *
- * This function should only be called when the DMA is not active.
- */
-static __inline__ int
-delete_405gp_dma_sgl_element(sgl_handle_t handle, dma_addr_t *src_dma_addr,
- dma_addr_t *dst_dma_addr)
-{
- sgl_list_info_t *psgl = (sgl_list_info_t *)handle;
-
-#ifdef DEBUG_405DMA
- if (!handle) {
- printk("delete_sgl_element: null handle\n");
- return DMA_STATUS_BAD_HANDLE;
- } else if (psgl->dmanr > (MAX_405GP_DMA_CHANNELS - 1)) {
- printk("delete_sgl_element: bad channel in handle %d\n",
- psgl->dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-#endif
-
- if (!psgl->phead) {
-#ifdef DEBUG_405DMA
- printk("delete_sgl_element: sgl list empty\n");
-#endif
- *src_dma_addr = (dma_addr_t)NULL;
- *dst_dma_addr = (dma_addr_t)NULL;
- return DMA_STATUS_SGL_LIST_EMPTY;
- }
-
- *src_dma_addr = (dma_addr_t)psgl->phead->src_addr;
- *dst_dma_addr = (dma_addr_t)psgl->phead->dst_addr;
-
- if (psgl->phead == psgl->ptail) {
- /* last descriptor on the list */
- psgl->phead = NULL;
- psgl->ptail = NULL;
- } else {
- psgl->phead++;
- }
-
- return DMA_STATUS_GOOD;
-}
-
-#endif /* DCRNCAP_DMA_SG */
-
-/*
- * The rest of the DMA API, in ppc405_dma.c
- */
-extern int hw_init_dma_channel(unsigned int, ppc_dma_ch_t *);
-extern int get_channel_config(unsigned int, ppc_dma_ch_t *);
-extern int set_channel_priority(unsigned int, unsigned int);
-extern unsigned int get_peripheral_width(unsigned int);
-extern int alloc_dma_handle(sgl_handle_t *, unsigned int, unsigned int);
-extern void free_dma_handle(sgl_handle_t);
-
-#endif
-#endif /* __KERNEL__ */
+++ /dev/null
-#ifndef _PPC_RMAP_H
-#define _PPC_RMAP_H
-
-/* PPC calls pte_alloc() before mem_map[] is setup ... */
-#define BROKEN_PPC_PTE_ALLOC_ONE
-
-#include <asm-generic/rmap.h>
-
-#endif
+++ /dev/null
-/*
- * This file describes the structure passed from the BootX application
- * (for MacOS) when it is used to boot Linux.
- *
- * Written by Benjamin Herrenschmidt.
- */
-
-
-#ifndef __ASM_BOOTX_H__
-#define __ASM_BOOTX_H__
-
-#ifdef macintosh
-#include <Types.h>
-#include "linux_type_defs.h"
-#endif
-
-#ifdef macintosh
-/* All this requires PowerPC alignment */
-#pragma options align=power
-#endif
-
-/* On kernel entry:
- *
- * r3 = 0x426f6f58 ('BooX')
- * r4 = pointer to boot_infos
- * r5 = NULL
- *
- * Data and instruction translation disabled, interrupts
- * disabled, kernel loaded at physical 0x00000000 on PCI
- * machines (will be different on NuBus).
- */
-
-#define BOOT_INFO_VERSION 5
-#define BOOT_INFO_COMPATIBLE_VERSION 1
-
-/* Bit in the architecture flag mask. More to be defined in
- future versions. Note that either BOOT_ARCH_PCI or
- BOOT_ARCH_NUBUS is set. The other BOOT_ARCH_NUBUS_xxx are
- set additionally when BOOT_ARCH_NUBUS is set.
- */
-#define BOOT_ARCH_PCI 0x00000001UL
-#define BOOT_ARCH_NUBUS 0x00000002UL
-#define BOOT_ARCH_NUBUS_PDM 0x00000010UL
-#define BOOT_ARCH_NUBUS_PERFORMA 0x00000020UL
-#define BOOT_ARCH_NUBUS_POWERBOOK 0x00000040UL
-
-/* Maximum number of ranges in phys memory map */
-#define MAX_MEM_MAP_SIZE 26
-
-/* This is the format of an element in the physical memory map. Note that
- the map is optional and current BootX will only build it for pre-PCI
- machines */
-typedef struct boot_info_map_entry
-{
- __u32 physAddr; /* Physical starting address */
- __u32 size; /* Size in bytes */
-} boot_info_map_entry_t;
-
-
-/* Here are the boot informations that are passed to the bootstrap
- * Note that the kernel arguments and the device tree are appended
- * at the end of this structure. */
-typedef struct boot_infos
-{
- /* Version of this structure */
- __u32 version;
- /* backward compatible down to version: */
- __u32 compatible_version;
-
- /* NEW (vers. 2) this holds the current _logical_ base addr of
- the frame buffer (for use by early boot message) */
- __u8* logicalDisplayBase;
-
- /* NEW (vers. 4) Apple's machine identification */
- __u32 machineID;
-
- /* NEW (vers. 4) Detected hw architecture */
- __u32 architecture;
-
- /* The device tree (internal addresses relative to the beginning of the tree,
- * device tree offset relative to the beginning of this structure).
- * On pre-PCI macintosh (BOOT_ARCH_PCI bit set to 0 in architecture), this
- * field is 0.
- */
- __u32 deviceTreeOffset; /* Device tree offset */
- __u32 deviceTreeSize; /* Size of the device tree */
-
- /* Some infos about the current MacOS display */
- __u32 dispDeviceRect[4]; /* left,top,right,bottom */
- __u32 dispDeviceDepth; /* (8, 16 or 32) */
- __u8* dispDeviceBase; /* base address (physical) */
- __u32 dispDeviceRowBytes; /* rowbytes (in bytes) */
- __u32 dispDeviceColorsOffset; /* Colormap (8 bits only) or 0 (*) */
- /* Optional offset in the registry to the current
- * MacOS display. (Can be 0 when not detected) */
- __u32 dispDeviceRegEntryOffset;
-
- /* Optional pointer to boot ramdisk (offset from this structure) */
- __u32 ramDisk;
- __u32 ramDiskSize; /* size of ramdisk image */
-
- /* Kernel command line arguments (offset from this structure) */
- __u32 kernelParamsOffset;
-
- /* ALL BELOW NEW (vers. 4) */
-
- /* This defines the physical memory. Valid with BOOT_ARCH_NUBUS flag
- (non-PCI) only. On PCI, memory is contiguous and it's size is in the
- device-tree. */
- boot_info_map_entry_t
- physMemoryMap[MAX_MEM_MAP_SIZE]; /* Where the phys memory is */
- __u32 physMemoryMapSize; /* How many entries in map */
-
-
- /* The framebuffer size (optional, currently 0) */
- __u32 frameBufferSize; /* Represents a max size, can be 0. */
-
- /* NEW (vers. 5) */
-
- /* Total params size (args + colormap + device tree + ramdisk) */
- __u32 totalParamsSize;
-
-} boot_infos_t;
-
-/* (*) The format of the colormap is 256 * 3 * 2 bytes. Each color index is represented
- * by 3 short words containing a 16 bits (unsigned) color component.
- * Later versions may contain the gamma table for direct-color devices here.
- */
-#define BOOTX_COLORTABLE_SIZE (256UL*3UL*2UL)
-
-#ifdef macintosh
-#pragma options align=reset
-#endif
-
-#endif
+++ /dev/null
-#ifndef _ASM_PPC64_CPUMASK_H
-#define _ASM_PPC64_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_PPC64_CPUMASK_H */
+++ /dev/null
-/*
- * ItLpPaca.h
- * Copyright (C) 2001 Mike Corrigan IBM Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef _ITLPPACA_H
-#define _ITLPPACA_H
-
-//=============================================================================
-//
-// This control block contains the data that is shared between the
-// hypervisor (PLIC) and the OS.
-//
-//
-//----------------------------------------------------------------------------
-#include <asm/types.h>
-
-struct ItLpPaca
-{
-//=============================================================================
-// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
-// NOTE: The xDynXyz fields are fields that will be dynamically changed by
-// PLIC when preparing to bring a processor online or when dispatching a
-// virtual processor!
-//=============================================================================
- u32 xDesc; // Eye catcher 0xD397D781 x00-x03
- u16 xSize; // Size of this struct x04-x05
- u16 xRsvd1_0; // Reserved x06-x07
- u16 xRsvd1_1:14; // Reserved x08-x09
- u8 xSharedProc:1; // Shared processor indicator ...
- u8 xSecondaryThread:1; // Secondary thread indicator ...
- volatile u8 xDynProcStatus:8; // Dynamic Status of this proc x0A-x0A
- u8 xSecondaryThreadCnt; // Secondary thread count x0B-x0B
- volatile u16 xDynHvPhysicalProcIndex;// Dynamic HV Physical Proc Index0C-x0D
- volatile u16 xDynHvLogicalProcIndex;// Dynamic HV Logical Proc Indexx0E-x0F
- u32 xDecrVal; // Value for Decr programming x10-x13
- u32 xPMCVal; // Value for PMC regs x14-x17
- volatile u32 xDynHwNodeId; // Dynamic Hardware Node id x18-x1B
- volatile u32 xDynHwProcId; // Dynamic Hardware Proc Id x1C-x1F
- volatile u32 xDynPIR; // Dynamic ProcIdReg value x20-x23
- u32 xDseiData; // DSEI data x24-x27
- u64 xSPRG3; // SPRG3 value x28-x2F
- u8 xRsvd1_3[80]; // Reserved x30-x7F
-
-//=============================================================================
-// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
-//=============================================================================
- // This Dword contains a byte for each type of interrupt that can occur.
- // The IPI is a count while the others are just a binary 1 or 0.
- union {
- u64 xAnyInt;
- struct {
- u16 xRsvd; // Reserved - cleared by #mpasmbl
- u8 xXirrInt; // Indicates xXirrValue is valid or Immed IO
- u8 xIpiCnt; // IPI Count
- u8 xDecrInt; // DECR interrupt occurred
- u8 xPdcInt; // PDC interrupt occurred
- u8 xQuantumInt; // Interrupt quantum reached
- u8 xOldPlicDeferredExtInt; // Old PLIC has a deferred XIRR pending
- } xFields;
- } xIntDword;
-
- // Whenever any fields in this Dword are set then PLIC will defer the
- // processing of external interrupts. Note that PLIC will store the
- // XIRR directly into the xXirrValue field so that another XIRR will
- // not be presented until this one clears. The layout of the low
- // 4-bytes of this Dword is upto SLIC - PLIC just checks whether the
- // entire Dword is zero or not. A non-zero value in the low order
- // 2-bytes will result in SLIC being granted the highest thread
- // priority upon return. A 0 will return to SLIC as medium priority.
- u64 xPlicDeferIntsArea; // Entire Dword
-
- // Used to pass the real SRR0/1 from PLIC to SLIC as well as to
- // pass the target SRR0/1 from SLIC to PLIC on a SetAsrAndRfid.
- u64 xSavedSrr0; // Saved SRR0 x10-x17
- u64 xSavedSrr1; // Saved SRR1 x18-x1F
-
- // Used to pass parms from the OS to PLIC for SetAsrAndRfid
- u64 xSavedGpr3; // Saved GPR3 x20-x27
- u64 xSavedGpr4; // Saved GPR4 x28-x2F
- u64 xSavedGpr5; // Saved GPR5 x30-x37
-
- u8 xRsvd2_1; // Reserved x38-x38
- u8 xCpuCtlsTaskAttributes; // Task attributes for cpuctls x39-x39
- u8 xFPRegsInUse; // FP regs in use x3A-x3A
- u8 xPMCRegsInUse; // PMC regs in use x3B-x3B
- volatile u32 xSavedDecr; // Saved Decr Value x3C-x3F
- volatile u64 xEmulatedTimeBase;// Emulated TB for this thread x40-x47
- volatile u64 xCurPLICLatency; // Unaccounted PLIC latency x48-x4F
- u64 xTotPLICLatency; // Accumulated PLIC latency x50-x57
- u64 xWaitStateCycles; // Wait cycles for this proc x58-x5F
- u64 xEndOfQuantum; // TB at end of quantum x60-x67
- u64 xPDCSavedSPRG1; // Saved SPRG1 for PMC int x68-x6F
- u64 xPDCSavedSRR0; // Saved SRR0 for PMC int x70-x77
- volatile u32 xVirtualDecr; // Virtual DECR for shared procsx78-x7B
- u16 xSLBCount; // # of SLBs to maintain x7C-x7D
- u8 xIdle; // Indicate OS is idle x7E
- u8 xRsvd2_2; // Reserved x7F
-
-
-//=============================================================================
-// CACHE_LINE_3 0x0100 - 0x007F: This line is shared with other processors
-//=============================================================================
- // This is the xYieldCount. An "odd" value (low bit on) means that
- // the processor is yielded (either because of an OS yield or a PLIC
- // preempt). An even value implies that the processor is currently
- // executing.
- // NOTE: This value will ALWAYS be zero for dedicated processors and
- // will NEVER be zero for shared processors (ie, initialized to a 1).
- volatile u32 xYieldCount; // PLIC increments each dispatchx00-x03
- u8 xRsvd3_0[124]; // Reserved x04-x7F
-
-//=============================================================================
-// CACHE_LINE_4-5 0x0100 - 0x01FF Contains PMC interrupt data
-//=============================================================================
- u8 xPmcSaveArea[256]; // PMC interrupt Area x00-xFF
-
-
-};
-
-#endif /* _ITLPPACA_H */
+++ /dev/null
-#ifndef _ISERIES_VPDINFO_H
-#define _ISERIES_VPDINFO_H
-/************************************************************************/
-/* File iSeries_VpdInfo.h created by Allan Trautman Feb 08 2001. */
-/************************************************************************/
-/* This code supports the location data fon on the IBM iSeries systems. */
-/* Copyright (C) 20yy <Allan H Trautman> <IBM Corp> */
-/* */
-/* This program is free software; you can redistribute it and/or modify */
-/* it under the terms of the GNU General Public License as published by */
-/* the Free Software Foundation; either version 2 of the License, or */
-/* (at your option) any later version. */
-/* */
-/* This program is distributed in the hope that it will be useful, */
-/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
-/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
-/* GNU General Public License for more details. */
-/* */
-/* You should have received a copy of the GNU General Public License */
-/* along with this program; if not, write to the: */
-/* Free Software Foundation, Inc., */
-/* 59 Temple Place, Suite 330, */
-/* Boston, MA 02111-1307 USA */
-/************************************************************************/
-/* Change Activity: */
-/* Created, Feg 8, 2001 */
-/* Reformated for Card, March 8, 2001 */
-/* End Change Activity */
-/************************************************************************/
-
-struct pci_dev; /* Forward Declare */
-/************************************************************************/
-/* Location Data extracted from the VPD list and device info. */
-/************************************************************************/
-struct LocationDataStruct { /* Location data structure for device */
- u16 Bus; /* iSeries Bus Number 0x00*/
- u16 Board; /* iSeries Board 0x02*/
- u8 FrameId; /* iSeries spcn Frame Id 0x04*/
- u8 PhbId; /* iSeries Phb Location 0x05*/
- u16 Card; /* iSeries Card Slot 0x06*/
- char CardLocation[4]; /* Char format of planar vpd 0x08*/
- u8 AgentId; /* iSeries AgentId 0x0C*/
- u8 SecondaryAgentId; /* iSeries Secondary Agent Id 0x0D*/
- u8 LinuxBus; /* Linux Bus Number 0x0E*/
- u8 LinuxDevFn; /* Linux Device Function 0x0F*/
-};
-typedef struct LocationDataStruct LocationData;
-#define LOCATION_DATA_SIZE 16
-
-/************************************************************************/
-/* Protypes */
-/************************************************************************/
-extern LocationData* iSeries_GetLocationData(struct pci_dev* PciDev);
-extern int iSeries_Device_Information(struct pci_dev*,char*, int);
-
-#endif /* _ISERIES_VPDINFO_H */
+++ /dev/null
-#error "<asm/init.h> should never be used - use <linux/init.h> instead"
+++ /dev/null
-#ifndef _PPC64_RMAP_H
-#define _PPC64_RMAP_H
-
-/* PPC64 calls pte_alloc() before mem_map[] is setup ... */
-#define BROKEN_PPC_PTE_ALLOC_ONE
-
-#include <asm-generic/rmap.h>
-
-#endif
+++ /dev/null
-#ifndef _ASM_S390_CPUMASK_H
-#define _ASM_S390_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_S390_CPUMASK_H */
+++ /dev/null
-/*
- * include/asm-s390/init.h
- *
- * S390 version
- */
-
-#error "<asm/init.h> should never be used - use <linux/init.h> instead"
+++ /dev/null
-#ifndef _S390_RMAP_H
-#define _S390_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#endif
+++ /dev/null
-#ifndef _ASM_SH_CPUMASK_H
-#define _ASM_SH_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_SH_CPUMASK_H */
+++ /dev/null
-#error "<asm/init.h> should never be used - use <linux/init.h> instead"
+++ /dev/null
-#ifndef _SH_RMAP_H
-#define _SH_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#endif
+++ /dev/null
-#ifndef __ASM_SH64_SMPLOCK_H
-#define __ASM_SH64_SMPLOCK_H
-
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * include/asm-sh64/smplock.h
- *
- * Copyright (C) 2000, 2001 Paolo Alberelli
- *
- */
-
-#include <linux/config.h>
-
-#ifndef CONFIG_SMP
-
-#define lock_kernel() do { } while(0)
-#define unlock_kernel() do { } while(0)
-#define release_kernel_lock(task, cpu, depth) ((depth) = 1)
-#define reacquire_kernel_lock(task, cpu, depth) do { } while(0)
-
-#else
-
-#error "We do not support SMP on SH64 yet"
-/*
- * Default SMP lock implementation
- */
-
-#include <linux/interrupt.h>
-#include <asm/spinlock.h>
-
-extern spinlock_t kernel_flag;
-
-/*
- * Getting the big kernel lock.
- *
- * This cannot happen asynchronously,
- * so we only need to worry about other
- * CPU's.
- */
-extern __inline__ void lock_kernel(void)
-{
- if (!++current->lock_depth)
- spin_lock(&kernel_flag);
-}
-
-extern __inline__ void unlock_kernel(void)
-{
- if (--current->lock_depth < 0)
- spin_unlock(&kernel_flag);
-}
-
-/*
- * Release global kernel lock and global interrupt lock
- */
-#define release_kernel_lock(task, cpu) \
-do { \
- if (task->lock_depth >= 0) \
- spin_unlock(&kernel_flag); \
- release_irqlock(cpu); \
- __sti(); \
-} while (0)
-
-/*
- * Re-acquire the kernel lock
- */
-#define reacquire_kernel_lock(task) \
-do { \
- if (task->lock_depth >= 0) \
- spin_lock(&kernel_flag); \
-} while (0)
-
-#endif /* CONFIG_SMP */
-
-#endif /* __ASM_SH64_SMPLOCK_H */
+++ /dev/null
-#ifndef __ASM_SH_SOFTIRQ_H
-#define __ASM_SH_SOFTIRQ_H
-
-#include <asm/atomic.h>
-#include <asm/hardirq.h>
-
-#define local_bh_disable() \
-do { \
- local_bh_count(smp_processor_id())++; \
- barrier(); \
-} while (0)
-
-#define __local_bh_enable() \
-do { \
- barrier(); \
- local_bh_count(smp_processor_id())--; \
-} while (0)
-
-#define local_bh_enable() \
-do { \
- barrier(); \
- if (!--local_bh_count(smp_processor_id()) \
- && softirq_pending(smp_processor_id())) { \
- do_softirq(); \
- } \
-} while (0)
-
-#define in_softirq() (local_bh_count(smp_processor_id()) != 0)
-
-#endif /* __ASM_SH_SOFTIRQ_H */
+++ /dev/null
-#ifndef _ASM_SPARC_CPUMASK_H
-#define _ASM_SPARC_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_SPARC_CPUMASK_H */
+++ /dev/null
-#error "<asm/init.h> should never be used - use <linux/init.h> instead"
+++ /dev/null
-#ifndef _SPARC_RMAP_H
-#define _SPARC_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#endif
+++ /dev/null
-#ifndef _ASM_SPARC64_CPUMASK_H
-#define _ASM_SPARC64_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_SPARC64_CPUMASK_H */
+++ /dev/null
-#error "<asm/init.h> should never be used - use <linux/init.h> instead"
+++ /dev/null
-#ifndef _SPARC64_RMAP_H
-#define _SPARC64_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#endif
+++ /dev/null
-#ifndef _ASM_UM_CPUMASK_H
-#define _ASM_UM_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_UM_CPUMASK_H */
+++ /dev/null
-#ifndef _UM_INIT_H
-#define _UM_INIT_H
-
-#ifdef notdef
-#define __init
-#define __initdata
-#define __initfunc(__arginit) __arginit
-#define __cacheline_aligned
-#endif
-
-#endif
+++ /dev/null
-#ifndef __UM_MODULE_H
-#define __UM_MODULE_H
-
-/* UML is simple */
-struct mod_arch_specific
-{
-};
-
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define Elf_Ehdr Elf32_Ehdr
-
-#endif
+++ /dev/null
-#ifndef __UM_RMAP_H
-#define __UM_RMAP_H
-
-#include "asm/arch/rmap.h"
-
-#endif
+++ /dev/null
-#ifndef __UM_SMPLOCK_H
-#define __UM_SMPLOCK_H
-
-#include "asm/arch/smplock.h"
-
-#endif
+++ /dev/null
-#ifndef _ASM_V850_CPUMASK_H
-#define _ASM_V850_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_V850_CPUMASK_H */
+++ /dev/null
-/* Do not need anything here */
+++ /dev/null
-#ifndef _ASM_X86_64_CPUMASK_H
-#define _ASM_X86_64_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_X86_64_CPUMASK_H */
+++ /dev/null
-#error "<asm/init.h> should never be used - use <linux/init.h> instead"
+++ /dev/null
-#ifndef _X8664_RMAP_H
-#define _X8664_RMAP_H
-
-/* nothing to see, move along */
-#include <asm-generic/rmap.h>
-
-#endif
+++ /dev/null
-#ifndef IEEE_802_11
-#define IEEE_802_11
-
-#include <linux/types.h>
-
-enum ieee_802_11_link_status_failure_reason {
- reserved0, Unspecified=1, Previous_not_valid,
- Sender_Quits_ESS_or_IBSS,
- Due_Inactivity, AP_Overload,
- Class_2_from_NonAuth,
- Class_3_from_NonAuth,
- Sender_Quits_BSS,
- Association_requester_not_authenticated,
- Reserved10
-};
-
-
-#define IEEE_802_11_LINK_STATUS_FAILURE_REASON_STRINGS \
-{ \
- {reserved0, 0xff," Reserved reason "},\
- {Unspecified, 0xff," Unspecified Reason "},\
- {Previous_not_valid, 0xff," Previous Authentication no longer valid "},\
- {Sender_Quits_ESS_or_IBSS,0xff," Deauthenticated because sending station is leaving (has left) IBSS or ESS "},\
- {Due_Inactivity, 0xff," Disassociated due to inactivity "},\
- {AP_Overload, 0xff," Disassociated because AP is unable to handle all currently associated stations "},\
- {Class_2_from_NonAuth, 0xff," Class 2 frame received from non-Authenticated station"},\
- {Class_3_from_NonAuth, 0xff," Class 3 frame received from nonÂAssociated station"},\
- {Sender_Quits_BSS, 0xff," Disassociated because sending station is leaving (has left) BSS"},\
- {Association_requester_not_authenticated,0xff," Station requesting (Re)Association is not Authenticated with responding station"},\
- {Reserved10, 0xff," Reserved"},\
- {0,0,NULL}\
-};
-
-
-
-struct ieee_802_11_header {
- u16 frame_control;// needs to be subtyped
- u16 duration;
- u8 mac1[6];
- u8 mac2[6];
- u8 mac3[6];
- u16 SeqCtl;
- u8 mac4[6];
- u16 gapLen;
- u8 gap[8];
-};
-
-
-struct ieee_802_3_header {
-
- u16 status;
- u16 payload_length;
- u8 dst_mac[6];
- u8 src_mac[6];
-
-};
-
-#define P80211_OUI_LEN 3
-
-struct ieee_802_11_snap_header {
-
- u8 dsap; /* always 0xAA */
- u8 ssap; /* always 0xAA */
- u8 ctrl; /* always 0x03 */
- u8 oui[P80211_OUI_LEN]; /* organizational universal id */
-
-} __attribute__ ((packed));
-
-#define P80211_LLC_OUI_LEN 3
-
-struct ieee_802_11_802_1H_header {
-
- u8 dsap;
- u8 ssap; /* always 0xAA */
- u8 ctrl; /* always 0x03 */
- u8 oui[P80211_OUI_LEN]; /* organizational universal id */
- u16 unknown1; /* packet type ID fields */
- u16 unknown2; /* here is something like length in some cases */
-} __attribute__ ((packed));
-
-struct ieee_802_11_802_2_header {
-
- u8 dsap;
- u8 ssap; /* always 0xAA */
- u8 ctrl; /* always 0x03 */
- u8 oui[P80211_OUI_LEN]; /* organizational universal id */
- u8 type; /* packet type ID field. i guess, */
-
-} __attribute__ ((packed));
-
-
-
-// following is incoplete and may be incorrect and need reorganization
-
-#define ieee_802_11_frame_type_Management 0x00
-#define ieee_802_11_frame_type_Control 0x01
-#define ieee_802_11_frame_type_Data 0x10
-#define ieee_802_11_frame_type_Reserved 0x11
-
-#define ieee_802_11_frame_subtype_Association_Req 0x0 // Association Request
-#define ieee_802_11_frame_subtype_Association_Resp 0x1 // Association Response
-#define ieee_802_11_frame_subtype_Reassociation_Req 0x2 // Reassociation Request
-#define ieee_802_11_frame_subtype_Reassociation_Resp 0x3 // Reassociation Response
-#define ieee_802_11_frame_subtype_Probe_Req 0x4 // Probe Request
-#define ieee_802_11_frame_subtype_Probe_Resp 0x5 // Probe Response
-#define ieee_802_11_frame_subtype_Beacon 0x8 // Beacon
-#define ieee_802_11_frame_subtype_ATIM 0x9 // ATIM
-#define ieee_802_11_frame_subtype_Disassociation 0xA // Disassociation
-#define ieee_802_11_frame_subtype_Authentication 0xB // Authentication
-#define ieee_802_11_frame_subtype_Deauthentication 0xC // Deauthentication
-#define ieee_802_11_frame_subtype_PS_Poll 0xA // PS-Poll
-#define ieee_802_11_frame_subtype_RTS 0xB // RTS
-#define ieee_802_11_frame_subtype_CTS 0xC // CTS
-#define ieee_802_11_frame_subtype_ACK 0xD // ACK
-#define ieee_802_11_frame_subtype_CFEnd 0xE // CF-End
-#define ieee_802_11_frame_subtype_CFEnd_CFAck 0xF // CF-End + CF-Ack
-#define ieee_802_11_frame_subtype_Data 0x0 // Data
-#define ieee_802_11_frame_subtype_Data_CFAck 0x1 // Data + CF-Ack
-#define ieee_802_11_frame_subtype_Data_CF_Poll 0x2 // Data + CF-Poll
-#define ieee_802_11_frame_subtype_Data_CF_AckCF_Poll 0x3 // Data + CF-Ack + CF-Poll
-#define ieee_802_11_frame_subtype_NullFunction 0x4 // Null Function (no data)
-#define ieee_802_11_frame_subtype_CF_Ack 0x5 // CF-Ack (no data)
-#define ieee_802_11_frame_subtype_CF_Poll 0x6 // CF-Poll (no data)
-#define ieee_802_11_frame_subtype_CF_AckCF_Poll 0x7 // CF-Ack + CF-Poll (no data)
-
-
-#define ieee_802_11_frame_subtype_strings {\
- { ieee_802_11_frame_subtype_Association_Req, 0xF,"f Association Request"},\
- { ieee_802_11_frame_subtype_Association_Resp, 0xF,"1 Association Response"},\
- { ieee_802_11_frame_subtype_Reassociation_Req, 0xF,"2 Reassociation Request"},\
- { ieee_802_11_frame_subtype_Reassociation_Resp, 0xF,"3 Reassociation Response"},\
- { ieee_802_11_frame_subtype_Probe_Req , 0xF,"4 Probe Request"},\
- { ieee_802_11_frame_subtype_Probe_Resp , 0xF,"5 Probe Response"},\
- { ieee_802_11_frame_subtype_Beacon , 0xF,"8 Beacon"},\
- { ieee_802_11_frame_subtype_ATIM , 0xF,"9 ATIM"},\
- { ieee_802_11_frame_subtype_Disassociation, 0xF,"A Disassociation"},\
- { ieee_802_11_frame_subtype_Authentication, 0xF,"B Authentication"},\
- { ieee_802_11_frame_subtype_Deauthentication, 0xF,"C Deauthentication"},\
- { ieee_802_11_frame_subtype_PS_Poll , 0xF,"A PS-Poll"},\
- { ieee_802_11_frame_subtype_RTS , 0xF,"B RTS"},\
- { ieee_802_11_frame_subtype_CTS , 0xF,"C CTS"},\
- { ieee_802_11_frame_subtype_ACK , 0xF,"D ACK"},\
- { ieee_802_11_frame_subtype_CFEnd , 0xF,"E CF-End"},\
- { ieee_802_11_frame_subtype_CFEnd_CFAck , 0xF,"F CF-End + CF-Ack"},\
- { ieee_802_11_frame_subtype_Data , 0xF,"0 Data"},\
- { ieee_802_11_frame_subtype_Data_CFAck , 0xF,"1 Data + CF-Ack"},\
- { ieee_802_11_frame_subtype_Data_CFPoll , 0xF,"2 Data + CF-Poll"},\
- { ieee_802_11_frame_subtype_Data_CFAck_CFPoll, 0xF,"3 Data + CF-Ack + CF-Poll"},\
- { ieee_802_11_frame_subtype_Null_Function , 0xF,"4 Null Function (no data)"},\
- { ieee_802_11_frame_subtype_CFAck , 0xF,"5 CF-Ack (no data)"},\
- { ieee_802_11_frame_subtype_CFPoll , 0xF,"6 CF-Poll (no data)"},\
- { ieee_802_11_frame_subtype_CFAck_CFPoll, 0xF,"y7 CF-Ack + CF-Poll (no data)"},\
- { 0,0,NULL}\
-}
-struct ieee_802_11_frame_subtype_class {
- u8 subtype;
- u8 mask;
- u8 class;
- u8 type;
-};
-#define ieee_802_11_frame_subtype_classes {\
- { ieee_802_11_frame_subtype_Association_Req, 0xF,2,ieee_802_11_frame_type_Management},\
- { ieee_802_11_frame_subtype_Association_Resp, 0xF,2,ieee_802_11_frame_type_Management},\
- { ieee_802_11_frame_subtype_Reassociation_Req, 0xF,2,ieee_802_11_frame_type_Management},\
- { ieee_802_11_frame_subtype_Reassociation_Resp, 0xF,2,ieee_802_11_frame_type_Management},\
- { ieee_802_11_frame_subtype_Probe_Req , 0xF,1,ieee_802_11_frame_type_Management},\
- { ieee_802_11_frame_subtype_Probe_Resp , 0xF,1,ieee_802_11_frame_type_Management},\
- { ieee_802_11_frame_subtype_Beacon , 0xF,1,ieee_802_11_frame_type_Management},\
- { ieee_802_11_frame_subtype_ATIM , 0xF,1,ieee_802_11_frame_type_Management},\
- { ieee_802_11_frame_subtype_Disassociation, 0xF,2,ieee_802_11_frame_type_Management},\
- { ieee_802_11_frame_subtype_Authentication, 0xF,1,ieee_802_11_frame_type_Management},\
- { ieee_802_11_frame_subtype_Deauthentication, 0xF,3,ieee_802_11_frame_type_Management},\
- { ieee_802_11_frame_subtype_PS-Poll , 0xF,3,ieee_802_11_frame_type_Control},\
- { ieee_802_11_frame_subtype_RTS , 0xF,1,ieee_802_11_frame_type_Control},\
- { ieee_802_11_frame_subtype_CTS , 0xF,1,ieee_802_11_frame_type_Control},\
- { ieee_802_11_frame_subtype_ACK , 0xF,1,ieee_802_11_frame_type_Control},\
- { ieee_802_11_frame_subtype_CFEnd , 0xF,1,ieee_802_11_frame_type_Control},\
- { ieee_802_11_frame_subtype_CFEnd_CFAck , 0xF,1,ieee_802_11_frame_type_Control},\
- { ieee_802_11_frame_subtype_Data , 0xF,3,ieee_802_11_frame_type_Data},\
- { ieee_802_11_frame_subtype_Data_CFAck , 0xF,3,ieee_802_11_frame_type_Data},\
- { ieee_802_11_frame_subtype_Data_CF_Poll 0xF,3,ieee_802_11_frame_type_Data},\
- { ieee_802_11_frame_subtype_Data_CF_AckCF_Poll, 0xF,3,ieee_802_11_frame_type_Data},\
- { ieee_802_11_frame_subtype_NullFunction 0xF,1,ieee_802_11_frame_type_Data},\
- { ieee_802_11_frame_subtype_CF_Ack , 0xF,1,ieee_802_11_frame_type_Data},\
- { ieee_802_11_frame_subtype_CF_Poll , 0xF,1,ieee_802_11_frame_type_Data},\
- { ieee_802_11_frame_subtype_CF_AckCF_Poll, 0xF,1,ieee_802_11_frame_type_Data},\
- { 0,0,NULL}\
-}
-
-
-#endif
+++ /dev/null
-/*
- * linux/include/linux/acpi_serial.h
- *
- * Copyright (C) 2000 Hewlett-Packard Co.
- * Copyright (C) 2000 Khalid Aziz <khalid_aziz@hp.com>
- *
- * Definitions for ACPI defined serial ports (headless console and
- * debug ports)
- *
- */
-
-#include <linux/serial.h>
-
-extern void setup_serial_acpi(void *);
-
-#define ACPI_SIG_LEN 4
-
-/* ACPI table signatures */
-#define ACPI_SPCRT_SIGNATURE "SPCR"
-#define ACPI_DBGPT_SIGNATURE "DBGP"
-
-/* Interface type as defined in ACPI serial port tables */
-#define ACPI_SERIAL_INTFC_16550 0
-#define ACPI_SERIAL_INTFC_16450 1
-
-/* Interrupt types for ACPI serial port tables */
-#define ACPI_SERIAL_INT_PCAT 0x01
-#define ACPI_SERIAL_INT_APIC 0x02
-#define ACPI_SERIAL_INT_SAPIC 0x04
-
-/* Baud rates as defined in ACPI serial port tables */
-#define ACPI_SERIAL_BAUD_9600 3
-#define ACPI_SERIAL_BAUD_19200 4
-#define ACPI_SERIAL_BAUD_57600 6
-#define ACPI_SERIAL_BAUD_115200 7
-
-/* Parity as defined in ACPI serial port tables */
-#define ACPI_SERIAL_PARITY_NONE 0
-
-/* Flow control methods as defined in ACPI serial port tables */
-#define ACPI_SERIAL_FLOW_DCD 0x01
-#define ACPI_SERIAL_FLOW_RTS 0x02
-#define ACPI_SERIAL_FLOW_XON 0x04
-
-/* Terminal types as defined in ACPI serial port tables */
-#define ACPI_SERIAL_TERM_VT100 0
-#define ACPI_SERIAL_TERM_VT100X 1
-
-/* PCI Flags as defined by SPCR table */
-#define ACPI_SERIAL_PCIFLAG_PNP 0x00000001
-
-/* Space ID as defined in base address structure in ACPI serial port tables */
-#define ACPI_SERIAL_MEM_SPACE 0
-#define ACPI_SERIAL_IO_SPACE 1
-#define ACPI_SERIAL_PCICONF_SPACE 2
-
-/*
- * Generic Register Address Structure - as defined by Microsoft
- * in http://www.microsoft.com/hwdev/onnow/download/LFreeACPI.doc
- *
-*/
-typedef struct {
- u8 space_id;
- u8 bit_width;
- u8 bit_offset;
- u8 resv;
- u32 addrl;
- u32 addrh;
-} gen_regaddr;
-
-/* Space ID for generic register address structure */
-#define REGADDR_SPACE_SYSMEM 0
-#define REGADDR_SPACE_SYSIO 1
-#define REGADDR_SPACE_PCICONFIG 2
-
-/* Serial Port Console Redirection and Debug Port Table formats */
-typedef struct {
- u8 signature[4];
- u32 length;
- u8 rev;
- u8 chksum;
- u8 oemid[6];
- u8 oem_tabid[8];
- u32 oem_rev;
- u8 creator_id[4];
- u32 creator_rev;
- u8 intfc_type;
- u8 resv1[3];
- gen_regaddr base_addr;
- u8 int_type;
- u8 irq;
- u8 global_int[4];
- u8 baud;
- u8 parity;
- u8 stop_bits;
- u8 flow_ctrl;
- u8 termtype;
- u8 language;
- u16 pci_dev_id;
- u16 pci_vendor_id;
- u8 pci_bus;
- u8 pci_dev;
- u8 pci_func;
- u8 pci_flags[4];
- u8 pci_seg;
- u32 resv2;
-} acpi_ser_t;
+++ /dev/null
-#ifndef _LINUX_ADB_MOUSE_H
-#define _LINUX_ADB_MOUSE_H
-
-/*
- * linux/include/linux/mac_mouse.h
- * header file for Macintosh ADB mouse driver
- * 27-10-97 Michael Schmitz
- * copied from:
- * header file for Atari Mouse driver
- * by Robert de Vries (robert@and.nl) on 19Jul93
- */
-
-struct mouse_status {
- char buttons;
- short dx;
- short dy;
- int ready;
- int active;
- struct wait_queue *wait;
- struct fasync_struct *fasyncptr;
-};
-
-#endif
+++ /dev/null
-#ifndef _AFFS_FS_I
-#define _AFFS_FS_I
-
-#include <linux/a.out.h>
-#include <linux/fs.h>
-#include <asm/semaphore.h>
-
-#define AFFS_CACHE_SIZE PAGE_SIZE
-//#define AFFS_CACHE_SIZE (4*4)
-
-#define AFFS_MAX_PREALLOC 32
-#define AFFS_LC_SIZE (AFFS_CACHE_SIZE/sizeof(u32)/2)
-#define AFFS_AC_SIZE (AFFS_CACHE_SIZE/sizeof(struct affs_ext_key)/2)
-#define AFFS_AC_MASK (AFFS_AC_SIZE-1)
-
-struct affs_ext_key {
- u32 ext; /* idx of the extended block */
- u32 key; /* block number */
-};
-
-/*
- * affs fs inode data in memory
- */
-struct affs_inode_info {
- u32 i_opencnt;
- struct semaphore i_link_lock; /* Protects internal inode access. */
- struct semaphore i_ext_lock; /* Protects internal inode access. */
-#define i_hash_lock i_ext_lock
- u32 i_blkcnt; /* block count */
- u32 i_extcnt; /* extended block count */
- u32 *i_lc; /* linear cache of extended blocks */
- u32 i_lc_size;
- u32 i_lc_shift;
- u32 i_lc_mask;
- struct affs_ext_key *i_ac; /* associative cache of extended blocks */
- u32 i_ext_last; /* last accessed extended block */
- struct buffer_head *i_ext_bh; /* bh of last extended block */
- loff_t mmu_private;
- u32 i_protect; /* unused attribute bits */
- u32 i_lastalloc; /* last allocated block */
- int i_pa_cnt; /* number of preallocated blocks */
-#if 0
- s32 i_original; /* if != 0, this is the key of the original */
- u32 i_data[AFFS_MAX_PREALLOC]; /* preallocated blocks */
- int i_cache_users; /* Cache cannot be freed while > 0 */
- unsigned char i_hlink; /* This is a fake */
- unsigned char i_pad;
- s32 i_parent; /* parent ino */
-#endif
- struct inode vfs_inode;
-};
-
-/* short cut to get to the affs specific inode data */
-static inline struct affs_inode_info *AFFS_I(struct inode *inode)
-{
- return list_entry(inode, struct affs_inode_info, vfs_inode);
-}
-
-#endif
+++ /dev/null
-#ifndef _AFFS_FS_SB
-#define _AFFS_FS_SB
-
-/*
- * super-block data in memory
- *
- * Block numbers are adjusted for their actual size
- *
- */
-
-struct affs_bm_info {
- u32 bm_key; /* Disk block number */
- u32 bm_free; /* Free blocks in here */
-};
-
-struct affs_sb_info {
- int s_partition_size; /* Partition size in blocks. */
- int s_reserved; /* Number of reserved blocks. */
- //u32 s_blksize; /* Initial device blksize */
- u32 s_data_blksize; /* size of the data block w/o header */
- u32 s_root_block; /* FFS root block number. */
- int s_hashsize; /* Size of hash table. */
- unsigned long s_flags; /* See below. */
- uid_t s_uid; /* uid to override */
- gid_t s_gid; /* gid to override */
- umode_t s_mode; /* mode to override */
- struct buffer_head *s_root_bh; /* Cached root block. */
- struct semaphore s_bmlock; /* Protects bitmap access. */
- struct affs_bm_info *s_bitmap; /* Bitmap infos. */
- u32 s_bmap_count; /* # of bitmap blocks. */
- u32 s_bmap_bits; /* # of bits in one bitmap blocks */
- u32 s_last_bmap;
- struct buffer_head *s_bmap_bh;
- char *s_prefix; /* Prefix for volumes and assigns. */
- int s_prefix_len; /* Length of prefix. */
- char s_volume[32]; /* Volume prefix for absolute symlinks. */
-};
-
-#define SF_INTL 0x0001 /* International filesystem. */
-#define SF_BM_VALID 0x0002 /* Bitmap is valid. */
-#define SF_IMMUTABLE 0x0004 /* Protection bits cannot be changed */
-#define SF_QUIET 0x0008 /* chmod errors will be not reported */
-#define SF_SETUID 0x0010 /* Ignore Amiga uid */
-#define SF_SETGID 0x0020 /* Ignore Amiga gid */
-#define SF_SETMODE 0x0040 /* Ignore Amiga protection bits */
-#define SF_MUFS 0x0100 /* Use MUFS uid/gid mapping */
-#define SF_OFS 0x0200 /* Old filesystem */
-#define SF_PREFIX 0x0400 /* Buffer for prefix is allocated */
-#define SF_VERBOSE 0x0800 /* Talk about fs when mounting */
-
-/* short cut to get to the affs specific sb data */
-static inline struct affs_sb_info *AFFS_SB(struct super_block *sb)
-{
- return sb->s_fs_info;
-}
-
-#endif
+++ /dev/null
-/**** vi:set ts=8 sts=8 sw=8:************************************************
- *
- * Copyright (C) 2002 Marcin Dalecki <martin@dalecki.de>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- */
-
-#include <linux/types.h>
-#include <asm/byteorder.h>
-
-/*
- * With each packet command, we allocate a buffer.
- * This is used for several packet
- * commands (Not for READ/WRITE commands).
- */
-#define IDEFLOPPY_PC_BUFFER_SIZE 256
-#define IDETAPE_PC_BUFFER_SIZE 256
-
-/*
- * Packet flags bits.
- */
-
-#define PC_ABORT 0 /* set when an error is considered normal - we won't retry */
-#define PC_WAIT_FOR_DSC 1 /* 1 when polling for DSC on a media access command */
-#define PC_DMA_RECOMMENDED 2 /* 1 when we prefer to use DMA if possible */
-#define PC_DMA_IN_PROGRESS 3 /* 1 while DMA in progress */
-#define PC_DMA_ERROR 4 /* 1 when encountered problem during DMA */
-#define PC_WRITING 5 /* data direction */
-#define PC_SUPPRESS_ERROR 6 /* suppress error reporting */
-#define PC_TRANSFORM 7 /* transform SCSI commands */
-
-/* This struct get's shared between different drivers.
- */
-struct atapi_packet_command {
- u8 c[12]; /* Actual packet bytes */
- char *buffer; /* Data buffer */
- int buffer_size; /* Size of our data buffer */
- char *current_position; /* Pointer into the above buffer */
- int request_transfer; /* Bytes to transfer */
- int actually_transferred; /* Bytes actually transferred */
-
- unsigned long flags; /* Status/Action bit flags: long for set_bit */
-
- /* FIXME: the following is ugly as hell, but the only way we can start
- * actually to unify the code.
- */
- /* driver specific data. */
- /* floppy/tape */
- int retries; /* On each retry, we increment retries */
- int error; /* Error code */
- char *b_data; /* Pointer which runs on the buffers */
- unsigned int b_count; /* Missing/Available data on the current buffer */
- u8 pc_buffer[IDEFLOPPY_PC_BUFFER_SIZE]; /* Temporary buffer */
- /* Called when this packet command is completed */
- void (*callback) (struct ata_device *, struct request *);
-
- /* only tape */
- struct bio *bio;
-
- /* only scsi */
- struct {
- unsigned int b_count; /* Bytes transferred from current entry */
- struct scatterlist *sg; /* Scatter gather table */
- struct scsi_cmnd *scsi_cmd; /* SCSI command */
- void (*done)(struct scsi_cmnd *); /* Scsi completion routine */
- unsigned long timeout; /* Command timeout */
- } s;
-};
-
-/*
- * ATAPI Status Register.
- */
-typedef union {
- u8 all : 8;
- struct {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
- u8 check : 1; /* Error occurred */
- u8 idx : 1; /* Reserved */
- u8 corr : 1; /* Correctable error occurred */
- u8 drq : 1; /* Data is request by the device */
- u8 dsc : 1; /* Media access command finished / Buffer availability */
- u8 reserved5 : 1; /* Reserved */
- u8 drdy : 1; /* Ignored for ATAPI commands (ready to accept ATA command) */
- u8 bsy : 1; /* The device has access to the command block */
-#elif defined(__BIG_ENDIAN_BITFIELD)
- u8 bsy : 1;
- u8 drdy : 1;
- u8 reserved5 : 1;
- u8 dsc : 1;
- u8 drq : 1;
- u8 corr : 1;
- u8 idx : 1;
- u8 check : 1;
-#else
-#error "Please fix <asm/byteorder.h>"
-#endif
- } b;
-} atapi_status_reg_t;
-
-/*
- * ATAPI error register.
- */
-typedef union {
- u8 all : 8;
- struct {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
- u8 ili : 1; /* Illegal Length Indication */
- u8 eom : 1; /* End Of Media Detected */
- u8 abrt : 1; /* Aborted command - As defined by ATA */
- u8 mcr : 1; /* Media Change Requested - As defined by ATA */
- u8 sense_key : 4; /* Sense key of the last failed packet command */
-#elif defined(__BIG_ENDIAN_BITFIELD)
- u8 sense_key : 4;
- u8 mcr : 1;
- u8 abrt : 1;
- u8 eom : 1;
- u8 ili : 1;
-#else
-#error "Please fix <asm/byteorder.h>"
-#endif
- } b;
-} atapi_error_reg_t;
-
-/* Currently unused, but please do not remove. --bkz */
-/*
- * ATAPI Feature Register.
- */
-typedef union {
- u8 all : 8;
- struct {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
- u8 dma : 1; /* Using DMA or PIO */
- u8 reserved321 : 3; /* Reserved */
- u8 reserved654 : 3; /* Reserved (Tag Type) */
- u8 reserved7 : 1; /* Reserved */
-#elif defined(__BIG_ENDIAN_BITFIELD)
- u8 reserved7 : 1;
- u8 reserved654 : 3;
- u8 reserved321 : 3;
- u8 dma : 1;
-#else
-#error "Please fix <asm/byteorder.h>"
-#endif
- } b;
-} atapi_feature_reg_t;
-
-/*
- * ATAPI Byte Count Register.
- */
-typedef union {
- u16 all : 16;
- struct {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
- u8 low; /* LSB */
- u8 high; /* MSB */
-#elif defined(__BIG_ENDIAN_BITFIELD)
- u8 high;
- u8 low;
-#else
-#error "Please fix <asm/byteorder.h>"
-#endif
- } b;
-} atapi_bcount_reg_t;
-
-/*
- * ATAPI Interrupt Reason Register.
- */
-typedef union {
- u8 all : 8;
- struct {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
- u8 cod : 1; /* Information transferred is command (1) or data (0) */
- u8 io : 1; /* The device requests us to read (1) or write (0) */
- u8 reserved : 6; /* Reserved */
-#elif defined(__BIG_ENDIAN_BITFIELD)
- u8 reserved : 6;
- u8 io : 1;
- u8 cod : 1;
-#else
-#error "Please fix <asm/byteorder.h>"
-#endif
- } b;
-} atapi_ireason_reg_t;
-
-/* Currently unused, but please do not remove. --bkz */
-/*
- * ATAPI Drive Select Register.
- */
-typedef union {
- u8 all :8;
- struct {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
- u8 sam_lun :3; /* Logical unit number */
- u8 reserved3 :1; /* Reserved */
- u8 drv :1; /* The responding drive will be drive 0 (0) or drive 1 (1) */
- u8 one5 :1; /* Should be set to 1 */
- u8 reserved6 :1; /* Reserved */
- u8 one7 :1; /* Should be set to 1 */
-#elif defined(__BIG_ENDIAN_BITFIELD)
- u8 one7 :1;
- u8 reserved6 :1;
- u8 one5 :1;
- u8 drv :1;
- u8 reserved3 :1;
- u8 sam_lun :3;
-#else
-#error "Please fix <asm/byteorder.h>"
-#endif
- } b;
-} atapi_drivesel_reg_t;
-
-/* Currently unused, but please do not remove. --bkz */
-/*
- * ATAPI Device Control Register.
- */
-typedef union {
- u8 all : 8;
- struct {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
- u8 zero0 : 1; /* Should be set to zero */
- u8 nien : 1; /* Device interrupt is disabled (1) or enabled (0) */
- u8 srst : 1; /* ATA software reset. ATAPI devices should use the new ATAPI srst. */
- u8 one3 : 1; /* Should be set to 1 */
- u8 reserved4567 : 4; /* Reserved */
-#elif defined(__BIG_ENDIAN_BITFIELD)
- u8 reserved4567 : 4;
- u8 one3 : 1;
- u8 srst : 1;
- u8 nien : 1;
- u8 zero0 : 1;
-#else
-#error "Please fix <asm/byteorder.h>"
-#endif
- } b;
-} atapi_control_reg_t;
-
-/*
- * The following is used to format the general configuration word
- * of the ATAPI IDENTIFY DEVICE command.
- */
-struct atapi_id_gcw {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
- u8 packet_size : 2; /* Packet Size */
- u8 reserved234 : 3; /* Reserved */
- u8 drq_type : 2; /* Command packet DRQ type */
- u8 removable : 1; /* Removable media */
- u8 device_type : 5; /* Device type */
- u8 reserved13 : 1; /* Reserved */
- u8 protocol : 2; /* Protocol type */
-#elif defined(__BIG_ENDIAN_BITFIELD)
- u8 protocol : 2;
- u8 reserved13 : 1;
- u8 device_type : 5;
- u8 removable : 1;
- u8 drq_type : 2;
- u8 reserved234 : 3;
- u8 packet_size : 2;
-#else
-#error "Please fix <asm/byteorder.h>"
-#endif
-};
-
-/*
- * INQUIRY packet command - Data Format.
- */
-typedef struct {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
- u8 device_type : 5; /* Peripheral Device Type */
- u8 reserved0_765 : 3; /* Peripheral Qualifier - Reserved */
- u8 reserved1_6t0 : 7; /* Reserved */
- u8 rmb : 1; /* Removable Medium Bit */
- u8 ansi_version : 3; /* ANSI Version */
- u8 ecma_version : 3; /* ECMA Version */
- u8 iso_version : 2; /* ISO Version */
- u8 response_format : 4; /* Response Data Format */
- u8 reserved3_45 : 2; /* Reserved */
- u8 reserved3_6 : 1; /* TrmIOP - Reserved */
- u8 reserved3_7 : 1; /* AENC - Reserved */
-#elif defined(__BIG_ENDIAN_BITFIELD)
- u8 reserved0_765 : 3;
- u8 device_type : 5;
- u8 rmb : 1;
- u8 reserved1_6t0 : 7;
- u8 iso_version : 2;
- u8 ecma_version : 3;
- u8 ansi_version : 3;
- u8 reserved3_7 : 1;
- u8 reserved3_6 : 1;
- u8 reserved3_45 : 2;
- u8 response_format : 4;
-#else
-#error "Please fix <asm/byteorder.h>"
-#endif
- u8 additional_length; /* Additional Length (total_length-4) */
- u8 rsv5, rsv6, rsv7; /* Reserved */
- u8 vendor_id[8]; /* Vendor Identification */
- u8 product_id[16]; /* Product Identification */
- u8 revision_level[4]; /* Revision Level */
- u8 vendor_specific[20]; /* Vendor Specific - Optional */
- u8 reserved56t95[40]; /* Reserved - Optional */
- /* Additional information may be returned */
-} atapi_inquiry_result_t;
-
-/*
- * REQUEST SENSE packet command result - Data Format.
- */
-typedef struct atapi_request_sense {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
- u8 error_code : 7; /* Error Code (0x70 - current or 0x71 - deferred) */
- u8 valid : 1; /* The information field conforms to standard */
- u8 reserved1 : 8; /* Reserved (Segment Number) */
- u8 sense_key : 4; /* Sense Key */
- u8 reserved2_4 : 1; /* Reserved */
- u8 ili : 1; /* Incorrect Length Indicator */
- u8 eom : 1; /* End Of Medium */
- u8 filemark : 1; /* Filemark */
-#elif defined(__BIG_ENDIAN_BITFIELD)
- u8 valid : 1;
- u8 error_code : 7;
- u8 reserved1 : 8;
- u8 filemark : 1;
- u8 eom : 1;
- u8 ili : 1;
- u8 reserved2_4 : 1;
- u8 sense_key : 4;
-#else
-#error "Please fix <asm/byteorder.h>"
-#endif
- u32 information __attribute__ ((packed));
- u8 asl; /* Additional sense length (n-7) */
- u32 command_specific; /* Additional command specific information */
- u8 asc; /* Additional Sense Code */
- u8 ascq; /* Additional Sense Code Qualifier */
- u8 replaceable_unit_code; /* Field Replaceable Unit Code */
-#if defined(__LITTLE_ENDIAN_BITFIELD)
- u8 sk_specific1 : 7; /* Sense Key Specific */
- u8 sksv : 1; /* Sense Key Specific information is valid */
-#elif defined(__BIG_ENDIAN_BITFIELD)
- u8 sksv : 1; /* Sense Key Specific information is valid */
- u8 sk_specific1 : 7; /* Sense Key Specific */
-#else
-#error "Please fix <asm/byteorder.h>"
-#endif
- u8 sk_specific[2]; /* Sense Key Specific */
- u8 pad[2]; /* Padding to 20 bytes */
-} atapi_request_sense_result_t;
-
-
-extern void atapi_init_pc(struct atapi_packet_command *pc);
-
-extern void atapi_discard_data(struct ata_device *, unsigned int);
-extern void atapi_write_zeros(struct ata_device *, unsigned int);
-
-extern void atapi_read(struct ata_device *, u8 *, unsigned int);
-extern void atapi_write(struct ata_device *, u8 *, unsigned int);
-
-typedef enum {
- ide_wait, /* insert rq at end of list, and wait for it */
- ide_preempt, /* insert rq in front of current request */
- ide_end /* insert rq at end of list, but don't wait for it */
-} ide_action_t;
-
-extern int ide_do_drive_cmd(struct ata_device *, struct request *, ide_action_t);
+++ /dev/null
-#warning this file is obsolete, please use <linux/blkdev.h> instead
-#include <linux/blkdev.h>
+++ /dev/null
-/* -*- mode: c; c-basic-offset: 8; indent-tabs-mode: nil; -*-
- * vim:expandtab:shiftwidth=8:tabstop=8:
- */
-
-#ifndef __FILTER_H_
-#define __FILTER_H_ 1
-
-#ifdef __KERNEL__
-
-/* cachetype.c */
-
-/*
- * it is important that things like inode, super and file operations
- * for intermezzo are not defined statically. If methods are NULL
- * the VFS takes special action based on that. Given that different
- * cache types have NULL ops at different slots, we must install opeation
- * talbes for InterMezzo with NULL's in the same spot
- */
-
-struct filter_ops {
- struct super_operations filter_sops;
-
- struct inode_operations filter_dir_iops;
- struct inode_operations filter_file_iops;
- struct inode_operations filter_sym_iops;
-
- struct file_operations filter_dir_fops;
- struct file_operations filter_file_fops;
- struct file_operations filter_sym_fops;
-
- struct dentry_operations filter_dentry_ops;
-};
-
-struct cache_ops {
- /* operations on the file store */
- struct super_operations *cache_sops;
-
- struct inode_operations *cache_dir_iops;
- struct inode_operations *cache_file_iops;
- struct inode_operations *cache_sym_iops;
-
- struct file_operations *cache_dir_fops;
- struct file_operations *cache_file_fops;
- struct file_operations *cache_sym_fops;
-
- struct dentry_operations *cache_dentry_ops;
-};
-
-
-#define FILTER_DID_SUPER_OPS 0x1
-#define FILTER_DID_INODE_OPS 0x2
-#define FILTER_DID_FILE_OPS 0x4
-#define FILTER_DID_DENTRY_OPS 0x8
-#define FILTER_DID_DEV_OPS 0x10
-#define FILTER_DID_SYMLINK_OPS 0x20
-#define FILTER_DID_DIR_OPS 0x40
-
-struct filter_fs {
- int o_flags;
- struct filter_ops o_fops;
- struct cache_ops o_caops;
- struct journal_ops *o_trops;
- struct snapshot_ops *o_snops;
-};
-
-#define FILTER_FS_TYPES 6
-#define FILTER_FS_EXT2 0
-#define FILTER_FS_EXT3 1
-#define FILTER_FS_REISERFS 2
-#define FILTER_FS_XFS 3
-#define FILTER_FS_OBDFS 4
-#define FILTER_FS_TMPFS 5
-extern struct filter_fs filter_oppar[FILTER_FS_TYPES];
-
-struct filter_fs *filter_get_filter_fs(const char *cache_type);
-void filter_setup_journal_ops(struct filter_fs *ops, char *cache_type);
-struct super_operations *filter_c2usops(struct filter_fs *cache);
-struct inode_operations *filter_c2ufiops(struct filter_fs *cache);
-struct inode_operations *filter_c2udiops(struct filter_fs *cache);
-struct inode_operations *filter_c2usiops(struct filter_fs *cache);
-struct file_operations *filter_c2uffops(struct filter_fs *cache);
-struct file_operations *filter_c2udfops(struct filter_fs *cache);
-struct file_operations *filter_c2usfops(struct filter_fs *cache);
-struct super_operations *filter_c2csops(struct filter_fs *cache);
-struct inode_operations *filter_c2cfiops(struct filter_fs *cache);
-struct inode_operations *filter_c2cdiops(struct filter_fs *cache);
-struct inode_operations *filter_c2csiops(struct filter_fs *cache);
-struct file_operations *filter_c2cffops(struct filter_fs *cache);
-struct file_operations *filter_c2cdfops(struct filter_fs *cache);
-struct file_operations *filter_c2csfops(struct filter_fs *cache);
-struct dentry_operations *filter_c2cdops(struct filter_fs *cache);
-struct dentry_operations *filter_c2udops(struct filter_fs *cache);
-
-void filter_setup_super_ops(struct filter_fs *cache, struct super_operations *cache_ops, struct super_operations *filter_sops);
-void filter_setup_dir_ops(struct filter_fs *cache, struct inode *cache_inode, struct inode_operations *filter_iops, struct file_operations *ffops);
-void filter_setup_file_ops(struct filter_fs *cache, struct inode *cache_inode, struct inode_operations *filter_iops, struct file_operations *filter_op);
-void filter_setup_symlink_ops(struct filter_fs *cache, struct inode *cache_inode, struct inode_operations *filter_iops, struct file_operations *filter_op);
-void filter_setup_dentry_ops(struct filter_fs *cache, struct dentry_operations *cache_dop, struct dentry_operations *filter_dop);
-
-
-#define PRESTO_DEBUG
-#ifdef PRESTO_DEBUG
-/* debugging masks */
-#define D_SUPER 1
-#define D_INODE 2 /* print entry and exit into procedure */
-#define D_FILE 4
-#define D_CACHE 8 /* cache debugging */
-#define D_MALLOC 16 /* print malloc, de-alloc information */
-#define D_JOURNAL 32
-#define D_UPCALL 64 /* up and downcall debugging */
-#define D_PSDEV 128
-#define D_PIOCTL 256
-#define D_SPECIAL 512
-#define D_TIMING 1024
-#define D_DOWNCALL 2048
-
-#define FDEBUG(mask, format, a...) \
- do { \
- if (filter_debug & mask) { \
- printk("(%s,l. %d): ", __FUNCTION__, __LINE__); \
- printk(format, ##a); } \
- } while (0)
-
-#define FENTRY \
- if(filter_print_entry) \
- printk("Process %d entered %s\n", current->pid, __FUNCTION__)
-
-#define FEXIT \
- if(filter_print_entry) \
- printk("Process %d leaving %s at %d\n", current->pid, \
- __FUNCTION__,__LINE__)
-#endif
-#endif
-#endif
+++ /dev/null
-/*
- * INET An implementation of the TCP/IP protocol suite for the LINUX
- * operating system. INET is implemented using the BSD Socket
- * interface as the means of communication with the user level.
- *
- * Miscellaneous internetwork definitions for kernel.
- *
- * Version: @(#)in_systm.h 1.0.0 12/17/93
- *
- * Authors: Original taken from Berkeley BSD UNIX 4.3-RENO.
- * Fred N. van Kempen, <waltje@uwalt.nl.mugnet.org>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef _LINUX_IN_SYSTM_H
-#define _LINUX_IN_SYSTM_H
-
-/*
- * Network types.
- * The n_ types are network-order variants of their natural
- * equivalents. The Linux kernel NET-2 code does not use
- * them (yet), but it might in the future. This is mostly
- * there for compatibility with BSD user-level programs.
- */
-typedef u_short n_short; /* short as received from the net */
-typedef u_long n_long; /* long as received from the net */
-typedef u_long n_time; /* ms since 00:00 GMT, byte rev */
-
-#endif /* _LINUX_IN_SYSTM_H */
+++ /dev/null
-/* $Id: isdn_lzscomp.h,v 1.1.10.1 2001/09/23 22:25:05 kai Exp $
- *
- * Header for isdn_lzscomp.c
- * Concentrated here to not mess up half a dozen kernel headers with code
- * snippets
- *
- * This software may be used and distributed according to the terms
- * of the GNU General Public License, incorporated herein by reference.
- *
- */
-
-#define CI_LZS_COMPRESS 17
-#define CILEN_LZS_COMPRESS 5
-
-#define LZS_CMODE_NONE 0
-#define LZS_CMODE_LCB 1
-#define LZS_CMODE_CRC 2
-#define LZS_CMODE_SEQNO 3 /* MUST be implemented (default) */
-#define LZS_CMODE_EXT 4 /* Seems to be what Win0.95 uses */
-
-#define LZS_COMP_MAX_HISTS 1 /* Don't waste peers ressources */
-#define LZS_COMP_DEF_HISTS 1 /* Most likely to negotiate */
-#define LZS_DECOMP_MAX_HISTS 32 /* More is really nonsense */
-#define LZS_DECOMP_DEF_HISTS 8 /* If we get it, this may be optimal */
-
-#define LZS_HIST_BYTE1(word) (word>>8) /* Just for better reading */
-#define LZS_HIST_BYTE2(word) (word&0xff) /* of this big endian stuff */
-#define LZS_HIST_WORD(b1,b2) ((b1<<8)|b2) /* (network byte order rulez) */
+++ /dev/null
-#ifndef _LINUX_MPP_H
-#define _LINUX_MPP_H
-
-/*
- * Definitions related to Massively Parallel Processing support.
- */
-
-/* All mpp implementations must supply these functions */
-
-extern void mpp_init(void);
-extern void mpp_hw_init(void);
-extern void mpp_procfs_init(void);
-
-extern int mpp_num_cells(void);
-extern int mpp_cid(void);
-extern int get_mppinfo(char *buffer);
-
-#endif
+++ /dev/null
-#ifndef _MSDOS_FS_I
-#define _MSDOS_FS_I
-
-#include <linux/fs.h>
-
-/*
- * MS-DOS file system inode data in memory
- */
-
-#define FAT_CACHE_VALID 0 /* special case for valid cache */
-
-struct msdos_inode_info {
- spinlock_t cache_lru_lock;
- struct list_head cache_lru;
- int nr_caches;
- /* for avoiding the race between fat_free() and fat_get_cluster() */
- unsigned int cache_valid_id;
-
- loff_t mmu_private;
- int i_start; /* first cluster or 0 */
- int i_logstart; /* logical first cluster */
- int i_attrs; /* unused attribute bits */
- int i_ctime_ms; /* unused change time in milliseconds */
- loff_t i_pos; /* on-disk position of directory entry or 0 */
- struct hlist_node i_fat_hash; /* hash by i_location */
- struct inode vfs_inode;
-};
-
-#endif
+++ /dev/null
-#ifndef _MSDOS_FS_SB
-#define _MSDOS_FS_SB
-
-/*
- * MS-DOS file system in-core superblock data
- */
-
-struct fat_mount_options {
- uid_t fs_uid;
- gid_t fs_gid;
- unsigned short fs_fmask;
- unsigned short fs_dmask;
- unsigned short codepage; /* Codepage for shortname conversions */
- char *iocharset; /* Charset used for filename input/display */
- unsigned short shortname; /* flags for shortname display/create rule */
- unsigned char name_check; /* r = relaxed, n = normal, s = strict */
- unsigned quiet:1, /* set = fake successful chmods and chowns */
- showexec:1, /* set = only set x bit for com/exe/bat */
- sys_immutable:1, /* set = system files are immutable */
- dotsOK:1, /* set = hidden and system files are named '.filename' */
- isvfat:1, /* 0=no vfat long filename support, 1=vfat support */
- utf8:1, /* Use of UTF8 character set (Default) */
- unicode_xlate:1, /* create escape sequences for unhandled Unicode */
- numtail:1, /* Does first alias have a numeric '~1' type tail? */
- atari:1, /* Use Atari GEMDOS variation of MS-DOS fs */
- nocase:1; /* Does this need case conversion? 0=need case conversion*/
-};
-
-#define FAT_HASH_BITS 8
-#define FAT_HASH_SIZE (1UL << FAT_HASH_BITS)
-#define FAT_HASH_MASK (FAT_HASH_SIZE-1)
-
-struct msdos_sb_info {
- unsigned short sec_per_clus; /* sectors/cluster */
- unsigned short cluster_bits; /* log2(cluster_size) */
- unsigned int cluster_size; /* cluster size */
- unsigned char fats,fat_bits; /* number of FATs, FAT bits (12 or 16) */
- unsigned short fat_start;
- unsigned long fat_length; /* FAT start & length (sec.) */
- unsigned long dir_start;
- unsigned short dir_entries; /* root dir start & entries */
- unsigned long data_start; /* first data sector */
- unsigned long clusters; /* number of clusters */
- unsigned long root_cluster; /* first cluster of the root directory */
- unsigned long fsinfo_sector; /* sector number of FAT32 fsinfo */
- struct semaphore fat_lock;
- int prev_free; /* previously allocated cluster number */
- int free_clusters; /* -1 if undefined */
- struct fat_mount_options options;
- struct nls_table *nls_disk; /* Codepage used on disk */
- struct nls_table *nls_io; /* Charset used for input and display */
- void *dir_ops; /* Opaque; default directory operations */
- int dir_per_block; /* dir entries per block */
- int dir_per_block_bits; /* log2(dir_per_block) */
-
- spinlock_t inode_hash_lock;
- struct hlist_head inode_hashtable[FAT_HASH_SIZE];
-};
-
-#endif
+++ /dev/null
-#ifndef _LINUX_NETBEUI_H
-#define _LINUX_NETBEUI_H
-
-#include <linux/if.h>
-
-#define NB_NAME_LEN 20 /* Set this properly from the full docs when
- I get them */
-
-struct sockaddr_netbeui
-{
- sa_family snb_family;
- char snb_name[NB_NAME_LEN];
- char snb_devhint[IFNAMSIZ];
-};
-
-#endif
+++ /dev/null
-#ifndef __LINUX_DDP_NETFILTER_H
-#define __LINUX_DDP_NETFILTER_H
-
-/* DDP-specific defines for netfilter. Complete me sometime.
- * (C)1998 Rusty Russell -- This code is GPL.
- */
-
-#include <linux/netfilter.h>
-
-/* Appletalk hooks */
-#define NF_DDP_INPUT 0
-#define NF_DDP_FORWARD 1
-#define NF_DDP_OUTPUT 2
-#endif /*__LINUX_DDP_NETFILTER_H*/
+++ /dev/null
-/* Minor modifications to fit on compatibility framework:
- Rusty.Russell@rustcorp.com.au
-*/
-
-#ifndef __LINUX_FIREWALL_H
-#define __LINUX_FIREWALL_H
-
-/*
- * Definitions for loadable firewall modules
- */
-
-#define FW_QUEUE 0
-#define FW_BLOCK 1
-#define FW_ACCEPT 2
-#define FW_REJECT (-1)
-#define FW_REDIRECT 3
-#define FW_MASQUERADE 4
-#define FW_SKIP 5
-
-struct firewall_ops
-{
- struct firewall_ops *next;
- int (*fw_forward)(struct firewall_ops *this, int pf,
- struct net_device *dev, void *arg,
- struct sk_buff **pskb);
- int (*fw_input)(struct firewall_ops *this, int pf,
- struct net_device *dev, void *arg,
- struct sk_buff **pskb);
- int (*fw_output)(struct firewall_ops *this, int pf,
- struct net_device *dev, void *arg,
- struct sk_buff **pskb);
- /* These may be NULL. */
- int (*fw_acct_in)(struct firewall_ops *this, int pf,
- struct net_device *dev, void *arg,
- struct sk_buff **pskb);
- int (*fw_acct_out)(struct firewall_ops *this, int pf,
- struct net_device *dev, void *arg,
- struct sk_buff **pskb);
-};
-
-extern int register_firewall(int pf, struct firewall_ops *fw);
-extern int unregister_firewall(int pf, struct firewall_ops *fw);
-
-extern int ip_fw_masq_timeouts(void *user, int len);
-#endif /* __LINUX_FIREWALL_H */
+++ /dev/null
-/*
- * This code is heavily based on the code in ip_fw.h; see that file for
- * copyrights and attributions. This code is basically GPL.
- *
- * 15-Feb-1997: Major changes to allow graphs for firewall rules.
- * Paul Russell <Paul.Russell@rustcorp.com.au> and
- * Michael Neuling <Michael.Neuling@rustcorp.com.au>
- * 2-Nov-1997: Changed types to __u16, etc.
- * Removed IP_FW_F_TCPACK & IP_FW_F_BIDIR.
- * Added inverse flags field.
- * Removed multiple port specs.
- */
-
-/*
- * Format of an IP firewall descriptor
- *
- * src, dst, src_mask, dst_mask are always stored in network byte order.
- * flags are stored in host byte order (of course).
- * Port numbers are stored in HOST byte order.
- */
-
-#ifndef _IP_FWCHAINS_H
-#define _IP_FWCHAINS_H
-
-#ifdef __KERNEL__
-#include <linux/icmp.h>
-#include <linux/in.h>
-#include <linux/ip.h>
-#include <linux/tcp.h>
-#include <linux/udp.h>
-#endif /* __KERNEL__ */
-#define IP_FW_MAX_LABEL_LENGTH 8
-typedef char ip_chainlabel[IP_FW_MAX_LABEL_LENGTH+1];
-
-struct ip_fw
-{
- struct in_addr fw_src, fw_dst; /* Source and destination IP addr */
- struct in_addr fw_smsk, fw_dmsk; /* Mask for src and dest IP addr */
- __u32 fw_mark; /* ID to stamp on packet */
- __u16 fw_proto; /* Protocol, 0 = ANY */
- __u16 fw_flg; /* Flags word */
- __u16 fw_invflg; /* Inverse flags */
- __u16 fw_spts[2]; /* Source port range. */
- __u16 fw_dpts[2]; /* Destination port range. */
- __u16 fw_redirpt; /* Port to redirect to. */
- __u16 fw_outputsize; /* Max amount to output to
- NETLINK */
- char fw_vianame[IFNAMSIZ]; /* name of interface "via" */
- __u8 fw_tosand, fw_tosxor; /* Revised packet priority */
-};
-
-struct ip_fwuser
-{
- struct ip_fw ipfw;
- ip_chainlabel label;
-};
-
-/* Values for "fw_flg" field . */
-#define IP_FW_F_PRN 0x0001 /* Print packet if it matches */
-#define IP_FW_F_TCPSYN 0x0002 /* For tcp packets-check SYN only */
-#define IP_FW_F_FRAG 0x0004 /* Set if rule is a fragment rule */
-#define IP_FW_F_MARKABS 0x0008 /* Set the mark to fw_mark, not add. */
-#define IP_FW_F_WILDIF 0x0010 /* Need only match start of interface name. */
-#define IP_FW_F_NETLINK 0x0020 /* Redirect to netlink: 2.1.x only */
-#define IP_FW_F_MASK 0x003F /* All possible flag bits mask */
-
-/* Values for "fw_invflg" field. */
-#define IP_FW_INV_SRCIP 0x0001 /* Invert the sense of fw_src. */
-#define IP_FW_INV_DSTIP 0x0002 /* Invert the sense of fw_dst. */
-#define IP_FW_INV_PROTO 0x0004 /* Invert the sense of fw_proto. */
-#define IP_FW_INV_SRCPT 0x0008 /* Invert the sense of source ports. */
-#define IP_FW_INV_DSTPT 0x0010 /* Invert the sense of destination ports. */
-#define IP_FW_INV_VIA 0x0020 /* Invert the sense of fw_vianame. */
-#define IP_FW_INV_SYN 0x0040 /* Invert the sense of IP_FW_F_TCPSYN. */
-#define IP_FW_INV_FRAG 0x0080 /* Invert the sense of IP_FW_F_FRAG. */
-
-/*
- * New IP firewall options for [gs]etsockopt at the RAW IP level.
- * Unlike BSD Linux inherits IP options so you don't have to use
- * a raw socket for this. Instead we check rights in the calls. */
-
-#define IP_FW_BASE_CTL 64 /* base for firewall socket options */
-
-#define IP_FW_APPEND (IP_FW_BASE_CTL) /* Takes ip_fwchange */
-#define IP_FW_REPLACE (IP_FW_BASE_CTL+1) /* Takes ip_fwnew */
-#define IP_FW_DELETE_NUM (IP_FW_BASE_CTL+2) /* Takes ip_fwdelnum */
-#define IP_FW_DELETE (IP_FW_BASE_CTL+3) /* Takes ip_fwchange */
-#define IP_FW_INSERT (IP_FW_BASE_CTL+4) /* Takes ip_fwnew */
-#define IP_FW_FLUSH (IP_FW_BASE_CTL+5) /* Takes ip_chainlabel */
-#define IP_FW_ZERO (IP_FW_BASE_CTL+6) /* Takes ip_chainlabel */
-#define IP_FW_CHECK (IP_FW_BASE_CTL+7) /* Takes ip_fwtest */
-#define IP_FW_MASQ_TIMEOUTS (IP_FW_BASE_CTL+8) /* Takes 3 ints */
-#define IP_FW_CREATECHAIN (IP_FW_BASE_CTL+9) /* Takes ip_chainlabel */
-#define IP_FW_DELETECHAIN (IP_FW_BASE_CTL+10) /* Takes ip_chainlabel */
-#define IP_FW_POLICY (IP_FW_BASE_CTL+11) /* Takes ip_fwpolicy */
-/* Masquerade control, only 1 optname */
-
-#define IP_FW_MASQ_CTL (IP_FW_BASE_CTL+12) /* General ip_masq ctl */
-
-/* Builtin chain labels */
-#define IP_FW_LABEL_FORWARD "forward"
-#define IP_FW_LABEL_INPUT "input"
-#define IP_FW_LABEL_OUTPUT "output"
-
-/* Special targets */
-#define IP_FW_LABEL_MASQUERADE "MASQ"
-#define IP_FW_LABEL_REDIRECT "REDIRECT"
-#define IP_FW_LABEL_ACCEPT "ACCEPT"
-#define IP_FW_LABEL_BLOCK "DENY"
-#define IP_FW_LABEL_REJECT "REJECT"
-#define IP_FW_LABEL_RETURN "RETURN"
-#define IP_FW_LABEL_QUEUE "QUEUE"
-
-/* Files in /proc/net */
-#define IP_FW_PROC_CHAINS "ip_fwchains"
-#define IP_FW_PROC_CHAIN_NAMES "ip_fwnames"
-
-
-struct ip_fwpkt
-{
- struct iphdr fwp_iph; /* IP header */
- union {
- struct tcphdr fwp_tcph; /* TCP header or */
- struct udphdr fwp_udph; /* UDP header */
- struct icmphdr fwp_icmph; /* ICMP header */
- } fwp_protoh;
- struct in_addr fwp_via; /* interface address */
- char fwp_vianame[IFNAMSIZ]; /* interface name */
-};
-
-/* The argument to IP_FW_DELETE and IP_FW_APPEND */
-struct ip_fwchange
-{
- struct ip_fwuser fwc_rule;
- ip_chainlabel fwc_label;
-};
-
-/* The argument to IP_FW_CHECK. */
-struct ip_fwtest
-{
- struct ip_fwpkt fwt_packet; /* Packet to be tested */
- ip_chainlabel fwt_label; /* Block to start test in */
-};
-
-/* The argument to IP_FW_DELETE_NUM */
-struct ip_fwdelnum
-{
- __u32 fwd_rulenum;
- ip_chainlabel fwd_label;
-};
-
-/* The argument to IP_FW_REPLACE and IP_FW_INSERT */
-struct ip_fwnew
-{
- __u32 fwn_rulenum;
- struct ip_fwuser fwn_rule;
- ip_chainlabel fwn_label;
-};
-
-/* The argument to IP_FW_POLICY */
-struct ip_fwpolicy
-{
- ip_chainlabel fwp_policy;
- ip_chainlabel fwp_label;
-};
-/*
- * timeouts for ip masquerading
- */
-
-extern int ip_fw_masq_timeouts(void *, int);
-
-
-/*
- * Main firewall chains definitions and global var's definitions.
- */
-
-#ifdef __KERNEL__
-
-#include <linux/config.h>
-#include <linux/version.h>
-#include <linux/init.h>
-extern void ip_fw_init(void) __init;
-extern int ip_fw_ctl(int, void *, int);
-#ifdef CONFIG_IP_MASQUERADE
-extern int ip_masq_uctl(int, char *, int);
-#endif
-#endif /* KERNEL */
-
-#endif /* _IP_FWCHAINS_H */
+++ /dev/null
-#ifndef _IPFWADM_CORE_H
-#define _IPFWADM_CORE_H
-/* Minor modifications to fit on compatibility framework:
- Rusty.Russell@rustcorp.com.au
-*/
-
-/*
- * IP firewalling code. This is taken from 4.4BSD. Please note the
- * copyright message below. As per the GPL it must be maintained
- * and the licenses thus do not conflict. While this port is subject
- * to the GPL I also place my modifications under the original
- * license in recognition of the original copyright.
- *
- * Ported from BSD to Linux,
- * Alan Cox 22/Nov/1994.
- * Merged and included the FreeBSD-Current changes at Ugen's request
- * (but hey it's a lot cleaner now). Ugen would prefer in some ways
- * we waited for his final product but since Linux 1.2.0 is about to
- * appear it's not practical - Read: It works, it's not clean but please
- * don't consider it to be his standard of finished work.
- * Alan.
- *
- * Fixes:
- * Pauline Middelink : Added masquerading.
- * Jos Vos : Separate input and output firewall
- * chains, new "insert" and "append"
- * commands to replace "add" commands,
- * add ICMP header to struct ip_fwpkt.
- * Jos Vos : Add support for matching device names.
- * Willy Konynenberg : Add transparent proxying support.
- * Jos Vos : Add options for input/output accounting.
- *
- * All the real work was done by .....
- */
-
-/*
- * Copyright (c) 1993 Daniel Boulet
- * Copyright (c) 1994 Ugen J.S.Antsilevich
- *
- * Redistribution and use in source forms, with and without modification,
- * are permitted provided that this entire comment appears intact.
- *
- * Redistribution in binary form may occur without any restrictions.
- * Obviously, it would be nice if you gave credit where credit is due
- * but requiring it would be too onerous.
- *
- * This software is provided ``AS IS'' without any warranties of any kind.
- */
-
-/*
- * Format of an IP firewall descriptor
- *
- * src, dst, src_mask, dst_mask are always stored in network byte order.
- * flags and num_*_ports are stored in host byte order (of course).
- * Port numbers are stored in HOST byte order.
- */
-
-#ifdef __KERNEL__
-#include <linux/icmp.h>
-#include <linux/in.h>
-#include <linux/ip.h>
-#include <linux/tcp.h>
-#include <linux/udp.h>
-#endif
-
-struct ip_fw
-{
- struct ip_fw *fw_next; /* Next firewall on chain */
- struct in_addr fw_src, fw_dst; /* Source and destination IP addr */
- struct in_addr fw_smsk, fw_dmsk; /* Mask for src and dest IP addr */
- struct in_addr fw_via; /* IP address of interface "via" */
- struct net_device *fw_viadev; /* device of interface "via" */
- __u16 fw_flg; /* Flags word */
- __u16 fw_nsp, fw_ndp; /* N'of src ports and # of dst ports */
- /* in ports array (dst ports follow */
- /* src ports; max of 10 ports in all; */
- /* count of 0 means match all ports) */
-#define IP_FW_MAX_PORTS 10 /* A reasonable maximum */
- __u16 fw_pts[IP_FW_MAX_PORTS]; /* Array of port numbers to match */
- unsigned long fw_pcnt,fw_bcnt; /* Packet and byte counters */
- __u8 fw_tosand, fw_tosxor; /* Revised packet priority */
- char fw_vianame[IFNAMSIZ]; /* name of interface "via" */
-};
-
-/*
- * Values for "flags" field .
- */
-
-#define IP_FW_F_ALL 0x0000 /* This is a universal packet firewall*/
-#define IP_FW_F_TCP 0x0001 /* This is a TCP packet firewall */
-#define IP_FW_F_UDP 0x0002 /* This is a UDP packet firewall */
-#define IP_FW_F_ICMP 0x0003 /* This is a ICMP packet firewall */
-#define IP_FW_F_KIND 0x0003 /* Mask to isolate firewall kind */
-#define IP_FW_F_ACCEPT 0x0004 /* This is an accept firewall (as *
- * opposed to a deny firewall)*
- * */
-#define IP_FW_F_SRNG 0x0008 /* The first two src ports are a min *
- * and max range (stored in host byte *
- * order). *
- * */
-#define IP_FW_F_DRNG 0x0010 /* The first two dst ports are a min *
- * and max range (stored in host byte *
- * order). *
- * (ports[0] <= port <= ports[1]) *
- * */
-#define IP_FW_F_PRN 0x0020 /* In verbose mode print this firewall*/
-#define IP_FW_F_BIDIR 0x0040 /* For bidirectional firewalls */
-#define IP_FW_F_TCPSYN 0x0080 /* For tcp packets-check SYN only */
-#define IP_FW_F_ICMPRPL 0x0100 /* Send back icmp unreachable packet */
-#define IP_FW_F_MASQ 0x0200 /* Masquerading */
-#define IP_FW_F_TCPACK 0x0400 /* For tcp-packets match if ACK is set*/
-#define IP_FW_F_REDIR 0x0800 /* Redirect to local port fw_pts[n] */
-#define IP_FW_F_ACCTIN 0x1000 /* Account incoming packets only. */
-#define IP_FW_F_ACCTOUT 0x2000 /* Account outgoing packets only. */
-
-#define IP_FW_F_MASK 0x3FFF /* All possible flag bits mask */
-
-/*
- * New IP firewall options for [gs]etsockopt at the RAW IP level.
- * Unlike BSD Linux inherits IP options so you don't have to use
- * a raw socket for this. Instead we check rights in the calls.
- */
-
-#define IP_FW_BASE_CTL 64 /* base for firewall socket options */
-
-#define IP_FW_COMMAND 0x00FF /* mask for command without chain */
-#define IP_FW_TYPE 0x0300 /* mask for type (chain) */
-#define IP_FW_SHIFT 8 /* shift count for type (chain) */
-
-#define IP_FW_FWD 0
-#define IP_FW_IN 1
-#define IP_FW_OUT 2
-#define IP_FW_ACCT 3
-#define IP_FW_CHAINS 4 /* total number of ip_fw chains */
-#define IP_FW_MASQ 5
-
-#define IP_FW_INSERT (IP_FW_BASE_CTL)
-#define IP_FW_APPEND (IP_FW_BASE_CTL+1)
-#define IP_FW_DELETE (IP_FW_BASE_CTL+2)
-#define IP_FW_FLUSH (IP_FW_BASE_CTL+3)
-#define IP_FW_ZERO (IP_FW_BASE_CTL+4)
-#define IP_FW_POLICY (IP_FW_BASE_CTL+5)
-#define IP_FW_CHECK (IP_FW_BASE_CTL+6)
-#define IP_FW_MASQ_TIMEOUTS (IP_FW_BASE_CTL+7)
-
-#define IP_FW_INSERT_FWD (IP_FW_INSERT | (IP_FW_FWD << IP_FW_SHIFT))
-#define IP_FW_APPEND_FWD (IP_FW_APPEND | (IP_FW_FWD << IP_FW_SHIFT))
-#define IP_FW_DELETE_FWD (IP_FW_DELETE | (IP_FW_FWD << IP_FW_SHIFT))
-#define IP_FW_FLUSH_FWD (IP_FW_FLUSH | (IP_FW_FWD << IP_FW_SHIFT))
-#define IP_FW_ZERO_FWD (IP_FW_ZERO | (IP_FW_FWD << IP_FW_SHIFT))
-#define IP_FW_POLICY_FWD (IP_FW_POLICY | (IP_FW_FWD << IP_FW_SHIFT))
-#define IP_FW_CHECK_FWD (IP_FW_CHECK | (IP_FW_FWD << IP_FW_SHIFT))
-
-#define IP_FW_INSERT_IN (IP_FW_INSERT | (IP_FW_IN << IP_FW_SHIFT))
-#define IP_FW_APPEND_IN (IP_FW_APPEND | (IP_FW_IN << IP_FW_SHIFT))
-#define IP_FW_DELETE_IN (IP_FW_DELETE | (IP_FW_IN << IP_FW_SHIFT))
-#define IP_FW_FLUSH_IN (IP_FW_FLUSH | (IP_FW_IN << IP_FW_SHIFT))
-#define IP_FW_ZERO_IN (IP_FW_ZERO | (IP_FW_IN << IP_FW_SHIFT))
-#define IP_FW_POLICY_IN (IP_FW_POLICY | (IP_FW_IN << IP_FW_SHIFT))
-#define IP_FW_CHECK_IN (IP_FW_CHECK | (IP_FW_IN << IP_FW_SHIFT))
-
-#define IP_FW_INSERT_OUT (IP_FW_INSERT | (IP_FW_OUT << IP_FW_SHIFT))
-#define IP_FW_APPEND_OUT (IP_FW_APPEND | (IP_FW_OUT << IP_FW_SHIFT))
-#define IP_FW_DELETE_OUT (IP_FW_DELETE | (IP_FW_OUT << IP_FW_SHIFT))
-#define IP_FW_FLUSH_OUT (IP_FW_FLUSH | (IP_FW_OUT << IP_FW_SHIFT))
-#define IP_FW_ZERO_OUT (IP_FW_ZERO | (IP_FW_OUT << IP_FW_SHIFT))
-#define IP_FW_POLICY_OUT (IP_FW_POLICY | (IP_FW_OUT << IP_FW_SHIFT))
-#define IP_FW_CHECK_OUT (IP_FW_CHECK | (IP_FW_OUT << IP_FW_SHIFT))
-
-#define IP_ACCT_INSERT (IP_FW_INSERT | (IP_FW_ACCT << IP_FW_SHIFT))
-#define IP_ACCT_APPEND (IP_FW_APPEND | (IP_FW_ACCT << IP_FW_SHIFT))
-#define IP_ACCT_DELETE (IP_FW_DELETE | (IP_FW_ACCT << IP_FW_SHIFT))
-#define IP_ACCT_FLUSH (IP_FW_FLUSH | (IP_FW_ACCT << IP_FW_SHIFT))
-#define IP_ACCT_ZERO (IP_FW_ZERO | (IP_FW_ACCT << IP_FW_SHIFT))
-
-#define IP_FW_MASQ_INSERT (IP_FW_INSERT | (IP_FW_MASQ << IP_FW_SHIFT))
-#define IP_FW_MASQ_ADD (IP_FW_APPEND | (IP_FW_MASQ << IP_FW_SHIFT))
-#define IP_FW_MASQ_DEL (IP_FW_DELETE | (IP_FW_MASQ << IP_FW_SHIFT))
-#define IP_FW_MASQ_FLUSH (IP_FW_FLUSH | (IP_FW_MASQ << IP_FW_SHIFT))
-
-#define IP_FW_MASQ_INSERT (IP_FW_INSERT | (IP_FW_MASQ << IP_FW_SHIFT))
-#define IP_FW_MASQ_ADD (IP_FW_APPEND | (IP_FW_MASQ << IP_FW_SHIFT))
-#define IP_FW_MASQ_DEL (IP_FW_DELETE | (IP_FW_MASQ << IP_FW_SHIFT))
-#define IP_FW_MASQ_FLUSH (IP_FW_FLUSH | (IP_FW_MASQ << IP_FW_SHIFT))
-
-struct ip_fwpkt
-{
- struct iphdr fwp_iph; /* IP header */
- union {
- struct tcphdr fwp_tcph; /* TCP header or */
- struct udphdr fwp_udph; /* UDP header */
- struct icmphdr fwp_icmph; /* ICMP header */
- } fwp_protoh;
- struct in_addr fwp_via; /* interface address */
- char fwp_vianame[IFNAMSIZ]; /* interface name */
-};
-
-#define IP_FW_MASQCTL_MAX 256
-#define IP_MASQ_MOD_NMAX 32
-
-struct ip_fw_masqctl
-{
- int mctl_action;
- union {
- struct {
- char name[IP_MASQ_MOD_NMAX];
- char data[1];
- } mod;
- } u;
-};
-
-/*
- * timeouts for ip masquerading
- */
-
-struct ip_fw_masq;
-
-/*
- * Main firewall chains definitions and global var's definitions.
- */
-
-#ifdef __KERNEL__
-
-/* Modes used in the ip_fw_chk() routine. */
-#define IP_FW_MODE_FW 0x00 /* kernel firewall check */
-#define IP_FW_MODE_ACCT_IN 0x01 /* accounting (incoming) */
-#define IP_FW_MODE_ACCT_OUT 0x02 /* accounting (outgoing) */
-#define IP_FW_MODE_CHK 0x04 /* check requested by user */
-
-#include <linux/config.h>
-#ifdef CONFIG_IP_FIREWALL
-extern struct ip_fw *ip_fw_in_chain;
-extern struct ip_fw *ip_fw_out_chain;
-extern struct ip_fw *ip_fw_fwd_chain;
-extern int ip_fw_in_policy;
-extern int ip_fw_out_policy;
-extern int ip_fw_fwd_policy;
-extern int ip_fw_ctl(int, void *, int);
-#endif
-#ifdef CONFIG_IP_ACCT
-extern struct ip_fw *ip_acct_chain;
-extern int ip_acct_ctl(int, void *, int);
-#endif
-#ifdef CONFIG_IP_MASQUERADE
-extern int ip_masq_ctl(int, void *, int);
-#endif
-#ifdef CONFIG_IP_MASQUERADE
-extern int ip_masq_ctl(int, void *, int);
-#endif
-
-extern int ip_fw_masq_timeouts(void *user, int len);
-
-extern int ip_fw_chk(struct sk_buff **, struct net_device *, __u16 *,
- struct ip_fw *, int, int);
-#endif /* KERNEL */
-#endif /* _IP_FW_H */
+++ /dev/null
-#ifndef _IP6T_REJECT_H
-#define _IP6T_REJECT_H
-
-enum ip6t_reject_with {
- IP6T_ICMP_NET_UNREACHABLE,
- IP6T_ICMP_HOST_UNREACHABLE,
- IP6T_ICMP_PROT_UNREACHABLE,
- IP6T_ICMP_PORT_UNREACHABLE,
- IP6T_ICMP_ECHOREPLY
-};
-
-struct ip6t_reject_info {
- enum ip6t_reject_with with; /* reject type */
-};
-
-#endif /*_IPT_REJECT_H*/
+++ /dev/null
-#ifndef __LINUX_IPX_NETFILTER_H
-#define __LINUX_IPX_NETFILTER_H
-
-/* IPX-specific defines for netfilter. Complete me sometime.
- * (C)1998 Rusty Russell -- This code is GPL.
- */
-
-#include <linux/netfilter.h>
-
-/* IPX Hooks */
-#define NF_IPX_INPUT 0
-#define NF_IPX_FORWARD 1
-#define NF_IPX_OUTPUT 2
-#endif /*__LINUX_IPX_NETFILTER_H*/
+++ /dev/null
-#ifndef __LINUX_X25_NETFILTER_H
-#define __LINUX_X25_NETFILTER_H
-
-/* X25-specific defines for netfilter. Complete me sometime.
- * (C)1998 Rusty Russell -- This code is GPL.
- */
-
-#include <linux/netfilter.h>
-
-/* Hooks */
-#define NF_X25_INPUT 0
-#define NF_X25_FORWARD 1
-#define NF_X25_OUTPUT 2
-
-#endif /*__LINUX_X25_NETFILTER_H*/
+++ /dev/null
-#ifndef LINUX_UMSDOS_FS_H
-#define LINUX_UMSDOS_FS_H
-
-
-/*#define UMS_DEBUG 1 // define for check_* functions */
-/*#define UMSDOS_DEBUG 1*/
-#define UMSDOS_PARANOIA 1
-
-#define UMSDOS_VERSION 0
-#define UMSDOS_RELEASE 4
-
-#define UMSDOS_ROOT_INO 1
-
-/* This is the file acting as a directory extension */
-#define UMSDOS_EMD_FILE "--linux-.---"
-#define UMSDOS_EMD_NAMELEN 12
-#define UMSDOS_PSDROOT_NAME "linux"
-#define UMSDOS_PSDROOT_LEN 5
-
-#ifndef _LINUX_TYPES_H
-#include <linux/types.h>
-#endif
-#ifndef _LINUX_LIMITS_H
-#include <linux/limits.h>
-#endif
-#ifndef _LINUX_DIRENT_H
-#include <linux/dirent.h>
-#endif
-#ifndef _LINUX_IOCTL_H
-#include <linux/ioctl.h>
-#endif
-
-
-#ifdef __KERNEL__
-/* #Specification: convention / PRINTK Printk and printk
- * Here is the convention for the use of printk inside fs/umsdos
- *
- * printk carry important message (error or status).
- * Printk is for debugging (it is a macro defined at the beginning of
- * most source.
- * PRINTK is a nulled Printk macro.
- *
- * This convention makes the source easier to read, and Printk easier
- * to shut off.
- */
-# define PRINTK(x)
-# ifdef UMSDOS_DEBUG
-# define Printk(x) printk x
-# else
-# define Printk(x)
-# endif
-#endif /* __KERNEL__ */
-
-
-struct umsdos_fake_info {
- char fname[13];
- int len;
-};
-
-#define UMSDOS_MAXNAME 220
-/* This structure is 256 bytes large, depending on the name, only part */
-/* of it is written to disk */
-/* nice though it would be, I can't change this and preserve backward compatibility */
-struct umsdos_dirent {
- unsigned char name_len; /* if == 0, then this entry is not used */
- unsigned char flags; /* UMSDOS_xxxx */
- unsigned short nlink; /* How many hard links point to this entry */
- __kernel_uid_t uid; /* Owner user id */
- __kernel_gid_t gid; /* Group id */
- time_t atime; /* Access time */
- time_t mtime; /* Last modification time */
- time_t ctime; /* Creation time */
- unsigned short rdev; /* major and minor of a device special file */
- umode_t mode; /* Standard UNIX permissions bits + type of */
- char spare[12]; /* unused bytes for future extensions */
- /* file, see linux/stat.h */
- char name[UMSDOS_MAXNAME]; /* Not '\0' terminated */
- /* but '\0' padded, so it will allow */
- /* for adding news fields in this record */
- /* by reducing the size of name[] */
-};
-
-#define UMSDOS_HIDDEN 1 /* Never show this entry in directory search */
-#define UMSDOS_HLINK 2 /* It is a (pseudo) hard link */
-
-/* #Specification: EMD file / record size
- * Entry are 64 bytes wide in the EMD file. It allows for a 30 characters
- * name. If a name is longer, contiguous entries are allocated. So a
- * umsdos_dirent may span multiple records.
- */
-
-#define UMSDOS_REC_SIZE 64
-
-/* Translation between MSDOS name and UMSDOS name */
-
-struct umsdos_info {
- int msdos_reject; /* Tell if the file name is invalid for MSDOS */
- /* See umsdos_parse */
- struct umsdos_fake_info fake;
- struct umsdos_dirent entry;
- off_t f_pos; /* offset of the entry in the EMD file
- * or offset where the entry may be store
- * if it is a new entry
- */
- int recsize; /* Record size needed to store entry */
-};
-
-/* Definitions for ioctl (number randomly chosen)
- * The next ioctl commands operate only on the DOS directory
- * The file umsdos_progs/umsdosio.c contain a string table
- * based on the order of those definition. Keep it in sync
- */
-#define UMSDOS_READDIR_DOS _IO(0x04,210) /* Do a readdir of the DOS directory */
-#define UMSDOS_UNLINK_DOS _IO(0x04,211) /* Erase in the DOS directory only */
-#define UMSDOS_RMDIR_DOS _IO(0x04,212) /* rmdir in the DOS directory only */
-#define UMSDOS_STAT_DOS _IO(0x04,213) /* Get info about a file */
-
-/* The next ioctl commands operate only on the EMD file */
-#define UMSDOS_CREAT_EMD _IO(0x04,214) /* Create a file */
-#define UMSDOS_UNLINK_EMD _IO(0x04,215) /* unlink (rmdir) a file */
-#define UMSDOS_READDIR_EMD _IO(0x04,216) /* read the EMD file only. */
-#define UMSDOS_GETVERSION _IO(0x04,217) /* Get the release number of UMSDOS */
-#define UMSDOS_INIT_EMD _IO(0x04,218) /* Create the EMD file if not there */
-#define UMSDOS_DOS_SETUP _IO(0x04,219) /* Set the defaults of the MS-DOS driver. */
-
-#define UMSDOS_RENAME_DOS _IO(0x04,220) /* rename a file/directory in the DOS
- * directory only */
-struct umsdos_ioctl {
- struct dirent dos_dirent;
- struct umsdos_dirent umsdos_dirent;
- /* The following structure is used to exchange some data with
- * utilities (umsdos_progs/util/umsdosio.c). The first releases
- * were using struct stat from "sys/stat.h". This was causing
- * some problem for cross compilation of the kernel.
- * Since I am not really using the structure stat, but only
- * some fields of it, I have decided to replicate the structure
- * here for compatibility with the binaries out there.
- * FIXME PTW 1998, this has probably changed
- */
-
- struct {
- unsigned long st_dev;
- ino_t st_ino; /* used */
- umode_t st_mode; /* used */
- nlink_t st_nlink;
- __kernel_uid_t st_uid;
- __kernel_gid_t st_gid;
- unsigned long st_rdev;
- off_t st_size; /* used */
- unsigned long st_blksize;
- unsigned long st_blocks;
- time_t st_atime; /* used */
- unsigned long __unused1;
- time_t st_mtime; /* used */
- unsigned long __unused2;
- time_t st_ctime; /* used */
- unsigned long __unused3;
- uid_t st_uid32;
- gid_t st_gid32;
- } stat;
- char version, release;
-};
-
-/* Different macros to access struct umsdos_dirent */
-#define EDM_ENTRY_ISUSED(e) ((e)->name_len!=0)
-
-#ifdef __KERNEL__
-
-#ifndef LINUX_FS_H
-#include <linux/fs.h>
-#endif
-
-extern struct inode_operations umsdos_dir_inode_operations;
-extern struct inode_operations umsdos_rdir_inode_operations;
-extern struct file_operations umsdos_dir_operations;
-extern struct file_operations umsdos_rdir_operations;
-
-#include <linux/umsdos_fs.p>
-
-#endif /* __KERNEL__ */
-
-#endif
+++ /dev/null
-/* check.c 23/01/95 03.38.30 */
-void check_page_tables (void);
-
-/* dir.c 22/06/95 00.22.12 */
-int dummy_dir_read ( struct file *filp,
- char *buf,
- size_t size,
- loff_t *count);
-char * umsdos_d_path(struct dentry *, char *, int);
-void umsdos_lookup_patch_new(struct dentry *, struct umsdos_info *);
-int umsdos_is_pseudodos (struct inode *dir, struct dentry *dentry);
-struct dentry *umsdos_lookup_x ( struct inode *dir, struct dentry *dentry, int nopseudo);
-struct dentry *UMSDOS_lookup(struct inode *, struct dentry *, struct nameidata *);
-struct dentry *umsdos_lookup_dentry(struct dentry *, char *, int, int);
-struct dentry *umsdos_covered(struct dentry *, char *, int);
-
-struct dentry *umsdos_solve_hlink (struct dentry *hlink);
-
-/* emd.c 22/06/95 00.22.04 */
-struct dentry *umsdos_get_emd_dentry(struct dentry *);
-int umsdos_have_emd(struct dentry *);
-int umsdos_make_emd(struct dentry *);
-int umsdos_emd_dir_readentry (struct dentry *, loff_t *, struct umsdos_dirent *);
-int umsdos_newentry (struct dentry *, struct umsdos_info *);
-int umsdos_newhidden (struct dentry *, struct umsdos_info *);
-int umsdos_delentry (struct dentry *, struct umsdos_info *, int);
-int umsdos_findentry (struct dentry *, struct umsdos_info *, int);
-int umsdos_isempty (struct dentry *);
-int umsdos_writeentry (struct dentry *, struct umsdos_info *, int);
-
-/* file.c 25/01/95 02.25.38 */
-
-/* inode.c 12/06/95 09.49.40 */
-void fill_new_filp (struct file *filp, struct dentry *dentry);
-void UMSDOS_read_inode (struct inode *);
-void UMSDOS_write_inode (struct inode *, int);
-int UMSDOS_notify_change (struct dentry *, struct iattr *attr);
-int umsdos_notify_change_locked(struct dentry *, struct iattr *attr);
-void UMSDOS_put_inode (struct inode *);
-int UMSDOS_statfs (struct super_block *, struct statfs *);
-struct super_block *UMSDOS_read_super (struct super_block *, void *, int);
-void UMSDOS_put_super (struct super_block *);
-
-void umsdos_setup_dir(struct dentry *);
-void umsdos_set_dirinfo_new(struct dentry *, off_t);
-void umsdos_patch_dentry_inode (struct dentry *, off_t);
-int umsdos_get_dirowner (struct inode *inode, struct inode **result);
-
-/* ioctl.c 22/06/95 00.22.08 */
-int UMSDOS_ioctl_dir (struct inode *dir,
- struct file *filp,
- unsigned int cmd,
- unsigned long data);
-
-/* mangle.c 25/01/95 02.25.38 */
-void umsdos_manglename (struct umsdos_info *info);
-int umsdos_evalrecsize (int len);
-int umsdos_parse (const char *name,int len, struct umsdos_info *info);
-
-/* namei.c 25/01/95 02.25.38 */
-void umsdos_lockcreate (struct inode *dir);
-void umsdos_startlookup (struct inode *dir);
-void umsdos_unlockcreate (struct inode *dir);
-void umsdos_endlookup (struct inode *dir);
-
-int umsdos_readlink_x ( struct dentry *dentry,
- char *buffer,
- int bufsiz);
-int UMSDOS_symlink (struct inode *dir,
- struct dentry *dentry,
- const char *symname);
-int UMSDOS_link (struct dentry *olddentry,
- struct inode *dir,
- struct dentry *dentry);
-int UMSDOS_create (struct inode *dir,
- struct dentry *dentry,
- int mode);
-
-int UMSDOS_mkdir (struct inode *dir,
- struct dentry *dentry,
- int mode);
-int UMSDOS_mknod (struct inode *dir,
- struct dentry *dentry,
- int mode,
- dev_t rdev);
-int UMSDOS_rmdir (struct inode *dir,struct dentry *dentry);
-int UMSDOS_unlink (struct inode *dir, struct dentry *dentry);
-int UMSDOS_rename (struct inode *old_dir,
- struct dentry *old_dentry,
- struct inode *new_dir,
- struct dentry *new_dentry);
-
-/* rdir.c 22/03/95 03.31.42 */
-struct dentry *umsdos_rlookup_x (struct inode *dir, struct dentry *dentry, int nopseudo);
-struct dentry *UMSDOS_rlookup (struct inode *dir, struct dentry *dentry, struct nameidata *nd);
-
-static inline struct umsdos_inode_info *UMSDOS_I(struct inode *inode)
-{
- return &inode->u.umsdos_i;
-}
+++ /dev/null
-#ifndef UMSDOS_FS_I_H
-#define UMSDOS_FS_I_H
-
-#ifndef _LINUX_TYPES_H
-#include <linux/types.h>
-#endif
-
-#include <linux/msdos_fs_i.h>
-#include <linux/pipe_fs_i.h>
-
-/* #Specification: strategy / in memory inode
- * Here is the information specific to the inode of the UMSDOS file
- * system. This information is added to the end of the standard struct
- * inode. Each file system has its own extension to struct inode,
- * so do the umsdos file system.
- *
- * The strategy is to have the umsdos_inode_info as a superset of
- * the msdos_inode_info, since most of the time the job is done
- * by the msdos fs code.
- *
- * So we duplicate the msdos_inode_info, and add our own info at the
- * end.
- *
- * The offset in this EMD file of the entry: pos
- *
- * For directory, we have dir_locking_info to help synchronise
- * file creation and file lookup. See also msdos_fs_i.h for more
- * information about msdos_inode_info.
- *
- * Special file and fifo do have an inode which correspond to an
- * empty MSDOS file.
- *
- * symlink are processed mostly like regular file. The content is the
- * link.
- *
- * The UMSDOS specific extension is placed after the union.
- */
-
-struct dir_locking_info {
- wait_queue_head_t p;
- short int looking; /* How many process doing a lookup */
- short int creating; /* Is there any creation going on here
- * Only one at a time, although one
- * may recursively lock, so it is a counter
- */
- long pid; /* pid of the process owning the creation
- * lock */
-};
-
-struct umsdos_inode_info {
- struct msdos_inode_info msdos_info;
- struct dir_locking_info dir_info;
- int i_patched; /* Inode has been patched */
- int i_is_hlink; /* Resolved hardlink inode? */
- off_t pos; /* Entry offset in the emd_owner file */
-};
-
-#endif
+++ /dev/null
-/*
- * Constant and architecture independent procedures
- * for NEC uPD4990A serial I/O real-time clock.
- *
- * Copyright 2001 TAKAI Kousuke <tak@kmc.kyoto-u.ac.jp>
- * Kyoto University Microcomputer Club (KMC).
- *
- * References:
- * uPD4990A serial I/O real-time clock users' manual (Japanese)
- * No. S12828JJ4V0UM00 (4th revision), NEC Corporation, 1999.
- */
-
-#ifndef _LINUX_uPD4990A_H
-#define _LINUX_uPD4990A_H
-
-#include <asm/byteorder.h>
-
-#include <asm/upd4990a.h>
-
-/* Serial commands (4 bits) */
-#define UPD4990A_REGISTER_HOLD (0x0)
-#define UPD4990A_REGISTER_SHIFT (0x1)
-#define UPD4990A_TIME_SET_AND_COUNTER_HOLD (0x2)
-#define UPD4990A_TIME_READ (0x3)
-#define UPD4990A_TP_64HZ (0x4)
-#define UPD4990A_TP_256HZ (0x5)
-#define UPD4990A_TP_2048HZ (0x6)
-#define UPD4990A_TP_4096HZ (0x7)
-#define UPD4990A_TP_1S (0x8)
-#define UPD4990A_TP_10S (0x9)
-#define UPD4990A_TP_30S (0xA)
-#define UPD4990A_TP_60S (0xB)
-#define UPD4990A_INTERRUPT_RESET (0xC)
-#define UPD4990A_INTERRUPT_TIMER_START (0xD)
-#define UPD4990A_INTERRUPT_TIMER_STOP (0xE)
-#define UPD4990A_TEST_MODE_SET (0xF)
-
-/* Parallel commands (3 bits)
- 0-6 are same with serial commands. */
-#define UPD4990A_PAR_SERIAL_MODE 7
-
-#ifndef UPD4990A_DELAY
-# include <linux/delay.h>
-# define UPD4990A_DELAY(usec) udelay((usec))
-#endif
-#ifndef UPD4990A_OUTPUT_DATA
-# define UPD4990A_OUTPUT_DATA(bit) \
- do { \
- UPD4990A_OUTPUT_DATA_CLK((bit), 0); \
- UPD4990A_DELAY(1); /* t-DSU */ \
- UPD4990A_OUTPUT_DATA_CLK((bit), 1); \
- UPD4990A_DELAY(1); /* t-DHLD */ \
- } while (0)
-#endif
-
-static __inline__ void upd4990a_serial_command(int command)
-{
- UPD4990A_OUTPUT_DATA(command >> 0);
- UPD4990A_OUTPUT_DATA(command >> 1);
- UPD4990A_OUTPUT_DATA(command >> 2);
- UPD4990A_OUTPUT_DATA(command >> 3);
- UPD4990A_DELAY(1); /* t-HLD */
- UPD4990A_OUTPUT_STROBE(1);
- UPD4990A_DELAY(1); /* t-STB & t-d1 */
- UPD4990A_OUTPUT_STROBE(0);
- /* 19 microseconds extra delay is needed
- iff previous mode is TIME READ command */
-}
-
-struct upd4990a_raw_data {
- u8 sec; /* BCD */
- u8 min; /* BCD */
- u8 hour; /* BCD */
- u8 mday; /* BCD */
-#if defined __LITTLE_ENDIAN_BITFIELD
- unsigned wday :4; /* 0-6 */
- unsigned mon :4; /* 1-based */
-#elif defined __BIG_ENDIAN_BITFIELD
- unsigned mon :4; /* 1-based */
- unsigned wday :4; /* 0-6 */
-#else
-# error Unknown bitfield endian!
-#endif
- u8 year; /* BCD */
-};
-
-static __inline__ void upd4990a_get_time(struct upd4990a_raw_data *buf,
- int leave_register_hold)
-{
- int byte;
-
- upd4990a_serial_command(UPD4990A_TIME_READ);
- upd4990a_serial_command(UPD4990A_REGISTER_SHIFT);
- UPD4990A_DELAY(19); /* t-d2 - t-d1 */
-
- for (byte = 0; byte < 6; byte++) {
- u8 tmp;
- int bit;
-
- for (tmp = 0, bit = 0; bit < 8; bit++) {
- tmp = (tmp | (UPD4990A_READ_DATA() << 8)) >> 1;
- UPD4990A_OUTPUT_CLK(1);
- UPD4990A_DELAY(1);
- UPD4990A_OUTPUT_CLK(0);
- UPD4990A_DELAY(1);
- }
- ((u8 *) buf)[byte] = tmp;
- }
-
- /* The uPD4990A users' manual says that we should issue `Register
- Hold' command after each data retrieval, or next `Time Read'
- command may not work correctly. */
- if (!leave_register_hold)
- upd4990a_serial_command(UPD4990A_REGISTER_HOLD);
-}
-
-static __inline__ void upd4990a_set_time(const struct upd4990a_raw_data *data,
- int time_set_only)
-{
- int byte;
-
- if (!time_set_only)
- upd4990a_serial_command(UPD4990A_REGISTER_SHIFT);
-
- for (byte = 0; byte < 6; byte++) {
- int bit;
- u8 tmp = ((const u8 *) data)[byte];
-
- for (bit = 0; bit < 8; bit++, tmp >>= 1)
- UPD4990A_OUTPUT_DATA(tmp);
- }
-
- upd4990a_serial_command(UPD4990A_TIME_SET_AND_COUNTER_HOLD);
-
- /* Release counter hold and start the clock. */
- if (!time_set_only)
- upd4990a_serial_command(UPD4990A_REGISTER_HOLD);
-}
-
-#endif /* _LINUX_uPD4990A_H */
+++ /dev/null
-/*
- * ftl.h 1.8 2000/06/12 21:55:40
- *
- * The contents of this file are subject to the Mozilla Public License
- * Version 1.1 (the "License"); you may not use this file except in
- * compliance with the License. You may obtain a copy of the License
- * at http://www.mozilla.org/MPL/
- *
- * Software distributed under the License is distributed on an "AS IS"
- * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
- * the License for the specific language governing rights and
- * limitations under the License.
- *
- * The initial developer of the original code is David A. Hinds
- * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
- * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
- *
- * Alternatively, the contents of this file may be used under the
- * terms of the GNU General Public License version 2 (the "GPL"), in which
- * case the provisions of the GPL are applicable instead of the
- * above. If you wish to allow the use of your version of this file
- * only under the terms of the GPL and not to allow others to use
- * your version of this file under the MPL, indicate your decision by
- * deleting the provisions above and replace them with the notice and
- * other provisions required by the GPL. If you do not delete the
- * provisions above, a recipient may use your version of this file
- * under either the MPL or the GPL.
- */
-
-#ifndef _LINUX_FTL_H
-#define _LINUX_FTL_H
-
-typedef struct erase_unit_header_t {
- u_char LinkTargetTuple[5];
- u_char DataOrgTuple[10];
- u_char NumTransferUnits;
- u_int EraseCount;
- u_short LogicalEUN;
- u_char BlockSize;
- u_char EraseUnitSize;
- u_short FirstPhysicalEUN;
- u_short NumEraseUnits;
- u_int FormattedSize;
- u_int FirstVMAddress;
- u_short NumVMPages;
- u_char Flags;
- u_char Code;
- u_int SerialNumber;
- u_int AltEUHOffset;
- u_int BAMOffset;
- u_char Reserved[12];
- u_char EndTuple[2];
-} erase_unit_header_t;
-
-/* Flags in erase_unit_header_t */
-#define HIDDEN_AREA 0x01
-#define REVERSE_POLARITY 0x02
-#define DOUBLE_BAI 0x04
-
-/* Definitions for block allocation information */
-
-#define BLOCK_FREE(b) ((b) == 0xffffffff)
-#define BLOCK_DELETED(b) (((b) == 0) || ((b) == 0xfffffffe))
-
-#define BLOCK_TYPE(b) ((b) & 0x7f)
-#define BLOCK_ADDRESS(b) ((b) & ~0x7f)
-#define BLOCK_NUMBER(b) ((b) >> 9)
-#define BLOCK_CONTROL 0x30
-#define BLOCK_DATA 0x40
-#define BLOCK_REPLACEMENT 0x60
-#define BLOCK_BAD 0x70
-
-#endif /* _LINUX_FTL_H */
+++ /dev/null
-/*
- * memory.h 1.7 2000/06/12 21:55:40
- *
- * The contents of this file are subject to the Mozilla Public License
- * Version 1.1 (the "License"); you may not use this file except in
- * compliance with the License. You may obtain a copy of the License
- * at http://www.mozilla.org/MPL/
- *
- * Software distributed under the License is distributed on an "AS IS"
- * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
- * the License for the specific language governing rights and
- * limitations under the License.
- *
- * The initial developer of the original code is David A. Hinds
- * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
- * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
- *
- * Alternatively, the contents of this file may be used under the
- * terms of the GNU General Public License version 2 (the "GPL"), in which
- * case the provisions of the GPL are applicable instead of the
- * above. If you wish to allow the use of your version of this file
- * only under the terms of the GPL and not to allow others to use
- * your version of this file under the MPL, indicate your decision by
- * deleting the provisions above and replace them with the notice and
- * other provisions required by the GPL. If you do not delete the
- * provisions above, a recipient may use your version of this file
- * under either the MPL or the GPL.
- */
-
-#ifndef _LINUX_MEMORY_H
-#define _LINUX_MEMORY_H
-
-typedef struct erase_info_t {
- u_long Offset;
- u_long Size;
-} erase_info_t;
-
-#define MEMGETINFO _IOR('M', 1, region_info_t)
-#define MEMERASE _IOW('M', 2, erase_info_t)
-
-#endif /* _LINUX_MEMORY_H */
+++ /dev/null
-#ifndef __SOUND_SNDMAGIC_H
-#define __SOUND_SNDMAGIC_H
-
-/*
- * Magic allocation, deallocation, check
- * Copyright (c) 2000 by Abramo Bagnara <abramo@alsa-project.org>
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-
-#ifdef CONFIG_SND_DEBUG_MEMORY
-
-void *_snd_magic_kcalloc(unsigned long magic, size_t size, int flags);
-void *_snd_magic_kmalloc(unsigned long magic, size_t size, int flags);
-
-/**
- * snd_magic_kmalloc - allocate a record with a magic-prefix
- * @type: the type to allocate a record (like xxx_t)
- * @extra: the extra size to allocate in bytes
- * @flags: the allocation condition (GFP_XXX)
- *
- * Allocates a record of the given type with the extra space and
- * returns its pointer. The allocated record has a secret magic-key
- * to be checked via snd_magic_cast() for safe casts.
- *
- * The allocated pointer must be released via snd_magic_kfree().
- *
- * The "struct xxx" style cannot be used as the type argument
- * because the magic-key constant is generated from the type-name
- * string.
- */
-#define snd_magic_kmalloc(type, extra, flags) \
- (type *) _snd_magic_kmalloc(type##_magic, sizeof(type) + extra, flags)
-/**
- * snd_magic_kcalloc - allocate a record with a magic-prefix and initialize
- * @type: the type to allocate a record (like xxx_t)
- * @extra: the extra size to allocate in bytes
- * @flags: the allocation condition (GFP_XXX)
- *
- * Works like snd_magic_kmalloc() but this clears the area with zero
- * automatically.
- */
-#define snd_magic_kcalloc(type, extra, flags) \
- (type *) _snd_magic_kcalloc(type##_magic, sizeof(type) + extra, flags)
-
-/**
- * snd_magic_kfree - release the allocated area
- * @ptr: the pointer allocated via snd_magic_kmalloc() or snd_magic_kcalloc()
- *
- * Releases the memory area allocated via snd_magic_kmalloc() or
- * snd_magic_kcalloc() function.
- */
-void snd_magic_kfree(void *ptr);
-
-static inline unsigned long _snd_magic_value(void *obj)
-{
- return obj == NULL ? (unsigned long)-1 : *(((unsigned long *)obj) - 1);
-}
-
-static inline int _snd_magic_bad(void *obj, unsigned long magic)
-{
- return _snd_magic_value(obj) != magic;
-}
-
-#define snd_magic_cast1(t, expr, cmd) snd_magic_cast(t, expr, cmd)
-
-/**
- * snd_magic_cast - check and cast the magic-allocated pointer
- * @type: the type of record to cast
- * @ptr: the magic-allocated pointer
- * @action...: the action to do if failed
- *
- * This macro provides a safe cast for the given type, which was
- * allocated via snd_magic_kmalloc() or snd_magic_kcallc().
- * If the pointer is invalid, i.e. the cast-type doesn't match,
- * the action arguments are called with a debug message.
- */
-#define snd_magic_cast(type, ptr, action...) \
- (type *) ({\
- void *__ptr = ptr;\
- unsigned long __magic = _snd_magic_value(__ptr);\
- if (__magic != type##_magic) {\
- snd_printk("bad MAGIC (0x%lx)\n", __magic);\
- action;\
- }\
- __ptr;\
-})
-
-#define snd_device_t_magic 0xa15a00ff
-#define snd_pcm_t_magic 0xa15a0101
-#define snd_pcm_file_t_magic 0xa15a0102
-#define snd_pcm_substream_t_magic 0xa15a0103
-#define snd_pcm_proc_private_t_magic 0xa15a0104
-#define snd_pcm_oss_file_t_magic 0xa15a0105
-#define snd_mixer_oss_t_magic 0xa15a0106
-// #define snd_pcm_sgbuf_t_magic 0xa15a0107
-
-#define snd_info_private_data_t_magic 0xa15a0201
-#define snd_info_entry_t_magic 0xa15a0202
-#define snd_ctl_file_t_magic 0xa15a0301
-#define snd_kcontrol_t_magic 0xa15a0302
-#define snd_rawmidi_t_magic 0xa15a0401
-#define snd_rawmidi_file_t_magic 0xa15a0402
-#define snd_virmidi_t_magic 0xa15a0403
-#define snd_virmidi_dev_t_magic 0xa15a0404
-#define snd_timer_t_magic 0xa15a0501
-#define snd_timer_user_t_magic 0xa15a0502
-#define snd_hwdep_t_magic 0xa15a0601
-#define snd_seq_device_t_magic 0xa15a0701
-
-#define es18xx_t_magic 0xa15a1101
-#define trident_t_magic 0xa15a1201
-#define es1938_t_magic 0xa15a1301
-#define cs46xx_t_magic 0xa15a1401
-#define cs46xx_pcm_t_magic 0xa15a1402
-#define ensoniq_t_magic 0xa15a1501
-#define sonicvibes_t_magic 0xa15a1601
-#define mpu401_t_magic 0xa15a1701
-#define fm801_t_magic 0xa15a1801
-#define ac97_t_magic 0xa15a1901
-#define ac97_bus_t_magic 0xa15a1902
-#define ak4531_t_magic 0xa15a1a01
-#define snd_uart16550_t_magic 0xa15a1b01
-#define emu10k1_t_magic 0xa15a1c01
-#define emu10k1_pcm_t_magic 0xa15a1c02
-#define emu10k1_midi_t_magic 0xa15a1c03
-#define snd_gus_card_t_magic 0xa15a1d01
-#define gus_pcm_private_t_magic 0xa15a1d02
-#define gus_proc_private_t_magic 0xa15a1d03
-#define tea6330t_t_magic 0xa15a1e01
-#define ad1848_t_magic 0xa15a1f01
-#define cs4231_t_magic 0xa15a2001
-#define es1688_t_magic 0xa15a2101
-#define opti93x_t_magic 0xa15a2201
-#define emu8000_t_magic 0xa15a2301
-#define emu8000_proc_private_t_magic 0xa15a2302
-#define snd_emux_t_magic 0xa15a2303
-#define snd_emux_port_t_magic 0xa15a2304
-#define sb_t_magic 0xa15a2401
-#define snd_sb_csp_t_magic 0xa15a2402
-#define snd_card_dummy_t_magic 0xa15a2501
-#define snd_card_dummy_pcm_t_magic 0xa15a2502
-#define opl3_t_magic 0xa15a2601
-#define opl4_t_magic 0xa15a2602
-#define snd_seq_dummy_port_t_magic 0xa15a2701
-#define ice1712_t_magic 0xa15a2801
-#define ad1816a_t_magic 0xa15a2901
-#define intel8x0_t_magic 0xa15a2a01
-#define es1968_t_magic 0xa15a2b01
-#define esschan_t_magic 0xa15a2b02
-#define via82xx_t_magic 0xa15a2c01
-#define pdplus_t_magic 0xa15a2d01
-#define cmipci_t_magic 0xa15a2e01
-#define ymfpci_t_magic 0xa15a2f01
-#define ymfpci_pcm_t_magic 0xa15a2f02
-#define cs4281_t_magic 0xa15a3001
-#define snd_i2c_bus_t_magic 0xa15a3101
-#define snd_i2c_device_t_magic 0xa15a3102
-#define cs8427_t_magic 0xa15a3111
-#define m3_t_magic 0xa15a3201
-#define m3_dma_t_magic 0xa15a3202
-#define nm256_t_magic 0xa15a3301
-#define nm256_dma_t_magic 0xa15a3302
-#define sam9407_t_magic 0xa15a3401
-#define pmac_t_magic 0xa15a3501
-#define ali_t_magic 0xa15a3601
-#define mtpav_t_magic 0xa15a3701
-#define mtpav_port_t_magic 0xa15a3702
-#define korg1212_t_magic 0xa15a3800
-#define opl3sa2_t_magic 0xa15a3900
-#define serialmidi_t_magic 0xa15a3a00
-#define sa11xx_uda1341_t_magic 0xa15a3b00
-#define uda1341_t_magic 0xa15a3c00
-#define l3_client_t_magic 0xa15a3d00
-#define snd_usb_audio_t_magic 0xa15a3e01
-#define usb_mixer_elem_info_t_magic 0xa15a3e02
-#define snd_usb_stream_t_magic 0xa15a3e03
-#define snd_usb_midi_t_magic 0xa15a3f01
-#define snd_usb_midi_out_endpoint_t_magic 0xa15a3f02
-#define snd_usb_midi_in_endpoint_t_magic 0xa15a3f03
-#define ak4117_t_magic 0xa15a4000
-#define psic_t_magic 0xa15a4100
-#define vx_core_t_magic 0xa15a4110
-#define vx_pipe_t_magic 0xa15a4112
-#define azf3328_t_magic 0xa15a4200
-#define snd_card_harmony_t_magic 0xa15a4300
-#define bt87x_t_magic 0xa15a4400
-#define pdacf_t_magic 0xa15a4500
-#define vortex_t_magic 0xa15a4601
-#define atiixp_t_magic 0xa15a4701
-#define amd7930_t_magic 0xa15a4801
-
-#else
-
-#define snd_magic_kcalloc(type, extra, flags) (type *) snd_kcalloc(sizeof(type) + extra, flags)
-#define snd_magic_kmalloc(type, extra, flags) (type *) kmalloc(sizeof(type) + extra, flags)
-#define snd_magic_cast(type, ptr, retval) (type *) ptr
-#define snd_magic_cast1(type, ptr, retval) snd_magic_cast(type, ptr, retval)
-#define snd_magic_kfree kfree
-
-#endif
-
-#endif /* __SOUND_SNDMAGIC_H */
+++ /dev/null
-/*
- * Onboard memory management
- */
-
-struct SNDRV_STRU_BANK_INFO {
- unsigned int address;
- unsigned int size;
-};
+++ /dev/null
-/*
- * kernel/power/pmdisk.c - Suspend-to-disk implmentation
- *
- * This STD implementation is initially derived from swsusp (suspend-to-swap).
- * The original copyright on that was:
- *
- * Copyright (C) 1998-2001 Gabor Kuti <seasons@fornax.hu>
- * Copyright (C) 1998,2001,2002 Pavel Machek <pavel@suse.cz>
- *
- * The additional parts are:
- *
- * Copyright (C) 2003 Patrick Mochel
- * Copyright (C) 2003 Open Source Development Lab
- *
- * This file is released under the GPLv2.
- *
- * For more information, please see the text files in Documentation/power/
- *
- */
-
-#undef DEBUG
-
-#include <linux/mm.h>
-#include <linux/bio.h>
-#include <linux/suspend.h>
-#include <linux/version.h>
-#include <linux/reboot.h>
-#include <linux/device.h>
-#include <linux/swapops.h>
-#include <linux/bootmem.h>
-#include <linux/utsname.h>
-
-#include <asm/mmu_context.h>
-
-#include "power.h"
-
-
-extern asmlinkage int pmdisk_arch_suspend(int resume);
-
-#define __ADDRESS(x) ((unsigned long) phys_to_virt(x))
-#define ADDRESS(x) __ADDRESS((x) << PAGE_SHIFT)
-#define ADDRESS2(x) __ADDRESS(__pa(x)) /* Needed for x86-64 where some pages are in memory twice */
-
-/* References to section boundaries */
-extern char __nosave_begin, __nosave_end;
-
-extern int is_head_of_free_region(struct page *);
-
-/* Variables to be preserved over suspend */
-static int pagedir_order_check;
-static int nr_copy_pages_check;
-
-/* For resume= kernel option */
-static char resume_file[256] = CONFIG_PM_DISK_PARTITION;
-
-static dev_t resume_device;
-/* Local variables that should not be affected by save */
-unsigned int pmdisk_pages __nosavedata = 0;
-
-/* Suspend pagedir is allocated before final copy, therefore it
- must be freed after resume
-
- Warning: this is evil. There are actually two pagedirs at time of
- resume. One is "pagedir_save", which is empty frame allocated at
- time of suspend, that must be freed. Second is "pagedir_nosave",
- allocated at time of resume, that travels through memory not to
- collide with anything.
- */
-suspend_pagedir_t *pm_pagedir_nosave __nosavedata = NULL;
-static suspend_pagedir_t *pagedir_save;
-static int pagedir_order __nosavedata = 0;
-
-
-struct pmdisk_info {
- struct new_utsname uts;
- u32 version_code;
- unsigned long num_physpages;
- int cpus;
- unsigned long image_pages;
- unsigned long pagedir_pages;
- swp_entry_t pagedir[768];
-} __attribute__((aligned(PAGE_SIZE))) pmdisk_info;
-
-
-
-#define PMDISK_SIG "pmdisk-swap1"
-
-struct pmdisk_header {
- char reserved[PAGE_SIZE - 20 - sizeof(swp_entry_t)];
- swp_entry_t pmdisk_info;
- char orig_sig[10];
- char sig[10];
-} __attribute__((packed, aligned(PAGE_SIZE))) pmdisk_header;
-
-/*
- * XXX: We try to keep some more pages free so that I/O operations succeed
- * without paging. Might this be more?
- */
-#define PAGES_FOR_IO 512
-
-
-/*
- * Saving part...
- */
-
-
-/* We memorize in swapfile_used what swap devices are used for suspension */
-#define SWAPFILE_UNUSED 0
-#define SWAPFILE_SUSPEND 1 /* This is the suspending device */
-#define SWAPFILE_IGNORED 2 /* Those are other swap devices ignored for suspension */
-
-static unsigned short swapfile_used[MAX_SWAPFILES];
-static unsigned short root_swap;
-
-
-static int mark_swapfiles(swp_entry_t prev)
-{
- int error;
-
- rw_swap_page_sync(READ,
- swp_entry(root_swap, 0),
- virt_to_page((unsigned long)&pmdisk_header));
- if (!memcmp("SWAP-SPACE",pmdisk_header.sig,10) ||
- !memcmp("SWAPSPACE2",pmdisk_header.sig,10)) {
- memcpy(pmdisk_header.orig_sig,pmdisk_header.sig,10);
- memcpy(pmdisk_header.sig,PMDISK_SIG,10);
- pmdisk_header.pmdisk_info = prev;
- error = rw_swap_page_sync(WRITE,
- swp_entry(root_swap, 0),
- virt_to_page((unsigned long)
- &pmdisk_header));
- } else {
- pr_debug("pmdisk: Partition is not swap space.\n");
- error = -ENODEV;
- }
- return error;
-}
-
-static int read_swapfiles(void) /* This is called before saving image */
-{
- int i, len;
-
- len=strlen(resume_file);
- root_swap = 0xFFFF;
-
- swap_list_lock();
- for(i=0; i<MAX_SWAPFILES; i++) {
- if (swap_info[i].flags == 0) {
- swapfile_used[i]=SWAPFILE_UNUSED;
- } else {
- if(!len) {
- pr_debug("pmdisk: Default resume partition not set.\n");
- if(root_swap == 0xFFFF) {
- swapfile_used[i] = SWAPFILE_SUSPEND;
- root_swap = i;
- } else
- swapfile_used[i] = SWAPFILE_IGNORED;
- } else {
- /* we ignore all swap devices that are not the resume_file */
- if (1) {
-// FIXME if(resume_device == swap_info[i].swap_device) {
- swapfile_used[i] = SWAPFILE_SUSPEND;
- root_swap = i;
- } else
- swapfile_used[i] = SWAPFILE_IGNORED;
- }
- }
- }
- swap_list_unlock();
- return (root_swap != 0xffff) ? 0 : -ENODEV;
-}
-
-
-/* This is called after saving image so modification
- will be lost after resume... and that's what we want. */
-static void lock_swapdevices(void)
-{
- int i;
-
- swap_list_lock();
- for(i = 0; i< MAX_SWAPFILES; i++)
- if(swapfile_used[i] == SWAPFILE_IGNORED) {
- swap_info[i].flags ^= 0xFF; /* we make the device unusable. A new call to
- lock_swapdevices can unlock the devices. */
- }
- swap_list_unlock();
-}
-
-
-
-/**
- * write_swap_page - Write one page to a fresh swap location.
- * @addr: Address we're writing.
- * @loc: Place to store the entry we used.
- *
- * Allocate a new swap entry and 'sync' it. Note we discard -EIO
- * errors. That is an artifact left over from swsusp. It did not
- * check the return of rw_swap_page_sync() at all, since most pages
- * written back to swap would return -EIO.
- * This is a partial improvement, since we will at least return other
- * errors, though we need to eventually fix the damn code.
- */
-
-static int write_swap_page(unsigned long addr, swp_entry_t * loc)
-{
- swp_entry_t entry;
- int error = 0;
-
- entry = get_swap_page();
- if (swp_offset(entry) &&
- swapfile_used[swp_type(entry)] == SWAPFILE_SUSPEND) {
- error = rw_swap_page_sync(WRITE, entry,
- virt_to_page(addr));
- if (error == -EIO)
- error = 0;
- if (!error)
- *loc = entry;
- } else
- error = -ENOSPC;
- return error;
-}
-
-
-/**
- * free_data - Free the swap entries used by the saved image.
- *
- * Walk the list of used swap entries and free each one.
- */
-
-static void free_data(void)
-{
- swp_entry_t entry;
- int i;
-
- for (i = 0; i < pmdisk_pages; i++) {
- entry = (pm_pagedir_nosave + i)->swap_address;
- if (entry.val)
- swap_free(entry);
- else
- break;
- (pm_pagedir_nosave + i)->swap_address = (swp_entry_t){0};
- }
-}
-
-
-/**
- * write_data - Write saved image to swap.
- *
- * Walk the list of pages in the image and sync each one to swap.
- */
-
-static int write_data(void)
-{
- int error = 0;
- int i;
-
- printk( "Writing data to swap (%d pages): ", pmdisk_pages );
- for (i = 0; i < pmdisk_pages && !error; i++) {
- if (!(i%100))
- printk( "." );
- error = write_swap_page((pm_pagedir_nosave+i)->address,
- &((pm_pagedir_nosave+i)->swap_address));
- }
- printk(" %d Pages done.\n",i);
- return error;
-}
-
-
-/**
- * free_pagedir - Free pages used by the page directory.
- */
-
-static void free_pagedir_entries(void)
-{
- int num = pmdisk_info.pagedir_pages;
- int i;
-
- for (i = 0; i < num; i++)
- swap_free(pmdisk_info.pagedir[i]);
-}
-
-
-/**
- * write_pagedir - Write the array of pages holding the page directory.
- * @last: Last swap entry we write (needed for header).
- */
-
-static int write_pagedir(void)
-{
- unsigned long addr = (unsigned long)pm_pagedir_nosave;
- int error = 0;
- int n = SUSPEND_PD_PAGES(pmdisk_pages);
- int i;
-
- pmdisk_info.pagedir_pages = n;
- printk( "Writing pagedir (%d pages)\n", n);
- for (i = 0; i < n && !error; i++, addr += PAGE_SIZE)
- error = write_swap_page(addr,&pmdisk_info.pagedir[i]);
- return error;
-}
-
-
-#ifdef DEBUG
-static void dump_pmdisk_info(void)
-{
- printk(" pmdisk: Version: %u\n",pmdisk_info.version_code);
- printk(" pmdisk: Num Pages: %ld\n",pmdisk_info.num_physpages);
- printk(" pmdisk: UTS Sys: %s\n",pmdisk_info.uts.sysname);
- printk(" pmdisk: UTS Node: %s\n",pmdisk_info.uts.nodename);
- printk(" pmdisk: UTS Release: %s\n",pmdisk_info.uts.release);
- printk(" pmdisk: UTS Version: %s\n",pmdisk_info.uts.version);
- printk(" pmdisk: UTS Machine: %s\n",pmdisk_info.uts.machine);
- printk(" pmdisk: UTS Domain: %s\n",pmdisk_info.uts.domainname);
- printk(" pmdisk: CPUs: %d\n",pmdisk_info.cpus);
- printk(" pmdisk: Image: %ld Pages\n",pmdisk_info.image_pages);
- printk(" pmdisk: Pagedir: %ld Pages\n",pmdisk_info.pagedir_pages);
-}
-#else
-static void dump_pmdisk_info(void)
-{
-
-}
-#endif
-
-static void init_header(void)
-{
- memset(&pmdisk_info,0,sizeof(pmdisk_info));
- pmdisk_info.version_code = LINUX_VERSION_CODE;
- pmdisk_info.num_physpages = num_physpages;
- memcpy(&pmdisk_info.uts,&system_utsname,sizeof(system_utsname));
-
- pmdisk_info.cpus = num_online_cpus();
- pmdisk_info.image_pages = pmdisk_pages;
-}
-
-/**
- * write_header - Fill and write the suspend header.
- * @entry: Location of the last swap entry used.
- *
- * Allocate a page, fill header, write header.
- *
- * @entry is the location of the last pagedir entry written on
- * entrance. On exit, it contains the location of the header.
- */
-
-static int write_header(swp_entry_t * entry)
-{
- dump_pmdisk_info();
- return write_swap_page((unsigned long)&pmdisk_info,entry);
-}
-
-
-
-/**
- * write_suspend_image - Write entire image and metadata.
- *
- */
-
-static int write_suspend_image(void)
-{
- int error;
- swp_entry_t prev = { 0 };
-
- init_header();
-
- if ((error = write_data()))
- goto FreeData;
-
- if ((error = write_pagedir()))
- goto FreePagedir;
-
- if ((error = write_header(&prev)))
- goto FreePagedir;
-
- error = mark_swapfiles(prev);
- Done:
- return error;
- FreePagedir:
- free_pagedir_entries();
- FreeData:
- free_data();
- goto Done;
-}
-
-
-
-/**
- * saveable - Determine whether a page should be cloned or not.
- * @pfn: The page
- *
- * We save a page if it's Reserved, and not in the range of pages
- * statically defined as 'unsaveable', or if it isn't reserved, and
- * isn't part of a free chunk of pages.
- * If it is part of a free chunk, we update @pfn to point to the last
- * page of the chunk.
- */
-
-static int saveable(unsigned long * pfn)
-{
- struct page * page = pfn_to_page(*pfn);
-
- if (PageNosave(page))
- return 0;
-
- if (!PageReserved(page)) {
- int chunk_size;
-
- if ((chunk_size = is_head_of_free_region(page))) {
- *pfn += chunk_size - 1;
- return 0;
- }
- } else if (PageReserved(page)) {
- /* Just copy whole code segment.
- * Hopefully it is not that big.
- */
- if ((ADDRESS(*pfn) >= (unsigned long) ADDRESS2(&__nosave_begin)) &&
- (ADDRESS(*pfn) < (unsigned long) ADDRESS2(&__nosave_end))) {
- pr_debug("[nosave %lx]\n", ADDRESS(*pfn));
- return 0;
- }
- /* Hmm, perhaps copying all reserved pages is not
- * too healthy as they may contain
- * critical bios data?
- */
- }
- return 1;
-}
-
-
-
-/**
- * count_pages - Determine size of page directory.
- *
- * Iterate over all the pages in the system and tally the number
- * we need to clone.
- */
-
-static void count_pages(void)
-{
- unsigned long pfn;
- int n = 0;
-
- for (pfn = 0; pfn < max_pfn; pfn++) {
- if (saveable(&pfn))
- n++;
- }
- pmdisk_pages = n;
-}
-
-
-/**
- * copy_pages - Atomically snapshot memory.
- *
- * Iterate over all the pages in the system and copy each one
- * into its corresponding location in the pagedir.
- * We rely on the fact that the number of pages that we're snap-
- * shotting hasn't changed since we counted them.
- */
-
-static void copy_pages(void)
-{
- struct pbe * p = pagedir_save;
- unsigned long pfn;
- int n = 0;
-
- for (pfn = 0; pfn < max_pfn; pfn++) {
- if (saveable(&pfn)) {
- n++;
- p->orig_address = ADDRESS(pfn);
- copy_page((void *) p->address,
- (void *) p->orig_address);
- p++;
- }
- }
- BUG_ON(n != pmdisk_pages);
-}
-
-
-/**
- * free_image_pages - Free each page allocated for snapshot.
- */
-
-static void free_image_pages(void)
-{
- struct pbe * p;
- int i;
-
- for (i = 0, p = pagedir_save; i < pmdisk_pages; i++, p++) {
- ClearPageNosave(virt_to_page(p->address));
- free_page(p->address);
- }
-}
-
-
-/**
- * free_pagedir - Free the page directory.
- */
-
-static void free_pagedir(void)
-{
- free_image_pages();
- free_pages((unsigned long)pagedir_save, pagedir_order);
-}
-
-
-static void calc_order(void)
-{
- int diff;
- int order;
-
- order = get_bitmask_order(SUSPEND_PD_PAGES(pmdisk_pages));
- pmdisk_pages += 1 << order;
- do {
- diff = get_bitmask_order(SUSPEND_PD_PAGES(pmdisk_pages)) - order;
- if (diff) {
- order += diff;
- pmdisk_pages += 1 << diff;
- }
- } while(diff);
- pagedir_order = order;
-}
-
-
-/**
- * alloc_pagedir - Allocate the page directory.
- *
- * First, determine exactly how many contiguous pages we need,
- * allocate them, then mark each 'unsavable'.
- */
-
-static int alloc_pagedir(void)
-{
- calc_order();
- pagedir_save = (suspend_pagedir_t *)__get_free_pages(GFP_ATOMIC | __GFP_COLD,
- pagedir_order);
- if(!pagedir_save)
- return -ENOMEM;
- memset(pagedir_save,0,(1 << pagedir_order) * PAGE_SIZE);
- pm_pagedir_nosave = pagedir_save;
- return 0;
-}
-
-
-/**
- * alloc_image_pages - Allocate pages for the snapshot.
- *
- */
-
-static int alloc_image_pages(void)
-{
- struct pbe * p;
- int i;
-
- for (i = 0, p = pagedir_save; i < pmdisk_pages; i++, p++) {
- p->address = get_zeroed_page(GFP_ATOMIC | __GFP_COLD);
- if(!p->address)
- goto Error;
- SetPageNosave(virt_to_page(p->address));
- }
- return 0;
- Error:
- do {
- if (p->address)
- free_page(p->address);
- p->address = 0;
- } while (p-- > pagedir_save);
- return -ENOMEM;
-}
-
-
-/**
- * enough_free_mem - Make sure we enough free memory to snapshot.
- *
- * Returns TRUE or FALSE after checking the number of available
- * free pages.
- */
-
-static int enough_free_mem(void)
-{
- if(nr_free_pages() < (pmdisk_pages + PAGES_FOR_IO)) {
- pr_debug("pmdisk: Not enough free pages: Have %d\n",
- nr_free_pages());
- return 0;
- }
- return 1;
-}
-
-
-/**
- * enough_swap - Make sure we have enough swap to save the image.
- *
- * Returns TRUE or FALSE after checking the total amount of swap
- * space avaiable.
- *
- * FIXME: si_swapinfo(&i) returns all swap devices information.
- * We should only consider resume_device.
- */
-
-static int enough_swap(void)
-{
- struct sysinfo i;
-
- si_swapinfo(&i);
- if (i.freeswap < (pmdisk_pages + PAGES_FOR_IO)) {
- pr_debug("pmdisk: Not enough swap. Need %ld\n",i.freeswap);
- return 0;
- }
- return 1;
-}
-
-
-/**
- * pmdisk_suspend - Atomically snapshot the system.
- *
- * This must be called with interrupts disabled, to prevent the
- * system changing at all from underneath us.
- *
- * To do this, we count the number of pages in the system that we
- * need to save; make sure we have enough memory and swap to clone
- * the pages and save them in swap, allocate the space to hold them,
- * and then snapshot them all.
- */
-
-int pmdisk_suspend(void)
-{
- int error = 0;
-
- if ((error = read_swapfiles()))
- return error;
-
- drain_local_pages();
-
- pm_pagedir_nosave = NULL;
- pr_debug("pmdisk: Counting pages to copy.\n" );
- count_pages();
-
- pr_debug("pmdisk: (pages needed: %d + %d free: %d)\n",
- pmdisk_pages,PAGES_FOR_IO,nr_free_pages());
-
- if (!enough_free_mem())
- return -ENOMEM;
-
- if (!enough_swap())
- return -ENOSPC;
-
- if ((error = alloc_pagedir())) {
- pr_debug("pmdisk: Allocating pagedir failed.\n");
- return error;
- }
- if ((error = alloc_image_pages())) {
- pr_debug("pmdisk: Allocating image pages failed.\n");
- free_pagedir();
- return error;
- }
-
- nr_copy_pages_check = pmdisk_pages;
- pagedir_order_check = pagedir_order;
-
- /* During allocating of suspend pagedir, new cold pages may appear.
- * Kill them
- */
- drain_local_pages();
-
- /* copy */
- copy_pages();
-
- /*
- * End of critical section. From now on, we can write to memory,
- * but we should not touch disk. This specially means we must _not_
- * touch swap space! Except we must write out our image of course.
- */
-
- pr_debug("pmdisk: %d pages copied\n", pmdisk_pages );
- return 0;
-}
-
-
-/**
- * suspend_save_image - Prepare and write saved image to swap.
- *
- * IRQs are re-enabled here so we can resume devices and safely write
- * to the swap devices. We disable them again before we leave.
- *
- * The second lock_swapdevices() will unlock ignored swap devices since
- * writing is finished.
- * It is important _NOT_ to umount filesystems at this point. We want
- * them synced (in case something goes wrong) but we DO not want to mark
- * filesystem clean: it is not. (And it does not matter, if we resume
- * correctly, we'll mark system clean, anyway.)
- */
-
-static int suspend_save_image(void)
-{
- int error;
- device_resume();
- lock_swapdevices();
- error = write_suspend_image();
- lock_swapdevices();
- return error;
-}
-
-/*
- * Magic happens here
- */
-
-int pmdisk_resume(void)
-{
- BUG_ON (nr_copy_pages_check != pmdisk_pages);
- BUG_ON (pagedir_order_check != pagedir_order);
-
- /* Even mappings of "global" things (vmalloc) need to be fixed */
- __flush_tlb_global();
- return 0;
-}
-
-/* pmdisk_arch_suspend() is implemented in arch/?/power/pmdisk.S,
- and basically does:
-
- if (!resume) {
- save_processor_state();
- SAVE_REGISTERS
- return pmdisk_suspend();
- }
- GO_TO_SWAPPER_PAGE_TABLES
- COPY_PAGES_BACK
- RESTORE_REGISTERS
- restore_processor_state();
- return pmdisk_resume();
-
- */
-
-
-/* More restore stuff */
-
-#define does_collide(addr) does_collide_order(pm_pagedir_nosave, addr, 0)
-
-/*
- * Returns true if given address/order collides with any orig_address
- */
-static int __init does_collide_order(suspend_pagedir_t *pagedir,
- unsigned long addr, int order)
-{
- int i;
- unsigned long addre = addr + (PAGE_SIZE<<order);
-
- for(i=0; i < pmdisk_pages; i++)
- if((pagedir+i)->orig_address >= addr &&
- (pagedir+i)->orig_address < addre)
- return 1;
-
- return 0;
-}
-
-/*
- * We check here that pagedir & pages it points to won't collide with pages
- * where we're going to restore from the loaded pages later
- */
-static int __init check_pagedir(void)
-{
- int i;
-
- for(i=0; i < pmdisk_pages; i++) {
- unsigned long addr;
-
- do {
- addr = get_zeroed_page(GFP_ATOMIC);
- if(!addr)
- return -ENOMEM;
- } while (does_collide(addr));
-
- (pm_pagedir_nosave+i)->address = addr;
- }
- return 0;
-}
-
-static int __init relocate_pagedir(void)
-{
- /*
- * We have to avoid recursion (not to overflow kernel stack),
- * and that's why code looks pretty cryptic
- */
- suspend_pagedir_t *old_pagedir = pm_pagedir_nosave;
- void **eaten_memory = NULL;
- void **c = eaten_memory, *m, *f;
- int err;
-
- pr_debug("pmdisk: Relocating pagedir\n");
-
- if(!does_collide_order(old_pagedir, (unsigned long)old_pagedir, pagedir_order)) {
- pr_debug("pmdisk: Relocation not necessary\n");
- return 0;
- }
-
- err = -ENOMEM;
- while ((m = (void *) __get_free_pages(GFP_ATOMIC, pagedir_order)) != NULL) {
- if (!does_collide_order(old_pagedir, (unsigned long)m,
- pagedir_order)) {
- pm_pagedir_nosave =
- memcpy(m, old_pagedir,
- PAGE_SIZE << pagedir_order);
- err = 0;
- break;
- }
- eaten_memory = m;
- printk( "." );
- *eaten_memory = c;
- c = eaten_memory;
- }
-
- c = eaten_memory;
- while(c) {
- printk(":");
- f = c;
- c = *c;
- free_pages((unsigned long)f, pagedir_order);
- }
- printk("|\n");
- return err;
-}
-
-
-static struct block_device * resume_bdev;
-
-
-/**
- * Using bio to read from swap.
- * This code requires a bit more work than just using buffer heads
- * but, it is the recommended way for 2.5/2.6.
- * The following are to signal the beginning and end of I/O. Bios
- * finish asynchronously, while we want them to happen synchronously.
- * A simple atomic_t, and a wait loop take care of this problem.
- */
-
-static atomic_t io_done = ATOMIC_INIT(0);
-
-static void start_io(void)
-{
- atomic_set(&io_done,1);
-}
-
-static int end_io(struct bio * bio, unsigned int num, int err)
-{
- atomic_set(&io_done,0);
- return 0;
-}
-
-static void wait_io(void)
-{
- while(atomic_read(&io_done))
- io_schedule();
-}
-
-
-/**
- * submit - submit BIO request.
- * @rw: READ or WRITE.
- * @off physical offset of page.
- * @page: page we're reading or writing.
- *
- * Straight from the textbook - allocate and initialize the bio.
- * If we're writing, make sure the page is marked as dirty.
- * Then submit it and wait.
- */
-
-static int submit(int rw, pgoff_t page_off, void * page)
-{
- int error = 0;
- struct bio * bio;
-
- bio = bio_alloc(GFP_ATOMIC,1);
- if (!bio)
- return -ENOMEM;
- bio->bi_sector = page_off * (PAGE_SIZE >> 9);
- bio_get(bio);
- bio->bi_bdev = resume_bdev;
- bio->bi_end_io = end_io;
-
- if (bio_add_page(bio, virt_to_page(page), PAGE_SIZE, 0) < PAGE_SIZE) {
- printk("pmdisk: ERROR: adding page to bio at %ld\n",page_off);
- error = -EFAULT;
- goto Done;
- }
-
- if (rw == WRITE)
- bio_set_pages_dirty(bio);
- start_io();
- submit_bio(rw | (1 << BIO_RW_SYNC), bio);
- wait_io();
- Done:
- bio_put(bio);
- return error;
-}
-
-static int
-read_page(pgoff_t page_off, void * page)
-{
- return submit(READ,page_off,page);
-}
-
-static int
-write_page(pgoff_t page_off, void * page)
-{
- return submit(WRITE,page_off,page);
-}
-
-
-extern dev_t __init name_to_dev_t(const char *line);
-
-
-static int __init check_sig(void)
-{
- int error;
-
- memset(&pmdisk_header,0,sizeof(pmdisk_header));
- if ((error = read_page(0,&pmdisk_header)))
- return error;
- if (!memcmp(PMDISK_SIG,pmdisk_header.sig,10)) {
- memcpy(pmdisk_header.sig,pmdisk_header.orig_sig,10);
-
- /*
- * Reset swap signature now.
- */
- error = write_page(0,&pmdisk_header);
- } else {
- pr_debug(KERN_ERR "pmdisk: Invalid partition type.\n");
- return -EINVAL;
- }
- if (!error)
- pr_debug("pmdisk: Signature found, resuming\n");
- return error;
-}
-
-
-/*
- * Sanity check if this image makes sense with this kernel/swap context
- * I really don't think that it's foolproof but more than nothing..
- */
-
-static const char * __init sanity_check(void)
-{
- dump_pmdisk_info();
- if(pmdisk_info.version_code != LINUX_VERSION_CODE)
- return "kernel version";
- if(pmdisk_info.num_physpages != num_physpages)
- return "memory size";
- if (strcmp(pmdisk_info.uts.sysname,system_utsname.sysname))
- return "system type";
- if (strcmp(pmdisk_info.uts.release,system_utsname.release))
- return "kernel release";
- if (strcmp(pmdisk_info.uts.version,system_utsname.version))
- return "version";
- if (strcmp(pmdisk_info.uts.machine,system_utsname.machine))
- return "machine";
- if(pmdisk_info.cpus != num_online_cpus())
- return "number of cpus";
- return NULL;
-}
-
-
-static int __init check_header(void)
-{
- const char * reason = NULL;
- int error;
-
- init_header();
-
- if ((error = read_page(swp_offset(pmdisk_header.pmdisk_info),
- &pmdisk_info)))
- return error;
-
- /* Is this same machine? */
- if ((reason = sanity_check())) {
- printk(KERN_ERR "pmdisk: Resume mismatch: %s\n",reason);
- return -EPERM;
- }
- pmdisk_pages = pmdisk_info.image_pages;
- return error;
-}
-
-
-static int __init read_pagedir(void)
-{
- unsigned long addr;
- int i, n = pmdisk_info.pagedir_pages;
- int error = 0;
-
- pagedir_order = get_bitmask_order(n);
-
- addr =__get_free_pages(GFP_ATOMIC, pagedir_order);
- if (!addr)
- return -ENOMEM;
- pm_pagedir_nosave = (struct pbe *)addr;
-
- pr_debug("pmdisk: Reading pagedir (%d Pages)\n",n);
-
- for (i = 0; i < n && !error; i++, addr += PAGE_SIZE) {
- unsigned long offset = swp_offset(pmdisk_info.pagedir[i]);
- if (offset)
- error = read_page(offset, (void *)addr);
- else
- error = -EFAULT;
- }
- if (error)
- free_pages((unsigned long)pm_pagedir_nosave,pagedir_order);
- return error;
-}
-
-
-/**
- * read_image_data - Read image pages from swap.
- *
- * You do not need to check for overlaps, check_pagedir()
- * already did that.
- */
-
-static int __init read_image_data(void)
-{
- struct pbe * p;
- int error = 0;
- int i;
-
- printk( "Reading image data (%d pages): ", pmdisk_pages );
- for(i = 0, p = pm_pagedir_nosave; i < pmdisk_pages && !error; i++, p++) {
- if (!(i%100))
- printk( "." );
- error = read_page(swp_offset(p->swap_address),
- (void *)p->address);
- }
- printk(" %d done.\n",i);
- return error;
-}
-
-
-static int __init read_suspend_image(void)
-{
- int error = 0;
-
- if ((error = check_sig()))
- return error;
- if ((error = check_header()))
- return error;
- if ((error = read_pagedir()))
- return error;
- if ((error = relocate_pagedir()))
- goto FreePagedir;
- if ((error = check_pagedir()))
- goto FreePagedir;
- if ((error = read_image_data()))
- goto FreePagedir;
- Done:
- return error;
- FreePagedir:
- free_pages((unsigned long)pm_pagedir_nosave,pagedir_order);
- goto Done;
-}
-
-/**
- * pmdisk_save - Snapshot memory
- */
-
-int pmdisk_save(void)
-{
- int error;
-
-#if defined (CONFIG_HIGHMEM) || defined (CONFIG_DISCONTIGMEM)
- pr_debug("pmdisk: not supported with high- or discontig-mem.\n");
- return -EPERM;
-#endif
- if ((error = arch_prepare_suspend()))
- return error;
- local_irq_disable();
- save_processor_state();
- error = pmdisk_arch_suspend(0);
- restore_processor_state();
- local_irq_enable();
- return error;
-}
-
-
-/**
- * pmdisk_write - Write saved memory image to swap.
- *
- * pmdisk_arch_suspend(0) returns after system is resumed.
- *
- * pmdisk_arch_suspend() copies all "used" memory to "free" memory,
- * then unsuspends all device drivers, and writes memory to disk
- * using normal kernel mechanism.
- */
-
-int pmdisk_write(void)
-{
- return suspend_save_image();
-}
-
-
-/**
- * pmdisk_read - Read saved image from swap.
- */
-
-int __init pmdisk_read(void)
-{
- int error;
-
- if (!strlen(resume_file))
- return -ENOENT;
-
- resume_device = name_to_dev_t(resume_file);
- pr_debug("pmdisk: Resume From Partition: %s\n", resume_file);
-
- resume_bdev = open_by_devnum(resume_device, FMODE_READ);
- if (!IS_ERR(resume_bdev)) {
- set_blocksize(resume_bdev, PAGE_SIZE);
- error = read_suspend_image();
- blkdev_put(resume_bdev);
- } else
- error = PTR_ERR(resume_bdev);
-
- if (!error)
- pr_debug("Reading resume file was successful\n");
- else
- pr_debug("pmdisk: Error %d resuming\n", error);
- return error;
-}
-
-
-/**
- * pmdisk_restore - Replace running kernel with saved image.
- */
-
-int __init pmdisk_restore(void)
-{
- int error;
- local_irq_disable();
- save_processor_state();
- error = pmdisk_arch_suspend(1);
- restore_processor_state();
- local_irq_enable();
- return error;
-}
-
-
-/**
- * pmdisk_free - Free memory allocated to hold snapshot.
- */
-
-int pmdisk_free(void)
-{
- pr_debug( "Freeing prev allocated pagedir\n" );
- free_pagedir();
- return 0;
-}
-
-static int __init pmdisk_setup(char *str)
-{
- if (strlen(str)) {
- if (!strcmp(str,"off"))
- resume_file[0] = '\0';
- else
- strncpy(resume_file, str, 255);
- } else
- resume_file[0] = '\0';
- return 1;
-}
-
-__setup("pmdisk=", pmdisk_setup);
-
+++ /dev/null
-/* inffixed.h -- table for decoding fixed codes
- * Generated automatically by the maketree.c program
- */
-
-/* WARNING: this file should *not* be used by applications. It is
- part of the implementation of the compression library and is
- subject to change. Applications should only use zlib.h.
- */
-
-static uInt fixed_bl = 9;
-static uInt fixed_bd = 5;
-static inflate_huft fixed_tl[] = {
- {{{96,7}},256}, {{{0,8}},80}, {{{0,8}},16}, {{{84,8}},115},
- {{{82,7}},31}, {{{0,8}},112}, {{{0,8}},48}, {{{0,9}},192},
- {{{80,7}},10}, {{{0,8}},96}, {{{0,8}},32}, {{{0,9}},160},
- {{{0,8}},0}, {{{0,8}},128}, {{{0,8}},64}, {{{0,9}},224},
- {{{80,7}},6}, {{{0,8}},88}, {{{0,8}},24}, {{{0,9}},144},
- {{{83,7}},59}, {{{0,8}},120}, {{{0,8}},56}, {{{0,9}},208},
- {{{81,7}},17}, {{{0,8}},104}, {{{0,8}},40}, {{{0,9}},176},
- {{{0,8}},8}, {{{0,8}},136}, {{{0,8}},72}, {{{0,9}},240},
- {{{80,7}},4}, {{{0,8}},84}, {{{0,8}},20}, {{{85,8}},227},
- {{{83,7}},43}, {{{0,8}},116}, {{{0,8}},52}, {{{0,9}},200},
- {{{81,7}},13}, {{{0,8}},100}, {{{0,8}},36}, {{{0,9}},168},
- {{{0,8}},4}, {{{0,8}},132}, {{{0,8}},68}, {{{0,9}},232},
- {{{80,7}},8}, {{{0,8}},92}, {{{0,8}},28}, {{{0,9}},152},
- {{{84,7}},83}, {{{0,8}},124}, {{{0,8}},60}, {{{0,9}},216},
- {{{82,7}},23}, {{{0,8}},108}, {{{0,8}},44}, {{{0,9}},184},
- {{{0,8}},12}, {{{0,8}},140}, {{{0,8}},76}, {{{0,9}},248},
- {{{80,7}},3}, {{{0,8}},82}, {{{0,8}},18}, {{{85,8}},163},
- {{{83,7}},35}, {{{0,8}},114}, {{{0,8}},50}, {{{0,9}},196},
- {{{81,7}},11}, {{{0,8}},98}, {{{0,8}},34}, {{{0,9}},164},
- {{{0,8}},2}, {{{0,8}},130}, {{{0,8}},66}, {{{0,9}},228},
- {{{80,7}},7}, {{{0,8}},90}, {{{0,8}},26}, {{{0,9}},148},
- {{{84,7}},67}, {{{0,8}},122}, {{{0,8}},58}, {{{0,9}},212},
- {{{82,7}},19}, {{{0,8}},106}, {{{0,8}},42}, {{{0,9}},180},
- {{{0,8}},10}, {{{0,8}},138}, {{{0,8}},74}, {{{0,9}},244},
- {{{80,7}},5}, {{{0,8}},86}, {{{0,8}},22}, {{{192,8}},0},
- {{{83,7}},51}, {{{0,8}},118}, {{{0,8}},54}, {{{0,9}},204},
- {{{81,7}},15}, {{{0,8}},102}, {{{0,8}},38}, {{{0,9}},172},
- {{{0,8}},6}, {{{0,8}},134}, {{{0,8}},70}, {{{0,9}},236},
- {{{80,7}},9}, {{{0,8}},94}, {{{0,8}},30}, {{{0,9}},156},
- {{{84,7}},99}, {{{0,8}},126}, {{{0,8}},62}, {{{0,9}},220},
- {{{82,7}},27}, {{{0,8}},110}, {{{0,8}},46}, {{{0,9}},188},
- {{{0,8}},14}, {{{0,8}},142}, {{{0,8}},78}, {{{0,9}},252},
- {{{96,7}},256}, {{{0,8}},81}, {{{0,8}},17}, {{{85,8}},131},
- {{{82,7}},31}, {{{0,8}},113}, {{{0,8}},49}, {{{0,9}},194},
- {{{80,7}},10}, {{{0,8}},97}, {{{0,8}},33}, {{{0,9}},162},
- {{{0,8}},1}, {{{0,8}},129}, {{{0,8}},65}, {{{0,9}},226},
- {{{80,7}},6}, {{{0,8}},89}, {{{0,8}},25}, {{{0,9}},146},
- {{{83,7}},59}, {{{0,8}},121}, {{{0,8}},57}, {{{0,9}},210},
- {{{81,7}},17}, {{{0,8}},105}, {{{0,8}},41}, {{{0,9}},178},
- {{{0,8}},9}, {{{0,8}},137}, {{{0,8}},73}, {{{0,9}},242},
- {{{80,7}},4}, {{{0,8}},85}, {{{0,8}},21}, {{{80,8}},258},
- {{{83,7}},43}, {{{0,8}},117}, {{{0,8}},53}, {{{0,9}},202},
- {{{81,7}},13}, {{{0,8}},101}, {{{0,8}},37}, {{{0,9}},170},
- {{{0,8}},5}, {{{0,8}},133}, {{{0,8}},69}, {{{0,9}},234},
- {{{80,7}},8}, {{{0,8}},93}, {{{0,8}},29}, {{{0,9}},154},
- {{{84,7}},83}, {{{0,8}},125}, {{{0,8}},61}, {{{0,9}},218},
- {{{82,7}},23}, {{{0,8}},109}, {{{0,8}},45}, {{{0,9}},186},
- {{{0,8}},13}, {{{0,8}},141}, {{{0,8}},77}, {{{0,9}},250},
- {{{80,7}},3}, {{{0,8}},83}, {{{0,8}},19}, {{{85,8}},195},
- {{{83,7}},35}, {{{0,8}},115}, {{{0,8}},51}, {{{0,9}},198},
- {{{81,7}},11}, {{{0,8}},99}, {{{0,8}},35}, {{{0,9}},166},
- {{{0,8}},3}, {{{0,8}},131}, {{{0,8}},67}, {{{0,9}},230},
- {{{80,7}},7}, {{{0,8}},91}, {{{0,8}},27}, {{{0,9}},150},
- {{{84,7}},67}, {{{0,8}},123}, {{{0,8}},59}, {{{0,9}},214},
- {{{82,7}},19}, {{{0,8}},107}, {{{0,8}},43}, {{{0,9}},182},
- {{{0,8}},11}, {{{0,8}},139}, {{{0,8}},75}, {{{0,9}},246},
- {{{80,7}},5}, {{{0,8}},87}, {{{0,8}},23}, {{{192,8}},0},
- {{{83,7}},51}, {{{0,8}},119}, {{{0,8}},55}, {{{0,9}},206},
- {{{81,7}},15}, {{{0,8}},103}, {{{0,8}},39}, {{{0,9}},174},
- {{{0,8}},7}, {{{0,8}},135}, {{{0,8}},71}, {{{0,9}},238},
- {{{80,7}},9}, {{{0,8}},95}, {{{0,8}},31}, {{{0,9}},158},
- {{{84,7}},99}, {{{0,8}},127}, {{{0,8}},63}, {{{0,9}},222},
- {{{82,7}},27}, {{{0,8}},111}, {{{0,8}},47}, {{{0,9}},190},
- {{{0,8}},15}, {{{0,8}},143}, {{{0,8}},79}, {{{0,9}},254},
- {{{96,7}},256}, {{{0,8}},80}, {{{0,8}},16}, {{{84,8}},115},
- {{{82,7}},31}, {{{0,8}},112}, {{{0,8}},48}, {{{0,9}},193},
- {{{80,7}},10}, {{{0,8}},96}, {{{0,8}},32}, {{{0,9}},161},
- {{{0,8}},0}, {{{0,8}},128}, {{{0,8}},64}, {{{0,9}},225},
- {{{80,7}},6}, {{{0,8}},88}, {{{0,8}},24}, {{{0,9}},145},
- {{{83,7}},59}, {{{0,8}},120}, {{{0,8}},56}, {{{0,9}},209},
- {{{81,7}},17}, {{{0,8}},104}, {{{0,8}},40}, {{{0,9}},177},
- {{{0,8}},8}, {{{0,8}},136}, {{{0,8}},72}, {{{0,9}},241},
- {{{80,7}},4}, {{{0,8}},84}, {{{0,8}},20}, {{{85,8}},227},
- {{{83,7}},43}, {{{0,8}},116}, {{{0,8}},52}, {{{0,9}},201},
- {{{81,7}},13}, {{{0,8}},100}, {{{0,8}},36}, {{{0,9}},169},
- {{{0,8}},4}, {{{0,8}},132}, {{{0,8}},68}, {{{0,9}},233},
- {{{80,7}},8}, {{{0,8}},92}, {{{0,8}},28}, {{{0,9}},153},
- {{{84,7}},83}, {{{0,8}},124}, {{{0,8}},60}, {{{0,9}},217},
- {{{82,7}},23}, {{{0,8}},108}, {{{0,8}},44}, {{{0,9}},185},
- {{{0,8}},12}, {{{0,8}},140}, {{{0,8}},76}, {{{0,9}},249},
- {{{80,7}},3}, {{{0,8}},82}, {{{0,8}},18}, {{{85,8}},163},
- {{{83,7}},35}, {{{0,8}},114}, {{{0,8}},50}, {{{0,9}},197},
- {{{81,7}},11}, {{{0,8}},98}, {{{0,8}},34}, {{{0,9}},165},
- {{{0,8}},2}, {{{0,8}},130}, {{{0,8}},66}, {{{0,9}},229},
- {{{80,7}},7}, {{{0,8}},90}, {{{0,8}},26}, {{{0,9}},149},
- {{{84,7}},67}, {{{0,8}},122}, {{{0,8}},58}, {{{0,9}},213},
- {{{82,7}},19}, {{{0,8}},106}, {{{0,8}},42}, {{{0,9}},181},
- {{{0,8}},10}, {{{0,8}},138}, {{{0,8}},74}, {{{0,9}},245},
- {{{80,7}},5}, {{{0,8}},86}, {{{0,8}},22}, {{{192,8}},0},
- {{{83,7}},51}, {{{0,8}},118}, {{{0,8}},54}, {{{0,9}},205},
- {{{81,7}},15}, {{{0,8}},102}, {{{0,8}},38}, {{{0,9}},173},
- {{{0,8}},6}, {{{0,8}},134}, {{{0,8}},70}, {{{0,9}},237},
- {{{80,7}},9}, {{{0,8}},94}, {{{0,8}},30}, {{{0,9}},157},
- {{{84,7}},99}, {{{0,8}},126}, {{{0,8}},62}, {{{0,9}},221},
- {{{82,7}},27}, {{{0,8}},110}, {{{0,8}},46}, {{{0,9}},189},
- {{{0,8}},14}, {{{0,8}},142}, {{{0,8}},78}, {{{0,9}},253},
- {{{96,7}},256}, {{{0,8}},81}, {{{0,8}},17}, {{{85,8}},131},
- {{{82,7}},31}, {{{0,8}},113}, {{{0,8}},49}, {{{0,9}},195},
- {{{80,7}},10}, {{{0,8}},97}, {{{0,8}},33}, {{{0,9}},163},
- {{{0,8}},1}, {{{0,8}},129}, {{{0,8}},65}, {{{0,9}},227},
- {{{80,7}},6}, {{{0,8}},89}, {{{0,8}},25}, {{{0,9}},147},
- {{{83,7}},59}, {{{0,8}},121}, {{{0,8}},57}, {{{0,9}},211},
- {{{81,7}},17}, {{{0,8}},105}, {{{0,8}},41}, {{{0,9}},179},
- {{{0,8}},9}, {{{0,8}},137}, {{{0,8}},73}, {{{0,9}},243},
- {{{80,7}},4}, {{{0,8}},85}, {{{0,8}},21}, {{{80,8}},258},
- {{{83,7}},43}, {{{0,8}},117}, {{{0,8}},53}, {{{0,9}},203},
- {{{81,7}},13}, {{{0,8}},101}, {{{0,8}},37}, {{{0,9}},171},
- {{{0,8}},5}, {{{0,8}},133}, {{{0,8}},69}, {{{0,9}},235},
- {{{80,7}},8}, {{{0,8}},93}, {{{0,8}},29}, {{{0,9}},155},
- {{{84,7}},83}, {{{0,8}},125}, {{{0,8}},61}, {{{0,9}},219},
- {{{82,7}},23}, {{{0,8}},109}, {{{0,8}},45}, {{{0,9}},187},
- {{{0,8}},13}, {{{0,8}},141}, {{{0,8}},77}, {{{0,9}},251},
- {{{80,7}},3}, {{{0,8}},83}, {{{0,8}},19}, {{{85,8}},195},
- {{{83,7}},35}, {{{0,8}},115}, {{{0,8}},51}, {{{0,9}},199},
- {{{81,7}},11}, {{{0,8}},99}, {{{0,8}},35}, {{{0,9}},167},
- {{{0,8}},3}, {{{0,8}},131}, {{{0,8}},67}, {{{0,9}},231},
- {{{80,7}},7}, {{{0,8}},91}, {{{0,8}},27}, {{{0,9}},151},
- {{{84,7}},67}, {{{0,8}},123}, {{{0,8}},59}, {{{0,9}},215},
- {{{82,7}},19}, {{{0,8}},107}, {{{0,8}},43}, {{{0,9}},183},
- {{{0,8}},11}, {{{0,8}},139}, {{{0,8}},75}, {{{0,9}},247},
- {{{80,7}},5}, {{{0,8}},87}, {{{0,8}},23}, {{{192,8}},0},
- {{{83,7}},51}, {{{0,8}},119}, {{{0,8}},55}, {{{0,9}},207},
- {{{81,7}},15}, {{{0,8}},103}, {{{0,8}},39}, {{{0,9}},175},
- {{{0,8}},7}, {{{0,8}},135}, {{{0,8}},71}, {{{0,9}},239},
- {{{80,7}},9}, {{{0,8}},95}, {{{0,8}},31}, {{{0,9}},159},
- {{{84,7}},99}, {{{0,8}},127}, {{{0,8}},63}, {{{0,9}},223},
- {{{82,7}},27}, {{{0,8}},111}, {{{0,8}},47}, {{{0,9}},191},
- {{{0,8}},15}, {{{0,8}},143}, {{{0,8}},79}, {{{0,9}},255}
- };
-static inflate_huft fixed_td[] = {
- {{{80,5}},1}, {{{87,5}},257}, {{{83,5}},17}, {{{91,5}},4097},
- {{{81,5}},5}, {{{89,5}},1025}, {{{85,5}},65}, {{{93,5}},16385},
- {{{80,5}},3}, {{{88,5}},513}, {{{84,5}},33}, {{{92,5}},8193},
- {{{82,5}},9}, {{{90,5}},2049}, {{{86,5}},129}, {{{192,5}},24577},
- {{{80,5}},2}, {{{87,5}},385}, {{{83,5}},25}, {{{91,5}},6145},
- {{{81,5}},7}, {{{89,5}},1537}, {{{85,5}},97}, {{{93,5}},24577},
- {{{80,5}},4}, {{{88,5}},769}, {{{84,5}},49}, {{{92,5}},12289},
- {{{82,5}},13}, {{{90,5}},3073}, {{{86,5}},193}, {{{192,5}},24577}
- };
+++ /dev/null
-/*
- BlueZ - Bluetooth protocol stack for Linux
- Copyright (C) 2000-2001 Qualcomm Incorporated
-
- Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License version 2 as
- published by the Free Software Foundation;
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY RIGHTS.
- IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) AND AUTHOR(S) BE LIABLE FOR ANY
- CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES
- WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-
- ALL LIABILITY, INCLUDING LIABILITY FOR INFRINGEMENT OF ANY PATENTS,
- COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS, RELATING TO USE OF THIS
- SOFTWARE IS DISCLAIMED.
-*/
-
-/*
- * Bluetooth symbols.
- *
- * $Id: syms.c,v 1.1 2002/03/08 21:06:59 maxk Exp $
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/skbuff.h>
-#include <linux/socket.h>
-
-#include <net/bluetooth/bluetooth.h>
-#include <net/bluetooth/hci_core.h>
-
-/* HCI Core */
-EXPORT_SYMBOL(hci_alloc_dev);
-EXPORT_SYMBOL(hci_free_dev);
-EXPORT_SYMBOL(hci_register_dev);
-EXPORT_SYMBOL(hci_unregister_dev);
-EXPORT_SYMBOL(hci_suspend_dev);
-EXPORT_SYMBOL(hci_resume_dev);
-
-EXPORT_SYMBOL(hci_register_proto);
-EXPORT_SYMBOL(hci_unregister_proto);
-
-EXPORT_SYMBOL(hci_get_route);
-EXPORT_SYMBOL(hci_connect);
-EXPORT_SYMBOL(hci_dev_get);
-EXPORT_SYMBOL(hci_conn_auth);
-EXPORT_SYMBOL(hci_conn_encrypt);
-
-EXPORT_SYMBOL(hci_send_acl);
-EXPORT_SYMBOL(hci_send_sco);
-EXPORT_SYMBOL(hci_send_cmd);
-EXPORT_SYMBOL(hci_si_event);
-
-/* Bluetooth lib */
-EXPORT_SYMBOL(bt_dump);
-EXPORT_SYMBOL(baswap);
-EXPORT_SYMBOL(batostr);
-EXPORT_SYMBOL(bt_err);
-
-/* Bluetooth sockets */
-EXPORT_SYMBOL(bt_sock_register);
-EXPORT_SYMBOL(bt_sock_unregister);
-EXPORT_SYMBOL(bt_sock_alloc);
-EXPORT_SYMBOL(bt_sock_link);
-EXPORT_SYMBOL(bt_sock_unlink);
-EXPORT_SYMBOL(bt_sock_recvmsg);
-EXPORT_SYMBOL(bt_sock_poll);
-EXPORT_SYMBOL(bt_accept_enqueue);
-EXPORT_SYMBOL(bt_accept_dequeue);
-EXPORT_SYMBOL(bt_sock_wait_state);
-
-EXPORT_SYMBOL(proc_bt);
+++ /dev/null
-/*
- * INET An implementation of the TCP/IP protocol suite for the LINUX
- * operating system. INET is implemented using the BSD Socket
- * interface as the means of communication with the user level.
- *
- * Dumb Network Address Translation.
- *
- * Version: $Id: ip_nat_dumb.c,v 1.11 2000/12/13 18:31:48 davem Exp $
- *
- * Authors: Alexey Kuznetsov, <kuznet@ms2.inr.ac.ru>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Fixes:
- * Rani Assaf : A zero checksum is a special case
- * only in UDP
- * Rani Assaf : Added ICMP messages rewriting
- * Rani Assaf : Repaired wrong changes, made by ANK.
- *
- *
- * NOTE: It is just working model of real NAT.
- */
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/skbuff.h>
-#include <linux/ip.h>
-#include <linux/icmp.h>
-#include <linux/netdevice.h>
-#include <net/sock.h>
-#include <net/ip.h>
-#include <net/icmp.h>
-#include <linux/tcp.h>
-#include <linux/udp.h>
-#include <net/checksum.h>
-#include <linux/route.h>
-#include <net/route.h>
-#include <net/ip_fib.h>
-
-
-int
-ip_do_nat(struct sk_buff *skb)
-{
- struct rtable *rt = (struct rtable*)skb->dst;
- struct iphdr *iph = skb->nh.iph;
- u32 odaddr = iph->daddr;
- u32 osaddr = iph->saddr;
- u16 check;
-
- IPCB(skb)->flags |= IPSKB_TRANSLATED;
-
- /* Rewrite IP header */
- iph->daddr = rt->rt_dst_map;
- iph->saddr = rt->rt_src_map;
- iph->check = 0;
- iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
-
- /* If it is the first fragment, rewrite protocol headers */
-
- if (!(iph->frag_off & htons(IP_OFFSET))) {
- u16 *cksum;
-
- switch(iph->protocol) {
- case IPPROTO_TCP:
- cksum = (u16*)&((struct tcphdr*)(((char*)iph) + (iph->ihl<<2)))->check;
- if ((u8*)(cksum+1) > skb->tail)
- goto truncated;
- check = *cksum;
- if (skb->ip_summed != CHECKSUM_HW)
- check = ~check;
- check = csum_tcpudp_magic(iph->saddr, iph->daddr, 0, 0, check);
- check = csum_tcpudp_magic(~osaddr, ~odaddr, 0, 0, ~check);
- if (skb->ip_summed == CHECKSUM_HW)
- check = ~check;
- *cksum = check;
- break;
- case IPPROTO_UDP:
- cksum = (u16*)&((struct udphdr*)(((char*)iph) + (iph->ihl<<2)))->check;
- if ((u8*)(cksum+1) > skb->tail)
- goto truncated;
- if ((check = *cksum) != 0) {
- check = csum_tcpudp_magic(iph->saddr, iph->daddr, 0, 0, ~check);
- check = csum_tcpudp_magic(~osaddr, ~odaddr, 0, 0, ~check);
- *cksum = check ? : 0xFFFF;
- }
- break;
- case IPPROTO_ICMP:
- {
- struct icmphdr *icmph = (struct icmphdr*)((char*)iph + (iph->ihl<<2));
- struct iphdr *ciph;
- u32 idaddr, isaddr;
- int updated;
-
- if ((icmph->type != ICMP_DEST_UNREACH) &&
- (icmph->type != ICMP_TIME_EXCEEDED) &&
- (icmph->type != ICMP_PARAMETERPROB))
- break;
-
- ciph = (struct iphdr *) (icmph + 1);
-
- if ((u8*)(ciph+1) > skb->tail)
- goto truncated;
-
- isaddr = ciph->saddr;
- idaddr = ciph->daddr;
- updated = 0;
-
- if (rt->rt_flags&RTCF_DNAT && ciph->saddr == odaddr) {
- ciph->saddr = iph->daddr;
- updated = 1;
- }
- if (rt->rt_flags&RTCF_SNAT) {
- if (ciph->daddr != osaddr) {
- struct fib_result res;
- unsigned flags = 0;
- struct flowi fl = {
- .iif = skb->dev->ifindex,
- .nl_u =
- { .ip4_u =
- { .daddr = ciph->saddr,
- .saddr = ciph->daddr,
-#ifdef CONFIG_IP_ROUTE_TOS
- .tos = RT_TOS(ciph->tos)
-#endif
- } },
- .proto = ciph->protocol };
-
- /* Use fib_lookup() until we get our own
- * hash table of NATed hosts -- Rani
- */
- if (fib_lookup(&fl, &res) == 0) {
- if (res.r) {
- ciph->daddr = fib_rules_policy(ciph->daddr, &res, &flags);
- if (ciph->daddr != idaddr)
- updated = 1;
- }
- fib_res_put(&res);
- }
- } else {
- ciph->daddr = iph->saddr;
- updated = 1;
- }
- }
- if (updated) {
- cksum = &icmph->checksum;
- /* Using tcpudp primitive. Why not? */
- check = csum_tcpudp_magic(ciph->saddr, ciph->daddr, 0, 0, ~(*cksum));
- *cksum = csum_tcpudp_magic(~isaddr, ~idaddr, 0, 0, ~check);
- }
- break;
- }
- default:
- break;
- }
- }
- return NET_RX_SUCCESS;
-
-truncated:
- /* should be return NET_RX_BAD; */
- return -EINVAL;
-}
+++ /dev/null
-/* Compatibility framework for ipchains and ipfwadm support; designed
- to look as much like the 2.2 infrastructure as possible. */
-
-/* (C) 1999-2001 Paul `Rusty' Russell
- * (C) 2002-2004 Netfilter Core Team <coreteam@netfilter.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-struct notifier_block;
-
-#include <linux/netfilter_ipv4.h>
-#include <linux/ip.h>
-#include <net/icmp.h>
-#include <linux/if.h>
-#include <linux/inetdevice.h>
-#include <linux/netdevice.h>
-#include <linux/module.h>
-#include <asm/uaccess.h>
-#include <net/ip.h>
-#include <net/route.h>
-#include <linux/netfilter_ipv4/compat_firewall.h>
-#include <linux/netfilter_ipv4/ip_conntrack.h>
-#include <linux/netfilter_ipv4/ip_conntrack_core.h>
-#include "ip_fw_compat.h"
-
-static struct firewall_ops *fwops;
-
-#ifdef CONFIG_IP_VS
-/* From ip_vs_core.c */
-extern unsigned int
-check_for_ip_vs_out(struct sk_buff **skb_p, int (*okfn)(struct sk_buff *));
-#endif
-
-/* They call these; we do what they want. */
-int register_firewall(int pf, struct firewall_ops *fw)
-{
- if (pf != PF_INET) {
- printk("Attempt to register non-IP firewall module.\n");
- return -EINVAL;
- }
- if (fwops) {
- printk("Attempt to register multiple firewall modules.\n");
- return -EBUSY;
- }
-
- fwops = fw;
- return 0;
-}
-
-int unregister_firewall(int pf, struct firewall_ops *fw)
-{
- fwops = NULL;
- return 0;
-}
-
-static unsigned int
-fw_in(unsigned int hooknum,
- struct sk_buff **pskb,
- const struct net_device *in,
- const struct net_device *out,
- int (*okfn)(struct sk_buff *))
-{
- int ret = FW_BLOCK;
- u_int16_t redirpt;
-
- /* Assume worse case: any hook could change packet */
- (*pskb)->nfcache |= NFC_UNKNOWN | NFC_ALTERED;
- if ((*pskb)->ip_summed == CHECKSUM_HW)
- if (skb_checksum_help(*pskb, (out == NULL)))
- return NF_DROP;
-
- switch (hooknum) {
- case NF_IP_PRE_ROUTING:
- if (fwops->fw_acct_in)
- fwops->fw_acct_in(fwops, PF_INET,
- (struct net_device *)in,
- &redirpt, pskb);
-
- if ((*pskb)->nh.iph->frag_off & htons(IP_MF|IP_OFFSET)) {
- *pskb = ip_ct_gather_frags(*pskb);
-
- if (!*pskb)
- return NF_STOLEN;
- }
-
- ret = fwops->fw_input(fwops, PF_INET, (struct net_device *)in,
- &redirpt, pskb);
- break;
-
- case NF_IP_FORWARD:
- /* Connection will only be set if it was
- demasqueraded: if so, skip forward chain. */
- if ((*pskb)->nfct)
- ret = FW_ACCEPT;
- else ret = fwops->fw_forward(fwops, PF_INET,
- (struct net_device *)out,
- &redirpt, pskb);
- break;
-
- case NF_IP_POST_ROUTING:
- ret = fwops->fw_output(fwops, PF_INET,
- (struct net_device *)out,
- &redirpt, pskb);
- if (ret == FW_ACCEPT || ret == FW_SKIP) {
- if (fwops->fw_acct_out)
- fwops->fw_acct_out(fwops, PF_INET,
- (struct net_device *)out,
- &redirpt,
- pskb);
-
- /* ip_conntrack_confirm return NF_DROP or NF_ACCEPT */
- if (ip_conntrack_confirm(*pskb) == NF_DROP)
- ret = FW_BLOCK;
- }
- break;
- }
-
- switch (ret) {
- case FW_REJECT: {
- /* Alexey says:
- *
- * Generally, routing is THE FIRST thing to make, when
- * packet enters IP stack. Before packet is routed you
- * cannot call any service routines from IP stack. */
- struct iphdr *iph = (*pskb)->nh.iph;
-
- if ((*pskb)->dst != NULL
- || ip_route_input(*pskb, iph->daddr, iph->saddr, iph->tos,
- (struct net_device *)in) == 0)
- icmp_send(*pskb, ICMP_DEST_UNREACH, ICMP_PORT_UNREACH,
- 0);
- return NF_DROP;
- }
-
- case FW_ACCEPT:
- case FW_SKIP:
- if (hooknum == NF_IP_PRE_ROUTING) {
- check_for_demasq(pskb);
- check_for_redirect(*pskb);
- } else if (hooknum == NF_IP_POST_ROUTING) {
- check_for_unredirect(*pskb);
- /* Handle ICMP errors from client here */
- if ((*pskb)->nh.iph->protocol == IPPROTO_ICMP
- && (*pskb)->nfct)
- check_for_masq_error(pskb);
- }
- return NF_ACCEPT;
-
- case FW_MASQUERADE:
- if (hooknum == NF_IP_FORWARD) {
-#ifdef CONFIG_IP_VS
- /* check if it is for ip_vs */
- if (check_for_ip_vs_out(pskb, okfn) == NF_STOLEN)
- return NF_STOLEN;
-#endif
- return do_masquerade(pskb, out);
- }
- else return NF_ACCEPT;
-
- case FW_REDIRECT:
- if (hooknum == NF_IP_PRE_ROUTING)
- return do_redirect(*pskb, in, redirpt);
- else return NF_ACCEPT;
-
- default:
- /* FW_BLOCK */
- return NF_DROP;
- }
-}
-
-static unsigned int fw_confirm(unsigned int hooknum,
- struct sk_buff **pskb,
- const struct net_device *in,
- const struct net_device *out,
- int (*okfn)(struct sk_buff *))
-{
- return ip_conntrack_confirm(*pskb);
-}
-
-extern int ip_fw_ctl(int optval, void *m, unsigned int len);
-
-static int sock_fn(struct sock *sk, int optval, void __user *user, unsigned int len)
-{
- /* MAX of:
- 2.2: sizeof(struct ip_fwtest) (~14x4 + 3x4 = 17x4)
- 2.2: sizeof(struct ip_fwnew) (~1x4 + 15x4 + 3x4 + 3x4 = 22x4)
- 2.0: sizeof(struct ip_fw) (~25x4)
-
- We can't include both 2.0 and 2.2 headers, they conflict.
- Hence, 200 is a good number. --RR */
- char tmp_fw[200];
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- if (len > sizeof(tmp_fw) || len < 1)
- return -EINVAL;
-
- if (copy_from_user(&tmp_fw, user, len))
- return -EFAULT;
-
- return -ip_fw_ctl(optval, &tmp_fw, len);
-}
-
-static struct nf_hook_ops preroute_ops = {
- .hook = fw_in,
- .owner = THIS_MODULE,
- .pf = PF_INET,
- .hooknum = NF_IP_PRE_ROUTING,
- .priority = NF_IP_PRI_FILTER,
-};
-
-static struct nf_hook_ops postroute_ops = {
- .hook = fw_in,
- .owner = THIS_MODULE,
- .pf = PF_INET,
- .hooknum = NF_IP_POST_ROUTING,
- .priority = NF_IP_PRI_FILTER,
-};
-
-static struct nf_hook_ops forward_ops = {
- .hook = fw_in,
- .owner = THIS_MODULE,
- .pf = PF_INET,
- .hooknum = NF_IP_FORWARD,
- .priority = NF_IP_PRI_FILTER,
-};
-
-static struct nf_hook_ops local_in_ops = {
- .hook = fw_confirm,
- .owner = THIS_MODULE,
- .pf = PF_INET,
- .hooknum = NF_IP_LOCAL_IN,
- .priority = NF_IP_PRI_LAST - 1,
-};
-
-static struct nf_sockopt_ops sock_ops = {
- .pf = PF_INET,
- .set_optmin = 64,
- .set_optmax = 64 + 1024 + 1,
- .set = &sock_fn,
-};
-
-extern int ipfw_init_or_cleanup(int init);
-
-static int init_or_cleanup(int init)
-{
- int ret = 0;
-
- if (!init) goto cleanup;
-
- ret = nf_register_sockopt(&sock_ops);
-
- if (ret < 0)
- goto cleanup_nothing;
-
- ret = ipfw_init_or_cleanup(1);
- if (ret < 0)
- goto cleanup_sockopt;
-
- ret = masq_init();
- if (ret < 0)
- goto cleanup_ipfw;
-
- nf_register_hook(&preroute_ops);
- nf_register_hook(&postroute_ops);
- nf_register_hook(&forward_ops);
- nf_register_hook(&local_in_ops);
-
- return ret;
-
- cleanup:
- nf_unregister_hook(&preroute_ops);
- nf_unregister_hook(&postroute_ops);
- nf_unregister_hook(&forward_ops);
- nf_unregister_hook(&local_in_ops);
-
- masq_cleanup();
-
- cleanup_ipfw:
- ipfw_init_or_cleanup(0);
-
- cleanup_sockopt:
- nf_unregister_sockopt(&sock_ops);
-
- cleanup_nothing:
- return ret;
-}
-
-static int __init init(void)
-{
- return init_or_cleanup(1);
-}
-
-static void __exit fini(void)
-{
- init_or_cleanup(0);
-}
-
-module_init(init);
-module_exit(fini);
+++ /dev/null
-#ifndef _LINUX_IP_FW_COMPAT_H
-#define _LINUX_IP_FW_COMPAT_H
-
-/* From ip_fw_compat_redir.c */
-extern unsigned int
-do_redirect(struct sk_buff *skb,
- const struct net_device *dev,
- u_int16_t redirpt);
-
-extern void
-check_for_redirect(struct sk_buff *skb);
-
-extern void
-check_for_unredirect(struct sk_buff *skb);
-
-/* From ip_fw_compat_masq.c */
-extern unsigned int
-do_masquerade(struct sk_buff **pskb, const struct net_device *dev);
-
-extern void check_for_masq_error(struct sk_buff **pskb);
-
-extern unsigned int
-check_for_demasq(struct sk_buff **pskb);
-
-extern int __init masq_init(void);
-extern void masq_cleanup(void);
-
-#endif /* _LINUX_IP_FW_COMPAT_H */
+++ /dev/null
-/* Masquerading compatibility layer.
-
- Note that there are no restrictions on other programs binding to
- ports 61000:65095 (in 2.0 and 2.2 they get EADDRINUSE). Just DON'T
- DO IT.
- */
-
-/* (C) 1999-2001 Paul `Rusty' Russell
- * (C) 2002-2004 Netfilter Core Team <coreteam@netfilter.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/skbuff.h>
-#include <linux/in.h>
-#include <linux/ip.h>
-#include <linux/icmp.h>
-#include <linux/udp.h>
-#include <linux/netfilter_ipv4.h>
-#include <linux/netdevice.h>
-#include <linux/inetdevice.h>
-#include <linux/proc_fs.h>
-#include <linux/module.h>
-#include <net/route.h>
-#include <net/ip.h>
-
-#define ASSERT_READ_LOCK(x) MUST_BE_READ_LOCKED(&ip_conntrack_lock)
-#define ASSERT_WRITE_LOCK(x) MUST_BE_WRITE_LOCKED(&ip_conntrack_lock)
-
-#include <linux/netfilter_ipv4/ip_conntrack.h>
-#include <linux/netfilter_ipv4/ip_conntrack_core.h>
-#include <linux/netfilter_ipv4/ip_conntrack_protocol.h>
-#include <linux/netfilter_ipv4/ip_nat.h>
-#include <linux/netfilter_ipv4/ip_nat_core.h>
-#include <linux/netfilter_ipv4/listhelp.h>
-#include "ip_fw_compat.h"
-
-#if 0
-#define DEBUGP printk
-#else
-#define DEBUGP(format, args...)
-#endif
-
-unsigned int
-do_masquerade(struct sk_buff **pskb, const struct net_device *dev)
-{
- struct ip_nat_info *info;
- enum ip_conntrack_info ctinfo;
- struct ip_conntrack *ct;
- unsigned int ret;
-
- /* Sorry, only ICMP, TCP and UDP. */
- if ((*pskb)->nh.iph->protocol != IPPROTO_ICMP
- && (*pskb)->nh.iph->protocol != IPPROTO_TCP
- && (*pskb)->nh.iph->protocol != IPPROTO_UDP)
- return NF_DROP;
-
- /* Feed it to connection tracking; in fact we're in NF_IP_FORWARD,
- but connection tracking doesn't expect that */
- ret = ip_conntrack_in(NF_IP_POST_ROUTING, pskb, dev, NULL, NULL);
- if (ret != NF_ACCEPT) {
- DEBUGP("ip_conntrack_in returned %u.\n", ret);
- return ret;
- }
-
- ct = ip_conntrack_get(*pskb, &ctinfo);
-
- if (!ct) {
- DEBUGP("ip_conntrack_in set to invalid conntrack.\n");
- return NF_DROP;
- }
-
- info = &ct->nat.info;
-
- WRITE_LOCK(&ip_nat_lock);
- /* Setup the masquerade, if not already */
- if (!info->initialized) {
- u_int32_t newsrc;
- struct flowi fl = { .nl_u = { .ip4_u = { .daddr = (*pskb)->nh.iph->daddr } } };
- struct rtable *rt;
- struct ip_nat_multi_range range;
-
- /* Pass 0 instead of saddr, since it's going to be changed
- anyway. */
- if (ip_route_output_key(&rt, &fl) != 0) {
- DEBUGP("ipnat_rule_masquerade: Can't reroute.\n");
- return NF_DROP;
- }
- newsrc = inet_select_addr(rt->u.dst.dev, rt->rt_gateway,
- RT_SCOPE_UNIVERSE);
- ip_rt_put(rt);
- range = ((struct ip_nat_multi_range)
- { 1,
- {{IP_NAT_RANGE_MAP_IPS|IP_NAT_RANGE_PROTO_SPECIFIED,
- newsrc, newsrc,
- { htons(61000) }, { htons(65095) } } } });
-
- ret = ip_nat_setup_info(ct, &range, NF_IP_POST_ROUTING);
- if (ret != NF_ACCEPT) {
- WRITE_UNLOCK(&ip_nat_lock);
- return ret;
- }
- } else
- DEBUGP("Masquerading already done on this conn.\n");
- WRITE_UNLOCK(&ip_nat_lock);
-
- return do_bindings(ct, ctinfo, info, NF_IP_POST_ROUTING, pskb);
-}
-
-void
-check_for_masq_error(struct sk_buff **pskb)
-{
- enum ip_conntrack_info ctinfo;
- struct ip_conntrack *ct;
-
- ct = ip_conntrack_get(*pskb, &ctinfo);
- /* Wouldn't be here if not tracked already => masq'ed ICMP
- ping or error related to masq'd connection */
- IP_NF_ASSERT(ct);
- if (ctinfo == IP_CT_RELATED) {
- icmp_reply_translation(pskb, ct, NF_IP_PRE_ROUTING,
- CTINFO2DIR(ctinfo));
- icmp_reply_translation(pskb, ct, NF_IP_POST_ROUTING,
- CTINFO2DIR(ctinfo));
- }
-}
-
-unsigned int
-check_for_demasq(struct sk_buff **pskb)
-{
- struct ip_conntrack_tuple tuple;
- struct ip_conntrack_protocol *protocol;
- struct ip_conntrack_tuple_hash *h;
- enum ip_conntrack_info ctinfo;
- struct ip_conntrack *ct;
- int ret;
-
- protocol = ip_ct_find_proto((*pskb)->nh.iph->protocol);
-
- /* We don't feed packets to conntrack system unless we know
- they're part of an connection already established by an
- explicit masq command. */
- switch ((*pskb)->nh.iph->protocol) {
- case IPPROTO_ICMP:
- /* ICMP errors. */
- protocol->error(*pskb, &ctinfo, NF_IP_PRE_ROUTING);
- ct = (struct ip_conntrack *)(*pskb)->nfct;
- if (ct) {
- /* We only do SNAT in the compatibility layer.
- So we can manipulate ICMP errors from
- server here (== DNAT). Do SNAT icmp manips
- in POST_ROUTING handling. */
- if (CTINFO2DIR(ctinfo) == IP_CT_DIR_REPLY) {
- icmp_reply_translation(pskb, ct,
- NF_IP_PRE_ROUTING,
- CTINFO2DIR(ctinfo));
- icmp_reply_translation(pskb, ct,
- NF_IP_POST_ROUTING,
- CTINFO2DIR(ctinfo));
- }
- return NF_ACCEPT;
- }
- /* Fall thru... */
- case IPPROTO_TCP:
- case IPPROTO_UDP:
- IP_NF_ASSERT(((*pskb)->nh.iph->frag_off & htons(IP_OFFSET)) == 0);
-
- if (!ip_ct_get_tuple((*pskb)->nh.iph, *pskb,
- (*pskb)->nh.iph->ihl*4, &tuple, protocol)) {
- if (net_ratelimit())
- printk("ip_fw_compat_masq: Can't get tuple\n");
- return NF_ACCEPT;
- }
- break;
-
- default:
- /* Not ours... */
- return NF_ACCEPT;
- }
- h = ip_conntrack_find_get(&tuple, NULL);
-
- /* MUST be found, and MUST be reply. */
- if (h && DIRECTION(h) == 1) {
- ret = ip_conntrack_in(NF_IP_PRE_ROUTING, pskb,
- NULL, NULL, NULL);
-
- /* Put back the reference gained from find_get */
- nf_conntrack_put(&h->ctrack->ct_general);
- if (ret == NF_ACCEPT) {
- struct ip_conntrack *ct;
- ct = ip_conntrack_get(*pskb, &ctinfo);
-
- if (ct) {
- struct ip_nat_info *info = &ct->nat.info;
-
- do_bindings(ct, ctinfo, info,
- NF_IP_PRE_ROUTING,
- pskb);
- } else
- if (net_ratelimit())
- printk("ip_fw_compat_masq: conntrack"
- " didn't like\n");
- }
- } else {
- if (h)
- /* Put back the reference gained from find_get */
- nf_conntrack_put(&h->ctrack->ct_general);
- ret = NF_ACCEPT;
- }
-
- return ret;
-}
-
-int ip_fw_masq_timeouts(void *user, int len)
-{
- printk("Sorry: masquerading timeouts set 5DAYS/2MINS/60SECS\n");
- return 0;
-}
-
-static const char *masq_proto_name(u_int16_t protonum)
-{
- switch (protonum) {
- case IPPROTO_TCP: return "TCP";
- case IPPROTO_UDP: return "UDP";
- case IPPROTO_ICMP: return "ICMP";
- default: return "MORE-CAFFEINE-FOR-RUSTY";
- }
-}
-
-static unsigned int
-print_masq(char *buffer, const struct ip_conntrack *conntrack)
-{
- char temp[129];
-
- /* This is for backwards compatibility, but ick!.
- We should never export jiffies to userspace.
- */
- sprintf(temp,"%s %08X:%04X %08X:%04X %04X %08X %6d %6d %7lu",
- masq_proto_name(conntrack->tuplehash[0].tuple.dst.protonum),
- ntohl(conntrack->tuplehash[0].tuple.src.ip),
- ntohs(conntrack->tuplehash[0].tuple.src.u.all),
- ntohl(conntrack->tuplehash[0].tuple.dst.ip),
- ntohs(conntrack->tuplehash[0].tuple.dst.u.all),
- ntohs(conntrack->tuplehash[1].tuple.dst.u.all),
- /* Sorry, no init_seq, delta or previous_delta (yet). */
- 0, 0, 0,
- conntrack->timeout.expires - jiffies);
-
- return sprintf(buffer, "%-127s\n", temp);
-}
-
-/* Returns true when finished. */
-static int
-masq_iterate(const struct ip_conntrack_tuple_hash *hash,
- char *buffer, off_t offset, off_t *upto,
- unsigned int *len, unsigned int maxlen)
-{
- unsigned int newlen;
-
- IP_NF_ASSERT(hash->ctrack);
-
- /* Only count originals */
- if (DIRECTION(hash))
- return 0;
-
- if ((*upto)++ < offset)
- return 0;
-
- newlen = print_masq(buffer + *len, hash->ctrack);
- if (*len + newlen > maxlen)
- return 1;
- else *len += newlen;
-
- return 0;
-}
-
-/* Everything in the hash is masqueraded. */
-static int
-masq_procinfo(char *buffer, char **start, off_t offset, int length)
-{
- unsigned int i;
- int len = 0;
- off_t upto = 1;
-
- /* Header: first record */
- if (offset == 0) {
- char temp[128];
-
- sprintf(temp,
- "Prc FromIP FPrt ToIP TPrt Masq Init-seq Delta PDelta Expires (free=0,0,0)");
- len = sprintf(buffer, "%-127s\n", temp);
- offset = 1;
- }
-
- READ_LOCK(&ip_conntrack_lock);
- /* Traverse hash; print originals then reply. */
- for (i = 0; i < ip_conntrack_htable_size; i++) {
- if (LIST_FIND(&ip_conntrack_hash[i], masq_iterate,
- struct ip_conntrack_tuple_hash *,
- buffer, offset, &upto, &len, length))
- break;
- }
- READ_UNLOCK(&ip_conntrack_lock);
-
- /* `start' hack - see fs/proc/generic.c line ~165 */
- *start = (char *)((unsigned int)upto - offset);
- return len;
-}
-
-int __init masq_init(void)
-{
- int ret;
- struct proc_dir_entry *proc;
-
- ret = ip_conntrack_init();
- if (ret == 0) {
- ret = ip_nat_init();
- if (ret == 0) {
- proc = proc_net_create("ip_masquerade",
- 0, masq_procinfo);
- if (proc)
- proc->owner = THIS_MODULE;
- else {
- ip_nat_cleanup();
- ip_conntrack_cleanup();
- ret = -ENOMEM;
- }
- } else
- ip_conntrack_cleanup();
- }
-
- return ret;
-}
-
-void masq_cleanup(void)
-{
- ip_nat_cleanup();
- ip_conntrack_cleanup();
- proc_net_remove("ip_masquerade");
-}
+++ /dev/null
-/* This is a file to handle the "simple" NAT cases (redirect and
- masquerade) required for the compatibility layer.
-
- `bind to foreign address' and `getpeername' hacks are not
- supported.
-
- FIXME: Timing is overly simplistic. If anyone complains, make it
- use conntrack.
-*/
-
-/* (C) 1999-2001 Paul `Rusty' Russell
- * (C) 2002-2004 Netfilter Core Team <coreteam@netfilter.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/config.h>
-#include <linux/netfilter.h>
-#include <linux/ip.h>
-#include <linux/udp.h>
-#include <linux/tcp.h>
-#include <net/checksum.h>
-#include <net/ip.h>
-#include <linux/timer.h>
-#include <linux/netdevice.h>
-#include <linux/if.h>
-#include <linux/in.h>
-
-#include <linux/netfilter_ipv4/lockhelp.h>
-
-/* Very simple timeout pushed back by each packet */
-#define REDIR_TIMEOUT (240*HZ)
-
-static DECLARE_LOCK(redir_lock);
-#define ASSERT_READ_LOCK(x) MUST_BE_LOCKED(&redir_lock)
-#define ASSERT_WRITE_LOCK(x) MUST_BE_LOCKED(&redir_lock)
-
-#include <linux/netfilter_ipv4/listhelp.h>
-#include "ip_fw_compat.h"
-
-#if 0
-#define DEBUGP printk
-#else
-#define DEBUGP(format, args...)
-#endif
-
-#ifdef CONFIG_NETFILTER_DEBUG
-#define IP_NF_ASSERT(x) \
-do { \
- if (!(x)) \
- /* Wooah! I'm tripping my conntrack in a frenzy of \
- netplay... */ \
- printk("ASSERT: %s:%i(%s)\n", \
- __FILE__, __LINE__, __FUNCTION__); \
-} while(0)
-#else
-#define IP_NF_ASSERT(x)
-#endif
-
-static u_int16_t
-cheat_check(u_int32_t oldvalinv, u_int32_t newval, u_int16_t oldcheck)
-{
- u_int32_t diffs[] = { oldvalinv, newval };
- return csum_fold(csum_partial((char *)diffs, sizeof(diffs),
- oldcheck^0xFFFF));
-}
-
-struct redir_core {
- u_int32_t orig_srcip, orig_dstip;
- u_int16_t orig_sport, orig_dport;
-
- u_int32_t new_dstip;
- u_int16_t new_dport;
-};
-
-struct redir
-{
- struct list_head list;
- struct redir_core core;
- struct timer_list destroyme;
-};
-
-static LIST_HEAD(redirs);
-
-static int
-redir_cmp(const struct redir *i,
- u_int32_t orig_srcip, u_int32_t orig_dstip,
- u_int16_t orig_sport, u_int16_t orig_dport)
-{
- return (i->core.orig_srcip == orig_srcip
- && i->core.orig_dstip == orig_dstip
- && i->core.orig_sport == orig_sport
- && i->core.orig_dport == orig_dport);
-}
-
-/* Search for an existing redirection of the TCP packet. */
-static struct redir *
-find_redir(u_int32_t orig_srcip, u_int32_t orig_dstip,
- u_int16_t orig_sport, u_int16_t orig_dport)
-{
- return LIST_FIND(&redirs, redir_cmp, struct redir *,
- orig_srcip, orig_dstip, orig_sport, orig_dport);
-}
-
-static void do_tcp_redir(struct sk_buff *skb, struct redir *redir)
-{
- struct iphdr *iph = skb->nh.iph;
- struct tcphdr *tcph = (struct tcphdr *)((u_int32_t *)iph
- + iph->ihl);
-
- tcph->check = cheat_check(~redir->core.orig_dstip,
- redir->core.new_dstip,
- cheat_check(redir->core.orig_dport ^ 0xFFFF,
- redir->core.new_dport,
- tcph->check));
- iph->check = cheat_check(~redir->core.orig_dstip,
- redir->core.new_dstip, iph->check);
- tcph->dest = redir->core.new_dport;
- iph->daddr = redir->core.new_dstip;
-
- skb->nfcache |= NFC_ALTERED;
-}
-
-static int
-unredir_cmp(const struct redir *i,
- u_int32_t new_dstip, u_int32_t orig_srcip,
- u_int16_t new_dport, u_int16_t orig_sport)
-{
- return (i->core.orig_srcip == orig_srcip
- && i->core.new_dstip == new_dstip
- && i->core.orig_sport == orig_sport
- && i->core.new_dport == new_dport);
-}
-
-/* Match reply packet against redir */
-static struct redir *
-find_unredir(u_int32_t new_dstip, u_int32_t orig_srcip,
- u_int16_t new_dport, u_int16_t orig_sport)
-{
- return LIST_FIND(&redirs, unredir_cmp, struct redir *,
- new_dstip, orig_srcip, new_dport, orig_sport);
-}
-
-/* `unredir' a reply packet. */
-static void do_tcp_unredir(struct sk_buff *skb, struct redir *redir)
-{
- struct iphdr *iph = skb->nh.iph;
- struct tcphdr *tcph = (struct tcphdr *)((u_int32_t *)iph
- + iph->ihl);
-
- tcph->check = cheat_check(~redir->core.new_dstip,
- redir->core.orig_dstip,
- cheat_check(redir->core.new_dport ^ 0xFFFF,
- redir->core.orig_dport,
- tcph->check));
- iph->check = cheat_check(~redir->core.new_dstip,
- redir->core.orig_dstip,
- iph->check);
- tcph->source = redir->core.orig_dport;
- iph->saddr = redir->core.orig_dstip;
-
- skb->nfcache |= NFC_ALTERED;
-}
-
-static void destroyme(unsigned long me)
-{
- LOCK_BH(&redir_lock);
- LIST_DELETE(&redirs, (struct redir *)me);
- UNLOCK_BH(&redir_lock);
- kfree((struct redir *)me);
-}
-
-/* REDIRECT a packet. */
-unsigned int
-do_redirect(struct sk_buff *skb,
- const struct net_device *dev,
- u_int16_t redirpt)
-{
- struct iphdr *iph = skb->nh.iph;
- u_int32_t newdst;
-
- /* Figure out address: not loopback. */
- if (!dev)
- return NF_DROP;
-
- /* Grab first address on interface. */
- newdst = ((struct in_device *)dev->ip_ptr)->ifa_list->ifa_local;
-
- switch (iph->protocol) {
- case IPPROTO_UDP: {
- /* Simple mangle. */
- struct udphdr *udph = (struct udphdr *)((u_int32_t *)iph
- + iph->ihl);
-
- /* Must have whole header */
- if (skb->len < iph->ihl*4 + sizeof(*udph))
- return NF_DROP;
-
- if (udph->check) /* 0 is a special case meaning no checksum */
- udph->check = cheat_check(~iph->daddr, newdst,
- cheat_check(udph->dest ^ 0xFFFF,
- redirpt,
- udph->check));
- iph->check = cheat_check(~iph->daddr, newdst, iph->check);
- udph->dest = redirpt;
- iph->daddr = newdst;
-
- skb->nfcache |= NFC_ALTERED;
- return NF_ACCEPT;
- }
- case IPPROTO_TCP: {
- /* Mangle, maybe record. */
- struct tcphdr *tcph = (struct tcphdr *)((u_int32_t *)iph
- + iph->ihl);
- struct redir *redir;
- int ret;
-
- /* Must have whole header */
- if (skb->len < iph->ihl*4 + sizeof(*tcph))
- return NF_DROP;
-
- DEBUGP("Doing tcp redirect. %08X:%u %08X:%u -> %08X:%u\n",
- iph->saddr, tcph->source, iph->daddr, tcph->dest,
- newdst, redirpt);
- LOCK_BH(&redir_lock);
- redir = find_redir(iph->saddr, iph->daddr,
- tcph->source, tcph->dest);
-
- if (!redir) {
- redir = kmalloc(sizeof(struct redir), GFP_ATOMIC);
- if (!redir) {
- ret = NF_DROP;
- goto out;
- }
- list_prepend(&redirs, redir);
- init_timer(&redir->destroyme);
- redir->destroyme.function = destroyme;
- redir->destroyme.data = (unsigned long)redir;
- redir->destroyme.expires = jiffies + REDIR_TIMEOUT;
- add_timer(&redir->destroyme);
- }
- /* In case mangling has changed, rewrite this part. */
- redir->core = ((struct redir_core)
- { iph->saddr, iph->daddr,
- tcph->source, tcph->dest,
- newdst, redirpt });
- do_tcp_redir(skb, redir);
- ret = NF_ACCEPT;
-
- out:
- UNLOCK_BH(&redir_lock);
- return ret;
- }
-
- default: /* give up if not TCP or UDP. */
- return NF_DROP;
- }
-}
-
-/* Incoming packet: is it a reply to a masqueraded connection, or
- part of an already-redirected TCP connection? */
-void
-check_for_redirect(struct sk_buff *skb)
-{
- struct iphdr *iph = skb->nh.iph;
- struct tcphdr *tcph = (struct tcphdr *)((u_int32_t *)iph
- + iph->ihl);
- struct redir *redir;
-
- if (iph->protocol != IPPROTO_TCP)
- return;
-
- /* Must have whole header */
- if (skb->len < iph->ihl*4 + sizeof(*tcph))
- return;
-
- LOCK_BH(&redir_lock);
- redir = find_redir(iph->saddr, iph->daddr, tcph->source, tcph->dest);
- if (redir) {
- DEBUGP("Doing tcp redirect again.\n");
- do_tcp_redir(skb, redir);
- if (del_timer(&redir->destroyme)) {
- redir->destroyme.expires = jiffies + REDIR_TIMEOUT;
- add_timer(&redir->destroyme);
- }
- }
- UNLOCK_BH(&redir_lock);
-}
-
-void
-check_for_unredirect(struct sk_buff *skb)
-{
- struct iphdr *iph = skb->nh.iph;
- struct tcphdr *tcph = (struct tcphdr *)((u_int32_t *)iph
- + iph->ihl);
- struct redir *redir;
-
- if (iph->protocol != IPPROTO_TCP)
- return;
-
- /* Must have whole header */
- if (skb->len < iph->ihl*4 + sizeof(*tcph))
- return;
-
- LOCK_BH(&redir_lock);
- redir = find_unredir(iph->saddr, iph->daddr, tcph->source, tcph->dest);
- if (redir) {
- DEBUGP("Doing tcp unredirect.\n");
- do_tcp_unredir(skb, redir);
- if (del_timer(&redir->destroyme)) {
- redir->destroyme.expires = jiffies + REDIR_TIMEOUT;
- add_timer(&redir->destroyme);
- }
- }
- UNLOCK_BH(&redir_lock);
-}
+++ /dev/null
-#warning ipchains is obsolete, and will be removed soon.
-
-/* Minor modifications to fit on compatibility framework:
- Rusty.Russell@rustcorp.com.au
-*/
-
-/*
- * This code is heavily based on the code on the old ip_fw.c code; see below for
- * copyrights and attributions of the old code. This code is basically GPL.
- *
- * 15-Aug-1997: Major changes to allow graphs for firewall rules.
- * Paul Russell <Paul.Russell@rustcorp.com.au> and
- * Michael Neuling <Michael.Neuling@rustcorp.com.au>
- * 24-Aug-1997: Generalised protocol handling (not just TCP/UDP/ICMP).
- * Added explicit RETURN from chains.
- * Removed TOS mangling (done in ipchains 1.0.1).
- * Fixed read & reset bug by reworking proc handling.
- * Paul Russell <Paul.Russell@rustcorp.com.au>
- * 28-Sep-1997: Added packet marking for net sched code.
- * Removed fw_via comparisons: all done on device name now,
- * similar to changes in ip_fw.c in DaveM's CVS970924 tree.
- * Paul Russell <Paul.Russell@rustcorp.com.au>
- * 2-Nov-1997: Moved types across to __u16, etc.
- * Added inverse flags.
- * Fixed fragment bug (in args to port_match).
- * Changed mark to only one flag (MARKABS).
- * 21-Nov-1997: Added ability to test ICMP code.
- * 19-Jan-1998: Added wildcard interfaces.
- * 6-Feb-1998: Merged 2.0 and 2.1 versions.
- * Initialised ip_masq for 2.0.x version.
- * Added explicit NETLINK option for 2.1.x version.
- * Added packet and byte counters for policy matches.
- * 26-Feb-1998: Fixed race conditions, added SMP support.
- * 18-Mar-1998: Fix SMP, fix race condition fix.
- * 1-May-1998: Remove caching of device pointer.
- * 12-May-1998: Allow tiny fragment case for TCP/UDP.
- * 15-May-1998: Treat short packets as fragments, don't just block.
- * 3-Jan-1999: Fixed serious procfs security hole -- users should never
- * be allowed to view the chains!
- * Marc Santoro <ultima@snicker.emoti.com>
- * 29-Jan-1999: Locally generated bogus IPs dealt with, rather than crash
- * during dump_packet. --RR.
- * 19-May-1999: Star Wars: The Phantom Menace opened. Rule num
- * printed in log (modified from Michael Hasenstein's patch).
- * Added SYN in log message. --RR
- * 23-Jul-1999: Fixed small fragment security exposure opened on 15-May-1998.
- * John McDonald <jm@dataprotect.com>
- * Thomas Lopatic <tl@dataprotect.com>
- */
-
-/*
- *
- * The origina Linux port was done Alan Cox, with changes/fixes from
- * Pauline Middlelink, Jos Vos, Thomas Quinot, Wouter Gadeyne, Juan
- * Jose Ciarlante, Bernd Eckenfels, Keith Owens and others.
- *
- * Copyright from the original FreeBSD version follows:
- *
- * Copyright (c) 1993 Daniel Boulet
- * Copyright (c) 1994 Ugen J.S.Antsilevich
- *
- * Redistribution and use in source forms, with and without modification,
- * are permitted provided that this entire comment appears intact.
- *
- * Redistribution in binary form may occur without any restrictions.
- * Obviously, it would be nice if you gave credit where credit is due
- * but requiring it would be too onerous.
- *
- * This software is provided ``AS IS'' without any warranties of any kind. */
-
-#include <linux/config.h>
-
-#include <asm/uaccess.h>
-#include <asm/system.h>
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/errno.h>
-#include <linux/module.h>
-
-#include <linux/socket.h>
-#include <linux/sockios.h>
-#include <linux/in.h>
-#include <linux/inet.h>
-#include <linux/netdevice.h>
-#include <linux/icmp.h>
-#include <linux/udp.h>
-#include <net/ip.h>
-#include <net/protocol.h>
-#include <net/route.h>
-#include <net/tcp.h>
-#include <net/udp.h>
-#include <net/sock.h>
-#include <net/icmp.h>
-#include <linux/netlink.h>
-#include <linux/netfilter.h>
-#include <linux/netfilter_ipv4/compat_firewall.h>
-#include <linux/netfilter_ipv4/ipchains_core.h>
-#include <linux/netfilter_ipv4/ip_nat_core.h>
-
-#include <net/checksum.h>
-#include <linux/proc_fs.h>
-#include <linux/stat.h>
-
-MODULE_LICENSE("Dual BSD/GPL");
-MODULE_AUTHOR("Rusty Russell <rusty@rustcorp.com.au>");
-MODULE_DESCRIPTION("ipchains backwards compatibility layer");
-
-/* Understanding locking in this code: (thanks to Alan Cox for using
- * little words to explain this to me). -- PR
- *
- * In UP, there can be two packets traversing the chains:
- * 1) A packet from the current userspace context
- * 2) A packet off the bh handlers (timer or net).
- *
- * For SMP (kernel v2.1+), multiply this by # CPUs.
- *
- * [Note that this in not correct for 2.2 - because the socket code always
- * uses lock_kernel() to serialize, and bottom halves (timers and net_bhs)
- * only run on one CPU at a time. This will probably change for 2.3.
- * It is still good to use spinlocks because that avoids the global cli()
- * for updating the tables, which is rather costly in SMP kernels -AK]
- *
- * This means counters and backchains can get corrupted if no precautions
- * are taken.
- *
- * To actually alter a chain on UP, we need only do a cli(), as this will
- * stop a bh handler firing, as we are in the current userspace context
- * (coming from a setsockopt()).
- *
- * On SMP, we need a write_lock_irqsave(), which is a simple cli() in
- * UP.
- *
- * For backchains and counters, we use an array, indexed by
- * [smp_processor_id()*2 + !in_interrupt()]; the array is of
- * size [NR_CPUS*2]. For v2.0, NR_CPUS is effectively 1. So,
- * confident of uniqueness, we modify counters even though we only
- * have a read lock (to read the counters, you need a write lock,
- * though). */
-
-/* Why I didn't use straight locking... -- PR
- *
- * The backchains can be separated out of the ip_chains structure, and
- * allocated as needed inside ip_fw_check().
- *
- * The counters, however, can't. Trying to lock these means blocking
- * interrupts every time we want to access them. This would suck HARD
- * performance-wise. Not locking them leads to possible corruption,
- * made worse on 32-bit machines (counters are 64-bit). */
-
-/*#define DEBUG_IP_FIREWALL*/
-/*#define DEBUG_ALLOW_ALL*/ /* Useful for remote debugging */
-/*#define DEBUG_IP_FIREWALL_USER*/
-/*#define DEBUG_IP_FIREWALL_LOCKING*/
-
-#if defined(CONFIG_NETLINK_DEV) || defined(CONFIG_NETLINK_DEV_MODULE)
-static struct sock *ipfwsk;
-#endif
-
-#ifdef CONFIG_SMP
-#define SLOT_NUMBER() (smp_processor_id()*2 + !in_interrupt())
-#else /* !SMP */
-#define SLOT_NUMBER() (!in_interrupt())
-#endif /* CONFIG_SMP */
-#define NUM_SLOTS (NR_CPUS*2)
-
-#define SIZEOF_STRUCT_IP_CHAIN (sizeof(struct ip_chain) \
- + NUM_SLOTS*sizeof(struct ip_reent))
-#define SIZEOF_STRUCT_IP_FW_KERNEL (sizeof(struct ip_fwkernel) \
- + NUM_SLOTS*sizeof(struct ip_counters))
-
-#ifdef DEBUG_IP_FIREWALL_LOCKING
-static unsigned int fwc_rlocks, fwc_wlocks;
-#define FWC_DEBUG_LOCK(d) \
-do { \
- FWC_DONT_HAVE_LOCK(d); \
- d |= (1 << SLOT_NUMBER()); \
-} while (0)
-
-#define FWC_DEBUG_UNLOCK(d) \
-do { \
- FWC_HAVE_LOCK(d); \
- d &= ~(1 << SLOT_NUMBER()); \
-} while (0)
-
-#define FWC_DONT_HAVE_LOCK(d) \
-do { \
- if ((d) & (1 << SLOT_NUMBER())) \
- printk("%s:%i: Got lock on %i already!\n", \
- __FILE__, __LINE__, SLOT_NUMBER()); \
-} while(0)
-
-#define FWC_HAVE_LOCK(d) \
-do { \
- if (!((d) & (1 << SLOT_NUMBER()))) \
- printk("%s:%i:No lock on %i!\n", \
- __FILE__, __LINE__, SLOT_NUMBER()); \
-} while (0)
-
-#else
-#define FWC_DEBUG_LOCK(d) do { } while(0)
-#define FWC_DEBUG_UNLOCK(d) do { } while(0)
-#define FWC_DONT_HAVE_LOCK(d) do { } while(0)
-#define FWC_HAVE_LOCK(d) do { } while(0)
-#endif /*DEBUG_IP_FIRWALL_LOCKING*/
-
-#define FWC_READ_LOCK(l) do { FWC_DEBUG_LOCK(fwc_rlocks); read_lock(l); } while (0)
-#define FWC_WRITE_LOCK(l) do { FWC_DEBUG_LOCK(fwc_wlocks); write_lock(l); } while (0)
-#define FWC_READ_LOCK_IRQ(l,f) do { FWC_DEBUG_LOCK(fwc_rlocks); read_lock_irqsave(l,f); } while (0)
-#define FWC_WRITE_LOCK_IRQ(l,f) do { FWC_DEBUG_LOCK(fwc_wlocks); write_lock_irqsave(l,f); } while (0)
-#define FWC_READ_UNLOCK(l) do { FWC_DEBUG_UNLOCK(fwc_rlocks); read_unlock(l); } while (0)
-#define FWC_WRITE_UNLOCK(l) do { FWC_DEBUG_UNLOCK(fwc_wlocks); write_unlock(l); } while (0)
-#define FWC_READ_UNLOCK_IRQ(l,f) do { FWC_DEBUG_UNLOCK(fwc_rlocks); read_unlock_irqrestore(l,f); } while (0)
-#define FWC_WRITE_UNLOCK_IRQ(l,f) do { FWC_DEBUG_UNLOCK(fwc_wlocks); write_unlock_irqrestore(l,f); } while (0)
-
-struct ip_chain;
-
-struct ip_counters
-{
- __u64 pcnt, bcnt; /* Packet and byte counters */
-};
-
-struct ip_fwkernel
-{
- struct ip_fw ipfw;
- struct ip_fwkernel *next; /* where to go next if current
- * rule doesn't match */
- struct ip_chain *branch; /* which branch to jump to if
- * current rule matches */
- int simplebranch; /* Use this if branch == NULL */
- struct ip_counters counters[0]; /* Actually several of these */
-};
-
-struct ip_reent
-{
- struct ip_chain *prevchain; /* Pointer to referencing chain */
- struct ip_fwkernel *prevrule; /* Pointer to referencing rule */
- struct ip_counters counters;
-};
-
-struct ip_chain
-{
- ip_chainlabel label; /* Defines the label for each block */
- struct ip_chain *next; /* Pointer to next block */
- struct ip_fwkernel *chain; /* Pointer to first rule in block */
- __u32 refcount; /* Number of refernces to block */
- int policy; /* Default rule for chain. Only *
- * used in built in chains */
- struct ip_reent reent[0]; /* Actually several of these */
-};
-
-/*
- * Implement IP packet firewall
- */
-
-#ifdef DEBUG_IP_FIREWALL
-#define dprintf(format, args...) printk(format , ## args)
-#else
-#define dprintf(format, args...)
-#endif
-
-#ifdef DEBUG_IP_FIREWALL_USER
-#define duprintf(format, args...) printk(format , ## args)
-#else
-#define duprintf(format, args...)
-#endif
-
-/* Lock around ip_fw_chains linked list structure */
-rwlock_t ip_fw_lock = RW_LOCK_UNLOCKED;
-
-/* Head of linked list of fw rules */
-static struct ip_chain *ip_fw_chains;
-
-#define IP_FW_INPUT_CHAIN ip_fw_chains
-#define IP_FW_FORWARD_CHAIN (ip_fw_chains->next)
-#define IP_FW_OUTPUT_CHAIN (ip_fw_chains->next->next)
-
-/* Returns 1 if the port is matched by the range, 0 otherwise */
-extern inline int port_match(__u16 min, __u16 max, __u16 port,
- int frag, int invert)
-{
- if (frag) /* Fragments fail ANY port test. */
- return (min == 0 && max == 0xFFFF);
- else return (port >= min && port <= max) ^ invert;
-}
-
-/* Returns whether matches rule or not. */
-static int ip_rule_match(struct ip_fwkernel *f,
- const char *ifname,
- struct sk_buff **pskb,
- char tcpsyn,
- __u16 src_port, __u16 dst_port,
- char isfrag)
-{
- struct iphdr *ip = (*pskb)->nh.iph;
-
-#define FWINV(bool,invflg) ((bool) ^ !!(f->ipfw.fw_invflg & invflg))
- /*
- * This is a bit simpler as we don't have to walk
- * an interface chain as you do in BSD - same logic
- * however.
- */
-
- if (FWINV((ip->saddr&f->ipfw.fw_smsk.s_addr) != f->ipfw.fw_src.s_addr,
- IP_FW_INV_SRCIP)
- || FWINV((ip->daddr&f->ipfw.fw_dmsk.s_addr)!=f->ipfw.fw_dst.s_addr,
- IP_FW_INV_DSTIP)) {
- dprintf("Source or dest mismatch.\n");
-
- dprintf("SRC: %u. Mask: %u. Target: %u.%s\n", ip->saddr,
- f->ipfw.fw_smsk.s_addr, f->ipfw.fw_src.s_addr,
- f->ipfw.fw_invflg & IP_FW_INV_SRCIP ? " (INV)" : "");
- dprintf("DST: %u. Mask: %u. Target: %u.%s\n", ip->daddr,
- f->ipfw.fw_dmsk.s_addr, f->ipfw.fw_dst.s_addr,
- f->ipfw.fw_invflg & IP_FW_INV_DSTIP ? " (INV)" : "");
- return 0;
- }
-
- /*
- * Look for a VIA device match
- */
- if (f->ipfw.fw_flg & IP_FW_F_WILDIF) {
- if (FWINV(strncmp(ifname, f->ipfw.fw_vianame,
- strlen(f->ipfw.fw_vianame)) != 0,
- IP_FW_INV_VIA)) {
- dprintf("Wildcard interface mismatch.%s\n",
- f->ipfw.fw_invflg & IP_FW_INV_VIA ? " (INV)" : "");
- return 0; /* Mismatch */
- }
- }
- else if (FWINV(strcmp(ifname, f->ipfw.fw_vianame) != 0,
- IP_FW_INV_VIA)) {
- dprintf("Interface name does not match.%s\n",
- f->ipfw.fw_invflg & IP_FW_INV_VIA
- ? " (INV)" : "");
- return 0; /* Mismatch */
- }
-
- /*
- * Ok the chain addresses match.
- */
-
- /* If we have a fragment rule but the packet is not a fragment
- * the we return zero */
- if (FWINV((f->ipfw.fw_flg&IP_FW_F_FRAG) && !isfrag, IP_FW_INV_FRAG)) {
- dprintf("Fragment rule but not fragment.%s\n",
- f->ipfw.fw_invflg & IP_FW_INV_FRAG ? " (INV)" : "");
- return 0;
- }
-
- /* Fragment NEVER passes a SYN test, even an inverted one. */
- if (FWINV((f->ipfw.fw_flg&IP_FW_F_TCPSYN) && !tcpsyn, IP_FW_INV_SYN)
- || (isfrag && (f->ipfw.fw_flg&IP_FW_F_TCPSYN))) {
- dprintf("Rule requires SYN and packet has no SYN.%s\n",
- f->ipfw.fw_invflg & IP_FW_INV_SYN ? " (INV)" : "");
- return 0;
- }
-
- if (f->ipfw.fw_proto) {
- /*
- * Specific firewall - packet's protocol
- * must match firewall's.
- */
-
- if (FWINV(ip->protocol!=f->ipfw.fw_proto, IP_FW_INV_PROTO)) {
- dprintf("Packet protocol %hi does not match %hi.%s\n",
- ip->protocol, f->ipfw.fw_proto,
- f->ipfw.fw_invflg&IP_FW_INV_PROTO ? " (INV)":"");
- return 0;
- }
-
- /* For non TCP/UDP/ICMP, port range is max anyway. */
- if (!port_match(f->ipfw.fw_spts[0],
- f->ipfw.fw_spts[1],
- src_port, isfrag,
- !!(f->ipfw.fw_invflg&IP_FW_INV_SRCPT))
- || !port_match(f->ipfw.fw_dpts[0],
- f->ipfw.fw_dpts[1],
- dst_port, isfrag,
- !!(f->ipfw.fw_invflg
- &IP_FW_INV_DSTPT))) {
- dprintf("Port match failed.\n");
- return 0;
- }
- }
-
- dprintf("Match succeeded.\n");
- return 1;
-}
-
-static const char *branchname(struct ip_chain *branch,int simplebranch)
-{
- if (branch)
- return branch->label;
- switch (simplebranch)
- {
- case FW_BLOCK: return IP_FW_LABEL_BLOCK;
- case FW_ACCEPT: return IP_FW_LABEL_ACCEPT;
- case FW_REJECT: return IP_FW_LABEL_REJECT;
- case FW_REDIRECT: return IP_FW_LABEL_REDIRECT;
- case FW_MASQUERADE: return IP_FW_LABEL_MASQUERADE;
- case FW_SKIP: return "-";
- case FW_SKIP+1: return IP_FW_LABEL_RETURN;
- default:
- return "UNKNOWN";
- }
-}
-
-/*
- * VERY ugly piece of code which actually
- * makes kernel printf for matching packets...
- */
-static void dump_packet(struct sk_buff **pskb,
- const char *ifname,
- struct ip_fwkernel *f,
- const ip_chainlabel chainlabel,
- __u16 src_port,
- __u16 dst_port,
- unsigned int count,
- int syn)
-{
- __u32 *opt = (__u32 *) ((*pskb)->nh.iph + 1);
- int opti;
-
- if (f) {
- printk(KERN_INFO "Packet log: %s ",chainlabel);
- printk("%s ",branchname(f->branch,f->simplebranch));
- if (f->simplebranch==FW_REDIRECT)
- printk("%d ",f->ipfw.fw_redirpt);
- }
-
- printk("%s PROTO=%d %u.%u.%u.%u:%hu %u.%u.%u.%u:%hu"
- " L=%hu S=0x%2.2hX I=%hu F=0x%4.4hX T=%hu",
- ifname, (*pskb)->nh.iph->protocol,
- NIPQUAD((*pskb)->nh.iph->saddr),
- src_port,
- NIPQUAD((*pskb)->nh.iph->daddr),
- dst_port,
- ntohs((*pskb)->nh.iph->tot_len),
- (*pskb)->nh.iph->tos,
- ntohs((*pskb)->nh.iph->id),
- ntohs((*pskb)->nh.iph->frag_off),
- (*pskb)->nh.iph->ttl);
-
- for (opti = 0; opti < ((*pskb)->nh.iph->ihl - sizeof(struct iphdr) / 4); opti++)
- printk(" O=0x%8.8X", *opt++);
- printk(" %s(#%d)\n", syn ? "SYN " : /* "PENANCE" */ "", count);
-}
-
-/* function for checking chain labels for user space. */
-static int check_label(ip_chainlabel label)
-{
- unsigned int i;
- /* strlen must be < IP_FW_MAX_LABEL_LENGTH. */
- for (i = 0; i < IP_FW_MAX_LABEL_LENGTH + 1; i++)
- if (label[i] == '\0') return 1;
-
- return 0;
-}
-
-/* This function returns a pointer to the first chain with a label
- * that matches the one given. */
-static struct ip_chain *find_label(ip_chainlabel label)
-{
- struct ip_chain *tmp;
- FWC_HAVE_LOCK(fwc_rlocks | fwc_wlocks);
- for (tmp = ip_fw_chains; tmp; tmp = tmp->next)
- if (strcmp(tmp->label,label) == 0)
- break;
- return tmp;
-}
-
-/* This function returns a boolean which when true sets answer to one
- of the FW_*. */
-static int find_special(ip_chainlabel label, int *answer)
-{
- if (label[0] == '\0') {
- *answer = FW_SKIP; /* => pass-through rule */
- return 1;
- } else if (strcmp(label,IP_FW_LABEL_ACCEPT) == 0) {
- *answer = FW_ACCEPT;
- return 1;
- } else if (strcmp(label,IP_FW_LABEL_BLOCK) == 0) {
- *answer = FW_BLOCK;
- return 1;
- } else if (strcmp(label,IP_FW_LABEL_REJECT) == 0) {
- *answer = FW_REJECT;
- return 1;
- } else if (strcmp(label,IP_FW_LABEL_REDIRECT) == 0) {
- *answer = FW_REDIRECT;
- return 1;
- } else if (strcmp(label,IP_FW_LABEL_MASQUERADE) == 0) {
- *answer = FW_MASQUERADE;
- return 1;
- } else if (strcmp(label, IP_FW_LABEL_RETURN) == 0) {
- *answer = FW_SKIP+1;
- return 1;
- } else {
- return 0;
- }
-}
-
-/* This function cleans up the prevchain and prevrule. If the verbose
- * flag is set then he names of the chains will be printed as it
- * cleans up. */
-static void cleanup(struct ip_chain *chain,
- const int verbose,
- unsigned int slot)
-{
- struct ip_chain *tmpchain = chain->reent[slot].prevchain;
- if (verbose)
- printk(KERN_ERR "Chain backtrace: ");
- while (tmpchain) {
- if (verbose)
- printk("%s<-",chain->label);
- chain->reent[slot].prevchain = NULL;
- chain = tmpchain;
- tmpchain = chain->reent[slot].prevchain;
- }
- if (verbose)
- printk("%s\n",chain->label);
-}
-
-static inline int
-ip_fw_domatch(struct ip_fwkernel *f,
- const char *rif,
- const ip_chainlabel label,
- struct sk_buff **pskb,
- unsigned int slot,
- __u16 src_port, __u16 dst_port,
- unsigned int count,
- int tcpsyn,
- unsigned char *tos)
-{
- f->counters[slot].bcnt+=ntohs((*pskb)->nh.iph->tot_len);
- f->counters[slot].pcnt++;
- if (f->ipfw.fw_flg & IP_FW_F_PRN) {
- dump_packet(pskb,rif,f,label,src_port,dst_port,count,tcpsyn);
- }
-
- *tos = (*tos & f->ipfw.fw_tosand) ^ f->ipfw.fw_tosxor;
-
-/* This functionality is useless in stock 2.0.x series, but we don't
- * discard the mark thing altogether, to avoid breaking ipchains (and,
- * more importantly, the ipfwadm wrapper) --PR */
- if (f->ipfw.fw_flg & IP_FW_F_MARKABS) {
- (*pskb)->nfmark = f->ipfw.fw_mark;
- } else {
- (*pskb)->nfmark += f->ipfw.fw_mark;
- }
- if (f->ipfw.fw_flg & IP_FW_F_NETLINK) {
-#if defined(CONFIG_NETLINK_DEV) || defined(CONFIG_NETLINK_DEV_MODULE)
- size_t len = min_t(unsigned int, f->ipfw.fw_outputsize, ntohs((*pskb)->nh.iph->tot_len))
- + sizeof(__u32) + sizeof((*pskb)->nfmark) + IFNAMSIZ;
- struct sk_buff *outskb=alloc_skb(len, GFP_ATOMIC);
-
- duprintf("Sending packet out NETLINK (length = %u).\n",
- (unsigned int)len);
- if (outskb) {
- /* Prepend length, mark & interface */
- skb_put(outskb, len);
- *((__u32 *)outskb->data) = (__u32)len;
- *((__u32 *)(outskb->data+sizeof(__u32))) =
- (*pskb)->nfmark;
- strcpy(outskb->data+sizeof(__u32)*2, rif);
- skb_copy_bits(*pskb,
- ((char *)(*pskb)->nh.iph - (char *)(*pskb)->data),
- outskb->data+sizeof(__u32)*2+IFNAMSIZ,
- len-(sizeof(__u32)*2+IFNAMSIZ));
- netlink_broadcast(ipfwsk, outskb, 0, ~0, GFP_ATOMIC);
- }
- else {
-#endif
- if (net_ratelimit())
- printk(KERN_WARNING "ip_fw: packet drop due to "
- "netlink failure\n");
- return 0;
-#if defined(CONFIG_NETLINK_DEV) || defined(CONFIG_NETLINK_DEV_MODULE)
- }
-#endif
- }
- return 1;
-}
-
-/*
- * Returns one of the generic firewall policies, like FW_ACCEPT.
- *
- * The testing is either false for normal firewall mode or true for
- * user checking mode (counters are not updated, TOS & mark not done).
- */
-static int
-ip_fw_check(const char *rif,
- __u16 *redirport,
- struct ip_chain *chain,
- struct sk_buff **pskb,
- unsigned int slot,
- int testing)
-{
- __u32 src, dst;
- __u16 src_port = 0xFFFF, dst_port = 0xFFFF;
- char tcpsyn=0;
- __u16 offset;
- unsigned char tos;
- struct ip_fwkernel *f;
- int ret = FW_SKIP+2;
- unsigned int count;
-
- /* We handle fragments by dealing with the first fragment as
- * if it was a normal packet. All other fragments are treated
- * normally, except that they will NEVER match rules that ask
- * things we don't know, ie. tcp syn flag or ports). If the
- * rule is also a fragment-specific rule, non-fragments won't
- * match it. */
-
- offset = ntohs((*pskb)->nh.iph->frag_off) & IP_OFFSET;
-
- /*
- * Don't allow a fragment of TCP 8 bytes in. Nobody
- * normal causes this. Its a cracker trying to break
- * in by doing a flag overwrite to pass the direction
- * checks.
- */
- if (offset == 1 && (*pskb)->nh.iph->protocol == IPPROTO_TCP) {
- if (!testing && net_ratelimit()) {
- printk("Suspect TCP fragment.\n");
- dump_packet(pskb,rif,NULL,NULL,0,0,0,0);
- }
- return FW_BLOCK;
- }
-
- /* If we can't investigate ports, treat as fragment. It's
- * either a trucated whole packet, or a truncated first
- * fragment, or a TCP first fragment of length 8-15, in which
- * case the above rule stops reassembly.
- */
- if (offset == 0) {
- unsigned int size_req;
- switch ((*pskb)->nh.iph->protocol) {
- case IPPROTO_TCP:
- /* Don't care about things past flags word */
- size_req = 16;
- break;
-
- case IPPROTO_UDP:
- case IPPROTO_ICMP:
- size_req = 8;
- break;
-
- default:
- size_req = 0;
- }
-
- /* If it is a truncated first fragment then it can be
- * used to rewrite port information, and thus should
- * be blocked.
- */
- if (ntohs((*pskb)->nh.iph->tot_len) <
- ((*pskb)->nh.iph->ihl<<2)+size_req) {
- if (!testing && net_ratelimit()) {
- printk("Suspect short first fragment.\n");
- dump_packet(pskb,rif,NULL,NULL,0,0,0,0);
- }
- return FW_BLOCK;
- }
- }
-
- src = (*pskb)->nh.iph->saddr;
- dst = (*pskb)->nh.iph->daddr;
- tos = (*pskb)->nh.iph->tos;
-
- /*
- * If we got interface from which packet came
- * we can use the address directly. Linux 2.1 now uses address
- * chains per device too, but unlike BSD we first check if the
- * incoming packet matches a device address and the routing
- * table before calling the firewall.
- */
-
- dprintf("Packet ");
- switch ((*pskb)->nh.iph->protocol) {
- case IPPROTO_TCP:
- dprintf("TCP ");
- if (!offset) {
- struct tcphdr _tcph, *th;
-
- th = skb_header_pointer(*pskb,
- (*pskb)->nh.iph->ihl*4,
- sizeof(_tcph), &_tcph);
- if (th == NULL)
- return FW_BLOCK;
-
- src_port = ntohs(th->source);
- dst_port = ntohs(th->dest);
-
- /* Connection initilisation can only
- * be made when the syn bit is set and
- * neither of the ack or reset is
- * set. */
- if (th->syn && !(th->ack || th->rst))
- tcpsyn = 1;
- }
- break;
- case IPPROTO_UDP:
- dprintf("UDP ");
- if (!offset) {
- struct udphdr _udph, *uh;
-
- uh = skb_header_pointer(*pskb,
- (*pskb)->nh.iph->ihl*4,
- sizeof(_udph), &_udph);
- if (uh == NULL)
- return FW_BLOCK;
-
- src_port = ntohs(uh->source);
- dst_port = ntohs(uh->dest);
- }
- break;
- case IPPROTO_ICMP:
- if (!offset) {
- struct icmphdr _icmph, *ic;
-
- ic = skb_header_pointer(*pskb,
- (*pskb)->nh.iph->ihl*4,
- sizeof(_icmph),
- &_icmph);
- if (ic == NULL)
- return FW_BLOCK;
-
- src_port = (__u16) ic->type;
- dst_port = (__u16) ic->code;
- }
- dprintf("ICMP ");
- break;
- default:
- dprintf("p=%d ", (*pskb)->nh.iph->protocol);
- break;
- }
-#ifdef DEBUG_IP_FIREWALL
- print_ip((*pskb)->nh.iph->saddr);
-
- if (offset)
- dprintf(":fragment (%i) ", ((int)offset)<<2);
- else if ((*pskb)->nh.iph->protocol == IPPROTO_TCP ||
- (*pskb)->nh.iph->protocol == IPPROTO_UDP ||
- (*pskb)->nh.iph->protocol == IPPROTO_ICMP)
- dprintf(":%hu:%hu", src_port, dst_port);
- dprintf("\n");
-#endif
-
- if (!testing) FWC_READ_LOCK(&ip_fw_lock);
- else FWC_HAVE_LOCK(fwc_rlocks);
-
- f = chain->chain;
- do {
- count = 0;
- for (; f; f = f->next) {
- count++;
- if (ip_rule_match(f, rif, pskb,
- tcpsyn, src_port, dst_port,
- offset)) {
- if (!testing
- && !ip_fw_domatch(f, rif, chain->label,
- pskb, slot,
- src_port, dst_port,
- count, tcpsyn, &tos)) {
- ret = FW_BLOCK;
- cleanup(chain, 0, slot);
- goto out;
- }
- break;
- }
- }
- if (f) {
- if (f->branch) {
- /* Do sanity check to see if we have
- * already set prevchain and if so we
- * must be in a loop */
- if (f->branch->reent[slot].prevchain) {
- if (!testing) {
- printk(KERN_ERR
- "IP firewall: "
- "Loop detected "
- "at `%s'.\n",
- f->branch->label);
- cleanup(chain, 1, slot);
- ret = FW_BLOCK;
- } else {
- cleanup(chain, 0, slot);
- ret = FW_SKIP+1;
- }
- }
- else {
- f->branch->reent[slot].prevchain
- = chain;
- f->branch->reent[slot].prevrule
- = f->next;
- chain = f->branch;
- f = chain->chain;
- }
- }
- else if (f->simplebranch == FW_SKIP)
- f = f->next;
- else if (f->simplebranch == FW_SKIP+1) {
- /* Just like falling off the chain */
- goto fall_off_chain;
- } else {
- cleanup(chain, 0, slot);
- ret = f->simplebranch;
- }
- } /* f == NULL */
- else {
- fall_off_chain:
- if (chain->reent[slot].prevchain) {
- struct ip_chain *tmp = chain;
- f = chain->reent[slot].prevrule;
- chain = chain->reent[slot].prevchain;
- tmp->reent[slot].prevchain = NULL;
- }
- else {
- ret = chain->policy;
- if (!testing) {
- chain->reent[slot].counters.pcnt++;
- chain->reent[slot].counters.bcnt
- += ntohs((*pskb)->nh.iph->tot_len);
- }
- }
- }
- } while (ret == FW_SKIP+2);
-
- out:
- if (!testing) FWC_READ_UNLOCK(&ip_fw_lock);
-
- /* Recalculate checksum if not going to reject, and TOS changed. */
- if ((*pskb)->nh.iph->tos != tos
- && ret != FW_REJECT && ret != FW_BLOCK
- && !testing) {
- if (!skb_ip_make_writable(pskb, offsetof(struct iphdr, tos)+1))
- ret = FW_BLOCK;
- else {
- (*pskb)->nh.iph->tos = tos;
- ip_send_check((*pskb)->nh.iph);
- }
- }
-
- if (ret == FW_REDIRECT && redirport) {
- if ((*redirport = htons(f->ipfw.fw_redirpt)) == 0) {
- /* Wildcard redirection.
- * Note that redirport will become
- * 0xFFFF for non-TCP/UDP packets.
- */
- *redirport = htons(dst_port);
- }
- }
-
-#ifdef DEBUG_ALLOW_ALL
- return (testing ? ret : FW_ACCEPT);
-#else
- return ret;
-#endif
-}
-
-/* Must have write lock & interrupts off for any of these */
-
-/* This function sets all the byte counters in a chain to zero. The
- * input is a pointer to the chain required for zeroing */
-static int zero_fw_chain(struct ip_chain *chainptr)
-{
- struct ip_fwkernel *i;
-
- FWC_HAVE_LOCK(fwc_wlocks);
- for (i = chainptr->chain; i; i = i->next)
- memset(i->counters, 0, sizeof(struct ip_counters)*NUM_SLOTS);
- return 0;
-}
-
-static int clear_fw_chain(struct ip_chain *chainptr)
-{
- struct ip_fwkernel *i= chainptr->chain;
-
- FWC_HAVE_LOCK(fwc_wlocks);
- chainptr->chain=NULL;
-
- while (i) {
- struct ip_fwkernel *tmp = i->next;
- if (i->branch)
- i->branch->refcount--;
- kfree(i);
- i = tmp;
- /* We will block in cleanup's unregister sockopt if unloaded,
- so this is safe. */
- module_put(THIS_MODULE);
- }
- return 0;
-}
-
-static int replace_in_chain(struct ip_chain *chainptr,
- struct ip_fwkernel *frwl,
- __u32 position)
-{
- struct ip_fwkernel *f = chainptr->chain;
-
- FWC_HAVE_LOCK(fwc_wlocks);
-
- while (--position && f != NULL) f = f->next;
- if (f == NULL)
- return EINVAL;
-
- if (f->branch) f->branch->refcount--;
- if (frwl->branch) frwl->branch->refcount++;
-
- frwl->next = f->next;
- memcpy(f,frwl,sizeof(struct ip_fwkernel));
- kfree(frwl);
- return 0;
-}
-
-static int append_to_chain(struct ip_chain *chainptr, struct ip_fwkernel *rule)
-{
- struct ip_fwkernel *i;
-
- FWC_HAVE_LOCK(fwc_wlocks);
-
- /* Are we unloading now? We will block on nf_unregister_sockopt */
- if (!try_module_get(THIS_MODULE))
- return ENOPROTOOPT;
-
- /* Special case if no rules already present */
- if (chainptr->chain == NULL) {
-
- /* If pointer writes are atomic then turning off
- * interrupts is not necessary. */
- chainptr->chain = rule;
- if (rule->branch) rule->branch->refcount++;
- goto append_successful;
- }
-
- /* Find the rule before the end of the chain */
- for (i = chainptr->chain; i->next; i = i->next);
- i->next = rule;
- if (rule->branch) rule->branch->refcount++;
-
-append_successful:
- return 0;
-}
-
-/* This function inserts a rule at the position of position in the
- * chain refenced by chainptr. If position is 1 then this rule will
- * become the new rule one. */
-static int insert_in_chain(struct ip_chain *chainptr,
- struct ip_fwkernel *frwl,
- __u32 position)
-{
- struct ip_fwkernel *f = chainptr->chain;
-
- FWC_HAVE_LOCK(fwc_wlocks);
-
- /* Are we unloading now? We will block on nf_unregister_sockopt */
- if (!try_module_get(THIS_MODULE))
- return ENOPROTOOPT;
-
- /* special case if the position is number 1 */
- if (position == 1) {
- frwl->next = chainptr->chain;
- if (frwl->branch) frwl->branch->refcount++;
- chainptr->chain = frwl;
- goto insert_successful;
- }
- position--;
- while (--position && f != NULL) f = f->next;
- if (f == NULL)
- return EINVAL;
- if (frwl->branch) frwl->branch->refcount++;
- frwl->next = f->next;
-
- f->next = frwl;
-
-insert_successful:
- return 0;
-}
-
-/* This function deletes the a rule from a given rulenum and chain.
- * With rulenum = 1 is the first rule is deleted. */
-
-static int del_num_from_chain(struct ip_chain *chainptr, __u32 rulenum)
-{
- struct ip_fwkernel *i=chainptr->chain,*tmp;
-
- FWC_HAVE_LOCK(fwc_wlocks);
-
- if (!chainptr->chain)
- return ENOENT;
-
- /* Need a special case for the first rule */
- if (rulenum == 1) {
- /* store temp to allow for freeing up of memory */
- tmp = chainptr->chain;
- if (chainptr->chain->branch) chainptr->chain->branch->refcount--;
- chainptr->chain = chainptr->chain->next;
- kfree(tmp); /* free memory that is now unused */
- } else {
- rulenum--;
- while (--rulenum && i->next ) i = i->next;
- if (!i->next)
- return ENOENT;
- tmp = i->next;
- if (i->next->branch)
- i->next->branch->refcount--;
- i->next = i->next->next;
- kfree(tmp);
- }
-
- /* We will block in cleanup's unregister sockopt if unloaded,
- so this is safe. */
- module_put(THIS_MODULE);
- return 0;
-}
-
-
-/* This function deletes the a rule from a given rule and chain.
- * The rule that is deleted is the first occursance of that rule. */
-static int del_rule_from_chain(struct ip_chain *chainptr,
- struct ip_fwkernel *frwl)
-{
- struct ip_fwkernel *ltmp,*ftmp = chainptr->chain ;
- int was_found;
-
- FWC_HAVE_LOCK(fwc_wlocks);
-
- /* Sure, we should compare marks, but since the `ipfwadm'
- * script uses it for an unholy hack... well, life is easier
- * this way. We also mask it out of the flags word. --PR */
- for (ltmp=NULL, was_found=0;
- !was_found && ftmp != NULL;
- ltmp = ftmp,ftmp = ftmp->next) {
- if (ftmp->ipfw.fw_src.s_addr!=frwl->ipfw.fw_src.s_addr
- || ftmp->ipfw.fw_dst.s_addr!=frwl->ipfw.fw_dst.s_addr
- || ftmp->ipfw.fw_smsk.s_addr!=frwl->ipfw.fw_smsk.s_addr
- || ftmp->ipfw.fw_dmsk.s_addr!=frwl->ipfw.fw_dmsk.s_addr
-#if 0
- || ftmp->ipfw.fw_flg!=frwl->ipfw.fw_flg
-#else
- || ((ftmp->ipfw.fw_flg & ~IP_FW_F_MARKABS)
- != (frwl->ipfw.fw_flg & ~IP_FW_F_MARKABS))
-#endif
- || ftmp->ipfw.fw_invflg!=frwl->ipfw.fw_invflg
- || ftmp->ipfw.fw_proto!=frwl->ipfw.fw_proto
-#if 0
- || ftmp->ipfw.fw_mark!=frwl->ipfw.fw_mark
-#endif
- || ftmp->ipfw.fw_redirpt!=frwl->ipfw.fw_redirpt
- || ftmp->ipfw.fw_spts[0]!=frwl->ipfw.fw_spts[0]
- || ftmp->ipfw.fw_spts[1]!=frwl->ipfw.fw_spts[1]
- || ftmp->ipfw.fw_dpts[0]!=frwl->ipfw.fw_dpts[0]
- || ftmp->ipfw.fw_dpts[1]!=frwl->ipfw.fw_dpts[1]
- || ftmp->ipfw.fw_outputsize!=frwl->ipfw.fw_outputsize) {
- duprintf("del_rule_from_chain: mismatch:"
- "src:%u/%u dst:%u/%u smsk:%u/%u dmsk:%u/%u "
- "flg:%hX/%hX invflg:%hX/%hX proto:%u/%u "
- "mark:%u/%u "
- "ports:%hu-%hu/%hu-%hu %hu-%hu/%hu-%hu "
- "outputsize:%hu-%hu\n",
- ftmp->ipfw.fw_src.s_addr,
- frwl->ipfw.fw_src.s_addr,
- ftmp->ipfw.fw_dst.s_addr,
- frwl->ipfw.fw_dst.s_addr,
- ftmp->ipfw.fw_smsk.s_addr,
- frwl->ipfw.fw_smsk.s_addr,
- ftmp->ipfw.fw_dmsk.s_addr,
- frwl->ipfw.fw_dmsk.s_addr,
- ftmp->ipfw.fw_flg,
- frwl->ipfw.fw_flg,
- ftmp->ipfw.fw_invflg,
- frwl->ipfw.fw_invflg,
- ftmp->ipfw.fw_proto,
- frwl->ipfw.fw_proto,
- ftmp->ipfw.fw_mark,
- frwl->ipfw.fw_mark,
- ftmp->ipfw.fw_spts[0],
- frwl->ipfw.fw_spts[0],
- ftmp->ipfw.fw_spts[1],
- frwl->ipfw.fw_spts[1],
- ftmp->ipfw.fw_dpts[0],
- frwl->ipfw.fw_dpts[0],
- ftmp->ipfw.fw_dpts[1],
- frwl->ipfw.fw_dpts[1],
- ftmp->ipfw.fw_outputsize,
- frwl->ipfw.fw_outputsize);
- continue;
- }
-
- if (strncmp(ftmp->ipfw.fw_vianame,
- frwl->ipfw.fw_vianame,
- IFNAMSIZ)) {
- duprintf("del_rule_from_chain: if mismatch: %s/%s\n",
- ftmp->ipfw.fw_vianame,
- frwl->ipfw.fw_vianame);
- continue;
- }
- if (ftmp->branch != frwl->branch) {
- duprintf("del_rule_from_chain: branch mismatch: "
- "%s/%s\n",
- ftmp->branch?ftmp->branch->label:"(null)",
- frwl->branch?frwl->branch->label:"(null)");
- continue;
- }
- if (ftmp->branch == NULL
- && ftmp->simplebranch != frwl->simplebranch) {
- duprintf("del_rule_from_chain: simplebranch mismatch: "
- "%i/%i\n",
- ftmp->simplebranch, frwl->simplebranch);
- continue;
- }
- was_found = 1;
- if (ftmp->branch)
- ftmp->branch->refcount--;
- if (ltmp)
- ltmp->next = ftmp->next;
- else
- chainptr->chain = ftmp->next;
- kfree(ftmp);
- /* We will block in cleanup's unregister sockopt if unloaded,
- so this is safe. */
- module_put(THIS_MODULE);
- break;
- }
-
- if (was_found)
- return 0;
- else {
- duprintf("del_rule_from_chain: no matching rule found\n");
- return EINVAL;
- }
-}
-
-/* This function takes the label of a chain and deletes the first
- * chain with that name. No special cases required for the built in
- * chains as they have their refcount initilised to 1 so that they are
- * never deleted. */
-static int del_chain(ip_chainlabel label)
-{
- struct ip_chain *tmp,*tmp2;
-
- FWC_HAVE_LOCK(fwc_wlocks);
- /* Corner case: return EBUSY not ENOENT for first elem ("input") */
- if (strcmp(label, ip_fw_chains->label) == 0)
- return EBUSY;
-
- for (tmp = ip_fw_chains; tmp->next; tmp = tmp->next)
- if(strcmp(tmp->next->label,label) == 0)
- break;
-
- tmp2 = tmp->next;
- if (!tmp2)
- return ENOENT;
-
- if (tmp2->refcount)
- return EBUSY;
-
- if (tmp2->chain)
- return ENOTEMPTY;
-
- tmp->next = tmp2->next;
- kfree(tmp2);
-
- /* We will block in cleanup's unregister sockopt if unloaded,
- so this is safe. */
- module_put(THIS_MODULE);
- return 0;
-}
-
-/* This is a function to initilise a chain. Built in rules start with
- * refcount = 1 so that they cannot be deleted. User defined rules
- * start with refcount = 0 so they can be deleted. */
-static struct ip_chain *ip_init_chain(ip_chainlabel name,
- __u32 ref,
- int policy)
-{
- unsigned int i;
- struct ip_chain *label
- = kmalloc(SIZEOF_STRUCT_IP_CHAIN, GFP_KERNEL);
- if (label == NULL)
- panic("Can't kmalloc for firewall chains.\n");
- strcpy(label->label,name);
- label->next = NULL;
- label->chain = NULL;
- label->refcount = ref;
- label->policy = policy;
- for (i = 0; i < NUM_SLOTS; i++) {
- label->reent[i].counters.pcnt = label->reent[i].counters.bcnt
- = 0;
- label->reent[i].prevchain = NULL;
- label->reent[i].prevrule = NULL;
- }
-
- return label;
-}
-
-/* This is a function for reating a new chain. The chains is not
- * created if a chain of the same name already exists */
-static int create_chain(ip_chainlabel label)
-{
- struct ip_chain *tmp;
-
- if (!check_label(label))
- return EINVAL;
-
- FWC_HAVE_LOCK(fwc_wlocks);
- for (tmp = ip_fw_chains; tmp->next; tmp = tmp->next)
- if (strcmp(tmp->label,label) == 0)
- return EEXIST;
-
- if (strcmp(tmp->label,label) == 0)
- return EEXIST;
-
- /* Are we unloading now? We will block on nf_unregister_sockopt */
- if (!try_module_get(THIS_MODULE))
- return ENOPROTOOPT;
-
- tmp->next = ip_init_chain(label, 0, FW_SKIP); /* refcount is
- * zero since this is a
- * user defined chain *
- * and therefore can be
- * deleted */
- return 0;
-}
-
-/* This function simply changes the policy on one of the built in
- * chains. checking must be done before this is call to ensure that
- * chainptr is pointing to one of the three possible chains */
-static int change_policy(struct ip_chain *chainptr, int policy)
-{
- FWC_HAVE_LOCK(fwc_wlocks);
- chainptr->policy = policy;
- return 0;
-}
-
-/* This function takes an ip_fwuser and converts it to a ip_fwkernel. It also
- * performs some checks in the structure. */
-static struct ip_fwkernel *convert_ipfw(struct ip_fwuser *fwuser, int *errno)
-{
- struct ip_fwkernel *fwkern;
-
- if ( (fwuser->ipfw.fw_flg & ~IP_FW_F_MASK) != 0 ) {
- duprintf("convert_ipfw: undefined flag bits set (flags=%x)\n",
- fwuser->ipfw.fw_flg);
- *errno = EINVAL;
- return NULL;
- }
-
-#ifdef DEBUG_IP_FIREWALL_USER
- /* These are sanity checks that don't really matter.
- * We can get rid of these once testing is complete.
- */
- if ((fwuser->ipfw.fw_flg & IP_FW_F_TCPSYN)
- && ((fwuser->ipfw.fw_invflg & IP_FW_INV_PROTO)
- || fwuser->ipfw.fw_proto != IPPROTO_TCP)) {
- duprintf("convert_ipfw: TCP SYN flag set but proto != TCP!\n");
- *errno = EINVAL;
- return NULL;
- }
-
- if (strcmp(fwuser->label, IP_FW_LABEL_REDIRECT) != 0
- && fwuser->ipfw.fw_redirpt != 0) {
- duprintf("convert_ipfw: Target not REDIR but redirpt != 0!\n");
- *errno = EINVAL;
- return NULL;
- }
-
- if ((!(fwuser->ipfw.fw_flg & IP_FW_F_FRAG)
- && (fwuser->ipfw.fw_invflg & IP_FW_INV_FRAG))
- || (!(fwuser->ipfw.fw_flg & IP_FW_F_TCPSYN)
- && (fwuser->ipfw.fw_invflg & IP_FW_INV_SYN))) {
- duprintf("convert_ipfw: Can't have INV flag if flag unset!\n");
- *errno = EINVAL;
- return NULL;
- }
-
- if (((fwuser->ipfw.fw_invflg & IP_FW_INV_SRCPT)
- && fwuser->ipfw.fw_spts[0] == 0
- && fwuser->ipfw.fw_spts[1] == 0xFFFF)
- || ((fwuser->ipfw.fw_invflg & IP_FW_INV_DSTPT)
- && fwuser->ipfw.fw_dpts[0] == 0
- && fwuser->ipfw.fw_dpts[1] == 0xFFFF)
- || ((fwuser->ipfw.fw_invflg & IP_FW_INV_VIA)
- && (fwuser->ipfw.fw_vianame)[0] == '\0')
- || ((fwuser->ipfw.fw_invflg & IP_FW_INV_SRCIP)
- && fwuser->ipfw.fw_smsk.s_addr == 0)
- || ((fwuser->ipfw.fw_invflg & IP_FW_INV_DSTIP)
- && fwuser->ipfw.fw_dmsk.s_addr == 0)) {
- duprintf("convert_ipfw: INV flag makes rule unmatchable!\n");
- *errno = EINVAL;
- return NULL;
- }
-
- if ((fwuser->ipfw.fw_flg & IP_FW_F_FRAG)
- && !(fwuser->ipfw.fw_invflg & IP_FW_INV_FRAG)
- && (fwuser->ipfw.fw_spts[0] != 0
- || fwuser->ipfw.fw_spts[1] != 0xFFFF
- || fwuser->ipfw.fw_dpts[0] != 0
- || fwuser->ipfw.fw_dpts[1] != 0xFFFF
- || (fwuser->ipfw.fw_flg & IP_FW_F_TCPSYN))) {
- duprintf("convert_ipfw: Can't test ports or SYN with frag!\n");
- *errno = EINVAL;
- return NULL;
- }
-#endif
-
- if ((fwuser->ipfw.fw_spts[0] != 0
- || fwuser->ipfw.fw_spts[1] != 0xFFFF
- || fwuser->ipfw.fw_dpts[0] != 0
- || fwuser->ipfw.fw_dpts[1] != 0xFFFF)
- && ((fwuser->ipfw.fw_invflg & IP_FW_INV_PROTO)
- || (fwuser->ipfw.fw_proto != IPPROTO_TCP
- && fwuser->ipfw.fw_proto != IPPROTO_UDP
- && fwuser->ipfw.fw_proto != IPPROTO_ICMP))) {
- duprintf("convert_ipfw: Can only test ports for TCP/UDP/ICMP!\n");
- *errno = EINVAL;
- return NULL;
- }
-
- fwkern = kmalloc(SIZEOF_STRUCT_IP_FW_KERNEL, GFP_ATOMIC);
- if (!fwkern) {
- duprintf("convert_ipfw: kmalloc failed!\n");
- *errno = ENOMEM;
- return NULL;
- }
- memcpy(&fwkern->ipfw,&fwuser->ipfw,sizeof(struct ip_fw));
-
- if (!find_special(fwuser->label, &fwkern->simplebranch)) {
- fwkern->branch = find_label(fwuser->label);
- if (!fwkern->branch) {
- duprintf("convert_ipfw: chain doesn't exist `%s'.\n",
- fwuser->label);
- kfree(fwkern);
- *errno = ENOENT;
- return NULL;
- } else if (fwkern->branch == IP_FW_INPUT_CHAIN
- || fwkern->branch == IP_FW_FORWARD_CHAIN
- || fwkern->branch == IP_FW_OUTPUT_CHAIN) {
- duprintf("convert_ipfw: Can't branch to builtin chain `%s'.\n",
- fwuser->label);
- kfree(fwkern);
- *errno = ENOENT;
- return NULL;
- }
- } else
- fwkern->branch = NULL;
- memset(fwkern->counters, 0, sizeof(struct ip_counters)*NUM_SLOTS);
-
- /* Handle empty vianame by making it a wildcard */
- if ((fwkern->ipfw.fw_vianame)[0] == '\0')
- fwkern->ipfw.fw_flg |= IP_FW_F_WILDIF;
-
- fwkern->next = NULL;
- return fwkern;
-}
-
-int ip_fw_ctl(int cmd, void *m, int len)
-{
- int ret;
- struct ip_chain *chain;
- unsigned long flags;
-
- FWC_WRITE_LOCK_IRQ(&ip_fw_lock, flags);
-
- switch (cmd) {
- case IP_FW_FLUSH:
- if (len != sizeof(ip_chainlabel) || !check_label(m))
- ret = EINVAL;
- else if ((chain = find_label(m)) == NULL)
- ret = ENOENT;
- else ret = clear_fw_chain(chain);
- break;
-
- case IP_FW_ZERO:
- if (len != sizeof(ip_chainlabel) || !check_label(m))
- ret = EINVAL;
- else if ((chain = find_label(m)) == NULL)
- ret = ENOENT;
- else ret = zero_fw_chain(chain);
- break;
-
- case IP_FW_CHECK: {
- struct ip_fwtest *new = m;
- struct iphdr *ip;
-
- /* Don't need write lock. */
- FWC_WRITE_UNLOCK_IRQ(&ip_fw_lock, flags);
-
- if (len != sizeof(struct ip_fwtest) || !check_label(m))
- return EINVAL;
-
- /* Need readlock to do find_label */
- FWC_READ_LOCK(&ip_fw_lock);
-
- if ((chain = find_label(new->fwt_label)) == NULL)
- ret = ENOENT;
- else {
- struct sk_buff *tmp_skb;
- int hdrlen;
-
- hdrlen = sizeof(struct ip_fwpkt) -
- sizeof(struct in_addr) -
- IFNAMSIZ;
-
- ip = &(new->fwt_packet.fwp_iph);
-
- /* Fix this one up by hand, who knows how many
- * tools will break if we start to barf on this.
- */
- if (ntohs(ip->tot_len) > hdrlen)
- ip->tot_len = htons(hdrlen);
-
- if (ip->ihl != sizeof(struct iphdr) / sizeof(u32)) {
- duprintf("ip_fw_ctl: ip->ihl=%d, want %d\n",
- ip->ihl,
- sizeof(struct iphdr) / sizeof(u32));
- ret = EINVAL;
- } else if ((tmp_skb = alloc_skb(hdrlen,
- GFP_ATOMIC)) == NULL) {
- duprintf("ip_fw_ctl: tmp_skb alloc failure\n");
- ret = EFAULT;
- } else {
- skb_reserve(tmp_skb, hdrlen);
- skb_push(tmp_skb, hdrlen);
- memcpy(tmp_skb->data, ip, hdrlen);
- tmp_skb->nh.raw =
- (unsigned char *) tmp_skb->data;
- ret = ip_fw_check(new->fwt_packet.fwp_vianame,
- NULL, chain,
- &tmp_skb, SLOT_NUMBER(), 1);
- kfree_skb(tmp_skb);
- switch (ret) {
- case FW_ACCEPT:
- ret = 0; break;
- case FW_REDIRECT:
- ret = ECONNABORTED; break;
- case FW_MASQUERADE:
- ret = ECONNRESET; break;
- case FW_REJECT:
- ret = ECONNREFUSED; break;
- /* Hack to help diag; these only get
- returned when testing. */
- case FW_SKIP+1:
- ret = ELOOP; break;
- case FW_SKIP:
- ret = ENFILE; break;
- default: /* FW_BLOCK */
- ret = ETIMEDOUT; break;
- }
- }
- }
- FWC_READ_UNLOCK(&ip_fw_lock);
- return ret;
- }
-
- case IP_FW_MASQ_TIMEOUTS: {
- ret = ip_fw_masq_timeouts(m, len);
- }
- break;
-
- case IP_FW_REPLACE: {
- struct ip_fwkernel *ip_fwkern;
- struct ip_fwnew *new = m;
-
- if (len != sizeof(struct ip_fwnew)
- || !check_label(new->fwn_label))
- ret = EINVAL;
- else if ((chain = find_label(new->fwn_label)) == NULL)
- ret = ENOENT;
- else if ((ip_fwkern = convert_ipfw(&new->fwn_rule, &ret))
- != NULL)
- ret = replace_in_chain(chain, ip_fwkern,
- new->fwn_rulenum);
- }
- break;
-
- case IP_FW_APPEND: {
- struct ip_fwchange *new = m;
- struct ip_fwkernel *ip_fwkern;
-
- if (len != sizeof(struct ip_fwchange)
- || !check_label(new->fwc_label))
- ret = EINVAL;
- else if ((chain = find_label(new->fwc_label)) == NULL)
- ret = ENOENT;
- else if ((ip_fwkern = convert_ipfw(&new->fwc_rule, &ret))
- != NULL)
- ret = append_to_chain(chain, ip_fwkern);
- }
- break;
-
- case IP_FW_INSERT: {
- struct ip_fwkernel *ip_fwkern;
- struct ip_fwnew *new = m;
-
- if (len != sizeof(struct ip_fwnew)
- || !check_label(new->fwn_label))
- ret = EINVAL;
- else if ((chain = find_label(new->fwn_label)) == NULL)
- ret = ENOENT;
- else if ((ip_fwkern = convert_ipfw(&new->fwn_rule, &ret))
- != NULL)
- ret = insert_in_chain(chain, ip_fwkern,
- new->fwn_rulenum);
- }
- break;
-
- case IP_FW_DELETE: {
- struct ip_fwchange *new = m;
- struct ip_fwkernel *ip_fwkern;
-
- if (len != sizeof(struct ip_fwchange)
- || !check_label(new->fwc_label))
- ret = EINVAL;
- else if ((chain = find_label(new->fwc_label)) == NULL)
- ret = ENOENT;
- else if ((ip_fwkern = convert_ipfw(&new->fwc_rule, &ret))
- != NULL) {
- ret = del_rule_from_chain(chain, ip_fwkern);
- kfree(ip_fwkern);
- }
- }
- break;
-
- case IP_FW_DELETE_NUM: {
- struct ip_fwdelnum *new = m;
-
- if (len != sizeof(struct ip_fwdelnum)
- || !check_label(new->fwd_label))
- ret = EINVAL;
- else if ((chain = find_label(new->fwd_label)) == NULL)
- ret = ENOENT;
- else ret = del_num_from_chain(chain, new->fwd_rulenum);
- }
- break;
-
- case IP_FW_CREATECHAIN: {
- if (len != sizeof(ip_chainlabel)) {
- duprintf("create_chain: bad size %i\n", len);
- ret = EINVAL;
- }
- else ret = create_chain(m);
- }
- break;
-
- case IP_FW_DELETECHAIN: {
- if (len != sizeof(ip_chainlabel)) {
- duprintf("delete_chain: bad size %i\n", len);
- ret = EINVAL;
- }
- else ret = del_chain(m);
- }
- break;
-
- case IP_FW_POLICY: {
- struct ip_fwpolicy *new = m;
-
- if (len != sizeof(struct ip_fwpolicy)
- || !check_label(new->fwp_label))
- ret = EINVAL;
- else if ((chain = find_label(new->fwp_label)) == NULL)
- ret = ENOENT;
- else if (chain != IP_FW_INPUT_CHAIN
- && chain != IP_FW_FORWARD_CHAIN
- && chain != IP_FW_OUTPUT_CHAIN) {
- duprintf("change_policy: can't change policy on user"
- " defined chain.\n");
- ret = EINVAL;
- }
- else {
- int pol = FW_SKIP;
- find_special(new->fwp_policy, &pol);
-
- switch(pol) {
- case FW_MASQUERADE:
- if (chain != IP_FW_FORWARD_CHAIN) {
- ret = EINVAL;
- break;
- }
- /* Fall thru... */
- case FW_BLOCK:
- case FW_ACCEPT:
- case FW_REJECT:
- ret = change_policy(chain, pol);
- break;
- default:
- duprintf("change_policy: bad policy `%s'\n",
- new->fwp_policy);
- ret = EINVAL;
- }
- }
- break;
- }
- default:
- duprintf("ip_fw_ctl: unknown request %d\n",cmd);
- ret = ENOPROTOOPT;
- }
-
- FWC_WRITE_UNLOCK_IRQ(&ip_fw_lock, flags);
- return ret;
-}
-
-/* Returns bytes used - doesn't NUL terminate */
-static int dump_rule(char *buffer,
- const char *chainlabel,
- const struct ip_fwkernel *rule)
-{
- int len;
- unsigned int i;
- __u64 packets = 0, bytes = 0;
-
- FWC_HAVE_LOCK(fwc_wlocks);
- for (i = 0; i < NUM_SLOTS; i++) {
- packets += rule->counters[i].pcnt;
- bytes += rule->counters[i].bcnt;
- }
-
- len=sprintf(buffer,
- "%9s " /* Chain name */
- "%08X/%08X->%08X/%08X " /* Source & Destination IPs */
- "%.16s " /* Interface */
- "%X %X " /* fw_flg and fw_invflg fields */
- "%u " /* Protocol */
- "%-9u %-9u %-9u %-9u " /* Packet & byte counters */
- "%u-%u %u-%u " /* Source & Dest port ranges */
- "A%02X X%02X " /* TOS and and xor masks */
- "%08X " /* Redirection port */
- "%u " /* fw_mark field */
- "%u " /* output size */
- "%9s\n", /* Target */
- chainlabel,
- ntohl(rule->ipfw.fw_src.s_addr),
- ntohl(rule->ipfw.fw_smsk.s_addr),
- ntohl(rule->ipfw.fw_dst.s_addr),
- ntohl(rule->ipfw.fw_dmsk.s_addr),
- (rule->ipfw.fw_vianame)[0] ? rule->ipfw.fw_vianame : "-",
- rule->ipfw.fw_flg,
- rule->ipfw.fw_invflg,
- rule->ipfw.fw_proto,
- (__u32)(packets >> 32), (__u32)packets,
- (__u32)(bytes >> 32), (__u32)bytes,
- rule->ipfw.fw_spts[0], rule->ipfw.fw_spts[1],
- rule->ipfw.fw_dpts[0], rule->ipfw.fw_dpts[1],
- rule->ipfw.fw_tosand, rule->ipfw.fw_tosxor,
- rule->ipfw.fw_redirpt,
- rule->ipfw.fw_mark,
- rule->ipfw.fw_outputsize,
- branchname(rule->branch,rule->simplebranch));
-
- duprintf("dump_rule: %i bytes done.\n", len);
- return len;
-}
-
-/* File offset is actually in records, not bytes. */
-static int ip_chain_procinfo(char *buffer, char **start,
- off_t offset, int length)
-{
- struct ip_chain *i;
- struct ip_fwkernel *j = ip_fw_chains->chain;
- unsigned long flags;
- int len = 0;
- int last_len = 0;
- off_t upto = 0;
-
- duprintf("Offset starts at %lu\n", offset);
- duprintf("ip_fw_chains is 0x%0lX\n", (unsigned long int)ip_fw_chains);
-
- /* Need a write lock to lock out ``readers'' which update counters. */
- FWC_WRITE_LOCK_IRQ(&ip_fw_lock, flags);
-
- for (i = ip_fw_chains; i; i = i->next) {
- for (j = i->chain; j; j = j->next) {
- if (upto == offset) break;
- duprintf("Skipping rule in chain `%s'\n",
- i->label);
- upto++;
- }
- if (upto == offset) break;
- }
-
- /* Don't init j first time, or once i = NULL */
- for (; i; (void)((i = i->next) && (j = i->chain))) {
- duprintf("Dumping chain `%s'\n", i->label);
- for (; j; j = j->next, upto++, last_len = len)
- {
- len += dump_rule(buffer+len, i->label, j);
- if (len > length) {
- duprintf("Dumped to %i (past %i). "
- "Moving back to %i.\n",
- len, length, last_len);
- len = last_len;
- goto outside;
- }
- }
- }
-outside:
- FWC_WRITE_UNLOCK_IRQ(&ip_fw_lock, flags);
- buffer[len] = '\0';
-
- duprintf("ip_chain_procinfo: Length = %i (of %i). Offset = %li.\n",
- len, length, upto);
- /* `start' hack - see fs/proc/generic.c line ~165 */
- *start=(char *)((unsigned int)upto-offset);
- return len;
-}
-
-static int ip_chain_name_procinfo(char *buffer, char **start,
- off_t offset, int length)
-{
- struct ip_chain *i;
- int len = 0,last_len = 0;
- off_t pos = 0,begin = 0;
- unsigned long flags;
-
- /* Need a write lock to lock out ``readers'' which update counters. */
- FWC_WRITE_LOCK_IRQ(&ip_fw_lock, flags);
-
- for (i = ip_fw_chains; i; i = i->next)
- {
- unsigned int j;
- __u32 packetsHi = 0, packetsLo = 0, bytesHi = 0, bytesLo = 0;
-
- for (j = 0; j < NUM_SLOTS; j++) {
- packetsLo += i->reent[j].counters.pcnt & 0xFFFFFFFF;
- packetsHi += ((i->reent[j].counters.pcnt >> 32)
- & 0xFFFFFFFF);
- bytesLo += i->reent[j].counters.bcnt & 0xFFFFFFFF;
- bytesHi += ((i->reent[j].counters.bcnt >> 32)
- & 0xFFFFFFFF);
- }
-
- /* print the label and the policy */
- len+=sprintf(buffer+len,"%s %s %i %u %u %u %u\n",
- i->label,branchname(NULL, i->policy),i->refcount,
- packetsHi, packetsLo, bytesHi, bytesLo);
- pos=begin+len;
- if(pos<offset) {
- len=0;
- begin=pos;
- }
- else if(pos>offset+length) {
- len = last_len;
- break;
- }
-
- last_len = len;
- }
- FWC_WRITE_UNLOCK_IRQ(&ip_fw_lock, flags);
-
- *start = buffer+(offset-begin);
- len-=(offset-begin);
- if(len>length)
- len=length;
- return len;
-}
-
-/*
- * Interface to the generic firewall chains.
- */
-int ipfw_input_check(struct firewall_ops *this, int pf,
- struct net_device *dev, void *arg,
- struct sk_buff **pskb)
-{
- return ip_fw_check(dev->name,
- arg, IP_FW_INPUT_CHAIN, pskb, SLOT_NUMBER(), 0);
-}
-
-int ipfw_output_check(struct firewall_ops *this, int pf,
- struct net_device *dev, void *arg,
- struct sk_buff **pskb)
-{
- /* Locally generated bogus packets by root. <SIGH>. */
- if ((*pskb)->len < sizeof(struct iphdr) ||
- (*pskb)->nh.iph->ihl * 4 < sizeof(struct iphdr))
- return FW_ACCEPT;
- return ip_fw_check(dev->name,
- arg, IP_FW_OUTPUT_CHAIN, pskb, SLOT_NUMBER(), 0);
-}
-
-int ipfw_forward_check(struct firewall_ops *this, int pf,
- struct net_device *dev, void *arg,
- struct sk_buff **pskb)
-{
- return ip_fw_check(dev->name,
- arg, IP_FW_FORWARD_CHAIN, pskb, SLOT_NUMBER(), 0);
-}
-
-struct firewall_ops ipfw_ops = {
- .fw_forward = ipfw_forward_check,
- .fw_input = ipfw_input_check,
- .fw_output = ipfw_output_check,
-};
-
-int ipfw_init_or_cleanup(int init)
-{
- struct proc_dir_entry *proc;
- int ret = 0;
- unsigned long flags;
-
- if (!init) goto cleanup;
-
-#ifdef DEBUG_IP_FIREWALL_LOCKING
- fwc_wlocks = fwc_rlocks = 0;
-#endif
-
-#if defined(CONFIG_NETLINK_DEV) || defined(CONFIG_NETLINK_DEV_MODULE)
- ipfwsk = netlink_kernel_create(NETLINK_FIREWALL, NULL);
- if (ipfwsk == NULL)
- goto cleanup_nothing;
-#endif
-
- ret = register_firewall(PF_INET, &ipfw_ops);
- if (ret < 0)
- goto cleanup_netlink;
-
- proc = proc_net_create(IP_FW_PROC_CHAINS, S_IFREG | S_IRUSR | S_IWUSR,
- ip_chain_procinfo);
- if (proc) proc->owner = THIS_MODULE;
- proc = proc_net_create(IP_FW_PROC_CHAIN_NAMES,
- S_IFREG | S_IRUSR | S_IWUSR,
- ip_chain_name_procinfo);
- if (proc) proc->owner = THIS_MODULE;
-
- IP_FW_INPUT_CHAIN = ip_init_chain(IP_FW_LABEL_INPUT, 1, FW_ACCEPT);
- IP_FW_FORWARD_CHAIN = ip_init_chain(IP_FW_LABEL_FORWARD, 1, FW_ACCEPT);
- IP_FW_OUTPUT_CHAIN = ip_init_chain(IP_FW_LABEL_OUTPUT, 1, FW_ACCEPT);
-
- return ret;
-
- cleanup:
- unregister_firewall(PF_INET, &ipfw_ops);
-
- FWC_WRITE_LOCK_IRQ(&ip_fw_lock, flags);
- while (ip_fw_chains) {
- struct ip_chain *next = ip_fw_chains->next;
-
- clear_fw_chain(ip_fw_chains);
- kfree(ip_fw_chains);
- ip_fw_chains = next;
- }
- FWC_WRITE_UNLOCK_IRQ(&ip_fw_lock, flags);
-
- proc_net_remove(IP_FW_PROC_CHAINS);
- proc_net_remove(IP_FW_PROC_CHAIN_NAMES);
-
- cleanup_netlink:
-#if defined(CONFIG_NETLINK_DEV) || defined(CONFIG_NETLINK_DEV_MODULE)
- sock_release(ipfwsk->sk_socket);
-
- cleanup_nothing:
-#endif
- return ret;
-}
+++ /dev/null
-#warning ipfwadm is obsolete, and will be removed soon.
-
-/* Minor modifications to fit on compatibility framework:
- Rusty.Russell@rustcorp.com.au
-*/
-
-#include <linux/config.h>
-#define CONFIG_IP_FIREWALL
-#define CONFIG_IP_FIREWALL_VERBOSE
-#define CONFIG_IP_MASQUERADE
-#define CONFIG_IP_ACCT
-#define CONFIG_IP_TRANSPARENT_PROXY
-#if defined(CONFIG_NETLINK_DEV) || defined(CONFIG_NETLINK_DEV_MODULE)
-#define CONFIG_IP_FIREWALL_NETLINK
-#endif
-
-/*
- * IP firewalling code. This is taken from 4.4BSD. Please note the
- * copyright message below. As per the GPL it must be maintained
- * and the licenses thus do not conflict. While this port is subject
- * to the GPL I also place my modifications under the original
- * license in recognition of the original copyright.
- * -- Alan Cox.
- *
- * $Id: ipfwadm_core.c,v 1.11 2002/01/24 15:50:31 davem Exp $
- *
- * Ported from BSD to Linux,
- * Alan Cox 22/Nov/1994.
- * Zeroing /proc and other additions
- * Jos Vos 4/Feb/1995.
- * Merged and included the FreeBSD-Current changes at Ugen's request
- * (but hey it's a lot cleaner now). Ugen would prefer in some ways
- * we waited for his final product but since Linux 1.2.0 is about to
- * appear it's not practical - Read: It works, it's not clean but please
- * don't consider it to be his standard of finished work.
- * Alan Cox 12/Feb/1995
- * Porting bidirectional entries from BSD, fixing accounting issues,
- * adding struct ip_fwpkt for checking packets with interface address
- * Jos Vos 5/Mar/1995.
- * Established connections (ACK check), ACK check on bidirectional rules,
- * ICMP type check.
- * Wilfred Mollenvanger 7/7/1995.
- * TCP attack protection.
- * Alan Cox 25/8/95, based on information from bugtraq.
- * ICMP type printk, IP_FW_F_APPEND
- * Bernd Eckenfels 1996-01-31
- * Split blocking chain into input and output chains, add new "insert" and
- * "append" commands to replace semi-intelligent "add" command, let "delete".
- * only delete the first matching entry, use 0xFFFF (0xFF) as ports (ICMP
- * types) when counting packets being 2nd and further fragments.
- * Jos Vos <jos@xos.nl> 8/2/1996.
- * Add support for matching on device names.
- * Jos Vos <jos@xos.nl> 15/2/1996.
- * Transparent proxying support.
- * Willy Konynenberg <willy@xos.nl> 10/5/96.
- * Make separate accounting on incoming and outgoing packets possible.
- * Jos Vos <jos@xos.nl> 18/5/1996.
- * Added trap out of bad frames.
- * Alan Cox <alan@cymru.net> 17/11/1996
- *
- *
- * Masquerading functionality
- *
- * Copyright (c) 1994 Pauline Middelink
- *
- * The pieces which added masquerading functionality are totally
- * my responsibility and have nothing to with the original authors
- * copyright or doing.
- *
- * Parts distributed under GPL.
- *
- * Fixes:
- * Pauline Middelink : Added masquerading.
- * Alan Cox : Fixed an error in the merge.
- * Thomas Quinot : Fixed port spoofing.
- * Alan Cox : Cleaned up retransmits in spoofing.
- * Alan Cox : Cleaned up length setting.
- * Wouter Gadeyne : Fixed masquerading support of ftp PORT commands
- *
- * Juan Jose Ciarlante : Masquerading code moved to ip_masq.c
- * Andi Kleen : Print frag_offsets and the ip flags properly.
- *
- * All the real work was done by .....
- *
- */
-
-
-/*
- * Copyright (c) 1993 Daniel Boulet
- * Copyright (c) 1994 Ugen J.S.Antsilevich
- *
- * Redistribution and use in source forms, with and without modification,
- * are permitted provided that this entire comment appears intact.
- *
- * Redistribution in binary form may occur without any restrictions.
- * Obviously, it would be nice if you gave credit where credit is due
- * but requiring it would be too onerous.
- *
- * This software is provided ``AS IS'' without any warranties of any kind.
- */
-
-#include <asm/uaccess.h>
-#include <asm/system.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/errno.h>
-#include <linux/module.h>
-
-#include <linux/socket.h>
-#include <linux/sockios.h>
-#include <linux/in.h>
-#include <linux/inet.h>
-#include <linux/netdevice.h>
-#include <linux/icmp.h>
-#include <linux/udp.h>
-#include <net/ip.h>
-#include <net/protocol.h>
-#include <net/route.h>
-#include <net/tcp.h>
-#include <net/udp.h>
-#include <net/sock.h>
-#include <net/icmp.h>
-#include <linux/netlink.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/netfilter_ipv4/ipfwadm_core.h>
-#include <linux/netfilter_ipv4/compat_firewall.h>
-#include <linux/netfilter_ipv4/lockhelp.h>
-#include <linux/netfilter_ipv4/ip_nat_core.h>
-
-#include <net/checksum.h>
-#include <linux/proc_fs.h>
-#include <linux/stat.h>
-
-MODULE_LICENSE("Dual BSD/GPL");
-MODULE_DESCRIPTION("ipfwadm backwards compatibility layer");
-
-/*
- * Implement IP packet firewall
- */
-
-#ifdef DEBUG_IP_FIREWALL
-#define dprintf1(a) printk(a)
-#define dprintf2(a1,a2) printk(a1,a2)
-#define dprintf3(a1,a2,a3) printk(a1,a2,a3)
-#define dprintf4(a1,a2,a3,a4) printk(a1,a2,a3,a4)
-#else
-#define dprintf1(a)
-#define dprintf2(a1,a2)
-#define dprintf3(a1,a2,a3)
-#define dprintf4(a1,a2,a3,a4)
-#endif
-
-#define print_ip(a) printk("%u.%u.%u.%u", NIPQUAD(a));
-
-#ifdef DEBUG_IP_FIREWALL
-#define dprint_ip(a) print_ip(a)
-#else
-#define dprint_ip(a)
-#endif
-
-static DECLARE_RWLOCK(ip_fw_lock);
-
-#if defined(CONFIG_IP_ACCT) || defined(CONFIG_IP_FIREWALL)
-
-struct ip_fw *ip_fw_fwd_chain;
-struct ip_fw *ip_fw_in_chain;
-struct ip_fw *ip_fw_out_chain;
-struct ip_fw *ip_acct_chain;
-struct ip_fw *ip_masq_chain;
-
-static struct ip_fw **chains[] =
- {&ip_fw_fwd_chain, &ip_fw_in_chain, &ip_fw_out_chain, &ip_acct_chain,
- &ip_masq_chain
- };
-#endif /* CONFIG_IP_ACCT || CONFIG_IP_FIREWALL */
-
-#ifdef CONFIG_IP_FIREWALL
-int ip_fw_fwd_policy=IP_FW_F_ACCEPT;
-int ip_fw_in_policy=IP_FW_F_ACCEPT;
-int ip_fw_out_policy=IP_FW_F_ACCEPT;
-
-static int *policies[] =
- {&ip_fw_fwd_policy, &ip_fw_in_policy, &ip_fw_out_policy};
-
-#endif
-
-#ifdef CONFIG_IP_FIREWALL_NETLINK
-struct sock *ipfwsk;
-#endif
-
-/*
- * Returns 1 if the port is matched by the vector, 0 otherwise
- */
-
-extern inline int port_match(unsigned short *portptr,int nports,unsigned short port,int range_flag)
-{
- if (!nports)
- return 1;
- if ( range_flag )
- {
- if ( portptr[0] <= port && port <= portptr[1] )
- {
- return( 1 );
- }
- nports -= 2;
- portptr += 2;
- }
- while ( nports-- > 0 )
- {
- if ( *portptr++ == port )
- {
- return( 1 );
- }
- }
- return(0);
-}
-
-#if defined(CONFIG_IP_ACCT) || defined(CONFIG_IP_FIREWALL)
-
-#ifdef CONFIG_IP_FIREWALL_VERBOSE
-
-/*
- * VERY ugly piece of code which actually makes kernel printf for
- * matching packets.
- */
-
-static char *chain_name(struct ip_fw *chain, int mode)
-{
- switch (mode) {
- case IP_FW_MODE_ACCT_IN: return "acct in";
- case IP_FW_MODE_ACCT_OUT: return "acct out";
- default:
- if (chain == ip_fw_fwd_chain)
- return "fw-fwd";
- else if (chain == ip_fw_in_chain)
- return "fw-in";
- else
- return "fw-out";
- }
-}
-
-static char *rule_name(struct ip_fw *f, int mode, char *buf)
-{
- if (mode == IP_FW_MODE_ACCT_IN || mode == IP_FW_MODE_ACCT_OUT)
- return "";
-
- if(f->fw_flg&IP_FW_F_ACCEPT) {
- if(f->fw_flg&IP_FW_F_REDIR) {
- sprintf(buf, "acc/r%d ", f->fw_pts[f->fw_nsp+f->fw_ndp]);
- return buf;
- } else if(f->fw_flg&IP_FW_F_MASQ)
- return "acc/masq ";
- else
- return "acc ";
- } else if(f->fw_flg&IP_FW_F_ICMPRPL) {
- return "rej ";
- } else {
- return "deny ";
- }
-}
-
-static void print_packet(struct sk_buff **pskb,
- u16 src_port, u16 dst_port, u16 icmp_type,
- char *chain, char *rule, char *devname)
-{
- __u32 *opt = (__u32 *) ((*pskb)->nh.iph + 1);
- int opti;
- __u16 foff = ntohs((*pskb)->nh.iph->frag_off);
- int protocol = (*pskb)->nh.iph->protocol;
-
- printk(KERN_INFO "IP %s %s%s", chain, rule, devname);
-
- switch (protocol) {
- case IPPROTO_TCP:
- printk(" TCP ");
- break;
- case IPPROTO_UDP:
- printk(" UDP ");
- break;
- case IPPROTO_ICMP:
- printk(" ICMP/%d ", icmp_type);
- break;
- default:
- printk(" PROTO=%d ", protocol);
- break;
- };
-
- print_ip((*pskb)->nh.iph->saddr);
- if (protocol == IPPROTO_TCP || protocol == IPPROTO_UDP)
- printk(":%hu", src_port);
- printk(" ");
- print_ip((*pskb)->nh.iph->daddr);
- if (protocol == IPPROTO_TCP || protocol == IPPROTO_UDP)
- printk(":%hu", dst_port);
- printk(" L=%hu S=0x%2.2hX I=%hu FO=0x%4.4hX T=%hu",
- ntohs((*pskb)->nh.iph->tot_len),
- (*pskb)->nh.iph->tos,
- ntohs((*pskb)->nh.iph->id),
- foff & IP_OFFSET,
- (*pskb)->nh.iph->ttl);
- if (foff & IP_DF)
- printk(" DF=1");
- if (foff & IP_MF)
- printk(" MF=1");
- for (opti = 0; opti < ((*pskb)->nh.iph->ihl - sizeof(struct iphdr) / 4); opti++)
- printk(" O=0x%8.8X", *opt++);
- printk("\n");
-}
-#endif
-
-/*
- * Returns one of the generic firewall policies, like FW_ACCEPT.
- * Also does accounting so you can feed it the accounting chain.
- *
- * The modes is either IP_FW_MODE_FW (normal firewall mode),
- * IP_FW_MODE_ACCT_IN or IP_FW_MODE_ACCT_OUT (accounting mode,
- * steps through the entire chain and handles fragments
- * differently), or IP_FW_MODE_CHK (handles user-level check,
- * counters are not updated).
- */
-
-
-int ip_fw_chk(struct sk_buff **pskb,
- struct net_device *rif, __u16 *redirport,
- struct ip_fw *chain, int policy, int mode)
-{
- struct ip_fw *f;
- __u32 src, dst;
- __u16 src_port=0xFFFF, dst_port=0xFFFF, icmp_type=0xFF;
- unsigned short f_prt=0, prt;
- char notcpsyn=0, notcpack=0, match;
- unsigned short offset;
- int answer;
- unsigned char tosand, tosxor;
- int protocol;
-
- /*
- * If the chain is empty follow policy. The BSD one
- * accepts anything giving you a time window while
- * flushing and rebuilding the tables.
- */
-
- /*
- * This way we handle fragmented packets.
- * we ignore all fragments but the first one
- * so the whole packet can't be reassembled.
- * This way we relay on the full info which
- * stored only in first packet.
- *
- * Note that this theoretically allows partial packet
- * spoofing. Not very dangerous but paranoid people may
- * wish to play with this. It also allows the so called
- * "fragment bomb" denial of service attack on some types
- * of system.
- */
-
- offset = ntohs((*pskb)->nh.iph->frag_off) & IP_OFFSET;
- protocol = (*pskb)->nh.iph->protocol;
-
- /*
- * Don't allow a fragment of TCP 8 bytes in. Nobody
- * normal causes this. Its a cracker trying to break
- * in by doing a flag overwrite to pass the direction
- * checks.
- */
-
- if (offset == 1 && protocol == IPPROTO_TCP)
- return FW_BLOCK;
-
- if (offset!=0 && !(mode & (IP_FW_MODE_ACCT_IN|IP_FW_MODE_ACCT_OUT)) &&
- (protocol == IPPROTO_TCP ||
- protocol == IPPROTO_UDP ||
- protocol == IPPROTO_ICMP))
- return FW_ACCEPT;
-
- /*
- * Header fragment for TCP is too small to check the bits.
- */
-
- if (protocol == IPPROTO_TCP &&
- ((*pskb)->nh.iph->ihl<<2)+16 > ntohs((*pskb)->nh.iph->tot_len))
- return FW_BLOCK;
-
- /*
- * Too short.
- *
- * But only too short for a packet with ports...
- */
-
- else if ((ntohs((*pskb)->nh.iph->tot_len) <
- 8 + ((*pskb)->nh.iph->ihl << 2)) &&
- (protocol == IPPROTO_TCP || protocol == IPPROTO_UDP))
- return FW_BLOCK;
-
- src = (*pskb)->nh.iph->saddr;
- dst = (*pskb)->nh.iph->daddr;
-
- /*
- * If we got interface from which packet came
- * we can use the address directly. This is unlike
- * 4.4BSD derived systems that have an address chain
- * per device. We have a device per address with dummy
- * devices instead.
- */
-
- dprintf1("Packet ");
- switch (protocol) {
- case IPPROTO_TCP:
- dprintf1("TCP ");
- /* ports stay 0xFFFF if it is not the first fragment */
- if (!offset) {
- struct tcphdr _tcph, *th;
-
- th = skb_header_pointer(*pskb,
- (*pskb)->nh.iph->ihl*4,
- sizeof(_tcph), &_tcph);
- if (th == NULL)
- return FW_BLOCK;
-
- src_port = ntohs(th->source);
- dst_port = ntohs(th->dest);
-
- if(!th->ack && !th->rst)
- /* We do NOT have ACK, value TRUE */
- notcpack = 1;
- if(!th->syn || !notcpack)
- /* We do NOT have SYN, value TRUE */
- notcpsyn = 1;
- }
- prt = IP_FW_F_TCP;
- break;
- case IPPROTO_UDP:
- dprintf1("UDP ");
- /* ports stay 0xFFFF if it is not the first fragment */
- if (!offset) {
- struct udphdr _udph, *uh;
-
- uh = skb_header_pointer(*pskb,
- (*pskb)->nh.iph->ihl*4,
- sizeof(_udph), &_udph);
- if (uh == NULL)
- return FW_BLOCK;
-
- src_port = ntohs(uh->source);
- dst_port = ntohs(uh->dest);
- }
- prt = IP_FW_F_UDP;
- break;
- case IPPROTO_ICMP:
- /* icmp_type stays 255 if it is not the first fragment */
- if (!offset) {
- struct icmphdr _icmph, *ic;
-
- ic = skb_header_pointer(*pskb,
- (*pskb)->nh.iph->ihl*4,
- sizeof(_icmph),
- &_icmph);
- if (ic == NULL)
- return FW_BLOCK;
-
- icmp_type = (__u16) ic->type;
- }
- dprintf2("ICMP:%d ", icmp_type);
- prt = IP_FW_F_ICMP;
- break;
- default:
- dprintf2("p=%d ", protocol);
- prt = IP_FW_F_ALL;
- break;
- }
-#ifdef DEBUG_IP_FIREWALL
- dprint_ip(src);
-
- if (protocol == IPPROTO_TCP || protocol == IPPROTO_UDP)
- /* This will print 65535 when it is not the first fragment! */
- dprintf2(":%d ", src_port);
- dprint_ip(dst);
- if (protocol == IPPROTO_TCP || protocol == IPPROTO_UDP)
- /* This will print 65535 when it is not the first fragment! */
- dprintf2(":%d ", dst_port);
- dprintf1("\n");
-#endif
-
- if (mode == IP_FW_MODE_CHK)
- READ_LOCK(&ip_fw_lock);
- else
- WRITE_LOCK(&ip_fw_lock);
-
- for (f = chain; f; f = f->fw_next) {
- /*
- * This is a bit simpler as we don't have to walk
- * an interface chain as you do in BSD - same logic
- * however.
- */
-
- /*
- * Match can become 0x01 (a "normal" match was found),
- * 0x02 (a reverse match was found), and 0x03 (the
- * IP addresses match in both directions).
- * Now we know in which direction(s) we should look
- * for a match for the TCP/UDP ports. Both directions
- * might match (e.g., when both addresses are on the
- * same network for which an address/mask is given), but
- * the ports might only match in one direction.
- * This was obviously wrong in the original BSD code.
- */
- match = 0x00;
-
- if ((src & f->fw_smsk.s_addr) == f->fw_src.s_addr &&
- (dst & f->fw_dmsk.s_addr) == f->fw_dst.s_addr)
- /* normal direction */
- match |= 0x01;
-
- if ((f->fw_flg & IP_FW_F_BIDIR) &&
- (dst & f->fw_smsk.s_addr) == f->fw_src.s_addr &&
- (src & f->fw_dmsk.s_addr) == f->fw_dst.s_addr)
- /* reverse direction */
- match |= 0x02;
-
- if (!match)
- continue;
-
- /*
- * Look for a VIA device match
- */
- if (f->fw_viadev) {
- if (rif != f->fw_viadev)
- continue; /* Mismatch */
- }
-
- /* This looks stupid, because we scan almost static
- list, searching for static key. However, this way seems
- to be only reasonable way of handling fw_via rules
- (btw bsd makes the same thing).
-
- It will not affect performance if you will follow
- the following simple rules:
-
- - if interface is aliased, ALWAYS specify fw_viadev,
- so that previous check will guarantee, that we will
- not waste time when packet arrive on another interface.
-
- - avoid using fw_via.s_addr if fw_via.s_addr is owned
- by an aliased interface.
-
- --ANK
- */
- if (f->fw_via.s_addr && rif) {
- struct in_ifaddr *ifa;
-
- if (rif->ip_ptr == NULL)
- continue; /* Mismatch */
-
- for (ifa = ((struct in_device*)(rif->ip_ptr))->ifa_list;
- ifa; ifa = ifa->ifa_next) {
- if (ifa->ifa_local == f->fw_via.s_addr)
- goto ifa_ok;
- }
- continue; /* Mismatch */
-
- ifa_ok:;
- }
-
- /*
- * Ok the chain addresses match.
- */
-
-#ifdef CONFIG_IP_ACCT
- /*
- * See if we're in accounting mode and only want to
- * count incoming or outgoing packets.
- */
-
- if (mode & (IP_FW_MODE_ACCT_IN|IP_FW_MODE_ACCT_OUT) &&
- ((mode == IP_FW_MODE_ACCT_IN && f->fw_flg&IP_FW_F_ACCTOUT) ||
- (mode == IP_FW_MODE_ACCT_OUT && f->fw_flg&IP_FW_F_ACCTIN)))
- continue;
-
-#endif
- /*
- * For all non-TCP packets and/or non-first fragments,
- * notcpsyn and notcpack will always be FALSE,
- * so the IP_FW_F_TCPSYN and IP_FW_F_TCPACK flags
- * are actually ignored for these packets.
- */
-
- if((f->fw_flg&IP_FW_F_TCPSYN) && notcpsyn)
- continue;
-
- if((f->fw_flg&IP_FW_F_TCPACK) && notcpack)
- continue;
-
- f_prt=f->fw_flg&IP_FW_F_KIND;
- if (f_prt != IP_FW_F_ALL) {
- /*
- * Specific firewall - packet's protocol
- * must match firewall's.
- */
-
- if (prt != f_prt)
- continue;
-
- if((prt==IP_FW_F_ICMP &&
- ! port_match(&f->fw_pts[0], f->fw_nsp,
- icmp_type,f->fw_flg&IP_FW_F_SRNG)) ||
- !(prt==IP_FW_F_ICMP || ((match & 0x01) &&
- port_match(&f->fw_pts[0], f->fw_nsp, src_port,
- f->fw_flg&IP_FW_F_SRNG) &&
- port_match(&f->fw_pts[f->fw_nsp], f->fw_ndp, dst_port,
- f->fw_flg&IP_FW_F_DRNG)) || ((match & 0x02) &&
- port_match(&f->fw_pts[0], f->fw_nsp, dst_port,
- f->fw_flg&IP_FW_F_SRNG) &&
- port_match(&f->fw_pts[f->fw_nsp], f->fw_ndp, src_port,
- f->fw_flg&IP_FW_F_DRNG))))
- {
- continue;
- }
- }
-
-#ifdef CONFIG_IP_FIREWALL_VERBOSE
- if (f->fw_flg & IP_FW_F_PRN)
- {
- char buf[16];
-
- print_packet(pskb, src_port, dst_port, icmp_type,
- chain_name(chain, mode),
- rule_name(f, mode, buf),
- rif ? rif->name : "-");
- }
-#endif
- if (mode != IP_FW_MODE_CHK) {
- f->fw_bcnt += ntohs((*pskb)->nh.iph->tot_len);
- f->fw_pcnt++;
- }
- if (!(mode & (IP_FW_MODE_ACCT_IN|IP_FW_MODE_ACCT_OUT)))
- break;
- } /* Loop */
-
- if (!(mode & (IP_FW_MODE_ACCT_IN|IP_FW_MODE_ACCT_OUT))) {
-
- /*
- * We rely on policy defined in the rejecting entry or, if no match
- * was found, we rely on the general policy variable for this type
- * of firewall.
- */
-
- if (f != NULL) {
- policy = f->fw_flg;
- tosand = f->fw_tosand;
- tosxor = f->fw_tosxor;
- } else {
- tosand = 0xFF;
- tosxor = 0x00;
- }
-
- if (policy & IP_FW_F_ACCEPT) {
- /* Adjust priority and recompute checksum */
- __u8 tos = (*pskb)->nh.iph->tos;
-
- if (((tos & tosand) ^ tosxor) != tos) {
- if (!skb_ip_make_writable(pskb,
- offsetof(struct iphdr, tos)+1))
- goto drop_it;
-
- (*pskb)->nh.iph->tos = (tos & tosand) ^ tosxor;
- ip_send_check((*pskb)->nh.iph);
- }
-
-#ifdef CONFIG_IP_TRANSPARENT_PROXY
- if (policy & IP_FW_F_REDIR) {
- if (redirport)
- if ((*redirport = htons(f->fw_pts[f->fw_nsp+f->fw_ndp])) == 0) {
- /* Wildcard redirection.
- * Note that redirport will become
- * 0xFFFF for non-TCP/UDP packets.
- */
- *redirport = htons(dst_port);
- }
- answer = FW_REDIRECT;
- } else
-#endif
-#ifdef CONFIG_IP_MASQUERADE
- if (policy & IP_FW_F_MASQ)
- answer = FW_MASQUERADE;
- else
-#endif
- answer = FW_ACCEPT;
-
- } else if (policy & IP_FW_F_ICMPRPL)
- answer = FW_REJECT;
- else {
- drop_it:
- answer = FW_BLOCK;
- }
-
-#ifdef CONFIG_IP_FIREWALL_NETLINK
- if ((policy & IP_FW_F_PRN) && (answer == FW_REJECT || answer == FW_BLOCK))
- {
- struct sk_buff *skb = alloc_skb(128,
- (mode == IP_FW_MODE_CHK) ?
- GFP_KERNEL : GFP_ATOMIC);
- if (skb) {
- int len = min_t(unsigned int,
- 128,
- ntohs((*pskb)->nh.iph->tot_len));
-
- skb_put(skb, len);
- skb_copy_bits(*pskb,
- ((char *)(*pskb)->nh.iph -
- (char *)(*pskb)->data),
- skb->data, len);
- if (netlink_post(NETLINK_FIREWALL, skb))
- kfree_skb(skb);
- }
- }
-#endif
- } else
- /* we're doing accounting, always ok */
- answer = 0;
-
- if (mode == IP_FW_MODE_CHK)
- READ_UNLOCK(&ip_fw_lock);
- else
- WRITE_UNLOCK(&ip_fw_lock);
-
- return answer;
-}
-
-
-static void zero_fw_chain(struct ip_fw *chainptr)
-{
- struct ip_fw *ctmp=chainptr;
-
- WRITE_LOCK(&ip_fw_lock);
- while(ctmp)
- {
- ctmp->fw_pcnt=0L;
- ctmp->fw_bcnt=0L;
- ctmp=ctmp->fw_next;
- }
- WRITE_UNLOCK(&ip_fw_lock);
-}
-
-static void free_fw_chain(struct ip_fw *volatile* chainptr)
-{
- WRITE_LOCK(&ip_fw_lock);
- while ( *chainptr != NULL )
- {
- struct ip_fw *ftmp;
- ftmp = *chainptr;
- *chainptr = ftmp->fw_next;
- if (ftmp->fw_viadev
- && ftmp->fw_viadev != (struct net_device *)-1)
- dev_put(ftmp->fw_viadev);
- kfree(ftmp);
- /* We will block in cleanup's unregister sockopt if unloaded,
- so this is safe. */
- module_put(THIS_MODULE);
- }
- WRITE_UNLOCK(&ip_fw_lock);
-}
-
-/* Volatiles to keep some of the compiler versions amused */
-
-static int insert_in_chain(struct ip_fw *volatile* chainptr, struct ip_fw *frwl,int len)
-{
- struct ip_fw *ftmp;
-
- /* Are we unloading now? We will block on nf_unregister_sockopt */
- if (!try_module_get(THIS_MODULE))
- return ENOPROTOOPT;
-
- ftmp = kmalloc( sizeof(struct ip_fw), GFP_KERNEL );
- if ( ftmp == NULL )
- {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: malloc said no\n");
-#endif
- return( ENOMEM );
- }
-
- memcpy(ftmp, frwl, len);
- /*
- * Allow the more recent "minimise cost" flag to be
- * set. [Rob van Nieuwkerk]
- */
- ftmp->fw_tosand |= 0x01;
- ftmp->fw_tosxor &= 0xFE;
- ftmp->fw_pcnt=0L;
- ftmp->fw_bcnt=0L;
-
- WRITE_LOCK(&ip_fw_lock);
-
- if ((ftmp->fw_vianame)[0]) {
- if (!(ftmp->fw_viadev = dev_get_by_name(ftmp->fw_vianame)))
- ftmp->fw_viadev = (struct net_device *) -1;
- } else
- ftmp->fw_viadev = NULL;
-
- ftmp->fw_next = *chainptr;
- *chainptr=ftmp;
- WRITE_UNLOCK(&ip_fw_lock);
- return(0);
-}
-
-static int append_to_chain(struct ip_fw *volatile* chainptr, struct ip_fw *frwl,int len)
-{
- struct ip_fw *ftmp;
- struct ip_fw *chtmp=NULL;
- struct ip_fw *volatile chtmp_prev=NULL;
-
- /* Are we unloading now? We will block on nf_unregister_sockopt */
- if (!try_module_get(THIS_MODULE))
- return ENOPROTOOPT;
-
- ftmp = kmalloc( sizeof(struct ip_fw), GFP_KERNEL );
- if ( ftmp == NULL )
- {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: malloc said no\n");
-#endif
- return( ENOMEM );
- }
-
- memcpy(ftmp, frwl, len);
- /*
- * Allow the more recent "minimise cost" flag to be
- * set. [Rob van Nieuwkerk]
- */
- ftmp->fw_tosand |= 0x01;
- ftmp->fw_tosxor &= 0xFE;
- ftmp->fw_pcnt=0L;
- ftmp->fw_bcnt=0L;
-
- ftmp->fw_next = NULL;
-
- WRITE_LOCK(&ip_fw_lock);
-
- if ((ftmp->fw_vianame)[0]) {
- if (!(ftmp->fw_viadev = dev_get_by_name(ftmp->fw_vianame)))
- ftmp->fw_viadev = (struct net_device *) -1;
- } else
- ftmp->fw_viadev = NULL;
-
- chtmp_prev=NULL;
- for (chtmp=*chainptr;chtmp!=NULL;chtmp=chtmp->fw_next)
- chtmp_prev=chtmp;
-
- if (chtmp_prev)
- chtmp_prev->fw_next=ftmp;
- else
- *chainptr=ftmp;
- WRITE_UNLOCK(&ip_fw_lock);
- return(0);
-}
-
-static int del_from_chain(struct ip_fw *volatile*chainptr, struct ip_fw *frwl)
-{
- struct ip_fw *ftmp,*ltmp;
- unsigned short tport1,tport2,tmpnum;
- char matches,was_found;
-
- WRITE_LOCK(&ip_fw_lock);
-
- ftmp=*chainptr;
-
- if ( ftmp == NULL )
- {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: chain is empty\n");
-#endif
- WRITE_UNLOCK(&ip_fw_lock);
- return( EINVAL );
- }
-
- ltmp=NULL;
- was_found=0;
-
- while( !was_found && ftmp != NULL )
- {
- matches=1;
- if (ftmp->fw_src.s_addr!=frwl->fw_src.s_addr
- || ftmp->fw_dst.s_addr!=frwl->fw_dst.s_addr
- || ftmp->fw_smsk.s_addr!=frwl->fw_smsk.s_addr
- || ftmp->fw_dmsk.s_addr!=frwl->fw_dmsk.s_addr
- || ftmp->fw_via.s_addr!=frwl->fw_via.s_addr
- || ftmp->fw_flg!=frwl->fw_flg)
- matches=0;
-
- tport1=ftmp->fw_nsp+ftmp->fw_ndp;
- tport2=frwl->fw_nsp+frwl->fw_ndp;
- if (tport1!=tport2)
- matches=0;
- else if (tport1!=0)
- {
- for (tmpnum=0;tmpnum < tport1 && tmpnum < IP_FW_MAX_PORTS;tmpnum++)
- if (ftmp->fw_pts[tmpnum]!=frwl->fw_pts[tmpnum])
- matches=0;
- }
- if (strncmp(ftmp->fw_vianame, frwl->fw_vianame, IFNAMSIZ))
- matches=0;
- if(matches)
- {
- was_found=1;
- if (ftmp->fw_viadev
- && ftmp->fw_viadev != (struct net_device *)-1)
- dev_put(ftmp->fw_viadev);
- if (ltmp)
- {
- ltmp->fw_next=ftmp->fw_next;
- kfree(ftmp);
- ftmp=ltmp->fw_next;
- }
- else
- {
- *chainptr=ftmp->fw_next;
- kfree(ftmp);
- ftmp=*chainptr;
- }
- }
- else
- {
- ltmp = ftmp;
- ftmp = ftmp->fw_next;
- }
- }
- WRITE_UNLOCK(&ip_fw_lock);
- if (was_found) {
- /* We will block in cleanup's unregister sockopt if unloaded,
- so this is safe. */
- module_put(THIS_MODULE);
- return 0;
- } else
- return(EINVAL);
-}
-
-#endif /* CONFIG_IP_ACCT || CONFIG_IP_FIREWALL */
-
-struct ip_fw *check_ipfw_struct(struct ip_fw *frwl, int len)
-{
-
- if ( len != sizeof(struct ip_fw) )
- {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: len=%d, want %d\n",len, sizeof(struct ip_fw));
-#endif
- return(NULL);
- }
-
- if ( (frwl->fw_flg & ~IP_FW_F_MASK) != 0 )
- {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: undefined flag bits set (flags=%x)\n",
- frwl->fw_flg);
-#endif
- return(NULL);
- }
-
-#ifndef CONFIG_IP_TRANSPARENT_PROXY
- if (frwl->fw_flg & IP_FW_F_REDIR) {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: unsupported flag IP_FW_F_REDIR\n");
-#endif
- return(NULL);
- }
-#endif
-
-#ifndef CONFIG_IP_MASQUERADE
- if (frwl->fw_flg & IP_FW_F_MASQ) {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: unsupported flag IP_FW_F_MASQ\n");
-#endif
- return(NULL);
- }
-#endif
-
- if ( (frwl->fw_flg & IP_FW_F_SRNG) && frwl->fw_nsp < 2 )
- {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: src range set but fw_nsp=%d\n",
- frwl->fw_nsp);
-#endif
- return(NULL);
- }
-
- if ( (frwl->fw_flg & IP_FW_F_DRNG) && frwl->fw_ndp < 2 )
- {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: dst range set but fw_ndp=%d\n",
- frwl->fw_ndp);
-#endif
- return(NULL);
- }
-
- if ( frwl->fw_nsp + frwl->fw_ndp > (frwl->fw_flg & IP_FW_F_REDIR ? IP_FW_MAX_PORTS - 1 : IP_FW_MAX_PORTS) )
- {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: too many ports (%d+%d)\n",
- frwl->fw_nsp,frwl->fw_ndp);
-#endif
- return(NULL);
- }
-
- return frwl;
-}
-
-
-
-
-#ifdef CONFIG_IP_ACCT
-
-int ip_acct_ctl(int stage, void *m, int len)
-{
- if ( stage == IP_ACCT_FLUSH )
- {
- free_fw_chain(&ip_acct_chain);
- return(0);
- }
- if ( stage == IP_ACCT_ZERO )
- {
- zero_fw_chain(ip_acct_chain);
- return(0);
- }
- if ( stage == IP_ACCT_INSERT || stage == IP_ACCT_APPEND ||
- stage == IP_ACCT_DELETE )
- {
- struct ip_fw *frwl;
-
- if (!(frwl=check_ipfw_struct(m,len)))
- return (EINVAL);
-
- switch (stage)
- {
- case IP_ACCT_INSERT:
- return( insert_in_chain(&ip_acct_chain,frwl,len));
- case IP_ACCT_APPEND:
- return( append_to_chain(&ip_acct_chain,frwl,len));
- case IP_ACCT_DELETE:
- return( del_from_chain(&ip_acct_chain,frwl));
- default:
- /*
- * Should be panic but... (Why ??? - AC)
- */
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_acct_ctl: unknown request %d\n",stage);
-#endif
- return(EINVAL);
- }
- }
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_acct_ctl: unknown request %d\n",stage);
-#endif
- return(EINVAL);
-}
-#endif
-
-#ifdef CONFIG_IP_FIREWALL
-int ip_fw_ctl(int stage, void *m, int len)
-{
- int cmd, fwtype;
-
- cmd = stage & IP_FW_COMMAND;
- fwtype = (stage & IP_FW_TYPE) >> IP_FW_SHIFT;
-
- if ( cmd == IP_FW_FLUSH )
- {
- free_fw_chain(chains[fwtype]);
- return(0);
- }
-
- if ( cmd == IP_FW_ZERO )
- {
- zero_fw_chain(*chains[fwtype]);
- return(0);
- }
-
- if ( cmd == IP_FW_POLICY )
- {
- int *tmp_policy_ptr;
- tmp_policy_ptr=(int *)m;
- *policies[fwtype] = *tmp_policy_ptr;
- return 0;
- }
-
- if ( cmd == IP_FW_CHECK )
- {
- struct sk_buff *tmp_skb;
- struct net_device *viadev;
- struct ip_fwpkt *ipfwp;
- struct iphdr *ip;
- int hdrlen, ret;
-
- hdrlen = sizeof(struct ip_fwpkt) -
- sizeof(struct in_addr) -
- IFNAMSIZ;
-
- if ( len != sizeof(struct ip_fwpkt) )
- {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: length=%d, expected %d\n",
- len, sizeof(struct ip_fwpkt));
-#endif
- return( EINVAL );
- }
-
- ipfwp = (struct ip_fwpkt *)m;
- ip = &(ipfwp->fwp_iph);
-
- if ( !(viadev = dev_get_by_name(ipfwp->fwp_vianame)) ) {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: invalid device \"%s\"\n", ipfwp->fwp_vianame);
-#endif
- return(EINVAL);
- } else if ( ip->ihl != sizeof(struct iphdr) / sizeof(int)) {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: ip->ihl=%d, want %d\n",ip->ihl,
- sizeof(struct iphdr)/sizeof(int));
-#endif
- dev_put(viadev);
- return(EINVAL);
- }
-
- /* Fix this one up by hand, who knows how many
- * tools will break if we start to barf on this.
- */
- if (ntohs(ip->tot_len) > hdrlen)
- ip->tot_len = htons(hdrlen);
-
- if ((tmp_skb = alloc_skb(hdrlen, GFP_ATOMIC)) == NULL) {
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: tmp_skb alloc failure\n");
-#endif
- dev_put(viadev);
- return(EFAULT);
- }
- skb_reserve(tmp_skb, hdrlen);
- skb_push(tmp_skb, hdrlen);
- memcpy(tmp_skb->data, ip, hdrlen);
-
- ret = ip_fw_chk(&tmp_skb, viadev, NULL, *chains[fwtype],
- *policies[fwtype], IP_FW_MODE_CHK);
-
- kfree_skb(tmp_skb);
- dev_put(viadev);
-
- switch (ret) {
- case FW_ACCEPT:
- return(0);
- case FW_REDIRECT:
- return(ECONNABORTED);
- case FW_MASQUERADE:
- return(ECONNRESET);
- case FW_REJECT:
- return(ECONNREFUSED);
- default: /* FW_BLOCK */
- return(ETIMEDOUT);
- }
- }
-
- if ( cmd == IP_FW_MASQ_TIMEOUTS )
- return ip_fw_masq_timeouts(m, len);
-
-/*
- * Here we really working hard-adding new elements
- * to blocking/forwarding chains or deleting 'em
- */
-
- if ( cmd == IP_FW_INSERT || cmd == IP_FW_APPEND || cmd == IP_FW_DELETE )
- {
- struct ip_fw *frwl;
- int fwtype;
-
- frwl=check_ipfw_struct(m,len);
- if (frwl==NULL)
- return (EINVAL);
- fwtype = (stage & IP_FW_TYPE) >> IP_FW_SHIFT;
-
- switch (cmd)
- {
- case IP_FW_INSERT:
- return(insert_in_chain(chains[fwtype],frwl,len));
- case IP_FW_APPEND:
- return(append_to_chain(chains[fwtype],frwl,len));
- case IP_FW_DELETE:
- return(del_from_chain(chains[fwtype],frwl));
- default:
- /*
- * Should be panic but... (Why are BSD people panic obsessed ??)
- */
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: unknown request %d\n",stage);
-#endif
- return(EINVAL);
- }
- }
-
-#ifdef DEBUG_IP_FIREWALL
- printk("ip_fw_ctl: unknown request %d\n",stage);
-#endif
- return(ENOPROTOOPT);
-}
-#endif /* CONFIG_IP_FIREWALL */
-
-#if defined(CONFIG_IP_FIREWALL) || defined(CONFIG_IP_ACCT)
-static int ip_chain_procinfo(int stage, char *buffer, char **start,
- off_t offset, int length)
-{
- off_t pos=0, begin=0;
- struct ip_fw *i;
- int len, p;
- int last_len = 0;
-
-
- switch(stage)
- {
-#ifdef CONFIG_IP_FIREWALL
- case IP_FW_IN:
- i = ip_fw_in_chain;
- len=sprintf(buffer, "IP firewall input rules, default %d\n",
- ip_fw_in_policy);
- break;
- case IP_FW_OUT:
- i = ip_fw_out_chain;
- len=sprintf(buffer, "IP firewall output rules, default %d\n",
- ip_fw_out_policy);
- break;
- case IP_FW_FWD:
- i = ip_fw_fwd_chain;
- len=sprintf(buffer, "IP firewall forward rules, default %d\n",
- ip_fw_fwd_policy);
- break;
-#endif
-#ifdef CONFIG_IP_ACCT
- case IP_FW_ACCT:
- i = ip_acct_chain;
- len=sprintf(buffer,"IP accounting rules\n");
- break;
-#endif
- default:
- /* this should never be reached, but safety first... */
- i = NULL;
- len=0;
- break;
- }
-
- READ_LOCK(&ip_fw_lock);
-
- while(i!=NULL)
- {
- len+=sprintf(buffer+len,"%08X/%08X->%08X/%08X %.16s %08X %X ",
- ntohl(i->fw_src.s_addr),ntohl(i->fw_smsk.s_addr),
- ntohl(i->fw_dst.s_addr),ntohl(i->fw_dmsk.s_addr),
- (i->fw_vianame)[0] ? i->fw_vianame : "-",
- ntohl(i->fw_via.s_addr), i->fw_flg);
- /* 10 is enough for a 32 bit box but the counters are 64bit on
- the Alpha and Ultrapenguin */
- len+=sprintf(buffer+len,"%u %u %-20lu %-20lu",
- i->fw_nsp,i->fw_ndp, i->fw_pcnt,i->fw_bcnt);
- for (p = 0; p < IP_FW_MAX_PORTS; p++)
- len+=sprintf(buffer+len, " %u", i->fw_pts[p]);
- len+=sprintf(buffer+len, " A%02X X%02X", i->fw_tosand, i->fw_tosxor);
- buffer[len++]='\n';
- buffer[len]='\0';
- pos=begin+len;
- if(pos<offset)
- {
- len=0;
- begin=pos;
- }
- else if(pos>offset+length)
- {
- len = last_len;
- break;
- }
- last_len = len;
- i=i->fw_next;
- }
- READ_UNLOCK(&ip_fw_lock);
- *start=buffer+(offset-begin);
- len-=(offset-begin);
- if(len>length)
- len=length;
- return len;
-}
-#endif
-
-#ifdef CONFIG_IP_ACCT
-static int ip_acct_procinfo(char *buffer, char **start, off_t offset,
- int length)
-{
- return ip_chain_procinfo(IP_FW_ACCT, buffer,start, offset,length);
-}
-#endif
-
-#ifdef CONFIG_IP_FIREWALL
-static int ip_fw_in_procinfo(char *buffer, char **start, off_t offset,
- int length)
-{
- return ip_chain_procinfo(IP_FW_IN, buffer,start,offset,length);
-}
-
-static int ip_fw_out_procinfo(char *buffer, char **start, off_t offset,
- int length)
-{
- return ip_chain_procinfo(IP_FW_OUT, buffer,start,offset,length);
-}
-
-static int ip_fw_fwd_procinfo(char *buffer, char **start, off_t offset,
- int length)
-{
- return ip_chain_procinfo(IP_FW_FWD, buffer,start,offset,length);
-}
-#endif
-
-
-#ifdef CONFIG_IP_FIREWALL
-/*
- * Interface to the generic firewall chains.
- */
-
-int ipfw_input_check(struct firewall_ops *this, int pf,
- struct net_device *dev, void *arg,
- struct sk_buff **pskb)
-{
- return ip_fw_chk(pskb, dev, arg, ip_fw_in_chain, ip_fw_in_policy,
- IP_FW_MODE_FW);
-}
-
-int ipfw_output_check(struct firewall_ops *this, int pf,
- struct net_device *dev, void *arg,
- struct sk_buff **pskb)
-{
- return ip_fw_chk(pskb, dev, arg, ip_fw_out_chain, ip_fw_out_policy,
- IP_FW_MODE_FW);
-}
-
-int ipfw_forward_check(struct firewall_ops *this, int pf,
- struct net_device *dev, void *arg,
- struct sk_buff **pskb)
-{
- return ip_fw_chk(pskb, dev, arg, ip_fw_fwd_chain, ip_fw_fwd_policy,
- IP_FW_MODE_FW);
-}
-
-#ifdef CONFIG_IP_ACCT
-int ipfw_acct_in(struct firewall_ops *this, int pf, struct net_device *dev,
- void *arg, struct sk_buff **pskb)
-{
- return ip_fw_chk(pskb,dev,NULL,ip_acct_chain,0,IP_FW_MODE_ACCT_IN);
-}
-
-int ipfw_acct_out(struct firewall_ops *this, int pf, struct net_device *dev,
- void *arg, struct sk_buff **pskb)
-{
- return ip_fw_chk(pskb,dev,NULL,ip_acct_chain,0,IP_FW_MODE_ACCT_OUT);
-}
-#endif
-
-struct firewall_ops ipfw_ops = {
- .fw_forward = ipfw_forward_check,
- .fw_input = ipfw_input_check,
- .fw_output = ipfw_output_check,
-#ifdef CONFIG_IP_ACCT
- .fw_acct_in = ipfw_acct_in,
- .fw_acct_out = ipfw_acct_out,
-#endif
-};
-
-#endif
-
-#if defined(CONFIG_IP_ACCT) || defined(CONFIG_IP_FIREWALL)
-
-int ipfw_device_event(struct notifier_block *this, unsigned long event, void *ptr)
-{
- struct net_device *dev=ptr;
- char *devname = dev->name;
- struct ip_fw *fw;
- int chn;
-
- WRITE_LOCK(&ip_fw_lock);
-
- if (event == NETDEV_UP) {
- for (chn = 0; chn < IP_FW_CHAINS; chn++)
- for (fw = *chains[chn]; fw; fw = fw->fw_next)
- if ((fw->fw_vianame)[0] && !strncmp(devname,
- fw->fw_vianame, IFNAMSIZ)) {
- dev_hold(dev);
- fw->fw_viadev = dev;
- }
- } else if (event == NETDEV_DOWN) {
- for (chn = 0; chn < IP_FW_CHAINS; chn++)
- for (fw = *chains[chn]; fw; fw = fw->fw_next)
- /* we could compare just the pointers ... */
- if ((fw->fw_vianame)[0] && !strncmp(devname,
- fw->fw_vianame, IFNAMSIZ)){
- if (fw->fw_viadev
- && fw->fw_viadev != (struct net_device *)-1)
- dev_put(fw->fw_viadev);
- fw->fw_viadev = (struct net_device*)-1;
- }
- }
-
- WRITE_UNLOCK(&ip_fw_lock);
- return NOTIFY_DONE;
-}
-
-static struct notifier_block ipfw_dev_notifier = {
- .notifier_call = ipfw_device_event,
-};
-
-#endif
-
-int ipfw_init_or_cleanup(int init)
-{
- int ret = 0;
-
- if (!init)
- goto cleanup;
-
- ret = register_firewall(PF_INET, &ipfw_ops);
- if (ret < 0)
- goto cleanup_nothing;
-
-#ifdef CONFIG_IP_ACCT
- proc_net_create("ip_acct", S_IFREG | S_IRUGO | S_IWUSR, ip_acct_procinfo);
-#endif
- proc_net_create("ip_input", S_IFREG | S_IRUGO | S_IWUSR, ip_fw_in_procinfo);
- proc_net_create("ip_output", S_IFREG | S_IRUGO | S_IWUSR, ip_fw_out_procinfo);
- proc_net_create("ip_forward", S_IFREG | S_IRUGO | S_IWUSR, ip_fw_fwd_procinfo);
-
- /* Register for device up/down reports */
- register_netdevice_notifier(&ipfw_dev_notifier);
-
-#ifdef CONFIG_IP_FIREWALL_NETLINK
- ipfwsk = netlink_kernel_create(NETLINK_FIREWALL, NULL);
-#endif
- return ret;
-
- cleanup:
-#ifdef CONFIG_IP_FIREWALL_NETLINK
- sock_release(ipfwsk->sk_socket);
-#endif
- unregister_netdevice_notifier(&ipfw_dev_notifier);
-
-#ifdef CONFIG_IP_ACCT
- proc_net_remove("ip_acct");
-#endif
- proc_net_remove("ip_input");
- proc_net_remove("ip_output");
- proc_net_remove("ip_forward");
-
- free_fw_chain(chains[IP_FW_FWD]);
- free_fw_chain(chains[IP_FW_IN]);
- free_fw_chain(chains[IP_FW_OUT]);
- free_fw_chain(chains[IP_FW_ACCT]);
-
- unregister_firewall(PF_INET, &ipfw_ops);
-
- cleanup_nothing:
- return ret;
-}
+++ /dev/null
-/*********************************************************************
- *
- * Filename: crc.c
- * Version: 0.1
- * Description: CRC calculation routines
- * Status: Experimental.
- * Author: Dag Brattli <dagb@cs.uit.no>
- * Created at: Mon Aug 4 20:40:53 1997
- * Modified at: Sun May 2 20:28:08 1999
- * Modified by: Dag Brattli <dagb@cs.uit.no>
- * Sources: ppp.c by Michael Callahan <callahan@maths.ox.ac.uk>
- * Al Longyear <longyear@netcom.com>
- *
- ********************************************************************/
-
-#include <net/irda/crc.h>
-#include <linux/module.h>
-
-/*
- * This mysterious table is just the CRC of each possible byte. It can be
- * computed using the standard bit-at-a-time methods. The polynomial can
- * be seen in entry 128, 0x8408. This corresponds to x^0 + x^5 + x^12.
- * Add the implicit x^16, and you have the standard CRC-CCITT.
- */
-__u16 const irda_crc16_table[256] =
-{
- 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
- 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
- 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
- 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
- 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
- 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
- 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
- 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
- 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
- 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
- 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
- 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
- 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
- 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
- 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
- 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
- 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
- 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
- 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
- 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
- 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
- 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
- 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
- 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
- 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
- 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
- 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
- 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
- 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
- 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
- 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
- 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
-};
-EXPORT_SYMBOL(irda_crc16_table);
-
-__u16 irda_calc_crc16( __u16 fcs, __u8 const *buf, size_t len)
-{
- while (len--)
- fcs = irda_fcs(fcs, *buf++);
- return fcs;
-}
-EXPORT_SYMBOL(irda_calc_crc16);
+++ /dev/null
-/*
- * net/sched/sch_csz.c Clark-Shenker-Zhang scheduler.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Authors: Alexey Kuznetsov, <kuznet@ms2.inr.ac.ru>
- *
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-#include <asm/bitops.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/jiffies.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/socket.h>
-#include <linux/sockios.h>
-#include <linux/in.h>
-#include <linux/errno.h>
-#include <linux/interrupt.h>
-#include <linux/if_ether.h>
-#include <linux/inet.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/notifier.h>
-#include <net/ip.h>
-#include <net/route.h>
-#include <linux/skbuff.h>
-#include <net/sock.h>
-#include <net/pkt_sched.h>
-
-
-/* Clark-Shenker-Zhang algorithm.
- =======================================
-
- SOURCE.
-
- David D. Clark, Scott Shenker and Lixia Zhang
- "Supporting Real-Time Applications in an Integrated Services Packet
- Network: Architecture and Mechanism".
-
- CBQ presents a flexible universal algorithm for packet scheduling,
- but it has pretty poor delay characteristics.
- Round-robin scheduling and link-sharing goals
- apparently contradict minimization of network delay and jitter.
- Moreover, correct handling of predictive flows seems to be
- impossible in CBQ.
-
- CSZ presents a more precise but less flexible and less efficient
- approach. As I understand it, the main idea is to create
- WFQ flows for each guaranteed service and to allocate
- the rest of bandwidth to dummy flow-0. Flow-0 comprises
- the predictive services and the best effort traffic;
- it is handled by a priority scheduler with the highest
- priority band allocated for predictive services, and the rest ---
- to the best effort packets.
-
- Note that in CSZ flows are NOT limited to their bandwidth. It
- is supposed that the flow passed admission control at the edge
- of the QoS network and it doesn't need further shaping. Any
- attempt to improve the flow or to shape it to a token bucket
- at intermediate hops will introduce undesired delays and raise
- jitter.
-
- At the moment CSZ is the only scheduler that provides
- true guaranteed service. Another schemes (including CBQ)
- do not provide guaranteed delay and randomize jitter.
- There is a proof (Sally Floyd), that delay
- can be estimated by a IntServ compliant formula.
- This result is true formally, but it is wrong in principle.
- It takes into account only round-robin delays,
- ignoring delays introduced by link sharing i.e. overlimiting.
- Note that temporary overlimits are inevitable because
- real links are not ideal, and the real algorithm must take this
- into account.
-
- ALGORITHM.
-
- --- Notations.
-
- $B$ is link bandwidth (bits/sec).
-
- $I$ is set of all flows, including flow $0$.
- Every flow $a \in I$ has associated bandwidth slice $r_a < 1$ and
- $\sum_{a \in I} r_a = 1$.
-
- --- Flow model.
-
- Let $m_a$ is the number of backlogged bits in flow $a$.
- The flow is {\em active}, if $m_a > 0$.
- This number is a discontinuous function of time;
- when a packet $i$ arrives:
- \[
- m_a(t_i+0) - m_a(t_i-0) = L^i,
- \]
- where $L^i$ is the length of the arrived packet.
- The flow queue is drained continuously until $m_a == 0$:
- \[
- {d m_a \over dt} = - { B r_a \over \sum_{b \in A} r_b}.
- \]
- I.e. flow rates are their allocated rates proportionally
- scaled to take all available link bandwidth. Apparently,
- it is not the only possible policy. F.e. CBQ classes
- without borrowing would be modelled by:
- \[
- {d m_a \over dt} = - B r_a .
- \]
- More complicated hierarchical bandwidth allocation
- policies are possible, but unfortunately, the basic
- flow equations have a simple solution only for proportional
- scaling.
-
- --- Departure times.
-
- We calculate the time until the last bit of packet is sent:
- \[
- E_a^i(t) = { m_a(t_i) - \delta_a(t) \over r_a },
- \]
- where $\delta_a(t)$ is number of bits drained since $t_i$.
- We have to evaluate $E_a^i$ for all queued packets,
- then find the packet with minimal $E_a^i$ and send it.
-
- This sounds good, but direct implementation of the algorithm
- is absolutely infeasible. Luckily, if flow rates
- are scaled proportionally, the equations have a simple solution.
-
- The differential equation for $E_a^i$ is
- \[
- {d E_a^i (t) \over dt } = - { d \delta_a(t) \over dt} { 1 \over r_a} =
- { B \over \sum_{b \in A} r_b}
- \]
- with initial condition
- \[
- E_a^i (t_i) = { m_a(t_i) \over r_a } .
- \]
-
- Let's introduce an auxiliary function $R(t)$:
-
- --- Round number.
-
- Consider the following model: we rotate over active flows,
- sending $r_a B$ bits from every flow, so that we send
- $B \sum_{a \in A} r_a$ bits per round, that takes
- $\sum_{a \in A} r_a$ seconds.
-
- Hence, $R(t)$ (round number) is a monotonically increasing
- linear function of time when $A$ is not changed
- \[
- { d R(t) \over dt } = { 1 \over \sum_{a \in A} r_a }
- \]
- and it is continuous when $A$ changes.
-
- The central observation is that the quantity
- $F_a^i = R(t) + E_a^i(t)/B$ does not depend on time at all!
- $R(t)$ does not depend on flow, so that $F_a^i$ can be
- calculated only once on packet arrival, and we need not
- recalculate $E$ numbers and resorting queues.
- The number $F_a^i$ is called finish number of the packet.
- It is just the value of $R(t)$ when the last bit of packet
- is sent out.
-
- Maximal finish number on flow is called finish number of flow
- and minimal one is "start number of flow".
- Apparently, flow is active if and only if $F_a \leq R$.
-
- When a packet of length $L_i$ bit arrives to flow $a$ at time $t_i$,
- we calculate $F_a^i$ as:
-
- If flow was inactive ($F_a < R$):
- $F_a^i = R(t) + {L_i \over B r_a}$
- otherwise
- $F_a^i = F_a + {L_i \over B r_a}$
-
- These equations complete the algorithm specification.
-
- It looks pretty hairy, but there is a simple
- procedure for solving these equations.
- See procedure csz_update(), that is a generalization of
- the algorithm from S. Keshav's thesis Chapter 3
- "Efficient Implementation of Fair Queuing".
-
- NOTES.
-
- * We implement only the simplest variant of CSZ,
- when flow-0 is a explicit 4band priority fifo.
- This is bad, but we need a "peek" operation in addition
- to "dequeue" to implement complete CSZ.
- I do not want to do that, unless it is absolutely
- necessary.
-
- * A primitive support for token bucket filtering
- presents itself too. It directly contradicts CSZ, but
- even though the Internet is on the globe ... :-)
- "the edges of the network" really exist.
-
- BUGS.
-
- * Fixed point arithmetic is overcomplicated, suboptimal and even
- wrong. Check it later. */
-
-
-/* This number is arbitrary */
-
-#define CSZ_GUARANTEED 16
-#define CSZ_FLOWS (CSZ_GUARANTEED+4)
-
-struct csz_head
-{
- struct csz_head *snext;
- struct csz_head *sprev;
- struct csz_head *fnext;
- struct csz_head *fprev;
-};
-
-struct csz_flow
-{
- struct csz_head *snext;
- struct csz_head *sprev;
- struct csz_head *fnext;
- struct csz_head *fprev;
-
-/* Parameters */
- struct tc_ratespec rate;
- struct tc_ratespec slice;
- u32 *L_tab; /* Lookup table for L/(B*r_a) values */
- unsigned long limit; /* Maximal length of queue */
-#ifdef CSZ_PLUS_TBF
- struct tc_ratespec peakrate;
- __u32 buffer; /* Depth of token bucket, normalized
- as L/(B*r_a) */
- __u32 mtu;
-#endif
-
-/* Variables */
-#ifdef CSZ_PLUS_TBF
- unsigned long tokens; /* Tokens number: usecs */
- psched_time_t t_tbf;
- unsigned long R_tbf;
- int throttled;
-#endif
- unsigned peeked;
- unsigned long start; /* Finish number of the first skb */
- unsigned long finish; /* Finish number of the flow */
-
- struct sk_buff_head q; /* FIFO queue */
-};
-
-#define L2R(f,L) ((f)->L_tab[(L)>>(f)->slice.cell_log])
-
-struct csz_sched_data
-{
-/* Parameters */
- unsigned char rate_log; /* fixed point position for rate;
- * really we need not it */
- unsigned char R_log; /* fixed point position for round number */
- unsigned char delta_log; /* 1<<delta_log is maximal timeout in usecs;
- * 21 <-> 2.1sec is MAXIMAL value */
-
-/* Variables */
- struct tcf_proto *filter_list;
- u8 prio2band[TC_PRIO_MAX+1];
-#ifdef CSZ_PLUS_TBF
- struct timer_list wd_timer;
- long wd_expires;
-#endif
- psched_time_t t_c; /* Time check-point */
- unsigned long R_c; /* R-number check-point */
- unsigned long rate; /* Current sum of rates of active flows */
- struct csz_head s; /* Flows sorted by "start" */
- struct csz_head f; /* Flows sorted by "finish" */
-
- struct sk_buff_head other[4];/* Predicted (0) and the best efforts
- classes (1,2,3) */
- struct csz_flow flow[CSZ_GUARANTEED]; /* Array of flows */
-};
-
-/* These routines (csz_insert_finish and csz_insert_start) are
- the most time consuming part of all the algorithm.
-
- We insert to sorted list, so that time
- is linear with respect to number of active flows in the worst case.
- Note that we have not very large number of guaranteed flows,
- so that logarithmic algorithms (heap etc.) are useless,
- they are slower than linear one when length of list <= 32.
-
- Heap would take sence if we used WFQ for best efforts
- flows, but SFQ is better choice in this case.
- */
-
-
-/* Insert flow "this" to the list "b" before
- flow with greater finish number.
- */
-
-#if 0
-/* Scan forward */
-static inline void csz_insert_finish(struct csz_head *b,
- struct csz_flow *this)
-{
- struct csz_head *f = b->fnext;
- unsigned long finish = this->finish;
-
- while (f != b) {
- if (((struct csz_flow*)f)->finish - finish > 0)
- break;
- f = f->fnext;
- }
- this->fnext = f;
- this->fprev = f->fprev;
- this->fnext->fprev = this->fprev->fnext = (struct csz_head*)this;
-}
-#else
-/* Scan backward */
-static inline void csz_insert_finish(struct csz_head *b,
- struct csz_flow *this)
-{
- struct csz_head *f = b->fprev;
- unsigned long finish = this->finish;
-
- while (f != b) {
- if (((struct csz_flow*)f)->finish - finish <= 0)
- break;
- f = f->fprev;
- }
- this->fnext = f->fnext;
- this->fprev = f;
- this->fnext->fprev = this->fprev->fnext = (struct csz_head*)this;
-}
-#endif
-
-/* Insert flow "this" to the list "b" before
- flow with greater start number.
- */
-
-static inline void csz_insert_start(struct csz_head *b,
- struct csz_flow *this)
-{
- struct csz_head *f = b->snext;
- unsigned long start = this->start;
-
- while (f != b) {
- if (((struct csz_flow*)f)->start - start > 0)
- break;
- f = f->snext;
- }
- this->snext = f;
- this->sprev = f->sprev;
- this->snext->sprev = this->sprev->snext = (struct csz_head*)this;
-}
-
-
-/* Calculate and return current round number.
- It is another time consuming part, but
- it is impossible to avoid it.
-
- It costs O(N) that make all the algorithm useful only
- to play with closest to ideal fluid model.
-
- There exist less academic, but more practical modifications,
- which might have even better characteristics (WF2Q+, HPFQ, HFSC)
- */
-
-static unsigned long csz_update(struct Qdisc *sch)
-{
- struct csz_sched_data *q = (struct csz_sched_data*)sch->data;
- struct csz_flow *a;
- unsigned long F;
- unsigned long tmp;
- psched_time_t now;
- unsigned long delay;
- unsigned long R_c;
-
- PSCHED_GET_TIME(now);
- delay = PSCHED_TDIFF_SAFE(now, q->t_c, 0, goto do_reset);
-
- if (delay>>q->delta_log) {
-do_reset:
- /* Delta is too large.
- It is possible if MTU/BW > 1<<q->delta_log
- (i.e. configuration error) or because of hardware
- fault. We have no choice...
- */
- qdisc_reset(sch);
- return 0;
- }
-
- q->t_c = now;
-
- for (;;) {
- a = (struct csz_flow*)q->f.fnext;
-
- /* No more active flows. Reset R and exit. */
- if (a == (struct csz_flow*)&q->f) {
-#ifdef CSZ_DEBUG
- if (q->rate) {
- printk("csz_update: rate!=0 on inactive csz\n");
- q->rate = 0;
- }
-#endif
- q->R_c = 0;
- return 0;
- }
-
- F = a->finish;
-
-#ifdef CSZ_DEBUG
- if (q->rate == 0) {
- printk("csz_update: rate=0 on active csz\n");
- goto do_reset;
- }
-#endif
-
- /*
- * tmp = (t - q->t_c)/q->rate;
- */
-
- tmp = ((delay<<(31-q->delta_log))/q->rate)>>(31-q->delta_log+q->R_log);
-
- tmp += q->R_c;
-
- /* OK, this flow (and all flows with greater
- finish numbers) is still active */
- if (F - tmp > 0)
- break;
-
- /* It is more not active */
-
- a->fprev->fnext = a->fnext;
- a->fnext->fprev = a->fprev;
-
- /*
- * q->t_c += (F - q->R_c)*q->rate
- */
-
- tmp = ((F-q->R_c)*q->rate)<<q->R_log;
- R_c = F;
- q->rate -= a->slice.rate;
-
- if ((long)(delay - tmp) >= 0) {
- delay -= tmp;
- continue;
- }
- delay = 0;
- }
-
- q->R_c = tmp;
- return tmp;
-}
-
-unsigned csz_classify(struct sk_buff *skb, struct csz_sched_data *q)
-{
- return CSZ_GUARANTEED;
-}
-
-static int
-csz_enqueue(struct sk_buff *skb, struct Qdisc* sch)
-{
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
- unsigned flow_id = csz_classify(skb, q);
- unsigned long R;
- int prio = 0;
- struct csz_flow *this;
-
- if (flow_id >= CSZ_GUARANTEED) {
- prio = flow_id - CSZ_GUARANTEED;
- flow_id = 0;
- }
-
- this = &q->flow[flow_id];
- if (this->q.qlen >= this->limit || this->L_tab == NULL) {
- sch->stats.drops++;
- kfree_skb(skb);
- return NET_XMIT_DROP;
- }
-
- R = csz_update(sch);
-
- if ((long)(this->finish - R) >= 0) {
- /* It was active */
- this->finish += L2R(this,skb->len);
- } else {
- /* It is inactive; activate it */
- this->finish = R + L2R(this,skb->len);
- q->rate += this->slice.rate;
- csz_insert_finish(&q->f, this);
- }
-
- /* If this flow was empty, remember start number
- and insert it into start queue */
- if (this->q.qlen == 0) {
- this->start = this->finish;
- csz_insert_start(&q->s, this);
- }
- if (flow_id)
- skb_queue_tail(&this->q, skb);
- else
- skb_queue_tail(&q->other[prio], skb);
- sch->q.qlen++;
- sch->stats.bytes += skb->len;
- sch->stats.packets++;
- return 0;
-}
-
-static __inline__ struct sk_buff *
-skb_dequeue_best(struct csz_sched_data * q)
-{
- int i;
- struct sk_buff *skb;
-
- for (i=0; i<4; i++) {
- skb = skb_dequeue(&q->other[i]);
- if (skb) {
- q->flow[0].q.qlen--;
- return skb;
- }
- }
- return NULL;
-}
-
-static __inline__ struct sk_buff *
-skb_peek_best(struct csz_sched_data * q)
-{
- int i;
- struct sk_buff *skb;
-
- for (i=0; i<4; i++) {
- skb = skb_peek(&q->other[i]);
- if (skb)
- return skb;
- }
- return NULL;
-}
-
-#ifdef CSZ_PLUS_TBF
-
-static void csz_watchdog(unsigned long arg)
-{
- struct Qdisc *sch = (struct Qdisc*)arg;
-
- qdisc_wakeup(sch->dev);
-}
-
-static __inline__ void
-csz_move_queue(struct csz_flow *this, long delta)
-{
- this->fprev->fnext = this->fnext;
- this->fnext->fprev = this->fprev;
-
- this->start += delta;
- this->finish += delta;
-
- csz_insert_finish(this);
-}
-
-static __inline__ int csz_enough_tokens(struct csz_sched_data *q,
- struct csz_flow *this,
- struct sk_buff *skb)
-{
- long toks;
- long shift;
- psched_time_t now;
-
- PSCHED_GET_TIME(now);
-
- toks = PSCHED_TDIFF(now, t_tbf) + this->tokens - L2R(q,this,skb->len);
-
- shift = 0;
- if (this->throttled) {
- /* Remember aposteriory delay */
-
- unsigned long R = csz_update(q);
- shift = R - this->R_tbf;
- this->R_tbf = R;
- }
-
- if (toks >= 0) {
- /* Now we have enough tokens to proceed */
-
- this->tokens = toks <= this->depth ? toks : this->depth;
- this->t_tbf = now;
-
- if (!this->throttled)
- return 1;
-
- /* Flow was throttled. Update its start&finish numbers
- with delay calculated aposteriori.
- */
-
- this->throttled = 0;
- if (shift > 0)
- csz_move_queue(this, shift);
- return 1;
- }
-
- if (!this->throttled) {
- /* Flow has just been throttled; remember
- current round number to calculate aposteriori delay
- */
- this->throttled = 1;
- this->R_tbf = csz_update(q);
- }
-
- /* Move all the queue to the time when it will be allowed to send.
- We should translate time to round number, but it is impossible,
- so that we made the most conservative estimate i.e. we suppose
- that only this flow is active and, hence, R = t.
- Really toks <= R <= toks/r_a.
-
- This apriory shift in R will be adjusted later to reflect
- real delay. We cannot avoid it because of:
- - throttled flow continues to be active from the viewpoint
- of CSZ, so that it would acquire the highest priority,
- if you not adjusted start numbers.
- - Eventually, finish number would become less than round
- number and flow were declared inactive.
- */
-
- toks = -toks;
-
- /* Remember, that we should start watchdog */
- if (toks < q->wd_expires)
- q->wd_expires = toks;
-
- toks >>= q->R_log;
- shift += toks;
- if (shift > 0) {
- this->R_tbf += toks;
- csz_move_queue(this, shift);
- }
- csz_insert_start(this);
- return 0;
-}
-#endif
-
-
-static struct sk_buff *
-csz_dequeue(struct Qdisc* sch)
-{
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
- struct sk_buff *skb;
- struct csz_flow *this;
-
-#ifdef CSZ_PLUS_TBF
- q->wd_expires = 0;
-#endif
- this = (struct csz_flow*)q->s.snext;
-
- while (this != (struct csz_flow*)&q->s) {
-
- /* First of all: unlink from start list */
- this->sprev->snext = this->snext;
- this->snext->sprev = this->sprev;
-
- if (this != &q->flow[0]) { /* Guaranteed flow */
- skb = __skb_dequeue(&this->q);
- if (skb) {
-#ifdef CSZ_PLUS_TBF
- if (this->depth) {
- if (!csz_enough_tokens(q, this, skb))
- continue;
- }
-#endif
- if (this->q.qlen) {
- struct sk_buff *nskb = skb_peek(&this->q);
- this->start += L2R(this,nskb->len);
- csz_insert_start(&q->s, this);
- }
- sch->q.qlen--;
- return skb;
- }
- } else { /* Predicted or best effort flow */
- skb = skb_dequeue_best(q);
- if (skb) {
- unsigned peeked = this->peeked;
- this->peeked = 0;
-
- if (--this->q.qlen) {
- struct sk_buff *nskb;
- unsigned dequeued = L2R(this,skb->len);
-
- /* We got not the same thing that
- peeked earlier; adjust start number
- */
- if (peeked != dequeued && peeked)
- this->start += dequeued - peeked;
-
- nskb = skb_peek_best(q);
- peeked = L2R(this,nskb->len);
- this->start += peeked;
- this->peeked = peeked;
- csz_insert_start(&q->s, this);
- }
- sch->q.qlen--;
- return skb;
- }
- }
- }
-#ifdef CSZ_PLUS_TBF
- /* We are about to return no skb.
- Schedule watchdog timer, if it occurred because of shaping.
- */
- if (q->wd_expires) {
- unsigned long delay = PSCHED_US2JIFFIE(q->wd_expires);
- if (delay == 0)
- delay = 1;
- mod_timer(&q->wd_timer, jiffies + delay);
- sch->stats.overlimits++;
- }
-#endif
- return NULL;
-}
-
-static void
-csz_reset(struct Qdisc* sch)
-{
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
- int i;
-
- for (i=0; i<4; i++)
- skb_queue_purge(&q->other[i]);
-
- for (i=0; i<CSZ_GUARANTEED; i++) {
- struct csz_flow *this = q->flow + i;
- skb_queue_purge(&this->q);
- this->snext = this->sprev =
- this->fnext = this->fprev = (struct csz_head*)this;
- this->start = this->finish = 0;
- }
- q->s.snext = q->s.sprev = &q->s;
- q->f.fnext = q->f.fprev = &q->f;
- q->R_c = 0;
-#ifdef CSZ_PLUS_TBF
- PSCHED_GET_TIME(&q->t_tbf);
- q->tokens = q->depth;
- del_timer(&q->wd_timer);
-#endif
- sch->q.qlen = 0;
-}
-
-static void
-csz_destroy(struct Qdisc* sch)
-{
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
- struct tcf_proto *tp;
-
- while ((tp = q->filter_list) != NULL) {
- q->filter_list = tp->next;
- tcf_destroy(tp);
- }
-}
-
-static int csz_init(struct Qdisc *sch, struct rtattr *opt)
-{
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
- struct rtattr *tb[TCA_CSZ_PTAB];
- struct tc_csz_qopt *qopt;
- int i;
-
- rtattr_parse(tb, TCA_CSZ_PTAB, RTA_DATA(opt), RTA_PAYLOAD(opt));
- if (tb[TCA_CSZ_PARMS-1] == NULL ||
- RTA_PAYLOAD(tb[TCA_CSZ_PARMS-1]) < sizeof(*qopt))
- return -EINVAL;
- qopt = RTA_DATA(tb[TCA_CSZ_PARMS-1]);
-
- q->R_log = qopt->R_log;
- q->delta_log = qopt->delta_log;
- for (i=0; i<=TC_PRIO_MAX; i++) {
- if (qopt->priomap[i] >= CSZ_FLOWS)
- return -EINVAL;
- q->prio2band[i] = qopt->priomap[i];
- }
-
- for (i=0; i<4; i++)
- skb_queue_head_init(&q->other[i]);
-
- for (i=0; i<CSZ_GUARANTEED; i++) {
- struct csz_flow *this = q->flow + i;
- skb_queue_head_init(&this->q);
- this->snext = this->sprev =
- this->fnext = this->fprev = (struct csz_head*)this;
- this->start = this->finish = 0;
- }
- q->s.snext = q->s.sprev = &q->s;
- q->f.fnext = q->f.fprev = &q->f;
- q->R_c = 0;
-#ifdef CSZ_PLUS_TBF
- init_timer(&q->wd_timer);
- q->wd_timer.data = (unsigned long)sch;
- q->wd_timer.function = csz_watchdog;
-#endif
- return 0;
-}
-
-static int csz_dump(struct Qdisc *sch, struct sk_buff *skb)
-{
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
- unsigned char *b = skb->tail;
- struct rtattr *rta;
- struct tc_csz_qopt opt;
-
- rta = (struct rtattr*)b;
- RTA_PUT(skb, TCA_OPTIONS, 0, NULL);
-
- opt.flows = CSZ_FLOWS;
- memcpy(&opt.priomap, q->prio2band, TC_PRIO_MAX+1);
- RTA_PUT(skb, TCA_CSZ_PARMS, sizeof(opt), &opt);
- rta->rta_len = skb->tail - b;
-
- return skb->len;
-
-rtattr_failure:
- skb_trim(skb, b - skb->data);
- return -1;
-}
-
-static int csz_graft(struct Qdisc *sch, unsigned long cl, struct Qdisc *new,
- struct Qdisc **old)
-{
- return -EINVAL;
-}
-
-static struct Qdisc * csz_leaf(struct Qdisc *sch, unsigned long cl)
-{
- return NULL;
-}
-
-
-static unsigned long csz_get(struct Qdisc *sch, u32 classid)
-{
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
- unsigned long band = TC_H_MIN(classid) - 1;
-
- if (band >= CSZ_FLOWS)
- return 0;
-
- if (band < CSZ_GUARANTEED && q->flow[band].L_tab == NULL)
- return 0;
-
- return band+1;
-}
-
-static unsigned long csz_bind(struct Qdisc *sch, unsigned long parent, u32 classid)
-{
- return csz_get(sch, classid);
-}
-
-
-static void csz_put(struct Qdisc *sch, unsigned long cl)
-{
- return;
-}
-
-static int csz_change(struct Qdisc *sch, u32 handle, u32 parent, struct rtattr **tca, unsigned long *arg)
-{
- unsigned long cl = *arg;
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
- struct rtattr *opt = tca[TCA_OPTIONS-1];
- struct rtattr *tb[TCA_CSZ_PTAB];
- struct tc_csz_copt *copt;
-
- rtattr_parse(tb, TCA_CSZ_PTAB, RTA_DATA(opt), RTA_PAYLOAD(opt));
- if (tb[TCA_CSZ_PARMS-1] == NULL ||
- RTA_PAYLOAD(tb[TCA_CSZ_PARMS-1]) < sizeof(*copt))
- return -EINVAL;
- copt = RTA_DATA(tb[TCA_CSZ_PARMS-1]);
-
- if (tb[TCA_CSZ_RTAB-1] &&
- RTA_PAYLOAD(tb[TCA_CSZ_RTAB-1]) < 1024)
- return -EINVAL;
-
- if (cl) {
- struct csz_flow *a;
- cl--;
- if (cl >= CSZ_FLOWS)
- return -ENOENT;
- if (cl >= CSZ_GUARANTEED || q->flow[cl].L_tab == NULL)
- return -EINVAL;
-
- a = &q->flow[cl];
-
- spin_lock_bh(&sch->dev->queue_lock);
-#if 0
- a->rate_log = copt->rate_log;
-#endif
-#ifdef CSZ_PLUS_TBF
- a->limit = copt->limit;
- a->rate = copt->rate;
- a->buffer = copt->buffer;
- a->mtu = copt->mtu;
-#endif
-
- if (tb[TCA_CSZ_RTAB-1])
- memcpy(a->L_tab, RTA_DATA(tb[TCA_CSZ_RTAB-1]), 1024);
-
- spin_unlock_bh(&sch->dev->queue_lock);
- return 0;
- }
- /* NI */
- return 0;
-}
-
-static int csz_delete(struct Qdisc *sch, unsigned long cl)
-{
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
- struct csz_flow *a;
-
- cl--;
-
- if (cl >= CSZ_FLOWS)
- return -ENOENT;
- if (cl >= CSZ_GUARANTEED || q->flow[cl].L_tab == NULL)
- return -EINVAL;
-
- a = &q->flow[cl];
-
- spin_lock_bh(&sch->dev->queue_lock);
- a->fprev->fnext = a->fnext;
- a->fnext->fprev = a->fprev;
- a->sprev->snext = a->snext;
- a->snext->sprev = a->sprev;
- a->start = a->finish = 0;
- kfree(xchg(&q->flow[cl].L_tab, NULL));
- spin_unlock_bh(&sch->dev->queue_lock);
-
- return 0;
-}
-
-static int csz_dump_class(struct Qdisc *sch, unsigned long cl, struct sk_buff *skb, struct tcmsg *tcm)
-{
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
- unsigned char *b = skb->tail;
- struct rtattr *rta;
- struct tc_csz_copt opt;
-
- tcm->tcm_handle = sch->handle|cl;
-
- cl--;
-
- if (cl > CSZ_FLOWS)
- goto rtattr_failure;
-
- if (cl < CSZ_GUARANTEED) {
- struct csz_flow *f = &q->flow[cl];
-
- if (f->L_tab == NULL)
- goto rtattr_failure;
-
- rta = (struct rtattr*)b;
- RTA_PUT(skb, TCA_OPTIONS, 0, NULL);
-
- opt.limit = f->limit;
- opt.rate = f->rate;
- opt.slice = f->slice;
- memset(&opt.peakrate, 0, sizeof(opt.peakrate));
-#ifdef CSZ_PLUS_TBF
- opt.buffer = f->buffer;
- opt.mtu = f->mtu;
-#else
- opt.buffer = 0;
- opt.mtu = 0;
-#endif
-
- RTA_PUT(skb, TCA_CSZ_PARMS, sizeof(opt), &opt);
- rta->rta_len = skb->tail - b;
- }
-
- return skb->len;
-
-rtattr_failure:
- skb_trim(skb, b - skb->data);
- return -1;
-}
-
-static void csz_walk(struct Qdisc *sch, struct qdisc_walker *arg)
-{
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
- int prio = 0;
-
- if (arg->stop)
- return;
-
- for (prio = 0; prio < CSZ_FLOWS; prio++) {
- if (arg->count < arg->skip) {
- arg->count++;
- continue;
- }
- if (prio < CSZ_GUARANTEED && q->flow[prio].L_tab == NULL) {
- arg->count++;
- continue;
- }
- if (arg->fn(sch, prio+1, arg) < 0) {
- arg->stop = 1;
- break;
- }
- arg->count++;
- }
-}
-
-static struct tcf_proto ** csz_find_tcf(struct Qdisc *sch, unsigned long cl)
-{
- struct csz_sched_data *q = (struct csz_sched_data *)sch->data;
-
- if (cl)
- return NULL;
-
- return &q->filter_list;
-}
-
-struct Qdisc_class_ops csz_class_ops = {
- .graft = csz_graft,
- .leaf = csz_leaf,
- .get = csz_get,
- .put = csz_put,
- .change = csz_change,
- .delete = csz_delete,
- .walk = csz_walk,
- .tcf_chain = csz_find_tcf,
- .bind_tcf = csz_bind,
- .unbind_tcf = csz_put,
- .dump = csz_dump_class,
-};
-
-static struct Qdisc_ops csz_qdisc_ops = {
- .next = NULL,
- .cl_ops = &csz_class_ops,
- .id = "csz",
- .priv_size = sizeof(struct csz_sched_data),
- .enqueue = csz_enqueue,
- .dequeue = csz_dequeue,
- .requeue = NULL,
- .drop = NULL,
- .init = csz_init,
- .reset = csz_reset,
- .destroy = csz_destroy,
- .change = NULL,
- .dump = csz_dump,
- .owner = THIS_MODULE,
-};
-
-static int __init csz_module_init(void)
-{
- return register_qdisc(&csz_qdisc_ops);
-}
-static void __exit csz_module_exit(void)
-{
- unregister_qdisc(&csz_qdisc_ops);
-}
-module_init(csz_module_init)
-module_exit(csz_module_exit)
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * net/sched/sch_delay.c Simple constant delay
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Authors: Stephen Hemminger <shemminger@osdl.org>
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/socket.h>
-#include <linux/sockios.h>
-#include <linux/in.h>
-#include <linux/errno.h>
-#include <linux/interrupt.h>
-#include <linux/if_ether.h>
-#include <linux/inet.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/notifier.h>
-#include <net/ip.h>
-#include <net/route.h>
-#include <linux/skbuff.h>
-#include <net/sock.h>
-#include <net/pkt_sched.h>
-
-/* Network delay simulator
- This scheduler adds a fixed delay to all packets.
- Similar to NISTnet and BSD Dummynet.
-
- It uses byte fifo underneath similar to TBF */
-struct dly_sched_data {
- u32 latency;
- u32 limit;
- struct timer_list timer;
- struct Qdisc *qdisc;
-};
-
-/* Time stamp put into socket buffer control block */
-struct dly_skb_cb {
- psched_time_t queuetime;
-};
-
-/* Enqueue packets with underlying discipline (fifo)
- * but mark them with current time first.
- */
-static int dly_enqueue(struct sk_buff *skb, struct Qdisc *sch)
-{
- struct dly_sched_data *q = (struct dly_sched_data *)sch->data;
- struct dly_skb_cb *cb = (struct dly_skb_cb *)skb->cb;
- int ret;
-
- PSCHED_GET_TIME(cb->queuetime);
-
- /* Queue to underlying scheduler */
- ret = q->qdisc->enqueue(skb, q->qdisc);
- if (ret)
- sch->stats.drops++;
- else {
- sch->q.qlen++;
- sch->stats.bytes += skb->len;
- sch->stats.packets++;
- }
- return 0;
-}
-
-/* Requeue packets but don't change time stamp */
-static int dly_requeue(struct sk_buff *skb, struct Qdisc *sch)
-{
- struct dly_sched_data *q = (struct dly_sched_data *)sch->data;
- int ret;
-
- ret = q->qdisc->ops->requeue(skb, q->qdisc);
- if (ret == 0)
- sch->q.qlen++;
- return ret;
-}
-
-static unsigned int dly_drop(struct Qdisc *sch)
-{
- struct dly_sched_data *q = (struct dly_sched_data *)sch->data;
- unsigned int len;
-
- len = q->qdisc->ops->drop(q->qdisc);
- if (len) {
- sch->q.qlen--;
- sch->stats.drops++;
- }
- return len;
-}
-
-/* Dequeue packet.
- * If packet needs to be held up, then stop the
- * queue and set timer to wakeup later.
- */
-static struct sk_buff *dly_dequeue(struct Qdisc *sch)
-{
- struct dly_sched_data *q = (struct dly_sched_data *)sch->data;
- struct sk_buff *skb = q->qdisc->dequeue(q->qdisc);
-
- if (skb) {
- struct dly_skb_cb *cb = (struct dly_skb_cb *)skb->cb;
- psched_time_t now;
- long diff;
-
- PSCHED_GET_TIME(now);
- diff = q->latency - PSCHED_TDIFF(now, cb->queuetime);
-
- if (diff <= 0) {
- sch->q.qlen--;
- sch->flags &= ~TCQ_F_THROTTLED;
- return skb;
- }
-
- if (!netif_queue_stopped(sch->dev)) {
- long delay = PSCHED_US2JIFFIE(diff);
- if (delay <= 0)
- delay = 1;
- mod_timer(&q->timer, jiffies+delay);
- }
-
- if (q->qdisc->ops->requeue(skb, q->qdisc) != NET_XMIT_SUCCESS) {
- sch->q.qlen--;
- sch->stats.drops++;
- }
- sch->flags |= TCQ_F_THROTTLED;
- }
- return NULL;
-}
-
-static void dly_reset(struct Qdisc *sch)
-{
- struct dly_sched_data *q = (struct dly_sched_data *)sch->data;
-
- qdisc_reset(q->qdisc);
- sch->q.qlen = 0;
- sch->flags &= ~TCQ_F_THROTTLED;
- del_timer(&q->timer);
-}
-
-static void dly_timer(unsigned long arg)
-{
- struct Qdisc *sch = (struct Qdisc *)arg;
-
- sch->flags &= ~TCQ_F_THROTTLED;
- netif_schedule(sch->dev);
-}
-
-/* Tell Fifo the new limit. */
-static int change_limit(struct Qdisc *q, u32 limit)
-{
- struct rtattr *rta;
- int ret;
-
- rta = kmalloc(RTA_LENGTH(sizeof(struct tc_fifo_qopt)), GFP_KERNEL);
- if (!rta)
- return -ENOMEM;
-
- rta->rta_type = RTM_NEWQDISC;
- rta->rta_len = RTA_LENGTH(sizeof(struct tc_fifo_qopt));
- ((struct tc_fifo_qopt *)RTA_DATA(rta))->limit = limit;
- ret = q->ops->change(q, rta);
- kfree(rta);
-
- return ret;
-}
-
-/* Setup underlying FIFO discipline */
-static int dly_change(struct Qdisc *sch, struct rtattr *opt)
-{
- struct dly_sched_data *q = (struct dly_sched_data *)sch->data;
- struct tc_dly_qopt *qopt = RTA_DATA(opt);
- int err;
-
- if (q->qdisc == &noop_qdisc) {
- struct Qdisc *child
- = qdisc_create_dflt(sch->dev, &bfifo_qdisc_ops);
- if (!child)
- return -EINVAL;
- q->qdisc = child;
- }
-
- err = change_limit(q->qdisc, qopt->limit);
- if (err) {
- qdisc_destroy(q->qdisc);
- q->qdisc = &noop_qdisc;
- } else {
- q->latency = qopt->latency;
- q->limit = qopt->limit;
- }
- return err;
-}
-
-static int dly_init(struct Qdisc *sch, struct rtattr *opt)
-{
- struct dly_sched_data *q = (struct dly_sched_data *)sch->data;
-
- if (!opt)
- return -EINVAL;
-
- init_timer(&q->timer);
- q->timer.function = dly_timer;
- q->timer.data = (unsigned long) sch;
- q->qdisc = &noop_qdisc;
-
- return dly_change(sch, opt);
-}
-
-static void dly_destroy(struct Qdisc *sch)
-{
- struct dly_sched_data *q = (struct dly_sched_data *)sch->data;
-
- del_timer(&q->timer);
- qdisc_destroy(q->qdisc);
- q->qdisc = &noop_qdisc;
-}
-
-static int dly_dump(struct Qdisc *sch, struct sk_buff *skb)
-{
- struct dly_sched_data *q = (struct dly_sched_data *)sch->data;
- unsigned char *b = skb->tail;
- struct tc_dly_qopt qopt;
-
- qopt.latency = q->latency;
- qopt.limit = q->limit;
-
- RTA_PUT(skb, TCA_OPTIONS, sizeof(qopt), &qopt);
-
- return skb->len;
-
-rtattr_failure:
- skb_trim(skb, b - skb->data);
- return -1;
-}
-
-static struct Qdisc_ops dly_qdisc_ops = {
- .id = "delay",
- .priv_size = sizeof(struct dly_sched_data),
- .enqueue = dly_enqueue,
- .dequeue = dly_dequeue,
- .requeue = dly_requeue,
- .drop = dly_drop,
- .init = dly_init,
- .reset = dly_reset,
- .destroy = dly_destroy,
- .change = dly_change,
- .dump = dly_dump,
- .owner = THIS_MODULE,
-};
-
-
-static int __init dly_module_init(void)
-{
- return register_qdisc(&dly_qdisc_ops);
-}
-static void __exit dly_module_exit(void)
-{
- unregister_qdisc(&dly_qdisc_ops);
-}
-module_init(dly_module_init)
-module_exit(dly_module_exit)
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * linux/net/sunrpc/gss_union.c
- *
- * Adapted from MIT Kerberos 5-1.2.1 lib/gssapi/generic code
- *
- * Copyright (c) 2001 The Regents of the University of Michigan.
- * All rights reserved.
- *
- * Andy Adamson <andros@umich.edu>
- *
- */
-
-/*
- * Copyright 1993 by OpenVision Technologies, Inc.
- *
- * Permission to use, copy, modify, distribute, and sell this software
- * and its documentation for any purpose is hereby granted without fee,
- * provided that the above copyright notice appears in all copies and
- * that both that copyright notice and this permission notice appear in
- * supporting documentation, and that the name of OpenVision not be used
- * in advertising or publicity pertaining to distribution of the software
- * without specific, written prior permission. OpenVision makes no
- * representations about the suitability of this software for any
- * purpose. It is provided "as is" without express or implied warranty.
- *
- * OPENVISION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL OPENVISION BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
- * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
- * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/socket.h>
-#include <linux/sunrpc/gss_asn1.h>
-#include <linux/sunrpc/auth_gss.h>
-
-#ifdef RPC_DEBUG
-# define RPCDBG_FACILITY RPCDBG_AUTH
-#endif
-
-static LIST_HEAD(registered_triples);
-static spinlock_t registered_triples_lock = SPIN_LOCK_UNLOCKED;
-
-/* The following must be called with spinlock held: */
-static struct sup_sec_triple *
-do_lookup_triple_by_pseudoflavor(u32 pseudoflavor)
-{
- struct sup_sec_triple *pos, *triple = NULL;
-
- list_for_each_entry(pos, ®istered_triples, triples) {
- if (pos->pseudoflavor == pseudoflavor) {
- triple = pos;
- break;
- }
- }
- return triple;
-}
-
-/* XXX Need to think about reference counting of triples and of mechs.
- * Currently we do no reference counting of triples, and I think that's
- * probably OK given the reference counting on mechs, but there's probably
- * a better way to do all this. */
-
-int
-gss_register_triple(u32 pseudoflavor, struct gss_api_mech *mech,
- u32 qop, u32 service)
-{
- struct sup_sec_triple *triple;
-
- if (!(triple = kmalloc(sizeof(*triple), GFP_KERNEL))) {
- printk("Alloc failed in gss_register_triple");
- goto err;
- }
- triple->pseudoflavor = pseudoflavor;
- triple->mech = gss_mech_get_by_OID(&mech->gm_oid);
- triple->qop = qop;
- triple->service = service;
-
- spin_lock(®istered_triples_lock);
- if (do_lookup_triple_by_pseudoflavor(pseudoflavor)) {
- printk(KERN_WARNING "RPC: Registered pseudoflavor %d again\n",
- pseudoflavor);
- goto err_unlock;
- }
- list_add(&triple->triples, ®istered_triples);
- spin_unlock(®istered_triples_lock);
- dprintk("RPC: registered pseudoflavor %d\n", pseudoflavor);
-
- return 0;
-
-err_unlock:
- kfree(triple);
- spin_unlock(®istered_triples_lock);
-err:
- return -1;
-}
-
-int
-gss_unregister_triple(u32 pseudoflavor)
-{
- struct sup_sec_triple *triple;
-
- spin_lock(®istered_triples_lock);
- if (!(triple = do_lookup_triple_by_pseudoflavor(pseudoflavor))) {
- spin_unlock(®istered_triples_lock);
- printk("Can't unregister unregistered pseudoflavor %d\n",
- pseudoflavor);
- return -1;
- }
- list_del(&triple->triples);
- spin_unlock(®istered_triples_lock);
- gss_mech_put(triple->mech);
- kfree(triple);
- return 0;
-
-}
-
-void
-print_sec_triple(struct xdr_netobj *oid,u32 qop,u32 service)
-{
- dprintk("RPC: print_sec_triple:\n");
- dprintk(" oid_len %d\n oid :\n",oid->len);
- print_hexl((u32 *)oid->data,oid->len,0);
- dprintk(" qop %d\n",qop);
- dprintk(" service %d\n",service);
-}
-
-/* Function: gss_get_cmp_triples
- *
- * Description: search sec_triples for a matching security triple
- * return pseudoflavor if match, else 0
- * (Note that 0 is a valid pseudoflavor, but not for any gss pseudoflavor
- * (0 means auth_null), so this shouldn't cause confusion.)
- */
-u32
-gss_cmp_triples(u32 oid_len, char *oid_data, u32 qop, u32 service)
-{
- struct sup_sec_triple *triple;
- u32 pseudoflavor = 0;
- struct xdr_netobj oid;
-
- oid.len = oid_len;
- oid.data = oid_data;
-
- dprintk("RPC: gss_cmp_triples\n");
- print_sec_triple(&oid,qop,service);
-
- spin_lock(®istered_triples_lock);
- list_for_each_entry(triple, ®istered_triples, triples) {
- if((g_OID_equal(&oid, &triple->mech->gm_oid))
- && (qop == triple->qop)
- && (service == triple->service)) {
- pseudoflavor = triple->pseudoflavor;
- break;
- }
- }
- spin_unlock(®istered_triples_lock);
- dprintk("RPC: gss_cmp_triples return %d\n", pseudoflavor);
- return pseudoflavor;
-}
-
-u32
-gss_get_pseudoflavor(struct gss_ctx *ctx, u32 qop, u32 service)
-{
- return gss_cmp_triples(ctx->mech_type->gm_oid.len,
- ctx->mech_type->gm_oid.data,
- qop, service);
-}
-
-/* Returns nonzero iff the given pseudoflavor is in the supported list.
- * (Note that without incrementing a reference count or anything, this
- * doesn't give any guarantees.) */
-int
-gss_pseudoflavor_supported(u32 pseudoflavor)
-{
- struct sup_sec_triple *triple;
-
- spin_lock(®istered_triples_lock);
- triple = do_lookup_triple_by_pseudoflavor(pseudoflavor);
- spin_unlock(®istered_triples_lock);
- return (triple ? 1 : 0);
-}
-
-u32
-gss_pseudoflavor_to_service(u32 pseudoflavor)
-{
- struct sup_sec_triple *triple;
-
- spin_lock(®istered_triples_lock);
- triple = do_lookup_triple_by_pseudoflavor(pseudoflavor);
- spin_unlock(®istered_triples_lock);
- if (!triple) {
- dprintk("RPC: gss_pseudoflavor_to_service called with unsupported pseudoflavor %d\n",
- pseudoflavor);
- return 0;
- }
- return triple->service;
-}
-
-struct gss_api_mech *
-gss_pseudoflavor_to_mech(u32 pseudoflavor) {
- struct sup_sec_triple *triple;
- struct gss_api_mech *mech = NULL;
-
- spin_lock(®istered_triples_lock);
- triple = do_lookup_triple_by_pseudoflavor(pseudoflavor);
- spin_unlock(®istered_triples_lock);
- if (triple)
- mech = gss_mech_get(triple->mech);
- else
- dprintk("RPC: gss_pseudoflavor_to_mech called with unsupported pseudoflavor %d\n",
- pseudoflavor);
- return mech;
-}
-
-int
-gss_pseudoflavor_to_mechOID(u32 pseudoflavor, struct xdr_netobj * oid)
-{
- struct gss_api_mech *mech;
-
- mech = gss_pseudoflavor_to_mech(pseudoflavor);
- if (!mech) {
- dprintk("RPC: gss_pseudoflavor_to_mechOID called with unsupported pseudoflavor %d\n",
- pseudoflavor);
- return -1;
- }
- oid->len = mech->gm_oid.len;
- if (!(oid->data = kmalloc(oid->len, GFP_KERNEL)))
- return -1;
- memcpy(oid->data, mech->gm_oid.data, oid->len);
- gss_mech_put(mech);
- return 0;
-}
+++ /dev/null
-#include <linux/config.h>
-#include <linux/module.h>
-
-#include <linux/types.h>
-#include <linux/socket.h>
-#include <linux/sched.h>
-#include <linux/uio.h>
-#include <linux/unistd.h>
-
-#include <linux/sunrpc/auth_gss.h>
-#include <linux/sunrpc/svcauth_gss.h>
-#include <linux/sunrpc/gss_asn1.h>
-#include <linux/sunrpc/gss_krb5.h>
-
-/* svcauth_gss.c: */
-EXPORT_SYMBOL(svcauth_gss_register_pseudoflavor);
-
-/* registering gss mechanisms to the mech switching code: */
-EXPORT_SYMBOL(gss_mech_register);
-EXPORT_SYMBOL(gss_mech_unregister);
-EXPORT_SYMBOL(gss_mech_get);
-EXPORT_SYMBOL(gss_mech_get_by_pseudoflavor);
-EXPORT_SYMBOL(gss_mech_get_by_name);
-EXPORT_SYMBOL(gss_mech_put);
-EXPORT_SYMBOL(gss_pseudoflavor_to_service);
-EXPORT_SYMBOL(gss_service_to_auth_domain_name);
-
-/* generic functionality in gss code: */
-EXPORT_SYMBOL(g_make_token_header);
-EXPORT_SYMBOL(g_verify_token_header);
-EXPORT_SYMBOL(g_token_size);
-EXPORT_SYMBOL(make_checksum);
-EXPORT_SYMBOL(krb5_encrypt);
-EXPORT_SYMBOL(krb5_decrypt);
-
-/* debug */
-EXPORT_SYMBOL(print_hexl);
+++ /dev/null
-/*
- * linux/net/sunrpc/svcauth_des.c
- *
- * Server-side AUTH_DES handling.
- *
- * Copyright (C) 1996, 1997 Olaf Kirch <okir@monad.swb.de>
- */
-
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/sunrpc/types.h>
-#include <linux/sunrpc/xdr.h>
-#include <linux/sunrpc/svcauth.h>
-#include <linux/sunrpc/svcsock.h>
-
-#define RPCDBG_FACILITY RPCDBG_AUTH
-
-/*
- * DES cedential cache.
- * The cache is indexed by fullname/key to allow for multiple sessions
- * by the same user from different hosts.
- * It would be tempting to use the client's IP address rather than the
- * conversation key as an index, but that could become problematic for
- * multi-homed hosts that distribute traffic across their interfaces.
- */
-struct des_cred {
- struct des_cred * dc_next;
- char * dc_fullname;
- u32 dc_nickname;
- des_cblock dc_key; /* conversation key */
- des_cblock dc_xkey; /* encrypted conv. key */
- des_key_schedule dc_keysched;
-};
-
-#define ADN_FULLNAME 0
-#define ADN_NICKNAME 1
-
-/*
- * The default slack allowed when checking for replayed credentials
- * (in milliseconds).
- */
-#define DES_REPLAY_SLACK 2000
-
-/*
- * Make sure we don't place more than one call to the key server at
- * a time.
- */
-static int in_keycall;
-
-#define FAIL(err) \
- { if (data) put_cred(data); \
- *authp = rpc_autherr_##err; \
- return; \
- }
-
-void
-svcauth_des(struct svc_rqst *rqstp, u32 *statp, u32 *authp)
-{
- struct svc_buf *argp = &rqstp->rq_argbuf;
- struct svc_buf *resp = &rqstp->rq_resbuf;
- struct svc_cred *cred = &rqstp->rq_cred;
- struct des_cred *data = NULL;
- u32 cryptkey[2];
- u32 cryptbuf[4];
- u32 *p = argp->buf;
- int len = argp->len, slen, i;
-
- *authp = rpc_auth_ok;
-
- if ((argp->len -= 3) < 0) {
- *statp = rpc_garbage_args;
- return;
- }
-
- p++; /* skip length field */
- namekind = ntohl(*p++); /* fullname/nickname */
-
- /* Get the credentials */
- if (namekind == ADN_NICKNAME) {
- /* If we can't find the cached session key, initiate a
- * new session. */
- if (!(data = get_cred_bynick(*p++)))
- FAIL(rejectedcred);
- } else if (namekind == ADN_FULLNAME) {
- p = xdr_decode_string(p, &fullname, &len, RPC_MAXNETNAMELEN);
- if (p == NULL)
- FAIL(badcred);
- cryptkey[0] = *p++; /* get the encrypted key */
- cryptkey[1] = *p++;
- cryptbuf[2] = *p++; /* get the encrypted window */
- } else {
- FAIL(badcred);
- }
-
- /* If we're just updating the key, silently discard the request. */
- if (data && data->dc_locked) {
- *authp = rpc_autherr_dropit;
- _put_cred(data); /* release but don't unlock */
- return;
- }
-
- /* Get the verifier flavor and length */
- if (ntohl(*p++) != RPC_AUTH_DES && ntohl(*p++) != 12)
- FAIL(badverf);
-
- cryptbuf[0] = *p++; /* encrypted time stamp */
- cryptbuf[1] = *p++;
- cryptbuf[3] = *p++; /* 0 or window - 1 */
-
- if (namekind == ADN_NICKNAME) {
- status = des_ecb_encrypt((des_block *) cryptbuf,
- (des_block *) cryptbuf,
- data->dc_keysched, DES_DECRYPT);
- } else {
- /* We first have to decrypt the new session key and
- * fill in the UNIX creds. */
- if (!(data = get_cred_byname(rqstp, authp, fullname, cryptkey)))
- return;
- status = des_cbc_encrypt((des_cblock *) cryptbuf,
- (des_cblock *) cryptbuf, 16,
- data->dc_keysched,
- (des_cblock *) &ivec,
- DES_DECRYPT);
- }
- if (status) {
- printk("svcauth_des: DES decryption failed (status %d)\n",
- status);
- FAIL(badverf);
- }
-
- /* Now check the whole lot */
- if (namekind == ADN_FULLNAME) {
- unsigned long winverf;
-
- data->dc_window = ntohl(cryptbuf[2]);
- winverf = ntohl(cryptbuf[2]);
- if (window != winverf - 1) {
- printk("svcauth_des: bad window verifier!\n");
- FAIL(badverf);
- }
- }
-
- /* XDR the decrypted timestamp */
- cryptbuf[0] = ntohl(cryptbuf[0]);
- cryptbuf[1] = ntohl(cryptbuf[1]);
- if (cryptbuf[1] > 1000000) {
- dprintk("svcauth_des: bad usec value %u\n", cryptbuf[1]);
- if (namekind == ADN_NICKNAME)
- FAIL(rejectedverf);
- FAIL(badverf);
- }
-
- /*
- * Check for replayed credentials. We must allow for reordering
- * of requests by the network, and the OS scheduler, hence we
- * cannot expect timestamps to be increasing monotonically.
- * This opens a small security hole, therefore the replay_slack
- * value shouldn't be too large.
- */
- if ((delta = cryptbuf[0] - data->dc_timestamp[0]) <= 0) {
- switch (delta) {
- case -1:
- delta = -1000000;
- case 0:
- delta += cryptbuf[1] - data->dc_timestamp[1];
- break;
- default:
- delta = -1000000;
- }
- if (delta < DES_REPLAY_SLACK)
- FAIL(rejectedverf);
-#ifdef STRICT_REPLAY_CHECKS
- /* TODO: compare time stamp to last five timestamps cached
- * and reject (drop?) request if a match is found. */
-#endif
- }
-
- now = xtime;
- now.tv_secs -= data->dc_window;
- if (now.tv_secs < cryptbuf[0] ||
- (now.tv_secs == cryptbuf[0] && now.tv_usec < cryptbuf[1]))
- FAIL(rejectedverf);
-
- /* Okay, we're done. Update the lot */
- if (namekind == ADN_FULLNAME)
- data->dc_valid = 1;
- data->dc_timestamp[0] = cryptbuf[0];
- data->dc_timestamp[1] = cryptbuf[1];
-
- put_cred(data);
- return;
-garbage:
- *statp = rpc_garbage_args;
- return;
-}
-
-/*
- * Call the keyserver to obtain the decrypted conversation key and
- * UNIX creds. We use a Linux-specific keycall extension that does
- * both things in one go.
- */
-static struct des_cred *
-get_cred_byname(struct svc_rqst *rqstp, u32 *authp, char *fullname, u32 *cryptkey)
-{
- static int in_keycall;
- struct des_cred *cred;
-
- if (in_keycall) {
- *authp = rpc_autherr_dropit;
- return NULL;
- }
- in_keycall = 1;
- in_keycall = 0;
- return cred;
-}
+++ /dev/null
-#include <linux/module.h>
-#include <net/xfrm.h>
-
-EXPORT_SYMBOL(xfrm_user_policy);
-EXPORT_SYMBOL(km_waitq);
-EXPORT_SYMBOL(km_new_mapping);
-EXPORT_SYMBOL(xfrm_cfg_sem);
-EXPORT_SYMBOL(xfrm_policy_alloc);
-EXPORT_SYMBOL(__xfrm_policy_destroy);
-EXPORT_SYMBOL(xfrm_lookup);
-EXPORT_SYMBOL(__xfrm_policy_check);
-EXPORT_SYMBOL(__xfrm_route_forward);
-EXPORT_SYMBOL(xfrm_state_alloc);
-EXPORT_SYMBOL(__xfrm_state_destroy);
-EXPORT_SYMBOL(xfrm_state_insert);
-EXPORT_SYMBOL(xfrm_state_add);
-EXPORT_SYMBOL(xfrm_state_update);
-EXPORT_SYMBOL(xfrm_state_check_expire);
-EXPORT_SYMBOL(xfrm_state_check);
-EXPORT_SYMBOL(xfrm_state_lookup);
-EXPORT_SYMBOL(xfrm_state_register_afinfo);
-EXPORT_SYMBOL(xfrm_state_unregister_afinfo);
-EXPORT_SYMBOL(xfrm_state_delete_tunnel);
-EXPORT_SYMBOL(xfrm_replay_check);
-EXPORT_SYMBOL(xfrm_replay_advance);
-EXPORT_SYMBOL(__secpath_destroy);
-EXPORT_SYMBOL(secpath_dup);
-EXPORT_SYMBOL(xfrm_get_acqseq);
-EXPORT_SYMBOL(xfrm_parse_spi);
-EXPORT_SYMBOL(xfrm_register_type);
-EXPORT_SYMBOL(xfrm_unregister_type);
-EXPORT_SYMBOL(xfrm_get_type);
-EXPORT_SYMBOL(xfrm_register_km);
-EXPORT_SYMBOL(xfrm_unregister_km);
-EXPORT_SYMBOL(xfrm_state_delete);
-EXPORT_SYMBOL(xfrm_state_walk);
-EXPORT_SYMBOL(xfrm_find_acq_byseq);
-EXPORT_SYMBOL(xfrm_find_acq);
-EXPORT_SYMBOL(xfrm_alloc_spi);
-EXPORT_SYMBOL(xfrm_state_flush);
-EXPORT_SYMBOL(xfrm_policy_bysel);
-EXPORT_SYMBOL(xfrm_policy_insert);
-EXPORT_SYMBOL(xfrm_policy_walk);
-EXPORT_SYMBOL(xfrm_policy_flush);
-EXPORT_SYMBOL(xfrm_policy_byid);
-EXPORT_SYMBOL(xfrm_policy_list);
-EXPORT_SYMBOL(xfrm_dst_lookup);
-EXPORT_SYMBOL(xfrm_policy_register_afinfo);
-EXPORT_SYMBOL(xfrm_policy_unregister_afinfo);
-
-EXPORT_SYMBOL_GPL(xfrm_probe_algs);
-EXPORT_SYMBOL_GPL(xfrm_count_auth_supported);
-EXPORT_SYMBOL_GPL(xfrm_count_enc_supported);
-EXPORT_SYMBOL_GPL(xfrm_aalg_get_byidx);
-EXPORT_SYMBOL_GPL(xfrm_ealg_get_byidx);
-EXPORT_SYMBOL_GPL(xfrm_calg_get_byidx);
-EXPORT_SYMBOL_GPL(xfrm_aalg_get_byid);
-EXPORT_SYMBOL_GPL(xfrm_ealg_get_byid);
-EXPORT_SYMBOL_GPL(xfrm_calg_get_byid);
-EXPORT_SYMBOL_GPL(xfrm_aalg_get_byname);
-EXPORT_SYMBOL_GPL(xfrm_ealg_get_byname);
-EXPORT_SYMBOL_GPL(xfrm_calg_get_byname);
-EXPORT_SYMBOL_GPL(skb_icv_walk);
+++ /dev/null
-/*
- * generic xfrm output routines
- *
- * Copyright (c) 2003 James Morris <jmorris@intercode.com.au>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- */
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/skbuff.h>
-#include <net/xfrm.h>
-
-int xfrm_check_output(struct xfrm_state *x,
- struct sk_buff *skb, unsigned short family)
-{
- int err;
-
- err = xfrm_state_check_expire(x);
- if (err)
- goto out;
-
- if (x->props.mode) {
- switch (family) {
- case AF_INET:
- err = xfrm4_tunnel_check_size(skb);
- break;
-
- case AF_INET6:
- err = xfrm6_tunnel_check_size(skb);
- break;
-
- default:
- err = -EINVAL;
- }
-
- if (err)
- goto out;
- }
-
- err = xfrm_state_check_space(x, skb);
-out:
- return err;
-}
+++ /dev/null
-Menuconfig gives the Linux kernel configuration a long needed face
-lift. Featuring text based color menus and dialogs, it does not
-require X Windows (however, you need ncurses in order to use it).
-With this utility you can easily select a kernel option to modify
-without sifting through 100 other options.
-
-Overview
---------
-Some kernel features may be built directly into the kernel.
-Some may be made into loadable runtime modules. Some features
-may be completely removed altogether. There are also certain
-kernel parameters which are not really features, but must be
-entered in as decimal or hexadecimal numbers or possibly text.
-
-Menu items beginning with [*], <M> or [ ] represent features
-configured to be built in, modularized or removed respectively.
-Pointed brackets <> represent module capable features.
- more...
-
-To change any of these features, highlight it with the cursor
-keys and press <Y> to build it in, <M> to make it a module or
-<N> to removed it. You may also press the <Space Bar> to cycle
-through the available options (ie. Y->N->M->Y).
-
-Items beginning with numbers or other text within parenthesis can
-be changed by highlighting the item and pressing <Enter>. Then
-enter the new parameter into the dialog box that pops up.
-
-
-Some additional keyboard hints:
-
-Menus
-----------
-o Use the Up/Down arrow keys (cursor keys) to highlight the item
- you wish to change or submenu wish to select and press <Enter>.
- Submenus are designated by "--->".
-
- Shortcut: Press the option's highlighted letter (hotkey).
- Pressing a hotkey more than once will sequence
- through all visible items which use that hotkey.
-
- You may also use the <PAGE UP> and <PAGE DOWN> keys to scroll
- unseen options into view.
-
-o To exit a menu use the cursor keys to highlight the <Exit> button
- and press <ENTER>.
-
- Shortcut: Press <ESC><ESC> or <E> or <X> if there is no hotkey
- using those letters. You may press a single <ESC>, but
- there is a delayed response which you may find annoying.
-
- Also, the <TAB> and cursor keys will cycle between <Select>,
- <Exit> and <Help>
-
-o To get help with an item, use the cursor keys to highlight <Help>
- and Press <ENTER>.
-
- Shortcut: Press <H> or <?>.
-
-
-Radiolists (Choice lists)
------------
-o Use the cursor keys to select the option you wish to set and press
- <S> or the <SPACE BAR>.
-
- Shortcut: Press the first letter of the option you wish to set then
- press <S> or <SPACE BAR>.
-
-o To see available help for the item, use the cursor keys to highlight
- <Help> and Press <ENTER>.
-
- Shortcut: Press <H> or <?>.
-
- Also, the <TAB> and cursor keys will cycle between <Select> and
- <Help>
-
-
-Data Entry
------------
-o Enter the requested information and press <ENTER>
- If you are entering hexadecimal values, it is not necessary to
- add the '0x' prefix to the entry.
-
-o For help, use the <TAB> or cursor keys to highlight the help option
- and press <ENTER>. You can try <TAB><H> as well.
-
-
-Text Box (Help Window)
---------
-o Use the cursor keys to scroll up/down/left/right. The VI editor
- keys h,j,k,l function here as do <SPACE BAR> and <B> for those
- who are familiar with less and lynx.
-
-o Press <E>, <X>, <Enter> or <Esc><Esc> to exit.
-
-
-Final Acceptance
-----------------
-With the exception of the old style sound configuration,
-YOUR CHANGES ARE NOT FINAL. You will be given a last chance to
-confirm them prior to exiting Menuconfig.
-
-If Menuconfig quits with an error while saving your configuration,
-you may look in the file /usr/src/linux/.menuconfig.log for
-information which may help you determine the cause.
-
-Alternate Configuration Files
------------------------------
-Menuconfig supports the use of alternate configuration files for
-those who, for various reasons, find it necessary to switch
-between different kernel configurations.
-
-At the end of the main menu you will find two options. One is
-for saving the current configuration to a file of your choosing.
-The other option is for loading a previously saved alternate
-configuration.
-
-Even if you don't use alternate configuration files, but you
-find during a Menuconfig session that you have completely messed
-up your settings, you may use the "Load Alternate..." option to
-restore your previously saved settings from ".config" without
-restarting Menuconfig.
-
-Other information
------------------
-The windowing utility, lxdialog, will only be rebuilt if your kernel
-source tree is fresh, or changes are patched into it via a kernel
-patch or you do 'make mrproper'. If changes to lxdialog are patched
-in, most likely the rebuild time will be short. You may force a
-complete rebuild of lxdialog by changing to its directory and doing
-'make clean all'
-
-If you use Menuconfig in an XTERM window make sure you have your
-$TERM variable set to point to a xterm definition which supports color.
-Otherwise, Menuconfig will look rather bad. Menuconfig will not
-display correctly in a RXVT window because rxvt displays only one
-intensity of color, bright.
-
-Menuconfig will display larger menus on screens or xterms which are
-set to display more than the standard 25 row by 80 column geometry.
-In order for this to work, the "stty size" command must be able to
-display the screen's current row and column geometry. I STRONGLY
-RECOMMEND that you make sure you do NOT have the shell variables
-LINES and COLUMNS exported into your environment. Some distributions
-export those variables via /etc/profile. Some ncurses programs can
-become confused when those variables (LINES & COLUMNS) don't reflect
-the true screen size.
-
-
-NOTICE: lxdialog requires the ncurses libraries to compile. If you
- don't already have ncurses you really should get it.
-
- The makefile for lxdialog attempts to find your ncurses
- header file. Although it should find the header for older
- versions of ncurses, it is probably a good idea to get the
- latest ncurses anyway.
-
- If you have upgraded your ncurses libraries, MAKE SURE you
- remove the old ncurses header files. If you don't you
- will most certainly get a segmentation fault.
-
-WARNING: It is not recommended that you change any defines in
- lxdialog's header files. If you have a grayscale display and
- are brave, you may tinker with color.h to tune the colors to
- your preference.
-
-COMPATIBILITY ISSUE:
- There have been some compatibility problems reported with
- older versions of bash and sed. I am trying to work these
- out but it is preferable that you upgrade those utilities.
-
-
-******** IMPORTANT, OPTIONAL ALTERNATE PERSONALITY AVAILABLE ********
-******** ********
-If you prefer to have all of the kernel options listed in a single
-menu, rather than the default multimenu hierarchy, run the menuconfig
-with MENUCONFIG_MODE environment variable set to single_menu. Example:
-
-make menuconfig MENUCONFIG_MODE=single_menu
-
-<Enter> will then unroll the appropriate category, or enfold it if it
-is already unrolled.
-
-Note that this mode can eventually be a little more CPU expensive
-(especially with a larger number of unrolled categories) than the
-default mode.
-*********************************************************************
-
-
-Propaganda
-----------
-The windowing support utility (lxdialog) is a VERY modified version of
-the dialog utility by Savio Lam <lam836@cs.cuhk.hk>. Although lxdialog
-is significantly different from dialog, I have left Savio's copyrights
-intact. Please DO NOT contact Savio with questions about lxdialog.
-He will not be able to assist.
-
-William Roadcap was the original author of Menuconfig.
-Michael Elizabeth Chastain <mec@shout.net> is the current maintainer.
-
-<END OF FILE>
+++ /dev/null
-/* empty file to figure out endianness / word size */
+++ /dev/null
-/* Simple code to turn various tables in an ELF file into alias definitions.
- * This deals with kernel datastructures where they should be
- * dealt with: in the kernel source.
- *
- * Copyright 2002-2003 Rusty Russell, IBM Corporation
- * 2003 Kai Germaschewski
- *
- *
- * This software may be used and distributed according to the terms
- * of the GNU General Public License, incorporated herein by reference.
- */
-
-#include "modpost.h"
-
-/* We use the ELF typedefs, since we can't rely on stdint.h being present. */
-
-#if KERNEL_ELFCLASS == ELFCLASS32
-typedef Elf32_Addr kernel_ulong_t;
-#else
-typedef Elf64_Addr kernel_ulong_t;
-#endif
-
-typedef Elf32_Word __u32;
-typedef Elf32_Half __u16;
-typedef unsigned char __u8;
-
-/* Big exception to the "don't include kernel headers into userspace, which
- * even potentially has different endianness and word sizes, since
- * we handle those differences explicitly below */
-#include "../include/linux/mod_devicetable.h"
-
-#define ADD(str, sep, cond, field) \
-do { \
- strcat(str, sep); \
- if (cond) \
- sprintf(str + strlen(str), \
- sizeof(field) == 1 ? "%02X" : \
- sizeof(field) == 2 ? "%04X" : \
- sizeof(field) == 4 ? "%08X" : "", \
- field); \
- else \
- sprintf(str + strlen(str), "*"); \
-} while(0)
-
-/* Looks like "usb:vNpNdlNdhNdcNdscNdpNicNiscNipN" */
-static int do_usb_entry(const char *filename,
- struct usb_device_id *id, char *alias)
-{
- id->match_flags = TO_NATIVE(id->match_flags);
- id->idVendor = TO_NATIVE(id->idVendor);
- id->idProduct = TO_NATIVE(id->idProduct);
- id->bcdDevice_lo = TO_NATIVE(id->bcdDevice_lo);
- id->bcdDevice_hi = TO_NATIVE(id->bcdDevice_hi);
-
- /*
- * Some modules (visor) have empty slots as placeholder for
- * run-time specification that results in catch-all alias
- */
- if (!(id->idVendor | id->bDeviceClass | id->bInterfaceClass))
- return 1;
-
- strcpy(alias, "usb:");
- ADD(alias, "v", id->match_flags&USB_DEVICE_ID_MATCH_VENDOR,
- id->idVendor);
- ADD(alias, "p", id->match_flags&USB_DEVICE_ID_MATCH_PRODUCT,
- id->idProduct);
- ADD(alias, "dl", id->match_flags&USB_DEVICE_ID_MATCH_DEV_LO,
- id->bcdDevice_lo);
- ADD(alias, "dh", id->match_flags&USB_DEVICE_ID_MATCH_DEV_HI,
- id->bcdDevice_hi);
- ADD(alias, "dc", id->match_flags&USB_DEVICE_ID_MATCH_DEV_CLASS,
- id->bDeviceClass);
- ADD(alias, "dsc",
- id->match_flags&USB_DEVICE_ID_MATCH_DEV_SUBCLASS,
- id->bDeviceSubClass);
- ADD(alias, "dp",
- id->match_flags&USB_DEVICE_ID_MATCH_DEV_PROTOCOL,
- id->bDeviceProtocol);
- ADD(alias, "ic",
- id->match_flags&USB_DEVICE_ID_MATCH_INT_CLASS,
- id->bInterfaceClass);
- ADD(alias, "isc",
- id->match_flags&USB_DEVICE_ID_MATCH_INT_SUBCLASS,
- id->bInterfaceSubClass);
- ADD(alias, "ip",
- id->match_flags&USB_DEVICE_ID_MATCH_INT_PROTOCOL,
- id->bInterfaceProtocol);
- return 1;
-}
-
-/* Looks like: ieee1394:venNmoNspNverN */
-static int do_ieee1394_entry(const char *filename,
- struct ieee1394_device_id *id, char *alias)
-{
- id->match_flags = TO_NATIVE(id->match_flags);
- id->vendor_id = TO_NATIVE(id->vendor_id);
- id->model_id = TO_NATIVE(id->model_id);
- id->specifier_id = TO_NATIVE(id->specifier_id);
- id->version = TO_NATIVE(id->version);
-
- strcpy(alias, "ieee1394:");
- ADD(alias, "ven", id->match_flags & IEEE1394_MATCH_VENDOR_ID,
- id->vendor_id);
- ADD(alias, "mo", id->match_flags & IEEE1394_MATCH_MODEL_ID,
- id->model_id);
- ADD(alias, "sp", id->match_flags & IEEE1394_MATCH_SPECIFIER_ID,
- id->specifier_id);
- ADD(alias, "ver", id->match_flags & IEEE1394_MATCH_VERSION,
- id->version);
-
- return 1;
-}
-
-/* Looks like: pci:vNdNsvNsdNbcNscNiN. */
-static int do_pci_entry(const char *filename,
- struct pci_device_id *id, char *alias)
-{
- /* Class field can be divided into these three. */
- unsigned char baseclass, subclass, interface,
- baseclass_mask, subclass_mask, interface_mask;
-
- id->vendor = TO_NATIVE(id->vendor);
- id->device = TO_NATIVE(id->device);
- id->subvendor = TO_NATIVE(id->subvendor);
- id->subdevice = TO_NATIVE(id->subdevice);
- id->class = TO_NATIVE(id->class);
- id->class_mask = TO_NATIVE(id->class_mask);
-
- strcpy(alias, "pci:");
- ADD(alias, "v", id->vendor != PCI_ANY_ID, id->vendor);
- ADD(alias, "d", id->device != PCI_ANY_ID, id->device);
- ADD(alias, "sv", id->subvendor != PCI_ANY_ID, id->subvendor);
- ADD(alias, "sd", id->subdevice != PCI_ANY_ID, id->subdevice);
-
- baseclass = (id->class) >> 16;
- baseclass_mask = (id->class_mask) >> 16;
- subclass = (id->class) >> 8;
- subclass_mask = (id->class_mask) >> 8;
- interface = id->class;
- interface_mask = id->class_mask;
-
- if ((baseclass_mask != 0 && baseclass_mask != 0xFF)
- || (subclass_mask != 0 && subclass_mask != 0xFF)
- || (interface_mask != 0 && interface_mask != 0xFF)) {
- fprintf(stderr,
- "*** Warning: Can't handle masks in %s:%04X\n",
- filename, id->class_mask);
- return 0;
- }
-
- ADD(alias, "bc", baseclass_mask == 0xFF, baseclass);
- ADD(alias, "sc", subclass_mask == 0xFF, subclass);
- ADD(alias, "i", interface_mask == 0xFF, interface);
- return 1;
-}
-
-/* looks like: "ccw:tNmNdtNdmN" */
-static int do_ccw_entry(const char *filename,
- struct ccw_device_id *id, char *alias)
-{
- id->match_flags = TO_NATIVE(id->match_flags);
- id->cu_type = TO_NATIVE(id->cu_type);
- id->cu_model = TO_NATIVE(id->cu_model);
- id->dev_type = TO_NATIVE(id->dev_type);
- id->dev_model = TO_NATIVE(id->dev_model);
-
- strcpy(alias, "ccw:");
- ADD(alias, "t", id->match_flags&CCW_DEVICE_ID_MATCH_CU_TYPE,
- id->cu_type);
- ADD(alias, "m", id->match_flags&CCW_DEVICE_ID_MATCH_CU_MODEL,
- id->cu_model);
- ADD(alias, "dt", id->match_flags&CCW_DEVICE_ID_MATCH_DEVICE_TYPE,
- id->dev_type);
- ADD(alias, "dm", id->match_flags&CCW_DEVICE_ID_MATCH_DEVICE_TYPE,
- id->dev_model);
- return 1;
-}
-
-/* looks like: "pnp:dD" */
-static int do_pnp_entry(const char *filename,
- struct pnp_device_id *id, char *alias)
-{
- sprintf(alias, "pnp:d%s", id->id);
- return 1;
-}
-
-/* looks like: "pnp:cCdD..." */
-static int do_pnp_card_entry(const char *filename,
- struct pnp_card_device_id *id, char *alias)
-{
- int i;
-
- sprintf(alias, "pnp:c%s", id->id);
- for (i = 0; i < PNP_MAX_DEVICES; i++) {
- if (! *id->devs[i].id)
- break;
- sprintf(alias + strlen(alias), "d%s", id->devs[i].id);
- }
- return 1;
-}
-
-/* Ignore any prefix, eg. v850 prepends _ */
-static inline int sym_is(const char *symbol, const char *name)
-{
- const char *match;
-
- match = strstr(symbol, name);
- if (!match)
- return 0;
- return match[strlen(symbol)] == '\0';
-}
-
-static void do_table(void *symval, unsigned long size,
- unsigned long id_size,
- void *function,
- struct module *mod)
-{
- unsigned int i;
- char alias[500];
- int (*do_entry)(const char *, void *entry, char *alias) = function;
-
- if (size % id_size || size < id_size) {
- fprintf(stderr, "*** Warning: %s ids %lu bad size "
- "(each on %lu)\n", mod->name, size, id_size);
- }
- /* Leave last one: it's the terminator. */
- size -= id_size;
-
- for (i = 0; i < size; i += id_size) {
- if (do_entry(mod->name, symval+i, alias)) {
- /* Always end in a wildcard, for future extension */
- if (alias[strlen(alias)-1] != '*')
- strcat(alias, "*");
- buf_printf(&mod->dev_table_buf,
- "MODULE_ALIAS(\"%s\");\n", alias);
- }
- }
-}
-
-/* Create MODULE_ALIAS() statements.
- * At this time, we cannot write the actual output C source yet,
- * so we write into the mod->dev_table_buf buffer. */
-void handle_moddevtable(struct module *mod, struct elf_info *info,
- Elf_Sym *sym, const char *symname)
-{
- void *symval;
-
- /* We're looking for a section relative symbol */
- if (!sym->st_shndx || sym->st_shndx >= info->hdr->e_shnum)
- return;
-
- symval = (void *)info->hdr
- + info->sechdrs[sym->st_shndx].sh_offset
- + sym->st_value;
-
- if (sym_is(symname, "__mod_pci_device_table"))
- do_table(symval, sym->st_size, sizeof(struct pci_device_id),
- do_pci_entry, mod);
- else if (sym_is(symname, "__mod_usb_device_table"))
- do_table(symval, sym->st_size, sizeof(struct usb_device_id),
- do_usb_entry, mod);
- else if (sym_is(symname, "__mod_ieee1394_device_table"))
- do_table(symval, sym->st_size, sizeof(struct ieee1394_device_id),
- do_ieee1394_entry, mod);
- else if (sym_is(symname, "__mod_ccw_device_table"))
- do_table(symval, sym->st_size, sizeof(struct ccw_device_id),
- do_ccw_entry, mod);
- else if (sym_is(symname, "__mod_pnp_device_table"))
- do_table(symval, sym->st_size, sizeof(struct pnp_device_id),
- do_pnp_entry, mod);
- else if (sym_is(symname, "__mod_pnp_card_device_table"))
- do_table(symval, sym->st_size, sizeof(struct pnp_card_device_id),
- do_pnp_card_entry, mod);
-}
-
-/* Now add out buffered information to the generated C source */
-void add_moddevtable(struct buffer *buf, struct module *mod)
-{
- buf_printf(buf, "\n");
- buf_write(buf, mod->dev_table_buf.p, mod->dev_table_buf.pos);
- free(mod->dev_table_buf.p);
-}
+++ /dev/null
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <elf.h>
-
-int
-main(int argc, char **argv)
-{
- unsigned char ei[EI_NIDENT];
- union { short s; char c[2]; } endian_test;
-
- if (argc != 2) {
- fprintf(stderr, "Error: no arch\n");
- }
- if (fread(ei, 1, EI_NIDENT, stdin) != EI_NIDENT) {
- fprintf(stderr, "Error: input truncated\n");
- return 1;
- }
- if (memcmp(ei, ELFMAG, SELFMAG) != 0) {
- fprintf(stderr, "Error: not ELF\n");
- return 1;
- }
- switch (ei[EI_CLASS]) {
- case ELFCLASS32:
- printf("#define KERNEL_ELFCLASS ELFCLASS32\n");
- break;
- case ELFCLASS64:
- printf("#define KERNEL_ELFCLASS ELFCLASS64\n");
- break;
- default:
- abort();
- }
- switch (ei[EI_DATA]) {
- case ELFDATA2LSB:
- printf("#define KERNEL_ELFDATA ELFDATA2LSB\n");
- break;
- case ELFDATA2MSB:
- printf("#define KERNEL_ELFDATA ELFDATA2MSB\n");
- break;
- default:
- abort();
- }
-
- if (sizeof(unsigned long) == 4) {
- printf("#define HOST_ELFCLASS ELFCLASS32\n");
- } else if (sizeof(unsigned long) == 8) {
- printf("#define HOST_ELFCLASS ELFCLASS64\n");
- }
-
- endian_test.s = 0x0102;
- if (memcmp(endian_test.c, "\x01\x02", 2) == 0)
- printf("#define HOST_ELFDATA ELFDATA2MSB\n");
- else if (memcmp(endian_test.c, "\x02\x01", 2) == 0)
- printf("#define HOST_ELFDATA ELFDATA2LSB\n");
- else
- abort();
-
- if ((strcmp(argv[1], "v850") == 0) || (strcmp(argv[1], "h8300") == 0))
- printf("#define MODULE_SYMBOL_PREFIX \"_\"\n");
- else
- printf("#define MODULE_SYMBOL_PREFIX \"\"\n");
-
- return 0;
-}
-
+++ /dev/null
-#!/bin/sh
-#
-# Copyright (C) 2002 Khalid Aziz <khalid_aziz@hp.com>
-# Copyright (C) 2002 Randy Dunlap <rddunlap@osdl.org>
-# Copyright (C) 2002 Al Stone <ahs3@fc.hp.com>
-# Copyright (C) 2002 Hewlett-Packard Company
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-#
-#
-# Rules to generate ikconfig.h from linux/.config:
-# - Retain lines that begin with "CONFIG_"
-# - Retain lines that begin with "# CONFIG_"
-# - lines that use double-quotes must \\-escape-quote them
-
-if [ $# -lt 2 ]
-then
- echo "Usage: `basename $0` <configuration_file> <Makefile>"
- exit 1
-fi
-
-config=$1
-makefile=$2
-
-echo "#ifndef _IKCONFIG_H"
-echo "#define _IKCONFIG_H"
-echo \
-"/*
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for more
- * details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- *
- * This file is generated automatically by scripts/mkconfigs. Do not edit.
- *
- */"
-
-echo "static char const ikconfig_config[] __attribute__((unused)) = "
-echo "\"CONFIG_BEGIN=n\\n\\"
-echo "`cat $config | sed 's/\"/\\\\\"/g' | grep "^#\? \?CONFIG_" | awk '{ print $0 "\\\\n\\\\" }' `"
-echo "CONFIG_END=n\\n\";"
-echo "#endif /* _IKCONFIG_H */"
+++ /dev/null
-#!/bin/sh
-#
-# Output a simple RPM spec file that uses no fancy features requring
-# RPM v4. This is intended to work with any RPM distro.
-#
-# The only gothic bit here is redefining install_post to avoid
-# stripping the symbols from files in the kernel which we want
-#
-# Patched for non-x86 by Opencon (L) 2002 <opencon@rio.skydome.net>
-#
-# That's the voodoo to see if it's a x86.
-ISX86=`echo ${ARCH:=\`arch\`} | grep -ie i.86`
-if [ ! -z $ISX86 ]; then
- PC=1
-else
- PC=0
-fi
-# starting to output the spec
-if [ "`grep CONFIG_DRM=y .config | cut -f2 -d\=`" = "y" ]; then
- PROVIDES=kernel-drm
-fi
-
-PROVIDES="$PROVIDES kernel-$VERSION.$PATCHLEVEL.$SUBLEVEL$EXTRAVERSION"
-
-echo "Name: kernel"
-echo "Summary: The Linux Kernel"
-echo "Version: "$VERSION.$PATCHLEVEL.$SUBLEVEL$EXTRAVERSION | sed -e "s/-//g"
-# we need to determine the NEXT version number so that uname and
-# rpm -q will agree
-echo "Release: `. $srctree/scripts/mkversion`"
-echo "License: GPL"
-echo "Group: System Environment/Kernel"
-echo "Vendor: The Linux Community"
-echo "URL: http://www.kernel.org"
-echo -n "Source: kernel-$VERSION.$PATCHLEVEL.$SUBLEVEL"
-echo "$EXTRAVERSION.tar.gz" | sed -e "s/-//g"
-echo "BuildRoot: /var/tmp/%{name}-%{PACKAGE_VERSION}-root"
-echo "Provides: $PROVIDES"
-echo "%define __spec_install_post /usr/lib/rpm/brp-compress || :"
-echo "%define debug_package %{nil}"
-echo ""
-echo "%description"
-echo "The Linux Kernel, the operating system core itself"
-echo ""
-echo "%prep"
-echo "%setup -q"
-echo ""
-echo "%build"
-echo "make clean all"
-echo ""
-echo "%install"
-echo 'mkdir -p $RPM_BUILD_ROOT/boot $RPM_BUILD_ROOT/lib $RPM_BUILD_ROOT/lib/modules'
-echo 'INSTALL_MOD_PATH=$RPM_BUILD_ROOT make modules_install'
-# This is the first disagreement between i386 and most others
-if [ $PC = 1 ]; then
- echo 'cp arch/i386/boot/bzImage $RPM_BUILD_ROOT'"/boot/vmlinuz-$VERSION.$PATCHLEVEL.$SUBLEVEL$EXTRAVERSION"
-else
- echo 'cp vmlinux $RPM_BUILD_ROOT'"/boot/vmlinux-$VERSION.$PATCHLEVEL.$SUBLEVEL$EXTRAVERSION"
-fi
-# Back on track
-echo 'cp System.map $RPM_BUILD_ROOT'"/boot/System.map-$VERSION.$PATCHLEVEL.$SUBLEVEL$EXTRAVERSION"
-echo 'cp .config $RPM_BUILD_ROOT'"/boot/config-$VERSION.$PATCHLEVEL.$SUBLEVEL$EXTRAVERSION"
-echo ""
-echo "%clean"
-echo '#echo -rf $RPM_BUILD_ROOT'
-echo ""
-echo "%files"
-echo '%defattr (-, root, root)'
-echo "%dir /lib/modules"
-echo "/lib/modules/$VERSION.$PATCHLEVEL.$SUBLEVEL$EXTRAVERSION"
-echo "/boot/*"
-echo ""
+++ /dev/null
-/* Postprocess module symbol versions
- *
- * Copyright 2003 Kai Germaschewski
- * 2002-2003 Rusty Russell, IBM Corporation
- *
- * Based in part on module-init-tools/depmod.c,file2alias
- *
- * This software may be used and distributed according to the terms
- * of the GNU General Public License, incorporated herein by reference.
- *
- * Usage: modpost vmlinux module1.o module2.o ...
- */
-
-#include <ctype.h>
-#include "modpost.h"
-
-/* Are we using CONFIG_MODVERSIONS? */
-int modversions = 0;
-/* Warn about undefined symbols? (do so if we have vmlinux) */
-int have_vmlinux = 0;
-
-void
-fatal(const char *fmt, ...)
-{
- va_list arglist;
-
- fprintf(stderr, "FATAL: ");
-
- va_start(arglist, fmt);
- vfprintf(stderr, fmt, arglist);
- va_end(arglist);
-
- exit(1);
-}
-
-void
-warn(const char *fmt, ...)
-{
- va_list arglist;
-
- fprintf(stderr, "WARNING: ");
-
- va_start(arglist, fmt);
- vfprintf(stderr, fmt, arglist);
- va_end(arglist);
-}
-
-void *do_nofail(void *ptr, const char *file, int line, const char *expr)
-{
- if (!ptr) {
- fatal("Memory allocation failure %s line %d: %s.\n",
- file, line, expr);
- }
- return ptr;
-}
-
-/* A list of all modules we processed */
-
-static struct module *modules;
-
-struct module *
-find_module(char *modname)
-{
- struct module *mod;
-
- for (mod = modules; mod; mod = mod->next)
- if (strcmp(mod->name, modname) == 0)
- break;
- return mod;
-}
-
-struct module *
-new_module(char *modname)
-{
- struct module *mod;
- char *p, *s;
-
- mod = NOFAIL(malloc(sizeof(*mod)));
- memset(mod, 0, sizeof(*mod));
- p = NOFAIL(strdup(modname));
-
- /* strip trailing .o */
- if ((s = strrchr(p, '.')) != NULL)
- if (strcmp(s, ".o") == 0)
- *s = '\0';
-
- /* add to list */
- mod->name = p;
- mod->next = modules;
- modules = mod;
-
- return mod;
-}
-
-/* A hash of all exported symbols,
- * struct symbol is also used for lists of unresolved symbols */
-
-#define SYMBOL_HASH_SIZE 1024
-
-struct symbol {
- struct symbol *next;
- struct module *module;
- unsigned int crc;
- int crc_valid;
- char name[0];
-};
-
-static struct symbol *symbolhash[SYMBOL_HASH_SIZE];
-
-/* This is based on the hash agorithm from gdbm, via tdb */
-static inline unsigned int tdb_hash(const char *name)
-{
- unsigned value; /* Used to compute the hash value. */
- unsigned i; /* Used to cycle through random values. */
-
- /* Set the initial value from the key size. */
- for (value = 0x238F13AF * strlen(name), i=0; name[i]; i++)
- value = (value + (((unsigned char *)name)[i] << (i*5 % 24)));
-
- return (1103515243 * value + 12345);
-}
-
-/* Allocate a new symbols for use in the hash of exported symbols or
- * the list of unresolved symbols per module */
-
-struct symbol *
-alloc_symbol(const char *name, struct symbol *next)
-{
- struct symbol *s = NOFAIL(malloc(sizeof(*s) + strlen(name) + 1));
-
- memset(s, 0, sizeof(*s));
- strcpy(s->name, name);
- s->next = next;
- return s;
-}
-
-/* For the hash of exported symbols */
-
-void
-new_symbol(const char *name, struct module *module, unsigned int *crc)
-{
- unsigned int hash;
- struct symbol *new;
-
- hash = tdb_hash(name) % SYMBOL_HASH_SIZE;
- new = symbolhash[hash] = alloc_symbol(name, symbolhash[hash]);
- new->module = module;
- if (crc) {
- new->crc = *crc;
- new->crc_valid = 1;
- }
-}
-
-struct symbol *
-find_symbol(const char *name)
-{
- struct symbol *s;
-
- /* For our purposes, .foo matches foo. PPC64 needs this. */
- if (name[0] == '.')
- name++;
-
- for (s = symbolhash[tdb_hash(name) % SYMBOL_HASH_SIZE]; s; s=s->next) {
- if (strcmp(s->name, name) == 0)
- return s;
- }
- return NULL;
-}
-
-/* Add an exported symbol - it may have already been added without a
- * CRC, in this case just update the CRC */
-void
-add_exported_symbol(const char *name, struct module *module, unsigned int *crc)
-{
- struct symbol *s = find_symbol(name);
-
- if (!s) {
- new_symbol(name, module, crc);
- return;
- }
- if (crc) {
- s->crc = *crc;
- s->crc_valid = 1;
- }
-}
-
-void *
-grab_file(const char *filename, unsigned long *size)
-{
- struct stat st;
- void *map;
- int fd;
-
- fd = open(filename, O_RDONLY);
- if (fd < 0 || fstat(fd, &st) != 0)
- return NULL;
-
- *size = st.st_size;
- map = mmap(NULL, *size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0);
- close(fd);
-
- if (map == MAP_FAILED)
- return NULL;
- return map;
-}
-
-/*
- Return a copy of the next line in a mmap'ed file.
- spaces in the beginning of the line is trimmed away.
- Return a pointer to a static buffer.
-*/
-char*
-get_next_line(unsigned long *pos, void *file, unsigned long size)
-{
- static char line[4096];
- int skip = 1;
- size_t len = 0;
- char *p = (char *)file + *pos;
- char *s = line;
-
- for (; *pos < size ; (*pos)++)
- {
- if (skip && isspace(*p)) {
- p++;
- continue;
- }
- skip = 0;
- if (*p != '\n' && (*pos < size)) {
- len++;
- *s++ = *p++;
- if (len > 4095)
- break; /* Too long, stop */
- } else {
- /* End of string */
- *s = '\0';
- return line;
- }
- }
- /* End of buffer */
- return NULL;
-}
-
-void
-release_file(void *file, unsigned long size)
-{
- munmap(file, size);
-}
-
-void
-parse_elf(struct elf_info *info, const char *filename)
-{
- unsigned int i;
- Elf_Ehdr *hdr = info->hdr;
- Elf_Shdr *sechdrs;
- Elf_Sym *sym;
-
- hdr = grab_file(filename, &info->size);
- if (!hdr) {
- perror(filename);
- abort();
- }
- info->hdr = hdr;
- if (info->size < sizeof(*hdr))
- goto truncated;
-
- /* Fix endianness in ELF header */
- hdr->e_shoff = TO_NATIVE(hdr->e_shoff);
- hdr->e_shstrndx = TO_NATIVE(hdr->e_shstrndx);
- hdr->e_shnum = TO_NATIVE(hdr->e_shnum);
- hdr->e_machine = TO_NATIVE(hdr->e_machine);
- sechdrs = (void *)hdr + hdr->e_shoff;
- info->sechdrs = sechdrs;
-
- /* Fix endianness in section headers */
- for (i = 0; i < hdr->e_shnum; i++) {
- sechdrs[i].sh_type = TO_NATIVE(sechdrs[i].sh_type);
- sechdrs[i].sh_offset = TO_NATIVE(sechdrs[i].sh_offset);
- sechdrs[i].sh_size = TO_NATIVE(sechdrs[i].sh_size);
- sechdrs[i].sh_link = TO_NATIVE(sechdrs[i].sh_link);
- sechdrs[i].sh_name = TO_NATIVE(sechdrs[i].sh_name);
- }
- /* Find symbol table. */
- for (i = 1; i < hdr->e_shnum; i++) {
- const char *secstrings
- = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
-
- if (sechdrs[i].sh_offset > info->size)
- goto truncated;
- if (strcmp(secstrings+sechdrs[i].sh_name, ".modinfo") == 0) {
- info->modinfo = (void *)hdr + sechdrs[i].sh_offset;
- info->modinfo_len = sechdrs[i].sh_size;
- }
- if (sechdrs[i].sh_type != SHT_SYMTAB)
- continue;
-
- info->symtab_start = (void *)hdr + sechdrs[i].sh_offset;
- info->symtab_stop = (void *)hdr + sechdrs[i].sh_offset
- + sechdrs[i].sh_size;
- info->strtab = (void *)hdr +
- sechdrs[sechdrs[i].sh_link].sh_offset;
- }
- if (!info->symtab_start) {
- fprintf(stderr, "modpost: %s no symtab?\n", filename);
- abort();
- }
- /* Fix endianness in symbols */
- for (sym = info->symtab_start; sym < info->symtab_stop; sym++) {
- sym->st_shndx = TO_NATIVE(sym->st_shndx);
- sym->st_name = TO_NATIVE(sym->st_name);
- sym->st_value = TO_NATIVE(sym->st_value);
- sym->st_size = TO_NATIVE(sym->st_size);
- }
- return;
-
- truncated:
- fprintf(stderr, "modpost: %s is truncated.\n", filename);
- abort();
-}
-
-void
-parse_elf_finish(struct elf_info *info)
-{
- release_file(info->hdr, info->size);
-}
-
-#define CRC_PFX MODULE_SYMBOL_PREFIX "__crc_"
-#define KSYMTAB_PFX MODULE_SYMBOL_PREFIX "__ksymtab_"
-
-void
-handle_modversions(struct module *mod, struct elf_info *info,
- Elf_Sym *sym, const char *symname)
-{
- unsigned int crc;
-
- switch (sym->st_shndx) {
- case SHN_COMMON:
- fprintf(stderr, "*** Warning: \"%s\" [%s] is COMMON symbol\n",
- symname, mod->name);
- break;
- case SHN_ABS:
- /* CRC'd symbol */
- if (memcmp(symname, CRC_PFX, strlen(CRC_PFX)) == 0) {
- crc = (unsigned int) sym->st_value;
- add_exported_symbol(symname + strlen(CRC_PFX),
- mod, &crc);
- modversions = 1;
- }
- break;
- case SHN_UNDEF:
- /* undefined symbol */
- if (ELF_ST_BIND(sym->st_info) != STB_GLOBAL)
- break;
- /* ignore global offset table */
- if (strcmp(symname, "_GLOBAL_OFFSET_TABLE_") == 0)
- break;
- /* ignore __this_module, it will be resolved shortly */
- if (strcmp(symname, MODULE_SYMBOL_PREFIX "__this_module") == 0)
- break;
-#ifdef STT_REGISTER
- if (info->hdr->e_machine == EM_SPARC ||
- info->hdr->e_machine == EM_SPARCV9) {
- /* Ignore register directives. */
- if (ELF_ST_TYPE(sym->st_info) == STT_REGISTER)
- break;
- }
-#endif
-
- if (memcmp(symname, MODULE_SYMBOL_PREFIX,
- strlen(MODULE_SYMBOL_PREFIX)) == 0)
- mod->unres = alloc_symbol(symname +
- strlen(MODULE_SYMBOL_PREFIX),
- mod->unres);
- break;
- default:
- /* All exported symbols */
- if (memcmp(symname, KSYMTAB_PFX, strlen(KSYMTAB_PFX)) == 0) {
- add_exported_symbol(symname + strlen(KSYMTAB_PFX),
- mod, NULL);
- }
- break;
- }
-}
-
-int
-is_vmlinux(const char *modname)
-{
- const char *myname;
-
- if ((myname = strrchr(modname, '/')))
- myname++;
- else
- myname = modname;
-
- return strcmp(myname, "vmlinux") == 0;
-}
-
-void
-read_symbols(char *modname)
-{
- const char *symname;
- struct module *mod;
- struct elf_info info = { };
- Elf_Sym *sym;
-
- parse_elf(&info, modname);
-
- mod = new_module(modname);
-
- /* When there's no vmlinux, don't print warnings about
- * unresolved symbols (since there'll be too many ;) */
- if (is_vmlinux(modname)) {
- unsigned int fake_crc = 0;
- have_vmlinux = 1;
- /* May not have this if !CONFIG_MODULE_UNLOAD: fake it.
- If it appears, we'll get the real CRC. */
- add_exported_symbol("cleanup_module", mod, &fake_crc);
- add_exported_symbol("struct_module", mod, &fake_crc);
- mod->skip = 1;
- }
-
- for (sym = info.symtab_start; sym < info.symtab_stop; sym++) {
- symname = info.strtab + sym->st_name;
-
- handle_modversions(mod, &info, sym, symname);
- handle_moddevtable(mod, &info, sym, symname);
- }
- maybe_frob_version(modname, info.modinfo, info.modinfo_len,
- (void *)info.modinfo - (void *)info.hdr);
- parse_elf_finish(&info);
-
- /* Our trick to get versioning for struct_module - it's
- * never passed as an argument to an exported function, so
- * the automatic versioning doesn't pick it up, but it's really
- * important anyhow */
- if (modversions) {
- mod->unres = alloc_symbol("struct_module", mod->unres);
-
- /* Always version init_module and cleanup_module, in
- * case module doesn't have its own. */
- mod->unres = alloc_symbol("init_module", mod->unres);
- mod->unres = alloc_symbol("cleanup_module", mod->unres);
- }
-}
-
-#define SZ 500
-
-/* We first write the generated file into memory using the
- * following helper, then compare to the file on disk and
- * only update the later if anything changed */
-
-void __attribute__((format(printf, 2, 3)))
-buf_printf(struct buffer *buf, const char *fmt, ...)
-{
- char tmp[SZ];
- int len;
- va_list ap;
-
- va_start(ap, fmt);
- len = vsnprintf(tmp, SZ, fmt, ap);
- if (buf->size - buf->pos < len + 1) {
- buf->size += 128;
- buf->p = realloc(buf->p, buf->size);
- }
- strncpy(buf->p + buf->pos, tmp, len + 1);
- buf->pos += len;
- va_end(ap);
-}
-
-void
-buf_write(struct buffer *buf, const char *s, int len)
-{
- if (buf->size - buf->pos < len) {
- buf->size += len;
- buf->p = realloc(buf->p, buf->size);
- }
- strncpy(buf->p + buf->pos, s, len);
- buf->pos += len;
-}
-
-/* Header for the generated file */
-
-void
-add_header(struct buffer *b)
-{
- buf_printf(b, "#include <linux/module.h>\n");
- buf_printf(b, "#include <linux/vermagic.h>\n");
- buf_printf(b, "#include <linux/compiler.h>\n");
- buf_printf(b, "\n");
- buf_printf(b, "MODULE_INFO(vermagic, VERMAGIC_STRING);\n");
- buf_printf(b, "\n");
- buf_printf(b, "#undef unix\n"); /* We have a module called "unix" */
- buf_printf(b, "struct module __this_module\n");
- buf_printf(b, "__attribute__((section(\".gnu.linkonce.this_module\"))) = {\n");
- buf_printf(b, " .name = __stringify(KBUILD_MODNAME),\n");
- buf_printf(b, " .init = init_module,\n");
- buf_printf(b, "#ifdef CONFIG_MODULE_UNLOAD\n");
- buf_printf(b, " .exit = cleanup_module,\n");
- buf_printf(b, "#endif\n");
- buf_printf(b, "};\n");
-}
-
-/* Record CRCs for unresolved symbols */
-
-void
-add_versions(struct buffer *b, struct module *mod)
-{
- struct symbol *s, *exp;
-
- for (s = mod->unres; s; s = s->next) {
- exp = find_symbol(s->name);
- if (!exp || exp->module == mod) {
- if (have_vmlinux)
- fprintf(stderr, "*** Warning: \"%s\" [%s.ko] "
- "undefined!\n", s->name, mod->name);
- continue;
- }
- s->module = exp->module;
- s->crc_valid = exp->crc_valid;
- s->crc = exp->crc;
- }
-
- if (!modversions)
- return;
-
- buf_printf(b, "\n");
- buf_printf(b, "static const struct modversion_info ____versions[]\n");
- buf_printf(b, "__attribute_used__\n");
- buf_printf(b, "__attribute__((section(\"__versions\"))) = {\n");
-
- for (s = mod->unres; s; s = s->next) {
- if (!s->module) {
- continue;
- }
- if (!s->crc_valid) {
- fprintf(stderr, "*** Warning: \"%s\" [%s.ko] "
- "has no CRC!\n",
- s->name, mod->name);
- continue;
- }
- buf_printf(b, "\t{ %#8x, \"%s\" },\n", s->crc, s->name);
- }
-
- buf_printf(b, "};\n");
-}
-
-void
-add_depends(struct buffer *b, struct module *mod, struct module *modules)
-{
- struct symbol *s;
- struct module *m;
- int first = 1;
-
- for (m = modules; m; m = m->next) {
- m->seen = is_vmlinux(m->name);
- }
-
- buf_printf(b, "\n");
- buf_printf(b, "static const char __module_depends[]\n");
- buf_printf(b, "__attribute_used__\n");
- buf_printf(b, "__attribute__((section(\".modinfo\"))) =\n");
- buf_printf(b, "\"depends=");
- for (s = mod->unres; s; s = s->next) {
- if (!s->module)
- continue;
-
- if (s->module->seen)
- continue;
-
- s->module->seen = 1;
- buf_printf(b, "%s%s", first ? "" : ",",
- strrchr(s->module->name, '/') + 1);
- first = 0;
- }
- buf_printf(b, "\";\n");
-}
-
-void
-write_if_changed(struct buffer *b, const char *fname)
-{
- char *tmp;
- FILE *file;
- struct stat st;
-
- file = fopen(fname, "r");
- if (!file)
- goto write;
-
- if (fstat(fileno(file), &st) < 0)
- goto close_write;
-
- if (st.st_size != b->pos)
- goto close_write;
-
- tmp = NOFAIL(malloc(b->pos));
- if (fread(tmp, 1, b->pos, file) != b->pos)
- goto free_write;
-
- if (memcmp(tmp, b->p, b->pos) != 0)
- goto free_write;
-
- free(tmp);
- fclose(file);
- return;
-
- free_write:
- free(tmp);
- close_write:
- fclose(file);
- write:
- file = fopen(fname, "w");
- if (!file) {
- perror(fname);
- exit(1);
- }
- if (fwrite(b->p, 1, b->pos, file) != b->pos) {
- perror(fname);
- exit(1);
- }
- fclose(file);
-}
-
-void
-read_dump(const char *fname)
-{
- unsigned long size, pos = 0;
- void *file = grab_file(fname, &size);
- char *line;
-
- if (!file)
- /* No symbol versions, silently ignore */
- return;
-
- while ((line = get_next_line(&pos, file, size))) {
- char *symname, *modname, *d;
- unsigned int crc;
- struct module *mod;
-
- if (!(symname = strchr(line, '\t')))
- goto fail;
- *symname++ = '\0';
- if (!(modname = strchr(symname, '\t')))
- goto fail;
- *modname++ = '\0';
- if (strchr(modname, '\t'))
- goto fail;
- crc = strtoul(line, &d, 16);
- if (*symname == '\0' || *modname == '\0' || *d != '\0')
- goto fail;
-
- if (!(mod = find_module(modname))) {
- if (is_vmlinux(modname)) {
- modversions = 1;
- have_vmlinux = 1;
- }
- mod = new_module(NOFAIL(strdup(modname)));
- mod->skip = 1;
- }
- add_exported_symbol(symname, mod, &crc);
- }
- return;
-fail:
- fatal("parse error in symbol dump file\n");
-}
-
-void
-write_dump(const char *fname)
-{
- struct buffer buf = { };
- struct symbol *symbol;
- int n;
-
- for (n = 0; n < SYMBOL_HASH_SIZE ; n++) {
- symbol = symbolhash[n];
- while (symbol) {
- symbol = symbol->next;
- }
- }
-
- for (n = 0; n < SYMBOL_HASH_SIZE ; n++) {
- symbol = symbolhash[n];
- while (symbol) {
- buf_printf(&buf, "0x%08x\t%s\t%s\n", symbol->crc,
- symbol->name, symbol->module->name);
- symbol = symbol->next;
- }
- }
- write_if_changed(&buf, fname);
-}
-
-int
-main(int argc, char **argv)
-{
- struct module *mod;
- struct buffer buf = { };
- char fname[SZ];
- char *dump_read = NULL, *dump_write = NULL;
- int opt;
-
- while ((opt = getopt(argc, argv, "i:o:")) != -1) {
- switch(opt) {
- case 'i':
- dump_read = optarg;
- break;
- case 'o':
- dump_write = optarg;
- break;
- default:
- exit(1);
- }
- }
-
- if (dump_read)
- read_dump(dump_read);
-
- while (optind < argc) {
- read_symbols(argv[optind++]);
- }
-
- for (mod = modules; mod; mod = mod->next) {
- if (mod->skip)
- continue;
-
- buf.pos = 0;
-
- add_header(&buf);
- add_versions(&buf, mod);
- add_depends(&buf, mod, modules);
- add_moddevtable(&buf, mod);
-
- sprintf(fname, "%s.mod.c", mod->name);
- write_if_changed(&buf, fname);
- }
-
- if (dump_write)
- write_dump(dump_write);
-
- return 0;
-}
-
+++ /dev/null
-#include <stdio.h>
-#include <stdlib.h>
-#include <stdarg.h>
-#include <string.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <sys/mman.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include <elf.h>
-
-#include "elfconfig.h"
-
-#if KERNEL_ELFCLASS == ELFCLASS32
-
-#define Elf_Ehdr Elf32_Ehdr
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define ELF_ST_BIND ELF32_ST_BIND
-#define ELF_ST_TYPE ELF32_ST_TYPE
-
-#else
-
-#define Elf_Ehdr Elf64_Ehdr
-#define Elf_Shdr Elf64_Shdr
-#define Elf_Sym Elf64_Sym
-#define ELF_ST_BIND ELF64_ST_BIND
-#define ELF_ST_TYPE ELF64_ST_TYPE
-
-#endif
-
-#if KERNEL_ELFDATA != HOST_ELFDATA
-
-static inline void __endian(const void *src, void *dest, unsigned int size)
-{
- unsigned int i;
- for (i = 0; i < size; i++)
- ((unsigned char*)dest)[i] = ((unsigned char*)src)[size - i-1];
-}
-
-
-
-#define TO_NATIVE(x) \
-({ \
- typeof(x) __x; \
- __endian(&(x), &(__x), sizeof(__x)); \
- __x; \
-})
-
-#else /* endianness matches */
-
-#define TO_NATIVE(x) (x)
-
-#endif
-
-#define NOFAIL(ptr) do_nofail((ptr), __FILE__, __LINE__, #ptr)
-void *do_nofail(void *ptr, const char *file, int line, const char *expr);
-
-struct buffer {
- char *p;
- int pos;
- int size;
-};
-
-void __attribute__((format(printf, 2, 3)))
-buf_printf(struct buffer *buf, const char *fmt, ...);
-
-void
-buf_write(struct buffer *buf, const char *s, int len);
-
-struct module {
- struct module *next;
- const char *name;
- struct symbol *unres;
- int seen;
- int skip;
- struct buffer dev_table_buf;
-};
-
-struct elf_info {
- unsigned long size;
- Elf_Ehdr *hdr;
- Elf_Shdr *sechdrs;
- Elf_Sym *symtab_start;
- Elf_Sym *symtab_stop;
- const char *strtab;
- char *modinfo;
- unsigned int modinfo_len;
-};
-
-void handle_moddevtable(struct module *mod, struct elf_info *info,
- Elf_Sym *sym, const char *symname);
-
-void add_moddevtable(struct buffer *buf, struct module *mod);
-
-void maybe_frob_version(const char *modfilename,
- void *modinfo,
- unsigned long modinfo_len,
- unsigned long modinfo_offset);
-
-void *grab_file(const char *filename, unsigned long *size);
-char* get_next_line(unsigned long *pos, void *file, unsigned long size);
-void release_file(void *file, unsigned long size);
+++ /dev/null
-#include <netinet/in.h>
-#include <stdint.h>
-#include <ctype.h>
-#include <errno.h>
-#include <string.h>
-#include "modpost.h"
-
-/* Parse tag=value strings from .modinfo section */
-static char *next_string(char *string, unsigned long *secsize)
-{
- /* Skip non-zero chars */
- while (string[0]) {
- string++;
- if ((*secsize)-- <= 1)
- return NULL;
- }
-
- /* Skip any zero padding. */
- while (!string[0]) {
- string++;
- if ((*secsize)-- <= 1)
- return NULL;
- }
- return string;
-}
-
-static char *get_modinfo(void *modinfo, unsigned long modinfo_len,
- const char *tag)
-{
- char *p;
- unsigned int taglen = strlen(tag);
- unsigned long size = modinfo_len;
-
- for (p = modinfo; p; p = next_string(p, &size)) {
- if (strncmp(p, tag, taglen) == 0 && p[taglen] == '=')
- return p + taglen + 1;
- }
- return NULL;
-}
-
-/*
- * Stolen form Cryptographic API.
- *
- * MD4 Message Digest Algorithm (RFC1320).
- *
- * Implementation derived from Andrew Tridgell and Steve French's
- * CIFS MD4 implementation, and the cryptoapi implementation
- * originally based on the public domain implementation written
- * by Colin Plumb in 1993.
- *
- * Copyright (c) Andrew Tridgell 1997-1998.
- * Modified by Steve French (sfrench@us.ibm.com) 2002
- * Copyright (c) Cryptoapi developers.
- * Copyright (c) 2002 David S. Miller (davem@redhat.com)
- * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-#define MD4_DIGEST_SIZE 16
-#define MD4_HMAC_BLOCK_SIZE 64
-#define MD4_BLOCK_WORDS 16
-#define MD4_HASH_WORDS 4
-
-struct md4_ctx {
- uint32_t hash[MD4_HASH_WORDS];
- uint32_t block[MD4_BLOCK_WORDS];
- uint64_t byte_count;
-};
-
-static inline uint32_t lshift(uint32_t x, unsigned int s)
-{
- x &= 0xFFFFFFFF;
- return ((x << s) & 0xFFFFFFFF) | (x >> (32 - s));
-}
-
-static inline uint32_t F(uint32_t x, uint32_t y, uint32_t z)
-{
- return (x & y) | ((~x) & z);
-}
-
-static inline uint32_t G(uint32_t x, uint32_t y, uint32_t z)
-{
- return (x & y) | (x & z) | (y & z);
-}
-
-static inline uint32_t H(uint32_t x, uint32_t y, uint32_t z)
-{
- return x ^ y ^ z;
-}
-
-#define ROUND1(a,b,c,d,k,s) (a = lshift(a + F(b,c,d) + k, s))
-#define ROUND2(a,b,c,d,k,s) (a = lshift(a + G(b,c,d) + k + (uint32_t)0x5A827999,s))
-#define ROUND3(a,b,c,d,k,s) (a = lshift(a + H(b,c,d) + k + (uint32_t)0x6ED9EBA1,s))
-
-/* XXX: this stuff can be optimized */
-static inline void le32_to_cpu_array(uint32_t *buf, unsigned int words)
-{
- while (words--) {
- *buf = ntohl(*buf);
- buf++;
- }
-}
-
-static inline void cpu_to_le32_array(uint32_t *buf, unsigned int words)
-{
- while (words--) {
- *buf = htonl(*buf);
- buf++;
- }
-}
-
-static void md4_transform(uint32_t *hash, uint32_t const *in)
-{
- uint32_t a, b, c, d;
-
- a = hash[0];
- b = hash[1];
- c = hash[2];
- d = hash[3];
-
- ROUND1(a, b, c, d, in[0], 3);
- ROUND1(d, a, b, c, in[1], 7);
- ROUND1(c, d, a, b, in[2], 11);
- ROUND1(b, c, d, a, in[3], 19);
- ROUND1(a, b, c, d, in[4], 3);
- ROUND1(d, a, b, c, in[5], 7);
- ROUND1(c, d, a, b, in[6], 11);
- ROUND1(b, c, d, a, in[7], 19);
- ROUND1(a, b, c, d, in[8], 3);
- ROUND1(d, a, b, c, in[9], 7);
- ROUND1(c, d, a, b, in[10], 11);
- ROUND1(b, c, d, a, in[11], 19);
- ROUND1(a, b, c, d, in[12], 3);
- ROUND1(d, a, b, c, in[13], 7);
- ROUND1(c, d, a, b, in[14], 11);
- ROUND1(b, c, d, a, in[15], 19);
-
- ROUND2(a, b, c, d,in[ 0], 3);
- ROUND2(d, a, b, c, in[4], 5);
- ROUND2(c, d, a, b, in[8], 9);
- ROUND2(b, c, d, a, in[12], 13);
- ROUND2(a, b, c, d, in[1], 3);
- ROUND2(d, a, b, c, in[5], 5);
- ROUND2(c, d, a, b, in[9], 9);
- ROUND2(b, c, d, a, in[13], 13);
- ROUND2(a, b, c, d, in[2], 3);
- ROUND2(d, a, b, c, in[6], 5);
- ROUND2(c, d, a, b, in[10], 9);
- ROUND2(b, c, d, a, in[14], 13);
- ROUND2(a, b, c, d, in[3], 3);
- ROUND2(d, a, b, c, in[7], 5);
- ROUND2(c, d, a, b, in[11], 9);
- ROUND2(b, c, d, a, in[15], 13);
-
- ROUND3(a, b, c, d,in[ 0], 3);
- ROUND3(d, a, b, c, in[8], 9);
- ROUND3(c, d, a, b, in[4], 11);
- ROUND3(b, c, d, a, in[12], 15);
- ROUND3(a, b, c, d, in[2], 3);
- ROUND3(d, a, b, c, in[10], 9);
- ROUND3(c, d, a, b, in[6], 11);
- ROUND3(b, c, d, a, in[14], 15);
- ROUND3(a, b, c, d, in[1], 3);
- ROUND3(d, a, b, c, in[9], 9);
- ROUND3(c, d, a, b, in[5], 11);
- ROUND3(b, c, d, a, in[13], 15);
- ROUND3(a, b, c, d, in[3], 3);
- ROUND3(d, a, b, c, in[11], 9);
- ROUND3(c, d, a, b, in[7], 11);
- ROUND3(b, c, d, a, in[15], 15);
-
- hash[0] += a;
- hash[1] += b;
- hash[2] += c;
- hash[3] += d;
-}
-
-static inline void md4_transform_helper(struct md4_ctx *ctx)
-{
- le32_to_cpu_array(ctx->block, sizeof(ctx->block) / sizeof(uint32_t));
- md4_transform(ctx->hash, ctx->block);
-}
-
-static void md4_init(struct md4_ctx *mctx)
-{
- mctx->hash[0] = 0x67452301;
- mctx->hash[1] = 0xefcdab89;
- mctx->hash[2] = 0x98badcfe;
- mctx->hash[3] = 0x10325476;
- mctx->byte_count = 0;
-}
-
-static void md4_update(struct md4_ctx *mctx,
- const unsigned char *data, unsigned int len)
-{
- const uint32_t avail = sizeof(mctx->block) - (mctx->byte_count & 0x3f);
-
- mctx->byte_count += len;
-
- if (avail > len) {
- memcpy((char *)mctx->block + (sizeof(mctx->block) - avail),
- data, len);
- return;
- }
-
- memcpy((char *)mctx->block + (sizeof(mctx->block) - avail),
- data, avail);
-
- md4_transform_helper(mctx);
- data += avail;
- len -= avail;
-
- while (len >= sizeof(mctx->block)) {
- memcpy(mctx->block, data, sizeof(mctx->block));
- md4_transform_helper(mctx);
- data += sizeof(mctx->block);
- len -= sizeof(mctx->block);
- }
-
- memcpy(mctx->block, data, len);
-}
-
-static void md4_final_ascii(struct md4_ctx *mctx, char *out, unsigned int len)
-{
- const unsigned int offset = mctx->byte_count & 0x3f;
- char *p = (char *)mctx->block + offset;
- int padding = 56 - (offset + 1);
-
- *p++ = 0x80;
- if (padding < 0) {
- memset(p, 0x00, padding + sizeof (uint64_t));
- md4_transform_helper(mctx);
- p = (char *)mctx->block;
- padding = 56;
- }
-
- memset(p, 0, padding);
- mctx->block[14] = mctx->byte_count << 3;
- mctx->block[15] = mctx->byte_count >> 29;
- le32_to_cpu_array(mctx->block, (sizeof(mctx->block) -
- sizeof(uint64_t)) / sizeof(uint32_t));
- md4_transform(mctx->hash, mctx->block);
- cpu_to_le32_array(mctx->hash, sizeof(mctx->hash) / sizeof(uint32_t));
-
- snprintf(out, len, "%08X%08X%08X%08X",
- mctx->hash[0], mctx->hash[1], mctx->hash[2], mctx->hash[3]);
-}
-
-static inline void add_char(unsigned char c, struct md4_ctx *md)
-{
- md4_update(md, &c, 1);
-}
-
-static int parse_string(const char *file, unsigned long len,
- struct md4_ctx *md)
-{
- unsigned long i;
-
- add_char(file[0], md);
- for (i = 1; i < len; i++) {
- add_char(file[i], md);
- if (file[i] == '"' && file[i-1] != '\\')
- break;
- }
- return i;
-}
-
-static int parse_comment(const char *file, unsigned long len)
-{
- unsigned long i;
-
- for (i = 2; i < len; i++) {
- if (file[i-1] == '*' && file[i] == '/')
- break;
- }
- return i;
-}
-
-/* FIXME: Handle .s files differently (eg. # starts comments) --RR */
-static int parse_file(const char *fname, struct md4_ctx *md)
-{
- char *file;
- unsigned long i, len;
-
- file = grab_file(fname, &len);
- if (!file)
- return 0;
-
- for (i = 0; i < len; i++) {
- /* Collapse and ignore \ and CR. */
- if (file[i] == '\\' && (i+1 < len) && file[i+1] == '\n') {
- i++;
- continue;
- }
-
- /* Ignore whitespace */
- if (isspace(file[i]))
- continue;
-
- /* Handle strings as whole units */
- if (file[i] == '"') {
- i += parse_string(file+i, len - i, md);
- continue;
- }
-
- /* Comments: ignore */
- if (file[i] == '/' && file[i+1] == '*') {
- i += parse_comment(file+i, len - i);
- continue;
- }
-
- add_char(file[i], md);
- }
- release_file(file, len);
- return 1;
-}
-
-/* We have dir/file.o. Open dir/.file.o.cmd, look for deps_ line to
- * figure out source file. */
-static int parse_source_files(const char *objfile, struct md4_ctx *md)
-{
- char *cmd, *file, *line, *dir;
- const char *base;
- unsigned long flen, pos = 0;
- int dirlen, ret = 0, check_files = 0;
-
- cmd = NOFAIL(malloc(strlen(objfile) + sizeof("..cmd")));
-
- base = strrchr(objfile, '/');
- if (base) {
- base++;
- dirlen = base - objfile;
- sprintf(cmd, "%.*s.%s.cmd", dirlen, objfile, base);
- } else {
- dirlen = 0;
- sprintf(cmd, ".%s.cmd", objfile);
- }
- dir = NOFAIL(malloc(dirlen + 1));
- strncpy(dir, objfile, dirlen);
- dir[dirlen] = '\0';
-
- file = grab_file(cmd, &flen);
- if (!file) {
- fprintf(stderr, "Warning: could not find %s for %s\n",
- cmd, objfile);
- goto out;
- }
-
- /* There will be a line like so:
- deps_drivers/net/dummy.o := \
- drivers/net/dummy.c \
- $(wildcard include/config/net/fastroute.h) \
- include/linux/config.h \
- $(wildcard include/config/h.h) \
- include/linux/module.h \
-
- Sum all files in the same dir or subdirs.
- */
- while ((line = get_next_line(&pos, file, flen)) != NULL) {
- char* p = line;
- if (strncmp(line, "deps_", sizeof("deps_")-1) == 0) {
- check_files = 1;
- continue;
- }
- if (!check_files)
- continue;
-
- /* Continue until line does not end with '\' */
- if ( *(p + strlen(p)-1) != '\\')
- break;
- /* Terminate line at first space, to get rid of final ' \' */
- while (*p) {
- if (isspace(*p)) {
- *p = '\0';
- break;
- }
- p++;
- }
-
- /* Check if this file is in same dir as objfile */
- if ((strstr(line, dir)+strlen(dir)-1) == strrchr(line, '/')) {
- if (!parse_file(line, md)) {
- fprintf(stderr,
- "Warning: could not open %s: %s\n",
- line, strerror(errno));
- goto out_file;
- }
-
- }
-
- }
-
- /* Everyone parsed OK */
- ret = 1;
-out_file:
- release_file(file, flen);
-out:
- free(dir);
- free(cmd);
- return ret;
-}
-
-static int get_version(const char *modname, char sum[])
-{
- void *file;
- unsigned long len;
- int ret = 0;
- struct md4_ctx md;
- char *sources, *end, *fname;
- const char *basename;
- char filelist[sizeof(".tmp_versions/%s.mod") + strlen(modname)];
-
- /* Source files for module are in .tmp_versions/modname.mod,
- after the first line. */
- if (strrchr(modname, '/'))
- basename = strrchr(modname, '/') + 1;
- else
- basename = modname;
- sprintf(filelist, ".tmp_versions/%s", basename);
- /* Truncate .o, add .mod */
- strcpy(filelist + strlen(filelist)-2, ".mod");
-
- file = grab_file(filelist, &len);
- if (!file) {
- fprintf(stderr, "Warning: could not find versions for %s\n",
- filelist);
- return 0;
- }
-
- sources = strchr(file, '\n');
- if (!sources) {
- fprintf(stderr, "Warning: malformed versions file for %s\n",
- modname);
- goto release;
- }
-
- sources++;
- end = strchr(sources, '\n');
- if (!end) {
- fprintf(stderr, "Warning: bad ending versions file for %s\n",
- modname);
- goto release;
- }
- *end = '\0';
-
- md4_init(&md);
- for (fname = strtok(sources, " "); fname; fname = strtok(NULL, " ")) {
- if (!parse_source_files(fname, &md))
- goto release;
- }
-
- /* sum is of form \0<padding>. */
- md4_final_ascii(&md, sum, 1 + strlen(sum+1));
- ret = 1;
-release:
- release_file(file, len);
- return ret;
-}
-
-static void write_version(const char *filename, const char *sum,
- unsigned long offset)
-{
- int fd;
-
- fd = open(filename, O_RDWR);
- if (fd < 0) {
- fprintf(stderr, "Warning: changing sum in %s failed: %s\n",
- filename, strerror(errno));
- return;
- }
-
- if (lseek(fd, offset, SEEK_SET) == (off_t)-1) {
- fprintf(stderr, "Warning: changing sum in %s:%lu failed: %s\n",
- filename, offset, strerror(errno));
- goto out;
- }
-
- if (write(fd, sum, strlen(sum)+1) != strlen(sum)+1) {
- fprintf(stderr, "Warning: writing sum in %s failed: %s\n",
- filename, strerror(errno));
- goto out;
- }
-out:
- close(fd);
-}
-
-void strip_rcs_crap(char *version)
-{
- unsigned int len, full_len;
-
- if (strncmp(version, "$Revision", strlen("$Revision")) != 0)
- return;
-
- /* Space for version string follows. */
- full_len = strlen(version) + strlen(version + strlen(version) + 1) + 2;
-
- /* Move string to start with version number: prefix will be
- * $Revision$ or $Revision: */
- len = strlen("$Revision");
- if (version[len] == ':' || version[len] == '$')
- len++;
- while (isspace(version[len]))
- len++;
- memmove(version, version+len, full_len-len);
- full_len -= len;
-
- /* Preserve up to next whitespace. */
- len = 0;
- while (version[len] && !isspace(version[len]))
- len++;
- memmove(version + len, version + strlen(version),
- full_len - strlen(version));
-}
-
-/* If the modinfo contains a "version" value, then set this. */
-void maybe_frob_version(const char *modfilename,
- void *modinfo,
- unsigned long modinfo_len,
- unsigned long modinfo_offset)
-{
- char *version, *csum;
-
- version = get_modinfo(modinfo, modinfo_len, "version");
- if (!version)
- return;
-
- /* RCS $Revision gets stripped out. */
- strip_rcs_crap(version);
-
- /* Check against double sumversion */
- if (strchr(version, ' '))
- return;
-
- /* Version contains embedded NUL: second half has space for checksum */
- csum = version + strlen(version);
- *(csum++) = ' ';
- if (get_version(modfilename, csum))
- write_version(modfilename, version,
- modinfo_offset + (version - (char *)modinfo));
-}
+++ /dev/null
-/*----------------------------------------------------------------
- * miscellaneous functions
- *----------------------------------------------------------------*/
-
-unsigned short snd_seq_oss_semitone_tuning[24] =
-{
-/* 0 */ 10000, 10595, 11225, 11892, 12599, 13348, 14142, 14983,
-/* 8 */ 15874, 16818, 17818, 18877, 20000, 21189, 22449, 23784,
-/* 16 */ 25198, 26697, 28284, 29966, 31748, 33636, 35636, 37755
-};
-
-unsigned short snd_seq_oss_cent_tuning[100] =
-{
-/* 0 */ 10000, 10006, 10012, 10017, 10023, 10029, 10035, 10041,
-/* 8 */ 10046, 10052, 10058, 10064, 10070, 10075, 10081, 10087,
-/* 16 */ 10093, 10099, 10105, 10110, 10116, 10122, 10128, 10134,
-/* 24 */ 10140, 10145, 10151, 10157, 10163, 10169, 10175, 10181,
-/* 32 */ 10187, 10192, 10198, 10204, 10210, 10216, 10222, 10228,
-/* 40 */ 10234, 10240, 10246, 10251, 10257, 10263, 10269, 10275,
-/* 48 */ 10281, 10287, 10293, 10299, 10305, 10311, 10317, 10323,
-/* 56 */ 10329, 10335, 10341, 10347, 10353, 10359, 10365, 10371,
-/* 64 */ 10377, 10383, 10389, 10395, 10401, 10407, 10413, 10419,
-/* 72 */ 10425, 10431, 10437, 10443, 10449, 10455, 10461, 10467,
-/* 80 */ 10473, 10479, 10485, 10491, 10497, 10503, 10509, 10515,
-/* 88 */ 10521, 10528, 10534, 10540, 10546, 10552, 10558, 10564,
-/* 96 */ 10570, 10576, 10582, 10589
-};
-
-/* convert from MIDI note to frequency */
-int
-snd_seq_oss_note_to_freq(int note_num)
-{
-
- /*
- * This routine converts a midi note to a frequency (multiplied by 1000)
- */
-
- int note, octave, note_freq;
- static int notes[] = {
- 261632, 277189, 293671, 311132, 329632, 349232,
- 369998, 391998, 415306, 440000, 466162, 493880
- };
-
-#define BASE_OCTAVE 5
-
- octave = note_num / 12;
- note = note_num % 12;
-
- note_freq = notes[note];
-
- if (octave < BASE_OCTAVE)
- note_freq >>= (BASE_OCTAVE - octave);
- else if (octave > BASE_OCTAVE)
- note_freq <<= (octave - BASE_OCTAVE);
-
- /*
- * note_freq >>= 1;
- */
-
- return note_freq;
-}
-
-unsigned long
-snd_seq_oss_compute_finetune(unsigned long base_freq, int bend, int range, int vibrato_cents)
-{
- unsigned long amount;
- int negative, semitones, cents, multiplier = 1;
-
- if (!bend || !range || !base_freq)
- return base_freq;
-
- if (range >= 8192)
- range = 8192;
-
- bend = bend * range / 8192; /* Convert to cents */
- bend += vibrato_cents;
-
- if (!bend)
- return base_freq;
-
- negative = bend < 0 ? 1 : 0;
-
- if (bend < 0)
- bend *= -1;
- if (bend > range)
- bend = range;
-
- /*
- if (bend > 2399)
- bend = 2399;
- */
- while (bend > 2399) {
- multiplier *= 4;
- bend -= 2400;
- }
-
- semitones = bend / 100;
- if (semitones > 99)
- semitones = 99;
- cents = bend % 100;
-
- amount = (int) (snd_seq_oss_semitone_tuning[semitones] * multiplier *
- snd_seq_oss_cent_tuning[cents]) / 10000;
-
- if (negative)
- return (base_freq * 10000) / amount; /* Bend down */
- else
- return (base_freq * amount) / 10000; /* Bend up */
-}
-
+++ /dev/null
-/*
- * Driver for CS4232 on NEC PC9800 series
- * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
- * Osamu Tomita <tomita@cinet.co.jp>
- * Takashi Iwai <tiwai@suse.de>
- * Hideaki Okubo <okubo@msh.biglobe.ne.jp>
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#include <sound/driver.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/moduleparam.h>
-#include <sound/core.h>
-#include <sound/cs4231.h>
-#include <sound/mpu401.h>
-#include <sound/opl3.h>
-#include <sound/initval.h>
-#include "sound_pc9800.h"
-
-#define chip_t cs4231_t
-
-MODULE_AUTHOR("Osamu Tomita <tomita@cinet.co.jp>");
-MODULE_LICENSE("GPL");
-MODULE_CLASSES("{sound}");
-MODULE_DESCRIPTION("NEC PC9800 CS4232");
-MODULE_DEVICES("{{NEC,PC9800}}");
-
-#define IDENT "PC98-CS4232"
-
-static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
-static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
-static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_ISAPNP; /* Enable this card */
-static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* PnP setup */
-#if 0 /* NOT USED */
-static long cport[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* PnP setup */
-#endif
-static long mpu_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT;/* PnP setup */
-static long fm_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* PnP setup */
-static int irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; /* 5,7,9,11,12,15 */
-static int mpu_irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; /* 9,11,12,15 */
-static int dma1[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0,1,3,5,6,7 */
-static int dma2[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0,1,3,5,6,7 */
-static int pc98ii[SNDRV_CARDS]; /* PC98II */
-static int boot_devs;
-
-module_param_array(index, int, boot_devs, 0444);
-MODULE_PARM_DESC(index, "Index value for " IDENT " soundcard.");
-MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
-module_param_array(id, charp, boot_devs, 0444);
-MODULE_PARM_DESC(id, "ID string for " IDENT " soundcard.");
-MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
-module_param_array(enable, bool, boot_devs, 0444);
-MODULE_PARM_DESC(enable, "Enable " IDENT " soundcard.");
-MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
-module_param_array(port, long, boot_devs, 0444);
-MODULE_PARM_DESC(port, "Port # for " IDENT " driver.");
-MODULE_PARM_SYNTAX(port, SNDRV_PORT12_DESC);
-#if 0 /* NOT USED */
-module_param_array(cport, long, boot_devs, 0444);
-MODULE_PARM_DESC(cport, "Control port # for " IDENT " driver.");
-MODULE_PARM_SYNTAX(cport, SNDRV_PORT12_DESC);
-#endif
-module_param_array(mpu_port, long, boot_devs, 0444);
-MODULE_PARM_DESC(mpu_port, "MPU-401 port # for " IDENT " driver.");
-MODULE_PARM_SYNTAX(mpu_port, SNDRV_PORT12_DESC);
-module_param_array(fm_port, long, boot_devs, 0444);
-MODULE_PARM_DESC(fm_port, "FM port # for " IDENT " driver.");
-MODULE_PARM_SYNTAX(fm_port, SNDRV_PORT12_DESC);
-module_param_array(irq, int, boot_devs, 0444);
-MODULE_PARM_DESC(irq, "IRQ # for " IDENT " driver.");
-MODULE_PARM_SYNTAX(irq, SNDRV_IRQ_DESC);
-module_param_array(mpu_irq, int, boot_devs, 0444);
-MODULE_PARM_DESC(mpu_irq, "MPU-401 IRQ # for " IDENT " driver.");
-MODULE_PARM_SYNTAX(mpu_irq, SNDRV_IRQ_DESC);
-module_param_array(dma1, int, boot_devs, 0444);
-MODULE_PARM_DESC(dma1, "DMA1 # for " IDENT " driver.");
-MODULE_PARM_SYNTAX(dma1, SNDRV_DMA_DESC);
-module_param_array(dma2, int, boot_devs, 0444);
-MODULE_PARM_DESC(dma2, "DMA2 # for " IDENT " driver.");
-MODULE_PARM_SYNTAX(dma2, SNDRV_DMA_DESC);
-module_param_array(pc98ii, bool, boot_devs, 0444);
-MODULE_PARM_DESC(pc98ii, "Roland MPU-PC98II support.");
-MODULE_PARM_SYNTAX(pc98ii, SNDRV_BOOLEAN_FALSE_DESC);
-
-
-static snd_card_t *snd_pc98_cards[SNDRV_CARDS] = SNDRV_DEFAULT_PTR;
-
-/*
- * initialize MPU401-UART
- */
-
-static int __init pc98_mpu401_init(int irq)
-{
-#include "pc9801_118_magic.h"
-#define outp118(reg,data) outb((reg),0x148e);outb((data),0x148f)
-#define WAIT118 outb(0x00,0x5f)
- int mpu_intr, count;
-#ifdef OOKUBO_ORIGINAL
- int err = 0;
-#endif /* OOKUBO_ORIGINAL */
-
- switch (irq) {
- case 3:
- mpu_intr = 3;
- break;
- case 5:
- mpu_intr = 2;
- break;
- case 6:
- mpu_intr = 1;
- break;
- case 10:
- mpu_intr = 0;
- break;
- default:
- snd_printk(KERN_ERR IDENT ": Bad IRQ %d\n", irq);
- return -EINVAL;
- }
-
- outp118(0x21, mpu_intr);
- WAIT118;
- outb(0x00, 0x148e);
- if (inb(0x148f) & 0x08) {
- snd_printk(KERN_INFO IDENT ": No MIDI daughter board found\n");
- return 0;
- }
-
- outp118(0x20, 0x00);
- outp118(0x05, 0x04);
- for (count = 0; count < 35000; count ++)
- WAIT118;
- outb(0x05, 0x148e);
- for (count = 0; count < 65000; count ++)
- if (inb(0x148f) == 0x04)
- goto set_mode_118;
- snd_printk(KERN_ERR IDENT ": MIDI daughter board initialize failed at stage1\n\n");
- return -EINVAL;
-
- set_mode_118:
- outp118(0x05, 0x0c);
- outb(0xaa, 0x485);
- outb(0x99, 0x485);
- outb(0x2a, 0x485);
- for (count = 0; count < sizeof(Data0485_99); count ++) {
- outb(Data0485_99[count], 0x485);
- WAIT118;
- }
-
- outb(0x00, 0x486);
- outb(0xaa, 0x485);
- outb(0x9e, 0x485);
- outb(0x2a, 0x485);
- for (count = 0; count < sizeof(Data0485_9E); count ++)
- if (inb(0x485) != Data0485_9E[count]) {
-#ifdef OOKUBO_ORIGINAL
- err = 1;
-#endif /* OOKUBO_ORIGINAL */
- break;
- }
- outb(0x00, 0x486);
- for (count = 0; count < 2000; count ++)
- WAIT118;
-#ifdef OOKUBO_ORIGINAL
- if (!err) {
- outb(0xaa, 0x485);
- outb(0x36, 0x485);
- outb(0x28, 0x485);
- for (count = 0; count < sizeof(Data0485_36); count ++)
- outb(Data0485_36[count], 0x485);
- outb(0x00, 0x486);
- for (count = 0; count < 1500; count ++)
- WAIT118;
- outp118(0x05, inb(0x148f) | 0x08);
- outb(0xff, 0x148c);
- outp118(0x05, inb(0x148f) & 0xf7);
- for (count = 0; count < 1500; count ++)
- WAIT118;
- }
-#endif /* OOKUBO_ORIGINAL */
-
- outb(0xaa, 0x485);
- outb(0xa9, 0x485);
- outb(0x21, 0x485);
- for (count = 0; count < sizeof(Data0485_A9); count ++) {
- outb(Data0485_A9[count], 0x485);
- WAIT118;
- }
-
- outb(0x00, 0x486);
- outb(0xaa, 0x485);
- outb(0x0c, 0x485);
- outb(0x20, 0x485);
- for (count = 0; count < sizeof(Data0485_0C); count ++) {
- outb(Data0485_0C[count], 0x485);
- WAIT118;
- }
-
- outb(0x00, 0x486);
- outb(0xaa, 0x485);
- outb(0x66, 0x485);
- outb(0x20, 0x485);
- for (count = 0; count < sizeof(Data0485_66); count ++) {
- outb(Data0485_66[count], 0x485);
- WAIT118;
- }
-
- outb(0x00, 0x486);
- outb(0xaa, 0x485);
- outb(0x60, 0x485);
- outb(0x20, 0x485);
- for (count = 0; count < sizeof(Data0485_60); count ++) {
- outb(Data0485_60[count], 0x485);
- WAIT118;
- }
-
- outb(0x00, 0x486);
- outp118(0x05, 0x04);
- outp118(0x05, 0x00);
- for (count = 0; count < 35000; count ++)
- WAIT118;
- outb(0x05, 0x148e);
- for (count = 0; count < 65000; count ++)
- if (inb(0x148f) == 0x00)
- goto end_mode_118;
- snd_printk(KERN_ERR IDENT ": MIDI daughter board initialize failed at stage2\n");
- return -EINVAL;
-
- end_mode_118:
- outb(0x3f, 0x148d);
- snd_printk(KERN_INFO IDENT ": MIDI daughter board initialized\n");
- return 0;
-}
-
-static int __init pc98_cs4231_chip_init(int dev)
-{
- int intr_bits, intr_bits2, dma_bits;
-
- switch (irq[dev]) {
- case 3:
- intr_bits = 0x08;
- intr_bits2 = 0x03;
- break;
- case 5:
- intr_bits = 0x10;
- intr_bits2 = 0x08;
- break;
- case 10:
- intr_bits = 0x18;
- intr_bits2 = 0x02;
- break;
- case 12:
- intr_bits = 0x20;
- intr_bits2 = 0x00;
- break;
- default:
- snd_printk(KERN_ERR IDENT ": Bad IRQ %d\n", irq[dev]);
- return -EINVAL;
- }
-
- switch (dma1[dev]) {
- case 0:
- dma_bits = 0x01;
- break;
- case 1:
- dma_bits = 0x02;
- break;
- case 3:
- dma_bits = 0x03;
- break;
- default:
- snd_printk(KERN_ERR IDENT ": Bad DMA %d\n", dma1[dev]);
- return -EINVAL;
- }
-
- if (dma2[dev] >= 2) {
- snd_printk(KERN_ERR IDENT ": Bad DMA %d\n", dma2[dev]);
- return -EINVAL;
- }
-
- outb(dma1[dev], 0x29); /* dma1 boundary 64KB */
- if (dma1[dev] != dma2[dev] && dma2[dev] >= 0) {
- outb(0, 0x5f); /* wait */
- outb(dma2[dev], 0x29); /* dma2 boundary 64KB */
- intr_bits |= 0x04;
- }
-
- if (PC9800_SOUND_ID() == PC9800_SOUND_ID_118) {
- /* Set up CanBe control registers. */
- snd_printd(KERN_INFO "Setting up CanBe Sound System\n");
- outb(inb(PC9800_SOUND_IO_ID) | 0x03, PC9800_SOUND_IO_ID);
- outb(0x01, 0x0f4a);
- outb(intr_bits2, 0x0f4b);
- }
-
- outb(intr_bits | dma_bits, 0xf40);
- return 0;
-}
-
-
-static int __init snd_card_pc98_probe(int dev)
-{
- snd_card_t *card;
- snd_pcm_t *pcm = NULL;
- cs4231_t *chip;
- opl3_t *opl3;
- int err;
-
- if (port[dev] == SNDRV_AUTO_PORT) {
- snd_printk(KERN_ERR IDENT ": specify port\n");
- return -EINVAL;
- }
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
-
- if ((err = pc98_cs4231_chip_init(dev)) < 0) {
- snd_card_free(card);
- return err;
- }
-
- if ((err = snd_cs4231_create(card,
- port[dev],
- -1,
- irq[dev],
- dma1[dev],
- dma2[dev],
- CS4231_HW_DETECT,
- 0,
- &chip)) < 0) {
- snd_card_free(card);
- return err;
- }
- if ((err = snd_cs4231_pcm(chip, 0, &pcm)) < 0) {
- snd_card_free(card);
- return err;
- }
- if ((err = snd_cs4231_mixer(chip)) < 0) {
- snd_card_free(card);
- return err;
- }
-
- if ((err = snd_cs4231_timer(chip, 0, NULL)) < 0) {
- snd_card_free(card);
- return err;
- }
-
- if (fm_port[dev] > 0 && fm_port[dev] != SNDRV_AUTO_PORT) {
- /* ??? */
- outb(0x00, fm_port[dev] + 6);
- inb(fm_port[dev] + 7);
- /* Enable OPL-3 Function */
- outb(inb(PC9800_SOUND_IO_ID) | 0x03, PC9800_SOUND_IO_ID);
- if (snd_opl3_create(card,
- fm_port[dev], fm_port[dev] + 2,
- OPL3_HW_OPL3_PC98, 0, &opl3) < 0) {
- printk(KERN_ERR IDENT ": OPL3 not detected\n");
- } else {
- if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
- snd_card_free(card);
- return err;
- }
- }
- }
-
- if (mpu_port[dev] > 0 && mpu_port[dev] != SNDRV_AUTO_PORT) {
- err = pc98_mpu401_init(mpu_irq[dev]);
- if (! err) {
- err = snd_mpu401_uart_new(card, 0,
- pc98ii[dev] ? MPU401_HW_PC98II : MPU401_HW_MPU401,
- mpu_port[dev], 0,
- mpu_irq[dev], SA_INTERRUPT, NULL);
- if (err < 0)
- snd_printk(KERN_INFO IDENT ": MPU401 not detected\n");
- }
- }
-
- strcpy(card->driver, pcm->name);
- strcpy(card->shortname, pcm->name);
- sprintf(card->longname, "%s at 0x%lx, irq %i, dma %i",
- pcm->name,
- chip->port,
- irq[dev],
- dma1[dev]);
- if (dma2[dev] >= 0)
- sprintf(card->longname + strlen(card->longname), "&%d", dma2[dev]);
- if ((err = snd_card_register(card)) < 0) {
- snd_card_free(card);
- return err;
- }
- snd_pc98_cards[dev] = card;
- return 0;
-}
-
-static int __init alsa_card_pc98_init(void)
-{
- int dev, cards = 0;
-
- for (dev = 0; dev < SNDRV_CARDS; dev++) {
- if (!enable[dev])
- continue;
- if (snd_card_pc98_probe(dev) >= 0)
- cards++;
- }
- if (!cards) {
-#ifdef MODULE
- printk(KERN_ERR IDENT " soundcard not found or device busy\n");
-#endif
- return -ENODEV;
- }
- return 0;
-}
-
-static void __exit alsa_card_pc98_exit(void)
-{
- int idx;
-
- for (idx = 0; idx < SNDRV_CARDS; idx++)
- snd_card_free(snd_pc98_cards[idx]);
-}
-
-module_init(alsa_card_pc98_init)
-module_exit(alsa_card_pc98_exit)
+++ /dev/null
- static unsigned char Data0485_A9[] = {
- 0x12, 0x03, 0x90, 0xc2, 0x2a, 0x75, 0x1e, 0x20,
- 0xe4, 0x12, 0x2b, 0x9b, 0x22, 0xa9, 0x16, 0x77,
- 0x33, 0xe9, 0x04, 0x54, 0x03, 0x44, 0xa8, 0xf5,
- 0x16, 0xc2, 0x2f, 0x22, 0xa9, 0x16, 0x77, 0x42,
- 0xe9, 0x04, 0x54, 0x03, 0x44, 0xa8, 0xf9, 0x77,
- 0xf8, 0x04, 0x54, 0x03, 0x44, 0xa8, 0xf5, 0x16,
- 0xc2, 0x2f, 0x22, 0x90, 0x25, 0x9f, 0x30, 0x04,
- 0x05, 0xc2, 0x04, 0x12, 0x1f, 0x62, 0x30, 0x00,
- 0x05, 0xc2, 0x00, 0x12, 0x15, 0xe6, 0x30, 0x01,
- 0x05, 0xc2, 0x01, 0x12, 0x29, 0xaf, 0x30, 0x02,
- 0x05, 0xc2, 0x02, 0x12, 0x29, 0xaf, 0x30, 0x05,
- 0x05, 0xc2, 0x05, 0x12, 0x16, 0x65, 0x30, 0x06,
- 0x08, 0xc2, 0x06, 0x12, 0x16, 0xb1, 0x12, 0x29,
- 0xaf, 0x30, 0x07, 0x08, 0xc2, 0x07, 0x12, 0x16,
- 0xe9, 0x12, 0x29, 0xaf, 0x22, 0x20, 0x97, 0x09,
- 0x53, 0xa8, 0xfb, 0x12, 0x04, 0x2c, 0x43, 0xa8,
- 0x04, 0x22, 0x71, 0xb8, 0x71, 0xb8, 0x71, 0xb8,
- 0x22, 0x20, 0x4b, 0x04, 0x75, 0x4e, 0x02, 0x22,
- 0xe5, 0x35, 0x24, 0xff, 0xf5, 0x35, 0xe5, 0x36,
- 0x34, 0xff, 0xf5, 0x36, 0x75, 0x4e, 0x02, 0x22,
- 0x10, 0x19, 0x02, 0x80, 0x08, 0x78, 0x00, 0xe2,
- 0x78, 0x07, 0xf2, 0x61, 0x9b, 0x78, 0x11, 0xe2,
- 0xc0, 0x01, 0xc0, 0xf0, 0xc0, 0xd0, 0xc0, 0x02,
- 0x71, 0x14, 0xe5, 0x30, 0xb4, 0x01, 0x02, 0x61,
- 0x93, 0x43, 0x08, 0x40, 0x12, 0x2a, 0x53, 0x61,
- 0x93, 0x79, 0x03, 0xe3, 0xa2, 0xe2, 0x92, 0x26,
- 0xa2, 0xe3, 0x92, 0x27, 0x22, 0xad, 0x2b, 0xbd,
- 0x04, 0x07, 0xf5, 0x72, 0x78, 0x27, 0x02, 0x11,
- 0x76, 0x02, 0x11, 0x30, 0x00, 0x00, 0x00, 0x12,
- 0x28, 0xba, 0x79, 0x01, 0xe3, 0x75, 0x21, 0x3f,
- 0x75, 0x49, 0x11, 0x75, 0x4c, 0x11, 0x31, 0xdc,
- 0x75, 0x1a, 0x80, 0x51, 0x72, 0x75, 0x81, 0xe3,
- 0x12, 0x25, 0xc9, 0x43, 0xa8, 0x01, 0x00, 0x53,
- 0xa8, 0xfe, 0x10, 0x50, 0x02, 0x80, 0x03, 0x12,
- 0x1a, 0x8d, 0xd1, 0x28, 0x12, 0x03, 0xd9, 0xd1,
- 0xf2, 0x12, 0x2d, 0xf0, 0xb0, 0x11, 0x92, 0xe0,
- 0xa2, 0x2a, 0xa0, 0xb5, 0x82, 0xe0, 0x50, 0x03,
- 0x79, 0x0f, 0xe3, 0x71, 0xca, 0x51, 0x1e, 0x91,
- 0xe4, 0x53, 0xa8, 0xfb, 0x10, 0x10, 0x02, 0x80,
- 0x26, 0xc2, 0x8e, 0xd2, 0xab, 0xa2, 0x1c, 0x40,
- 0x13, 0xa2, 0x1d, 0x50, 0x0a, 0x43, 0x08, 0x40,
- 0x12, 0x1a, 0x01, 0xd1, 0xd7, 0x80, 0x0b, 0x12,
- 0x26, 0x04, 0x61, 0x08, 0x43, 0x08, 0x40, 0x12,
- 0x1a, 0x01, 0xd2, 0x1f, 0x12, 0x17, 0x7f, 0x43,
- 0xa8, 0x04, 0x51, 0x1e, 0x91, 0xe4, 0x12, 0x13,
- 0x34, 0x80, 0x98, 0xa2, 0x17, 0x72, 0x16, 0x72,
- 0x15, 0x72, 0x2d, 0x50, 0x06, 0xfa, 0x12, 0x13,
- 0x66, 0x80, 0x25, 0xc2, 0x13, 0x30, 0x28, 0x05,
- 0x12, 0x02, 0xbe, 0x80, 0x1b, 0xb4, 0x10, 0x12,
- 0x78, 0x00, 0xf2, 0xe5, 0x30, 0xb4, 0x01, 0x06,
- 0x12, 0x03, 0x90, 0xd2, 0x19, 0x22, 0x12, 0x00,
- 0xdd, 0x22, 0x75, 0x30, 0x00, 0x12, 0x00, 0xa1,
- 0x22, 0x00, 0x00, 0x75, 0x1e, 0x00, 0x74, 0x0c,
- 0x12, 0x2b, 0x9b, 0x74, 0x40, 0x79, 0x05, 0xf3,
- 0x74, 0x49, 0x12, 0x2b, 0x9b, 0x74, 0x04, 0x79,
- 0x05, 0xf3, 0x75, 0x15, 0x04, 0x74, 0x10, 0x12,
- 0x2b, 0x9b, 0x74, 0x00, 0x79, 0x05, 0xf3, 0x74,
- 0x17, 0x12, 0x2b, 0x9b, 0x74, 0x00, 0x79, 0x05,
- 0xf3, 0x74, 0x1a, 0x12, 0x2b, 0x9b, 0x74, 0x00,
- 0x79, 0x05, 0xf3, 0x74, 0x0a, 0x12, 0x2b, 0x9b,
- 0x74, 0x20, 0x79, 0x05, 0xf3, 0x79, 0xe0, 0x77,
- 0x20, 0x22, 0xd0, 0x02, 0xd0, 0xd0, 0xd0, 0xf0,
- 0xd0, 0x01, 0xe5, 0x5f, 0xd0, 0xa8, 0x22, 0x00,
- 0x00, 0x90, 0x25, 0x9f, 0x75, 0x26, 0xff, 0x75,
- 0x27, 0xff, 0x75, 0x28, 0x03, 0x75, 0x13, 0xff,
- 0x75, 0x1f, 0x00, 0x75, 0x14, 0xff, 0x22, 0x79,
- 0x06, 0xe5, 0x29, 0x60, 0x0b, 0xe3, 0x30, 0xe1,
- 0xf8, 0xe5, 0x4f, 0x64, 0x80, 0x79, 0x07, 0xf3,
- 0x22, 0x10, 0x4c, 0x01, 0x22, 0x30, 0x4b, 0x0a,
- 0xc2, 0x4b, 0xe5, 0x4d, 0x64, 0x80, 0xf5, 0x4f,
- 0x80, 0x1d, 0xe5, 0x15, 0xa2, 0xe0, 0x82, 0xe6,
- 0x40, 0x02, 0x80, 0x35, 0x30, 0x4a, 0x04, 0xb1,
- 0xe6, 0x80, 0x0c, 0x30, 0x49, 0x04, 0x51, 0x2b,
- 0x80, 0x05, 0x30, 0x48, 0x24, 0x91, 0x7e, 0x79,
- 0x06, 0xe3, 0x30, 0xe0, 0x1a, 0x79, 0x06, 0xf3,
- 0xe5, 0x4e, 0x24, 0xff, 0x50, 0x04, 0xf5, 0x4e,
- 0x80, 0x0d, 0x79, 0x0f, 0xf3, 0x20, 0x2a, 0x07,
- 0x12, 0x2b, 0x32, 0x75, 0x29, 0x00, 0x22, 0x91,
- 0x1b, 0x22, 0x79, 0x0f, 0xe3, 0xc0, 0xa8, 0x75,
- 0xa8, 0x00, 0x30, 0x2b, 0x03, 0xd0, 0xa8, 0x22,
- 0x79, 0x0e, 0xf3, 0xd0, 0xa8, 0x22, 0x8a, 0xf0,
- 0xe5, 0x50, 0x10, 0xf3, 0x10, 0x23, 0x23, 0x23,
- 0x25, 0xf0, 0x12, 0x2c, 0xb8, 0xa2, 0xe7, 0x92,
- 0xe4, 0xc2, 0xe7, 0x80, 0x08, 0x23, 0x23, 0x23,
- 0x25, 0xf0, 0x12, 0x2c, 0x19, 0x25, 0x4f, 0x20,
- 0xd2, 0x04, 0xf5, 0x4f, 0x80, 0x0a, 0x40, 0x05,
- 0x75, 0x4f, 0x7f, 0x80, 0x03, 0x75, 0x4f, 0xff,
- 0xea, 0x12, 0x2c, 0x3c, 0x25, 0x50, 0x20, 0xe7,
- 0x05, 0xb4, 0x03, 0x07, 0x80, 0x0c, 0x75, 0x50,
- 0x00, 0x80, 0x09, 0x40, 0x05, 0x75, 0x50, 0x03,
- 0x80, 0x02, 0xf5, 0x50, 0x22, 0xe5, 0x4d, 0xc4,
- 0x54, 0x0c, 0x03, 0x03, 0xfa, 0x91, 0xa9, 0x71,
- 0xb8, 0xe5, 0x4d, 0xc4, 0x54, 0x03, 0xfa, 0x91,
- 0xa9, 0x71, 0xb8, 0xe5, 0x4d, 0x54, 0x0c, 0x03,
- 0x03, 0xfa, 0x91, 0xa9, 0x71, 0xb8, 0xe5, 0x4d,
- 0x54, 0x03, 0xfa, 0x91, 0xa9, 0x71, 0xb8, 0x22,
- 0x8a, 0xf0, 0xe5, 0x50, 0x23, 0x23, 0x25, 0xf0,
- 0x12, 0x2b, 0xf6, 0x25, 0x4f, 0x20, 0xd2, 0x04,
- 0xf5, 0x4f, 0x80, 0x0a, 0x40, 0x05, 0x75, 0x4f,
- 0x7f, 0x80, 0x03, 0x75, 0x4f, 0xff, 0xea, 0x12,
- 0x2c, 0x40, 0x25, 0x50, 0x20, 0xe7, 0x05, 0xb4,
- 0x05, 0x07, 0x80, 0x0c, 0x75, 0x50, 0x00, 0x80,
- 0x09, 0x40, 0x05, 0x75, 0x50, 0x05, 0x80, 0x02,
- 0xf5, 0x50, 0x22, 0x30, 0x26, 0x03, 0x12, 0x1e,
- 0xf5, 0x30, 0x27, 0x03, 0x12, 0x1f, 0x37, 0x30,
- 0x25, 0x09, 0x12, 0x1f, 0x4e, 0x30, 0x23, 0x03,
- 0x12, 0x1f, 0x1e, 0x10, 0x22, 0x02, 0x80, 0x0a,
- 0xe5, 0x3b, 0xb4, 0xff, 0x02, 0xc2, 0x20, 0x12,
- 0x1e, 0x79, 0x22, 0x78, 0x11, 0xe2, 0x20, 0xe0,
- 0x07, 0xc0, 0x01, 0x12, 0x28, 0xba, 0xd0, 0x01,
- 0x78, 0x00, 0xf2, 0x61, 0x9b, 0x12, 0x2b, 0x32,
- 0x12, 0x17, 0x7f, 0x78, 0x00, 0xf2, 0xaa, 0x35,
- 0xab, 0x36, 0xea, 0x24, 0xff, 0xfa, 0xeb, 0x34,
- 0xff, 0xfb, 0x50, 0x03, 0xd2, 0x10, 0x22, 0x75,
- 0x37, 0x01, 0x75, 0x38, 0x00, 0x75, 0x39, 0x00,
- 0x12, 0x04, 0x04, 0xd2, 0x8e, 0x22, 0xa8, 0x2b,
- 0xb8, 0x00, 0x02, 0x80, 0x03, 0x02, 0x11, 0xbd,
- 0xf5, 0x74, 0x78, 0x2a, 0x12, 0x11, 0xec, 0xe5,
- 0x74, 0x78, 0x29, 0x12, 0x11, 0xec, 0x22, 0xfa,
- 0xe5, 0x2b, 0x60, 0x01, 0x22, 0xea, 0x78, 0x2b,
- 0xf5, 0x75, 0x12, 0x11, 0xec, 0x22, 0x74, 0x10,
- 0x12, 0x2b, 0x9b, 0x74, 0x20, 0x78, 0x05, 0xf2,
- 0x74, 0x09, 0x12, 0x17, 0x75, 0xe5, 0x15, 0x44,
- 0x80, 0x79, 0x05, 0xf3, 0xf5, 0x15, 0x12, 0x17,
- 0x7f, 0x22, 0x12, 0x03, 0x84, 0x79, 0x0f, 0xe3,
- 0x78, 0x00, 0xf2, 0x12, 0x2b, 0x28, 0xe5, 0x81,
- 0x24, 0xfc, 0xf5, 0x81, 0x61, 0x93, 0xd2, 0x07,
- 0x78, 0x11, 0xe2, 0x44, 0x11, 0xf5, 0x4c, 0xc2,
- 0x0f, 0x12, 0x29, 0xa3, 0x61, 0x93, 0x02, 0x1b,
- 0x77, 0x00, 0xe1, 0x81, 0xe1, 0x9a, 0xd2, 0x2c,
- 0xa1, 0x0c, 0x20, 0x20, 0x02, 0xd2, 0x26, 0x02,
- 0x1e, 0x35, 0x02, 0x1e, 0x61, 0x02, 0x1d, 0x8f,
- 0xc2, 0x8e, 0x75, 0xa8, 0x9e, 0x22, 0x41, 0x49,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x02, 0x29, 0x91, 0x00, 0x00, 0x00, 0xa1, 0xbb,
- 0xa1, 0xc3, 0x02, 0x1e, 0x6b, 0xe5, 0x4d, 0xc4,
- 0x54, 0x0f, 0xfa, 0x91, 0x2f, 0x71, 0xb8, 0xe5,
- 0x4d, 0x54, 0x0f, 0xfa, 0x91, 0x2f, 0x71, 0xb8,
- 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa1, 0xc6,
- 0x02, 0x1d, 0x8f, 0xc2, 0x8e, 0xd2, 0xab, 0xc2,
- 0x10, 0x79, 0x0f, 0xf3, 0x22, 0x00, 0x02, 0x2a,
- 0x84, 0x00, 0xe1, 0xbc, 0xe1, 0xc8, 0x02, 0x1e,
- 0x27, 0x00, 0x78, 0x00, 0xf2, 0x78, 0x0b, 0xe2,
- 0xf4, 0xf5, 0x4d, 0xd2, 0x4c, 0x61, 0x9b, 0x30,
- 0xb5, 0x02, 0xc2, 0x11, 0x22, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x79, 0xbd, 0xf1, 0x3d, 0x83,
- 0x22, 0xdd, 0xbd, 0xbd, 0xbd, 0x61, 0xbd, 0x8d,
- 0x7a, 0xbd, 0xbd, 0xbd, 0xbd, 0x30, 0xbd, 0xbd,
- 0xbd, 0x55, 0xbd, 0xbd, 0xbd, 0x52, 0xbd, 0xb6,
- 0xb6, 0xbd, 0xbd, 0xbd, 0xbd, 0x00, 0xbd, 0xbd,
- 0xbd, 0xe8, 0xda, 0xbd, 0xbd, 0xcf, 0xb9, 0xbd,
- 0xc4, 0xf1, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd,
- 0xbd, 0x7b, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd,
- 0xbd, 0x70, 0x6a, 0x57, 0x47, 0x34, 0xbd, 0xbd,
- 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0x29, 0xbd,
- 0xbd, 0xbd, 0xb6, 0xb6, 0xbd, 0xbd, 0xbd, 0xbd,
- 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0x2e, 0x25,
- 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xfe, 0xf5,
- 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0x19, 0xbd,
- 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0x21, 0x8f,
- 0x09, 0xbd, 0xf9, 0x86, 0xbd, 0xbd, 0xbd, 0xd7,
- 0xbd, 0xa9, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0x9b,
- 0xd1, 0x9d, 0xbd, 0xae, 0xbd, 0xbd, 0xbd, 0xcb,
- 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd,
- 0xb6, 0xa5, 0xbd, 0xc5, 0xbd, 0xbd, 0xbd, 0xc3,
- 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0x74, 0x10,
- 0x12, 0x2b, 0x9b, 0xe4, 0x78, 0x05, 0xf2, 0x74,
- 0x09, 0x12, 0x17, 0x75, 0xe5, 0x15, 0x54, 0x7f,
- 0x79, 0x05, 0xf3, 0xf5, 0x15, 0x12, 0x17, 0x7f,
- 0x22, 0x30, 0x51, 0x01, 0x22, 0x53, 0xa8, 0xfb,
- 0x12, 0x2d, 0xf0, 0x50, 0x22, 0x79, 0x03, 0xe3,
- 0x20, 0xe4, 0x1c, 0xaa, 0x35, 0xab, 0x36, 0xea,
- 0x24, 0xf0, 0xfa, 0xeb, 0x34, 0xff, 0xfb, 0x50,
- 0x0e, 0x10, 0x1f, 0x02, 0x80, 0x09, 0x20, 0x2a,
- 0x03, 0x12, 0x2b, 0x32, 0x12, 0x2d, 0xd6, 0x43,
- 0xa8, 0x04, 0x22, 0xa2, 0x1c, 0x72, 0x1d, 0x40,
- 0x07, 0x53, 0x08, 0xbf, 0x78, 0x00, 0xf2, 0x22,
- 0xb1, 0x1e, 0x22, 0x00, 0x79, 0x02, 0x12, 0x27,
- 0x3d, 0x02, 0x2d, 0x37, 0x14, 0x54, 0xf0, 0x60,
- 0x21, 0xe5, 0xf0, 0x24, 0xb6, 0xe5, 0xf0, 0x50,
- 0x16, 0x24, 0x8b, 0x50, 0x15, 0xe5, 0xf0, 0x24,
- 0x56, 0xe5, 0xf0, 0x50, 0x08, 0x24, 0x2f, 0x50,
- 0x09, 0xe5, 0xf0, 0x24, 0xd9, 0x24, 0xd5, 0x24,
- 0xf0, 0x22, 0x15, 0x81, 0x15, 0x81, 0xe9, 0x22,
- 0x78, 0x13, 0x74, 0x00, 0xf2, 0x75, 0x2e, 0x01,
- 0xd2, 0x6a, 0xc2, 0x69, 0xc2, 0x68, 0xc2, 0x6c,
- 0x90, 0x25, 0x9f, 0x75, 0xb8, 0x07, 0x41, 0xa4,
- 0xc0, 0x01, 0xc0, 0xf0, 0xc0, 0xd0, 0xc0, 0x02,
- 0xe5, 0x3d, 0x54, 0x7d, 0x03, 0x10, 0xe5, 0x05,
- 0x90, 0x28, 0x4b, 0x80, 0x03, 0x90, 0x2b, 0x7c,
- 0x73, 0xe5, 0x3d, 0x30, 0xe5, 0x07, 0x74, 0xfd,
- 0x78, 0x00, 0xf2, 0x61, 0x9b, 0x90, 0x1a, 0x97,
- 0x74, 0xb6, 0xc0, 0xe0, 0x74, 0x27, 0xc0, 0xe0,
- 0xc0, 0xa8, 0x02, 0x1b, 0xab, 0x90, 0x25, 0x9f,
- 0xd0, 0xa8, 0x22, 0x90, 0x27, 0xb6, 0xc0, 0x82,
- 0xc0, 0x83, 0xc0, 0xa8, 0x02, 0x1d, 0xa6, 0x90,
- 0x27, 0xb6, 0xc0, 0x82, 0xc0, 0x83, 0xc0, 0xa8,
- 0x02, 0x1e, 0x0a, 0xea, 0x24, 0xf0, 0xfa, 0xeb,
- 0x34, 0xff, 0xfb, 0x50, 0x2e, 0x20, 0x0b, 0x05,
- 0x85, 0x44, 0xe0, 0x80, 0x03, 0x75, 0xe0, 0x00,
- 0x30, 0xe1, 0x20, 0xe5, 0x35, 0x24, 0xff, 0xf5,
- 0x35, 0xe5, 0x36, 0x34, 0xff, 0xf5, 0x36, 0xc3,
- 0xe5, 0x36, 0x13, 0xf5, 0x36, 0xe5, 0x35, 0x13,
- 0xf5, 0x35, 0x75, 0x3a, 0x10, 0x12, 0x1a, 0x77,
- 0x02, 0x18, 0x77, 0x75, 0x3a, 0x00, 0x12, 0x1a,
- 0x77, 0x02, 0x18, 0x1b, 0x20, 0x4b, 0x04, 0x75,
- 0x4e, 0x03, 0x22, 0xe5, 0x35, 0x24, 0xff, 0xf5,
- 0x35, 0xe5, 0x36, 0x34, 0xff, 0xf5, 0x36, 0x75,
- 0x4e, 0x03, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x02, 0x2c,
- 0x70, 0xd2, 0x00, 0x78, 0x11, 0xe2, 0x44, 0x11,
- 0xf5, 0x3f, 0xc2, 0x08, 0x12, 0x29, 0xa3, 0x02,
- 0x23, 0x93, 0x21, 0x62, 0x61, 0x40, 0x01, 0x3a,
- 0x01, 0x73, 0x21, 0x76, 0x61, 0xa8, 0x21, 0x39,
- 0x21, 0x4a, 0x02, 0x2a, 0x7b, 0x79, 0x06, 0xf3,
- 0xc0, 0xd0, 0x12, 0x03, 0xd9, 0x78, 0x00, 0xf2,
- 0xd0, 0xd0, 0x22, 0x00, 0x00, 0x00, 0x00, 0x02,
- 0x2c, 0xb4, 0x78, 0x11, 0xe2, 0x44, 0x11, 0x54,
- 0x0f, 0xf8, 0xc4, 0x48, 0xd2, 0x05, 0xf5, 0x48,
- 0xc2, 0x0d, 0x31, 0xa3, 0x02, 0x23, 0x93, 0x20,
- 0x4b, 0x04, 0x75, 0x4e, 0x01, 0x22, 0xe5, 0x35,
- 0x24, 0xff, 0xf5, 0x35, 0xe5, 0x36, 0x34, 0xff,
- 0xf5, 0x36, 0x75, 0x4e, 0x01, 0x22, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x79, 0xd0, 0x77, 0x1b, 0x79, 0xd1, 0x77, 0x18,
- 0x79, 0xd2, 0x77, 0x77, 0x79, 0xd3, 0x77, 0x18,
- 0x22, 0x75, 0x29, 0x00, 0x75, 0x25, 0x00, 0x75,
- 0x34, 0x03, 0x75, 0x22, 0x00, 0x75, 0x23, 0x05,
- 0x75, 0x4f, 0x00, 0x75, 0x50, 0x00, 0x75, 0x30,
- 0x00, 0x79, 0xdc, 0x77, 0x03, 0xc2, 0x8e, 0x75,
- 0x17, 0xa8, 0x75, 0x16, 0xa8, 0x74, 0xaa, 0x79,
- 0x01, 0xf3, 0x79, 0xd7, 0x77, 0x74, 0x79, 0xd8,
- 0x77, 0xff, 0x79, 0xd9, 0x77, 0x07, 0x79, 0xda,
- 0x77, 0x00, 0x12, 0x25, 0x6f, 0x43, 0x08, 0x40,
- 0x71, 0x32, 0x79, 0x0e, 0xe3, 0x10, 0x51, 0x1c,
- 0x74, 0x06, 0x71, 0x9b, 0xe5, 0x11, 0x44, 0x80,
- 0x79, 0x05, 0xf3, 0xf5, 0x11, 0x74, 0x07, 0x71,
- 0x9b, 0xe5, 0x12, 0x44, 0x80, 0x79, 0x05, 0xf3,
- 0xf5, 0x12, 0x80, 0x18, 0x53, 0x27, 0xa0, 0x53,
- 0x28, 0x01, 0x75, 0x20, 0xf7, 0x12, 0x23, 0x4c,
- 0x75, 0x11, 0x80, 0x75, 0x12, 0x80, 0x12, 0x1f,
- 0xc0, 0x12, 0x21, 0xdc, 0x79, 0x06, 0xf3, 0x22,
- 0xd2, 0x02, 0x78, 0x11, 0xe2, 0x44, 0x11, 0xf5,
- 0x43, 0xc2, 0x0a, 0x12, 0x29, 0xa3, 0x02, 0x23,
- 0x93, 0x78, 0x11, 0xe2, 0x44, 0x11, 0xf5, 0x44,
- 0xc2, 0x0b, 0x12, 0x29, 0xa3, 0x02, 0x23, 0x93,
- 0x78, 0x00, 0xe2, 0x90, 0x25, 0x9f, 0x02, 0x23,
- 0x93, 0x78, 0x11, 0xe2, 0x75, 0x20, 0xf7, 0x75,
- 0x21, 0x3f, 0x75, 0x49, 0x11, 0x75, 0x4c, 0x11,
- 0x31, 0xa3, 0x02, 0x23, 0x93, 0x78, 0x11, 0xe2,
- 0x44, 0x11, 0x54, 0x0f, 0xf8, 0xc4, 0x48, 0xf8,
- 0xe5, 0x49, 0x45, 0x3f, 0x58, 0xf5, 0x49, 0xd2,
- 0x06, 0xc2, 0x0e, 0x31, 0xa3, 0x02, 0x23, 0x93,
- 0xc0, 0x01, 0x20, 0x2a, 0x04, 0x71, 0x32, 0xc2,
- 0x11, 0x11, 0x5e, 0xc2, 0x1f, 0xd0, 0x01, 0x02,
- 0x23, 0x9b, 0x12, 0x21, 0xdc, 0x78, 0x00, 0xf2,
- 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79, 0xda,
- 0xe7, 0x70, 0x2b, 0x20, 0x0a, 0x05, 0x85, 0x43,
- 0xe0, 0x80, 0x03, 0x75, 0xe0, 0x00, 0x30, 0xe1,
- 0x1d, 0x20, 0xe2, 0x1f, 0x74, 0xe0, 0xca, 0x74,
- 0x00, 0x71, 0x9b, 0xca, 0x79, 0x05, 0xf3, 0xf5,
- 0x09, 0xca, 0x74, 0x01, 0x71, 0x9b, 0xca, 0x79,
- 0x05, 0xf3, 0xf5, 0x0a, 0x80, 0x43, 0x12, 0x15,
- 0x3e, 0x80, 0x3e, 0xe5, 0x0b, 0xb4, 0x17, 0x02,
- 0x80, 0x0b, 0x50, 0x09, 0x74, 0x17, 0xc3, 0x95,
- 0x0b, 0x44, 0x60, 0x80, 0x02, 0x74, 0x60, 0xca,
- 0x74, 0x00, 0x71, 0x9b, 0xca, 0x79, 0x05, 0xf3,
- 0xf5, 0x09, 0xe5, 0x0c, 0xb4, 0x17, 0x02, 0x80,
- 0x0b, 0x50, 0x09, 0x74, 0x17, 0xc3, 0x95, 0x0c,
- 0x44, 0x60, 0x80, 0x02, 0x74, 0x60, 0xca, 0x74,
- 0x01, 0x71, 0x9b, 0xca, 0x79, 0x05, 0xf3, 0xf5,
- 0x0a, 0x22, 0xd2, 0x04, 0x78, 0x11, 0xe2, 0x44,
- 0x11, 0xf5, 0x46, 0xc2, 0x0c, 0x31, 0xa3, 0x02,
- 0x23, 0x93, 0xd2, 0x05, 0x78, 0x11, 0xe2, 0x44,
- 0x11, 0xf5, 0x48, 0xc2, 0x0d, 0x31, 0xa3, 0x02,
- 0x23, 0x93, 0xd2, 0x06, 0x78, 0x11, 0xe2, 0x44,
- 0x11, 0xf5, 0x49, 0xc2, 0x0e, 0x31, 0xa3, 0x02,
- 0x23, 0x93, 0x30, 0x1c, 0x21, 0x20, 0x4d, 0x1e,
- 0xe5, 0x29, 0x60, 0x1a, 0xc2, 0x1c, 0x12, 0x19,
- 0xec, 0x12, 0x13, 0xcf, 0xd2, 0x4d, 0x12, 0x17,
- 0x7f, 0x78, 0x00, 0xf2, 0x79, 0x06, 0xf3, 0x43,
- 0xa8, 0x04, 0x12, 0x24, 0x1b, 0x22, 0x12, 0x27,
- 0x24, 0x22, 0x78, 0x00, 0xe2, 0x90, 0x25, 0x9f,
- 0x02, 0x23, 0x93, 0x78, 0x00, 0xe2, 0xa2, 0xe7,
- 0x72, 0xe3, 0x92, 0xe7, 0x02, 0x1d, 0x85, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x79, 0x04, 0xe3, 0x54, 0x80, 0x70, 0xf9, 0x22,
- 0xe5, 0x29, 0x79, 0xde, 0xf7, 0x75, 0x29, 0x00,
- 0x70, 0x12, 0xe5, 0x15, 0x79, 0xdd, 0xf7, 0x12,
- 0x2d, 0xf0, 0x40, 0x08, 0x20, 0x1c, 0x07, 0x20,
- 0x1d, 0x04, 0x80, 0x02, 0x71, 0x32, 0x30, 0xb5,
- 0x0c, 0x79, 0x06, 0xf3, 0x20, 0x2a, 0x06, 0x79,
- 0xdd, 0xe7, 0x54, 0xfc, 0xf7, 0xd2, 0x2b, 0x12,
- 0x25, 0x6f, 0x22, 0x00, 0x00, 0x00, 0x00, 0xe5,
- 0x15, 0xa2, 0xe0, 0xb0, 0xe6, 0x40, 0x31, 0xa2,
- 0xe1, 0xb0, 0xe7, 0x40, 0x38, 0x10, 0x2b, 0x02,
- 0x80, 0x26, 0x79, 0xde, 0xe7, 0x70, 0x0b, 0x79,
- 0xdd, 0xe7, 0x20, 0xe0, 0x12, 0x20, 0xe1, 0x28,
- 0x80, 0x16, 0xf5, 0x29, 0x30, 0x4d, 0x11, 0x20,
- 0x4c, 0x0e, 0x12, 0x24, 0x1b, 0x80, 0x09, 0x43,
- 0x08, 0x40, 0x12, 0x13, 0xcf, 0x12, 0x17, 0x7f,
- 0xe5, 0x13, 0x20, 0xe4, 0x05, 0x12, 0x18, 0x1b,
- 0x80, 0x03, 0x12, 0x18, 0x77, 0xc2, 0x2b, 0x22,
- 0x12, 0x26, 0xd7, 0x12, 0x13, 0xb7, 0x22, 0x78,
- 0x04, 0x79, 0x00, 0xd9, 0xfe, 0xd8, 0xfa, 0x22,
- 0x00, 0x74, 0x09, 0x71, 0x9b, 0xe5, 0x15, 0x54,
- 0xfc, 0x79, 0x05, 0xf3, 0xf5, 0x15, 0x22, 0x78,
- 0x11, 0xe2, 0x44, 0x11, 0x54, 0x0f, 0xf8, 0xc4,
- 0x48, 0xf5, 0x46, 0xc2, 0x0c, 0xd2, 0x04, 0x31,
- 0xa3, 0x02, 0x23, 0x93, 0x12, 0x26, 0xd7, 0x12,
- 0x00, 0xb7, 0x22, 0x00, 0x79, 0x06, 0xf3, 0x74,
- 0x0a, 0x71, 0x9b, 0x79, 0xe0, 0xe7, 0x44, 0x02,
- 0xf7, 0x79, 0x05, 0xf3, 0x22, 0x74, 0x0a, 0x71,
- 0x9b, 0x79, 0xe0, 0xe7, 0x54, 0xfd, 0xf7, 0x79,
- 0x05, 0xf3, 0x22, 0x21, 0x59, 0x41, 0x23, 0x21,
- 0x59, 0x41, 0x33, 0x41, 0x43, 0x21, 0x59, 0x21,
- 0x59, 0x02, 0x25, 0x9f, 0x00, 0x74, 0x0d, 0x71,
- 0x9b, 0x74, 0x4d, 0x79, 0x05, 0xf3, 0xd2, 0x52,
- 0x22, 0x00, 0x53, 0x08, 0x40, 0x45, 0x08, 0x45,
- 0x1e, 0x79, 0x04, 0xf3, 0xf5, 0x08, 0x22, 0xd2,
- 0x01, 0x78, 0x11, 0xe2, 0x44, 0x11, 0xf5, 0x42,
- 0xc2, 0x09, 0x31, 0xa3, 0x02, 0x23, 0x93, 0x00,
- 0x00, 0x00, 0x00, 0x71, 0x6e, 0x74, 0x09, 0x12,
- 0x17, 0x75, 0xe5, 0x15, 0x44, 0x40, 0x79, 0x05,
- 0xf3, 0xf5, 0x15, 0x75, 0x3a, 0x00, 0x12, 0x1a,
- 0x77, 0x02, 0x18, 0x1b, 0xf5, 0x38, 0xe5, 0x37,
- 0x24, 0x01, 0xf5, 0x37, 0xe5, 0x38, 0x34, 0x00,
- 0xf5, 0x38, 0x40, 0x05, 0x75, 0x39, 0x00, 0x80,
- 0x03, 0x75, 0x39, 0x01, 0x12, 0x04, 0x04, 0xd2,
- 0x8e, 0x02, 0x03, 0x8d, 0x00, 0xb4, 0x0d, 0x03,
- 0x74, 0x14, 0x22, 0x04, 0x83, 0x22, 0x00, 0x02,
- 0xff, 0x01, 0x00, 0x05, 0xfe, 0xff, 0x00, 0x0a,
- 0xfc, 0xfe, 0x00, 0xc0, 0xf8, 0xfc, 0x00, 0x28,
- 0xf0, 0xf8, 0x00, 0x30, 0xe0, 0xd0, 0x01, 0x88,
- 0x04, 0x83, 0x22, 0x00, 0xff, 0xfe, 0xfd, 0xfc,
- 0xfc, 0xfb, 0xfa, 0xfe, 0xfd, 0xfb, 0xf9, 0xf7,
- 0xf7, 0xf5, 0xf3, 0xfc, 0xfa, 0xf6, 0xf2, 0xee,
- 0xee, 0xea, 0xe6, 0xf8, 0xf4, 0xec, 0xe4, 0xdc,
- 0xd4, 0xcc, 0xc4, 0x24, 0x21, 0x83, 0x22, 0x04,
- 0x83, 0x22, 0xff, 0x01, 0xff, 0x01, 0x00, 0x00,
- 0x00, 0x02, 0x22, 0x32, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x83,
- 0x22, 0x8a, 0x01, 0x20, 0x01, 0x0b, 0xea, 0xf3,
- 0xf9, 0x8b, 0x7e, 0x6b, 0xd5, 0x01, 0x00, 0x01,
- 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x01, 0x3a, 0x01, 0x38, 0x01, 0x4b, 0x01,
- 0x49, 0x01, 0x5c, 0x01, 0x5a, 0x01, 0x08, 0x08,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x01, 0x15, 0x24, 0x48, 0x83, 0x22, 0x04,
- 0x83, 0x22, 0x00, 0x01, 0x02, 0x03, 0x04, 0x06,
- 0x07, 0x08, 0x00, 0x03, 0x05, 0x07, 0x09, 0x0d,
- 0x0f, 0x81, 0x00, 0x06, 0x0a, 0x0e, 0x82, 0x8a,
- 0x8e, 0x22, 0x00, 0x0c, 0x84, 0x8c, 0x24, 0x2c,
- 0xa4, 0xac, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0xaa, 0x35, 0xab, 0x36,
- 0x02, 0x27, 0xd4, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
- 0x03, 0x03, 0x03, 0x03, 0x02, 0x02, 0x02, 0x25,
- 0x03, 0x03, 0x2b, 0x03, 0x00, 0x03, 0x00, 0x03,
- 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
- 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
- 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x83, 0x22,
- 0x00, 0x02, 0x02, 0x02, 0x01, 0x02, 0x02, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x01, 0x02, 0x02, 0x02,
- 0x2b, 0x02, 0x02, 0x02, 0x01, 0x02, 0x02, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x01, 0x02, 0x02, 0x02,
- 0x01, 0x01, 0x02, 0x02, 0x01, 0x01, 0x02, 0x01,
- 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
- 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
- 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x01, 0x01, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, 0x00, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x01, 0x02,
- 0x02, 0x01, 0x01, 0x02, 0x02, 0x02, 0x00, 0x02,
- 0x21, 0x02, 0x02, 0x02, 0x02, 0x02, 0x01, 0x00,
- 0x02, 0x02, 0x01, 0x02, 0x02, 0x02, 0x00, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x21,
- 0x01, 0x02, 0x21, 0x02, 0x02, 0x02, 0x00, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x20, 0xb5, 0x05,
- 0x79, 0x0f, 0xf3, 0xc2, 0x11, 0x22, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe5,
- 0x15, 0xa2, 0xe0, 0xb0, 0xe6, 0x50, 0x01, 0x22,
- 0xa2, 0xe1, 0xb0, 0xe7, 0x22, 0x02, 0x00};
- static unsigned char Data0485_0C[] = {
- 0x02, 0x27, 0x69};
- static unsigned char Data0485_66[] = {
- 0x02, 0x25, 0x47, 0x02, 0x25, 0x60};
- static unsigned char Data0485_60[] = {
- 0x02, 0x22, 0x7e};
- static unsigned char Data0485_99[] = {
- 0xc2, 0x53, 0x02, 0x12, 0x86};
- static unsigned char Data0485_9E[] = {
- 0x70, 0xf9, 0x22};
-#ifdef OOKUBO_ORIGINAL
- static unsigned char Data0485_36[] = {
- 0x78, 0x00, 0xf2, 0xc2, 0x53, 0x74, 0x86, 0xc0,
- 0xe0, 0x74, 0x12, 0xc0, 0xe0, 0x32};
-#endif /* OOKUBO_ORIGINAL */
+++ /dev/null
-#ifndef _SOUND_PC9800_H_
-#define _SOUND_PC9800_H_
-
-#include <asm/io.h>
-
-#define PC9800_SOUND_IO_ID 0xa460
-
-/* Sound Functions ID. */
-#define PC9800_SOUND_ID() ((inb(PC9800_SOUND_IO_ID) >> 4) & 0x0f)
-
-#define PC9800_SOUND_ID_DO 0x0 /* PC-98DO+ Internal */
-#define PC9800_SOUND_ID_GS 0x1 /* PC-98GS Internal */
-#define PC9800_SOUND_ID_73 0x2 /* PC-9801-73 (base 0x18x) */
-#define PC9800_SOUND_ID_73A 0x3 /* PC-9801-73/76 (base 0x28x) */
-#define PC9800_SOUND_ID_86 0x4 /* PC-9801-86 and compatible (base 0x18x) */
-#define PC9800_SOUND_ID_86A 0x5 /* PC-9801-86 (base 0x28x) */
-#define PC9800_SOUND_ID_NF 0x6 /* PC-9821Nf/Np Internal */
-#define PC9800_SOUND_ID_XMATE 0x7 /* X-Mate Internal and compatible */
-#define PC9800_SOUND_ID_118 0x8 /* PC-9801-118 and compatible(CanBe Internal, etc.) */
-
-#define PC9800_SOUND_ID_UNKNOWN 0xf /* Unknown (No Sound System or PC-9801-26) */
-
-#endif
+++ /dev/null
-
-int probe_cs4232_mpu (struct address_info *hw_config);
-void attach_cs4232_mpu (struct address_info *hw_config);
+++ /dev/null
-/*
- * ALSA driver for ICEnsemble VT1724 (Envy24HT)
- *
- * Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
- * Copyright (c) 2003 Dimitromanolakis Apostolos <apostol@cs.utoronto.ca>
- * based on the aureon.c code (c) 2003 by Takashi Iwai <tiwai@suse.de>
- *
- * version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
- * added 64x/128x oversampling switch (should be 64x only for 96khz)
- * fixed some recording labels (still need to check the rest)
- * recording is working probably thanks to correct wm8770 initialization
- *
- * version 0.5: Initial release:
- * working: analog output, mixer, headphone amplifier switch
- * not working: prety much everything else, at least i could verify that
- * we have no digital output, no capture, pretty bad clicks and poops
- * on mixer switch and other coll stuff.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- *
- * NOTES:
- *
- *
- *
- * - we reuse the akm4xxx_t record for storing the wm8770 codec data.
- * both wm and akm codecs are pretty similar, so we can integrate
- * both controls in the future, once if wm codecs are reused in
- * many boards.
- *
- * - writing over SPI is implemented but reading is not yet.
- * the SPDIF-in channel status, etc. can be read from CS chip.
- *
- * - DAC digital volumes are not implemented in the mixer.
- * if they show better response than DAC analog volumes, we can use them
- * instead.
- *
- * - Prodigy boards are equipped with AC97 STAC9744 chip , too. it's used to do
- * the analog mixing but not easily controllable (it's not connected
- * directly from envy24ht chip). so let's leave it as it is.
- *
- */
-
-#define REVISION 0.82b
-
-#include <sound/driver.h>
-#include <asm/io.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <sound/core.h>
-
-#include "ice1712.h"
-#include "envy24ht.h"
-#include "prodigy.h"
-
-
-static int prodigy_set_headphone_amp(ice1712_t *ice, int enable)
-{
- unsigned int tmp, tmp2;
-
- tmp2 = tmp = snd_ice1712_gpio_read(ice);
- if (enable)
- tmp |= PRODIGY_HP_AMP_EN;
- else
- tmp &= ~ PRODIGY_HP_AMP_EN;
- if (tmp != tmp2) {
- snd_ice1712_gpio_write(ice, tmp);
- return 1;
- }
- return 0;
-}
-
-
-static int prodigy_get_headphone_amp(ice1712_t *ice)
-{
- unsigned int tmp = snd_ice1712_gpio_read(ice);
-
- return ( tmp & PRODIGY_HP_AMP_EN )!= 0;
-}
-
-
-/*
- * write data in the SPI mode
- */
-static void prodigy_spi_write(ice1712_t *ice, unsigned int cs, unsigned int data, int bits)
-{
- unsigned int tmp;
- int i;
-
- tmp = snd_ice1712_gpio_read(ice);
-
- snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_WM_RW|PRODIGY_WM_DATA|PRODIGY_WM_CLK|
- PRODIGY_WM_CS|PRODIGY_CS8415_CS|PRODIGY_HP_AMP_EN));
- tmp |= PRODIGY_WM_RW;
- tmp &= ~cs;
- snd_ice1712_gpio_write(ice, tmp);
- udelay(1);
-
- for (i = bits - 1; i >= 0; i--) {
- tmp &= ~PRODIGY_WM_CLK;
- snd_ice1712_gpio_write(ice, tmp);
- udelay(1);
- if (data & (1 << i))
- tmp |= PRODIGY_WM_DATA;
- else
- tmp &= ~PRODIGY_WM_DATA;
- snd_ice1712_gpio_write(ice, tmp);
- udelay(1);
- tmp |= PRODIGY_WM_CLK;
- snd_ice1712_gpio_write(ice, tmp);
- udelay(1);
- }
-
- tmp &= ~PRODIGY_WM_CLK;
- tmp |= cs;
- snd_ice1712_gpio_write(ice, tmp);
- udelay(1);
- tmp |= PRODIGY_WM_CLK;
- snd_ice1712_gpio_write(ice, tmp);
- udelay(1);
-}
-
-
-/*
- * get the current register value of WM codec
- */
-static unsigned short wm_get(ice1712_t *ice, int reg)
-{
- reg <<= 1;
- return ((unsigned short)ice->akm[0].images[reg] << 8) |
- ice->akm[0].images[reg + 1];
-}
-
-/*
- * set the register value of WM codec and remember it
- */
-static void wm_put(ice1712_t *ice, int reg, unsigned short val)
-{
- prodigy_spi_write(ice, PRODIGY_WM_CS, (reg << 9) | (val & 0x1ff), 16);
- reg <<= 1;
- ice->akm[0].images[reg] = val >> 8;
- ice->akm[0].images[reg + 1] = val;
-}
-
-
-/*********************************
- ********* Controls section ******
- *********************************/
-
-#define PRODIGY_CON_HPAMP \
- { \
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
- .name = "Headphone Amplifier", \
- .info = prodigy_hpamp_info, \
- .get = prodigy_hpamp_get, \
- .put = prodigy_hpamp_put \
- }
-
-static int prodigy_hpamp_info(snd_kcontrol_t *k, snd_ctl_elem_info_t *uinfo)
-{
- static char *texts[2] = {
- "Off", "On"
- };
-
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 1;
- uinfo->value.enumerated.items = 2;
-
- if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
- uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
- strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
-
- return 0;
-}
-
-
-static int prodigy_hpamp_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
-
- ucontrol->value.integer.value[0] = prodigy_get_headphone_amp(ice);
- return 0;
-}
-
-
-static int prodigy_hpamp_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
-
- return prodigy_set_headphone_amp(ice,ucontrol->value.integer.value[0]);
-}
-
-
-
-#define PRODIGY_CON_DEEMP \
- { \
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
- .name = "DAC De-emphasis", \
- .info = prodigy_deemp_info, \
- .get = prodigy_deemp_get, \
- .put = prodigy_deemp_put \
- }
-
-static int prodigy_deemp_info(snd_kcontrol_t *k, snd_ctl_elem_info_t *uinfo)
-{
- static char *texts[2] = { "Off", "On" };
-
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 1;
- uinfo->value.enumerated.items = 2;
-
- if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
- uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
- strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
-
- return 0;
-}
-
-static int prodigy_deemp_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
- ucontrol->value.integer.value[0] = (wm_get(ice, 0x15) & 0xf) == 0xf;
- return 0;
-}
-
-static int prodigy_deemp_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
- int temp, temp2;
- temp2 = temp = wm_get(ice, 0x15);
- temp = (temp & ~0xf) | ((ucontrol->value.integer.value[0])*0xf);
- if (temp != temp2) {
- wm_put(ice,0x15,temp);
- return 1;
- }
- return 0;
-}
-
-
-#define PRODIGY_CON_OVERSAMPLING \
- { \
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
- .name = "ADC Oversampling", \
- .info = prodigy_oversampling_info, \
- .get = prodigy_oversampling_get, \
- .put = prodigy_oversampling_put \
- }
-
-static int prodigy_oversampling_info(snd_kcontrol_t *k, snd_ctl_elem_info_t *uinfo)
-{
- static char *texts[2] = { "128x", "64x" };
-
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 1;
- uinfo->value.enumerated.items = 2;
-
- if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
- uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
- strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
-
- return 0;
-}
-
-static int prodigy_oversampling_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
- ucontrol->value.integer.value[0] = (wm_get(ice, 0x17) & 0x8) == 0x8;
- return 0;
-}
-
-static int prodigy_oversampling_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- int temp, temp2;
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
-
- temp2 = temp = wm_get(ice, 0x17);
-
- if( ucontrol->value.integer.value[0] ) {
- temp |= 0x8;
- } else {
- temp &= ~0x8;
- }
-
- if (temp != temp2) {
- wm_put(ice,0x17,temp);
- return 1;
- }
- return 0;
-}
-
-
-
-
-/*
- * DAC volume attenuation mixer control
- */
-static int wm_dac_vol_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
-{
- uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
- uinfo->count = 1;
- uinfo->value.integer.min = 0; /* mute */
- uinfo->value.integer.max = 101; /* 0dB */
- return 0;
-}
-
-static int wm_dac_vol_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
- int idx;
- unsigned short vol;
-
- down(&ice->gpio_mutex);
- if (kcontrol->private_value)
- idx = WM_DAC_MASTER_ATTEN;
- else
- idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + WM_DAC_ATTEN;
- vol = wm_get(ice, idx) & 0x7f;
- if (vol <= 0x1a)
- ucontrol->value.integer.value[0] = 0;
- else
- ucontrol->value.integer.value[0] = vol - 0x1a;
- up(&ice->gpio_mutex);
-
- return 0;
-}
-
-static int wm_dac_vol_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
- int idx;
- unsigned short ovol, nvol;
- int change;
-
- snd_ice1712_save_gpio_status(ice);
- if (kcontrol->private_value)
- idx = WM_DAC_MASTER_ATTEN;
- else
- idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + WM_DAC_ATTEN;
- nvol = ucontrol->value.integer.value[0] + 0x1a;
- ovol = wm_get(ice, idx) & 0x7f;
- change = (ovol != nvol);
- if (change) {
- if (nvol <= 0x1a && ovol <= 0x1a)
- change = 0;
- else
- wm_put(ice, idx, nvol | 0x180); /* update on zero detect */
- }
- snd_ice1712_restore_gpio_status(ice);
- return change;
-}
-
-/*
- * ADC gain mixer control
- */
-static int wm_adc_vol_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
-{
- uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
- uinfo->count = 1;
- uinfo->value.integer.min = 0; /* -12dB */
- uinfo->value.integer.max = 0x1f; /* 19dB */
- return 0;
-}
-
-static int wm_adc_vol_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
- int idx;
- unsigned short vol;
-
- down(&ice->gpio_mutex);
- idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + WM_ADC_GAIN;
- vol = wm_get(ice, idx) & 0x1f;
- ucontrol->value.integer.value[0] = vol;
- up(&ice->gpio_mutex);
- return 0;
-}
-
-static int wm_adc_vol_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
- int idx;
- unsigned short ovol, nvol;
- int change;
-
- snd_ice1712_save_gpio_status(ice);
- idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + WM_ADC_GAIN;
- nvol = ucontrol->value.integer.value[0];
- ovol = wm_get(ice, idx) & 0x1f;
- change = (ovol != nvol);
- if (change)
- wm_put(ice, idx, nvol);
- snd_ice1712_restore_gpio_status(ice);
- return change;
-}
-
-/*
- * ADC input mux mixer control
- */
-static int wm_adc_mux_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
-{
- static char *texts[] = {
- "CD Left",
- "CD Right",
- "Line Left",
- "Line Right",
- "Aux Left",
- "Aux Right",
- "Mic Left",
- "Mic Right",
- };
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 2;
- uinfo->value.enumerated.items = 8;
- if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
- uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
- strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
- return 0;
-}
-
-static int wm_adc_mux_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
- unsigned short val;
-
- down(&ice->gpio_mutex);
- val = wm_get(ice, WM_ADC_MUX);
- ucontrol->value.integer.value[0] = val & 7;
- ucontrol->value.integer.value[1] = (val >> 4) & 7;
- up(&ice->gpio_mutex);
- return 0;
-}
-
-static int wm_adc_mux_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
-{
- ice1712_t *ice = snd_kcontrol_chip(kcontrol);
- unsigned short oval, nval;
- int change;
-
- snd_ice1712_save_gpio_status(ice);
- oval = wm_get(ice, WM_ADC_MUX);
- nval = oval & ~0x77;
- nval |= ucontrol->value.integer.value[0] & 7;
- nval |= (ucontrol->value.integer.value[1] & 7) << 4;
- change = (oval != nval);
- if (change)
- wm_put(ice, WM_ADC_MUX, nval);
- snd_ice1712_restore_gpio_status(ice);
- return 0;
-}
-
-/*
- * mixers
- */
-
-static snd_kcontrol_new_t prodigy71_dac_control __devinitdata = {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "DAC Volume",
- .count = 8,
- .info = wm_dac_vol_info,
- .get = wm_dac_vol_get,
- .put = wm_dac_vol_put,
-};
-
-static snd_kcontrol_new_t wm_controls[] __devinitdata = {
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "Master Playback Volume",
- .info = wm_dac_vol_info,
- .get = wm_dac_vol_get,
- .put = wm_dac_vol_put,
- .private_value = 1,
- },
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "ADC Volume",
- .count = 2,
- .info = wm_adc_vol_info,
- .get = wm_adc_vol_get,
- .put = wm_adc_vol_put,
- },
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "Capture Route",
- .info = wm_adc_mux_info,
- .get = wm_adc_mux_get,
- .put = wm_adc_mux_put,
- },
- PRODIGY_CON_HPAMP ,
- PRODIGY_CON_DEEMP ,
- PRODIGY_CON_OVERSAMPLING
-};
-
-
-static int __devinit prodigy_add_controls(ice1712_t *ice)
-{
- unsigned int i;
- int err;
-
- err = snd_ctl_add(ice->card, snd_ctl_new1(&prodigy71_dac_control, ice));
- if (err < 0)
- return err;
-
- for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
- err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
- if (err < 0)
- return err;
- }
- return 0;
-}
-
-
-/*
- * initialize the chip
- */
-static int __devinit prodigy_init(ice1712_t *ice)
-{
- static unsigned short wm_inits[] = {
-
- /* These come first to reduce init pop noise */
- 0x1b, 0x000, /* ADC Mux */
- 0x1c, 0x009, /* Out Mux1 */
- 0x1d, 0x009, /* Out Mux2 */
-
- 0x18, 0x000, /* All power-up */
-
- 0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
- 0x17, 0x006, /* 128fs, slave mode */
-
- 0x00, 0, /* DAC1 analog mute */
- 0x01, 0, /* DAC2 analog mute */
- 0x02, 0, /* DAC3 analog mute */
- 0x03, 0, /* DAC4 analog mute */
- 0x04, 0, /* DAC5 analog mute */
- 0x05, 0, /* DAC6 analog mute */
- 0x06, 0, /* DAC7 analog mute */
- 0x07, 0, /* DAC8 analog mute */
- 0x08, 0x100, /* master analog mute */
-
- 0x09, 0x7f, /* DAC1 digital full */
- 0x0a, 0x7f, /* DAC2 digital full */
- 0x0b, 0x7f, /* DAC3 digital full */
- 0x0c, 0x7f, /* DAC4 digital full */
- 0x0d, 0x7f, /* DAC5 digital full */
- 0x0e, 0x7f, /* DAC6 digital full */
- 0x0f, 0x7f, /* DAC7 digital full */
- 0x10, 0x7f, /* DAC8 digital full */
- 0x11, 0x1FF, /* master digital full */
-
- 0x12, 0x000, /* phase normal */
- 0x13, 0x090, /* unmute DAC L/R */
- 0x14, 0x000, /* all unmute */
- 0x15, 0x000, /* no deemphasis, no ZFLG */
-
- 0x19, 0x000, /* -12dB ADC/L */
- 0x1a, 0x000 /* -12dB ADC/R */
-
- };
-
- static unsigned short cs_inits[] = {
- 0x0441, /* RUN */
- 0x0100, /* no mute */
- 0x0200, /* */
- 0x0600, /* slave, 24bit */
- };
-
- unsigned int tmp;
- unsigned int i;
-
- printk(KERN_INFO "ice1724: AudioTrak Prodigy 7.1 driver rev. 0.82b\n");
- printk(KERN_INFO "ice1724: This driver is in beta stage. Forsuccess/failure reporting contact\n");
- printk(KERN_INFO "ice1724: Apostolos Dimitromanolakis <apostol@cs.utoronto.ca>\n");
-
- ice->num_total_dacs = 8;
- ice->num_total_adcs = 8;
-
- /* to remeber the register values */
- ice->akm = snd_kcalloc(sizeof(akm4xxx_t), GFP_KERNEL);
- if (! ice->akm)
- return -ENOMEM;
- ice->akm_codecs = 1;
-
- snd_ice1712_gpio_set_dir(ice, 0xbfffff); /* fix this for the time being */
-
- /* reset the wm codec as the SPI mode */
- snd_ice1712_save_gpio_status(ice);
- snd_ice1712_gpio_set_mask(ice,~( PRODIGY_WM_RESET|PRODIGY_WM_CS|
- PRODIGY_CS8415_CS|PRODIGY_HP_AMP_EN ));
-
- tmp = snd_ice1712_gpio_read(ice);
- tmp &= ~PRODIGY_WM_RESET;
- snd_ice1712_gpio_write(ice, tmp);
- udelay(1);
- tmp |= PRODIGY_WM_CS | PRODIGY_CS8415_CS;
- snd_ice1712_gpio_write(ice, tmp);
- udelay(1);
- tmp |= PRODIGY_WM_RESET;
- snd_ice1712_gpio_write(ice, tmp);
- udelay(1);
-
- /* initialize WM8770 codec */
- for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
- wm_put(ice, wm_inits[i], wm_inits[i+1]);
-
- /* initialize CS8415A codec */
- for (i = 0; i < ARRAY_SIZE(cs_inits); i++)
- prodigy_spi_write(ice, PRODIGY_CS8415_CS,
- cs_inits[i] | 0x200000, 24);
-
-
- prodigy_set_headphone_amp(ice, 1);
-
- snd_ice1712_restore_gpio_status(ice);
-
- return 0;
-}
-
-/*
- * Prodigy boards don't provide the EEPROM data except for the vendor IDs.
- * hence the driver needs to sets up it properly.
- */
-
-static unsigned char prodigy71_eeprom[] __devinitdata = {
- 0x2b, /* SYSCONF: clock 512, mpu401, spdif-in/ADC, 4DACs */
- 0x80, /* ACLINK: I2S */
- 0xf8, /* I2S: vol, 96k, 24bit, 192k */
- 0xc3, /* SPDIF: out-en, out-int, spdif-in */
- 0xff, /* GPIO_DIR */
- 0xff, /* GPIO_DIR1 */
- 0xbf, /* GPIO_DIR2 */
- 0x00, /* GPIO_MASK */
- 0x00, /* GPIO_MASK1 */
- 0x00, /* GPIO_MASK2 */
- 0x00, /* GPIO_STATE */
- 0x00, /* GPIO_STATE1 */
- 0x00, /* GPIO_STATE2 */
-};
-
-/* entry point */
-struct snd_ice1712_card_info snd_vt1724_prodigy_cards[] __devinitdata = {
- {
- .subvendor = VT1724_SUBDEVICE_PRODIGY71,
- .name = "Audiotrak Prodigy 7.1",
- .chip_init = prodigy_init,
- .build_controls = prodigy_add_controls,
- .eeprom_size = sizeof(prodigy71_eeprom),
- .eeprom_data = prodigy71_eeprom,
- },
- { } /* terminator */
-};
+++ /dev/null
-#ifndef __SOUND_PRODIGY_H
-#define __SOUND_PRODIGY_H
-
-/*
- * ALSA driver for VIA VT1724 (Envy24HT)
- *
- * Lowlevel functions for Terratec PRODIGY cards
- *
- * Copyright (c) 2003 Takashi Iwai <tiwai@suse.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#define PRODIGY_DEVICE_DESC "{AudioTrak,Prodigy 7.1},"
-
-#define VT1724_SUBDEVICE_PRODIGY71 0x33495345 /* PRODIGY 7.1 */
-
-extern struct snd_ice1712_card_info snd_vt1724_prodigy_cards[];
-
-/* GPIO bits */
-#define PRODIGY_CS8415_CS (1 << 23)
-#define PRODIGY_CS8415_CDTO (1 << 22)
-#define PRODIGY_WM_RESET (1 << 20)
-#define PRODIGY_WM_CLK (1 << 19)
-#define PRODIGY_WM_DATA (1 << 18)
-#define PRODIGY_WM_RW (1 << 17)
-#define PRODIGY_AC97_RESET (1 << 16)
-#define PRODIGY_DIGITAL_SEL1 (1 << 15)
-// #define PRODIGY_HP_SEL (1 << 14)
-#define PRODIGY_WM_CS (1 << 12)
-
-#define PRODIGY_HP_AMP_EN (1 << 14)
-
-
-/* WM8770 registers */
-#define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
-#define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
-#define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
-#define WM_DAC_DIG_MATER_ATTEN 0x11 /* DAC master digital attenuation */
-#define WM_PHASE_SWAP 0x12 /* DAC phase */
-#define WM_DAC_CTRL1 0x13 /* DAC control bits */
-#define WM_MUTE 0x14 /* mute controls */
-#define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
-#define WM_INT_CTRL 0x16 /* interface control */
-#define WM_MASTER 0x17 /* master clock and mode */
-#define WM_POWERDOWN 0x18 /* power-down controls */
-#define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
-#define WM_ADC_MUX 0x1b /* input MUX */
-#define WM_OUT_MUX1 0x1c /* output MUX */
-#define WM_OUT_MUX2 0x1e /* output MUX */
-#define WM_RESET 0x1f /* software reset */
-
-
-#endif /* __SOUND_PRODIGY_H */
git://git.onelab.eu / linux-2.6.git / commitdiff